// SPDX-License-Identifier: GPL-2.0-only
/*
 * sorttable.c: Sort the kernel's table
 *
 * Added ORC unwind tables sort support and other updates:
 * Copyright (C) 1999-2019 Alibaba Group Holding Limited. by:
 * Shile Zhang <shile.zhang@linux.alibaba.com>
 *
 * Copyright 2011 - 2012 Cavium, Inc.
 *
 * Based on code taken from recortmcount.c which is:
 *
 * Copyright 2009 John F. Reiser <jreiser@BitWagon.com>.  All rights reserved.
 *
 * Restructured to fit Linux format, as well as other updates:
 * Copyright 2010 Steven Rostedt <srostedt@redhat.com>, Red Hat Inc.
 */

/*
 * Strategy: alter the vmlinux file in-place.
 */

#include <sys/types.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <getopt.h>
#include <elf.h>
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <pthread.h>

#include <tools/be_byteshift.h>
#include <tools/le_byteshift.h>

#ifndef EM_ARCOMPACT
#define EM_ARCOMPACT	93
#endif

#ifndef EM_XTENSA
#define EM_XTENSA	94
#endif

#ifndef EM_AARCH64
#define EM_AARCH64	183
#endif

#ifndef EM_MICROBLAZE
#define EM_MICROBLAZE	189
#endif

#ifndef EM_ARCV2
#define EM_ARCV2	195
#endif

#ifndef EM_RISCV
#define EM_RISCV	243
#endif

#ifndef EM_LOONGARCH
#define EM_LOONGARCH	258
#endif

static uint32_t (*r)(const uint32_t *);
static uint16_t (*r2)(const uint16_t *);
static uint64_t (*r8)(const uint64_t *);
static void (*w)(uint32_t, uint32_t *);
static void (*w2)(uint16_t, uint16_t *);
static void (*w8)(uint64_t, uint64_t *);
typedef void (*table_sort_t)(char *, int);

/*
 * Get the whole file as a programming convenience in order to avoid
 * malloc+lseek+read+free of many pieces.  If successful, then mmap
 * avoids copying unused pieces; else just read the whole file.
 * Open for both read and write.
 */
static void *mmap_file(char const *fname, size_t *size)
{
	int fd;
	struct stat sb;
	void *addr = NULL;

	fd = open(fname, O_RDWR);
	if (fd < 0) {
		perror(fname);
		return NULL;
	}
	if (fstat(fd, &sb) < 0) {
		perror(fname);
		goto out;
	}
	if (!S_ISREG(sb.st_mode)) {
		fprintf(stderr, "not a regular file: %s\n", fname);
		goto out;
	}

	addr = mmap(0, sb.st_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
	if (addr == MAP_FAILED) {
		fprintf(stderr, "Could not mmap file: %s\n", fname);
		goto out;
	}

	*size = sb.st_size;

out:
	close(fd);
	return addr;
}

static uint32_t rbe(const uint32_t *x)
{
	return get_unaligned_be32(x);
}

static uint16_t r2be(const uint16_t *x)
{
	return get_unaligned_be16(x);
}

static uint64_t r8be(const uint64_t *x)
{
	return get_unaligned_be64(x);
}

static uint32_t rle(const uint32_t *x)
{
	return get_unaligned_le32(x);
}

static uint16_t r2le(const uint16_t *x)
{
	return get_unaligned_le16(x);
}

static uint64_t r8le(const uint64_t *x)
{
	return get_unaligned_le64(x);
}

static void wbe(uint32_t val, uint32_t *x)
{
	put_unaligned_be32(val, x);
}

static void w2be(uint16_t val, uint16_t *x)
{
	put_unaligned_be16(val, x);
}

static void w8be(uint64_t val, uint64_t *x)
{
	put_unaligned_be64(val, x);
}

static void wle(uint32_t val, uint32_t *x)
{
	put_unaligned_le32(val, x);
}

static void w2le(uint16_t val, uint16_t *x)
{
	put_unaligned_le16(val, x);
}

static void w8le(uint64_t val, uint64_t *x)
{
	put_unaligned_le64(val, x);
}

/*
 * Move reserved section indices SHN_LORESERVE..SHN_HIRESERVE out of
 * the way to -256..-1, to avoid conflicting with real section
 * indices.
 */
#define SPECIAL(i) ((i) - (SHN_HIRESERVE + 1))

static inline int is_shndx_special(unsigned int i)
{
	return i != SHN_XINDEX && i >= SHN_LORESERVE && i <= SHN_HIRESERVE;
}

/* Accessor for sym->st_shndx, hides ugliness of "64k sections" */
static inline unsigned int get_secindex(unsigned int shndx,
					unsigned int sym_offs,
					const Elf32_Word *symtab_shndx_start)
{
	if (is_shndx_special(shndx))
		return SPECIAL(shndx);
	if (shndx != SHN_XINDEX)
		return shndx;
	return r(&symtab_shndx_start[sym_offs]);
}

/* 32 bit and 64 bit are very similar */
#include "sorttable.h"
#define SORTTABLE_64
#include "sorttable.h"

static int compare_relative_table(const void *a, const void *b)
{
	int32_t av = (int32_t)r(a);
	int32_t bv = (int32_t)r(b);

	if (av < bv)
		return -1;
	if (av > bv)
		return 1;
	return 0;
}

static void sort_relative_table(char *extab_image, int image_size)
{
	int i = 0;

	/*
	 * Do the same thing the runtime sort does, first normalize to
	 * being relative to the start of the section.
	 */
	while (i < image_size) {
		uint32_t *loc = (uint32_t *)(extab_image + i);
		w(r(loc) + i, loc);
		i += 4;
	}

	qsort(extab_image, image_size / 8, 8, compare_relative_table);

	/* Now denormalize. */
	i = 0;
	while (i < image_size) {
		uint32_t *loc = (uint32_t *)(extab_image + i);
		w(r(loc) - i, loc);
		i += 4;
	}
}

static void sort_relative_table_with_data(char *extab_image, int image_size)
{
	int i = 0;

	while (i < image_size) {
		uint32_t *loc = (uint32_t *)(extab_image + i);

		w(r(loc) + i, loc);
		w(r(loc + 1) + i + 4, loc + 1);
		/* Don't touch the fixup type or data */

		i += sizeof(uint32_t) * 3;
	}

	qsort(extab_image, image_size / 12, 12, compare_relative_table);

	i = 0;
	while (i < image_size) {
		uint32_t *loc = (uint32_t *)(extab_image + i);

		w(r(loc) - i, loc);
		w(r(loc + 1) - (i + 4), loc + 1);
		/* Don't touch the fixup type or data */

		i += sizeof(uint32_t) * 3;
	}
}

static int do_file(char const *const fname, void *addr)
{
	int rc = -1;
	Elf32_Ehdr *ehdr = addr;
	table_sort_t custom_sort = NULL;

	switch (ehdr->e_ident[EI_DATA]) {
	case ELFDATA2LSB:
		r	= rle;
		r2	= r2le;
		r8	= r8le;
		w	= wle;
		w2	= w2le;
		w8	= w8le;
		break;
	case ELFDATA2MSB:
		r	= rbe;
		r2	= r2be;
		r8	= r8be;
		w	= wbe;
		w2	= w2be;
		w8	= w8be;
		break;
	default:
		fprintf(stderr, "unrecognized ELF data encoding %d: %s\n",
			ehdr->e_ident[EI_DATA], fname);
		return -1;
	}

	if (memcmp(ELFMAG, ehdr->e_ident, SELFMAG) != 0 ||
	    (r2(&ehdr->e_type) != ET_EXEC && r2(&ehdr->e_type) != ET_DYN) ||
	    ehdr->e_ident[EI_VERSION] != EV_CURRENT) {
		fprintf(stderr, "unrecognized ET_EXEC/ET_DYN file %s\n", fname);
		return -1;
	}

	switch (r2(&ehdr->e_machine)) {
	case EM_386:
	case EM_AARCH64:
	case EM_RISCV:
	case EM_S390:
	case EM_X86_64:
		custom_sort = sort_relative_table_with_data;
		break;
	case EM_PARISC:
	case EM_PPC:
	case EM_PPC64:
		custom_sort = sort_relative_table;
		break;
	case EM_ARCOMPACT:
	case EM_ARCV2:
	case EM_ARM:
	case EM_LOONGARCH:
	case EM_MICROBLAZE:
	case EM_MIPS:
	case EM_XTENSA:
		break;
	default:
		fprintf(stderr, "unrecognized e_machine %d %s\n",
			r2(&ehdr->e_machine), fname);
		return -1;
	}

	switch (ehdr->e_ident[EI_CLASS]) {
	case ELFCLASS32:
		if (r2(&ehdr->e_ehsize) != sizeof(Elf32_Ehdr) ||
		    r2(&ehdr->e_shentsize) != sizeof(Elf32_Shdr)) {
			fprintf(stderr,
				"unrecognized ET_EXEC/ET_DYN file: %s\n", fname);
			break;
		}
		rc = do_sort_32(ehdr, fname, custom_sort);
		break;
	case ELFCLASS64:
		{
		Elf64_Ehdr *const ghdr = (Elf64_Ehdr *)ehdr;
		if (r2(&ghdr->e_ehsize) != sizeof(Elf64_Ehdr) ||
		    r2(&ghdr->e_shentsize) != sizeof(Elf64_Shdr)) {
			fprintf(stderr,
				"unrecognized ET_EXEC/ET_DYN file: %s\n",
				fname);
			break;
		}
		rc = do_sort_64(ghdr, fname, custom_sort);
		}
		break;
	default:
		fprintf(stderr, "unrecognized ELF class %d %s\n",
			ehdr->e_ident[EI_CLASS], fname);
		break;
	}

	return rc;
}

int main(int argc, char *argv[])
{
	int i, n_error = 0;  /* gcc-4.3.0 false positive complaint */
	size_t size = 0;
	void *addr = NULL;

	if (argc < 2) {
		fprintf(stderr, "usage: sorttable vmlinux...\n");
		return 0;
	}

	/* Process each file in turn, allowing deep failure. */
	for (i = 1; i < argc; i++) {
		addr = mmap_file(argv[i], &size);
		if (!addr) {
			++n_error;
			continue;
		}

		if (do_file(argv[i], addr))
			++n_error;

		munmap(addr, size);
	}

	return !!n_error;
}
diff/arch/alpha/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/io.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/param.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/param.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/percpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/percpu.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/pgtable.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/core_cia.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/core_cia.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/core_marvel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/core_marvel.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/entry.S</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/osf_sys.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/osf_sys.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/pci-sysfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci-sysfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/pci_iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci_iommu.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/perf_event.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/srmcons.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/srmcons.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/traps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/lib/fpreg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/lib/fpreg.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/alpha/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/mm/init.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/axc001.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc001.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/axc003.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc003.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/axc003_idu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc003_idu.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/axs10x_mb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axs10x_mb.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/boot/dts/hsdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/hsdk.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/axs101_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs101_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/axs103_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs103_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/axs103_smp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs103_smp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/haps_hs_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/haps_hs_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/haps_hs_smp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/haps_hs_smp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/hsdk_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/hsdk_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/nsim_700_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsim_700_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/nsimosci_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/nsimosci_hs_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_hs_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/nsimosci_hs_smp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_hs_smp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/tb10x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/tb10x_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/vdk_hs38_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/vdk_hs38_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/configs/vdk_hs38_smp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/vdk_hs38_smp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/arcregs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/arcregs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/atomic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/atomic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/atomic64-arcv2.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/atomic64-arcv2.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/bitops.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/bug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/cache.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/cachetype.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/cachetype.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/current.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/dsp-impl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dsp-impl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/dsp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dsp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/dwarf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dwarf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/entry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/entry.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/hugepage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/hugepage.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/io.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/irqflags-arcv2.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/irqflags-arcv2.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/irqflags-compact.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/irqflags-compact.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/linkage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/linkage.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/mmu-arcv2.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/mmu-arcv2.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/mmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/page.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgalloc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/pgtable-bits-arcv2.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable-bits-arcv2.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/pgtable-levels.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable-levels.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/switch_to.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/switch_to.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/syscall.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/thread_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/uapi/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/uapi/asm/page.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/devtree.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/devtree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/intc-arcv2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/intc-arcv2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/intc-compact.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/intc-compact.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/mcip.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/mcip.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/perf_event.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/ptrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/unaligned.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/unaligned.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/kernel/unwind.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/unwind.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/mm/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/cache.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/init.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/ioremap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/mm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/tlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arc/net/bpf_jit_arcv2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/net/bpf_jit_arcv2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/Kconfig.assembler?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.assembler</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.debug</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/Kconfig.platforms?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.platforms</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/compressed/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/compressed/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/compressed/efi-header.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/compressed/efi-header.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-r40.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-v3.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson6-atv1200.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson6-atv1200.dts</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson6.dtsi</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8.dtsi</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8b-ec100.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-ec100.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8b-mxq.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-mxq.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts</a></td><td class='right'>622</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts</a></td><td class='right'>1283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts</a></td><td class='right'>1256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts</a></td><td class='right'>1245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 19.9%;'/><td class='none' style='width: 80.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts</a></td><td class='right'>1034</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 83.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts</a></td><td class='right'>982</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts</a></td><td class='right'>973</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts</a></td><td class='right'>6086</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 97.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 2.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts</a></td><td class='right'>1178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts</a></td><td class='right'>974</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 15.7%;'/><td class='none' style='width: 84.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g4.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g5.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g6.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm28155-ap.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm28155-ap.dts</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm59056.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm59056.dtsi</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm63138.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63138.dtsi</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm63148.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63148.dtsi</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm63178.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63178.dtsi</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm6846.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6846.dtsi</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm6855.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6855.dtsi</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm6878.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6878.dtsi</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm7445.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm7445.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm953012hr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm953012hr.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm953012k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm953012k.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958522er.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958522er.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958525er.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958525er.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958525xmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958525xmc.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958622hr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958622hr.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958623hr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958623hr.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958625hr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625hr.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm958625k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625k.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/broadcom/bcm988312hr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm988312hr.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/cirrus/ep7211-edb7211.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/armada-370-db.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-370-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-db.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-db.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-dir665.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-dir665.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/kirkwood.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/marvell/orion5x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/orion5x.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/mt2701-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt2701-evb.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/mt6572.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt6572.dtsi</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/mediatek/mt7623.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt7623.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/aks-cdu.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/aks-cdu.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/animeo_ip.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/animeo_ip.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-foxg20.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-foxg20.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-qil_a9260.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-qil_a9260.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sam9_l9260.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sam9_l9260.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sam9x60ek.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama5d4ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4ek.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91-vinco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-vinco.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91rm9200.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91rm9200.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91rm9200ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91rm9200ek.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9260.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9260.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9260ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9260ek.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9261.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9261.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9261ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9261ek.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9263.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9263.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9263ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9263ek.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9g20ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g20ek.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9g45.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g45.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9n12.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9n12.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9n12ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9n12ek.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9rl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9rl.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/at91sam9x5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9x5.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/ethernut5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/ethernut5.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/evk-pro3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/evk-pro3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/mpa1600.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/mpa1600.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/pm9g45.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/pm9g45.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sam9x60.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sam9x60.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sam9x7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sam9x7.dtsi</a></td><td class='right'>1316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d2.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d34ek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d34ek.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3xmb.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama5d4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d4.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama7d65-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama7d65-pinfunc.h</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama7d65.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama7d65.dtsi</a></td><td class='right'>740</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/sama7g5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama7g5.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/tny_a9260.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9260.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/tny_a9260_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9260_common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/tny_a9263.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9263.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/tny_a9g20.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9g20.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9260.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9260.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9260_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9260_common.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9263.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9263.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9g20.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra114.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra114.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra124.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts</a></td><td class='right'>1240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 19.9%;'/><td class='none' style='width: 80.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi</a></td><td class='right'>1268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra20.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts</a></td><td class='right'>2087</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 33.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 66.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts</a></td><td class='right'>857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts</a></td><td class='right'>2500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 40.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 59.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nvidia/tegra30.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx25.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx25.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx31-lite.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx31-lite.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx31.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx31.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx35-pdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-pdk.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx35.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx50-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx50-evk.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx50.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx50.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-apf51.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-apf51.dts</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-babbage.dts</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx51.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-ard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-ard.dts</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-smd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-smd.dts</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx53.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-h100.dts</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a></td><td class='right'>441</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi</a></td><td class='right'>511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7d.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7s-warp.dts</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/mxs/imx28.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf500.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf500.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-bk4.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-twr.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-twr.dts</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vf610m4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vfxxx.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/msm8926.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/msm8926.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/pm8921.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/pm8921.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226.dtsi</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8660.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960.dtsi</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-sdx65.dtsi</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/emev2-kzm9d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/emev2-kzm9d.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r7s72100-genmai.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-genmai.dts</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7778-bockw.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7778-bockw.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7778.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7778.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7779-marzen.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7779-marzen.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7779.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7779.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7790-lager.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790-lager.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7790-stout.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790-stout.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7791-koelsch.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791-koelsch.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7791-porter.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791-porter.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7792-blanche.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792-blanche.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7792-wheat.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792-wheat.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7793-gose.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7793-gose.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7794-alt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794-alt.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7794-silk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794-silk.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/renesas/sh73a0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/sh73a0.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3036-kylin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3036-kylin.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3036.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3036.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-mk808.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3128-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128-evb.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3128.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3188-radxarock.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-radxarock.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3188.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3228-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3228-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3229-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3229-evb.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3229-xms6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3229-xms6.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk322x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk322x.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-evb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-evb.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-miqi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-miqi.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-popmetal.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-popmetal.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-r89.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-r89.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288-vyasa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-vyasa.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rk3288.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1108-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108-evb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1108.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/rockchip/rv1126.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos3250-monk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos3250-monk.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos3250-rinato.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos3250-rinato.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos4210-i9100.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4210-i9100.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-midas.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/exynos5410.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5410.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/s5pv210-aquila.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-aquila.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/s5pv210-aries.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-aries.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/s5pv210-galaxys.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-galaxys.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/samsung/s5pv210-goni.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-goni.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear1310-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1310-evb.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear1310.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1310.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear1340-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1340-evb.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear13xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear13xx.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear300-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear300-evb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear310-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear310-evb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear320-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear320-evb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear320-hmi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear320-hmi.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear3xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear3xx.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/spear600.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear600.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/ste-nomadik-s8815.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-nomadik-s8815.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih407-b2120.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-b2120.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih407-clock.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-clock.dtsi</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih407-family.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-family.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih407.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407.dtsi</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih410-b2120.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410-b2120.dts</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih410-b2260.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410-b2260.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stih410.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stihxxx-b2120.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stihxxx-b2120.dtsi</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32f746-disco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f746-disco.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32f746.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f746.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32f769-disco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f769-disco.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h743.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h743i-disco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743i-disco.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h743i-eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743i-eval.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h747i-disco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h747i-disco.dts</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32h750i-art-pi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h750i-art-pi.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp131.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp131.dtsi</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp133.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp133.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp133c-prihmb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp133c-prihmb.dts</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15-scmi.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp151.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp151.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp153.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157a-iot-box.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157a-iot-box.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-dk2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-dk2.dts</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-ev1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-ev1.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts</a></td><td class='right'>1152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp157f-dk2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157f-dk2.dts</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xf.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/davinci/da850-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/davinci/da850-evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-boneblack.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-boneblue.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-boneblue.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-nano.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-nano.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-pdu001.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-shc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-shc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am335x-sl50.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-sl50.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am3517-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am3517-som.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am3874-iceboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am3874-iceboard.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-l4.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dm8148-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm8148-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dm814x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm814x.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dm8168-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm8168-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dm816x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm816x.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7-l4.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dra7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dra71-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra71-evm.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-igep.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-igep.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-ldp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-ldp.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap3430-sdp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3430-sdp.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap36xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap36xx.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-kc1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-kc1.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-l4.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-panda-es.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-es.dts</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-sdp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-sdp.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-l4.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/ti/omap/twl4030.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/twl4030.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/vt8500-bv07.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/vt8500-bv07.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/vt8500.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/vt8500.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8505-ref.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8505-ref.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8505.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8505.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8650-mid.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8650-mid.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8650.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8650.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8750-apc8750.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8750.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8750.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8850-w70v2.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8850.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8850.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/vt8500/wm8950.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8950.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-7000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-7000.dtsi</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-cc108.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-cc108.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-microzed.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-microzed.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-parallella.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-parallella.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc702.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc702.dts</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc706.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc706.dts</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zed.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zed.dts</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/boot/dts/xilinx/zynq-zybo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zybo.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/common/bL_switcher.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/bL_switcher.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/common/locomo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/locomo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/common/sa1111.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/sa1111.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/common/scoop.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/scoop.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/at91_dt_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/at91_dt_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/bcm2835_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/bcm2835_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/collie_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/collie_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/davinci_all_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/davinci_all_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/dove_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/dove_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/ep93xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/ep93xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/exynos_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/exynos_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/imx_v6_v7_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/imx_v6_v7_defconfig</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/lpc18xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/lpc18xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/lpc32xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/lpc32xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/milbeaut_m10v_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/milbeaut_m10v_defconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/mmp2_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mmp2_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/moxart_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/moxart_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/multi_v4t_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v4t_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/multi_v5_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v5_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/multi_v7_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v7_defconfig</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/mvebu_v5_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mvebu_v5_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/mxs_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mxs_defconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/omap1_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/omap1_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/omap2plus_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/omap2plus_defconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/orion5x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/orion5x_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/pxa168_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa168_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/pxa910_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa910_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/pxa_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa_defconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/qcom_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/qcom_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/s3c6400_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/s3c6400_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/s5pv210_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/s5pv210_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/sama5_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/sama5_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/sama7_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/sama7_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/shmobile_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/shmobile_defconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/spitz_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/spitz_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/stm32_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/stm32_defconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/tegra_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/tegra_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/u8500_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/u8500_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/configs/wpcm450_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/wpcm450_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/Kconfig</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/Makefile</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/aes-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/aes-ce-glue.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/aes-neonbs-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/aes-neonbs-glue.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/blake2b-neon-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2b-neon-glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/blake2s-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2s-core.S</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/blake2s-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2s-glue.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/chacha-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-glue.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/chacha-neon-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-neon-core.S</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.3%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/chacha-scalar-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-scalar-core.S</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/crc32-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crc32-ce-core.S</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/crc32-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crc32-ce-glue.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/crct10dif-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crct10dif-ce-core.S</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/crct10dif-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crct10dif-ce-glue.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/curve25519-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/curve25519-core.S</a></td><td class='right'>2062</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 33.1%;'/><td class='none' style='width: 66.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/curve25519-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/curve25519-glue.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/ghash-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/ghash-ce-glue.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/poly1305-armv4.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/poly1305-armv4.pl</a></td><td class='right'>1236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 19.9%;'/><td class='none' style='width: 80.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/poly1305-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/poly1305-glue.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1-armv4-large.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-armv4-large.S</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1-armv7-neon.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-armv7-neon.S</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.2%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-ce-core.S</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-ce-glue.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1_glue.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha1_neon_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1_neon_glue.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha2-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha2-ce-core.S</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha2-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha2-ce-glue.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha256-armv4.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256-armv4.pl</a></td><td class='right'>724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.6%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha256_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_glue.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha256_glue.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_glue.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha256_neon_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_neon_glue.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha512-armv4.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-armv4.pl</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.6%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha512-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-glue.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha512-neon-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-neon-glue.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/crypto/sha512.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/arm_pmuv3.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/arm_pmuv3.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cache.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/cachetype.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cachetype.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/cti.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cti.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/div64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/div64.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/ecard.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/ecard.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/floppy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/highmem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/highmem.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/hugetlb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/jump_label.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/memory.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/page.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/perf_event.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/pgtable-3level.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/pgtable-3level.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/pgtable.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/simd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/simd.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/stacktrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/stacktrace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/syscall.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/text-patching.h</a> (renamed from arch/arm/include/asm/patch.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/tlb.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso/gettimeofday.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso/vsyscall.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vfp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vfp.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vfpmacros.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vfpmacros.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/vmlinux.lds.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vmlinux.lds.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/include/asm/word-at-a-time.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/word-at-a-time.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/asm-offsets.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/bios32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/bios32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/cacheinfo.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/devtree.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/devtree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/entry-armv.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-armv.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/entry-common.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-common.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/entry-ftrace.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-ftrace.S</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/ftrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/head.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/hw_breakpoint.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/hw_breakpoint.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/isa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/isa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/jump_label.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/kgdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/machine_kexec.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/module-plts.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/module-plts.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/patch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/patch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/perf_callchain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/perf_callchain.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/psci_smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/psci_smp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/ptrace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/setup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/smp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/smp_twd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/smp_twd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/sys_oabi-compat.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/sys_oabi-compat.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/traps.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vdso.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/vmlinux-xip.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vmlinux-xip.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vmlinux.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/lib/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/lib/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-aspeed/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-aspeed/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-at91/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-at91/pm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-at91/pm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-at91/pm_data-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm_data-offsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-at91/pm_suspend.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm_suspend.S</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-bcm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-bcm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-bcm/board_bcmbca.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-bcm/board_bcmbca.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-bcm/brcmstb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-bcm/brcmstb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/cputype.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/cputype.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/da830.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da830.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/da850.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da850.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/da8xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da8xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/devices-da8xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/devices-da8xx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/irqs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/irqs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/mux.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/mux.h</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-davinci/psc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/psc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-exynos/suspend.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-exynos/suspend.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-footbridge/dc21285.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-footbridge/dc21285.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-highbank/highbank.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-highbank/highbank.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-hpe/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-hpe/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-hpe/gxp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/gxp.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/avic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/avic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/gpc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/gpc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/mmdc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/mmdc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/pm-imx6.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/pm-imx6.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-imx/tzic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/tzic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-mediatek/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-mediatek/mediatek.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/mediatek.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-mediatek/platsmp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/platsmp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/board-ams-delta.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/board-ams-delta.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/board-nokia770.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/board-nokia770.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/clock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/clock.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap1/omap-dma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/omap-dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/am33xx-restart.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/am33xx-restart.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/board-n8x0.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/board-n8x0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/clockdomain.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clockdomain.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/clockdomains33xx_data.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clockdomains33xx_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/cm33xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/cm33xx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/omap-wakeupgen.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/omap-wakeupgen.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/pm33xx-core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/pm33xx-core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/pmic-cpcap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/pmic-cpcap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/powerdomain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/powerdomain.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/voltage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/voltage.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-omap2/vp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/vp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-pxa/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/irq.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-pxa/sharpsl_pm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/sharpsl_pm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-pxa/spitz.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/spitz.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-rockchip/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rockchip/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-rockchip/platsmp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rockchip/platsmp.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-rpc/ecard.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rpc/ecard.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-s3c/devs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/devs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-s3c/gpio-samsung.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/gpio-samsung.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-s3c/mach-crag6410.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/mach-crag6410.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-sa1100/generic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-sa1100/jornada720_ssp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/jornada720_ssp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-sa1100/neponset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/neponset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-shmobile/headsmp.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/headsmp.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-shmobile/pm-rcar-gen2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/pm-rcar-gen2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-shmobile/setup-rcar-gen2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/setup-rcar-gen2.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-sti/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sti/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-sti/board-dt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sti/board-dt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-stm32/board-dt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-stm32/board-dt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-tegra/reset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-tegra/reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-versatile/spc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-versatile/spc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-vt8500/vt8500.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-vt8500/vt8500.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mach-zynq/common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-zynq/common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/alignment.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/alignment.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-fa.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-fa.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-feroceon-l2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-feroceon-l2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-l2x0-pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-l2x0-pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-l2x0.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-l2x0.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-tauros2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-tauros2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v4.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v4wb.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4wb.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v4wt.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4wt.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v6.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v6.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v7.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v7.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/cache-v7m.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v7m.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/copypage-v4mc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-v4mc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/copypage-v6.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-v6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/copypage-xscale.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-xscale.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/dma-mapping-nommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/dma-mapping-nommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/dma-mapping.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/dma-mapping.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/fault-armv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/fault-armv.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/fault.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/flush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/flush.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/idmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/idmap.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/init.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/ioremap.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/kasan_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/kasan_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/mmu.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/nommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/nommu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/pgd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/pgd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm1020.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1020.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm1020e.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1020e.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm1022.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1022.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm1026.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1026.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm920.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm920.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm922.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm922.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm925.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm925.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm926.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm926.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm940.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm940.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-arm946.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm946.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-feroceon.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-feroceon.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-mohawk.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-mohawk.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-v7.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-v7.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/proc-xsc3.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-xsc3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/mm/tlb-v4.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/tlb-v4.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/plat-orion/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/plat-orion/gpio.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/probes/kprobes/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/kprobes/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/probes/kprobes/opt-arm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/kprobes/opt-arm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/probes/uprobes/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/uprobes/core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/tools/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/tools/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm/vdso/datapage.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/datapage.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/vdso.lds.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/vfp/vfpinstr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vfp/vfpinstr.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/vfp/vfpmodule.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vfp/vfpmodule.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm/xen/enlighten.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/xen/enlighten.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Kconfig</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/Kconfig.platforms?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Kconfig.platforms</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Makefile</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/airoha/en7581-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/airoha/en7581-evb.dts</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/airoha/en7581.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/airoha/en7581.dtsi</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi</a></td><td class='right'>735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-a1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-a1.dtsi</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-axg.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-axg.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b.dtsi</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-s4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-s4.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/Makefile</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-common.dtsi</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j71.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j71.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j72.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j72.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j73.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j73.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j85.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j85.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j85m.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j86.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j86.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j86m.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j87.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j87.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-j87m.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-n51.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-n51.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-n53.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-n53.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi</a></td><td class='right'>610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8960x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8960x.dtsi</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800-0-3-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800-0-3-common.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi</a></td><td class='right'>757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800-0-3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800-0-3.dtsi</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000-j71s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000-j71s.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000-j72s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000-j72s.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000-n66.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000-n66.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000-n69u.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000-n69u.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000-n71.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000-n71.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8000.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-common.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-j127.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-j127.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-j128.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-j128.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-j98a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-j98a.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-j99a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-j99a.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-pmgr.dtsi</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001-pro.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001-pro.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8001.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8001.dtsi</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003-j71t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003-j71t.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003-j72t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003-j72t.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003-n66m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003-n66m.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003-n69.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003-n69.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003-n71m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003-n71m.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s8003.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s8003.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800x-6s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800x-6s.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800x-ipad5.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/s800x-se.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/s800x-se.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/spi1-nvram.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/spi1-nvram.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6000-j314s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000-j314s.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6000-j316s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000-j316s.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6001-j314c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j314c.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6001-j316c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j316c.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6001-j375c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j375c.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6001.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6002-j375d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6002-j375d.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6002.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6002.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t600x-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-common.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t600x-die0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-die0.dtsi</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t600x-j375.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-j375.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6020-j414s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6020-j414s.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6020-j416s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6020-j416s.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6020-j474s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6020-j474s.dts</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6020.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6020.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6021-j414c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6021-j414c.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6021-j416c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6021-j416c.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6021-j475c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6021-j475c.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6021.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6021.dtsi</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6022-j180d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6022-j180d.dts</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6022-j475d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6022-j475d.dts</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t6022.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6022.dtsi</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-common.dtsi</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-die0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-die0.dtsi</a></td><td class='right'>575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-dieX.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-dieX.dtsi</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-nvme.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-nvme.dtsi</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t602x-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t602x-pmgr.dtsi</a></td><td class='right'>2265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 36.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 63.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-6.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-common.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-handheld.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-handheld.dtsi</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-j42d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-j42d.dts</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-j96.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-j96.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-j97.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-j97.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-mini4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-mini4.dtsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-n102.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-n102.dts</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-n56.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-n56.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-n61.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-n61.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000-pmgr.dtsi</a></td><td class='right'>641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7000.dtsi</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7001-air2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7001-air2.dtsi</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7001-j81.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7001-j81.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7001-j82.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7001-j82.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7001-pmgr.dtsi</a></td><td class='right'>650</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t7001.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t7001.dtsi</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-7.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-common.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-d10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-d10.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-d101.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-d101.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-d11.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-d11.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-d111.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-d111.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-ipad6.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-ipad7.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-j171.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-j171.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-j172.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-j172.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-j71b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-j71b.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-j72b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-j72b.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-n112.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-n112.dts</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010-pmgr.dtsi</a></td><td class='right'>772</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8010.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8010.dtsi</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-common.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-j105a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-j105a.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-j120.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-j120.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-j121.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-j121.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-j207.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-j207.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-j208.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-j208.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-pmgr.dtsi</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011-pro2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011-pro2.dtsi</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8011.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8011.dtsi</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j132.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j132.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j137.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j137.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j140a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j140a.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j140k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j140k.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j152f.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j152f.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j160.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j160.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j174.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j174.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j185.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j185.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j185f.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j185f.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j213.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j213.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j214k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j214k.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j215.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j215.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j223.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j223.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j230k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j230k.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j680.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j680.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-j780.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-j780.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-jxxx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-jxxx.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-pmgr.dtsi</a></td><td class='right'>837</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012-touchbar.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012-touchbar.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8012.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8012.dtsi</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-8.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-8.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-8plus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-8plus.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-common.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d20.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d20.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d201.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d201.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d21.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d21.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d211.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d211.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d22.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d22.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-d221.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-d221.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-pmgr.dtsi</a></td><td class='right'>932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015-x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015-x.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8015.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8015.dtsi</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8103-j293.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-j293.dts</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8103-j457.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-j457.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-jxxx.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-pmgr.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8103.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103.dtsi</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8112-j415.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112-j415.dts</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8112-j493.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112-j493.dts</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112-jxxx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/apple/t8112.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112.dtsi</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/corstone1000-fvp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/corstone1000-fvp.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/corstone1000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/corstone1000.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/foundation-v8.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/foundation-v8.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/fvp-base-revc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/fvp-base-revc.dts</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/juno-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/morello-fvp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/morello-fvp.dts</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/morello-sdp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/morello-sdp.dts</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/morello.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/morello.dtsi</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/axiado/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/axiado/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/axiado/ax3000-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/axiado/ax3000-evk.dts</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/axiado/ax3000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/axiado/ax3000.dtsi</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/blaize/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/blaize/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcm2712.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712.dtsi</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/rp1-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/rp1-common.dtsi</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/broadcom/rp1.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/rp1.dtso</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/cix/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/cix/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/cix/sky1-orion-o6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/cix/sky1-orion-o6.dts</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/cix/sky1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/cix/sky1.dtsi</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/axis/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/axis/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/axis/artpec8.dtsi</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos2200-g0s.dts</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi</a></td><td class='right'>1765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos2200.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos2200.dtsi</a></td><td class='right'>1923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts</a></td><td class='right'>613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts</a></td><td class='right'>662</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos7870.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos7870.dtsi</a></td><td class='right'>713</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos850-e850-96.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi</a></td><td class='right'>1094</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos8895.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos8895.dtsi</a></td><td class='right'>1374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos9810-starlte.dts</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos9810.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos9810.dtsi</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-c1s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-c1s.dts</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi</a></td><td class='right'>2195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 35.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 64.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-r8s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-r8s.dts</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-x1s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-x1s.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990-x1slte.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynos990.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos990.dtsi</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/exynosautov920.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynosautov920.dtsi</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/google/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/google/gs101-raven.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101-raven.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/Makefile</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phg.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phg.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi</a></td><td class='right'>1107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-navqp.dts</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi</a></td><td class='right'>796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi</a></td><td class='right'>591</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi</a></td><td class='right'>1308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso</a> (renamed from arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds.dtso)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts</a></td><td class='right'>907</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi</a></td><td class='right'>512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-evk.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm.dtsi</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts</a></td><td class='right'>674</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91-pinfunc.h</a></td><td class='right'>770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91.dtsi</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx91_93_common.dtsi</a></td><td class='right'>1187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts</a></td><td class='right'>760</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-var-som.dtsi</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx93.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93.dtsi</a></td><td class='right'>1394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 20.6%;'/><td class='none' style='width: 77.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx94-clock.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx94-clock.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx94-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx94-pinfunc.h</a></td><td class='right'>1570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx94-power.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx94-power.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx94.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx94.dtsi</a></td><td class='right'>1194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx943-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx943-evk.dts</a></td><td class='right'>627</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx943.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx943.dtsi</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts</a></td><td class='right'>1182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts</a></td><td class='right'>526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi</a></td><td class='right'>656</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi</a></td><td class='right'>698</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/imx95.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95.dtsi</a></td><td class='right'>573</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/mba8xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/mba8xx.dtsi</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a></td><td class='right'>529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32g3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g3.dtsi</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqma8xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqma8xx.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqma8xxs.dtsi</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/intel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/lg/lg1312.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/lg/lg1312.dtsi</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/lg/lg1313.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/lg/lg1313.dtsi</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/lg/lg131x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/lg/lg131x.dtsi</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-371x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-371x.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-db.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-db.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-372x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-372x.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-7020.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7020.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-7040-db.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040-db.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-7040.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8020.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8020.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8040-db.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-db.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8040.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-8080.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8080.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap806.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap807.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap807.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-cp110.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp110.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-cp115.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp115.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp11x.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-cf.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9130-crb-B.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-crb-B.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-clearfog.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/mmp/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/mmp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6331.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6331.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6357.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6357.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6358.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6358.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6359.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6359.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6755.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6755.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6779.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6779.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6795.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6795.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6797.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6797.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h</a></td><td class='right'>1356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7981b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7981b.dtsi</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt7988a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a.dtsi</a></td><td class='right'>838</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8173-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-evb.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8173.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dts</a> (renamed from arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589825.dts)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8186.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-evb.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi</a></td><td class='right'>1340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8188.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188.dtsi</a></td><td class='right'>1759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 27.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 71.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8195-demo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-demo.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h</a></td><td class='right'>1574</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8365-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8365-evk.dts</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8365.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8365.dtsi</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8370.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8370.dtsi</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts</a></td><td class='right'>859</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.8%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi</a></td><td class='right'>1370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra186.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186.dtsi</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra194.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts</a></td><td class='right'>544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.7%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi</a></td><td class='right'>547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/nvidia/tegra264.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra264.dtsi</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/Makefile</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dtso</a> (renamed from arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dts)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/apq8039-t2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8039-t2.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/apq8096-db820c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8096-db820c.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts</a></td><td class='right'>1222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5018.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018.dtsi</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5332.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5332.dtsi</a></td><td class='right'>407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq5424.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5424.dtsi</a></td><td class='right'>1354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/ipq9574.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574.dtsi</a></td><td class='right'>583</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-auto.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-auto.dtsi</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-evk.dts</a> (renamed from arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi)</td><td class='right'>659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-pmics.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-pmics.dtsi</a> (renamed from arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi</a></td><td class='right'>1061</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/lemans.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/lemans.dtsi</a> (renamed from arch/arm64/boot/dts/qcom/sa8775p.dtsi)</td><td class='right'>3680</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 52.0%;'/><td class='rem' style='width: 7.2%;'/><td class='none' style='width: 40.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/monaco-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/monaco-evk.dts</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8916.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8917.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8917.dtsi</a></td><td class='right'>1955</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8939.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939.dtsi</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8976.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8976.dtsi</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8992.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8994.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994.dtsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-mtp.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pm660l.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pm660l.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pm8150.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pm8150.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pm8937.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pm8937.dtsi</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pmd8028.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmd8028.dtsi</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pmi8950.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmi8950.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pmih0108.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmih0108.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pmk8350.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmk8350.dtsi</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/pmk8550.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmk8550.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts</a></td><td class='right'>864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs615-ride.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs615-ride.dts</a></td><td class='right'>519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs8300-ride.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8300-ride.dts</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs8300.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8300.dtsi</a></td><td class='right'>6223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 100.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs8550.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8550.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qcs9100-ride.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs9100-ride.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qdu1000-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qdu1000-idp.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso</a> (renamed from arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb5165-rb5.dts</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/qru1000-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qru1000-idp.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sa8295p-adp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8295p-adp.dts</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sa8540p-ride.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8540p-ride.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sa8775p-ride.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-ride.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sar2130p.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sar2130p.dtsi</a></td><td class='right'>3587</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 57.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 42.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-el2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-el2.dtso</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-idp.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-idp.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-idp.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a></td><td class='right'>1070</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.5%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 82.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8180x-primus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x-primus.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-crd.dts</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts</a></td><td class='right'>1493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts</a></td><td class='right'>1044</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts</a></td><td class='right'>1332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a></td><td class='right'>1434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.2%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 77.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm630.dtsi</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm632.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm632.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm660.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm660.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm670.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm670.dtsi</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi</a></td><td class='right'>1334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 21.4%;'/><td class='none' style='width: 78.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso</a> (renamed from arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts)</td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-mtp.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts</a></td><td class='right'>628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdx75-idp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdx75-idp.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm4250.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm4250.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm4450.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm4450.dtsi</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6115.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115.dtsi</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6125.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6125.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6150.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6150.dtsi</a></td><td class='right'>4466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 71.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 28.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm7125.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7125.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm7225.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7225.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts</a></td><td class='right'>1456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm7325.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7325.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8150-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-mtp.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-hdk.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-mtp.dts</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a></td><td class='right'>529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a></td><td class='right'>918</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 7.2%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a></td><td class='right'>1305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 79.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-hdk.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-mtp.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550-qrd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-qrd.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a></td><td class='right'>2028</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 67.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8650-hdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-hdk.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a></td><td class='right'>3832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 43.4%;'/><td class='rem' style='width: 18.2%;'/><td class='none' style='width: 38.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8750-mtp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8750-mtp.dts</a></td><td class='right'>1202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8750-qrd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8750-qrd.dts</a></td><td class='right'>1056</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/sm8750.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8750.dtsi</a></td><td class='right'>4083</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 65.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 34.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi</a></td><td class='right'>1491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1-crd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1-crd.dtsi</a></td><td class='right'>1811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 29.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 70.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi</a></td><td class='right'>1666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1-el2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1-el2.dtso</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi</a></td><td class='right'>1544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e001de-devkit.dts</a></td><td class='right'>1500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts</a></td><td class='right'>799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 12.4%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi</a></td><td class='right'>1602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a></td><td class='right'>1218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 19.5%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts</a></td><td class='right'>1373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts</a></td><td class='right'>747</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a></td><td class='right'>587</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></td><td class='right'>3943</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 47.8%;'/><td class='rem' style='width: 15.6%;'/><td class='none' style='width: 36.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1p42100-crd.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1p42100-crd.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts</a></td><td class='right'>1625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/qcom/x1p42100.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1p42100.dtsi</a></td><td class='right'>754</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/Makefile</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/cat875.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/cat875.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/condor-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/condor-common.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/draak.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/draak.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ebisu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ebisu.dtsi</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi</a></td><td class='right'>866</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/hihope-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-common.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rev2.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rev4.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a774a1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774a1.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a774b1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774b1.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a774c0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774c0.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a774e1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774e1.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77951.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77951.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77960.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77960.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77961.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77961.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77965.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77965.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-eagle.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77970.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77980.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77980.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77990.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77990.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a77995.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77995.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779a0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0.dtsi</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779f0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779f4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f4.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g0.dtsi</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts</a></td><td class='right'>944</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779g3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g3.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r8a779h2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h2.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a07g044.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g044.dtsi</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a07g054.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g054.dtsi</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a08g045.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a08g045.dtsi</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g047.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g047.dtsi</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g056.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g056.dtsi</a></td><td class='right'>971</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g057.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g057.dtsi</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g077.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g077.dtsi</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g087.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g087.dtsi</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/salvator-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-common.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/salvator-x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-x.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/salvator-xs.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-xs.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/ulcb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/white-hawk-ard-audio-da7212.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-ard-audio-da7212.dtso</a> (renamed from arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/renesas/white-hawk-single.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-single.dtsi</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/Makefile</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-cobra.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-cobra.dtsi</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-evb.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/px30.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-evb.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-a1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-a1.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-evb.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-rock64.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-base.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-evb.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-firefly.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-s.dtsi</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi</a></td><td class='right'>1397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3528.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3528.dtsi</a></td><td class='right'>1178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi</a></td><td class='right'>2352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 37.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 62.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3562.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3562.dtsi</a></td><td class='right'>1186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-base.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi</a></td><td class='right'>904</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts</a></td><td class='right'>554</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566.dtsi</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3566t.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566t.dtsi</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi</a></td><td class='right'>666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts</a></td><td class='right'>588</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3568.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568.dtsi</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk356x-base.dtsi</a> (renamed from arch/arm64/boot/dts/rockchip/rk356x.dtsi)</td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts</a></td><td class='right'>1041</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts</a></td><td class='right'>943</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi</a></td><td class='right'>749</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts</a></td><td class='right'>941</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi</a></td><td class='right'>5775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 92.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 7.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts</a></td><td class='right'>799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts</a></td><td class='right'>847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3576.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3576.dtsi</a></td><td class='right'>2707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 43.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 56.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts</a></td><td class='right'>734</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-base.dtsi</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts</a></td><td class='right'>931</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts</a></td><td class='right'>702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts</a></td><td class='right'>830</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a></td><td class='right'>890</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 10.7%;'/><td class='none' style='width: 85.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi</a></td><td class='right'>867</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts</a></td><td class='right'>1132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 13.1%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts</a></td><td class='right'>1229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi</a></td><td class='right'>877</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts</a></td><td class='right'>756</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.1%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.8%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi</a></td><td class='right'>911</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts</a></td><td class='right'>840</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts</a></td><td class='right'>956</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rk8xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk8xx.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sophgo/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sophgo/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sophgo/sg2000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sophgo/sg2000.dtsi</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sprd/sc2731.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sc2731.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp211.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp211.dtsi</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp213.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp213.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp215.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp215.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp215f-dk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp215f-dk.dts</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp21xc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp21xc.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp21xf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp21xf.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp231.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp231.dtsi</a></td><td class='right'>1191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp233.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp233.dtsi</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp235.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp235.dtsi</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp235f-dk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp235f-dk.dts</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp23xc.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp23xc.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp23xf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp23xf.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></td><td class='right'>1181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp257f-dk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp257f-dk.dts</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/tesla/fsd-evb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd-evb.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/tesla/fsd.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd.dtsi</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/Makefile</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-sk.dts</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am625.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am6254atl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6254atl.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62a7.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7.dtsi</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62d2-evm.dts</a></td><td class='right'>649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62d2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62d2.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi</a></td><td class='right'>629</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi</a></td><td class='right'>1418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62p5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5.dtsi</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am64-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-main.dtsi</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dts</a> (renamed from arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts</a> (renamed from arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-base-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-base-board.dts</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-idk.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-idk.dtso</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts</a></td><td class='right'>575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-sk.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-sk.dts</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721e.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-main.dtsi</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j722s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j742s2-evm.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j742s2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j742s2.dtsi</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a></td><td class='right'>1506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 24.1%;'/><td class='none' style='width: 75.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi</a></td><td class='right'>1281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi</a></td><td class='right'>2751</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 44.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 55.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi</a> (renamed from arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi)</td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-thermal-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-thermal-common.dtsi</a> (renamed from arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a></td><td class='right'>2705</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 43.1%;'/><td class='none' style='width: 56.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/ti/k3-pinctrl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-pinctrl.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/toshiba/tmpv7708.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/versal-net.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/versal-net.dtsi</a></td><td class='right'>1160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/configs/defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/configs/defconfig</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/Kconfig</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/aes-ce-ccm-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-ce-ccm-glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/aes-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-glue.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/aes-neonbs-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-neonbs-glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/chacha-neon-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/chacha-neon-core.S</a></td><td class='right'>805</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.9%;'/><td class='none' style='width: 87.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/chacha-neon-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/chacha-neon-glue.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/crct10dif-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/crct10dif-ce-core.S</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.3%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/crct10dif-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/crct10dif-ce-glue.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/ghash-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/ghash-ce-glue.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/poly1305-armv8.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/poly1305-armv8.pl</a></td><td class='right'>917</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.7%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/poly1305-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/poly1305-glue.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/polyval-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/polyval-ce-glue.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha1-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha1-ce-core.S</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha1-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha1-ce-glue.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha2-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha2-ce-core.S</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha2-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha2-ce-glue.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha256-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha256-glue.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha3-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha3-ce-glue.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha512-armv8.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-armv8.pl</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.6%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha512-ce-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-ce-core.S</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha512-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-ce-glue.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sha512-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-glue.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sm3-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm3-ce-glue.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sm3-neon-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm3-neon-glue.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sm4-ce-ccm-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-ccm-glue.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sm4-ce-gcm-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-gcm-glue.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/crypto/sm4-ce-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-glue.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/hyperv/hv_core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/hyperv/hv_core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/hyperv/mshyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/hyperv/mshyperv.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/acpi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/acpi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/apple_m1_pmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/apple_m1_pmu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/arm_pmuv3.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/arm_pmuv3.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/asm-bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-bug.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/asm-extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-extable.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/asm-uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-uaccess.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/assembler.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/assembler.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/barrier.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cache.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cfi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cfi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cpucaps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpucaps.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cpufeature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpufeature.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/cputype.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cputype.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/daifflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/daifflags.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/debug-monitors.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/debug-monitors.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/el2_setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/el2_setup.h</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/entry-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/entry-common.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/esr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/esr.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/exception.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/exception.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/extable.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/fixmap.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/fpsimd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/fpsimd.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ftrace.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/gcs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/gcs.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/hardirq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hardirq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hugetlb.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/hwcap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hwcap.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/hyperv-tlfs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hyperv-tlfs.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/hypervisor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hypervisor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/insn.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/io.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/jump_label.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kernel-pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kernel-pgtable.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kgdb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kgdb.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kprobes.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_arm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_arm.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_asm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_emulate.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_emulate.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_host.h</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_hyp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_hyp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_mmu.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_nested.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_nested.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_pgtable.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_pkvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_pkvm.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/kvm_ras.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_ras.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mem_encrypt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mem_encrypt.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/memory.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mman.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mmu.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mmu_context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mmu_context.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/module.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/module.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/module.lds.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/module.lds.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mshyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mshyperv.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mte-kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mte-kasan.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/mte.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mte.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/page-def.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/page-def.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/perf_event.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgalloc.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/pgtable-hwdef.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-hwdef.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/pgtable-prot.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-prot.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/pgtable-types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-types.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable.h</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/por.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/por.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/preempt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/preempt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/probes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/probes.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/processor.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/ptdump.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ptdump.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ptrace.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/rqspinlock.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rqspinlock.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/rsi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rsi.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/rsi_cmds.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rsi_cmds.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/rsi_smc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rsi_smc.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/rwonce.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rwonce.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/scs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/scs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/seccomp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/seccomp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/sections.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sections.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/set_memory.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/setup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/smp.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/sparsemem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sparsemem.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/spectre.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/spectre.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/stacktrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/stacktrace/common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace/common.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/stacktrace/frame.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace/frame.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/stacktrace/nvhe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace/nvhe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/syscall.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/sysreg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sysreg.h</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/system_misc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/system_misc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/text-patching.h</a> (renamed from arch/arm64/include/asm/patching.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/thread_info.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/tlb.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/tlbflush.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/topology.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/traps.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/uprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/uprobes.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso/compat_barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/compat_barrier.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso/compat_gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/compat_gettimeofday.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/getrandom.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/gettimeofday.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/vsyscall.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/virt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/virt.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vmalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vmalloc.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/vncr_mapping.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vncr_mapping.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/asm/xen/events.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/xen/events.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/uapi/asm/bitsperlong.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/bitsperlong.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/uapi/asm/hwcap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/hwcap.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/kvm.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/ptrace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/include/uapi/asm/sigcontext.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/sigcontext.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/acpi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/acpi.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/asm-offsets.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cacheinfo.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/compat_alignment.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/compat_alignment.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/cpu_errata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpu_errata.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/cpufeature.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpufeature.c</a></td><td class='right'>687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/cpuinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpuinfo.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/debug-monitors.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/debug-monitors.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/efi-header.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/efi-header.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/efi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/efi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/elfcore.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/elfcore.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/entry-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry-common.c</a></td><td class='right'>614</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/entry-ftrace.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry-ftrace.S</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry.S</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/fpsimd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/fpsimd.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/ftrace.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/head.S</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/hibernate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hibernate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/hw_breakpoint.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hw_breakpoint.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/hyp-stub.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hyp-stub.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/image-vars.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/image-vars.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/io.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/irq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/jump_label.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/kaslr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/kaslr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/kgdb.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/machine_kexec.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/machine_kexec_file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/machine_kexec_file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/module-plts.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/module-plts.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/module.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/mte.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/mte.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/patching.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/patching.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/perf_callchain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/perf_callchain.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/idreg-override.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/idreg-override.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/kaslr_early.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/kaslr_early.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/map_kernel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/map_kernel.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/map_range.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/map_range.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/patch-scs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/patch-scs.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/pi/pi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/pi.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/decode-insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/decode-insn.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/decode-insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/decode-insn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/kprobes.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/kprobes_trampoline.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/kprobes_trampoline.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/simulate-insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/simulate-insn.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/simulate-insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/simulate-insn.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/probes/uprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/uprobes.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/process.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/proton-pack.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/proton-pack.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/ptrace.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/rsi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/rsi.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/sdei.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/sdei.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/setup.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/signal.c</a></td><td class='right'>517</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/signal32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/signal32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/smccc-call.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/smccc-call.S</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/smp.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/stacktrace.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/syscall.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/syscall.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/topology.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/topology.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/traps.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso/vdso.lds.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vdso32/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso32/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vdso32/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso32/vdso.lds.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vmlinux.lds.S</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kernel/watchdog_hld.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/watchdog_hld.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/arch_timer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/arch_timer.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/arm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/arm.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/at.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/at.c</a></td><td class='right'>961</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/config.c</a></td><td class='right'>1430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/debug.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/emulate-nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/emulate-nested.c</a></td><td class='right'>1036</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 83.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/fpsimd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/fpsimd.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/guest.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/guest.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/handle_exit.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/handle_exit.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/entry.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/exception.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/exception.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/hyp/debug-sr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/debug-sr.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/hyp/fault.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/fault.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/hyp/switch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/switch.h</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/fixed_config.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/gfp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/gfp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/mm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/pkvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/pkvm.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/trap_handler.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/debug-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/debug-sr.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/ffa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/ffa.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/host.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/host.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/hyp-init.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/hyp-main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/list_debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/list_debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/mem_protect.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a></td><td class='right'>1207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 80.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/mm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/mm.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/page_alloc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/page_alloc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/pkvm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a></td><td class='right'>675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/psci-relay.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/psci-relay.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/setup.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/stacktrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/switch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/switch.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/sys_regs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/sys_regs.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/sysreg-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/sysreg-sr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/nvhe/timer-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/timer-sr.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/pgtable.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vgic-v3-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vhe/debug-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/debug-sr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vhe/switch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/switch.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vhe/sysreg-sr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/sysreg-sr.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hyp/vhe/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/tlb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/hypercalls.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hypercalls.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/inject_fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/inject_fault.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/mmio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/mmio.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/mmu.c</a></td><td class='right'>508</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/nested.c</a></td><td class='right'>1373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 77.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/pkvm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pkvm.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/pmu-emul.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pmu-emul.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pmu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/psci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/psci.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/ptdump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/ptdump.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/reset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/reset.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/stacktrace.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/sys_regs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/sys_regs.c</a></td><td class='right'>2111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.3%;'/><td class='rem' style='width: 10.6%;'/><td class='none' style='width: 66.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/sys_regs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/sys_regs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/trace_arm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/trace_arm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/trace_handle_exit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/trace_handle_exit.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic-sys-reg-v3.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic-sys-reg-v3.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-debug.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-init.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-its.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-its.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-mmio-v2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio-v2.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-mmio-v3.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio-v3.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-mmio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-v2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-v3-nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v3-nested.c</a></td><td class='right'>407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-v3.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v3.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-v4.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v4.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic-v5.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v5.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vgic/vgic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/kvm/vmid.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vmid.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/clear_page.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/clear_page.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/clear_user.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/clear_user.S</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/copy_from_user.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_from_user.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/copy_page.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_page.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/copy_template.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_template.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/copy_to_user.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_to_user.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/crc32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/crc32.S</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/insn.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/memcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/memcpy.S</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/memset.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/memset.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/lib/xor-neon.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/xor-neon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/context.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/context.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/contpte.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/contpte.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/copypage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/copypage.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/extable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/extable.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/fault.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/fixmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/fixmap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/flush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/flush.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/gcs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/gcs.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/hugetlbpage.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/init.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ioremap.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/kasan_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/kasan_init.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/mmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/mmap.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/mmu.c</a></td><td class='right'>714</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/pageattr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/pageattr.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/pgd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/pgd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/physaddr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/physaddr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/proc.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/proc.S</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/ptdump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ptdump.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/ptdump_debugfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ptdump_debugfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/mm/trans_pgd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/trans_pgd.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/net/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/net/bpf_jit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/bpf_jit.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/net/bpf_jit_comp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/bpf_jit_comp.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/arm64/net/bpf_timed_may_goto.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/bpf_timed_may_goto.S</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/tools/cpucaps?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/cpucaps</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/tools/gen-sysreg.awk?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/gen-sysreg.awk</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/tools/syscall_32.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/syscall_32.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/tools/sysreg?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/sysreg</a></td><td class='right'>2205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 34.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 64.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/arm64/xen/hypercall.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/xen/hypercall.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/abiv1/alignment.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/abiv1/alignment.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/abiv1/cacheflush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/abiv1/cacheflush.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/bitops.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/io.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/page.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/pgalloc.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/pgtable.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/syscall.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/vdso/clocksource.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/clocksource.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/gettimeofday.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/processor.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/vsyscall.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/io.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/ptrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/setup.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/vdso.lds.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/csky/kernel/vdso/vgettimeofday.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/vgettimeofday.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/csky/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/mm/init.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/configs/comet_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/configs/comet_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/bitops.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/cmpxchg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/io.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/page.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/pgalloc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/pgtable.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/setup.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/syscall.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/include/uapi/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/uapi/asm/setup.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/time.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/traps.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/hexagon/lib/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/lib/io.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/hexagon/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/mm/init.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Kconfig</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k0500-ref.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k0500-ref.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k0500.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k0500.dtsi</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k1000-ref.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k1000-ref.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k1000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k1000.dtsi</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k2000-ref.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k2000-ref.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/dts/loongson-2k2000.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k2000.dtsi</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/boot/install.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/install.sh</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/configs/loongson3_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/configs/loongson3_defconfig</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/crypto/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/crypto/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/acenv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/acenv.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/acpi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/acpi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/addrspace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/addrspace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/alternative-asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/alternative-asm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/alternative.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/alternative.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/asm-extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm-extable.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/asm-prototypes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm-prototypes.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/bootinfo.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/bootinfo.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/bug.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cache.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/cpu-info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cpu-info.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/entry-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/entry-common.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/fprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/fprobe.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/fpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/fpu.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/ftrace.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/gpr-num.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/gpr-num.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/hugetlb.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/hw_breakpoint.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/hw_breakpoint.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/image.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/image.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/inst.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/inst.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/io.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/irq.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/irqflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/irqflags.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/jump_label.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kasan.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kexec.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_eiointc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_eiointc.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_host.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_ipi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_ipi.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_mmu.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_para.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_para.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_pch_pic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_pch_pic.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/kvm_vcpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_vcpu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/lbt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/lbt.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/loongarch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/loongarch.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/numa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/numa.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/orc_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/orc_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/page.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgalloc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/pgtable-bits.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgtable-bits.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgtable.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/prefetch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/prefetch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/ptrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/set_memory.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/smp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/sparsemem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/sparsemem.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/stackframe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/stackframe.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/stacktrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/stacktrace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/syscall.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/thread_info.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/topology.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/unwind_hints.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/unwind_hints.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/uprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/uprobes.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/arch_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/arch_data.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/getrandom.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/gettimeofday.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/vdso.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/vsyscall.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/kvm.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/uapi/asm/kvm_para.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/ptrace.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/include/uapi/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/setup.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/acpi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/acpi.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/alternative.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/alternative.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/asm-offsets.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/cacheinfo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/cpu-probe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/cpu-probe.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/efi-header.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/efi-header.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/efi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/efi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/elf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/elf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/entry.S</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/env.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/env.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/fpu.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/fpu.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/ftrace_dyn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/ftrace_dyn.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/genex.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/genex.S</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/hw_breakpoint.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/hw_breakpoint.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/idle.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/idle.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/inst.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/inst.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/io.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/kdebugfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kdebugfs.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/kexec_efi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kexec_efi.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/kexec_elf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kexec_elf.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/kfpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kfpu.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kgdb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/lbt.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/lbt.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/machine_kexec.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/machine_kexec_file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/machine_kexec_file.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/mcount.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/mcount.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/mcount_dyn.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/mcount_dyn.S</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/module-sections.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/module-sections.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/numa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/numa.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/paravirt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/paravirt.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/proc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/proc.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/process.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/ptrace.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/relocate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/relocate.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/relocate_kernel.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/relocate_kernel.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/reset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/reset.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/setup.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/signal.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/smp.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/stacktrace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/switch.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/switch.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/time.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/traps.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/unaligned.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unaligned.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/unwind_guess.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_guess.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/unwind_orc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_orc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/unwind_prologue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_prologue.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/uprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/uprobes.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/vdso.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/exit.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/exit.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/intc/eiointc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/intc/eiointc.c</a></td><td class='right'>695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/intc/ipi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/intc/ipi.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/intc/pch_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/intc/pch_pic.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/interrupt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/interrupt.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/irqfd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/irqfd.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/main.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/mmu.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/switch.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/switch.S</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/timer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/timer.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/trace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/trace.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/vcpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/vcpu.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/kvm/vm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/vm.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/lib/csum.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/lib/csum.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/fault.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/hugetlbpage.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/init.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/ioremap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/kasan_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/kasan_init.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/mmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/mmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/pageattr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/pageattr.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/pgtable.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/mm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/tlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/net/bpf_jit.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/net/bpf_jit.c</a></td><td class='right'>759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/net/bpf_jit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/net/bpf_jit.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/pci/acpi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/pci/acpi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/pci/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/pci/pci.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/power/hibernate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/hibernate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/power/platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/platform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/power/suspend_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/suspend_asm.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vdso.lds.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/vdso/vgetcpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vgetcpu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/loongarch/vdso/vgetrandom-chacha.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vgetrandom-chacha.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/Kconfig.cpu?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.cpu</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.debug</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/Kconfig.machine?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.machine</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/amiga/amisound.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/amiga/amisound.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/amiga/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/amiga/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/apollo/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/apollo/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/atari/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/atari/config.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/atari/nvram.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/atari/nvram.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/coldfire/device.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/device.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/coldfire/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/gpio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/coldfire/m5272.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/m5272.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/coldfire/m5441x.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/m5441x.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/amcore_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/amcore_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/amiga_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/amiga_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/apollo_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/apollo_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/atari_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/atari_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/bvme6000_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/bvme6000_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/hp300_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/hp300_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/mac_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mac_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/multi_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/multi_defconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/mvme147_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mvme147_defconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/mvme16x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mvme16x_defconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/q40_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/q40_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/sun3_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/sun3_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/configs/sun3x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/sun3x_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/emu/nfblock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/emu/nfblock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/adb_iop.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/adb_iop.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/bitops.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/bootinfo.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/bootinfo.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/entry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/entry.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/floppy.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/io_no.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/io_no.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/kexec.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/libgcc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/libgcc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mac_baboon.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_baboon.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mac_iop.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_iop.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mac_oss.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_oss.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mac_psc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_psc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mac_via.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_via.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/math-emu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/math-emu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mcf_pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcf_pgalloc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mcf_pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcf_pgtable.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mcfgpio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcfgpio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mcfmmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcfmmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/motorola_pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/motorola_pgalloc.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/motorola_pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/motorola_pgtable.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mvme147hw.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mvme147hw.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/mvme16xhw.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mvme16xhw.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/nettel.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/nettel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/openprom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/openprom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/page_mm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page_mm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/page_no.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page_no.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/pgtable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/pgtable_mm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/pgtable_mm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/processor.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/setup.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/sun3_pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3_pgalloc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/sun3_pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3_pgtable.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/sun3mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/syscall.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/thread_info.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/traps.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/vga.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/vga.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/asm/virtconvert.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/virtconvert.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/uapi/asm/bootinfo-vme.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/bootinfo-vme.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/uapi/asm/bootinfo.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/bootinfo.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/early_printk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/early_printk.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/head.S</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/pcibios.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/pcibios.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/ptrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/setup_mm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/setup_mm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/setup_no.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/setup_no.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/time.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/traps.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/kernel/uboot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/uboot.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/m68k/lib/muldi3.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/lib/muldi3.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mac/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/config.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mac/macboing.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/macboing.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mac/via.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/via.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/math-emu/fp_emu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/math-emu/fp_emu.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/init.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mm/mcfmmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/mcfmmu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mm/motorola.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/motorola.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mm/sun3mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/sun3mmu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mvme147/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme147/config.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/m68k/mvme147/mvme147.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme147/mvme147.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mvme16x/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/mvme16x/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/config.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/m68k/mvme16x/rtc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/rtc.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/q40/config.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/q40/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/sun3/mmu_emu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/sun3/mmu_emu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/m68k/sun3/sun3dvma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/sun3/sun3dvma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/Kconfig.platform?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/Kconfig.platform</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/asm-compat.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/asm-compat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/current.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/entry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/entry.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/exceptions.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/exceptions.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/fixmap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/ftrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/kgdb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/kgdb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/page.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/pgalloc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/pgtable.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/sections.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/sections.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/setup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/syscall.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/thread_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/unistd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/asm/xilinx_mb_manager.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/xilinx_mb_manager.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/include/uapi/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/uapi/asm/setup.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/cpu/mb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/cpu/mb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/microblaze_ksyms.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/microblaze_ksyms.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/prom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/kernel/timer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/mm/init.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/microblaze/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/mm/pgtable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/Kbuild.platforms?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Kbuild.platforms</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Kconfig</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/Makefile.postlink?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Makefile.postlink</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/alchemy/common/clock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/alchemy/common/clock.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/alchemy/common/gpiolib.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/alchemy/common/gpiolib.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/ath25/ar2315.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ath25/ar2315.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/ath25/ar5312.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ath25/ar5312.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/bcm47xx/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm47xx/setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/bcm63xx/boards/board_bcm963xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm63xx/boards/board_bcm963xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/bcm63xx/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm63xx/gpio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/compressed/uart-16550.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/compressed/uart-16550.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm6358.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm6358.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm6368.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm6368.dtsi</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm7346.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm7360.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm7362.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm7425.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7425.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/brcm/bcm7435.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7435.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/cavium-octeon/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/cavium-octeon/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/econet/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/econet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/econet/en751221.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/econet/en751221.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ingenic/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ingenic/gcw0.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/gcw0.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ingenic/rs90.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/rs90.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/lantiq/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/lantiq/danube.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/danube.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/lantiq/danube_easy50712.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/danube_easy50712.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/cq-t300b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/cq-t300b.dts</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/loongson1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/loongson1.dtsi</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/loongson1b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/loongson1b.dtsi</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/loongson1c.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/loongson1c.dtsi</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/ls1b-demo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/ls1b-demo.dts</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/ls7a-pch.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/ls7a-pch.dtsi</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/lsgz_1b_dev.dts</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/loongson/smartloong-1c.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/smartloong-1c.dts</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5-epm5.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq5.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5.dtsi</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mobileye/eyeq6h.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h.dtsi</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mscc/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mscc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/mti/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mti/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/pic32/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/pic32/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/pic32/pic32mzda.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/pic32/pic32mzda.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9132.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9132.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331_dpt_module.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_dpt_module.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331_omega.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_omega.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/mt7620a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7620a.dtsi</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/mt7620a_eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7620a_eval.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/mt7628a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7628a.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/omega2p.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/omega2p.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/rt2880.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt2880.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/rt2880_eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt2880_eval.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/rt3050.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3050.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/rt3883.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3883.dtsi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/ralink/rt3883_eval.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3883_eval.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/cisco_sg220-26.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/cisco_sg220-26.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/rtl838x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl838x.dtsi</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/rtl83xx.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl83xx.dtsi</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/rtl9302c.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl9302c.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/dts/realtek/rtl930x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl930x.dtsi</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/boot/tools/relocs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/tools/relocs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/crypto/octeon-md5.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha1.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha1.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha256.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha256.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha512.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha512.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/executive/octeon-model.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/executive/octeon-model.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/octeon-crypto.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/octeon-crypto.c</a> (renamed from arch/mips/cavium-octeon/crypto/octeon-crypto.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/octeon-irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/octeon-irq.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/octeon-platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/octeon-platform.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/cavium-octeon/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ath79_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ath79_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/bcm47xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/bcm47xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/bigsur_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/bigsur_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/cavium_octeon_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/cavium_octeon_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/cobalt_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/cobalt_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/db1xxx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/db1xxx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/decstation_64_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_64_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/decstation_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/decstation_r4k_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_r4k_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/eyeq5_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/eyeq5_defconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/eyeq6_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/eyeq6_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/fuloong2e_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/fuloong2e_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/gcw0_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/gcw0_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/generic/32r6.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/32r6.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/generic/64r6.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/64r6.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/generic/board-marduk.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/board-marduk.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/gpr_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/gpr_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ip22_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip22_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ip27_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip27_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ip28_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip28_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ip30_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip30_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/ip32_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip32_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/lemote2f_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/lemote2f_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/loongson1_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson1_defconfig</a> (renamed from arch/mips/configs/loongson1c_defconfig)</td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/loongson1b_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson1b_defconfig</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/loongson2k_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson2k_defconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/loongson3_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson3_defconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/malta_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/malta_kvm_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_kvm_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/malta_qemu_32r6_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_qemu_32r6_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/maltaaprp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaaprp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/maltasmvp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltasmvp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/maltasmvp_eva_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltasmvp_eva_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/maltaup_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaup_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/maltaup_xpa_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaup_xpa_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/mtx1_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/mtx1_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/omega2p_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/omega2p_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/rb532_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rb532_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/rm200_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rm200_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/rt305x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rt305x_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/sb1250_swarm_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/sb1250_swarm_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/vocore2_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/vocore2_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/configs/xway_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/xway_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/Kconfig</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/chacha-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/chacha-core.S</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/chacha-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/chacha-glue.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/crc32-mips.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/crc32-mips.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/poly1305-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/poly1305-glue.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/crypto/poly1305-mips.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/poly1305-mips.pl</a></td><td class='right'>1273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 20.5%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/dec/prom/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/dec/prom/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/econet/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/econet/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/econet/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/econet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/econet/Platform?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/econet/Platform</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/econet/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/econet/init.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/fw/arc/cmdline.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/fw/arc/cmdline.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/generic/board-ocelot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/generic/board-ocelot.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/addrspace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/addrspace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/asm-eva.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/asm-eva.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/asm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/bitops.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/bmips.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/bmips.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/cacheflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cacheflush.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/cpu-info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu-info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/cpu-type.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu-type.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/dec/ecc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/ecc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/dec/interrupts.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/interrupts.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/dec/kn01.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn01.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/dec/kn02.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn02.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/dec/kn02xa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn02xa.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/ds1287.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ds1287.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/eva.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/eva.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/floppy.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ftrace.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/hazards.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/hazards.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/hugetlb.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/idle.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/idle.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/io.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/irqflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/irqflags.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/jazz.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/jazz.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/kvm_host.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/linkage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/linkage.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-generic/mc146818rtc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-generic/mc146818rtc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-generic/spaces.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-generic/spaces.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-ip30/spaces.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ip30/spaces.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-jazz/mc146818rtc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-jazz/mc146818rtc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson2ef/loongson.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson2ef/loongson.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson32/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/irq.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson32/loongson1.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/loongson1.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson32/platform.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/platform.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson32/regs-mux.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/regs-mux.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson64/boot_param.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson64/boot_param.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-loongson64/spaces.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson64/spaces.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-malta/mc146818rtc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-malta/mc146818rtc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-ralink/spaces.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ralink/spaces.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-rc32434/pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-rc32434/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mach-rm/mc146818rtc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-rm/mc146818rtc.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mc146818-time.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mc146818-time.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mips-boards/bonito64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-boards/bonito64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mips-cm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-cm.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mips-cps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-cps.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mipsmtregs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mipsmtregs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mipsregs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mipsregs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/mmzone.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mmzone.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/msa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/msa.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/octeon/crypto.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/octeon/crypto.h</a> (renamed from arch/mips/cavium-octeon/crypto/octeon-crypto.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/page.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/pci/bridge.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pci/bridge.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgalloc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/pgtable-64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgtable-64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgtable.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/pm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/prefetch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/prefetch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ptrace.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/regdef.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/regdef.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sgi/heart.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sgi/heart.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sibyte/board.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/board.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sibyte/sb1250.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/sb1250.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sibyte/sb1250_defs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/sb1250_defs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/smp-cps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/smp-cps.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/addrs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/addrs.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/gda.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/gda.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/kldir.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/kldir.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/klkernvars.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/klkernvars.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/launch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/launch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/nmi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/nmi.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/addrs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/addrs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/hub.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/hubio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubio.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/hubmd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubmd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/hubni.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubni.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/sn0/hubpi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubpi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sn/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/socket.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/socket.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/switch_to.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/switch_to.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/sync.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sync.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/syscall.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/thread_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/time.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/time.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/topology.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/unistd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/gettimeofday.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vdso/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/vdso.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/vsyscall.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vga.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vga.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/vpe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vpe.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/xtalk/xtalk.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/xtalk/xtalk.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/asm/xtalk/xwidget.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/xtalk/xwidget.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/uapi/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/uapi/asm/mman.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/include/uapi/asm/socket.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/uapi/asm/socket.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/asm-offsets.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/cevt-bcm1480.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cevt-bcm1480.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/cevt-ds1287.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cevt-ds1287.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/cmpxchg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cmpxchg.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/cps-vec.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cps-vec.S</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/cpu-probe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cpu-probe.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/ftrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/genex.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/genex.S</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/gpio_txx9.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/gpio_txx9.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/idle.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/idle.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/mips-cm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/mips-cm.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/mips-mt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/mips-mt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/perf_event_mipsxx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/perf_event_mipsxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/pm-cps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/pm-cps.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/proc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/proc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/process.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/prom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/ptrace.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/relocate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/relocate.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/scall32-o32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/scall32-o32.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/setup.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/smp-cps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/smp-cps.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/smp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/spram.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/spram.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/syscalls/syscall_n32.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_n32.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/syscalls/syscall_n64.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_n64.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/syscalls/syscall_o32.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_o32.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/traps.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vdso.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vmlinux.lds.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kernel/vpe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vpe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kvm/mips.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kvm/mips.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/kvm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kvm/mmu.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/falcon/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/falcon/prom.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/falcon/sysctrl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/falcon/sysctrl.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/xway/clk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/clk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/xway/dcdc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/dcdc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/xway/dma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/xway/gptu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/gptu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lantiq/xway/sysctrl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/sysctrl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/mips/lib/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lib/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/lib/iomap-pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lib/iomap-pci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson2ef/common/machtype.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson2ef/common/machtype.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/Platform?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Platform</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/irq.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/platform.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/prom.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/setup.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/common/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/time.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/ls1b/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1b/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/ls1b/board.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1b/board.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/ls1c/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1c/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson32/ls1c/board.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1c/board.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson64/boardinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/boardinfo.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson64/env.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/env.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson64/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/init.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson64/numa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/numa.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/loongson64/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/math-emu/cp1emu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/math-emu/cp1emu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/math-emu/me-debugfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/math-emu/me-debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/cache.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/init.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/ioremap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/ioremap64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/ioremap64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/pgtable-32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable-32.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/pgtable-64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable-64.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/physaddr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/physaddr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/mm/tlb-r4k.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/tlb-r4k.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-ar2315.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-ar2315.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-lantiq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-lantiq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-legacy.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-legacy.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-rt2880.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-rt2880.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-rt3883.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-rt3883.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/pci/pci-xtalk-bridge.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-xtalk-bridge.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/ralink/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/ralink/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/mips/ralink/cevt-rt3352.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/cevt-rt3352.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/ralink/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/rb532/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/rb532/gpio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/rb532/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/rb532/prom.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip22/ip22-gio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-gio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip22/ip22-platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-platform.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip22/ip22-reset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip22/ip22-setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip27/ip27-irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip27/ip27-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip27/ip27-memory.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip27/ip27-memory.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-power.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-power.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-timer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-timer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip30/ip30-xtalk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-xtalk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sgi-ip32/ip32-setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip32/ip32-setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/sni/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sni/setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/txx9/generic/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/txx9/generic/setup.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/vdso/genvdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/genvdso.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/mips/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/vdso.lds.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/boot/dts/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/entry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/entry.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/io.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/page.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/pgalloc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/pgtable.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/registers.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/registers.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/setup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/syscall.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/syscalls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/syscalls.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/thread_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/traps.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/asm/unistd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/unistd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/cpuinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/cpuinfo.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/entry.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/prom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/setup.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/kernel/syscall_table.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/syscall_table.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/mm/cacheflush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/cacheflush.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/init.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/pgtable.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/mm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/tlb.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/nios2/platform/Kconfig.platform?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/platform/Kconfig.platform</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/configs/or1klitex_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/or1klitex_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/configs/or1ksim_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/or1ksim_defconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/configs/simple_smp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/simple_smp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/configs/virt_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/virt_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/bitops/__ffs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/__ffs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/bitops/__fls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/__fls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/bitops/ffs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/ffs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/bitops/fls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/fls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/cacheflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/cacheflush.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/cpuinfo.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/cpuinfo.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/fixmap.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/insn-def.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/insn-def.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/jump_label.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/mmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/page.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/pgalloc.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/pgtable.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/ptrace.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/setup.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/syscall.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/text-patching.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/thread_info.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/uapi/asm/ptrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/cacheinfo.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/dma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/dma.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/entry.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/head.S</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/jump_label.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/module.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/patching.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/patching.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/prom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/ptrace.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/setup.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/signal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/vmlinux.lds.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/mm/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/cache.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/init.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/openrisc/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/ioremap.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/boot/compressed/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/boot/compressed/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/configs/generic-32bit_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/configs/generic-32bit_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/configs/generic-64bit_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/configs/generic-64bit_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/alternative.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/alternative.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/assembly.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/assembly.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/barrier.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/bitops.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/cache.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/current.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/dwarf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/dwarf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/fixmap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/floppy.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/ftrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/hugetlb.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/io.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/kexec.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/kgdb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/kgdb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/linkage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/linkage.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/mman.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/page.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/pdc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pdc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/pdcpat.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pdcpat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/perf_event.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pgalloc.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pgtable.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/prefetch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/prefetch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/processor.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/psw.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/psw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/signal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/smp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/special_insns.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/special_insns.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/spinlock_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/syscall.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/text-patching.h</a> (renamed from arch/parisc/include/asm/patch.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/thread_info.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/traps.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/uaccess.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/unistd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/vdso.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/asm/video.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/video.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/ioctls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/ioctls.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/mman.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/pdc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/pdc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/perf_regs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/perf_regs.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/signal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/include/uapi/asm/socket.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/socket.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/cache.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/drivers.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/drivers.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/entry.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/firmware.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/firmware.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/ftrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/jump_label.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/kgdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/kprobes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/parisc_ksyms.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/parisc_ksyms.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/patch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/patch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/pdt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/pdt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/perf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/perf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/perf_event.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/perf_regs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/perf_regs.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/ptrace.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/sys_parisc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/sys_parisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/syscall.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/syscall.S</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/traps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/unaligned.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/unaligned.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/vdso32/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/vdso32/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/kernel/vdso64/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/vdso64/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/lib/checksum.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/checksum.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/lib/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/io.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/lib/memcpy.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/memcpy.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/math-emu/driver.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/math-emu/driver.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/fault.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/hugetlbpage.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/init.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/parisc/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/ioremap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kconfig</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kconfig.debug</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/Makefile.postlink?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Makefile.postlink</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/dts/microwatt.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/dts/microwatt.dts</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/dts/mpc8315erdb.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/dts/mpc8315erdb.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/install.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/install.sh</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/page.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/rs6000.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/rs6000.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/boot/wrapper?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/wrapper</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/44x/akebono_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/akebono_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/44x/sam440ep_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/sam440ep_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/44x/warp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/warp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/85xx/ge_imp3a_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/85xx/stx_gp3_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/86xx-hw.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/86xx-hw.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/adder875_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/adder875_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/amigaone_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/amigaone_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/cell_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/cell_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/chrp32_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/chrp32_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ep88xc_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ep88xc_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/fsl-emb-nonhw.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/fsl-emb-nonhw.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/g5_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/g5_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/gamecube_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/gamecube_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/linkstation_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/linkstation_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/maple_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/maple_defconfig</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/mpc83xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc83xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/mpc866_ads_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc866_ads_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/mpc885_ads_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc885_ads_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/mvme5100_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mvme5100_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/pasemi_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/pasemi_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/pmac32_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/pmac32_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/powernv_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/powernv_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ppc44x_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc44x_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ppc64_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc64_defconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ppc64e_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc64e_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ppc6xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc6xx_defconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/ps3_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ps3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/skiroot_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/skiroot_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/storcenter_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/storcenter_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/tqm8xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/tqm8xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/configs/wii_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/wii_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/Kconfig</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes-gcm-p10-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes-gcm-p10-glue.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes-gcm-p10.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes-gcm-p10.S</a></td><td class='right'>2421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 21.7%;'/><td class='none' style='width: 61.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes_cbc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_cbc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes_ctr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_ctr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/aes_xts.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_xts.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/chacha-p10-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/chacha-p10-glue.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/chacha-p10le-8x.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/chacha-p10le-8x.S</a></td><td class='right'>842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.5%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crc-vpmsum_test.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc-vpmsum_test.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crc32-vpmsum_core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32-vpmsum_core.S</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crc32c-vpmsum_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32c-vpmsum_asm.S</a></td><td class='right'>842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.5%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crc32c-vpmsum_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32c-vpmsum_glue.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crct10dif-vpmsum_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crct10dif-vpmsum_asm.S</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.6%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/crct10dif-vpmsum_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crct10dif-vpmsum_glue.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/curve25519-ppc64le-core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/curve25519-ppc64le-core.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/curve25519-ppc64le_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/curve25519-ppc64le_asm.S</a></td><td class='right'>671</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/ghash.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/ghash.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/md5-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/md5-asm.S</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/md5-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/md5-glue.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/poly1305-p10-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/poly1305-p10-glue.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/poly1305-p10le_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/poly1305-p10le_64.S</a></td><td class='right'>1075</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 17.3%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha1-powerpc-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-powerpc-asm.S</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha1-spe-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-spe-asm.S</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha1-spe-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-spe-glue.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha1.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha256-spe-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha256-spe-asm.S</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/sha256-spe-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha256-spe-glue.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/crypto/vmx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/vmx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/asm-const.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/asm-const.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/barrier.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/bitops.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/32/kup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/kup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/32/mmu-hash.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/mmu-hash.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/32/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/pgalloc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/32/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/pgtable.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/hash-4k.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash-4k.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/hash-64k.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash-64k.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/hash.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hugetlb.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/kup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/kup.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/mmu-hash.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/mmu-hash.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/mmu.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/pgtable-64k.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pgtable-64k.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pgtable.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/pkeys.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pkeys.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/radix.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/radix.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/book3s/64/slice.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/slice.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/bug.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cache.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cacheflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cacheflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cell-pmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cell-pmu.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cell-regs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cell-regs.h</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/copro.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/copro.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cpu_has_feature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cpu_has_feature.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cpuidle.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cpuidle.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cputable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cputable.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/cputhreads.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cputhreads.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/crash_reserve.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/crash_reserve.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dbell.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dbell.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dcr-generic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-generic.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dcr-mmio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-mmio.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dcr-native.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-native.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dcr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/device.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/device.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/dtl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dtl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/epapr_hcalls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/epapr_hcalls.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/exception-64e.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/exception-64e.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/exception-64s.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/exception-64s.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/extable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/fadump.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/fadump.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/feature-fixups.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/feature-fixups.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/firmware.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/firmware.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/fixmap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/floppy.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/fprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/fprobe.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ftrace.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/guest-state-buffer.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/guest-state-buffer.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/head-64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/head-64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hugetlb.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/hvcall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hvcall.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/hw_irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hw_irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/inst.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/inst.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/interrupt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/interrupt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/io-defs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io-defs.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/io-workarounds.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io-workarounds.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io.h</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/iommu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/iommu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/irqflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/irqflags.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/jump_label.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kasan.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kdump.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kdump.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kexec.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kfence.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kfence.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kgdb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kgdb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kprobes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kup.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_asm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_book3s.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_book3s_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s_64.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_book3s_asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s_asm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_booke_hv_asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_booke_hv_asm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_host.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_ppc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_ppc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/kvm_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_types.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/lv1call.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/lv1call.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/machdep.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/machdep.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mman.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mmu.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/mmzone.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mmzone.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/module.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/module.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/mpc52xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mpc52xx.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/32/kup-8xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/kup-8xx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/32/mmu-44x.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/mmu-44x.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/32/mmu-8xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/mmu-8xx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/32/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/pgtable.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/32/pte-8xx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/pte-8xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/64/pgtable-4k.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/64/pgtable-4k.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/64/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/64/pgtable.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/kup-booke.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/kup-booke.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/mmu-e500.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/mmu-e500.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pgalloc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pgtable.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/nohash/pte-e500.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pte-e500.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/opal-api.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/opal-api.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/opal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/opal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/page_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/page_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/papr-sysparm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/papr-sysparm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/pci-bridge.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pci-bridge.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/perf_event_server.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/perf_event_server.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pgtable.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/pkeys.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pkeys.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/plpar_wrappers.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/plpar_wrappers.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/pmi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pmi.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/pnv-pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pnv-pci.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/ppc-opcode.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ppc-opcode.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/ppc_asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ppc_asm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/preempt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/preempt.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/prom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/prom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ptrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/reg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/reg_booke.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg_booke.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/reg_fsl_emb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg_fsl_emb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/rtas.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/rtas.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/set_memory.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/setup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/simple_spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/simple_spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/smp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/spu_csa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spu_csa.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/spu_priv1.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spu_priv1.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/sstep.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/sstep.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/static_call.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/static_call.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/synch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/synch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/syscall.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/systemcfg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/systemcfg.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/text-patching.h</a> (renamed from arch/powerpc/include/asm/code-patching.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/thread_info.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/time.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/time.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/tlb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/tm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/tm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/topology.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/udbg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/udbg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/unistd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso/arch_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/arch_data.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/getrandom.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/gettimeofday.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/vsyscall.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vdso_datapage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso_datapage.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/vga.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vga.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/xics.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xics.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/xive.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xive.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/asm/xmon.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xmon.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/eeh.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/eeh.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/ioctls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ioctls.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/kvm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/kvm_para.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/kvm_para.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/opal-prd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/opal-prd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/papr-hvpipe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/papr-hvpipe.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/papr-indices.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/papr-indices.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/papr-physical-attestation.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/papr-physical-attestation.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/papr-platform-dump.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/papr-platform-dump.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/ps3fb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ps3fb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ptrace.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/include/uapi/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/asm-offsets.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/crash_dump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/crash_dump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/dma-iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/dma-iommu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/dt_cpu_ftrs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/dt_cpu_ftrs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/eeh.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/eeh_driver.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh_driver.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/eeh_pe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh_pe.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/epapr_paravirt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/epapr_paravirt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/exceptions-64s.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/exceptions-64s.S</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/fadump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/fadump.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/head_8xx.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/head_8xx.S</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/head_booke.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/head_booke.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/idle.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/idle.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/interrupt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/interrupt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/io-workarounds.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/io-workarounds.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/io.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/iommu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/irq.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/jump_label.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kgdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kprobes.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/kvm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kvm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/legacy_serial.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/legacy_serial.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/misc_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/misc_32.S</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/misc_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/misc_64.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/module_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/module_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/module_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/module_64.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/of_platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/of_platform.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/optprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/optprobes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/pci-hotplug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/pci-hotplug.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/pci_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/pci_32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/proc_powerpc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/proc_powerpc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/process.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/prom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/prom_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom_init.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/prom_init_check.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom_init_check.sh</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/ptrace/ptrace-view.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/ptrace/ptrace-view.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/ptrace/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/ptrace/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/rtas.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtas.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/rtas_flash.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtas_flash.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/rtasd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtasd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/secure_boot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/secure_boot.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/security.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/security.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/secvar-sysfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/secvar-sysfs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/setup-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup-common.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/setup_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup_32.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/setup_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup_64.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/smp.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/static_call.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/static_call.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/switch.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/switch.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/sysfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/sysfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/time.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/trace/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/trace/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/trace/ftrace_64_pg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace_64_pg.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/trace/ftrace_entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace_entry.S</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/traps.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/udbg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/udbg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/udbg_16550.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/udbg_16550.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/cacheflush.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/cacheflush.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/datapage.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/datapage.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/getrandom.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/getrandom.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/gettimeofday.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/gettimeofday.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/vdso32.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vdso32.lds.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/vdso64.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vdso64.lds.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/vgetrandom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vgetrandom.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso/vgettimeofday.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vgettimeofday.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso32_wrapper.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso32_wrapper.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vdso64_wrapper.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso64_wrapper.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vmlinux.lds.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kernel/watchdog.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/watchdog.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kexec/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/core.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kexec/core_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/core_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kexec/crash.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/crash.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kexec/file_load_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/file_load_64.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kexec/relocate_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/relocate_32.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_32_mmu_host.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_32_mmu_host.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_64_mmu_host.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_host.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_64_mmu_hv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_64_mmu_radix.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_radix.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_64_vio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_vio.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_hv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_hv_nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_nested.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_hv_nestedv2.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_hv_rmhandlers.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_hv_uvmem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_uvmem.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_mmu_hpte.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_mmu_hpte.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_pr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_pr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_xive.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_xive.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/book3s_xive_native.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_xive_native.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/booke.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/booke.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/e500.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/e500.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/e500_mmu_host.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/e500_mmu_host.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/guest-state-buffer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/guest-state-buffer.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/powerpc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/powerpc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/test-guest-state-buffer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/test-guest-state-buffer.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/timing.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/timing.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/trace_book3s.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/trace_book3s.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/kvm/trace_hv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/trace_hv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/code-patching.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/code-patching.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/feature-fixups.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/feature-fixups.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/qspinlock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/qspinlock.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/sstep.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/sstep.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/test-code-patching.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/test-code-patching.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/test_emulate_step.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/test_emulate_step.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/lib/vmx-helper.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/vmx-helper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s32/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s32/mmu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/hash_hugepage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_hugepage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/hash_native.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_native.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/hash_pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_pgtable.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/hash_utils.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_utils.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hugetlbpage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/mmu_context.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/mmu_context.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/pgtable.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/radix_pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/radix_pgtable.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/slb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/slb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/book3s64/slice.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/slice.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/copro_fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/copro_fault.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/fault.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/hugetlbpage.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/init-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/init-common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/init_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/init_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ioremap.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ioremap_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ioremap_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/kasan/init_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/kasan/init_book3e_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_book3e_64.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/kasan/init_book3s_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_book3s_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/mem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/mem.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/44x.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/44x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/8xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/8xx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/book3e_pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/book3e_pgtable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/kaslr_booke.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/kaslr_booke.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/mmu_context.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/mmu_context.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/tlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/nohash/tlb_64e.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/tlb_64e.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/numa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/numa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/pgtable-frag.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable-frag.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/pgtable_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable_32.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ptdump/8xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/8xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ptdump/book3s64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/book3s64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ptdump/ptdump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/ptdump.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ptdump/ptdump.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/ptdump.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/mm/ptdump/shared.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/shared.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/net/bpf_jit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/net/bpf_jit_comp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp.c</a></td><td class='right'>864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/net/bpf_jit_comp32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp32.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/net/bpf_jit_comp64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp64.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/8xx-pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/8xx-pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/callchain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/callchain_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/callchain_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/core-book3s.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/core-book3s.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/core-fsl-emb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/core-fsl-emb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/hv-24x7.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/hv-24x7.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/isa207-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/isa207-common.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/kvm-hv-pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/kvm-hv-pmu.c</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/vpa-dtl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/vpa-dtl.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/perf/vpa-pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/vpa-pmu.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/44x/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/44x/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/gpio.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/44x/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/pci.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/44x/uic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/uic.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/512x/mpc512x_lpbfifo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/52xx/efika.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/efika.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/52xx/media5200.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/media5200.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/52xx/mpc52xx_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/82xx/ep8248e.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/82xx/ep8248e.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/82xx/km82xx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/82xx/km82xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/85xx/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/85xx/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/86xx/mpc86xx_smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/86xx/mpc86xx_smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/8xx/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/8xx/cpm1-ic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/cpm1-ic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/8xx/cpm1.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/cpm1.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/8xx/pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/pic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/Kconfig.cputype?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Kconfig.cputype</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/amigaone/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/amigaone/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/book3s/vas-api.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/book3s/vas-api.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/Kconfig</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/axon_msi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/axon_msi.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/cbe_powerbutton.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_powerbutton.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/cbe_regs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_regs.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/cbe_thermal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_thermal.c</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/cell.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cell.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/cpufreq_spudemand.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cpufreq_spudemand.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/interrupt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/interrupt.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/interrupt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/interrupt.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/iommu.c</a></td><td class='right'>1077</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 17.3%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/pervasive.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pervasive.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/pervasive.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pervasive.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pmu.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/ras.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/ras.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/ras.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/ras.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/setup.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/smp.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spider-pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spider-pci.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spider-pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spider-pic.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spu_base.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spu_manage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_manage.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spu_priv1_mmio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_priv1_mmio.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spu_priv1_mmio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_priv1_mmio.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spu_syscalls.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_syscalls.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/coredump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/coredump.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/gang.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/gang.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/inode.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/inode.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/sched.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/sched.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/spufs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/spufs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/cell/spufs/syscalls.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/syscalls.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/chrp/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/chrp/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/embedded6xx/flipper-pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/embedded6xx/linkstation.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/linkstation.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/embedded6xx/mvme5100.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/mvme5100.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/maple.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/maple.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/pci.c</a></td><td class='right'>672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/setup.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/maple/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/time.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/microwatt/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/microwatt/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/microwatt/microwatt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/microwatt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/microwatt/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/setup.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/microwatt/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/smp.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pasemi/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pasemi/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/backlight.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/backlight.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/low_i2c.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/low_i2c.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/nvram.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/nvram.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/pic.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/smp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powermac/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/time.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/idle.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/idle.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/memtrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/memtrace.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/ocxl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/ocxl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-core.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-dump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-dump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-elog.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-elog.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-flash.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-flash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-irqchip.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal-msglog.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-msglog.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/opal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/pci-cxl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci-cxl.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/pci-ioda.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci-ioda.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/smp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/subcore.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/subcore.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/powernv/ultravisor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/ultravisor.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/device-init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/device-init.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/interrupt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/interrupt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/repository.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/repository.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/setup.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/spu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/spu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/ps3/system-bus.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/system-bus.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/cmm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/cmm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/dlpar.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/dlpar.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/dtl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/dtl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/eeh_pseries.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/eeh_pseries.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/hotplug-cpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/hotplug-cpu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/htmdump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/htmdump.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/iommu.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/lpar.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/lpar.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/lparcfg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/lparcfg.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/mobility.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/mobility.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/msi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/msi.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-hvpipe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-hvpipe.c</a></td><td class='right'>818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-hvpipe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-hvpipe.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-indices.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-indices.c</a></td><td class='right'>488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-phy-attest.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-phy-attest.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-platform-dump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-platform-dump.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-rtas-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-rtas-common.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-rtas-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-rtas-common.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr-vpd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-vpd.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/papr_scm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr_scm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/pci_dlpar.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/pci_dlpar.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/plpks-secvar.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/plpks-secvar.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/plpks.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/plpks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/platforms/pseries/svm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/svm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/cpm2_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/cpm2_pic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/cpm_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/cpm_common.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/dcr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/dcr.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/ehv_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ehv_pic.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/fsl_msi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/fsl_msi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/ge/ge_pic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ge/ge_pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/i8259.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/i8259.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/ipic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ipic.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/mpic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/mpic.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/msi_bitmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/msi_bitmap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/pmi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/pmi.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/tsi108_pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/tsi108_pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/xics/icp-native.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xics/icp-native.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/xics/xics-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xics/xics-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/xive/common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xive/common.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/sysdev/xive/spapr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xive/spapr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/powerpc/tools/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/tools/.gitignore</a> (renamed from arch/x86/boot/tools/.gitignore)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/tools/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/tools/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/tools/ftrace-gen-ool-stubs.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/tools/ftrace-gen-ool-stubs.sh</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/powerpc/tools/ftrace_check.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/tools/ftrace_check.sh</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/ppc-opc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/ppc-opc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/spu-dis.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-dis.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/spu-insns.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-insns.h</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/spu-opc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-opc.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/spu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/xmon.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/xmon.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/powerpc/xmon/xmon_bpts.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/xmon_bpts.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Kconfig.errata?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.errata</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Kconfig.socs?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.socs</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Kconfig.vendor?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.vendor</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Makefile</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/Makefile.postlink?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Makefile.postlink</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/andes/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/andes/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/andes/qilai-voyager.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/andes/qilai-voyager.dts</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/andes/qilai.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/andes/qilai.dtsi</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/eswin/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/eswin/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/eswin/eic7700.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/eswin/eic7700.dtsi</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv180x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv180x.dtsi</a> (renamed from arch/riscv/boot/dts/sophgo/cv18xx.dtsi)</td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv181x.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv181x.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/cv18xx-reset.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv18xx-reset.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2002.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2002.dtsi</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2042.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042.dtsi</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi</a></td><td class='right'>3157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 50.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 49.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2044-reset.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2044-reset.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/sophgo/sg2044.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2044.dtsi</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/spacemit/k1.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/spacemit/k1.dtsi</a></td><td class='right'>870</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-common.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-common.dtsi</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-pinfunc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/starfive/jh7110.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/boot/dts/thead/th1520.dtsi?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520.dtsi</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/configs/defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/defconfig</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/configs/nommu_k210_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/nommu_k210_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/chacha-riscv64-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/chacha-riscv64-glue.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/chacha-riscv64-zvkb.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/chacha-riscv64-zvkb.S</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/ghash-riscv64-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/ghash-riscv64-glue.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sha256-riscv64-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha256-riscv64-glue.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sha512-riscv64-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha512-riscv64-glue.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sm3-riscv64-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sm3-riscv64-glue.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/andes/errata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/andes/errata.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/mips/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/mips/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/mips/errata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/mips/errata.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/sifive/errata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/sifive/errata.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/errata/thead/errata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/thead/errata.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/Kbuild</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/alternative-macros.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/alternative-macros.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/alternative.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/alternative.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/arch_hweight.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/arch_hweight.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/asm-extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm-extable.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/asm-prototypes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm-prototypes.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/assembler.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/assembler.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/barrier.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/bitops.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/bug.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/bugs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/bugs.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cache.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cacheflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cacheflush.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cfi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cfi.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/checksum.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/checksum.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cmpxchg.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/compat.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/compat.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cpu_ops_sbi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cpu_ops_sbi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cpufeature-macros.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cpufeature-macros.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/cpufeature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cpufeature.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/csr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/csr.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/current.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/entry-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/entry-common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/errata_list.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/errata_list.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/errata_list_vendors.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/errata_list_vendors.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/ftrace.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/futex.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/futex.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/gpr-num.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/gpr-num.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/hugetlb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/hwcap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/hwcap.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/hwprobe.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/image.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/image.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/insn-def.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/insn-def.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/insn.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/io.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/irq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/jump_label.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kasan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kexec.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kfence.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kfence.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kgdb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kgdb.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_aia.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_aia.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_gstage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_gstage.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_host.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_mmu.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_nacl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_nacl.h</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_tlb.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_vcpu_pmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_vcpu_pmu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_vcpu_sbi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_vcpu_sbi.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_vcpu_vector.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_vcpu_vector.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/kvm_vmid.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/kvm_vmid.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/mmu.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/mmu_context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/mmu_context.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/page.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/perf_event.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/pgalloc.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/pgtable-64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/pgtable-64.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/pgtable-bits.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/pgtable-bits.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/pgtable.h</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/processor.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/ptrace.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/runtime-const.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/runtime-const.h</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/sbi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/sbi.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/scs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/scs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/set_memory.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/spinlock.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/spinlock.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/suspend.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/suspend.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/swab.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/swab.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/switch_to.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/switch_to.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/syscall.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/text-patching.h</a> (renamed from arch/riscv/include/asm/patch.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/thread_info.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/tlb.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/tlbflush.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/uaccess.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/uprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/uprobes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso/arch_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso/arch_data.h</a> (renamed from arch/riscv/include/asm/vdso/data.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso/getrandom.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso/gettimeofday.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso/processor.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vdso/vsyscall.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vector.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vector.h</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/mips.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/mips.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/mips_hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/mips_hwprobe.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/sifive.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/sifive.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/thead.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/thead.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/asm/vendorid_list.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/vendorid_list.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/hwprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/hwprobe.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/kvm.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/sigcontext.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/sigcontext.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/vendor/mips.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/vendor/mips.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/vendor/sifive.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/vendor/sifive.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/include/uapi/asm/vendor/thead.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/uapi/asm/vendor/thead.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/acpi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/acpi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/alternative.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/alternative.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/asm-offsets.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/bugs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/bugs.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/cacheinfo.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/cfi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/cfi.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/copy-unaligned.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/copy-unaligned.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/cpu-hotplug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/cpu-hotplug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/cpu_ops_sbi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/cpu_ops_sbi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/cpufeature.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/cpufeature.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/efi-header.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/efi-header.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/elf_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/elf_kexec.c</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/entry.S</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/fpu.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/fpu.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/ftrace.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/head.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/irq.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/jump_label.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/kernel_mode_vector.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/kernel_mode_vector.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/kexec_elf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/kexec_elf.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/kexec_image.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/kexec_image.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/kgdb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/machine_kexec.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/machine_kexec_file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/machine_kexec_file.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/mcount-dyn.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/mcount-dyn.S</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/mcount.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/mcount.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/module-sections.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/module-sections.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/module.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/patch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/patch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/perf_callchain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/perf_callchain.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/pi/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/pi/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/pi/cmdline_early.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/pi/cmdline_early.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/pi/fdt_early.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/pi/fdt_early.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/pi/pi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/pi/pi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/probes/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/probes/kprobes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/probes/simulate-insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/probes/simulate-insn.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/probes/uprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/probes/uprobes.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/process.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/ptrace.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/sbi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/sbi.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/setup.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/signal.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/smp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/smpboot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/smpboot.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/stacktrace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/suspend.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/suspend.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/sys_hwprobe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/sys_hwprobe.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/sys_riscv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/sys_riscv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/Kconfig.debug</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/kprobes/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/kprobes/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/kprobes/test-kprobes-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/kprobes/test-kprobes-asm.S</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/kprobes/test-kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/kprobes/test-kprobes.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/tests/kprobes/test-kprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/tests/kprobes/test-kprobes.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/traps.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/traps_misaligned.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/traps_misaligned.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/unaligned_access_speed.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/unaligned_access_speed.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso/Makefile</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso/getrandom.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso/getrandom.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso/hwprobe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso/hwprobe.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso/vdso.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso/vdso.lds.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vdso/vgetrandom-chacha.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vdso/vgetrandom-chacha.S</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vec-copy-unaligned.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vec-copy-unaligned.S</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vector.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vector.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/mips.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/mips.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/mips_hwprobe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/mips_hwprobe.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/sifive.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/sifive.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/thead.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/thead.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vendor_extensions/thead_hwprobe.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kernel/vmlinux.lds.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/aia.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/aia.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/aia_aplic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/aia_aplic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/aia_device.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/aia_device.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/aia_imsic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/aia_imsic.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/gstage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/gstage.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/main.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/mmu.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/nacl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/nacl.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/tlb.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_exit.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_exit.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_insn.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_onereg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_onereg.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_pmu.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_fwft.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_fwft.c</a></td><td class='right'>544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_hsm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_hsm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_replace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_replace.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_sta.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_sta.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_system.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_system.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_sbi_v01.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_sbi_v01.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_switch.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_switch.S</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_timer.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_timer.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vcpu_vector.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vcpu_vector.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vm.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/kvm/vmid.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/kvm/vmid.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/crc32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/crc32.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/csum.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/csum.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/riscv_v_helpers.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/riscv_v_helpers.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/strcmp.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/strcmp.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/strlen.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/strlen.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/strncmp.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/strncmp.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/uaccess.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/uaccess.S</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/lib/uaccess_vector.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/lib/uaccess_vector.S</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/cacheflush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/cacheflush.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/context.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/context.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/fault.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/hugetlbpage.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/init.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/kasan_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/kasan_init.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/pageattr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/pageattr.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/pgtable.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/physaddr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/physaddr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/ptdump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/ptdump.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/mm/tlbflush.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/mm/tlbflush.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/net/bpf_jit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/net/bpf_jit.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/net/bpf_jit_comp64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/net/bpf_jit_comp64.c</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/net/bpf_jit_core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/net/bpf_jit_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/purgatory/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/purgatory/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/purgatory/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/purgatory/entry.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/purgatory/purgatory.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/purgatory/purgatory.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/riscv/tools/relocs_check.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/tools/relocs_check.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/Kconfig</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/Kconfig.debug</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/Makefile.postlink?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/Makefile.postlink</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/appldata/appldata_base.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/appldata/appldata_base.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/als.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/als.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/alternative.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/alternative.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/boot.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/boot.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/decompressor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/decompressor.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/head.S</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/ipl_data.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/ipl_data.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/ipl_parm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/ipl_parm.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/ipl_report.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/ipl_report.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/kaslr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/kaslr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/pgm_check.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/pgm_check.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/pgm_check_info.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/pgm_check_info.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/physmem_info.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/physmem_info.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/printk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/printk.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/startup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/startup.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/string.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/string.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/trampoline.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/trampoline.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/vmem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/vmem.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/boot/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/boot/vmlinux.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/configs/debug_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/configs/debug_defconfig</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/configs/defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/configs/defconfig</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/configs/kasan.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/configs/kasan.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/configs/mmtypes.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/configs/mmtypes.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/configs/zfcpdump_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/configs/zfcpdump_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/Kconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/aes_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/aes_s390.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/arch_random.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/arch_random.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/chacha-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/chacha-glue.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/chacha-s390.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/chacha-s390.S</a></td><td class='right'>908</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.6%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/chacha-s390.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/chacha-s390.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/crc32-vx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/crc32-vx.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/crc32-vx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/crc32-vx.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/crc32be-vx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/crc32be-vx.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/crc32le-vx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/crc32le-vx.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/ghash_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/ghash_s390.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/hmac_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/hmac_s390.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/paes_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/paes_s390.c</a></td><td class='right'>1815</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.5%;'/><td class='rem' style='width: 8.7%;'/><td class='none' style='width: 70.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/phmac_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/phmac_s390.c</a></td><td class='right'>1048</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha1_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha1_s390.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha256_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha256_s390.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha3_256_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha3_256_s390.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha3_512_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha3_512_s390.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha512_s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha512_s390.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/crypto/sha_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/crypto/sha_common.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_dbfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_dbfs.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_diag.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_diag.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_diag0c.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_diag0c.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_diag_fs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_diag_fs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_sprp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_sprp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/hypfs_vm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/hypfs_vm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/hypfs/inode.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/hypfs/inode.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/abs_lowcore.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/abs_lowcore.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/alternative.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/alternative.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/ap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/ap.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/appldata.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/appldata.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/asce.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/asce.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/asm-const.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/asm-const.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/asm-extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/asm-extable.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/asm.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/atomic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/atomic.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/atomic_ops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/atomic_ops.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/barrier.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/bitops.h</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/boot_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/boot_data.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/checksum.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/checksum.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cmpxchg.h</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cpacf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cpacf.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cpu_mf-insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cpu_mf-insn.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cpu_mf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cpu_mf.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/cpufeature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/cpufeature.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/css_chars.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/css_chars.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/ctlreg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/ctlreg.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/current.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/debug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/debug.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/diag.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/diag.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/diag288.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/diag288.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/dwarf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/dwarf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/ebcdic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/ebcdic.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/elf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/elf.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/entry-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/entry-common.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/extmem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/extmem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/fprobe.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/fprobe.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/fpu-insn-asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/fpu-insn-asm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/fpu-insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/fpu-insn.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/fpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/fpu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/ftrace.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/futex.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/futex.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/gmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/gmap.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/gmap_helpers.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/gmap_helpers.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/hugetlb.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/io.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/irq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/kfence.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/kfence.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/kvm_host.h</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/kvm_host_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/kvm_host_types.h</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/kvm_para.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/kvm_para.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/lowcore.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/lowcore.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/machine.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/machine.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/march.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/march.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/mem_encrypt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/mem_encrypt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/mmu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/mmu_context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/mmu_context.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/nmi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/nmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/nospec-branch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/nospec-branch.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/nospec-insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/nospec-insn.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/page-states.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/page-states.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/page.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pai.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pai.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pci.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pci_clp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pci_clp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pci_dma.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pci_dma.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pci_insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pci_insn.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/percpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/percpu.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/perf_event.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pgalloc.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pgtable.h</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/physmem_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/physmem_info.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/pkey.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/pkey.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/preempt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/preempt.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/processor.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/ptrace.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/purgatory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/purgatory.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/rwonce.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/rwonce.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/sclp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/sclp.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/set_memory.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/setup.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/sigp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/sigp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/skey.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/skey.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/smp.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/sparsemem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/sparsemem.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/spinlock.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/spinlock.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/stacktrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/stacktrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/stp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/stp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/string.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/string.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/syscall.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/sysinfo.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/sysinfo.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/thread_info.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/timex.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/timex.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/tlb.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/tlbflush.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/topology.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/tpi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/tpi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/uaccess.h</a></td><td class='right'>730</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/uv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/uv.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso/data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso/data.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso/getrandom.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso/gettimeofday.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso/time_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso/time_data.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/vdso/vsyscall.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/asm/word-at-a-time.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/asm/word-at-a-time.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/include/uapi/asm/diag.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/uapi/asm/diag.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/uapi/asm/kvm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/uapi/asm/ptrace.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/uapi/asm/schid.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/uapi/asm/schid.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/include/uapi/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/include/uapi/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/abs_lowcore.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/abs_lowcore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/alternative.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/alternative.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/asm-offsets.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/cert_store.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/cert_store.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/cpacf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/cpacf.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/cpcmd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/cpcmd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/cpufeature.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/cpufeature.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/crash_dump.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/crash_dump.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/ctlreg.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/ctlreg.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/debug.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/diag.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/diag.c</a> (renamed from arch/s390/kernel/diag.c)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/diag310.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/diag310.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/diag324.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/diag324.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/diag_ioctl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/diag_ioctl.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/diag/diag_misc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/diag/diag_misc.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/dis.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/dis.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/dumpstack.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/dumpstack.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/early.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/early.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/entry.S</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/entry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/entry.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/facility.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/facility.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/fpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/fpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/ftrace.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/guarded_storage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/guarded_storage.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/head64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/head64.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/hiperdispatch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/hiperdispatch.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/ipl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/ipl.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/irq.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/kexec_elf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/kexec_elf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/kexec_image.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/kexec_image.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/kprobes.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/lgr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/lgr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/machine_kexec.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/machine_kexec_file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/machine_kexec_file.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/mcount.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/mcount.S</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/nmi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/nmi.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/numa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/numa.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/os_info.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/os_info.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_cpum_cf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_cpum_cf.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_cpum_cf_events.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_cpum_cf_events.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_cpum_sf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_cpum_sf.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_event.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_pai_crypto.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_pai_crypto.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/perf_pai_ext.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/perf_pai_ext.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/process.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/processor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/processor.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/ptrace.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/setup.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/skey.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/skey.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/smp.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/stacktrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/stacktrace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/sthyi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/sthyi.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/syscall.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/syscall.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/syscalls/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/syscalls/Makefile</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/sysinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/sysinfo.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/text_amode31.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/text_amode31.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/time.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/topology.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/topology.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/traps.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/unwind_bc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/unwind_bc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/uv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/uv.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vdso.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vdso.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vdso32/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vdso32/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vdso32/vdso32.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vdso32/vdso32.lds.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vdso64/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vdso64/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vdso64/vdso64.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vdso64/vdso64.lds.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vmcore_info.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vmcore_info.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kernel/vmlinux.lds.S</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/diag.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/diag.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/gaccess.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/gaccess.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/gaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/gaccess.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/gmap-vsie.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/gmap-vsie.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/intercept.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/intercept.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/interrupt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/interrupt.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/kvm-s390.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/kvm-s390.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/kvm-s390.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/kvm-s390.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/pci.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/priv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/priv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/pv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/pv.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/trace-s390.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/trace-s390.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/kvm/vsie.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/kvm/vsie.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/delay.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/delay.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/mem.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/mem.S</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/spinlock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/spinlock.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/string.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/string.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/test_unwind.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/test_unwind.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/uaccess.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/uaccess.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/lib/xor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/lib/xor.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/cmm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/cmm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/dump_pagetables.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/dump_pagetables.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/extable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/extable.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/extmem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/extmem.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/fault.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/gmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/gmap.c</a></td><td class='right'>870</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 11.7%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/gmap_helpers.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/gmap_helpers.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/hugetlbpage.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/init.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/maccess.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/maccess.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/mmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/mmap.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/pageattr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/pageattr.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/pfault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/pfault.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/pgalloc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/pgalloc.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/pgtable.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/mm/vmem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/mm/vmem.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/net/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/s390/net/bpf_jit.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/net/bpf_jit.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/net/bpf_jit_comp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/net/bpf_jit_comp.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/net/bpf_timed_may_goto.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/net/bpf_timed_may_goto.S</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/net/pnet.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/net/pnet.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_bus.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_bus.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_bus.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_bus.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_clp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_clp.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_debug.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_event.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_fixup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_fixup.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_insn.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_iov.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_iov.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_iov.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_iov.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_kvm_hook.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_kvm_hook.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_mmio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_mmio.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_report.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_report.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_report.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_report.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/pci/pci_sysfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/pci/pci_sysfs.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/purgatory/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/purgatory/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/purgatory/purgatory.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/purgatory/purgatory.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/tools/gen_facilities.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/tools/gen_facilities.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/s390/tools/gen_opcode_table.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/s390/tools/gen_opcode_table.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-ecovec24/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-ecovec24/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-landisk/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-landisk/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-lboxre2/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-lboxre2/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-se/7343/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-se/7343/irq.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-se/7722/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-se/7722/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-sh03/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-sh03/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boards/mach-x3proto/gpio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boards/mach-x3proto/gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boot/compressed/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boot/compressed/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/boot/romimage/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/boot/romimage/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/ap325rxa_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/ap325rxa_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/ecovec24_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/ecovec24_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/edosk7705_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/edosk7705_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/espt_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/espt_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/hp6xx_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/hp6xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/kfr2r09-romimage_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/kfr2r09-romimage_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/landisk_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/landisk_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/lboxre2_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/lboxre2_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/magicpanelr2_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/magicpanelr2_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/migor_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/migor_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/r7780mp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/r7780mp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/r7785rp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/r7785rp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/rts7751r2d1_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/rts7751r2d1_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/rts7751r2dplus_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/rts7751r2dplus_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sdk7780_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sdk7780_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/se7206_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/se7206_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/se7712_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/se7712_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/se7721_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/se7721_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/se7724_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/se7724_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh03_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh03_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh2007_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh2007_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh7710voipgw_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh7710voipgw_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh7724_generic_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh7724_generic_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh7763rdp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh7763rdp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/sh7770_generic_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/sh7770_generic_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/configs/titan_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/configs/titan_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/drivers/heartbeat.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/drivers/heartbeat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/drivers/pci/common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/drivers/pci/common.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/drivers/push-switch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/drivers/push-switch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/bitops.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/cache.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/cache.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/dwarf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/dwarf.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/fpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/fpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/ftrace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/hugetlb.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/io.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/page.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/pgalloc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/pgtable.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/pgtable_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/pgtable_32.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/smc37c93x.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/smc37c93x.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/suspend.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/suspend.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/syscall_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/syscall_32.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/thread_info.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/tlb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sh/include/asm/vga.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/asm/vga.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/mach-common/mach/romimage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/mach-common/mach/romimage.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/mach-ecovec24/mach/romimage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/mach-ecovec24/mach/romimage.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/include/mach-kfr2r09/mach/romimage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/include/mach-kfr2r09/mach/romimage.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/cpu/proc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/cpu/proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/iomap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/iomap.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/ioport.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/ioport.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/kprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/kprobes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/machine_kexec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/machine_kexec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/process_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/process_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/ptrace_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/ptrace_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/vmlinux.lds.S</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/kernel/vsyscall/vsyscall.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/kernel/vsyscall/vsyscall.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/lib/io.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/lib/io.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/cache-sh4.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/cache-sh4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/cache-sh7705.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/cache-sh7705.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/cache.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/init.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/ioremap.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sh/mm/kmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sh/mm/kmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/configs/sparc32_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/configs/sparc32_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/configs/sparc64_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/configs/sparc64_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/Kconfig</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/aes_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/aes_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/aes_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/aes_glue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/camellia_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/camellia_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/camellia_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/camellia_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/crc32c_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/crc32c_asm.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/crc32c_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/crc32c_glue.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/des_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/des_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/des_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/des_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/md5_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/md5_asm.S</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/md5_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/md5_glue.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha1_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha1_asm.S</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha1_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha1_glue.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha256_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha256_asm.S</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha256_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha256_glue.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha512_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha512_asm.S</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/crypto/sha512_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/crypto/sha512_glue.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/adi_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/adi_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/auxio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/auxio.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/auxio_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/auxio_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/auxio_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/auxio_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/bitops_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/bitops_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/cacheflush_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/cacheflush_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/cpudata.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/cpudata.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/cpudata_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/cpudata_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/delay_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/delay_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/elf_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/elf_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/floppy_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/floppy_32.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/floppy_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/floppy_64.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/ftrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/hugetlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/hugetlb.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/hvtramp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/hvtramp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/hypervisor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/hypervisor.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/io_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/io_64.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/irqflags_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/irqflags_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/irqflags_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/irqflags_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/kdebug_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/kdebug_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/leon.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/leon.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/leon_amba.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/leon_amba.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/mman.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/mmu_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/mmu_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/mmu_context_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/mmu_context_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/mmu_context_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/mmu_context_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/mxcc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/mxcc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/obio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/obio.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/opcodes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/opcodes.h</a> (renamed from arch/sparc/crypto/opcodes.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/openprom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/openprom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/page.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/page_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/page_32.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/page_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/page_64.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/parport_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/parport_64.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/pcic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/pcic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/pgtable_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/pgtable_32.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/pgtable_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/pgtable_64.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/pgtsrmmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/pgtsrmmu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/processor_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/processor_64.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/psr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/psr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/ptrace.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/ross.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/ross.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/sbi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/sbi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/sigcontext.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/sigcontext.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/signal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/smp_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/smp_32.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/smp_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/smp_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/spinlock_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/spinlock_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/spinlock_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/spinlock_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/spitfire.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/spitfire.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/starfire.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/starfire.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/syscall.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/thread_info_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/thread_info_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/thread_info_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/thread_info_64.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/tlb_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/tlb_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/trap_block.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/trap_block.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/traps.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/tsb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/tsb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/ttable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/ttable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/turbosparc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/turbosparc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/upa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/upa.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/vaddrs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/vaddrs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/vga.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/vga.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/video.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/video.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/viking.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/viking.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/asm/visasm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/asm/visasm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/uapi/asm/ptrace.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/uapi/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/uapi/asm/signal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/uapi/asm/socket.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/uapi/asm/socket.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/uapi/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/uapi/asm/traps.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/include/uapi/asm/utrap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/include/uapi/asm/utrap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/adi_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/adi_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/apc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/apc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/chmc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/chmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/ds.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/ds.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/irq_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/irq_32.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/irq_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/irq_64.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/led.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/led.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/leon_pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/leon_pci.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/module.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/of_device_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/of_device_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/of_device_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/of_device_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/pci.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/pci_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/pci_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/pcic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/pcic.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/process_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/process_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/process_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/process_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/prom_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/prom_32.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/prom_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/prom_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/prom_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/prom_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/ptrace_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/ptrace_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/ptrace_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/ptrace_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/setup.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/smp_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/smp_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/sys_sparc_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/sys_sparc_32.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/sys_sparc_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/sys_sparc_64.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/time_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/time_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/time_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/time_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/vio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/vio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/viohs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/viohs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/kernel/vmlinux.lds.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/M7memcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/M7memcpy.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/Memcpy_utils.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/Memcpy_utils.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/NG4memcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/NG4memcpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/NGmemcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/NGmemcpy.S</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/U1memcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/U1memcpy.S</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/lib/U3memcpy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/lib/U3memcpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/hugetlbpage.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/init_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/init_32.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/init_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/init_64.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/srmmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/srmmu.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/mm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/mm/tlb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/prom/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/prom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/prom/tree_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/prom/tree_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/vdso/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/sparc/vdso/checkundef.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/vdso/checkundef.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/sparc/vdso/vclock_gettime.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/sparc/vdso/vclock_gettime.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/Makefile-skas?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/Makefile-skas</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/configs/i386_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/configs/i386_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/configs/x86_64_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/configs/x86_64_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/Kconfig</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/chan_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/chan_kern.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/chan_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/chan_user.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/daemon.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/daemon.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/daemon_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/daemon_kern.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/daemon_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/daemon_user.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/hostaudio_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/hostaudio_kern.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/net_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/net_kern.c</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.3%;'/><td class='none' style='width: 85.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/net_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/net_user.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/random.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/random.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/rtc_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/rtc_kern.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/rtc_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/rtc_user.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slip.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slip.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slip_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slip_common.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slip_common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slip_common.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slip_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slip_kern.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slip_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slip_user.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slirp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slirp.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slirp_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slirp_kern.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/slirp_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/slirp_user.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/ssl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/ssl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/ubd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/ubd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/ubd_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/ubd_kern.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/ubd_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/ubd_user.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/umcast.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/umcast.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/umcast_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/umcast_kern.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/umcast_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/umcast_user.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vde.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vde.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vde_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vde_kern.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vde_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vde_user.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vector_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vector_kern.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vfio_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vfio_kern.c</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vfio_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vfio_user.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vfio_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vfio_user.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/vhost_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/vhost_user.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/virt-pci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/virt-pci.c</a></td><td class='right'>745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 9.8%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/virt-pci.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/virt-pci.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/virtio_pcidev.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/virtio_pcidev.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/virtio_uml.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/virtio_uml.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/drivers/xterm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/drivers/xterm.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/asm-prototypes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/asm-prototypes.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/cpufeature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/cpufeature.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/current.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/fixmap.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/fpu/api.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/fpu/api.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/irq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/kasan.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/mmu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/mmu_context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/mmu_context.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/page.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/pgalloc.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/pgtable-2level.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/pgtable-2level.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/pgtable-4level.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/pgtable-4level.h</a> (renamed from arch/um/include/asm/pgtable-3level.h)</td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/pgtable.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/processor-generic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/processor-generic.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/ptrace-generic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/ptrace-generic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/syscall-generic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/syscall-generic.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/thread_info.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/tlbflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/asm/uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/asm/uaccess.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/linux/time-internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/linux/time-internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/arch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/arch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/as-layout.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/as-layout.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/common-offsets.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/common-offsets.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/irq_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/irq_user.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/kern_util.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/kern_util.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/mem_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/mem_user.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/net_kern.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/net_kern.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/net_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/net_user.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/os.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/os.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/registers.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/registers.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/sigio.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/sigio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/skas/mm_id.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/skas/mm_id.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/skas/skas.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/skas/skas.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/skas/stub-data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/skas/stub-data.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/timetravel.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/timetravel.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/include/shared/user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/include/shared/user.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/asm-offsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/dtb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/dtb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/dyn.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/dyn.lds.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/exec.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/exec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/initrd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/initrd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/ioport.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/ioport.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/irq.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/load_file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/load_file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/maccess.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/maccess.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/mem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/mem.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/physmem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/physmem.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/process.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/ptrace.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/sigio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/sigio.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/Makefile</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/mmu.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/process.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/stub.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/stub.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/stub_exe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/stub_exe.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/stub_exe_embed.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/stub_exe_embed.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/skas/syscall.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/skas/syscall.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/sysrq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/sysrq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/time.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/time.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/tlb.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/trap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/trap.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/um_arch.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/um_arch.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/kernel/uml.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/kernel/uml.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/etap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/etap.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/ethertap_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/ethertap_kern.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/ethertap_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/ethertap_user.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/tuntap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/tuntap.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/tuntap_kern.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/tuntap_kern.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/drivers/tuntap_user.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/drivers/tuntap_user.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/file.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/file.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/helper.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/helper.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/main.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/mem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/mem.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/process.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/registers.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/registers.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/sigio.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/sigio.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/signal.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/skas/mem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/skas/mem.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/skas/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/skas/process.c</a></td><td class='right'>698</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/start_up.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/start_up.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/umid.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/umid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/um/os-Linux/util.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/um/os-Linux/util.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kbuild</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kconfig</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Kconfig.assembler?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kconfig.assembler</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Kconfig.cpu?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kconfig.cpu</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/Kconfig.cpufeatures?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kconfig.cpufeatures</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Kconfig.debug?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Kconfig.debug</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Makefile</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/Makefile.postlink?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Makefile.postlink</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Makefile.um?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Makefile.um</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/Makefile_32.cpu?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/Makefile_32.cpu</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/bioscall.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/bioscall.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/bitops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/boot.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/boot.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/efi_mixed.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/efi_mixed.S</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/head_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/head_64.S</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/kaslr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/kaslr.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/mem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/mem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/misc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/misc.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/misc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/misc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/pgtable.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/pgtable_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/pgtable_64.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/sbat.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/sbat.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/sev-handle-vc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/sev-handle-vc.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/sev.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/sev.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/sev.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/sev.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/string.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/string.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/compressed/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/compressed/vmlinux.lds.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/copy.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/copy.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/cpucheck.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/cpucheck.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/cpuflags.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/cpuflags.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/cpuflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/cpuflags.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/genimage.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/genimage.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/header.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/header.S</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/mkcpustr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/mkcpustr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/setup.ld?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/setup.ld</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/Makefile</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/efi-mixed.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/efi-mixed.S</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/exports.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/exports.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/gdt_idt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/gdt_idt.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/la57toggle.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/la57toggle.S</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/map_kernel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/map_kernel.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/sev-shared.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/sev-shared.c</a></td><td class='right'>762</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/sev-startup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/sev-startup.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/startup/sme.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/startup/sme.c</a> (renamed from arch/x86/mm/mem_encrypt_identity.c)</td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/string.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/string.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/string.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/string.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/tools/build.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/tools/build.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/boot/video.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/video.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/core.c</a></td><td class='right'>2961</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.4%;'/><td class='rem' style='width: 25.2%;'/><td class='none' style='width: 52.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/noinstr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/noinstr.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/shared.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/shared.c</a></td><td class='right'>1717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.6%;'/><td class='none' style='width: 72.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/vc-handle.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/vc-handle.c</a></td><td class='right'>1081</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/sev/vc-shared.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/sev/vc-shared.c</a></td><td class='right'>645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/tdx/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/tdx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/tdx/debug.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/tdx/debug.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/coco/tdx/tdx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/coco/tdx/tdx.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/configs/i386_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/configs/i386_defconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/configs/x86_64_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/configs/x86_64_defconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/configs/xen.config?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/configs/xen.config</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/Kconfig</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/Makefile</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aegis128-aesni-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aegis128-aesni-asm.S</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aegis128-aesni-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aegis128-aesni-glue.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aes-ctr-avx-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aes-ctr-avx-x86_64.S</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aes-gcm-avx10-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aes-gcm-avx10-x86_64.S</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aes-xts-avx-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aes-xts-avx-x86_64.S</a></td><td class='right'>564</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aes_ctrby8_avx-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aes_ctrby8_avx-x86_64.S</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.6%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aesni-intel_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aesni-intel_asm.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aesni-intel_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aesni-intel_glue.c</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aria-aesni-avx-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aria-aesni-avx-asm_64.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aria-aesni-avx2-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aria-aesni-avx2-asm_64.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aria_aesni_avx2_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aria_aesni_avx2_glue.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aria_aesni_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aria_aesni_avx_glue.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/aria_gfni_avx512_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/aria_gfni_avx512_glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/blake2s-core.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/blake2s-core.S</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/blake2s-glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/blake2s-glue.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/blowfish_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/blowfish_glue.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia-aesni-avx-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia-aesni-avx-asm_64.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia-aesni-avx2-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia-aesni-avx2-asm_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia-x86_64-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia-x86_64-asm_64.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia_aesni_avx2_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia_aesni_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia_aesni_avx_glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/camellia_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/camellia_glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/cast5-avx-x86_64-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/cast5-avx-x86_64-asm_64.S</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/cast5_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/cast5_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/cast6_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/cast6_avx_glue.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/chacha-avx2-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/chacha-avx2-x86_64.S</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 16.4%;'/><td class='none' style='width: 83.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/chacha-avx512vl-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/chacha-avx512vl-x86_64.S</a></td><td class='right'>836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.4%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/chacha-ssse3-x86_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/chacha-ssse3-x86_64.S</a></td><td class='right'>791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.7%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/chacha_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/chacha_glue.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crc32-pclmul_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crc32-pclmul_asm.S</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crc32-pclmul_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crc32-pclmul_glue.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crc32c-intel_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crc32c-intel_glue.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crc32c-pcl-intel-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crc32c-pcl-intel-asm_64.S</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crct10dif-pcl-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crct10dif-pcl-asm_64.S</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/crct10dif-pclmul_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/crct10dif-pclmul_glue.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/curve25519-x86_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/curve25519-x86_64.c</a></td><td class='right'>1725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.7%;'/><td class='none' style='width: 72.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/des3_ede_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/des3_ede_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/ghash-clmulni-intel_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/ghash-clmulni-intel_asm.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/ghash-clmulni-intel_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/poly1305-x86_64-cryptogams.pl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/poly1305-x86_64-cryptogams.pl</a></td><td class='right'>4248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 68.3%;'/><td class='none' style='width: 31.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/poly1305_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/poly1305_glue.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/polyval-clmulni_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/polyval-clmulni_glue.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/serpent-avx-x86_64-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/serpent-avx-x86_64-asm_64.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/serpent_avx2_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/serpent_avx2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/serpent_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/serpent_avx_glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/serpent_sse2_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/serpent_sse2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha1_avx2_x86_64_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha1_avx2_x86_64_asm.S</a></td><td class='right'>700</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.2%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha1_ni_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha1_ni_asm.S</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha1_ssse3_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha1_ssse3_asm.S</a></td><td class='right'>554</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.9%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha1_ssse3_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha1_ssse3_glue.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha256-avx-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha256-avx-asm.S</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha256-avx2-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha256-avx2-asm.S</a></td><td class='right'>774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.4%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha256-ssse3-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha256-ssse3-asm.S</a></td><td class='right'>513</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.2%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha256_ni_asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha256_ni_asm.S</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha256_ssse3_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha256_ssse3_glue.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha512-avx-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha512-avx-asm.S</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha512-avx2-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha512-avx2-asm.S</a></td><td class='right'>750</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.1%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha512-ssse3-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha512-ssse3-asm.S</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sha512_ssse3_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sha512_ssse3_glue.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sm3_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sm3_avx_glue.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sm4_aesni_avx2_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sm4_aesni_avx2_glue.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/sm4_aesni_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/sm4_aesni_avx_glue.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/twofish-x86_64-asm_64-3way.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/twofish-x86_64-asm_64-3way.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/twofish-x86_64-asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/twofish-x86_64-asm_64.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/twofish_avx_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/twofish_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/twofish_glue.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/twofish_glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/crypto/twofish_glue_3way.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/crypto/twofish_glue_3way.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/calling.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/calling.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/common.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.4%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/entry.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/entry.S</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/entry_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/entry_32.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/entry_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/entry_64.S</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/entry_64_compat.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/entry_64_compat.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/entry_64_fred.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/entry_64_fred.S</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/syscall_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/syscall_32.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/syscall_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/syscall_64.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/syscall_x32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/syscall_x32.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/syscalls/syscall_32.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/syscalls/syscall_32.tbl</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/syscalls/syscall_64.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/syscalls/syscall_64.tbl</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/checkundef.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/checkundef.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/extable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/extable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/vdso-layout.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/vdso-layout.lds.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/vdso2c.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/vdso2c.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/vdso2c.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/vdso2c.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/vdso32-setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/vdso32-setup.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vdso/vma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vdso/vma.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/entry/vsyscall/vsyscall_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/entry/vsyscall/vsyscall_64.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/brs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/brs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/core.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/ibs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/ibs.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/iommu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/iommu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/lbr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/lbr.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/power.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/power.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/amd/uncore.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/amd/uncore.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/core.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/bts.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/bts.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/core.c</a></td><td class='right'>973</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/cstate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/cstate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/ds.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/ds.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/knc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/knc.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/lbr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/lbr.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/p4.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/p4.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/p6.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/p6.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/pt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/pt.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/pt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/pt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore_discovery.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore_discovery.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore_discovery.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore_discovery.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore_nhmex.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore_nhmex.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore_snb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore_snb.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/intel/uncore_snbep.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/intel/uncore_snbep.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/msr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/msr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/perf_event.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/perf_event_flags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/perf_event_flags.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/probe.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/probe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/rapl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/rapl.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/utils.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/utils.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/events/zhaoxin/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/events/zhaoxin/core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/hv_apic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/hv_apic.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/hv_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/hv_init.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/hv_proc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/hv_proc.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/hv_spinlock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/hv_spinlock.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/hv_vtl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/hv_vtl.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/irqdomain.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/irqdomain.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/ivm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/ivm.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/mmu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/hyperv/nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/hyperv/nested.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/acpi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/acpi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/acrn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/acrn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/alternative.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/alternative.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/amd/hsmp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/amd/hsmp.h</a> (renamed from arch/x86/include/asm/amd_hsmp.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/amd/ibs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/amd/ibs.h</a> (renamed from arch/x86/include/asm/amd-ibs.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/amd/nb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/amd/nb.h</a> (renamed from arch/x86/include/asm/amd_nb.h)</td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/amd/node.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/amd/node.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/apic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/apic.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/apicdef.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/apicdef.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/arch_hweight.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/arch_hweight.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/archrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/archrandom.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/asm-prototypes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/asm-prototypes.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/asm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/asm.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/atomic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/atomic.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/atomic64_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/atomic64_32.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/atomic64_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/atomic64_64.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/barrier.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/bitops.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/boot.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/boot.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/bug.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/bug.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/ce4100.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/ce4100.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cfi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cfi.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cmpxchg.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cmpxchg_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cmpxchg_32.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cmpxchg_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cmpxchg_64.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/coco.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/coco.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpu.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpu_device_id.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpu_device_id.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpufeature.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpufeature.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpufeatures.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpufeatures.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpuid.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpuid.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpuid/api.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpuid/api.h</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpuid/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpuid/types.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/cpumask.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/cpumask.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/current.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/debugreg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/debugreg.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/desc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/desc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/desc_defs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/desc_defs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/disabled-features.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/disabled-features.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/dwarf2.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/dwarf2.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/e820/api.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/e820/api.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/e820/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/e820/types.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/edac.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/edac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/efi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/efi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/elf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/elf.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/entry-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/entry-common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fixmap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fixmap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/floppy.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/floppy.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fpu/api.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fpu/api.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fpu/sched.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fpu/sched.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fpu/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fpu/types.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fpu/xstate.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fpu/xstate.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/frame.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/frame.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fred.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fred.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/fsgsbase.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/fsgsbase.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/ftrace.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/futex.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/futex.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/hardirq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/hardirq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/highmem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/highmem.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/hpet.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/hpet.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/hw_irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/hw_irq.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/hyperv-tlfs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/hyperv-tlfs.h</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/hypervisor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/hypervisor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/ibt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/ibt.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/idtentry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/idtentry.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/inat.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/inat.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/init.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/init.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/insn.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/insn.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/inst.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/inst.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/intel-family.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/intel-family.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/intel_punit_ipc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/intel_punit_ipc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/intel_telemetry.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/intel_telemetry.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/io.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/iosf_mbi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/iosf_mbi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/irq_remapping.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/irq_remapping.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/irq_stack.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/irq_stack.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/irqflags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/irqflags.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/jump_label.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kasan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kexec.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kexec.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kvm-x86-ops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kvm-x86-ops.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kvm_host.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kvm_host.h</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kvm_para.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kvm_para.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/kvm_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/kvm_types.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/linkage.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/linkage.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mce.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mce.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mem_encrypt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mem_encrypt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/microcode.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/microcode.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mmu.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mmu_context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mmu_context.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/module.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/module.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mshyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mshyperv.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/msr-index.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/msr-index.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/msr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/msr.h</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mtrr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mtrr.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/mwait.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/mwait.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/nmi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/nmi.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/nops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/nops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/nospec-branch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/nospec-branch.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/numa.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/numa.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/numa_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/numa_32.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/orc_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/orc_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page_32_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page_32_types.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page_64.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page_64_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page_64_types.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/page_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/page_types.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/paravirt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/paravirt.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/paravirt_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/paravirt_types.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/percpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/percpu.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/perf_event.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/perf_event.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgalloc.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable-2level_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable-2level_types.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable-3level_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable-3level_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable-invert.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable-invert.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable_32_areas.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable_32_areas.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable_64_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable_64_types.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pgtable_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pgtable_types.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/posted_intr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/posted_intr.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/preempt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/preempt.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/processor.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/prom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/prom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/proto.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/proto.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pti.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pti.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/purgatory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/purgatory.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/pvclock-abi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/pvclock-abi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/realmode.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/realmode.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/required-features.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/required-features.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/resctrl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/resctrl.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/rmwcc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/rmwcc.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/rqspinlock.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/rqspinlock.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/runtime-const.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/runtime-const.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sections.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sections.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/segment.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/segment.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/set_memory.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/set_memory.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/setup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/setup.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/setup_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/setup_data.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sev-common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sev-common.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sev-internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sev-internal.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sev.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sev.h</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/shared/tdx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/shared/tdx.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/shstk.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/shstk.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sighandling.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sighandling.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/signal.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/simd.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/simd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/smap.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/smap.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/smp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/smp.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/spec-ctrl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/spec-ctrl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/special_insns.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/special_insns.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sta2x11.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sta2x11.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/stackprotector.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/stackprotector.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/static_call.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/static_call.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/string_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/string_32.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/string_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/string_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/suspend_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/suspend_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/suspend_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/suspend_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/svm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/svm.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/switch_to.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/switch_to.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sync_bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sync_bitops.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/sync_core.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/sync_core.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/syscall.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tdx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tdx.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tdx_global_metadata.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tdx_global_metadata.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/text-patching.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/text-patching.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/thread_info.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/timer.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/timer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tlb.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tlb.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tlbbatch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tlbbatch.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tlbflush.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/topology.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/topology.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/trace/common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/trace/common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/trace/exceptions.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/trace/exceptions.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/trace/fpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/trace/fpu.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/trace/irq_vectors.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/trace/irq_vectors.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/traps.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/traps.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/tsc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/tsc.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/uaccess.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/uaccess.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/uaccess_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/uaccess_64.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/unwind_hints.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/unwind_hints.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/uprobes.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/uprobes.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vdso.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vdso.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vdso/getrandom.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vdso/getrandom.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vdso/gettimeofday.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vdso/gettimeofday.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vdso/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vdso/processor.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vdso/vsyscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vdso/vsyscall.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vermagic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vermagic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/video.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/video.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vmx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vmx.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/vvar.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/vvar.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/x86_init.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/x86_init.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/hypercall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/hypercall.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/hypervisor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/hypervisor.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/interface.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/interface.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/interface_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/interface_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/interface_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/interface_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/asm/xen/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/asm/xen/page.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/amd_hsmp.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/amd_hsmp.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/bootparam.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/bootparam.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/debugreg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/debugreg.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/e820.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/e820.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/kvm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/kvm.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/ldt.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/ldt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/mce.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/mce.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/mman.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/msr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/msr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/ptrace-abi.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/ptrace-abi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/ptrace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/setup_data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/setup_data.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/signal.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/svm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/svm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/include/uapi/asm/vmx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/include/uapi/asm/vmx.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/boot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/boot.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/cppc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/cppc.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/cstate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/cstate.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/madt_playdead.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/madt_playdead.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/madt_wakeup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/madt_wakeup.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/sleep.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/sleep.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/acpi/wakeup_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/acpi/wakeup_64.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/alternative.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/alternative.c</a></td><td class='right'>1412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 77.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/amd_gart_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/amd_gart_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/amd_nb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/amd_nb.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/amd_node.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/amd_node.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/aperture_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/aperture_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/apic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/apic.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/apic_noop.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/apic_noop.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/apic_numachip.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/apic_numachip.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/bigsmp_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/bigsmp_32.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/io_apic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/io_apic.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/ipi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/ipi.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/local.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/local.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/msi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/msi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/probe_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/probe_32.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/vector.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/vector.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/x2apic_savic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/x2apic_savic.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/apic/x2apic_uv_x.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/apic/x2apic_uv_x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/asm-offsets.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/asm-offsets_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/asm-offsets_32.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/asm-offsets_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/asm-offsets_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/bootflag.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/bootflag.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/callthunks.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/callthunks.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cet.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cet.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cfi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cfi.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/amd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/amd.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/amd_cache_disable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/amd_cache_disable.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/aperfmperf.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/aperfmperf.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/bhyve.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/bhyve.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/bugs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/bugs.c</a></td><td class='right'>2566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.8%;'/><td class='rem' style='width: 14.5%;'/><td class='none' style='width: 58.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/bus_lock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/bus_lock.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/cacheinfo.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/cacheinfo.c</a></td><td class='right'>1127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 12.3%;'/><td class='none' style='width: 81.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/common.c</a></td><td class='right'>694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/cpu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/cpu.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/cpuid-deps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/cpuid-deps.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/cpuid_0x2_table.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/cpuid_0x2_table.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/cyrix.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/cyrix.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/debugfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/feat_ctl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/feat_ctl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/hygon.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/hygon.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/hypervisor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/hypervisor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/intel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/intel.c</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/intel_epb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/intel_epb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/match.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/match.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/amd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/amd.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/apei.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/apei.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/core.c</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/dev-mcelog.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/dev-mcelog.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/genpool.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/genpool.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/inject.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/inject.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/intel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/intel.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/internal.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/severity.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/severity.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mce/threshold.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mce/threshold.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/amd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/amd.c</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/amd_shas.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/amd_shas.c</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/core.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/intel-ucode-defs.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/intel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/intel.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/microcode/internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/microcode/internal.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mshyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mshyperv.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mtrr/cleanup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mtrr/cleanup.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mtrr/generic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mtrr/generic.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mtrr/if.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mtrr/if.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/mtrr/mtrr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/mtrr/mtrr.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/proc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/proc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/core.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/internal.h</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/monitor.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/monitor.c</a></td><td class='right'>1065</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 14.1%;'/><td class='none' style='width: 82.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a></td><td class='right'>1164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 18.1%;'/><td class='none' style='width: 81.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h</a> (renamed from arch/x86/kernel/cpu/resctrl/trace.h)</td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/resctrl/rdtgroup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a></td><td class='right'>4025</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 64.2%;'/><td class='none' style='width: 35.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/scattered.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/scattered.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/driver.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/driver.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/driver.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/driver.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/encl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/encl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/encl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/encl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/encls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/encls.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/ioctl.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/ioctl.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/sgx/main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/sgx/main.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/topology.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/topology.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/topology_amd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/topology_amd.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/topology_common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/topology_common.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/tsx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/tsx.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/umwait.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/umwait.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/vmware.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/vmware.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/cpu/zhaoxin.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/cpu/zhaoxin.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/crash.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/crash.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/devicetree.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/devicetree.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/dumpstack.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/dumpstack.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/dumpstack_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/dumpstack_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/dumpstack_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/dumpstack_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/e820.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/e820.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/early-quirks.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/early-quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/early_printk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/early_printk.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/context.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/context.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/core.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/init.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/regset.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/regset.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/signal.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/xstate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/xstate.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fpu/xstate.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fpu/xstate.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/fred.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/fred.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ftrace.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ftrace_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ftrace_32.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ftrace_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ftrace_64.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/head32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/head32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/head64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/head64.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/head_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/head_32.S</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/head_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/head_64.S</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/hpet.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/hpet.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/i8253.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/i8253.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/i8259.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/i8259.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ioport.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ioport.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/irq.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/irq_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/irq_32.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/irq_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/irq_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/irqflags.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/irqflags.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/irqinit.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/irqinit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/itmt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/itmt.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/jailhouse.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/jailhouse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/jump_label.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/jump_label.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kexec-bzimage64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kexec-bzimage64.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kgdb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kgdb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kprobes/core.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kprobes/core.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kprobes/ftrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kprobes/ftrace.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kprobes/opt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kprobes/opt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ksysfs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ksysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kvm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kvm.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/kvmclock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/kvmclock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/machine_kexec_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/machine_kexec_32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/machine_kexec_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/machine_kexec_64.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/mmconf-fam10h_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/mmconf-fam10h_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/module.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/module.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/nmi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/nmi.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/nmi_selftest.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/nmi_selftest.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/paravirt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/paravirt.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/pci-dma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/pci-dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/process.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/process_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/process_32.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/process_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/process_64.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/ptrace.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/quirks.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/reboot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/reboot.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/reboot_fixups_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/reboot_fixups_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/relocate_kernel_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/relocate_kernel_32.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/relocate_kernel_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/relocate_kernel_64.S</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/setup.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/setup_percpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/setup_percpu.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/shstk.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/shstk.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/signal.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/signal_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/signal_32.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/signal_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/signal_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/smp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/smpboot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/smpboot.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/static_call.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/static_call.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/sys_x86_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/sys_x86_64.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/tboot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/tboot.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/trace_clock.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/trace_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/tracepoint.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/tracepoint.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/traps.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/tsc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/tsc.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/tsc_msr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/tsc_msr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/tsc_sync.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/tsc_sync.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/umip.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/umip.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/unwind_orc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/unwind_orc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/uprobes.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/uprobes.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/verify_cpu.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/verify_cpu.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/vm86_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/vm86_32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kernel/vmlinux.lds.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kernel/vmlinux.lds.S</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/cpuid.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/cpuid.c</a></td><td class='right'>1148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 81.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/cpuid.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/cpuid.h</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/emulate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/emulate.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/governed_features.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/governed_features.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/hyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/hyperv.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/hyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/hyperv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/i8254.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/i8254.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/i8254.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/i8254.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/i8259.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/i8259.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/ioapic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/ioapic.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/ioapic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/ioapic.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/irq.c</a></td><td class='right'>484</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/irq.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/irq.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/irq_comm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/irq_comm.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/kvm_cache_regs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/kvm_cache_regs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/kvm_emulate.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/kvm_emulate.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/kvm_onhyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/kvm_onhyperv.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/lapic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/lapic.c</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/lapic.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/lapic.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/mmu.c</a></td><td class='right'>1420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.6%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/mmu_internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/mmu_internal.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/mmutrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/mmutrace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/page_track.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/page_track.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/paging_tmpl.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/paging_tmpl.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/spte.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/spte.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/spte.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/spte.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/tdp_iter.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/tdp_iter.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/tdp_iter.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/tdp_iter.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/tdp_mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/tdp_mmu.c</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mmu/tdp_mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mmu/tdp_mmu.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/mtrr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/mtrr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/pmu.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/pmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/pmu.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/reverse_cpuid.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/reverse_cpuid.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/smm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/smm.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/smm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/smm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/avic.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/avic.c</a></td><td class='right'>840</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/nested.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/pmu.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/sev.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/sev.c</a></td><td class='right'>1110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 82.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/svm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/svm.c</a></td><td class='right'>1129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 9.0%;'/><td class='none' style='width: 81.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/svm.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/svm.h</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/svm_onhyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/svm_onhyperv.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/svm_onhyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/svm_onhyperv.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/svm/vmenter.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/svm/vmenter.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/trace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/trace.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/capabilities.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/capabilities.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/common.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/common.h</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/hyperv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/hyperv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/hyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/hyperv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/hyperv_evmcs.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/hyperv_evmcs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/main.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/main.c</a></td><td class='right'>1085</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 82.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/nested.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/nested.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/nested.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/nested.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/pmu_intel.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/pmu_intel.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/pmu_intel.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/pmu_intel.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/posted_intr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/posted_intr.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/posted_intr.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/posted_intr.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/run_flags.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/run_flags.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/sgx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/sgx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/tdx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/tdx.c</a></td><td class='right'>3658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 58.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 41.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/tdx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/tdx.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/tdx_arch.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/tdx_arch.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/tdx_errno.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/tdx_errno.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmcs12.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmcs12.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmcs12.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmcs12.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmenter.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmenter.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmx.c</a></td><td class='right'>1436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 10.9%;'/><td class='none' style='width: 76.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmx.h</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmx_onhyperv.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmx_onhyperv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/vmx_ops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/vmx_ops.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/vmx/x86_ops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/vmx/x86_ops.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/x86.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/x86.c</a></td><td class='right'>2224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.6%;'/><td class='rem' style='width: 15.1%;'/><td class='none' style='width: 64.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/x86.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/x86.h</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/xen.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/xen.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/kvm/xen.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/kvm/xen.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/.gitignore?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/bhi.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/bhi.S</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/cache-smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/cache-smp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/clear_page_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/clear_page_64.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/cmpxchg8b_emu.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/cmpxchg8b_emu.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/copy_page_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/copy_page_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/copy_user_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/copy_user_64.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/copy_user_uncached_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/copy_user_uncached_64.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/delay.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/delay.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/getuser.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/getuser.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/hweight.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/hweight.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/inat.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/inat.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/insn-eval.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/insn-eval.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/insn.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/insn.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/iomem.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/iomem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/kaslr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/kaslr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/memcpy_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/memcpy_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/memmove_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/memmove_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/memset_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/memset_64.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/msr-reg.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/msr-reg.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/msr-smp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/msr-smp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/msr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/msr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/putuser.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/putuser.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/retpoline.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/retpoline.S</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/string_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/string_32.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/strstr_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/strstr_32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/usercopy_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/usercopy_32.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/usercopy_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/usercopy_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/lib/x86-opcode-map.txt?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/lib/x86-opcode-map.txt</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/control_w.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/control_w.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/exception.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/exception.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/fpu_aux.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/fpu_aux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/fpu_emu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/fpu_emu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/fpu_entry.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/fpu_entry.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/fpu_system.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/fpu_system.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/math-emu/status_w.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/math-emu/status_w.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/amdtopology.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/amdtopology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/dump_pagetables.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/dump_pagetables.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/extable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/extable.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/fault.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/fault.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/highmem_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/highmem_32.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/hugetlbpage.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/hugetlbpage.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/ident_map.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/ident_map.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/init.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/init_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/init_32.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/init_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/init_64.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/ioremap.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/kasan_init_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/kasan_init_64.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/kaslr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/kaslr.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/mem_encrypt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/mem_encrypt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/mem_encrypt_amd.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/mem_encrypt_amd.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/mem_encrypt_boot.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/mem_encrypt_boot.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/mm_internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/mm_internal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/mmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/mmap.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/numa.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/numa.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/numa_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/numa_32.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/numa_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/numa_64.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/numa_internal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/numa_internal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pat/cpa-test.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pat/cpa-test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pat/memtype.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pat/memtype.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pat/memtype_interval.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pat/memtype_interval.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pat/set_memory.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pat/set_memory.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pgprot.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pgprot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pgtable.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pgtable.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/pti.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/pti.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/mm/tlb.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/mm/tlb.c</a></td><td class='right'>638</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/net/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/net/bpf_jit_comp.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/net/bpf_jit_comp.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/net/bpf_timed_may_goto.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/net/bpf_timed_may_goto.S</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/acpi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/acpi.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/amd_bus.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/amd_bus.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/fixup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/fixup.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/intel_mid.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/intel_mid.c</a> (renamed from arch/x86/pci/intel_mid_pci.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/mmconfig-shared.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/mmconfig-shared.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/sta2x11-fixup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/sta2x11-fixup.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/pci/xen.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/pci/xen.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/ce4100/ce4100.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/ce4100/ce4100.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/efi/efi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/efi/efi.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/efi/efi_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/efi/efi_64.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/efi/efi_stub_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/efi/efi_stub_64.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/efi/memmap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/efi/memmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/efi/quirks.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/efi/quirks.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/intel-mid/pwr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/intel-mid/pwr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/intel-quark/imr.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/intel-quark/imr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/intel-quark/imr_selftest.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/intel-quark/imr_selftest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/intel/iosf_mbi.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/intel/iosf_mbi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/iris/iris.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/iris/iris.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/olpc/olpc-xo1-pm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/olpc/olpc-xo1-pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/olpc/olpc-xo1-rtc.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/olpc/olpc-xo1-rtc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/olpc/olpc-xo1-sci.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/olpc/olpc_dt.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/olpc/olpc_dt.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/pvh/head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/pvh/head.S</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/platform/uv/uv_irq.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/platform/uv/uv_irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/power/cpu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/power/cpu.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/power/hibernate.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/power/hibernate.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/power/hibernate_asm_32.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/power/hibernate_asm_32.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/power/hibernate_asm_64.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/power/hibernate_asm_64.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/purgatory/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/purgatory/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/purgatory/purgatory.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/purgatory/purgatory.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/realmode/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/realmode/init.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/realmode/rm/realmode.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/realmode/rm/realmode.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/realmode/rm/wakeup.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/realmode/rm/wakeup.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/tools/cpufeaturemasks.awk?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/tools/cpufeaturemasks.awk</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/tools/gen-insn-attr-x86.awk?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/tools/gen-insn-attr-x86.awk</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/tools/insn_decoder_test.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/tools/insn_decoder_test.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/tools/insn_sanity.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/tools/insn_sanity.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/tools/relocs.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/tools/relocs.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/archparam.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/archparam.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/barrier.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/barrier.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/checksum.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/checksum.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/elf.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/elf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/module.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/module.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/ptrace.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/asm/syscall.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/os-Linux/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/os-Linux/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/os-Linux/mcontext.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/os-Linux/mcontext.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/os-Linux/registers.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/os-Linux/registers.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/os-Linux/task_size.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/os-Linux/task_size.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/um/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/ptrace.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/ptrace_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/ptrace_32.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/ptrace_64.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/ptrace_64.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/faultinfo_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/faultinfo_32.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/faultinfo_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/faultinfo_64.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/kernel-offsets.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/kernel-offsets.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/mcontext.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/mcontext.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/ptrace.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/ptrace_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/ptrace_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/ptrace_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/ptrace_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/ptrace_user.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/ptrace_user.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/stub-data.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/stub-data.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/stub.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/stub.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/stub_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/stub_32.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/stub_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/stub_64.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/syscalls.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/syscalls.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/syscalls_32.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/syscalls_32.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/shared/sysdep/syscalls_64.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/shared/sysdep/syscalls_64.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/signal.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/signal.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/tls_32.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/tls_32.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/user-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/user-offsets.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/vdso/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/vdso/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/x86/um/vdso/checkundef.sh?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/vdso/checkundef.sh</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/um/vdso/vma.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/um/vdso/vma.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/video/video-common.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/video/video-common.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/svm/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/svm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/svm/cmdline.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/svm/cmdline.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/svm/sev.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/svm/sev.c</a></td><td class='right'>687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/vmx/tdx/seamcall.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/vmx/tdx/seamcall.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/vmx/tdx/tdx.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/vmx/tdx/tdx.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/vmx/tdx/tdx.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/vmx/tdx/tdx.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/arch/x86/virt/vmx/tdx/tdx_global_metadata.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/virt/vmx/tdx/tdx_global_metadata.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/enlighten.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/enlighten.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/enlighten_hvm.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/enlighten_hvm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/enlighten_pv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/enlighten_pv.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/enlighten_pvh.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/enlighten_pvh.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/mmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/mmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/mmu_pv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/mmu_pv.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/multicalls.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/multicalls.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/p2m.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/p2m.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/pmu.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/pmu.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/smp_pv.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/smp_pv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/suspend.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/suspend.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/xen-asm.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/xen-asm.S</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/xen-head.S?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/xen-head.S</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/x86/xen/xen-ops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/xen/xen-ops.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/Kconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/boot/dts/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/boot/dts/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/audio_kc705_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/audio_kc705_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/cadence_csp_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/cadence_csp_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/common_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/common_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/generic_kc705_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/generic_kc705_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/nommu_kc705_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/nommu_kc705_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/smp_lx200_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/smp_lx200_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/virt_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/virt_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/configs/xip_kc705_defconfig?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/configs/xip_kc705_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/Kbuild?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/bitops.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/bitops.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/bootparam.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/bootparam.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/cmpxchg.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/cmpxchg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/coprocessor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/coprocessor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/current.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/current.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/ftrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/ftrace.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/highmem.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/highmem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/initialize_mmu.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/initialize_mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/io.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/io.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/jump_label.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/jump_label.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/kasan.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/kasan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/kmem_layout.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/kmem_layout.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/page.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/page.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/pgalloc.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/pgalloc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/pgtable.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/pgtable.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/processor.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/ptrace.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/signal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/spinlock_types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/syscall.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/syscall.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/thread_info.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/thread_info.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/asm/tlbflush.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/asm/tlbflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/uapi/asm/mman.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/uapi/asm/mman.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/uapi/asm/param.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/uapi/asm/param.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/uapi/asm/ptrace.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/uapi/asm/ptrace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/uapi/asm/signal.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/uapi/asm/signal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/include/uapi/asm/types.h?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/include/uapi/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/Makefile?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/asm-offsets.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/perf_event.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/platform.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/platform.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/process.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/process.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/ptrace.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/ptrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/setup.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/syscalls/syscall.tbl?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/syscalls/syscall.tbl</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/kernel/traps.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/kernel/traps.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/mm/cache.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/mm/cache.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/mm/init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/mm/init.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/mm/ioremap.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/mm/ioremap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/arch/xtensa/mm/kasan_init.c?h=for-next&amp;id2=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/xtensa/mm/kasan_init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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</table><div class='diffstat-summary'>6583 files changed, 452571 insertions, 194425 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/arch/Kconfig b/arch/Kconfig<br/>index 8af374ea1adc..ebe08b9186ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/Kconfig</a></div><div class='hunk'>@@ -41,6 +41,44 @@ config HOTPLUG_SMT</div><div class='ctx'> config SMT_NUM_THREADS_DYNAMIC</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config ARCH_SUPPORTS_SCHED_SMT</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config ARCH_SUPPORTS_SCHED_CLUSTER</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config ARCH_SUPPORTS_SCHED_MC</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config SCHED_SMT</div><div class='add'>+	bool "SMT (Hyperthreading) scheduler support"</div><div class='add'>+	depends on ARCH_SUPPORTS_SCHED_SMT</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Improves the CPU scheduler's decision making when dealing with</div><div class='add'>+	  MultiThreading at a cost of slightly increased overhead in some</div><div class='add'>+	  places. If unsure say N here.</div><div class='add'>+</div><div class='add'>+config SCHED_CLUSTER</div><div class='add'>+	bool "Cluster scheduler support"</div><div class='add'>+	depends on ARCH_SUPPORTS_SCHED_CLUSTER</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Cluster scheduler support improves the CPU scheduler's decision</div><div class='add'>+	  making when dealing with machines that have clusters of CPUs.</div><div class='add'>+	  Cluster usually means a couple of CPUs which are placed closely</div><div class='add'>+	  by sharing mid-level caches, last-level cache tags or internal</div><div class='add'>+	  busses.</div><div class='add'>+</div><div class='add'>+config SCHED_MC</div><div class='add'>+	bool "Multi-Core Cache (MC) scheduler support"</div><div class='add'>+	depends on ARCH_SUPPORTS_SCHED_MC</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='add'>+	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='add'>+	  increased overhead in some places. If unsure say N here.</div><div class='add'>+</div><div class='ctx'> # Selected by HOTPLUG_CORE_SYNC_DEAD or HOTPLUG_CORE_SYNC_FULL</div><div class='ctx'> config HOTPLUG_CORE_SYNC</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -64,8 +102,17 @@ config HOTPLUG_PARALLEL</div><div class='ctx'> 	bool</div><div class='ctx'> 	select HOTPLUG_SPLIT_STARTUP</div><div class='ctx'> </div><div class='add'>+config GENERIC_IRQ_ENTRY</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config GENERIC_SYSCALL</div><div class='add'>+	bool</div><div class='add'>+	depends on GENERIC_IRQ_ENTRY</div><div class='add'>+</div><div class='ctx'> config GENERIC_ENTRY</div><div class='ctx'> 	bool</div><div class='add'>+	select GENERIC_IRQ_ENTRY</div><div class='add'>+	select GENERIC_SYSCALL</div><div class='ctx'> </div><div class='ctx'> config KPROBES</div><div class='ctx'> 	bool "Kprobes"</div><div class='hunk'>@@ -135,6 +182,7 @@ config KPROBES_ON_FTRACE</div><div class='ctx'> config UPROBES</div><div class='ctx'> 	def_bool n</div><div class='ctx'> 	depends on ARCH_SUPPORTS_UPROBES</div><div class='add'>+	select TASKS_TRACE_RCU</div><div class='ctx'> 	help</div><div class='ctx'> 	  Uprobes is the user-space counterpart to kprobes: they</div><div class='ctx'> 	  enable instrumentation applications (such as 'perf probe')</div><div class='hunk'>@@ -434,6 +482,13 @@ config HAVE_HARDLOCKUP_DETECTOR_ARCH</div><div class='ctx'> 	  It uses the same command line parameters, and sysctl interface,</div><div class='ctx'> 	  as the generic hardlockup detectors.</div><div class='ctx'> </div><div class='add'>+config UNWIND_USER</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config HAVE_UNWIND_USER_FP</div><div class='add'>+	bool</div><div class='add'>+	select UNWIND_USER</div><div class='add'>+</div><div class='ctx'> config HAVE_PERF_REGS</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -629,11 +684,11 @@ config SECCOMP_CACHE_DEBUG</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='del'>-config HAVE_ARCH_STACKLEAK</div><div class='add'>+config HAVE_ARCH_KSTACK_ERASE</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='ctx'> 	  An architecture should select this if it has the code which</div><div class='del'>-	  fills the used part of the kernel stack with the STACKLEAK_POISON</div><div class='add'>+	  fills the used part of the kernel stack with the KSTACK_ERASE_POISON</div><div class='ctx'> 	  value before returning from system calls.</div><div class='ctx'> </div><div class='ctx'> config HAVE_STACKPROTECTOR</div><div class='hunk'>@@ -811,22 +866,65 @@ config LTO_CLANG_THIN</div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='del'>-config ARCH_SUPPORTS_CFI_CLANG</div><div class='add'>+config ARCH_SUPPORTS_AUTOFDO_CLANG</div><div class='ctx'> 	bool</div><div class='add'>+</div><div class='add'>+config AUTOFDO_CLANG</div><div class='add'>+	bool "Enable Clang's AutoFDO build (EXPERIMENTAL)"</div><div class='add'>+	depends on ARCH_SUPPORTS_AUTOFDO_CLANG</div><div class='add'>+	depends on CC_IS_CLANG &amp;&amp; CLANG_VERSION &gt;= 170000</div><div class='ctx'> 	help</div><div class='del'>-	  An architecture should select this option if it can support Clang's</div><div class='del'>-	  Control-Flow Integrity (CFI) checking.</div><div class='add'>+	  This option enables Clang’s AutoFDO build. When</div><div class='add'>+	  an AutoFDO profile is specified in variable</div><div class='add'>+	  CLANG_AUTOFDO_PROFILE during the build process,</div><div class='add'>+	  Clang uses the profile to optimize the kernel.</div><div class='add'>+</div><div class='add'>+	  If no profile is specified, AutoFDO options are</div><div class='add'>+	  still passed to Clang to facilitate the collection</div><div class='add'>+	  of perf data for creating an AutoFDO profile in</div><div class='add'>+	  subsequent builds.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config ARCH_SUPPORTS_PROPELLER_CLANG</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config PROPELLER_CLANG</div><div class='add'>+	bool "Enable Clang's Propeller build"</div><div class='add'>+	depends on ARCH_SUPPORTS_PROPELLER_CLANG</div><div class='add'>+	depends on CC_IS_CLANG &amp;&amp; CLANG_VERSION &gt;= 190000</div><div class='add'>+	help</div><div class='add'>+	  This option enables Clang’s Propeller build. When the Propeller</div><div class='add'>+	  profiles is specified in variable CLANG_PROPELLER_PROFILE_PREFIX</div><div class='add'>+	  during the build process, Clang uses the profiles to optimize</div><div class='add'>+	  the kernel.</div><div class='add'>+</div><div class='add'>+	  If no profile is specified, Propeller options are still passed</div><div class='add'>+	  to Clang to facilitate the collection of perf data for creating</div><div class='add'>+	  the Propeller profiles in subsequent builds.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config ARCH_SUPPORTS_CFI</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture should select this option if it can support Kernel</div><div class='add'>+	  Control-Flow Integrity (CFI) checking (-fsanitize=kcfi).</div><div class='ctx'> </div><div class='ctx'> config ARCH_USES_CFI_TRAPS</div><div class='ctx'> 	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture should select this option if it requires the</div><div class='add'>+	  .kcfi_traps section for KCFI trap handling.</div><div class='ctx'> </div><div class='del'>-config CFI_CLANG</div><div class='del'>-	bool "Use Clang's Control Flow Integrity (CFI)"</div><div class='del'>-	depends on ARCH_SUPPORTS_CFI_CLANG</div><div class='add'>+config CFI</div><div class='add'>+	bool "Use Kernel Control Flow Integrity (kCFI)"</div><div class='add'>+	default CFI_CLANG</div><div class='add'>+	depends on ARCH_SUPPORTS_CFI</div><div class='ctx'> 	depends on $(cc-option,-fsanitize=kcfi)</div><div class='ctx'> 	help</div><div class='del'>-	  This option enables Clang's forward-edge Control Flow Integrity</div><div class='del'>-	  (CFI) checking, where the compiler injects a runtime check to each</div><div class='add'>+	  This option enables forward-edge Control Flow Integrity (CFI)</div><div class='add'>+	  checking, where the compiler injects a runtime check to each</div><div class='ctx'> 	  indirect function call to ensure the target is a valid function with</div><div class='ctx'> 	  the correct static type. This restricts possible call targets and</div><div class='ctx'> 	  makes it more difficult for an attacker to exploit bugs that allow</div><div class='hunk'>@@ -835,9 +933,15 @@ config CFI_CLANG</div><div class='ctx'> </div><div class='ctx'> 	    https://clang.llvm.org/docs/ControlFlowIntegrity.html</div><div class='ctx'> </div><div class='add'>+config CFI_CLANG</div><div class='add'>+	bool</div><div class='add'>+	transitional</div><div class='add'>+	help</div><div class='add'>+	  Transitional config for CFI_CLANG to CFI migration.</div><div class='add'>+</div><div class='ctx'> config CFI_ICALL_NORMALIZE_INTEGERS</div><div class='ctx'> 	bool "Normalize CFI tags for integers"</div><div class='del'>-	depends on CFI_CLANG</div><div class='add'>+	depends on CFI</div><div class='ctx'> 	depends on HAVE_CFI_ICALL_NORMALIZE_INTEGERS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option normalizes the CFI tags for integer types so that all</div><div class='hunk'>@@ -852,24 +956,22 @@ config CFI_ICALL_NORMALIZE_INTEGERS</div><div class='ctx'> 	  This option is necessary for using CFI with Rust. If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> config HAVE_CFI_ICALL_NORMALIZE_INTEGERS</div><div class='del'>-	def_bool !GCOV_KERNEL &amp;&amp; !KASAN</div><div class='del'>-	depends on CFI_CLANG</div><div class='add'>+	def_bool y</div><div class='ctx'> 	depends on $(cc-option,-fsanitize=kcfi -fsanitize-cfi-icall-experimental-normalize-integers)</div><div class='del'>-	help</div><div class='del'>-	  Is CFI_ICALL_NORMALIZE_INTEGERS supported with the set of compilers</div><div class='del'>-	  currently in use?</div><div class='add'>+	# With GCOV/KASAN we need this fix: https://github.com/llvm/llvm-project/pull/104826</div><div class='add'>+	depends on CLANG_VERSION &gt;= 190103 || (!GCOV_KERNEL &amp;&amp; !KASAN_GENERIC &amp;&amp; !KASAN_SW_TAGS)</div><div class='ctx'> </div><div class='del'>-	  This option defaults to false if GCOV or KASAN is enabled, as there is</div><div class='del'>-	  an LLVM bug that makes normalized integers tags incompatible with</div><div class='del'>-	  KASAN and GCOV. Kconfig currently does not have the infrastructure to</div><div class='del'>-	  detect whether your rustc compiler contains the fix for this bug, so</div><div class='del'>-	  it is assumed that it doesn't. If your compiler has the fix, you can</div><div class='del'>-	  explicitly enable this option in your config file. The Kconfig logic</div><div class='del'>-	  needed to detect this will be added in a future kernel release.</div><div class='add'>+config HAVE_CFI_ICALL_NORMALIZE_INTEGERS_RUSTC</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on HAVE_CFI_ICALL_NORMALIZE_INTEGERS</div><div class='add'>+	depends on RUSTC_VERSION &gt;= 107900</div><div class='add'>+	# With GCOV/KASAN we need this fix: https://github.com/rust-lang/rust/pull/129373</div><div class='add'>+	depends on (RUSTC_LLVM_VERSION &gt;= 190103 &amp;&amp; RUSTC_VERSION &gt;= 108200) || \</div><div class='add'>+		(!GCOV_KERNEL &amp;&amp; !KASAN_GENERIC &amp;&amp; !KASAN_SW_TAGS)</div><div class='ctx'> </div><div class='ctx'> config CFI_PERMISSIVE</div><div class='ctx'> 	bool "Use CFI in permissive mode"</div><div class='del'>-	depends on CFI_CLANG</div><div class='add'>+	depends on CFI</div><div class='ctx'> 	help</div><div class='ctx'> 	  When selected, Control Flow Integrity (CFI) violations result in a</div><div class='ctx'> 	  warning instead of a kernel panic. This option should only be used</div><div class='hunk'>@@ -1026,6 +1128,14 @@ config ARCH_WANTS_EXECMEM_LATE</div><div class='ctx'> 	  enough entropy for module space randomization, for instance</div><div class='ctx'> 	  arm64.</div><div class='ctx'> </div><div class='add'>+config ARCH_HAS_EXECMEM_ROX</div><div class='add'>+	bool</div><div class='add'>+	depends on MMU &amp;&amp; !HIGHMEM</div><div class='add'>+	help</div><div class='add'>+	  For architectures that support allocations of executable memory</div><div class='add'>+	  with read-only execute permissions. Architecture must implement</div><div class='add'>+	  execmem_fill_trapping_insns() callback to enable this.</div><div class='add'>+</div><div class='ctx'> config HAVE_IRQ_EXIT_ON_IRQ_STACK</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1413,7 +1523,6 @@ config RANDOMIZE_KSTACK_OFFSET</div><div class='ctx'> 	bool "Support for randomizing kernel stack offset on syscall entry" if EXPERT</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET</div><div class='del'>-	depends on INIT_STACK_NONE || !CC_IS_CLANG || CLANG_VERSION &gt;= 140000</div><div class='ctx'> 	help</div><div class='ctx'> 	  The kernel stack offset can be randomized (after pt_regs) by</div><div class='ctx'> 	  roughly 5 bits of entropy, frustrating memory corruption</div><div class='hunk'>@@ -1472,6 +1581,14 @@ config STRICT_MODULE_RWX</div><div class='ctx'> config ARCH_HAS_PHYS_TO_DMA</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config ARCH_HAS_CPU_RESCTRL</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture selects this option to indicate that the necessary</div><div class='add'>+	  hooks are provided to support the common memory system usage</div><div class='add'>+	  monitoring and control interfaces provided by the 'resctrl'</div><div class='add'>+	  filesystem (see RESCTRL_FS).</div><div class='add'>+</div><div class='ctx'> config HAVE_ARCH_COMPILER_H</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1480,6 +1597,14 @@ config HAVE_ARCH_COMPILER_H</div><div class='ctx'> 	  linux/compiler-*.h in order to override macro definitions that those</div><div class='ctx'> 	  headers generally provide.</div><div class='ctx'> </div><div class='add'>+config HAVE_ARCH_LIBGCC_H</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture can select this if it provides an</div><div class='add'>+	  asm/libgcc.h header that should be included after</div><div class='add'>+	  linux/libgcc.h in order to override macro definitions that</div><div class='add'>+	  header generally provides.</div><div class='add'>+</div><div class='ctx'> config HAVE_ARCH_PREL32_RELOCATIONS</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1530,7 +1655,11 @@ config HAVE_SPARSE_SYSCALL_NR</div><div class='ctx'> 	  entries at 4000, 5000 and 6000 locations. This option turns on syscall</div><div class='ctx'> 	  related optimizations for a given architecture.</div><div class='ctx'> </div><div class='del'>-config ARCH_HAS_VDSO_DATA</div><div class='add'>+config ARCH_HAS_VDSO_ARCH_DATA</div><div class='add'>+	depends on HAVE_GENERIC_VDSO</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config ARCH_HAS_VDSO_TIME_DATA</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> config HAVE_STATIC_CALL</div><div class='hunk'>@@ -1641,6 +1770,17 @@ config ARCH_HAS_KERNEL_FPU_SUPPORT</div><div class='ctx'> 	  Architectures that select this option can run floating-point code in</div><div class='ctx'> 	  the kernel, as described in Documentation/core-api/floating-point.rst.</div><div class='ctx'> </div><div class='add'>+config ARCH_VMLINUX_NEEDS_RELOCS</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Whether the architecture needs vmlinux to be built with static</div><div class='add'>+	  relocations preserved. This is used by some architectures to</div><div class='add'>+	  construct bespoke relocation tables for KASLR.</div><div class='add'>+</div><div class='add'>+# Select if architecture uses the common generic TIF bits</div><div class='add'>+config HAVE_GENERIC_TIF_BITS</div><div class='add'>+       bool</div><div class='add'>+</div><div class='ctx'> source "kernel/gcov/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "scripts/gcc-plugins/Kconfig"</div><div class='hunk'>@@ -1684,4 +1824,13 @@ config CC_HAS_SANE_FUNCTION_ALIGNMENT</div><div class='ctx'> config ARCH_NEED_CMPXCHG_1_EMU</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config ARCH_WANTS_PRE_LINK_VMLINUX</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture can select this if it provides arch/&lt;arch&gt;/tools/Makefile</div><div class='add'>+	  with .arch.vmlinux.o target to be linked into vmlinux.</div><div class='add'>+</div><div class='add'>+config ARCH_HAS_CPU_ATTACK_VECTORS</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig<br/>index 109a4cddcd13..80367f2cf821 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/Kconfig</a></div><div class='hunk'>@@ -7,6 +7,7 @@ config ALPHA</div><div class='ctx'> 	select ARCH_HAS_DMA_OPS if PCI</div><div class='ctx'> 	select ARCH_MIGHT_HAVE_PC_PARPORT</div><div class='ctx'> 	select ARCH_MIGHT_HAVE_PC_SERIO</div><div class='add'>+	select ARCH_MODULE_NEEDS_WEAK_PER_CPU if SMP</div><div class='ctx'> 	select ARCH_NO_PREEMPT</div><div class='ctx'> 	select ARCH_NO_SG_CHAIN</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF</div><div class='head'>diff --git a/arch/alpha/configs/defconfig b/arch/alpha/configs/defconfig<br/>index 1816c1dc22b1..3280bd9e6578 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/configs/defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/configs/defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/configs/defconfig</a></div><div class='hunk'>@@ -51,7 +51,6 @@ CONFIG_SERIAL_8250_CONSOLE=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_CMOS=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_ISO9660_FS=y</div><div class='ctx'> CONFIG_MSDOS_FS=y</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='head'>diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild<br/>index 396caece6d6d..483965c5a4de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/Kbuild</a></div><div class='hunk'>@@ -5,3 +5,4 @@ generic-y += agp.h</div><div class='ctx'> generic-y += asm-offsets.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h<br/>index 3e33621922c3..76e4343c090f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/bitops.h</a></div><div class='hunk'>@@ -328,7 +328,7 @@ static inline unsigned long ffz_b(unsigned long x)</div><div class='ctx'> 	return sum;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long ffz(unsigned long word)</div><div class='add'>+static inline unsigned long __attribute_const__ ffz(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6) &amp;&amp; defined(CONFIG_ALPHA_EV67)</div><div class='ctx'> 	/* Whee.  EV67 can calculate it directly.  */</div><div class='hunk'>@@ -348,7 +348,7 @@ static inline unsigned long ffz(unsigned long word)</div><div class='ctx'> /*</div><div class='ctx'>  * __ffs = Find First set bit in word.  Undefined if no set bit exists.</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long __ffs(unsigned long word)</div><div class='add'>+static inline __attribute_const__ unsigned long __ffs(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6) &amp;&amp; defined(CONFIG_ALPHA_EV67)</div><div class='ctx'> 	/* Whee.  EV67 can calculate it directly.  */</div><div class='hunk'>@@ -373,7 +373,7 @@ static inline unsigned long __ffs(unsigned long word)</div><div class='ctx'>  * differs in spirit from the above __ffs.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline int ffs(int word)</div><div class='add'>+static inline __attribute_const__ int ffs(int word)</div><div class='ctx'> {</div><div class='ctx'> 	int result = __ffs(word) + 1;</div><div class='ctx'> 	return word ? result : 0;</div><div class='hunk'>@@ -383,14 +383,14 @@ static inline int ffs(int word)</div><div class='ctx'>  * fls: find last bit set.</div><div class='ctx'>  */</div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6) &amp;&amp; defined(CONFIG_ALPHA_EV67)</div><div class='del'>-static inline int fls64(unsigned long word)</div><div class='add'>+static inline __attribute_const__ int fls64(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	return 64 - __kernel_ctlz(word);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> extern const unsigned char __flsm1_tab[256];</div><div class='ctx'> </div><div class='del'>-static inline int fls64(unsigned long x)</div><div class='add'>+static inline __attribute_const__ int fls64(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long t, a, r;</div><div class='ctx'> </div><div class='hunk'>@@ -403,12 +403,12 @@ static inline int fls64(unsigned long x)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline unsigned long __fls(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __fls(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	return fls64(x) - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int fls(unsigned int x)</div><div class='add'>+static inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	return fls64(x);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h<br/>index 4d7c46f50382..50c82187e60e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/elf.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/elf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/elf.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/elf.h</a></div><div class='hunk'>@@ -74,7 +74,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];</div><div class='ctx'> /*</div><div class='ctx'>  * This is used to ensure we don't load something for the wrong architecture.</div><div class='ctx'>  */</div><div class='del'>-#define elf_check_arch(x) ((x)-&gt;e_machine == EM_ALPHA)</div><div class='add'>+#define elf_check_arch(x) (((x)-&gt;e_machine == EM_ALPHA) &amp;&amp; !((x)-&gt;e_flags &amp; EF_ALPHA_32BIT))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are used to set parameters in the core dumps.</div><div class='hunk'>@@ -137,10 +137,6 @@ extern int dump_elf_task(elf_greg_t *dest, struct task_struct *task);</div><div class='ctx'> 	: amask (AMASK_CIX) ? "ev6" : "ev67");	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define SET_PERSONALITY(EX)					\</div><div class='del'>-	set_personality(((EX).e_flags &amp; EF_ALPHA_32BIT)		\</div><div class='del'>-	   ? PER_LINUX_32BIT : PER_LINUX)</div><div class='del'>-</div><div class='ctx'> extern int alpha_l1i_cacheshape;</div><div class='ctx'> extern int alpha_l1d_cacheshape;</div><div class='ctx'> extern int alpha_l2_cacheshape;</div><div class='head'>diff --git a/arch/alpha/include/asm/floppy.h b/arch/alpha/include/asm/floppy.h<br/>index 64b42d9591fc..5a6239e65097 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/floppy.h</a></div><div class='hunk'>@@ -90,25 +90,6 @@ static int FDC2 = -1;</div><div class='ctx'> #define N_FDC 2</div><div class='ctx'> #define N_DRIVE 8</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Most Alphas have no problems with floppy DMA crossing 64k borders,</div><div class='del'>- * except for certain ones, like XL and RUFFIAN.</div><div class='del'>- *</div><div class='del'>- * However, the test is simple and fast, and this *is* floppy, after all,</div><div class='del'>- * so we do it for all platforms, just to make sure.</div><div class='del'>- *</div><div class='del'>- * This is advantageous in other circumstances as well, as in moving</div><div class='del'>- * about the PCI DMA windows and forcing the floppy to start doing</div><div class='del'>- * scatter-gather when it never had before, and there *is* a problem</div><div class='del'>- * on that platform... ;-}</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline unsigned long CROSS_64KB(void *a, unsigned long s)</div><div class='del'>-{</div><div class='del'>-	unsigned long p = (unsigned long)a;</div><div class='del'>-	return ((p + s - 1) ^ p) &amp; ~0xffffUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define EXTRA_FLOPPY_PARAMS</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ALPHA_FLOPPY_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/hwrpb.h b/arch/alpha/include/asm/hwrpb.h<br/>index fc76f36265ad..db831cf8de10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/hwrpb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/hwrpb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/hwrpb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/hwrpb.h</a></div><div class='hunk'>@@ -135,7 +135,7 @@ struct crb_struct {</div><div class='ctx'> 	/* virtual-&gt;physical map */</div><div class='ctx'> 	unsigned long map_entries;</div><div class='ctx'> 	unsigned long map_pages;</div><div class='del'>-	struct vf_map_struct map[1];</div><div class='add'>+	struct vf_map_struct map[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct memclust_struct {</div><div class='head'>diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h<br/>index b191d87f89c4..fa3e4c246cda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/io.h</a></div><div class='hunk'>@@ -10,10 +10,6 @@</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='ctx'> </div><div class='del'>-/* The generic header contains only prototypes.  Including it ensures that</div><div class='del'>-   the implementation we have here matches that interface.  */</div><div class='del'>-#include &lt;asm-generic/iomap.h&gt;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Virtual -&gt; physical identity mapping starts at this offset</div><div class='ctx'>  */</div><div class='hunk'>@@ -88,7 +84,6 @@ static inline void * phys_to_virt(unsigned long address)</div><div class='ctx'> </div><div class='ctx'> #define virt_to_phys		virt_to_phys</div><div class='ctx'> #define phys_to_virt		phys_to_virt</div><div class='del'>-#define page_to_phys(page)	page_to_pa(page)</div><div class='ctx'> </div><div class='ctx'> /* Maximum PIO space address supported?  */</div><div class='ctx'> #define IO_SPACE_LIMIT 0xffff</div><div class='hunk'>@@ -277,13 +272,24 @@ extern void		__raw_writeq(u64 b, volatile void __iomem *addr);</div><div class='ctx'> #define __raw_writel __raw_writel</div><div class='ctx'> #define __raw_writeq __raw_writeq</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Mapping from port numbers to __iomem space is pretty easy.</div><div class='del'>- */</div><div class='add'>+extern unsigned int ioread8(const void __iomem *);</div><div class='add'>+extern unsigned int ioread16(const void __iomem *);</div><div class='add'>+extern unsigned int ioread32(const void __iomem *);</div><div class='add'>+extern u64 ioread64(const void __iomem *);</div><div class='add'>+</div><div class='add'>+extern void iowrite8(u8, void __iomem *);</div><div class='add'>+extern void iowrite16(u16, void __iomem *);</div><div class='add'>+extern void iowrite32(u32, void __iomem *);</div><div class='add'>+extern void iowrite64(u64, void __iomem *);</div><div class='add'>+</div><div class='add'>+extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='add'>+extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='add'>+extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='add'>+</div><div class='add'>+extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='add'>+extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='add'>+extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='ctx'> </div><div class='del'>-/* These two have to be extern inline because of the extern prototype from</div><div class='del'>-   &lt;asm-generic/iomap.h&gt;.  It is not legal to mix "extern" and "static" for</div><div class='del'>-   the same declaration.  */</div><div class='ctx'> extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)</div><div class='ctx'> {</div><div class='ctx'> 	return IO_CONCAT(__IO_PREFIX,ioportmap) (port);</div><div class='hunk'>@@ -630,10 +636,6 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);</div><div class='ctx'> #define RTC_PORT(x)	(0x70 + (x))</div><div class='ctx'> #define RTC_ALWAYS_BCD	0</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * These get provided from &lt;asm-generic/iomap.h&gt; since alpha does not</div><div class='del'>- * select GENERIC_IOMAP.</div><div class='del'>- */</div><div class='ctx'> #define ioread64 ioread64</div><div class='ctx'> #define iowrite64 iowrite64</div><div class='ctx'> #define ioread8_rep ioread8_rep</div><div class='head'>diff --git a/arch/alpha/include/asm/page.h b/arch/alpha/include/asm/page.h<br/>index 70419e6be1a3..5ec4c77e432e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/page.h</a></div><div class='hunk'>@@ -4,11 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> #include &lt;asm/pal.h&gt;</div><div class='del'>-</div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1,UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -18,7 +14,7 @@ extern void clear_page(void *page);</div><div class='ctx'> #define clear_user_page(page, vaddr, pg)	clear_page(page)</div><div class='ctx'> </div><div class='ctx'> #define vma_alloc_zeroed_movable_folio(vma, vaddr) \</div><div class='del'>-	vma_alloc_folio(GFP_HIGHUSER_MOVABLE | __GFP_ZERO, 0, vma, vaddr, false)</div><div class='add'>+	vma_alloc_folio(GFP_HIGHUSER_MOVABLE | __GFP_ZERO, 0, vma, vaddr)</div><div class='ctx'> </div><div class='ctx'> extern void copy_page(void * _to, void * _from);</div><div class='ctx'> #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)</div><div class='head'>diff --git a/arch/alpha/include/asm/param.h b/arch/alpha/include/asm/param.h<br/>deleted file mode 100644<br/>index cfe947ce9461..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/param.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/param.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef _ASM_ALPHA_PARAM_H</div><div class='del'>-#define _ASM_ALPHA_PARAM_H</div><div class='del'>-</div><div class='del'>-#include &lt;uapi/asm/param.h&gt;</div><div class='del'>-</div><div class='del'>-# undef HZ</div><div class='del'>-# define HZ		CONFIG_HZ</div><div class='del'>-# define USER_HZ	1024</div><div class='del'>-# define CLOCKS_PER_SEC	USER_HZ	/* frequency at which times() counts */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_ALPHA_PARAM_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/percpu.h b/arch/alpha/include/asm/percpu.h<br/>index 6923249f2d49..4383d66341dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/percpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/percpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/percpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/percpu.h</a></div><div class='hunk'>@@ -9,10 +9,9 @@</div><div class='ctx'>  * way above 4G.</div><div class='ctx'>  *</div><div class='ctx'>  * Always use weak definitions for percpu variables in modules.</div><div class='add'>+ * Therefore, we have enabled CONFIG_ARCH_MODULE_NEEDS_WEAK_PER_CPU</div><div class='add'>+ * in the Kconfig.</div><div class='ctx'>  */</div><div class='del'>-#if defined(MODULE) &amp;&amp; defined(CONFIG_SMP)</div><div class='del'>-#define ARCH_NEEDS_WEAK_PER_CPU</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/percpu.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/asm/pgtable.h b/arch/alpha/include/asm/pgtable.h<br/>index 635f0a5f5bbd..90e7a9539102 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/pgtable.h</a></div><div class='hunk'>@@ -107,7 +107,7 @@ struct vm_area_struct;</div><div class='ctx'> </div><div class='ctx'> #define _PAGE_NORMAL(x) __pgprot(_PAGE_VALID | __ACCESS_BITS | (x))</div><div class='ctx'> </div><div class='del'>-#define _PAGE_P(x) _PAGE_NORMAL((x) | (((x) &amp; _PAGE_FOW)?0:_PAGE_FOW))</div><div class='add'>+#define _PAGE_P(x) _PAGE_NORMAL((x) | _PAGE_FOW)</div><div class='ctx'> #define _PAGE_S(x) _PAGE_NORMAL(x)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -126,34 +126,11 @@ struct vm_area_struct;</div><div class='ctx'> #define pgprot_noncached(prot)	(prot)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * BAD_PAGETABLE is used when we need a bogus page-table, while</div><div class='del'>- * BAD_PAGE is used for a bogus page.</div><div class='del'>- *</div><div class='ctx'>  * ZERO_PAGE is a global shared page that is always zero:  used</div><div class='ctx'>  * for zero-mapped memory areas etc..</div><div class='ctx'>  */</div><div class='del'>-extern pte_t __bad_page(void);</div><div class='del'>-extern pmd_t * __bad_pagetable(void);</div><div class='del'>-</div><div class='del'>-extern unsigned long __zero_page(void);</div><div class='del'>-</div><div class='del'>-#define BAD_PAGETABLE	__bad_pagetable()</div><div class='del'>-#define BAD_PAGE	__bad_page()</div><div class='ctx'> #define ZERO_PAGE(vaddr)	(virt_to_page(ZERO_PGE))</div><div class='ctx'> </div><div class='del'>-/* number of bits that fit into a memory pointer */</div><div class='del'>-#define BITS_PER_PTR			(8*sizeof(unsigned long))</div><div class='del'>-</div><div class='del'>-/* to align the pointer to a pointer address */</div><div class='del'>-#define PTR_MASK			(~(sizeof(void*)-1))</div><div class='del'>-</div><div class='del'>-/* sizeof(void*)==1&lt;&lt;SIZEOF_PTR_LOG2 */</div><div class='del'>-#define SIZEOF_PTR_LOG2			3</div><div class='del'>-</div><div class='del'>-/* to find an entry in a page-table */</div><div class='del'>-#define PAGE_PTR(address)		\</div><div class='del'>-  ((unsigned long)(address)&gt;&gt;(PAGE_SHIFT-SIZEOF_PTR_LOG2)&amp;PTR_MASK&amp;~PAGE_MASK)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * On certain platforms whose physical address space can overlap KSEG,</div><div class='ctx'>  * namely EV6 and above, we must re-twiddle the physaddr to restore the</div><div class='hunk'>@@ -192,13 +169,6 @@ extern unsigned long __zero_page(void);</div><div class='ctx'> #define pte_pfn(pte)		(pte_val(pte) &gt;&gt; PFN_PTE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #define pte_page(pte)	pfn_to_page(pte_pfn(pte))</div><div class='del'>-#define mk_pte(page, pgprot)						\</div><div class='del'>-({									\</div><div class='del'>-	pte_t pte;							\</div><div class='del'>-									\</div><div class='del'>-	pte_val(pte) = (page_to_pfn(page) &lt;&lt; 32) | pgprot_val(pgprot);	\</div><div class='del'>-	pte;								\</div><div class='del'>-})</div><div class='ctx'> </div><div class='ctx'> extern inline pte_t pfn_pte(unsigned long physpfn, pgprot_t pgprot)</div><div class='ctx'> { pte_t pte; pte_val(pte) = (PHYS_TWIDDLE(physpfn) &lt;&lt; 32) | pgprot_val(pgprot); return pte; }</div><div class='hunk'>@@ -334,7 +304,7 @@ extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)	((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -360,7 +330,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> extern void paging_init(void);</div><div class='ctx'> </div><div class='del'>-/* We have our own get_unmapped_area to cope with ADDR_LIMIT_32BIT.  */</div><div class='add'>+/* We have our own get_unmapped_area */</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA</div><div class='ctx'> </div><div class='ctx'> #endif /* _ALPHA_PGTABLE_H */</div><div class='head'>diff --git a/arch/alpha/include/asm/processor.h b/arch/alpha/include/asm/processor.h<br/>index 55bb1c09fd39..5dce5518a211 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/processor.h</a></div><div class='hunk'>@@ -8,23 +8,19 @@</div><div class='ctx'> #ifndef __ASM_ALPHA_PROCESSOR_H</div><div class='ctx'> #define __ASM_ALPHA_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/personality.h&gt;	/* for ADDR_LIMIT_32BIT */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * We have a 42-bit user address space: 4TB user VM...</div><div class='ctx'>  */</div><div class='ctx'> #define TASK_SIZE (0x40000000000UL)</div><div class='ctx'> </div><div class='del'>-#define STACK_TOP \</div><div class='del'>-  (current-&gt;personality &amp; ADDR_LIMIT_32BIT ? 0x80000000 : 0x00120000000UL)</div><div class='add'>+#define STACK_TOP (0x00120000000UL)</div><div class='ctx'> </div><div class='ctx'> #define STACK_TOP_MAX	0x00120000000UL</div><div class='ctx'> </div><div class='ctx'> /* This decides where the kernel will search for a free chunk of vm</div><div class='ctx'>  * space during mmap's.</div><div class='ctx'>  */</div><div class='del'>-#define TASK_UNMAPPED_BASE \</div><div class='del'>-  ((current-&gt;personality &amp; ADDR_LIMIT_32BIT) ? 0x40000000 : TASK_SIZE / 2)</div><div class='add'>+#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)</div><div class='ctx'> </div><div class='ctx'> /* This is dead.  Everything has been moved to thread_info.  */</div><div class='ctx'> struct thread_struct { };</div><div class='head'>diff --git a/arch/alpha/include/asm/spinlock_types.h b/arch/alpha/include/asm/spinlock_types.h<br/>index 2526fd3be5fd..05a444d77c53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #define _ALPHA_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_RAW_H</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/mman.h b/arch/alpha/include/uapi/asm/mman.h<br/>index 763929e814e9..1e700468a685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/uapi/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/uapi/asm/mman.h</a></div><div class='hunk'>@@ -78,6 +78,9 @@</div><div class='ctx'> </div><div class='ctx'> #define MADV_COLLAPSE	25		/* Synchronous hugepage collapse */</div><div class='ctx'> </div><div class='add'>+#define MADV_GUARD_INSTALL 102		/* fatal signal on access to range */</div><div class='add'>+#define MADV_GUARD_REMOVE 103		/* unguard range */</div><div class='add'>+</div><div class='ctx'> /* compatibility flags */</div><div class='ctx'> #define MAP_FILE	0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/param.h b/arch/alpha/include/uapi/asm/param.h<br/>index 49c7119934e2..e4e410f9bf85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/param.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/uapi/asm/param.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/param.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/uapi/asm/param.h</a></div><div class='hunk'>@@ -2,14 +2,9 @@</div><div class='ctx'> #ifndef _UAPI_ASM_ALPHA_PARAM_H</div><div class='ctx'> #define _UAPI_ASM_ALPHA_PARAM_H</div><div class='ctx'> </div><div class='del'>-#define HZ		1024</div><div class='del'>-</div><div class='add'>+#define __USER_HZ	1024</div><div class='ctx'> #define EXEC_PAGESIZE	8192</div><div class='ctx'> </div><div class='del'>-#ifndef NOGROUP</div><div class='del'>-#define NOGROUP		(-1)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define MAXHOSTNAMELEN	64	/* max length of hostname */</div><div class='add'>+#include &lt;asm-generic/param.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_ALPHA_PARAM_H */</div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/ptrace.h b/arch/alpha/include/uapi/asm/ptrace.h<br/>index 5ca45934fcbb..72ed913a910f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -42,6 +42,8 @@ struct pt_regs {</div><div class='ctx'> 	unsigned long trap_a0;</div><div class='ctx'> 	unsigned long trap_a1;</div><div class='ctx'> 	unsigned long trap_a2;</div><div class='add'>+/* This makes the stack 16-byte aligned as GCC expects */</div><div class='add'>+	unsigned long __pad0;</div><div class='ctx'> /* These are saved by PAL-code: */</div><div class='ctx'> 	unsigned long ps;</div><div class='ctx'> 	unsigned long pc;</div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/socket.h b/arch/alpha/include/uapi/asm/socket.h<br/>index 251b73c5481e..5ef57f88df6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/socket.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/include/uapi/asm/socket.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -146,6 +146,15 @@</div><div class='ctx'> #define SCM_DEVMEM_DMABUF	SO_DEVMEM_DMABUF</div><div class='ctx'> #define SO_DEVMEM_DONTNEED	80</div><div class='ctx'> </div><div class='add'>+#define SCM_TS_OPT_ID		81</div><div class='add'>+</div><div class='add'>+#define SO_RCVPRIORITY		82</div><div class='add'>+</div><div class='add'>+#define SO_PASSRIGHTS		83</div><div class='add'>+</div><div class='add'>+#define SO_INQ			84</div><div class='add'>+#define SCM_INQ			SO_INQ</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> #if __BITS_PER_LONG == 64</div><div class='head'>diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile<br/>index b6c862dff1f6..187cd8df2faf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y		:= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	:= vmlinux.lds</div><div class='ctx'> asflags-y	:= $(KBUILD_CFLAGS)</div><div class='ctx'> ccflags-y	:= -Wno-sign-compare</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/asm-offsets.c b/arch/alpha/kernel/asm-offsets.c<br/>index 4cfeae42c79a..1ebb05890499 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * This code generates raw asm output which is post-processed to extract</div><div class='ctx'>  * and format the required data.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='hunk'>@@ -19,9 +20,13 @@ static void __used foo(void)</div><div class='ctx'> 	DEFINE(TI_STATUS, offsetof(struct thread_info, status));</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='add'>+	DEFINE(SP_OFF, offsetof(struct pt_regs, ps));</div><div class='ctx'> 	DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs));</div><div class='ctx'> 	BLANK();</div><div class='ctx'> </div><div class='add'>+	DEFINE(SWITCH_STACK_SIZE, sizeof(struct switch_stack));</div><div class='add'>+	BLANK();</div><div class='add'>+</div><div class='ctx'> 	DEFINE(HAE_CACHE, offsetof(struct alpha_machine_vector, hae_cache));</div><div class='ctx'> 	DEFINE(HAE_REG, offsetof(struct alpha_machine_vector, hae_register));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c<br/>index ca3d9c732b61..6e577228e175 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/core_cia.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/core_cia.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/core_cia.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/core_cia.c</a></div><div class='hunk'>@@ -331,10 +331,7 @@ cia_prepare_tbia_workaround(int window)</div><div class='ctx'> 	long i;</div><div class='ctx'> </div><div class='ctx'> 	/* Use minimal 1K map. */</div><div class='del'>-	ppte = memblock_alloc(CIA_BROKEN_TBIA_SIZE, 32768);</div><div class='del'>-	if (!ppte)</div><div class='del'>-		panic("%s: Failed to allocate %u bytes align=0x%x\n",</div><div class='del'>-		      __func__, CIA_BROKEN_TBIA_SIZE, 32768);</div><div class='add'>+	ppte = memblock_alloc_or_panic(CIA_BROKEN_TBIA_SIZE, 32768);</div><div class='ctx'> 	pte = (virt_to_phys(ppte) &gt;&gt; (PAGE_SHIFT - 1)) | 1;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; CIA_BROKEN_TBIA_SIZE / sizeof(unsigned long); ++i)</div><div class='head'>diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c<br/>index b22248044bf0..d38f4d6759e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/core_marvel.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/core_marvel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/core_marvel.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/core_marvel.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/mc146818rtc.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -79,13 +80,12 @@ mk_resource_name(int pe, int port, char *str)</div><div class='ctx'> {</div><div class='ctx'> 	char tmp[80];</div><div class='ctx'> 	char *name;</div><div class='del'>-	</div><div class='del'>-	sprintf(tmp, "PCI %s PE %d PORT %d", str, pe, port);</div><div class='del'>-	name = memblock_alloc(strlen(tmp) + 1, SMP_CACHE_BYTES);</div><div class='del'>-	if (!name)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      strlen(tmp) + 1);</div><div class='del'>-	strcpy(name, tmp);</div><div class='add'>+	size_t sz;</div><div class='add'>+</div><div class='add'>+	sz = scnprintf(tmp, sizeof(tmp), "PCI %s PE %d PORT %d", str, pe, port);</div><div class='add'>+	sz += 1; /* NUL terminator */</div><div class='add'>+	name = memblock_alloc_or_panic(sz, SMP_CACHE_BYTES);</div><div class='add'>+	strscpy(name, tmp, sz);</div><div class='ctx'> </div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='hunk'>@@ -119,10 +119,7 @@ alloc_io7(unsigned int pe)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	io7 = memblock_alloc(sizeof(*io7), SMP_CACHE_BYTES);</div><div class='del'>-	if (!io7)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(*io7));</div><div class='add'>+	io7 = memblock_alloc_or_panic(sizeof(*io7), SMP_CACHE_BYTES);</div><div class='ctx'> 	io7-&gt;pe = pe;</div><div class='ctx'> 	raw_spin_lock_init(&amp;io7-&gt;irq_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S<br/>index dd26062d75b3..f4d41b4538c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/entry.S</a></div><div class='hunk'>@@ -15,10 +15,6 @@</div><div class='ctx'> 	.set noat</div><div class='ctx'> 	.cfi_sections	.debug_frame</div><div class='ctx'> </div><div class='del'>-/* Stack offsets.  */</div><div class='del'>-#define SP_OFF			184</div><div class='del'>-#define SWITCH_STACK_SIZE	64</div><div class='del'>-</div><div class='ctx'> .macro	CFI_START_OSF_FRAME	func</div><div class='ctx'> 	.align	4</div><div class='ctx'> 	.globl	\func</div><div class='hunk'>@@ -198,8 +194,8 @@ CFI_END_OSF_FRAME entArith</div><div class='ctx'> CFI_START_OSF_FRAME entMM</div><div class='ctx'> 	SAVE_ALL</div><div class='ctx'> /* save $9 - $15 so the inline exception code can manipulate them.  */</div><div class='del'>-	subq	$sp, 56, $sp</div><div class='del'>-	.cfi_adjust_cfa_offset	56</div><div class='add'>+	subq	$sp, 64, $sp</div><div class='add'>+	.cfi_adjust_cfa_offset	64</div><div class='ctx'> 	stq	$9, 0($sp)</div><div class='ctx'> 	stq	$10, 8($sp)</div><div class='ctx'> 	stq	$11, 16($sp)</div><div class='hunk'>@@ -214,7 +210,7 @@ CFI_START_OSF_FRAME entMM</div><div class='ctx'> 	.cfi_rel_offset	$13, 32</div><div class='ctx'> 	.cfi_rel_offset	$14, 40</div><div class='ctx'> 	.cfi_rel_offset	$15, 48</div><div class='del'>-	addq	$sp, 56, $19</div><div class='add'>+	addq	$sp, 64, $19</div><div class='ctx'> /* handle the fault */</div><div class='ctx'> 	lda	$8, 0x3fff</div><div class='ctx'> 	bic	$sp, $8, $8</div><div class='hunk'>@@ -227,7 +223,7 @@ CFI_START_OSF_FRAME entMM</div><div class='ctx'> 	ldq	$13, 32($sp)</div><div class='ctx'> 	ldq	$14, 40($sp)</div><div class='ctx'> 	ldq	$15, 48($sp)</div><div class='del'>-	addq	$sp, 56, $sp</div><div class='add'>+	addq	$sp, 64, $sp</div><div class='ctx'> 	.cfi_restore	$9</div><div class='ctx'> 	.cfi_restore	$10</div><div class='ctx'> 	.cfi_restore	$11</div><div class='hunk'>@@ -235,7 +231,7 @@ CFI_START_OSF_FRAME entMM</div><div class='ctx'> 	.cfi_restore	$13</div><div class='ctx'> 	.cfi_restore	$14</div><div class='ctx'> 	.cfi_restore	$15</div><div class='del'>-	.cfi_adjust_cfa_offset	-56</div><div class='add'>+	.cfi_adjust_cfa_offset	-64</div><div class='ctx'> /* finish up the syscall as normal.  */</div><div class='ctx'> 	br	ret_from_sys_call</div><div class='ctx'> CFI_END_OSF_FRAME entMM</div><div class='hunk'>@@ -382,8 +378,8 @@ entUnaUser:</div><div class='ctx'> 	.cfi_restore	$0</div><div class='ctx'> 	.cfi_adjust_cfa_offset	-256</div><div class='ctx'> 	SAVE_ALL		/* setup normal kernel stack */</div><div class='del'>-	lda	$sp, -56($sp)</div><div class='del'>-	.cfi_adjust_cfa_offset	56</div><div class='add'>+	lda	$sp, -64($sp)</div><div class='add'>+	.cfi_adjust_cfa_offset	64</div><div class='ctx'> 	stq	$9, 0($sp)</div><div class='ctx'> 	stq	$10, 8($sp)</div><div class='ctx'> 	stq	$11, 16($sp)</div><div class='hunk'>@@ -399,7 +395,7 @@ entUnaUser:</div><div class='ctx'> 	.cfi_rel_offset	$14, 40</div><div class='ctx'> 	.cfi_rel_offset	$15, 48</div><div class='ctx'> 	lda	$8, 0x3fff</div><div class='del'>-	addq	$sp, 56, $19</div><div class='add'>+	addq	$sp, 64, $19</div><div class='ctx'> 	bic	$sp, $8, $8</div><div class='ctx'> 	jsr	$26, do_entUnaUser</div><div class='ctx'> 	ldq	$9, 0($sp)</div><div class='hunk'>@@ -409,7 +405,7 @@ entUnaUser:</div><div class='ctx'> 	ldq	$13, 32($sp)</div><div class='ctx'> 	ldq	$14, 40($sp)</div><div class='ctx'> 	ldq	$15, 48($sp)</div><div class='del'>-	lda	$sp, 56($sp)</div><div class='add'>+	lda	$sp, 64($sp)</div><div class='ctx'> 	.cfi_restore	$9</div><div class='ctx'> 	.cfi_restore	$10</div><div class='ctx'> 	.cfi_restore	$11</div><div class='hunk'>@@ -417,7 +413,7 @@ entUnaUser:</div><div class='ctx'> 	.cfi_restore	$13</div><div class='ctx'> 	.cfi_restore	$14</div><div class='ctx'> 	.cfi_restore	$15</div><div class='del'>-	.cfi_adjust_cfa_offset	-56</div><div class='add'>+	.cfi_adjust_cfa_offset	-64</div><div class='ctx'> 	br	ret_from_sys_call</div><div class='ctx'> CFI_END_OSF_FRAME entUna</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c<br/>index c0424de9e7cd..a08e8edef1a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/osf_sys.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/osf_sys.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/osf_sys.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/osf_sys.c</a></div><div class='hunk'>@@ -152,7 +152,7 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd,</div><div class='ctx'> 		long __user *, basep)</div><div class='ctx'> {</div><div class='ctx'> 	int error;</div><div class='del'>-	struct fd arg = fdget_pos(fd);</div><div class='add'>+	CLASS(fd_pos, arg)(fd);</div><div class='ctx'> 	struct osf_dirent_callback buf = {</div><div class='ctx'> 		.ctx.actor = osf_filldir,</div><div class='ctx'> 		.dirent = dirent,</div><div class='hunk'>@@ -160,7 +160,7 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd,</div><div class='ctx'> 		.count = count</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	if (!fd_file(arg))</div><div class='add'>+	if (fd_empty(arg))</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	error = iterate_dir(fd_file(arg), &amp;buf.ctx);</div><div class='hunk'>@@ -169,7 +169,6 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd,</div><div class='ctx'> 	if (count != buf.count)</div><div class='ctx'> 		error = count - buf.count;</div><div class='ctx'> </div><div class='del'>-	fdput_pos(arg);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1211,8 +1210,7 @@ SYSCALL_DEFINE1(old_adjtimex, struct timex32 __user *, txc_p)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Get an address range which is currently unmapped.  Similar to the</div><div class='del'>-   generic version except that we know how to honor ADDR_LIMIT_32BIT.  */</div><div class='add'>+/* Get an address range which is currently unmapped. */</div><div class='ctx'> </div><div class='ctx'> static unsigned long</div><div class='ctx'> arch_get_unmapped_area_1(unsigned long addr, unsigned long len,</div><div class='hunk'>@@ -1231,13 +1229,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,</div><div class='ctx'> 		       unsigned long len, unsigned long pgoff,</div><div class='ctx'> 		       unsigned long flags, vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='del'>-	unsigned long limit;</div><div class='del'>-</div><div class='del'>-	/* "32 bit" actually means 31 bit, since pointers sign extend.  */</div><div class='del'>-	if (current-&gt;personality &amp; ADDR_LIMIT_32BIT)</div><div class='del'>-		limit = 0x80000000;</div><div class='del'>-	else</div><div class='del'>-		limit = TASK_SIZE;</div><div class='add'>+	unsigned long limit = TASK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; limit)</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/alpha/kernel/pci-sysfs.c b/arch/alpha/kernel/pci-sysfs.c<br/>index 5808a66e2a81..3048758304b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci-sysfs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci-sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci-sysfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/pci-sysfs.c</a></div><div class='hunk'>@@ -64,7 +64,7 @@ static int __pci_mmap_fits(struct pci_dev *pdev, int num,</div><div class='ctx'>  * Return: %0 on success, negative error code otherwise</div><div class='ctx'>  */</div><div class='ctx'> static int pci_mmap_resource(struct kobject *kobj,</div><div class='del'>-			     struct bin_attribute *attr,</div><div class='add'>+			     const struct bin_attribute *attr,</div><div class='ctx'> 			     struct vm_area_struct *vma, int sparse)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));</div><div class='hunk'>@@ -93,14 +93,14 @@ static int pci_mmap_resource(struct kobject *kobj,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pci_mmap_resource_sparse(struct file *filp, struct kobject *kobj,</div><div class='del'>-				    struct bin_attribute *attr,</div><div class='add'>+				    const struct bin_attribute *attr,</div><div class='ctx'> 				    struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	return pci_mmap_resource(kobj, attr, vma, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj,</div><div class='del'>-				   struct bin_attribute *attr,</div><div class='add'>+				   const struct bin_attribute *attr,</div><div class='ctx'> 				   struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	return pci_mmap_resource(kobj, attr, vma, 0);</div><div class='head'>diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c<br/>index 4458eb7f44f0..8e9b4ac86b7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/pci.c</a></div><div class='hunk'>@@ -391,10 +391,7 @@ alloc_pci_controller(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose;</div><div class='ctx'> </div><div class='del'>-	hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES);</div><div class='del'>-	if (!hose)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(*hose));</div><div class='add'>+	hose = memblock_alloc_or_panic(sizeof(*hose), SMP_CACHE_BYTES);</div><div class='ctx'> </div><div class='ctx'> 	*hose_tail = hose;</div><div class='ctx'> 	hose_tail = &amp;hose-&gt;next;</div><div class='hunk'>@@ -405,13 +402,7 @@ alloc_pci_controller(void)</div><div class='ctx'> struct resource * __init</div><div class='ctx'> alloc_resource(void)</div><div class='ctx'> {</div><div class='del'>-	void *ptr = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);</div><div class='del'>-</div><div class='del'>-	if (!ptr)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(struct resource));</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='add'>+	return memblock_alloc_or_panic(sizeof(struct resource), SMP_CACHE_BYTES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c<br/>index 7fcf3e9b7103..dc91de50f906 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci_iommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/pci_iommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/pci_iommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/pci_iommu.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/dma-map-ops.h&gt;</div><div class='ctx'> #include &lt;linux/iommu-helper.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/hwrpb.h&gt;</div><div class='hunk'>@@ -71,14 +72,8 @@ iommu_arena_new_node(int nid, struct pci_controller *hose, dma_addr_t base,</div><div class='ctx'> 	if (align &lt; mem_size)</div><div class='ctx'> 		align = mem_size;</div><div class='ctx'> </div><div class='del'>-	arena = memblock_alloc(sizeof(*arena), SMP_CACHE_BYTES);</div><div class='del'>-	if (!arena)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(*arena));</div><div class='del'>-	arena-&gt;ptes = memblock_alloc(mem_size, align);</div><div class='del'>-	if (!arena-&gt;ptes)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, mem_size, align);</div><div class='add'>+	arena = memblock_alloc_or_panic(sizeof(*arena), SMP_CACHE_BYTES);</div><div class='add'>+	arena-&gt;ptes = memblock_alloc_or_panic(mem_size, align);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;arena-&gt;lock);</div><div class='ctx'> 	arena-&gt;hose = hose;</div><div class='hunk'>@@ -218,7 +213,7 @@ static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)</div><div class='ctx'> </div><div class='ctx'> 	/* If both conditions above are met, we are fine. */</div><div class='ctx'> 	DBGA("pci_dac_dma_supported %s from %ps\n",</div><div class='del'>-	     ok ? "yes" : "no", __builtin_return_address(0));</div><div class='add'>+	     str_yes_no(ok), __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 	return ok;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c<br/>index 1f0eb4f25c0f..a3eaab094ece 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/perf_event.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/perf_event.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/perf_event.c</a></div><div class='hunk'>@@ -852,14 +852,9 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,</div><div class='ctx'> 	alpha_perf_event_update(event, hwc, idx, alpha_pmu-&gt;pmc_max_period[idx]+1);</div><div class='ctx'> 	perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> </div><div class='del'>-	if (alpha_perf_event_set_period(event, hwc, idx)) {</div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs)) {</div><div class='del'>-			/* Interrupts coming too quickly; "throttle" the</div><div class='del'>-			 * counter, i.e., disable it for a little while.</div><div class='del'>-			 */</div><div class='del'>-			alpha_pmu_stop(event, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (alpha_perf_event_set_period(event, hwc, idx))</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='add'>+</div><div class='ctx'> 	wrperfmon(PERFMON_CMD_ENABLE, cpuc-&gt;idx_mask);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='head'>diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c<br/>index 582d96548385..06522451f018 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/process.c</a></div><div class='hunk'>@@ -231,7 +231,7 @@ flush_thread(void)</div><div class='ctx'>  */</div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	extern void ret_from_fork(void);</div><div class='head'>diff --git a/arch/alpha/kernel/srmcons.c b/arch/alpha/kernel/srmcons.c<br/>index 3e61073f4b30..d19e51ec711d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/srmcons.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/srmcons.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/srmcons.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/srmcons.c</a></div><div class='hunk'>@@ -69,7 +69,8 @@ srmcons_do_receive_chars(struct tty_port *port)</div><div class='ctx'> static void</div><div class='ctx'> srmcons_receive_chars(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct srmcons_private *srmconsp = from_timer(srmconsp, t, timer);</div><div class='add'>+	struct srmcons_private *srmconsp = timer_container_of(srmconsp, t,</div><div class='add'>+							      timer);</div><div class='ctx'> 	struct tty_port *port = &amp;srmconsp-&gt;port;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int incr = 10;</div><div class='hunk'>@@ -177,7 +178,7 @@ srmcons_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> </div><div class='ctx'> 	if (tty-&gt;count == 1) {</div><div class='ctx'> 		port-&gt;tty = NULL;</div><div class='del'>-		del_timer(&amp;srmconsp-&gt;timer);</div><div class='add'>+		timer_delete(&amp;srmconsp-&gt;timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;port-&gt;lock, flags);</div><div class='hunk'>@@ -196,40 +197,44 @@ static const struct tty_operations srmcons_ops = {</div><div class='ctx'> static int __init</div><div class='ctx'> srmcons_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct tty_driver *driver;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='ctx'> 	timer_setup(&amp;srmcons_singleton.timer, srmcons_receive_chars, 0);</div><div class='del'>-	if (srm_is_registered_console) {</div><div class='del'>-		struct tty_driver *driver;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		driver = tty_alloc_driver(MAX_SRM_CONSOLE_DEVICES, 0);</div><div class='del'>-		if (IS_ERR(driver))</div><div class='del'>-			return PTR_ERR(driver);</div><div class='del'>-</div><div class='del'>-		tty_port_init(&amp;srmcons_singleton.port);</div><div class='del'>-</div><div class='del'>-		driver-&gt;driver_name = "srm";</div><div class='del'>-		driver-&gt;name = "srm";</div><div class='del'>-		driver-&gt;major = 0; 	/* dynamic */</div><div class='del'>-		driver-&gt;minor_start = 0;</div><div class='del'>-		driver-&gt;type = TTY_DRIVER_TYPE_SYSTEM;</div><div class='del'>-		driver-&gt;subtype = SYSTEM_TYPE_SYSCONS;</div><div class='del'>-		driver-&gt;init_termios = tty_std_termios;</div><div class='del'>-		tty_set_operations(driver, &amp;srmcons_ops);</div><div class='del'>-		tty_port_link_device(&amp;srmcons_singleton.port, driver, 0);</div><div class='del'>-		err = tty_register_driver(driver);</div><div class='del'>-		if (err) {</div><div class='del'>-			tty_driver_kref_put(driver);</div><div class='del'>-			tty_port_destroy(&amp;srmcons_singleton.port);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-		srmcons_driver = driver;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	return -ENODEV;</div><div class='add'>+	if (!srm_is_registered_console)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	driver = tty_alloc_driver(MAX_SRM_CONSOLE_DEVICES, 0);</div><div class='add'>+	if (IS_ERR(driver))</div><div class='add'>+		return PTR_ERR(driver);</div><div class='add'>+</div><div class='add'>+	tty_port_init(&amp;srmcons_singleton.port);</div><div class='add'>+</div><div class='add'>+	driver-&gt;driver_name = "srm";</div><div class='add'>+	driver-&gt;name = "srm";</div><div class='add'>+	driver-&gt;major = 0;	/* dynamic */</div><div class='add'>+	driver-&gt;minor_start = 0;</div><div class='add'>+	driver-&gt;type = TTY_DRIVER_TYPE_SYSTEM;</div><div class='add'>+	driver-&gt;subtype = SYSTEM_TYPE_SYSCONS;</div><div class='add'>+	driver-&gt;init_termios = tty_std_termios;</div><div class='add'>+	tty_set_operations(driver, &amp;srmcons_ops);</div><div class='add'>+	tty_port_link_device(&amp;srmcons_singleton.port, driver, 0);</div><div class='add'>+	err = tty_register_driver(driver);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_drv;</div><div class='add'>+</div><div class='add'>+	srmcons_driver = driver;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_free_drv:</div><div class='add'>+	tty_driver_kref_put(driver);</div><div class='add'>+	tty_port_destroy(&amp;srmcons_singleton.port);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> device_initcall(srmcons_init);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The console driver</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/alpha/kernel/syscalls/syscall.tbl b/arch/alpha/kernel/syscalls/syscall.tbl<br/>index 74720667fe09..16dca28ebf17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/syscalls/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/syscalls/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -502,3 +502,10 @@</div><div class='ctx'> 570	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 571	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 572	common  mseal				sys_mseal</div><div class='add'>+573	common	setxattrat			sys_setxattrat</div><div class='add'>+574	common	getxattrat			sys_getxattrat</div><div class='add'>+575	common	listxattrat			sys_listxattrat</div><div class='add'>+576	common	removexattrat			sys_removexattrat</div><div class='add'>+577	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+578	common	file_getattr			sys_file_getattr</div><div class='add'>+579	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c<br/>index a9a38c80c4a7..7004397937cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/kernel/traps.c</a></div><div class='hunk'>@@ -649,7 +649,7 @@ s_reg_to_mem (unsigned long s_reg)</div><div class='ctx'> static int unauser_reg_offsets[32] = {</div><div class='ctx'> 	R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),</div><div class='ctx'> 	/* r9 ... r15 are stored in front of regs.  */</div><div class='del'>-	-56, -48, -40, -32, -24, -16, -8,</div><div class='add'>+	-64, -56, -48, -40, -32, -24, -16,	/* padding at -8 */</div><div class='ctx'> 	R(r16), R(r17), R(r18),</div><div class='ctx'> 	R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),</div><div class='ctx'> 	R(r27), R(r28), R(gp),</div><div class='head'>diff --git a/arch/alpha/lib/fpreg.c b/arch/alpha/lib/fpreg.c<br/>index 9a238e7536ae..3d32165043f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/lib/fpreg.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/lib/fpreg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/lib/fpreg.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/lib/fpreg.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='del'>-#include &lt;asm/fpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)</div><div class='ctx'> #define STT(reg,val)  asm volatile ("ftoit $f"#reg",%0" : "=r"(val));</div><div class='head'>diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c<br/>index 8c9850437e67..a9816bbc9f34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/mm/fault.c</a></div><div class='hunk'>@@ -78,8 +78,8 @@ __load_new_mm_context(struct mm_struct *next_mm)</div><div class='ctx'> </div><div class='ctx'> /* Macro for exception fixup code to access integer registers.  */</div><div class='ctx'> #define dpf_reg(r)							\</div><div class='del'>-	(((unsigned long *)regs)[(r) &lt;= 8 ? (r) : (r) &lt;= 15 ? (r)-16 :	\</div><div class='del'>-				 (r) &lt;= 18 ? (r)+10 : (r)-10])</div><div class='add'>+	(((unsigned long *)regs)[(r) &lt;= 8 ? (r) : (r) &lt;= 15 ? (r)-17 :	\</div><div class='add'>+				 (r) &lt;= 18 ? (r)+11 : (r)-10])</div><div class='ctx'> </div><div class='ctx'> asmlinkage void</div><div class='ctx'> do_page_fault(unsigned long address, unsigned long mmcsr,</div><div class='head'>diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c<br/>index 4fe618446e4c..4c5ab9cd8a0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/alpha/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/alpha/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/alpha/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/alpha/mm/init.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@ pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *ret, *init;</div><div class='ctx'> </div><div class='del'>-	ret = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	ret = __pgd_alloc(mm, 0);</div><div class='ctx'> 	init = pgd_offset(&amp;init_mm, 0UL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> #ifdef CONFIG_ALPHA_LARGE_VMALLOC</div><div class='hunk'>@@ -60,33 +60,6 @@ pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * BAD_PAGE is the page that is used for page faults when linux</div><div class='del'>- * is out-of-memory. Older versions of linux just did a</div><div class='del'>- * do_exit(), but using this instead means there is less risk</div><div class='del'>- * for a process dying in kernel mode, possibly leaving an inode</div><div class='del'>- * unused etc..</div><div class='del'>- *</div><div class='del'>- * BAD_PAGETABLE is the accompanying page-table: it is initialized</div><div class='del'>- * to point to BAD_PAGE entries.</div><div class='del'>- *</div><div class='del'>- * ZERO_PAGE is a special page that is used for zero-initialized</div><div class='del'>- * data and COW.</div><div class='del'>- */</div><div class='del'>-pmd_t *</div><div class='del'>-__bad_pagetable(void)</div><div class='del'>-{</div><div class='del'>-	memset(absolute_pointer(EMPTY_PGT), 0, PAGE_SIZE);</div><div class='del'>-	return (pmd_t *) EMPTY_PGT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-pte_t</div><div class='del'>-__bad_page(void)</div><div class='del'>-{</div><div class='del'>-	memset(absolute_pointer(EMPTY_PGE), 0, PAGE_SIZE);</div><div class='del'>-	return pte_mkdirty(mk_pte(virt_to_page(EMPTY_PGE), PAGE_SHARED));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> load_PCB(struct pcb_struct *pcb)</div><div class='ctx'> {</div><div class='hunk'>@@ -273,14 +246,6 @@ srm_paging_stop (void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __init</div><div class='del'>-mem_init(void)</div><div class='del'>-{</div><div class='del'>-	set_max_mapnr(max_low_pfn);</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);</div><div class='del'>-	memblock_free_all();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const pgprot_t protection_map[16] = {</div><div class='ctx'> 	[VM_NONE]					= _PAGE_P(_PAGE_FOE | _PAGE_FOW |</div><div class='ctx'> 								  _PAGE_FOR),</div><div class='head'>diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig<br/>index 5b2488142041..f27e6b90428e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/Kconfig</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> config ARC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select ARC_TIMERS</div><div class='add'>+	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_CACHE_LINE_SIZE</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VM_PGTABLE</div><div class='ctx'> 	select ARCH_HAS_DMA_PREP_COHERENT</div><div class='hunk'>@@ -17,6 +18,7 @@ config ARC</div><div class='ctx'> 	select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC</div><div class='ctx'> 	select ARCH_32BIT_OFF_T</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT</div><div class='add'>+	select GENERIC_BUILTIN_DTB</div><div class='ctx'> 	select CLONE_BACKWARDS</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select DMA_DIRECT_REMAP</div><div class='hunk'>@@ -24,7 +26,6 @@ config ARC</div><div class='ctx'> 	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='del'>-	select GENERIC_PENDING_IRQ if SMP</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_IOREMAP</div><div class='hunk'>@@ -297,7 +298,6 @@ config ARC_PAGE_SIZE_16K</div><div class='ctx'> config ARC_PAGE_SIZE_4K</div><div class='ctx'> 	bool "4KB"</div><div class='ctx'> 	select HAVE_PAGE_SIZE_4KB</div><div class='del'>-	depends on ARC_MMU_V3 || ARC_MMU_V4</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='hunk'>@@ -474,7 +474,8 @@ config HIGHMEM</div><div class='ctx'> </div><div class='ctx'> config ARC_HAS_PAE40</div><div class='ctx'> 	bool "Support for the 40-bit Physical Address Extension"</div><div class='del'>-	depends on ISA_ARCV2</div><div class='add'>+	depends on ARC_MMU_V4</div><div class='add'>+	depends on !ARC_PAGE_SIZE_4K</div><div class='ctx'> 	select HIGHMEM</div><div class='ctx'> 	select PHYS_ADDR_T_64BIT</div><div class='ctx'> 	help</div><div class='hunk'>@@ -550,11 +551,11 @@ config ARC_DBG_JUMP_LABEL</div><div class='ctx'> 	  part of static keys (jump labels) related code.</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-config ARC_BUILTIN_DTB_NAME</div><div class='add'>+config BUILTIN_DTB_NAME</div><div class='ctx'> 	string "Built in DTB"</div><div class='add'>+	default "nsim_700"</div><div class='ctx'> 	help</div><div class='del'>-	  Set the name of the DTB to embed in the vmlinux binary</div><div class='del'>-	  Leaving it blank selects the "nsim_700" dtb.</div><div class='add'>+	  Set the name of the DTB to embed in the vmlinux binary.</div><div class='ctx'> </div><div class='ctx'> endmenu	 # "ARC Architecture Configuration"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/Makefile b/arch/arc/Makefile<br/>index 2390dd042e36..0c5e6e6314f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/Makefile</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> KBUILD_DEFCONFIG := haps_hs_smp_defconfig</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CROSS_COMPILE),)</div><div class='del'>-CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-)</div><div class='add'>+CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__</div><div class='hunk'>@@ -82,9 +82,6 @@ KBUILD_CFLAGS	+= $(cflags-y)</div><div class='ctx'> KBUILD_AFLAGS	+= $(KBUILD_CFLAGS)</div><div class='ctx'> KBUILD_LDFLAGS	+= $(ldflags-y)</div><div class='ctx'> </div><div class='del'>-# w/o this dtb won't embed into kernel binary</div><div class='del'>-core-y		+= arch/arc/boot/dts/</div><div class='del'>-</div><div class='ctx'> core-y				+= arch/arc/plat-sim/</div><div class='ctx'> core-$(CONFIG_ARC_PLAT_TB10X)	+= arch/arc/plat-tb10x/</div><div class='ctx'> core-$(CONFIG_ARC_PLAT_AXS10X)	+= arch/arc/plat-axs10x/</div><div class='head'>diff --git a/arch/arc/boot/dts/Makefile b/arch/arc/boot/dts/Makefile<br/>index 48704dfdf75c..ee5664f0640d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,13 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-# Built-in dtb</div><div class='del'>-builtindtb-y		:= nsim_700</div><div class='ctx'> </div><div class='del'>-ifneq ($(CONFIG_ARC_BUILTIN_DTB_NAME),)</div><div class='del'>-	builtindtb-y	:= $(CONFIG_ARC_BUILTIN_DTB_NAME)</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-obj-y   += $(builtindtb-y).dtb.o</div><div class='del'>-dtb-y := $(builtindtb-y).dtb</div><div class='add'>+dtb-y	:= $(addsuffix .dtb, $(CONFIG_BUILTIN_DTB_NAME))</div><div class='ctx'> </div><div class='ctx'> # for CONFIG_OF_ALL_DTBS test</div><div class='ctx'> dtb-	:= $(patsubst $(src)/%.dts,%.dtb, $(wildcard $(src)/*.dts))</div><div class='head'>diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi<br/>index 2a151607b080..88bcc7ab6f5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc001.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc001.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc001.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/axc001.dtsi</a></div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				ngpios = &lt;30&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi<br/>index c0a812674ce9..9a2dc39a5cff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc003.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc003.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc003.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/axc003.dtsi</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				ngpios = &lt;30&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi<br/>index 67556f4b7057..f31382cb8be4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc003_idu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axc003_idu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axc003_idu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/axc003_idu.dtsi</a></div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				ngpios = &lt;30&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi<br/>index b64435385304..3add2fe257f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axs10x_mb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/axs10x_mb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/axs10x_mb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/axs10x_mb.dtsi</a></div><div class='hunk'>@@ -250,7 +250,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -258,7 +258,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				ngpios = &lt;8&gt;;</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -266,7 +266,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				ngpios = &lt;8&gt;;</div><div class='ctx'> 				reg = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -281,7 +281,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;30&gt;;</div><div class='add'>+				ngpios = &lt;30&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -289,7 +289,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;10&gt;;</div><div class='add'>+				ngpios = &lt;10&gt;;</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +297,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;8&gt;;</div><div class='add'>+				ngpios = &lt;8&gt;;</div><div class='ctx'> 				reg = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts<br/>index 41b980df862b..98bb850722a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/hsdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/boot/dts/hsdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/boot/dts/hsdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/boot/dts/hsdk.dts</a></div><div class='hunk'>@@ -308,7 +308,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;24&gt;;</div><div class='add'>+				ngpios = &lt;24&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arc/configs/axs101_defconfig b/arch/arc/configs/axs101_defconfig<br/>index 319bbe270322..a7cd526dd7ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs101_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs101_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs101_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/axs101_defconfig</a></div><div class='hunk'>@@ -23,7 +23,7 @@ CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_ARC_PLAT_AXS10X=y</div><div class='ctx'> CONFIG_AXS101=y</div><div class='ctx'> CONFIG_ARC_CACHE_LINE_SHIFT=5</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="axs101"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="axs101"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/axs103_defconfig b/arch/arc/configs/axs103_defconfig<br/>index 8c1f1a111a17..afa6a348f444 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs103_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs103_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs103_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/axs103_defconfig</a></div><div class='hunk'>@@ -22,7 +22,7 @@ CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_ARC_PLAT_AXS10X=y</div><div class='ctx'> CONFIG_AXS103=y</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="axs103"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="axs103"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/axs103_smp_defconfig b/arch/arc/configs/axs103_smp_defconfig<br/>index 75cab9f25b5b..2bfa6371953c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs103_smp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/axs103_smp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/axs103_smp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/axs103_smp_defconfig</a></div><div class='hunk'>@@ -22,7 +22,7 @@ CONFIG_ARC_PLAT_AXS10X=y</div><div class='ctx'> CONFIG_AXS103=y</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="axs103_idu"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="axs103_idu"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/haps_hs_defconfig b/arch/arc/configs/haps_hs_defconfig<br/>index 8c3ed5d6e6c3..3a1577112078 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/haps_hs_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/haps_hs_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/haps_hs_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/haps_hs_defconfig</a></div><div class='hunk'>@@ -14,7 +14,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="haps_hs"</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='head'>diff --git a/arch/arc/configs/haps_hs_smp_defconfig b/arch/arc/configs/haps_hs_smp_defconfig<br/>index 6fc98c1b9b36..a3cf940b1f5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/haps_hs_smp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/haps_hs_smp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/haps_hs_smp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/haps_hs_smp_defconfig</a></div><div class='hunk'>@@ -16,7 +16,7 @@ CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_SMP=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="haps_hs_idu"</div><div class='ctx'> CONFIG_KPROBES=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/arc/configs/hsdk_defconfig b/arch/arc/configs/hsdk_defconfig<br/>index 9e79154b5535..1558e8e87767 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/hsdk_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/hsdk_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/hsdk_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/hsdk_defconfig</a></div><div class='hunk'>@@ -20,7 +20,7 @@ CONFIG_ISA_ARCV2=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_LINUX_LINK_BASE=0x90000000</div><div class='ctx'> CONFIG_LINUX_RAM_BASE=0x80000000</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="hsdk"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="hsdk"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/nsim_700_defconfig b/arch/arc/configs/nsim_700_defconfig<br/>index 51092c39e360..f8b3235d9a65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsim_700_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsim_700_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsim_700_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/nsim_700_defconfig</a></div><div class='hunk'>@@ -17,7 +17,7 @@ CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_SLUB_DEBUG is not set</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_ISA_ARCOMPACT=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="nsim_700"</div><div class='ctx'> CONFIG_KPROBES=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig<br/>index 70c17bca4939..ee45dc0877fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/nsimosci_defconfig</a></div><div class='hunk'>@@ -19,7 +19,7 @@ CONFIG_ISA_ARCOMPACT=y</div><div class='ctx'> CONFIG_KPROBES=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="nsimosci"</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_hs_defconfig b/arch/arc/configs/nsimosci_hs_defconfig<br/>index 59a3b6642fe7..e0a309970c20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_hs_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_hs_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_hs_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/nsimosci_hs_defconfig</a></div><div class='hunk'>@@ -19,7 +19,7 @@ CONFIG_KPROBES=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="nsimosci_hs"</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='head'>diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig b/arch/arc/configs/nsimosci_hs_smp_defconfig<br/>index 1419fc946a08..88325b8b49cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_hs_smp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/nsimosci_hs_smp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/nsimosci_hs_smp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/nsimosci_hs_smp_defconfig</a></div><div class='hunk'>@@ -16,7 +16,7 @@ CONFIG_MODULES=y</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> # CONFIG_ARC_TIMERS_64BIT is not set</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="nsimosci_hs_idu"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/tb10x_defconfig b/arch/arc/configs/tb10x_defconfig<br/>index 5aba3d850fa2..865fbc19ef03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/tb10x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/tb10x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/tb10x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/tb10x_defconfig</a></div><div class='hunk'>@@ -26,7 +26,7 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_ARC_PLAT_TB10X=y</div><div class='ctx'> CONFIG_ARC_CACHE_LINE_SHIFT=5</div><div class='ctx'> CONFIG_HZ=250</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="abilis_tb100_dvk"</div><div class='ctx'> CONFIG_PREEMPT_VOLUNTARY=y</div><div class='ctx'> # CONFIG_COMPACTION is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/arc/configs/vdk_hs38_defconfig b/arch/arc/configs/vdk_hs38_defconfig<br/>index 50c343913825..03d9ac20baa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/vdk_hs38_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/vdk_hs38_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/vdk_hs38_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/vdk_hs38_defconfig</a></div><div class='hunk'>@@ -13,7 +13,7 @@ CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_ARC_PLAT_AXS10X=y</div><div class='ctx'> CONFIG_AXS103=y</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="vdk_hs38"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='head'>diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig b/arch/arc/configs/vdk_hs38_smp_defconfig<br/>index 6d9e1d9f71d2..c09488992f13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/vdk_hs38_smp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/configs/vdk_hs38_smp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/configs/vdk_hs38_smp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/configs/vdk_hs38_smp_defconfig</a></div><div class='hunk'>@@ -15,7 +15,7 @@ CONFIG_AXS103=y</div><div class='ctx'> CONFIG_ISA_ARCV2=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> # CONFIG_ARC_TIMERS_64BIT is not set</div><div class='del'>-CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="vdk_hs38_smp"</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='head'>diff --git a/arch/arc/include/asm/Kbuild b/arch/arc/include/asm/Kbuild<br/>index 49285a3ce239..4c69522e0328 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/Kbuild</a></div><div class='hunk'>@@ -6,3 +6,4 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += parport.h</div><div class='ctx'> generic-y += user.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h<br/>index 4b13f60fe7ca..d84908a177bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/arcregs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/arcregs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/arcregs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/arcregs.h</a></div><div class='hunk'>@@ -144,16 +144,13 @@</div><div class='ctx'> #define ARC_AUX_AGU_MOD2	0x5E2</div><div class='ctx'> #define ARC_AUX_AGU_MOD3	0x5E3</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-#include &lt;soc/arc/aux.h&gt;</div><div class='add'>+#include &lt;soc/arc/arc_aux.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Helpers */</div><div class='ctx'> #define TO_KB(bytes)		((bytes) &gt;&gt; 10)</div><div class='ctx'> #define TO_MB(bytes)		(TO_KB(bytes) &gt;&gt; 10)</div><div class='del'>-#define PAGES_TO_KB(n_pages)	((n_pages) &lt;&lt; (PAGE_SHIFT - 10))</div><div class='del'>-#define PAGES_TO_MB(n_pages)	(PAGES_TO_KB(n_pages) &gt;&gt; 10)</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  ***************************************************************</div><div class='head'>diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h<br/>index 592d7fffc223..e615c42b93ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/atomic.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/atomic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/atomic.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/atomic.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_ATOMIC_H</div><div class='ctx'> #define _ASM_ARC_ATOMIC_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='hunk'>@@ -31,6 +31,6 @@</div><div class='ctx'> #include &lt;asm/atomic64-arcv2.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/atomic64-arcv2.h b/arch/arc/include/asm/atomic64-arcv2.h<br/>index 9b5791b85471..73080a664369 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/atomic64-arcv2.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/atomic64-arcv2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/atomic64-arcv2.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/atomic64-arcv2.h</a></div><div class='hunk'>@@ -137,12 +137,9 @@ ATOMIC64_OPS(xor, xor, xor)</div><div class='ctx'> #undef ATOMIC64_OP_RETURN</div><div class='ctx'> #undef ATOMIC64_OP</div><div class='ctx'> </div><div class='del'>-static inline s64</div><div class='del'>-arch_atomic64_cmpxchg(atomic64_t *ptr, s64 expected, s64 new)</div><div class='add'>+static inline u64 __arch_cmpxchg64_relaxed(volatile void *ptr, u64 old, u64 new)</div><div class='ctx'> {</div><div class='del'>-	s64 prev;</div><div class='del'>-</div><div class='del'>-	smp_mb();</div><div class='add'>+	u64 prev;</div><div class='ctx'> </div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 	"1:	llockd  %0, [%1]	\n"</div><div class='hunk'>@@ -152,14 +149,12 @@ arch_atomic64_cmpxchg(atomic64_t *ptr, s64 expected, s64 new)</div><div class='ctx'> 	"	bnz     1b		\n"</div><div class='ctx'> 	"2:				\n"</div><div class='ctx'> 	: "=&amp;r"(prev)</div><div class='del'>-	: "r"(ptr), "ir"(expected), "r"(new)</div><div class='del'>-	: "cc");	/* memory clobber comes from smp_mb() */</div><div class='del'>-</div><div class='del'>-	smp_mb();</div><div class='add'>+	: "r"(ptr), "ir"(old), "r"(new)</div><div class='add'>+	: "memory", "cc");</div><div class='ctx'> </div><div class='ctx'> 	return prev;</div><div class='ctx'> }</div><div class='del'>-#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg</div><div class='add'>+#define arch_cmpxchg64_relaxed __arch_cmpxchg64_relaxed</div><div class='ctx'> </div><div class='ctx'> static inline s64 arch_atomic64_xchg(atomic64_t *ptr, s64 new)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h<br/>index f5a936496f06..df894235fdbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/bitops.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #error only &lt;linux/bitops.h&gt; can be included directly</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='hunk'>@@ -133,6 +133,8 @@ static inline __attribute__ ((const)) int fls(unsigned int x)</div><div class='ctx'>  */</div><div class='ctx'> static inline __attribute__ ((const)) unsigned long __fls(unsigned long x)</div><div class='ctx'> {</div><div class='add'>+	if (__builtin_constant_p(x))</div><div class='add'>+		return x ? BITS_PER_LONG - 1 - __builtin_clzl(x) : 0;</div><div class='ctx'> 	/* FLS insn has exactly same semantics as the API */</div><div class='ctx'> 	return	__builtin_arc_fls(x);</div><div class='ctx'> }</div><div class='hunk'>@@ -192,6 +194,6 @@ static inline __attribute__ ((const)) unsigned long __ffs(unsigned long x)</div><div class='ctx'> #include &lt;asm-generic/bitops/le.h&gt;</div><div class='ctx'> #include &lt;asm-generic/bitops/ext2-atomic-setbit.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/bug.h b/arch/arc/include/asm/bug.h<br/>index 4c453ba96c51..171c16021f70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/bug.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/bug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/bug.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/bug.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_BUG_H</div><div class='ctx'> #define _ASM_ARC_BUG_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -29,6 +29,6 @@ void die(const char *str, struct pt_regs *regs, unsigned long address);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bug.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h<br/>index f0f1fc5d62b6..040a97f4dd82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/cache.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define ARC_UNCACHED_ADDR_SPACE	0xc0000000</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/build_bug.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> extern int ioc_enable;</div><div class='ctx'> extern unsigned long perip_base, perip_end;</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Instruction cache related Auxiliary registers */</div><div class='ctx'> #define ARC_REG_IC_BCR		0x77	/* Build Config reg */</div><div class='head'>diff --git a/arch/arc/include/asm/cachetype.h b/arch/arc/include/asm/cachetype.h<br/>new file mode 100644<br/>index 000000000000..acd3b6cb4bf5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/cachetype.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/cachetype.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __ASM_ARC_CACHETYPE_H</div><div class='add'>+#define __ASM_ARC_CACHETYPE_H</div><div class='add'>+</div><div class='add'>+#define cpu_dcache_is_aliasing()	false</div><div class='add'>+#define cpu_icache_is_aliasing()	true</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h<br/>index 58045c898340..76f43db0890f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/cmpxchg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/cmpxchg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 									\</div><div class='ctx'> 	switch(sizeof((_p_))) {						\</div><div class='ctx'> 	case 1:								\</div><div class='del'>-		_prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, (uintptr_t)_n_);	\</div><div class='add'>+		_prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *__force)_p_, (uintptr_t)_o_, (uintptr_t)_n_);	\</div><div class='ctx'> 		break;							\</div><div class='ctx'> 	case 4:								\</div><div class='ctx'> 		_prev_ = __cmpxchg(_p_, _o_, _n_);			\</div><div class='head'>diff --git a/arch/arc/include/asm/current.h b/arch/arc/include/asm/current.h<br/>index 06be89f6f2f0..03ffd005f3fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/current.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/current.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/current.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/current.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_CURRENT_H</div><div class='ctx'> #define _ASM_ARC_CURRENT_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_CURR_IN_REG</div><div class='ctx'> </div><div class='hunk'>@@ -20,6 +20,6 @@ register struct task_struct *curr_arc asm("gp");</div><div class='ctx'> #include &lt;asm-generic/current.h&gt;</div><div class='ctx'> #endif /* ! CONFIG_ARC_CURR_IN_REG */</div><div class='ctx'> </div><div class='del'>-#endif /* ! __ASSEMBLY__ */</div><div class='add'>+#endif /* ! __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_ARC_CURRENT_H */</div><div class='head'>diff --git a/arch/arc/include/asm/dsp-impl.h b/arch/arc/include/asm/dsp-impl.h<br/>index cd5636dfeb6f..fd5fdaad90c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dsp-impl.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dsp-impl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dsp-impl.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/dsp-impl.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #define DSP_CTRL_DISABLED_ALL		0</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* clobbers r5 register */</div><div class='ctx'> .macro DSP_EARLY_INIT</div><div class='head'>diff --git a/arch/arc/include/asm/dsp.h b/arch/arc/include/asm/dsp.h<br/>index f496dbc4640b..eeaaf4e4eabd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dsp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dsp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dsp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/dsp.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef __ASM_ARC_DSP_H</div><div class='ctx'> #define __ASM_ARC_DSP_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * DSP-related saved registers - need to be saved only when you are</div><div class='hunk'>@@ -24,6 +24,6 @@ struct dsp_callee_regs {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ARC_DSP_H */</div><div class='head'>diff --git a/arch/arc/include/asm/dwarf.h b/arch/arc/include/asm/dwarf.h<br/>index a0d5ebe1bc3f..1524c5cf8b59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dwarf.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/dwarf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/dwarf.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/dwarf.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_DWARF_H</div><div class='ctx'> #define _ASM_ARC_DWARF_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef ARC_DW2_UNWIND_AS_CFI</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +38,6 @@</div><div class='ctx'> </div><div class='ctx'> #endif	/* !ARC_DW2_UNWIND_AS_CFI */</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_ARC_DWARF_H */</div><div class='head'>diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h<br/>index 38c35722cebf..f453af251a1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/entry.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/entry.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/entry.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/entry.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;	/* For VMALLOC_START */</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> #include &lt;asm/entry-compact.h&gt;	/* ISA specific bits */</div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif	/* CONFIG_ARC_CURR_IN_REG */</div><div class='ctx'> </div><div class='del'>-#else	/* !__ASSEMBLY__ */</div><div class='add'>+#else	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> extern void do_signal(struct pt_regs *);</div><div class='ctx'> extern void do_notify_resume(struct pt_regs *);</div><div class='head'>diff --git a/arch/arc/include/asm/hugepage.h b/arch/arc/include/asm/hugepage.h<br/>index 8a2441670a8f..7765dc105d54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/hugepage.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/hugepage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/hugepage.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/hugepage.h</a></div><div class='hunk'>@@ -40,8 +40,6 @@ static inline pmd_t pte_pmd(pte_t pte)</div><div class='ctx'> #define pmd_young(pmd)		pte_young(pmd_pte(pmd))</div><div class='ctx'> #define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))</div><div class='ctx'> </div><div class='del'>-#define mk_pmd(page, prot)	pte_pmd(mk_pte(page, prot))</div><div class='del'>-</div><div class='ctx'> #define pmd_trans_huge(pmd)	(pmd_val(pmd) &amp; _PAGE_HW_SZ)</div><div class='ctx'> </div><div class='ctx'> #define pfn_pmd(pfn, prot)	(__pmd(((pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot)))</div><div class='head'>diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h<br/>index f57cb5a6b624..00171a212b3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/io.h</a></div><div class='hunk'>@@ -42,9 +42,6 @@ static inline void ioport_unmap(void __iomem *addr)</div><div class='ctx'> #define iowrite16be(v,p)	({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); })</div><div class='ctx'> #define iowrite32be(v,p)	({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); })</div><div class='ctx'> </div><div class='del'>-/* Change struct page to physical address */</div><div class='del'>-#define page_to_phys(page)		(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='ctx'> #define __raw_readb __raw_readb</div><div class='ctx'> static inline u8 __raw_readb(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h<br/>index fb3c21f1a238..30aea562f8aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/irqflags-arcv2.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/irqflags-arcv2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/irqflags-arcv2.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/irqflags-arcv2.h</a></div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> #define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | __AD_ENB | \</div><div class='ctx'> 					(ARCV2_IRQ_DEF_PRIO &lt;&lt; 1))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Save IRQ state and disable IRQs</div><div class='hunk'>@@ -170,6 +170,6 @@ static inline void arc_softirq_clear(int irq)</div><div class='ctx'> 	seti</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/irqflags-compact.h b/arch/arc/include/asm/irqflags-compact.h<br/>index 936a2f21f315..85c2f6bcde0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/irqflags-compact.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/irqflags-compact.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/irqflags-compact.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/irqflags-compact.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ISA_INIT_STATUS_BITS	STATUS_IE_MASK</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /******************************************************************</div><div class='ctx'>  * IRQ Control Macros</div><div class='hunk'>@@ -196,6 +196,6 @@ static inline int arch_irqs_disabled(void)</div><div class='ctx'> 	flag	\scratch</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/jump_label.h b/arch/arc/include/asm/jump_label.h<br/>index a339223d9e05..66ead75784d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/jump_label.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_JUMP_LABEL_H</div><div class='ctx'> #define _ASM_ARC_JUMP_LABEL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -68,5 +68,5 @@ struct jump_entry {</div><div class='ctx'> 	jump_label_t key;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='add'>+#endif  /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/linkage.h b/arch/arc/include/asm/linkage.h<br/>index 8a3fb71e9cfa..ba3cb65b5eaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/linkage.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/linkage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/linkage.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/linkage.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #define __ALIGN		.align 4</div><div class='ctx'> #define __ALIGN_STR	__stringify(__ALIGN)</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro ST2 e, o, off</div><div class='ctx'> #ifdef CONFIG_ARC_HAS_LL64</div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 	CFI_ENDPROC ASM_NL	\</div><div class='ctx'> 	.size name, .-name</div><div class='ctx'> </div><div class='del'>-#else	/* !__ASSEMBLY__ */</div><div class='add'>+#else	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARC_HAS_ICCM</div><div class='ctx'> #define __arcfp_code __section(".text.arcfp")</div><div class='hunk'>@@ -75,6 +75,6 @@</div><div class='ctx'> #define __arcfp_data __section(".data")</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/mmu-arcv2.h b/arch/arc/include/asm/mmu-arcv2.h<br/>index d85dc0721907..5e5482026ac9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/mmu-arcv2.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/mmu-arcv2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/mmu-arcv2.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/mmu-arcv2.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_MMU_ARCV2_H</div><div class='ctx'> #define _ASM_ARC_MMU_ARCV2_H</div><div class='ctx'> </div><div class='del'>-#include &lt;soc/arc/aux.h&gt;</div><div class='add'>+#include &lt;soc/arc/arc_aux.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * TLB Management regs</div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PTE_BITS_NON_RWX_IN_PD1	(PAGE_MASK_PHYS | _PAGE_CACHEABLE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct mm_struct;</div><div class='ctx'> extern int pae40_exist_but_not_enab(void);</div><div class='hunk'>@@ -100,6 +100,6 @@ static inline void mmu_setup_pgd(struct mm_struct *mm, void *pgd)</div><div class='ctx'> 	sr \reg, [ARC_REG_PID]</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h<br/>index 4ae2db59d494..e3b35ceab582 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/mmu.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_MMU_H</div><div class='ctx'> #define _ASM_ARC_MMU_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/threads.h&gt;	/* NR_CPUS */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h<br/>index def0dfb95b43..9720fe6b2c24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/page.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_ARC_HAS_PAE40 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define clear_page(paddr)		memset((paddr), 0, PAGE_SIZE)</div><div class='ctx'> #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)</div><div class='hunk'>@@ -136,6 +136,6 @@ static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;   /* page_to_pfn, pfn_to_page */</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/pgalloc.h b/arch/arc/include/asm/pgalloc.h<br/>index 096b8ef58edb..dfae070fe8d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -53,19 +53,14 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t pte_</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *ret = (pgd_t *) __get_free_page(GFP_KERNEL);</div><div class='add'>+	pgd_t *ret = __pgd_alloc(mm, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		int num, num2;</div><div class='del'>-		num = USER_PTRS_PER_PGD + USER_KERNEL_GUTTER / PGDIR_SIZE;</div><div class='del'>-		memzero(ret, num * sizeof(pgd_t));</div><div class='ctx'> </div><div class='add'>+		num = USER_PTRS_PER_PGD + USER_KERNEL_GUTTER / PGDIR_SIZE;</div><div class='ctx'> 		num2 = VMALLOC_SIZE / PGDIR_SIZE;</div><div class='ctx'> 		memcpy(ret + num, swapper_pg_dir + num, num2 * sizeof(pgd_t));</div><div class='del'>-</div><div class='del'>-		memzero(ret + num + num2,</div><div class='del'>-			       (PTRS_PER_PGD - num - num2) * sizeof(pgd_t));</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h b/arch/arc/include/asm/pgtable-bits-arcv2.h<br/>index 8ebec1b21d24..4630c5acca05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable-bits-arcv2.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable-bits-arcv2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable-bits-arcv2.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/pgtable-bits-arcv2.h</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'>  *     This is to enable COW mechanism</div><div class='ctx'>  */</div><div class='ctx'> 	/* xwr */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define pte_write(pte)		(pte_val(pte) &amp; _PAGE_WRITE)</div><div class='ctx'> #define pte_dirty(pte)		(pte_val(pte) &amp; _PAGE_DIRTY)</div><div class='hunk'>@@ -130,7 +130,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -142,6 +142,6 @@ PTE_BIT_FUNC(swp_clear_exclusive, &amp;= ~(_PAGE_SWP_EXCLUSIVE));</div><div class='ctx'> #include &lt;asm/hugepage.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/pgtable-levels.h b/arch/arc/include/asm/pgtable-levels.h<br/>index 86e148226463..c8f9273372c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable-levels.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable-levels.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable-levels.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/pgtable-levels.h</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PTRS_PER_PTE		BIT(PMD_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS &gt; 3</div><div class='ctx'> #include &lt;asm-generic/pgtable-nop4d.h&gt;</div><div class='hunk'>@@ -142,7 +142,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pmd_pfn(pmd)		((pmd_val(pmd) &amp; PMD_MASK) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pfn_pmd(pfn,prot)	__pmd(((pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot))</div><div class='del'>-#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -177,12 +176,11 @@</div><div class='ctx'> #define set_pte(ptep, pte)	((*(ptep)) = (pte))</div><div class='ctx'> #define pte_pfn(pte)		(pte_val(pte) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pfn_pte(pfn, prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))</div><div class='del'>-#define mk_pte(page, prot)	pfn_pte(page_to_pfn(page), prot)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ISA_ARCV2</div><div class='ctx'> #define pmd_leaf(x)		(pmd_val(x) &amp; _PAGE_HW_SZ)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h<br/>index 4cf45a99fd79..bd580e2b62d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define	USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern char empty_zero_page[PAGE_SIZE];</div><div class='ctx'> #define ZERO_PAGE(vaddr)	(virt_to_page(empty_zero_page))</div><div class='hunk'>@@ -29,6 +29,6 @@ extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);</div><div class='ctx'> /* to cope with aliasing VIPT cache */</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h<br/>index d606658e2fe7..7f7901ac6643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/processor.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef __ASM_ARC_PROCESSOR_H</div><div class='ctx'> #define __ASM_ARC_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/dsp.h&gt;</div><div class='hunk'>@@ -66,7 +66,7 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc,</div><div class='ctx'> </div><div class='ctx'> extern unsigned int __get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Default System Memory Map on ARC</div><div class='head'>diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h<br/>index cf79df0b2570..f6c052af8f4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;uapi/asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef union {</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -172,6 +172,6 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,</div><div class='ctx'> extern int syscall_trace_enter(struct pt_regs *);</div><div class='ctx'> extern void syscall_trace_exit(struct pt_regs *);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PTRACE_H */</div><div class='head'>diff --git a/arch/arc/include/asm/switch_to.h b/arch/arc/include/asm/switch_to.h<br/>index 1f85de8288b1..5806106a65f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/switch_to.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/switch_to.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/switch_to.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/switch_to.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_ARC_SWITCH_TO_H</div><div class='ctx'> #define _ASM_ARC_SWITCH_TO_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;asm/dsp-impl.h&gt;</div><div class='head'>diff --git a/arch/arc/include/asm/syscall.h b/arch/arc/include/asm/syscall.h<br/>index 9709256e31c8..728d625a10f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/syscall.h</a></div><div class='hunk'>@@ -24,6 +24,17 @@ syscall_get_nr(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='add'>+syscall_set_nr(struct task_struct *task, struct pt_regs *regs, int nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Unlike syscall_get_nr(), syscall_set_nr() can be called only when</div><div class='add'>+	 * the target task is stopped for tracing on entering syscall, so</div><div class='add'>+	 * there is no need to have the same check syscall_get_nr() has.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;r8 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='ctx'> syscall_rollback(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	regs-&gt;r0 = regs-&gt;orig_r0;</div><div class='hunk'>@@ -67,6 +78,20 @@ syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void</div><div class='add'>+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='add'>+		      unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	unsigned long *inside_ptregs = &amp;regs-&gt;r0;</div><div class='add'>+	unsigned int n = 6;</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+</div><div class='add'>+	while (n--) {</div><div class='add'>+		*inside_ptregs = args[i++];</div><div class='add'>+		inside_ptregs--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int</div><div class='ctx'> syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arc/include/asm/thread_info.h b/arch/arc/include/asm/thread_info.h<br/>index 12daaf3a61ea..255d2c774219 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #define THREAD_SIZE     (PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> #define THREAD_SHIFT	(PAGE_SHIFT &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/thread_info.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -62,7 +62,7 @@ static inline __attribute_const__ struct thread_info *current_thread_info(void)</div><div class='ctx'> 	return (struct thread_info *)(sp &amp; ~(THREAD_SIZE - 1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * thread information flags</div><div class='head'>diff --git a/arch/arc/include/uapi/asm/page.h b/arch/arc/include/uapi/asm/page.h<br/>index 7fd9e741b527..4606a326af5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/uapi/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/uapi/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/uapi/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/uapi/asm/page.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> /* PAGE_SHIFT determines the page size */</div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#define PAGE_SHIFT CONFIG_PAGE_SHIFT</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> #else</div><div class='ctx'> /*</div><div class='ctx'>  * Default 8k</div><div class='hunk'>@@ -24,11 +24,10 @@</div><div class='ctx'>  * not available</div><div class='ctx'>  */</div><div class='ctx'> #define PAGE_SHIFT 13</div><div class='add'>+#define PAGE_SIZE	_BITUL(PAGE_SHIFT)	/* Default 8K */</div><div class='add'>+#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define PAGE_SIZE	_BITUL(PAGE_SHIFT)	/* Default 8K */</div><div class='ctx'> #define PAGE_OFFSET	_AC(0x80000000, UL)	/* Kernel starts at 2G onwrds */</div><div class='ctx'> </div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='del'>-</div><div class='ctx'> #endif /* _UAPI__ASM_ARC_PAGE_H */</div><div class='head'>diff --git a/arch/arc/include/uapi/asm/ptrace.h b/arch/arc/include/uapi/asm/ptrace.h<br/>index 2a6eff57f6dd..3ae832db278c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PTRACE_GET_THREAD_AREA	25</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Userspace ABI: Register state needed by</div><div class='ctx'>  *  -ptrace (gdbserver)</div><div class='hunk'>@@ -53,6 +53,6 @@ struct user_regs_arcv2 {</div><div class='ctx'> 	unsigned long r30, r58, r59;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI__ASM_ARC_PTRACE_H */</div><div class='head'>diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile<br/>index 95fbf9364c67..fa94fff02419 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/Makefile</a></div><div class='hunk'>@@ -26,4 +26,4 @@ ifdef CONFIG_ISA_ARCOMPACT</div><div class='ctx'> CFLAGS_fpu.o   += -mdpfp</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-extra-y := vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN) := vmlinux.lds</div><div class='head'>diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c<br/>index f77deb799175..2978da85fcb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='head'>diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c<br/>index 4c9e61457b2f..cc6ac7d128aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/devtree.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/devtree.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/devtree.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/devtree.c</a></div><div class='hunk'>@@ -62,7 +62,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)</div><div class='ctx'> 	const struct machine_desc *mdesc;</div><div class='ctx'> 	unsigned long dt_root;</div><div class='ctx'> </div><div class='del'>-	if (!early_init_dt_scan(dt))</div><div class='add'>+	if (!early_init_dt_scan(dt, __pa(dt)))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	mdesc = of_flat_dt_match_machine(NULL, arch_get_next_mach);</div><div class='head'>diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c<br/>index f324f0e3341a..809edc59af25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/intc-arcv2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/intc-arcv2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/intc-arcv2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/intc-arcv2.c</a></div><div class='hunk'>@@ -170,7 +170,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	if (parent)</div><div class='ctx'> 		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='ctx'> </div><div class='del'>-	root_domain = irq_domain_add_linear(intc, nr_cpu_irqs, &amp;arcv2_irq_ops, NULL);</div><div class='add'>+	root_domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_cpu_irqs, &amp;arcv2_irq_ops, NULL);</div><div class='ctx'> 	if (!root_domain)</div><div class='ctx'> 		panic("root irq domain not avail\n");</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +178,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	 * Needed for primary domain lookup to succeed</div><div class='ctx'> 	 * This is a primary irqchip, and can never have a parent</div><div class='ctx'> 	 */</div><div class='del'>-	irq_set_default_host(root_domain);</div><div class='add'>+	irq_set_default_domain(root_domain);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	irq_create_mapping(root_domain, IPI_IRQ);</div><div class='head'>diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c<br/>index 6885e422870e..1b159e9e0234 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/intc-compact.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/intc-compact.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/intc-compact.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/intc-compact.c</a></div><div class='hunk'>@@ -112,8 +112,9 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	if (parent)</div><div class='ctx'> 		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='ctx'> </div><div class='del'>-	root_domain = irq_domain_add_linear(intc, NR_CPU_IRQS,</div><div class='del'>-					    &amp;arc_intc_domain_ops, NULL);</div><div class='add'>+	root_domain = irq_domain_create_linear(of_fwnode_handle(intc),</div><div class='add'>+					       NR_CPU_IRQS,</div><div class='add'>+					       &amp;arc_intc_domain_ops, NULL);</div><div class='ctx'> 	if (!root_domain)</div><div class='ctx'> 		panic("root irq domain not avail\n");</div><div class='ctx'> </div><div class='hunk'>@@ -121,7 +122,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	 * Needed for primary domain lookup to succeed</div><div class='ctx'> 	 * This is a primary irqchip, and can never have a parent</div><div class='ctx'> 	 */</div><div class='del'>-	irq_set_default_host(root_domain);</div><div class='add'>+	irq_set_default_domain(root_domain);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c<br/>index 55373ca0d28b..02b28a9324f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/mcip.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/mcip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/mcip.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/mcip.c</a></div><div class='hunk'>@@ -357,8 +357,6 @@ static void idu_cascade_isr(struct irq_desc *desc)</div><div class='ctx'> static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)</div><div class='ctx'> {</div><div class='ctx'> 	irq_set_chip_and_handler(virq, &amp;idu_irq_chip, handle_level_irq);</div><div class='del'>-	irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -393,7 +391,8 @@ idu_of_init(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("MCIP: IDU supports %u common irqs\n", nr_irqs);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(intc, nr_irqs, &amp;idu_irq_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_irqs,</div><div class='add'>+					  &amp;idu_irq_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Parent interrupts (core-intc) are already mapped */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c<br/>index 6e5a651cd75c..ed6d4f0cd621 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/perf_event.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/perf_event.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/perf_event.c</a></div><div class='hunk'>@@ -599,10 +599,8 @@ static irqreturn_t arc_pmu_intr(int irq, void *dev)</div><div class='ctx'> </div><div class='ctx'> 		arc_perf_event_update(event, &amp;event-&gt;hw, event-&gt;hw.idx);</div><div class='ctx'> 		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='del'>-		if (arc_pmu_event_set_period(event)) {</div><div class='del'>-			if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-				arc_pmu_stop(event, 0);</div><div class='del'>-		}</div><div class='add'>+		if (arc_pmu_event_set_period(event))</div><div class='add'>+			perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> </div><div class='ctx'> 		active_ints &amp;= ~BIT(idx);</div><div class='ctx'> 	} while (active_ints);</div><div class='head'>diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c<br/>index 186ceab661eb..8166d0908713 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/process.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ asmlinkage void ret_from_fork(void);</div><div class='ctx'>  */</div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *c_regs;        /* child's pt_regs */</div><div class='head'>diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c<br/>index e0c233c178b1..cad5367b7c37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/ptrace.c</a></div><div class='hunk'>@@ -284,7 +284,7 @@ enum arc_getset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset arc_regsets[] = {</div><div class='ctx'> 	[REGSET_CMN] = {</div><div class='del'>-	       .core_note_type = NT_PRSTATUS,</div><div class='add'>+	       USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 	       .n = ELF_NGREG,</div><div class='ctx'> 	       .size = sizeof(unsigned long),</div><div class='ctx'> 	       .align = sizeof(unsigned long),</div><div class='hunk'>@@ -293,7 +293,7 @@ static const struct user_regset arc_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_ISA_ARCV2</div><div class='ctx'> 	[REGSET_ARCV2] = {</div><div class='del'>-	       .core_note_type = NT_ARC_V2,</div><div class='add'>+	       USER_REGSET_NOTE_TYPE(ARC_V2),</div><div class='ctx'> 	       .n = ELF_ARCV2REG,</div><div class='ctx'> 	       .size = sizeof(unsigned long),</div><div class='ctx'> 	       .align = sizeof(unsigned long),</div><div class='head'>diff --git a/arch/arc/kernel/unaligned.c b/arch/arc/kernel/unaligned.c<br/>index d2f5ceaaed1b..3b2d8b1bd271 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/unaligned.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/unaligned.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/unaligned.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/unaligned.c</a></div><div class='hunk'>@@ -200,7 +200,6 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 		     struct callee_regs *cregs)</div><div class='ctx'> {</div><div class='ctx'> 	struct disasm_state state;</div><div class='del'>-	char buf[TASK_COMM_LEN];</div><div class='ctx'> </div><div class='ctx'> 	/* handle user mode only and only if enabled by sysadmin */</div><div class='ctx'> 	if (!user_mode(regs) || !unaligned_enabled)</div><div class='hunk'>@@ -212,11 +211,11 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 			     " performance significantly\n. To enable further"</div><div class='ctx'> 			     " logging of such instances, please \n"</div><div class='ctx'> 			     " echo 0 &gt; /proc/sys/kernel/ignore-unaligned-usertrap\n",</div><div class='del'>-			     get_task_comm(buf, current), task_pid_nr(current));</div><div class='add'>+			     current-&gt;comm, task_pid_nr(current));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Add rate limiting if it gets down to it */</div><div class='ctx'> 		pr_warn("%s(%d): unaligned access to/from 0x%lx by PC: 0x%lx\n",</div><div class='del'>-			get_task_comm(buf, current), task_pid_nr(current),</div><div class='add'>+			current-&gt;comm, task_pid_nr(current),</div><div class='ctx'> 			address, regs-&gt;ret);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arc/kernel/unwind.c b/arch/arc/kernel/unwind.c<br/>index d8969dab12d4..789cfb9ea14e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/unwind.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/kernel/unwind.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/kernel/unwind.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/kernel/unwind.c</a></div><div class='hunk'>@@ -241,15 +241,6 @@ static int cmp_eh_frame_hdr_table_entries(const void *p1, const void *p2)</div><div class='ctx'> 	return (e1-&gt;start &gt; e2-&gt;start) - (e1-&gt;start &lt; e2-&gt;start);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void swap_eh_frame_hdr_table_entries(void *p1, void *p2, int size)</div><div class='del'>-{</div><div class='del'>-	struct eh_frame_hdr_table_entry *e1 = p1;</div><div class='del'>-	struct eh_frame_hdr_table_entry *e2 = p2;</div><div class='del'>-</div><div class='del'>-	swap(e1-&gt;start, e2-&gt;start);</div><div class='del'>-	swap(e1-&gt;fde, e2-&gt;fde);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void init_unwind_hdr(struct unwind_table *table,</div><div class='ctx'> 			    void *(*alloc) (unsigned long))</div><div class='ctx'> {</div><div class='hunk'>@@ -345,7 +336,7 @@ static void init_unwind_hdr(struct unwind_table *table,</div><div class='ctx'> 	sort(header-&gt;table,</div><div class='ctx'> 	     n,</div><div class='ctx'> 	     sizeof(*header-&gt;table),</div><div class='del'>-	     cmp_eh_frame_hdr_table_entries, swap_eh_frame_hdr_table_entries);</div><div class='add'>+	     cmp_eh_frame_hdr_table_entries, NULL);</div><div class='ctx'> </div><div class='ctx'> 	table-&gt;hdrsz = hdrSize;</div><div class='ctx'> 	smp_wmb();</div><div class='head'>diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c<br/>index 9106ceac323c..7d2f93dc1e91 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/cache.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/cache.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/cache.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/mm/cache.c</a></div><div class='hunk'>@@ -704,7 +704,7 @@ static inline void arc_slc_enable(void)</div><div class='ctx'> </div><div class='ctx'> void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	clear_bit(PG_dc_clean, &amp;folio-&gt;flags);</div><div class='add'>+	clear_bit(PG_dc_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_folio);</div><div class='hunk'>@@ -889,8 +889,8 @@ void copy_user_highpage(struct page *to, struct page *from,</div><div class='ctx'> </div><div class='ctx'> 	copy_page(kto, kfrom);</div><div class='ctx'> </div><div class='del'>-	clear_bit(PG_dc_clean, &amp;dst-&gt;flags);</div><div class='del'>-	clear_bit(PG_dc_clean, &amp;src-&gt;flags);</div><div class='add'>+	clear_bit(PG_dc_clean, &amp;dst-&gt;flags.f);</div><div class='add'>+	clear_bit(PG_dc_clean, &amp;src-&gt;flags.f);</div><div class='ctx'> </div><div class='ctx'> 	kunmap_atomic(kto);</div><div class='ctx'> 	kunmap_atomic(kfrom);</div><div class='hunk'>@@ -900,7 +900,7 @@ void clear_user_page(void *to, unsigned long u_vaddr, struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	struct folio *folio = page_folio(page);</div><div class='ctx'> 	clear_page(to);</div><div class='del'>-	clear_bit(PG_dc_clean, &amp;folio-&gt;flags);</div><div class='add'>+	clear_bit(PG_dc_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clear_user_page);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c<br/>index 6a71b23f1383..a73cc94f806e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/mm/init.c</a></div><div class='hunk'>@@ -150,41 +150,18 @@ void __init setup_arch_memory(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	max_zone_pfn[ZONE_HIGHMEM] = max_high_pfn;</div><div class='ctx'> </div><div class='del'>-	high_memory = (void *)(min_high_pfn &lt;&lt; PAGE_SHIFT);</div><div class='del'>-</div><div class='ctx'> 	arch_pfn_offset = min(min_low_pfn, min_high_pfn);</div><div class='ctx'> 	kmap_init();</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_HIGHMEM */</div><div class='del'>-	/* pfn_valid() uses this when FLATMEM=y and HIGHMEM=n */</div><div class='del'>-	max_mapnr = max_low_pfn - min_low_pfn;</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_HIGHMEM */</div><div class='ctx'> </div><div class='ctx'> 	free_area_init(max_zone_pfn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init highmem_init(void)</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_HIGHMEM</div><div class='del'>-	unsigned long tmp;</div><div class='del'>-</div><div class='ctx'> 	memblock_phys_free(high_mem_start, high_mem_sz);</div><div class='del'>-	for (tmp = min_high_pfn; tmp &lt; max_high_pfn; tmp++)</div><div class='del'>-		free_highmem_page(pfn_to_page(tmp));</div><div class='ctx'> #endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mem_init - initializes memory</div><div class='del'>- *</div><div class='del'>- * Frees up bootmem</div><div class='del'>- * Calculates and displays memory available/used</div><div class='del'>- */</div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	memblock_free_all();</div><div class='del'>-	highmem_init();</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON((PTRS_PER_PGD * sizeof(pgd_t)) &gt; PAGE_SIZE);</div><div class='ctx'> 	BUILD_BUG_ON((PTRS_PER_PUD * sizeof(pud_t)) &gt; PAGE_SIZE);</div><div class='head'>diff --git a/arch/arc/mm/ioremap.c b/arch/arc/mm/ioremap.c<br/>index b07004d53267..fd8897a0e52c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/mm/ioremap.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ void __iomem *ioremap(phys_addr_t paddr, unsigned long size)</div><div class='ctx'> 		return (void __iomem *)(u32)paddr;</div><div class='ctx'> </div><div class='ctx'> 	return ioremap_prot(paddr, size,</div><div class='del'>-			    pgprot_val(pgprot_noncached(PAGE_KERNEL)));</div><div class='add'>+			    pgprot_noncached(PAGE_KERNEL));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap);</div><div class='ctx'> </div><div class='hunk'>@@ -44,10 +44,8 @@ EXPORT_SYMBOL(ioremap);</div><div class='ctx'>  * might need finer access control (R/W/X)</div><div class='ctx'>  */</div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t paddr, size_t size,</div><div class='del'>-			   unsigned long flags)</div><div class='add'>+			   pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	pgprot_t prot = __pgprot(flags);</div><div class='del'>-</div><div class='ctx'> 	/* force uncached */</div><div class='ctx'> 	return generic_ioremap_prot(paddr, size, pgprot_noncached(prot));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c<br/>index cae4a7aae0ed..ed6915ba76ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/tlb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/mm/tlb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/mm/tlb.c</a></div><div class='hunk'>@@ -488,7 +488,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vma-&gt;vm_flags &amp; VM_EXEC) {</div><div class='ctx'> 		struct folio *folio = page_folio(page);</div><div class='del'>-		int dirty = !test_and_set_bit(PG_dc_clean, &amp;folio-&gt;flags);</div><div class='add'>+		int dirty = !test_and_set_bit(PG_dc_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		if (dirty) {</div><div class='ctx'> 			unsigned long offset = offset_in_folio(folio, paddr);</div><div class='ctx'> 			nr = folio_nr_pages(folio);</div><div class='head'>diff --git a/arch/arc/net/bpf_jit_arcv2.c b/arch/arc/net/bpf_jit_arcv2.c<br/>index 4458e409ca0a..6d989b6d88c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arc/net/bpf_jit_arcv2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arc/net/bpf_jit_arcv2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arc/net/bpf_jit_arcv2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arc/net/bpf_jit_arcv2.c</a></div><div class='hunk'>@@ -2916,7 +2916,7 @@ bool check_jmp_32(u32 curr_off, u32 targ_off, u8 cond)</div><div class='ctx'> 	addendum = (cond == ARC_CC_AL) ? 0 : INSN_len_normal;</div><div class='ctx'> 	disp = get_displacement(curr_off + addendum, targ_off);</div><div class='ctx'> </div><div class='del'>-	if (ARC_CC_AL)</div><div class='add'>+	if (cond == ARC_CC_AL)</div><div class='ctx'> 		return is_valid_far_disp(disp);</div><div class='ctx'> 	else</div><div class='ctx'> 		return is_valid_near_disp(disp);</div><div class='head'>diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig<br/>index 749179a1d162..45d29320196f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/Kconfig</a></div><div class='hunk'>@@ -5,6 +5,7 @@ config ARM</div><div class='ctx'> 	select ARCH_32BIT_OFF_T</div><div class='ctx'> 	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE if HAVE_KRETPROBES &amp;&amp; FRAME_POINTER &amp;&amp; !ARM_UNWIND</div><div class='ctx'> 	select ARCH_HAS_BINFMT_FLAT</div><div class='add'>+	select ARCH_HAS_CACHE_LINE_SIZE if OF</div><div class='ctx'> 	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_CPU_FINALIZE_INIT if MMU</div><div class='ctx'> 	select ARCH_HAS_CURRENT_STACK_POINTER</div><div class='hunk'>@@ -37,7 +38,7 @@ config ARM</div><div class='ctx'> 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7</div><div class='ctx'> 	select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6</div><div class='ctx'> 	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='del'>-	select ARCH_SUPPORTS_CFI_CLANG</div><div class='add'>+	select ARCH_SUPPORTS_CFI</div><div class='ctx'> 	select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='ctx'> 	select ARCH_USE_BUILTIN_BSWAP</div><div class='hunk'>@@ -79,16 +80,16 @@ config ARM</div><div class='ctx'> 	select HAS_IOPORT</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL if AEABI &amp;&amp; !OABI_COMPAT</div><div class='ctx'> 	select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) &amp;&amp; !CPU_32v6</div><div class='del'>-	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32 &amp;&amp; MMU</div><div class='add'>+	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32 &amp;&amp; MMU &amp;&amp; (!PREEMPT_RT || !SMP)</div><div class='ctx'> 	select HAVE_ARCH_KFENCE if MMU &amp;&amp; !XIP_KERNEL</div><div class='ctx'> 	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_ARCH_KASAN if MMU &amp;&amp; !XIP_KERNEL</div><div class='ctx'> 	select HAVE_ARCH_KASAN_VMALLOC if HAVE_ARCH_KASAN</div><div class='add'>+	select HAVE_ARCH_KSTACK_ERASE</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_BITS if MMU</div><div class='ctx'> 	select HAVE_ARCH_PFN_VALID</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER if AEABI &amp;&amp; !OABI_COMPAT</div><div class='del'>-	select HAVE_ARCH_STACKLEAK</div><div class='ctx'> 	select HAVE_ARCH_THREAD_STRUCT_WHITELIST</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE</div><div class='hunk'>@@ -99,14 +100,15 @@ config ARM</div><div class='ctx'> 	select HAVE_BUILDTIME_MCOUNT_SORT</div><div class='ctx'> 	select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_DMA_CONTIGUOUS if MMU</div><div class='add'>+	select HAVE_EXTRA_IPI_TRACEPOINTS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32 &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_EXIT_THREAD</div><div class='ctx'> 	select HAVE_GUP_FAST if ARM_LPAE</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FREGS</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_GCC_PLUGINS</div><div class='ctx'> 	select HAVE_HW_BREAKPOINT if PERF_EVENTS &amp;&amp; (CPU_V6 || CPU_V6K || CPU_V7)</div><div class='hunk'>@@ -118,7 +120,7 @@ config ARM</div><div class='ctx'> 	select HAVE_KERNEL_XZ</div><div class='ctx'> 	select HAVE_KPROBES if !XIP_KERNEL &amp;&amp; !CPU_ENDIAN_BE32 &amp;&amp; !CPU_V7M</div><div class='ctx'> 	select HAVE_KRETPROBES if HAVE_KPROBES</div><div class='del'>-	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if (LD_VERSION &gt;= 23600 || LD_IS_LLD)</div><div class='add'>+	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if (LD_VERSION &gt;= 23600 || LD_IS_LLD) &amp;&amp; LD_CAN_USE_KEEP_IN_OVERLAY</div><div class='ctx'> 	select HAVE_MOD_ARCH_SPECIFIC</div><div class='ctx'> 	select HAVE_NMI</div><div class='ctx'> 	select HAVE_OPTPROBES if !THUMB2_KERNEL</div><div class='hunk'>@@ -130,6 +132,7 @@ config ARM</div><div class='ctx'> 	select MMU_GATHER_RCU_TABLE_FREE if SMP &amp;&amp; ARM_LPAE</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	select HAVE_RSEQ</div><div class='add'>+	select HAVE_RUST if CPU_LITTLE_ENDIAN &amp;&amp; CPU_32v7</div><div class='ctx'> 	select HAVE_STACKPROTECTOR</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select HAVE_UID16</div><div class='hunk'>@@ -164,15 +167,12 @@ config ARM</div><div class='ctx'> 	  &lt;http://www.arm.linux.org.uk/&gt;.</div><div class='ctx'> </div><div class='ctx'> config ARM_HAS_GROUP_RELOCS</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on !LD_IS_LLD || LLD_VERSION &gt;= 140000</div><div class='del'>-	depends on !COMPILE_TEST</div><div class='add'>+	def_bool !COMPILE_TEST</div><div class='ctx'> 	help</div><div class='ctx'> 	  Whether or not to use R_ARM_ALU_PC_Gn or R_ARM_LDR_PC_Gn group</div><div class='del'>-	  relocations, which have been around for a long time, but were not</div><div class='del'>-	  supported in LLD until version 14. The combined range is -/+ 256 MiB,</div><div class='del'>-	  which is usually sufficient, but not for allyesconfig, so we disable</div><div class='del'>-	  this feature when doing compile testing.</div><div class='add'>+	  relocations. The combined range is -/+ 256 MiB, which is usually</div><div class='add'>+	  sufficient, but not for allyesconfig, so we disable this feature</div><div class='add'>+	  when doing compile testing.</div><div class='ctx'> </div><div class='ctx'> config ARM_DMA_USE_IOMMU</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -391,8 +391,6 @@ source "arch/arm/mach-highbank/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-hisi/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "arch/arm/mach-hpe/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "arch/arm/mach-imx/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-ixp4xx/Kconfig"</div><div class='hunk'>@@ -939,28 +937,14 @@ config IRQSTACKS</div><div class='ctx'> config ARM_CPU_TOPOLOGY</div><div class='ctx'> 	bool "Support cpu topology definition"</div><div class='ctx'> 	depends on SMP &amp;&amp; CPU_V7</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support ARM cpu topology definition. The MPIDR register defines</div><div class='ctx'> 	  affinity between processors which is then used to describe the cpu</div><div class='ctx'> 	  topology of an ARM System.</div><div class='ctx'> </div><div class='del'>-config SCHED_MC</div><div class='del'>-	bool "Multi-core scheduler support"</div><div class='del'>-	depends on ARM_CPU_TOPOLOGY</div><div class='del'>-	help</div><div class='del'>-	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='del'>-	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='del'>-	  increased overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='del'>-config SCHED_SMT</div><div class='del'>-	bool "SMT scheduler support"</div><div class='del'>-	depends on ARM_CPU_TOPOLOGY</div><div class='del'>-	help</div><div class='del'>-	  Improves the CPU scheduler's decision making when dealing with</div><div class='del'>-	  MultiThreading at a cost of slightly increased overhead in some</div><div class='del'>-	  places. If unsure say N here.</div><div class='del'>-</div><div class='ctx'> config HAVE_ARM_SCU</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1229,7 +1213,7 @@ config HIGHMEM</div><div class='ctx'> </div><div class='ctx'> config HIGHPTE</div><div class='ctx'> 	bool "Allocate 2nd-level pagetables from highmem" if EXPERT</div><div class='del'>-	depends on HIGHMEM</div><div class='add'>+	depends on HIGHMEM &amp;&amp; !PREEMPT_RT</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  The VM uses one page of physical memory for each page table.</div><div class='hunk'>@@ -1376,8 +1360,7 @@ config CC_HAVE_STACKPROTECTOR_TLS</div><div class='ctx'> config STACKPROTECTOR_PER_TASK</div><div class='ctx'> 	bool "Use a unique stack canary value for each task"</div><div class='ctx'> 	depends on STACKPROTECTOR &amp;&amp; CURRENT_POINTER_IN_TPIDRURO &amp;&amp; !XIP_DEFLATED_DATA</div><div class='del'>-	depends on GCC_PLUGINS || CC_HAVE_STACKPROTECTOR_TLS</div><div class='del'>-	select GCC_PLUGIN_ARM_SSP_PER_TASK if !CC_HAVE_STACKPROTECTOR_TLS</div><div class='add'>+	depends on CC_HAVE_STACKPROTECTOR_TLS</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Due to the fact that GCC uses an ordinary symbol reference from</div><div class='hunk'>@@ -1598,6 +1581,9 @@ config ATAGS_PROC</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config AUTO_ZRELADDR</div><div class='ctx'> 	bool "Auto calculation of the decompressed kernel image address" if !ARCH_MULTIPLATFORM</div><div class='ctx'> 	default !(ARCH_FOOTBRIDGE || ARCH_RPC || ARCH_SA1100)</div><div class='hunk'>@@ -1748,5 +1734,3 @@ config ARCH_HIBERNATION_POSSIBLE</div><div class='ctx'> 	default y if ARCH_SUSPEND_POSSIBLE</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='del'>-</div><div class='del'>-source "arch/arm/Kconfig.assembler"</div><div class='head'>diff --git a/arch/arm/Kconfig.assembler b/arch/arm/Kconfig.assembler<br/>deleted file mode 100644<br/>index 5cb31aae1188..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig.assembler?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.assembler</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-config AS_VFP_VMRS_FPINST</div><div class='del'>-	def_bool $(as-instr,.fpu vfpv2\nvmrs r0$(comma)FPINST)</div><div class='del'>-	help</div><div class='del'>-	  Supported by binutils &gt;= 2.24 and LLVM integrated assembler.</div><div class='head'>diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug<br/>index 7f47b4f335c3..366f162e147d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig.debug?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.debug</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig.debug?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/Kconfig.debug</a></div><div class='hunk'>@@ -242,6 +242,10 @@ choice</div><div class='ctx'> 		depends on ARCH_BCM_5301X || ARCH_BCM_NSP</div><div class='ctx'> 		select DEBUG_UART_8250</div><div class='ctx'> </div><div class='add'>+	config DEBUG_BCMBCA</div><div class='add'>+		bool "Kernel low-level debugging on BCMBCA UART0"</div><div class='add'>+		depends on ARCH_BCMBCA</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_BCM_HR2</div><div class='ctx'> 		bool "Kernel low-level debugging on Hurricane 2 UART2"</div><div class='ctx'> 		depends on ARCH_BCM_HR2</div><div class='hunk'>@@ -1526,7 +1530,7 @@ config DEBUG_LL_INCLUDE</div><div class='ctx'> 	default "debug/vf.S" if DEBUG_VF_UART</div><div class='ctx'> 	default "debug/vt8500.S" if DEBUG_VT8500_UART0</div><div class='ctx'> 	default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1</div><div class='del'>-	default "debug/bcm63xx.S" if DEBUG_BCM63XX_UART</div><div class='add'>+	default "debug/bcm63xx.S" if DEBUG_BCM63XX_UART || DEBUG_BCMBCA</div><div class='ctx'> 	default "debug/digicolor.S" if DEBUG_DIGICOLOR_UA0</div><div class='ctx'> 	default "debug/brcmstb.S" if DEBUG_BRCMSTB_UART</div><div class='ctx'> 	default "mach/debug-macro.S"</div><div class='hunk'>@@ -1640,6 +1644,7 @@ config DEBUG_UART_PHYS</div><div class='ctx'> 	default 0xfe531000 if DEBUG_STIH41X_SBC_ASC1</div><div class='ctx'> 	default 0xfed32000 if DEBUG_STIH41X_ASC2</div><div class='ctx'> 	default 0xff690000 if DEBUG_RK32_UART2</div><div class='add'>+	default 0xff800640 if DEBUG_BCMBCA</div><div class='ctx'> 	default 0xffc02000 if DEBUG_SOCFPGA_UART0</div><div class='ctx'> 	default 0xffc02100 if DEBUG_SOCFPGA_ARRIA10_UART1</div><div class='ctx'> 	default 0xffc03000 if DEBUG_SOCFPGA_CYCLONE5_UART1</div><div class='hunk'>@@ -1664,7 +1669,7 @@ config DEBUG_UART_PHYS</div><div class='ctx'> 		DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \</div><div class='ctx'> 		DEBUG_RMOBILE_SCIFA4 || \</div><div class='ctx'> 		DEBUG_S3C64XX_UART || \</div><div class='del'>-		DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \</div><div class='add'>+		DEBUG_BCM63XX_UART || DEBUG_BCMBCA || DEBUG_ASM9260_UART || \</div><div class='ctx'> 		DEBUG_DIGICOLOR_UA0 || \</div><div class='ctx'> 		DEBUG_AT91_UART || DEBUG_STM32_UART || \</div><div class='ctx'> 		DEBUG_STIH41X_ASC2 || DEBUG_STIH41X_SBC_ASC1 || \</div><div class='hunk'>@@ -1734,6 +1739,7 @@ config DEBUG_UART_VIRT</div><div class='ctx'> 	default 0xfe018000 if DEBUG_MMP_UART3</div><div class='ctx'> 	default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART</div><div class='ctx'> 	default 0xfe300000 if DEBUG_BCM_KONA_UART</div><div class='add'>+	default 0xfe300640 if DEBUG_BCMBCA</div><div class='ctx'> 	default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HIX5HD2_UART</div><div class='ctx'> 	default 0xfeb24000 if DEBUG_RK3X_UART0</div><div class='ctx'> 	default 0xfeb26000 if DEBUG_RK3X_UART1</div><div class='hunk'>@@ -1765,7 +1771,7 @@ config DEBUG_UART_VIRT</div><div class='ctx'> 		DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \</div><div class='ctx'> 		DEBUG_QCOM_UARTDM || \</div><div class='ctx'> 		DEBUG_S3C64XX_UART || \</div><div class='del'>-		DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \</div><div class='add'>+		DEBUG_BCM63XX_UART || DEBUG_BCMBCA || DEBUG_ASM9260_UART || \</div><div class='ctx'> 		DEBUG_DIGICOLOR_UA0 || \</div><div class='ctx'> 		DEBUG_AT91_UART || DEBUG_STM32_UART || \</div><div class='ctx'> 		DEBUG_STIH41X_ASC2 || DEBUG_STIH41X_SBC_ASC1 || \</div><div class='head'>diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms<br/>index 845ab08e20a4..5c19c1f2cff6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig.platforms?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Kconfig.platforms</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/Kconfig.platforms?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/Kconfig.platforms</a></div><div class='hunk'>@@ -87,6 +87,31 @@ config MACH_ASM9260</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for Alphascale ASM9260 based platform.</div><div class='ctx'> </div><div class='add'>+menuconfig ARCH_HPE</div><div class='add'>+	bool "HPE SoC support"</div><div class='add'>+	depends on ARCH_MULTI_V7</div><div class='add'>+	help</div><div class='add'>+	  This enables support for HPE ARM based BMC chips.</div><div class='add'>+</div><div class='add'>+if ARCH_HPE</div><div class='add'>+</div><div class='add'>+config ARCH_HPE_GXP</div><div class='add'>+	bool "HPE GXP SoC"</div><div class='add'>+	depends on ARCH_MULTI_V7</div><div class='add'>+	select ARM_VIC</div><div class='add'>+	select GENERIC_IRQ_CHIP</div><div class='add'>+	select CLKSRC_MMIO</div><div class='add'>+	help</div><div class='add'>+	  HPE GXP is the name of the HPE Soc. This SoC is used to implement many</div><div class='add'>+	  BMC features at HPE. It supports ARMv7 architecture based on the Cortex</div><div class='add'>+	  A9 core. It is capable of using an AXI bus to which a memory controller</div><div class='add'>+	  is attached. It has multiple SPI interfaces to connect boot flash and</div><div class='add'>+	  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It</div><div class='add'>+	  has multiple i2c engines to drive connectivity with a host</div><div class='add'>+	  infrastructure.</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> menuconfig ARCH_MOXART</div><div class='ctx'> 	bool "MOXA ART SoC"</div><div class='ctx'> 	depends on ARCH_MULTI_V4</div><div class='head'>diff --git a/arch/arm/Makefile b/arch/arm/Makefile<br/>index aafebf145738..b7de4b6b284c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/Makefile</a></div><div class='hunk'>@@ -149,7 +149,8 @@ endif</div><div class='ctx'> # Need -Uarm for gcc &lt; 3.x</div><div class='ctx'> KBUILD_CPPFLAGS	+=$(cpp-y)</div><div class='ctx'> KBUILD_CFLAGS	+=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm</div><div class='del'>-KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float</div><div class='add'>+KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include $(srctree)/arch/arm/include/asm/unified.h -msoft-float</div><div class='add'>+KBUILD_RUSTFLAGS += --target=arm-unknown-linux-gnueabi</div><div class='ctx'> </div><div class='ctx'> CHECKFLAGS	+= -D__arm__</div><div class='ctx'> </div><div class='hunk'>@@ -188,7 +189,6 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE)	+= footbridge</div><div class='ctx'> machine-$(CONFIG_ARCH_GEMINI)		+= gemini</div><div class='ctx'> machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank</div><div class='ctx'> machine-$(CONFIG_ARCH_HISI)		+= hisi</div><div class='del'>-machine-$(CONFIG_ARCH_HPE)		+= hpe</div><div class='ctx'> machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx</div><div class='ctx'> machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone</div><div class='ctx'> machine-$(CONFIG_ARCH_LPC18XX)		+= lpc18xx</div><div class='hunk'>@@ -264,13 +264,13 @@ stack_protector_prepare: prepare0</div><div class='ctx'> 		-mstack-protector-guard=tls \</div><div class='ctx'> 		-mstack-protector-guard-offset=$(shell	\</div><div class='ctx'> 			awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\</div><div class='del'>-				include/generated/asm-offsets.h))</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> else</div><div class='ctx'> stack_protector_prepare: prepare0</div><div class='ctx'> 	$(eval SSP_PLUGIN_CFLAGS := \</div><div class='ctx'> 		-fplugin-arg-arm_ssp_per_task_plugin-offset=$(shell	\</div><div class='ctx'> 			awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\</div><div class='del'>-				include/generated/asm-offsets.h))</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> 	$(eval KBUILD_CFLAGS += $(SSP_PLUGIN_CFLAGS))</div><div class='ctx'> 	$(eval GCC_PLUGINS_CFLAGS += $(SSP_PLUGIN_CFLAGS))</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile<br/>index 945b5975fce2..a159120d1e42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/compressed/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/compressed/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/compressed/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/compressed/Makefile</a></div><div class='hunk'>@@ -9,7 +9,6 @@ OBJS		=</div><div class='ctx'> </div><div class='ctx'> HEAD	= head.o</div><div class='ctx'> OBJS	+= misc.o decompress.o</div><div class='del'>-CFLAGS_decompress.o += $(DISABLE_STACKLEAK_PLUGIN)</div><div class='ctx'> ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y)</div><div class='ctx'> OBJS	+= debug.o</div><div class='ctx'> AFLAGS_head.o += -DDEBUG</div><div class='hunk'>@@ -96,7 +95,8 @@ KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> </div><div class='ctx'> ccflags-y := -fpic $(call cc-option,-mno-single-pic-base,) -fno-builtin \</div><div class='ctx'> 	     -I$(srctree)/scripts/dtc/libfdt -fno-stack-protector \</div><div class='del'>-	     -I$(obj) $(DISABLE_ARM_SSP_PER_TASK_PLUGIN)</div><div class='add'>+	     $(DISABLE_KSTACK_ERASE) \</div><div class='add'>+	     -I$(obj)</div><div class='ctx'> ccflags-remove-$(CONFIG_FUNCTION_TRACER) += -pg</div><div class='ctx'> asflags-y := -DZIMAGE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/compressed/efi-header.S b/arch/arm/boot/compressed/efi-header.S<br/>index 230030c13085..65a3025c0e13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/compressed/efi-header.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/compressed/efi-header.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/compressed/efi-header.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/compressed/efi-header.S</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> 		@ is accepted as an EFI binary. Booting via the UEFI stub</div><div class='ctx'> 		@ will not execute those instructions, but the ARM/Linux</div><div class='ctx'> 		@ boot protocol does, so we need some NOPs here.</div><div class='del'>-		.inst	MZ_MAGIC | (0xe225 &lt;&lt; 16)	@ eor r5, r5, 0x4d000</div><div class='add'>+		.inst	IMAGE_DOS_SIGNATURE | (0xe225 &lt;&lt; 16) @ eor r5, r5, 0x4d000</div><div class='ctx'> 		eor	r5, r5, 0x4d000			@ undo previous insn</div><div class='ctx'> #else</div><div class='ctx'> 		__nop</div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		.long	pe_header - start		@ Offset to the PE header.</div><div class='ctx'> </div><div class='ctx'> pe_header:</div><div class='del'>-		.long	PE_MAGIC</div><div class='add'>+		.long	IMAGE_NT_SIGNATURE</div><div class='ctx'> </div><div class='ctx'> coff_header:</div><div class='ctx'> 		.short	IMAGE_FILE_MACHINE_THUMB	@ Machine</div><div class='hunk'>@@ -60,7 +60,7 @@ coff_header:</div><div class='ctx'> #define __pecoff_code_size (__pecoff_data_start - __efi_start)</div><div class='ctx'> </div><div class='ctx'> optional_header:</div><div class='del'>-		.short	PE_OPT_MAGIC_PE32		@ PE32 format</div><div class='add'>+		.short	IMAGE_NT_OPTIONAL_HDR32_MAGIC	@ PE32 format</div><div class='ctx'> 		.byte	0x02				@ MajorLinkerVersion</div><div class='ctx'> 		.byte	0x14				@ MinorLinkerVersion</div><div class='ctx'> 		.long	__pecoff_code_size		@ SizeOfCode</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile<br/>index cd0d044882cf..f71392a55df8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/Makefile</a></div><div class='hunk'>@@ -182,6 +182,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \</div><div class='ctx'> 	sun7i-a20-wits-pro-a20-dkt.dtb</div><div class='ctx'> </div><div class='ctx'> # Enables support for device-tree overlays for all pis</div><div class='add'>+DTC_FLAGS_sun8i-h2-plus-orangepi-zero := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-orangepi-lite := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-bananapi-m2-plus := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-nanopi-m1-plus := -@</div><div class='hunk'>@@ -199,6 +200,8 @@ DTC_FLAGS_sun8i-h3-nanopi-r1 := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-orangepi-pc := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-bananapi-m2-plus-v1.2 := -@</div><div class='ctx'> DTC_FLAGS_sun8i-h3-orangepi-pc-plus := -@</div><div class='add'>+DTC_FLAGS_sun8i-t113s-netcube-nagami-basic-carrier := -@</div><div class='add'>+DTC_FLAGS_sun8i-v3s-netcube-kumquat := -@</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='ctx'> 	sun8i-a23-evb.dtb \</div><div class='ctx'> 	sun8i-a23-gt90h-v4.dtb \</div><div class='hunk'>@@ -215,6 +218,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='ctx'> 	sun8i-a33-olinuxino.dtb \</div><div class='ctx'> 	sun8i-a33-q8-tablet.dtb \</div><div class='ctx'> 	sun8i-a33-sinlinx-sina33.dtb \</div><div class='add'>+	sun8i-a33-vstar.dtb \</div><div class='ctx'> 	sun8i-a83t-allwinner-h8homlet-v2.dtb \</div><div class='ctx'> 	sun8i-a83t-bananapi-m3.dtb \</div><div class='ctx'> 	sun8i-a83t-cubietruck-plus.dtb \</div><div class='hunk'>@@ -223,6 +227,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='ctx'> 	sun8i-h2-plus-libretech-all-h3-cc.dtb \</div><div class='ctx'> 	sun8i-h2-plus-orangepi-r1.dtb \</div><div class='ctx'> 	sun8i-h2-plus-orangepi-zero.dtb \</div><div class='add'>+	sun8i-h2-plus-orangepi-zero-interface-board.dtb \</div><div class='ctx'> 	sun8i-h3-bananapi-m2-plus.dtb \</div><div class='ctx'> 	sun8i-h3-bananapi-m2-plus-v1.2.dtb \</div><div class='ctx'> 	sun8i-h3-beelink-x2.dtb \</div><div class='hunk'>@@ -242,6 +247,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='ctx'> 	sun8i-h3-orangepi-plus.dtb \</div><div class='ctx'> 	sun8i-h3-orangepi-plus2e.dtb \</div><div class='ctx'> 	sun8i-h3-orangepi-zero-plus2.dtb \</div><div class='add'>+	sun8i-h3-orangepi-zero-plus2-interface-board.dtb \</div><div class='ctx'> 	sun8i-h3-rervision-dvk.dtb \</div><div class='ctx'> 	sun8i-h3-zeropi.dtb \</div><div class='ctx'> 	sun8i-h3-emlid-neutis-n5h3-devboard.dtb \</div><div class='hunk'>@@ -255,12 +261,19 @@ dtb-$(CONFIG_MACH_SUN8I) += \</div><div class='ctx'> 	sun8i-s3-lichee-zero-plus.dtb \</div><div class='ctx'> 	sun8i-s3-pinecube.dtb \</div><div class='ctx'> 	sun8i-t113s-mangopi-mq-r-t113.dtb \</div><div class='add'>+	sun8i-t113s-netcube-nagami-basic-carrier.dtb \</div><div class='add'>+	sun8i-t113s-netcube-nagami-keypad-carrier.dtb \</div><div class='ctx'> 	sun8i-t3-cqa3t-bv3.dtb \</div><div class='ctx'> 	sun8i-v3-sl631-imx179.dtb \</div><div class='ctx'> 	sun8i-v3s-anbernic-rg-nano.dtb \</div><div class='ctx'> 	sun8i-v3s-licheepi-zero.dtb \</div><div class='ctx'> 	sun8i-v3s-licheepi-zero-dock.dtb \</div><div class='add'>+	sun8i-v3s-netcube-kumquat.dtb \</div><div class='ctx'> 	sun8i-v40-bananapi-m2-berry.dtb</div><div class='add'>+sun8i-h2-plus-orangepi-zero-interface-board-dtbs += \</div><div class='add'>+	sun8i-h2-plus-orangepi-zero.dtb sun8i-orangepi-zero-interface-board.dtbo</div><div class='add'>+sun8i-h3-orangepi-zero-plus2-interface-board-dtbs += \</div><div class='add'>+	sun8i-h3-orangepi-zero-plus2.dtb sun8i-orangepi-zero-interface-board.dtbo</div><div class='ctx'> dtb-$(CONFIG_MACH_SUN9I) += \</div><div class='ctx'> 	sun9i-a80-optimus.dtb \</div><div class='ctx'> 	sun9i-a80-cubieboard4.dtb</div><div class='hunk'>@@ -268,7 +281,3 @@ dtb-$(CONFIG_MACH_SUNIV) += \</div><div class='ctx'> 	suniv-f1c100s-licheepi-nano.dtb \</div><div class='ctx'> 	suniv-f1c200s-lctech-pi.dtb \</div><div class='ctx'> 	suniv-f1c200s-popstick-v1.1.dtb</div><div class='del'>-dtb-$(CONFIG_MACH_SUNIV) += \</div><div class='del'>-	suniv-f1c100s-licheepi-nano.dtb \</div><div class='del'>-	suniv-f1c200s-lctech-pi.dtb \</div><div class='del'>-	suniv-f1c200s-popstick-v1.1.dtb</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts<br/>index 83d283cf6633..d425d9ee83db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts</a></div><div class='hunk'>@@ -218,7 +218,7 @@</div><div class='ctx'> &amp;usbphy {</div><div class='ctx'> 	usb0_id_det-gpios = &lt;&amp;pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)&gt;; /* PH4 */</div><div class='ctx'> 	usb0_vbus_det-gpios = &lt;&amp;pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)&gt;; /* PH5 */</div><div class='del'>-	usb0_vbus-supply   = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='ctx'> 	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='ctx'> 	usb2_vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts<br/>index 46ecf9db2324..d8b362c9661a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun7i-a20-bananapi.dts</a></div><div class='hunk'>@@ -48,6 +48,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "LeMaker Banana Pi";</div><div class='hunk'>@@ -169,6 +170,32 @@</div><div class='ctx'> &amp;gmac_mdio {</div><div class='ctx'> 	phy1: ethernet-phy@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		leds {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			led@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				function = LED_FUNCTION_LAN;</div><div class='add'>+				linux,default-trigger = "netdev";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+				function = LED_FUNCTION_LAN;</div><div class='add'>+				linux,default-trigger = "netdev";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				function = LED_FUNCTION_LAN;</div><div class='add'>+				linux,default-trigger = "netdev";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi<br/>new file mode 100644<br/>index 000000000000..ba794b842ec4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Icenowy Zheng &lt;uwu@icenowy.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sun8i-a33.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_8bit_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2_8bit_pins {</div><div class='add'>+	/* Increase drive strength for DDR modes */</div><div class='add'>+	drive-strength = &lt;40&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_rsb {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp22x: pmic@3a3 {</div><div class='add'>+		compatible = "x-powers,axp223";</div><div class='add'>+		reg = &lt;0x3a3&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		eldoin-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+		x-powers,drive-vbus-en;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp223.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-io";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;2350000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;2650000&gt;;</div><div class='add'>+	regulator-name = "vdd-dll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dc5ldo {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpus";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-3v3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-sys";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc5 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	regulator-name = "vcc-dram";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_rtc_ldo {</div><div class='add'>+	regulator-name = "vcc-rtc";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts b/arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts<br/>new file mode 100644<br/>index 000000000000..9f5c29b3df46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Icenowy Zheng &lt;uwu@icenowy.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-a33-vstar-core1.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rervision A33-Vstar";</div><div class='add'>+	compatible = "rervision,a33-vstar",</div><div class='add'>+		     "rervision,a33-core1",</div><div class='add'>+		     "allwinner,sun8i-a33";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		ethernet0 = &amp;r8152;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb1-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 1 2 GPIO_ACTIVE_HIGH&gt;; /* PB2 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;r_pio 0 6 GPIO_ACTIVE_LOW&gt;; /* PL6 */</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ac_power_supply {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dai {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hub@1 {</div><div class='add'>+		/* Onboard GL850G hub which needs no extra power sequence */</div><div class='add'>+		compatible = "usb5e3,608";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		r8152: ethernet@4 {</div><div class='add'>+			/*</div><div class='add'>+			 * Onboard Realtek RTL8152 USB Ethernet,</div><div class='add'>+			 * with no MAC address programmed</div><div class='add'>+			 */</div><div class='add'>+			compatible = "usbbda,8152";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	vref-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	button-191 {</div><div class='add'>+		label = "V+";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;191011&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-391 {</div><div class='add'>+		label = "V-";</div><div class='add'>+		linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;391304&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	button-600 {</div><div class='add'>+		label = "BACK";</div><div class='add'>+		linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+		channel = &lt;0&gt;;</div><div class='add'>+		voltage = &lt;600000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_LOW&gt;; /* PB4 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pg_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		interrupt-parent = &lt;&amp;r_pio&gt;;</div><div class='add'>+		interrupts = &lt;0 7 IRQ_TYPE_LEVEL_LOW&gt;; /* PL7 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Our WiFi chip needs both DLDO1 and DLDO2 to be powered at the same</div><div class='add'>+ * time, with the two being in sync. Since this is not really</div><div class='add'>+ * supported right now, just use the two as always on, and we will fix</div><div class='add'>+ * it later.</div><div class='add'>+ */</div><div class='add'>+&amp;reg_dldo1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-wifi0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-wifi1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_drivevbus {</div><div class='add'>+	regulator-name = "usb0-vbus";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	/* TODO: on-board microphone */</div><div class='add'>+</div><div class='add'>+	simple-audio-card,widgets = "Headphone", "Headphone Jack";</div><div class='add'>+	simple-audio-card,routing =</div><div class='add'>+		"Left DAC", "DACL",</div><div class='add'>+		"Right DAC", "DACR",</div><div class='add'>+		"Headphone Jack", "HP";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pg_pins&gt;, &lt;&amp;uart1_cts_rts_pg_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		vbat-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;r_pio 0 10 GPIO_ACTIVE_HIGH&gt;; /* PL10 */</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;r_pio 0 9 GPIO_ACTIVE_HIGH&gt;; /* PL9 */</div><div class='add'>+		shutdown-gpios = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_HIGH&gt;; /* PL8 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_power_supply {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_id_det-gpios = &lt;&amp;pio 7 8 GPIO_ACTIVE_HIGH&gt;; /* PH8 */</div><div class='add'>+	usb0_vbus_power-supply = &lt;&amp;usb_power_supply&gt;;</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_drivevbus&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi<br/>index addf0cb0f465..6f88d8764e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi</a></div><div class='hunk'>@@ -1225,7 +1225,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				cpu-hot-limit {</div><div class='add'>+				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_hot&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -1255,7 +1255,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				cpu-hot-limit {</div><div class='add'>+				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_hot&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts<br/>index 1b001f2ad0ef..b23cec5b89eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</a></div><div class='hunk'>@@ -112,6 +112,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Audio input/output is exposed on the 13-pin header and can't be used for</div><div class='add'>+ * anything else. However, adapter boards may use different audio routing.</div><div class='add'>+ * - https://linux-sunxi.org/Xunlong_Orange_Pi_Zero#Expansion_Port</div><div class='add'>+ * - Allwinner H3 Datasheet, section 3.1. Pin Characteristics</div><div class='add'>+ */</div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing =</div><div class='add'>+		"Line Out", "LINEOUT",</div><div class='add'>+		"MIC1", "Mic",</div><div class='add'>+		"Mic",  "MBIAS";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_vdd_cpux&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts<br/>index 6d85370e04f1..9a2742363cd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts</a></div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts<br/>index 7a6444a10e25..97a3565ac7a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</a></div><div class='hunk'>@@ -99,6 +99,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Audio input/output is exposed on the 13-pin header and can't be used for</div><div class='add'>+ * anything else. However, adapter boards may use different audio routing.</div><div class='add'>+ * - http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-Zero-Plus-2.html</div><div class='add'>+ * - Allwinner H3 Datasheet, section 3.1. Pin Characteristics</div><div class='add'>+ */</div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing =</div><div class='add'>+		"Line Out", "LINEOUT",</div><div class='add'>+		"MIC1", "Mic",</div><div class='add'>+		"Mic",  "MBIAS";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;de {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi b/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi<br/>index eac2349a2380..cfd039840b43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-h3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-h3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-h3.dtsi</a></div><div class='hunk'>@@ -262,7 +262,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				cpu-hot-limit {</div><div class='add'>+				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_hot_trip&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso b/arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso<br/>new file mode 100644<br/>index 000000000000..e137eefee341<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-orangepi-zero-interface-board.dtso</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * Devicetree overlay for the Orange Pi Zero Interface board (OP0014).</div><div class='add'>+ *</div><div class='add'>+ *   https://orangepi.com/index.php?route=product/product&amp;product_id=871</div><div class='add'>+ *</div><div class='add'>+ * This overlay applies to the following base files:</div><div class='add'>+ *</div><div class='add'>+ * - arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts</div><div class='add'>+ * - arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;de {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;r_ir_rx_pin&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi b/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi<br/>index 272584881bb2..a0f787581dd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi</a></div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ehci0 {</div><div class='del'>-	status  = "okay";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mmc1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi<br/>index a5b1f1e3900d..f0ed802a9d08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-r40.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-r40.dtsi</a></div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				cpu-hot-limit {</div><div class='add'>+				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_hot_trip&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -705,7 +705,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			/omit-if-no-ref/</div><div class='del'>-			uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{</div><div class='add'>+			uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins {</div><div class='ctx'> 				pins = "PI16", "PI17";</div><div class='ctx'> 				function = "uart2";</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts<br/>new file mode 100644<br/>index 000000000000..5262102a85f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-basic-carrier.dts</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Lukas Schmid &lt;lukas.schmid@netcube.li&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-t113s-netcube-nagami.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NetCube Systems Nagami Basic Carrier Board";</div><div class='add'>+	compatible = "netcube,nagami-basic-carrier", "netcube,nagami",</div><div class='add'>+		     "allwinner,sun8i-t113s";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	disable-wp;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_id_det-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_HIGH&gt;; /* PF6 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts<br/>new file mode 100644<br/>index 000000000000..4ffa6a0216d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami-keypad-carrier.dts</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Lukas Schmid &lt;lukas.schmid@netcube.li&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-t113s-netcube-nagami.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NetCube Systems Nagami Keypad Carrier Board";</div><div class='add'>+	compatible = "netcube,nagami-keypad-carrier", "netcube,nagami",</div><div class='add'>+		     "allwinner,sun8i-t113s";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_status_red: led-status-red {</div><div class='add'>+			gpios = &lt;&amp;pio 3 16 GPIO_ACTIVE_HIGH&gt;;  /* PD16 */</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_status_green: led-status-green {</div><div class='add'>+			gpios = &lt;&amp;pio 3 22 GPIO_ACTIVE_HIGH&gt;;  /* PD22 */</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tca8418: keypad@34 {</div><div class='add'>+		compatible = "ti,tca8418";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 5 6 IRQ_TYPE_EDGE_FALLING&gt;;  /* PF6 */</div><div class='add'>+		linux,keymap = &lt;MATRIX_KEY(0x03, 0x00, KEY_NUMERIC_A)</div><div class='add'>+				MATRIX_KEY(0x03, 0x01, KEY_NUMERIC_1)</div><div class='add'>+				MATRIX_KEY(0x03, 0x02, KEY_NUMERIC_2)</div><div class='add'>+				MATRIX_KEY(0x03, 0x03, KEY_NUMERIC_3)</div><div class='add'>+				MATRIX_KEY(0x02, 0x00, KEY_NUMERIC_B)</div><div class='add'>+				MATRIX_KEY(0x02, 0x01, KEY_NUMERIC_4)</div><div class='add'>+				MATRIX_KEY(0x02, 0x02, KEY_NUMERIC_5)</div><div class='add'>+				MATRIX_KEY(0x02, 0x03, KEY_NUMERIC_6)</div><div class='add'>+				MATRIX_KEY(0x01, 0x00, KEY_NUMERIC_C)</div><div class='add'>+				MATRIX_KEY(0x01, 0x01, KEY_NUMERIC_7)</div><div class='add'>+				MATRIX_KEY(0x01, 0x02, KEY_NUMERIC_8)</div><div class='add'>+				MATRIX_KEY(0x01, 0x03, KEY_NUMERIC_9)</div><div class='add'>+				MATRIX_KEY(0x00, 0x00, KEY_NUMERIC_D)</div><div class='add'>+				MATRIX_KEY(0x00, 0x01, KEY_CLEAR)</div><div class='add'>+				MATRIX_KEY(0x00, 0x02, KEY_NUMERIC_0)</div><div class='add'>+				MATRIX_KEY(0x00, 0x03, KEY_OK)</div><div class='add'>+		&gt;;</div><div class='add'>+		keypad,num-rows = &lt;4&gt;;</div><div class='add'>+		keypad,num-columns = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	gpio-line-names = "", "", "", "", // PA</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "", // PB</div><div class='add'>+			  "", "", "UART3_TX", "UART3_RX",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "eMMC_CLK", "eMMC_CMD", // PC</div><div class='add'>+			  "eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "", // PD</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "USB_SEC_EN", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "LED_STATUS_RED", "", "", "",</div><div class='add'>+			  "I2C2_SCL", "I2C2_SDA", "LED_STATUS_GREEN", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE</div><div class='add'>+			  "ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "",</div><div class='add'>+			  "ETH_MDC", "ETH_MDIO", "QWIIC_nINT", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "", // PF</div><div class='add'>+			  "", "", "KEY_nINT", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG</div><div class='add'>+			  "ESP_D2", "ESP_D3", "UART1_TXD", "UART1_RXD",</div><div class='add'>+			  "ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi<br/>new file mode 100644<br/>index 000000000000..544d60cfc32e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi</a></div><div class='hunk'>@@ -0,0 +1,250 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Lukas Schmid &lt;lukas.schmid@netcube.li&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-t113s.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NetCube Systems Nagami SoM";</div><div class='add'>+	compatible = "netcube,nagami", "allwinner,sun8i-t113s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial1 = &amp;uart1; // ESP32 Bootloader UART</div><div class='add'>+		serial3 = &amp;uart3; // Console UART on Card Edge</div><div class='add'>+		ethernet0 = &amp;emac;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial3:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* module wide 3.3V supply directly from the card edge */</div><div class='add'>+	reg_vcc3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */</div><div class='add'>+	reg_vcc_core: regulator-core {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-core";</div><div class='add'>+		regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* USB0 MUX to switch connect to Card-Edge only after BootROM */</div><div class='add'>+	usb0_sec_mux: mux-controller{</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;pio 3 9 GPIO_ACTIVE_HIGH&gt;; /* PD9 */</div><div class='add'>+		idle-state = &lt;1&gt;; /* USB connected to Card-Edge by default */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Reset of ESP32 */</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 6 9 GPIO_ACTIVE_LOW&gt;; /* PG9 */</div><div class='add'>+		post-power-on-delay-ms = &lt;1500&gt;;</div><div class='add'>+		power-off-delay-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vcc_core&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vcc_core&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcxo {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	nvmem-cells = &lt;&amp;eth0_macaddress&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+	phy-handle = &lt;&amp;lan8720a&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rmii_pe_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Default I2C Interface on Card-Edge */</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pd_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Exposed as the QWIIC connector and used by the internal EEPROM */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pg_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";		/* actually it's a 24AA02E48 */</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		eth0_macaddress: macaddress@fa {</div><div class='add'>+			reg = &lt;0xfa 0x06&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Default I2S Interface on Card-Edge */</div><div class='add'>+&amp;i2s1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1_pins&gt;, &lt;&amp;i2s1_din0_pin&gt;, &lt;&amp;i2s1_dout0_pin&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Phy is on SoM. MDI signals pre-magnetics are on the card edge */</div><div class='add'>+&amp;mdio {</div><div class='add'>+	lan8720a: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Default SD Interface on Card-Edge */</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the on-board ESP32 */</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the on-board eMMC */</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pd-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names = "", "", "", "", // PA</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "CAN0_TX", "CAN0_RX", // PB</div><div class='add'>+			  "CAN1_TX", "CAN1_RX", "UART3_TX", "UART3_RX",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "eMMC_CLK", "eMMC_CMD", // PC</div><div class='add'>+			  "eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "", // PD</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "USB_SEC_EN", "SPI1_CS", "SPI1_CLK",</div><div class='add'>+			  "SPI1_MOSI", "SPI1_MISO", "SPI1_HOLD", "SPI1_WP",</div><div class='add'>+			  "PD16", "", "", "",</div><div class='add'>+			  "I2C2_SCL", "I2C2_SDA", "PD22", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE</div><div class='add'>+			  "ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "",</div><div class='add'>+			  "ETH_MDC", "ETH_MDIO", "QWIIC_nINT", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "SD_D1", "SD_D0", "SD_CLK", "SD_CLK", // PF</div><div class='add'>+			  "SD_D3", "SD_D2", "PF6", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG</div><div class='add'>+			  "ESP_D2", "ESP_D3", "UART1_TXD", "UART1_RXD",</div><div class='add'>+			  "ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA",</div><div class='add'>+			  "I2S1_WS", "I2S1_CLK", "I2S1_DIN0", "I2S1_DOUT0",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Remove the unused CK pin from the pinctl as it is unconnected */</div><div class='add'>+&amp;rmii_pe_pins {</div><div class='add'>+	pins = "PE0", "PE1", "PE2", "PE3", "PE4",</div><div class='add'>+	       "PE5", "PE6", "PE8", "PE9";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Default SPI Interface on Card-Edge */</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_pins&gt;, &lt;&amp;spi1_hold_pin&gt;, &lt;&amp;spi1_wp_pin&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	cs-gpios = &lt;0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the Bootloader/Console of the ESP32 */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pg6_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Console/Debug UART on Card-Edge */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_pb_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi<br/>index 186c30cbe6ee..95bd0b616349 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-v3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-v3.dtsi</a></div><div class='hunk'>@@ -56,6 +56,15 @@</div><div class='ctx'> 		function = "i2s";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	lcd_rgb666_pd_pins: lcd-rgb666-pd-pins {</div><div class='add'>+		pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",</div><div class='add'>+		       "PD6", "PD7", "PD8", "PD9", "PD10", "PD11",</div><div class='add'>+		       "PD12", "PD13", "PD14", "PD15", "PD16", "PD17",</div><div class='add'>+		       "PD18", "PD19", "PD20", "PD21";</div><div class='add'>+		function = "lcd";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uart1_pg_pins: uart1-pg-pins {</div><div class='ctx'> 		pins = "PG6", "PG7";</div><div class='ctx'> 		function = "uart1";</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts b/arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts<br/>new file mode 100644<br/>index 000000000000..cb6292319f39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts</a></div><div class='hunk'>@@ -0,0 +1,276 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Lukas Schmid &lt;lukas.schmid@netcube.li&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sun8i-v3s.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/{</div><div class='add'>+	model = "NetCube Systems Kumquat";</div><div class='add'>+	compatible = "netcube,kumquat", "allwinner,sun8i-v3s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		ethernet0 = &amp;emac;</div><div class='add'>+		rtc0 = &amp;ds3232;</div><div class='add'>+		rtc1 = &amp;rtc; /* not battery backed */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 40 MHz Crystal Oscillator on PCB */</div><div class='add'>+	clk_can0: clock-can0 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		key-user {</div><div class='add'>+			label = "GPIO Key User";</div><div class='add'>+			linux,code = &lt;KEY_PROG1&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 1 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;; /* PB2 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-heartbeat {</div><div class='add'>+			gpios = &lt;&amp;pio 4 4 GPIO_ACTIVE_HIGH&gt;; /* PE4 */</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-mmc0-act {</div><div class='add'>+			gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_HIGH&gt;; /* PF6 */</div><div class='add'>+			linux,default-trigger = "mmc0";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DISK;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* EA3036C Switching 3 Channel Regulator - Channel 2 */</div><div class='add'>+	reg_vcc3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* K7805-1000R3 Switching Regulator supplied from main 12/24V terminal block */</div><div class='add'>+	reg_vcc5v0: regulator-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing =</div><div class='add'>+		"Headphone", "HP",</div><div class='add'>+		"Headphone", "HPCOM",</div><div class='add'>+		"MIC1", "Mic",</div><div class='add'>+		"Mic", "HBIAS";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	allwinner,leds-active-low;</div><div class='add'>+	nvmem-cells = &lt;&amp;eth0_macaddress&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";		/* actually it's a 24AA02E48 */</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		eth0_macaddress: macaddress@fa {</div><div class='add'>+			reg = &lt;0xfa 0x06&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tusb320: typec@60 {</div><div class='add'>+		compatible = "ti,tusb320";</div><div class='add'>+		reg = &lt;0x60&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 1 5 IRQ_TYPE_LEVEL_LOW&gt;;  /* PB5 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ds3232: rtc@68 {</div><div class='add'>+		compatible = "dallas,ds3232";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Exposed as the Flash/SD Header on the board */</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the on-board ESP32 */</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Disable external 32k osc as it is broken on current revision */</div><div class='add'>+&amp;osc32k {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names = "", "", "", "", // PA</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "CAN_nCS", "CAN_nINT", "USER_SW", "PB3", // PB</div><div class='add'>+			  "USB_ID", "USBC_nINT", "I2C0_SCL", "I2C0_SDA",</div><div class='add'>+			  "UART0_TX", "UART0_RX", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "SPI_MISO", "SPI_SCK", "FLASH_nCS", "SPI_MOSI", // PC</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "", // PD</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "Q12", "Q11", "Q10", "Q9", // PE</div><div class='add'>+			  "LED_SYS0", "I1", "Q1", "Q2",</div><div class='add'>+			  "I2", "I3", "Q3", "Q4",</div><div class='add'>+			  "I4", "I5", "Q5", "Q6",</div><div class='add'>+			  "I6", "I7", "Q7", "Q8",</div><div class='add'>+			  "I8", "UART1_TXD", "UART1_RXD", "ESP_nRST",</div><div class='add'>+			  "ESP_nBOOT", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "SD_D1", "SD_D0", "SD_CLK", "SD_CMD", // PF</div><div class='add'>+			  "SD_D3", "SD_D2", "LED_SYS1", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG</div><div class='add'>+			  "ESP_D2", "ESP_D3", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Disable external 32k osc as it is broken on current revision */</div><div class='add'>+&amp;rtc {</div><div class='add'>+	/delete-property/ clocks;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Exposed as a USB-C connector with USB-Serial converter */</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the Bootloader/Console of the ESP32 */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pe_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	extcon = &lt;&amp;tusb320 0&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_id_det-gpios = &lt;&amp;pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PB4 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	cs-gpios = &lt;0&gt;, &lt;&amp;pio 1 0 GPIO_ACTIVE_LOW&gt;; /* PB0 */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		label = "firmware";</div><div class='add'>+		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can@1 {</div><div class='add'>+		compatible = "microchip,mcp2518fd";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_can0&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 1 1 IRQ_TYPE_LEVEL_LOW&gt;;  /* PB1 */</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+		xceiver-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi<br/>index 9e13c2aa8911..fa54510319ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi</a></div><div class='hunk'>@@ -411,11 +411,26 @@</div><div class='ctx'> 				function = "i2c1";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			lcd_rgb666_pe_pins: lcd-rgb666-pe-pins {</div><div class='add'>+				pins = "PE0", "PE1", "PE2", "PE3", "PE4", "PE5",</div><div class='add'>+				       "PE6", "PE7", "PE8", "PE9", "PE10", "PE11",</div><div class='add'>+				       "PE12", "PE13", "PE14", "PE15", "PE16", "PE17",</div><div class='add'>+				       "PE18", "PE19", "PE23", "PE24";</div><div class='add'>+				function = "lcd";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart0_pb_pins: uart0-pb-pins {</div><div class='ctx'> 				pins = "PB8", "PB9";</div><div class='ctx'> 				function = "uart0";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			uart1_pe_pins: uart1-pe-pins {</div><div class='add'>+				pins = "PE21", "PE22";</div><div class='add'>+				function = "uart1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart2_pins: uart2-pins {</div><div class='ctx'> 				pins = "PB0", "PB1";</div><div class='ctx'> 				function = "uart2";</div><div class='hunk'>@@ -646,7 +661,7 @@</div><div class='ctx'> 			reg = &lt;0x01cb4000 0x3000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_BUS_CSI&gt;,</div><div class='del'>-				 &lt;&amp;ccu CLK_CSI1_SCLK&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_CSI_SCLK&gt;,</div><div class='ctx'> 				 &lt;&amp;ccu CLK_DRAM_CSI&gt;;</div><div class='ctx'> 			clock-names = "bus", "mod", "ram";</div><div class='ctx'> 			resets = &lt;&amp;ccu RST_BUS_CSI&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts<br/>index c8ca8cb7f5c9..52ad95a2063a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts</a></div><div class='hunk'>@@ -280,8 +280,8 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_dcdc5: dcdc5 {</div><div class='ctx'> 				regulator-always-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1425000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1575000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1550000&gt;;</div><div class='ctx'> 				regulator-name = "vcc-dram";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts<br/>index 43896723a994..472ded0aafcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/suniv-f1c100s-licheepi-nano.dts</a></div><div class='hunk'>@@ -62,6 +62,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing =</div><div class='add'>+		"Headphone", "HP",</div><div class='add'>+		"Headphone", "HPCOM",</div><div class='add'>+		"MIC", "Mic";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_otg {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi b/arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi<br/>index 3c61d59ab5f8..e4b41bc93852 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/allwinner/suniv-f1c100s.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/suniv-ccu-f1c100s.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/suniv-ccu-f1c100s.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/sun4i-a10.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -159,6 +160,15 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dma: dma-controller@1c02000 {</div><div class='add'>+			compatible = "allwinner,suniv-f1c100s-dma";</div><div class='add'>+			reg = &lt;0x01c02000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;18&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_DMA&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_DMA&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ccu: clock@1c20000 {</div><div class='ctx'> 			compatible = "allwinner,suniv-f1c100s-ccu";</div><div class='ctx'> 			reg = &lt;0x01c20000 0x400&gt;;</div><div class='hunk'>@@ -326,5 +336,19 @@</div><div class='ctx'> 			resets = &lt;&amp;ccu RST_BUS_UART2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		codec: codec@1c23c00 {</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,suniv-f1c100s-codec";</div><div class='add'>+			reg = &lt;0x01c23c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;21&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_CODEC&gt;, &lt;&amp;ccu CLK_CODEC&gt;;</div><div class='add'>+			clock-names = "apb", "codec";</div><div class='add'>+			dmas = &lt;&amp;dma SUN4I_DMA_NORMAL 12&gt;,</div><div class='add'>+			       &lt;&amp;dma SUN4I_DMA_NORMAL 12&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_CODEC&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/Makefile b/arch/arm/boot/dts/amlogic/Makefile<br/>index a84310780ea3..3c8a1e88b386 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/Makefile</a></div><div class='hunk'>@@ -1,8 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-dtb-$(CONFIG_MACH_MESON6) += \</div><div class='del'>-	meson6-atv1200.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_MESON8) += \</div><div class='ctx'> 	meson8-minix-neo-x8.dtb \</div><div class='add'>+	meson8-fernsehfee3.dtb \</div><div class='ctx'> 	meson8b-ec100.dtb \</div><div class='ctx'> 	meson8b-mxq.dtb \</div><div class='ctx'> 	meson8b-odroidc1.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson.dtsi b/arch/arm/boot/dts/amlogic/meson.dtsi<br/>index 8cb0fc78b2af..28ec2c821cdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson.dtsi</a></div><div class='hunk'>@@ -255,8 +255,6 @@</div><div class='ctx'> </div><div class='ctx'> 		usb0: usb@c9040000 {</div><div class='ctx'> 			compatible = "snps,dwc2";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0xc9040000 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb0_phy&gt;;</div><div class='hunk'>@@ -270,8 +268,6 @@</div><div class='ctx'> </div><div class='ctx'> 		usb1: usb@c90c0000 {</div><div class='ctx'> 			compatible = "snps,dwc2";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0xc90c0000 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			phys = &lt;&amp;usb1_phy&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson6-atv1200.dts b/arch/arm/boot/dts/amlogic/meson6-atv1200.dts<br/>deleted file mode 100644<br/>index 98e1c94c0261..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson6-atv1200.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson6-atv1200.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='del'>-/*</div><div class='del'>- * Copyright 2014 Carlo Caione &lt;carlo@caione.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "meson6.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Geniatech ATV1200";</div><div class='del'>-	compatible = "geniatech,atv1200", "amlogic,meson6";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart_AO;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart_AO {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ethmac {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson6.dtsi b/arch/arm/boot/dts/amlogic/meson6.dtsi<br/>deleted file mode 100644<br/>index 4716030a48d0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson6.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,73 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='del'>-/*</div><div class='del'>- * Copyright 2014 Carlo Caione &lt;carlo@caione.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include "meson.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Amlogic Meson6 SoC";</div><div class='del'>-	compatible = "amlogic,meson6";</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu@200 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a9";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='del'>-			reg = &lt;0x200&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpu@201 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a9";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='del'>-			reg = &lt;0x201&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	apb2: bus@d0000000 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		reg = &lt;0xd0000000 0x40000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0xd0000000 0x40000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clk81: clk@0 {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;200000000&gt;;</div><div class='del'>-	};</div><div class='del'>-}; /* end of / */</div><div class='del'>-</div><div class='del'>-&amp;efuse {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;timer_abcde {</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart_AO {</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk", "baud";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart_A {</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk", "baud";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart_B {</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk", "baud";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart_C {</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk", "baud";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts b/arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts<br/>new file mode 100644<br/>index 000000000000..4e52447d51bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8-fernsehfee3.dts</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+// Copyright (C) 2025 J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "meson8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Fernsehfee 3.0";</div><div class='add'>+	compatible = "tcu,fernsehfee3", "amlogic,meson8";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart_AO;</div><div class='add'>+		gpiochip0 = &amp;gpio;</div><div class='add'>+		gpiochip1 = &amp;gpio_ao;</div><div class='add'>+		i2c0 = &amp;i2c_AO;</div><div class='add'>+		i2c1 = &amp;i2c_B;</div><div class='add'>+		mmc0 = &amp;sdhc;</div><div class='add'>+		mmc1 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000&gt;;  /* 1 GiB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		power-button {</div><div class='add'>+			label = "Power button";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			/*</div><div class='add'>+			 * The power LED can be turned red, otherwise it is green.</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;gpio_ao GPIO_TEST_N GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v: regulator-5v {</div><div class='add'>+		/* 5V rail, always on as long as the system is running */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-3v3 {</div><div class='add'>+		/* Chipown AP2420 step-down converter */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_3v3: regulator-wifi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3.3V-WIFI";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio GPIOX_11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vcck&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethmac {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;eth_phy0&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		eth_phy0: ethernet-phy@0 {</div><div class='add'>+			/* IC Plus IP101A (0x02430c54) */</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;10000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio GPIOH_4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_AO {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c_ao_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	pmic@32 {</div><div class='add'>+		compatible = "ricoh,rn5t618";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vcck: DCDC1 {</div><div class='add'>+				regulator-name = "VCCK";</div><div class='add'>+				regulator-min-microvolt = &lt;825000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddee: DCDC2 {</div><div class='add'>+				/* the output is also used as VDDAO */</div><div class='add'>+				regulator-name = "VDD_EE";</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			DCDC3 {</div><div class='add'>+				regulator-name = "VDD_DDR";</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO1 {</div><div class='add'>+				regulator-name = "VDDIO_AO28";</div><div class='add'>+				regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO2 {</div><div class='add'>+				regulator-name = "VDDIO_AO18";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8_usb: LDO3 {</div><div class='add'>+				regulator-name = "VCC1V8_USB";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO4 {</div><div class='add'>+				/* This one appears to be unused */</div><div class='add'>+				regulator-name = "VCC2V8";</div><div class='add'>+				regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO5 {</div><div class='add'>+				regulator-name = "AVDD1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDORTC1 {</div><div class='add'>+				regulator-name = "VDD_LDO";</div><div class='add'>+				regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2700000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDORTC2 {</div><div class='add'>+				regulator-name = "RTC_0V9";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		/* Fairchild FM24C08A */</div><div class='add'>+		compatible = "atmel,24c08";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		wp-gpios = &lt;&amp;gpio GPIOH_3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-addresses = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_B {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c_b_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* TODO: SiI9293 HDMI receiver @ 0x39 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mali {</div><div class='add'>+	mali-supply = &lt;&amp;vddee&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdxc_c_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* eMMC */</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+	disable-wp;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sdio;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd_b_pins&gt;;</div><div class='add'>+</div><div class='add'>+	/* SD card */</div><div class='add'>+	slot@1 {</div><div class='add'>+		compatible = "mmc-slot";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		cap-mmc-highspeed;</div><div class='add'>+		cap-sd-highspeed;</div><div class='add'>+		disable-wp;</div><div class='add'>+</div><div class='add'>+		cd-gpios = &lt;&amp;gpio CARD_6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_AO {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart_ao_a_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-supply = &lt;&amp;vcc1v8_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	wifi: wifi@1 {</div><div class='add'>+		/* Realtek RTL8188 2.4GHz WiFi module */</div><div class='add'>+		compatible = "usbbda,179";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;wifi_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-supply = &lt;&amp;vcc1v8_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir_receiver {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ir_recv_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts b/arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts<br/>index c6d1c5a8a3bf..62987eadc747 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8-minix-neo-x8.dts</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -93,5 +93,6 @@</div><div class='ctx'> &amp;ethmac {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;eth_pins&gt;;</div><div class='del'>-	pnictrl-names = "default";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-mode = "rmii";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlogic/meson8.dtsi<br/>index f57be9ae150f..a609b5a0fda4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8.dtsi</a></div><div class='hunk'>@@ -196,7 +196,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='del'>-		soc {</div><div class='add'>+		soc-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;250&gt;; /* milliseconds */</div><div class='ctx'> 			polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='ctx'> 			thermal-sensors = &lt;&amp;thermal_sensor&gt;;</div><div class='hunk'>@@ -346,17 +346,16 @@</div><div class='ctx'> 		reg = &lt;0xe0 0x18&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_aobus: pinctrl@84 {</div><div class='add'>+	pinctrl_aobus: pinctrl@14 {</div><div class='ctx'> 		compatible = "amlogic,meson8-aobus-pinctrl";</div><div class='del'>-		reg = &lt;0x84 0xc&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x14 0x1c&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio_ao: ao-bank@14 {</div><div class='del'>-			reg = &lt;0x14 0x4&gt;,</div><div class='del'>-			      &lt;0x2c 0x4&gt;,</div><div class='del'>-			      &lt;0x24 0x8&gt;;</div><div class='add'>+		gpio_ao: bank@0 {</div><div class='add'>+			reg = &lt;0x0 0x4&gt;,</div><div class='add'>+			      &lt;0x18 0x4&gt;,</div><div class='add'>+			      &lt;0x10 0x8&gt;;</div><div class='ctx'> 			reg-names = "mux", "pull", "gpio";</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -399,7 +398,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_a", "uart_rx_ao_a";</div><div class='ctx'> 				function = "uart_ao";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -450,7 +449,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pwm_ef: pwm@86c0 {</div><div class='del'>-		compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";</div><div class='add'>+		compatible = "amlogic,meson8-pwm-v2";</div><div class='add'>+		clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+			 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+			 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 		reg = &lt;0x86c0 0x10&gt;;</div><div class='ctx'> 		#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -461,24 +464,31 @@</div><div class='ctx'> 		reg = &lt;0x8758 0x1c&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_cbus: pinctrl@9880 {</div><div class='add'>+	pinctrl_cbus: pinctrl@8030 {</div><div class='ctx'> 		compatible = "amlogic,meson8-cbus-pinctrl";</div><div class='del'>-		reg = &lt;0x9880 0x10&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x8030 0x108&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio: banks@80b0 {</div><div class='del'>-			reg = &lt;0x80b0 0x28&gt;,</div><div class='del'>-			      &lt;0x80e8 0x18&gt;,</div><div class='del'>-			      &lt;0x8120 0x18&gt;,</div><div class='del'>-			      &lt;0x8030 0x30&gt;;</div><div class='add'>+		gpio: bank@80 {</div><div class='add'>+			reg = &lt;0x80 0x28&gt;,</div><div class='add'>+			      &lt;0xb8 0x18&gt;,</div><div class='add'>+			      &lt;0xf0 0x18&gt;,</div><div class='add'>+			      &lt;0x00 0x30&gt;;</div><div class='ctx'> 			reg-names = "mux", "pull", "pull-enable", "gpio";</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio-ranges = &lt;&amp;pinctrl_cbus 0 0 120&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		i2c_b_pins: i2c-b {</div><div class='add'>+			mux {</div><div class='add'>+				groups = "i2c_sda_b", "i2c_sck_b";</div><div class='add'>+				function = "i2c_b";</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sd_a_pins: sd-a {</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",</div><div class='hunk'>@@ -524,6 +534,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdxc_c_pins: sdxc-c {</div><div class='add'>+			mux {</div><div class='add'>+				groups = "sdxc_d0_c", "sdxc_d13_c",</div><div class='add'>+					"sdxc_clk_c", "sdxc_cmd_c",</div><div class='add'>+					"sdxc_d47_c";</div><div class='add'>+				function = "sdxc_c";</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		spdif_out_pins: spdif-out {</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "spdif_out";</div><div class='hunk'>@@ -565,7 +585,7 @@</div><div class='ctx'> 				groups = "uart_tx_a1",</div><div class='ctx'> 				       "uart_rx_a1";</div><div class='ctx'> 				function = "uart_a";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +609,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ahb_sram {</div><div class='del'>-	ao_arc_sram: ao-arc-sram@0 {</div><div class='add'>+	ao_arc_sram: aoarc-sram@0 {</div><div class='ctx'> 		compatible = "amlogic,meson8-ao-arc-sram";</div><div class='ctx'> 		reg = &lt;0x0 0x8000&gt;;</div><div class='ctx'> 		pool;</div><div class='hunk'>@@ -701,11 +721,19 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='del'>-	compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";</div><div class='add'>+	compatible = "amlogic,meson8-pwm-v2";</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_cd {</div><div class='del'>-	compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";</div><div class='add'>+	compatible = "amlogic,meson8-pwm-v2";</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8b-ec100.dts b/arch/arm/boot/dts/amlogic/meson8b-ec100.dts<br/>index 49890eb12781..236999548094 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-ec100.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-ec100.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-ec100.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8b-ec100.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x40000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -98,6 +98,10 @@</div><div class='ctx'> 		compatible = "amlogic,gx-sound-card";</div><div class='ctx'> 		model = "M8B-EC100";</div><div class='ctx'> </div><div class='add'>+		clocks = &lt;&amp;clkc CLKID_MPLL0&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_MPLL1&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_MPLL2&gt;;</div><div class='add'>+</div><div class='ctx'> 		assigned-clocks = &lt;&amp;clkc CLKID_MPLL0&gt;,</div><div class='ctx'> 				  &lt;&amp;clkc CLKID_MPLL1&gt;,</div><div class='ctx'> 				  &lt;&amp;clkc CLKID_MPLL2&gt;;</div><div class='hunk'>@@ -427,7 +431,7 @@</div><div class='ctx'> 			  "NAND_CS1 (EMMC)", "NAND_CS2 iNAND_RS1 (EMMC)",</div><div class='ctx'> 			  "NAND_nR/B iNAND_CMD (EMMC)", "NAND_ALE (EMMC)",</div><div class='ctx'> 			  "NAND_CLE (EMMC)", "nRE_S1 NAND_nRE (EMMC)",</div><div class='del'>-			  "nWE_S1 NAND_nWE (EMMC)",  "", "", "SPI_CS",</div><div class='add'>+			  "nWE_S1 NAND_nWE (EMMC)",  "", "", "", "SPI_CS",</div><div class='ctx'> 			  /* Bank DIF */</div><div class='ctx'> 			  "RMII_RXD1", "RMII_RXD0", "RMII_CRS_DV",</div><div class='ctx'> 			  "RMII_50M_IN", "GPIODIF_4", "GPIODIF_5",</div><div class='hunk'>@@ -439,8 +443,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_c1_pins&gt;, &lt;&amp;pwm_d_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0", "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8b-mxq.dts b/arch/arm/boot/dts/amlogic/meson8b-mxq.dts<br/>index 7adedd3258c3..0bca0b33eea2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-mxq.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-mxq.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-mxq.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8b-mxq.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x40000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -162,8 +162,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_c1_pins&gt;, &lt;&amp;pwm_d_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0", "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart_AO {</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts b/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts<br/>index 941682844faf..1cd2093202ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x40000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -347,8 +347,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_c1_pins&gt;, &lt;&amp;pwm_d_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0", "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='hunk'>@@ -378,6 +376,6 @@</div><div class='ctx'> 		compatible = "usb5e3,610";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;p5v0&gt;;</div><div class='del'>-		reset-gpio = &lt;&amp;gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/amlogic/meson8b.dtsi<br/>index 2d9d24d3a95d..2d77b9876bf4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a></div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='del'>-		soc {</div><div class='add'>+		soc-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;250&gt;; /* milliseconds */</div><div class='ctx'> 			polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='ctx'> 			thermal-sensors = &lt;&amp;thermal_sensor&gt;;</div><div class='hunk'>@@ -308,17 +308,16 @@</div><div class='ctx'> 		reg = &lt;0xe0 0x18&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_aobus: pinctrl@84 {</div><div class='add'>+	pinctrl_aobus: pinctrl@14 {</div><div class='ctx'> 		compatible = "amlogic,meson8b-aobus-pinctrl";</div><div class='del'>-		reg = &lt;0x84 0xc&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x14 0x1c&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio_ao: ao-bank@14 {</div><div class='del'>-			reg = &lt;0x14 0x4&gt;,</div><div class='del'>-				&lt;0x2c 0x4&gt;,</div><div class='del'>-				&lt;0x24 0x8&gt;;</div><div class='add'>+		gpio_ao: bank@0 {</div><div class='add'>+			reg = &lt;0x0 0x4&gt;,</div><div class='add'>+			      &lt;0x18 0x4&gt;,</div><div class='add'>+			      &lt;0x10 0x8&gt;;</div><div class='ctx'> 			reg-names = "mux", "pull", "gpio";</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -369,7 +368,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_a", "uart_rx_ao_a";</div><div class='ctx'> 				function = "uart_ao";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -404,8 +403,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pwm_ef: pwm@86c0 {</div><div class='del'>-		compatible = "amlogic,meson8b-pwm";</div><div class='add'>+		compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 		reg = &lt;0x86c0 0x10&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+			 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+			 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 		#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -415,18 +418,17 @@</div><div class='ctx'> 		reg = &lt;0x8758 0x1c&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_cbus: pinctrl@9880 {</div><div class='add'>+	pinctrl_cbus: pinctrl@8030 {</div><div class='ctx'> 		compatible = "amlogic,meson8b-cbus-pinctrl";</div><div class='del'>-		reg = &lt;0x9880 0x10&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='add'>+		ranges = &lt;0x0 0x8030 0x108&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio: banks@80b0 {</div><div class='del'>-			reg = &lt;0x80b0 0x28&gt;,</div><div class='del'>-				&lt;0x80e8 0x18&gt;,</div><div class='del'>-				&lt;0x8120 0x18&gt;,</div><div class='del'>-				&lt;0x8030 0x38&gt;;</div><div class='add'>+		gpio: bank@80 {</div><div class='add'>+			reg = &lt;0x80 0x28&gt;,</div><div class='add'>+			      &lt;0xb8 0x18&gt;,</div><div class='add'>+			      &lt;0xf0 0x18&gt;,</div><div class='add'>+			      &lt;0x00 0x38&gt;;</div><div class='ctx'> 			reg-names = "mux", "pull", "pull-enable", "gpio";</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -519,7 +521,7 @@</div><div class='ctx'> 				groups = "uart_tx_b0",</div><div class='ctx'> 				       "uart_rx_b0";</div><div class='ctx'> 				function = "uart_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -535,7 +537,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ahb_sram {</div><div class='del'>-	ao_arc_sram: ao-arc-sram@0 {</div><div class='add'>+	ao_arc_sram: aoarc-sram@0 {</div><div class='ctx'> 		compatible = "amlogic,meson8b-ao-arc-sram";</div><div class='ctx'> 		reg = &lt;0x0 0x8000&gt;;</div><div class='ctx'> 		pool;</div><div class='hunk'>@@ -676,11 +678,19 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='del'>-	compatible = "amlogic,meson8b-pwm";</div><div class='add'>+	compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_cd {</div><div class='del'>-	compatible = "amlogic,meson8b-pwm";</div><div class='add'>+	compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts<br/>index aa4d4bf70629..08aa661e17ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/amlogic/meson8m2-mxiii-plus.dts</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='add'>+	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile<br/>index c4f064e4b073..0f0b5b707654 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/Makefile</a></div><div class='hunk'>@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \</div><div class='ctx'> 	aspeed-bmc-amd-daytonax.dtb \</div><div class='ctx'> 	aspeed-bmc-amd-ethanolx.dtb \</div><div class='ctx'> 	aspeed-bmc-ampere-mtjade.dtb \</div><div class='add'>+	aspeed-bmc-ampere-mtjefferson.dtb \</div><div class='ctx'> 	aspeed-bmc-ampere-mtmitchell.dtb \</div><div class='ctx'> 	aspeed-bmc-arm-stardragon4800-rep2.dtb \</div><div class='ctx'> 	aspeed-bmc-asrock-e3c246d4i.dtb \</div><div class='hunk'>@@ -18,17 +19,22 @@ dtb-$(CONFIG_ARCH_ASPEED) += \</div><div class='ctx'> 	aspeed-bmc-delta-ahe50dc.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-bletchley.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-catalina.dtb \</div><div class='add'>+	aspeed-bmc-facebook-clemente.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-cmm.dtb \</div><div class='add'>+	aspeed-bmc-facebook-darwin.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-elbert.dtb \</div><div class='add'>+	aspeed-bmc-facebook-fuji-data64.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-fuji.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-galaxy100.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-greatlakes.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-harma.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-minerva.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-minipack.dtb \</div><div class='add'>+	aspeed-bmc-facebook-santabarbara.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-tiogapass.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-wedge40.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-wedge100.dtb \</div><div class='add'>+	aspeed-bmc-facebook-wedge400-data64.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-wedge400.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-yamp.dtb \</div><div class='ctx'> 	aspeed-bmc-facebook-yosemitev2.dtb \</div><div class='hunk'>@@ -40,6 +46,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \</div><div class='ctx'> 	aspeed-bmc-ibm-rainier.dtb \</div><div class='ctx'> 	aspeed-bmc-ibm-rainier-1s4u.dtb \</div><div class='ctx'> 	aspeed-bmc-ibm-rainier-4u.dtb \</div><div class='add'>+	aspeed-bmc-ibm-sbp1.dtb \</div><div class='ctx'> 	aspeed-bmc-ibm-system1.dtb \</div><div class='ctx'> 	aspeed-bmc-intel-s2600wf.dtb \</div><div class='ctx'> 	aspeed-bmc-inspur-fp5280g2.dtb \</div><div class='hunk'>@@ -48,12 +55,12 @@ dtb-$(CONFIG_ARCH_ASPEED) += \</div><div class='ctx'> 	aspeed-bmc-lenovo-hr630.dtb \</div><div class='ctx'> 	aspeed-bmc-lenovo-hr855xg2.dtb \</div><div class='ctx'> 	aspeed-bmc-microsoft-olympus.dtb \</div><div class='add'>+	aspeed-bmc-nvidia-gb200nvl-bmc.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-lanyang.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-mowgli.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-nicole.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-palmetto.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-romulus.dtb \</div><div class='del'>-	aspeed-bmc-opp-swift.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-tacoma.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-vesnin.dtb \</div><div class='ctx'> 	aspeed-bmc-opp-witherspoon.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts<br/>index 31c5d319aa0a..263702599767 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjade.dts</a></div><div class='hunk'>@@ -825,7 +825,7 @@</div><div class='ctx'> 		line-name = "ocp-aux-pwren";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bmc-ready {</div><div class='add'>+	bmc-ready-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AC, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts<br/>new file mode 100644<br/>index 000000000000..53b4372f1a08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtjefferson.dts</a></div><div class='hunk'>@@ -0,0 +1,622 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright 2024 Ampere Computing LLC.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "aspeed-g6.dtsi"</div><div class='add'>+#include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Ampere Mt. Jefferson BMC";</div><div class='add'>+	compatible = "ampere,mtjefferson-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c20 = &amp;i2c4_bus70_chn0;</div><div class='add'>+		i2c22 = &amp;i2c4_bus70_chn2;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 *  I2C OCP alias port</div><div class='add'>+		 */</div><div class='add'>+		i2c30 = &amp;ocpslot;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 *  I2C NVMe alias port</div><div class='add'>+		 */</div><div class='add'>+		i2c48 = &amp;nvmeslot_0;</div><div class='add'>+		i2c49 = &amp;nvmeslot_1;</div><div class='add'>+		i2c50 = &amp;nvmeslot_2;</div><div class='add'>+		i2c51 = &amp;nvmeslot_3;</div><div class='add'>+		i2c52 = &amp;nvmeslot_4;</div><div class='add'>+		i2c53 = &amp;nvmeslot_5;</div><div class='add'>+		i2c54 = &amp;nvmeslot_6;</div><div class='add'>+		i2c55 = &amp;nvmeslot_7;</div><div class='add'>+		i2c56 = &amp;nvmeslot_8;</div><div class='add'>+		i2c57 = &amp;nvmeslot_9;</div><div class='add'>+		i2c58 = &amp;nvmeslot_10;</div><div class='add'>+		i2c59 = &amp;nvmeslot_11;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gfx_memory: framebuffer {</div><div class='add'>+			size = &lt;0x01000000&gt;;</div><div class='add'>+			alignment = &lt;0x01000000&gt;;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_engine_memory: video {</div><div class='add'>+			size = &lt;0x04000000&gt;;</div><div class='add'>+			alignment = &lt;0x01000000&gt;;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vga_memory: region@bf000000 {</div><div class='add'>+			no-map;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0xbf000000 0x01000000&gt;;  /* 16M */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	voltage_mon_reg: voltage-mon-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ltc2497_reg";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led-bmc-ready {</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(W, 5) (GPIO_ACTIVE_HIGH | GPIO_TRANSITORY)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-sw-heartbeat {</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(N, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-identify {</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-fault {</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels =   &lt;&amp;adc0 0&gt;, &lt;&amp;adc0 1&gt;, &lt;&amp;adc0 2&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 0&gt;, &lt;&amp;adc_i2c_2 1&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 2&gt;, &lt;&amp;adc_i2c_2 3&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 4&gt;, &lt;&amp;adc_i2c_2 5&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 6&gt;, &lt;&amp;adc_i2c_2 7&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 8&gt;, &lt;&amp;adc_i2c_2 9&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 10&gt;, &lt;&amp;adc_i2c_2 11&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 12&gt;, &lt;&amp;adc_i2c_2 13&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_2 14&gt;, &lt;&amp;adc_i2c_2 15&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 0&gt;, &lt;&amp;adc_i2c_0 1&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 2&gt;, &lt;&amp;adc_i2c_0 3&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 4&gt;, &lt;&amp;adc_i2c_0 5&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 6&gt;, &lt;&amp;adc_i2c_0 7&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 8&gt;, &lt;&amp;adc_i2c_0 9&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 10&gt;, &lt;&amp;adc_i2c_0 11&gt;,</div><div class='add'>+				&lt;&amp;adc_i2c_0 12&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy0: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rmii4_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+#include "openbmc-flash-layout-64.dtsi"</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flash@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "alt-bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+#include "openbmc-flash-layout-64-alt.dtsi"</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi1_default&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "pnor";</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-frequency = &lt;1000000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp-controller;</div><div class='add'>+</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c4_bus70_chn0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@52 {</div><div class='add'>+				compatible = "atmel,24c256";</div><div class='add'>+				reg = &lt;0x52&gt;;</div><div class='add'>+				pagesize = &lt;32&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@48 {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@49 {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@4a {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4a&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@4b {</div><div class='add'>+				compatible = "ti,tmp464";</div><div class='add'>+				reg = &lt;0x4b&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				channel@0 {</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				channel@1 {</div><div class='add'>+					reg = &lt;0x1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				channel@2 {</div><div class='add'>+					reg = &lt;0x2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				channel@3 {</div><div class='add'>+					reg = &lt;0x3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				channel@4 {</div><div class='add'>+					reg = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@4d {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4d&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@4e {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4e&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@4f {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4f&gt;;</div><div class='add'>+			};</div><div class='add'>+			temperature-sensor@28 {</div><div class='add'>+				compatible = "nuvoton,nct7802";</div><div class='add'>+				reg = &lt;0x28&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				channel@1 { /* RTD1 */</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					sensor-type = "temperature";</div><div class='add'>+					temperature-mode = "thermistor";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			adc_i2c_0: adc@14 {</div><div class='add'>+				compatible = "lltc,ltc2497";</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				vref-supply = &lt;&amp;voltage_mon_reg&gt;;</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4_bus70_chn2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+			adc_i2c_2: adc@14 {</div><div class='add'>+				compatible = "lltc,ltc2497";</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				vref-supply = &lt;&amp;voltage_mon_reg&gt;;</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@71 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x71&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				nvmeslot_8: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_9: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_10: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_11: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c-mux@72 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x72&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				nvmeslot_4: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_5: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_6: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_7: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c-mux@74 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				ocpslot: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+					ocpslot_temp: temperature-sensor@1f {</div><div class='add'>+						compatible = "ti,tmp421";</div><div class='add'>+						reg = &lt;0x1f&gt;;</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						channel@0 {</div><div class='add'>+							reg = &lt;0x0&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+						channel@1 {</div><div class='add'>+							reg = &lt;0x1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				nvmeslot_0: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_1: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_2: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+				nvmeslot_3: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp75";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	fan-controller@5c {</div><div class='add'>+		compatible = "onnn,adt7462";</div><div class='add'>+		reg = &lt;0x5c&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@18 {</div><div class='add'>+		compatible = "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@1a {</div><div class='add'>+		compatible = "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ssif-bmc@10 {</div><div class='add'>+		compatible = "ssif-bmc";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bmc_ast2600_cpu: temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp75";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	gpio_expander1: gpio-expander@22 {</div><div class='add'>+		compatible = "nxp,pca9535";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"presence-ocp1","presence-ocp2",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='add'>+			"","";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0_default &amp;pinctrl_adc1_default</div><div class='add'>+		&amp;pinctrl_adc2_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vhub {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;video {</div><div class='add'>+	status = "okay";</div><div class='add'>+	memory-region = &lt;&amp;video_engine_memory&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*A0-A7*/	"","","","","cpu-type-detect","i2c2-reset-n","i2c6-reset-n","i2c5-reset-n",</div><div class='add'>+	/*B0-B7*/	"","","","","host0-sysreset-n","host0-pmin-n","fru-rd-complete",</div><div class='add'>+			"chassis-id-sel",</div><div class='add'>+	/*C0-C7*/	"s0-vrd-fault-n","","bmc-debug-mode","","cpld-3v3-irq-n","","vrd-sel",</div><div class='add'>+			"spd-sel",</div><div class='add'>+	/*D0-D7*/	"presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",</div><div class='add'>+			"","","","",</div><div class='add'>+	/*E0-E7*/	"eth-phy-rst-n","eth-phy-int-n","","","","","","",</div><div class='add'>+	/*F0-F7*/	"s0-pcp-oc-warn-n","","power-chassis-control",</div><div class='add'>+			"cpu-bios-recover","s0-heartbeat","hs-scout-proc-hot","s0-vr-hot-n","",</div><div class='add'>+	/*G0-G7*/	"","","hsc-12vmain-alt1-n","","","bp-cpld-program-en","led-fp-sta-gr",</div><div class='add'>+			"led-fp-sta-amb",</div><div class='add'>+	/*H0-H7*/	"jtag-program-sel","jtag-cmpl2","wd-disable-n","power-chassis-good","","",</div><div class='add'>+			"","",</div><div class='add'>+	/*I0-I7*/	"","","","","","","power-button","rtc-battery-voltage-read-enable",</div><div class='add'>+	/*J0-J7*/	"","","","","","","","",</div><div class='add'>+	/*K0-K7*/	"","","","","","","","",</div><div class='add'>+	/*L0-L7*/	"","","","","reset-button","","","",</div><div class='add'>+	/*M0-M7*/	"nmi-n","s0-ddr-save","soc-spi-nor-access","presence-cpu0","s0-rtc-lock",</div><div class='add'>+			"","","",</div><div class='add'>+	/*N0-N7*/	"hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",</div><div class='add'>+			"jtag-dbgr-prsnt-n","","","",</div><div class='add'>+	/*O0-O7*/	"","","","","","","","",</div><div class='add'>+	/*P0-P7*/	"ps0-ac-loss-n","ps1-ac-loss-n","","","led-fault","user-mode","jtag-srst-n",</div><div class='add'>+			"led-bmc-hb",</div><div class='add'>+	/*Q0-Q7*/	"","","","","","","","",</div><div class='add'>+	/*R0-R7*/	"","","","","","","","",</div><div class='add'>+	/*S0-S7*/	"","","identify-button","led-identify","","spi-nor-access","host0-ready","",</div><div class='add'>+	/*T0-T7*/	"","","","","","","","",</div><div class='add'>+	/*U0-U7*/	"","","","","","","","",</div><div class='add'>+	/*V0-V7*/	"s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",</div><div class='add'>+			"host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n",</div><div class='add'>+			"host0-shd-ack-n","s0-overtemp-n",</div><div class='add'>+	/*W0-W7*/	"ocp-aux-pwren","ocp-main-pwren","ocp-pgood","",</div><div class='add'>+			"bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",</div><div class='add'>+	/*X0-X7*/	"","","","","","","","",</div><div class='add'>+	/*Y0-Y7*/	"","","","vrd-prg-en-n","","","","host0-special-boot",</div><div class='add'>+	/*Z0-Z7*/	"","ps0-pgood","ps1-pgood","","","","","";</div><div class='add'>+</div><div class='add'>+	ocp-aux-pwren-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "ocp-aux-pwren";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*18A0-18A7*/	"","","","","","","","",</div><div class='add'>+	/*18B0-18B7*/	"","","","","s0-soc-pgood","vga-ft-press-n","emmc-rst-n","s01-uart1-sel",</div><div class='add'>+	/*18C0-18C7*/	"uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",</div><div class='add'>+			"","","","",</div><div class='add'>+	/*18D0-18D7*/	"","","","","","","","",</div><div class='add'>+	/*18E0-18E3*/	"","","","";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts<br/>index 0295f5adcfbc..2b336aa0146d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts</a></div><div class='hunk'>@@ -677,6 +677,12 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"ext-vref-sel","","presence-hdd-bp5-n","presence-hdd-bp6-n",</div><div class='add'>+		"","bmc-riser-en-n","bmc-ocp1-en-n","bmc-ocp0-en-n",</div><div class='add'>+		"","","","",</div><div class='add'>+		"","","","";</div><div class='add'>+</div><div class='ctx'> 		bmc-ocp0-en-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;7 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -684,6 +690,16 @@</div><div class='ctx'> 			line-name = "bmc-ocp0-en-n";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	fan-controller0@20 {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan-controller1@2f {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x2f&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c9 {</div><div class='hunk'>@@ -958,7 +974,7 @@</div><div class='ctx'> 			"fan-fault","psu-fault",</div><div class='ctx'> 			"","",</div><div class='ctx'> 			"","",</div><div class='del'>-			"","",</div><div class='add'>+			"gpi0","gpi1",</div><div class='ctx'> 			"","",</div><div class='ctx'> 			"","",</div><div class='ctx'> 			"","",</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts<br/>index 29c68c37e7f5..b550a48f48f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-arm-stardragon4800-rep2.dts</a></div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			dps650ab@58 {</div><div class='del'>-				compatible = "dps650ab";</div><div class='add'>+				compatible = "delta,dps650ab";</div><div class='ctx'> 				reg = &lt;0x58&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -201,13 +201,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='del'>-	pin_gpio_c7 {</div><div class='add'>+	pin-gpio-c7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "BIOS_SPI_MUX_S";</div><div class='ctx'> 	};</div><div class='del'>-	pin_gpio_d1 {</div><div class='add'>+	pin-gpio-d1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts<br/>index bb2e6ef609af..3ebd80db06f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c246d4i.dts</a></div><div class='hunk'>@@ -106,11 +106,15 @@</div><div class='ctx'> 		compatible = "st,24c128", "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		eth0_macaddress: macaddress@3f80 {</div><div class='del'>-			reg = &lt;0x3f80 6&gt;;</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth0_macaddress: macaddress@3f80 {</div><div class='add'>+				reg = &lt;0x3f80 6&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -182,7 +186,7 @@</div><div class='ctx'> 			"CK_33M_BMC", "LFRAME", "SERIRQ", "S_PLTRST";</div><div class='ctx'> </div><div class='ctx'> 	/* Assert BMC_READY so BIOS doesn't sit around waiting for it */</div><div class='del'>-	bmc-ready {</div><div class='add'>+	bmc-ready-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts<br/>index 9d00ce9475f2..8c57a071f488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts</a></div><div class='hunk'>@@ -191,11 +191,15 @@</div><div class='ctx'> 		compatible = "st,24c128", "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		eth0_macaddress: macaddress@3f80 {</div><div class='del'>-			reg = &lt;0x3f80 6&gt;;</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth0_macaddress: macaddress@3f80 {</div><div class='add'>+				reg = &lt;0x3f80 6&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts<br/>index 6dd221644dc6..e306655ce4a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-romed8hm3.dts</a></div><div class='hunk'>@@ -134,11 +134,15 @@</div><div class='ctx'> 		compatible = "st,24c128", "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		eth0_macaddress: macaddress@3f80 {</div><div class='del'>-			reg = &lt;0x3f80 6&gt;;</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth0_macaddress: macaddress@3f80 {</div><div class='add'>+				reg = &lt;0x3f80 6&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts<br/>index 0943e0bf1305..e61a6cb43438 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts</a></div><div class='hunk'>@@ -232,15 +232,19 @@</div><div class='ctx'> 		compatible = "st,24c128", "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		eth0_macaddress: macaddress@3f80 {</div><div class='del'>-			reg = &lt;0x3f80 6&gt;;</div><div class='del'>-		};</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth0_macaddress: macaddress@3f80 {</div><div class='add'>+				reg = &lt;0x3f80 6&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-		eth1_macaddress: macaddress@3f88 {</div><div class='del'>-			reg = &lt;0x3f88 6&gt;;</div><div class='add'>+			eth1_macaddress: macaddress@3f88 {</div><div class='add'>+				reg = &lt;0x3f88 6&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts<br/>index 3f03a198a1a8..54a5509b04f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts</a></div><div class='hunk'>@@ -915,14 +915,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='del'>-	pin_gpio_i3 {</div><div class='add'>+	pin-gpio-i3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "NCSI_BMC_R_SEL";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b6 {</div><div class='add'>+	pin-gpio-b6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts<br/>index b6bfdaea08e6..cce8d0416dc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-delta-ahe50dc.dts</a></div><div class='hunk'>@@ -395,7 +395,7 @@</div><div class='ctx'> 	 * back to one causes a power output glitch, so install a hog to keep</div><div class='ctx'> 	 * it at one as a failsafe to ensure nothing accidentally touches it.</div><div class='ctx'> 	 */</div><div class='del'>-	doom-guardrail {</div><div class='add'>+	doom-guardrail-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts<br/>index 5be0e8fd2633..24969c82d05e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts</a></div><div class='hunk'>@@ -52,10 +52,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	switchphy: ethernet-phy@0 {</div><div class='del'>-		// Fixed link</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	front_gpio_leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		sys_log_id {</div><div class='hunk'>@@ -285,7 +281,6 @@</div><div class='ctx'> &amp;mac2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='del'>-	phy-handle = &lt;&amp;switchphy&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_rgmii3_default&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -398,10 +393,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -484,10 +482,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -570,10 +571,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -656,10 +660,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -742,10 +749,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -828,10 +838,13 @@</div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='del'>-			data-role = "host";</div><div class='del'>-			pd-disable;</div><div class='del'>-			typec-power-opmode = "default";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x20&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts<br/>index 82835e96317d..14dd0ab64130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts</a></div><div class='hunk'>@@ -50,14 +50,14 @@</div><div class='ctx'> 		i2c45 = &amp;i2c0mux5ch1;</div><div class='ctx'> 		i2c46 = &amp;i2c0mux5ch2;</div><div class='ctx'> 		i2c47 = &amp;i2c0mux5ch3;</div><div class='del'>-		i2c48 = &amp;i2c30mux0ch0;</div><div class='del'>-		i2c49 = &amp;i2c30mux0ch1;</div><div class='del'>-		i2c50 = &amp;i2c30mux0ch2;</div><div class='del'>-		i2c51 = &amp;i2c30mux0ch3;</div><div class='del'>-		i2c52 = &amp;i2c30mux0ch4;</div><div class='del'>-		i2c53 = &amp;i2c30mux0ch5;</div><div class='del'>-		i2c54 = &amp;i2c30mux0ch6;</div><div class='del'>-		i2c55 = &amp;i2c30mux0ch7;</div><div class='add'>+		i2c48 = &amp;i2c5mux0ch0;</div><div class='add'>+		i2c49 = &amp;i2c5mux0ch1;</div><div class='add'>+		i2c50 = &amp;i2c5mux0ch2;</div><div class='add'>+		i2c51 = &amp;i2c5mux0ch3;</div><div class='add'>+		i2c52 = &amp;i2c5mux0ch4;</div><div class='add'>+		i2c53 = &amp;i2c5mux0ch5;</div><div class='add'>+		i2c54 = &amp;i2c5mux0ch6;</div><div class='add'>+		i2c55 = &amp;i2c5mux0ch7;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -153,6 +153,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mac2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ncsi3_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mac3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -179,6 +186,11 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9546";</div><div class='hunk'>@@ -190,6 +202,13 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+</div><div class='add'>+			// IOB0 NIC0 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c0mux0ch1: i2c@1 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -200,6 +219,13 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+</div><div class='add'>+			// IOB0 NIC1 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c0mux0ch3: i2c@3 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -213,6 +239,7 @@</div><div class='ctx'> 		reg = &lt;0x72&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='ctx'> 		i2c0mux1ch0: i2c@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -242,79 +269,6 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			i2c-mux@70 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				reg = &lt;0x70&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				i2c30mux0ch0: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch1: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch2: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch3: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch4: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch5: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch6: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-					// HDD FRU EEPROM</div><div class='del'>-					eeprom@52 {</div><div class='del'>-						compatible = "atmel,24c64";</div><div class='del'>-						reg = &lt;0x52&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-				i2c30mux0ch7: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-</div><div class='del'>-					power-sensor@40 {</div><div class='del'>-						compatible = "ti,ina230";</div><div class='del'>-						reg = &lt;0x40&gt;;</div><div class='del'>-						shunt-resistor = &lt;2000&gt;;</div><div class='del'>-					};</div><div class='del'>-					power-sensor@41 {</div><div class='del'>-						compatible = "ti,ina230";</div><div class='del'>-						reg = &lt;0x41&gt;;</div><div class='del'>-						shunt-resistor = &lt;2000&gt;;</div><div class='del'>-					};</div><div class='del'>-					power-sensor@44 {</div><div class='del'>-						compatible = "ti,ina230";</div><div class='del'>-						reg = &lt;0x44&gt;;</div><div class='del'>-						shunt-resistor = &lt;2000&gt;;</div><div class='del'>-					};</div><div class='del'>-					power-sensor@45 {</div><div class='del'>-						compatible = "ti,ina230";</div><div class='del'>-						reg = &lt;0x45&gt;;</div><div class='del'>-						shunt-resistor = &lt;2000&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c0mux1ch3: i2c@3 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -328,6 +282,7 @@</div><div class='ctx'> 		reg = &lt;0x73&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='ctx'> 		i2c0mux2ch0: i2c@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -361,6 +316,13 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+</div><div class='add'>+			// IOB1 NIC0 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c0mux3ch1: i2c@1 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -371,6 +333,13 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+</div><div class='add'>+			// IOB1 NIC1 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c0mux3ch3: i2c@3 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -384,6 +353,7 @@</div><div class='ctx'> 		reg = &lt;0x76&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='ctx'> 		i2c0mux4ch0: i2c@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -426,6 +396,7 @@</div><div class='ctx'> 		reg = &lt;0x77&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='ctx'> 		i2c0mux5ch0: i2c@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -464,40 +435,105 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> </div><div class='del'>-			power-sensor@41 {</div><div class='del'>-				compatible = "ti,ina238";</div><div class='del'>-				reg = &lt;0x41&gt;;</div><div class='del'>-				shunt-resistor = &lt;500&gt;;</div><div class='del'>-			};</div><div class='del'>-			power-sensor@42 {</div><div class='del'>-				compatible = "ti,ina238";</div><div class='del'>-				reg = &lt;0x42&gt;;</div><div class='del'>-				shunt-resistor = &lt;500&gt;;</div><div class='del'>-			};</div><div class='del'>-			power-sensor@44 {</div><div class='del'>-				compatible = "ti,ina238";</div><div class='del'>-				reg = &lt;0x44&gt;;</div><div class='del'>-				shunt-resistor = &lt;500&gt;;</div><div class='add'>+			power-sensor@22 {</div><div class='add'>+				compatible = "mps,mp5990";</div><div class='add'>+				reg = &lt;0x22&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c1mux0ch1: i2c@1 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-</div><div class='del'>-			power-sensor@41 {</div><div class='del'>-				compatible = "ti,ina238";</div><div class='del'>-				reg = &lt;0x41&gt;;</div><div class='del'>-			};</div><div class='del'>-			power-sensor@43 {</div><div class='del'>-				compatible = "ti,ina238";</div><div class='del'>-				reg = &lt;0x43&gt;;</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c1mux0ch2: i2c@2 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+			fanctl2: fan-controller@1 {</div><div class='add'>+				compatible = "nuvoton,nct7363";</div><div class='add'>+				reg = &lt;0x01&gt;;</div><div class='add'>+				#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fan-9 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 0 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x09&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-11 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 0 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0b&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-10 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 4 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0a&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-13 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 4 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0d&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-15 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 6 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0f&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-1 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 6 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x01&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-0 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 10 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x00&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-3 {</div><div class='add'>+					pwms = &lt;&amp;fanctl2 10 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x03&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			fanctl3: fan-controller@2 {</div><div class='add'>+				compatible = "nuvoton,nct7363";</div><div class='add'>+				reg = &lt;0x02&gt;;</div><div class='add'>+				#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fan-9 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 0 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x09&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-11 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 0 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0b&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-10 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 4 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0a&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-13 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 4 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0d&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-15 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 6 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x0f&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-1 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 6 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x01&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-0 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 10 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x00&gt;;</div><div class='add'>+				};</div><div class='add'>+				fan-3 {</div><div class='add'>+					pwms = &lt;&amp;fanctl3 10 40000&gt;;</div><div class='add'>+					tach-ch = /bits/ 8 &lt;0x03&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			fanctl0: fan-controller@21 {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+			};</div><div class='add'>+			fanctl1: fan-controller@27 {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='add'>+				reg = &lt;0x27&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c1mux0ch3: i2c@3 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -509,15 +545,23 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x4&gt;;</div><div class='ctx'> </div><div class='add'>+			power-monitor@13 {</div><div class='add'>+				compatible = "infineon,xdp710";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+			};</div><div class='add'>+			power-monitor@1c {</div><div class='add'>+				compatible = "infineon,xdp710";</div><div class='add'>+				reg = &lt;0x1c&gt;;</div><div class='add'>+			};</div><div class='ctx'> 			power-monitor@42 {</div><div class='ctx'> 				compatible = "lltc,ltc4287";</div><div class='ctx'> 				reg = &lt;0x42&gt;;</div><div class='del'>-				shunt-resistor-micro-ohms = &lt;200&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;100&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			power-monitor@43 {</div><div class='ctx'> 				compatible = "lltc,ltc4287";</div><div class='ctx'> 				reg = &lt;0x43&gt;;</div><div class='del'>-				shunt-resistor-micro-ohms = &lt;200&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;100&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 		i2c1mux0ch5: i2c@5 {</div><div class='hunk'>@@ -580,6 +624,12 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			// FIO REMOTE TEMP SENSOR</div><div class='add'>+			temperature-sensor@4f {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4f&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -593,8 +643,6 @@</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// Module 1 IOEXP</div><div class='hunk'>@@ -603,8 +651,6 @@</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// HMC IOEXP</div><div class='hunk'>@@ -613,8 +659,6 @@</div><div class='ctx'> 		reg = &lt;0x27&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;ASPEED_GPIO(B, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// Module 0 EEPROM</div><div class='hunk'>@@ -640,6 +684,60 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c5 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c5mux0ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch4: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch5: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch6: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			// HDD FRU EEPROM</div><div class='add'>+			eeprom@52 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x52&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch7: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='hunk'>@@ -699,6 +797,12 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c10 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp-controller;</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	// OCP NIC0 TEMP</div><div class='ctx'> 	temperature-sensor@1f {</div><div class='hunk'>@@ -724,16 +828,24 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c12 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='ctx'> </div><div class='ctx'> 	// Module 1 FRU EEPROM</div><div class='ctx'> 	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	// Secondary CBC FRU EEPROM</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c13 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='ctx'> </div><div class='ctx'> 	// Module 0 FRU EEPROM</div><div class='ctx'> 	eeprom@50 {</div><div class='hunk'>@@ -741,18 +853,12 @@</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	// Left CBC FRU EEPROM</div><div class='add'>+	// Primary CBC FRU EEPROM</div><div class='ctx'> 	eeprom@54 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x54&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	// Right CBC FRU EEPROM</div><div class='del'>-	eeprom@55 {</div><div class='del'>-		compatible = "atmel,24c02";</div><div class='del'>-		reg = &lt;0x55&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	// HMC FRU EEPROM</div><div class='ctx'> 	eeprom@57 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='hunk'>@@ -826,6 +932,12 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c15 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp-controller;</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	// OCP NIC1 TEMP</div><div class='ctx'> 	temperature-sensor@1f {</div><div class='hunk'>@@ -834,9 +946,9 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// OCP NIC1 FRU EEPROM</div><div class='del'>-	eeprom@50 {</div><div class='add'>+	eeprom@52 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts<br/>new file mode 100644<br/>index 000000000000..ecef44d89977<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts</a></div><div class='hunk'>@@ -0,0 +1,1283 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2021 Facebook Inc.</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "aspeed-g6.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/leds-pca955x.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Facebook Clemente BMC";</div><div class='add'>+	compatible = "facebook,clemente-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		serial3 = &amp;uart4;</div><div class='add'>+		serial4 = &amp;uart5;</div><div class='add'>+		i2c16 = &amp;i2c1mux0ch0;</div><div class='add'>+		i2c17 = &amp;i2c1mux0ch1;</div><div class='add'>+		i2c18 = &amp;i2c1mux0ch2;</div><div class='add'>+		i2c19 = &amp;i2c1mux0ch3;</div><div class='add'>+		i2c20 = &amp;i2c1mux0ch4;</div><div class='add'>+		i2c21 = &amp;i2c1mux0ch5;</div><div class='add'>+		i2c22 = &amp;i2c1mux0ch6;</div><div class='add'>+		i2c23 = &amp;i2c1mux0ch7;</div><div class='add'>+		i2c24 = &amp;i2c0mux0ch0;</div><div class='add'>+		i2c25 = &amp;i2c0mux0ch1;</div><div class='add'>+		i2c26 = &amp;i2c0mux0ch2;</div><div class='add'>+		i2c27 = &amp;i2c0mux0ch3;</div><div class='add'>+		i2c28 = &amp;i2c0mux1ch0;</div><div class='add'>+		i2c29 = &amp;i2c0mux1ch1;</div><div class='add'>+		i2c30 = &amp;i2c0mux1ch2;</div><div class='add'>+		i2c31 = &amp;i2c0mux1ch3;</div><div class='add'>+		i2c32 = &amp;i2c0mux2ch0;</div><div class='add'>+		i2c33 = &amp;i2c0mux2ch1;</div><div class='add'>+		i2c34 = &amp;i2c0mux2ch2;</div><div class='add'>+		i2c35 = &amp;i2c0mux2ch3;</div><div class='add'>+		i2c36 = &amp;i2c0mux3ch0;</div><div class='add'>+		i2c37 = &amp;i2c0mux3ch1;</div><div class='add'>+		i2c38 = &amp;i2c0mux3ch2;</div><div class='add'>+		i2c39 = &amp;i2c0mux3ch3;</div><div class='add'>+		i2c40 = &amp;i2c0mux4ch0;</div><div class='add'>+		i2c41 = &amp;i2c0mux4ch1;</div><div class='add'>+		i2c42 = &amp;i2c0mux4ch2;</div><div class='add'>+		i2c43 = &amp;i2c0mux4ch3;</div><div class='add'>+		i2c44 = &amp;i2c0mux5ch0;</div><div class='add'>+		i2c45 = &amp;i2c0mux5ch1;</div><div class='add'>+		i2c46 = &amp;i2c0mux5ch2;</div><div class='add'>+		i2c47 = &amp;i2c0mux5ch3;</div><div class='add'>+		i2c48 = &amp;i2c0mux0ch1mux0ch0;</div><div class='add'>+		i2c49 = &amp;i2c0mux0ch1mux0ch1;</div><div class='add'>+		i2c50 = &amp;i2c0mux0ch1mux0ch2;</div><div class='add'>+		i2c51 = &amp;i2c0mux0ch1mux0ch3;</div><div class='add'>+		i2c52 = &amp;i2c0mux3ch1mux0ch0;</div><div class='add'>+		i2c53 = &amp;i2c0mux3ch1mux0ch1;</div><div class='add'>+		i2c54 = &amp;i2c0mux3ch1mux0ch2;</div><div class='add'>+		i2c55 = &amp;i2c0mux3ch1mux0ch3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial4:57600n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc0 0&gt;, &lt;&amp;adc0 1&gt;, &lt;&amp;adc0 2&gt;, &lt;&amp;adc0 3&gt;,</div><div class='add'>+			      &lt;&amp;adc0 4&gt;, &lt;&amp;adc0 5&gt;, &lt;&amp;adc0 6&gt;, &lt;&amp;adc0 7&gt;,</div><div class='add'>+			      &lt;&amp;adc1 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "bmc_heartbeat_amber";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			label = "fp_id_amber";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			label = "bmc_ready_noled";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			label = "bmc_ready_cpld_noled";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8_bmc_aux: regulator-p1v8-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p1v8_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p2v5_bmc_aux: regulator-p2v5-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p2v5_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@b3e00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0xbb000000 0x200000&gt;; /* 16 * (4 * 0x8000) */</div><div class='add'>+			record-size = &lt;0x8000&gt;;</div><div class='add'>+			console-size = &lt;0x8000&gt;;</div><div class='add'>+			ftrace-size = &lt;0x8000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x8000&gt;;</div><div class='add'>+			max-reason = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_gpio: spi {</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sck-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		tpm@0 {</div><div class='add'>+			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+			spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	vref-supply = &lt;&amp;p1v8_bmc_aux&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0_default &amp;pinctrl_adc1_default</div><div class='add'>+		&amp;pinctrl_adc2_default &amp;pinctrl_adc3_default</div><div class='add'>+		&amp;pinctrl_adc4_default &amp;pinctrl_adc5_default</div><div class='add'>+		&amp;pinctrl_adc6_default &amp;pinctrl_adc7_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;p2v5_bmc_aux&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc10_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+#include "openbmc-flash-layout-128.dtsi"</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flash@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "alt-bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*A0-A7*/	"","","","","","","","",</div><div class='add'>+	/*B0-B7*/	"BATTERY_DETECT","PRSNT1_HPM_SCM_N",</div><div class='add'>+			"BMC_I2C1_FPGA_ALERT_L","BMC_READY",</div><div class='add'>+			"IOEXP_INT_L","FM_ID_LED",</div><div class='add'>+			"","",</div><div class='add'>+	/*C0-C7*/	"BMC_GPIOC0","","","",</div><div class='add'>+			"PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N",</div><div class='add'>+			"","BMC_I2C_SSIF_ALERT_L",</div><div class='add'>+	/*D0-D7*/	"","","","","BMC_GPIOD4","","","",</div><div class='add'>+	/*E0-E7*/	"BMC_GPIOE0","BMC_GPIOE1","","","","","","",</div><div class='add'>+	/*F0-F7*/	"","","","","","","","",</div><div class='add'>+	/*G0-G7*/	"","","","","","",</div><div class='add'>+			"FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N",</div><div class='add'>+	/*H0-H7*/	"PWR_BRAKE_L","RUN_POWER_EN",</div><div class='add'>+			"SHDN_FORCE_L","SHDN_REQ_L",</div><div class='add'>+			"","","","",</div><div class='add'>+	/*I0-I7*/	"","","","",</div><div class='add'>+			"","FLASH_WP_STATUS",</div><div class='add'>+			"FM_PDB_HEALTH_N","RUN_POWER_PG",</div><div class='add'>+	/*J0-J7*/	"","","","","","","","",</div><div class='add'>+	/*K0-K7*/	"","","","","","","","",</div><div class='add'>+	/*L0-L7*/	"","","","","","","","",</div><div class='add'>+	/*M0-M7*/	"PCIE_EP_RST_EN","BMC_FRU_WP",</div><div class='add'>+			"SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN",</div><div class='add'>+			"STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","",</div><div class='add'>+	/*N0-N7*/	"LED_POSTCODE_0","LED_POSTCODE_1",</div><div class='add'>+			"LED_POSTCODE_2","LED_POSTCODE_3",</div><div class='add'>+			"LED_POSTCODE_4","LED_POSTCODE_5",</div><div class='add'>+			"LED_POSTCODE_6","LED_POSTCODE_7",</div><div class='add'>+	/*O0-O7*/	"HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC",</div><div class='add'>+			"CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N",</div><div class='add'>+			"PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N",</div><div class='add'>+			"","USBDBG_IPMI_EN_L",</div><div class='add'>+	/*P0-P7*/	"PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L",</div><div class='add'>+			"ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N",</div><div class='add'>+			"host0-ready","BMC_READY_CPLD","BMC_GPIOP6","BMC_HEARTBEAT_N",</div><div class='add'>+	/*Q0-Q7*/	"IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N",</div><div class='add'>+			"UART_MUX_SEL","I2C_MUX_RESET_L",</div><div class='add'>+			"RSVD_NV_PLT_DETECT","SPI_TPM_INT_L",</div><div class='add'>+			"CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L",</div><div class='add'>+	/*R0-R7*/	"THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L",</div><div class='add'>+			"CPU_BOOT_DONE","PMBUS_GNT_L",</div><div class='add'>+			"CHASSIS_PWR_BRK_L","PCIE_WAKE_L",</div><div class='add'>+			"PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L",</div><div class='add'>+	/*S0-S7*/	"","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N",</div><div class='add'>+			"FM_BMC_DEBUG_SW_N","UID_LED_N",</div><div class='add'>+			"SYS_FAULT_LED_N","RUN_POWER_FAULT_L",</div><div class='add'>+	/*T0-T7*/	"","","","","","","","",</div><div class='add'>+	/*U0-U7*/	"","","","","","","","",</div><div class='add'>+	/*V0-V7*/	"L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L",</div><div class='add'>+			"BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L",</div><div class='add'>+			"SMB_BMC_TMP_ALERT","PWR_LED_N",</div><div class='add'>+			"SYS_RST_OUT_L","IRQ_TPM_SPI_N",</div><div class='add'>+	/*W0-W7*/	"","","","","","","","",</div><div class='add'>+	/*X0-X7*/	"","","","","","","","",</div><div class='add'>+	/*Y0-Y7*/	"","RST_BMC_SELF_HW",</div><div class='add'>+			"FM_FLASH_LATCH_N","BMC_EMMC_RST_N",</div><div class='add'>+			"BMC_GPIOY4","BMC_GPIOY5","","",</div><div class='add'>+	/*Z0-Z7*/	"","","","","","","BMC_GPIOZ6","BMC_GPIOZ7";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*18A0-18A7*/	"","","","","","","","",</div><div class='add'>+	/*18B0-18B3*/	"","","","",</div><div class='add'>+	/*18B4-18B7*/	"FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1","FM_BOARD_BMC_REV_ID2","",</div><div class='add'>+	/*18C0-18C7*/	"","","PI_BMC_BIOS_ROM_IRQ0_N","","","","","",</div><div class='add'>+	/*18D0-18D7*/	"","","","","","","","",</div><div class='add'>+	/*18E0-18E3*/	"","","","AC_PWR_BMC_BTN_N","","","","";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@71 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux0ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux0ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			// HDD FRU EEPROM</div><div class='add'>+			eeprom@56 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x56&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// E1.S Backplane</div><div class='add'>+			i2c0mux0ch1mux0: i2c-mux@74 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				i2c0mux0ch1mux0ch0: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux0ch1mux0ch1: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux0ch1mux0ch2: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux0ch1mux0ch3: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux0ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux0ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux1ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux1ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			// IO Mezz 0 IOEXP</div><div class='add'>+			io_expander7: gpio@20 {</div><div class='add'>+				compatible = "nxp,pca9535";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"RST_CX7_0",</div><div class='add'>+					"RST_CX7_1",</div><div class='add'>+					"CX0_SSD0_PRSNT_L",</div><div class='add'>+					"CX1_SSD1_PRSNT_L",</div><div class='add'>+					"CX_BOOT_CMPLT_CX0",</div><div class='add'>+					"CX_BOOT_CMPLT_CX1",</div><div class='add'>+					"CX_TWARN_CX0_L",</div><div class='add'>+					"CX_TWARN_CX1_L",</div><div class='add'>+					"CX_OVT_SHDN_CX0",</div><div class='add'>+					"CX_OVT_SHDN_CX1",</div><div class='add'>+					"FNP_L_CX0",</div><div class='add'>+					"FNP_L_CX1",</div><div class='add'>+					"",</div><div class='add'>+					"MCU_GPIO",</div><div class='add'>+					"MCU_RST_N",</div><div class='add'>+					"MCU_RECOVERY_N";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// IO Mezz 0 FRU EEPROM</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// OSFP 0 FRU EEPROM</div><div class='add'>+			eeprom@52 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x52&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux1ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux1ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@73 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x73&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux2ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			// IOB0 NIC0 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux2ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux2ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux2ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			// IOB0 NIC1 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@75 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x75&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux3ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux3ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			// E1.S Backplane HDD FRU EEPROM</div><div class='add'>+			eeprom@56 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x56&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// E1.S Backplane MUX</div><div class='add'>+			i2c0mux3ch1mux0: i2c-mux@74 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				i2c0mux3ch1mux0ch0: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux3ch1mux0ch1: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux3ch1mux0ch2: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0mux3ch1mux0ch3: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux3ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux3ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@76 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x76&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux4ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux4ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			// IO Mezz 1 IOEXP</div><div class='add'>+			io_expander8: gpio@21 {</div><div class='add'>+				compatible = "nxp,pca9535";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"SEC_RST_CX7_0",</div><div class='add'>+					"SEC_RST_CX7_1",</div><div class='add'>+					"SEC_CX0_SSD0_PRSNT_L",</div><div class='add'>+					"SEC_CX1_SSD1_PRSNT_L",</div><div class='add'>+					"SEC_CX_BOOT_CMPLT_CX0",</div><div class='add'>+					"SEC_CX_BOOT_CMPLT_CX1",</div><div class='add'>+					"SEC_CX_TWARN_CX0_L",</div><div class='add'>+					"SEC_CX_TWARN_CX1_L",</div><div class='add'>+					"SEC_CX_OVT_SHDN_CX0",</div><div class='add'>+					"SEC_CX_OVT_SHDN_CX1",</div><div class='add'>+					"SEC_FNP_L_CX0",</div><div class='add'>+					"SEC_FNP_L_CX1",</div><div class='add'>+					"",</div><div class='add'>+					"SEC_MCU_GPIO",</div><div class='add'>+					"SEC_MCU_RST_N",</div><div class='add'>+					"SEC_MCU_RECOVERY_N";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// IO Mezz 1 FRU EEPROM</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// OSFP 1 FRU EEPROM</div><div class='add'>+			eeprom@52 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x52&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux4ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux4ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c0mux5ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			// IOB1 NIC0 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux5ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux5ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0mux5ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			// IOB1 NIC1 TEMP</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// PDB</div><div class='add'>+	power-monitor@12 {</div><div class='add'>+		compatible = "ti,lm5066i";</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB</div><div class='add'>+	power-monitor@14 {</div><div class='add'>+		compatible = "ti,lm5066i";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 0</div><div class='add'>+	fanctl0: fan-controller@20{</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 0</div><div class='add'>+	fanctl1: fan-controller@23{</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1</div><div class='add'>+	fanctl2: fan-controller@2c{</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1</div><div class='add'>+	fanctl3: fan-controller@2f{</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x2f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 0 Leak Sensor</div><div class='add'>+	adc@34 {</div><div class='add'>+		compatible = "maxim,max1363";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1 Leak Sensor</div><div class='add'>+	adc@35 {</div><div class='add'>+		compatible = "maxim,max1363";</div><div class='add'>+		reg = &lt;0x35&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB TEMP SENSOR</div><div class='add'>+	temperature-sensor@4e {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB FRU EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB</div><div class='add'>+	vrm@60 {</div><div class='add'>+		compatible = "renesas,raa228004";</div><div class='add'>+		reg = &lt;0x60&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB</div><div class='add'>+	vrm@61 {</div><div class='add'>+		compatible = "renesas,raa228004";</div><div class='add'>+		reg = &lt;0x61&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Interposer</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch4: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch5: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x5&gt;;</div><div class='add'>+</div><div class='add'>+			// Interposer TEMP SENSOR</div><div class='add'>+			temperature-sensor@4f {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4f&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// Interposer FRU EEPROM</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch6: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x6&gt;;</div><div class='add'>+</div><div class='add'>+			// Interposer IOEXP</div><div class='add'>+			io_expander5: gpio@27 {</div><div class='add'>+				compatible = "nxp,pca9554";</div><div class='add'>+				reg = &lt;0x27&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"JTAG_MUX_SEL",</div><div class='add'>+					"IOX_BMC_RESET",</div><div class='add'>+					"RTC_CLR_L",</div><div class='add'>+					"RTC_U77_ALRT_N",</div><div class='add'>+					"",</div><div class='add'>+					"PSU_ALERT_N",</div><div class='add'>+					"",</div><div class='add'>+					"RST_P12V_STBY_N";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1mux0ch7: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0x7&gt;;</div><div class='add'>+</div><div class='add'>+			// FIO TEMP SENSOR</div><div class='add'>+			temperature-sensor@4b {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4b&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// FIO FRU EEPROM</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	// Module 0, Expander @0x20</div><div class='add'>+	io_expander0: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FPGA_THERM_OVERT_L-I",</div><div class='add'>+			"FPGA_READY_BMC-I",</div><div class='add'>+			"HMC_BMC_DETECT-O",</div><div class='add'>+			"HMC_PGOOD-O",</div><div class='add'>+			"",</div><div class='add'>+			"BMC_STBY_CYCLE-O",</div><div class='add'>+			"FPGA_EROT_FATAL_ERROR_L-I",</div><div class='add'>+			"WP_HW_EXT_CTRL_L-O",</div><div class='add'>+			"EROT_FPGA_RST_L-O",</div><div class='add'>+			"FPGA_EROT_RECOVERY_L-O",</div><div class='add'>+			"BMC_EROT_FPGA_SPI_MUX_SEL-O",</div><div class='add'>+			"USB2_HUB_RST_L-O",</div><div class='add'>+			"",</div><div class='add'>+			"SGPIO_EN_L-O",</div><div class='add'>+			"B2B_IOEXP_INT_L-I",</div><div class='add'>+			"I2C_BUS_MUX_RESET_L-O";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1, Expander @0x21</div><div class='add'>+	io_expander1: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"SEC_FPGA_THERM_OVERT_L",</div><div class='add'>+			"SEC_FPGA_READY_BMC",</div><div class='add'>+			"SEC_HMC_BMC_DETECT",</div><div class='add'>+			"SEC_HMC_PGOOD",</div><div class='add'>+			"",</div><div class='add'>+			"SEC_BMC_SELF_POWER_CYCLE",</div><div class='add'>+			"SEC_SEC_FPGA_EROT_FATAL_ERROR_L",</div><div class='add'>+			"SEC_WP_HW_EXT_CTRL_L",</div><div class='add'>+			"SEC_EROT_FPGA_RST_L",</div><div class='add'>+			"SEC_FPGA_EROT_RECOVERY_L",</div><div class='add'>+			"SEC_BMC_EROT_FPGA_SPI_MUX_SEL",</div><div class='add'>+			"SEC_USB2_HUB_RST_L",</div><div class='add'>+			"",</div><div class='add'>+			"SEC_SGPIO_EN_L",</div><div class='add'>+			"SEC_IOB_IOEXP_INT_L",</div><div class='add'>+			"SEC_I2C_BUS_MUX_RESET_L";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// HMC Expander @0x27</div><div class='add'>+	io_expander2: gpio@27 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"HMC_PRSNT_L-I",</div><div class='add'>+			"HMC_READY-I",</div><div class='add'>+			"HMC_EROT_FATAL_ERROR_L-I",</div><div class='add'>+			"I2C_MUX_SEL-O",</div><div class='add'>+			"HMC_EROT_SPI_MUX_SEL-O",</div><div class='add'>+			"HMC_EROT_RECOVERY_L-O",</div><div class='add'>+			"HMC_EROT_RST_L-O",</div><div class='add'>+			"GLOBAL_WP_HMC-O",</div><div class='add'>+			"FPGA_RST_L-O",</div><div class='add'>+			"USB2_HUB_RST-O",</div><div class='add'>+			"CPU_UART_MUX_SEL-O",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 0 Aux EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1 Aux EEPROM</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	io_expander3: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"RTC_MUX_SEL",</div><div class='add'>+			"PCI_MUX_SEL",</div><div class='add'>+			"TPM_MUX_SEL",</div><div class='add'>+			"FAN_MUX-SEL",</div><div class='add'>+			"SGMII_MUX_SEL",</div><div class='add'>+			"DP_MUX_SEL",</div><div class='add'>+			"UPHY3_USB_SEL",</div><div class='add'>+			"NCSI_MUX_SEL",</div><div class='add'>+			"BMC_PHY_RST",</div><div class='add'>+			"RTC_CLR_L",</div><div class='add'>+			"BMC_12V_CTRL",</div><div class='add'>+			"PS_RUN_IO0_PG",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@6f {</div><div class='add'>+		compatible = "nuvoton,nct3018y";</div><div class='add'>+		reg = &lt;0x6f&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	// SCM TEMP SENSOR BOARD</div><div class='add'>+	temperature-sensor@4b {</div><div class='add'>+		compatible = "national,lm75b";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// SCM CPLD IOEXP</div><div class='add'>+	io_expander4: gpio@4f {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"stby_power_en_cpld",</div><div class='add'>+			"stby_power_gd_cpld",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// SCM FRU EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// BSM FRU EEPROM</div><div class='add'>+	eeprom@56 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x56&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp-controller;</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// OCP NIC0 TEMP</div><div class='add'>+	temperature-sensor@1f {</div><div class='add'>+		compatible = "ti,tmp421";</div><div class='add'>+		reg = &lt;0x1f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// OCP NIC0 FRU EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ssif-bmc@10 {</div><div class='add'>+		compatible = "ssif-bmc";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+</div><div class='add'>+	// HPM 1 FRU EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+	// CBC 2 FRU</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+	};</div><div class='add'>+	// CBC 3 FRU</div><div class='add'>+	eeprom@55 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x55&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+</div><div class='add'>+	// HPM FRU EEPROM</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// CBC 0 FRU</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// CBC 1 FRU</div><div class='add'>+	eeprom@55 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x55&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// HMC FRU EEPROM</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// PDB CPLD IOEXP 0x10</div><div class='add'>+	io_expander9: gpio@10 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"wSequence_Latch_State_N",</div><div class='add'>+			"wP12V_N1N2_RUNTIME_FLT_N",</div><div class='add'>+			"wP12V_FAN_RUNTIME_FLT_N",</div><div class='add'>+			"wP12V_AUX_RUNTIME_FLT_N",</div><div class='add'>+			"wHost_PERST_SEQPWR_FLT_N",</div><div class='add'>+			"wP12V_N1N2_SEQPWR_FLT_N",</div><div class='add'>+			"wP12V_FAN_SEQPWR_FLT_N",</div><div class='add'>+			"wP12V_AUX_SEQPWR_FLT_N",</div><div class='add'>+			"wP12V_RUNTIME_FLT_NIC1_N",</div><div class='add'>+			"wAUX_RUNTIME_FLT_NIC1_N",</div><div class='add'>+			"wP12V_SEQPWR_FLT_NIC1_N",</div><div class='add'>+			"wAUX_SEQPWR_FLT_NIC1_N",</div><div class='add'>+			"wP12V_RUNTIME_FLT_NIC0_N",</div><div class='add'>+			"wAUX_RUNTIME_FLT_NIC0_N",</div><div class='add'>+			"wP12V_SEQPWR_FLT_NIC0_N",</div><div class='add'>+			"wAUX_SEQPWR_FLT_NIC0_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB CPLD IOEXP 0x11</div><div class='add'>+	io_expander10: gpio@11 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FM_P12V_NIC1_FLTB_R_N",</div><div class='add'>+			"FM_P3V3_NIC1_FAULT_R_N",</div><div class='add'>+			"FM_P12V_NIC0_FLTB_R_N",</div><div class='add'>+			"FM_P3V3_NIC0_FAULT_R_N",</div><div class='add'>+			"P48V_HS2_FAULT_N_PLD",</div><div class='add'>+			"P48V_HS1_FAULT_N_PLD",</div><div class='add'>+			"P12V_AUX_FAN_OC_PLD_N",</div><div class='add'>+			"P12V_AUX_FAN_FAULT_PLD_N",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"FM_SYS_THROTTLE_N",</div><div class='add'>+			"OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",</div><div class='add'>+			"OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB CPLD IOEXP 0x12</div><div class='add'>+	io_expander11: gpio@12 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"P12V_AUX_PSU_SMB_ALERT_R_L",</div><div class='add'>+			"P12V_SCM_SENSE_ALERT_R_N",</div><div class='add'>+			"P12V_AUX_NIC1_SENSE_ALERT_R_N",</div><div class='add'>+			"P12V_AUX_NIC0_SENSE_ALERT_R_N",</div><div class='add'>+			"NODEB_PSU_SMB_ALERT_R_L",</div><div class='add'>+			"NODEA_PSU_SMB_ALERT_R_L",</div><div class='add'>+			"P12V_AUX_FAN_ALERT_PLD_N",</div><div class='add'>+			"P52V_SENSE_ALERT_PLD_N",</div><div class='add'>+			"PRSNT_RJ45_FIO_N_R",</div><div class='add'>+			"FM_MAIN_PWREN_RMC_EN_ISO_R",</div><div class='add'>+			"CHASSIS3_LEAK_Q_N_PLD",</div><div class='add'>+			"CHASSIS2_LEAK_Q_N_PLD",</div><div class='add'>+			"CHASSIS1_LEAK_Q_N_PLD",</div><div class='add'>+			"CHASSIS0_LEAK_Q_N_PLD",</div><div class='add'>+			"",</div><div class='add'>+			"SMB_RJ45_FIO_TMP_ALERT";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB CPLD IOEXP 0x13</div><div class='add'>+	io_expander12: gpio@13 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reg = &lt;0x13&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FAN_7_PRESENT_N",</div><div class='add'>+			"FAN_6_PRESENT_N",</div><div class='add'>+			"FAN_5_PRESENT_N",</div><div class='add'>+			"FAN_4_PRESENT_N",</div><div class='add'>+			"FAN_3_PRESENT_N",</div><div class='add'>+			"FAN_2_PRESENT_N",</div><div class='add'>+			"FAN_1_PRESENT_N",</div><div class='add'>+			"FAN_0_PRESENT_N",</div><div class='add'>+			"HP_LVC3_OCP_V3_2_PRSNT2_PLD_N",</div><div class='add'>+			"HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",</div><div class='add'>+			"PRSNT_HDDBD_POWER_CABLE_N",</div><div class='add'>+			"PRSNT_OSFP0_POWER_CABLE_N",</div><div class='add'>+			"PRSNT_CHASSIS3_LEAK_CABLE_R_N",</div><div class='add'>+			"PRSNT_CHASSIS2_LEAK_CABLE_R_N",</div><div class='add'>+			"PRSNT_CHASSIS1_LEAK_CABLE_R_N",</div><div class='add'>+			"PRSNT_CHASSIS0_LEAK_CABLE_R_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// PDB CPLD IOEXP 0x14</div><div class='add'>+	io_expander13: gpio@14 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"rmc_en_dc_pwr_on",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"leak_config_0",</div><div class='add'>+			"leak_config_1",</div><div class='add'>+			"leak_config_2",</div><div class='add'>+			"leak_config_3",</div><div class='add'>+			"mfg_led_test_mode_l",</div><div class='add'>+			"small_leak_err_inj",</div><div class='add'>+			"large_leak_err_inj",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	mctp-controller;</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// OCP NIC1 TEMP</div><div class='add'>+	temperature-sensor@1f {</div><div class='add'>+		compatible = "ti,tmp421";</div><div class='add'>+		reg = &lt;0x1f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// OCP NIC1 FRU EEPROM</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ncsi3_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ncsi4_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;udma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdtrst1_default&gt;;</div><div class='add'>+	aspeed,reset-type = "soc";</div><div class='add'>+	aspeed,external-signal;</div><div class='add'>+	aspeed,ext-push-pull;</div><div class='add'>+	aspeed,ext-active-high;</div><div class='add'>+	aspeed,ext-pulse-duration = &lt;256&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts<br/>new file mode 100644<br/>index 000000000000..58c107a1b6cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2021 Facebook Inc.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "ast2600-facebook-netbmc-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Facebook Darwin BMC";</div><div class='add'>+	compatible = "facebook,darwin-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart5;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc0 0&gt;, &lt;&amp;adc0 1&gt;, &lt;&amp;adc0 2&gt;, &lt;&amp;adc0 3&gt;,</div><div class='add'>+			      &lt;&amp;adc0 4&gt;, &lt;&amp;adc0 5&gt;, &lt;&amp;adc0 6&gt;, &lt;&amp;adc0 7&gt;,</div><div class='add'>+			      &lt;&amp;adc1 0&gt;, &lt;&amp;adc1 1&gt;, &lt;&amp;adc1 2&gt;, &lt;&amp;adc1 3&gt;,</div><div class='add'>+			      &lt;&amp;adc1 4&gt;, &lt;&amp;adc1 5&gt;, &lt;&amp;adc1 6&gt;, &lt;&amp;adc1 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi_gpio: spi {</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c512";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0_default &amp;pinctrl_adc1_default</div><div class='add'>+		     &amp;pinctrl_adc2_default &amp;pinctrl_adc3_default</div><div class='add'>+		     &amp;pinctrl_adc4_default &amp;pinctrl_adc5_default</div><div class='add'>+		     &amp;pinctrl_adc6_default &amp;pinctrl_adc7_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc8_default &amp;pinctrl_adc9_default</div><div class='add'>+		     &amp;pinctrl_adc10_default &amp;pinctrl_adc11_default</div><div class='add'>+		     &amp;pinctrl_adc12_default &amp;pinctrl_adc13_default</div><div class='add'>+		     &amp;pinctrl_adc14_default &amp;pinctrl_adc15_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc_controller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;25000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts<br/>index 74f3c67e0eff..ff1009ea1c49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts</a></div><div class='hunk'>@@ -201,3 +201,15 @@</div><div class='ctx'> 		full-duplex;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;emmc_controller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;25000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts<br/>new file mode 100644<br/>index 000000000000..aa9576d8ab56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji-data64.dts</a></div><div class='hunk'>@@ -0,0 +1,1256 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2020 Facebook Inc.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "ast2600-facebook-netbmc-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Facebook Fuji BMC (64MB Datastore)";</div><div class='add'>+	compatible = "facebook,fuji-data64-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (2-0070) provides 8 channels connecting to</div><div class='add'>+		 * SCM (System Controller Module).</div><div class='add'>+		 */</div><div class='add'>+		i2c16 = &amp;imux16;</div><div class='add'>+		i2c17 = &amp;imux17;</div><div class='add'>+		i2c18 = &amp;imux18;</div><div class='add'>+		i2c19 = &amp;imux19;</div><div class='add'>+		i2c20 = &amp;imux20;</div><div class='add'>+		i2c21 = &amp;imux21;</div><div class='add'>+		i2c22 = &amp;imux22;</div><div class='add'>+		i2c23 = &amp;imux23;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (8-0070) provides 8 channels connecting to</div><div class='add'>+		 * SMB (Switch Main Board).</div><div class='add'>+		 */</div><div class='add'>+		i2c24 = &amp;imux24;</div><div class='add'>+		i2c25 = &amp;imux25;</div><div class='add'>+		i2c26 = &amp;imux26;</div><div class='add'>+		i2c27 = &amp;imux27;</div><div class='add'>+		i2c28 = &amp;imux28;</div><div class='add'>+		i2c29 = &amp;imux29;</div><div class='add'>+		i2c30 = &amp;imux30;</div><div class='add'>+		i2c31 = &amp;imux31;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (11-0077) provides 8 channels connecting to</div><div class='add'>+		 * SMB (Switch Main Board).</div><div class='add'>+		 */</div><div class='add'>+		i2c40 = &amp;imux40;</div><div class='add'>+		i2c41 = &amp;imux41;</div><div class='add'>+		i2c42 = &amp;imux42;</div><div class='add'>+		i2c43 = &amp;imux43;</div><div class='add'>+		i2c44 = &amp;imux44;</div><div class='add'>+		i2c45 = &amp;imux45;</div><div class='add'>+		i2c46 = &amp;imux46;</div><div class='add'>+		i2c47 = &amp;imux47;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (24-0071) provides 8 channels connecting to</div><div class='add'>+		 * PDB-Left.</div><div class='add'>+		 */</div><div class='add'>+		i2c48 = &amp;imux48;</div><div class='add'>+		i2c49 = &amp;imux49;</div><div class='add'>+		i2c50 = &amp;imux50;</div><div class='add'>+		i2c51 = &amp;imux51;</div><div class='add'>+		i2c52 = &amp;imux52;</div><div class='add'>+		i2c53 = &amp;imux53;</div><div class='add'>+		i2c54 = &amp;imux54;</div><div class='add'>+		i2c55 = &amp;imux55;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (25-0072) provides 8 channels connecting to</div><div class='add'>+		 * PDB-Right.</div><div class='add'>+		 */</div><div class='add'>+		i2c56 = &amp;imux56;</div><div class='add'>+		i2c57 = &amp;imux57;</div><div class='add'>+		i2c58 = &amp;imux58;</div><div class='add'>+		i2c59 = &amp;imux59;</div><div class='add'>+		i2c60 = &amp;imux60;</div><div class='add'>+		i2c61 = &amp;imux61;</div><div class='add'>+		i2c62 = &amp;imux62;</div><div class='add'>+		i2c63 = &amp;imux63;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (26-0076) provides 8 channels connecting to</div><div class='add'>+		 * FCM1.</div><div class='add'>+		 */</div><div class='add'>+		i2c64 = &amp;imux64;</div><div class='add'>+		i2c65 = &amp;imux65;</div><div class='add'>+		i2c66 = &amp;imux66;</div><div class='add'>+		i2c67 = &amp;imux67;</div><div class='add'>+		i2c68 = &amp;imux68;</div><div class='add'>+		i2c69 = &amp;imux69;</div><div class='add'>+		i2c70 = &amp;imux70;</div><div class='add'>+		i2c71 = &amp;imux71;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (27-0076) provides 8 channels connecting to</div><div class='add'>+		 * FCM2.</div><div class='add'>+		 */</div><div class='add'>+		i2c72 = &amp;imux72;</div><div class='add'>+		i2c73 = &amp;imux73;</div><div class='add'>+		i2c74 = &amp;imux74;</div><div class='add'>+		i2c75 = &amp;imux75;</div><div class='add'>+		i2c76 = &amp;imux76;</div><div class='add'>+		i2c77 = &amp;imux77;</div><div class='add'>+		i2c78 = &amp;imux78;</div><div class='add'>+		i2c79 = &amp;imux79;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (40-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM1.</div><div class='add'>+		 */</div><div class='add'>+		i2c80 = &amp;imux80;</div><div class='add'>+		i2c81 = &amp;imux81;</div><div class='add'>+		i2c82 = &amp;imux82;</div><div class='add'>+		i2c83 = &amp;imux83;</div><div class='add'>+		i2c84 = &amp;imux84;</div><div class='add'>+		i2c85 = &amp;imux85;</div><div class='add'>+		i2c86 = &amp;imux86;</div><div class='add'>+		i2c87 = &amp;imux87;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (41-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM2.</div><div class='add'>+		 */</div><div class='add'>+		i2c88 = &amp;imux88;</div><div class='add'>+		i2c89 = &amp;imux89;</div><div class='add'>+		i2c90 = &amp;imux90;</div><div class='add'>+		i2c91 = &amp;imux91;</div><div class='add'>+		i2c92 = &amp;imux92;</div><div class='add'>+		i2c93 = &amp;imux93;</div><div class='add'>+		i2c94 = &amp;imux94;</div><div class='add'>+		i2c95 = &amp;imux95;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (42-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM3.</div><div class='add'>+		 */</div><div class='add'>+		i2c96 = &amp;imux96;</div><div class='add'>+		i2c97 = &amp;imux97;</div><div class='add'>+		i2c98 = &amp;imux98;</div><div class='add'>+		i2c99 = &amp;imux99;</div><div class='add'>+		i2c100 = &amp;imux100;</div><div class='add'>+		i2c101 = &amp;imux101;</div><div class='add'>+		i2c102 = &amp;imux102;</div><div class='add'>+		i2c103 = &amp;imux103;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (43-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM4.</div><div class='add'>+		 */</div><div class='add'>+		i2c104 = &amp;imux104;</div><div class='add'>+		i2c105 = &amp;imux105;</div><div class='add'>+		i2c106 = &amp;imux106;</div><div class='add'>+		i2c107 = &amp;imux107;</div><div class='add'>+		i2c108 = &amp;imux108;</div><div class='add'>+		i2c109 = &amp;imux109;</div><div class='add'>+		i2c110 = &amp;imux110;</div><div class='add'>+		i2c111 = &amp;imux111;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (44-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM5.</div><div class='add'>+		 */</div><div class='add'>+		i2c112 = &amp;imux112;</div><div class='add'>+		i2c113 = &amp;imux113;</div><div class='add'>+		i2c114 = &amp;imux114;</div><div class='add'>+		i2c115 = &amp;imux115;</div><div class='add'>+		i2c116 = &amp;imux116;</div><div class='add'>+		i2c117 = &amp;imux117;</div><div class='add'>+		i2c118 = &amp;imux118;</div><div class='add'>+		i2c119 = &amp;imux119;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (45-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM6.</div><div class='add'>+		 */</div><div class='add'>+		i2c120 = &amp;imux120;</div><div class='add'>+		i2c121 = &amp;imux121;</div><div class='add'>+		i2c122 = &amp;imux122;</div><div class='add'>+		i2c123 = &amp;imux123;</div><div class='add'>+		i2c124 = &amp;imux124;</div><div class='add'>+		i2c125 = &amp;imux125;</div><div class='add'>+		i2c126 = &amp;imux126;</div><div class='add'>+		i2c127 = &amp;imux127;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (46-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM7.</div><div class='add'>+		 */</div><div class='add'>+		i2c128 = &amp;imux128;</div><div class='add'>+		i2c129 = &amp;imux129;</div><div class='add'>+		i2c130 = &amp;imux130;</div><div class='add'>+		i2c131 = &amp;imux131;</div><div class='add'>+		i2c132 = &amp;imux132;</div><div class='add'>+		i2c133 = &amp;imux133;</div><div class='add'>+		i2c134 = &amp;imux134;</div><div class='add'>+		i2c135 = &amp;imux135;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (47-0076) provides 8 channels connecting to</div><div class='add'>+		 * PIM8.</div><div class='add'>+		 */</div><div class='add'>+		i2c136 = &amp;imux136;</div><div class='add'>+		i2c137 = &amp;imux137;</div><div class='add'>+		i2c138 = &amp;imux138;</div><div class='add'>+		i2c139 = &amp;imux139;</div><div class='add'>+		i2c140 = &amp;imux140;</div><div class='add'>+		i2c141 = &amp;imux141;</div><div class='add'>+		i2c142 = &amp;imux142;</div><div class='add'>+		i2c143 = &amp;imux143;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi_gpio: spi {</div><div class='add'>+		num-chipselects = &lt;3&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+			   &lt;0&gt;,	/* device reg=&lt;1&gt; does not exist */</div><div class='add'>+			   &lt;&amp;gpio0 ASPEED_GPIO(X, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		eeprom@2 {</div><div class='add'>+			compatible = "atmel,at93c46d";</div><div class='add'>+			spi-max-frequency = &lt;250000&gt;;</div><div class='add'>+			data-size = &lt;16&gt;;</div><div class='add'>+			spi-cs-high;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc {</div><div class='add'>+	flash@0 {</div><div class='add'>+		/delete-node/partitions;</div><div class='add'>+#include "facebook-bmc-flash-layout-128-data64.dtsi"</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	multi-master;</div><div class='add'>+	bus-frequency = &lt;1000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/*</div><div class='add'>+	 * PCA9548 (2-0070) provides 8 channels connecting to SCM (System</div><div class='add'>+	 * Controller Module).</div><div class='add'>+	 */</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux16: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			adm1278@10 {</div><div class='add'>+				compatible = "adi,adm1278";</div><div class='add'>+				reg = &lt;0x10&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;1500&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux17: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux18: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux19: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux20: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux21: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux22: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux23: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	/*</div><div class='add'>+	 * PCA9548 (8-0070) provides 8 channels connecting to SMB (Switch</div><div class='add'>+	 * Main Board).</div><div class='add'>+	 */</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux24: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@71 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x71&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux48: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux49: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux50: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					lp5012@14 {</div><div class='add'>+						compatible = "ti,lp5012";</div><div class='add'>+						reg = &lt;0x14&gt;;</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						multi-led@0 {</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='add'>+							function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+							label = "sys";</div><div class='add'>+</div><div class='add'>+							led@0 {</div><div class='add'>+								reg = &lt;0&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@1 {</div><div class='add'>+								reg = &lt;1&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@2 {</div><div class='add'>+								reg = &lt;2&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						multi-led@1 {</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='add'>+							function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+							label = "fan";</div><div class='add'>+</div><div class='add'>+							led@0 {</div><div class='add'>+								reg = &lt;0&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@1 {</div><div class='add'>+								reg = &lt;1&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@2 {</div><div class='add'>+								reg = &lt;2&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						multi-led@2 {</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							reg = &lt;2&gt;;</div><div class='add'>+							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='add'>+							function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+							label = "psu";</div><div class='add'>+</div><div class='add'>+							led@0 {</div><div class='add'>+								reg = &lt;0&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@1 {</div><div class='add'>+								reg = &lt;1&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@2 {</div><div class='add'>+								reg = &lt;2&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						multi-led@3 {</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							reg = &lt;3&gt;;</div><div class='add'>+							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='add'>+							function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+							label = "smb";</div><div class='add'>+</div><div class='add'>+							led@0 {</div><div class='add'>+								reg = &lt;0&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@1 {</div><div class='add'>+								reg = &lt;1&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							led@2 {</div><div class='add'>+								reg = &lt;2&gt;;</div><div class='add'>+								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux51: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux52: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux53: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux54: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux55: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux25: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@72 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x72&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux56: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux57: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux58: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux59: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux60: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux61: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux62: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux63: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux26: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux64: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux65: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux66: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux67: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					adm1278@10 {</div><div class='add'>+						compatible = "adi,adm1278";</div><div class='add'>+						reg = &lt;0x10&gt;;</div><div class='add'>+						shunt-resistor-micro-ohms = &lt;250&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux68: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux69: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux70: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux71: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux27: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux72: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux73: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux74: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux75: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					adm1278@10 {</div><div class='add'>+						compatible = "adi,adm1278";</div><div class='add'>+						reg = &lt;0x10&gt;;</div><div class='add'>+						shunt-resistor-micro-ohms = &lt;250&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux76: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux77: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux78: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux79: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux28: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux29: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux30: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux31: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * PCA9548 (11-0077) provides 8 channels connecting to SMB (Switch</div><div class='add'>+	 * Main Board).</div><div class='add'>+	 */</div><div class='add'>+	i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux40: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux80: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux81: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux82: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux83: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux84: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux85: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux86: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux87: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux41: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux88: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux89: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux90: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux91: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux92: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux93: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux94: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux95: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux42: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux96: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux97: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux98: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux99: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux100: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux101: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux102: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux103: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux43: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux104: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux105: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux106: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux107: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux108: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux109: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux110: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux111: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux44: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux112: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux113: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux114: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux115: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux116: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux117: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux118: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux119: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux45: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux120: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux121: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux122: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux123: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux124: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux125: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux126: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux127: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux46: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux128: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux129: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux130: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux131: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux132: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux133: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux134: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux135: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux47: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@76 {</div><div class='add'>+				compatible = "nxp,pca9548";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x76&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				imux136: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux137: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux138: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux139: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux140: i2c@4 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux141: i2c@5 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux142: i2c@6 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				imux143: i2c@7 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy3: ethernet-phy@13 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0d&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc_controller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;25000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts<br/>index f23c26a3441d..5dc2a165e441 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts</a></div><div class='hunk'>@@ -1,1251 +1,16 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0+</div><div class='ctx'> // Copyright (c) 2020 Facebook Inc.</div><div class='ctx'> </div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include "ast2600-facebook-netbmc-common.dtsi"</div><div class='add'>+#include "aspeed-bmc-facebook-fuji-data64.dts"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Facebook Fuji BMC";</div><div class='ctx'> 	compatible = "facebook,fuji-bmc", "aspeed,ast2600";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (2-0070) provides 8 channels connecting to</div><div class='del'>-		 * SCM (System Controller Module).</div><div class='del'>-		 */</div><div class='del'>-		i2c16 = &amp;imux16;</div><div class='del'>-		i2c17 = &amp;imux17;</div><div class='del'>-		i2c18 = &amp;imux18;</div><div class='del'>-		i2c19 = &amp;imux19;</div><div class='del'>-		i2c20 = &amp;imux20;</div><div class='del'>-		i2c21 = &amp;imux21;</div><div class='del'>-		i2c22 = &amp;imux22;</div><div class='del'>-		i2c23 = &amp;imux23;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (8-0070) provides 8 channels connecting to</div><div class='del'>-		 * SMB (Switch Main Board).</div><div class='del'>-		 */</div><div class='del'>-		i2c24 = &amp;imux24;</div><div class='del'>-		i2c25 = &amp;imux25;</div><div class='del'>-		i2c26 = &amp;imux26;</div><div class='del'>-		i2c27 = &amp;imux27;</div><div class='del'>-		i2c28 = &amp;imux28;</div><div class='del'>-		i2c29 = &amp;imux29;</div><div class='del'>-		i2c30 = &amp;imux30;</div><div class='del'>-		i2c31 = &amp;imux31;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (11-0077) provides 8 channels connecting to</div><div class='del'>-		 * SMB (Switch Main Board).</div><div class='del'>-		 */</div><div class='del'>-		i2c40 = &amp;imux40;</div><div class='del'>-		i2c41 = &amp;imux41;</div><div class='del'>-		i2c42 = &amp;imux42;</div><div class='del'>-		i2c43 = &amp;imux43;</div><div class='del'>-		i2c44 = &amp;imux44;</div><div class='del'>-		i2c45 = &amp;imux45;</div><div class='del'>-		i2c46 = &amp;imux46;</div><div class='del'>-		i2c47 = &amp;imux47;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (24-0071) provides 8 channels connecting to</div><div class='del'>-		 * PDB-Left.</div><div class='del'>-		 */</div><div class='del'>-		i2c48 = &amp;imux48;</div><div class='del'>-		i2c49 = &amp;imux49;</div><div class='del'>-		i2c50 = &amp;imux50;</div><div class='del'>-		i2c51 = &amp;imux51;</div><div class='del'>-		i2c52 = &amp;imux52;</div><div class='del'>-		i2c53 = &amp;imux53;</div><div class='del'>-		i2c54 = &amp;imux54;</div><div class='del'>-		i2c55 = &amp;imux55;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (25-0072) provides 8 channels connecting to</div><div class='del'>-		 * PDB-Right.</div><div class='del'>-		 */</div><div class='del'>-		i2c56 = &amp;imux56;</div><div class='del'>-		i2c57 = &amp;imux57;</div><div class='del'>-		i2c58 = &amp;imux58;</div><div class='del'>-		i2c59 = &amp;imux59;</div><div class='del'>-		i2c60 = &amp;imux60;</div><div class='del'>-		i2c61 = &amp;imux61;</div><div class='del'>-		i2c62 = &amp;imux62;</div><div class='del'>-		i2c63 = &amp;imux63;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (26-0076) provides 8 channels connecting to</div><div class='del'>-		 * FCM1.</div><div class='del'>-		 */</div><div class='del'>-		i2c64 = &amp;imux64;</div><div class='del'>-		i2c65 = &amp;imux65;</div><div class='del'>-		i2c66 = &amp;imux66;</div><div class='del'>-		i2c67 = &amp;imux67;</div><div class='del'>-		i2c68 = &amp;imux68;</div><div class='del'>-		i2c69 = &amp;imux69;</div><div class='del'>-		i2c70 = &amp;imux70;</div><div class='del'>-		i2c71 = &amp;imux71;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (27-0076) provides 8 channels connecting to</div><div class='del'>-		 * FCM2.</div><div class='del'>-		 */</div><div class='del'>-		i2c72 = &amp;imux72;</div><div class='del'>-		i2c73 = &amp;imux73;</div><div class='del'>-		i2c74 = &amp;imux74;</div><div class='del'>-		i2c75 = &amp;imux75;</div><div class='del'>-		i2c76 = &amp;imux76;</div><div class='del'>-		i2c77 = &amp;imux77;</div><div class='del'>-		i2c78 = &amp;imux78;</div><div class='del'>-		i2c79 = &amp;imux79;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (40-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM1.</div><div class='del'>-		 */</div><div class='del'>-		i2c80 = &amp;imux80;</div><div class='del'>-		i2c81 = &amp;imux81;</div><div class='del'>-		i2c82 = &amp;imux82;</div><div class='del'>-		i2c83 = &amp;imux83;</div><div class='del'>-		i2c84 = &amp;imux84;</div><div class='del'>-		i2c85 = &amp;imux85;</div><div class='del'>-		i2c86 = &amp;imux86;</div><div class='del'>-		i2c87 = &amp;imux87;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (41-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM2.</div><div class='del'>-		 */</div><div class='del'>-		i2c88 = &amp;imux88;</div><div class='del'>-		i2c89 = &amp;imux89;</div><div class='del'>-		i2c90 = &amp;imux90;</div><div class='del'>-		i2c91 = &amp;imux91;</div><div class='del'>-		i2c92 = &amp;imux92;</div><div class='del'>-		i2c93 = &amp;imux93;</div><div class='del'>-		i2c94 = &amp;imux94;</div><div class='del'>-		i2c95 = &amp;imux95;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (42-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM3.</div><div class='del'>-		 */</div><div class='del'>-		i2c96 = &amp;imux96;</div><div class='del'>-		i2c97 = &amp;imux97;</div><div class='del'>-		i2c98 = &amp;imux98;</div><div class='del'>-		i2c99 = &amp;imux99;</div><div class='del'>-		i2c100 = &amp;imux100;</div><div class='del'>-		i2c101 = &amp;imux101;</div><div class='del'>-		i2c102 = &amp;imux102;</div><div class='del'>-		i2c103 = &amp;imux103;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (43-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM4.</div><div class='del'>-		 */</div><div class='del'>-		i2c104 = &amp;imux104;</div><div class='del'>-		i2c105 = &amp;imux105;</div><div class='del'>-		i2c106 = &amp;imux106;</div><div class='del'>-		i2c107 = &amp;imux107;</div><div class='del'>-		i2c108 = &amp;imux108;</div><div class='del'>-		i2c109 = &amp;imux109;</div><div class='del'>-		i2c110 = &amp;imux110;</div><div class='del'>-		i2c111 = &amp;imux111;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (44-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM5.</div><div class='del'>-		 */</div><div class='del'>-		i2c112 = &amp;imux112;</div><div class='del'>-		i2c113 = &amp;imux113;</div><div class='del'>-		i2c114 = &amp;imux114;</div><div class='del'>-		i2c115 = &amp;imux115;</div><div class='del'>-		i2c116 = &amp;imux116;</div><div class='del'>-		i2c117 = &amp;imux117;</div><div class='del'>-		i2c118 = &amp;imux118;</div><div class='del'>-		i2c119 = &amp;imux119;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (45-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM6.</div><div class='del'>-		 */</div><div class='del'>-		i2c120 = &amp;imux120;</div><div class='del'>-		i2c121 = &amp;imux121;</div><div class='del'>-		i2c122 = &amp;imux122;</div><div class='del'>-		i2c123 = &amp;imux123;</div><div class='del'>-		i2c124 = &amp;imux124;</div><div class='del'>-		i2c125 = &amp;imux125;</div><div class='del'>-		i2c126 = &amp;imux126;</div><div class='del'>-		i2c127 = &amp;imux127;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (46-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM7.</div><div class='del'>-		 */</div><div class='del'>-		i2c128 = &amp;imux128;</div><div class='del'>-		i2c129 = &amp;imux129;</div><div class='del'>-		i2c130 = &amp;imux130;</div><div class='del'>-		i2c131 = &amp;imux131;</div><div class='del'>-		i2c132 = &amp;imux132;</div><div class='del'>-		i2c133 = &amp;imux133;</div><div class='del'>-		i2c134 = &amp;imux134;</div><div class='del'>-		i2c135 = &amp;imux135;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (47-0076) provides 8 channels connecting to</div><div class='del'>-		 * PIM8.</div><div class='del'>-		 */</div><div class='del'>-		i2c136 = &amp;imux136;</div><div class='del'>-		i2c137 = &amp;imux137;</div><div class='del'>-		i2c138 = &amp;imux138;</div><div class='del'>-		i2c139 = &amp;imux139;</div><div class='del'>-		i2c140 = &amp;imux140;</div><div class='del'>-		i2c141 = &amp;imux141;</div><div class='del'>-		i2c142 = &amp;imux142;</div><div class='del'>-		i2c143 = &amp;imux143;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spi_gpio: spi {</div><div class='del'>-		num-chipselects = &lt;3&gt;;</div><div class='del'>-		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW&gt;,</div><div class='del'>-			   &lt;0&gt;,	/* device reg=&lt;1&gt; does not exist */</div><div class='del'>-			   &lt;&amp;gpio0 ASPEED_GPIO(X, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		eeprom@2 {</div><div class='del'>-			compatible = "atmel,at93c46d";</div><div class='del'>-			spi-max-frequency = &lt;250000&gt;;</div><div class='del'>-			data-size = &lt;16&gt;;</div><div class='del'>-			spi-cs-high;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	multi-master;</div><div class='del'>-	bus-frequency = &lt;1000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	/*</div><div class='del'>-	 * PCA9548 (2-0070) provides 8 channels connecting to SCM (System</div><div class='del'>-	 * Controller Module).</div><div class='del'>-	 */</div><div class='del'>-	i2c-mux@70 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x70&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux16: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			adm1278@10 {</div><div class='del'>-				compatible = "adi,adm1278";</div><div class='del'>-				reg = &lt;0x10&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				shunt-resistor-micro-ohms = &lt;1500&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux17: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux18: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux19: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux20: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux21: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux22: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux23: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c8 {</div><div class='del'>-	/*</div><div class='del'>-	 * PCA9548 (8-0070) provides 8 channels connecting to SMB (Switch</div><div class='del'>-	 * Main Board).</div><div class='del'>-	 */</div><div class='del'>-	i2c-mux@70 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x70&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux24: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@71 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x71&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux48: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux49: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux50: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-					lp5012@14 {</div><div class='del'>-						compatible = "ti,lp5012";</div><div class='del'>-						reg = &lt;0x14&gt;;</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-						multi-led@0 {</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							reg = &lt;0&gt;;</div><div class='del'>-							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='del'>-							function = LED_FUNCTION_ACTIVITY;</div><div class='del'>-							label = "sys";</div><div class='del'>-</div><div class='del'>-							led@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						multi-led@1 {</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							reg = &lt;1&gt;;</div><div class='del'>-							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='del'>-							function = LED_FUNCTION_ACTIVITY;</div><div class='del'>-							label = "fan";</div><div class='del'>-</div><div class='del'>-							led@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						multi-led@2 {</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							reg = &lt;2&gt;;</div><div class='del'>-							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='del'>-							function = LED_FUNCTION_ACTIVITY;</div><div class='del'>-							label = "psu";</div><div class='del'>-</div><div class='del'>-							led@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						multi-led@3 {</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							reg = &lt;3&gt;;</div><div class='del'>-							color = &lt;LED_COLOR_ID_MULTI&gt;;</div><div class='del'>-							function = LED_FUNCTION_ACTIVITY;</div><div class='del'>-							label = "smb";</div><div class='del'>-</div><div class='del'>-							led@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							led@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='del'>-								color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux51: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux52: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux53: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux54: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux55: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux25: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@72 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x72&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux56: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux57: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux58: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux59: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux60: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux61: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux62: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux63: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux26: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux64: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux65: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux66: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux67: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-					adm1278@10 {</div><div class='del'>-						compatible = "adi,adm1278";</div><div class='del'>-						reg = &lt;0x10&gt;;</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-						shunt-resistor-micro-ohms = &lt;250&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux68: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux69: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux70: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux71: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux27: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux72: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux73: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux74: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux75: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-					adm1278@10 {</div><div class='del'>-						compatible = "adi,adm1278";</div><div class='del'>-						reg = &lt;0x10&gt;;</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-						shunt-resistor-micro-ohms = &lt;250&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux76: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux77: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux78: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux79: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux28: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux29: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux30: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux31: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='add'>+&amp;fmc {</div><div class='add'>+	flash@0 {</div><div class='add'>+		/delete-node/partitions;</div><div class='add'>+#include "facebook-bmc-flash-layout-128.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;i2c11 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * PCA9548 (11-0077) provides 8 channels connecting to SMB (Switch</div><div class='del'>-	 * Main Board).</div><div class='del'>-	 */</div><div class='del'>-	i2c-mux@77 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x77&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux40: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux80: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux81: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux82: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux83: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux84: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux85: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux86: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux87: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux41: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux88: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux89: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux90: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux91: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux92: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux93: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux94: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux95: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux42: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux96: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux97: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux98: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux99: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux100: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux101: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux102: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux103: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux43: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux104: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux105: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux106: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux107: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux108: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux109: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux110: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux111: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux44: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux112: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux113: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux114: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux115: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux116: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux117: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux118: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux119: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux45: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux120: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux121: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux122: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux123: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux124: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux125: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux126: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux127: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux46: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux128: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux129: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux130: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux131: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux132: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux133: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux134: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux135: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux47: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-</div><div class='del'>-			i2c-mux@76 {</div><div class='del'>-				compatible = "nxp,pca9548";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0x76&gt;;</div><div class='del'>-				i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-				imux136: i2c@0 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux137: i2c@1 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux138: i2c@2 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux139: i2c@3 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux140: i2c@4 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux141: i2c@5 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux142: i2c@6 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				imux143: i2c@7 {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					reg = &lt;7&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ehci1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdio1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	ethphy3: ethernet-phy@13 {</div><div class='del'>-		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='del'>-		reg = &lt;0x0d&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mac3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	phy-mode = "rgmii";</div><div class='del'>-	phy-handle = &lt;&amp;ethphy3&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_rgmii4_default&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts<br/>index cf3f807a38fe..b733efe31e8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts</a></div><div class='hunk'>@@ -135,10 +135,6 @@</div><div class='ctx'> 	use-ncsi;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;rtc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;fmc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -187,11 +183,9 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	pwm@5e{</div><div class='del'>-		compatible = "max31790";</div><div class='add'>+	pwm@5e {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='ctx'> 		reg = &lt;0x5e&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-sensor@40 {</div><div class='hunk'>@@ -222,6 +216,25 @@</div><div class='ctx'> 		compatible = "ti,tmp75";</div><div class='ctx'> 		reg = &lt;0x4b&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio@12 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;116 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","fcb2-activate",</div><div class='add'>+		"","";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -242,11 +255,9 @@</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	pwm@5e{</div><div class='del'>-		compatible = "max31790";</div><div class='add'>+	pwm@5e {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='ctx'> 		reg = &lt;0x5e&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-sensor@40 {</div><div class='hunk'>@@ -277,6 +288,25 @@</div><div class='ctx'> 		compatible = "ti,tmp75";</div><div class='ctx'> 		reg = &lt;0x4b&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio@12 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;114 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","fcb1-activate",</div><div class='add'>+		"","";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c3 {</div><div class='hunk'>@@ -339,6 +369,12 @@</div><div class='ctx'> 		compatible = "infineon,xdp710";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	power-sensor@45 {</div><div class='add'>+		compatible = "ti,ina238";</div><div class='add'>+		reg = &lt;0x45&gt;;</div><div class='add'>+		shunt-resistor = &lt;500&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c5 {</div><div class='hunk'>@@ -358,11 +394,22 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@45 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x45&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> 		imux23: i2c@1 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@45 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x45&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -397,12 +444,6 @@</div><div class='ctx'> 		reg = &lt;0x31&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-line-names =</div><div class='del'>-		"","","","",</div><div class='del'>-		"","","presence-cmm","",</div><div class='del'>-		"","","","",</div><div class='del'>-		"","","","";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// PTTV FRU</div><div class='hunk'>@@ -415,6 +456,25 @@</div><div class='ctx'> &amp;i2c11 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	gpio@13 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x13&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;222 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","health-mmc",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio@30 {</div><div class='ctx'> 		compatible = "nxp,pca9555";</div><div class='ctx'> 		reg = &lt;0x30&gt;;</div><div class='hunk'>@@ -426,12 +486,6 @@</div><div class='ctx'> 		reg = &lt;0x31&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-line-names =</div><div class='del'>-		"","","","",</div><div class='del'>-		"","","presence-cmm","",</div><div class='del'>-		"","","","",</div><div class='del'>-		"","","","";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	// Aegis FRU</div><div class='hunk'>@@ -462,6 +516,10 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			power-sensor@20 {</div><div class='add'>+				compatible = "mps,mp5990";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+			};</div><div class='ctx'> 			power-monitor@61 {</div><div class='ctx'> 				compatible = "isil,isl69260";</div><div class='ctx'> 				reg = &lt;0x61&gt;;</div><div class='hunk'>@@ -496,6 +554,19 @@</div><div class='ctx'> 				compatible = "atmel,24c64";</div><div class='ctx'> 				reg = &lt;0x54&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			adc@1d {</div><div class='add'>+				compatible = "ti,adc128d818";</div><div class='add'>+				reg = &lt;0x1d&gt;;</div><div class='add'>+				ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc@1f {</div><div class='add'>+				compatible = "ti,adc128d818";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+				ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> 		imux30: i2c@2 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -506,6 +577,11 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			rtc@51 {</div><div class='add'>+				compatible = "nxp,pcf8563";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -565,7 +641,7 @@</div><div class='ctx'> 	/*B0-B7*/	"","","","",</div><div class='ctx'> 			"bmc-spi-mux-select-0","led-identify","","",</div><div class='ctx'> 	/*C0-C7*/	"reset-cause-platrst","","","","",</div><div class='del'>-			"cpu0-err-alert","","",</div><div class='add'>+			"power-hsc-good","power-chassis-good","",</div><div class='ctx'> 	/*D0-D7*/	"","","sol-uart-select","","","","","",</div><div class='ctx'> 	/*E0-E7*/	"","","","","","","","",</div><div class='ctx'> 	/*F0-F7*/	"","","","","","","","",</div><div class='hunk'>@@ -584,14 +660,16 @@</div><div class='ctx'> 	/*O0-O7*/	"","","","","","","","",</div><div class='ctx'> 	/*P0-P7*/	"power-button","power-host-control",</div><div class='ctx'> 			"reset-button","","led-power","","","",</div><div class='del'>-	/*Q0-Q7*/	"","","","","","power-chassis-control","","",</div><div class='add'>+	/*Q0-Q7*/</div><div class='add'>+			"","","","",</div><div class='add'>+			"","power-chassis-control","","uart-switch-button",</div><div class='ctx'> 	/*R0-R7*/	"","","","","","","","",</div><div class='ctx'> 	/*S0-S7*/	"","","","","","","","",</div><div class='ctx'> 	/*T0-T7*/	"","","","","","","","",</div><div class='ctx'> 	/*U0-U7*/	"","","","","","","led-identify-gate","",</div><div class='ctx'> 	/*V0-V7*/	"","","","",</div><div class='del'>-			"rtc-battery-voltage-read-enable","",</div><div class='del'>-			"power-chassis-good","",</div><div class='add'>+			"","",</div><div class='add'>+			"","",</div><div class='ctx'> 	/*W0-W7*/	"","","","","","","","",</div><div class='ctx'> 	/*X0-X7*/	"","","","","","","","",</div><div class='ctx'> 	/*Y0-Y7*/	"","","","","","","","",</div><div class='hunk'>@@ -620,14 +698,14 @@</div><div class='ctx'> 	"","",</div><div class='ctx'> 	/*A4-A7 line 8-15*/</div><div class='ctx'> 	"","power-config-asic-module-enable",</div><div class='del'>-	"","power-config-asic-power-good",</div><div class='del'>-	"","power-config-pdb-power-good",</div><div class='add'>+	"power-p3v3-standby","power-config-asic-power-good",</div><div class='add'>+	"power-p1v8-good","power-config-pdb-power-good",</div><div class='ctx'> 	"presence-cpu","smi-control-n",</div><div class='ctx'> 	/*B0-B3 line 16-23*/</div><div class='ctx'> 	"","nmi-control-n",</div><div class='del'>-	"","nmi-control-sync-flood-n",</div><div class='del'>-	"","",</div><div class='add'>+	"power-pvdd33-s5","nmi-control-sync-flood-n",</div><div class='ctx'> 	"","",</div><div class='add'>+	"power-pvdd18-s5","",</div><div class='ctx'> 	/*B4-B7 line 24-31*/</div><div class='ctx'> 	"","FM_CPU_SP5R1",</div><div class='ctx'> 	"reset-cause-rsmrst","FM_CPU_SP5R2",</div><div class='hunk'>@@ -671,11 +749,11 @@</div><div class='ctx'> 	/*F4-F7 line 88-95*/</div><div class='ctx'> 	"presence-asic-modules-0","rt-cpu0-p1-force-enable",</div><div class='ctx'> 	"presence-asic-modules-1","bios-debug-msg-disable",</div><div class='del'>-	"","uart-control-buffer-select",</div><div class='del'>-	"","ac-control-n",</div><div class='add'>+	"power-asic-good","uart-control-buffer-select",</div><div class='add'>+	"presence-cmm","ac-control-n",</div><div class='ctx'> 	/*G0-G3 line 96-103*/</div><div class='ctx'> 	"FM_CPU_CORETYPE2","",</div><div class='del'>-	"FM_CPU_CORETYPE1","",</div><div class='add'>+	"FM_CPU_CORETYPE1","rtc-battery-voltage-read-enable",</div><div class='ctx'> 	"FM_CPU_CORETYPE0","",</div><div class='ctx'> 	"FM_BOARD_REV_ID5","",</div><div class='ctx'> 	/*G4-G7 line 104-111*/</div><div class='hunk'>@@ -684,7 +762,7 @@</div><div class='ctx'> 	"FM_BOARD_REV_ID2","",</div><div class='ctx'> 	"FM_BOARD_REV_ID1","",</div><div class='ctx'> 	/*H0-H3 line 112-119*/</div><div class='del'>-	"FM_BOARD_REV_ID0","",</div><div class='add'>+	"FM_BOARD_REV_ID0","reset-control-cmos-clear",</div><div class='ctx'> 	"","","","","","",</div><div class='ctx'> 	/*H4-H7 line 120-127*/</div><div class='ctx'> 	"","",</div><div class='hunk'>@@ -699,7 +777,7 @@</div><div class='ctx'> 	/*I4-I7 line 136-143*/</div><div class='ctx'> 	"","","","","","","","",</div><div class='ctx'> 	/*J0-J3 line 144-151*/</div><div class='del'>-	"","","","","","","","",</div><div class='add'>+	"","","power-card-enable","","","","","",</div><div class='ctx'> 	/*J4-J7 line 152-159*/</div><div class='ctx'> 	"SLOT_ID_BCB_0","",</div><div class='ctx'> 	"SLOT_ID_BCB_1","",</div><div class='hunk'>@@ -715,9 +793,15 @@</div><div class='ctx'> 	"cpu0-thermtrip-alert","",</div><div class='ctx'> 	"reset-cause-pcie","",</div><div class='ctx'> 	/*L4-L7 line 184-191*/</div><div class='del'>-	"pvdd11-ocp-alert","","","","","","","",</div><div class='add'>+	"pvdd11-ocp-alert","",</div><div class='add'>+	"power-fault-n","",</div><div class='add'>+	"asic0-card-type-detection0-n","",</div><div class='add'>+	"asic0-card-type-detection1-n","",</div><div class='ctx'> 	/*M0-M3 line 192-199*/</div><div class='del'>-	"","","","","","","","",</div><div class='add'>+	"asic0-card-type-detection2-n","",</div><div class='add'>+	"uart-switch-lsb","",</div><div class='add'>+	"uart-switch-msb","",</div><div class='add'>+	"power-12v-memory-good","",</div><div class='ctx'> 	/*M4-M7 line 200-207*/</div><div class='ctx'> 	"","","","","","","","",</div><div class='ctx'> 	/*N0-N3 line 208-215*/</div><div class='hunk'>@@ -725,7 +809,10 @@</div><div class='ctx'> 	/*N4-N7 line 216-223*/</div><div class='ctx'> 	"","","","","","","","",</div><div class='ctx'> 	/*O0-O3 line 224-231*/</div><div class='del'>-	"","","","","","","","",</div><div class='add'>+	"","",</div><div class='add'>+	"irq-pvddcore0-ocp-alert","",</div><div class='add'>+	"irq-pvddcore1-ocp-alert","",</div><div class='add'>+	"","",</div><div class='ctx'> 	/*O4-O7 line 232-239*/</div><div class='ctx'> 	"","","","","","","","",</div><div class='ctx'> 	/*P0-P3 line 240-247*/</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts<br/>index 41e2246cfbd1..eb8d4b95596c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts</a></div><div class='hunk'>@@ -23,6 +23,32 @@</div><div class='ctx'> 		i2c19 = &amp;imux19;</div><div class='ctx'> 		i2c20 = &amp;imux20;</div><div class='ctx'> 		i2c21 = &amp;imux21;</div><div class='add'>+		i2c22 = &amp;imux22;</div><div class='add'>+		i2c23 = &amp;imux23;</div><div class='add'>+		i2c24 = &amp;imux24;</div><div class='add'>+		i2c25 = &amp;imux25;</div><div class='add'>+		i2c26 = &amp;imux26;</div><div class='add'>+		i2c27 = &amp;imux27;</div><div class='add'>+		i2c28 = &amp;imux28;</div><div class='add'>+		i2c29 = &amp;imux29;</div><div class='add'>+		i2c30 = &amp;imux30;</div><div class='add'>+		i2c31 = &amp;imux31;</div><div class='add'>+		i2c32 = &amp;imux32;</div><div class='add'>+		i2c33 = &amp;imux33;</div><div class='add'>+		i2c34 = &amp;imux34;</div><div class='add'>+		i2c35 = &amp;imux35;</div><div class='add'>+		i2c36 = &amp;imux36;</div><div class='add'>+		i2c37 = &amp;imux37;</div><div class='add'>+		i2c38 = &amp;imux38;</div><div class='add'>+		i2c39 = &amp;imux39;</div><div class='add'>+		i2c40 = &amp;imux40;</div><div class='add'>+		i2c41 = &amp;imux41;</div><div class='add'>+		i2c42 = &amp;imux42;</div><div class='add'>+		i2c43 = &amp;imux43;</div><div class='add'>+		i2c44 = &amp;imux44;</div><div class='add'>+		i2c45 = &amp;imux45;</div><div class='add'>+		i2c46 = &amp;imux46;</div><div class='add'>+		i2c47 = &amp;imux47;</div><div class='ctx'> </div><div class='ctx'> 		spi1 = &amp;spi_gpio;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -75,6 +101,11 @@</div><div class='ctx'> 			gpios = &lt;&amp;leds_gpio 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			label = "bmc_ready_noled";</div><div class='add'>+			gpios = &lt;&amp;sgpiom0 141 (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	spi_gpio: spi {</div><div class='hunk'>@@ -182,6 +213,63 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio@11 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;238 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"PWRGD_P24V_SMPWROK", "P1V5_PWROK",</div><div class='add'>+		"P3V3_PWROK", "P5V_PWROK",</div><div class='add'>+		"P12V_SCM_PWROK", "P12V_PWROK",</div><div class='add'>+		"P24V_PWROK", "P48V_HSC_PWROK",</div><div class='add'>+		"ERR_GPIO_IRQ", "TMP75_ALERT_N",</div><div class='add'>+		"BMC_PWROK", "P12V_INA230_ALERT_N",</div><div class='add'>+		"P24V_INA230_ALERT_N","",</div><div class='add'>+		"P48V_HSC_ALERT_N", "P1V05_PWROK";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@12 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;240 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"P1V05_PWR_FAIL", "P1V5_PWR_FAIL",</div><div class='add'>+		"P24V_PWR_FAIL", "P24V_SM_PWR_FAIL",</div><div class='add'>+		"IRQ_NW0/1/2_N", "IRQ_NW3/4/5_N",</div><div class='add'>+		"RTC_INT_N_R", "ERR_GPIO_IRQ",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@13 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x13&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;242 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+		"", "",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "",</div><div class='add'>+		"RACKMON_A_1", "RACKMON_A_2",</div><div class='add'>+		"RACKMON_B_1", "RACKMON_B_2",</div><div class='add'>+		"", "",</div><div class='add'>+		"", "";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -213,21 +301,20 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='del'>-		imux16: i2c@0 {</div><div class='add'>+		// FCB 1</div><div class='add'>+		imux16: i2c@1 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c128";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -258,23 +345,97 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		imux17: i2c@1 {</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;218 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN1_PWRGD_R", "P48V_FAN2_PWRGD_R",</div><div class='add'>+				"P48V_FAN3_PWRGD_R", "P48V_FAN4_PWRGD_R",</div><div class='add'>+				"FCB_1_P48V_ZONE0_PWRGD_R", "FCB_1_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_1_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;218 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN1_ALERT_N", "INA238_FAN2_ALERT_N",</div><div class='add'>+				"INA238_FAN3_ALERT_N", "INA238_FAN4_ALERT_N",</div><div class='add'>+				"FCB_1_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN1_PRSNT", "FAN2_PRSNT",</div><div class='add'>+				"FAN3_PRSNT", "FAN4_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;218 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN1_IL_TACH_ALERT", "FAN1_OL_TACH_ALERT",</div><div class='add'>+				"FAN2_IL_TACH_ALERT", "FAN2_OL_TACH_ALERT",</div><div class='add'>+				"FAN3_IL_TACH_ALERT", "FAN3_OL_TACH_ALERT",</div><div class='add'>+				"FAN4_IL_TACH_ALERT", "FAN4_IL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;218 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_1_P1V0_POWER_FAIL", "FCB_1_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_1_P48V_ZONE0_POWER_FAIL", "FAN1_POWER_FAIL",</div><div class='add'>+				"FAN2_POWER_FAIL", "FAN3_POWER_FAIL",</div><div class='add'>+				"FAN4_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		// FCB 2</div><div class='add'>+		imux17: i2c@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c128";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -305,23 +466,97 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		imux18: i2c@2 {</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;220 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN5_PWRGD_R", "P48V_FAN6_PWRGD_R",</div><div class='add'>+				"P48V_FAN7_PWRGD_R", "P48V_FAN8_PWRGD_R",</div><div class='add'>+				"FCB_2_P48V_ZONE0_PWRGD_R", "FCB_2_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_2_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;220 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN5_ALERT_N", "INA238_FAN6_ALERT_N",</div><div class='add'>+				"INA238_FAN7_ALERT_N", "INA238_FAN8_ALERT_N",</div><div class='add'>+				"FCB_2_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN5_PRSNT", "FAN6_PRSNT",</div><div class='add'>+				"FAN7_PRSNT", "FAN8_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;220 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN5_IL_TACH_ALERT", "FAN5_OL_TACH_ALERT",</div><div class='add'>+				"FAN6_IL_TACH_ALERT", "FAN6_OL_TACH_ALERT",</div><div class='add'>+				"FAN7_IL_TACH_ALERT", "FAN7_OL_TACH_ALERT",</div><div class='add'>+				"FAN8_IL_TACH_ALERT", "FAN8_IL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;220 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_2_P1V0_POWER_FAIL", "FCB_2_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_2_P48V_ZONE0_POWER_FAIL", "FAN5_POWER_FAIL",</div><div class='add'>+				"FAN6_POWER_FAIL", "FAN7_POWER_FAIL",</div><div class='add'>+				"FAN8_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		// FCB 3</div><div class='add'>+		imux18: i2c@3 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c128";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -352,23 +587,97 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		imux19: i2c@3 {</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;230 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN9_PWRGD_R", "P48V_FAN10_PWRGD_R",</div><div class='add'>+				"P48V_FAN11_PWRGD_R", "P48V_FAN12_PWRGD_R",</div><div class='add'>+				"FCB_3_P48V_ZONE0_PWRGD_R", "FCB_3_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_3_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;230 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN9_ALERT_N", "INA238_FAN10_ALERT_N",</div><div class='add'>+				"INA238_FAN11_ALERT_N", "INA238_FAN12_ALERT_N",</div><div class='add'>+				"FCB_3_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN9_PRSNT", "FAN10_PRSNT",</div><div class='add'>+				"FAN11_PRSNT", "FAN12_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;230 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN9_IL_TACH_ALERT", "FAN9_OL_TACH_ALERT",</div><div class='add'>+				"FAN10_IL_TACH_ALERT", "FAN10_OL_TACH_ALERT",</div><div class='add'>+				"FAN11_IL_TACH_ALERT", "FAN11_OL_TACH_ALERT",</div><div class='add'>+				"FAN12_IL_TACH_ALERT", "FAN12_IL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;230 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_3_P1V0_POWER_FAIL", "FCB_3_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_3_P48V_ZONE0_POWER_FAIL", "FAN9_POWER_FAIL",</div><div class='add'>+				"FAN10_POWER_FAIL", "FAN11_POWER_FAIL",</div><div class='add'>+				"FAN12_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		// FCB 4</div><div class='add'>+		imux19: i2c@2 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c128";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -399,9 +708,85 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		imux20: i2c@5 {</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;232 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN13_PWRGD_R", "P48V_FAN14_PWRGD_R",</div><div class='add'>+				"P48V_FAN15_PWRGD_R", "P48V_FAN16_PWRGD_R",</div><div class='add'>+				"FCB_4_P48V_ZONE0_PWRGD_R", "FCB_4_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_4_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;232 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN13_ALERT_N", "INA238_FAN14_ALERT_N",</div><div class='add'>+				"INA238_FAN15_ALERT_N", "INA238_FAN16_ALERT_N",</div><div class='add'>+				"FCB_4_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN13_PRSNT", "FAN14_PRSNT",</div><div class='add'>+				"FAN15_PRSNT", "FAN16_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;232 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN13_IL_TACH_ALERT", "FAN13_OL_TACH_ALERT",</div><div class='add'>+				"FAN14_IL_TACH_ALERT", "FAN14_OL_TACH_ALERT",</div><div class='add'>+				"FAN15_IL_TACH_ALERT", "FAN15_OL_TACH_ALERT",</div><div class='add'>+				"FAN16_IL_TACH_ALERT", "FAN16_IL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;232 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_4_P1V0_POWER_FAIL", "FCB_4_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_4_P48V_ZONE0_POWER_FAIL", "FAN13_POWER_FAIL",</div><div class='add'>+				"FAN14_POWER_FAIL", "FAN15_POWER_FAIL",</div><div class='add'>+				"FAN16_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		// FCB 5</div><div class='add'>+		imux20: i2c@4 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;4&gt;;</div><div class='hunk'>@@ -411,11 +796,9 @@</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -445,9 +828,85 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		imux21: i2c@4 {</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;254 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN20_PWRGD_R", "P48V_FAN19_PWRGD_R",</div><div class='add'>+				"P48V_FAN18_PWRGD_R", "P48V_FAN17_PWRGD_R",</div><div class='add'>+				"FCB_5_P48V_ZONE0_PWRGD_R", "FCB_5_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_5_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;254 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN20_ALERT_N", "INA238_FAN19_ALERT_N",</div><div class='add'>+				"INA238_FAN18_ALERT_N", "INA238_FAN17_ALERT_N",</div><div class='add'>+				"FCB_5_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN20_PRSNT", "FAN19_PRSNT",</div><div class='add'>+				"FAN18_PRSNT", "FAN17_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;254 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN20_IL_TACH_ALERT", "FAN20_OL_TACH_ALERT",</div><div class='add'>+				"FAN19_IL_TACH_ALERT", "FAN19_OL_TACH_ALERT",</div><div class='add'>+				"FAN18_IL_TACH_ALERT", "FAN18_OL_TACH_ALERT",</div><div class='add'>+				"FAN17_IL_TACH_ALERT", "FAN17_OL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;254 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_5_P1V0_POWER_FAIL", "FCB_5_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_5_P48V_ZONE0_POWER_FAIL", "FAN20_POWER_FAIL",</div><div class='add'>+				"FAN19_POWER_FAIL", "FAN18_POWER_FAIL",</div><div class='add'>+				"FAN17_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		// FCB 6</div><div class='add'>+		imux21: i2c@5 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;5&gt;;</div><div class='hunk'>@@ -457,11 +916,9 @@</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@5e{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@5e {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x5e&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			power-sensor@40 {</div><div class='hunk'>@@ -491,24 +948,316 @@</div><div class='ctx'> 				compatible = "ti,tmp75";</div><div class='ctx'> 				reg = &lt;0x4b&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			gpio@11 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;252 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"P48V_FAN24_PWRGD_R", "P48V_FAN23_PWRGD_R",</div><div class='add'>+				"P48V_FAN22_PWRGD_R", "P48V_FAN21_PWRGD_R",</div><div class='add'>+				"FCB_6_P48V_ZONE0_PWRGD_R", "FCB_6_P48V_ZONE1_PWRGD_R",</div><div class='add'>+				"FCB_6_PWRGD_P3V3_R", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@12 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;252 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"INA238_FAN24_ALERT_N", "INA238_FAN23_ALERT_N",</div><div class='add'>+				"INA238_FAN22_ALERT_N", "INA238_FAN21_ALERT_N",</div><div class='add'>+				"FCB_6_TMP75_ALERT_N", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"FAN24_PRSNT", "FAN23_PRSNT",</div><div class='add'>+				"FAN22_PRSNT", "FAN21_PRSNT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@13 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;252 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FAN24_IL_TACH_ALERT", "FAN24_OL_TACH_ALERT",</div><div class='add'>+				"FAN23_IL_TACH_ALERT", "FAN23_OL_TACH_ALERT",</div><div class='add'>+				"FAN22_IL_TACH_ALERT", "FAN22_OL_TACH_ALERT",</div><div class='add'>+				"FAN21_IL_TACH_ALERT", "FAN21_OL_TACH_ALERT",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@17 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+				interrupts = &lt;252 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				"FCB_6_P1V0_POWER_FAIL", "FCB_6_P1V8_POWER_FAIL",</div><div class='add'>+				"FCB_6_P48V_ZONE0_POWER_FAIL", "FAN24_POWER_FAIL",</div><div class='add'>+				"FAN23_POWER_FAIL", "FAN22_POWER_FAIL",</div><div class='add'>+				"FAN21_POWER_FAIL", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux22: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux23: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux24: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux25: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux26: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux27: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux28: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux29: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux30: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux31: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c5 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux32: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux33: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux34: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux35: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux36: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux37: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux38: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux39: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c7 {</div><div class='hunk'>@@ -531,14 +1280,111 @@</div><div class='ctx'> 		compatible = "nxp,pcf8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1339";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c12 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux40: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux41: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux42: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux43: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c13 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imux44: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux45: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux46: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux47: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c14 {</div><div class='hunk'>@@ -627,7 +1473,6 @@</div><div class='ctx'> 	gpio-line-names =</div><div class='ctx'> 	/*"input pin","output pin"*/</div><div class='ctx'> 	/*A0 - A7*/</div><div class='del'>-	"PRSNT_MTIA_BLADE0_N","PWREN_MTIA_BLADE0_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE1_N","PWREN_MTIA_BLADE1_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE2_N","PWREN_MTIA_BLADE2_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE3_N","PWREN_MTIA_BLADE3_EN_N",</div><div class='hunk'>@@ -635,8 +1480,8 @@</div><div class='ctx'> 	"PRSNT_MTIA_BLADE5_N","PWREN_MTIA_BLADE5_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE6_N","PWREN_MTIA_BLADE6_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE7_N","PWREN_MTIA_BLADE7_EN_N",</div><div class='del'>-	/*B0 - B7*/</div><div class='ctx'> 	"PRSNT_MTIA_BLADE8_N","PWREN_MTIA_BLADE8_EN_N",</div><div class='add'>+	/*B0 - B7*/</div><div class='ctx'> 	"PRSNT_MTIA_BLADE9_N","PWREN_MTIA_BLADE9_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE10_N","PWREN_MTIA_BLADE10_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE11_N","PWREN_MTIA_BLADE11_EN_N",</div><div class='hunk'>@@ -644,80 +1489,80 @@</div><div class='ctx'> 	"PRSNT_MTIA_BLADE13_N","PWREN_MTIA_BLADE13_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE14_N","PWREN_MTIA_BLADE14_EN_N",</div><div class='ctx'> 	"PRSNT_MTIA_BLADE15_N","PWREN_MTIA_BLADE15_EN_N",</div><div class='add'>+	"PRSNT_MTIA_BLADE16_N","PWREN_MTIA_BLADE16_EN_N",</div><div class='ctx'> 	/*C0 - C7*/</div><div class='del'>-	"PRSNT_NW_BLADE0_N","PWREN_NW_BLADE0_EN_N",</div><div class='ctx'> 	"PRSNT_NW_BLADE1_N","PWREN_NW_BLADE1_EN_N",</div><div class='ctx'> 	"PRSNT_NW_BLADE2_N","PWREN_NW_BLADE2_EN_N",</div><div class='ctx'> 	"PRSNT_NW_BLADE3_N","PWREN_NW_BLADE3_EN_N",</div><div class='ctx'> 	"PRSNT_NW_BLADE4_N","PWREN_NW_BLADE4_EN_N",</div><div class='ctx'> 	"PRSNT_NW_BLADE5_N","PWREN_NW_BLADE5_EN_N",</div><div class='del'>-	"PRSNT_FCB_TOP_0_N","PWREN_MTIA_BLADE0_HSC_EN_N",</div><div class='del'>-	"PRSNT_FCB_TOP_1_N","PWREN_MTIA_BLADE1_HSC_EN_N",</div><div class='add'>+	"PRSNT_NW_BLADE6_N","PWREN_NW_BLADE6_EN_N",</div><div class='add'>+	"PRSNT_FCB_1_N","PWREN_MTIA_BLADE1_HSC_EN_N",</div><div class='add'>+	"PRSNT_FCB_2_N","PWREN_MTIA_BLADE2_HSC_EN_N",</div><div class='ctx'> 	/*D0 - D7*/</div><div class='del'>-	"PRSNT_FCB_MIDDLE_0_N","PWREN_MTIA_BLADE2_HSC_EN_N",</div><div class='del'>-	"PRSNT_FCB_MIDDLE_1_N","PWREN_MTIA_BLADE3_HSC_EN_N",</div><div class='del'>-	"PRSNT_FCB_BOTTOM_1_N","PWREN_MTIA_BLADE4_HSC_EN_N",</div><div class='del'>-	"PRSNT_FCB_BOTTOM_0_N","PWREN_MTIA_BLADE5_HSC_EN_N",</div><div class='del'>-	"PWRGD_MTIA_BLADE0_PWROK_N","PWREN_MTIA_BLADE6_HSC_EN_N",</div><div class='add'>+	"PRSNT_FCB_3_N","PWREN_MTIA_BLADE3_HSC_EN_N",</div><div class='add'>+	"PRSNT_FCB_4_N","PWREN_MTIA_BLADE4_HSC_EN_N",</div><div class='add'>+	"PRSNT_FCB_6_N","PWREN_MTIA_BLADE5_HSC_EN_N",</div><div class='add'>+	"PRSNT_FCB_5_N","PWREN_MTIA_BLADE6_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE1_PWROK_N","PWREN_MTIA_BLADE7_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE2_PWROK_N","PWREN_MTIA_BLADE8_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE3_PWROK_N","PWREN_MTIA_BLADE9_HSC_EN_N",</div><div class='del'>-	/*E0 - E7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE4_PWROK_N","PWREN_MTIA_BLADE10_HSC_EN_N",</div><div class='add'>+	/*E0 - E7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE5_PWROK_N","PWREN_MTIA_BLADE11_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE6_PWROK_N","PWREN_MTIA_BLADE12_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE7_PWROK_N","PWREN_MTIA_BLADE13_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE8_PWROK_N","PWREN_MTIA_BLADE14_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE9_PWROK_N","PWREN_MTIA_BLADE15_HSC_EN_N",</div><div class='del'>-	"PWRGD_MTIA_BLADE10_PWROK_N","PWREN_NW_BLADE0_HSC_EN_N",</div><div class='add'>+	"PWRGD_MTIA_BLADE10_PWROK_N","PWREN_MTIA_BLADE16_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE11_PWROK_N","PWREN_NW_BLADE1_HSC_EN_N",</div><div class='del'>-	/*F0 - F7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE12_PWROK_N","PWREN_NW_BLADE2_HSC_EN_N",</div><div class='add'>+	/*F0 - F7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE13_PWROK_N","PWREN_NW_BLADE3_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE14_PWROK_N","PWREN_NW_BLADE4_HSC_EN_N",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE15_PWROK_N","PWREN_NW_BLADE5_HSC_EN_N",</div><div class='del'>-	"PWRGD_NW_BLADE0_PWROK_N","PWREN_FCB_TOP_0_EN_N",</div><div class='del'>-	"PWRGD_NW_BLADE1_PWROK_N","PWREN_FCB_TOP_1_EN_N",</div><div class='del'>-	"PWRGD_NW_BLADE2_PWROK_N","PWREN_FCB_MIDDLE_0_EN_N",</div><div class='del'>-	"PWRGD_NW_BLADE3_PWROK_N","PWREN_FCB_MIDDLE_1_EN_N",</div><div class='add'>+	"PWRGD_MTIA_BLADE16_PWROK_N","PWREN_NW_BLADE6_HSC_EN_N",</div><div class='add'>+	"PWRGD_NW_BLADE1_PWROK_N","PWREN_SGPIO_FCB_2_EN_N",</div><div class='add'>+	"PWRGD_NW_BLADE2_PWROK_N","PWREN_SGPIO_FCB_1_EN_N",</div><div class='add'>+	"PWRGD_NW_BLADE3_PWROK_N","PWREN_SGPIO_FCB_4_EN_N",</div><div class='add'>+	"PWRGD_NW_BLADE4_PWROK_N","PWREN_SGPIO_FCB_3_EN_N",</div><div class='ctx'> 	/*G0 - G7*/</div><div class='del'>-	"PWRGD_NW_BLADE4_PWROK_N","PWREN_FCB_BOTTOM_1_EN_N",</div><div class='del'>-	"PWRGD_NW_BLADE5_PWROK_N","PWREN_FCB_BOTTOM_0_EN_N",</div><div class='del'>-	"PWRGD_FCB_TOP_0_PWROK_N","FM_CMM_AC_CYCLE_N",</div><div class='del'>-	"PWRGD_FCB_TOP_1_PWROK_N","MGMT_SFP_TX_DIS",</div><div class='del'>-	"PWRGD_FCB_MIDDLE_0_PWROK_N","FM_MDIO_SW_SEL",</div><div class='del'>-	"PWRGD_FCB_MIDDLE_1_PWROK_N","FM_P24V_SMPWR_EN",</div><div class='del'>-	"PWRGD_FCB_BOTTOM_1_PWROK_N","",</div><div class='del'>-	"PWRGD_FCB_BOTTOM_0_PWROK_N","",</div><div class='add'>+	"PWRGD_NW_BLADE5_PWROK_N","PWREN_SGPIO_FCB_5_EN_N",</div><div class='add'>+	"PWRGD_NW_BLADE6_PWROK_N","PWREN_SGPIO_FCB_6_EN_N",</div><div class='add'>+	"PWRGD_FCB_1","FM_BMC_RST_RTCRST_R",</div><div class='add'>+	"PWRGD_FCB_2","",</div><div class='add'>+	"PWRGD_FCB_3","FM_MDIO_SW_SEL",</div><div class='add'>+	"PWRGD_FCB_4","FM_P24V_SMPWR_EN",</div><div class='add'>+	"PWRGD_FCB_6","",</div><div class='add'>+	"PWRGD_FCB_5","",</div><div class='ctx'> 	/*H0 - H7*/</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE0_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE1_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE2_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE3_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE4_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE5_N","",</div><div class='ctx'> 	"LEAK_DETECT_MTIA_BLADE6_N","",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE7_N","",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE7_N","ERR_INJECT_CMM_PWR_FAIL_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE8_N","",</div><div class='ctx'> 	/*I0 - I7*/</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE8_N","RST_I2CRST_FCB_BOTTOM_1_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE9_N","RST_I2CRST_FCB_BOTTOM_0_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE10_N","RST_I2CRST_FCB_MIDDLE_0_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE11_N","RST_I2CRST_FCB_MIDDLE_1_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE12_N","RST_I2CRST_FCB_TOP_0_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE13_N","RST_I2CRST_FCB_TOP_1_N",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE14_N","BMC_READY",</div><div class='del'>-	"LEAK_DETECT_MTIA_BLADE15_N","FM_88E6393X_BIN_UPDATE_EN_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE9_N","RST_I2CRST_FCB_5_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE10_N","RST_I2CRST_FCB_6_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE11_N","RST_I2CRST_FCB_4_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE12_N","RST_I2CRST_FCB_3_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE13_N","RST_I2CRST_FCB_2_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE14_N","RST_I2CRST_FCB_1_N",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE15_N","BMC_READY",</div><div class='add'>+	"LEAK_DETECT_MTIA_BLADE16_N","FM_88E6393X_BIN_UPDATE_EN_N",</div><div class='ctx'> 	/*J0 - J7*/</div><div class='del'>-	"LEAK_DETECT_NW_BLADE0_N","WATER_VALVE_CLOSED_N",</div><div class='del'>-	"LEAK_DETECT_NW_BLADE1_N","",</div><div class='add'>+	"LEAK_DETECT_NW_BLADE1_N","WATER_VALVE_CLOSED_N",</div><div class='ctx'> 	"LEAK_DETECT_NW_BLADE2_N","",</div><div class='ctx'> 	"LEAK_DETECT_NW_BLADE3_N","",</div><div class='ctx'> 	"LEAK_DETECT_NW_BLADE4_N","",</div><div class='ctx'> 	"LEAK_DETECT_NW_BLADE5_N","",</div><div class='del'>-	"PWRGD_MTIA_BLADE0_HSC_PWROK_N","",</div><div class='add'>+	"LEAK_DETECT_NW_BLADE6_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE1_HSC_PWROK_N","",</div><div class='del'>-	/*K0 - K7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE2_HSC_PWROK_N","",</div><div class='add'>+	/*K0 - K7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE3_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE4_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE5_HSC_PWROK_N","",</div><div class='hunk'>@@ -725,49 +1570,50 @@</div><div class='ctx'> 	"PWRGD_MTIA_BLADE7_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE8_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE9_HSC_PWROK_N","",</div><div class='del'>-	/*L0 - L7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE10_HSC_PWROK_N","",</div><div class='add'>+	/*L0 - L7*/</div><div class='ctx'> 	"PWRGD_MTIA_BLADE11_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE12_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE13_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE14_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_MTIA_BLADE15_HSC_PWROK_N","",</div><div class='del'>-	"PWRGD_NW_BLADE0_HSC_PWROK_N","",</div><div class='add'>+	"PWRGD_MTIA_BLADE16_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_NW_BLADE1_HSC_PWROK_N","",</div><div class='del'>-	/*M0 - M7*/</div><div class='ctx'> 	"PWRGD_NW_BLADE2_HSC_PWROK_N","",</div><div class='add'>+	/*M0 - M7*/</div><div class='ctx'> 	"PWRGD_NW_BLADE3_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_NW_BLADE4_HSC_PWROK_N","",</div><div class='ctx'> 	"PWRGD_NW_BLADE5_HSC_PWROK_N","",</div><div class='add'>+	"PWRGD_NW_BLADE6_HSC_PWROK_N","",</div><div class='ctx'> 	"RPU_READY","",</div><div class='ctx'> 	"IT_GEAR_RPU_LINK_N","",</div><div class='ctx'> 	"IT_GEAR_LEAK","",</div><div class='ctx'> 	"WATER_VALVE_CLOSED_N","",</div><div class='ctx'> 	/*N0 - N7*/</div><div class='del'>-	"VALVE_STS0","",</div><div class='del'>-	"VALVE_STS1","",</div><div class='del'>-	"PCA9555_IRQ0_N","",</div><div class='add'>+	"VALVE_STATUS_0","",</div><div class='add'>+	"VALVE_STATUS_1","",</div><div class='ctx'> 	"PCA9555_IRQ1_N","",</div><div class='add'>+	"PCA9555_IRQ2_N","",</div><div class='ctx'> 	"CR_TOGGLE_BOOT_N","",</div><div class='del'>-	"IRQ_FCB_TOP0_N","",</div><div class='del'>-	"IRQ_FCB_TOP1_N","",</div><div class='add'>+	"IRQ_FCB_1_N","",</div><div class='add'>+	"IRQ_FCB_2_N","",</div><div class='ctx'> 	"CMM_CABLE_CARTRIDGE_PRSNT_BOT_N","",</div><div class='ctx'> 	/*O0 - O7*/</div><div class='ctx'> 	"CMM_CABLE_CARTRIDGE_PRSNT_TOP_N","",</div><div class='ctx'> 	"BOT_BCB_CABLE_PRSNT_N","",</div><div class='ctx'> 	"TOP_BCB_CABLE_PRSNT_N","",</div><div class='del'>-	"IRQ_FCB_MID0_N","",</div><div class='del'>-	"IRQ_FCB_MID1_N","",</div><div class='add'>+	"IRQ_FCB_3_N","",</div><div class='add'>+	"IRQ_FCB_4_N","",</div><div class='ctx'> 	"CHASSIS_LEAK0_DETECT_N","",</div><div class='ctx'> 	"CHASSIS_LEAK1_DETECT_N","",</div><div class='del'>-	"VALVE_RMON_A_1","",</div><div class='add'>+	"PCA9555_IRQ3_N","",</div><div class='ctx'> 	/*P0 - P7*/</div><div class='del'>-	"VALVE_RMON_A_2","",</div><div class='del'>-	"VALVE_RMON_B_1","",</div><div class='del'>-	"VALVE_RMON_B_2","",</div><div class='add'>+	"PCA9555_IRQ4_N","",</div><div class='add'>+	"PCA9555_IRQ5_N","",</div><div class='add'>+	"CMM_AC_PWR_BTN_N","",</div><div class='ctx'> 	"RPU_READY_SPARE","",</div><div class='ctx'> 	"IT_GEAR_LEAK_SPARE","",</div><div class='ctx'> 	"IT_GEAR_RPU_LINK_SPARE_N","",</div><div class='del'>-	"IRQ_FCB_BOT0_N","",</div><div class='del'>-	"IRQ_FCB_BOT0_N","";</div><div class='add'>+	"IRQ_FCB_6_N","",</div><div class='add'>+	"IRQ_FCB_5_N","";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts<br/>new file mode 100644<br/>index 000000000000..72c84f31bdf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts</a></div><div class='hunk'>@@ -0,0 +1,982 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+// Copyright 2025 Facebook Inc.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "aspeed-g6.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Facebook Santabarbara BMC";</div><div class='add'>+	compatible = "facebook,santabarbara-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		serial3 = &amp;uart4;</div><div class='add'>+		serial4 = &amp;uart5;</div><div class='add'>+		i2c16 = &amp;i2c4mux0ch0;</div><div class='add'>+		i2c17 = &amp;i2c4mux0ch1;</div><div class='add'>+		i2c18 = &amp;i2c4mux0ch2;</div><div class='add'>+		i2c19 = &amp;i2c4mux0ch3;</div><div class='add'>+		i2c20 = &amp;i2c4mux0ch4;</div><div class='add'>+		i2c21 = &amp;i2c4mux0ch5;</div><div class='add'>+		i2c22 = &amp;i2c4mux0ch6;</div><div class='add'>+		i2c23 = &amp;i2c4mux0ch7;</div><div class='add'>+		i2c24 = &amp;i2c5mux0ch0;</div><div class='add'>+		i2c25 = &amp;i2c5mux0ch1;</div><div class='add'>+		i2c26 = &amp;i2c5mux0ch2;</div><div class='add'>+		i2c27 = &amp;i2c5mux0ch3;</div><div class='add'>+		i2c28 = &amp;i2c5mux1ch0;</div><div class='add'>+		i2c29 = &amp;i2c5mux1ch1;</div><div class='add'>+		i2c30 = &amp;i2c5mux1ch2;</div><div class='add'>+		i2c31 = &amp;i2c5mux1ch3;</div><div class='add'>+		i2c32 = &amp;i2c12mux0ch0;</div><div class='add'>+		i2c33 = &amp;i2c12mux0ch1;</div><div class='add'>+		i2c34 = &amp;i2c12mux0ch2;</div><div class='add'>+		i2c35 = &amp;i2c12mux0ch3;</div><div class='add'>+		i2c36 = &amp;i2c12mux0ch4;</div><div class='add'>+		i2c37 = &amp;i2c12mux0ch5;</div><div class='add'>+		i2c38 = &amp;i2c12mux0ch6;</div><div class='add'>+		i2c39 = &amp;i2c12mux0ch7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial4:57600n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc0 0&gt;, &lt;&amp;adc0 1&gt;, &lt;&amp;adc0 2&gt;, &lt;&amp;adc0 3&gt;,</div><div class='add'>+			      &lt;&amp;adc0 4&gt;, &lt;&amp;adc0 5&gt;, &lt;&amp;adc0 6&gt;, &lt;&amp;adc0 7&gt;,</div><div class='add'>+			      &lt;&amp;adc1 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "bmc_heartbeat_amber";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			label = "fp_id_amber";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			label = "power_blue";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3_bmc_aux: regulator-p3v3-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p3v3_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi_gpio: spi {</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sck-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		tpm@0 {</div><div class='add'>+			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+			spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	aspeed,int-vref-microvolt = &lt;2500000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0_default &amp;pinctrl_adc1_default</div><div class='add'>+		&amp;pinctrl_adc2_default &amp;pinctrl_adc3_default</div><div class='add'>+		&amp;pinctrl_adc4_default &amp;pinctrl_adc5_default</div><div class='add'>+		&amp;pinctrl_adc6_default &amp;pinctrl_adc7_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	aspeed,int-vref-microvolt = &lt;2500000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc10_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+#include "openbmc-flash-layout-128.dtsi"</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flash@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "alt-bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*A0-A7*/	"","","","","","","","",</div><div class='add'>+	/*B0-B7*/	"rtc-battery-voltage-read-enable","","","BMC_READY",</div><div class='add'>+			"","led-identify","","",</div><div class='add'>+	/*C0-C7*/	"","","","","","","","",</div><div class='add'>+	/*D0-D7*/	"","","","","","","","",</div><div class='add'>+	/*E0-E7*/	"","","","","","","","",</div><div class='add'>+	/*F0-F7*/	"","","","","","","","",</div><div class='add'>+	/*G0-G7*/	"FM_MUX1_SEL_R","","","","","","","",</div><div class='add'>+	/*H0-H7*/	"","","","","","","","",</div><div class='add'>+	/*I0-I7*/	"","","","","","","","",</div><div class='add'>+	/*J0-J7*/	"","","","","","","","",</div><div class='add'>+	/*K0-K7*/	"","","","","","","","",</div><div class='add'>+	/*L0-L7*/	"","","","","","","","",</div><div class='add'>+	/*M0-M7*/	"","","","","","","","",</div><div class='add'>+	/*N0-N7*/	"led-postcode-0","led-postcode-1",</div><div class='add'>+			"led-postcode-2","led-postcode-3",</div><div class='add'>+			"led-postcode-4","led-postcode-5",</div><div class='add'>+			"led-postcode-6","led-postcode-7",</div><div class='add'>+	/*O0-O7*/	"","","","","","","","",</div><div class='add'>+	/*P0-P7*/	"power-button","","reset-button","",</div><div class='add'>+			"led-power","","","",</div><div class='add'>+	/*Q0-Q7*/	"","","","","","","","",</div><div class='add'>+	/*R0-R7*/	"","","","","","","","",</div><div class='add'>+	/*S0-S7*/	"","","power-host-control","","","","","",</div><div class='add'>+	/*T0-T7*/	"","","","","","","","",</div><div class='add'>+	/*U0-U7*/	"","","","","","","","",</div><div class='add'>+	/*V0-V7*/	"","","","","","","","",</div><div class='add'>+	/*W0-W7*/	"","","","","","","","",</div><div class='add'>+	/*X0-X7*/	"","","","","","","","",</div><div class='add'>+	/*Y0-Y7*/	"","","","","","","","",</div><div class='add'>+	/*Z0-Z7*/	"","","","","","","","";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*18A0-18A7*/	"","","","","","","","",</div><div class='add'>+	/*18B0-18B7*/	"","","","",</div><div class='add'>+				"FM_BOARD_BMC_REV_ID0","FM_BOARD_BMC_REV_ID1",</div><div class='add'>+				"FM_BOARD_BMC_REV_ID2","",</div><div class='add'>+	/*18C0-18C7*/	"SPI_BMC_BIOS_ROM_IRQ0_R_N","","","","","","","",</div><div class='add'>+	/*18D0-18D7*/	"","","","","","","","",</div><div class='add'>+	/*18E0-18E3*/	"FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_R_N","","";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// MB FRU</div><div class='add'>+	eeprom@53 {</div><div class='add'>+		compatible = "atmel,24c128";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1339";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;112 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FM_NIC_PPS_IN_OE_N","FM_NIC_PPS_OUT_OE_N",</div><div class='add'>+			"FM_CPU0_TRIGGERTSC_OE_N","FM_NIC_PPS_IN_MUX_OE_N",</div><div class='add'>+			"FM_CPU0_CORETYPE0","FM_CPU0_CORETYPE1",</div><div class='add'>+			"FM_CPU0_CORETYPE2","FM_NIC_PPS_OUT_MUX_OE",</div><div class='add'>+			"CLKMUX_INPUT_LOSS_U45_R_N","FM_CPU0_SP7R1",</div><div class='add'>+			"FM_CPU0_SP7R2","FM_CPU0_SP7R3",</div><div class='add'>+			"FM_CPU0_SP7R4","",</div><div class='add'>+			"FM_NIC_PPS_IN_S0_R","FM_NIC_PPS_IN_S1_R";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan-controller@21 {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;116 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FM_CBL_PRSNT_0A_N","FM_CBL_PRSNT_0B_N",</div><div class='add'>+			"FM_CBL_PRSNT_1A_N","FM_CBL_PRSNT_1B_N",</div><div class='add'>+			"FM_MODULE_PWRGD_0A","FM_MODULE_PWRGD_0B",</div><div class='add'>+			"CLKMUX_INPUT_LOSS_U88_R_N","FM_MODULE_PWRGD_1B",</div><div class='add'>+			"","",</div><div class='add'>+			"CLKMUX_INPUT_LOSS_U83_R_N","CLKMUX_INPUT_LOSS_U84_R_N",</div><div class='add'>+			"FM_P3V3_E1S_0_FAULT_R_N","FM_P3V3_E1S_1_FAULT_R_N",</div><div class='add'>+			"E1S_0_P12V_ADC_R_ALERT","E1S_1_P12V_ADC_R_ALERT";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;114 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FM_CBL_PRSNT_2A_N","FM_CBL_PRSNT_2B_N",</div><div class='add'>+			"FM_CBL_PRSNT_3A_N","FM_CBL_PRSNT_3B_N",</div><div class='add'>+			"FM_CBL_PRSNT_4A_N","FM_CBL_PRSNT_4B_N",</div><div class='add'>+			"FM_P3V3_NIC_400G_FAULT_R_N","FM_MODULE_PWRGD_2B",</div><div class='add'>+			"OCP_SFF_P12V_ADC_R_ALERT","FM_MODULE_PWRGD_3B",</div><div class='add'>+			"FM_THERMAL_ALERT_R_N","FM_MODULE_PWRGD_4B",</div><div class='add'>+			"FM_CBL_PRSNT_OSFP_A_N","FM_CBL_PRSNT_OSFP_B_N",</div><div class='add'>+			"FM_JTAG_MCIO_MUX_S0","FM_JTAG_MCIO_MUX_S1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@26 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x26&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sgpiom0&gt;;</div><div class='add'>+		interrupts = &lt;118 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FAN_0_PRSNT_R1_N","FAN_1_PRSNT_R1_N",</div><div class='add'>+			"FAN_2_PRSNT_R1_N","FAN_3_PRSNT_R1_N",</div><div class='add'>+			"P12V_FAN_0_ADC_ALERT","P12V_FAN_1_ADC_ALERT",</div><div class='add'>+			"P12V_FAN_2_ADC_ALERT","P12V_FAN_3_ADC_ALERT",</div><div class='add'>+			"P12V_FAN0_PWRGD_R","P12V_FAN1_PWRGD_R",</div><div class='add'>+			"P12V_FAN2_PWRGD_R","P12V_FAN3_PWRGD_R",</div><div class='add'>+			"","","","";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c4mux0ch0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			// HPM Board ID EEPROM</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// SCM Board ID EEPROM</div><div class='add'>+			eeprom@53 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x53&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch3: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@40 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@42 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x42&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@44 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x44&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@46 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x46&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			voltage-sensor@48 {</div><div class='add'>+				compatible = "ti,ads7830";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+				vref-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			voltage-sensor@4a {</div><div class='add'>+				compatible = "ti,ads7830";</div><div class='add'>+				reg = &lt;0x4a&gt;;</div><div class='add'>+				vref-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			temperature-sensor@4c {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4c&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			temperature-sensor@4e {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4e&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch4: i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch5: i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch6: i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@40 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@42 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x42&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@44 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x44&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@46 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x46&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			voltage-sensor@48 {</div><div class='add'>+				compatible = "ti,ads7830";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c4mux0ch7: i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			temperature-sensor@4b {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4b&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			temperature-sensor@4f {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x4f&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			// FIO FRU</div><div class='add'>+			eeprom@53 {</div><div class='add'>+				compatible = "atmel,24c512";</div><div class='add'>+				reg = &lt;0x53&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// E1S BP FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@71 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c5mux0ch0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c5mux0ch3: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c5mux1ch0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			voltage-sensor@48 {</div><div class='add'>+				compatible = "ti,ads7830";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c5mux1ch1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			temperature-sensor@48 {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c5mux1ch2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@40 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@41 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x41&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@44 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x44&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@45 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x45&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c5mux1ch3: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@74 {</div><div class='add'>+				compatible = "nxp,pca9539";</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"P12V_E1S_ADC_ALERT","BUFF0_100M_LOSB_PLD",</div><div class='add'>+					"E1S_BP_SKU_ID0","E1S_BP_SKU_ID1",</div><div class='add'>+					"E1S_BP_SKU_ID2","E1S_BP_REV_ID0",</div><div class='add'>+					"E1S_BP_REV_ID1","E1S_BP_REV_ID2",</div><div class='add'>+					"P3V3_E1S_1_FAULT_R_N","P3V3_E1S_2_FAULT_R_N",</div><div class='add'>+					"P3V3_E1S_3_FAULT_R_N","P3V3_E1S_4_FAULT_R_N",</div><div class='add'>+					"P12V_E1S_1_FAULT_R_N","P12V_E1S_2_FAULT_R_N",</div><div class='add'>+					"P12V_E1S_3_FAULT_R_N","P12V_E1S_4_FAULT_R_N";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// Rainbow0 FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// Rainbow2 FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4b {</div><div class='add'>+		compatible = "ti,tmp75";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// SCM FRU</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c128";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// BSM FRU</div><div class='add'>+	eeprom@56 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x56&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// Rainbow3 FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// OCP NIC TEMP</div><div class='add'>+	temperature-sensor@1f {</div><div class='add'>+		compatible = "ti,tmp421";</div><div class='add'>+		reg = &lt;0x1f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// OCP NIC FRU</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// SWB FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		i2c12mux0ch0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			temperature-sensor@48 {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@42 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x42&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@43 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x43&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@40 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@41 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x41&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch3: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			power-monitor@44 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x44&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power-monitor@45 {</div><div class='add'>+				compatible = "ti,ina230";</div><div class='add'>+				reg = &lt;0x45&gt;;</div><div class='add'>+				shunt-resistor = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch4: i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			voltage-sensor@49 {</div><div class='add'>+				compatible = "ti,ads7830";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch5: i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch6: i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		i2c12mux0ch7: i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	// Rainbow1 FRU</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;kcs2 {</div><div class='add'>+	aspeed,lpc-io-reg = &lt;0xca8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;kcs3 {</div><div class='add'>+	aspeed,lpc-io-reg = &lt;0xca2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rmii3_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rmii4_default&gt;;</div><div class='add'>+	use-ncsi;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sgpiom0 {</div><div class='add'>+	ngpios = &lt;128&gt;;</div><div class='add'>+	bus-frequency = &lt;2000000&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/*in - out - in - out */</div><div class='add'>+	/*A0-A3 line 0-7*/</div><div class='add'>+	"PDB1_HSC_PWR_OK","power-chassis-control",</div><div class='add'>+	"PDB2_HSC_PWR_OK","FM_MODULE_PWRGD_0A_OUT",</div><div class='add'>+	"PWRGD_P12V_MEM","FM_MODULE_PWRGD_0B_OUT",</div><div class='add'>+	"PWRGD_P12V_SCM","FM_MODULE_PWRGD_1B_OUT",</div><div class='add'>+	/*A4-A7 line 8-15*/</div><div class='add'>+	"PWRGD_P12V_FAN","FM_MODULE_PWRGD_2B_OUT",</div><div class='add'>+	"PWRGD_P5V_AUX","FM_MODULE_PWRGD_3B_OUT",</div><div class='add'>+	"power-chassis-good","FM_MODULE_PWRGD_4B_OUT",</div><div class='add'>+	"PWRGD_P1V8_LDO","FM_CBL_PRSNT_0A_N_OUT",</div><div class='add'>+	/*B0-B3 line 16-23*/</div><div class='add'>+	"PWRGD_P1V_LDO","FM_CBL_PRSNT_0B_N_OUT",</div><div class='add'>+	"PWRGD_PVDD33_S5","FM_CBL_PRSNT_1A_N_OUT",</div><div class='add'>+	"PWRGD_PVDD18_S5_P0","FM_CBL_PRSNT_1B_N_OUT",</div><div class='add'>+	"CPU0_SLP_S5_N","FM_CBL_PRSNT_2A_N_OUT",</div><div class='add'>+	/*B4-B7 line 24-31*/</div><div class='add'>+	"PWRGD_PVDDIO_MEM_S3_P0","FM_CBL_PRSNT_2B_N_OUT",</div><div class='add'>+	"CPU0_SLP_S3_N","FM_CBL_PRSNT_3A_N_OUT",</div><div class='add'>+	"FM_MODULE_PWRGD_1B","FM_CBL_PRSNT_3B_N_OUT",</div><div class='add'>+	"FM_MODULE_PWRGD_2B","FM_CBL_PRSNT_4A_N_OUT",</div><div class='add'>+	/*C0-C3 line 32-39*/</div><div class='add'>+	"FM_MODULE_PWRGD_3B","FM_CBL_PRSNT_4B_N_OUT",</div><div class='add'>+	"FM_MODULE_PWRGD_4B","P12V_FAN0_PWRGD_OUT",</div><div class='add'>+	"FM_MODULE_PWRGD_0B","P12V_FAN1_PWRGD_OUT",</div><div class='add'>+	"PWRGD_PVDDIO_P0","P12V_FAN2_PWRGD_OUT",</div><div class='add'>+	/*C4-C7 line 40-47*/</div><div class='add'>+	"PWRGD_PVDDCR_SOC_P0","P12V_FAN3_PWRGD_OUT",</div><div class='add'>+	"PWRGD_PVDDCR_CPU0_P0","P12V_FAN4_PWRGD_OUT",</div><div class='add'>+	"PWRGD_PVDDCR_CPU1_P0","P12V_FAN5_PWRGD_OUT",</div><div class='add'>+	"FM_CPU0_PWR_GOOD","P12V_FAN6_PWRGD_OUT",</div><div class='add'>+	/*D0-D3 line 48-55*/</div><div class='add'>+	"host0-ready","P12V_FAN7_PWRGD_OUT",</div><div class='add'>+	"FM_PWRGD_CPU0_PWROK","FAN_0_PRSNT_R1_N_OUT",</div><div class='add'>+	"FM_RST_CPU0_RESETL_N","FAN_1_PRSNT_R1_N_OUT",</div><div class='add'>+	"RST_CPU0_PERST0_R_N","FAN_2_PRSNT_R1_N_OUT",</div><div class='add'>+	/*D4-D7 line 56-63*/</div><div class='add'>+	"RST_CPU0_PERST1_R_N","FAN_3_PRSNT_R1_N_OUT",</div><div class='add'>+	"BIOS_POST_CMPLT","FAN_4_PRSNT_R1_N_OUT",</div><div class='add'>+	"","FAN_5_PRSNT_R1_N_OUT",</div><div class='add'>+	"","FAN_6_PRSNT_R1_N_OUT",</div><div class='add'>+	/*E0-E3 line 64-71*/</div><div class='add'>+	"FM_PWRGD_CHAD_CPU0","FAN_7_PRSNT_R1_N_OUT",</div><div class='add'>+	"FM_PWRGD_CHEH_CPU0","TRAY_SLOT_ID0_OUT",</div><div class='add'>+	"FM_PWRGD_CHIL_CPU0","TRAY_SLOT_ID1_OUT",</div><div class='add'>+	"FM_PWRGD_CHMP_CPU0","TRAY_SLOT_ID2_OUT",</div><div class='add'>+	/*E4-E7 line 72-79*/</div><div class='add'>+	"P12V_E1S_0_PWRGD","TRAY_SLOT_ID3_OUT",</div><div class='add'>+	"P12V_E1S_1_PWRGD","TRAY_SLOT_ID4_OUT",</div><div class='add'>+	"P3V3_E1S_0_PWRGD","SCM_JTAG_MUX_S0_R",</div><div class='add'>+	"P3V3_E1S_1_PWRGD","SCM_JTAG_MUX_S1_R",</div><div class='add'>+	/*F0-F3 line 80-87*/</div><div class='add'>+	"FM_MODULE_PWRGD_0A","BMC_SGPIO_READY",</div><div class='add'>+	"OCP_V3_1_P3V3_PLD_R_PWRGD","CPU0_SYS_RESET_N",</div><div class='add'>+	"P12V_OCP_V3_1_PLD_PWRGD","RST_CPU0_KBRST_N",</div><div class='add'>+	"PWRGD_OCP_SFF_PWR_GOOD","BIOS_DEBUG_MODE",</div><div class='add'>+	/*F4-F7 line 88-95*/</div><div class='add'>+	"","CLR_CMOS",</div><div class='add'>+	"","I3C_SPD_MUX_FORCE_SEL",</div><div class='add'>+	"","FM_JTAG_HOST_SEL",</div><div class='add'>+	"","TRAY_PRESENT_N",</div><div class='add'>+	/*G0-G3 line 96-103*/</div><div class='add'>+	"MB_REV_ID_0","UART_BMC_SEL0",</div><div class='add'>+	"MB_REV_ID_1","UART_BMC_SEL1",</div><div class='add'>+	"MB_REV_ID_2","SCM_USB_SEL",</div><div class='add'>+	"MB_SKU_ID_0","FORCE_ALL_PWRON",</div><div class='add'>+	/*G4-G7 line 104-111*/</div><div class='add'>+	"MB_SKU_ID_1","PASSWORD_CLEAR",</div><div class='add'>+	"MB_SKU_ID_2","",</div><div class='add'>+	"MB_SKU_ID_3","",</div><div class='add'>+	"","BIOS_DEBUG_MODE",</div><div class='add'>+	/*H0-H3 line 112-119*/</div><div class='add'>+	"FM_IOEXP_U538_INT_N","",</div><div class='add'>+	"FM_IOEXP_U539_INT_N","",</div><div class='add'>+	"FM_IOEXP_U540_INT_N","",</div><div class='add'>+	"FM_IOEXP_U541_INT_N","",</div><div class='add'>+	/*H4-H7 line 120-127*/</div><div class='add'>+	"FM_IOEXP_PDB2_U1003_INT_N","",</div><div class='add'>+	"","","","","","",</div><div class='add'>+	/*I0-I3 line 128-135*/</div><div class='add'>+	"","","","",</div><div class='add'>+	"PDB_IRQ_PMBUS_ALERT_ISO_R_N","",</div><div class='add'>+	"PDB_UV_ALERT_ISO_R_N","",</div><div class='add'>+	/*I4-I7 line 136-143*/</div><div class='add'>+	"P12V_SCM_ADC_ALERT","",</div><div class='add'>+	"CPU0_REGS_I2C_ALERT_N","",</div><div class='add'>+	"FM_RTC_ALERT_N","",</div><div class='add'>+	"APML_CPU0_ALERT_R_N","",</div><div class='add'>+	/*J0-J3 line 144-151*/</div><div class='add'>+	"SMB_RJ45_FIO_TMP_ALERT","",</div><div class='add'>+	"FM_SMB_ALERT_MCIO_0A_N","",</div><div class='add'>+	"I3C_MCIO_0B_ALERT_ISO_R_N","",</div><div class='add'>+	"FM_SMB_ALERT_MCIO_1A_N","",</div><div class='add'>+	/*J4-J7 line 152-159*/</div><div class='add'>+	"I3C_MCIO_1B_ALERT_ISO_R_N","",</div><div class='add'>+	"FM_SMB_ALERT_MCIO_2A_N","",</div><div class='add'>+	"I3C_MCIO_2B_ALERT_ISO_R_N","",</div><div class='add'>+	"FM_SMB_ALERT_MCIO_3A_N","",</div><div class='add'>+	/*K0-K3 line 160-167*/</div><div class='add'>+	"I3C_MCIO_3B_ALERT_ISO_R_N","",</div><div class='add'>+	"FM_SMB_ALERT_MCIO_4A_N","",</div><div class='add'>+	"I3C_MCIO_4B_ALERT_ISO_R_N","",</div><div class='add'>+	"","",</div><div class='add'>+	/*K4-K7 line 168-175*/</div><div class='add'>+	"","","","","","","","",</div><div class='add'>+	/*L0-L3 line 176-183*/</div><div class='add'>+	"FM_CPU0_THERMTRIP_N","",</div><div class='add'>+	"FM_CPU0_PROCHOT_N","",</div><div class='add'>+	"FM_CPU0_SMERR_N","",</div><div class='add'>+	"FM_PVDDCR_CPU0_P0_OCP_N","",</div><div class='add'>+	/*L4-L7 line 184-191*/</div><div class='add'>+	"FM_PVDDCR_CPU1_P0_OCP_N","",</div><div class='add'>+	"FM_PVDDCR_SOC_P0_OCP_N","",</div><div class='add'>+	"FM_OCP_PWRBRK_R_N","",</div><div class='add'>+	"PMIC_ERROR_N","",</div><div class='add'>+	/*M0-M3 line 192-199*/</div><div class='add'>+	"","","","","","","","",</div><div class='add'>+	/*M4-M7 line 200-207*/</div><div class='add'>+	"","","","","","","","",</div><div class='add'>+	/*N0-N3 line 208-215*/</div><div class='add'>+	"FM_PRSNT_CPU0_N","",</div><div class='add'>+	"OCP_SFF_PRSNT_N","",</div><div class='add'>+	"E1S_0_PRSNT_R_N","",</div><div class='add'>+	"E1S_BP_0_PRSNT_R_N","",</div><div class='add'>+	/*N4-N7 line 216-223*/</div><div class='add'>+	"E1S_BP_1_PRSNT_R_N","",</div><div class='add'>+	"E1S_BP_2_PRSNT_R_N","",</div><div class='add'>+	"E1S_BP_3_PRSNT_R_N","",</div><div class='add'>+	"PDB_PRSNT_J311_N","",</div><div class='add'>+	/*O0-O3 line 224-231*/</div><div class='add'>+	"PDB_PRSNT_J312_N","",</div><div class='add'>+	"PDB_PRSNT_J313_N","",</div><div class='add'>+	"PDB_PRSNT_J314_N","",</div><div class='add'>+	"PRSNT_RJ45_FIO_N_R","",</div><div class='add'>+	/*O4-O7 line 232-239*/</div><div class='add'>+	"PRSNT_LEAK_CABLE_1_R_N","",</div><div class='add'>+	"PRSNT_LEAK_CABLE_2_R_N","",</div><div class='add'>+	"PRSNT_HDT_N","",</div><div class='add'>+	"","",</div><div class='add'>+	/*P0-P3 line 240-247*/</div><div class='add'>+	"","","","","","","","",</div><div class='add'>+	/*P4-P7 line 248-255*/</div><div class='add'>+	"","","","","","","","";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// BIOS Flash</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi2_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "pnor";</div><div class='add'>+		spi-max-frequency = &lt;12000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;2&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// HOST BIOS Debug</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// BMC Debug Console</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_routing {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdtrst1_default&gt;;</div><div class='add'>+	aspeed,reset-type = "soc";</div><div class='add'>+	aspeed,external-signal;</div><div class='add'>+	aspeed,ext-push-pull;</div><div class='add'>+	aspeed,ext-active-high;</div><div class='add'>+	aspeed,ext-pulse-duration = &lt;256&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts<br/>index 704ee684e0fb..5d4c7d979f1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts</a></div><div class='hunk'>@@ -508,7 +508,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	//HSC, AirMax Conn A</div><div class='ctx'> 	adm1278@45 {</div><div class='del'>-		compatible = "adm1275";</div><div class='add'>+		compatible = "adi,adm1275";</div><div class='ctx'> 		reg = &lt;0x45&gt;;</div><div class='ctx'> 		shunt-resistor-micro-ohms = &lt;250&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts<br/>new file mode 100644<br/>index 000000000000..1d46eaee8656<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400-data64.dts</a></div><div class='hunk'>@@ -0,0 +1,375 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2019 Facebook Inc.</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+#include "ast2500-facebook-netbmc-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Facebook Wedge 400 BMC (64MB Datastore)";</div><div class='add'>+	compatible = "facebook,wedge400-data64-bmc", "aspeed,ast2500";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (2-0070) provides 8 channels connecting to</div><div class='add'>+		 * SCM (System Controller Module).</div><div class='add'>+		 */</div><div class='add'>+		i2c16 = &amp;imux16;</div><div class='add'>+		i2c17 = &amp;imux17;</div><div class='add'>+		i2c18 = &amp;imux18;</div><div class='add'>+		i2c19 = &amp;imux19;</div><div class='add'>+		i2c20 = &amp;imux20;</div><div class='add'>+		i2c21 = &amp;imux21;</div><div class='add'>+		i2c22 = &amp;imux22;</div><div class='add'>+		i2c23 = &amp;imux23;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (8-0070) provides 8 channels connecting to</div><div class='add'>+		 * SMB (Switch Main Board).</div><div class='add'>+		 */</div><div class='add'>+		i2c24 = &amp;imux24;</div><div class='add'>+		i2c25 = &amp;imux25;</div><div class='add'>+		i2c26 = &amp;imux26;</div><div class='add'>+		i2c27 = &amp;imux27;</div><div class='add'>+		i2c28 = &amp;imux28;</div><div class='add'>+		i2c29 = &amp;imux29;</div><div class='add'>+		i2c30 = &amp;imux30;</div><div class='add'>+		i2c31 = &amp;imux31;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * PCA9548 (11-0076) provides 8 channels connecting to</div><div class='add'>+		 * FCM (Fan Controller Module).</div><div class='add'>+		 */</div><div class='add'>+		i2c32 = &amp;imux32;</div><div class='add'>+		i2c33 = &amp;imux33;</div><div class='add'>+		i2c34 = &amp;imux34;</div><div class='add'>+		i2c35 = &amp;imux35;</div><div class='add'>+		i2c36 = &amp;imux36;</div><div class='add'>+		i2c37 = &amp;imux37;</div><div class='add'>+		i2c38 = &amp;imux38;</div><div class='add'>+		i2c39 = &amp;imux39;</div><div class='add'>+</div><div class='add'>+		spi2 = &amp;spi_gpio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ast-adc-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc 0&gt;, &lt;&amp;adc 1&gt;, &lt;&amp;adc 2&gt;, &lt;&amp;adc 3&gt;, &lt;&amp;adc 4&gt;,</div><div class='add'>+			      &lt;&amp;adc 5&gt;, &lt;&amp;adc 6&gt;, &lt;&amp;adc 7&gt;, &lt;&amp;adc 8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GPIO-based SPI Master is required to access SPI TPM, because</div><div class='add'>+	 * full-duplex SPI transactions are not supported by ASPEED SPI</div><div class='add'>+	 * Controllers.</div><div class='add'>+	 */</div><div class='add'>+	spi_gpio: spi {</div><div class='add'>+		status = "okay";</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cs-gpios = &lt;&amp;gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		sck-gpios = &lt;&amp;gpio ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		tpm@0 {</div><div class='add'>+			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+			spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Both firmware flashes are 128MB on Wedge400 BMC.</div><div class='add'>+ */</div><div class='add'>+&amp;fmc_flash0 {</div><div class='add'>+#include "facebook-bmc-flash-layout-128-data64.dtsi"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc_flash1 {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		flash1@0 {</div><div class='add'>+			reg = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			label = "flash1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_txd2_default</div><div class='add'>+		     &amp;pinctrl_rxd2_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_txd4_default</div><div class='add'>+		     &amp;pinctrl_rxd4_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC</div><div class='add'>+ * communication.</div><div class='add'>+ */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	bus-frequency = &lt;1000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux16: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux17: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux18: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux19: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux20: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux21: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux22: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux23: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux24: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux25: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux26: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux27: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux28: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux29: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux30: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux31: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@76 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x76&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux32: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux33: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux34: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux35: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux36: i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux37: i2c@5 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux38: i2c@6 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux39: i2c@7 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	max-frequency = &lt;25000000&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * DMA mode needs to be disabled to avoid conflicts with UHCI</div><div class='add'>+	 * Controller in AST2500 SoC.</div><div class='add'>+	 */</div><div class='add'>+	sdhci-caps-mask = &lt;0x0 0x580000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts<br/>index 5a8169bbda87..ef0cfc51cda4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts</a></div><div class='hunk'>@@ -1,376 +1,14 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0+</div><div class='ctx'> // Copyright (c) 2019 Facebook Inc.</div><div class='del'>-/dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='del'>-#include "ast2500-facebook-netbmc-common.dtsi"</div><div class='add'>+#include "aspeed-bmc-facebook-wedge400-data64.dts"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Facebook Wedge 400 BMC";</div><div class='ctx'> 	compatible = "facebook,wedge400-bmc", "aspeed,ast2500";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (2-0070) provides 8 channels connecting to</div><div class='del'>-		 * SCM (System Controller Module).</div><div class='del'>-		 */</div><div class='del'>-		i2c16 = &amp;imux16;</div><div class='del'>-		i2c17 = &amp;imux17;</div><div class='del'>-		i2c18 = &amp;imux18;</div><div class='del'>-		i2c19 = &amp;imux19;</div><div class='del'>-		i2c20 = &amp;imux20;</div><div class='del'>-		i2c21 = &amp;imux21;</div><div class='del'>-		i2c22 = &amp;imux22;</div><div class='del'>-		i2c23 = &amp;imux23;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (8-0070) provides 8 channels connecting to</div><div class='del'>-		 * SMB (Switch Main Board).</div><div class='del'>-		 */</div><div class='del'>-		i2c24 = &amp;imux24;</div><div class='del'>-		i2c25 = &amp;imux25;</div><div class='del'>-		i2c26 = &amp;imux26;</div><div class='del'>-		i2c27 = &amp;imux27;</div><div class='del'>-		i2c28 = &amp;imux28;</div><div class='del'>-		i2c29 = &amp;imux29;</div><div class='del'>-		i2c30 = &amp;imux30;</div><div class='del'>-		i2c31 = &amp;imux31;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * PCA9548 (11-0076) provides 8 channels connecting to</div><div class='del'>-		 * FCM (Fan Controller Module).</div><div class='del'>-		 */</div><div class='del'>-		i2c32 = &amp;imux32;</div><div class='del'>-		i2c33 = &amp;imux33;</div><div class='del'>-		i2c34 = &amp;imux34;</div><div class='del'>-		i2c35 = &amp;imux35;</div><div class='del'>-		i2c36 = &amp;imux36;</div><div class='del'>-		i2c37 = &amp;imux37;</div><div class='del'>-		i2c38 = &amp;imux38;</div><div class='del'>-		i2c39 = &amp;imux39;</div><div class='del'>-</div><div class='del'>-		spi2 = &amp;spi_gpio;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = &amp;uart1;</div><div class='del'>-		bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ast-adc-hwmon {</div><div class='del'>-		compatible = "iio-hwmon";</div><div class='del'>-		io-channels = &lt;&amp;adc 0&gt;, &lt;&amp;adc 1&gt;, &lt;&amp;adc 2&gt;, &lt;&amp;adc 3&gt;, &lt;&amp;adc 4&gt;,</div><div class='del'>-			      &lt;&amp;adc 5&gt;, &lt;&amp;adc 6&gt;, &lt;&amp;adc 7&gt;, &lt;&amp;adc 8&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * GPIO-based SPI Master is required to access SPI TPM, because</div><div class='del'>-	 * full-duplex SPI transactions are not supported by ASPEED SPI</div><div class='del'>-	 * Controllers.</div><div class='del'>-	 */</div><div class='del'>-	spi_gpio: spi {</div><div class='del'>-		status = "okay";</div><div class='del'>-		compatible = "spi-gpio";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cs-gpios = &lt;&amp;gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		gpio-sck = &lt;&amp;gpio ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		gpio-mosi = &lt;&amp;gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		gpio-miso = &lt;&amp;gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		num-chipselects = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		tpm@0 {</div><div class='del'>-			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='del'>-			spi-max-frequency = &lt;33000000&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Both firmware flashes are 128MB on Wedge400 BMC.</div><div class='del'>- */</div><div class='ctx'> &amp;fmc_flash0 {</div><div class='add'>+	/delete-node/partitions;</div><div class='ctx'> #include "facebook-bmc-flash-layout-128.dtsi"</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;fmc_flash1 {</div><div class='del'>-	partitions {</div><div class='del'>-		compatible = "fixed-partitions";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		flash1@0 {</div><div class='del'>-			reg = &lt;0x0 0x8000000&gt;;</div><div class='del'>-			label = "flash1";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_txd2_default</div><div class='del'>-		     &amp;pinctrl_rxd2_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_txd4_default</div><div class='del'>-		     &amp;pinctrl_rxd4_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC</div><div class='del'>- * communication.</div><div class='del'>- */</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	multi-master;</div><div class='del'>-	bus-frequency = &lt;1000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	i2c-mux@70 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x70&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux16: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux17: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux18: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux19: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux20: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux21: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux22: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux23: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c5 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c7 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c8 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	i2c-mux@70 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x70&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux24: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux25: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux26: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux27: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux28: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux29: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux30: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux31: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c9 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c10 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c11 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	i2c-mux@76 {</div><div class='del'>-		compatible = "nxp,pca9548";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x76&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-</div><div class='del'>-		imux32: i2c@0 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux33: i2c@1 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux34: i2c@2 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux35: i2c@3 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux36: i2c@4 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux37: i2c@5 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux38: i2c@6 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		imux39: i2c@7 {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c12 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c13 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;adc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ehci1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uhci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci1 {</div><div class='del'>-	max-frequency = &lt;25000000&gt;;</div><div class='del'>-	/*</div><div class='del'>-	 * DMA mode needs to be disabled to avoid conflicts with UHCI</div><div class='del'>-	 * Controller in AST2500 SoC.</div><div class='del'>-	 */</div><div class='del'>-	sdhci-caps-mask = &lt;0x0 0x580000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts<br/>index 98477792aa00..60b98d602e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts</a></div><div class='hunk'>@@ -17,6 +17,27 @@</div><div class='ctx'> 		serial6 = &amp;uart7;</div><div class='ctx'> 		serial7 = &amp;uart8;</div><div class='ctx'> 		serial8 = &amp;uart9;</div><div class='add'>+</div><div class='add'>+		i2c16 = &amp;imux16;</div><div class='add'>+		i2c17 = &amp;imux17;</div><div class='add'>+		i2c18 = &amp;imux18;</div><div class='add'>+		i2c19 = &amp;imux19;</div><div class='add'>+		i2c20 = &amp;imux20;</div><div class='add'>+		i2c21 = &amp;imux21;</div><div class='add'>+		i2c22 = &amp;imux22;</div><div class='add'>+		i2c23 = &amp;imux23;</div><div class='add'>+		i2c24 = &amp;imux24;</div><div class='add'>+		i2c25 = &amp;imux25;</div><div class='add'>+		i2c26 = &amp;imux26;</div><div class='add'>+		i2c27 = &amp;imux27;</div><div class='add'>+		i2c28 = &amp;imux28;</div><div class='add'>+		i2c29 = &amp;imux29;</div><div class='add'>+		i2c30 = &amp;imux30;</div><div class='add'>+		i2c31 = &amp;imux31;</div><div class='add'>+		i2c32 = &amp;imux32;</div><div class='add'>+		i2c33 = &amp;imux33;</div><div class='add'>+		i2c34 = &amp;imux34;</div><div class='add'>+		i2c35 = &amp;imux35;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -32,7 +53,25 @@</div><div class='ctx'> 		compatible = "iio-hwmon";</div><div class='ctx'> 		io-channels = &lt;&amp;adc0 0&gt;, &lt;&amp;adc0 1&gt;, &lt;&amp;adc0 2&gt;, &lt;&amp;adc0 3&gt;,</div><div class='ctx'> 				&lt;&amp;adc0 4&gt;, &lt;&amp;adc0 5&gt;, &lt;&amp;adc0 6&gt;, &lt;&amp;adc0 7&gt;,</div><div class='del'>-				&lt;&amp;adc1 0&gt;, &lt;&amp;adc1 1&gt;;</div><div class='add'>+				&lt;&amp;adc1 0&gt;, &lt;&amp;adc1 1&gt;, &lt;&amp;adc1 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi {</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sck-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		tpm@0 {</div><div class='add'>+			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -83,6 +122,13 @@</div><div class='ctx'> 	aspeed,ext-pulse-duration = &lt;256&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;wdt2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdtrst2_default&gt;;</div><div class='add'>+	aspeed,reset-type = "system";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mac2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -105,15 +151,17 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		m25p,fast-read;</div><div class='ctx'> 		label = "bmc";</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;2&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;2&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-#include "openbmc-flash-layout-64.dtsi"</div><div class='add'>+#include "openbmc-flash-layout-128.dtsi"</div><div class='ctx'> 	};</div><div class='ctx'> 	flash@1 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		m25p,fast-read;</div><div class='del'>-		label = "bmc2";</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		label = "alt-bmc";</div><div class='add'>+		spi-tx-bus-width = &lt;2&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;2&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -129,9 +177,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT1_UART_SEL0","SLOT1_UART_SEL1",</div><div class='add'>+				"SLOT1_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -146,9 +228,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT2_UART_SEL0","SLOT2_UART_SEL1",</div><div class='add'>+				"SLOT2_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -163,9 +279,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT3_UART_SEL0","SLOT3_UART_SEL1",</div><div class='add'>+				"SLOT3_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -180,9 +330,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT4_UART_SEL0","SLOT4_UART_SEL1",</div><div class='add'>+				"SLOT4_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -197,9 +381,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT5_UART_SEL0","SLOT5_UART_SEL1",</div><div class='add'>+				"SLOT5_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -214,9 +432,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT6_UART_SEL0","SLOT6_UART_SEL1",</div><div class='add'>+				"SLOT6_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -231,9 +483,43 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT7_UART_SEL0","SLOT7_UART_SEL1",</div><div class='add'>+				"SLOT7_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -248,48 +534,368 @@</div><div class='ctx'> 		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@22 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "SLOT8_UART_SEL0","SLOT8_UART_SEL1",</div><div class='add'>+				"SLOT8_UART_SEL2","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","",</div><div class='add'>+				"","","","","","","","";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9506";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	power-sensor@40 {</div><div class='del'>-		compatible = "adi,adm1278";</div><div class='add'>+		compatible = "adi,adm1281";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c8 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> 	i2c-mux@70 {</div><div class='ctx'> 		compatible = "nxp,pca9544";</div><div class='del'>-		idle-state = &lt;0&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux16: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux17: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux18: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux19: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c9 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> 	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9544";</div><div class='del'>-		idle-state = &lt;0&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='ctx'> 		reg = &lt;0x71&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux20: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux21: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux22: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux23: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			gpio@49 {</div><div class='add'>+				compatible = "nxp,pca9537";</div><div class='add'>+				reg = &lt;0x49&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@51 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c10 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;400000&gt;;</div><div class='add'>+	i2c-mux@74 {</div><div class='add'>+		compatible = "nxp,pca9544";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux28: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@20 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@21 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@22 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x22&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@23 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x23&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@24 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x24&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-line-names = "","","","",</div><div class='add'>+						  "NIC0_MAIN_PWR_EN",</div><div class='add'>+						  "NIC1_MAIN_PWR_EN",</div><div class='add'>+						  "NIC2_MAIN_PWR_EN",</div><div class='add'>+						  "NIC3_MAIN_PWR_EN",</div><div class='add'>+						  "","","","","","","","",</div><div class='add'>+						  "","","","","","","","",</div><div class='add'>+						  "","","","","","","","";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux29: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c11 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	power-sensor@10 {</div><div class='del'>-		compatible = "adi, adm1272";</div><div class='add'>+		compatible = "adi,adm1272";</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-sensor@12 {</div><div class='del'>-		compatible = "adi, adm1272";</div><div class='add'>+		compatible = "adi,adm1272";</div><div class='ctx'> 		reg = &lt;0x12&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -298,6 +904,20 @@</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;98 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names = "P48V_OCP_GPIO1", "P48V_OCP_GPIO2",</div><div class='add'>+				  "P48V_OCP_GPIO3", "FAN_BOARD_0_REVISION_0_R",</div><div class='add'>+				  "FAN_BOARD_0_REVISION_1_R",</div><div class='add'>+				  "FAN_BOARD_1_REVISION_0_R",</div><div class='add'>+				  "FAN_BOARD_1_REVISION_1_R", "RST_MUX_R_N",</div><div class='add'>+				  "RST_LED_CONTROL_FAN_BOARD_0_N",</div><div class='add'>+				  "RST_LED_CONTROL_FAN_BOARD_1_N",</div><div class='add'>+				  "RST_IOEXP_FAN_BOARD_0_N",</div><div class='add'>+				  "RST_IOEXP_FAN_BOARD_1_N",</div><div class='add'>+				  "PWRGD_LOAD_SWITCH_FAN_BOARD_0_R",</div><div class='add'>+				  "PWRGD_LOAD_SWITCH_FAN_BOARD_1_R",</div><div class='add'>+				  "", "";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio@21 {</div><div class='hunk'>@@ -305,6 +925,19 @@</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;98 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names = "HSC_OCP_SLOT_ODD_GPIO1",</div><div class='add'>+				  "HSC_OCP_SLOT_ODD_GPIO2",</div><div class='add'>+				  "HSC_OCP_SLOT_ODD_GPIO3",</div><div class='add'>+				  "HSC_OCP_SLOT_EVEN_GPIO1",</div><div class='add'>+				  "HSC_OCP_SLOT_EVEN_GPIO2",</div><div class='add'>+				  "HSC_OCP_SLOT_EVEN_GPIO3",</div><div class='add'>+				  "ADC_TYPE_0_R", "ADC_TYPE_1_R",</div><div class='add'>+				  "MEDUSA_BOARD_REV_0", "MEDUSA_BOARD_REV_1",</div><div class='add'>+				  "MEDUSA_BOARD_REV_2", "MEDUSA_BOARD_TYPE",</div><div class='add'>+				  "DELTA_MODULE_TYPE", "P12V_HSC_TYPE",</div><div class='add'>+				  "", "";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio@22 {</div><div class='hunk'>@@ -312,6 +945,16 @@</div><div class='ctx'> 		reg = &lt;0x22&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;98 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names = "CARD_TYPE_SLOT1", "CARD_TYPE_SLOT2",</div><div class='add'>+				  "CARD_TYPE_SLOT3", "CARD_TYPE_SLOT4",</div><div class='add'>+				  "CARD_TYPE_SLOT5", "CARD_TYPE_SLOT6",</div><div class='add'>+				  "CARD_TYPE_SLOT7", "CARD_TYPE_SLOT8",</div><div class='add'>+				  "OC_P48V_HSC_0_N", "FLT_P48V_HSC_0_N",</div><div class='add'>+				  "OC_P48V_HSC_1_N", "FLT_P48V_HSC_1_N",</div><div class='add'>+				  "EN_P48V_AUX_0", "EN_P48V_AUX_1",</div><div class='add'>+				  "PWRGD_P12V_AUX_0", "PWRGD_P12V_AUX_1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio@23 {</div><div class='hunk'>@@ -319,6 +962,16 @@</div><div class='ctx'> 		reg = &lt;0x23&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;98 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names = "HSC1_ALERT1_R_N", "HSC2_ALERT1_R_N",</div><div class='add'>+				  "HSC3_ALERT1_R_N", "HSC4_ALERT1_R_N",</div><div class='add'>+				  "HSC5_ALERT1_R_N", "HSC6_ALERT1_R_N",</div><div class='add'>+				  "HSC7_ALERT1_R_N", "HSC8_ALERT1_R_N",</div><div class='add'>+				  "HSC1_ALERT2_R_N", "HSC2_ALERT2_R_N",</div><div class='add'>+				  "HSC3_ALERT2_R_N", "HSC4_ALERT2_R_N",</div><div class='add'>+				  "HSC5_ALERT2_R_N", "HSC6_ALERT2_R_N",</div><div class='add'>+				  "HSC7_ALERT2_R_N", "HSC8_ALERT2_R_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	temperature-sensor@48 {</div><div class='hunk'>@@ -331,39 +984,84 @@</div><div class='ctx'> 		reg = &lt;0x49&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	temperature-sensor@4a {</div><div class='del'>-		compatible = "ti,tmp75";</div><div class='del'>-		reg = &lt;0x4a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	temperature-sensor@4b {</div><div class='del'>-		compatible = "ti,tmp75";</div><div class='del'>-		reg = &lt;0x4b&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	eeprom@54 {</div><div class='del'>-		compatible = "atmel,24c256";</div><div class='add'>+		compatible = "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x54&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c12 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	temperature-sensor@48 {</div><div class='del'>-		compatible = "ti,tmp75";</div><div class='del'>-		reg = &lt;0x48&gt;;</div><div class='del'>-	};</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9544";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='ctx'> </div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c128";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='add'>+		imux34: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			temperature-sensor@48 {</div><div class='add'>+				compatible = "ti,tmp75";</div><div class='add'>+				reg = &lt;0x48&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c128";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@6f {</div><div class='add'>+				compatible = "nuvoton,nct3018y";</div><div class='add'>+				reg = &lt;0x6f&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	rtc@6f {</div><div class='del'>-		compatible = "nuvoton,nct3018y";</div><div class='del'>-		reg = &lt;0x6f&gt;;</div><div class='add'>+			gpio@20 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@21 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@22 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x22&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@23 {</div><div class='add'>+				compatible = "nxp,pca9506";</div><div class='add'>+				reg = &lt;0x23&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux35: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -380,24 +1078,26 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c14 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> 	adc@1d {</div><div class='ctx'> 		compatible = "ti,adc128d818";</div><div class='ctx'> 		reg = &lt;0x1d&gt;;</div><div class='del'>-		ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	adc@35 {</div><div class='add'>+	adc@36 {</div><div class='ctx'> 		compatible = "ti,adc128d818";</div><div class='del'>-		reg = &lt;0x35&gt;;</div><div class='del'>-		ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	adc@37 {</div><div class='ctx'> 		compatible = "ti,adc128d818";</div><div class='ctx'> 		reg = &lt;0x37&gt;;</div><div class='del'>-		ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-sensor@40 {</div><div class='hunk'>@@ -440,43 +1140,67 @@</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-mux@71 {</div><div class='del'>-		compatible = "nxp,pca9846";</div><div class='add'>+	i2c-mux@73 {</div><div class='add'>+		compatible = "nxp,pca9544";</div><div class='add'>+		reg = &lt;0x73&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		idle-state = &lt;0&gt;;</div><div class='ctx'> 		i2c-mux-idle-disconnect;</div><div class='del'>-		reg = &lt;0x71&gt;;</div><div class='ctx'> </div><div class='del'>-		i2c@0 {</div><div class='add'>+		imux32: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			adc@35 {</div><div class='add'>+				compatible = "maxim,max11617";</div><div class='add'>+				reg = &lt;0x35&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux33: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			adc@35 {</div><div class='add'>+				compatible = "maxim,max11617";</div><div class='add'>+				reg = &lt;0x35&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@74 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+		imux30: i2c@0 {</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			adc@1f {</div><div class='ctx'> 				compatible = "ti,adc128d818";</div><div class='ctx'> 				reg = &lt;0x1f&gt;;</div><div class='del'>-				ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+				ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@20{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@20 {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			gpio@22{</div><div class='add'>+			gpio@22 {</div><div class='ctx'> 				compatible = "ti,tca6424";</div><div class='ctx'> 				reg = &lt;0x22&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@23{</div><div class='del'>-				compatible = "max31790";</div><div class='del'>-				reg = &lt;0x23&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='add'>+			pwm@2f {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='add'>+				reg = &lt;0x2f&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			adc@33 {</div><div class='hunk'>@@ -499,34 +1223,32 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c@1 {</div><div class='add'>+		imux31: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			adc@1f {</div><div class='ctx'> 				compatible = "ti,adc128d818";</div><div class='ctx'> 				reg = &lt;0x1f&gt;;</div><div class='del'>-				ti,mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+				ti,mode = /bits/ 8 &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@20{</div><div class='del'>-				compatible = "max31790";</div><div class='add'>+			pwm@20 {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			gpio@22{</div><div class='add'>+			gpio@22 {</div><div class='ctx'> 				compatible = "ti,tca6424";</div><div class='ctx'> 				reg = &lt;0x22&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pwm@23{</div><div class='del'>-				compatible = "max31790";</div><div class='del'>-				reg = &lt;0x23&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='add'>+			pwm@2f {</div><div class='add'>+				compatible = "maxim,max31790";</div><div class='add'>+				reg = &lt;0x2f&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			adc@33 {</div><div class='hunk'>@@ -549,56 +1271,89 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	i2c-mux@73 {</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	bus-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	mctp@10 {</div><div class='add'>+		compatible = "mctp-i2c-controller";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='ctx'> 		compatible = "nxp,pca9544";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		idle-state = &lt;0&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-		reg = &lt;0x73&gt;;</div><div class='del'>-</div><div class='del'>-		i2c@0 {</div><div class='add'>+		imux24: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-			adc@35 {</div><div class='del'>-				compatible = "maxim,max11617";</div><div class='del'>-				reg = &lt;0x35&gt;;</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c@1 {</div><div class='add'>+		imux25: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-			adc@35 {</div><div class='del'>-				compatible = "maxim,max11617";</div><div class='del'>-				reg = &lt;0x35&gt;;</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;i2c15 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mctp-controller;</div><div class='del'>-	multi-master;</div><div class='del'>-	bus-frequency = &lt;400000&gt;;</div><div class='add'>+		imux26: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	mctp@10 {</div><div class='del'>-		compatible = "mctp-i2c-controller";</div><div class='del'>-		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='del'>-	};</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	i2c-mux@72 {</div><div class='del'>-		compatible = "nxp,pca9544";</div><div class='del'>-		idle-state = &lt;0&gt;;</div><div class='del'>-		i2c-mux-idle-disconnect;</div><div class='del'>-		reg = &lt;0x72&gt;;</div><div class='add'>+		imux27: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			mctp-controller;</div><div class='add'>+			temperature-sensor@1f {</div><div class='add'>+				compatible = "ti,tmp421";</div><div class='add'>+				reg = &lt;0x1f&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@50 {</div><div class='add'>+				compatible = "atmel,24c64";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -612,10 +1367,10 @@</div><div class='ctx'> </div><div class='ctx'> &amp;adc1 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_adc8_default &amp;pinctrl_adc9_default&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc8_default &amp;pinctrl_adc9_default</div><div class='add'>+			&amp;pinctrl_adc15_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> &amp;ehci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts<br/>index dfe5cc3edb52..bc4c46235421 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts</a></div><div class='hunk'>@@ -207,7 +207,8 @@</div><div class='ctx'> 	/*F0-F7*/	"","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","",</div><div class='ctx'> 			"factory-reset-toggle","",</div><div class='ctx'> 	/*G0-G7*/	"","","","","","","","",</div><div class='del'>-	/*H0-H7*/	"","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",</div><div class='add'>+	/*H0-H7*/	"","led-bmc-ingraham0","led-rear-enc-id0","led-rear-enc-fault0","","","",</div><div class='add'>+			"",</div><div class='ctx'> 	/*I0-I7*/	"","","","","","","bmc-secure-boot","",</div><div class='ctx'> 	/*J0-J7*/	"","","","","","","","",</div><div class='ctx'> 	/*K0-K7*/	"","","","","","","","",</div><div class='hunk'>@@ -215,7 +216,7 @@</div><div class='ctx'> 	/*M0-M7*/	"","","","","","","","",</div><div class='ctx'> 	/*N0-N7*/	"","","","","","","","",</div><div class='ctx'> 	/*O0-O7*/	"","","","usb-power","","","","",</div><div class='del'>-	/*P0-P7*/	"","","","","pcieslot-power","","","",</div><div class='add'>+	/*P0-P7*/	"","","","","led-pcieslot-power","","","",</div><div class='ctx'> 	/*Q0-Q7*/	"cfam-reset","","regulator-standby-faulted","","","","","",</div><div class='ctx'> 	/*R0-R7*/	"bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","",</div><div class='ctx'> 			"",</div><div class='hunk'>@@ -739,7 +740,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm10";</div><div class='hunk'>@@ -747,7 +748,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm11";</div><div class='hunk'>@@ -755,7 +756,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm12";</div><div class='hunk'>@@ -763,7 +764,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm13";</div><div class='hunk'>@@ -771,7 +772,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm14";</div><div class='hunk'>@@ -779,7 +780,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm15";</div><div class='hunk'>@@ -876,7 +877,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm26";</div><div class='hunk'>@@ -884,7 +885,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm27";</div><div class='hunk'>@@ -892,7 +893,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm28";</div><div class='hunk'>@@ -900,7 +901,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm29";</div><div class='hunk'>@@ -908,7 +909,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm30";</div><div class='hunk'>@@ -916,7 +917,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm31";</div><div class='hunk'>@@ -1005,7 +1006,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot7";</div><div class='hunk'>@@ -1013,7 +1014,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot8";</div><div class='hunk'>@@ -1021,7 +1022,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot9";</div><div class='hunk'>@@ -1029,7 +1030,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot10";</div><div class='hunk'>@@ -1037,7 +1038,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot11";</div><div class='hunk'>@@ -1045,7 +1046,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "tpm-wilson";</div><div class='hunk'>@@ -1231,8 +1232,9 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		gpio-line-names =</div><div class='del'>-			"", "", "", "", "", "", "", "",</div><div class='del'>-			"", "", "", "", "", "", "power-config-full-load", "";</div><div class='add'>+			"", "", "", "", "", "", "P10_DCM0_PRES", "P10_DCM1_PRES",</div><div class='add'>+			"", "", "", "", "PRESENT_VRM_DCM0_N", "PRESENT_VRM_DCM1_N",</div><div class='add'>+			"power-config-full-load", "";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	led-controller@61 {</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts<br/>index 7364adc6b80d..2f5d4075a64a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-bonnell.dts</a></div><div class='hunk'>@@ -155,7 +155,7 @@</div><div class='ctx'> 		/*Y0-Y7*/	"","","","","","","","",</div><div class='ctx'> 		/*Z0-Z7*/	"","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	usb_power {</div><div class='add'>+	usb-power-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts<br/>index 513077a1f4be..9f144f527f03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts</a></div><div class='hunk'>@@ -312,7 +312,7 @@</div><div class='ctx'> 	/*Y0-Y7*/	"","","","","","","","",</div><div class='ctx'> 	/*Z0-Z7*/   "","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	usb_power {</div><div class='add'>+	usb-power-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='hunk'>@@ -353,6 +353,33 @@</div><div class='ctx'> 			"presence-base-op",</div><div class='ctx'> 			"";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	led-controller@63 {</div><div class='add'>+		compatible = "nxp,pca9552";</div><div class='add'>+		reg = &lt;0x63&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"presence-vrm-c12",</div><div class='add'>+			"presence-vrm-c13",</div><div class='add'>+			"presence-vrm-c15",</div><div class='add'>+			"presence-vrm-c16",</div><div class='add'>+			"presence-vrm-c17",</div><div class='add'>+			"presence-vrm-c18",</div><div class='add'>+			"presence-vrm-c20",</div><div class='add'>+			"presence-vrm-c21",</div><div class='add'>+			"presence-vrm-c54",</div><div class='add'>+			"presence-vrm-c55",</div><div class='add'>+			"presence-vrm-c57",</div><div class='add'>+			"presence-vrm-c58",</div><div class='add'>+			"presence-vrm-c59",</div><div class='add'>+			"presence-vrm-c60",</div><div class='add'>+			"presence-vrm-c62",</div><div class='add'>+			"presence-vrm-c63";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -2781,6 +2808,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam4_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2797,6 +2825,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam4_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2813,8 +2842,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam4_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2830,8 +2859,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam4_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3154,6 +3183,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam5_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3170,6 +3200,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam5_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3186,8 +3217,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam5_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3203,8 +3234,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam5_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3527,6 +3558,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam6_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3543,6 +3575,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam6_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3559,8 +3592,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam6_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3576,8 +3609,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam6_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3900,6 +3933,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam7_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3916,6 +3950,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam7_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3932,8 +3967,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam7_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3949,8 +3984,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam7_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible = "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts<br/>index c24e464e5faa..9a43fc7bcebe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-fuji.dts</a></div><div class='hunk'>@@ -355,6 +355,33 @@</div><div class='ctx'> 			"presence-base-op",</div><div class='ctx'> 			"";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	led-controller@63 {</div><div class='add'>+		compatible = "nxp,pca9552";</div><div class='add'>+		reg = &lt;0x63&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"presence-vrm-c12",</div><div class='add'>+			"presence-vrm-c13",</div><div class='add'>+			"presence-vrm-c15",</div><div class='add'>+			"presence-vrm-c16",</div><div class='add'>+			"presence-vrm-c17",</div><div class='add'>+			"presence-vrm-c18",</div><div class='add'>+			"presence-vrm-c20",</div><div class='add'>+			"presence-vrm-c21",</div><div class='add'>+			"presence-vrm-c54",</div><div class='add'>+			"presence-vrm-c55",</div><div class='add'>+			"presence-vrm-c57",</div><div class='add'>+			"presence-vrm-c58",</div><div class='add'>+			"presence-vrm-c59",</div><div class='add'>+			"presence-vrm-c60",</div><div class='add'>+			"presence-vrm-c62",</div><div class='add'>+			"presence-vrm-c63";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -949,7 +976,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot-c10";</div><div class='hunk'>@@ -957,7 +984,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "pcieslot-c11";</div><div class='hunk'>@@ -1058,7 +1085,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm10";</div><div class='hunk'>@@ -1066,7 +1093,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm11";</div><div class='hunk'>@@ -1074,7 +1101,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm12";</div><div class='hunk'>@@ -1082,7 +1109,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm13";</div><div class='hunk'>@@ -1090,7 +1117,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm14";</div><div class='hunk'>@@ -1098,7 +1125,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm15";</div><div class='hunk'>@@ -1195,7 +1222,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm26";</div><div class='hunk'>@@ -1203,7 +1230,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm27";</div><div class='hunk'>@@ -1211,7 +1238,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm28";</div><div class='hunk'>@@ -1219,7 +1246,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm29";</div><div class='hunk'>@@ -1227,7 +1254,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm30";</div><div class='hunk'>@@ -1235,7 +1262,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm31";</div><div class='hunk'>@@ -1332,7 +1359,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm42";</div><div class='hunk'>@@ -1340,7 +1367,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm43";</div><div class='hunk'>@@ -1348,7 +1375,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm44";</div><div class='hunk'>@@ -1356,7 +1383,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm45";</div><div class='hunk'>@@ -1364,7 +1391,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm46";</div><div class='hunk'>@@ -1372,7 +1399,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm47";</div><div class='hunk'>@@ -1469,7 +1496,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm58";</div><div class='hunk'>@@ -1477,7 +1504,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm59";</div><div class='hunk'>@@ -1485,7 +1512,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm60";</div><div class='hunk'>@@ -1493,7 +1520,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm61";</div><div class='hunk'>@@ -1501,7 +1528,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm62";</div><div class='hunk'>@@ -1509,7 +1536,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "ddimm63";</div><div class='hunk'>@@ -1598,7 +1625,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm6";</div><div class='hunk'>@@ -1606,7 +1633,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm7";</div><div class='hunk'>@@ -1614,7 +1641,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm12";</div><div class='hunk'>@@ -1622,7 +1649,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm13";</div><div class='hunk'>@@ -1630,7 +1657,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm14";</div><div class='hunk'>@@ -1638,7 +1665,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm15";</div><div class='hunk'>@@ -1727,7 +1754,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@10 {</div><div class='add'>+		led@a {</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm2";</div><div class='hunk'>@@ -1735,7 +1762,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@11 {</div><div class='add'>+		led@b {</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm3";</div><div class='hunk'>@@ -1743,7 +1770,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@12 {</div><div class='add'>+		led@c {</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm8";</div><div class='hunk'>@@ -1751,7 +1778,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@13 {</div><div class='add'>+		led@d {</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm9";</div><div class='hunk'>@@ -1759,7 +1786,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@14 {</div><div class='add'>+		led@e {</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm10";</div><div class='hunk'>@@ -1767,7 +1794,7 @@</div><div class='ctx'> 			type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@15 {</div><div class='add'>+		led@f {</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			default-state = "keep";</div><div class='ctx'> 			label = "vrm11";</div><div class='hunk'>@@ -2118,7 +2145,7 @@</div><div class='ctx'> 					type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				led@10 {</div><div class='add'>+				led@a {</div><div class='ctx'> 					reg = &lt;10&gt;;</div><div class='ctx'> 					default-state = "keep";</div><div class='ctx'> 					label = "fan0";</div><div class='hunk'>@@ -2126,7 +2153,7 @@</div><div class='ctx'> 					type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				led@11 {</div><div class='add'>+				led@b {</div><div class='ctx'> 					reg = &lt;11&gt;;</div><div class='ctx'> 					default-state = "keep";</div><div class='ctx'> 					label = "fan1";</div><div class='hunk'>@@ -2134,7 +2161,7 @@</div><div class='ctx'> 					type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				led@12 {</div><div class='add'>+				led@c {</div><div class='ctx'> 					reg = &lt;12&gt;;</div><div class='ctx'> 					default-state = "keep";</div><div class='ctx'> 					label = "fan2";</div><div class='hunk'>@@ -2142,7 +2169,7 @@</div><div class='ctx'> 					type = &lt;PCA955X_TYPE_LED&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				led@13 {</div><div class='add'>+				led@d {</div><div class='ctx'> 					reg = &lt;13&gt;;</div><div class='ctx'> 					default-state = "keep";</div><div class='ctx'> 					label = "fan3";</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts<br/>index 0776b72c2199..c5fb5d410001 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-rainier.dts</a></div><div class='hunk'>@@ -109,22 +109,22 @@</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='ctx'> 		/* BMC Card fault LED at the back */</div><div class='del'>-		bmc-ingraham0 {</div><div class='add'>+		led-bmc-ingraham0 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* Enclosure ID LED at the back */</div><div class='del'>-		rear-enc-id0 {</div><div class='add'>+		led-rear-enc-id0 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* Enclosure fault LED at the back */</div><div class='del'>-		rear-enc-fault0 {</div><div class='add'>+		led-rear-enc-fault0 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* PCIE slot power LED */</div><div class='del'>-		pcieslot-power {</div><div class='add'>+		led-pcieslot-power {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -203,7 +203,7 @@</div><div class='ctx'> 	/*E0-E7*/	"","","","","","","","",</div><div class='ctx'> 	/*F0-F7*/	"","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","",</div><div class='ctx'> 	/*G0-G7*/	"","","","","","","","",</div><div class='del'>-	/*H0-H7*/	"","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",</div><div class='add'>+	/*H0-H7*/	"","led-bmc-ingraham0","led-rear-enc-id0","led-rear-enc-fault0","","","","",</div><div class='ctx'> 	/*I0-I7*/	"","","","","","","bmc-secure-boot","",</div><div class='ctx'> 	/*J0-J7*/	"","","","","","","","",</div><div class='ctx'> 	/*K0-K7*/	"","","","","","","","",</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	/*M0-M7*/	"","","","","","","","",</div><div class='ctx'> 	/*N0-N7*/	"","","","","","","","",</div><div class='ctx'> 	/*O0-O7*/	"","","","usb-power","","","","",</div><div class='del'>-	/*P0-P7*/	"","","","","pcieslot-power","","","",</div><div class='add'>+	/*P0-P7*/	"","","","","led-pcieslot-power","","","",</div><div class='ctx'> 	/*Q0-Q7*/	"cfam-reset","","regulator-standby-faulted","","","","","",</div><div class='ctx'> 	/*R0-R7*/	"bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","",</div><div class='ctx'> 	/*S0-S7*/	"presence-ps0","presence-ps1","presence-ps2","presence-ps3",</div><div class='hunk'>@@ -224,14 +224,14 @@</div><div class='ctx'> 	/*Y0-Y7*/	"","","","","","","","",</div><div class='ctx'> 	/*Z0-Z7*/	"","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	i2c3_mux_oe_n {</div><div class='add'>+	i2c3-mux-oe-n-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "I2C3_MUX_OE_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb_power {</div><div class='add'>+	usb-power-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='hunk'>@@ -263,7 +263,7 @@</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	tca_pres1: tca9554@20{</div><div class='add'>+	tca_pres1: tca9554@20 {</div><div class='ctx'> 		compatible = "ti,tca9554";</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1280,8 +1280,9 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		gpio-line-names =</div><div class='del'>-			"", "", "", "", "", "", "", "",</div><div class='del'>-			"", "", "", "", "", "", "power-config-full-load", "";</div><div class='add'>+			"", "", "", "", "", "", "P10_DCM0_PRES", "P10_DCM1_PRES",</div><div class='add'>+			"", "", "", "", "PRESENT_VRM_DCM0_N", "PRESENT_VRM_DCM1_N",</div><div class='add'>+			"power-config-full-load", "";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pca_pres2: pca9552@61 {</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts<br/>new file mode 100644<br/>index 000000000000..dbadba8eb698<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts</a></div><div class='hunk'>@@ -0,0 +1,6086 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright 2024 IBM Corp.</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+#include "aspeed-g6.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "IBM SBP1";</div><div class='add'>+	compatible = "ibm,sbp1-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gfx_memory: framebuffer {</div><div class='add'>+			size = &lt;0x01000000&gt;;</div><div class='add'>+			alignment = &lt;0x01000000&gt;;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-power {</div><div class='add'>+			label = "LED_BMC_READY";</div><div class='add'>+			gpios = &lt;&amp;gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			retain-state-suspended;</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-tpm {</div><div class='add'>+			label = "LED_ID_TPM";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-bat {</div><div class='add'>+			label = "LED_ID_BAT";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-mgmt-port2 {</div><div class='add'>+			label = "LED_ID_MGMT_PORT2";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-mgmt-port1 {</div><div class='add'>+			label = "LED_ID_MGMT_PORT1";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-nic1-port1 {</div><div class='add'>+			label = "LED_ID_NIC1_PORT1";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-nic1-port2 {</div><div class='add'>+			label = "LED_ID_NIC1_PORT2";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-nic2-port1 {</div><div class='add'>+			label = "LED_ID_NIC2_PORT1";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-nic2-port2 {</div><div class='add'>+			label = "LED_ID_NIC2_PORT2";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-m2-ssd2 {</div><div class='add'>+			label = "LED_ID_M2_SSD2";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-m2-ssd1 {</div><div class='add'>+			label = "LED_ID_M2_SSD1";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 37 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dwr-frnt-p {</div><div class='add'>+			label = "LED_ID_DWR_FRNT_P";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 37 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+</div><div class='add'>+			default-state = "on";</div><div class='add'>+			retain-state-suspended;</div><div class='add'>+			retain-state-shutdown;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-pwr-dwr-frnt {</div><div class='add'>+			label = "LED_PWR_DWR_FRNT";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+</div><div class='add'>+			retain-state-suspended;</div><div class='add'>+			retain-state-shutdown;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-pwr-dwr-back {</div><div class='add'>+			label = "LED_PWR_DWR_BACK";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+</div><div class='add'>+			retain-state-suspended;</div><div class='add'>+			retain-state-shutdown;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dwr-back-p {</div><div class='add'>+			label = "LED_ID_DWR_BACK_P";</div><div class='add'>+			gpios = &lt;&amp;smb_pex_vr_ctrl 35 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+</div><div class='add'>+			default-state = "on";</div><div class='add'>+			retain-state-suspended;</div><div class='add'>+			retain-state-shutdown;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-cpu0 {</div><div class='add'>+			label = "LED_ID_CPU0";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 39 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-cpu1 {</div><div class='add'>+			label = "LED_ID_CPU1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 39 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-cpu2 {</div><div class='add'>+			label = "LED_ID_CPU2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 39 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-cpu3 {</div><div class='add'>+			label = "LED_ID_CPU3";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 39 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0e2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0E2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0e1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0E1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0f2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0F2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0f1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0F1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0g2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0G2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0g1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0G1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0h2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0H2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0h1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0H1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0a2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0A2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0a1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0A1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0b2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0B2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0b1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0B1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0c2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0C2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0c1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0C1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0d2 {</div><div class='add'>+			label = "LED_ID_DIMM_C0D2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c0d1 {</div><div class='add'>+			label = "LED_ID_DIMM_C0D1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu0_led 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1e2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1E2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1e1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1E1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1f2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1F2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1f1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1F1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1g2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1G2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1g1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1G1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1h2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1H2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1h1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1H1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1a2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1A2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1a1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1A1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1b2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1B2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1b1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1B1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1c2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1C2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1c1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1C1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1d2 {</div><div class='add'>+			label = "LED_ID_DIMM_C1D2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c1d1 {</div><div class='add'>+			label = "LED_ID_DIMM_C1D1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu1_led 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2e2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2E2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2e1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2E1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2f2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2F2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2f1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2F1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2g2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2G2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2g1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2G1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2h2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2H2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2h1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2H1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2a2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2A2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2a1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2A1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2b2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2B2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2b1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2B1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2c2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2C2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2c1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2C1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2d2 {</div><div class='add'>+			label = "LED_ID_DIMM_C2D2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c2d1 {</div><div class='add'>+			label = "LED_ID_DIMM_C2D1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu2_led 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3e2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3E2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3e1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3E1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3f2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3F2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3f1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3F1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3g2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3G2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3g1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3G1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3h2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3H2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3h1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3H1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3a2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3A2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3a1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3A1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3b2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3B2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3b1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3B1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3c2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3C2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3c1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3C1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3d2 {</div><div class='add'>+			label = "LED_ID_DIMM_C3D2";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-c3d1 {</div><div class='add'>+			label = "LED_ID_DIMM_C3D1";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_cpu3_led 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd01 {</div><div class='add'>+			label = "LED_ID_RSSD01";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd02 {</div><div class='add'>+			label = "LED_ID_RSSD02";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd03 {</div><div class='add'>+			label = "LED_ID_RSSD03";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd04 {</div><div class='add'>+			label = "LED_ID_RSSD04";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd05 {</div><div class='add'>+			label = "LED_ID_RSSD05";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd06 {</div><div class='add'>+			label = "LED_ID_RSSD06";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd07 {</div><div class='add'>+			label = "LED_ID_RSSD07";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd08 {</div><div class='add'>+			label = "LED_ID_RSSD08";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd09 {</div><div class='add'>+			label = "LED_ID_RSSD09";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd10 {</div><div class='add'>+			label = "LED_ID_RSSD10";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd11 {</div><div class='add'>+			label = "LED_ID_RSSD11";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd12 {</div><div class='add'>+			label = "LED_ID_RSSD12";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd13 {</div><div class='add'>+			label = "LED_ID_RSSD13";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd14 {</div><div class='add'>+			label = "LED_ID_RSSD14";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd15 {</div><div class='add'>+			label = "LED_ID_RSSD15";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd16 {</div><div class='add'>+			label = "LED_ID_RSSD16";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd17 {</div><div class='add'>+			label = "LED_ID_RSSD17";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd18 {</div><div class='add'>+			label = "LED_ID_RSSD18";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd19 {</div><div class='add'>+			label = "LED_ID_RSSD19";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd20 {</div><div class='add'>+			label = "LED_ID_RSSD20";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd21 {</div><div class='add'>+			label = "LED_ID_RSSD21";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd22 {</div><div class='add'>+			label = "LED_ID_RSSD22";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd23 {</div><div class='add'>+			label = "LED_ID_RSSD23";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd24 {</div><div class='add'>+			label = "LED_ID_RSSD24";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd25 {</div><div class='add'>+			label = "LED_ID_RSSD25";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd26 {</div><div class='add'>+			label = "LED_ID_RSSD26";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd27 {</div><div class='add'>+			label = "LED_ID_RSSD27";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd28 {</div><div class='add'>+			label = "LED_ID_RSSD28";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd29 {</div><div class='add'>+			label = "LED_ID_RSSD29";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd30 {</div><div class='add'>+			label = "LED_ID_RSSD30";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd31 {</div><div class='add'>+			label = "LED_ID_RSSD31";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-dimm-rssd32 {</div><div class='add'>+			label = "LED_ID_RSSD32";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm01 {</div><div class='add'>+			label = "LED_ID_FAN_ASM01";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm02 {</div><div class='add'>+			label = "LED_ID_FAN_ASM02";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm03 {</div><div class='add'>+			label = "LED_ID_FAN_ASM03";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm04 {</div><div class='add'>+			label = "LED_ID_FAN_ASM04";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm05 {</div><div class='add'>+			label = "LED_ID_FAN_ASM05";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm06 {</div><div class='add'>+			label = "LED_ID_FAN_ASM06";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd01_16 37 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm07 {</div><div class='add'>+			label = "LED_ID_FAN_ASM07";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm08 {</div><div class='add'>+			label = "LED_ID_FAN_ASM08";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm09 {</div><div class='add'>+			label = "LED_ID_FAN_ASM09";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm10 {</div><div class='add'>+			label = "LED_ID_FAN_ASM10";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm11 {</div><div class='add'>+			label = "LED_ID_FAN_ASM11";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-id-fan-asm12 {</div><div class='add'>+			label = "LED_ID_FAN_ASM12";</div><div class='add'>+			gpios = &lt;&amp;smb_svc_pex_rssd17_32 37 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;p12v_vd 0&gt;, &lt;&amp;p5v_aux_vd 0&gt;, &lt;&amp;p5v_bmc_aux_vd 0&gt;, &lt;&amp;p3v3_aux_vd 0&gt;,</div><div class='add'>+			&lt;&amp;p3v3_bmc_aux_vd 0&gt;, &lt;&amp;p1v8_bmc_aux_vd 0&gt;, &lt;&amp;adc1 4&gt;, &lt;&amp;adc0 2&gt;, &lt;&amp;adc1 0&gt;,</div><div class='add'>+			&lt;&amp;p2V5_aux_vd 0&gt;, &lt;&amp;p3v3_rtc_vd 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v_vd: voltage-divider1 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc1 3&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 1127/127 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;15&gt;;</div><div class='add'>+		full-ohms = &lt;133&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p5v_aux_vd: voltage-divider2 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc1 5&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 1365/365 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;50&gt;;</div><div class='add'>+		full-ohms = &lt;187&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p5v_bmc_aux_vd: voltage-divider3 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc0 3&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 1365/365 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;50&gt;;</div><div class='add'>+		full-ohms = &lt;187&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3_aux_vd: voltage-divider4 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc1 2&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 1698/698 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;14&gt;;</div><div class='add'>+		full-ohms = &lt;34&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3_bmc_aux_vd: voltage-divider5 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc0 7&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 1698/698 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;14&gt;;</div><div class='add'>+		full-ohms = &lt;34&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8_bmc_aux_vd: voltage-divider6 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc0 6&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 4000/3000 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;3&gt;;</div><div class='add'>+		full-ohms = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p2V5_aux_vd: voltage-divider7 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc1 1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 2100/1100 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;11&gt;;</div><div class='add'>+		full-ohms = &lt;21&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3_rtc_vd: voltage-divider8 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		io-channels = &lt;&amp;adc1 7&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Scale the system voltage by 231000/100000 to fit the ADC range.</div><div class='add'>+		 * Use small nominator to prevent integer overflow.</div><div class='add'>+		 */</div><div class='add'>+		output-ohms = &lt;100&gt;;</div><div class='add'>+		full-ohms = &lt;231&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermistor0: thermistor-0 {</div><div class='add'>+		compatible = "epcos,b57891s0103";</div><div class='add'>+		pullup-uv = &lt;3300000&gt;;</div><div class='add'>+		pullup-ohm = &lt;10000&gt;;</div><div class='add'>+		pulldown-ohm = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;adc0 0&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermistor1: thermistor-1 {</div><div class='add'>+		compatible = "epcos,b57891s0103";</div><div class='add'>+		pullup-uv = &lt;3300000&gt;;</div><div class='add'>+		pullup-ohm = &lt;10000&gt;;</div><div class='add'>+		pulldown-ohm = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;adc0 1&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermistor2: thermistor-2 {</div><div class='add'>+		compatible = "epcos,b57891s0103";</div><div class='add'>+		pullup-uv = &lt;3300000&gt;;</div><div class='add'>+		pullup-ohm = &lt;10000&gt;;</div><div class='add'>+		pulldown-ohm = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;adc0 4&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermistor3: thermistor-3 {</div><div class='add'>+		compatible = "epcos,b57891s0103";</div><div class='add'>+		pullup-uv = &lt;3300000&gt;;</div><div class='add'>+		pullup-ohm = &lt;10000&gt;;</div><div class='add'>+		pulldown-ohm = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;adc0 5&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v: fixedregulator-p12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p12v";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3_bmc_aux: fixedregulator-p3v3-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p3v3_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p1v8_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v2_bmc_aux: fixedregulator-p1v2-bmc-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "p1v2_bmc_aux";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v-a-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p12v_a&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v-b-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p12v_b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v-c-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p12v_c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p12v-d-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p12v_d&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccinfaon-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccinfaon_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvnn-main-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvnn_main_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccin-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccin_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-fivra-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_fivra_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccd-hv-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccd_hv_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvpp-hbm-cpu0-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvpp_hbm_cpu0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccinfaon-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccinfaon_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvnn-main-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvnn_main_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccin-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccin_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-fivra-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_fivra_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccd-hv-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccd_hv_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvpp-hbm-cpu1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvpp_hbm_cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccinfaon-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccinfaon_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvnn-main-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvnn_main_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccin-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccin_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-fivra-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_fivra_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccd-hv-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccd_hv_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvpp-hbm-cpu2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvpp_hbm_cpu2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccinfaon-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccinfaon_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvnn-main-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvnn_main_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccin-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccin_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccfa-ehv-fivra-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccfa_ehv_fivra_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvccd-hv-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvccd_hv_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvpp-hbm-cpu3-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvpp_hbm_cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v05-pch-aux-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p1v05_pch_aux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8-pch-aux-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p1v8_pch_aux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3-pch-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p3v3_pch&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p5v-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb-m2-ssb-ssd2 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_smb_m2_ssb_ssd2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smb-m2-ssb-ssd1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_smb_m2_ssb_ssd1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd01-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd01&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd01-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd01&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd02-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd02&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd02-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd02&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd03-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd03&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd03-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd03&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd04-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd04-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd05-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd05&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd05-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd05&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd06-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd06&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd06-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd06&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd07-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd07&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd07-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd07&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd08-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd08&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd08-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd08&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd09-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd09&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd09-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd09&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd10-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd10&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd10-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd10&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd11-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd11&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd11-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd11&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd12-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd12-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd13-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd13-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd14-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd14&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd14-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd14&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd15-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd15&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd15-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd15&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd16-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd16-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd17-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd17&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd17-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd17&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd18-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd18&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd18-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd18&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd19-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd19&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd19-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd19&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd20-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd20-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd21-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd21&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd21-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd21&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd22-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd22&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd22-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd22&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd23-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd23&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd23-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd23&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd24-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd24-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd24&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd25-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd25&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd25-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd25&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd26-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd26&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd26-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd26&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd27-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd27&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd27-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd27&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd28-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd28&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd28-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd28&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd29-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd29&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd29-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd29&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd30-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd30&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd30-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd30&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd31-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd31&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd31-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd31&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd32-sw0 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw0_ssb_rssd32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssb-rssd32-sw1 {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;sw1_ssb_rssd32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3v3-nic-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p3v3_nic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v8-nic-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p1v8_nic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p1v2-nic-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;p1v2_nic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvcore-nic1-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvcore_nic1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pvcore-nic2-consumer {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;pvcore_nic2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;peci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vuart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpc_snoop {</div><div class='add'>+	status = "okay";</div><div class='add'>+	snoop-ports = &lt;0x80&gt;, &lt;0x81&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "bmc";</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+#include "openbmc-flash-layout-64.dtsi"</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flash@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		label = "alt-bmc";</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+#include "openbmc-flash-layout-64-alt.dtsi"</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_txd1_default</div><div class='add'>+			&amp;pinctrl_rxd1_default</div><div class='add'>+			&amp;pinctrl_nrts1_default</div><div class='add'>+			&amp;pinctrl_ndtr1_default</div><div class='add'>+			&amp;pinctrl_ndsr1_default</div><div class='add'>+			&amp;pinctrl_ncts1_default</div><div class='add'>+			&amp;pinctrl_ndcd1_default</div><div class='add'>+			&amp;pinctrl_nri1_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;video {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vhub {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_vgahs_default &amp;pinctrl_vgavs_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy2: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(V, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;300&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy3: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;300&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii3_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy3&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii4_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vref-supply = &lt;&amp;p1v8_bmc_aux&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc0_default</div><div class='add'>+		     &amp;pinctrl_adc1_default</div><div class='add'>+		     &amp;pinctrl_adc2_default</div><div class='add'>+		     &amp;pinctrl_adc3_default</div><div class='add'>+		     &amp;pinctrl_adc4_default</div><div class='add'>+		     &amp;pinctrl_adc5_default</div><div class='add'>+		     &amp;pinctrl_adc6_default</div><div class='add'>+		     &amp;pinctrl_adc7_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vref-supply = &lt;&amp;p1v8_bmc_aux&gt;;</div><div class='add'>+	aspeed,battery-sensing;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_adc8_default</div><div class='add'>+		     &amp;pinctrl_adc9_default</div><div class='add'>+		     &amp;pinctrl_adc10_default</div><div class='add'>+		     &amp;pinctrl_adc11_default</div><div class='add'>+		     &amp;pinctrl_adc12_default</div><div class='add'>+		     &amp;pinctrl_adc13_default</div><div class='add'>+		     &amp;pinctrl_adc15_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;kcs3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	aspeed,lpc-io-reg = &lt;0xca2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	/* A0 - A7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* B0 - B7 */</div><div class='add'>+	"", "", "FM_ADR_TRIGGER_R_N", "RST_PLTRST_BUF_N", "BMC_TPM_RESET_N", "BMC_TPM_IRQ_N",</div><div class='add'>+	"PCH_TPM_RESET_N", "PCH_TPM_IRQ_N",</div><div class='add'>+	/* C0 - C7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* D0 - D7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* E0 - E7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* F0 - F7 */</div><div class='add'>+	"", "", "", "BMC_MUX_CPU1_RST_INT_N", "BMC_MUX_CPU2_RST_INT_N", "", "", "",</div><div class='add'>+	/* G0 - G7 */</div><div class='add'>+	"FM_SSD_CLK_DRVR1_EN", "FM_CK440Q_DEV_EN", "BMC_MAC1_RESET_N", "FM_DB2000_DEV_EN",</div><div class='add'>+	"FM_CPU_RMCA_LVT3_N", "FM_CPU_CATERR_LVT3_N", "FM_DBP_PRESENT_N", "",</div><div class='add'>+	/* H0 - H7 */</div><div class='add'>+	"SMB_SVC_PEX_RSSD17_32_INT", "LED_BMC_RDY", "RST_DBP_N", "", "", "", "", "",</div><div class='add'>+	/* I0 - I7 */</div><div class='add'>+	"JTAG_MUX_MODE_SEL", "JTAG_MUX_TRANS_ENBL", "JTAG_MUX_LSP_SEL5", "JTAG_MUX_MSTR_SEL",</div><div class='add'>+	"JTAG_MUX_LSP_SEL3", "", "JTAG_MUX_ENBL_N", "JTAG_MUX_RST_N",</div><div class='add'>+	/* J0 - J7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* K0 - K7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* L0 - L7 */</div><div class='add'>+	"", "", "", "", "RST_RTCRST_N", "RST_SRTCRST_N", "", "",</div><div class='add'>+	/* M0 - M7 */</div><div class='add'>+	"BMC_UART1_CTS_N", "BMC_UART1_DCD_N", "BMC_UART1_DSR_N", "BMC_UART1_RI_N",</div><div class='add'>+	"BMC_UART1_DTR_N", "BMC_UART1_RTS_N", "", "",</div><div class='add'>+	/* N0 - N7 */</div><div class='add'>+	"IRQ_BMC_PCH_NMI", "", "FM_PCH_BMC_THERMTRIP_N", "FM_BIOS_POST_CMPLT_N", "RST_PLTRST_N",</div><div class='add'>+	"FM_FLASH_SEC_OVRD", "FM_SMI_ACTIVE_N", "PWRGD_DBP",</div><div class='add'>+	/* O0 - O7 */</div><div class='add'>+	"CATERR_CPU2_EN", "H_LVT1_THERMTRIP_N", "CATERR_CPU3_EN", "SMB_SVC_PEX_CPU0_LED_INT",</div><div class='add'>+	"H_LVT1_MEMTRIP_N", "", "CATERR_CPU1_EN", "FM_PCH_ADR_COMPLETE_N",</div><div class='add'>+	/* P0 - P7 */</div><div class='add'>+	"PWRGD_SYS_PWROK", "PWRGD_PCH_PWROK", "BMC_MUX_CPU3_RST_INT_N", "BMC_MUX_SVC_RSSD_INT",</div><div class='add'>+	"FM_SLPS4_N", "IRQ_SML0_ALERT_N", "FM_SLPS3_N", "LED_BMC_HB",</div><div class='add'>+	/* Q0 - Q7 */</div><div class='add'>+	"", "PEX_BMC_RST", "PEX_VR_CTRL_RST", "PEX_NIC_RST", "PEX_CPU0_LED_RST", "PEX_CPU1_LED_RST",</div><div class='add'>+	"PEX_CPU2_LED_RST", "PEX_CPU3_LED_RST",</div><div class='add'>+	/* R0 - R7 */</div><div class='add'>+	"BMC_MUX_FANSSB_RSSD17_32_RST_INT_N", "BMC_MUX_FANPWM_RSSD01_16_RST_INT_N",</div><div class='add'>+	"BMC_MUX_SVC_VR_RST_INT_N", "BMC_MUX_NIC_RST_INT_N", "BMC_MUX_SVC_EXP_RST_INT_N",</div><div class='add'>+	"FM_CPU_ERR2_LVT3_N", "BMC_MUX_CPU0_RST_INT_N", "BMC_MUX_M2_RST_INT_N",</div><div class='add'>+	/* S0 - S7 */</div><div class='add'>+	"SMB_SVC_PEX_RSSD01_16_INT", "RST_PCH_RSMRST_R_N", "", "", "BMC_ROT_FPGA_RESET_N",</div><div class='add'>+	"FM_SSD_CLK_DRVR0_EN", "", "",</div><div class='add'>+	/* T0 - T7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* U0 - U7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* V0 - V7 */</div><div class='add'>+	"BMC_PEX_IRQ_INT", "RTC_BATT_TEST", "SMB_PEX_VR_CTRL_INT", "SMB_SVC_PEX_CPU3_LED_INT",</div><div class='add'>+	"PWRGD_CPUPWRGD", "SMB_SVC_PEX_CPU2_LED_INT", "SMB_SVC_PEX_CPU1_LED_INT",</div><div class='add'>+	"BMC_MAC0_RESET_N",</div><div class='add'>+	/* W0 - W7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* X0 - X7 */</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	/* Y0 - Y7 */</div><div class='add'>+	"FM_THROTTLE_N", "FM_PASSWORD_CLEAR_N", "H_LVT3_CATERR_DLY_N", "FM_CPU_OL_INT_R_N", "", "",</div><div class='add'>+	"", "",</div><div class='add'>+	/* Z0 - Z7 */</div><div class='add'>+	"FM_CPU_ERR0_LVT3_N", "FM_CPU_ERR1_LVT3_N", "BMC_MUX_VR_PCH_CPU_RST_INT_N",</div><div class='add'>+	"JTAG_MUX_LSP_SEL1", "", "JTAG_MUX_LSP_SEL4", "JTAG_MUX_LSP_SEL2", "";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio0_unbiased_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl_gpio0_unbiased_default: gpio_default {</div><div class='add'>+		pins = "AB15", "AD14", "R23", "A18", "AD24", "AD15", "AE14", "AC15", "U25", "AA24",</div><div class='add'>+		       "V24", "W26", "AA23", "V26", "U24", "V25", "AE15", "C15", "F15";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bmc_mux_nic: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_nic: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9540";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;19 1&gt;, &lt;22 6&gt;, &lt;30 6&gt;, &lt;38 2&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"IRQ_NIC2_OVT_WRNG", "FM_NIC2_ALLSTANDBY_N", "IRQ_NIC2_OVT_SHTDN",</div><div class='add'>+				"SMB_VR_PVCORE_NIC2_ALERT_N", "FM_NIC2_PERST1_N",</div><div class='add'>+				"SMB_NIC2_ALERT_N", "FM_NIC2_PERST3_N", "FM_NIC2_PERST2_N",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"FM_NIC1_RST_N", "FM_NIC1_PERST0_N", "FM_NIC1_PERST2_N",</div><div class='add'>+				"FM_NIC1_PERST3_N", "SMB_NIC1_ALERT_N", "FM_NIC1_PERST1_N",</div><div class='add'>+				"SMB_VR_PVCORE_NIC1_ALERT_N", "IRQ_NIC1_OVT_SHTDN",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"SMB_VR_P3V3_NIC_ALERT_N", "FM_NIC2_FLASH_PRSNT",</div><div class='add'>+				"FM_NIC1_FLASH_PRSNT", "",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"FM_NIC2_PERST0_N", "FM_NIC2_RST_N", "", "", "", "", "", "",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"FM_NIC1_ALLSTANDBY_N", "IRQ_NIC1_OVT_WRNG", "", "", "", "", "", "",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"SMB_VR_P1V8_NIC_ALERT_N", "SMB_VR_P1V2_NIC_ALERT_N", "", "";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;U62160_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				U62160_pins: cfg-pins {</div><div class='add'>+					pins = "gp03", "gp16", "gp20", "gp50", "gp51";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvcore_nic2: ir38263-pvcore-nic2@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "pvcore_nic2";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvcore_nic1: ir38263-pvcore-nic1@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "pvcore_nic1";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			p3v3_nic: ir38263-p3v3-nic@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "p3v3_nic";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			p1v2_nic: ir38263-p1v2-nic@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "p1v2_nic";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			p1v8_nic: ir38263-p1v8-nic@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "p1v8_nic";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux1: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 7) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_m2_ssb_ssd1: regulator@3a {</div><div class='add'>+				compatible = "maxim,max5978";</div><div class='add'>+				reg = &lt;0x3a&gt;;</div><div class='add'>+				vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;30 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				leds {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					led@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						label = "m2_ssb_ssd1:green:power";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					sw0_smb_m2_ssb_ssd1: sw0 {</div><div class='add'>+						shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+						regulator-over-current-protection;</div><div class='add'>+						regulator-oc-protection-microamp = &lt;2800000&gt;;</div><div class='add'>+						regulator-name = "p3v3_m2_ssd1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;10000&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_m2_ssb_ssd2: regulator@3a {</div><div class='add'>+				compatible = "maxim,max5978";</div><div class='add'>+				reg = &lt;0x3a&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;39 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				leds {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					led@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						label = "m2_ssb_ssd2:green:power";</div><div class='add'>+						default-state = "off";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					sw0_smb_m2_ssb_ssd2: sw0 {</div><div class='add'>+						shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+						regulator-over-current-protection;</div><div class='add'>+						regulator-oc-protection-microamp = &lt;2800000&gt;;</div><div class='add'>+						regulator-name = "p3v3_m2_ssd2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;10000&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	bus-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+	bmc-slave@10 {</div><div class='add'>+		compatible = "ipmb-dev";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-protocol;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux2: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Z, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			p1v05_pch_aux: ir38263-p1v05-pch-aux@40 {</div><div class='add'>+				compatible = "infineon,ir38263";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "p1v05_pch_aux";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			p1v8_pch_aux: ir38060-p1v8-pch-aux@40 {</div><div class='add'>+				compatible = "infineon,ir38060";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-name = "p1v8_pch_aux";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+				vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux13: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 6) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_cpu0_event: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9540";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;smb_svc_pex_cpu0_led 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;14 2&gt;, &lt;21 1&gt;, &lt;25 3&gt;, &lt;33 1&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"PWRGD_CHD_CPU0", "PWRGD_CHC_CPU0",</div><div class='add'>+				"PWRGD_CHB_CPU0", "PWRGD_CHA_CPU0",</div><div class='add'>+				"PWRGD_CHE_CPU0", "PWRGD_CHF_CPU0",</div><div class='add'>+				"PWRGD_CHG_CPU0", "PWRGD_CHH_CPU0",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"SMB_VR_PVPP_HBM_CPU0_ALERT_N", "SMB_VR_PVCCINFAON_CPU0_ALERT_N",</div><div class='add'>+				"SMB_VR_PVNN_MAIN_CPU0_ALERT_N", "SMB_VR_PVCCD_HV_CPU0_ALERT_N",</div><div class='add'>+				"SMB_VR_PVCCIN_CPU0_ALERT_N", "SEL_SMB_DIMM_CPU0",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"PWRGD_LVC3_CPU0_AB_DRAM_G", "PWRGD_LVC3_CPU0_CD_DRAM_G",</div><div class='add'>+				"PWRGD_LVC3_CPU0_EF_DRAM_G", "PWRGD_LVC3_CPU0_GH_DRAM_G",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"FM_CPU0_DISABLE_COD_N", "",</div><div class='add'>+				"RST_LVC3_CPU0_RESET_N", "PWRGD_LVC3_CPU0_PWRGOOD",</div><div class='add'>+				"PWRGD_PLT_AUX_CPU0_LVT3", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"H_LVT3_CPU0_PROCHOT_N", "H_LVT3_CPU0_MEMHOT_IN_N",</div><div class='add'>+				"H_LVT3_CPU0_MEMHOT_OUT_N", "H_LVT3_CPU0_MEMTRIP_OUT_N",</div><div class='add'>+				"H_LVT3_CPU0_THERMTRIP_OUT_N", "",</div><div class='add'>+				"H_LVT3_CPU0_NMI", "FM_S3M_CPU0_CD_INIT_ERROR",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"FM_CPU0_PKG_ID0", "FM_CPU0_PKG_ID1",</div><div class='add'>+				"FM_CPU0_PROC_ID0", "FM_CPU0_PROC_ID1";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;U62080_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				U62080_pins: cfg-pins {</div><div class='add'>+					pins = "gp10", "gp11", "gp12", "gp13", "gp14";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvccinfaon-pvccfa-cpu0@58 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu0_event&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccinfaon_cpu0: vout0 {</div><div class='add'>+						regulator-name = "pvccinfaon_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_cpu0: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			tda38640-pvnn-main-cpu0@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu0_event&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvnn_main_cpu0: vout {</div><div class='add'>+						regulator-name = "pvnn_main_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			mp2973-pvccin-pvccfa-cpu0@58 {</div><div class='add'>+				compatible = "mps,mp2973";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu0_event&gt;;</div><div class='add'>+				interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccin_cpu0: vout0 {</div><div class='add'>+						regulator-name = "pvccin_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_fivra_cpu0: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_fivra_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvccd-hv-cpu0@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu0_event&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				infineon,en-pin-fixed-level;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccd_hv_cpu0: vout {</div><div class='add'>+						regulator-name = "pvccd_hv_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvpp-hbm-cpu0@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu0_event&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvpp_hbm_cpu0: vout {</div><div class='add'>+						regulator-name = "pvpp_hbm_cpu0";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux4: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(F, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_cpu1_event: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9540";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;smb_svc_pex_cpu1_led 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;14 2&gt;, &lt;21 1&gt;, &lt;25 3&gt;, &lt;33 1&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"PWRGD_CHD_CPU1", "PWRGD_CHC_CPU1",</div><div class='add'>+				"PWRGD_CHB_CPU1", "PWRGD_CHA_CPU1",</div><div class='add'>+				"PWRGD_CHE_CPU1", "PWRGD_CHF_CPU1",</div><div class='add'>+				"PWRGD_CHG_CPU1", "PWRGD_CHH_CPU1",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"SMB_VR_PVPP_HBM_CPU1_ALERT_N", "SMB_VR_PVCCINFAON_CPU1_ALERT_N",</div><div class='add'>+				"SMB_VR_PVNN_MAIN_CPU1_ALERT_N", "SMB_VR_PVCCD_HV_CPU1_ALERT_N",</div><div class='add'>+				"SMB_VR_PVCCIN_CPU1_ALERT_N", "SEL_SMB_DIMM_CPU1",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"PWRGD_LVC3_CPU1_AB_DRAM_G", "PWRGD_LVC3_CPU1_CD_DRAM_G",</div><div class='add'>+				"PWRGD_LVC3_CPU1_EF_DRAM_G", "PWRGD_LVC3_CPU1_GH_DRAM_G",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"FM_CPU1_DISABLE_COD_N", "",</div><div class='add'>+				"RST_LVC3_CPU1_RESET_N", "PWRGD_LVC3_CPU1_PWRGOOD",</div><div class='add'>+				"PWRGD_PLT_AUX_CPU1_LVT3", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"H_LVT3_CPU1_PROCHOT_N", "H_LVT3_CPU1_MEMHOT_IN_N",</div><div class='add'>+				"H_LVT3_CPU1_MEMHOT_OUT_N", "H_LVT3_CPU1_MEMTRIP_OUT_N",</div><div class='add'>+				"H_LVT3_CPU1_THERMTRIP_OUT_N", "",</div><div class='add'>+				"H_LVT3_CPU1_NMI", "FM_S3M_CPU1_CD_INIT_ERROR",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"FM_CPU1_PKG_ID0", "FM_CPU1_PKG_ID1",</div><div class='add'>+				"FM_CPU1_PROC_ID0", "FM_CPU1_PROC_ID1";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;U62090_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				U62090_pins: cfg-pins {</div><div class='add'>+					pins = "gp10", "gp11", "gp12", "gp13", "gp14";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvccinfaon-pvccfa-cpu1@58 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu1_event&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccinfaon_cpu1: vout0 {</div><div class='add'>+						regulator-name = "pvccinfaon_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_cpu1: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			tda38640-pvnn-main-cpu1@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu1_event&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvnn_main_cpu1: vout {</div><div class='add'>+						regulator-name = "pvnn_main_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			mp2973-pvccin-pvccfa-cpu1@58 {</div><div class='add'>+				compatible = "mps,mp2973";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu1_event&gt;;</div><div class='add'>+				interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccin_cpu1: vout0 {</div><div class='add'>+						regulator-name = "pvccin_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_fivra_cpu1: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_fivra_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvccd-hv-cpu1@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu1_event&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				infineon,en-pin-fixed-level;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccd_hv_cpu1: vout {</div><div class='add'>+						regulator-name = "pvccd_hv_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvpp-hbm-cpu1@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu1_event&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvpp_hbm_cpu1: vout {</div><div class='add'>+						regulator-name = "pvpp_hbm_cpu1";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux3: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_cpu2_event: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9540";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;smb_svc_pex_cpu2_led 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;14 2&gt;, &lt;21 1&gt;, &lt;25 3&gt;, &lt;33 1&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"PWRGD_CHD_CPU2", "PWRGD_CHC_CPU2",</div><div class='add'>+				"PWRGD_CHB_CPU2", "PWRGD_CHA_CPU2",</div><div class='add'>+				"PWRGD_CHE_CPU2", "PWRGD_CHF_CPU2",</div><div class='add'>+				"PWRGD_CHG_CPU2", "PWRGD_CHH_CPU2",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"SMB_VR_PVPP_HBM_CPU2_ALERT_N", "SMB_VR_PVCCINFAON_CPU2_ALERT_N",</div><div class='add'>+				"SMB_VR_PVNN_MAIN_CPU2_ALERT_N", "SMB_VR_PVCCD_HV_CPU2_ALERT_N",</div><div class='add'>+				"SMB_VR_PVCCIN_CPU2_ALERT_N", "SEL_SMB_DIMM_CPU2",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"PWRGD_LVC3_CPU2_AB_DRAM_G", "PWRGD_LVC3_CPU2_CD_DRAM_G",</div><div class='add'>+				"PWRGD_LVC3_CPU2_EF_DRAM_G", "PWRGD_LVC3_CPU2_GH_DRAM_G",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"FM_CPU2_DISABLE_COD_N", "",</div><div class='add'>+				"RST_LVC3_CPU2_RESET_N", "PWRGD_LVC3_CPU2_PWRGOOD",</div><div class='add'>+				"PWRGD_PLT_AUX_CPU2_LVT3", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"H_LVT3_CPU2_PROCHOT_N", "H_LVT3_CPU2_MEMHOT_IN_N",</div><div class='add'>+				"H_LVT3_CPU2_MEMHOT_OUT_N", "H_LVT3_CPU2_MEMTRIP_OUT_N",</div><div class='add'>+				"H_LVT3_CPU2_THERMTRIP_OUT_N", "",</div><div class='add'>+				"H_LVT3_CPU2_NMI", "FM_S3M_CPU2_CD_INIT_ERROR",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"FM_CPU2_PKG_ID0", "FM_CPU2_PKG_ID1",</div><div class='add'>+				"FM_CPU2_PROC_ID0", "FM_CPU2_PROC_ID1";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;U62100_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				U62100_pins: cfg-pins {</div><div class='add'>+					pins = "gp10", "gp11", "gp12", "gp13", "gp14";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvccinfaon-pvccfa-cpu2@58 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu2_event&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccinfaon_cpu2: vout0 {</div><div class='add'>+						regulator-name = "pvccinfaon_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_cpu2: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			tda38640-pvnn-main-cpu2@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu2_event&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvnn_main_cpu2: vout {</div><div class='add'>+						regulator-name = "pvnn_main_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			mp2973-pvccin-pvccfa-cpu2@58 {</div><div class='add'>+				compatible = "mps,mp2973";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu2_event&gt;;</div><div class='add'>+				interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccin_cpu2: vout0 {</div><div class='add'>+						regulator-name = "pvccin_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_fivra_cpu2: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_fivra_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvccd-hv-cpu2@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu2_event&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				infineon,en-pin-fixed-level;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccd_hv_cpu2: vout {</div><div class='add'>+						regulator-name = "pvccd_hv_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvpp-hbm-cpu2@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu2_event&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvpp_hbm_cpu2: vout {</div><div class='add'>+						regulator-name = "pvpp_hbm_cpu2";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux22: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_cpu3_event: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9540";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;smb_svc_pex_cpu3_led 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;14 2&gt;, &lt;21 1&gt;, &lt;25 3&gt;, &lt;33 1&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"PWRGD_CHD_CPU3", "PWRGD_CHC_CPU3",</div><div class='add'>+				"PWRGD_CHB_CPU3", "PWRGD_CHA_CPU3",</div><div class='add'>+				"PWRGD_CHE_CPU3", "PWRGD_CHF_CPU3",</div><div class='add'>+				"PWRGD_CHG_CPU3", "PWRGD_CHH_CPU3",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"SMB_VR_PVPP_HBM_CPU3_ALERT_N", "SMB_VR_PVCCINFAON_CPU3_ALERT_N",</div><div class='add'>+				"SMB_VR_PVNN_MAIN_CPU3_ALERT_N", "SMB_VR_PVCCD_HV_CPU3_ALERT_N",</div><div class='add'>+				"SMB_VR_PVCCIN_CPU3_ALERT_N", "SEL_SMB_DIMM_CPU3",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"PWRGD_LVC3_CPU3_AB_DRAM_G", "PWRGD_LVC3_CPU3_CD_DRAM_G",</div><div class='add'>+				"PWRGD_LVC3_CPU3_EF_DRAM_G", "PWRGD_LVC3_CPU3_GH_DRAM_G",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"FM_CPU3_DISABLE_COD_N", "",</div><div class='add'>+				"RST_LVC3_CPU3_RESET_N", "PWRGD_LVC3_CPU3_PWRGOOD",</div><div class='add'>+				"PWRGD_PLT_AUX_CPU3_LVT3", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"H_LVT3_CPU3_PROCHOT_N", "H_LVT3_CPU3_MEMHOT_IN_N",</div><div class='add'>+				"H_LVT3_CPU3_MEMHOT_OUT_N", "H_LVT3_CPU3_MEMTRIP_OUT_N",</div><div class='add'>+				"H_LVT3_CPU3_THERMTRIP_OUT_N", "",</div><div class='add'>+				"H_LVT3_CPU3_NMI", "FM_S3M_CPU3_CD_INIT_ERROR",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"FM_CPU3_PKG_ID0", "FM_CPU3_PKG_ID1",</div><div class='add'>+				"FM_CPU3_PROC_ID0", "FM_CPU3_PROC_ID1";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;U62110_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				U62110_pins: cfg-pins {</div><div class='add'>+					pins = "gp10", "gp11", "gp12", "gp13", "gp14";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pvccinfaon-pvccfa-cpu3@58 {</div><div class='add'>+				compatible = "mps,mp2971";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu3_event&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccinfaon_cpu3: vout0 {</div><div class='add'>+						regulator-name = "pvccinfaon_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_cpu3: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			tda38640-pvnn-main-cpu3@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu3_event&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvnn_main_cpu3: vout {</div><div class='add'>+						regulator-name = "pvnn_main_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			mp2973-pvccin-pvccfa-cpu3@58 {</div><div class='add'>+				compatible = "mps,mp2973";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu3_event&gt;;</div><div class='add'>+				interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccin_cpu3: vout0 {</div><div class='add'>+						regulator-name = "pvccin_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+					pvccfa_ehv_fivra_cpu3: vout1 {</div><div class='add'>+						regulator-name = "pvccfa_ehv_fivra_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvccd-hv-cpu3@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu3_event&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				infineon,en-pin-fixed-level;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvccd_hv_cpu3: vout {</div><div class='add'>+						regulator-name = "pvccd_hv_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			tda38640-pvpp-hbm-cpu3@40 {</div><div class='add'>+				compatible = "infineon,tda38640";</div><div class='add'>+				reg = &lt;0x40&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;smb_pex_cpu3_event&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+				regulators {</div><div class='add'>+					pvpp_hbm_cpu3: vout {</div><div class='add'>+						regulator-name = "pvpp_hbm_cpu3";</div><div class='add'>+						regulator-enable-ramp-delay = &lt;200&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux14: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 1) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux15: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 11 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux16: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 2 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux17: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 0 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux18: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 3 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux19: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 9 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_rssd17_32: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9560";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;bmc_pex_irq&gt;;</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;48 12&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"RSSD17_SMBRST_N", "RSSD18_SMBRST_N",</div><div class='add'>+				"RSSD19_SMBRST_N", "RSSD20_SMBRST_N",</div><div class='add'>+				"RSSD21_SMBRST_N", "RSSD22_SMBRST_N",</div><div class='add'>+				"RSSD23_SMBRST_N", "RSSD24_SMBRST_N",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"RSSD25_SMBRST_N", "RSSD26_SMBRST_N",</div><div class='add'>+				"RSSD27_SMBRST_N", "RSSD28_SMBRST_N",</div><div class='add'>+				"RSSD29_SMBRST_N", "RSSD30_SMBRST_N",</div><div class='add'>+				"RSSD31_SMBRST_N", "RSSD32_SMBRST_N",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"RSSD17_PWRDIS", "RSSD18_PWRDIS",</div><div class='add'>+				"RSSD19_PWRDIS", "RSSD20_PWRDIS",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"RSSD21_PWRDIS", "RSSD22_PWRDIS",</div><div class='add'>+				"RSSD23_PWRDIS", "RSSD24_PWRDIS",</div><div class='add'>+				"RSSD25_PWRDIS", "RSSD26_PWRDIS",</div><div class='add'>+				"RSSD27_PWRDIS", "RSSD28_PWRDIS",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"RSSD29_PWRDIS", "RSSD30_PWRDIS",</div><div class='add'>+				"RSSD31_PWRDIS", "RSSD32_PWRDIS",</div><div class='add'>+				"RSSD17_RESET_N", "RSSD18_RESET_N",</div><div class='add'>+				"RSSD19_RESET_N", "RSSD20_RESET_N",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"RSSD21_RESET_N", "RSSD22_RESET_N",</div><div class='add'>+				"RSSD23_RESET_N", "RSSD24_RESET_N",</div><div class='add'>+				"RSSD25_RESET_N", "RSSD26_RESET_N",</div><div class='add'>+				"RSSD27_RESET_N", "RSSD28_RESET_N",</div><div class='add'>+				/* GPORT6 */</div><div class='add'>+				"RSSD29_RESET_N", "RSSD30_RESET_N",</div><div class='add'>+				"RSSD31_RESET_N", "RSSD32_RESET_N",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT7 */</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux20: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 4 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+				i2c@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux21: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 5 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+				i2c@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux5: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 0) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux6: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux7: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux8: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux9: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux10: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smb_pex_rssd_01_16: pinctrl@20 {</div><div class='add'>+				compatible = "cypress,cy8c9560";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;bmc_pex_irq&gt;;</div><div class='add'>+				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-reserved-ranges = &lt;48 12&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-line-names =</div><div class='add'>+				/* GPORT0 */</div><div class='add'>+				"RSSD01_SMBRST_N", "RSSD02_SMBRST_N",</div><div class='add'>+				"RSSD03_SMBRST_N", "RSSD04_SMBRST_N",</div><div class='add'>+				"RSSD05_SMBRST_N", "RSSD06_SMBRST_N",</div><div class='add'>+				"RSSD07_SMBRST_N", "RSSD08_SMBRST_N",</div><div class='add'>+				/* GPORT1 */</div><div class='add'>+				"RSSD09_SMBRST_N", "RSSD10_SMBRST_N",</div><div class='add'>+				"RSSD11_SMBRST_N", "RSSD12_SMBRST_N",</div><div class='add'>+				"RSSD13_SMBRST_N", "RSSD14_SMBRST_N",</div><div class='add'>+				"RSSD15_SMBRST_N", "RSSD16_SMBRST_N",</div><div class='add'>+				/* GPORT2 */</div><div class='add'>+				"RSSD01_PWRDIS", "RSSD02_PWRDIS",</div><div class='add'>+				"RSSD03_PWRDIS", "RSSD04_PWRDIS",</div><div class='add'>+				/* GPORT3 */</div><div class='add'>+				"RSSD05_PWRDIS", "RSSD06_PWRDIS",</div><div class='add'>+				"RSSD07_PWRDIS", "RSSD08_PWRDIS",</div><div class='add'>+				"RSSD09_PWRDIS", "RSSD10_PWRDIS",</div><div class='add'>+				"RSSD11_PWRDIS", "RSSD12_PWRDIS",</div><div class='add'>+				/* GPORT4 */</div><div class='add'>+				"RSSD13_PWRDIS", "RSSD14_PWRDIS",</div><div class='add'>+				"RSSD15_PWRDIS", "RSSD16_PWRDIS",</div><div class='add'>+				"RSSD01_RESET_N", "RSSD02_RESET_N",</div><div class='add'>+				"RSSD03_RESET_N", "RSSD04_RESET_N",</div><div class='add'>+				/* GPORT5 */</div><div class='add'>+				"RSSD05_RESET_N", "RSSD06_RESET_N",</div><div class='add'>+				"RSSD07_RESET_N", "RSSD08_RESET_N",</div><div class='add'>+				"RSSD09_RESET_N", "RSSD10_RESET_N",</div><div class='add'>+				"RSSD11_RESET_N", "RSSD12_RESET_N",</div><div class='add'>+				/* GPORT6 */</div><div class='add'>+				"RSSD13_RESET_N", "RSSD14_RESET_N",</div><div class='add'>+				"RSSD15_RESET_N", "RSSD16_RESET_N",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				/* GPORT7 */</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "",</div><div class='add'>+				"", "";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux11: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 12 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+				i2c@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2cmux12: mux@70 {</div><div class='add'>+				compatible = "maxim,max7357";</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				reset-gpios = &lt;&amp;bmc_pex_irq 14 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+				vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+</div><div class='add'>+				i2c@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				i2c@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2cmux23: mux@77 {</div><div class='add'>+		compatible = "maxim,max7357";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 4) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux23 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_pex_vr_ctrl: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9540";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(V, 2) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"BCM0_INPUT_DISABLE_N", "SMB_VR_P3V3_AUX_ALERT_N",</div><div class='add'>+			"SMB_PEX_CPU1_EVENT_INT", "SMB_PEX_CPU2_EVENT_INT",</div><div class='add'>+			"DPIC0_VOLTAGE_DETECTB_N", "DPIC0_VOLTAGE_DETECTA_N",</div><div class='add'>+			"DPIC1_VOLTAGE_DETECTA_N", "DPIC1_VOLTAGE_DETECTB_N",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"SMB_PEX_NIC_INT", "SMB_VR_P1V05_PCH_AUX_ALERT_N",</div><div class='add'>+			"SMB_PEX_CPU0_EVENT_INT", "SMB_PEX_CPU3_EVENT_INT",</div><div class='add'>+			"LED_ID_TPM", "PLUG_DETECT_TPM",</div><div class='add'>+			"PLUG_DETECT_M2_SSD_CARRIER1", "RST_M2_SSD1_PERST_N",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"LED_ID_BAT", "LED_ID_MGMT_PORT2",</div><div class='add'>+			"LED_ID_MGMT_PORT1", "SMB_VR_P5V_AUX_ALERT_N",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"SMB_VR_AUX_SSB_ALERT_N", "BCM1_INPUT_DISABLE_N",</div><div class='add'>+			"LED_ID_NIC1_PORT1", "LED_ID_NIC1_PORT2",</div><div class='add'>+			"LED_ID_NIC2_PORT1", "LED_ID_NIC2_PORT2",</div><div class='add'>+			"RST_M2_SSD2_PERST_N", "PLUG_DETECT_M2_SSD2",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"PLUG_DETECT_BAT", "PLUG_DETECT_M2_SSD1",</div><div class='add'>+			"M2_SSD1_SSB_ALERT_N", "BCM2_INPUT_DISABLE_N",</div><div class='add'>+			"SMB_VR_P1V8_PCH_AUX_ALERT_N", "BCM3_INPUT_DISABLE_N",</div><div class='add'>+			"LED_PWR_DWR_BACK", "LED_ID_DWR_BACK_P",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"LED_ID_M2_SSD2", "LED_ID_M2_SSD1",</div><div class='add'>+			"PLUG_DETECT_M2_SSD_CARRIER2", "M2_SSD2_SSB_ALERT_N";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;U62120_input &amp;U62120_input_pullup&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			U62120_input: input-pins {</div><div class='add'>+				pins = "gp10";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+			U62120_input_pullup: input-pullup-pins {</div><div class='add'>+				pins = "gp01", "gp02", "gp03", "gp11", "gp12", "gp13",</div><div class='add'>+				"gp23", "gp30", "gp40", "gp42", "gp44", "gp53";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		bmc_pex_irq: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9520";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(V, 0) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"SMB_MUX_PWM_FANGRP2_RST_INT_N", "SMB_MUX_SSB_FANGRP2_RST_INT_N",</div><div class='add'>+			"SMB_MUX_PWM_FANGRP1_RST_INT_N", "SMB_MUX_SSB_RSSD01_08_RST_INT_N",</div><div class='add'>+			"SMB_MUX_RSSD01_08_RST_INT_N", "SMB_MUX_RSSD09_16_RST_INT_N",</div><div class='add'>+			"SMB_PEX_RSSD01_16_INT", "SMB_MUX_SSB_FANGRP1_RST_INT_N",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"SMB_SVC_PEX_FAN_ALERT_INT", "SMB_MUX_SSB_RSSD09_16_RST_INT_N",</div><div class='add'>+			"SMB_MUX_SSB_RSSD17_24_RST_INT_N", "SMB_MUX_PWM_FANGRP0_RST_INT_N",</div><div class='add'>+			"SMB_MUX_RSSD17_24_RST_INT_N", "SMB_PEX_RSSD17_32_INT",</div><div class='add'>+			"SMB_MUX_RSSD25_32_RST_INT_N", "SMB_MUX_SSB_RSSD25_32_RST_INT_N",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"SMB_MUX_SSB_FANGRP0_RST_INT_N", "PEX_FAN_ALERT_RST",</div><div class='add'>+			"PEX_RSSD01_16_RST", "PEX_RSSD17_32_RST";</div><div class='add'>+			pinctrl-0 = &lt;&amp;U60000_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			U60000_pins: cfg-pins {</div><div class='add'>+				pins = "gp06", "gp10", "gp15";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2cmux24: mux@70 {</div><div class='add'>+			compatible = "maxim,max7357";</div><div class='add'>+			reg = &lt;0x70&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		eeprom@51 {</div><div class='add'>+			compatible = "atmel,24c32";</div><div class='add'>+			reg = &lt;0x51&gt;;</div><div class='add'>+			pagesize = &lt;32&gt;;</div><div class='add'>+			vcc-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		i2cmux25: mux@70 {</div><div class='add'>+			compatible = "maxim,max7357";</div><div class='add'>+			reg = &lt;0x70&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux25 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(R, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		p5v_aux: ir38263-p5v-aux@40 {</div><div class='add'>+			compatible = "infineon,ir38263";</div><div class='add'>+			reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+			regulator-name = "p5v_aux";</div><div class='add'>+			regulator-enable-ramp-delay = &lt;2000&gt;;</div><div class='add'>+			vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			vbus-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		p3v3_aux: ir38263-p3v3-aux@40 {</div><div class='add'>+			compatible = "infineon,ir38263";</div><div class='add'>+			reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+			vin-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			regulator-name = "p3v3_aux";</div><div class='add'>+			/*</div><div class='add'>+			 * 2msec for regulator + 18msec for board capacitance</div><div class='add'>+			 * Note: Every IC has a PTC which slowly charges the bypass</div><div class='add'>+			 * cap.</div><div class='add'>+			 */</div><div class='add'>+			regulator-enable-ramp-delay = &lt;200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		aux_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_pex_vr_ctrl&gt;;</div><div class='add'>+			interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p5v_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			regulators {</div><div class='add'>+				p5v: sw0 {</div><div class='add'>+					regulator-name = "p5v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;100000&gt;;</div><div class='add'>+				};</div><div class='add'>+				p3v3_pch: sw1 {</div><div class='add'>+					regulator-name = "p3v3_pch";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;100000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pli1209bc_p12v_a: regulator@5f {</div><div class='add'>+			compatible = "vicor,pli1209bc";</div><div class='add'>+			reg = &lt;0x5f&gt;;</div><div class='add'>+			regulators {</div><div class='add'>+				p12v_a: vout2 {</div><div class='add'>+					regulator-name = "bcm0";</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pli1209bc_p12v_b: regulator@5f {</div><div class='add'>+			compatible = "vicor,pli1209bc";</div><div class='add'>+			reg = &lt;0x5f&gt;;</div><div class='add'>+			regulators {</div><div class='add'>+				p12v_b: vout2 {</div><div class='add'>+					regulator-name = "bcm1";</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pli1209bc_p12v_c: regulator@5f {</div><div class='add'>+			compatible = "vicor,pli1209bc";</div><div class='add'>+			reg = &lt;0x5f&gt;;</div><div class='add'>+			regulators {</div><div class='add'>+				p12v_c: vout2 {</div><div class='add'>+					regulator-name = "bcm2";</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pli1209bc_p12v_d: regulator@5f {</div><div class='add'>+			compatible = "vicor,pli1209bc";</div><div class='add'>+			reg = &lt;0x5f&gt;;</div><div class='add'>+			regulators {</div><div class='add'>+				p12v_d: vout2 {</div><div class='add'>+					regulator-name = "bcm3";</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux24 {</div><div class='add'>+</div><div class='add'>+	reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_rssd01_16: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9560";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;smb_svc_pex_cpu0_led 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"LED_ID_RSSD01", "LED_ID_RSSD02",</div><div class='add'>+			"LED_ID_RSSD03", "LED_ID_RSSD04",</div><div class='add'>+			"LED_ID_RSSD05", "LED_ID_RSSD06",</div><div class='add'>+			"LED_ID_RSSD07", "LED_ID_RSSD08",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"LED_ID_RSSD09", "LED_ID_RSSD10",</div><div class='add'>+			"LED_ID_RSSD11", "LED_ID_RSSD12",</div><div class='add'>+			"LED_ID_RSSD13", "LED_ID_RSSD14",</div><div class='add'>+			"LED_ID_RSSD15", "LED_ID_RSSD16",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"RSSD01_PRESENT_N", "RSSD02_PRESENT_N",</div><div class='add'>+			"RSSD03_PRESENT_N", "RSSD04_PRESENT_N",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"RSSD05_PRESENT_N", "RSSD06_PRESENT_N",</div><div class='add'>+			"RSSD07_PRESENT_N", "RSSD08_PRESENT_N",</div><div class='add'>+			"RSSD09_PRESENT_N", "RSSD10_PRESENT_N",</div><div class='add'>+			"RSSD11_PRESENT_N", "RSSD12_PRESENT_N",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"RSSD13_PRESENT_N", "RSSD14_PRESENT_N",</div><div class='add'>+			"RSSD15_PRESENT_N", "RSSD16_PRESENT_N",</div><div class='add'>+			"LED_ID_FAN_ASM01", "LED_ID_FAN_ASM02",</div><div class='add'>+			"LED_ID_FAN_ASM03", "LED_ID_FAN_ASM04",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"LED_ID_FAN_ASM05", "LED_ID_FAN_ASM06",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM01", "PLUG_DETECT_FAN_ASM02",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM03", "PLUG_DETECT_FAN_ASM04",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM05", "PLUG_DETECT_FAN_ASM06",</div><div class='add'>+			/* GPORT6 */</div><div class='add'>+			"SSB_RSSD01_ALERT_N", "SSB_RSSD02_ALERT_N",</div><div class='add'>+			"SSB_RSSD03_ALERT_N", "SSB_RSSD04_ALERT_N",</div><div class='add'>+			"SSB_RSSD05_ALERT_N", "SSB_RSSD06_ALERT_N",</div><div class='add'>+			"SSB_RSSD07_ALERT_N", "SSB_RSSD08_ALERT_N",</div><div class='add'>+			/* GPORT7 */</div><div class='add'>+			"SSB_RSSD09_ALERT_N", "SSB_RSSD10_ALERT_N",</div><div class='add'>+			"SSB_RSSD11_ALERT_N", "SSB_RSSD12_ALERT_N",</div><div class='add'>+			"SSB_RSSD13_ALERT_N", "SSB_RSSD14_ALERT_N",</div><div class='add'>+			"SSB_RSSD15_ALERT_N", "SSB_RSSD16_ALERT_N";</div><div class='add'>+			pinctrl-0 = &lt;&amp;U65200_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			U65200_pins: cfg-pins {</div><div class='add'>+				pins = "gp60", "gp61", "gp62", "gp63", "gp64",</div><div class='add'>+				       "gp65", "gp66", "gp67", "gp70", "gp71",</div><div class='add'>+				       "gp72", "gp73", "gp74", "gp75", "gp76",</div><div class='add'>+				       "gp77";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_rssd17_32: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9560";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(H, 0) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;smb_svc_pex_cpu1_led 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"LED_ID_RSSD17", "LED_ID_RSSD18",</div><div class='add'>+			"LED_ID_RSSD19", "LED_ID_RSSD20",</div><div class='add'>+			"LED_ID_RSSD21", "LED_ID_RSSD22",</div><div class='add'>+			"LED_ID_RSSD23", "LED_ID_RSSD24",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"LED_ID_RSSD25", "LED_ID_RSSD26",</div><div class='add'>+			"LED_ID_RSSD27", "LED_ID_RSSD28",</div><div class='add'>+			"LED_ID_RSSD29", "LED_ID_RSSD30",</div><div class='add'>+			"LED_ID_RSSD31", "LED_ID_RSSD32",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"RSSD17_PRESENT_N", "RSSD18_PRESENT_N",</div><div class='add'>+			"RSSD19_PRESENT_N", "RSSD20_PRESENT_N",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"RSSD21_PRESENT_N", "RSSD22_PRESENT_N",</div><div class='add'>+			"RSSD23_PRESENT_N", "RSSD24_PRESENT_N",</div><div class='add'>+			"RSSD25_PRESENT_N", "RSSD26_PRESENT_N",</div><div class='add'>+			"RSSD27_PRESENT_N", "RSSD28_PRESENT_N",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"RSSD29_PRESENT_N", "RSSD30_PRESENT_N",</div><div class='add'>+			"RSSD31_PRESENT_N", "RSSD32_PRESENT_N",</div><div class='add'>+			"LED_ID_FAN_ASM07", "LED_ID_FAN_ASM08",</div><div class='add'>+			"LED_ID_FAN_ASM09", "LED_ID_FAN_ASM10",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"LED_ID_FAN_ASM11", "LED_ID_FAN_ASM12",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM07", "PLUG_DETECT_FAN_ASM08",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM09", "PLUG_DETECT_FAN_ASM10",</div><div class='add'>+			"PLUG_DETECT_FAN_ASM11", "PLUG_DETECT_FAN_ASM12",</div><div class='add'>+			/* GPORT6 */</div><div class='add'>+			"SSB_RSSD17_ALERT_N", "SSB_RSSD18_ALERT_N",</div><div class='add'>+			"SSB_RSSD19_ALERT_N", "SSB_RSSD20_ALERT_N",</div><div class='add'>+			"SSB_RSSD21_ALERT_N", "SSB_RSSD22_ALERT_N",</div><div class='add'>+			"SSB_RSSD23_ALERT_N", "SSB_RSSD24_ALERT_N",</div><div class='add'>+			/* GPORT7 */</div><div class='add'>+			"SSB_RSSD25_ALERT_N", "SSB_RSSD26_ALERT_N",</div><div class='add'>+			"SSB_RSSD27_ALERT_N", "SSB_RSSD28_ALERT_N",</div><div class='add'>+			"SSB_RSSD29_ALERT_N", "SSB_RSSD30_ALERT_N",</div><div class='add'>+			"SSB_RSSD31_ALERT_N", "SSB_RSSD32_ALERT_N";</div><div class='add'>+			pinctrl-0 = &lt;&amp;U65300_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			U65300_pins: cfg-pins {</div><div class='add'>+				pins = "gp60", "gp61", "gp62",</div><div class='add'>+				"gp63", "gp64", "gp65", "gp66",</div><div class='add'>+				"gp67", "gp70", "gp71", "gp72",</div><div class='add'>+				"gp73", "gp74", "gp75", "gp76",</div><div class='add'>+				"gp77";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_cpu1_led: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9540";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(V, 6) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;18 2&gt;, &lt;36 2&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C1E2", "PLUG_DETECT_DIMM_C1E1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1F2", "PLUG_DETECT_DIMM_C1F1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1G2", "PLUG_DETECT_DIMM_C1G1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1H2", "PLUG_DETECT_DIMM_C1H1",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C1D1", "PLUG_DETECT_DIMM_C1D2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1C1", "PLUG_DETECT_DIMM_C1C2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1B1", "PLUG_DETECT_DIMM_C1B2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C1A1", "PLUG_DETECT_DIMM_C1A2",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"PEX_CPU1_EVENT_RST", "SVC_PEX_RSSD17_32_RST",</div><div class='add'>+			"", "",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"LED_ID_DIMM_C1E2", "LED_ID_DIMM_C1E1",</div><div class='add'>+			"LED_ID_DIMM_C1F2", "LED_ID_DIMM_C1F1",</div><div class='add'>+			"LED_ID_DIMM_C1G2", "LED_ID_DIMM_C1G1",</div><div class='add'>+			"LED_ID_DIMM_C1H2", "LED_ID_DIMM_C1H1",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"LED_ID_DIMM_C1A2", "LED_ID_DIMM_C1A1",</div><div class='add'>+			"LED_ID_DIMM_C1B2", "LED_ID_DIMM_C1B1",</div><div class='add'>+			"LED_ID_DIMM_C1C2", "LED_ID_DIMM_C1C1",</div><div class='add'>+			"LED_ID_DIMM_C1D2", "LED_ID_DIMM_C1D1",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"", "",</div><div class='add'>+			"FM_CPU1_SKTOCC_N", "LED_ID_CPU1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_fan_alert: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9560";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;bmc_pex_irq&gt;;</div><div class='add'>+			interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;bmc_pex_irq 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;24 3&gt;, &lt;51 9&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"FAN01_SSB_ALERT_N", "FAN02_SSB_ALERT_N",</div><div class='add'>+			"FAN03_SSB_ALERT_N", "FAN04_SSB_ALERT_N",</div><div class='add'>+			"FAN05_SSB_ALERT_N", "FAN06_SSB_ALERT_N",</div><div class='add'>+			"FAN07_SSB_ALERT_N", "FAN08_SSB_ALERT_N",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"FAN09_SSB_ALERT_N", "FAN10_SSB_ALERT_N",</div><div class='add'>+			"FAN11_SSB_ALERT_N", "FAN12_SSB_ALERT_N",</div><div class='add'>+			"FAN13_SSB_ALERT_N", "FAN14_SSB_ALERT_N",</div><div class='add'>+			"FAN15_SSB_ALERT_N", "FAN16_SSB_ALERT_N",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"FAN17_SSB_ALERT_N", "FAN18_SSB_ALERT_N",</div><div class='add'>+			"FAN19_SSB_ALERT_N", "FAN20_SSB_ALERT_N",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"FAN21_SSB_ALERT_N", "FAN22_SSB_ALERT_N",</div><div class='add'>+			"FAN23_SSB_ALERT_N", "FAN24_SSB_ALERT_N",</div><div class='add'>+			"", "",</div><div class='add'>+			"", "FAN01_PWM_ALERT_N",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"FAN02_PWM_ALERT_N", "FAN03_PWM_ALERT_N",</div><div class='add'>+			"FAN04_PWM_ALERT_N", "FAN05_PWM_ALERT_N",</div><div class='add'>+			"FAN06_PWM_ALERT_N", "FAN07_PWM_ALERT_N",</div><div class='add'>+			"FAN08_PWM_ALERT_N", "FAN09_PWM_ALERT_N",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"FAN10_PWM_ALERT_N", "FAN11_PWM_ALERT_N",</div><div class='add'>+			"FAN12_PWM_ALERT_N", "FAN13_PWM_ALERT_N",</div><div class='add'>+			"FAN14_PWM_ALERT_N", "FAN15_PWM_ALERT_N",</div><div class='add'>+			"FAN16_PWM_ALERT_N", "FAN17_PWM_ALERT_N",</div><div class='add'>+			/* GPORT6 */</div><div class='add'>+			"FAN18_PWM_ALERT_N", "FAN19_PWM_ALERT_N",</div><div class='add'>+			"FAN20_PWM_ALERT_N", "FAN21_PWM_ALERT_N",</div><div class='add'>+			"FAN22_PWM_ALERT_N", "FAN23_PWM_ALERT_N",</div><div class='add'>+			"FAN24_PWM_ALERT_N", "",</div><div class='add'>+			/* GPORT7 */</div><div class='add'>+			"", "",</div><div class='add'>+			"", "",</div><div class='add'>+			"", "",</div><div class='add'>+			"", "";</div><div class='add'>+			pinctrl-0 = &lt;&amp;U65600_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			U65600_pins: cfg-pins {</div><div class='add'>+				pins = "gp00", "gp01", "gp02",</div><div class='add'>+				"gp03", "gp04", "gp05", "gp06",</div><div class='add'>+				"gp07", "gp10", "gp11", "gp12",</div><div class='add'>+				"gp13", "gp14", "gp15", "gp16",</div><div class='add'>+				"gp17", "gp20", "gp21", "gp22",</div><div class='add'>+				"gp23", "gp30", "gp31", "gp32",</div><div class='add'>+				"gp33", "gp37", "gp40", "gp41",</div><div class='add'>+				"gp42", "gp43", "gp44", "gp45",</div><div class='add'>+				"gp46", "gp47", "gp50", "gp51",</div><div class='add'>+				"gp52", "gp53", "gp54", "gp55",</div><div class='add'>+				"gp56", "gp57", "gp60", "gp61",</div><div class='add'>+				"gp62", "gp63", "gp64", "gp65",</div><div class='add'>+				"gp66";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				input-enable;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_cpu2_led: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9540";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(V, 5) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;17 3&gt;, &lt;36 2&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C2E2", "PLUG_DETECT_DIMM_C2E1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2F2", "PLUG_DETECT_DIMM_C2F1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2G2", "PLUG_DETECT_DIMM_C2G1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2H2", "PLUG_DETECT_DIMM_C2H1",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C2D1", "PLUG_DETECT_DIMM_C2D2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2C1", "PLUG_DETECT_DIMM_C2C2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2B1", "PLUG_DETECT_DIMM_C2B2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C2A1", "PLUG_DETECT_DIMM_C2A2",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"PEX_CPU2_EVENT_RST", "",</div><div class='add'>+			"", "",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"LED_ID_DIMM_C2E2", "LED_ID_DIMM_C2E1",</div><div class='add'>+			"LED_ID_DIMM_C2F2", "LED_ID_DIMM_C2F1",</div><div class='add'>+			"LED_ID_DIMM_C2G2", "LED_ID_DIMM_C2G1",</div><div class='add'>+			"LED_ID_DIMM_C2H2", "LED_ID_DIMM_C2H1",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"LED_ID_DIMM_C2A2", "LED_ID_DIMM_C2A1",</div><div class='add'>+			"LED_ID_DIMM_C2B2", "LED_ID_DIMM_C2B1",</div><div class='add'>+			"LED_ID_DIMM_C2C2", "LED_ID_DIMM_C2C1",</div><div class='add'>+			"LED_ID_DIMM_C2D2", "LED_ID_DIMM_C2D1",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"", "",</div><div class='add'>+			"FM_CPU2_SKTOCC_N", "LED_ID_CPU2";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		smb_svc_pex_cpu3_led: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9540";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(V, 3) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;17 3&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C3E2", "PLUG_DETECT_DIMM_C3E1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3F2", "PLUG_DETECT_DIMM_C3F1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3G2", "PLUG_DETECT_DIMM_C3G1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3H2", "PLUG_DETECT_DIMM_C3H1",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C3D1", "PLUG_DETECT_DIMM_C3D2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3C1", "PLUG_DETECT_DIMM_C3C2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3B1", "PLUG_DETECT_DIMM_C3B2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C3A1", "PLUG_DETECT_DIMM_C3A2",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"PEX_CPU3_EVENT_RST", "",</div><div class='add'>+			"", "",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"LED_ID_DIMM_C3E2", "LED_ID_DIMM_C3E1",</div><div class='add'>+			"LED_ID_DIMM_C3F2", "LED_ID_DIMM_C3F1",</div><div class='add'>+			"LED_ID_DIMM_C3G2", "LED_ID_DIMM_C3G1",</div><div class='add'>+			"LED_ID_DIMM_C3H2", "LED_ID_DIMM_C3H1",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"LED_ID_DIMM_C3A2", "LED_ID_DIMM_C3A1",</div><div class='add'>+			"LED_ID_DIMM_C3B2", "LED_ID_DIMM_C3B1",</div><div class='add'>+			"LED_ID_DIMM_C3C2", "LED_ID_DIMM_C3C1",</div><div class='add'>+			"LED_ID_DIMM_C3D2", "LED_ID_DIMM_C3D1",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"LED_PWR_DWR_FRNT", "LED_ID_DWR_FRNT_P",</div><div class='add'>+			"FM_CPU3_SKTOCC_N", "LED_ID_CPU3";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		smb_svc_pex_cpu0_led: pinctrl@20 {</div><div class='add'>+			compatible = "cypress,cy8c9540";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+			interrupts = &lt;ASPEED_GPIO(O, 3) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;p3v3_bmc_aux&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 ASPEED_GPIO(Q, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;18 2&gt;, &lt;36 2&gt;;</div><div class='add'>+			gpio-line-names =</div><div class='add'>+			/* GPORT0 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C0E2", "PLUG_DETECT_DIMM_C0E1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0F2", "PLUG_DETECT_DIMM_C0F1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0G2", "PLUG_DETECT_DIMM_C0G1",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0H2", "PLUG_DETECT_DIMM_C0H1",</div><div class='add'>+			/* GPORT1 */</div><div class='add'>+			"PLUG_DETECT_DIMM_C0D1", "PLUG_DETECT_DIMM_C0D2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0C1", "PLUG_DETECT_DIMM_C0C2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0B1", "PLUG_DETECT_DIMM_C0B2",</div><div class='add'>+			"PLUG_DETECT_DIMM_C0A1", "PLUG_DETECT_DIMM_C0A2",</div><div class='add'>+			/* GPORT2 */</div><div class='add'>+			"PEX_CPU0_EVENT_RST", "SVC_PEX_RSSD01_16_RST",</div><div class='add'>+			"", "",</div><div class='add'>+			/* GPORT3 */</div><div class='add'>+			"LED_ID_DIMM_C0E2", "LED_ID_DIMM_C0E1",</div><div class='add'>+			"LED_ID_DIMM_C0F2", "LED_ID_DIMM_C0F1",</div><div class='add'>+			"LED_ID_DIMM_C0G2", "LED_ID_DIMM_C0G1",</div><div class='add'>+			"LED_ID_DIMM_C0H2", "LED_ID_DIMM_C0H1",</div><div class='add'>+			/* GPORT4 */</div><div class='add'>+			"LED_ID_DIMM_C0A2", "LED_ID_DIMM_C0A1",</div><div class='add'>+			"LED_ID_DIMM_C0B2", "LED_ID_DIMM_C0B1",</div><div class='add'>+			"LED_ID_DIMM_C0C2", "LED_ID_DIMM_C0C1",</div><div class='add'>+			"LED_ID_DIMM_C0D2", "LED_ID_DIMM_C0D1",</div><div class='add'>+			/* GPORT5 */</div><div class='add'>+			"", "",</div><div class='add'>+			"FM_CPU0_SKTOCC_N", "LED_ID_CPU0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	p1v2_bmc_aux_mon: pmic@60 {</div><div class='add'>+		compatible = "maxim,max8952";</div><div class='add'>+		reg = &lt;0x60&gt;;</div><div class='add'>+		max8952,default-mode = &lt;3&gt;;</div><div class='add'>+		max8952,dvs-mode-microvolt = &lt;1100000&gt;, &lt;1100000&gt;,</div><div class='add'>+					     &lt;1100000&gt;, &lt;1100000&gt;;</div><div class='add'>+		max8952,sync-freq = &lt;0&gt;;</div><div class='add'>+		max8952,ramp-speed = &lt;0&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux8 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan10_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan10_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan10_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan12_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan12_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan12_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan14_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan14_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan14_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan16_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan16_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan16_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan18_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan18_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan18_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan20_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan20_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan20_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan22_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan22_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan22_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan24_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan24_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan24_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux7 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan17_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan17_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan17_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan19_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan19_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan19_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan21_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan21_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan21_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan23_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan23_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan23_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan02_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan02_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan02_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan04_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan04_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan04_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan06_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan06_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan06_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan08_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan08_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan08_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux6 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan01_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan01_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan01_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan03_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan03_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan03_supply";</div><div class='add'>+</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan05_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan05_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan05_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan07_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan07_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan07_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan09_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan09_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan09_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan11_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan11_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan11_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan13_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan13_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan13_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fan15_ssb: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5978";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			vss1-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_fan_alert&gt;;</div><div class='add'>+			interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_fan15_ssb: sw0 {</div><div class='add'>+					regulator-name = "fan15_supply";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;3400000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux9 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd19: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;46 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd19:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd19: sw0 {</div><div class='add'>+					regulator-name = "rssd19_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd19: sw1 {</div><div class='add'>+					regulator-name = "rssd19_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd18: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;45 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd18:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd18: sw0 {</div><div class='add'>+					regulator-name = "rssd18_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd18: sw1 {</div><div class='add'>+					regulator-name = "rssd18_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd17: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd17:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd17: sw0 {</div><div class='add'>+					regulator-name = "rssd17_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd17: sw1 {</div><div class='add'>+					regulator-name = "rssd17_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd20: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;47 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd20:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd20: sw0 {</div><div class='add'>+					regulator-name = "rssd20_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd20: sw1 {</div><div class='add'>+					regulator-name = "rssd20_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd21: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;48 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd21:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd21: sw0 {</div><div class='add'>+					regulator-name = "rssd21_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd21: sw1 {</div><div class='add'>+					regulator-name = "rssd21_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd22: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;49 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd22:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd22: sw0 {</div><div class='add'>+					regulator-name = "rssd22_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd22: sw1 {</div><div class='add'>+					regulator-name = "rssd22_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd24: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd24:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd24: sw0 {</div><div class='add'>+					regulator-name = "rssd24_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd24: sw1 {</div><div class='add'>+					regulator-name = "rssd24_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd23: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;50 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd23:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd23: sw0 {</div><div class='add'>+					regulator-name = "rssd23_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd23: sw1 {</div><div class='add'>+					regulator-name = "rssd23_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux10 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd25: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;52 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd25:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd25: sw0 {</div><div class='add'>+					regulator-name = "rssd25_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd25: sw1 {</div><div class='add'>+					regulator-name = "rssd25_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd26: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;53 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd26:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd26: sw0 {</div><div class='add'>+					regulator-name = "rssd26_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd26: sw1 {</div><div class='add'>+					regulator-name = "rssd26_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd27: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;54 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd27:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd27: sw0 {</div><div class='add'>+					regulator-name = "rssd27_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd27: sw1 {</div><div class='add'>+					regulator-name = "rssd27_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd32: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;59 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd32:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd32: sw0 {</div><div class='add'>+					regulator-name = "rssd32_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd32: sw1 {</div><div class='add'>+					regulator-name = "rssd32_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd31: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;58 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd31:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd31: sw0 {</div><div class='add'>+					regulator-name = "rssd31_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd31: sw1 {</div><div class='add'>+					regulator-name = "rssd31_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd30: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;57 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd30:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd30: sw0 {</div><div class='add'>+					regulator-name = "rssd30_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd30: sw1 {</div><div class='add'>+					regulator-name = "rssd30_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd29: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;56 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd29:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd29: sw0 {</div><div class='add'>+					regulator-name = "rssd29_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd29: sw1 {</div><div class='add'>+					regulator-name = "rssd29_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd28: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd17_32&gt;;</div><div class='add'>+			interrupts = &lt;55 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd28:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd28: sw0 {</div><div class='add'>+					regulator-name = "rssd28_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd28: sw1 {</div><div class='add'>+					regulator-name = "rssd28_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux18 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd03: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;46 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd03:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd03: sw0 {</div><div class='add'>+					regulator-name = "rssd03_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd03: sw1 {</div><div class='add'>+					regulator-name = "rssd03_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd02: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;45 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd02:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd02: sw0 {</div><div class='add'>+					regulator-name = "rssd02_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd02: sw1 {</div><div class='add'>+					regulator-name = "rssd02_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd01: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd01:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd01: sw0 {</div><div class='add'>+					regulator-name = "rssd01_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd01: sw1 {</div><div class='add'>+					regulator-name = "rssd01_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd04: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;47 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd04:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd04: sw0 {</div><div class='add'>+					regulator-name = "rssd04_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd04: sw1 {</div><div class='add'>+					regulator-name = "rssd04_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd05: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;48 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd05:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd05: sw0 {</div><div class='add'>+					regulator-name = "rssd05_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd05: sw1 {</div><div class='add'>+					regulator-name = "rssd05_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd08: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd08:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd08: sw0 {</div><div class='add'>+					regulator-name = "rssd08_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd08: sw1 {</div><div class='add'>+					regulator-name = "rssd08_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd07: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;50 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd07:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd07: sw0 {</div><div class='add'>+					regulator-name = "rssd07_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd07: sw1 {</div><div class='add'>+					regulator-name = "rssd07_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd06: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;49 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd06:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd06: sw0 {</div><div class='add'>+					regulator-name = "rssd06_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd06: sw1 {</div><div class='add'>+					regulator-name = "rssd06_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2cmux19 {</div><div class='add'>+	i2c@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd14: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;57 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd14:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd14: sw0 {</div><div class='add'>+					regulator-name = "rssd14_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd14: sw1 {</div><div class='add'>+					regulator-name = "rssd14_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd13: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;56 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd13:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd13: sw0 {</div><div class='add'>+					regulator-name = "rssd13_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd13: sw1 {</div><div class='add'>+					regulator-name = "rssd13_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd12: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;55 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd12:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd12: sw0 {</div><div class='add'>+					regulator-name = "rssd12_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd12: sw1 {</div><div class='add'>+					regulator-name = "rssd12_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd11: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;54 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd11:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd11: sw0 {</div><div class='add'>+					regulator-name = "rssd11_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd11: sw1 {</div><div class='add'>+					regulator-name = "rssd11_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd10: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;53 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd10:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd10: sw0 {</div><div class='add'>+					regulator-name = "rssd10_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd10: sw1 {</div><div class='add'>+					regulator-name = "rssd10_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd09: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;52 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd09:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd09: sw0 {</div><div class='add'>+					regulator-name = "rssd09_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd09: sw1 {</div><div class='add'>+					regulator-name = "rssd09_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd15: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;58 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd15:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd15: sw0 {</div><div class='add'>+					regulator-name = "rssd15_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd15: sw1 {</div><div class='add'>+					regulator-name = "rssd15_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	i2c@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ssb_rssd16: regulator@3a {</div><div class='add'>+			compatible = "maxim,max5970";</div><div class='add'>+			reg = &lt;0x3a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;smb_svc_pex_rssd01_16&gt;;</div><div class='add'>+			interrupts = &lt;59 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vss1-supply = &lt;&amp;p3v3_aux&gt;;</div><div class='add'>+			vss2-supply = &lt;&amp;p12v&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "rssd16:green:power";</div><div class='add'>+					default-state = "off";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sw0_ssb_rssd16: sw0 {</div><div class='add'>+					regulator-name = "rssd16_12v";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;9000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;4500000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+				sw1_ssb_rssd16: sw1 {</div><div class='add'>+					regulator-name = "rssd16_3v3";</div><div class='add'>+					shunt-resistor-micro-ohms = &lt;100000&gt;;</div><div class='add'>+					regulator-over-current-protection;</div><div class='add'>+					regulator-oc-protection-microamp = &lt;410000&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts<br/>index f3efecc7eb8d..c8267c97a44e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-system1.dts</a></div><div class='hunk'>@@ -116,63 +116,63 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		led-0 {</div><div class='add'>+		led-bmc-ready {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(L, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-1 {</div><div class='add'>+		led-bmc-hb {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-2 {</div><div class='add'>+		led-rear-enc-fault0 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-3 {</div><div class='add'>+		led-rear-enc-id0 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-4 {</div><div class='add'>+		led-fan0-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-5 {</div><div class='add'>+		led-fan1-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-6 {</div><div class='add'>+		led-fan2-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-7 {</div><div class='add'>+		led-fan3-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 8 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-8 {</div><div class='add'>+		led-fan4-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-9 {</div><div class='add'>+		led-fan5-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-a {</div><div class='add'>+		led-fan6-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca3 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-b {</div><div class='add'>+		led-nvmed0-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca4 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-c {</div><div class='add'>+		led-nvmed1-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca4 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-d {</div><div class='add'>+		led-nvmed2-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca4 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led-e {</div><div class='add'>+		led-nvmed3-fault {</div><div class='ctx'> 			gpios = &lt;&amp;pca4 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -355,7 +355,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl_gpiol4_unbiased: gpiol4 {</div><div class='add'>+		pins = "C15";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpiol5_unbiased: gpiol5 {</div><div class='add'>+		pins = "F15";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpiol6_unbiased: gpiol6 {</div><div class='add'>+		pins = "B14";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpiol7_unbiased: gpiol7 {</div><div class='add'>+		pins = "C14";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpiol4_unbiased</div><div class='add'>+		&amp;pinctrl_gpiol5_unbiased</div><div class='add'>+		&amp;pinctrl_gpiol6_unbiased</div><div class='add'>+		&amp;pinctrl_gpiol7_unbiased&gt;;</div><div class='add'>+</div><div class='ctx'> 	gpio-line-names =</div><div class='ctx'> 	/*A0-A7*/	"","","","","","","","",</div><div class='ctx'> 	/*B0-B7*/	"","","","","bmc-tpm-reset","","","",</div><div class='hunk'>@@ -368,21 +396,49 @@</div><div class='ctx'> 	/*I0-I7*/	"","","","","","","","",</div><div class='ctx'> 	/*J0-J7*/	"","","","","","","","",</div><div class='ctx'> 	/*K0-K7*/	"","","","","","","","",</div><div class='del'>-	/*L0-L7*/	"","","","","","","","bmc-ready",</div><div class='add'>+	/*L0-L7*/	"","","","","","","","led-bmc-ready",</div><div class='ctx'> 	/*M0-M7*/	"","","","","","","","",</div><div class='del'>-	/*N0-N7*/	"","","","","","","","",</div><div class='add'>+	/*N0-N7*/	"pch-reset","","","","","flash-write-override","","",</div><div class='ctx'> 	/*O0-O7*/	"","","","","","","","",</div><div class='del'>-	/*P0-P7*/	"","","","","","","","bmc-hb",</div><div class='del'>-	/*Q0-Q7*/	"","","","","","","","",</div><div class='add'>+	/*P0-P7*/	"","","","","","","","led-bmc-hb",</div><div class='add'>+	/*Q0-Q7*/	"","","","","","","pch-ready","",</div><div class='ctx'> 	/*R0-R7*/	"","","","","","","","",</div><div class='del'>-	/*S0-S7*/	"","","","","","","rear-enc-fault0","rear-enc-id0",</div><div class='add'>+	/*S0-S7*/	"","","","","","","led-rear-enc-fault0","led-rear-enc-id0",</div><div class='ctx'> 	/*T0-T7*/	"","","","","","","","",</div><div class='ctx'> 	/*U0-U7*/	"","","","","","","","",</div><div class='ctx'> 	/*V0-V7*/	"","rtc-battery-voltage-read-enable","","power-chassis-control","","","","",</div><div class='ctx'> 	/*W0-W7*/	"","","","","","","","",</div><div class='del'>-	/*X0-X7*/	"","power-chassis-good","","","","","","",</div><div class='add'>+	/*X0-X7*/	"fpga-pgood","power-chassis-good","pch-pgood","","","","","",</div><div class='ctx'> 	/*Y0-Y7*/	"","","","","","","","",</div><div class='ctx'> 	/*Z0-Z7*/	"","","","","","","","";</div><div class='add'>+</div><div class='add'>+	pin-gpio-hog-0 {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		input;</div><div class='add'>+		line-name = "RST_RTCRST_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pin-gpio-hog-1 {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		input;</div><div class='add'>+		line-name = "RST_SRTCRST_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pin-gpio-hog-2 {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;ASPEED_GPIO(L, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "BMC_FAN_E3_SVC_PEX_INT_N";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pin-gpio-hog-3 {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;ASPEED_GPIO(O, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "isolate_errs_cpu1";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;emmc_controller {</div><div class='hunk'>@@ -398,6 +454,12 @@</div><div class='ctx'> 	clk-phase-mmc-hs200 = &lt;180&gt;, &lt;180&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sgpiom0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ngpios = &lt;128&gt;;</div><div class='add'>+	bus-frequency = &lt;500000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ibt {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -464,6 +526,15 @@</div><div class='ctx'> 	aspeed,lpc-interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;peci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpc_snoop {</div><div class='add'>+	status = "okay";</div><div class='add'>+	snoop-ports = &lt;0x80&gt;, &lt;0x81&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -471,23 +542,6 @@</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	regulator@60 {</div><div class='del'>-		compatible = "maxim,max8952";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-</div><div class='del'>-		max8952,default-mode = &lt;0&gt;;</div><div class='del'>-		max8952,dvs-mode-microvolt = &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='del'>-						&lt;1050000&gt;, &lt;950000&gt;;</div><div class='del'>-		max8952,sync-freq = &lt;0&gt;;</div><div class='del'>-		max8952,ramp-speed = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-name = "VR_v77_1v4";</div><div class='del'>-		regulator-min-microvolt = &lt;770000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -666,22 +720,22 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	power-supply@58 {</div><div class='del'>-		compatible = "ibm,cffps";</div><div class='add'>+		compatible = "intel,crps185";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-supply@59 {</div><div class='del'>-		compatible = "ibm,cffps";</div><div class='add'>+		compatible = "intel,crps185";</div><div class='ctx'> 		reg = &lt;0x59&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-supply@5a {</div><div class='del'>-		compatible = "ibm,cffps";</div><div class='add'>+		compatible = "intel,crps185";</div><div class='ctx'> 		reg = &lt;0x5a&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power-supply@5b {</div><div class='del'>-		compatible = "ibm,cffps";</div><div class='add'>+		compatible = "intel,crps185";</div><div class='ctx'> 		reg = &lt;0x5b&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -748,6 +802,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	multi-master;</div><div class='add'>+	bus-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+	ipmb@10 {</div><div class='add'>+		compatible = "ipmb-dev";</div><div class='add'>+		reg = &lt;(0x10 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-protocol;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c5 {</div><div class='hunk'>@@ -1007,6 +1070,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c8 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9548";</div><div class='hunk'>@@ -1173,23 +1237,6 @@</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	regulator@60 {</div><div class='del'>-		compatible = "maxim,max8952";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-</div><div class='del'>-		max8952,default-mode = &lt;0&gt;;</div><div class='del'>-		max8952,dvs-mode-microvolt = &lt;1250000&gt;, &lt;1200000&gt;,</div><div class='del'>-						&lt;1050000&gt;, &lt;950000&gt;;</div><div class='del'>-		max8952,sync-freq = &lt;0&gt;;</div><div class='del'>-		max8952,ramp-speed = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-name = "VR_v77_1v4";</div><div class='del'>-		regulator-min-microvolt = &lt;770000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c11 {</div><div class='hunk'>@@ -1468,6 +1515,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c15 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bus-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9548";</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts<br/>index 78a5656ef75d..79c6919b3570 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts</a></div><div class='hunk'>@@ -54,10 +54,9 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";</div><div class='add'>+		compatible = "aspeed,ast2500-cf-fsi-master";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		no-gpio-delays;</div><div class='ctx'> </div><div class='ctx'> 		memory-region = &lt;&amp;coldfire_memory&gt;;</div><div class='ctx'> 		aspeed,sram = &lt;&amp;sram&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts<br/>index ddbcbc64e235..4ad0f44af1ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts</a></div><div class='hunk'>@@ -405,161 +405,161 @@</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b5 {</div><div class='add'>+	pin-gpio-b5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "IRQ_BMC_PCH_SMI_LPC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f0 {</div><div class='add'>+	pin-gpio-f0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "IRQ_BMC_PCH_NMI_R";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f3 {</div><div class='add'>+	pin-gpio-f3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "I2C_BUS0_RST_OUT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f4 {</div><div class='add'>+	pin-gpio-f4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "FM_SKT0_FAULT_LED";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f5 {</div><div class='add'>+	pin-gpio-f5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "FM_SKT1_FAULT_LED";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g4 {</div><div class='add'>+	pin-gpio-g4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FAN_PWR_CTL_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g7 {</div><div class='add'>+	pin-gpio-g7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "RST_BMC_PCIE_I2CMUX_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h2 {</div><div class='add'>+	pin-gpio-h2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PSU1_FFS_N_R";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h3 {</div><div class='add'>+	pin-gpio-h3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PSU2_FFS_N_R";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_i3 {</div><div class='add'>+	pin-gpio-i3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_INTRUDED_COVER";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_j2 {</div><div class='add'>+	pin-gpio-j2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_BIOS_UPDATE_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_j3 {</div><div class='add'>+	pin-gpio-j3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "RST_BMC_HDD_I2CMUX_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s2 {</div><div class='add'>+	pin-gpio-s2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_VGA_SW";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s4 {</div><div class='add'>+	pin-gpio-s4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output;</div><div class='ctx'> 		line-name = "VBAT_EN_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s6 {</div><div class='add'>+	pin-gpio-s6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PU_BMC_GPIOS6";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_y0 {</div><div class='add'>+	pin-gpio-y0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "BMC_NCSI_MUX_CTL_S0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_y1 {</div><div class='add'>+	pin-gpio-y1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "BMC_NCSI_MUX_CTL_S1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z0 {</div><div class='add'>+	pin-gpio-z0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "I2C_RISER2_INT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z2 {</div><div class='add'>+	pin-gpio-z2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "I2C_RISER2_RESET_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z3 {</div><div class='add'>+	pin-gpio-z3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_BMC_PCH_SCI_LPC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z7 {</div><div class='add'>+	pin-gpio-z7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "BMC_POST_CMPLT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa0 {</div><div class='add'>+	pin-gpio-aa0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "HOST_BMC_USB_SEL";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa5 {</div><div class='add'>+	pin-gpio-aa5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts<br/>index 6045b60b80da..fdcf4492fb4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts</a></div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_rgmii2_default &amp;pinctrl_mdio2_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;adc{</div><div class='add'>+&amp;adc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_adc0_default</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-frequency = &lt;90000&gt;;</div><div class='ctx'> 	HotSwap@10 {</div><div class='del'>-		compatible = "adm1272";</div><div class='add'>+		compatible = "adi,adm1272";</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -425,238 +425,238 @@</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='ctx'> </div><div class='del'>-	pin_gpio_a1 {</div><div class='add'>+	pin-gpio-a1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_EMMC_RST_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_a3 {</div><div class='add'>+	pin-gpio-a3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PCH_PWROK_BMC_FPGA";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b5 {</div><div class='add'>+	pin-gpio-b5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "IRQ_BMC_PCH_SMI_LPC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b7 {</div><div class='add'>+	pin-gpio-b7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "CPU_SM_WP";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_e0 {</div><div class='add'>+	pin-gpio-e0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "PDB_PSU_SEL";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_e2 {</div><div class='add'>+	pin-gpio-e2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "LOCATOR_LED_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_e5 {</div><div class='add'>+	pin-gpio-e5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_BMC_DBP_PRESENT_R1_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_e6 {</div><div class='add'>+	pin-gpio-e6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_ME_SECURITY_OVERRIDE_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f0 {</div><div class='add'>+	pin-gpio-f0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "IRQ_BMC_PCH_NMI_R";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f1 {</div><div class='add'>+	pin-gpio-f1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "CPU2_PROCDIS_BMC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f2 {</div><div class='add'>+	pin-gpio-f2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "RM_THROTTLE_EN_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f3 {</div><div class='add'>+	pin-gpio-f3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "FM_PMBUS_ALERT_B_EN";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f4 {</div><div class='add'>+	pin-gpio-f4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_FORCE_NM_THROTTLE_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f6 {</div><div class='add'>+	pin-gpio-f6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_BMC_CPU_PWR_DEBUG_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g7 {</div><div class='add'>+	pin-gpio-g7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_PCIE_I2C_MUX_RST_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h6 {</div><div class='add'>+	pin-gpio-h6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_BMC_DBP_PRESENT_R2_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_i3 {</div><div class='add'>+	pin-gpio-i3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "SPI_BMC_BIOS_WP_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_j1 {</div><div class='add'>+	pin-gpio-j1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_USB_SEL";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_j2 {</div><div class='add'>+	pin-gpio-j2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PDB_SMB_RST_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_j3 {</div><div class='add'>+	pin-gpio-j3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "SPI_BMC_BIOS_HOLD_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_l0 {</div><div class='add'>+	pin-gpio-l0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(L, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PDB_FAN_TACH_SEL";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_l1 {</div><div class='add'>+	pin-gpio-l1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(L, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "SYS_RESET_BMC_FPGA_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_l4 {</div><div class='add'>+	pin-gpio-l4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_EFUSE_FAN_G1_EN";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_l5 {</div><div class='add'>+	pin-gpio-l5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_EFUSE_FAN_G2_EN";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_r6 {</div><div class='add'>+	pin-gpio-r6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(R, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "CPU3_PROCDIS_BMC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_r7 {</div><div class='add'>+	pin-gpio-r7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(R, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "CPU4_PROCDIS_BMC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s1 {</div><div class='add'>+	pin-gpio-s1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "DBP_SYSPWROK_BMC";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s2 {</div><div class='add'>+	pin-gpio-s2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "PCH_RST_RSMRST_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_s6 {</div><div class='add'>+	pin-gpio-s6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_HW_STRAP_5";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z3 {</div><div class='add'>+	pin-gpio-z3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "FM_BMC_PCH_SCI_LPC_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa0 {</div><div class='add'>+	pin-gpio-aa0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "FW_PSU_ALERT_EN_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa4 {</div><div class='add'>+	pin-gpio-aa4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "DBP_CPU_PREQ_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_ab3 {</div><div class='add'>+	pin-gpio-ab3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AB, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "BMC_WDTRST";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_ac6 {</div><div class='add'>+	pin-gpio-ac6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AC, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts<br/>new file mode 100644<br/>index 000000000000..4de38613b0ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts</a></div><div class='hunk'>@@ -0,0 +1,1178 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "aspeed-g6.dtsi"</div><div class='add'>+#include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "AST2600 GB200NVL BMC";</div><div class='add'>+	compatible = "nvidia,gb200nvl-bmc", "aspeed,ast2600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		serial4 = &amp;uart5;</div><div class='add'>+		i2c16   = &amp;imux16;</div><div class='add'>+		i2c17   = &amp;imux17;</div><div class='add'>+		i2c18   = &amp;imux18;</div><div class='add'>+		i2c19   = &amp;imux19;</div><div class='add'>+		i2c20   = &amp;imux20;</div><div class='add'>+		i2c21   = &amp;imux21;</div><div class='add'>+		i2c22   = &amp;imux22;</div><div class='add'>+		i2c23   = &amp;imux23;</div><div class='add'>+		i2c24   = &amp;imux24;</div><div class='add'>+		i2c25   = &amp;imux25;</div><div class='add'>+		i2c26   = &amp;imux26;</div><div class='add'>+		i2c27   = &amp;imux27;</div><div class='add'>+		i2c28   = &amp;imux28;</div><div class='add'>+		i2c29   = &amp;imux29;</div><div class='add'>+		i2c30   = &amp;imux30;</div><div class='add'>+		i2c31   = &amp;imux31;</div><div class='add'>+		i2c32   = &amp;imux32;</div><div class='add'>+		i2c33   = &amp;imux33;</div><div class='add'>+		i2c34   = &amp;imux34;</div><div class='add'>+		i2c35   = &amp;imux35;</div><div class='add'>+		i2c36   = &amp;imux36;</div><div class='add'>+		i2c37   = &amp;imux37;</div><div class='add'>+		i2c38   = &amp;imux38;</div><div class='add'>+		i2c39   = &amp;imux39;</div><div class='add'>+		i2c40	= &amp;e1si2c0;</div><div class='add'>+		i2c41	= &amp;e1si2c1;</div><div class='add'>+		i2c42	= &amp;e1si2c2;</div><div class='add'>+		i2c43	= &amp;e1si2c3;</div><div class='add'>+		i2c44	= &amp;e1si2c4;</div><div class='add'>+		i2c45	= &amp;e1si2c5;</div><div class='add'>+		i2c46	= &amp;e1si2c6;</div><div class='add'>+		i2c47	= &amp;e1si2c7;</div><div class='add'>+		i2c48	= &amp;i2c17mux0;</div><div class='add'>+		i2c49	= &amp;i2c17mux1;</div><div class='add'>+		i2c50	= &amp;i2c17mux2;</div><div class='add'>+		i2c51	= &amp;i2c17mux3;</div><div class='add'>+		i2c52	= &amp;i2c25mux0;</div><div class='add'>+		i2c53	= &amp;i2c25mux1;</div><div class='add'>+		i2c54	= &amp;i2c25mux2;</div><div class='add'>+		i2c55	= &amp;i2c25mux3;</div><div class='add'>+		i2c56	= &amp;i2c29mux0;</div><div class='add'>+		i2c57	= &amp;i2c29mux1;</div><div class='add'>+		i2c58	= &amp;i2c29mux2;</div><div class='add'>+		i2c59	= &amp;i2c29mux3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		vga_memory: framebuffer@9f000000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x9f000000 0x01000000&gt;; /* 16M */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ramoops@a0000000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0xa0000000 0x100000&gt;; /* 1MB */</div><div class='add'>+			record-size = &lt;0x10000&gt;; /* 64KB */</div><div class='add'>+			max-reason = &lt;2&gt;; /* KMSG_DUMP_OOPS */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gfx_memory: framebuffer {</div><div class='add'>+			size = &lt;0x01000000&gt;;</div><div class='add'>+			alignment = &lt;0x01000000&gt;;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_engine_memory: jpegbuffer {</div><div class='add'>+			size = &lt;0x02000000&gt;;	/* 32M */</div><div class='add'>+			alignment = &lt;0x01000000&gt;;</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "uid_led";</div><div class='add'>+			gpios = &lt;&amp;sgpiom0 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		led-1 {</div><div class='add'>+			label = "fault_led";</div><div class='add'>+			gpios = &lt;&amp;sgpiom0 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		led-2 {</div><div class='add'>+			label = "power_led";</div><div class='add'>+			gpios = &lt;&amp;sgpiom0 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	buttons {</div><div class='add'>+		button-power {</div><div class='add'>+			label = "power-btn";</div><div class='add'>+			gpio = &lt;&amp;sgpiom0 156 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-uid {</div><div class='add'>+			label = "uid-btn";</div><div class='add'>+			gpio = &lt;&amp;sgpiom0 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	standby_power_regulator: standby-power-regulator {</div><div class='add'>+		status = "okay";</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "standby_power";</div><div class='add'>+		gpio = &lt;&amp;gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// Enable Primary flash on FMC for bring up activity</div><div class='add'>+&amp;fmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		label = "bmc";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			u-boot@0 {</div><div class='add'>+				// 896KB</div><div class='add'>+				reg = &lt;0x0 0xe0000&gt;;</div><div class='add'>+				label = "u-boot";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@100000 {</div><div class='add'>+				// 9MB</div><div class='add'>+				reg = &lt;0x100000 0x900000&gt;;</div><div class='add'>+				label = "kernel";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rofs@a00000 {</div><div class='add'>+				// 55292KB (extends to end of 64MB SPI - 4KB)</div><div class='add'>+				reg = &lt;0xa00000 0x35FF000&gt;;</div><div class='add'>+				label = "rofs";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi2_default&gt;;</div><div class='add'>+</div><div class='add'>+	// Data SPI is 64MB in size</div><div class='add'>+	flash@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		label = "config";</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			u-boot-env@0 {</div><div class='add'>+				// 256KB</div><div class='add'>+				reg = &lt;0x0 0x40000&gt;;</div><div class='add'>+				label = "u-boot-env";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rwfs@40000 {</div><div class='add'>+				// 16MB</div><div class='add'>+				reg = &lt;0x40000 0x1000000&gt;;</div><div class='add'>+				label = "rwfs";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			log@1040000 {</div><div class='add'>+				// 40MB</div><div class='add'>+				reg = &lt;0x1040000 0x2800000&gt;;</div><div class='add'>+				label = "log";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	// Enabling SOL</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	// BMC Debug Console</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_routing {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ethphy0: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ethphy3: ethernet-phy@2 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy3&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	use-ncsi;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rmii3_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable USB port A as device (via the virtual hub) to host</div><div class='add'>+ */</div><div class='add'>+&amp;vhub {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;video {</div><div class='add'>+	status = "okay";</div><div class='add'>+	memory-region = &lt;&amp;video_engine_memory&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// USB 2.0 to HMC, on USB Port B</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// USB 1.0</div><div class='add'>+&amp;uhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sgpiom0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ngpios = &lt;128&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"RUN_POWER_FAULT_L-I","SYS_RST_IN_L-O",</div><div class='add'>+		"RUN_POWER_PG-I","PWR_BRAKE_L-O",</div><div class='add'>+		"SYS_RST_OUT_L-I","RUN_POWER_EN-O",</div><div class='add'>+		"L0L1_RST_REQ_OUT_L-I","SHDN_FORCE_L-O",</div><div class='add'>+		"L2_RST_REQ_OUT_L-I","SHDN_REQ_L-O",</div><div class='add'>+		"SHDN_OK_L-I","UID_LED_N-O",</div><div class='add'>+		"BMC_I2C1_FPGA_ALERT_L-I","SYS_FAULT_LED_N-O",</div><div class='add'>+		"BMC_I2C0_FPGA_ALERT_L-I","PWR_LED_N-O",</div><div class='add'>+		"FPGA_RSVD_FFU3-I","",</div><div class='add'>+		"FPGA_RSVD_FFU2-I","",</div><div class='add'>+		"FPGA_RSVD_FFU1-I","",</div><div class='add'>+		"FPGA_RSVD_FFU0-I","BMC_I2C_SSIF_ALERT_L-O",</div><div class='add'>+		"CPU_BOOT_DONE-I","JTAG_MUX_SELECT-O",</div><div class='add'>+		"SPI_BMC_FPGA_INT_L-I","RTC_CLR_L-O",</div><div class='add'>+		"THERM_BB_WARN_L-I","UART_MUX_SEL-O",</div><div class='add'>+		"THERM_BB_OVERT_L-I","",</div><div class='add'>+		"CPU0_UPHY3_PRSNT1_L-I","IOBRD0_RUN_POWER_EN-O",</div><div class='add'>+		"CPU0_UPHY3_PRSNT0_L-I","IOBRD1_RUN_POWER_EN-O",</div><div class='add'>+		"CPU0_UPHY2_PRSNT1_L-I","FPGA_RSVD_FFU4-O",</div><div class='add'>+		"CPU0_UPHY2_PRSNT0_L-I","FPGA_RSVD_FFU5-O",</div><div class='add'>+		"CPU0_UPHY1_PRSNT1_L-I","FPGA_RSVD_FFU6-O",</div><div class='add'>+		"CPU0_UPHY1_PRSNT0_L-I","FPGA_RSVD_FFU7-O",</div><div class='add'>+		"CPU0_UPHY0_PRSNT1_L-I","RSVD_NV_PLT_DETECT-O",</div><div class='add'>+		"CPU0_UPHY0_PRSNT0_L-I","SPI1_INT_L-O",</div><div class='add'>+		"CPU1_UPHY3_PRSNT1_L-I","",</div><div class='add'>+		"CPU1_UPHY3_PRSNT0_L-I","HMC_EROT_MUX_STATUS",</div><div class='add'>+		"CPU1_UPHY2_PRSNT1_L-I","",</div><div class='add'>+		"CPU1_UPHY2_PRSNT0_L-I","",</div><div class='add'>+		"CPU1_UPHY1_PRSNT1_L-I","",</div><div class='add'>+		"CPU1_UPHY1_PRSNT0_L-I","",</div><div class='add'>+		"CPU1_UPHY0_PRSNT1_L-I","",</div><div class='add'>+		"CPU1_UPHY0_PRSNT0_L-I","",</div><div class='add'>+		"FAN1_PRESENT_L-I","",</div><div class='add'>+		"FAN0_PRESENT_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"IPEX_CABLE_PRSNT_L-I","",</div><div class='add'>+		"M2_1_PRSNT_L-I","",</div><div class='add'>+		"M2_0_PRSNT_L-I","",</div><div class='add'>+		"CPU1_UPHY4_PRSNT1_L-I","",</div><div class='add'>+		"CPU0_UPHY4_PRSNT0_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"I2C_RTC_ALERT_L-I","",</div><div class='add'>+		"FAN7_PRESENT_L-I","",</div><div class='add'>+		"FAN6_PRESENT_L-I","",</div><div class='add'>+		"FAN5_PRESENT_L-I","",</div><div class='add'>+		"FAN4_PRESENT_L-I","",</div><div class='add'>+		"FAN3_PRESENT_L-I","",</div><div class='add'>+		"FAN2_PRESENT_L-I","",</div><div class='add'>+		"IOBRD0_IOX_INT_L-I","",</div><div class='add'>+		"IOBRD1_PRSNT_L-I","",</div><div class='add'>+		"IOBRD0_PRSNT_L-I","",</div><div class='add'>+		"IOBRD1_PWR_GOOD-I","",</div><div class='add'>+		"IOBRD0_PWR_GOOD-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"FAN_FAIL_IN_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"PDB_CABLE_PRESENT_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"CHASSIS_PWR_BRK_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"IOBRD1_IOX_INT_L-I","",</div><div class='add'>+		"10GBE_SMBALRT_L-I","",</div><div class='add'>+		"PCIE_WAKE_L-I","",</div><div class='add'>+		"I2C_M21_ALERT_L-I","",</div><div class='add'>+		"I2C_M20_ALERT_L-I","",</div><div class='add'>+		"TRAY_FAST_SHDN_L-I","",</div><div class='add'>+		"UID_BTN_N-I","",</div><div class='add'>+		"PWR_BTN_L-I","",</div><div class='add'>+		"PSU_SMB_ALERT_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"NODE_LOC_ID[0]-I","",</div><div class='add'>+		"NODE_LOC_ID[1]-I","",</div><div class='add'>+		"NODE_LOC_ID[2]-I","",</div><div class='add'>+		"NODE_LOC_ID[3]-I","",</div><div class='add'>+		"NODE_LOC_ID[4]-I","",</div><div class='add'>+		"NODE_LOC_ID[5]-I","",</div><div class='add'>+		"FAN10_PRESENT_L-I","",</div><div class='add'>+		"FAN9_PRESENT_L-I","",</div><div class='add'>+		"FAN8_PRESENT_L-I","",</div><div class='add'>+		"FPGA1_READY_HMC-I","",</div><div class='add'>+		"DP_HPD-I","",</div><div class='add'>+		"HMC_I2C3_FPGA_ALERT_L-I","",</div><div class='add'>+		"HMC_I2C2_FPGA_ALERT_L-I","",</div><div class='add'>+		"FPGA0_READY_HMC-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"LEAK_DETECT_ALERT_L-I","",</div><div class='add'>+		"MOD1_B2B_CABLE_PRESENT_L-I","",</div><div class='add'>+		"MOD1_CLINK_CABLE_PRESENT_L-I","",</div><div class='add'>+		"FAN11_PRESENT_L-I","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"","",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[0]","RSVD_SGPIO_O_CRC[7]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[1]","RSVD_SGPIO_O_CRC[6]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[2]","RSVD_SGPIO_O_CRC[5]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[3]","RSVD_SGPIO_O_CRC[4]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[4]","RSVD_SGPIO_O_CRC[3]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[5]","RSVD_SGPIO_O_CRC[2]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[6]","RSVD_SGPIO_O_CRC[1]",</div><div class='add'>+		"RSVD_SGPIO_IN_CRC[7]","RSVD_SGPIO_O_CRC[0]";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C1, SSIF IPMI interface</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	ssif-bmc@10 {</div><div class='add'>+		compatible = "ssif-bmc";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C2</div><div class='add'>+// BMC_I2C1_FPGA - Secondary FPGA</div><div class='add'>+// HMC EROT</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C3</div><div class='add'>+// BMC_I2C0_FPGA - Primary FPGA</div><div class='add'>+// HMC FRU EEPROM</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C4</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C5</div><div class='add'>+// RTC Driver</div><div class='add'>+// IO Expander</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	// Module 0, Expander @0x21</div><div class='add'>+	exp4: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"RTC_MUX_SEL-O",</div><div class='add'>+			"PCI_MUX_SEL-O",</div><div class='add'>+			"TPM_MUX_SEL-O",</div><div class='add'>+			"FAN_MUX-SEL-O",</div><div class='add'>+			"SGMII_MUX_SEL-O",</div><div class='add'>+			"DP_MUX_SEL-O",</div><div class='add'>+			"UPHY3_USB_SEL-O",</div><div class='add'>+			"NCSI_MUX_SEL-O",</div><div class='add'>+			"BMC_PHY_RST-O",</div><div class='add'>+			"RTC_CLR_L-O",</div><div class='add'>+			"BMC_12V_CTRL-O",</div><div class='add'>+			"PS_RUN_IO0_PG-I",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C6</div><div class='add'>+// Module 0/1 I2C MUX x3</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+</div><div class='add'>+	i2c-mux@71 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux16: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux17: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@74 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				i2c17mux0: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c17mux1: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c17mux2: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c17mux3: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux18: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux19: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@72 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux20: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux21: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@21 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"RST_CX_0_L-O",</div><div class='add'>+					"RST_CX_1_L-O",</div><div class='add'>+					"CX0_SSD0_PRSNT_L-I",</div><div class='add'>+					"CX1_SSD1_PRSNT_L-I",</div><div class='add'>+					"CX_BOOT_CMPLT_CX0-I",</div><div class='add'>+					"CX_BOOT_CMPLT_CX1-I",</div><div class='add'>+					"CX_TWARN_CX0_L-I",</div><div class='add'>+					"CX_TWARN_CX1_L-I",</div><div class='add'>+					"CX_OVT_SHDN_CX0-I",</div><div class='add'>+					"CX_OVT_SHDN_CX1-I",</div><div class='add'>+					"FNP_L_CX0-O",</div><div class='add'>+					"FNP_L_CX1-O",</div><div class='add'>+					"",</div><div class='add'>+					"MCU_GPIO-I",</div><div class='add'>+					"MCU_RST_N-O",</div><div class='add'>+					"MCU_RECOVERY_N-O";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux22: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux23: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@73 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x73&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux24: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux25: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@70 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x70&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+				vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+				i2c25mux0: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c25mux1: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c25mux2: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c25mux3: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux26: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux27: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@75 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x75&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux28: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux29: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-mux@74 {</div><div class='add'>+				compatible = "nxp,pca9546";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x74&gt;;</div><div class='add'>+				i2c-mux-idle-disconnect;</div><div class='add'>+</div><div class='add'>+				i2c29mux0: i2c@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c29mux1: i2c@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c29mux2: i2c@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c29mux3: i2c@3 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux30: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux31: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@76 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x76&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux32: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux33: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@21 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+				gpio-line-names =</div><div class='add'>+					"SEC_RST_CX_0_L-O",</div><div class='add'>+					"SEC_RST_CX_1_L-O",</div><div class='add'>+					"SEC_CX0_SSD0_PRSNT_L-I",</div><div class='add'>+					"SEC_CX1_SSD1_PRSNT_L-I",</div><div class='add'>+					"SEC_CX_BOOT_CMPLT_CX0-I",</div><div class='add'>+					"SEC_CX_BOOT_CMPLT_CX1-I",</div><div class='add'>+					"SEC_CX_TWARN_CX0_L-I",</div><div class='add'>+					"SEC_CX_TWARN_CX1_L-I",</div><div class='add'>+					"SEC_CX_OVT_SHDN_CX0-I",</div><div class='add'>+					"SEC_CX_OVT_SHDN_CX1-I",</div><div class='add'>+					"SEC_FNP_L_CX0-O",</div><div class='add'>+					"SEC_FNP_L_CX1-O",</div><div class='add'>+					"",</div><div class='add'>+					"SEC_MCU_GPIO-I",</div><div class='add'>+					"SEC_MCU_RST_N-O",</div><div class='add'>+					"SEC_MCU_RECOVERY_N-O";</div><div class='add'>+				};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux34: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux35: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		imux36: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux37: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux38: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imux39: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C7</div><div class='add'>+// Module 0/1 Leak Sensors</div><div class='add'>+// Module 0/1 Fan Controllers</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@12 {</div><div class='add'>+		compatible = "ti,lm5066i";</div><div class='add'>+		reg = &lt;0x12&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;190&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@14 {</div><div class='add'>+		compatible = "ti,lm5066i";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;190&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@20 {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@23 {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@2c {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@2f {</div><div class='add'>+		compatible = "maxim,max31790";</div><div class='add'>+		reg = &lt;0x2f&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C9</div><div class='add'>+// M.2</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C10</div><div class='add'>+// HMC IO Expander</div><div class='add'>+// Module 0/1 IO Expanders</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	// Module 0, Expander @0x20</div><div class='add'>+	exp0: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"FPGA_THERM_OVERT_L-I",</div><div class='add'>+			"FPGA_READY_BMC-I",</div><div class='add'>+			"HMC_BMC_DETECT-O",</div><div class='add'>+			"HMC_PGOOD-O",</div><div class='add'>+			"",</div><div class='add'>+			"BMC_STBY_CYCLE-O",</div><div class='add'>+			"FPGA_EROT_FATAL_ERROR_L-I",</div><div class='add'>+			"WP_HW_EXT_CTRL_L-O",</div><div class='add'>+			"EROT_FPGA_RST_L-O",</div><div class='add'>+			"FPGA_EROT_RECOVERY_L-O",</div><div class='add'>+			"BMC_EROT_FPGA_SPI_MUX_SEL-O",</div><div class='add'>+			"USB_HUB_RESET_L-O",</div><div class='add'>+			"NCSI_CS1_SEL-O",</div><div class='add'>+			"SGPIO_EN_L-O",</div><div class='add'>+			"B2B_IOEXP_INT_L-I",</div><div class='add'>+			"I2C_BUS_MUX_RESET_L-O";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// Module 1, Expander @0x21</div><div class='add'>+	exp1: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"SEC_FPGA_THERM_OVERT_L-I",</div><div class='add'>+			"SEC_FPGA_READY_BMC-I",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"SEC_FPGA_EROT_FATAL_ERROR_L-I",</div><div class='add'>+			"SEC_WP_HW_EXT_CTRL_L-O",</div><div class='add'>+			"SEC_EROT_FPGA_RST_L-O",</div><div class='add'>+			"SEC_FPGA_EROT_RECOVERY_L-O",</div><div class='add'>+			"SEC_BMC_EROT_FPGA_SPI_MUX_SEL-O",</div><div class='add'>+			"SEC_USB2_HUB_RST_L-O",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"SEC_I2C_BUS_MUX_RESET_L-O";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// HMC Expander @0x27</div><div class='add'>+	exp2: gpio@27 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"HMC_PRSNT_L-I",</div><div class='add'>+			"HMC_READY-I",</div><div class='add'>+			"HMC_EROT_FATAL_ERROR_L-I",</div><div class='add'>+			"I2C_MUX_SEL-O",</div><div class='add'>+			"HMC_EROT_SPI_MUX_SEL-O",</div><div class='add'>+			"HMC_EROT_RECOVERY_L-O",</div><div class='add'>+			"HMC_EROT_RST_L-O",</div><div class='add'>+			"GLOBAL_WP_HMC-O",</div><div class='add'>+			"FPGA_RST_L-O",</div><div class='add'>+			"USB2_HUB_RST-O",</div><div class='add'>+			"CPU_UART_MUX_SEL-O",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// HMC Expander @0x74</div><div class='add'>+	exp3: gpio@74 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"IOB_PRSNT_L",</div><div class='add'>+			"IOB_DP_HPD",</div><div class='add'>+			"IOX_BMC_RESET",</div><div class='add'>+			"IOB_IOEXP_INT_L",</div><div class='add'>+			"IOB_UID_LED_L",</div><div class='add'>+			"IOB_UID_BTN_L",</div><div class='add'>+			"IOB_SYS_RST_BTN_L",</div><div class='add'>+			"IOB_PWR_LED_L",</div><div class='add'>+			"IOB_PWR_BTN_L",</div><div class='add'>+			"IOB_PHY_RST",</div><div class='add'>+			"CPLD_JTAG_MUX_SEL",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"",</div><div class='add'>+			"";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C11</div><div class='add'>+// BMC FRU EEPROM</div><div class='add'>+// BMC Temp Sensor</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	// BMC FRU EEPROM - 256 bytes</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C12</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C13</div><div class='add'>+&amp;i2c12 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C14</div><div class='add'>+// Module 0 UPHY3 SMBus</div><div class='add'>+&amp;i2c13 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C15</div><div class='add'>+// Module 1 UPHY3 SMBus</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+</div><div class='add'>+	//E1.S drive slot 0-3</div><div class='add'>+	i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		e1si2c0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c2: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c3: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+// I2C16</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	multi-master;</div><div class='add'>+</div><div class='add'>+	//E1.S drive slot 4-7</div><div class='add'>+	i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		i2c-mux-idle-disconnect;</div><div class='add'>+		vdd-supply = &lt;&amp;standby_power_regulator&gt;;</div><div class='add'>+</div><div class='add'>+		e1si2c4: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c5: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c6: i2c@2 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		e1si2c7: i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rng {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/*A0-A7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*B0-B7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*C0-C7*/ "SGPIO_I2C_MUX_SEL-O", "", "", "", "", "", "", "",</div><div class='add'>+		/*D0-D7*/ "", "", "", "UART1_MUX_SEL-O", "", "FPGA_PEX_RST_L-O", "", "",</div><div class='add'>+		/*E0-E7*/ "RTL8221_PHY_RST_L-O", "RTL8211_PHY_INT_L-I",	"", "UART3_MUX_SEL-O",</div><div class='add'>+					"", "", "", "SGPIO_BMC_EN-O",</div><div class='add'>+		/*F0-F7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*G0-G7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*H0-H7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*I0-I7*/ "", "", "", "", "", "QSPI2_RST_L-O", "GLOBAL_WP_BMC-O", "BMC_DDR4_TEN-O",</div><div class='add'>+		/*J0-J7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*K0-K7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*L0-L7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*M0-M7*/ "PCIE_EP_RST_EN-O", "BMC_FRU_WP-O", "FPGA_RST_L-O", "STBY_POWER_EN-O",</div><div class='add'>+					"STBY_POWER_PG-I", "PCIE_EP_RST_L-O", "", "",</div><div class='add'>+		/*N0-N7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*O0-O7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*P0-P7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*Q0-Q7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*R0-R7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*S0-S7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*T0-T7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*U0-U7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*V0-V7*/ "AP_EROT_REQ-O", "EROT_AP_GNT-I", "", "","PCB_TEMP_ALERT-I", "","", "",</div><div class='add'>+		/*W0-W7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*X0-X7*/ "", "", "TPM_MUX_SEL-O", "", "", "", "", "",</div><div class='add'>+		/*Y0-Y7*/ "", "", "", "EMMC_RST-O", "","", "", "",</div><div class='add'>+		/*Z0-Z7*/ "BMC_READY-O","", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	/* 36 1.8V GPIOs */</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/*A0-A7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*B0-B7*/ "", "", "", "", "", "", "IO_EXPANDER_INT_L-I","",</div><div class='add'>+		/*C0-C7*/ "", "", "", "", "", "", "", "",</div><div class='add'>+		/*D0-D7*/ "", "", "", "", "", "", "SPI_HOST_TPM_RST_L-O", "SPI_BMC_FPGA_INT_L-I",</div><div class='add'>+		/*E0-E7*/ "", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts<br/>index 370738572a55..9f2ad551255d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-lanyang.dts</a></div><div class='hunk'>@@ -52,18 +52,18 @@</div><div class='ctx'> 			gpios = &lt;&amp;gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		bmc_err {</div><div class='del'>-			lable = "BMC_fault";</div><div class='add'>+			label = "BMC_fault";</div><div class='ctx'> 			gpios = &lt;&amp;gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sys_err {</div><div class='del'>-			lable = "Sys_fault";</div><div class='add'>+			label = "Sys_fault";</div><div class='ctx'> 			gpios = &lt;&amp;gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "fsi-master-gpio", "fsi-master";</div><div class='add'>+		compatible = "fsi-master-gpio";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -264,49 +264,49 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='del'>-	pin_gpio_b0 {</div><div class='add'>+	pin-gpio-b0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_HDD1_PWR_EN";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b5 {</div><div class='add'>+	pin-gpio-b5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_USB1_OCI2";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h5 {</div><div class='add'>+	pin-gpio-h5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_CP0_PERST_ENABLE_R";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_z2 {</div><div class='add'>+	pin-gpio-z2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "RST_PCA9546_U177_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa6 {</div><div class='add'>+	pin-gpio-aa6-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_CP0_RESET_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_aa7 {</div><div class='add'>+	pin-gpio-aa7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AA, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_TPM_RESET_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_ab0 {</div><div class='add'>+	pin-gpio-ab0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts<br/>index 31ff19ef87a0..6c8b966ffccc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-mowgli.dts</a></div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "fsi-master-gpio", "fsi-master";</div><div class='add'>+		compatible = "fsi-master-gpio";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		no-gpio-delays;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts<br/>index b1d0ff85d397..ce6d30ddf07c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-nicole.dts</a></div><div class='hunk'>@@ -77,10 +77,9 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";</div><div class='add'>+		compatible = "aspeed,ast2500-cf-fsi-master";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		no-gpio-delays;</div><div class='ctx'> </div><div class='ctx'> 		memory-region = &lt;&amp;coldfire_memory&gt;;</div><div class='ctx'> 		aspeed,sram = &lt;&amp;sram&gt;;</div><div class='hunk'>@@ -248,27 +247,27 @@</div><div class='ctx'> 	/*AB0-AB7*/	"","","","","","","","",</div><div class='ctx'> 	/*AC0-AC7*/	"","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	func_mode0 {</div><div class='add'>+	func-mode0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	func_mode1 {</div><div class='add'>+	func-mode1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	func_mode2 {</div><div class='add'>+	func-mode2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	seq_cont {</div><div class='add'>+	seq-cont-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	ncsi_cfg {</div><div class='add'>+	ncsi-cfg-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		input;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(E, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts<br/>index 45631b47a7b3..7953059a6c67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-palmetto.dts</a></div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "aspeed,ast2400-cf-fsi-master", "fsi-master";</div><div class='add'>+		compatible = "aspeed,ast2400-cf-fsi-master";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rtc@68 {</div><div class='del'>-		compatible = "dallas,ds3231";</div><div class='add'>+		compatible = "maxim,ds3231";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -209,140 +209,140 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio {</div><div class='del'>-	pin_func_mode0 {</div><div class='add'>+	pin-func-mode0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(C, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "func_mode0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_func_mode1 {</div><div class='add'>+	pin-func-mode1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(C, 5)  GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "func_mode1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_func_mode2 {</div><div class='add'>+	pin-func-mode2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(C, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "func_mode2";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_a0 {</div><div class='add'>+	pin-gpio-a0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(A, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_FAN_RESERVED_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_a1 {</div><div class='add'>+	pin-gpio-a1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(A, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "APSS_WDT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b1 {</div><div class='add'>+	pin-gpio-b1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "APSS_BOOT_MODE";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b2 {</div><div class='add'>+	pin-gpio-b2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "APSS_RESET_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_b7 {</div><div class='add'>+	pin-gpio-b7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(B, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "SPIVID_STBY_RESET_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_d1 {</div><div class='add'>+	pin-gpio-d1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_POWER_UP";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f1 {</div><div class='add'>+	pin-gpio-f1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_BATTERY_TEST";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f4 {</div><div class='add'>+	pin-gpio-f4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "AST_HW_FAULT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f5 {</div><div class='add'>+	pin-gpio-f5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "AST_SYS_FAULT_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_f7 {</div><div class='add'>+	pin-gpio-f7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(F, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_FULL_SPEED_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g3 {</div><div class='add'>+	pin-gpio-g3-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "BMC_FAN_ERROR_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g4 {</div><div class='add'>+	pin-gpio-g4-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_WDT_RST1_P";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_g5 {</div><div class='add'>+	pin-gpio-g5-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_WDT_RST2_P";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h0 {</div><div class='add'>+	pin-gpio-h0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "PE_SLOT_TEST_EN_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h1 {</div><div class='add'>+	pin-gpio-h1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='ctx'> 		line-name = "BMC_RTCRST_N";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h2 {</div><div class='add'>+	pin-gpio-h2-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "SYS_PWROK_BMC";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pin_gpio_h7 {</div><div class='add'>+	pin-gpio-h7-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts<br/>index 24df24ad9c80..a0263d969e51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-romulus.dts</a></div><div class='hunk'>@@ -68,10 +68,9 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";</div><div class='add'>+		compatible = "aspeed,ast2500-cf-fsi-master";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		no-gpio-delays;</div><div class='ctx'> </div><div class='ctx'> 		memory-region = &lt;&amp;coldfire_memory&gt;;</div><div class='ctx'> 		aspeed,sram = &lt;&amp;sram&gt;;</div><div class='hunk'>@@ -263,17 +262,17 @@</div><div class='ctx'> 	/*AB0-AB7*/	"","","","","","","","",</div><div class='ctx'> 	/*AC0-AC7*/	"","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	nic_func_mode0 {</div><div class='add'>+	nic-func-mode0-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	nic_func_mode1 {</div><div class='add'>+	nic-func-mode1-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(D, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-	seq_cont {</div><div class='add'>+	seq-cont-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts<br/>deleted file mode 100644<br/>index a0e8c97e944a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-swift.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,974 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0+</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "aspeed-g5.dtsi"</div><div class='del'>-#include &lt;dt-bindings/gpio/aspeed-gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/leds-pca955x.h&gt;</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Swift BMC";</div><div class='del'>-	compatible = "ibm,swift-bmc", "aspeed,ast2500";</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = &amp;uart5;</div><div class='del'>-		bootargs = "console=ttyS4,115200 earlycon";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@80000000 {</div><div class='del'>-		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		flash_memory: region@98000000 {</div><div class='del'>-			no-map;</div><div class='del'>-			reg = &lt;0x98000000 0x04000000&gt;; /* 64M */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gfx_memory: framebuffer {</div><div class='del'>-			size = &lt;0x01000000&gt;;</div><div class='del'>-			alignment = &lt;0x01000000&gt;;</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reusable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		event-air-water {</div><div class='del'>-			label = "air-water";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(B, 5)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-checkstop {</div><div class='del'>-			label = "checkstop";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(J, 2)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-ps0-presence {</div><div class='del'>-			label = "ps0-presence";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(R, 7)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-ps1-presence {</div><div class='del'>-			label = "ps1-presence";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(N, 0)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-oppanel-presence {</div><div class='del'>-			label = "oppanel-presence";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(A, 7)&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-opencapi-riser-presence {</div><div class='del'>-			label = "opencapi-riser-presence";</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;ASPEED_GPIO(I, 0)&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	iio-hwmon-battery {</div><div class='del'>-		compatible = "iio-hwmon";</div><div class='del'>-		io-channels = &lt;&amp;adc 12&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys-polled {</div><div class='del'>-		compatible = "gpio-keys-polled";</div><div class='del'>-		poll-interval = &lt;1000&gt;;</div><div class='del'>-</div><div class='del'>-		event-scm0-presence {</div><div class='del'>-			label = "scm0-presence";</div><div class='del'>-			gpios = &lt;&amp;pca9552 6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-scm1-presence {</div><div class='del'>-			label = "scm1-presence";</div><div class='del'>-			gpios = &lt;&amp;pca9552 7 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-cpu0vrm-presence {</div><div class='del'>-			label = "cpu0vrm-presence";</div><div class='del'>-			gpios = &lt;&amp;pca9552 12 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;12&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-cpu1vrm-presence {</div><div class='del'>-			label = "cpu1vrm-presence";</div><div class='del'>-			gpios = &lt;&amp;pca9552 13 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;13&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-fan0-presence {</div><div class='del'>-			label = "fan0-presence";</div><div class='del'>-			gpios = &lt;&amp;pca0 5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-fan1-presence {</div><div class='del'>-			label = "fan1-presence";</div><div class='del'>-			gpios = &lt;&amp;pca0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-fan2-presence {</div><div class='del'>-			label = "fan2-presence";</div><div class='del'>-			gpios = &lt;&amp;pca0 7 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-fan3-presence {</div><div class='del'>-			label = "fan3-presence";</div><div class='del'>-			gpios = &lt;&amp;pca0 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		event-fanboost-presence {</div><div class='del'>-			label = "fanboost-presence";</div><div class='del'>-			gpios = &lt;&amp;pca0 9 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;9&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		fan0 {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca0 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan1 {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca0 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan2 {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca0 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan3 {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fanboost {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		front-fault {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		front-power {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca1 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		front-id {</div><div class='del'>-			retain-state-shutdown;</div><div class='del'>-			default-state = "keep";</div><div class='del'>-			gpios = &lt;&amp;pca1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rear-fault {</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rear-id {</div><div class='del'>-			gpios = &lt;&amp;gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fsi: gpio-fsi {</div><div class='del'>-		compatible = "fsi-master-gpio", "fsi-master";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		no-gpio-delays;</div><div class='del'>-</div><div class='del'>-		clock-gpios = &lt;&amp;gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		data-gpios = &lt;&amp;gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		mux-gpios = &lt;&amp;gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		trans-gpios = &lt;&amp;gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	iio-hwmon-dps310 {</div><div class='del'>-		compatible = "iio-hwmon";</div><div class='del'>-		io-channels = &lt;&amp;dps 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;fmc {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		label = "bmc";</div><div class='del'>-		m25p,fast-read;</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-		partitions {</div><div class='del'>-			#address-cells = &lt; 1 &gt;;</div><div class='del'>-			#size-cells = &lt; 1 &gt;;</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			u-boot@0 {</div><div class='del'>-				reg = &lt; 0 0x60000 &gt;;</div><div class='del'>-				label = "u-boot";</div><div class='del'>-			};</div><div class='del'>-			u-boot-env@60000 {</div><div class='del'>-				reg = &lt; 0x60000 0x20000 &gt;;</div><div class='del'>-				label = "u-boot-env";</div><div class='del'>-			};</div><div class='del'>-			obmc-ubi@80000 {</div><div class='del'>-				reg = &lt; 0x80000 0x7F80000&gt;;</div><div class='del'>-				label = "obmc-ubi";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	flash@1 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		label = "alt-bmc";</div><div class='del'>-		m25p,fast-read;</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-		partitions {</div><div class='del'>-			#address-cells = &lt; 1 &gt;;</div><div class='del'>-			#size-cells = &lt; 1 &gt;;</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			u-boot@0 {</div><div class='del'>-				reg = &lt; 0 0x60000 &gt;;</div><div class='del'>-				label = "alt-u-boot";</div><div class='del'>-			};</div><div class='del'>-			u-boot-env@60000 {</div><div class='del'>-				reg = &lt; 0x60000 0x20000 &gt;;</div><div class='del'>-				label = "alt-u-boot-env";</div><div class='del'>-			};</div><div class='del'>-			obmc-ubi@80000 {</div><div class='del'>-				reg = &lt; 0x80000 0x7F80000&gt;;</div><div class='del'>-				label = "alt-obmc-ubi";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_spi1_default&gt;;</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		label = "pnor";</div><div class='del'>-		m25p,fast-read;</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart1 {</div><div class='del'>-	/* Rear RS-232 connector */</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_txd1_default</div><div class='del'>-			&amp;pinctrl_rxd1_default</div><div class='del'>-			&amp;pinctrl_nrts1_default</div><div class='del'>-			&amp;pinctrl_ndtr1_default</div><div class='del'>-			&amp;pinctrl_ndsr1_default</div><div class='del'>-			&amp;pinctrl_ncts1_default</div><div class='del'>-			&amp;pinctrl_ndcd1_default</div><div class='del'>-			&amp;pinctrl_nri1_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	/* APSS */</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_txd2_default &amp;pinctrl_rxd2_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart5 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lpc_ctrl {</div><div class='del'>-	status = "okay";</div><div class='del'>-	memory-region = &lt;&amp;flash_memory&gt;;</div><div class='del'>-	flash = &lt;&amp;spi1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mac0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_rmii1_default&gt;;</div><div class='del'>-	use-ncsi;</div><div class='del'>-	clocks = &lt;&amp;syscon ASPEED_CLK_GATE_MAC1CLK&gt;,</div><div class='del'>-		 &lt;&amp;syscon ASPEED_CLK_MAC1RCLK&gt;;</div><div class='del'>-	clock-names = "MACCLK", "RCLK";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* MUX -&gt;</div><div class='del'>-	 *    Samtec 1</div><div class='del'>-	 *    Samtec 2</div><div class='del'>-	 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	max31785@52 {</div><div class='del'>-		compatible = "maxim,max31785a";</div><div class='del'>-		reg = &lt;0x52&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		fan@0 {</div><div class='del'>-			compatible = "pmbus-fan";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			tach-pulses = &lt;2&gt;;</div><div class='del'>-			maxim,fan-rotor-input = "tach";</div><div class='del'>-			maxim,fan-pwm-freq = &lt;25000&gt;;</div><div class='del'>-			maxim,fan-no-watchdog;</div><div class='del'>-			maxim,fan-no-fault-ramp;</div><div class='del'>-			maxim,fan-ramp = &lt;2&gt;;</div><div class='del'>-			maxim,fan-fault-pin-mon;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan@1 {</div><div class='del'>-			compatible = "pmbus-fan";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			tach-pulses = &lt;2&gt;;</div><div class='del'>-			maxim,fan-rotor-input = "tach";</div><div class='del'>-			maxim,fan-pwm-freq = &lt;25000&gt;;</div><div class='del'>-			maxim,fan-no-watchdog;</div><div class='del'>-			maxim,fan-no-fault-ramp;</div><div class='del'>-			maxim,fan-ramp = &lt;2&gt;;</div><div class='del'>-			maxim,fan-fault-pin-mon;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan@2 {</div><div class='del'>-			compatible = "pmbus-fan";</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			tach-pulses = &lt;2&gt;;</div><div class='del'>-			maxim,fan-rotor-input = "tach";</div><div class='del'>-			maxim,fan-pwm-freq = &lt;25000&gt;;</div><div class='del'>-			maxim,fan-no-watchdog;</div><div class='del'>-			maxim,fan-no-fault-ramp;</div><div class='del'>-			maxim,fan-ramp = &lt;2&gt;;</div><div class='del'>-			maxim,fan-fault-pin-mon;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan@3 {</div><div class='del'>-			compatible = "pmbus-fan";</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-			tach-pulses = &lt;2&gt;;</div><div class='del'>-			maxim,fan-rotor-input = "tach";</div><div class='del'>-			maxim,fan-pwm-freq = &lt;25000&gt;;</div><div class='del'>-			maxim,fan-no-watchdog;</div><div class='del'>-			maxim,fan-no-fault-ramp;</div><div class='del'>-			maxim,fan-ramp = &lt;2&gt;;</div><div class='del'>-			maxim,fan-fault-pin-mon;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fan@4 {</div><div class='del'>-			compatible = "pmbus-fan";</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-			tach-pulses = &lt;2&gt;;</div><div class='del'>-			maxim,fan-rotor-input = "tach";</div><div class='del'>-			maxim,fan-pwm-freq = &lt;25000&gt;;</div><div class='del'>-			maxim,fan-no-watchdog;</div><div class='del'>-			maxim,fan-no-fault-ramp;</div><div class='del'>-			maxim,fan-ramp = &lt;2&gt;;</div><div class='del'>-			maxim,fan-fault-pin-mon;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pca0: pca9552@60 {</div><div class='del'>-		compatible = "nxp,pca9552";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@8 {</div><div class='del'>-			reg = &lt;8&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@9 {</div><div class='del'>-			reg = &lt;9&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@10 {</div><div class='del'>-			reg = &lt;10&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@11 {</div><div class='del'>-			reg = &lt;11&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@12 {</div><div class='del'>-			reg = &lt;12&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@13 {</div><div class='del'>-			reg = &lt;13&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@14 {</div><div class='del'>-			reg = &lt;14&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@15 {</div><div class='del'>-			reg = &lt;15&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	power-supply@68 {</div><div class='del'>-		compatible = "ibm,cffps2";</div><div class='del'>-		reg = &lt;0x68&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	power-supply@69 {</div><div class='del'>-		compatible = "ibm,cffps2";</div><div class='del'>-		reg = &lt;0x69&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@51 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c7 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	dps: dps310@76 {</div><div class='del'>-		compatible = "infineon,dps310";</div><div class='del'>-		reg = &lt;0x76&gt;;</div><div class='del'>-		#io-channel-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmp275@48 {</div><div class='del'>-		compatible = "ti,tmp275";</div><div class='del'>-		reg = &lt;0x48&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	si7021a20@20 {</div><div class='del'>-		compatible = "si,si7021a20";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pca1: pca9551@60 {</div><div class='del'>-		compatible = "nxp,pca9551";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c8 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pca9552: pca9552@60 {</div><div class='del'>-		compatible = "nxp,pca9552";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",</div><div class='del'>-			"GPU0_TH_OVERT_N_BUFF",	"GPU1_TH_OVERT_N_BUFF",</div><div class='del'>-			"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",</div><div class='del'>-			"P9_SCM0_PRES",	"P9_SCM1_PRES",</div><div class='del'>-			"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",</div><div class='del'>-			"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",</div><div class='del'>-			"PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",</div><div class='del'>-			"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";</div><div class='del'>-</div><div class='del'>-		gpio@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@8 {</div><div class='del'>-			reg = &lt;8&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@9 {</div><div class='del'>-			reg = &lt;9&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@10 {</div><div class='del'>-			reg = &lt;10&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@11 {</div><div class='del'>-			reg = &lt;11&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@12 {</div><div class='del'>-			reg = &lt;12&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@13 {</div><div class='del'>-			reg = &lt;13&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@14 {</div><div class='del'>-			reg = &lt;14&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@15 {</div><div class='del'>-			reg = &lt;15&gt;;</div><div class='del'>-			type = &lt;PCA955X_TYPE_GPIO&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@32 {</div><div class='del'>-		compatible = "epson,rx8900";</div><div class='del'>-		reg = &lt;0x32&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@51 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ucd90160@64 {</div><div class='del'>-		compatible = "ti,ucd90160";</div><div class='del'>-		reg = &lt;0x64&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c9 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmp423a@4c {</div><div class='del'>-		compatible = "ti,tmp423";</div><div class='del'>-		reg = &lt;0x4c&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ir35221@71 {</div><div class='del'>-		compatible = "infineon,ir35221";</div><div class='del'>-		reg = &lt;0x71&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ir35221@72 {</div><div class='del'>-		compatible = "infineon,ir35221";</div><div class='del'>-		reg = &lt;0x72&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pca2: pca9539@74 {</div><div class='del'>-		compatible = "nxp,pca9539";</div><div class='del'>-		reg = &lt;0x74&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@8 {</div><div class='del'>-			reg = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@9 {</div><div class='del'>-			reg = &lt;9&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@10 {</div><div class='del'>-			reg = &lt;10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@11 {</div><div class='del'>-			reg = &lt;11&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@12 {</div><div class='del'>-			reg = &lt;12&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@13 {</div><div class='del'>-			reg = &lt;13&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@14 {</div><div class='del'>-			reg = &lt;14&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@15 {</div><div class='del'>-			reg = &lt;15&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c10 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmp423a@4c {</div><div class='del'>-		compatible = "ti,tmp423";</div><div class='del'>-		reg = &lt;0x4c&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ir35221@71 {</div><div class='del'>-		compatible = "infineon,ir35221";</div><div class='del'>-		reg = &lt;0x71&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ir35221@72 {</div><div class='del'>-		compatible = "infineon,ir35221";</div><div class='del'>-		reg = &lt;0x72&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pca3: pca9539@74 {</div><div class='del'>-		compatible = "nxp,pca9539";</div><div class='del'>-		reg = &lt;0x74&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		gpio@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@3 {</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@6 {</div><div class='del'>-			reg = &lt;6&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@8 {</div><div class='del'>-			reg = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@9 {</div><div class='del'>-			reg = &lt;9&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@10 {</div><div class='del'>-			reg = &lt;10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@11 {</div><div class='del'>-			reg = &lt;11&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@12 {</div><div class='del'>-			reg = &lt;12&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@13 {</div><div class='del'>-			reg = &lt;13&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@14 {</div><div class='del'>-			reg = &lt;14&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio@15 {</div><div class='del'>-			reg = &lt;15&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c11 {</div><div class='del'>-	/* MUX</div><div class='del'>-	 *   -&gt; PCIe Slot 0</div><div class='del'>-	 *   -&gt; PCIe Slot 1</div><div class='del'>-	 *   -&gt; PCIe Slot 2</div><div class='del'>-	 *   -&gt; PCIe Slot 3</div><div class='del'>-	 */</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c12 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	tmp275@48 {</div><div class='del'>-		compatible = "ti,tmp275";</div><div class='del'>-		reg = &lt;0x48&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tmp275@4a {</div><div class='del'>-		compatible = "ti,tmp275";</div><div class='del'>-		reg = &lt;0x4a&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c13 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;vuart {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gfx {</div><div class='del'>-	status = "okay";</div><div class='del'>-	memory-region = &lt;&amp;gfx_memory&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wdt1 {</div><div class='del'>-	aspeed,reset-type = "none";</div><div class='del'>-	aspeed,external-signal;</div><div class='del'>-	aspeed,ext-push-pull;</div><div class='del'>-	aspeed,ext-active-high;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_wdtrst1_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wdt2 {</div><div class='del'>-	aspeed,alt-boot;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ibt {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;adc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-       status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci1 {</div><div class='del'>-       status = "okay";</div><div class='del'>-</div><div class='del'>-       pinctrl-names = "default";</div><div class='del'>-       pinctrl-0 = &lt;&amp;pinctrl_sd2_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#include "ibm-power9-dual.dtsi"</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts<br/>index 8b1e82c8cdfe..89907b628b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-witherspoon.dts</a></div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "fsi-master-gpio", "fsi-master";</div><div class='add'>+		compatible = "fsi-master-gpio";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		no-gpio-delays;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts<br/>index 9904f0a58cfa..af3a9d39d277 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-opp-zaius.dts</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 			linux,code = &lt;ASPEED_GPIO(F, 7)&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		event-pcie-e2b-present{</div><div class='add'>+		event-pcie-e2b-present {</div><div class='ctx'> 			label = "pcie-e2b-present";</div><div class='ctx'> 			gpios = &lt;&amp;gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;ASPEED_GPIO(E, 7)&gt;;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fsi: gpio-fsi {</div><div class='del'>-		compatible = "fsi-master-gpio", "fsi-master";</div><div class='add'>+		compatible = "fsi-master-gpio";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		no-gpio-delays;</div><div class='hunk'>@@ -509,25 +509,25 @@</div><div class='ctx'> 	/*AB0-AB7*/	"","","","","","","","",</div><div class='ctx'> 	/*AC0-AC7*/	"","","","","","","","";</div><div class='ctx'> </div><div class='del'>-	line_iso_u146_en {</div><div class='add'>+	line-iso-u146-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ncsi_mux_en_n {</div><div class='add'>+	ncsi-mux-en-n-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	line_bmc_i2c2_sw_rst_n {</div><div class='add'>+	line-bmc-i2c2-sw-rst-n-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	line_bmc_i2c5_sw_rst_n {</div><div class='add'>+	line-bmc-i2c5-sw-rst-n-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts<br/>index 983853eedaef..86451227847b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-quanta-s6q.dts</a></div><div class='hunk'>@@ -381,7 +381,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;5&gt;;</div><div class='ctx'> </div><div class='del'>-			U190_fru@51 {</div><div class='add'>+			eeprom@51 {</div><div class='ctx'> 				compatible = "atmel,24c128";</div><div class='ctx'> 				reg = &lt;0x51&gt;;</div><div class='ctx'> 				pagesize = &lt;32&gt;;</div><div class='hunk'>@@ -460,7 +460,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* MB FRU (U173) @ 0xA2 */</div><div class='del'>-	mb_fru: mb_fru@51 {</div><div class='add'>+	mb_fru: eeprom@51 {</div><div class='ctx'> 		compatible = "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='hunk'>@@ -472,7 +472,7 @@</div><div class='ctx'> 		reg = &lt;0x4a&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	FP_U4_fru@52 {</div><div class='add'>+	eeprom@52 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='hunk'>@@ -509,7 +509,7 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu0_pvccin@60 {</div><div class='del'>-				compatible = "isil,raa229004";</div><div class='add'>+				compatible = "renesas,raa229004";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -530,7 +530,7 @@</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu1_pvccin@72 {</div><div class='del'>-				compatible = "isil,raa229004";</div><div class='add'>+				compatible = "renesas,raa229004";</div><div class='ctx'> 				reg = &lt;0x72&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -593,7 +593,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* SCM FRU (U19) @ 0xA2 */</div><div class='del'>-	scm_fru: scm_fru@51 {</div><div class='add'>+	scm_fru: eeprom@51 {</div><div class='ctx'> 		compatible = "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts<br/>index b8f0b08018a3..98f3e0437704 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dts</a></div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					reg = &lt;7&gt;;</div><div class='del'>-					at24@50 {</div><div class='add'>+					eeprom@50 {</div><div class='ctx'> 						compatible = "atmel,24c64";</div><div class='ctx'> 						reg = &lt;0x50&gt;;</div><div class='ctx'> 						pagesize = &lt;32&gt;;</div><div class='hunk'>@@ -196,7 +196,7 @@</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					reg = &lt;7&gt;;</div><div class='del'>-					at24@50 {</div><div class='add'>+					eeprom@50 {</div><div class='ctx'> 						compatible = "atmel,24c64";</div><div class='ctx'> 						reg = &lt;0x50&gt;;</div><div class='ctx'> 						pagesize = &lt;32&gt;;</div><div class='hunk'>@@ -205,7 +205,7 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='del'>-			at24@50 {</div><div class='add'>+			eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c64";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 				pagesize = &lt;32&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi<br/>index 1a5b25b2ea29..8c953e3a1d41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-bmc-vegman.dtsi</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> 			reusable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ramoops@9eff0000{</div><div class='add'>+		ramoops@9eff0000 {</div><div class='ctx'> 			compatible = "ramoops";</div><div class='ctx'> 			reg = &lt;0x9eff0000 0x10000&gt;;</div><div class='ctx'> 			record-size = &lt;0x2000&gt;;</div><div class='hunk'>@@ -291,7 +291,7 @@</div><div class='ctx'> 	/* SMB_BMC_MGMT_LVC3 */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi<br/>index 78c967812492..c3d4d916c69b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-g4.dtsi</a></div><div class='hunk'>@@ -356,7 +356,6 @@</div><div class='ctx'> 			lpc: lpc@1e789000 {</div><div class='ctx'> 				compatible = "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0x1e789000 0x1000&gt;;</div><div class='del'>-				reg-io-width = &lt;4&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi<br/>index 57a699a7c149..39500bdb4747 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-g5.dtsi</a></div><div class='hunk'>@@ -273,7 +273,6 @@</div><div class='ctx'> 			gfx: display@1e6e6000 {</div><div class='ctx'> 				compatible = "aspeed,ast2500-gfx", "syscon";</div><div class='ctx'> 				reg = &lt;0x1e6e6000 0x1000&gt;;</div><div class='del'>-				reg-io-width = &lt;4&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;syscon ASPEED_CLK_GATE_D1CLK&gt;;</div><div class='ctx'> 				resets = &lt;&amp;syscon ASPEED_RESET_CRT1&gt;;</div><div class='ctx'> 				syscon = &lt;&amp;syscon&gt;;</div><div class='hunk'>@@ -441,7 +440,6 @@</div><div class='ctx'> 			lpc: lpc@1e789000 {</div><div class='ctx'> 				compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0x1e789000 0x1000&gt;;</div><div class='del'>-				reg-io-width = &lt;4&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi<br/>index 289668f051eb..e87c4b58994a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi</a></div><div class='hunk'>@@ -412,6 +412,16 @@</div><div class='ctx'> 		groups = "MDIO4";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_ncsi3_default: ncsi3_default {</div><div class='add'>+		function = "RMII3";</div><div class='add'>+		groups = "NCSI3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ncsi4_default: ncsi4_default {</div><div class='add'>+		function = "RMII4";</div><div class='add'>+		groups = "NCSI4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_ncts1_default: ncts1_default {</div><div class='ctx'> 		function = "NCTS1";</div><div class='ctx'> 		groups = "NCTS1";</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi<br/>index 8ed715bd53aa..f8662c8ac089 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/aspeed-g6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/aspeed-g6.dtsi</a></div><div class='hunk'>@@ -382,7 +382,6 @@</div><div class='ctx'> 			gfx: display@1e6e6000 {</div><div class='ctx'> 				compatible = "aspeed,ast2600-gfx", "syscon";</div><div class='ctx'> 				reg = &lt;0x1e6e6000 0x1000&gt;;</div><div class='del'>-				reg-io-width = &lt;4&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;syscon ASPEED_CLK_GATE_D1CLK&gt;;</div><div class='ctx'> 				resets = &lt;&amp;syscon ASPEED_RESET_GRAPHICS&gt;;</div><div class='ctx'> 				syscon = &lt;&amp;syscon&gt;;</div><div class='hunk'>@@ -572,7 +571,6 @@</div><div class='ctx'> 			lpc: lpc@1e789000 {</div><div class='ctx'> 				compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";</div><div class='ctx'> 				reg = &lt;0x1e789000 0x1000&gt;;</div><div class='del'>-				reg-io-width = &lt;4&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -662,7 +660,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 				sdhci0: sdhci@1e740100 {</div><div class='del'>-					compatible = "aspeed,ast2600-sdhci", "sdhci";</div><div class='add'>+					compatible = "aspeed,ast2600-sdhci";</div><div class='ctx'> 					reg = &lt;0x100 0x100&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					sdhci,auto-cmd12;</div><div class='hunk'>@@ -671,7 +669,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				sdhci1: sdhci@1e740200 {</div><div class='del'>-					compatible = "aspeed,ast2600-sdhci", "sdhci";</div><div class='add'>+					compatible = "aspeed,ast2600-sdhci";</div><div class='ctx'> 					reg = &lt;0x200 0x100&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					sdhci,auto-cmd12;</div><div class='hunk'>@@ -847,7 +845,7 @@</div><div class='ctx'> </div><div class='ctx'> 			fsim0: fsi@1e79b000 {</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "aspeed,ast2600-fsi-master", "fsi-master";</div><div class='add'>+				compatible = "aspeed,ast2600-fsi-master";</div><div class='ctx'> 				reg = &lt;0x1e79b000 0x94&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -859,7 +857,7 @@</div><div class='ctx'> </div><div class='ctx'> 			fsim1: fsi@1e79b100 {</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "aspeed,ast2600-fsi-master", "fsi-master";</div><div class='add'>+				compatible = "aspeed,ast2600-fsi-master";</div><div class='ctx'> 				reg = &lt;0x1e79b100 0x94&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi b/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi<br/>index 00e5887c926f..0ef225acddfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi</a></div><div class='hunk'>@@ -31,9 +31,13 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio-sck = &lt;&amp;gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		gpio-mosi = &lt;&amp;gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		gpio-miso = &lt;&amp;gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * chipselect pins are defined in platform .dts files</div><div class='add'>+		 * separately.</div><div class='add'>+		 */</div><div class='add'>+		sck-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		tpm@0 {</div><div class='ctx'> 			compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='hunk'>@@ -152,18 +156,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;emmc_controller {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;emmc {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	non-removable;</div><div class='del'>-	max-frequency = &lt;25000000&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi b/arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi<br/>new file mode 100644<br/>index 000000000000..efd92232cda2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/facebook-bmc-flash-layout-128-data64.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2020 Facebook Inc.</div><div class='add'>+</div><div class='add'>+partitions {</div><div class='add'>+	compatible = "fixed-partitions";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * u-boot partition: 896KB.</div><div class='add'>+	 */</div><div class='add'>+	u-boot@0 {</div><div class='add'>+		reg = &lt;0x0 0xe0000&gt;;</div><div class='add'>+		label = "u-boot";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * u-boot environment variables: 64KB.</div><div class='add'>+	 */</div><div class='add'>+	u-boot-env@e0000 {</div><div class='add'>+		reg = &lt;0xe0000 0x10000&gt;;</div><div class='add'>+		label = "env";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * image metadata partition (64KB), used by Facebook internal</div><div class='add'>+	 * tools.</div><div class='add'>+	 */</div><div class='add'>+	image-meta@f0000 {</div><div class='add'>+		reg = &lt;0xf0000 0x10000&gt;;</div><div class='add'>+		label = "meta";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * FIT image: 63 MB.</div><div class='add'>+	 */</div><div class='add'>+	fit@100000 {</div><div class='add'>+		reg = &lt;0x100000 0x3f00000&gt;;</div><div class='add'>+		label = "fit";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * "data0" partition (64MB) is used by Facebook BMC platforms as</div><div class='add'>+	 * persistent data store.</div><div class='add'>+	 */</div><div class='add'>+	data0@4000000 {</div><div class='add'>+		reg = &lt;0x4000000 0x4000000&gt;;</div><div class='add'>+		label = "data0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Although the master partition can be created by enabling</div><div class='add'>+	 * MTD_PARTITIONED_MASTER option, below "flash0" partition is</div><div class='add'>+	 * explicitly created to avoid breaking legacy applications.</div><div class='add'>+	 */</div><div class='add'>+	flash0@0 {</div><div class='add'>+		reg = &lt;0x0 0x8000000&gt;;</div><div class='add'>+		label = "flash0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi b/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi<br/>index 07ce3b2bc62a..06fac236773f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi</a></div><div class='hunk'>@@ -82,6 +82,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam0_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -98,6 +99,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam0_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -114,8 +116,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam0_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -131,8 +133,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam0_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -249,6 +251,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam1_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -265,6 +268,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam1_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -281,8 +285,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam1_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -298,8 +302,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam1_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi b/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi<br/>index 57494c744b5d..9501f66d0030 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi</a></div><div class='hunk'>@@ -733,6 +733,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam2_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -749,6 +750,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam2_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -765,8 +767,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam2_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -782,8 +784,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam2_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1106,6 +1108,7 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cfam3_spi0: spi@0 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -1122,6 +1125,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam3_spi1: spi@20 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x20&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -1138,8 +1142,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam3_spi2: spi@40 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x40&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1155,8 +1159,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cfam3_spi3: spi@60 {</div><div class='add'>+				compatible = "ibm,spi-fsi";</div><div class='ctx'> 				reg = &lt;0x60&gt;;</div><div class='del'>-				compatible =  "ibm,fsi2spi";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/Makefile b/arch/arm/boot/dts/broadcom/Makefile<br/>index 5881bcc95eba..2552e11b5e31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/Makefile</a></div><div class='hunk'>@@ -7,6 +7,7 @@ DTC_FLAGS_bcm2835-rpi-b-plus := -@</div><div class='ctx'> DTC_FLAGS_bcm2835-rpi-a-plus := -@</div><div class='ctx'> DTC_FLAGS_bcm2835-rpi-cm1-io1 := -@</div><div class='ctx'> DTC_FLAGS_bcm2836-rpi-2-b := -@</div><div class='add'>+DTC_FLAGS_bcm2837-rpi-2-b := -@</div><div class='ctx'> DTC_FLAGS_bcm2837-rpi-3-a-plus := -@</div><div class='ctx'> DTC_FLAGS_bcm2837-rpi-3-b := -@</div><div class='ctx'> DTC_FLAGS_bcm2837-rpi-3-b-plus := -@</div><div class='hunk'>@@ -25,6 +26,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \</div><div class='ctx'> 	bcm2835-rpi-a-plus.dtb \</div><div class='ctx'> 	bcm2835-rpi-cm1-io1.dtb \</div><div class='ctx'> 	bcm2836-rpi-2-b.dtb \</div><div class='add'>+	bcm2837-rpi-2-b.dtb \</div><div class='ctx'> 	bcm2837-rpi-3-a-plus.dtb \</div><div class='ctx'> 	bcm2837-rpi-3-b.dtb \</div><div class='ctx'> 	bcm2837-rpi-3-b-plus.dtb \</div><div class='hunk'>@@ -36,6 +38,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \</div><div class='ctx'> 	bcm2835-rpi-zero.dtb \</div><div class='ctx'> 	bcm2835-rpi-zero-w.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_BCMBCA) += \</div><div class='add'>+	bcm6846-genexis-xg6846b.dtb \</div><div class='ctx'> 	bcm947622.dtb \</div><div class='ctx'> 	bcm963138.dtb \</div><div class='ctx'> 	bcm963138dvt.dtb \</div><div class='hunk'>@@ -48,6 +51,7 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \</div><div class='ctx'> dtb-$(CONFIG_ARCH_BCM_5301X) += \</div><div class='ctx'> 	bcm4708-asus-rt-ac56u.dtb \</div><div class='ctx'> 	bcm4708-asus-rt-ac68u.dtb \</div><div class='add'>+	bcm4708-buffalo-wxr-1750dhp.dtb \</div><div class='ctx'> 	bcm4708-buffalo-wzr-1750dhp.dtb \</div><div class='ctx'> 	bcm4708-buffalo-wzr-1166dhp.dtb \</div><div class='ctx'> 	bcm4708-buffalo-wzr-1166dhp2.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi b/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi<br/>index 87180b7fd695..f535212cb52f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi</a></div><div class='hunk'>@@ -46,6 +46,11 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pinctrl: pinctrl@1004800 {</div><div class='add'>+			compatible = "brcm,bcm21664-pinctrl";</div><div class='add'>+			reg = &lt;0x01004800 0x7f4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		timer@1006000 {</div><div class='ctx'> 			compatible = "brcm,kona-timer";</div><div class='ctx'> 			reg = &lt;0x01006000 0x1c&gt;;</div><div class='hunk'>@@ -332,3 +337,5 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "bcm2166x-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi b/arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..51b8730c8fee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2166x-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,297 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Common pinmux configrations for BCM2166x (BCM21664/BCM23550).</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Artur Weber &lt;aweber.kernel@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	/* BSC1 */</div><div class='add'>+	bsc1_pins: bsc1-pins {</div><div class='add'>+		bsc1clk-grp0 {</div><div class='add'>+			pins = "bsc1clk";</div><div class='add'>+			function = "alt1"; /* BSC1CLK */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsc1dat-grp0 {</div><div class='add'>+			pins = "bsc1dat";</div><div class='add'>+			function = "alt1"; /* BSC1DAT */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* BSC2 */</div><div class='add'>+	bsc2_pins: bsc2-pins {</div><div class='add'>+		bsc2clk-grp0 {</div><div class='add'>+			pins = "gpio16";</div><div class='add'>+			function = "alt2"; /* BSC2CLK */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsc2dat-grp0 {</div><div class='add'>+			pins = "gpio17";</div><div class='add'>+			function = "alt2"; /* BSC2DAT */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* BSC3 */</div><div class='add'>+	bsc3_pins: bsc3-pins {</div><div class='add'>+		bsc3clk-grp0 {</div><div class='add'>+			pins = "lcdscl";</div><div class='add'>+			function = "alt1"; /* BSC3_CLK */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsc3dat-grp0 {</div><div class='add'>+			pins = "lcdsda";</div><div class='add'>+			function = "alt1"; /* BSC3_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* BSC4 */</div><div class='add'>+	bsc4_pins: bsc4-pins {</div><div class='add'>+		bsc4clk-grp0 {</div><div class='add'>+			pins = "lcdres";</div><div class='add'>+			function = "alt1"; /* BSC4_CLK */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsc4dat-grp0 {</div><div class='add'>+			pins = "lcdte";</div><div class='add'>+			function = "alt1"; /* BSC4_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMBSC */</div><div class='add'>+	pmbsc_pins: pmbsc-pins {</div><div class='add'>+		pmbscclk-grp0 {</div><div class='add'>+			pins = "pmbscclk";</div><div class='add'>+			function = "alt1"; /* PMBSCCLK */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmbscdat-grp0 {</div><div class='add'>+			pins = "pmbscdat";</div><div class='add'>+			function = "alt1"; /* PMBSCDAT */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SD */</div><div class='add'>+	sd_width1_pins: sd-width1-pins {</div><div class='add'>+		sdck-grp0 {</div><div class='add'>+			pins = "sdck";</div><div class='add'>+			function = "alt1"; /* SDCK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdcmd-grp0 {</div><div class='add'>+			pins = "sdcmd";</div><div class='add'>+			function = "alt1"; /* SDCMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sddat-grp0 {</div><div class='add'>+			pins = "sddat0";</div><div class='add'>+			function = "alt1"; /* SDDATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_width4_pins: sd-width4-pins {</div><div class='add'>+		sdck-grp0 {</div><div class='add'>+			pins = "sdck";</div><div class='add'>+			function = "alt1"; /* SDCK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdcmd-grp0 {</div><div class='add'>+			pins = "sdcmd";</div><div class='add'>+			function = "alt1"; /* SDCMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sddat-grp0 {</div><div class='add'>+			pins = "sddat0", "sddat1", "sddat2", "sddat3";</div><div class='add'>+			function = "alt1"; /* SDDATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SD1 */</div><div class='add'>+	sd1_width1_pins: sd1-width1-pins {</div><div class='add'>+		sd1ck-grp0 {</div><div class='add'>+			pins = "mmc1dat7";</div><div class='add'>+			function = "alt6"; /* SD1CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1cmd-grp0 {</div><div class='add'>+			pins = "spi0txd";</div><div class='add'>+			function = "alt2"; /* SD1CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1dat0-grp0 {</div><div class='add'>+			pins = "mmc1dat5";</div><div class='add'>+			function = "alt6"; /* SD1DAT0 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_width4_pins: sd1-width4-pins {</div><div class='add'>+		sd1ck-grp0 {</div><div class='add'>+			pins = "mmc1dat7";</div><div class='add'>+			function = "alt6"; /* SD1CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1cmd-grp0 {</div><div class='add'>+			pins = "spi0txd";</div><div class='add'>+			function = "alt2"; /* SD1CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1dat0-grp0 {</div><div class='add'>+			pins = "mmc1dat5";</div><div class='add'>+			function = "alt6"; /* SD1DAT0 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1dat1-grp0 {</div><div class='add'>+			pins = "gpio93";</div><div class='add'>+			function = "alt1"; /* SD1DAT1 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1dat2-grp0 {</div><div class='add'>+			pins = "gpio94";</div><div class='add'>+			function = "alt1"; /* SD1DAT2 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1dat3-grp0 {</div><div class='add'>+			pins = "mmc1dat3";</div><div class='add'>+			function = "alt6"; /* SD1DAT3 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* MMC0 */</div><div class='add'>+	mmc0_width1_pins: mmc0-width1-pins {</div><div class='add'>+		mmc0ck-grp0 {</div><div class='add'>+			pins = "mmc0ck";</div><div class='add'>+			function = "alt1"; /* MMC0CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0cmd-grp0 {</div><div class='add'>+			pins = "mmc0cmd";</div><div class='add'>+			function = "alt1"; /* MMC0CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0dat-grp0 {</div><div class='add'>+			pins = "mmc0dat0";</div><div class='add'>+			function = "alt1"; /* MMC0DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_width4_pins: mmc0-width4-pins {</div><div class='add'>+		mmc0ck-grp0 {</div><div class='add'>+			pins = "mmc0ck";</div><div class='add'>+			function = "alt1"; /* MMC0CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0cmd-grp0 {</div><div class='add'>+			pins = "mmc0cmd";</div><div class='add'>+			function = "alt1"; /* MMC0CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0dat-grp0 {</div><div class='add'>+			pins = "mmc0dat0", "mmc0dat1", "mmc0dat2", "mmc0dat3";</div><div class='add'>+			function = "alt1"; /* MMC0DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_width8_pins: mmc0-width8-pins {</div><div class='add'>+		mmc0ck-grp0 {</div><div class='add'>+			pins = "mmc0ck";</div><div class='add'>+			function = "alt1"; /* MMC0CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0cmd-grp0 {</div><div class='add'>+			pins = "mmc0cmd";</div><div class='add'>+			function = "alt1"; /* MMC0CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0dat-grp0 {</div><div class='add'>+			pins = "mmc0dat0", "mmc0dat1", "mmc0dat2", "mmc0dat3",</div><div class='add'>+			       "mmc0dat4", "mmc0dat5", "mmc0dat6", "mmc0dat7";</div><div class='add'>+			function = "alt1"; /* MMC0DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* MMC1 */</div><div class='add'>+	mmc1_width1_pins: mmc1-width1-pins {</div><div class='add'>+		mmc1ck-grp0 {</div><div class='add'>+			pins = "mmc1ck";</div><div class='add'>+			function = "alt1"; /* MMC1CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1cmd-grp0 {</div><div class='add'>+			pins = "mmc1cmd";</div><div class='add'>+			function = "alt1"; /* MMC1CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1dat-grp0 {</div><div class='add'>+			pins = "mmc1dat0";</div><div class='add'>+			function = "alt1"; /* MMC1DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_width4_pins: mmc1-width4-pins {</div><div class='add'>+		mmc1ck-grp0 {</div><div class='add'>+			pins = "mmc1ck";</div><div class='add'>+			function = "alt1"; /* MMC1CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1cmd-grp0 {</div><div class='add'>+			pins = "mmc1cmd";</div><div class='add'>+			function = "alt1"; /* MMC1CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1dat-grp0 {</div><div class='add'>+			pins = "mmc1dat0", "mmc1dat1", "mmc1dat2", "mmc1dat3";</div><div class='add'>+			function = "alt1"; /* MMC1DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_width8_pins: mmc1-width8-pins {</div><div class='add'>+		mmc1ck-grp0 {</div><div class='add'>+			pins = "mmc1ck";</div><div class='add'>+			function = "alt1"; /* MMC1CK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1cmd-grp0 {</div><div class='add'>+			pins = "mmc1cmd";</div><div class='add'>+			function = "alt1"; /* MMC1CMD */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1dat-grp0 {</div><div class='add'>+			pins = "mmc1dat0", "mmc1dat1", "mmc1dat2", "mmc1dat3",</div><div class='add'>+			       "mmc1dat4", "mmc1dat5", "mmc1dat6", "mmc1dat7";</div><div class='add'>+			function = "alt1"; /* MMC1DATx */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi b/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi<br/>index 6bf4241fe3b7..c78ed064d166 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include "bcm2835-rpi.dtsi"</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/power/raspberrypi-power.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/raspberrypi,firmware-reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -101,7 +100,3 @@</div><div class='ctx'> &amp;vchiq {</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;xhci {</div><div class='del'>-	power-domains = &lt;&amp;power RPI_POWER_DOMAIN_USB&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2711.dtsi b/arch/arm/boot/dts/broadcom/bcm2711.dtsi<br/>index e4e42af21ef3..c06d9f5e53c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2711.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2711.dtsi</a></div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;clocks BCM2835_CLOCK_UART&gt;,</div><div class='ctx'> 				 &lt;&amp;clocks BCM2835_CLOCK_VPU&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00241011&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;clocks BCM2835_CLOCK_UART&gt;,</div><div class='ctx'> 				 &lt;&amp;clocks BCM2835_CLOCK_VPU&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00241011&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;clocks BCM2835_CLOCK_UART&gt;,</div><div class='ctx'> 				 &lt;&amp;clocks BCM2835_CLOCK_VPU&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00241011&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;clocks BCM2835_CLOCK_UART&gt;,</div><div class='ctx'> 				 &lt;&amp;clocks BCM2835_CLOCK_VPU&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00241011&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -451,8 +451,6 @@</div><div class='ctx'> 					  IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |</div><div class='ctx'> 					  IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-		/* This only applies to the ARMv7 stub */</div><div class='del'>-		arm,cpu-registers-not-fw-configured;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus: cpus {</div><div class='hunk'>@@ -610,6 +608,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pm BCM2835_POWER_DOMAIN_USB&gt;;</div><div class='ctx'> 			/* DWC2 and this IP block share the same USB PHY,</div><div class='ctx'> 			 * enabling both at the same time results in lockups.</div><div class='ctx'> 			 * So keep this node disabled and let the bootloader</div><div class='hunk'>@@ -1177,6 +1176,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm28155-ap.dts b/arch/arm/boot/dts/broadcom/bcm28155-ap.dts<br/>index 2f3634545e64..cefaa9a3c45c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm28155-ap.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm28155-ap.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm28155-ap.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm28155-ap.dts</a></div><div class='hunk'>@@ -37,7 +37,39 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pmu: pmu@8 {</div><div class='add'>+		compatible = "brcm,bcm59056";</div><div class='add'>+		interrupts = &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			camldo1_reg: camldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdldo_reg: sdldo {</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdxldo_reg: sdxldo {</div><div class='add'>+				regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbldo_reg: usbldo {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			iosr1_reg: iosr1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -74,39 +106,3 @@</div><div class='ctx'> &amp;usbphy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-#include "bcm59056.dtsi"</div><div class='del'>-</div><div class='del'>-&amp;pmu {</div><div class='del'>-	compatible = "brcm,bcm59056";</div><div class='del'>-	interrupts = &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	regulators {</div><div class='del'>-		camldo1_reg: camldo1 {</div><div class='del'>-			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdldo_reg: sdldo {</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdxldo_reg: sdxldo {</div><div class='del'>-			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbldo_reg: usbldo {</div><div class='del'>-			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		iosr1_reg: iosr1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts b/arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts<br/>new file mode 100644<br/>index 000000000000..1868cee05853<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2837-rpi-2-b.dts</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "bcm2837.dtsi"</div><div class='add'>+#include "bcm2836-rpi.dtsi"</div><div class='add'>+#include "bcm283x-rpi-led-deprecated.dtsi"</div><div class='add'>+#include "bcm283x-rpi-smsc9514.dtsi"</div><div class='add'>+#include "bcm283x-rpi-usb-host.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";</div><div class='add'>+	model = "Raspberry Pi 2 Model B rev 1.2";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio {</div><div class='add'>+	/*</div><div class='add'>+	 * Taken from rpi_SCH_2b_1p2_reduced.pdf and</div><div class='add'>+	 * the official GPU firmware DT blob.</div><div class='add'>+	 *</div><div class='add'>+	 * Legend:</div><div class='add'>+	 * "FOO" = GPIO line named "FOO" on the schematic</div><div class='add'>+	 * "FOO_N" = GPIO line named "FOO" on schematic, active low</div><div class='add'>+	 */</div><div class='add'>+	gpio-line-names = "ID_SDA",</div><div class='add'>+			  "ID_SCL",</div><div class='add'>+			  "GPIO2",</div><div class='add'>+			  "GPIO3",</div><div class='add'>+			  "GPIO4",</div><div class='add'>+			  "GPIO5",</div><div class='add'>+			  "GPIO6",</div><div class='add'>+			  "GPIO7",</div><div class='add'>+			  "GPIO8",</div><div class='add'>+			  "GPIO9",</div><div class='add'>+			  "GPIO10",</div><div class='add'>+			  "GPIO11",</div><div class='add'>+			  "GPIO12",</div><div class='add'>+			  "GPIO13",</div><div class='add'>+			  "GPIO14",</div><div class='add'>+			  "GPIO15",</div><div class='add'>+			  "GPIO16",</div><div class='add'>+			  "GPIO17",</div><div class='add'>+			  "GPIO18",</div><div class='add'>+			  "GPIO19",</div><div class='add'>+			  "GPIO20",</div><div class='add'>+			  "GPIO21",</div><div class='add'>+			  "GPIO22",</div><div class='add'>+			  "GPIO23",</div><div class='add'>+			  "GPIO24",</div><div class='add'>+			  "GPIO25",</div><div class='add'>+			  "GPIO26",</div><div class='add'>+			  "GPIO27",</div><div class='add'>+			  "SDA0",</div><div class='add'>+			  "SCL0",</div><div class='add'>+			  "", /* GPIO30 */</div><div class='add'>+			  "LAN_RUN",</div><div class='add'>+			  "CAM_GPIO1",</div><div class='add'>+			  "", /* GPIO33 */</div><div class='add'>+			  "", /* GPIO34 */</div><div class='add'>+			  "PWR_LOW_N",</div><div class='add'>+			  "", /* GPIO36 */</div><div class='add'>+			  "", /* GPIO37 */</div><div class='add'>+			  "USB_LIMIT",</div><div class='add'>+			  "", /* GPIO39 */</div><div class='add'>+			  "PWM0_OUT",</div><div class='add'>+			  "CAM_GPIO0",</div><div class='add'>+			  "SMPS_SCL",</div><div class='add'>+			  "SMPS_SDA",</div><div class='add'>+			  "ETH_CLK",</div><div class='add'>+			  "PWM1_OUT",</div><div class='add'>+			  "HDMI_HPD_N",</div><div class='add'>+			  "STATUS_LED",</div><div class='add'>+			  /* Used by SD Card */</div><div class='add'>+			  "SD_CLK_R",</div><div class='add'>+			  "SD_CMD_R",</div><div class='add'>+			  "SD_DATA0_R",</div><div class='add'>+			  "SD_DATA1_R",</div><div class='add'>+			  "SD_DATA2_R",</div><div class='add'>+			  "SD_DATA3_R";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gpioout &amp;alt0 &amp;i2s_alt0&gt;;</div><div class='add'>+</div><div class='add'>+	/* I2S interface */</div><div class='add'>+	i2s_alt0: i2s_alt0 {</div><div class='add'>+		brcm,pins = &lt;18 19 20 21&gt;;</div><div class='add'>+		brcm,function = &lt;BCM2835_FSEL_ALT0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio 46 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	power-domains = &lt;&amp;power RPI_POWER_DOMAIN_HDMI&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_act {</div><div class='add'>+	gpios = &lt;&amp;gpio 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;leds {</div><div class='add'>+	led-pwr {</div><div class='add'>+		label = "PWR";</div><div class='add'>+		gpios = &lt;&amp;gpio 35 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		default-state = "keep";</div><div class='add'>+		linux,default-trigger = "default-on";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_gpio40 &amp;pwm1_gpio45&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhost {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhost_gpio48&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_gpio14&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts<br/>index 72d26d130efa..85f54fa595aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;hdmi {</div><div class='del'>-	hpd-gpios = &lt;&amp;expgpio 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	hpd-gpios = &lt;&amp;expgpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	power-domains = &lt;&amp;power RPI_POWER_DOMAIN_HDMI&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts b/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts<br/>new file mode 100644<br/>index 000000000000..f5c95c9a712e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm4708-buffalo-wxr-1750dhp.dts</a></div><div class='hunk'>@@ -0,0 +1,138 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Author: Taishi Shimizu &lt;s.taishi14142@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm4708.dtsi"</div><div class='add'>+#include "bcm5301x-nand-cs0-bch8.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "buffalo,wxr-1750dhp", "brcm,bcm4708";</div><div class='add'>+	model = "Buffalo WXR-1750DHP";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		reg = &lt;0x00000000 0x08000000&gt;,</div><div class='add'>+		      &lt;0x88000000 0x08000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-aoss {</div><div class='add'>+			gpios = &lt;&amp;chipcommon 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "AOSS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIO 3 is a switch button with AUTO / MANUAL. */</div><div class='add'>+		button-manual {</div><div class='add'>+			gpios = &lt;&amp;chipcommon 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "MANUAL";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-restart {</div><div class='add'>+			gpios = &lt;&amp;chipcommon 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIO 8 and 9 are a tri-state switch button with</div><div class='add'>+		 * ROUTER / AP / WB.</div><div class='add'>+		 */</div><div class='add'>+		button-router {</div><div class='add'>+			gpios = &lt;&amp;chipcommon 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "ROUTER";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-wb {</div><div class='add'>+			gpios = &lt;&amp;chipcommon 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "WB";</div><div class='add'>+			linux,code = &lt;BTN_2&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-internet {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = "internet";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-power0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-power1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-router0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = "router";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-router1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = "router";</div><div class='add'>+			gpios = &lt;&amp;chipcommon 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-usb {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_USB;</div><div class='add'>+			gpios = &lt;&amp;chipcommon 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "usbport";</div><div class='add'>+			trigger-sources = &lt;&amp;xhci_port1 &amp;ehci_port1 &amp;ohci_port1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;srab {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			label = "wan";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			label = "lan4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			label = "lan3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@3 {</div><div class='add'>+			label = "lan2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@4 {</div><div class='add'>+			label = "lan1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	vcc-gpio = &lt;&amp;chipcommon 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts<br/>index 53cb0c58f6d0..3da2daee0c84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts</a></div><div class='hunk'>@@ -124,19 +124,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@1 {</div><div class='del'>-			label = "lan1";</div><div class='add'>+			label = "lan4";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@2 {</div><div class='del'>-			label = "lan2";</div><div class='add'>+			label = "lan3";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@3 {</div><div class='del'>-			label = "lan3";</div><div class='add'>+			label = "lan2";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@4 {</div><div class='del'>-			label = "lan4";</div><div class='add'>+			label = "lan1";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts<br/>index 6c666dc7ad23..01ec8c03686a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts</a></div><div class='hunk'>@@ -126,11 +126,11 @@</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		port@0 {</div><div class='del'>-			label = "lan4";</div><div class='add'>+			label = "wan";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@1 {</div><div class='del'>-			label = "lan3";</div><div class='add'>+			label = "lan1";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@2 {</div><div class='hunk'>@@ -138,11 +138,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@3 {</div><div class='del'>-			label = "lan1";</div><div class='add'>+			label = "lan3";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		port@4 {</div><div class='del'>-			label = "wan";</div><div class='add'>+			label = "lan4";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts<br/>index 0bf5106f7012..08abfdc63d18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts</a></div><div class='hunk'>@@ -59,6 +59,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;gmac0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	nvmem-cells = &lt;&amp;macaddr_board_config_66&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='hunk'>@@ -102,8 +105,25 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		partition@800000 {</div><div class='add'>+			compatible = "linux,ubi";</div><div class='ctx'> 			label = "ubi";</div><div class='ctx'> 			reg = &lt;0x800000 0x7780000&gt;;</div><div class='add'>+</div><div class='add'>+			volumes {</div><div class='add'>+				ubi-volume-board-config {</div><div class='add'>+					volname = "board-config";</div><div class='add'>+</div><div class='add'>+					nvmem-layout {</div><div class='add'>+						compatible = "fixed-layout";</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						macaddr_board_config_66: macaddr@66 {</div><div class='add'>+							reg = &lt;0x66 0x6&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts b/arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts<br/>index 975f854f652f..08cf1220b655 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm53340-ubnt-unifi-switch8.dts</a></div><div class='hunk'>@@ -32,7 +32,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		compatible = "m25p80";</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm59056.dtsi b/arch/arm/boot/dts/broadcom/bcm59056.dtsi<br/>deleted file mode 100644<br/>index a9bb7ad81378..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm59056.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm59056.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,91 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>-* Copyright 2014 Linaro Limited</div><div class='del'>-* Author: Matt Porter &lt;mporter@linaro.org&gt;</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-&amp;pmu {</div><div class='del'>-	compatible = "brcm,bcm59056";</div><div class='del'>-	regulators {</div><div class='del'>-		rfldo_reg: rfldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		camldo1_reg: camldo1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		camldo2_reg: camldo2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		simldo1_reg: simldo1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		simldo2_reg: simldo2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdldo_reg: sdldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdxldo_reg: sdxldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmcldo1_reg: mmcldo1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmcldo2_reg: mmcldo2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		audldo_reg: audldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		micldo_reg: micldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbldo_reg: usbldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vibldo_reg: vibldo {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		csr_reg: csr {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		iosr1_reg: iosr1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		iosr2_reg: iosr2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		msr_reg: msr {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdsr1_reg: sdsr1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sdsr2_reg: sdsr2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vsr_reg: vsr {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo1_reg: gpldo1 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo2_reg: gpldo2 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo3_reg: gpldo3 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo4_reg: gpldo4 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo5_reg: gpldo5 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpldo6_reg: gpldo6 {</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vbus_reg: vbus {</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi<br/>index e74ba6bf370d..4ec568586b14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63138.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63138.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63138.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm63138.dtsi</a></div><div class='hunk'>@@ -184,13 +184,69 @@</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0 0xfffe8000 0x8100&gt;;</div><div class='add'>+		ranges = &lt;0 0xfffe8000 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		timer: timer@80 {</div><div class='ctx'> 			compatible = "brcm,bcm6328-timer", "syscon";</div><div class='ctx'> 			reg = &lt;0x80 0x3c&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@100 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x100 0x04&gt;, &lt;0x114 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@104 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x104 0x04&gt;, &lt;0x118 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@108 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x108 0x04&gt;, &lt;0x11c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@10c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x10c 0x04&gt;, &lt;0x120 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@110 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x110 0x04&gt;, &lt;0x124 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@300 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0x300 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial0: serial@600 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='ctx'> 			reg = &lt;0x600 0x1b&gt;;</div><div class='hunk'>@@ -209,6 +265,14 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		leds: led-controller@700 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x700 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -248,6 +312,19 @@</div><div class='ctx'> 			reg = &lt;0x8000 0x50&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pl081_dma: dma-controller@d000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0xd000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		reboot {</div><div class='ctx'> 			compatible = "syscon-reboot";</div><div class='ctx'> 			regmap = &lt;&amp;timer&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi<br/>index 53703827ee3f..e071cddb28fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63148.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63148.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63148.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm63148.dtsi</a></div><div class='hunk'>@@ -99,6 +99,62 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xfffe8000 0x8000&gt;;</div><div class='ctx'> </div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@100 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x100 0x04&gt;, &lt;0x114 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@104 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x104 0x04&gt;, &lt;0x118 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@108 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x108 0x04&gt;, &lt;0x11c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@10c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x10c 0x04&gt;, &lt;0x120 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@110 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x110 0x04&gt;, &lt;0x124 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@300 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0x300 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@600 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='ctx'> 			reg = &lt;0x600 0x20&gt;;</div><div class='hunk'>@@ -108,6 +164,14 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		leds: led-controller@700 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x700 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm63178.dtsi b/arch/arm/boot/dts/broadcom/bcm63178.dtsi<br/>index 6d8d33498983..430750b3030f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63178.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm63178.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm63178.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm63178.dtsi</a></div><div class='hunk'>@@ -117,6 +117,97 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xff800000 0x800000&gt;;</div><div class='ctx'> </div><div class='add'>+		watchdog@480 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x480 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -143,6 +234,27 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		leds: led-controller@3000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x3000 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@11000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x11000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@12000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x12000 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts b/arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts<br/>new file mode 100644<br/>index 000000000000..a3616fb7b3a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm6846-genexis-xg6846b.dts</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm6846.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Genexis XG6846B Ethernet layer 2/3 router";</div><div class='add'>+	compatible = "genexis,xg6846b", "brcm,bcm6846", "brcm,bcmbca";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Micron D9PTK 256 MB RAM */</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		secondary-boot@0 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x00000000 0x00008000&gt;;</div><div class='add'>+		};</div><div class='add'>+		pmc3-firmware@8000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x00008000 0x00100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		poll-interval = &lt;20000&gt;;</div><div class='add'>+</div><div class='add'>+		/* Called "canyon rescue button" in the vendor DTB */</div><div class='add'>+		button-restart {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 41 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* Totally 79 GPIOs are available */</div><div class='add'>+	ngpios = &lt;15&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;leds {</div><div class='add'>+	status = "okay";</div><div class='add'>+	brcm,serial-shift-bits = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+	led@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "ext";</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "ext";</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = LED_FUNCTION_WAN;</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = LED_FUNCTION_WAN;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = LED_FUNCTION_POWER;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = LED_FUNCTION_POWER;</div><div class='add'>+		color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@15 {</div><div class='add'>+		reg = &lt;15&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = LED_FUNCTION_USB;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@7 {</div><div class='add'>+		/* Activity 03 */</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan1";</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@8 {</div><div class='add'>+		/* Activity 04 */</div><div class='add'>+		reg = &lt;8&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan1";</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@9 {</div><div class='add'>+		/* Activity 03 */</div><div class='add'>+		reg = &lt;9&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan2";</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@10 {</div><div class='add'>+		/* Activity 04 */</div><div class='add'>+		reg = &lt;10&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan2";</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@11 {</div><div class='add'>+		/* Activity 03 */</div><div class='add'>+		reg = &lt;11&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan3";</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@12 {</div><div class='add'>+		/* Activity 04 */</div><div class='add'>+		reg = &lt;12&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan3";</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@13 {</div><div class='add'>+		/* Activity 03 */</div><div class='add'>+		reg = &lt;13&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan4";</div><div class='add'>+		color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@14 {</div><div class='add'>+		/* Activity 04 */</div><div class='add'>+		reg = &lt;14&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+		function = "lan4";</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand_controller {</div><div class='add'>+	brcm,wp-not-connected;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nandcs {</div><div class='add'>+	nand-on-flash-bbt;</div><div class='add'>+	brcm,nand-ecc-use-strap;</div><div class='add'>+</div><div class='add'>+	/* Winbond W29N02GV, 256MB with 128KB erase blocks */</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		loader@0 {</div><div class='add'>+			label = "loader";</div><div class='add'>+			reg = &lt;0x00000000 0x00400000&gt;;</div><div class='add'>+		};</div><div class='add'>+		image@400000 {</div><div class='add'>+			label = "image";</div><div class='add'>+			reg = &lt;0x00400000 0x0fb00000&gt;;</div><div class='add'>+		};</div><div class='add'>+		/* 0x00ff0000-0x00ffffff: bad block list */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+	phy2: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+	phy3: ethernet-phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+	phy4: ethernet-phy@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+	phy21: ethernet-phy@21 {</div><div class='add'>+		reg = &lt;21&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi<br/>index ee361cb00b7c..f5591a45d2e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6846.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6846.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6846.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm6846.dtsi</a></div><div class='hunk'>@@ -99,6 +99,91 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xff800000 0x800000&gt;;</div><div class='ctx'> </div><div class='add'>+		watchdog@480 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x480 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@640 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='ctx'> 			reg = &lt;0x640 0x1b&gt;;</div><div class='hunk'>@@ -108,6 +193,20 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		leds: led-controller@800 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x800 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -133,5 +232,27 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mdio: mdio@2060 {</div><div class='add'>+			compatible = "brcm,bcm6846-mdio";</div><div class='add'>+			reg = &lt;0x02060 0x10&gt;, &lt;0x5a068 0x4&gt;;</div><div class='add'>+			reg-names = "mdio", "mdio_indir_rw";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@59000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x59000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi<br/>index 52915ec6f339..a88c3f0fbcb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6855.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6855.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6855.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm6855.dtsi</a></div><div class='hunk'>@@ -116,6 +116,103 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xff800000 0x800000&gt;;</div><div class='ctx'> </div><div class='add'>+		watchdog@480 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x480 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@4c0 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x4c0 0x10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -143,6 +240,27 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		leds: led-controller@3000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x3000 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@11000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x11000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@12000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x12000 0x1000&gt;;</div><div class='hunk'>@@ -151,5 +269,14 @@</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@13000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x13000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;uart_clk&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi<br/>index 70cf23a65fdb..dd837bf69390 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6878.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm6878.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm6878.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm6878.dtsi</a></div><div class='hunk'>@@ -108,6 +108,111 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0xff800000 0x800000&gt;;</div><div class='ctx'> </div><div class='add'>+		watchdog@480 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x480 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@4c0 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x4c0 0x10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		leds: led-controller@700 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x700 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -134,10 +239,23 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pl081_dma: dma-controller@11000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x11000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@12000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x12000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;uart_clk&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm7445.dtsi b/arch/arm/boot/dts/broadcom/bcm7445.dtsi<br/>index 5ac2042515b8..c6307c7437e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm7445.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm7445.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm7445.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm7445.dtsi</a></div><div class='hunk'>@@ -237,7 +237,8 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x0 0x80000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-b.1.x",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x800&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -259,7 +260,8 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x80000 0x80000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-b.1.x",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x800&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -281,7 +283,8 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x100000 0x80000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-b.1.x",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x800&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm953012hr.dts b/arch/arm/boot/dts/broadcom/bcm953012hr.dts<br/>index b070b69466bd..b728cd54715e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm953012hr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm953012hr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm953012hr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm953012hr.dts</a></div><div class='hunk'>@@ -74,7 +74,6 @@</div><div class='ctx'> &amp;spi_nor {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	spi-max-frequency = &lt;62500000&gt;;</div><div class='del'>-	m25p,default-addr-width = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm953012k.dts b/arch/arm/boot/dts/broadcom/bcm953012k.dts<br/>index f1e6bcaa1edd..27c0992f1855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm953012k.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm953012k.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm953012k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm953012k.dts</a></div><div class='hunk'>@@ -84,7 +84,6 @@</div><div class='ctx'> &amp;spi_nor {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	spi-max-frequency = &lt;62500000&gt;;</div><div class='del'>-	m25p,default-addr-width = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958522er.dts b/arch/arm/boot/dts/broadcom/bcm958522er.dts<br/>index 15f023656df0..2f20f86bd31c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958522er.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958522er.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958522er.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958522er.dts</a></div><div class='hunk'>@@ -135,7 +135,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958525er.dts b/arch/arm/boot/dts/broadcom/bcm958525er.dts<br/>index 9b9c225a1fb3..980c03f74a19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958525er.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958525er.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958525er.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958525er.dts</a></div><div class='hunk'>@@ -135,7 +135,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958525xmc.dts b/arch/arm/boot/dts/broadcom/bcm958525xmc.dts<br/>index ca9311452739..440bb2d617f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958525xmc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958525xmc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958525xmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958525xmc.dts</a></div><div class='hunk'>@@ -151,7 +151,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958622hr.dts b/arch/arm/boot/dts/broadcom/bcm958622hr.dts<br/>index 9db3c851451a..116f3a7c3bc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958622hr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958622hr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958622hr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958622hr.dts</a></div><div class='hunk'>@@ -139,7 +139,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958623hr.dts b/arch/arm/boot/dts/broadcom/bcm958623hr.dts<br/>index 32786e7c4e12..fc6ab73ecf56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958623hr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958623hr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958623hr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958623hr.dts</a></div><div class='hunk'>@@ -143,7 +143,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi<br/>index 71a8b77b46f4..7e71aecb7251 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi</a></div><div class='hunk'>@@ -17,21 +17,21 @@</div><div class='ctx'> 		led-1 {</div><div class='ctx'> 			function = LED_FUNCTION_INDICATOR;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm 1 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm 1 50000 0&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-2 {</div><div class='ctx'> 			function = LED_FUNCTION_POWER;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm 2 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm 2 50000 0&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-3 {</div><div class='ctx'> 			function = LED_FUNCTION_INDICATOR;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm 3 50000&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm 3 50000 0&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -132,7 +132,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	#pwm-cells = &lt;2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958625hr.dts b/arch/arm/boot/dts/broadcom/bcm958625hr.dts<br/>index 74263d98de73..a9b6aa04d573 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625hr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625hr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625hr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958625hr.dts</a></div><div class='hunk'>@@ -150,7 +150,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm958625k.dts b/arch/arm/boot/dts/broadcom/bcm958625k.dts<br/>index 69ebc7a913a7..7996116fc923 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625k.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm958625k.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm958625k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm958625k.dts</a></div><div class='hunk'>@@ -154,7 +154,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/broadcom/bcm988312hr.dts b/arch/arm/boot/dts/broadcom/bcm988312hr.dts<br/>index e96bc3f2d5cf..663a3f27b6e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm988312hr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/broadcom/bcm988312hr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/broadcom/bcm988312hr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/broadcom/bcm988312hr.dts</a></div><div class='hunk'>@@ -139,7 +139,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts b/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts<br/>index 808cd5778e27..0b15ccaa762e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/cirrus/ep7211-edb7211.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/cirrus/ep7211-edb7211.dts</a></div><div class='hunk'>@@ -46,8 +46,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c: i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;portd 4 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-			&lt;&amp;portd 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;portd 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;portd 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='ctx'> 		i2c-gpio,scl-output-only;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;portd {</div><div class='del'>-	lcden {</div><div class='add'>+	lcden-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/Makefile b/arch/arm/boot/dts/intel/ixp/Makefile<br/>index ab8525f1ea1d..cb30d8d55016 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/Makefile</a></div><div class='hunk'>@@ -1,5 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_IXP4XX) += \</div><div class='add'>+	intel-ixp42x-actiontec-mi424wr-ac.dtb \</div><div class='add'>+	intel-ixp42x-actiontec-mi424wr-d.dtb \</div><div class='ctx'> 	intel-ixp42x-linksys-nslu2.dtb \</div><div class='ctx'> 	intel-ixp42x-linksys-wrv54g.dtb \</div><div class='ctx'> 	intel-ixp42x-freecom-fsg-3.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts<br/>new file mode 100644<br/>index 000000000000..413b9255f9e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: ISC</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for the IXP425-based Actiontec MI424WR revision A and C</div><div class='add'>+ * Based on a board file from OpenWrt by Jose Vasconcellos.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "intel-ixp42x-actiontec-mi424wr.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Actiontec MI424WR rev A/C";</div><div class='add'>+	compatible = "actiontec,mi424wr-ac", "intel,ixp42x";</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		/* EthB used for WAN */</div><div class='add'>+		ethernet@c8009000 {</div><div class='add'>+			phy-handle = &lt;&amp;phy17&gt;; // 17 on revision A-C</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				phy17: ethernet-phy@17 {</div><div class='add'>+					/* WAN */</div><div class='add'>+					reg = &lt;17&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* EthC used for LAN */</div><div class='add'>+		ethernet@c800a000 {</div><div class='add'>+			/* Fixed link to the CPU MII port on the KS8995 */</div><div class='add'>+			fixed-link {</div><div class='add'>+				speed = &lt;100&gt;;</div><div class='add'>+				full-duplex;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts<br/>new file mode 100644<br/>index 000000000000..3619c6411a5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+// SPDX-License-Identifier: ISC</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for the IXP425-based Actiontec MI424WR revision D</div><div class='add'>+ * Based on a board file from OpenWrt by Jose Vasconcellos.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "intel-ixp42x-actiontec-mi424wr.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Actiontec MI424WR rev D";</div><div class='add'>+	compatible = "actiontec,mi424wr-d", "intel,ixp42x";</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		/* EthB used for LAN */</div><div class='add'>+		ethernet@c8009000 {</div><div class='add'>+			/* Fixed link to the CPU MII port on the KS8995 */</div><div class='add'>+			fixed-link {</div><div class='add'>+				speed = &lt;100&gt;;</div><div class='add'>+				full-duplex;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				/* PHY ID 0x00221450 */</div><div class='add'>+				phy5: ethernet-phy@5 {</div><div class='add'>+					/* WAN */</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* EthC used for WAN */</div><div class='add'>+		ethernet@c800a000 {</div><div class='add'>+			phy-handle = &lt;&amp;phy5&gt;; // 5 on revision D</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi<br/>new file mode 100644<br/>index 000000000000..76fd97c5beb6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,272 @@</div><div class='add'>+// SPDX-License-Identifier: ISC</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for the IXP425-based Actiontec MI424WR</div><div class='add'>+ * Based on a board file from OpenWrt by Jose Vasconcellos.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "intel-ixp42x.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x02000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200n8";</div><div class='add'>+		stdout-path = "uart1:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-wan-coax {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "wan-coax";</div><div class='add'>+			gpios = &lt;&amp;gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-power-alarm {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_ALARM;</div><div class='add'>+			gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-power {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+		led-wireless {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_WLAN;</div><div class='add'>+			gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-internet-down {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = "internet-down";</div><div class='add'>+			gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-internet-up {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "internet-up";</div><div class='add'>+			gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-lan-coax {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "lan-coax";</div><div class='add'>+			gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-wan-ethernet-alarm {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = "wan-ethernet-alarm";</div><div class='add'>+			gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		/* The last three LEDs are not mounted but traces exist on the PCB */</div><div class='add'>+		led-phone-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "phone-1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-phone-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "phone-2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		led-voip {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = "voip";</div><div class='add'>+			gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			wakeup-source;</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			label = "reset";</div><div class='add'>+			gpios = &lt;&amp;gpio0 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi {</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sck-gpios = &lt;&amp;gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio0 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		miso-gpios = &lt;&amp;gpio0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		cs-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		num-chipselects = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ethernet-switch@0 {</div><div class='add'>+			compatible = "micrel,ks8995";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			ethernet-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				ethernet-port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "lan1";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					label = "lan2";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy2&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					label = "lan3";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy3&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					label = "lan4";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy4&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					ethernet = &lt;&amp;ethc&gt;;</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					fixed-link {</div><div class='add'>+						speed = &lt;100&gt;;</div><div class='add'>+						full-duplex;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		bus@c4000000 {</div><div class='add'>+			flash@0,0 {</div><div class='add'>+				compatible = "intel,ixp4xx-flash", "cfi-flash";</div><div class='add'>+				bank-width = &lt;2&gt;;</div><div class='add'>+				/*</div><div class='add'>+				 * 8 MB of Flash in 64 0x20000 sized blocks</div><div class='add'>+				 * mapped in at CS0.</div><div class='add'>+				 */</div><div class='add'>+				reg = &lt;0 0x00000000 0x0800000&gt;;</div><div class='add'>+</div><div class='add'>+				/* Configure expansion bus to allow writes */</div><div class='add'>+				intel,ixp4xx-eb-write-enable = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				partitions {</div><div class='add'>+					compatible = "redboot-fis";</div><div class='add'>+					fis-index-block = &lt;0x3f&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			gpio1: gpio@1,0 {</div><div class='add'>+				/* MMIO GPIO at CS1 */</div><div class='add'>+				compatible = "intel,ixp4xx-expansion-bus-mmio-gpio";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				big-endian;</div><div class='add'>+				reg = &lt;1 0x00000000 0x2&gt;;</div><div class='add'>+				reg-names = "dat";</div><div class='add'>+				/* Expansion bus settings */</div><div class='add'>+				intel,ixp4xx-eb-write-enable = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				pci-reset-hog {</div><div class='add'>+					gpio-hog;</div><div class='add'>+					gpios = &lt;7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					output-high;</div><div class='add'>+					line-name = "PCI reset";</div><div class='add'>+				};</div><div class='add'>+				pstn-relay-hog-1 {</div><div class='add'>+					gpio-hog;</div><div class='add'>+					gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					output-low;</div><div class='add'>+					line-name = "PSTN relay control 1";</div><div class='add'>+				};</div><div class='add'>+				pstn-relay-hog-2 {</div><div class='add'>+					gpio-hog;</div><div class='add'>+					gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					output-low;</div><div class='add'>+					line-name = "PSTN relay control 2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pci@c0000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0xf800 0 0 7&gt;;</div><div class='add'>+			interrupt-map =</div><div class='add'>+			/* IDSEL 13 */</div><div class='add'>+			&lt;0x6800 0 0 1 &amp;gpio0 8 IRQ_TYPE_LEVEL_LOW&gt;, /* INT A on slot 13 is irq 8 */</div><div class='add'>+			&lt;0x6800 0 0 2 &amp;gpio0 6 IRQ_TYPE_LEVEL_LOW&gt;, /* INT B on slot 13 is irq 6 */</div><div class='add'>+			/* IDSEL 14 */</div><div class='add'>+			&lt;0x7000 0 0 1 &amp;gpio0 8 IRQ_TYPE_LEVEL_LOW&gt;, /* INT A on slot 14 is irq 7 */</div><div class='add'>+			&lt;0x7000 0 0 2 &amp;gpio0 6 IRQ_TYPE_LEVEL_LOW&gt;, /* INT B on slot 14 is irq 8 */</div><div class='add'>+			/* IDSEL 15 */</div><div class='add'>+			&lt;0x7800 0 0 1 &amp;gpio0 8 IRQ_TYPE_LEVEL_LOW&gt;, /* INT A on slot 15 is irq 6 */</div><div class='add'>+			&lt;0x7800 0 0 2 &amp;gpio0 6 IRQ_TYPE_LEVEL_LOW&gt;; /* INT B on slot 15 is irq 7 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethb: ethernet@c8009000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			queue-rx = &lt;&amp;qmgr 3&gt;;</div><div class='add'>+			queue-txready = &lt;&amp;qmgr 20&gt;;</div><div class='add'>+			phy-mode = "mii";</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				/* 1, 2, 3 and 4 are ports on the KS8995 switch */</div><div class='add'>+				phy1: ethernet-phy@1 {</div><div class='add'>+					/* LAN1 */</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+				phy2: ethernet-phy@2 {</div><div class='add'>+					/* LAN2 */</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				phy3: ethernet-phy@3 {</div><div class='add'>+					/* LAN3 */</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+				phy4: ethernet-phy@4 {</div><div class='add'>+					/* LAN4 */</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethc: ethernet@c800a000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			queue-rx = &lt;&amp;qmgr 4&gt;;</div><div class='add'>+			queue-txready = &lt;&amp;qmgr 21&gt;;</div><div class='add'>+			phy-mode = "mii";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts<br/>index 98275a363c57..cb1842c83ac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-wrv54g.dts</a></div><div class='hunk'>@@ -72,10 +72,55 @@</div><div class='ctx'> 		cs-gpios = &lt;&amp;gpio0 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		num-chipselects = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		switch@0 {</div><div class='add'>+		ethernet-switch@0 {</div><div class='ctx'> 			compatible = "micrel,ks8995";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * The PHYs are accessed over the external MDIO</div><div class='add'>+			 * bus and not internally through the switch control</div><div class='add'>+			 * registers.</div><div class='add'>+			 */</div><div class='add'>+			ethernet-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				ethernet-port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "1";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					label = "2";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy2&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					label = "3";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy3&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					label = "4";</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					phy-handle = &lt;&amp;phy4&gt;;</div><div class='add'>+				};</div><div class='add'>+				ethernet-port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					ethernet = &lt;&amp;ethb&gt;;</div><div class='add'>+					phy-mode = "mii";</div><div class='add'>+					fixed-link {</div><div class='add'>+						speed = &lt;100&gt;;</div><div class='add'>+						full-duplex;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -135,40 +180,59 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * EthB - connected to the KS8995 switch ports 1-4</div><div class='del'>-		 * FIXME: the boardfile defines .phy_mask = 0x1e for this port to enable output to</div><div class='del'>-		 * all four switch ports, also using an out of tree multiphy patch.</div><div class='del'>-		 * Do we need a new binding and property for this?</div><div class='add'>+		 * EthB connects to the KS8995 CPU port and faces ports 1-4</div><div class='add'>+		 * through the switch fabric.</div><div class='add'>+		 *</div><div class='add'>+		 * To complicate things, the MDIO channel is also only</div><div class='add'>+		 * accessible through EthB, but used independently for PHY</div><div class='add'>+		 * control.</div><div class='ctx'> 		 */</div><div class='del'>-		ethernet@c8009000 {</div><div class='add'>+		ethb: ethernet@c8009000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			queue-rx = &lt;&amp;qmgr 3&gt;;</div><div class='ctx'> 			queue-txready = &lt;&amp;qmgr 20&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			phy-handle = &lt;&amp;phy4&gt;;</div><div class='add'>+			phy-mode = "mii";</div><div class='add'>+			fixed-link {</div><div class='add'>+				speed = &lt;100&gt;;</div><div class='add'>+				full-duplex;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='ctx'> 			mdio {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-				/* Should be ports 1-4 on the KS8995 switch */</div><div class='add'>+				/*</div><div class='add'>+				 * LAN ports 1-4 on the KS8995 switch</div><div class='add'>+				 * and PHY5 for WAN need to be accessed</div><div class='add'>+				 * through this external MDIO channel.</div><div class='add'>+				 */</div><div class='add'>+				phy1: ethernet-phy@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+				phy2: ethernet-phy@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				phy3: ethernet-phy@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='ctx'> 				phy4: ethernet-phy@4 {</div><div class='ctx'> 					reg = &lt;4&gt;;</div><div class='ctx'> 				};</div><div class='del'>-</div><div class='del'>-				/* Should be port 5 on the KS8995 switch */</div><div class='ctx'> 				phy5: ethernet-phy@5 {</div><div class='ctx'> 					reg = &lt;5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		/* EthC - connected to KS8995 switch port 5 */</div><div class='del'>-		ethernet@c800a000 {</div><div class='add'>+		/*</div><div class='add'>+		 * EthC connects to MII-P5 on the KS8995 bypassing</div><div class='add'>+		 * all of the switch logic and facing PHY5</div><div class='add'>+		 */</div><div class='add'>+		ethc: ethernet@c800a000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			queue-rx = &lt;&amp;qmgr 4&gt;;</div><div class='ctx'> 			queue-txready = &lt;&amp;qmgr 21&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='add'>+			phy-mode = "mii";</div><div class='ctx'> 			phy-handle = &lt;&amp;phy5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts<br/>index 19d56e9aec9d..a351a97d257e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "intel-ixp42x.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Netgear WG302 v1";</div><div class='hunk'>@@ -32,6 +33,35 @@</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		test_led: led-test {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = "test";</div><div class='add'>+			gpios = &lt;&amp;gpio0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+		wlan_led: led-wlan {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_WLAN;</div><div class='add'>+			gpios = &lt;&amp;gpio0 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			linux,default-trigger = "phy0tx";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		/* RESET is on GPIO13 which can't fire interrupts */</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			label = "reset";</div><div class='add'>+			gpios = &lt;&amp;gpio0 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		bus@c4000000 {</div><div class='ctx'> 			flash@0,0 {</div><div class='hunk'>@@ -57,7 +87,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c)</div><div class='add'>+			 * Taken from WG302 v1 PCI boardfile (wg302v1-pci.c)</div><div class='ctx'> 			 * We have slots (IDSEL) 1 and 2 with one assigned IRQ</div><div class='ctx'> 			 * each handling all IRQs.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -70,10 +100,10 @@</div><div class='ctx'> 			&lt;0x0800 0 0 3 &amp;gpio0 8 IRQ_TYPE_LEVEL_LOW&gt;, /* INT C on slot 1 is irq 8 */</div><div class='ctx'> 			&lt;0x0800 0 0 4 &amp;gpio0 8 IRQ_TYPE_LEVEL_LOW&gt;, /* INT D on slot 1 is irq 8 */</div><div class='ctx'> 			/* IDSEL 2 */</div><div class='del'>-			&lt;0x1000 0 0 1 &amp;gpio0 9 IRQ_TYPE_LEVEL_LOW&gt;, /* INT A on slot 2 is irq 9 */</div><div class='del'>-			&lt;0x1000 0 0 2 &amp;gpio0 9 IRQ_TYPE_LEVEL_LOW&gt;, /* INT B on slot 2 is irq 9 */</div><div class='del'>-			&lt;0x1000 0 0 3 &amp;gpio0 9 IRQ_TYPE_LEVEL_LOW&gt;, /* INT C on slot 2 is irq 9 */</div><div class='del'>-			&lt;0x1000 0 0 4 &amp;gpio0 9 IRQ_TYPE_LEVEL_LOW&gt;; /* INT D on slot 2 is irq 9 */</div><div class='add'>+			&lt;0x1000 0 0 1 &amp;gpio0 10 IRQ_TYPE_LEVEL_LOW&gt;, /* INT A on slot 2 is irq 10 */</div><div class='add'>+			&lt;0x1000 0 0 2 &amp;gpio0 10 IRQ_TYPE_LEVEL_LOW&gt;, /* INT B on slot 2 is irq 10 */</div><div class='add'>+			&lt;0x1000 0 0 3 &amp;gpio0 10 IRQ_TYPE_LEVEL_LOW&gt;, /* INT C on slot 2 is irq 10 */</div><div class='add'>+			&lt;0x1000 0 0 4 &amp;gpio0 10 IRQ_TYPE_LEVEL_LOW&gt;; /* INT D on slot 2 is irq 10 */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ethernet@c8009000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi<br/>index 51a716c59669..0adeccabd4fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi</a></div><div class='hunk'>@@ -193,10 +193,10 @@</div><div class='ctx'> 			compatible = "intel,ixp4xx-ethernet";</div><div class='ctx'> 			reg = &lt;0xc800c000 0x1000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-			intel,npe = &lt;0&gt;;</div><div class='ctx'> 			/* Dummy values that depend on firmware */</div><div class='ctx'> 			queue-rx = &lt;&amp;qmgr 0&gt;;</div><div class='ctx'> 			queue-txready = &lt;&amp;qmgr 0&gt;;</div><div class='add'>+			intel,npe-handle = &lt;&amp;npe 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile<br/>index c467828aeb4b..7f69a0355ea5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \</div><div class='ctx'> 	socfpga_cyclone5_mcvevk.dtb \</div><div class='ctx'> 	socfpga_cyclone5_socdk.dtb \</div><div class='ctx'> 	socfpga_cyclone5_de0_nano_soc.dtb \</div><div class='add'>+	socfpga_cyclone5_de10nano.dtb \</div><div class='ctx'> 	socfpga_cyclone5_sockit.dtb \</div><div class='ctx'> 	socfpga_cyclone5_socrates.dtb \</div><div class='ctx'> 	socfpga_cyclone5_sodia.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi<br/>index 6b6e77596ffa..b108265e9bde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi</a></div><div class='hunk'>@@ -440,7 +440,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;peri_emac_ptp_clk&gt;;</div><div class='ctx'> 			clock-names = "stmmaceth", "ptp_ref";</div><div class='ctx'> 			resets = &lt;&amp;rst EMAC0_RESET&gt;, &lt;&amp;rst EMAC0_OCP_RESET&gt;;</div><div class='del'>-			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			reset-names = "stmmaceth", "stmmaceth-ocp";</div><div class='ctx'> 			snps,axi-config = &lt;&amp;socfpga_axi_setup&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -460,7 +460,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;peri_emac_ptp_clk&gt;;</div><div class='ctx'> 			clock-names = "stmmaceth", "ptp_ref";</div><div class='ctx'> 			resets = &lt;&amp;rst EMAC1_RESET&gt;, &lt;&amp;rst EMAC1_OCP_RESET&gt;;</div><div class='del'>-			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			reset-names = "stmmaceth", "stmmaceth-ocp";</div><div class='ctx'> 			snps,axi-config = &lt;&amp;socfpga_axi_setup&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -480,7 +480,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;l4_mp_clk&gt;, &lt;&amp;peri_emac_ptp_clk&gt;;</div><div class='ctx'> 			clock-names = "stmmaceth", "ptp_ref";</div><div class='ctx'> 			resets = &lt;&amp;rst EMAC2_RESET&gt;, &lt;&amp;rst EMAC2_OCP_RESET&gt;;</div><div class='del'>-			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			reset-names = "stmmaceth", "stmmaceth-ocp";</div><div class='ctx'> 			snps,axi-config = &lt;&amp;socfpga_axi_setup&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts<br/>new file mode 100644<br/>index 000000000000..ec25106caacf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10nano.dts</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2017, Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * based on socfpga_cyclone5_de0_nano_soc.dts</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "socfpga_cyclone5.dtsi"</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Terasic DE10-Nano";</div><div class='add'>+	compatible = "terasic,de10-nano", "altr,socfpga-cyclone5", "altr,socfpga";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		/* 1 GiB */</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		fpga: bus@ff200000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0xff200000 0x00200000&gt;;</div><div class='add'>+			ranges = &lt;0x00000000 0xff200000 0x00200000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Here the devices will appear if an FPGA image is</div><div class='add'>+			 * loaded. Their description is expected to be added</div><div class='add'>+			 * using a device tree overlay that matches the image.</div><div class='add'>+			 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	/* Uses a KSZ9031RNX phy */</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	rxd0-skew-ps = &lt;420&gt;;</div><div class='add'>+	rxd1-skew-ps = &lt;420&gt;;</div><div class='add'>+	rxd2-skew-ps = &lt;420&gt;;</div><div class='add'>+	rxd3-skew-ps = &lt;420&gt;;</div><div class='add'>+	txen-skew-ps = &lt;0&gt;;</div><div class='add'>+	rxdv-skew-ps = &lt;420&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	accelerometer@53 {</div><div class='add'>+		compatible = "adi,adxl345";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		/* HPS_GSENSOR_INT is routed to UART0_RX/CAN0_RX/SPIM0_SS1/HPS_GPIO61 */</div><div class='add'>+		interrupt-parent = &lt;&amp;portc&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "INT1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	/* micro SD card socket J11 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	/*</div><div class='add'>+	 * Accessible via USB (FT232R) on Mini-USB plug J4</div><div class='add'>+	 * RX = TRACE_D0/SPIS0_CLK/UART0_RX/HPS_GPIO49</div><div class='add'>+	 * TX = TRACE_D1/SPIS0_MOSI/UART0_TX/HPS_GPIO50</div><div class='add'>+	 * no handshaking lines</div><div class='add'>+	 */</div><div class='add'>+	clock-frequency = &lt;100000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts<br/>index ceaec29770c6..c1e1264bcb09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts</a></div><div class='hunk'>@@ -50,8 +50,6 @@</div><div class='ctx'> </div><div class='ctx'> 	stmpe1: stmpe811@41 {</div><div class='ctx'> 		compatible = "st,stmpe811";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x41&gt;;</div><div class='ctx'> 		id = &lt;0&gt;;</div><div class='ctx'> 		blocks = &lt;0x5&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts<br/>index d37a982e8571..97622febc44e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts</a></div><div class='hunk'>@@ -151,12 +151,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-</div><div class='del'>-	spidev@0 {</div><div class='del'>-		compatible = "rohm,dh2228fv";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts<br/>index ce0d6514eeb5..e4794ccb8e41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts</a></div><div class='hunk'>@@ -66,8 +66,10 @@</div><div class='ctx'> 	mdio0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		phy0: ethernet-phy@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='ctx'> 			rxd0-skew-ps = &lt;0&gt;;</div><div class='ctx'> 			rxd1-skew-ps = &lt;0&gt;;</div><div class='ctx'> 			rxd2-skew-ps = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts<br/>index 84f39dec3c42..170c1ae441a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts</a></div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c01";</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/armada-370-db.dts b/arch/arm/boot/dts/marvell/armada-370-db.dts<br/>index a7dc4c04d10b..a9a05d826f22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-370-db.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-370-db.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-370-db.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/armada-370-db.dts</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 			"Out Jack", "HPL",</div><div class='ctx'> 			"Out Jack", "HPR",</div><div class='ctx'> 			"AIN1L", "In Jack",</div><div class='del'>-			"AIN1L", "In Jack";</div><div class='add'>+			"AIN1R", "In Jack";</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,dai-link@0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi<br/>index 8208c6a9627a..7aa71a9aa1bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi</a></div><div class='hunk'>@@ -453,7 +453,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;cf_gtr_fan_pwm &amp;cf_gtr_wifi_disable_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-	wifi-disable {</div><div class='add'>+	wifi-disable-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;30 GPIO_ACTIVE_LOW&gt;, &lt;31 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='hunk'>@@ -465,7 +465,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;cf_gtr_isolation_pins &amp;cf_gtr_poe_reset_pins &amp;cf_gtr_lte_disable_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-	lte-disable {</div><div class='add'>+	lte-disable-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='hunk'>@@ -476,14 +476,14 @@</div><div class='ctx'> 	 * This signal, when asserted, isolates Armada 38x sample at reset pins</div><div class='ctx'> 	 * from control of external devices. Should be de-asserted after reset.</div><div class='ctx'> 	 */</div><div class='del'>-	sar-isolation {</div><div class='add'>+	sar-isolation-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 		line-name = "sar-isolation";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	poe-reset {</div><div class='add'>+	poe-reset-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts<br/>index 43202890c959..83fe00abd652 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts</a></div><div class='hunk'>@@ -251,6 +251,7 @@</div><div class='ctx'> 			led-controller@2b {</div><div class='ctx'> 				compatible = "cznic,turris-omnia-leds";</div><div class='ctx'> 				reg = &lt;0x2b&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;mcu 11 IRQ_TYPE_NONE&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts<br/>index f7daa3bc707e..cf32ba9b4e8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/armada-388-clearfog-base.dts</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio0 {</div><div class='del'>-	phy1_reset {</div><div class='add'>+	phy1-reset-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-db.dtsi b/arch/arm/boot/dts/marvell/kirkwood-db.dtsi<br/>index 6fe2e31534af..8bacaeb4f4bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-db.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-db.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-db.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-db.dtsi</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@50000 {</div><div class='add'>+		usb@50000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts<br/>index 2f6793f794cd..36394d1ab3e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-dir665.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-dir665.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-dir665.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-dir665.dts</a></div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@50000 {</div><div class='add'>+		usb@50000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi<br/>index 52baffe45f12..259cb3d5f16d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-km_common.dtsi</a></div><div class='hunk'>@@ -27,8 +27,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt; &amp;gpio0 8 GPIO_ACTIVE_HIGH		/* sda */</div><div class='del'>-			  &amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;		/* scl */</div><div class='add'>+		sda-gpios = &lt;&amp;gpio0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts<br/>index e3b41784c876..051579fc36b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts</a></div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@50000 {</div><div class='add'>+		usb@50000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts<br/>index 9c438f10f737..2bc4b68bd723 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> 		i2c@11100 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> </div><div class='del'>-			s24c02: s24c02@50 {</div><div class='add'>+			s24c02: eeprom@50 {</div><div class='ctx'> 				compatible = "atmel,24c02";</div><div class='ctx'> 				reg = &lt;0x50&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts b/arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts<br/>index d4e0b8150a84..cf26e2ceaaa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,cpu {</div><div class='del'>-			sound-dai = &lt;&amp;audio0 0&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;audio0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,codec {</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi b/arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi<br/>index 47f03c69c55a..9d7cff4feada 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood-openrd.dtsi</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> 			cd-gpios = &lt;&amp;gpio0 29 9&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		gpio@10100 {</div><div class='del'>-			p28 {</div><div class='add'>+			p28-hog {</div><div class='ctx'> 				gpio-hog;</div><div class='ctx'> 				gpios = &lt;28 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				/*</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 		gpio@10140 {</div><div class='del'>-			p2 {</div><div class='add'>+			p2-hog {</div><div class='ctx'> 				gpio-hog;</div><div class='ctx'> 				gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				/*</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/kirkwood.dtsi b/arch/arm/boot/dts/marvell/kirkwood.dtsi<br/>index 815ef7719d13..8a1338e672b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/kirkwood.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/kirkwood.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/kirkwood.dtsi</a></div><div class='hunk'>@@ -263,7 +263,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ehci@50000 {</div><div class='add'>+		usb0: usb@50000 {</div><div class='ctx'> 			compatible = "marvell,orion-ehci";</div><div class='ctx'> 			reg = &lt;0x50000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;19&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts b/arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts<br/>index 55ea87870af3..86c425b72fa7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/mmp2-olpc-xo-1-75.dts</a></div><div class='hunk'>@@ -113,8 +113,8 @@</div><div class='ctx'> 			  "Headphones", "HPOR",</div><div class='ctx'> 			  "MIC2", "Mic Jack";</div><div class='ctx'> 		widgets = "Headphone", "Headphones", "Microphone", "Mic Jack";</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio 97 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		mic-det-gpio = &lt;&amp;gpio 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio 97 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mic-det-gpios = &lt;&amp;gpio 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='head'>diff --git a/arch/arm/boot/dts/marvell/orion5x.dtsi b/arch/arm/boot/dts/marvell/orion5x.dtsi<br/>index 2d41f5c166ee..939259c57e05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/orion5x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/marvell/orion5x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/marvell/orion5x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/marvell/orion5x.dtsi</a></div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ehci0: ehci@50000 {</div><div class='add'>+			ehci0: usb@50000 {</div><div class='ctx'> 				compatible = "marvell,orion-ehci";</div><div class='ctx'> 				reg = &lt;0x50000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;17&gt;;</div><div class='hunk'>@@ -218,7 +218,7 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ehci1: ehci@a0000 {</div><div class='add'>+			ehci1: usb@a0000 {</div><div class='ctx'> 				compatible = "marvell,orion-ehci";</div><div class='ctx'> 				reg = &lt;0xa0000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/Makefile b/arch/arm/boot/dts/mediatek/Makefile<br/>index 1957947cb41c..e48de3efeb3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/Makefile</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += \</div><div class='ctx'> 	mt2701-evb.dtb \</div><div class='add'>+	mt6572-jty-d101.dtb \</div><div class='add'>+	mt6572-lenovo-a369i.dtb \</div><div class='ctx'> 	mt6580-evbp1.dtb \</div><div class='ctx'> 	mt6582-prestigio-pmt5008-3g.dtb \</div><div class='ctx'> 	mt6589-aquaris5.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/mt2701-evb.dts b/arch/arm/boot/dts/mediatek/mt2701-evb.dts<br/>index 4c76366aa938..e97dc37f716c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt2701-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt2701-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt2701-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/mt2701-evb.dts</a></div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> </div><div class='ctx'> 	bt_sco_codec:bt_sco_codec {</div><div class='ctx'> 		compatible = "linux,bt-sco";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd: backlight_lcd {</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts b/arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts<br/>new file mode 100644<br/>index 000000000000..18c3cab6b7a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/mt6572-jty-d101.dts</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Max Shevchenko &lt;wctrl@proton.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt6572.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "JTY D101";</div><div class='add'>+	compatible = "jty,d101", "mediatek,mt6572";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		stdout-path = "serial0:921600n8";</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer@bf400000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			memory-region = &lt;&amp;framebuffer_reserved&gt;;</div><div class='add'>+			width = &lt;1024&gt;;</div><div class='add'>+			height = &lt;600&gt;;</div><div class='add'>+			stride = &lt;(1024 * 2)&gt;;</div><div class='add'>+			format = "r5g6b5";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		connsys@80000000 {</div><div class='add'>+			reg = &lt;0x80000000 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		modem@be000000 {</div><div class='add'>+			reg = &lt;0xbe000000 0x1400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer_reserved: framebuffer@bf400000 {</div><div class='add'>+			reg = &lt;0xbf400000 0xc00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts b/arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts<br/>new file mode 100644<br/>index 000000000000..c2f0c60ea777<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/mt6572-lenovo-a369i.dts</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Max Shevchenko &lt;wctrl@proton.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt6572.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Lenovo A369i";</div><div class='add'>+	compatible = "lenovo,a369i", "mediatek,mt6572";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		stdout-path = "serial0:921600n8";</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer@9fa00000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			memory-region = &lt;&amp;framebuffer_reserved&gt;;</div><div class='add'>+			width = &lt;480&gt;;</div><div class='add'>+			height = &lt;800&gt;;</div><div class='add'>+			stride = &lt;(480 * 2)&gt;;</div><div class='add'>+			format = "r5g6b5";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		connsys@80000000 {</div><div class='add'>+			reg = &lt;0x80000000 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer_reserved: framebuffer@9fa00000 {</div><div class='add'>+			reg = &lt;0x9fa00000 0x600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/mt6572.dtsi b/arch/arm/boot/dts/mediatek/mt6572.dtsi<br/>new file mode 100644<br/>index 000000000000..ac70f266d698<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt6572.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/mt6572.dtsi</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Max Shevchenko &lt;wctrl@proton.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;sysirq&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		enable-method = "mediatek,mt6589-smp";</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart_clk: dummy26m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	system_clk: dummy13m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;13000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc_clk: dummy32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		watchdog: watchdog@10007000 {</div><div class='add'>+			compatible = "mediatek,mt6572-wdt", "mediatek,mt6589-wdt";</div><div class='add'>+			reg = &lt;0x10007000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			timeout-sec = &lt;15&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer: timer@10008000 {</div><div class='add'>+			compatible = "mediatek,mt6572-timer", "mediatek,mt6577-timer";</div><div class='add'>+			reg = &lt;0x10008000 0x80&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clocks = &lt;&amp;system_clk&gt;, &lt;&amp;rtc_clk&gt;;</div><div class='add'>+			clock-names = "system-clk", "rtc-clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sysirq: interrupt-controller@10200100 {</div><div class='add'>+			compatible = "mediatek,mt6572-sysirq", "mediatek,mt6577-sysirq";</div><div class='add'>+			reg = &lt;0x10200100 0x1c&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10211000 {</div><div class='add'>+			compatible = "arm,cortex-a7-gic";</div><div class='add'>+			reg = &lt;0x10211000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10212000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10214000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10216000 0x2000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@11005000 {</div><div class='add'>+			compatible = "mediatek,mt6572-uart", "mediatek,mt6577-uart";</div><div class='add'>+			reg = &lt;0x11005000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			clock-names = "baud";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@11006000 {</div><div class='add'>+			compatible = "mediatek,mt6572-uart", "mediatek,mt6577-uart";</div><div class='add'>+			reg = &lt;0x11006000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;;</div><div class='add'>+			clock-names = "baud";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mediatek/mt7623.dtsi b/arch/arm/boot/dts/mediatek/mt7623.dtsi<br/>index 814586abc297..fd7a89cc337d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt7623.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/mediatek/mt7623.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/mediatek/mt7623.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/mediatek/mt7623.dtsi</a></div><div class='hunk'>@@ -308,7 +308,7 @@</div><div class='ctx'> 		clock-names = "spi", "wrap";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cir: cir@10013000 {</div><div class='add'>+	cir: ir-receiver@10013000 {</div><div class='ctx'> 		compatible = "mediatek,mt7623-cir";</div><div class='ctx'> 		reg = &lt;0 0x10013000 0 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile<br/>index 0c45c8d17468..79cd38fdc7da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/Makefile</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> # Enables support for device-tree overlays</div><div class='ctx'> DTC_FLAGS_at91-sam9x60_curiosity := -@</div><div class='ctx'> DTC_FLAGS_at91-sam9x60ek := -@</div><div class='add'>+DTC_FLAGS_at91-sam9x75_curiosity := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d27_som1_ek := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d29_curiosity := -@</div><div class='hunk'>@@ -11,6 +12,7 @@ DTC_FLAGS_at91-sama5d2_xplained := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d3_eds := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d3_xplained := -@</div><div class='ctx'> DTC_FLAGS_at91-sama5d4_xplained := -@</div><div class='add'>+DTC_FLAGS_at91-sama7d65_curiosity := -@</div><div class='ctx'> DTC_FLAGS_at91-sama7g54_curiosity := -@</div><div class='ctx'> DTC_FLAGS_at91-sama7g5ek := -@</div><div class='ctx'> dtb-$(CONFIG_SOC_AT91RM9200) += \</div><div class='hunk'>@@ -60,6 +62,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \</div><div class='ctx'> dtb-$(CONFIG_SOC_SAM9X60) += \</div><div class='ctx'> 	at91-sam9x60_curiosity.dtb \</div><div class='ctx'> 	at91-sam9x60ek.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_SAM9X7) += \</div><div class='add'>+	at91-sam9x75_curiosity.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_SAM_V7) += \</div><div class='ctx'> 	at91-kizbox2-2.dtb \</div><div class='ctx'> 	at91-kizbox3-hs.dtb \</div><div class='hunk'>@@ -87,6 +91,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \</div><div class='ctx'> 	at91-sama5d4_xplained.dtb \</div><div class='ctx'> 	at91-sama5d4ek.dtb \</div><div class='ctx'> 	at91-vinco.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_SAMA7D65) += \</div><div class='add'>+	at91-sama7d65_curiosity.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_SAMA7G5) += \</div><div class='ctx'> 	at91-sama7g54_curiosity.dtb \</div><div class='ctx'> 	at91-sama7g5ek.dtb</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/aks-cdu.dts b/arch/arm/boot/dts/microchip/aks-cdu.dts<br/>index 742fcf525e1b..302cb872efa1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/aks-cdu.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/aks-cdu.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/aks-cdu.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/aks-cdu.dts</a></div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -98,23 +98,27 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		red {</div><div class='add'>+		led-red {</div><div class='add'>+			label = "red";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='add'>+		led-green {</div><div class='add'>+			label = "green";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		yellow {</div><div class='add'>+		led-yellow {</div><div class='add'>+			label = "yellow";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 20 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		blue {</div><div class='add'>+		led-blue {</div><div class='add'>+			label = "blue";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 21 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/animeo_ip.dts b/arch/arm/boot/dts/microchip/animeo_ip.dts<br/>index 29936bfbeeb7..c11f4f7dac94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/animeo_ip.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/animeo_ip.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/animeo_ip.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/animeo_ip.dts</a></div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;&amp;pioB 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='hunk'>@@ -146,23 +146,23 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		power_green {</div><div class='add'>+		led-power-green {</div><div class='ctx'> 			label = "power_green";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		power_red {</div><div class='add'>+		led-power-red {</div><div class='ctx'> 			label = "power_red";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tx_green {</div><div class='add'>+		led-tx-green {</div><div class='ctx'> 			label = "tx_green";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tx_red {</div><div class='add'>+		led-tx-red {</div><div class='ctx'> 			label = "tx_red";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-foxg20.dts b/arch/arm/boot/dts/microchip/at91-foxg20.dts<br/>index 9dfd5de808d1..8e9e87665045 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-foxg20.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-foxg20.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-foxg20.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-foxg20.dts</a></div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi b/arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi<br/>index e5e21dff882f..a44d92305dbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-kizbox2-common.dtsi</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	pmic: act8865@5b {</div><div class='add'>+	act8865: pmic@5b {</div><div class='ctx'> 		compatible = "active-semi,act8865";</div><div class='ctx'> 		reg = &lt;0x5b&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-qil_a9260.dts b/arch/arm/boot/dts/microchip/at91-qil_a9260.dts<br/>index 5ccb3c139592..892dbd8dbbed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-qil_a9260.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-qil_a9260.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-qil_a9260.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-qil_a9260.dts</a></div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sam9_l9260.dts b/arch/arm/boot/dts/microchip/at91-sam9_l9260.dts<br/>index 2fb51b9aca2a..49dc1a4ccb36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sam9_l9260.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sam9_l9260.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sam9_l9260.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sam9_l9260.dts</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts b/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts<br/>index 3b38707d736e..c1ff3248bd8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sam9x60ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sam9x60ek.dts</a></div><div class='hunk'>@@ -53,17 +53,17 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='ctx'> 		status = "okay"; /* Conflict with pwm0. */</div><div class='ctx'> </div><div class='del'>-		red {</div><div class='add'>+		led-red {</div><div class='ctx'> 			label = "red";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		green {</div><div class='add'>+		led-green {</div><div class='ctx'> 			label = "green";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		blue {</div><div class='add'>+		led-blue {</div><div class='ctx'> 			label = "blue";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='hunk'>@@ -260,6 +260,37 @@</div><div class='ctx'> 		i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='add'>+		power-monitor@17 {</div><div class='add'>+			compatible = "microchip,pac1934";</div><div class='add'>+			reg = &lt;0x17&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;0x1&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDIOM";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;0x2&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDCORE";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@3 {</div><div class='add'>+				reg = &lt;0x3&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDD3V3_MPU";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@4 {</div><div class='add'>+				reg = &lt;0x4&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDD3V3";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpio_exp: mcp23008@20 {</div><div class='ctx'> 			compatible = "microchip,mcp23008";</div><div class='ctx'> 			reg = &lt;0x20&gt;;</div><div class='hunk'>@@ -578,7 +609,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-		spi-cs-setup-ns = &lt;7&gt;;</div><div class='add'>+		spi-cs-setup-delay-ns = &lt;7&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts<br/>new file mode 100644<br/>index 000000000000..1a6a909a5043<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts</a></div><div class='hunk'>@@ -0,0 +1,374 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * at91-sam9x75_curiosity.dts - Device Tree file for Microchip SAM9X75 Curiosity board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries</div><div class='add'>+ *</div><div class='add'>+ * Author: Varshini Rajendran &lt;varshini.rajendran@microchip.com&gt;</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sam9x7.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip SAM9X75 Curiosity";</div><div class='add'>+	compatible = "microchip,sam9x75-curiosity", "microchip,sam9x7", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_key_gpio_default&gt;;</div><div class='add'>+</div><div class='add'>+		button-user {</div><div class='add'>+			label = "USER";</div><div class='add'>+			gpios = &lt;&amp;pioC 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_0&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_red: led-red {</div><div class='add'>+			label = "red";</div><div class='add'>+			gpios = &lt;&amp;pioC 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_red_led_gpio_default&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_green: led-green {</div><div class='add'>+			label = "green";</div><div class='add'>+			gpios = &lt;&amp;pioC 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_green_led_gpio_default&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_blue: led-blue {</div><div class='add'>+			label = "blue";</div><div class='add'>+			gpios = &lt;&amp;pioC 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_blue_led_gpio_default&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@20000000 {</div><div class='add'>+		reg = &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;classd {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_classd_default&gt;;</div><div class='add'>+	atmel,pwm-type = "diff";</div><div class='add'>+	atmel,non-overlap-time = &lt;10&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dbgu {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_dbgu_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flx6 {</div><div class='add'>+	atmel,flexcom-mode = &lt;ATMEL_FLEXCOM_MODE_TWI&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flx6_default&gt;;</div><div class='add'>+	i2c-analog-filter;</div><div class='add'>+	i2c-digital-filter;</div><div class='add'>+	i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@5b {</div><div class='add'>+		compatible = "microchip,mcp16502";</div><div class='add'>+		reg = &lt;0x5b&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_3v3: VDD_IO {</div><div class='add'>+				regulator-name = "VDD_IO";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddioddr: VDD_DDR {</div><div class='add'>+				regulator-name = "VDD_DDR";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddcore: VDD_CORE {</div><div class='add'>+				regulator-name = "VDD_CORE";</div><div class='add'>+				regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcdc4: VDD_OTHER {</div><div class='add'>+				regulator-name = "VDD_OTHER";</div><div class='add'>+				regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vldo2: LDO2 {</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flx7 {</div><div class='add'>+	atmel,flexcom-mode = &lt;ATMEL_FLEXCOM_MODE_TWI&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	dmas = &lt;0&gt;, &lt;0&gt;;</div><div class='add'>+	i2c-analog-filter;</div><div class='add'>+	i2c-digital-filter;</div><div class='add'>+	i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flx7_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	power-monitor@10 {</div><div class='add'>+		compatible = "microchip,pac1934";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDD3V3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "DCDC4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@3 {</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDDCORE";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDDIODDR";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2s_default&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_xtal {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	classd {</div><div class='add'>+		pinctrl_classd_default: classd-default {</div><div class='add'>+			atmel,pins =</div><div class='add'>+				&lt;AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_PULL_UP&gt;,</div><div class='add'>+				&lt;AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dbgu {</div><div class='add'>+		pinctrl_dbgu_default: dbgu-default {</div><div class='add'>+			atmel,pins = &lt;AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP&gt;,</div><div class='add'>+				     &lt;AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexcom {</div><div class='add'>+		pinctrl_flx6_default: flx6-default {</div><div class='add'>+			atmel,pins =</div><div class='add'>+				&lt;AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP&gt;,</div><div class='add'>+				&lt;AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_flx7_default: flx7-default {</div><div class='add'>+			atmel,pins =</div><div class='add'>+				&lt;AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_PULL_UP&gt;,</div><div class='add'>+				&lt;AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_PULL_UP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		pinctrl_key_gpio_default: key-gpio-default {</div><div class='add'>+			atmel,pins = &lt;AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s {</div><div class='add'>+		pinctrl_i2s_default: i2s-default {</div><div class='add'>+			atmel,pins =</div><div class='add'>+				&lt;AT91_PIOB 26 AT91_PERIPH_D AT91_PINCTRL_NONE&gt;,		/* I2SCK */</div><div class='add'>+				&lt;AT91_PIOB 15 AT91_PERIPH_D AT91_PINCTRL_NONE&gt;,		/* I2SWS */</div><div class='add'>+				&lt;AT91_PIOB 16 AT91_PERIPH_D AT91_PINCTRL_NONE&gt;,		/* I2SDIN */</div><div class='add'>+				&lt;AT91_PIOB 17 AT91_PERIPH_D AT91_PINCTRL_NONE&gt;,		/* I2SDOUT */</div><div class='add'>+				&lt;AT91_PIOB 25 AT91_PERIPH_D AT91_PINCTRL_NONE&gt;;		/* I2SMCK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		pinctrl_red_led_gpio_default: red-led-gpio-default {</div><div class='add'>+			atmel,pins = &lt;AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+		pinctrl_green_led_gpio_default: green-led-gpio-default {</div><div class='add'>+			atmel,pins = &lt;AT91_PIOC 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+		pinctrl_blue_led_gpio_default: blue-led-gpio-default {</div><div class='add'>+			atmel,pins = &lt;AT91_PIOC 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0 {</div><div class='add'>+		pinctrl_sdmmc0_default: sdmmc0-default {</div><div class='add'>+			atmel,pins =</div><div class='add'>+				&lt;AT91_PIOA 2 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;,				/* PA2 CK  periph A with pullup */</div><div class='add'>+				&lt;AT91_PIOA 1 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;,	/* PA1 CMD periph A with pullup */</div><div class='add'>+				&lt;AT91_PIOA 0 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;,	/* PA0 DAT0 periph A */</div><div class='add'>+				&lt;AT91_PIOA 3 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;,	/* PA3 DAT1 periph A with pullup */</div><div class='add'>+				&lt;AT91_PIOA 4 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;,	/* PA4 DAT2 periph A with pullup */</div><div class='add'>+				&lt;AT91_PIOA 5 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)&gt;;	/* PA5 DAT3 periph A with pullup */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+}; /* pinctrl */</div><div class='add'>+</div><div class='add'>+&amp;poweroff {</div><div class='add'>+	debounce-delay-us = &lt;976&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	input@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtt {</div><div class='add'>+	atmel,rtt-rtc-time-reg = &lt;&amp;gpbr 0x0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdmmc0_default&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;slow_xtal {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tcb {</div><div class='add'>+	timer0: timer@0 {</div><div class='add'>+		compatible = "atmel,tcb-timer";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer1: timer@1 {</div><div class='add'>+		compatible = "atmel,tcb-timer";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;trng {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi<br/>index 95ecb7d040a8..13c28e92b17e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d27_som1.dtsi</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> 					compatible = "jedec,spi-nor";</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-					spi-cs-setup-ns = &lt;7&gt;;</div><div class='add'>+					spi-cs-setup-delay-ns = &lt;7&gt;;</div><div class='ctx'> 					spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 					spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 					m25p,fast-read;</div><div class='hunk'>@@ -106,7 +106,7 @@</div><div class='ctx'> 				scl-gpios = &lt;&amp;pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				at24@50 {</div><div class='add'>+				eeprom@50 {</div><div class='ctx'> 					compatible = "atmel,24c02";</div><div class='ctx'> 					reg = &lt;0x50&gt;;</div><div class='ctx'> 					pagesize = &lt;8&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts<br/>index f3ffb8f01d8a..45edf6214cf7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@400000 {</div><div class='add'>+		usb1: usb@400000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0 /* &amp;pioA PIN_PD20 GPIO_ACTIVE_HIGH */</div><div class='ctx'> 					   &amp;pioA PIN_PA27 GPIO_ACTIVE_HIGH</div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@500000 {</div><div class='add'>+		usb2: usb@500000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi<br/>index c173f49cb910..0417f53b3e96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 	scl-gpios = &lt;&amp;pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	mcp16502@5b {</div><div class='add'>+	pmic@5b {</div><div class='ctx'> 		compatible = "microchip,mcp16502";</div><div class='ctx'> 		reg = &lt;0x5b&gt;;</div><div class='ctx'> 		lvin-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -234,7 +234,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-		spi-cs-setup-ns = &lt;7&gt;;</div><div class='add'>+		spi-cs-setup-delay-ns = &lt;7&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='hunk'>@@ -385,7 +385,7 @@</div><div class='ctx'> </div><div class='ctx'> 	wilc: wifi@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		compatible = "microchip,wilc1000";</div><div class='add'>+		compatible = "microchip,wilc3000", "microchip,wilc1000";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_wilc_default&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;pmc PMC_TYPE_SYSTEM 9&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts<br/>index 15239834d886..35a933eec573 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts</a></div><div class='hunk'>@@ -197,6 +197,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdmmc0 {</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sdmmc0_default&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts<br/>index 951a0c97d3c6..7be215781549 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts</a></div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 	i2c-sda-hold-time-ns = &lt;350&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	mcp16502@5b {</div><div class='add'>+	pmic@5b {</div><div class='ctx'> 		compatible = "microchip,mcp16502";</div><div class='ctx'> 		reg = &lt;0x5b&gt;;</div><div class='ctx'> 		lvin-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -514,6 +514,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdmmc0 {</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sdmmc0_default&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts b/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts<br/>index 5e2bb517a480..fbae6a9af6c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts</a></div><div class='hunk'>@@ -195,7 +195,38 @@</div><div class='ctx'> 		i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		mcp16502@5b {</div><div class='add'>+		power-monitor@10 {</div><div class='add'>+			compatible = "microchip,pac1934";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;0x1&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDD3V3_1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;0x2&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDD3V3_2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@3 {</div><div class='add'>+				reg = &lt;0x3&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDCORE";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@4 {</div><div class='add'>+				reg = &lt;0x4&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDIODDR";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmic@5b {</div><div class='ctx'> 			compatible = "microchip,mcp16502";</div><div class='ctx'> 			reg = &lt;0x5b&gt;;</div><div class='ctx'> 			lvin-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -683,7 +714,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-		spi-cs-setup-ns = &lt;7&gt;;</div><div class='add'>+		spi-cs-setup-delay-ns = &lt;7&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts<br/>index 200b20515ab1..10d69f6957cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d2_ptc_ek.dts</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@400000 {</div><div class='add'>+		usb1: usb@400000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0</div><div class='ctx'> 					   &amp;pioA PIN_PB12 GPIO_ACTIVE_HIGH</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@500000 {</div><div class='add'>+		usb2: usb@500000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +231,7 @@</div><div class='ctx'> 				scl-gpios = &lt;&amp;pioA PIN_PC7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				at24@50 {</div><div class='add'>+				eeprom@50 {</div><div class='ctx'> 					compatible = "atmel,24c02";</div><div class='ctx'> 					reg = &lt;0x50&gt;;</div><div class='ctx'> 					pagesize = &lt;8&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts<br/>index 6680031387e8..7e77a55ed41d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@400000 {</div><div class='add'>+		usb1: usb@400000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0 /* &amp;pioA PIN_PB9 GPIO_ACTIVE_HIGH */</div><div class='ctx'> 					   &amp;pioA PIN_PB10 GPIO_ACTIVE_HIGH</div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@500000 {</div><div class='add'>+		usb2: usb@500000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -411,7 +411,7 @@</div><div class='ctx'> 				scl-gpios = &lt;&amp;pioA PIN_PD5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				at24@54 {</div><div class='add'>+				eeprom@54 {</div><div class='ctx'> 					compatible = "atmel,24c02";</div><div class='ctx'> 					reg = &lt;0x54&gt;;</div><div class='ctx'> 					pagesize = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts<br/>index 820033727088..d2c43957497d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d3_xplained.dts</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 			i2c1: i2c@f0018000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				pmic: act8865@5b {</div><div class='add'>+				act8865: pmic@5b {</div><div class='ctx'> 					compatible = "active-semi,act8865";</div><div class='ctx'> 					reg = &lt;0x5b&gt;;</div><div class='ctx'> 					status = "disabled";</div><div class='hunk'>@@ -283,7 +283,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@600000 {</div><div class='add'>+		usb1: usb@600000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0</div><div class='ctx'> 					   &amp;pioE 3 GPIO_ACTIVE_LOW</div><div class='hunk'>@@ -294,7 +294,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@700000 {</div><div class='add'>+		usb2: usb@700000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts b/arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts<br/>index 8adf567f2f0f..b9725e400501 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d4_ma5d4evk.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@500000 {</div><div class='add'>+		usb1: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0</div><div class='ctx'> 					   &amp;pioE 11 GPIO_ACTIVE_LOW</div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@600000 {</div><div class='add'>+		usb2: usb@600000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts<br/>index 95d701d13fef..0ecccb9a809d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d4_xplained.dts</a></div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@500000 {</div><div class='add'>+		usb1: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0</div><div class='ctx'> 					   &amp;pioE 11 GPIO_ACTIVE_HIGH</div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@600000 {</div><div class='add'>+		usb2: usb@600000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama5d4ek.dts b/arch/arm/boot/dts/microchip/at91-sama5d4ek.dts<br/>index 20ac775059ca..69107d6cd26c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama5d4ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama5d4ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama5d4ek.dts</a></div><div class='hunk'>@@ -198,7 +198,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@500000 {</div><div class='add'>+		usb1: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0 /* &amp;pioE 10 GPIO_ACTIVE_LOW */</div><div class='ctx'> 					   &amp;pioE 11 GPIO_ACTIVE_LOW</div><div class='hunk'>@@ -207,7 +207,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@600000 {</div><div class='add'>+		usb2: usb@600000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts<br/>new file mode 100644<br/>index 000000000000..927c27260b6c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts</a></div><div class='hunk'>@@ -0,0 +1,459 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ *  at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries</div><div class='add'>+ *</div><div class='add'>+ *  Author: Romain Sioen &lt;romain.sioen@microchip.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "sama7d65-pinfunc.h"</div><div class='add'>+#include "sama7d65.dtsi"</div><div class='add'>+#include &lt;dt-bindings/mfd/atmel-flexcom.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/at91.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip SAMA7D65 Curiosity";</div><div class='add'>+	compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65",</div><div class='add'>+		     "microchip,sama7d6", "microchip,sama7";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_key_gpio_default&gt;;</div><div class='add'>+</div><div class='add'>+		button {</div><div class='add'>+			label = "PB_USER";</div><div class='add'>+			gpios = &lt;&amp;pioa PIN_PC10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_PROG1&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_led_gpio_default&gt;;</div><div class='add'>+</div><div class='add'>+		led0: led-red {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;pioa PIN_PB17 GPIO_ACTIVE_HIGH&gt;; /* Conflict with pwm. */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1: led-green {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pioa PIN_PB15 GPIO_ACTIVE_HIGH&gt;; /* Conflict with pwm. */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2: led-blue {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;pioa PIN_PA21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@60000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5V_MAIN";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can1_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can2_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can3_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flx6 {</div><div class='add'>+	atmel,flexcom-mode = &lt;ATMEL_FLEXCOM_MODE_USART&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart6_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flx10 {</div><div class='add'>+	atmel,flexcom-mode = &lt;ATMEL_FLEXCOM_MODE_TWI&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gmac0_default</div><div class='add'>+		     &amp;pinctrl_gmac0_mdio_default</div><div class='add'>+		     &amp;pinctrl_gmac0_txck_default</div><div class='add'>+		     &amp;pinctrl_gmac0_phy_irq&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	nvmem-cells = &lt;&amp;eeprom0_eui48&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethernet-phy@7 {</div><div class='add'>+		reg = &lt;0x7&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pioa&gt;;</div><div class='add'>+		interrupts = &lt;PIN_PC1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	dmas = &lt;0&gt;, &lt;0&gt;;</div><div class='add'>+	i2c-analog-filter;</div><div class='add'>+	i2c-digital-filter;</div><div class='add'>+	i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c10_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	power-monitor@10 {</div><div class='add'>+		compatible = "microchip,pac1934";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+			label = "VDD3V3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+			label = "VDDIODDR";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@3 {</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+			label = "VDDCORE";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+			label = "VDDCPU";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@5b {</div><div class='add'>+		compatible = "microchip,mcp16502";</div><div class='add'>+		reg = &lt;0x5b&gt;;</div><div class='add'>+		lvin-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		pvin1-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		pvin2-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		pvin3-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		pvin4-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_3v3: VDD_IO {</div><div class='add'>+				regulator-name = "VDD_IO";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddioddr: VDD_DDR {</div><div class='add'>+				regulator-name = "VDD_DDR";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1350000&gt;;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1350000&gt;;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddcore: VDD_CORE {</div><div class='add'>+				regulator-name = "VDD_CORE";</div><div class='add'>+				regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1050000&gt;;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddcpu: VDD_OTHER {</div><div class='add'>+				regulator-name = "VDD_OTHER";</div><div class='add'>+				regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;2&gt;;</div><div class='add'>+				regulator-allowed-modes = &lt;2&gt;, &lt;4&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1050000&gt;;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-mode = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vldo2: LDO2 {</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-standby {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@51 {</div><div class='add'>+		compatible = "microchip,24aa025e48";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		size = &lt;256&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom0_eui48: eui48@fa {</div><div class='add'>+				reg = &lt;0xfa 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_xtal {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pioa {</div><div class='add'>+	pinctrl_can1_default: can1-default {</div><div class='add'>+		pinmux = &lt;PIN_PD10__CANTX1&gt;,</div><div class='add'>+			 &lt;PIN_PD11__CANRX1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can2_default: can2-default {</div><div class='add'>+		pinmux = &lt;PIN_PD12__CANTX2&gt;,</div><div class='add'>+			 &lt;PIN_PD13__CANRX2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can3_default: can3-default {</div><div class='add'>+		pinmux = &lt;PIN_PD14__CANTX3&gt;,</div><div class='add'>+			 &lt;PIN_PD15__CANRX3&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gmac0_default: gmac0-default {</div><div class='add'>+		pinmux = &lt;PIN_PA26__G0_TX0&gt;,</div><div class='add'>+			 &lt;PIN_PA27__G0_TX1&gt;,</div><div class='add'>+			 &lt;PIN_PB4__G0_TX2&gt;,</div><div class='add'>+			 &lt;PIN_PB5__G0_TX3&gt;,</div><div class='add'>+			 &lt;PIN_PA29__G0_RX0&gt;,</div><div class='add'>+			 &lt;PIN_PA30__G0_RX1&gt;,</div><div class='add'>+			 &lt;PIN_PB2__G0_RX2&gt;,</div><div class='add'>+			 &lt;PIN_PB6__G0_RX3&gt;,</div><div class='add'>+			 &lt;PIN_PA25__G0_TXCTL&gt;,</div><div class='add'>+			 &lt;PIN_PB3__G0_RXCK&gt;,</div><div class='add'>+			 &lt;PIN_PA28__G0_RXCTL&gt;;</div><div class='add'>+		slew-rate = &lt;0&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gmac0_mdio_default: gmac0-mdio-default {</div><div class='add'>+		pinmux = &lt;PIN_PA31__G0_MDC&gt;,</div><div class='add'>+			 &lt;PIN_PB0__G0_MDIO&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gmac0_phy_irq: gmac0-phy-irq {</div><div class='add'>+		pinmux = &lt;PIN_PC1__GPIO&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gmac0_txck_default: gmac0-txck-default {</div><div class='add'>+		pinmux = &lt;PIN_PB1__G0_REFCK&gt;;</div><div class='add'>+		slew-rate = &lt;0&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c10_default: i2c10-default {</div><div class='add'>+		pinmux = &lt;PIN_PB19__FLEXCOM10_IO1&gt;,</div><div class='add'>+			 &lt;PIN_PB20__FLEXCOM10_IO0&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_key_gpio_default: key-gpio-default {</div><div class='add'>+		pinmux = &lt;PIN_PC10__GPIO&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_led_gpio_default: led-gpio-default {</div><div class='add'>+		pinmux = &lt;PIN_PB15__GPIO&gt;,</div><div class='add'>+			 &lt;PIN_PB17__GPIO&gt;,</div><div class='add'>+			 &lt;PIN_PA21__GPIO&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sdmmc1_default: sdmmc1-default {</div><div class='add'>+		cmd-data {</div><div class='add'>+			pinmux = &lt;PIN_PB22__SDMMC1_CMD&gt;,</div><div class='add'>+				 &lt;PIN_PB24__SDMMC1_DAT0&gt;,</div><div class='add'>+				 &lt;PIN_PB25__SDMMC1_DAT1&gt;,</div><div class='add'>+				 &lt;PIN_PB26__SDMMC1_DAT2&gt;,</div><div class='add'>+				 &lt;PIN_PB27__SDMMC1_DAT3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ck-cd-rstn-vddsel {</div><div class='add'>+			pinmux = &lt;PIN_PB23__SDMMC1_CK&gt;,</div><div class='add'>+				 &lt;PIN_PB21__SDMMC1_RSTN&gt;,</div><div class='add'>+				 &lt;PIN_PB30__SDMMC1_1V8SEL&gt;,</div><div class='add'>+				 &lt;PIN_PB29__SDMMC1_CD&gt;,</div><div class='add'>+				 &lt;PIN_PB28__SDMMC1_WP&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart6_default: uart6-default {</div><div class='add'>+		pinmux = &lt;PIN_PD18__FLEXCOM6_IO0&gt;,</div><div class='add'>+			 &lt;PIN_PD19__FLEXCOM6_IO1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtt {</div><div class='add'>+	atmel,rtt-rtc-time-reg = &lt;&amp;gpbr 0x0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	sdhci-caps-mask = &lt;0x0 0x00200000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdmmc1_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;shdwc {</div><div class='add'>+	debounce-delay-us = &lt;976&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	input@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;slow_xtal {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts<br/>index 645e49fdb7fe..eb5f27ce1942 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts</a></div><div class='hunk'>@@ -186,6 +186,37 @@</div><div class='ctx'> 		i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='add'>+		power-monitor@1f {</div><div class='add'>+			compatible = "microchip,pac1934";</div><div class='add'>+			reg = &lt;0x1f&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;0x1&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+				label = "VDD3V3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;0x2&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+				label = "VDDIODDR";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@3 {</div><div class='add'>+				reg = &lt;0x3&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+				label = "VDDCORE";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@4 {</div><div class='add'>+				reg = &lt;0x4&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;47000&gt;;</div><div class='add'>+				label = "VDDCPU";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		eeprom@51 {</div><div class='ctx'> 			compatible = "atmel,24c02";</div><div class='ctx'> 			reg = &lt;0x51&gt;;</div><div class='hunk'>@@ -338,6 +369,38 @@</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='add'>+		label = "at91-qspi";</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "qspi1: at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bootloader@40000 {</div><div class='add'>+				label = "qspi1: u-boot";</div><div class='add'>+				reg = &lt;0x40000 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bootloaderenv@140000 {</div><div class='add'>+				label = "qspi1: u-boot env";</div><div class='add'>+				reg = &lt;0x140000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dtb@180000 {</div><div class='add'>+				label = "qspi1: device tree";</div><div class='add'>+				reg = &lt;0x180000 0x80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@200000 {</div><div class='add'>+				label = "qspi1: kernel";</div><div class='add'>+				reg = &lt;0x200000 0x600000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts<br/>index ed75d491a246..3924f62ff0fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-sama7g5ek.dts</a></div><div class='hunk'>@@ -35,16 +35,6 @@</div><div class='ctx'> 		i2c2 = &amp;i2c9;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	clocks {</div><div class='del'>-		slow_xtal {</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_xtal {</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +127,7 @@</div><div class='ctx'> 	vref-supply = &lt;&amp;vddout25&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_mikrobus1_an_default &amp;pinctrl_mikrobus2_an_default&gt;;</div><div class='add'>+	atmel,trigger-edge-type = &lt;IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -244,7 +235,38 @@</div><div class='ctx'> 		i2c-digital-filter-width-ns = &lt;35&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		mcp16502@5b {</div><div class='add'>+		power-monitor@10 {</div><div class='add'>+			compatible = "microchip,pac1934";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;0x1&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDD3V3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;0x2&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDIODDR";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@3 {</div><div class='add'>+				reg = &lt;0x3&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDCORE";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@4 {</div><div class='add'>+				reg = &lt;0x4&gt;;</div><div class='add'>+				shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+				label = "VDDCPU";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmic@5b {</div><div class='ctx'> 			compatible = "microchip,mcp16502";</div><div class='ctx'> 			reg = &lt;0x5b&gt;;</div><div class='ctx'> 			lvin-supply = &lt;&amp;reg_5v&gt;;</div><div class='hunk'>@@ -524,6 +546,10 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2s0_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_xtal {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pdmc0 {</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	microchip,mic-pos = &lt;MCHP_PDMC_DS0 MCHP_PDMC_CLK_NEGATIVE&gt;, /* MIC 1 */</div><div class='hunk'>@@ -853,6 +879,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;slow_xtal {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spdifrx {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_spdifrx_default&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91-vinco.dts b/arch/arm/boot/dts/microchip/at91-vinco.dts<br/>index ecbdacf48708..c5fc51667066 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-vinco.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91-vinco.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91-vinco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91-vinco.dts</a></div><div class='hunk'>@@ -162,7 +162,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@500000 {</div><div class='add'>+		usb1: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;0</div><div class='ctx'> 					   &amp;pioE 11 GPIO_ACTIVE_LOW</div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@600000 {</div><div class='add'>+		usb2: usb@600000 {</div><div class='ctx'> 			/* 4G Modem */</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91rm9200.dtsi b/arch/arm/boot/dts/microchip/at91rm9200.dtsi<br/>index 02a838541dc3..e105ad855ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91rm9200.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91rm9200.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91rm9200.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91rm9200.dtsi</a></div><div class='hunk'>@@ -702,7 +702,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@300000 {</div><div class='add'>+		usb0: usb@300000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00300000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;23 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -714,9 +714,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 25 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioA 26 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91rm9200ek.dts b/arch/arm/boot/dts/microchip/at91rm9200ek.dts<br/>index 4624a6f076f8..ce691c4692b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91rm9200ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91rm9200ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91rm9200ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91rm9200ek.dts</a></div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@300000 {</div><div class='add'>+		usb0: usb@300000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -127,19 +127,19 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		ds2 {</div><div class='add'>+		led-ds2 {</div><div class='ctx'> 			label = "green";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "mmc0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds4 {</div><div class='add'>+		led-ds4 {</div><div class='ctx'> 			label = "yellow";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds6 {</div><div class='add'>+		led-ds6 {</div><div class='ctx'> 			label = "red";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9260.dtsi b/arch/arm/boot/dts/microchip/at91sam9260.dtsi<br/>index 0038183e9a53..fc0b6a73204f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9260.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9260.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9260.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9260.dtsi</a></div><div class='hunk'>@@ -742,7 +742,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -781,9 +781,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c_gpio0: i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioA 24 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9260ek.dts b/arch/arm/boot/dts/microchip/at91sam9260ek.dts<br/>index 720c15472c4a..8522a210b484 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9260ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9260ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9260ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9260ek.dts</a></div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		24c512@50 {</div><div class='add'>+		eeprom@50 {</div><div class='ctx'> 			compatible = "atmel,24c512";</div><div class='ctx'> 			reg = &lt;0x50&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -174,13 +174,13 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		ds1 {</div><div class='add'>+		led-ds1 {</div><div class='ctx'> 			label = "ds1";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds5 {</div><div class='add'>+		led-ds5 {</div><div class='ctx'> 			label = "ds5";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9261.dtsi b/arch/arm/boot/dts/microchip/at91sam9261.dtsi<br/>index b57a7fd67197..d1d678b77e84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9261.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9261.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9261.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9261.dtsi</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -655,8 +655,8 @@</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_i2c_bitbang&gt;;</div><div class='del'>-		gpios = &lt;&amp;pioA 7 GPIO_ACTIVE_HIGH&gt;, /* sda */</div><div class='del'>-			&lt;&amp;pioA 8 GPIO_ACTIVE_HIGH&gt;; /* scl */</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9261ek.dts b/arch/arm/boot/dts/microchip/at91sam9261ek.dts<br/>index 045cb253f23a..313bc2797fde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9261ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9261ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9261ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9261ek.dts</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahb {</div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -192,19 +192,19 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		ds8 {</div><div class='add'>+		led-ds8 {</div><div class='ctx'> 			label = "ds8";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds7 {</div><div class='add'>+		led-ds7 {</div><div class='ctx'> 			label = "ds7";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "nand-disk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds1 {</div><div class='add'>+		led-ds1 {</div><div class='ctx'> 			label = "ds1";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9263.dtsi b/arch/arm/boot/dts/microchip/at91sam9263.dtsi<br/>index b95d4016ae9f..a4b5d1f228f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9263.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9263.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9263.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9263.dtsi</a></div><div class='hunk'>@@ -768,7 +768,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@a00000 {</div><div class='add'>+		usb0: usb@a00000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00a00000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;29 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -826,9 +826,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioB 4 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioB 5 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioB 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioB 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9263ek.dts b/arch/arm/boot/dts/microchip/at91sam9263ek.dts<br/>index ce8baff6a9f4..93c5268a0845 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9263ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9263ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9263ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9263ek.dts</a></div><div class='hunk'>@@ -152,7 +152,7 @@</div><div class='ctx'> 				nand@3 {</div><div class='ctx'> 					reg = &lt;0x3 0x0 0x800000&gt;;</div><div class='ctx'> 					rb-gpios = &lt;&amp;pioA 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-					cs-gpios = &lt;&amp;pioA 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					cs-gpios = &lt;&amp;pioD 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 					nand-bus-width = &lt;8&gt;;</div><div class='ctx'> 					nand-ecc-mode = "soft";</div><div class='ctx'> 					nand-on-flash-bbt;</div><div class='hunk'>@@ -207,7 +207,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@a00000 {</div><div class='add'>+		usb0: usb@a00000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			atmel,vbus-gpio = &lt;&amp;pioA 24 GPIO_ACTIVE_HIGH</div><div class='hunk'>@@ -219,13 +219,13 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		d3 {</div><div class='add'>+		led-d3 {</div><div class='ctx'> 			label = "d3";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		d2 {</div><div class='add'>+		led-d2 {</div><div class='ctx'> 			label = "d2";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,default-trigger = "nand-disk";</div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		24c512@50 {</div><div class='add'>+		eeprom@50 {</div><div class='ctx'> 			compatible = "atmel,24c512";</div><div class='ctx'> 			reg = &lt;0x50&gt;;</div><div class='ctx'> 			pagesize = &lt;128&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9g20ek.dts b/arch/arm/boot/dts/microchip/at91sam9g20ek.dts<br/>index 6de7a7cd3c07..1e62fd371ddb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g20ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g20ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g20ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9g20ek.dts</a></div><div class='hunk'>@@ -14,13 +14,13 @@</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='del'>-		ds1 {</div><div class='add'>+		led-ds1 {</div><div class='ctx'> 			label = "ds1";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ds5 {</div><div class='add'>+		led-ds5 {</div><div class='ctx'> 			label = "ds5";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi<br/>index 565b99e79c52..84a7287107f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9g20ek_common.dtsi</a></div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -220,7 +220,7 @@</div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		24c512@50 {</div><div class='add'>+		eeprom@50 {</div><div class='ctx'> 			compatible = "atmel,24c512";</div><div class='ctx'> 			reg = &lt;0x50&gt;;</div><div class='ctx'> 			vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts b/arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts<br/>index e0c1e8df81b1..947c011c1b00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		led-power-green {</div><div class='ctx'> 			label = "smartgw:power:green";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "on";</div><div class='add'>+			linux,default-trigger = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-power-red {</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9g45.dtsi b/arch/arm/boot/dts/microchip/at91sam9g45.dtsi<br/>index c54eb21d5cba..4e00ed2d3ecd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g45.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9g45.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9g45.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9g45.dtsi</a></div><div class='hunk'>@@ -753,7 +753,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			trng@fffcc000 {</div><div class='add'>+			trng: rng@fffcc000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9g45-trng";</div><div class='ctx'> 				reg = &lt;0xfffcc000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -964,7 +964,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@700000 {</div><div class='add'>+		usb0: usb@700000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -973,7 +973,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ehci@800000 {</div><div class='add'>+		usb1: usb@800000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00800000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -1010,9 +1010,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 20 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioA 21 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;5&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts b/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts<br/>index 071db4f16313..2a31b2f14893 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9m10g45ek.dts</a></div><div class='hunk'>@@ -303,14 +303,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@700000 {</div><div class='add'>+		usb0: usb@700000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;&amp;pioD 1 GPIO_ACTIVE_LOW</div><div class='ctx'> 					   &amp;pioD 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ehci@800000 {</div><div class='add'>+		usb1: usb@800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi<br/>index 844bd50943fc..af41c3dbb4bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9n12.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9n12.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9n12.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9n12.dtsi</a></div><div class='hunk'>@@ -748,7 +748,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x00100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -786,9 +786,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 30 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioA 31 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9n12ek.dts b/arch/arm/boot/dts/microchip/at91sam9n12ek.dts<br/>index 643c3b2ab97e..b06a54e8e237 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9n12ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9n12ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9n12ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9n12ek.dts</a></div><div class='hunk'>@@ -180,7 +180,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;1&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;&amp;pioB 7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9rl.dtsi b/arch/arm/boot/dts/microchip/at91sam9rl.dtsi<br/>index 1fec9fcc7cd1..de74cf2980a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9rl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9rl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9rl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9rl.dtsi</a></div><div class='hunk'>@@ -833,8 +833,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_HIGH&gt;, /* sda */</div><div class='del'>-			&lt;&amp;pioA 24 GPIO_ACTIVE_HIGH&gt;; /* scl */</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='hunk'>@@ -847,8 +847,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-1 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioD 10 GPIO_ACTIVE_HIGH&gt;, /* sda */</div><div class='del'>-			&lt;&amp;pioD 11 GPIO_ACTIVE_HIGH&gt;; /* scl */</div><div class='add'>+		sda-gpios = &lt;&amp;pioD 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioD 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi<br/>index 27c1f2861cc3..9070fd06995a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9x5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/at91sam9x5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/at91sam9x5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/at91sam9x5.dtsi</a></div><div class='hunk'>@@ -886,7 +886,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@600000 {</div><div class='add'>+		usb0: usb@600000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -895,7 +895,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ehci@700000 {</div><div class='add'>+		usb1: usb@700000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -933,9 +933,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 30 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioA 31 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioA 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioA 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='hunk'>@@ -948,9 +947,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-1 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioC 0 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioC 1 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioC 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioC 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='hunk'>@@ -963,9 +961,8 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-gpio-2 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioB 4 GPIO_ACTIVE_HIGH /* sda */</div><div class='del'>-			 &amp;pioB 5 GPIO_ACTIVE_HIGH /* scl */</div><div class='del'>-			&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;pioB 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;pioB 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		i2c-gpio,sda-open-drain;</div><div class='ctx'> 		i2c-gpio,scl-open-drain;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/ethernut5.dts b/arch/arm/boot/dts/microchip/ethernut5.dts<br/>index ad7a0850252a..52ccef31b391 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/ethernut5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/ethernut5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/ethernut5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/ethernut5.dts</a></div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/evk-pro3.dts b/arch/arm/boot/dts/microchip/evk-pro3.dts<br/>index 6d519d02d190..40c5111c2f0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/evk-pro3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/evk-pro3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/evk-pro3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/evk-pro3.dts</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/mpa1600.dts b/arch/arm/boot/dts/microchip/mpa1600.dts<br/>index 005c2758e229..2a97e2c0b894 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/mpa1600.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/mpa1600.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/mpa1600.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/mpa1600.dts</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@300000 {</div><div class='add'>+		usb0: usb@300000 {</div><div class='ctx'> 			num-ports = &lt;1&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/pm9g45.dts b/arch/arm/boot/dts/microchip/pm9g45.dts<br/>index c349fd3758a6..2258e62f5864 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/pm9g45.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/pm9g45.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/pm9g45.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/pm9g45.dts</a></div><div class='hunk'>@@ -139,12 +139,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@700000 {</div><div class='add'>+		usb0: usb@700000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ehci@800000 {</div><div class='add'>+		usb1: usb@800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi<br/>index 04a6d716ecaf..b075865e6a76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sam9x60.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sam9x60.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sam9x60.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sam9x60.dtsi</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@600000 {</div><div class='add'>+		usb1: usb@600000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -97,7 +97,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@700000 {</div><div class='add'>+		usb2: usb@700000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;22 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -186,6 +186,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -196,6 +197,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -267,6 +270,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 14&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -388,6 +393,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 32&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -439,6 +445,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 33&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -486,7 +493,7 @@</div><div class='ctx'> 				clock-names = "sha_clk";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			trng: trng@f0030000 {</div><div class='add'>+			trng: rng@f0030000 {</div><div class='ctx'> 				compatible = "microchip,sam9x60-trng";</div><div class='ctx'> 				reg = &lt;0xf0030000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -598,6 +605,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 9&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -649,6 +657,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 10&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -700,6 +709,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 11&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -751,6 +761,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -761,6 +772,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -821,6 +834,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -831,6 +845,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -891,6 +907,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -901,6 +918,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -961,6 +980,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -971,6 +991,8 @@</div><div class='ctx'> 					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";</div><div class='ctx'> 					reg = &lt;0x400 0x200&gt;;</div><div class='ctx'> 					interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='ctx'> 					clock-names = "spi_clk";</div><div class='ctx'> 					dmas = &lt;&amp;dma0</div><div class='hunk'>@@ -1086,6 +1108,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 15&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='hunk'>@@ -1137,6 +1160,7 @@</div><div class='ctx'> 					dma-names = "tx", "rx";</div><div class='ctx'> 					clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 16&gt;;</div><div class='ctx'> 					clock-names = "usart";</div><div class='add'>+					atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='ctx'> 					atmel,use-dma-rx;</div><div class='ctx'> 					atmel,use-dma-tx;</div><div class='ctx'> 					atmel,fifo-size = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi<br/>new file mode 100644<br/>index 000000000000..46dacbbd201d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sam9x7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sam9x7.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1316 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries</div><div class='add'>+ *</div><div class='add'>+ * Author: Varshini Rajendran &lt;varshini.rajendran@microchip.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/at91.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mfd/atmel-flexcom.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/at91.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip SAM9X7 SoC";</div><div class='add'>+	compatible = "microchip,sam9x7";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;dbgu;</div><div class='add'>+		gpio0 = &amp;pioA;</div><div class='add'>+		gpio1 = &amp;pioB;</div><div class='add'>+		gpio2 = &amp;pioC;</div><div class='add'>+		gpio3 = &amp;pioD;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ej-s";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		slow_xtal: clock-slowxtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "slow_xtal";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_xtal: clock-mainxtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "main_xtal";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sram: sram@300000 {</div><div class='add'>+		compatible = "mmio-sram";</div><div class='add'>+		reg = &lt;0x300000 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0 0x300000 0x10000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		sdmmc0: mmc@80000000 {</div><div class='add'>+			compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";</div><div class='add'>+			reg = &lt;0x80000000 0x300&gt;;</div><div class='add'>+			interrupts = &lt;12 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 12&gt;, &lt;&amp;pmc PMC_TYPE_GCK 12&gt;;</div><div class='add'>+			clock-names = "hclock", "multclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 12&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc1: mmc@90000000 {</div><div class='add'>+			compatible = "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci";</div><div class='add'>+			reg = &lt;0x90000000 0x300&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 26&gt;, &lt;&amp;pmc PMC_TYPE_GCK 26&gt;;</div><div class='add'>+			clock-names = "hclock", "multclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 26&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		flx4: flexcom@f0000000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf0000000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf0000000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart4: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(8))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(9))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(8))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(9))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 13&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(8))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(9))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx5: flexcom@f0004000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf0004000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf0004000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 14&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart5: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 14&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(10))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(11))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 14&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(10))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(11))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 14&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(10))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(11))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma0: dma-controller@f0008000 {</div><div class='add'>+			compatible = "microchip,sam9x7-dma", "atmel,sama5d4-dma";</div><div class='add'>+			reg = &lt;0xf0008000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 20&gt;;</div><div class='add'>+			clock-names = "dma_clk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ssc: ssc@f0010000 {</div><div class='add'>+			compatible = "microchip,sam9x7-ssc", "atmel,at91sam9g45-ssc";</div><div class='add'>+			reg = &lt;0xf0010000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;28 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 28&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(38))&gt;,</div><div class='add'>+			       &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(39))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qspi: spi@f0014000 {</div><div class='add'>+			compatible = "microchip,sam9x7-ospi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0xf0014000 0x100&gt;, &lt;0x60000000 0x20000000&gt;;</div><div class='add'>+			reg-names = "qspi_base", "qspi_mmap";</div><div class='add'>+			interrupts = &lt;35 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				AT91_XDMAC_DT_PERID(26))&gt;,</div><div class='add'>+				&lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				AT91_XDMAC_DT_PERID(27))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 35&gt;, &lt;&amp;pmc PMC_TYPE_GCK 35&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 35&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_PLLADIV2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2s: i2s@f001c000 {</div><div class='add'>+			compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc";</div><div class='add'>+			reg = &lt;0xf001c000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;34 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 34&gt;, &lt;&amp;pmc PMC_TYPE_GCK 34&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(36))&gt;,</div><div class='add'>+			       &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(37))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx11: flexcom@f0020000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf0020000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf0020000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart11: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 32&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(22))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(23))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c11: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 32&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(22))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(23))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx12: flexcom@f0024000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf0024000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf0024000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 33&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart12: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;33 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 33&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(24))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(25))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c12: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;33 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 33&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(24))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(25))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pit64b0: timer@f0028000 {</div><div class='add'>+			compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";</div><div class='add'>+			reg = &lt;0xf0028000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;37 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 37&gt;, &lt;&amp;pmc PMC_TYPE_GCK 37&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sha: crypto@f002c000 {</div><div class='add'>+			compatible = "microchip,sam9x7-sha", "atmel,at91sam9g46-sha";</div><div class='add'>+			reg = &lt;0xf002c000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;41 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 41&gt;;</div><div class='add'>+			clock-names = "sha_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(34))&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trng: rng@f0030000 {</div><div class='add'>+			compatible = "microchip,sam9x7-trng", "microchip,sam9x60-trng";</div><div class='add'>+			reg = &lt;0xf0030000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 38&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aes: crypto@f0034000 {</div><div class='add'>+			compatible = "microchip,sam9x7-aes", "atmel,at91sam9g46-aes";</div><div class='add'>+			reg = &lt;0xf0034000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;39 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 39&gt;;</div><div class='add'>+			clock-names = "aes_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(32))&gt;,</div><div class='add'>+			       &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(33))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tdes: crypto@f0038000 {</div><div class='add'>+			compatible = "microchip,sam9x7-tdes", "atmel,at91sam9g46-tdes";</div><div class='add'>+			reg = &lt;0xf0038000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;40 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 40&gt;;</div><div class='add'>+			clock-names = "tdes_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(31))&gt;,</div><div class='add'>+			       &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(30))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		classd: sound@f003c000 {</div><div class='add'>+			compatible = "microchip,sam9x7-classd", "atmel,sama5d2-classd";</div><div class='add'>+			reg = &lt;0xf003c000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;42 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 42&gt;, &lt;&amp;pmc PMC_TYPE_GCK 42&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(35))&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pit64b1: timer@f0040000 {</div><div class='add'>+			compatible = "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b";</div><div class='add'>+			reg = &lt;0xf0040000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;58 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 58&gt;, &lt;&amp;pmc PMC_TYPE_GCK 58&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0: can@f8000000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xf8000000 0x100&gt;, &lt;0x300000 0x7800&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;29 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;68 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 29&gt;, &lt;&amp;pmc PMC_TYPE_GCK 29&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;, &lt;&amp;pmc PMC_TYPE_GCK 29&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;480000000&gt;, &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;, &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x3400 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1: can@f8004000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xf8004000 0x100&gt;, &lt;0x300000 0xbc00&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;30 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;69 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 30&gt;, &lt;&amp;pmc PMC_TYPE_GCK 30&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;, &lt;&amp;pmc PMC_TYPE_GCK 30&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;480000000&gt;, &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;, &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x7800 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcb: timer@f8008000 {</div><div class='add'>+			compatible = "microchip,sam9x7-tcb","atmel,sama5d2-tcb", "simple-mfd", "syscon";</div><div class='add'>+			reg = &lt;0xf8008000 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;17 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 17&gt;, &lt;&amp;pmc PMC_TYPE_GCK 17&gt;, &lt;&amp;clk32k 0&gt;;</div><div class='add'>+			clock-names = "t0_clk", "gclk", "slow_clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx6: flexcom@f8010000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8010000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8010000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 9&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart6: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 9&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(12))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(13))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 9&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(12))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(13))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx7: flexcom@f8014000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8014000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8014000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart7: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 10&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(14))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(15))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 10&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(14))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(15))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx8: flexcom@f8018000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8018000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8018000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 11&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart8: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 11&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(16))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(17))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;11 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 11&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(16))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(17))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx0: flexcom@f801c000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf801c000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf801c000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart0: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(0))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(1))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(0))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(1))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 5&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(0))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(1))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx1: flexcom@f8020000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8020000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8020000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart1: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(2))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(3))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(2))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(3))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 6&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(2))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(3))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx2: flexcom@f8024000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8024000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8024000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart2: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(4))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(5))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(4))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(5))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 7&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(4))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(5))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx3: flexcom@f8028000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8028000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8028000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart3: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(6))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(7))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@400 {</div><div class='add'>+				compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(6))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(7))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 8&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(6))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(7))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac: ethernet@f802c000 {</div><div class='add'>+			compatible = "microchip,sam9x7-gem", "microchip,sama7g5-gem";</div><div class='add'>+			reg = &lt;0xf802c000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH 3&gt;,	/* Queue 0 */</div><div class='add'>+				     &lt;60 IRQ_TYPE_LEVEL_HIGH 3&gt;,	/* Queue 1 */</div><div class='add'>+				     &lt;61 IRQ_TYPE_LEVEL_HIGH 3&gt;,	/* Queue 2 */</div><div class='add'>+				     &lt;62 IRQ_TYPE_LEVEL_HIGH 3&gt;,	/* Queue 3 */</div><div class='add'>+				     &lt;63 IRQ_TYPE_LEVEL_HIGH 3&gt;,	/* Queue 4 */</div><div class='add'>+				     &lt;64 IRQ_TYPE_LEVEL_HIGH 3&gt;;	/* Queue 5 */</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 24&gt;, &lt;&amp;pmc PMC_TYPE_PERIPHERAL 24&gt;, &lt;&amp;pmc PMC_TYPE_GCK 24&gt;, &lt;&amp;pmc PMC_TYPE_GCK 67&gt;;</div><div class='add'>+			clock-names = "hclk", "pclk", "tx_clk", "tsu_clk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 67&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;266666666&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm0: pwm@f8034000 {</div><div class='add'>+			compatible = "microchip,sam9x7-pwm", "microchip,sam9x60-pwm";</div><div class='add'>+			reg = &lt;0xf8034000 0x300&gt;;</div><div class='add'>+			interrupts = &lt;18 IRQ_TYPE_LEVEL_HIGH 4&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 18&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hlcdc: hlcdc@f8038000 {</div><div class='add'>+			compatible = "microchip,sam9x75-xlcdc";</div><div class='add'>+			reg = &lt;0xf8038000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 25&gt;, &lt;&amp;pmc PMC_TYPE_GCK 25&gt;, &lt;&amp;clk32k 1&gt;;</div><div class='add'>+			clock-names = "periph_clk", "sys_clk", "slow_clk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			display-controller {</div><div class='add'>+				compatible = "atmel,hlcdc-display-controller";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm {</div><div class='add'>+				compatible = "atmel,hlcdc-pwm";</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx9: flexcom@f8040000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8040000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8040000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 15&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart9: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;15 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 15&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(18))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(19))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c9: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;15 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 15&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(18))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(19))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx10: flexcom@f8044000 {</div><div class='add'>+			compatible = "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xf8044000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xf8044000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 16&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart10: serial@200 {</div><div class='add'>+				compatible = "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;16 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 16&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(20))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(21))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@600 {</div><div class='add'>+				compatible = "microchip,sam9x7-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;16 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 16&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(20))&gt;,</div><div class='add'>+				       &lt;&amp;dma0</div><div class='add'>+					(AT91_XDMAC_DT_MEM_IF(0) |</div><div class='add'>+					 AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+					 AT91_XDMAC_DT_PERID(21))&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lvds_controller: lvds-controller@f8060000 {</div><div class='add'>+			compatible = "microchip,sam9x75-lvds";</div><div class='add'>+			reg = &lt;0xf8060000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;56 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 56&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		matrix: matrix@ffffde00 {</div><div class='add'>+			compatible = "microchip,sam9x7-matrix", "atmel,at91sam9x5-matrix", "syscon";</div><div class='add'>+			reg = &lt;0xffffde00 0x200&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmecc: ecc-engine@ffffe000 {</div><div class='add'>+			compatible = "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc";</div><div class='add'>+			reg = &lt;0xffffe000 0x300&gt;, &lt;0xffffe600 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mpddrc: mpddrc@ffffe800 {</div><div class='add'>+			compatible = "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc";</div><div class='add'>+			reg = &lt;0xffffe800 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_SYSTEM 2&gt;, &lt;&amp;pmc PMC_TYPE_CORE PMC_MCK&gt;;</div><div class='add'>+			clock-names = "ddrck", "mpddr";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc: smc@ffffea00 {</div><div class='add'>+			compatible = "microchip,sam9x7-smc", "atmel,at91sam9260-smc", "syscon";</div><div class='add'>+			reg = &lt;0xffffea00 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@fffff100 {</div><div class='add'>+			compatible = "microchip,sam9x7-aic";</div><div class='add'>+			reg = &lt;0xfffff100 0x100&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			atmel,external-irqs = &lt;31&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dbgu: serial@fffff200 {</div><div class='add'>+			compatible = "microchip,sam9x7-dbgu", "atmel,at91sam9260-dbgu", "microchip,sam9x7-usart", "atmel,at91sam9260-usart";</div><div class='add'>+			reg = &lt;0xfffff200 0x200&gt;;</div><div class='add'>+			interrupts = &lt;47 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 47&gt;;</div><div class='add'>+			clock-names = "usart";</div><div class='add'>+			dmas = &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(28))&gt;,</div><div class='add'>+			       &lt;&amp;dma0</div><div class='add'>+				(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+				 AT91_XDMAC_DT_PERID(29))&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@fffff400 {</div><div class='add'>+			compatible = "microchip,sam9x7-pinctrl", "microchip,sam9x60-pinctrl", "simple-mfd";</div><div class='add'>+			ranges = &lt;0xfffff400 0xfffff400 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			/* mux-mask corresponding to sam9x7 SoC in TFBGA228L package */</div><div class='add'>+			atmel,mux-mask = &lt;</div><div class='add'>+					 /*  A		B	   C	      D	  */</div><div class='add'>+					 0xffffffff 0xffffefc0 0xc0ffd000 0x00000000	/* pioA */</div><div class='add'>+					 0x07ffffff 0x0805fe7f 0x01ff9f81 0x06078000	/* pioB */</div><div class='add'>+					 0xffffffff 0x07dfffff 0xfa3fffff 0x00000000	/* pioC */</div><div class='add'>+					 0x00003fff 0x00003fe0 0x0000003f 0x00000000	/* pioD */</div><div class='add'>+					 &gt;;</div><div class='add'>+</div><div class='add'>+			pioA: gpio@fffff400 {</div><div class='add'>+				compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioB: gpio@fffff600 {</div><div class='add'>+				compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-lines = &lt;26&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioC: gpio@fffff800 {</div><div class='add'>+				compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff800 0x200&gt;;</div><div class='add'>+				interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioD: gpio@fffffa00 {</div><div class='add'>+				compatible = "microchip,sam9x7-gpio", "microchip,sam9x60-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffffa00 0x200&gt;;</div><div class='add'>+				interrupts = &lt;44 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-lines = &lt;22&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 44&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmc: clock-controller@fffffc00 {</div><div class='add'>+			compatible = "microchip,sam9x7-pmc", "syscon";</div><div class='add'>+			reg = &lt;0xfffffc00 0x200&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 1&gt;, &lt;&amp;clk32k 0&gt;, &lt;&amp;main_xtal&gt;;</div><div class='add'>+			clock-names = "td_slck", "md_slck", "main_xtal";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset_controller: reset-controller@fffffe00 {</div><div class='add'>+			compatible = "microchip,sam9x7-rstc", "microchip,sam9x60-rstc";</div><div class='add'>+			reg = &lt;0xfffffe00 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		poweroff: poweroff@fffffe10 {</div><div class='add'>+			compatible = "microchip,sam9x7-shdwc", "microchip,sam9x60-shdwc";</div><div class='add'>+			reg = &lt;0xfffffe10 0x10&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+			atmel,wakeup-rtc-timer;</div><div class='add'>+			atmel,wakeup-rtt-timer;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtt: rtc@fffffe20 {</div><div class='add'>+			compatible = "microchip,sam9x7-rtt", "atmel,at91sam9260-rtt";</div><div class='add'>+			reg = &lt;0xfffffe20 0x20&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk32k: clock-controller@fffffe50 {</div><div class='add'>+			compatible = "microchip,sam9x7-sckc", "microchip,sam9x60-sckc";</div><div class='add'>+			reg = &lt;0xfffffe50 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;slow_xtal&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpbr: syscon@fffffe60 {</div><div class='add'>+			compatible = "microchip,sam9x7-gpbr", "atmel,at91sam9260-gpbr", "syscon";</div><div class='add'>+			reg = &lt;0xfffffe60 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@fffffea8 {</div><div class='add'>+			compatible = "microchip,sam9x7-rtc", "microchip,sam9x60-rtc";</div><div class='add'>+			reg = &lt;0xfffffea8 0x100&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog: watchdog@ffffff80 {</div><div class='add'>+			compatible = "microchip,sam9x7-wdt", "microchip,sam9x60-wdt";</div><div class='add'>+			reg = &lt;0xffffff80 0x24&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d2.dtsi b/arch/arm/boot/dts/microchip/sama5d2.dtsi<br/>index 5f8e297e19ed..17430d7f2055 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d2.dtsi</a></div><div class='hunk'>@@ -32,6 +32,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a5";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -136,7 +138,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@400000 {</div><div class='add'>+		usb1: usb@400000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00400000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;41 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -145,7 +147,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@500000 {</div><div class='add'>+		usb2: usb@500000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;41 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -160,6 +162,7 @@</div><div class='ctx'> 			interrupts = &lt;63 IRQ_TYPE_LEVEL_HIGH 4&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;0x20000&gt;;		// L2, 128 KB</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ebi: ebi@10000000 {</div><div class='hunk'>@@ -1019,7 +1022,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			trng@fc01c000 {</div><div class='add'>+			trng: rng@fc01c000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9g45-trng";</div><div class='ctx'> 				reg = &lt;0xfc01c000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;47 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi<br/>index 39865133aa56..00ba59ac1968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d3.dtsi</a></div><div class='hunk'>@@ -48,6 +48,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a5";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -419,7 +421,7 @@</div><div class='ctx'> 				clock-names = "tdes_clk";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			trng@f8040000 {</div><div class='add'>+			trng: rng@f8040000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9g45-trng";</div><div class='ctx'> 				reg = &lt;0xf8040000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;45 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -1074,7 +1076,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@600000 {</div><div class='add'>+		usb1: usb@600000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -1083,7 +1085,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@700000 {</div><div class='add'>+		usb2: usb@700000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00700000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d34ek.dts b/arch/arm/boot/dts/microchip/sama5d34ek.dts<br/>index bffd61397cb5..18943b873fff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d34ek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d34ek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d34ek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d34ek.dts</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 			i2c1: i2c@f0018000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				24c256@50 {</div><div class='add'>+				eeprom@50 {</div><div class='ctx'> 					compatible = "atmel,24c256";</div><div class='ctx'> 					reg = &lt;0x50&gt;;</div><div class='ctx'> 					pagesize = &lt;64&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi b/arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi<br/>index 830a0954ba1b..362806afef44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d3xcm_cmp.dtsi</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			i2c1: i2c@f0018000 {</div><div class='del'>-				pmic: act8865@5b {</div><div class='add'>+				act8865: pmic@5b {</div><div class='ctx'> 					compatible = "active-semi,act8865";</div><div class='ctx'> 					reg = &lt;0x5b&gt;;</div><div class='ctx'> 					status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi b/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi<br/>index 3652c9e24124..90da04b84b39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d3xmb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d3xmb.dtsi</a></div><div class='hunk'>@@ -172,7 +172,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@600000 {</div><div class='add'>+		usb1: usb@600000 {</div><div class='ctx'> 			num-ports = &lt;3&gt;;</div><div class='ctx'> 			atmel,vbus-gpio = &lt;&amp;pioD 25 GPIO_ACTIVE_HIGH</div><div class='ctx'> 					   &amp;pioD 26 GPIO_ACTIVE_LOW</div><div class='hunk'>@@ -181,7 +181,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@700000 {</div><div class='add'>+		usb2: usb@700000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi<br/>index b253ba33fc38..ec1d68c640de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama5d4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama5d4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama5d4.dtsi</a></div><div class='hunk'>@@ -50,6 +50,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a5";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -119,7 +121,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb1: ohci@500000 {</div><div class='add'>+		usb1: usb@500000 {</div><div class='ctx'> 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0x00500000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -128,7 +130,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb2: ehci@600000 {</div><div class='add'>+		usb2: usb@600000 {</div><div class='ctx'> 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0x00600000 0x100000&gt;;</div><div class='ctx'> 			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH 2&gt;;</div><div class='hunk'>@@ -143,6 +145,7 @@</div><div class='ctx'> 			interrupts = &lt;67 IRQ_TYPE_LEVEL_HIGH 4&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;0x20000&gt;;		// L2, 128 KB</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ebi: ebi@10000000 {</div><div class='hunk'>@@ -658,7 +661,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			trng@fc030000 {</div><div class='add'>+			trng: rng@fc030000 {</div><div class='ctx'> 				compatible = "atmel,at91sam9g45-trng";</div><div class='ctx'> 				reg = &lt;0xfc030000 0x100&gt;;</div><div class='ctx'> 				interrupts = &lt;53 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama7d65-pinfunc.h b/arch/arm/boot/dts/microchip/sama7d65-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..c591f333cacb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama7d65-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama7d65-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,947 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */</div><div class='add'>+#define PINMUX_PIN(no, func, ioset) \</div><div class='add'>+(((no) &amp; 0xffff) | (((func) &amp; 0xf) &lt;&lt; 16) | (((ioset) &amp; 0xff) &lt;&lt; 20))</div><div class='add'>+</div><div class='add'>+#define PIN_PA0				0</div><div class='add'>+#define PIN_PA0__GPIO			PINMUX_PIN(PIN_PA0, 0, 0)</div><div class='add'>+#define PIN_PA0__SDMMC0_CK		PINMUX_PIN(PIN_PA0, 1, 1)</div><div class='add'>+#define PIN_PA0__FLEXCOM3_IO0		PINMUX_PIN(PIN_PA0, 2, 1)</div><div class='add'>+#define PIN_PA0__NWER0			PINMUX_PIN(PIN_PA0, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA1				1</div><div class='add'>+#define PIN_PA1__GPIO			PINMUX_PIN(PIN_PA1, 0, 0)</div><div class='add'>+#define PIN_PA1__SDMMC0_CMD		PINMUX_PIN(PIN_PA1, 1, 1)</div><div class='add'>+#define PIN_PA1__FLEXCOM3_IO1		PINMUX_PIN(PIN_PA1, 2, 1)</div><div class='add'>+#define PIN_PA1__A21			PINMUX_PIN(PIN_PA1, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA2				2</div><div class='add'>+#define PIN_PA2__GPIO			PINMUX_PIN(PIN_PA2, 0, 0)</div><div class='add'>+#define PIN_PA2__SDMMC0_RSTN		PINMUX_PIN(PIN_PA2, 1, 1)</div><div class='add'>+#define PIN_PA2__FLEXCOM3_IO2		PINMUX_PIN(PIN_PA2, 2, 1)</div><div class='add'>+#define PIN_PA2__A22			PINMUX_PIN(PIN_PA2, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA3				3</div><div class='add'>+#define PIN_PA3__GPIO			PINMUX_PIN(PIN_PA3, 0, 0)</div><div class='add'>+#define PIN_PA3__SDMMC0_DAT0		PINMUX_PIN(PIN_PA3, 1, 1)</div><div class='add'>+#define PIN_PA3__FLEXCOM3_IO3		PINMUX_PIN(PIN_PA3, 2, 1)</div><div class='add'>+#define PIN_PA3__D0			PINMUX_PIN(PIN_PA3, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA4				4</div><div class='add'>+#define PIN_PA4__GPIO			PINMUX_PIN(PIN_PA4, 0, 0)</div><div class='add'>+#define PIN_PA4__SDMMC0_DAT1		PINMUX_PIN(PIN_PA4, 1, 1)</div><div class='add'>+#define PIN_PA4__FLEXCOM3_IO4		PINMUX_PIN(PIN_PA4, 2, 1)</div><div class='add'>+#define PIN_PA4__D1			PINMUX_PIN(PIN_PA4, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA5				5</div><div class='add'>+#define PIN_PA5__GPIO			PINMUX_PIN(PIN_PA5, 0, 0)</div><div class='add'>+#define PIN_PA5__SDMMC0_DAT4		PINMUX_PIN(PIN_PA5, 1, 1)</div><div class='add'>+#define PIN_PA5__FLEXCOM2_IO0		PINMUX_PIN(PIN_PA5, 2, 3)</div><div class='add'>+#define PIN_PA5__D4			PINMUX_PIN(PIN_PA5, 3, 1)</div><div class='add'>+#define PIN_PA5__TCLK4			PINMUX_PIN(PIN_PA5, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA6				6</div><div class='add'>+#define PIN_PA6__GPIO			PINMUX_PIN(PIN_PA6, 0, 0)</div><div class='add'>+#define PIN_PA6__SDMMC0_DAT5		PINMUX_PIN(PIN_PA6, 1, 1)</div><div class='add'>+#define PIN_PA6__FLEXCOM2_IO1		PINMUX_PIN(PIN_PA6, 2, 3)</div><div class='add'>+#define PIN_PA6__D5			PINMUX_PIN(PIN_PA6, 3, 1)</div><div class='add'>+#define PIN_PA6__TIOB4			PINMUX_PIN(PIN_PA6, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA7				7</div><div class='add'>+#define PIN_PA7__GPIO			PINMUX_PIN(PIN_PA7, 0, 0)</div><div class='add'>+#define PIN_PA7__SDMMC0_DAT6		PINMUX_PIN(PIN_PA7, 1, 1)</div><div class='add'>+#define PIN_PA7__FLEXCOM2_IO2		PINMUX_PIN(PIN_PA7, 2, 3)</div><div class='add'>+#define PIN_PA7__D6			PINMUX_PIN(PIN_PA7, 3, 1)</div><div class='add'>+#define PIN_PA7__TIOA4			PINMUX_PIN(PIN_PA7, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA8				8</div><div class='add'>+#define PIN_PA8__GPIO			PINMUX_PIN(PIN_PA8, 0, 0)</div><div class='add'>+#define PIN_PA8__SDMMC0_DAT7		PINMUX_PIN(PIN_PA8, 1, 1)</div><div class='add'>+#define PIN_PA8__FLEXCOM2_IO3		PINMUX_PIN(PIN_PA8, 2, 3)</div><div class='add'>+#define PIN_PA8__D7			PINMUX_PIN(PIN_PA8, 3, 1)</div><div class='add'>+#define PIN_PA8__TIOA5			PINMUX_PIN(PIN_PA8, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA9				9</div><div class='add'>+#define PIN_PA9__GPIO			PINMUX_PIN(PIN_PA9, 0, 0)</div><div class='add'>+#define PIN_PA9__SDMMC0_DAT2		PINMUX_PIN(PIN_PA9, 1, 1)</div><div class='add'>+#define PIN_PA9__FLEXCOM0_IO2		PINMUX_PIN(PIN_PA9, 2, 1)</div><div class='add'>+#define PIN_PA9__D2			PINMUX_PIN(PIN_PA9, 3, 1)</div><div class='add'>+#define PIN_PA9__TIOB5			PINMUX_PIN(PIN_PA9, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA10			10</div><div class='add'>+#define PIN_PA10__GPIO			PINMUX_PIN(PIN_PA10, 0, 0)</div><div class='add'>+#define PIN_PA10__SDMMC0_DAT3		PINMUX_PIN(PIN_PA10, 1, 1)</div><div class='add'>+#define PIN_PA10__FLEXCOM0_IO3		PINMUX_PIN(PIN_PA10, 2, 1)</div><div class='add'>+#define PIN_PA10__D3			PINMUX_PIN(PIN_PA10, 3, 1)</div><div class='add'>+#define PIN_PA10__TCLK5			PINMUX_PIN(PIN_PA10, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA11			11</div><div class='add'>+#define PIN_PA11__GPIO			PINMUX_PIN(PIN_PA11, 0, 0)</div><div class='add'>+#define PIN_PA11__SDMMC0_DS		PINMUX_PIN(PIN_PA11, 1, 1)</div><div class='add'>+#define PIN_PA11__FLEXCOM0_IO4		PINMUX_PIN(PIN_PA11, 2, 1)</div><div class='add'>+#define PIN_PA11__NANDRDY		PINMUX_PIN(PIN_PA11, 3, 1)</div><div class='add'>+#define PIN_PA11__TIOB3			PINMUX_PIN(PIN_PA11, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA12			12</div><div class='add'>+#define PIN_PA12__GPIO			PINMUX_PIN(PIN_PA12, 0, 0)</div><div class='add'>+#define PIN_PA12__FLEXCOM0_IO0		PINMUX_PIN(PIN_PA12, 2, 1)</div><div class='add'>+#define PIN_PA12__NRD			PINMUX_PIN(PIN_PA12, 3, 1)</div><div class='add'>+#define PIN_PA12__PCK0			PINMUX_PIN(PIN_PA12, 4, 1)</div><div class='add'>+#define PIN_PA12__EXT_IRQ0		PINMUX_PIN(PIN_PA12, 5, 1)</div><div class='add'>+#define PIN_PA12__TIOA3			PINMUX_PIN(PIN_PA12, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA13			13</div><div class='add'>+#define PIN_PA13__GPIO			PINMUX_PIN(PIN_PA13, 0, 0)</div><div class='add'>+#define PIN_PA13__FLEXCOM0_IO1		PINMUX_PIN(PIN_PA13, 2, 1)</div><div class='add'>+#define PIN_PA13__NCS0			PINMUX_PIN(PIN_PA13, 3, 1)</div><div class='add'>+#define PIN_PA13__PCK1			PINMUX_PIN(PIN_PA13, 4, 1)</div><div class='add'>+#define PIN_PA13__TCLK3			PINMUX_PIN(PIN_PA13, 6, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA14			14</div><div class='add'>+#define PIN_PA14__GPIO			PINMUX_PIN(PIN_PA14, 0, 0)</div><div class='add'>+#define PIN_PA14__FLEXCOM4_IO4		PINMUX_PIN(PIN_PA14, 1, 1)</div><div class='add'>+#define PIN_PA14__SDMMC0_WP		PINMUX_PIN(PIN_PA14, 2, 1)</div><div class='add'>+#define PIN_PA14__FLEXCOM3_IO0		PINMUX_PIN(PIN_PA14, 3, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PA15			15</div><div class='add'>+#define PIN_PA15__GPIO			PINMUX_PIN(PIN_PA15, 0, 0)</div><div class='add'>+#define PIN_PA15__FLEXCOM4_IO3		PINMUX_PIN(PIN_PA15, 1, 1)</div><div class='add'>+#define PIN_PA15__SDMMC0_1V8SEL		PINMUX_PIN(PIN_PA15, 2, 1)</div><div class='add'>+#define PIN_PA15__FLEXCOM3_IO1		PINMUX_PIN(PIN_PA15, 3, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PA16			16</div><div class='add'>+#define PIN_PA16__GPIO			PINMUX_PIN(PIN_PA16, 0, 0)</div><div class='add'>+#define PIN_PA16__FLEXCOM4_IO2		PINMUX_PIN(PIN_PA16, 1, 1)</div><div class='add'>+#define PIN_PA16__SDMMCo_CD		PINMUX_PIN(PIN_PA16, 2, 1)</div><div class='add'>+#define PIN_PA16__PCK2			PINMUX_PIN(PIN_PA16, 4, 1)</div><div class='add'>+#define PIN_PA16__EXT_IRQ1		PINMUX_PIN(PIN_PA16, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA17			17</div><div class='add'>+#define PIN_PA17__GPIO			PINMUX_PIN(PIN_PA17, 0, 0)</div><div class='add'>+#define PIN_PA17__FLEXCOM4_IO1		PINMUX_PIN(PIN_PA17, 1, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA18			18</div><div class='add'>+#define PIN_PA18__GPIO			PINMUX_PIN(PIN_PA18, 0, 0)</div><div class='add'>+#define PIN_PA18__FLEXCOM4_IO0		PINMUX_PIN(PIN_PA18, 1, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA19			19</div><div class='add'>+#define PIN_PA19__GPIO			PINMUX_PIN(PIN_PA19, 0, 0)</div><div class='add'>+#define PIN_PA19__TK0			PINMUX_PIN(PIN_PA19, 1, 1)</div><div class='add'>+#define PIN_PA19__FLEXCOM4_IO5		PINMUX_PIN(PIN_PA19, 3, 1)</div><div class='add'>+#define PIN_PA19__PWML0			PINMUX_PIN(PIN_PA19, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA20			20</div><div class='add'>+#define PIN_PA20__GPIO			PINMUX_PIN(PIN_PA20, 0, 0)</div><div class='add'>+#define PIN_PA20__TD0			PINMUX_PIN(PIN_PA20, 1, 1)</div><div class='add'>+#define PIN_PA20__FLEXCOM3_IO4		PINMUX_PIN(PIN_PA20, 2, 2)</div><div class='add'>+#define PIN_PA20__FLEXCOM4_IO6		PINMUX_PIN(PIN_PA20, 3, 1)</div><div class='add'>+#define PIN_PA20__PWMH0			PINMUX_PIN(PIN_PA20, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA21			21</div><div class='add'>+#define PIN_PA21__GPIO			PINMUX_PIN(PIN_PA21, 0, 0)</div><div class='add'>+#define PIN_PA21__TF0			PINMUX_PIN(PIN_PA21, 1, 1)</div><div class='add'>+#define PIN_PA21__FLEXCOM3_IO3		PINMUX_PIN(PIN_PA21, 2, 2)</div><div class='add'>+#define PIN_PA21__PWML1			PINMUX_PIN(PIN_PA21, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA22			22</div><div class='add'>+#define PIN_PA22__GPIO			PINMUX_PIN(PIN_PA22, 0, 0)</div><div class='add'>+#define PIN_PA22__RD0			PINMUX_PIN(PIN_PA22, 1, 1)</div><div class='add'>+#define PIN_PA22__FLEXCOM3_IO2		PINMUX_PIN(PIN_PA22, 2, 2)</div><div class='add'>+#define PIN_PA22__PDMC0_DS1		PINMUX_PIN(PIN_PA22, 3, 1)</div><div class='add'>+#define PIN_PA22__PWMH1			PINMUX_PIN(PIN_PA22, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA23			23</div><div class='add'>+#define PIN_PA23__GPIO			PINMUX_PIN(PIN_PA23, 0, 0)</div><div class='add'>+#define PIN_PA23__RK0			PINMUX_PIN(PIN_PA23, 1, 1)</div><div class='add'>+#define PIN_PA23__FLEXCOM3_IO1		PINMUX_PIN(PIN_PA23, 2, 2)</div><div class='add'>+#define PIN_PA23__PDMC0_CLK		PINMUX_PIN(PIN_PA23, 3, 1)</div><div class='add'>+#define PIN_PA23__PWML2			PINMUX_PIN(PIN_PA23, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA24			24</div><div class='add'>+#define PIN_PA24__GPIO			PINMUX_PIN(PIN_PA24, 0, 0)</div><div class='add'>+#define PIN_PA24__RF0			PINMUX_PIN(PIN_PA24, 1, 1)</div><div class='add'>+#define PIN_PA24__FLEXCOM3_IO0		PINMUX_PIN(PIN_PA24, 2, 2)</div><div class='add'>+#define PIN_PA24__PDMC0_DS0		PINMUX_PIN(PIN_PA24, 3, 1)</div><div class='add'>+#define PIN_PA24__PWMH2			PINMUX_PIN(PIN_PA24, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PA25			25</div><div class='add'>+#define PIN_PA25__GPIO			PINMUX_PIN(PIN_PA25, 0, 0)</div><div class='add'>+#define PIN_PA25__G0_TXCTL		PINMUX_PIN(PIN_PA25, 1, 1)</div><div class='add'>+#define PIN_PA25__FLEXCOM6_IO2		PINMUX_PIN(PIN_PA25, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA26			26</div><div class='add'>+#define PIN_PA26__GPIO			PINMUX_PIN(PIN_PA26, 0, 0)</div><div class='add'>+#define PIN_PA26__G0_TX0		PINMUX_PIN(PIN_PA26, 1, 1)</div><div class='add'>+#define PIN_PA26__FLEXCOM6_IO3		PINMUX_PIN(PIN_PA26, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA27			27</div><div class='add'>+#define PIN_PA27__GPIO			PINMUX_PIN(PIN_PA27, 0, 0)</div><div class='add'>+#define PIN_PA27__G0_TX1		PINMUX_PIN(PIN_PA27, 1, 1)</div><div class='add'>+#define PIN_PA27__FLEXCOM6_IO4		PINMUX_PIN(PIN_PA27, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA28			28</div><div class='add'>+#define PIN_PA28__GPIO			PINMUX_PIN(PIN_PA28, 0, 0)</div><div class='add'>+#define PIN_PA28__G0_RXCTL		PINMUX_PIN(PIN_PA28, 1, 1)</div><div class='add'>+#define PIN_PA28__FLEXCOM6_IO0		PINMUX_PIN(PIN_PA28, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA29			29</div><div class='add'>+#define PIN_PA29__GPIO			PINMUX_PIN(PIN_PA29, 0, 0)</div><div class='add'>+#define PIN_PA29__G0_RX0		PINMUX_PIN(PIN_PA29, 1, 1)</div><div class='add'>+#define PIN_PA29__FLEXCOM6_IO1		PINMUX_PIN(PIN_PA29, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA30			30</div><div class='add'>+#define PIN_PA30__GPIO			PINMUX_PIN(PIN_PA30, 0, 0)</div><div class='add'>+#define PIN_PA30__G0_RX1		PINMUX_PIN(PIN_PA30, 1, 1)</div><div class='add'>+#define PIN_PA30__FLEXCOM8_IO0		PINMUX_PIN(PIN_PA30, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PA31			31</div><div class='add'>+#define PIN_PA31__GPIO			PINMUX_PIN(PIN_PA31, 0, 0)</div><div class='add'>+#define PIN_PA31__G0_MDC		PINMUX_PIN(PIN_PA31, 1, 1)</div><div class='add'>+#define PIN_PA31__FLEXCOM8_IO1		PINMUX_PIN(PIN_PA31, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB0				32</div><div class='add'>+#define PIN_PB0__GPIO			PINMUX_PIN(PIN_PB0, 0, 0)</div><div class='add'>+#define PIN_PB0__G0_MDIO		PINMUX_PIN(PIN_PB0, 1, 1)</div><div class='add'>+#define PIN_PB0__FLEXCOM8_IO3		PINMUX_PIN(PIN_PB0, 2, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB1				33</div><div class='add'>+#define PIN_PB1__GPIO			PINMUX_PIN(PIN_PB1, 0, 0)</div><div class='add'>+#define PIN_PB1__G0_REFCK		PINMUX_PIN(PIN_PB1, 1, 2)</div><div class='add'>+#define PIN_PB1__FLEXCOM8_IO2		PINMUX_PIN(PIN_PB1, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB2				34</div><div class='add'>+#define PIN_PB2__GPIO			PINMUX_PIN(PIN_PB2, 0, 0)</div><div class='add'>+#define PIN_PB2__G0_RX2			PINMUX_PIN(PIN_PB2, 1, 1)</div><div class='add'>+#define PIN_PB2__FLEXCOM8_IO4		PINMUX_PIN(PIN_PB2, 2, 1)</div><div class='add'>+#define PIN_PB2__G0_RXER		PINMUX_PIN(PIN_PB2, 3, 2)</div><div class='add'>+#define PIN_PB2__RK0			PINMUX_PIN(PIN_PB2, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB3				35</div><div class='add'>+#define PIN_PB3__GPIO			PINMUX_PIN(PIN_PB3, 0, 0)</div><div class='add'>+#define PIN_PB3__G0_RXCK		PINMUX_PIN(PIN_PB3, 1, 1)</div><div class='add'>+#define PIN_PB3__FLEXCOM10_IO2		PINMUX_PIN(PIN_PB3, 2, 2)</div><div class='add'>+#define PIN_PB3__TK0			PINMUX_PIN(PIN_PB3, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB4				36</div><div class='add'>+#define PIN_PB4__GPIO			PINMUX_PIN(PIN_PB4, 0, 0)</div><div class='add'>+#define PIN_PB4__G0_TX2			PINMUX_PIN(PIN_PB4, 1, 1)</div><div class='add'>+#define PIN_PB4__FLEXCOM10_IO3		PINMUX_PIN(PIN_PB4, 2, 2)</div><div class='add'>+#define PIN_PB4__TF0			PINMUX_PIN(PIN_PB4, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB5				37</div><div class='add'>+#define PIN_PB5__GPIO			PINMUX_PIN(PIN_PB5, 0, 0)</div><div class='add'>+#define PIN_PB5__G0_TX3			PINMUX_PIN(PIN_PB5, 1, 1)</div><div class='add'>+#define PIN_PB5__FLEXCOM10_IO4		PINMUX_PIN(PIN_PB5, 2, 1)</div><div class='add'>+#define PIN_PB5__TD0			PINMUX_PIN(PIN_PB5, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB6				38</div><div class='add'>+#define PIN_PB6__GPIO			PINMUX_PIN(PIN_PB6, 0, 0)</div><div class='add'>+#define PIN_PB6__G0_RX3			PINMUX_PIN(PIN_PB6, 1, 1)</div><div class='add'>+#define PIN_PB6__FLEXCOM10_IO0		PINMUX_PIN(PIN_PB6, 2, 2)</div><div class='add'>+#define PIN_PB6__RD0			PINMUX_PIN(PIN_PB6, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB7				39</div><div class='add'>+#define PIN_PB7__GPIO			PINMUX_PIN(PIN_PB7, 0, 0)</div><div class='add'>+#define PIN_PB7__G0_TSUCOMP		PINMUX_PIN(PIN_PB7, 1, 1)</div><div class='add'>+#define PIN_PB7__FLEXCOM10_IO1		PINMUX_PIN(PIN_PB7, 2, 2)</div><div class='add'>+#define PIN_PB7__ADTRG			PINMUX_PIN(PIN_PB7, 3, 1)</div><div class='add'>+#define PIN_PB7__RF0			PINMUX_PIN(PIN_PB7, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB8				40</div><div class='add'>+#define PIN_PB8__GPIO			PINMUX_PIN(PIN_PB8, 0, 0)</div><div class='add'>+#define PIN_PB8__QSPI0_IO3		PINMUX_PIN(PIN_PB8, 1, 1)</div><div class='add'>+#define PIN_PB8__PCK3			PINMUX_PIN(PIN_PB8, 2, 1)</div><div class='add'>+#define PIN_PB8__FLEXCOM2_IO1		PINMUX_PIN(PIN_PB8, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB9				41</div><div class='add'>+#define PIN_PB9__GPIO			PINMUX_PIN(PIN_PB9, 0, 0)</div><div class='add'>+#define PIN_PB9__QSPI0_IO2		PINMUX_PIN(PIN_PB9, 1, 1)</div><div class='add'>+#define PIN_PB9__FLEXCOM2_IO0		PINMUX_PIN(PIN_PB9, 4, 2)</div><div class='add'>+#define PIN_PB9__PWMEXTRG0		PINMUX_PIN(PIN_PB9, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB10			42</div><div class='add'>+#define PIN_PB10__GPIO			PINMUX_PIN(PIN_PB10, 0, 0)</div><div class='add'>+#define PIN_PB10__QSPI0_IO1		PINMUX_PIN(PIN_PB10, 1, 1)</div><div class='add'>+#define PIN_PB10__FLEXCOM2_IO4		PINMUX_PIN(PIN_PB10, 4, 2)</div><div class='add'>+#define PIN_PB10__PWMEXTRG1		PINMUX_PIN(PIN_PB10, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB11			43</div><div class='add'>+#define PIN_PB11__GPIO			PINMUX_PIN(PIN_PB11, 0, 0)</div><div class='add'>+#define PIN_PB11__QSPI0_IO0		PINMUX_PIN(PIN_PB11, 1, 1)</div><div class='add'>+#define PIN_PB11__FLEXCOM2_IO5		PINMUX_PIN(PIN_PB11, 4, 2)</div><div class='add'>+#define PIN_PB11__PWML3			PINMUX_PIN(PIN_PB11, 5, 1)</div><div class='add'>+#define PIN_PB11__TIOB3			PINMUX_PIN(PIN_PB11, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB12			44</div><div class='add'>+#define PIN_PB12__GPIO			PINMUX_PIN(PIN_PB12, 0, 0)</div><div class='add'>+#define PIN_PB12__QSPI0_CS		PINMUX_PIN(PIN_PB12, 1, 1)</div><div class='add'>+#define PIN_PB12__FLEXCOM2_IO3		PINMUX_PIN(PIN_PB12, 4, 2)</div><div class='add'>+#define PIN_PB12__PWMFI1		PINMUX_PIN(PIN_PB12, 6, 1)</div><div class='add'>+#define PIN_PB12__TIOA3			PINMUX_PIN(PIN_PB12, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB13			45</div><div class='add'>+#define PIN_PB13__GPIO			PINMUX_PIN(PIN_PB13, 0, 0)</div><div class='add'>+#define PIN_PB13__QSPI0_SCK		PINMUX_PIN(PIN_PB13, 1, 1)</div><div class='add'>+#define PIN_PB13__FLEXCOM2_IO2		PINMUX_PIN(PIN_PB13, 4, 2)</div><div class='add'>+#define PIN_PB13__PWMFI0		PINMUX_PIN(PIN_PB13, 5, 1)</div><div class='add'>+#define PIN_PB13__TCLK3			PINMUX_PIN(PIN_PB13, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB14			46</div><div class='add'>+#define PIN_PB14__GPIO			PINMUX_PIN(PIN_PB14, 0, 0)</div><div class='add'>+#define PIN_PB14__QSPI0_SCKN		PINMUX_PIN(PIN_PB14, 1, 1)</div><div class='add'>+#define PIN_PB14__QSPI1_SCK		PINMUX_PIN(PIN_PB14, 2, 1)</div><div class='add'>+#define PIN_PB14__I2SMCC0_CK		PINMUX_PIN(PIN_PB14, 3, 3)</div><div class='add'>+#define PIN_PB14__FLEXCOM10_IO5		PINMUX_PIN(PIN_PB14, 4, 1)</div><div class='add'>+#define PIN_PB14__PWMH3			PINMUX_PIN(PIN_PB14, 5, 1)</div><div class='add'>+#define PIN_PB14__FLEXCOM2_IO1		PINMUX_PIN(PIN_PB14, 7, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PB15			47</div><div class='add'>+#define PIN_PB15__GPIO			PINMUX_PIN(PIN_PB15, 0, 0)</div><div class='add'>+#define PIN_PB15__QSPI0_IO4		PINMUX_PIN(PIN_PB15, 1, 1)</div><div class='add'>+#define PIN_PB15__QSPI1_IO0		PINMUX_PIN(PIN_PB15, 2, 1)</div><div class='add'>+#define PIN_PB15__I2SMCC0_WS		PINMUX_PIN(PIN_PB15, 3, 3)</div><div class='add'>+#define PIN_PB15__FLEXCOM10_IO6		PINMUX_PIN(PIN_PB15, 4, 1)</div><div class='add'>+#define PIN_PB15__PWML0			PINMUX_PIN(PIN_PB15, 5, 1)</div><div class='add'>+#define PIN_PB15__TCLK4			PINMUX_PIN(PIN_PB15, 6, 2)</div><div class='add'>+#define PIN_PB15__FLEXCOM2_IO0		PINMUX_PIN(PIN_PB15, 7, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PB16			48</div><div class='add'>+#define PIN_PB16__GPIO			PINMUX_PIN(PIN_PB16, 0, 0)</div><div class='add'>+#define PIN_PB16__QSPI0_IO5		PINMUX_PIN(PIN_PB16, 1, 1)</div><div class='add'>+#define PIN_PB16__QSPI1_IO1		PINMUX_PIN(PIN_PB16, 2, 1)</div><div class='add'>+#define PIN_PB16__I2SMCC0_DIN0		PINMUX_PIN(PIN_PB16, 3, 3)</div><div class='add'>+#define PIN_PB16__FLEXCOM10_IO4		PINMUX_PIN(PIN_PB16, 4, 1)</div><div class='add'>+#define PIN_PB16__PWMH0			PINMUX_PIN(PIN_PB16, 5, 1)</div><div class='add'>+#define PIN_PB16__TIOB4			PINMUX_PIN(PIN_PB16, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB17			49</div><div class='add'>+#define PIN_PB17__GPIO			PINMUX_PIN(PIN_PB17, 0, 0)</div><div class='add'>+#define PIN_PB17__QSPI0_IO6		PINMUX_PIN(PIN_PB17, 1, 1)</div><div class='add'>+#define PIN_PB17__QSPI1_IO2		PINMUX_PIN(PIN_PB17, 2, 1)</div><div class='add'>+#define PIN_PB17__I2SMCC0_DOUT0		PINMUX_PIN(PIN_PB17, 3, 3)</div><div class='add'>+#define PIN_PB17__FLEXCOM10_IO3		PINMUX_PIN(PIN_PB17, 4, 1)</div><div class='add'>+#define PIN_PB17__PWML1			PINMUX_PIN(PIN_PB17, 5, 1)</div><div class='add'>+#define PIN_PB17__TIOA4			PINMUX_PIN(PIN_PB17, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB18			50</div><div class='add'>+#define PIN_PB18__GPIO			PINMUX_PIN(PIN_PB18, 0, 0)</div><div class='add'>+#define PIN_PB18__QSPI0_IO7		PINMUX_PIN(PIN_PB18, 1, 1)</div><div class='add'>+#define PIN_PB18__QSPI1_IO3		PINMUX_PIN(PIN_PB18, 2, 1)</div><div class='add'>+#define PIN_PB18__I2SMCC0_MCK		PINMUX_PIN(PIN_PB18, 3, 3)</div><div class='add'>+#define PIN_PB18__FLEXCOM10_IO2		PINMUX_PIN(PIN_PB18, 4, 1)</div><div class='add'>+#define PIN_PB18__PWMH1			PINMUX_PIN(PIN_PB18, 5, 1)</div><div class='add'>+#define PIN_PB18__TIOA5			PINMUX_PIN(PIN_PB18, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB19			51</div><div class='add'>+#define PIN_PB19__GPIO			PINMUX_PIN(PIN_PB19, 0, 0)</div><div class='add'>+#define PIN_PB19__QSPI0_DQS		PINMUX_PIN(PIN_PB19, 1, 1)</div><div class='add'>+#define PIN_PB19__EXT_IRQ1		PINMUX_PIN(PIN_PB19, 2, 2)</div><div class='add'>+#define PIN_PB19__PCK4			PINMUX_PIN(PIN_PB19, 3, 1)</div><div class='add'>+#define PIN_PB19__FLEXCOM10_IO1		PINMUX_PIN(PIN_PB19, 4, 1)</div><div class='add'>+#define PIN_PB19__PWML2			PINMUX_PIN(PIN_PB19, 5, 1)</div><div class='add'>+#define PIN_PB19__TIOB5			PINMUX_PIN(PIN_PB19, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB20			52</div><div class='add'>+#define PIN_PB20__GPIO			PINMUX_PIN(PIN_PB20, 0, 0)</div><div class='add'>+#define PIN_PB20__QSPI0_INT		PINMUX_PIN(PIN_PB20, 1, 1)</div><div class='add'>+#define PIN_PB20__QSPI1_CS		PINMUX_PIN(PIN_PB20, 2, 1)</div><div class='add'>+#define PIN_PB20__FLEXCOM10_IO0		PINMUX_PIN(PIN_PB20, 4, 1)</div><div class='add'>+#define PIN_PB20__PWMH2			PINMUX_PIN(PIN_PB20, 5, 1)</div><div class='add'>+#define PIN_PB20__TCLK5			PINMUX_PIN(PIN_PB20, 6, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB21			53</div><div class='add'>+#define PIN_PB21__GPIO			PINMUX_PIN(PIN_PB21, 0, 0)</div><div class='add'>+#define PIN_PB21__SDMMC1_RSTN		PINMUX_PIN(PIN_PB21, 1, 1)</div><div class='add'>+#define PIN_PB21__FLEXCOM6_IO4		PINMUX_PIN(PIN_PB21, 2, 2)</div><div class='add'>+#define PIN_PB21__TIOB2			PINMUX_PIN(PIN_PB21, 3, 2)</div><div class='add'>+#define PIN_PB21__ADTRG			PINMUX_PIN(PIN_PB21, 4, 2)</div><div class='add'>+#define PIN_PB21__EXT_IRQ0		PINMUX_PIN(PIN_PB21, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB22			54</div><div class='add'>+#define PIN_PB22__GPIO			PINMUX_PIN(PIN_PB22, 0, 0)</div><div class='add'>+#define PIN_PB22__SDMMC1_CMD		PINMUX_PIN(PIN_PB22, 1, 1)</div><div class='add'>+#define PIN_PB22__FLEXCOM6_IO3		PINMUX_PIN(PIN_PB22, 2, 2)</div><div class='add'>+#define PIN_PB22__TCLK2			PINMUX_PIN(PIN_PB22, 3, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB23			55</div><div class='add'>+#define PIN_PB23__GPIO			PINMUX_PIN(PIN_PB23, 0, 0)</div><div class='add'>+#define PIN_PB23__SDMMC1_CK		PINMUX_PIN(PIN_PB23, 1, 1)</div><div class='add'>+#define PIN_PB23__FLEXCOM6_IO2		PINMUX_PIN(PIN_PB23, 2, 2)</div><div class='add'>+#define PIN_PB23__TIOA2			PINMUX_PIN(PIN_PB23, 3, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB24			56</div><div class='add'>+#define PIN_PB24__GPIO			PINMUX_PIN(PIN_PB24, 0, 0)</div><div class='add'>+#define PIN_PB24__SDMMC1_DAT0		PINMUX_PIN(PIN_PB24, 1, 1)</div><div class='add'>+#define PIN_PB24__FLEXCOM6_IO0		PINMUX_PIN(PIN_PB24, 2, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB25			57</div><div class='add'>+#define PIN_PB25__GPIO			PINMUX_PIN(PIN_PB25, 0, 0)</div><div class='add'>+#define PIN_PB25__SDMMC1_DAT1		PINMUX_PIN(PIN_PB25, 1, 1)</div><div class='add'>+#define PIN_PB25__FLEXCOM6_IO1		PINMUX_PIN(PIN_PB25, 2, 2)</div><div class='add'>+#define PIN_PB25__TIOB2			PINMUX_PIN(PIN_PB25, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB26			58</div><div class='add'>+#define PIN_PB26__GPIO			PINMUX_PIN(PIN_PB26, 0, 0)</div><div class='add'>+#define PIN_PB26__SDMMC1_DAT2		PINMUX_PIN(PIN_PB26, 1, 1)</div><div class='add'>+#define PIN_PB26__FLEXCOM8_IO0		PINMUX_PIN(PIN_PB26, 2, 3)</div><div class='add'>+#define PIN_PB26__TCLK2			PINMUX_PIN(PIN_PB26, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB27			59</div><div class='add'>+#define PIN_PB27__GPIO			PINMUX_PIN(PIN_PB27, 0, 0)</div><div class='add'>+#define PIN_PB27__SDMMC1_DAT3		PINMUX_PIN(PIN_PB27, 1, 1)</div><div class='add'>+#define PIN_PB27__FLEXCOM8_IO1		PINMUX_PIN(PIN_PB27, 2, 3)</div><div class='add'>+#define PIN_PB27__TIOA2			PINMUX_PIN(PIN_PB27, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB28			60</div><div class='add'>+#define PIN_PB28__GPIO			PINMUX_PIN(PIN_PB28, 0, 0)</div><div class='add'>+#define PIN_PB28__SDMMC1_WP		PINMUX_PIN(PIN_PB28, 1, 1)</div><div class='add'>+#define PIN_PB28__FLEXCOM1_IO0		PINMUX_PIN(PIN_PB28, 3, 3)</div><div class='add'>+#define PIN_PB28__D15			PINMUX_PIN(PIN_PB28, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB29			61</div><div class='add'>+#define PIN_PB29__GPIO			PINMUX_PIN(PIN_PB29, 0, 0)</div><div class='add'>+#define PIN_PB29__SDMMC1_CD		PINMUX_PIN(PIN_PB29, 1, 1)</div><div class='add'>+#define PIN_PB29__I2SMCC0_MCK		PINMUX_PIN(PIN_PB29, 2, 1)</div><div class='add'>+#define PIN_PB29__FLEXCOM1_IO1		PINMUX_PIN(PIN_PB29, 3, 3)</div><div class='add'>+#define PIN_PB29__D14			PINMUX_PIN(PIN_PB29, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PB30			62</div><div class='add'>+#define PIN_PB30__GPIO			PINMUX_PIN(PIN_PB30, 0, 0)</div><div class='add'>+#define PIN_PB30__SDMMC1_1V8SEL		PINMUX_PIN(PIN_PB30, 1, 1)</div><div class='add'>+#define PIN_PB30__I2SMCC1_MCK		PINMUX_PIN(PIN_PB30, 2, 2)</div><div class='add'>+#define PIN_PB30__FLEXCOM1_IO2		PINMUX_PIN(PIN_PB30, 3, 3)</div><div class='add'>+#define PIN_PB30__TIOA1			PINMUX_PIN(PIN_PB30, 4, 1)</div><div class='add'>+#define PIN_PB30__NCS1			PINMUX_PIN(PIN_PB30, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PB31			63</div><div class='add'>+#define PIN_PB31__GPIO			PINMUX_PIN(PIN_PB31, 0, 0)</div><div class='add'>+#define PIN_PB31__PCK7			PINMUX_PIN(PIN_PB31, 1, 2)</div><div class='add'>+#define PIN_PB31__I2SMCC1_DIN1		PINMUX_PIN(PIN_PB31, 2, 1)</div><div class='add'>+#define PIN_PB31__FLEXCOM1_IO3		PINMUX_PIN(PIN_PB31, 3, 3)</div><div class='add'>+#define PIN_PB31__TCLK1			PINMUX_PIN(PIN_PB31, 4, 1)</div><div class='add'>+#define PIN_PB31__NWE			PINMUX_PIN(PIN_PB31, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC0				64</div><div class='add'>+#define PIN_PC0__GPIO			PINMUX_PIN(PIN_PC0, 0, 0)</div><div class='add'>+#define PIN_PC0__PCK6			PINMUX_PIN(PIN_PC0, 1, 2)</div><div class='add'>+#define PIN_PC0__I2SMCC1_DIN2		PINMUX_PIN(PIN_PC0, 2, 1)</div><div class='add'>+#define PIN_PC0__FLEXCOM9_IO4		PINMUX_PIN(PIN_PC0, 3, 2)</div><div class='add'>+#define PIN_PC0__TIOB1			PINMUX_PIN(PIN_PC0, 4, 1)</div><div class='add'>+#define PIN_PC0__NWR1			PINMUX_PIN(PIN_PC0, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC1				65</div><div class='add'>+#define PIN_PC1__GPIO			PINMUX_PIN(PIN_PC1, 0, 0)</div><div class='add'>+#define PIN_PC1__PCK5			PINMUX_PIN(PIN_PC1, 1, 1)</div><div class='add'>+#define PIN_PC1__FLEXCOM9_IO2		PINMUX_PIN(PIN_PC1, 3, 2)</div><div class='add'>+#define PIN_PC1__SMCK			PINMUX_PIN(PIN_PC1, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC2				66</div><div class='add'>+#define PIN_PC2__GPIO			PINMUX_PIN(PIN_PC2, 0, 0)</div><div class='add'>+#define PIN_PC2__EXT_IRQ0		PINMUX_PIN(PIN_PC2, 1, 3)</div><div class='add'>+#define PIN_PC2__FLEXCOM9_IO3		PINMUX_PIN(PIN_PC2, 3, 2)</div><div class='add'>+#define PIN_PC2__A11			PINMUX_PIN(PIN_PC2, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC3				67</div><div class='add'>+#define PIN_PC3__GPIO			PINMUX_PIN(PIN_PC3, 0, 0)</div><div class='add'>+#define PIN_PC3__SPDIF_RX		PINMUX_PIN(PIN_PC3, 1, 2)</div><div class='add'>+#define PIN_PC3__FLEXCOM9_IO0		PINMUX_PIN(PIN_PC3, 3, 2)</div><div class='add'>+#define PIN_PC3__FLEXCOM0_IO4		PINMUX_PIN(PIN_PC3, 4, 2)</div><div class='add'>+#define PIN_PC3__A10			PINMUX_PIN(PIN_PC3, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC4				68</div><div class='add'>+#define PIN_PC4__GPIO			PINMUX_PIN(PIN_PC4, 0, 0)</div><div class='add'>+#define PIN_PC4__SPDIF_TX		PINMUX_PIN(PIN_PC4, 1, 2)</div><div class='add'>+#define PIN_PC4__FLEXCOM9_IO1		PINMUX_PIN(PIN_PC4, 3, 2)</div><div class='add'>+#define PIN_PC4__FLEXCOM0_IO3		PINMUX_PIN(PIN_PC4, 4, 2)</div><div class='add'>+#define PIN_PC4__D0			PINMUX_PIN(PIN_PC4, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC5				69</div><div class='add'>+#define PIN_PC5__GPIO			PINMUX_PIN(PIN_PC5, 0, 0)</div><div class='add'>+#define PIN_PC5__I3CC_SDASPUE		PINMUX_PIN(PIN_PC5, 1, 1)</div><div class='add'>+#define PIN_PC5__I2SMCC1_DIN3		PINMUX_PIN(PIN_PC5, 2, 1)</div><div class='add'>+#define PIN_PC5__FLEXCOM0_IO2		PINMUX_PIN(PIN_PC5, 4, 2)</div><div class='add'>+#define PIN_PC5__D1			PINMUX_PIN(PIN_PC5, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC6				70</div><div class='add'>+#define PIN_PC6__GPIO			PINMUX_PIN(PIN_PC6, 0, 0)</div><div class='add'>+#define PIN_PC6__I3CC_SCL		PINMUX_PIN(PIN_PC6, 1, 1)</div><div class='add'>+#define PIN_PC6__FLEXCOM0_IO1		PINMUX_PIN(PIN_PC6, 4, 2)</div><div class='add'>+#define PIN_PC6__D4			PINMUX_PIN(PIN_PC6, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC7				71</div><div class='add'>+#define PIN_PC7__GPIO			PINMUX_PIN(PIN_PC7, 0, 0)</div><div class='add'>+#define PIN_PC7__I3CC_SDA		PINMUX_PIN(PIN_PC7, 1, 1)</div><div class='add'>+#define PIN_PC7__FLEXCOM0_IO0		PINMUX_PIN(PIN_PC7, 4, 2)</div><div class='add'>+#define PIN_PC7__D5			PINMUX_PIN(PIN_PC7, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC8				72</div><div class='add'>+#define PIN_PC8__GPIO			PINMUX_PIN(PIN_PC8, 0, 0)</div><div class='add'>+#define PIN_PC8__I2SMCC0_DIN1		PINMUX_PIN(PIN_PC8, 1, 1)</div><div class='add'>+#define PIN_PC8__PDMC0_DS1		PINMUX_PIN(PIN_PC8, 2, 2)</div><div class='add'>+#define PIN_PC8__I2SMCC1_DOUT1		PINMUX_PIN(PIN_PC8, 3, 1)</div><div class='add'>+#define PIN_PC8__FLEXCOM9_IO0		PINMUX_PIN(PIN_PC8, 4, 1)</div><div class='add'>+#define PIN_PC8__D6			PINMUX_PIN(PIN_PC8, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC9				73</div><div class='add'>+#define PIN_PC9__GPIO			PINMUX_PIN(PIN_PC9, 0, 0)</div><div class='add'>+#define PIN_PC9__I2SMCC0_DIN2		PINMUX_PIN(PIN_PC9, 1, 1)</div><div class='add'>+#define PIN_PC9__PDMC0_CLK		PINMUX_PIN(PIN_PC9, 2, 2)</div><div class='add'>+#define PIN_PC9__I2SMCC1_DOUT2		PINMUX_PIN(PIN_PC9, 3, 1)</div><div class='add'>+#define PIN_PC9__FLEXCOM9_IO1		PINMUX_PIN(PIN_PC9, 4, 1)</div><div class='add'>+#define PIN_PC9__D7			PINMUX_PIN(PIN_PC9, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC10			74</div><div class='add'>+#define PIN_PC10__GPIO			PINMUX_PIN(PIN_PC10, 0, 0)</div><div class='add'>+#define PIN_PC10__I2SMCC0_DIN3		PINMUX_PIN(PIN_PC10, 1, 1)</div><div class='add'>+#define PIN_PC10__PDMC0_DS0		PINMUX_PIN(PIN_PC10, 2, 2)</div><div class='add'>+#define PIN_PC10__I2SMCC1_DOUT3		PINMUX_PIN(PIN_PC10, 3, 1)</div><div class='add'>+#define PIN_PC10__FLEXCOM9_IO2		PINMUX_PIN(PIN_PC10, 4, 1)</div><div class='add'>+#define PIN_PC10__D2			PINMUX_PIN(PIN_PC10, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC11			75</div><div class='add'>+#define PIN_PC11__GPIO			PINMUX_PIN(PIN_PC11, 0, 0)</div><div class='add'>+#define PIN_PC11__I2SMCC0_DOUT1		PINMUX_PIN(PIN_PC11, 1, 1)</div><div class='add'>+#define PIN_PC11__PDMC1_DS0		PINMUX_PIN(PIN_PC11, 2, 1)</div><div class='add'>+#define PIN_PC11__FLEXCOM9_IO3		PINMUX_PIN(PIN_PC11, 4, 1)</div><div class='add'>+#define PIN_PC10__D3			PINMUX_PIN(PIN_PC10, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PC12			76</div><div class='add'>+#define PIN_PC12__GPIO			PINMUX_PIN(PIN_PC12, 0, 0)</div><div class='add'>+#define PIN_PC12__I2SMCC0_DOUT2		PINMUX_PIN(PIN_PC12, 1, 1)</div><div class='add'>+#define PIN_PC12__PDMC1_CLK		PINMUX_PIN(PIN_PC12, 2, 1)</div><div class='add'>+#define PIN_PC12__FLEXCOM9_IO4		PINMUX_PIN(PIN_PC12, 4, 1)</div><div class='add'>+#define PIN_PC12__A9			PINMUX_PIN(PIN_PC12, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC13			77</div><div class='add'>+#define PIN_PC13__GPIO			PINMUX_PIN(PIN_PC13, 0, 0)</div><div class='add'>+#define PIN_PC13__I2SMCC0_DOUT3		PINMUX_PIN(PIN_PC13, 1, 1)</div><div class='add'>+#define PIN_PC13__PDMC1_DS1		PINMUX_PIN(PIN_PC13, 2, 1)</div><div class='add'>+#define PIN_PC13__A8			PINMUX_PIN(PIN_PC13, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC14			78</div><div class='add'>+#define PIN_PC14__GPIO			PINMUX_PIN(PIN_PC14, 0, 0)</div><div class='add'>+#define PIN_PC14__I2SMCC1_DIN0		PINMUX_PIN(PIN_PC14, 1, 1)</div><div class='add'>+#define PIN_PC14__SPDIF_RX		PINMUX_PIN(PIN_PC14, 2, 3)</div><div class='add'>+#define PIN_PC14__FLEXCOM1_IO0		PINMUX_PIN(PIN_PC14, 3, 2)</div><div class='add'>+#define PIN_PC14__A7			PINMUX_PIN(PIN_PC14, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC15			79</div><div class='add'>+#define PIN_PC15__GPIO			PINMUX_PIN(PIN_PC15, 0, 0)</div><div class='add'>+#define PIN_PC15__I2SMCC1_WS		PINMUX_PIN(PIN_PC15, 1, 1)</div><div class='add'>+#define PIN_PC15__PDMC1_DS1		PINMUX_PIN(PIN_PC15, 2, 2)</div><div class='add'>+#define PIN_PC15__FLEXCOM1_IO1		PINMUX_PIN(PIN_PC15, 3, 2)</div><div class='add'>+#define PIN_PC15__A6			PINMUX_PIN(PIN_PC15, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC16			80</div><div class='add'>+#define PIN_PC16__GPIO			PINMUX_PIN(PIN_PC16, 0, 0)</div><div class='add'>+#define PIN_PC16__I2SMCC1_CK		PINMUX_PIN(PIN_PC16, 1, 1)</div><div class='add'>+#define PIN_PC16__PDMC1_CLK		PINMUX_PIN(PIN_PC16, 2, 2)</div><div class='add'>+#define PIN_PC16__FLEXCOM1_IO2		PINMUX_PIN(PIN_PC16, 3, 2)</div><div class='add'>+#define PIN_PC16__TIOA1			PINMUX_PIN(PIN_PC16, 4, 2)</div><div class='add'>+#define PIN_PC16__A5			PINMUX_PIN(PIN_PC16, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC17			81</div><div class='add'>+#define PIN_PC17__GPIO			PINMUX_PIN(PIN_PC17, 0, 0)</div><div class='add'>+#define PIN_PC17__I2SMCC1_DOUT0		PINMUX_PIN(PIN_PC17, 1, 1)</div><div class='add'>+#define PIN_PC17__PDMC1_DS0		PINMUX_PIN(PIN_PC17, 2, 2)</div><div class='add'>+#define PIN_PC17__FLEXCOM1_IO3		PINMUX_PIN(PIN_PC17, 3, 2)</div><div class='add'>+#define PIN_PC17__TCLK1			PINMUX_PIN(PIN_PC17, 4, 2)</div><div class='add'>+#define PIN_PC17__A4			PINMUX_PIN(PIN_PC17, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC18			82</div><div class='add'>+#define PIN_PC18__GPIO			PINMUX_PIN(PIN_PC18, 0, 0)</div><div class='add'>+#define PIN_PC18__I2SMCC0_DIN0		PINMUX_PIN(PIN_PC18, 1, 1)</div><div class='add'>+#define PIN_PC18__SPDIF_TX		PINMUX_PIN(PIN_PC18, 2, 3)</div><div class='add'>+#define PIN_PC18__FLEXCOM1_IO4		PINMUX_PIN(PIN_PC18, 3, 2)</div><div class='add'>+#define PIN_PC18__TIOB1			PINMUX_PIN(PIN_PC18, 4, 2)</div><div class='add'>+#define PIN_PC18__A3			PINMUX_PIN(PIN_PC18, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC19			83</div><div class='add'>+#define PIN_PC19__GPIO			PINMUX_PIN(PIN_PC19, 0, 0)</div><div class='add'>+#define PIN_PC19__I2SMCC0_WS		PINMUX_PIN(PIN_PC19, 1, 1)</div><div class='add'>+#define PIN_PC19__PCK6			PINMUX_PIN(PIN_PC19, 2, 1)</div><div class='add'>+#define PIN_PC19__A2			PINMUX_PIN(PIN_PC19, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC20			84</div><div class='add'>+#define PIN_PC20__GPIO			PINMUX_PIN(PIN_PC20, 0, 0)</div><div class='add'>+#define PIN_PC20__I2SMCC0_DOUT0		PINMUX_PIN(PIN_PC20, 1, 1)</div><div class='add'>+#define PIN_PC20__A1			PINMUX_PIN(PIN_PC20, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC21			85</div><div class='add'>+#define PIN_PC21__GPIO			PINMUX_PIN(PIN_PC21, 0, 0)</div><div class='add'>+#define PIN_PC21__I2SMCC0_CK		PINMUX_PIN(PIN_PC21, 1, 1)</div><div class='add'>+#define PIN_PC21__PCK7			PINMUX_PIN(PIN_PC21, 2, 1)</div><div class='add'>+#define PIN_PC21__A0			PINMUX_PIN(PIN_PC21, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC22			86</div><div class='add'>+#define PIN_PC22__GPIO			PINMUX_PIN(PIN_PC22, 0, 0)</div><div class='add'>+#define PIN_PC22__NTRST			PINMUX_PIN(PIN_PC22, 1, 1)</div><div class='add'>+#define PIN_PC22__NWAIT			PINMUX_PIN(PIN_PC22, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC23			87</div><div class='add'>+#define PIN_PC23__GPIO			PINMUX_PIN(PIN_PC23, 0, 0)</div><div class='add'>+#define PIN_PC23__TCK_SWCLK		PINMUX_PIN(PIN_PC23, 1, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC24			88</div><div class='add'>+#define PIN_PC24__GPIO			PINMUX_PIN(PIN_PC24, 0, 0)</div><div class='add'>+#define PIN_PC24__TMS_SWDIO		PINMUX_PIN(PIN_PC24, 1, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC25			89</div><div class='add'>+#define PIN_PC25__GPIO			PINMUX_PIN(PIN_PC25, 0, 0)</div><div class='add'>+#define PIN_PC25__TDI			PINMUX_PIN(PIN_PC25, 1, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC26			90</div><div class='add'>+#define PIN_PC26__GPIO			PINMUX_PIN(PIN_PC26, 0, 0)</div><div class='add'>+#define PIN_PC26__TDO			PINMUX_PIN(PIN_PC26, 1, 1)</div><div class='add'>+#define PIN_PC26__A15			PINMUX_PIN(PIN_PC26, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC27			91</div><div class='add'>+#define PIN_PC27__GPIO			PINMUX_PIN(PIN_PC27, 0, 0)</div><div class='add'>+#define PIN_PC27__SDMMC2_CMD		PINMUX_PIN(PIN_PC27, 1, 1)</div><div class='add'>+#define PIN_PC27__FLEXCOM8_IO0		PINMUX_PIN(PIN_PC27, 2, 2)</div><div class='add'>+#define PIN_PC27__TD1			PINMUX_PIN(PIN_PC27, 4, 2)</div><div class='add'>+#define PIN_PC27__D8			PINMUX_PIN(PIN_PC27, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC28			92</div><div class='add'>+#define PIN_PC28__GPIO			PINMUX_PIN(PIN_PC28, 0, 0)</div><div class='add'>+#define PIN_PC28__SDMMC2_CK		PINMUX_PIN(PIN_PC28, 1, 1)</div><div class='add'>+#define PIN_PC28__FLEXCOM8_IO1		PINMUX_PIN(PIN_PC28, 2, 2)</div><div class='add'>+#define PIN_PC28__TF1			PINMUX_PIN(PIN_PC28, 4, 2)</div><div class='add'>+#define PIN_PC28__D9			PINMUX_PIN(PIN_PC28, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC29			93</div><div class='add'>+#define PIN_PC29__GPIO			PINMUX_PIN(PIN_PC29, 0, 0)</div><div class='add'>+#define PIN_PC29__SDMMC2_DAT0		PINMUX_PIN(PIN_PC29, 1, 1)</div><div class='add'>+#define PIN_PC29__FLEXCOM8_IO2		PINMUX_PIN(PIN_PC29, 2, 2)</div><div class='add'>+#define PIN_PC29__TK1			PINMUX_PIN(PIN_PC29, 4, 2)</div><div class='add'>+#define PIN_PC29__D10			PINMUX_PIN(PIN_PC29, 5, 1)</div><div class='add'>+#define PIN_PC29__TCLK0			PINMUX_PIN(PIN_PC29, 6, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC30			94</div><div class='add'>+#define PIN_PC30__GPIO			PINMUX_PIN(PIN_PC30, 0, 0)</div><div class='add'>+#define PIN_PC30__SDMMC2_DAT1		PINMUX_PIN(PIN_PC30, 1, 1)</div><div class='add'>+#define PIN_PC30__FLEXCOM8_IO3		PINMUX_PIN(PIN_PC30, 2, 2)</div><div class='add'>+#define PIN_PC30__RD1			PINMUX_PIN(PIN_PC30, 4, 2)</div><div class='add'>+#define PIN_PC30__D11			PINMUX_PIN(PIN_PC30, 5, 1)</div><div class='add'>+#define PIN_PC30__TIOA0			PINMUX_PIN(PIN_PC30, 6, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PC31			95</div><div class='add'>+#define PIN_PC31__GPIO			PINMUX_PIN(PIN_PC31, 0, 0)</div><div class='add'>+#define PIN_PC31__SDMMC2_DAT2		PINMUX_PIN(PIN_PC31, 1, 1)</div><div class='add'>+#define PIN_PC31__FLEXCOM8_IO4		PINMUX_PIN(PIN_PC31, 2, 2)</div><div class='add'>+#define PIN_PC31__PCK0			PINMUX_PIN(PIN_PC31, 3, 2)</div><div class='add'>+#define PIN_PC31__RK1			PINMUX_PIN(PIN_PC31, 4, 2)</div><div class='add'>+#define PIN_PC31__D12			PINMUX_PIN(PIN_PC31, 5, 1)</div><div class='add'>+#define PIN_PC31__TIOB0			PINMUX_PIN(PIN_PC31, 6, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD0				96</div><div class='add'>+#define PIN_PD0__GPIO			PINMUX_PIN(PIN_PD0, 0, 0)</div><div class='add'>+#define PIN_PD0__SDMMC2_DAT3		PINMUX_PIN(PIN_PD0, 1, 1)</div><div class='add'>+#define PIN_PD0__PCK1			PINMUX_PIN(PIN_PD0, 3, 2)</div><div class='add'>+#define PIN_PD0__RF1			PINMUX_PIN(PIN_PD0, 4, 2)</div><div class='add'>+#define PIN_PD0__D13			PINMUX_PIN(PIN_PD0, 5, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD1				97</div><div class='add'>+#define PIN_PD1__GPIO			PINMUX_PIN(PIN_PD1, 0, 0)</div><div class='add'>+#define PIN_PD1__SDMMC2_WP		PINMUX_PIN(PIN_PD1, 1, 1)</div><div class='add'>+#define PIN_PD1__FLEXCOM1_IO5		PINMUX_PIN(PIN_PD1, 2, 1)</div><div class='add'>+#define PIN_PD1__LCDC_HSYNC		PINMUX_PIN(PIN_PD1, 3, 2)</div><div class='add'>+#define PIN_PD1__FLEXCOM3_IO0		PINMUX_PIN(PIN_PD1, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD2				98</div><div class='add'>+#define PIN_PD2__GPIO			PINMUX_PIN(PIN_PD2, 0, 0)</div><div class='add'>+#define PIN_PD2__SDMMC2_CD		PINMUX_PIN(PIN_PD2, 1, 1)</div><div class='add'>+#define PIN_PD2__FLEXCOM1_IO6		PINMUX_PIN(PIN_PD2, 2, 1)</div><div class='add'>+#define PIN_PD2__LCDC_VSYNC		PINMUX_PIN(PIN_PD2, 3, 2)</div><div class='add'>+#define PIN_PD2__FLEXCOM3_IO1		PINMUX_PIN(PIN_PD2, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD3				99</div><div class='add'>+#define PIN_PD3__GPIO			PINMUX_PIN(PIN_PD3, 0, 0)</div><div class='add'>+#define PIN_PD3__SDMMC2_1V8SEL		PINMUX_PIN(PIN_PD3, 1, 1)</div><div class='add'>+#define PIN_PD3__FLEXCOM1_IO4		PINMUX_PIN(PIN_PD3, 2, 1)</div><div class='add'>+#define PIN_PD3__TIOA0			PINMUX_PIN(PIN_PD3, 3, 2)</div><div class='add'>+#define PIN_PD3__FLEXCOM3_IO2		PINMUX_PIN(PIN_PD3, 4, 3)</div><div class='add'>+#define PIN_PD3__EXT_IRQ1		PINMUX_PIN(PIN_PD3, 5, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD4				100</div><div class='add'>+#define PIN_PD4__GPIO			PINMUX_PIN(PIN_PD4, 0, 0)</div><div class='add'>+#define PIN_PD4__LCDC_HSYNC		PINMUX_PIN(PIN_PD4, 1, 1)</div><div class='add'>+#define PIN_PD4__FLEXCOM1_IO2		PINMUX_PIN(PIN_PD4, 2, 1)</div><div class='add'>+#define PIN_PD4__TIOB0			PINMUX_PIN(PIN_PD4, 3, 2)</div><div class='add'>+#define PIN_PD4__FLEXCOM7_IO1		PINMUX_PIN(PIN_PD4, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD5				101</div><div class='add'>+#define PIN_PD5__GPIO			PINMUX_PIN(PIN_PD5, 0, 0)</div><div class='add'>+#define PIN_PD5__LCDC_VSYNC		PINMUX_PIN(PIN_PD5, 1, 1)</div><div class='add'>+#define PIN_PD5__FLEXCOM1_IO3		PINMUX_PIN(PIN_PD5, 2, 1)</div><div class='add'>+#define PIN_PD5__TCLK0			PINMUX_PIN(PIN_PD5, 3, 2)</div><div class='add'>+#define PIN_PD5__FLEXCOM7_IO0		PINMUX_PIN(PIN_PD5, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD6				102</div><div class='add'>+#define PIN_PD6__GPIO			PINMUX_PIN(PIN_PD6, 0, 0)</div><div class='add'>+#define PIN_PD6__LCDC_PWM		PINMUX_PIN(PIN_PD6, 1, 1)</div><div class='add'>+#define PIN_PD6__FLEXCOM1_IO1		PINMUX_PIN(PIN_PD6, 2, 1)</div><div class='add'>+#define PIN_PD6__FLEXCOM7_IO2		PINMUX_PIN(PIN_PD6, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD7				103</div><div class='add'>+#define PIN_PD7__GPIO			PINMUX_PIN(PIN_PD7, 0, 0)</div><div class='add'>+#define PIN_PD7__LCDC_DISP		PINMUX_PIN(PIN_PD7, 1, 1)</div><div class='add'>+#define PIN_PD7__FLEXCOM1_IO0		PINMUX_PIN(PIN_PD7, 2, 1)</div><div class='add'>+#define PIN_PD7__FLEXCOM7_IO3		PINMUX_PIN(PIN_PD7, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD8				104</div><div class='add'>+#define PIN_PD8__GPIO			PINMUX_PIN(PIN_PD8, 0, 0)</div><div class='add'>+#define PIN_PD8__CANTX0			PINMUX_PIN(PIN_PD8, 1, 1)</div><div class='add'>+#define PIN_PD8__FLEXCOM7_IO0		PINMUX_PIN(PIN_PD8, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD9				105</div><div class='add'>+#define PIN_PD9__GPIO			PINMUX_PIN(PIN_PD9, 0, 0)</div><div class='add'>+#define PIN_PD9__CANRX0			PINMUX_PIN(PIN_PD9, 1, 1)</div><div class='add'>+#define PIN_PD9__FLEXCOM7_IO1		PINMUX_PIN(PIN_PD9, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD10			106</div><div class='add'>+#define PIN_PD10__GPIO			PINMUX_PIN(PIN_PD10, 0, 0)</div><div class='add'>+#define PIN_PD10__CANTX1		PINMUX_PIN(PIN_PD10, 1, 1)</div><div class='add'>+#define PIN_PD10__FLEXCOM7_IO2		PINMUX_PIN(PIN_PD10, 2, 1)</div><div class='add'>+#define PIN_PD10__TIOA1			PINMUX_PIN(PIN_PD10, 3, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD11			107</div><div class='add'>+#define PIN_PD11__GPIO			PINMUX_PIN(PIN_PD11, 0, 0)</div><div class='add'>+#define PIN_PD11__CANRX1		PINMUX_PIN(PIN_PD11, 1, 1)</div><div class='add'>+#define PIN_PD11__FLEXCOM7_IO3		PINMUX_PIN(PIN_PD11, 2, 1)</div><div class='add'>+#define PIN_PD11__TCLK1			PINMUX_PIN(PIN_PD11, 3, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD12			108</div><div class='add'>+#define PIN_PD12__GPIO			PINMUX_PIN(PIN_PD12, 0, 0)</div><div class='add'>+#define PIN_PD12__CANTX2		PINMUX_PIN(PIN_PD12, 1, 1)</div><div class='add'>+#define PIN_PD12__FLEXCOM7_IO4		PINMUX_PIN(PIN_PD12, 2, 1)</div><div class='add'>+#define PIN_PD12__TIOB1			PINMUX_PIN(PIN_PD12, 3, 3)</div><div class='add'>+#define PIN_PD12__PCK2			PINMUX_PIN(PIN_PD12, 4, 2)</div><div class='add'>+#define PIN_PD12__FLEXCOM3_IO3		PINMUX_PIN(PIN_PD12, 5, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD13			109</div><div class='add'>+#define PIN_PD13__GPIO			PINMUX_PIN(PIN_PD13, 0, 0)</div><div class='add'>+#define PIN_PD13__CANRX2		PINMUX_PIN(PIN_PD13, 1, 1)</div><div class='add'>+#define PIN_PD13__FLEXCOM5_IO4		PINMUX_PIN(PIN_PD13, 2, 1)</div><div class='add'>+#define PIN_PD13__TIOA2			PINMUX_PIN(PIN_PD13, 3, 3)</div><div class='add'>+#define PIN_PD13__PCK3			PINMUX_PIN(PIN_PD13, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD14			110</div><div class='add'>+#define PIN_PD14__GPIO			PINMUX_PIN(PIN_PD14, 0, 0)</div><div class='add'>+#define PIN_PD14__CANTX3		PINMUX_PIN(PIN_PD14, 1, 1)</div><div class='add'>+#define PIN_PD14__FLEXCOM5_IO2		PINMUX_PIN(PIN_PD14, 2, 1)</div><div class='add'>+#define PIN_PD14__TIOB2			PINMUX_PIN(PIN_PD14, 3, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD15			111</div><div class='add'>+#define PIN_PD15__GPIO			PINMUX_PIN(PIN_PD15, 0, 0)</div><div class='add'>+#define PIN_PD15__CANRX3		PINMUX_PIN(PIN_PD15, 1, 1)</div><div class='add'>+#define PIN_PD15__FLEXCOM5_IO3		PINMUX_PIN(PIN_PD15, 2, 1)</div><div class='add'>+#define PIN_PD15__TCLK2			PINMUX_PIN(PIN_PD15, 3, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD16			112</div><div class='add'>+#define PIN_PD16__GPIO			PINMUX_PIN(PIN_PD16, 0, 0)</div><div class='add'>+#define PIN_PD16__CANTX4		PINMUX_PIN(PIN_PD16, 1, 1)</div><div class='add'>+#define PIN_PD16__FLEXCOM5_IO0		PINMUX_PIN(PIN_PD16, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD17			113</div><div class='add'>+#define PIN_PD17__GPIO			PINMUX_PIN(PIN_PD17, 0, 0)</div><div class='add'>+#define PIN_PD17__CANRX4		PINMUX_PIN(PIN_PD17, 1, 1)</div><div class='add'>+#define PIN_PD17__FLEXCOM5_IO1		PINMUX_PIN(PIN_PD17, 2, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD18			114</div><div class='add'>+#define PIN_PD18__GPIO			PINMUX_PIN(PIN_PD18, 0, 0)</div><div class='add'>+#define PIN_PD18__FLEXCOM6_IO0		PINMUX_PIN(PIN_PD18, 2, 4)</div><div class='add'>+#define PIN_PD18__CANTX1		PINMUX_PIN(PIN_PD18, 3, 2)</div><div class='add'>+#define PIN_PD18__PCK4			PINMUX_PIN(PIN_PD18, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD19			115</div><div class='add'>+#define PIN_PD19__GPIO			PINMUX_PIN(PIN_PD19, 0, 0)</div><div class='add'>+#define PIN_PD19__FLEXCOM6_IO1		PINMUX_PIN(PIN_PD19, 2, 4)</div><div class='add'>+#define PIN_PD19__CANRX1		PINMUX_PIN(PIN_PD19, 3, 2)</div><div class='add'>+#define PIN_PD19__PCK2			PINMUX_PIN(PIN_PD19, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD20			116</div><div class='add'>+#define PIN_PD20__GPIO			PINMUX_PIN(PIN_PD20, 0, 0)</div><div class='add'>+#define PIN_PD20__PFLEXCOM6_IO2		PINMUX_PIN(PIN_PD20, 2, 4)</div><div class='add'>+#define PIN_PD20__I2SMCC1_MCK		PINMUX_PIN(PIN_PD20, 3, 2)</div><div class='add'>+#define PIN_PD20__PCK3			PINMUX_PIN(PIN_PD20, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD21			117</div><div class='add'>+#define PIN_PD21__GPIO			PINMUX_PIN(PIN_PD21, 0, 0)</div><div class='add'>+#define PIN_PD21__G1_TXCTL		PINMUX_PIN(PIN_PD21, 1, 2)</div><div class='add'>+#define PIN_PD21__FLEXCOM6_IO2		PINMUX_PIN(PIN_PD21, 2, 3)</div><div class='add'>+#define PIN_PD21__TK1			PINMUX_PIN(PIN_PD21, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD22			118</div><div class='add'>+#define PIN_PD22__GPIO			PINMUX_PIN(PIN_PD22, 0, 0)</div><div class='add'>+#define PIN_PD22__G1_TX0		PINMUX_PIN(PIN_PD22, 1, 1)</div><div class='add'>+#define PIN_PD22__FLEXCOM6_IO3		PINMUX_PIN(PIN_PD22, 2, 3)</div><div class='add'>+#define PIN_PD22__TF1			PINMUX_PIN(PIN_PD22, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD23			119</div><div class='add'>+#define PIN_PD23__GPIO			PINMUX_PIN(PIN_PD23, 0, 0)</div><div class='add'>+#define PIN_PD23__G1_TX1		PINMUX_PIN(PIN_PD23, 1, 1)</div><div class='add'>+#define PIN_PD23__FLEXCOM6_IO4		PINMUX_PIN(PIN_PD23, 2, 3)</div><div class='add'>+#define PIN_PD23__TD1			PINMUX_PIN(PIN_PD23, 3, 1)</div><div class='add'>+</div><div class='add'>+#define PIN_PD24			120</div><div class='add'>+#define PIN_PD24__GPIO			PINMUX_PIN(PIN_PD24, 0, 0)</div><div class='add'>+#define PIN_PD24__G1_RXCTL		PINMUX_PIN(PIN_PD24, 1, 1)</div><div class='add'>+#define PIN_PD24__FLEXCOM6_IO0		PINMUX_PIN(PIN_PD24, 2, 3)</div><div class='add'>+#define PIN_PD24__RD1			PINMUX_PIN(PIN_PD24, 3, 1)</div><div class='add'>+#define PIN_PD24__PDMC0_DS1		PINMUX_PIN(PIN_PD24, 5, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD25			121</div><div class='add'>+#define PIN_PD25__GPIO			PINMUX_PIN(PIN_PD25, 0, 0)</div><div class='add'>+#define PIN_PD25__G1_MDC		PINMUX_PIN(PIN_PD25, 1, 1)</div><div class='add'>+#define PIN_PD25__FLEXCOM6_IO1		PINMUX_PIN(PIN_PD25, 2, 3)</div><div class='add'>+#define PIN_PD25__RK1			PINMUX_PIN(PIN_PD25, 3, 1)</div><div class='add'>+#define PIN_PD25__PDMC0_CLK		PINMUX_PIN(PIN_PD25, 5, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD26			122</div><div class='add'>+#define PIN_PD26__GPIO			PINMUX_PIN(PIN_PD26, 0, 0)</div><div class='add'>+#define PIN_PD26__G1_MDIO		PINMUX_PIN(PIN_PD26, 1, 1)</div><div class='add'>+#define PIN_PD26__FLEXCOM7_IO4		PINMUX_PIN(PIN_PD26, 2, 2)</div><div class='add'>+#define PIN_PD26__RF1			PINMUX_PIN(PIN_PD26, 3, 1)</div><div class='add'>+#define PIN_PD26__I2SMCC1_DIN2		PINMUX_PIN(PIN_PD26, 4, 2)</div><div class='add'>+#define PIN_PD26__PDMC0_DS0		PINMUX_PIN(PIN_PD26, 5, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PD27			123</div><div class='add'>+#define PIN_PD27__GPIO			PINMUX_PIN(PIN_PD27, 0, 0)</div><div class='add'>+#define PIN_PD27__G1_RX0		PINMUX_PIN(PIN_PD27, 1, 1)</div><div class='add'>+#define PIN_PD27__FLEXCOM7_IO0		PINMUX_PIN(PIN_PD27, 2, 2)</div><div class='add'>+#define PIN_PD27__SPDIF_RX		PINMUX_PIN(PIN_PD27, 3, 1)</div><div class='add'>+#define PIN_PD27__I2SMCC1_DIN3		PINMUX_PIN(PIN_PD27, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD28			124</div><div class='add'>+#define PIN_PD28__GPIO			PINMUX_PIN(PIN_PD28, 0, 0)</div><div class='add'>+#define PIN_PD28__G1_RX1		PINMUX_PIN(PIN_PD28, 1, 1)</div><div class='add'>+#define PIN_PD28__FLEXCOM7_IO1		PINMUX_PIN(PIN_PD28, 2, 2)</div><div class='add'>+#define PIN_PD28__SPDIF_TX		PINMUX_PIN(PIN_PD28, 3, 1)</div><div class='add'>+#define PIN_PD28__I2SMCC1_DIN1		PINMUX_PIN(PIN_PD28, 4, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD29			125</div><div class='add'>+#define PIN_PD29__GPIO			PINMUX_PIN(PIN_PD29, 0, 0)</div><div class='add'>+#define PIN_PD29__G1_REFCK		PINMUX_PIN(PIN_PD29, 1, 2)</div><div class='add'>+#define PIN_PD29__FLEXCOM7_IO2		PINMUX_PIN(PIN_PD29, 2, 2)</div><div class='add'>+#define PIN_PD29__I2SMCC1_DOUT3		PINMUX_PIN(PIN_PD29, 3, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD30			126</div><div class='add'>+#define PIN_PD30__GPIO			PINMUX_PIN(PIN_PD30, 0, 0)</div><div class='add'>+#define PIN_PD30__G1_RX2		PINMUX_PIN(PIN_PD30, 1, 1)</div><div class='add'>+#define PIN_PD30__FLEXCOM7_IO3		PINMUX_PIN(PIN_PD30, 2, 2)</div><div class='add'>+#define PIN_PD30__I2SMCC1_DOUT1		PINMUX_PIN(PIN_PD30, 3, 2)</div><div class='add'>+#define PIN_PD30__PDMC1_DS1		PINMUX_PIN(PIN_PD30, 4, 3)</div><div class='add'>+#define PIN_PD30__G1_RXER		PINMUX_PIN(PIN_PD30, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PD31			127</div><div class='add'>+#define PIN_PD31__GPIO			PINMUX_PIN(PIN_PD31, 0, 0)</div><div class='add'>+#define PIN_PD31__G1_RX3		PINMUX_PIN(PIN_PD31, 1, 1)</div><div class='add'>+#define PIN_PD31__FLEXCOM5_IO4		PINMUX_PIN(PIN_PD31, 2, 2)</div><div class='add'>+#define PIN_PD31__I2SMCC1_DOUT2		PINMUX_PIN(PIN_PD31, 3, 3)</div><div class='add'>+#define PIN_PD31__PDMC1_DS0		PINMUX_PIN(PIN_PD31, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PE0				128</div><div class='add'>+#define PIN_PE0__GPIO			PINMUX_PIN(PIN_PE0, 0, 0)</div><div class='add'>+#define PIN_PE0__G1_TX2			PINMUX_PIN(PIN_PE0, 1, 1)</div><div class='add'>+#define PIN_PE0__FLEXCOM5_IO2		PINMUX_PIN(PIN_PE0, 2, 2)</div><div class='add'>+#define PIN_PE0__I2SMCC1_DIN0		PINMUX_PIN(PIN_PE0, 3, 2)</div><div class='add'>+#define PIN_PE0__PDMC1_CLK		PINMUX_PIN(PIN_PE0, 4, 3)</div><div class='add'>+</div><div class='add'>+#define PIN_PE1				129</div><div class='add'>+#define PIN_PE1__GPIO			PINMUX_PIN(PIN_PE1, 0, 0)</div><div class='add'>+#define PIN_PE1__G1_TX3			PINMUX_PIN(PIN_PE1, 1, 1)</div><div class='add'>+#define PIN_PE1__FLEXCOM5_IO3		PINMUX_PIN(PIN_PE1, 2, 2)</div><div class='add'>+#define PIN_PE1__I2SMCC1_WS		PINMUX_PIN(PIN_PE1, 3, 2)</div><div class='add'>+#define PIN_PE1__PDMC0_DS1		PINMUX_PIN(PIN_PE1, 4, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PE2				130</div><div class='add'>+#define PIN_PE2__GPIO			PINMUX_PIN(PIN_PE2, 0, 0)</div><div class='add'>+#define PIN_PE2__G1_RXCK		PINMUX_PIN(PIN_PE2, 1, 1)</div><div class='add'>+#define PIN_PE2__FLEXCOM5_IO1		PINMUX_PIN(PIN_PE2, 2, 2)</div><div class='add'>+#define PIN_PE2__I2SMCC1_CK		PINMUX_PIN(PIN_PE2, 3, 2)</div><div class='add'>+#define PIN_PE2__PDMC0_CLK		PINMUX_PIN(PIN_PE2, 4, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PE3				131</div><div class='add'>+#define PIN_PE3__GPIO			PINMUX_PIN(PIN_PE3, 0, 0)</div><div class='add'>+#define PIN_PE3__G1_TSUCOMP		PINMUX_PIN(PIN_PE3, 1, 1)</div><div class='add'>+#define PIN_PE3__FLEXCOM5_IO0		PINMUX_PIN(PIN_PE3, 2, 2)</div><div class='add'>+#define PIN_PE3__I2SMCC1_DOUT0		PINMUX_PIN(PIN_PE3, 3, 2)</div><div class='add'>+#define PIN_PE3__PDMC0_DS0		PINMUX_PIN(PIN_PE3, 4, 4)</div><div class='add'>+</div><div class='add'>+#define PIN_PE4				132</div><div class='add'>+#define PIN_PE4__GPIO			PINMUX_PIN(PIN_PE4, 0, 0)</div><div class='add'>+#define PIN_PE4__LCDC_DAT0		PINMUX_PIN(PIN_PE4, 1, 1)</div><div class='add'>+#define PIN_PE4__FLEXCOM2_IO2		PINMUX_PIN(PIN_PE4, 2, 1)</div><div class='add'>+#define PIN_PE4__PWML0			PINMUX_PIN(PIN_PE4, 3, 2)</div><div class='add'>+#define PIN_PE4__TIOA3			PINMUX_PIN(PIN_PE4, 4, 1)</div><div class='add'>+#define PIN_PE4__I2SMCC0_DIN1		PINMUX_PIN(PIN_PE4, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE5				133</div><div class='add'>+#define PIN_PE5__GPIO			PINMUX_PIN(PIN_PE5, 0, 0)</div><div class='add'>+#define PIN_PE5__LCDC_DAT1		PINMUX_PIN(PIN_PE5, 1, 1)</div><div class='add'>+#define PIN_PE5__FLEXCOM2_IO3		PINMUX_PIN(PIN_PE5, 2, 1)</div><div class='add'>+#define PIN_PE5__PWMH0			PINMUX_PIN(PIN_PE5, 3, 2)</div><div class='add'>+#define PIN_PE5__TIOB3			PINMUX_PIN(PIN_PE5, 4, 1)</div><div class='add'>+#define PIN_PE5__I2SMCC0_DIN2		PINMUX_PIN(PIN_PE5, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE6				134</div><div class='add'>+#define PIN_PE6__GPIO			PINMUX_PIN(PIN_PE6, 0, 0)</div><div class='add'>+#define PIN_PE6__LCDC_DAT2		PINMUX_PIN(PIN_PE6, 1, 1)</div><div class='add'>+#define PIN_PE6__FLEXCOM2_IO4		PINMUX_PIN(PIN_PE6, 2, 1)</div><div class='add'>+#define PIN_PE6__PWML1			PINMUX_PIN(PIN_PE6, 3, 2)</div><div class='add'>+#define PIN_PE6__TCLK3			PINMUX_PIN(PIN_PE6, 4, 1)</div><div class='add'>+#define PIN_PE6__I2SMCC0_DIN3		PINMUX_PIN(PIN_PE6, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE7				135</div><div class='add'>+#define PIN_PE7__GPIO			PINMUX_PIN(PIN_PE7, 0, 0)</div><div class='add'>+#define PIN_PE7__LCDC_DAT3		PINMUX_PIN(PIN_PE7, 1, 1)</div><div class='add'>+#define PIN_PE7__FLEXCOM2_IO5		PINMUX_PIN(PIN_PE7, 2, 1)</div><div class='add'>+#define PIN_PE7__PWMH1			PINMUX_PIN(PIN_PE7, 3, 2)</div><div class='add'>+#define PIN_PE7__TIOA4			PINMUX_PIN(PIN_PE7, 4, 1)</div><div class='add'>+#define PIN_PE7__I2SMCC0_DOUT1		PINMUX_PIN(PIN_PE7, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE8				136</div><div class='add'>+#define PIN_PE8__GPIO			PINMUX_PIN(PIN_PE8, 0, 0)</div><div class='add'>+#define PIN_PE8__LCDC_DAT4		PINMUX_PIN(PIN_PE8, 1, 1)</div><div class='add'>+#define PIN_PE8__FLEXCOM2_IO0		PINMUX_PIN(PIN_PE8, 2, 1)</div><div class='add'>+#define PIN_PE8__PWML2			PINMUX_PIN(PIN_PE8, 3, 2)</div><div class='add'>+#define PIN_PE8__TIOB4			PINMUX_PIN(PIN_PE8, 4, 1)</div><div class='add'>+#define PIN_PE8__I2SMCC0_CK		PINMUX_PIN(PIN_PE8, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE9				137</div><div class='add'>+#define PIN_PE9__GPIO			PINMUX_PIN(PIN_PE9, 0, 0)</div><div class='add'>+#define PIN_PE9__LCDC_DAT5		PINMUX_PIN(PIN_PE9, 1, 1)</div><div class='add'>+#define PIN_PE9__FLEXCOM2_IO1		PINMUX_PIN(PIN_PE9, 2, 1)</div><div class='add'>+#define PIN_PE9__PWMH2			PINMUX_PIN(PIN_PE9, 3, 2)</div><div class='add'>+#define PIN_PE9__TCLK4			PINMUX_PIN(PIN_PE9, 4, 1)</div><div class='add'>+#define PIN_PE9__I2SMCC0_WS		PINMUX_PIN(PIN_PE9, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE10			138</div><div class='add'>+#define PIN_PE10__GPIO			PINMUX_PIN(PIN_PE10, 0, 0)</div><div class='add'>+#define PIN_PE10__LCDC_DAT6		PINMUX_PIN(PIN_PE10, 1, 1)</div><div class='add'>+#define PIN_PE10__FLEXCOM2_IO6		PINMUX_PIN(PIN_PE10, 2, 1)</div><div class='add'>+#define PIN_PE10__PWML3			PINMUX_PIN(PIN_PE10, 3, 2)</div><div class='add'>+#define PIN_PE10__TIOA5			PINMUX_PIN(PIN_PE10, 4, 1)</div><div class='add'>+#define PIN_PE10__I2SMCC0_DOUT2		PINMUX_PIN(PIN_PE10, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE11			139</div><div class='add'>+#define PIN_PE11__GPIO			PINMUX_PIN(PIN_PE11, 0, 0)</div><div class='add'>+#define PIN_PE11__LCDC_DAT7		PINMUX_PIN(PIN_PE11, 1, 1)</div><div class='add'>+#define PIN_PE11__PWMH3			PINMUX_PIN(PIN_PE11, 3, 2)</div><div class='add'>+#define PIN_PE11__TIOB5			PINMUX_PIN(PIN_PE11, 4, 1)</div><div class='add'>+#define PIN_PE11__I2SMCC0_DOUT3		PINMUX_PIN(PIN_PE11, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE12			140</div><div class='add'>+#define PIN_PE12__GPIO			PINMUX_PIN(PIN_PE12, 0, 0)</div><div class='add'>+#define PIN_PE12__LCDC_DEN		PINMUX_PIN(PIN_PE12, 1, 1)</div><div class='add'>+#define PIN_PE12__PCK3			PINMUX_PIN(PIN_PE12, 2, 4)</div><div class='add'>+#define PIN_PE12__PWMEXTRG0		PINMUX_PIN(PIN_PE12, 3, 2)</div><div class='add'>+#define PIN_PE12__TCLK5			PINMUX_PIN(PIN_PE12, 4, 1)</div><div class='add'>+#define PIN_PE12__I2SMCC0_DIN0		PINMUX_PIN(PIN_PE12, 5, 2)</div><div class='add'>+</div><div class='add'>+#define PIN_PE13			141</div><div class='add'>+#define PIN_PE13__GPIO			PINMUX_PIN(PIN_PE13, 0, 0)</div><div class='add'>+#define PIN_PE13__LCDC_PCK		PINMUX_PIN(PIN_PE13, 1, 1)</div><div class='add'>+#define PIN_PE13__PCK4			PINMUX_PIN(PIN_PE13, 2, 3)</div><div class='add'>+#define PIN_PE13__PWMEXTRG1		PINMUX_PIN(PIN_PE13, 3, 2)</div><div class='add'>+#define PIN_PE13__I2SMCC0DOUT0		PINMUX_PIN(PIN_PE13, 5, 2)</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi<br/>new file mode 100644<br/>index 000000000000..e53e2dd6d530<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama7d65.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama7d65.dtsi</a></div><div class='hunk'>@@ -0,0 +1,740 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ *  sama7d65.dtsi - Device Tree Include file for SAMA7D65 SoC</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries</div><div class='add'>+ *</div><div class='add'>+ *  Author: Ryan Wanner &lt;Ryan.Wanner@microchip.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/at91.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip SAMA7D65 family SoC";</div><div class='add'>+	compatible = "microchip,sama7d65";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a7";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_CORE PMC_CPUPLL&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+</div><div class='add'>+			L2: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x40000&gt;; // L2, 256 KB</div><div class='add'>+				cache-unified;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		main_xtal: clock-mainxtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "main_xtal";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		slow_xtal: clock-slowxtal {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "slow_xtal";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ns_sram: sram@100000 {</div><div class='add'>+		compatible = "mmio-sram";</div><div class='add'>+		reg = &lt;0x100000 0x20000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		securam: sram@e0000800 {</div><div class='add'>+			compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";</div><div class='add'>+			reg = &lt;0xe0000800 0x4000&gt;;</div><div class='add'>+			ranges = &lt;0 0xe0000800 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 17&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			no-memory-wc;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secumod: security-module@e0004000 {</div><div class='add'>+			compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";</div><div class='add'>+			reg = &lt;0xe0004000 0x4000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sfrbu: sfr@e0008000 {</div><div class='add'>+			compatible = "microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon";</div><div class='add'>+			reg = &lt;0xe0008000 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pioa: pinctrl@e0014000 {</div><div class='add'>+			compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";</div><div class='add'>+			reg = &lt;0xe0014000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 10&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmc: clock-controller@e0018000 {</div><div class='add'>+			compatible = "microchip,sama7d65-pmc", "syscon";</div><div class='add'>+			reg = &lt;0xe0018000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 1&gt;, &lt;&amp;clk32k 0&gt;, &lt;&amp;main_xtal&gt;;</div><div class='add'>+			clock-names = "td_slck", "md_slck", "main_xtal";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ps_wdt: watchdog@e001d000 {</div><div class='add'>+			compatible = "microchip,sama7d65-wdt", "microchip,sama7g5-wdt";</div><div class='add'>+			reg = &lt;0xe001d000 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset_controller: reset-controller@e001d100 {</div><div class='add'>+			compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc";</div><div class='add'>+			reg = &lt;0xe001d100 0xc&gt;, &lt;0xe001d1e4 0x4&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		shdwc: poweroff@e001d200 {</div><div class='add'>+			compatible = "microchip,sama7d65-shdwc", "microchip,sama7g5-shdwc", "syscon";</div><div class='add'>+			reg = &lt;0xe001d200 0x20&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			atmel,wakeup-rtc-timer;</div><div class='add'>+			atmel,wakeup-rtt-timer;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtt: rtc@e001d300 {</div><div class='add'>+			compatible = "microchip,sama7d65-rtt", "atmel,at91sam9260-rtt";</div><div class='add'>+			reg = &lt;0xe001d300 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk32k: clock-controller@e001d500 {</div><div class='add'>+			compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc";</div><div class='add'>+			reg = &lt;0xe001d500 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;slow_xtal&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpbr: syscon@e001d700 {</div><div class='add'>+			compatible = "microchip,sama7d65-gpbr", "syscon";</div><div class='add'>+			reg = &lt;0xe001d700 0x48&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@e001d800 {</div><div class='add'>+			compatible = "microchip,sama7d65-rtc", "microchip,sam9x60-rtc";</div><div class='add'>+			reg = &lt;0xe001d800 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk32k 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		chipid@e0020000 {</div><div class='add'>+			compatible = "microchip,sama7d65-chipid";</div><div class='add'>+			reg = &lt;0xe0020000 0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0: can@e0828000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xe0828000 0x200&gt;, &lt;0x100000 0x7800&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 58&gt;, &lt;&amp;pmc PMC_TYPE_GCK 58&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 58&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x3400 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1: can@e082c000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xe082c000 0x200&gt;, &lt;0x100000 0xbc00&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 59&gt;, &lt;&amp;pmc PMC_TYPE_GCK 59&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 59&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x7800 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can2: can@e0830000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xe0830000 0x200&gt;, &lt;0x100000 0x10000&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 60&gt;, &lt;&amp;pmc PMC_TYPE_GCK 60&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 60&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0xbc00 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can3: can@e0834000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xe0834000 0x200&gt;, &lt;0x110000 0x4400&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 61&gt;, &lt;&amp;pmc PMC_TYPE_GCK 61&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 61&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x0 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can4: can@e0838000 {</div><div class='add'>+			compatible = "bosch,m_can";</div><div class='add'>+			reg = &lt;0xe0838000 0x200&gt;, &lt;0x110000 0x8800&gt;;</div><div class='add'>+			reg-names = "m_can", "message_ram";</div><div class='add'>+			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int0", "int1";</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 62&gt;, &lt;&amp;pmc PMC_TYPE_GCK 62&gt;;</div><div class='add'>+			clock-names = "hclk", "cclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 62&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_UTMI&gt;;</div><div class='add'>+			bosch,mram-cfg = &lt;0x4400 0 0 64 0 0 32 32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma2: dma-controller@e1200000 {</div><div class='add'>+			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";</div><div class='add'>+			reg = &lt;0xe1200000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 23&gt;;</div><div class='add'>+			clock-names = "dma_clk";</div><div class='add'>+			dma-requests = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc1: mmc@e1208000 {</div><div class='add'>+			compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci";</div><div class='add'>+			reg = &lt;0xe1208000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 76&gt;, &lt;&amp;pmc PMC_TYPE_GCK 76&gt;;</div><div class='add'>+			clock-names = "hclock", "multclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 76&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;pmc PMC_TYPE_CORE PMC_MCK1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aes: crypto@e1600000 {</div><div class='add'>+			compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes";</div><div class='add'>+			reg = &lt;0xe1600000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 26&gt;;</div><div class='add'>+			clock-names = "aes_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(1)&gt;,</div><div class='add'>+			       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(2)&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sha: crypto@e1604000 {</div><div class='add'>+			compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha";</div><div class='add'>+			reg = &lt;0xe1604000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 78&gt;;</div><div class='add'>+			clock-names = "sha_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(48)&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tdes: crypto@e1608000 {</div><div class='add'>+			compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes";</div><div class='add'>+			reg = &lt;0xe1608000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 91&gt;;</div><div class='add'>+			clock-names = "tdes_clk";</div><div class='add'>+			dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(54)&gt;,</div><div class='add'>+			       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(53)&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trng: rng@e160c000 {</div><div class='add'>+			compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng";</div><div class='add'>+			reg = &lt;0xe160c000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 92&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma0: dma-controller@e1610000 {</div><div class='add'>+			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";</div><div class='add'>+			reg = &lt;0xe1610000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 21&gt;;</div><div class='add'>+			clock-names = "dma_clk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma1: dma-controller@e1614000 {</div><div class='add'>+			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";</div><div class='add'>+			reg = &lt;0xe1614000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 22&gt;;</div><div class='add'>+			clock-names = "dma_clk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@e1618000 {</div><div class='add'>+			compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";</div><div class='add'>+			reg = &lt;0xe1618000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 46&gt;, &lt;&amp;pmc PMC_TYPE_PERIPHERAL 46&gt;, &lt;&amp;pmc PMC_TYPE_GCK 46&gt;, &lt;&amp;pmc PMC_TYPE_GCK 49&gt;;</div><div class='add'>+			clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 46&gt;, &lt;&amp;pmc PMC_TYPE_GCK 49&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;125000000&gt;, &lt;200000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1: ethernet@e161c000 {</div><div class='add'>+			compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";</div><div class='add'>+			reg = &lt;0xe161c000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 47&gt;, &lt;&amp;pmc PMC_TYPE_PERIPHERAL 47&gt;,&lt;&amp;pmc PMC_TYPE_GCK 47&gt;, &lt;&amp;pmc PMC_TYPE_GCK 50&gt;;</div><div class='add'>+			clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";</div><div class='add'>+			assigned-clocks = &lt;&amp;pmc PMC_TYPE_GCK 47&gt;, &lt;&amp;pmc PMC_TYPE_GCK 50&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;125000000&gt;, &lt;200000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pit64b0: timer@e1800000 {</div><div class='add'>+			compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";</div><div class='add'>+			reg = &lt;0xe1800000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 66&gt;, &lt;&amp;pmc PMC_TYPE_GCK 66&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pit64b1: timer@e1804000 {</div><div class='add'>+			compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";</div><div class='add'>+			reg = &lt;0xe1804000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 67&gt;, &lt;&amp;pmc PMC_TYPE_GCK 67&gt;;</div><div class='add'>+			clock-names = "pclk", "gclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm: pwm@e1818000 {</div><div class='add'>+			compatible = "microchip,sama7d65-pwm", "atmel,sama5d2-pwm";</div><div class='add'>+			reg = &lt;0xe1818000 0x500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 72&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx0: flexcom@e1820000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe1820000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe1820000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 34&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart0: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 34&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma1 AT91_XDMAC_DT_PERID(6)&gt;,</div><div class='add'>+				       &lt;&amp;dma1 AT91_XDMAC_DT_PERID(5)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 34&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(6)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(5)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx1: flexcom@e1824000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe1824000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe1824000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 35&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			spi1: spi@400 {</div><div class='add'>+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 35&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(8)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(7)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 35&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(8)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(7)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx2: flexcom@e1828000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe1828000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe1828000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 36&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart2: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 36&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma1 AT91_XDMAC_DT_PERID(10)&gt;,</div><div class='add'>+				       &lt;&amp;dma1 AT91_XDMAC_DT_PERID(9)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx3: flexcom@e182c000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe182c000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe182c000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 37&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart3: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 37&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(12)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(11)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 37&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(12)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(11)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx4: flexcom@e2018000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe2018000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe2018000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 38&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart4: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 38&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma1 AT91_XDMAC_DT_PERID(14)&gt;,</div><div class='add'>+				       &lt;&amp;dma1 AT91_XDMAC_DT_PERID(13)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@400 {</div><div class='add'>+				compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";</div><div class='add'>+				reg = &lt;0x400 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 38&gt;;</div><div class='add'>+				clock-names = "spi_clk";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(14)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(13)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx5: flexcom@e201c000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe201c000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe201c000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 39&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 39&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(16)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(15)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx6: flexcom@e2020000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe2020000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe2020000 0x800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 40&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart6: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 40&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx7: flexcom@e2024000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe2024000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe2024000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 41&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart7: serial@200 {</div><div class='add'>+				compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 41&gt;;</div><div class='add'>+				clock-names = "usart";</div><div class='add'>+				dmas = &lt;&amp;dma1 AT91_XDMAC_DT_PERID(20)&gt;,</div><div class='add'>+				       &lt;&amp;dma1 AT91_XDMAC_DT_PERID(19)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				atmel,fifo-size = &lt;16&gt;;</div><div class='add'>+				atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx8: flexcom@e281c000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe281c000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe281c000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 42&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 42&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(22)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(21)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx9: flexcom@e2820000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe2820000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe281c000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 43&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c9: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 43&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;dma0 AT91_XDMAC_DT_PERID(24)&gt;,</div><div class='add'>+				       &lt;&amp;dma0 AT91_XDMAC_DT_PERID(23)&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		flx10: flexcom@e2824000 {</div><div class='add'>+			compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";</div><div class='add'>+			reg = &lt;0xe2824000 0x200&gt;;</div><div class='add'>+			ranges = &lt;0x0 0xe2824000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 44&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@600 {</div><div class='add'>+				compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";</div><div class='add'>+				reg = &lt;0x600 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 44&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uddrc: uddrc@e3800000 {</div><div class='add'>+			compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";</div><div class='add'>+			reg = &lt;0xe3800000 0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddr3phy: ddr3phy@e3804000 {</div><div class='add'>+			compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";</div><div class='add'>+			reg = &lt;0xe3804000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@e8c11000 {</div><div class='add'>+			compatible = "arm,cortex-a7-gic";</div><div class='add'>+			reg = &lt;0xe8c11000 0x1000&gt;,</div><div class='add'>+			      &lt;0xe8c12000 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi<br/>index 17bcdcf0cf4a..381cbcfcb34a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama7g5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/sama7g5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/sama7g5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/sama7g5.dtsi</a></div><div class='hunk'>@@ -38,6 +38,16 @@</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;	// L1, 32 KB</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+</div><div class='add'>+			L2: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x40000&gt;; // L2, 256 KB</div><div class='add'>+				cache-unified;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -117,19 +127,22 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='del'>-		slow_xtal: slow_xtal {</div><div class='add'>+		slow_xtal: clock-slowxtal {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "slow_xtal";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_xtal: main_xtal {</div><div class='add'>+		main_xtal: clock-mainxtal {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-output-names = "main_xtal";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_clk: usb_clk {</div><div class='add'>+		usb_clk: clock-usbclk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "usb_clk";</div><div class='ctx'> 			clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/tny_a9260.dts b/arch/arm/boot/dts/microchip/tny_a9260.dts<br/>index ef6d586ce887..f0f2a787d669 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9260.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9260.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9260.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/tny_a9260.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * tny_a9260.dts - Device Tree file for Caloa TNY A9260 board</div><div class='add'>+ * tny_a9260.dts - Device Tree file for Calao TNY A9260 board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/tny_a9260_common.dtsi b/arch/arm/boot/dts/microchip/tny_a9260_common.dtsi<br/>index 70e5635c78ed..4d4377f51bec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9260_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9260_common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9260_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/tny_a9260_common.dtsi</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board</div><div class='add'>+ * tny_a9260_common.dtsi - Device Tree file for Calao TNY A926x board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/tny_a9263.dts b/arch/arm/boot/dts/microchip/tny_a9263.dts<br/>index 62b7d9f9a926..fd8244b56e05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9263.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9263.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9263.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/tny_a9263.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * usb_a9263.dts - Device Tree file for Caloa USB A9293 board</div><div class='add'>+ * usb_a9263.dts - Device Tree file for Calao USB A9293 board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 				nand@3 {</div><div class='ctx'> 					reg = &lt;0x3 0x0 0x800000&gt;;</div><div class='ctx'> 					rb-gpios = &lt;&amp;pioA 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-					cs-gpios = &lt;&amp;pioA 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					cs-gpios = &lt;&amp;pioD 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 					nand-bus-width = &lt;8&gt;;</div><div class='ctx'> 					nand-ecc-mode = "soft";</div><div class='ctx'> 					nand-on-flash-bbt;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/tny_a9g20.dts b/arch/arm/boot/dts/microchip/tny_a9g20.dts<br/>index 118d766a1265..cebd5696a2c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9g20.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/tny_a9g20.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/tny_a9g20.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/tny_a9g20.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * tny_a9g20.dts - Device Tree file for Caloa TNY A9G20 board</div><div class='add'>+ * tny_a9g20.dts - Device Tree file for Calao TNY A9G20 board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9260.dts b/arch/arm/boot/dts/microchip/usb_a9260.dts<br/>index 66f8da89007d..3b61e7145060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9260.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9260.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9260.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9260.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * usb_a9260.dts - Device Tree file for Caloa USB A9260 board</div><div class='add'>+ * usb_a9260.dts - Device Tree file for Calao USB A9260 board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -12,14 +12,6 @@</div><div class='ctx'> 	model = "Calao USB A9260";</div><div class='ctx'> 	compatible = "calao,usb-a9260", "atmel,at91sam9260", "atmel,at91sam9";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@20000000 {</div><div class='del'>-		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	ahb {</div><div class='ctx'> 		apb {</div><div class='ctx'> 			shdwc: poweroff@fffffd10 {</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9260_common.dtsi b/arch/arm/boot/dts/microchip/usb_a9260_common.dtsi<br/>index 8744b5f6f792..da32c5fdcc47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9260_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9260_common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9260_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9260_common.dtsi</a></div><div class='hunk'>@@ -1,11 +1,16 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * usb_a926x.dts - Device Tree file for Caloa USB A926x board</div><div class='add'>+ * usb_a926x.dts - Device Tree file for Calao USB A926x board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	clocks {</div><div class='ctx'> 		slow_xtal {</div><div class='ctx'> 			clock-frequency = &lt;32768&gt;;</div><div class='hunk'>@@ -16,6 +21,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	memory@20000000 {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ahb {</div><div class='ctx'> 		apb {</div><div class='ctx'> 			dbgu: serial@fffff200 {</div><div class='hunk'>@@ -111,7 +120,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@500000 {</div><div class='add'>+		usb0: usb@500000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -122,17 +131,14 @@</div><div class='ctx'> </div><div class='ctx'> 		user_led {</div><div class='ctx'> 			label = "user_led";</div><div class='del'>-			gpios = &lt;&amp;pioB 21 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='add'>+			gpios = &lt;&amp;pioB 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		user_pb {</div><div class='add'>+		button-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;28&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9263.dts b/arch/arm/boot/dts/microchip/usb_a9263.dts<br/>index 45745915b2e1..8e1a3fb61087 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9263.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9263.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9263.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9263.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * usb_a9263.dts - Device Tree file for Caloa USB A9293 board</div><div class='add'>+ * usb_a9263.dts - Device Tree file for Calao USB A9293 board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Calao USB A9263";</div><div class='del'>-	compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='add'>+	compatible = "calao,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi0: spi@fffa4000 {</div><div class='del'>-				cs-gpios = &lt;&amp;pioB 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				cs-gpios = &lt;&amp;pioA 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 				flash@0 {</div><div class='ctx'> 					compatible = "atmel,at45", "atmel,dataflash";</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 				nand@3 {</div><div class='ctx'> 					reg = &lt;0x3 0x0 0x800000&gt;;</div><div class='ctx'> 					rb-gpios = &lt;&amp;pioA 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-					cs-gpios = &lt;&amp;pioA 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					cs-gpios = &lt;&amp;pioD 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 					nand-bus-width = &lt;8&gt;;</div><div class='ctx'> 					nand-ecc-mode = "soft";</div><div class='ctx'> 					nand-on-flash-bbt;</div><div class='hunk'>@@ -139,7 +139,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0: ohci@a00000 {</div><div class='add'>+		usb0: usb@a00000 {</div><div class='ctx'> 			num-ports = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -151,16 +151,13 @@</div><div class='ctx'> 		user_led {</div><div class='ctx'> 			label = "user_led";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		user_pb {</div><div class='add'>+		button-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;28&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi b/arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi<br/>index 08d58081201a..5b1d80c0ab26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi</a></div><div class='hunk'>@@ -65,28 +65,26 @@</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		user_pb1 {</div><div class='add'>+		button-user-pb1 {</div><div class='ctx'> 			label = "user_pb1";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 25 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;0x100&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user_pb2 {</div><div class='add'>+		button-user-pb2 {</div><div class='ctx'> 			label = "user_pb2";</div><div class='ctx'> 			gpios = &lt;&amp;pioB 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;0x101&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user_pb3 {</div><div class='add'>+		button-user-pb3 {</div><div class='ctx'> 			label = "user_pb3";</div><div class='ctx'> 			gpios = &lt;&amp;pioA 26 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;0x102&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user_pb4 {</div><div class='add'>+		button-user-pb4 {</div><div class='ctx'> 			label = "user_pb4";</div><div class='ctx'> 			gpios = &lt;&amp;pioC 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;0x103&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9g20.dts b/arch/arm/boot/dts/microchip/usb_a9g20.dts<br/>index 2f667b083e81..555291cd30b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9g20.dts</a></div><div class='hunk'>@@ -1,13 +1,28 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board</div><div class='add'>+ * usb_a9g20.dts - Device Tree file for Calao USB A9G20 board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "usb_a9g20_common.dtsi"</div><div class='add'>+#include "at91sam9g20.dtsi"</div><div class='add'>+#include "usb_a9260_common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Calao USB A9G20";</div><div class='ctx'> 	compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	cs-gpios = &lt;&amp;pioC 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* TODO: Some revisions might have a dataflash here instead of an EEPROM */</div><div class='add'>+	eeprom@0 {</div><div class='add'>+		compatible = "st,m95640", "atmel,at25";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+		size = &lt;8192&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		address-width = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi b/arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi<br/>deleted file mode 100644<br/>index 7d10b36db1ee..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include "at91sam9g20.dtsi"</div><div class='del'>-#include "usb_a9260_common.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@20000000 {</div><div class='del'>-		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c-gpio-0 {</div><div class='del'>-		rtc@56 {</div><div class='del'>-			compatible = "microcrystal,rv3029";</div><div class='del'>-			reg = &lt;0x56&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts b/arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts<br/>index f65712015d40..2eda00477bc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts</a></div><div class='hunk'>@@ -1,11 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * usb_a9g20_lpw.dts - Device Tree file for Caloa USB A9G20 Low Power board</div><div class='add'>+ * usb_a9g20_lpw.dts - Device Tree file for Calao USB A9G20 Low Power board</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "usb_a9g20_common.dtsi"</div><div class='add'>+#include "at91sam9g20.dtsi"</div><div class='add'>+#include "usb_a9260_common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Calao USB A9G20 Low Power";</div><div class='hunk'>@@ -16,7 +17,7 @@</div><div class='ctx'> 			spi1: spi@fffcc000 {</div><div class='ctx'> 				cs-gpios = &lt;&amp;pioB 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='del'>-				mmc-slot@0 {</div><div class='add'>+				mmc@0 {</div><div class='ctx'> 					compatible = "mmc-spi-slot";</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					voltage-ranges = &lt;3200 3400&gt;;</div><div class='hunk'>@@ -27,4 +28,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	i2c-gpio-0 {</div><div class='add'>+		rtc@56 {</div><div class='add'>+			compatible = "microcrystal,rv3029";</div><div class='add'>+			reg = &lt;0x56&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi<br/>index 868454ae6bde..98c35771534e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi</a></div><div class='hunk'>@@ -99,6 +99,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	udc0_phy: usb-phy {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ahb {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -122,7 +127,14 @@</div><div class='ctx'> 			clocks = &lt;&amp;clk_refclk&gt;, &lt;&amp;clk_sysbypck&gt;, &lt;&amp;clk_mcbypck&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac0: eth@f0802000 {</div><div class='add'>+		mc: memory-controller@f0824000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-memory-controller";</div><div class='add'>+			reg = &lt;0xf0824000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@f0802000 {</div><div class='ctx'> 			device_type = "network";</div><div class='ctx'> 			compatible = "snps,dwmac";</div><div class='ctx'> 			reg = &lt;0xf0802000 0x2000&gt;;</div><div class='hunk'>@@ -137,6 +149,29 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdmmc: mmc@f0842000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-sdhci";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0xf0842000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks =  &lt;&amp;clk NPCM7XX_CLK_AHB&gt;;</div><div class='add'>+			clock-names = "clk_mmc";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc8_pins</div><div class='add'>+					&amp;mmc_pins&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci: mmc@f0840000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-sdhci";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0xf0840000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks =  &lt;&amp;clk NPCM7XX_CLK_AHB&gt;;</div><div class='add'>+			clock-names = "clk_sdhc";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sd1_pins&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ehci1: usb@f0806000 {</div><div class='ctx'> 			compatible = "nuvoton,npcm750-ehci";</div><div class='ctx'> 			reg = &lt;0xf0806000 0x1000&gt;;</div><div class='hunk'>@@ -144,6 +179,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ohci1: usb@f0807000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0xf0807000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		fiu0: spi@fb000000 {</div><div class='ctx'> 			compatible = "nuvoton,npcm750-fiu";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -179,6 +221,72 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		udc5: usb@f0835000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0835000 0x1000</div><div class='add'>+			       0xfffd2800 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc6: usb@f0836000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0836000 0x1000</div><div class='add'>+			       0xfffd3000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc7: usb@f0837000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0837000 0x1000</div><div class='add'>+			       0xfffd3800 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc8: usb@f0838000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0838000 0x1000</div><div class='add'>+			       0xfffd4000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc9: usb@f0839000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0839000 0x1000</div><div class='add'>+			       0xfffd4800 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			nuvoton,sysgcr = &lt;&amp;gcr&gt;;</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		apb {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts<br/>index 9f64c85e1c20..231228842e63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts</a></div><div class='hunk'>@@ -661,7 +661,7 @@</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	mb_fru@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -704,7 +704,7 @@</div><div class='ctx'> 				reg = &lt;0x5d&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='del'>-			fan_fru@51 {</div><div class='add'>+			eeprom@51 {</div><div class='ctx'> 				compatible = "atmel,24c64";</div><div class='ctx'> 				reg = &lt;0x51&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -714,7 +714,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='del'>-			hsbp_fru@52 {</div><div class='add'>+			eeprom@52 {</div><div class='ctx'> 				compatible = "atmel,24c64";</div><div class='ctx'> 				reg = &lt;0x52&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='hunk'>@@ -1050,19 +1050,19 @@</div><div class='ctx'> 		"","","","SIO_POWER_GOOD","","","","";</div><div class='ctx'> 	};</div><div class='ctx'> 	gpio2: gpio@f0012000 {</div><div class='del'>-		bmc_usb_mux_oe_n {</div><div class='add'>+		bmc-usb-mux-oe-n-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;25 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "bmc-usb-mux-oe-n";</div><div class='ctx'> 		};</div><div class='del'>-		bmc_usb_mux_sel {</div><div class='add'>+		bmc-usb-mux-sel-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;26 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "bmc-usb-mux-sel";</div><div class='ctx'> 		};</div><div class='del'>-		bmc_usb2517_reset_n {</div><div class='add'>+		bmc-usb2517-reset-n-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;27 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -1070,19 +1070,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> 	gpio3: gpio@f0013000 {</div><div class='del'>-		assert_cpu0_reset {</div><div class='add'>+		assert-cpu0-reset-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "assert-cpu0-reset";</div><div class='ctx'> 		};</div><div class='del'>-		assert_pwrok_cpu0_n {</div><div class='add'>+		assert-pwrok-cpu0-n-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "assert-pwrok-cpu0-n";</div><div class='ctx'> 		};</div><div class='del'>-		assert_cpu0_prochot {</div><div class='add'>+		assert-cpu0-prochot-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;16 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts<br/>index 087f4ac43187..0c94e14d40e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts</a></div><div class='hunk'>@@ -427,91 +427,91 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio7 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		G1A_P0_0 {</div><div class='add'>+		g1a-p0-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;0 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "TPM_BMC_ALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_1 {</div><div class='add'>+		g1a-p0-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;1 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BIOS_TOP_SWAP";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_2 {</div><div class='add'>+		g1a-p0-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;2 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BIOS_PREFRB2_GOOD";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_3 {</div><div class='add'>+		g1a-p0-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;3 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "BMC_SATAXPCIE_0TO3_SEL";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_4 {</div><div class='add'>+		g1a-p0-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;4 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "BMC_SATAXPCIE_4TO7_SEL";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_5 {</div><div class='add'>+		g1a-p0-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;5 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "FM_UV_ADR_TRIGGER_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P0_6 {</div><div class='add'>+		g1a-p0-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;6 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "RM_THROTTLE_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_0 {</div><div class='add'>+		g1a-p1-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;8 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BMC_TPM_PRES_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_1 {</div><div class='add'>+		g1a-p1-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;9 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_CPU0_SKTOCC_LVT3_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_2 {</div><div class='add'>+		g1a-p1-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;10 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_CPU1_SKTOCC_LVT3_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_3 {</div><div class='add'>+		g1a-p1-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;11 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PSU1_ALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_4 {</div><div class='add'>+		g1a-p1-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;12 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PSU2_ALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_5 {</div><div class='add'>+		g1a-p1-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;13 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "H_CPU0_FAST_WAKE_LVT3_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_6 {</div><div class='add'>+		g1a-p1-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;14 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "I2C_MUX1_RESET_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1A_P1_7 {</div><div class='add'>+		g1a-p1-7-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;15 0&gt;;</div><div class='ctx'> 			input;</div><div class='hunk'>@@ -524,91 +524,91 @@</div><div class='ctx'> 		reg = &lt;0x75&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		G1B_P0_0 {</div><div class='add'>+		g1b-p0-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;0 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PVDDQ_ABC_PINALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_1 {</div><div class='add'>+		g1b-p0-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;1 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PVDDQ_DEF_PINALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_2 {</div><div class='add'>+		g1b-p0-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;2 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PVDDQ_GHJ_PINALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_3 {</div><div class='add'>+		g1b-p0-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;3 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PVDDQ_KLM_PINALERT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_5 {</div><div class='add'>+		g1b-p0-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;5 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BOARD_REV_ID0";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_6 {</div><div class='add'>+		g1b-p0-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;6 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BOARD_REV_ID1";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P0_7 {</div><div class='add'>+		g1b-p0-7-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;7 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BOARD_REV_ID2";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_0 {</div><div class='add'>+		g1b-p1-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;8 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_OC_DETECT_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_1 {</div><div class='add'>+		g1b-p1-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;9 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_FLASH_DESC_OVERRIDE";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_2 {</div><div class='add'>+		g1b-p1-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;10 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "FP_PWR_ID_LED_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_3 {</div><div class='add'>+		g1b-p1-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;11 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "BMC_LED_PWR_GRN";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_4 {</div><div class='add'>+		g1b-p1-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;12 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "BMC_LED_PWR_AMBER";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_5 {</div><div class='add'>+		g1b-p1-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;13 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_BMC_FAULT_LED_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_6 {</div><div class='add'>+		g1b-p1-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;14 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_CPLD_BMC_PWRDN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G1B_P1_7 {</div><div class='add'>+		g1b-p1-7-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;15 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='hunk'>@@ -626,91 +626,91 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 28 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		G2A_P0_0 {</div><div class='add'>+		g2a-p0-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;0 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "BMC_PON_RST_REQ_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_1 {</div><div class='add'>+		g2a-p0-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;1 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "BMC_RST_IND_REQ_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_2 {</div><div class='add'>+		g2a-p0-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;2 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "RST_BMC_RTCRST";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_3 {</div><div class='add'>+		g2a-p0-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;3 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_BMC_PWRBTN_OUT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_4 {</div><div class='add'>+		g2a-p0-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;4 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "RST_BMC_SYSRST_BTN_OUT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_5 {</div><div class='add'>+		g2a-p0-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;5 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_BATTERY_SENSE_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_6 {</div><div class='add'>+		g2a-p0-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;6 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_BMC_READY_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P0_7 {</div><div class='add'>+		g2a-p0-7-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;7 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "IRQ_BMC_PCH_SMI_LPC_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_0 {</div><div class='add'>+		g2a-p1-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;8 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_SLOT4_CFG0";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_1 {</div><div class='add'>+		g2a-p1-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;9 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_SLOT4_CFG1";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_2 {</div><div class='add'>+		g2a-p1-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;10 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_NVDIMM_EVENT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_3 {</div><div class='add'>+		g2a-p1-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;11 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "PSU1_BLADE_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_4 {</div><div class='add'>+		g2a-p1-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;12 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "BMC_PCH_FNM";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_5 {</div><div class='add'>+		g2a-p1-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;13 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_SOL_UART_CH_SEL";</div><div class='ctx'> 		};</div><div class='del'>-		G2A_P1_6 {</div><div class='add'>+		g2a-p1-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;14 0&gt;;</div><div class='ctx'> 			input;</div><div class='hunk'>@@ -723,91 +723,91 @@</div><div class='ctx'> 		reg = &lt;0x75&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		G2B_P0_0 {</div><div class='add'>+		g2b-p0-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;0 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_CPU_MSMI_LVT3_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_1 {</div><div class='add'>+		g2b-p0-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;1 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_2 {</div><div class='add'>+		g2b-p0-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;2 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_CPU1_DISABLE_BMC_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_3 {</div><div class='add'>+		g2b-p0-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;3 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "BMC_JTAG_SELECT";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_4 {</div><div class='add'>+		g2b-p0-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;4 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "PECI_MUX_SELECT";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_5 {</div><div class='add'>+		g2b-p0-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;5 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "I2C_MUX2_RESET_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_6 {</div><div class='add'>+		g2b-p0-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;6 0&gt;;</div><div class='ctx'> 			input;</div><div class='ctx'> 			line-name = "FM_BMC_CPLD_PSU2_ON";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P0_7 {</div><div class='add'>+		g2b-p0-7-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;7 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "PSU2_ALERT_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_0 {</div><div class='add'>+		g2b-p1-0-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;8 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_CPU_BMC_INIT";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_1 {</div><div class='add'>+		g2b-p1-1-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;9 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "IRQ_BMC_PCH_SCI_LPC_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_2 {</div><div class='add'>+		g2b-p1-2-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;10 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "PMB_ALERT_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_3 {</div><div class='add'>+		g2b-p1-3-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;11 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "FM_FAST_PROCHOT_EN_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_4 {</div><div class='add'>+		g2b-p1-4-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;12 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 			line-name = "BMC_NVDIMM_PRSNT_N";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_5 {</div><div class='add'>+		g2b-p1-5-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;13 0&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			line-name = "FM_BACKUP_BIOS_SEL_H_BMC";</div><div class='ctx'> 		};</div><div class='del'>-		G2B_P1_6 {</div><div class='add'>+		g2b-p1-6-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;14 0&gt;;</div><div class='ctx'> 			output-high;</div><div class='hunk'>@@ -824,7 +824,7 @@</div><div class='ctx'> 		reg = &lt;0x4a&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='del'>-	m24128_fru@51 {</div><div class='add'>+	eeprom@51 {</div><div class='ctx'> 		compatible = "atmel,24c128";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 		pagesize = &lt;64&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi<br/>index 30eed40b89b5..65fe3a180bb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahb {</div><div class='del'>-		gmac1: eth@f0804000 {</div><div class='add'>+		gmac1: ethernet@f0804000 {</div><div class='ctx'> 			device_type = "network";</div><div class='ctx'> 			compatible = "snps,dwmac";</div><div class='ctx'> 			reg = &lt;0xf0804000 0x2000&gt;;</div><div class='hunk'>@@ -58,5 +58,70 @@</div><div class='ctx'> 					&amp;rg2mdio_pins&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		udc0: usb@f0830000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0830000 0x1000</div><div class='add'>+			       0xfffd0000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc1: usb@f0831000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0831000 0x1000</div><div class='add'>+			       0xfffd0800 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc2: usb@f0832000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0832000 0x1000</div><div class='add'>+			       0xfffd1000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc3: usb@f0833000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0833000 0x1000</div><div class='add'>+			       0xfffd1800 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		udc4: usb@f0834000 {</div><div class='add'>+			compatible = "nuvoton,npcm750-udc";</div><div class='add'>+			reg = &lt;0xf0834000 0x1000</div><div class='add'>+			       0xfffd2000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk NPCM7XX_CLK_SU&gt;;</div><div class='add'>+			clock-names = "clk_usb_bridge";</div><div class='add'>+			phys = &lt;&amp;udc0_phy&gt;;</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			dr_mode = "peripheral";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/Makefile b/arch/arm/boot/dts/nvidia/Makefile<br/>index 96972559253c..2ed2d923c8f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/Makefile</a></div><div class='hunk'>@@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_TEGRA_124_SOC) += \</div><div class='ctx'> 	tegra124-venice2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \</div><div class='ctx'> 	tegra20-acer-a500-picasso.dtb \</div><div class='add'>+	tegra20-asus-sl101.dtb \</div><div class='ctx'> 	tegra20-asus-tf101.dtb \</div><div class='ctx'> 	tegra20-harmony.dtb \</div><div class='ctx'> 	tegra20-colibri-eval-v3.dtb \</div><div class='hunk'>@@ -31,9 +32,12 @@ dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \</div><div class='ctx'> 	tegra30-asus-nexus7-grouper-PM269.dtb \</div><div class='ctx'> 	tegra30-asus-nexus7-grouper-E1565.dtb \</div><div class='ctx'> 	tegra30-asus-nexus7-tilapia-E1565.dtb \</div><div class='add'>+	tegra30-asus-p1801-t.dtb \</div><div class='ctx'> 	tegra30-asus-tf201.dtb \</div><div class='ctx'> 	tegra30-asus-tf300t.dtb \</div><div class='ctx'> 	tegra30-asus-tf300tg.dtb \</div><div class='add'>+	tegra30-asus-tf300tl.dtb \</div><div class='add'>+	tegra30-asus-tf600t.dtb \</div><div class='ctx'> 	tegra30-asus-tf700t.dtb \</div><div class='ctx'> 	tegra30-beaver.dtb \</div><div class='ctx'> 	tegra30-cardhu-a02.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi<br/>index 86f14e2fd29f..a2a50f959927 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra114.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra114.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra114.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra114.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;dt-bindings/memory/tegra114-mc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/pinctrl-tegra.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/nvidia,tegra114-car.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/tegra-pmc.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -139,7 +140,7 @@</div><div class='ctx'> 			reg = &lt;0x54400000 0x00040000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;tegra_car TEGRA114_CLK_DSIB&gt;,</div><div class='ctx'> 				 &lt;&amp;tegra_car TEGRA114_CLK_DSIBLP&gt;,</div><div class='del'>-				 &lt;&amp;tegra_car TEGRA114_CLK_PLL_D2_OUT0&gt;;</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA114_CLK_PLL_D_OUT0&gt;;</div><div class='ctx'> 			clock-names = "dsi", "lp", "parent";</div><div class='ctx'> 			resets = &lt;&amp;tegra_car 82&gt;;</div><div class='ctx'> 			reset-names = "dsi";</div><div class='hunk'>@@ -577,6 +578,21 @@</div><div class='ctx'> 		#iommu-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hda@70030000 {</div><div class='add'>+		compatible = "nvidia,tegra114-hda", "nvidia,tegra30-hda";</div><div class='add'>+		reg = &lt;0x70030000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA114_CLK_HDA&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA114_CLK_HDA2HDMI&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA114_CLK_HDA2CODEC_2X&gt;;</div><div class='add'>+		clock-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='add'>+		resets = &lt;&amp;tegra_car 125&gt;, /* hda */</div><div class='add'>+			 &lt;&amp;tegra_car 128&gt;, /* hda2hdmi */</div><div class='add'>+			 &lt;&amp;tegra_car 111&gt;; /* hda2codec_2x */</div><div class='add'>+		reset-names = "hda", "hda2hdmi", "hda2codec_2x";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ahub@70080000 {</div><div class='ctx'> 		compatible = "nvidia,tegra114-ahub";</div><div class='ctx'> 		reg = &lt;0x70080000 0x200&gt;,</div><div class='hunk'>@@ -678,6 +694,29 @@</div><div class='ctx'> 		#nvidia,mipi-calibrate-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dfll: clock@70110000 {</div><div class='add'>+		compatible = "nvidia,tegra114-dfll";</div><div class='add'>+		reg = &lt;0x70110000 0x100&gt;, /* DFLL control */</div><div class='add'>+		      &lt;0x70110000 0x100&gt;, /* I2C output control */</div><div class='add'>+		      &lt;0x70110100 0x100&gt;, /* Integrated I2C controller */</div><div class='add'>+		      &lt;0x70110200 0x100&gt;; /* Look-up table RAM */</div><div class='add'>+		interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA114_CLK_DFLL_SOC&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA114_CLK_DFLL_REF&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA114_CLK_I2C5&gt;;</div><div class='add'>+		clock-names = "soc", "ref", "i2c";</div><div class='add'>+		resets = &lt;&amp;tegra_car TEGRA114_RST_DFLL_DVCO&gt;;</div><div class='add'>+		reset-names = "dvco";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "dfllCPU_out";</div><div class='add'>+		nvidia,droop-ctrl = &lt;0x00000f00&gt;;</div><div class='add'>+		nvidia,force-mode = &lt;1&gt;;</div><div class='add'>+		nvidia,cf = &lt;10&gt;;</div><div class='add'>+		nvidia,ci = &lt;0&gt;;</div><div class='add'>+		nvidia,cg = &lt;2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mmc@78000000 {</div><div class='ctx'> 		compatible = "nvidia,tegra114-sdhci";</div><div class='ctx'> 		reg = &lt;0x78000000 0x200&gt;;</div><div class='hunk'>@@ -805,31 +844,49 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a15";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tegra_car TEGRA114_CLK_CCLK_G&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA114_CLK_CCLK_LP&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA114_CLK_PLL_X&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA114_CLK_PLL_P&gt;,</div><div class='add'>+				 &lt;&amp;dfll&gt;;</div><div class='add'>+			clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";</div><div class='add'>+			/* FIXME: what's the actual transition time? */</div><div class='add'>+			clock-latency = &lt;300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a15";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a15";</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a15";</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a15-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv7-timer";</div><div class='ctx'> 		interrupts =</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts b/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts<br/>index 0f3debeb294b..1aa7265554d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts</a></div><div class='hunk'>@@ -84,11 +84,6 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-		pcie-switch@58 {</div><div class='del'>-			compatible = "plx,pex8605";</div><div class='del'>-			reg = &lt;0x58&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* M41T0M6 real time clock on carrier board */</div><div class='ctx'> 		rtc@68 {</div><div class='ctx'> 			compatible = "st,m41t0";</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts<br/>index d13b8d25ca6a..23158bb82173 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts</a></div><div class='hunk'>@@ -85,11 +85,6 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-		pcie-switch@58 {</div><div class='del'>-			compatible = "plx,pex8605";</div><div class='del'>-			reg = &lt;0x58&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* M41T0M6 real time clock on carrier board */</div><div class='ctx'> 		rtc@68 {</div><div class='ctx'> 			compatible = "st,m41t0";</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi<br/>index 8125c1b3e8d7..974c76f007db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi</a></div><div class='hunk'>@@ -716,6 +716,7 @@</div><div class='ctx'> 		regulator-name = "+5V_USB_HS";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='ctx'> 		gpio = &lt;&amp;gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio-open-drain;</div><div class='hunk'>@@ -727,6 +728,7 @@</div><div class='ctx'> 		regulator-name = "+5V_USB_SS";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='ctx'> 		gpio = &lt;&amp;gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio-open-drain;</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra124.dtsi b/arch/arm/boot/dts/nvidia/tegra124.dtsi<br/>index 8f1fff373461..ec4f0e346b2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra124.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra124.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra124.dtsi</a></div><div class='hunk'>@@ -165,6 +165,22 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dsia: dsi@54300000 {</div><div class='add'>+			compatible = "nvidia,tegra124-dsi";</div><div class='add'>+			reg = &lt;0x0 0x54300000 0x0 0x00040000&gt;;</div><div class='add'>+			clocks = &lt;&amp;tegra_car TEGRA124_CLK_DSIA&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA124_CLK_DSIALP&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA124_CLK_PLL_D_OUT0&gt;;</div><div class='add'>+			clock-names = "dsi", "lp", "parent";</div><div class='add'>+			resets = &lt;&amp;tegra_car 48&gt;;</div><div class='add'>+			reset-names = "dsi";</div><div class='add'>+			nvidia,mipi-calibrate = &lt;&amp;mipi 0x060&gt;; /* DSIA &amp; DSIB pads */</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vic@54340000 {</div><div class='ctx'> 			compatible = "nvidia,tegra124-vic";</div><div class='ctx'> 			reg = &lt;0x0 0x54340000 0x0 0x00040000&gt;;</div><div class='hunk'>@@ -177,6 +193,22 @@</div><div class='ctx'> 			iommus = &lt;&amp;mc TEGRA_SWGROUP_VIC&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dsib: dsi@54400000 {</div><div class='add'>+			compatible = "nvidia,tegra124-dsi";</div><div class='add'>+			reg = &lt;0x0 0x54400000 0x0 0x00040000&gt;;</div><div class='add'>+			clocks = &lt;&amp;tegra_car TEGRA124_CLK_DSIB&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA124_CLK_DSIBLP&gt;,</div><div class='add'>+				 &lt;&amp;tegra_car TEGRA124_CLK_PLL_D_OUT0&gt;;</div><div class='add'>+			clock-names = "dsi", "lp", "parent";</div><div class='add'>+			resets = &lt;&amp;tegra_car 82&gt;;</div><div class='add'>+			reset-names = "dsi";</div><div class='add'>+			nvidia,mipi-calibrate = &lt;&amp;mipi 0x180&gt;; /* DSIC &amp; DSID pads */</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sor@54540000 {</div><div class='ctx'> 			compatible = "nvidia,tegra124-sor";</div><div class='ctx'> 			reg = &lt;0x0 0x54540000 0x0 0x00040000&gt;;</div><div class='hunk'>@@ -938,6 +970,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mipi: mipi@700e3000 {</div><div class='add'>+		compatible = "nvidia,tegra124-mipi";</div><div class='add'>+		reg = &lt;0x0 0x700e3000 0x0 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA124_CLK_MIPI_CAL&gt;;</div><div class='add'>+		clock-names = "mipi-cal";</div><div class='add'>+		#nvidia,mipi-calibrate-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	dfll: clock@70110000 {</div><div class='ctx'> 		compatible = "nvidia,tegra124-dfll";</div><div class='ctx'> 		reg = &lt;0 0x70110000 0 0x100&gt;, /* DFLL control */</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts b/arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts<br/>new file mode 100644<br/>index 000000000000..8828129d1fa3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra20-asus-sl101.dts</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "tegra20-asus-transformer-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ASUS Eee Pad Slider SL101";</div><div class='add'>+	compatible = "asus,sl101", "nvidia,tegra20";</div><div class='add'>+</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		magnetometer@e {</div><div class='add'>+			mount-matrix =  "1",  "0",  "0",</div><div class='add'>+					"0", "-1",  "0",</div><div class='add'>+					"0",  "0",  "1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Atmel MXT1386 Touchscreen */</div><div class='add'>+		touchscreen@5a {</div><div class='add'>+			compatible = "atmel,maxtouch";</div><div class='add'>+			reg = &lt;0x5a&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vdda-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vdd-supply  = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+			atmel,wakeup-method = &lt;ATMEL_MXT_WAKEUP_I2C_SCL&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gyroscope@68 {</div><div class='add'>+			mount-matrix =	 "0",  "1",  "0",</div><div class='add'>+					"-1",  "0",  "0",</div><div class='add'>+					 "0",  "0",  "1";</div><div class='add'>+</div><div class='add'>+			i2c-gate {</div><div class='add'>+				accelerometer@f {</div><div class='add'>+					mount-matrix =	 "1",  "0",  "0",</div><div class='add'>+							 "0", "-1",  "0",</div><div class='add'>+							 "0",  "0",  "1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extcon-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		switch-tablet-mode {</div><div class='add'>+			label = "Tablet Mode";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_TABLET_MODE&gt;;</div><div class='add'>+			debounce-interval = &lt;500&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts b/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts<br/>index e118809dc6d9..0d93820a5ad4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts</a></div><div class='hunk'>@@ -1,542 +1,19 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/input/atmel-maxtouch.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tegra20.dtsi"</div><div class='del'>-#include "tegra20-cpu-opp.dtsi"</div><div class='del'>-#include "tegra20-cpu-opp-microvolt.dtsi"</div><div class='add'>+#include "tegra20-asus-transformer-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "ASUS EeePad Transformer TF101";</div><div class='add'>+	model = "ASUS Eee Pad Transformer TF101";</div><div class='ctx'> 	compatible = "asus,tf101", "nvidia,tegra20";</div><div class='del'>-	chassis-type = "convertible";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		mmc0 = &amp;sdmmc4; /* eMMC */</div><div class='del'>-		mmc1 = &amp;sdmmc3; /* MicroSD */</div><div class='del'>-		mmc2 = &amp;sdmmc1; /* WiFi */</div><div class='del'>-</div><div class='del'>-		rtc0 = &amp;pmic;</div><div class='del'>-		rtc1 = "/rtc@7000e000";</div><div class='del'>-</div><div class='del'>-		serial0 = &amp;uartd;</div><div class='del'>-		serial1 = &amp;uartc; /* Bluetooth */</div><div class='del'>-		serial2 = &amp;uartb; /* GPS */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The decompressor and also some bootloaders rely on a</div><div class='del'>-	 * pre-existing /chosen node to be available to insert the</div><div class='del'>-	 * command line and merge other ATAGS info.</div><div class='del'>-	 */</div><div class='del'>-	chosen {};</div><div class='del'>-</div><div class='del'>-	memory@0 {</div><div class='del'>-		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		ramoops@2ffe0000 {</div><div class='del'>-			compatible = "ramoops";</div><div class='del'>-			reg = &lt;0x2ffe0000 0x10000&gt;;	/* 64kB */</div><div class='del'>-			console-size = &lt;0x8000&gt;;	/* 32kB */</div><div class='del'>-			record-size = &lt;0x400&gt;;		/*  1kB */</div><div class='del'>-			ecc-size = &lt;16&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		linux,cma@30000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			alloc-ranges = &lt;0x30000000 0x10000000&gt;;</div><div class='del'>-			size = &lt;0x10000000&gt;; /* 256MiB */</div><div class='del'>-			linux,cma-default;</div><div class='del'>-			reusable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	host1x@50000000 {</div><div class='del'>-		dc@54200000 {</div><div class='del'>-			rgb {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				port {</div><div class='del'>-					lcd_output: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;lvds_encoder_input&gt;;</div><div class='del'>-						bus-width = &lt;18&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hdmi@54280000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			vdd-supply = &lt;&amp;hdmi_vdd_reg&gt;;</div><div class='del'>-			pll-supply = &lt;&amp;hdmi_pll_reg&gt;;</div><div class='del'>-			hdmi-supply = &lt;&amp;vdd_hdmi_en&gt;;</div><div class='del'>-</div><div class='del'>-			nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='del'>-			nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7)</div><div class='del'>-				GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio@6000d000 {</div><div class='del'>-		charging-enable-hog {</div><div class='del'>-			gpio-hog;</div><div class='del'>-			gpios = &lt;TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			output-low;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinmux@70000014 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='del'>-</div><div class='del'>-		state_default: pinmux {</div><div class='del'>-			ata {</div><div class='del'>-				nvidia,pins = "ata";</div><div class='del'>-				nvidia,function = "ide";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			atb {</div><div class='del'>-				nvidia,pins = "atb", "gma", "gme";</div><div class='del'>-				nvidia,function = "sdio4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			atc {</div><div class='del'>-				nvidia,pins = "atc";</div><div class='del'>-				nvidia,function = "nand";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			atd {</div><div class='del'>-				nvidia,pins = "atd", "ate", "gmb", "spia",</div><div class='del'>-					"spib", "spic";</div><div class='del'>-				nvidia,function = "gmi";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cdev1 {</div><div class='del'>-				nvidia,pins = "cdev1";</div><div class='del'>-				nvidia,function = "plla_out";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cdev2 {</div><div class='del'>-				nvidia,pins = "cdev2";</div><div class='del'>-				nvidia,function = "pllp_out4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			crtp {</div><div class='del'>-				nvidia,pins = "crtp";</div><div class='del'>-				nvidia,function = "crt";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lm1 {</div><div class='del'>-				nvidia,pins = "lm1";</div><div class='del'>-				nvidia,function = "rsvd3";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			csus {</div><div class='del'>-				nvidia,pins = "csus";</div><div class='del'>-				nvidia,function = "vi_sensor_clk";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dap1 {</div><div class='del'>-				nvidia,pins = "dap1";</div><div class='del'>-				nvidia,function = "dap1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dap2 {</div><div class='del'>-				nvidia,pins = "dap2";</div><div class='del'>-				nvidia,function = "dap2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dap3 {</div><div class='del'>-				nvidia,pins = "dap3";</div><div class='del'>-				nvidia,function = "dap3";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dap4 {</div><div class='del'>-				nvidia,pins = "dap4";</div><div class='del'>-				nvidia,function = "dap4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dta {</div><div class='del'>-				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='del'>-				nvidia,function = "vi";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dtf {</div><div class='del'>-				nvidia,pins = "dtf";</div><div class='del'>-				nvidia,function = "i2c3";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gmc {</div><div class='del'>-				nvidia,pins = "gmc";</div><div class='del'>-				nvidia,function = "uartd";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gmd {</div><div class='del'>-				nvidia,pins = "gmd";</div><div class='del'>-				nvidia,function = "sflash";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gpu {</div><div class='del'>-				nvidia,pins = "gpu";</div><div class='del'>-				nvidia,function = "pwm";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gpu7 {</div><div class='del'>-				nvidia,pins = "gpu7";</div><div class='del'>-				nvidia,function = "rtck";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			gpv {</div><div class='del'>-				nvidia,pins = "gpv", "slxa";</div><div class='del'>-				nvidia,function = "pcie";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hdint {</div><div class='del'>-				nvidia,pins = "hdint";</div><div class='del'>-				nvidia,function = "hdmi";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i2cp {</div><div class='del'>-				nvidia,pins = "i2cp";</div><div class='del'>-				nvidia,function = "i2cp";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			irrx {</div><div class='del'>-				nvidia,pins = "irrx", "irtx";</div><div class='del'>-				nvidia,function = "uartb";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			kbca {</div><div class='del'>-				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='del'>-					"kbce", "kbcf";</div><div class='del'>-				nvidia,function = "kbc";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lcsn {</div><div class='del'>-				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",</div><div class='del'>-					"lsdi", "lvp0";</div><div class='del'>-				nvidia,function = "rsvd4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ld0 {</div><div class='del'>-				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='del'>-					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='del'>-					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='del'>-					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='del'>-					"lhp1", "lhp2", "lhs", "lpp", "lpw0",</div><div class='del'>-					"lpw2", "lsc0", "lsc1", "lsck", "lsda",</div><div class='del'>-					"lspi", "lvp1", "lvs";</div><div class='del'>-				nvidia,function = "displaya";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			owc {</div><div class='del'>-				nvidia,pins = "owc", "spdi", "spdo", "uac";</div><div class='del'>-				nvidia,function = "rsvd2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pmc {</div><div class='del'>-				nvidia,pins = "pmc";</div><div class='del'>-				nvidia,function = "pwr_on";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rm {</div><div class='del'>-				nvidia,pins = "rm";</div><div class='del'>-				nvidia,function = "i2c1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sdb {</div><div class='del'>-				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";</div><div class='del'>-				nvidia,function = "sdio3";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sdio1 {</div><div class='del'>-				nvidia,pins = "sdio1";</div><div class='del'>-				nvidia,function = "sdio1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			slxd {</div><div class='del'>-				nvidia,pins = "slxd";</div><div class='del'>-				nvidia,function = "spdif";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			spid {</div><div class='del'>-				nvidia,pins = "spid", "spie", "spif";</div><div class='del'>-				nvidia,function = "spi1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			spig {</div><div class='del'>-				nvidia,pins = "spig", "spih";</div><div class='del'>-				nvidia,function = "spi2_alt";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uaa {</div><div class='del'>-				nvidia,pins = "uaa", "uab", "uda";</div><div class='del'>-				nvidia,function = "ulpi";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uad {</div><div class='del'>-				nvidia,pins = "uad";</div><div class='del'>-				nvidia,function = "irda";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			uca {</div><div class='del'>-				nvidia,pins = "uca", "ucb";</div><div class='del'>-				nvidia,function = "uartc";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_ata {</div><div class='del'>-				nvidia,pins = "ata", "atb", "atc", "atd",</div><div class='del'>-					"cdev1", "cdev2", "dap1", "dap4",</div><div class='del'>-					"dte", "ddc", "dtf", "gma", "gmc",</div><div class='del'>-					"gme", "gpu", "gpu7", "gpv", "i2cp",</div><div class='del'>-					"irrx", "irtx", "pta", "rm", "sdc",</div><div class='del'>-					"sdd", "slxc", "slxd", "slxk", "spdi",</div><div class='del'>-					"spdo", "uac", "uad",</div><div class='del'>-					"uda", "csus";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_ate {</div><div class='del'>-				nvidia,pins = "ate", "dap2", "dap3", "gmb", "gmd",</div><div class='del'>-					"owc", "spia", "spib", "spic",</div><div class='del'>-					"spid", "spie", "spig", "slxa";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_ck32 {</div><div class='del'>-				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='del'>-					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_crtp {</div><div class='del'>-				nvidia,pins = "crtp", "spih";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_dta {</div><div class='del'>-				nvidia,pins = "dta", "dtb", "dtc", "dtd";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_spif {</div><div class='del'>-				nvidia,pins = "spif";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_hdint {</div><div class='del'>-				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='del'>-					"lpw1", "lsck", "lsda", "lsdi", "lvp0";</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_kbca {</div><div class='del'>-				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='del'>-					"kbce", "kbcf", "sdio1", "uaa", "uab",</div><div class='del'>-					"uca", "ucb";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_lc {</div><div class='del'>-				nvidia,pins = "lc", "ls";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_ld0 {</div><div class='del'>-				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='del'>-					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='del'>-					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='del'>-					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='del'>-					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='del'>-					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",</div><div class='del'>-					"lvp1", "lvs", "pmc", "sdb";</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			conf_ld17_0 {</div><div class='del'>-				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='del'>-					"ld23_22";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			drive_sdio1 {</div><div class='del'>-				nvidia,pins = "drive_sdio1", "drive_ddc", "drive_vi1";</div><div class='del'>-				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-				nvidia,schmitt = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='del'>-				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='del'>-				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='del'>-				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='del'>-				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			drive_csus {</div><div class='del'>-				nvidia,pins = "drive_csus";</div><div class='del'>-				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-				nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='del'>-				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='del'>-				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='del'>-				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='del'>-				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		state_i2cmux_ddc: pinmux-i2cmux-ddc {</div><div class='del'>-			ddc {</div><div class='del'>-				nvidia,pins = "ddc";</div><div class='del'>-				nvidia,function = "i2c2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pta {</div><div class='del'>-				nvidia,pins = "pta";</div><div class='del'>-				nvidia,function = "rsvd4";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		state_i2cmux_idle: pinmux-i2cmux-idle {</div><div class='del'>-			ddc {</div><div class='del'>-				nvidia,pins = "ddc";</div><div class='del'>-				nvidia,function = "rsvd4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pta {</div><div class='del'>-				nvidia,pins = "pta";</div><div class='del'>-				nvidia,function = "rsvd4";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		state_i2cmux_pta: pinmux-i2cmux-pta {</div><div class='del'>-			ddc {</div><div class='del'>-				nvidia,pins = "ddc";</div><div class='del'>-				nvidia,function = "rsvd4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pta {</div><div class='del'>-				nvidia,pins = "pta";</div><div class='del'>-				nvidia,function = "i2c2";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spdif@70002400 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		nvidia,fixed-parent-rate;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2s@70002800 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		nvidia,fixed-parent-rate;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006040 {</div><div class='del'>-		compatible = "nvidia,tegra20-hsuart";</div><div class='del'>-		reset-names = "serial";</div><div class='del'>-		/delete-property/ reg-shift;</div><div class='del'>-		/* GPS BCM4751 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006200 {</div><div class='del'>-		compatible = "nvidia,tegra20-hsuart";</div><div class='del'>-		reset-names = "serial";</div><div class='del'>-		/delete-property/ reg-shift;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		/* Azurewave AW-NH615 BCM4329B1 */</div><div class='del'>-		bluetooth {</div><div class='del'>-			compatible = "brcm,bcm4329-bt";</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "host-wakeup";</div><div class='del'>-</div><div class='del'>-			/* PLLP 216MHz / 16 / 4 */</div><div class='del'>-			max-speed = &lt;3375000&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='del'>-			clock-names = "txco";</div><div class='del'>-</div><div class='del'>-			vbat-supply  = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-			vddio-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-</div><div class='del'>-			device-wakeup-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			shutdown-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006300 {</div><div class='del'>-		/delete-property/ dmas;</div><div class='del'>-		/delete-property/ dma-names;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwm@7000a000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-		/* Aichi AMI306 digital compass */</div><div class='ctx'> 		magnetometer@e {</div><div class='del'>-			compatible = "asahi-kasei,ak8974";</div><div class='del'>-			reg = &lt;0xe&gt;;</div><div class='del'>-</div><div class='del'>-			avdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-			dvdd-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-</div><div class='ctx'> 			mount-matrix = "-1",  "0",  "0",</div><div class='ctx'> 					"0",  "1",  "0",</div><div class='ctx'> 					"0",  "0", "-1";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wm8903: audio-codec@1a {</div><div class='del'>-			compatible = "wlf,wm8903";</div><div class='del'>-			reg = &lt;0x1a&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='del'>-</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			micdet-cfg = &lt;0x83&gt;;</div><div class='del'>-			micdet-delay = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-			gpio-cfg = &lt;</div><div class='del'>-				0x00000600 /* DMIC_LR, output */</div><div class='del'>-				0x00000680 /* DMIC_DAT, input */</div><div class='del'>-				0x00000000 /* Speaker-enable GPIO, output, low */</div><div class='del'>-				0xffffffff /* don't touch */</div><div class='del'>-				0xffffffff /* don't touch */</div><div class='del'>-			&gt;;</div><div class='del'>-</div><div class='del'>-			AVDD-supply  = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-			CPVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-			DBVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-			DCVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* Atmel MXT1386 Touchscreen */</div><div class='ctx'> 		touchscreen@5b {</div><div class='ctx'> 			compatible = "atmel,maxtouch";</div><div class='hunk'>@@ -554,33 +31,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gyroscope@68 {</div><div class='del'>-			compatible = "invensense,mpu3050";</div><div class='del'>-			reg = &lt;0x68&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-</div><div class='del'>-			vdd-supply    = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-			vlogic-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-</div><div class='ctx'> 			mount-matrix =	 "0",  "1",  "0",</div><div class='ctx'> 					"-1",  "0",  "0",</div><div class='ctx'> 					 "0",  "0",  "1";</div><div class='ctx'> </div><div class='ctx'> 			i2c-gate {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'> 				accelerometer@f {</div><div class='del'>-					compatible = "kionix,kxtf9";</div><div class='del'>-					reg = &lt;0xf&gt;;</div><div class='del'>-</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-					interrupts = &lt;TEGRA_GPIO(N, 4) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-</div><div class='del'>-					vdd-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-					vddio-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-</div><div class='ctx'> 					mount-matrix =	"-1",  "0",  "0",</div><div class='ctx'> 							 "0", "-1",  "0",</div><div class='ctx'> 							 "0",  "0", "-1";</div><div class='hunk'>@@ -589,461 +45,9 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2: i2c@7000c400 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		clock-frequency = &lt;100000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c500 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000d000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-		pmic: pmic@34 {</div><div class='del'>-			compatible = "ti,tps6586x";</div><div class='del'>-			reg = &lt;0x34&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			ti,system-power-controller;</div><div class='del'>-</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-</div><div class='del'>-			sys-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-			vin-sm0-supply = &lt;&amp;sys_reg&gt;;</div><div class='del'>-			vin-sm1-supply = &lt;&amp;sys_reg&gt;;</div><div class='del'>-			vin-sm2-supply = &lt;&amp;sys_reg&gt;;</div><div class='del'>-			vinldo01-supply = &lt;&amp;sm2_reg&gt;;</div><div class='del'>-			vinldo23-supply = &lt;&amp;sm2_reg&gt;;</div><div class='del'>-			vinldo4-supply = &lt;&amp;sm2_reg&gt;;</div><div class='del'>-			vinldo678-supply = &lt;&amp;sm2_reg&gt;;</div><div class='del'>-			vinldo9-supply = &lt;&amp;sm2_reg&gt;;</div><div class='del'>-</div><div class='del'>-			regulators {</div><div class='del'>-				sys_reg: sys {</div><div class='del'>-					regulator-name = "vdd_sys";</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vdd_core: sm0 {</div><div class='del'>-					regulator-name = "vdd_sm0,vdd_core";</div><div class='del'>-					regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-					regulator-coupled-with = &lt;&amp;rtc_vdd &amp;vdd_cpu&gt;;</div><div class='del'>-					regulator-coupled-max-spread = &lt;170000 550000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-</div><div class='del'>-					nvidia,tegra-core-regulator;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vdd_cpu: sm1 {</div><div class='del'>-					regulator-name = "vdd_sm1,vdd_cpu";</div><div class='del'>-					regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1125000&gt;;</div><div class='del'>-					regulator-coupled-with = &lt;&amp;vdd_core &amp;rtc_vdd&gt;;</div><div class='del'>-					regulator-coupled-max-spread = &lt;550000 550000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-</div><div class='del'>-					nvidia,tegra-cpu-regulator;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				sm2_reg: sm2 {</div><div class='del'>-					regulator-name = "vdd_sm2,vin_ldo*";</div><div class='del'>-					regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3700000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				/* LDO0 is not connected to anything */</div><div class='del'>-</div><div class='del'>-				ldo1 {</div><div class='del'>-					regulator-name = "vdd_ldo1,avdd_pll*";</div><div class='del'>-					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				rtc_vdd: ldo2 {</div><div class='del'>-					regulator-name = "vdd_ldo2,vdd_rtc";</div><div class='del'>-					regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-					regulator-coupled-with = &lt;&amp;vdd_core &amp;vdd_cpu&gt;;</div><div class='del'>-					regulator-coupled-max-spread = &lt;170000 550000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-					regulator-boot-on;</div><div class='del'>-</div><div class='del'>-					nvidia,tegra-rtc-regulator;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo3 {</div><div class='del'>-					regulator-name = "vdd_ldo3,avdd_usb*";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo4 {</div><div class='del'>-					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				vcore_emmc: ldo5 {</div><div class='del'>-					regulator-name = "vdd_ldo5,vcore_mmc";</div><div class='del'>-					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo6 {</div><div class='del'>-					regulator-name = "vdd_ldo6,avdd_vdac";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				hdmi_vdd_reg: ldo7 {</div><div class='del'>-					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				hdmi_pll_reg: ldo8 {</div><div class='del'>-					regulator-name = "vdd_ldo8,avdd_hdmi_pll";</div><div class='del'>-					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo9 {</div><div class='del'>-					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";</div><div class='del'>-					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ldo_rtc {</div><div class='del'>-					regulator-name = "vdd_rtc_out,vdd_cell";</div><div class='del'>-					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-					regulator-always-on;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		nct1008: temperature-sensor@4c {</div><div class='del'>-			compatible = "onnn,nct1008";</div><div class='del'>-			reg = &lt;0x4c&gt;;</div><div class='del'>-			vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-</div><div class='del'>-			#thermal-sensor-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmc@7000e400 {</div><div class='del'>-		nvidia,invert-interrupt;</div><div class='del'>-		nvidia,suspend-mode = &lt;1&gt;;</div><div class='del'>-		nvidia,cpu-pwr-good-time = &lt;2000&gt;;</div><div class='del'>-		nvidia,cpu-pwr-off-time = &lt;100&gt;;</div><div class='del'>-		nvidia,core-pwr-good-time = &lt;3845 3845&gt;;</div><div class='del'>-		nvidia,core-pwr-off-time = &lt;458&gt;;</div><div class='del'>-		nvidia,sys-clock-req-active-high;</div><div class='del'>-		core-supply = &lt;&amp;vdd_core&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory-controller@7000f400 {</div><div class='del'>-		nvidia,use-ram-code;</div><div class='del'>-</div><div class='del'>-		emc-tables@3 {</div><div class='del'>-			reg = &lt;0x3&gt;;</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			emc-table@25000 {</div><div class='del'>-				reg = &lt;25000&gt;;</div><div class='del'>-				compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-				clock-frequency = &lt;25000&gt;;</div><div class='del'>-				nvidia,emc-registers = &lt;0x00000002 0x00000006</div><div class='del'>-					0x00000003 0x00000003 0x00000006 0x00000004</div><div class='del'>-					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='del'>-					0x00000002 0x00000002 0x00000002 0x00000004</div><div class='del'>-					0x00000003 0x00000008 0x0000000b 0x0000004d</div><div class='del'>-					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='del'>-					0x00000008 0x00000001 0x0000000a 0x00000004</div><div class='del'>-					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='del'>-					0x00000002 0x00000068 0x00000000 0x00000003</div><div class='del'>-					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='del'>-					0x00070000 0x00000000 0x00000000 0x00000003</div><div class='del'>-					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			emc-table@50000 {</div><div class='del'>-				reg = &lt;50000&gt;;</div><div class='del'>-				compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-				clock-frequency = &lt;50000&gt;;</div><div class='del'>-				nvidia,emc-registers = &lt;0x00000003 0x00000007</div><div class='del'>-					0x00000003 0x00000003 0x00000006 0x00000004</div><div class='del'>-					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='del'>-					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='del'>-					0x00000003 0x00000008 0x0000000b 0x0000009f</div><div class='del'>-					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='del'>-					0x00000008 0x00000001 0x0000000a 0x00000007</div><div class='del'>-					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='del'>-					0x00000002 0x000000d0 0x00000000 0x00000000</div><div class='del'>-					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='del'>-					0x00070000 0x00000000 0x00000000 0x00000005</div><div class='del'>-					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			emc-table@75000 {</div><div class='del'>-				reg = &lt;75000&gt;;</div><div class='del'>-				compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-				clock-frequency = &lt;75000&gt;;</div><div class='del'>-				nvidia,emc-registers = &lt;0x00000005 0x0000000a</div><div class='del'>-					0x00000004 0x00000003 0x00000006 0x00000004</div><div class='del'>-					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='del'>-					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='del'>-					0x00000003 0x00000008 0x0000000b 0x000000ff</div><div class='del'>-					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='del'>-					0x00000008 0x00000001 0x0000000a 0x0000000b</div><div class='del'>-					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='del'>-					0x00000002 0x00000138 0x00000000 0x00000000</div><div class='del'>-					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='del'>-					0x00070000 0x00000000 0x00000000 0x00000007</div><div class='del'>-					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			emc-table@150000 {</div><div class='del'>-				reg = &lt;150000&gt;;</div><div class='del'>-				compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-				clock-frequency = &lt;150000&gt;;</div><div class='del'>-				nvidia,emc-registers = &lt;0x00000009 0x00000014</div><div class='del'>-					0x00000007 0x00000003 0x00000006 0x00000004</div><div class='del'>-					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='del'>-					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='del'>-					0x00000003 0x00000008 0x0000000b 0x0000021f</div><div class='del'>-					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='del'>-					0x00000008 0x00000001 0x0000000a 0x00000015</div><div class='del'>-					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='del'>-					0x00000002 0x00000270 0x00000000 0x00000001</div><div class='del'>-					0x00000000 0x00000000 0x00000282 0xa07c04ae</div><div class='del'>-					0x007dc010 0x00000000 0x00000000 0x0000000e</div><div class='del'>-					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			emc-table@300000 {</div><div class='del'>-				reg = &lt;300000&gt;;</div><div class='del'>-				compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-				clock-frequency = &lt;300000&gt;;</div><div class='del'>-				nvidia,emc-registers = &lt;0x00000012 0x00000027</div><div class='del'>-					0x0000000d 0x00000006 0x00000007 0x00000005</div><div class='del'>-					0x00000003 0x00000009 0x00000006 0x00000006</div><div class='del'>-					0x00000003 0x00000003 0x00000002 0x00000006</div><div class='del'>-					0x00000003 0x00000009 0x0000000c 0x0000045f</div><div class='del'>-					0x00000000 0x00000004 0x00000004 0x00000006</div><div class='del'>-					0x00000008 0x00000001 0x0000000e 0x0000002a</div><div class='del'>-					0x00000003 0x0000000f 0x00000007 0x00000005</div><div class='del'>-					0x00000002 0x000004e0 0x00000005 0x00000002</div><div class='del'>-					0x00000000 0x00000000 0x00000282 0xe059048b</div><div class='del'>-					0x007e0010 0x00000000 0x00000000 0x0000001b</div><div class='del'>-					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpddr2 {</div><div class='del'>-				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";</div><div class='del'>-				revision-id = &lt;1 0&gt;;</div><div class='del'>-				density = &lt;2048&gt;;</div><div class='del'>-				io-width = &lt;16&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Peripheral USB via ASUS connector */</div><div class='del'>-	usb@c5000000 {</div><div class='del'>-		compatible = "nvidia,tegra20-udc";</div><div class='del'>-		status = "okay";</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb-phy@c5000000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		dr_mode = "peripheral";</div><div class='del'>-		nvidia,xcvr-setup-use-fuses;</div><div class='del'>-		nvidia,xcvr-lsfslew = &lt;2&gt;;</div><div class='del'>-		nvidia,xcvr-lsrslew = &lt;2&gt;;</div><div class='del'>-		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Dock's USB port */</div><div class='del'>-	usb@c5008000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb-phy@c5008000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		nvidia,xcvr-setup-use-fuses;</div><div class='del'>-		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdmmc1: mmc@c8000000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		assigned-clocks = &lt;&amp;tegra_car TEGRA20_CLK_SDMMC1&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;tegra_car TEGRA20_CLK_PLL_C&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;40000000&gt;;</div><div class='del'>-</div><div class='del'>-		max-frequency = &lt;40000000&gt;;</div><div class='del'>-		keep-power-in-suspend;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		non-removable;</div><div class='del'>-</div><div class='del'>-		mmc-pwrseq = &lt;&amp;brcm_wifi_pwrseq&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-</div><div class='del'>-		/* Azurewave AW-NH615 BCM4329B1 */</div><div class='del'>-		wifi@1 {</div><div class='del'>-			compatible = "brcm,bcm4329-fmac";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "host-wake";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdmmc3: mmc@c8000400 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		wp-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		power-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdmmc4: mmc@c8000600 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;vcore_emmc&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-		non-removable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mains: ac-adapter-detect {</div><div class='del'>-		compatible = "gpio-charger";</div><div class='del'>-		charger-type = "mains";</div><div class='del'>-		gpios = &lt;&amp;gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	backlight: backlight {</div><div class='del'>-		compatible = "pwm-backlight";</div><div class='del'>-</div><div class='del'>-		enable-gpios = &lt;&amp;gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		power-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm 2 4000000&gt;;</div><div class='del'>-</div><div class='del'>-		brightness-levels = &lt;7 255&gt;;</div><div class='del'>-		num-interpolated-steps = &lt;248&gt;;</div><div class='del'>-		default-brightness-level = &lt;20&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* PMIC has a built-in 32KHz oscillator which is used by PMC */</div><div class='del'>-	clk32k_in: clock-32k-in {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;32768&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpu1: cpu@1 {</div><div class='del'>-			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	display-panel {</div><div class='del'>-		compatible = "auo,b101ew05", "panel-lvds";</div><div class='del'>-</div><div class='del'>-		/* AUO B101EW05 using custom timings */</div><div class='del'>-</div><div class='del'>-		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-		ddc-i2c-bus = &lt;&amp;lvds_ddc&gt;;</div><div class='del'>-		power-supply = &lt;&amp;vdd_pnl_reg&gt;;</div><div class='del'>-</div><div class='del'>-		width-mm = &lt;218&gt;;</div><div class='del'>-		height-mm = &lt;135&gt;;</div><div class='del'>-</div><div class='del'>-		data-mapping = "jeida-18";</div><div class='del'>-</div><div class='del'>-		panel-timing {</div><div class='del'>-			clock-frequency = &lt;71200000&gt;;</div><div class='del'>-			hactive = &lt;1280&gt;;</div><div class='del'>-			vactive = &lt;800&gt;;</div><div class='del'>-			hfront-porch = &lt;8&gt;;</div><div class='del'>-			hback-porch = &lt;18&gt;;</div><div class='del'>-			hsync-len = &lt;184&gt;;</div><div class='del'>-			vsync-len = &lt;3&gt;;</div><div class='del'>-			vfront-porch = &lt;4&gt;;</div><div class='del'>-			vback-porch = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			panel_input: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lvds_encoder_output&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='add'>+	extcon-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		key-power {</div><div class='del'>-			label = "Power";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_POWER&gt;;</div><div class='del'>-			debounce-interval = &lt;10&gt;;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-volume-down {</div><div class='del'>-			label = "Volume Down";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-			debounce-interval = &lt;10&gt;;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-volume-up {</div><div class='del'>-			label = "Volume Up";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-			debounce-interval = &lt;10&gt;;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		switch-dock-hall-sensor {</div><div class='ctx'> 			label = "Lid";</div><div class='ctx'> 			gpios = &lt;&amp;gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -1054,242 +58,4 @@</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	i2cmux {</div><div class='del'>-		compatible = "i2c-mux-pinctrl";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		i2c-parent = &lt;&amp;i2c2&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "ddc", "pta", "idle";</div><div class='del'>-		pinctrl-0 = &lt;&amp;state_i2cmux_ddc&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;state_i2cmux_pta&gt;;</div><div class='del'>-		pinctrl-2 = &lt;&amp;state_i2cmux_idle&gt;;</div><div class='del'>-</div><div class='del'>-		hdmi_ddc: i2c@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lvds_ddc: i2c@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			smart-battery@b {</div><div class='del'>-				compatible = "ti,bq20z75", "sbs,sbs-battery";</div><div class='del'>-				reg = &lt;0xb&gt;;</div><div class='del'>-				sbs,i2c-retry-count = &lt;2&gt;;</div><div class='del'>-				sbs,poll-retry-count = &lt;10&gt;;</div><div class='del'>-				power-supplies = &lt;&amp;mains&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	lvds-encoder {</div><div class='del'>-		compatible = "ti,sn75lvds83", "lvds-encoder";</div><div class='del'>-</div><div class='del'>-		powerdown-gpios = &lt;&amp;gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		power-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				lvds_encoder_input: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;lcd_output&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				lvds_encoder_output: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_input&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	opp-table-emc {</div><div class='del'>-		/delete-node/ opp-666000000;</div><div class='del'>-		/delete-node/ opp-760000000;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_5v0_sys: regulator-5v0 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_5v0";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_3v3_sys: regulator-3v3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_3v3_vs";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulator-pcie {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "pcie_vdd";</div><div class='del'>-		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pmic 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_pnl_reg: regulator-panel {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_pnl";</div><div class='del'>-		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_1v8_sys: regulator-1v8 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_1v8_vs";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_hdmi_en: regulator-hdmi {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_5v0_hdmi_en";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		compatible = "asus,tegra-audio-wm8903-tf101",</div><div class='del'>-			     "nvidia,tegra-audio-wm8903";</div><div class='del'>-		nvidia,model = "Asus EeePad Transformer WM8903";</div><div class='del'>-</div><div class='del'>-		nvidia,audio-routing =</div><div class='del'>-			"Headphone Jack", "HPOUTR",</div><div class='del'>-			"Headphone Jack", "HPOUTL",</div><div class='del'>-			"Int Spk", "ROP",</div><div class='del'>-			"Int Spk", "RON",</div><div class='del'>-			"Int Spk", "LOP",</div><div class='del'>-			"Int Spk", "LON",</div><div class='del'>-			"IN2L", "Mic Jack",</div><div class='del'>-			"DMICDAT", "Int Mic";</div><div class='del'>-</div><div class='del'>-		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='del'>-		nvidia,audio-codec = &lt;&amp;wm8903&gt;;</div><div class='del'>-</div><div class='del'>-		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		nvidia,hp-det-gpios = &lt;&amp;gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		nvidia,mic-det-gpios = &lt;&amp;gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		nvidia,coupled-mic-hp-det;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;tegra_car TEGRA20_CLK_PLL_A&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA20_CLK_PLL_A_OUT0&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA20_CLK_CDEV1&gt;;</div><div class='del'>-		clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	thermal-zones {</div><div class='del'>-		/*</div><div class='del'>-		 * NCT1008 has two sensors:</div><div class='del'>-		 *</div><div class='del'>-		 *	0: internal that monitors ambient/skin temperature</div><div class='del'>-		 *	1: external that is connected to the CPU's diode</div><div class='del'>-		 *</div><div class='del'>-		 * Ideally we should use userspace thermal governor,</div><div class='del'>-		 * but it's a much more complex solution.  The "skin"</div><div class='del'>-		 * zone is a simpler solution which prevents TF101 from</div><div class='del'>-		 * getting too hot from a user's tactile perspective.</div><div class='del'>-		 * The CPU zone is intended to protect silicon from damage.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		skin-thermal {</div><div class='del'>-			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='del'>-			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='del'>-</div><div class='del'>-			thermal-sensors = &lt;&amp;nct1008 0&gt;;</div><div class='del'>-</div><div class='del'>-			trips {</div><div class='del'>-				trip0: skin-alert {</div><div class='del'>-					/* start throttling at 60C */</div><div class='del'>-					temperature = &lt;60000&gt;;</div><div class='del'>-					hysteresis = &lt;200&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip1: skin-crit {</div><div class='del'>-					/* shut down at 70C */</div><div class='del'>-					temperature = &lt;70000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "critical";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cooling-maps {</div><div class='del'>-				map0 {</div><div class='del'>-					trip = &lt;&amp;trip0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpu-thermal {</div><div class='del'>-			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='del'>-			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='del'>-</div><div class='del'>-			thermal-sensors = &lt;&amp;nct1008 1&gt;;</div><div class='del'>-</div><div class='del'>-			trips {</div><div class='del'>-				trip2: cpu-alert {</div><div class='del'>-					/* throttle at 85C until temperature drops to 84.8C */</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;200&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip3: cpu-crit {</div><div class='del'>-					/* shut down at 90C */</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "critical";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cooling-maps {</div><div class='del'>-				map1 {</div><div class='del'>-					trip = &lt;&amp;trip2&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	brcm_wifi_pwrseq: wifi-pwrseq {</div><div class='del'>-		compatible = "mmc-pwrseq-simple";</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='del'>-		clock-names = "ext_clock";</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		post-power-on-delay-ms = &lt;200&gt;;</div><div class='del'>-		power-off-delay-us = &lt;200&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi b/arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi<br/>new file mode 100644<br/>index 000000000000..b48f53c00efa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1268 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/atmel-maxtouch.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra20.dtsi"</div><div class='add'>+#include "tegra20-cpu-opp.dtsi"</div><div class='add'>+#include "tegra20-cpu-opp-microvolt.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "convertible";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdmmc4; /* eMMC */</div><div class='add'>+		mmc1 = &amp;sdmmc3; /* MicroSD */</div><div class='add'>+		mmc2 = &amp;sdmmc1; /* WiFi */</div><div class='add'>+</div><div class='add'>+		rtc0 = &amp;pmic;</div><div class='add'>+		rtc1 = "/rtc@7000e000";</div><div class='add'>+</div><div class='add'>+		serial0 = &amp;uartd;</div><div class='add'>+		serial1 = &amp;uartc; /* Bluetooth */</div><div class='add'>+		serial2 = &amp;uartb; /* GPS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The decompressor and also some bootloaders rely on a</div><div class='add'>+	 * pre-existing /chosen node to be available to insert the</div><div class='add'>+	 * command line and merge other ATAGS info.</div><div class='add'>+	 */</div><div class='add'>+	chosen {};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@2ffe0000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x2ffe0000 0x10000&gt;;	/* 64kB */</div><div class='add'>+			console-size = &lt;0x8000&gt;;	/* 32kB */</div><div class='add'>+			record-size = &lt;0x400&gt;;		/*  1kB */</div><div class='add'>+			ecc-size = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		linux,cma@30000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0x30000000 0x10000000&gt;;</div><div class='add'>+			size = &lt;0x10000000&gt;; /* 256MiB */</div><div class='add'>+			linux,cma-default;</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	host1x@50000000 {</div><div class='add'>+		dc@54200000 {</div><div class='add'>+			rgb {</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					lcd_output: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;lvds_encoder_input&gt;;</div><div class='add'>+						bus-width = &lt;18&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdmi@54280000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			vdd-supply = &lt;&amp;hdmi_vdd_reg&gt;;</div><div class='add'>+			pll-supply = &lt;&amp;hdmi_pll_reg&gt;;</div><div class='add'>+			hdmi-supply = &lt;&amp;vdd_hdmi_en&gt;;</div><div class='add'>+</div><div class='add'>+			nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+			nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7)</div><div class='add'>+				GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@6000d000 {</div><div class='add'>+		charging-enable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux@70000014 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata";</div><div class='add'>+				nvidia,function = "ide";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			atc {</div><div class='add'>+				nvidia,pins = "atc";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			atd {</div><div class='add'>+				nvidia,pins = "atd", "ate", "gmb", "spia",</div><div class='add'>+					"spib", "spic";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lm1 {</div><div class='add'>+				nvidia,pins = "lm1";</div><div class='add'>+				nvidia,function = "rsvd3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "vi_sensor_clk";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap2 {</div><div class='add'>+				nvidia,pins = "dap2";</div><div class='add'>+				nvidia,function = "dap2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmc {</div><div class='add'>+				nvidia,pins = "gmc";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmd {</div><div class='add'>+				nvidia,pins = "gmd";</div><div class='add'>+				nvidia,function = "sflash";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpu {</div><div class='add'>+				nvidia,pins = "gpu";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",</div><div class='add'>+					"lsdi", "lvp0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lpp", "lpw0",</div><div class='add'>+					"lpw2", "lsc0", "lsc1", "lsck", "lsda",</div><div class='add'>+					"lspi", "lvp1", "lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			owc {</div><div class='add'>+				nvidia,pins = "owc", "spdi", "spdo", "uac";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdb {</div><div class='add'>+				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";</div><div class='add'>+				nvidia,function = "sdio3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slxd {</div><div class='add'>+				nvidia,pins = "slxd";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spid {</div><div class='add'>+				nvidia,pins = "spid", "spie", "spif";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "irda";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-ata {</div><div class='add'>+				nvidia,pins = "ata", "atb", "atc", "atd",</div><div class='add'>+					"cdev1", "cdev2", "dap1", "dap4",</div><div class='add'>+					"dte", "ddc", "dtf", "gma", "gmc",</div><div class='add'>+					"gme", "gpu", "gpu7", "gpv", "i2cp",</div><div class='add'>+					"irrx", "irtx", "pta", "rm", "sdc",</div><div class='add'>+					"sdd", "slxc", "slxd", "slxk", "spdi",</div><div class='add'>+					"spdo", "uac", "uad",</div><div class='add'>+					"uda", "csus";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-ate {</div><div class='add'>+				nvidia,pins = "ate", "dap2", "dap3", "gmb", "gmd",</div><div class='add'>+					"owc", "spia", "spib", "spic",</div><div class='add'>+					"spid", "spie", "spig", "slxa";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-crtp {</div><div class='add'>+				nvidia,pins = "crtp", "spih";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-spif {</div><div class='add'>+				nvidia,pins = "spif";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='add'>+					"lpw1", "lsck", "lsda", "lsdi", "lvp0";</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf", "sdio1", "uaa", "uab",</div><div class='add'>+					"uca", "ucb";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='add'>+					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",</div><div class='add'>+					"lvp1", "lvs", "pmc", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			conf-ld17-0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			drive-sdio1 {</div><div class='add'>+				nvidia,pins = "drive_sdio1", "drive_ddc", "drive_vi1";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			drive-csus {</div><div class='add'>+				nvidia,pins = "drive_csus";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		state_i2cmux_ddc: pinmux-i2cmux-ddc {</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pta {</div><div class='add'>+				nvidia,pins = "pta";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		state_i2cmux_idle: pinmux-i2cmux-idle {</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pta {</div><div class='add'>+				nvidia,pins = "pta";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		state_i2cmux_pta: pinmux-i2cmux-pta {</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pta {</div><div class='add'>+				nvidia,pins = "pta";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif@70002400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		nvidia,fixed-parent-rate;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		nvidia,fixed-parent-rate;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006040 {</div><div class='add'>+		compatible = "nvidia,tegra20-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		/* GPS BCM4751 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006200 {</div><div class='add'>+		compatible = "nvidia,tegra20-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-NH615 BCM4329B1 */</div><div class='add'>+		bluetooth {</div><div class='add'>+			compatible = "brcm,bcm4329-bt";</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "host-wakeup";</div><div class='add'>+</div><div class='add'>+			/* PLLP 216MHz / 16 / 4 */</div><div class='add'>+			max-speed = &lt;3375000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='add'>+			clock-names = "txco";</div><div class='add'>+</div><div class='add'>+			vbat-supply  = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+</div><div class='add'>+			device-wakeup-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			shutdown-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006300 {</div><div class='add'>+		/delete-property/ dmas;</div><div class='add'>+		/delete-property/ dma-names;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@7000a000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		/* Aichi AMI306 digital compass */</div><div class='add'>+		magnetometer@e {</div><div class='add'>+			compatible = "asahi-kasei,ak8974";</div><div class='add'>+			reg = &lt;0xe&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			avdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			dvdd-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wm8903: audio-codec@1a {</div><div class='add'>+			compatible = "wlf,wm8903";</div><div class='add'>+			reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			micdet-cfg = &lt;0x83&gt;;</div><div class='add'>+			micdet-delay = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-cfg = &lt;</div><div class='add'>+				0x00000600 /* DMIC_LR, output */</div><div class='add'>+				0x00000680 /* DMIC_DAT, input */</div><div class='add'>+				0x00000000 /* Speaker-enable GPIO, output, low */</div><div class='add'>+				0xffffffff /* don't touch */</div><div class='add'>+				0xffffffff /* don't touch */</div><div class='add'>+			&gt;;</div><div class='add'>+</div><div class='add'>+			AVDD-supply  = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+			CPVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+			DBVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+			DCVDD-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gyroscope@68 {</div><div class='add'>+			compatible = "invensense,mpu3050";</div><div class='add'>+			reg = &lt;0x68&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply    = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vlogic-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+</div><div class='add'>+			i2c-gate {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				accelerometer@f {</div><div class='add'>+					compatible = "kionix,kxtf9";</div><div class='add'>+					reg = &lt;0xf&gt;;</div><div class='add'>+</div><div class='add'>+					interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+					interrupts = &lt;TEGRA_GPIO(N, 4) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+					vdd-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+					vddio-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2: i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		pmic: pmic@34 {</div><div class='add'>+			compatible = "ti,tps6586x";</div><div class='add'>+			reg = &lt;0x34&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			ti,system-power-controller;</div><div class='add'>+</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+</div><div class='add'>+			sys-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+			vin-sm0-supply = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			vin-sm1-supply = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			vin-sm2-supply = &lt;&amp;sys_reg&gt;;</div><div class='add'>+			vinldo01-supply = &lt;&amp;sm2_reg&gt;;</div><div class='add'>+			vinldo23-supply = &lt;&amp;sm2_reg&gt;;</div><div class='add'>+			vinldo4-supply = &lt;&amp;sm2_reg&gt;;</div><div class='add'>+			vinldo678-supply = &lt;&amp;sm2_reg&gt;;</div><div class='add'>+			vinldo9-supply = &lt;&amp;sm2_reg&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				sys_reg: sys {</div><div class='add'>+					regulator-name = "vdd_sys";</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_core: sm0 {</div><div class='add'>+					regulator-name = "vdd_sm0,vdd_core";</div><div class='add'>+					regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+					regulator-coupled-with = &lt;&amp;rtc_vdd &amp;vdd_cpu&gt;;</div><div class='add'>+					regulator-coupled-max-spread = &lt;170000 550000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+</div><div class='add'>+					nvidia,tegra-core-regulator;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_cpu: sm1 {</div><div class='add'>+					regulator-name = "vdd_sm1,vdd_cpu";</div><div class='add'>+					regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1125000&gt;;</div><div class='add'>+					regulator-coupled-with = &lt;&amp;vdd_core &amp;rtc_vdd&gt;;</div><div class='add'>+					regulator-coupled-max-spread = &lt;550000 550000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+</div><div class='add'>+					nvidia,tegra-cpu-regulator;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sm2_reg: sm2 {</div><div class='add'>+					regulator-name = "vdd_sm2,vin_ldo*";</div><div class='add'>+					regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* LDO0 is not connected to anything */</div><div class='add'>+</div><div class='add'>+				ldo1 {</div><div class='add'>+					regulator-name = "vdd_ldo1,avdd_pll*";</div><div class='add'>+					regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rtc_vdd: ldo2 {</div><div class='add'>+					regulator-name = "vdd_ldo2,vdd_rtc";</div><div class='add'>+					regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+					regulator-coupled-with = &lt;&amp;vdd_core &amp;vdd_cpu&gt;;</div><div class='add'>+					regulator-coupled-max-spread = &lt;170000 550000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+</div><div class='add'>+					nvidia,tegra-rtc-regulator;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo3 {</div><div class='add'>+					regulator-name = "vdd_ldo3,avdd_usb*";</div><div class='add'>+					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo4 {</div><div class='add'>+					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vcore_emmc: ldo5 {</div><div class='add'>+					regulator-name = "vdd_ldo5,vcore_mmc";</div><div class='add'>+					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo6 {</div><div class='add'>+					regulator-name = "vdd_ldo6,avdd_vdac";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				hdmi_vdd_reg: ldo7 {</div><div class='add'>+					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";</div><div class='add'>+					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				hdmi_pll_reg: ldo8 {</div><div class='add'>+					regulator-name = "vdd_ldo8,avdd_hdmi_pll";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo9 {</div><div class='add'>+					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";</div><div class='add'>+					regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo_rtc {</div><div class='add'>+					regulator-name = "vdd_rtc_out,vdd_cell";</div><div class='add'>+					regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nct1008: temperature-sensor@4c {</div><div class='add'>+			compatible = "onnn,nct1008";</div><div class='add'>+			reg = &lt;0x4c&gt;;</div><div class='add'>+			vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmc@7000e400 {</div><div class='add'>+		nvidia,invert-interrupt;</div><div class='add'>+		nvidia,suspend-mode = &lt;1&gt;;</div><div class='add'>+		nvidia,cpu-pwr-good-time = &lt;2000&gt;;</div><div class='add'>+		nvidia,cpu-pwr-off-time = &lt;100&gt;;</div><div class='add'>+		nvidia,core-pwr-good-time = &lt;3845 3845&gt;;</div><div class='add'>+		nvidia,core-pwr-off-time = &lt;458&gt;;</div><div class='add'>+		nvidia,sys-clock-req-active-high;</div><div class='add'>+		core-supply = &lt;&amp;vdd_core&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f400 {</div><div class='add'>+		nvidia,use-ram-code;</div><div class='add'>+</div><div class='add'>+		emc-tables@3 {</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			emc-table@25000 {</div><div class='add'>+				reg = &lt;25000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;25000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000002 0x00000006</div><div class='add'>+					0x00000003 0x00000003 0x00000006 0x00000004</div><div class='add'>+					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='add'>+					0x00000002 0x00000002 0x00000002 0x00000004</div><div class='add'>+					0x00000003 0x00000008 0x0000000b 0x0000004d</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000001 0x0000000a 0x00000004</div><div class='add'>+					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='add'>+					0x00000002 0x00000068 0x00000000 0x00000003</div><div class='add'>+					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='add'>+					0x00070000 0x00000000 0x00000000 0x00000003</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emc-table@50000 {</div><div class='add'>+				reg = &lt;50000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;50000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000003 0x00000007</div><div class='add'>+					0x00000003 0x00000003 0x00000006 0x00000004</div><div class='add'>+					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='add'>+					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='add'>+					0x00000003 0x00000008 0x0000000b 0x0000009f</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000001 0x0000000a 0x00000007</div><div class='add'>+					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='add'>+					0x00000002 0x000000d0 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='add'>+					0x00070000 0x00000000 0x00000000 0x00000005</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emc-table@75000 {</div><div class='add'>+				reg = &lt;75000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;75000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000005 0x0000000a</div><div class='add'>+					0x00000004 0x00000003 0x00000006 0x00000004</div><div class='add'>+					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='add'>+					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='add'>+					0x00000003 0x00000008 0x0000000b 0x000000ff</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000001 0x0000000a 0x0000000b</div><div class='add'>+					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='add'>+					0x00000002 0x00000138 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000282 0xa0ae04ae</div><div class='add'>+					0x00070000 0x00000000 0x00000000 0x00000007</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emc-table@150000 {</div><div class='add'>+				reg = &lt;150000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;150000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000009 0x00000014</div><div class='add'>+					0x00000007 0x00000003 0x00000006 0x00000004</div><div class='add'>+					0x00000002 0x00000009 0x00000003 0x00000003</div><div class='add'>+					0x00000002 0x00000002 0x00000002 0x00000005</div><div class='add'>+					0x00000003 0x00000008 0x0000000b 0x0000021f</div><div class='add'>+					0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000001 0x0000000a 0x00000015</div><div class='add'>+					0x00000003 0x00000008 0x00000004 0x00000006</div><div class='add'>+					0x00000002 0x00000270 0x00000000 0x00000001</div><div class='add'>+					0x00000000 0x00000000 0x00000282 0xa07c04ae</div><div class='add'>+					0x007dc010 0x00000000 0x00000000 0x0000000e</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emc-table@300000 {</div><div class='add'>+				reg = &lt;300000&gt;;</div><div class='add'>+				compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+				clock-frequency = &lt;300000&gt;;</div><div class='add'>+				nvidia,emc-registers = &lt;0x00000012 0x00000027</div><div class='add'>+					0x0000000d 0x00000006 0x00000007 0x00000005</div><div class='add'>+					0x00000003 0x00000009 0x00000006 0x00000006</div><div class='add'>+					0x00000003 0x00000003 0x00000002 0x00000006</div><div class='add'>+					0x00000003 0x00000009 0x0000000c 0x0000045f</div><div class='add'>+					0x00000000 0x00000004 0x00000004 0x00000006</div><div class='add'>+					0x00000008 0x00000001 0x0000000e 0x0000002a</div><div class='add'>+					0x00000003 0x0000000f 0x00000007 0x00000005</div><div class='add'>+					0x00000002 0x000004e0 0x00000005 0x00000002</div><div class='add'>+					0x00000000 0x00000000 0x00000282 0xe059048b</div><div class='add'>+					0x007e0010 0x00000000 0x00000000 0x0000001b</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpddr2 {</div><div class='add'>+				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";</div><div class='add'>+				revision-id = &lt;1 0&gt;;</div><div class='add'>+				density = &lt;2048&gt;;</div><div class='add'>+				io-width = &lt;16&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Peripheral USB via ASUS connector */</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		compatible = "nvidia,tegra20-udc";</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+		nvidia,xcvr-setup-use-fuses;</div><div class='add'>+		nvidia,xcvr-lsfslew = &lt;2&gt;;</div><div class='add'>+		nvidia,xcvr-lsrslew = &lt;2&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Dock's USB port */</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,xcvr-setup-use-fuses;</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1: mmc@c8000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA20_CLK_SDMMC1&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA20_CLK_PLL_C&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+</div><div class='add'>+		max-frequency = &lt;40000000&gt;;</div><div class='add'>+		keep-power-in-suspend;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		non-removable;</div><div class='add'>+</div><div class='add'>+		mmc-pwrseq = &lt;&amp;brcm_wifi_pwrseq&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-NH615 BCM4329B1 */</div><div class='add'>+		wifi@1 {</div><div class='add'>+			compatible = "brcm,bcm4329-fmac";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "host-wake";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc3: mmc@c8000400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		cd-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		wp-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc4: mmc@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;vcore_emmc&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		non-removable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mains: ac-adapter-detect {</div><div class='add'>+		compatible = "gpio-charger";</div><div class='add'>+		charger-type = "mains";</div><div class='add'>+		gpios = &lt;&amp;gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 2 4000000&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;7 255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;248&gt;;</div><div class='add'>+		default-brightness-level = &lt;20&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMIC has a built-in 32KHz oscillator which is used by PMC */</div><div class='add'>+	clk32k_in: clock-32k-in {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display-panel {</div><div class='add'>+		compatible = "auo,b101ew05", "panel-lvds";</div><div class='add'>+</div><div class='add'>+		/* AUO B101EW05 using custom timings */</div><div class='add'>+</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		ddc-i2c-bus = &lt;&amp;lvds_ddc&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vdd_pnl_reg&gt;;</div><div class='add'>+</div><div class='add'>+		width-mm = &lt;218&gt;;</div><div class='add'>+		height-mm = &lt;135&gt;;</div><div class='add'>+</div><div class='add'>+		data-mapping = "jeida-18";</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;71200000&gt;;</div><div class='add'>+			hactive = &lt;1280&gt;;</div><div class='add'>+			vactive = &lt;800&gt;;</div><div class='add'>+			hfront-porch = &lt;8&gt;;</div><div class='add'>+			hback-porch = &lt;18&gt;;</div><div class='add'>+			hsync-len = &lt;184&gt;;</div><div class='add'>+			vsync-len = &lt;3&gt;;</div><div class='add'>+			vfront-porch = &lt;4&gt;;</div><div class='add'>+			vback-porch = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_input: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds_encoder_output&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2cmux {</div><div class='add'>+		compatible = "i2c-mux-pinctrl";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-parent = &lt;&amp;i2c2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "ddc", "pta", "idle";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_i2cmux_ddc&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;state_i2cmux_pta&gt;;</div><div class='add'>+		pinctrl-2 = &lt;&amp;state_i2cmux_idle&gt;;</div><div class='add'>+</div><div class='add'>+		hdmi_ddc: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lvds_ddc: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			smart-battery@b {</div><div class='add'>+				compatible = "ti,bq20z75", "sbs,sbs-battery";</div><div class='add'>+				reg = &lt;0xb&gt;;</div><div class='add'>+				sbs,i2c-retry-count = &lt;2&gt;;</div><div class='add'>+				sbs,poll-retry-count = &lt;10&gt;;</div><div class='add'>+				power-supplies = &lt;&amp;mains&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Dynaimage ambient light sensor */</div><div class='add'>+			light-sensor@1c {</div><div class='add'>+				compatible = "dynaimage,al3000a";</div><div class='add'>+				reg = &lt;0x1c&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				vdd-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lvds-encoder {</div><div class='add'>+		compatible = "ti,sn75lvds83", "lvds-encoder";</div><div class='add'>+</div><div class='add'>+		powerdown-gpios = &lt;&amp;gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_input: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;lcd_output&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_output: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_input&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-emc {</div><div class='add'>+		/delete-node/ opp-666000000;</div><div class='add'>+		/delete-node/ opp-760000000;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_sys: regulator-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_sys: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_vs";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pcie_vdd";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pmic 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_pnl_reg: regulator-panel {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_pnl";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_1v8_sys: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_1v8_vs";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_hdmi_en: regulator-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_hdmi_en";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "asus,tegra-audio-wm8903-tf101",</div><div class='add'>+			     "nvidia,tegra-audio-wm8903";</div><div class='add'>+		nvidia,model = "Asus EeePad Transformer WM8903";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Int Spk", "ROP",</div><div class='add'>+			"Int Spk", "RON",</div><div class='add'>+			"Int Spk", "LOP",</div><div class='add'>+			"Int Spk", "LON",</div><div class='add'>+			"IN2L", "Mic Jack",</div><div class='add'>+			"DMICDAT", "Int Mic";</div><div class='add'>+</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;wm8903&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		nvidia,mic-det-gpios = &lt;&amp;gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		nvidia,coupled-mic-hp-det;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA20_CLK_PLL_A&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA20_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA20_CLK_CDEV1&gt;;</div><div class='add'>+		clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		/*</div><div class='add'>+		 * NCT1008 has two sensors:</div><div class='add'>+		 *</div><div class='add'>+		 *	0: internal that monitors ambient/skin temperature</div><div class='add'>+		 *	1: external that is connected to the CPU's diode</div><div class='add'>+		 *</div><div class='add'>+		 * Ideally we should use userspace thermal governor,</div><div class='add'>+		 * but it's a much more complex solution.  The "skin"</div><div class='add'>+		 * zone is a simpler solution which prevents TF101 from</div><div class='add'>+		 * getting too hot from a user's tactile perspective.</div><div class='add'>+		 * The CPU zone is intended to protect silicon from damage.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		skin-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct1008 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0: skin-alert {</div><div class='add'>+					/* start throttling at 60C */</div><div class='add'>+					temperature = &lt;60000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1: skin-crit {</div><div class='add'>+					/* shut down at 70C */</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;trip0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct1008 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip2: cpu-alert {</div><div class='add'>+					/* throttle at 85C until temperature drops to 84.8C */</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip3: cpu-crit {</div><div class='add'>+					/* shut down at 90C */</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;trip2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	brcm_wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		power-off-delay-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra20.dtsi b/arch/arm/boot/dts/nvidia/tegra20.dtsi<br/>index 8da75ccc4402..882adb7f2f26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra20.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra20.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra20.dtsi</a></div><div class='hunk'>@@ -284,7 +284,7 @@</div><div class='ctx'> 		reg = &lt;0x60007000 0x1000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	apbdma: dma@6000a000 {</div><div class='add'>+	apbdma: dma-controller@6000a000 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-apbdma";</div><div class='ctx'> 		reg = &lt;0x6000a000 0x1200&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts b/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts<br/>index fc284155cd76..ccb9f29c5de3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts</a></div><div class='hunk'>@@ -91,11 +91,6 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-		pcie-switch@58 {</div><div class='del'>-			compatible = "plx,pex8605";</div><div class='del'>-			reg = &lt;0x58&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* M41T0M6 real time clock on carrier board */</div><div class='ctx'> 		rtc@68 {</div><div class='ctx'> 			compatible = "st,m41t0";</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts<br/>index 9d08e2b094b4..bc353324df43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts</a></div><div class='hunk'>@@ -92,11 +92,6 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-		pcie-switch@58 {</div><div class='del'>-			compatible = "plx,pex8605";</div><div class='del'>-			reg = &lt;0x58&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* M41T0M6 real time clock on carrier board */</div><div class='ctx'> 		rtc@68 {</div><div class='ctx'> 			compatible = "st,m41t0";</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts b/arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts<br/>new file mode 100644<br/>index 000000000000..9241cc269a89<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-asus-p1801-t.dts</a></div><div class='hunk'>@@ -0,0 +1,2087 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra30.dtsi"</div><div class='add'>+#include "tegra30-cpu-opp.dtsi"</div><div class='add'>+#include "tegra30-cpu-opp-microvolt.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Asus Portable AiO P1801-T";</div><div class='add'>+	compatible = "asus,p1801-t", "nvidia,tegra30";</div><div class='add'>+	chassis-type = "convertible";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdmmc4; /* eMMC */</div><div class='add'>+		mmc1 = &amp;sdmmc1; /* uSD slot */</div><div class='add'>+		mmc2 = &amp;sdmmc3; /* WiFi */</div><div class='add'>+</div><div class='add'>+		rtc0 = &amp;pmic;</div><div class='add'>+		rtc1 = "/rtc@7000e000";</div><div class='add'>+</div><div class='add'>+		display0 = &amp;hdmi;</div><div class='add'>+</div><div class='add'>+		serial1 = &amp;uartc; /* Bluetooth */</div><div class='add'>+		serial2 = &amp;uartb; /* GPS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The decompressor and also some bootloaders rely on a</div><div class='add'>+	 * pre-existing /chosen node to be available to insert the</div><div class='add'>+	 * command line and merge other ATAGS info.</div><div class='add'>+	 */</div><div class='add'>+	chosen {};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		trusted-foundations {</div><div class='add'>+			compatible = "tlm,trusted-foundations";</div><div class='add'>+			tlm,version-major = &lt;2&gt;;</div><div class='add'>+			tlm,version-minor = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		linux,cma@80000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0x80000000 0x30000000&gt;;</div><div class='add'>+			size = &lt;0x10000000&gt;;		/* 256MiB */</div><div class='add'>+			linux,cma-default;</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer@abe01000 {</div><div class='add'>+			reg = &lt;0xabe01000 (1920 * 1080 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trustzone@bfe00000 {</div><div class='add'>+			reg = &lt;0xbfe00000 0x200000&gt;;	/* 2MB */</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ramoops@fea00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0xfea00000 0x10000&gt;;	/* 64kB */</div><div class='add'>+			console-size = &lt;0x8000&gt;;	/* 32kB */</div><div class='add'>+			record-size = &lt;0x400&gt;;		/*  1kB */</div><div class='add'>+			ecc-size = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	host1x@50000000 {</div><div class='add'>+		hdmi: hdmi@54280000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			hdmi-supply = &lt;&amp;hdmi_5v0_sys&gt;;</div><div class='add'>+			pll-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				hdmi_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;bridge_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio@6000d000 {</div><div class='add'>+		init-lpm-in-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;TEGRA_GPIO(B, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		init-lpm-out-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;TEGRA_GPIO(K, 7) GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				&lt;TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tp-vendor-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vde@6001a000 {</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA30_CLK_VDE&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA30_CLK_PLL_P&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;408000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux@70000868 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			/* SDMMC1 pinmux */</div><div class='add'>+			sdmmc1-clk {</div><div class='add'>+				nvidia,pins = "sdmmc1_clk_pz0";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc1_dat3_py4",</div><div class='add'>+					      "sdmmc1_dat2_py5",</div><div class='add'>+					      "sdmmc1_dat1_py6",</div><div class='add'>+					      "sdmmc1_dat0_py7",</div><div class='add'>+					      "sdmmc1_cmd_pz1";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-cd {</div><div class='add'>+				nvidia,pins = "gmi_iordy_pi5";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-wp {</div><div class='add'>+				nvidia,pins = "vi_d11_pt3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC2 pinmux */</div><div class='add'>+			vi-d1-pd5 {</div><div class='add'>+				nvidia,pins = "vi_d1_pd5",</div><div class='add'>+					      "vi_d2_pl0",</div><div class='add'>+					      "vi_d3_pl1",</div><div class='add'>+					      "vi_d5_pl3",</div><div class='add'>+					      "vi_d7_pl5";</div><div class='add'>+				nvidia,function = "sdmmc2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d8-pl6 {</div><div class='add'>+				nvidia,pins = "vi_d8_pl6",</div><div class='add'>+					      "vi_d9_pl7";</div><div class='add'>+				nvidia,function = "sdmmc2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC3 pinmux */</div><div class='add'>+			sdmmc3-clk {</div><div class='add'>+				nvidia,pins = "sdmmc3_clk_pa6";</div><div class='add'>+				nvidia,function = "sdmmc3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc3-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc3_cmd_pa7",</div><div class='add'>+					      "sdmmc3_dat0_pb7",</div><div class='add'>+					      "sdmmc3_dat1_pb6",</div><div class='add'>+					      "sdmmc3_dat2_pb5",</div><div class='add'>+					      "sdmmc3_dat3_pb4",</div><div class='add'>+					      "sdmmc3_dat4_pd1",</div><div class='add'>+					      "sdmmc3_dat5_pd0",</div><div class='add'>+					      "sdmmc3_dat6_pd3",</div><div class='add'>+					      "sdmmc3_dat7_pd4";</div><div class='add'>+				nvidia,function = "sdmmc3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC4 pinmux */</div><div class='add'>+			sdmmc4-clk {</div><div class='add'>+				nvidia,pins = "sdmmc4_clk_pcc4";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc4_cmd_pt7",</div><div class='add'>+					      "sdmmc4_dat0_paa0",</div><div class='add'>+					      "sdmmc4_dat1_paa1",</div><div class='add'>+					      "sdmmc4_dat2_paa2",</div><div class='add'>+					      "sdmmc4_dat3_paa3",</div><div class='add'>+					      "sdmmc4_dat4_paa4",</div><div class='add'>+					      "sdmmc4_dat5_paa5",</div><div class='add'>+					      "sdmmc4_dat6_paa6",</div><div class='add'>+					      "sdmmc4_dat7_paa7";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4-rst-n {</div><div class='add'>+				nvidia,pins = "sdmmc4_rst_n_pcc3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			cam-mclk {</div><div class='add'>+				nvidia,pins = "cam_mclk_pcc0";</div><div class='add'>+				nvidia,function = "vi_alt3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			drive-sdmmc4 {</div><div class='add'>+				nvidia,pins = "drive_gma",</div><div class='add'>+					      "drive_gmb",</div><div class='add'>+					      "drive_gmc",</div><div class='add'>+					      "drive_gmd";</div><div class='add'>+				nvidia,pull-down-strength = &lt;9&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;9&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* I2C pinmux */</div><div class='add'>+			gen1-i2c {</div><div class='add'>+				nvidia,pins = "gen1_i2c_scl_pc4",</div><div class='add'>+					      "gen1_i2c_sda_pc5";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			gen2-i2c {</div><div class='add'>+				nvidia,pins = "gen2_i2c_scl_pt5",</div><div class='add'>+					      "gen2_i2c_sda_pt6";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			cam-i2c {</div><div class='add'>+				nvidia,pins = "cam_i2c_scl_pbb1",</div><div class='add'>+					      "cam_i2c_sda_pbb2";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ddc-i2c {</div><div class='add'>+				nvidia,pins = "ddc_scl_pv4",</div><div class='add'>+					      "ddc_sda_pv5";</div><div class='add'>+				nvidia,function = "i2c4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			pwr-i2c {</div><div class='add'>+				nvidia,pins = "pwr_i2c_scl_pz6",</div><div class='add'>+					      "pwr_i2c_sda_pz7";</div><div class='add'>+				nvidia,function = "i2cpwr";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			hotplug-i2c {</div><div class='add'>+				nvidia,pins = "pu4";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* HDMI pinmux */</div><div class='add'>+			hdmi-cec {</div><div class='add'>+				nvidia,pins = "hdmi_cec_pee3";</div><div class='add'>+				nvidia,function = "cec";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			hdmi-hpd {</div><div class='add'>+				nvidia,pins = "hdmi_int_pn7";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-A */</div><div class='add'>+			ulpi-data0-po1 {</div><div class='add'>+				nvidia,pins = "ulpi_data0_po1";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data1-po2 {</div><div class='add'>+				nvidia,pins = "ulpi_data1_po2";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data5-po6 {</div><div class='add'>+				nvidia,pins = "ulpi_data5_po6";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data7-po0 {</div><div class='add'>+				nvidia,pins = "ulpi_data7_po0",</div><div class='add'>+					      "ulpi_data2_po3",</div><div class='add'>+					      "ulpi_data3_po4",</div><div class='add'>+					      "ulpi_data4_po5",</div><div class='add'>+					      "ulpi_data6_po7";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-B */</div><div class='add'>+			uartb-txd-rts {</div><div class='add'>+				nvidia,pins = "uart2_txd_pc2",</div><div class='add'>+					      "uart2_rts_n_pj6";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			uartb-rxd-cts {</div><div class='add'>+				nvidia,pins = "uart2_rxd_pc3",</div><div class='add'>+					      "uart2_cts_n_pj5";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-C */</div><div class='add'>+			uartc-rxd-cts {</div><div class='add'>+				nvidia,pins = "uart3_cts_n_pa1",</div><div class='add'>+					      "uart3_rxd_pw7";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			uartc-txd-rts {</div><div class='add'>+				nvidia,pins = "uart3_rts_n_pc0",</div><div class='add'>+					      "uart3_txd_pw6";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-D */</div><div class='add'>+			ulpi-nxt-py2 {</div><div class='add'>+				nvidia,pins = "ulpi_nxt_py2";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-clk-py0 {</div><div class='add'>+				nvidia,pins = "ulpi_clk_py0",</div><div class='add'>+					      "ulpi_dir_py1",</div><div class='add'>+					      "ulpi_stp_py3";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* I2S pinmux */</div><div class='add'>+			dap-i2s0 {</div><div class='add'>+				nvidia,pins = "dap1_fs_pn0",</div><div class='add'>+					      "dap1_din_pn1",</div><div class='add'>+					      "dap1_dout_pn2",</div><div class='add'>+					      "dap1_sclk_pn3";</div><div class='add'>+				nvidia,function = "i2s0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap-i2s1 {</div><div class='add'>+				nvidia,pins = "dap2_fs_pa2",</div><div class='add'>+					      "dap2_sclk_pa3",</div><div class='add'>+					      "dap2_din_pa4",</div><div class='add'>+					      "dap2_dout_pa5";</div><div class='add'>+				nvidia,function = "i2s1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap3-fs {</div><div class='add'>+				nvidia,pins = "dap3_fs_pp0",</div><div class='add'>+					      "dap3_din_pp1";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap3-dout {</div><div class='add'>+				nvidia,pins = "dap3_dout_pp2",</div><div class='add'>+					      "dap3_sclk_pp3";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap-i2s3 {</div><div class='add'>+				nvidia,pins = "dap4_fs_pp4",</div><div class='add'>+					      "dap4_din_pp5",</div><div class='add'>+					      "dap4_dout_pp6",</div><div class='add'>+					      "dap4_sclk_pp7";</div><div class='add'>+				nvidia,function = "i2s3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* sensors pinmux */</div><div class='add'>+			nct-irq {</div><div class='add'>+				nvidia,pins = "pcc2";</div><div class='add'>+				nvidia,function = "i2s4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Asus EC pinmux */</div><div class='add'>+			ec-irqs {</div><div class='add'>+				nvidia,pins = "kb_row10_ps2",</div><div class='add'>+					      "kb_row15_ps7";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ec-reqs {</div><div class='add'>+				nvidia,pins = "kb_col1_pq1";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* memory type bootstrap */</div><div class='add'>+			mem-boostraps {</div><div class='add'>+				nvidia,pins = "gmi_ad4_pg4",</div><div class='add'>+					      "gmi_ad5_pg5";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* PCI-e pinmux */</div><div class='add'>+			pex-l2-rst-n {</div><div class='add'>+				nvidia,pins = "pex_l2_rst_n_pcc6",</div><div class='add'>+					      "pex_l0_rst_n_pdd1",</div><div class='add'>+					      "pex_l1_rst_n_pdd5";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pex-l2-clkreq-n {</div><div class='add'>+				nvidia,pins = "pex_l2_clkreq_n_pcc7",</div><div class='add'>+					      "pex_l0_prsnt_n_pdd0",</div><div class='add'>+					      "pex_l0_clkreq_n_pdd2",</div><div class='add'>+					      "pex_wake_n_pdd3",</div><div class='add'>+					      "pex_l1_prsnt_n_pdd4",</div><div class='add'>+					      "pex_l1_clkreq_n_pdd6",</div><div class='add'>+					      "pex_l2_prsnt_n_pdd7";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SPI pinmux */</div><div class='add'>+			spi1-mosi-px4 {</div><div class='add'>+				nvidia,pins = "spi1_mosi_px4",</div><div class='add'>+					      "spi1_sck_px5",</div><div class='add'>+					      "spi1_cs0_n_px6",</div><div class='add'>+					      "spi1_miso_px7";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			spi2-cs1-n-pw2 {</div><div class='add'>+				nvidia,pins = "spi2_cs1_n_pw2";</div><div class='add'>+				nvidia,function = "spi2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			spi2-sck-px2 {</div><div class='add'>+				nvidia,pins = "spi2_sck_px2";</div><div class='add'>+				nvidia,function = "spi2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-a17-pb0 {</div><div class='add'>+				nvidia,pins = "gmi_a17_pb0",</div><div class='add'>+					      "gmi_a16_pj7";</div><div class='add'>+				nvidia,function = "spi4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-a18-pb1 {</div><div class='add'>+				nvidia,pins = "gmi_a18_pb1";</div><div class='add'>+				nvidia,function = "spi4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-a19-pk7 {</div><div class='add'>+				nvidia,pins = "gmi_a19_pk7";</div><div class='add'>+				nvidia,function = "spi4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Display A pinmux */</div><div class='add'>+			lcd-pwr0-pb2 {</div><div class='add'>+				nvidia,pins = "lcd_pwr0_pb2",</div><div class='add'>+					      "lcd_pclk_pb3",</div><div class='add'>+					      "lcd_pwr1_pc1",</div><div class='add'>+					      "lcd_d0_pe0",</div><div class='add'>+					      "lcd_d1_pe1",</div><div class='add'>+					      "lcd_d2_pe2",</div><div class='add'>+					      "lcd_d3_pe3",</div><div class='add'>+					      "lcd_d4_pe4",</div><div class='add'>+					      "lcd_d5_pe5",</div><div class='add'>+					      "lcd_d6_pe6",</div><div class='add'>+					      "lcd_d7_pe7",</div><div class='add'>+					      "lcd_d8_pf0",</div><div class='add'>+					      "lcd_d9_pf1",</div><div class='add'>+					      "lcd_d10_pf2",</div><div class='add'>+					      "lcd_d11_pf3",</div><div class='add'>+					      "lcd_d12_pf4",</div><div class='add'>+					      "lcd_d13_pf5",</div><div class='add'>+					      "lcd_d14_pf6",</div><div class='add'>+					      "lcd_d15_pf7",</div><div class='add'>+					      "lcd_de_pj1",</div><div class='add'>+					      "lcd_hsync_pj3",</div><div class='add'>+					      "lcd_vsync_pj4",</div><div class='add'>+					      "lcd_d16_pm0",</div><div class='add'>+					      "lcd_d17_pm1",</div><div class='add'>+					      "lcd_d18_pm2",</div><div class='add'>+					      "lcd_d19_pm3",</div><div class='add'>+					      "lcd_d20_pm4",</div><div class='add'>+					      "lcd_d21_pm5",</div><div class='add'>+					      "lcd_d22_pm6",</div><div class='add'>+					      "lcd_d23_pm7",</div><div class='add'>+					      "lcd_dc0_pn6",</div><div class='add'>+					      "lcd_sdin_pz2";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			lcd-cs0-n-pn4 {</div><div class='add'>+				nvidia,pins = "lcd_cs0_n_pn4",</div><div class='add'>+					      "lcd_sdout_pn5",</div><div class='add'>+					      "lcd_wr_n_pz3";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blink {</div><div class='add'>+				nvidia,pins = "clk_32k_out_pa0";</div><div class='add'>+				nvidia,function = "blink";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* KBC keys */</div><div class='add'>+			kb-col0-pq0 {</div><div class='add'>+				nvidia,pins = "kb_col0_pq0";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			kb-col1-pq1 {</div><div class='add'>+				nvidia,pins = "kb_row1_pr1",</div><div class='add'>+					      "kb_row3_pr3",</div><div class='add'>+					      "kb_row14_ps6";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			kb-col4-pq4 {</div><div class='add'>+				nvidia,pins = "kb_col4_pq4",</div><div class='add'>+					      "kb_col5_pq5",</div><div class='add'>+					      "kb_col7_pq7",</div><div class='add'>+					      "kb_row2_pr2",</div><div class='add'>+					      "kb_row4_pr4",</div><div class='add'>+					      "kb_row5_pr5",</div><div class='add'>+					      "kb_row12_ps4",</div><div class='add'>+					      "kb_row13_ps5";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmi-wp-n-pc7 {</div><div class='add'>+				nvidia,pins = "gmi_wp_n_pc7",</div><div class='add'>+					      "gmi_wait_pi7",</div><div class='add'>+					      "gmi_cs3_n_pk4";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-cs0-n-pj0 {</div><div class='add'>+				nvidia,pins = "gmi_cs0_n_pj0",</div><div class='add'>+					      "gmi_cs1_n_pj2",</div><div class='add'>+					      "gmi_cs2_n_pk3";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-pclk-pt0 {</div><div class='add'>+				nvidia,pins = "vi_pclk_pt0";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* GPIO keys pinmux */</div><div class='add'>+			power-key {</div><div class='add'>+				nvidia,pins = "pv0";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vol-keys {</div><div class='add'>+				nvidia,pins = "kb_col2_pq2",</div><div class='add'>+					      "kb_col3_pq3";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Bluetooth */</div><div class='add'>+			bt-shutdown {</div><div class='add'>+				nvidia,pins = "pu0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			bt-dev-wake {</div><div class='add'>+				nvidia,pins = "pu1";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			bt-host-wake {</div><div class='add'>+				nvidia,pins = "pu6";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pu2 {</div><div class='add'>+				nvidia,pins = "pu2";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pu3 {</div><div class='add'>+				nvidia,pins = "pu3";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pcc1 {</div><div class='add'>+				nvidia,pins = "pcc1";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pv2 {</div><div class='add'>+				nvidia,pins = "pv2";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pv3 {</div><div class='add'>+				nvidia,pins = "pv3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-vsync-pd6 {</div><div class='add'>+				nvidia,pins = "vi_vsync_pd6",</div><div class='add'>+					      "vi_hsync_pd7";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d10-pt2 {</div><div class='add'>+				nvidia,pins = "vi_d10_pt2",</div><div class='add'>+					      "vi_d0_pt4",</div><div class='add'>+					      "pbb0";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			kb-row0-pr0 {</div><div class='add'>+				nvidia,pins = "kb_row0_pr0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad0-pg0 {</div><div class='add'>+				nvidia,pins = "gmi_ad0_pg0",</div><div class='add'>+					      "gmi_ad1_pg1",</div><div class='add'>+					      "gmi_ad2_pg2",</div><div class='add'>+					      "gmi_ad3_pg3",</div><div class='add'>+					      "gmi_ad6_pg6",</div><div class='add'>+					      "gmi_ad7_pg7",</div><div class='add'>+					      "gmi_wr_n_pi0",</div><div class='add'>+					      "gmi_oe_n_pi1",</div><div class='add'>+					      "gmi_dqs_pi2",</div><div class='add'>+					      "gmi_adv_n_pk0",</div><div class='add'>+					      "gmi_clk_pk1";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad13-ph5 {</div><div class='add'>+				nvidia,pins = "gmi_ad13_ph5";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad10-ph2 {</div><div class='add'>+				nvidia,pins = "gmi_ad10_ph2",</div><div class='add'>+					      "gmi_ad11_ph3",</div><div class='add'>+					      "gmi_ad14_ph6";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad12-ph4 {</div><div class='add'>+				nvidia,pins = "gmi_ad12_ph4",</div><div class='add'>+					      "gmi_rst_n_pi4";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* USB2 VBUS control */</div><div class='add'>+			usb2-vbus-control {</div><div class='add'>+				nvidia,pins = "gmi_ad15_ph7";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* PWM pinmux */</div><div class='add'>+			pwm-0 {</div><div class='add'>+				nvidia,pins = "gmi_ad8_ph0";</div><div class='add'>+				nvidia,function = "pwm0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pwm-2 {</div><div class='add'>+				nvidia,pins = "pu5";</div><div class='add'>+				nvidia,function = "pwm2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* S/PDIF pinmux */</div><div class='add'>+			spdif-out {</div><div class='add'>+				nvidia,pins = "spdif_out_pk5";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			spdif-in {</div><div class='add'>+				nvidia,pins = "spdif_in_pk6";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d4-pl2 {</div><div class='add'>+				nvidia,pins = "vi_d4_pl2";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d6-pl4 {</div><div class='add'>+				nvidia,pins = "vi_d6_pl4";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-mclk-pt1 {</div><div class='add'>+				nvidia,pins = "vi_mclk_pt1";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			jtag-rtck {</div><div class='add'>+				nvidia,pins = "jtag_rtck_pu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crt-hsync-pv6 {</div><div class='add'>+				nvidia,pins = "crt_hsync_pv6",</div><div class='add'>+					      "crt_vsync_pv7";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk1-out {</div><div class='add'>+				nvidia,pins = "clk1_out_pw4";</div><div class='add'>+				nvidia,function = "extperiph1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk2-out {</div><div class='add'>+				nvidia,pins = "clk2_out_pw5";</div><div class='add'>+				nvidia,function = "extperiph2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk3-out {</div><div class='add'>+				nvidia,pins = "clk3_out_pee0";</div><div class='add'>+				nvidia,function = "extperiph3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sys-clk-req {</div><div class='add'>+				nvidia,pins = "sys_clk_req_pz5";</div><div class='add'>+				nvidia,function = "sysclk";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb4 {</div><div class='add'>+				nvidia,pins = "pbb4";</div><div class='add'>+				nvidia,function = "vgp4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb5 {</div><div class='add'>+				nvidia,pins = "pbb5";</div><div class='add'>+				nvidia,function = "vgp5";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb6 {</div><div class='add'>+				nvidia,pins = "pbb6";</div><div class='add'>+				nvidia,function = "vgp6";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk2-req-pcc5 {</div><div class='add'>+				nvidia,pins = "clk2_req_pcc5",</div><div class='add'>+					      "clk1_req_pee2";</div><div class='add'>+				nvidia,function = "dap";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk3-req-pee1 {</div><div class='add'>+				nvidia,pins = "clk3_req_pee1";</div><div class='add'>+				nvidia,function = "dev3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			owr {</div><div class='add'>+				nvidia,pins = "owr";</div><div class='add'>+				nvidia,function = "owr";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* P1801-T specific pinmux */</div><div class='add'>+			lcd-pwr2 {</div><div class='add'>+				nvidia,pins = "lcd_pwr2_pc6",</div><div class='add'>+					      "lcd_dc1_pd2";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			lcd-m1 {</div><div class='add'>+				nvidia,pins = "lcd_m1_pw1";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			key-mode {</div><div class='add'>+				nvidia,pins = "gmi_cs4_n_pk2";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			splashtop {</div><div class='add'>+				nvidia,pins = "gmi_cs6_n_pi3";</div><div class='add'>+				nvidia,function = "nand_alt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			w8-detect {</div><div class='add'>+				nvidia,pins = "gmi_cs7_n_pi6";</div><div class='add'>+				nvidia,function = "nand_alt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb3 {</div><div class='add'>+				nvidia,pins = "pbb3";</div><div class='add'>+				nvidia,function = "vgp3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb7 {</div><div class='add'>+				nvidia,pins = "pbb7";</div><div class='add'>+				nvidia,function = "i2s4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			spi2-mosi-px0 {</div><div class='add'>+				nvidia,pins = "spi2_mosi_px0";</div><div class='add'>+				nvidia,function = "spi6";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			tp-vendor {</div><div class='add'>+				nvidia,pins = "kb_row6_pr6",</div><div class='add'>+					      "kb_row7_pr7";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			tp-power {</div><div class='add'>+				nvidia,pins = "kb_row8_ps0";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* GPIO power/drive control */</div><div class='add'>+			drive-dap1 {</div><div class='add'>+				nvidia,pins = "drive_dap1",</div><div class='add'>+					      "drive_dap2",</div><div class='add'>+					      "drive_dbg",</div><div class='add'>+					      "drive_at5",</div><div class='add'>+					      "drive_gme",</div><div class='add'>+					      "drive_ddc",</div><div class='add'>+					      "drive_ao1",</div><div class='add'>+					      "drive_uart3";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_FASTEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_FASTEST&gt;;</div><div class='add'>+			};</div><div class='add'>+			drive-sdio1 {</div><div class='add'>+				nvidia,pins = "drive_sdio1",</div><div class='add'>+					      "drive_sdio3";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;46&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;42&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_FAST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_FAST&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uartb: serial@70006040 {</div><div class='add'>+		compatible = "nvidia,tegra30-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		/* Broadcom GPS BCM47511 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uartc: serial@70006200 {</div><div class='add'>+		compatible = "nvidia,tegra30-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-AH691 BCM43241B0 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm: pwm@7000a000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;280000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		/* Nuvoton NPCE791LA0DX embedded controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		accelerometer@f {</div><div class='add'>+			compatible = "kionix,kxtf9";</div><div class='add'>+			reg = &lt;0x0f&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(O, 5) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+</div><div class='add'>+			mount-matrix = "0", "1", "0",</div><div class='add'>+				       "1", "0", "0",</div><div class='add'>+				       "0", "0", "1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_ddc: i2c@7000c700 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;33000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		rt5640: audio-codec@1c {</div><div class='add'>+			compatible = "realtek,rt5640";</div><div class='add'>+			reg = &lt;0x1c&gt;;</div><div class='add'>+</div><div class='add'>+			realtek,dmic1-data-pin = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+			clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+			realtek,ldo1-en-gpios = &lt;&amp;gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Texas Instruments TPS659110 PMIC */</div><div class='add'>+		pmic: pmic@2d {</div><div class='add'>+			compatible = "ti,tps65911";</div><div class='add'>+			reg = &lt;0x2d&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			wakeup-source;</div><div class='add'>+</div><div class='add'>+			ti,en-gpio-sleep = &lt;0 0 1 0 0 0 0 0 0&gt;;</div><div class='add'>+			ti,system-power-controller;</div><div class='add'>+			ti,sleep-keep-ck32k;</div><div class='add'>+			ti,sleep-enable;</div><div class='add'>+</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+</div><div class='add'>+			vcc1-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc2-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc3-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+			vcc4-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc5-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc6-supply = &lt;&amp;vddio_ddr&gt;;</div><div class='add'>+			vcc7-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vccio-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+</div><div class='add'>+			pmic-sleep-hog {</div><div class='add'>+				gpio-hog;</div><div class='add'>+				gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				output-high;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				/* vdd1 is not used by Portable AiO */</div><div class='add'>+</div><div class='add'>+				vddio_ddr: vdd2 {</div><div class='add'>+					regulator-name = "vddio_ddr";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_cpu: vddctrl {</div><div class='add'>+					regulator-name = "vdd_cpu,vdd_sys";</div><div class='add'>+					regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+					regulator-coupled-with = &lt;&amp;vdd_core&gt;;</div><div class='add'>+					regulator-coupled-max-spread = &lt;300000&gt;;</div><div class='add'>+					regulator-max-step-microvolt = &lt;100000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					nvidia,tegra-cpu-regulator;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_1v8_vio: vio {</div><div class='add'>+					regulator-name = "vdd_1v8_gen";</div><div class='add'>+					regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* eMMC VDD */</div><div class='add'>+				vcore_emmc: ldo1 {</div><div class='add'>+					regulator-name = "vdd_emmc_core";</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* uSD slot VDD */</div><div class='add'>+				vdd_usd: ldo2 {</div><div class='add'>+					regulator-name = "vdd_usd";</div><div class='add'>+					regulator-min-microvolt = &lt;3100000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* uSD slot VDDIO */</div><div class='add'>+				vddio_usd: ldo3 {</div><div class='add'>+					regulator-name = "vddio_usd";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo4 {</div><div class='add'>+					regulator-name = "vdd_rtc";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* ldo5 is not used by Portable AiO */</div><div class='add'>+</div><div class='add'>+				ldo6 {</div><div class='add'>+					regulator-name = "avdd_dsi_csi,pwrdet_mipi";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo7 {</div><div class='add'>+					regulator-name = "vdd_pllm,x,u,a_p_c_s";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo8 {</div><div class='add'>+					regulator-name = "vdd_ddr_hs";</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nct72: temperature-sensor@4c {</div><div class='add'>+			compatible = "onnn,nct1008";</div><div class='add'>+			reg = &lt;0x4c&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_core: core-regulator@60 {</div><div class='add'>+			compatible = "ti,tps62361";</div><div class='add'>+			reg = &lt;0x60&gt;;</div><div class='add'>+</div><div class='add'>+			regulator-name = "tps62361-vout";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1770000&gt;;</div><div class='add'>+			regulator-coupled-with = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			regulator-coupled-max-spread = &lt;300000&gt;;</div><div class='add'>+			regulator-max-step-microvolt = &lt;100000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			ti,enable-vout-discharge;</div><div class='add'>+			ti,vsel0-state-high;</div><div class='add'>+			ti,vsel1-state-high;</div><div class='add'>+</div><div class='add'>+			nvidia,tegra-core-regulator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_bat: regulator-bat {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_ac_bat";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_cp: regulator-sby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_sby";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_sys: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_1v5_ddr: regulator-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_ddr";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_sys: regulator-3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_com: regulator-com {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_com";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_vbus: regulator-usb2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb2_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio-open-drain;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_5v0_sys: regulator-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "hdmi_5v0_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmc@7000e400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,invert-interrupt;</div><div class='add'>+		nvidia,suspend-mode = &lt;2&gt;;</div><div class='add'>+		nvidia,cpu-pwr-good-time = &lt;2000&gt;;</div><div class='add'>+		nvidia,cpu-pwr-off-time = &lt;200&gt;;</div><div class='add'>+		nvidia,core-pwr-good-time = &lt;3845 3845&gt;;</div><div class='add'>+		nvidia,core-pwr-off-time = &lt;0&gt;;</div><div class='add'>+		nvidia,core-power-req-active-high;</div><div class='add'>+		nvidia,sys-clock-req-active-high;</div><div class='add'>+		core-supply = &lt;&amp;vdd_core&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-thermtrip {</div><div class='add'>+			nvidia,i2c-controller-id = &lt;4&gt;;</div><div class='add'>+			nvidia,bus-addr = &lt;0x2d&gt;;</div><div class='add'>+			nvidia,reg-addr = &lt;0x3f&gt;;</div><div class='add'>+			nvidia,reg-data = &lt;0x81&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f000 {</div><div class='add'>+		emc-timings-3 {</div><div class='add'>+			/* Micron 2GB 800MHz */</div><div class='add'>+			nvidia,ram-code = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00030003 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x75830303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010003 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x74630303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000030</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x73c30504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000006 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x73840a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-400000000 {</div><div class='add'>+				clock-frequency = &lt;400000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000c 0xc0000048</div><div class='add'>+					0x00000001 0x00000002 0x00000009 0x00000005</div><div class='add'>+					0x00000005 0x00000001 0x00000002 0x00000008</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000d0709 0x7086120a 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-800000000 {</div><div class='add'>+				clock-frequency = &lt;800000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000018 0xc0000090</div><div class='add'>+					0x00000004 0x00000005 0x00000013 0x0000000c</div><div class='add'>+					0x0000000b 0x00000002 0x00000003 0x0000000c</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00160d13 0x712c2414 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f400 {</div><div class='add'>+		emc-timings-3 {</div><div class='add'>+			/* Micron 2GB 800MHz */</div><div class='add'>+			nvidia,ram-code = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000001</div><div class='add'>+					0x00000006 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x00000009</div><div class='add'>+					0x0000000b 0x000000c0 0x00000000 0x00000030</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000007 0x00000007</div><div class='add'>+					0x00000004 0x00000001 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x000000c7 0x00000006 0x00000006</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000287 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x0000000d 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x00000009</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x0000000e 0x0000000e</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000006</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000004</div><div class='add'>+					0x0000001a 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x00000009</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x0000001c 0x0000001c</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000006</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000009</div><div class='add'>+					0x00000035 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x00000009</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000038 0x00000038</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-400000000 {</div><div class='add'>+				clock-frequency = &lt;400000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200000&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000521&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000012</div><div class='add'>+					0x00000066 0x0000000c 0x00000004 0x00000003</div><div class='add'>+					0x00000008 0x00000002 0x0000000a 0x00000004</div><div class='add'>+					0x00000004 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x00000bf0 0x00000000 0x000002fc</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000008 0x0000000f 0x0000006c 0x00000200</div><div class='add'>+					0x00000004 0x0000000c 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000c30 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007088 0x001d0084</div><div class='add'>+					0x00008000 0x00044000 0x00044000 0x00044000</div><div class='add'>+					0x00044000 0x00044000 0x00044000 0x00044000</div><div class='add'>+					0x00044000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00048000 0x00048000 0x00048000</div><div class='add'>+					0x00048000 0x000002a0 0x0800013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x0158000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x800018c8 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-800000000 {</div><div class='add'>+				clock-frequency = &lt;800000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200018&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000d71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000025</div><div class='add'>+					0x000000ce 0x0000001a 0x00000009 0x00000005</div><div class='add'>+					0x0000000d 0x00000004 0x00000013 0x00000009</div><div class='add'>+					0x00000009 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000012 0x00001820 0x00000000 0x00000608</div><div class='add'>+					0x00000003 0x00000012 0x00000001 0x00000000</div><div class='add'>+					0x0000000f 0x00000018 0x000000d8 0x00000200</div><div class='add'>+					0x00000005 0x00000018 0x00000000 0x00000007</div><div class='add'>+					0x00000008 0x00001860 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf0070191</div><div class='add'>+					0x00008000 0x0000c00a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x00018000 0x00018000 0x00018000</div><div class='add'>+					0x00018000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x000002a0 0x0800013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x00f0000c 0xa0f10202 0x00000000</div><div class='add'>+					0x00000000 0x8000308c 0xe8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hda@70030000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahub@70080000 {</div><div class='add'>+		i2s@70080400 { /* i2s1 */</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* BT SCO */</div><div class='add'>+		i2s@70080600 { /* i2s3 */</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1: mmc@78000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		/* SDR104 mode unsupported yet */</div><div class='add'>+		max-frequency = &lt;104000000&gt;;</div><div class='add'>+</div><div class='add'>+		cd-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_usd&gt;;	/* ldo2 */</div><div class='add'>+		vqmmc-supply = &lt;&amp;vddio_usd&gt;;	/* ldo3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc3: mmc@78000400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		keep-power-in-suspend;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		non-removable;</div><div class='add'>+</div><div class='add'>+		mmc-pwrseq = &lt;&amp;brcm_wifi_pwrseq&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_3v3_com&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-AH691 BCM43241B0 */</div><div class='add'>+		wifi@1 {</div><div class='add'>+			compatible = "brcm,bcm4329-fmac";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "host-wake";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc4: mmc@78000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+		non-removable;</div><div class='add'>+		mmc-ddr-3_3v;</div><div class='add'>+</div><div class='add'>+		vmmc-supply = &lt;&amp;vcore_emmc&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* USB via ASUS connector */</div><div class='add'>+	usb@7d000000 {</div><div class='add'>+		compatible = "nvidia,tegra30-udc";</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@7d000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+		nvidia,hssync-start-delay = &lt;0&gt;;</div><div class='add'>+		nvidia,xcvr-lsfslew = &lt;2&gt;;</div><div class='add'>+		nvidia,xcvr-lsrslew = &lt;2&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* mini-USB port */</div><div class='add'>+	usb@7d004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@7d004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		vbus-supply = &lt;&amp;usb2_vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Full size USB */</div><div class='add'>+	usb@7d008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@7d008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pad_battery: battery-cell {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;5136000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;38000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Connected to a 18.4" LVDS panel */</div><div class='add'>+	bridge {</div><div class='add'>+		compatible = "mstar,tsumu88adt3-lf-1";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				bridge_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				bridge_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMIC has a built-in 32KHz oscillator which is used by PMC */</div><div class='add'>+	clk32k_in: clock-32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "pmic-oscillator";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "HDMI";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		/* low: tablet, high: dock */</div><div class='add'>+		hpd-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+		ddc-en-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;bridge_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-docking-station-mode {</div><div class='add'>+			label = "Mode";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(K, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MODE&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-actmon {</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-supported-hw = &lt;0x0006&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/delete-node/ opp-900000000;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-emc {</div><div class='add'>+		opp-800000000-1300 {</div><div class='add'>+			opp-supported-hw = &lt;0x0006&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/delete-node/ opp-900000000-1350;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	brcm_wifi_pwrseq: pwrseq-wifi {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;300&gt;;</div><div class='add'>+		power-off-delay-us = &lt;300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "asus,tegra-audio-rt5640-p1801-t",</div><div class='add'>+			     "nvidia,tegra-audio-rt5640";</div><div class='add'>+		nvidia,model = "Asus Portable AiO P1801-T RT5642";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphones", "HPOR",</div><div class='add'>+			"Headphones", "HPOL",</div><div class='add'>+			"Speakers", "SPORP",</div><div class='add'>+			"Speakers", "SPORN",</div><div class='add'>+			"Speakers", "SPOLP",</div><div class='add'>+			"Speakers", "SPOLN",</div><div class='add'>+			"DMIC1", "Mic Jack";</div><div class='add'>+</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;rt5640&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+			 &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+		clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA30_CLK_EXTERN1&gt;,</div><div class='add'>+				  &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+					 &lt;&amp;tegra_car TEGRA30_CLK_EXTERN1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		/*</div><div class='add'>+		 * NCT72 has two sensors:</div><div class='add'>+		 *</div><div class='add'>+		 *	0: internal that monitors ambient/skin temperature</div><div class='add'>+		 *	1: external that is connected to the CPU's diode</div><div class='add'>+		 *</div><div class='add'>+		 * Ideally we should use userspace thermal governor,</div><div class='add'>+		 * but it's a much more complex solution. The "skin"</div><div class='add'>+		 * zone exists as a simpler solution which prevents</div><div class='add'>+		 * the Portable AiO from getting too hot from a user's</div><div class='add'>+		 * tactile perspective. The CPU zone is intended to</div><div class='add'>+		 * protect silicon from damage.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		skin-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct72 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0: skin-alert {</div><div class='add'>+					/* throttle at 57C until temperature drops to 56.8C */</div><div class='add'>+					temperature = &lt;57000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1: skin-crit {</div><div class='add'>+					/* shut down at 65C */</div><div class='add'>+					temperature = &lt;65000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;trip0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;actmon THERMAL_NO_LIMIT</div><div class='add'>+								  THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct72 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip2: cpu-alert {</div><div class='add'>+					/* throttle at 75C until temperature drops to 74.8C */</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip3: cpu-crit {</div><div class='add'>+					/* shut down at 90C */</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;trip2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;actmon THERMAL_NO_LIMIT</div><div class='add'>+								  THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts b/arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts<br/>new file mode 100644<br/>index 000000000000..2ef9d8737901<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-asus-tf300tl.dts</a></div><div class='hunk'>@@ -0,0 +1,857 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "tegra30-asus-transformer-common.dtsi"</div><div class='add'>+#include "tegra30-asus-lvds-display.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Asus Transformer Pad LTE TF300TL";</div><div class='add'>+	compatible = "asus,tf300tl", "nvidia,tegra30";</div><div class='add'>+</div><div class='add'>+	gpio@6000d000 {</div><div class='add'>+		tf300tl-init-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux@70000868 {</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			lcd_pwr2_pc6 {</div><div class='add'>+				nvidia,pins = "lcd_pwr2_pc6",</div><div class='add'>+					      "lcd_dc1_pd2";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pbb3 {</div><div class='add'>+				nvidia,pins = "pbb3";</div><div class='add'>+				nvidia,function = "vgp3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pbb7 {</div><div class='add'>+				nvidia,pins = "pbb7";</div><div class='add'>+				nvidia,function = "i2s4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kb_row7_pr7 {</div><div class='add'>+				nvidia,pins = "kb_row7_pr7";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmi_cs4_n_pk2 {</div><div class='add'>+				nvidia,pins = "gmi_cs4_n_pk2";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ulpi_data5_po6 {</div><div class='add'>+				nvidia,pins = "ulpi_data5_po6";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap3_din_pp1 {</div><div class='add'>+				nvidia,pins = "dap3_din_pp1";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crt_hsync_pv6 {</div><div class='add'>+				nvidia,pins = "crt_hsync_pv6";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crt_vsync_pv7 {</div><div class='add'>+				nvidia,pins = "crt_vsync_pv7";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pu5 {</div><div class='add'>+				nvidia,pins = "pu5";</div><div class='add'>+				nvidia,function = "pwm2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk3_out_pee0 {</div><div class='add'>+				nvidia,pins = "clk3_out_pee0";</div><div class='add'>+				nvidia,function = "extperiph3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk3_req_pee1 {</div><div class='add'>+				nvidia,pins = "clk3_req_pee1";</div><div class='add'>+				nvidia,function = "dev3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap1_fs_pn0 {</div><div class='add'>+				nvidia,pins = "dap1_fs_pn0",</div><div class='add'>+						"dap1_sclk_pn3";</div><div class='add'>+				nvidia,function = "i2s0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap1_din_pn1 {</div><div class='add'>+				nvidia,pins = "dap1_din_pn1";</div><div class='add'>+				nvidia,function = "i2s0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dap1_dout_pn2 {</div><div class='add'>+				nvidia,pins = "dap1_dout_pn2";</div><div class='add'>+				nvidia,function = "i2s0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk1_req_pee2 {</div><div class='add'>+				nvidia,pins = "clk1_req_pee2";</div><div class='add'>+				nvidia,function = "dap";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_mosi_px0 {</div><div class='add'>+				nvidia,pins = "spi2_mosi_px0";</div><div class='add'>+				nvidia,function = "spi2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_sck_px5 {</div><div class='add'>+				nvidia,pins = "spi1_sck_px5";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_miso_px7 {</div><div class='add'>+				nvidia,pins = "spi1_miso_px7";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2_cs2_n_pw3 {</div><div class='add'>+				nvidia,pins = "spi2_cs2_n_pw3";</div><div class='add'>+				nvidia,function = "spi2";</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006200 {</div><div class='add'>+		/* Azurewave AW-NH615 BCM4329B1 */</div><div class='add'>+		bluetooth {</div><div class='add'>+			compatible = "brcm,bcm4329-bt";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		/* Elantech EKTH1036 touchscreen */</div><div class='add'>+		touchscreen@10 {</div><div class='add'>+			compatible = "elan,ektf3624";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vcc33-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vccio-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+			touchscreen-size-x = &lt;2240&gt;;</div><div class='add'>+			touchscreen-size-y = &lt;1408&gt;;</div><div class='add'>+			touchscreen-inverted-y;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		magnetometer@e {</div><div class='add'>+			mount-matrix =  "-1",  "0",  "0",</div><div class='add'>+					 "0", "-1",  "0",</div><div class='add'>+					 "0",  "0",  "1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gyroscope@68 {</div><div class='add'>+			mount-matrix =   "-1",  "0",  "0",</div><div class='add'>+					  "0",  "1",  "0",</div><div class='add'>+					  "0",  "0", "-1";</div><div class='add'>+</div><div class='add'>+			/* External I2C interface */</div><div class='add'>+			i2c-gate {</div><div class='add'>+				accelerometer@f {</div><div class='add'>+					mount-matrix =   "0", "-1",  "0",</div><div class='add'>+							"-1",  "0",  "0",</div><div class='add'>+							 "0",  "0",  "1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		/* Realtek ALC5631 audio codec */</div><div class='add'>+		rt5631: audio-codec@1a {</div><div class='add'>+			compatible = "realtek,rt5631";</div><div class='add'>+			reg = &lt;0x1a&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f000 {</div><div class='add'>+		emc-timings-0 {</div><div class='add'>+			/* Elpida 1GB 667MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00020001 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x74830303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010001 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x73430303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000001 0xc0000030</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x72830504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x72440a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-333500000 {</div><div class='add'>+				clock-frequency = &lt;333500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000005 0xc000003d</div><div class='add'>+					0x00000001 0x00000002 0x00000008 0x00000004</div><div class='add'>+					0x00000004 0x00000001 0x00000002 0x00000007</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000b0608 0x70850f09 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-667000000 {</div><div class='add'>+				clock-frequency = &lt;667000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000a 0xc0000079</div><div class='add'>+					0x00000003 0x00000004 0x00000010 0x0000000b</div><div class='add'>+					0x0000000a 0x00000001 0x00000003 0x0000000b</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00130b10 0x70ea1f11 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-1 {</div><div class='add'>+			/* Hynix 1GB 667MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00020001 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x74830303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010001 0xc0000020</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x73430303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000001 0xc0000030</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x72830504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x72440a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-333500000 {</div><div class='add'>+				clock-frequency = &lt;333500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000005 0xc000003d</div><div class='add'>+					0x00000001 0x00000002 0x00000008 0x00000004</div><div class='add'>+					0x00000004 0x00000001 0x00000002 0x00000007</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000b0608 0x70850f09 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-667000000 {</div><div class='add'>+				clock-frequency = &lt;667000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000a 0xc0000079</div><div class='add'>+					0x00000003 0x00000004 0x00000010 0x0000000b</div><div class='add'>+					0x0000000a 0x00000001 0x00000003 0x0000000b</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00130b10 0x70ea1f11 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f400 {</div><div class='add'>+		emc-timings-0 {</div><div class='add'>+			/* Elpida 1GB 667MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000001</div><div class='add'>+					0x00000004 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x000000c0 0x00000000 0x00000030</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000005 0x00000005</div><div class='add'>+					0x00000004 0x00000001 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x000000c7 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000287 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x00000008 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000009 0x00000009</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000005</div><div class='add'>+					0x00000010 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000012 0x00000012</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x0000000a</div><div class='add'>+					0x00000020 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000023 0x00000023</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-333500000 {</div><div class='add'>+				clock-frequency = &lt;333500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200040&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000321&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x0000000f</div><div class='add'>+					0x00000034 0x0000000a 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000002 0x00000009 0x00000003</div><div class='add'>+					0x00000003 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x000009e9 0x00000000 0x0000027a</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000e 0x00000039 0x00000200</div><div class='add'>+					0x00000004 0x0000000a 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000a2a 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007088 0x002600a4</div><div class='add'>+					0x00008000 0x0003c000 0x0003c000 0x0003c000</div><div class='add'>+					0x0003c000 0x00014000 0x00014000 0x00014000</div><div class='add'>+					0x00014000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00050000 0x00050000 0x00050000</div><div class='add'>+					0x00050000 0x000002a0 0x0800013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x018b000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x800014d4 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-667000000 {</div><div class='add'>+				clock-frequency = &lt;667000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200058&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000b71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x0000001f</div><div class='add'>+					0x00000069 0x00000017 0x00000007 0x00000005</div><div class='add'>+					0x0000000c 0x00000003 0x00000011 0x00000007</div><div class='add'>+					0x00000007 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000011 0x00001412 0x00000000 0x00000504</div><div class='add'>+					0x00000002 0x0000000e 0x00000001 0x00000000</div><div class='add'>+					0x0000000c 0x00000016 0x00000072 0x00000200</div><div class='add'>+					0x00000005 0x00000015 0x00000000 0x00000006</div><div class='add'>+					0x00000007 0x00001453 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf00b0191</div><div class='add'>+					0x00008000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x00018000 0x00018000 0x00018000</div><div class='add'>+					0x00018000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x0000000c 0x0000000c 0x0000000c</div><div class='add'>+					0x0000000c 0x000002a0 0x0800013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x0a000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x0156000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x800028a5 0xe8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-1 {</div><div class='add'>+			/* Hynix 1GB 667MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000001</div><div class='add'>+					0x00000004 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x000000c0 0x00000000 0x00000030</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000005 0x00000005</div><div class='add'>+					0x00000004 0x00000001 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x000000c7 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000287 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x00000008 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000009 0x00000009</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000005</div><div class='add'>+					0x00000010 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000012 0x00000012</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x0000000a</div><div class='add'>+					0x00000020 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000023 0x00000023</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-333500000 {</div><div class='add'>+				clock-frequency = &lt;333500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200040&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000321&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x0000000f</div><div class='add'>+					0x00000034 0x0000000a 0x00000003 0x00000003</div><div class='add'>+					0x00000008 0x00000002 0x00000009 0x00000003</div><div class='add'>+					0x00000003 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x000009e9 0x00000000 0x0000027a</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000e 0x00000039 0x00000200</div><div class='add'>+					0x00000004 0x0000000a 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000a2a 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007088 0x002600a4</div><div class='add'>+					0x00008000 0x0003c000 0x0003c000 0x0003c000</div><div class='add'>+					0x0003c000 0x00014000 0x00014000 0x00014000</div><div class='add'>+					0x00014000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00048000 0x00048000 0x00048000</div><div class='add'>+					0x00048000 0x000002a0 0x0800013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x018b000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x800014d4 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-667000000 {</div><div class='add'>+				clock-frequency = &lt;667000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200058&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000b71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000020</div><div class='add'>+					0x00000069 0x00000017 0x00000007 0x00000005</div><div class='add'>+					0x0000000c 0x00000003 0x00000011 0x00000007</div><div class='add'>+					0x00000007 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000011 0x00001412 0x00000000 0x00000504</div><div class='add'>+					0x00000002 0x0000000e 0x00000001 0x00000000</div><div class='add'>+					0x0000000c 0x00000016 0x00000072 0x00000200</div><div class='add'>+					0x00000005 0x00000015 0x00000000 0x00000006</div><div class='add'>+					0x00000007 0x00001453 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf00b0191</div><div class='add'>+					0x00008000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x0000000c 0x0000000c 0x0000000c</div><div class='add'>+					0x0000000c 0x000002a0 0x0600013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x0156000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x800028a5 0xf8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pad_battery: battery-pad {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;2940000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;22000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dock_battery: battery-dock {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;2260000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;16000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display-panel {</div><div class='add'>+		compatible = "innolux,g101ice-l01";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-emc {</div><div class='add'>+		/delete-node/ opp-750000000-1300;</div><div class='add'>+		/delete-node/ opp-800000000-1300;</div><div class='add'>+		/delete-node/ opp-900000000-1350;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-actmon {</div><div class='add'>+		/delete-node/ opp-750000000;</div><div class='add'>+		/delete-node/ opp-800000000;</div><div class='add'>+		/delete-node/ opp-900000000;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "asus,tegra-audio-rt5631-tf300tl",</div><div class='add'>+			     "nvidia,tegra-audio-rt5631";</div><div class='add'>+		nvidia,model = "Asus Transformer Pad TF300TL RT5631";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOL",</div><div class='add'>+			"Headphone Jack", "HPOR",</div><div class='add'>+			"Int Spk", "SPOL",</div><div class='add'>+			"Int Spk", "SPOR",</div><div class='add'>+			"MIC1", "MIC Bias1",</div><div class='add'>+			"MIC Bias1", "Mic Jack",</div><div class='add'>+			"DMIC", "Int Mic";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;rt5631&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts b/arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts<br/>new file mode 100644<br/>index 000000000000..5d9e23a43820<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts</a></div><div class='hunk'>@@ -0,0 +1,2500 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tegra30.dtsi"</div><div class='add'>+#include "tegra30-cpu-opp.dtsi"</div><div class='add'>+#include "tegra30-cpu-opp-microvolt.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Asus VivoTab RT TF600T";</div><div class='add'>+	compatible = "asus,tf600t", "nvidia,tegra30";</div><div class='add'>+	chassis-type = "convertible";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdmmc4; /* eMMC */</div><div class='add'>+		mmc1 = &amp;sdmmc1; /* uSD slot */</div><div class='add'>+		mmc2 = &amp;sdmmc3; /* WiFi */</div><div class='add'>+</div><div class='add'>+		rtc0 = &amp;pmic;</div><div class='add'>+		rtc1 = "/rtc@7000e000";</div><div class='add'>+</div><div class='add'>+		display1 = &amp;hdmi;</div><div class='add'>+</div><div class='add'>+		serial1 = &amp;uartc; /* Bluetooth */</div><div class='add'>+		serial2 = &amp;uartb; /* GPS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The decompressor and also some bootloaders rely on a</div><div class='add'>+	 * pre-existing /chosen node to be available to insert the</div><div class='add'>+	 * command line and merge other ATAGS info.</div><div class='add'>+	 */</div><div class='add'>+	chosen {};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		reg = &lt;0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		linux,cma@80000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0x80000000 0x30000000&gt;;</div><div class='add'>+			size = &lt;0x10000000&gt;;		/* 256MiB */</div><div class='add'>+			linux,cma-default;</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	host1x@50000000 {</div><div class='add'>+		hdmi: hdmi@54280000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			hdmi-supply = &lt;&amp;hdmi_5v0_sys&gt;;</div><div class='add'>+			pll-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+			nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vde@6001a000 {</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA30_CLK_VDE&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA30_CLK_PLL_P&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;408000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux@70000868 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			/* SDMMC1 pinmux */</div><div class='add'>+			sdmmc1-clk {</div><div class='add'>+				nvidia,pins = "sdmmc1_clk_pz0";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc1_dat3_py4",</div><div class='add'>+					      "sdmmc1_dat2_py5",</div><div class='add'>+					      "sdmmc1_dat1_py6",</div><div class='add'>+					      "sdmmc1_dat0_py7",</div><div class='add'>+					      "sdmmc1_cmd_pz1";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-cd {</div><div class='add'>+				nvidia,pins = "gmi_iordy_pi5";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1-wp {</div><div class='add'>+				nvidia,pins = "vi_d11_pt3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC2 pinmux */</div><div class='add'>+			vi-d1-pd5 {</div><div class='add'>+				nvidia,pins = "vi_d1_pd5",</div><div class='add'>+					      "vi_d2_pl0",</div><div class='add'>+					      "vi_d3_pl1",</div><div class='add'>+					      "vi_d5_pl3",</div><div class='add'>+					      "vi_d7_pl5";</div><div class='add'>+				nvidia,function = "sdmmc2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d8-pl6 {</div><div class='add'>+				nvidia,pins = "vi_d8_pl6",</div><div class='add'>+					      "vi_d9_pl7";</div><div class='add'>+				nvidia,function = "sdmmc2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC3 pinmux */</div><div class='add'>+			sdmmc3-clk {</div><div class='add'>+				nvidia,pins = "sdmmc3_clk_pa6";</div><div class='add'>+				nvidia,function = "sdmmc3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc3-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc3_cmd_pa7",</div><div class='add'>+					      "sdmmc3_dat0_pb7",</div><div class='add'>+					      "sdmmc3_dat1_pb6",</div><div class='add'>+					      "sdmmc3_dat2_pb5",</div><div class='add'>+					      "sdmmc3_dat3_pb4",</div><div class='add'>+					      "sdmmc3_dat4_pd1",</div><div class='add'>+					      "sdmmc3_dat5_pd0",</div><div class='add'>+					      "sdmmc3_dat6_pd3",</div><div class='add'>+					      "sdmmc3_dat7_pd4";</div><div class='add'>+				nvidia,function = "sdmmc3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* SDMMC4 pinmux */</div><div class='add'>+			sdmmc4-clk {</div><div class='add'>+				nvidia,pins = "sdmmc4_clk_pcc4";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4-cmd {</div><div class='add'>+				nvidia,pins = "sdmmc4_cmd_pt7",</div><div class='add'>+					      "sdmmc4_dat0_paa0",</div><div class='add'>+					      "sdmmc4_dat1_paa1",</div><div class='add'>+					      "sdmmc4_dat2_paa2",</div><div class='add'>+					      "sdmmc4_dat3_paa3",</div><div class='add'>+					      "sdmmc4_dat4_paa4",</div><div class='add'>+					      "sdmmc4_dat5_paa5",</div><div class='add'>+					      "sdmmc4_dat6_paa6",</div><div class='add'>+					      "sdmmc4_dat7_paa7";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4-rst-n {</div><div class='add'>+				nvidia,pins = "sdmmc4_rst_n_pcc3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			cam-mclk {</div><div class='add'>+				nvidia,pins = "cam_mclk_pcc0";</div><div class='add'>+				nvidia,function = "vi_alt3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* I2C pinmux */</div><div class='add'>+			gen1-i2c {</div><div class='add'>+				nvidia,pins = "gen1_i2c_scl_pc4",</div><div class='add'>+					      "gen1_i2c_sda_pc5";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gen2-i2c {</div><div class='add'>+				nvidia,pins = "gen2_i2c_scl_pt5",</div><div class='add'>+					      "gen2_i2c_sda_pt6";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			cam-i2c {</div><div class='add'>+				nvidia,pins = "cam_i2c_scl_pbb1",</div><div class='add'>+					      "cam_i2c_sda_pbb2";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ddc-i2c {</div><div class='add'>+				nvidia,pins = "ddc_scl_pv4",</div><div class='add'>+					      "ddc_sda_pv5";</div><div class='add'>+				nvidia,function = "i2c4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pwr-i2c {</div><div class='add'>+				nvidia,pins = "pwr_i2c_scl_pz6",</div><div class='add'>+					      "pwr_i2c_sda_pz7";</div><div class='add'>+				nvidia,function = "i2cpwr";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			hotplug-i2c {</div><div class='add'>+				nvidia,pins = "pu4";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* HDMI pinmux */</div><div class='add'>+			hdmi-cec {</div><div class='add'>+				nvidia,pins = "hdmi_cec_pee3";</div><div class='add'>+				nvidia,function = "cec";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			hdmi-hpd {</div><div class='add'>+				nvidia,pins = "hdmi_int_pn7";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-A */</div><div class='add'>+			ulpi-data0-po1 {</div><div class='add'>+				nvidia,pins = "ulpi_data0_po1";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data1-po2 {</div><div class='add'>+				nvidia,pins = "ulpi_data1_po2";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data5-po6 {</div><div class='add'>+				nvidia,pins = "ulpi_data5_po6";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-data7-po0 {</div><div class='add'>+				nvidia,pins = "ulpi_data7_po0",</div><div class='add'>+					      "ulpi_data2_po3",</div><div class='add'>+					      "ulpi_data3_po4",</div><div class='add'>+					      "ulpi_data4_po5",</div><div class='add'>+					      "ulpi_data6_po7";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-B */</div><div class='add'>+			uartb-txd-rts {</div><div class='add'>+				nvidia,pins = "uart2_txd_pc2",</div><div class='add'>+					      "uart2_rts_n_pj6";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			uartb-rxd-cts {</div><div class='add'>+				nvidia,pins = "uart2_rxd_pc3",</div><div class='add'>+					      "uart2_cts_n_pj5";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-C */</div><div class='add'>+			uartc-rxd-cts {</div><div class='add'>+				nvidia,pins = "uart3_cts_n_pa1",</div><div class='add'>+					      "uart3_rxd_pw7";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			uartc-txd-rts {</div><div class='add'>+				nvidia,pins = "uart3_rts_n_pc0",</div><div class='add'>+					      "uart3_txd_pw6";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* UART-D */</div><div class='add'>+			ulpi-nxt-py2 {</div><div class='add'>+				nvidia,pins = "ulpi_nxt_py2";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ulpi-clk-py0 {</div><div class='add'>+				nvidia,pins = "ulpi_clk_py0",</div><div class='add'>+					      "ulpi_dir_py1",</div><div class='add'>+					      "ulpi_stp_py3";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* I2S pinmux */</div><div class='add'>+			dap-i2s0 {</div><div class='add'>+				nvidia,pins = "dap1_fs_pn0",</div><div class='add'>+					      "dap1_din_pn1",</div><div class='add'>+					      "dap1_dout_pn2",</div><div class='add'>+					      "dap1_sclk_pn3";</div><div class='add'>+				nvidia,function = "i2s0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap-i2s1 {</div><div class='add'>+				nvidia,pins = "dap2_fs_pa2",</div><div class='add'>+					      "dap2_sclk_pa3",</div><div class='add'>+					      "dap2_din_pa4",</div><div class='add'>+					      "dap2_dout_pa5";</div><div class='add'>+				nvidia,function = "i2s1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap3-fs {</div><div class='add'>+				nvidia,pins = "dap3_fs_pp0";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap3-din {</div><div class='add'>+				nvidia,pins = "dap3_din_pp1";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap3-dout {</div><div class='add'>+				nvidia,pins = "dap3_dout_pp2",</div><div class='add'>+					      "dap3_sclk_pp3";</div><div class='add'>+				nvidia,function = "i2s2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap-i2s3 {</div><div class='add'>+				nvidia,pins = "dap4_fs_pp4",</div><div class='add'>+					      "dap4_din_pp5",</div><div class='add'>+					      "dap4_dout_pp6",</div><div class='add'>+					      "dap4_sclk_pp7";</div><div class='add'>+				nvidia,function = "i2s3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			i2s4 {</div><div class='add'>+				nvidia,pins = "pbb7";</div><div class='add'>+				nvidia,function = "i2s4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Sensors pinmux */</div><div class='add'>+			nct-irq {</div><div class='add'>+				nvidia,pins = "pcc2";</div><div class='add'>+				nvidia,function = "i2s4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			hall {</div><div class='add'>+				nvidia,pins = "pbb6";</div><div class='add'>+				nvidia,function = "vgp6";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Asus EC pinmux */</div><div class='add'>+			ec-irqs {</div><div class='add'>+				nvidia,pins = "kb_row10_ps2",</div><div class='add'>+					      "kb_row15_ps7";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			ec-reqs {</div><div class='add'>+				nvidia,pins = "kb_col1_pq1";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Memory type bootstrap */</div><div class='add'>+			mem-boostraps {</div><div class='add'>+				nvidia,pins = "gmi_ad4_pg4",</div><div class='add'>+					      "gmi_ad5_pg5";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* PCI-e pinmux */</div><div class='add'>+			pex-l2-rst-n {</div><div class='add'>+				nvidia,pins = "pex_l2_rst_n_pcc6",</div><div class='add'>+					      "pex_l0_rst_n_pdd1",</div><div class='add'>+					      "pex_l1_rst_n_pdd5";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pex-l2-clkreq-n {</div><div class='add'>+				nvidia,pins = "pex_l2_clkreq_n_pcc7",</div><div class='add'>+					      "pex_l0_prsnt_n_pdd0",</div><div class='add'>+					      "pex_l0_clkreq_n_pdd2",</div><div class='add'>+					      "pex_wake_n_pdd3",</div><div class='add'>+					      "pex_l1_prsnt_n_pdd4",</div><div class='add'>+					      "pex_l1_clkreq_n_pdd6",</div><div class='add'>+					      "pex_l2_prsnt_n_pdd7";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Display A pinmux */</div><div class='add'>+			lcd-pwr0-pb2 {</div><div class='add'>+				nvidia,pins = "lcd_pwr0_pb2",</div><div class='add'>+					      "lcd_pclk_pb3",</div><div class='add'>+					      "lcd_pwr1_pc1",</div><div class='add'>+					      "lcd_d0_pe0",</div><div class='add'>+					      "lcd_d1_pe1",</div><div class='add'>+					      "lcd_d2_pe2",</div><div class='add'>+					      "lcd_d3_pe3",</div><div class='add'>+					      "lcd_d4_pe4",</div><div class='add'>+					      "lcd_d5_pe5",</div><div class='add'>+					      "lcd_d6_pe6",</div><div class='add'>+					      "lcd_d7_pe7",</div><div class='add'>+					      "lcd_d8_pf0",</div><div class='add'>+					      "lcd_d9_pf1",</div><div class='add'>+					      "lcd_d10_pf2",</div><div class='add'>+					      "lcd_d11_pf3",</div><div class='add'>+					      "lcd_d12_pf4",</div><div class='add'>+					      "lcd_d13_pf5",</div><div class='add'>+					      "lcd_d14_pf6",</div><div class='add'>+					      "lcd_d15_pf7",</div><div class='add'>+					      "lcd_de_pj1",</div><div class='add'>+					      "lcd_hsync_pj3",</div><div class='add'>+					      "lcd_vsync_pj4",</div><div class='add'>+					      "lcd_d16_pm0",</div><div class='add'>+					      "lcd_d17_pm1",</div><div class='add'>+					      "lcd_d18_pm2",</div><div class='add'>+					      "lcd_d19_pm3",</div><div class='add'>+					      "lcd_d20_pm4",</div><div class='add'>+					      "lcd_d21_pm5",</div><div class='add'>+					      "lcd_d22_pm6",</div><div class='add'>+					      "lcd_d23_pm7",</div><div class='add'>+					      "lcd_dc0_pn6",</div><div class='add'>+					      "lcd_sdin_pz2";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			lcd-cs0-n-pn4 {</div><div class='add'>+				nvidia,pins = "lcd_sdout_pn5",</div><div class='add'>+					      "lcd_wr_n_pz3",</div><div class='add'>+					      "lcd_pwr2_pc6",</div><div class='add'>+					      "lcd_dc1_pd2";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blink {</div><div class='add'>+				nvidia,pins = "clk_32k_out_pa0";</div><div class='add'>+				nvidia,function = "blink";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* KBC keys */</div><div class='add'>+			kb-col0 {</div><div class='add'>+				nvidia,pins = "kb_col0_pq0",</div><div class='add'>+					      "kb_row1_pr1",</div><div class='add'>+					      "kb_row3_pr3",</div><div class='add'>+					      "kb_row7_pr7",</div><div class='add'>+					      "kb_row8_ps0";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			kb-col5 {</div><div class='add'>+				nvidia,pins = "kb_col5_pq5",</div><div class='add'>+					      "kb_col7_pq7",</div><div class='add'>+					      "kb_row2_pr2",</div><div class='add'>+					      "kb_row4_pr4",</div><div class='add'>+					      "kb_row5_pr5",</div><div class='add'>+					      "kb_row13_ps5";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmi-cs0-n-pj0 {</div><div class='add'>+				nvidia,pins = "gmi_wp_n_pc7",</div><div class='add'>+					      "gmi_wait_pi7",</div><div class='add'>+					      "gmi_cs0_n_pj0",</div><div class='add'>+					      "gmi_cs1_n_pj2",</div><div class='add'>+					      "gmi_cs2_n_pk3",</div><div class='add'>+					      "gmi_cs3_n_pk4";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi-pclk-pt0 {</div><div class='add'>+				nvidia,pins = "vi_pclk_pt0";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* GPIO keys pinmux */</div><div class='add'>+			power-key {</div><div class='add'>+				nvidia,pins = "pv0";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vol-keys {</div><div class='add'>+				nvidia,pins = "kb_col3_pq3",</div><div class='add'>+					      "kb_col4_pq4";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Bluetooth */</div><div class='add'>+			bt-shutdown {</div><div class='add'>+				nvidia,pins = "pu0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			bt-dev-wake {</div><div class='add'>+				nvidia,pins = "pu1";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			bt-host-wake {</div><div class='add'>+				nvidia,pins = "pu6";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pu2 {</div><div class='add'>+				nvidia,pins = "pu2";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pu3 {</div><div class='add'>+				nvidia,pins = "pu3";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pcc1 {</div><div class='add'>+				nvidia,pins = "pcc1";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pv2 {</div><div class='add'>+				nvidia,pins = "pv2";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pv3 {</div><div class='add'>+				nvidia,pins = "pv3";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi-vsync-pd6 {</div><div class='add'>+				nvidia,pins = "vi_vsync_pd6",</div><div class='add'>+					      "vi_hsync_pd7";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d10-pt2 {</div><div class='add'>+				nvidia,pins = "vi_d10_pt2",</div><div class='add'>+					      "vi_d0_pt4",</div><div class='add'>+					      "pbb0";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			kb-row0-pr0 {</div><div class='add'>+				nvidia,pins = "kb_row0_pr0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad0-pg0 {</div><div class='add'>+				nvidia,pins = "gmi_ad0_pg0",</div><div class='add'>+					      "gmi_ad1_pg1",</div><div class='add'>+					      "gmi_ad2_pg2",</div><div class='add'>+					      "gmi_ad3_pg3",</div><div class='add'>+					      "gmi_ad6_pg6",</div><div class='add'>+					      "gmi_ad7_pg7",</div><div class='add'>+					      "gmi_wr_n_pi0",</div><div class='add'>+					      "gmi_oe_n_pi1",</div><div class='add'>+					      "gmi_dqs_pi2",</div><div class='add'>+					      "gmi_adv_n_pk0",</div><div class='add'>+					      "gmi_clk_pk1";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad13-ph5 {</div><div class='add'>+				nvidia,pins = "gmi_ad13_ph5";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad10-ph2 {</div><div class='add'>+				nvidia,pins = "gmi_ad10_ph2",</div><div class='add'>+					      "gmi_ad11_ph3",</div><div class='add'>+					      "gmi_ad14_ph6";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			gmi-ad12-ph4 {</div><div class='add'>+				nvidia,pins = "gmi_ad12_ph4",</div><div class='add'>+					      "gmi_rst_n_pi4",</div><div class='add'>+					      "gmi_cs7_n_pi6";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Vibrator control */</div><div class='add'>+			vibrator {</div><div class='add'>+				nvidia,pins = "gmi_ad11_ph3";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_DOWN&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* PWM pinmux */</div><div class='add'>+			pwm-0 {</div><div class='add'>+				nvidia,pins = "gmi_ad8_ph0";</div><div class='add'>+				nvidia,function = "pwm0";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pwm-2 {</div><div class='add'>+				nvidia,pins = "pu5";</div><div class='add'>+				nvidia,function = "pwm2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmi-cs-n {</div><div class='add'>+				nvidia,pins = "gmi_cs4_n_pk2",</div><div class='add'>+					      "gmi_cs6_n_pi3";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Spdif pinmux */</div><div class='add'>+			spdif-out {</div><div class='add'>+				nvidia,pins = "spdif_out_pk5";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			spdif-in {</div><div class='add'>+				nvidia,pins = "spdif_in_pk6";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vi-d4-pl2 {</div><div class='add'>+				nvidia,pins = "vi_d4_pl2";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-d6-pl4 {</div><div class='add'>+				nvidia,pins = "vi_d6_pl4";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,lock = &lt;0&gt;;</div><div class='add'>+				nvidia,io-reset = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vi-mclk-pt1 {</div><div class='add'>+				nvidia,pins = "vi_mclk_pt1";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			jtag {</div><div class='add'>+				nvidia,pins = "jtag_rtck_pu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			crt-sync {</div><div class='add'>+				nvidia,pins = "crt_hsync_pv6",</div><div class='add'>+					      "crt_vsync_pv7";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk1-out {</div><div class='add'>+				nvidia,pins = "clk1_out_pw4";</div><div class='add'>+				nvidia,function = "extperiph1";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk2-out {</div><div class='add'>+				nvidia,pins = "clk2_out_pw5";</div><div class='add'>+				nvidia,function = "extperiph2";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk3-out {</div><div class='add'>+				nvidia,pins = "clk3_out_pee0";</div><div class='add'>+				nvidia,function = "extperiph3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			sys-clk-req {</div><div class='add'>+				nvidia,pins = "sys_clk_req_pz5";</div><div class='add'>+				nvidia,function = "sysclk";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pbb3 {</div><div class='add'>+				nvidia,pins = "pbb3";</div><div class='add'>+				nvidia,function = "vgp3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb4 {</div><div class='add'>+				nvidia,pins = "pbb4";</div><div class='add'>+				nvidia,function = "vgp4";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			pbb5 {</div><div class='add'>+				nvidia,pins = "pbb5";</div><div class='add'>+				nvidia,function = "vgp5";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk2-req-pcc5 {</div><div class='add'>+				nvidia,pins = "clk2_req_pcc5",</div><div class='add'>+					      "clk1_req_pee2";</div><div class='add'>+				nvidia,function = "dap";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+			clk3-req-pee1 {</div><div class='add'>+				nvidia,pins = "clk3_req_pee1";</div><div class='add'>+				nvidia,function = "dev3";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			owr {</div><div class='add'>+				nvidia,pins = "owr";</div><div class='add'>+				nvidia,function = "owr";</div><div class='add'>+				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* GPIO power/drive control */</div><div class='add'>+			drive-dap1 {</div><div class='add'>+				nvidia,pins = "drive_dap1",</div><div class='add'>+					      "drive_dap2",</div><div class='add'>+					      "drive_dbg",</div><div class='add'>+					      "drive_at5",</div><div class='add'>+					      "drive_gme",</div><div class='add'>+					      "drive_ddc",</div><div class='add'>+					      "drive_ao1",</div><div class='add'>+					      "drive_uart3";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+				nvidia,low-power-mode = &lt;TEGRA_PIN_LP_DRIVE_DIV_1&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_FASTEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_FASTEST&gt;;</div><div class='add'>+			};</div><div class='add'>+			drive-sdio1 {</div><div class='add'>+				nvidia,pins = "drive_sdio1",</div><div class='add'>+					      "drive_sdio3";</div><div class='add'>+				nvidia,high-speed-mode = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;46&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;42&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_FAST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_FAST&gt;;</div><div class='add'>+			};</div><div class='add'>+			drive-sdmmc4 {</div><div class='add'>+				nvidia,pins = "drive_gma",</div><div class='add'>+					      "drive_gmb",</div><div class='add'>+					      "drive_gmc",</div><div class='add'>+					      "drive_gmd";</div><div class='add'>+				nvidia,pull-down-strength = &lt;9&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;9&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;TEGRA_PIN_SLEW_RATE_SLOWEST&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uartb: serial@70006040 {</div><div class='add'>+		compatible = "nvidia,tegra30-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		/* Broadcom GPS BCM47511 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uartc: serial@70006200 {</div><div class='add'>+		compatible = "nvidia,tegra30-hsuart";</div><div class='add'>+		reset-names = "serial";</div><div class='add'>+		/delete-property/ reg-shift;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		nvidia,adjust-baud-rates = &lt;0 9600 100&gt;,</div><div class='add'>+					   &lt;9600 115200 200&gt;,</div><div class='add'>+					   &lt;1000000 4000000 136&gt;;</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-NH665 BCM4330B1 */</div><div class='add'>+		bluetooth {</div><div class='add'>+			compatible = "brcm,bcm4330-bt";</div><div class='add'>+			max-speed = &lt;4000000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='add'>+			clock-names = "txco";</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "host-wakeup";</div><div class='add'>+</div><div class='add'>+			device-wakeup-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			shutdown-gpios = &lt;&amp;gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			vbat-supply = &lt;&amp;vdd_3v3_com&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm@7000a000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gen1_i2c: i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		/* Nuvoton NPCE698LA0BX embedded controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		/* Atmel Maxtouch MXT1664 HID over I2C */</div><div class='add'>+		touchscreen@4b {</div><div class='add'>+			compatible = "hid-over-i2c";</div><div class='add'>+			reg = &lt;0x4b&gt;;</div><div class='add'>+</div><div class='add'>+			hid-descr-addr = &lt;0x0000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vddl-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		/* TI TPS61050/61052 Boost Converter */</div><div class='add'>+		flash-led@33 {</div><div class='add'>+			compatible = "ti,tps61052";</div><div class='add'>+			reg = &lt;0x33&gt;;</div><div class='add'>+</div><div class='add'>+			led {</div><div class='add'>+				color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		imu@69 {</div><div class='add'>+			compatible = "invensense,mpu6050";</div><div class='add'>+			reg = &lt;0x69&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply   = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+</div><div class='add'>+			mount-matrix =	 "0", "-1",  "0",</div><div class='add'>+					"-1",  "0",  "0",</div><div class='add'>+					 "0",  "0", "-1";</div><div class='add'>+</div><div class='add'>+			/* External I2C interface */</div><div class='add'>+			i2c-gate {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				magnetometer@d {</div><div class='add'>+					compatible = "asahi-kasei,ak8975";</div><div class='add'>+					reg = &lt;0x0d&gt;;</div><div class='add'>+</div><div class='add'>+					interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+					interrupts = &lt;TEGRA_GPIO(D, 5) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+					vdd-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+					vid-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+</div><div class='add'>+					mount-matrix =	 "0", "-1",  "0",</div><div class='add'>+							"-1",  "0",  "0",</div><div class='add'>+							 "0",  "0", "-1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_ddc: i2c@7000c700 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;93750&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+		rt5640: audio-codec@1c {</div><div class='add'>+			compatible = "realtek,rt5640";</div><div class='add'>+			reg = &lt;0x1c&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+			clock-names = "mclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Texas Instruments TPS659110 PMIC */</div><div class='add'>+		pmic: pmic@2d {</div><div class='add'>+			compatible = "ti,tps65911";</div><div class='add'>+			reg = &lt;0x2d&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			ti,en-gpio-sleep = &lt;0 0 1 0 0 0 0 0 0&gt;;</div><div class='add'>+			ti,system-power-controller;</div><div class='add'>+			ti,sleep-keep-ck32k;</div><div class='add'>+			ti,sleep-enable;</div><div class='add'>+</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+</div><div class='add'>+			vcc1-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc2-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc3-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+			vcc4-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+			vcc5-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vcc6-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			vcc7-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+			vccio-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+</div><div class='add'>+			pmic-sleep-hog {</div><div class='add'>+				gpio-hog;</div><div class='add'>+				gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				output-high;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				vdd_lcd: vdd1 {</div><div class='add'>+					regulator-name = "vddio_ddr_1v2";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vddio_ddr: vdd2 {</div><div class='add'>+					regulator-name = "vddio_ddr";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_cpu: vddctrl {</div><div class='add'>+					regulator-name = "vdd_cpu,vdd_sys";</div><div class='add'>+					regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+					regulator-coupled-with = &lt;&amp;vdd_core&gt;;</div><div class='add'>+					regulator-coupled-max-spread = &lt;300000&gt;;</div><div class='add'>+					regulator-max-step-microvolt = &lt;100000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					nvidia,tegra-cpu-regulator;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vdd_1v8_vio: vio {</div><div class='add'>+					regulator-name = "vdd_1v8_gen";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* eMMC VDD */</div><div class='add'>+				vcore_emmc: ldo1 {</div><div class='add'>+					regulator-name = "vdd_emmc_core";</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* ldo2 and ldo3 are not used by TF600T */</div><div class='add'>+</div><div class='add'>+				ldo4 {</div><div class='add'>+					regulator-name = "vdd_rtc";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* uSD slot VDDIO */</div><div class='add'>+				vddio_usd: ldo5 {</div><div class='add'>+					regulator-name = "vddio_sdmmc";</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				avdd_dsi_csi: ldo6 {</div><div class='add'>+					regulator-name = "avdd_dsi_csi";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo7 {</div><div class='add'>+					regulator-name = "vdd_pllm,x,u,a_p_c_s";</div><div class='add'>+					regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ldo8 {</div><div class='add'>+					regulator-name = "vdd_ddr_hs";</div><div class='add'>+					regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					ti,regulator-ext-sleep-control = &lt;8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Capella CM3218 ambient light sensor */</div><div class='add'>+		light-sensor@48 {</div><div class='add'>+			compatible = "capella,cm32181";</div><div class='add'>+			reg = &lt;0x48&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(L, 0) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			vdd-supply = &lt;&amp;vdd_3v3_als&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nct72: temperature-sensor@4c {</div><div class='add'>+			compatible = "onnn,nct1008";</div><div class='add'>+			reg = &lt;0x4c&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_core: core-regulator@60 {</div><div class='add'>+			compatible = "ti,tps62361";</div><div class='add'>+			reg = &lt;0x60&gt;;</div><div class='add'>+</div><div class='add'>+			regulator-name = "tps62361-vout";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1770000&gt;;</div><div class='add'>+			regulator-coupled-with = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			regulator-coupled-max-spread = &lt;300000&gt;;</div><div class='add'>+			regulator-max-step-microvolt = &lt;100000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			ti,enable-vout-discharge;</div><div class='add'>+			ti,vsel0-state-high;</div><div class='add'>+			ti,vsel1-state-high;</div><div class='add'>+</div><div class='add'>+			nvidia,tegra-core-regulator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmc@7000e400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,invert-interrupt;</div><div class='add'>+		nvidia,suspend-mode = &lt;2&gt;;</div><div class='add'>+		nvidia,cpu-pwr-good-time = &lt;2000&gt;;</div><div class='add'>+		nvidia,cpu-pwr-off-time = &lt;200&gt;;</div><div class='add'>+		nvidia,core-pwr-good-time = &lt;3845 3845&gt;;</div><div class='add'>+		nvidia,core-pwr-off-time = &lt;0&gt;;</div><div class='add'>+		nvidia,core-power-req-active-high;</div><div class='add'>+		nvidia,sys-clock-req-active-high;</div><div class='add'>+		core-supply = &lt;&amp;vdd_core&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-thermtrip {</div><div class='add'>+			nvidia,i2c-controller-id = &lt;4&gt;;</div><div class='add'>+			nvidia,bus-addr = &lt;0x2d&gt;;</div><div class='add'>+			nvidia,reg-addr = &lt;0x3f&gt;;</div><div class='add'>+			nvidia,reg-data = &lt;0x81&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi@7000da00 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+</div><div class='add'>+		flash@1 {</div><div class='add'>+			compatible = "winbond,w25q32", "jedec,spi-nor";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+			vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f000 {</div><div class='add'>+		emc-timings-0 {</div><div class='add'>+			/* Elpida 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00020001 0xc0000010</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x75e30303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010001 0xc0000010</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x74e30303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000001 0xc0000018</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x74430504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x74040a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000005 0xc0000044</div><div class='add'>+					0x00000001 0x00000002 0x00000009 0x00000005</div><div class='add'>+					0x00000005 0x00000001 0x00000002 0x00000008</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000d0709 0x7086110a 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000b 0xc0000087</div><div class='add'>+					0x00000004 0x00000005 0x00000012 0x0000000c</div><div class='add'>+					0x0000000b 0x00000002 0x00000003 0x0000000c</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00160d12 0x710c2213 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-1 {</div><div class='add'>+			/* Hynix 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010003 0xc0000010</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x74630303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000018</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x73c30504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000006 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x73840a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000b 0xc0000044</div><div class='add'>+					0x00000001 0x00000002 0x00000009 0x00000005</div><div class='add'>+					0x00000005 0x00000001 0x00000002 0x00000008</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000c0609 0x7086110a 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000016 0xc0000087</div><div class='add'>+					0x00000003 0x00000004 0x00000012 0x0000000c</div><div class='add'>+					0x0000000b 0x00000002 0x00000003 0x0000000c</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00150c12 0x710c2213 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-2 {</div><div class='add'>+			/* Micron 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00010003 0xc0000010</div><div class='add'>+					0x00000001 0x00000001 0x00000002 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0502 0x73430303 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000003 0xc0000018</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000000</div><div class='add'>+					0x00000001 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0503 0x74430504 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000006 0xc0000025</div><div class='add'>+					0x00000001 0x00000001 0x00000005 0x00000002</div><div class='add'>+					0x00000003 0x00000001 0x00000003 0x00000008</div><div class='add'>+					0x00000002 0x00000001 0x00000002 0x00000006</div><div class='add'>+					0x06020102 0x000a0505 0x74040a06 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x0000000b 0xc0000044</div><div class='add'>+					0x00000001 0x00000002 0x00000009 0x00000005</div><div class='add'>+					0x00000005 0x00000001 0x00000002 0x00000008</div><div class='add'>+					0x00000002 0x00000002 0x00000003 0x00000006</div><div class='add'>+					0x06030202 0x000d0709 0x7086110a 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emem-configuration = &lt; 0x00000016 0xc0000087</div><div class='add'>+					0x00000004 0x00000005 0x00000012 0x0000000c</div><div class='add'>+					0x0000000b 0x00000003 0x00000003 0x0000000c</div><div class='add'>+					0x00000002 0x00000002 0x00000004 0x00000008</div><div class='add'>+					0x08040202 0x00160d12 0x710c2213 0x001f0000 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory-controller@7000f400 {</div><div class='add'>+		emc-timings-0 {</div><div class='add'>+			/* Elpida 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			timing-25500000 {</div><div class='add'>+				clock-frequency = &lt;25500000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000001</div><div class='add'>+					0x00000007 0x00000000 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x000000c0 0x00000000 0x00000030</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000008 0x00000008</div><div class='add'>+					0x00000004 0x00000001 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x000000c7 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000287 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x0000000f 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000010 0x00000010</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000004</div><div class='add'>+					0x0000001e 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000020 0x00000020</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000009</div><div class='add'>+					0x0000003d 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000040 0x00000040</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200040&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000521&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000011</div><div class='add'>+					0x0000006f 0x0000000c 0x00000004 0x00000003</div><div class='add'>+					0x00000008 0x00000002 0x0000000a 0x00000004</div><div class='add'>+					0x00000004 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x00000b2d 0x00000000 0x000002cb</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000075 0x00000200</div><div class='add'>+					0x00000004 0x0000000c 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000b6d 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007088 0x00200084</div><div class='add'>+					0x00008000 0x00034000 0x00034000 0x00034000</div><div class='add'>+					0x00034000 0x00014000 0x00014000 0x00014000</div><div class='add'>+					0x00014000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00048000 0x00048000 0x00048000</div><div class='add'>+					0x00048000 0x000002a0 0x0600013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x080001e8 0x06000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x0150000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000174b 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200058&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000d71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000023</div><div class='add'>+					0x000000df 0x00000019 0x00000009 0x00000005</div><div class='add'>+					0x0000000d 0x00000004 0x00000013 0x00000009</div><div class='add'>+					0x00000009 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000011 0x0000169a 0x00000000 0x000005a6</div><div class='add'>+					0x00000003 0x00000010 0x00000001 0x00000000</div><div class='add'>+					0x0000000e 0x00000018 0x000000e9 0x00000200</div><div class='add'>+					0x00000005 0x00000017 0x00000000 0x00000007</div><div class='add'>+					0x00000008 0x000016da 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf0080191</div><div class='add'>+					0x00008000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x00000008 0x00000008 0x00000008</div><div class='add'>+					0x00000008 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x000002a0 0x0600013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x06000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x00df000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80002d93 0xf8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-1 {</div><div class='add'>+			/* Hynix 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x0000000d 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x0000000e 0x0000000e</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000004</div><div class='add'>+					0x0000001a 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x0000001c 0x0000001c</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000009</div><div class='add'>+					0x00000035 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000038 0x00000038</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200040&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000521&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000011</div><div class='add'>+					0x00000060 0x0000000c 0x00000003 0x00000004</div><div class='add'>+					0x00000008 0x00000002 0x0000000a 0x00000003</div><div class='add'>+					0x00000003 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x00000b2d 0x00000000 0x000002cb</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x00000010 0x00000066 0x00000200</div><div class='add'>+					0x00000004 0x0000000c 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000b6d 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007288 0x00200084</div><div class='add'>+					0x00008000 0x00044000 0x00044000 0x00044000</div><div class='add'>+					0x00044000 0x00014000 0x00014000 0x00014000</div><div class='add'>+					0x00014000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00048000 0x00048000 0x00048000</div><div class='add'>+					0x00048000 0x000002a0 0x0600013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x06000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x015f000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000174b 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200058&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000d71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000023</div><div class='add'>+					0x000000c1 0x00000019 0x00000008 0x00000005</div><div class='add'>+					0x0000000d 0x00000004 0x00000013 0x00000008</div><div class='add'>+					0x00000008 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000011 0x0000169a 0x00000000 0x000005a6</div><div class='add'>+					0x00000003 0x00000010 0x00000001 0x00000000</div><div class='add'>+					0x0000000e 0x00000018 0x000000cb 0x00000200</div><div class='add'>+					0x00000005 0x00000017 0x00000000 0x00000007</div><div class='add'>+					0x00000008 0x000016da 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf0080191</div><div class='add'>+					0x00008000 0x00008008 0x00000008 0x00000008</div><div class='add'>+					0x00000008 0x00000008 0x00000008 0x00000008</div><div class='add'>+					0x00000008 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x0000000a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x000002a0 0x0800013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x00fd000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80002d93 0xe8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emc-timings-2 {</div><div class='add'>+			/* Micron 2GB 750 MHZ */</div><div class='add'>+			nvidia,ram-code = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			timing-51000000 {</div><div class='add'>+				clock-frequency = &lt;51000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200008&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000002</div><div class='add'>+					0x00000008 0x00000001 0x00000000 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000000</div><div class='add'>+					0x00000000 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000181 0x00000000 0x00000060</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000009 0x00000009</div><div class='add'>+					0x00000004 0x00000002 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000018e 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000040b 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-102000000 {</div><div class='add'>+				clock-frequency = &lt;102000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000004</div><div class='add'>+					0x0000001e 0x00000003 0x00000001 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000001</div><div class='add'>+					0x00000001 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000005 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000303 0x00000000 0x000000c0</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000020 0x00000020</div><div class='add'>+					0x00000004 0x00000004 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x0000031c 0x00000006 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x007800a4</div><div class='add'>+					0x00008000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x000fc000 0x000fc000 0x000fc000</div><div class='add'>+					0x000fc000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00000000</div><div class='add'>+					0x00000040 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000713 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-204000000 {</div><div class='add'>+				clock-frequency = &lt;204000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100003&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200048&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80001221&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+				nvidia,emc-cfg-dyn-self-ref;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000009</div><div class='add'>+					0x0000003d 0x00000007 0x00000002 0x00000002</div><div class='add'>+					0x0000000a 0x00000005 0x0000000b 0x00000002</div><div class='add'>+					0x00000002 0x00000003 0x00000001 0x00000000</div><div class='add'>+					0x00000005 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000b 0x00000607 0x00000000 0x00000181</div><div class='add'>+					0x00000002 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000040 0x00000040</div><div class='add'>+					0x00000004 0x00000007 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000638 0x00000007 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00004288 0x004400a4</div><div class='add'>+					0x00008000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00080000 0x00080000 0x00080000</div><div class='add'>+					0x00080000 0x000002a0 0x0800211c 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f108 0x05057404 0x54000007</div><div class='add'>+					0x08000168 0x08000000 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x000c000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80000d22 0xe8000000 0xff00ff00 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-375000000 {</div><div class='add'>+				clock-frequency = &lt;375000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200040&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000521&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000011</div><div class='add'>+					0x0000006f 0x0000000c 0x00000004 0x00000003</div><div class='add'>+					0x00000008 0x00000002 0x0000000a 0x00000004</div><div class='add'>+					0x00000004 0x00000002 0x00000001 0x00000000</div><div class='add'>+					0x00000004 0x00000006 0x00000004 0x0000000a</div><div class='add'>+					0x0000000c 0x00000b2d 0x00000000 0x000002cb</div><div class='add'>+					0x00000001 0x00000008 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000f 0x00000075 0x00000200</div><div class='add'>+					0x00000004 0x0000000c 0x00000000 0x00000004</div><div class='add'>+					0x00000005 0x00000b6d 0x00000000 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00007088 0x00200084</div><div class='add'>+					0x00008000 0x00044000 0x00044000 0x00044000</div><div class='add'>+					0x00044000 0x00014000 0x00014000 0x00014000</div><div class='add'>+					0x00014000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00048000 0x00048000 0x00048000</div><div class='add'>+					0x00048000 0x000002a0 0x0800013d 0x00000000</div><div class='add'>+					0x77fff884 0x01f1f508 0x05057404 0x54000007</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x0150000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x8000174b 0xe8000000 0xff00ff89 &gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timing-750000000 {</div><div class='add'>+				clock-frequency = &lt;750000000&gt;;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-auto-cal-interval = &lt;0x001fffff&gt;;</div><div class='add'>+				nvidia,emc-mode-1 = &lt;0x80100002&gt;;</div><div class='add'>+				nvidia,emc-mode-2 = &lt;0x80200058&gt;;</div><div class='add'>+				nvidia,emc-mode-reset = &lt;0x80000d71&gt;;</div><div class='add'>+				nvidia,emc-zcal-cnt-long = &lt;0x00000040&gt;;</div><div class='add'>+				nvidia,emc-cfg-periodic-qrst;</div><div class='add'>+</div><div class='add'>+				nvidia,emc-configuration =  &lt; 0x00000023</div><div class='add'>+					0x000000df 0x00000019 0x00000009 0x00000005</div><div class='add'>+					0x0000000d 0x00000004 0x00000013 0x00000009</div><div class='add'>+					0x00000009 0x00000006 0x00000001 0x00000000</div><div class='add'>+					0x00000007 0x0000000b 0x00000009 0x0000000b</div><div class='add'>+					0x00000011 0x0000169a 0x00000000 0x000005a6</div><div class='add'>+					0x00000003 0x00000010 0x00000001 0x00000000</div><div class='add'>+					0x0000000e 0x00000018 0x000000e9 0x00000200</div><div class='add'>+					0x00000005 0x00000017 0x00000000 0x00000007</div><div class='add'>+					0x00000008 0x000016da 0x0000000c 0x00000004</div><div class='add'>+					0x00000000 0x00000000 0x00005088 0xf0080191</div><div class='add'>+					0x00008000 0x0000800a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x00000008 0x00000008 0x00000008</div><div class='add'>+					0x00000008 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x00000000 0x00000000 0x00000000</div><div class='add'>+					0x00000000 0x007fc00a 0x0000000a 0x0000000a</div><div class='add'>+					0x0000000a 0x000002a0 0x0800013d 0x22220000</div><div class='add'>+					0x77fff884 0x01f1f501 0x07077404 0x54000000</div><div class='add'>+					0x080001e8 0x08000021 0x00000802 0x00020000</div><div class='add'>+					0x00000100 0x00df000c 0xa0f10000 0x00000000</div><div class='add'>+					0x00000000 0x80002d93 0xf8000000 0xff00ff49 &gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hda@70030000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahub@70080000 {</div><div class='add'>+		i2s@70080400 {		/* i2s1 */</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* BT SCO */</div><div class='add'>+		i2s@70080600 {		/* i2s3 */</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1: mmc@78000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		cd-gpios = &lt;&amp;gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		power-gpios =  &lt;&amp;gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vddio_usd&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc3: mmc@78000400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA30_CLK_SDMMC3&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA30_CLK_PLL_C&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+		max-frequency = &lt;50000000&gt;;</div><div class='add'>+		keep-power-in-suspend;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		non-removable;</div><div class='add'>+</div><div class='add'>+		mmc-pwrseq = &lt;&amp;brcm_wifi_pwrseq&gt;;</div><div class='add'>+		vmmc-supply = &lt;&amp;vdd_3v3_com&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+</div><div class='add'>+		/* Azurewave AW-NH665 BCM4330B1 */</div><div class='add'>+		wifi@1 {</div><div class='add'>+			compatible = "brcm,bcm4329-fmac";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "host-wake";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc4: mmc@78000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+		non-removable;</div><div class='add'>+		mmc-ddr-1_8v;</div><div class='add'>+</div><div class='add'>+		vmmc-supply = &lt;&amp;vcore_emmc&gt;;</div><div class='add'>+		vqmmc-supply = &lt;&amp;vdd_1v8_vio&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* USB via ASUS connector */</div><div class='add'>+	usb@7d000000 {</div><div class='add'>+		compatible = "nvidia,tegra30-udc";</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@7d000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		dr_mode = "peripheral";</div><div class='add'>+		nvidia,hssync-start-delay = &lt;0&gt;;</div><div class='add'>+		nvidia,xcvr-lsfslew = &lt;2&gt;;</div><div class='add'>+		nvidia,xcvr-lsrslew = &lt;2&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Dock's USB port */</div><div class='add'>+	usb@7d008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-phy@7d008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		vbus-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vdd_5v0_bl&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 0 71428&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;1 255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;254&gt;;</div><div class='add'>+		default-brightness-level = &lt;15&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pad_battery: battery-pad {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;6760000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;25000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dock_battery: battery-dock {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;2980000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;22000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMIC has a built-in 32KHz oscillator which is used by PMC */</div><div class='add'>+	clk32k_in: clock-32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "pmic-oscillator";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extcon-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		switch-dock-hall-sensor {</div><div class='add'>+			label = "Lid sensor";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			debounce-interval = &lt;500&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-lineout-detect {</div><div class='add'>+			label = "Audio dock line-out detect";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(X, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LINEOUT_INSERT&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	haptic-feedback {</div><div class='add'>+		compatible = "gpio-vibrator";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-actmon {</div><div class='add'>+		/delete-node/ opp-800000000;</div><div class='add'>+		/delete-node/ opp-900000000;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table-emc {</div><div class='add'>+		/delete-node/ opp-800000000-1300;</div><div class='add'>+		/delete-node/ opp-900000000-1350;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	brcm_wifi_pwrseq: pwrseq-wifi {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_pmc TEGRA_PMC_CLK_BLINK&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;300&gt;;</div><div class='add'>+		power-off-delay-us = &lt;300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_bat: regulator-bat {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_ac_bat";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_cp: regulator-sby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_sby";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_sys: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_1v5_ddr: regulator-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_ddr";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_sys: regulator-3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pmic 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_com: regulator-com {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_com";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_als: regulator-als {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3_als";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(L, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v0_bl: regulator-bl {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v0_bl";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_bat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_5v0_sys: regulator-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "hdmi_5v0_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "asus,tegra-audio-rt5640-tf600t",</div><div class='add'>+			     "nvidia,tegra-audio-rt5640";</div><div class='add'>+		nvidia,model = "Asus VivoTab RT TF600T RT5640";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphones", "HPOR",</div><div class='add'>+			"Headphones", "HPOL",</div><div class='add'>+			"Speakers", "SPORP",</div><div class='add'>+			"Speakers", "SPORN",</div><div class='add'>+			"Speakers", "SPOLP",</div><div class='add'>+			"Speakers", "SPOLN",</div><div class='add'>+			"DMIC1", "Mic Jack";</div><div class='add'>+</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;rt5640&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		nvidia,mic-det-gpios = &lt;&amp;gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		nvidia,coupled-mic-hp-det;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A&gt;,</div><div class='add'>+			 &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+			 &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+		clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;tegra_car TEGRA30_CLK_EXTERN1&gt;,</div><div class='add'>+				  &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+</div><div class='add'>+		assigned-clock-parents = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+					 &lt;&amp;tegra_car TEGRA30_CLK_EXTERN1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		/*</div><div class='add'>+		 * NCT72 has two sensors:</div><div class='add'>+		 *</div><div class='add'>+		 *	0: internal that monitors ambient/skin temperature</div><div class='add'>+		 *	1: external that is connected to the CPU's diode</div><div class='add'>+		 *</div><div class='add'>+		 * Ideally we should use userspace thermal governor,</div><div class='add'>+		 * but it's a much more complex solution.  The "skin"</div><div class='add'>+		 * zone exists as a simpler solution which prevents</div><div class='add'>+		 * Transformers from getting too hot from a user's</div><div class='add'>+		 * tactile perspective. The CPU zone is intended to</div><div class='add'>+		 * protect silicon from damage.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		skin-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct72 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0: skin-alert {</div><div class='add'>+					/* throttle at 57C until temperature drops to 56.8C */</div><div class='add'>+					temperature = &lt;57000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1: skin-crit {</div><div class='add'>+					/* shut down at 65C */</div><div class='add'>+					temperature = &lt;65000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;trip0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;actmon THERMAL_NO_LIMIT</div><div class='add'>+								  THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+			polling-delay = &lt;5000&gt;; /* milliseconds */</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;nct72 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip2: cpu-alert {</div><div class='add'>+					/* throttle at 75C until temperature drops to 74.8C */</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;200&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip3: cpu-crit {</div><div class='add'>+					/* shut down at 90C */</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;trip2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;actmon THERMAL_NO_LIMIT</div><div class='add'>+								  THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts b/arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts<br/>index 2f7754fd42a1..c6ef0a20c19f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts</a></div><div class='hunk'>@@ -108,8 +108,8 @@</div><div class='ctx'> 	i2c@7000c400 {</div><div class='ctx'> 		touchscreen@20 {</div><div class='ctx'> 			rmi4-f11@11 {</div><div class='del'>-				syna,clip-x-high = &lt;1110&gt;;</div><div class='del'>-				syna,clip-y-high = &lt;1973&gt;;</div><div class='add'>+				syna,clip-x-high = &lt;1440&gt;;</div><div class='add'>+				syna,clip-y-high = &lt;2560&gt;;</div><div class='ctx'> </div><div class='ctx'> 				touchscreen-inverted-y;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts<br/>index 4012f9c799a8..b7d0ebb766a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts</a></div><div class='hunk'>@@ -1155,6 +1155,14 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='add'>+		embedded-controller@10 {</div><div class='add'>+			compatible = "pegatron,chagall-ec";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+			power-supplies = &lt;&amp;mains&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		/* Wolfson Microelectronics WM8903 audio codec */</div><div class='ctx'> 		wm8903: audio-codec@1a {</div><div class='ctx'> 			compatible = "wlf,wm8903";</div><div class='hunk'>@@ -2596,6 +2604,14 @@</div><div class='ctx'> 		default-brightness-level = &lt;15&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	battery: battery-cell {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion-polymer";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;3050000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;23000000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* PMIC has a built-in 32KHz oscillator which is used by PMC */</div><div class='ctx'> 	clk32k_in: clock-32k {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='head'>diff --git a/arch/arm/boot/dts/nvidia/tegra30.dtsi b/arch/arm/boot/dts/nvidia/tegra30.dtsi<br/>index f866fa7b55a5..2a4d93db8134 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nvidia/tegra30.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nvidia/tegra30.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nvidia/tegra30.dtsi</a></div><div class='hunk'>@@ -431,7 +431,7 @@</div><div class='ctx'> 		reg = &lt;0x60007000 0x1000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	apbdma: dma@6000a000 {</div><div class='add'>+	apbdma: dma-controller@6000a000 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";</div><div class='ctx'> 		reg = &lt;0x6000a000 0x1400&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile<br/>index 92e291603ea1..de4142e8f3ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/Makefile</a></div><div class='hunk'>@@ -69,10 +69,15 @@ dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='ctx'> 	imx6dl-colibri-eval-v3.dtb \</div><div class='ctx'> 	imx6dl-colibri-iris.dtb \</div><div class='ctx'> 	imx6dl-colibri-iris-v2.dtb \</div><div class='add'>+	imx6dl-colibri-v1.2-aster.dtb \</div><div class='add'>+	imx6dl-colibri-v1.2-eval-v3.dtb \</div><div class='add'>+	imx6dl-colibri-v1.2-iris.dtb \</div><div class='add'>+	imx6dl-colibri-v1.2-iris-v2.dtb \</div><div class='ctx'> 	imx6dl-cubox-i.dtb \</div><div class='ctx'> 	imx6dl-cubox-i-emmc-som-v15.dtb \</div><div class='ctx'> 	imx6dl-cubox-i-som-v15.dtb \</div><div class='ctx'> 	imx6dl-dfi-fs700-m60.dtb \</div><div class='add'>+	imx6dl-dhcom-pdk2.dtb \</div><div class='ctx'> 	imx6dl-dhcom-picoitx.dtb \</div><div class='ctx'> 	imx6dl-eckelmann-ci4x10.dtb \</div><div class='ctx'> 	imx6dl-emcon-avari.dtb \</div><div class='hunk'>@@ -157,6 +162,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='ctx'> 	imx6q-apalis-ixora.dtb \</div><div class='ctx'> 	imx6q-apalis-ixora-v1.1.dtb \</div><div class='ctx'> 	imx6q-apalis-ixora-v1.2.dtb \</div><div class='add'>+	imx6q-apalis-v1.2-eval.dtb \</div><div class='add'>+	imx6q-apalis-v1.2-eval-v1.2.dtb \</div><div class='add'>+	imx6q-apalis-v1.2-ixora.dtb \</div><div class='add'>+	imx6q-apalis-v1.2-ixora-v1.1.dtb \</div><div class='add'>+	imx6q-apalis-v1.2-ixora-v1.2.dtb \</div><div class='ctx'> 	imx6q-apf6dev.dtb \</div><div class='ctx'> 	imx6q-arm2.dtb \</div><div class='ctx'> 	imx6q-b450v3.dtb \</div><div class='hunk'>@@ -211,6 +221,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \</div><div class='ctx'> 	imx6q-kontron-samx6i-ads2.dtb \</div><div class='ctx'> 	imx6q-kp-tpc.dtb \</div><div class='ctx'> 	imx6q-logicpd.dtb \</div><div class='add'>+	imx6q-lxr.dtb \</div><div class='ctx'> 	imx6q-marsboard.dtb \</div><div class='ctx'> 	imx6q-mba6a.dtb \</div><div class='ctx'> 	imx6q-mba6b.dtb \</div><div class='hunk'>@@ -290,6 +301,8 @@ dtb-$(CONFIG_SOC_IMX6SL) += \</div><div class='ctx'> dtb-$(CONFIG_SOC_IMX6SLL) += \</div><div class='ctx'> 	imx6sll-evk.dtb \</div><div class='ctx'> 	imx6sll-kobo-clarahd.dtb \</div><div class='add'>+	imx6sll-kobo-clara2e-a.dtb \</div><div class='add'>+	imx6sll-kobo-clara2e-b.dtb \</div><div class='ctx'> 	imx6sll-kobo-librah2o.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_IMX6SX) += \</div><div class='ctx'> 	imx6sx-nitrogen6sx.dtb \</div><div class='hunk'>@@ -325,6 +338,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \</div><div class='ctx'> 	imx6ul-tx6ul-0010.dtb \</div><div class='ctx'> 	imx6ul-tx6ul-0011.dtb \</div><div class='ctx'> 	imx6ul-tx6ul-mainboard.dtb \</div><div class='add'>+	imx6ul-var-som-concerto.dtb \</div><div class='ctx'> 	imx6ull-14x14-evk.dtb \</div><div class='ctx'> 	imx6ull-colibri-aster.dtb \</div><div class='ctx'> 	imx6ull-colibri-emmc-aster.dtb \</div><div class='hunk'>@@ -342,6 +356,9 @@ dtb-$(CONFIG_SOC_IMX6UL) += \</div><div class='ctx'> 	imx6ull-dhcom-pdk2.dtb \</div><div class='ctx'> 	imx6ull-dhcom-picoitx.dtb \</div><div class='ctx'> 	imx6ull-dhcor-maveo-box.dtb \</div><div class='add'>+	imx6ull-engicam-microgea-bmm.dtb \</div><div class='add'>+	imx6ull-engicam-microgea-gtw.dtb \</div><div class='add'>+	imx6ull-engicam-microgea-rmm.dtb \</div><div class='ctx'> 	imx6ull-jozacp.dtb \</div><div class='ctx'> 	imx6ull-kontron-bl.dtb \</div><div class='ctx'> 	imx6ull-myir-mys-6ulx-eval.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx25.dtsi b/arch/arm/boot/dts/nxp/imx/imx25.dtsi<br/>index 9cfff2151b7e..82601a4b7b4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx25.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx25.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx25.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx25.dtsi</a></div><div class='hunk'>@@ -611,7 +611,7 @@</div><div class='ctx'> 			reg = &lt;0x80000000 0x3b002000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			nfc: nand@bb000000 {</div><div class='add'>+			nfc: nand-controller@bb000000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx31-lite.dts b/arch/arm/boot/dts/nxp/imx/imx31-lite.dts<br/>index d17abdfb6330..630f8fa69ba8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx31-lite.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx31-lite.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx31-lite.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx31-lite.dts</a></div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> &amp;weim {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	nor@0,0 {</div><div class='add'>+	flash@0,0 {</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='ctx'> 		reg = &lt;0 0x0 0x200000&gt;;</div><div class='ctx'> 		bank-width = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/imx/imx31.dtsi<br/>index 00006c90d9a7..8541a666747a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx31.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx31.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx31.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx31.dtsi</a></div><div class='hunk'>@@ -218,7 +218,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			iim: efuse@5001c000 {</div><div class='del'>-				compatible = "fsl,imx31-iim", "fsl,imx27-iim";</div><div class='add'>+				compatible = "fsl,imx31-iim";</div><div class='ctx'> 				reg = &lt;0x5001c000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;19&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks 25&gt;;</div><div class='hunk'>@@ -340,7 +340,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			nfc: nand@b8000000 {</div><div class='add'>+			nfc: nand-controller@b8000000 {</div><div class='ctx'> 				compatible = "fsl,imx31-nand", "fsl,imx27-nand";</div><div class='ctx'> 				reg = &lt;0xb8000000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;33&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi<br/>index 17bd2a97609a..0064b5452b54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-cpuimx35.dtsi</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	pcf8563@51 {</div><div class='add'>+	rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -44,40 +44,38 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx35-eukrea {</div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_FEC_TX_CLK__FEC_TX_CLK		0x80000000</div><div class='del'>-				MX35_PAD_FEC_RX_CLK__FEC_RX_CLK		0x80000000</div><div class='del'>-				MX35_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX35_PAD_FEC_COL__FEC_COL		0x80000000</div><div class='del'>-				MX35_PAD_FEC_RDATA0__FEC_RDATA_0	0x80000000</div><div class='del'>-				MX35_PAD_FEC_TDATA0__FEC_TDATA_0	0x80000000</div><div class='del'>-				MX35_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX35_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX35_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX35_PAD_FEC_TX_ERR__FEC_TX_ERR		0x80000000</div><div class='del'>-				MX35_PAD_FEC_RX_ERR__FEC_RX_ERR		0x80000000</div><div class='del'>-				MX35_PAD_FEC_CRS__FEC_CRS		0x80000000</div><div class='del'>-				MX35_PAD_FEC_RDATA1__FEC_RDATA_1	0x80000000</div><div class='del'>-				MX35_PAD_FEC_TDATA1__FEC_TDATA_1	0x80000000</div><div class='del'>-				MX35_PAD_FEC_RDATA2__FEC_RDATA_2	0x80000000</div><div class='del'>-				MX35_PAD_FEC_TDATA2__FEC_TDATA_2	0x80000000</div><div class='del'>-				MX35_PAD_FEC_RDATA3__FEC_RDATA_3	0x80000000</div><div class='del'>-				MX35_PAD_FEC_TDATA3__FEC_TDATA_3	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_FEC_TX_CLK__FEC_TX_CLK		0x80000000</div><div class='add'>+			MX35_PAD_FEC_RX_CLK__FEC_RX_CLK		0x80000000</div><div class='add'>+			MX35_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX35_PAD_FEC_COL__FEC_COL		0x80000000</div><div class='add'>+			MX35_PAD_FEC_RDATA0__FEC_RDATA_0	0x80000000</div><div class='add'>+			MX35_PAD_FEC_TDATA0__FEC_TDATA_0	0x80000000</div><div class='add'>+			MX35_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX35_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX35_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX35_PAD_FEC_TX_ERR__FEC_TX_ERR		0x80000000</div><div class='add'>+			MX35_PAD_FEC_RX_ERR__FEC_RX_ERR		0x80000000</div><div class='add'>+			MX35_PAD_FEC_CRS__FEC_CRS		0x80000000</div><div class='add'>+			MX35_PAD_FEC_RDATA1__FEC_RDATA_1	0x80000000</div><div class='add'>+			MX35_PAD_FEC_TDATA1__FEC_TDATA_1	0x80000000</div><div class='add'>+			MX35_PAD_FEC_RDATA2__FEC_RDATA_2	0x80000000</div><div class='add'>+			MX35_PAD_FEC_TDATA2__FEC_TDATA_2	0x80000000</div><div class='add'>+			MX35_PAD_FEC_RDATA3__FEC_RDATA_3	0x80000000</div><div class='add'>+			MX35_PAD_FEC_TDATA3__FEC_TDATA_3	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_I2C1_CLK__I2C1_SCL		0x80000000</div><div class='del'>-				MX35_PAD_I2C1_DAT__I2C1_SDA		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_I2C1_CLK__I2C1_SCL		0x80000000</div><div class='add'>+			MX35_PAD_I2C1_DAT__I2C1_SDA		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_tsc2007_1: tsc2007grp-1 {</div><div class='del'>-			fsl,pins = &lt;MX35_PAD_ATA_DA2__GPIO3_2 0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_tsc2007_1: tsc2007-1-grp {</div><div class='add'>+		fsl,pins = &lt;MX35_PAD_ATA_DA2__GPIO3_2 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts<br/>index 7f4f812b0811..e7835a769bbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx35-eukrea-mbimxsd35-baseboard.dts</a></div><div class='hunk'>@@ -69,57 +69,55 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx35-eukrea {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000</div><div class='del'>-				MX35_PAD_STXD4__AUDMUX_AUD4_TXD		0x80000000</div><div class='del'>-				MX35_PAD_SRXD4__AUDMUX_AUD4_RXD		0x80000000</div><div class='del'>-				MX35_PAD_SCK4__AUDMUX_AUD4_TXC		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000</div><div class='add'>+			MX35_PAD_STXD4__AUDMUX_AUD4_TXD		0x80000000</div><div class='add'>+			MX35_PAD_SRXD4__AUDMUX_AUD4_RXD		0x80000000</div><div class='add'>+			MX35_PAD_SCK4__AUDMUX_AUD4_TXC		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_bp1: bp1grp {</div><div class='del'>-			fsl,pins = &lt;MX35_PAD_LD19__GPIO3_25  0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_bp1: bp1grp {</div><div class='add'>+		fsl,pins = &lt;MX35_PAD_LD19__GPIO3_25  0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000</div><div class='del'>-				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000</div><div class='del'>-				MX35_PAD_LD18__GPIO3_24			0x80000000 /* CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000</div><div class='add'>+			MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000</div><div class='add'>+			MX35_PAD_LD18__GPIO3_24			0x80000000 /* CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_led1: led1grp {</div><div class='del'>-			fsl,pins = &lt;MX35_PAD_LD23__GPIO3_29  0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_led1: led1grp {</div><div class='add'>+		fsl,pins = &lt;MX35_PAD_LD23__GPIO3_29  0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_reg_lcd_3v3: reg-lcd-3v3 {</div><div class='del'>-			fsl,pins = &lt;MX35_PAD_D3_CLS__GPIO1_4 0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_reg_lcd_3v3: reg-lcd-3v3grp {</div><div class='add'>+		fsl,pins = &lt;MX35_PAD_D3_CLS__GPIO1_4 0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_CTS1__UART1_CTS		0x1c5</div><div class='del'>-				MX35_PAD_RTS1__UART1_RTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_CTS1__UART1_CTS		0x1c5</div><div class='add'>+			MX35_PAD_RTS1__UART1_RTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_RXD2__UART2_RXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_TXD2__UART2_TXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_RTS2__UART2_RTS		0x1c5</div><div class='del'>-				MX35_PAD_CTS2__UART2_CTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_RXD2__UART2_RXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_TXD2__UART2_TXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_RTS2__UART2_RTS		0x1c5</div><div class='add'>+			MX35_PAD_CTS2__UART2_CTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx35-pdk.dts b/arch/arm/boot/dts/nxp/imx/imx35-pdk.dts<br/>index ddce0a844758..a2baf8202f94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-pdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35-pdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35-pdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx35-pdk.dts</a></div><div class='hunk'>@@ -24,26 +24,24 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx35-pdk {</div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000</div><div class='del'>-				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000</div><div class='del'>-				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5</div><div class='del'>-				MX35_PAD_CTS1__UART1_CTS		0x1c5</div><div class='del'>-				MX35_PAD_RTS1__UART1_RTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000</div><div class='add'>+			MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000</div><div class='add'>+			MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5</div><div class='add'>+			MX35_PAD_CTS1__UART1_CTS		0x1c5</div><div class='add'>+			MX35_PAD_RTS1__UART1_RTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35.dtsi<br/>index 442dc15677b8..111d7c0331f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx35.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx35.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx35.dtsi</a></div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			iomuxc: iomuxc@43fac000 {</div><div class='add'>+			iomuxc: pinctrl@43fac000 {</div><div class='ctx'> 				compatible = "fsl,imx35-iomuxc";</div><div class='ctx'> 				reg = &lt;0x43fac000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -363,7 +363,7 @@</div><div class='ctx'> 			reg = &lt;0x80000000 0x40000000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			nfc: nand@bb000000 {</div><div class='add'>+			nfc: nand-controller@bb000000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				compatible = "fsl,imx35-nand", "fsl,imx25-nand";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx50-evk.dts b/arch/arm/boot/dts/nxp/imx/imx50-evk.dts<br/>index 3f45c01d9cce..f40b0d5fdb85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx50-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx50-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx50-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx50-evk.dts</a></div><div class='hunk'>@@ -52,40 +52,38 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx50-evk {</div><div class='del'>-		pinctrl_cspi: cspigrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00</div><div class='del'>-				MX50_PAD_CSPI_MISO__CSPI_MISO		0x00</div><div class='del'>-				MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00</div><div class='del'>-				MX50_PAD_CSPI_SS0__GPIO4_11		0xc4</div><div class='del'>-				MX50_PAD_ECSPI1_MOSI__GPIO4_13		0x84</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cspi: cspigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00</div><div class='add'>+			MX50_PAD_CSPI_MISO__CSPI_MISO		0x00</div><div class='add'>+			MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00</div><div class='add'>+			MX50_PAD_CSPI_SS0__GPIO4_11		0xc4</div><div class='add'>+			MX50_PAD_ECSPI1_MOSI__GPIO4_13		0x84</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX50_PAD_SSI_RXFS__FEC_MDC		0x80</div><div class='del'>-				MX50_PAD_SSI_RXC__FEC_MDIO		0x80</div><div class='del'>-				MX50_PAD_DISP_D0__FEC_TX_CLK		0x80</div><div class='del'>-				MX50_PAD_DISP_D1__FEC_RX_ERR		0x80</div><div class='del'>-				MX50_PAD_DISP_D2__FEC_RX_DV		0x80</div><div class='del'>-				MX50_PAD_DISP_D3__FEC_RDATA_1		0x80</div><div class='del'>-				MX50_PAD_DISP_D4__FEC_RDATA_0		0x80</div><div class='del'>-				MX50_PAD_DISP_D5__FEC_TX_EN		0x80</div><div class='del'>-				MX50_PAD_DISP_D6__FEC_TDATA_1		0x80</div><div class='del'>-				MX50_PAD_DISP_D7__FEC_TDATA_0		0x80</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX50_PAD_SSI_RXFS__FEC_MDC		0x80</div><div class='add'>+			MX50_PAD_SSI_RXC__FEC_MDIO		0x80</div><div class='add'>+			MX50_PAD_DISP_D0__FEC_TX_CLK		0x80</div><div class='add'>+			MX50_PAD_DISP_D1__FEC_RX_ERR		0x80</div><div class='add'>+			MX50_PAD_DISP_D2__FEC_RX_DV		0x80</div><div class='add'>+			MX50_PAD_DISP_D3__FEC_RDATA_1		0x80</div><div class='add'>+			MX50_PAD_DISP_D4__FEC_RDATA_0		0x80</div><div class='add'>+			MX50_PAD_DISP_D5__FEC_TX_EN		0x80</div><div class='add'>+			MX50_PAD_DISP_D6__FEC_TDATA_1		0x80</div><div class='add'>+			MX50_PAD_DISP_D7__FEC_TDATA_0		0x80</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX50_PAD_UART1_TXD__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX50_PAD_UART1_RXD__UART1_RXD_MUX	0x1e4</div><div class='del'>-				MX50_PAD_UART1_RTS__UART1_RTS		0x1e4</div><div class='del'>-				MX50_PAD_UART1_CTS__UART1_CTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX50_PAD_UART1_TXD__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX50_PAD_UART1_RXD__UART1_RXD_MUX	0x1e4</div><div class='add'>+			MX50_PAD_UART1_RTS__UART1_RTS		0x1e4</div><div class='add'>+			MX50_PAD_UART1_CTS__UART1_CTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx50.dtsi b/arch/arm/boot/dts/nxp/imx/imx50.dtsi<br/>index c5b25d2f6264..d76c496b3f71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx50.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx50.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx50.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx50.dtsi</a></div><div class='hunk'>@@ -283,7 +283,7 @@</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			iomuxc: iomuxc@53fa8000 {</div><div class='add'>+			iomuxc: pinctrl@53fa8000 {</div><div class='ctx'> 				compatible = "fsl,imx50-iomuxc", "fsl,imx53-iomuxc";</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -338,7 +338,7 @@</div><div class='ctx'> 			clks: ccm@53fd4000 {</div><div class='ctx'> 				compatible = "fsl,imx50-ccm";</div><div class='ctx'> 				reg = &lt;0x53fd4000 0x4000&gt;;</div><div class='del'>-				interrupts = &lt;0 71 0x04 0 72 0x04&gt;;</div><div class='add'>+				interrupts = &lt;71&gt;, &lt;72&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-apf51.dts b/arch/arm/boot/dts/nxp/imx/imx51-apf51.dts<br/>index ba28ffe06fe2..670e13136f1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-apf51.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-apf51.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-apf51.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-apf51.dts</a></div><div class='hunk'>@@ -37,36 +37,34 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-apf51 {</div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='del'>-				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='del'>-				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='add'>+			MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='add'>+			MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts b/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts<br/>index de6b7607510a..6ebd80e30683 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts</a></div><div class='hunk'>@@ -113,102 +113,100 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx51-apf51dev {</div><div class='del'>-		pinctrl_backlight: backlightgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_backlight: backlightgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_EB2__GPIO2_22   0x0C5</div><div class='del'>-				MX51_PAD_EIM_EB3__GPIO2_23   0x0C5</div><div class='del'>-				MX51_PAD_EIM_CS4__GPIO2_29   0x100</div><div class='del'>-				MX51_PAD_NANDF_D13__GPIO3_27 0x0C5</div><div class='del'>-				MX51_PAD_NANDF_D12__GPIO3_28 0x0C5</div><div class='del'>-				MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5</div><div class='del'>-				MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5</div><div class='del'>-				MX51_PAD_GPIO1_2__GPIO1_2    0x0C5</div><div class='del'>-				MX51_PAD_GPIO1_3__GPIO1_3    0x0C5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_EB2__GPIO2_22   0x0C5</div><div class='add'>+			MX51_PAD_EIM_EB3__GPIO2_23   0x0C5</div><div class='add'>+			MX51_PAD_EIM_CS4__GPIO2_29   0x100</div><div class='add'>+			MX51_PAD_NANDF_D13__GPIO3_27 0x0C5</div><div class='add'>+			MX51_PAD_NANDF_D12__GPIO3_28 0x0C5</div><div class='add'>+			MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5</div><div class='add'>+			MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5</div><div class='add'>+			MX51_PAD_GPIO1_2__GPIO1_2    0x0C5</div><div class='add'>+			MX51_PAD_GPIO1_3__GPIO1_3    0x0C5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='del'>-				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='add'>+			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi2: ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_NANDF_RB3__ECSPI2_MISO		0x185</div><div class='del'>-				MX51_PAD_NANDF_D15__ECSPI2_MOSI		0x185</div><div class='del'>-				MX51_PAD_NANDF_RB2__ECSPI2_SCLK		0x185</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_NANDF_RB3__ECSPI2_MISO		0x185</div><div class='add'>+			MX51_PAD_NANDF_D15__ECSPI2_MOSI		0x185</div><div class='add'>+			MX51_PAD_NANDF_RB2__ECSPI2_SCLK		0x185</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D27__I2C2_SCL		0x400001ed</div><div class='del'>-				MX51_PAD_EIM_D24__I2C2_SDA		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D27__I2C2_SCL		0x400001ed</div><div class='add'>+			MX51_PAD_EIM_D24__I2C2_SDA		0x400001ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_disp1: ipudisp1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5</div><div class='del'>-				MX51_PAD_DI1_PIN2__DI1_PIN2		0x5</div><div class='del'>-				MX51_PAD_DI1_PIN3__DI1_PIN3		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_disp1: ipudisp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5</div><div class='add'>+			MX51_PAD_DI1_PIN2__DI1_PIN2		0x5</div><div class='add'>+			MX51_PAD_DI1_PIN3__DI1_PIN3		0x5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts b/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts<br/>index f4a47e8348b2..1b6ec55f9068 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-babbage.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-babbage.dts</a></div><div class='hunk'>@@ -474,246 +474,244 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-babbage {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSPI1_RDY__GPIO4_26		0x85</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSPI1_RDY__GPIO4_26		0x85</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_clk26mhz_osc: clk26mhzoscgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI1_PIN12__GPIO3_1		0x85</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_clk26mhz_osc: clk26mhzoscgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI1_PIN12__GPIO3_1		0x85</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_clk26mhz_usb: clk26mhzusbgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D17__GPIO2_1		0x85</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_clk26mhz_usb: clk26mhzusbgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D17__GPIO2_1		0x85</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='del'>-				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SS0__GPIO4_24		0x85 /* CS0 */</div><div class='del'>-				MX51_PAD_CSPI1_SS1__GPIO4_25		0x85 /* CS1 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='add'>+			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SS0__GPIO4_24		0x85 /* CS0 */</div><div class='add'>+			MX51_PAD_CSPI1_SS1__GPIO4_25		0x85 /* CS1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='del'>-				MX51_PAD_GPIO1_0__GPIO1_0		0x100</div><div class='del'>-				MX51_PAD_GPIO1_1__GPIO1_1		0x100</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='add'>+			MX51_PAD_GPIO1_0__GPIO1_0		0x100</div><div class='add'>+			MX51_PAD_GPIO1_1__GPIO1_1		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='del'>-				MX51_PAD_GPIO1_5__GPIO1_5		0x100 /* WP */</div><div class='del'>-				MX51_PAD_GPIO1_6__GPIO1_6		0x100 /* CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='add'>+			MX51_PAD_GPIO1_5__GPIO1_5		0x100 /* WP */</div><div class='add'>+			MX51_PAD_GPIO1_6__GPIO1_6		0x100 /* CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_EB2__FEC_MDIO		0x000001f5</div><div class='del'>-				MX51_PAD_EIM_EB3__FEC_RDATA1		0x00000085</div><div class='del'>-				MX51_PAD_EIM_CS2__FEC_RDATA2		0x00000085</div><div class='del'>-				MX51_PAD_EIM_CS3__FEC_RDATA3		0x00000085</div><div class='del'>-				MX51_PAD_EIM_CS4__FEC_RX_ER		0x00000180</div><div class='del'>-				MX51_PAD_EIM_CS5__FEC_CRS		0x00000180</div><div class='del'>-				MX51_PAD_NANDF_RB2__FEC_COL		0x00000180</div><div class='del'>-				MX51_PAD_NANDF_RB3__FEC_RX_CLK		0x00000180</div><div class='del'>-				MX51_PAD_NANDF_D9__FEC_RDATA0		0x00002180</div><div class='del'>-				MX51_PAD_NANDF_D8__FEC_TDATA0		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS2__FEC_TX_ER		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS3__FEC_MDC		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS4__FEC_TDATA1		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS5__FEC_TDATA2		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS6__FEC_TDATA3		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_CS7__FEC_TX_EN		0x00002004</div><div class='del'>-				MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	0x00002180</div><div class='del'>-				MX51_PAD_NANDF_D11__FEC_RX_DV		0x000020a4</div><div class='del'>-				MX51_PAD_EIM_A20__GPIO2_14		0x00000085 /* Phy Reset */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_EB2__FEC_MDIO		0x000001f5</div><div class='add'>+			MX51_PAD_EIM_EB3__FEC_RDATA1		0x00000085</div><div class='add'>+			MX51_PAD_EIM_CS2__FEC_RDATA2		0x00000085</div><div class='add'>+			MX51_PAD_EIM_CS3__FEC_RDATA3		0x00000085</div><div class='add'>+			MX51_PAD_EIM_CS4__FEC_RX_ER		0x00000180</div><div class='add'>+			MX51_PAD_EIM_CS5__FEC_CRS		0x00000180</div><div class='add'>+			MX51_PAD_NANDF_RB2__FEC_COL		0x00000180</div><div class='add'>+			MX51_PAD_NANDF_RB3__FEC_RX_CLK		0x00000180</div><div class='add'>+			MX51_PAD_NANDF_D9__FEC_RDATA0		0x00002180</div><div class='add'>+			MX51_PAD_NANDF_D8__FEC_TDATA0		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS2__FEC_TX_ER		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS3__FEC_MDC		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS4__FEC_TDATA1		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS5__FEC_TDATA2		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS6__FEC_TDATA3		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_CS7__FEC_TX_EN		0x00002004</div><div class='add'>+			MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	0x00002180</div><div class='add'>+			MX51_PAD_NANDF_D11__FEC_RX_DV		0x000020a4</div><div class='add'>+			MX51_PAD_EIM_A20__GPIO2_14		0x00000085 /* Phy Reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpiokeysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_A27__GPIO2_21		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_A27__GPIO2_21		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_leds: gpioledsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D22__GPIO2_6		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_leds: gpioledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D22__GPIO2_6		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D19__I2C1_SCL		0x400001ed</div><div class='del'>-				MX51_PAD_EIM_D16__I2C1_SDA		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D19__I2C1_SCL		0x400001ed</div><div class='add'>+			MX51_PAD_EIM_D16__I2C1_SDA		0x400001ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed</div><div class='del'>-				MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed</div><div class='add'>+			MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_disp1: ipudisp1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5</div><div class='del'>-				MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5</div><div class='del'>-				MX51_PAD_DI1_PIN2__DI1_PIN2		0x5</div><div class='del'>-				MX51_PAD_DI1_PIN3__DI1_PIN3		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_disp1: ipudisp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5</div><div class='add'>+			MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5</div><div class='add'>+			MX51_PAD_DI1_PIN2__DI1_PIN2		0x5</div><div class='add'>+			MX51_PAD_DI1_PIN3__DI1_PIN3		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_disp2: ipudisp2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DISP2_DAT0__DISP2_DAT0		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT1__DISP2_DAT1		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT2__DISP2_DAT2		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT3__DISP2_DAT3		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT4__DISP2_DAT4		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT5__DISP2_DAT5		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT6__DISP2_DAT6		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT7__DISP2_DAT7		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT8__DISP2_DAT8		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT9__DISP2_DAT9		0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT10__DISP2_DAT10	0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT11__DISP2_DAT11	0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT12__DISP2_DAT12	0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT13__DISP2_DAT13	0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT14__DISP2_DAT14	0x5</div><div class='del'>-				MX51_PAD_DISP2_DAT15__DISP2_DAT15	0x5</div><div class='del'>-				MX51_PAD_DI2_PIN2__DI2_PIN2		0x5</div><div class='del'>-				MX51_PAD_DI2_PIN3__DI2_PIN3		0x5</div><div class='del'>-				MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	0x5</div><div class='del'>-				MX51_PAD_DI_GP4__DI2_PIN15		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_disp2: ipudisp2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DISP2_DAT0__DISP2_DAT0		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT1__DISP2_DAT1		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT2__DISP2_DAT2		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT3__DISP2_DAT3		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT4__DISP2_DAT4		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT5__DISP2_DAT5		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT6__DISP2_DAT6		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT7__DISP2_DAT7		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT8__DISP2_DAT8		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT9__DISP2_DAT9		0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT10__DISP2_DAT10	0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT11__DISP2_DAT11	0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT12__DISP2_DAT12	0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT13__DISP2_DAT13	0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT14__DISP2_DAT14	0x5</div><div class='add'>+			MX51_PAD_DISP2_DAT15__DISP2_DAT15	0x5</div><div class='add'>+			MX51_PAD_DI2_PIN2__DI2_PIN2		0x5</div><div class='add'>+			MX51_PAD_DI2_PIN3__DI2_PIN3		0x5</div><div class='add'>+			MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	0x5</div><div class='add'>+			MX51_PAD_DI_GP4__DI2_PIN15		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_kpp: kppgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_KEY_ROW0__KEY_ROW0		0xe0</div><div class='del'>-				MX51_PAD_KEY_ROW1__KEY_ROW1		0xe0</div><div class='del'>-				MX51_PAD_KEY_ROW2__KEY_ROW2		0xe0</div><div class='del'>-				MX51_PAD_KEY_ROW3__KEY_ROW3		0xe0</div><div class='del'>-				MX51_PAD_KEY_COL0__KEY_COL0		0xe8</div><div class='del'>-				MX51_PAD_KEY_COL1__KEY_COL1		0xe8</div><div class='del'>-				MX51_PAD_KEY_COL2__KEY_COL2		0xe8</div><div class='del'>-				MX51_PAD_KEY_COL3__KEY_COL3		0xe8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_kpp: kppgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_KEY_ROW0__KEY_ROW0		0xe0</div><div class='add'>+			MX51_PAD_KEY_ROW1__KEY_ROW1		0xe0</div><div class='add'>+			MX51_PAD_KEY_ROW2__KEY_ROW2		0xe0</div><div class='add'>+			MX51_PAD_KEY_ROW3__KEY_ROW3		0xe0</div><div class='add'>+			MX51_PAD_KEY_COL0__KEY_COL0		0xe8</div><div class='add'>+			MX51_PAD_KEY_COL1__KEY_COL1		0xe8</div><div class='add'>+			MX51_PAD_KEY_COL2__KEY_COL2		0xe8</div><div class='add'>+			MX51_PAD_KEY_COL3__KEY_COL3		0xe8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pmic: pmicgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_8__GPIO1_8		0xe5 /* IRQ */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_8__GPIO1_8		0xe5 /* IRQ */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='del'>-				MX51_PAD_UART1_RTS__UART1_RTS		0x1c5</div><div class='del'>-				MX51_PAD_UART1_CTS__UART1_CTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='add'>+			MX51_PAD_UART1_RTS__UART1_RTS		0x1c5</div><div class='add'>+			MX51_PAD_UART1_CTS__UART1_CTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART2_RXD__UART2_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART2_TXD__UART2_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART2_RXD__UART2_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART2_TXD__UART2_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D25__UART3_RXD		0x1c5</div><div class='del'>-				MX51_PAD_EIM_D26__UART3_TXD		0x1c5</div><div class='del'>-				MX51_PAD_EIM_D27__UART3_RTS		0x1c5</div><div class='del'>-				MX51_PAD_EIM_D24__UART3_CTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D25__UART3_RXD		0x1c5</div><div class='add'>+			MX51_PAD_EIM_D26__UART3_TXD		0x1c5</div><div class='add'>+			MX51_PAD_EIM_D27__UART3_RTS		0x1c5</div><div class='add'>+			MX51_PAD_EIM_D24__UART3_CTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_USBH1_CLK__USBH1_CLK		0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DIR__USBH1_DIR		0x80000000</div><div class='del'>-				MX51_PAD_USBH1_NXT__USBH1_NXT		0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x80000000</div><div class='del'>-				MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_USBH1_CLK__USBH1_CLK		0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DIR__USBH1_DIR		0x80000000</div><div class='add'>+			MX51_PAD_USBH1_NXT__USBH1_NXT		0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x80000000</div><div class='add'>+			MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1reg: usbh1reggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_D21__GPIO2_5		0x85</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1reg: usbh1reggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_D21__GPIO2_5		0x85</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotgreg: usbotgreggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_7__GPIO1_7		0x85</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotgreg: usbotgreggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_7__GPIO1_7		0x85</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts b/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts<br/>index 10cae7c3a879..9750b5f93330 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-jsk.dts</a></div><div class='hunk'>@@ -78,49 +78,47 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-digi-connectcore-jsk {</div><div class='del'>-		pinctrl_owire: owiregrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_OWIRE_LINE__OWIRE_LINE		0x40000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_owire: owiregrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_OWIRE_LINE__OWIRE_LINE		0x40000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART2_RXD__UART2_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART2_TXD__UART2_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART2_RXD__UART2_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART2_TXD__UART2_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x1e5</div><div class='del'>-				MX51_PAD_USBH1_CLK__USBH1_CLK		0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DIR__USBH1_DIR		0x1e5</div><div class='del'>-				MX51_PAD_USBH1_NXT__USBH1_NXT		0x1e5</div><div class='del'>-				MX51_PAD_USBH1_STP__USBH1_STP		0x1e5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x1e5</div><div class='add'>+			MX51_PAD_USBH1_CLK__USBH1_CLK		0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DIR__USBH1_DIR		0x1e5</div><div class='add'>+			MX51_PAD_USBH1_NXT__USBH1_NXT		0x1e5</div><div class='add'>+			MX51_PAD_USBH1_STP__USBH1_STP		0x1e5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi<br/>index f0809a16a2ce..1980f751f161 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-digi-connectcore-som.dtsi</a></div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 	mma7455l@1d {</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_mma7455l&gt;;</div><div class='del'>-		compatible = "fsl,mma7455l";</div><div class='add'>+		compatible = "fsl,mma7455";</div><div class='ctx'> 		reg = &lt;0x1d&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'> 		interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;, &lt;6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -215,162 +215,160 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-digi-connectcore-som {</div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='del'>-				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SS0__GPIO4_24		0x85 /* CS0 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='add'>+			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SS0__GPIO4_24		0x85 /* CS0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD1_CLK__SD1_CLK		0x400021d5</div><div class='del'>-				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD1_DATA0__SD1_DATA0		0x400020d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD1_CLK__SD1_CLK		0x400021d5</div><div class='add'>+			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD1_DATA0__SD1_DATA0		0x400020d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD2_CLK__SD2_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='del'>-				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='del'>-				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='add'>+			MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='add'>+			MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_2__I2C2_SCL		0x400001ed</div><div class='del'>-				MX51_PAD_GPIO1_3__I2C2_SDA		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_2__I2C2_SCL		0x400001ed</div><div class='add'>+			MX51_PAD_GPIO1_3__I2C2_SDA		0x400001ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_2__GPIO1_2		0x400001ed</div><div class='del'>-				MX51_PAD_GPIO1_3__GPIO1_3		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_2__GPIO1_2		0x400001ed</div><div class='add'>+			MX51_PAD_GPIO1_3__GPIO1_3		0x400001ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_nfc: nfcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_NANDF_D0__NANDF_D0		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D1__NANDF_D1		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D2__NANDF_D2		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D3__NANDF_D3		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D4__NANDF_D4		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D5__NANDF_D5		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D6__NANDF_D6		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_D7__NANDF_D7		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_ALE__NANDF_ALE		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_CLE__NANDF_CLE		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_RE_B__NANDF_RE_B		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_WE_B__NANDF_WE_B		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_WP_B__NANDF_WP_B		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_CS0__NANDF_CS0		0x80000000</div><div class='del'>-				MX51_PAD_NANDF_RB0__NANDF_RB0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_nfc: nfcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_NANDF_D0__NANDF_D0		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D1__NANDF_D1		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D2__NANDF_D2		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D3__NANDF_D3		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D4__NANDF_D4		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D5__NANDF_D5		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D6__NANDF_D6		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_D7__NANDF_D7		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_ALE__NANDF_ALE		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_CLE__NANDF_CLE		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_RE_B__NANDF_RE_B		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_WE_B__NANDF_WE_B		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_WP_B__NANDF_WP_B		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_CS0__NANDF_CS0		0x80000000</div><div class='add'>+			MX51_PAD_NANDF_RB0__NANDF_RB0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lan9221: lan9221grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_9__GPIO1_9		0xe5 /* IRQ */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lan9221: lan9221grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_9__GPIO1_9		0xe5 /* IRQ */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_mc13892: mc13892grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_5__GPIO1_5		0xe5 /* IRQ */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_mc13892: mc13892grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_5__GPIO1_5		0xe5 /* IRQ */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_mma7455l: mma7455lgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_7__GPIO1_7		0xe5 /* IRQ1 */</div><div class='del'>-				MX51_PAD_GPIO1_6__GPIO1_6		0xe5 /* IRQ2 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_mma7455l: mma7455lgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_7__GPIO1_7		0xe5 /* IRQ1 */</div><div class='add'>+			MX51_PAD_GPIO1_6__GPIO1_6		0xe5 /* IRQ2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_weim: weimgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_DA0__EIM_DA0		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA1__EIM_DA1		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA2__EIM_DA2		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA3__EIM_DA3		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA4__EIM_DA4		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA5__EIM_DA5		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA6__EIM_DA6		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA7__EIM_DA7		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA8__EIM_DA8		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA9__EIM_DA9		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA10__EIM_DA10		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA11__EIM_DA11		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA12__EIM_DA12		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA13__EIM_DA13		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA14__EIM_DA14		0x80000000</div><div class='del'>-				MX51_PAD_EIM_DA15__EIM_DA15		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A16__EIM_A16		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A17__EIM_A17		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A18__EIM_A18		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A19__EIM_A19		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A20__EIM_A20		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A21__EIM_A21		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A22__EIM_A22		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A23__EIM_A23		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A24__EIM_A24		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A25__EIM_A25		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A26__EIM_A26		0x80000000</div><div class='del'>-				MX51_PAD_EIM_A27__EIM_A27		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D16__EIM_D16		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D17__EIM_D17		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D18__EIM_D18		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D19__EIM_D19		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D20__EIM_D20		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D21__EIM_D21		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D22__EIM_D22		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D23__EIM_D23		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D24__EIM_D24		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D25__EIM_D25		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D26__EIM_D26		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D27__EIM_D27		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D28__EIM_D28		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D29__EIM_D29		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D30__EIM_D30		0x80000000</div><div class='del'>-				MX51_PAD_EIM_D31__EIM_D31		0x80000000</div><div class='del'>-				MX51_PAD_EIM_OE__EIM_OE			0x80000000</div><div class='del'>-				MX51_PAD_EIM_DTACK__EIM_DTACK		0x80000000</div><div class='del'>-				MX51_PAD_EIM_LBA__EIM_LBA		0x80000000</div><div class='del'>-				MX51_PAD_EIM_CS5__EIM_CS5		0x80000000 /* CS5 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_weim: weimgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_DA0__EIM_DA0		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA1__EIM_DA1		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA2__EIM_DA2		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA3__EIM_DA3		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA4__EIM_DA4		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA5__EIM_DA5		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA6__EIM_DA6		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA7__EIM_DA7		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA8__EIM_DA8		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA9__EIM_DA9		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA10__EIM_DA10		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA11__EIM_DA11		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA12__EIM_DA12		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA13__EIM_DA13		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA14__EIM_DA14		0x80000000</div><div class='add'>+			MX51_PAD_EIM_DA15__EIM_DA15		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A16__EIM_A16		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A17__EIM_A17		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A18__EIM_A18		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A19__EIM_A19		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A20__EIM_A20		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A21__EIM_A21		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A22__EIM_A22		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A23__EIM_A23		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A24__EIM_A24		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A25__EIM_A25		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A26__EIM_A26		0x80000000</div><div class='add'>+			MX51_PAD_EIM_A27__EIM_A27		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D16__EIM_D16		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D17__EIM_D17		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D18__EIM_D18		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D19__EIM_D19		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D20__EIM_D20		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D21__EIM_D21		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D22__EIM_D22		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D23__EIM_D23		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D24__EIM_D24		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D25__EIM_D25		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D26__EIM_D26		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D27__EIM_D27		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D28__EIM_D28		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D29__EIM_D29		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D30__EIM_D30		0x80000000</div><div class='add'>+			MX51_PAD_EIM_D31__EIM_D31		0x80000000</div><div class='add'>+			MX51_PAD_EIM_OE__EIM_OE			0x80000000</div><div class='add'>+			MX51_PAD_EIM_DTACK__EIM_DTACK		0x80000000</div><div class='add'>+			MX51_PAD_EIM_LBA__EIM_LBA		0x80000000</div><div class='add'>+			MX51_PAD_EIM_CS5__EIM_CS5		0x80000000 /* CS5 */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi<br/>index c2a929ba8ceb..244740d65b3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-cpuimx51.dtsi</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	pcf8563@51 {</div><div class='add'>+	rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -44,43 +44,41 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-eukrea {</div><div class='del'>-		pinctrl_tsc2007_1: tsc2007grp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5</div><div class='del'>-				MX51_PAD_NANDF_D8__GPIO4_0 0x1f5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_tsc2007_1: tsc2007-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5</div><div class='add'>+			MX51_PAD_NANDF_D8__GPIO4_0 0x1f5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='del'>-				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='del'>-				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='del'>-				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='del'>-				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000</div><div class='add'>+			MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000</div><div class='add'>+			MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000</div><div class='add'>+			MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000</div><div class='add'>+			MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD2_CMD__I2C1_SCL		0x400001ed</div><div class='del'>-				MX51_PAD_SD2_CLK__I2C1_SDA		0x400001ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD2_CMD__I2C1_SCL		0x400001ed</div><div class='add'>+			MX51_PAD_SD2_CLK__I2C1_SDA		0x400001ed</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts<br/>index aff380e999c7..0e0b9a811b96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts</a></div><div class='hunk'>@@ -112,117 +112,115 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx51-eukrea {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000</div><div class='del'>-				MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000</div><div class='add'>+			MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		pinctrl_can: cangrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSI2_PIXCLK__GPIO4_15		0x80000000	/* nReset */</div><div class='del'>-				MX51_PAD_GPIO1_1__GPIO1_1		0x80000000	/* IRQ */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can: cangrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSI2_PIXCLK__GPIO4_15		0x80000000	/* nReset */</div><div class='add'>+			MX51_PAD_GPIO1_1__GPIO1_1		0x80000000	/* IRQ */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='del'>-				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='del'>-				MX51_PAD_CSPI1_SS0__GPIO4_24		0x80000000 	/* CS0 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185</div><div class='add'>+			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185</div><div class='add'>+			MX51_PAD_CSPI1_SS0__GPIO4_24		0x80000000 	/* CS0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='del'>-				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='del'>-				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5</div><div class='add'>+			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5</div><div class='add'>+			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='del'>-				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_UART3_RXD__UART3_RXD		0x1c5</div><div class='add'>+			MX51_PAD_UART3_TXD__UART3_TXD		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3_rtscts: uart3rtsctsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_KEY_COL4__UART3_RTS		0x1c5</div><div class='del'>-				MX51_PAD_KEY_COL5__UART3_CTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3_rtscts: uart3rtsctsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_KEY_COL4__UART3_RTS		0x1c5</div><div class='add'>+			MX51_PAD_KEY_COL5__UART3_CTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_backlight_1: backlightgrp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_backlight_1: backlight1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1_cd: esdhc1_cd {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_GPIO1_0__GPIO1_0 0xd5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1_cd: esdhc1_cdgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_GPIO1_0__GPIO1_0 0xd5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpiokeys_1: gpiokeysgrp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_NANDF_D9__GPIO3_31 0x1f5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpiokeys_1: gpiokeys1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_NANDF_D9__GPIO3_31 0x1f5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpioled: gpioledgrp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_NANDF_D10__GPIO3_30 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpioled: gpioled1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_NANDF_D10__GPIO3_30 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_reg_lcd_3v3: reg_lcd_3v3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_CSI1_D9__GPIO3_13 0x1f5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_reg_lcd_3v3: reg_lcd_3v3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_CSI1_D9__GPIO3_13 0x1f5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5</div><div class='del'>-				MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5</div><div class='del'>-				MX51_PAD_USBH1_STP__USBH1_STP     0x1e5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5</div><div class='add'>+			MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5</div><div class='add'>+			MX51_PAD_USBH1_STP__USBH1_STP     0x1e5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX51_PAD_EIM_CS3__GPIO2_28 0x1f5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX51_PAD_EIM_CS3__GPIO2_28 0x1f5</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts b/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts<br/>index 7cd17b43b4b2..06545a6052f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts</a></div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mdio_gpio: mdio-gpio {</div><div class='add'>+	mdio_gpio: mdio {</div><div class='ctx'> 		compatible = "virtual,mdio-gpio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_swmdio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts b/arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts<br/>index 625f9ac671ae..26eb7a9506e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51-zii-scu2-mezz.dts</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mdio_gpio: mdio-gpio {</div><div class='add'>+	mdio_gpio: mdio {</div><div class='ctx'> 		compatible = "virtual,mdio-gpio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_swmdio&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi<br/>index 4efce49022e4..c8698a9af1a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx51.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx51.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx51.dtsi</a></div><div class='hunk'>@@ -399,7 +399,7 @@</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			iomuxc: iomuxc@73fa8000 {</div><div class='add'>+			iomuxc: pinctrl@73fa8000 {</div><div class='ctx'> 				compatible = "fsl,imx51-iomuxc";</div><div class='ctx'> 				reg = &lt;0x73fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -458,7 +458,7 @@</div><div class='ctx'> 			clks: ccm@73fd4000 {</div><div class='ctx'> 				compatible = "fsl,imx51-ccm";</div><div class='ctx'> 				reg = &lt;0x73fd4000 0x4000&gt;;</div><div class='del'>-				interrupts = &lt;0 71 0x04 0 72 0x04&gt;;</div><div class='add'>+				interrupts = &lt;71&gt;, &lt;72&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -476,7 +476,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			iim: efuse@83f98000 {</div><div class='del'>-				compatible = "fsl,imx51-iim", "fsl,imx27-iim", "syscon";</div><div class='add'>+				compatible = "fsl,imx51-iim";</div><div class='ctx'> 				reg = &lt;0x83f98000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;69&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX5_CLK_IIM_GATE&gt;;</div><div class='hunk'>@@ -595,7 +595,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			nfc: nand@83fdb000 {</div><div class='add'>+			nfc: nand-controller@83fdb000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				compatible = "fsl,imx51-nand";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-ard.dts b/arch/arm/boot/dts/nxp/imx/imx53-ard.dts<br/>index 165e1b00b721..e580427660b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-ard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-ard.dts</a></div><div class='hunk'>@@ -101,67 +101,65 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-ard {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_1__GPIO1_1             0x80000000</div><div class='del'>-				MX53_PAD_GPIO_9__GPIO1_9             0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB3__GPIO2_31           0x80000000</div><div class='del'>-				MX53_PAD_GPIO_10__GPIO4_0            0x80000000</div><div class='del'>-				MX53_PAD_DISP0_DAT16__GPIO5_10	     0x80000000</div><div class='del'>-				MX53_PAD_DISP0_DAT17__GPIO5_11       0x80000000</div><div class='del'>-				MX53_PAD_DISP0_DAT18__GPIO5_12       0x80000000</div><div class='del'>-				MX53_PAD_DISP0_DAT19__GPIO5_13       0x80000000</div><div class='del'>-				MX53_PAD_EIM_D16__EMI_WEIM_D_16      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D17__EMI_WEIM_D_17      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D18__EMI_WEIM_D_18      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D19__EMI_WEIM_D_19      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D20__EMI_WEIM_D_20      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D21__EMI_WEIM_D_21      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D22__EMI_WEIM_D_22      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D23__EMI_WEIM_D_23      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D24__EMI_WEIM_D_24      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D25__EMI_WEIM_D_25      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D26__EMI_WEIM_D_26      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D27__EMI_WEIM_D_27      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D28__EMI_WEIM_D_28      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D29__EMI_WEIM_D_29      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D30__EMI_WEIM_D_30      0x80000000</div><div class='del'>-				MX53_PAD_EIM_D31__EMI_WEIM_D_31      0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000</div><div class='del'>-				MX53_PAD_EIM_OE__EMI_WEIM_OE	     0x80000000</div><div class='del'>-				MX53_PAD_EIM_RW__EMI_WEIM_RW	     0x80000000</div><div class='del'>-				MX53_PAD_EIM_CS1__EMI_WEIM_CS_1	     0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_1__GPIO1_1             0x80000000</div><div class='add'>+			MX53_PAD_GPIO_9__GPIO1_9             0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB3__GPIO2_31           0x80000000</div><div class='add'>+			MX53_PAD_GPIO_10__GPIO4_0            0x80000000</div><div class='add'>+			MX53_PAD_DISP0_DAT16__GPIO5_10	     0x80000000</div><div class='add'>+			MX53_PAD_DISP0_DAT17__GPIO5_11       0x80000000</div><div class='add'>+			MX53_PAD_DISP0_DAT18__GPIO5_12       0x80000000</div><div class='add'>+			MX53_PAD_DISP0_DAT19__GPIO5_13       0x80000000</div><div class='add'>+			MX53_PAD_EIM_D16__EMI_WEIM_D_16      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D17__EMI_WEIM_D_17      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D18__EMI_WEIM_D_18      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D19__EMI_WEIM_D_19      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D20__EMI_WEIM_D_20      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D21__EMI_WEIM_D_21      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D22__EMI_WEIM_D_22      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D23__EMI_WEIM_D_23      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D24__EMI_WEIM_D_24      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D25__EMI_WEIM_D_25      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D26__EMI_WEIM_D_26      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D27__EMI_WEIM_D_27      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D28__EMI_WEIM_D_28      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D29__EMI_WEIM_D_29      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D30__EMI_WEIM_D_30      0x80000000</div><div class='add'>+			MX53_PAD_EIM_D31__EMI_WEIM_D_31      0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000</div><div class='add'>+			MX53_PAD_EIM_OE__EMI_WEIM_OE	     0x80000000</div><div class='add'>+			MX53_PAD_EIM_RW__EMI_WEIM_RW	     0x80000000</div><div class='add'>+			MX53_PAD_EIM_CS1__EMI_WEIM_CS_1	     0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA8__ESDHC1_DAT4	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA9__ESDHC1_DAT5	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA10__ESDHC1_DAT6	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA11__ESDHC1_DAT7	0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA8__ESDHC1_DAT4	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA9__ESDHC1_DAT5	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA10__ESDHC1_DAT6	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA11__ESDHC1_DAT7	0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts b/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts<br/>index f6f116366643..9c480e4d27ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-kp-ddc.dts</a></div><div class='hunk'>@@ -102,38 +102,36 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx53-kp-ddc {</div><div class='del'>-		pinctrl_disp: dispgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK      0x4</div><div class='del'>-				MX53_PAD_EIM_DA10__IPU_DI1_PIN15        0x4</div><div class='del'>-				MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0       0x4</div><div class='del'>-				MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1       0x4</div><div class='del'>-				MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2       0x4</div><div class='del'>-				MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3       0x4</div><div class='del'>-				MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4       0x4</div><div class='del'>-				MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5       0x4</div><div class='del'>-				MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6       0x4</div><div class='del'>-				MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7       0x4</div><div class='del'>-				MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8       0x4</div><div class='del'>-				MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9       0x4</div><div class='del'>-				MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10      0x4</div><div class='del'>-				MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11      0x4</div><div class='del'>-				MX53_PAD_EIM_A17__IPU_DISP1_DAT_12      0x4</div><div class='del'>-				MX53_PAD_EIM_A18__IPU_DISP1_DAT_13      0x4</div><div class='del'>-				MX53_PAD_EIM_A19__IPU_DISP1_DAT_14      0x4</div><div class='del'>-				MX53_PAD_EIM_A20__IPU_DISP1_DAT_15      0x4</div><div class='del'>-				MX53_PAD_EIM_A21__IPU_DISP1_DAT_16      0x4</div><div class='del'>-				MX53_PAD_EIM_A22__IPU_DISP1_DAT_17      0x4</div><div class='del'>-				MX53_PAD_EIM_A23__IPU_DISP1_DAT_18      0x4</div><div class='del'>-				MX53_PAD_EIM_A24__IPU_DISP1_DAT_19      0x4</div><div class='del'>-				MX53_PAD_EIM_D31__IPU_DISP1_DAT_20      0x4</div><div class='del'>-				MX53_PAD_EIM_D30__IPU_DISP1_DAT_21      0x4</div><div class='del'>-				MX53_PAD_EIM_D26__IPU_DISP1_DAT_22      0x4</div><div class='del'>-				MX53_PAD_EIM_D27__IPU_DISP1_DAT_23      0x4</div><div class='del'>-				MX53_PAD_GPIO_1__PWM2_PWMO 0x4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_disp: dispgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK      0x4</div><div class='add'>+			MX53_PAD_EIM_DA10__IPU_DI1_PIN15        0x4</div><div class='add'>+			MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0       0x4</div><div class='add'>+			MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1       0x4</div><div class='add'>+			MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2       0x4</div><div class='add'>+			MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3       0x4</div><div class='add'>+			MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4       0x4</div><div class='add'>+			MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5       0x4</div><div class='add'>+			MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6       0x4</div><div class='add'>+			MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7       0x4</div><div class='add'>+			MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8       0x4</div><div class='add'>+			MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9       0x4</div><div class='add'>+			MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10      0x4</div><div class='add'>+			MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11      0x4</div><div class='add'>+			MX53_PAD_EIM_A17__IPU_DISP1_DAT_12      0x4</div><div class='add'>+			MX53_PAD_EIM_A18__IPU_DISP1_DAT_13      0x4</div><div class='add'>+			MX53_PAD_EIM_A19__IPU_DISP1_DAT_14      0x4</div><div class='add'>+			MX53_PAD_EIM_A20__IPU_DISP1_DAT_15      0x4</div><div class='add'>+			MX53_PAD_EIM_A21__IPU_DISP1_DAT_16      0x4</div><div class='add'>+			MX53_PAD_EIM_A22__IPU_DISP1_DAT_17      0x4</div><div class='add'>+			MX53_PAD_EIM_A23__IPU_DISP1_DAT_18      0x4</div><div class='add'>+			MX53_PAD_EIM_A24__IPU_DISP1_DAT_19      0x4</div><div class='add'>+			MX53_PAD_EIM_D31__IPU_DISP1_DAT_20      0x4</div><div class='add'>+			MX53_PAD_EIM_D30__IPU_DISP1_DAT_21      0x4</div><div class='add'>+			MX53_PAD_EIM_D26__IPU_DISP1_DAT_22      0x4</div><div class='add'>+			MX53_PAD_EIM_D27__IPU_DISP1_DAT_23      0x4</div><div class='add'>+			MX53_PAD_GPIO_1__PWM2_PWMO 0x4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi<br/>index ae5f87b8612d..543cf723008f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-kp.dtsi</a></div><div class='hunk'>@@ -42,14 +42,14 @@</div><div class='ctx'> 		led-bus {</div><div class='ctx'> 			label = "bus";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-error {</div><div class='ctx'> 			label = "error";</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -98,56 +98,54 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_kp_common&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-kp-common {</div><div class='del'>-		pinctrl_buzzer: buzzergrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA3__PWM1_PWMO 0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_buzzer: buzzergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA3__PWM1_PWMO 0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpiobuttons: gpiobuttonsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_RW__GPIO2_26 0x1e4</div><div class='del'>-				MX53_PAD_EIM_D22__GPIO3_22 0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpiobuttons: gpiobuttonsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_RW__GPIO2_26 0x1e4</div><div class='add'>+			MX53_PAD_EIM_D22__GPIO3_22 0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_kp_common: kpcommongrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_CS0__GPIO2_23 0x1e4</div><div class='del'>-				MX53_PAD_GPIO_19__GPIO4_5  0x1e4</div><div class='del'>-				MX53_PAD_PATA_DATA6__GPIO2_6 0x1e4</div><div class='del'>-				MX53_PAD_PATA_DATA7__GPIO2_7 0xe0</div><div class='del'>-				MX53_PAD_CSI0_DAT14__GPIO6_0 0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT16__GPIO6_2 0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT18__GPIO6_4 0x1e4</div><div class='del'>-				MX53_PAD_EIM_D17__GPIO3_17 0x1e4</div><div class='del'>-				MX53_PAD_EIM_D18__GPIO3_18 0x1e4</div><div class='del'>-				MX53_PAD_EIM_D21__GPIO3_21 0x1e4</div><div class='del'>-				MX53_PAD_EIM_D29__GPIO3_29 0x1e4</div><div class='del'>-				MX53_PAD_EIM_DA11__GPIO3_11 0x1e4</div><div class='del'>-				MX53_PAD_EIM_DA13__GPIO3_13 0x1e4</div><div class='del'>-				MX53_PAD_EIM_DA14__GPIO3_14 0x1e4</div><div class='del'>-				MX53_PAD_SD1_DATA0__GPIO1_16 0x1e4</div><div class='del'>-				MX53_PAD_SD1_CMD__GPIO1_18 0x1e4</div><div class='del'>-				MX53_PAD_SD1_CLK__GPIO1_20 0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_kp_common: kpcommongrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_CS0__GPIO2_23 0x1e4</div><div class='add'>+			MX53_PAD_GPIO_19__GPIO4_5  0x1e4</div><div class='add'>+			MX53_PAD_PATA_DATA6__GPIO2_6 0x1e4</div><div class='add'>+			MX53_PAD_PATA_DATA7__GPIO2_7 0xe0</div><div class='add'>+			MX53_PAD_CSI0_DAT14__GPIO6_0 0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT16__GPIO6_2 0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT18__GPIO6_4 0x1e4</div><div class='add'>+			MX53_PAD_EIM_D17__GPIO3_17 0x1e4</div><div class='add'>+			MX53_PAD_EIM_D18__GPIO3_18 0x1e4</div><div class='add'>+			MX53_PAD_EIM_D21__GPIO3_21 0x1e4</div><div class='add'>+			MX53_PAD_EIM_D29__GPIO3_29 0x1e4</div><div class='add'>+			MX53_PAD_EIM_DA11__GPIO3_11 0x1e4</div><div class='add'>+			MX53_PAD_EIM_DA13__GPIO3_13 0x1e4</div><div class='add'>+			MX53_PAD_EIM_DA14__GPIO3_14 0x1e4</div><div class='add'>+			MX53_PAD_SD1_DATA0__GPIO1_16 0x1e4</div><div class='add'>+			MX53_PAD_SD1_CMD__GPIO1_18 0x1e4</div><div class='add'>+			MX53_PAD_SD1_CLK__GPIO1_20 0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_leds: ledgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_EB2__GPIO2_30 0x1d4</div><div class='del'>-				MX53_PAD_EIM_D28__GPIO3_28 0x1d4</div><div class='del'>-				MX53_PAD_EIM_WAIT__GPIO5_0 0x1d4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_leds: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_EB2__GPIO2_30 0x1d4</div><div class='add'>+			MX53_PAD_EIM_D28__GPIO3_28 0x1d4</div><div class='add'>+			MX53_PAD_EIM_WAIT__GPIO5_0 0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi<br/>index 00b8d7ca41a2..89b17509ad48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-m53.dtsi</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio7&gt;;</div><div class='ctx'> 		irq-trigger = &lt;0x1&gt;;</div><div class='ctx'> </div><div class='del'>-		stmpe_touchscreen {</div><div class='add'>+		touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			st,sample-time = &lt;4&gt;;</div><div class='ctx'> 			st,mod-12b = &lt;1&gt;;</div><div class='hunk'>@@ -77,41 +77,39 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-m53evk {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB3__GPIO2_31		0x80000000</div><div class='del'>-				MX53_PAD_PATA_DA_0__GPIO7_6		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB3__GPIO2_31		0x80000000</div><div class='add'>+			MX53_PAD_PATA_DA_0__GPIO7_6		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D16__I2C2_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_EIM_EB2__I2C2_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D16__I2C2_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_EIM_EB2__I2C2_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_nand: nandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='del'>-				MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='del'>-				MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='del'>-				MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='del'>-				MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='del'>-				MX53_PAD_PATA_DATA0__EMI_NANDF_D_0	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA1__EMI_NANDF_D_1	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA2__EMI_NANDF_D_2	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA3__EMI_NANDF_D_3	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA4__EMI_NANDF_D_4	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA5__EMI_NANDF_D_5	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA6__EMI_NANDF_D_6	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_nand: nandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='add'>+			MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='add'>+			MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='add'>+			MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='add'>+			MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='add'>+			MX53_PAD_PATA_DATA0__EMI_NANDF_D_0	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA1__EMI_NANDF_D_1	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA2__EMI_NANDF_D_2	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA3__EMI_NANDF_D_3	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA4__EMI_NANDF_D_4	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA5__EMI_NANDF_D_5	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA6__EMI_NANDF_D_6	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts<br/>index ba0c62994f75..eb3d66305395 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts</a></div><div class='hunk'>@@ -156,155 +156,153 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-m53evk {</div><div class='del'>-		pinctrl_usb: usbgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_2__GPIO1_2		0x80000000</div><div class='del'>-				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usb: usbgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_2__GPIO1_2		0x80000000</div><div class='add'>+			MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_4__GPIO1_4		0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_4__GPIO1_4		0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		led_pin_gpio: led_gpio {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA8__GPIO2_8		0x80000000</div><div class='del'>-				MX53_PAD_PATA_DATA9__GPIO2_9		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	led_pin_gpio: ledgpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA8__GPIO2_8		0x80000000</div><div class='add'>+			MX53_PAD_PATA_DATA9__GPIO2_9		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC	0x80000000</div><div class='del'>-				MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD	0x80000000</div><div class='del'>-				MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC	0x80000000</div><div class='add'>+			MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD	0x80000000</div><div class='add'>+			MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can2: can2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D21__I2C1_SCL		0xc0000000</div><div class='del'>-				MX53_PAD_EIM_D28__I2C1_SDA		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D21__I2C1_SCL		0xc0000000</div><div class='add'>+			MX53_PAD_EIM_D28__I2C1_SDA		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_disp1: ipudisp1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0	0x5</div><div class='del'>-				MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1	0x5</div><div class='del'>-				MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2	0x5</div><div class='del'>-				MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3	0x5</div><div class='del'>-				MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4	0x5</div><div class='del'>-				MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5	0x5</div><div class='del'>-				MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6	0x5</div><div class='del'>-				MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7	0x5</div><div class='del'>-				MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8	0x5</div><div class='del'>-				MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9	0x5</div><div class='del'>-				MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10	0x5</div><div class='del'>-				MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11	0x5</div><div class='del'>-				MX53_PAD_EIM_A17__IPU_DISP1_DAT_12	0x5</div><div class='del'>-				MX53_PAD_EIM_A18__IPU_DISP1_DAT_13	0x5</div><div class='del'>-				MX53_PAD_EIM_A19__IPU_DISP1_DAT_14	0x5</div><div class='del'>-				MX53_PAD_EIM_A20__IPU_DISP1_DAT_15	0x5</div><div class='del'>-				MX53_PAD_EIM_A21__IPU_DISP1_DAT_16	0x5</div><div class='del'>-				MX53_PAD_EIM_A22__IPU_DISP1_DAT_17	0x5</div><div class='del'>-				MX53_PAD_EIM_A23__IPU_DISP1_DAT_18	0x5</div><div class='del'>-				MX53_PAD_EIM_A24__IPU_DISP1_DAT_19	0x5</div><div class='del'>-				MX53_PAD_EIM_D31__IPU_DISP1_DAT_20	0x5</div><div class='del'>-				MX53_PAD_EIM_D30__IPU_DISP1_DAT_21	0x5</div><div class='del'>-				MX53_PAD_EIM_D26__IPU_DISP1_DAT_22	0x5</div><div class='del'>-				MX53_PAD_EIM_D27__IPU_DISP1_DAT_23	0x5</div><div class='del'>-				MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK	0x5</div><div class='del'>-				MX53_PAD_EIM_DA13__IPU_DI1_D0_CS	0x5</div><div class='del'>-				MX53_PAD_EIM_DA14__IPU_DI1_D1_CS	0x5</div><div class='del'>-				MX53_PAD_EIM_DA15__IPU_DI1_PIN1		0x5</div><div class='del'>-				MX53_PAD_EIM_DA11__IPU_DI1_PIN2		0x5</div><div class='del'>-				MX53_PAD_EIM_DA12__IPU_DI1_PIN3		0x5</div><div class='del'>-				MX53_PAD_EIM_A25__IPU_DI1_PIN12		0x5</div><div class='del'>-				MX53_PAD_EIM_DA10__IPU_DI1_PIN15	0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_disp1: ipudisp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0	0x5</div><div class='add'>+			MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1	0x5</div><div class='add'>+			MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2	0x5</div><div class='add'>+			MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3	0x5</div><div class='add'>+			MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4	0x5</div><div class='add'>+			MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5	0x5</div><div class='add'>+			MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6	0x5</div><div class='add'>+			MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7	0x5</div><div class='add'>+			MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8	0x5</div><div class='add'>+			MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9	0x5</div><div class='add'>+			MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10	0x5</div><div class='add'>+			MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11	0x5</div><div class='add'>+			MX53_PAD_EIM_A17__IPU_DISP1_DAT_12	0x5</div><div class='add'>+			MX53_PAD_EIM_A18__IPU_DISP1_DAT_13	0x5</div><div class='add'>+			MX53_PAD_EIM_A19__IPU_DISP1_DAT_14	0x5</div><div class='add'>+			MX53_PAD_EIM_A20__IPU_DISP1_DAT_15	0x5</div><div class='add'>+			MX53_PAD_EIM_A21__IPU_DISP1_DAT_16	0x5</div><div class='add'>+			MX53_PAD_EIM_A22__IPU_DISP1_DAT_17	0x5</div><div class='add'>+			MX53_PAD_EIM_A23__IPU_DISP1_DAT_18	0x5</div><div class='add'>+			MX53_PAD_EIM_A24__IPU_DISP1_DAT_19	0x5</div><div class='add'>+			MX53_PAD_EIM_D31__IPU_DISP1_DAT_20	0x5</div><div class='add'>+			MX53_PAD_EIM_D30__IPU_DISP1_DAT_21	0x5</div><div class='add'>+			MX53_PAD_EIM_D26__IPU_DISP1_DAT_22	0x5</div><div class='add'>+			MX53_PAD_EIM_D27__IPU_DISP1_DAT_23	0x5</div><div class='add'>+			MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK	0x5</div><div class='add'>+			MX53_PAD_EIM_DA13__IPU_DI1_D0_CS	0x5</div><div class='add'>+			MX53_PAD_EIM_DA14__IPU_DI1_D1_CS	0x5</div><div class='add'>+			MX53_PAD_EIM_DA15__IPU_DI1_PIN1		0x5</div><div class='add'>+			MX53_PAD_EIM_DA11__IPU_DI1_PIN2		0x5</div><div class='add'>+			MX53_PAD_EIM_DA12__IPU_DI1_PIN3		0x5</div><div class='add'>+			MX53_PAD_EIM_A25__IPU_DI1_PIN12		0x5</div><div class='add'>+			MX53_PAD_EIM_DA10__IPU_DI1_PIN15	0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_DISP0_DAT8__PWM1_PWMO		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_DISP0_DAT8__PWM1_PWMO		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts<br/>index 558751e730f3..6210673f93be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts</a></div><div class='hunk'>@@ -278,186 +278,184 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-m53evk {</div><div class='del'>-		hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_19__CCM_CLKO		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DATA_EN__GPIO5_20		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT4__GPIO5_22		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT5__GPIO5_23		0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT6__GPIO5_24		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT7__GPIO5_25		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT8__GPIO5_26		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT9__GPIO5_27		0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT10__GPIO5_28		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT11__GPIO5_29		0x1e4</div><div class='del'>-				MX53_PAD_PATA_DATA11__GPIO2_11		0x1e4</div><div class='del'>-				MX53_PAD_EIM_D24__GPIO3_24		0x1e4</div><div class='del'>-				MX53_PAD_EIM_D25__GPIO3_25		0x1e4</div><div class='del'>-				MX53_PAD_EIM_D29__GPIO3_29		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_PIXCLK__GPIO5_18		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_VSYNC__GPIO5_21		0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT18__GPIO6_4		0x1c4</div><div class='del'>-				MX53_PAD_PATA_DATA8__GPIO2_8		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_19__CCM_CLKO		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DATA_EN__GPIO5_20		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT4__GPIO5_22		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT5__GPIO5_23		0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT6__GPIO5_24		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT7__GPIO5_25		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT8__GPIO5_26		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT9__GPIO5_27		0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT10__GPIO5_28		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT11__GPIO5_29		0x1e4</div><div class='add'>+			MX53_PAD_PATA_DATA11__GPIO2_11		0x1e4</div><div class='add'>+			MX53_PAD_EIM_D24__GPIO3_24		0x1e4</div><div class='add'>+			MX53_PAD_EIM_D25__GPIO3_25		0x1e4</div><div class='add'>+			MX53_PAD_EIM_D29__GPIO3_29		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_PIXCLK__GPIO5_18		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_VSYNC__GPIO5_21		0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT18__GPIO6_4		0x1c4</div><div class='add'>+			MX53_PAD_PATA_DATA8__GPIO2_8		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_led: ledgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT15__GPIO6_1		0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT16__GPIO6_2		0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_led: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT15__GPIO6_1		0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT16__GPIO6_2		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_beeper: beepergrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT17__GPIO6_3		0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_beeper: beepergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT17__GPIO6_3		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_7__CAN1_TXCAN		0x1c4</div><div class='del'>-				MX53_PAD_GPIO_8__CAN1_RXCAN		0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_7__CAN1_TXCAN		0x1c4</div><div class='add'>+			MX53_PAD_GPIO_8__CAN1_RXCAN		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can2: can2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x1e4</div><div class='del'>-				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL4__CAN2_TXCAN		0x1e4</div><div class='add'>+			MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_display_gpio: display-gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT12__GPIO5_30		0x1c4 /* Reset */</div><div class='del'>-				MX53_PAD_CSI0_MCLK__GPIO5_19		0x1e4 /* Int-K */</div><div class='del'>-				MX53_PAD_CSI0_DAT13__GPIO5_31		0x1c4 /* Int-I */</div><div class='add'>+	pinctrl_display_gpio: display-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT12__GPIO5_30		0x1c4 /* Reset */</div><div class='add'>+			MX53_PAD_CSI0_MCLK__GPIO5_19		0x1e4 /* Int-K */</div><div class='add'>+			MX53_PAD_CSI0_DAT13__GPIO5_31		0x1c4 /* Int-I */</div><div class='ctx'> </div><div class='del'>-				MX53_PAD_CSI0_DAT14__GPIO6_0		0x1c4 /* Power down */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+			MX53_PAD_CSI0_DAT14__GPIO6_0		0x1c4 /* Power down */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_edt_ft5x06: edt-ft5x06grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA9__GPIO2_9		0x1e4 /* Reset */</div><div class='del'>-				MX53_PAD_CSI0_DAT19__GPIO6_5		0x1c4 /* Interrupt */</div><div class='del'>-				MX53_PAD_PATA_DATA10__GPIO2_10		0x1e4 /* Wake */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_edt_ft5x06: edt-ft5x06grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA9__GPIO2_9		0x1e4 /* Reset */</div><div class='add'>+			MX53_PAD_CSI0_DAT19__GPIO6_5		0x1c4 /* Interrupt */</div><div class='add'>+			MX53_PAD_PATA_DATA10__GPIO2_10		0x1e4 /* Wake */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi2: ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_CS0__ECSPI2_SCLK		0xe4</div><div class='del'>-				MX53_PAD_EIM_OE__ECSPI2_MISO		0xe4</div><div class='del'>-				MX53_PAD_EIM_CS1__ECSPI2_MOSI		0xe4</div><div class='del'>-				MX53_PAD_EIM_RW__GPIO2_26		0xe4</div><div class='del'>-				MX53_PAD_EIM_LBA__GPIO2_27		0xe4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_CS0__ECSPI2_SCLK		0xe4</div><div class='add'>+			MX53_PAD_EIM_OE__ECSPI2_MISO		0xe4</div><div class='add'>+			MX53_PAD_EIM_CS1__ECSPI2_MOSI		0xe4</div><div class='add'>+			MX53_PAD_EIM_RW__GPIO2_26		0xe4</div><div class='add'>+			MX53_PAD_EIM_LBA__GPIO2_27		0xe4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1e4</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1e4</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1e4</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1e4</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1e4</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1e4</div><div class='del'>-				MX53_PAD_GPIO_1__GPIO1_1		0x1c4</div><div class='del'>-				MX53_PAD_GPIO_9__GPIO1_9		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1e4</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1e4</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1e4</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1e4</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1e4</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1e4</div><div class='add'>+			MX53_PAD_GPIO_1__GPIO1_1		0x1c4</div><div class='add'>+			MX53_PAD_GPIO_9__GPIO1_9		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x1e4</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1e4</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x1e4</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x1e4</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x1e4</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x1e4</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x1e4</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x1c4</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x1e4</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_1__GPIO7_7		0x1e4</div><div class='del'>-				MX53_PAD_EIM_EB3__GPIO2_31		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x1e4</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x1e4</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x1e4</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x1e4</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x1e4</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x1e4</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x1e4</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x1c4</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x1e4</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_1__GPIO7_7		0x1e4</div><div class='add'>+			MX53_PAD_EIM_EB3__GPIO2_31		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4</div><div class='del'>-				MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4</div><div class='add'>+			MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4</div><div class='del'>-				MX53_PAD_GPIO_5__I2C3_SCL		0x400001e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4</div><div class='add'>+			MX53_PAD_GPIO_5__I2C3_SCL		0x400001e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lvds0: lvds0grp {</div><div class='del'>-			/* LVDS pins only have pin mux configuration */</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK	0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0	0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1	0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2	0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lvds0: lvds0grp {</div><div class='add'>+		/* LVDS pins only have pin mux configuration */</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK	0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0	0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1	0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2	0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_power_button: powerbutgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_DATA0__GPIO1_15		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_power_button: powerbutgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_DATA0__GPIO1_15		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_power_out: poweroutgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_DATA2__GPIO1_13		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_power_out: poweroutgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_DATA2__GPIO1_13		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_IORDY__UART1_RTS		0x1e4</div><div class='del'>-				MX53_PAD_PATA_RESET_B__UART1_CTS	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_IORDY__UART1_RTS		0x1e4</div><div class='add'>+			MX53_PAD_PATA_RESET_B__UART1_CTS	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DIOR__UART2_RTS		0x1e4</div><div class='del'>-				MX53_PAD_PATA_INTRQ__UART2_CTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DIOR__UART2_RTS		0x1e4</div><div class='add'>+			MX53_PAD_PATA_INTRQ__UART2_CTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usb: usbgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_2__GPIO1_2		0x1c4</div><div class='del'>-				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x1c4</div><div class='del'>-				MX53_PAD_GPIO_4__GPIO1_4		0x1c4</div><div class='del'>-				MX53_PAD_GPIO_18__GPIO7_13		0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usb: usbgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_2__GPIO1_2		0x1c4</div><div class='add'>+			MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x1c4</div><div class='add'>+			MX53_PAD_GPIO_4__GPIO1_4		0x1c4</div><div class='add'>+			MX53_PAD_GPIO_18__GPIO7_13		0x1c4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts b/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts<br/>index 0d336cbdb451..3cdb87ac1d7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-mba53.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-mba53.dts</a></div><div class='hunk'>@@ -75,71 +75,65 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	lvds1 {</div><div class='del'>-		pinctrl_lvds1_1: lvds1-grp1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lvds1_1: lvds1-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lvds1_2: lvds1-grp2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lvds1_2: lvds1-2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	disp1 {</div><div class='del'>-		pinctrl_disp1_1: disp1-grp1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */</div><div class='del'>-				MX53_PAD_EIM_DA10__IPU_DI1_PIN15   0x80000000 /* DISP1_DRDY */</div><div class='del'>-				MX53_PAD_EIM_D23__IPU_DI1_PIN2     0x80000000 /* DISP1_HSYNC */</div><div class='del'>-				MX53_PAD_EIM_EB3__IPU_DI1_PIN3     0x80000000 /* DISP1_VSYNC */</div><div class='del'>-				MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000</div><div class='del'>-				MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000</div><div class='del'>-				MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000</div><div class='del'>-				MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000</div><div class='del'>-				MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1  0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0  0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_disp1_1: disp1-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */</div><div class='add'>+			MX53_PAD_EIM_DA10__IPU_DI1_PIN15   0x80000000 /* DISP1_DRDY */</div><div class='add'>+			MX53_PAD_EIM_D23__IPU_DI1_PIN2     0x80000000 /* DISP1_HSYNC */</div><div class='add'>+			MX53_PAD_EIM_EB3__IPU_DI1_PIN3     0x80000000 /* DISP1_VSYNC */</div><div class='add'>+			MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000</div><div class='add'>+			MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000</div><div class='add'>+			MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000</div><div class='add'>+			MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000</div><div class='add'>+			MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1  0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0  0x80000000</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	tve {</div><div class='del'>-		pinctrl_vga_sync_1: vgasync-grp1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* VGA_VSYNC, HSYNC with max drive strength */</div><div class='del'>-				MX53_PAD_EIM_CS1__IPU_DI1_PIN6	   0xe6</div><div class='del'>-				MX53_PAD_EIM_DA15__IPU_DI1_PIN4	   0xe6</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_vga_sync_1: vgasync-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* VGA_VSYNC, HSYNC with max drive strength */</div><div class='add'>+			MX53_PAD_EIM_CS1__IPU_DI1_PIN6	   0xe6</div><div class='add'>+			MX53_PAD_EIM_DA15__IPU_DI1_PIN4	   0xe6</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -168,7 +162,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	expander: pca9554@20 {</div><div class='del'>-		compatible = "pca9554";</div><div class='add'>+		compatible = "nxp,pca9554";</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		interrupts = &lt;109&gt;;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts b/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts<br/>index e939acc1c88b..2892e457fea7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-ppd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-ppd.dts</a></div><div class='hunk'>@@ -593,7 +593,7 @@</div><div class='ctx'> </div><div class='ctx'> 	touchscreen@4b {</div><div class='ctx'> 		compatible = "atmel,maxtouch";</div><div class='del'>-		reset-gpio = &lt;&amp;gpio5 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reg = &lt;0x4b&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi<br/>index 05d7a462ea25..1869ad86baf2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi</a></div><div class='hunk'>@@ -170,157 +170,155 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-qsb {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_8__GPIO1_8          0x80000000</div><div class='del'>-				MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000</div><div class='del'>-				MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA11__GPIO3_11       0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA12__GPIO3_12       0x80000000</div><div class='del'>-				MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000</div><div class='del'>-				MX53_PAD_PATA_DA_2__GPIO7_8	  0x80000000</div><div class='del'>-				MX53_PAD_GPIO_16__GPIO7_11        0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_8__GPIO1_8          0x80000000</div><div class='add'>+			MX53_PAD_PATA_DATA14__GPIO2_14    0x80000000</div><div class='add'>+			MX53_PAD_PATA_DATA15__GPIO2_15    0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA11__GPIO3_11       0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA12__GPIO3_12       0x80000000</div><div class='add'>+			MX53_PAD_PATA_DA_0__GPIO7_6       0x80000000</div><div class='add'>+			MX53_PAD_PATA_DA_2__GPIO7_8	  0x80000000</div><div class='add'>+			MX53_PAD_GPIO_16__GPIO7_11        0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		led_pin_gpio7_7: led_gpio7_7 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	led_pin_gpio7_7: led_gpio7-7-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='del'>-				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='add'>+			MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_codec: codecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_codec: codecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_display_power: displaypowergrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D24__GPIO3_24		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_display_power: displaypowergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D24__GPIO3_24		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='del'>-				MX53_PAD_EIM_DA13__GPIO3_13		0xe4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='add'>+			MX53_PAD_EIM_DA13__GPIO3_13		0xe4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc3: esdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='del'>-				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='del'>-				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc3: esdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='add'>+			MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='add'>+			MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x4</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1fc</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x180</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x180</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x180</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x180</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x180</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x4</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x4</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x4</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x1fc</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x180</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x180</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x180</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x180</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x180</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x4</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x4</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* open drain */</div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT8__I2C1_SDA		0x400001ec</div><div class='del'>-				MX53_PAD_CSI0_DAT9__I2C1_SCL		0x400001ec</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* open drain */</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT8__I2C1_SDA		0x400001ec</div><div class='add'>+			MX53_PAD_CSI0_DAT9__I2C1_SCL		0x400001ec</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_disp0: ipudisp0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK	0x5</div><div class='del'>-				MX53_PAD_DI0_PIN15__IPU_DI0_PIN15	0x5</div><div class='del'>-				MX53_PAD_DI0_PIN2__IPU_DI0_PIN2		0x5</div><div class='del'>-				MX53_PAD_DI0_PIN3__IPU_DI0_PIN3		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22	0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23	0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_disp0: ipudisp0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK	0x5</div><div class='add'>+			MX53_PAD_DI0_PIN15__IPU_DI0_PIN15	0x5</div><div class='add'>+			MX53_PAD_DI0_PIN2__IPU_DI0_PIN2		0x5</div><div class='add'>+			MX53_PAD_DI0_PIN3__IPU_DI0_PIN3		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22	0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23	0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm2: pwm2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_1__PWM2_PWMO		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_1__PWM2_PWMO		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_vga_sync: vgasync-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* VGA_HSYNC, VSYNC with max drive strength */</div><div class='del'>-				MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6</div><div class='del'>-				MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_vga_sync: vgasync-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* VGA_HSYNC, VSYNC with max drive strength */</div><div class='add'>+			MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6</div><div class='add'>+			MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts b/arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts<br/>index 1bbf24ad308a..2f06ad61a766 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-qsrb.dts</a></div><div class='hunk'>@@ -13,12 +13,10 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx53-qsrb {</div><div class='del'>-		pinctrl_pmic: pmicgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT5__GPIO5_23	0x1c4 /* IRQ */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT5__GPIO5_23	0x1c4 /* IRQ */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-smd.dts b/arch/arm/boot/dts/nxp/imx/imx53-smd.dts<br/>index 55435dfdff8a..386371c816f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-smd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-smd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-smd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-smd.dts</a></div><div class='hunk'>@@ -98,140 +98,138 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-smd {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000</div><div class='del'>-				MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB2__GPIO2_30     0x80000000</div><div class='del'>-				MX53_PAD_EIM_DA13__GPIO3_13    0x80000000</div><div class='del'>-				MX53_PAD_EIM_D19__GPIO3_19     0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW2__GPIO4_11    0x80000000</div><div class='del'>-				MX53_PAD_PATA_DA_0__GPIO7_6    0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000</div><div class='add'>+			MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB2__GPIO2_30     0x80000000</div><div class='add'>+			MX53_PAD_EIM_DA13__GPIO3_13    0x80000000</div><div class='add'>+			MX53_PAD_EIM_D19__GPIO3_19     0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW2__GPIO4_11    0x80000000</div><div class='add'>+			MX53_PAD_PATA_DA_0__GPIO7_6    0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc3: esdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='del'>-				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='del'>-				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc3: esdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='add'>+			MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='add'>+			MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT8__I2C1_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_CSI0_DAT9__I2C1_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT8__I2C1_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_CSI0_DAT9__I2C1_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu_csi0: ipucsi0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19    0x1c4</div><div class='del'>-				MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4</div><div class='del'>-				MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC   0x1e4</div><div class='del'>-				MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC    0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu_csi0: ipucsi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19    0x1c4</div><div class='add'>+			MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4</div><div class='add'>+			MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC   0x1e4</div><div class='add'>+			MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC    0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5642: ov5642grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_NANDF_WP_B__GPIO6_9   0x1e4</div><div class='del'>-				MX53_PAD_NANDF_RB0__GPIO6_10   0x1e4</div><div class='del'>-				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5642: ov5642grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_NANDF_WP_B__GPIO6_9   0x1e4</div><div class='add'>+			MX53_PAD_NANDF_RB0__GPIO6_10   0x1e4</div><div class='add'>+			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi<br/>index c34ee84bd716..0f0245df380f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-tqma53.dtsi</a></div><div class='hunk'>@@ -61,144 +61,142 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-tqma53 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */</div><div class='del'>-				 MX53_PAD_PATA_DA_1__GPIO7_7     0x80000000 /* LCD_BLT_EN */</div><div class='del'>-				 MX53_PAD_PATA_DA_2__GPIO7_8     0x80000000 /* LCD_RESET */</div><div class='del'>-				 MX53_PAD_PATA_DATA5__GPIO2_5    0x80000000 /* LCD_POWER */</div><div class='del'>-				 MX53_PAD_PATA_DATA6__GPIO2_6    0x80000000 /* PMIC_INT */</div><div class='del'>-				 MX53_PAD_PATA_DATA14__GPIO2_14  0x80000000 /* CSI_RST */</div><div class='del'>-				 MX53_PAD_PATA_DATA15__GPIO2_15  0x80000000 /* CSI_PWDN */</div><div class='del'>-				 MX53_PAD_GPIO_19__GPIO4_5 	 0x80000000 /* #SYSTEM_DOWN */</div><div class='del'>-				 MX53_PAD_GPIO_3__GPIO1_3        0x80000000</div><div class='del'>-				 MX53_PAD_PATA_DA_0__GPIO7_6	 0x80000000 /* #PHY_RESET */</div><div class='del'>-				 MX53_PAD_GPIO_1__PWM2_PWMO	 0x80000000 /* LCD_CONTRAST */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='del'>-				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL2__CAN1_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW2__CAN1_RXCAN		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_can2: can2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_cspi: cspigrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__CSPI_MISO		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__CSPI_MOSI		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__CSPI_SCLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_esdhc2_cdwp: esdhc2cdwp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_4__GPIO1_4	0x80000000 /* SD2_CD */</div><div class='del'>-				MX53_PAD_GPIO_2__GPIO1_2	0x80000000 /* SD2_WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_esdhc3: esdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='del'>-				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='del'>-				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='del'>-				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='del'>-				MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */</div><div class='add'>+			 MX53_PAD_PATA_DA_1__GPIO7_7     0x80000000 /* LCD_BLT_EN */</div><div class='add'>+			 MX53_PAD_PATA_DA_2__GPIO7_8     0x80000000 /* LCD_RESET */</div><div class='add'>+			 MX53_PAD_PATA_DATA5__GPIO2_5    0x80000000 /* LCD_POWER */</div><div class='add'>+			 MX53_PAD_PATA_DATA6__GPIO2_6    0x80000000 /* PMIC_INT */</div><div class='add'>+			 MX53_PAD_PATA_DATA14__GPIO2_14  0x80000000 /* CSI_RST */</div><div class='add'>+			 MX53_PAD_PATA_DATA15__GPIO2_15  0x80000000 /* CSI_PWDN */</div><div class='add'>+			 MX53_PAD_GPIO_19__GPIO4_5 	 0x80000000 /* #SYSTEM_DOWN */</div><div class='add'>+			 MX53_PAD_GPIO_3__GPIO1_3        0x80000000</div><div class='add'>+			 MX53_PAD_PATA_DA_0__GPIO7_6	 0x80000000 /* #PHY_RESET */</div><div class='add'>+			 MX53_PAD_GPIO_1__PWM2_PWMO	 0x80000000 /* LCD_CONTRAST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='add'>+			MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL2__CAN1_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW2__CAN1_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_cspi: cspigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__CSPI_MISO		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__CSPI_MOSI		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__CSPI_SCLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_esdhc2_cdwp: esdhc2cdwpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_4__GPIO1_4	0x80000000 /* SD2_CD */</div><div class='add'>+			MX53_PAD_GPIO_2__GPIO1_2	0x80000000 /* SD2_WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_esdhc3: esdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5</div><div class='add'>+			MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5</div><div class='add'>+			MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5</div><div class='add'>+			MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='add'>+			MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts<br/>index a02d77bb5672..872cf7e16f20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2013-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -262,66 +226,64 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx53-tx53-x03x {</div><div class='del'>-		pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */</div><div class='del'>-				MX53_PAD_EIM_A16__GPIO2_22   0x04 /* Reset */</div><div class='del'>-				MX53_PAD_EIM_A17__GPIO2_21   0x04 /* Wake */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_edt_ft5x06_1: edt-ft5x06-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */</div><div class='add'>+			MX53_PAD_EIM_A16__GPIO2_22   0x04 /* Reset */</div><div class='add'>+			MX53_PAD_EIM_A17__GPIO2_21   0x04 /* Wake */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_kpp: kppgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_9__KPP_COL_6 0x1f4</div><div class='del'>-				MX53_PAD_GPIO_4__KPP_COL_7 0x1f4</div><div class='del'>-				MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4</div><div class='del'>-				MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4</div><div class='del'>-				MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4</div><div class='del'>-				MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4</div><div class='del'>-				MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4</div><div class='del'>-				MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_kpp: kppgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_9__KPP_COL_6 0x1f4</div><div class='add'>+			MX53_PAD_GPIO_4__KPP_COL_7 0x1f4</div><div class='add'>+			MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4</div><div class='add'>+			MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4</div><div class='add'>+			MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4</div><div class='add'>+			MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4</div><div class='add'>+			MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4</div><div class='add'>+			MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_rgb24_vga1: rgb24-vgagrp1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK		0x5</div><div class='del'>-				MX53_PAD_DI0_PIN15__IPU_DI0_PIN15		0x5</div><div class='del'>-				MX53_PAD_DI0_PIN2__IPU_DI0_PIN2			0x5</div><div class='del'>-				MX53_PAD_DI0_PIN3__IPU_DI0_PIN3			0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22		0x5</div><div class='del'>-				MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23		0x5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_rgb24_vga1: rgb24-vga1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK		0x5</div><div class='add'>+			MX53_PAD_DI0_PIN15__IPU_DI0_PIN15		0x5</div><div class='add'>+			MX53_PAD_DI0_PIN2__IPU_DI0_PIN2			0x5</div><div class='add'>+			MX53_PAD_DI0_PIN3__IPU_DI0_PIN3			0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22		0x5</div><div class='add'>+			MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23		0x5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_tsc2007: tsc2007grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_tsc2007: tsc2007grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts<br/>index e10c179dbdb3..96c37f4296e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2013-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 at the following locations:</div><div class='del'>- *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -139,42 +97,40 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx53-tx53-x13x {</div><div class='del'>-		pinctrl_lvds0: lvds0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000</div><div class='del'>-				MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lvds0: lvds0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000</div><div class='add'>+			MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lvds1: lvds1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000</div><div class='del'>-				MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lvds1: lvds1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000</div><div class='add'>+			MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;MX53_PAD_GPIO_9__PWM1_PWMO 0x04&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;MX53_PAD_GPIO_9__PWM1_PWMO 0x04&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_eeti1: eeti1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D22__GPIO3_22 0x1f0 /* Interrupt */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_eeti1: eeti1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D22__GPIO3_22 0x1f0 /* Interrupt */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_eeti2: eeti2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D23__GPIO3_23 0x1f0 /* Interrupt */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_eeti2: eeti2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D23__GPIO3_23 0x1f0 /* Interrupt */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi<br/>index a439a47fb65a..88855d3b2031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-tx53.dtsi</a></div><div class='hunk'>@@ -1,45 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2012-2017 &lt;LW@KARO-electronics.de&gt;</div><div class='ctx'>  * based on imx53-qsb.dts</div><div class='ctx'>  *   Copyright 2011 Freescale Semiconductor, Inc.</div><div class='ctx'>  *   Copyright 2011 Linaro Ltd.</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "imx53.dtsi"</div><div class='hunk'>@@ -257,261 +221,259 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-tx53 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			/* pins not in use by any device on the Starterkit board series */</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* CMOS Sensor Interface */</div><div class='del'>-				MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4</div><div class='del'>-				MX53_PAD_GPIO_0__GPIO1_0 0x1f4</div><div class='del'>-				/* Module Specific Signal */</div><div class='del'>-				/* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */</div><div class='del'>-				/* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */</div><div class='del'>-				MX53_PAD_EIM_D29__GPIO3_29 0x1f4</div><div class='del'>-				MX53_PAD_EIM_EB3__GPIO2_31 0x1f4</div><div class='del'>-				/* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */</div><div class='del'>-				/* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */</div><div class='del'>-				MX53_PAD_EIM_A19__GPIO2_19 0x1f4</div><div class='del'>-				MX53_PAD_EIM_A20__GPIO2_18 0x1f4</div><div class='del'>-				MX53_PAD_EIM_A21__GPIO2_17 0x1f4</div><div class='del'>-				MX53_PAD_EIM_A22__GPIO2_16 0x1f4</div><div class='del'>-				MX53_PAD_EIM_A23__GPIO6_6 0x1f4</div><div class='del'>-				MX53_PAD_EIM_A24__GPIO5_4 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4</div><div class='del'>-				/* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */</div><div class='del'>-				/* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */</div><div class='del'>-				MX53_PAD_GPIO_13__GPIO4_3 0x1f4</div><div class='del'>-				MX53_PAD_EIM_CS0__GPIO2_23 0x1f4</div><div class='del'>-				MX53_PAD_EIM_CS1__GPIO2_24 0x1f4</div><div class='del'>-				MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4</div><div class='del'>-				MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4</div><div class='del'>-				MX53_PAD_EIM_EB0__GPIO2_28 0x1f4</div><div class='del'>-				MX53_PAD_EIM_EB1__GPIO2_29 0x1f4</div><div class='del'>-				MX53_PAD_EIM_OE__GPIO2_25 0x1f4</div><div class='del'>-				MX53_PAD_EIM_LBA__GPIO2_27 0x1f4</div><div class='del'>-				MX53_PAD_EIM_RW__GPIO2_26 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA8__GPIO3_8 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA9__GPIO3_9 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA10__GPIO3_10 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA11__GPIO3_11 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA12__GPIO3_12 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA13__GPIO3_13 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA14__GPIO3_14 0x1f4</div><div class='del'>-				MX53_PAD_EIM_DA15__GPIO3_15 0x1f4</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		/* pins not in use by any device on the Starterkit board series */</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* CMOS Sensor Interface */</div><div class='add'>+			MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4</div><div class='add'>+			MX53_PAD_GPIO_0__GPIO1_0 0x1f4</div><div class='add'>+			/* Module Specific Signal */</div><div class='add'>+			/* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */</div><div class='add'>+			/* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */</div><div class='add'>+			MX53_PAD_EIM_D29__GPIO3_29 0x1f4</div><div class='add'>+			MX53_PAD_EIM_EB3__GPIO2_31 0x1f4</div><div class='add'>+			/* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */</div><div class='add'>+			/* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */</div><div class='add'>+			MX53_PAD_EIM_A19__GPIO2_19 0x1f4</div><div class='add'>+			MX53_PAD_EIM_A20__GPIO2_18 0x1f4</div><div class='add'>+			MX53_PAD_EIM_A21__GPIO2_17 0x1f4</div><div class='add'>+			MX53_PAD_EIM_A22__GPIO2_16 0x1f4</div><div class='add'>+			MX53_PAD_EIM_A23__GPIO6_6 0x1f4</div><div class='add'>+			MX53_PAD_EIM_A24__GPIO5_4 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4</div><div class='add'>+			/* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */</div><div class='add'>+			/* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */</div><div class='add'>+			MX53_PAD_GPIO_13__GPIO4_3 0x1f4</div><div class='add'>+			MX53_PAD_EIM_CS0__GPIO2_23 0x1f4</div><div class='add'>+			MX53_PAD_EIM_CS1__GPIO2_24 0x1f4</div><div class='add'>+			MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4</div><div class='add'>+			MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4</div><div class='add'>+			MX53_PAD_EIM_EB0__GPIO2_28 0x1f4</div><div class='add'>+			MX53_PAD_EIM_EB1__GPIO2_29 0x1f4</div><div class='add'>+			MX53_PAD_EIM_OE__GPIO2_25 0x1f4</div><div class='add'>+			MX53_PAD_EIM_LBA__GPIO2_27 0x1f4</div><div class='add'>+			MX53_PAD_EIM_RW__GPIO2_26 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA8__GPIO3_8 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA9__GPIO3_9 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA10__GPIO3_10 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA11__GPIO3_11 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA12__GPIO3_12 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA13__GPIO3_13 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA14__GPIO3_14 0x1f4</div><div class='add'>+			MX53_PAD_EIM_DA15__GPIO3_15 0x1f4</div><div class='ctx'> 			&gt;;</div><div class='del'>-		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can2: can2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_7__CAN1_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_GPIO_8__CAN1_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can_xcvr: can-xcvrgrp {</div><div class='del'>-			fsl,pins = &lt;MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0&gt;; /* Flexcan XCVR enable */</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ds1339: ds1339grp {</div><div class='del'>-			fsl,pins = &lt;MX53_PAD_DI0_PIN4__GPIO4_20 0xe0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can_xcvr: can-xcvrgrp {</div><div class='add'>+		fsl,pins = &lt;MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0&gt;; /* Flexcan XCVR enable */</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_19__ECSPI1_RDY		0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB2__ECSPI1_SS0		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D19__ECSPI1_SS1		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ds1339: ds1339grp {</div><div class='add'>+		fsl,pins = &lt;MX53_PAD_DI0_PIN4__GPIO4_20 0xe0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='del'>-				MX53_PAD_EIM_D24__GPIO3_24 0x1f0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_19__ECSPI1_RDY		0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB2__ECSPI1_SS0		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D19__ECSPI1_SS1		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='del'>-				MX53_PAD_EIM_D25__GPIO3_25 0x1f0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5</div><div class='add'>+			MX53_PAD_EIM_D24__GPIO3_24 0x1f0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='add'>+			MX53_PAD_EIM_D25__GPIO3_25 0x1f0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_key: gpio-keygrp {</div><div class='del'>-			fsl,pins = &lt;MX53_PAD_EIM_A25__GPIO5_2 0x1f4&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4</div><div class='del'>-				MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_key: gpio-keygrp {</div><div class='add'>+		fsl,pins = &lt;MX53_PAD_EIM_A25__GPIO5_2 0x1f4&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1_gpio: i2c1-gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D21__GPIO3_21		0x400001e6</div><div class='del'>-				MX53_PAD_EIM_D28__GPIO3_28		0x400001e6</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4</div><div class='add'>+			MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_3__I2C3_SCL		0x400001e4</div><div class='del'>-				MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D21__GPIO3_21		0x400001e6</div><div class='add'>+			MX53_PAD_EIM_D28__GPIO3_28		0x400001e6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3_gpio: i2c3-gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_3__GPIO1_3		0x400001e6</div><div class='del'>-				MX53_PAD_GPIO_6__GPIO1_6		0x400001e6</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_3__I2C3_SCL		0x400001e4</div><div class='add'>+			MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_nand: nandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='del'>-				MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='del'>-				MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='del'>-				MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='del'>-				MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='del'>-				MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6	0xa4</div><div class='del'>-				MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7	0xa4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_3__GPIO1_3		0x400001e6</div><div class='add'>+			MX53_PAD_GPIO_6__GPIO1_6		0x400001e6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm2: pwm2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_1__PWM2_PWMO		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_nand: nandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='add'>+			MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='add'>+			MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='add'>+			MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='add'>+			MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='add'>+			MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6	0xa4</div><div class='add'>+			MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7	0xa4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ssi1: ssi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='del'>-				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_1__PWM2_PWMO		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ssi2: ssi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC	0x80000000</div><div class='del'>-				MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD	0x80000000</div><div class='del'>-				MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD	0x80000000</div><div class='del'>-				MX53_PAD_EIM_D27__GPIO3_27 0x1f0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ssi1: ssi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='add'>+			MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_stk5led: stk5ledgrp {</div><div class='del'>-			fsl,pins = &lt;MX53_PAD_EIM_A18__GPIO2_20 0xc0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ssi2: ssi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC	0x80000000</div><div class='add'>+			MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD	0x80000000</div><div class='add'>+			MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD	0x80000000</div><div class='add'>+			MX53_PAD_EIM_D27__GPIO3_27 0x1f0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_RESET_B__UART1_CTS	0x1c5</div><div class='del'>-				MX53_PAD_PATA_IORDY__UART1_RTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_stk5led: stk5ledgrp {</div><div class='add'>+		fsl,pins = &lt;MX53_PAD_EIM_A18__GPIO2_20 0xc0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1c5</div><div class='del'>-				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1c5</div><div class='del'>-				MX53_PAD_PATA_DIOR__UART2_RTS		0x1c5</div><div class='del'>-				MX53_PAD_PATA_INTRQ__UART2_CTS		0x1c5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_RESET_B__UART1_CTS	0x1c5</div><div class='add'>+			MX53_PAD_PATA_IORDY__UART1_RTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='del'>-				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1c5</div><div class='add'>+			MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1c5</div><div class='add'>+			MX53_PAD_PATA_DIOR__UART2_RTS		0x1c5</div><div class='add'>+			MX53_PAD_PATA_INTRQ__UART2_CTS		0x1c5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_1__UART3_CTS		0x1e4</div><div class='add'>+			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg_vbus: usbotg-vbusgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */</div><div class='del'>-				MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg_vbus: usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */</div><div class='add'>+			MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts b/arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts<br/>index ae53d178a683..ae9cc04f23eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-voipac-bsb.dts</a></div><div class='hunk'>@@ -40,67 +40,65 @@</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='del'>-</div><div class='del'>-	imx53-voipac {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* SD2_CD */</div><div class='del'>-				MX53_PAD_EIM_D25__GPIO3_25	0x80000000</div><div class='del'>-				/* SD2_WP */</div><div class='del'>-				MX53_PAD_EIM_A19__GPIO2_19 	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hogbsb&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_hogbsb: hogbsbgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* SD2_CD */</div><div class='add'>+			MX53_PAD_EIM_D25__GPIO3_25	0x80000000</div><div class='add'>+			/* SD2_WP */</div><div class='add'>+			MX53_PAD_EIM_A19__GPIO2_19 	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		led_pin_gpio: led_gpio {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D29__GPIO3_29	0x80000000</div><div class='del'>-				MX53_PAD_EIM_EB3__GPIO2_31	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	led_pin_gpio: ledgpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D29__GPIO3_29	0x80000000</div><div class='add'>+			MX53_PAD_EIM_EB3__GPIO2_31	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* Keyboard controller */</div><div class='del'>-		pinctrl_kpp_1: kppgrp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_9__KPP_COL_6	0xe8</div><div class='del'>-				MX53_PAD_GPIO_4__KPP_COL_7	0xe8</div><div class='del'>-				MX53_PAD_KEY_COL2__KPP_COL_2	0xe8</div><div class='del'>-				MX53_PAD_KEY_COL3__KPP_COL_3	0xe8</div><div class='del'>-				MX53_PAD_KEY_COL4__KPP_COL_4	0xe8</div><div class='del'>-				MX53_PAD_GPIO_2__KPP_ROW_6	0xe0</div><div class='del'>-				MX53_PAD_GPIO_5__KPP_ROW_7	0xe0</div><div class='del'>-				MX53_PAD_KEY_ROW2__KPP_ROW_2	0xe0</div><div class='del'>-				MX53_PAD_KEY_ROW3__KPP_ROW_3	0xe0</div><div class='del'>-				MX53_PAD_KEY_ROW4__KPP_ROW_4	0xe0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* Keyboard controller */</div><div class='add'>+	pinctrl_kpp_1: kpp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_9__KPP_COL_6	0xe8</div><div class='add'>+			MX53_PAD_GPIO_4__KPP_COL_7	0xe8</div><div class='add'>+			MX53_PAD_KEY_COL2__KPP_COL_2	0xe8</div><div class='add'>+			MX53_PAD_KEY_COL3__KPP_COL_3	0xe8</div><div class='add'>+			MX53_PAD_KEY_COL4__KPP_COL_4	0xe8</div><div class='add'>+			MX53_PAD_GPIO_2__KPP_ROW_6	0xe0</div><div class='add'>+			MX53_PAD_GPIO_5__KPP_ROW_7	0xe0</div><div class='add'>+			MX53_PAD_KEY_ROW2__KPP_ROW_2	0xe0</div><div class='add'>+			MX53_PAD_KEY_ROW3__KPP_ROW_3	0xe0</div><div class='add'>+			MX53_PAD_KEY_ROW4__KPP_ROW_4	0xe0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='del'>-				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='del'>-				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000</div><div class='add'>+			MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000</div><div class='add'>+			MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc2: esdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='del'>-				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='del'>-				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc2: esdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5</div><div class='add'>+			MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5</div><div class='add'>+			MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_GPIO_3__I2C3_SCL		0xc0000000</div><div class='del'>-				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_GPIO_3__I2C3_SCL		0xc0000000</div><div class='add'>+			MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi<br/>index c0622cf7188c..6dc70a92d831 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi</a></div><div class='hunk'>@@ -37,74 +37,72 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx53-voipac {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Make DA9053 regulator functional */</div><div class='del'>-				MX53_PAD_GPIO_16__GPIO7_11	0x80000000</div><div class='del'>-				/* FEC Power enable */</div><div class='del'>-				MX53_PAD_GPIO_11__GPIO4_1	0x80000000</div><div class='del'>-				/* FEC RST */</div><div class='del'>-				MX53_PAD_GPIO_12__GPIO4_2	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Make DA9053 regulator functional */</div><div class='add'>+			MX53_PAD_GPIO_16__GPIO7_11	0x80000000</div><div class='add'>+			/* FEC Power enable */</div><div class='add'>+			MX53_PAD_GPIO_11__GPIO4_1	0x80000000</div><div class='add'>+			/* FEC RST */</div><div class='add'>+			MX53_PAD_GPIO_12__GPIO4_2	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='del'>-				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000</div><div class='add'>+			MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='del'>-				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='del'>-				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='del'>-				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='del'>-				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='del'>-				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_FEC_MDC__FEC_MDC		0x80000000</div><div class='add'>+			MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000</div><div class='add'>+			MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000</div><div class='add'>+			MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000</div><div class='add'>+			MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000</div><div class='add'>+			MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_EIM_D21__I2C1_SCL		0xc0000000</div><div class='del'>-				MX53_PAD_EIM_D28__I2C1_SDA		0xc0000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_EIM_D21__I2C1_SCL		0xc0000000</div><div class='add'>+			MX53_PAD_EIM_D28__I2C1_SDA		0xc0000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='del'>-				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4</div><div class='add'>+			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_nand: nandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='del'>-				MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='del'>-				MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='del'>-				MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='del'>-				MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='del'>-				MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='del'>-				MX53_PAD_PATA_DATA0__EMI_NANDF_D_0	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA1__EMI_NANDF_D_1	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA2__EMI_NANDF_D_2	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA3__EMI_NANDF_D_3	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA4__EMI_NANDF_D_4	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA5__EMI_NANDF_D_5	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA6__EMI_NANDF_D_6	0xa4</div><div class='del'>-				MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_nand: nandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B	0x4</div><div class='add'>+			MX53_PAD_NANDF_CLE__EMI_NANDF_CLE	0x4</div><div class='add'>+			MX53_PAD_NANDF_ALE__EMI_NANDF_ALE	0x4</div><div class='add'>+			MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B	0xe0</div><div class='add'>+			MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0	0xe0</div><div class='add'>+			MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0	0x4</div><div class='add'>+			MX53_PAD_PATA_DATA0__EMI_NANDF_D_0	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA1__EMI_NANDF_D_1	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA2__EMI_NANDF_D_2	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA3__EMI_NANDF_D_3	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA4__EMI_NANDF_D_4	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA5__EMI_NANDF_D_5	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA6__EMI_NANDF_D_6	0xa4</div><div class='add'>+			MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53.dtsi<br/>index 07658e477095..93225a56896f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx53.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx53.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx53.dtsi</a></div><div class='hunk'>@@ -458,7 +458,7 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX5_CLK_SRTC_GATE&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			iomuxc: iomuxc@53fa8000 {</div><div class='add'>+			iomuxc: pinctrl@53fa8000 {</div><div class='ctx'> 				compatible = "fsl,imx53-iomuxc";</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -598,7 +598,7 @@</div><div class='ctx'> 			clks: ccm@53fd4000 {</div><div class='ctx'> 				compatible = "fsl,imx53-ccm";</div><div class='ctx'> 				reg = &lt;0x53fd4000 0x4000&gt;;</div><div class='del'>-				interrupts = &lt;0 71 0x04 0 72 0x04&gt;;</div><div class='add'>+				interrupts = &lt;71&gt;, &lt;72&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -668,7 +668,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			iim: efuse@63f98000 {</div><div class='del'>-				compatible = "fsl,imx53-iim", "fsl,imx27-iim", "syscon";</div><div class='add'>+				compatible = "fsl,imx53-iim";</div><div class='ctx'> 				reg = &lt;0x63f98000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;69&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX5_CLK_IIM_GATE&gt;;</div><div class='hunk'>@@ -775,7 +775,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			nfc: nand@63fdb000 {</div><div class='add'>+			nfc: nand-controller@63fdb000 {</div><div class='ctx'> 				compatible = "fsl,imx53-nand";</div><div class='ctx'> 				reg = &lt;0x63fdb000 0x1000 0xf7ff0000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;8&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi<br/>index d477a937b47a..1e0a588b2a15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi</a></div><div class='hunk'>@@ -534,7 +534,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: h100-usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */</div><div class='ctx'> 			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='hunk'>@@ -546,7 +546,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: h100-usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */</div><div class='ctx'> 			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts<br/>index 4989e8d069a1..9bb36db131c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		clock-output-names = "enet_ref_pad";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2-mux {</div><div class='add'>+	i2c-mux-2 {</div><div class='ctx'> 		compatible = "i2c-mux";</div><div class='ctx'> 		i2c-parent = &lt;&amp;i2c2&gt;;</div><div class='ctx'> 		mux-controls = &lt;&amp;i2c_mux&gt;;</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c4-mux {</div><div class='add'>+	i2c-mux-4 {</div><div class='ctx'> 		compatible = "i2c-mux";</div><div class='ctx'> 		i2c-parent = &lt;&amp;i2c4&gt;;</div><div class='ctx'> 		mux-controls = &lt;&amp;i2c_mux&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts<br/>index c9b2ea2b24b2..fc62ba2a4fcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts</a></div><div class='hunk'>@@ -1,44 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * support for the imx6 based aristainetos2 board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include "imx6dl.dtsi"</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts<br/>index 5e15212eaf3a..a7400d42475b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dts</a></div><div class='hunk'>@@ -1,44 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * support for the imx6 based aristainetos2 board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include "imx6dl.dtsi"</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts<br/>index 82a0d1a28d12..987058ab0a9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		&amp;pinctrl_weim_gpio_5</div><div class='ctx'> 	&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_aster: gpioaster {</div><div class='add'>+	pinctrl_gpio_aster: gpioastergrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL2__GPIO4_IO10		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11		0x1b0b0</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts<br/>new file mode 100644<br/>index 000000000000..44c78c07f431<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-aster.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6dl-colibri-aster.dts"</div><div class='add'>+#include "imx6qdl-colibri-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Aster Board";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts<br/>new file mode 100644<br/>index 000000000000..93fd0af53a3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-eval-v3.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6dl-colibri-eval-v3.dts"</div><div class='add'>+#include "imx6qdl-colibri-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Evaluation Board V3";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts<br/>new file mode 100644<br/>index 000000000000..92d41fc9a13f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris-v2.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6dl-colibri-iris-v2.dts"</div><div class='add'>+#include "imx6qdl-colibri-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Iris V2 Board";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts<br/>new file mode 100644<br/>index 000000000000..c8957948c887<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-colibri-v1.2-iris.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6dl-colibri-iris.dts"</div><div class='add'>+#include "imx6qdl-colibri-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Iris Board";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts<br/>new file mode 100644<br/>index 000000000000..38235925257a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-pdk2.dts</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * DHCOM iMX6 variant:</div><div class='add'>+ * DHCM-iMX6DL-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2</div><div class='add'>+ * DHCOM PCB number: 493-400 or newer</div><div class='add'>+ * PDK2 PCB number: 516-400 or newer</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6dl.dtsi"</div><div class='add'>+#include "imx6qdl-dhcom-som.dtsi"</div><div class='add'>+#include "imx6qdl-dhcom-pdk2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "DH electronics i.MX6DL DHCOM on Premium Developer Kit (2)";</div><div class='add'>+	compatible = "dh,imx6dl-dhcom-pdk2", "dh,imx6dl-dhcom-som",</div><div class='add'>+		     "fsl,imx6dl";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts<br/>index 038bb0025556..775caf8208c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-dhcom-picoitx.dts</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2021 DH electronics GmbH</div><div class='ctx'>  *</div><div class='ctx'>  * DHCOM iMX6 variant:</div><div class='del'>- * DHCM-iMX6DL-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2</div><div class='add'>+ * DHCM-iMX6DL-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2</div><div class='ctx'>  * DHCOM PCB number: 493-300 or newer</div><div class='ctx'>  * PicoITX PCB number: 487-600 or newer</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts<br/>index 33825b5a8f26..5ed55f74b398 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts</a></div><div class='hunk'>@@ -139,7 +139,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl_hog: hog {</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x00000018 /* buzzer */</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x00000018 /* OUT_1 */</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts<br/>index 82d5f85722ea..50dd3df9dd04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-gw551x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts<br/>index 59b8afc36e66..8ca5b6b8da07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-gw553x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2016 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts<br/>index 21bdfaf8df53..b94455406a57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts<br/>index 103261ea9334..dd978105b42f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts<br/>index 9c6d3cd3d6a7..172dad423639 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts<br/>index 72ee236d2f5e..ec5a9bf40677 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dts</a></div><div class='hunk'>@@ -395,7 +395,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_ipu1_lcdif: pinctrlipu1lcdif { /* parallel port 24-bit */</div><div class='add'>+	pinctrl_ipu1_lcdif: pinctrlipu1lcdifgrp { /* parallel port 24-bit */</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* VDOUT_PCLK */</div><div class='ctx'> 			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts<br/>index 773a84a5739d..2160b7177835 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts</a></div><div class='hunk'>@@ -557,7 +557,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;usbh1 {</div><div class='ctx'> 	vbus-supply = &lt;&amp;reg_h1_vbus&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='ctx'> 	phy_type = "utmi";</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	disable-over-current;</div><div class='hunk'>@@ -773,7 +772,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pca9539: pca9539 {</div><div class='add'>+	pinctrl_pca9539: pca9539grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_19__GPIO4_IO05			0x1b0b0</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts<br/>index 36b031236e47..e543c4f2bc94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-prtrvt.dts</a></div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_can1phy: can1phy {</div><div class='add'>+	pinctrl_can1phy: can1phygrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* CAN1_SR */</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x13070</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts<br/>index 568e98cb62aa..29dc6875ab66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-prtvt7.dts</a></div><div class='hunk'>@@ -507,7 +507,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_can1phy: can1phy {</div><div class='add'>+	pinctrl_can1phy: can1phygrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* CAN1_SR */</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x13070</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi<br/>index 8a637fdff073..7a3b96315eaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi</a></div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rtc: m41t62@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "st,m41t62";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -352,261 +352,259 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	qmx6mux: imx6qdl-qmx6 {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x110b0 /* Q7[67] HDA_SDO */</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x30b0 /* Q7[59] HDA_SYNC */</div><div class='del'>-				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x30b0 /* Q7[65] HDA_SDI */</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x30b0 /* Q7[63] HDA_BITCLK */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x110b0 /* Q7[67] HDA_SDO */</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x30b0 /* Q7[59] HDA_SYNC */</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x30b0 /* Q7[65] HDA_SDI */</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x30b0 /* Q7[63] HDA_BITCLK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* PHY is on System on Module, Q7[3-15] have Ethernet lines */</div><div class='del'>-		pinctrl_enet: enet {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* PHY is on System on Module, Q7[3-15] have Ethernet lines */</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000 /* PCIE_WAKE_B */</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x80000000 /* I2C multiplexer */</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__GPIO2_IO06		0x80000000 /* SD4_CD# */</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__GPIO2_IO07		0x80000000 /* SD4_WP */</div><div class='del'>-				MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1		0x80000000 /* Camera MCLK */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000 /* PCIE_WAKE_B */</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x80000000 /* I2C multiplexer */</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__GPIO2_IO06		0x80000000 /* SD4_CD# */</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__GPIO2_IO07		0x80000000 /* SD4_WP */</div><div class='add'>+			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1		0x80000000 /* Camera MCLK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1 /* Q7[66] I2C_CLK */</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1 /* Q7[68] I2C_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1 /* Q7[66] I2C_CLK */</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1 /* Q7[68] I2C_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1_gpio: i2c1-gpio {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x1b0b0 /* Q7[66] I2C_CLK */</div><div class='del'>-				MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x1b0b0 /* Q7[68] I2C_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x1b0b0 /* Q7[66] I2C_CLK */</div><div class='add'>+			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x1b0b0 /* Q7[68] I2C_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1 /* Q7[152] SDVO_CTRL_CLK */</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1 /* Q7[150] SDVO_CTRL_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1 /* Q7[152] SDVO_CTRL_CLK */</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1 /* Q7[150] SDVO_CTRL_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2_gpio: i2c2-gpio {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x1b0b0 /* Q7[152] SDVO_CTRL_CLK */</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x1b0b0 /* Q7[150] SDVO_CTRL_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x1b0b0 /* Q7[152] SDVO_CTRL_CLK */</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x1b0b0 /* Q7[150] SDVO_CTRL_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1 /* Q7[60] SMB_CLK */</div><div class='del'>-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1 /* Q7[62] SMB_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1 /* Q7[60] SMB_CLK */</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1 /* Q7[62] SMB_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3_gpio: i2c3-gpio {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x1b0b0 /* Q7[60] SMB_CLK */</div><div class='del'>-				MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x1b0b0 /* Q7[62] SMB_DAT */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x1b0b0 /* Q7[60] SMB_CLK */</div><div class='add'>+			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x1b0b0 /* Q7[62] SMB_DAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_phy_reset: phy-reset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x1b0b0 /* RGMII Phy Reset */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_phy_reset: phy-resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x1b0b0 /* RGMII Phy Reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1 /* Q7[123] LVDS_BLT_CTRL */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1 /* Q7[123] LVDS_BLT_CTRL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_backlight_enable: q7-backlight-enable {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x1b0b0 /* Q7[112] LVDS_BLEN */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_backlight_enable: q7-backlight-enablegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x1b0b0 /* Q7[112] LVDS_BLEN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio0: q7-gpio0 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0 /* Q7[185] GPIO0 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio0: q7-gpio0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0 /* Q7[185] GPIO0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio1: q7-gpio1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x1b0b0 /* Q7[186] GPIO1 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio1: q7-gpio1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x1b0b0 /* Q7[186] GPIO1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio2: q7-gpio2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x1b0b0 /* Q7[187] GPIO2 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio2: q7-gpio2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x1b0b0 /* Q7[187] GPIO2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio3: q7-gpio3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27	0x1b0b0 /* Q7[188] GPIO3 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio3: q7-gpio3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27	0x1b0b0 /* Q7[188] GPIO3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio4: q7-gpio4 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0 /* Q7[189] GPIO4 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio4: q7-gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0 /* Q7[189] GPIO4 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio5: q7-gpio5 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0 /* Q7[190] GPIO5 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio5: q7-gpio5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0 /* Q7[190] GPIO5 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio6: q7-gpio6 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_16__GPIO7_IO11		0x1b0b0 /* Q7[191] GPIO6 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio6: q7-gpio6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_16__GPIO7_IO11		0x1b0b0 /* Q7[191] GPIO6 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_gpio7: q7-gpio7 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0 /* Q7[192] GPIO7 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_gpio7: q7-gpio7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0 /* Q7[192] GPIO7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_hda_reset: q7-hda-reset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0 /* Q7[61] HDA_RST_N */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_hda_reset: q7-hda-resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0 /* Q7[61] HDA_RST_N */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_lcd_power: lcd-power {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0 /* Q7[111] LVDS_PPEN */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_lcd_power: lcd-powergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0 /* Q7[111] LVDS_PPEN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_sdio_power: q7-sdio-power {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	0x1b0b0 /* Q7[47] SDIO_PWR# */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_sdio_power: q7-sdio-powergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	0x1b0b0 /* Q7[47] SDIO_PWR# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_sleep_button: q7-sleep-button {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0 /* Q7[21] SLP_BTN# */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_sleep_button: q7-sleep-buttongrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0 /* Q7[21] SLP_BTN# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_q7_spi_cs1: spi-cs1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x1b0b0 /* Q7[202] SPI_CS1# */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_q7_spi_cs1: spi-cs1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x1b0b0 /* Q7[202] SPI_CS1# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* SPI1 bus does not leave System on Module */</div><div class='del'>-		pinctrl_spi1: spi1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* SPI1 bus does not leave System on Module */</div><div class='add'>+	pinctrl_spi1: spi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* Debug connector on Q7 module */</div><div class='del'>-		pinctrl_uart2: uart2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* Debug connector on Q7 module */</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1 /* Q7[177] UART0_RX */</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1 /* Q7[171] UART0_TX */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1 /* Q7[177] UART0_RX */</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1 /* Q7[171] UART0_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotg {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059 /* Q7[92] USB_ID */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059 /* Q7[92] USB_ID */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* µSD card slot on Q7 module */</div><div class='del'>-		pinctrl_usdhc2: usdhc2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0 /* SD2_CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* µSD card slot on Q7 module */</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0 /* SD2_CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		/* eMMC module on Q7 module */</div><div class='del'>-		pinctrl_usdhc3: usdhc3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	/* eMMC module on Q7 module */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059 /* Q7[45] SDIO_CMD */</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x17059 /* Q7[42] SDIO_CLK */</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059 /* Q7[48] SDIO_DAT1 */</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059 /* Q7[49] SDIO_DAT0 */</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059 /* Q7[50] SDIO_DAT3 */</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059 /* Q7[51] SDIO_DAT2 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059 /* Q7[45] SDIO_CMD */</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x17059 /* Q7[42] SDIO_CLK */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059 /* Q7[48] SDIO_DAT1 */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059 /* Q7[49] SDIO_DAT0 */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059 /* Q7[50] SDIO_DAT3 */</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059 /* Q7[51] SDIO_DAT2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wdog: wdog {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0 /* Watchdog output signal */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0 /* Watchdog output signal */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts<br/>index 114739d10447..55b7e91d2ac0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-riotboard.dts</a></div><div class='hunk'>@@ -389,210 +389,206 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	imx6-riotboard {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0		/* CAM_MCLK */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0		/* CAM_MCLK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x000b1		/* CS0 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x000b1		/* CS0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi2: ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x000b1		/* CS1 */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x000b1		/* CS0 */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	0x100b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x000b1		/* CS1 */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x000b1		/* CS0 */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	0x100b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi3: ecspi3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x000b1		/* CS0 */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x000b1		/* CS1 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi3: ecspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x000b1		/* CS0 */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x000b1		/* CS1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1		/* AR8035 CLK_25M --&gt; ENET_REF_CLK (V22) */</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030		/* AR8035 pin strapping: IO voltage: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030		/* AR8035 pin strapping: PHYADDR#0: pull down */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030		/* AR8035 pin strapping: PHYADDR#1: pull down */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030		/* AR8035 pin strapping: MODE#1: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030		/* AR8035 pin strapping: MODE#3: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0		/* AR8035 pin strapping: MODE#0: pull down */</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8	/* GPIO16 -&gt; AR8035 25MHz */</div><div class='del'>-				MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x130b0		/* RGMII_nRST */</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x180b0		/* AR8035 interrupt */</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1		/* AR8035 CLK_25M --&gt; ENET_REF_CLK (V22) */</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030		/* AR8035 pin strapping: IO voltage: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030		/* AR8035 pin strapping: PHYADDR#0: pull down */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030		/* AR8035 pin strapping: PHYADDR#1: pull down */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030		/* AR8035 pin strapping: MODE#1: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030		/* AR8035 pin strapping: MODE#3: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0		/* AR8035 pin strapping: MODE#0: pull down */</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8	/* GPIO16 -&gt; AR8035 25MHz */</div><div class='add'>+			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x130b0		/* RGMII_nRST */</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x180b0		/* AR8035 interrupt */</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c4: i2c4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_7__I2C4_SCL             0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_8__I2C4_SDA             0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_7__I2C4_SCL             0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_8__I2C4_SDA             0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_led: ledgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b1	/* user led0 */</div><div class='del'>-				MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x1b0b1	/* user led1 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_led: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b1	/* user led0 */</div><div class='add'>+			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x1b0b1	/* user led1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__PWM1_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm2: pwm2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__PWM2_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__PWM2_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart5: uart5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0	/* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */</div><div class='del'>-				MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0	/* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */</div><div class='add'>+			MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* SD2 CD */</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1f0b0	/* SD2 WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* SD2 CD */</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1f0b0	/* SD2 WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0	/* SD3 CD */</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1f0b0	/* SD3 WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0	/* SD3 CD */</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1f0b0	/* SD3 WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x17059	/* SD4 RST (eMMC) */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x17059	/* SD4 RST (eMMC) */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts<br/>index 51a9bb9d6bc2..136ae7841878 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6dl-comtft.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -51,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;backlight {</div><div class='ctx'> 	pwms = &lt;&amp;pwm2 0 500000 0&gt;;</div><div class='del'>-	/delete-property/ turn-on-delay-ms;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts<br/>index fc23b4d291a1..e1b525ed292a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts<br/>index 9eb2ef17339c..9a6a5cda9a3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8034.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts<br/>index 4101c6597721..0e8f4c3f3760 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts<br/>index a5532ecc18c5..9958e8701c98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6s-8035.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts<br/>index 67ed0452f5de..d9bfd340efb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-801x.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts<br/>index d34189fc52d9..8243f0d6d387 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts<br/>index 7030b2654bbd..2d031403ab19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-8033.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts<br/>index aef5fcc42904..684a2583db75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-80xx-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts<br/>index 5342f2f5a8a8..7fdc794615f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-811x.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts<br/>index c4588fb0bf6f..209aaebe148a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-tx6u-81xx-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2016-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi<br/>index c32ea040fecd..8bc6376d0dc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi</a></div><div class='hunk'>@@ -506,7 +506,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usbh1_vbus: usbh1-vbus {</div><div class='add'>+	pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x98</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -519,7 +519,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usbotg_vbus: usbotg-vbus {</div><div class='add'>+	pinctrl_usbotg_vbus: usbotg-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x98</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi<br/>index bcf4d9c870ec..2f42c56c21f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi</a></div><div class='hunk'>@@ -500,7 +500,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usbh1_vbus: usbh1-vbus {</div><div class='add'>+	pinctrl_usbh1_vbus: usbh1-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x98</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -513,7 +513,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usbotg_vbus: usbotg-vbus {</div><div class='add'>+	pinctrl_usbotg_vbus: usbotg-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x98</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts<br/>index e1077e2da5f4..1f2200f50059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts</a></div><div class='hunk'>@@ -36,15 +36,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	/* PCIe Switch */</div><div class='del'>-	pcie-switch@58 {</div><div class='del'>-		compatible = "plx,pex8605";</div><div class='del'>-		reg = &lt;0x58&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie {</div><div class='ctx'> 	vpcie-supply = &lt;&amp;reg_pcie_switch&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts<br/>new file mode 100644<br/>index 000000000000..908dab57fd87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval-v1.2.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6q-apalis-eval-v1.2.dts"</div><div class='add'>+#include "imx6qdl-apalis-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Apalis iMX6Q/D Module V1.2+ on Apalis Evaluation Board v1.2";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts<br/>new file mode 100644<br/>index 000000000000..5463d4127382<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-eval.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6q-apalis-eval.dts"</div><div class='add'>+#include "imx6qdl-apalis-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Apalis iMX6Q/D Module V1.2+ on Apalis Evaluation Board";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts<br/>new file mode 100644<br/>index 000000000000..84eabf81ba84<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.1.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6q-apalis-ixora-v1.1.dts"</div><div class='add'>+#include "imx6qdl-apalis-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board V1.1";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts<br/>new file mode 100644<br/>index 000000000000..d7cfab4de457<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora-v1.2.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6q-apalis-ixora-v1.2.dts"</div><div class='add'>+#include "imx6qdl-apalis-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board V1.2";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts<br/>new file mode 100644<br/>index 000000000000..189b074e31ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-apalis-v1.2-ixora.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6q-apalis-ixora.dts"</div><div class='add'>+#include "imx6qdl-apalis-v1.2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts<br/>index 631d6d690959..235148c1edf1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-arm2.dts</a></div><div class='hunk'>@@ -55,114 +55,112 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6q-arm2 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpmi_nand: gpminandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_RX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_cdwp: usdhc3cdwp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_cdwp: usdhc3cdwpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi<br/>index 09d9ca0cb332..53013b12c2ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi</a></div><div class='hunk'>@@ -222,6 +222,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio7&gt;;</div><div class='ctx'> 		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		onkey {</div><div class='ctx'> 			compatible = "dlg,da9063-onkey";</div><div class='hunk'>@@ -623,7 +625,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_reset: usdhc3grp-reset {</div><div class='add'>+	pinctrl_usdhc3_reset: usdhc3-resetgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi<br/>index c1ae7c47b442..e1d0c6e123fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi</a></div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		mdio-gpio0 = &amp;mdio0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mdio0: mdio-gpio {</div><div class='add'>+	mdio0: mdio {</div><div class='ctx'> 		compatible = "virtual,mdio-gpio";</div><div class='ctx'> 		gpios = &lt;&amp;gpio2 5 GPIO_ACTIVE_HIGH&gt;, /* mdc */</div><div class='ctx'> 			&lt;&amp;gpio2 7 GPIO_ACTIVE_HIGH&gt;; /* mdio */</div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_ecspi5&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	m25_eeprom: flash@0 {</div><div class='add'>+	m25_eeprom: eeprom@0 {</div><div class='ctx'> 		compatible = "atmel,at25";</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'> 		size = &lt;0x8000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts<br/>index d4d57370615d..6efd7e9fc1b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-dhcom-pdk2.dts</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Copyright (C) 2018 Marek Vasut &lt;marex@denx.de&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * DHCOM iMX6 variant:</div><div class='del'>- * DHCM-iMX6Q-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2</div><div class='add'>+ * DHCM-iMX6Q-C080-R102-F0819-E-SD-RTC-T-HS-I-01D2</div><div class='ctx'>  * DHCOM PCB number: 493-300 or newer</div><div class='ctx'>  * PDK2 PCB number: 516-400 or newer</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts b/arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts<br/>index 16658b76fc4e..059750270fc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-display5-tianma-tm070-1280x768.dts</a></div><div class='hunk'>@@ -1,38 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017</div><div class='ctx'>  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is licensed under the terms of the GNU General Public</div><div class='del'>- *     License version 2.  This program is licensed "as is" without</div><div class='del'>- *     any warranty of any kind, whether express or implied.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi<br/>index 4ab31f2217cd..4e448b4810f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi</a></div><div class='hunk'>@@ -1,38 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017</div><div class='ctx'>  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is licensed under the terms of the GNU General Public</div><div class='del'>- *     License version 2.  This program is licensed "as is" without</div><div class='del'>- *     any warranty of any kind, whether express or implied.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts<br/>index 9f7ac7158c46..17fabff80e90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts</a></div><div class='hunk'>@@ -266,7 +266,7 @@</div><div class='ctx'> 		reg = &lt;0x4d&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: m41t62@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "st,m41t62";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -283,138 +283,136 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6q-dmo-edmqmx6 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000</div><div class='del'>-				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000</div><div class='add'>+			MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi5: ecspi5rp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi5: ecspi5rp-1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie: pciegrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pfuze: pfuze100grp1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pfuze: pfuze100grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_stmpe1: stmpe1grp {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_stmpe1: stmpe1grp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_stmpe2: stmpe2grp {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_stmpe2: stmpe2grp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts b/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts<br/>index d2d0a82ea178..484a60892229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dts</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_ecspi5&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	m25_eeprom: flash@0 {</div><div class='add'>+	m25_eeprom: eeprom@0 {</div><div class='ctx'> 		compatible = "atmel,at25256B", "atmel,at25";</div><div class='ctx'> 		spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 		size = &lt;0x8000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts<br/>index ce55c9558679..e0d29b07fbb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gk802.dts</a></div><div class='hunk'>@@ -70,58 +70,56 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6q-gk802 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Recovery button, active-low */</div><div class='del'>-				MX6QDL_PAD_EIM_D16__GPIO3_IO16  0x100b1</div><div class='del'>-				/* RTL8192CU enable GPIO, active-low */</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Recovery button, active-low */</div><div class='add'>+			MX6QDL_PAD_EIM_D16__GPIO3_IO16  0x100b1</div><div class='add'>+			/* RTL8192CU enable GPIO, active-low */</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts<br/>index c5c144879fa6..bf8fde9cb38d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts</a></div><div class='hunk'>@@ -184,7 +184,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts<br/>index 2c7feeef1b0e..44d1871ac666 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw551x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts<br/>index e9c224cea752..22842f2ef685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw553x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2016 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts<br/>index 735f2bbf1439..c69fdd064e2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts<br/>index a182e4cb0e6e..a9a33eeb9712 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts b/arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts<br/>index ca1e2ae3341e..25a93cd4e5f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dts</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts b/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts<br/>index a603562ea49a..4c8ea4381559 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-h100.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-h100.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-h100.dts</a></div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: pcf8523@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "nxp,pcf8523";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -217,120 +217,118 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	h100 {</div><div class='del'>-		pinctrl_h100_hdmi: h100-hdmi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_hdmi: h100-hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_i2c1: h100-i2c1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_i2c1: h100-i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_i2c2: h100-i2c2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_i2c2: h100-i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_leds: pinctrl-h100-leds {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA0__GPIO3_IO00		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_leds: pinctrl-h100-ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA0__GPIO3_IO00		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_reg_hdmi: h100-reg-hdmi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A18__GPIO2_IO20		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_reg_hdmi: h100-reg-hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A18__GPIO2_IO20		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_sgtl5000: h100-sgtl5000 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__AUD5_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__AUD5_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__AUD5_TXFS		0x130b0</div><div class='del'>-				MX6QDL_PAD_GPIO_5__CCM_CLKO1		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_sgtl5000: h100-sgtl5000grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__AUD5_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__AUD5_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__AUD5_TXFS		0x130b0</div><div class='add'>+			MX6QDL_PAD_GPIO_5__CCM_CLKO1		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_tc358743: h100-tc358743 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_tc358743: h100-tc358743grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_uart2: h100-uart2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_uart2: h100-uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usbh1_vbus: hummingboard-usbh1-vbus {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usbh1_vbus: hummingboard-usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usbotg_id: hummingboard-usbotg-id {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x13059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usbotg_id: hummingboard-usbotg-idgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x13059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usbotg_vbus: hummingboard-usbotg-vbus {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usbotg_vbus: hummingboard-usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usdhc2: h100-usdhc2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x13059</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usdhc2: h100-usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x13059</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usdhc2_100mhz: h100-usdhc2-100mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usdhc2_100mhz: h100-usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_h100_usdhc2_200mhz: h100-usdhc2-200mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_h100_usdhc2_200mhz: h100-usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1f071</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__SD2_VSELECT	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi<br/>index c425d427663d..d6deb8c22b8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-kp.dtsi</a></div><div class='hunk'>@@ -69,14 +69,14 @@</div><div class='ctx'> 		led-green {</div><div class='ctx'> 			label = "led1";</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-red {</div><div class='ctx'> 			label = "led0";</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts b/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts<br/>index 46a4ddedb423..86b813a57c1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts</a></div><div class='hunk'>@@ -110,13 +110,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_lcd_reg: lcdreg {</div><div class='add'>+	pinctrl_lcd_reg: lcdreggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	0x100b0	/* R_LCD_PANEL_PWR */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_lcd_reset: lcdreset {</div><div class='add'>+	pinctrl_lcd_reset: lcdresetgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_A25__GPIO5_IO02	0x100b0	/* LCD_nRESET */</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts b/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts<br/>new file mode 100644<br/>index 000000000000..ae4f8eeb105d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+//</div><div class='add'>+// Copyright 2024 Comvetia AG</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx6q-phytec-pfla02.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "COMVETIA QSoIP LXR-2";</div><div class='add'>+	compatible = "comvetia,imx6q-lxr", "phytec,imx6q-pfla02", "fsl,imx6q";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi {</div><div class='add'>+		compatible = "spi-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_spi_gpio&gt;;</div><div class='add'>+		sck-gpios = &lt;&amp;gpio5 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mosi-gpios = &lt;&amp;gpio5 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-chipselects = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		fpga@0 {</div><div class='add'>+			compatible = "altr,fpga-passive-serial";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_fpga&gt;;</div><div class='add'>+			nconfig-gpios = &lt;&amp;gpio4 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			nstat-gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			confd-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi3&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio4 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_fpga: fpgagrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_6__GPIO1_IO06       0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18     0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__GPIO4_IO19     0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spi_gpio: spigpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07  0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi<br/>index 0d7be4567291..1e5eb837fd80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-mba6.dtsi</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_ecspi5_mba6x: ecspi5grp-mba6x {</div><div class='add'>+	pinctrl_ecspi5_mba6x: ecspi5-mba6xgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */</div><div class='ctx'> 			MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b099</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts b/arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts<br/>index f08b37010291..ef5c0eda8b15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-mccmon6.dts</a></div><div class='hunk'>@@ -279,7 +279,7 @@</div><div class='ctx'> 	ranges = &lt;0 0 0x08000000 0x08000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	nor@0,0 {</div><div class='add'>+	flash@0,0 {</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='ctx'> 		reg = &lt;0 0 0x02000000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -292,8 +292,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='ctx'> 	pinctrl_backlight: dispgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* BLEN_OUT */</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts b/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts<br/>index d392b5bd2eea..24fc3ff1c70c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-novena.dts</a></div><div class='hunk'>@@ -265,7 +265,7 @@</div><div class='ctx'> 		reg = &lt;0x1c&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: pcf8523@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "nxp,pcf8523";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -288,7 +288,7 @@</div><div class='ctx'> 		vio-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> </div><div class='del'>-		stmpe_touchscreen {</div><div class='add'>+		touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			st,sample-time = &lt;4&gt;;</div><div class='ctx'> 			st,mod-12b = &lt;1&gt;;</div><div class='hunk'>@@ -530,7 +530,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_audmux_novena: audmuxgrp-novena {</div><div class='add'>+	pinctrl_audmux_novena: audmux-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='hunk'>@@ -539,7 +539,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_backlight_novena: backlightgrp-novena {</div><div class='add'>+	pinctrl_backlight_novena: backlight-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	0x1b0b1</div><div class='hunk'>@@ -547,7 +547,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_ecspi3_novena: ecspi3grp-novena {</div><div class='add'>+	pinctrl_ecspi3_novena: ecspi3-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='ctx'> 			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='hunk'>@@ -555,7 +555,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_enet_novena: enetgrp-novena {</div><div class='add'>+	pinctrl_enet_novena: enet-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='hunk'>@@ -578,7 +578,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_fpga_gpio: fpgagpiogrp-novena {</div><div class='add'>+	pinctrl_fpga_gpio: fpgagpio-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* FPGA power */</div><div class='ctx'> 			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17		0x1b0b1</div><div class='hunk'>@@ -614,7 +614,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_fpga_eim: fpgaeimgrp-novena {</div><div class='add'>+	pinctrl_fpga_eim: fpgaeim-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* FPGA power */</div><div class='ctx'> 			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17		0x1b0b1</div><div class='hunk'>@@ -650,7 +650,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_keys_novena: gpiokeysgrp-novena {</div><div class='add'>+	pinctrl_gpio_keys_novena: gpiokeys-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* User button */</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0</div><div class='hunk'>@@ -661,35 +661,35 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_hdmi_novena: hdmigrp-novena {</div><div class='add'>+	pinctrl_hdmi_novena: hdmi-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='ctx'> 			MX6QDL_PAD_EIM_A24__GPIO5_IO04		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_novena: i2c1grp-novena {</div><div class='add'>+	pinctrl_i2c1_novena: i2c1-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_novena: i2c2grp-novena {</div><div class='add'>+	pinctrl_i2c2_novena: i2c2-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c3_novena: i2c3grp-novena {</div><div class='add'>+	pinctrl_i2c3_novena: i2c3-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_kpp_novena: kppgrp-novena {</div><div class='add'>+	pinctrl_kpp_novena: kpp-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Front panel button */</div><div class='ctx'> 			MX6QDL_PAD_KEY_ROW1__KEY_ROW1		0x1b0b1</div><div class='hunk'>@@ -698,13 +698,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_novena: ledsgrp-novena {</div><div class='add'>+	pinctrl_leds_novena: leds-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD1_DAT3__GPIO1_IO21		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pcie_novena: pciegrp-novena {</div><div class='add'>+	pinctrl_pcie_novena: pcie-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Reset */</div><div class='ctx'> 			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x1b0b1</div><div class='hunk'>@@ -715,13 +715,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_sata_novena: satagrp-novena {</div><div class='add'>+	pinctrl_sata_novena: sata-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D30__GPIO3_IO30		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_senoko_novena: senokogrp-novena {</div><div class='add'>+	pinctrl_senoko_novena: senoko-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Senoko IRQ line */</div><div class='ctx'> 			MX6QDL_PAD_SD1_CLK__GPIO1_IO20		0x13048</div><div class='hunk'>@@ -730,7 +730,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_sound_novena: soundgrp-novena {</div><div class='add'>+	pinctrl_sound_novena: sound-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Audio power regulator */</div><div class='ctx'> 			MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x1b0b1</div><div class='hunk'>@@ -740,41 +740,41 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_stmpe_novena: stmpegrp-novena {</div><div class='add'>+	pinctrl_stmpe_novena: stmpe-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Touchscreen interrupt */</div><div class='ctx'> 			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_uart2_novena: uart2grp-novena {</div><div class='add'>+	pinctrl_uart2_novena: uart2-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_uart3_novena: uart3grp-novena {</div><div class='add'>+	pinctrl_uart3_novena: uart3-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_uart4_novena: uart4grp-novena {</div><div class='add'>+	pinctrl_uart4_novena: uart4-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA	0x1b0b1</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA	0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usbotg_novena: usbotggrp-novena {</div><div class='add'>+	pinctrl_usbotg_novena: usbotg-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_novena: usdhc2grp-novena {</div><div class='add'>+	pinctrl_usdhc2_novena: usdhc2-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='ctx'> 			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9</div><div class='hunk'>@@ -789,7 +789,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_novena: usdhc3grp-novena {</div><div class='add'>+	pinctrl_usdhc3_novena: usdhc3-novenagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9</div><div class='ctx'> 			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts b/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts<br/>index 8d2b608e0b90..fb81bd8ba035 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dts</a></div><div class='hunk'>@@ -546,7 +546,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_wifi_npd: wifinpd {</div><div class='add'>+	pinctrl_wifi_npd: wifinpdgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b8b0</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts<br/>index 792b8903d345..0e02e448db10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts</a></div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usb_eth_chg&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl_can1phy: can1phy {</div><div class='add'>+	pinctrl_can1phy: can1phygrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* CAN1_SR */</div><div class='ctx'> 			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x13070</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_wifi_npd: wifinpd {</div><div class='add'>+	pinctrl_wifi_npd: wifinpdgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* WL_REG_ON */</div><div class='ctx'> 			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x13069</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts b/arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts<br/>index 9054c1d58b9d..84fbcd129179 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-sbc6x.dts</a></div><div class='hunk'>@@ -25,51 +25,49 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6q-sbc6x {</div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts<br/>index ac3050a835e5..d630c572c704 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010-comtft.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -51,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;backlight {</div><div class='ctx'> 	pwms = &lt;&amp;pwm2 0 500000 0&gt;;</div><div class='del'>-	/delete-property/ turn-on-delay-ms;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts<br/>index 4ee860b626ff..01ac3493fa32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1010.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts<br/>index a773f252816c..1013025cb2d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020-comtft.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -51,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;backlight {</div><div class='ctx'> 	pwms = &lt;&amp;pwm2 0 500000 0&gt;;</div><div class='del'>-	/delete-property/ turn-on-delay-ms;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts<br/>index 0a4daec8d3ad..5dd8f1642db3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1020.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts<br/>index 9ffbb0fe7df8..ffa79c0eb05a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts<br/>index cb2fcb4896c6..1346fd663d68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1036.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts<br/>index d43a5d8f1749..eac07d5944cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-10x0-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts<br/>index f7b0acb65352..c485da35d333 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-1110.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts<br/>index 387edf2b3f96..53304fc3a90b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-tx6q-11x0-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2016-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts b/arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts<br/>index ad59b23ef27a..aae81feee00d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts</a></div><div class='hunk'>@@ -296,7 +296,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170B9</div><div class='ctx'> 			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100B9</div><div class='hunk'>@@ -307,7 +307,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170F9</div><div class='ctx'> 			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100F9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi<br/>new file mode 100644<br/>index 000000000000..83fa04fc9f18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-apalis-v1.2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/delete-node/ stmpe811@41;</div><div class='add'>+</div><div class='add'>+	ad7879_ts: touchscreen@2c {</div><div class='add'>+		compatible = "adi,ad7879-1";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touch_int&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		touchscreen-max-pressure = &lt;4096&gt;;</div><div class='add'>+		adi,resistance-plate-x = &lt;120&gt;;</div><div class='add'>+		adi,first-conversion-delay = /bits/ 8 &lt;3&gt;;</div><div class='add'>+		adi,acquisition-time = /bits/ 8 &lt;1&gt;;</div><div class='add'>+		adi,median-filter-size = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		adi,averaging = /bits/ 8 &lt;1&gt;;</div><div class='add'>+		adi,conversion-interval = /bits/ 8 &lt;255&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tla2024_adc: adc@49 {</div><div class='add'>+		compatible = "ti,tla2024";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Apalis AN1_ADC0 */</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Apalis AN1_ADC1 */</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Apalis AN1_ADC2 */</div><div class='add'>+		channel@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Apalis AN1_TSWIP_ADC3 */</div><div class='add'>+		channel@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi<br/>index edf55760a5c1..5fcd7cdb7001 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Toradex Apalis iMX6Q/D Module";</div><div class='del'>-	compatible = "toradex,apalis_imx6q", "fsl,imx6q";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc0 = &amp;usdhc3; /* eMMC */</div><div class='hunk'>@@ -108,6 +107,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	poweroff {</div><div class='add'>+		compatible = "regulator-poweroff";</div><div class='add'>+		cpu-supply = &lt;&amp;vgen2_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_module_3v3: regulator-module-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -191,7 +195,7 @@</div><div class='ctx'> 			"MIC_IN", "Mic Jack",</div><div class='ctx'> 			"Mic Jack", "Mic Bias",</div><div class='ctx'> 			"Headphone Jack", "HP_OUT";</div><div class='del'>-		model = "imx6q-apalis-sgtl5000";</div><div class='add'>+		model = "apalis-imx6";</div><div class='ctx'> 		mux-ext-port = &lt;4&gt;;</div><div class='ctx'> 		mux-int-port = &lt;1&gt;;</div><div class='ctx'> 		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='hunk'>@@ -236,10 +240,6 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;clks {</div><div class='del'>-	fsl,pmic-stby-poweroff;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Apalis SPI1 */</div><div class='ctx'> &amp;ecspi1 {</div><div class='ctx'> 	cs-gpios = &lt;&amp;gpio5 25 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -527,7 +527,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pmic: pmic@8 {</div><div class='ctx'> 		compatible = "fsl,pfuze100";</div><div class='del'>-		fsl,pmic-stby-poweroff;</div><div class='ctx'> 		reg = &lt;0x08&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='hunk'>@@ -649,7 +648,7 @@</div><div class='ctx'> 		/* ADC conversion time: 80 clocks */</div><div class='ctx'> 		st,sample-time = &lt;4&gt;;</div><div class='ctx'> </div><div class='del'>-		stmpe_ts: stmpe_touchscreen {</div><div class='add'>+		stmpe_ts: touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			/* 8 sample average control */</div><div class='ctx'> 			st,ave-ctrl = &lt;3&gt;;</div><div class='hunk'>@@ -664,10 +663,9 @@</div><div class='ctx'> 			st,settling = &lt;3&gt;;</div><div class='ctx'> 			/* 5 ms touch detect interrupt delay */</div><div class='ctx'> 			st,touch-det-delay = &lt;5&gt;;</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		stmpe_adc: stmpe_adc {</div><div class='add'>+		stmpe_adc: adc {</div><div class='ctx'> 			compatible = "st,stmpe-adc";</div><div class='ctx'> 			#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 			/* forbid to use ADC channels 3-0 (touch) */</div><div class='hunk'>@@ -691,7 +689,7 @@</div><div class='ctx'> </div><div class='ctx'> 	adv_7280: adv7280@21 {</div><div class='ctx'> 		compatible = "adi,adv7280";</div><div class='del'>-		adv,force-bt656-4;</div><div class='add'>+		adi,force-bt656-4;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_ipu1_csi0&gt;;</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi<br/>index baa197c90060..acb404c6828b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos.dtsi</a></div><div class='hunk'>@@ -179,230 +179,228 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog &amp;pinctrl_gpio&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-aristainetos {</div><div class='del'>-		pinctrl_aristainetos_usbh1_vbus: aristainetos-usbh1-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_aristainetos_usbotg_vbus: aristainetos-usbotg-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_aristainetos_usbh1_vbus: aristainetos-usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_backlight: backlightgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__PWM3_OUT	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_ecspi2: ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D24__GPIO3_IO24  0x100b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_ecspi4: ecspi4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D20__GPIO3_IO20  0x100b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER   0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_aristainetos_usbotg_vbus: aristainetos-usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan1: flexcan1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_flexcan2: flexcan2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX	0x1b0b0</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_gpio: gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__GPIO2_IO13	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_3__GPIO1_IO03	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_5__GPIO1_IO05	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_7__GPIO1_IO07	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_8__GPIO1_IO08	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_gpmi_nand: gpminandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29   0x10</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_backlight: backlightgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__PWM3_OUT	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D24__GPIO3_IO24  0x100b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi4: ecspi4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D20__GPIO3_IO20  0x100b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_ipu_disp: ipudisp1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20			0x20000</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER   0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart5: uart5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc1: usdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX	0x1b0b0</div><div class='ctx'> 			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio: gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__GPIO2_IO13	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_3__GPIO1_IO03	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_5__GPIO1_IO05	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_7__GPIO1_IO07	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_8__GPIO1_IO08	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29   0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ipu_disp: ipudisp1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__GPIO4_IO20			0x20000</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10</div><div class='ctx'> 			&gt;;</div><div class='del'>-		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi<br/>index f7fac86f0a6b..01d4ea20b13d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi</a></div><div class='hunk'>@@ -1,44 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * support for the imx6 based aristainetos2 board</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2015 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='hunk'>@@ -150,6 +114,8 @@</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'> 		interrupts = &lt;04 0x8&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			bcore1 {</div><div class='hunk'>@@ -324,8 +290,9 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		ethphy: ethernet-phy {</div><div class='add'>+		ethphy: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='ctx'> 			txd0-skew-ps = &lt;0&gt;;</div><div class='ctx'> 			txd1-skew-ps = &lt;0&gt;;</div><div class='ctx'> 			txd2-skew-ps = &lt;0&gt;;</div><div class='hunk'>@@ -413,7 +380,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpio&gt;;</div><div class='ctx'> </div><div class='del'>-	pinctrl_audmux: audmux {</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0</div><div class='hunk'>@@ -599,11 +566,11 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {</div><div class='add'>+	pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {</div><div class='add'>+	pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbusgrp {</div><div class='ctx'> 		fsl,pins = &lt;MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi<br/>new file mode 100644<br/>index 000000000000..d11bf911b728<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-colibri-v1.2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (c) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/delete-node/ stmpe811@41;</div><div class='add'>+</div><div class='add'>+	ad7879_ts: touchscreen@2c {</div><div class='add'>+		compatible = "adi,ad7879-1";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touch_int&gt;;</div><div class='add'>+		interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+		touchscreen-max-pressure = &lt;4096&gt;;</div><div class='add'>+		adi,resistance-plate-x = &lt;120&gt;;</div><div class='add'>+		adi,first-conversion-delay = /bits/ 8 &lt;3&gt;;</div><div class='add'>+		adi,acquisition-time = /bits/ 8 &lt;1&gt;;</div><div class='add'>+		adi,median-filter-size = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		adi,averaging = /bits/ 8 &lt;1&gt;;</div><div class='add'>+		adi,conversion-interval = /bits/ 8 &lt;255&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tla2024_adc: adc@49 {</div><div class='add'>+		compatible = "ti,tla2024";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Colibri AIN0 */</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Colibri AIN1 */</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Colibri AIN2 */</div><div class='add'>+		channel@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Colibri AIN3 */</div><div class='add'>+		channel@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi<br/>index b01670cdd52c..419d85b5a660 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Toradex Colibri iMX6DL/S Module";</div><div class='del'>-	compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc0 = &amp;usdhc3; /* eMMC */</div><div class='hunk'>@@ -136,7 +135,7 @@</div><div class='ctx'> 			"LINE_IN", "Line In Jack",</div><div class='ctx'> 			"MIC_IN", "Mic Jack",</div><div class='ctx'> 			"Mic Jack", "Mic Bias";</div><div class='del'>-		model = "imx6dl-colibri-sgtl5000";</div><div class='add'>+		model = "colibri-imx6";</div><div class='ctx'> 		mux-int-port = &lt;1&gt;;</div><div class='ctx'> 		mux-ext-port = &lt;5&gt;;</div><div class='ctx'> 		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='hunk'>@@ -573,7 +572,7 @@</div><div class='ctx'> 		/* ADC converstion time: 80 clocks */</div><div class='ctx'> 		st,sample-time = &lt;4&gt;;</div><div class='ctx'> </div><div class='del'>-		stmpe_ts: stmpe_touchscreen {</div><div class='add'>+		stmpe_ts: touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			/* 8 sample average control */</div><div class='ctx'> 			st,ave-ctrl = &lt;3&gt;;</div><div class='hunk'>@@ -588,7 +587,6 @@</div><div class='ctx'> 			st,settling = &lt;3&gt;;</div><div class='ctx'> 			/* 5 ms touch detect interrupt delay */</div><div class='ctx'> 			st,touch-det-delay = &lt;5&gt;;</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		stmpe_adc: stmpe_adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi<br/>index bd66430c1d78..c504cf7e9492 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-cubox-i.dtsi</a></div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_key&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-		button_0 {</div><div class='add'>+		button-0 {</div><div class='ctx'> 			label = "Button 0";</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 8 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='hunk'>@@ -153,87 +153,85 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	cubox_i {</div><div class='del'>-		pinctrl_cubox_i_hdmi: cubox-i-hdmi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_hdmi: cubox-i-hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_i2c2: cubox-i-i2c2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_i2c2: cubox-i-i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_i2c3: cubox-i-i2c3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_i2c3: cubox-i-i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_ir: cubox-i-ir {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_ir: cubox-i-irgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-ledgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_spdif: cubox-i-spdif {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_spdif: cubox-i-spdifgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usbh1: cubox-i-usbh1 {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usbh1: cubox-i-usbh1grp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usbotg: cubox-i-usbotg {</div><div class='del'>-			/*</div><div class='del'>-			 * The Cubox-i pulls ID low, but as it's pointless</div><div class='del'>-			 * leaving it as a pull-up, even if it is just 10uA.</div><div class='del'>-			 */</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usbotg: cubox-i-usbotggrp {</div><div class='add'>+		/*</div><div class='add'>+		 * The Cubox-i pulls ID low, but as it's pointless</div><div class='add'>+		 * leaving it as a pull-up, even if it is just 10uA.</div><div class='add'>+		 */</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-aux {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-auxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_cubox_i_usdhc2: cubox-i-usdhc2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_cubox_i_usdhc2: cubox-i-usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_key: gpio-key {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_key: gpio-keygrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi<br/>index 0a6c3a092b34..f560a6b7779a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi</a></div><div class='hunk'>@@ -47,103 +47,101 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-dfi-fs700-m60 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000</div><div class='del'>-				MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */</div><div class='del'>-				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_ecspi3: ecspi3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */</div><div class='add'>+			MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi3: ecspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi<br/>index 6248b126b557..d7c2b30aecfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi</a></div><div class='hunk'>@@ -56,7 +56,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='ctx'> 		button-0 {</div><div class='hunk'>@@ -144,6 +143,7 @@</div><div class='ctx'> 	panel {</div><div class='ctx'> 		backlight = &lt;&amp;display_bl&gt;;</div><div class='ctx'> 		compatible = "edt,etm0700g0edh6";</div><div class='add'>+		power-supply = &lt;&amp;reg_panel_3v3&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			lcd_panel_in: endpoint {</div><div class='hunk'>@@ -152,6 +152,25 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* Filtered supply voltage */</div><div class='add'>+	reg_pdk2_24v: regulator-pdk2-24v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;24000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;24000000&gt;;</div><div class='add'>+		regulator-name = "24V_PDK2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 560-200 U1 */</div><div class='add'>+	reg_panel_3v3: regulator-panel-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "3V3_PANEL";</div><div class='add'>+		vin-supply = &lt;&amp;reg_pdk2_24v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound {</div><div class='ctx'> 		audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='ctx'> 		audio-routing =</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi<br/>index eaa87b333164..af0d95396cd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi</a></div><div class='hunk'>@@ -256,7 +256,6 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1527272&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;787500&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;7000&gt;;</div><div class='del'>-				regulator-suspend-mem-microvolt = &lt;1040000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sw2_reg: sw2 {</div><div class='hunk'>@@ -275,7 +274,6 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1527272&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;787500&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;7000&gt;;</div><div class='del'>-				regulator-suspend-mem-microvolt = &lt;980000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sw4_reg: sw4 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi<br/>index f7e517555697..99ebd4dd63e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-ds.dtsi</a></div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_ecspi1_gpio: ecspi1grpgpiogrp {</div><div class='add'>+	pinctrl_ecspi1_gpio: ecspi1gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x1b0b0</div><div class='hunk'>@@ -349,7 +349,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc1_gpio: usdhc1grpgpiogrp {</div><div class='add'>+	pinctrl_usdhc1_gpio: usdhc1gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -366,7 +366,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi<br/>index a308a3584b62..9f4e746beb2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_emcon_wake&gt;;</div><div class='ctx'> </div><div class='del'>-		wake {</div><div class='add'>+		key-wake {</div><div class='ctx'> 			label = "Wake";</div><div class='ctx'> 			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 2 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -225,6 +225,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='ctx'> 		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		onkey {</div><div class='ctx'> 			compatible = "dlg,da9063-onkey";</div><div class='hunk'>@@ -330,7 +332,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-</div><div class='ctx'> 	pinctrl_audmux: audmuxgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD			0x130b0</div><div class='hunk'>@@ -382,79 +383,79 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio1: emcongpio1 {</div><div class='add'>+	pinctrl_emcon_gpio1: emcongpio1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D0__GPIO2_IO00			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio2: emcongpio2 {</div><div class='add'>+	pinctrl_emcon_gpio2: emcongpio2grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D1__GPIO2_IO01			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio3: emcongpio3 {</div><div class='add'>+	pinctrl_emcon_gpio3: emcongpio3grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D2__GPIO2_IO02			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio4: emcongpio4 {</div><div class='add'>+	pinctrl_emcon_gpio4: emcongpio4grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D3__GPIO2_IO03			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio5: emcongpio5 {</div><div class='add'>+	pinctrl_emcon_gpio5: emcongpio5grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D4__GPIO2_IO04			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio6: emcongpio6 {</div><div class='add'>+	pinctrl_emcon_gpio6: emcongpio6grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D5__GPIO2_IO05			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio7: emcongpio7 {</div><div class='add'>+	pinctrl_emcon_gpio7: emcongpio7grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D6__GPIO2_IO06			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_gpio8: emcongpio8 {</div><div class='add'>+	pinctrl_emcon_gpio8: emcongpio8grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_D7__GPIO2_IO07			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_irq_a: emconirqa {</div><div class='add'>+	pinctrl_emcon_irq_a: emconirqagrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07		0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_irq_b: emconirqb {</div><div class='add'>+	pinctrl_emcon_irq_b: emconirqbgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15		0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_irq_c: emconirqc {</div><div class='add'>+	pinctrl_emcon_irq_c: emconirqcgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16		0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_irq_pwr: emconirqpwr {</div><div class='add'>+	pinctrl_emcon_irq_pwr: emconirqpwrgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D23__GPIO3_IO23			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_emcon_wake: emconwake {</div><div class='add'>+	pinctrl_emcon_wake: emconwakegrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_DA2__GPIO3_IO02			0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -503,13 +504,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_irq_touch1: irqtouch1 {</div><div class='add'>+	pinctrl_irq_touch1: irqtouch1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_5__GPIO1_IO05			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_irq_touch2: irqtouch2 {</div><div class='add'>+	pinctrl_irq_touch2: irqtouch2grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -552,7 +553,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm_fan: pwmfan {</div><div class='add'>+	pinctrl_pwm_fan: pwmfangrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD4_DAT2__PWM4_OUT			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -565,7 +566,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_rgb_bl_en: rgbenable {</div><div class='add'>+	pinctrl_rgb_bl_en: rgbenablegrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD4_CMD__GPIO7_IO09			0x0b0b1</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -617,13 +618,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_spdif_in: spdifin {</div><div class='add'>+	pinctrl_spdif_in: spdifingrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_16__SPDIF_IN			0x1b0b0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_spdif_out: spdifout {</div><div class='add'>+	pinctrl_spdif_out: spdifoutgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_19__SPDIF_OUT			0x13091</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi<br/>index e75e1a5364b8..beff5a0f58ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi</a></div><div class='hunk'>@@ -24,13 +24,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -44,21 +44,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -156,6 +156,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -270,7 +271,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi<br/>index b57f4073f881..9d3ba4083216 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi</a></div><div class='hunk'>@@ -33,13 +33,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -53,21 +53,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -230,6 +230,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -350,7 +351,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi<br/>index 090c0057d117..7e84e0a52ef3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi</a></div><div class='hunk'>@@ -33,13 +33,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -53,21 +53,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -223,6 +223,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -349,7 +350,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi<br/>index 0ed6d25024a2..81394d47dd68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi</a></div><div class='hunk'>@@ -34,13 +34,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -54,21 +54,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -376,7 +376,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -770,14 +770,14 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm4_backlight: pwm4grpbacklight {</div><div class='add'>+	pinctrl_pwm4_backlight: pwm4backlightgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* LVDS_PWM J6.5 */</div><div class='ctx'> 			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm4_dio: pwm4grpdio {</div><div class='add'>+	pinctrl_pwm4_dio: pwm4diogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* DIO3 J16.4 */</div><div class='ctx'> 			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi<br/>index 29960d1cf6a0..6136a95b9259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -68,13 +26,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -88,21 +46,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -221,6 +179,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -329,7 +288,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi<br/>index 77ae611b817a..9c822ca23130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi</a></div><div class='hunk'>@@ -25,13 +25,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -45,21 +45,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -146,6 +146,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -260,7 +261,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi<br/>index c6e231de674a..552114a69f5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2016 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -66,13 +24,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -86,21 +44,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -184,6 +142,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -298,7 +257,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc: ds1672@68 {</div><div class='add'>+	rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi<br/>index d0f648938cae..ea92b2b5c50d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -92,13 +50,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -112,21 +70,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -296,6 +254,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi<br/>index 71911df881cc..b518bcb6b7a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -76,13 +34,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -96,21 +54,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -237,6 +195,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi<br/>index 716c324a7458..3df4d345da98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi</a></div><div class='hunk'>@@ -1,48 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Gateworks Corporation</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License as</div><div class='del'>- *     published by the Free Software Foundation; either version 2 of</div><div class='del'>- *     the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *     You should have received a copy of the GNU General Public</div><div class='del'>- *     License along with this file; if not, write to the Free</div><div class='del'>- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,</div><div class='del'>- *     MA 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -78,13 +36,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -98,21 +56,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -302,6 +260,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi<br/>index 955a51226eda..87fdc9e2a727 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi</a></div><div class='hunk'>@@ -24,13 +24,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -44,21 +44,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -156,6 +156,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='hunk'>@@ -270,7 +271,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ds1672@68 {</div><div class='add'>+	rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi<br/>index 453dee4d9227..099ed2f94d61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi</a></div><div class='hunk'>@@ -27,13 +27,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -47,21 +47,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -165,6 +165,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi<br/>index add700bc11cc..cbca5e58e812 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi</a></div><div class='hunk'>@@ -25,13 +25,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -45,21 +45,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi<br/>index 82f47c295b08..4e4dce5adc15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi</a></div><div class='hunk'>@@ -24,13 +24,13 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		user-pb {</div><div class='add'>+		key-user-pb {</div><div class='ctx'> 			label = "user_pb";</div><div class='ctx'> 			gpios = &lt;&amp;gsc_gpio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;BTN_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		user-pb1x {</div><div class='add'>+		key-user-pb1x {</div><div class='ctx'> 			label = "user_pb1x";</div><div class='ctx'> 			linux,code = &lt;BTN_1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -44,21 +44,21 @@</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		eeprom-wp {</div><div class='add'>+		key-eeprom-wp {</div><div class='ctx'> 			label = "eeprom_wp";</div><div class='ctx'> 			linux,code = &lt;BTN_3&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tamper {</div><div class='add'>+		key-tamper {</div><div class='ctx'> 			label = "tamper";</div><div class='ctx'> 			linux,code = &lt;BTN_4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='ctx'> 			interrupts = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		switch-hold {</div><div class='add'>+		key-switch-hold {</div><div class='ctx'> 			label = "switch_hold";</div><div class='ctx'> 			linux,code = &lt;BTN_5&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gsc&gt;;</div><div class='hunk'>@@ -141,6 +141,7 @@</div><div class='ctx'> 		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adc {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi<br/>index d1ad65ab6b72..6b737360a532 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi</a></div><div class='hunk'>@@ -223,100 +223,98 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	hummingboard {</div><div class='del'>-		pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_flexcan1: hummingboard-flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_hdmi: hummingboard-hdmi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_hdmi: hummingboard-hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_i2c1: hummingboard-i2c1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_i2c1: hummingboard-i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_i2c2: hummingboard-i2c2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_i2c2: hummingboard-i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_pcie_reset: hummingboard-pcie-resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_sgtl5000: hummingboard-sgtl5000 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0</div><div class='del'>-				MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_sgtl5000: hummingboard-sgtl5000grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0</div><div class='add'>+			MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_spdif: hummingboard-spdif {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_spdif: hummingboard-spdifgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {</div><div class='del'>-			/*</div><div class='del'>-			 * We want it pulled down for a fixed host connection.</div><div class='del'>-			 */</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-idgrp {</div><div class='add'>+		/*</div><div class='add'>+		 * We want it pulled down for a fixed host connection.</div><div class='add'>+		 */</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-auxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-		pinctrl_hummingboard_vmmc: hummingboard-vmmc {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard_usdhc2: hummingboard-usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+	pinctrl_hummingboard_vmmc: hummingboard-vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -334,7 +332,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	 pinctrl-names = "default";</div><div class='ctx'> 	 status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi<br/>index f400405381a7..c3efb001c515 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2-emmc.dtsi</a></div><div class='hunk'>@@ -42,22 +42,20 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	hummingboard2 {</div><div class='del'>-		pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi<br/>index e6017f9bf640..3069e1738ba2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi</a></div><div class='hunk'>@@ -261,258 +261,256 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	hummingboard2 {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-				/*</div><div class='del'>-				 * 36 pin headers GPIO description. The pins</div><div class='del'>-				 * numbering as following -</div><div class='del'>-				 *</div><div class='del'>-				 * 	3.2v	5v	74	75</div><div class='del'>-				 *	73	72	71	70</div><div class='del'>-				 *	69	68	67	66</div><div class='del'>-				 *</div><div class='del'>-				 *	77	78	79	76</div><div class='del'>-				 *	65	64	61	60</div><div class='del'>-				 *	53	52	51	50</div><div class='del'>-				 *	49	48	166	132</div><div class='del'>-				 *	95	94	90	91</div><div class='del'>-				 *	GND	54	24	204</div><div class='del'>-				 *</div><div class='del'>-				 * The GPIO numbers can be extracted using</div><div class='del'>-				 * signal name from below.</div><div class='del'>-				 * Example -</div><div class='del'>-				 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is</div><div class='del'>-				 * GPIO(3,10) which is (3-1)*32+10 = gpio 74</div><div class='del'>-				 *</div><div class='del'>-				 * i.e. The mapping of GPIO(X,Y) to Linux gpio</div><div class='del'>-				 * number is : gpio number = (X-1) * 32 + Y</div><div class='del'>-				 */</div><div class='del'>-				/* DI1_PIN15 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1</div><div class='del'>-				/* DI1_PIN02 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1</div><div class='del'>-				/* DISP1_DATA00 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1</div><div class='del'>-				/* DISP1_DATA01 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1</div><div class='del'>-				/* DISP1_DATA02 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1</div><div class='del'>-				/* DISP1_DATA03 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1</div><div class='del'>-				/* DISP1_DATA04 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1</div><div class='del'>-				/* DISP1_DATA05 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1</div><div class='del'>-				/* DISP1_DATA06 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1</div><div class='del'>-				/* DISP1_DATA07 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1</div><div class='del'>-				/* DI1_D0_CS */</div><div class='del'>-				MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1</div><div class='del'>-				/* DI1_D1_CS */</div><div class='del'>-				MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1</div><div class='del'>-				/* DI1_PIN01 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1</div><div class='del'>-				/* DI1_PIN03 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1</div><div class='del'>-				/* DISP1_DATA08 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1</div><div class='del'>-				/* DISP1_DATA09 */</div><div class='del'>-				MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1</div><div class='del'>-				/* DISP1_DATA10 */</div><div class='del'>-				MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1</div><div class='del'>-				/* DISP1_DATA11 */</div><div class='del'>-				MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1</div><div class='del'>-				/* DISP1_DATA12 */</div><div class='del'>-				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1</div><div class='del'>-				/* DISP1_DATA13 */</div><div class='del'>-				MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1</div><div class='del'>-				/* DISP1_DATA14 */</div><div class='del'>-				MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1</div><div class='del'>-				/* DISP1_DATA15 */</div><div class='del'>-				MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1</div><div class='del'>-				/* DISP1_DATA16 */</div><div class='del'>-				MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1</div><div class='del'>-				/* DISP1_DATA17 */</div><div class='del'>-				MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1</div><div class='del'>-				/* DISP1_DATA18 */</div><div class='del'>-				MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1</div><div class='del'>-				/* DISP1_DATA19 */</div><div class='del'>-				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1</div><div class='del'>-				/* DISP1_DATA20 */</div><div class='del'>-				MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1</div><div class='del'>-				/* DISP1_DATA21 */</div><div class='del'>-				MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1</div><div class='del'>-				/* DISP1_DATA22 */</div><div class='del'>-				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1</div><div class='del'>-				/* DISP1_DATA23 */</div><div class='del'>-				MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1</div><div class='del'>-				/* DI1_DISP_CLK */</div><div class='del'>-				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1</div><div class='del'>-				/* SPDIF_IN */</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1</div><div class='del'>-				/* SPDIF_OUT */</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1</div><div class='del'>-</div><div class='del'>-				/* MikroBUS GPIO pin number 10 */</div><div class='del'>-				MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+			/*</div><div class='add'>+			 * 36 pin headers GPIO description. The pins</div><div class='add'>+			 * numbering as following -</div><div class='add'>+			 *</div><div class='add'>+			 * 	3.2v	5v	74	75</div><div class='add'>+			 *	73	72	71	70</div><div class='add'>+			 *	69	68	67	66</div><div class='add'>+			 *</div><div class='add'>+			 *	77	78	79	76</div><div class='add'>+			 *	65	64	61	60</div><div class='add'>+			 *	53	52	51	50</div><div class='add'>+			 *	49	48	166	132</div><div class='add'>+			 *	95	94	90	91</div><div class='add'>+			 *	GND	54	24	204</div><div class='add'>+			 *</div><div class='add'>+			 * The GPIO numbers can be extracted using</div><div class='add'>+			 * signal name from below.</div><div class='add'>+			 * Example -</div><div class='add'>+			 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is</div><div class='add'>+			 * GPIO(3,10) which is (3-1)*32+10 = gpio 74</div><div class='add'>+			 *</div><div class='add'>+			 * i.e. The mapping of GPIO(X,Y) to Linux gpio</div><div class='add'>+			 * number is : gpio number = (X-1) * 32 + Y</div><div class='add'>+			 */</div><div class='add'>+			/* DI1_PIN15 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1</div><div class='add'>+			/* DI1_PIN02 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1</div><div class='add'>+			/* DISP1_DATA00 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1</div><div class='add'>+			/* DISP1_DATA01 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1</div><div class='add'>+			/* DISP1_DATA02 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1</div><div class='add'>+			/* DISP1_DATA03 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1</div><div class='add'>+			/* DISP1_DATA04 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1</div><div class='add'>+			/* DISP1_DATA05 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1</div><div class='add'>+			/* DISP1_DATA06 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1</div><div class='add'>+			/* DISP1_DATA07 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1</div><div class='add'>+			/* DI1_D0_CS */</div><div class='add'>+			MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1</div><div class='add'>+			/* DI1_D1_CS */</div><div class='add'>+			MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1</div><div class='add'>+			/* DI1_PIN01 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1</div><div class='add'>+			/* DI1_PIN03 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1</div><div class='add'>+			/* DISP1_DATA08 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1</div><div class='add'>+			/* DISP1_DATA09 */</div><div class='add'>+			MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1</div><div class='add'>+			/* DISP1_DATA10 */</div><div class='add'>+			MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1</div><div class='add'>+			/* DISP1_DATA11 */</div><div class='add'>+			MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1</div><div class='add'>+			/* DISP1_DATA12 */</div><div class='add'>+			MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1</div><div class='add'>+			/* DISP1_DATA13 */</div><div class='add'>+			MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1</div><div class='add'>+			/* DISP1_DATA14 */</div><div class='add'>+			MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1</div><div class='add'>+			/* DISP1_DATA15 */</div><div class='add'>+			MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1</div><div class='add'>+			/* DISP1_DATA16 */</div><div class='add'>+			MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1</div><div class='add'>+			/* DISP1_DATA17 */</div><div class='add'>+			MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1</div><div class='add'>+			/* DISP1_DATA18 */</div><div class='add'>+			MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1</div><div class='add'>+			/* DISP1_DATA19 */</div><div class='add'>+			MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1</div><div class='add'>+			/* DISP1_DATA20 */</div><div class='add'>+			MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1</div><div class='add'>+			/* DISP1_DATA21 */</div><div class='add'>+			MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1</div><div class='add'>+			/* DISP1_DATA22 */</div><div class='add'>+			MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1</div><div class='add'>+			/* DISP1_DATA23 */</div><div class='add'>+			MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1</div><div class='add'>+			/* DI1_DISP_CLK */</div><div class='add'>+			MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1</div><div class='add'>+			/* SPDIF_IN */</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1</div><div class='add'>+			/* SPDIF_OUT */</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1</div><div class='add'>+</div><div class='add'>+			/* MikroBUS GPIO pin number 10 */</div><div class='add'>+			MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x000b1 /* CS */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x000b1 /* CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_hdmi: hummingboard2-hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_i2c1: hummingboard2-i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_i2c2: hummingboard2-i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_i2c3: hummingboard2-i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_mipi: hummingboard2_mipi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_mipi: hummingboard2_mipigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0</div><div class='del'>-				MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0</div><div class='add'>+			MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {</div><div class='del'>-			/*</div><div class='del'>-			 * We want it pulled down for a fixed host connection.</div><div class='del'>-			 */</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-idgrp {</div><div class='add'>+		/*</div><div class='add'>+		 * We want it pulled down for a fixed host connection.</div><div class='add'>+		 */</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-auxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_vmmc: hummingboard2-vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hummingboard2_uart3: hummingboard2-uart3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_RX_DATA	0x40013000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hummingboard2_uart3: hummingboard2-uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_RX_DATA	0x40013000</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi<br/>index 99b5e78458aa..c771f87b10df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi</a></div><div class='hunk'>@@ -728,7 +728,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_wdog1: wdog1rp {</div><div class='add'>+	pinctrl_wdog1: wdog1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_GPIO_9__WDOG1_B	0x1b0b0</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi<br/>index 60aa1e947f62..ee2c6bec92e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi</a></div><div class='hunk'>@@ -106,11 +106,25 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_mba6_3p3v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x14000000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x10000000 0x20000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_audmux&gt;;</div><div class='del'>-		model = "imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='ctx'> 		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic32x4&gt;;</div><div class='ctx'> 		audio-asrc = &lt;&amp;asrc&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi<br/>index a30cf0d06206..8d471450d5c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi</a></div><div class='hunk'>@@ -57,13 +57,13 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;102&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;158&gt;;</div><div class='hunk'>@@ -276,205 +276,203 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_j10&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_j28&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6dl-nit6xlite {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				/* Phy reset */</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			/* Phy reset */</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio-keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Home Button: J14 pin 5 */</div><div class='del'>-				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='del'>-				/* Back Button: J14 pin 7 */</div><div class='del'>-				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio-keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Home Button: J14 pin 5 */</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='add'>+			/* Back Button: J14 pin 7 */</div><div class='add'>+			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1</div><div class='del'>-				/* Touch IRQ: J7 pin 4 */</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='del'>-				/* tcs2004 IRQ */</div><div class='del'>-				MX6QDL_PAD_EIM_LBA__GPIO2_IO27	0x1b0b0</div><div class='del'>-				/* tsc2004 reset */</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x0b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1</div><div class='add'>+			/* Touch IRQ: J7 pin 4 */</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='add'>+			/* tcs2004 IRQ */</div><div class='add'>+			MX6QDL_PAD_EIM_LBA__GPIO2_IO27	0x1b0b0</div><div class='add'>+			/* tsc2004 reset */</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_j10: j10grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Broadcom WiFi module pins */</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x0b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_j10: j10grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Broadcom WiFi module pins */</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x0b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_j28: j28grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_j28: j28grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_leds: ledsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x0b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x030b0</div><div class='del'>-				MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x0b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_leds: ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x0b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x030b0</div><div class='add'>+			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x0b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_rtc: rtcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_sgtl5000: sgtl5000grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0</div><div class='del'>-				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_sgtl5000: sgtl5000grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi<br/>index 33174febf410..c727aac257f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi</a></div><div class='hunk'>@@ -86,45 +86,45 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		menu {</div><div class='add'>+		key-menu {</div><div class='ctx'> 			label = "Menu";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_MENU&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2mux {</div><div class='add'>+	i2c-mux-2 {</div><div class='ctx'> 		compatible = "i2c-mux-gpio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_i2c2mux&gt;;</div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c3mux {</div><div class='add'>+	i2c-mux-3 {</div><div class='ctx'> 		compatible = "i2c-mux-gpio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_i2c3mux&gt;;</div><div class='hunk'>@@ -411,287 +411,285 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6q-nitrogen6-max {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can_xcvr: can-xcvrgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Flexcan XCVR enable */</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can_xcvr: can-xcvrgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Flexcan XCVR enable */</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				/* Phy reset */</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			/* Phy reset */</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio-keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Power Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='del'>-				/* Menu Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='del'>-				/* Home Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='del'>-				/* Back Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='del'>-				/* Volume Up Button */</div><div class='del'>-				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='del'>-				/* Volume Down Button */</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio-keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Power Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='add'>+			/* Menu Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='add'>+			/* Home Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='add'>+			/* Back Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='add'>+			/* Volume Up Button */</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='add'>+			/* Volume Down Button */</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2mux: i2c2muxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* ov5642 camera i2c enable */</div><div class='del'>-				MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x000b0</div><div class='del'>-				/* ov5640_mipi camera i2c enable */</div><div class='del'>-				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2mux: i2c2muxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* ov5642 camera i2c enable */</div><div class='add'>+			MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x000b0</div><div class='add'>+			/* ov5640_mipi camera i2c enable */</div><div class='add'>+			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3mux: i2c3muxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* PCIe I2C enable */</div><div class='del'>-				MX6QDL_PAD_EIM_OE__GPIO2_IO25	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3mux: i2c3muxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* PCIe I2C enable */</div><div class='add'>+			MX6QDL_PAD_EIM_OE__GPIO2_IO25	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_j15: j15grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_j15: j15grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie: pciegrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* PCIe reset */</div><div class='del'>-				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* PCIe reset */</div><div class='add'>+			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm2: pwm2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__PWM2_OUT	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__PWM2_OUT	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__PWM3_OUT	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_rv4162: rv4162grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_rv4162: rv4162grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__GPIO4_IO06	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_sgtl5000: sgtl5000grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0</div><div class='del'>-				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_sgtl5000: sgtl5000grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart5: uart5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x130b1</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x030b1</div><div class='del'>-				/* RS485 RX Enable: pull up */</div><div class='del'>-				MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x1b0b1</div><div class='del'>-				/* RS485 DEN: pull down */</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b1</div><div class='del'>-				/* RS485/!RS232 Select: pull down (rs232) */</div><div class='del'>-				MX6QDL_PAD_EIM_CS1__GPIO2_IO24		0x030b1</div><div class='del'>-				/* ON: pull down */</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x030b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x130b1</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x030b1</div><div class='add'>+			/* RS485 RX Enable: pull up */</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x1b0b1</div><div class='add'>+			/* RS485 DEN: pull down */</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b1</div><div class='add'>+			/* RS485/!RS232 Select: pull down (rs232) */</div><div class='add'>+			MX6QDL_PAD_EIM_CS1__GPIO2_IO24		0x030b1</div><div class='add'>+			/* ON: pull down */</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x030b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x0b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x100b0</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x100b0</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi<br/>index 8e64314fa8b2..806af7f60419 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi</a></div><div class='hunk'>@@ -47,38 +47,38 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		menu {</div><div class='add'>+		key-menu {</div><div class='ctx'> 			label = "Menu";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_MENU&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi<br/>index 121177273dd0..c71aa7498acf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi</a></div><div class='hunk'>@@ -80,38 +80,38 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		menu {</div><div class='add'>+		key-menu {</div><div class='ctx'> 			label = "Menu";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_MENU&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='hunk'>@@ -343,231 +343,229 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6q-nitrogen6x {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* SGTL5000 sys_mclk */</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* SGTL5000 sys_mclk */</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can_xcvr: can-xcvrgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Flexcan XCVR enable */</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can_xcvr: can-xcvrgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Flexcan XCVR enable */</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				/* Phy reset */</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x000b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			/* Phy reset */</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x000b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio-keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Power Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='del'>-				/* Menu Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='del'>-				/* Home Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='del'>-				/* Back Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='del'>-				/* Volume Up Button */</div><div class='del'>-				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='del'>-				/* Volume Down Button */</div><div class='del'>-				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio-keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Power Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='add'>+			/* Menu Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='add'>+			/* Home Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='add'>+			/* Back Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='add'>+			/* Volume Up Button */</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='add'>+			/* Volume Down Button */</div><div class='add'>+			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_j15: j15grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_j15: j15grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wlan_vmmc: wlan-vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x100b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x000b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x000b0</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi<br/>index 037b60197598..fc78acc9f5c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi</a></div><div class='hunk'>@@ -13,14 +13,14 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 28 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sleep {</div><div class='add'>+		key-sleep {</div><div class='ctx'> 			label = "Sleep Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio6 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='hunk'>@@ -35,19 +35,19 @@</div><div class='ctx'> </div><div class='ctx'> 		user-led1 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		user-led2 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		user-led3 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi<br/>index 84f884d6e55b..08b2dd06580a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-wlbt-05.dtsi</a></div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_uart3_bt: uart3grp-bt {</div><div class='add'>+	pinctrl_uart3_bt: uart3-btgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='ctx'> 			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_wl: usdhc3grp-wl {</div><div class='add'>+	pinctrl_usdhc3_wl: usdhc3-wlgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='ctx'> 			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi<br/>index 0b4c09b09c03..a3c2811e9c6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi</a></div><div class='hunk'>@@ -162,7 +162,7 @@</div><div class='ctx'> 		interrupts = &lt;12 IRQ_TYPE_NONE&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		stmpe_touchscreen {</div><div class='add'>+		touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			st,sample-time = &lt;4&gt;;</div><div class='ctx'> 			st,mod-12b = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi<br/>index c0c47adc5866..aa9a442852f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi</a></div><div class='hunk'>@@ -227,170 +227,168 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6q-phytec-pfla02 {</div><div class='del'>-		pinctrl_ecspi3: ecspi3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x80000000 /* CS0 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi3: ecspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x80000000 /* CS0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x80000000 /* Reset GPIO */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x80000000 /* Reset GPIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan1: flexcan1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpmi_nand: gpminandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_leds: ledsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000 /* Green LED */</div><div class='del'>-				MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x80000000 /* Red LED */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_leds: ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000 /* Green LED */</div><div class='add'>+			MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x80000000 /* Red LED */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie: pciegrp {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pmic: pmicgrp {</div><div class='del'>-			fsl,pins = &lt;MX6QDL_PAD_SD4_DAT1__GPIO2_IO09	0x80000000&gt;; /* PMIC interrupt */</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;MX6QDL_PAD_SD4_DAT1__GPIO2_IO09	0x80000000&gt;; /* PMIC interrupt */</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D30__UART3_CTS_B		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D30__UART3_CTS_B		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1_vbus: usbh1vbusgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1_vbus: usbh1vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_cdwp: usdhc3cdwp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_cdwp: usdhc3cdwpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	0x130b0</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	0x110b0</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	0x130b0</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	0x130b0</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	0x110b0</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	0x130b0</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi<br/>index eba698d04243..22d5918ee4d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-rex.dtsi</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> </div><div class='ctx'> 	reg_usbh1_vbus: regulator-usbh1-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		regulator-name = "usbh1_vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -33,7 +32,6 @@</div><div class='ctx'> </div><div class='ctx'> 	reg_usb_otg_vbus: regulator-otg-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		regulator-name = "usb_otg_vbus";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -154,159 +152,157 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-rex {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* SGTL5000 sys_mclk */</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x030b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* SGTL5000 sys_mclk */</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x030b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi2: ecspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='del'>-				/* CS */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1</div><div class='add'>+			/* CS */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26	0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi3: ecspi3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	0x100b1</div><div class='del'>-				/* CS */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi3: ecspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK	0x100b1</div><div class='add'>+			/* CS */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-				/* Phy reset */</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+			/* Phy reset */</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_led: ledgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* user led */</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_led: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* user led */</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pca9535: pca9535grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x17059</div><div class='del'>-		   &gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pca9535: pca9535grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x17059</div><div class='add'>+	   &gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D31__GPIO3_IO31		0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-				MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b0b0</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b0b0</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				/* CD */</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='del'>-				/* WP */</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1f0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			/* CD */</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='add'>+			/* WP */</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1f0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				/* CD */</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0</div><div class='del'>-				/* WP */</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1f0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			/* CD */</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0</div><div class='add'>+			/* WP */</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1f0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi<br/>index 35b6bec7a3fa..b9dde0af3b99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi</a></div><div class='hunk'>@@ -32,35 +32,35 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		program {</div><div class='add'>+		key-program {</div><div class='ctx'> 			label = "Program";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_PROGRAM&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='hunk'>@@ -472,312 +472,310 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-sabreauto {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000</div><div class='del'>-				MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000</div><div class='add'>+			MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1_cs: ecspi1cs {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1_cs: ecspi1csgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_egalax_int: egalax-intgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_egalax_int: egalax-intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esai: esaigrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030</div><div class='del'>-				MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esai: esaigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030</div><div class='add'>+			MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan1: flexcan1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan2: flexcan2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpiokeysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__GPIO1_IO11		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__GPIO2_IO12		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__GPIO2_IO15		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__GPIO1_IO11		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__GPIO2_IO12		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__GPIO2_IO15		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_leds: gpioledsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_leds: gpioledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpmi_nand: gpminandgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hdmi_cec: hdmicecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hdmi_cec: hdmicecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__I2C2_SCL	0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3mux: i2c3muxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3mux: i2c3muxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_max7310: max7310grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_max7310: max7310grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_mma8451_int: mma8451intgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_mma8451_int: mma8451intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpt_input_capture0: gptinputcapture0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpt_input_capture0: gptinputcapture0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpt_input_capture1: gptinputcapture1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpt_input_capture1: gptinputcapture1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_spdif: spdifgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170b9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170b9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170f9</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x170f9</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_weim_cs0: weimcs0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_weim_cs0: weimcs0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_CS0__EIM_CS0_B		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_weim_nor: weimnorgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B		0xb060</div><div class='del'>-				MX6QDL_PAD_EIM_D16__EIM_DATA16		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D17__EIM_DATA17		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D18__EIM_DATA18		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D19__EIM_DATA19		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D20__EIM_DATA20		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D21__EIM_DATA21		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D22__EIM_DATA22		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D23__EIM_DATA23		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D24__EIM_DATA24		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D25__EIM_DATA25		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D26__EIM_DATA26		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D27__EIM_DATA27		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D28__EIM_DATA28		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D29__EIM_DATA29		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D30__EIM_DATA30		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D31__EIM_DATA31		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_A23__EIM_ADDR23		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A22__EIM_ADDR22		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A21__EIM_ADDR21		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A20__EIM_ADDR20		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A19__EIM_ADDR19		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A18__EIM_ADDR18		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A17__EIM_ADDR17		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_A16__EIM_ADDR16		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1</div><div class='del'>-				MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_weim_nor: weimnorgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_OE__EIM_OE_B		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_RW__EIM_RW		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B		0xb060</div><div class='add'>+			MX6QDL_PAD_EIM_D16__EIM_DATA16		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D17__EIM_DATA17		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D18__EIM_DATA18		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D19__EIM_DATA19		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D20__EIM_DATA20		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D21__EIM_DATA21		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D22__EIM_DATA22		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D23__EIM_DATA23		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D24__EIM_DATA24		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D25__EIM_DATA25		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D26__EIM_DATA26		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D27__EIM_DATA27		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D28__EIM_DATA28		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D29__EIM_DATA29		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D30__EIM_DATA30		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D31__EIM_DATA31		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_A23__EIM_ADDR23		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A22__EIM_ADDR22		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A21__EIM_ADDR21		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A20__EIM_ADDR20		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A19__EIM_ADDR19		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A18__EIM_ADDR18		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A17__EIM_ADDR17		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_A16__EIM_ADDR16		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA15__EIM_AD15		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA14__EIM_AD14		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA13__EIM_AD13		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA12__EIM_AD12		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA11__EIM_AD11		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA10__EIM_AD10		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__EIM_AD09		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA8__EIM_AD08		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA7__EIM_AD07		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA6__EIM_AD06		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA5__EIM_AD05		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA4__EIM_AD04		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA3__EIM_AD03		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA2__EIM_AD02		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA1__EIM_AD01		0xb0b1</div><div class='add'>+			MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -856,7 +854,7 @@</div><div class='ctx'> 	ranges = &lt;0 0 0x08000000 0x08000000&gt;;</div><div class='ctx'> 	status = "disabled"; /* pin conflict with SPI NOR */</div><div class='ctx'> </div><div class='del'>-	nor@0,0 {</div><div class='add'>+	flash@0,0 {</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='ctx'> 		reg = &lt;0 0 0x02000000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi<br/>index 9c502bf77d0b..f7abc17c7c93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabrelite.dtsi</a></div><div class='hunk'>@@ -108,38 +108,38 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		menu {</div><div class='add'>+		key-menu {</div><div class='ctx'> 			label = "Menu";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_MENU&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		home {</div><div class='add'>+		key-home {</div><div class='ctx'> 			label = "Home";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_HOME&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='hunk'>@@ -389,243 +389,241 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6q-sabrelite {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* SGTL5000 sys_mclk */</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* SGTL5000 sys_mclk */</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_can_xcvr: can-xcvrgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Flexcan XCVR enable */</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can_xcvr: can-xcvrgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Flexcan XCVR enable */</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1	/* CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				/* Phy reset */</div><div class='del'>-				MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			/* Phy reset */</div><div class='add'>+			MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio-keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Power Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='del'>-				/* Menu Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='del'>-				/* Home Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='del'>-				/* Back Button */</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='del'>-				/* Volume Up Button */</div><div class='del'>-				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='del'>-				/* Volume Down Button */</div><div class='del'>-				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio-keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Power Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0</div><div class='add'>+			/* Menu Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0</div><div class='add'>+			/* Home Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0</div><div class='add'>+			/* Back Button */</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0</div><div class='add'>+			/* Volume Up Button */</div><div class='add'>+			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0</div><div class='add'>+			/* Volume Down Button */</div><div class='add'>+			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_j15: j15grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_j15: j15grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5640: ov5640grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__GPIO2_IO05   0x000b0</div><div class='del'>-				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5640: ov5640grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__GPIO2_IO05   0x000b0</div><div class='add'>+			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5642: ov5642grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x130b0</div><div class='del'>-				MX6QDL_PAD_GPIO_3__CCM_CLKO2    0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5642: ov5642grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_8__GPIO1_IO08   0x130b0</div><div class='add'>+			MX6QDL_PAD_GPIO_3__CCM_CLKO2    0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm4: pwm4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh1: usbh1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh1: usbh1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0</div><div class='del'>-				/* power enable, high active */</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__USB_OTG_OC	0x1b0b0</div><div class='add'>+			/* power enable, high active */</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0	/* WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0	/* CD */</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0	/* WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi<br/>index 8f4f5fba68cc..e8368c6b27ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi</a></div><div class='hunk'>@@ -71,21 +71,21 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -113,8 +113,8 @@</div><div class='ctx'> 			"DMICDAT", "DMIC";</div><div class='ctx'> 		mux-int-port = &lt;2&gt;;</div><div class='ctx'> 		mux-ext-port = &lt;3&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio7 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		mic-det-gpio = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio7 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		mic-det-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='hunk'>@@ -480,251 +480,247 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-sabresd {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0</div><div class='del'>-				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0</div><div class='add'>+			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio_keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio_keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hdmi_cec: hdmicecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hdmi_cec: hdmicecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hp: hpgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hp: hpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__GPIO1_IO18		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__GPIO1_IO18		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D16__GPIO3_IO16		0xb0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D16__GPIO3_IO16		0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ipu1_csi0: ipu1csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5640: ov5640grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__GPIO1_IO20  0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5640: ov5640grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__GPIO1_IO20  0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5642: ov5642grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5642: ov5642grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie: pciegrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie_reg: pciereggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie_reg: pciereggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_sensors_reg: sensorsreggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_sensors_reg: sensorsreggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wdog: wdoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__WDOG2_B		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__WDOG2_B		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gpio_leds {</div><div class='del'>-		pinctrl_gpio_leds: gpioledsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_leds: gpioledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -808,6 +804,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usbotg&gt;;</div><div class='ctx'> 	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi<br/>index 6823a639ed2f..2daf2b6af884 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-savageboard.dtsi</a></div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi<br/>index 234827e554d0..60e446ba8f52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-solidsense.dtsi</a></div><div class='hunk'>@@ -93,49 +93,47 @@</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;, &lt;&amp;pinctrl_solidsense_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	solidsense {</div><div class='del'>-		pinctrl_solidsense_hog: solidsense-hog {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Nordic RESET_N */</div><div class='del'>-				MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x400130b1</div><div class='del'>-				/* Nordic Chip 1 SWDIO - GPIO 125 */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x400130b1</div><div class='del'>-				/* Nordic Chip 1 SWDCLK - GPIO 59 */</div><div class='del'>-				/* already claimed in the HB2 hogs */</div><div class='del'>-				/* MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1 */</div><div class='del'>-				/* Nordic Chip 2 SWDIO - GPIO 81 */</div><div class='del'>-				MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x400130b1</div><div class='del'>-				/* Nordic Chip 2 SWCLK - GPIO 82 */</div><div class='del'>-				MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x400130b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_solidsense_hog: solidsense-hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Nordic RESET_N */</div><div class='add'>+			MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x400130b1</div><div class='add'>+			/* Nordic Chip 1 SWDIO - GPIO 125 */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x400130b1</div><div class='add'>+			/* Nordic Chip 1 SWDCLK - GPIO 59 */</div><div class='add'>+			/* already claimed in the HB2 hogs */</div><div class='add'>+			/* MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1 */</div><div class='add'>+			/* Nordic Chip 2 SWDIO - GPIO 81 */</div><div class='add'>+			MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x400130b1</div><div class='add'>+			/* Nordic Chip 2 SWCLK - GPIO 82 */</div><div class='add'>+			MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x400130b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_solidsense_leds: solidsense-leds {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* Red LED 1 - GPIO 58 */</div><div class='del'>-				MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x400130b1</div><div class='del'>-				/* Green LED 1 - GPIO 55 */</div><div class='del'>-				MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x400130b1</div><div class='del'>-				/* Red LED 2 - GPIO 57 */</div><div class='del'>-				MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x400130b1</div><div class='del'>-				/* Green LED 2 - GPIO 56 */</div><div class='del'>-				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x400130b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_solidsense_leds: solidsense-ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Red LED 1 - GPIO 58 */</div><div class='add'>+			MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x400130b1</div><div class='add'>+			/* Green LED 1 - GPIO 55 */</div><div class='add'>+			MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x400130b1</div><div class='add'>+			/* Red LED 2 - GPIO 57 */</div><div class='add'>+			MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x400130b1</div><div class='add'>+			/* Green LED 2 - GPIO 56 */</div><div class='add'>+			MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x400130b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_solidsense_uart2: solidsense-uart2 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_solidsense_uart2: solidsense-uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_solidsense_uart3: solidsense-uart3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_solidsense_uart3: solidsense-uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi<br/>index b55af61dfeca..e491f5c9d455 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-brcm.dtsi</a></div><div class='hunk'>@@ -70,55 +70,53 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	microsom {</div><div class='del'>-		pinctrl_microsom_brcm_bt: microsom-brcm-bt {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_brcm_bt: microsom-brcm-btgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_brcm_osc: microsom-brcm-osc {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_brcm_osc: microsom-brcm-oscgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_brcm_reg: microsom-brcm-reg {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_brcm_reg: microsom-brcm-reggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_brcm_wifi: microsom-brcm-wifigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_uart4: microsom-uart4 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_uart4: microsom-uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_usdhc1: microsom-usdhc1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_usdhc1: microsom-usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi<br/>index 5f3b8baab20f..ddca24414d26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-emmc.dtsi</a></div><div class='hunk'>@@ -40,22 +40,20 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	microsom {</div><div class='del'>-		pinctrl_microsom_usdhc3: microsom-usdhc3 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_usdhc3: microsom-usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi<br/>index 352ac585ca6b..cd1e682f11ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi</a></div><div class='hunk'>@@ -76,56 +76,54 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	microsom {</div><div class='del'>-		pinctrl_microsom_ti_bt: microsom-ti-bt {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* BT_EN_SOC */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_ti_bt: microsom-ti-btgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* BT_EN_SOC */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_ti_clk: microsom-ti-clk {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* EXT_32K */</div><div class='del'>-				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0</div><div class='del'>-				/* WL_XTAL_PU (unrouted) */</div><div class='del'>-				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_ti_clk: microsom-ti-clkgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* EXT_32K */</div><div class='add'>+			MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0</div><div class='add'>+			/* WL_XTAL_PU (unrouted) */</div><div class='add'>+			MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* WLAN_EN_SOC */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-engrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* WLAN_EN_SOC */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				/* WLAN_IRQ */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* WLAN_IRQ */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_uart4: microsom-uart4 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_uart4: microsom-uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_usdhc1: microsom-usdhc1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_usdhc1: microsom-usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi<br/>index ce543e325cd3..7af74b203e39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som.dtsi</a></div><div class='hunk'>@@ -97,57 +97,55 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	microsom {</div><div class='del'>-		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				/* AR8035 reset */</div><div class='del'>-				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0</div><div class='del'>-				/* AR8035 interrupt */</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0</div><div class='del'>-				/* GPIO16 -&gt; AR8035 25MHz */</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x13030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				/* AR8035 CLK_25M --&gt; ENET_REF_CLK (V22) */</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1</div><div class='del'>-				/* AR8035 pin strapping: IO voltage: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				/* AR8035 pin strapping: PHYADDR#0: pull down */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030</div><div class='del'>-				/* AR8035 pin strapping: PHYADDR#1: pull down */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030</div><div class='del'>-				/* AR8035 pin strapping: MODE#1: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				/* AR8035 pin strapping: MODE#3: pull up */</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				/* AR8035 pin strapping: MODE#0: pull down */</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030</div><div class='add'>+	pinctrl_microsom_enet_ar8035: microsom-enet-ar8035grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			/* AR8035 reset */</div><div class='add'>+			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0</div><div class='add'>+			/* AR8035 interrupt */</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0</div><div class='add'>+			/* GPIO16 -&gt; AR8035 25MHz */</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x13030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			/* AR8035 CLK_25M --&gt; ENET_REF_CLK (V22) */</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1</div><div class='add'>+			/* AR8035 pin strapping: IO voltage: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			/* AR8035 pin strapping: PHYADDR#0: pull down */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030</div><div class='add'>+			/* AR8035 pin strapping: PHYADDR#1: pull down */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030</div><div class='add'>+			/* AR8035 pin strapping: MODE#1: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			/* AR8035 pin strapping: MODE#3: pull up */</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			/* AR8035 pin strapping: MODE#0: pull down */</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030</div><div class='ctx'> </div><div class='del'>-				/*</div><div class='del'>-				 * As the RMII pins are also connected to RGMII</div><div class='del'>-				 * so that an AR8030 can be placed, set these</div><div class='del'>-				 * to high-z with the same pulls as above.</div><div class='del'>-				 * Use the GPIO settings to avoid changing the</div><div class='del'>-				 * input select registers.</div><div class='del'>-				 */</div><div class='del'>-				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000</div><div class='del'>-				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+			/*</div><div class='add'>+			 * As the RMII pins are also connected to RGMII</div><div class='add'>+			 * so that an AR8030 can be placed, set these</div><div class='add'>+			 * to high-z with the same pulls as above.</div><div class='add'>+			 * Use the GPIO settings to avoid changing the</div><div class='add'>+			 * input select registers.</div><div class='add'>+			 */</div><div class='add'>+			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000</div><div class='add'>+			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_microsom_uart1: microsom-uart1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_microsom_uart1: microsom-uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi<br/>index 6152a9ed4768..07492f63a1f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi</a></div><div class='hunk'>@@ -7,16 +7,6 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	reg_3p3v: regulator-3p3v {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "supply-3p3v";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ecspi1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='hunk'>@@ -25,11 +15,16 @@</div><div class='ctx'> </div><div class='ctx'> 	m25p80: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='del'>-		spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -119,7 +114,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sw4_reg: sw4 {</div><div class='del'>-			regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -183,7 +178,7 @@</div><div class='ctx'> &amp;usdhc3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	no-sd;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi<br/>index 828996382f24..e8fd37dd8835 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi</a></div><div class='hunk'>@@ -30,14 +30,14 @@</div><div class='ctx'> 	temperature-sensor@48 {</div><div class='ctx'> 		compatible = "national,lm75a";</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='del'>-		vs-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eeprom@50 {</div><div class='ctx'> 		compatible = "st,24c64", "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi<br/>index 1d0966b8d99e..0e404c1f62f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi</a></div><div class='hunk'>@@ -23,14 +23,14 @@</div><div class='ctx'> 	temperature-sensor@48 {</div><div class='ctx'> 		compatible = "national,lm75a";</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='del'>-		vs-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eeprom@50 {</div><div class='ctx'> 		compatible = "st,24c64", "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;sw4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi<br/>index e2db875b61c4..17f6a568f0e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-ts7970.dtsi</a></div><div class='hunk'>@@ -213,12 +213,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	m41t00s: rtc@68 {</div><div class='del'>-		compatible = "m41t00";</div><div class='add'>+		compatible = "st,m41t00";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	isl12022: rtc@6f {</div><div class='del'>-		compatible = "isl,isl12022";</div><div class='add'>+		compatible = "isil,isl12022";</div><div class='ctx'> 		reg = &lt;0x6f&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -265,7 +265,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_ecspi2: ecspi2 {</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK      0x100b1</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI      0x100b1</div><div class='hunk'>@@ -280,7 +280,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_enet: enet {</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='ctx'> 			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi<br/>index ded241a39906..cdeaca36867e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -51,7 +15,6 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_lcd1_pwr&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio2 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='del'>-		turn-on-delay-ms = &lt;35&gt;;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * a poor man's way to create a 1:1 relationship between</div><div class='ctx'> 		 * the PWM value and the actual duty cycle</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi<br/>index 4eb53d5677a6..63d09c01a3c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi<br/>index 99ec7a838f8d..dd4e5bce4a55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-mb7.dtsi</a></div><div class='hunk'>@@ -1,54 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	backlight0 {</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 500000 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-		turn-on-delay-ms = &lt;35&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_lcd1_pwr&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight1 {</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 500000 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-		turn-on-delay-ms = &lt;35&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_lcd1_pwr&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi<br/>index 5a194f4c0cb9..57297d6521cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2014-2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -70,9 +34,8 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		mclk: clock@0 {</div><div class='add'>+		mclk: clock {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			clock-frequency = &lt;26000000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -81,7 +44,7 @@</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi<br/>index 14272b42f9a1..2be7dc4a9781 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-udoo.dtsi</a></div><div class='hunk'>@@ -117,132 +117,130 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6q-udoo {</div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001f8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001f8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001f8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001f8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_panel: panelgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x70</div><div class='del'>-				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x70</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_panel: panelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x70</div><div class='add'>+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x70</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_power_off: poweroffgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x30</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_power_off: poweroffgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x30</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_touchscreenp7: touchscreenp7grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15		0x70</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_touchscreenp7: touchscreenp7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__GPIO1_IO15		0x70</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__GPIO1_IO13		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart4: uart4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbh: usbhgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000</div><div class='del'>-				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbh: usbhgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000</div><div class='add'>+			MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotg {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059</div><div class='del'>-				MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059</div><div class='del'>-				MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059</div><div class='add'>+			MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x17059</div><div class='add'>+			MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ac97_running: ac97running {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ac97_running: ac97runninggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ac97_warm_reset: ac97warmreset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ac97_warm_reset: ac97warmresetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ac97_reset: ac97reset {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='del'>-				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='del'>-				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ac97_reset: ac97resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x13080</div><div class='add'>+			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x13080</div><div class='add'>+			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi<br/>index d8283eade43e..7749074e438d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi</a></div><div class='hunk'>@@ -194,7 +194,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_audmux: audmux {</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='ctx'> 			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='hunk'>@@ -205,7 +205,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_bt: bt {</div><div class='add'>+	pinctrl_bt: btgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* Bluetooth enable */</div><div class='ctx'> 			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi<br/>index 59833e8d11d8..2bff5f92242a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi</a></div><div class='hunk'>@@ -529,11 +529,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbphy1 {</div><div class='del'>-	fsl,tx-d-cal = &lt;0x5&gt;;</div><div class='add'>+	fsl,tx-d-cal = &lt;106&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbphy2 {</div><div class='del'>-	fsl,tx-d-cal = &lt;0x5&gt;;</div><div class='add'>+	fsl,tx-d-cal = &lt;106&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc1 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi<br/>index 96e4f4b0b248..de2b12dad7d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi</a></div><div class='hunk'>@@ -429,7 +429,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbh1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='ctx'> 	phy_type = "utmi";</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	disable-over-current;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi<br/>index e781a45785ed..3a21ae942273 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revb1.dtsi</a></div><div class='hunk'>@@ -9,22 +9,20 @@</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-wandboard {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* uSDHC1 CD */</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='del'>-				MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x0f0b0		/* WL_REF_ON */</div><div class='del'>-				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x0f0b0		/* WL_RST_N */</div><div class='del'>-				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x000b0		/* WL_REG_ON */</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x80000000	/* WL_HOST_WAKE */</div><div class='del'>-				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000	/* WL_WAKE */</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x80000000	/* RGMII_nRST */</div><div class='del'>-				MX6QDL_PAD_EIM_DA13__GPIO3_IO13		0x80000000	/* BT_ON */</div><div class='del'>-				MX6QDL_PAD_EIM_DA14__GPIO3_IO14		0x80000000	/* BT_WAKE */</div><div class='del'>-				MX6QDL_PAD_EIM_DA15__GPIO3_IO15		0x80000000	/* BT_HOST_WAKE */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* uSDHC1 CD */</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='add'>+			MX6QDL_PAD_EIM_EB1__GPIO2_IO29		0x0f0b0		/* WL_REF_ON */</div><div class='add'>+			MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x0f0b0		/* WL_RST_N */</div><div class='add'>+			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x000b0		/* WL_REG_ON */</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x80000000	/* WL_HOST_WAKE */</div><div class='add'>+			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000	/* WL_WAKE */</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x80000000	/* RGMII_nRST */</div><div class='add'>+			MX6QDL_PAD_EIM_DA13__GPIO3_IO13		0x80000000	/* BT_ON */</div><div class='add'>+			MX6QDL_PAD_EIM_DA14__GPIO3_IO14		0x80000000	/* BT_WAKE */</div><div class='add'>+			MX6QDL_PAD_EIM_DA15__GPIO3_IO15		0x80000000	/* BT_HOST_WAKE */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi<br/>index 3874e74703f0..cc707972f548 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revc1.dtsi</a></div><div class='hunk'>@@ -7,24 +7,22 @@</div><div class='ctx'> #include "imx6qdl-wandboard.dtsi"</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog_c1&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6qdl-wandboard {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* uSDHC1 CD */</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x0f0b0		/* WIFI_ON (reset, active low) */</div><div class='del'>-				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x000b0		/* WL_REG_ON (unused) */</div><div class='del'>-				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x80000000	/* WL_HOST_WAKE, input */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x0f0b0		/* GPIO5_IO31 (Wifi Power Enable) */</div><div class='del'>-				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000	/* WL_WAKE (unused) */</div><div class='del'>-				MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x80000000	/* BT_ON */</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	0x80000000	/* BT_WAKE */</div><div class='del'>-				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x80000000	/* BT_HOST_WAKE */</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x80000000	/* RGMII_nRST */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog_c1: hogc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* uSDHC1 CD */</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x0f0b0		/* WIFI_ON (reset, active low) */</div><div class='add'>+			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x000b0		/* WL_REG_ON (unused) */</div><div class='add'>+			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x80000000	/* WL_HOST_WAKE, input */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x0f0b0		/* GPIO5_IO31 (Wifi Power Enable) */</div><div class='add'>+			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x80000000	/* WL_WAKE (unused) */</div><div class='add'>+			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x80000000	/* BT_ON */</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	0x80000000	/* BT_WAKE */</div><div class='add'>+			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x80000000	/* BT_HOST_WAKE */</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x80000000	/* RGMII_nRST */</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi<br/>index 9b8c9c23ab54..8d44e758f1f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard-revd1.dtsi</a></div><div class='hunk'>@@ -137,49 +137,47 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='del'>-</div><div class='del'>-	imx6qdl-wandboard {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* USDHC1 CD */</div><div class='del'>-				MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='del'>-				MX6QDL_PAD_EIM_D29__GPIO3_IO29   	0x1f0b1		/* RGMII PHY reset */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog_d1&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_hog_d1: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x80000000	/* USDHC1 CD */</div><div class='add'>+			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0x80000000	/* uSDHC3 CD */</div><div class='add'>+			MX6QDL_PAD_EIM_D29__GPIO3_IO29   	0x1f0b1		/* RGMII PHY reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_spdif: spdifgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_19__SPDIF_OUT		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_19__SPDIF_OUT		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi<br/>index 7130b9c3b3aa..26489eccd5fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl-wandboard.dtsi</a></div><div class='hunk'>@@ -157,146 +157,143 @@</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-	imx6qdl-wandboard {</div><div class='del'>-</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b0</div><div class='del'>-				MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b0</div><div class='add'>+			MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b0</div><div class='del'>-				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b0</div><div class='add'>+			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_mclk: mclkgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_mclk: mclkgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ov5645: ov5645grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_3__CCM_CLKO2		0x000b0</div><div class='del'>-				MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ov5645: ov5645grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_3__CCM_CLKO2		0x000b0</div><div class='add'>+			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_spdif: spdifgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_ENET_RXD0__SPDIF_OUT		0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_ENET_RXD0__SPDIF_OUT		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1</div><div class='del'>-				MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1</div><div class='add'>+			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg: usbotggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotgvbus: usbotgvbusgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotgvbus: usbotgvbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc1: usdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi<br/>index d2200c9db25a..45bcfd7faf9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi</a></div><div class='hunk'>@@ -711,8 +711,8 @@</div><div class='ctx'> 				reg_vdd3p0: regulator-3p0 {</div><div class='ctx'> 					compatible = "fsl,anatop-regulator";</div><div class='ctx'> 					regulator-name = "vdd3p0";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;2625000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3400000&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					anatop-reg-offset = &lt;0x120&gt;;</div><div class='ctx'> 					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='hunk'>@@ -806,6 +806,7 @@</div><div class='ctx'> 				reg = &lt;0x020c9000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6QDL_CLK_USBPHY1&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -814,6 +815,7 @@</div><div class='ctx'> 				reg = &lt;0x020ca000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6QDL_CLK_USBPHY2&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts<br/>index ae00d538a4df..cad985e341a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts</a></div><div class='hunk'>@@ -384,7 +384,7 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -548,7 +548,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_wifi_npd: wifinpd {</div><div class='add'>+	pinctrl_wifi_npd: wifinpdgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* WL_REG_ON */</div><div class='ctx'> 			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10		0x13069</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts<br/>index 2bb3bfb18ec3..c5b220aeaefd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts</a></div><div class='hunk'>@@ -22,27 +22,25 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6qdl-sabreauto {</div><div class='del'>-		pinctrl_enet: enetgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0</div><div class='del'>-				MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0</div><div class='del'>-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b018</div><div class='del'>-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b018</div><div class='del'>-				MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8</div><div class='del'>-				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet: enetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0</div><div class='add'>+			MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0</div><div class='add'>+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b018</div><div class='add'>+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b018</div><div class='add'>+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8</div><div class='add'>+			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts<br/>index f69eec18d865..792697bd4551 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts</a></div><div class='hunk'>@@ -17,36 +17,34 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6qdl-sabresd {</div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071</div><div class='del'>-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071</div><div class='del'>-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='del'>-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071</div><div class='add'>+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071</div><div class='add'>+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059</div><div class='add'>+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts<br/>index 92b38e6699aa..3183abdd25aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts<br/>index ffc0f2ee11d2..174824a8138e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8037.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts<br/>index 07ad70718aec..31854bc52e76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137-mb7.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts<br/>index dd494d587014..dfe1535128fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6qp-tx6qp-8137.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2017 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts b/arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts<br/>index 4077b607c29e..e42c274a9014 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6s-dhcom-drc02.dts</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2021 DH electronics GmbH</div><div class='ctx'>  *</div><div class='ctx'>  * DHCOM iMX6 variant:</div><div class='del'>- * DHCM-iMX6S-C0800-R102-F0409-E-CAN2-RTC-I-01D2</div><div class='add'>+ * DHCM-iMX6S-C080-R102-F0409-E-CAN2-RTC-I-01D2</div><div class='ctx'>  * DHCOM PCB number: 493-400 or newer</div><div class='ctx'>  * DRC02 PCB number: 568-100 or newer</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts<br/>index 7c899291ab0d..036705b783f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 			"IN3R", "AMIC";</div><div class='ctx'> 		mux-int-port = &lt;2&gt;;</div><div class='ctx'> 		mux-ext-port = &lt;3&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	panel {</div><div class='hunk'>@@ -287,271 +287,269 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='ctx'> </div><div class='del'>-	imx6sl-evk {</div><div class='del'>-		pinctrl_hog: hoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059</div><div class='del'>-				MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059</div><div class='del'>-				MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059</div><div class='del'>-				MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059</div><div class='del'>-				MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059</div><div class='del'>-				MX6SL_PAD_KEY_COL4__GPIO4_IO00	0x80000000</div><div class='del'>-				MX6SL_PAD_KEY_COL5__GPIO4_IO02	0x80000000</div><div class='del'>-				MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059</div><div class='add'>+			MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059</div><div class='add'>+			MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059</div><div class='add'>+			MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059</div><div class='add'>+			MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059</div><div class='add'>+			MX6SL_PAD_KEY_COL4__GPIO4_IO00	0x80000000</div><div class='add'>+			MX6SL_PAD_KEY_COL5__GPIO4_IO02	0x80000000</div><div class='add'>+			MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_audmux3: audmux3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_AUD_RXD__AUD3_RXD	  0x4130b0</div><div class='del'>-				MX6SL_PAD_AUD_TXC__AUD3_TXC	  0x4130b0</div><div class='del'>-				MX6SL_PAD_AUD_TXD__AUD3_TXD	  0x4110b0</div><div class='del'>-				MX6SL_PAD_AUD_TXFS__AUD3_TXFS	  0x4130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux3: audmux3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_AUD_RXD__AUD3_RXD	  0x4130b0</div><div class='add'>+			MX6SL_PAD_AUD_TXC__AUD3_TXC	  0x4130b0</div><div class='add'>+			MX6SL_PAD_AUD_TXD__AUD3_TXD	  0x4110b0</div><div class='add'>+			MX6SL_PAD_AUD_TXFS__AUD3_TXFS	  0x4130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_ecspi1: ecspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO	0x100b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x100b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x100b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO	0x100b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x100b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x100b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec: fecgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_FEC_MDC__FEC_MDC		0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_MDIO__FEC_MDIO		0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV		0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0	0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1	0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_TX_EN__FEC_TX_EN		0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0	0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1	0x1b0b0</div><div class='del'>-				MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT	0x4001b0a8</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_FEC_MDC__FEC_MDC		0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_MDIO__FEC_MDIO		0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV		0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0	0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1	0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_TX_EN__FEC_TX_EN		0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0	0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1	0x1b0b0</div><div class='add'>+			MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT	0x4001b0a8</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec_sleep: fecgrp-sleep {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_FEC_MDC__GPIO4_IO23      0x3080</div><div class='del'>-				MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25   0x3080</div><div class='del'>-				MX6SL_PAD_FEC_RXD0__GPIO4_IO17     0x3080</div><div class='del'>-				MX6SL_PAD_FEC_RXD1__GPIO4_IO18     0x3080</div><div class='del'>-				MX6SL_PAD_FEC_TX_EN__GPIO4_IO22    0x3080</div><div class='del'>-				MX6SL_PAD_FEC_TXD0__GPIO4_IO24     0x3080</div><div class='del'>-				MX6SL_PAD_FEC_TXD1__GPIO4_IO16     0x3080</div><div class='del'>-				MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26  0x3080</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec_sleep: fec-sleep-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_FEC_MDC__GPIO4_IO23      0x3080</div><div class='add'>+			MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25   0x3080</div><div class='add'>+			MX6SL_PAD_FEC_RXD0__GPIO4_IO17     0x3080</div><div class='add'>+			MX6SL_PAD_FEC_RXD1__GPIO4_IO18     0x3080</div><div class='add'>+			MX6SL_PAD_FEC_TX_EN__GPIO4_IO22    0x3080</div><div class='add'>+			MX6SL_PAD_FEC_TXD0__GPIO4_IO24     0x3080</div><div class='add'>+			MX6SL_PAD_FEC_TXD1__GPIO4_IO16     0x3080</div><div class='add'>+			MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26  0x3080</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hp: hpgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_FEC_RX_ER__GPIO4_IO19	  0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hp: hpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_FEC_RX_ER__GPIO4_IO19	  0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_I2C1_SCL__I2C1_SCL	0x4001b8b1</div><div class='del'>-				MX6SL_PAD_I2C1_SDA__I2C1_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_I2C1_SCL__I2C1_SCL	0x4001b8b1</div><div class='add'>+			MX6SL_PAD_I2C1_SDA__I2C1_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c2: i2c2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_I2C2_SCL__I2C2_SCL	0x4001b8b1</div><div class='del'>-				MX6SL_PAD_I2C2_SDA__I2C2_SDA	0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_I2C2_SCL__I2C2_SCL	0x4001b8b1</div><div class='add'>+			MX6SL_PAD_I2C2_SDA__I2C2_SDA	0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_kpp: kppgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010</div><div class='del'>-				MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010</div><div class='del'>-				MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0</div><div class='del'>-				MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0</div><div class='del'>-				MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0</div><div class='del'>-				MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_kpp: kppgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010</div><div class='add'>+			MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010</div><div class='add'>+			MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0</div><div class='add'>+			MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0</div><div class='add'>+			MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0</div><div class='add'>+			MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lcd: lcdgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0</div><div class='del'>-				MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lcd: lcdgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0</div><div class='add'>+			MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_led: ledgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_led: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm1: pwmgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_PWM1__PWM1_OUT 0x110b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm1: pwmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_PWM1__PWM1_OUT 0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_reg_lcd_3v3: reglcd3v3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_reg_lcd_3v3: reglcd3v3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_KEY_ROW5__GPIO4_IO03    0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x1b0b1</div><div class='del'>-				MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x1b0b1</div><div class='add'>+			MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usbotg1: usbotg1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usbotg1: usbotg1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc1: usdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD1_CMD__SD1_CMD		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_CLK__SD1_CLK		0x10059</div><div class='del'>-				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x17059</div><div class='del'>-				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD1_CMD__SD1_CMD		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_CLK__SD1_CLK		0x10059</div><div class='add'>+			MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x17059</div><div class='add'>+			MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD1_CMD__SD1_CMD		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_CLK__SD1_CLK		0x100b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170b9</div><div class='del'>-				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD1_CMD__SD1_CMD		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_CLK__SD1_CLK		0x100b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170b9</div><div class='add'>+			MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD1_CMD__SD1_CMD		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_CLK__SD1_CLK		0x100f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170f9</div><div class='del'>-				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD1_CMD__SD1_CMD		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_CLK__SD1_CLK		0x100f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170f9</div><div class='add'>+			MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x10059</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x17059</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x17059</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x17059</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x100b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x100b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x100f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x100f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x17059</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x10059</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x17059</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x17059</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x17059</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x170b9</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x100b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x170b9</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x100b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x170f9</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x100f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x170f9</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x100f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170f9</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts<br/>index 03d6965f0149..b6c336e3079e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts</a></div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 		led-1 {</div><div class='ctx'> 			label = "tolinoshine2hd:white:backlightboost";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "off";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -382,7 +382,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_sleep: i2c1grp-sleep {</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x400108b1</div><div class='hunk'>@@ -396,7 +396,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_sleep: i2c2grp-sleep {</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x400108b1</div><div class='hunk'>@@ -456,7 +456,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130b9</div><div class='hunk'>@@ -467,7 +467,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130f9</div><div class='hunk'>@@ -478,7 +478,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_sleep: usdhc2grp-sleep {</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__GPIO5_IO04		0x100f9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__GPIO5_IO05		0x100f9</div><div class='hunk'>@@ -500,7 +500,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170b9</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170b9</div><div class='hunk'>@@ -511,7 +511,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170f9</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170f9</div><div class='hunk'>@@ -522,7 +522,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_sleep: usdhc3grp-sleep {</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__GPIO5_IO21	0x100c1</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__GPIO5_IO18	0x100c1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts<br/>index db5d8509935f..5ba6f15e9ed5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts</a></div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_sleep: i2c1grp-sleep {</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x400108b1</div><div class='hunk'>@@ -125,7 +125,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_sleep: i2c2grp-sleep {</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x400108b1</div><div class='hunk'>@@ -190,7 +190,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130b9</div><div class='hunk'>@@ -201,7 +201,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130f9</div><div class='hunk'>@@ -212,7 +212,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_sleep: usdhc2grp-sleep {</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD2_CMD__GPIO5_IO04		0x100f9</div><div class='ctx'> 			MX6SL_PAD_SD2_CLK__GPIO5_IO05		0x100f9</div><div class='hunk'>@@ -234,7 +234,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170b9</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170b9</div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170f9</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170f9</div><div class='hunk'>@@ -256,7 +256,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_sleep: usdhc3grp-sleep {</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_SD3_CMD__GPIO5_IO21	0x100c1</div><div class='ctx'> 			MX6SL_PAD_SD3_CLK__GPIO5_IO18	0x100c1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts<br/>index 6bc342035e2b..a2534c422a52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts</a></div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_sleep: i2c1grp-sleep {</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x400108b1</div><div class='hunk'>@@ -125,7 +125,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_sleep: i2c2grp-sleep {</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x400108b1</div><div class='ctx'> 			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x400108b1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts<br/>index 2545c0fe47c8..a5d48c382314 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl-warp.dts</a></div><div class='hunk'>@@ -125,110 +125,108 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6sl-warp {</div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x41b0b1</div><div class='del'>-				MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x41b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_AUD_RXC__UART3_RX_DATA	0x41b0b1</div><div class='del'>-				MX6SL_PAD_AUD_RXC__UART3_TX_DATA	0x41b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart5: uart5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA	0x41b0b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA	0x41b0b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B	0x4130b1</div><div class='del'>-				MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B	0x4130b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x410059</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x417059</div><div class='del'>-				MX6SL_PAD_SD2_RST__SD2_RESET		0x417059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD2_RST__SD2_RESET		0x4170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD2_RST__SD2_RESET		0x4170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x417059</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x410059</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x417059</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x417059</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x417059</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x417059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170b9</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170f9</div><div class='del'>-				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x41b0b1</div><div class='add'>+			MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x41b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_AUD_RXC__UART3_RX_DATA	0x41b0b1</div><div class='add'>+			MX6SL_PAD_AUD_RXC__UART3_TX_DATA	0x41b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA	0x41b0b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA	0x41b0b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B	0x4130b1</div><div class='add'>+			MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B	0x4130b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x410059</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x417059</div><div class='add'>+			MX6SL_PAD_SD2_RST__SD2_RESET		0x417059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD2_RST__SD2_RESET		0x4170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD2_RST__SD2_RESET		0x4170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x417059</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x410059</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x417059</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x417059</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x417059</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x417059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170b9</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170f9</div><div class='add'>+			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170f9</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi<br/>index 6aa61235e39e..7381fb7f8912 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sl.dtsi</a></div><div class='hunk'>@@ -378,7 +378,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt: timer@2098000 {</div><div class='del'>-				compatible = "fsl,imx6sl-gpt";</div><div class='add'>+				compatible = "fsl,imx6sl-gpt", "fsl,imx6dl-gpt";</div><div class='ctx'> 				reg = &lt;0x02098000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_GPT&gt;,</div><div class='hunk'>@@ -546,8 +546,8 @@</div><div class='ctx'> 				reg_vdd3p0: regulator-3p0 {</div><div class='ctx'> 					compatible = "fsl,anatop-regulator";</div><div class='ctx'> 					regulator-name = "vdd3p0";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;2625000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3400000&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					anatop-reg-offset = &lt;0x120&gt;;</div><div class='ctx'> 					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='hunk'>@@ -631,6 +631,7 @@</div><div class='ctx'> 					nvmem-cells = &lt;&amp;tempmon_calib&gt;, &lt;&amp;tempmon_temp_grade&gt;;</div><div class='ctx'> 					nvmem-cell-names = "calib", "temp_grade";</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6SL_CLK_PLL3_USB_OTG&gt;;</div><div class='add'>+					#thermal-sensor-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -639,6 +640,7 @@</div><div class='ctx'> 				reg = &lt;0x020c9000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USBPHY1&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -647,6 +649,7 @@</div><div class='ctx'> 				reg = &lt;0x020ca000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USBPHY2&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -859,7 +862,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc1: mmc@2190000 {</div><div class='del'>-				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sl-usdhc";</div><div class='ctx'> 				reg = &lt;0x02190000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USDHC1&gt;,</div><div class='hunk'>@@ -871,7 +874,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc2: mmc@2194000 {</div><div class='del'>-				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sl-usdhc";</div><div class='ctx'> 				reg = &lt;0x02194000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USDHC2&gt;,</div><div class='hunk'>@@ -883,7 +886,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc3: mmc@2198000 {</div><div class='del'>-				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sl-usdhc";</div><div class='ctx'> 				reg = &lt;0x02198000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USDHC3&gt;,</div><div class='hunk'>@@ -895,7 +898,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc4: mmc@219c000 {</div><div class='del'>-				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sl-usdhc";</div><div class='ctx'> 				reg = &lt;0x0219c000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SL_CLK_USDHC4&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts<br/>index febc2dd9967d..814401486792 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts</a></div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 			"IN3R", "AMIC";</div><div class='ctx'> 		mux-int-port = &lt;2&gt;;</div><div class='ctx'> 		mux-ext-port = &lt;3&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio4 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio4 24 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +461,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc1_100mhz: usdhc1grp-100mhz {</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9</div><div class='ctx'> 			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9</div><div class='hunk'>@@ -472,7 +472,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc1_200mhz: usdhc1grp-200mhz {</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9</div><div class='ctx'> 			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9</div><div class='hunk'>@@ -499,7 +499,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='ctx'> 			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130b9</div><div class='hunk'>@@ -515,7 +515,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='ctx'> 			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130f9</div><div class='hunk'>@@ -549,7 +549,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD3_CMD__SD3_CMD		0x170a1</div><div class='ctx'> 			MX6SLL_PAD_SD3_CLK__SD3_CLK		0x130a1</div><div class='hunk'>@@ -561,7 +561,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD3_CMD__SD3_CMD		0x170e9</div><div class='ctx'> 			MX6SLL_PAD_SD3_CLK__SD3_CLK		0x130f9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts<br/>new file mode 100644<br/>index 000000000000..33756d6de7aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-a.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0)</div><div class='add'>+/*</div><div class='add'>+ * Device tree for the Kobo Clara 2E rev A ebook reader</div><div class='add'>+ *</div><div class='add'>+ * Name on mainboard is: 37NB-E60K2M+4A2</div><div class='add'>+ * Serials start with: E60K2M (a number also seen in</div><div class='add'>+ * vendor kernel sources)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2024 Andreas Kemnade</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6sll-kobo-clara2e-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kobo Clara 2E";</div><div class='add'>+	compatible = "kobo,clara2e-b", "kobo,clara2e", "fsl,imx6sll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* EPD PMIC SY7636 at 0x62 */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts<br/>new file mode 100644<br/>index 000000000000..f81aeacf5142<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0)</div><div class='add'>+/*</div><div class='add'>+ * Device tree for the Kobo Clara 2E rev B ebook reader</div><div class='add'>+ *</div><div class='add'>+ * Name on mainboard is: 37NB-E60K2M+4B0</div><div class='add'>+ * Serials start with: E60K2M (a number also seen in</div><div class='add'>+ * vendor kernel sources)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2024 Andreas Kemnade</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6sll-kobo-clara2e-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kobo Clara 2E";</div><div class='add'>+	compatible = "kobo,clara2e-b", "kobo,clara2e", "fsl,imx6sll";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* EPD PMIC JD9930 at 0x18 */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi<br/>new file mode 100644<br/>index 000000000000..6f2deb366e02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,511 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0)</div><div class='add'>+/*</div><div class='add'>+ * Common part for Kobo Clara 2e device tree</div><div class='add'>+ * Copyright 2024 Andreas Kemnade</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx6sll.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;usdhc2;</div><div class='add'>+		mmc1 = &amp;usdhc3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		key-cover {</div><div class='add'>+			label = "Cover";</div><div class='add'>+			gpios = &lt;&amp;gpio4 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_led&gt;;</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio4 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "timer";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_wifi: regulator-wifi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "SD3_SPWR";</div><div class='add'>+		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clks {</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX6SLL_CLK_PLL4_AUDIO_DIV&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;393216000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	arm-supply = &lt;&amp;buck1&gt;;</div><div class='add'>+	soc-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default","sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_sleep&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* backlight aw99703 at 0x36 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default","sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_sleep&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* backlight aw99703 at 0x36 */</div><div class='add'>+</div><div class='add'>+	touchscreen@38 {</div><div class='add'>+		compatible = "focaltech,ft5426";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		pinctrl-names = "default", "suspend";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touch_gpio&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pinctrl_touch_gpio_sleep&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;1072&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;1448&gt;;</div><div class='add'>+		touchscreen-swapped-x-y;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	/* Bus seems to be in bad state after boot, allow full recovery */</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@4b {</div><div class='add'>+		compatible = "rohm,bd71879", "rohm,bd71828";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_bd71828&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		clocks = &lt;&amp;clks 0&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "bd71828-32k-out";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-reserved-ranges = &lt;0 1&gt;, &lt;2 1&gt;;</div><div class='add'>+</div><div class='add'>+		/* charge sense resistor is 30 milli-ohm */</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			LDO1 {</div><div class='add'>+				name = "LDO1";</div><div class='add'>+				regulator-name = "ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO2 {</div><div class='add'>+				name = "LDO2";</div><div class='add'>+				regulator-name = "ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO3 {</div><div class='add'>+				name = "LDO3";</div><div class='add'>+				regulator-name = "ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				name = "LDO4";</div><div class='add'>+				regulator-name = "ldo4";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO5 {</div><div class='add'>+				name = "LDO5";</div><div class='add'>+				regulator-name = "ldo5";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO6 {</div><div class='add'>+				name = "LDO6";</div><div class='add'>+				regulator-name = "ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO7 {</div><div class='add'>+				name = "LDO7";</div><div class='add'>+				regulator-name = "ldo7";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				name = "BUCK1";</div><div class='add'>+				regulator-name = "buck1";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				name = "BUCK2";</div><div class='add'>+				regulator-name = "buck2";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK3 {</div><div class='add'>+				name = "BUCK3";</div><div class='add'>+				regulator-name = "buck3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK4 {</div><div class='add'>+				name = "BUCK4";</div><div class='add'>+				regulator-name = "buck4";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK5 {</div><div class='add'>+				name = "BUCK5";</div><div class='add'>+				regulator-name = "buck5";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK6 {</div><div class='add'>+				name = "BUCK6";</div><div class='add'>+				regulator-name = "buck6";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK7 {</div><div class='add'>+				name = "BUCK7";</div><div class='add'>+				regulator-name = "buck7";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_bd71828: bd71828-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_KEY_COL0__GPIO3_IO24		0x1b8b1</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO19__GPIO4_IO19	0x1b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_keys: gpio-keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO25__GPIO4_IO25	0x17059	/* PWR_SW */</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO23__GPIO4_IO23	0x17059	/* HALL_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	0x4001f8b1</div><div class='add'>+			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	0x4001f8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	0x400108b1</div><div class='add'>+			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	0x400108b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_I2C2_SCL__I2C2_SCL	0x4001f8b1</div><div class='add'>+			MX6SLL_PAD_I2C2_SDA__I2C2_SDA	0x4001f8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_I2C2_SCL__I2C2_SCL	0x400108b1</div><div class='add'>+			MX6SLL_PAD_I2C2_SDA__I2C2_SDA	0x400108b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1</div><div class='add'>+			MX6SLL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x4001f8b1</div><div class='add'>+			MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x4001f8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_led: ledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO17__GPIO4_IO17 0x10059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touch_gpio: touch-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24	0x17059 /* TP_INT */</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO18__GPIO4_IO18	0x10059 /* TP_RST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touch_gpio_sleep: touch-gpio-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24	0x10059 /* TP_INT */</div><div class='add'>+			MX6SLL_PAD_GPIO4_IO18__GPIO4_IO18	0x10059 /* TP_RST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1</div><div class='add'>+			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_LCD_ENABLE__UART2_DCE_RX	0x41b0b1</div><div class='add'>+			MX6SLL_PAD_LCD_HSYNC__UART2_DCE_TX	0x41b0b1</div><div class='add'>+			MX6SLL_PAD_LCD_VSYNC__UART2_DCE_RTS	0x41b0b1</div><div class='add'>+			MX6SLL_PAD_LCD_RESET__UART2_DCE_CTS	0x41b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2_sleep: uart2-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_LCD_ENABLE__GPIO2_IO16	0x10059</div><div class='add'>+			MX6SLL_PAD_LCD_HSYNC__GPIO2_IO17	0x10059</div><div class='add'>+			MX6SLL_PAD_LCD_VSYNC__GPIO2_IO18	0x10059</div><div class='add'>+			MX6SLL_PAD_LCD_RESET__GPIO2_IO19	0x10059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg1: usbotg1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x17059</div><div class='add'>+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x13059</div><div class='add'>+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x17059</div><div class='add'>+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x17059</div><div class='add'>+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x17059</div><div class='add'>+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='add'>+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130b9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x170b9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x170b9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x170b9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='add'>+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x170f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x170f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x170f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD2_CMD__GPIO5_IO04		0x100f9</div><div class='add'>+			MX6SLL_PAD_SD2_CLK__GPIO5_IO05		0x100f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA0__GPIO5_IO01	0x100f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA1__GPIO4_IO30	0x100f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA2__GPIO5_IO03	0x100f9</div><div class='add'>+			MX6SLL_PAD_SD2_DATA3__GPIO4_IO28	0x100f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x11059</div><div class='add'>+			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x11059</div><div class='add'>+			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x11059</div><div class='add'>+			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x11059</div><div class='add'>+			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x11059</div><div class='add'>+			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x11059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170b9</div><div class='add'>+			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170b9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x170b9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x170b9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x170b9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170f9</div><div class='add'>+			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170f9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA0__SD3_DATA0	0x170f9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA1__SD3_DATA1	0x170f9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA2__SD3_DATA2	0x170f9</div><div class='add'>+			MX6SLL_PAD_SD3_DATA3__SD3_DATA3	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3-sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD3_CMD__GPIO5_IO21	0x100c1</div><div class='add'>+			MX6SLL_PAD_SD3_CLK__GPIO5_IO18	0x100c1</div><div class='add'>+			MX6SLL_PAD_SD3_DATA0__GPIO5_IO19	0x100c1</div><div class='add'>+			MX6SLL_PAD_SD3_DATA1__GPIO5_IO20	0x100c1</div><div class='add'>+			MX6SLL_PAD_SD3_DATA2__GPIO5_IO16	0x100c1</div><div class='add'>+			MX6SLL_PAD_SD3_DATA3__GPIO5_IO17	0x100c1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_power: wifi-powergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SLL_PAD_SD2_DATA6__GPIO4_IO29	0x10059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_rtc {</div><div class='add'>+	/* we are using the rtc in the pmic, not disabled in imx6sll.dtsi */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_uart2_sleep&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* requires LDO4 + power enable gpio */</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+		fw-init-baudrate = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg1&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	srp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc3_sleep&gt;;</div><div class='add'>+	/* card requires also ldo4 */</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_wifi&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts<br/>index c7cfe0b70f04..18c9ac8f7560 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts</a></div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_sleep: i2c1grp-sleep {</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	0x400108b1</div><div class='ctx'> 			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	0x400108b1</div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_sleep: i2c2grp-sleep {</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_I2C2_SCL__I2C2_SCL	0x400108b1</div><div class='ctx'> 			MX6SLL_PAD_I2C2_SDA__I2C2_SDA	0x400108b1</div><div class='hunk'>@@ -200,7 +200,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170b9</div><div class='ctx'> 			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130b9</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170f9</div><div class='ctx'> 			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130f9</div><div class='hunk'>@@ -222,7 +222,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_sleep: usdhc2grp-sleep {</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD2_CMD__GPIO5_IO04		0x100f9</div><div class='ctx'> 			MX6SLL_PAD_SD2_CLK__GPIO5_IO05		0x100f9</div><div class='hunk'>@@ -244,7 +244,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170b9</div><div class='ctx'> 			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170b9</div><div class='hunk'>@@ -255,7 +255,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD3_CMD__SD3_CMD	0x170f9</div><div class='ctx'> 			MX6SLL_PAD_SD3_CLK__SD3_CLK	0x170f9</div><div class='hunk'>@@ -266,7 +266,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_sleep: usdhc3grp-sleep {</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_SD3_CMD__GPIO5_IO21	0x100c1</div><div class='ctx'> 			MX6SLL_PAD_SD3_CLK__GPIO5_IO18	0x100c1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts<br/>index 7e4f38dd11e2..660620d226f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts</a></div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c1_sleep: i2c1grp-sleep {</div><div class='add'>+	pinctrl_i2c1_sleep: i2c1sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_I2C1_SCL__I2C1_SCL   0x400108b1</div><div class='ctx'> 			MX6SLL_PAD_I2C1_SDA__I2C1_SDA   0x400108b1</div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c2_sleep: i2c2grp-sleep {</div><div class='add'>+	pinctrl_i2c2_sleep: i2c2sleep-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SLL_PAD_I2C2_SCL__I2C2_SCL   0x400108b1</div><div class='ctx'> 			MX6SLL_PAD_I2C2_SDA__I2C2_SDA   0x400108b1</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi<br/>index ddeb5b37fb78..704870e8c10c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sll.dtsi</a></div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 						      "rxtx1", "rxtx2",</div><div class='ctx'> 						      "rxtx3", "rxtx4",</div><div class='ctx'> 						      "rxtx5", "rxtx6",</div><div class='del'>-						      "rxtx7", "dma";</div><div class='add'>+						      "rxtx7", "spba";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +309,7 @@</div><div class='ctx'> 					reg = &lt;0x02034000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					dmas = &lt;&amp;sdma 29 4 0&gt;, &lt;&amp;sdma 30 4 0&gt;;</div><div class='del'>-					dma-name = "rx", "tx";</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6SLL_CLK_UART3_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6SLL_CLK_UART3_SERIAL&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='hunk'>@@ -358,7 +358,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpt1: timer@2098000 {</div><div class='del'>-				compatible = "fsl,imx6sl-gpt";</div><div class='add'>+				compatible = "fsl,imx6sl-gpt", "fsl,imx6dl-gpt";</div><div class='ctx'> 				reg = &lt;0x02098000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SLL_CLK_GPT_BUS&gt;,</div><div class='hunk'>@@ -507,12 +507,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					     &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					     &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-				reg_3p0: regulator-3p0@20c8120 {</div><div class='add'>+				reg_3p0: regulator-3p0 {</div><div class='ctx'> 					compatible = "fsl,anatop-regulator";</div><div class='del'>-					reg = &lt;0x20c8120&gt;;</div><div class='ctx'> 					regulator-name = "vdd3p0";</div><div class='ctx'> 					regulator-min-microvolt = &lt;2625000&gt;;</div><div class='ctx'> 					regulator-max-microvolt = &lt;3400000&gt;;</div><div class='hunk'>@@ -525,7 +522,7 @@</div><div class='ctx'> 					anatop-enable-bit = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				tempmon: temperature-sensor {</div><div class='add'>+				tempmon: tempmon {</div><div class='ctx'> 					compatible = "fsl,imx6sll-tempmon", "fsl,imx6sx-tempmon";</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					interrupt-parent = &lt;&amp;gpc&gt;;</div><div class='hunk'>@@ -533,6 +530,7 @@</div><div class='ctx'> 					nvmem-cells = &lt;&amp;tempmon_calib&gt;, &lt;&amp;tempmon_temp_grade&gt;;</div><div class='ctx'> 					nvmem-cell-names = "calib", "temp_grade";</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6SLL_CLK_PLL3_USB_OTG&gt;;</div><div class='add'>+					#thermal-sensor-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -601,6 +599,18 @@</div><div class='ctx'> 				#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				clocks = &lt;&amp;clks IMX6SLL_CLK_IPG&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+</div><div class='add'>+				pgc {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			iomuxc: pinctrl@20e0000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts<br/>index dfbfb8119bf3..033700e052b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sx-sabreauto.dts</a></div><div class='hunk'>@@ -333,7 +333,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9</div><div class='ctx'> 			MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9</div><div class='hunk'>@@ -348,7 +348,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9</div><div class='ctx'> 			MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi<br/>index 277a6e039045..c7aeb99d8f00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi</a></div><div class='hunk'>@@ -33,14 +33,14 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='del'>-		volume-up {</div><div class='add'>+		key-volume-up {</div><div class='ctx'> 			label = "Volume Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volume-down {</div><div class='add'>+		key-volume-down {</div><div class='ctx'> 			label = "Volume Down";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> 			"IN3R", "AMIC";</div><div class='ctx'> 		mux-int-port = &lt;2&gt;;</div><div class='ctx'> 		mux-ext-port = &lt;6&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio1 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio1 17 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	panel {</div><div class='hunk'>@@ -399,323 +399,321 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	imx6x-sdb {</div><div class='del'>-		pinctrl_audmux: audmuxgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD	0x120b0</div><div class='del'>-				MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_audmux: audmuxgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD	0x120b0</div><div class='add'>+			MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet1: enet1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_ENET1_MDIO__ENET1_MDIO	0xa0b1</div><div class='del'>-				MX6SX_PAD_ENET1_MDC__ENET1_MDC		0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN	0x3081</div><div class='del'>-				MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M	0x91</div><div class='del'>-				/* phy reset */</div><div class='del'>-				MX6SX_PAD_ENET2_CRS__GPIO2_IO_7		0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet1: enet1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_ENET1_MDIO__ENET1_MDIO	0xa0b1</div><div class='add'>+			MX6SX_PAD_ENET1_MDC__ENET1_MDC		0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN	0x3081</div><div class='add'>+			MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M	0x91</div><div class='add'>+			/* phy reset */</div><div class='add'>+			MX6SX_PAD_ENET2_CRS__GPIO2_IO_7		0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet_3v3: enet3v3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_ENET2_COL__GPIO2_IO_6		0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet_3v3: enet3v3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_ENET2_COL__GPIO2_IO_6		0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_enet2: enet2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC	0xa0b9</div><div class='del'>-				MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN	0xa0b1</div><div class='del'>-				MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3	0x3081</div><div class='del'>-				MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN	0x3081</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_enet2: enet2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC	0xa0b9</div><div class='add'>+			MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN	0xa0b1</div><div class='add'>+			MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3	0x3081</div><div class='add'>+			MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN	0x3081</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan1: flexcan1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_QSPI1B_DQS__CAN1_TX		0x1b020</div><div class='del'>-				MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX		0x1b020</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_QSPI1B_DQS__CAN1_TX		0x1b020</div><div class='add'>+			MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX		0x1b020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_flexcan2: flexcan2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX		0x1b020</div><div class='del'>-				MX6SX_PAD_QSPI1A_DQS__CAN2_TX		0x1b020</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX		0x1b020</div><div class='add'>+			MX6SX_PAD_QSPI1A_DQS__CAN2_TX		0x1b020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_gpio_keys: gpio_keysgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059</div><div class='del'>-				MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_gpio_keys: gpio_keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059</div><div class='add'>+			MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_hp: hpgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_hp: hpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c1: i2c1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO01__I2C1_SDA		0x4001b8b1</div><div class='del'>-				MX6SX_PAD_GPIO1_IO00__I2C1_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO01__I2C1_SDA		0x4001b8b1</div><div class='add'>+			MX6SX_PAD_GPIO1_IO00__I2C1_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c3: i2c3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_KEY_ROW4__I2C3_SDA		0x4001b8b1</div><div class='del'>-				MX6SX_PAD_KEY_COL4__I2C3_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_KEY_ROW4__I2C3_SDA		0x4001b8b1</div><div class='add'>+			MX6SX_PAD_KEY_COL4__I2C3_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c4: i2c4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_CSI_DATA07__I2C4_SDA		0x4001b8b1</div><div class='del'>-				MX6SX_PAD_CSI_DATA06__I2C4_SCL		0x4001b8b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_CSI_DATA07__I2C4_SDA		0x4001b8b1</div><div class='add'>+			MX6SX_PAD_CSI_DATA06__I2C4_SCL		0x4001b8b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_lcd: lcdgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_CLK__LCDIF1_CLK	0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0</div><div class='del'>-				MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_lcd: lcdgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_CLK__LCDIF1_CLK	0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0</div><div class='add'>+			MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_mqs: mqsgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD2_CLK__MQS_RIGHT 0x120b0</div><div class='del'>-				MX6SX_PAD_SD2_CMD__MQS_LEFT  0x120b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_mqs: mqsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD2_CLK__MQS_RIGHT 0x120b0</div><div class='add'>+			MX6SX_PAD_SD2_CMD__MQS_LEFT  0x120b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie: pciegrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pcie_reg: pciereggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_ENET1_CRS__GPIO2_IO_1	0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pcie_reg: pciereggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_ENET1_CRS__GPIO2_IO_1	0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_peri_3v3: peri3v3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16	0x80000000</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_peri_3v3: peri3v3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16	0x80000000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm3: pwm3grp-1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm3: pwm3-1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_qspi2: qspi2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0     0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1  0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2    0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3    0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK        0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B       0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0   0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1   0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2     0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3     0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK     0x70f1</div><div class='del'>-				MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B    0x70f1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_qspi2: qspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0     0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1  0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2    0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3    0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK        0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B       0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0   0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1   0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2     0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3     0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK     0x70f1</div><div class='add'>+			MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B    0x70f1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_vcc_sd3: vccsd3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_vcc_sd3: vccsd3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_sai1: sai1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0	0x120b0</div><div class='del'>-				MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0	0x130b0</div><div class='del'>-				MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0	0x120b0</div><div class='add'>+			MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0	0x130b0</div><div class='add'>+			MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_spdif: spdifgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD4_DATA4__SPDIF_OUT          0x1b0b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD4_DATA4__SPDIF_OUT          0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX	0x1b0b1</div><div class='del'>-				MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart5: uart5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_KEY_ROW3__UART5_DCE_RX	0x1b0b1</div><div class='del'>-				MX6SX_PAD_KEY_COL3__UART5_DCE_TX	0x1b0b1</div><div class='del'>-				MX6SX_PAD_KEY_ROW2__UART5_DCE_CTS	0x1b0b1</div><div class='del'>-				MX6SX_PAD_KEY_COL2__UART5_DCE_RTS	0x1b0b1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_KEY_ROW3__UART5_DCE_RX	0x1b0b1</div><div class='add'>+			MX6SX_PAD_KEY_COL3__UART5_DCE_TX	0x1b0b1</div><div class='add'>+			MX6SX_PAD_KEY_ROW2__UART5_DCE_CTS	0x1b0b1</div><div class='add'>+			MX6SX_PAD_KEY_COL2__UART5_DCE_RTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usb_otg1: usbotg1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9	0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usb_otg1: usbotg1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9	0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usb_otg1_id: usbotg1idgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usb_otg1_id: usbotg1idgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usb_otg2: usbot2ggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12	0x10b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usb_otg2: usbot2ggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12	0x10b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc2: usdhc2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059</div><div class='del'>-				MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059</div><div class='del'>-				MX6SX_PAD_SD2_DATA0__USDHC2_DATA0	0x17059</div><div class='del'>-				MX6SX_PAD_SD2_DATA1__USDHC2_DATA1	0x17059</div><div class='del'>-				MX6SX_PAD_SD2_DATA2__USDHC2_DATA2	0x17059</div><div class='del'>-				MX6SX_PAD_SD2_DATA3__USDHC2_DATA3	0x17059</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059</div><div class='add'>+			MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059</div><div class='add'>+			MX6SX_PAD_SD2_DATA0__USDHC2_DATA0	0x17059</div><div class='add'>+			MX6SX_PAD_SD2_DATA1__USDHC2_DATA1	0x17059</div><div class='add'>+			MX6SX_PAD_SD2_DATA2__USDHC2_DATA2	0x17059</div><div class='add'>+			MX6SX_PAD_SD2_DATA3__USDHC2_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3: usdhc3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059</div><div class='del'>-				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059</div><div class='del'>-				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059</div><div class='del'>-				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059</div><div class='del'>-				MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */</div><div class='del'>-				MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059</div><div class='add'>+			MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059</div><div class='add'>+			MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059</div><div class='add'>+			MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059</div><div class='add'>+			MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */</div><div class='add'>+			MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9</div><div class='del'>-				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9</div><div class='add'>+			MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9</div><div class='del'>-				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9</div><div class='add'>+			MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_usdhc4: usdhc4grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059</div><div class='del'>-				MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059</div><div class='del'>-				MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059</div><div class='del'>-				MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059</div><div class='del'>-				MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059</div><div class='del'>-				MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059</div><div class='del'>-				MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */</div><div class='del'>-				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_usdhc4: usdhc4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059</div><div class='add'>+			MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059</div><div class='add'>+			MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059</div><div class='add'>+			MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059</div><div class='add'>+			MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059</div><div class='add'>+			MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059</div><div class='add'>+			MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */</div><div class='add'>+			MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_wdog: wdoggrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts b/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts<br/>index f999eb244373..2ffbe2df4776 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts</a></div><div class='hunk'>@@ -358,21 +358,21 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm1: pwm1grp-1 {</div><div class='add'>+	pinctrl_pwm1: pwm1-1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* blue LED */</div><div class='ctx'> 			MX6SX_PAD_RGMII2_RD3__PWM1_OUT		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm2: pwm2grp-1 {</div><div class='add'>+	pinctrl_pwm2: pwm2-1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* green LED */</div><div class='ctx'> 			MX6SX_PAD_RGMII2_RD2__PWM2_OUT		0x1b0b1</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pwm6: pwm6grp-1 {</div><div class='add'>+	pinctrl_pwm6: pwm6-1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* red LED */</div><div class='ctx'> 			MX6SX_PAD_RGMII2_TD2__PWM6_OUT		0x1b0b1</div><div class='hunk'>@@ -414,7 +414,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_50mhz: usdhc2grp-50mhz {</div><div class='add'>+	pinctrl_usdhc2_50mhz: usdhc2-50mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059</div><div class='ctx'> 			MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059</div><div class='hunk'>@@ -427,7 +427,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x100b9</div><div class='ctx'> 			MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x170b9</div><div class='hunk'>@@ -438,7 +438,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x100f9</div><div class='ctx'> 			MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x170f9</div><div class='hunk'>@@ -449,7 +449,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc4_50mhz: usdhc4grp-50mhz {</div><div class='add'>+	pinctrl_usdhc4_50mhz: usdhc4-50mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059</div><div class='ctx'> 			MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059</div><div class='hunk'>@@ -465,7 +465,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc4_100mhz: usdhc4-100mhz {</div><div class='add'>+	pinctrl_usdhc4_100mhz: usdhc4-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x100b9</div><div class='ctx'> 			MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x170b9</div><div class='hunk'>@@ -480,7 +480,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc4_200mhz: usdhc4-200mhz {</div><div class='add'>+	pinctrl_usdhc4_200mhz: usdhc4-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x100f9</div><div class='ctx'> 			MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x170f9</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi<br/>index b386448486df..5132b575b001 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6sx.dtsi</a></div><div class='hunk'>@@ -637,8 +637,8 @@</div><div class='ctx'> 				reg_vdd3p0: regulator-3p0 {</div><div class='ctx'> 					compatible = "fsl,anatop-regulator";</div><div class='ctx'> 					regulator-name = "vdd3p0";</div><div class='del'>-					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-					regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;2625000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3400000&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					anatop-reg-offset = &lt;0x120&gt;;</div><div class='ctx'> 					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='hunk'>@@ -715,13 +715,14 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				tempmon: tempmon {</div><div class='del'>-					compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";</div><div class='add'>+					compatible = "fsl,imx6sx-tempmon";</div><div class='ctx'> 					interrupt-parent = &lt;&amp;gpc&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					fsl,tempmon = &lt;&amp;anatop&gt;;</div><div class='ctx'> 					nvmem-cells = &lt;&amp;tempmon_calib&gt;, &lt;&amp;tempmon_temp_grade&gt;;</div><div class='ctx'> 					nvmem-cell-names = "calib", "temp_grade";</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6SX_CLK_PLL3_USB_OTG&gt;;</div><div class='add'>+					#thermal-sensor-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -730,6 +731,7 @@</div><div class='ctx'> 				reg = &lt;0x020c9000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USBPHY1&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -738,6 +740,7 @@</div><div class='ctx'> 				reg = &lt;0x020ca000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USBPHY2&gt;;</div><div class='add'>+				phy-3p0-supply = &lt;&amp;reg_vdd3p0&gt;;</div><div class='ctx'> 				fsl,anatop = &lt;&amp;anatop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -998,7 +1001,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc1: mmc@2190000 {</div><div class='del'>-				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sx-usdhc";</div><div class='ctx'> 				reg = &lt;0x02190000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USDHC1&gt;,</div><div class='hunk'>@@ -1012,7 +1015,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc2: mmc@2194000 {</div><div class='del'>-				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sx-usdhc";</div><div class='ctx'> 				reg = &lt;0x02194000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USDHC2&gt;,</div><div class='hunk'>@@ -1026,7 +1029,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc3: mmc@2198000 {</div><div class='del'>-				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sx-usdhc";</div><div class='ctx'> 				reg = &lt;0x02198000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USDHC3&gt;,</div><div class='hunk'>@@ -1040,7 +1043,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc4: mmc@219c000 {</div><div class='del'>-				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";</div><div class='add'>+				compatible = "fsl,imx6sx-usdhc";</div><div class='ctx'> 				reg = &lt;0x0219c000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6SX_CLK_USDHC4&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi<br/>index b74ee8948a78..73c9cfbdba62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi</a></div><div class='hunk'>@@ -22,6 +22,26 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2v8: regulator-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2v8";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	reg_sd1_vmmc: regulator-sd1-vmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -62,13 +82,40 @@</div><div class='ctx'> 		gpios = &lt;&amp;gpio_spi 3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_5v: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-wm8960 {</div><div class='ctx'> 		compatible = "fsl,imx-audio-wm8960";</div><div class='ctx'> 		model = "wm8960-audio";</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai2&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;codec&gt;;</div><div class='ctx'> 		audio-asrc = &lt;&amp;asrc&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio5 4 0&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio5 4 0&gt;;</div><div class='ctx'> 		audio-routing =</div><div class='ctx'> 			"Headphone Jack", "HP_L",</div><div class='ctx'> 			"Headphone Jack", "HP_R",</div><div class='hunk'>@@ -139,6 +186,11 @@</div><div class='ctx'> 		wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clks IMX6UL_CLK_SAI2&gt;;</div><div class='ctx'> 		clock-names = "mclk";</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	camera@3c {</div><div class='hunk'>@@ -150,6 +202,9 @@</div><div class='ctx'> 		clock-names = "xclk";</div><div class='ctx'> 		powerdown-gpios = &lt;&amp;gpio_spi 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio_spi 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			ov5640_to_parallel: endpoint {</div><div class='hunk'>@@ -389,8 +444,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='ctx'> 	pinctrl_camera_clock: cameraclockgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6UL_PAD_CSI_MCLK__CSI_MCLK		0x1b088</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi<br/>index f2386dcb9ff2..dda4fa91b2f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a></div><div class='hunk'>@@ -40,6 +40,9 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='ctx'> 			interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			micrel,led-mode = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks IMX6UL_CLK_ENET_REF&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi<br/>index 118df2a457c9..4c09bb312696 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi</a></div><div class='hunk'>@@ -322,7 +322,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_stmpe: stmpegrp  {</div><div class='add'>+	pinctrl_stmpe: stmpegrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi<br/>index 29d2f86d5e34..f4c45e964daf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi</a></div><div class='hunk'>@@ -168,7 +168,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='ctx'> 	linux,rs485-enabled-at-boot-time;</div><div class='ctx'> 	rs485-rx-during-tx;</div><div class='del'>-	rs485-rts-active-low;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi<br/>index dcf88f610346..4c0ac4d4df68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-kontron-sl-common.dtsi</a></div><div class='hunk'>@@ -26,8 +26,29 @@</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "mxicy,mx25v8035f", "jedec,spi-nor";</div><div class='del'>-		spi-max-frequency = &lt;50000000&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				reg = &lt;0x0 0xf0000&gt;;</div><div class='add'>+				label = "u-boot";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@f0000 {</div><div class='add'>+				reg = &lt;0xf0000 0x8000&gt;;</div><div class='add'>+				label = "env";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@f8000 {</div><div class='add'>+				reg = &lt;0xf8000 0x8000&gt;;</div><div class='add'>+				label = "env_redundant";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +82,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_qspi&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	spi-flash@0 {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "spi-nand";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi<br/>index ec042648bd98..c6064f4c679b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-av-02.dtsi</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		stmpe_touchscreen {</div><div class='add'>+		touchscreen {</div><div class='ctx'> 			compatible = "st,stmpe-ts";</div><div class='ctx'> 			st,sample-time = &lt;4&gt;;</div><div class='ctx'> 			st,mod-12b = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi<br/>index 2f3fd32a1167..113485e3397a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-eval-01.dtsi</a></div><div class='hunk'>@@ -8,12 +8,12 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	gpio_keys: gpio-keys {</div><div class='del'>-		compatible = "gpio-key";</div><div class='add'>+		compatible = "gpio-keys";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Power Button";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_POWER&gt;;</div><div class='hunk'>@@ -29,13 +29,13 @@</div><div class='ctx'> </div><div class='ctx'> 		user-led1 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		user-led2 {</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "gpio";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi<br/>index fe307f49b9e5..9fa5225994e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi</a></div><div class='hunk'>@@ -76,6 +76,7 @@</div><div class='ctx'> 	panel {</div><div class='ctx'> 		compatible = "vxt,vl050-8048nt-c01";</div><div class='ctx'> 		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			panel_in: endpoint {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi<br/>index c9c0794f01a2..2dd635a615cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi</a></div><div class='hunk'>@@ -162,13 +162,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	flash0: flash@0 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;33000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vldo4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts<br/>index f2a5f17f312e..2e7b96e7b791 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1-mba6ulx.dts</a></div><div class='hunk'>@@ -6,8 +6,9 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "imx6ul-tqma6ul1.dtsi"</div><div class='add'>+#include "imx6ul-tqma6ul2.dtsi"</div><div class='ctx'> #include "mba6ulx.dtsi"</div><div class='add'>+#include "imx6ul-tqma6ul1.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi<br/>index 24192d012ef7..79c8c5529135 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul1.dtsi</a></div><div class='hunk'>@@ -4,8 +4,6 @@</div><div class='ctx'>  * Author: Markus Niebel &lt;Markus.Niebel@tq-group.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "imx6ul-tqma6ul2.dtsi"</div><div class='del'>-</div><div class='ctx'> / {</div><div class='ctx'> 	model = "TQ-Systems TQMa6UL1 SoM";</div><div class='ctx'> 	compatible = "tq,imx6ul-tqma6ul1", "fsl,imx6ul";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts<br/>index 8c2f3df79b47..188f3a2a312f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0010.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts<br/>index d82698e7d50f..247a0aab7791 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-0011.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts<br/>index 20c810a81403..84b45542814e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi<br/>index 278120404d31..1992dfb53b45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi</a></div><div class='hunk'>@@ -1,42 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2015 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='del'>- *</div><div class='del'>- * This file is dual-licensed: you can use it either under the terms</div><div class='del'>- * of the GPL or the X11 license, at your option. Note that this dual</div><div class='del'>- * licensing only applies to this file, and not this project as a</div><div class='del'>- * whole.</div><div class='del'>- *</div><div class='del'>- *  a) This file is free software; you can redistribute it and/or</div><div class='del'>- *     modify it under the terms of the GNU General Public License</div><div class='del'>- *     version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *     This file is distributed in the hope that it will be useful,</div><div class='del'>- *     but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *     GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * Or, alternatively,</div><div class='del'>- *</div><div class='del'>- *  b) Permission is hereby granted, free of charge, to any person</div><div class='del'>- *     obtaining a copy of this software and associated documentation</div><div class='del'>- *     files (the "Software"), to deal in the Software without</div><div class='del'>- *     restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or</div><div class='del'>- *     sell copies of the Software, and to permit persons to whom the</div><div class='del'>- *     Software is furnished to do so, subject to the following</div><div class='del'>- *     conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be</div><div class='del'>- *     included in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES</div><div class='del'>- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT</div><div class='del'>- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,</div><div class='del'>- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='del'>- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='del'>- *     OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -108,7 +72,7 @@</div><div class='ctx'> 		default-brightness-level = &lt;50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_gpio: i2c-gpio {</div><div class='add'>+	i2c_gpio: i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -282,7 +246,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_enet1 &amp;pinctrl_enet1_mdio &amp;pinctrl_etnphy0_rst&gt;;</div><div class='ctx'> 	phy-mode = "rmii";</div><div class='del'>-	phy-reset-gpios = &lt;&amp;gpio5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	phy-supply = &lt;&amp;reg_3v3_etn&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;etnphy0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -298,6 +261,11 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinctrl_etnphy0_int&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='ctx'> 			interrupts = &lt;5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100&gt;;</div><div class='add'>+			reset-deassert-us = &lt;25000&gt;;</div><div class='add'>+			/* Energy detect sometimes causes link failures */</div><div class='add'>+			smsc,disable-energy-detect;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -308,6 +276,9 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinctrl_etnphy1_int&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='ctx'> 			interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100&gt;;</div><div class='add'>+			reset-deassert-us = &lt;25000&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -317,7 +288,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_enet2 &amp;pinctrl_etnphy1_rst&gt;;</div><div class='ctx'> 	phy-mode = "rmii";</div><div class='del'>-	phy-reset-gpios = &lt;&amp;gpio4 28 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	phy-supply = &lt;&amp;reg_3v3_etn&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;etnphy1&gt;;</div><div class='ctx'> 	status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts<br/>new file mode 100644<br/>index 000000000000..9ff3b374a2b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts</a></div><div class='hunk'>@@ -0,0 +1,320 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL</div><div class='add'>+ * Variscite SoM mounted on it</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2019 Variscite Ltd.</div><div class='add'>+ * Copyright 2025 Bootlin</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx6ul-var-som.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Variscite VAR-SOM-MX6UL Concerto Board";</div><div class='add'>+	compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_key_back&gt;, &lt;&amp;pinctrl_gpio_key_wakeup&gt;;</div><div class='add'>+</div><div class='add'>+		key-back {</div><div class='add'>+			gpios = &lt;&amp;gpio4 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-wakeup {</div><div class='add'>+			gpios = &lt;&amp;gpio5 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			label = "gpled2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet2&gt;, &lt;&amp;pinctrl_enet2_gpio&gt;, &lt;&amp;pinctrl_enet2_mdio&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@3 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;rmii_ref_clk&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='add'>+			reset-gpios = &lt;&amp;gpio5 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100000&gt;;</div><div class='add'>+			micrel,led-mode = &lt;0&gt;;</div><div class='add'>+			micrel,rmii-reference-clock-select-25-mhz = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		/*</div><div class='add'>+		 * To actually use this interrupt</div><div class='add'>+		 * connect pins J14.8 &amp; J14.10 on the Concerto-Board.</div><div class='add'>+		 */</div><div class='add'>+		compatible = "dallas,ds1337";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_enet2: enet2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet2_gpio: enet2-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x1b0b0 /* fec2 reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet2_mdio: enet2-mdiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020</div><div class='add'>+			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_key_back: gpio-key-backgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_leds: gpio-ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x1b0b0	/* GPLED2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_PIXCLK__I2C1_SCL		0x4001b8b0</div><div class='add'>+			MX6UL_PAD_CSI_MCLK__I2C1_SDA		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO05__PWM4_OUT		0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x1b0b0 /* RTC alarm IRQ */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_DATA00__UART5_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_CSI_DATA01__UART5_DCE_RX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS	0x1b0b1</div><div class='add'>+			MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb_otg1_id: usbotg1idgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO00__GPIO1_IO00	0x1b0b1 /* CD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B	0x78b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_rtc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsc {</div><div class='add'>+	/*</div><div class='add'>+	 * Conflics with wdog1 ext-reset-output &amp; SD CD pins,</div><div class='add'>+	 * so we keep it disabled by default.</div><div class='add'>+	 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Console UART */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ttymxc4 UART */</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb_otg1_id&gt;;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	srp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * To actually use ext-reset-output</div><div class='add'>+	 * connect pins J17.3 &amp; J17.8 on the Concerto-Board</div><div class='add'>+	 */</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi<br/>new file mode 100644<br/>index 000000000000..4e536e0252de<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Support for Variscite VAR-SOM-MX6UL Module</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2019 Variscite Ltd.</div><div class='add'>+ * Copyright 2025 Bootlin</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6ul.dtsi"</div><div class='add'>+#include &lt;dt-bindings/clock/imx6ul-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Variscite VAR-SOM-MX6UL module";</div><div class='add'>+	compatible = "variscite,var-som-imx6ul", "fsl,imx6ul";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_gpio_dvfs: reg-gpio-dvfs {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+		regulator-name = "gpio_dvfs";</div><div class='add'>+		regulator-type = "voltage";</div><div class='add'>+		gpios = &lt;&amp;gpio4 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1300000 0x1</div><div class='add'>+			  1400000 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rmii_ref_clk: rmii-ref-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+		clock-output-names = "rmii-ref";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clks {</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX6UL_CLK_PLL4_AUDIO_DIV&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	dc-supply = &lt;&amp;reg_gpio_dvfs&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet1&gt;, &lt;&amp;pinctrl_enet1_gpio&gt;, &lt;&amp;pinctrl_enet1_mdio&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;rmii_ref_clk&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='add'>+			reset-gpios = &lt;&amp;gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100000&gt;;</div><div class='add'>+			micrel,led-mode = &lt;1&gt;;</div><div class='add'>+			micrel,rmii-reference-clock-select-25-mhz = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_enet1: enet1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet1_gpio: enet1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x1b0b0 /* fec1 reset */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet1_mdio: enet1-mdiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1b0b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO07__ENET1_MDC		0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x1b0b0	/* BT Enable */</div><div class='add'>+			MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x03029	/* WLAN Enable */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x11088</div><div class='add'>+			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x11088</div><div class='add'>+			MX6UL_PAD_JTAG_TMS__SAI2_MCLK		0x17088</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tsc: tscgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0xb0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0xb0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0xb0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0xb0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x10069</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x17059</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x170b9</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6	0x170f9</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pxp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai2&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clks IMX6UL_CLK_SAI2_SEL&gt;,</div><div class='add'>+			  &lt;&amp;clks IMX6UL_CLK_SAI2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clks IMX6UL_CLK_PLL4_AUDIO_DIV&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;12288000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_poweroff {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tsc&gt;;</div><div class='add'>+	xnur-gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	measure-delay-time = &lt;0xffff&gt;;</div><div class='add'>+	pre-charge-time = &lt;0xfff&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	non-removable;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi<br/>index 235aa676618b..6de224dd2bb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ul.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ul.dtsi</a></div><div class='hunk'>@@ -274,6 +274,8 @@</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6UL_CLK_UART7_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6UL_CLK_UART7_SERIAL&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='add'>+					dmas = &lt;&amp;sdma 43 4 0&gt;, &lt;&amp;sdma 44 4 0&gt;;</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -285,6 +287,8 @@</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6UL_CLK_UART1_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6UL_CLK_UART1_SERIAL&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='add'>+					dmas = &lt;&amp;sdma 25 4 0&gt;, &lt;&amp;sdma 26 4 0&gt;;</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -296,6 +300,8 @@</div><div class='ctx'> 					clocks = &lt;&amp;clks IMX6UL_CLK_UART8_IPG&gt;,</div><div class='ctx'> 						 &lt;&amp;clks IMX6UL_CLK_UART8_SERIAL&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='add'>+					dmas = &lt;&amp;sdma 45 4 0&gt;, &lt;&amp;sdma 46 4 0&gt;;</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1075,6 +1081,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART2_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART2_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 27 4 0&gt;, &lt;&amp;sdma 28 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1086,6 +1094,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART3_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART3_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 29 4 0&gt;, &lt;&amp;sdma 30 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1097,6 +1107,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART4_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART4_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 31 4 0&gt;, &lt;&amp;sdma 32 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1108,6 +1120,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART5_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART5_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 33 4 0&gt;, &lt;&amp;sdma 34 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1129,6 +1143,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART6_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART6_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 0 4 0&gt;, &lt;&amp;sdma 47 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi<br/>index de4dc7c1a03a..e75dad0f0e23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtsi</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_snvs_gpiokeys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Wake-Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi<br/>index f52f8b5ad8a6..bce6fbf230b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-colibri-iris.dtsi</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_snvs_gpiokeys&gt;;</div><div class='ctx'> </div><div class='del'>-		power {</div><div class='add'>+		key-power {</div><div class='ctx'> 			label = "Wake-Up";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts<br/>new file mode 100644<br/>index 000000000000..279d46c22cd7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts</a></div><div class='hunk'>@@ -0,0 +1,303 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ * Copyright (C) 2025 Engicam srl</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6ull-engicam-microgea.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "engicam,microgea-imx6ull-bmm",</div><div class='add'>+		     "engicam,microgea-imx6ull", "fsl,imx6ull";</div><div class='add'>+	model = "Engicam MicroGEA i.MX6ULL BMM Board";</div><div class='add'>+</div><div class='add'>+	backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;85&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 100000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	buzzer {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 1000000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb1&gt;;</div><div class='add'>+		regulator-name = "usb1_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb2_vbus: regulator-usb2-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb2&gt;;</div><div class='add'>+		regulator-name = "usbotg_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_ext_pwr: regulator-ext-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_ext_pwr&gt;;</div><div class='add'>+		regulator-name = "ext-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "imx6ull-microgea-bmm-sgtl5000";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Mic Jack",</div><div class='add'>+			"Headphone", "Headphone Jack";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+</div><div class='add'>+		cpu_dai: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	codec: audio-codec@a {</div><div class='add'>+		compatible = "fsl,sgtl5000";</div><div class='add'>+		reg = &lt;0x0a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mclk&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks IMX6UL_CLK_CKO&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;clks IMX6UL_CLK_CKO2_SEL&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO2_PODF&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO2&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;clks IMX6UL_CLK_OSC&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2_SEL&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2_PODF&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2&gt;;</div><div class='add'>+		VDDA-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		VDDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm8 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tsc&gt;;</div><div class='add'>+	measure-delay-time = &lt;0x9ffff&gt;;</div><div class='add'>+	pre-charge-time = &lt;0xfff&gt;;</div><div class='add'>+	xnur-gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MicroSD */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_can: can-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020</div><div class='add'>+			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO00__I2C2_SCL		0x4001b8b0</div><div class='add'>+			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mclk: mclkgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TMS__CCM_CLKO1		0x13009</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO05__PWM4_OUT		0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm8: pwm8grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_ER__PWM8_OUT		0x11008</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x130b0</div><div class='add'>+			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x120b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tsc: tscgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x000b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x000b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x000b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0x000b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc_snvs {</div><div class='add'>+	pinctrl_reg_usb1: regusb1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb2: regusb2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_ext_pwr: reg-ext-pwrgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts<br/>new file mode 100644<br/>index 000000000000..d500f8839102<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ * Copyright (C) 2025 Engicam srl</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6ull-engicam-microgea.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "engicam,microgea-imx6ull-gtw",</div><div class='add'>+		     "engicam,microgea-imx6ull", "fsl,imx6ull";</div><div class='add'>+	model = "Engicam MicroGEA i.MX6ULL GTW Board";</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		user-button {</div><div class='add'>+			label = "User button";</div><div class='add'>+			gpios = &lt;&amp;gpio1 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;BTN_MISC&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_leds&gt;, &lt;&amp;pinctrl_pwrled&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_hub: usb-hub {</div><div class='add'>+		compatible = "smsc,usb3503a";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb_hub&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MicroSD */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio_keys: gpio_keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TDI__GPIO1_IO13		0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_leds: ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TCK__GPIO1_IO14		0x130b0</div><div class='add'>+			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	0x130b0</div><div class='add'>+			MX6UL_PAD_JTAG_TDO__GPIO1_IO12		0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc_snvs {</div><div class='add'>+	pinctrl_pwrled: ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07	0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb_hub: usb_hubgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts<br/>new file mode 100644<br/>index 000000000000..107b00b9a939<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts</a></div><div class='hunk'>@@ -0,0 +1,360 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ * Copyright (C) 2025 Engicam srl</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx6ull-engicam-microgea.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "engicam,microgea-imx6ull-rmm",</div><div class='add'>+		     "engicam,microgea-imx6ull", "fsl,imx6ull";</div><div class='add'>+	model = "Engicam MicroGEA i.MX6ULL BMM Board";</div><div class='add'>+</div><div class='add'>+	backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;85&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 100000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	buzzer {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 1000000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb1&gt;;</div><div class='add'>+		regulator-name = "usb1_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb2_vbus: regulator-usb2-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb2&gt;;</div><div class='add'>+		regulator-name = "usbotg_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_ext_pwr: regulator-ext-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_ext_pwr&gt;;</div><div class='add'>+		regulator-name = "ext-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "imx6ull-microgea-rmm-sgtl5000";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Mic Jack",</div><div class='add'>+			"Headphone", "Headphone Jack";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+</div><div class='add'>+		cpu_dai: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen: touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5306";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touchscreen&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		report-rate-hz = &lt;6&gt;;</div><div class='add'>+		/* settings valid only for Hycon touchscreen */</div><div class='add'>+		touchscreen-size-x = &lt;1280&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;800&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	codec: audio-codec@a {</div><div class='add'>+		compatible = "fsl,sgtl5000";</div><div class='add'>+		reg = &lt;0x0a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mclk&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clks IMX6UL_CLK_CKO&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;clks IMX6UL_CLK_CKO2_SEL&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO2_PODF&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO2&gt;,</div><div class='add'>+				  &lt;&amp;clks IMX6UL_CLK_CKO&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;clks IMX6UL_CLK_OSC&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2_SEL&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2_PODF&gt;,</div><div class='add'>+					 &lt;&amp;clks IMX6UL_CLK_CKO2&gt;;</div><div class='add'>+		VDDA-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		VDDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm8 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MicroSD */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_can: can-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x1b020</div><div class='add'>+			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x1b020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_CSI_PIXCLK__I2C1_SCL		0x4001b8b0</div><div class='add'>+			MX6UL_PAD_CSI_MCLK__I2C1_SDA		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO00__I2C2_SCL		0x4001b8b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO01__I2C2_SDA		0x4001b8b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_leds: ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x130b0</div><div class='add'>+			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x130b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mclk: mclkgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TMS__CCM_CLKO1		0x13009</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_GPIO1_IO05__PWM4_OUT		0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm8: pwm8grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_ER__PWM8_OUT		0x110b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x130b0</div><div class='add'>+			MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088</div><div class='add'>+			MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x120b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touchscreen: touchgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14	0x17059</div><div class='add'>+			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1</div><div class='add'>+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x0b0b0</div><div class='add'>+			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x0b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170b9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170b9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x100f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x170f9</div><div class='add'>+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x170f9</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc_snvs {</div><div class='add'>+	pinctrl_reg_usb1: regusb1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb2: regusb2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_ext_pwr: reg-ext-pwrgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x17059</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi<br/>new file mode 100644<br/>index 000000000000..43518bf07602<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ * Copyright (C) 2025 Engicam srl</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+ #include "imx6ull.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "engicam,microgea-imx6ull", "fsl,imx6ull";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet1&gt;, &lt;&amp;pinctrl_phy_reset&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;4000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;4000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NAND */</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpmi_nand&gt;;</div><div class='add'>+	nand-ecc-mode = "hw";</div><div class='add'>+	nand-ecc-strength = &lt;0&gt;;</div><div class='add'>+	nand-ecc-step-size = &lt;0&gt;;</div><div class='add'>+	nand-on-flash-bbt;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_enet1: enet1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0</div><div class='add'>+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b009</div><div class='add'>+			MX6UL_PAD_GPIO1_IO07__ENET1_MDC		0x1b0b0</div><div class='add'>+			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpmi_nand: gpminandgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6UL_PAD_NAND_CLE__RAWNAND_CLE		0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_ALE__RAWNAND_ALE		0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B	0xb000</div><div class='add'>+			MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06	0xb0b1</div><div class='add'>+			MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07	0xb0b1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc_snvs {</div><div class='add'>+	pinctrl_phy_reset: phy-resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x1b0b0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi<br/>index d12fb44aeb14..7ee25b141627 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys: gpio-keys {</div><div class='del'>-		compatible = "gpio-key";</div><div class='add'>+		compatible = "gpio-keys";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -79,13 +79,13 @@</div><div class='ctx'> 		user-led1 {</div><div class='ctx'> 			label = "yellow";</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "off";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		user-led2 {</div><div class='ctx'> 			label = "red";</div><div class='ctx'> 			gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "off";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi<br/>index 8a1776067ecc..db0c339022ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ull.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ull.dtsi</a></div><div class='hunk'>@@ -88,6 +88,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks IMX6UL_CLK_UART8_IPG&gt;,</div><div class='ctx'> 					 &lt;&amp;clks IMX6UL_CLK_UART8_SERIAL&gt;;</div><div class='ctx'> 				clock-names = "ipg", "per";</div><div class='add'>+				dmas = &lt;&amp;sdma 45 4 0&gt;, &lt;&amp;sdma 46 4 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts<br/>index 6159ed70d966..2d9f495660c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts</a></div><div class='hunk'>@@ -33,6 +33,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi<br/>index 62e41edcaf1d..8666dcd7fe97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi</a></div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;dailink_master&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='del'>-		simple-audio-card,name = "imx7-sgtl5000";</div><div class='add'>+		simple-audio-card,name = "colibri-imx7";</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,cpu {</div><div class='ctx'> 			sound-dai = &lt;&amp;sai1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi<br/>index e1c401f468e1..4d948a9757f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi</a></div><div class='hunk'>@@ -87,34 +87,6 @@</div><div class='ctx'> 			      &lt;&amp;adc2 0&gt;, &lt;&amp;adc2 1&gt;, &lt;&amp;adc2 2&gt;, &lt;&amp;adc2 3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_sd1_vmmc: regulator-sd1-vmmc {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VCC3V3_SD1";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_fec1_pwdn: regulator-fec1-pwdn {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "PWDN_FEC1";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		gpio = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_fec2_pwdn: regulator-fec2-pwdn {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "PWDN_FEC2";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		gpio = &lt;&amp;gpio2 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VBUS_USBOTG1";</div><div class='hunk'>@@ -141,6 +113,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pca9555 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_mba_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_mpcie_3v3: regulator-mpcie-3v3 {</div><div class='hunk'>@@ -151,6 +124,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;pca9555 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_mba_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_mba_12v0: regulator-mba-12v0 {</div><div class='hunk'>@@ -162,13 +136,18 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_lvds_transmitter: regulator-lvds-transmitter {</div><div class='add'>+	reg_mba_5v: regulator-mba-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "#SHTDN_LVDS";</div><div class='add'>+		regulator-name = "VCC5V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_mba_3v3: regulator-mba-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC3V3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pca9555 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_vref_1v8: regulator-vref-1v8 {</div><div class='hunk'>@@ -186,19 +165,12 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_vcc_3v3: regulator-vcc-3v3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VCC3V3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_mba_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='del'>-		model = "imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='ctx'> 		ssi-controller = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic32x4&gt;;</div><div class='ctx'> 		audio-routing =</div><div class='hunk'>@@ -239,7 +211,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_enet1&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='del'>-	phy-supply = &lt;&amp;reg_fec1_pwdn&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy1_0&gt;;</div><div class='ctx'> 	fsl,magic-packet;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -260,6 +231,8 @@</div><div class='ctx'> 			reset-gpios = &lt;&amp;gpio7 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;500&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+			interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -318,7 +291,7 @@</div><div class='ctx'> 	lm75: temperature-sensor@49 {</div><div class='ctx'> 		compatible = "national,lm75a";</div><div class='ctx'> 		reg = &lt;0x49&gt;;</div><div class='del'>-		vs-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;reg_mba_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -351,7 +324,7 @@</div><div class='ctx'> 		interrupts = &lt;12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_mba_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -668,7 +641,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	wp-gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_sd1_vmmc&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_mba_3v3&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	no-1-8-v;</div><div class='ctx'> 	no-sdio;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi<br/>index 028961eb7108..2966a33bc528 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi</a></div><div class='hunk'>@@ -135,6 +135,7 @@</div><div class='ctx'> 	lm75a: temperature-sensor@48 {</div><div class='ctx'> 		compatible = "national,lm75a";</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;vgen4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */</div><div class='hunk'>@@ -150,7 +151,6 @@</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;vgen4_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	at24c02: eeprom@56 {</div><div class='hunk'>@@ -158,7 +158,6 @@</div><div class='ctx'> 		reg = &lt;0x56&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;vgen4_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ds1339: rtc@68 {</div><div class='hunk'>@@ -266,6 +265,13 @@</div><div class='ctx'> 		spi-max-frequency = &lt;29000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vgen4_reg&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts<br/>index 0443faa3dfae..e3ee16f1aaa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_enet2&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='del'>-	phy-supply = &lt;&amp;reg_fec2_pwdn&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy2_0&gt;;</div><div class='ctx'> 	fsl,magic-packet;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -42,6 +41,8 @@</div><div class='ctx'> 			reset-gpios = &lt;&amp;gpio2 28 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;500&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+			interrupts = &lt;31 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts<br/>index 7ee66be8bccb..7acd28658e6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts</a></div><div class='hunk'>@@ -270,7 +270,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	touch@48 {</div><div class='add'>+	touchscreen@48 {</div><div class='ctx'> 		compatible = "ti,tsc2004";</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts b/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts<br/>index eec526a96311..ff9d50942884 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts</a></div><div class='hunk'>@@ -374,7 +374,7 @@</div><div class='ctx'> 	cap-power-off-card;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts<br/>index f712537fca16..17236f90ab33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts</a></div><div class='hunk'>@@ -143,6 +143,33 @@</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_5v: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 5000000 0&gt;;</div><div class='hunk'>@@ -169,7 +196,7 @@</div><div class='ctx'> 		model = "wm8960-audio";</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;codec&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio2 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio2 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		audio-routing =</div><div class='ctx'> 			"Headphone Jack", "HP_L",</div><div class='ctx'> 			"Headphone Jack", "HP_R",</div><div class='hunk'>@@ -406,6 +433,11 @@</div><div class='ctx'> 				  &lt;&amp;clks IMX7D_AUDIO_MCLK_ROOT_DIV&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;clks IMX7D_PLL_AUDIO_POST_DIV&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;0&gt;, &lt;884736000&gt;, &lt;12288000&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi<br/>index 0484e349e064..d961c61a93af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7d.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7d.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7d.dtsi</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> </div><div class='ctx'> 		opp-792000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;792000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000 950000 1250000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;150000&gt;;</div><div class='ctx'> 			opp-supported-hw = &lt;0xd&gt;, &lt;0x7&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> </div><div class='ctx'> 		opp-996000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;996000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1100000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1045000 1250000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;150000&gt;;</div><div class='ctx'> 			opp-supported-hw = &lt;0xc&gt;, &lt;0x7&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1225000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1225000 1200000 1250000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;150000&gt;;</div><div class='ctx'> 			opp-supported-hw = &lt;0x8&gt;, &lt;0x3&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts b/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts<br/>index af4acc311572..56dedd4fb8f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7s-warp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7s-warp.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_gpio&gt;;</div><div class='ctx'> 		autorepeat;</div><div class='ctx'> </div><div class='del'>-		back {</div><div class='add'>+		key-back {</div><div class='ctx'> 			label = "Back";</div><div class='ctx'> 			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_BACK&gt;;</div><div class='hunk'>@@ -31,30 +31,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_brcm: regulator-brcm {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio5 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_brcm_reg&gt;;</div><div class='del'>-		regulator-name = "brcm_reg";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;200000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_bt: regulator-bt {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_bt_reg&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio5 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-name = "bt_reg";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_peri_3p15v: regulator-peri-3p15v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "peri_3p15v_reg";</div><div class='hunk'>@@ -63,6 +39,14 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_brcm_reg&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "imx7-sgtl5000";</div><div class='hunk'>@@ -288,6 +272,14 @@</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clks IMX7D_PLL_SYS_MAIN_240M_CLK&gt;;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_bt_reg&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio5 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart6 {</div><div class='hunk'>@@ -305,14 +297,21 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='ctx'> 	no-1-8-v;</div><div class='ctx'> 	non-removable;</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_brcm&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc3 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi<br/>index 22dd72499ef2..9235dd7e93bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7s.dtsi</a></div><div class='hunk'>@@ -73,7 +73,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			clock-frequency = &lt;792000000&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clks IMX7D_CLK_ARM&gt;;</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;cpu_sleep_wait&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='hunk'>@@ -176,6 +175,34 @@</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	video_mux: csi-mux {</div><div class='add'>+		compatible = "video-mux";</div><div class='add'>+		mux-controls = &lt;&amp;mux 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			csi_mux_from_mipi_vc0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_vc0_to_csi_mux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			csi_mux_to_csi: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi_from_csi_mux&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -529,34 +556,6 @@</div><div class='ctx'> 					#mux-control-cells = &lt;1&gt;;</div><div class='ctx'> 					mux-reg-masks = &lt;0x14 0x00000010&gt;;</div><div class='ctx'> 				};</div><div class='del'>-</div><div class='del'>-				video_mux: csi-mux {</div><div class='del'>-					compatible = "video-mux";</div><div class='del'>-					mux-controls = &lt;&amp;mux 0&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-</div><div class='del'>-					port@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					port@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-						csi_mux_from_mipi_vc0: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;mipi_vc0_to_csi_mux&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					port@2 {</div><div class='del'>-						reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-						csi_mux_to_csi: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;csi_from_csi_mux&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ocotp: efuse@30350000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi<br/>index ac338320ac1d..880b9a4f32b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi</a></div><div class='hunk'>@@ -214,10 +214,11 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pcc2 IMX7ULP_CLK_USB_PHY&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='add'>+			nxp,sim = &lt;&amp;sim&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usdhc0: mmc@40370000 {</div><div class='del'>-			compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";</div><div class='add'>+			compatible = "fsl,imx7ulp-usdhc";</div><div class='ctx'> 			reg = &lt;0x40370000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scg1 IMX7ULP_CLK_NIC1_BUS_DIV&gt;,</div><div class='hunk'>@@ -231,7 +232,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usdhc1: mmc@40380000 {</div><div class='del'>-			compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc";</div><div class='add'>+			compatible = "fsl,imx7ulp-usdhc";</div><div class='ctx'> 			reg = &lt;0x40380000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scg1 IMX7ULP_CLK_NIC1_BUS_DIV&gt;,</div><div class='hunk'>@@ -398,6 +399,7 @@</div><div class='ctx'> 				 &lt;&amp;pcc3 IMX7ULP_CLK_PCTLC&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;iomuxc1 0 0 20&gt;;</div><div class='add'>+			ngpios = &lt;20&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio_ptd: gpio@40af0000 {</div><div class='hunk'>@@ -412,6 +414,7 @@</div><div class='ctx'> 				 &lt;&amp;pcc3 IMX7ULP_CLK_PCTLD&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;iomuxc1 0 32 12&gt;;</div><div class='add'>+			ngpios = &lt;12&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio_pte: gpio@40b00000 {</div><div class='hunk'>@@ -426,6 +429,7 @@</div><div class='ctx'> 				 &lt;&amp;pcc3 IMX7ULP_CLK_PCTLE&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;iomuxc1 0 64 16&gt;;</div><div class='add'>+			ngpios = &lt;16&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio_ptf: gpio@40b10000 {</div><div class='hunk'>@@ -440,6 +444,7 @@</div><div class='ctx'> 				 &lt;&amp;pcc3 IMX7ULP_CLK_PCTLF&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;iomuxc1 0 96 20&gt;;</div><div class='add'>+			ngpios = &lt;20&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi b/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi<br/>index dd714d235d5f..b0bad0d1ba36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 			reg = &lt;0x402c0000 0x4000&gt;;</div><div class='ctx'> 			interrupts = &lt;110&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clks IMXRT1050_CLK_IPG_PDOF&gt;,</div><div class='del'>-				&lt;&amp;clks IMXRT1050_CLK_OSC&gt;,</div><div class='add'>+				&lt;&amp;clks IMXRT1050_CLK_AHB_PODF&gt;,</div><div class='ctx'> 				&lt;&amp;clks IMXRT1050_CLK_USDHC1&gt;;</div><div class='ctx'> 			clock-names = "ipg", "ahb", "per";</div><div class='ctx'> 			bus-width = &lt;4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi<br/>index 941d9860218e..65fde4f52587 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi</a></div><div class='hunk'>@@ -142,10 +142,17 @@</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='del'>-		model = "imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='ctx'> 		ssi-controller = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic32x4&gt;;</div><div class='ctx'> 		audio-asrc = &lt;&amp;asrc&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"IN3_L", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"IN1_L", "Line In Jack",</div><div class='add'>+			"IN1_R", "Line In Jack",</div><div class='add'>+			"Line Out Jack", "LOL",</div><div class='add'>+			"Line Out Jack", "LOR";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi<br/>index 6dd73290f0c6..152e98cf0c4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi</a></div><div class='hunk'>@@ -100,23 +100,25 @@</div><div class='ctx'> 			memcpy-bus-width = &lt;32&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		spifi: flash-controller@40003000 {</div><div class='add'>+		spifi: spi@40003000 {</div><div class='ctx'> 			compatible = "nxp,lpc1773-spifi";</div><div class='ctx'> 			reg = &lt;0x40003000 0x1000&gt;, &lt;0x14000000 0x4000000&gt;;</div><div class='ctx'> 			reg-names = "spifi", "flash";</div><div class='ctx'> 			interrupts = &lt;30&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ccu1 CLK_SPIFI&gt;, &lt;&amp;ccu1 CLK_CPU_SPIFI&gt;;</div><div class='ctx'> 			clock-names = "spifi", "reg";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			resets = &lt;&amp;rgu 53&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mmcsd: mmcsd@40004000 {</div><div class='add'>+		mmcsd: mmc@40004000 {</div><div class='ctx'> 			compatible = "snps,dw-mshc";</div><div class='ctx'> 			reg = &lt;0x40004000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;6&gt;;</div><div class='del'>-			clocks = &lt;&amp;ccu2 CLK_SDIO&gt;, &lt;&amp;ccu1 CLK_CPU_SDIO&gt;;</div><div class='del'>-			clock-names = "ciu", "biu";</div><div class='add'>+			clocks = &lt;&amp;ccu1 CLK_CPU_SDIO&gt;, &lt;&amp;ccu2 CLK_SDIO&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='ctx'> 			resets = &lt;&amp;rgu 20&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -535,3 +537,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;nvic {</div><div class='add'>+	arm,num-irq-priority-bits = &lt;3&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi<br/>index 974410918f35..2236901a0031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi</a></div><div class='hunk'>@@ -77,12 +77,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma: dma@31000000 {</div><div class='add'>+		dma: dma-controller@31000000 {</div><div class='ctx'> 			compatible = "arm,pl080", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x31000000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk LPC32XX_CLK_DMA&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usb {</div><div class='hunk'>@@ -94,7 +95,7 @@</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Enable either ohci or usbd (gadget)!</div><div class='ctx'> 			 */</div><div class='del'>-			ohci: ohci@0 {</div><div class='add'>+			ohci: usb@0 {</div><div class='ctx'> 				compatible = "nxp,ohci-nxp", "usb-ohci";</div><div class='ctx'> 				reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;sic1&gt;;</div><div class='hunk'>@@ -224,8 +225,8 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			sd: sd@20098000 {</div><div class='del'>-				compatible = "arm,pl18x", "arm,primecell";</div><div class='add'>+			sd: mmc@20098000 {</div><div class='add'>+				compatible = "arm,pl180", "arm,primecell";</div><div class='ctx'> 				reg = &lt;0x20098000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					     &lt;13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -298,11 +299,11 @@</div><div class='ctx'> 				clocks = &lt;&amp;clk LPC32XX_CLK_I2C2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mpwm: mpwm@400e8000 {</div><div class='add'>+			mpwm: pwm@400e8000 {</div><div class='ctx'> 				compatible = "nxp,lpc3220-motor-pwm";</div><div class='ctx'> 				reg = &lt;0x400e8000 0x78&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='del'>-				#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -481,6 +482,7 @@</div><div class='ctx'> 				compatible = "nxp,lpc3220-pwm";</div><div class='ctx'> 				reg = &lt;0x4005c000 0x4&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk LPC32XX_CLK_PWM1&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk LPC32XX_CLK_PWM1&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk LPC32XX_CLK_PERIPH&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -490,6 +492,7 @@</div><div class='ctx'> 				compatible = "nxp,lpc3220-pwm";</div><div class='ctx'> 				reg = &lt;0x4005c004 0x4&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk LPC32XX_CLK_PWM2&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk LPC32XX_CLK_PWM2&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;clk LPC32XX_CLK_PERIPH&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts b/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts<br/>index beddaba85393..5ff43c825944 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts</a></div><div class='hunk'>@@ -108,14 +108,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ssp_pins: ssp-pins {</div><div class='del'>-		ssp1_cs {</div><div class='add'>+		ssp1_cs_cfg {</div><div class='ctx'> 			pins = "p6_7";</div><div class='ctx'> 			function = "gpio";</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ssp1_miso_mosi {</div><div class='add'>+		ssp1_miso_mosi_cfg {</div><div class='ctx'> 			pins = "p1_3", "p1_4";</div><div class='ctx'> 			function = "ssp1";</div><div class='ctx'> 			slew-rate = &lt;1&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 			input-schmitt-disable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ssp1_sck {</div><div class='add'>+		ssp1_sck_cfg {</div><div class='ctx'> 			pins = "pf_4";</div><div class='ctx'> 			function = "ssp1";</div><div class='ctx'> 			slew-rate = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts<br/>index 93d0c2e99e7c..18f757c56905 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts</a></div><div class='hunk'>@@ -43,50 +43,50 @@</div><div class='ctx'> 		poll-interval = &lt;100&gt;;</div><div class='ctx'> 		autorepeat;</div><div class='ctx'> </div><div class='del'>-		button0 {</div><div class='add'>+		button-0 {</div><div class='ctx'> 			label = "joy:right";</div><div class='ctx'> 			linux,code = &lt;KEY_RIGHT&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 8 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button1 {</div><div class='add'>+		button-1 {</div><div class='ctx'> 			label = "joy:up";</div><div class='ctx'> 			linux,code = &lt;KEY_UP&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		button2 {</div><div class='add'>+		button-2 {</div><div class='ctx'> 			label = "joy:enter";</div><div class='ctx'> 			linux,code = &lt;KEY_ENTER&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button3 {</div><div class='add'>+		button-3 {</div><div class='ctx'> 			label = "joy:left";</div><div class='ctx'> 			linux,code = &lt;KEY_LEFT&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button4 {</div><div class='add'>+		button-4 {</div><div class='ctx'> 			label = "joy:down";</div><div class='ctx'> 			linux,code = &lt;KEY_DOWN&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button5 {</div><div class='add'>+		button-5 {</div><div class='ctx'> 			label = "user:sw3";</div><div class='ctx'> 			linux,code = &lt;KEY_F1&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button6 {</div><div class='add'>+		button-6 {</div><div class='ctx'> 			label = "user:sw4";</div><div class='ctx'> 			linux,code = &lt;KEY_F2&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button7 {</div><div class='add'>+		button-7 {</div><div class='ctx'> 			label = "user:sw5";</div><div class='ctx'> 			linux,code = &lt;KEY_F3&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;pca_gpio 15 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -406,6 +406,9 @@</div><div class='ctx'> 		ext_sram: sram@2,0 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;2 0 0x80000&gt;; /* 512 KiB SRAM on IS62WV25616 */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 2 0 0x80000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -451,8 +454,9 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spifi_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	flash {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi<br/>index c4422f587055..707d22a219d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi</a></div><div class='hunk'>@@ -24,16 +24,25 @@</div><div class='ctx'> 		sram0: sram@10000000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x10000000 0x20000&gt;; /* 96 + 32 KiB local SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram1: sram@10080000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x10080000 0x12000&gt;; /* 64 + 8 KiB local SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram2: sram@20000000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x20000000 0x10000&gt;; /* 4 x 16 KiB AHB SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts<br/>index 4aefbc01dfc0..7ccb4c2ca571 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts</a></div><div class='hunk'>@@ -60,31 +60,31 @@</div><div class='ctx'> 		poll-interval = &lt;100&gt;;</div><div class='ctx'> 		autorepeat;</div><div class='ctx'> </div><div class='del'>-		button0 {</div><div class='add'>+		button-0 {</div><div class='ctx'> 			label = "joy_enter";</div><div class='ctx'> 			linux,code = &lt;KEY_ENTER&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button1 {</div><div class='add'>+		button-1 {</div><div class='ctx'> 			label = "joy_left";</div><div class='ctx'> 			linux,code = &lt;KEY_LEFT&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio LPC_GPIO(4,9) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button2 {</div><div class='add'>+		button-2 {</div><div class='ctx'> 			label = "joy_up";</div><div class='ctx'> 			linux,code = &lt;KEY_UP&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio LPC_GPIO(4,10) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button3 {</div><div class='add'>+		button-3 {</div><div class='ctx'> 			label = "joy_right";</div><div class='ctx'> 			linux,code = &lt;KEY_RIGHT&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio LPC_GPIO(4,12) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		button4 {</div><div class='add'>+		button-4 {</div><div class='ctx'> 			label = "joy_down";</div><div class='ctx'> 			linux,code = &lt;KEY_DOWN&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio LPC_GPIO(4,13) GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -403,7 +403,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ssp0_pins: ssp0-pins {</div><div class='del'>-		ssp0_sck_miso_mosi {</div><div class='add'>+		ssp0_sck_miso_mosi_cfg {</div><div class='ctx'> 			pins = "pf_0", "pf_2", "pf_3";</div><div class='ctx'> 			function = "ssp0";</div><div class='ctx'> 			slew-rate = &lt;1&gt;;</div><div class='hunk'>@@ -412,7 +412,7 @@</div><div class='ctx'> 			input-schmitt-disable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ssp0_ssel {</div><div class='add'>+		ssp0_ssel_cfg {</div><div class='ctx'> 			pins = "pf_1";</div><div class='ctx'> 			function = "ssp0";</div><div class='ctx'> 			bias-pull-up;</div><div class='hunk'>@@ -452,12 +452,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb0_pins: usb0-pins {</div><div class='del'>-		usb0_pwr_enable {</div><div class='add'>+		usb0_pwr_enable_cfg {</div><div class='ctx'> 			pins = "p2_3";</div><div class='ctx'> 			function = "usb0";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb0_pwr_fault {</div><div class='add'>+		usb0_pwr_fault_cfg {</div><div class='ctx'> 			pins = "p8_0";</div><div class='ctx'> 			function = "usb0";</div><div class='ctx'> 			bias-disable;</div><div class='hunk'>@@ -582,8 +582,9 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spifi_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	flash {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-cpol;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts b/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts<br/>index 846afb8ccbf1..d18f2b2caf68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4357-myd-lpc4357.dts</a></div><div class='hunk'>@@ -63,6 +63,7 @@</div><div class='ctx'> </div><div class='ctx'> 	panel: panel {</div><div class='ctx'> 		compatible = "innolux,at070tn92";</div><div class='add'>+		power-supply = &lt;&amp;vcc&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			panel_input: endpoint {</div><div class='hunk'>@@ -543,7 +544,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;enet_rmii_pins&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;phy1&gt;;</div><div class='ctx'> </div><div class='del'>-	mdio0 {</div><div class='add'>+	mdio {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "snps,dwmac-mdio";</div><div class='hunk'>@@ -569,8 +570,9 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spifi_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 	/* Atmel AT25DF321A */</div><div class='del'>-	flash {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;51000000&gt;;</div><div class='ctx'> 		spi-cpol;</div><div class='ctx'> 		spi-cpha;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi<br/>index 72f12db8d53a..d138ee7869ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi</a></div><div class='hunk'>@@ -24,16 +24,25 @@</div><div class='ctx'> 		sram0: sram@10000000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x10000000 0x8000&gt;; /* 32 KiB local SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram1: sram@10080000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x10080000 0xa000&gt;; /* 32 + 8 KiB local SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram2: sram@20000000 {</div><div class='ctx'> 			compatible = "mmio-sram";</div><div class='ctx'> 			reg = &lt;0x20000000 0x10000&gt;; /* 4 x 16 KiB AHB SRAM */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/Makefile b/arch/arm/boot/dts/nxp/ls/Makefile<br/>index 14759331dba2..53240b04c968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/Makefile</a></div><div class='hunk'>@@ -6,3 +6,12 @@ dtb-$(CONFIG_SOC_LS1021A) += \</div><div class='ctx'> 	ls1021a-tqmls1021a-mbls1021a.dtb \</div><div class='ctx'> 	ls1021a-tsn.dtb \</div><div class='ctx'> 	ls1021a-twr.dtb</div><div class='add'>+</div><div class='add'>+ls1021a-tqmls1021a-mbls1021a-hdmi-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-hdmi.dtbo</div><div class='add'>+ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtbo</div><div class='add'>+ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtbo</div><div class='add'>+ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21-dtbs += ls1021a-tqmls1021a-mbls1021a.dtb ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtbo</div><div class='add'>+dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-hdmi.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtb</div><div class='add'>+dtb-$(CONFIG_SOC_LS1021A) += ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtb</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts<br/>index f1acb97aee69..a880875ced83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-qds.dts</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 	bus-num = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	dspiflash: at45db021d@0 {</div><div class='add'>+	dspiflash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash";</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> 		 &lt;0x3 0x0 0x0 0x7fb00000 0x00000100&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	nor@0,0 {</div><div class='add'>+	flash@0,0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='hunk'>@@ -211,8 +211,8 @@</div><div class='ctx'> 		device-width = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 3 0 0x100&gt;;</div><div class='ctx'> </div><div class='del'>-		mdio-mux-emi1 {</div><div class='del'>-			compatible = "mdio-mux-mmioreg";</div><div class='add'>+		mdio-mux@54 {</div><div class='add'>+			compatible = "mdio-mux-mmioreg", "mdio-mux";</div><div class='ctx'> 			mdio-parent-bus = &lt;&amp;mdio0&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso<br/>new file mode 100644<br/>index 000000000000..e713a2ecbfc2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-hdmi.dtso</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		dcu_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;sii9022a_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sii9022a {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sii9022a_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;dcu_out&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso<br/>new file mode 100644<br/>index 000000000000..e9708f3c6740<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-lvds-tm070jvhg33.dtso</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;backlight_dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		dcu_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;lvds_encoder_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display {</div><div class='add'>+	compatible = "tianma,tm070jvhg33";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_encoder {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_encoder_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;dcu_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_encoder_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;lvds_encoder_out&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso<br/>new file mode 100644<br/>index 000000000000..66cedc2dcd96<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-dc44.dtso</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;backlight_dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		dcu_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display {</div><div class='add'>+	compatible = "cdtech,s070swv29hg-dc44";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	polytouch: touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5406";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pca9554_0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		/* LCD_PWR_EN -&gt; TSC_WAKE */</div><div class='add'>+		wake-gpios = &lt;&amp;pca9554_1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		gain = &lt;20&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;800&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;480&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;dcu_out&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso<br/>new file mode 100644<br/>index 000000000000..8b9455bffbd2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a-rgb-cdtech-fc21.dtso</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;backlight_dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		dcu_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display {</div><div class='add'>+	compatible = "cdtech,s070pws19hp-fc21";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	polytouch: touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5406";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pca9554_0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		/* LCD_PWR_EN -&gt; TSC_WAKE */</div><div class='add'>+		wake-gpios = &lt;&amp;pca9554_1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		gain = &lt;20&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;800&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;480&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;dcu_out&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts<br/>index 34636fcdfd6a..5606585dd560 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a-mbls1021a.dts</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='ctx'>  * Copyright 2018-2023 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='hunk'>@@ -147,6 +147,7 @@</div><div class='ctx'> 	display: panel {</div><div class='ctx'> 		backlight = &lt;&amp;backlight_dcu&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;pca9554_1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='hunk'>@@ -156,7 +157,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='del'>-		model = "ls1021a-mbls1021a-tlv320aic32";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='ctx'> 		ssi-controller = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic32x4&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi b/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi<br/>index 1b13851ad997..167559521ae1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tqmls1021a.dtsi</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2013-2014 Freescale Semiconductor, Inc.</div><div class='ctx'>  * Copyright 2018-2023 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='hunk'>@@ -66,12 +66,11 @@</div><div class='ctx'> </div><div class='ctx'> 	qflash0: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v_som&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts<br/>index 1ea32fff4120..da76566f3510 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-tsn.dts</a></div><div class='hunk'>@@ -40,8 +40,6 @@</div><div class='ctx'> 	/* ADG704BRMZ 1:4 SPI mux/demux */</div><div class='ctx'> 	sja1105: ethernet-switch@1 {</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "nxp,sja1105t";</div><div class='ctx'> 		/* 12 MHz */</div><div class='ctx'> 		spi-max-frequency = &lt;12000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts b/arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts<br/>index f5c03871b205..38281b904301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a-twr.dts</a></div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'> 	ranges = &lt;0x0 0x0 0x0 0x60000000 0x08000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	nor@0,0 {</div><div class='add'>+	flash@0,0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi<br/>index e86998ca77d6..e0b9ea6dd510 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/ls/ls1021a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/ls/ls1021a.dtsi</a></div><div class='hunk'>@@ -93,10 +93,9 @@</div><div class='ctx'> 			compatible = "fsl,qoriq-memory-controller";</div><div class='ctx'> 			reg = &lt;0x0 0x1080000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			big-endian;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gic: interrupt-controller@1400000 {</div><div class='add'>+		gic: interrupt-controller@1401000 {</div><div class='ctx'> 			compatible = "arm,gic-400", "arm,cortex-a7-gic";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -155,14 +154,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		esdhc: esdhc@1560000 {</div><div class='add'>+		esdhc: mmc@1560000 {</div><div class='ctx'> 			compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";</div><div class='ctx'> 			reg = &lt;0x0 0x1560000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clock-frequency = &lt;0&gt;;</div><div class='ctx'> 			voltage-ranges = &lt;1800 1800 3300 3300&gt;;</div><div class='ctx'> 			sdhci,auto-cmd12;</div><div class='del'>-			big-endian;</div><div class='ctx'> 			bus-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -611,11 +609,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		wdog0: watchdog@2ad0000 {</div><div class='del'>-			compatible = "fsl,imx21-wdt";</div><div class='add'>+			compatible = "fsl,ls1021a-wdt", "fsl,imx21-wdt";</div><div class='ctx'> 			reg = &lt;0x0 0x2ad0000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clockgen 4 1&gt;;</div><div class='del'>-			clock-names = "wdog-en";</div><div class='ctx'> 			big-endian;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -627,9 +624,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen 4 1&gt;, &lt;&amp;clockgen 4 1&gt;,</div><div class='ctx'> 				 &lt;&amp;clockgen 4 1&gt;, &lt;&amp;clockgen 4 1&gt;;</div><div class='ctx'> 			clock-names = "bus", "mclk1", "mclk2", "mclk3";</div><div class='del'>-			dma-names = "tx", "rx";</div><div class='del'>-			dmas = &lt;&amp;edma0 1 47&gt;,</div><div class='del'>-			       &lt;&amp;edma0 1 46&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 46&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 47&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -641,9 +638,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen 4 1&gt;, &lt;&amp;clockgen 4 1&gt;,</div><div class='ctx'> 				 &lt;&amp;clockgen 4 1&gt;, &lt;&amp;clockgen 4 1&gt;;</div><div class='ctx'> 			clock-names = "bus", "mclk1", "mclk2", "mclk3";</div><div class='del'>-			dma-names = "tx", "rx";</div><div class='del'>-			dmas = &lt;&amp;edma0 1 45&gt;,</div><div class='del'>-			       &lt;&amp;edma0 1 44&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 44&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 45&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -707,6 +704,7 @@</div><div class='ctx'> </div><div class='ctx'> 		enet0: ethernet@2d10000 {</div><div class='ctx'> 			compatible = "fsl,etsec2";</div><div class='add'>+			reg = &lt;0x0 0x2d10000 0x0 0x5000&gt;;</div><div class='ctx'> 			device_type = "network";</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -717,8 +715,6 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d10000 {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d10000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -726,8 +722,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d14000  {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d14000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -737,6 +731,7 @@</div><div class='ctx'> </div><div class='ctx'> 		enet1: ethernet@2d50000 {</div><div class='ctx'> 			compatible = "fsl,etsec2";</div><div class='add'>+			reg = &lt;0x0 0x2d50000 0x0 0x5000&gt;;</div><div class='ctx'> 			device_type = "network";</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -746,8 +741,6 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d50000  {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d50000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -755,8 +748,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d54000  {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d54000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -766,6 +757,7 @@</div><div class='ctx'> </div><div class='ctx'> 		enet2: ethernet@2d90000 {</div><div class='ctx'> 			compatible = "fsl,etsec2";</div><div class='add'>+			reg = &lt;0x0 0x2d90000 0x0 0x5000&gt;;</div><div class='ctx'> 			device_type = "network";</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -775,8 +767,6 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d90000  {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d90000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -784,8 +774,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			queue-group@2d94000  {</div><div class='del'>-				#address-cells = &lt;2&gt;;</div><div class='del'>-				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x2d94000 0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -810,7 +798,6 @@</div><div class='ctx'> 			snps,dis_rxdet_inp3_quirk;</div><div class='ctx'> 			usb3-lpm-capable;</div><div class='ctx'> 			snps,incr-burst-type-adjustment = &lt;1&gt;, &lt;4&gt;, &lt;8&gt;, &lt;16&gt;;</div><div class='del'>-			snps,host-vbus-glitches;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie@3400000 {</div><div class='hunk'>@@ -917,7 +904,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x0 0x10010000 0x10000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		qdma: dma-controller@8390000 {</div><div class='add'>+		qdma: dma-controller@8388000 {</div><div class='ctx'> 			compatible = "fsl,ls1021a-qdma";</div><div class='ctx'> 			reg = &lt;0x0 0x8388000 0x0 0x1000&gt;, /* Controller regs */</div><div class='ctx'> 			      &lt;0x0 0x8389000 0x0 0x1000&gt;, /* Status regs */</div><div class='hunk'>@@ -937,17 +924,15 @@</div><div class='ctx'> 			big-endian;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rcpm: power-controller@1ee2140 {</div><div class='add'>+		rcpm: wakeup-controller@1ee2140 {</div><div class='ctx'> 			compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";</div><div class='ctx'> 			reg = &lt;0x0 0x1ee2140 0x0 0x8&gt;;</div><div class='ctx'> 			#fsl,rcpm-wakeup-cells = &lt;2&gt;;</div><div class='del'>-			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ftm_alarm0: timer0@29d0000 {</div><div class='add'>+		ftm_alarm0: rtc@29d0000 {</div><div class='ctx'> 			compatible = "fsl,ls1021a-ftm-alarm";</div><div class='ctx'> 			reg = &lt;0x0 0x29d0000 0x0 0x10000&gt;;</div><div class='del'>-			reg-names = "ftm";</div><div class='ctx'> 			fsl,rcpm-wakeup = &lt;&amp;rcpm 0x0 0x20000000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			big-endian;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/Makefile b/arch/arm/boot/dts/nxp/mxs/Makefile<br/>index a430d04f9c69..d72ba702b6fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/Makefile</a></div><div class='hunk'>@@ -5,9 +5,13 @@ dtb-$(CONFIG_ARCH_MXS) += \</div><div class='ctx'> 	imx23-sansa.dtb \</div><div class='ctx'> 	imx23-stmp378x_devb.dtb \</div><div class='ctx'> 	imx23-xfi3.dtb \</div><div class='add'>+	imx28-amarula-rmm.dtb \</div><div class='ctx'> 	imx28-apf28.dtb \</div><div class='ctx'> 	imx28-apf28dev.dtb \</div><div class='ctx'> 	imx28-apx4devkit.dtb \</div><div class='add'>+	imx28-btt3-0.dtb \</div><div class='add'>+	imx28-btt3-1.dtb \</div><div class='add'>+	imx28-btt3-2.dtb \</div><div class='ctx'> 	imx28-cfa10036.dtb \</div><div class='ctx'> 	imx28-cfa10037.dtb \</div><div class='ctx'> 	imx28-cfa10049.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts b/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts<br/>index cb661bf2d157..613f13b6c8a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts</a></div><div class='hunk'>@@ -93,9 +93,9 @@</div><div class='ctx'> 						MX23_PAD_LCD_HSYNC__GPIO_1_24</div><div class='ctx'> 						MX23_PAD_PWM3__GPIO_1_29</div><div class='ctx'> 					&gt;;</div><div class='del'>-					fsl,drive-strength = &lt;0&gt;;</div><div class='del'>-					fsl,voltage = &lt;1&gt;;</div><div class='del'>-					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts b/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts<br/>index 0b088c8ab6b6..fad08f6c008f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts</a></div><div class='hunk'>@@ -83,9 +83,9 @@</div><div class='ctx'> 					fsl,pinmux-ids = &lt;</div><div class='ctx'> 						MX23_PAD_GPMI_D07__GPIO_0_7</div><div class='ctx'> 					&gt;;</div><div class='del'>-					fsl,drive-strength = &lt;0&gt;;</div><div class='del'>-					fsl,voltage = &lt;1&gt;;</div><div class='del'>-					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				key_pins_a: keys@0 {</div><div class='hunk'>@@ -94,9 +94,9 @@</div><div class='ctx'> 						MX23_PAD_ROTARYA__GPIO_2_7</div><div class='ctx'> 						MX23_PAD_ROTARYB__GPIO_2_8</div><div class='ctx'> 					&gt;;</div><div class='del'>-					fsl,drive-strength = &lt;0&gt;;</div><div class='del'>-					fsl,voltage = &lt;1&gt;;</div><div class='del'>-					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts b/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts<br/>new file mode 100644<br/>index 000000000000..af59211842fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts</a></div><div class='hunk'>@@ -0,0 +1,300 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx28.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "amarula,imx28-rmm", "fsl,imx28";</div><div class='add'>+	model = "Amarula i.MX28 rmm";</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		reg = &lt;0x40000000 0x08000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pwm 4 5000000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;255&gt;;</div><div class='add'>+		default-brightness-level = &lt;255&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	beeper {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm 7 100000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;leds_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio3 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_fec_3v3: regulator-fec-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;fec_3v3_enable_pin&gt;;</div><div class='add'>+		regulator-name = "fec-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio3 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		startup-delay-us = &lt;300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb0_vbus: regulator-usb0-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_vbus_enable_pin&gt;;</div><div class='add'>+		regulator-name = "usb0_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_vbus_enable_pin&gt;;</div><div class='add'>+		regulator-name = "usb1_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;auart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;auart0_2pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;auart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;auart1_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;duart {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;duart_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;duart_pins_b {</div><div class='add'>+	fsl,voltage = &lt;MXS_VOLTAGE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpmi {</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gpmi_pins_a &amp;gpmi_status_cfg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen: touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5306";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;edt_ft5x06_pins &amp;edt_ft5x06_wake_pin&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		wake-gpios = &lt;&amp;gpio0 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lradc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mac0_pins_a&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_fec_3v3&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			max-speed = &lt;100&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio3 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;4000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;4000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hog_pins_a&gt;;</div><div class='add'>+</div><div class='add'>+	edt_ft5x06_pins: edt-ft5x06@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_GPMI_RDY1__GPIO_0_21 /* Reset */</div><div class='add'>+			MX28_PAD_GPMI_CE3N__GPIO_0_19 /* Interrupt */</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edt_ft5x06_wake_pin: edt-ft5x06-wake@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;MX28_PAD_GPMI_CE2N__GPIO_0_18&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_16mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fec_3v3_enable_pin: fec-3v3-enable@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;MX28_PAD_SPDIF__GPIO_3_27&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hog_pins_a: hog@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_SSP2_SS1__GPIO_2_20  /* External power */</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds_pins: leds@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_SSP0_DATA7__GPIO_2_7</div><div class='add'>+			MX28_PAD_PWM0__GPIO_3_16</div><div class='add'>+			MX28_PAD_PWM1__GPIO_3_17</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_vbus_enable_pin: usb0-vbus-enable@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;MX28_PAD_SSP0_DATA5__GPIO_2_5&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_vbus_enable_pin: usb1-vbus-enable@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;MX28_PAD_SSP0_DATA6__GPIO_2_6&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm4_pins_a &amp;pwm7_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* microSD */</div><div class='add'>+&amp;ssp0 {</div><div class='add'>+	compatible = "fsl,imx28-mmc";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_4bit_pins_a &amp;mmc0_sck_cfg&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts b/arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts<br/>index 4c4ea91c286f..0d845ca81e89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts</a></div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcf8563: rtc@51 {</div><div class='del'>-		compatible = "phg,pcf8563";</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts b/arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts<br/>new file mode 100644<br/>index 000000000000..6ac46e4b21bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-0.dts</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024</div><div class='add'>+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx28-btt3.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;hog_pins_rev {</div><div class='add'>+	fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts b/arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts<br/>new file mode 100644<br/>index 000000000000..213fe931c58b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-1.dts</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024</div><div class='add'>+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx28-btt3.dtsi"</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts b/arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts<br/>new file mode 100644<br/>index 000000000000..4bccd784d065<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-btt3-2.dts</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024</div><div class='add'>+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx28-btt3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "powertip,st7272", "panel-dpi";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		width-mm = &lt;70&gt;;</div><div class='add'>+		height-mm = &lt;52&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;6500000&gt;;</div><div class='add'>+			hactive = &lt;320&gt;;</div><div class='add'>+			vactive = &lt;240&gt;;</div><div class='add'>+			hfront-porch = &lt;20&gt;;</div><div class='add'>+			hback-porch = &lt;68&gt;;</div><div class='add'>+			hsync-len = &lt;30&gt;;</div><div class='add'>+			vfront-porch = &lt;4&gt;;</div><div class='add'>+			vback-porch = &lt;14&gt;;</div><div class='add'>+			vsync-len = &lt;4&gt;;</div><div class='add'>+			hsync-active = &lt;0&gt;;</div><div class='add'>+			vsync-active = &lt;0&gt;;</div><div class='add'>+			de-active = &lt;1&gt;;</div><div class='add'>+			pixelclk-active = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi<br/>new file mode 100644<br/>index 000000000000..a6903ef2b093<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-btt3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,313 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024</div><div class='add'>+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "imx28-lwe.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "BTT3";</div><div class='add'>+</div><div class='add'>+	compatible = "lwn,imx28-btt3", "fsl,imx28";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+	       bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 ro rootwait console=ttyAMA0,115200 panic=1 quiet";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		reg = &lt;0x40000000 0x10000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "powertip,hx8238a", "panel-dpi";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		width-mm = &lt;70&gt;;</div><div class='add'>+		height-mm = &lt;52&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;6500000&gt;;</div><div class='add'>+			hactive = &lt;320&gt;;</div><div class='add'>+			vactive = &lt;240&gt;;</div><div class='add'>+			hfront-porch = &lt;20&gt;;</div><div class='add'>+			hback-porch = &lt;38&gt;;</div><div class='add'>+			hsync-len = &lt;30&gt;;</div><div class='add'>+			vfront-porch = &lt;4&gt;;</div><div class='add'>+			vback-porch = &lt;14&gt;;</div><div class='add'>+			vsync-len = &lt;4&gt;;</div><div class='add'>+			hsync-active = &lt;0&gt;;</div><div class='add'>+			vsync-active = &lt;0&gt;;</div><div class='add'>+			de-active = &lt;0&gt;;</div><div class='add'>+			pixelclk-active = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	poweroff {</div><div class='add'>+		compatible = "gpio-poweroff";</div><div class='add'>+		gpios = &lt;&amp;gpio0 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "BTTC Audio";</div><div class='add'>+		simple-audio-card,widgets = "Speaker", "BTTC Speaker";</div><div class='add'>+		simple-audio-card,routing = "BTTC Speaker", "SPKOUTN", "BTTC Speaker", "SPKOUTP";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,dai-link@0 {</div><div class='add'>+			format = "left_j";</div><div class='add'>+			bitclock-master = &lt;&amp;dai0_master&gt;;</div><div class='add'>+			frame-master = &lt;&amp;dai0_master&gt;;</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+			dai0_master: cpu {</div><div class='add'>+				sound-dai = &lt;&amp;saif0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wm89xx&gt;;</div><div class='add'>+				clocks = &lt;&amp;saif0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_en_pin_bttc&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		/* W1-163 needs 60us for WL_EN to be low and */</div><div class='add'>+		/* 150ms after high before downloading FW is possible */</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		power-off-delay-us = &lt;100&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;auart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;auart0_2pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;auart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;auart3_pins_a&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	wm89xx: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8940";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;lcdif_24bit_pins_a&gt;, &lt;&amp;lcdif_sync_pins_bttc&gt;,</div><div class='add'>+		    &lt;&amp;lcdif_reset_pins_bttc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		display_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	clocks = &lt;&amp;clks 57&gt;, &lt;&amp;clks 57&gt;, &lt;&amp;clks 64&gt;;</div><div class='add'>+	clock-names = "ipg", "ahb", "enet_out";</div><div class='add'>+	phy-handle = &lt;&amp;mac0_phy&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * This MAC address is adjusted during production.</div><div class='add'>+	 * Value specified below is used as a fallback during recovery.</div><div class='add'>+	 */</div><div class='add'>+	local-mac-address = [ 00 11 B8 00 BF 8A ];</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mac0_phy: ethernet-phy@0 {</div><div class='add'>+			/* LAN8720Ai - PHY ID */</div><div class='add'>+			compatible = "ethernet-phy-id0007.c0f0","ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			smsc,disable-energy-detect;</div><div class='add'>+			max-speed = &lt;100&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;1000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hog_pins_a&gt;, &lt;&amp;hog_pins_rev&gt;;</div><div class='add'>+</div><div class='add'>+	hog_pins_a: hog@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_GPMI_RDY2__GPIO_0_22</div><div class='add'>+			MX28_PAD_GPMI_RDY3__GPIO_0_23</div><div class='add'>+			MX28_PAD_GPMI_RDN__GPIO_0_24</div><div class='add'>+			MX28_PAD_LCD_VSYNC__GPIO_1_28</div><div class='add'>+			MX28_PAD_SSP2_SS1__GPIO_2_20</div><div class='add'>+			MX28_PAD_SSP2_SS2__GPIO_2_21</div><div class='add'>+			MX28_PAD_AUART2_CTS__GPIO_3_10</div><div class='add'>+			MX28_PAD_AUART2_RTS__GPIO_3_11</div><div class='add'>+			MX28_PAD_GPMI_WRN__GPIO_0_25</div><div class='add'>+			MX28_PAD_ENET0_RXD2__GPIO_4_9</div><div class='add'>+			MX28_PAD_ENET0_TXD2__GPIO_4_11</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hog_pins_rev: hog@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_ENET0_RXD3__GPIO_4_10</div><div class='add'>+			MX28_PAD_ENET0_TX_CLK__GPIO_4_5</div><div class='add'>+			MX28_PAD_ENET0_COL__GPIO_4_14</div><div class='add'>+			MX28_PAD_ENET0_CRS__GPIO_4_15</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keypad_pins_bttc: keypad-bttc@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_GPMI_D00__GPIO_0_0</div><div class='add'>+			MX28_PAD_AUART0_CTS__GPIO_3_2</div><div class='add'>+			MX28_PAD_AUART0_RTS__GPIO_3_3</div><div class='add'>+			MX28_PAD_GPMI_D03__GPIO_0_3</div><div class='add'>+			MX28_PAD_GPMI_D04__GPIO_0_4</div><div class='add'>+			MX28_PAD_GPMI_D05__GPIO_0_5</div><div class='add'>+			MX28_PAD_GPMI_D06__GPIO_0_6</div><div class='add'>+			MX28_PAD_GPMI_D07__GPIO_0_7</div><div class='add'>+			MX28_PAD_GPMI_CE1N__GPIO_0_17</div><div class='add'>+			MX28_PAD_GPMI_CE2N__GPIO_0_18</div><div class='add'>+			MX28_PAD_GPMI_CE3N__GPIO_0_19</div><div class='add'>+			MX28_PAD_GPMI_RDY0__GPIO_0_20</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcdif_sync_pins_bttc: lcdif-bttc@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_LCD_DOTCLK__LCD_DOTCLK</div><div class='add'>+			MX28_PAD_LCD_ENABLE__LCD_ENABLE</div><div class='add'>+			MX28_PAD_LCD_HSYNC__LCD_HSYNC</div><div class='add'>+			MX28_PAD_LCD_RD_E__LCD_VSYNC</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcdif_reset_pins_bttc: lcdif-bttc@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_LCD_RESET__GPIO_3_30</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ssp1_sdio_pins_a: ssp1-sdio@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_SSP1_DATA0__SSP1_D0</div><div class='add'>+			MX28_PAD_GPMI_D01__SSP1_D1</div><div class='add'>+			MX28_PAD_GPMI_D02__SSP1_D2</div><div class='add'>+			MX28_PAD_SSP1_DATA3__SSP1_D3</div><div class='add'>+			MX28_PAD_SSP1_CMD__SSP1_CMD</div><div class='add'>+			MX28_PAD_SSP1_SCK__SSP1_SCK</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_8mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_en_pin_bttc: wifi-en-pin@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			MX28_PAD_GPMI_CLE__GPIO_0_27</div><div class='add'>+		&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_8mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_ENABLE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm3_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usb_5v {</div><div class='add'>+	gpio = &lt;&amp;gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saif0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;saif0_pins_a&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clks 53&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saif1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;saif1_pins_a&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	fsl,saif-master = &lt;&amp;saif0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssp1 {</div><div class='add'>+	compatible = "fsl,imx28-mmc";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ssp1_sdio_pins_a&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;       /* force 3.3V VIO */</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssp2 {</div><div class='add'>+	compatible = "fsl,imx28-spi";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts<br/>index d004b1cbb4ae..f170df37b3f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts</a></div><div class='hunk'>@@ -102,9 +102,9 @@</div><div class='ctx'> 			0x31c3 /*</div><div class='ctx'> 			MX28_PAD_PWM3__GPIO_3_28 */</div><div class='ctx'> 		&gt;;</div><div class='del'>-		fsl,drive-strength = &lt;0&gt;;</div><div class='del'>-		fsl,voltage = &lt;1&gt;;</div><div class='del'>-		fsl,pull-up = &lt;0&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+		fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+		fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts b/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts<br/>index 0f01dded4e3d..ca62e7933116 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts</a></div><div class='hunk'>@@ -24,30 +24,25 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='del'>-		led@1 {</div><div class='add'>+		led-1 {</div><div class='ctx'> 			label = "sps1-1:yellow:user";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 6 0&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@2 {</div><div class='add'>+		led-2 {</div><div class='ctx'> 			label = "sps1-2:red:user";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 3 0&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		led@3 {</div><div class='add'>+		led-3 {</div><div class='ctx'> 			label = "sps1-3:red:user";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 0 0&gt;;</div><div class='del'>-			default-trigger = "heartbeat";</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi<br/>index bbea8b77386f..ece46d0e7c7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/mxs/imx28.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/mxs/imx28.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/mxs/imx28.dtsi</a></div><div class='hunk'>@@ -755,6 +755,16 @@</div><div class='ctx'> 					fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				pwm7_pins_a: pwm7@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;</div><div class='add'>+						MX28_PAD_SAIF1_SDATA0__PWM_7</div><div class='add'>+					&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;MXS_DRIVE_4mA&gt;;</div><div class='add'>+					fsl,voltage = &lt;MXS_VOLTAGE_HIGH&gt;;</div><div class='add'>+					fsl,pull-up = &lt;MXS_PULL_DISABLE&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				lcdif_24bit_pins_a: lcdif-24bit@0 {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					fsl,pinmux-ids = &lt;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi<br/>index 5a19da9313ae..86c360868e4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> 	panel: panel {</div><div class='ctx'> 		compatible = "edt,et057090dhu";</div><div class='ctx'> 		backlight = &lt;&amp;bl&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			panel_in: endpoint {</div><div class='hunk'>@@ -142,11 +143,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-colibri {</div><div class='del'>-		pinctrl_can_int: can_int {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB21__GPIO_43	0x22ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_can_int: can_intgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB21__GPIO_43	0x22ed</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi<br/>index cc1e069c44e6..98f9ee1b0030 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi</a></div><div class='hunk'>@@ -171,180 +171,178 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-colibri {</div><div class='del'>-		pinctrl_flexcan0: can0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB14__CAN0_RX	0x31F1</div><div class='del'>-				VF610_PAD_PTB15__CAN0_TX	0x31F2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_flexcan1: can1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB16__CAN1_RX	0x31F1</div><div class='del'>-				VF610_PAD_PTB17__CAN1_TX	0x31F2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_gpio_ext: gpio_ext {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD10__GPIO_89	0x22ed /* EXT_IO_0 */</div><div class='del'>-				VF610_PAD_PTD9__GPIO_88		0x22ed /* EXT_IO_1 */</div><div class='del'>-				VF610_PAD_PTD26__GPIO_68	0x22ed /* EXT_IO_2 */</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_dcu0_1: dcu0grp_1 {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTE0__DCU0_HSYNC	0x1902</div><div class='del'>-				VF610_PAD_PTE1__DCU0_VSYNC	0x1902</div><div class='del'>-				VF610_PAD_PTE2__DCU0_PCLK	0x1902</div><div class='del'>-				VF610_PAD_PTE4__DCU0_DE		0x1902</div><div class='del'>-				VF610_PAD_PTE5__DCU0_R0		0x1902</div><div class='del'>-				VF610_PAD_PTE6__DCU0_R1		0x1902</div><div class='del'>-				VF610_PAD_PTE7__DCU0_R2		0x1902</div><div class='del'>-				VF610_PAD_PTE8__DCU0_R3		0x1902</div><div class='del'>-				VF610_PAD_PTE9__DCU0_R4		0x1902</div><div class='del'>-				VF610_PAD_PTE10__DCU0_R5	0x1902</div><div class='del'>-				VF610_PAD_PTE11__DCU0_R6	0x1902</div><div class='del'>-				VF610_PAD_PTE12__DCU0_R7	0x1902</div><div class='del'>-				VF610_PAD_PTE13__DCU0_G0	0x1902</div><div class='del'>-				VF610_PAD_PTE14__DCU0_G1	0x1902</div><div class='del'>-				VF610_PAD_PTE15__DCU0_G2	0x1902</div><div class='del'>-				VF610_PAD_PTE16__DCU0_G3	0x1902</div><div class='del'>-				VF610_PAD_PTE17__DCU0_G4	0x1902</div><div class='del'>-				VF610_PAD_PTE18__DCU0_G5	0x1902</div><div class='del'>-				VF610_PAD_PTE19__DCU0_G6	0x1902</div><div class='del'>-				VF610_PAD_PTE20__DCU0_G7	0x1902</div><div class='del'>-				VF610_PAD_PTE21__DCU0_B0	0x1902</div><div class='del'>-				VF610_PAD_PTE22__DCU0_B1	0x1902</div><div class='del'>-				VF610_PAD_PTE23__DCU0_B2	0x1902</div><div class='del'>-				VF610_PAD_PTE24__DCU0_B3	0x1902</div><div class='del'>-				VF610_PAD_PTE25__DCU0_B4	0x1902</div><div class='del'>-				VF610_PAD_PTE26__DCU0_B5	0x1902</div><div class='del'>-				VF610_PAD_PTE27__DCU0_B6	0x1902</div><div class='del'>-				VF610_PAD_PTE28__DCU0_B7	0x1902</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_dspi1: dspi1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD5__DSPI1_CS0		0x33e2</div><div class='del'>-				VF610_PAD_PTD6__DSPI1_SIN		0x33e1</div><div class='del'>-				VF610_PAD_PTD7__DSPI1_SOUT		0x33e2</div><div class='del'>-				VF610_PAD_PTD8__DSPI1_SCK		0x33e2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='del'>-				VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='del'>-				VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='del'>-				VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='del'>-				VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='del'>-				VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='del'>-				VF610_PAD_PTB20__GPIO_42	0x219d</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_fec1: fec1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA6__RMII_CLKOUT		0x30d2</div><div class='del'>-				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='del'>-				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='del'>-				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='del'>-				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='del'>-				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='del'>-				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='del'>-				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='del'>-				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_gpio_bl_on: gpio_bl_on {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTC0__GPIO_45		0x22ef</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_i2c0: i2c0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB14__I2C0_SCL		0x37ff</div><div class='del'>-				VF610_PAD_PTB15__I2C0_SDA		0x37ff</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_i2c0_gpio: i2c0gpiogrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB14__GPIO_36		0x37ff</div><div class='del'>-				VF610_PAD_PTB15__GPIO_37		0x37ff</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_nfc: nfcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD23__NF_IO7		0x28df</div><div class='del'>-				VF610_PAD_PTD22__NF_IO6		0x28df</div><div class='del'>-				VF610_PAD_PTD21__NF_IO5		0x28df</div><div class='del'>-				VF610_PAD_PTD20__NF_IO4		0x28df</div><div class='del'>-				VF610_PAD_PTD19__NF_IO3		0x28df</div><div class='del'>-				VF610_PAD_PTD18__NF_IO2		0x28df</div><div class='del'>-				VF610_PAD_PTD17__NF_IO1		0x28df</div><div class='del'>-				VF610_PAD_PTD16__NF_IO0		0x28df</div><div class='del'>-				VF610_PAD_PTB24__NF_WE_B	0x28c2</div><div class='del'>-				VF610_PAD_PTB25__NF_CE0_B	0x28c2</div><div class='del'>-				VF610_PAD_PTB27__NF_RE_B	0x28c2</div><div class='del'>-				VF610_PAD_PTC26__NF_RB_B	0x283d</div><div class='del'>-				VF610_PAD_PTC27__NF_ALE		0x28c2</div><div class='del'>-				VF610_PAD_PTC28__NF_CLE		0x28c2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_pwm0: pwm0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB0__FTM0_CH0		0x1182</div><div class='del'>-				VF610_PAD_PTB1__FTM0_CH1		0x1182</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_pwm1: pwm1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB8__FTM1_CH0		0x1182</div><div class='del'>-				VF610_PAD_PTB9__FTM1_CH1		0x1182</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart0: uart0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB10__UART0_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTB11__UART0_RX		0x21a1</div><div class='del'>-				VF610_PAD_PTB12__UART0_RTS		0x21a2</div><div class='del'>-				VF610_PAD_PTB13__UART0_CTS		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD0__UART2_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTD1__UART2_RX		0x21a1</div><div class='del'>-				VF610_PAD_PTD2__UART2_RTS		0x21a2</div><div class='del'>-				VF610_PAD_PTD3__UART2_CTS		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pinctrl_usbh1_reg: gpio_usb_vbus {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD4__GPIO_83			0x22ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_flexcan0: can0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB14__CAN0_RX	0x31F1</div><div class='add'>+			VF610_PAD_PTB15__CAN0_TX	0x31F2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB16__CAN1_RX	0x31F1</div><div class='add'>+			VF610_PAD_PTB17__CAN1_TX	0x31F2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_ext: gpio_extgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD10__GPIO_89	0x22ed /* EXT_IO_0 */</div><div class='add'>+			VF610_PAD_PTD9__GPIO_88		0x22ed /* EXT_IO_1 */</div><div class='add'>+			VF610_PAD_PTD26__GPIO_68	0x22ed /* EXT_IO_2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_dcu0_1: dcu01grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTE0__DCU0_HSYNC	0x1902</div><div class='add'>+			VF610_PAD_PTE1__DCU0_VSYNC	0x1902</div><div class='add'>+			VF610_PAD_PTE2__DCU0_PCLK	0x1902</div><div class='add'>+			VF610_PAD_PTE4__DCU0_DE		0x1902</div><div class='add'>+			VF610_PAD_PTE5__DCU0_R0		0x1902</div><div class='add'>+			VF610_PAD_PTE6__DCU0_R1		0x1902</div><div class='add'>+			VF610_PAD_PTE7__DCU0_R2		0x1902</div><div class='add'>+			VF610_PAD_PTE8__DCU0_R3		0x1902</div><div class='add'>+			VF610_PAD_PTE9__DCU0_R4		0x1902</div><div class='add'>+			VF610_PAD_PTE10__DCU0_R5	0x1902</div><div class='add'>+			VF610_PAD_PTE11__DCU0_R6	0x1902</div><div class='add'>+			VF610_PAD_PTE12__DCU0_R7	0x1902</div><div class='add'>+			VF610_PAD_PTE13__DCU0_G0	0x1902</div><div class='add'>+			VF610_PAD_PTE14__DCU0_G1	0x1902</div><div class='add'>+			VF610_PAD_PTE15__DCU0_G2	0x1902</div><div class='add'>+			VF610_PAD_PTE16__DCU0_G3	0x1902</div><div class='add'>+			VF610_PAD_PTE17__DCU0_G4	0x1902</div><div class='add'>+			VF610_PAD_PTE18__DCU0_G5	0x1902</div><div class='add'>+			VF610_PAD_PTE19__DCU0_G6	0x1902</div><div class='add'>+			VF610_PAD_PTE20__DCU0_G7	0x1902</div><div class='add'>+			VF610_PAD_PTE21__DCU0_B0	0x1902</div><div class='add'>+			VF610_PAD_PTE22__DCU0_B1	0x1902</div><div class='add'>+			VF610_PAD_PTE23__DCU0_B2	0x1902</div><div class='add'>+			VF610_PAD_PTE24__DCU0_B3	0x1902</div><div class='add'>+			VF610_PAD_PTE25__DCU0_B4	0x1902</div><div class='add'>+			VF610_PAD_PTE26__DCU0_B5	0x1902</div><div class='add'>+			VF610_PAD_PTE27__DCU0_B6	0x1902</div><div class='add'>+			VF610_PAD_PTE28__DCU0_B7	0x1902</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_dspi1: dspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD5__DSPI1_CS0		0x33e2</div><div class='add'>+			VF610_PAD_PTD6__DSPI1_SIN		0x33e1</div><div class='add'>+			VF610_PAD_PTD7__DSPI1_SOUT		0x33e2</div><div class='add'>+			VF610_PAD_PTD8__DSPI1_SCK		0x33e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='add'>+			VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='add'>+			VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='add'>+			VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='add'>+			VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='add'>+			VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='add'>+			VF610_PAD_PTB20__GPIO_42	0x219d</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec1: fec1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA6__RMII_CLKOUT		0x30d2</div><div class='add'>+			VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='add'>+			VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='add'>+			VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='add'>+			VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='add'>+			VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='add'>+			VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='add'>+			VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='add'>+			VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='add'>+			VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_bl_on: gpio_bl_ongrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTC0__GPIO_45		0x22ef</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c0: i2c0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB14__I2C0_SCL		0x37ff</div><div class='add'>+			VF610_PAD_PTB15__I2C0_SDA		0x37ff</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c0_gpio: i2c0gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB14__GPIO_36		0x37ff</div><div class='add'>+			VF610_PAD_PTB15__GPIO_37		0x37ff</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_nfc: nfcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD23__NF_IO7		0x28df</div><div class='add'>+			VF610_PAD_PTD22__NF_IO6		0x28df</div><div class='add'>+			VF610_PAD_PTD21__NF_IO5		0x28df</div><div class='add'>+			VF610_PAD_PTD20__NF_IO4		0x28df</div><div class='add'>+			VF610_PAD_PTD19__NF_IO3		0x28df</div><div class='add'>+			VF610_PAD_PTD18__NF_IO2		0x28df</div><div class='add'>+			VF610_PAD_PTD17__NF_IO1		0x28df</div><div class='add'>+			VF610_PAD_PTD16__NF_IO0		0x28df</div><div class='add'>+			VF610_PAD_PTB24__NF_WE_B	0x28c2</div><div class='add'>+			VF610_PAD_PTB25__NF_CE0_B	0x28c2</div><div class='add'>+			VF610_PAD_PTB27__NF_RE_B	0x28c2</div><div class='add'>+			VF610_PAD_PTC26__NF_RB_B	0x283d</div><div class='add'>+			VF610_PAD_PTC27__NF_ALE		0x28c2</div><div class='add'>+			VF610_PAD_PTC28__NF_CLE		0x28c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm0: pwm0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB0__FTM0_CH0		0x1182</div><div class='add'>+			VF610_PAD_PTB1__FTM0_CH1		0x1182</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB8__FTM1_CH0		0x1182</div><div class='add'>+			VF610_PAD_PTB9__FTM1_CH1		0x1182</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart0: uart0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB10__UART0_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTB11__UART0_RX		0x21a1</div><div class='add'>+			VF610_PAD_PTB12__UART0_RTS		0x21a2</div><div class='add'>+			VF610_PAD_PTB13__UART0_CTS		0x21a1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD0__UART2_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTD1__UART2_RX		0x21a1</div><div class='add'>+			VF610_PAD_PTD2__UART2_RTS		0x21a2</div><div class='add'>+			VF610_PAD_PTD3__UART2_CTS		0x21a1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbh1_reg: gpio_usb_vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD4__GPIO_83			0x22ed</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi<br/>index 8af7ed56e653..ae3403c766d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf500-colibri.dtsi</a></div><div class='hunk'>@@ -40,30 +40,28 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-colibri {</div><div class='del'>-		pinctrl_touchctrl_idle: touchctrl_idle {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA18__GPIO_8		0x006d</div><div class='del'>-				VF610_PAD_PTA19__GPIO_9		0x006c</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_touchctrl_idle: touchctrl_idlegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA18__GPIO_8		0x006d</div><div class='add'>+			VF610_PAD_PTA19__GPIO_9		0x006c</div><div class='add'>+			&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_touchctrl_default: touchctrl_default {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA18__ADC0_SE0	0x0040</div><div class='del'>-				VF610_PAD_PTA19__ADC0_SE1	0x0040</div><div class='del'>-				VF610_PAD_PTA16__ADC1_SE0	0x0040</div><div class='del'>-				VF610_PAD_PTB2__ADC1_SE2	0x0040</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_touchctrl_default: touchctrl_defaultgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA18__ADC0_SE0	0x0040</div><div class='add'>+			VF610_PAD_PTA19__ADC0_SE1	0x0040</div><div class='add'>+			VF610_PAD_PTA16__ADC1_SE0	0x0040</div><div class='add'>+			VF610_PAD_PTB2__ADC1_SE2	0x0040</div><div class='add'>+			&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_touchctrl_gpios: touchctrl_gpios {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA23__GPIO_13	0x22e9</div><div class='del'>-				VF610_PAD_PTB23__GPIO_93	0x22e9</div><div class='del'>-				VF610_PAD_PTA22__GPIO_12	0x22e9</div><div class='del'>-				VF610_PAD_PTA11__GPIO_4		0x22e9</div><div class='del'>-				&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_touchctrl_gpios: touchctrl_gpiosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA23__GPIO_13	0x22e9</div><div class='add'>+			VF610_PAD_PTB23__GPIO_93	0x22e9</div><div class='add'>+			VF610_PAD_PTA22__GPIO_12	0x22e9</div><div class='add'>+			VF610_PAD_PTA11__GPIO_4		0x22e9</div><div class='add'>+			&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf500.dtsi b/arch/arm/boot/dts/nxp/vf/vf500.dtsi<br/>index 0c0dd442300a..71ccdaa6f269 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf500.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf500.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf500.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf500.dtsi</a></div><div class='hunk'>@@ -43,15 +43,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		bus@40080000 {</div><div class='del'>-			pmu@40089000 {</div><div class='del'>-				compatible = "arm,cortex-a5-pmu";</div><div class='del'>-				interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-affinity = &lt;&amp;a5_cpu&gt;;</div><div class='del'>-				reg = &lt;0x40089000 0x1000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a5-pmu";</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;a5_cpu&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mscm_ir&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts b/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts<br/>index 722182f5fd17..e36c854dc297 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-bk4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-bk4.dts</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	spidev0@0 {</div><div class='del'>-		compatible = "lwn,bk4";</div><div class='add'>+		compatible = "lwn,bk4-spi";</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		fsl,spi-cs-sck-delay = &lt;200&gt;;</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> 	#address-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	slave {</div><div class='del'>-		compatible = "lwn,bk4";</div><div class='add'>+		compatible = "lwn,bk4-spi";</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -458,7 +458,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_spi: pinctrl-gpio-spi {</div><div class='add'>+	pinctrl_gpio_spi: pinctrl-gpio-spigrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB18__GPIO_40        0x1183</div><div class='ctx'> 			VF610_PAD_PTD10__GPIO_89        0x1183</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi<br/>index 607cec2df861..20aed3946214 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-colibri.dtsi</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Toradex Colibri VF61 COM";</div><div class='del'>-	compatible = "toradex,vf610-colibri_vf61", "fsl,vf610";</div><div class='ctx'> </div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts b/arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts<br/>index 703f375d7e24..f1e6344b0c69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-cosmic.dts</a></div><div class='hunk'>@@ -47,39 +47,37 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-cosmic {</div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='del'>-				VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='del'>-				VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='del'>-				VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='del'>-				VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='del'>-				VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='del'>-				VF610_PAD_PTB28__GPIO_98	0x219d</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='add'>+			VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='add'>+			VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='add'>+			VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='add'>+			VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='add'>+			VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='add'>+			VF610_PAD_PTB28__GPIO_98	0x219d</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec1: fec1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='del'>-				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='del'>-				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='del'>-				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='del'>-				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='del'>-				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='del'>-				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='del'>-				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec1: fec1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='add'>+			VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='add'>+			VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='add'>+			VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='add'>+			VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='add'>+			VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='add'>+			VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='add'>+			VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='add'>+			VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-twr.dts b/arch/arm/boot/dts/nxp/vf/vf610-twr.dts<br/>index 876c14ecceb6..e7c2f6d46ab2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-twr.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-twr.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-twr.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-twr.dts</a></div><div class='hunk'>@@ -166,131 +166,129 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-twr {</div><div class='del'>-		pinctrl_adc0_ad5: adc0ad5grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTC30__ADC0_SE5		0xa1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_adc0_ad5: adc0ad5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTC30__ADC0_SE5		0xa1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_dspi0: dspi0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB19__DSPI0_CS0		0x1182</div><div class='del'>-				VF610_PAD_PTB20__DSPI0_SIN		0x1181</div><div class='del'>-				VF610_PAD_PTB21__DSPI0_SOUT		0x1182</div><div class='del'>-				VF610_PAD_PTB22__DSPI0_SCK		0x1182</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_dspi0: dspi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB19__DSPI0_CS0		0x1182</div><div class='add'>+			VF610_PAD_PTB20__DSPI0_SIN		0x1181</div><div class='add'>+			VF610_PAD_PTB21__DSPI0_SOUT		0x1182</div><div class='add'>+			VF610_PAD_PTB22__DSPI0_SCK		0x1182</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_esdhc1: esdhc1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='del'>-				VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='del'>-				VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='del'>-				VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='del'>-				VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='del'>-				VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='del'>-				VF610_PAD_PTA7__GPIO_134	0x219d</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_esdhc1: esdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA24__ESDHC1_CLK	0x31ef</div><div class='add'>+			VF610_PAD_PTA25__ESDHC1_CMD	0x31ef</div><div class='add'>+			VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef</div><div class='add'>+			VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef</div><div class='add'>+			VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef</div><div class='add'>+			VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef</div><div class='add'>+			VF610_PAD_PTA7__GPIO_134	0x219d</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec0: fec0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA6__RMII_CLKIN		0x30d1</div><div class='del'>-				VF610_PAD_PTC0__ENET_RMII0_MDC		0x30d3</div><div class='del'>-				VF610_PAD_PTC1__ENET_RMII0_MDIO		0x30d1</div><div class='del'>-				VF610_PAD_PTC2__ENET_RMII0_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC3__ENET_RMII0_RXD1		0x30d1</div><div class='del'>-				VF610_PAD_PTC4__ENET_RMII0_RXD0		0x30d1</div><div class='del'>-				VF610_PAD_PTC5__ENET_RMII0_RXER		0x30d1</div><div class='del'>-				VF610_PAD_PTC6__ENET_RMII0_TXD1		0x30d2</div><div class='del'>-				VF610_PAD_PTC7__ENET_RMII0_TXD0		0x30d2</div><div class='del'>-				VF610_PAD_PTC8__ENET_RMII0_TXEN		0x30d2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec0: fec0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA6__RMII_CLKIN		0x30d1</div><div class='add'>+			VF610_PAD_PTC0__ENET_RMII0_MDC		0x30d3</div><div class='add'>+			VF610_PAD_PTC1__ENET_RMII0_MDIO		0x30d1</div><div class='add'>+			VF610_PAD_PTC2__ENET_RMII0_CRS		0x30d1</div><div class='add'>+			VF610_PAD_PTC3__ENET_RMII0_RXD1		0x30d1</div><div class='add'>+			VF610_PAD_PTC4__ENET_RMII0_RXD0		0x30d1</div><div class='add'>+			VF610_PAD_PTC5__ENET_RMII0_RXER		0x30d1</div><div class='add'>+			VF610_PAD_PTC6__ENET_RMII0_TXD1		0x30d2</div><div class='add'>+			VF610_PAD_PTC7__ENET_RMII0_TXD0		0x30d2</div><div class='add'>+			VF610_PAD_PTC8__ENET_RMII0_TXEN		0x30d2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_fec1: fec1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='del'>-				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='del'>-				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='del'>-				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='del'>-				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='del'>-				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='del'>-				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='del'>-				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='del'>-				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_fec1: fec1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2</div><div class='add'>+			VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3</div><div class='add'>+			VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1</div><div class='add'>+			VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1</div><div class='add'>+			VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1</div><div class='add'>+			VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1</div><div class='add'>+			VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2</div><div class='add'>+			VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2</div><div class='add'>+			VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_i2c0: i2c0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB14__I2C0_SCL		0x30d3</div><div class='del'>-				VF610_PAD_PTB15__I2C0_SDA		0x30d3</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_i2c0: i2c0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB14__I2C0_SCL		0x30d3</div><div class='add'>+			VF610_PAD_PTB15__I2C0_SDA		0x30d3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_nfc: nfcgrp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD31__NF_IO15	0x28df</div><div class='del'>-				VF610_PAD_PTD30__NF_IO14	0x28df</div><div class='del'>-				VF610_PAD_PTD29__NF_IO13	0x28df</div><div class='del'>-				VF610_PAD_PTD28__NF_IO12	0x28df</div><div class='del'>-				VF610_PAD_PTD27__NF_IO11	0x28df</div><div class='del'>-				VF610_PAD_PTD26__NF_IO10	0x28df</div><div class='del'>-				VF610_PAD_PTD25__NF_IO9		0x28df</div><div class='del'>-				VF610_PAD_PTD24__NF_IO8		0x28df</div><div class='del'>-				VF610_PAD_PTD23__NF_IO7		0x28df</div><div class='del'>-				VF610_PAD_PTD22__NF_IO6		0x28df</div><div class='del'>-				VF610_PAD_PTD21__NF_IO5		0x28df</div><div class='del'>-				VF610_PAD_PTD20__NF_IO4		0x28df</div><div class='del'>-				VF610_PAD_PTD19__NF_IO3		0x28df</div><div class='del'>-				VF610_PAD_PTD18__NF_IO2		0x28df</div><div class='del'>-				VF610_PAD_PTD17__NF_IO1		0x28df</div><div class='del'>-				VF610_PAD_PTD16__NF_IO0		0x28df</div><div class='del'>-				VF610_PAD_PTB24__NF_WE_B	0x28c2</div><div class='del'>-				VF610_PAD_PTB25__NF_CE0_B	0x28c2</div><div class='del'>-				VF610_PAD_PTB27__NF_RE_B	0x28c2</div><div class='del'>-				VF610_PAD_PTC26__NF_RB_B	0x283d</div><div class='del'>-				VF610_PAD_PTC27__NF_ALE		0x28c2</div><div class='del'>-				VF610_PAD_PTC28__NF_CLE		0x28c2</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_nfc: nfcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD31__NF_IO15	0x28df</div><div class='add'>+			VF610_PAD_PTD30__NF_IO14	0x28df</div><div class='add'>+			VF610_PAD_PTD29__NF_IO13	0x28df</div><div class='add'>+			VF610_PAD_PTD28__NF_IO12	0x28df</div><div class='add'>+			VF610_PAD_PTD27__NF_IO11	0x28df</div><div class='add'>+			VF610_PAD_PTD26__NF_IO10	0x28df</div><div class='add'>+			VF610_PAD_PTD25__NF_IO9		0x28df</div><div class='add'>+			VF610_PAD_PTD24__NF_IO8		0x28df</div><div class='add'>+			VF610_PAD_PTD23__NF_IO7		0x28df</div><div class='add'>+			VF610_PAD_PTD22__NF_IO6		0x28df</div><div class='add'>+			VF610_PAD_PTD21__NF_IO5		0x28df</div><div class='add'>+			VF610_PAD_PTD20__NF_IO4		0x28df</div><div class='add'>+			VF610_PAD_PTD19__NF_IO3		0x28df</div><div class='add'>+			VF610_PAD_PTD18__NF_IO2		0x28df</div><div class='add'>+			VF610_PAD_PTD17__NF_IO1		0x28df</div><div class='add'>+			VF610_PAD_PTD16__NF_IO0		0x28df</div><div class='add'>+			VF610_PAD_PTB24__NF_WE_B	0x28c2</div><div class='add'>+			VF610_PAD_PTB25__NF_CE0_B	0x28c2</div><div class='add'>+			VF610_PAD_PTB27__NF_RE_B	0x28c2</div><div class='add'>+			VF610_PAD_PTC26__NF_RB_B	0x283d</div><div class='add'>+			VF610_PAD_PTC27__NF_ALE		0x28c2</div><div class='add'>+			VF610_PAD_PTC28__NF_CLE		0x28c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_pwm0: pwm0grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB0__FTM0_CH0		0x1582</div><div class='del'>-				VF610_PAD_PTB1__FTM0_CH1		0x1582</div><div class='del'>-				VF610_PAD_PTB2__FTM0_CH2		0x1582</div><div class='del'>-				VF610_PAD_PTB3__FTM0_CH3		0x1582</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_pwm0: pwm0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB0__FTM0_CH0		0x1582</div><div class='add'>+			VF610_PAD_PTB1__FTM0_CH1		0x1582</div><div class='add'>+			VF610_PAD_PTB2__FTM0_CH2		0x1582</div><div class='add'>+			VF610_PAD_PTB3__FTM0_CH3		0x1582</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_sai2: sai2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA16__SAI2_TX_BCLK		0x02ed</div><div class='del'>-				VF610_PAD_PTA18__SAI2_TX_DATA		0x02ee</div><div class='del'>-				VF610_PAD_PTA19__SAI2_TX_SYNC		0x02ed</div><div class='del'>-				VF610_PAD_PTA21__SAI2_RX_BCLK		0x02ed</div><div class='del'>-				VF610_PAD_PTA22__SAI2_RX_DATA		0x02ed</div><div class='del'>-				VF610_PAD_PTA23__SAI2_RX_SYNC		0x02ed</div><div class='del'>-				VF610_PAD_PTB18__EXT_AUDIO_MCLK		0x02ed</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA16__SAI2_TX_BCLK		0x02ed</div><div class='add'>+			VF610_PAD_PTA18__SAI2_TX_DATA		0x02ee</div><div class='add'>+			VF610_PAD_PTA19__SAI2_TX_SYNC		0x02ed</div><div class='add'>+			VF610_PAD_PTA21__SAI2_RX_BCLK		0x02ed</div><div class='add'>+			VF610_PAD_PTA22__SAI2_RX_DATA		0x02ed</div><div class='add'>+			VF610_PAD_PTA23__SAI2_RX_SYNC		0x02ed</div><div class='add'>+			VF610_PAD_PTB18__EXT_AUDIO_MCLK		0x02ed</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart1: uart1grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB4__UART1_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTB5__UART1_RX		0x21a1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTB6__UART2_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTB7__UART2_RX		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTB6__UART2_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTB7__UART2_RX		0x21a1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts<br/>index 7e72f860c3c5..929426c1299c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts</a></div><div class='hunk'>@@ -68,8 +68,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_optical&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		i2c-bus = &lt;&amp;i2c0&gt;;</div><div class='del'>-		los-gpio = &lt;&amp;gpio4 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		tx-disable-gpio = &lt;&amp;gpio3 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		los-gpios = &lt;&amp;gpio4 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-disable-gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	supply-voltage-monitor {</div><div class='hunk'>@@ -333,7 +333,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debuggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD3__GPIO_82			0x31c2</div><div class='ctx'> 			VF610_PAD_PTE3__GPIO_108		0x31c2</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts<br/>index 029f49be40e3..be6147239362 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts</a></div><div class='hunk'>@@ -412,13 +412,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {</div><div class='add'>+	pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTE27__GPIO_132	0x33e2</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_spi0: pinctrl-gpio-spi0 {</div><div class='add'>+	pinctrl_gpio_spi0: pinctrl-gpio-spi0-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB22__GPIO_44	0x33e2</div><div class='ctx'> 			VF610_PAD_PTB21__GPIO_43	0x33e2</div><div class='hunk'>@@ -428,7 +428,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_mdio_mux: pinctrl-mdio-mux {</div><div class='add'>+	pinctrl_mdio_mux: pinctrl-mdio-mux-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTA18__GPIO_8		0x31c2</div><div class='ctx'> 			VF610_PAD_PTA19__GPIO_9		0x31c2</div><div class='hunk'>@@ -437,7 +437,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pca9554_22: pinctrl-pca95540-22 {</div><div class='add'>+	pinctrl_pca9554_22: pinctrl-pca95540-22-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB28__GPIO_98	0x219d</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts<br/>index 6f9878f124c4..79ea7cf57a4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dts</a></div><div class='hunk'>@@ -311,7 +311,7 @@</div><div class='ctx'> 	 *    I/O14 - OPT1_TX_DIS</div><div class='ctx'> 	 *    I/O15 - OPT2_TX_DIS</div><div class='ctx'> 	 */</div><div class='del'>-	gpio6: sx1503@20 {</div><div class='add'>+	gpio6: pinctrl@20 {</div><div class='ctx'> 		compatible = "semtech,sx1503q";</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -392,7 +392,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio0 {</div><div class='del'>-	eth0_intrp {</div><div class='add'>+	eth0-intrp-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;23 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='hunk'>@@ -401,7 +401,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio3 {</div><div class='del'>-	eth0_intrp {</div><div class='add'>+	eth0-intrp-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='hunk'>@@ -429,7 +429,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctr_atzb_rf_233: pinctrl-atzb-rf-233 {</div><div class='add'>+	pinctr_atzb_rf_233: pinctrl-atzb-rf-233grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB2__GPIO_24		0x31c2</div><div class='ctx'> 			VF610_PAD_PTE27__GPIO_132	0x33e2</div><div class='hunk'>@@ -437,7 +437,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	pinctrl_sx1503_20: pinctrl-sx1503-20 {</div><div class='add'>+	pinctrl_sx1503_20: pinctrl-sx1503-20grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB1__GPIO_23		0x219d</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -450,7 +450,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_mdio_mux: pinctrl-mdio-mux {</div><div class='add'>+	pinctrl_mdio_mux: pinctrl-mdio-muxgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTA18__GPIO_8		0x31c2</div><div class='ctx'> 			VF610_PAD_PTA19__GPIO_9		0x31c2</div><div class='hunk'>@@ -458,7 +458,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_fec0_phy_int: pinctrl-fec0-phy-int {</div><div class='add'>+	pinctrl_fec0_phy_int: pinctrl-fec0-phy-intgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB28__GPIO_98	0x219d</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi b/arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi<br/>index ce5e52896b19..91cc496ffb90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-dev.dtsi</a></div><div class='hunk'>@@ -335,7 +335,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_spi0: pinctrl-gpio-spi0 {</div><div class='add'>+	pinctrl_gpio_spi0: pinctrl-gpio-spi0-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB22__GPIO_44	0x33e2</div><div class='ctx'> 			VF610_PAD_PTB21__GPIO_43	0x33e2</div><div class='hunk'>@@ -345,19 +345,19 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {</div><div class='add'>+	pinctrl_gpio_switch0: pinctrl-gpio-switch0-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB5__GPIO_27		0x219d</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_switch1: pinctrl-gpio-switch1 {</div><div class='add'>+	pinctrl_gpio_switch1: pinctrl-gpio-switch1-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB4__GPIO_26		0x219d</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {</div><div class='add'>+	pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			 VF610_PAD_PTE14__GPIO_119	0x31c2</div><div class='ctx'> 			 &gt;;</div><div class='hunk'>@@ -370,7 +370,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c0_gpio: i2c0grp-gpio {</div><div class='add'>+	pinctrl_i2c0_gpio: i2c0-gpio-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB14__GPIO_36	0x31c2</div><div class='ctx'> 			VF610_PAD_PTB15__GPIO_37	0x31c2</div><div class='hunk'>@@ -392,7 +392,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debug-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			 VF610_PAD_PTD20__GPIO_74	0x31c2</div><div class='ctx'> 			 &gt;;</div><div class='hunk'>@@ -436,7 +436,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usb_vbus: pinctrl-usb-vbus {</div><div class='add'>+	pinctrl_usb_vbus: pinctrl-usb-vbus-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTA16__GPIO_6	0x31c2</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts<br/>index 77492eeea450..8020a644dd9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts</a></div><div class='hunk'>@@ -583,7 +583,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	gpio9: io-expander@20 {</div><div class='add'>+	gpio9: pinctrl@20 {</div><div class='ctx'> 		compatible = "semtech,sx1503q";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_sx1503_20&gt;;</div><div class='hunk'>@@ -623,7 +623,6 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-mux@70 {</div><div class='ctx'> 		compatible = "nxp,pca9548";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='hunk'>@@ -662,7 +661,6 @@</div><div class='ctx'> </div><div class='ctx'> 	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9548";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		reg = &lt;0x71&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -747,7 +745,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_dspi2: dspi2gpio {</div><div class='add'>+	pinctrl_dspi2: dspi2gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD30__GPIO_64		0x33e2</div><div class='ctx'> 			VF610_PAD_PTD29__GPIO_65		0x33e1</div><div class='hunk'>@@ -819,13 +817,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debuggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			 VF610_PAD_PTB26__GPIO_96		0x31c2</div><div class='ctx'> 		   &gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_mdio_mux: pinctrl-mdio-mux {</div><div class='add'>+	pinctrl_mdio_mux: pinctrl-mdio-muxgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTE27__GPIO_132		0x31c2</div><div class='ctx'> 			VF610_PAD_PTE28__GPIO_133		0x31c2</div><div class='hunk'>@@ -845,7 +843,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_sx1503_20: pinctrl-sx1503-20 {</div><div class='add'>+	pinctrl_sx1503_20: pinctrl-sx1503-20grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD31__GPIO_63		0x219d</div><div class='ctx'> 			&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts<br/>index 2a490464660c..423d185c971f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts</a></div><div class='hunk'>@@ -323,7 +323,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {</div><div class='add'>+	pinctrl_gpio_switch0: pinctrl-gpio-switch0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB28__GPIO_98		0x219d</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -343,7 +343,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debuggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD3__GPIO_82			0x31c2</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts<br/>index 078d8699e16d..d5c7f710c314 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts</a></div><div class='hunk'>@@ -284,13 +284,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_phy9: pinctrl-gpio-phy9 {</div><div class='add'>+	pinctrl_gpio_phy9: pinctrl-gpio-phy9grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB24__GPIO_94		0x219d</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {</div><div class='add'>+	pinctrl_gpio_switch0: pinctrl-gpio-switch0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB28__GPIO_98		0x219d</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -310,7 +310,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debuggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD3__GPIO_82			0x31c2</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts<br/>index 22c8f44390a9..344cc2b4d0ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts</a></div><div class='hunk'>@@ -330,7 +330,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_gpio_switch0: pinctrl-gpio-switch0 {</div><div class='add'>+	pinctrl_gpio_switch0: pinctrl-gpio-switch0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTB28__GPIO_98		0x219d</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -350,7 +350,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_leds_debug: pinctrl-leds-debug {</div><div class='add'>+	pinctrl_leds_debug: pinctrl-leds-debuggrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			VF610_PAD_PTD3__GPIO_82			0x31c2</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts b/arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts<br/>index 2c2db47af441..86d32f54c250 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dts</a></div><div class='hunk'>@@ -50,14 +50,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-colibri {</div><div class='del'>-		pinctrl_uart2: uart2grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTD0__UART2_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTD1__UART2_RX		0x21a1</div><div class='del'>-				VF610_PAD_PTD2__UART2_RTS		0x21a2</div><div class='del'>-				VF610_PAD_PTD3__UART2_CTS		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTD0__UART2_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTD1__UART2_RX		0x21a1</div><div class='add'>+			VF610_PAD_PTD2__UART2_RTS		0x21a2</div><div class='add'>+			VF610_PAD_PTD3__UART2_CTS		0x21a1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts b/arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts<br/>index f7474c11aabd..454b484368cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610m4-cosmic.dts</a></div><div class='hunk'>@@ -79,12 +79,10 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	vf610-cosmic {</div><div class='del'>-		pinctrl_uart3: uart3grp {</div><div class='del'>-			fsl,pins = &lt;</div><div class='del'>-				VF610_PAD_PTA20__UART3_TX		0x21a2</div><div class='del'>-				VF610_PAD_PTA21__UART3_RX		0x21a1</div><div class='del'>-			&gt;;</div><div class='del'>-		};</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			VF610_PAD_PTA20__UART3_TX		0x21a2</div><div class='add'>+			VF610_PAD_PTA21__UART3_RX		0x21a1</div><div class='add'>+		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vf610m4.dtsi b/arch/arm/boot/dts/nxp/vf/vf610m4.dtsi<br/>index 2bb331a87721..648d219e1d0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vf610m4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vf610m4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vf610m4.dtsi</a></div><div class='hunk'>@@ -55,3 +55,7 @@</div><div class='ctx'> &amp;mscm_ir {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;nvic&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;nvic {</div><div class='add'>+	arm,num-irq-priority-bits = &lt;4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi b/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi<br/>index acccf9a3c898..568d81807c81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/nxp/vf/vfxxx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/nxp/vf/vfxxx.dtsi</a></div><div class='hunk'>@@ -158,8 +158,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks VF610_CLK_DSPI0&gt;;</div><div class='ctx'> 				clock-names = "dspi";</div><div class='ctx'> 				spi-num-chipselects = &lt;6&gt;;</div><div class='del'>-				dmas = &lt;&amp;edma1 1 12&gt;, &lt;&amp;edma1 1 13&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='add'>+				dmas = &lt;&amp;edma1 1 13&gt;, &lt;&amp;edma1 1 12&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -172,8 +172,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks VF610_CLK_DSPI1&gt;;</div><div class='ctx'> 				clock-names = "dspi";</div><div class='ctx'> 				spi-num-chipselects = &lt;4&gt;;</div><div class='del'>-				dmas = &lt;&amp;edma1 1 14&gt;, &lt;&amp;edma1 1 15&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='add'>+				dmas = &lt;&amp;edma1 1 15&gt;, &lt;&amp;edma1 1 14&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -304,7 +304,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			iomuxc: iomuxc@40048000 {</div><div class='add'>+			iomuxc: pinctrl@40048000 {</div><div class='ctx'> 				compatible = "fsl,vf610-iomuxc";</div><div class='ctx'> 				reg = &lt;0x40048000 0x1000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -318,6 +318,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc 0 0 32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpio1: gpio@4004a000 {</div><div class='hunk'>@@ -329,6 +330,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc 0 32 32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpio2: gpio@4004b000 {</div><div class='hunk'>@@ -340,6 +342,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc 0 64 32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpio3: gpio@4004c000 {</div><div class='hunk'>@@ -351,6 +354,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc 0 96 32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpio4: gpio@4004d000 {</div><div class='hunk'>@@ -362,6 +366,7 @@</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc 0 128 7&gt;;</div><div class='add'>+				ngpios = &lt;7&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			anatop: anatop@40050000 {</div><div class='hunk'>@@ -529,9 +534,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks VF610_CLK_DSPI2&gt;;</div><div class='ctx'> 				clock-names = "dspi";</div><div class='ctx'> 				spi-num-chipselects = &lt;2&gt;;</div><div class='del'>-				dmas = &lt;&amp;edma1 0 10&gt;,</div><div class='del'>-					&lt;&amp;edma1 0 11&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='add'>+				dmas = &lt;&amp;edma1 0 11&gt;, &lt;&amp;edma1 0 10&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -544,8 +548,8 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks VF610_CLK_DSPI3&gt;;</div><div class='ctx'> 				clock-names = "dspi";</div><div class='ctx'> 				spi-num-chipselects = &lt;2&gt;;</div><div class='del'>-				dmas = &lt;&amp;edma1 0 12&gt;, &lt;&amp;edma1 0 13&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='add'>+				dmas = &lt;&amp;edma1 0 13&gt;, &lt;&amp;edma1 0 12&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -604,7 +608,7 @@</div><div class='ctx'> </div><div class='ctx'> 			ftm: ftm@400b8000 {</div><div class='ctx'> 				compatible = "fsl,ftm-timer";</div><div class='del'>-				reg = &lt;0x400b8000 0x1000 0x400b9000 0x1000&gt;;</div><div class='add'>+				reg = &lt;0x400b8000 0x1000&gt;, &lt;0x400b9000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-names = "ftm-evt", "ftm-src",</div><div class='ctx'> 					"ftm-evt-counter-en", "ftm-src-counter-en";</div><div class='hunk'>@@ -678,7 +682,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			nfc: nand@400e0000 {</div><div class='add'>+			nfc: nand-controller@400e0000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				compatible = "fsl,vf610-nfc";</div><div class='hunk'>@@ -725,13 +729,13 @@</div><div class='ctx'> 				clocks = &lt;&amp;clks VF610_CLK_CAAM&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='ctx'> </div><div class='del'>-				sec_jr0: jr0@1000 {</div><div class='add'>+				sec_jr0: jr@1000 {</div><div class='ctx'> 					compatible = "fsl,sec-v4.0-job-ring";</div><div class='ctx'> 					reg = &lt;0x1000 0x1000&gt;;</div><div class='ctx'> 					interrupts = &lt;102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				sec_jr1: jr1@2000 {</div><div class='add'>+				sec_jr1: jr@2000 {</div><div class='ctx'> 					compatible = "fsl,sec-v4.0-job-ring";</div><div class='ctx'> 					reg = &lt;0x2000 0x1000&gt;;</div><div class='ctx'> 					interrupts = &lt;102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile<br/>index f06c6d425e91..c7873dcef154 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/Makefile</a></div><div class='hunk'>@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \</div><div class='ctx'> 	qcom-apq8064-ifc6410.dtb \</div><div class='ctx'> 	qcom-apq8064-sony-xperia-lagan-yuga.dtb \</div><div class='ctx'> 	qcom-apq8064-asus-nexus7-flo.dtb \</div><div class='add'>+	qcom-apq8064-lg-nexus4-mako.dtb \</div><div class='ctx'> 	qcom-apq8074-dragonboard.dtb \</div><div class='ctx'> 	qcom-apq8084-ifc6540.dtb \</div><div class='ctx'> 	qcom-apq8084-mtp.dtb \</div><div class='hunk'>@@ -42,10 +43,12 @@ dtb-$(CONFIG_ARCH_QCOM) += \</div><div class='ctx'> 	qcom-msm8926-samsung-matisselte.dtb \</div><div class='ctx'> 	qcom-msm8960-cdp.dtb \</div><div class='ctx'> 	qcom-msm8960-samsung-expressatt.dtb \</div><div class='add'>+	qcom-msm8960-sony-huashan.dtb \</div><div class='ctx'> 	qcom-msm8974-lge-nexus5-hammerhead.dtb \</div><div class='ctx'> 	qcom-msm8974-samsung-hlte.dtb \</div><div class='ctx'> 	qcom-msm8974-sony-xperia-rhine-amami.dtb \</div><div class='ctx'> 	qcom-msm8974-sony-xperia-rhine-honami.dtb \</div><div class='add'>+	qcom-msm8974-sony-xperia-rhine-togari.dtb \</div><div class='ctx'> 	qcom-msm8974pro-fairphone-fp2.dtb \</div><div class='ctx'> 	qcom-msm8974pro-htc-m8.dtb \</div><div class='ctx'> 	qcom-msm8974pro-oneplus-bacon.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts<br/>index 5dbca83f2230..e6392f7d14c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts</a></div><div class='hunk'>@@ -31,6 +31,15 @@</div><div class='ctx'> 			vsp-supply = &lt;&amp;reg_lcd_pos&gt;;</div><div class='ctx'> 			vsn-supply = &lt;&amp;reg_lcd_neg&gt;;</div><div class='ctx'> 			vddio-supply = &lt;&amp;vddio_disp_vreg&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_BYTE0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_ESC0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MMSS_MISC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_PCLK0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc MDSS_VSYNC_CLK&gt;;</div><div class='add'>+			power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -53,9 +62,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* TI TPS22902 */</div><div class='ctx'> 	vddio_disp_vreg: regulator-vddio-disp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vddio_disp";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		gpio = &lt;&amp;tlmm 34 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;pm8226_l8&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;300&gt;;</div><div class='hunk'>@@ -97,6 +109,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp1_i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	magnetometer@c {</div><div class='hunk'>@@ -126,6 +139,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp1_i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	regulator@3e {</div><div class='hunk'>@@ -136,8 +150,8 @@</div><div class='ctx'> </div><div class='ctx'> 		reg_lcd_pos: outp {</div><div class='ctx'> 			regulator-name = "outp";</div><div class='del'>-			regulator-min-microvolt = &lt;4000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;5400000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5400000&gt;;</div><div class='ctx'> 			regulator-active-discharge = &lt;1&gt;;</div><div class='ctx'> 			regulator-boot-on;</div><div class='ctx'> 			enable-gpios = &lt;&amp;tlmm 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -145,8 +159,8 @@</div><div class='ctx'> </div><div class='ctx'> 		reg_lcd_neg: outn {</div><div class='ctx'> 			regulator-name = "outn";</div><div class='del'>-			regulator-min-microvolt = &lt;4000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;5400000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;5400000&gt;;</div><div class='ctx'> 			regulator-active-discharge = &lt;1&gt;;</div><div class='ctx'> 			regulator-boot-on;</div><div class='ctx'> 			enable-gpios = &lt;&amp;tlmm 33 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/msm8926.dtsi b/arch/arm/boot/dts/qcom/msm8926.dtsi<br/>new file mode 100644<br/>index 000000000000..629654c525b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/msm8926.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/msm8926.dtsi</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Luca Weiss &lt;luca@lucaweiss.eu&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;modem {</div><div class='add'>+	compatible = "qcom,msm8926-mss-pil";</div><div class='add'>+	/delete-property/ qcom,ext-bhs-reg;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/pm8921.dtsi b/arch/arm/boot/dts/qcom/pm8921.dtsi<br/>index 058962af3005..535cb6a2543f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/pm8921.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/pm8921.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/pm8921.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/pm8921.dtsi</a></div><div class='hunk'>@@ -17,6 +17,12 @@</div><div class='ctx'> 			pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pm8921_vibrator: vibrator@4a {</div><div class='add'>+			compatible = "qcom,pm8921-vib";</div><div class='add'>+			reg = &lt;0x4a&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pm8921_mpps: mpps@50 {</div><div class='ctx'> 			compatible = "qcom,pm8921-mpp",</div><div class='ctx'> 				     "qcom,ssbi-mpp";</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts<br/>index da3be658e822..4546fa8beba4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='ctx'> #include "qcom-msm8226-samsung-matisse-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts<br/>index 7d519156d91d..a8543ca7b556 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts</a></div><div class='hunk'>@@ -12,6 +12,8 @@</div><div class='ctx'> #include "pm8226.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;adsp_region;</div><div class='add'>+/delete-node/ &amp;mba_region;</div><div class='add'>+/delete-node/ &amp;mpss_region;</div><div class='ctx'> /delete-node/ &amp;smem_region;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts<br/>index b3ff8010b149..717bfd74edb7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts</a></div><div class='hunk'>@@ -138,7 +138,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;hdmi {</div><div class='ctx'> 	core-vdda-supply = &lt;&amp;pm8921_hdmi_switch&gt;;</div><div class='del'>-	hpd-gpios = &lt;&amp;tlmm_pinmux 72 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts b/arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts<br/>new file mode 100644<br/>index 000000000000..fdbbc1389297<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8064-lg-nexus4-mako.dts</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mfd/qcom-rpm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qcom-apq8064-v2.0.dtsi"</div><div class='add'>+#include "pm8821.dtsi"</div><div class='add'>+#include "pm8921.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "LG Nexus 4 (mako)";</div><div class='add'>+	compatible = "lg,nexus4-mako", "qcom,apq8064";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;gsbi7_serial;</div><div class='add'>+		serial1 = &amp;gsbi6_serial;</div><div class='add'>+		serial2 = &amp;gsbi4_serial;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	battery_cell: battery-cell {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		constant-charge-current-max-microamp = &lt;900000&gt;;</div><div class='add'>+		operating-range-celsius = &lt;0 45&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@88d00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x88d00000 0x100000&gt;;</div><div class='add'>+			record-size = &lt;0x20000&gt;;</div><div class='add'>+			console-size = &lt;0x20000&gt;;</div><div class='add'>+			ftrace-size = &lt;0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi1 {</div><div class='add'>+	qcom,mode = &lt;GSBI_PROT_I2C&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi1_i2c {</div><div class='add'>+	clock-frequency = &lt;200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi4 {</div><div class='add'>+	qcom,mode = &lt;GSBI_PROT_I2C_UART&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi4_serial {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8821 {</div><div class='add'>+	interrupts-extended = &lt;&amp;tlmm_pinmux 76 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8921 {</div><div class='add'>+	interrupts-extended = &lt;&amp;tlmm_pinmux 74 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8921_keypad {</div><div class='add'>+	linux,keymap = &lt;</div><div class='add'>+		MATRIX_KEY(0, 0, KEY_VOLUMEDOWN)</div><div class='add'>+		MATRIX_KEY(0, 1, KEY_VOLUMEUP)</div><div class='add'>+	&gt;;</div><div class='add'>+</div><div class='add'>+	keypad,num-rows = &lt;1&gt;;</div><div class='add'>+	keypad,num-columns = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;riva {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;riva_wlan_pin_a&gt;, &lt;&amp;riva_bt_pin_a&gt;, &lt;&amp;riva_fm_pin_a&gt;;</div><div class='add'>+</div><div class='add'>+	vddcx-supply = &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+	vddmx-supply = &lt;&amp;pm8921_l24&gt;;</div><div class='add'>+	vddpx-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	iris {</div><div class='add'>+		vddxo-supply = &lt;&amp;pm8921_l4&gt;;</div><div class='add'>+		vddrfa-supply = &lt;&amp;pm8921_s2&gt;;</div><div class='add'>+		vddpa-supply = &lt;&amp;pm8921_l10&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;pm8921_lvs2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm {</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,rpm-pm8921-regulators";</div><div class='add'>+</div><div class='add'>+		vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vdd_l24-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+		vdd_l25-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+		vdd_l26-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vdd_l27-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vdd_l28-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vin_lvs1_3_6-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vin_lvs2-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+		vin_lvs4_5_7-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+		pm8921_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* mipi_dsi.1-dsi1_pll_vdda */</div><div class='add'>+		pm8921_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* msm_otg-HSUSB_3p3 */</div><div class='add'>+		pm8921_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* msm_otg-HSUSB_1p8 */</div><div class='add'>+		pm8921_l4: l4 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* msm_sdcc.1-sdc_vdd */</div><div class='add'>+		pm8921_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* earjack_debug */</div><div class='add'>+		pm8921_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* mipi_dsi.1-dsi_vci */</div><div class='add'>+		pm8921_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* wcnss_wlan.0-iris_vddpa */</div><div class='add'>+		pm8921_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* mipi_dsi.1-dsi1_avdd */</div><div class='add'>+		pm8921_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* touch_vdd */</div><div class='add'>+		pm8921_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* slimport_dvdd */</div><div class='add'>+		pm8921_l18: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* touch_io */</div><div class='add'>+		pm8921_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * mipi_dsi.1-dsi_vddio</div><div class='add'>+		 * pil_qdsp6v4.1-pll_vdd</div><div class='add'>+		 * pil_qdsp6v4.2-pll_vdd</div><div class='add'>+		 * msm_ehci_host.0-HSUSB_1p8</div><div class='add'>+		 * msm_ehci_host.1-HSUSB_1p8</div><div class='add'>+		 */</div><div class='add'>+		pm8921_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * tabla2x-slim-CDC_VDDA_A_1P2V</div><div class='add'>+		 * tabla2x-slim-VDDD_CDC_D</div><div class='add'>+		 */</div><div class='add'>+		pm8921_l24: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l25: l25 {</div><div class='add'>+			regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1250000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l26: l26 {</div><div class='add'>+			regulator-min-microvolt = &lt;375000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l27: l27 {</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l28: l28 {</div><div class='add'>+			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* wcnss_wlan.0-iris_vddio */</div><div class='add'>+		pm8921_lvs1: lvs1 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* wcnss_wlan.0-iris_vdddig */</div><div class='add'>+		pm8921_lvs2: lvs2 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs3: lvs3 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs4: lvs4 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs5: lvs5 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* mipi_dsi.1-dsi_iovcc */</div><div class='add'>+		pm8921_lvs6: lvs6 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * pil_riva-pll_vdd</div><div class='add'>+		 * lvds.0-lvds_vdda</div><div class='add'>+		 * mipi_dsi.1-dsi1_vddio</div><div class='add'>+		 * hdmi_msm.0-hdmi_vdda</div><div class='add'>+		 */</div><div class='add'>+		pm8921_lvs7: lvs7 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_ncp: ncp {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Buck SMPS */</div><div class='add'>+		pm8921_s1: s1 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* msm otg HSUSB_VDDCX */</div><div class='add'>+		pm8921_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;4800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * msm_sdcc.1-sdc-vdd_io</div><div class='add'>+		 * tabla2x-slim-CDC_VDDA_RX</div><div class='add'>+		 * tabla2x-slim-CDC_VDDA_TX</div><div class='add'>+		 * tabla2x-slim-CDC_VDD_CP</div><div class='add'>+		 * tabla2x-slim-VDDIO_CDC</div><div class='add'>+		 */</div><div class='add'>+		pm8921_s4: s4 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			qcom,force-mode = &lt;QCOM_RPM_FORCE_MODE_AUTO&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * supply vdd_l26, vdd_l27, vdd_l28</div><div class='add'>+		 */</div><div class='add'>+		pm8921_s7: s7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s8: s8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;sdcc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8921_l5&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi<br/>index ac7494ed633e..09062b2ad8ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8064.dtsi</a></div><div class='hunk'>@@ -36,58 +36,58 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw3&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: cpu-spc {</div><div class='add'>+			cpu_spc: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;400&gt;;</div><div class='hunk'>@@ -213,12 +213,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sfpb_mutex: hwmutex {</div><div class='del'>-		compatible = "qcom,sfpb-mutex";</div><div class='del'>-		syscon = &lt;&amp;sfpb_wrapper_mutex 0x604 0x4&gt;;</div><div class='del'>-		#hwlock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	smem {</div><div class='ctx'> 		compatible = "qcom,smem";</div><div class='ctx'> 		memory-region = &lt;&amp;smem_region&gt;;</div><div class='hunk'>@@ -284,6 +278,40 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	replicator {</div><div class='add'>+		compatible = "arm,coresight-static-replicator";</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='add'>+		clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			port {</div><div class='add'>+				replicator_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				replicator_out0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;etb_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				replicator_out1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;tpiu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -305,14 +333,16 @@</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;ps_hold_default_state&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sfpb_wrapper_mutex: syscon@1200000 {</div><div class='del'>-			compatible = "syscon";</div><div class='del'>-			reg = &lt;0x01200000 0x8000&gt;;</div><div class='add'>+		sfpb_mutex: hwmutex@1200600 {</div><div class='add'>+			compatible = "qcom,sfpb-mutex";</div><div class='add'>+			reg = &lt;0x01200600 0x100&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@2000000 {</div><div class='ctx'> 			compatible = "qcom,msm-qgic2";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x02000000 0x1000&gt;,</div><div class='ctx'> 			      &lt;0x02002000 0x1000&gt;;</div><div class='hunk'>@@ -326,6 +356,8 @@</div><div class='ctx'> 				     &lt;GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;;</div><div class='ctx'> 			reg = &lt;0x0200a000 0x100&gt;;</div><div class='ctx'> 			clock-frequency = &lt;27000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			clock-names = "sleep";</div><div class='ctx'> 			cpu-offset = &lt;0x80000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -405,8 +437,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sps_sic_non_secure: sps-sic-non-secure@12100000 {</div><div class='del'>-			compatible = "syscon";</div><div class='add'>+		sps_sic_non_secure: interrupt-controller@12100000 {</div><div class='add'>+			compatible = "qcom,apq8064-sps-sic", "syscon";</div><div class='ctx'> 			reg = &lt;0x12100000 0x10000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -675,7 +707,7 @@</div><div class='ctx'> 			tsens_calib: calib@404 {</div><div class='ctx'> 				reg = &lt;0x404 0x10&gt;;</div><div class='ctx'> 			};</div><div class='del'>-			tsens_backup: backup_calib@414 {</div><div class='add'>+			tsens_backup: backup-calib@414 {</div><div class='ctx'> 				reg = &lt;0x414 0x10&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -737,7 +769,8 @@</div><div class='ctx'> 				 &lt;&amp;dsi0_phy 0&gt;,</div><div class='ctx'> 				 &lt;&amp;dsi1_phy 1&gt;,</div><div class='ctx'> 				 &lt;&amp;dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;hdmi_phy&gt;;</div><div class='add'>+				 &lt;&amp;hdmi_phy&gt;,</div><div class='add'>+				 &lt;&amp;mdp&gt;;</div><div class='ctx'> 			clock-names = "pxo",</div><div class='ctx'> 				      "pll3",</div><div class='ctx'> 				      "pll8_vote",</div><div class='hunk'>@@ -745,7 +778,8 @@</div><div class='ctx'> 				      "dsi1pllbyte",</div><div class='ctx'> 				      "dsi2pll",</div><div class='ctx'> 				      "dsi2pllbyte",</div><div class='del'>-				      "hdmipll";</div><div class='add'>+				      "hdmipll",</div><div class='add'>+				      "lvdspll";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		l2cc: clock-controller@2011000 {</div><div class='hunk'>@@ -1089,7 +1123,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmss_sfpb: syscon@5700000 {</div><div class='del'>-			compatible = "syscon";</div><div class='add'>+			compatible = "qcom,apq8064-mmss-sfpb", "syscon";</div><div class='ctx'> 			reg = &lt;0x5700000 0x70&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1317,10 +1351,10 @@</div><div class='ctx'> 			interrupt-names = "msi";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 36 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 37 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 38 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 39 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> 			clocks = &lt;&amp;gcc PCIE_A_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_H_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_PHY_REF_CLK&gt;;</div><div class='hunk'>@@ -1404,13 +1438,19 @@</div><div class='ctx'> 				 &lt;&amp;mmcc MDP_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;mmcc MDP_LUT_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;mmcc HDMI_TV_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mmcc MDP_TV_CLK&gt;;</div><div class='add'>+				 &lt;&amp;mmcc MDP_TV_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mmcc LVDS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmcc RPM_PXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "core_clk",</div><div class='ctx'> 				      "iface_clk",</div><div class='ctx'> 				      "bus_clk",</div><div class='ctx'> 				      "lut_clk",</div><div class='ctx'> 				      "hdmi_clk",</div><div class='del'>-				      "tv_clk";</div><div class='add'>+				      "tv_clk",</div><div class='add'>+				      "lcdc_clk",</div><div class='add'>+				      "pxo";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;mdp_port0 0</div><div class='ctx'> 				  &amp;mdp_port0 2</div><div class='hunk'>@@ -1532,39 +1572,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		replicator {</div><div class='del'>-			compatible = "arm,coresight-static-replicator";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-</div><div class='del'>-			out-ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					replicator_out0: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;etb_in&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					replicator_out1: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;tpiu_in&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			in-ports {</div><div class='del'>-				port {</div><div class='del'>-					replicator_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;funnel_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		funnel@1a04000 {</div><div class='ctx'> 			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x1a04000 0x1000&gt;;</div><div class='hunk'>@@ -1625,7 +1632,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1643,7 +1650,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1661,7 +1668,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1679,7 +1686,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts<br/>index 6fce0112361f..34b0cf35fdac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts</a></div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8941_gpios {</div><div class='del'>-        msm_keys_default: pm8941-gpio-keys-state {</div><div class='add'>+	msm_keys_default: pm8941-gpio-keys-state {</div><div class='ctx'> 		pins = "gpio5", "gpio23";</div><div class='ctx'> 		function = "normal";</div><div class='ctx'> 		input-enable;</div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_NO&gt;;</div><div class='ctx'> 		power-source = &lt;PM8941_GPIO_S3&gt;; /* 1.8V */</div><div class='del'>-        };</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8941_lpg {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi<br/>index 014e6c5ee889..cee0694ef127 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-apq8084.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		smem_mem: smem_region@fa00000 {</div><div class='add'>+		smem_mem: smem-region@fa00000 {</div><div class='ctx'> 			reg = &lt;0xfa00000 0x200000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -32,10 +32,10 @@</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -43,10 +43,10 @@</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@2 {</div><div class='hunk'>@@ -54,10 +54,10 @@</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@3 {</div><div class='hunk'>@@ -65,13 +65,13 @@</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw3&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: cpu-spc {</div><div class='add'>+			cpu_spc: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;150&gt;;</div><div class='hunk'>@@ -311,7 +311,7 @@</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p1: s10_p1@d8 {</div><div class='add'>+			tsens_s10_p1: s10-p1@d8 {</div><div class='ctx'> 				reg = &lt;0xd8 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -371,137 +371,137 @@</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p2: s10_p2@e2 {</div><div class='add'>+			tsens_s10_p2: s10-p2@e2 {</div><div class='ctx'> 				reg = &lt;0xe2 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s5_p2_backup: s5-p2_backup@e3 {</div><div class='add'>+			tsens_s5_p2_backup: s5-p2-backup@e3 {</div><div class='ctx'> 				reg = &lt;0xe3 0x2&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_mode_backup: mode_backup@e3 {</div><div class='add'>+			tsens_mode_backup: mode-backup@e3 {</div><div class='ctx'> 				reg = &lt;0xe3 0x1&gt;;</div><div class='ctx'> 				bits = &lt;6 2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s6_p2_backup: s6-p2_backup@e4 {</div><div class='add'>+			tsens_s6_p2_backup: s6-p2-backup@e4 {</div><div class='ctx'> 				reg = &lt;0xe4 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s7_p2_backup: s7-p2_backup@e4 {</div><div class='add'>+			tsens_s7_p2_backup: s7-p2-backup@e4 {</div><div class='ctx'> 				reg = &lt;0xe4 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s8_p2_backup: s8-p2_backup@e5 {</div><div class='add'>+			tsens_s8_p2_backup: s8-p2-backup@e5 {</div><div class='ctx'> 				reg = &lt;0xe5 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s9_p2_backup: s9-p2_backup@e6 {</div><div class='add'>+			tsens_s9_p2_backup: s9-p2-backup@e6 {</div><div class='ctx'> 				reg = &lt;0xe6 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p2_backup: s10_p2_backup@e7 {</div><div class='add'>+			tsens_s10_p2_backup: s10-p2-backup@e7 {</div><div class='ctx'> 				reg = &lt;0xe7 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_base1_backup: base1_backup@440 {</div><div class='add'>+			tsens_base1_backup: base1-backup@440 {</div><div class='ctx'> 				reg = &lt;0x440 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s0_p1_backup: s0-p1_backup@441 {</div><div class='add'>+			tsens_s0_p1_backup: s0-p1-backup@441 {</div><div class='ctx'> 				reg = &lt;0x441 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s1_p1_backup: s1-p1_backup@442 {</div><div class='add'>+			tsens_s1_p1_backup: s1-p1-backup@442 {</div><div class='ctx'> 				reg = &lt;0x441 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s2_p1_backup: s2-p1_backup@442 {</div><div class='add'>+			tsens_s2_p1_backup: s2-p1-backup@442 {</div><div class='ctx'> 				reg = &lt;0x442 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s3_p1_backup: s3-p1_backup@443 {</div><div class='add'>+			tsens_s3_p1_backup: s3-p1-backup@443 {</div><div class='ctx'> 				reg = &lt;0x443 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s4_p1_backup: s4-p1_backup@444 {</div><div class='add'>+			tsens_s4_p1_backup: s4-p1-backup@444 {</div><div class='ctx'> 				reg = &lt;0x444 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s5_p1_backup: s5-p1_backup@444 {</div><div class='add'>+			tsens_s5_p1_backup: s5-p1-backup@444 {</div><div class='ctx'> 				reg = &lt;0x444 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s6_p1_backup: s6-p1_backup@445 {</div><div class='add'>+			tsens_s6_p1_backup: s6-p1-backup@445 {</div><div class='ctx'> 				reg = &lt;0x445 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s7_p1_backup: s7-p1_backup@446 {</div><div class='add'>+			tsens_s7_p1_backup: s7-p1-backup@446 {</div><div class='ctx'> 				reg = &lt;0x446 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_use_backup: use_backup@447 {</div><div class='add'>+			tsens_use_backup: use-backup@447 {</div><div class='ctx'> 				reg = &lt;0x447 0x1&gt;;</div><div class='ctx'> 				bits = &lt;5 3&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s8_p1_backup: s8-p1_backup@448 {</div><div class='add'>+			tsens_s8_p1_backup: s8-p1-backup@448 {</div><div class='ctx'> 				reg = &lt;0x448 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s9_p1_backup: s9-p1_backup@448 {</div><div class='add'>+			tsens_s9_p1_backup: s9-p1-backup@448 {</div><div class='ctx'> 				reg = &lt;0x448 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p1_backup: s10_p1_backup@449 {</div><div class='add'>+			tsens_s10_p1_backup: s10-p1-backup@449 {</div><div class='ctx'> 				reg = &lt;0x449 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_base2_backup: base2_backup@44a {</div><div class='add'>+			tsens_base2_backup: base2-backup@44a {</div><div class='ctx'> 				reg = &lt;0x44a 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s0_p2_backup: s0-p2_backup@44b {</div><div class='add'>+			tsens_s0_p2_backup: s0-p2-backup@44b {</div><div class='ctx'> 				reg = &lt;0x44b 0x3&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s1_p2_backup: s1-p2_backup@44c {</div><div class='add'>+			tsens_s1_p2_backup: s1-p2-backup@44c {</div><div class='ctx'> 				reg = &lt;0x44c 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s2_p2_backup: s2-p2_backup@44c {</div><div class='add'>+			tsens_s2_p2_backup: s2-p2-backup@44c {</div><div class='ctx'> 				reg = &lt;0x44c 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s3_p2_backup: s3-p2_backup@44d {</div><div class='add'>+			tsens_s3_p2_backup: s3-p2-backup@44d {</div><div class='ctx'> 				reg = &lt;0x44d 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s4_p2_backup: s4-p2_backup@44e {</div><div class='add'>+			tsens_s4_p2_backup: s4-p2-backup@44e {</div><div class='ctx'> 				reg = &lt;0x44e 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi<br/>index 0d23c03fae33..be76bc39ac27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi</a></div><div class='hunk'>@@ -166,16 +166,19 @@</div><div class='ctx'> 				label = "ART";</div><div class='ctx'> 				reg = &lt;0x00170000 0x00010000&gt;;</div><div class='ctx'> 				read-only;</div><div class='del'>-				compatible = "nvmem-cells";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-				precal_art_1000: precal@1000 {</div><div class='del'>-					reg = &lt;0x1000 0x2f20&gt;;</div><div class='del'>-				};</div><div class='add'>+				nvmem-layout {</div><div class='add'>+					compatible = "fixed-layout";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					precal_art_1000: precal@1000 {</div><div class='add'>+						reg = &lt;0x1000 0x2f20&gt;;</div><div class='add'>+					};</div><div class='ctx'> </div><div class='del'>-				precal_art_5000: precal@5000 {</div><div class='del'>-					reg = &lt;0x5000 0x2f20&gt;;</div><div class='add'>+					precal_art_5000: precal@5000 {</div><div class='add'>+						reg = &lt;0x5000 0x2f20&gt;;</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -248,7 +251,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	nvmem-cell-names = "pre-calibration";</div><div class='ctx'> 	nvmem-cells = &lt;&amp;precal_art_5000&gt;;</div><div class='del'>-	qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";</div><div class='add'>+	qcom,calibration-variant = "ALFA-Network-AP120C-AC";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb3_hs_phy {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts b/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts<br/>index ac3b30072a22..15baaf0d1529 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial_pins: serial-state{</div><div class='add'>+	serial_pins: serial-state {</div><div class='ctx'> 		pins = "gpio60", "gpio61";</div><div class='ctx'> 		function = "blsp_uart0";</div><div class='ctx'> 		bias-disable;</div><div class='hunk'>@@ -179,13 +179,13 @@</div><div class='ctx'> &amp;wifi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	qcom,ath10k-calibration-variant = "8devices-Jalapeno";</div><div class='add'>+	qcom,calibration-variant = "8devices-Jalapeno";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	qcom,ath10k-calibration-variant = "8devices-Jalapeno";</div><div class='add'>+	qcom,calibration-variant = "8devices-Jalapeno";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb3_ss_phy {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi<br/>index cc88cf5f0d9b..5a95a2d03c42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 				       "gpio64", "gpio65", "gpio66",</div><div class='ctx'> 				       "gpio67", "gpio68", "gpio69";</div><div class='ctx'> 				function = "qpic";</div><div class='del'>-                        };</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serial@78af000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi<br/>index 56415ab34083..8eeaab1c0be1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi</a></div><div class='hunk'>@@ -47,13 +47,12 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_APPS_CLK_SRC&gt;;</div><div class='ctx'> 			clock-frequency = &lt;0&gt;;</div><div class='del'>-			clock-latency = &lt;256000&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -61,13 +60,12 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_APPS_CLK_SRC&gt;;</div><div class='ctx'> 			clock-frequency = &lt;0&gt;;</div><div class='del'>-			clock-latency = &lt;256000&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -75,13 +73,12 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw2&gt;;</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_APPS_CLK_SRC&gt;;</div><div class='ctx'> 			clock-frequency = &lt;0&gt;;</div><div class='del'>-			clock-latency = &lt;256000&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -89,17 +86,16 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw3&gt;;</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_APPS_CLK_SRC&gt;;</div><div class='ctx'> 			clock-frequency = &lt;0&gt;;</div><div class='del'>-			clock-latency = &lt;256000&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -126,7 +122,7 @@</div><div class='ctx'> 		opp-716000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;716000000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;256000&gt;;</div><div class='del'>- 		};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='hunk'>@@ -179,6 +175,7 @@</div><div class='ctx'> 		intc: interrupt-controller@b000000 {</div><div class='ctx'> 			compatible = "qcom,msm-qgic2";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x0b000000 0x1000&gt;,</div><div class='ctx'> 			&lt;0x0b002000 0x1000&gt;;</div><div class='hunk'>@@ -432,10 +429,10 @@</div><div class='ctx'> 			interrupt-names = "msi";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 144 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 145 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_AXI_M_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_AXI_S_CLK&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi<br/>index 759a59c2bdbc..adedcc6da1da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -37,12 +37,12 @@</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -383,7 +383,7 @@</div><div class='ctx'> 			tsens_calib: calib@400 {</div><div class='ctx'> 				reg = &lt;0x400 0xb&gt;;</div><div class='ctx'> 			};</div><div class='del'>-			tsens_calib_backup: calib_backup@410 {</div><div class='add'>+			tsens_calib_backup: calib-backup@410 {</div><div class='ctx'> 				reg = &lt;0x410 0xb&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -527,6 +527,7 @@</div><div class='ctx'> 		intc: interrupt-controller@2000000 {</div><div class='ctx'> 			compatible = "qcom,msm-qgic2";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x02000000 0x1000&gt;,</div><div class='ctx'> 			      &lt;0x02002000 0x1000&gt;;</div><div class='hunk'>@@ -1076,10 +1077,10 @@</div><div class='ctx'> 			interrupt-names = "msi";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 36 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 37 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 38 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 39 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc PCIE_A_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_H_CLK&gt;,</div><div class='hunk'>@@ -1137,10 +1138,10 @@</div><div class='ctx'> 			interrupt-names = "msi";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 58 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 59 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 60 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 61 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc PCIE_1_A_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_1_H_CLK&gt;,</div><div class='hunk'>@@ -1198,10 +1199,10 @@</div><div class='ctx'> 			interrupt-names = "msi";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 72 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 73 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 74 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 75 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc PCIE_2_A_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc PCIE_2_H_CLK&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi<br/>index 573feb3218c3..7de8d6c55016 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a5";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			device_type = "cpu";</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> </div><div class='del'>-		L2: cache-controller@2040000 {</div><div class='add'>+		l2: cache-controller@2040000 {</div><div class='ctx'> 			compatible = "arm,pl310-cache";</div><div class='ctx'> 			reg = &lt;0x02040000 0x1000&gt;;</div><div class='ctx'> 			arm,data-latency = &lt;2 2 0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi<br/>index ca76bf8af75e..d4a32af0ef8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi</a></div><div class='hunk'>@@ -8,7 +8,11 @@</div><div class='ctx'>  * Copyright (c) 2023, Rayyan Ansari &lt;rayyan@ansari.sh&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "qcom-msm8226.dtsi"</div><div class='add'>+/*</div><div class='add'>+ * The .dts should first include qcom-msm8226.dtsi or msm8926.dtsi depending on</div><div class='add'>+ * the SoC on the given device.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> #include "pm8226.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts<br/>index 2c664b5934ec..f448c9088416 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='ctx'> #include "qcom-msm8226-microsoft-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts<br/>index 731c5c375678..94bf3b1ad1bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='ctx'> #include "qcom-msm8226-microsoft-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts<br/>index a28a83cb5340..d8cdb75dfbb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "qcom-msm8226.dtsi"</div><div class='ctx'> #include "qcom-msm8226-microsoft-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* This device has no magnetometer */</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi<br/>index a15a44fc0181..f1544a7e8369 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-matisse-common.dtsi</a></div><div class='hunk'>@@ -3,11 +3,17 @@</div><div class='ctx'>  * Copyright (c) 2022, Matti Lehtimäki &lt;matti.lehtimaki@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The .dts should first include qcom-msm8226.dtsi or msm8926.dtsi depending on</div><div class='add'>+ * the SoC on the given device.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include "qcom-msm8226.dtsi"</div><div class='ctx'> #include "pm8226.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;adsp_region;</div><div class='add'>+/delete-node/ &amp;mba_region;</div><div class='add'>+/delete-node/ &amp;mpss_region;</div><div class='ctx'> /delete-node/ &amp;smem_region;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -145,12 +151,12 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mpss@8400000 {</div><div class='add'>+		mpss_region: mpss@8400000 {</div><div class='ctx'> 			reg = &lt;0x08400000 0x1f00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mba@a300000 {</div><div class='add'>+		mba_region: mba@a300000 {</div><div class='ctx'> 			reg = &lt;0x0a300000 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -223,6 +229,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;modem {</div><div class='add'>+	mx-supply = &lt;&amp;pm8226_l3&gt;;</div><div class='add'>+	pll-supply = &lt;&amp;pm8226_l8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rpm_requests {</div><div class='ctx'> 	regulators {</div><div class='ctx'> 		compatible = "qcom,rpm-pm8226-regulators";</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts b/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts<br/>index 2ecc5983d365..08b50dc63923 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts</a></div><div class='hunk'>@@ -144,6 +144,8 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-0 = &lt;&amp;tsp_int_default&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		linux,keycodes = &lt;KEY_APPSELECT KEY_BACK&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi<br/>index 3a685ff7e8cc..51a7a3fb36d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8226.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8226.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8974.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-msm8974.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='hunk'>@@ -39,12 +40,12 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,msm8226-smp";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='hunk'>@@ -52,12 +53,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,msm8226-smp";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='hunk'>@@ -65,12 +66,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,msm8226-smp";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='hunk'>@@ -78,12 +79,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			enable-method = "qcom,msm8226-smp";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='hunk'>@@ -91,7 +92,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -213,6 +214,18 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mpss_region: mpss@8000000 {</div><div class='add'>+			reg = &lt;0x08000000 0x5100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mba_region: mba@d100000 {</div><div class='add'>+			reg = &lt;0x0d100000 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		adsp_region: adsp@dc00000 {</div><div class='ctx'> 			reg = &lt;0x0dc00000 0x1900000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -253,6 +266,65 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	smp2p-modem {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;435&gt;, &lt;428&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 27 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;apcs 14&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		modem_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		modem_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smsm {</div><div class='add'>+		compatible = "qcom,smsm";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;0&gt;, &lt;&amp;apcs 13&gt;, &lt;&amp;apcs 9&gt;, &lt;&amp;apcs 19&gt;;</div><div class='add'>+</div><div class='add'>+		apps_smsm: apps@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		modem_smsm: modem@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_smsm: adsp@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcnss_smsm: wcnss@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 144 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -845,12 +917,96 @@</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		bam_dmux_dma: dma-controller@fc834000 {</div><div class='add'>+			compatible = "qcom,bam-v1.4.0";</div><div class='add'>+			reg = &lt;0xfc834000 0x7000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-channels = &lt;6&gt;;</div><div class='add'>+			qcom,num-ees = &lt;1&gt;;</div><div class='add'>+			qcom,powered-remotely;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		modem: remoteproc@fc880000 {</div><div class='add'>+			compatible = "qcom,msm8226-mss-pil";</div><div class='add'>+			reg = &lt;0xfc880000 0x4040&gt;,</div><div class='add'>+			      &lt;0xfc820000 0x10000&gt;;</div><div class='add'>+			reg-names = "qdsp6",</div><div class='add'>+				    "rmb";</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MSS_Q6_BIMC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BOOT_ROM_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "mem",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_MSS_RESTART&gt;;</div><div class='add'>+			reset-names = "mss_restart";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmpd MSM8226_VDDCX&gt;;</div><div class='add'>+			power-domain-names = "cx";</div><div class='add'>+</div><div class='add'>+			qcom,ext-bhs-reg = &lt;&amp;tcsr_regs_1 0x194&gt;;</div><div class='add'>+			qcom,halt-regs = &lt;&amp;tcsr_regs_1 0x180 0x200 0x280&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;mba_region&gt;, &lt;&amp;mpss_region&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			bam_dmux: bam-dmux {</div><div class='add'>+				compatible = "qcom,bam-dmux";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;modem_smsm&gt;;</div><div class='add'>+				interrupts = &lt;1 IRQ_TYPE_EDGE_BOTH&gt;, &lt;11 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+				interrupt-names = "pc", "pc-ack";</div><div class='add'>+</div><div class='add'>+				qcom,smem-states = &lt;&amp;apps_smsm 1&gt;, &lt;&amp;apps_smsm 11&gt;;</div><div class='add'>+				qcom,smem-state-names = "pc", "pc-ack";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;bam_dmux_dma 4&gt;, &lt;&amp;bam_dmux_dma 5&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			smd-edge {</div><div class='add'>+				interrupts = &lt;GIC_SPI 25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+				mboxes = &lt;&amp;apcs 12&gt;;</div><div class='add'>+				qcom,smd-edge = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				label = "modem";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tcsr_mutex: hwlock@fd484000 {</div><div class='ctx'> 			compatible = "qcom,msm8226-tcsr-mutex", "qcom,tcsr-mutex";</div><div class='ctx'> 			reg = &lt;0xfd484000 0x1000&gt;;</div><div class='ctx'> 			#hwlock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tcsr_regs_1: syscon@fd485000 {</div><div class='add'>+			compatible = "qcom,tcsr-msm8226", "syscon";</div><div class='add'>+			reg = &lt;0xfd485000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tlmm: pinctrl@fd510000 {</div><div class='ctx'> 			compatible = "qcom,msm8226-pinctrl";</div><div class='ctx'> 			reg = &lt;0xfd510000 0x4000&gt;;</div><div class='hunk'>@@ -983,8 +1139,8 @@</div><div class='ctx'> 				 &lt;&amp;gcc GPLL0_VOTE&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GPLL1_VOTE&gt;,</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_GFX3D_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;;</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo",</div><div class='ctx'> 				      "mmss_gpll0_vote",</div><div class='ctx'> 				      "gpll0_vote",</div><div class='hunk'>@@ -1060,8 +1216,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -1264,10 +1420,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1295,10 +1451,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi<br/>index a66c474cd1aa..3f69b98d0041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8660.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8660.dtsi</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 			enable-method = "qcom,gcc-msm8660";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -30,10 +30,10 @@</div><div class='ctx'> 			enable-method = "qcom,gcc-msm8660";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi<br/>index 1ba403b83cb1..94b7694eeeff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8916-smp.dtsi</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU_SLEEP_0 {</div><div class='add'>+&amp;cpu_sleep_0 {</div><div class='ctx'> 	compatible = "qcom,idle-state-spc", "arm,idle-state";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts<br/>index 3037344eb240..cb571aa13c11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts</a></div><div class='hunk'>@@ -5,10 +5,12 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "qcom-msm8226.dtsi"</div><div class='add'>+#include "msm8926.dtsi"</div><div class='ctx'> #include "pm8226.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;adsp_region;</div><div class='add'>+/delete-node/ &amp;mba_region;</div><div class='add'>+/delete-node/ &amp;mpss_region;</div><div class='ctx'> /delete-node/ &amp;smem_region;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -193,6 +195,16 @@</div><div class='ctx'> 	/* TPS61310 Flash/Torch @ 33 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;modem {</div><div class='add'>+	mx-supply = &lt;&amp;pm8226_l3&gt;;</div><div class='add'>+	pll-supply = &lt;&amp;pm8226_l8&gt;;</div><div class='add'>+	mss-supply = &lt;&amp;pm8226_s5&gt;;</div><div class='add'>+</div><div class='add'>+	firmware-name = "qcom/msm8926/memul/mba.b00", "qcom/msm8926/memul/modem.mdt";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm8226_vib {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts<br/>index 9b48661d69c5..eea4fd8cd972 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "msm8926.dtsi"</div><div class='ctx'> #include "qcom-msm8226-microsoft-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* This device has touchscreen on i2c3 instead */</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts<br/>index 55077a5f2e34..f23bbb94cc5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "msm8926.dtsi"</div><div class='ctx'> #include "qcom-msm8226-microsoft-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* This device has touchscreen on i2c1 instead */</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts<br/>index 376a33125941..db3273c755c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "qcom-msm8226.dtsi"</div><div class='add'>+#include "msm8926.dtsi"</div><div class='ctx'> #include "pm8226.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;smem_region;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts<br/>index d0e1bc39f8ef..73e19176eb97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8926-samsung-matisselte.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "msm8926.dtsi"</div><div class='ctx'> #include "qcom-msm8226-samsung-matisse-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -27,6 +28,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;modem {</div><div class='add'>+	mss-supply = &lt;&amp;pm8226_s5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	tsp_en1_default_state: tsp-en1-default-state {</div><div class='ctx'> 		pins = "gpio32";</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi<br/>index 4fa982771288..f18753e9f5ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi</a></div><div class='hunk'>@@ -18,4 +18,44 @@</div><div class='ctx'> 			bias-bus-hold;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sdcc3_default_state: sdcc3-default-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc3_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-pins {</div><div class='add'>+			pins = "sdc3_cmd";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "sdc3_data";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdcc3_sleep_state: sdcc3-sleep-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "sdc3_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-pins {</div><div class='add'>+			pins = "sdc3_cmd";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "sdc3_data";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts b/arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts<br/>index af6cc6393d74..49d117ea033a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts</a></div><div class='hunk'>@@ -71,6 +71,11 @@</div><div class='ctx'> &amp;sdcc3 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pm8921_l6&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;pm8921_l7&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdcc3_default_state&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdcc3_sleep_state&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts b/arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts<br/>new file mode 100644<br/>index 000000000000..f2f59fc8b9b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8960-sony-huashan.dts</a></div><div class='hunk'>@@ -0,0 +1,361 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Antony Kurniawan Soemardi &lt;linux@smankusors.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/qcom,gcc-msm8960.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qcom-msm8960.dtsi"</div><div class='add'>+#include "pm8921.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sony Xperia SP";</div><div class='add'>+	compatible = "sony,huashan", "qcom,msm8960t", "qcom,msm8960";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;gsbi8_serial;</div><div class='add'>+		mmc0 = &amp;sdcc1; /* SDCC1 eMMC slot */</div><div class='add'>+		mmc1 = &amp;sdcc3; /* SDCC3 SD card slot */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm8921_gpio 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pm8921_gpio 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi8 {</div><div class='add'>+	qcom,mode = &lt;GSBI_PROT_I2C_UART&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsbi8_serial {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8921 {</div><div class='add'>+	interrupts-extended = &lt;&amp;msmgpio 104 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8921_gpio {</div><div class='add'>+	keypad_default_state: keypad-default-state {</div><div class='add'>+		keypad-sense-pins {</div><div class='add'>+			pins = "gpio1", "gpio2", "gpio3", "gpio4", "gpio5";</div><div class='add'>+			function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			input-enable;</div><div class='add'>+			power-source = &lt;PM8921_GPIO_S4&gt;;</div><div class='add'>+			qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_NO&gt;;</div><div class='add'>+			qcom,pull-up-strength = &lt;PMIC_GPIO_PULL_UP_31P5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		keypad-drive-pins {</div><div class='add'>+			pins = "gpio9", "gpio10";</div><div class='add'>+			function = PMIC_GPIO_FUNC_FUNC1;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-low;</div><div class='add'>+			power-source = &lt;PM8921_GPIO_S4&gt;;</div><div class='add'>+			qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8921_keypad {</div><div class='add'>+	linux,keymap = &lt;</div><div class='add'>+		MATRIX_KEY(1, 0, KEY_CAMERA_FOCUS)</div><div class='add'>+		MATRIX_KEY(1, 1, KEY_CAMERA)</div><div class='add'>+	&gt;;</div><div class='add'>+	keypad,num-rows = &lt;2&gt;;</div><div class='add'>+	keypad,num-columns = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;keypad_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm {</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,rpm-pm8921-regulators";</div><div class='add'>+		vin_lvs1_3_6-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vin_lvs2-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vin_lvs4_5_7-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vdd_ncp-supply = &lt;&amp;pm8921_l6&gt;;</div><div class='add'>+		vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+		vdd_l21_l23_l29-supply = &lt;&amp;pm8921_s8&gt;;</div><div class='add'>+		vdd_l24-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+		vdd_l25-supply = &lt;&amp;pm8921_s1&gt;;</div><div class='add'>+		vdd_l26-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vdd_l27-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vdd_l28-supply = &lt;&amp;pm8921_s7&gt;;</div><div class='add'>+		vdd_l29-supply = &lt;&amp;pm8921_s8&gt;;</div><div class='add'>+</div><div class='add'>+		/* Buck SMPS */</div><div class='add'>+		pm8921_s1: s1 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;4800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s4: s4 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			qcom,force-mode = &lt;QCOM_RPM_FORCE_MODE_AUTO&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s7: s7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_s8: s8 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* PMOS LDO */</div><div class='add'>+		pm8921_l1: l1 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l4: l4 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l7: l7 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;2600000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;2600000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l17: l17 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l18: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l21: l21 {</div><div class='add'>+			regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;2750000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2750000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l23: l23 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l24: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_l25: l25 {</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Low Voltage Switch */</div><div class='add'>+		pm8921_lvs1: lvs1 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs2: lvs2 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs3: lvs3 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs4: lvs4 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs5: lvs5 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs6: lvs6 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_lvs7: lvs7 {</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8921_ncp: ncp {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdcc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8921_l5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdcc3 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8921_l6&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8921_l7&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdcc3_default_state&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdcc3_sleep_state&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hs1_phy {</div><div class='add'>+	v3p3-supply = &lt;&amp;pm8921_l3&gt;;</div><div class='add'>+	v1p8-supply = &lt;&amp;pm8921_l4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi<br/>index ebc43c5c6e5f..6e272d5345a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8960.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8960.dtsi</a></div><div class='hunk'>@@ -18,14 +18,14 @@</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		interrupts = &lt;GIC_PPI 14 0x304&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> </div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -35,12 +35,12 @@</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v1";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -52,9 +52,51 @@</div><div class='ctx'> 		reg = &lt;0x80000000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu0-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu_alert0: trip0 {</div><div class='add'>+					temperature = &lt;60000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_crit0: trip1 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu_alert1: trip0 {</div><div class='add'>+					temperature = &lt;60000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_crit1: trip1 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpu-pmu {</div><div class='ctx'> 		compatible = "qcom,krait-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 10 0x304&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> 		qcom,no-pc-write;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -107,14 +149,31 @@</div><div class='ctx'> 		timer@200a000 {</div><div class='ctx'> 			compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer",</div><div class='ctx'> 				     "qcom,msm-timer";</div><div class='del'>-			interrupts = &lt;GIC_PPI 1 0x301&gt;,</div><div class='del'>-				     &lt;GIC_PPI 2 0x301&gt;,</div><div class='del'>-				     &lt;GIC_PPI 3 0x301&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+				     &lt;GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+				     &lt;GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;;</div><div class='ctx'> 			reg = &lt;0x0200a000 0x100&gt;;</div><div class='ctx'> 			clock-frequency = &lt;27000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			clock-names = "sleep";</div><div class='ctx'> 			cpu-offset = &lt;0x80000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		qfprom: efuse@700000 {</div><div class='add'>+			compatible = "qcom,msm8960-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x00700000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			tsens_calib: calib@404 {</div><div class='add'>+				reg = &lt;0x404 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_backup: backup-calib@414 {</div><div class='add'>+				reg = &lt;0x414 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		msmgpio: pinctrl@800000 {</div><div class='ctx'> 			compatible = "qcom,msm8960-pinctrl";</div><div class='ctx'> 			gpio-controller;</div><div class='hunk'>@@ -127,7 +186,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gcc: clock-controller@900000 {</div><div class='del'>-			compatible = "qcom,gcc-msm8960";</div><div class='add'>+			compatible = "qcom,gcc-msm8960", "syscon";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			reg = &lt;0x900000 0x4000&gt;;</div><div class='hunk'>@@ -135,6 +194,18 @@</div><div class='ctx'> 				 &lt;&amp;pxo_board&gt;,</div><div class='ctx'> 				 &lt;&amp;lcc PLL4&gt;;</div><div class='ctx'> 			clock-names = "cxo", "pxo", "pll4";</div><div class='add'>+</div><div class='add'>+			tsens: thermal-sensor {</div><div class='add'>+				compatible = "qcom,msm8960-tsens";</div><div class='add'>+</div><div class='add'>+				nvmem-cells = &lt;&amp;tsens_calib&gt;, &lt;&amp;tsens_backup&gt;;</div><div class='add'>+				nvmem-cell-names = "calib", "calib_backup";</div><div class='add'>+				interrupts = &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "uplow";</div><div class='add'>+</div><div class='add'>+				#qcom,sensors = &lt;5&gt;;</div><div class='add'>+				#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		lcc: clock-controller@28000000 {</div><div class='hunk'>@@ -251,6 +322,8 @@</div><div class='ctx'> </div><div class='ctx'> 			syscon-tcsr = &lt;&amp;tcsr&gt;;</div><div class='ctx'> </div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='ctx'> 			gsbi5_serial: serial@16440000 {</div><div class='ctx'> 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='ctx'> 				reg = &lt;0x16440000 0x1000&gt;,</div><div class='hunk'>@@ -262,6 +335,34 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gsbi8: gsbi@1a000000  {</div><div class='add'>+			compatible = "qcom,gsbi-v1.0.0";</div><div class='add'>+			cell-index = &lt;8&gt;;</div><div class='add'>+			reg = &lt;0x1a000000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GSBI8_H_CLK&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			syscon-tcsr = &lt;&amp;tcsr&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gsbi8_serial: serial@1a040000 {</div><div class='add'>+				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='add'>+				reg = &lt;0x1a040000 0x1000&gt;,</div><div class='add'>+				      &lt;0x1a000000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GSBI8_UART_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GSBI8_H_CLK&gt;;</div><div class='add'>+				clock-names = "core",</div><div class='add'>+					      "iface";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ssbi: ssbi@500000 {</div><div class='ctx'> 			compatible = "qcom,ssbi";</div><div class='ctx'> 			reg = &lt;0x500000 0x1000&gt;;</div><div class='hunk'>@@ -279,7 +380,7 @@</div><div class='ctx'> 			compatible = "arm,pl18x", "arm,primecell";</div><div class='ctx'> 			arm,primecell-periphid = &lt;0x00051180&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-			reg = &lt;0x12180000 0x8000&gt;;</div><div class='add'>+			reg = &lt;0x12180000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc SDC3_CLK&gt;, &lt;&amp;gcc SDC3_H_CLK&gt;;</div><div class='ctx'> 			clock-names = "mclk", "apb_pclk";</div><div class='hunk'>@@ -289,13 +390,25 @@</div><div class='ctx'> 			max-frequency = &lt;192000000&gt;;</div><div class='ctx'> 			no-1-8-v;</div><div class='ctx'> 			vmmc-supply = &lt;&amp;vsdcc_fixed&gt;;</div><div class='add'>+			dmas = &lt;&amp;sdcc3bam 2&gt;, &lt;&amp;sdcc3bam 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdcc3bam: dma-controller@12182000 {</div><div class='add'>+			compatible = "qcom,bam-v1.3.0";</div><div class='add'>+			reg = &lt;0x12182000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc SDC3_H_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdcc1: mmc@12400000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			compatible = "arm,pl18x", "arm,primecell";</div><div class='ctx'> 			arm,primecell-periphid = &lt;0x00051180&gt;;</div><div class='del'>-			reg = &lt;0x12400000 0x8000&gt;;</div><div class='add'>+			reg = &lt;0x12400000 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc SDC1_CLK&gt;, &lt;&amp;gcc SDC1_H_CLK&gt;;</div><div class='ctx'> 			clock-names = "mclk", "apb_pclk";</div><div class='hunk'>@@ -305,6 +418,18 @@</div><div class='ctx'> 			cap-sd-highspeed;</div><div class='ctx'> 			cap-mmc-highspeed;</div><div class='ctx'> 			vmmc-supply = &lt;&amp;vsdcc_fixed&gt;;</div><div class='add'>+			dmas = &lt;&amp;sdcc1bam 2&gt;, &lt;&amp;sdcc1bam 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdcc1bam: dma-controller@12402000 {</div><div class='add'>+			compatible = "qcom,bam-v1.3.0";</div><div class='add'>+			reg = &lt;0x12402000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc SDC1_H_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		tcsr: syscon@1a400000 {</div><div class='hunk'>@@ -322,6 +447,8 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='ctx'> 			gsbi1_spi: spi@16080000 {</div><div class='ctx'> 				compatible = "qcom,spi-qup-v1.1.1";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts<br/>index fdb6e22986cf..b3127f0383cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='ctx'> 		serial0 = &amp;blsp1_uart1;</div><div class='ctx'> 		serial1 = &amp;blsp2_uart4;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -167,7 +168,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	avago_apds993@39 {</div><div class='add'>+	sensor@39 {</div><div class='ctx'> 		compatible = "avago,apds9930";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 61 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='hunk'>@@ -598,7 +599,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdc2_on&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;sdc2_off&gt;;</div><div class='ctx'> </div><div class='del'>-	bcrmf@1 {</div><div class='add'>+	wifi@1 {</div><div class='ctx'> 		compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts<br/>index 903bb4d12513..b7a1367d3470 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts</a></div><div class='hunk'>@@ -50,6 +50,34 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c-touchkey {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+</div><div class='add'>+		sda-gpios = &lt;&amp;tlmm 95 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;tlmm 96 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c_touchkey_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		touchkey@20 {</div><div class='add'>+			compatible = "cypress,midas-touchkey";</div><div class='add'>+			reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pm8941_gpios 29 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;touchkey_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			vcc-supply = &lt;&amp;pm8941_lvs3&gt;;</div><div class='add'>+			vdd-supply = &lt;&amp;pm8941_l13&gt;;</div><div class='add'>+</div><div class='add'>+			linux,keycodes = &lt;KEY_APPSELECT KEY_BACK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	touch_ldo: regulator-touch {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "touch-ldo";</div><div class='hunk'>@@ -149,6 +177,14 @@</div><div class='ctx'> 		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='ctx'> 		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	touchkey_pin: touchkey-int-state {</div><div class='add'>+		pins = "gpio29";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;PM8941_GPIO_S3&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='hunk'>@@ -332,6 +368,9 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pm8941_lvs1: lvs1 {};</div><div class='add'>+		pm8941_lvs3: lvs3 {};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -378,6 +417,12 @@</div><div class='ctx'> 		drive-strength = &lt;8&gt;;</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	i2c_touchkey_pins: i2c-touchkey-state {</div><div class='add'>+		pins = "gpio95", "gpio96";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts<br/>index 9f2ab5c122d0..472a45408add 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-amami.dts</a></div><div class='hunk'>@@ -5,6 +5,22 @@</div><div class='ctx'> 	model = "Sony Xperia Z1 Compact";</div><div class='ctx'> 	compatible = "sony,xperia-amami", "qcom,msm8974";</div><div class='ctx'> 	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		key-camera-snapshot {</div><div class='add'>+			label = "camera_snapshot";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-camera-focus {</div><div class='add'>+			label = "camera_focus";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;smbb {</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts<br/>index 9028f17e5c4a..c3d69641fc1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-honami.dts</a></div><div class='hunk'>@@ -5,4 +5,20 @@</div><div class='ctx'> 	model = "Sony Xperia Z1";</div><div class='ctx'> 	compatible = "sony,xperia-honami", "qcom,msm8974";</div><div class='ctx'> 	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		key-camera-snapshot {</div><div class='add'>+			label = "camera_snapshot";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-camera-focus {</div><div class='add'>+			label = "camera_focus";</div><div class='add'>+			gpios = &lt;&amp;pm8941_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts<br/>new file mode 100644<br/>index 000000000000..f60f7304d35e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine-togari.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "qcom-msm8974-sony-xperia-rhine.dtsi"</div><div class='add'>+</div><div class='add'>+/* Togari uses a different touchscreen compared to other rhine devices */</div><div class='add'>+/delete-node/ &amp;touchscreen;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sony Xperia Z Ultra";</div><div class='add'>+	compatible = "sony,xperia-togari", "qcom,msm8974";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8941_l23 {</div><div class='add'>+	regulator-min-microvolt = &lt;2600000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;2600000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi<br/>index d34659ebac22..d7322fc6a095 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='add'>+		mmc1 = &amp;sdhc_2;</div><div class='ctx'> 		serial0 = &amp;blsp1_uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -28,20 +30,6 @@</div><div class='ctx'> 			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		key-camera-snapshot {</div><div class='del'>-			label = "camera_snapshot";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-camera-focus {</div><div class='del'>-			label = "camera_focus";</div><div class='del'>-			gpios = &lt;&amp;pm8941_gpios 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;1&gt;;</div><div class='del'>-			linux,code = &lt;KEY_CAMERA_FOCUS&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		key-volume-up {</div><div class='ctx'> 			label = "volume_up";</div><div class='ctx'> 			gpios = &lt;&amp;pm8941_gpios 5 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -98,7 +86,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;355000&gt;;</div><div class='ctx'> </div><div class='del'>-	synaptics@2c {</div><div class='add'>+	touchscreen: synaptics@2c {</div><div class='ctx'> 		compatible = "syna,rmi4-i2c";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -446,6 +434,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;smbb {</div><div class='add'>+	usb-charge-current-limit = &lt;1800000&gt;;</div><div class='add'>+</div><div class='ctx'> 	qcom,fast-charge-safe-current = &lt;1500000&gt;;</div><div class='ctx'> 	qcom,fast-charge-current-limit = &lt;1500000&gt;;</div><div class='ctx'> 	qcom,dc-current-limit = &lt;1800000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi<br/>index 1bd87170252d..7e119370f337 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,msm8974.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8974.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-msm8974.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='hunk'>@@ -35,51 +36,51 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			compatible = "qcom,krait";</div><div class='ctx'> 			enable-method = "qcom,kpss-acc-v2";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw3&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SPC&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_spc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2: l2-cache {</div><div class='add'>+		l2: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -87,7 +88,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SPC: cpu-spc {</div><div class='add'>+			cpu_spc: cpu-spc {</div><div class='ctx'> 				compatible = "qcom,idle-state-spc",</div><div class='ctx'> 						"arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;150&gt;;</div><div class='hunk'>@@ -960,7 +961,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -978,7 +979,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -996,7 +997,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1014,7 +1015,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1299,7 +1300,7 @@</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p1: s10_p1@d8 {</div><div class='add'>+			tsens_s10_p1: s10-p1@d8 {</div><div class='ctx'> 				reg = &lt;0xd8 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1359,137 +1360,137 @@</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p2: s10_p2@e2 {</div><div class='add'>+			tsens_s10_p2: s10-p2@e2 {</div><div class='ctx'> 				reg = &lt;0xe2 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s5_p2_backup: s5-p2_backup@e3 {</div><div class='add'>+			tsens_s5_p2_backup: s5-p2-backup@e3 {</div><div class='ctx'> 				reg = &lt;0xe3 0x2&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_mode_backup: mode_backup@e3 {</div><div class='add'>+			tsens_mode_backup: mode-backup@e3 {</div><div class='ctx'> 				reg = &lt;0xe3 0x1&gt;;</div><div class='ctx'> 				bits = &lt;6 2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s6_p2_backup: s6-p2_backup@e4 {</div><div class='add'>+			tsens_s6_p2_backup: s6-p2-backup@e4 {</div><div class='ctx'> 				reg = &lt;0xe4 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s7_p2_backup: s7-p2_backup@e4 {</div><div class='add'>+			tsens_s7_p2_backup: s7-p2-backup@e4 {</div><div class='ctx'> 				reg = &lt;0xe4 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s8_p2_backup: s8-p2_backup@e5 {</div><div class='add'>+			tsens_s8_p2_backup: s8-p2-backup@e5 {</div><div class='ctx'> 				reg = &lt;0xe5 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s9_p2_backup: s9-p2_backup@e6 {</div><div class='add'>+			tsens_s9_p2_backup: s9-p2-backup@e6 {</div><div class='ctx'> 				reg = &lt;0xe6 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p2_backup: s10_p2_backup@e7 {</div><div class='add'>+			tsens_s10_p2_backup: s10-p2-backup@e7 {</div><div class='ctx'> 				reg = &lt;0xe7 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_base1_backup: base1_backup@440 {</div><div class='add'>+			tsens_base1_backup: base1-backup@440 {</div><div class='ctx'> 				reg = &lt;0x440 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s0_p1_backup: s0-p1_backup@441 {</div><div class='add'>+			tsens_s0_p1_backup: s0-p1-backup@441 {</div><div class='ctx'> 				reg = &lt;0x441 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s1_p1_backup: s1-p1_backup@442 {</div><div class='add'>+			tsens_s1_p1_backup: s1-p1-backup@442 {</div><div class='ctx'> 				reg = &lt;0x441 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s2_p1_backup: s2-p1_backup@442 {</div><div class='add'>+			tsens_s2_p1_backup: s2-p1-backup@442 {</div><div class='ctx'> 				reg = &lt;0x442 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s3_p1_backup: s3-p1_backup@443 {</div><div class='add'>+			tsens_s3_p1_backup: s3-p1-backup@443 {</div><div class='ctx'> 				reg = &lt;0x443 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s4_p1_backup: s4-p1_backup@444 {</div><div class='add'>+			tsens_s4_p1_backup: s4-p1-backup@444 {</div><div class='ctx'> 				reg = &lt;0x444 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s5_p1_backup: s5-p1_backup@444 {</div><div class='add'>+			tsens_s5_p1_backup: s5-p1-backup@444 {</div><div class='ctx'> 				reg = &lt;0x444 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s6_p1_backup: s6-p1_backup@445 {</div><div class='add'>+			tsens_s6_p1_backup: s6-p1-backup@445 {</div><div class='ctx'> 				reg = &lt;0x445 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s7_p1_backup: s7-p1_backup@446 {</div><div class='add'>+			tsens_s7_p1_backup: s7-p1-backup@446 {</div><div class='ctx'> 				reg = &lt;0x446 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_use_backup: use_backup@447 {</div><div class='add'>+			tsens_use_backup: use-backup@447 {</div><div class='ctx'> 				reg = &lt;0x447 0x1&gt;;</div><div class='ctx'> 				bits = &lt;5 3&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s8_p1_backup: s8-p1_backup@448 {</div><div class='add'>+			tsens_s8_p1_backup: s8-p1-backup@448 {</div><div class='ctx'> 				reg = &lt;0x448 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s9_p1_backup: s9-p1_backup@448 {</div><div class='add'>+			tsens_s9_p1_backup: s9-p1-backup@448 {</div><div class='ctx'> 				reg = &lt;0x448 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s10_p1_backup: s10_p1_backup@449 {</div><div class='add'>+			tsens_s10_p1_backup: s10-p1-backup@449 {</div><div class='ctx'> 				reg = &lt;0x449 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_base2_backup: base2_backup@44a {</div><div class='add'>+			tsens_base2_backup: base2-backup@44a {</div><div class='ctx'> 				reg = &lt;0x44a 0x2&gt;;</div><div class='ctx'> 				bits = &lt;2 8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s0_p2_backup: s0-p2_backup@44b {</div><div class='add'>+			tsens_s0_p2_backup: s0-p2-backup@44b {</div><div class='ctx'> 				reg = &lt;0x44b 0x3&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s1_p2_backup: s1-p2_backup@44c {</div><div class='add'>+			tsens_s1_p2_backup: s1-p2-backup@44c {</div><div class='ctx'> 				reg = &lt;0x44c 0x1&gt;;</div><div class='ctx'> 				bits = &lt;0 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s2_p2_backup: s2-p2_backup@44c {</div><div class='add'>+			tsens_s2_p2_backup: s2-p2-backup@44c {</div><div class='ctx'> 				reg = &lt;0x44c 0x2&gt;;</div><div class='ctx'> 				bits = &lt;6 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s3_p2_backup: s3-p2_backup@44d {</div><div class='add'>+			tsens_s3_p2_backup: s3-p2-backup@44d {</div><div class='ctx'> 				reg = &lt;0x44d 0x2&gt;;</div><div class='ctx'> 				bits = &lt;4 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			tsens_s4_p2_backup: s4-p2_backup@44e {</div><div class='add'>+			tsens_s4_p2_backup: s4-p2-backup@44e {</div><div class='ctx'> 				reg = &lt;0x44e 0x1&gt;;</div><div class='ctx'> 				bits = &lt;2 6&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1871,10 +1872,10 @@</div><div class='ctx'> 				 &lt;&amp;gcc GPLL0_VOTE&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GPLL1_VOTE&gt;,</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_GFX3D_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='hunk'>@@ -1961,8 +1962,10 @@</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;4&gt;;</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;, &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -2032,8 +2035,10 @@</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;4&gt;;</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;, &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts<br/>index 4c8edadea0ac..88ff6535477b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> 	qcom,board-id = &lt;8 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='ctx'> 		serial0 = &amp;blsp1_uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi<br/>index 68fa5859d263..05b79281df57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-sdx55.dtsi</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;rpmhpd SDX55_CX&gt;;</div><div class='del'>-			power-domain-names = "rpmhpd";</div><div class='add'>+			power-domain-names = "perf";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -340,10 +340,10 @@</div><div class='ctx'> 					  "msi8";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 141 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 144 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_AUX_CLK&gt;,</div><div class='hunk'>@@ -427,8 +427,9 @@</div><div class='ctx'> 			interrupt-names = "global",</div><div class='ctx'> 					  "doorbell";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;system_noc MASTER_PCIE &amp;mc_virt SLAVE_EBI_CH0&gt;;</div><div class='del'>-			interconnect-names = "pcie-mem";</div><div class='add'>+			interconnects = &lt;&amp;system_noc MASTER_PCIE &amp;mc_virt SLAVE_EBI_CH0&gt;,</div><div class='add'>+					&lt;&amp;mem_noc MASTER_AMPSS_M0 &amp;system_noc SLAVE_PCIE_0&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_PCIE_BCR&gt;;</div><div class='ctx'> 			reset-names = "core";</div><div class='hunk'>@@ -437,6 +438,7 @@</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> 			max-link-speed = &lt;3&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -612,6 +614,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x1a0 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_hsphy&gt;, &lt;&amp;usb_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -703,6 +707,7 @@</div><div class='ctx'> 			compatible = "qcom,msm-qgic2";</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x17800000 0x1000&gt;,</div><div class='ctx'> 			      &lt;0x17802000 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi<br/>index a949454212e9..c8e312dcd26b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/qcom/qcom-sdx65.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/qcom/qcom-sdx65.dtsi</a></div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;rpmhpd SDX65_CX_AO&gt;;</div><div class='del'>-			power-domain-names = "rpmhpd";</div><div class='add'>+			power-domain-names = "perf";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -335,6 +335,10 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "global", "doorbell";</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;system_noc MASTER_PCIE_0 &amp;mc_virt SLAVE_EBI1&gt;,</div><div class='add'>+					&lt;&amp;mem_noc MASTER_APPSS_PROC &amp;system_noc SLAVE_PCIE_0&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_PCIE_BCR&gt;;</div><div class='ctx'> 			reset-names = "core";</div><div class='ctx'> </div><div class='hunk'>@@ -345,6 +349,7 @@</div><div class='ctx'> </div><div class='ctx'> 			max-link-speed = &lt;3&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -525,6 +530,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x1a0 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_hsphy&gt;, &lt;&amp;usb_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -592,39 +599,39 @@</div><div class='ctx'> 			reg = &lt;0x15000000 0x40000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='del'>-			interrupts =	&lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17800000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/Makefile b/arch/arm/boot/dts/renesas/Makefile<br/>index 833a02447ecf..947c7fe02803 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/Makefile</a></div><div class='hunk'>@@ -30,4 +30,5 @@ dtb-$(CONFIG_ARCH_RENESAS) += \</div><div class='ctx'> 	r8a7794-alt.dtb \</div><div class='ctx'> 	r8a7794-silk.dtb \</div><div class='ctx'> 	r9a06g032-rzn1d400-db.dtb \</div><div class='add'>+	r9a06g032-rzn1d400-eb.dtb \</div><div class='ctx'> 	sh73a0-kzm9g.dtb</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/emev2-kzm9d.dts b/arch/arm/boot/dts/renesas/emev2-kzm9d.dts<br/>index 89495dd37358..9b64f98310f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/emev2-kzm9d.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/emev2-kzm9d.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/emev2-kzm9d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/emev2-kzm9d.dts</a></div><div class='hunk'>@@ -31,28 +31,28 @@</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='del'>-		one {</div><div class='add'>+		key-1 {</div><div class='ctx'> 			debounce-interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			label = "DSW2-1";</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		two {</div><div class='add'>+		key-2 {</div><div class='ctx'> 			debounce-interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			label = "DSW2-2";</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		three {</div><div class='add'>+		key-3 {</div><div class='ctx'> 			debounce-interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			label = "DSW2-3";</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		four {</div><div class='add'>+		key-4 {</div><div class='ctx'> 			debounce-interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			label = "DSW2-4";</div><div class='hunk'>@@ -83,8 +83,7 @@</div><div class='ctx'> 		compatible = "smsc,lan9221", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x20000000 0x10000&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		smsc,irq-active-high;</div><div class='ctx'> 		smsc,irq-push-pull;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi<br/>index 4351c5a02fa5..2cc2908b48ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi</a></div><div class='hunk'>@@ -219,8 +219,7 @@</div><div class='ctx'> 	touch: touchpanel@38 {</div><div class='ctx'> 		compatible = "edt,edt-ft5406";</div><div class='ctx'> 		reg = &lt;0x38&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;vcc_3v3_tft1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi b/arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi<br/>index de52218ceaa4..ca58ea93f58f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi</a></div><div class='hunk'>@@ -73,8 +73,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cec_clock&gt;;</div><div class='ctx'> 		clock-names = "cec";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s72100-genmai.dts b/arch/arm/boot/dts/renesas/r7s72100-genmai.dts<br/>index 29ba098f5dd5..3c3756509714 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-genmai.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-genmai.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-genmai.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r7s72100-genmai.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include "r7s72100.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/r7s72100-pinctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -24,11 +25,6 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory@8000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x08000000 0x08000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	flash@18000000 {</div><div class='ctx'> 		compatible = "mtd-rom";</div><div class='ctx'> 		reg = &lt;0x18000000 0x08000000&gt;;</div><div class='hunk'>@@ -53,13 +49,29 @@</div><div class='ctx'> </div><div class='ctx'> 			partition@4000000 {</div><div class='ctx'> 				label = "user1";</div><div class='del'>-				reg = &lt;0x04000000 0x40000000&gt;;</div><div class='add'>+				reg = &lt;0x04000000 0x04000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	keyboard {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;keyboard_pins&gt;;</div><div class='add'>+</div><div class='add'>+		key-1 {</div><div class='add'>+			/* JP3 must be set to 1-2 (default) */</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc 6 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			linux,code = &lt;KEY_1&gt;;</div><div class='add'>+			label = "SW6,SW7";</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='del'>-		status = "okay";</div><div class='add'>+		/* Needs SDHI0 to be disabled */</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='ctx'> 		led1 {</div><div class='hunk'>@@ -70,45 +82,20 @@</div><div class='ctx'> 			gpios = &lt;&amp;port4 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='ctx'> </div><div class='del'>-	scif2_pins: serial2 {</div><div class='del'>-		/* P3_0 as TxD2; P3_2 as RxD2 */</div><div class='del'>-		pinmux = &lt;RZA1_PINMUX(3, 0, 6)&gt;, &lt;RZA1_PINMUX(3, 2, 4)&gt;;</div><div class='add'>+	memory@8000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x08000000 0x08000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2_pins: i2c2 {</div><div class='del'>-		/* RIIC2: P1_4 as SCL, P1_5 as SDA */</div><div class='del'>-		pinmux = &lt;RZA1_PINMUX(1, 4, 1)&gt;, &lt;RZA1_PINMUX(1, 5, 1)&gt;;</div><div class='add'>+	cvcc2: regulator-mmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "Cvcc2";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	ether_pins: ether {</div><div class='del'>-		/* Ethernet on Ports 1,2,3,5 */</div><div class='del'>-		pinmux = &lt;RZA1_PINMUX(1, 14, 4)&gt;,/* P1_14 = ET_COL  */</div><div class='del'>-			 &lt;RZA1_PINMUX(5, 9, 2)&gt;, /* P5_9 = ET_MDC   */</div><div class='del'>-			 &lt;RZA1_PINMUX(3, 3, 2)&gt;, /* P3_3 = ET_MDIO */</div><div class='del'>-			 &lt;RZA1_PINMUX(3, 4, 2)&gt;, /* P3_4 = ET_RXCLK */</div><div class='del'>-			 &lt;RZA1_PINMUX(3, 5, 2)&gt;, /* P3_5 = ET_RXER  */</div><div class='del'>-			 &lt;RZA1_PINMUX(3, 6, 2)&gt;, /* P3_6 = ET_RXDV  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 0, 2)&gt;, /* P2_0 = ET_TXCLK */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 1, 2)&gt;, /* P2_1 = ET_TXER  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 2, 2)&gt;, /* P2_2 = ET_TXEN  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 3, 2)&gt;, /* P2_3 = ET_CRS   */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 4, 2)&gt;, /* P2_4 = ET_TXD0  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 5, 2)&gt;, /* P2_5 = ET_TXD1  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 6, 2)&gt;, /* P2_6 = ET_TXD2  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 7, 2)&gt;, /* P2_7 = ET_TXD3  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 8, 2)&gt;, /* P2_8 = ET_RXD0  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 9, 2)&gt;, /* P2_9 = ET_RXD1  */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 10, 2)&gt;,/* P2_10 = ET_RXD2 */</div><div class='del'>-			 &lt;RZA1_PINMUX(2, 11, 2)&gt;;/* P2_11 = ET_RXD3 */</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;extal_clk {</div><div class='del'>-	clock-frequency = &lt;13330000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;bsc {</div><div class='hunk'>@@ -167,18 +154,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_x1_clk {</div><div class='del'>-	clock-frequency = &lt;48000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rtc_x1_clk {</div><div class='del'>-	clock-frequency = &lt;32768&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mtu2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ether {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ether_pins&gt;;</div><div class='hunk'>@@ -194,6 +169,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;extal_clk {</div><div class='add'>+	clock-frequency = &lt;13330000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -208,6 +187,100 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mmcif {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmcif_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	cd-gpios = &lt;&amp;port3 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;cvcc2&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;cvcc2&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mtu2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ether_pins: ether {</div><div class='add'>+		/* Ethernet on Ports 1,2,3,5 */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(1, 14, 4)&gt;,/* P1_14 = ET_COL  */</div><div class='add'>+			 &lt;RZA1_PINMUX(5, 9, 2)&gt;, /* P5_9 = ET_MDC   */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 3, 2)&gt;, /* P3_3 = ET_MDIO */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 4, 2)&gt;, /* P3_4 = ET_RXCLK */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 5, 2)&gt;, /* P3_5 = ET_RXER  */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 6, 2)&gt;, /* P3_6 = ET_RXDV  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 0, 2)&gt;, /* P2_0 = ET_TXCLK */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 1, 2)&gt;, /* P2_1 = ET_TXER  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 2, 2)&gt;, /* P2_2 = ET_TXEN  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 3, 2)&gt;, /* P2_3 = ET_CRS   */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 4, 2)&gt;, /* P2_4 = ET_TXD0  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 5, 2)&gt;, /* P2_5 = ET_TXD1  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 6, 2)&gt;, /* P2_6 = ET_TXD2  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 7, 2)&gt;, /* P2_7 = ET_TXD3  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 8, 2)&gt;, /* P2_8 = ET_RXD0  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 9, 2)&gt;, /* P2_9 = ET_RXD1  */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 10, 2)&gt;,/* P2_10 = ET_RXD2 */</div><div class='add'>+			 &lt;RZA1_PINMUX(2, 11, 2)&gt;;/* P2_11 = ET_RXD3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2 {</div><div class='add'>+		/* RIIC2: P1_4 as SCL, P1_5 as SDA */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(1, 4, 1)&gt;, &lt;RZA1_PINMUX(1, 5, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keyboard_pins: keyboard {</div><div class='add'>+		/* P3_1 as IRQ6 */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(3, 1, 3)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmcif_pins: mmcif {</div><div class='add'>+		/* MMCIF: P3_8 is CD_GPIO, P3_10 up to P3_15, P4_0 up to P4_3 */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(3, 10, 8)&gt;,	/* MMC_D1 */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 11, 8)&gt;,	/* MMC_D0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 12, 8)&gt;,	/* MMC_CLK */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 13, 8)&gt;,	/* MMC_CMD */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 14, 8)&gt;,	/* MMC_D3 */</div><div class='add'>+			 &lt;RZA1_PINMUX(3, 15, 8)&gt;,	/* MMC_D2 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 0, 8)&gt;,	/* MMC_D4 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 1, 8)&gt;,	/* MMC_D5 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 2, 8)&gt;,	/* MMC_D6 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 3, 8)&gt;;	/* MMC_D7 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif2_pins: serial2 {</div><div class='add'>+		bootph-all;</div><div class='add'>+		/* P3_0 as TxD2; P3_2 as RxD2 */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(3, 0, 6)&gt;, &lt;RZA1_PINMUX(3, 2, 4)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_pins: sdhi0 {</div><div class='add'>+		/* SDHI0: P4_8 up to P4_15 */</div><div class='add'>+		pinmux = &lt;RZA1_PINMUX(4, 8, 3)&gt;,	/* SD_CD_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 9, 3)&gt;,	/* SD_WP_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 10, 3)&gt;,	/* SD_D1_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 11, 3)&gt;,	/* SD_D0_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 12, 3)&gt;,	/* SD_CLK_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 13, 3)&gt;,	/* SD_CMD_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 14, 3)&gt;,	/* SD_D3_0 */</div><div class='add'>+			 &lt;RZA1_PINMUX(4, 15, 3)&gt;;	/* SD_D2_0 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc_x1_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -215,7 +288,15 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_pins&gt;;</div><div class='ctx'> </div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -225,6 +306,16 @@</div><div class='ctx'> 	codec: codec@0 {</div><div class='ctx'> 		compatible = "wlf,wm8978";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;500000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_x1_clk {</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	timeout-sec = &lt;60&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts b/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts<br/>index 9d29861f23f1..23ddec217685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts</a></div><div class='hunk'>@@ -59,6 +59,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	scif2_pins: serial2 {</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		/* P6_2 as RxD2; P6_3 as TxD2 */</div><div class='ctx'> 		pinmux = &lt;RZA1_PINMUX(6, 2, 7)&gt;, &lt;RZA1_PINMUX(6, 3, 7)&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -99,6 +100,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ostm0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -109,7 +111,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='del'>-</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts b/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts<br/>index b547216d4801..91178fb9e721 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts</a></div><div class='hunk'>@@ -78,24 +78,21 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;keyboard_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 		key-1 {</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-			interrupts = &lt;3 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc 3 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			label = "SW1";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key-2 {</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc 2 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			label = "SW2";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key-3 {</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-			interrupts = &lt;5 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc 5 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			label = "SW3";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -202,6 +199,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Serial Console */</div><div class='ctx'> 	scif2_pins: serial2 {</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		pinmux = &lt;RZA1_PINMUX(3, 0, 6)&gt;,	/* TxD2 */</div><div class='ctx'> 			 &lt;RZA1_PINMUX(3, 2, 4)&gt;;	/* RxD2 */</div><div class='ctx'> 	};</div><div class='hunk'>@@ -267,6 +265,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ostm0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -281,5 +280,11 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	timeout-sec = &lt;60&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi<br/>index 08ea4c551ed0..a1e4e9ac8f62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s72100.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r7s72100.dtsi</a></div><div class='hunk'>@@ -36,11 +36,12 @@</div><div class='ctx'> 		clock-div = &lt;3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bsc: bsc {</div><div class='add'>+	bsc: bus {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0 0x18000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='hunk'>@@ -107,6 +108,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		L2: cache-controller@3ffff000 {</div><div class='ctx'> 			compatible = "arm,pl310-cache";</div><div class='hunk'>@@ -238,6 +240,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "error", "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;mstp10_clks R7S72100_CLK_SPI0&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2d21&gt;, &lt;&amp;dmac 0x2d22&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -253,6 +257,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "error", "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;mstp10_clks R7S72100_CLK_SPI1&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2d25&gt;, &lt;&amp;dmac 0x2d26&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -268,6 +274,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "error", "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;mstp10_clks R7S72100_CLK_SPI2&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2d29&gt;, &lt;&amp;dmac 0x2d2a&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -283,6 +291,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "error", "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;mstp10_clks R7S72100_CLK_SPI3&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2d2d&gt;, &lt;&amp;dmac 0x2d2e&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -298,6 +308,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "error", "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;mstp10_clks R7S72100_CLK_SPI4&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2d31&gt;, &lt;&amp;dmac 0x2d32&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -332,9 +344,9 @@</div><div class='ctx'> 				     &lt;GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mstp8_clks R7S72100_CLK_MMCIF&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2cc9&gt;, &lt;&amp;dmac 0x2cca&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;cpg_clocks&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='del'>-			bus-width = &lt;8&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -370,6 +382,37 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dmac: dma-controller@e8200000 {</div><div class='add'>+			compatible = "renesas,r7s72100-dmac",</div><div class='add'>+				     "renesas,rz-dmac";</div><div class='add'>+			reg = &lt;0xe8200000 0x1000&gt;,</div><div class='add'>+			      &lt;0xfcfe1000 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 9 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 10 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 11 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 15 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 16 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 17 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 18 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 19 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 20 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 21 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 22 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 23 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 24 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@e8201000 {</div><div class='ctx'> 			compatible = "arm,pl390";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='hunk'>@@ -516,6 +559,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl: pinctrl@fcfe3000 {</div><div class='ctx'> 			compatible = "renesas,r7s72100-ports";</div><div class='add'>+			bootph-all;</div><div class='ctx'> </div><div class='ctx'> 			reg = &lt;0xfcfe3000 0x4230&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts b/arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts<br/>index cd2324b8e8ff..f69a7fe56b6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r7s9210-rza2mevb.dts</a></div><div class='hunk'>@@ -55,8 +55,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;keyboard_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 		key-3 {</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-			interrupts = &lt;0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc 0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			label = "SW3";</div><div class='ctx'> 			wakeup-source;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts<br/>index 3d02f065f71c..58becc9fbffd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts</a></div><div class='hunk'>@@ -193,8 +193,7 @@</div><div class='ctx'> 	ethernet@8000000 {</div><div class='ctx'> 		compatible = "smsc,lan9220", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x08000000 0x1000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc1&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc1 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		smsc,irq-active-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi<br/>index 85261684b5d5..2e19ebf9e2ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a73a4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a73a4.dtsi</a></div><div class='hunk'>@@ -428,7 +428,6 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp3_clks R8A73A4_CLK_MMCIF0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_a3sp&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -438,7 +437,6 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp3_clks R8A73A4_CLK_MMCIF1&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_a3sp&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts<br/>index e1ac2c161e73..04d24b6d8056 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts</a></div><div class='hunk'>@@ -224,8 +224,7 @@</div><div class='ctx'> 	touchscreen@55 {</div><div class='ctx'> 		compatible = "sitronix,st1232";</div><div class='ctx'> 		reg = &lt;0x55&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin1&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin1 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;st1232_pins&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		gpios = &lt;&amp;pfc 166 GPIO_ACTIVE_LOW&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts<br/>index 64102b664055..6a8a0d2113b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7742-iwg21d-q7.dts</a></div><div class='hunk'>@@ -202,8 +202,7 @@</div><div class='ctx'> 	touch: touchpanel@38 {</div><div class='ctx'> 		compatible = "edt,edt-ft5406";</div><div class='ctx'> 		reg = &lt;0x38&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;24 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 24 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		/* GP1_29 is also shared with audio codec reset pin */</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;vcc_3v3_tft1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi b/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi<br/>index b281a4d164b0..661cc5357b57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi</a></div><div class='hunk'>@@ -55,8 +55,7 @@</div><div class='ctx'> 	rtc@68 {</div><div class='ctx'> 		compatible = "ti,bq32000";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi<br/>index 3a5d6b434d09..9083d288cc33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7742.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7742.dtsi</a></div><div class='hunk'>@@ -1651,7 +1651,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1667,7 +1666,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7742_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 305&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts<br/>index ff274bfcb664..9b16fe7ce713 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7743-sk-rzg1m.dts</a></div><div class='hunk'>@@ -73,8 +73,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi<br/>index 8833898d5557..58a06cf37784 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7743.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7743.dtsi</a></div><div class='hunk'>@@ -1639,7 +1639,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7743_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi<br/>index c66c1102fb72..034244648d18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7744.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7744.dtsi</a></div><div class='hunk'>@@ -1639,7 +1639,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7744_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts<br/>index a0b574398055..5903c1f1356f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts</a></div><div class='hunk'>@@ -84,8 +84,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cec_clock&gt;;</div><div class='ctx'> 		clock-names = "cec";</div><div class='ctx'> 		pd-gpios = &lt;&amp;gpio2 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts<br/>index 24411044ef6c..3ac2526a24a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts</a></div><div class='hunk'>@@ -185,8 +185,7 @@</div><div class='ctx'> 	port-expander@44 {</div><div class='ctx'> 		compatible = "st,stmpe811";</div><div class='ctx'> 		reg = &lt;0x44&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/* 3.25 MHz ADC clock speed */</div><div class='ctx'> 		st,adc-freq = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts b/arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts<br/>index 0a75e8c79acc..571615a50620 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7745-sk-rzg1e.dts</a></div><div class='hunk'>@@ -68,8 +68,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi<br/>index 6ddde364782b..704fa6f3cbd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7745.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7745.dtsi</a></div><div class='hunk'>@@ -1513,7 +1513,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7745_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts<br/>index 644802285249..e511eb425bc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a77470-iwg23s-sbc.dts</a></div><div class='hunk'>@@ -82,8 +82,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1622",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;3&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio5 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -151,8 +150,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "sil,sii9022";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7778-bockw.dts b/arch/arm/boot/dts/renesas/r8a7778-bockw.dts<br/>index a3f9d74e8877..a99d226f41a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7778-bockw.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7778-bockw.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7778-bockw.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7778-bockw.dts</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;bsc {</div><div class='add'>+&amp;lbsc {</div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "cfi-flash";</div><div class='ctx'> 		reg = &lt;0x0 0x04000000&gt;;</div><div class='hunk'>@@ -96,8 +96,7 @@</div><div class='ctx'> 		reg = &lt;0x18300000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		vddvario-supply = &lt;&amp;fixedregulator3v3&gt;;</div><div class='ctx'> 		vdd33a-supply = &lt;&amp;fixedregulator3v3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7778.dtsi b/arch/arm/boot/dts/renesas/r8a7778.dtsi<br/>index b80e832c9277..859dd29dfce3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7778.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7778.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7778.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7778.dtsi</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> 		spi2 = &amp;hspi2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bsc: bus@1c000000 {</div><div class='add'>+	lbsc: bus {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7779-marzen.dts b/arch/arm/boot/dts/renesas/r8a7779-marzen.dts<br/>index 9b13e8d1538b..2920d87ea6ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7779-marzen.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7779-marzen.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7779-marzen.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7779-marzen.dts</a></div><div class='hunk'>@@ -58,17 +58,15 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;keypad0_pins&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-</div><div class='ctx'> 		key-1 {</div><div class='del'>-			interrupts = &lt;17 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio0 17 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			label = "SW1-1";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		key-2 {</div><div class='del'>-			interrupts = &lt;18 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio0 18 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			label = "SW1-2";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -251,8 +249,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin0&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin0 1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		smsc,irq-push-pull;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		vddvario-supply = &lt;&amp;fixedregulator3v3&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7779.dtsi b/arch/arm/boot/dts/renesas/r8a7779.dtsi<br/>index 1944703cba4f..e437c22f452d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7779.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7779.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7779.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7779.dtsi</a></div><div class='hunk'>@@ -704,7 +704,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lbsc: lbsc {</div><div class='add'>+	lbsc: bus {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7790-lager.dts b/arch/arm/boot/dts/renesas/r8a7790-lager.dts<br/>index 8590981245a6..4f002aa7fbaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790-lager.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790-lager.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790-lager.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7790-lager.dts</a></div><div class='hunk'>@@ -79,28 +79,28 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;keyboard_pins&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-		one {</div><div class='add'>+		key-1 {</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			label = "SW2-1";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		two {</div><div class='add'>+		key-2 {</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			label = "SW2-2";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		three {</div><div class='add'>+		key-3 {</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			label = "SW2-3";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 26 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		four {</div><div class='add'>+		key-4 {</div><div class='ctx'> 			linux,code = &lt;KEY_4&gt;;</div><div class='ctx'> 			label = "SW2-4";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -365,8 +365,7 @@</div><div class='ctx'> 		hdmi@39 {</div><div class='ctx'> 			compatible = "adi,adv7511w";</div><div class='ctx'> 			reg = &lt;0x39&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-			interrupts = &lt;15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio1 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cec_clock&gt;;</div><div class='ctx'> 			clock-names = "cec";</div><div class='ctx'> </div><div class='hunk'>@@ -403,8 +402,7 @@</div><div class='ctx'> 		hdmi-in@4c {</div><div class='ctx'> 			compatible = "adi,adv7612";</div><div class='ctx'> 			reg = &lt;0x4c&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-			interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio1 20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			default-input = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='hunk'>@@ -444,8 +442,7 @@</div><div class='ctx'> 		pmic@58 {</div><div class='ctx'> 			compatible = "dlg,da9063";</div><div class='ctx'> 			reg = &lt;0x58&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -461,8 +458,7 @@</div><div class='ctx'> 		vdd_dvfs: regulator@68 {</div><div class='ctx'> 			compatible = "dlg,da9210";</div><div class='ctx'> 			reg = &lt;0x68&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -692,8 +688,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 31 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -759,6 +754,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -890,7 +886,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;hsusb_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	renesas,enable-gpio = &lt;&amp;gpio5 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	renesas,enable-gpios = &lt;&amp;gpio5 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbphy {</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7790-stout.dts b/arch/arm/boot/dts/renesas/r8a7790-stout.dts<br/>index 683f7395fab0..b1e20579e071 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790-stout.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790-stout.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790-stout.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7790-stout.dts</a></div><div class='hunk'>@@ -211,8 +211,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio3 31 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -269,6 +268,7 @@</div><div class='ctx'> &amp;scifa0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scifa0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -300,8 +300,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;osc4_clk&gt;;</div><div class='ctx'> 		clock-names = "cec";</div><div class='ctx'> </div><div class='hunk'>@@ -344,8 +343,7 @@</div><div class='ctx'> 	pmic@58 {</div><div class='ctx'> 		compatible = "dlg,da9063";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -365,8 +363,7 @@</div><div class='ctx'> 	vdd_dvfs: regulator@68 {</div><div class='ctx'> 		compatible = "dlg,da9210";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -377,8 +374,7 @@</div><div class='ctx'> 	vdd: regulator@70 {</div><div class='ctx'> 		compatible = "dlg,da9210";</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi<br/>index 20e4d4c6e748..4f97c09dbc9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7790.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7790.dtsi</a></div><div class='hunk'>@@ -227,6 +227,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board. */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -265,6 +266,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -374,6 +376,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7790";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x250&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		tpu: pwm@e60f0000 {</div><div class='hunk'>@@ -395,6 +398,7 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apmu@e6151000 {</div><div class='hunk'>@@ -412,6 +416,7 @@</div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7790-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0100&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1686,7 +1691,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1702,7 +1706,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 305&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1950,6 +1953,7 @@</div><div class='ctx'> 		prr: chipid@ff000044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xff000044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@ffca0000 {</div><div class='hunk'>@@ -2020,5 +2024,6 @@</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7791-koelsch.dts b/arch/arm/boot/dts/renesas/r8a7791-koelsch.dts<br/>index 0efd9f98c75a..e9f90fa44d55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791-koelsch.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791-koelsch.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791-koelsch.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7791-koelsch.dts</a></div><div class='hunk'>@@ -397,8 +397,7 @@</div><div class='ctx'> 		hdmi@39 {</div><div class='ctx'> 			compatible = "adi,adv7511w";</div><div class='ctx'> 			reg = &lt;0x39&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-			interrupts = &lt;29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cec_clock&gt;;</div><div class='ctx'> 			clock-names = "cec";</div><div class='ctx'> </div><div class='hunk'>@@ -435,8 +434,7 @@</div><div class='ctx'> 		hdmi-in@4c {</div><div class='ctx'> 			compatible = "adi,adv7612";</div><div class='ctx'> 			reg = &lt;0x4c&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio4 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			default-input = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='hunk'>@@ -659,8 +657,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -682,6 +679,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -816,8 +814,7 @@</div><div class='ctx'> 	pmic@58 {</div><div class='ctx'> 		compatible = "dlg,da9063";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -833,8 +830,7 @@</div><div class='ctx'> 	vdd_dvfs: regulator@68 {</div><div class='ctx'> 		compatible = "dlg,da9210";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -859,7 +855,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	renesas,enable-gpio = &lt;&amp;gpio5 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	renesas,enable-gpios = &lt;&amp;gpio5 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbphy {</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7791-porter.dts b/arch/arm/boot/dts/renesas/r8a7791-porter.dts<br/>index 93c86e921645..81b3c5d74e9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791-porter.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791-porter.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791-porter.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7791-porter.dts</a></div><div class='hunk'>@@ -194,8 +194,7 @@</div><div class='ctx'> 		hdmi@39 {</div><div class='ctx'> 			compatible = "adi,adv7511w";</div><div class='ctx'> 			reg = &lt;0x39&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-			interrupts = &lt;29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 			avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='ctx'> 			dvdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -290,7 +289,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	can0_pins: can0 {</div><div class='del'>-		groups = "can0_data";</div><div class='add'>+		groups = "can0_data_b";</div><div class='ctx'> 		function = "can0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -313,6 +312,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -329,8 +329,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -410,8 +409,7 @@</div><div class='ctx'> 	pmic@5a {</div><div class='ctx'> 		compatible = "dlg,da9063l";</div><div class='ctx'> 		reg = &lt;0x5a&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -423,8 +421,7 @@</div><div class='ctx'> 	vdd_dvfs: regulator@68 {</div><div class='ctx'> 		compatible = "dlg,da9210";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi<br/>index f9c9e1d8f669..5023b41c28b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7791.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7791.dtsi</a></div><div class='hunk'>@@ -125,6 +125,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board. */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -152,6 +153,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -291,6 +293,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7791";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x250&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		tpu: pwm@e60f0000 {</div><div class='hunk'>@@ -312,6 +315,7 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apmu@e6152000 {</div><div class='hunk'>@@ -323,6 +327,7 @@</div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7791-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0100&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1680,7 +1685,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1876,6 +1880,7 @@</div><div class='ctx'> 		prr: chipid@ff000044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xff000044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@ffca0000 {</div><div class='hunk'>@@ -1946,5 +1951,6 @@</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7792-blanche.dts b/arch/arm/boot/dts/renesas/r8a7792-blanche.dts<br/>index 540a9ad28f28..23ec0f8a6651 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792-blanche.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792-blanche.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792-blanche.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7792-blanche.dts</a></div><div class='hunk'>@@ -224,8 +224,7 @@</div><div class='ctx'> 		compatible = "smsc,lan89218", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x18000000 0x100&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		smsc,irq-push-pull;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		vddvario-supply = &lt;&amp;d3_3v&gt;;</div><div class='hunk'>@@ -302,6 +301,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -336,8 +336,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> </div><div class='ctx'> 		avdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='hunk'>@@ -378,8 +377,7 @@</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_irq_pins&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7792-wheat.dts b/arch/arm/boot/dts/renesas/r8a7792-wheat.dts<br/>index 000f21a2a863..93bd81723c8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792-wheat.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792-wheat.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792-wheat.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7792-wheat.dts</a></div><div class='hunk'>@@ -115,8 +115,7 @@</div><div class='ctx'> 		compatible = "smsc,lan89218", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x18000000 0x100&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		smsc,irq-push-pull;</div><div class='ctx'> 		smsc,save-mac-address;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='hunk'>@@ -184,6 +183,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi<br/>index dd3bc32668b7..7513afc1c958 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7792.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7792.dtsi</a></div><div class='hunk'>@@ -82,9 +82,10 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board. */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lbsc: lbsc {</div><div class='add'>+	lbsc: bus {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -109,6 +110,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -308,6 +310,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7792";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x144&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpg: clock-controller@e6150000 {</div><div class='hunk'>@@ -318,6 +321,7 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apmu@e6152000 {</div><div class='hunk'>@@ -329,6 +333,7 @@</div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7792-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0100&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -947,6 +952,7 @@</div><div class='ctx'> 		prr: chipid@ff000044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xff000044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@ffca0000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7793-gose.dts b/arch/arm/boot/dts/renesas/r8a7793-gose.dts<br/>index 1ea6c757893b..45b267ec2679 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7793-gose.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7793-gose.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7793-gose.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7793-gose.dts</a></div><div class='hunk'>@@ -383,8 +383,7 @@</div><div class='ctx'> 		hdmi@39 {</div><div class='ctx'> 			compatible = "adi,adv7511w";</div><div class='ctx'> 			reg = &lt;0x39&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-			interrupts = &lt;29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 			avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='ctx'> 			dvdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -419,8 +418,7 @@</div><div class='ctx'> 		hdmi-in@4c {</div><div class='ctx'> 			compatible = "adi,adv7612";</div><div class='ctx'> 			reg = &lt;0x4c&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-			interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio4 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			default-input = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='hunk'>@@ -622,8 +620,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -645,6 +642,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -756,8 +754,7 @@</div><div class='ctx'> 	pmic@58 {</div><div class='ctx'> 		compatible = "dlg,da9063";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -773,8 +770,7 @@</div><div class='ctx'> 	vdd_dvfs: regulator@68 {</div><div class='ctx'> 		compatible = "dlg,da9210";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi<br/>index 24e66ddf37e0..fc6d3bcca296 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7793.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7793.dtsi</a></div><div class='hunk'>@@ -117,6 +117,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board. */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='hunk'>@@ -137,6 +138,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -276,6 +278,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7793";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x250&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* Special CPG clocks */</div><div class='hunk'>@@ -287,6 +290,7 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apmu@e6152000 {</div><div class='hunk'>@@ -298,6 +302,7 @@</div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7793-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0100&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1343,7 +1348,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7793_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			max-frequency = &lt;97500000&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1455,6 +1459,7 @@</div><div class='ctx'> 		prr: chipid@ff000044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xff000044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@ffca0000 {</div><div class='hunk'>@@ -1525,5 +1530,6 @@</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7794-alt.dts b/arch/arm/boot/dts/renesas/r8a7794-alt.dts<br/>index b5ecafbb2e4d..3f06a7f67d62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794-alt.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794-alt.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794-alt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7794-alt.dts</a></div><div class='hunk'>@@ -96,28 +96,28 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;keyboard_pins&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-		one {</div><div class='add'>+		key-1 {</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			label = "SW2-1";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		two {</div><div class='add'>+		key-2 {</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			label = "SW2-2";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		three {</div><div class='add'>+		key-3 {</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			label = "SW2-3";</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			debounce-interval = &lt;20&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		four {</div><div class='add'>+		key-4 {</div><div class='ctx'> 			linux,code = &lt;KEY_4&gt;;</div><div class='ctx'> 			label = "SW2-4";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -381,8 +381,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -450,8 +449,7 @@</div><div class='ctx'> 	pmic@58 {</div><div class='ctx'> 		compatible = "dlg,da9063";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-		interrupts = &lt;31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -481,6 +479,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7794-silk.dts b/arch/arm/boot/dts/renesas/r8a7794-silk.dts<br/>index 595e074085eb..342825605768 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794-silk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794-silk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794-silk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7794-silk.dts</a></div><div class='hunk'>@@ -262,8 +262,7 @@</div><div class='ctx'> 		hdmi@39 {</div><div class='ctx'> 			compatible = "adi,adv7511w";</div><div class='ctx'> 			reg = &lt;0x39&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-			interrupts = &lt;23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio5 23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 			avdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='ctx'> 			dvdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='hunk'>@@ -395,6 +394,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -415,8 +415,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1537",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc0&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc0 8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		micrel,led-mode = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 24 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -436,8 +435,7 @@</div><div class='ctx'> 	pmic@58 {</div><div class='ctx'> 		compatible = "dlg,da9063";</div><div class='ctx'> 		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-		interrupts = &lt;31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi<br/>index 8e6386a79aea..92010d09f6c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r8a7794.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r8a7794.dtsi</a></div><div class='hunk'>@@ -99,6 +99,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board. */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='hunk'>@@ -119,6 +120,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -243,6 +245,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7794";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x11c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpg: clock-controller@e6150000 {</div><div class='hunk'>@@ -253,6 +256,7 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apmu@e6151000 {</div><div class='hunk'>@@ -264,6 +268,7 @@</div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7794-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0100&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1349,7 +1354,6 @@</div><div class='ctx'> 			dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7794_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 315&gt;;</div><div class='del'>-			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1441,6 +1445,7 @@</div><div class='ctx'> 		prr: chipid@ff000044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xff000044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@ffca0000 {</div><div class='hunk'>@@ -1492,5 +1497,6 @@</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts<br/>index 31cdca3e623c..3258b2e27434 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts</a></div><div class='hunk'>@@ -8,8 +8,11 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/pinctrl/rzn1-pinctrl.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/net/pcs-rzn1-miic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzn1-pinctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "r9a06g032.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -24,6 +27,127 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	keyboard {</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		switch-1 {</div><div class='add'>+			linux,code = &lt;KEY_1&gt;;</div><div class='add'>+			label = "SW1-1";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-2 {</div><div class='add'>+			linux,code = &lt;KEY_2&gt;;</div><div class='add'>+			label = "SW1-2";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-3 {</div><div class='add'>+			linux,code = &lt;KEY_3&gt;;</div><div class='add'>+			label = "SW1-3";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-4 {</div><div class='add'>+			linux,code = &lt;KEY_4&gt;;</div><div class='add'>+			label = "SW1-4";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-5 {</div><div class='add'>+			linux,code = &lt;KEY_5&gt;;</div><div class='add'>+			label = "SW1-5";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-6 {</div><div class='add'>+			linux,code = &lt;KEY_6&gt;;</div><div class='add'>+			label = "SW1-6";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-7 {</div><div class='add'>+			linux,code = &lt;KEY_7&gt;;</div><div class='add'>+			label = "SW1-7";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-8 {</div><div class='add'>+			linux,code = &lt;KEY_8&gt;;</div><div class='add'>+			label = "SW1-8";</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9698 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-dbg0 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg1 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg2 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg3 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg4 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg5 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg6 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-dbg7 {</div><div class='add'>+			gpios = &lt;&amp;pca9698 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can0 {</div><div class='hunk'>@@ -47,6 +171,10 @@</div><div class='ctx'> 	renesas,miic-switch-portin = &lt;MIIC_GMAC2_PORT&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ext_rtc_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gmac2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "gmii";</div><div class='hunk'>@@ -57,6 +185,44 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_i2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pca9698: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9698";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		/* configure the analog switch to let i2c2 access the eeprom */</div><div class='add'>+		max4662-in1-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;16 0&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+		max4662-in2-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;17 0&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+		max4662-in3-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;18 0&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Some revisions may have a 24cs64 at address 0x58 */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mii_conv4 {</div><div class='ctx'> 	renesas,miic-input = &lt;MIIC_SWITCH_PORTB&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -68,6 +234,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_cpld&gt;;</div><div class='add'>+</div><div class='ctx'> 	pins_can0: pins_can0 {</div><div class='ctx'> 		pinmux = &lt;RZN1_PINMUX(162, RZN1_FUNC_CAN)&gt;,	/* CAN0_TXD */</div><div class='ctx'> 			 &lt;RZN1_PINMUX(163, RZN1_FUNC_CAN)&gt;;	/* CAN0_RXD */</div><div class='hunk'>@@ -80,6 +249,13 @@</div><div class='ctx'> 		drive-strength = &lt;6&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pins_cpld: pins-cpld {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(119, RZN1_FUNC_USB)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(120, RZN1_FUNC_USB)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(121, RZN1_FUNC_USB)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(122, RZN1_FUNC_USB)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pins_eth3: pins_eth3 {</div><div class='ctx'> 		pinmux = &lt;RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='ctx'> 			 &lt;RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='hunk'>@@ -114,6 +290,12 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pins_i2c2: pins_i2c2 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(115, RZN1_FUNC_I2C)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(116, RZN1_FUNC_I2C)&gt;;</div><div class='add'>+		drive-strength = &lt;12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pins_mdio1: pins_mdio1 {</div><div class='ctx'> 		pinmux = &lt;RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)&gt;,</div><div class='ctx'> 			 &lt;RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)&gt;;</div><div class='hunk'>@@ -174,6 +356,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;udc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdt0 {</div><div class='ctx'> 	timeout-sec = &lt;60&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts<br/>new file mode 100644<br/>index 000000000000..97a339b30d76<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZN1D-EB Board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 Schneider-Electric</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "r9a06g032-rzn1d400-db.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "RZN1D-EB Board";</div><div class='add'>+	compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",</div><div class='add'>+		     "renesas,r9a06g032";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_eth0&gt;, &lt;&amp;pins_mdio0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;phy_mii0&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		phy_mii0: ethernet-phy@8 {</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+					function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* Sensors are different across revisions. All are LM75B compatible */</div><div class='add'>+	sensor@49 {</div><div class='add'>+		compatible = "national,lm75b";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mii_conv1 {</div><div class='add'>+	renesas,miic-input = &lt;MIIC_GMAC1_PORT&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mii_conv2 {</div><div class='add'>+	renesas,miic-input = &lt;MIIC_SWITCH_PORTD&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mii_conv3 {</div><div class='add'>+	renesas,miic-input = &lt;MIIC_SWITCH_PORTC&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pci_usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pins_eth0: pins-eth0 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;;</div><div class='add'>+		drive-strength = &lt;6&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_eth1: pins-eth1 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;;</div><div class='add'>+		drive-strength = &lt;6&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_eth2: pins-eth2 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)&gt;;</div><div class='add'>+		drive-strength = &lt;6&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_mdio0: pins-mdio0 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_sdio1: pins-sdio1 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(95, RZN1_FUNC_SDIO)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(97, RZN1_FUNC_SDIO)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(98, RZN1_FUNC_SDIO)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(99, RZN1_FUNC_SDIO)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(100, RZN1_FUNC_SDIO)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(101, RZN1_FUNC_SDIO_E)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(102, RZN1_FUNC_SDIO_E)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_sdio1_clk: pins-sdio1-clk {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(96, RZN1_FUNC_SDIO)&gt;;</div><div class='add'>+		drive-strength = &lt;12&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins_uart2: pins-uart2 {</div><div class='add'>+		pinmux = &lt;RZN1_PINMUX(105, RZN1_FUNC_UART2)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(106, RZN1_FUNC_UART2)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(107, RZN1_FUNC_UART2)&gt;,</div><div class='add'>+			 &lt;RZN1_PINMUX(108, RZN1_FUNC_UART2)&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_sdio1&gt;, &lt;&amp;pins_sdio1_clk&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;switch {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_eth1&gt;, &lt;&amp;pins_eth2&gt;, &lt;&amp;pins_eth3&gt;, &lt;&amp;pins_eth4&gt;,</div><div class='add'>+		    &lt;&amp;pins_mdio1&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		/* CN15 and CN16 switches must be configured in MDIO2 mode */</div><div class='add'>+		switch0phy1: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+					function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch0phy10: ethernet-phy@10 {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+					function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+					default-state = "keep";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;switch_port2 {</div><div class='add'>+	label = "lan2";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;switch0phy10&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;switch_port3 {</div><div class='add'>+	label = "lan3";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;switch0phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi<br/>index 7548291c8d7e..13a60656b044 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/r9a06g032.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/r9a06g032.dtsi</a></div><div class='hunk'>@@ -73,8 +73,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 67 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 68 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "alarm", "timer", "pps";</div><div class='del'>-			clocks = &lt;&amp;sysctrl R9A06G032_HCLK_RTC&gt;;</div><div class='del'>-			clock-names = "hclk";</div><div class='add'>+			clocks = &lt;&amp;sysctrl R9A06G032_HCLK_RTC&gt;, &lt;&amp;ext_rtc_clk&gt;;</div><div class='add'>+			clock-names = "hclk", "xtal";</div><div class='ctx'> 			power-domains = &lt;&amp;sysctrl&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -211,8 +211,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sysctrl R9A06G032_CLK_UART3&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_UART3&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux 0 0 0 0 0 1&gt;, &lt;&amp;dmamux 1 0 0 0 1 1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;dmamux 1 0 0 0 1 1&gt;, &lt;&amp;dmamux 0 0 0 0 0 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -224,8 +224,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sysctrl R9A06G032_CLK_UART4&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_UART4&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux 2 0 0 0 2 1&gt;, &lt;&amp;dmamux 3 0 0 0 3 1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;dmamux 3 0 0 0 3 1&gt;, &lt;&amp;dmamux 2 0 0 0 2 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -237,8 +237,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sysctrl R9A06G032_CLK_UART5&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_UART5&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux 4 0 0 0 4 1&gt;, &lt;&amp;dmamux 5 0 0 0 5 1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;dmamux 5 0 0 0 5 1&gt;, &lt;&amp;dmamux 4 0 0 0 4 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -250,8 +250,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sysctrl R9A06G032_CLK_UART6&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_UART6&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux 6 0 0 0 6 1&gt;, &lt;&amp;dmamux 7 0 0 0 7 1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;dmamux 7 0 0 0 7 1&gt;, &lt;&amp;dmamux 6 0 0 0 6 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -263,8 +263,30 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sysctrl R9A06G032_CLK_UART7&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_UART7&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='del'>-			dmas = &lt;&amp;dmamux 4 0 0 0 20 1&gt;, &lt;&amp;dmamux 5 0 0 0 21 1&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='add'>+			dmas = &lt;&amp;dmamux 5 0 0 0 21 1&gt;, &lt;&amp;dmamux 4 0 0 0 20 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@40063000 {</div><div class='add'>+			compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x40063000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysctrl R9A06G032_HCLK_I2C0&gt;, &lt;&amp;sysctrl R9A06G032_CLK_I2C0&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@40064000 {</div><div class='add'>+			compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x40064000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysctrl R9A06G032_HCLK_I2C1&gt;, &lt;&amp;sysctrl R9A06G032_CLK_I2C1&gt;;</div><div class='add'>+			clock-names = "ref", "pclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -276,6 +298,30 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdio1: mmc@40100000 {</div><div class='add'>+			compatible = "renesas,r9a06g032-sdhci", "renesas,rzn1-sdhci", "arasan,sdhci-8.9a";</div><div class='add'>+			reg = &lt;0x40100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;sysctrl R9A06G032_CLK_SDIO0&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_SDIO0&gt;;</div><div class='add'>+			clock-names = "clk_xin", "clk_ahb";</div><div class='add'>+			no-1-8-v;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdio2: mmc@40101000 {</div><div class='add'>+			compatible = "renesas,r9a06g032-sdhci", "renesas,rzn1-sdhci", "arasan,sdhci-8.9a";</div><div class='add'>+			reg = &lt;0x40101000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "int", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;sysctrl R9A06G032_CLK_SDIO1&gt;, &lt;&amp;sysctrl R9A06G032_HCLK_SDIO1&gt;;</div><div class='add'>+			clock-names = "clk_xin", "clk_ahb";</div><div class='add'>+			no-1-8-v;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		nand_controller: nand-controller@40102000 {</div><div class='ctx'> 			compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";</div><div class='ctx'> 			reg = &lt;0x40102000 0x2000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts b/arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts<br/>index 98897f710063..1ce07d0878dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/sh73a0-kzm9g.dts</a></div><div class='hunk'>@@ -172,8 +172,7 @@</div><div class='ctx'> 		compatible = "smsc,lan9221", "smsc,lan9115";</div><div class='ctx'> 		reg = &lt;0x10000000 0x100&gt;;</div><div class='ctx'> 		phy-mode = "mii";</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin0&gt;;</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin0 3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		smsc,irq-push-pull;</div><div class='ctx'> 		smsc,save-mac-address;</div><div class='hunk'>@@ -196,8 +195,7 @@</div><div class='ctx'> 	compass@c {</div><div class='ctx'> 		compatible = "asahi-kasei,ak8975";</div><div class='ctx'> 		reg = &lt;0x0c&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin3&gt;;</div><div class='del'>-		interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin3 4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ak4648: codec@12 {</div><div class='hunk'>@@ -209,9 +207,8 @@</div><div class='ctx'> 	accelerometer@1d {</div><div class='ctx'> 		compatible = "adi,adxl345";</div><div class='ctx'> 		reg = &lt;0x1d&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin3&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin3 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				      &lt;&amp;irqpin3 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rtc@32 {</div><div class='hunk'>@@ -297,8 +294,7 @@</div><div class='ctx'> 	touchscreen@55 {</div><div class='ctx'> 		compatible = "sitronix,st1232";</div><div class='ctx'> 		reg = &lt;0x55&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin1&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin1 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -310,8 +306,7 @@</div><div class='ctx'> 	pcf8575: gpio@20 {</div><div class='ctx'> 		compatible = "nxp,pcf8575";</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqpin2&gt;;</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqpin2 3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/arch/arm/boot/dts/renesas/sh73a0.dtsi b/arch/arm/boot/dts/renesas/sh73a0.dtsi<br/>index 30c67acc4e35..c7cc17e3c3c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/sh73a0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/renesas/sh73a0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/renesas/sh73a0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/renesas/sh73a0.dtsi</a></div><div class='hunk'>@@ -273,7 +273,6 @@</div><div class='ctx'> 			     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;mstp3_clks SH73A0_CLK_MMCIF0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd_a3sp&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/Makefile b/arch/arm/boot/dts/rockchip/Makefile<br/>index ab4cd9aab722..716f5540e438 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/Makefile</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += \</div><div class='ctx'> 	rv1108-elgin-r1.dtb \</div><div class='ctx'> 	rv1108-evb.dtb \</div><div class='add'>+	rv1109-relfor-saib.dtb \</div><div class='ctx'> 	rv1109-sonoff-ihost.dtb \</div><div class='ctx'> 	rv1126-edgeble-neu2-io.dtb \</div><div class='ctx'> 	rv1126-sonoff-ihost.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3036-kylin.dts b/arch/arm/boot/dts/rockchip/rk3036-kylin.dts<br/>index e32c73d32f0a..ae2f84a4e922 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3036-kylin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3036-kylin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3036-kylin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3036-kylin.dts</a></div><div class='hunk'>@@ -8,6 +8,12 @@</div><div class='ctx'> 	model = "Rockchip RK3036 KylinBoard";</div><div class='ctx'> 	compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;emmc;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -80,7 +86,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -325,8 +331,8 @@</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	rt5616: rt5616@1b {</div><div class='del'>-		compatible = "rt5616";</div><div class='add'>+	rt5616: audio-codec@1b {</div><div class='add'>+		compatible = "realtek,rt5616";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru SCLK_I2S_OUT&gt;;</div><div class='ctx'> 		clock-names = "mclk";</div><div class='hunk'>@@ -382,6 +388,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;vop {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/rockchip/rk3036.dtsi<br/>index 96279d1e02fe..fca21ebb224b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3036.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3036.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3036.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3036.dtsi</a></div><div class='hunk'>@@ -213,6 +213,8 @@</div><div class='ctx'> 		g-np-tx-fifo-size = &lt;16&gt;;</div><div class='ctx'> 		g-rx-fifo-size = &lt;275&gt;;</div><div class='ctx'> 		g-tx-fifo-size = &lt;256 128 128 64 64 32&gt;;</div><div class='add'>+		phys = &lt;&amp;usb2phy_otg&gt;;</div><div class='add'>+		phy-names = "usb2-phy";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -224,6 +226,8 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru HCLK_OTG1&gt;;</div><div class='ctx'> 		clock-names = "otg";</div><div class='ctx'> 		dr_mode = "host";</div><div class='add'>+		phys = &lt;&amp;usb2phy_host&gt;;</div><div class='add'>+		phy-names = "usb2-phy";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -342,6 +346,37 @@</div><div class='ctx'> 	grf: syscon@20008000 {</div><div class='ctx'> 		compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x20008000 0x1000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		usb2phy: usb2phy@17c {</div><div class='add'>+			compatible = "rockchip,rk3036-usb2phy";</div><div class='add'>+			reg = &lt;0x017c 0x20&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_OTGPHY0&gt;;</div><div class='add'>+			clock-names = "phyclk";</div><div class='add'>+			clock-output-names = "usb480m_phy";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru SCLK_USB480M&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;usb2phy&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb2phy_host: host-port {</div><div class='add'>+				interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "linestate";</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb2phy_otg: otg-port {</div><div class='add'>+				interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "otg-bvalid", "otg-id",</div><div class='add'>+						  "linestate";</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> </div><div class='ctx'> 		power: power-controller {</div><div class='ctx'> 			compatible = "rockchip,rk3036-power-controller";</div><div class='hunk'>@@ -384,12 +419,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	acodec: acodec-ana@20030000 {</div><div class='del'>-		compatible = "rk3036-codec";</div><div class='add'>+	acodec: audio-codec@20030000 {</div><div class='add'>+		compatible = "rockchip,rk3036-codec";</div><div class='ctx'> 		reg = &lt;0x20030000 0x4000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='ctx'> 		clock-names = "acodec_pclk";</div><div class='ctx'> 		clocks = &lt;&amp;cru PCLK_ACODEC&gt;;</div><div class='add'>+		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -397,8 +433,8 @@</div><div class='ctx'> 		compatible = "rockchip,rk3036-inno-hdmi";</div><div class='ctx'> 		reg = &lt;0x20034000 0x4000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru  PCLK_HDMI&gt;;</div><div class='del'>-		clock-names = "pclk";</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_HDMI&gt;, &lt;&amp;cru SCLK_LCDC&gt;;</div><div class='add'>+		clock-names = "pclk", "ref";</div><div class='ctx'> 		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hdmi_ctl&gt;;</div><div class='hunk'>@@ -553,11 +589,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	spi: spi@20074000 {</div><div class='del'>-		compatible = "rockchip,rockchip-spi";</div><div class='add'>+		compatible = "rockchip,rk3036-spi";</div><div class='ctx'> 		reg = &lt;0x20074000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru PCLK_SPI&gt;, &lt;&amp;cru SCLK_SPI&gt;;</div><div class='del'>-		clock-names = "apb-pclk","spi_pclk";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_SPI&gt;, &lt;&amp;cru PCLK_SPI&gt;;</div><div class='add'>+		clock-names = "spiclk", "apb_pclk";</div><div class='ctx'> 		dmas = &lt;&amp;pdma 8&gt;, &lt;&amp;pdma 9&gt;;</div><div class='ctx'> 		dma-names = "tx", "rx";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts<br/>index f924d4d64c3d..c227691013ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3066a-bqcurie2.dts</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm3 0 1000&gt;;</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd0: fixed-regulator {</div><div class='add'>+	vcc_sd0: regulator-fixed {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sdmmc-supply";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts b/arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts<br/>index f6e8d49a02ef..de42d1855121 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3066a-marsboard.dts</a></div><div class='hunk'>@@ -19,7 +19,18 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	hdmi_con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm3 0 1000&gt;;</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='hunk'>@@ -31,7 +42,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd0: sdmmc-regulator {</div><div class='add'>+	vcc_sd0: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sdmmc-supply";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='hunk'>@@ -41,7 +52,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys: vsys-regulator {</div><div class='add'>+	vsys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -58,6 +69,28 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in_vop1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -216,6 +249,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;vop0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdt {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts b/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts<br/>index 4de9a45c4883..25c0bcf85a56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-mk808.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3066a-mk808.dts</a></div><div class='hunk'>@@ -61,21 +61,21 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_2v5: vcc-2v5 {</div><div class='add'>+	vcc_2v5: regulator-vcc-2v5 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_2v5";</div><div class='ctx'> 		regulator-min-microvolt = &lt;2500000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;2500000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: usb-host-regulator {</div><div class='add'>+	vcc_host: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: usb-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;sdmmc_pwr&gt;;</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_wifi: sdio-regulator {</div><div class='add'>+	vcc_wifi: regulator-sdio {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts b/arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts<br/>index 29d8e5bf88f5..b0b029f14643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3066a-rayeager.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm3 0 1000&gt;;</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys: vsys-regulator {</div><div class='add'>+	vsys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* input for 5V_STDBY is VSYS or DC5V, selectable by jumper J4 */</div><div class='del'>-	vcc_stdby: stdby-regulator {</div><div class='add'>+	vcc_stdby: regulator-stdby {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "5v_stdby";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_emmc: emmc-regulator {</div><div class='add'>+	vcc_emmc: regulator-emmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "emmc_vccq";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sata: sata-regulator {</div><div class='add'>+	vcc_sata: regulator-sata {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_stdby&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -106,7 +106,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: usb-host-regulator {</div><div class='add'>+	vcc_host: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_stdby&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: usb-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3128-evb.dts b/arch/arm/boot/dts/rockchip/rk3128-evb.dts<br/>index c7ab7fcdb436..3d27d921de76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3128-evb.dts</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts<br/>index 21c1678f4e91..decbf2726ec4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_5v: dc-5v-regulator {</div><div class='add'>+	dc_5v: regulator-dc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "DC_5V";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 	 * This is a vbus-supply, which also supplies the GL852G usb hub,</div><div class='ctx'> 	 * thus has to be always-on</div><div class='ctx'> 	 */</div><div class='del'>-	host_pwr_5v: host-pwr-5v-regulator {</div><div class='add'>+	host_pwr_5v: regulator-host-pwr-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;1500&gt;;</div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mcu3v3: mcu3v3-regulator {</div><div class='add'>+	mcu3v3: regulator-mcu3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "MCU3V3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_ddr: vcc-ddr-regulator {</div><div class='add'>+	vcc_ddr: regulator-vcc-ddr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_DDR";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io-regulator {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_IO";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -141,7 +141,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lan: vcc-lan-regulator {</div><div class='add'>+	vcc_lan: regulator-vcc-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_LAN";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: vcc-sd-regulator {</div><div class='add'>+	vcc_sd: regulator-vcc-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;500&gt;;</div><div class='hunk'>@@ -163,7 +163,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;sdmmc_pwren&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_SYS";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc33_hdmi: vcc33-hdmi-regulator {</div><div class='add'>+	vcc33_hdmi: regulator-vcc33-hdmi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC33_HDMI";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -183,7 +183,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca_33: vcca-33-regulator {</div><div class='add'>+	vcca_33: regulator-vcca-33 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCCA_33";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -193,7 +193,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_11: vdd-11-regulator {</div><div class='add'>+	vdd_11: regulator-vdd-11 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDD_11";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='hunk'>@@ -203,7 +203,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd11_hdmi: vdd11-hdmi-regulator {</div><div class='add'>+	vdd11_hdmi: regulator-vdd11-hdmi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDD11_HDMI";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='hunk'>@@ -213,7 +213,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_arm: vdd-arm-regulator {</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "VDD_ARM";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 25000 1&gt;;</div><div class='hunk'>@@ -231,7 +231,7 @@</div><div class='ctx'> 	 * driver does not implement regulator support we have to make</div><div class='ctx'> 	 * sure here that the voltage never drops below 1050 mV.</div><div class='ctx'> 	 */</div><div class='del'>-	vdd_log: vdd-log-regulator {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "VDD_LOG";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='hunk'>@@ -272,7 +272,7 @@</div><div class='ctx'> 	phy-mode = "rmii";</div><div class='ctx'> 	phy-handle = &lt;&amp;phy0&gt;;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;cru SCLK_MAC_SRC&gt;;</div><div class='del'>-	assigned-clock-rates= &lt;50000000&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;50000000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;rmii_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi<br/>index d4572146d135..c49099954c28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3128.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3128.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3128.dtsi</a></div><div class='hunk'>@@ -48,7 +48,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			reg = &lt;0xf00&gt;;</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -87,31 +86,38 @@</div><div class='ctx'> 		opp-216000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;216000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;950000 950000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-408000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;950000 950000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-600000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;950000 950000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-696000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;696000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;975000 975000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-816000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1075000 1075000 1325000&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1008000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1200000 1200000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1200000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;1325000 1325000 1325000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts<br/>index 9312be362a7a..edc2b7f9112d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3188-bqedison2qc.dts</a></div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio3 RK_PD0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd_cif: cif-avdd-regulator {</div><div class='add'>+	avdd_cif: regulator-cif-avdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd-cif";</div><div class='ctx'> 		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -142,7 +142,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc28_cif&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v: vcc-5v-regulator {</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc-5v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lcd: lcd-regulator {</div><div class='add'>+	vcc_lcd: regulator-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc-lcd";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: usb-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc-otg";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -177,7 +177,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc-sd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -189,7 +189,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccq_emmc: emmc-vccq-regulator {</div><div class='add'>+	vccq_emmc: regulator-emmc-vccq {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccq-emmc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -198,7 +198,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* supplied from the bq24196 */</div><div class='del'>-	vsys: vsys-regulator {</div><div class='add'>+	vsys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts b/arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts<br/>index 0a1ae689b162..32f36d7a7d28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3188-px3-evb.dts</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3188-radxarock.dts b/arch/arm/boot/dts/rockchip/rk3188-radxarock.dts<br/>index 118deacd38c4..1f31c0a6774f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-radxarock.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188-radxarock.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188-radxarock.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3188-radxarock.dts</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_recv_pin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: usb-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PD7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd0: sdmmc-regulator {</div><div class='add'>+	vcc_sd0: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sdmmc-supply";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: usb-host-regulator {</div><div class='add'>+	vcc_host: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys: vsys-regulator {</div><div class='add'>+	vsys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3188.dtsi b/arch/arm/boot/dts/rockchip/rk3188.dtsi<br/>index 44b54af0bbf9..850bd6e67895 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3188.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3188.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3188.dtsi</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2&gt;;</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3228-evb.dts b/arch/arm/boot/dts/rockchip/rk3228-evb.dts<br/>index 69a5e239ed1a..a450cf31a0be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3228-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3228-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3228-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3228-evb.dts</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3229-evb.dts b/arch/arm/boot/dts/rockchip/rk3229-evb.dts<br/>index 5c3d08e3eea3..c35757d2b5dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3229-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3229-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3229-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3229-evb.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vccio_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_1v8: vccio-1v8-regulator {</div><div class='add'>+	vccio_1v8: regulator-vccio-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_1v8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_3v3: vccio-3v3-regulator {</div><div class='add'>+	vccio_3v3: regulator-vccio-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_arm: vdd-arm-regulator {</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log-regulator {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3229-xms6.dts b/arch/arm/boot/dts/rockchip/rk3229-xms6.dts<br/>index 7bfbfd11fb55..28333449c43a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3229-xms6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3229-xms6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3229-xms6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3229-xms6.dts</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> 		reg = &lt;0x60000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		              &lt;&amp;gpio2 29 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vccio_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_1v8: vccio-1v8-regulator {</div><div class='add'>+	vccio_1v8: regulator-vccio-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_1v8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_3v3: vccio-3v3-regulator {</div><div class='add'>+	vccio_3v3: regulator-vccio-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_arm: vdd-arm-regulator {</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log-regulator {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk322x.dtsi b/arch/arm/boot/dts/rockchip/rk322x.dtsi<br/>index 96421355c274..cd11a018105b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk322x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk322x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk322x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk322x.dtsi</a></div><div class='hunk'>@@ -36,7 +36,6 @@</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts<br/>index 8a635c243127..e1821fadbe7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-evb-act8846.dts</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> 	model = "Rockchip RK3288 EVB ACT8846";</div><div class='ctx'> 	compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	vcc_lcd: vcc-lcd {</div><div class='add'>+	vcc_lcd: regulator-vcc-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_wl: vcc-wl {</div><div class='add'>+	vcc_wl: regulator-vcc-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-evb.dtsi b/arch/arm/boot/dts/rockchip/rk3288-evb.dtsi<br/>index 382d2839cf47..11bb970c6112 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-evb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-evb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-evb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-evb.dtsi</a></div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* This turns on USB vbus for both host0 (ehci) and host1 (dwc2) */</div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -140,7 +140,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> 	 * vcc_io directly.  Those boards won't be able to power cycle SD cards</div><div class='ctx'> 	 * but it shouldn't hurt to toggle this pin there anyway.</div><div class='ctx'> 	 */</div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi<br/>index 36efa36b7190..59029483741b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload-core.dtsi</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	vcc_flash: flash-regulator {</div><div class='add'>+	vcc_flash: regulator-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts<br/>index a5a0826341e6..a55270672732 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-firefly-reload.dts</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host_5v: usb-host-regulator {</div><div class='add'>+	vcc_host_5v: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v: vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_5v: vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_5v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg_5v: usb-otg-regulator {</div><div class='add'>+	vcc_otg_5v: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dovdd_1v8: dovdd-1v8-regulator {</div><div class='add'>+	dovdd_1v8: regulator-dovdd-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc28_dvp: vcc28-dvp-regulator {</div><div class='add'>+	vcc28_dvp: regulator-vcc28-dvp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	af_28: af_28-regulator {</div><div class='add'>+	af_28: regulator-af-28 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -168,7 +168,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dvdd_1v2: af_28-regulator {</div><div class='add'>+	dvdd_1v2: regulator-dvdd-1v2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -180,7 +180,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbat_wl: wifi-regulator {</div><div class='add'>+	vbat_wl: regulator-wifi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vbat_wl";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi b/arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi<br/>index 3836c61cfb76..187d4f0a52eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-firefly.dtsi</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dovdd_1v8: dovdd-1v8-regulator {</div><div class='add'>+	dovdd_1v8: regulator-dovdd-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dovdd_1v8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbat_wl: vcc_sys: vsys-regulator {</div><div class='add'>+	vbat_wl: vcc_sys:  regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_flash: flash-regulator {</div><div class='add'>+	vcc_flash: regulator-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v: usb-regulator {</div><div class='add'>+	vcc_5v: regulator-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_5v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host_5v: usb-host-regulator {</div><div class='add'>+	vcc_host_5v: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg_5v: usb-otg-regulator {</div><div class='add'>+	vcc_otg_5v: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> 	 * A TT8142 creates both dovdd_1v8 and vcc28_dvp, controlled</div><div class='ctx'> 	 * by the dvp_pwr pin.</div><div class='ctx'> 	 */</div><div class='del'>-	vcc28_dvp: vcc28-dvp-regulator {</div><div class='add'>+	vcc28_dvp: regulator-vcc28-dvp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-miqi.dts b/arch/arm/boot/dts/rockchip/rk3288-miqi.dts<br/>index db1eb648e0e1..a5f5c6d38f80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-miqi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-miqi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-miqi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-miqi.dts</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_flash: flash-regulator {</div><div class='add'>+	vcc_flash: regulator-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: usb-host-regulator {</div><div class='add'>+	vcc_host: regulator-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -78,6 +78,21 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,name = "HDMI";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;512&gt;;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;hdmi&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0 {</div><div class='hunk'>@@ -130,6 +145,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;hdmi {</div><div class='ctx'> 	ddc-i2c-bus = &lt;&amp;i2c5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_cec_c0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -283,6 +300,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;io_domains {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts b/arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts<br/>index 1a5156951492..10ce0554d4fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-phycore-rdk.dts</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host0_5v: usb-host0-regulator {</div><div class='add'>+	vcc_host0_5v: regulator-usb-host0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_in_otg_out&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host1_5v: usb-host1-regulator {</div><div class='add'>+	vcc_host1_5v: regulator-usb-host1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_in_otg_out&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg_5v: usb-otg-regulator {</div><div class='add'>+	vcc_otg_5v: regulator-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi<br/>index e43887c9635f..12ab10c4adde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-phycore-som.dtsi</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_emmc_io: vdd-emmc-io {</div><div class='add'>+	vdd_emmc_io: regulator-vdd-emmc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_emmc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_3v3_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_in_otg_out: vdd-in-otg-out {</div><div class='add'>+	vdd_in_otg_out: regulator-vdd-in-otg-out {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_in_otg_out";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_misc_1v8: vdd-misc-1v8 {</div><div class='add'>+	vdd_misc_1v8: regulator-vdd-misc-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_misc_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-popmetal.dts b/arch/arm/boot/dts/rockchip/rk3288-popmetal.dts<br/>index fd90f3b8fc32..560bc23c33b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-popmetal.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-popmetal.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-popmetal.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-popmetal.dts</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_int&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_flash: flash-regulator {</div><div class='add'>+	vcc_flash: regulator-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 	 * A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled</div><div class='ctx'> 	 * by the dvp_pwr pin.</div><div class='ctx'> 	 */</div><div class='del'>-	vcc18_dvp: vcc18-dvp-regulator {</div><div class='add'>+	vcc18_dvp: regulator-vcc18-dvp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc18-dvp";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc28_dvp&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc28_dvp: vcc28-dvp-regulator {</div><div class='add'>+	vcc28_dvp: regulator-vcc28-dvp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-r89.dts b/arch/arm/boot/dts/rockchip/rk3288-r89.dts<br/>index 633e5a032463..40c65dbfb1cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-r89.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-r89.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-r89.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-r89.dts</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_int&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: vcc-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-vcc-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sdmmc: sdmmc-regulator {</div><div class='add'>+	vcc_sdmmc: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sdmmc-supply";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: sys-regulator {</div><div class='add'>+	vcc_sys: regulator-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sys-supply";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi<br/>index 76363b8afcb9..30f914f22a50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-rock2-som.dtsi</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		clock-output-names = "ext_gmac";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_flash: flash-regulator {</div><div class='add'>+	vcc_flash: regulator-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts b/arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts<br/>index 13cfdaa95cc7..58a7270b87da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-rock2-square.dts</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sata_pwr: sata-prw-regulator {</div><div class='add'>+	sata_pwr: regulator-sata-prw {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_usb_host: vcc-host-regulator {</div><div class='add'>+	vcc_usb_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 		regulator-name = "vcc_host";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi<br/>index 09618bb7d872..8e27a20f2845 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 11 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts<br/>index aa33d09184ad..ade9cc291813 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-brain.dts</a></div><div class='hunk'>@@ -14,11 +14,11 @@</div><div class='ctx'> 	compatible = "google,veyron-brain-rev0", "google,veyron-brain",</div><div class='ctx'> 		     "google,veyron", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	vcc33_sys: vcc33-sys {</div><div class='add'>+	vcc33_sys: regulator-vcc33-sys {</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc33_io: vcc33_io {</div><div class='add'>+	vcc33_io: regulator-vcc33-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc33_io";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* This turns on vbus for host2 and otg (dwc2) */</div><div class='del'>-	vcc5_host2: vcc5-host2-regulator {</div><div class='add'>+	vcc5_host2: regulator-vcc5-host2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi<br/>index 092316be67f7..3677571b4d82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi</a></div><div class='hunk'>@@ -43,23 +43,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* A non-regulated voltage from power supply or battery */</div><div class='del'>-	vccsys: vccsys {</div><div class='add'>+	vccsys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccsys";</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc33_sys: vcc33-sys {</div><div class='add'>+	vcc33_sys: regulator-vcc33-sys {</div><div class='ctx'> 		vin-supply = &lt;&amp;vccsys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v: vcc-5v {</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='ctx'> 		vin-supply = &lt;&amp;vccsys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* This turns on vbus for host1 (dwc2) */</div><div class='del'>-	vcc5_host1: vcc5-host1-regulator {</div><div class='add'>+	vcc5_host1: regulator-vcc5-host1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* This turns on vbus for otg for host mode (dwc2) */</div><div class='del'>-	vcc5v_otg: vcc5v-otg-regulator {</div><div class='add'>+	vcc5v_otg: regulator-vcc5v-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi b/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi<br/>index 32c0f10765dd..fb031964fa2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	backlight_regulator: backlight-regulator {</div><div class='add'>+	backlight_regulator: regulator-backlight {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		startup-delay-us = &lt;15000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	panel_regulator: panel-regulator {</div><div class='add'>+	panel_regulator: regulator-panel {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio7 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts b/arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts<br/>index 309b122b4d0d..6a0844e16279 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-fievel.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 		     "google,veyron-fievel-rev0", "google,veyron-fievel",</div><div class='ctx'> 		     "google,veyron", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	vccsys: vccsys {</div><div class='add'>+	vccsys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccsys";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -29,14 +29,14 @@</div><div class='ctx'> 	 * vcc33_pmuio and vcc33_io is sourced directly from vcc33_sys,</div><div class='ctx'> 	 * enabled by vcc_18</div><div class='ctx'> 	 */</div><div class='del'>-	vcc33_io: vcc33-io {</div><div class='add'>+	vcc33_io: regulator-vcc33-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		regulator-name = "vcc33_io";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5_host1: vcc5-host1-regulator {</div><div class='add'>+	vcc5_host1: regulator-vcc5-host1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio5 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5_host2: vcc5-host2-regulator {</div><div class='add'>+	vcc5_host2: regulator-vcc5-host2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio5 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v_otg: vcc5v-otg-regulator {</div><div class='add'>+	vcc5v_otg: regulator-vcc5v-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts<br/>index ffd1121d19be..d665c3e8862c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-mickey.dts</a></div><div class='hunk'>@@ -18,11 +18,11 @@</div><div class='ctx'> 		     "google,veyron-mickey-rev0", "google,veyron-mickey",</div><div class='ctx'> 		     "google,veyron", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	vcc_5v: vcc-5v {</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc33_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc33_io: vcc33_io {</div><div class='add'>+	vcc33_io: regulator-vcc33-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc33_io";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts<br/>index 6337238891eb..cc27d116d025 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron-pinky.dts</a></div><div class='hunk'>@@ -14,8 +14,8 @@</div><div class='ctx'> 	compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",</div><div class='ctx'> 		     "google,veyron", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	/delete-node/backlight-regulator;</div><div class='del'>-	/delete-node/panel-regulator;</div><div class='add'>+	/delete-node/regulator-backlight;</div><div class='add'>+	/delete-node/regulator-panel;</div><div class='ctx'> 	/delete-node/emmc-pwrseq;</div><div class='ctx'> 	/delete-node/vcc18-lcd;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi b/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi<br/>index d838bf0d5d9a..260d6c92cfd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v: vcc-5v {</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc33_sys: vcc33-sys {</div><div class='add'>+	vcc33_sys: regulator-vcc33-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc33_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc50_hdmi: vcc50-hdmi {</div><div class='add'>+	vcc50_hdmi: regulator-vcc50-hdmi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc50_hdmi";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_logic: vdd-logic {</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "vdd_logic";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi b/arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi<br/>index 793951655b73..44a9efc68f42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-vmarc-som.dtsi</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";</div><div class='ctx'> </div><div class='del'>-	vccio_flash: vccio-flash-regulator {</div><div class='add'>+	vccio_flash: regulator-vccio-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288-vyasa.dts b/arch/arm/boot/dts/rockchip/rk3288-vyasa.dts<br/>index b156a83eb7d7..1954475c69b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-vyasa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288-vyasa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288-vyasa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288-vyasa.dts</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc12_vbat: dc12-vbat {</div><div class='add'>+	dc12_vbat: regulator-dc12-vbat {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc12_vbat";</div><div class='ctx'> 		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vboot_3v3: vboot-3v3 {</div><div class='add'>+	vboot_3v3: regulator-vboot-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vboot_3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc12_vbat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc12_vbat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vboot_5v: vboot-5v {</div><div class='add'>+	vboot_5v: regulator-vboot-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vboot_sv";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc12_vbat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	v3g_3v3: v3g-3v3 {</div><div class='add'>+	v3g_3v3: regulator-v3g-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "v3g_3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc12_vbat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsus_5v: vsus-5v {</div><div class='add'>+	vsus_5v: regulator-vsus-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsus_5v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc50_hdmi: vcc50-hdmi {</div><div class='add'>+	vcc50_hdmi: regulator-vcc50-hdmi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc50_hdmi";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsus_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vusb1_5v: vusb1-5v {</div><div class='add'>+	vusb1_5v: regulator-vusb1-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vusb1_5v";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsus_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vusb2_5v: vusb2-5v {</div><div class='add'>+	vusb2_5v: regulator-vusb2-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vusb2_5v";</div><div class='ctx'> 		enable-active-high;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi<br/>index 3f1d640afafa..42d705b544ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rk3288.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rk3288.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rk3288.dtsi</a></div><div class='hunk'>@@ -70,7 +70,6 @@</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;370&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -81,7 +80,6 @@</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;370&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -92,7 +90,6 @@</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;370&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -103,7 +100,6 @@</div><div class='ctx'> 			resets = &lt;&amp;cru SRST_CORE3&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;370&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -116,6 +112,7 @@</div><div class='ctx'> 		opp-126000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;126000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-216000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;216000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi<br/>index da1d548b7330..cf5e2ed356ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rockchip-radxa-dalang-carrier.dtsi</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_host: vbus-host {</div><div class='add'>+	vbus_host: regulator-vbus-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;usb1_en_oc&gt;;</div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_typec: vbus-typec {</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;usb0_en_oc&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts b/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts<br/>index 89ca2f8d3809..3c64f0cca9eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1108-elgin-r1.dts</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1108-evb.dts b/arch/arm/boot/dts/rockchip/rv1108-evb.dts<br/>index ef150f4ee99d..0b04a8325d54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1108-evb.dts</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vsys-regulator {</div><div class='add'>+	vcc_sys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1108.dtsi b/arch/arm/boot/dts/rockchip/rv1108.dtsi<br/>index f3291f3bbc6f..42a4d72597a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1108.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1108.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1108.dtsi</a></div><div class='hunk'>@@ -32,7 +32,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a7";</div><div class='ctx'> 			reg = &lt;0xf00&gt;;</div><div class='del'>-			clock-latency = &lt;40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cru ARMCLK&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='ctx'> 			dynamic-power-coefficient = &lt;75&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts b/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts<br/>new file mode 100644<br/>index 000000000000..8a92700349b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts</a></div><div class='hunk'>@@ -0,0 +1,422 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Relfor Labs Pvt. Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "rv1109.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RV1109 Relfor Saib Board";</div><div class='add'>+	compatible = "relfor,saib", "rockchip,rv1109";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,code = &lt;KEY_DATA&gt;;</div><div class='add'>+			label = "GPIO User Switch";</div><div class='add'>+			linux,input-type = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir_receiver: ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio3  RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ir_rx&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir_transmitter: ir-transmitter {</div><div class='add'>+		compatible = "pwm-ir-tx";</div><div class='add'>+		pwms = &lt;&amp;pwm11 0 10000000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		compatible = "pwm-leds-multicolor";</div><div class='add'>+</div><div class='add'>+		multi-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			max-brightness = &lt;65535&gt;;</div><div class='add'>+</div><div class='add'>+			led-0 {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm9 0 50000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-1 {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm6 0 50000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-2 {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm10 0 50000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm-leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			pwms = &lt;&amp;pwm8 0 50000 0&gt;;</div><div class='add'>+			max-brightness = &lt;0&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			pwms = &lt;&amp;pwm5 0 50000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: pwrseq-sdio {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rtc0&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PD0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_0v8: regulator-vcc-0v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_0v8";</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		startup-delay-us = &lt;150&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v2_ddr: regulator-vcc-1v2-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v2_ddr";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		startup-delay-us = &lt;75000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		startup-delay-us = &lt;51000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_ir: regulator-vcc1v8-ir {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8_ir";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v5_ddr: regulator-vcc-2v5-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_2v5_ddr";</div><div class='add'>+		regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		startup-delay-us = &lt;75000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='add'>+		regulator-name = "vdd_arm";</div><div class='add'>+		regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;18000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_npu_vepu: regulator-vdd-npu-vepu {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_vepu";</div><div class='add'>+		regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;18000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_sensor1: thermal-sensor1 {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+		temperature-lookup-table = &lt;(-40000) 826</div><div class='add'>+					     85000 609&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_sensor2: thermal-sensor2 {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;saradc 2&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+		temperature-lookup-table = &lt;(-40000) 826</div><div class='add'>+					     85000 609&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_cmd &amp;emmc_clk&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	rockchip,default-sample-phase = &lt;90&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3m2_xfer&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc0: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+	rockchip,trcm-sync-rx-only;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0m0_sclk_rx&gt;,</div><div class='add'>+		    &lt;&amp;i2s0m0_lrck_rx&gt;,</div><div class='add'>+		    &lt;&amp;i2s0m0_sdi0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth-pins {</div><div class='add'>+		bt_reset: bt-reset {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			&lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		bt_wake_dev: bt-wake-dev {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			&lt;1 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			&lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	buttons {</div><div class='add'>+		switch: switch {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir {</div><div class='add'>+		ir_rx: ir-rx {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm {</div><div class='add'>+		pwm0m0_pins_pull_up: pwm0m0-pins-pull-up {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			/* pwm0_pin_m0 */</div><div class='add'>+			&lt;0 RK_PB6 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+		pwm1m0_pins_pull_up: pwm1m0-pins-pull-up {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			/* pwm1_pin_m0 */</div><div class='add'>+			&lt;0 RK_PB7 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		rtc_int: rtc-int {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio-pwrseq {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio0-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0m0_pins_pull_up&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1m0_pins_pull_up&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm5m0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm6 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm6m0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm8 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm8m1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm9 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm9m1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm10 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm10m1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm11 {</div><div class='add'>+	/delete-property/ pinctrl-0;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm11m1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_clk &amp;sdmmc1_cmd &amp;sdmmc1_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_xfer &amp;uart0_ctsn &amp;uart0_rtsn&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "realtek,rtl8822cs-bt";</div><div class='add'>+		device-wake-gpios = &lt;&amp;gpio1 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wake-gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reset&gt;, &lt;&amp;bt_wake_dev&gt;, &lt;&amp;bt_wake_host&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m1_xfer&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts<br/>index 7707d1b01440..d4e93d7c57a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	v3v3_sys: v3v3-sys-regulator {</div><div class='add'>+	v3v3_sys: regulator-v3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "v3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi<br/>index 7ea8d7d16f5f..5c1b60deb51b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> 		mmc0 = &amp;emmc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_flash: vccio-flash-regulator {</div><div class='add'>+	vccio_flash: regulator-vccio-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi b/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi<br/>index 9a87dc0d5f66..1aedcd3a2167 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi</a></div><div class='hunk'>@@ -323,15 +323,15 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmu_io_domains {</div><div class='del'>-	pmuio0-supply = &lt;&amp;vcc1v8_pmu&gt;;</div><div class='add'>+	pmuio0-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	pmuio1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	vccio1-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	vccio2-supply = &lt;&amp;vccio_sd&gt;;</div><div class='ctx'> 	vccio3-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='del'>-	vccio4-supply = &lt;&amp;vcc_dovdd&gt;;</div><div class='del'>-	vccio5-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='del'>-	vccio6-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='del'>-	vccio7-supply = &lt;&amp;vcc_dovdd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -342,16 +342,14 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdio {</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='ctx'> 	cap-sdio-irq;</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='del'>-	max-frequency = &lt;50000000&gt;;</div><div class='add'>+	max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdmmc1_clk &amp;sdmmc1_cmd &amp;sdmmc1_bus4&gt;;</div><div class='ctx'> 	rockchip,default-sample-phase = &lt;90&gt;;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi<br/>index 434846b85c95..d6e8b63daa42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/rockchip/rv1126.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/rockchip/rv1126.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/rockchip/rv1126.dtsi</a></div><div class='hunk'>@@ -544,6 +544,14 @@</div><div class='ctx'> 		clock-names = "pclk", "timer";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wdt: watchdog@ff680000 {</div><div class='add'>+		compatible = "rockchip,rv1126-wdt", "snps,dw-wdt";</div><div class='add'>+		reg = &lt;0xff680000 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_WDT&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s0: i2s@ff800000 {</div><div class='ctx'> 		compatible = "rockchip,rv1126-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0xff800000 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos3250-monk.dts b/arch/arm/boot/dts/samsung/exynos3250-monk.dts<br/>index 2de877d4ccc5..68236c7297d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos3250-monk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos3250-monk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos3250-monk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos3250-monk.dts</a></div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77836: i2c-gpio-0 {</div><div class='add'>+	i2c_max77836: i2c-8 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpd0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpd0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos3250-rinato.dts b/arch/arm/boot/dts/samsung/exynos3250-rinato.dts<br/>index 88fb3e68ff02..36d2171c1ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos3250-rinato.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos3250-rinato.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos3250-rinato.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos3250-rinato.dts</a></div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpe0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77836: i2c-gpio-0 {</div><div class='add'>+	i2c_max77836: i2c-8 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpd0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpd0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4210-i9100.dts b/arch/arm/boot/dts/samsung/exynos4210-i9100.dts<br/>index 0d8495792a70..df229fb8a16b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4210-i9100.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4210-i9100.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4210-i9100.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos4210-i9100.dts</a></div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpl1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max17042_fuel: i2c-gpio-0 {</div><div class='add'>+	i2c_max17042_fuel: i2c-9 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_s5k5baf: i2c-gpio-1 {</div><div class='add'>+	i2c_s5k5baf: i2c-10 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -184,7 +184,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-2 {</div><div class='add'>+	i2c-11 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi<br/>index 9bc05961577d..12b7f252b24d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi</a></div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77693: i2c-gpio-1 {</div><div class='add'>+	i2c_max77693: i2c-9 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77693_fuel: i2c-gpio-2 {</div><div class='add'>+	i2c_max77693_fuel: i2c-10 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -190,7 +190,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_magnetometer: i2c-gpio-3 {</div><div class='add'>+	i2c_magnetometer: i2c-11 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -208,7 +208,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_lightsensor: i2c-gpio-4 {</div><div class='add'>+	i2c_lightsensor: i2c-12 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpl0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpl0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -220,7 +220,7 @@</div><div class='ctx'> 		/* WiFi model uses CM3323, 3G/LTE use CM36653 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_bl: i2c-gpio-5 {</div><div class='add'>+	i2c_bl: i2c-13 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpm4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpm4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -300,12 +300,31 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	earmic_bias_reg: voltage-regulator-6 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "EAR_MICBIAS_LDO_2.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpm0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound: sound {</div><div class='ctx'> 		compatible = "samsung,midas-audio";</div><div class='ctx'> 		model = "TAB3";</div><div class='ctx'> 		mic-bias-supply = &lt;&amp;mic_bias_reg&gt;;</div><div class='ctx'> 		submic-bias-supply = &lt;&amp;submic_bias_reg&gt;;</div><div class='ctx'> </div><div class='add'>+		lineout-sel-gpios = &lt;&amp;gpj1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		headset-mic-bias-supply = &lt;&amp;earmic_bias_reg&gt;;</div><div class='add'>+		headset-detect-gpios = &lt;&amp;gpx0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		headset-key-gpios = &lt;&amp;gpx3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		samsung,headset-4pole-threshold-microvolt = &lt;710 2000&gt;;</div><div class='add'>+		samsung,headset-button-threshold-microvolt = &lt;0 130 260&gt;;</div><div class='add'>+		io-channel-names = "headset-detect";</div><div class='add'>+		io-channels = &lt;&amp;adc 0&gt;;</div><div class='add'>+</div><div class='ctx'> 		audio-routing = "HP", "HPOUT1L",</div><div class='ctx'> 				"HP", "HPOUT1R",</div><div class='ctx'> </div><div class='hunk'>@@ -351,6 +370,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adc {</div><div class='add'>+	vdd-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;bus_acp {</div><div class='ctx'> 	devfreq = &lt;&amp;bus_dmc&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -511,12 +535,11 @@</div><div class='ctx'> 	wm1811: audio-codec@1a {</div><div class='ctx'> 		compatible = "wlf,wm1811";</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='del'>-		clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='del'>-		clock-names = "MCLK1";</div><div class='add'>+		clocks = &lt;&amp;pmu_system_controller 0&gt;,</div><div class='add'>+			 &lt;&amp;s5m8767_osc S2MPS11_CLK_BT&gt;;</div><div class='add'>+		clock-names = "MCLK1", "MCLK2";</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='del'>-		interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi b/arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi<br/>index 54e1a57ae886..3248be990059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos4412-galaxy-s3.dtsi</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_ak8975: i2c-gpio-0 {</div><div class='add'>+	i2c_ak8975: i2c-13 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_cm36651: i2c-gpio-2 {</div><div class='add'>+	i2c_cm36651: i2c-14 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpf0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpf0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi b/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi<br/>index 3d5aace668dc..05ddddb565ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-midas.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-midas.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos4412-midas.dtsi</a></div><div class='hunk'>@@ -166,7 +166,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77693: i2c-gpio-1 {</div><div class='add'>+	i2c_max77693: i2c-9 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -246,7 +246,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max77693_fuel: i2c-gpio-3 {</div><div class='add'>+	i2c_max77693_fuel: i2c-10 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpf1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpf1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -267,7 +267,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-4 {</div><div class='add'>+	i2c-11 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpl0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpl0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -286,7 +286,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-mhl {</div><div class='add'>+	i2c-12 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpf0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpf0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi b/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi<br/>index 28a605802733..8d52aa13b862 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos4412-p4note.dtsi</a></div><div class='hunk'>@@ -140,7 +140,7 @@</div><div class='ctx'> 		constant-charge-voltage-max-microvolt = &lt;4200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-1 {</div><div class='add'>+	i2c-9 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -158,7 +158,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-2 {</div><div class='add'>+	i2c-10 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -179,7 +179,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-3 {</div><div class='add'>+	i2c-11 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpm4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpm4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -207,7 +207,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-4 {</div><div class='add'>+	i2c-12 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts b/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts<br/>index bb623726ef1e..6af1f64c984b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos5250-smdk5250.dts</a></div><div class='hunk'>@@ -422,6 +422,43 @@</div><div class='ctx'> 		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='ctx'> 		samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	srom_ctl: srom-ctl-pins {</div><div class='add'>+		samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",</div><div class='add'>+			       "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	srom_ebi: srom-ebi-pins {</div><div class='add'>+		samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",</div><div class='add'>+			       "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",</div><div class='add'>+			       "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",</div><div class='add'>+			       "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",</div><div class='add'>+			       "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",</div><div class='add'>+			       "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sromc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;srom_ctl&gt;, &lt;&amp;srom_ebi&gt;;</div><div class='add'>+</div><div class='add'>+	ethernet@1,0 {</div><div class='add'>+		compatible = "smsc,lan9115";</div><div class='add'>+		reg = &lt;1 0 0x100&gt;;</div><div class='add'>+		phy-mode = "mii";</div><div class='add'>+		smsc,irq-push-pull;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpx0&gt;;</div><div class='add'>+		interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reg-io-width = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		samsung,srom-page-mode;</div><div class='add'>+		samsung,srom-timing = &lt;9 12 1 6 1 1&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbdrd {</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi<br/>index b9e7c4938818..4616794b19e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5250.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos5250.dtsi</a></div><div class='hunk'>@@ -1214,6 +1214,15 @@</div><div class='ctx'> 	dma-names = "rx", "tx";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sromc {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges = &lt;0 0 0x04000000 0x20000&gt;,</div><div class='add'>+		 &lt;1 0 0x05000000 0x20000&gt;,</div><div class='add'>+		 &lt;2 0 0x06000000 0x20000&gt;,</div><div class='add'>+		 &lt;3 0 0x07000000 0x20000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sss {</div><div class='ctx'> 	clocks = &lt;&amp;clock CLK_SSS&gt;;</div><div class='ctx'> 	clock-names = "secss";</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/exynos5410.dtsi b/arch/arm/boot/dts/samsung/exynos5410.dtsi<br/>index 546035e78f40..350bc8d6aa5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5410.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/exynos5410.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/exynos5410.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/exynos5410.dtsi</a></div><div class='hunk'>@@ -372,10 +372,10 @@</div><div class='ctx'> &amp;sromc {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='del'>-	ranges = &lt;0 0 0x04000000 0x20000</div><div class='del'>-		  1 0 0x05000000 0x20000</div><div class='del'>-		  2 0 0x06000000 0x20000</div><div class='del'>-		  3 0 0x07000000 0x20000&gt;;</div><div class='add'>+	ranges = &lt;0 0 0x04000000 0x20000&gt;,</div><div class='add'>+		 &lt;1 0 0x05000000 0x20000&gt;,</div><div class='add'>+		 &lt;2 0 0x06000000 0x20000&gt;,</div><div class='add'>+		 &lt;3 0 0x07000000 0x20000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;trng {</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/s5pv210-aquila.dts b/arch/arm/boot/dts/samsung/s5pv210-aquila.dts<br/>index 0f5c6cd0f3a1..e9ec2cc718e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-aquila.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-aquila.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-aquila.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/s5pv210-aquila.dts</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_pmic: i2c-pmic {</div><div class='add'>+	i2c_pmic: i2c-3 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/s5pv210-aries.dtsi b/arch/arm/boot/dts/samsung/s5pv210-aries.dtsi<br/>index f628d3660493..0a1a35f4f7cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-aries.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-aries.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-aries.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/s5pv210-aries.dtsi</a></div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		power-off-delay-us = &lt;500&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_sound: i2c-gpio-0 {</div><div class='add'>+	i2c_sound: i2c-3 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;mp05 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;mp05 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -150,7 +150,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_accel: i2c-gpio-1 {</div><div class='add'>+	i2c_accel: i2c-4 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj3 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -170,7 +170,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_pmic: i2c-gpio-2 {</div><div class='add'>+	i2c_pmic: i2c-5 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -420,7 +420,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_musb: i2c-gpio-3 {</div><div class='add'>+	i2c_musb: i2c-6 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj3 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -442,7 +442,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_fuel: i2c-gpio-4 {</div><div class='add'>+	i2c_fuel: i2c-7 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;mp05 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;mp05 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -459,7 +459,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_touchkey: i2c-gpio-5 {</div><div class='add'>+	i2c_touchkey: i2c-8 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj3 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj3 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -485,7 +485,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_prox: i2c-gpio-6 {</div><div class='add'>+	i2c_prox: i2c-9 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpg2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpg0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -513,7 +513,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_magnetometer: i2c-gpio-7 {</div><div class='add'>+	i2c_magnetometer: i2c-10 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='hunk'>@@ -855,7 +855,7 @@</div><div class='ctx'> 	assigned-clock-rates = &lt;0&gt;, &lt;50000000&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clocks MOUT_MPLL&gt;;</div><div class='ctx'> </div><div class='del'>-	wlan@1 {</div><div class='add'>+	wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gph2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/s5pv210-galaxys.dts b/arch/arm/boot/dts/samsung/s5pv210-galaxys.dts<br/>index 879294412381..5863a1300cc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-galaxys.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-galaxys.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-galaxys.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/s5pv210-galaxys.dts</a></div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_fmradio: i2c-gpio-8 {</div><div class='add'>+	i2c_fmradio: i2c-11 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpd1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpd1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/samsung/s5pv210-goni.dts b/arch/arm/boot/dts/samsung/s5pv210-goni.dts<br/>index d32f42dd1bf5..079581f4dfec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-goni.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/samsung/s5pv210-goni.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/samsung/s5pv210-goni.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/samsung/s5pv210-goni.dts</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_pmic: i2c-pmic {</div><div class='add'>+	i2c_pmic: i2c-3 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpj4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpj4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts<br/>index 7e08a459f7d8..ab910e1b5e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/socionext/uniphier-pxs2-vodka.dts</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			comp_spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;comp_spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile<br/>index eab3a9bd435f..e906bf6ba004 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/Makefile</a></div><div class='hunk'>@@ -13,8 +13,6 @@ dtb-$(CONFIG_ARCH_SPEAR3XX) += \</div><div class='ctx'> dtb-$(CONFIG_ARCH_SPEAR6XX) += \</div><div class='ctx'> 	spear600-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STI) += \</div><div class='del'>-	stih407-b2120.dtb \</div><div class='del'>-	stih410-b2120.dtb \</div><div class='ctx'> 	stih410-b2260.dtb \</div><div class='ctx'> 	stih418-b2199.dtb \</div><div class='ctx'> 	stih418-b2264.dtb</div><div class='hunk'>@@ -28,7 +26,9 @@ dtb-$(CONFIG_ARCH_STM32) += \</div><div class='ctx'> 	stm32746g-eval.dtb \</div><div class='ctx'> 	stm32h743i-eval.dtb \</div><div class='ctx'> 	stm32h743i-disco.dtb \</div><div class='add'>+	stm32h747i-disco.dtb \</div><div class='ctx'> 	stm32h750i-art-pi.dtb \</div><div class='add'>+	stm32mp133c-prihmb.dtb \</div><div class='ctx'> 	stm32mp135f-dhcor-dhsbc.dtb \</div><div class='ctx'> 	stm32mp135f-dk.dtb \</div><div class='ctx'> 	stm32mp151a-prtt1a.dtb \</div><div class='hunk'>@@ -37,8 +37,12 @@ dtb-$(CONFIG_ARCH_STM32) += \</div><div class='ctx'> 	stm32mp151a-dhcor-testbench.dtb \</div><div class='ctx'> 	stm32mp151c-mecio1r0.dtb \</div><div class='ctx'> 	stm32mp151c-mect1s.dtb \</div><div class='add'>+	stm32mp151c-plyaqm.dtb \</div><div class='ctx'> 	stm32mp153c-dhcom-drc02.dtb \</div><div class='ctx'> 	stm32mp153c-dhcor-drc-compact.dtb \</div><div class='add'>+	stm32mp153c-lxa-fairytux2-gen1.dtb \</div><div class='add'>+	stm32mp153c-lxa-fairytux2-gen2.dtb \</div><div class='add'>+	stm32mp153c-lxa-tac-gen3.dtb \</div><div class='ctx'> 	stm32mp153c-mecio1r1.dtb \</div><div class='ctx'> 	stm32mp157a-avenger96.dtb \</div><div class='ctx'> 	stm32mp157a-dhcor-avenger96.dtb \</div><div class='hunk'>@@ -65,7 +69,9 @@ dtb-$(CONFIG_ARCH_STM32) += \</div><div class='ctx'> 	stm32mp157c-lxa-tac-gen2.dtb \</div><div class='ctx'> 	stm32mp157c-odyssey.dtb \</div><div class='ctx'> 	stm32mp157c-osd32mp1-red.dtb \</div><div class='del'>-	stm32mp157c-phycore-stm32mp1-3.dtb</div><div class='add'>+	stm32mp157c-phycore-stm32mp1-3.dtb \</div><div class='add'>+	stm32mp157c-ultra-fly-sbc.dtb \</div><div class='add'>+	stm32mp157f-dk2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_U8500) += \</div><div class='ctx'> 	ste-snowball.dtb \</div><div class='ctx'> 	ste-hrefprev60-stuib.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear1310-evb.dts b/arch/arm/boot/dts/st/spear1310-evb.dts<br/>index 18191a87f07c..417a064db11e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1310-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1310-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1310-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear1310-evb.dts</a></div><div class='hunk'>@@ -159,7 +159,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac0: eth@e2000000 {</div><div class='add'>+		gmac0: ethernet@e2000000 {</div><div class='ctx'> 			phy-mode = "gmii";</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -205,19 +205,19 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e4800000 {</div><div class='add'>+		usb@e4800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e5800000 {</div><div class='add'>+		usb@e5800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e4000000 {</div><div class='add'>+		usb@e4000000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e5000000 {</div><div class='add'>+		usb@e5000000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -353,7 +353,6 @@</div><div class='ctx'> 					spi-max-frequency = &lt;1000000&gt;;</div><div class='ctx'> 					spi-cpha;</div><div class='ctx'> 					pl022,interface = &lt;0&gt;;</div><div class='del'>-					pl022,slave-tx-disable;</div><div class='ctx'> 					pl022,com-mode = &lt;0&gt;;</div><div class='ctx'> 					pl022,rx-level-trig = &lt;0&gt;;</div><div class='ctx'> 					pl022,tx-level-trig = &lt;0&gt;;</div><div class='hunk'>@@ -385,7 +384,6 @@</div><div class='ctx'> 					spi-cpol;</div><div class='ctx'> 					spi-cpha;</div><div class='ctx'> 					pl022,interface = &lt;0&gt;;</div><div class='del'>-					pl022,slave-tx-disable;</div><div class='ctx'> 					pl022,com-mode = &lt;0x2&gt;;</div><div class='ctx'> 					pl022,rx-level-trig = &lt;0&gt;;</div><div class='ctx'> 					pl022,tx-level-trig = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear1310.dtsi b/arch/arm/boot/dts/st/spear1310.dtsi<br/>index ba827d60bf07..1498996be14e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1310.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1310.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1310.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear1310.dtsi</a></div><div class='hunk'>@@ -128,7 +128,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac1: eth@5c400000 {</div><div class='add'>+		gmac1: ethernet@5c400000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0x5c400000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 95 0x4&gt;;</div><div class='hunk'>@@ -137,7 +137,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac2: eth@5c500000 {</div><div class='add'>+		gmac2: ethernet@5c500000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0x5c500000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 96 0x4&gt;;</div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac3: eth@5c600000 {</div><div class='add'>+		gmac3: ethernet@5c600000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0x5c600000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 97 0x4&gt;;</div><div class='hunk'>@@ -155,7 +155,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac4: eth@5c700000 {</div><div class='add'>+		gmac4: ethernet@5c700000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0x5c700000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 98 0x4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear1340-evb.dts b/arch/arm/boot/dts/st/spear1340-evb.dts<br/>index cea624fc745c..9e7c356b1d9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1340-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear1340-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear1340-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear1340-evb.dts</a></div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac0: eth@e2000000 {</div><div class='add'>+		gmac0: ethernet@e2000000 {</div><div class='ctx'> 			phy-mode = "rgmii";</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -203,7 +203,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e4800000 {</div><div class='add'>+		usb@e4800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +221,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e5800000 {</div><div class='add'>+		usb@e5800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -238,11 +238,11 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e4000000 {</div><div class='add'>+		usb@e4000000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e5000000 {</div><div class='add'>+		usb@e5000000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -446,7 +446,6 @@</div><div class='ctx'> 					spi-cpol;</div><div class='ctx'> 					spi-cpha;</div><div class='ctx'> 					pl022,interface = &lt;0&gt;;</div><div class='del'>-					pl022,slave-tx-disable;</div><div class='ctx'> 					pl022,com-mode = &lt;0x2&gt;;</div><div class='ctx'> 					pl022,rx-level-trig = &lt;0&gt;;</div><div class='ctx'> 					pl022,tx-level-trig = &lt;0&gt;;</div><div class='hunk'>@@ -461,7 +460,6 @@</div><div class='ctx'> 					spi-cpha;</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> 					pl022,interface = &lt;0&gt;;</div><div class='del'>-					pl022,slave-tx-disable;</div><div class='ctx'> 					pl022,com-mode = &lt;0&gt;;</div><div class='ctx'> 					pl022,rx-level-trig = &lt;0&gt;;</div><div class='ctx'> 					pl022,tx-level-trig = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear13xx.dtsi b/arch/arm/boot/dts/st/spear13xx.dtsi<br/>index 3b6897084e26..159e941708ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear13xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear13xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear13xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear13xx.dtsi</a></div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac0: eth@e2000000 {</div><div class='add'>+		gmac0: ethernet@e2000000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0xe2000000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 33 0x4&gt;,</div><div class='hunk'>@@ -174,7 +174,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e4800000 {</div><div class='add'>+		usb@e4800000 {</div><div class='ctx'> 			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0xe4800000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 64 0x4&gt;;</div><div class='hunk'>@@ -182,7 +182,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e5800000 {</div><div class='add'>+		usb@e5800000 {</div><div class='ctx'> 			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0xe5800000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 66 0x4&gt;;</div><div class='hunk'>@@ -190,7 +190,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e4000000 {</div><div class='add'>+		usb@e4000000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe4000000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 65 0x4&gt;;</div><div class='hunk'>@@ -198,7 +198,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e5000000 {</div><div class='add'>+		usb@e5000000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe5000000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 67 0x4&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear300-evb.dts b/arch/arm/boot/dts/st/spear300-evb.dts<br/>index 303ef29fb805..80fae76d4610 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear300-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear300-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear300-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear300-evb.dts</a></div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac: eth@e0800000 {</div><div class='add'>+		gmac: ethernet@e0800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -119,15 +119,15 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e1800000 {</div><div class='add'>+		usb@e1800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e1900000 {</div><div class='add'>+		usb@e1900000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e2100000 {</div><div class='add'>+		usb@e2100000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear310-evb.dts b/arch/arm/boot/dts/st/spear310-evb.dts<br/>index ea0b53036f7b..a3449eb7e59b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear310-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear310-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear310-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear310-evb.dts</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac: eth@e0800000 {</div><div class='add'>+		gmac: ethernet@e0800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -133,15 +133,15 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e1800000 {</div><div class='add'>+		usb@e1800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e1900000 {</div><div class='add'>+		usb@e1900000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e2100000 {</div><div class='add'>+		usb@e2100000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear320-evb.dts b/arch/arm/boot/dts/st/spear320-evb.dts<br/>index 3c026d021c92..984075e60634 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear320-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear320-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear320-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear320-evb.dts</a></div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac: eth@e0800000 {</div><div class='add'>+		gmac: ethernet@e0800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -142,15 +142,15 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e1800000 {</div><div class='add'>+		usb@e1800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e1900000 {</div><div class='add'>+		usb@e1900000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e2100000 {</div><div class='add'>+		usb@e2100000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear320-hmi.dts b/arch/arm/boot/dts/st/spear320-hmi.dts<br/>index 721e5ee7b680..8010918e5257 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear320-hmi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear320-hmi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear320-hmi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear320-hmi.dts</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e1800000 {</div><div class='add'>+		usb@e1800000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -147,11 +147,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e1900000 {</div><div class='add'>+		usb@e1900000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e2100000 {</div><div class='add'>+		usb@e2100000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear3xx.dtsi b/arch/arm/boot/dts/st/spear3xx.dtsi<br/>index cc88ebe7a60c..54e87ac98164 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear3xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear3xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear3xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear3xx.dtsi</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gmac: eth@e0800000 {</div><div class='add'>+		gmac: ethernet@e0800000 {</div><div class='ctx'> 			compatible = "snps,dwmac-3.40a";</div><div class='ctx'> 			reg = &lt;0xe0800000 0x8000&gt;;</div><div class='ctx'> 			interrupts = &lt;23 22&gt;;</div><div class='hunk'>@@ -73,21 +73,21 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@e1800000 {</div><div class='add'>+		usb@e1800000 {</div><div class='ctx'> 			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0xe1800000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;26&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e1900000 {</div><div class='add'>+		usb@e1900000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe1900000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;25&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci@e2100000 {</div><div class='add'>+		usb@e2100000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe2100000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;27&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/spear600.dtsi b/arch/arm/boot/dts/st/spear600.dtsi<br/>index 6b67c0ceaed9..9a93367445ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear600.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/spear600.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/spear600.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/spear600.dtsi</a></div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci_usb0: ehci@e1800000 {</div><div class='add'>+		ehci_usb0: usb@e1800000 {</div><div class='ctx'> 			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0xe1800000 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci_usb1: ehci@e2000000 {</div><div class='add'>+		ehci_usb1: usb@e2000000 {</div><div class='ctx'> 			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='ctx'> 			reg = &lt;0xe2000000 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci_usb0: ohci@e1900000 {</div><div class='add'>+		ohci_usb0: usb@e1900000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe1900000 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ohci_usb1: ohci@e2100000 {</div><div class='add'>+		ohci_usb1: usb@e2100000 {</div><div class='ctx'> 			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='ctx'> 			reg = &lt;0xe2100000 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi<br/>index 31a86606beda..9a6304b7ab25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi</a></div><div class='hunk'>@@ -454,6 +454,31 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* MC2 without feedback clock on A8 */</div><div class='add'>+		mc2_a_2_default: mc2_a_2_default {</div><div class='add'>+			default_mux {</div><div class='add'>+				function = "mc2";</div><div class='add'>+				groups = "mc2_a_2";</div><div class='add'>+			};</div><div class='add'>+			default_cfg1 {</div><div class='add'>+				pins = "GPIO128_A5"; /* CLK */</div><div class='add'>+				ste,config = &lt;&amp;out_lo&gt;;</div><div class='add'>+			};</div><div class='add'>+			default_cfg2 {</div><div class='add'>+				pins =</div><div class='add'>+				"GPIO129_B4", /* CMD */</div><div class='add'>+				"GPIO131_A12", /* DAT0 */</div><div class='add'>+				"GPIO132_C10", /* DAT1 */</div><div class='add'>+				"GPIO133_B10", /* DAT2 */</div><div class='add'>+				"GPIO134_B9", /* DAT3 */</div><div class='add'>+				"GPIO135_A9", /* DAT4 */</div><div class='add'>+				"GPIO136_C7", /* DAT5 */</div><div class='add'>+				"GPIO137_A7", /* DAT6 */</div><div class='add'>+				"GPIO138_C5"; /* DAT7 */</div><div class='add'>+				ste,config = &lt;&amp;in_pu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mc2_a_1_sleep: mc2_a_1_sleep {</div><div class='ctx'> 			sleep_cfg1 {</div><div class='ctx'> 				pins = "GPIO128_A5"; /* CLK */</div><div class='hunk'>@@ -478,6 +503,30 @@</div><div class='ctx'> 				ste,config = &lt;&amp;in_wkup_pdis&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mc2_a_2_sleep: mc2_a_2_sleep {</div><div class='add'>+			sleep_cfg1 {</div><div class='add'>+				pins = "GPIO128_A5"; /* CLK */</div><div class='add'>+				ste,config = &lt;&amp;out_lo_wkup_pdis&gt;;</div><div class='add'>+			};</div><div class='add'>+			sleep_cfg2 {</div><div class='add'>+				pins =</div><div class='add'>+				"GPIO129_B4"; /* CMD */</div><div class='add'>+				ste,config = &lt;&amp;in_wkup_pdis_en&gt;;</div><div class='add'>+			};</div><div class='add'>+			sleep_cfg3 {</div><div class='add'>+				pins =</div><div class='add'>+				"GPIO131_A12", /* DAT0 */</div><div class='add'>+				"GPIO132_C10", /* DAT1 */</div><div class='add'>+				"GPIO133_B10", /* DAT2 */</div><div class='add'>+				"GPIO134_B9", /* DAT3 */</div><div class='add'>+				"GPIO135_A9", /* DAT4 */</div><div class='add'>+				"GPIO136_C7", /* DAT5 */</div><div class='add'>+				"GPIO137_A7", /* DAT6 */</div><div class='add'>+				"GPIO138_C5"; /* DAT7 */</div><div class='add'>+				ste,config = &lt;&amp;in_wkup_pdis&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdi4 {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/ste-nomadik-s8815.dts b/arch/arm/boot/dts/st/ste-nomadik-s8815.dts<br/>index c905c2643a12..7c7a53604204 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-nomadik-s8815.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-nomadik-s8815.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-nomadik-s8815.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/ste-nomadik-s8815.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gpio3: gpio@101e7000 {</div><div class='ctx'> 		/* This hog will bias the MMC/SD card detect line */</div><div class='del'>-		mmcsd-gpio {</div><div class='add'>+		mmcsd-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;16 0x0&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -117,8 +117,8 @@</div><div class='ctx'> 	/* GPIO I2C connected to the USB portions of the STw4811 only */</div><div class='ctx'> 	gpio-i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;gpio2 10 0&gt;, /* sda */</div><div class='del'>-			&lt;&amp;gpio2 9 0&gt;; /* scl */</div><div class='add'>+		sda-gpios = &lt;&amp;gpio2 10 0&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;gpio2 9 0&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts<br/>index c623cc35c5ea..8f1780d560ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts</a></div><div class='hunk'>@@ -383,8 +383,9 @@</div><div class='ctx'> 				/* BT_WAKE on GPIO199 */</div><div class='ctx'> 				device-wakeup-gpios = &lt;&amp;gpio6 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				/* BT_HOST_WAKE on GPIO97 */</div><div class='del'>-				/* FIXME: convert to interrupt */</div><div class='del'>-				host-wakeup-gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+				interrupts = &lt;1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				interrupt-names = "host-wakeup";</div><div class='ctx'> 				/* BT_RST_N on GPIO209 */</div><div class='ctx'> 				reset-gpios = &lt;&amp;gpio6 17 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -544,6 +545,7 @@</div><div class='ctx'> 				touchscreen-size-y = &lt;800&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;tsp_default&gt;;</div><div class='add'>+				linux,keycodes = &lt;KEY_MENU&gt;, &lt;KEY_BACK&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts<br/>index 2355ca6e9ad6..9f58a3c2d06d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts</a></div><div class='hunk'>@@ -451,13 +451,17 @@</div><div class='ctx'> 			no-sdio;</div><div class='ctx'> 			no-sd;</div><div class='ctx'> 			vmmc-supply = &lt;&amp;ldo_3v3_reg&gt;;</div><div class='add'>+			vqmmc-supply = &lt;&amp;db8500_vsmps2_reg&gt;;</div><div class='ctx'> 			pinctrl-names = "default", "sleep";</div><div class='ctx'> 			/*</div><div class='del'>-			 * GPIO130 will be set to input no pull-up resulting in a resistor</div><div class='del'>-			 * pulling the reset high and taking the memory out of reset.</div><div class='add'>+			 * This muxing excludes the feedback clock on GPIO130</div><div class='add'>+			 * which is instead used for reset of the eMMC.</div><div class='add'>+			 * GPIO130 will be set to input no pull-up resulting in</div><div class='add'>+			 * a resistor pulling the reset high and taking the</div><div class='add'>+			 * memory out of reset.</div><div class='ctx'> 			 */</div><div class='del'>-			pinctrl-0 = &lt;&amp;mc2_a_1_default&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;mc2_a_1_sleep&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;mc2_a_2_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;mc2_a_2_sleep&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -475,8 +479,9 @@</div><div class='ctx'> 				/* BT_WAKE on GPIO199 */</div><div class='ctx'> 				device-wakeup-gpios = &lt;&amp;gpio6 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				/* BT_HOST_WAKE on GPIO97 */</div><div class='del'>-				/* FIXME: convert to interrupt */</div><div class='del'>-				host-wakeup-gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+				interrupts = &lt;1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				interrupt-names = "host-wakeup";</div><div class='ctx'> 				/* BT_RST_N on GPIO209 */</div><div class='ctx'> 				reset-gpios = &lt;&amp;gpio6 17 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -644,6 +649,7 @@</div><div class='ctx'> 				touchscreen-size-y = &lt;800&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;tsp_default&gt;;</div><div class='add'>+				linux,keycodes = &lt;KEY_MENU&gt;, &lt;KEY_BACK&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -677,14 +683,14 @@</div><div class='ctx'> 	sdi2 {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This will make the resistor mounted in R0.0 pull up</div><div class='del'>-		 * the reset line and take the eMMC out of reset. On</div><div class='del'>-		 * R0.4 variants, GPIO130 should be set in GPIO mode and</div><div class='del'>-		 * pulled down. (Not connected.)</div><div class='add'>+		 * the reset line and take the eMMC out of reset so set to</div><div class='add'>+		 * GPIO input mode, no pull-up. On R0.4 variants, GPIO130</div><div class='add'>+		 * could be set in GPIO mode and pulled down. (Not connected.)</div><div class='ctx'> 		 */</div><div class='del'>-		mc2_a_1_default {</div><div class='del'>-			default_cfg2 {</div><div class='del'>-				pins = "GPIO130_C8"; /* FBCLK */</div><div class='del'>-				ste,config = &lt;&amp;in_nopull&gt;;</div><div class='add'>+		mc2_a_2_default {</div><div class='add'>+			default_cfg3 {</div><div class='add'>+				pins = "GPIO130_C8"; /* RST_N */</div><div class='add'>+				ste,config = &lt;&amp;gpio_in_nopull&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts<br/>index 229f7c32103c..64562a3a262c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts</a></div><div class='hunk'>@@ -481,8 +481,9 @@</div><div class='ctx'> 				/* BT_WAKE on GPIO199 */</div><div class='ctx'> 				device-wakeup-gpios = &lt;&amp;gpio6 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 				/* BT_HOST_WAKE on GPIO97 */</div><div class='del'>-				/* FIXME: convert to interrupt */</div><div class='del'>-				host-wakeup-gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+				interrupts = &lt;1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				interrupt-names = "host-wakeup";</div><div class='ctx'> 				/* BT_RST_N on GPIO209 */</div><div class='ctx'> 				reset-gpios = &lt;&amp;gpio6 17 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih407-b2120.dts b/arch/arm/boot/dts/st/stih407-b2120.dts<br/>deleted file mode 100644<br/>index 9c79982ee7ba..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih407-b2120.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-b2120.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2014 STMicroelectronics (R&amp;D) Limited.</div><div class='del'>- * Author: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;</div><div class='del'>- */</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "stih407.dtsi"</div><div class='del'>-#include "stihxxx-b2120.dtsi"</div><div class='del'>-/ {</div><div class='del'>-	model = "STiH407 B2120";</div><div class='del'>-	compatible = "st,stih407-b2120", "st,stih407";</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = &amp;sbc_serial0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@40000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;sbc_serial0;</div><div class='del'>-		ethernet0 = &amp;ethernet0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih407-clock.dtsi b/arch/arm/boot/dts/st/stih407-clock.dtsi<br/>deleted file mode 100644<br/>index 350bcfcf498b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih407-clock.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-clock.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,210 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2014 STMicroelectronics R&amp;D Limited</div><div class='del'>- */</div><div class='del'>-#include &lt;dt-bindings/clock/stih407-clks.h&gt;</div><div class='del'>-/ {</div><div class='del'>-	/*</div><div class='del'>-	 * Fixed 30MHz oscillator inputs to SoC</div><div class='del'>-	 */</div><div class='del'>-	clk_sysin: clk-sysin {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;30000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clk_tmdsout_hdmi: clk-tmdsout-hdmi {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * A9 PLL.</div><div class='del'>-		 */</div><div class='del'>-		clockgen-a9@92b0000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x92b0000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-			clockgen_a9_pll: clockgen-a9-pll {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,stih407-clkgen-plla9";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_m_a9: clk-m-a9 {</div><div class='del'>-				#clock-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "st,stih407-clkgen-a9-mux";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clockgen_a9_pll 0&gt;,</div><div class='del'>-					 &lt;&amp;clockgen_a9_pll 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_flexgen 13&gt;,</div><div class='del'>-					 &lt;&amp;clk_m_a9_ext2f_div2&gt;;</div><div class='del'>-</div><div class='del'>-				/*</div><div class='del'>-				 * ARM Peripheral clock for timers</div><div class='del'>-				 */</div><div class='del'>-				arm_periph_clk: clk-m-a9-periphs {</div><div class='del'>-					#clock-cells = &lt;0&gt;;</div><div class='del'>-					compatible = "fixed-factor-clock";</div><div class='del'>-</div><div class='del'>-					clocks = &lt;&amp;clk_m_a9&gt;;</div><div class='del'>-					clock-div = &lt;2&gt;;</div><div class='del'>-					clock-mult = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clockgen-a@90ff000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x90ff000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-			clk_s_a0_pll: clk-s-a0-pll {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,clkgen-pll0-a0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_a0_flexgen: clk-s-a0-flexgen {</div><div class='del'>-				compatible = "st,flexgen", "st,flexgen-stih407-a0";</div><div class='del'>-</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_a0_pll 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clk_s_c0: clockgen-c@9103000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x9103000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-			clk_s_c0_pll0: clk-s-c0-pll0 {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,clkgen-pll0-c0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_c0_pll1: clk-s-c0-pll1 {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,clkgen-pll1-c0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_c0_quadfs: clk-s-c0-quadfs {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,quadfs-pll";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_c0_flexgen: clk-s-c0-flexgen {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,flexgen", "st,flexgen-stih407-c0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_c0_pll0 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_pll1 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_quadfs 1&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_quadfs 2&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_quadfs 3&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;;</div><div class='del'>-</div><div class='del'>-				/*</div><div class='del'>-				 * ARM Peripheral clock for timers</div><div class='del'>-				 */</div><div class='del'>-				clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {</div><div class='del'>-					#clock-cells = &lt;0&gt;;</div><div class='del'>-					compatible = "fixed-factor-clock";</div><div class='del'>-</div><div class='del'>-					clocks = &lt;&amp;clk_s_c0_flexgen 13&gt;;</div><div class='del'>-</div><div class='del'>-					clock-output-names = "clk-m-a9-ext2f-div2";</div><div class='del'>-</div><div class='del'>-					clock-div = &lt;2&gt;;</div><div class='del'>-					clock-mult = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clockgen-d0@9104000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x9104000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-			clk_s_d0_quadfs: clk-s-d0-quadfs {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,quadfs-d0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_d0_flexgen: clk-s-d0-flexgen {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,flexgen", "st,flexgen-stih407-d0";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_d0_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d0_quadfs 1&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d0_quadfs 2&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d0_quadfs 3&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clockgen-d2@9106000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x9106000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-			clk_s_d2_quadfs: clk-s-d2-quadfs {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,quadfs-d2";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_d2_flexgen: clk-s-d2-flexgen {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,flexgen", "st,flexgen-stih407-d2";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 1&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 2&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 3&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;,</div><div class='del'>-					 &lt;&amp;clk_tmdsout_hdmi&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clockgen-d3@9107000 {</div><div class='del'>-			compatible = "st,clkgen-c32";</div><div class='del'>-			reg = &lt;0x9107000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-			clk_s_d3_quadfs: clk-s-d3-quadfs {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,quadfs-d3";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk_s_d3_flexgen: clk-s-d3-flexgen {</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				compatible = "st,flexgen", "st,flexgen-stih407-d3";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_d3_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d3_quadfs 1&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d3_quadfs 2&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d3_quadfs 3&gt;,</div><div class='del'>-					 &lt;&amp;clk_sysin&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/st/stih407-family.dtsi<br/>index 35a55aef7f4b..3e6a0542e3ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih407-family.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407-family.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih407-family.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stih407-family.dtsi</a></div><div class='hunk'>@@ -669,7 +669,7 @@</div><div class='ctx'> 			interrupt-names = "hostc";</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;phy_port0 PHY_TYPE_SATA&gt;;</div><div class='del'>-			phy-names = "ahci_phy";</div><div class='add'>+			phy-names = "sata-phy";</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;powerdown STIH407_SATA0_POWERDOWN&gt;,</div><div class='ctx'> 				 &lt;&amp;softreset STIH407_SATA0_SOFTRESET&gt;,</div><div class='hunk'>@@ -692,7 +692,7 @@</div><div class='ctx'> 			interrupt-names = "hostc";</div><div class='ctx'> </div><div class='ctx'> 			phys = &lt;&amp;phy_port1 PHY_TYPE_SATA&gt;;</div><div class='del'>-			phy-names = "ahci_phy";</div><div class='add'>+			phy-names = "sata-phy";</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;powerdown STIH407_SATA1_POWERDOWN&gt;,</div><div class='ctx'> 				 &lt;&amp;softreset STIH407_SATA1_SOFTRESET&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih407.dtsi b/arch/arm/boot/dts/st/stih407.dtsi<br/>deleted file mode 100644<br/>index aca43d2bdaad..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih407.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih407.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,145 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2015 STMicroelectronics Limited.</div><div class='del'>- * Author: Gabriel Fernandez &lt;gabriel.fernandez@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-#include "stih407-clock.dtsi"</div><div class='del'>-#include "stih407-family.dtsi"</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-/ {</div><div class='del'>-	soc {</div><div class='del'>-		sti-display-subsystem@0 {</div><div class='del'>-			compatible = "st,sti-display-subsystem";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;0 0&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_quadfs 1&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_c0_pll1 0&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_c0_flexgen CLK_COMPO_DVP&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_c0_flexgen CLK_MAIN_DISP&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_MAIN_DISP&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_AUX_DISP&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP1&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP2&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP3&gt;,</div><div class='del'>-					  &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP4&gt;;</div><div class='del'>-</div><div class='del'>-			assigned-clock-parents = &lt;0&gt;,</div><div class='del'>-						 &lt;0&gt;,</div><div class='del'>-						 &lt;0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_c0_pll1 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_c0_pll1 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 1&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-						 &lt;&amp;clk_s_d2_quadfs 0&gt;;</div><div class='del'>-</div><div class='del'>-			assigned-clock-rates = &lt;297000000&gt;,</div><div class='del'>-					       &lt;108000000&gt;,</div><div class='del'>-					       &lt;0&gt;,</div><div class='del'>-					       &lt;400000000&gt;,</div><div class='del'>-					       &lt;400000000&gt;;</div><div class='del'>-</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			sti-compositor@9d11000 {</div><div class='del'>-				compatible = "st,stih407-compositor";</div><div class='del'>-				reg = &lt;0x9d11000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-				clock-names = "compo_main",</div><div class='del'>-					      "compo_aux",</div><div class='del'>-					      "pix_main",</div><div class='del'>-					      "pix_aux",</div><div class='del'>-					      "pix_gdp1",</div><div class='del'>-					      "pix_gdp2",</div><div class='del'>-					      "pix_gdp3",</div><div class='del'>-					      "pix_gdp4",</div><div class='del'>-					      "main_parent",</div><div class='del'>-					      "aux_parent";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_c0_flexgen CLK_COMPO_DVP&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_c0_flexgen CLK_COMPO_DVP&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_MAIN_DISP&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_AUX_DISP&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP1&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP2&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP3&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_PIX_GDP4&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 1&gt;;</div><div class='del'>-</div><div class='del'>-				reset-names = "compo-main", "compo-aux";</div><div class='del'>-				resets = &lt;&amp;softreset STIH407_COMPO_SOFTRESET&gt;,</div><div class='del'>-					 &lt;&amp;softreset STIH407_COMPO_SOFTRESET&gt;;</div><div class='del'>-				st,vtg = &lt;&amp;vtg_main&gt;, &lt;&amp;vtg_aux&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sti-tvout@8d08000 {</div><div class='del'>-				compatible = "st,stih407-tvout";</div><div class='del'>-				reg = &lt;0x8d08000 0x1000&gt;;</div><div class='del'>-				reg-names = "tvout-reg";</div><div class='del'>-				reset-names = "tvout";</div><div class='del'>-				resets = &lt;&amp;softreset STIH407_HDTVOUT_SOFTRESET&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;1&gt;;</div><div class='del'>-				assigned-clocks = &lt;&amp;clk_s_d2_flexgen CLK_PIX_HDMI&gt;,</div><div class='del'>-						  &lt;&amp;clk_s_d2_flexgen CLK_TMDS_HDMI&gt;,</div><div class='del'>-						  &lt;&amp;clk_s_d2_flexgen CLK_REF_HDMIPHY&gt;,</div><div class='del'>-						  &lt;&amp;clk_s_d0_flexgen CLK_PCM_0&gt;,</div><div class='del'>-						  &lt;&amp;clk_s_d2_flexgen CLK_PIX_HDDAC&gt;,</div><div class='del'>-						  &lt;&amp;clk_s_d2_flexgen CLK_HDDAC&gt;;</div><div class='del'>-</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-							 &lt;&amp;clk_tmdsout_hdmi&gt;,</div><div class='del'>-							 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-							 &lt;&amp;clk_s_d0_quadfs 0&gt;,</div><div class='del'>-							 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-							 &lt;&amp;clk_s_d2_quadfs 0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sti_hdmi: sti-hdmi@8d04000 {</div><div class='del'>-				compatible = "st,stih407-hdmi";</div><div class='del'>-				reg = &lt;0x8d04000 0x1000&gt;;</div><div class='del'>-				reg-names = "hdmi-reg";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "irq";</div><div class='del'>-				clock-names = "pix",</div><div class='del'>-					      "tmds",</div><div class='del'>-					      "phy",</div><div class='del'>-					      "audio",</div><div class='del'>-					      "main_parent",</div><div class='del'>-					      "aux_parent";</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;clk_s_d2_flexgen CLK_PIX_HDMI&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_TMDS_HDMI&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_REF_HDMIPHY&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d0_flexgen CLK_PCM_0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 1&gt;;</div><div class='del'>-</div><div class='del'>-				hdmi,hpd-gpio = &lt;&amp;pio5 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-				reset-names = "hdmi";</div><div class='del'>-				resets = &lt;&amp;softreset STIH407_HDMI_TX_PHY_SOFTRESET&gt;;</div><div class='del'>-				ddc = &lt;&amp;hdmiddc&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sti-hda@8d02000 {</div><div class='del'>-				compatible = "st,stih407-hda";</div><div class='del'>-				reg = &lt;0x8d02000 0x400&gt;, &lt;0x92b0120 0x4&gt;;</div><div class='del'>-				reg-names = "hda-reg", "video-dacs-ctrl";</div><div class='del'>-				clock-names = "pix",</div><div class='del'>-					      "hddac",</div><div class='del'>-					      "main_parent",</div><div class='del'>-					      "aux_parent";</div><div class='del'>-				clocks = &lt;&amp;clk_s_d2_flexgen CLK_PIX_HDDAC&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_flexgen CLK_HDDAC&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 0&gt;,</div><div class='del'>-					 &lt;&amp;clk_s_d2_quadfs 1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih410-b2120.dts b/arch/arm/boot/dts/st/stih410-b2120.dts<br/>deleted file mode 100644<br/>index 538ff98ca1b1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih410-b2120.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410-b2120.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2014 STMicroelectronics (R&amp;D) Limited.</div><div class='del'>- * Author: Peter Griffin &lt;peter.griffin@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "stih410.dtsi"</div><div class='del'>-#include "stihxxx-b2120.dtsi"</div><div class='del'>-/ {</div><div class='del'>-	model = "STiH410 B2120";</div><div class='del'>-	compatible = "st,stih410-b2120", "st,stih410";</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = &amp;sbc_serial0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@40000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x40000000 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;sbc_serial0;</div><div class='del'>-		ethernet0 = &amp;ethernet0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb2_picophy1: phy2 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb2_picophy2: phy3 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	soc {</div><div class='del'>-</div><div class='del'>-		mmc0: sdhci@9060000 {</div><div class='del'>-			max-frequency = &lt;200000000&gt;;</div><div class='del'>-			sd-uhs-sdr50;</div><div class='del'>-			sd-uhs-sdr104;</div><div class='del'>-			sd-uhs-ddr50;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci0: usb@9a03c00 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci0: usb@9a03e00 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ohci1: usb@9a83c00 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehci1: usb@9a83e00 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sti-display-subsystem@0 {</div><div class='del'>-			sti-hda@8d02000 {</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih410-b2260.dts b/arch/arm/boot/dts/st/stih410-b2260.dts<br/>index 240b62040000..736b1e059b0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih410-b2260.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410-b2260.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih410-b2260.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stih410-b2260.dts</a></div><div class='hunk'>@@ -206,5 +206,9 @@</div><div class='ctx'> 		sata1: sata@9b28000 {</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@9f00000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stih410.dtsi b/arch/arm/boot/dts/st/stih410.dtsi<br/>index a69231854f78..d56343f44fda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih410.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stih410.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stih410.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stih410.dtsi</a></div><div class='hunk'>@@ -285,5 +285,39 @@</div><div class='ctx'> 			resets = &lt;&amp;softreset STIH407_LPM_SOFTRESET&gt;;</div><div class='ctx'> 			hdmi-phandle = &lt;&amp;sti_hdmi&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@9f00000 {</div><div class='add'>+			compatible = "st,stih410-mali", "arm,mali-400";</div><div class='add'>+			reg = &lt;0x9f00000 0x10000&gt;;</div><div class='add'>+			/* LIMA driver needs 2 clocks, use the same for both */</div><div class='add'>+			clocks = &lt;&amp;clk_s_c0_flexgen CLK_ICN_GPU&gt;,</div><div class='add'>+				 &lt;&amp;clk_s_c0_flexgen CLK_ICN_GPU&gt;;</div><div class='add'>+			clock-names = "bus", "core";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk_s_c0_flexgen CLK_ICN_GPU&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+			resets = &lt;&amp;softreset STIH407_GPU_SOFTRESET&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "gp",</div><div class='add'>+					  "gpmmu",</div><div class='add'>+					  "pp0",</div><div class='add'>+					  "ppmmu0",</div><div class='add'>+					  "pp1",</div><div class='add'>+					  "ppmmu1",</div><div class='add'>+					  "pp2",</div><div class='add'>+					  "ppmmu2",</div><div class='add'>+					  "pp3",</div><div class='add'>+					  "ppmmu3";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stihxxx-b2120.dtsi b/arch/arm/boot/dts/st/stihxxx-b2120.dtsi<br/>deleted file mode 100644<br/>index 8d9a2dfa76f1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stihxxx-b2120.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stihxxx-b2120.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,206 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2014 STMicroelectronics (R&amp;D) Limited.</div><div class='del'>- * Author: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;dt-bindings/clock/stih407-clks.h&gt;</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/media/c8sectpfe.h&gt;</div><div class='del'>-/ {</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		led-red {</div><div class='del'>-			label = "Front Panel LED";</div><div class='del'>-			gpios = &lt;&amp;pio4 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-		led-green {</div><div class='del'>-			gpios = &lt;&amp;pio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "off";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound: sound {</div><div class='del'>-		compatible = "simple-audio-card";</div><div class='del'>-		simple-audio-card,name = "STI-B2120";</div><div class='del'>-		status = "okay";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		simple-audio-card,dai-link@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			/* HDMI */</div><div class='del'>-			format = "i2s";</div><div class='del'>-			mclk-fs = &lt;128&gt;;</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;sti_uni_player0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;sti_hdmi&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		simple-audio-card,dai-link@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			/* DAC */</div><div class='del'>-			format = "i2s";</div><div class='del'>-			mclk-fs = &lt;256&gt;;</div><div class='del'>-			frame-inversion;</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;sti_uni_player2&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;sti_sasg_codec 1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		simple-audio-card,dai-link@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			/* SPDIF */</div><div class='del'>-			format = "left_j";</div><div class='del'>-			mclk-fs = &lt;128&gt;;</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;sti_uni_player3&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;sti_sasg_codec 0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	miphy28lp_phy: miphy28lp {</div><div class='del'>-</div><div class='del'>-		phy_port0: port@9b22000 {</div><div class='del'>-			st,osc-rdy;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		phy_port1: port@9b2a000 {</div><div class='del'>-			st,osc-force-ext;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	soc {</div><div class='del'>-		sbc_serial0: serial@9530000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm0: pwm@9810000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm1: pwm@9510000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ssc2: i2c@9842000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			clock-frequency = &lt;100000&gt;;</div><div class='del'>-			st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='del'>-			st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ssc3: i2c@9843000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			clock-frequency = &lt;100000&gt;;</div><div class='del'>-			st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='del'>-			st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@9844000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@9845000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@9540000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc0: sdhci@9060000 {</div><div class='del'>-			non-removable;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc1: sdhci@9080000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* SSC11 to HDMI */</div><div class='del'>-		hdmiddc: i2c@9541000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			/* HDMI V1.3a supports Standard mode only */</div><div class='del'>-			clock-frequency = &lt;100000&gt;;</div><div class='del'>-			st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='del'>-			st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		st_dwc3: dwc3@8f94000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ethernet0: dwmac@9630000 {</div><div class='del'>-			st,tx-retime-src = "clkgen";</div><div class='del'>-			status = "okay";</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-			fixed-link = &lt;0 1 1000 0 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		demux@8a20000 {</div><div class='del'>-			compatible	= "st,stih407-c8sectpfe";</div><div class='del'>-			status		= "okay";</div><div class='del'>-			reg		= &lt;0x08a20000 0x10000&gt;,</div><div class='del'>-					  &lt;0x08a00000 0x4000&gt;;</div><div class='del'>-			reg-names	= "c8sectpfe", "c8sectpfe-ram";</div><div class='del'>-			interrupts	= &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					  &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names	= "c8sectpfe-error-irq",</div><div class='del'>-					  "c8sectpfe-idle-irq";</div><div class='del'>-			pinctrl-0	= &lt;&amp;pinctrl_tsin0_serial&gt;;</div><div class='del'>-			pinctrl-1	= &lt;&amp;pinctrl_tsin0_parallel&gt;;</div><div class='del'>-			pinctrl-2	= &lt;&amp;pinctrl_tsin3_serial&gt;;</div><div class='del'>-			pinctrl-3	= &lt;&amp;pinctrl_tsin4_serial_alt3&gt;;</div><div class='del'>-			pinctrl-4	= &lt;&amp;pinctrl_tsin5_serial_alt1&gt;;</div><div class='del'>-			pinctrl-names	= "tsin0-serial",</div><div class='del'>-					  "tsin0-parallel",</div><div class='del'>-					  "tsin3-serial",</div><div class='del'>-					  "tsin4-serial",</div><div class='del'>-					  "tsin5-serial";</div><div class='del'>-			clocks		= &lt;&amp;clk_s_c0_flexgen CLK_PROC_STFE&gt;;</div><div class='del'>-			clock-names	= "c8sectpfe";</div><div class='del'>-</div><div class='del'>-			/* tsin0 is TSA on NIMA */</div><div class='del'>-			tsin0: port {</div><div class='del'>-				tsin-num = &lt;0&gt;;</div><div class='del'>-				serial-not-parallel;</div><div class='del'>-				i2c-bus = &lt;&amp;ssc2&gt;;</div><div class='del'>-				reset-gpios = &lt;&amp;pio15 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-				dvb-card = &lt;STV0367_TDA18212_NIMA_1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sti_uni_player0: sti-uni-player@8d80000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sti_uni_player2: sti-uni-player@8d82000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sti_uni_player3: sti-uni-player@8d85000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		syscfg_core: core-syscfg@92b0000 {</div><div class='del'>-			sti_sasg_codec: sti-sasg-codec {</div><div class='del'>-				status = "okay";</div><div class='del'>-				pinctrl-names = "default";</div><div class='del'>-				pinctrl-0 = &lt;&amp;pinctrl_spdif_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts<br/>index 087de6f09629..b57dbdce2f40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f746-disco.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f746-disco.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f746-disco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32f746-disco.dts</a></div><div class='hunk'>@@ -78,6 +78,24 @@</div><div class='ctx'> 		serial0 = &amp;usart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led-usr {</div><div class='add'>+			gpios = &lt;&amp;gpioi 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+		button-0 {</div><div class='add'>+			label = "User";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioi 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usbotg_hs_phy: usb-phy {</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "usb-nop-xceiv";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi<br/>index 2537b3d47e6f..208f8c6dfc9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f746.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f746.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f746.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32f746.dtsi</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #include "../armv7-m.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/clock/stm32fx-clock.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mfd/stm32f7-rcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -245,6 +246,39 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		lptimer1: timer@40002400 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "st,stm32-lptimer";</div><div class='add'>+			reg = &lt;0x40002400 0x400&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;exti 23 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc 1 CLK_LPTIMER&gt;;</div><div class='add'>+			clock-names = "mux";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pwm {</div><div class='add'>+				compatible = "st,stm32-pwm-lp";</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trigger@0 {</div><div class='add'>+				compatible = "st,stm32-lptimer-trigger";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			counter {</div><div class='add'>+				compatible = "st,stm32-lptimer-counter";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timer {</div><div class='add'>+				compatible = "st,stm32-lptimer-timer";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc: rtc@40002800 {</div><div class='ctx'> 			compatible = "st,stm32-rtc";</div><div class='ctx'> 			reg = &lt;0x40002800 0x400&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/st/stm32f769-disco.dts<br/>index 52c5baf58ab9..535cfdc4681c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f769-disco.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32f769-disco.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32f769-disco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32f769-disco.dts</a></div><div class='hunk'>@@ -79,13 +79,16 @@</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='del'>-		led-green {</div><div class='add'>+		led-usr2 {</div><div class='ctx'> 			gpios = &lt;&amp;gpioj 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='del'>-		led-red {</div><div class='add'>+		led-usr1 {</div><div class='ctx'> 			gpios = &lt;&amp;gpioj 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+		led-usr3 {</div><div class='add'>+			gpios = &lt;&amp;gpioa 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi<br/>index 7f1d234e1024..8a6db484383d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi</a></div><div class='hunk'>@@ -198,7 +198,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart4_pins: uart4-0 {</div><div class='add'>+	uart4_pins_a: uart4-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 0, AF8)&gt;; /* UART4_TX */</div><div class='ctx'> 			bias-disable;</div><div class='hunk'>@@ -211,7 +211,20 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usart1_pins: usart1-0 {</div><div class='add'>+	uart8_pins_a: uart8-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 8, AF8)&gt;; /* UART8_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 9, AF8)&gt;; /* UART8_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usart1_pins_a: usart1-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('B', 14, AF4)&gt;; /* USART1_TX */</div><div class='ctx'> 			bias-disable;</div><div class='hunk'>@@ -224,7 +237,20 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usart2_pins: usart2-0 {</div><div class='add'>+	usart1_pins_b: usart1-1 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 9, AF7)&gt;; /* USART1_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 10, AF7)&gt;; /* USART1_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usart2_pins_a: usart2-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('D', 5, AF7)&gt;; /* USART2_TX */</div><div class='ctx'> 			bias-disable;</div><div class='hunk'>@@ -237,7 +263,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usart3_pins: usart3-0 {</div><div class='add'>+	usart3_pins_a: usart3-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('B', 10, AF7)&gt;, /* USART3_TX */</div><div class='ctx'> 				 &lt;STM32_PINMUX('D', 12, AF7)&gt;; /* USART3_RTS_DE */</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h743.dtsi b/arch/arm/boot/dts/st/stm32h743.dtsi<br/>index b8d4c44c8a82..2f19cfbc57ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h743.dtsi</a></div><div class='hunk'>@@ -211,6 +211,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart8: serial@40007c00 {</div><div class='add'>+			compatible = "st,stm32h7-uart";</div><div class='add'>+			reg = &lt;0x40007c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;83&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			clocks = &lt;&amp;rcc UART8_CK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usart1: serial@40011000 {</div><div class='ctx'> 			compatible = "st,stm32h7-uart";</div><div class='ctx'> 			reg = &lt;0x40011000 0x400&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h743i-disco.dts b/arch/arm/boot/dts/st/stm32h743i-disco.dts<br/>index 2b452883a708..8451a54a9a08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743i-disco.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743i-disco.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743i-disco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h743i-disco.dts</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;usart2_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h743i-eval.dts b/arch/arm/boot/dts/st/stm32h743i-eval.dts<br/>index 5c5d8059bdc7..4b0ced27b80e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743i-eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h743i-eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h743i-eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h743i-eval.dts</a></div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usart1 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;usart1_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart1_pins_a&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h747i-disco.dts b/arch/arm/boot/dts/st/stm32h747i-disco.dts<br/>new file mode 100644<br/>index 000000000000..99f0255dae8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h747i-disco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h747i-disco.dts</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "stm32h743.dtsi"</div><div class='add'>+#include "stm32h7-pinctrl.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32H747i-Discovery board";</div><div class='add'>+	compatible = "st,stm32h747i-disco", "st,stm32h747";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "root=/dev/ram";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@d0000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0xd0000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;usart1;</div><div class='add'>+		serial1 = &amp;uart8;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v3v3: regulator-v3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "v3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led-green {</div><div class='add'>+			gpios = &lt;&amp;gpioi 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+		led-orange {</div><div class='add'>+			gpios = &lt;&amp;gpioi 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		led-red {</div><div class='add'>+			gpios = &lt;&amp;gpioi 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		led-blue {</div><div class='add'>+			gpios = &lt;&amp;gpioi 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+		button-0 {</div><div class='add'>+			label = "User";</div><div class='add'>+			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioc 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-1 {</div><div class='add'>+			label = "JoySel";</div><div class='add'>+			linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpiok 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-2 {</div><div class='add'>+			label = "JoyDown";</div><div class='add'>+			linux,code = &lt;KEY_DOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpiok 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-3 {</div><div class='add'>+			label = "JoyUp";</div><div class='add'>+			linux,code = &lt;KEY_UP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpiok 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-4 {</div><div class='add'>+			label = "JoyLeft";</div><div class='add'>+			linux,code = &lt;KEY_LEFT&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpiok 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+		button-5 {</div><div class='add'>+			label = "JoyRight";</div><div class='add'>+			linux,code = &lt;KEY_RIGHT&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpiok 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clk_hse {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac {</div><div class='add'>+	status = "disabled";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet_rmii&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+</div><div class='add'>+	mdio0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_b4_sleep_pins_a&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpioi 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart1_pins_b&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart8 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart8_pins_a&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32h750i-art-pi.dts b/arch/arm/boot/dts/st/stm32h750i-art-pi.dts<br/>index 44c307f8b09c..56c53e262da7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h750i-art-pi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32h750i-art-pi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32h750i-art-pi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32h750i-art-pi.dts</a></div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -197,14 +197,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;usart2_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usart3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;usart3_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart3_pins_a&gt;;</div><div class='ctx'> 	dmas = &lt;&amp;dmamux1 45 0x400 0x05&gt;,</div><div class='ctx'> 	       &lt;&amp;dmamux1 46 0x400 0x05&gt;;</div><div class='ctx'> 	dma-names = "rx", "tx";</div><div class='hunk'>@@ -221,7 +221,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart4 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart4_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_a&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi<br/>index 8db1ec4a3b26..a422b32d71d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi</a></div><div class='hunk'>@@ -595,6 +595,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	rtc_rsvd_pins_a: rtc-rsvd-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 1, ANALOG)&gt;; /* RTC_OUT2_RMP */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	sai1a_pins_a: sai1a-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 4, AF12)&gt;, /* SAI1_SCK_A */</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi<br/>index e1a764d269d2..fd730aa37c22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp131.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp131.dtsi</a></div><div class='hunk'>@@ -100,6 +100,31 @@</div><div class='ctx'> 		always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu_thermal: cpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;dts&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu_alert1: cpu-alert1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-crit {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -261,6 +286,11 @@</div><div class='ctx'> 			dma-names = "up";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			counter {</div><div class='add'>+				compatible = "st,stm32-timer-counter";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			timer@5 {</div><div class='ctx'> 				compatible = "st,stm32h7-timer-trigger";</div><div class='ctx'> 				reg = &lt;5&gt;;</div><div class='hunk'>@@ -281,6 +311,11 @@</div><div class='ctx'> 			dma-names = "up";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			counter {</div><div class='add'>+				compatible = "st,stm32-timer-counter";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			timer@6 {</div><div class='ctx'> 				compatible = "st,stm32h7-timer-trigger";</div><div class='ctx'> 				reg = &lt;6&gt;;</div><div class='hunk'>@@ -909,6 +944,23 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dts: thermal@50028000 {</div><div class='add'>+			compatible = "st,stm32-thermal";</div><div class='add'>+			reg = &lt;0x50028000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc DTS&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdp: pinctrl@5002a000 {</div><div class='add'>+			compatible = "st,stm32mp131-hdp";</div><div class='add'>+			reg = &lt;0x5002a000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc HDP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mdma: dma-controller@58000000 {</div><div class='ctx'> 			compatible = "st,stm32h7-mdma";</div><div class='ctx'> 			reg = &lt;0x58000000 0x1000&gt;;</div><div class='hunk'>@@ -973,6 +1025,9 @@</div><div class='ctx'> 				reg = &lt;0x4 0x2&gt;;</div><div class='ctx'> 				bits = &lt;0 12&gt;;</div><div class='ctx'> 			};</div><div class='add'>+			vrefint: vrefin-cal@52 {</div><div class='add'>+				reg = &lt;0x52 0x2&gt;;</div><div class='add'>+			};</div><div class='ctx'> 			ts_cal1: calib@5c {</div><div class='ctx'> 				reg = &lt;0x5c 0x2&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1018,6 +1073,8 @@</div><div class='ctx'> 					interrupts = &lt;0&gt;;</div><div class='ctx'> 					dmas = &lt;&amp;dmamux1 10 0x400 0x80000001&gt;;</div><div class='ctx'> 					dma-names = "rx";</div><div class='add'>+					nvmem-cells = &lt;&amp;vrefint&gt;;</div><div class='add'>+					nvmem-cell-names = "vrefint";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 					channel@13 {</div><div class='hunk'>@@ -1196,6 +1253,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 23&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1221,6 +1283,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 24&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1246,6 +1313,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 25&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1276,6 +1348,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 26&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1304,6 +1381,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 27&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1332,6 +1414,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 28&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1522,11 +1609,13 @@</div><div class='ctx'> 					      "mac-clk-tx",</div><div class='ctx'> 					      "mac-clk-rx",</div><div class='ctx'> 					      "ethstp",</div><div class='add'>+					      "ptp_ref",</div><div class='ctx'> 					      "eth-ck";</div><div class='ctx'> 				clocks = &lt;&amp;rcc ETH1MAC&gt;,</div><div class='ctx'> 					 &lt;&amp;rcc ETH1TX&gt;,</div><div class='ctx'> 					 &lt;&amp;rcc ETH1RX&gt;,</div><div class='ctx'> 					 &lt;&amp;rcc ETH1STP&gt;,</div><div class='add'>+					 &lt;&amp;rcc ETH1PTP_K&gt;,</div><div class='ctx'> 					 &lt;&amp;rcc ETH1CK_K&gt;;</div><div class='ctx'> 				st,syscon = &lt;&amp;syscfg 0x4 0xff0000&gt;;</div><div class='ctx'> 				snps,mixed-burst;</div><div class='hunk'>@@ -1534,6 +1623,8 @@</div><div class='ctx'> 				snps,axi-config = &lt;&amp;stmmac_axi_config_1&gt;;</div><div class='ctx'> 				snps,tso;</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 48&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;ethernet_mac1_address&gt;;</div><div class='add'>+				nvmem-cell-names = "mac-address";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 				stmmac_axi_config_1: stmmac-axi-config {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi<br/>index 73e470019ce4..053fc6691205 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp133.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp133.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp133.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp133.dtsi</a></div><div class='hunk'>@@ -60,6 +60,8 @@</div><div class='ctx'> 			interrupts = &lt;0&gt;;</div><div class='ctx'> 			dmas = &lt;&amp;dmamux1 9 0x400 0x80000001&gt;;</div><div class='ctx'> 			dma-names = "rx";</div><div class='add'>+			nvmem-cells = &lt;&amp;vrefint&gt;;</div><div class='add'>+			nvmem-cell-names = "vrefint";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			channel@18 {</div><div class='hunk'>@@ -79,11 +81,13 @@</div><div class='ctx'> 			      "mac-clk-tx",</div><div class='ctx'> 			      "mac-clk-rx",</div><div class='ctx'> 			      "ethstp",</div><div class='add'>+			      "ptp_ref",</div><div class='ctx'> 			      "eth-ck";</div><div class='ctx'> 		clocks = &lt;&amp;rcc ETH2MAC&gt;,</div><div class='ctx'> 			 &lt;&amp;rcc ETH2TX&gt;,</div><div class='ctx'> 			 &lt;&amp;rcc ETH2RX&gt;,</div><div class='ctx'> 			 &lt;&amp;rcc ETH2STP&gt;,</div><div class='add'>+			 &lt;&amp;rcc ETH2PTP_K&gt;,</div><div class='ctx'> 			 &lt;&amp;rcc ETH2CK_K&gt;;</div><div class='ctx'> 		st,syscon = &lt;&amp;syscfg 0x4 0xff000000&gt;;</div><div class='ctx'> 		snps,mixed-burst;</div><div class='hunk'>@@ -91,6 +95,8 @@</div><div class='ctx'> 		snps,axi-config = &lt;&amp;stmmac_axi_config_2&gt;;</div><div class='ctx'> 		snps,tso;</div><div class='ctx'> 		access-controllers = &lt;&amp;etzpc 49&gt;;</div><div class='add'>+		nvmem-cells = &lt;&amp;ethernet_mac2_address&gt;;</div><div class='add'>+		nvmem-cell-names = "mac-address";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		stmmac_axi_config_2: stmmac-axi-config {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp133c-prihmb.dts b/arch/arm/boot/dts/st/stm32mp133c-prihmb.dts<br/>new file mode 100644<br/>index 000000000000..663b6de1b814<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp133c-prihmb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp133c-prihmb.dts</a></div><div class='hunk'>@@ -0,0 +1,496 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/st,stm32mp13-regulator.h&gt;</div><div class='add'>+#include "stm32mp133.dtsi"</div><div class='add'>+#include "stm32mp13xc.dtsi"</div><div class='add'>+#include "stm32mp13-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Priva E-Measuringbox board";</div><div class='add'>+	compatible = "pri,prihmb", "st,stm32mp133";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet1;</div><div class='add'>+		mdio-gpio0 = &amp;mdio0;</div><div class='add'>+		mmc0 = &amp;sdmmc1;</div><div class='add'>+		mmc1 = &amp;sdmmc2;</div><div class='add'>+		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;usart6;</div><div class='add'>+		serial2 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	counter-0 {</div><div class='add'>+		compatible = "interrupt-counter";</div><div class='add'>+		gpios = &lt;&amp;gpioa 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			label = "reset-button";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioi 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-blue {</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioa 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller-0 {</div><div class='add'>+		compatible = "pwm-leds-multicolor";</div><div class='add'>+</div><div class='add'>+		multi-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+</div><div class='add'>+			led-red {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm2 2 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-green {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm1 1 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-blue {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm1 2 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller-1 {</div><div class='add'>+		compatible = "pwm-leds-multicolor";</div><div class='add'>+</div><div class='add'>+		multi-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+</div><div class='add'>+			led-red {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm1 0 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-green {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm2 0 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-blue {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				pwms = &lt;&amp;pwm2 1 1000000 1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce</div><div class='add'>+	 * stmmac MDC clock without reducing system bus rate, we need to use</div><div class='add'>+	 * gpio based MDIO bus.</div><div class='add'>+	 */</div><div class='add'>+	mdio0: mdio {</div><div class='add'>+		compatible = "virtual,mdio-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpiog 2 GPIO_ACTIVE_HIGH</div><div class='add'>+			 &amp;gpioa 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/* TI DP83TD510E */</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-id2000.0181";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpioa 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpioa 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10&gt;;</div><div class='add'>+			reset-deassert-us = &lt;35&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@c0000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0xc0000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		optee@ce000000 {</div><div class='add'>+			reg = &lt;0xce000000 0x02000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc_1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adc_1_pins_a&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	channel@0 { /* Fan current PC0*/</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		st,min-sample-time-ns = &lt;10000&gt;;  /* 10µs sampling time */</div><div class='add'>+	};</div><div class='add'>+	channel@11 { /* Fan voltage */</div><div class='add'>+		reg = &lt;11&gt;;</div><div class='add'>+		st,min-sample-time-ns = &lt;10000&gt;;  /* 10µs sampling time */</div><div class='add'>+	};</div><div class='add'>+	channel@15 { /* Supply voltage */</div><div class='add'>+		reg = &lt;15&gt;;</div><div class='add'>+		st,min-sample-time-ns = &lt;10000&gt;;  /* 10µs sampling time */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dts {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet1_rmii_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ethernet1_rmii_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_sleep_pins_a&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	board-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{i2c1_pins_a/pins} {</div><div class='add'>+	pinmux = &lt;STM32_PINMUX('D', 3, AF5)&gt;, /* I2C1_SCL */</div><div class='add'>+		 &lt;STM32_PINMUX('B', 8, AF4)&gt;; /* I2C1_SDA */</div><div class='add'>+	bias-disable;</div><div class='add'>+	drive-open-drain;</div><div class='add'>+	slew-rate = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{i2c1_sleep_pins_a/pins} {</div><div class='add'>+	pinmux = &lt;STM32_PINMUX('D', 3, ANALOG)&gt;, /* I2C1_SCL */</div><div class='add'>+		 &lt;STM32_PINMUX('B', 8, ANALOG)&gt;; /* I2C1_SDA */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iwdg2 {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD card without Card-detect */</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a &amp;sdmmc1_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_b4_od_pins_a &amp;sdmmc1_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_b4_sleep_pins_a&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EMMC */</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a &amp;sdmmc2_d47_pins_a &amp;sdmmc2_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_a &amp;sdmmc2_d47_pins_a &amp;sdmmc2_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_a &amp;sdmmc2_d47_sleep_pins_a&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	mmc-ddr-3_3v;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	pwm1: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm1_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm1_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	pwm2: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm4_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm4_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fan PWM */</div><div class='add'>+&amp;timers5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pwm3: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm5_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm5_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	timer@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart4_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart4_idle_pins_a&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart7_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart7_idle_pins_a&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart6 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart6_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usart6_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usart6_idle_pins_a&gt;;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	adc_1_pins_a: adc1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 0, ANALOG)&gt;, /* ADC1 in0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, ANALOG)&gt;, /* ADC1 in15 */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 13, ANALOG)&gt;; /* ADC1 in11 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet1_rmii_pins_a: rmii-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 13, AF11)&gt;, /* ETH1_RMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 14, AF11)&gt;, /* ETH1_RMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, AF11)&gt;, /* ETH1_RMII_TX_EN */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, AF11)&gt;;   /* ETH1_RMII_REF_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 4, AF11)&gt;,  /* ETH1_RMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, AF11)&gt;,  /* ETH1_RMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, AF11)&gt;;  /* ETH1_RMII_CRS_DV */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet1_rmii_sleep_pins_a: rmii-sleep-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 13, ANALOG)&gt;, /* ETH1_RMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 14, ANALOG)&gt;, /* ETH1_RMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, ANALOG)&gt;, /* ETH1_RMII_TX_EN */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 4, ANALOG)&gt;,  /* ETH1_RMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, ANALOG)&gt;,  /* ETH1_RMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, ANALOG)&gt;,  /* ETH1_RMII_REF_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, ANALOG)&gt;;  /* ETH1_RMII_CRS_DV */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1_pins_a: pwm1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 9, AF1)&gt;, /* TIM1_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 11, AF1)&gt;, /* TIM1_CH2 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 13, AF1)&gt;; /* TIM1_CH3 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1_sleep_pins_a: pwm1-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 9, ANALOG)&gt;, /* TIM1_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 11, ANALOG)&gt;, /* TIM1_CH2 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 13, ANALOG)&gt;; /* TIM1_CH3 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4_pins_a: pwm4-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 12, AF2)&gt;, /* TIM4_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 7, AF2)&gt;, /* TIM4_CH2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 14, AF2)&gt;; /* TIM4_CH3 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4_sleep_pins_a: pwm4-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 12, ANALOG)&gt;, /* TIM4_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 7, ANALOG)&gt;, /* TIM4_CH2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 14, ANALOG)&gt;; /* TIM4_CH3 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	pwm5_pins_a: pwm5-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 0, AF2)&gt;; /* TIM5_CH1 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm5_sleep_pins_a: pwm5-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 0, ANALOG)&gt;; /* TIM5_CH1 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_pins_a: uart7-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, AF7)&gt;; /* UART_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 10, AF7)&gt;; /* UART7_RX */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_idle_pins_a: uart7-idle-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, ANALOG)&gt;; /* UART7_TX */</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 10, AF7)&gt;; /* UART7_RX */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_sleep_pins_a: uart7-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, ANALOG)&gt;, /* UART7_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 10, ANALOG)&gt;; /* UART7_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usart6_pins_a: usart6-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 8, AF7)&gt;, /* USART6_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 10, AF7)&gt;; /* USART6_DE */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 11, AF7)&gt;; /* USART6_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usart6_idle_pins_a: usart6-idle-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 8, ANALOG)&gt;; /* USART6_TX */</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 10, AF7)&gt;; /* USART6_DE */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 11, AF7)&gt;; /* USART6_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usart6_sleep_pins_a: usart6-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 8, ANALOG)&gt;, /* USART6_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 10, ANALOG)&gt;, /* USART6_DE */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 11, ANALOG)&gt;; /* USART6_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts<br/>index 853dc21449d9..9902849ed040 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts</a></div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'> 	gpio-line-names = "", "", "", "",</div><div class='ctx'> 			  "", "DHSBC_USB_PWR_CC1", "", "",</div><div class='ctx'> 			  "", "", "", "DHSBC_nETH1_RST",</div><div class='del'>-			  "", "DHCOR_HW-CODING_0", "", "";</div><div class='add'>+			  "", "DHCOR_HW-CODING_0", "", "DHSBC_HW-CODE_2";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpiob {</div><div class='hunk'>@@ -197,7 +197,7 @@</div><div class='ctx'> 	gpio-line-names = "", "", "", "",</div><div class='ctx'> 			  "", "DHCOR_RAM-CODING_0", "", "",</div><div class='ctx'> 			  "", "DHCOR_RAM-CODING_1", "", "",</div><div class='del'>-			  "", "", "", "";</div><div class='add'>+			  "", "DHSBC_HW-CODE_1", "", "";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpioe {</div><div class='hunk'>@@ -221,6 +221,13 @@</div><div class='ctx'> 			  "DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpioh {</div><div class='add'>+	gpio-line-names = "", "", "", "DHSBC_HW-CODE_0",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpioi {</div><div class='ctx'> 	gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1",</div><div class='ctx'> 			  "DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT",</div><div class='hunk'>@@ -296,6 +303,9 @@</div><div class='ctx'> 	st33htph: tpm@0 {</div><div class='ctx'> 		compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpioe&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpioe 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;24000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -419,3 +429,19 @@</div><div class='ctx'> 		type = "micro";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* LDO2 is expansion connector 3V3 supply on STM32MP13xx DHCOR DHSBC rev.200 */</div><div class='add'>+&amp;vdd_ldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-boot-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* LDO5 is carrier board 3V3 supply on STM32MP13xx DHCOR DHSBC rev.200 */</div><div class='add'>+&amp;vdd_sd {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-boot-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts<br/>index 1af335a39993..9764a6bfa5b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp135f-dk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp135f-dk.dts</a></div><div class='hunk'>@@ -121,6 +121,19 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	v3v3_ao: v3v3-ao {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "v3v3_ao";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;mcp23017 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;adc_1 {</div><div class='hunk'>@@ -346,7 +359,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rtc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_rsvd_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc_lsco_pins_a: rtc-lsco-0 {</div><div class='add'>+		pins = "out2_rmp";</div><div class='add'>+		function = "lsco";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scmi_regu {</div><div class='hunk'>@@ -385,6 +405,30 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Wifi */</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a &amp;sdmmc2_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_a &amp;sdmmc2_clk_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_a&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3_ao&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_lsco_pins_a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi5 {</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spi5_pins_a&gt;;</div><div class='hunk'>@@ -396,6 +440,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		/* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm3_pins_a&gt;;</div><div class='hunk'>@@ -412,6 +459,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		/* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm4_pins_a&gt;;</div><div class='hunk'>@@ -428,6 +478,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		/* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm8_pins_a&gt;;</div><div class='hunk'>@@ -442,6 +495,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;timers14 {</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		/* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm14_pins_a&gt;;</div><div class='hunk'>@@ -491,6 +547,14 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;usart2_idle_pins_a&gt;;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		shutdown-gpios = &lt;&amp;mcp23017 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;v3v3_ao&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;v3v3_ao&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbh_ehci {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi<br/>index ddad6497775b..c18156807027 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi</a></div><div class='hunk'>@@ -85,8 +85,8 @@</div><div class='ctx'> </div><div class='ctx'> 			vddcpu: buck1 { /* VDD_CPU_1V2 */</div><div class='ctx'> 				regulator-name = "vddcpu";</div><div class='del'>-				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-initial-mode = &lt;0&gt;;</div><div class='ctx'> 				regulator-over-current-protection;</div><div class='hunk'>@@ -206,6 +206,12 @@</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;gpioi 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	eeprom0wl: eeprom@58 {</div><div class='add'>+		compatible = "st,24256e-wl";	/* ST M24256E WL page of 0x50 */</div><div class='add'>+		pagesize = &lt;64&gt;;</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iwdg2 {</div><div class='hunk'>@@ -281,7 +287,7 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {	/* muRata 1YN */</div><div class='add'>+	brcmf: wifi@1 {	/* muRata 1YN */</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpioe&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi<br/>index 70e132dc6147..8613a6a17ee9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi</a></div><div class='hunk'>@@ -5,6 +5,14 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/stm32-pinfunc.h&gt;</div><div class='ctx'> </div><div class='add'>+&amp;hdp {</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	hdp2_gpo: hdp2-pins {</div><div class='add'>+		function = "gpoval2";</div><div class='add'>+		pins = "HDP2";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	/omit-if-no-ref/</div><div class='ctx'> 	adc1_ain_pins_a: adc1-ain-0 {</div><div class='hunk'>@@ -26,6 +34,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	adc1_in10_pins_a: adc1-in10-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 0, ANALOG)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	adc12_ain_pins_a: adc12-ain-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('C', 3, ANALOG)&gt;, /* ADC1 in13 */</div><div class='hunk'>@@ -585,6 +600,43 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	ethernet0_rmii_pins_d: rmii-3 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 12, AF11)&gt;, /* ETH1_RMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 13, AF11)&gt;, /* ETH1_RMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, AF11)&gt;, /* ETH1_RMII_TX_EN */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, AF11)&gt;, /* ETH1_RMII_REF_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 2, AF11)&gt;, /* ETH1_MDIO */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, AF11)&gt;; /* ETH1_MDC */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 4, AF11)&gt;, /* ETH1_RMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, AF11)&gt;, /* ETH1_RMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, AF11)&gt;; /* ETH1_RMII_CRS_DV */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	ethernet0_rmii_sleep_pins_d: rmii-sleep-3 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 12, ANALOG)&gt;, /* ETH1_RMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 13, ANALOG)&gt;, /* ETH1_RMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, ANALOG)&gt;, /* ETH1_RMII_TX_EN */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 2, ANALOG)&gt;, /* ETH1_MDIO */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, ANALOG)&gt;, /* ETH1_MDC */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 4, ANALOG)&gt;, /* ETH1_RMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, ANALOG)&gt;, /* ETH1_RMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, ANALOG)&gt;, /* ETH1_RMII_REF_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, ANALOG)&gt;; /* ETH1_RMII_CRS_DV */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	fmc_pins_a: fmc-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('D', 4, AF12)&gt;, /* FMC_NOE */</div><div class='hunk'>@@ -688,6 +740,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	hdp2_pins_a: hdp2-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 13, AF0)&gt;; /* HDP2 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	hdp2_sleep_pins_a: hdp2-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 13, ANALOG)&gt;; /* HDP2 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	i2c1_pins_a: i2c1-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('D', 12, AF5)&gt;, /* I2C1_SCL */</div><div class='hunk'>@@ -726,6 +795,25 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	i2c1_pins_c: i2c1-2 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 12, AF5)&gt;, /* I2C1_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 13, AF5)&gt;; /* I2C1_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	i2c1_sleep_pins_c: i2c1-sleep-2 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 12, ANALOG)&gt;, /* I2C1_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 13, ANALOG)&gt;; /* I2C1_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	i2c2_pins_a: i2c2-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('H', 4, AF4)&gt;, /* I2C2_SCL */</div><div class='hunk'>@@ -820,6 +908,27 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	i2s1_pins_a: i2s1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 6, AF5)&gt;, /* I2S2_SDI */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 4, AF5)&gt;, /* I2S2_WS */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 5, AF5)&gt;; /* I2S2_CK */</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	i2s1_sleep_pins_a: i2s1-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 6, ANALOG)&gt;, /* I2S2_SDI */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 4, ANALOG)&gt;, /* I2S2_WS */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 5, ANALOG)&gt;; /* I2S2_CK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	i2s2_pins_a: i2s2-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('I', 3, AF5)&gt;, /* I2S2_SDO */</div><div class='hunk'>@@ -1221,6 +1330,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	m4_leds_orange_pins_a: m4-leds-orange-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 7, RSVD)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	m4_leds_orange_pins_b: m4-leds-orange-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 8, RSVD)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	mco1_pins_a: mco1-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 13, AF2)&gt;; /* MCO1 */</div><div class='hunk'>@@ -1419,6 +1542,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	pwm1_pins_d: pwm1-3 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 0, AF2)&gt;; /* TIM5_CH1 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	pwm1_sleep_pins_d: pwm1-sleep-3 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 0, ANALOG)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	pwm2_pins_a: pwm2-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 3, AF1)&gt;; /* TIM2_CH4 */</div><div class='hunk'>@@ -1697,6 +1837,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	rtc_rsvd_pins_a: rtc-rsvd-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 8, ANALOG)&gt;; /* RTC_OUT2_RMP */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	sai2a_pins_a: sai2a-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('I', 5, AF10)&gt;, /* SAI2_SCK_A */</div><div class='hunk'>@@ -2154,6 +2301,66 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	sdmmc2_b4_pins_c: sdmmc2-b4-2 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, AF9)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 7, AF10)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 3, AF9)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 4, AF9)&gt;, /* SDMMC2_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 6, AF10)&gt;; /* SDMMC2_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 3, AF9)&gt;; /* SDMMC2_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	sdmmc2_b4_od_pins_c: sdmmc2-b4-od-2 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, AF9)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 7, AF10)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 3, AF9)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 4, AF9)&gt;; /* SDMMC2_D3 */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 3, AF9)&gt;; /* SDMMC2_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 6, AF10)&gt;; /* SDMMC2_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	sdmmc2_b4_sleep_pins_c: sdmmc2-b4-sleep-2 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, ANALOG)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 7, ANALOG)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 3, ANALOG)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 4, ANALOG)&gt;, /* SDMMC2_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 3, ANALOG)&gt;, /* SDMMC2_CK */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 6, ANALOG)&gt;; /* SDMMC2_CMD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	sdmmc2_d47_pins_a: sdmmc2-d47-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 8, AF9)&gt;, /* SDMMC2_D4 */</div><div class='hunk'>@@ -2383,6 +2590,66 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	sdmmc3_b4_pins_c: sdmmc3-b4-2 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 1, AF10)&gt;, /* SDMMC3_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 4, AF10)&gt;, /* SDMMC3_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 5, AF10)&gt;, /* SDMMC3_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 7, AF10)&gt;, /* SDMMC3_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 0, AF10)&gt;; /* SDMMC3_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 15, AF10)&gt;; /* SDMMC3_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	sdmmc3_b4_od_pins_c: sdmmc3-b4-od-2 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 1, AF10)&gt;, /* SDMMC3_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 4, AF10)&gt;, /* SDMMC3_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 5, AF10)&gt;, /* SDMMC3_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 7, AF10)&gt;; /* SDMMC3_D3 */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 15, AF10)&gt;; /* SDMMC3_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 0, AF10)&gt;; /* SDMMC3_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	sdmmc3_b4_sleep_pins_c: sdmmc3-b4-sleep-2 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 1, ANALOG)&gt;, /* SDMMC3_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 4, ANALOG)&gt;, /* SDMMC3_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 5, ANALOG)&gt;, /* SDMMC3_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 7, ANALOG)&gt;, /* SDMMC3_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 15, ANALOG)&gt;, /* SDMMC3_CK */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 0, ANALOG)&gt;; /* SDMMC3_CMD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	spdifrx_pins_a: spdifrx-0 {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('G', 12, AF8)&gt;; /* SPDIF_IN1 */</div><div class='hunk'>@@ -2594,6 +2861,41 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	uart4_pins_e: uart4-4 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, AF6)&gt;; /* UART4_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 8, AF8)&gt;; /* UART4_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	uart4_idle_pins_e: uart4-idle-4 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, ANALOG)&gt;; /* UART4_TX */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 8, AF8)&gt;; /* UART4_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	uart4_sleep_pins_e: uart4-sleep-4 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, ANALOG)&gt;, /* UART4_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 8, ANALOG)&gt;; /* UART4_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	uart5_pins_a: uart5-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('B', 13, AF14)&gt;; /* UART5_TX */</div><div class='hunk'>@@ -2671,6 +2973,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	uart7_pins_d: uart7-3 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 7, AF7)&gt;, /* UART7_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 8, AF7)&gt;; /* UART7_RTS */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 7, AF7)&gt;, /* UART7_RX */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 9, AF7)&gt;; /* UART7_CTS */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	uart8_pins_a: uart8-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('E', 1, AF8)&gt;; /* UART8_TX */</div><div class='hunk'>@@ -3112,6 +3431,25 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	i2c6_pins_b: i2c6-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 11, AF2)&gt;, /* I2C6_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 12, AF2)&gt;; /* I2C6_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	i2c6_sleep_pins_b: i2c6-sleep-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 11, ANALOG)&gt;, /* I2C6_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 12, ANALOG)&gt;; /* I2C6_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	spi1_pins_a: spi1-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('Z', 0, AF5)&gt;, /* SPI1_SCK */</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi<br/>index dc3b09f2f2af..98552fe45d4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15-scmi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15-scmi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15-scmi.dtsi</a></div><div class='hunk'>@@ -4,11 +4,15 @@</div><div class='ctx'>  * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/regulator/st,stm32mp15-regulator.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		optee: optee {</div><div class='ctx'> 			compatible = "linaro,optee-tz";</div><div class='ctx'> 			method = "smc";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		scmi: scmi {</div><div class='hunk'>@@ -35,21 +39,21 @@</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 					scmi_reg11: regulator@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='add'>+						reg = &lt;VOLTD_SCMI_REG11&gt;;</div><div class='ctx'> 						regulator-name = "reg11";</div><div class='ctx'> 						regulator-min-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 						regulator-max-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					scmi_reg18: regulator@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='add'>+						reg = &lt;VOLTD_SCMI_REG18&gt;;</div><div class='ctx'> 						regulator-name = "reg18";</div><div class='ctx'> 						regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 						regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					scmi_usb33: regulator@2 {</div><div class='del'>-						reg = &lt;2&gt;;</div><div class='add'>+						reg = &lt;VOLTD_SCMI_USB33&gt;;</div><div class='ctx'> 						regulator-name = "usb33";</div><div class='ctx'> 						regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi<br/>index 4f878ec102c1..b1b568dfd126 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp151.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp151.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp151.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp151.dtsi</a></div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 			reg = &lt;0x4c001000 0x400&gt;;</div><div class='ctx'> 			st,proc-id = &lt;0&gt;;</div><div class='ctx'> 			interrupts-extended =</div><div class='del'>-				&lt;&amp;exti 61 1&gt;,</div><div class='add'>+				&lt;&amp;exti 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;&amp;intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "rx", "tx";</div><div class='ctx'> 			clocks = &lt;&amp;rcc IPCC&gt;;</div><div class='hunk'>@@ -270,6 +270,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		hdp: pinctrl@5002a000 {</div><div class='add'>+			compatible = "st,stm32mp151-hdp";</div><div class='add'>+			reg = &lt;0x5002a000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc HDP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mdma1: dma-controller@58000000 {</div><div class='ctx'> 			compatible = "st,stm32h7-mdma";</div><div class='ctx'> 			reg = &lt;0x58000000 0x1000&gt;;</div><div class='hunk'>@@ -355,6 +362,8 @@</div><div class='ctx'> 			reg = &lt;0x5a002000 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rcc IWDG2&gt;, &lt;&amp;rcc CK_LSI&gt;;</div><div class='ctx'> 			clock-names = "pclk", "lsi";</div><div class='add'>+			interrupts-extended = &lt;&amp;exti 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			wakeup-source;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -576,6 +585,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 20&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				timer@5 {</div><div class='ctx'> 					compatible = "st,stm32h7-timer-trigger";</div><div class='ctx'> 					reg = &lt;5&gt;;</div><div class='hunk'>@@ -597,6 +611,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 21&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				timer@6 {</div><div class='ctx'> 					compatible = "st,stm32h7-timer-trigger";</div><div class='ctx'> 					reg = &lt;6&gt;;</div><div class='hunk'>@@ -616,6 +635,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 22&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -641,6 +665,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 23&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -666,6 +695,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 24&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1114,6 +1148,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 54&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1142,11 +1181,17 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 55&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='ctx'> 				timer@15 {</div><div class='ctx'> 					compatible = "st,stm32h7-timer-trigger";</div><div class='ctx'> 					reg = &lt;15&gt;;</div><div class='hunk'>@@ -1169,6 +1214,11 @@</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 56&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				pwm {</div><div class='ctx'> 					compatible = "st,stm32-pwm";</div><div class='ctx'> 					#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -1738,7 +1788,6 @@</div><div class='ctx'> 				st,syscon = &lt;&amp;syscfg 0x4&gt;;</div><div class='ctx'> 				snps,mixed-burst;</div><div class='ctx'> 				snps,pbl = &lt;2&gt;;</div><div class='del'>-				snps,en-tx-lpi-clockgating;</div><div class='ctx'> 				snps,axi-config = &lt;&amp;stmmac_axi_config_0&gt;;</div><div class='ctx'> 				snps,tso;</div><div class='ctx'> 				access-controllers = &lt;&amp;etzpc 94&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts b/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts<br/>new file mode 100644<br/>index 000000000000..5d219a448763<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp151c-plyaqm.dts</a></div><div class='hunk'>@@ -0,0 +1,376 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;arm/st/stm32mp151.dtsi&gt;</div><div class='add'>+#include &lt;arm/st/stm32mp15xc.dtsi&gt;</div><div class='add'>+#include &lt;arm/st/stm32mp15-pinctrl.dtsi&gt;</div><div class='add'>+#include &lt;arm/st/stm32mp15xxad-pinctrl.dtsi&gt;</div><div class='add'>+#include &lt;arm/st/stm32mp15-scmi.dtsi&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Plymovent AQM board";</div><div class='add'>+	compatible = "ply,plyaqm", "st,stm32mp151";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	codec {</div><div class='add'>+		compatible = "invensense,ics43432";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			codec_endpoint: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;i2s1_endpoint&gt;;</div><div class='add'>+				dai-format = "i2s";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		optee {</div><div class='add'>+			compatible = "linaro,optee-tz";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpioa 3 GPIO_ACTIVE_HIGH&gt;; /* WHITE_EN */</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v3v3: fixed-regulator-v3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "v3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v5v_sw: fixed-regulator-v5sw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5v-switched";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpioe 10 GPIO_ACTIVE_HIGH&gt;; /* 5V_SWITCHED_EN */</div><div class='add'>+		startup-delay-us = &lt;100000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		optee@cfd00000 {</div><div class='add'>+			reg = &lt;0xcfd00000 0x300000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "STM32MP15";</div><div class='add'>+		dais = &lt;&amp;i2s1_port&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpioe 12 GPIO_ACTIVE_LOW&gt;; /* WLAN_REG_ON */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adc1_in10_pins_a&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@10 { /* NTC */</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			st,min-sample-time-ns = &lt;10000&gt;;  /* 10µs sampling time */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_MPU&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cryp1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_CRYP1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_CRYP1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_rmii_pins_d&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ethernet0_rmii_sleep_pins_d&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	max-speed = &lt;100&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		/* KSZ8081RNA PHY */</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpiob 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpiob 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioa {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "HWID_PL_N", "HWID_CP", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiob {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "LED_LATCH", "",</div><div class='add'>+		"", "RELAY1_EN", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioc {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "HWID_Q7", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "RELAY2_EN", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "SW1",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioz {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOZ&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hash1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_HASH1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_HASH1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_c&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_sleep_pins_c&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;185&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_I2C4&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_I2C4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c6_sleep_pins_b&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;185&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;20&gt;;</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_I2C6&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_I2C6&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	pressure-sensor@47 {</div><div class='add'>+		compatible = "bosch,bmp580";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		vdda-supply = &lt;&amp;v5v_sw&gt;;</div><div class='add'>+		vddd-supply = &lt;&amp;v5v_sw&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	co2-sensor@62 {</div><div class='add'>+		compatible = "sensirion,scd41";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;v5v_sw&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pm-sensor@69 {</div><div class='add'>+		compatible = "sensirion,sps30";</div><div class='add'>+		reg = &lt;0x69&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2s1_sleep_pins_a&gt;;</div><div class='add'>+	clocks = &lt;&amp;rcc SPI1&gt;, &lt;&amp;rcc SPI1_K&gt;, &lt;&amp;rcc PLL3_Q&gt;, &lt;&amp;rcc PLL3_R&gt;;</div><div class='add'>+	clock-names = "pclk", "i2sclk", "x8k", "x11k";</div><div class='add'>+	#clock-cells = &lt;0&gt;; /* Set I2S2 as master clock provider */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s1_port: port {</div><div class='add'>+		i2s1_endpoint: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;codec_endpoint&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iwdg2 {</div><div class='add'>+	clocks = &lt;&amp;rcc IWDG2&gt;, &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;m4_rproc {</div><div class='add'>+	/delete-property/ st,syscfg-holdboot;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_MCU&gt;,</div><div class='add'>+		 &lt;&amp;scmi_reset RST_SCMI_MCU_HOLD_BOOT&gt;;</div><div class='add'>+	reset-names = "mcu_rst", "hold_boot";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdma1 {</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_MDMA&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rcc {</div><div class='add'>+	compatible = "st,stm32mp1-rcc-secure", "syscon";</div><div class='add'>+	clock-names = "hse", "hsi", "csi", "lse", "lsi";</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_HSE&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_HSI&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_CSI&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_LSE&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rng1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_RNG1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_RNG1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_RTCAPB&gt;, &lt;&amp;scmi_clk CK_SCMI_RTC&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD card without Card-detect */</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_b4_sleep_pins_a&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EMMC */</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_c &amp;sdmmc2_d47_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_c &amp;sdmmc2_d47_pins_b&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_c &amp;sdmmc2_d47_sleep_pins_b&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wifi */</div><div class='add'>+&amp;sdmmc3 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc3_b4_pins_c&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc3_b4_od_pins_c&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc3_b4_sleep_pins_c&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm1_pins_d&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm1_sleep_pins_d&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_e&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart4_idle_pins_e&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart4_sleep_pins_e&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7_pins_d&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpioe 11 GPIO_ACTIVE_HIGH&gt;; /* BT_REG_ON */</div><div class='add'>+		max-speed = &lt;4000000&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpiog&gt;;</div><div class='add'>+		interrupts = &lt;12 IRQ_TYPE_EDGE_RISING&gt;; /* BT_HOST_WAKE */</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153.dtsi b/arch/arm/boot/dts/st/stm32mp153.dtsi<br/>index 4640dafb1598..92794b942ab2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp153.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp153.dtsi</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> 		interrupt-names = "int0", "int1";</div><div class='ctx'> 		clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='ctx'> 		clock-names = "hclk", "cclk";</div><div class='add'>+		resets = &lt;&amp;rcc FDCAN_R&gt;;</div><div class='ctx'> 		bosch,mram-cfg = &lt;0x0 0 0 32 0 0 2 2&gt;;</div><div class='ctx'> 		access-controllers = &lt;&amp;etzpc 62&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -54,6 +55,7 @@</div><div class='ctx'> 		interrupt-names = "int0", "int1";</div><div class='ctx'> 		clocks = &lt;&amp;rcc CK_HSE&gt;, &lt;&amp;rcc FDCAN_K&gt;;</div><div class='ctx'> 		clock-names = "hclk", "cclk";</div><div class='add'>+		resets = &lt;&amp;rcc FDCAN_R&gt;;</div><div class='ctx'> 		bosch,mram-cfg = &lt;0x1400 0 0 32 0 0 2 2&gt;;</div><div class='ctx'> 		access-controllers = &lt;&amp;etzpc 62&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts b/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts<br/>new file mode 100644<br/>index 000000000000..3a0e84262424<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen1.dts</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Leonard Göhrs, Pengutronix</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "stm32mp153c-lxa-fairytux2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linux Automation GmbH FairyTux 2 Gen 1";</div><div class='add'>+	compatible = "lxa,stm32mp153c-fairytux2-gen1", "oct,stm32mp153x-osd32", "st,stm32mp153";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-left {</div><div class='add'>+			label = "USER_BTN1";</div><div class='add'>+			linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioi 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-right {</div><div class='add'>+			label = "USER_BTN2";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioe 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiof {</div><div class='add'>+	gpio-line-names = "GPIO1", "GPIO2", "", "", "",			/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioh {</div><div class='add'>+	gpio-line-names = "", "", "", "", "LCD_RESET",			/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "GPIO3", "",			/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioi {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "", "ETH_", "",			/*  5 */</div><div class='add'>+			  "", "USER_BTN1";				/* 10 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_sleep_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	io_board_gpio: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+		gpio-line-names = "LED1_GA_YK", "LED2_GA_YK", "LED1_GK_YA", "LED2_GK_YA",</div><div class='add'>+				  "RS485_EN", "RS485_120R", "", "CAN_120R";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_controller_io {</div><div class='add'>+	/*</div><div class='add'>+	 * led-2 and led-3 are internally connected antiparallel to one</div><div class='add'>+	 * another inside the ethernet jack like this:</div><div class='add'>+	 * GPIO1 ---+---|led-2|&gt;--+--- GPIO3</div><div class='add'>+	 *          +--&lt;|led-3|---+</div><div class='add'>+	 * E.g. only one of the LEDs can be illuminated at a time while</div><div class='add'>+	 * the other output must be driven low.</div><div class='add'>+	 * This should likely be implemented using a multi color LED</div><div class='add'>+	 * driver for antiparallel LEDs.</div><div class='add'>+	 */</div><div class='add'>+	led-2 {</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+		gpios = &lt;&amp;io_board_gpio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-3 {</div><div class='add'>+		color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+		function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+		gpios = &lt;&amp;io_board_gpio 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart3 {</div><div class='add'>+	/*</div><div class='add'>+	 * On Gen 1 FairyTux 2 only RTS can be used and not CTS as well,</div><div class='add'>+	 * Because pins PD11 (CTS) and PI11 (USER_BTN1) share the same</div><div class='add'>+	 * interrupt and only one of them can be used at a time.</div><div class='add'>+	 */</div><div class='add'>+	rts-gpios = &lt;&amp;gpiod 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg_hs {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts b/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts<br/>new file mode 100644<br/>index 000000000000..66e6da912508<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2-gen2.dts</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Leonard Göhrs, Pengutronix</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "stm32mp153c-lxa-fairytux2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linux Automation GmbH FairyTux 2 Gen 2";</div><div class='add'>+	compatible = "lxa,stm32mp153c-fairytux2-gen2", "oct,stm32mp153x-osd32", "st,stm32mp153";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-left {</div><div class='add'>+			label = "USER_BTN1";</div><div class='add'>+			linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-right {</div><div class='add'>+			label = "USER_BTN2";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioe 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiof {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioh {</div><div class='add'>+	gpio-line-names = "", "", "", "", "LCD_RESET",			/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "GPIO1", "GPIO_INT", "",		/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioi {</div><div class='add'>+	gpio-line-names = "GPIO2", "", "", "", "",			/*  0 */</div><div class='add'>+			  "", "", "", "ETH_", "",			/*  5 */</div><div class='add'>+			  "", "USER_BTN1";				/* 10 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_sleep_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	io_board_gpio: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpioh&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;board_tca6408_pins&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+		gpio-line-names = "LED1_GA_YK", "LED2_GA_YK", "LED1_GK_YA", "USB_CC_ALERT",</div><div class='add'>+				  "RS485_EN", "RS485_120R", "USB_CC_RESET", "CAN_120R";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_c: typec@28 {</div><div class='add'>+		compatible = "st,stusb1600";</div><div class='add'>+		reg = &lt;0x28&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;io_board_gpio&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+		vsys-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			typec-power-opmode = "default";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				con_usbotg_hs_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usbotg_hs_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "national,lm75a";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * The sensor itself is powered by a voltage divider from the</div><div class='add'>+		 * always-on 5V supply.</div><div class='add'>+		 * The required pull-up resistors however are on v3v3_hdmi.</div><div class='add'>+		 */</div><div class='add'>+		vs-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	io_board_eeprom: eeprom@56 {</div><div class='add'>+		compatible = "atmel,24c04";</div><div class='add'>+		reg = &lt;0x56&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_controller_io {</div><div class='add'>+	led-2 {</div><div class='add'>+		color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+		function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+		gpios = &lt;&amp;io_board_gpio 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart3 {</div><div class='add'>+	rts-gpios = &lt;&amp;gpiod 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cts-gpios = &lt;&amp;gpiod 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg_hs {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usbotg_hs_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;con_usbotg_hs_ep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	board_tca6408_pins: stusb1600-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 13, GPIO)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi b/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi<br/>new file mode 100644<br/>index 000000000000..9eeb9d6b5eb0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp153c-lxa-fairytux2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,397 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved</div><div class='add'>+ * Copyright (C) 2021 Rouven Czerwinski, Pengutronix</div><div class='add'>+ * Copyright (C) 2023, 2024 Leonard Göhrs, Pengutronix</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "stm32mp153.dtsi"</div><div class='add'>+#include "stm32mp15xc.dtsi"</div><div class='add'>+#include "stm32mp15xx-osd32.dtsi"</div><div class='add'>+#include "stm32mp15xxac-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		can0 = &amp;m_can1;</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		i2c0 = &amp;i2c1;</div><div class='add'>+		i2c1 = &amp;i2c4;</div><div class='add'>+		mmc1 = &amp;sdmmc2;</div><div class='add'>+		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;usart3;</div><div class='add'>+		spi0 = &amp;spi4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;0 31 63 95 127 159 191 223 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		pwms = &lt;&amp;led_pwm 3 1000000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller-cpu {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpioa 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_controller_io: led-controller-io {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * led-0 and led-1 are internally connected antiparallel to one</div><div class='add'>+		 * another inside the ethernet jack like this:</div><div class='add'>+		 * GPIO0 ---+---|led-0|&gt;--+--- GPIO2</div><div class='add'>+		 *          +--&lt;|led-1|---+</div><div class='add'>+		 * E.g. only one of the LEDs can be illuminated at a time while</div><div class='add'>+		 * the other output must be driven low.</div><div class='add'>+		 * This should likely be implemented using a multi color LED</div><div class='add'>+		 * driver for antiparallel LEDs.</div><div class='add'>+		 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;io_board_gpio 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;io_board_gpio 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v: regulator-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "5V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v2: regulator-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1V2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+baseboard_eeprom: &amp;sip_eeprom {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;crc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cryp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dts {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;rcc ETHCK_K&gt;, &lt;&amp;rcc PLL4_P&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;rcc PLL4_P&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;125000000&gt;; /* Clock PLL4 to 750Mhz in ATF */</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_rgmii_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ethernet0_rgmii_sleep_pins_b&gt;;</div><div class='add'>+</div><div class='add'>+	st,eth-clk-sel;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy: ethernet-phy@3 { /* KSZ9031RN */</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpioe 11 GPIO_ACTIVE_LOW&gt;; /* ETH_RST# */</div><div class='add'>+			interrupt-parent = &lt;&amp;gpioa&gt;;</div><div class='add'>+			interrupts = &lt;6 IRQ_TYPE_EDGE_FALLING&gt;; /* ETH_MDINT# */</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;300&gt;;</div><div class='add'>+			micrel,force-master;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioa {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "ETH_INT", "", "", "",			/*  5 */</div><div class='add'>+			  "", "", "", "BOOTROM_LED", "",		/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiob {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioc {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "";					/* 10 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiod {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "LCD_TE", "", "",			/*  5 */</div><div class='add'>+			  "LCD_DC", "", "", "", "",			/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names = "LCD_CS", "", "", "", "",			/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiof {</div><div class='add'>+	gpio-line-names = "GPIO1", "GPIO2", "", "", "",			/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",				/*  0 */</div><div class='add'>+			  "", "", "", "", "",				/*  5 */</div><div class='add'>+			  "", "", "", "", "",				/* 10 */</div><div class='add'>+			  "";						/* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioz {</div><div class='add'>+	gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "",	/*  0 */</div><div class='add'>+			  "", "HWID4", "HWID5";				/*  5 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hash1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iwdg2 {</div><div class='add'>+	timeout-sec = &lt;8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;m_can1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;m_can1_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;m_can1_sleep_pins_b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	termination-gpios = &lt;&amp;io_board_gpio 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	termination-ohms = &lt;120&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmic {</div><div class='add'>+	regulators {</div><div class='add'>+		buck1-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		buck2-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		buck3-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		buck4-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		ldo2-supply = &lt;&amp;reg_5v&gt;;	/* PMIC_LDO25IN */</div><div class='add'>+		ldo4-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		ldo5-supply = &lt;&amp;reg_5v&gt;;	/* PMIC_LDO25IN */</div><div class='add'>+		vref_ddr-supply = &lt;&amp;reg_5v&gt;;	/* VIN */</div><div class='add'>+		boost-supply = &lt;&amp;reg_5v&gt;;	/* PMIC_BSTIN */</div><div class='add'>+		pwr_sw2-supply = &lt;&amp;bst_out&gt;;	/* PMIC_SWIN */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwr_regulators {</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdd_3v3_usbfs-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a &amp;sdmmc2_d47_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_a &amp;sdmmc2_d47_pins_b&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_a &amp;sdmmc2_d47_sleep_pins_b&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-ddr-3_3v;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi4_pins_a&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpioe 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	lcd: display@0 {</div><div class='add'>+		compatible = "shineworld,lh133k", "panel-mipi-dbi-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+		io-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		dc-gpios = &lt;&amp;gpiod 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpioh 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		spi-3wire;</div><div class='add'>+		spi-max-frequency = &lt;32000000&gt;;</div><div class='add'>+</div><div class='add'>+		width-mm = &lt;23&gt;;</div><div class='add'>+		height-mm = &lt;23&gt;;</div><div class='add'>+		rotation = &lt;180&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			hactive = &lt;240&gt;;</div><div class='add'>+			vactive = &lt;240&gt;;</div><div class='add'>+			hback-porch = &lt;0&gt;;</div><div class='add'>+			vback-porch = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clock-frequency = &lt;0&gt;;</div><div class='add'>+			hfront-porch = &lt;0&gt;;</div><div class='add'>+			hsync-len = &lt;0&gt;;</div><div class='add'>+			vfront-porch = &lt;0&gt;;</div><div class='add'>+			vsync-len = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers2 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	timer@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers3 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	timer@2 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers4 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	timer@3 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers8 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led_pwm: pwm {</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm8_pins_b&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm8_sleep_pins_b&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	label = "debug";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_pins_a&gt;;</div><div class='add'>+</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart3 {</div><div class='add'>+	label = "external";</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart3_pins_a&gt;;</div><div class='add'>+</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh_ehci {</div><div class='add'>+	phys = &lt;&amp;usbphyc_port0&gt;;</div><div class='add'>+	phy-names = "usb";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg_hs {</div><div class='add'>+	phys = &lt;&amp;usbphyc_port1 0&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+</div><div class='add'>+	vusb_d-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+	vusb_a-supply = &lt;&amp;reg18&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port0 {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port1 {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;v3v3_hdmi {</div><div class='add'>+	regulator-enable-ramp-delay = &lt;1000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts b/arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts<br/>new file mode 100644<br/>index 000000000000..a40b0eae8da3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp153c-lxa-tac-gen3.dts</a></div><div class='hunk'>@@ -0,0 +1,267 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 STMicroelectronics - All Rights Reserved</div><div class='add'>+ * Copyright (C) 2021 Rouven Czerwinski, Pengutronix</div><div class='add'>+ * Copyright (C) 2023, 2024 Leonard Göhrs, Pengutronix</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "stm32mp153.dtsi"</div><div class='add'>+#include "stm32mp15xc-lxa-tac.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Linux Automation Test Automation Controller (TAC) Gen 3";</div><div class='add'>+	compatible = "lxa,stm32mp153c-tac-gen3", "oct,stm32mp153x-osd32", "st,stm32mp153";</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;0 31 63 95 127 159 191 223 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		pwms = &lt;&amp;led_pwm 3 1000000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_iobus_12v: regulator-iobus-12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		vin-supply = &lt;&amp;reg_12v&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpioh 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "12V_IOBUS";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller-1 {</div><div class='add'>+		compatible = "pwm-leds-multicolor";</div><div class='add'>+</div><div class='add'>+		multi-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			max-brightness = &lt;65535&gt;;</div><div class='add'>+</div><div class='add'>+			led-red {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+				pwms = &lt;&amp;led_pwm 0 1000000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-green {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				pwms = &lt;&amp;led_pwm 2 1000000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led-blue {</div><div class='add'>+				active-low;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				pwms = &lt;&amp;led_pwm 1 1000000 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller-2 {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			label = "tac:green:iobus";</div><div class='add'>+			gpios = &lt;&amp;gpiog 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-6 {</div><div class='add'>+			label = "tac:green:can";</div><div class='add'>+			gpios = &lt;&amp;gpiof 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-7 {</div><div class='add'>+			label = "tac:green:out0";</div><div class='add'>+			gpios = &lt;&amp;gpiob 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-8 {</div><div class='add'>+			label = "tac:green:out1";</div><div class='add'>+			gpios = &lt;&amp;gpiog 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-9 {</div><div class='add'>+			label = "tac:green:uarttx";</div><div class='add'>+			gpios = &lt;&amp;gpiod 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-10 {</div><div class='add'>+			label = "tac:green:uartrx";</div><div class='add'>+			gpios = &lt;&amp;gpiof 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-11 {</div><div class='add'>+			label = "tac:green:usbh1";</div><div class='add'>+			gpios = &lt;&amp;gpioc 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-12 {</div><div class='add'>+			label = "tac:green:usbh2";</div><div class='add'>+			gpios = &lt;&amp;gpiod 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-13 {</div><div class='add'>+			label = "tac:green:usbh3";</div><div class='add'>+			gpios = &lt;&amp;gpiob 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-14 {</div><div class='add'>+			label = "tac:green:usbg";</div><div class='add'>+			gpios = &lt;&amp;gpiod 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "usb-gadget";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-15 {</div><div class='add'>+			label = "tac:green:dutpwr";</div><div class='add'>+			gpios = &lt;&amp;gpioa 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;board_adc1_ain_pins&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;vdda&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc1: adc@0 {</div><div class='add'>+		st,adc-channels = &lt;2 5 9 10 13 14 15 18&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;5000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			label = "OUT_0_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			label = "IOBUS_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@9 {</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			label = "IOBUS_VOLT_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@10 {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			label = "OUT_1_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@13 {</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			label = "HOST_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@14 {</div><div class='add'>+			reg = &lt;14&gt;;</div><div class='add'>+			label = "HOST_3_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@15 {</div><div class='add'>+			reg = &lt;15&gt;;</div><div class='add'>+			label = "HOST_1_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@18 {</div><div class='add'>+			reg = &lt;18&gt;;</div><div class='add'>+			label = "HOST_2_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc2: adc@100 {</div><div class='add'>+		st,adc-channels = &lt;12&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;500000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@12 {</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			label = "TEMP_INTERNAL";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioa {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",              /*  0 */</div><div class='add'>+	"ETH_GPIO1", "ETH_INT", "", "", "",                /*  5 */</div><div class='add'>+	"", "", "", "BOOTROM_LED", "ETH_LAB_LEDRP",        /* 10 */</div><div class='add'>+	"";                                                /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioc {</div><div class='add'>+	gpio-line-names = "", "DUT_PWR_DISCH", "", "", "", /*  0 */</div><div class='add'>+	"", "", "", "", "",                                /*  5 */</div><div class='add'>+	"", "";                                            /* 10 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /*  0 */</div><div class='add'>+	"", "", "USER_BTN2", "DUT_PWR_EN", "UART_TX_EN",    /*  5 */</div><div class='add'>+	"UART_RX_EN", "TP24", "", "TP25", "TP26",           /* 10 */</div><div class='add'>+	"TP27";                                             /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names = "ETH_RESET", "", "", "", "",               /*  0 */</div><div class='add'>+	"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /*  5 */</div><div class='add'>+	"POWER_ADC_RESET", "", "", "", "",                           /* 10 */</div><div class='add'>+	"";                                                          /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;m_can2 {</div><div class='add'>+	termination-gpios = &lt;&amp;gpioe 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	termination-ohms = &lt;120&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	board_adc1_ain_pins: board-adc1-ain-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 11, ANALOG)&gt;, /* ADC1_INP2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 1, ANALOG)&gt;, /* ADC1_INP5 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 0, ANALOG)&gt;, /* ADC1_INP9 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 0, ANALOG)&gt;, /* ADC1_INP10 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 3, ANALOG)&gt;, /* ADC1_INP13 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 2, ANALOG)&gt;, /* ADC1_INP14 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 3, ANALOG)&gt;, /* ADC1_INP15 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 4, ANALOG)&gt;; /* ADC1_INP18 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	adc@0 {</div><div class='add'>+		compatible = "ti,lmp92064";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpiog 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;15000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_pb_3v3&gt;;</div><div class='add'>+		vdig-supply = &lt;&amp;reg_pb_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers8 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led_pwm: pwm {</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm8_pins_b&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm8_sleep_pins_b&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157a-iot-box.dts b/arch/arm/boot/dts/st/stm32mp157a-iot-box.dts<br/>index 6a5a4af25bd9..84497026a106 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157a-iot-box.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157a-iot-box.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157a-iot-box.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157a-iot-box.dts</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts<br/>index 7a701f7ef0c7..1ec3b8f2faa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-dk2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-dk2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-dk2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-dk2.dts</a></div><div class='hunk'>@@ -24,6 +24,11 @@</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpioh 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cryp1 {</div><div class='hunk'>@@ -40,7 +45,6 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpioe 4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;v3v3&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			panel_in: endpoint {</div><div class='hunk'>@@ -58,15 +62,20 @@</div><div class='ctx'> 	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdp {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdp2_gpo &amp;hdp2_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;hdp2_sleep_pins_a&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	touchscreen@38 {</div><div class='ctx'> 		compatible = "focaltech,ft6236";</div><div class='ctx'> 		reg = &lt;0x38&gt;;</div><div class='del'>-		interrupts = &lt;2 2&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpiof&gt;;</div><div class='ctx'> 		touchscreen-size-x = &lt;480&gt;;</div><div class='ctx'> 		touchscreen-size-y = &lt;800&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -84,10 +93,54 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;rtc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_rsvd_pins_a&gt;;</div><div class='add'>+</div><div class='add'>+	rtc_lsco_pins_a: rtc-lsco-0 {</div><div class='add'>+		pins = "out2_rmp";</div><div class='add'>+		function = "lsco";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wifi */</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_a&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_lsco_pins_a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bluetooth */</div><div class='ctx'> &amp;usart2 {</div><div class='ctx'> 	pinctrl-names = "default", "sleep", "idle";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;usart2_pins_c&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;usart2_sleep_pins_c&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;usart2_idle_pins_c&gt;;</div><div class='del'>-	status = "disabled";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpioz 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts<br/>index 9cf5ed111b52..f6c478dbd041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-ed1.dts</a></div><div class='hunk'>@@ -328,6 +328,8 @@</div><div class='ctx'> 			&lt;&amp;vdev0vring1&gt;, &lt;&amp;vdev0buffer&gt;;</div><div class='ctx'> 	mboxes = &lt;&amp;ipcc 0&gt;, &lt;&amp;ipcc 1&gt;, &lt;&amp;ipcc 2&gt;, &lt;&amp;ipcc 3&gt;;</div><div class='ctx'> 	mbox-names = "vq0", "vq1", "shutdown", "detach";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;m4_leds_orange_pins_b&gt;;</div><div class='ctx'> 	interrupt-parent = &lt;&amp;exti&gt;;</div><div class='ctx'> 	interrupts = &lt;68 1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts<br/>index 9eb9a1bf4f2c..8f99c30f1af1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-ev1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-ev1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-ev1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-ev1.dts</a></div><div class='hunk'>@@ -306,6 +306,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm2_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm2_sleep_pins_a&gt;;</div><div class='hunk'>@@ -321,6 +324,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm8_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm8_sleep_pins_a&gt;;</div><div class='hunk'>@@ -336,6 +342,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm12_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm12_sleep_pins_a&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts<br/>index 81f254fb88b0..e72e42eb0eb4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts</a></div><div class='hunk'>@@ -35,6 +35,76 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adc1_ain_pins_a&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;vdda&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc1: adc@0 {</div><div class='add'>+		st,adc-channels = &lt;0 1 2 5 9 10 13 15&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;5000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			label = "HOST_2_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			label = "HOST_3_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			label = "OUT_0_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			label = "IOBUS_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@9 {</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			label = "IOBUS_VOLT_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@10 {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			label = "OUT_1_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@13 {</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			label = "HOST_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@15 {</div><div class='add'>+			reg = &lt;15&gt;;</div><div class='add'>+			label = "HOST_1_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc2: adc@100 {</div><div class='add'>+		st,adc-channels = &lt;12&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;500000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@12 {</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			label = "TEMP_INTERNAL";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpioa {</div><div class='ctx'> 	gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /*  0 */</div><div class='ctx'> 	"ETH_GPIO1", "ETH_INT", "", "", "",                     /*  5 */</div><div class='hunk'>@@ -48,6 +118,20 @@</div><div class='ctx'> 	"", "";                                        /* 10 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /*  0 */</div><div class='add'>+	"", "", "USER_BTN2", "TP48", "UART_TX_EN",          /*  5 */</div><div class='add'>+	"UART_RX_EN", "TP24", "", "TP25", "TP26",           /* 10 */</div><div class='add'>+	"TP27";                                             /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names = "ETH_RESET", "", "", "", "",               /*  0 */</div><div class='add'>+	"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /*  5 */</div><div class='add'>+	"TP49", "", "", "", "",                                      /* 10 */</div><div class='add'>+	"";                                                          /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts<br/>index 4cc177031661..2ae281725a48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts</a></div><div class='hunk'>@@ -121,6 +121,76 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adc1_ain_pins_a&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;vdda&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc1: adc@0 {</div><div class='add'>+		st,adc-channels = &lt;0 1 2 5 9 10 13 15&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;5000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			label = "HOST_2_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			label = "HOST_3_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			label = "OUT_0_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			label = "IOBUS_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@9 {</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			label = "IOBUS_VOLT_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@10 {</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			label = "OUT_1_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@13 {</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			label = "HOST_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@15 {</div><div class='add'>+			reg = &lt;15&gt;;</div><div class='add'>+			label = "HOST_1_CURR_FB";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc2: adc@100 {</div><div class='add'>+		st,adc-channels = &lt;12&gt;;</div><div class='add'>+		st,min-sample-time-nsecs = &lt;500000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@12 {</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			label = "TEMP_INTERNAL";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpioa {</div><div class='ctx'> 	gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /*  0 */</div><div class='ctx'> 	"ETH_GPIO1", "ETH_INT", "", "", "",                      /*  5 */</div><div class='hunk'>@@ -134,6 +204,20 @@</div><div class='ctx'> 	"", "";                                            /* 10 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /*  0 */</div><div class='add'>+	"", "", "USER_BTN2", "TP48", "UART_TX_EN",          /*  5 */</div><div class='add'>+	"UART_RX_EN", "TP24", "", "TP25", "TP26",           /* 10 */</div><div class='add'>+	"TP27";                                             /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names = "ETH_RESET", "", "", "", "",               /*  0 */</div><div class='add'>+	"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /*  5 */</div><div class='add'>+	"TP49", "", "", "", "",                                      /* 10 */</div><div class='add'>+	"";                                                          /* 15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts b/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts<br/>new file mode 100644<br/>index 000000000000..2531f4bc8ca4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts</a></div><div class='hunk'>@@ -0,0 +1,1152 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) Ultratronik GmbH 2024-2025 - All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "stm32mp157.dtsi"</div><div class='add'>+#include "stm32mp15xc.dtsi"</div><div class='add'>+#include "stm32mp15-pinctrl.dtsi"</div><div class='add'>+#include "stm32mp15xxac-pinctrl.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pinctrl/stm32-pinfunc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mfd/st,stpmic1.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STM STM32MP15x Ultratronik MMI_A7 board";</div><div class='add'>+	compatible = "ultratronik,stm32mp157c-ultra-fly-sbc", "st,stm32mp157";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;uart5;</div><div class='add'>+		serial2 = &amp;uart7;</div><div class='add'>+		serial3 = &amp;usart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@c0000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0xC0000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_otg_vbus: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb_otg_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpioh 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		retram: retram@38000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x38000000 0x10000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcuram: mcuram@30000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x30000000 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcuram2: mcuram2@10000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x10000000 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring0: vdev0vring0@10040000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x10040000 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: vdev0vring1@10042000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x10042000 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0buffer: vdev0buffer@10044000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x10044000 0x4000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_reserved: gpu@f8000000 {</div><div class='add'>+			reg = &lt;0xf8000000 0x8000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led0 {</div><div class='add'>+			label = "buzzer";</div><div class='add'>+			gpios = &lt;&amp;gpiof 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpioa 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2 {</div><div class='add'>+			label = "led2";</div><div class='add'>+			gpios = &lt;&amp;gpioa 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led3 {</div><div class='add'>+			label = "led3";</div><div class='add'>+			gpios = &lt;&amp;gpioa 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-1 {</div><div class='add'>+			label = "KEY1";</div><div class='add'>+			gpios = &lt;&amp;gpiod 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			linux,code = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-2 {</div><div class='add'>+			label = "KEY2";</div><div class='add'>+			gpios = &lt;&amp;gpiod 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			linux,code = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adc1_ux_ain_pins_a&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc1: adc@0 {</div><div class='add'>+		st,min-sample-time-nsecs = &lt;5000&gt;;</div><div class='add'>+		st,adc-channels = &lt;0 1 6 13&gt;; /* ANA0 ANA1 PF12 PC3 */</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc2: adc@100 {</div><div class='add'>+		st,adc-channels = &lt;0 1 12&gt;; /* ANA0 ANA1 INT_TEMP*/</div><div class='add'>+		st,min-sample-time-nsecs = &lt;10000&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		channel@12 {</div><div class='add'>+			reg = &lt;12&gt;;  /* Channel 12 = internal temperature sensor */</div><div class='add'>+			label = "internal_temp";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dac {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dac_ux_ch1_pins_a &amp;dac_ux_ch2_pins_a&gt;;</div><div class='add'>+	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	dac1: dac@1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dac2: dac@2 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dts {</div><div class='add'>+	compatible = "st,stm32-thermal";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_ux_rgmii_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ethernet0_ux_rgmii_pins_sleep_a&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		phy1: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioa {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"#PMIC_IRQ", "", "", "", "DAC1", "DAC2", "", "",</div><div class='add'>+	"", "", "OTG_ID", "TIM1_4", "#LED1", "#LED2", "#LED3", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiob {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioc {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"#AMP_SD", "", "", "ANA5", "", "", "", "",</div><div class='add'>+	"", "", "", "", "", "PMIC_WAKEUP", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiod {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"#G_INT", "#TASTER1", "", "", "GPIO1", "GPIO2", "", "#TASTER2",</div><div class='add'>+	"", "", "", "", "", "", "TIM4_3", "TIM4_4";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioe {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	"", "", "PWM2", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiof {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"#SD1_CD", "SD1_WP", "BUZZER", "#DISP_POW", "BKL_POW", "#CAM_RES", "", "",</div><div class='add'>+	"", "TIM17_1N", "", "CAM_PWDN", "ANA6", "ENA_USB", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiog {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"#ESP_RES", "#ESP_BOOT", "GPIO3", "GPIO4", "", "", "", "",</div><div class='add'>+	"", "#TOUCH_IRQ", "", "", "", "", "", "#PCAP_RES";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioh {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "CAM_LED", "", "USB_OTG_PWR", "", "USB_OTG_OC", "", "",</div><div class='add'>+	"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioi {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"BKL_PWM", "", "", "", "", "", "", "",</div><div class='add'>+	"#SPI_CS0", "", "", "#SPI_CS1", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioj {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpiok {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "", "", "", "", "", "", "",</div><div class='add'>+	"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioz {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+	"", "", "", "#SPI_CS2", "", "", "", "",</div><div class='add'>+	"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_ux_pins_sleep_a&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;100&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	rtc@32 {</div><div class='add'>+		compatible = "epson,rx8900";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+		epson,vdet-disable;</div><div class='add'>+		trickle-diode-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c4_ux_pins_sleep_a&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;185&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+</div><div class='add'>+	pmic: pmic@33 {</div><div class='add'>+		compatible = "st,stpmic1";</div><div class='add'>+		reg = &lt;0x33&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;exti 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			compatible = "st,stpmic1-regulators";</div><div class='add'>+</div><div class='add'>+			ldo1-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+			ldo3-supply = &lt;&amp;vdd_ddr&gt;;</div><div class='add'>+			ldo6-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+			pwr_sw1-supply = &lt;&amp;bst_out&gt;;</div><div class='add'>+			pwr_sw2-supply = &lt;&amp;bst_out&gt;;</div><div class='add'>+</div><div class='add'>+			vddcore: buck1 {</div><div class='add'>+				regulator-name = "vddcore";</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-initial-mode = &lt;0&gt;;</div><div class='add'>+				regulator-over-current-protection;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr: buck2 {</div><div class='add'>+				regulator-name = "vdd_ddr";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-initial-mode = &lt;0&gt;;</div><div class='add'>+				regulator-over-current-protection;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd: buck3 {</div><div class='add'>+				regulator-name = "vdd";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				st,mask-reset;</div><div class='add'>+				regulator-initial-mode = &lt;0&gt;;</div><div class='add'>+				regulator-over-current-protection;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			v3v3: buck4 {</div><div class='add'>+				regulator-name = "v3v3";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-over-current-protection;</div><div class='add'>+				regulator-initial-mode = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vtt_ddr: ldo3 {</div><div class='add'>+				regulator-name = "vtt_ddr";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-over-current-protection;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_usb: ldo4 {</div><div class='add'>+				regulator-name = "vdd_usb";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				interrupts = &lt;IT_CURLIM_LDO4 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			v1v8: ldo6 {</div><div class='add'>+				regulator-name = "v1v8";</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;/* offset +200 mv ??? */</div><div class='add'>+				regulator-max-microvolt = &lt;1600000&gt;;/* real 1800000 */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				interrupts = &lt;IT_CURLIM_LDO6 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vref_ddr: vref_ddr {</div><div class='add'>+				regulator-name = "vref_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bst_out: boost {</div><div class='add'>+				regulator-name = "bst_out";</div><div class='add'>+				interrupts = &lt;IT_OCP_BOOST 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vbus_otg: pwr_sw1 {</div><div class='add'>+				regulator-name = "vbus_otg";</div><div class='add'>+				interrupts = &lt;IT_OCP_OTG 0&gt;;</div><div class='add'>+				regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+			 };</div><div class='add'>+</div><div class='add'>+			 vbus_sw: pwr_sw2 {</div><div class='add'>+				regulator-name = "vbus_sw";</div><div class='add'>+				interrupts = &lt;IT_OCP_SWOUT 0&gt;;</div><div class='add'>+				regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+			 };</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iwdg2 {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;m_can2 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;m_can2_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;m_can2_ux_sleep_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+</div><div class='add'>+	adc1_ux_ain_pins_a: adc1-ux-ain-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F',12, ANALOG)&gt;, /* ADC1 in6 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 3, ANALOG)&gt;; /* ADC2 in13 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dac_ux_ch1_pins_a: dac-ux-ch1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 4, ANALOG)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dac_ux_ch2_pins_a: dac-ux-ch2-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 5, ANALOG)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet0_ux_rgmii_pins_a: rgmii-ux-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 5, AF11)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 4, AF11)&gt;, /* ETH_RGMII_GTX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 13, AF11)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 14, AF11)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, AF11)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 2, AF11)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, AF11)&gt;; /* ETH_RGMII_TX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 4, AF11)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, AF11)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 0, AF11)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 7, AF11)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, AF11)&gt;, /* ETH_RGMII_RX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, AF11)&gt;; /* ETH_RGMII_RX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 1, AF11)&gt;; /* ETH_MDC */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins4 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 2, AF11)&gt;; /* ETH_MDIO */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet0_ux_rgmii_pins_sleep_a: rgmii-ux-sleep-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 5, ANALOG)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 4, ANALOG)&gt;, /* ETH_RGMII_GTX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 13, ANALOG)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('G', 14, ANALOG)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, ANALOG)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 2, ANALOG)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 11, ANALOG)&gt;, /* ETH_RGMII_TX_CTL */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 2, ANALOG)&gt;, /* ETH_MDIO */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, ANALOG)&gt;, /* ETH_MDC */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 4, ANALOG)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 5, ANALOG)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 0, ANALOG)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 1, ANALOG)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 1, ANALOG)&gt;, /* ETH_RGMII_RX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 7, ANALOG)&gt;; /* ETH_RGMII_RX_CTL */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_ux_pins_a: i2c1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 14, AF5)&gt;, /* I2C1_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 15, AF5)&gt;; /* I2C1_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_ux_pins_sleep_a: i2c1-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 14, ANALOG)&gt;, /* I2C1_SCL */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 15, ANALOG)&gt;; /* I2C1_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m_can2_ux_pins_a: m-can2-ux-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 6, AF9)&gt;; /* CAN1_TX */</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 5, AF9)&gt;; /* CAN1_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m_can2_ux_sleep_pins_a: m-can2-ux-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 6, ANALOG)&gt;, /* CAN1_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 5, ANALOG)&gt;; /* CAN1_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	pwm1_ux_pins_a: pwm1-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A',11, AF1)&gt;, /* TIM1_CH4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',10, AF1)&gt;; /* TIM1_CH2N */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1_ux_sleep_pins_a: pwm1-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A',11, ANALOG)&gt;, /* TIM1_CH4 */</div><div class='add'>+				 &lt;STM32_PINMUX('E',10, ANALOG)&gt;; /* TIM1_CH2N */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4_ux_pins_a: pwm4-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 14, AF2)&gt;, /* TIM4_CH3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 15, AF2)&gt;; /* TIM4_CH4 */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4_ux_sleep_pins_a: pwm4-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 14, ANALOG)&gt;, /* TIM4_CH3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 15, ANALOG)&gt;; /* TIM4_CH4 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm5_ux_pins_a: pwm5-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 0, AF2)&gt;; /* TIM5_CH4 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm5_ux_sleep_pins_a: pwm5-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 0, ANALOG)&gt;; /* TIM5_CH4 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm17_ux_pins_a: pwm17-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 9, AF1)&gt;; /* TIM17_CH1N */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm17_ux_sleep_pins_a: pwm17-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 9, ANALOG)&gt;; /* TIM17_CH1N */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qspi_bk1_ux_pins_a: qspi-bk1-ux-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 8, AF10)&gt;, /* QSPI_BK1_IO0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D',12, AF9)&gt;, /* QSPI_BK1_IO1 */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 7, AF9)&gt;, /* QSPI_BK1_IO2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 6, AF9)&gt;; /* QSPI_BK1_IO3 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B',10, AF9)&gt;; /* QSPI_BK1_NCS */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qspi_bk1_ux_sleep_pins_a: qspi-bk1-ux-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 8, ANALOG)&gt;, /* QSPI_BK1_IO0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D',12, ANALOG)&gt;, /* QSPI_BK1_IO1 */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 7, ANALOG)&gt;, /* QSPI_BK1_IO2 */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 6, ANALOG)&gt;, /* QSPI_BK1_IO3 */</div><div class='add'>+				 &lt;STM32_PINMUX('B',10, ANALOG)&gt;; /* QSPI_BK1_NCS */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qspi_clk_ux_pins_a: qspi-clk_ux-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 7, AF9)&gt;; /* QSPI_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qspi_clk_ux_sleep_pins_a: qspi-clk-ux-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 7, ANALOG)&gt;; /* QSPI_CLK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai2a_ux_pins_a: sai2a-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 5, AF10)&gt;, /* SAI2_SCK_A */</div><div class='add'>+				 &lt;STM32_PINMUX('D',11, AF10)&gt;, /* SAI2_SD_A */</div><div class='add'>+				 &lt;STM32_PINMUX('I', 7, AF10)&gt;, /* SAI2_FS_A */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 0, AF10)&gt;; /* SAI2_MCLK_A */</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai2a_ux_sleep_pins_a: sai2a-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('I', 5, ANALOG)&gt;, /* SAI2_SCK_A */</div><div class='add'>+				 &lt;STM32_PINMUX('D',11, ANALOG)&gt;, /* SAI2_SD_A */</div><div class='add'>+				 &lt;STM32_PINMUX('I', 7, ANALOG)&gt;, /* SAI2_FS_A */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 0, ANALOG)&gt;; /* SAI2_MCLK_A */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1_ux_b4_pins_a: sdmmc1-ux-b4-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 8, AF12)&gt;, /* SDMMC1_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 9, AF12)&gt;, /* SDMMC1_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('C',10, AF12)&gt;, /* SDMMC1_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('C',11, AF12)&gt;, /* SDMMC1_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 2, AF12)&gt;; /* SDMMC1_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 12, AF12)&gt;; /* SDMMC1_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1_ux_b4_od_pins_a: sdmmc1-b4-od-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 8, AF12)&gt;, /* SDMMC1_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 9, AF12)&gt;, /* SDMMC1_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 10, AF12)&gt;, /* SDMMC1_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 11, AF12)&gt;; /* SDMMC1_D3 */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 12, AF12)&gt;; /* SDMMC1_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 2, AF12)&gt;; /* SDMMC1_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1_ux_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('C', 8, ANALOG)&gt;, /* SDMMC1_D0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 9, ANALOG)&gt;, /* SDMMC1_D1 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 10, ANALOG)&gt;, /* SDMMC1_D2 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 11, ANALOG)&gt;, /* SDMMC1_D3 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 12, ANALOG)&gt;, /* SDMMC1_CK */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 2, ANALOG)&gt;; /* SDMMC1_CMD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc2_ux_b4_pins_a: sdmmc2-ux-b4-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, AF9)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 15, AF9)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 3, AF9)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 4, AF9)&gt;, /* SDMMC2_D3 */</div><div class='add'>+				&lt;STM32_PINMUX('G', 6, AF10)&gt;; /* SDMMC2_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 3, AF9)&gt;; /* SDMMC2_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc2_ux_b4_od_pins_a: sdmmc2-ux-b4-od-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, AF9)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 15, AF9)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 3, AF9)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 4, AF9)&gt;; /* SDMMC2_D3 */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 3, AF9)&gt;; /* SDMMC2_CK */</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 6, AF10)&gt;; /* SDMMC2_CMD */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc2_ux_b4_sleep_pins_a: sdmmc2-ux-b4-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 14, ANALOG)&gt;, /* SDMMC2_D0 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 15, ANALOG)&gt;, /* SDMMC2_D1 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 3, ANALOG)&gt;, /* SDMMC2_D2 */</div><div class='add'>+				&lt;STM32_PINMUX('B', 4, ANALOG)&gt;, /* SDMMC2_D3 */</div><div class='add'>+				&lt;STM32_PINMUX('E', 3, ANALOG)&gt;, /* SDMMC2_CK */</div><div class='add'>+				&lt;STM32_PINMUX('G', 6, ANALOG)&gt;; /* SDMMC2_CMD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc2_ux_d47_pins_a: sdmmc2-ux-d47-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 8, AF9)&gt;, /* SDMMC2_D4 */</div><div class='add'>+				&lt;STM32_PINMUX('A', 9, AF10)&gt;, /* SDMMC2_D5 */</div><div class='add'>+				&lt;STM32_PINMUX('E', 5, AF9)&gt;, /* SDMMC2_D6 */</div><div class='add'>+				&lt;STM32_PINMUX('D', 3, AF9)&gt;; /* SDMMC2_D7 */</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc2_ux_d47_sleep_pins_a: sdmmc2-ux-d47-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 8, ANALOG)&gt;, /* SDMMC2_D4 */</div><div class='add'>+				&lt;STM32_PINMUX('A', 9, ANALOG)&gt;, /* SDMMC2_D5 */</div><div class='add'>+				&lt;STM32_PINMUX('E', 5, ANALOG)&gt;, /* SDMMC2_D6 */</div><div class='add'>+				&lt;STM32_PINMUX('D', 3, ANALOG)&gt;; /* SDMMC2_D7 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_ux_pins_a: uart4-ux-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, AF6)&gt;; /* UART4_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 2, AF8)&gt;; /* UART4_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_ux_idle_pins_a: uart4-ux-idle-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, ANALOG)&gt;; /* UART4_TX */</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 2, AF8)&gt;; /* UART4_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	uart4_ux_sleep_pins_a: uart4-ux-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('G', 11, ANALOG)&gt;, /* UART4_TX */</div><div class='add'>+				&lt;STM32_PINMUX('B', 2, ANALOG)&gt;; /* UART4_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_ux_pins_a: uart5-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 13, AF14)&gt;; /* UART5_TX */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 12, AF14)&gt;; /* UART5_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_ux_idle_pins_a: uart5-idle-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 13, ANALOG)&gt;; /* UART5_TX */</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 12, AF14)&gt;; /* UART5_RX*/</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_ux_sleep_pins_a: uart5-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 13, ANALOG)&gt;, /* UART5_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('B', 12, ANALOG)&gt;; /* UART5_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_ux_pins_a: uart7-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, AF7)&gt;; /* USART7_TX */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 7, AF7)&gt;; /* USART7_RX */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 9, AF7)&gt;; /* USART7_RTS/DE */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_ux_idle_pins_a: uart7-idle-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, ANALOG)&gt;, /* USART7_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 9, AF7)&gt;; /* USART7_RTS/DE */</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 7, AF7)&gt;; /* USART7_RX */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_ux_sleep_pins_a: uart7-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('E', 8, ANALOG)&gt;, /* USART7_TX */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 9, AF7)&gt;, /* USART7_RTS/DE */</div><div class='add'>+				 &lt;STM32_PINMUX('E', 7, ANALOG)&gt;; /* USART7_RX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_z {</div><div class='add'>+</div><div class='add'>+	i2c4_ux_pins_a: i2c4-ux-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 4, AF6)&gt;, /* I2C4_SCL */</div><div class='add'>+				&lt;STM32_PINMUX('Z', 5, AF6)&gt;; /* I2C4_SDA */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_ux_pins_sleep_a: i2c4-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 4, ANALOG)&gt;, /* I2C4_SCL */</div><div class='add'>+				&lt;STM32_PINMUX('Z', 5, ANALOG)&gt;; /* I2C4_SDA */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_ux_pins_a: spi1-ux-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 0, AF5)&gt;, /* SPI1_SCK */</div><div class='add'>+				&lt;STM32_PINMUX('Z', 2, AF5)&gt;; /* SPI1_MOSI */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 1, AF5)&gt;; /* SPI1_MISO */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_ux_sleep_pins_a: spi1-ux-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('Z', 0, ANALOG)&gt;, /* SPI1_SCK */</div><div class='add'>+				&lt;STM32_PINMUX('Z', 1, ANALOG)&gt;, /* SPI1_MISO */</div><div class='add'>+				&lt;STM32_PINMUX('Z', 2, ANALOG)&gt;; /* SPI1_MOSI */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwr_regulators {</div><div class='add'>+	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	vdd_3v3_usbfs-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;qspi_clk_ux_pins_a &amp;qspi_bk1_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;qspi_clk_ux_sleep_pins_a &amp;qspi_bk1_ux_sleep_pins_a&gt;;</div><div class='add'>+	reg = &lt;0x58003000 0x1000&gt;, &lt;0x70000000 0x1000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash0: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;133000000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_ux_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_ux_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_ux_b4_sleep_pins_a&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_ux_b4_pins_a &amp;sdmmc2_ux_d47_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_ux_b4_od_pins_a &amp;sdmmc2_ux_d47_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_ux_b4_sleep_pins_a &amp;sdmmc2_ux_d47_sleep_pins_a&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+	mmc-ddr-3_3v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;spi1_ux_sleep_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	cs-gpios = &lt;&amp;gpioi 8 0&gt;, &lt;&amp;gpioi 11 0&gt;, &lt;&amp;gpioz 3 0&gt;;</div><div class='add'>+</div><div class='add'>+	flash: flash@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers1 {</div><div class='add'>+	/* spare dmas for other usage */</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm1_ux_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm1_ux_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers4 {</div><div class='add'>+	dmas = &lt;&amp;dmamux1 31 0x400 0x5&gt;;</div><div class='add'>+	dma-names = "ch3";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pwm4_4: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm4_ux_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm4_ux_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers5 {</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pwm5_4: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm5_ux_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm5_ux_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer@4 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers17 {</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pwm17_4: pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm17_ux_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm17_ux_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer@16 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle", "no_console_suspend";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart4_ux_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart4_ux_idle_pins_a&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;uart4_ux_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart5_ux_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart5_ux_idle_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7_ux_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart7_ux_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;uart7_ux_idle_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart1 {</div><div class='add'>+	/*Muxing happens in uboot*/</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh_ehci {</div><div class='add'>+	phys = &lt;&amp;usbphyc_port0&gt;;</div><div class='add'>+	phy-names = "usb";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh_ohci {</div><div class='add'>+	phys = &lt;&amp;usbphyc_port0&gt;;</div><div class='add'>+	phy-names = "usb";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg_hs {</div><div class='add'>+	phys = &lt;&amp;usbphyc_port1 0&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+	vbus-supply = &lt;&amp;usb_otg_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port0 {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+	st,tune-hs-dc-level = &lt;2&gt;;</div><div class='add'>+	st,enable-fs-rftime-tuning;</div><div class='add'>+	st,enable-hs-rftime-reduction;</div><div class='add'>+	st,trim-hs-current = &lt;15&gt;;</div><div class='add'>+	st,trim-hs-impedance = &lt;1&gt;;</div><div class='add'>+	st,tune-squelch-level = &lt;3&gt;;</div><div class='add'>+	st,tune-hs-rx-offset = &lt;2&gt;;</div><div class='add'>+	st,no-lsfs-sc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port1 {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_usb&gt;;</div><div class='add'>+	st,tune-hs-dc-level = &lt;2&gt;;</div><div class='add'>+	st,enable-fs-rftime-tuning;</div><div class='add'>+	st,enable-hs-rftime-reduction;</div><div class='add'>+	st,trim-hs-current = &lt;15&gt;;</div><div class='add'>+	st,trim-hs-impedance = &lt;1&gt;;</div><div class='add'>+	st,tune-squelch-level = &lt;3&gt;;</div><div class='add'>+	st,tune-hs-rx-offset = &lt;2&gt;;</div><div class='add'>+	st,no-lsfs-sc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vrefbuf {</div><div class='add'>+	regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi b/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi<br/>new file mode 100644<br/>index 000000000000..89de85a2eff3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,196 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "stm32mp15-scmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	reserved-memory {</div><div class='add'>+		optee@de000000 {</div><div class='add'>+			reg = &lt;0xde000000 0x2000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm_wdt: watchdog {</div><div class='add'>+		compatible = "arm,smc-wdt";</div><div class='add'>+		arm,smc-id = &lt;0xbc000000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	vdd-supply = &lt;&amp;scmi_vdd&gt;;</div><div class='add'>+	vdda-supply = &lt;&amp;scmi_vdd&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_MPU&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_MPU&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cryp1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_CRYP1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_CRYP1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cs42l51 {</div><div class='add'>+	VL-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+	VD-supply = &lt;&amp;scmi_v1v8_audio&gt;;</div><div class='add'>+	VA-supply = &lt;&amp;scmi_v1v8_audio&gt;;</div><div class='add'>+	VAHP-supply = &lt;&amp;scmi_v1v8_audio&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	phy-dsi-supply = &lt;&amp;scmi_reg18&gt;;</div><div class='add'>+	clocks = &lt;&amp;rcc DSI&gt;, &lt;&amp;scmi_clk CK_SCMI_HSE&gt;, &lt;&amp;rcc DSI_PX&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpioz {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOZ&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hash1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_HASH1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_HASH1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	hdmi-transmitter@39 {</div><div class='add'>+		iovcc-supply = &lt;&amp;scmi_v3v3_hdmi&gt;;</div><div class='add'>+		cvcc12-supply = &lt;&amp;scmi_v1v2_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iwdg2 {</div><div class='add'>+	clocks = &lt;&amp;rcc IWDG2&gt;, &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;m4_rproc {</div><div class='add'>+	/delete-property/ st,syscfg-holdboot;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_MCU&gt;,</div><div class='add'>+		 &lt;&amp;scmi_reset RST_SCMI_MCU_HOLD_BOOT&gt;;</div><div class='add'>+	reset-names = "mcu_rst", "hold_boot";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdma1 {</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_MDMA&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;optee {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	interrupts = &lt;GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwr_regulators {</div><div class='add'>+	vdd-supply = &lt;&amp;scmi_vdd&gt;;</div><div class='add'>+	vdd_3v3_usbfs-supply = &lt;&amp;scmi_vdd_usb&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rcc {</div><div class='add'>+	compatible = "st,stm32mp1-rcc-secure", "syscon";</div><div class='add'>+	clock-names = "hse", "hsi", "csi", "lse", "lsi";</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_HSE&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_HSI&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_CSI&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_LSE&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rng1 {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_RNG1&gt;;</div><div class='add'>+	resets = &lt;&amp;scmi_reset RST_SCMI_RNG1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk CK_SCMI_RTCAPB&gt;, &lt;&amp;scmi_clk CK_SCMI_RTC&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_reguls {</div><div class='add'>+	scmi_vddcore: regulator@3 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_BUCK1&gt;;</div><div class='add'>+		regulator-name = "vddcore";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_vdd: regulator@5 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_BUCK3&gt;;</div><div class='add'>+		regulator-name = "vdd";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_v3v3: regulator@6 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_BUCK4&gt;;</div><div class='add'>+		regulator-name = "v3v3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_v1v8_audio: regulator@7 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_LDO1&gt;;</div><div class='add'>+		regulator-name = "v1v8_audio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_v3v3_hdmi: regulator@8 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_LDO2&gt;;</div><div class='add'>+		regulator-name = "v3v3_hdmi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_vdd_usb: regulator@a {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_LDO4&gt;;</div><div class='add'>+		regulator-name = "vdd_usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_vdda: regulator@b {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_LDO5&gt;;</div><div class='add'>+		regulator-name = "vdda";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_v1v2_hdmi: regulator@c {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_LDO6&gt;;</div><div class='add'>+		regulator-name = "v1v2_hdmi";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scmi_vbus_otg: regulator@f {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_PWR_SW1&gt;;</div><div class='add'>+		regulator-name = "vbus_otg";</div><div class='add'>+	 };</div><div class='add'>+</div><div class='add'>+	 scmi_vbus_sw: regulator@10 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC1_PWR_SW2&gt;;</div><div class='add'>+		regulator-name = "vbus_sw";</div><div class='add'>+	 };</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc3 {</div><div class='add'>+	vmmc-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbh_ehci {</div><div class='add'>+	hub@1 {</div><div class='add'>+		vdd-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port0 {</div><div class='add'>+	phy-supply = &lt;&amp;scmi_vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphyc_port1 {</div><div class='add'>+	phy-supply = &lt;&amp;scmi_vdd_usb&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vrefbuf {</div><div class='add'>+	vdda-supply = &lt;&amp;scmi_vdd&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2.dts b/arch/arm/boot/dts/st/stm32mp157f-dk2.dts<br/>new file mode 100644<br/>index 000000000000..8fa61e54d026<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp157f-dk2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp157f-dk2.dts</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "stm32mp157.dtsi"</div><div class='add'>+#include "stm32mp15xf.dtsi"</div><div class='add'>+#include "stm32mp15-pinctrl.dtsi"</div><div class='add'>+#include "stm32mp15xxac-pinctrl.dtsi"</div><div class='add'>+#include "stm32mp15xx-dkx.dtsi"</div><div class='add'>+#include "stm32mp157f-dk2-scmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32MP157F-DK2 Discovery Board";</div><div class='add'>+	compatible = "st,stm32mp157f-dk2", "st,stm32mp157";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		serial3 = &amp;usart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpioh 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;arm_wdt {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cryp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "orisetech,otm8009a";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpioe 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		power-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;ltdc_ep1_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	touchscreen@38 {</div><div class='add'>+		compatible = "focaltech,ft6236";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpiof&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;480&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;800&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C4 is managed by OP-TEE */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	/* i2c4 subnodes, which won't be managed by Linux */</div><div class='add'>+	typec@28 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+		connector {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	stpmic@33 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ltdc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ltdc_ep1_out: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_rsvd_pins_a&gt;;</div><div class='add'>+</div><div class='add'>+	rtc_lsco_pins_a: rtc-lsco-0 {</div><div class='add'>+		pins = "out2_rmp";</div><div class='add'>+		function = "lsco";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wifi */</div><div class='add'>+&amp;sdmmc2 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc2_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc2_b4_sleep_pins_a&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_lsco_pins_a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bluetooth */</div><div class='add'>+&amp;usart2 {</div><div class='add'>+	pinctrl-names = "default", "sleep", "idle";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart2_pins_c&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usart2_sleep_pins_c&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usart2_idle_pins_c&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpioz 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Since I2C4 is disabled, STUSB1600 is also disabled so there is no Type-C support */</div><div class='add'>+&amp;usbotg_hs {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	/*</div><div class='add'>+	 * Forcing dr_mode = "peripheral"/"role-switch-default-mode = "peripheral";</div><div class='add'>+	 * will cause the pull-up on D+/D- to be raised as soon as the OTG is configured at runtime,</div><div class='add'>+	 * regardless of the presence of VBUS. Notice that on self-powered devices like</div><div class='add'>+	 * stm32mp157f-dk2, this isn't compliant with the USB standard. That's why usbotg_hs is kept</div><div class='add'>+	 * disabled here.</div><div class='add'>+	 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi<br/>index c87fd96cbd91..154698f87b0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi</a></div><div class='hunk'>@@ -16,12 +16,20 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		can0 = &amp;m_can1;</div><div class='add'>+		can1 = &amp;m_can2;</div><div class='ctx'> 		ethernet0 = &amp;ethernet0;</div><div class='ctx'> 		ethernet1 = &amp;port_uplink;</div><div class='ctx'> 		ethernet2 = &amp;port_dut;</div><div class='add'>+		i2c0 = &amp;i2c1;</div><div class='add'>+		i2c1 = &amp;i2c4;</div><div class='add'>+		i2c2 = &amp;i2c5;</div><div class='ctx'> 		mmc1 = &amp;sdmmc2;</div><div class='ctx'> 		serial0 = &amp;uart4;</div><div class='ctx'> 		serial1 = &amp;usart3;</div><div class='add'>+		spi0 = &amp;spi2;</div><div class='add'>+		spi1 = &amp;spi4;</div><div class='add'>+		spi2 = &amp;spi5;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -142,76 +150,6 @@</div><div class='ctx'> baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;adc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;adc1_ain_pins_a&gt;;</div><div class='del'>-	vdd-supply = &lt;&amp;vdd&gt;;</div><div class='del'>-	vdda-supply = &lt;&amp;vdda&gt;;</div><div class='del'>-	vref-supply = &lt;&amp;vrefbuf&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	adc1: adc@0 {</div><div class='del'>-		st,adc-channels = &lt;0 1 2 5 9 10 13 15&gt;;</div><div class='del'>-		st,min-sample-time-nsecs = &lt;5000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		channel@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			label = "HOST_2_CURR_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			label = "HOST_3_CURR_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			label = "OUT_0_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@5 {</div><div class='del'>-			reg = &lt;5&gt;;</div><div class='del'>-			label = "IOBUS_CURR_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@9 {</div><div class='del'>-			reg = &lt;9&gt;;</div><div class='del'>-			label = "IOBUS_VOLT_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@10 {</div><div class='del'>-			reg = &lt;10&gt;;</div><div class='del'>-			label = "OUT_1_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@13 {</div><div class='del'>-			reg = &lt;13&gt;;</div><div class='del'>-			label = "HOST_CURR_FB";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@15 {</div><div class='del'>-			reg = &lt;15&gt;;</div><div class='del'>-			label = "HOST_1_CURR_FB";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	adc2: adc@100 {</div><div class='del'>-		st,adc-channels = &lt;12&gt;;</div><div class='del'>-		st,min-sample-time-nsecs = &lt;500000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		channel@12 {</div><div class='del'>-			reg = &lt;12&gt;;</div><div class='del'>-			label = "TEMP_INTERNAL";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;crc1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -265,13 +203,6 @@ baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> 	"ETH_LAB_LEDRN";                          /* 15 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gpioe {</div><div class='del'>-	gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /*  0 */</div><div class='del'>-	"", "", "USER_BTN2", "TP48", "UART_TX_EN",          /*  5 */</div><div class='del'>-	"UART_RX_EN", "TP24", "", "TP25", "TP26",           /* 10 */</div><div class='del'>-	"TP27";                                             /* 15 */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpiof {</div><div class='ctx'> 	gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /*  0 */</div><div class='ctx'> 	"", "", "", "", "",                                  /*  5 */</div><div class='hunk'>@@ -279,13 +210,6 @@ baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> 	"";                                                  /* 15 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gpiog {</div><div class='del'>-	gpio-line-names = "ETH_RESET", "", "", "", "",               /*  0 */</div><div class='del'>-	"IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /*  5 */</div><div class='del'>-	"TP49", "", "", "", "",                                      /* 10 */</div><div class='del'>-	"";                                                          /* 15 */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpioh {</div><div class='ctx'> 	gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /*  0 */</div><div class='ctx'> 	"", "", "", "", "",                                       /*  5 */</div><div class='hunk'>@@ -338,7 +262,7 @@ baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	usbhub: usbhub@2c {</div><div class='del'>-		compatible ="microchip,usb2514b";</div><div class='add'>+		compatible = "microchip,usb2514b";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;v3v3&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpiob 6 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -379,10 +303,6 @@ baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;rtc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sdmmc2 {</div><div class='ctx'> 	pinctrl-names = "default", "opendrain", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdmmc2_b4_pins_a &amp;sdmmc2_d47_pins_b&gt;;</div><div class='hunk'>@@ -576,6 +496,10 @@ baseboard_eeprom: &amp;sip_eeprom {</div><div class='ctx'> 	vusb_d-supply = &lt;&amp;vdd_usb&gt;;</div><div class='ctx'> 	vusb_a-supply = &lt;&amp;reg18&gt;;</div><div class='ctx'> </div><div class='add'>+	g-rx-fifo-size = &lt;512&gt;;</div><div class='add'>+	g-np-tx-fifo-size = &lt;32&gt;;</div><div class='add'>+	g-tx-fifo-size = &lt;128 128 64 16 16 16 16 16&gt;;</div><div class='add'>+</div><div class='ctx'> 	dr_mode = "peripheral";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xf.dtsi b/arch/arm/boot/dts/st/stm32mp15xf.dtsi<br/>new file mode 100644<br/>index 000000000000..ffa55d64bea3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xf.dtsi</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;etzpc {</div><div class='add'>+	cryp1: cryp@54001000 {</div><div class='add'>+		compatible = "st,stm32mp1-cryp";</div><div class='add'>+		reg = &lt;0x54001000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CRYP1&gt;;</div><div class='add'>+		resets = &lt;&amp;rcc CRYP1_R&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;etzpc 9&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi<br/>index bb4f8a0b937f..52c4e69597a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi</a></div><div class='hunk'>@@ -6,18 +6,6 @@</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart4;</div><div class='del'>-		serial1 = &amp;usart3;</div><div class='del'>-		serial2 = &amp;uart8;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;adc {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='hunk'>@@ -74,7 +62,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='ctx'> 	i2c-scl-rising-time-ns = &lt;185&gt;;</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;20&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	/* spare dmas for other usage */</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi<br/>index 171d7c7658fa..5c77202ee196 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi</a></div><div class='hunk'>@@ -7,16 +7,6 @@</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart4;</div><div class='del'>-		serial1 = &amp;usart3;</div><div class='del'>-		serial2 = &amp;uart8;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	clk_ext_audio_codec: clock-codec {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -30,7 +20,6 @@</div><div class='ctx'> 		default-brightness-level = &lt;8&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpioi 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;reg_panel_bl&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys-polled {</div><div class='hunk'>@@ -145,7 +134,6 @@</div><div class='ctx'> 			  "MIC_IN", "Microphone Jack",</div><div class='ctx'> 			  "Microphone Jack", "Mic Bias";</div><div class='ctx'> 		dais = &lt;&amp;sai2a_port &amp;sai2b_port&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -160,7 +148,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='ctx'> 	i2c-scl-rising-time-ns = &lt;185&gt;;</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;20&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	/* spare dmas for other usage */</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi<br/>index b5bc53accd6b..01c693cc0344 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi</a></div><div class='hunk'>@@ -7,16 +7,6 @@</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart4;</div><div class='del'>-		serial1 = &amp;usart3;</div><div class='del'>-		serial2 = &amp;uart8;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	led {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi<br/>index 74a11ccc5333..4cc633683c6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi</a></div><div class='hunk'>@@ -14,6 +14,13 @@</div><div class='ctx'> 		ethernet1 = &amp;ksz8851;</div><div class='ctx'> 		rtc0 = &amp;hwrtc;</div><div class='ctx'> 		rtc1 = &amp;rtc;</div><div class='add'>+		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;uart8;</div><div class='add'>+		serial2 = &amp;usart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@c0000000 {</div><div class='hunk'>@@ -262,7 +269,6 @@</div><div class='ctx'> 		interrupts-extended = &lt;&amp;gpioa 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			compatible = "st,stpmic1-regulators";</div><div class='hunk'>@@ -381,7 +387,6 @@</div><div class='ctx'> 			interrupts = &lt;IT_PONKEY_F 0&gt;, &lt;IT_PONKEY_R 0&gt;;</div><div class='ctx'> 			interrupt-names = "onkey-falling", "onkey-rising";</div><div class='ctx'> 			power-off-time-sec = &lt;10&gt;;</div><div class='del'>-			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		watchdog {</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi<br/>index 343a4613dfca..aceeff6c38ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi</a></div><div class='hunk'>@@ -435,7 +435,7 @@</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi<br/>index f7634c51efb2..8cea6facd27b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi</a></div><div class='hunk'>@@ -254,7 +254,7 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> </div><div class='del'>-	stusb1600@28 {</div><div class='add'>+	stusb1600: typec@28 {</div><div class='ctx'> 		compatible = "st,stusb1600";</div><div class='ctx'> 		reg = &lt;0x28&gt;;</div><div class='ctx'> 		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -479,6 +479,8 @@</div><div class='ctx'> 			&lt;&amp;vdev0vring1&gt;, &lt;&amp;vdev0buffer&gt;;</div><div class='ctx'> 	mboxes = &lt;&amp;ipcc 0&gt;, &lt;&amp;ipcc 1&gt;, &lt;&amp;ipcc 2&gt;, &lt;&amp;ipcc 3&gt;;</div><div class='ctx'> 	mbox-names = "vq0", "vq1", "shutdown", "detach";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;m4_leds_orange_pins_a&gt;;</div><div class='ctx'> 	interrupt-parent = &lt;&amp;exti&gt;;</div><div class='ctx'> 	interrupts = &lt;68 1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -515,6 +517,7 @@</div><div class='ctx'> 				remote-endpoint = &lt;&amp;cs42l51_tx_endpoint&gt;;</div><div class='ctx'> 				dai-format = "i2s";</div><div class='ctx'> 				mclk-fs = &lt;256&gt;;</div><div class='add'>+				system-clock-direction-out;</div><div class='ctx'> 				dai-tdm-slot-num = &lt;2&gt;;</div><div class='ctx'> 				dai-tdm-slot-width = &lt;32&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -570,6 +573,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm1_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm1_sleep_pins_a&gt;;</div><div class='hunk'>@@ -585,6 +591,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm3_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm3_sleep_pins_a&gt;;</div><div class='hunk'>@@ -600,6 +609,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm4_pins_a &amp;pwm4_pins_b&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm4_sleep_pins_a &amp;pwm4_sleep_pins_b&gt;;</div><div class='hunk'>@@ -615,6 +627,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm5_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm5_sleep_pins_a&gt;;</div><div class='hunk'>@@ -630,6 +645,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	timer@5 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -639,6 +657,9 @@</div><div class='ctx'> 	/delete-property/dmas;</div><div class='ctx'> 	/delete-property/dma-names;</div><div class='ctx'> 	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> 	pwm {</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pwm12_pins_a&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;pwm12_sleep_pins_a&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/davinci/da850-evm.dts b/arch/arm/boot/dts/ti/davinci/da850-evm.dts<br/>index 1f5cd35f8b74..38a191fb0414 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/davinci/da850-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/davinci/da850-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/davinci/da850-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/davinci/da850-evm.dts</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> 			sync-edge = &lt;0&gt;;</div><div class='ctx'> 			sync-ctrl = &lt;1&gt;;</div><div class='ctx'> 			raster-order = &lt;0&gt;;</div><div class='del'>-			fifo-th = &lt;0&gt;;</div><div class='add'>+			fifo-th = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		display-timings {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts b/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts<br/>index 4df10379ff22..173401c58d53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/davinci/da850-lego-ev3.dts</a></div><div class='hunk'>@@ -412,14 +412,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* Don't pull down battery voltage adc io channel */</div><div class='del'>-	batt_volt_en {</div><div class='add'>+	batt-volt-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Don't impede Bluetooth clock signal */</div><div class='del'>-	bt_clock_en {</div><div class='add'>+	bt-clock-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='hunk'>@@ -433,19 +433,19 @@</div><div class='ctx'> 	 * anything, but they are present in the source code from LEGO.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	bt_pic_en {</div><div class='add'>+	bt-pic-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;51 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bt_pic_rst {</div><div class='add'>+	bt-pic-rst-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;78 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	bt_pic_cts {</div><div class='add'>+	bt-pic-cts-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;87 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		input;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/Makefile b/arch/arm/boot/dts/ti/omap/Makefile<br/>index 95c68135dd0c..1aef60eef671 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/Makefile</a></div><div class='hunk'>@@ -93,6 +93,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \</div><div class='ctx'> 	am335x-boneblue.dtb \</div><div class='ctx'> 	am335x-bonegreen.dtb \</div><div class='ctx'> 	am335x-bonegreen-wireless.dtb \</div><div class='add'>+	am335x-bonegreen-eco.dtb \</div><div class='ctx'> 	am335x-chiliboard.dtb \</div><div class='ctx'> 	am335x-cm-t335.dtb \</div><div class='ctx'> 	am335x-evm.dtb \</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi b/arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi<br/>index a4beb718559c..ea47f9960c35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi</a></div><div class='hunk'>@@ -199,7 +199,6 @@</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='ctx'> 		ti,nand-xfer-type = "prefetch-dma";</div><div class='ctx'> </div><div class='del'>-		gpmc,device-nand = "true";</div><div class='ctx'> 		gpmc,device-width = &lt;1&gt;;</div><div class='ctx'> 		gpmc,sync-clk-ps = &lt;0&gt;;</div><div class='ctx'> 		gpmc,cs-on-ns = &lt;0&gt;;</div><div class='hunk'>@@ -251,7 +250,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;tps65910_pins&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -270,7 +269,7 @@</div><div class='ctx'> 	vcc7-supply = &lt;&amp;vbat&gt;;</div><div class='ctx'> 	vccio-supply = &lt;&amp;vbat&gt;;</div><div class='ctx'> </div><div class='del'>-	ti,en-ck32k-xtal = &lt;1&gt;;</div><div class='add'>+	ti,en-ck32k-xtal;</div><div class='ctx'> </div><div class='ctx'> 	regulators {</div><div class='ctx'> 		vrtc_reg: regulator@0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi b/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi<br/>index a0fb431aec84..ad1e60a9b6fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi</a></div><div class='hunk'>@@ -212,11 +212,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	tps: tps@24 {</div><div class='add'>+	tps: pmic@24 {</div><div class='ctx'> 		reg = &lt;0x24&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	baseboard_eeprom: baseboard_eeprom@50 {</div><div class='add'>+	baseboard_eeprom: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;ldo4_reg&gt;;</div><div class='hunk'>@@ -240,7 +240,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	cape_eeprom0: cape_eeprom0@54 {</div><div class='add'>+	cape_eeprom0: eeprom@54 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x54&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -255,7 +255,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cape_eeprom1: cape_eeprom1@55 {</div><div class='add'>+	cape_eeprom1: eeprom@55 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x55&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -270,7 +270,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cape_eeprom2: cape_eeprom2@56 {</div><div class='add'>+	cape_eeprom2: eeprom@56 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x56&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -285,7 +285,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cape_eeprom3: cape_eeprom3@57 {</div><div class='add'>+	cape_eeprom3: eeprom@57 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -409,7 +409,7 @@</div><div class='ctx'> 		/* Support GPIO reset on revision C3 boards */</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;300&gt;;</div><div class='del'>-		reset-deassert-us = &lt;13000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts b/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts<br/>index 16b567e3cb47..b4fdcf9c02b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-boneblack.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-boneblack.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-boneblack.dts</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> 		"P9_18 [spi0_d1]",</div><div class='ctx'> 		"P9_17 [spi0_cs0]",</div><div class='ctx'> 		"[mmc0_cd]",</div><div class='del'>-		"P8_42A [ecappwm0]",</div><div class='add'>+		"P9_42A [ecappwm0]",</div><div class='ctx'> 		"P8_35 [lcd d12]",</div><div class='ctx'> 		"P8_33 [lcd d13]",</div><div class='ctx'> 		"P8_31 [lcd d14]",</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-boneblue.dts b/arch/arm/boot/dts/ti/omap/am335x-boneblue.dts<br/>index 8878da773d67..f579df4c2c54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-boneblue.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-boneblue.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-boneblue.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-boneblue.dts</a></div><div class='hunk'>@@ -313,7 +313,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c0 {</div><div class='del'>-	baseboard_eeprom: baseboard_eeprom@50 {</div><div class='add'>+	baseboard_eeprom: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts b/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts<br/>new file mode 100644<br/>index 000000000000..d21118cdb6c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Bootlin</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "am33xx.dtsi"</div><div class='add'>+#include "am335x-bone-common.dtsi"</div><div class='add'>+#include "am335x-bonegreen-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Seeed Studio BeagleBone Green Eco";</div><div class='add'>+	compatible = "seeed,am335x-bone-green-eco", "ti,am33xx";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			cpu0-supply = &lt;&amp;buck1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys_5v: regulator-sys-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "sys_5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v3v3: regulator-v3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "v3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	interrupts-extended = &lt;&amp;intc 18&gt;;</div><div class='add'>+	interrupt-names = "mc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;baseboard_eeprom {</div><div class='add'>+	vcc-supply = &lt;&amp;v3v3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ pmic@24;</div><div class='add'>+</div><div class='add'>+	tps65214: pmic@30 {</div><div class='add'>+		compatible = "ti,tps65214";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		buck1-supply = &lt;&amp;sys_5v&gt;;</div><div class='add'>+		buck2-supply = &lt;&amp;sys_5v&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;sys_5v&gt;;</div><div class='add'>+		ldo1-supply = &lt;&amp;sys_5v&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;sys_5v&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;7&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: buck1 {</div><div class='add'>+				regulator-name = "vdd_mpu";</div><div class='add'>+				regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1298500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: buck2 {</div><div class='add'>+				regulator-name = "vdd_core";</div><div class='add'>+				regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3: buck3 {</div><div class='add'>+				regulator-name = "vdds_ddr";</div><div class='add'>+				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1_reg: ldo1 {</div><div class='add'>+				regulator-name = "vdd_1v8_1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: ldo2 {</div><div class='add'>+				regulator-name = "vdd_1v8_2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;dp83867_0&gt;;</div><div class='add'>+	ti,dual-emac-pvid = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac_sw {</div><div class='add'>+	pinctrl-0 = &lt;&amp;cpsw_b_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;cpsw_b_sleep&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;davinci_mdio_sw {</div><div class='add'>+	/delete-node/ ethernet-phy@0;</div><div class='add'>+</div><div class='add'>+	dp83867_0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_8_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+		ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;am33xx_pinmux {</div><div class='add'>+	cpsw_b_default: cpsw-b-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw_b_sleep: cpsw-b-sleep-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM33XX_IOPAD(AM335X_PIN_NNMI, PIN_INPUT_PULLUP | MUX_MODE0)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts b/arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts<br/>index 06767ea164b5..ece7f7854f6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-cm-t335.dts</a></div><div class='hunk'>@@ -483,8 +483,6 @@ status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		op-mode = &lt;0&gt;;          /* MCASP_IIS_MODE */</div><div class='ctx'> 		tdm-slots = &lt;2&gt;;</div><div class='del'>-		/* 16 serializers */</div><div class='del'>-		num-serializer = &lt;16&gt;;</div><div class='ctx'> 		serial-dir = &lt;  /* 0: INACTIVE, 1: TX, 2: RX */</div><div class='ctx'> 			0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0</div><div class='ctx'> 		&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-evm.dts b/arch/arm/boot/dts/ti/omap/am335x-evm.dts<br/>index 61bf8bcd4c4e..20222f82f21b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-evm.dts</a></div><div class='hunk'>@@ -388,7 +388,7 @@</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='del'>-</div><div class='add'>+	wakeup-source;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts b/arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts<br/>index fd91a3c01a63..06a352f98b22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-myirtech-myd.dts</a></div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sgtl5000: sgtl5000@a {</div><div class='ctx'> 		compatible = "fsl,sgtl5000";</div><div class='del'>-		reg =&lt;0xa&gt;;</div><div class='add'>+		reg = &lt;0xa&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clk12m&gt;;</div><div class='ctx'> 		micbias-resistor-k-ohms = &lt;4&gt;;</div><div class='ctx'> 		micbias-voltage-m-volts = &lt;2250&gt;;</div><div class='hunk'>@@ -155,7 +155,7 @@</div><div class='ctx'> </div><div class='ctx'> 	tda9988: tda9988@70 {</div><div class='ctx'> 		compatible = "nxp,tda998x";</div><div class='del'>-		reg =&lt;0x70&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='ctx'> 		audio-ports = &lt;TDA998x_I2S 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-nano.dts b/arch/arm/boot/dts/ti/omap/am335x-nano.dts<br/>index 56929059f5af..d51cdd6e1ab4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-nano.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-nano.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-nano.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-nano.dts</a></div><div class='hunk'>@@ -167,7 +167,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	rts-gpio = &lt;&amp;gpio0 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio0 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	rs485-rts-active-high;</div><div class='ctx'> 	rs485-rx-during-tx;</div><div class='ctx'> 	rs485-rts-delay = &lt;1 1&gt;;</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	rts-gpio = &lt;&amp;gpio2 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio2 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	rs485-rts-active-high;</div><div class='ctx'> 	rs485-rts-delay = &lt;1 1&gt;;</div><div class='ctx'> 	linux,rs485-enabled-at-boot-time;</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> &amp;uart3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart3_pins&gt;;</div><div class='del'>-	rts-gpio = &lt;&amp;gpio2 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio2 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	rs485-rts-active-high;</div><div class='ctx'> 	rs485-rx-during-tx;</div><div class='ctx'> 	rs485-rts-delay = &lt;1 1&gt;;</div><div class='hunk'>@@ -198,7 +198,7 @@</div><div class='ctx'> &amp;uart4 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart4_pins&gt;;</div><div class='del'>-	rts-gpio = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	rs485-rts-active-high;</div><div class='ctx'> 	rs485-rx-during-tx;</div><div class='ctx'> 	rs485-rts-delay = &lt;1 1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts b/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts<br/>index 17574d0d0525..c9ccb9de21ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-pdu001.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-pdu001.dts</a></div><div class='hunk'>@@ -256,8 +256,9 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	rts-gpio = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	rs485-rts-active-high;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='ctx'> 	rs485-rts-delay = &lt;0 0&gt;;</div><div class='ctx'> 	linux,rs485-enabled-at-boot-time;</div><div class='ctx'> </div><div class='hunk'>@@ -289,7 +290,7 @@</div><div class='ctx'> 		reg = &lt;0x2d&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	m2_eeprom: m2_eeprom@50 {</div><div class='add'>+	m2_eeprom: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -303,12 +304,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> </div><div class='del'>-	board_24aa025e48: board_24aa025e48@50 {</div><div class='add'>+	board_24aa025e48: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	backplane_24aa025e48: backplane_24aa025e48@53 {</div><div class='add'>+	backplane_24aa025e48: eeprom@53 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x53&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-shc.dts b/arch/arm/boot/dts/ti/omap/am335x-shc.dts<br/>index 9297cb1efcd4..597482822608 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-shc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-shc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-shc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-shc.dts</a></div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> 		reg = &lt;0x24&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am335x-sl50.dts b/arch/arm/boot/dts/ti/omap/am335x-sl50.dts<br/>index 757ebd96b3f0..f3524e5ee43e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-sl50.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am335x-sl50.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am335x-sl50.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am335x-sl50.dts</a></div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 		audio_mclk_fixed: oscillator@0 {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency  = &lt;24576000&gt;;	/* 24.576MHz */</div><div class='add'>+			clock-frequency = &lt;24576000&gt;;	/* 24.576MHz */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		audio_mclk: audio_mclk_gate@0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi<br/>index d6a143abae5f..18ad52e93955 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi</a></div><div class='hunk'>@@ -200,7 +200,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x9000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart0: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;72&gt;;</div><div class='hunk'>@@ -1108,7 +1108,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x22000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart1: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;73&gt;;</div><div class='hunk'>@@ -1139,7 +1139,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0x24000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart2: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;74&gt;;</div><div class='hunk'>@@ -1457,10 +1457,10 @@</div><div class='ctx'> </div><div class='ctx'> 			gpio1: gpio@0 {</div><div class='ctx'> 				compatible = "ti,omap4-gpio";</div><div class='del'>-				gpio-ranges =   &lt;&amp;am33xx_pinmux  0  0  8&gt;,</div><div class='del'>-						&lt;&amp;am33xx_pinmux  8 90  4&gt;,</div><div class='del'>-						&lt;&amp;am33xx_pinmux 12 12 16&gt;,</div><div class='del'>-						&lt;&amp;am33xx_pinmux 28 30  4&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;am33xx_pinmux  0  0  8&gt;,</div><div class='add'>+					      &lt;&amp;am33xx_pinmux  8 90  4&gt;,</div><div class='add'>+					      &lt;&amp;am33xx_pinmux 12 12 16&gt;,</div><div class='add'>+					      &lt;&amp;am33xx_pinmux 28 30  4&gt;;</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='hunk'>@@ -1770,7 +1770,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0xa6000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart3: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;44&gt;;</div><div class='hunk'>@@ -1799,7 +1799,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0xa8000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart4: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;45&gt;;</div><div class='hunk'>@@ -1828,7 +1828,7 @@</div><div class='ctx'> 			ranges = &lt;0x0 0xaa000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			uart5: serial@0 {</div><div class='del'>-				compatible = "ti,am3352-uart", "ti,omap3-uart";</div><div class='add'>+				compatible = "ti,am3352-uart";</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;46&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am33xx.dtsi b/arch/arm/boot/dts/ti/omap/am33xx.dtsi<br/>index 0614ffdc1578..43ec2a95f4bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am33xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am33xx.dtsi</a></div><div class='hunk'>@@ -461,10 +461,10 @@</div><div class='ctx'> </div><div class='ctx'> 			cppi41dma: dma-controller@2000 {</div><div class='ctx'> 				compatible = "ti,am3359-cppi41";</div><div class='del'>-				reg =  &lt;0x0000 0x1000&gt;,</div><div class='del'>-				       &lt;0x2000 0x1000&gt;,</div><div class='del'>-				       &lt;0x3000 0x1000&gt;,</div><div class='del'>-				       &lt;0x4000 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0000 0x1000&gt;,</div><div class='add'>+				      &lt;0x2000 0x1000&gt;,</div><div class='add'>+				      &lt;0x3000 0x1000&gt;,</div><div class='add'>+				      &lt;0x4000 0x4000&gt;;</div><div class='ctx'> 				reg-names = "glue", "controller", "scheduler", "queuemgr";</div><div class='ctx'> 				interrupts = &lt;17&gt;;</div><div class='ctx'> 				interrupt-names = "glue";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am3517-som.dtsi b/arch/arm/boot/dts/ti/omap/am3517-som.dtsi<br/>index bd0a6c95afa1..e36cd98f57fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am3517-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am3517-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am3517-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am3517-som.dtsi</a></div><div class='hunk'>@@ -44,7 +44,6 @@</div><div class='ctx'> </div><div class='ctx'> 	nand@0,0 {</div><div class='ctx'> 		compatible = "ti,omap2-nand";</div><div class='del'>-		linux,mtd-name = "micron,mt29f4g16abchch";</div><div class='ctx'> 		reg = &lt;0 0 4&gt;; /* CS0, offset 0, IO size 4 */</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am3874-iceboard.dts b/arch/arm/boot/dts/ti/omap/am3874-iceboard.dts<br/>index ac082e83a9a2..bbb9200a1f26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am3874-iceboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am3874-iceboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am3874-iceboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am3874-iceboard.dts</a></div><div class='hunk'>@@ -249,8 +249,8 @@</div><div class='ctx'> 			tmp100@4c { compatible = "ti,tmp100"; reg = &lt;0x4c&gt;; };</div><div class='ctx'> </div><div class='ctx'> 			/* EEPROM bank and serial number are treated as separate devices */</div><div class='del'>-			at24c01@57 { compatible = "atmel,24c01"; reg = &lt;0x57&gt;; };</div><div class='del'>-			at24cs01@5f { compatible = "atmel,24cs01"; reg = &lt;0x5f&gt;; };</div><div class='add'>+			eeprom@57 { compatible = "atmel,24c01"; reg = &lt;0x57&gt;; };</div><div class='add'>+			eeprom@5f { compatible = "atmel,24cs01"; reg = &lt;0x5f&gt;; };</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -270,8 +270,8 @@</div><div class='ctx'> 			multi-master;</div><div class='ctx'> </div><div class='ctx'> 			/* All backplanes should have this -- it's how we know they're there. */</div><div class='del'>-			at24c08@54 { compatible="atmel,24c08"; reg=&lt;0x54&gt;; };</div><div class='del'>-			at24cs08@5c { compatible="atmel,24cs08"; reg=&lt;0x5c&gt;; };</div><div class='add'>+			eeprom@54 { compatible="atmel,24c08"; reg=&lt;0x54&gt;; };</div><div class='add'>+			eeprom@5c { compatible="atmel,24cs08"; reg=&lt;0x5c&gt;; };</div><div class='ctx'> </div><div class='ctx'> 			/* 16 slot backplane */</div><div class='ctx'> 			tmp421@4d { compatible="ti,tmp421"; reg=&lt;0x4d&gt;; };</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts b/arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts<br/>index 172516a7667e..e06fc30091c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts</a></div><div class='hunk'>@@ -254,7 +254,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	eeprom_module: at24@50 {</div><div class='add'>+	eeprom_module: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts<br/>index 00682ce7e14c..826f687c368a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts</a></div><div class='hunk'>@@ -333,7 +333,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;i2c0_pins_sleep&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		pagesize = &lt;64&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi b/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi<br/>index 824b9415ebbe..fd4634f8c629 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-l4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-l4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am437x-l4.dtsi</a></div><div class='hunk'>@@ -180,8 +180,7 @@</div><div class='ctx'> 			      &lt;0x9058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='hunk'>@@ -698,8 +697,7 @@</div><div class='ctx'> 			      &lt;0x22058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='hunk'>@@ -726,8 +724,7 @@</div><div class='ctx'> 			      &lt;0x24058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='hunk'>@@ -1385,8 +1382,7 @@</div><div class='ctx'> 			      &lt;0xa6058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='hunk'>@@ -1413,8 +1409,7 @@</div><div class='ctx'> 			      &lt;0xa8058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='hunk'>@@ -1441,8 +1436,7 @@</div><div class='ctx'> 			      &lt;0xaa058 0x4&gt;;</div><div class='ctx'> 			reg-names = "rev", "sysc", "syss";</div><div class='ctx'> 			ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='del'>-					 SYSC_OMAP2_SOFTRESET |</div><div class='del'>-					 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+					 SYSC_OMAP2_SOFTRESET)&gt;;</div><div class='ctx'> 			ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_NO&gt;,</div><div class='ctx'> 					&lt;SYSC_IDLE_SMART&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts b/arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts<br/>index 5ec57dcb0659..73badf80b4ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts</a></div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	eeprom_base: at24@50 {</div><div class='add'>+	eeprom_base: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts b/arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts<br/>index 9c97006ffd5b..4700f9879d2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts</a></div><div class='hunk'>@@ -570,7 +570,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		pagesize = &lt;64&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts b/arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts<br/>index 9193a4cfba78..4ac94be8d000 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts</a></div><div class='hunk'>@@ -651,7 +651,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c256";</div><div class='ctx'> 		pagesize = &lt;64&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi<br/>index 994e69ab38d7..87b61a98d5e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am57xx-beagle-x15-common.dtsi</a></div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 	gpio_fan: gpio_fan {</div><div class='ctx'> 		/* Based on 5v 500mA AFB02505HHB */</div><div class='ctx'> 		compatible = "gpio-fan";</div><div class='del'>-		gpios =  &lt;&amp;tps659038_gpio 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios = &lt;&amp;tps659038_gpio 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		gpio-fan,speed-map = &lt;0     0&gt;,</div><div class='ctx'> 				     &lt;13000 1&gt;;</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts<br/>index d6e3152b02f7..3dd898955e76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts</a></div><div class='hunk'>@@ -429,7 +429,7 @@</div><div class='ctx'> 		reg = &lt;0x56&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	eeprom_module: atmel@50 {</div><div class='add'>+	eeprom_module: eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c08";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts b/arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts<br/>index 64675f4edb60..41bef36c5554 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c5_pins_default&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	eeprom_base: atmel@54 {</div><div class='add'>+	eeprom_base: eeprom@54 {</div><div class='ctx'> 		compatible = "atmel,24c08";</div><div class='ctx'> 		reg = &lt;0x54&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dm8148-evm.dts b/arch/arm/boot/dts/ti/omap/dm8148-evm.dts<br/>index ae8d9fa09d16..57a9eef09f6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm8148-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm8148-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm8148-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dm8148-evm.dts</a></div><div class='hunk'>@@ -51,7 +51,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;; /* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f2g16aadwp";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dm814x.dtsi b/arch/arm/boot/dts/ti/omap/dm814x.dtsi<br/>index a8cd724ce4bc..27d1f35a31fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm814x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm814x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm814x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dm814x.dtsi</a></div><div class='hunk'>@@ -155,10 +155,10 @@</div><div class='ctx'> </div><div class='ctx'> 			cppi41dma: dma-controller@47402000 {</div><div class='ctx'> 				compatible = "ti,am3359-cppi41";</div><div class='del'>-				reg =  &lt;0x47400000 0x1000</div><div class='del'>-					0x47402000 0x1000</div><div class='del'>-					0x47403000 0x1000</div><div class='del'>-					0x47404000 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x47400000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47402000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47403000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47404000 0x4000&gt;;</div><div class='ctx'> 				reg-names = "glue", "controller", "scheduler", "queuemgr";</div><div class='ctx'> 				interrupts = &lt;17&gt;;</div><div class='ctx'> 				interrupt-names = "glue";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dm8168-evm.dts b/arch/arm/boot/dts/ti/omap/dm8168-evm.dts<br/>index 1d80288f6ba5..6130b9a5f660 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm8168-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm8168-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm8168-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dm8168-evm.dts</a></div><div class='hunk'>@@ -119,7 +119,6 @@</div><div class='ctx'> </div><div class='ctx'> 	nand@0,0 {</div><div class='ctx'> 		compatible = "ti,omap2-nand";</div><div class='del'>-		linux,mtd-name = "micron,mt29f2g16aadwp";</div><div class='ctx'> 		reg = &lt;0 0 4&gt;; /* CS0, offset 0, IO size 4 */</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dm816x.dtsi b/arch/arm/boot/dts/ti/omap/dm816x.dtsi<br/>index b68686f0643b..407d7bc5b13a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm816x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dm816x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dm816x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dm816x.dtsi</a></div><div class='hunk'>@@ -643,10 +643,10 @@</div><div class='ctx'> </div><div class='ctx'> 			cppi41dma: dma-controller@47402000 {</div><div class='ctx'> 				compatible = "ti,am3359-cppi41";</div><div class='del'>-				reg =  &lt;0x47400000 0x1000</div><div class='del'>-					0x47402000 0x1000</div><div class='del'>-					0x47403000 0x1000</div><div class='del'>-					0x47404000 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x47400000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47402000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47403000 0x1000&gt;,</div><div class='add'>+				      &lt;0x47404000 0x4000&gt;;</div><div class='ctx'> 				reg-names = "glue", "controller", "scheduler", "queuemgr";</div><div class='ctx'> 				interrupts = &lt;17&gt;;</div><div class='ctx'> 				interrupt-names = "glue";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts b/arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts<br/>index 2f6ac267fc15..df05a0682322 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts</a></div><div class='hunk'>@@ -51,7 +51,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;; /* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f2g16aadwp";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi<br/>index 6e67d99832ac..c9282f57ffa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7-l4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dra7-l4.dtsi</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> 	ranges = &lt;0x00000000 0x4a000000 0x100000&gt;,	/* segment 0 */</div><div class='ctx'> 		 &lt;0x00100000 0x4a100000 0x100000&gt;,	/* segment 1 */</div><div class='ctx'> 		 &lt;0x00200000 0x4a200000 0x100000&gt;;	/* segment 2 */</div><div class='add'>+	dma-ranges;</div><div class='ctx'> </div><div class='ctx'> 	segment@0 {					/* 0x4a000000 */</div><div class='ctx'> 		compatible = "simple-pm-bus";</div><div class='hunk'>@@ -266,8 +267,8 @@</div><div class='ctx'> 					syscon-phy-power = &lt;&amp;scm_conf 0x300&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;usb_phy1_always_on_clk32k&gt;,</div><div class='ctx'> 						 &lt;&amp;l3init_clkctrl DRA7_L3INIT_USB_OTG_SS1_CLKCTRL 8&gt;;</div><div class='del'>-					clock-names =	"wkupclk",</div><div class='del'>-							"refclk";</div><div class='add'>+					clock-names = "wkupclk",</div><div class='add'>+						      "refclk";</div><div class='ctx'> 					#phy-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -278,8 +279,8 @@</div><div class='ctx'> 					syscon-phy-power = &lt;&amp;scm_conf 0xe74&gt;;</div><div class='ctx'> 					clocks = &lt;&amp;usb_phy2_always_on_clk32k&gt;,</div><div class='ctx'> 						 &lt;&amp;l3init_clkctrl DRA7_L3INIT_USB_OTG_SS2_CLKCTRL 8&gt;;</div><div class='del'>-					clock-names =	"wkupclk",</div><div class='del'>-							"refclk";</div><div class='add'>+					clock-names = "wkupclk",</div><div class='add'>+						      "refclk";</div><div class='ctx'> 					#phy-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -293,9 +294,9 @@</div><div class='ctx'> 					clocks = &lt;&amp;usb_phy3_always_on_clk32k&gt;,</div><div class='ctx'> 						 &lt;&amp;sys_clkin1&gt;,</div><div class='ctx'> 						 &lt;&amp;l3init_clkctrl DRA7_L3INIT_USB_OTG_SS1_CLKCTRL 8&gt;;</div><div class='del'>-					clock-names =	"wkupclk",</div><div class='del'>-							"sysclk",</div><div class='del'>-							"refclk";</div><div class='add'>+					clock-names = "wkupclk",</div><div class='add'>+						      "sysclk",</div><div class='add'>+						      "refclk";</div><div class='ctx'> 					#phy-cells = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -557,6 +558,7 @@</div><div class='ctx'> 			 &lt;0x0007e000 0x0017e000 0x001000&gt;,	/* ap 124 */</div><div class='ctx'> 			 &lt;0x00059000 0x00159000 0x001000&gt;,	/* ap 125 */</div><div class='ctx'> 			 &lt;0x0005a000 0x0015a000 0x001000&gt;;	/* ap 126 */</div><div class='add'>+		dma-ranges;</div><div class='ctx'> </div><div class='ctx'> 		target-module@2000 {			/* 0x4a102000, ap 27 3c.0 */</div><div class='ctx'> 			compatible = "ti,sysc";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi<br/>index 164fa88c459e..711ce4c31bb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dra7.dtsi</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/dra7.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/dra.h&gt;</div><div class='del'>-#include &lt;dt-bindings/clock/dra7.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MAX_SOURCES 400</div><div class='ctx'> </div><div class='hunk'>@@ -196,24 +195,22 @@</div><div class='ctx'> 			clock-names = "fck", "phy-clk", "phy-clk-div";</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0x51000000 0x51000000 0x3000&gt;,</div><div class='del'>-				 &lt;0x20000000 0x20000000 0x10000000&gt;;</div><div class='add'>+			ranges = &lt;0x51000000 0x51000000 0x3000</div><div class='add'>+				  0x0	     0x20000000 0x10000000&gt;;</div><div class='ctx'> 			dma-ranges;</div><div class='ctx'> 			/**</div><div class='ctx'> 			 * To enable PCI endpoint mode, disable the pcie1_rc</div><div class='ctx'> 			 * node and enable pcie1_ep mode.</div><div class='ctx'> 			 */</div><div class='ctx'> 			pcie1_rc: pcie@51000000 {</div><div class='del'>-				reg = &lt;0x51000000 0x2000&gt;,</div><div class='del'>-				      &lt;0x51002000 0x14c&gt;,</div><div class='del'>-				      &lt;0x20001000 0x2000&gt;;</div><div class='add'>+				reg = &lt;0x51000000 0x2000&gt;, &lt;0x51002000 0x14c&gt;, &lt;0x1000 0x2000&gt;;</div><div class='ctx'> 				reg-names = "rc_dbics", "ti_conf", "config";</div><div class='ctx'> 				interrupts = &lt;0 232 0x4&gt;, &lt;0 233 0x4&gt;;</div><div class='ctx'> 				#address-cells = &lt;3&gt;;</div><div class='ctx'> 				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				device_type = "pci";</div><div class='del'>-				ranges = &lt;0x81000000 0 0x00000000 0x20003000 0 0x00010000&gt;,</div><div class='del'>-					 &lt;0x82000000 0 0x20013000 0x20013000 0 0x0ffed000&gt;;</div><div class='add'>+				ranges = &lt;0x81000000 0 0          0x03000 0 0x00010000</div><div class='add'>+					  0x82000000 0 0x20013000 0x13000 0 0xffed000&gt;;</div><div class='ctx'> 				bus-range = &lt;0x00 0xff&gt;;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				num-lanes = &lt;1&gt;;</div><div class='hunk'>@@ -236,10 +233,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pcie1_ep: pcie_ep@51000000 {</div><div class='del'>-				reg = &lt;0x51000000 0x28&gt;,</div><div class='del'>-				      &lt;0x51002000 0x14c&gt;,</div><div class='del'>-				      &lt;0x51001000 0x28&gt;,</div><div class='del'>-				      &lt;0x20001000 0x10000000&gt;;</div><div class='add'>+				reg = &lt;0x51000000 0x28&gt;, &lt;0x51002000 0x14c&gt;, &lt;0x51001000 0x28&gt;, &lt;0x1000 0x10000000&gt;;</div><div class='ctx'> 				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";</div><div class='ctx'> 				interrupts = &lt;0 232 0x4&gt;;</div><div class='ctx'> 				num-lanes = &lt;1&gt;;</div><div class='hunk'>@@ -270,21 +264,19 @@</div><div class='ctx'> 			reset-names = "rstctrl";</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0x51800000 0x51800000 0x3000&gt;,</div><div class='del'>-				 &lt;0x30000000 0x30000000 0x10000000&gt;;</div><div class='add'>+			ranges = &lt;0x51800000 0x51800000 0x3000</div><div class='add'>+				  0x0	     0x30000000 0x10000000&gt;;</div><div class='ctx'> 			dma-ranges;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			pcie2_rc: pcie@51800000 {</div><div class='del'>-				reg = &lt;0x51800000 0x2000&gt;,</div><div class='del'>-				      &lt;0x51802000 0x14c&gt;,</div><div class='del'>-				      &lt;0x30001000 0x2000&gt;;</div><div class='add'>+				reg = &lt;0x51800000 0x2000&gt;, &lt;0x51802000 0x14c&gt;, &lt;0x1000 0x2000&gt;;</div><div class='ctx'> 				reg-names = "rc_dbics", "ti_conf", "config";</div><div class='ctx'> 				interrupts = &lt;0 355 0x4&gt;, &lt;0 356 0x4&gt;;</div><div class='ctx'> 				#address-cells = &lt;3&gt;;</div><div class='ctx'> 				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				device_type = "pci";</div><div class='del'>-				ranges = &lt;0x81000000 0 0x00000000 0x30003000 0 0x00010000&gt;,</div><div class='del'>-					 &lt;0x82000000 0 0x30013000 0x30013000 0 0x0ffed000&gt;;</div><div class='add'>+				ranges = &lt;0x81000000 0 0          0x03000 0 0x00010000</div><div class='add'>+					  0x82000000 0 0x30013000 0x13000 0 0xffed000&gt;;</div><div class='ctx'> 				bus-range = &lt;0x00 0xff&gt;;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				num-lanes = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra71-evm.dts b/arch/arm/boot/dts/ti/omap/dra71-evm.dts<br/>index f747ac56eb92..1d2df8128cfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra71-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra71-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra71-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dra71-evm.dts</a></div><div class='hunk'>@@ -83,10 +83,10 @@</div><div class='ctx'> 		compatible = "ti,lp8733";</div><div class='ctx'> 		reg = &lt;0x60&gt;;</div><div class='ctx'> </div><div class='del'>-		buck0-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		buck1-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo0-in-supply =&lt;&amp;evm_5v0&gt;;</div><div class='del'>-		ldo1-in-supply =&lt;&amp;evm_5v0&gt;;</div><div class='add'>+		buck0-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck1-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo0-in-supply = &lt;&amp;evm_5v0&gt;;</div><div class='add'>+		ldo1-in-supply = &lt;&amp;evm_5v0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		lp8733_regulators: regulators {</div><div class='ctx'> 			lp8733_buck0_reg: buck0 {</div><div class='hunk'>@@ -131,10 +131,10 @@</div><div class='ctx'> 		compatible = "ti,lp8732";</div><div class='ctx'> 		reg = &lt;0x61&gt;;</div><div class='ctx'> </div><div class='del'>-		buck0-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		buck1-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo0-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo1-in-supply =&lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck0-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck1-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo0-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo1-in-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='ctx'> </div><div class='ctx'> 		lp8732_regulators: regulators {</div><div class='ctx'> 			lp8732_buck0_reg: buck0 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi b/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi<br/>index 04f08b8c64d2..0de16ee262cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi</a></div><div class='hunk'>@@ -1376,7 +1376,6 @@</div><div class='ctx'> 		clocks = &lt;&amp;apll_pcie_ck&gt;;</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x021c&gt;;</div><div class='del'>-		ti,dividers = &lt;2&gt;, &lt;1&gt;;</div><div class='ctx'> 		ti,bit-shift = &lt;8&gt;;</div><div class='ctx'> 		ti,max-div = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi b/arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi<br/>index c0e6b73fa472..d51a436d9774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi</a></div><div class='hunk'>@@ -51,7 +51,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f4g16abbda3w";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='ctx'> 		rb-gpios = &lt;&amp;gpmc 0 GPIO_ACTIVE_HIGH&gt;; /* gpmc_wait0 */</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi<br/>index 227699890890..0b65ac5b4230 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi</a></div><div class='hunk'>@@ -49,7 +49,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f4g16abbda3w";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='ctx'> 		rb-gpios = &lt;&amp;gpmc 0 GPIO_ACTIVE_HIGH&gt;; /* gpmc_wait0 */</div><div class='hunk'>@@ -103,7 +102,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		readonly;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi<br/>index 950a29f9b4a0..cd13826d033d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi</a></div><div class='hunk'>@@ -190,7 +190,7 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi b/arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi<br/>index 07d5894ebb74..910e3b54f530 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-common.dtsi</a></div><div class='hunk'>@@ -275,8 +275,8 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet@6,0 {</div><div class='ctx'> 		compatible = "davicom,dm9000";</div><div class='del'>-		reg =  &lt;6 0x000 2&gt;,</div><div class='del'>-		       &lt;6 0x400 2&gt;; /* CS6, offset 0 and 0x400, IO size 2 */</div><div class='add'>+		reg = &lt;6 0x000 2&gt;,</div><div class='add'>+		      &lt;6 0x400 2&gt;; /* CS6, offset 0 and 0x400, IO size 2 */</div><div class='ctx'> 		bank-width = &lt;2&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'> 		interrupts = &lt;25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi b/arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi<br/>index a7f99ae0c1fe..78c657429f64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-devkit8000-lcd-common.dtsi</a></div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		ti,debounce-max = /bits/ 16 &lt;10&gt;;</div><div class='ctx'> 		ti,debounce-tol = /bits/ 16 &lt;5&gt;;</div><div class='ctx'> 		ti,debounce-rep = /bits/ 16 &lt;1&gt;;</div><div class='del'>-		ti,keep-vref-on = &lt;1&gt;;</div><div class='add'>+		ti,keep-vref-on;</div><div class='ctx'> 		ti,settle-delay-usec = /bits/ 16 &lt;150&gt;;</div><div class='ctx'> </div><div class='ctx'> 		wakeup-source;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts b/arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts<br/>index e0346bf842fc..9c60ac853a40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts</a></div><div class='hunk'>@@ -60,7 +60,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "hynix,h8kds0un0mer-4em";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		gpmc,device-width = &lt;2&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi b/arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi<br/>index e27837093e43..70e33cdd519a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-evm-processor-common.dtsi</a></div><div class='hunk'>@@ -205,7 +205,7 @@</div><div class='ctx'> </div><div class='ctx'> /* T2_GPIO_2 low to route GPIO_61 to on-board devices */</div><div class='ctx'> &amp;twl_gpio {</div><div class='del'>-	en_on_board_gpio_61 {</div><div class='add'>+	en-on-board-gpio-61-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-evm.dts b/arch/arm/boot/dts/ti/omap/omap3-evm.dts<br/>index a2a1613c45c3..28caa5d93b87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-evm.dts</a></div><div class='hunk'>@@ -60,7 +60,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f2g16abdhc";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		gpmc,device-width = &lt;2&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi b/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi<br/>index 3661340009e7..1b18ed8c1f7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi</a></div><div class='hunk'>@@ -446,6 +446,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;</div><div class='ctx'> 			&amp;hsusb2_2_pins</div><div class='add'>+			&amp;mcspi3hog_pins</div><div class='ctx'> 	&gt;;</div><div class='ctx'> </div><div class='ctx'> 	hsusb2_2_pins: hsusb2-2-pins {</div><div class='hunk'>@@ -459,6 +460,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mcspi3hog_pins: mcspi3hog-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25dc, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* etk_d0 */</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* etk_d1 */</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* etk_d2 */</div><div class='add'>+			OMAP3630_CORE2_IOPAD(0x25e2, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* etk_d3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	spi_gpio_pins: spi-gpio-pinmux-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */</div><div class='hunk'>@@ -591,8 +601,10 @@</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;; /* GPIO_160 */</div><div class='ctx'> 		gpios = &lt;&amp;gpio6 0 GPIO_ACTIVE_LOW&gt;;	/* GPIO_160 */</div><div class='ctx'> 		ti,x-plate-ohms = &lt;600&gt;;</div><div class='del'>-		touchscreen-size-x = &lt;480&gt;;</div><div class='del'>-		touchscreen-size-y = &lt;640&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;0xf00&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;0xf00&gt;;</div><div class='add'>+		touchscreen-min-x = &lt;0x100&gt;;</div><div class='add'>+		touchscreen-min-y = &lt;0x100&gt;;</div><div class='ctx'> 		touchscreen-max-pressure = &lt;1000&gt;;</div><div class='ctx'> 		touchscreen-fuzz-x = &lt;3&gt;;</div><div class='ctx'> 		touchscreen-fuzz-y = &lt;8&gt;;</div><div class='hunk'>@@ -601,7 +613,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* RFID EEPROM */</div><div class='del'>-	m24lr64@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts b/arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts<br/>index 8bd6b4b1f30b..d3a81f0b880f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts</a></div><div class='hunk'>@@ -114,6 +114,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart1 {</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "ti,wl1837-st";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_pins&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_HIGH&gt;;	/* GPIO_137 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	/delete-node/ bmp085@77;</div><div class='ctx'> 	/delete-node/ bma180@41;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-igep.dtsi b/arch/arm/boot/dts/ti/omap/omap3-igep.dtsi<br/>index e068ecf86b8f..7346cad84eda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-igep.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-igep.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-igep.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-igep.dtsi</a></div><div class='hunk'>@@ -111,7 +111,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29c4g96maz";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		gpmc,device-width = &lt;2&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-ldp.dts b/arch/arm/boot/dts/ti/omap/omap3-ldp.dts<br/>index bb6fab9fa47d..cf325f56b464 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-ldp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-ldp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-ldp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-ldp.dts</a></div><div class='hunk'>@@ -103,7 +103,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,nand";</div><div class='ctx'> 		nand-bus-width = &lt;16&gt;;</div><div class='ctx'> 		gpmc,device-width = &lt;2&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "bch8";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-n900.dts b/arch/arm/boot/dts/ti/omap/omap3-n900.dts<br/>index 4bde3342bb95..c50ca572d1b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-n900.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-n900.dts</a></div><div class='hunk'>@@ -816,8 +816,6 @@</div><div class='ctx'> 		reg = &lt;0x0c&gt;;</div><div class='ctx'> </div><div class='ctx'> 		VANA-supply = &lt;&amp;vaux4&gt;;</div><div class='del'>-</div><div class='del'>-		#io-channel-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi b/arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi<br/>index cc57626ea607..2793821b2c33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi</a></div><div class='hunk'>@@ -222,7 +222,6 @@</div><div class='ctx'> </div><div class='ctx'> 	nand@0,0 {</div><div class='ctx'> 		compatible = "ti,omap2-nand";</div><div class='del'>-		linux,mtd-name = "micron,mt29c4g96maz";</div><div class='ctx'> 		reg = &lt;0 0 4&gt;;	/* CS0, offset 0, IO size 4 */</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi b/arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi<br/>index 6730c749d5ea..da80d7b7d4b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi</a></div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts b/arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts<br/>index 07bec48dc441..959fdeeb769e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3-sbc-t3517.dts</a></div><div class='hunk'>@@ -57,8 +57,8 @@</div><div class='ctx'> 		&amp;mmc1_aux_pins</div><div class='ctx'> 	&gt;;</div><div class='ctx'> </div><div class='del'>-	wp-gpios =  &lt;&amp;gpio2 27 GPIO_ACTIVE_HIGH&gt;; /* gpio_59  */</div><div class='del'>-	cd-gpios =  &lt;&amp;gpio5 16 GPIO_ACTIVE_HIGH&gt;; /* gpio_144 */</div><div class='add'>+	wp-gpios = &lt;&amp;gpio2 27 GPIO_ACTIVE_HIGH&gt;; /* gpio_59  */</div><div class='add'>+	cd-gpios = &lt;&amp;gpio5 16 GPIO_ACTIVE_HIGH&gt;; /* gpio_144 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dss {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3.dtsi b/arch/arm/boot/dts/ti/omap/omap3.dtsi<br/>index 92cd4c99dae7..817474ee2d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3.dtsi</a></div><div class='hunk'>@@ -862,14 +862,14 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			usbhsohci: ohci@48064400 {</div><div class='add'>+			usbhsohci: usb@48064400 {</div><div class='ctx'> 				compatible = "ti,ohci-omap3";</div><div class='ctx'> 				reg = &lt;0x48064400 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;76&gt;;</div><div class='ctx'> 				remote-wakeup-connected;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			usbhsehci: ehci@48064800 {</div><div class='add'>+			usbhsehci: usb@48064800 {</div><div class='ctx'> 				compatible = "ti,ehci-omap";</div><div class='ctx'> 				reg = &lt;0x48064800 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;77&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap3430-sdp.dts b/arch/arm/boot/dts/ti/omap/omap3430-sdp.dts<br/>index 258ecd9e4519..cc5e9035ef73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3430-sdp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap3430-sdp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap3430-sdp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap3430-sdp.dts</a></div><div class='hunk'>@@ -105,7 +105,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpmc&gt;;</div><div class='ctx'> 		interrupts = &lt;0 IRQ_TYPE_NONE&gt;, /* fifoevent */</div><div class='ctx'> 			     &lt;1 IRQ_TYPE_NONE&gt;;	/* termcount */</div><div class='del'>-		linux,mtd-name = "micron,mt29f1g08abb";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,nand-ecc-opt = "sw";</div><div class='hunk'>@@ -148,7 +147,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	onenand@2,0 {</div><div class='del'>-		linux,mtd-name = "samsung,kfm2g16q2m-deb8";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "ti,omap2-onenand";</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap36xx.dtsi b/arch/arm/boot/dts/ti/omap/omap36xx.dtsi<br/>index c3d79ecd56e3..c217094b50ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap36xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap36xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap36xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap36xx.dtsi</a></div><div class='hunk'>@@ -72,6 +72,7 @@</div><div class='ctx'> 					 &lt;1375000 1375000 1375000&gt;;</div><div class='ctx'> 			/* only on am/dm37x with speed-binned bit set */</div><div class='ctx'> 			opp-supported-hw = &lt;0xffffffff 2&gt;;</div><div class='add'>+			turbo-mode;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts<br/>index 339e52ba3614..c90f43cc2fae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts</a></div><div class='hunk'>@@ -17,16 +17,34 @@</div><div class='ctx'> 		reg = &lt;0x80000000 0x40000000&gt;; /* 1024M */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;2720000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4200000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		constant-charge-voltage-max-microvolt = &lt;4200000&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * vendor kernel says max charge 1400000, input limit 900000</div><div class='add'>+		 * and charges only with dcp chargers. So it is unclear what</div><div class='add'>+		 * is really allowed. Play safe for now and restrict things</div><div class='add'>+		 * here. Maybe 900000 is just the limit of the vendor charger?</div><div class='add'>+		 */</div><div class='add'>+		constant-charge-current-max-microamp = &lt;900000&gt;;</div><div class='add'>+		charge-term-current-microamp = &lt;200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight-left {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;twl_pwm 1 7812500&gt;;</div><div class='del'>-		power-supply = &lt;&amp;unknown_supply&gt;;</div><div class='add'>+		power-supply = &lt;&amp;lb_v50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight-right {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;twl_pwm 0 7812500&gt;;</div><div class='del'>-		power-supply = &lt;&amp;unknown_supply&gt;;</div><div class='add'>+		power-supply = &lt;&amp;lb_v50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -46,9 +64,53 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	unknown_supply: unknown-supply {</div><div class='add'>+	cb_v18: regulator-cb-v18 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cb_v18_pins&gt;;</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cb_v18";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cb_v33: regulator-cb-v33 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cb_v33_pins&gt;;</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cb_v33";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio6 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator-cb-v50 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cb_v50_pins&gt;;</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cb_v50";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio6 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lb_v50: regulator-lb-v50 {</div><div class='add'>+		/* required for many things at the head (probably indirectly) */</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lb_v50_pins&gt;;</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "unknown";</div><div class='add'>+		regulator-name = "lb_v50";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpio1 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wl12xx_pwrseq: wl12xx-pwrseq {</div><div class='hunk'>@@ -71,6 +133,73 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gpio1_hog_pins &amp;gpio1wk_hog_pins&gt;;</div><div class='add'>+</div><div class='add'>+	lb-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "lb_reset";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	power-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "power_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Name taken from vendor kernel but no evidence of actual usage found</div><div class='add'>+	 * nor what it really controls.</div><div class='add'>+	 */</div><div class='add'>+	panel-power-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "panel_power_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * These two are exported to sysfs in vendor kernel, usage unknown,</div><div class='add'>+	 * backlight state seems unrelated to these.</div><div class='add'>+	 */</div><div class='add'>+	blc-r-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "blc_r";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blc-l-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "blc_l";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	high-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;15 GPIO_ACTIVE_HIGH /* maybe dsi to dpi chip reset? */</div><div class='add'>+			 21 GPIO_ACTIVE_HIGH</div><div class='add'>+			 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "unknown-high";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	low-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;18 GPIO_ACTIVE_HIGH</div><div class='add'>+			 19 GPIO_ACTIVE_HIGH</div><div class='add'>+			 20 GPIO_ACTIVE_HIGH</div><div class='add'>+			 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "unknown-low";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='hunk'>@@ -87,6 +216,14 @@</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> </div><div class='add'>+		charger {</div><div class='add'>+			compatible = "ti,twl6032-charger", "ti,twl6030-charger";</div><div class='add'>+			interrupts = &lt;2&gt;, &lt;5&gt;;</div><div class='add'>+			io-channels = &lt;&amp;gpadc 10&gt;;</div><div class='add'>+			io-channel-names = "vusb";</div><div class='add'>+			monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc {</div><div class='ctx'> 			compatible = "ti,twl4030-rtc";</div><div class='ctx'> 			interrupts = &lt;11&gt;;</div><div class='hunk'>@@ -166,7 +303,7 @@</div><div class='ctx'> 			#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpadc {</div><div class='add'>+		gpadc: gpadc {</div><div class='ctx'> 			compatible = "ti,twl6032-gpadc";</div><div class='ctx'> 			interrupts = &lt;3&gt;;</div><div class='ctx'> 			#io-channel-cells = &lt;1&gt;;</div><div class='hunk'>@@ -188,6 +325,19 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;200000&gt;;</div><div class='ctx'> </div><div class='add'>+	/* is sometimes not available, research needed */</div><div class='add'>+	gpio_head: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * camera chip at 0x3c, available if &lt;&amp;gpio_head 1&gt; high</div><div class='add'>+	 * and &lt;&amp;gpio_head 5&gt; low</div><div class='add'>+	 */</div><div class='add'>+</div><div class='ctx'> 	/* at head/glasses */</div><div class='ctx'> 	mpu9150h: imu@68 {</div><div class='ctx'> 		compatible = "invensense,mpu9150";</div><div class='hunk'>@@ -259,6 +409,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;mpu9150_pins&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='ctx'> 		interrupt = &lt;7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;cb_v18&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;cb_v33&gt;;</div><div class='ctx'> 		invensense,level-shifter;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -336,12 +488,46 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cb_v18_pins: pinmux-cb-v18-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE3) /* gpio28 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cb_v33_pins: pinmux-cb-v33-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE3) /* gpio190 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cb_v50_pins: pinmux-cb-v50-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE3) /* gpio191 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio_keys_pins: pinmux-gpio-key-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			OMAP4_IOPAD(0x56, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio35 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio1_hog_pins: pinmux-gpio1-hog-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE3) /* gpio14 */</div><div class='add'>+			OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE3) /* gpio16 */</div><div class='add'>+			OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE3) /* gpio17 */</div><div class='add'>+</div><div class='add'>+			OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE3) /* gpio15 */</div><div class='add'>+			OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE3) /* gpio18 */</div><div class='add'>+			OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE3) /* gpio19 */</div><div class='add'>+			OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE3) /* gpio20 */</div><div class='add'>+			OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE3) /* gpio21 */</div><div class='add'>+			OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE3) /* gpio22 */</div><div class='add'>+			OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE3) /* gpio26 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c1_pins: pinmux-i2c1-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			   OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */</div><div class='hunk'>@@ -387,6 +573,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	lb_v50_pins: pinmux-lb-v50-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE3) /* gpio27 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mcbsp2_pins: pinmux-mcbsp2-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)       /* abe_mcbsp2_clkx */</div><div class='hunk'>@@ -457,6 +649,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;omap4_pmx_wkup {</div><div class='add'>+	gpio1wk_hog_pins: pinmux-gpio1wk-hog-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpio9 */</div><div class='add'>+			OMAP4_IOPAD(0x6a, PIN_INPUT | MUX_MODE3) /* gpio10 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart2_pins &amp;bt_pins&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-kc1.dts b/arch/arm/boot/dts/ti/omap/omap4-kc1.dts<br/>index c6b79ba8bbc9..df874d5f5327 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-kc1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-kc1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-kc1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-kc1.dts</a></div><div class='hunk'>@@ -112,11 +112,7 @@</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='ctx'> 		/* IRQ# = 7 */</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;; /* IRQ_SYS_1N cascaded to gic */</div><div class='del'>-</div><div class='del'>-		twl_power: power {</div><div class='del'>-			compatible = "ti,twl6030-power";</div><div class='del'>-			ti,system-power-controller;</div><div class='del'>-		};</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi b/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi<br/>index 3fcef3080eae..4ee53dfb71b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-l4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-l4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-l4.dtsi</a></div><div class='hunk'>@@ -302,14 +302,14 @@</div><div class='ctx'> 					      "refclk_60m_ext_p1",</div><div class='ctx'> 					      "refclk_60m_ext_p2";</div><div class='ctx'> </div><div class='del'>-				usbhsohci: ohci@800 {</div><div class='add'>+				usbhsohci: usb@800 {</div><div class='ctx'> 					compatible = "ti,ohci-omap3";</div><div class='ctx'> 					reg = &lt;0x800 0x400&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					remote-wakeup-connected;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				usbhsehci: ehci@c00 {</div><div class='add'>+				usbhsehci: usb@c00 {</div><div class='ctx'> 					compatible = "ti,ehci-omap";</div><div class='ctx'> 					reg = &lt;0xc00 0x400&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -1414,7 +1414,7 @@</div><div class='ctx'> 			uart3: serial@0 {</div><div class='ctx'> 				compatible = "ti,omap4-uart";</div><div class='ctx'> 				reg = &lt;0x0 0x100&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1765,7 +1765,7 @@</div><div class='ctx'> 			uart1: serial@0 {</div><div class='ctx'> 				compatible = "ti,omap4-uart";</div><div class='ctx'> 				reg = &lt;0x0 0x100&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1794,7 +1794,7 @@</div><div class='ctx'> 			uart2: serial@0 {</div><div class='ctx'> 				compatible = "ti,omap4-uart";</div><div class='ctx'> 				reg = &lt;0x0 0x100&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1823,7 +1823,7 @@</div><div class='ctx'> 			uart4: serial@0 {</div><div class='ctx'> 				compatible = "ti,omap4-uart";</div><div class='ctx'> 				reg = &lt;0x0 0x100&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts b/arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts<br/>index 8fd076e5d1b0..4b8bfd0188ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-panda-a4.dts</a></div><div class='hunk'>@@ -7,6 +7,11 @@</div><div class='ctx'> #include "omap443x.dtsi"</div><div class='ctx'> #include "omap4-panda-common.dtsi"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	model = "TI OMAP4 PandaBoard (A4)";</div><div class='add'>+	compatible = "ti,omap4-panda-a4", "ti,omap4-panda", "ti,omap4430", "ti,omap4";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Pandaboard Rev A4+ have external pullups on SCL &amp; SDA */</div><div class='ctx'> &amp;dss_hdmi_pins {</div><div class='ctx'> 	pinctrl-single,pins = &lt;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi b/arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi<br/>index 97706d6296a6..05c871d31d7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-panda-common.dtsi</a></div><div class='hunk'>@@ -130,6 +130,12 @@</div><div class='ctx'> 		clock-frequency = &lt;19200000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wl12xx_pwrseq: wl12xx-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;twl 0&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* regulator for wl12xx on sdio5 */</div><div class='ctx'> 	wl12xx_vmmc: wl12xx_vmmc {</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -361,10 +367,8 @@</div><div class='ctx'> 	 */</div><div class='ctx'> 	wl12xx_gpio: wl12xx-gpio-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 */</div><div class='del'>-			OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a22.gpio_46 */</div><div class='add'>+			OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 - WLAN_EN */</div><div class='ctx'> 			OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a24.gpio_48 */</div><div class='del'>-			OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a25.gpio_49 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -387,6 +391,22 @@</div><div class='ctx'> 			OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpio_121 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	bt_pins: bt-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)	  /* gpmc_a22.gpio_46 - BTEN */</div><div class='add'>+			OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 - BTWAKEUP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_pins: uart2-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)  /* uart2_cts.uart2_cts - HCI */</div><div class='add'>+			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)	  /* uart2_rts.uart2_rts */</div><div class='add'>+			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)  /* uart2_rx.uart2_rx */</div><div class='add'>+			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)	  /* uart2_tx.uart2_tx */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;omap4_pmx_wkup {</div><div class='hunk'>@@ -408,6 +428,7 @@</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='ctx'> 		/* IRQ# = 7 */</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;; /* IRQ_SYS_1N cascaded to gic */</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		system-power-controller;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -488,6 +509,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-power-off-card;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wl12xx_pwrseq&gt;;</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -523,8 +545,19 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='ctx'> 	interrupts-extended = &lt;&amp;wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH</div><div class='ctx'> 			       &amp;omap4_pmx_core OMAP4_UART2_RX&gt;;</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "ti,wl1271-st";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_pins&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio2 14 GPIO_ACTIVE_HIGH&gt;;	/* GPIO_46 */</div><div class='add'>+		clocks = &lt;&amp;twl 0&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart3 {</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-panda-es.dts b/arch/arm/boot/dts/ti/omap/omap4-panda-es.dts<br/>index fe7b156d10ed..a933fe560834 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-es.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-panda-es.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-panda-es.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-panda-es.dts</a></div><div class='hunk'>@@ -49,22 +49,6 @@</div><div class='ctx'> 			OMAP4_IOPAD(0x0fc, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	bt_pins: bt-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a22.gpio_46 - BTEN */</div><div class='del'>-			OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a25.gpio_49 - BTWAKEUP */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart2_pins: uart2-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts - HCI */</div><div class='del'>-			OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */</div><div class='del'>-			OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_rx.uart2_rx */</div><div class='del'>-			OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;led_wkgpio_pins {</div><div class='hunk'>@@ -96,19 +80,3 @@</div><div class='ctx'> &amp;gpio1_target {</div><div class='ctx'> 	 ti,no-reset-on-init;</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;wl12xx_gpio {</div><div class='del'>-	pinctrl-single,pins = &lt;</div><div class='del'>-		OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3)		/* gpmc_a19.gpio_43 */</div><div class='del'>-		OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_a24.gpio_48 */</div><div class='del'>-	&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2_pins &amp;bt_pins&gt;;</div><div class='del'>-	bluetooth: tiwi {</div><div class='del'>-		compatible = "ti,wl1271-st";</div><div class='del'>-		enable-gpios = &lt;&amp;gpio2 14 GPIO_ACTIVE_HIGH&gt;;	/* GPIO_46 */</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-sdp.dts b/arch/arm/boot/dts/ti/omap/omap4-sdp.dts<br/>index b535d24c6140..b550105585a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-sdp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-sdp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-sdp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-sdp.dts</a></div><div class='hunk'>@@ -467,7 +467,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcspi1_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	eth@0 {</div><div class='add'>+	ethernet@0 {</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ks8851_pins&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi b/arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi<br/>index cadc7e02592b..80e89a2f8be1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap4-var-om44customboard.dtsi</a></div><div class='hunk'>@@ -194,7 +194,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcspi1_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	eth@0 {</div><div class='add'>+	ethernet@0 {</div><div class='ctx'> 		compatible = "ks8851";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ks8851_irq_pins&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts b/arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts<br/>index 6767382996ab..2fd8111de903 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts</a></div><div class='hunk'>@@ -413,7 +413,7 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi b/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi<br/>index 3b505fe415ed..9f6100c7c34d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-l4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-l4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap5-l4.dtsi</a></div><div class='hunk'>@@ -331,14 +331,14 @@</div><div class='ctx'> 					      "refclk_60m_ext_p1",</div><div class='ctx'> 					      "refclk_60m_ext_p2";</div><div class='ctx'> </div><div class='del'>-				usbhsohci: ohci@800 {</div><div class='add'>+				usbhsohci: usb@800 {</div><div class='ctx'> 					compatible = "ti,ohci-omap3";</div><div class='ctx'> 					reg = &lt;0x800 0x400&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 					remote-wakeup-connected;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				usbhsehci: ehci@c00 {</div><div class='add'>+				usbhsehci: usb@c00 {</div><div class='ctx'> 					compatible = "ti,ehci-omap";</div><div class='ctx'> 					reg = &lt;0xc00 0x400&gt;;</div><div class='ctx'> 					interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts b/arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts<br/>index 02716fb796bd..7ae60dc198f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	at24@50 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/ti/omap/twl4030.dtsi b/arch/arm/boot/dts/ti/omap/twl4030.dtsi<br/>index a5d9c5738317..07b9ca942e78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/twl4030.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/ti/omap/twl4030.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/ti/omap/twl4030.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/ti/omap/twl4030.dtsi</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> 		interrupts = &lt;11&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	charger: bci {</div><div class='add'>+	charger: charger {</div><div class='ctx'> 		compatible = "ti,twl4030-bci";</div><div class='ctx'> 		interrupts = &lt;9&gt;, &lt;2&gt;;</div><div class='ctx'> 		bci3v1-supply = &lt;&amp;vusb3v1&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/Makefile b/arch/arm/boot/dts/vt8500/Makefile<br/>index 255f4403af91..6fd29c41f366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/Makefile</a></div><div class='hunk'>@@ -4,4 +4,5 @@ dtb-$(CONFIG_ARCH_VT8500) += \</div><div class='ctx'> 	wm8505-ref.dtb \</div><div class='ctx'> 	wm8650-mid.dtb \</div><div class='ctx'> 	wm8750-apc8750.dtb \</div><div class='del'>-	wm8850-w70v2.dtb</div><div class='add'>+	wm8850-w70v2.dtb \</div><div class='add'>+	wm8950-apc-rock.dtb</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500/vt8500-bv07.dts<br/>index 38a2da5e2c5d..c8c07c2b4acf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/vt8500-bv07.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/vt8500-bv07.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/vt8500-bv07.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/vt8500-bv07.dts</a></div><div class='hunk'>@@ -10,6 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Benign BV07 Netbook";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x8000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fb {</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi<br/>index f23cb5ee11ae..9b87b1289792 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/vt8500.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/vt8500.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/vt8500.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/vt8500.dtsi</a></div><div class='hunk'>@@ -11,20 +11,16 @@</div><div class='ctx'> 	compatible = "via,vt8500";</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu {</div><div class='add'>+		cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,arm926ej-s";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='hunk'>@@ -55,6 +51,11 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		chipid@d8120000 {</div><div class='add'>+			compatible = "via,vt8500-scc-id";</div><div class='add'>+			reg = &lt;0xd8120000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc@d8130000 {</div><div class='ctx'> 			compatible = "via,vt8500-pmc";</div><div class='ctx'> 			reg = &lt;0xd8130000 0x1000&gt;;</div><div class='hunk'>@@ -106,10 +107,10 @@</div><div class='ctx'> 		timer@d8130100 {</div><div class='ctx'> 			compatible = "via,vt8500-timer";</div><div class='ctx'> 			reg = &lt;0xd8130100 0x28&gt;;</div><div class='del'>-			interrupts = &lt;36&gt;;</div><div class='add'>+			interrupts = &lt;36&gt;, &lt;37&gt;, &lt;38&gt;, &lt;39&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@d8007900 {</div><div class='add'>+		usb@d8007900 {</div><div class='ctx'> 			compatible = "via,vt8500-ehci";</div><div class='ctx'> 			reg = &lt;0xd8007900 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;43&gt;;</div><div class='hunk'>@@ -121,7 +122,7 @@</div><div class='ctx'> 			interrupts = &lt;43&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		fb: fb@d8050800 {</div><div class='add'>+		fb: lcd-controller@d800e400 {</div><div class='ctx'> 			compatible = "via,vt8500-fb";</div><div class='ctx'> 			reg = &lt;0xd800e400 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;12&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8505-ref.dts b/arch/arm/boot/dts/vt8500/wm8505-ref.dts<br/>index 8ce9e2ef0a81..d4ff99c70012 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8505-ref.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8505-ref.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8505-ref.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8505-ref.dts</a></div><div class='hunk'>@@ -10,6 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Wondermedia WM8505 Netbook";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x8000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fb {</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi<br/>index d9e1280372c5..915adbf6e1e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8505.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8505.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8505.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8505.dtsi</a></div><div class='hunk'>@@ -11,20 +11,16 @@</div><div class='ctx'> 	compatible = "wm,wm8505";</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu {</div><div class='add'>+		cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,arm926ej-s";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'>  	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='hunk'>@@ -66,6 +62,11 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		chipid@d8120000 {</div><div class='add'>+			compatible = "via,vt8500-scc-id";</div><div class='add'>+			reg = &lt;0xd8120000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc@d8130000 {</div><div class='ctx'> 			compatible = "via,vt8500-pmc";</div><div class='ctx'> 			reg = &lt;0xd8130000 0x1000&gt;;</div><div class='hunk'>@@ -204,10 +205,10 @@</div><div class='ctx'> 		timer@d8130100 {</div><div class='ctx'> 			compatible = "via,vt8500-timer";</div><div class='ctx'> 			reg = &lt;0xd8130100 0x28&gt;;</div><div class='del'>-			interrupts = &lt;36&gt;;</div><div class='add'>+			interrupts = &lt;36&gt;, &lt;37&gt;, &lt;38&gt;, &lt;39&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@d8007100 {</div><div class='add'>+		usb@d8007100 {</div><div class='ctx'> 			compatible = "via,vt8500-ehci";</div><div class='ctx'> 			reg = &lt;0xd8007100 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;1&gt;;</div><div class='hunk'>@@ -283,7 +284,7 @@</div><div class='ctx'> 			interrupts = &lt;48&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sdhc@d800a000 {</div><div class='add'>+		mmc@d800a000 {</div><div class='ctx'> 			compatible = "wm,wm8505-sdhc";</div><div class='ctx'> 			reg = &lt;0xd800a000 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;20&gt;, &lt;21&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8650-mid.dts b/arch/arm/boot/dts/vt8500/wm8650-mid.dts<br/>index 7977b6c1e8eb..bfc570e80073 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8650-mid.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8650-mid.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8650-mid.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8650-mid.dts</a></div><div class='hunk'>@@ -10,6 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Wondermedia WM8650-MID Tablet";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x10000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fb {</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi<br/>index 35d12d77efc0..82eef7504364 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8650.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8650.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8650.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8650.dtsi</a></div><div class='hunk'>@@ -11,20 +11,16 @@</div><div class='ctx'> 	compatible = "wm,wm8650";</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu {</div><div class='add'>+		cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,arm926ej-s";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'>  	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='hunk'>@@ -62,6 +58,11 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		chipid@d8120000 {</div><div class='add'>+			compatible = "via,vt8500-scc-id";</div><div class='add'>+			reg = &lt;0xd8120000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc@d8130000 {</div><div class='ctx'> 			compatible = "via,vt8500-pmc";</div><div class='ctx'> 			reg = &lt;0xd8130000 0x1000&gt;;</div><div class='hunk'>@@ -176,10 +177,10 @@</div><div class='ctx'> 		timer@d8130100 {</div><div class='ctx'> 			compatible = "via,vt8500-timer";</div><div class='ctx'> 			reg = &lt;0xd8130100 0x28&gt;;</div><div class='del'>-			interrupts = &lt;36&gt;;</div><div class='add'>+			interrupts = &lt;36&gt;, &lt;37&gt;, &lt;38&gt;, &lt;39&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@d8007900 {</div><div class='add'>+		usb@d8007900 {</div><div class='ctx'> 			compatible = "via,vt8500-ehci";</div><div class='ctx'> 			reg = &lt;0xd8007900 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;43&gt;;</div><div class='hunk'>@@ -191,7 +192,7 @@</div><div class='ctx'> 			interrupts = &lt;43&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sdhc@d800a000 {</div><div class='add'>+		mmc@d800a000 {</div><div class='ctx'> 			compatible = "wm,wm8505-sdhc";</div><div class='ctx'> 			reg = &lt;0xd800a000 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;20&gt;, &lt;21&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts b/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts<br/>index 136e812bc1e4..72d633bedff0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8750-apc8750.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8750-apc8750.dts</a></div><div class='hunk'>@@ -11,6 +11,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "VIA APC8750";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi<br/>index b292f85d4e69..5342b7fe4ef8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8750.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8750.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8750.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8750.dtsi</a></div><div class='hunk'>@@ -11,20 +11,16 @@</div><div class='ctx'> 	compatible = "wm,wm8750";</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu {</div><div class='add'>+		cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,arm1176jzf";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='hunk'>@@ -68,6 +64,11 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		chipid@d8120000 {</div><div class='add'>+			compatible = "via,vt8500-scc-id";</div><div class='add'>+			reg = &lt;0xd8120000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc@d8130000 {</div><div class='ctx'> 			compatible = "via,vt8500-pmc";</div><div class='ctx'> 			reg = &lt;0xd8130000 0x1000&gt;;</div><div class='hunk'>@@ -248,10 +249,10 @@</div><div class='ctx'> 		timer@d8130100 {</div><div class='ctx'> 			compatible = "via,vt8500-timer";</div><div class='ctx'> 			reg = &lt;0xd8130100 0x28&gt;;</div><div class='del'>-			interrupts = &lt;36&gt;;</div><div class='add'>+			interrupts = &lt;36&gt;, &lt;37&gt;, &lt;38&gt;, &lt;39&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@d8007900 {</div><div class='add'>+		usb@d8007900 {</div><div class='ctx'> 			compatible = "via,vt8500-ehci";</div><div class='ctx'> 			reg = &lt;0xd8007900 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;26&gt;;</div><div class='hunk'>@@ -323,7 +324,7 @@</div><div class='ctx'> 			interrupts = &lt;48&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sdhc@d800a000 {</div><div class='add'>+		mmc@d800a000 {</div><div class='ctx'> 			compatible = "wm,wm8505-sdhc";</div><div class='ctx'> 			reg = &lt;0xd800a000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 21&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts b/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts<br/>index 5d409323b10c..eb16991a2ccc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8850-w70v2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8850-w70v2.dts</a></div><div class='hunk'>@@ -22,6 +22,11 @@</div><div class='ctx'> 		brightness-levels = &lt;0 40 60 80 100 130 190 255&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;5&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fb {</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi<br/>index c61717ebb4f1..58109aa05f74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8850.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/vt8500/wm8850.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8850.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8850.dtsi</a></div><div class='hunk'>@@ -18,14 +18,10 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a9";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='hunk'>@@ -65,6 +61,11 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		chipid@d8120000 {</div><div class='add'>+			compatible = "via,vt8500-scc-id";</div><div class='add'>+			reg = &lt;0xd8120000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc@d8130000 {</div><div class='ctx'> 			compatible = "via,vt8500-pmc";</div><div class='ctx'> 			reg = &lt;0xd8130000 0x1000&gt;;</div><div class='hunk'>@@ -235,10 +236,10 @@</div><div class='ctx'> 		timer@d8130100 {</div><div class='ctx'> 			compatible = "via,vt8500-timer";</div><div class='ctx'> 			reg = &lt;0xd8130100 0x28&gt;;</div><div class='del'>-			interrupts = &lt;36&gt;;</div><div class='add'>+			interrupts = &lt;36&gt;, &lt;37&gt;, &lt;38&gt;, &lt;39&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ehci@d8007900 {</div><div class='add'>+		usb@d8007900 {</div><div class='ctx'> 			compatible = "via,vt8500-ehci";</div><div class='ctx'> 			reg = &lt;0xd8007900 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;26&gt;;</div><div class='hunk'>@@ -294,7 +295,7 @@</div><div class='ctx'> 			interrupts = &lt;48&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sdhc@d800a000 {</div><div class='add'>+		mmc@d800a000 {</div><div class='ctx'> 			compatible = "wm,wm8505-sdhc";</div><div class='ctx'> 			reg = &lt;0xd800a000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;20 21&gt;;</div><div class='hunk'>@@ -308,5 +309,18 @@</div><div class='ctx'> 			reg = &lt;0xd8004000 0x100&gt;;</div><div class='ctx'> 			interrupts = &lt;10&gt;;</div><div class='ctx'>                 };</div><div class='add'>+</div><div class='add'>+		l2_cache: cache-controller@d9000000 {</div><div class='add'>+			compatible = "arm,pl310-cache";</div><div class='add'>+			reg = &lt;0xd9000000 0x1000&gt;;</div><div class='add'>+			arm,double-linefill = &lt;1&gt;;</div><div class='add'>+			arm,dynamic-clock-gating = &lt;1&gt;;</div><div class='add'>+			arm,shared-override;</div><div class='add'>+			arm,standby-mode = &lt;1&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			prefetch-data = &lt;1&gt;;</div><div class='add'>+			prefetch-instr = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts b/arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts<br/>new file mode 100644<br/>index 000000000000..58b3c8deb4f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8950-apc-rock.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "wm8950.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "VIA APC Rock";</div><div class='add'>+	compatible = "via,apc-rock", "wm,wm8950";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/vt8500/wm8950.dtsi b/arch/arm/boot/dts/vt8500/wm8950.dtsi<br/>new file mode 100644<br/>index 000000000000..31fba05d3c3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/vt8500/wm8950.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/vt8500/wm8950.dtsi</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* No differences have been discovered vs. WM8850, but chip markings differ */</div><div class='add'>+/include/ "wm8850.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "wm,wm8950";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-7000.dtsi b/arch/arm/boot/dts/xilinx/zynq-7000.dtsi<br/>index a7db3f3009f2..153b8d93cbee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-7000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-7000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-7000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-7000.dtsi</a></div><div class='hunk'>@@ -8,6 +8,13 @@</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> 	compatible = "xlnx,zynq-7000";</div><div class='ctx'> </div><div class='add'>+	options {</div><div class='add'>+		u-boot {</div><div class='add'>+			compatible = "u-boot,config";</div><div class='add'>+			bootscr-address = /bits/ 64 &lt;0x3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -34,7 +41,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	fpga_full: fpga-full {</div><div class='add'>+	fpga_full: fpga-region {</div><div class='ctx'> 		compatible = "fpga-region";</div><div class='ctx'> 		fpga-mgr = &lt;&amp;devcfg&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -93,6 +100,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	amba: axi {</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -190,6 +198,17 @@</div><div class='ctx'> 			reg = &lt;0xf8006000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ocm: sram@fffc0000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0xfffc0000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0xfffc0000 0x10000&gt;;</div><div class='add'>+			ocm-sram@0 {</div><div class='add'>+				reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@e0000000 {</div><div class='ctx'> 			compatible = "xlnx,xuartps", "cdns,uart-r1p8";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -277,13 +296,18 @@</div><div class='ctx'> 				  0x2 0x0 0xe4000000 0x2000000&gt;; /* SRAM/NOR CS1 region */</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;0 18 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			nfc0: nand-controller@0,0 {</div><div class='ctx'> 				compatible = "arm,pl353-nand-r2p1";</div><div class='ctx'> 				reg = &lt;0 0 0x1000000&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			nor0: flash@1,0 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+				compatible = "cfi-flash";</div><div class='add'>+				reg = &lt;1 0 0x2000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -308,12 +332,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		slcr: slcr@f8000000 {</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";</div><div class='ctx'> 			reg = &lt;0xF8000000 0x1000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> 			clkc: clkc@100 {</div><div class='add'>+				bootph-all;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 				compatible = "xlnx,ps7-clkc";</div><div class='ctx'> 				fclk-enable = &lt;0&gt;;</div><div class='hunk'>@@ -398,6 +424,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		scutimer: timer@f8f00600 {</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 			interrupts = &lt;1 13 0x301&gt;;</div><div class='ctx'> 			compatible = "arm,cortex-a9-twd-timer";</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-cc108.dts b/arch/arm/boot/dts/xilinx/zynq-cc108.dts<br/>index 8b9ab9bba23b..f5525c048426 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-cc108.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-cc108.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-cc108.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-cc108.dts</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -48,7 +49,44 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	flash@0 { /* 16 MB */</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		partition@0 {</div><div class='add'>+			label = "qspi-fsbl-uboot-bs";</div><div class='add'>+			reg = &lt;0x0 0x400000&gt;; /* 4MB */</div><div class='add'>+		};</div><div class='add'>+		partition@400000 {</div><div class='add'>+			label = "qspi-linux";</div><div class='add'>+			reg = &lt;0x400000 0x400000&gt;; /* 4MB */</div><div class='add'>+		};</div><div class='add'>+		partition@800000 {</div><div class='add'>+			label = "qspi-rootfs";</div><div class='add'>+			reg = &lt;0x800000 0x400000&gt;; /* 4MB */</div><div class='add'>+		};</div><div class='add'>+		partition@c00000 {</div><div class='add'>+			label = "qspi-devicetree";</div><div class='add'>+			reg = &lt;0xc00000 0x100000&gt;; /* 1MB */</div><div class='add'>+		};</div><div class='add'>+		partition@d00000 {</div><div class='add'>+			label = "qspi-scratch";</div><div class='add'>+			reg = &lt;0xd00000 0x200000&gt;; /* 2MB */</div><div class='add'>+		};</div><div class='add'>+		partition@f00000 {</div><div class='add'>+			label = "qspi-uboot-env";</div><div class='add'>+			reg = &lt;0xf00000 0x100000&gt;; /* 1MB */</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +97,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts b/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts<br/>index 53fa6dbfd8fd..14f644156a6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts</a></div><div class='hunk'>@@ -51,6 +51,8 @@</div><div class='ctx'> &amp;nfc0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	nand@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-microzed.dts b/arch/arm/boot/dts/xilinx/zynq-microzed.dts<br/>index 6ed84fb15902..68b867e8369e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-microzed.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-microzed.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-microzed.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-microzed.dts</a></div><div class='hunk'>@@ -11,8 +11,9 @@</div><div class='ctx'> 	compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='del'>-		ethernet0 = &amp;gem0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@0 {</div><div class='hunk'>@@ -35,6 +36,11 @@</div><div class='ctx'> 	ps-clk-frequency = &lt;33333333&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gem0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='hunk'>@@ -46,10 +52,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-parallella.dts b/arch/arm/boot/dts/xilinx/zynq-parallella.dts<br/>index 54592aeb92b9..366af4fcf8d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-parallella.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-parallella.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-parallella.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-parallella.dts</a></div><div class='hunk'>@@ -46,7 +46,6 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0141.0e90",</div><div class='ctx'> 		             "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 		marvell,reg-init = &lt;0x3 0x10 0xff00 0x1e&gt;,</div><div class='ctx'> 		                   &lt;0x3 0x11 0xfff0 0xa&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc702.dts b/arch/arm/boot/dts/xilinx/zynq-zc702.dts<br/>index 6efdbca9d3ef..6955637c5b1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc702.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc702.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc702.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc702.dts</a></div><div class='hunk'>@@ -15,7 +15,10 @@</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		i2c0 = &amp;i2c0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='add'>+		nvmem0 = &amp;eeprom;</div><div class='add'>+		rtc0 = &amp;rtc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@0 {</div><div class='hunk'>@@ -63,19 +66,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;amba {</div><div class='del'>-	ocm: sram@fffc0000 {</div><div class='del'>-		compatible = "mmio-sram";</div><div class='del'>-		reg = &lt;0xfffc0000 0x10000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0 0xfffc0000 0x10000&gt;;</div><div class='del'>-		ocm-sram@0 {</div><div class='del'>-			reg = &lt;0x0 0x10000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;can0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -95,7 +85,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -152,7 +141,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			eeprom@54 {</div><div class='add'>+			eeprom: eeprom@54 {</div><div class='ctx'> 				compatible = "atmel,24c08";</div><div class='ctx'> 				reg = &lt;0x54&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -174,7 +163,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;4&gt;;</div><div class='del'>-			rtc@51 {</div><div class='add'>+			rtc: rtc@51 {</div><div class='ctx'> 				compatible = "nxp,pcf8563";</div><div class='ctx'> 				reg = &lt;0x51&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -210,7 +199,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "can0_9_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -233,7 +222,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "ethernet0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;4&gt;;</div><div class='add'>+			power-source = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -256,7 +245,7 @@</div><div class='ctx'> 		conf-mdio {</div><div class='ctx'> 			groups = "mdio0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -274,7 +263,7 @@</div><div class='ctx'> 				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",</div><div class='ctx'> 				 "gpio0_13_grp", "gpio0_14_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-pull-up {</div><div class='hunk'>@@ -298,11 +287,11 @@</div><div class='ctx'> 			groups = "i2c0_10_grp";</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_i2c0_gpio: i2c0-gpio {</div><div class='add'>+	pinctrl_i2c0_gpio: i2c0-gpio-grp {</div><div class='ctx'> 		mux {</div><div class='ctx'> 			groups = "gpio0_50_grp", "gpio0_51_grp";</div><div class='ctx'> 			function = "gpio0";</div><div class='hunk'>@@ -311,7 +300,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "gpio0_50_grp", "gpio0_51_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -324,7 +313,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "sdio0_2_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -338,7 +327,7 @@</div><div class='ctx'> 			bias-high-impedance;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mux-wp {</div><div class='hunk'>@@ -351,7 +340,7 @@</div><div class='ctx'> 			bias-high-impedance;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -364,7 +353,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "uart1_10_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -387,7 +376,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "usb0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -403,13 +392,53 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "qspi-linux";</div><div class='add'>+				reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "qspi-device-tree";</div><div class='add'>+				reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@620000 {</div><div class='add'>+				label = "qspi-rootfs";</div><div class='add'>+				reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@c00000 {</div><div class='add'>+				label = "qspi-bitstream";</div><div class='add'>+				reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sdhci0_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart1_default&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc706.dts b/arch/arm/boot/dts/xilinx/zynq-zc706.dts<br/>index 77943c16d33f..3b803c698473 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc706.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc706.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc706.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc706.dts</a></div><div class='hunk'>@@ -14,7 +14,10 @@</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		i2c0 = &amp;i2c0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='add'>+		nvmem0 = &amp;eeprom;</div><div class='add'>+		rtc0 = &amp;rtc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@0 {</div><div class='hunk'>@@ -46,7 +49,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -100,7 +102,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			eeprom@54 {</div><div class='add'>+			eeprom: eeprom@54 {</div><div class='ctx'> 				compatible = "atmel,24c08";</div><div class='ctx'> 				reg = &lt;0x54&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -122,7 +124,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;4&gt;;</div><div class='del'>-			rtc@51 {</div><div class='add'>+			rtc: rtc@51 {</div><div class='ctx'> 				compatible = "nxp,pcf8563";</div><div class='ctx'> 				reg = &lt;0x51&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -150,7 +152,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "ethernet0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;4&gt;;</div><div class='add'>+			power-source = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -173,7 +175,7 @@</div><div class='ctx'> 		conf-mdio {</div><div class='ctx'> 			groups = "mdio0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -187,7 +189,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-pull-up {</div><div class='hunk'>@@ -211,7 +213,7 @@</div><div class='ctx'> 			groups = "i2c0_10_grp";</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -224,7 +226,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "sdio0_2_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -238,7 +240,7 @@</div><div class='ctx'> 			bias-high-impedance;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mux-wp {</div><div class='hunk'>@@ -251,7 +253,7 @@</div><div class='ctx'> 			bias-high-impedance;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -264,7 +266,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "uart1_10_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -287,7 +289,7 @@</div><div class='ctx'> 		conf {</div><div class='ctx'> 			groups = "usb0_0_grp";</div><div class='ctx'> 			slew-rate = &lt;0&gt;;</div><div class='del'>-			io-standard = &lt;1&gt;;</div><div class='add'>+			power-source = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		conf-rx {</div><div class='hunk'>@@ -303,13 +305,54 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;2&gt;;</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;, &lt;1&gt;;</div><div class='add'>+		parallel-memories = /bits/ 64 &lt;0x1000000 0x1000000&gt;; /* 16MB */</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "qspi-linux";</div><div class='add'>+				reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "qspi-device-tree";</div><div class='add'>+				reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@620000 {</div><div class='add'>+				label = "qspi-rootfs";</div><div class='add'>+				reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@c00000 {</div><div class='add'>+				label = "qspi-bitstream";</div><div class='add'>+				reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sdhci0_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart1_default&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts b/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts<br/>index 0dd352289a45..5fe799c3c7cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		i2c0 = &amp;i2c0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		spi1 = &amp;spi1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +46,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -57,7 +57,43 @@</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "qspi-linux";</div><div class='add'>+				reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "qspi-device-tree";</div><div class='add'>+				reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@620000 {</div><div class='add'>+				label = "qspi-rootfs";</div><div class='add'>+				reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@c00000 {</div><div class='add'>+				label = "qspi-bitstream";</div><div class='add'>+				reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='hunk'>@@ -85,6 +121,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts b/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts<br/>index 56732e8f6ca1..f9a086fe66d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts</a></div><div class='hunk'>@@ -47,6 +47,36 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;nfc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	nand@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "nand-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@1000000 {</div><div class='add'>+				label = "nand-linux";</div><div class='add'>+				reg = &lt;0x1000000 0x2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@3000000 {</div><div class='add'>+				label = "nand-rootfs";</div><div class='add'>+				reg = &lt;0x3000000 0x200000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smcc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	num-cs = &lt;4&gt;;</div><div class='hunk'>@@ -54,6 +84,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts b/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts<br/>index d2359b789eb8..24520e7d3965 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts</a></div><div class='hunk'>@@ -53,6 +53,40 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;nor0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bank-width = &lt;1&gt;;</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		partition@0 {</div><div class='add'>+			label = "nor-fsbl-uboot";</div><div class='add'>+			reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+		partition@100000 {</div><div class='add'>+			label = "nor-linux";</div><div class='add'>+			reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		partition@600000 {</div><div class='add'>+			label = "nor-device-tree";</div><div class='add'>+			reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+		partition@620000 {</div><div class='add'>+			label = "nor-rootfs";</div><div class='add'>+			reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+		};</div><div class='add'>+		partition@c00000 {</div><div class='add'>+			label = "nor-bitstream";</div><div class='add'>+			reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smcc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	num-cs = &lt;4&gt;;</div><div class='hunk'>@@ -60,5 +94,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts b/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts<br/>index 38d96adc870c..103e87ea7253 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> 		ethernet0 = &amp;gem1;</div><div class='ctx'> 		i2c0 = &amp;i2c1;</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		spi1 = &amp;spi0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +41,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -58,6 +58,44 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;2&gt;;</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;, &lt;1&gt;;</div><div class='add'>+		parallel-memories = /bits/ 64 &lt;0x1000000 0x1000000&gt;; /* 16MB */</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "qspi-linux";</div><div class='add'>+				reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "qspi-device-tree";</div><div class='add'>+				reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@620000 {</div><div class='add'>+				label = "qspi-rootfs";</div><div class='add'>+				reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@c00000 {</div><div class='add'>+				label = "qspi-bitstream";</div><div class='add'>+				reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	num-cs = &lt;4&gt;;</div><div class='hunk'>@@ -73,5 +111,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zed.dts b/arch/arm/boot/dts/xilinx/zynq-zed.dts<br/>index 6a5a93aa6552..52ba569b2b9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zed.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zed.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zed.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zed.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -43,15 +44,55 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi-fsbl-uboot";</div><div class='add'>+				reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "qspi-linux";</div><div class='add'>+				reg = &lt;0x100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "qspi-device-tree";</div><div class='add'>+				reg = &lt;0x600000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@620000 {</div><div class='add'>+				label = "qspi-rootfs";</div><div class='add'>+				reg = &lt;0x620000 0x5e0000&gt;;</div><div class='add'>+			};</div><div class='add'>+			partition@c00000 {</div><div class='add'>+				label = "qspi-bitstream";</div><div class='add'>+				reg = &lt;0xc00000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi b/arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi<br/>index 33b02e05ce82..defef9c8da13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zturn-common.dtsi</a></div><div class='hunk'>@@ -63,6 +63,11 @@</div><div class='ctx'> 	ps-clk-frequency = &lt;33333333&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gem0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='hunk'>@@ -73,14 +78,17 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts b/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts<br/>index 7b87e10d3953..56b917eec783 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@0 {</div><div class='hunk'>@@ -49,15 +51,21 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/xilinx/zynq-zybo.dts b/arch/arm/boot/dts/xilinx/zynq-zybo.dts<br/>index 755f6f109d5a..fbc7d1b12e94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zybo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/boot/dts/xilinx/zynq-zybo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/boot/dts/xilinx/zynq-zybo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/boot/dts/xilinx/zynq-zybo.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gem0;</div><div class='ctx'> 		serial0 = &amp;uart1;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -44,15 +45,21 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet_phy: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c<br/>index 9a9aa53547a6..d1e82a318e3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/common/bL_switcher.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/bL_switcher.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/common/bL_switcher.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/common/bL_switcher.c</a></div><div class='hunk'>@@ -307,13 +307,11 @@ static struct task_struct *bL_switcher_thread_create(int cpu, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *task;</div><div class='ctx'> </div><div class='del'>-	task = kthread_create_on_node(bL_switcher_thread, arg,</div><div class='del'>-				      cpu_to_node(cpu), "kswitcher_%d", cpu);</div><div class='del'>-	if (!IS_ERR(task)) {</div><div class='del'>-		kthread_bind(task, cpu);</div><div class='del'>-		wake_up_process(task);</div><div class='del'>-	} else</div><div class='add'>+	task = kthread_run_on_cpu(bL_switcher_thread, arg,</div><div class='add'>+				  cpu, "kswitcher_%d");</div><div class='add'>+	if (IS_ERR(task))</div><div class='ctx'> 		pr_err("%s failed for CPU %d\n", __func__, cpu);</div><div class='add'>+</div><div class='ctx'> 	return task;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c<br/>index 06b0e5fd54a6..cb6ef449b987 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/common/locomo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/locomo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/common/locomo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/common/locomo.c</a></div><div class='hunk'>@@ -516,7 +516,7 @@ static void locomo_remove(struct platform_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static struct platform_driver locomo_device_driver = {</div><div class='ctx'> 	.probe		= locomo_probe,</div><div class='del'>-	.remove_new	= locomo_remove,</div><div class='add'>+	.remove		= locomo_remove,</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	.suspend	= locomo_suspend,</div><div class='ctx'> 	.resume		= locomo_resume,</div><div class='head'>diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c<br/>index 550978dc3c50..3389a70e4d49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/common/sa1111.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/sa1111.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/common/sa1111.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/common/sa1111.c</a></div><div class='hunk'>@@ -416,9 +416,9 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)</div><div class='ctx'> 	writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);</div><div class='ctx'> 	writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);</div><div class='ctx'> </div><div class='del'>-	sachip-&gt;irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,</div><div class='del'>-						  &amp;sa1111_irqdomain_ops,</div><div class='del'>-						  sachip);</div><div class='add'>+	sachip-&gt;irqdomain = irq_domain_create_linear(NULL, SA1111_IRQ_NR,</div><div class='add'>+						     &amp;sa1111_irqdomain_ops,</div><div class='add'>+						     sachip);</div><div class='ctx'> 	if (!sachip-&gt;irqdomain) {</div><div class='ctx'> 		irq_free_descs(sachip-&gt;irq_base, SA1111_IRQ_NR);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -563,7 +563,7 @@ static int sa1111_gpio_get(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> 	return !!(readl_relaxed(reg + SA1111_GPIO_PXDRR) &amp; mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sa1111_gpio_set(struct gpio_chip *gc, unsigned offset, int value)</div><div class='add'>+static int sa1111_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct sa1111 *sachip = gc_to_sa1111(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -574,10 +574,12 @@ static void sa1111_gpio_set(struct gpio_chip *gc, unsigned offset, int value)</div><div class='ctx'> 	sa1111_gpio_modify(reg + SA1111_GPIO_PXDWR, mask, value ? mask : 0);</div><div class='ctx'> 	sa1111_gpio_modify(reg + SA1111_GPIO_PXSSR, mask, value ? mask : 0);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sachip-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,</div><div class='del'>-	unsigned long *bits)</div><div class='add'>+static int sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,</div><div class='add'>+				    unsigned long *bits)</div><div class='ctx'> {</div><div class='ctx'> 	struct sa1111 *sachip = gc_to_sa1111(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -595,6 +597,8 @@ static void sa1111_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,</div><div class='ctx'> 	sa1111_gpio_modify(reg + SA1111_GPIO_PCDWR, (msk &gt;&gt; 12) &amp; 255, val &gt;&gt; 12);</div><div class='ctx'> 	sa1111_gpio_modify(reg + SA1111_GPIO_PCSSR, (msk &gt;&gt; 12) &amp; 255, val &gt;&gt; 12);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sachip-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sa1111_gpio_to_irq(struct gpio_chip *gc, unsigned offset)</div><div class='hunk'>@@ -1154,7 +1158,7 @@ static struct dev_pm_ops sa1111_pm_ops = {</div><div class='ctx'>  */</div><div class='ctx'> static struct platform_driver sa1111_device_driver = {</div><div class='ctx'> 	.probe		= sa1111_probe,</div><div class='del'>-	.remove_new	= sa1111_remove,</div><div class='add'>+	.remove		= sa1111_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "sa1111",</div><div class='ctx'> 		.pm	= &amp;sa1111_pm_ops,</div><div class='head'>diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c<br/>index 9018c7240166..dddb73c96826 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/common/scoop.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/common/scoop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/common/scoop.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/common/scoop.c</a></div><div class='hunk'>@@ -63,7 +63,8 @@ static void __scoop_gpio_set(struct scoop_dev *sdev,</div><div class='ctx'> 	iowrite16(gpwr, sdev-&gt;base + SCOOP_GPWR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void scoop_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int scoop_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			  int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct scoop_dev *sdev = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -73,6 +74,8 @@ static void scoop_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> 	__scoop_gpio_set(sdev, offset, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sdev-&gt;scoop_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int scoop_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -250,7 +253,7 @@ static void scoop_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver scoop_driver = {</div><div class='ctx'> 	.probe		= scoop_probe,</div><div class='del'>-	.remove_new	= scoop_remove,</div><div class='add'>+	.remove		= scoop_remove,</div><div class='ctx'> 	.suspend	= scoop_suspend,</div><div class='ctx'> 	.resume		= scoop_resume,</div><div class='ctx'> 	.driver		= {</div><div class='head'>diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig<br/>index 2022a7fca0f9..ff13e1ecf4bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/at91_dt_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/at91_dt_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/at91_dt_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/at91_dt_defconfig</a></div><div class='hunk'>@@ -201,6 +201,7 @@ CONFIG_AT_XDMAC=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_AT91_ADC=y</div><div class='ctx'> CONFIG_AT91_SAMA5D2_ADC=y</div><div class='add'>+CONFIG_PAC1934=m</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_ATMEL=y</div><div class='ctx'> CONFIG_PWM_ATMEL_HLCDC_PWM=y</div><div class='hunk'>@@ -231,7 +232,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_AES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_TDES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_SHA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_ACORN_8x8=y</div><div class='head'>diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig<br/>index b5f0bd8dd536..27dc3bf6b124 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/bcm2835_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/bcm2835_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/bcm2835_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/bcm2835_defconfig</a></div><div class='hunk'>@@ -7,7 +7,6 @@ CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT_V3=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=18</div><div class='ctx'> CONFIG_CFS_BANDWIDTH=y</div><div class='del'>-CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CGROUP_DEVICE=y</div><div class='head'>diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig<br/>index 42cb1c854118..578c6a4af620 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/collie_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/collie_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/collie_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/collie_defconfig</a></div><div class='hunk'>@@ -78,7 +78,6 @@ CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_NLS_DEFAULT="cp437"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_MINI_4x6=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='head'>diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig<br/>index 3474e475373a..e2ddaca0f89d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/davinci_all_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/davinci_all_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/davinci_all_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/davinci_all_defconfig</a></div><div class='hunk'>@@ -14,7 +14,6 @@ CONFIG_ARCH_MULTIPLATFORM=y</div><div class='ctx'> CONFIG_ARCH_MULTI_V5=y</div><div class='ctx'> # CONFIG_ARCH_MULTI_V7 is not set</div><div class='ctx'> CONFIG_ARCH_DAVINCI=y</div><div class='del'>-CONFIG_ARCH_DAVINCI_DA830=y</div><div class='ctx'> CONFIG_ARCH_DAVINCI_DA850=y</div><div class='ctx'> CONFIG_DAVINCI_MUX_DEBUG=y</div><div class='ctx'> CONFIG_DAVINCI_MUX_WARNINGS=y</div><div class='hunk'>@@ -249,7 +248,6 @@ CONFIG_NLS_ASCII=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_DEBUG_RT_MUTEXES=y</div><div class='head'>diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig<br/>index 2849d17f5856..d76eb12d29a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/dove_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/dove_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/dove_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/dove_defconfig</a></div><div class='hunk'>@@ -128,8 +128,6 @@ CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig<br/>index 7dece9d98828..2248afaf35b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/ep93xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/ep93xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/ep93xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/ep93xx_defconfig</a></div><div class='hunk'>@@ -113,7 +113,6 @@ CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_SLAB=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='head'>diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig<br/>index 7ad48fdda1da..84070e9698e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/exynos_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/exynos_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/exynos_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/exynos_defconfig</a></div><div class='hunk'>@@ -167,7 +167,7 @@ CONFIG_MFD_MAX77686=y</div><div class='ctx'> CONFIG_MFD_MAX77693=y</div><div class='ctx'> CONFIG_MFD_MAX8997=y</div><div class='ctx'> CONFIG_MFD_MAX8998=y</div><div class='del'>-CONFIG_MFD_SEC_CORE=y</div><div class='add'>+CONFIG_MFD_SEC_I2C=y</div><div class='ctx'> CONFIG_MFD_STMPE=y</div><div class='ctx'> CONFIG_STMPE_I2C=y</div><div class='ctx'> CONFIG_MFD_TPS65090=y</div><div class='hunk'>@@ -349,7 +349,7 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='hunk'>@@ -363,14 +363,9 @@ CONFIG_CRYPTO_USER_API_HASH=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_EXYNOS_RNG=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_S5P=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=96</div><div class='ctx'> CONFIG_FONTS=y</div><div class='head'>diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig<br/>index 333ef55476a3..9a57763a8d38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/imx_v6_v7_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/imx_v6_v7_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/imx_v6_v7_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/imx_v6_v7_defconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ CONFIG_RELAY=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='add'>+CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_ARCH_MULTI_V6=y</div><div class='ctx'> CONFIG_ARCH_MXC=y</div><div class='ctx'> CONFIG_SOC_IMX31=y</div><div class='hunk'>@@ -32,7 +33,6 @@ CONFIG_ARM_PSCI=y</div><div class='ctx'> CONFIG_HIGHMEM=y</div><div class='ctx'> CONFIG_ARCH_FORCE_MAX_ORDER=13</div><div class='ctx'> CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"</div><div class='del'>-CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_FREQ_STAT=y</div><div class='ctx'> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y</div><div class='hunk'>@@ -68,6 +68,8 @@ CONFIG_BT=y</div><div class='ctx'> CONFIG_BT_BNEP=m</div><div class='ctx'> CONFIG_BT_HCIUART=y</div><div class='ctx'> CONFIG_BT_HCIUART_LL=y</div><div class='add'>+CONFIG_BT_HCIUART_BCM=y</div><div class='add'>+CONFIG_BT_NXPUART=m</div><div class='ctx'> CONFIG_CFG80211=y</div><div class='ctx'> CONFIG_CFG80211_WEXT=y</div><div class='ctx'> CONFIG_MAC80211=y</div><div class='hunk'>@@ -128,7 +130,6 @@ CONFIG_CS89x0_PLATFORM=y</div><div class='ctx'> CONFIG_QCA7000_SPI=m</div><div class='ctx'> # CONFIG_NET_VENDOR_SEEQ is not set</div><div class='ctx'> CONFIG_SMC91X=y</div><div class='del'>-CONFIG_SMC911X=y</div><div class='ctx'> CONFIG_SMSC911X=y</div><div class='ctx'> # CONFIG_NET_VENDOR_STMICRO is not set</div><div class='ctx'> CONFIG_MICREL_PHY=y</div><div class='hunk'>@@ -152,9 +153,7 @@ CONFIG_MWIFIEX_PCIE=m</div><div class='ctx'> CONFIG_WL12XX=m</div><div class='ctx'> CONFIG_WL18XX=m</div><div class='ctx'> CONFIG_WLCORE_SDIO=m</div><div class='del'>-# CONFIG_WILINK_PLATFORM_DATA is not set</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='del'>-CONFIG_INPUT_EVBUG=m</div><div class='ctx'> CONFIG_KEYBOARD_GPIO=y</div><div class='ctx'> CONFIG_KEYBOARD_SNVS_PWRKEY=y</div><div class='ctx'> CONFIG_KEYBOARD_IMX=y</div><div class='hunk'>@@ -182,6 +181,7 @@ CONFIG_TOUCHSCREEN_COLIBRI_VF50=y</div><div class='ctx'> CONFIG_INPUT_MISC=y</div><div class='ctx'> CONFIG_INPUT_MMA8450=y</div><div class='ctx'> CONFIG_INPUT_GPIO_BEEPER=m</div><div class='add'>+CONFIG_INPUT_PWM_BEEPER=y</div><div class='ctx'> CONFIG_SERIO_SERPORT=m</div><div class='ctx'> # CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_IMX=y</div><div class='hunk'>@@ -189,9 +189,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_FSL_LPUART=y</div><div class='ctx'> CONFIG_SERIAL_FSL_LPUART_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_DEV_BUS=y</div><div class='del'>-# CONFIG_I2C_COMPAT is not set</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='del'>-CONFIG_I2C_MUX=y</div><div class='ctx'> CONFIG_I2C_MUX_GPIO=y</div><div class='ctx'> # CONFIG_I2C_HELPER_AUTO is not set</div><div class='ctx'> CONFIG_I2C_ALGOPCF=m</div><div class='hunk'>@@ -203,14 +201,9 @@ CONFIG_SPI_FSL_QUADSPI=y</div><div class='ctx'> CONFIG_SPI_GPIO=y</div><div class='ctx'> CONFIG_SPI_IMX=y</div><div class='ctx'> CONFIG_SPI_FSL_DSPI=y</div><div class='del'>-CONFIG_PINCTRL_IMX8MM=y</div><div class='del'>-CONFIG_PINCTRL_IMX8MN=y</div><div class='del'>-CONFIG_PINCTRL_IMX8MP=y</div><div class='del'>-CONFIG_PINCTRL_IMX8MQ=y</div><div class='ctx'> CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_GPIO_MXC=y</div><div class='ctx'> CONFIG_GPIO_SIOX=m</div><div class='del'>-CONFIG_GPIO_VF610=y</div><div class='ctx'> CONFIG_GPIO_MAX732X=y</div><div class='ctx'> CONFIG_GPIO_PCA953X=y</div><div class='ctx'> CONFIG_GPIO_PCA953X_IRQ=y</div><div class='hunk'>@@ -224,11 +217,11 @@ CONFIG_W1_SLAVE_THERM=m</div><div class='ctx'> CONFIG_POWER_RESET=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON_POWEROFF=y</div><div class='del'>-CONFIG_POWER_SUPPLY=y</div><div class='ctx'> CONFIG_RN5T618_POWER=m</div><div class='ctx'> CONFIG_SENSORS_MC13783_ADC=y</div><div class='ctx'> CONFIG_SENSORS_GPIO_FAN=y</div><div class='ctx'> CONFIG_SENSORS_IIO_HWMON=y</div><div class='add'>+CONFIG_SENSORS_JC42=m</div><div class='ctx'> CONFIG_SENSORS_LM75=m</div><div class='ctx'> CONFIG_SENSORS_PWM_FAN=y</div><div class='ctx'> CONFIG_SENSORS_SY7636A=y</div><div class='hunk'>@@ -253,6 +246,7 @@ CONFIG_MFD_ROHM_BD71828=y</div><div class='ctx'> CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_REGULATOR_ANATOP=y</div><div class='ctx'> CONFIG_REGULATOR_BD71815=y</div><div class='add'>+CONFIG_REGULATOR_BD71828=y</div><div class='ctx'> CONFIG_REGULATOR_DA9052=y</div><div class='ctx'> CONFIG_REGULATOR_DA9062=y</div><div class='ctx'> CONFIG_REGULATOR_DA9063=y</div><div class='hunk'>@@ -280,13 +274,13 @@ CONFIG_VIDEO_OV5645=m</div><div class='ctx'> CONFIG_VIDEO_ADV7180=m</div><div class='ctx'> CONFIG_IMX_IPUV3_CORE=y</div><div class='ctx'> CONFIG_DRM=y</div><div class='del'>-CONFIG_DRM_I2C_NXP_TDA998X=y</div><div class='ctx'> CONFIG_DRM_MSM=y</div><div class='ctx'> CONFIG_DRM_PANEL_LVDS=y</div><div class='del'>-CONFIG_DRM_PANEL_SIMPLE=y</div><div class='del'>-CONFIG_DRM_PANEL_EDP=y</div><div class='ctx'> CONFIG_DRM_PANEL_SEIKO_43WVF1G=y</div><div class='add'>+CONFIG_DRM_PANEL_EDP=y</div><div class='add'>+CONFIG_DRM_PANEL_SIMPLE=y</div><div class='ctx'> CONFIG_DRM_DISPLAY_CONNECTOR=y</div><div class='add'>+CONFIG_DRM_I2C_NXP_TDA998X=y</div><div class='ctx'> CONFIG_DRM_LVDS_CODEC=m</div><div class='ctx'> CONFIG_DRM_SII902X=y</div><div class='ctx'> CONFIG_DRM_TI_TFP410=y</div><div class='hunk'>@@ -307,7 +301,6 @@ CONFIG_LCD_PLATFORM=y</div><div class='ctx'> CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='ctx'> CONFIG_BACKLIGHT_PWM=y</div><div class='ctx'> CONFIG_BACKLIGHT_GPIO=y</div><div class='del'>-CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='ctx'> CONFIG_SOUND=y</div><div class='ctx'> CONFIG_SND=y</div><div class='hunk'>@@ -321,6 +314,7 @@ CONFIG_SND_SOC_IMX_SGTL5000=y</div><div class='ctx'> CONFIG_SND_SOC_FSL_ASOC_CARD=y</div><div class='ctx'> CONFIG_SND_SOC_AC97_CODEC=y</div><div class='ctx'> CONFIG_SND_SOC_CS42XX8_I2C=y</div><div class='add'>+CONFIG_SND_SOC_SPDIF=y</div><div class='ctx'> CONFIG_SND_SOC_TLV320AIC3X_I2C=y</div><div class='ctx'> CONFIG_SND_SOC_WM8960=y</div><div class='ctx'> CONFIG_SND_SOC_WM8962=y</div><div class='hunk'>@@ -342,6 +336,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=m</div><div class='ctx'> CONFIG_USB_SERIAL_OPTION=m</div><div class='ctx'> CONFIG_USB_TEST=m</div><div class='ctx'> CONFIG_USB_EHSET_TEST_FIXTURE=m</div><div class='add'>+CONFIG_USB_HSIC_USB3503=y</div><div class='ctx'> CONFIG_USB_ONBOARD_DEV=y</div><div class='ctx'> CONFIG_NOP_USB_XCEIV=y</div><div class='ctx'> CONFIG_USB_MXS_PHY=y</div><div class='hunk'>@@ -376,11 +371,8 @@ CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='ctx'> CONFIG_MMC_SDHCI_PLTFM=y</div><div class='ctx'> CONFIG_MMC_SDHCI_ESDHC_IMX=y</div><div class='del'>-CONFIG_NEW_LEDS=y</div><div class='del'>-CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_LEDS_GPIO=y</div><div class='ctx'> CONFIG_LEDS_PWM=y</div><div class='del'>-CONFIG_LEDS_TRIGGERS=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_TIMER=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_ONESHOT=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='hunk'>@@ -449,7 +441,6 @@ CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT3_FS_SECURITY=y</div><div class='ctx'> CONFIG_QUOTA=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='del'>-# CONFIG_PRINT_QUOTA_WARNING is not set</div><div class='ctx'> CONFIG_AUTOFS_FS=y</div><div class='ctx'> CONFIG_FUSE_FS=y</div><div class='ctx'> CONFIG_ISO9660_FS=m</div><div class='hunk'>@@ -477,10 +468,6 @@ CONFIG_SECURITYFS=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_CAAM=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_SAHARA=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_MXS_DCP=y</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_CRC7=m</div><div class='del'>-CONFIG_LIBCRC32C=m</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='hunk'>@@ -490,5 +477,4 @@ CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_SLUB_DEBUG is not set</div><div class='del'>-# CONFIG_SCHED_DEBUG is not set</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig<br/>index f55c231e0870..2d489186e945 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/lpc18xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/lpc18xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/lpc18xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/lpc18xx_defconfig</a></div><div class='hunk'>@@ -147,8 +147,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> # CONFIG_INOTIFY_USER is not set</div><div class='ctx'> CONFIG_JFFS2_FS=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='del'>-CONFIG_CRC7=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='head'>diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig<br/>index 98e267213b21..9afccd76446b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/lpc32xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/lpc32xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/lpc32xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/lpc32xx_defconfig</a></div><div class='hunk'>@@ -179,7 +179,6 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DYNAMIC_DEBUG=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/milbeaut_m10v_defconfig b/arch/arm/configs/milbeaut_m10v_defconfig<br/>index f5eeac9c65c3..a2995eb390c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/milbeaut_m10v_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/milbeaut_m10v_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/milbeaut_m10v_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/milbeaut_m10v_defconfig</a></div><div class='hunk'>@@ -93,24 +93,15 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_KEYS=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> # CONFIG_CRYPTO_ECHAINIV is not set</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_SEQIV=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='del'>-CONFIG_CRYPTO_CRC32_ARM_CE=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='head'>diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig<br/>index f6f9e135353e..842a989baa27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mmp2_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mmp2_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mmp2_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/mmp2_defconfig</a></div><div class='hunk'>@@ -67,7 +67,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/moxart_defconfig b/arch/arm/configs/moxart_defconfig<br/>index 34d079e03b3c..fa06d98e43fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/moxart_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/moxart_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/moxart_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/moxart_defconfig</a></div><div class='hunk'>@@ -118,7 +118,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CONFIGFS_FS=y</div><div class='ctx'> CONFIG_JFFS2_FS=y</div><div class='ctx'> CONFIG_KEYS=y</div><div class='del'>-CONFIG_CRC32_BIT=y</div><div class='ctx'> CONFIG_DMA_API_DEBUG=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v4t_defconfig b/arch/arm/configs/multi_v4t_defconfig<br/>index 27d650635d9b..1a86dc305523 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v4t_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v4t_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v4t_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/multi_v4t_defconfig</a></div><div class='hunk'>@@ -91,6 +91,5 @@ CONFIG_MSDOS_FS=y</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_MINIX_FS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='ctx'> CONFIG_DEBUG_USER=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig<br/>index 3f4ddcf49ec7..b523bc246c09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v5_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v5_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v5_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/multi_v5_defconfig</a></div><div class='hunk'>@@ -12,7 +12,6 @@ CONFIG_MACH_ASPEED_G4=y</div><div class='ctx'> CONFIG_ARCH_AT91=y</div><div class='ctx'> CONFIG_SOC_AT91SAM9=y</div><div class='ctx'> CONFIG_ARCH_DAVINCI=y</div><div class='del'>-CONFIG_ARCH_DAVINCI_DA830=y</div><div class='ctx'> CONFIG_ARCH_DAVINCI_DA850=y</div><div class='ctx'> CONFIG_ARCH_MXC=y</div><div class='ctx'> CONFIG_SOC_IMX25=y</div><div class='hunk'>@@ -289,8 +288,6 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig<br/>index 9a5f5c439b87..12f706e2ded5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v7_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/multi_v7_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/multi_v7_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/multi_v7_defconfig</a></div><div class='hunk'>@@ -20,6 +20,7 @@ CONFIG_ARCH_AT91=y</div><div class='ctx'> CONFIG_SOC_SAMA5D2=y</div><div class='ctx'> CONFIG_SOC_SAMA5D3=y</div><div class='ctx'> CONFIG_SOC_SAMA5D4=y</div><div class='add'>+CONFIG_SOC_SAMA7D65=y</div><div class='ctx'> CONFIG_SOC_SAMA7G5=y</div><div class='ctx'> CONFIG_SOC_LAN966=y</div><div class='ctx'> CONFIG_ARCH_BCM=y</div><div class='hunk'>@@ -86,10 +87,6 @@ CONFIG_SOC_AM33XX=y</div><div class='ctx'> CONFIG_SOC_AM43XX=y</div><div class='ctx'> CONFIG_SOC_DRA7XX=y</div><div class='ctx'> CONFIG_ARCH_QCOM=y</div><div class='del'>-CONFIG_ARCH_MSM8X60=y</div><div class='del'>-CONFIG_ARCH_MSM8916=y</div><div class='del'>-CONFIG_ARCH_MSM8960=y</div><div class='del'>-CONFIG_ARCH_MSM8974=y</div><div class='ctx'> CONFIG_ARCH_ROCKCHIP=y</div><div class='ctx'> CONFIG_ARCH_RENESAS=y</div><div class='ctx'> CONFIG_ARCH_INTEL_SOCFPGA=y</div><div class='hunk'>@@ -343,6 +340,7 @@ CONFIG_INPUT_MAX77693_HAPTIC=m</div><div class='ctx'> CONFIG_INPUT_MAX8997_HAPTIC=m</div><div class='ctx'> CONFIG_INPUT_GPIO_DECODER=m</div><div class='ctx'> CONFIG_INPUT_CPCAP_PWRBUTTON=m</div><div class='add'>+CONFIG_INPUT_TPS65219_PWRBUTTON=m</div><div class='ctx'> CONFIG_INPUT_AXP20X_PEK=m</div><div class='ctx'> CONFIG_INPUT_DA9063_ONKEY=m</div><div class='ctx'> CONFIG_INPUT_ADXL34X=m</div><div class='hunk'>@@ -611,12 +609,13 @@ CONFIG_MFD_QCOM_RPM=y</div><div class='ctx'> CONFIG_MFD_SPMI_PMIC=y</div><div class='ctx'> CONFIG_MFD_RK8XX_I2C=y</div><div class='ctx'> CONFIG_MFD_RN5T618=y</div><div class='del'>-CONFIG_MFD_SEC_CORE=y</div><div class='add'>+CONFIG_MFD_SEC_I2C=y</div><div class='ctx'> CONFIG_MFD_STMPE=y</div><div class='ctx'> CONFIG_MFD_PALMAS=y</div><div class='ctx'> CONFIG_MFD_TPS65090=y</div><div class='ctx'> CONFIG_MFD_TPS65217=y</div><div class='ctx'> CONFIG_MFD_TPS65218=y</div><div class='add'>+CONFIG_MFD_TPS65219=y</div><div class='ctx'> CONFIG_MFD_TPS6586X=y</div><div class='ctx'> CONFIG_MFD_TPS65910=y</div><div class='ctx'> CONFIG_MFD_STM32_LPTIMER=m</div><div class='hunk'>@@ -666,6 +665,7 @@ CONFIG_REGULATOR_TPS62360=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65090=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65217=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65218=y</div><div class='add'>+CONFIG_REGULATOR_TPS65219=y</div><div class='ctx'> CONFIG_REGULATOR_TPS6586X=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65910=y</div><div class='ctx'> CONFIG_REGULATOR_TWL4030=y</div><div class='hunk'>@@ -713,10 +713,10 @@ CONFIG_VIDEO_ADV7604_CEC=y</div><div class='ctx'> CONFIG_VIDEO_ML86V7667=m</div><div class='ctx'> CONFIG_IMX_IPUV3_CORE=m</div><div class='ctx'> CONFIG_DRM=y</div><div class='del'>-# CONFIG_DRM_I2C_CH7006 is not set</div><div class='del'>-# CONFIG_DRM_I2C_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_I2C_NXP_TDA998X=m</div><div class='ctx'> CONFIG_DRM_NOUVEAU=m</div><div class='add'>+# CONFIG_DRM_NOUVEAU_CH7006 is not set</div><div class='add'>+# CONFIG_DRM_NOUVEAU_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_EXYNOS=m</div><div class='ctx'> CONFIG_DRM_EXYNOS_FIMD=y</div><div class='ctx'> CONFIG_DRM_EXYNOS_MIXER=y</div><div class='hunk'>@@ -791,7 +791,12 @@ CONFIG_SND_HDA_TEGRA=m</div><div class='ctx'> CONFIG_SND_HDA_INPUT_BEEP=y</div><div class='ctx'> CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_REALTEK=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK_LIB=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC269=m</div><div class='ctx'> CONFIG_SND_HDA_CODEC_HDMI=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_GENERIC=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_NVIDIA=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_TEGRA=m</div><div class='ctx'> CONFIG_SND_USB_AUDIO=m</div><div class='ctx'> CONFIG_SND_SOC=m</div><div class='ctx'> CONFIG_SND_ATMEL_SOC=m</div><div class='hunk'>@@ -1120,25 +1125,6 @@ CONFIG_QCOM_SMSM=y</div><div class='ctx'> CONFIG_QCOM_SOCINFO=m</div><div class='ctx'> CONFIG_QCOM_STATS=m</div><div class='ctx'> CONFIG_QCOM_WCNSS_CTRL=m</div><div class='del'>-CONFIG_ARCH_EMEV2=y</div><div class='del'>-CONFIG_ARCH_R8A7794=y</div><div class='del'>-CONFIG_ARCH_R8A7779=y</div><div class='del'>-CONFIG_ARCH_R8A7790=y</div><div class='del'>-CONFIG_ARCH_R8A7778=y</div><div class='del'>-CONFIG_ARCH_R8A7793=y</div><div class='del'>-CONFIG_ARCH_R8A7791=y</div><div class='del'>-CONFIG_ARCH_R8A7792=y</div><div class='del'>-CONFIG_ARCH_R8A7740=y</div><div class='del'>-CONFIG_ARCH_R8A73A4=y</div><div class='del'>-CONFIG_ARCH_R7S72100=y</div><div class='del'>-CONFIG_ARCH_R7S9210=y</div><div class='del'>-CONFIG_ARCH_R8A77470=y</div><div class='del'>-CONFIG_ARCH_R8A7745=y</div><div class='del'>-CONFIG_ARCH_R8A7742=y</div><div class='del'>-CONFIG_ARCH_R8A7743=y</div><div class='del'>-CONFIG_ARCH_R8A7744=y</div><div class='del'>-CONFIG_ARCH_R9A06G032=y</div><div class='del'>-CONFIG_ARCH_SH73A0=y</div><div class='ctx'> CONFIG_ROCKCHIP_IODOMAIN=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_2x_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_3x_SOC=y</div><div class='hunk'>@@ -1202,7 +1188,7 @@ CONFIG_PWM_BCM2835=y</div><div class='ctx'> CONFIG_PWM_BRCMSTB=m</div><div class='ctx'> CONFIG_PWM_FSL_FTM=m</div><div class='ctx'> CONFIG_PWM_MESON=m</div><div class='del'>-CONFIG_PWM_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=m</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='ctx'> CONFIG_PWM_ROCKCHIP=m</div><div class='ctx'> CONFIG_PWM_SAMSUNG=m</div><div class='hunk'>@@ -1298,15 +1284,9 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='del'>-CONFIG_CRYPTO_CRC32_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_SUN4I_SS=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_CAAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_EXYNOS_RNG=m</div><div class='hunk'>@@ -1318,10 +1298,12 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_QCE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_QCOM_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_ROCKCHIP=m</div><div class='del'>-CONFIG_CRYPTO_DEV_STM32_CRC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_STM32_HASH=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_STM32_CRYP=m</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_KERNEL=y</div><div class='add'>+CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='add'>+CONFIG_DEBUG_INFO_REDUCED=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/arm/configs/mvebu_v5_defconfig b/arch/arm/configs/mvebu_v5_defconfig<br/>index 2467afd32146..23dbb80fcc2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mvebu_v5_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mvebu_v5_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mvebu_v5_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/mvebu_v5_defconfig</a></div><div class='hunk'>@@ -187,8 +187,6 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig<br/>index 43bc1255a5db..3b08c63b6de4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mxs_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/mxs_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/mxs_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/mxs_defconfig</a></div><div class='hunk'>@@ -32,9 +32,6 @@ CONFIG_INET=y</div><div class='ctx'> CONFIG_IP_PNP=y</div><div class='ctx'> CONFIG_IP_PNP_DHCP=y</div><div class='ctx'> CONFIG_SYN_COOKIES=y</div><div class='del'>-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='del'>-# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='del'>-# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='ctx'> # CONFIG_INET_DIAG is not set</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> CONFIG_CAN=m</div><div class='hunk'>@@ -45,7 +42,6 @@ CONFIG_MTD=y</div><div class='ctx'> CONFIG_MTD_CMDLINE_PARTS=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_DATAFLASH=y</div><div class='del'>-CONFIG_MTD_M25P80=y</div><div class='ctx'> CONFIG_MTD_SST25L=y</div><div class='ctx'> CONFIG_MTD_RAW_NAND=y</div><div class='ctx'> CONFIG_MTD_NAND_GPMI_NAND=y</div><div class='hunk'>@@ -60,7 +56,6 @@ CONFIG_ENC28J60=y</div><div class='ctx'> CONFIG_ICPLUS_PHY=y</div><div class='ctx'> CONFIG_MICREL_PHY=y</div><div class='ctx'> CONFIG_REALTEK_PHY=y</div><div class='del'>-CONFIG_SMSC_PHY=y</div><div class='ctx'> CONFIG_CAN_FLEXCAN=m</div><div class='ctx'> CONFIG_USB_USBNET=y</div><div class='ctx'> CONFIG_USB_NET_SMSC95XX=y</div><div class='hunk'>@@ -69,21 +64,22 @@ CONFIG_INPUT_EVDEV=y</div><div class='ctx'> # CONFIG_INPUT_KEYBOARD is not set</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='add'>+CONFIG_TOUCHSCREEN_EDT_FT5X06=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_MXS_LRADC=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_TSC2007=m</div><div class='add'>+CONFIG_INPUT_MISC=y</div><div class='add'>+CONFIG_INPUT_PWM_BEEPER=y</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_MXS_AUART=y</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='del'>-# CONFIG_I2C_COMPAT is not set</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_MXS=y</div><div class='ctx'> CONFIG_SPI=y</div><div class='ctx'> CONFIG_SPI_GPIO=m</div><div class='ctx'> CONFIG_SPI_MXS=y</div><div class='del'>-CONFIG_GPIO_SYSFS=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_STMP3XXX_RTC_WATCHDOG=y</div><div class='hunk'>@@ -138,10 +134,6 @@ CONFIG_PWM_MXS=y</div><div class='ctx'> CONFIG_NVMEM_MXS_OCOTP=y</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='del'>-CONFIG_NETFS_SUPPORT=m</div><div class='del'>-CONFIG_FSCACHE=y</div><div class='del'>-CONFIG_FSCACHE_STATS=y</div><div class='del'>-CONFIG_CACHEFILES=m</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_TMPFS_POSIX_ACL=y</div><div class='hunk'>@@ -160,8 +152,6 @@ CONFIG_NLS_CODEPAGE_850=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_MXS_DCP=y</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='del'>-CONFIG_CRC7=m</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig<br/>index 025b595dd837..661e5d6894bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/omap1_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/omap1_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/omap1_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/omap1_defconfig</a></div><div class='hunk'>@@ -221,7 +221,6 @@ CONFIG_CRYPTO_PCBC=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig<br/>index 3a166c2f02bd..1d5f75241739 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/omap2plus_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/omap2plus_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/omap2plus_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/omap2plus_defconfig</a></div><div class='hunk'>@@ -13,7 +13,6 @@ CONFIG_MEMCG=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='ctx'> CONFIG_CGROUP_SCHED=y</div><div class='ctx'> CONFIG_CFS_BANDWIDTH=y</div><div class='del'>-CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CGROUP_DEVICE=y</div><div class='hunk'>@@ -143,7 +142,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CPU=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DSCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='hunk'>@@ -386,6 +384,7 @@ CONFIG_TOUCHSCREEN_TSC2007=m</div><div class='ctx'> CONFIG_INPUT_MISC=y</div><div class='ctx'> CONFIG_INPUT_CPCAP_PWRBUTTON=m</div><div class='ctx'> CONFIG_INPUT_TPS65218_PWRBUTTON=m</div><div class='add'>+CONFIG_INPUT_TPS65219_PWRBUTTON=m</div><div class='ctx'> CONFIG_INPUT_TWL4030_PWRBUTTON=m</div><div class='ctx'> CONFIG_INPUT_UINPUT=m</div><div class='ctx'> CONFIG_INPUT_PALMAS_PWRBUTTON=m</div><div class='hunk'>@@ -428,6 +427,7 @@ CONFIG_POWER_RESET_GPIO=y</div><div class='ctx'> CONFIG_BATTERY_BQ27XXX=m</div><div class='ctx'> CONFIG_CHARGER_ISP1704=m</div><div class='ctx'> CONFIG_CHARGER_TWL4030=m</div><div class='add'>+CONFIG_CHARGER_TWL6030=m</div><div class='ctx'> CONFIG_CHARGER_BQ2415X=m</div><div class='ctx'> CONFIG_CHARGER_BQ24190=m</div><div class='ctx'> CONFIG_CHARGER_BQ24735=m</div><div class='hunk'>@@ -454,6 +454,7 @@ CONFIG_MFD_TPS65217=y</div><div class='ctx'> CONFIG_MFD_TI_LP873X=y</div><div class='ctx'> CONFIG_MFD_TI_LP87565=y</div><div class='ctx'> CONFIG_MFD_TPS65218=y</div><div class='add'>+CONFIG_MFD_TPS65219=y</div><div class='ctx'> CONFIG_MFD_TPS65910=y</div><div class='ctx'> CONFIG_TWL6040_CORE=y</div><div class='ctx'> CONFIG_REGULATOR_CPCAP=y</div><div class='hunk'>@@ -470,6 +471,7 @@ CONFIG_REGULATOR_TPS65023=y</div><div class='ctx'> CONFIG_REGULATOR_TPS6507X=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65217=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65218=y</div><div class='add'>+CONFIG_REGULATOR_TPS65219=y</div><div class='ctx'> CONFIG_REGULATOR_TPS65910=y</div><div class='ctx'> CONFIG_REGULATOR_TWL4030=y</div><div class='ctx'> CONFIG_RC_CORE=m</div><div class='hunk'>@@ -608,6 +610,7 @@ CONFIG_LEDS_LP5523=m</div><div class='ctx'> CONFIG_LEDS_PCA963X=m</div><div class='ctx'> CONFIG_LEDS_PWM=m</div><div class='ctx'> CONFIG_LEDS_BD2606MVV=m</div><div class='add'>+CONFIG_LEDS_TCA6507=m</div><div class='ctx'> CONFIG_LEDS_TRIGGERS=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_TIMER=m</div><div class='ctx'> CONFIG_LEDS_TRIGGER_ONESHOT=m</div><div class='hunk'>@@ -642,6 +645,8 @@ CONFIG_TI_EMIF_SRAM=m</div><div class='ctx'> CONFIG_IIO=m</div><div class='ctx'> CONFIG_IIO_SW_DEVICE=m</div><div class='ctx'> CONFIG_IIO_SW_TRIGGER=m</div><div class='add'>+CONFIG_BMA180=m</div><div class='add'>+CONFIG_BMC150_ACCEL=m</div><div class='ctx'> CONFIG_IIO_ST_ACCEL_3AXIS=m</div><div class='ctx'> CONFIG_KXCJK1013=m</div><div class='ctx'> CONFIG_CPCAP_ADC=m</div><div class='hunk'>@@ -649,10 +654,15 @@ CONFIG_INA2XX_ADC=m</div><div class='ctx'> CONFIG_TI_AM335X_ADC=m</div><div class='ctx'> CONFIG_TWL4030_MADC=m</div><div class='ctx'> CONFIG_TWL6030_GPADC=m</div><div class='add'>+CONFIG_BMG160=m</div><div class='ctx'> CONFIG_MPU3050_I2C=m</div><div class='add'>+CONFIG_ITG3200=m</div><div class='add'>+CONFIG_BOSCH_BNO055_I2C=m</div><div class='ctx'> CONFIG_INV_MPU6050_I2C=m</div><div class='ctx'> CONFIG_SENSORS_ISL29028=m</div><div class='ctx'> CONFIG_AK8975=m</div><div class='add'>+CONFIG_BMC150_MAGN_I2C=m</div><div class='add'>+CONFIG_SENSORS_HMC5843_I2C=m</div><div class='ctx'> CONFIG_BMP280=m</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_OMAP_DMTIMER=m</div><div class='hunk'>@@ -696,21 +706,12 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=y</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_SHAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_AES=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_DES=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='del'>-CONFIG_CRC7=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='head'>diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig<br/>index 0629b088a584..62b9c6102789 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/orion5x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/orion5x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/orion5x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/orion5x_defconfig</a></div><div class='hunk'>@@ -136,7 +136,6 @@ CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig<br/>index ce10fe2104bf..4748c7d33cb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa168_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa168_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa168_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/pxa168_defconfig</a></div><div class='hunk'>@@ -41,7 +41,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig<br/>index 1f28aea86014..49b59c600ae1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa910_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa910_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa910_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/pxa910_defconfig</a></div><div class='hunk'>@@ -50,7 +50,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig<br/>index e1cb170c2bf0..70489f3555d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/pxa_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/pxa_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/pxa_defconfig</a></div><div class='hunk'>@@ -335,7 +335,7 @@ CONFIG_MFD_MAX77693=y</div><div class='ctx'> CONFIG_MFD_MAX8907=m</div><div class='ctx'> CONFIG_EZX_PCAP=y</div><div class='ctx'> CONFIG_UCB1400_CORE=m</div><div class='del'>-CONFIG_MFD_SEC_CORE=y</div><div class='add'>+CONFIG_MFD_SEC_I2C=y</div><div class='ctx'> CONFIG_MFD_PALMAS=y</div><div class='ctx'> CONFIG_MFD_TPS65090=y</div><div class='ctx'> CONFIG_MFD_TPS6586X=y</div><div class='hunk'>@@ -498,7 +498,6 @@ CONFIG_USB_LEGOTOWER=m</div><div class='ctx'> CONFIG_USB_LCD=m</div><div class='ctx'> CONFIG_USB_CYTHERM=m</div><div class='ctx'> CONFIG_USB_IDMOUSE=m</div><div class='del'>-CONFIG_USB_GPIO_VBUS=y</div><div class='ctx'> CONFIG_USB_GPIO_VBUS=m</div><div class='ctx'> CONFIG_USB_ISP1301=m</div><div class='ctx'> CONFIG_USB_GADGET=m</div><div class='hunk'>@@ -583,10 +582,6 @@ CONFIG_EXT2_FS_SECURITY=y</div><div class='ctx'> CONFIG_EXT3_FS=y</div><div class='ctx'> CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT3_FS_SECURITY=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='del'>-CONFIG_REISERFS_FS_XATTR=y</div><div class='del'>-CONFIG_REISERFS_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_REISERFS_FS_SECURITY=y</div><div class='ctx'> CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='ctx'> CONFIG_FUSE_FS=m</div><div class='hunk'>@@ -640,10 +635,9 @@ CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_TIMER_STATS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='ctx'> CONFIG_CRYPTO_AUTHENC=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='hunk'>@@ -656,7 +650,6 @@ CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=m</div><div class='ctx'> CONFIG_CRYPTO_TGR192=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='hunk'>@@ -664,12 +657,7 @@ CONFIG_CRYPTO_ANUBIS=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig<br/>index ec52ccece0ca..fa681a7a49c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/qcom_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/qcom_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/qcom_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/qcom_defconfig</a></div><div class='hunk'>@@ -10,9 +10,6 @@ CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_ARCH_QCOM=y</div><div class='del'>-CONFIG_ARCH_MSM8X60=y</div><div class='del'>-CONFIG_ARCH_MSM8960=y</div><div class='del'>-CONFIG_ARCH_MSM8974=y</div><div class='ctx'> CONFIG_ARCH_MDM9615=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_ARM_PSCI=y</div><div class='hunk'>@@ -187,7 +184,6 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='ctx'> CONFIG_USB_OTG=y</div><div class='ctx'> CONFIG_USB_MON=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD=y</div><div class='del'>-CONFIG_USB_EHCI_MSM=y</div><div class='ctx'> CONFIG_USB_ACM=y</div><div class='ctx'> CONFIG_USB_DWC3=y</div><div class='ctx'> CONFIG_USB_CHIPIDEA=y</div><div class='head'>diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig<br/>index a37e6ac40825..967b1cb22136 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/s3c6400_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/s3c6400_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/s3c6400_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/s3c6400_defconfig</a></div><div class='hunk'>@@ -11,7 +11,6 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> CONFIG_MTD=y</div><div class='ctx'> CONFIG_MTD_RAW_NAND=y</div><div class='del'>-CONFIG_MTD_NAND_S3C2410=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_EEPROM_AT24=y</div><div class='head'>diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig<br/>index 5dbe85c263de..02121eec3658 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/s5pv210_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/s5pv210_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/s5pv210_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/s5pv210_defconfig</a></div><div class='hunk'>@@ -113,7 +113,6 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig<br/>index 9096a99b5abd..2cad045e1d8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/sama5_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/sama5_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/sama5_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/sama5_defconfig</a></div><div class='hunk'>@@ -95,6 +95,7 @@ CONFIG_LIBERTAS_THINFIRM_USB=m</div><div class='ctx'> CONFIG_MWIFIEX=m</div><div class='ctx'> CONFIG_MWIFIEX_SDIO=m</div><div class='ctx'> CONFIG_MWIFIEX_USB=m</div><div class='add'>+CONFIG_WILC1000_SDIO=m</div><div class='ctx'> CONFIG_RT2X00=m</div><div class='ctx'> CONFIG_RT2500USB=m</div><div class='ctx'> CONFIG_RT73USB=m</div><div class='hunk'>@@ -212,6 +213,7 @@ CONFIG_VIDEO_HANTRO=m</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_AT91_ADC=y</div><div class='ctx'> CONFIG_AT91_SAMA5D2_ADC=y</div><div class='add'>+CONFIG_PAC1934=m</div><div class='ctx'> CONFIG_ENVELOPE_DETECTOR=m</div><div class='ctx'> CONFIG_DPOT_DAC=m</div><div class='ctx'> CONFIG_MCP4531=m</div><div class='head'>diff --git a/arch/arm/configs/sama7_defconfig b/arch/arm/configs/sama7_defconfig<br/>index 7fa5d251ced2..e14720a9a5ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/sama7_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/sama7_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/sama7_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/sama7_defconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_IO_URING is not set</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_ARCH_AT91=y</div><div class='add'>+CONFIG_SOC_SAMA7D65=y</div><div class='ctx'> CONFIG_SOC_SAMA7G5=y</div><div class='ctx'> CONFIG_ATMEL_CLOCKSOURCE_TCB=y</div><div class='ctx'> # CONFIG_CACHE_L2X0 is not set</div><div class='hunk'>@@ -193,6 +194,7 @@ CONFIG_STAGING=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_IIO_SW_TRIGGER=y</div><div class='ctx'> CONFIG_AT91_SAMA5D2_ADC=y</div><div class='add'>+CONFIG_PAC1934=m</div><div class='ctx'> CONFIG_PWM=y</div><div class='ctx'> CONFIG_PWM_ATMEL=y</div><div class='ctx'> CONFIG_MCHP_EIC=y</div><div class='hunk'>@@ -225,8 +227,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_AES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_TDES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_SHA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=32</div><div class='ctx'> CONFIG_CMA_ALIGNMENT=9</div><div class='head'>diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig<br/>index 0e380e450a62..e4cb33b2bcee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/shmobile_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/shmobile_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/shmobile_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/shmobile_defconfig</a></div><div class='hunk'>@@ -14,6 +14,7 @@ CONFIG_SCHED_MC=y</div><div class='ctx'> CONFIG_NR_CPUS=8</div><div class='ctx'> CONFIG_HIGHMEM=y</div><div class='ctx'> CONFIG_ARM_APPENDED_DTB=y</div><div class='add'>+CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='ctx'> CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_FREQ_STAT=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='hunk'>@@ -57,11 +58,13 @@ CONFIG_SH_ETH=y</div><div class='ctx'> CONFIG_RAVB=y</div><div class='ctx'> CONFIG_SMSC911X=y</div><div class='ctx'> CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_DWMAC_RENESAS_GBETH is not set</div><div class='ctx'> CONFIG_MICREL_PHY=y</div><div class='ctx'> CONFIG_SMSC_PHY=y</div><div class='ctx'> CONFIG_CAN_RCAR=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_KEYBOARD_GPIO=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO_POLLED=y</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_EDT_FT5X06=y</div><div class='hunk'>@@ -83,6 +86,7 @@ CONFIG_SERIAL_8250_EM=y</div><div class='ctx'> CONFIG_SERIAL_SH_SCI=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_DEMUX_PINCTRL=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_CORE=y</div><div class='ctx'> CONFIG_I2C_EMEV2=y</div><div class='ctx'> CONFIG_I2C_GPIO=y</div><div class='ctx'> CONFIG_I2C_RIIC=y</div><div class='hunk'>@@ -103,7 +107,7 @@ CONFIG_GPIO_PCF857X=y</div><div class='ctx'> CONFIG_POWER_RESET=y</div><div class='ctx'> CONFIG_POWER_RESET_RMOBILE=y</div><div class='ctx'> CONFIG_POWER_SUPPLY=y</div><div class='del'>-# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_SENSORS_LM75=y</div><div class='ctx'> CONFIG_THERMAL=y</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_RCAR_THERMAL=y</div><div class='hunk'>@@ -173,6 +177,9 @@ CONFIG_USB_RENESAS_USBHS_UDC=y</div><div class='ctx'> CONFIG_USB_RENESAS_USBF=y</div><div class='ctx'> CONFIG_USB_ETH=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_SDHCI_OF_ARASAN=y</div><div class='ctx'> CONFIG_MMC_SDHI=y</div><div class='ctx'> CONFIG_MMC_SH_MMCIF=y</div><div class='ctx'> CONFIG_NEW_LEDS=y</div><div class='hunk'>@@ -192,30 +199,12 @@ CONFIG_DW_DMAC=y</div><div class='ctx'> CONFIG_RZN1_DMAMUX=y</div><div class='ctx'> CONFIG_RCAR_DMAC=y</div><div class='ctx'> CONFIG_RENESAS_USB_DMAC=y</div><div class='add'>+CONFIG_RZ_DMAC=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='del'>-CONFIG_ARCH_EMEV2=y</div><div class='del'>-CONFIG_ARCH_R8A7794=y</div><div class='del'>-CONFIG_ARCH_R8A7779=y</div><div class='del'>-CONFIG_ARCH_R8A7790=y</div><div class='del'>-CONFIG_ARCH_R8A7778=y</div><div class='del'>-CONFIG_ARCH_R8A7793=y</div><div class='del'>-CONFIG_ARCH_R8A7791=y</div><div class='del'>-CONFIG_ARCH_R8A7792=y</div><div class='del'>-CONFIG_ARCH_R8A7740=y</div><div class='del'>-CONFIG_ARCH_R8A73A4=y</div><div class='del'>-CONFIG_ARCH_R7S72100=y</div><div class='del'>-CONFIG_ARCH_R7S9210=y</div><div class='del'>-CONFIG_ARCH_R8A77470=y</div><div class='del'>-CONFIG_ARCH_R8A7745=y</div><div class='del'>-CONFIG_ARCH_R8A7742=y</div><div class='del'>-CONFIG_ARCH_R8A7743=y</div><div class='del'>-CONFIG_ARCH_R8A7744=y</div><div class='del'>-CONFIG_ARCH_R9A06G032=y</div><div class='del'>-CONFIG_ARCH_SH73A0=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_AK8975=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='del'>-CONFIG_PWM_RCAR=y</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=y</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='ctx'> CONFIG_PHY_RCAR_GEN2=y</div><div class='ctx'> CONFIG_PHY_RCAR_GEN3_USB2=y</div><div class='head'>diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig<br/>index 294d16ddeb18..ac2a0f998c73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/spitz_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/spitz_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/spitz_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/spitz_defconfig</a></div><div class='hunk'>@@ -215,7 +215,7 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_CRYPTO_NULL=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_SHA256=m</div><div class='ctx'> CONFIG_CRYPTO_AES=m</div><div class='hunk'>@@ -234,8 +234,6 @@ CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_LIBCRC32C=m</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig<br/>index 3baec075d1ef..dcd9c316072e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/stm32_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/stm32_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/stm32_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/stm32_defconfig</a></div><div class='hunk'>@@ -6,23 +6,25 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_UID16 is not set</div><div class='add'>+# CONFIG_POSIX_TIMERS is not set</div><div class='ctx'> CONFIG_BASE_SMALL=y</div><div class='ctx'> # CONFIG_FUTEX is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_SIGNALFD is not set</div><div class='ctx'> # CONFIG_EVENTFD is not set</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='del'>-# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IO_URING is not set</div><div class='add'>+# CONFIG_ADVISE_SYSCALLS is not set</div><div class='ctx'> # CONFIG_MMU is not set</div><div class='ctx'> CONFIG_ARCH_STM32=y</div><div class='ctx'> CONFIG_CPU_V7M_NUM_IRQ=240</div><div class='ctx'> CONFIG_SET_MEM_PARAM=y</div><div class='ctx'> CONFIG_DRAM_BASE=0x90000000</div><div class='del'>-CONFIG_FLASH_MEM_BASE=0x08000000</div><div class='del'>-CONFIG_FLASH_SIZE=0x00200000</div><div class='ctx'> # CONFIG_ATAGS is not set</div><div class='ctx'> CONFIG_XIP_KERNEL=y</div><div class='ctx'> CONFIG_XIP_PHYS_ADDR=0x08008000</div><div class='add'>+# CONFIG_SUSPEND is not set</div><div class='add'>+# CONFIG_GCC_PLUGINS is not set</div><div class='ctx'> CONFIG_BINFMT_FLAT=y</div><div class='ctx'> # CONFIG_COREDUMP is not set</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='hunk'>@@ -63,6 +65,7 @@ CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_STM32_DMA=y</div><div class='ctx'> CONFIG_STM32_DMAMUX=y</div><div class='ctx'> CONFIG_STM32_MDMA=y</div><div class='add'>+# CONFIG_COMMON_CLK_STM32MP is not set</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_STM32_ADC_CORE=y</div><div class='ctx'> CONFIG_STM32_ADC=y</div><div class='hunk'>@@ -71,13 +74,8 @@ CONFIG_EXT3_FS=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> # CONFIG_INOTIFY_USER is not set</div><div class='ctx'> CONFIG_NLS=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='del'>-CONFIG_CRC7=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='del'>-# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> # CONFIG_SLUB_DEBUG is not set</div><div class='del'>-# CONFIG_SCHED_DEBUG is not set</div><div class='del'>-CONFIG_CRYPTO=y</div><div class='head'>diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig<br/>index d2a094ad360c..ba863b445417 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/tegra_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/tegra_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/tegra_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/tegra_defconfig</a></div><div class='hunk'>@@ -6,7 +6,6 @@ CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='ctx'> CONFIG_CGROUPS=y</div><div class='ctx'> CONFIG_CGROUP_SCHED=y</div><div class='del'>-CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_CGROUP_DEBUG=y</div><div class='hunk'>@@ -226,7 +225,12 @@ CONFIG_SND_HDA_TEGRA=y</div><div class='ctx'> CONFIG_SND_HDA_INPUT_BEEP=y</div><div class='ctx'> CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_REALTEK=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK_LIB=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC269=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_HDMI=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_GENERIC=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_NVIDIA=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_TEGRA=y</div><div class='ctx'> # CONFIG_SND_ARM is not set</div><div class='ctx'> # CONFIG_SND_SPI is not set</div><div class='ctx'> # CONFIG_SND_USB is not set</div><div class='head'>diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig<br/>index 0f55815eecb3..9c8dc6dd5fe3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/u8500_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/u8500_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/u8500_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/u8500_defconfig</a></div><div class='hunk'>@@ -40,7 +40,7 @@ CONFIG_MAC80211_LEDS=y</div><div class='ctx'> CONFIG_CAIF=y</div><div class='ctx'> CONFIG_NFC=m</div><div class='ctx'> CONFIG_NFC_HCI=m</div><div class='del'>-CONFIG_NFC_SHDLC=m</div><div class='add'>+CONFIG_NFC_SHDLC=y</div><div class='ctx'> CONFIG_NFC_PN544_I2C=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='head'>diff --git a/arch/arm/configs/wpcm450_defconfig b/arch/arm/configs/wpcm450_defconfig<br/>index 45483deab034..cd4b3e70ff68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/wpcm450_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/configs/wpcm450_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/configs/wpcm450_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/configs/wpcm450_defconfig</a></div><div class='hunk'>@@ -191,9 +191,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y</div><div class='ctx'> CONFIG_X509_CERTIFICATE_PARSER=y</div><div class='ctx'> CONFIG_PKCS7_MESSAGE_PARSER=y</div><div class='ctx'> CONFIG_SYSTEM_TRUSTED_KEYRING=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig<br/>index 5ff49a5e9afc..c436eec22d86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/Kconfig</a></div><div class='hunk'>@@ -2,17 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> menu "Accelerated Cryptographic Algorithms for CPU (arm)"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CURVE25519_NEON</div><div class='del'>-	tristate "Public key crypto: Curve25519 (NEON)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_LIB_CURVE25519_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CURVE25519</div><div class='del'>-	help</div><div class='del'>-	  Curve25519 algorithm</div><div class='del'>-</div><div class='del'>-	  Architecture: arm with</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_GHASH_ARM_CE</div><div class='ctx'> 	tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -44,29 +33,6 @@ config CRYPTO_NHPOLY1305_NEON</div><div class='ctx'> 	  Architecture: arm using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_ARM</div><div class='del'>-	tristate "Hash functions: Poly1305 (NEON)"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm optionally using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_BLAKE2S_ARM</div><div class='del'>-	bool "Hash functions: BLAKE2s"</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S</div><div class='del'>-	help</div><div class='del'>-	  BLAKE2s cryptographic hash function (RFC 7693)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm</div><div class='del'>-</div><div class='del'>-	  This is faster than the generic implementations of BLAKE2s and</div><div class='del'>-	  BLAKE2b, but slower than the NEON implementation of BLAKE2b.</div><div class='del'>-	  There is no NEON implementation of BLAKE2s, since NEON doesn't</div><div class='del'>-	  really help with it.</div><div class='del'>-</div><div class='ctx'> config CRYPTO_BLAKE2B_NEON</div><div class='ctx'> 	tristate "Hash functions: BLAKE2b (NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -83,68 +49,6 @@ config CRYPTO_BLAKE2B_NEON</div><div class='ctx'> 	  much faster than the SHA-2 family and slightly faster than</div><div class='ctx'> 	  SHA-1.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA1_ARM</div><div class='del'>-	tristate "Hash functions: SHA-1"</div><div class='del'>-	select CRYPTO_SHA1</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_ARM_NEON</div><div class='del'>-	tristate "Hash functions: SHA-1 (NEON)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SHA1_ARM</div><div class='del'>-	select CRYPTO_SHA1</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_ARM_CE</div><div class='del'>-	tristate "Hash functions: SHA-1 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SHA1_ARM</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA2_ARM_CE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SHA256_ARM</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA256_ARM</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (NEON)"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	depends on !CPU_V7M</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA512_ARM</div><div class='del'>-	tristate "Hash functions: SHA-384 and SHA-512 (NEON)"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	depends on !CPU_V7M</div><div class='del'>-	help</div><div class='del'>-	  SHA-384 and SHA-512 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AES_ARM</div><div class='ctx'> 	tristate "Ciphers: AES"</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='hunk'>@@ -169,7 +73,6 @@ config CRYPTO_AES_ARM_BS</div><div class='ctx'> 	select CRYPTO_AES_ARM</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	  with block cipher modes:</div><div class='hunk'>@@ -197,7 +100,6 @@ config CRYPTO_AES_ARM_CE</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	   with block cipher modes:</div><div class='hunk'>@@ -211,41 +113,5 @@ config CRYPTO_AES_ARM_CE</div><div class='ctx'> 	  Architecture: arm using:</div><div class='ctx'> 	  - ARMv8 Crypto Extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_NEON</div><div class='del'>-	tristate "Ciphers: ChaCha20, XChaCha20, XChaCha12 (NEON)"</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_CRC32_ARM_CE</div><div class='del'>-	tristate "CRC32C and CRC32"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	depends on CRC32</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)</div><div class='del'>-	  and CRC32 CRC algorithm (IEEE 802.3)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using:</div><div class='del'>-	  - CRC and/or PMULL instructions</div><div class='del'>-</div><div class='del'>-	  Drivers: crc32-arm-ce and crc32c-arm-ce</div><div class='del'>-</div><div class='del'>-config CRYPTO_CRCT10DIF_ARM_CE</div><div class='del'>-	tristate "CRCT10DIF"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	depends on CRC_T10DIF</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using:</div><div class='del'>-	  - PMULL (Polynomial Multiply Long) instructions</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/crypto/Makefile b/arch/arm/crypto/Makefile<br/>index 13e62c7c25dc..6346a73effc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/Makefile</a></div><div class='hunk'>@@ -5,60 +5,15 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM) += aes-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_BLAKE2S_ARM) += libblake2s-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_BLAKE2B_NEON) += blake2b-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CURVE25519_NEON) += curve25519-neon.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_ARM_CE) += ghash-arm-ce.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRCT10DIF_ARM_CE) += crct10dif-arm-ce.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32_ARM_CE) += crc32-arm-ce.o</div><div class='ctx'> </div><div class='ctx'> aes-arm-y	:= aes-cipher-core.o aes-cipher-glue.o</div><div class='ctx'> aes-arm-bs-y	:= aes-neonbs-core.o aes-neonbs-glue.o</div><div class='del'>-sha1-arm-y	:= sha1-armv4-large.o sha1_glue.o</div><div class='del'>-sha1-arm-neon-y	:= sha1-armv7-neon.o sha1_neon_glue.o</div><div class='del'>-sha256-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha256_neon_glue.o</div><div class='del'>-sha256-arm-y	:= sha256-core.o sha256_glue.o $(sha256-arm-neon-y)</div><div class='del'>-sha512-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha512-neon-glue.o</div><div class='del'>-sha512-arm-y	:= sha512-core.o sha512-glue.o $(sha512-arm-neon-y)</div><div class='del'>-libblake2s-arm-y:= blake2s-core.o blake2s-glue.o</div><div class='ctx'> blake2b-neon-y  := blake2b-neon-core.o blake2b-neon-glue.o</div><div class='del'>-sha1-arm-ce-y	:= sha1-ce-core.o sha1-ce-glue.o</div><div class='del'>-sha2-arm-ce-y	:= sha2-ce-core.o sha2-ce-glue.o</div><div class='ctx'> aes-arm-ce-y	:= aes-ce-core.o aes-ce-glue.o</div><div class='ctx'> ghash-arm-ce-y	:= ghash-ce-core.o ghash-ce-glue.o</div><div class='del'>-crct10dif-arm-ce-y	:= crct10dif-ce-core.o crct10dif-ce-glue.o</div><div class='del'>-crc32-arm-ce-y:= crc32-ce-core.o crc32-ce-glue.o</div><div class='del'>-chacha-neon-y := chacha-scalar-core.o chacha-glue.o</div><div class='del'>-chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o</div><div class='del'>-poly1305-arm-y := poly1305-core.o poly1305-glue.o</div><div class='ctx'> nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o</div><div class='del'>-curve25519-neon-y := curve25519-core.o curve25519-glue.o</div><div class='del'>-</div><div class='del'>-quiet_cmd_perl = PERL    $@</div><div class='del'>-      cmd_perl = $(PERL) $(&lt;) &gt; $(@)</div><div class='del'>-</div><div class='del'>-$(obj)/%-core.S: $(src)/%-armv4.pl</div><div class='del'>-	$(call cmd,perl)</div><div class='del'>-</div><div class='del'>-clean-files += poly1305-core.S sha256-core.S sha512-core.S</div><div class='del'>-</div><div class='del'>-aflags-thumb2-$(CONFIG_THUMB2_KERNEL)  := -U__thumb2__ -D__thumb2__=1</div><div class='del'>-</div><div class='del'>-AFLAGS_sha256-core.o += $(aflags-thumb2-y)</div><div class='del'>-AFLAGS_sha512-core.o += $(aflags-thumb2-y)</div><div class='del'>-</div><div class='del'>-# massage the perlasm code a bit so we only get the NEON routine if we need it</div><div class='del'>-poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5</div><div class='del'>-poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7</div><div class='del'>-AFLAGS_poly1305-core.o += $(poly1305-aflags-y) $(aflags-thumb2-y)</div><div class='head'>diff --git a/arch/arm/crypto/aes-ce-glue.c b/arch/arm/crypto/aes-ce-glue.c<br/>index 21df5e7f51f9..00591895d540 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/aes-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/aes-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/aes-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/aes-ce-glue.c</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='hunk'>@@ -399,9 +397,9 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (walk.nbytes) {</div><div class='ctx'> 		u8 __aligned(8) tail[AES_BLOCK_SIZE];</div><div class='add'>+		const u8 *tsrc = walk.src.virt.addr;</div><div class='ctx'> 		unsigned int nbytes = walk.nbytes;</div><div class='ctx'> 		u8 *tdst = walk.dst.virt.addr;</div><div class='del'>-		u8 *tsrc = walk.src.virt.addr;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Tell aes_ctr_encrypt() to process a tail block.</div><div class='hunk'>@@ -418,29 +416,6 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ctr_encrypt_one(struct crypto_skcipher *tfm, const u8 *src, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Temporarily disable interrupts to avoid races where</div><div class='del'>-	 * cachelines are evicted when the CPU is interrupted</div><div class='del'>-	 * to do something else.</div><div class='del'>-	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	aes_encrypt(ctx, dst, src);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ctr_encrypt_sync(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_ctr_encrypt_walk(req, ctr_encrypt_one);</div><div class='del'>-</div><div class='del'>-	return ctr_encrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int xts_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -586,10 +561,9 @@ static int xts_decrypt(struct skcipher_request *req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aes_algs[] = { {</div><div class='del'>-	.base.cra_name		= "__ecb(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ecb-aes-ce",</div><div class='add'>+	.base.cra_name		= "ecb(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ecb-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -600,10 +574,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ecb_encrypt,</div><div class='ctx'> 	.decrypt		= ecb_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cbc(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__cbc-aes-ce",</div><div class='add'>+	.base.cra_name		= "cbc(aes)",</div><div class='add'>+	.base.cra_driver_name	= "cbc-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -615,10 +588,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cts(cbc(aes))",</div><div class='del'>-	.base.cra_driver_name	= "__cts-cbc-aes-ce",</div><div class='add'>+	.base.cra_name		= "cts(cbc(aes))",</div><div class='add'>+	.base.cra_driver_name	= "cts-cbc-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -631,10 +603,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cts_cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cts_cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ctr-aes-ce",</div><div class='add'>+	.base.cra_name		= "ctr(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ctr-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= 1,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -647,25 +618,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ctr_encrypt,</div><div class='ctx'> 	.decrypt		= ctr_encrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "ctr-aes-ce-sync",</div><div class='del'>-	.base.cra_priority	= 300 - 1,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='del'>-	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='del'>-	.ivsize			= AES_BLOCK_SIZE,</div><div class='del'>-	.chunksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			= ce_aes_setkey,</div><div class='del'>-	.encrypt		= ctr_encrypt_sync,</div><div class='del'>-	.decrypt		= ctr_encrypt_sync,</div><div class='del'>-}, {</div><div class='del'>-	.base.cra_name		= "__xts(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__xts-aes-ce",</div><div class='add'>+	.base.cra_name		= "xts(aes)",</div><div class='add'>+	.base.cra_driver_name	= "xts-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_xts_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -679,51 +634,14 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.decrypt		= xts_decrypt,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aes_simd_algs[ARRAY_SIZE(aes_algs)];</div><div class='del'>-</div><div class='ctx'> static void aes_exit(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_simd_algs) &amp;&amp; aes_simd_algs[i]; i++)</div><div class='del'>-		simd_skcipher_free(aes_simd_algs[i]);</div><div class='del'>-</div><div class='ctx'> 	crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init aes_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct simd_skcipher_alg *simd;</div><div class='del'>-	const char *basename;</div><div class='del'>-	const char *algname;</div><div class='del'>-	const char *drvname;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_algs); i++) {</div><div class='del'>-		if (!(aes_algs[i].base.cra_flags &amp; CRYPTO_ALG_INTERNAL))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		algname = aes_algs[i].base.cra_name + 2;</div><div class='del'>-		drvname = aes_algs[i].base.cra_driver_name + 2;</div><div class='del'>-		basename = aes_algs[i].base.cra_driver_name;</div><div class='del'>-		simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);</div><div class='del'>-		err = PTR_ERR(simd);</div><div class='del'>-		if (IS_ERR(simd))</div><div class='del'>-			goto unregister_simds;</div><div class='del'>-</div><div class='del'>-		aes_simd_algs[i] = simd;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-unregister_simds:</div><div class='del'>-	aes_exit();</div><div class='del'>-	return err;</div><div class='add'>+	return crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_cpu_feature_match(AES, aes_init);</div><div class='head'>diff --git a/arch/arm/crypto/aes-neonbs-glue.c b/arch/arm/crypto/aes-neonbs-glue.c<br/>index f6be80b5938b..df5afe601e4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/aes-neonbs-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/aes-neonbs-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/aes-neonbs-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/aes-neonbs-glue.c</a></div><div class='hunk'>@@ -8,8 +8,6 @@</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='hunk'>@@ -59,11 +57,6 @@ struct aesbs_xts_ctx {</div><div class='ctx'> 	struct crypto_aes_ctx	tweak_key;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct aesbs_ctr_ctx {</div><div class='del'>-	struct aesbs_ctx	key;		/* must be first member */</div><div class='del'>-	struct crypto_aes_ctx	fallback;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int aesbs_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='ctx'> 			unsigned int key_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -200,25 +193,6 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aesbs_ctr_setkey_sync(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-				 unsigned int key_len)</div><div class='del'>-{</div><div class='del'>-	struct aesbs_ctr_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = aes_expandkey(&amp;ctx-&gt;fallback, in_key, key_len);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	ctx-&gt;key.rounds = 6 + key_len / 4;</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	aesbs_convert_key(ctx-&gt;key.rk, ctx-&gt;fallback.key_enc, ctx-&gt;key.rounds);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -232,7 +206,7 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	while (walk.nbytes &gt; 0) {</div><div class='ctx'> 		const u8 *src = walk.src.virt.addr;</div><div class='ctx'> 		u8 *dst = walk.dst.virt.addr;</div><div class='del'>-		int bytes = walk.nbytes;</div><div class='add'>+		unsigned int bytes = walk.nbytes;</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(bytes &lt; AES_BLOCK_SIZE))</div><div class='ctx'> 			src = dst = memcpy(buf + sizeof(buf) - bytes,</div><div class='hunk'>@@ -254,21 +228,6 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ctr_encrypt_one(struct crypto_skcipher *tfm, const u8 *src, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct aesbs_ctr_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	__aes_arm_encrypt(ctx-&gt;fallback.key_enc, ctx-&gt;key.rounds, src, dst);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ctr_encrypt_sync(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_ctr_encrypt_walk(req, ctr_encrypt_one);</div><div class='del'>-</div><div class='del'>-	return ctr_encrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int aesbs_xts_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='ctx'> 			    unsigned int key_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -374,13 +333,12 @@ static int xts_decrypt(struct skcipher_request *req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aes_algs[] = { {</div><div class='del'>-	.base.cra_name		= "__ecb(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ecb-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "ecb(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ecb-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -389,13 +347,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ecb_encrypt,</div><div class='ctx'> 	.decrypt		= ecb_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cbc(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__cbc-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "cbc(aes)",</div><div class='add'>+	.base.cra_driver_name	= "cbc-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_cbc_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -405,13 +362,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ctr-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "ctr(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ctr-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= 1,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -422,29 +378,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ctr_encrypt,</div><div class='ctx'> 	.decrypt		= ctr_encrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "ctr-aes-neonbs-sync",</div><div class='del'>-	.base.cra_priority	= 250 - 1,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_ctxsize	= sizeof(struct aesbs_ctr_ctx),</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='del'>-	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='del'>-	.chunksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.walksize		= 8 * AES_BLOCK_SIZE,</div><div class='del'>-	.ivsize			= AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			= aesbs_ctr_setkey_sync,</div><div class='del'>-	.encrypt		= ctr_encrypt_sync,</div><div class='del'>-	.decrypt		= ctr_encrypt_sync,</div><div class='del'>-}, {</div><div class='del'>-	.base.cra_name		= "__xts(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__xts-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "xts(aes)",</div><div class='add'>+	.base.cra_driver_name	= "xts-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_xts_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= 2 * AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= 2 * AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -455,55 +394,18 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.decrypt		= xts_decrypt,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aes_simd_algs[ARRAY_SIZE(aes_algs)];</div><div class='del'>-</div><div class='ctx'> static void aes_exit(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_simd_algs); i++)</div><div class='del'>-		if (aes_simd_algs[i])</div><div class='del'>-			simd_skcipher_free(aes_simd_algs[i]);</div><div class='del'>-</div><div class='ctx'> 	crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init aes_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct simd_skcipher_alg *simd;</div><div class='del'>-	const char *basename;</div><div class='del'>-	const char *algname;</div><div class='del'>-	const char *drvname;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	if (!(elf_hwcap &amp; HWCAP_NEON))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	err = crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_algs); i++) {</div><div class='del'>-		if (!(aes_algs[i].base.cra_flags &amp; CRYPTO_ALG_INTERNAL))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		algname = aes_algs[i].base.cra_name + 2;</div><div class='del'>-		drvname = aes_algs[i].base.cra_driver_name + 2;</div><div class='del'>-		basename = aes_algs[i].base.cra_driver_name;</div><div class='del'>-		simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);</div><div class='del'>-		err = PTR_ERR(simd);</div><div class='del'>-		if (IS_ERR(simd))</div><div class='del'>-			goto unregister_simds;</div><div class='del'>-</div><div class='del'>-		aes_simd_algs[i] = simd;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-unregister_simds:</div><div class='del'>-	aes_exit();</div><div class='del'>-	return err;</div><div class='add'>+	return crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(aes_init);</div><div class='add'>+module_init(aes_init);</div><div class='ctx'> module_exit(aes_exit);</div><div class='head'>diff --git a/arch/arm/crypto/blake2b-neon-glue.c b/arch/arm/crypto/blake2b-neon-glue.c<br/>index 4b59d027ba4a..2ff443a91724 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/blake2b-neon-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2b-neon-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/blake2b-neon-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/blake2b-neon-glue.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/blake2b.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -21,11 +20,6 @@ asmlinkage void blake2b_compress_neon(struct blake2b_state *state,</div><div class='ctx'> static void blake2b_compress_arch(struct blake2b_state *state,</div><div class='ctx'> 				  const u8 *block, size_t nblocks, u32 inc)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		blake2b_compress_generic(state, block, nblocks, inc);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='ctx'> 		const size_t blocks = min_t(size_t, nblocks,</div><div class='ctx'> 					    SZ_4K / BLAKE2B_BLOCK_SIZE);</div><div class='hunk'>@@ -42,12 +36,14 @@ static void blake2b_compress_arch(struct blake2b_state *state,</div><div class='ctx'> static int crypto_blake2b_update_neon(struct shash_desc *desc,</div><div class='ctx'> 				      const u8 *in, unsigned int inlen)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_update(desc, in, inlen, blake2b_compress_arch);</div><div class='add'>+	return crypto_blake2b_update_bo(desc, in, inlen, blake2b_compress_arch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int crypto_blake2b_finup_neon(struct shash_desc *desc, const u8 *in,</div><div class='add'>+				     unsigned int inlen, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_final(desc, out, blake2b_compress_arch);</div><div class='add'>+	return crypto_blake2b_finup(desc, in, inlen, out,</div><div class='add'>+				    blake2b_compress_arch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BLAKE2B_ALG(name, driver_name, digest_size)			\</div><div class='hunk'>@@ -55,7 +51,9 @@ static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.base.cra_name		= name,				\</div><div class='ctx'> 		.base.cra_driver_name	= driver_name,			\</div><div class='ctx'> 		.base.cra_priority	= 200,				\</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,	\</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_BLOCK_ONLY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINAL_NONZERO, \</div><div class='ctx'> 		.base.cra_blocksize	= BLAKE2B_BLOCK_SIZE,		\</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct blake2b_tfm_ctx), \</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,			\</div><div class='hunk'>@@ -63,8 +61,9 @@ static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.setkey			= crypto_blake2b_setkey,	\</div><div class='ctx'> 		.init			= crypto_blake2b_init,		\</div><div class='ctx'> 		.update			= crypto_blake2b_update_neon,	\</div><div class='del'>-		.final			= crypto_blake2b_final_neon,	\</div><div class='add'>+		.finup			= crypto_blake2b_finup_neon,	\</div><div class='ctx'> 		.descsize		= sizeof(struct blake2b_state),	\</div><div class='add'>+		.statesize		= BLAKE2B_STATE_SIZE,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg blake2b_neon_algs[] = {</div><div class='head'>diff --git a/arch/arm/crypto/blake2s-core.S b/arch/arm/crypto/blake2s-core.S<br/>deleted file mode 100644<br/>index df40e46601f1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/blake2s-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2s-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,306 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * BLAKE2s digest algorithm, ARM scalar implementation</div><div class='del'>- *</div><div class='del'>- * Copyright 2020 Google LLC</div><div class='del'>- *</div><div class='del'>- * Author: Eric Biggers &lt;ebiggers@google.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	// Registers used to hold message words temporarily.  There aren't</div><div class='del'>-	// enough ARM registers to hold the whole message block, so we have to</div><div class='del'>-	// load the words on-demand.</div><div class='del'>-	M_0		.req	r12</div><div class='del'>-	M_1		.req	r14</div><div class='del'>-</div><div class='del'>-// The BLAKE2s initialization vector</div><div class='del'>-.Lblake2s_IV:</div><div class='del'>-	.word	0x6A09E667, 0xBB67AE85, 0x3C6EF372, 0xA54FF53A</div><div class='del'>-	.word	0x510E527F, 0x9B05688C, 0x1F83D9AB, 0x5BE0CD19</div><div class='del'>-</div><div class='del'>-.macro __ldrd		a, b, src, offset</div><div class='del'>-#if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='del'>-	ldrd		\a, \b, [\src, #\offset]</div><div class='del'>-#else</div><div class='del'>-	ldr		\a, [\src, #\offset]</div><div class='del'>-	ldr		\b, [\src, #\offset + 4]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro __strd		a, b, dst, offset</div><div class='del'>-#if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='del'>-	strd		\a, \b, [\dst, #\offset]</div><div class='del'>-#else</div><div class='del'>-	str		\a, [\dst, #\offset]</div><div class='del'>-	str		\b, [\dst, #\offset + 4]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _le32_bswap	a, tmp</div><div class='del'>-#ifdef __ARMEB__</div><div class='del'>-	rev_l		\a, \tmp</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _le32_bswap_8x	a, b, c, d, e, f, g, h,  tmp</div><div class='del'>-	_le32_bswap	\a, \tmp</div><div class='del'>-	_le32_bswap	\b, \tmp</div><div class='del'>-	_le32_bswap	\c, \tmp</div><div class='del'>-	_le32_bswap	\d, \tmp</div><div class='del'>-	_le32_bswap	\e, \tmp</div><div class='del'>-	_le32_bswap	\f, \tmp</div><div class='del'>-	_le32_bswap	\g, \tmp</div><div class='del'>-	_le32_bswap	\h, \tmp</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-// Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.</div><div class='del'>-// (a0, b0, c0, d0) and (a1, b1, c1, d1) give the registers containing the two</div><div class='del'>-// columns/diagonals.  s0-s1 are the word offsets to the message words the first</div><div class='del'>-// column/diagonal needs, and likewise s2-s3 for the second column/diagonal.</div><div class='del'>-// M_0 and M_1 are free to use, and the message block can be found at sp + 32.</div><div class='del'>-//</div><div class='del'>-// Note that to save instructions, the rotations don't happen when the</div><div class='del'>-// pseudocode says they should, but rather they are delayed until the values are</div><div class='del'>-// used.  See the comment above _blake2s_round().</div><div class='del'>-.macro _blake2s_quarterround  a0, b0, c0, d0,  a1, b1, c1, d1,  s0, s1, s2, s3</div><div class='del'>-</div><div class='del'>-	ldr		M_0, [sp, #32 + 4 * \s0]</div><div class='del'>-	ldr		M_1, [sp, #32 + 4 * \s2]</div><div class='del'>-</div><div class='del'>-	// a += b + m[blake2s_sigma[r][2*i + 0]];</div><div class='del'>-	add		\a0, \a0, \b0, ror #brot</div><div class='del'>-	add		\a1, \a1, \b1, ror #brot</div><div class='del'>-	add		\a0, \a0, M_0</div><div class='del'>-	add		\a1, \a1, M_1</div><div class='del'>-</div><div class='del'>-	// d = ror32(d ^ a, 16);</div><div class='del'>-	eor		\d0, \a0, \d0, ror #drot</div><div class='del'>-	eor		\d1, \a1, \d1, ror #drot</div><div class='del'>-</div><div class='del'>-	// c += d;</div><div class='del'>-	add		\c0, \c0, \d0, ror #16</div><div class='del'>-	add		\c1, \c1, \d1, ror #16</div><div class='del'>-</div><div class='del'>-	// b = ror32(b ^ c, 12);</div><div class='del'>-	eor		\b0, \c0, \b0, ror #brot</div><div class='del'>-	eor		\b1, \c1, \b1, ror #brot</div><div class='del'>-</div><div class='del'>-	ldr		M_0, [sp, #32 + 4 * \s1]</div><div class='del'>-	ldr		M_1, [sp, #32 + 4 * \s3]</div><div class='del'>-</div><div class='del'>-	// a += b + m[blake2s_sigma[r][2*i + 1]];</div><div class='del'>-	add		\a0, \a0, \b0, ror #12</div><div class='del'>-	add		\a1, \a1, \b1, ror #12</div><div class='del'>-	add		\a0, \a0, M_0</div><div class='del'>-	add		\a1, \a1, M_1</div><div class='del'>-</div><div class='del'>-	// d = ror32(d ^ a, 8);</div><div class='del'>-	eor		\d0, \a0, \d0, ror#16</div><div class='del'>-	eor		\d1, \a1, \d1, ror#16</div><div class='del'>-</div><div class='del'>-	// c += d;</div><div class='del'>-	add		\c0, \c0, \d0, ror#8</div><div class='del'>-	add		\c1, \c1, \d1, ror#8</div><div class='del'>-</div><div class='del'>-	// b = ror32(b ^ c, 7);</div><div class='del'>-	eor		\b0, \c0, \b0, ror#12</div><div class='del'>-	eor		\b1, \c1, \b1, ror#12</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-// Execute one round of BLAKE2s by updating the state matrix v[0..15].  v[0..9]</div><div class='del'>-// are in r0..r9.  The stack pointer points to 8 bytes of scratch space for</div><div class='del'>-// spilling v[8..9], then to v[9..15], then to the message block.  r10-r12 and</div><div class='del'>-// r14 are free to use.  The macro arguments s0-s15 give the order in which the</div><div class='del'>-// message words are used in this round.</div><div class='del'>-//</div><div class='del'>-// All rotates are performed using the implicit rotate operand accepted by the</div><div class='del'>-// 'add' and 'eor' instructions.  This is faster than using explicit rotate</div><div class='del'>-// instructions.  To make this work, we allow the values in the second and last</div><div class='del'>-// rows of the BLAKE2s state matrix (rows 'b' and 'd') to temporarily have the</div><div class='del'>-// wrong rotation amount.  The rotation amount is then fixed up just in time</div><div class='del'>-// when the values are used.  'brot' is the number of bits the values in row 'b'</div><div class='del'>-// need to be rotated right to arrive at the correct values, and 'drot'</div><div class='del'>-// similarly for row 'd'.  (brot, drot) start out as (0, 0) but we make it such</div><div class='del'>-// that they end up as (7, 8) after every round.</div><div class='del'>-.macro	_blake2s_round	s0, s1, s2, s3, s4, s5, s6, s7, \</div><div class='del'>-			s8, s9, s10, s11, s12, s13, s14, s15</div><div class='del'>-</div><div class='del'>-	// Mix first two columns:</div><div class='del'>-	// (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).</div><div class='del'>-	__ldrd		r10, r11, sp, 16	// load v[12] and v[13]</div><div class='del'>-	_blake2s_quarterround	r0, r4, r8, r10,  r1, r5, r9, r11, \</div><div class='del'>-				\s0, \s1, \s2, \s3</div><div class='del'>-	__strd		r8, r9, sp, 0</div><div class='del'>-	__strd		r10, r11, sp, 16</div><div class='del'>-</div><div class='del'>-	// Mix second two columns:</div><div class='del'>-	// (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).</div><div class='del'>-	__ldrd		r8, r9, sp, 8		// load v[10] and v[11]</div><div class='del'>-	__ldrd		r10, r11, sp, 24	// load v[14] and v[15]</div><div class='del'>-	_blake2s_quarterround	r2, r6, r8, r10,  r3, r7, r9, r11, \</div><div class='del'>-				\s4, \s5, \s6, \s7</div><div class='del'>-	str		r10, [sp, #24]		// store v[14]</div><div class='del'>-	// v[10], v[11], and v[15] are used below, so no need to store them yet.</div><div class='del'>-</div><div class='del'>-	.set brot, 7</div><div class='del'>-	.set drot, 8</div><div class='del'>-</div><div class='del'>-	// Mix first two diagonals:</div><div class='del'>-	// (v[0], v[5], v[10], v[15]) and (v[1], v[6], v[11], v[12]).</div><div class='del'>-	ldr		r10, [sp, #16]		// load v[12]</div><div class='del'>-	_blake2s_quarterround	r0, r5, r8, r11,  r1, r6, r9, r10, \</div><div class='del'>-				\s8, \s9, \s10, \s11</div><div class='del'>-	__strd		r8, r9, sp, 8</div><div class='del'>-	str		r11, [sp, #28]</div><div class='del'>-	str		r10, [sp, #16]</div><div class='del'>-</div><div class='del'>-	// Mix second two diagonals:</div><div class='del'>-	// (v[2], v[7], v[8], v[13]) and (v[3], v[4], v[9], v[14]).</div><div class='del'>-	__ldrd		r8, r9, sp, 0		// load v[8] and v[9]</div><div class='del'>-	__ldrd		r10, r11, sp, 20	// load v[13] and v[14]</div><div class='del'>-	_blake2s_quarterround	r2, r7, r8, r10,  r3, r4, r9, r11, \</div><div class='del'>-				\s12, \s13, \s14, \s15</div><div class='del'>-	__strd		r10, r11, sp, 20</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-//</div><div class='del'>-// void blake2s_compress(struct blake2s_state *state,</div><div class='del'>-//			 const u8 *block, size_t nblocks, u32 inc);</div><div class='del'>-//</div><div class='del'>-// Only the first three fields of struct blake2s_state are used:</div><div class='del'>-//	u32 h[8];	(inout)</div><div class='del'>-//	u32 t[2];	(inout)</div><div class='del'>-//	u32 f[2];	(in)</div><div class='del'>-//</div><div class='del'>-	.align		5</div><div class='del'>-ENTRY(blake2s_compress)</div><div class='del'>-	push		{r0-r2,r4-r11,lr}	// keep this an even number</div><div class='del'>-</div><div class='del'>-.Lnext_block:</div><div class='del'>-	// r0 is 'state'</div><div class='del'>-	// r1 is 'block'</div><div class='del'>-	// r3 is 'inc'</div><div class='del'>-</div><div class='del'>-	// Load and increment the counter t[0..1].</div><div class='del'>-	__ldrd		r10, r11, r0, 32</div><div class='del'>-	adds		r10, r10, r3</div><div class='del'>-	adc		r11, r11, #0</div><div class='del'>-	__strd		r10, r11, r0, 32</div><div class='del'>-</div><div class='del'>-	// _blake2s_round is very short on registers, so copy the message block</div><div class='del'>-	// to the stack to save a register during the rounds.  This also has the</div><div class='del'>-	// advantage that misalignment only needs to be dealt with in one place.</div><div class='del'>-	sub		sp, sp, #64</div><div class='del'>-	mov		r12, sp</div><div class='del'>-	tst		r1, #3</div><div class='del'>-	bne		.Lcopy_block_misaligned</div><div class='del'>-	ldmia		r1!, {r2-r9}</div><div class='del'>-	_le32_bswap_8x	r2, r3, r4, r5, r6, r7, r8, r9,  r14</div><div class='del'>-	stmia		r12!, {r2-r9}</div><div class='del'>-	ldmia		r1!, {r2-r9}</div><div class='del'>-	_le32_bswap_8x	r2, r3, r4, r5, r6, r7, r8, r9,  r14</div><div class='del'>-	stmia		r12, {r2-r9}</div><div class='del'>-.Lcopy_block_done:</div><div class='del'>-	str		r1, [sp, #68]		// Update message pointer</div><div class='del'>-</div><div class='del'>-	// Calculate v[8..15].  Push v[9..15] onto the stack, and leave space</div><div class='del'>-	// for spilling v[8..9].  Leave v[8..9] in r8-r9.</div><div class='del'>-	mov		r14, r0			// r14 = state</div><div class='del'>-	adr		r12, .Lblake2s_IV</div><div class='del'>-	ldmia		r12!, {r8-r9}		// load IV[0..1]</div><div class='del'>-	__ldrd		r0, r1, r14, 40		// load f[0..1]</div><div class='del'>-	ldm		r12, {r2-r7}		// load IV[3..7]</div><div class='del'>-	eor		r4, r4, r10		// v[12] = IV[4] ^ t[0]</div><div class='del'>-	eor		r5, r5, r11		// v[13] = IV[5] ^ t[1]</div><div class='del'>-	eor		r6, r6, r0		// v[14] = IV[6] ^ f[0]</div><div class='del'>-	eor		r7, r7, r1		// v[15] = IV[7] ^ f[1]</div><div class='del'>-	push		{r2-r7}			// push v[9..15]</div><div class='del'>-	sub		sp, sp, #8		// leave space for v[8..9]</div><div class='del'>-</div><div class='del'>-	// Load h[0..7] == v[0..7].</div><div class='del'>-	ldm		r14, {r0-r7}</div><div class='del'>-</div><div class='del'>-	// Execute the rounds.  Each round is provided the order in which it</div><div class='del'>-	// needs to use the message words.</div><div class='del'>-	.set brot, 0</div><div class='del'>-	.set drot, 0</div><div class='del'>-	_blake2s_round	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15</div><div class='del'>-	_blake2s_round	14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3</div><div class='del'>-	_blake2s_round	11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4</div><div class='del'>-	_blake2s_round	7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8</div><div class='del'>-	_blake2s_round	9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13</div><div class='del'>-	_blake2s_round	2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9</div><div class='del'>-	_blake2s_round	12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11</div><div class='del'>-	_blake2s_round	13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10</div><div class='del'>-	_blake2s_round	6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5</div><div class='del'>-	_blake2s_round	10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0</div><div class='del'>-</div><div class='del'>-	// Fold the final state matrix into the hash chaining value:</div><div class='del'>-	//</div><div class='del'>-	//	for (i = 0; i &lt; 8; i++)</div><div class='del'>-	//		h[i] ^= v[i] ^ v[i + 8];</div><div class='del'>-	//</div><div class='del'>-	ldr		r14, [sp, #96]		// r14 = &amp;h[0]</div><div class='del'>-	add		sp, sp, #8		// v[8..9] are already loaded.</div><div class='del'>-	pop		{r10-r11}		// load v[10..11]</div><div class='del'>-	eor		r0, r0, r8</div><div class='del'>-	eor		r1, r1, r9</div><div class='del'>-	eor		r2, r2, r10</div><div class='del'>-	eor		r3, r3, r11</div><div class='del'>-	ldm		r14, {r8-r11}		// load h[0..3]</div><div class='del'>-	eor		r0, r0, r8</div><div class='del'>-	eor		r1, r1, r9</div><div class='del'>-	eor		r2, r2, r10</div><div class='del'>-	eor		r3, r3, r11</div><div class='del'>-	stmia		r14!, {r0-r3}		// store new h[0..3]</div><div class='del'>-	ldm		r14, {r0-r3}		// load old h[4..7]</div><div class='del'>-	pop		{r8-r11}		// load v[12..15]</div><div class='del'>-	eor		r0, r0, r4, ror #brot</div><div class='del'>-	eor		r1, r1, r5, ror #brot</div><div class='del'>-	eor		r2, r2, r6, ror #brot</div><div class='del'>-	eor		r3, r3, r7, ror #brot</div><div class='del'>-	eor		r0, r0, r8, ror #drot</div><div class='del'>-	eor		r1, r1, r9, ror #drot</div><div class='del'>-	eor		r2, r2, r10, ror #drot</div><div class='del'>-	eor		r3, r3, r11, ror #drot</div><div class='del'>-	  add		sp, sp, #64		// skip copy of message block</div><div class='del'>-	stm		r14, {r0-r3}		// store new h[4..7]</div><div class='del'>-</div><div class='del'>-	// Advance to the next block, if there is one.  Note that if there are</div><div class='del'>-	// multiple blocks, then 'inc' (the counter increment amount) must be</div><div class='del'>-	// 64.  So we can simply set it to 64 without re-loading it.</div><div class='del'>-	ldm		sp, {r0, r1, r2}	// load (state, block, nblocks)</div><div class='del'>-	mov		r3, #64			// set 'inc'</div><div class='del'>-	subs		r2, r2, #1		// nblocks--</div><div class='del'>-	str		r2, [sp, #8]</div><div class='del'>-	bne		.Lnext_block		// nblocks != 0?</div><div class='del'>-</div><div class='del'>-	pop		{r0-r2,r4-r11,pc}</div><div class='del'>-</div><div class='del'>-	// The next message block (pointed to by r1) isn't 4-byte aligned, so it</div><div class='del'>-	// can't be loaded using ldmia.  Copy it to the stack buffer (pointed to</div><div class='del'>-	// by r12) using an alternative method.  r2-r9 are free to use.</div><div class='del'>-.Lcopy_block_misaligned:</div><div class='del'>-	mov		r2, #64</div><div class='del'>-1:</div><div class='del'>-#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='del'>-	ldr		r3, [r1], #4</div><div class='del'>-	_le32_bswap	r3, r4</div><div class='del'>-#else</div><div class='del'>-	ldrb		r3, [r1, #0]</div><div class='del'>-	ldrb		r4, [r1, #1]</div><div class='del'>-	ldrb		r5, [r1, #2]</div><div class='del'>-	ldrb		r6, [r1, #3]</div><div class='del'>-	add		r1, r1, #4</div><div class='del'>-	orr		r3, r3, r4, lsl #8</div><div class='del'>-	orr		r3, r3, r5, lsl #16</div><div class='del'>-	orr		r3, r3, r6, lsl #24</div><div class='del'>-#endif</div><div class='del'>-	subs		r2, r2, #4</div><div class='del'>-	str		r3, [r12], #4</div><div class='del'>-	bne		1b</div><div class='del'>-	b		.Lcopy_block_done</div><div class='del'>-ENDPROC(blake2s_compress)</div><div class='head'>diff --git a/arch/arm/crypto/blake2s-glue.c b/arch/arm/crypto/blake2s-glue.c<br/>deleted file mode 100644<br/>index 0238a70d9581..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/blake2s-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/blake2s-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/blake2s.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-/* defined in blake2s-core.S */</div><div class='del'>-EXPORT_SYMBOL(blake2s_compress);</div><div class='head'>diff --git a/arch/arm/crypto/chacha-glue.c b/arch/arm/crypto/chacha-glue.c<br/>deleted file mode 100644<br/>index cdde8fd01f8f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/chacha-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,358 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * ARM NEON accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016-2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/cputype.h&gt;</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				      int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       int nrounds, unsigned int nbytes);</div><div class='del'>-asmlinkage void hchacha_block_arm(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-			     const u32 *state, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_neon);</div><div class='del'>-</div><div class='del'>-static inline bool neon_usable(void)</div><div class='del'>-{</div><div class='del'>-	return static_branch_likely(&amp;use_neon) &amp;&amp; crypto_simd_usable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			  unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	u8 buf[CHACHA_BLOCK_SIZE];</div><div class='del'>-</div><div class='del'>-	while (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='del'>-		unsigned int l = min(bytes, CHACHA_BLOCK_SIZE * 4U);</div><div class='del'>-</div><div class='del'>-		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='del'>-	}</div><div class='del'>-	if (bytes) {</div><div class='del'>-		const u8 *s = src;</div><div class='del'>-		u8 *d = dst;</div><div class='del'>-</div><div class='del'>-		if (bytes != CHACHA_BLOCK_SIZE)</div><div class='del'>-			s = d = memcpy(buf, src, bytes);</div><div class='del'>-		chacha_block_xor_neon(state, d, s, nrounds);</div><div class='del'>-		if (d != dst)</div><div class='del'>-			memcpy(dst, buf, bytes);</div><div class='del'>-		state[12]++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable()) {</div><div class='del'>-		hchacha_block_arm(state, stream, nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, stream, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	chacha_init_generic(state, key, iv);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_init_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable() ||</div><div class='del'>-	    bytes &lt;= CHACHA_BLOCK_SIZE) {</div><div class='del'>-		chacha_doarm(dst, src, bytes, state, nrounds);</div><div class='del'>-		state[12] += DIV_ROUND_UP(bytes, CHACHA_BLOCK_SIZE);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_stream_xor(struct skcipher_request *req,</div><div class='del'>-			     const struct chacha_ctx *ctx, const u8 *iv,</div><div class='del'>-			     bool neon)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {</div><div class='del'>-			chacha_doarm(walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-				     nbytes, state, ctx-&gt;nrounds);</div><div class='del'>-			state[12] += DIV_ROUND_UP(nbytes, CHACHA_BLOCK_SIZE);</div><div class='del'>-		} else {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			chacha_doneon(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_chacha(struct skcipher_request *req, bool neon)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_stream_xor(req, ctx, req-&gt;iv, neon);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_arm(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_chacha(req, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_chacha(req, neon_usable());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_xchacha(struct skcipher_request *req, bool neon)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {</div><div class='del'>-		hchacha_block_arm(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_stream_xor(req, &amp;subctx, real_iv, neon);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_arm(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_xchacha(req, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_xchacha(req, neon_usable());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg arm_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_arm,</div><div class='del'>-		.decrypt		= chacha_arm,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_arm,</div><div class='del'>-		.decrypt		= xchacha_arm,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_arm,</div><div class='del'>-		.decrypt		= xchacha_arm,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg neon_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_neon,</div><div class='del'>-		.decrypt		= chacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-		err = crypto_register_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON)) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		switch (read_cpuid_part()) {</div><div class='del'>-		case ARM_CPU_PART_CORTEX_A7:</div><div class='del'>-		case ARM_CPU_PART_CORTEX_A5:</div><div class='del'>-			/*</div><div class='del'>-			 * The Cortex-A7 and Cortex-A5 do not perform well with</div><div class='del'>-			 * the NEON implementation but do incredibly with the</div><div class='del'>-			 * scalar one and use less power.</div><div class='del'>-			 */</div><div class='del'>-			for (i = 0; i &lt; ARRAY_SIZE(neon_algs); i++)</div><div class='del'>-				neon_algs[i].base.cra_priority = 0;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			static_branch_enable(&amp;use_neon);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-			err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-			if (err)</div><div class='del'>-				crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-		crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON))</div><div class='del'>-			crypto_unregister_skciphers(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (scalar and NEON accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-arm");</div><div class='del'>-#ifdef CONFIG_KERNEL_MODE_NEON</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-neon");</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/crypto/chacha-neon-core.S b/arch/arm/crypto/chacha-neon-core.S<br/>deleted file mode 100644<br/>index 13d12f672656..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/chacha-neon-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-neon-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,643 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ChaCha/XChaCha NEON helper functions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Based on:</div><div class='del'>- * ChaCha20 256-bit cipher algorithm, RFC7539, x64 SSE3 functions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>- /*</div><div class='del'>-  * NEON doesn't have a rotate instruction.  The alternatives are, more or less:</div><div class='del'>-  *</div><div class='del'>-  * (a)  vshl.u32 + vsri.u32		(needs temporary register)</div><div class='del'>-  * (b)  vshl.u32 + vshr.u32 + vorr	(needs temporary register)</div><div class='del'>-  * (c)  vrev32.16			(16-bit rotations only)</div><div class='del'>-  * (d)  vtbl.8 + vtbl.8		(multiple of 8 bits rotations only,</div><div class='del'>-  *					 needs index vector)</div><div class='del'>-  *</div><div class='del'>-  * ChaCha has 16, 12, 8, and 7-bit rotations.  For the 12 and 7-bit rotations,</div><div class='del'>-  * the only choices are (a) and (b).  We use (a) since it takes two-thirds the</div><div class='del'>-  * cycles of (b) on both Cortex-A7 and Cortex-A53.</div><div class='del'>-  *</div><div class='del'>-  * For the 16-bit rotation, we use vrev32.16 since it's consistently fastest</div><div class='del'>-  * and doesn't need a temporary register.</div><div class='del'>-  *</div><div class='del'>-  * For the 8-bit rotation, we use vtbl.8 + vtbl.8.  On Cortex-A7, this sequence</div><div class='del'>-  * is twice as fast as (a), even when doing (a) on multiple registers</div><div class='del'>-  * simultaneously to eliminate the stall between vshl and vsri.  Also, it</div><div class='del'>-  * parallelizes better when temporary registers are scarce.</div><div class='del'>-  *</div><div class='del'>-  * A disadvantage is that on Cortex-A53, the vtbl sequence is the same speed as</div><div class='del'>-  * (a), so the need to load the rotation table actually makes the vtbl method</div><div class='del'>-  * slightly slower overall on that CPU (~1.3% slower ChaCha20).  Still, it</div><div class='del'>-  * seems to be a good compromise to get a more significant speed boost on some</div><div class='del'>-  * CPUs, e.g. ~4.8% faster ChaCha20 on Cortex-A7.</div><div class='del'>-  */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/cache.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.fpu		neon</div><div class='del'>-	.align		5</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * chacha_permute - permute one block</div><div class='del'>- *</div><div class='del'>- * Permute one 64-byte block where the state matrix is stored in the four NEON</div><div class='del'>- * registers q0-q3.  It performs matrix operations on four words in parallel,</div><div class='del'>- * but requires shuffling to rearrange the words after each round.</div><div class='del'>- *</div><div class='del'>- * The round count is given in r3.</div><div class='del'>- *</div><div class='del'>- * Clobbers: r3, ip, q4-q5</div><div class='del'>- */</div><div class='del'>-chacha_permute:</div><div class='del'>-</div><div class='del'>-	adr		ip, .Lrol8_table</div><div class='del'>-	vld1.8		{d10}, [ip, :64]</div><div class='del'>-</div><div class='del'>-.Ldoubleround:</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 16)</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	veor		q3, q3, q0</div><div class='del'>-	vrev32.16	q3, q3</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 12)</div><div class='del'>-	vadd.i32	q2, q2, q3</div><div class='del'>-	veor		q4, q1, q2</div><div class='del'>-	vshl.u32	q1, q4, #12</div><div class='del'>-	vsri.u32	q1, q4, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	veor		q3, q3, q0</div><div class='del'>-	vtbl.8		d6, {d6}, d10</div><div class='del'>-	vtbl.8		d7, {d7}, d10</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)</div><div class='del'>-	vadd.i32	q2, q2, q3</div><div class='del'>-	veor		q4, q1, q2</div><div class='del'>-	vshl.u32	q1, q4, #7</div><div class='del'>-	vsri.u32	q1, q4, #25</div><div class='del'>-</div><div class='del'>-	// x1 = shuffle32(x1, MASK(0, 3, 2, 1))</div><div class='del'>-	vext.8		q1, q1, q1, #4</div><div class='del'>-	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))</div><div class='del'>-	vext.8		q2, q2, q2, #8</div><div class='del'>-	// x3 = shuffle32(x3, MASK(2, 1, 0, 3))</div><div class='del'>-	vext.8		q3, q3, q3, #12</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 16)</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	veor		q3, q3, q0</div><div class='del'>-	vrev32.16	q3, q3</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 12)</div><div class='del'>-	vadd.i32	q2, q2, q3</div><div class='del'>-	veor		q4, q1, q2</div><div class='del'>-	vshl.u32	q1, q4, #12</div><div class='del'>-	vsri.u32	q1, q4, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	veor		q3, q3, q0</div><div class='del'>-	vtbl.8		d6, {d6}, d10</div><div class='del'>-	vtbl.8		d7, {d7}, d10</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)</div><div class='del'>-	vadd.i32	q2, q2, q3</div><div class='del'>-	veor		q4, q1, q2</div><div class='del'>-	vshl.u32	q1, q4, #7</div><div class='del'>-	vsri.u32	q1, q4, #25</div><div class='del'>-</div><div class='del'>-	// x1 = shuffle32(x1, MASK(2, 1, 0, 3))</div><div class='del'>-	vext.8		q1, q1, q1, #12</div><div class='del'>-	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))</div><div class='del'>-	vext.8		q2, q2, q2, #8</div><div class='del'>-	// x3 = shuffle32(x3, MASK(0, 3, 2, 1))</div><div class='del'>-	vext.8		q3, q3, q3, #4</div><div class='del'>-</div><div class='del'>-	subs		r3, r3, #2</div><div class='del'>-	bne		.Ldoubleround</div><div class='del'>-</div><div class='del'>-	bx		lr</div><div class='del'>-ENDPROC(chacha_permute)</div><div class='del'>-</div><div class='del'>-ENTRY(chacha_block_xor_neon)</div><div class='del'>-	// r0: Input state matrix, s</div><div class='del'>-	// r1: 1 data block output, o</div><div class='del'>-	// r2: 1 data block input, i</div><div class='del'>-	// r3: nrounds</div><div class='del'>-	push		{lr}</div><div class='del'>-</div><div class='del'>-	// x0..3 = s0..3</div><div class='del'>-	add		ip, r0, #0x20</div><div class='del'>-	vld1.32		{q0-q1}, [r0]</div><div class='del'>-	vld1.32		{q2-q3}, [ip]</div><div class='del'>-</div><div class='del'>-	vmov		q8, q0</div><div class='del'>-	vmov		q9, q1</div><div class='del'>-	vmov		q10, q2</div><div class='del'>-	vmov		q11, q3</div><div class='del'>-</div><div class='del'>-	bl		chacha_permute</div><div class='del'>-</div><div class='del'>-	add		ip, r2, #0x20</div><div class='del'>-	vld1.8		{q4-q5}, [r2]</div><div class='del'>-	vld1.8		{q6-q7}, [ip]</div><div class='del'>-</div><div class='del'>-	// o0 = i0 ^ (x0 + s0)</div><div class='del'>-	vadd.i32	q0, q0, q8</div><div class='del'>-	veor		q0, q0, q4</div><div class='del'>-</div><div class='del'>-	// o1 = i1 ^ (x1 + s1)</div><div class='del'>-	vadd.i32	q1, q1, q9</div><div class='del'>-	veor		q1, q1, q5</div><div class='del'>-</div><div class='del'>-	// o2 = i2 ^ (x2 + s2)</div><div class='del'>-	vadd.i32	q2, q2, q10</div><div class='del'>-	veor		q2, q2, q6</div><div class='del'>-</div><div class='del'>-	// o3 = i3 ^ (x3 + s3)</div><div class='del'>-	vadd.i32	q3, q3, q11</div><div class='del'>-	veor		q3, q3, q7</div><div class='del'>-</div><div class='del'>-	add		ip, r1, #0x20</div><div class='del'>-	vst1.8		{q0-q1}, [r1]</div><div class='del'>-	vst1.8		{q2-q3}, [ip]</div><div class='del'>-</div><div class='del'>-	pop		{pc}</div><div class='del'>-ENDPROC(chacha_block_xor_neon)</div><div class='del'>-</div><div class='del'>-ENTRY(hchacha_block_neon)</div><div class='del'>-	// r0: Input state matrix, s</div><div class='del'>-	// r1: output (8 32-bit words)</div><div class='del'>-	// r2: nrounds</div><div class='del'>-	push		{lr}</div><div class='del'>-</div><div class='del'>-	vld1.32		{q0-q1}, [r0]!</div><div class='del'>-	vld1.32		{q2-q3}, [r0]</div><div class='del'>-</div><div class='del'>-	mov		r3, r2</div><div class='del'>-	bl		chacha_permute</div><div class='del'>-</div><div class='del'>-	vst1.32		{q0}, [r1]!</div><div class='del'>-	vst1.32		{q3}, [r1]</div><div class='del'>-</div><div class='del'>-	pop		{pc}</div><div class='del'>-ENDPROC(hchacha_block_neon)</div><div class='del'>-</div><div class='del'>-	.align		4</div><div class='del'>-.Lctrinc:	.word	0, 1, 2, 3</div><div class='del'>-.Lrol8_table:	.byte	3, 0, 1, 2, 7, 4, 5, 6</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-ENTRY(chacha_4block_xor_neon)</div><div class='del'>-	push		{r4, lr}</div><div class='del'>-	mov		r4, sp			// preserve the stack pointer</div><div class='del'>-	sub		ip, sp, #0x20		// allocate a 32 byte buffer</div><div class='del'>-	bic		ip, ip, #0x1f		// aligned to 32 bytes</div><div class='del'>-	mov		sp, ip</div><div class='del'>-</div><div class='del'>-	// r0: Input state matrix, s</div><div class='del'>-	// r1: 4 data blocks output, o</div><div class='del'>-	// r2: 4 data blocks input, i</div><div class='del'>-	// r3: nrounds</div><div class='del'>-</div><div class='del'>-	//</div><div class='del'>-	// This function encrypts four consecutive ChaCha blocks by loading</div><div class='del'>-	// the state matrix in NEON registers four times. The algorithm performs</div><div class='del'>-	// each operation on the corresponding word of each state matrix, hence</div><div class='del'>-	// requires no word shuffling. The words are re-interleaved before the</div><div class='del'>-	// final addition of the original state and the XORing step.</div><div class='del'>-	//</div><div class='del'>-</div><div class='del'>-	// x0..15[0-3] = s0..15[0-3]</div><div class='del'>-	add		ip, r0, #0x20</div><div class='del'>-	vld1.32		{q0-q1}, [r0]</div><div class='del'>-	vld1.32		{q2-q3}, [ip]</div><div class='del'>-</div><div class='del'>-	adr		lr, .Lctrinc</div><div class='del'>-	vdup.32		q15, d7[1]</div><div class='del'>-	vdup.32		q14, d7[0]</div><div class='del'>-	vld1.32		{q4}, [lr, :128]</div><div class='del'>-	vdup.32		q13, d6[1]</div><div class='del'>-	vdup.32		q12, d6[0]</div><div class='del'>-	vdup.32		q11, d5[1]</div><div class='del'>-	vdup.32		q10, d5[0]</div><div class='del'>-	vadd.u32	q12, q12, q4		// x12 += counter values 0-3</div><div class='del'>-	vdup.32		q9, d4[1]</div><div class='del'>-	vdup.32		q8, d4[0]</div><div class='del'>-	vdup.32		q7, d3[1]</div><div class='del'>-	vdup.32		q6, d3[0]</div><div class='del'>-	vdup.32		q5, d2[1]</div><div class='del'>-	vdup.32		q4, d2[0]</div><div class='del'>-	vdup.32		q3, d1[1]</div><div class='del'>-	vdup.32		q2, d1[0]</div><div class='del'>-	vdup.32		q1, d0[1]</div><div class='del'>-	vdup.32		q0, d0[0]</div><div class='del'>-</div><div class='del'>-	adr		ip, .Lrol8_table</div><div class='del'>-	b		1f</div><div class='del'>-</div><div class='del'>-.Ldoubleround4:</div><div class='del'>-	vld1.32		{q8-q9}, [sp, :256]</div><div class='del'>-1:</div><div class='del'>-	// x0 += x4, x12 = rotl32(x12 ^ x0, 16)</div><div class='del'>-	// x1 += x5, x13 = rotl32(x13 ^ x1, 16)</div><div class='del'>-	// x2 += x6, x14 = rotl32(x14 ^ x2, 16)</div><div class='del'>-	// x3 += x7, x15 = rotl32(x15 ^ x3, 16)</div><div class='del'>-	vadd.i32	q0, q0, q4</div><div class='del'>-	vadd.i32	q1, q1, q5</div><div class='del'>-	vadd.i32	q2, q2, q6</div><div class='del'>-	vadd.i32	q3, q3, q7</div><div class='del'>-</div><div class='del'>-	veor		q12, q12, q0</div><div class='del'>-	veor		q13, q13, q1</div><div class='del'>-	veor		q14, q14, q2</div><div class='del'>-	veor		q15, q15, q3</div><div class='del'>-</div><div class='del'>-	vrev32.16	q12, q12</div><div class='del'>-	vrev32.16	q13, q13</div><div class='del'>-	vrev32.16	q14, q14</div><div class='del'>-	vrev32.16	q15, q15</div><div class='del'>-</div><div class='del'>-	// x8 += x12, x4 = rotl32(x4 ^ x8, 12)</div><div class='del'>-	// x9 += x13, x5 = rotl32(x5 ^ x9, 12)</div><div class='del'>-	// x10 += x14, x6 = rotl32(x6 ^ x10, 12)</div><div class='del'>-	// x11 += x15, x7 = rotl32(x7 ^ x11, 12)</div><div class='del'>-	vadd.i32	q8, q8, q12</div><div class='del'>-	vadd.i32	q9, q9, q13</div><div class='del'>-	vadd.i32	q10, q10, q14</div><div class='del'>-	vadd.i32	q11, q11, q15</div><div class='del'>-</div><div class='del'>-	vst1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	veor		q8, q4, q8</div><div class='del'>-	veor		q9, q5, q9</div><div class='del'>-	vshl.u32	q4, q8, #12</div><div class='del'>-	vshl.u32	q5, q9, #12</div><div class='del'>-	vsri.u32	q4, q8, #20</div><div class='del'>-	vsri.u32	q5, q9, #20</div><div class='del'>-</div><div class='del'>-	veor		q8, q6, q10</div><div class='del'>-	veor		q9, q7, q11</div><div class='del'>-	vshl.u32	q6, q8, #12</div><div class='del'>-	vshl.u32	q7, q9, #12</div><div class='del'>-	vsri.u32	q6, q8, #20</div><div class='del'>-	vsri.u32	q7, q9, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x4, x12 = rotl32(x12 ^ x0, 8)</div><div class='del'>-	// x1 += x5, x13 = rotl32(x13 ^ x1, 8)</div><div class='del'>-	// x2 += x6, x14 = rotl32(x14 ^ x2, 8)</div><div class='del'>-	// x3 += x7, x15 = rotl32(x15 ^ x3, 8)</div><div class='del'>-	vld1.8		{d16}, [ip, :64]</div><div class='del'>-	vadd.i32	q0, q0, q4</div><div class='del'>-	vadd.i32	q1, q1, q5</div><div class='del'>-	vadd.i32	q2, q2, q6</div><div class='del'>-	vadd.i32	q3, q3, q7</div><div class='del'>-</div><div class='del'>-	veor		q12, q12, q0</div><div class='del'>-	veor		q13, q13, q1</div><div class='del'>-	veor		q14, q14, q2</div><div class='del'>-	veor		q15, q15, q3</div><div class='del'>-</div><div class='del'>-	vtbl.8		d24, {d24}, d16</div><div class='del'>-	vtbl.8		d25, {d25}, d16</div><div class='del'>-	vtbl.8		d26, {d26}, d16</div><div class='del'>-	vtbl.8		d27, {d27}, d16</div><div class='del'>-	vtbl.8		d28, {d28}, d16</div><div class='del'>-	vtbl.8		d29, {d29}, d16</div><div class='del'>-	vtbl.8		d30, {d30}, d16</div><div class='del'>-	vtbl.8		d31, {d31}, d16</div><div class='del'>-</div><div class='del'>-	vld1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	// x8 += x12, x4 = rotl32(x4 ^ x8, 7)</div><div class='del'>-	// x9 += x13, x5 = rotl32(x5 ^ x9, 7)</div><div class='del'>-	// x10 += x14, x6 = rotl32(x6 ^ x10, 7)</div><div class='del'>-	// x11 += x15, x7 = rotl32(x7 ^ x11, 7)</div><div class='del'>-	vadd.i32	q8, q8, q12</div><div class='del'>-	vadd.i32	q9, q9, q13</div><div class='del'>-	vadd.i32	q10, q10, q14</div><div class='del'>-	vadd.i32	q11, q11, q15</div><div class='del'>-</div><div class='del'>-	vst1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	veor		q8, q4, q8</div><div class='del'>-	veor		q9, q5, q9</div><div class='del'>-	vshl.u32	q4, q8, #7</div><div class='del'>-	vshl.u32	q5, q9, #7</div><div class='del'>-	vsri.u32	q4, q8, #25</div><div class='del'>-	vsri.u32	q5, q9, #25</div><div class='del'>-</div><div class='del'>-	veor		q8, q6, q10</div><div class='del'>-	veor		q9, q7, q11</div><div class='del'>-	vshl.u32	q6, q8, #7</div><div class='del'>-	vshl.u32	q7, q9, #7</div><div class='del'>-	vsri.u32	q6, q8, #25</div><div class='del'>-	vsri.u32	q7, q9, #25</div><div class='del'>-</div><div class='del'>-	vld1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	// x0 += x5, x15 = rotl32(x15 ^ x0, 16)</div><div class='del'>-	// x1 += x6, x12 = rotl32(x12 ^ x1, 16)</div><div class='del'>-	// x2 += x7, x13 = rotl32(x13 ^ x2, 16)</div><div class='del'>-	// x3 += x4, x14 = rotl32(x14 ^ x3, 16)</div><div class='del'>-	vadd.i32	q0, q0, q5</div><div class='del'>-	vadd.i32	q1, q1, q6</div><div class='del'>-	vadd.i32	q2, q2, q7</div><div class='del'>-	vadd.i32	q3, q3, q4</div><div class='del'>-</div><div class='del'>-	veor		q15, q15, q0</div><div class='del'>-	veor		q12, q12, q1</div><div class='del'>-	veor		q13, q13, q2</div><div class='del'>-	veor		q14, q14, q3</div><div class='del'>-</div><div class='del'>-	vrev32.16	q15, q15</div><div class='del'>-	vrev32.16	q12, q12</div><div class='del'>-	vrev32.16	q13, q13</div><div class='del'>-	vrev32.16	q14, q14</div><div class='del'>-</div><div class='del'>-	// x10 += x15, x5 = rotl32(x5 ^ x10, 12)</div><div class='del'>-	// x11 += x12, x6 = rotl32(x6 ^ x11, 12)</div><div class='del'>-	// x8 += x13, x7 = rotl32(x7 ^ x8, 12)</div><div class='del'>-	// x9 += x14, x4 = rotl32(x4 ^ x9, 12)</div><div class='del'>-	vadd.i32	q10, q10, q15</div><div class='del'>-	vadd.i32	q11, q11, q12</div><div class='del'>-	vadd.i32	q8, q8, q13</div><div class='del'>-	vadd.i32	q9, q9, q14</div><div class='del'>-</div><div class='del'>-	vst1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	veor		q8, q7, q8</div><div class='del'>-	veor		q9, q4, q9</div><div class='del'>-	vshl.u32	q7, q8, #12</div><div class='del'>-	vshl.u32	q4, q9, #12</div><div class='del'>-	vsri.u32	q7, q8, #20</div><div class='del'>-	vsri.u32	q4, q9, #20</div><div class='del'>-</div><div class='del'>-	veor		q8, q5, q10</div><div class='del'>-	veor		q9, q6, q11</div><div class='del'>-	vshl.u32	q5, q8, #12</div><div class='del'>-	vshl.u32	q6, q9, #12</div><div class='del'>-	vsri.u32	q5, q8, #20</div><div class='del'>-	vsri.u32	q6, q9, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x5, x15 = rotl32(x15 ^ x0, 8)</div><div class='del'>-	// x1 += x6, x12 = rotl32(x12 ^ x1, 8)</div><div class='del'>-	// x2 += x7, x13 = rotl32(x13 ^ x2, 8)</div><div class='del'>-	// x3 += x4, x14 = rotl32(x14 ^ x3, 8)</div><div class='del'>-	vld1.8		{d16}, [ip, :64]</div><div class='del'>-	vadd.i32	q0, q0, q5</div><div class='del'>-	vadd.i32	q1, q1, q6</div><div class='del'>-	vadd.i32	q2, q2, q7</div><div class='del'>-	vadd.i32	q3, q3, q4</div><div class='del'>-</div><div class='del'>-	veor		q15, q15, q0</div><div class='del'>-	veor		q12, q12, q1</div><div class='del'>-	veor		q13, q13, q2</div><div class='del'>-	veor		q14, q14, q3</div><div class='del'>-</div><div class='del'>-	vtbl.8		d30, {d30}, d16</div><div class='del'>-	vtbl.8		d31, {d31}, d16</div><div class='del'>-	vtbl.8		d24, {d24}, d16</div><div class='del'>-	vtbl.8		d25, {d25}, d16</div><div class='del'>-	vtbl.8		d26, {d26}, d16</div><div class='del'>-	vtbl.8		d27, {d27}, d16</div><div class='del'>-	vtbl.8		d28, {d28}, d16</div><div class='del'>-	vtbl.8		d29, {d29}, d16</div><div class='del'>-</div><div class='del'>-	vld1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	// x10 += x15, x5 = rotl32(x5 ^ x10, 7)</div><div class='del'>-	// x11 += x12, x6 = rotl32(x6 ^ x11, 7)</div><div class='del'>-	// x8 += x13, x7 = rotl32(x7 ^ x8, 7)</div><div class='del'>-	// x9 += x14, x4 = rotl32(x4 ^ x9, 7)</div><div class='del'>-	vadd.i32	q10, q10, q15</div><div class='del'>-	vadd.i32	q11, q11, q12</div><div class='del'>-	vadd.i32	q8, q8, q13</div><div class='del'>-	vadd.i32	q9, q9, q14</div><div class='del'>-</div><div class='del'>-	vst1.32		{q8-q9}, [sp, :256]</div><div class='del'>-</div><div class='del'>-	veor		q8, q7, q8</div><div class='del'>-	veor		q9, q4, q9</div><div class='del'>-	vshl.u32	q7, q8, #7</div><div class='del'>-	vshl.u32	q4, q9, #7</div><div class='del'>-	vsri.u32	q7, q8, #25</div><div class='del'>-	vsri.u32	q4, q9, #25</div><div class='del'>-</div><div class='del'>-	veor		q8, q5, q10</div><div class='del'>-	veor		q9, q6, q11</div><div class='del'>-	vshl.u32	q5, q8, #7</div><div class='del'>-	vshl.u32	q6, q9, #7</div><div class='del'>-	vsri.u32	q5, q8, #25</div><div class='del'>-	vsri.u32	q6, q9, #25</div><div class='del'>-</div><div class='del'>-	subs		r3, r3, #2</div><div class='del'>-	bne		.Ldoubleround4</div><div class='del'>-</div><div class='del'>-	// x0..7[0-3] are in q0-q7, x10..15[0-3] are in q10-q15.</div><div class='del'>-	// x8..9[0-3] are on the stack.</div><div class='del'>-</div><div class='del'>-	// Re-interleave the words in the first two rows of each block (x0..7).</div><div class='del'>-	// Also add the counter values 0-3 to x12[0-3].</div><div class='del'>-	  vld1.32	{q8}, [lr, :128]	// load counter values 0-3</div><div class='del'>-	vzip.32		q0, q1			// =&gt; (0 1 0 1) (0 1 0 1)</div><div class='del'>-	vzip.32		q2, q3			// =&gt; (2 3 2 3) (2 3 2 3)</div><div class='del'>-	vzip.32		q4, q5			// =&gt; (4 5 4 5) (4 5 4 5)</div><div class='del'>-	vzip.32		q6, q7			// =&gt; (6 7 6 7) (6 7 6 7)</div><div class='del'>-	  vadd.u32	q12, q8			// x12 += counter values 0-3</div><div class='del'>-	vswp		d1, d4</div><div class='del'>-	vswp		d3, d6</div><div class='del'>-	  vld1.32	{q8-q9}, [r0]!		// load s0..7</div><div class='del'>-	vswp		d9, d12</div><div class='del'>-	vswp		d11, d14</div><div class='del'>-</div><div class='del'>-	// Swap q1 and q4 so that we'll free up consecutive registers (q0-q1)</div><div class='del'>-	// after XORing the first 32 bytes.</div><div class='del'>-	vswp		q1, q4</div><div class='del'>-</div><div class='del'>-	// First two rows of each block are (q0 q1) (q2 q6) (q4 q5) (q3 q7)</div><div class='del'>-</div><div class='del'>-	// x0..3[0-3] += s0..3[0-3]	(add orig state to 1st row of each block)</div><div class='del'>-	vadd.u32	q0, q0, q8</div><div class='del'>-	vadd.u32	q2, q2, q8</div><div class='del'>-	vadd.u32	q4, q4, q8</div><div class='del'>-	vadd.u32	q3, q3, q8</div><div class='del'>-</div><div class='del'>-	// x4..7[0-3] += s4..7[0-3]	(add orig state to 2nd row of each block)</div><div class='del'>-	vadd.u32	q1, q1, q9</div><div class='del'>-	vadd.u32	q6, q6, q9</div><div class='del'>-	vadd.u32	q5, q5, q9</div><div class='del'>-	vadd.u32	q7, q7, q9</div><div class='del'>-</div><div class='del'>-	// XOR first 32 bytes using keystream from first two rows of first block</div><div class='del'>-	vld1.8		{q8-q9}, [r2]!</div><div class='del'>-	veor		q8, q8, q0</div><div class='del'>-	veor		q9, q9, q1</div><div class='del'>-	vst1.8		{q8-q9}, [r1]!</div><div class='del'>-</div><div class='del'>-	// Re-interleave the words in the last two rows of each block (x8..15).</div><div class='del'>-	vld1.32		{q8-q9}, [sp, :256]</div><div class='del'>-	  mov		sp, r4		// restore original stack pointer</div><div class='del'>-	  ldr		r4, [r4, #8]	// load number of bytes</div><div class='del'>-	vzip.32		q12, q13	// =&gt; (12 13 12 13) (12 13 12 13)</div><div class='del'>-	vzip.32		q14, q15	// =&gt; (14 15 14 15) (14 15 14 15)</div><div class='del'>-	vzip.32		q8, q9		// =&gt; (8 9 8 9) (8 9 8 9)</div><div class='del'>-	vzip.32		q10, q11	// =&gt; (10 11 10 11) (10 11 10 11)</div><div class='del'>-	  vld1.32	{q0-q1}, [r0]	// load s8..15</div><div class='del'>-	vswp		d25, d28</div><div class='del'>-	vswp		d27, d30</div><div class='del'>-	vswp		d17, d20</div><div class='del'>-	vswp		d19, d22</div><div class='del'>-</div><div class='del'>-	// Last two rows of each block are (q8 q12) (q10 q14) (q9 q13) (q11 q15)</div><div class='del'>-</div><div class='del'>-	// x8..11[0-3] += s8..11[0-3]	(add orig state to 3rd row of each block)</div><div class='del'>-	vadd.u32	q8,  q8,  q0</div><div class='del'>-	vadd.u32	q10, q10, q0</div><div class='del'>-	vadd.u32	q9,  q9,  q0</div><div class='del'>-	vadd.u32	q11, q11, q0</div><div class='del'>-</div><div class='del'>-	// x12..15[0-3] += s12..15[0-3] (add orig state to 4th row of each block)</div><div class='del'>-	vadd.u32	q12, q12, q1</div><div class='del'>-	vadd.u32	q14, q14, q1</div><div class='del'>-	vadd.u32	q13, q13, q1</div><div class='del'>-	vadd.u32	q15, q15, q1</div><div class='del'>-</div><div class='del'>-	// XOR the rest of the data with the keystream</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #96</div><div class='del'>-	veor		q0, q0, q8</div><div class='del'>-	veor		q1, q1, q12</div><div class='del'>-	ble		.Lle96</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #32</div><div class='del'>-	veor		q0, q0, q2</div><div class='del'>-	veor		q1, q1, q6</div><div class='del'>-	ble		.Lle128</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #32</div><div class='del'>-	veor		q0, q0, q10</div><div class='del'>-	veor		q1, q1, q14</div><div class='del'>-	ble		.Lle160</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #32</div><div class='del'>-	veor		q0, q0, q4</div><div class='del'>-	veor		q1, q1, q5</div><div class='del'>-	ble		.Lle192</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #32</div><div class='del'>-	veor		q0, q0, q9</div><div class='del'>-	veor		q1, q1, q13</div><div class='del'>-	ble		.Lle224</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]!</div><div class='del'>-	subs		r4, r4, #32</div><div class='del'>-	veor		q0, q0, q3</div><div class='del'>-	veor		q1, q1, q7</div><div class='del'>-	blt		.Llt256</div><div class='del'>-.Lout:</div><div class='del'>-	vst1.8		{q0-q1}, [r1]!</div><div class='del'>-</div><div class='del'>-	vld1.8		{q0-q1}, [r2]</div><div class='del'>-	veor		q0, q0, q11</div><div class='del'>-	veor		q1, q1, q15</div><div class='del'>-	vst1.8		{q0-q1}, [r1]</div><div class='del'>-</div><div class='del'>-	pop		{r4, pc}</div><div class='del'>-</div><div class='del'>-.Lle192:</div><div class='del'>-	vmov		q4, q9</div><div class='del'>-	vmov		q5, q13</div><div class='del'>-</div><div class='del'>-.Lle160:</div><div class='del'>-	// nothing to do</div><div class='del'>-</div><div class='del'>-.Lfinalblock:</div><div class='del'>-	// Process the final block if processing less than 4 full blocks.</div><div class='del'>-	// Entered with 32 bytes of ChaCha cipher stream in q4-q5, and the</div><div class='del'>-	// previous 32 byte output block that still needs to be written at</div><div class='del'>-	// [r1] in q0-q1.</div><div class='del'>-	beq		.Lfullblock</div><div class='del'>-</div><div class='del'>-.Lpartialblock:</div><div class='del'>-	adr		lr, .Lpermute + 32</div><div class='del'>-	add		r2, r2, r4</div><div class='del'>-	add		lr, lr, r4</div><div class='del'>-	add		r4, r4, r1</div><div class='del'>-</div><div class='del'>-	vld1.8		{q2-q3}, [lr]</div><div class='del'>-	vld1.8		{q6-q7}, [r2]</div><div class='del'>-</div><div class='del'>-	add		r4, r4, #32</div><div class='del'>-</div><div class='del'>-	vtbl.8		d4, {q4-q5}, d4</div><div class='del'>-	vtbl.8		d5, {q4-q5}, d5</div><div class='del'>-	vtbl.8		d6, {q4-q5}, d6</div><div class='del'>-	vtbl.8		d7, {q4-q5}, d7</div><div class='del'>-</div><div class='del'>-	veor		q6, q6, q2</div><div class='del'>-	veor		q7, q7, q3</div><div class='del'>-</div><div class='del'>-	vst1.8		{q6-q7}, [r4]	// overlapping stores</div><div class='del'>-	vst1.8		{q0-q1}, [r1]</div><div class='del'>-	pop		{r4, pc}</div><div class='del'>-</div><div class='del'>-.Lfullblock:</div><div class='del'>-	vmov		q11, q4</div><div class='del'>-	vmov		q15, q5</div><div class='del'>-	b		.Lout</div><div class='del'>-.Lle96:</div><div class='del'>-	vmov		q4, q2</div><div class='del'>-	vmov		q5, q6</div><div class='del'>-	b		.Lfinalblock</div><div class='del'>-.Lle128:</div><div class='del'>-	vmov		q4, q10</div><div class='del'>-	vmov		q5, q14</div><div class='del'>-	b		.Lfinalblock</div><div class='del'>-.Lle224:</div><div class='del'>-	vmov		q4, q3</div><div class='del'>-	vmov		q5, q7</div><div class='del'>-	b		.Lfinalblock</div><div class='del'>-.Llt256:</div><div class='del'>-	vmov		q4, q11</div><div class='del'>-	vmov		q5, q15</div><div class='del'>-	b		.Lpartialblock</div><div class='del'>-ENDPROC(chacha_4block_xor_neon)</div><div class='del'>-</div><div class='del'>-	.align		L1_CACHE_SHIFT</div><div class='del'>-.Lpermute:</div><div class='del'>-	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07</div><div class='del'>-	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f</div><div class='del'>-	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17</div><div class='del'>-	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f</div><div class='del'>-	.byte		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07</div><div class='del'>-	.byte		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f</div><div class='del'>-	.byte		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17</div><div class='del'>-	.byte		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f</div><div class='head'>diff --git a/arch/arm/crypto/chacha-scalar-core.S b/arch/arm/crypto/chacha-scalar-core.S<br/>deleted file mode 100644<br/>index 083fe1ab96d0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/chacha-scalar-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/chacha-scalar-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,443 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2018 Google, Inc.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Design notes:</div><div class='del'>- *</div><div class='del'>- * 16 registers would be needed to hold the state matrix, but only 14 are</div><div class='del'>- * available because 'sp' and 'pc' cannot be used.  So we spill the elements</div><div class='del'>- * (x8, x9) to the stack and swap them out with (x10, x11).  This adds one</div><div class='del'>- * 'ldrd' and one 'strd' instruction per round.</div><div class='del'>- *</div><div class='del'>- * All rotates are performed using the implicit rotate operand accepted by the</div><div class='del'>- * 'add' and 'eor' instructions.  This is faster than using explicit rotate</div><div class='del'>- * instructions.  To make this work, we allow the values in the second and last</div><div class='del'>- * rows of the ChaCha state matrix (rows 'b' and 'd') to temporarily have the</div><div class='del'>- * wrong rotation amount.  The rotation amount is then fixed up just in time</div><div class='del'>- * when the values are used.  'brot' is the number of bits the values in row 'b'</div><div class='del'>- * need to be rotated right to arrive at the correct values, and 'drot'</div><div class='del'>- * similarly for row 'd'.  (brot, drot) start out as (0, 0) but we make it such</div><div class='del'>- * that they end up as (25, 24) after every round.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	// ChaCha state registers</div><div class='del'>-	X0	.req	r0</div><div class='del'>-	X1	.req	r1</div><div class='del'>-	X2	.req	r2</div><div class='del'>-	X3	.req	r3</div><div class='del'>-	X4	.req	r4</div><div class='del'>-	X5	.req	r5</div><div class='del'>-	X6	.req	r6</div><div class='del'>-	X7	.req	r7</div><div class='del'>-	X8_X10	.req	r8	// shared by x8 and x10</div><div class='del'>-	X9_X11	.req	r9	// shared by x9 and x11</div><div class='del'>-	X12	.req	r10</div><div class='del'>-	X13	.req	r11</div><div class='del'>-	X14	.req	r12</div><div class='del'>-	X15	.req	r14</div><div class='del'>-</div><div class='del'>-.macro _le32_bswap_4x	a, b, c, d,  tmp</div><div class='del'>-#ifdef __ARMEB__</div><div class='del'>-	rev_l		\a,  \tmp</div><div class='del'>-	rev_l		\b,  \tmp</div><div class='del'>-	rev_l		\c,  \tmp</div><div class='del'>-	rev_l		\d,  \tmp</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro __ldrd		a, b, src, offset</div><div class='del'>-#if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='del'>-	ldrd		\a, \b, [\src, #\offset]</div><div class='del'>-#else</div><div class='del'>-	ldr		\a, [\src, #\offset]</div><div class='del'>-	ldr		\b, [\src, #\offset + 4]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro __strd		a, b, dst, offset</div><div class='del'>-#if __LINUX_ARM_ARCH__ &gt;= 6</div><div class='del'>-	strd		\a, \b, [\dst, #\offset]</div><div class='del'>-#else</div><div class='del'>-	str		\a, [\dst, #\offset]</div><div class='del'>-	str		\b, [\dst, #\offset + 4]</div><div class='del'>-#endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _halfround	a1, b1, c1, d1,  a2, b2, c2, d2</div><div class='del'>-</div><div class='del'>-	// a += b; d ^= a; d = rol(d, 16);</div><div class='del'>-	add		\a1, \a1, \b1, ror #brot</div><div class='del'>-	add		\a2, \a2, \b2, ror #brot</div><div class='del'>-	eor		\d1, \a1, \d1, ror #drot</div><div class='del'>-	eor		\d2, \a2, \d2, ror #drot</div><div class='del'>-	// drot == 32 - 16 == 16</div><div class='del'>-</div><div class='del'>-	// c += d; b ^= c; b = rol(b, 12);</div><div class='del'>-	add		\c1, \c1, \d1, ror #16</div><div class='del'>-	add		\c2, \c2, \d2, ror #16</div><div class='del'>-	eor		\b1, \c1, \b1, ror #brot</div><div class='del'>-	eor		\b2, \c2, \b2, ror #brot</div><div class='del'>-	// brot == 32 - 12 == 20</div><div class='del'>-</div><div class='del'>-	// a += b; d ^= a; d = rol(d, 8);</div><div class='del'>-	add		\a1, \a1, \b1, ror #20</div><div class='del'>-	add		\a2, \a2, \b2, ror #20</div><div class='del'>-	eor		\d1, \a1, \d1, ror #16</div><div class='del'>-	eor		\d2, \a2, \d2, ror #16</div><div class='del'>-	// drot == 32 - 8 == 24</div><div class='del'>-</div><div class='del'>-	// c += d; b ^= c; b = rol(b, 7);</div><div class='del'>-	add		\c1, \c1, \d1, ror #24</div><div class='del'>-	add		\c2, \c2, \d2, ror #24</div><div class='del'>-	eor		\b1, \c1, \b1, ror #20</div><div class='del'>-	eor		\b2, \c2, \b2, ror #20</div><div class='del'>-	// brot == 32 - 7 == 25</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _doubleround</div><div class='del'>-</div><div class='del'>-	// column round</div><div class='del'>-</div><div class='del'>-	// quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13)</div><div class='del'>-	_halfround	X0, X4, X8_X10, X12,  X1, X5, X9_X11, X13</div><div class='del'>-</div><div class='del'>-	// save (x8, x9); restore (x10, x11)</div><div class='del'>-	__strd		X8_X10, X9_X11, sp, 0</div><div class='del'>-	__ldrd		X8_X10, X9_X11, sp, 8</div><div class='del'>-</div><div class='del'>-	// quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15)</div><div class='del'>-	_halfround	X2, X6, X8_X10, X14,  X3, X7, X9_X11, X15</div><div class='del'>-</div><div class='del'>-	.set brot, 25</div><div class='del'>-	.set drot, 24</div><div class='del'>-</div><div class='del'>-	// diagonal round</div><div class='del'>-</div><div class='del'>-	// quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)</div><div class='del'>-	_halfround	X0, X5, X8_X10, X15,  X1, X6, X9_X11, X12</div><div class='del'>-</div><div class='del'>-	// save (x10, x11); restore (x8, x9)</div><div class='del'>-	__strd		X8_X10, X9_X11, sp, 8</div><div class='del'>-	__ldrd		X8_X10, X9_X11, sp, 0</div><div class='del'>-</div><div class='del'>-	// quarterrounds: (x2, x7, x8, x13) and (x3, x4, x9, x14)</div><div class='del'>-	_halfround	X2, X7, X8_X10, X13,  X3, X4, X9_X11, X14</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _chacha_permute	nrounds</div><div class='del'>-	.set brot, 0</div><div class='del'>-	.set drot, 0</div><div class='del'>-	.rept \nrounds / 2</div><div class='del'>-	 _doubleround</div><div class='del'>-	.endr</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro _chacha		nrounds</div><div class='del'>-</div><div class='del'>-.Lnext_block\@:</div><div class='del'>-	// Stack: unused0-unused1 x10-x11 x0-x15 OUT IN LEN</div><div class='del'>-	// Registers contain x0-x9,x12-x15.</div><div class='del'>-</div><div class='del'>-	// Do the core ChaCha permutation to update x0-x15.</div><div class='del'>-	_chacha_permute	\nrounds</div><div class='del'>-</div><div class='del'>-	add		sp, #8</div><div class='del'>-	// Stack: x10-x11 orig_x0-orig_x15 OUT IN LEN</div><div class='del'>-	// Registers contain x0-x9,x12-x15.</div><div class='del'>-	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.</div><div class='del'>-</div><div class='del'>-	// Free up some registers (r8-r12,r14) by pushing (x8-x9,x12-x15).</div><div class='del'>-	push		{X8_X10, X9_X11, X12, X13, X14, X15}</div><div class='del'>-</div><div class='del'>-	// Load (OUT, IN, LEN).</div><div class='del'>-	ldr		r14, [sp, #96]</div><div class='del'>-	ldr		r12, [sp, #100]</div><div class='del'>-	ldr		r11, [sp, #104]</div><div class='del'>-</div><div class='del'>-	orr		r10, r14, r12</div><div class='del'>-</div><div class='del'>-	// Use slow path if fewer than 64 bytes remain.</div><div class='del'>-	cmp		r11, #64</div><div class='del'>-	blt		.Lxor_slowpath\@</div><div class='del'>-</div><div class='del'>-	// Use slow path if IN and/or OUT isn't 4-byte aligned.  Needed even on</div><div class='del'>-	// ARMv6+, since ldmia and stmia (used below) still require alignment.</div><div class='del'>-	tst		r10, #3</div><div class='del'>-	bne		.Lxor_slowpath\@</div><div class='del'>-</div><div class='del'>-	// Fast path: XOR 64 bytes of aligned data.</div><div class='del'>-</div><div class='del'>-	// Stack: x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN</div><div class='del'>-	// Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is OUT.</div><div class='del'>-	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.</div><div class='del'>-</div><div class='del'>-	// x0-x3</div><div class='del'>-	__ldrd		r8, r9, sp, 32</div><div class='del'>-	__ldrd		r10, r11, sp, 40</div><div class='del'>-	add		X0, X0, r8</div><div class='del'>-	add		X1, X1, r9</div><div class='del'>-	add		X2, X2, r10</div><div class='del'>-	add		X3, X3, r11</div><div class='del'>-	_le32_bswap_4x	X0, X1, X2, X3,  r8</div><div class='del'>-	ldmia		r12!, {r8-r11}</div><div class='del'>-	eor		X0, X0, r8</div><div class='del'>-	eor		X1, X1, r9</div><div class='del'>-	eor		X2, X2, r10</div><div class='del'>-	eor		X3, X3, r11</div><div class='del'>-	stmia		r14!, {X0-X3}</div><div class='del'>-</div><div class='del'>-	// x4-x7</div><div class='del'>-	__ldrd		r8, r9, sp, 48</div><div class='del'>-	__ldrd		r10, r11, sp, 56</div><div class='del'>-	add		X4, r8, X4, ror #brot</div><div class='del'>-	add		X5, r9, X5, ror #brot</div><div class='del'>-	ldmia		r12!, {X0-X3}</div><div class='del'>-	add		X6, r10, X6, ror #brot</div><div class='del'>-	add		X7, r11, X7, ror #brot</div><div class='del'>-	_le32_bswap_4x	X4, X5, X6, X7,  r8</div><div class='del'>-	eor		X4, X4, X0</div><div class='del'>-	eor		X5, X5, X1</div><div class='del'>-	eor		X6, X6, X2</div><div class='del'>-	eor		X7, X7, X3</div><div class='del'>-	stmia		r14!, {X4-X7}</div><div class='del'>-</div><div class='del'>-	// x8-x15</div><div class='del'>-	pop		{r0-r7}			// (x8-x9,x12-x15,x10-x11)</div><div class='del'>-	__ldrd		r8, r9, sp, 32</div><div class='del'>-	__ldrd		r10, r11, sp, 40</div><div class='del'>-	add		r0, r0, r8		// x8</div><div class='del'>-	add		r1, r1, r9		// x9</div><div class='del'>-	add		r6, r6, r10		// x10</div><div class='del'>-	add		r7, r7, r11		// x11</div><div class='del'>-	_le32_bswap_4x	r0, r1, r6, r7,  r8</div><div class='del'>-	ldmia		r12!, {r8-r11}</div><div class='del'>-	eor		r0, r0, r8		// x8</div><div class='del'>-	eor		r1, r1, r9		// x9</div><div class='del'>-	eor		r6, r6, r10		// x10</div><div class='del'>-	eor		r7, r7, r11		// x11</div><div class='del'>-	stmia		r14!, {r0,r1,r6,r7}</div><div class='del'>-	ldmia		r12!, {r0,r1,r6,r7}</div><div class='del'>-	__ldrd		r8, r9, sp, 48</div><div class='del'>-	__ldrd		r10, r11, sp, 56</div><div class='del'>-	add		r2, r8, r2, ror #drot	// x12</div><div class='del'>-	add		r3, r9, r3, ror #drot	// x13</div><div class='del'>-	add		r4, r10, r4, ror #drot	// x14</div><div class='del'>-	add		r5, r11, r5, ror #drot	// x15</div><div class='del'>-	_le32_bswap_4x	r2, r3, r4, r5,  r9</div><div class='del'>-	  ldr		r9, [sp, #72]		// load LEN</div><div class='del'>-	eor		r2, r2, r0		// x12</div><div class='del'>-	eor		r3, r3, r1		// x13</div><div class='del'>-	eor		r4, r4, r6		// x14</div><div class='del'>-	eor		r5, r5, r7		// x15</div><div class='del'>-	  subs		r9, #64			// decrement and check LEN</div><div class='del'>-	stmia		r14!, {r2-r5}</div><div class='del'>-</div><div class='del'>-	beq		.Ldone\@</div><div class='del'>-</div><div class='del'>-.Lprepare_for_next_block\@:</div><div class='del'>-</div><div class='del'>-	// Stack: x0-x15 OUT IN LEN</div><div class='del'>-</div><div class='del'>-	// Increment block counter (x12)</div><div class='del'>-	add		r8, #1</div><div class='del'>-</div><div class='del'>-	// Store updated (OUT, IN, LEN)</div><div class='del'>-	str		r14, [sp, #64]</div><div class='del'>-	str		r12, [sp, #68]</div><div class='del'>-	str		r9, [sp, #72]</div><div class='del'>-</div><div class='del'>-	  mov		r14, sp</div><div class='del'>-</div><div class='del'>-	// Store updated block counter (x12)</div><div class='del'>-	str		r8, [sp, #48]</div><div class='del'>-</div><div class='del'>-	  sub		sp, #16</div><div class='del'>-</div><div class='del'>-	// Reload state and do next block</div><div class='del'>-	ldmia		r14!, {r0-r11}		// load x0-x11</div><div class='del'>-	__strd		r10, r11, sp, 8		// store x10-x11 before state</div><div class='del'>-	ldmia		r14, {r10-r12,r14}	// load x12-x15</div><div class='del'>-	b		.Lnext_block\@</div><div class='del'>-</div><div class='del'>-.Lxor_slowpath\@:</div><div class='del'>-	// Slow path: &lt; 64 bytes remaining, or unaligned input or output buffer.</div><div class='del'>-	// We handle it by storing the 64 bytes of keystream to the stack, then</div><div class='del'>-	// XOR-ing the needed portion with the data.</div><div class='del'>-</div><div class='del'>-	// Allocate keystream buffer</div><div class='del'>-	sub		sp, #64</div><div class='del'>-	mov		r14, sp</div><div class='del'>-</div><div class='del'>-	// Stack: ks0-ks15 x8-x9 x12-x15 x10-x11 orig_x0-orig_x15 OUT IN LEN</div><div class='del'>-	// Registers: r0-r7 are x0-x7; r8-r11 are free; r12 is IN; r14 is &amp;ks0.</div><div class='del'>-	// x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.</div><div class='del'>-</div><div class='del'>-	// Save keystream for x0-x3</div><div class='del'>-	__ldrd		r8, r9, sp, 96</div><div class='del'>-	__ldrd		r10, r11, sp, 104</div><div class='del'>-	add		X0, X0, r8</div><div class='del'>-	add		X1, X1, r9</div><div class='del'>-	add		X2, X2, r10</div><div class='del'>-	add		X3, X3, r11</div><div class='del'>-	_le32_bswap_4x	X0, X1, X2, X3,  r8</div><div class='del'>-	stmia		r14!, {X0-X3}</div><div class='del'>-</div><div class='del'>-	// Save keystream for x4-x7</div><div class='del'>-	__ldrd		r8, r9, sp, 112</div><div class='del'>-	__ldrd		r10, r11, sp, 120</div><div class='del'>-	add		X4, r8, X4, ror #brot</div><div class='del'>-	add		X5, r9, X5, ror #brot</div><div class='del'>-	add		X6, r10, X6, ror #brot</div><div class='del'>-	add		X7, r11, X7, ror #brot</div><div class='del'>-	_le32_bswap_4x	X4, X5, X6, X7,  r8</div><div class='del'>-	  add		r8, sp, #64</div><div class='del'>-	stmia		r14!, {X4-X7}</div><div class='del'>-</div><div class='del'>-	// Save keystream for x8-x15</div><div class='del'>-	ldm		r8, {r0-r7}		// (x8-x9,x12-x15,x10-x11)</div><div class='del'>-	__ldrd		r8, r9, sp, 128</div><div class='del'>-	__ldrd		r10, r11, sp, 136</div><div class='del'>-	add		r0, r0, r8		// x8</div><div class='del'>-	add		r1, r1, r9		// x9</div><div class='del'>-	add		r6, r6, r10		// x10</div><div class='del'>-	add		r7, r7, r11		// x11</div><div class='del'>-	_le32_bswap_4x	r0, r1, r6, r7,  r8</div><div class='del'>-	stmia		r14!, {r0,r1,r6,r7}</div><div class='del'>-	__ldrd		r8, r9, sp, 144</div><div class='del'>-	__ldrd		r10, r11, sp, 152</div><div class='del'>-	add		r2, r8, r2, ror #drot	// x12</div><div class='del'>-	add		r3, r9, r3, ror #drot	// x13</div><div class='del'>-	add		r4, r10, r4, ror #drot	// x14</div><div class='del'>-	add		r5, r11, r5, ror #drot	// x15</div><div class='del'>-	_le32_bswap_4x	r2, r3, r4, r5,  r9</div><div class='del'>-	stmia		r14, {r2-r5}</div><div class='del'>-</div><div class='del'>-	// Stack: ks0-ks15 unused0-unused7 x0-x15 OUT IN LEN</div><div class='del'>-	// Registers: r8 is block counter, r12 is IN.</div><div class='del'>-</div><div class='del'>-	ldr		r9, [sp, #168]		// LEN</div><div class='del'>-	ldr		r14, [sp, #160]		// OUT</div><div class='del'>-	cmp		r9, #64</div><div class='del'>-	  mov		r0, sp</div><div class='del'>-	movle		r1, r9</div><div class='del'>-	movgt		r1, #64</div><div class='del'>-	// r1 is number of bytes to XOR, in range [1, 64]</div><div class='del'>-</div><div class='del'>-.if __LINUX_ARM_ARCH__ &lt; 6</div><div class='del'>-	orr		r2, r12, r14</div><div class='del'>-	tst		r2, #3			// IN or OUT misaligned?</div><div class='del'>-	bne		.Lxor_next_byte\@</div><div class='del'>-.endif</div><div class='del'>-</div><div class='del'>-	// XOR a word at a time</div><div class='del'>-.rept 16</div><div class='del'>-	subs		r1, #4</div><div class='del'>-	blt		.Lxor_words_done\@</div><div class='del'>-	ldr		r2, [r12], #4</div><div class='del'>-	ldr		r3, [r0], #4</div><div class='del'>-	eor		r2, r2, r3</div><div class='del'>-	str		r2, [r14], #4</div><div class='del'>-.endr</div><div class='del'>-	b		.Lxor_slowpath_done\@</div><div class='del'>-.Lxor_words_done\@:</div><div class='del'>-	ands		r1, r1, #3</div><div class='del'>-	beq		.Lxor_slowpath_done\@</div><div class='del'>-</div><div class='del'>-	// XOR a byte at a time</div><div class='del'>-.Lxor_next_byte\@:</div><div class='del'>-	ldrb		r2, [r12], #1</div><div class='del'>-	ldrb		r3, [r0], #1</div><div class='del'>-	eor		r2, r2, r3</div><div class='del'>-	strb		r2, [r14], #1</div><div class='del'>-	subs		r1, #1</div><div class='del'>-	bne		.Lxor_next_byte\@</div><div class='del'>-</div><div class='del'>-.Lxor_slowpath_done\@:</div><div class='del'>-	subs		r9, #64</div><div class='del'>-	add		sp, #96</div><div class='del'>-	bgt		.Lprepare_for_next_block\@</div><div class='del'>-</div><div class='del'>-.Ldone\@:</div><div class='del'>-.endm	// _chacha</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>- *		     const u32 *state, int nrounds);</div><div class='del'>- */</div><div class='del'>-ENTRY(chacha_doarm)</div><div class='del'>-	cmp		r2, #0			// len == 0?</div><div class='del'>-	reteq		lr</div><div class='del'>-</div><div class='del'>-	ldr		ip, [sp]</div><div class='del'>-	cmp		ip, #12</div><div class='del'>-</div><div class='del'>-	push		{r0-r2,r4-r11,lr}</div><div class='del'>-</div><div class='del'>-	// Push state x0-x15 onto stack.</div><div class='del'>-	// Also store an extra copy of x10-x11 just before the state.</div><div class='del'>-</div><div class='del'>-	add		X12, r3, #48</div><div class='del'>-	ldm		X12, {X12,X13,X14,X15}</div><div class='del'>-	push		{X12,X13,X14,X15}</div><div class='del'>-	sub		sp, sp, #64</div><div class='del'>-</div><div class='del'>-	__ldrd		X8_X10, X9_X11, r3, 40</div><div class='del'>-	__strd		X8_X10, X9_X11, sp, 8</div><div class='del'>-	__strd		X8_X10, X9_X11, sp, 56</div><div class='del'>-	ldm		r3, {X0-X9_X11}</div><div class='del'>-	__strd		X0, X1, sp, 16</div><div class='del'>-	__strd		X2, X3, sp, 24</div><div class='del'>-	__strd		X4, X5, sp, 32</div><div class='del'>-	__strd		X6, X7, sp, 40</div><div class='del'>-	__strd		X8_X10, X9_X11, sp, 48</div><div class='del'>-</div><div class='del'>-	beq		1f</div><div class='del'>-	_chacha		20</div><div class='del'>-</div><div class='del'>-0:	add		sp, #76</div><div class='del'>-	pop		{r4-r11, pc}</div><div class='del'>-</div><div class='del'>-1:	_chacha		12</div><div class='del'>-	b		0b</div><div class='del'>-ENDPROC(chacha_doarm)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * void hchacha_block_arm(const u32 state[16], u32 out[8], int nrounds);</div><div class='del'>- */</div><div class='del'>-ENTRY(hchacha_block_arm)</div><div class='del'>-	push		{r1,r4-r11,lr}</div><div class='del'>-</div><div class='del'>-	cmp		r2, #12			// ChaCha12 ?</div><div class='del'>-</div><div class='del'>-	mov		r14, r0</div><div class='del'>-	ldmia		r14!, {r0-r11}		// load x0-x11</div><div class='del'>-	push		{r10-r11}		// store x10-x11 to stack</div><div class='del'>-	ldm		r14, {r10-r12,r14}	// load x12-x15</div><div class='del'>-	sub		sp, #8</div><div class='del'>-</div><div class='del'>-	beq		1f</div><div class='del'>-	_chacha_permute	20</div><div class='del'>-</div><div class='del'>-	// Skip over (unused0-unused1, x10-x11)</div><div class='del'>-0:	add		sp, #16</div><div class='del'>-</div><div class='del'>-	// Fix up rotations of x12-x15</div><div class='del'>-	ror		X12, X12, #drot</div><div class='del'>-	ror		X13, X13, #drot</div><div class='del'>-	  pop		{r4}			// load 'out'</div><div class='del'>-	ror		X14, X14, #drot</div><div class='del'>-	ror		X15, X15, #drot</div><div class='del'>-</div><div class='del'>-	// Store (x0-x3,x12-x15) to 'out'</div><div class='del'>-	stm		r4, {X0,X1,X2,X3,X12,X13,X14,X15}</div><div class='del'>-</div><div class='del'>-	pop		{r4-r11,pc}</div><div class='del'>-</div><div class='del'>-1:	_chacha_permute	12</div><div class='del'>-	b		0b</div><div class='del'>-ENDPROC(hchacha_block_arm)</div><div class='head'>diff --git a/arch/arm/crypto/crc32-ce-core.S b/arch/arm/crypto/crc32-ce-core.S<br/>deleted file mode 100644<br/>index 88f9edf94e95..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/crc32-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crc32-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,307 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Accelerated CRC32(C) using ARM CRC, NEON and Crypto Extensions instructions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* GPL HEADER START</div><div class='del'>- *</div><div class='del'>- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 only,</div><div class='del'>- * as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License version 2 for more details (a copy is included</div><div class='del'>- * in the LICENSE file that accompanied this code).</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * version 2 along with this program; If not, see http://www.gnu.org/licenses</div><div class='del'>- *</div><div class='del'>- * Please  visit http://www.xyratex.com/contact if you need additional</div><div class='del'>- * information or have any questions.</div><div class='del'>- *</div><div class='del'>- * GPL HEADER END</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copyright 2012 Xyratex Technology Limited</div><div class='del'>- *</div><div class='del'>- * Using hardware provided PCLMULQDQ instruction to accelerate the CRC32</div><div class='del'>- * calculation.</div><div class='del'>- * CRC32 polynomial:0x04c11db7(BE)/0xEDB88320(LE)</div><div class='del'>- * PCLMULQDQ is a new instruction in Intel SSE4.2, the reference can be found</div><div class='del'>- * at:</div><div class='del'>- * https://www.intel.com/products/processor/manuals/</div><div class='del'>- * Intel(R) 64 and IA-32 Architectures Software Developer's Manual</div><div class='del'>- * Volume 2B: Instruction Set Reference, N-Z</div><div class='del'>- *</div><div class='del'>- * Authors:   Gregory Prestas &lt;Gregory_Prestas@us.xyratex.com&gt;</div><div class='del'>- *	      Alexander Boyko &lt;Alexander_Boyko@xyratex.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.align		6</div><div class='del'>-	.arch		armv8-a</div><div class='del'>-	.arch_extension	crc</div><div class='del'>-	.fpu		crypto-neon-fp-armv8</div><div class='del'>-</div><div class='del'>-.Lcrc32_constants:</div><div class='del'>-	/*</div><div class='del'>-	 * [x4*128+32 mod P(x) &lt;&lt; 32)]'  &lt;&lt; 1   = 0x154442bd4</div><div class='del'>-	 * #define CONSTANT_R1  0x154442bd4LL</div><div class='del'>-	 *</div><div class='del'>-	 * [(x4*128-32 mod P(x) &lt;&lt; 32)]' &lt;&lt; 1   = 0x1c6e41596</div><div class='del'>-	 * #define CONSTANT_R2  0x1c6e41596LL</div><div class='del'>-	 */</div><div class='del'>-	.quad		0x0000000154442bd4</div><div class='del'>-	.quad		0x00000001c6e41596</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * [(x128+32 mod P(x) &lt;&lt; 32)]'   &lt;&lt; 1   = 0x1751997d0</div><div class='del'>-	 * #define CONSTANT_R3  0x1751997d0LL</div><div class='del'>-	 *</div><div class='del'>-	 * [(x128-32 mod P(x) &lt;&lt; 32)]'   &lt;&lt; 1   = 0x0ccaa009e</div><div class='del'>-	 * #define CONSTANT_R4  0x0ccaa009eLL</div><div class='del'>-	 */</div><div class='del'>-	.quad		0x00000001751997d0</div><div class='del'>-	.quad		0x00000000ccaa009e</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * [(x64 mod P(x) &lt;&lt; 32)]'       &lt;&lt; 1   = 0x163cd6124</div><div class='del'>-	 * #define CONSTANT_R5  0x163cd6124LL</div><div class='del'>-	 */</div><div class='del'>-	.quad		0x0000000163cd6124</div><div class='del'>-	.quad		0x00000000FFFFFFFF</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * #define CRCPOLY_TRUE_LE_FULL 0x1DB710641LL</div><div class='del'>-	 *</div><div class='del'>-	 * Barrett Reduction constant (u64`) = u` = (x**64 / P(x))`</div><div class='del'>-	 *                                                      = 0x1F7011641LL</div><div class='del'>-	 * #define CONSTANT_RU  0x1F7011641LL</div><div class='del'>-	 */</div><div class='del'>-	.quad		0x00000001DB710641</div><div class='del'>-	.quad		0x00000001F7011641</div><div class='del'>-</div><div class='del'>-.Lcrc32c_constants:</div><div class='del'>-	.quad		0x00000000740eef02</div><div class='del'>-	.quad		0x000000009e4addf8</div><div class='del'>-	.quad		0x00000000f20c0dfe</div><div class='del'>-	.quad		0x000000014cd00bd6</div><div class='del'>-	.quad		0x00000000dd45aab8</div><div class='del'>-	.quad		0x00000000FFFFFFFF</div><div class='del'>-	.quad		0x0000000105ec76f0</div><div class='del'>-	.quad		0x00000000dea713f1</div><div class='del'>-</div><div class='del'>-	dCONSTANTl	.req	d0</div><div class='del'>-	dCONSTANTh	.req	d1</div><div class='del'>-	qCONSTANT	.req	q0</div><div class='del'>-</div><div class='del'>-	BUF		.req	r0</div><div class='del'>-	LEN		.req	r1</div><div class='del'>-	CRC		.req	r2</div><div class='del'>-</div><div class='del'>-	qzr		.req	q9</div><div class='del'>-</div><div class='del'>-	/**</div><div class='del'>-	 * Calculate crc32</div><div class='del'>-	 * BUF - buffer</div><div class='del'>-	 * LEN - sizeof buffer (multiple of 16 bytes), LEN should be &gt; 63</div><div class='del'>-	 * CRC - initial crc32</div><div class='del'>-	 * return %eax crc32</div><div class='del'>-	 * uint crc32_pmull_le(unsigned char const *buffer,</div><div class='del'>-	 *                     size_t len, uint crc32)</div><div class='del'>-	 */</div><div class='del'>-SYM_FUNC_START(crc32_pmull_le)</div><div class='del'>-	adr		r3, .Lcrc32_constants</div><div class='del'>-	b		0f</div><div class='del'>-SYM_FUNC_END(crc32_pmull_le)</div><div class='del'>-</div><div class='del'>-SYM_FUNC_START(crc32c_pmull_le)</div><div class='del'>-	adr		r3, .Lcrc32c_constants</div><div class='del'>-</div><div class='del'>-0:	bic		LEN, LEN, #15</div><div class='del'>-	vld1.8		{q1-q2}, [BUF, :128]!</div><div class='del'>-	vld1.8		{q3-q4}, [BUF, :128]!</div><div class='del'>-	vmov.i8		qzr, #0</div><div class='del'>-	vmov.i8		qCONSTANT, #0</div><div class='del'>-	vmov.32		dCONSTANTl[0], CRC</div><div class='del'>-	veor.8		d2, d2, dCONSTANTl</div><div class='del'>-	sub		LEN, LEN, #0x40</div><div class='del'>-	cmp		LEN, #0x40</div><div class='del'>-	blt		less_64</div><div class='del'>-</div><div class='del'>-	vld1.64		{qCONSTANT}, [r3]</div><div class='del'>-</div><div class='del'>-loop_64:		/* 64 bytes Full cache line folding */</div><div class='del'>-	sub		LEN, LEN, #0x40</div><div class='del'>-</div><div class='del'>-	vmull.p64	q5, d3, dCONSTANTh</div><div class='del'>-	vmull.p64	q6, d5, dCONSTANTh</div><div class='del'>-	vmull.p64	q7, d7, dCONSTANTh</div><div class='del'>-	vmull.p64	q8, d9, dCONSTANTh</div><div class='del'>-</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	vmull.p64	q2, d4, dCONSTANTl</div><div class='del'>-	vmull.p64	q3, d6, dCONSTANTl</div><div class='del'>-	vmull.p64	q4, d8, dCONSTANTl</div><div class='del'>-</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	vld1.8		{q5}, [BUF, :128]!</div><div class='del'>-	veor.8		q2, q2, q6</div><div class='del'>-	vld1.8		{q6}, [BUF, :128]!</div><div class='del'>-	veor.8		q3, q3, q7</div><div class='del'>-	vld1.8		{q7}, [BUF, :128]!</div><div class='del'>-	veor.8		q4, q4, q8</div><div class='del'>-	vld1.8		{q8}, [BUF, :128]!</div><div class='del'>-</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	veor.8		q2, q2, q6</div><div class='del'>-	veor.8		q3, q3, q7</div><div class='del'>-	veor.8		q4, q4, q8</div><div class='del'>-</div><div class='del'>-	cmp		LEN, #0x40</div><div class='del'>-	bge		loop_64</div><div class='del'>-</div><div class='del'>-less_64:		/* Folding cache line into 128bit */</div><div class='del'>-	vldr		dCONSTANTl, [r3, #16]</div><div class='del'>-	vldr		dCONSTANTh, [r3, #24]</div><div class='del'>-</div><div class='del'>-	vmull.p64	q5, d3, dCONSTANTh</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	veor.8		q1, q1, q2</div><div class='del'>-</div><div class='del'>-	vmull.p64	q5, d3, dCONSTANTh</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	veor.8		q1, q1, q3</div><div class='del'>-</div><div class='del'>-	vmull.p64	q5, d3, dCONSTANTh</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	veor.8		q1, q1, q4</div><div class='del'>-</div><div class='del'>-	teq		LEN, #0</div><div class='del'>-	beq		fold_64</div><div class='del'>-</div><div class='del'>-loop_16:		/* Folding rest buffer into 128bit */</div><div class='del'>-	subs		LEN, LEN, #0x10</div><div class='del'>-</div><div class='del'>-	vld1.8		{q2}, [BUF, :128]!</div><div class='del'>-	vmull.p64	q5, d3, dCONSTANTh</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q5</div><div class='del'>-	veor.8		q1, q1, q2</div><div class='del'>-</div><div class='del'>-	bne		loop_16</div><div class='del'>-</div><div class='del'>-fold_64:</div><div class='del'>-	/* perform the last 64 bit fold, also adds 32 zeroes</div><div class='del'>-	 * to the input stream */</div><div class='del'>-	vmull.p64	q2, d2, dCONSTANTh</div><div class='del'>-	vext.8		q1, q1, qzr, #8</div><div class='del'>-	veor.8		q1, q1, q2</div><div class='del'>-</div><div class='del'>-	/* final 32-bit fold */</div><div class='del'>-	vldr		dCONSTANTl, [r3, #32]</div><div class='del'>-	vldr		d6, [r3, #40]</div><div class='del'>-	vmov.i8		d7, #0</div><div class='del'>-</div><div class='del'>-	vext.8		q2, q1, qzr, #4</div><div class='del'>-	vand.8		d2, d2, d6</div><div class='del'>-	vmull.p64	q1, d2, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q2</div><div class='del'>-</div><div class='del'>-	/* Finish up with the bit-reversed barrett reduction 64 ==&gt; 32 bits */</div><div class='del'>-	vldr		dCONSTANTl, [r3, #48]</div><div class='del'>-	vldr		dCONSTANTh, [r3, #56]</div><div class='del'>-</div><div class='del'>-	vand.8		q2, q1, q3</div><div class='del'>-	vext.8		q2, qzr, q2, #8</div><div class='del'>-	vmull.p64	q2, d5, dCONSTANTh</div><div class='del'>-	vand.8		q2, q2, q3</div><div class='del'>-	vmull.p64	q2, d4, dCONSTANTl</div><div class='del'>-	veor.8		q1, q1, q2</div><div class='del'>-	vmov		r0, s5</div><div class='del'>-</div><div class='del'>-	bx		lr</div><div class='del'>-SYM_FUNC_END(crc32c_pmull_le)</div><div class='del'>-</div><div class='del'>-	.macro		__crc32, c</div><div class='del'>-	subs		ip, r2, #8</div><div class='del'>-	bmi		.Ltail\c</div><div class='del'>-</div><div class='del'>-	tst		r1, #3</div><div class='del'>-	bne		.Lunaligned\c</div><div class='del'>-</div><div class='del'>-	teq		ip, #0</div><div class='del'>-.Laligned8\c:</div><div class='del'>-	ldrd		r2, r3, [r1], #8</div><div class='del'>-ARM_BE8(rev		r2, r2		)</div><div class='del'>-ARM_BE8(rev		r3, r3		)</div><div class='del'>-	crc32\c\()w	r0, r0, r2</div><div class='del'>-	crc32\c\()w	r0, r0, r3</div><div class='del'>-	bxeq		lr</div><div class='del'>-	subs		ip, ip, #8</div><div class='del'>-	bpl		.Laligned8\c</div><div class='del'>-</div><div class='del'>-.Ltail\c:</div><div class='del'>-	tst		ip, #4</div><div class='del'>-	beq		2f</div><div class='del'>-	ldr		r3, [r1], #4</div><div class='del'>-ARM_BE8(rev		r3, r3		)</div><div class='del'>-	crc32\c\()w	r0, r0, r3</div><div class='del'>-</div><div class='del'>-2:	tst		ip, #2</div><div class='del'>-	beq		1f</div><div class='del'>-	ldrh		r3, [r1], #2</div><div class='del'>-ARM_BE8(rev16		r3, r3		)</div><div class='del'>-	crc32\c\()h	r0, r0, r3</div><div class='del'>-</div><div class='del'>-1:	tst		ip, #1</div><div class='del'>-	bxeq		lr</div><div class='del'>-	ldrb		r3, [r1]</div><div class='del'>-	crc32\c\()b	r0, r0, r3</div><div class='del'>-	bx		lr</div><div class='del'>-</div><div class='del'>-.Lunaligned\c:</div><div class='del'>-	tst		r1, #1</div><div class='del'>-	beq		2f</div><div class='del'>-	ldrb		r3, [r1], #1</div><div class='del'>-	subs		r2, r2, #1</div><div class='del'>-	crc32\c\()b	r0, r0, r3</div><div class='del'>-</div><div class='del'>-	tst		r1, #2</div><div class='del'>-	beq		0f</div><div class='del'>-2:	ldrh		r3, [r1], #2</div><div class='del'>-	subs		r2, r2, #2</div><div class='del'>-ARM_BE8(rev16		r3, r3		)</div><div class='del'>-	crc32\c\()h	r0, r0, r3</div><div class='del'>-</div><div class='del'>-0:	subs		ip, r2, #8</div><div class='del'>-	bpl		.Laligned8\c</div><div class='del'>-	b		.Ltail\c</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-SYM_TYPED_FUNC_START(crc32_armv8_le)</div><div class='del'>-	__crc32</div><div class='del'>-SYM_FUNC_END(crc32_armv8_le)</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-SYM_TYPED_FUNC_START(crc32c_armv8_le)</div><div class='del'>-	__crc32		c</div><div class='del'>-SYM_FUNC_END(crc32c_armv8_le)</div><div class='head'>diff --git a/arch/arm/crypto/crc32-ce-glue.c b/arch/arm/crypto/crc32-ce-glue.c<br/>deleted file mode 100644<br/>index 20b4dff13e3a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/crc32-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crc32-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,247 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Accelerated CRC32(C) using ARM CRC, NEON and Crypto Extensions instructions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-#define PMULL_MIN_LEN		64L	/* minimum size of buffer</div><div class='del'>-					 * for crc32_pmull_le_16 */</div><div class='del'>-#define SCALE_F			16L	/* size of NEON register */</div><div class='del'>-</div><div class='del'>-asmlinkage u32 crc32_pmull_le(const u8 buf[], u32 len, u32 init_crc);</div><div class='del'>-asmlinkage u32 crc32_armv8_le(u32 init_crc, const u8 buf[], u32 len);</div><div class='del'>-</div><div class='del'>-asmlinkage u32 crc32c_pmull_le(const u8 buf[], u32 len, u32 init_crc);</div><div class='del'>-asmlinkage u32 crc32c_armv8_le(u32 init_crc, const u8 buf[], u32 len);</div><div class='del'>-</div><div class='del'>-static u32 (*fallback_crc32)(u32 init_crc, const u8 buf[], u32 len);</div><div class='del'>-static u32 (*fallback_crc32c)(u32 init_crc, const u8 buf[], u32 len);</div><div class='del'>-</div><div class='del'>-static int crc32_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	u32 *key = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	*key = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	u32 *key = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	*key = ~0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32_setkey(struct crypto_shash *hash, const u8 *key,</div><div class='del'>-			unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	u32 *mctx = crypto_shash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	if (keylen != sizeof(u32))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	*mctx = le32_to_cpup((__le32 *)key);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u32 *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = *mctx;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = crc32_armv8_le(*crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = crc32c_armv8_le(*crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(*crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(~*crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32_pmull_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int l;</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		if ((u32)data % SCALE_F) {</div><div class='del'>-			l = min_t(u32, length, SCALE_F - ((u32)data % SCALE_F));</div><div class='del'>-</div><div class='del'>-			*crc = fallback_crc32(*crc, data, l);</div><div class='del'>-</div><div class='del'>-			data += l;</div><div class='del'>-			length -= l;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (length &gt;= PMULL_MIN_LEN) {</div><div class='del'>-			l = round_down(length, SCALE_F);</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			*crc = crc32_pmull_le(data, l, *crc);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-</div><div class='del'>-			data += l;</div><div class='del'>-			length -= l;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (length &gt; 0)</div><div class='del'>-		*crc = fallback_crc32(*crc, data, length);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_pmull_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			       unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u32 *crc = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int l;</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		if ((u32)data % SCALE_F) {</div><div class='del'>-			l = min_t(u32, length, SCALE_F - ((u32)data % SCALE_F));</div><div class='del'>-</div><div class='del'>-			*crc = fallback_crc32c(*crc, data, l);</div><div class='del'>-</div><div class='del'>-			data += l;</div><div class='del'>-			length -= l;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (length &gt;= PMULL_MIN_LEN) {</div><div class='del'>-			l = round_down(length, SCALE_F);</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			*crc = crc32c_pmull_le(data, l, *crc);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-</div><div class='del'>-			data += l;</div><div class='del'>-			length -= l;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (length &gt; 0)</div><div class='del'>-		*crc = fallback_crc32c(*crc, data, length);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc32_pmull_algs[] = { {</div><div class='del'>-	.setkey			= crc32_setkey,</div><div class='del'>-	.init			= crc32_init,</div><div class='del'>-	.update			= crc32_update,</div><div class='del'>-	.final			= crc32_final,</div><div class='del'>-	.descsize		= sizeof(u32),</div><div class='del'>-	.digestsize		= sizeof(u32),</div><div class='del'>-</div><div class='del'>-	.base.cra_ctxsize	= sizeof(u32),</div><div class='del'>-	.base.cra_init		= crc32_cra_init,</div><div class='del'>-	.base.cra_name		= "crc32",</div><div class='del'>-	.base.cra_driver_name	= "crc32-arm-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.setkey			= crc32_setkey,</div><div class='del'>-	.init			= crc32_init,</div><div class='del'>-	.update			= crc32c_update,</div><div class='del'>-	.final			= crc32c_final,</div><div class='del'>-	.descsize		= sizeof(u32),</div><div class='del'>-	.digestsize		= sizeof(u32),</div><div class='del'>-</div><div class='del'>-	.base.cra_ctxsize	= sizeof(u32),</div><div class='del'>-	.base.cra_init		= crc32c_cra_init,</div><div class='del'>-	.base.cra_name		= "crc32c",</div><div class='del'>-	.base.cra_driver_name	= "crc32c-arm-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init crc32_pmull_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (elf_hwcap2 &amp; HWCAP2_PMULL) {</div><div class='del'>-		crc32_pmull_algs[0].update = crc32_pmull_update;</div><div class='del'>-		crc32_pmull_algs[1].update = crc32c_pmull_update;</div><div class='del'>-</div><div class='del'>-		if (elf_hwcap2 &amp; HWCAP2_CRC32) {</div><div class='del'>-			fallback_crc32 = crc32_armv8_le;</div><div class='del'>-			fallback_crc32c = crc32c_armv8_le;</div><div class='del'>-		} else {</div><div class='del'>-			fallback_crc32 = crc32_le;</div><div class='del'>-			fallback_crc32c = __crc32c_le;</div><div class='del'>-		}</div><div class='del'>-	} else if (!(elf_hwcap2 &amp; HWCAP2_CRC32)) {</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crypto_register_shashes(crc32_pmull_algs,</div><div class='del'>-				       ARRAY_SIZE(crc32_pmull_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc32_pmull_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(crc32_pmull_algs,</div><div class='del'>-				  ARRAY_SIZE(crc32_pmull_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct cpu_feature __maybe_unused crc32_cpu_feature[] = {</div><div class='del'>-	{ cpu_feature(CRC32) }, { cpu_feature(PMULL) }, { }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(cpu, crc32_cpu_feature);</div><div class='del'>-</div><div class='del'>-module_init(crc32_pmull_mod_init);</div><div class='del'>-module_exit(crc32_pmull_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Accelerated CRC32(C) using ARM CRC, NEON and Crypto Extensions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crc32");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crc32c");</div><div class='head'>diff --git a/arch/arm/crypto/crct10dif-ce-core.S b/arch/arm/crypto/crct10dif-ce-core.S<br/>deleted file mode 100644<br/>index 46c02c518a30..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/crct10dif-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crct10dif-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,381 +0,0 @@</div><div class='del'>-//</div><div class='del'>-// Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions</div><div class='del'>-//</div><div class='del'>-// Copyright (C) 2016 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>-// Copyright (C) 2019 Google LLC &lt;ebiggers@google.com&gt;</div><div class='del'>-//</div><div class='del'>-// This program is free software; you can redistribute it and/or modify</div><div class='del'>-// it under the terms of the GNU General Public License version 2 as</div><div class='del'>-// published by the Free Software Foundation.</div><div class='del'>-//</div><div class='del'>-</div><div class='del'>-// Derived from the x86 version:</div><div class='del'>-//</div><div class='del'>-// Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions</div><div class='del'>-//</div><div class='del'>-// Copyright (c) 2013, Intel Corporation</div><div class='del'>-//</div><div class='del'>-// Authors:</div><div class='del'>-//     Erdinc Ozturk &lt;erdinc.ozturk@intel.com&gt;</div><div class='del'>-//     Vinodh Gopal &lt;vinodh.gopal@intel.com&gt;</div><div class='del'>-//     James Guilford &lt;james.guilford@intel.com&gt;</div><div class='del'>-//     Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>-//</div><div class='del'>-// This software is available to you under a choice of one of two</div><div class='del'>-// licenses.  You may choose to be licensed under the terms of the GNU</div><div class='del'>-// General Public License (GPL) Version 2, available from the file</div><div class='del'>-// COPYING in the main directory of this source tree, or the</div><div class='del'>-// OpenIB.org BSD license below:</div><div class='del'>-//</div><div class='del'>-// Redistribution and use in source and binary forms, with or without</div><div class='del'>-// modification, are permitted provided that the following conditions are</div><div class='del'>-// met:</div><div class='del'>-//</div><div class='del'>-// * Redistributions of source code must retain the above copyright</div><div class='del'>-//   notice, this list of conditions and the following disclaimer.</div><div class='del'>-//</div><div class='del'>-// * Redistributions in binary form must reproduce the above copyright</div><div class='del'>-//   notice, this list of conditions and the following disclaimer in the</div><div class='del'>-//   documentation and/or other materials provided with the</div><div class='del'>-//   distribution.</div><div class='del'>-//</div><div class='del'>-// * Neither the name of the Intel Corporation nor the names of its</div><div class='del'>-//   contributors may be used to endorse or promote products derived from</div><div class='del'>-//   this software without specific prior written permission.</div><div class='del'>-//</div><div class='del'>-//</div><div class='del'>-// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY</div><div class='del'>-// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR</div><div class='del'>-// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR</div><div class='del'>-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,</div><div class='del'>-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,</div><div class='del'>-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR</div><div class='del'>-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF</div><div class='del'>-// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING</div><div class='del'>-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='del'>-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-//</div><div class='del'>-//       Reference paper titled "Fast CRC Computation for Generic</div><div class='del'>-//	Polynomials Using PCLMULQDQ Instruction"</div><div class='del'>-//       URL: http://www.intel.com/content/dam/www/public/us/en/documents</div><div class='del'>-//  /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf</div><div class='del'>-//</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_ENDIAN_BE8</div><div class='del'>-#define CPU_LE(code...)</div><div class='del'>-#else</div><div class='del'>-#define CPU_LE(code...)		code</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a</div><div class='del'>-	.fpu		crypto-neon-fp-armv8</div><div class='del'>-</div><div class='del'>-	init_crc	.req	r0</div><div class='del'>-	buf		.req	r1</div><div class='del'>-	len		.req	r2</div><div class='del'>-</div><div class='del'>-	fold_consts_ptr	.req	ip</div><div class='del'>-</div><div class='del'>-	q0l		.req	d0</div><div class='del'>-	q0h		.req	d1</div><div class='del'>-	q1l		.req	d2</div><div class='del'>-	q1h		.req	d3</div><div class='del'>-	q2l		.req	d4</div><div class='del'>-	q2h		.req	d5</div><div class='del'>-	q3l		.req	d6</div><div class='del'>-	q3h		.req	d7</div><div class='del'>-	q4l		.req	d8</div><div class='del'>-	q4h		.req	d9</div><div class='del'>-	q5l		.req	d10</div><div class='del'>-	q5h		.req	d11</div><div class='del'>-	q6l		.req	d12</div><div class='del'>-	q6h		.req	d13</div><div class='del'>-	q7l		.req	d14</div><div class='del'>-	q7h		.req	d15</div><div class='del'>-	q8l		.req	d16</div><div class='del'>-	q8h		.req	d17</div><div class='del'>-	q9l		.req	d18</div><div class='del'>-	q9h		.req	d19</div><div class='del'>-	q10l		.req	d20</div><div class='del'>-	q10h		.req	d21</div><div class='del'>-	q11l		.req	d22</div><div class='del'>-	q11h		.req	d23</div><div class='del'>-	q12l		.req	d24</div><div class='del'>-	q12h		.req	d25</div><div class='del'>-</div><div class='del'>-	FOLD_CONSTS	.req	q10</div><div class='del'>-	FOLD_CONST_L	.req	q10l</div><div class='del'>-	FOLD_CONST_H	.req	q10h</div><div class='del'>-</div><div class='del'>-	// Fold reg1, reg2 into the next 32 data bytes, storing the result back</div><div class='del'>-	// into reg1, reg2.</div><div class='del'>-	.macro		fold_32_bytes, reg1, reg2</div><div class='del'>-	vld1.64		{q11-q12}, [buf]!</div><div class='del'>-</div><div class='del'>-	vmull.p64	q8, \reg1\()h, FOLD_CONST_H</div><div class='del'>-	vmull.p64	\reg1, \reg1\()l, FOLD_CONST_L</div><div class='del'>-	vmull.p64	q9, \reg2\()h, FOLD_CONST_H</div><div class='del'>-	vmull.p64	\reg2, \reg2\()l, FOLD_CONST_L</div><div class='del'>-</div><div class='del'>-CPU_LE(	vrev64.8	q11, q11	)</div><div class='del'>-CPU_LE(	vrev64.8	q12, q12	)</div><div class='del'>-	vswp		q11l, q11h</div><div class='del'>-	vswp		q12l, q12h</div><div class='del'>-</div><div class='del'>-	veor.8		\reg1, \reg1, q8</div><div class='del'>-	veor.8		\reg2, \reg2, q9</div><div class='del'>-	veor.8		\reg1, \reg1, q11</div><div class='del'>-	veor.8		\reg2, \reg2, q12</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	// Fold src_reg into dst_reg, optionally loading the next fold constants</div><div class='del'>-	.macro		fold_16_bytes, src_reg, dst_reg, load_next_consts</div><div class='del'>-	vmull.p64	q8, \src_reg\()l, FOLD_CONST_L</div><div class='del'>-	vmull.p64	\src_reg, \src_reg\()h, FOLD_CONST_H</div><div class='del'>-	.ifnb		\load_next_consts</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]!</div><div class='del'>-	.endif</div><div class='del'>-	veor.8		\dst_reg, \dst_reg, q8</div><div class='del'>-	veor.8		\dst_reg, \dst_reg, \src_reg</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__adrl, out, sym</div><div class='del'>-	movw		\out, #:lower16:\sym</div><div class='del'>-	movt		\out, #:upper16:\sym</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-//</div><div class='del'>-// u16 crc_t10dif_pmull(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-//</div><div class='del'>-// Assumes len &gt;= 16.</div><div class='del'>-//</div><div class='del'>-ENTRY(crc_t10dif_pmull)</div><div class='del'>-</div><div class='del'>-	// For sizes less than 256 bytes, we can't fold 128 bytes at a time.</div><div class='del'>-	cmp		len, #256</div><div class='del'>-	blt		.Lless_than_256_bytes</div><div class='del'>-</div><div class='del'>-	__adrl		fold_consts_ptr, .Lfold_across_128_bytes_consts</div><div class='del'>-</div><div class='del'>-	// Load the first 128 data bytes.  Byte swapping is necessary to make</div><div class='del'>-	// the bit order match the polynomial coefficient order.</div><div class='del'>-	vld1.64		{q0-q1}, [buf]!</div><div class='del'>-	vld1.64		{q2-q3}, [buf]!</div><div class='del'>-	vld1.64		{q4-q5}, [buf]!</div><div class='del'>-	vld1.64		{q6-q7}, [buf]!</div><div class='del'>-CPU_LE(	vrev64.8	q0, q0	)</div><div class='del'>-CPU_LE(	vrev64.8	q1, q1	)</div><div class='del'>-CPU_LE(	vrev64.8	q2, q2	)</div><div class='del'>-CPU_LE(	vrev64.8	q3, q3	)</div><div class='del'>-CPU_LE(	vrev64.8	q4, q4	)</div><div class='del'>-CPU_LE(	vrev64.8	q5, q5	)</div><div class='del'>-CPU_LE(	vrev64.8	q6, q6	)</div><div class='del'>-CPU_LE(	vrev64.8	q7, q7	)</div><div class='del'>-	vswp		q0l, q0h</div><div class='del'>-	vswp		q1l, q1h</div><div class='del'>-	vswp		q2l, q2h</div><div class='del'>-	vswp		q3l, q3h</div><div class='del'>-	vswp		q4l, q4h</div><div class='del'>-	vswp		q5l, q5h</div><div class='del'>-	vswp		q6l, q6h</div><div class='del'>-	vswp		q7l, q7h</div><div class='del'>-</div><div class='del'>-	// XOR the first 16 data *bits* with the initial CRC value.</div><div class='del'>-	vmov.i8		q8h, #0</div><div class='del'>-	vmov.u16	q8h[3], init_crc</div><div class='del'>-	veor		q0h, q0h, q8h</div><div class='del'>-</div><div class='del'>-	// Load the constants for folding across 128 bytes.</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]!</div><div class='del'>-</div><div class='del'>-	// Subtract 128 for the 128 data bytes just consumed.  Subtract another</div><div class='del'>-	// 128 to simplify the termination condition of the following loop.</div><div class='del'>-	sub		len, len, #256</div><div class='del'>-</div><div class='del'>-	// While &gt;= 128 data bytes remain (not counting q0-q7), fold the 128</div><div class='del'>-	// bytes q0-q7 into them, storing the result back into q0-q7.</div><div class='del'>-.Lfold_128_bytes_loop:</div><div class='del'>-	fold_32_bytes	q0, q1</div><div class='del'>-	fold_32_bytes	q2, q3</div><div class='del'>-	fold_32_bytes	q4, q5</div><div class='del'>-	fold_32_bytes	q6, q7</div><div class='del'>-	subs		len, len, #128</div><div class='del'>-	bge		.Lfold_128_bytes_loop</div><div class='del'>-</div><div class='del'>-	// Now fold the 112 bytes in q0-q6 into the 16 bytes in q7.</div><div class='del'>-</div><div class='del'>-	// Fold across 64 bytes.</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]!</div><div class='del'>-	fold_16_bytes	q0, q4</div><div class='del'>-	fold_16_bytes	q1, q5</div><div class='del'>-	fold_16_bytes	q2, q6</div><div class='del'>-	fold_16_bytes	q3, q7, 1</div><div class='del'>-	// Fold across 32 bytes.</div><div class='del'>-	fold_16_bytes	q4, q6</div><div class='del'>-	fold_16_bytes	q5, q7, 1</div><div class='del'>-	// Fold across 16 bytes.</div><div class='del'>-	fold_16_bytes	q6, q7</div><div class='del'>-</div><div class='del'>-	// Add 128 to get the correct number of data bytes remaining in 0...127</div><div class='del'>-	// (not counting q7), following the previous extra subtraction by 128.</div><div class='del'>-	// Then subtract 16 to simplify the termination condition of the</div><div class='del'>-	// following loop.</div><div class='del'>-	adds		len, len, #(128-16)</div><div class='del'>-</div><div class='del'>-	// While &gt;= 16 data bytes remain (not counting q7), fold the 16 bytes q7</div><div class='del'>-	// into them, storing the result back into q7.</div><div class='del'>-	blt		.Lfold_16_bytes_loop_done</div><div class='del'>-.Lfold_16_bytes_loop:</div><div class='del'>-	vmull.p64	q8, q7l, FOLD_CONST_L</div><div class='del'>-	vmull.p64	q7, q7h, FOLD_CONST_H</div><div class='del'>-	veor.8		q7, q7, q8</div><div class='del'>-	vld1.64		{q0}, [buf]!</div><div class='del'>-CPU_LE(	vrev64.8	q0, q0	)</div><div class='del'>-	vswp		q0l, q0h</div><div class='del'>-	veor.8		q7, q7, q0</div><div class='del'>-	subs		len, len, #16</div><div class='del'>-	bge		.Lfold_16_bytes_loop</div><div class='del'>-</div><div class='del'>-.Lfold_16_bytes_loop_done:</div><div class='del'>-	// Add 16 to get the correct number of data bytes remaining in 0...15</div><div class='del'>-	// (not counting q7), following the previous extra subtraction by 16.</div><div class='del'>-	adds		len, len, #16</div><div class='del'>-	beq		.Lreduce_final_16_bytes</div><div class='del'>-</div><div class='del'>-.Lhandle_partial_segment:</div><div class='del'>-	// Reduce the last '16 + len' bytes where 1 &lt;= len &lt;= 15 and the first</div><div class='del'>-	// 16 bytes are in q7 and the rest are the remaining data in 'buf'.  To</div><div class='del'>-	// do this without needing a fold constant for each possible 'len',</div><div class='del'>-	// redivide the bytes into a first chunk of 'len' bytes and a second</div><div class='del'>-	// chunk of 16 bytes, then fold the first chunk into the second.</div><div class='del'>-</div><div class='del'>-	// q0 = last 16 original data bytes</div><div class='del'>-	add		buf, buf, len</div><div class='del'>-	sub		buf, buf, #16</div><div class='del'>-	vld1.64		{q0}, [buf]</div><div class='del'>-CPU_LE(	vrev64.8	q0, q0	)</div><div class='del'>-	vswp		q0l, q0h</div><div class='del'>-</div><div class='del'>-	// q1 = high order part of second chunk: q7 left-shifted by 'len' bytes.</div><div class='del'>-	__adrl		r3, .Lbyteshift_table + 16</div><div class='del'>-	sub		r3, r3, len</div><div class='del'>-	vld1.8		{q2}, [r3]</div><div class='del'>-	vtbl.8		q1l, {q7l-q7h}, q2l</div><div class='del'>-	vtbl.8		q1h, {q7l-q7h}, q2h</div><div class='del'>-</div><div class='del'>-	// q3 = first chunk: q7 right-shifted by '16-len' bytes.</div><div class='del'>-	vmov.i8		q3, #0x80</div><div class='del'>-	veor.8		q2, q2, q3</div><div class='del'>-	vtbl.8		q3l, {q7l-q7h}, q2l</div><div class='del'>-	vtbl.8		q3h, {q7l-q7h}, q2h</div><div class='del'>-</div><div class='del'>-	// Convert to 8-bit masks: 'len' 0x00 bytes, then '16-len' 0xff bytes.</div><div class='del'>-	vshr.s8		q2, q2, #7</div><div class='del'>-</div><div class='del'>-	// q2 = second chunk: 'len' bytes from q0 (low-order bytes),</div><div class='del'>-	// then '16-len' bytes from q1 (high-order bytes).</div><div class='del'>-	vbsl.8		q2, q1, q0</div><div class='del'>-</div><div class='del'>-	// Fold the first chunk into the second chunk, storing the result in q7.</div><div class='del'>-	vmull.p64	q0, q3l, FOLD_CONST_L</div><div class='del'>-	vmull.p64	q7, q3h, FOLD_CONST_H</div><div class='del'>-	veor.8		q7, q7, q0</div><div class='del'>-	veor.8		q7, q7, q2</div><div class='del'>-</div><div class='del'>-.Lreduce_final_16_bytes:</div><div class='del'>-	// Reduce the 128-bit value M(x), stored in q7, to the final 16-bit CRC.</div><div class='del'>-</div><div class='del'>-	// Load 'x^48 * (x^48 mod G(x))' and 'x^48 * (x^80 mod G(x))'.</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]!</div><div class='del'>-</div><div class='del'>-	// Fold the high 64 bits into the low 64 bits, while also multiplying by</div><div class='del'>-	// x^64.  This produces a 128-bit value congruent to x^64 * M(x) and</div><div class='del'>-	// whose low 48 bits are 0.</div><div class='del'>-	vmull.p64	q0, q7h, FOLD_CONST_H	// high bits * x^48 * (x^80 mod G(x))</div><div class='del'>-	veor.8		q0h, q0h, q7l		// + low bits * x^64</div><div class='del'>-</div><div class='del'>-	// Fold the high 32 bits into the low 96 bits.  This produces a 96-bit</div><div class='del'>-	// value congruent to x^64 * M(x) and whose low 48 bits are 0.</div><div class='del'>-	vmov.i8		q1, #0</div><div class='del'>-	vmov		s4, s3			// extract high 32 bits</div><div class='del'>-	vmov		s3, s5			// zero high 32 bits</div><div class='del'>-	vmull.p64	q1, q1l, FOLD_CONST_L	// high 32 bits * x^48 * (x^48 mod G(x))</div><div class='del'>-	veor.8		q0, q0, q1		// + low bits</div><div class='del'>-</div><div class='del'>-	// Load G(x) and floor(x^48 / G(x)).</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]</div><div class='del'>-</div><div class='del'>-	// Use Barrett reduction to compute the final CRC value.</div><div class='del'>-	vmull.p64	q1, q0h, FOLD_CONST_H	// high 32 bits * floor(x^48 / G(x))</div><div class='del'>-	vshr.u64	q1l, q1l, #32		// /= x^32</div><div class='del'>-	vmull.p64	q1, q1l, FOLD_CONST_L	// *= G(x)</div><div class='del'>-	vshr.u64	q0l, q0l, #48</div><div class='del'>-	veor.8		q0l, q0l, q1l		// + low 16 nonzero bits</div><div class='del'>-	// Final CRC value (x^16 * M(x)) mod G(x) is in low 16 bits of q0.</div><div class='del'>-</div><div class='del'>-	vmov.u16	r0, q0l[0]</div><div class='del'>-	bx		lr</div><div class='del'>-</div><div class='del'>-.Lless_than_256_bytes:</div><div class='del'>-	// Checksumming a buffer of length 16...255 bytes</div><div class='del'>-</div><div class='del'>-	__adrl		fold_consts_ptr, .Lfold_across_16_bytes_consts</div><div class='del'>-</div><div class='del'>-	// Load the first 16 data bytes.</div><div class='del'>-	vld1.64		{q7}, [buf]!</div><div class='del'>-CPU_LE(	vrev64.8	q7, q7	)</div><div class='del'>-	vswp		q7l, q7h</div><div class='del'>-</div><div class='del'>-	// XOR the first 16 data *bits* with the initial CRC value.</div><div class='del'>-	vmov.i8		q0h, #0</div><div class='del'>-	vmov.u16	q0h[3], init_crc</div><div class='del'>-	veor.8		q7h, q7h, q0h</div><div class='del'>-</div><div class='del'>-	// Load the fold-across-16-bytes constants.</div><div class='del'>-	vld1.64		{FOLD_CONSTS}, [fold_consts_ptr, :128]!</div><div class='del'>-</div><div class='del'>-	cmp		len, #16</div><div class='del'>-	beq		.Lreduce_final_16_bytes		// len == 16</div><div class='del'>-	subs		len, len, #32</div><div class='del'>-	addlt		len, len, #16</div><div class='del'>-	blt		.Lhandle_partial_segment	// 17 &lt;= len &lt;= 31</div><div class='del'>-	b		.Lfold_16_bytes_loop		// 32 &lt;= len &lt;= 255</div><div class='del'>-ENDPROC(crc_t10dif_pmull)</div><div class='del'>-</div><div class='del'>-	.section	".rodata", "a"</div><div class='del'>-	.align		4</div><div class='del'>-</div><div class='del'>-// Fold constants precomputed from the polynomial 0x18bb7</div><div class='del'>-// G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0</div><div class='del'>-.Lfold_across_128_bytes_consts:</div><div class='del'>-	.quad		0x0000000000006123	// x^(8*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000002295	// x^(8*128+64)	mod G(x)</div><div class='del'>-// .Lfold_across_64_bytes_consts:</div><div class='del'>-	.quad		0x0000000000001069	// x^(4*128)	mod G(x)</div><div class='del'>-	.quad		0x000000000000dd31	// x^(4*128+64)	mod G(x)</div><div class='del'>-// .Lfold_across_32_bytes_consts:</div><div class='del'>-	.quad		0x000000000000857d	// x^(2*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000007acc	// x^(2*128+64)	mod G(x)</div><div class='del'>-.Lfold_across_16_bytes_consts:</div><div class='del'>-	.quad		0x000000000000a010	// x^(1*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000001faa	// x^(1*128+64)	mod G(x)</div><div class='del'>-// .Lfinal_fold_consts:</div><div class='del'>-	.quad		0x1368000000000000	// x^48 * (x^48 mod G(x))</div><div class='del'>-	.quad		0x2d56000000000000	// x^48 * (x^80 mod G(x))</div><div class='del'>-// .Lbarrett_reduction_consts:</div><div class='del'>-	.quad		0x0000000000018bb7	// G(x)</div><div class='del'>-	.quad		0x00000001f65a57f8	// floor(x^48 / G(x))</div><div class='del'>-</div><div class='del'>-// For 1 &lt;= len &lt;= 15, the 16-byte vector beginning at &amp;byteshift_table[16 -</div><div class='del'>-// len] is the index vector to shift left by 'len' bytes, and is also {0x80,</div><div class='del'>-// ..., 0x80} XOR the index vector to shift right by '16 - len' bytes.</div><div class='del'>-.Lbyteshift_table:</div><div class='del'>-	.byte		 0x0, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87</div><div class='del'>-	.byte		0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f</div><div class='del'>-	.byte		 0x0,  0x1,  0x2,  0x3,  0x4,  0x5,  0x6,  0x7</div><div class='del'>-	.byte		 0x8,  0x9,  0xa,  0xb,  0xc,  0xd,  0xe , 0x0</div><div class='head'>diff --git a/arch/arm/crypto/crct10dif-ce-glue.c b/arch/arm/crypto/crct10dif-ce-glue.c<br/>deleted file mode 100644<br/>index 79f3b204d8c0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/crct10dif-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/crct10dif-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,89 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crc-t10dif.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#define CRC_T10DIF_PMULL_CHUNK_SIZE	16U</div><div class='del'>-</div><div class='del'>-asmlinkage u16 crc_t10dif_pmull(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-</div><div class='del'>-static int crct10dif_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (length &gt;= CRC_T10DIF_PMULL_CHUNK_SIZE &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		*crc = crc_t10dif_pmull(*crc, data, length);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		*crc = crc_t10dif_generic(*crc, data, length);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*(u16 *)out = *crc;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc_t10dif_alg = {</div><div class='del'>-	.digestsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-	.init			= crct10dif_init,</div><div class='del'>-	.update			= crct10dif_update,</div><div class='del'>-	.final			= crct10dif_final,</div><div class='del'>-	.descsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "crct10dif",</div><div class='del'>-	.base.cra_driver_name	= "crct10dif-arm-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= CRC_T10DIF_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init crc_t10dif_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!(elf_hwcap2 &amp; HWCAP2_PMULL))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return crypto_register_shash(&amp;crc_t10dif_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc_t10dif_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;crc_t10dif_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(crc_t10dif_mod_init);</div><div class='del'>-module_exit(crc_t10dif_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crct10dif");</div><div class='head'>diff --git a/arch/arm/crypto/curve25519-core.S b/arch/arm/crypto/curve25519-core.S<br/>deleted file mode 100644<br/>index b697fa5d059a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/curve25519-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/curve25519-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2062 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 OR MIT */</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * Based on public domain code from Daniel J. Bernstein and Peter Schwabe. This</div><div class='del'>- * began from SUPERCOP's curve25519/neon2/scalarmult.s, but has subsequently been</div><div class='del'>- * manually reworked for use in kernel space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.arch armv7-a</div><div class='del'>-.fpu neon</div><div class='del'>-.align 4</div><div class='del'>-</div><div class='del'>-ENTRY(curve25519_neon)</div><div class='del'>-	push		{r4-r11, lr}</div><div class='del'>-	mov		ip, sp</div><div class='del'>-	sub		r3, sp, #704</div><div class='del'>-	and		r3, r3, #0xfffffff0</div><div class='del'>-	mov		sp, r3</div><div class='del'>-	movw		r4, #0</div><div class='del'>-	movw		r5, #254</div><div class='del'>-	vmov.i32	q0, #1</div><div class='del'>-	vshr.u64	q1, q0, #7</div><div class='del'>-	vshr.u64	q0, q0, #8</div><div class='del'>-	vmov.i32	d4, #19</div><div class='del'>-	vmov.i32	d5, #38</div><div class='del'>-	add		r6, sp, #480</div><div class='del'>-	vst1.8		{d2-d3}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d4-d5}, [r6, : 128]</div><div class='del'>-	add		r6, r3, #0</div><div class='del'>-	vmov.i32	q2, #0</div><div class='del'>-	vst1.8		{d4-d5}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d4-d5}, [r6, : 128]!</div><div class='del'>-	vst1.8		d4, [r6, : 64]</div><div class='del'>-	add		r6, r3, #0</div><div class='del'>-	movw		r7, #960</div><div class='del'>-	sub		r7, r7, #2</div><div class='del'>-	neg		r7, r7</div><div class='del'>-	sub		r7, r7, r7, LSL #7</div><div class='del'>-	str		r7, [r6]</div><div class='del'>-	add		r6, sp, #672</div><div class='del'>-	vld1.8		{d4-d5}, [r1]!</div><div class='del'>-	vld1.8		{d6-d7}, [r1]</div><div class='del'>-	vst1.8		{d4-d5}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d6-d7}, [r6, : 128]</div><div class='del'>-	sub		r1, r6, #16</div><div class='del'>-	ldrb		r6, [r1]</div><div class='del'>-	and		r6, r6, #248</div><div class='del'>-	strb		r6, [r1]</div><div class='del'>-	ldrb		r6, [r1, #31]</div><div class='del'>-	and		r6, r6, #127</div><div class='del'>-	orr		r6, r6, #64</div><div class='del'>-	strb		r6, [r1, #31]</div><div class='del'>-	vmov.i64	q2, #0xffffffff</div><div class='del'>-	vshr.u64	q3, q2, #7</div><div class='del'>-	vshr.u64	q2, q2, #6</div><div class='del'>-	vld1.8		{d8}, [r2]</div><div class='del'>-	vld1.8		{d10}, [r2]</div><div class='del'>-	add		r2, r2, #6</div><div class='del'>-	vld1.8		{d12}, [r2]</div><div class='del'>-	vld1.8		{d14}, [r2]</div><div class='del'>-	add		r2, r2, #6</div><div class='del'>-	vld1.8		{d16}, [r2]</div><div class='del'>-	add		r2, r2, #4</div><div class='del'>-	vld1.8		{d18}, [r2]</div><div class='del'>-	vld1.8		{d20}, [r2]</div><div class='del'>-	add		r2, r2, #6</div><div class='del'>-	vld1.8		{d22}, [r2]</div><div class='del'>-	add		r2, r2, #2</div><div class='del'>-	vld1.8		{d24}, [r2]</div><div class='del'>-	vld1.8		{d26}, [r2]</div><div class='del'>-	vshr.u64	q5, q5, #26</div><div class='del'>-	vshr.u64	q6, q6, #3</div><div class='del'>-	vshr.u64	q7, q7, #29</div><div class='del'>-	vshr.u64	q8, q8, #6</div><div class='del'>-	vshr.u64	q10, q10, #25</div><div class='del'>-	vshr.u64	q11, q11, #3</div><div class='del'>-	vshr.u64	q12, q12, #12</div><div class='del'>-	vshr.u64	q13, q13, #38</div><div class='del'>-	vand		q4, q4, q2</div><div class='del'>-	vand		q6, q6, q2</div><div class='del'>-	vand		q8, q8, q2</div><div class='del'>-	vand		q10, q10, q2</div><div class='del'>-	vand		q2, q12, q2</div><div class='del'>-	vand		q5, q5, q3</div><div class='del'>-	vand		q7, q7, q3</div><div class='del'>-	vand		q9, q9, q3</div><div class='del'>-	vand		q11, q11, q3</div><div class='del'>-	vand		q3, q13, q3</div><div class='del'>-	add		r2, r3, #48</div><div class='del'>-	vadd.i64	q12, q4, q1</div><div class='del'>-	vadd.i64	q13, q10, q1</div><div class='del'>-	vshr.s64	q12, q12, #26</div><div class='del'>-	vshr.s64	q13, q13, #26</div><div class='del'>-	vadd.i64	q5, q5, q12</div><div class='del'>-	vshl.i64	q12, q12, #26</div><div class='del'>-	vadd.i64	q14, q5, q0</div><div class='del'>-	vadd.i64	q11, q11, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q15, q11, q0</div><div class='del'>-	vsub.i64	q4, q4, q12</div><div class='del'>-	vshr.s64	q12, q14, #25</div><div class='del'>-	vsub.i64	q10, q10, q13</div><div class='del'>-	vshr.s64	q13, q15, #25</div><div class='del'>-	vadd.i64	q6, q6, q12</div><div class='del'>-	vshl.i64	q12, q12, #25</div><div class='del'>-	vadd.i64	q14, q6, q1</div><div class='del'>-	vadd.i64	q2, q2, q13</div><div class='del'>-	vsub.i64	q5, q5, q12</div><div class='del'>-	vshr.s64	q12, q14, #26</div><div class='del'>-	vshl.i64	q13, q13, #25</div><div class='del'>-	vadd.i64	q14, q2, q1</div><div class='del'>-	vadd.i64	q7, q7, q12</div><div class='del'>-	vshl.i64	q12, q12, #26</div><div class='del'>-	vadd.i64	q15, q7, q0</div><div class='del'>-	vsub.i64	q11, q11, q13</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vsub.i64	q6, q6, q12</div><div class='del'>-	vshr.s64	q12, q15, #25</div><div class='del'>-	vadd.i64	q3, q3, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q14, q3, q0</div><div class='del'>-	vadd.i64	q8, q8, q12</div><div class='del'>-	vshl.i64	q12, q12, #25</div><div class='del'>-	vadd.i64	q15, q8, q1</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q2, q2, q13</div><div class='del'>-	vshr.s64	q13, q14, #25</div><div class='del'>-	vsub.i64	q7, q7, q12</div><div class='del'>-	vshr.s64	q12, q15, #26</div><div class='del'>-	vadd.i64	q14, q13, q13</div><div class='del'>-	vadd.i64	q9, q9, q12</div><div class='del'>-	vtrn.32		d12, d14</div><div class='del'>-	vshl.i64	q12, q12, #26</div><div class='del'>-	vtrn.32		d13, d15</div><div class='del'>-	vadd.i64	q0, q9, q0</div><div class='del'>-	vadd.i64	q4, q4, q14</div><div class='del'>-	vst1.8		d12, [r2, : 64]!</div><div class='del'>-	vshl.i64	q6, q13, #4</div><div class='del'>-	vsub.i64	q7, q8, q12</div><div class='del'>-	vshr.s64	q0, q0, #25</div><div class='del'>-	vadd.i64	q4, q4, q6</div><div class='del'>-	vadd.i64	q6, q10, q0</div><div class='del'>-	vshl.i64	q0, q0, #25</div><div class='del'>-	vadd.i64	q8, q6, q1</div><div class='del'>-	vadd.i64	q4, q4, q13</div><div class='del'>-	vshl.i64	q10, q13, #25</div><div class='del'>-	vadd.i64	q1, q4, q1</div><div class='del'>-	vsub.i64	q0, q9, q0</div><div class='del'>-	vshr.s64	q8, q8, #26</div><div class='del'>-	vsub.i64	q3, q3, q10</div><div class='del'>-	vtrn.32		d14, d0</div><div class='del'>-	vshr.s64	q1, q1, #26</div><div class='del'>-	vtrn.32		d15, d1</div><div class='del'>-	vadd.i64	q0, q11, q8</div><div class='del'>-	vst1.8		d14, [r2, : 64]</div><div class='del'>-	vshl.i64	q7, q8, #26</div><div class='del'>-	vadd.i64	q5, q5, q1</div><div class='del'>-	vtrn.32		d4, d6</div><div class='del'>-	vshl.i64	q1, q1, #26</div><div class='del'>-	vtrn.32		d5, d7</div><div class='del'>-	vsub.i64	q3, q6, q7</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q1, q4, q1</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	vtrn.32		d6, d0</div><div class='del'>-	vtrn.32		d7, d1</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	vtrn.32		d2, d10</div><div class='del'>-	vtrn.32		d3, d11</div><div class='del'>-	vst1.8		d6, [r2, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	vst1.8		d2, [r2, : 64]</div><div class='del'>-	add		r2, r3, #96</div><div class='del'>-	vmov.i32	q0, #0</div><div class='del'>-	vmov.i64	d2, #0xff</div><div class='del'>-	vmov.i64	d3, #0</div><div class='del'>-	vshr.u32	q1, q1, #7</div><div class='del'>-	vst1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vst1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	vmov.i32	q0, #0</div><div class='del'>-	vst1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vst1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	add		r2, r3, #240</div><div class='del'>-	vmov.i32	q0, #0</div><div class='del'>-	vmov.i64	d2, #0xff</div><div class='del'>-	vmov.i64	d3, #0</div><div class='del'>-	vshr.u32	q1, q1, #7</div><div class='del'>-	vst1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vst1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	add		r2, r3, #48</div><div class='del'>-	add		r6, r3, #192</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r2, : 64]</div><div class='del'>-	vst1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r6, : 128]!</div><div class='del'>-	vst1.8		d4, [r6, : 64]</div><div class='del'>-.Lmainloop:</div><div class='del'>-	mov		r2, r5, LSR #3</div><div class='del'>-	and		r6, r5, #7</div><div class='del'>-	ldrb		r2, [r1, r2]</div><div class='del'>-	mov		r2, r2, LSR r6</div><div class='del'>-	and		r2, r2, #1</div><div class='del'>-	str		r5, [sp, #456]</div><div class='del'>-	eor		r4, r4, r2</div><div class='del'>-	str		r2, [sp, #460]</div><div class='del'>-	neg		r2, r4</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	add		r5, r3, #192</div><div class='del'>-	add		r6, r3, #144</div><div class='del'>-	vld1.8		{d8-d9}, [r4, : 128]!</div><div class='del'>-	add		r7, r3, #240</div><div class='del'>-	vld1.8		{d10-d11}, [r5, : 128]!</div><div class='del'>-	veor		q6, q4, q5</div><div class='del'>-	vld1.8		{d14-d15}, [r6, : 128]!</div><div class='del'>-	vdup.i32	q8, r2</div><div class='del'>-	vld1.8		{d18-d19}, [r7, : 128]!</div><div class='del'>-	veor		q10, q7, q9</div><div class='del'>-	vld1.8		{d22-d23}, [r4, : 128]!</div><div class='del'>-	vand		q6, q6, q8</div><div class='del'>-	vld1.8		{d24-d25}, [r5, : 128]!</div><div class='del'>-	vand		q10, q10, q8</div><div class='del'>-	vld1.8		{d26-d27}, [r6, : 128]!</div><div class='del'>-	veor		q4, q4, q6</div><div class='del'>-	vld1.8		{d28-d29}, [r7, : 128]!</div><div class='del'>-	veor		q5, q5, q6</div><div class='del'>-	vld1.8		{d0}, [r4, : 64]</div><div class='del'>-	veor		q6, q7, q10</div><div class='del'>-	vld1.8		{d2}, [r5, : 64]</div><div class='del'>-	veor		q7, q9, q10</div><div class='del'>-	vld1.8		{d4}, [r6, : 64]</div><div class='del'>-	veor		q9, q11, q12</div><div class='del'>-	vld1.8		{d6}, [r7, : 64]</div><div class='del'>-	veor		q10, q0, q1</div><div class='del'>-	sub		r2, r4, #32</div><div class='del'>-	vand		q9, q9, q8</div><div class='del'>-	sub		r4, r5, #32</div><div class='del'>-	vand		q10, q10, q8</div><div class='del'>-	sub		r5, r6, #32</div><div class='del'>-	veor		q11, q11, q9</div><div class='del'>-	sub		r6, r7, #32</div><div class='del'>-	veor		q0, q0, q10</div><div class='del'>-	veor		q9, q12, q9</div><div class='del'>-	veor		q1, q1, q10</div><div class='del'>-	veor		q10, q13, q14</div><div class='del'>-	veor		q12, q2, q3</div><div class='del'>-	vand		q10, q10, q8</div><div class='del'>-	vand		q8, q12, q8</div><div class='del'>-	veor		q12, q13, q10</div><div class='del'>-	veor		q2, q2, q8</div><div class='del'>-	veor		q10, q14, q10</div><div class='del'>-	veor		q3, q3, q8</div><div class='del'>-	vadd.i32	q8, q4, q6</div><div class='del'>-	vsub.i32	q4, q4, q6</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q6, q11, q12</div><div class='del'>-	vst1.8		{d8-d9}, [r5, : 128]!</div><div class='del'>-	vsub.i32	q4, q11, q12</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q6, q0, q2</div><div class='del'>-	vst1.8		{d8-d9}, [r5, : 128]!</div><div class='del'>-	vsub.i32	q0, q0, q2</div><div class='del'>-	vst1.8		d12, [r2, : 64]</div><div class='del'>-	vadd.i32	q2, q5, q7</div><div class='del'>-	vst1.8		d0, [r5, : 64]</div><div class='del'>-	vsub.i32	q0, q5, q7</div><div class='del'>-	vst1.8		{d4-d5}, [r4, : 128]!</div><div class='del'>-	vadd.i32	q2, q9, q10</div><div class='del'>-	vst1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vsub.i32	q0, q9, q10</div><div class='del'>-	vst1.8		{d4-d5}, [r4, : 128]!</div><div class='del'>-	vadd.i32	q2, q1, q3</div><div class='del'>-	vst1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vsub.i32	q0, q1, q3</div><div class='del'>-	vst1.8		d4, [r4, : 64]</div><div class='del'>-	vst1.8		d0, [r6, : 64]</div><div class='del'>-	add		r2, sp, #512</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	add		r5, r3, #144</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d4-d5}, [r5, : 128]!</div><div class='del'>-	vzip.i32	q1, q2</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d8-d9}, [r5, : 128]!</div><div class='del'>-	vshl.i32	q5, q1, #1</div><div class='del'>-	vzip.i32	q3, q4</div><div class='del'>-	vshl.i32	q6, q2, #1</div><div class='del'>-	vld1.8		{d14}, [r4, : 64]</div><div class='del'>-	vshl.i32	q8, q3, #1</div><div class='del'>-	vld1.8		{d15}, [r5, : 64]</div><div class='del'>-	vshl.i32	q9, q4, #1</div><div class='del'>-	vmul.i32	d21, d7, d1</div><div class='del'>-	vtrn.32		d14, d15</div><div class='del'>-	vmul.i32	q11, q4, q0</div><div class='del'>-	vmul.i32	q0, q7, q0</div><div class='del'>-	vmull.s32	q12, d2, d2</div><div class='del'>-	vmlal.s32	q12, d11, d1</div><div class='del'>-	vmlal.s32	q12, d12, d0</div><div class='del'>-	vmlal.s32	q12, d13, d23</div><div class='del'>-	vmlal.s32	q12, d16, d22</div><div class='del'>-	vmlal.s32	q12, d7, d21</div><div class='del'>-	vmull.s32	q10, d2, d11</div><div class='del'>-	vmlal.s32	q10, d4, d1</div><div class='del'>-	vmlal.s32	q10, d13, d0</div><div class='del'>-	vmlal.s32	q10, d6, d23</div><div class='del'>-	vmlal.s32	q10, d17, d22</div><div class='del'>-	vmull.s32	q13, d10, d4</div><div class='del'>-	vmlal.s32	q13, d11, d3</div><div class='del'>-	vmlal.s32	q13, d13, d1</div><div class='del'>-	vmlal.s32	q13, d16, d0</div><div class='del'>-	vmlal.s32	q13, d17, d23</div><div class='del'>-	vmlal.s32	q13, d8, d22</div><div class='del'>-	vmull.s32	q1, d10, d5</div><div class='del'>-	vmlal.s32	q1, d11, d4</div><div class='del'>-	vmlal.s32	q1, d6, d1</div><div class='del'>-	vmlal.s32	q1, d17, d0</div><div class='del'>-	vmlal.s32	q1, d8, d23</div><div class='del'>-	vmull.s32	q14, d10, d6</div><div class='del'>-	vmlal.s32	q14, d11, d13</div><div class='del'>-	vmlal.s32	q14, d4, d4</div><div class='del'>-	vmlal.s32	q14, d17, d1</div><div class='del'>-	vmlal.s32	q14, d18, d0</div><div class='del'>-	vmlal.s32	q14, d9, d23</div><div class='del'>-	vmull.s32	q11, d10, d7</div><div class='del'>-	vmlal.s32	q11, d11, d6</div><div class='del'>-	vmlal.s32	q11, d12, d5</div><div class='del'>-	vmlal.s32	q11, d8, d1</div><div class='del'>-	vmlal.s32	q11, d19, d0</div><div class='del'>-	vmull.s32	q15, d10, d8</div><div class='del'>-	vmlal.s32	q15, d11, d17</div><div class='del'>-	vmlal.s32	q15, d12, d6</div><div class='del'>-	vmlal.s32	q15, d13, d5</div><div class='del'>-	vmlal.s32	q15, d19, d1</div><div class='del'>-	vmlal.s32	q15, d14, d0</div><div class='del'>-	vmull.s32	q2, d10, d9</div><div class='del'>-	vmlal.s32	q2, d11, d8</div><div class='del'>-	vmlal.s32	q2, d12, d7</div><div class='del'>-	vmlal.s32	q2, d13, d6</div><div class='del'>-	vmlal.s32	q2, d14, d1</div><div class='del'>-	vmull.s32	q0, d15, d1</div><div class='del'>-	vmlal.s32	q0, d10, d14</div><div class='del'>-	vmlal.s32	q0, d11, d19</div><div class='del'>-	vmlal.s32	q0, d12, d8</div><div class='del'>-	vmlal.s32	q0, d13, d17</div><div class='del'>-	vmlal.s32	q0, d6, d6</div><div class='del'>-	add		r2, sp, #480</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q3, d16, d7</div><div class='del'>-	vmlal.s32	q3, d10, d15</div><div class='del'>-	vmlal.s32	q3, d11, d14</div><div class='del'>-	vmlal.s32	q3, d12, d9</div><div class='del'>-	vmlal.s32	q3, d13, d8</div><div class='del'>-	vld1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	vadd.i64	q5, q12, q9</div><div class='del'>-	vadd.i64	q6, q15, q9</div><div class='del'>-	vshr.s64	q5, q5, #26</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vadd.i64	q7, q10, q5</div><div class='del'>-	vshl.i64	q5, q5, #26</div><div class='del'>-	vadd.i64	q8, q7, q4</div><div class='del'>-	vadd.i64	q2, q2, q6</div><div class='del'>-	vshl.i64	q6, q6, #26</div><div class='del'>-	vadd.i64	q10, q2, q4</div><div class='del'>-	vsub.i64	q5, q12, q5</div><div class='del'>-	vshr.s64	q8, q8, #25</div><div class='del'>-	vsub.i64	q6, q15, q6</div><div class='del'>-	vshr.s64	q10, q10, #25</div><div class='del'>-	vadd.i64	q12, q13, q8</div><div class='del'>-	vshl.i64	q8, q8, #25</div><div class='del'>-	vadd.i64	q13, q12, q9</div><div class='del'>-	vadd.i64	q0, q0, q10</div><div class='del'>-	vsub.i64	q7, q7, q8</div><div class='del'>-	vshr.s64	q8, q13, #26</div><div class='del'>-	vshl.i64	q10, q10, #25</div><div class='del'>-	vadd.i64	q13, q0, q9</div><div class='del'>-	vadd.i64	q1, q1, q8</div><div class='del'>-	vshl.i64	q8, q8, #26</div><div class='del'>-	vadd.i64	q15, q1, q4</div><div class='del'>-	vsub.i64	q2, q2, q10</div><div class='del'>-	vshr.s64	q10, q13, #26</div><div class='del'>-	vsub.i64	q8, q12, q8</div><div class='del'>-	vshr.s64	q12, q15, #25</div><div class='del'>-	vadd.i64	q3, q3, q10</div><div class='del'>-	vshl.i64	q10, q10, #26</div><div class='del'>-	vadd.i64	q13, q3, q4</div><div class='del'>-	vadd.i64	q14, q14, q12</div><div class='del'>-	add		r2, r3, #288</div><div class='del'>-	vshl.i64	q12, q12, #25</div><div class='del'>-	add		r4, r3, #336</div><div class='del'>-	vadd.i64	q15, q14, q9</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q0, q0, q10</div><div class='del'>-	add		r4, r4, #8</div><div class='del'>-	vshr.s64	q10, q13, #25</div><div class='del'>-	vsub.i64	q1, q1, q12</div><div class='del'>-	vshr.s64	q12, q15, #26</div><div class='del'>-	vadd.i64	q13, q10, q10</div><div class='del'>-	vadd.i64	q11, q11, q12</div><div class='del'>-	vtrn.32		d16, d2</div><div class='del'>-	vshl.i64	q12, q12, #26</div><div class='del'>-	vtrn.32		d17, d3</div><div class='del'>-	vadd.i64	q1, q11, q4</div><div class='del'>-	vadd.i64	q4, q5, q13</div><div class='del'>-	vst1.8		d16, [r2, : 64]!</div><div class='del'>-	vshl.i64	q5, q10, #4</div><div class='del'>-	vst1.8		d17, [r4, : 64]!</div><div class='del'>-	vsub.i64	q8, q14, q12</div><div class='del'>-	vshr.s64	q1, q1, #25</div><div class='del'>-	vadd.i64	q4, q4, q5</div><div class='del'>-	vadd.i64	q5, q6, q1</div><div class='del'>-	vshl.i64	q1, q1, #25</div><div class='del'>-	vadd.i64	q6, q5, q9</div><div class='del'>-	vadd.i64	q4, q4, q10</div><div class='del'>-	vshl.i64	q10, q10, #25</div><div class='del'>-	vadd.i64	q9, q4, q9</div><div class='del'>-	vsub.i64	q1, q11, q1</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vsub.i64	q3, q3, q10</div><div class='del'>-	vtrn.32		d16, d2</div><div class='del'>-	vshr.s64	q9, q9, #26</div><div class='del'>-	vtrn.32		d17, d3</div><div class='del'>-	vadd.i64	q1, q2, q6</div><div class='del'>-	vst1.8		d16, [r2, : 64]</div><div class='del'>-	vshl.i64	q2, q6, #26</div><div class='del'>-	vst1.8		d17, [r4, : 64]</div><div class='del'>-	vadd.i64	q6, q7, q9</div><div class='del'>-	vtrn.32		d0, d6</div><div class='del'>-	vshl.i64	q7, q9, #26</div><div class='del'>-	vtrn.32		d1, d7</div><div class='del'>-	vsub.i64	q2, q5, q2</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q3, q4, q7</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	add		r4, r4, #16</div><div class='del'>-	vst1.8		d1, [r4, : 64]</div><div class='del'>-	vtrn.32		d4, d2</div><div class='del'>-	vtrn.32		d5, d3</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	sub		r4, r4, #8</div><div class='del'>-	vtrn.32		d6, d12</div><div class='del'>-	vtrn.32		d7, d13</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	vst1.8		d5, [r4, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	sub		r4, r4, #24</div><div class='del'>-	vst1.8		d6, [r2, : 64]</div><div class='del'>-	vst1.8		d7, [r4, : 64]</div><div class='del'>-	add		r2, r3, #240</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	vld1.8		{d0-d1}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r4, : 64]</div><div class='del'>-	add		r4, r3, #144</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vtrn.32		q0, q3</div><div class='del'>-	vld1.8		{d8-d9}, [r4, : 128]!</div><div class='del'>-	vshl.i32	q5, q0, #4</div><div class='del'>-	vtrn.32		q1, q4</div><div class='del'>-	vshl.i32	q6, q3, #4</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vshl.i32	q7, q1, #4</div><div class='del'>-	vld1.8		{d5}, [r4, : 64]</div><div class='del'>-	vshl.i32	q8, q4, #4</div><div class='del'>-	vtrn.32		d4, d5</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q2, #4</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vld1.8		{d24}, [r2, : 64]</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	add		r2, r3, #192</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d25}, [r2, : 64]</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		q9, q13</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vtrn.32		q11, q14</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		d24, d25</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q6, q13, #1</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q14, #1</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q15, q12, #1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vext.32		d10, d31, d30, #0</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q8, d18, d5</div><div class='del'>-	vmlal.s32	q8, d26, d4</div><div class='del'>-	vmlal.s32	q8, d19, d9</div><div class='del'>-	vmlal.s32	q8, d27, d3</div><div class='del'>-	vmlal.s32	q8, d22, d8</div><div class='del'>-	vmlal.s32	q8, d28, d2</div><div class='del'>-	vmlal.s32	q8, d23, d7</div><div class='del'>-	vmlal.s32	q8, d29, d1</div><div class='del'>-	vmlal.s32	q8, d24, d6</div><div class='del'>-	vmlal.s32	q8, d25, d0</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q2, d18, d4</div><div class='del'>-	vmlal.s32	q2, d12, d9</div><div class='del'>-	vmlal.s32	q2, d13, d8</div><div class='del'>-	vmlal.s32	q2, d19, d3</div><div class='del'>-	vmlal.s32	q2, d22, d2</div><div class='del'>-	vmlal.s32	q2, d23, d1</div><div class='del'>-	vmlal.s32	q2, d24, d0</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q7, d18, d9</div><div class='del'>-	vmlal.s32	q7, d26, d3</div><div class='del'>-	vmlal.s32	q7, d19, d8</div><div class='del'>-	vmlal.s32	q7, d27, d2</div><div class='del'>-	vmlal.s32	q7, d22, d7</div><div class='del'>-	vmlal.s32	q7, d28, d1</div><div class='del'>-	vmlal.s32	q7, d23, d6</div><div class='del'>-	vmlal.s32	q7, d29, d0</div><div class='del'>-	vst1.8		{d10-d11}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q5, d18, d3</div><div class='del'>-	vmlal.s32	q5, d19, d2</div><div class='del'>-	vmlal.s32	q5, d22, d1</div><div class='del'>-	vmlal.s32	q5, d23, d0</div><div class='del'>-	vmlal.s32	q5, d12, d8</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]</div><div class='del'>-	vmull.s32	q4, d18, d8</div><div class='del'>-	vmlal.s32	q4, d26, d2</div><div class='del'>-	vmlal.s32	q4, d19, d7</div><div class='del'>-	vmlal.s32	q4, d27, d1</div><div class='del'>-	vmlal.s32	q4, d22, d6</div><div class='del'>-	vmlal.s32	q4, d28, d0</div><div class='del'>-	vmull.s32	q8, d18, d7</div><div class='del'>-	vmlal.s32	q8, d26, d1</div><div class='del'>-	vmlal.s32	q8, d19, d6</div><div class='del'>-	vmlal.s32	q8, d27, d0</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d21</div><div class='del'>-	vmlal.s32	q7, d25, d20</div><div class='del'>-	vmlal.s32	q4, d23, d21</div><div class='del'>-	vmlal.s32	q4, d29, d20</div><div class='del'>-	vmlal.s32	q8, d22, d21</div><div class='del'>-	vmlal.s32	q8, d28, d20</div><div class='del'>-	vmlal.s32	q5, d24, d20</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]</div><div class='del'>-	vmull.s32	q7, d18, d6</div><div class='del'>-	vmlal.s32	q7, d26, d0</div><div class='del'>-	add		r2, sp, #624</div><div class='del'>-	vld1.8		{d30-d31}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d30, d21</div><div class='del'>-	vmlal.s32	q7, d19, d21</div><div class='del'>-	vmlal.s32	q7, d27, d20</div><div class='del'>-	add		r2, sp, #592</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d25, d27</div><div class='del'>-	vmlal.s32	q8, d29, d27</div><div class='del'>-	vmlal.s32	q8, d25, d26</div><div class='del'>-	vmlal.s32	q7, d28, d27</div><div class='del'>-	vmlal.s32	q7, d29, d26</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d24, d29</div><div class='del'>-	vmlal.s32	q8, d23, d29</div><div class='del'>-	vmlal.s32	q8, d24, d28</div><div class='del'>-	vmlal.s32	q7, d22, d29</div><div class='del'>-	vmlal.s32	q7, d23, d28</div><div class='del'>-	vst1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vld1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d9</div><div class='del'>-	vmlal.s32	q7, d25, d31</div><div class='del'>-	vmull.s32	q1, d18, d2</div><div class='del'>-	vmlal.s32	q1, d19, d1</div><div class='del'>-	vmlal.s32	q1, d22, d0</div><div class='del'>-	vmlal.s32	q1, d24, d27</div><div class='del'>-	vmlal.s32	q1, d23, d20</div><div class='del'>-	vmlal.s32	q1, d12, d7</div><div class='del'>-	vmlal.s32	q1, d13, d6</div><div class='del'>-	vmull.s32	q6, d18, d1</div><div class='del'>-	vmlal.s32	q6, d19, d0</div><div class='del'>-	vmlal.s32	q6, d23, d27</div><div class='del'>-	vmlal.s32	q6, d22, d20</div><div class='del'>-	vmlal.s32	q6, d24, d26</div><div class='del'>-	vmull.s32	q0, d18, d0</div><div class='del'>-	vmlal.s32	q0, d22, d27</div><div class='del'>-	vmlal.s32	q0, d23, d26</div><div class='del'>-	vmlal.s32	q0, d24, d31</div><div class='del'>-	vmlal.s32	q0, d19, d20</div><div class='del'>-	add		r2, sp, #608</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d18, d7</div><div class='del'>-	vmlal.s32	q5, d18, d6</div><div class='del'>-	vmlal.s32	q1, d18, d21</div><div class='del'>-	vmlal.s32	q0, d18, d28</div><div class='del'>-	vmlal.s32	q6, d18, d29</div><div class='del'>-	vmlal.s32	q2, d19, d6</div><div class='del'>-	vmlal.s32	q5, d19, d21</div><div class='del'>-	vmlal.s32	q1, d19, d29</div><div class='del'>-	vmlal.s32	q0, d19, d9</div><div class='del'>-	vmlal.s32	q6, d19, d28</div><div class='del'>-	add		r2, sp, #560</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #480</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d19, d7</div><div class='del'>-	vmlal.s32	q0, d18, d21</div><div class='del'>-	vmlal.s32	q0, d19, d29</div><div class='del'>-	vmlal.s32	q6, d18, d6</div><div class='del'>-	add		r2, sp, #496</div><div class='del'>-	vld1.8		{d6-d7}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q6, d19, d21</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q0, d30, d8</div><div class='del'>-	add		r2, sp, #640</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d30, d29</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d24-d25}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q1, d30, d28</div><div class='del'>-	vadd.i64	q13, q0, q11</div><div class='del'>-	vadd.i64	q14, q5, q11</div><div class='del'>-	vmlal.s32	q6, d30, d9</div><div class='del'>-	vshr.s64	q4, q13, #26</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vadd.i64	q7, q7, q4</div><div class='del'>-	vshl.i64	q4, q4, #26</div><div class='del'>-	vadd.i64	q14, q7, q3</div><div class='del'>-	vadd.i64	q9, q9, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q15, q9, q3</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vshr.s64	q4, q14, #25</div><div class='del'>-	vsub.i64	q5, q5, q13</div><div class='del'>-	vshr.s64	q13, q15, #25</div><div class='del'>-	vadd.i64	q6, q6, q4</div><div class='del'>-	vshl.i64	q4, q4, #25</div><div class='del'>-	vadd.i64	q14, q6, q11</div><div class='del'>-	vadd.i64	q2, q2, q13</div><div class='del'>-	vsub.i64	q4, q7, q4</div><div class='del'>-	vshr.s64	q7, q14, #26</div><div class='del'>-	vshl.i64	q13, q13, #25</div><div class='del'>-	vadd.i64	q14, q2, q11</div><div class='del'>-	vadd.i64	q8, q8, q7</div><div class='del'>-	vshl.i64	q7, q7, #26</div><div class='del'>-	vadd.i64	q15, q8, q3</div><div class='del'>-	vsub.i64	q9, q9, q13</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vsub.i64	q6, q6, q7</div><div class='del'>-	vshr.s64	q7, q15, #25</div><div class='del'>-	vadd.i64	q10, q10, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q14, q10, q3</div><div class='del'>-	vadd.i64	q1, q1, q7</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	vshl.i64	q7, q7, #25</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	vadd.i64	q15, q1, q11</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q2, q2, q13</div><div class='del'>-	add		r4, r4, #8</div><div class='del'>-	vshr.s64	q13, q14, #25</div><div class='del'>-	vsub.i64	q7, q8, q7</div><div class='del'>-	vshr.s64	q8, q15, #26</div><div class='del'>-	vadd.i64	q14, q13, q13</div><div class='del'>-	vadd.i64	q12, q12, q8</div><div class='del'>-	vtrn.32		d12, d14</div><div class='del'>-	vshl.i64	q8, q8, #26</div><div class='del'>-	vtrn.32		d13, d15</div><div class='del'>-	vadd.i64	q3, q12, q3</div><div class='del'>-	vadd.i64	q0, q0, q14</div><div class='del'>-	vst1.8		d12, [r2, : 64]!</div><div class='del'>-	vshl.i64	q7, q13, #4</div><div class='del'>-	vst1.8		d13, [r4, : 64]!</div><div class='del'>-	vsub.i64	q1, q1, q8</div><div class='del'>-	vshr.s64	q3, q3, #25</div><div class='del'>-	vadd.i64	q0, q0, q7</div><div class='del'>-	vadd.i64	q5, q5, q3</div><div class='del'>-	vshl.i64	q3, q3, #25</div><div class='del'>-	vadd.i64	q6, q5, q11</div><div class='del'>-	vadd.i64	q0, q0, q13</div><div class='del'>-	vshl.i64	q7, q13, #25</div><div class='del'>-	vadd.i64	q8, q0, q11</div><div class='del'>-	vsub.i64	q3, q12, q3</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vsub.i64	q7, q10, q7</div><div class='del'>-	vtrn.32		d2, d6</div><div class='del'>-	vshr.s64	q8, q8, #26</div><div class='del'>-	vtrn.32		d3, d7</div><div class='del'>-	vadd.i64	q3, q9, q6</div><div class='del'>-	vst1.8		d2, [r2, : 64]</div><div class='del'>-	vshl.i64	q6, q6, #26</div><div class='del'>-	vst1.8		d3, [r4, : 64]</div><div class='del'>-	vadd.i64	q1, q4, q8</div><div class='del'>-	vtrn.32		d4, d14</div><div class='del'>-	vshl.i64	q4, q8, #26</div><div class='del'>-	vtrn.32		d5, d15</div><div class='del'>-	vsub.i64	q5, q5, q6</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	add		r4, r4, #16</div><div class='del'>-	vst1.8		d5, [r4, : 64]</div><div class='del'>-	vtrn.32		d10, d6</div><div class='del'>-	vtrn.32		d11, d7</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	sub		r4, r4, #8</div><div class='del'>-	vtrn.32		d0, d2</div><div class='del'>-	vtrn.32		d1, d3</div><div class='del'>-	vst1.8		d10, [r2, : 64]</div><div class='del'>-	vst1.8		d11, [r4, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	sub		r4, r4, #24</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	vst1.8		d1, [r4, : 64]</div><div class='del'>-	add		r2, r3, #288</div><div class='del'>-	add		r4, r3, #336</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vsub.i32	q0, q0, q1</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d4-d5}, [r4, : 128]!</div><div class='del'>-	vsub.i32	q1, q1, q2</div><div class='del'>-	add		r5, r3, #240</div><div class='del'>-	vld1.8		{d4}, [r2, : 64]</div><div class='del'>-	vld1.8		{d6}, [r4, : 64]</div><div class='del'>-	vsub.i32	q2, q2, q3</div><div class='del'>-	vst1.8		{d0-d1}, [r5, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r5, : 128]!</div><div class='del'>-	vst1.8		d4, [r5, : 64]</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	add		r5, r3, #144</div><div class='del'>-	add		r6, r3, #192</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vsub.i32	q2, q0, q1</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vsub.i32	q4, q1, q3</div><div class='del'>-	vadd.i32	q1, q1, q3</div><div class='del'>-	vld1.8		{d6}, [r2, : 64]</div><div class='del'>-	vld1.8		{d10}, [r4, : 64]</div><div class='del'>-	vsub.i32	q6, q3, q5</div><div class='del'>-	vadd.i32	q3, q3, q5</div><div class='del'>-	vst1.8		{d4-d5}, [r5, : 128]!</div><div class='del'>-	vst1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vst1.8		{d8-d9}, [r5, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r6, : 128]!</div><div class='del'>-	vst1.8		d12, [r5, : 64]</div><div class='del'>-	vst1.8		d6, [r6, : 64]</div><div class='del'>-	add		r2, r3, #0</div><div class='del'>-	add		r4, r3, #240</div><div class='del'>-	vld1.8		{d0-d1}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r4, : 64]</div><div class='del'>-	add		r4, r3, #336</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vtrn.32		q0, q3</div><div class='del'>-	vld1.8		{d8-d9}, [r4, : 128]!</div><div class='del'>-	vshl.i32	q5, q0, #4</div><div class='del'>-	vtrn.32		q1, q4</div><div class='del'>-	vshl.i32	q6, q3, #4</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vshl.i32	q7, q1, #4</div><div class='del'>-	vld1.8		{d5}, [r4, : 64]</div><div class='del'>-	vshl.i32	q8, q4, #4</div><div class='del'>-	vtrn.32		d4, d5</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q2, #4</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vld1.8		{d24}, [r2, : 64]</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	add		r2, r3, #288</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d25}, [r2, : 64]</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		q9, q13</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vtrn.32		q11, q14</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		d24, d25</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q6, q13, #1</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q14, #1</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q15, q12, #1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vext.32		d10, d31, d30, #0</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q8, d18, d5</div><div class='del'>-	vmlal.s32	q8, d26, d4</div><div class='del'>-	vmlal.s32	q8, d19, d9</div><div class='del'>-	vmlal.s32	q8, d27, d3</div><div class='del'>-	vmlal.s32	q8, d22, d8</div><div class='del'>-	vmlal.s32	q8, d28, d2</div><div class='del'>-	vmlal.s32	q8, d23, d7</div><div class='del'>-	vmlal.s32	q8, d29, d1</div><div class='del'>-	vmlal.s32	q8, d24, d6</div><div class='del'>-	vmlal.s32	q8, d25, d0</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q2, d18, d4</div><div class='del'>-	vmlal.s32	q2, d12, d9</div><div class='del'>-	vmlal.s32	q2, d13, d8</div><div class='del'>-	vmlal.s32	q2, d19, d3</div><div class='del'>-	vmlal.s32	q2, d22, d2</div><div class='del'>-	vmlal.s32	q2, d23, d1</div><div class='del'>-	vmlal.s32	q2, d24, d0</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q7, d18, d9</div><div class='del'>-	vmlal.s32	q7, d26, d3</div><div class='del'>-	vmlal.s32	q7, d19, d8</div><div class='del'>-	vmlal.s32	q7, d27, d2</div><div class='del'>-	vmlal.s32	q7, d22, d7</div><div class='del'>-	vmlal.s32	q7, d28, d1</div><div class='del'>-	vmlal.s32	q7, d23, d6</div><div class='del'>-	vmlal.s32	q7, d29, d0</div><div class='del'>-	vst1.8		{d10-d11}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q5, d18, d3</div><div class='del'>-	vmlal.s32	q5, d19, d2</div><div class='del'>-	vmlal.s32	q5, d22, d1</div><div class='del'>-	vmlal.s32	q5, d23, d0</div><div class='del'>-	vmlal.s32	q5, d12, d8</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q4, d18, d8</div><div class='del'>-	vmlal.s32	q4, d26, d2</div><div class='del'>-	vmlal.s32	q4, d19, d7</div><div class='del'>-	vmlal.s32	q4, d27, d1</div><div class='del'>-	vmlal.s32	q4, d22, d6</div><div class='del'>-	vmlal.s32	q4, d28, d0</div><div class='del'>-	vmull.s32	q8, d18, d7</div><div class='del'>-	vmlal.s32	q8, d26, d1</div><div class='del'>-	vmlal.s32	q8, d19, d6</div><div class='del'>-	vmlal.s32	q8, d27, d0</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d21</div><div class='del'>-	vmlal.s32	q7, d25, d20</div><div class='del'>-	vmlal.s32	q4, d23, d21</div><div class='del'>-	vmlal.s32	q4, d29, d20</div><div class='del'>-	vmlal.s32	q8, d22, d21</div><div class='del'>-	vmlal.s32	q8, d28, d20</div><div class='del'>-	vmlal.s32	q5, d24, d20</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]</div><div class='del'>-	vmull.s32	q7, d18, d6</div><div class='del'>-	vmlal.s32	q7, d26, d0</div><div class='del'>-	add		r2, sp, #624</div><div class='del'>-	vld1.8		{d30-d31}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d30, d21</div><div class='del'>-	vmlal.s32	q7, d19, d21</div><div class='del'>-	vmlal.s32	q7, d27, d20</div><div class='del'>-	add		r2, sp, #592</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d25, d27</div><div class='del'>-	vmlal.s32	q8, d29, d27</div><div class='del'>-	vmlal.s32	q8, d25, d26</div><div class='del'>-	vmlal.s32	q7, d28, d27</div><div class='del'>-	vmlal.s32	q7, d29, d26</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d24, d29</div><div class='del'>-	vmlal.s32	q8, d23, d29</div><div class='del'>-	vmlal.s32	q8, d24, d28</div><div class='del'>-	vmlal.s32	q7, d22, d29</div><div class='del'>-	vmlal.s32	q7, d23, d28</div><div class='del'>-	vst1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vld1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d9</div><div class='del'>-	vmlal.s32	q7, d25, d31</div><div class='del'>-	vmull.s32	q1, d18, d2</div><div class='del'>-	vmlal.s32	q1, d19, d1</div><div class='del'>-	vmlal.s32	q1, d22, d0</div><div class='del'>-	vmlal.s32	q1, d24, d27</div><div class='del'>-	vmlal.s32	q1, d23, d20</div><div class='del'>-	vmlal.s32	q1, d12, d7</div><div class='del'>-	vmlal.s32	q1, d13, d6</div><div class='del'>-	vmull.s32	q6, d18, d1</div><div class='del'>-	vmlal.s32	q6, d19, d0</div><div class='del'>-	vmlal.s32	q6, d23, d27</div><div class='del'>-	vmlal.s32	q6, d22, d20</div><div class='del'>-	vmlal.s32	q6, d24, d26</div><div class='del'>-	vmull.s32	q0, d18, d0</div><div class='del'>-	vmlal.s32	q0, d22, d27</div><div class='del'>-	vmlal.s32	q0, d23, d26</div><div class='del'>-	vmlal.s32	q0, d24, d31</div><div class='del'>-	vmlal.s32	q0, d19, d20</div><div class='del'>-	add		r2, sp, #608</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d18, d7</div><div class='del'>-	vmlal.s32	q5, d18, d6</div><div class='del'>-	vmlal.s32	q1, d18, d21</div><div class='del'>-	vmlal.s32	q0, d18, d28</div><div class='del'>-	vmlal.s32	q6, d18, d29</div><div class='del'>-	vmlal.s32	q2, d19, d6</div><div class='del'>-	vmlal.s32	q5, d19, d21</div><div class='del'>-	vmlal.s32	q1, d19, d29</div><div class='del'>-	vmlal.s32	q0, d19, d9</div><div class='del'>-	vmlal.s32	q6, d19, d28</div><div class='del'>-	add		r2, sp, #560</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #480</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d19, d7</div><div class='del'>-	vmlal.s32	q0, d18, d21</div><div class='del'>-	vmlal.s32	q0, d19, d29</div><div class='del'>-	vmlal.s32	q6, d18, d6</div><div class='del'>-	add		r2, sp, #496</div><div class='del'>-	vld1.8		{d6-d7}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q6, d19, d21</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q0, d30, d8</div><div class='del'>-	add		r2, sp, #640</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d30, d29</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d24-d25}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q1, d30, d28</div><div class='del'>-	vadd.i64	q13, q0, q11</div><div class='del'>-	vadd.i64	q14, q5, q11</div><div class='del'>-	vmlal.s32	q6, d30, d9</div><div class='del'>-	vshr.s64	q4, q13, #26</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vadd.i64	q7, q7, q4</div><div class='del'>-	vshl.i64	q4, q4, #26</div><div class='del'>-	vadd.i64	q14, q7, q3</div><div class='del'>-	vadd.i64	q9, q9, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q15, q9, q3</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vshr.s64	q4, q14, #25</div><div class='del'>-	vsub.i64	q5, q5, q13</div><div class='del'>-	vshr.s64	q13, q15, #25</div><div class='del'>-	vadd.i64	q6, q6, q4</div><div class='del'>-	vshl.i64	q4, q4, #25</div><div class='del'>-	vadd.i64	q14, q6, q11</div><div class='del'>-	vadd.i64	q2, q2, q13</div><div class='del'>-	vsub.i64	q4, q7, q4</div><div class='del'>-	vshr.s64	q7, q14, #26</div><div class='del'>-	vshl.i64	q13, q13, #25</div><div class='del'>-	vadd.i64	q14, q2, q11</div><div class='del'>-	vadd.i64	q8, q8, q7</div><div class='del'>-	vshl.i64	q7, q7, #26</div><div class='del'>-	vadd.i64	q15, q8, q3</div><div class='del'>-	vsub.i64	q9, q9, q13</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vsub.i64	q6, q6, q7</div><div class='del'>-	vshr.s64	q7, q15, #25</div><div class='del'>-	vadd.i64	q10, q10, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q14, q10, q3</div><div class='del'>-	vadd.i64	q1, q1, q7</div><div class='del'>-	add		r2, r3, #288</div><div class='del'>-	vshl.i64	q7, q7, #25</div><div class='del'>-	add		r4, r3, #96</div><div class='del'>-	vadd.i64	q15, q1, q11</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q2, q2, q13</div><div class='del'>-	add		r4, r4, #8</div><div class='del'>-	vshr.s64	q13, q14, #25</div><div class='del'>-	vsub.i64	q7, q8, q7</div><div class='del'>-	vshr.s64	q8, q15, #26</div><div class='del'>-	vadd.i64	q14, q13, q13</div><div class='del'>-	vadd.i64	q12, q12, q8</div><div class='del'>-	vtrn.32		d12, d14</div><div class='del'>-	vshl.i64	q8, q8, #26</div><div class='del'>-	vtrn.32		d13, d15</div><div class='del'>-	vadd.i64	q3, q12, q3</div><div class='del'>-	vadd.i64	q0, q0, q14</div><div class='del'>-	vst1.8		d12, [r2, : 64]!</div><div class='del'>-	vshl.i64	q7, q13, #4</div><div class='del'>-	vst1.8		d13, [r4, : 64]!</div><div class='del'>-	vsub.i64	q1, q1, q8</div><div class='del'>-	vshr.s64	q3, q3, #25</div><div class='del'>-	vadd.i64	q0, q0, q7</div><div class='del'>-	vadd.i64	q5, q5, q3</div><div class='del'>-	vshl.i64	q3, q3, #25</div><div class='del'>-	vadd.i64	q6, q5, q11</div><div class='del'>-	vadd.i64	q0, q0, q13</div><div class='del'>-	vshl.i64	q7, q13, #25</div><div class='del'>-	vadd.i64	q8, q0, q11</div><div class='del'>-	vsub.i64	q3, q12, q3</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vsub.i64	q7, q10, q7</div><div class='del'>-	vtrn.32		d2, d6</div><div class='del'>-	vshr.s64	q8, q8, #26</div><div class='del'>-	vtrn.32		d3, d7</div><div class='del'>-	vadd.i64	q3, q9, q6</div><div class='del'>-	vst1.8		d2, [r2, : 64]</div><div class='del'>-	vshl.i64	q6, q6, #26</div><div class='del'>-	vst1.8		d3, [r4, : 64]</div><div class='del'>-	vadd.i64	q1, q4, q8</div><div class='del'>-	vtrn.32		d4, d14</div><div class='del'>-	vshl.i64	q4, q8, #26</div><div class='del'>-	vtrn.32		d5, d15</div><div class='del'>-	vsub.i64	q5, q5, q6</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	add		r4, r4, #16</div><div class='del'>-	vst1.8		d5, [r4, : 64]</div><div class='del'>-	vtrn.32		d10, d6</div><div class='del'>-	vtrn.32		d11, d7</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	sub		r4, r4, #8</div><div class='del'>-	vtrn.32		d0, d2</div><div class='del'>-	vtrn.32		d1, d3</div><div class='del'>-	vst1.8		d10, [r2, : 64]</div><div class='del'>-	vst1.8		d11, [r4, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	sub		r4, r4, #24</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	vst1.8		d1, [r4, : 64]</div><div class='del'>-	add		r2, sp, #512</div><div class='del'>-	add		r4, r3, #144</div><div class='del'>-	add		r5, r3, #192</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d4-d5}, [r5, : 128]!</div><div class='del'>-	vzip.i32	q1, q2</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d8-d9}, [r5, : 128]!</div><div class='del'>-	vshl.i32	q5, q1, #1</div><div class='del'>-	vzip.i32	q3, q4</div><div class='del'>-	vshl.i32	q6, q2, #1</div><div class='del'>-	vld1.8		{d14}, [r4, : 64]</div><div class='del'>-	vshl.i32	q8, q3, #1</div><div class='del'>-	vld1.8		{d15}, [r5, : 64]</div><div class='del'>-	vshl.i32	q9, q4, #1</div><div class='del'>-	vmul.i32	d21, d7, d1</div><div class='del'>-	vtrn.32		d14, d15</div><div class='del'>-	vmul.i32	q11, q4, q0</div><div class='del'>-	vmul.i32	q0, q7, q0</div><div class='del'>-	vmull.s32	q12, d2, d2</div><div class='del'>-	vmlal.s32	q12, d11, d1</div><div class='del'>-	vmlal.s32	q12, d12, d0</div><div class='del'>-	vmlal.s32	q12, d13, d23</div><div class='del'>-	vmlal.s32	q12, d16, d22</div><div class='del'>-	vmlal.s32	q12, d7, d21</div><div class='del'>-	vmull.s32	q10, d2, d11</div><div class='del'>-	vmlal.s32	q10, d4, d1</div><div class='del'>-	vmlal.s32	q10, d13, d0</div><div class='del'>-	vmlal.s32	q10, d6, d23</div><div class='del'>-	vmlal.s32	q10, d17, d22</div><div class='del'>-	vmull.s32	q13, d10, d4</div><div class='del'>-	vmlal.s32	q13, d11, d3</div><div class='del'>-	vmlal.s32	q13, d13, d1</div><div class='del'>-	vmlal.s32	q13, d16, d0</div><div class='del'>-	vmlal.s32	q13, d17, d23</div><div class='del'>-	vmlal.s32	q13, d8, d22</div><div class='del'>-	vmull.s32	q1, d10, d5</div><div class='del'>-	vmlal.s32	q1, d11, d4</div><div class='del'>-	vmlal.s32	q1, d6, d1</div><div class='del'>-	vmlal.s32	q1, d17, d0</div><div class='del'>-	vmlal.s32	q1, d8, d23</div><div class='del'>-	vmull.s32	q14, d10, d6</div><div class='del'>-	vmlal.s32	q14, d11, d13</div><div class='del'>-	vmlal.s32	q14, d4, d4</div><div class='del'>-	vmlal.s32	q14, d17, d1</div><div class='del'>-	vmlal.s32	q14, d18, d0</div><div class='del'>-	vmlal.s32	q14, d9, d23</div><div class='del'>-	vmull.s32	q11, d10, d7</div><div class='del'>-	vmlal.s32	q11, d11, d6</div><div class='del'>-	vmlal.s32	q11, d12, d5</div><div class='del'>-	vmlal.s32	q11, d8, d1</div><div class='del'>-	vmlal.s32	q11, d19, d0</div><div class='del'>-	vmull.s32	q15, d10, d8</div><div class='del'>-	vmlal.s32	q15, d11, d17</div><div class='del'>-	vmlal.s32	q15, d12, d6</div><div class='del'>-	vmlal.s32	q15, d13, d5</div><div class='del'>-	vmlal.s32	q15, d19, d1</div><div class='del'>-	vmlal.s32	q15, d14, d0</div><div class='del'>-	vmull.s32	q2, d10, d9</div><div class='del'>-	vmlal.s32	q2, d11, d8</div><div class='del'>-	vmlal.s32	q2, d12, d7</div><div class='del'>-	vmlal.s32	q2, d13, d6</div><div class='del'>-	vmlal.s32	q2, d14, d1</div><div class='del'>-	vmull.s32	q0, d15, d1</div><div class='del'>-	vmlal.s32	q0, d10, d14</div><div class='del'>-	vmlal.s32	q0, d11, d19</div><div class='del'>-	vmlal.s32	q0, d12, d8</div><div class='del'>-	vmlal.s32	q0, d13, d17</div><div class='del'>-	vmlal.s32	q0, d6, d6</div><div class='del'>-	add		r2, sp, #480</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q3, d16, d7</div><div class='del'>-	vmlal.s32	q3, d10, d15</div><div class='del'>-	vmlal.s32	q3, d11, d14</div><div class='del'>-	vmlal.s32	q3, d12, d9</div><div class='del'>-	vmlal.s32	q3, d13, d8</div><div class='del'>-	vld1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	vadd.i64	q5, q12, q9</div><div class='del'>-	vadd.i64	q6, q15, q9</div><div class='del'>-	vshr.s64	q5, q5, #26</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vadd.i64	q7, q10, q5</div><div class='del'>-	vshl.i64	q5, q5, #26</div><div class='del'>-	vadd.i64	q8, q7, q4</div><div class='del'>-	vadd.i64	q2, q2, q6</div><div class='del'>-	vshl.i64	q6, q6, #26</div><div class='del'>-	vadd.i64	q10, q2, q4</div><div class='del'>-	vsub.i64	q5, q12, q5</div><div class='del'>-	vshr.s64	q8, q8, #25</div><div class='del'>-	vsub.i64	q6, q15, q6</div><div class='del'>-	vshr.s64	q10, q10, #25</div><div class='del'>-	vadd.i64	q12, q13, q8</div><div class='del'>-	vshl.i64	q8, q8, #25</div><div class='del'>-	vadd.i64	q13, q12, q9</div><div class='del'>-	vadd.i64	q0, q0, q10</div><div class='del'>-	vsub.i64	q7, q7, q8</div><div class='del'>-	vshr.s64	q8, q13, #26</div><div class='del'>-	vshl.i64	q10, q10, #25</div><div class='del'>-	vadd.i64	q13, q0, q9</div><div class='del'>-	vadd.i64	q1, q1, q8</div><div class='del'>-	vshl.i64	q8, q8, #26</div><div class='del'>-	vadd.i64	q15, q1, q4</div><div class='del'>-	vsub.i64	q2, q2, q10</div><div class='del'>-	vshr.s64	q10, q13, #26</div><div class='del'>-	vsub.i64	q8, q12, q8</div><div class='del'>-	vshr.s64	q12, q15, #25</div><div class='del'>-	vadd.i64	q3, q3, q10</div><div class='del'>-	vshl.i64	q10, q10, #26</div><div class='del'>-	vadd.i64	q13, q3, q4</div><div class='del'>-	vadd.i64	q14, q14, q12</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	vshl.i64	q12, q12, #25</div><div class='del'>-	add		r4, r3, #192</div><div class='del'>-	vadd.i64	q15, q14, q9</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q0, q0, q10</div><div class='del'>-	add		r4, r4, #8</div><div class='del'>-	vshr.s64	q10, q13, #25</div><div class='del'>-	vsub.i64	q1, q1, q12</div><div class='del'>-	vshr.s64	q12, q15, #26</div><div class='del'>-	vadd.i64	q13, q10, q10</div><div class='del'>-	vadd.i64	q11, q11, q12</div><div class='del'>-	vtrn.32		d16, d2</div><div class='del'>-	vshl.i64	q12, q12, #26</div><div class='del'>-	vtrn.32		d17, d3</div><div class='del'>-	vadd.i64	q1, q11, q4</div><div class='del'>-	vadd.i64	q4, q5, q13</div><div class='del'>-	vst1.8		d16, [r2, : 64]!</div><div class='del'>-	vshl.i64	q5, q10, #4</div><div class='del'>-	vst1.8		d17, [r4, : 64]!</div><div class='del'>-	vsub.i64	q8, q14, q12</div><div class='del'>-	vshr.s64	q1, q1, #25</div><div class='del'>-	vadd.i64	q4, q4, q5</div><div class='del'>-	vadd.i64	q5, q6, q1</div><div class='del'>-	vshl.i64	q1, q1, #25</div><div class='del'>-	vadd.i64	q6, q5, q9</div><div class='del'>-	vadd.i64	q4, q4, q10</div><div class='del'>-	vshl.i64	q10, q10, #25</div><div class='del'>-	vadd.i64	q9, q4, q9</div><div class='del'>-	vsub.i64	q1, q11, q1</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vsub.i64	q3, q3, q10</div><div class='del'>-	vtrn.32		d16, d2</div><div class='del'>-	vshr.s64	q9, q9, #26</div><div class='del'>-	vtrn.32		d17, d3</div><div class='del'>-	vadd.i64	q1, q2, q6</div><div class='del'>-	vst1.8		d16, [r2, : 64]</div><div class='del'>-	vshl.i64	q2, q6, #26</div><div class='del'>-	vst1.8		d17, [r4, : 64]</div><div class='del'>-	vadd.i64	q6, q7, q9</div><div class='del'>-	vtrn.32		d0, d6</div><div class='del'>-	vshl.i64	q7, q9, #26</div><div class='del'>-	vtrn.32		d1, d7</div><div class='del'>-	vsub.i64	q2, q5, q2</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q3, q4, q7</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	add		r4, r4, #16</div><div class='del'>-	vst1.8		d1, [r4, : 64]</div><div class='del'>-	vtrn.32		d4, d2</div><div class='del'>-	vtrn.32		d5, d3</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	sub		r4, r4, #8</div><div class='del'>-	vtrn.32		d6, d12</div><div class='del'>-	vtrn.32		d7, d13</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	vst1.8		d5, [r4, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	sub		r4, r4, #24</div><div class='del'>-	vst1.8		d6, [r2, : 64]</div><div class='del'>-	vst1.8		d7, [r4, : 64]</div><div class='del'>-	add		r2, r3, #336</div><div class='del'>-	add		r4, r3, #288</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vadd.i32	q0, q0, q1</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d4-d5}, [r4, : 128]!</div><div class='del'>-	vadd.i32	q1, q1, q2</div><div class='del'>-	add		r5, r3, #288</div><div class='del'>-	vld1.8		{d4}, [r2, : 64]</div><div class='del'>-	vld1.8		{d6}, [r4, : 64]</div><div class='del'>-	vadd.i32	q2, q2, q3</div><div class='del'>-	vst1.8		{d0-d1}, [r5, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r5, : 128]!</div><div class='del'>-	vst1.8		d4, [r5, : 64]</div><div class='del'>-	add		r2, r3, #48</div><div class='del'>-	add		r4, r3, #144</div><div class='del'>-	vld1.8		{d0-d1}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r4, : 64]</div><div class='del'>-	add		r4, r3, #288</div><div class='del'>-	vld1.8		{d6-d7}, [r4, : 128]!</div><div class='del'>-	vtrn.32		q0, q3</div><div class='del'>-	vld1.8		{d8-d9}, [r4, : 128]!</div><div class='del'>-	vshl.i32	q5, q0, #4</div><div class='del'>-	vtrn.32		q1, q4</div><div class='del'>-	vshl.i32	q6, q3, #4</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vshl.i32	q7, q1, #4</div><div class='del'>-	vld1.8		{d5}, [r4, : 64]</div><div class='del'>-	vshl.i32	q8, q4, #4</div><div class='del'>-	vtrn.32		d4, d5</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q2, #4</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vld1.8		{d24}, [r2, : 64]</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	add		r2, r3, #240</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]!</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vld1.8		{d25}, [r2, : 64]</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		q9, q13</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vadd.i32	q5, q5, q0</div><div class='del'>-	vtrn.32		q11, q14</div><div class='del'>-	vadd.i32	q6, q6, q3</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vadd.i32	q10, q10, q2</div><div class='del'>-	vtrn.32		d24, d25</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q6, q13, #1</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q10, q14, #1</div><div class='del'>-	vst1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vshl.i32	q15, q12, #1</div><div class='del'>-	vadd.i32	q8, q8, q4</div><div class='del'>-	vext.32		d10, d31, d30, #0</div><div class='del'>-	vadd.i32	q7, q7, q1</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q8, d18, d5</div><div class='del'>-	vmlal.s32	q8, d26, d4</div><div class='del'>-	vmlal.s32	q8, d19, d9</div><div class='del'>-	vmlal.s32	q8, d27, d3</div><div class='del'>-	vmlal.s32	q8, d22, d8</div><div class='del'>-	vmlal.s32	q8, d28, d2</div><div class='del'>-	vmlal.s32	q8, d23, d7</div><div class='del'>-	vmlal.s32	q8, d29, d1</div><div class='del'>-	vmlal.s32	q8, d24, d6</div><div class='del'>-	vmlal.s32	q8, d25, d0</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q2, d18, d4</div><div class='del'>-	vmlal.s32	q2, d12, d9</div><div class='del'>-	vmlal.s32	q2, d13, d8</div><div class='del'>-	vmlal.s32	q2, d19, d3</div><div class='del'>-	vmlal.s32	q2, d22, d2</div><div class='del'>-	vmlal.s32	q2, d23, d1</div><div class='del'>-	vmlal.s32	q2, d24, d0</div><div class='del'>-	vst1.8		{d20-d21}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q7, d18, d9</div><div class='del'>-	vmlal.s32	q7, d26, d3</div><div class='del'>-	vmlal.s32	q7, d19, d8</div><div class='del'>-	vmlal.s32	q7, d27, d2</div><div class='del'>-	vmlal.s32	q7, d22, d7</div><div class='del'>-	vmlal.s32	q7, d28, d1</div><div class='del'>-	vmlal.s32	q7, d23, d6</div><div class='del'>-	vmlal.s32	q7, d29, d0</div><div class='del'>-	vst1.8		{d10-d11}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q5, d18, d3</div><div class='del'>-	vmlal.s32	q5, d19, d2</div><div class='del'>-	vmlal.s32	q5, d22, d1</div><div class='del'>-	vmlal.s32	q5, d23, d0</div><div class='del'>-	vmlal.s32	q5, d12, d8</div><div class='del'>-	vst1.8		{d16-d17}, [r2, : 128]!</div><div class='del'>-	vmull.s32	q4, d18, d8</div><div class='del'>-	vmlal.s32	q4, d26, d2</div><div class='del'>-	vmlal.s32	q4, d19, d7</div><div class='del'>-	vmlal.s32	q4, d27, d1</div><div class='del'>-	vmlal.s32	q4, d22, d6</div><div class='del'>-	vmlal.s32	q4, d28, d0</div><div class='del'>-	vmull.s32	q8, d18, d7</div><div class='del'>-	vmlal.s32	q8, d26, d1</div><div class='del'>-	vmlal.s32	q8, d19, d6</div><div class='del'>-	vmlal.s32	q8, d27, d0</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d21</div><div class='del'>-	vmlal.s32	q7, d25, d20</div><div class='del'>-	vmlal.s32	q4, d23, d21</div><div class='del'>-	vmlal.s32	q4, d29, d20</div><div class='del'>-	vmlal.s32	q8, d22, d21</div><div class='del'>-	vmlal.s32	q8, d28, d20</div><div class='del'>-	vmlal.s32	q5, d24, d20</div><div class='del'>-	vst1.8		{d14-d15}, [r2, : 128]</div><div class='del'>-	vmull.s32	q7, d18, d6</div><div class='del'>-	vmlal.s32	q7, d26, d0</div><div class='del'>-	add		r2, sp, #624</div><div class='del'>-	vld1.8		{d30-d31}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d30, d21</div><div class='del'>-	vmlal.s32	q7, d19, d21</div><div class='del'>-	vmlal.s32	q7, d27, d20</div><div class='del'>-	add		r2, sp, #592</div><div class='del'>-	vld1.8		{d26-d27}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d25, d27</div><div class='del'>-	vmlal.s32	q8, d29, d27</div><div class='del'>-	vmlal.s32	q8, d25, d26</div><div class='del'>-	vmlal.s32	q7, d28, d27</div><div class='del'>-	vmlal.s32	q7, d29, d26</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d28-d29}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q4, d24, d29</div><div class='del'>-	vmlal.s32	q8, d23, d29</div><div class='del'>-	vmlal.s32	q8, d24, d28</div><div class='del'>-	vmlal.s32	q7, d22, d29</div><div class='del'>-	vmlal.s32	q7, d23, d28</div><div class='del'>-	vst1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #528</div><div class='del'>-	vld1.8		{d8-d9}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q7, d24, d9</div><div class='del'>-	vmlal.s32	q7, d25, d31</div><div class='del'>-	vmull.s32	q1, d18, d2</div><div class='del'>-	vmlal.s32	q1, d19, d1</div><div class='del'>-	vmlal.s32	q1, d22, d0</div><div class='del'>-	vmlal.s32	q1, d24, d27</div><div class='del'>-	vmlal.s32	q1, d23, d20</div><div class='del'>-	vmlal.s32	q1, d12, d7</div><div class='del'>-	vmlal.s32	q1, d13, d6</div><div class='del'>-	vmull.s32	q6, d18, d1</div><div class='del'>-	vmlal.s32	q6, d19, d0</div><div class='del'>-	vmlal.s32	q6, d23, d27</div><div class='del'>-	vmlal.s32	q6, d22, d20</div><div class='del'>-	vmlal.s32	q6, d24, d26</div><div class='del'>-	vmull.s32	q0, d18, d0</div><div class='del'>-	vmlal.s32	q0, d22, d27</div><div class='del'>-	vmlal.s32	q0, d23, d26</div><div class='del'>-	vmlal.s32	q0, d24, d31</div><div class='del'>-	vmlal.s32	q0, d19, d20</div><div class='del'>-	add		r2, sp, #608</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q2, d18, d7</div><div class='del'>-	vmlal.s32	q5, d18, d6</div><div class='del'>-	vmlal.s32	q1, d18, d21</div><div class='del'>-	vmlal.s32	q0, d18, d28</div><div class='del'>-	vmlal.s32	q6, d18, d29</div><div class='del'>-	vmlal.s32	q2, d19, d6</div><div class='del'>-	vmlal.s32	q5, d19, d21</div><div class='del'>-	vmlal.s32	q1, d19, d29</div><div class='del'>-	vmlal.s32	q0, d19, d9</div><div class='del'>-	vmlal.s32	q6, d19, d28</div><div class='del'>-	add		r2, sp, #560</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	add		r2, sp, #480</div><div class='del'>-	vld1.8		{d22-d23}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d19, d7</div><div class='del'>-	vmlal.s32	q0, d18, d21</div><div class='del'>-	vmlal.s32	q0, d19, d29</div><div class='del'>-	vmlal.s32	q6, d18, d6</div><div class='del'>-	add		r2, sp, #496</div><div class='del'>-	vld1.8		{d6-d7}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q6, d19, d21</div><div class='del'>-	add		r2, sp, #544</div><div class='del'>-	vld1.8		{d18-d19}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q0, d30, d8</div><div class='del'>-	add		r2, sp, #640</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q5, d30, d29</div><div class='del'>-	add		r2, sp, #576</div><div class='del'>-	vld1.8		{d24-d25}, [r2, : 128]</div><div class='del'>-	vmlal.s32	q1, d30, d28</div><div class='del'>-	vadd.i64	q13, q0, q11</div><div class='del'>-	vadd.i64	q14, q5, q11</div><div class='del'>-	vmlal.s32	q6, d30, d9</div><div class='del'>-	vshr.s64	q4, q13, #26</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vadd.i64	q7, q7, q4</div><div class='del'>-	vshl.i64	q4, q4, #26</div><div class='del'>-	vadd.i64	q14, q7, q3</div><div class='del'>-	vadd.i64	q9, q9, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q15, q9, q3</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vshr.s64	q4, q14, #25</div><div class='del'>-	vsub.i64	q5, q5, q13</div><div class='del'>-	vshr.s64	q13, q15, #25</div><div class='del'>-	vadd.i64	q6, q6, q4</div><div class='del'>-	vshl.i64	q4, q4, #25</div><div class='del'>-	vadd.i64	q14, q6, q11</div><div class='del'>-	vadd.i64	q2, q2, q13</div><div class='del'>-	vsub.i64	q4, q7, q4</div><div class='del'>-	vshr.s64	q7, q14, #26</div><div class='del'>-	vshl.i64	q13, q13, #25</div><div class='del'>-	vadd.i64	q14, q2, q11</div><div class='del'>-	vadd.i64	q8, q8, q7</div><div class='del'>-	vshl.i64	q7, q7, #26</div><div class='del'>-	vadd.i64	q15, q8, q3</div><div class='del'>-	vsub.i64	q9, q9, q13</div><div class='del'>-	vshr.s64	q13, q14, #26</div><div class='del'>-	vsub.i64	q6, q6, q7</div><div class='del'>-	vshr.s64	q7, q15, #25</div><div class='del'>-	vadd.i64	q10, q10, q13</div><div class='del'>-	vshl.i64	q13, q13, #26</div><div class='del'>-	vadd.i64	q14, q10, q3</div><div class='del'>-	vadd.i64	q1, q1, q7</div><div class='del'>-	add		r2, r3, #240</div><div class='del'>-	vshl.i64	q7, q7, #25</div><div class='del'>-	add		r4, r3, #144</div><div class='del'>-	vadd.i64	q15, q1, q11</div><div class='del'>-	add		r2, r2, #8</div><div class='del'>-	vsub.i64	q2, q2, q13</div><div class='del'>-	add		r4, r4, #8</div><div class='del'>-	vshr.s64	q13, q14, #25</div><div class='del'>-	vsub.i64	q7, q8, q7</div><div class='del'>-	vshr.s64	q8, q15, #26</div><div class='del'>-	vadd.i64	q14, q13, q13</div><div class='del'>-	vadd.i64	q12, q12, q8</div><div class='del'>-	vtrn.32		d12, d14</div><div class='del'>-	vshl.i64	q8, q8, #26</div><div class='del'>-	vtrn.32		d13, d15</div><div class='del'>-	vadd.i64	q3, q12, q3</div><div class='del'>-	vadd.i64	q0, q0, q14</div><div class='del'>-	vst1.8		d12, [r2, : 64]!</div><div class='del'>-	vshl.i64	q7, q13, #4</div><div class='del'>-	vst1.8		d13, [r4, : 64]!</div><div class='del'>-	vsub.i64	q1, q1, q8</div><div class='del'>-	vshr.s64	q3, q3, #25</div><div class='del'>-	vadd.i64	q0, q0, q7</div><div class='del'>-	vadd.i64	q5, q5, q3</div><div class='del'>-	vshl.i64	q3, q3, #25</div><div class='del'>-	vadd.i64	q6, q5, q11</div><div class='del'>-	vadd.i64	q0, q0, q13</div><div class='del'>-	vshl.i64	q7, q13, #25</div><div class='del'>-	vadd.i64	q8, q0, q11</div><div class='del'>-	vsub.i64	q3, q12, q3</div><div class='del'>-	vshr.s64	q6, q6, #26</div><div class='del'>-	vsub.i64	q7, q10, q7</div><div class='del'>-	vtrn.32		d2, d6</div><div class='del'>-	vshr.s64	q8, q8, #26</div><div class='del'>-	vtrn.32		d3, d7</div><div class='del'>-	vadd.i64	q3, q9, q6</div><div class='del'>-	vst1.8		d2, [r2, : 64]</div><div class='del'>-	vshl.i64	q6, q6, #26</div><div class='del'>-	vst1.8		d3, [r4, : 64]</div><div class='del'>-	vadd.i64	q1, q4, q8</div><div class='del'>-	vtrn.32		d4, d14</div><div class='del'>-	vshl.i64	q4, q8, #26</div><div class='del'>-	vtrn.32		d5, d15</div><div class='del'>-	vsub.i64	q5, q5, q6</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vsub.i64	q0, q0, q4</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	add		r4, r4, #16</div><div class='del'>-	vst1.8		d5, [r4, : 64]</div><div class='del'>-	vtrn.32		d10, d6</div><div class='del'>-	vtrn.32		d11, d7</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	sub		r4, r4, #8</div><div class='del'>-	vtrn.32		d0, d2</div><div class='del'>-	vtrn.32		d1, d3</div><div class='del'>-	vst1.8		d10, [r2, : 64]</div><div class='del'>-	vst1.8		d11, [r4, : 64]</div><div class='del'>-	sub		r2, r2, #24</div><div class='del'>-	sub		r4, r4, #24</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	vst1.8		d1, [r4, : 64]</div><div class='del'>-	ldr		r2, [sp, #456]</div><div class='del'>-	ldr		r4, [sp, #460]</div><div class='del'>-	subs		r5, r2, #1</div><div class='del'>-	bge		.Lmainloop</div><div class='del'>-	add		r1, r3, #144</div><div class='del'>-	add		r2, r3, #336</div><div class='del'>-	vld1.8		{d0-d1}, [r1, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r1, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r1, : 64]</div><div class='del'>-	vst1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	movw		r1, #0</div><div class='del'>-.Linvertloop:</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	movw		r4, #0</div><div class='del'>-	movw		r5, #2</div><div class='del'>-	cmp		r1, #1</div><div class='del'>-	moveq		r5, #1</div><div class='del'>-	addeq		r2, r3, #336</div><div class='del'>-	addeq		r4, r3, #48</div><div class='del'>-	cmp		r1, #2</div><div class='del'>-	moveq		r5, #1</div><div class='del'>-	addeq		r2, r3, #48</div><div class='del'>-	cmp		r1, #3</div><div class='del'>-	moveq		r5, #5</div><div class='del'>-	addeq		r4, r3, #336</div><div class='del'>-	cmp		r1, #4</div><div class='del'>-	moveq		r5, #10</div><div class='del'>-	cmp		r1, #5</div><div class='del'>-	moveq		r5, #20</div><div class='del'>-	cmp		r1, #6</div><div class='del'>-	moveq		r5, #10</div><div class='del'>-	addeq		r2, r3, #336</div><div class='del'>-	addeq		r4, r3, #336</div><div class='del'>-	cmp		r1, #7</div><div class='del'>-	moveq		r5, #50</div><div class='del'>-	cmp		r1, #8</div><div class='del'>-	moveq		r5, #100</div><div class='del'>-	cmp		r1, #9</div><div class='del'>-	moveq		r5, #50</div><div class='del'>-	addeq		r2, r3, #336</div><div class='del'>-	cmp		r1, #10</div><div class='del'>-	moveq		r5, #5</div><div class='del'>-	addeq		r2, r3, #48</div><div class='del'>-	cmp		r1, #11</div><div class='del'>-	moveq		r5, #0</div><div class='del'>-	addeq		r2, r3, #96</div><div class='del'>-	add		r6, r3, #144</div><div class='del'>-	add		r7, r3, #288</div><div class='del'>-	vld1.8		{d0-d1}, [r6, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r6, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r6, : 64]</div><div class='del'>-	vst1.8		{d0-d1}, [r7, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r7, : 128]!</div><div class='del'>-	vst1.8		d4, [r7, : 64]</div><div class='del'>-	cmp		r5, #0</div><div class='del'>-	beq		.Lskipsquaringloop</div><div class='del'>-.Lsquaringloop:</div><div class='del'>-	add		r6, r3, #288</div><div class='del'>-	add		r7, r3, #288</div><div class='del'>-	add		r8, r3, #288</div><div class='del'>-	vmov.i32	q0, #19</div><div class='del'>-	vmov.i32	q1, #0</div><div class='del'>-	vmov.i32	q2, #1</div><div class='del'>-	vzip.i32	q1, q2</div><div class='del'>-	vld1.8		{d4-d5}, [r7, : 128]!</div><div class='del'>-	vld1.8		{d6-d7}, [r7, : 128]!</div><div class='del'>-	vld1.8		{d9}, [r7, : 64]</div><div class='del'>-	vld1.8		{d10-d11}, [r6, : 128]!</div><div class='del'>-	add		r7, sp, #384</div><div class='del'>-	vld1.8		{d12-d13}, [r6, : 128]!</div><div class='del'>-	vmul.i32	q7, q2, q0</div><div class='del'>-	vld1.8		{d8}, [r6, : 64]</div><div class='del'>-	vext.32		d17, d11, d10, #1</div><div class='del'>-	vmul.i32	q9, q3, q0</div><div class='del'>-	vext.32		d16, d10, d8, #1</div><div class='del'>-	vshl.u32	q10, q5, q1</div><div class='del'>-	vext.32		d22, d14, d4, #1</div><div class='del'>-	vext.32		d24, d18, d6, #1</div><div class='del'>-	vshl.u32	q13, q6, q1</div><div class='del'>-	vshl.u32	d28, d8, d2</div><div class='del'>-	vrev64.i32	d22, d22</div><div class='del'>-	vmul.i32	d1, d9, d1</div><div class='del'>-	vrev64.i32	d24, d24</div><div class='del'>-	vext.32		d29, d8, d13, #1</div><div class='del'>-	vext.32		d0, d1, d9, #1</div><div class='del'>-	vrev64.i32	d0, d0</div><div class='del'>-	vext.32		d2, d9, d1, #1</div><div class='del'>-	vext.32		d23, d15, d5, #1</div><div class='del'>-	vmull.s32	q4, d20, d4</div><div class='del'>-	vrev64.i32	d23, d23</div><div class='del'>-	vmlal.s32	q4, d21, d1</div><div class='del'>-	vrev64.i32	d2, d2</div><div class='del'>-	vmlal.s32	q4, d26, d19</div><div class='del'>-	vext.32		d3, d5, d15, #1</div><div class='del'>-	vmlal.s32	q4, d27, d18</div><div class='del'>-	vrev64.i32	d3, d3</div><div class='del'>-	vmlal.s32	q4, d28, d15</div><div class='del'>-	vext.32		d14, d12, d11, #1</div><div class='del'>-	vmull.s32	q5, d16, d23</div><div class='del'>-	vext.32		d15, d13, d12, #1</div><div class='del'>-	vmlal.s32	q5, d17, d4</div><div class='del'>-	vst1.8		d8, [r7, : 64]!</div><div class='del'>-	vmlal.s32	q5, d14, d1</div><div class='del'>-	vext.32		d12, d9, d8, #0</div><div class='del'>-	vmlal.s32	q5, d15, d19</div><div class='del'>-	vmov.i64	d13, #0</div><div class='del'>-	vmlal.s32	q5, d29, d18</div><div class='del'>-	vext.32		d25, d19, d7, #1</div><div class='del'>-	vmlal.s32	q6, d20, d5</div><div class='del'>-	vrev64.i32	d25, d25</div><div class='del'>-	vmlal.s32	q6, d21, d4</div><div class='del'>-	vst1.8		d11, [r7, : 64]!</div><div class='del'>-	vmlal.s32	q6, d26, d1</div><div class='del'>-	vext.32		d9, d10, d10, #0</div><div class='del'>-	vmlal.s32	q6, d27, d19</div><div class='del'>-	vmov.i64	d8, #0</div><div class='del'>-	vmlal.s32	q6, d28, d18</div><div class='del'>-	vmlal.s32	q4, d16, d24</div><div class='del'>-	vmlal.s32	q4, d17, d5</div><div class='del'>-	vmlal.s32	q4, d14, d4</div><div class='del'>-	vst1.8		d12, [r7, : 64]!</div><div class='del'>-	vmlal.s32	q4, d15, d1</div><div class='del'>-	vext.32		d10, d13, d12, #0</div><div class='del'>-	vmlal.s32	q4, d29, d19</div><div class='del'>-	vmov.i64	d11, #0</div><div class='del'>-	vmlal.s32	q5, d20, d6</div><div class='del'>-	vmlal.s32	q5, d21, d5</div><div class='del'>-	vmlal.s32	q5, d26, d4</div><div class='del'>-	vext.32		d13, d8, d8, #0</div><div class='del'>-	vmlal.s32	q5, d27, d1</div><div class='del'>-	vmov.i64	d12, #0</div><div class='del'>-	vmlal.s32	q5, d28, d19</div><div class='del'>-	vst1.8		d9, [r7, : 64]!</div><div class='del'>-	vmlal.s32	q6, d16, d25</div><div class='del'>-	vmlal.s32	q6, d17, d6</div><div class='del'>-	vst1.8		d10, [r7, : 64]</div><div class='del'>-	vmlal.s32	q6, d14, d5</div><div class='del'>-	vext.32		d8, d11, d10, #0</div><div class='del'>-	vmlal.s32	q6, d15, d4</div><div class='del'>-	vmov.i64	d9, #0</div><div class='del'>-	vmlal.s32	q6, d29, d1</div><div class='del'>-	vmlal.s32	q4, d20, d7</div><div class='del'>-	vmlal.s32	q4, d21, d6</div><div class='del'>-	vmlal.s32	q4, d26, d5</div><div class='del'>-	vext.32		d11, d12, d12, #0</div><div class='del'>-	vmlal.s32	q4, d27, d4</div><div class='del'>-	vmov.i64	d10, #0</div><div class='del'>-	vmlal.s32	q4, d28, d1</div><div class='del'>-	vmlal.s32	q5, d16, d0</div><div class='del'>-	sub		r6, r7, #32</div><div class='del'>-	vmlal.s32	q5, d17, d7</div><div class='del'>-	vmlal.s32	q5, d14, d6</div><div class='del'>-	vext.32		d30, d9, d8, #0</div><div class='del'>-	vmlal.s32	q5, d15, d5</div><div class='del'>-	vld1.8		{d31}, [r6, : 64]!</div><div class='del'>-	vmlal.s32	q5, d29, d4</div><div class='del'>-	vmlal.s32	q15, d20, d0</div><div class='del'>-	vext.32		d0, d6, d18, #1</div><div class='del'>-	vmlal.s32	q15, d21, d25</div><div class='del'>-	vrev64.i32	d0, d0</div><div class='del'>-	vmlal.s32	q15, d26, d24</div><div class='del'>-	vext.32		d1, d7, d19, #1</div><div class='del'>-	vext.32		d7, d10, d10, #0</div><div class='del'>-	vmlal.s32	q15, d27, d23</div><div class='del'>-	vrev64.i32	d1, d1</div><div class='del'>-	vld1.8		{d6}, [r6, : 64]</div><div class='del'>-	vmlal.s32	q15, d28, d22</div><div class='del'>-	vmlal.s32	q3, d16, d4</div><div class='del'>-	add		r6, r6, #24</div><div class='del'>-	vmlal.s32	q3, d17, d2</div><div class='del'>-	vext.32		d4, d31, d30, #0</div><div class='del'>-	vmov		d17, d11</div><div class='del'>-	vmlal.s32	q3, d14, d1</div><div class='del'>-	vext.32		d11, d13, d13, #0</div><div class='del'>-	vext.32		d13, d30, d30, #0</div><div class='del'>-	vmlal.s32	q3, d15, d0</div><div class='del'>-	vext.32		d1, d8, d8, #0</div><div class='del'>-	vmlal.s32	q3, d29, d3</div><div class='del'>-	vld1.8		{d5}, [r6, : 64]</div><div class='del'>-	sub		r6, r6, #16</div><div class='del'>-	vext.32		d10, d6, d6, #0</div><div class='del'>-	vmov.i32	q1, #0xffffffff</div><div class='del'>-	vshl.i64	q4, q1, #25</div><div class='del'>-	add		r7, sp, #480</div><div class='del'>-	vld1.8		{d14-d15}, [r7, : 128]</div><div class='del'>-	vadd.i64	q9, q2, q7</div><div class='del'>-	vshl.i64	q1, q1, #26</div><div class='del'>-	vshr.s64	q10, q9, #26</div><div class='del'>-	vld1.8		{d0}, [r6, : 64]!</div><div class='del'>-	vadd.i64	q5, q5, q10</div><div class='del'>-	vand		q9, q9, q1</div><div class='del'>-	vld1.8		{d16}, [r6, : 64]!</div><div class='del'>-	add		r6, sp, #496</div><div class='del'>-	vld1.8		{d20-d21}, [r6, : 128]</div><div class='del'>-	vadd.i64	q11, q5, q10</div><div class='del'>-	vsub.i64	q2, q2, q9</div><div class='del'>-	vshr.s64	q9, q11, #25</div><div class='del'>-	vext.32		d12, d5, d4, #0</div><div class='del'>-	vand		q11, q11, q4</div><div class='del'>-	vadd.i64	q0, q0, q9</div><div class='del'>-	vmov		d19, d7</div><div class='del'>-	vadd.i64	q3, q0, q7</div><div class='del'>-	vsub.i64	q5, q5, q11</div><div class='del'>-	vshr.s64	q11, q3, #26</div><div class='del'>-	vext.32		d18, d11, d10, #0</div><div class='del'>-	vand		q3, q3, q1</div><div class='del'>-	vadd.i64	q8, q8, q11</div><div class='del'>-	vadd.i64	q11, q8, q10</div><div class='del'>-	vsub.i64	q0, q0, q3</div><div class='del'>-	vshr.s64	q3, q11, #25</div><div class='del'>-	vand		q11, q11, q4</div><div class='del'>-	vadd.i64	q3, q6, q3</div><div class='del'>-	vadd.i64	q6, q3, q7</div><div class='del'>-	vsub.i64	q8, q8, q11</div><div class='del'>-	vshr.s64	q11, q6, #26</div><div class='del'>-	vand		q6, q6, q1</div><div class='del'>-	vadd.i64	q9, q9, q11</div><div class='del'>-	vadd.i64	d25, d19, d21</div><div class='del'>-	vsub.i64	q3, q3, q6</div><div class='del'>-	vshr.s64	d23, d25, #25</div><div class='del'>-	vand		q4, q12, q4</div><div class='del'>-	vadd.i64	d21, d23, d23</div><div class='del'>-	vshl.i64	d25, d23, #4</div><div class='del'>-	vadd.i64	d21, d21, d23</div><div class='del'>-	vadd.i64	d25, d25, d21</div><div class='del'>-	vadd.i64	d4, d4, d25</div><div class='del'>-	vzip.i32	q0, q8</div><div class='del'>-	vadd.i64	d12, d4, d14</div><div class='del'>-	add		r6, r8, #8</div><div class='del'>-	vst1.8		d0, [r6, : 64]</div><div class='del'>-	vsub.i64	d19, d19, d9</div><div class='del'>-	add		r6, r6, #16</div><div class='del'>-	vst1.8		d16, [r6, : 64]</div><div class='del'>-	vshr.s64	d22, d12, #26</div><div class='del'>-	vand		q0, q6, q1</div><div class='del'>-	vadd.i64	d10, d10, d22</div><div class='del'>-	vzip.i32	q3, q9</div><div class='del'>-	vsub.i64	d4, d4, d0</div><div class='del'>-	sub		r6, r6, #8</div><div class='del'>-	vst1.8		d6, [r6, : 64]</div><div class='del'>-	add		r6, r6, #16</div><div class='del'>-	vst1.8		d18, [r6, : 64]</div><div class='del'>-	vzip.i32	q2, q5</div><div class='del'>-	sub		r6, r6, #32</div><div class='del'>-	vst1.8		d4, [r6, : 64]</div><div class='del'>-	subs		r5, r5, #1</div><div class='del'>-	bhi		.Lsquaringloop</div><div class='del'>-.Lskipsquaringloop:</div><div class='del'>-	mov		r2, r2</div><div class='del'>-	add		r5, r3, #288</div><div class='del'>-	add		r6, r3, #144</div><div class='del'>-	vmov.i32	q0, #19</div><div class='del'>-	vmov.i32	q1, #0</div><div class='del'>-	vmov.i32	q2, #1</div><div class='del'>-	vzip.i32	q1, q2</div><div class='del'>-	vld1.8		{d4-d5}, [r5, : 128]!</div><div class='del'>-	vld1.8		{d6-d7}, [r5, : 128]!</div><div class='del'>-	vld1.8		{d9}, [r5, : 64]</div><div class='del'>-	vld1.8		{d10-d11}, [r2, : 128]!</div><div class='del'>-	add		r5, sp, #384</div><div class='del'>-	vld1.8		{d12-d13}, [r2, : 128]!</div><div class='del'>-	vmul.i32	q7, q2, q0</div><div class='del'>-	vld1.8		{d8}, [r2, : 64]</div><div class='del'>-	vext.32		d17, d11, d10, #1</div><div class='del'>-	vmul.i32	q9, q3, q0</div><div class='del'>-	vext.32		d16, d10, d8, #1</div><div class='del'>-	vshl.u32	q10, q5, q1</div><div class='del'>-	vext.32		d22, d14, d4, #1</div><div class='del'>-	vext.32		d24, d18, d6, #1</div><div class='del'>-	vshl.u32	q13, q6, q1</div><div class='del'>-	vshl.u32	d28, d8, d2</div><div class='del'>-	vrev64.i32	d22, d22</div><div class='del'>-	vmul.i32	d1, d9, d1</div><div class='del'>-	vrev64.i32	d24, d24</div><div class='del'>-	vext.32		d29, d8, d13, #1</div><div class='del'>-	vext.32		d0, d1, d9, #1</div><div class='del'>-	vrev64.i32	d0, d0</div><div class='del'>-	vext.32		d2, d9, d1, #1</div><div class='del'>-	vext.32		d23, d15, d5, #1</div><div class='del'>-	vmull.s32	q4, d20, d4</div><div class='del'>-	vrev64.i32	d23, d23</div><div class='del'>-	vmlal.s32	q4, d21, d1</div><div class='del'>-	vrev64.i32	d2, d2</div><div class='del'>-	vmlal.s32	q4, d26, d19</div><div class='del'>-	vext.32		d3, d5, d15, #1</div><div class='del'>-	vmlal.s32	q4, d27, d18</div><div class='del'>-	vrev64.i32	d3, d3</div><div class='del'>-	vmlal.s32	q4, d28, d15</div><div class='del'>-	vext.32		d14, d12, d11, #1</div><div class='del'>-	vmull.s32	q5, d16, d23</div><div class='del'>-	vext.32		d15, d13, d12, #1</div><div class='del'>-	vmlal.s32	q5, d17, d4</div><div class='del'>-	vst1.8		d8, [r5, : 64]!</div><div class='del'>-	vmlal.s32	q5, d14, d1</div><div class='del'>-	vext.32		d12, d9, d8, #0</div><div class='del'>-	vmlal.s32	q5, d15, d19</div><div class='del'>-	vmov.i64	d13, #0</div><div class='del'>-	vmlal.s32	q5, d29, d18</div><div class='del'>-	vext.32		d25, d19, d7, #1</div><div class='del'>-	vmlal.s32	q6, d20, d5</div><div class='del'>-	vrev64.i32	d25, d25</div><div class='del'>-	vmlal.s32	q6, d21, d4</div><div class='del'>-	vst1.8		d11, [r5, : 64]!</div><div class='del'>-	vmlal.s32	q6, d26, d1</div><div class='del'>-	vext.32		d9, d10, d10, #0</div><div class='del'>-	vmlal.s32	q6, d27, d19</div><div class='del'>-	vmov.i64	d8, #0</div><div class='del'>-	vmlal.s32	q6, d28, d18</div><div class='del'>-	vmlal.s32	q4, d16, d24</div><div class='del'>-	vmlal.s32	q4, d17, d5</div><div class='del'>-	vmlal.s32	q4, d14, d4</div><div class='del'>-	vst1.8		d12, [r5, : 64]!</div><div class='del'>-	vmlal.s32	q4, d15, d1</div><div class='del'>-	vext.32		d10, d13, d12, #0</div><div class='del'>-	vmlal.s32	q4, d29, d19</div><div class='del'>-	vmov.i64	d11, #0</div><div class='del'>-	vmlal.s32	q5, d20, d6</div><div class='del'>-	vmlal.s32	q5, d21, d5</div><div class='del'>-	vmlal.s32	q5, d26, d4</div><div class='del'>-	vext.32		d13, d8, d8, #0</div><div class='del'>-	vmlal.s32	q5, d27, d1</div><div class='del'>-	vmov.i64	d12, #0</div><div class='del'>-	vmlal.s32	q5, d28, d19</div><div class='del'>-	vst1.8		d9, [r5, : 64]!</div><div class='del'>-	vmlal.s32	q6, d16, d25</div><div class='del'>-	vmlal.s32	q6, d17, d6</div><div class='del'>-	vst1.8		d10, [r5, : 64]</div><div class='del'>-	vmlal.s32	q6, d14, d5</div><div class='del'>-	vext.32		d8, d11, d10, #0</div><div class='del'>-	vmlal.s32	q6, d15, d4</div><div class='del'>-	vmov.i64	d9, #0</div><div class='del'>-	vmlal.s32	q6, d29, d1</div><div class='del'>-	vmlal.s32	q4, d20, d7</div><div class='del'>-	vmlal.s32	q4, d21, d6</div><div class='del'>-	vmlal.s32	q4, d26, d5</div><div class='del'>-	vext.32		d11, d12, d12, #0</div><div class='del'>-	vmlal.s32	q4, d27, d4</div><div class='del'>-	vmov.i64	d10, #0</div><div class='del'>-	vmlal.s32	q4, d28, d1</div><div class='del'>-	vmlal.s32	q5, d16, d0</div><div class='del'>-	sub		r2, r5, #32</div><div class='del'>-	vmlal.s32	q5, d17, d7</div><div class='del'>-	vmlal.s32	q5, d14, d6</div><div class='del'>-	vext.32		d30, d9, d8, #0</div><div class='del'>-	vmlal.s32	q5, d15, d5</div><div class='del'>-	vld1.8		{d31}, [r2, : 64]!</div><div class='del'>-	vmlal.s32	q5, d29, d4</div><div class='del'>-	vmlal.s32	q15, d20, d0</div><div class='del'>-	vext.32		d0, d6, d18, #1</div><div class='del'>-	vmlal.s32	q15, d21, d25</div><div class='del'>-	vrev64.i32	d0, d0</div><div class='del'>-	vmlal.s32	q15, d26, d24</div><div class='del'>-	vext.32		d1, d7, d19, #1</div><div class='del'>-	vext.32		d7, d10, d10, #0</div><div class='del'>-	vmlal.s32	q15, d27, d23</div><div class='del'>-	vrev64.i32	d1, d1</div><div class='del'>-	vld1.8		{d6}, [r2, : 64]</div><div class='del'>-	vmlal.s32	q15, d28, d22</div><div class='del'>-	vmlal.s32	q3, d16, d4</div><div class='del'>-	add		r2, r2, #24</div><div class='del'>-	vmlal.s32	q3, d17, d2</div><div class='del'>-	vext.32		d4, d31, d30, #0</div><div class='del'>-	vmov		d17, d11</div><div class='del'>-	vmlal.s32	q3, d14, d1</div><div class='del'>-	vext.32		d11, d13, d13, #0</div><div class='del'>-	vext.32		d13, d30, d30, #0</div><div class='del'>-	vmlal.s32	q3, d15, d0</div><div class='del'>-	vext.32		d1, d8, d8, #0</div><div class='del'>-	vmlal.s32	q3, d29, d3</div><div class='del'>-	vld1.8		{d5}, [r2, : 64]</div><div class='del'>-	sub		r2, r2, #16</div><div class='del'>-	vext.32		d10, d6, d6, #0</div><div class='del'>-	vmov.i32	q1, #0xffffffff</div><div class='del'>-	vshl.i64	q4, q1, #25</div><div class='del'>-	add		r5, sp, #480</div><div class='del'>-	vld1.8		{d14-d15}, [r5, : 128]</div><div class='del'>-	vadd.i64	q9, q2, q7</div><div class='del'>-	vshl.i64	q1, q1, #26</div><div class='del'>-	vshr.s64	q10, q9, #26</div><div class='del'>-	vld1.8		{d0}, [r2, : 64]!</div><div class='del'>-	vadd.i64	q5, q5, q10</div><div class='del'>-	vand		q9, q9, q1</div><div class='del'>-	vld1.8		{d16}, [r2, : 64]!</div><div class='del'>-	add		r2, sp, #496</div><div class='del'>-	vld1.8		{d20-d21}, [r2, : 128]</div><div class='del'>-	vadd.i64	q11, q5, q10</div><div class='del'>-	vsub.i64	q2, q2, q9</div><div class='del'>-	vshr.s64	q9, q11, #25</div><div class='del'>-	vext.32		d12, d5, d4, #0</div><div class='del'>-	vand		q11, q11, q4</div><div class='del'>-	vadd.i64	q0, q0, q9</div><div class='del'>-	vmov		d19, d7</div><div class='del'>-	vadd.i64	q3, q0, q7</div><div class='del'>-	vsub.i64	q5, q5, q11</div><div class='del'>-	vshr.s64	q11, q3, #26</div><div class='del'>-	vext.32		d18, d11, d10, #0</div><div class='del'>-	vand		q3, q3, q1</div><div class='del'>-	vadd.i64	q8, q8, q11</div><div class='del'>-	vadd.i64	q11, q8, q10</div><div class='del'>-	vsub.i64	q0, q0, q3</div><div class='del'>-	vshr.s64	q3, q11, #25</div><div class='del'>-	vand		q11, q11, q4</div><div class='del'>-	vadd.i64	q3, q6, q3</div><div class='del'>-	vadd.i64	q6, q3, q7</div><div class='del'>-	vsub.i64	q8, q8, q11</div><div class='del'>-	vshr.s64	q11, q6, #26</div><div class='del'>-	vand		q6, q6, q1</div><div class='del'>-	vadd.i64	q9, q9, q11</div><div class='del'>-	vadd.i64	d25, d19, d21</div><div class='del'>-	vsub.i64	q3, q3, q6</div><div class='del'>-	vshr.s64	d23, d25, #25</div><div class='del'>-	vand		q4, q12, q4</div><div class='del'>-	vadd.i64	d21, d23, d23</div><div class='del'>-	vshl.i64	d25, d23, #4</div><div class='del'>-	vadd.i64	d21, d21, d23</div><div class='del'>-	vadd.i64	d25, d25, d21</div><div class='del'>-	vadd.i64	d4, d4, d25</div><div class='del'>-	vzip.i32	q0, q8</div><div class='del'>-	vadd.i64	d12, d4, d14</div><div class='del'>-	add		r2, r6, #8</div><div class='del'>-	vst1.8		d0, [r2, : 64]</div><div class='del'>-	vsub.i64	d19, d19, d9</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vst1.8		d16, [r2, : 64]</div><div class='del'>-	vshr.s64	d22, d12, #26</div><div class='del'>-	vand		q0, q6, q1</div><div class='del'>-	vadd.i64	d10, d10, d22</div><div class='del'>-	vzip.i32	q3, q9</div><div class='del'>-	vsub.i64	d4, d4, d0</div><div class='del'>-	sub		r2, r2, #8</div><div class='del'>-	vst1.8		d6, [r2, : 64]</div><div class='del'>-	add		r2, r2, #16</div><div class='del'>-	vst1.8		d18, [r2, : 64]</div><div class='del'>-	vzip.i32	q2, q5</div><div class='del'>-	sub		r2, r2, #32</div><div class='del'>-	vst1.8		d4, [r2, : 64]</div><div class='del'>-	cmp		r4, #0</div><div class='del'>-	beq		.Lskippostcopy</div><div class='del'>-	add		r2, r3, #144</div><div class='del'>-	mov		r4, r4</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r2, : 64]</div><div class='del'>-	vst1.8		{d0-d1}, [r4, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vst1.8		d4, [r4, : 64]</div><div class='del'>-.Lskippostcopy:</div><div class='del'>-	cmp		r1, #1</div><div class='del'>-	bne		.Lskipfinalcopy</div><div class='del'>-	add		r2, r3, #288</div><div class='del'>-	add		r4, r3, #144</div><div class='del'>-	vld1.8		{d0-d1}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d2-d3}, [r2, : 128]!</div><div class='del'>-	vld1.8		{d4}, [r2, : 64]</div><div class='del'>-	vst1.8		{d0-d1}, [r4, : 128]!</div><div class='del'>-	vst1.8		{d2-d3}, [r4, : 128]!</div><div class='del'>-	vst1.8		d4, [r4, : 64]</div><div class='del'>-.Lskipfinalcopy:</div><div class='del'>-	add		r1, r1, #1</div><div class='del'>-	cmp		r1, #12</div><div class='del'>-	blo		.Linvertloop</div><div class='del'>-	add		r1, r3, #144</div><div class='del'>-	ldr		r2, [r1], #4</div><div class='del'>-	ldr		r3, [r1], #4</div><div class='del'>-	ldr		r4, [r1], #4</div><div class='del'>-	ldr		r5, [r1], #4</div><div class='del'>-	ldr		r6, [r1], #4</div><div class='del'>-	ldr		r7, [r1], #4</div><div class='del'>-	ldr		r8, [r1], #4</div><div class='del'>-	ldr		r9, [r1], #4</div><div class='del'>-	ldr		r10, [r1], #4</div><div class='del'>-	ldr		r1, [r1]</div><div class='del'>-	add		r11, r1, r1, LSL #4</div><div class='del'>-	add		r11, r11, r1, LSL #1</div><div class='del'>-	add		r11, r11, #16777216</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r11, r11, r2</div><div class='del'>-	mov		r11, r11, ASR #26</div><div class='del'>-	add		r11, r11, r3</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r11, r11, r4</div><div class='del'>-	mov		r11, r11, ASR #26</div><div class='del'>-	add		r11, r11, r5</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r11, r11, r6</div><div class='del'>-	mov		r11, r11, ASR #26</div><div class='del'>-	add		r11, r11, r7</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r11, r11, r8</div><div class='del'>-	mov		r11, r11, ASR #26</div><div class='del'>-	add		r11, r11, r9</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r11, r11, r10</div><div class='del'>-	mov		r11, r11, ASR #26</div><div class='del'>-	add		r11, r11, r1</div><div class='del'>-	mov		r11, r11, ASR #25</div><div class='del'>-	add		r2, r2, r11</div><div class='del'>-	add		r2, r2, r11, LSL #1</div><div class='del'>-	add		r2, r2, r11, LSL #4</div><div class='del'>-	mov		r11, r2, ASR #26</div><div class='del'>-	add		r3, r3, r11</div><div class='del'>-	sub		r2, r2, r11, LSL #26</div><div class='del'>-	mov		r11, r3, ASR #25</div><div class='del'>-	add		r4, r4, r11</div><div class='del'>-	sub		r3, r3, r11, LSL #25</div><div class='del'>-	mov		r11, r4, ASR #26</div><div class='del'>-	add		r5, r5, r11</div><div class='del'>-	sub		r4, r4, r11, LSL #26</div><div class='del'>-	mov		r11, r5, ASR #25</div><div class='del'>-	add		r6, r6, r11</div><div class='del'>-	sub		r5, r5, r11, LSL #25</div><div class='del'>-	mov		r11, r6, ASR #26</div><div class='del'>-	add		r7, r7, r11</div><div class='del'>-	sub		r6, r6, r11, LSL #26</div><div class='del'>-	mov		r11, r7, ASR #25</div><div class='del'>-	add		r8, r8, r11</div><div class='del'>-	sub		r7, r7, r11, LSL #25</div><div class='del'>-	mov		r11, r8, ASR #26</div><div class='del'>-	add		r9, r9, r11</div><div class='del'>-	sub		r8, r8, r11, LSL #26</div><div class='del'>-	mov		r11, r9, ASR #25</div><div class='del'>-	add		r10, r10, r11</div><div class='del'>-	sub		r9, r9, r11, LSL #25</div><div class='del'>-	mov		r11, r10, ASR #26</div><div class='del'>-	add		r1, r1, r11</div><div class='del'>-	sub		r10, r10, r11, LSL #26</div><div class='del'>-	mov		r11, r1, ASR #25</div><div class='del'>-	sub		r1, r1, r11, LSL #25</div><div class='del'>-	add		r2, r2, r3, LSL #26</div><div class='del'>-	mov		r3, r3, LSR #6</div><div class='del'>-	add		r3, r3, r4, LSL #19</div><div class='del'>-	mov		r4, r4, LSR #13</div><div class='del'>-	add		r4, r4, r5, LSL #13</div><div class='del'>-	mov		r5, r5, LSR #19</div><div class='del'>-	add		r5, r5, r6, LSL #6</div><div class='del'>-	add		r6, r7, r8, LSL #25</div><div class='del'>-	mov		r7, r8, LSR #7</div><div class='del'>-	add		r7, r7, r9, LSL #19</div><div class='del'>-	mov		r8, r9, LSR #13</div><div class='del'>-	add		r8, r8, r10, LSL #12</div><div class='del'>-	mov		r9, r10, LSR #20</div><div class='del'>-	add		r1, r9, r1, LSL #6</div><div class='del'>-	str		r2, [r0]</div><div class='del'>-	str		r3, [r0, #4]</div><div class='del'>-	str		r4, [r0, #8]</div><div class='del'>-	str		r5, [r0, #12]</div><div class='del'>-	str		r6, [r0, #16]</div><div class='del'>-	str		r7, [r0, #20]</div><div class='del'>-	str		r8, [r0, #24]</div><div class='del'>-	str		r1, [r0, #28]</div><div class='del'>-	movw		r0, #0</div><div class='del'>-	mov		sp, ip</div><div class='del'>-	pop		{r4-r11, pc}</div><div class='del'>-ENDPROC(curve25519_neon)</div><div class='head'>diff --git a/arch/arm/crypto/curve25519-glue.c b/arch/arm/crypto/curve25519-glue.c<br/>deleted file mode 100644<br/>index e7b87e09dd99..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/curve25519-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/curve25519-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * Based on public domain code from Daniel J. Bernstein and Peter Schwabe. This</div><div class='del'>- * began from SUPERCOP's curve25519/neon2/scalarmult.s, but has subsequently been</div><div class='del'>- * manually reworked for use in kernel space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/kpp.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;crypto/curve25519.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void curve25519_neon(u8 mypublic[CURVE25519_KEY_SIZE],</div><div class='del'>-				const u8 secret[CURVE25519_KEY_SIZE],</div><div class='del'>-				const u8 basepoint[CURVE25519_KEY_SIZE]);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-void curve25519_arch(u8 out[CURVE25519_KEY_SIZE],</div><div class='del'>-		     const u8 scalar[CURVE25519_KEY_SIZE],</div><div class='del'>-		     const u8 point[CURVE25519_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		curve25519_neon(out, scalar, point);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		curve25519_generic(out, scalar, point);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(curve25519_arch);</div><div class='del'>-</div><div class='del'>-void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],</div><div class='del'>-			  const u8 secret[CURVE25519_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	return curve25519_arch(pub, secret, curve25519_base_point);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(curve25519_base_arch);</div><div class='del'>-</div><div class='del'>-static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u8 *secret = kpp_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	if (!len)</div><div class='del'>-		curve25519_generate_secret(secret);</div><div class='del'>-	else if (len == CURVE25519_KEY_SIZE &amp;&amp;</div><div class='del'>-		 crypto_memneq(buf, curve25519_null_point, CURVE25519_KEY_SIZE))</div><div class='del'>-		memcpy(secret, buf, CURVE25519_KEY_SIZE);</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int curve25519_compute_value(struct kpp_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);</div><div class='del'>-	const u8 *secret = kpp_tfm_ctx(tfm);</div><div class='del'>-	u8 public_key[CURVE25519_KEY_SIZE];</div><div class='del'>-	u8 buf[CURVE25519_KEY_SIZE];</div><div class='del'>-	int copied, nbytes;</div><div class='del'>-	u8 const *bp;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;src) {</div><div class='del'>-		copied = sg_copy_to_buffer(req-&gt;src,</div><div class='del'>-					   sg_nents_for_len(req-&gt;src,</div><div class='del'>-							    CURVE25519_KEY_SIZE),</div><div class='del'>-					   public_key, CURVE25519_KEY_SIZE);</div><div class='del'>-		if (copied != CURVE25519_KEY_SIZE)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		bp = public_key;</div><div class='del'>-	} else {</div><div class='del'>-		bp = curve25519_base_point;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	curve25519_arch(buf, secret, bp);</div><div class='del'>-</div><div class='del'>-	/* might want less than we've got */</div><div class='del'>-	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req-&gt;dst_len);</div><div class='del'>-	copied = sg_copy_from_buffer(req-&gt;dst, sg_nents_for_len(req-&gt;dst,</div><div class='del'>-								nbytes),</div><div class='del'>-				     buf, nbytes);</div><div class='del'>-	if (copied != nbytes)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int curve25519_max_size(struct crypto_kpp *tfm)</div><div class='del'>-{</div><div class='del'>-	return CURVE25519_KEY_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct kpp_alg curve25519_alg = {</div><div class='del'>-	.base.cra_name		= "curve25519",</div><div class='del'>-	.base.cra_driver_name	= "curve25519-neon",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_ctxsize	= CURVE25519_KEY_SIZE,</div><div class='del'>-</div><div class='del'>-	.set_secret		= curve25519_set_secret,</div><div class='del'>-	.generate_public_key	= curve25519_compute_value,</div><div class='del'>-	.compute_shared_secret	= curve25519_compute_value,</div><div class='del'>-	.max_size		= curve25519_max_size,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init arm_curve25519_init(void)</div><div class='del'>-{</div><div class='del'>-	if (elf_hwcap &amp; HWCAP_NEON) {</div><div class='del'>-		static_branch_enable(&amp;have_neon);</div><div class='del'>-		return IS_REACHABLE(CONFIG_CRYPTO_KPP) ?</div><div class='del'>-			crypto_register_kpp(&amp;curve25519_alg) : 0;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit arm_curve25519_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_KPP) &amp;&amp; elf_hwcap &amp; HWCAP_NEON)</div><div class='del'>-		crypto_unregister_kpp(&amp;curve25519_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(arm_curve25519_init);</div><div class='del'>-module_exit(arm_curve25519_exit);</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("curve25519");</div><div class='del'>-MODULE_ALIAS_CRYPTO("curve25519-neon");</div><div class='del'>-MODULE_DESCRIPTION("Public key crypto: Curve25519 (NEON-accelerated)");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm/crypto/ghash-ce-glue.c b/arch/arm/crypto/ghash-ce-glue.c<br/>index 3af997082534..a52dcc8c1e33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/ghash-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/ghash-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/ghash-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/crypto/ghash-ce-glue.c</a></div><div class='hunk'>@@ -8,22 +8,22 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/gcm.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include &lt;crypto/cryptd.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("GHASH hash function using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ardb@kernel.org&gt;");</div><div class='hunk'>@@ -32,9 +32,6 @@ MODULE_ALIAS_CRYPTO("ghash");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("gcm(aes)");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("rfc4106(gcm(aes))");</div><div class='ctx'> </div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='del'>-</div><div class='ctx'> #define RFC4106_NONCE_SIZE	4</div><div class='ctx'> </div><div class='ctx'> struct ghash_key {</div><div class='hunk'>@@ -49,14 +46,8 @@ struct gcm_key {</div><div class='ctx'> 	u8	nonce[];	// for RFC4106 nonce</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='add'>+struct arm_ghash_desc_ctx {</div><div class='ctx'> 	u64 digest[GHASH_DIGEST_SIZE/sizeof(u64)];</div><div class='del'>-	u8 buf[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 count;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ghash_async_ctx {</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> asmlinkage void pmull_ghash_update_p64(int blocks, u64 dg[], const char *src,</div><div class='hunk'>@@ -69,94 +60,69 @@ static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_p64);</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='add'>+	*ctx = (struct arm_ghash_desc_ctx){};</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ghash_do_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 			    struct ghash_key *key, const char *head)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		if (static_branch_likely(&amp;use_p64))</div><div class='del'>-			pmull_ghash_update_p64(blocks, dg, src, key-&gt;h, head);</div><div class='del'>-		else</div><div class='del'>-			pmull_ghash_update_p8(blocks, dg, src, key-&gt;h, head);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		be128 dst = { cpu_to_be64(dg[1]), cpu_to_be64(dg[0]) };</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			const u8 *in = src;</div><div class='del'>-</div><div class='del'>-			if (head) {</div><div class='del'>-				in = head;</div><div class='del'>-				blocks++;</div><div class='del'>-				head = NULL;</div><div class='del'>-			} else {</div><div class='del'>-				src += GHASH_BLOCK_SIZE;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			crypto_xor((u8 *)&amp;dst, in, GHASH_BLOCK_SIZE);</div><div class='del'>-			gf128mul_lle(&amp;dst, &amp;key-&gt;k);</div><div class='del'>-		} while (--blocks);</div><div class='del'>-</div><div class='del'>-		dg[0] = be64_to_cpu(dst.b);</div><div class='del'>-		dg[1] = be64_to_cpu(dst.a);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	if (static_branch_likely(&amp;use_p64))</div><div class='add'>+		pmull_ghash_update_p64(blocks, dg, src, key-&gt;h, head);</div><div class='add'>+	else</div><div class='add'>+		pmull_ghash_update_p8(blocks, dg, src, key-&gt;h, head);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	int blocks;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= GHASH_BLOCK_SIZE) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-		int blocks;</div><div class='add'>+	blocks = len / GHASH_BLOCK_SIZE;</div><div class='add'>+	ghash_do_update(blocks, ctx-&gt;digest, src, key, NULL);</div><div class='add'>+	return len - blocks * GHASH_BLOCK_SIZE;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (partial) {</div><div class='del'>-			int p = GHASH_BLOCK_SIZE - partial;</div><div class='add'>+static int ghash_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	u8 *dst = out;</div><div class='ctx'> </div><div class='del'>-			memcpy(ctx-&gt;buf + partial, src, p);</div><div class='del'>-			src += p;</div><div class='del'>-			len -= p;</div><div class='del'>-		}</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		blocks = len / GHASH_BLOCK_SIZE;</div><div class='del'>-		len %= GHASH_BLOCK_SIZE;</div><div class='add'>+static int ghash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	const u8 *src = in;</div><div class='ctx'> </div><div class='del'>-		ghash_do_update(blocks, ctx-&gt;digest, src, key,</div><div class='del'>-				partial ? ctx-&gt;buf : NULL);</div><div class='del'>-		src += blocks * GHASH_BLOCK_SIZE;</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + partial, src, len);</div><div class='add'>+	ctx-&gt;digest[1] = get_unaligned_be64(src);</div><div class='add'>+	ctx-&gt;digest[0] = get_unaligned_be64(src + 8);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (partial) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		memset(ctx-&gt;buf + partial, 0, GHASH_BLOCK_SIZE - partial);</div><div class='del'>-		ghash_do_update(1, ctx-&gt;digest, ctx-&gt;buf, key, NULL);</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		ghash_do_update(1, ctx-&gt;digest, buf, key, NULL);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='del'>-</div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='del'>-	return 0;</div><div class='add'>+	return ghash_export(desc, dst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ghash_reflect(u64 h[], const be128 *k)</div><div class='hunk'>@@ -201,167 +167,22 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize		= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init			= ghash_init,</div><div class='ctx'> 	.update			= ghash_update,</div><div class='del'>-	.final			= ghash_final,</div><div class='add'>+	.finup			= ghash_finup,</div><div class='ctx'> 	.setkey			= ghash_setkey,</div><div class='del'>-	.descsize		= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.export			= ghash_export,</div><div class='add'>+	.import			= ghash_import,</div><div class='add'>+	.descsize		= sizeof(struct arm_ghash_desc_ctx),</div><div class='add'>+	.statesize		= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> </div><div class='ctx'> 	.base.cra_name		= "ghash",</div><div class='del'>-	.base.cra_driver_name	= "ghash-ce-sync",</div><div class='del'>-	.base.cra_priority	= 300 - 1,</div><div class='add'>+	.base.cra_driver_name	= "ghash-ce",</div><div class='add'>+	.base.cra_priority	= 300,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= GHASH_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct ghash_key) + sizeof(u64[2]),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ghash_async_init(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-	struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);</div><div class='del'>-</div><div class='del'>-	desc-&gt;tfm = child;</div><div class='del'>-	return crypto_shash_init(desc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_update(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		memcpy(cryptd_req, req, sizeof(*req));</div><div class='del'>-		ahash_request_set_tfm(cryptd_req, &amp;cryptd_tfm-&gt;base);</div><div class='del'>-		return crypto_ahash_update(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		return shash_ahash_update(req, desc);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_final(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		memcpy(cryptd_req, req, sizeof(*req));</div><div class='del'>-		ahash_request_set_tfm(cryptd_req, &amp;cryptd_tfm-&gt;base);</div><div class='del'>-		return crypto_ahash_final(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		return crypto_shash_final(desc, req-&gt;result);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_digest(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		memcpy(cryptd_req, req, sizeof(*req));</div><div class='del'>-		ahash_request_set_tfm(cryptd_req, &amp;cryptd_tfm-&gt;base);</div><div class='del'>-		return crypto_ahash_digest(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);</div><div class='del'>-</div><div class='del'>-		desc-&gt;tfm = child;</div><div class='del'>-		return shash_ahash_digest(req, desc);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_import(struct ahash_request *req, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-</div><div class='del'>-	desc-&gt;tfm = cryptd_ahash_child(ctx-&gt;cryptd_tfm);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_import(desc, in);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_export(struct ahash_request *req, void *out)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_export(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='del'>-			      unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct crypto_ahash *child = &amp;ctx-&gt;cryptd_tfm-&gt;base;</div><div class='del'>-</div><div class='del'>-	crypto_ahash_clear_flags(child, CRYPTO_TFM_REQ_MASK);</div><div class='del'>-	crypto_ahash_set_flags(child, crypto_ahash_get_flags(tfm)</div><div class='del'>-			       &amp; CRYPTO_TFM_REQ_MASK);</div><div class='del'>-	return crypto_ahash_setkey(child, key, keylen);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_init_tfm(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm;</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ahash("ghash-ce-sync", 0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ctx-&gt;cryptd_tfm = cryptd_tfm;</div><div class='del'>-	crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),</div><div class='del'>-				 sizeof(struct ahash_request) +</div><div class='del'>-				 crypto_ahash_reqsize(&amp;cryptd_tfm-&gt;base));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ghash_async_exit_tfm(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	cryptd_free_ahash(ctx-&gt;cryptd_tfm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ahash_alg ghash_async_alg = {</div><div class='del'>-	.init			= ghash_async_init,</div><div class='del'>-	.update			= ghash_async_update,</div><div class='del'>-	.final			= ghash_async_final,</div><div class='del'>-	.setkey			= ghash_async_setkey,</div><div class='del'>-	.digest			= ghash_async_digest,</div><div class='del'>-	.import			= ghash_async_import,</div><div class='del'>-	.export			= ghash_async_export,</div><div class='del'>-	.halg.digestsize	= GHASH_DIGEST_SIZE,</div><div class='del'>-	.halg.statesize		= sizeof(struct ghash_desc_ctx),</div><div class='del'>-	.halg.base		= {</div><div class='del'>-		.cra_name	= "ghash",</div><div class='del'>-		.cra_driver_name = "ghash-ce",</div><div class='del'>-		.cra_priority	= 300,</div><div class='del'>-		.cra_flags	= CRYPTO_ALG_ASYNC,</div><div class='del'>-		.cra_blocksize	= GHASH_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize	= sizeof(struct ghash_async_ctx),</div><div class='del'>-		.cra_module	= THIS_MODULE,</div><div class='del'>-		.cra_init	= ghash_async_init_tfm,</div><div class='del'>-		.cra_exit	= ghash_async_exit_tfm,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> void pmull_gcm_encrypt(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 		       struct gcm_key const *k, char *dst,</div><div class='ctx'> 		       const char *iv, int rounds, u32 counter);</div><div class='hunk'>@@ -459,17 +280,11 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u64 dg[], u32 len)</div><div class='ctx'> 	scatterwalk_start(&amp;walk, req-&gt;src);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		u32 n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		u8 *p;</div><div class='del'>-</div><div class='del'>-		if (!n) {</div><div class='del'>-			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='del'>-			n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		}</div><div class='add'>+		unsigned int n;</div><div class='ctx'> </div><div class='del'>-		p = scatterwalk_map(&amp;walk);</div><div class='del'>-		gcm_update_mac(dg, p, n, buf, &amp;buf_count, ctx);</div><div class='del'>-		scatterwalk_unmap(p);</div><div class='add'>+		n = scatterwalk_next(&amp;walk, len);</div><div class='add'>+		gcm_update_mac(dg, walk.addr, n, buf, &amp;buf_count, ctx);</div><div class='add'>+		scatterwalk_done_src(&amp;walk,  n);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(len / SZ_4K &gt; (len - n) / SZ_4K)) {</div><div class='ctx'> 			kernel_neon_end();</div><div class='hunk'>@@ -477,8 +292,6 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u64 dg[], u32 len)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		len -= n;</div><div class='del'>-		scatterwalk_advance(&amp;walk, n);</div><div class='del'>-		scatterwalk_done(&amp;walk, 0, len);</div><div class='ctx'> 	} while (len);</div><div class='ctx'> </div><div class='ctx'> 	if (buf_count) {</div><div class='hunk'>@@ -500,9 +313,6 @@ static int gcm_encrypt(struct aead_request *req, const u8 *iv, u32 assoclen)</div><div class='ctx'> 	u8 *tag, *dst;</div><div class='ctx'> 	int tail, err;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!may_use_simd()))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	err = skcipher_walk_aead_encrypt(&amp;walk, req, false);</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='hunk'>@@ -592,9 +402,6 @@ static int gcm_decrypt(struct aead_request *req, const u8 *iv, u32 assoclen)</div><div class='ctx'> 	u8 *tag, *dst;</div><div class='ctx'> 	int tail, err, ret;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!may_use_simd()))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	scatterwalk_map_and_copy(otag, req-&gt;src,</div><div class='ctx'> 				 req-&gt;assoclen + req-&gt;cryptlen - authsize,</div><div class='ctx'> 				 authsize, 0);</div><div class='hunk'>@@ -767,14 +574,9 @@ static int __init ghash_ce_mod_init(void)</div><div class='ctx'> 	err = crypto_register_shash(&amp;ghash_alg);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_aead;</div><div class='del'>-	err = crypto_register_ahash(&amp;ghash_async_alg);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_shash;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_shash:</div><div class='del'>-	crypto_unregister_shash(&amp;ghash_alg);</div><div class='ctx'> err_aead:</div><div class='ctx'> 	if (elf_hwcap2 &amp; HWCAP2_PMULL)</div><div class='ctx'> 		crypto_unregister_aeads(gcm_aes_algs,</div><div class='hunk'>@@ -784,7 +586,6 @@ err_aead:</div><div class='ctx'> </div><div class='ctx'> static void __exit ghash_ce_mod_exit(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_ahash(&amp;ghash_async_alg);</div><div class='ctx'> 	crypto_unregister_shash(&amp;ghash_alg);</div><div class='ctx'> 	if (elf_hwcap2 &amp; HWCAP2_PMULL)</div><div class='ctx'> 		crypto_unregister_aeads(gcm_aes_algs,</div><div class='head'>diff --git a/arch/arm/crypto/poly1305-armv4.pl b/arch/arm/crypto/poly1305-armv4.pl<br/>deleted file mode 100644<br/>index 6d79498d3115..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/poly1305-armv4.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/poly1305-armv4.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1236 +0,0 @@</div><div class='del'>-#!/usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause</div><div class='del'>-#</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov, @dot-asm, initially for the OpenSSL</div><div class='del'>-# project.</div><div class='del'>-# ====================================================================</div><div class='del'>-#</div><div class='del'>-#			IALU(*)/gcc-4.4		NEON</div><div class='del'>-#</div><div class='del'>-# ARM11xx(ARMv6)	7.78/+100%		-</div><div class='del'>-# Cortex-A5		6.35/+130%		3.00</div><div class='del'>-# Cortex-A8		6.25/+115%		2.36</div><div class='del'>-# Cortex-A9		5.10/+95%		2.55</div><div class='del'>-# Cortex-A15		3.85/+85%		1.25(**)</div><div class='del'>-# Snapdragon S4		5.70/+100%		1.48(**)</div><div class='del'>-#</div><div class='del'>-# (*)	this is for -march=armv6, i.e. with bunch of ldrb loading data;</div><div class='del'>-# (**)	these are trade-off results, they can be improved by ~8% but at</div><div class='del'>-#	the cost of 15/12% regression on Cortex-A5/A7, it's even possible</div><div class='del'>-#	to improve Cortex-A9 result, but then A5/A7 loose more than 20%;</div><div class='del'>-</div><div class='del'>-$flavour = shift;</div><div class='del'>-if ($flavour=~/\w[\w\-]*\.\w+$/) { $output=$flavour; undef $flavour; }</div><div class='del'>-else { while (($output=shift) &amp;&amp; ($output!~/\w[\w\-]*\.\w+$/)) {} }</div><div class='del'>-</div><div class='del'>-if ($flavour &amp;&amp; $flavour ne "void") {</div><div class='del'>-    $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;</div><div class='del'>-    ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or</div><div class='del'>-    ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or</div><div class='del'>-    die "can't locate arm-xlate.pl";</div><div class='del'>-</div><div class='del'>-    open STDOUT,"| \"$^X\" $xlate $flavour $output";</div><div class='del'>-} else {</div><div class='del'>-    open STDOUT,"&gt;$output";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-($ctx,$inp,$len,$padbit)=map("r$_",(0..3));</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-# include "arm_arch.h"</div><div class='del'>-#else</div><div class='del'>-# define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-# define __ARM_MAX_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-# define poly1305_init   poly1305_init_arm</div><div class='del'>-# define poly1305_blocks poly1305_blocks_arm</div><div class='del'>-# define poly1305_emit   poly1305_emit_arm</div><div class='del'>-.globl	poly1305_blocks_neon</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(__thumb2__)</div><div class='del'>-.syntax	unified</div><div class='del'>-.thumb</div><div class='del'>-#else</div><div class='del'>-.code	32</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.globl	poly1305_emit</div><div class='del'>-.globl	poly1305_blocks</div><div class='del'>-.globl	poly1305_init</div><div class='del'>-.type	poly1305_init,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_init:</div><div class='del'>-.Lpoly1305_init:</div><div class='del'>-	stmdb	sp!,{r4-r11}</div><div class='del'>-</div><div class='del'>-	eor	r3,r3,r3</div><div class='del'>-	cmp	$inp,#0</div><div class='del'>-	str	r3,[$ctx,#0]		@ zero hash value</div><div class='del'>-	str	r3,[$ctx,#4]</div><div class='del'>-	str	r3,[$ctx,#8]</div><div class='del'>-	str	r3,[$ctx,#12]</div><div class='del'>-	str	r3,[$ctx,#16]</div><div class='del'>-	str	r3,[$ctx,#36]		@ clear is_base2_26</div><div class='del'>-	add	$ctx,$ctx,#20</div><div class='del'>-</div><div class='del'>-#ifdef	__thumb2__</div><div class='del'>-	it	eq</div><div class='del'>-#endif</div><div class='del'>-	moveq	r0,#0</div><div class='del'>-	beq	.Lno_key</div><div class='del'>-</div><div class='del'>-#if	__ARM_MAX_ARCH__&gt;=7</div><div class='del'>-	mov	r3,#-1</div><div class='del'>-	str	r3,[$ctx,#28]		@ impossible key power value</div><div class='del'>-# ifndef __KERNEL__</div><div class='del'>-	adr	r11,.Lpoly1305_init</div><div class='del'>-	ldr	r12,.LOPENSSL_armcap</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	ldrb	r4,[$inp,#0]</div><div class='del'>-	mov	r10,#0x0fffffff</div><div class='del'>-	ldrb	r5,[$inp,#1]</div><div class='del'>-	and	r3,r10,#-4		@ 0x0ffffffc</div><div class='del'>-	ldrb	r6,[$inp,#2]</div><div class='del'>-	ldrb	r7,[$inp,#3]</div><div class='del'>-	orr	r4,r4,r5,lsl#8</div><div class='del'>-	ldrb	r5,[$inp,#4]</div><div class='del'>-	orr	r4,r4,r6,lsl#16</div><div class='del'>-	ldrb	r6,[$inp,#5]</div><div class='del'>-	orr	r4,r4,r7,lsl#24</div><div class='del'>-	ldrb	r7,[$inp,#6]</div><div class='del'>-	and	r4,r4,r10</div><div class='del'>-</div><div class='del'>-#if	__ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-# if !defined(_WIN32)</div><div class='del'>-	ldr	r12,[r11,r12]		@ OPENSSL_armcap_P</div><div class='del'>-# endif</div><div class='del'>-# if defined(__APPLE__) || defined(_WIN32)</div><div class='del'>-	ldr	r12,[r12]</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	ldrb	r8,[$inp,#7]</div><div class='del'>-	orr	r5,r5,r6,lsl#8</div><div class='del'>-	ldrb	r6,[$inp,#8]</div><div class='del'>-	orr	r5,r5,r7,lsl#16</div><div class='del'>-	ldrb	r7,[$inp,#9]</div><div class='del'>-	orr	r5,r5,r8,lsl#24</div><div class='del'>-	ldrb	r8,[$inp,#10]</div><div class='del'>-	and	r5,r5,r3</div><div class='del'>-</div><div class='del'>-#if	__ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-	tst	r12,#ARMV7_NEON		@ check for NEON</div><div class='del'>-# ifdef	__thumb2__</div><div class='del'>-	adr	r9,.Lpoly1305_blocks_neon</div><div class='del'>-	adr	r11,.Lpoly1305_blocks</div><div class='del'>-	it	ne</div><div class='del'>-	movne	r11,r9</div><div class='del'>-	adr	r12,.Lpoly1305_emit</div><div class='del'>-	orr	r11,r11,#1		@ thumb-ify addresses</div><div class='del'>-	orr	r12,r12,#1</div><div class='del'>-# else</div><div class='del'>-	add	r12,r11,#(.Lpoly1305_emit-.Lpoly1305_init)</div><div class='del'>-	ite	eq</div><div class='del'>-	addeq	r11,r11,#(.Lpoly1305_blocks-.Lpoly1305_init)</div><div class='del'>-	addne	r11,r11,#(.Lpoly1305_blocks_neon-.Lpoly1305_init)</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	ldrb	r9,[$inp,#11]</div><div class='del'>-	orr	r6,r6,r7,lsl#8</div><div class='del'>-	ldrb	r7,[$inp,#12]</div><div class='del'>-	orr	r6,r6,r8,lsl#16</div><div class='del'>-	ldrb	r8,[$inp,#13]</div><div class='del'>-	orr	r6,r6,r9,lsl#24</div><div class='del'>-	ldrb	r9,[$inp,#14]</div><div class='del'>-	and	r6,r6,r3</div><div class='del'>-</div><div class='del'>-	ldrb	r10,[$inp,#15]</div><div class='del'>-	orr	r7,r7,r8,lsl#8</div><div class='del'>-	str	r4,[$ctx,#0]</div><div class='del'>-	orr	r7,r7,r9,lsl#16</div><div class='del'>-	str	r5,[$ctx,#4]</div><div class='del'>-	orr	r7,r7,r10,lsl#24</div><div class='del'>-	str	r6,[$ctx,#8]</div><div class='del'>-	and	r7,r7,r3</div><div class='del'>-	str	r7,[$ctx,#12]</div><div class='del'>-#if	__ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-	stmia	r2,{r11,r12}		@ fill functions table</div><div class='del'>-	mov	r0,#1</div><div class='del'>-#else</div><div class='del'>-	mov	r0,#0</div><div class='del'>-#endif</div><div class='del'>-.Lno_key:</div><div class='del'>-	ldmia	sp!,{r4-r11}</div><div class='del'>-#if	__ARM_ARCH__&gt;=5</div><div class='del'>-	ret				@ bx	lr</div><div class='del'>-#else</div><div class='del'>-	tst	lr,#1</div><div class='del'>-	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='del'>-	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='del'>-#endif</div><div class='del'>-.size	poly1305_init,.-poly1305_init</div><div class='del'>-___</div><div class='del'>-{</div><div class='del'>-my ($h0,$h1,$h2,$h3,$h4,$r0,$r1,$r2,$r3)=map("r$_",(4..12));</div><div class='del'>-my ($s1,$s2,$s3)=($r1,$r2,$r3);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.type	poly1305_blocks,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_blocks:</div><div class='del'>-.Lpoly1305_blocks:</div><div class='del'>-	stmdb	sp!,{r3-r11,lr}</div><div class='del'>-</div><div class='del'>-	ands	$len,$len,#-16</div><div class='del'>-	beq	.Lno_data</div><div class='del'>-</div><div class='del'>-	add	$len,$len,$inp		@ end pointer</div><div class='del'>-	sub	sp,sp,#32</div><div class='del'>-</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldmia	$ctx,{$h0-$r3}		@ load context</div><div class='del'>-	add	$ctx,$ctx,#20</div><div class='del'>-	str	$len,[sp,#16]		@ offload stuff</div><div class='del'>-	str	$ctx,[sp,#12]</div><div class='del'>-#else</div><div class='del'>-	ldr	lr,[$ctx,#36]		@ is_base2_26</div><div class='del'>-	ldmia	$ctx!,{$h0-$h4}		@ load hash value</div><div class='del'>-	str	$len,[sp,#16]		@ offload stuff</div><div class='del'>-	str	$ctx,[sp,#12]</div><div class='del'>-</div><div class='del'>-	adds	$r0,$h0,$h1,lsl#26	@ base 2^26 -&gt; base 2^32</div><div class='del'>-	mov	$r1,$h1,lsr#6</div><div class='del'>-	adcs	$r1,$r1,$h2,lsl#20</div><div class='del'>-	mov	$r2,$h2,lsr#12</div><div class='del'>-	adcs	$r2,$r2,$h3,lsl#14</div><div class='del'>-	mov	$r3,$h3,lsr#18</div><div class='del'>-	adcs	$r3,$r3,$h4,lsl#8</div><div class='del'>-	mov	$len,#0</div><div class='del'>-	teq	lr,#0</div><div class='del'>-	str	$len,[$ctx,#16]		@ clear is_base2_26</div><div class='del'>-	adc	$len,$len,$h4,lsr#24</div><div class='del'>-</div><div class='del'>-	itttt	ne</div><div class='del'>-	movne	$h0,$r0			@ choose between radixes</div><div class='del'>-	movne	$h1,$r1</div><div class='del'>-	movne	$h2,$r2</div><div class='del'>-	movne	$h3,$r3</div><div class='del'>-	ldmia	$ctx,{$r0-$r3}		@ load key</div><div class='del'>-	it	ne</div><div class='del'>-	movne	$h4,$len</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	mov	lr,$inp</div><div class='del'>-	cmp	$padbit,#0</div><div class='del'>-	str	$r1,[sp,#20]</div><div class='del'>-	str	$r2,[sp,#24]</div><div class='del'>-	str	$r3,[sp,#28]</div><div class='del'>-	b	.Loop</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Loop:</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r0,[lr],#16		@ load input</div><div class='del'>-# ifdef	__thumb2__</div><div class='del'>-	it	hi</div><div class='del'>-# endif</div><div class='del'>-	addhi	$h4,$h4,#1		@ 1&lt;&lt;128</div><div class='del'>-	ldrb	r1,[lr,#-15]</div><div class='del'>-	ldrb	r2,[lr,#-14]</div><div class='del'>-	ldrb	r3,[lr,#-13]</div><div class='del'>-	orr	r1,r0,r1,lsl#8</div><div class='del'>-	ldrb	r0,[lr,#-12]</div><div class='del'>-	orr	r2,r1,r2,lsl#16</div><div class='del'>-	ldrb	r1,[lr,#-11]</div><div class='del'>-	orr	r3,r2,r3,lsl#24</div><div class='del'>-	ldrb	r2,[lr,#-10]</div><div class='del'>-	adds	$h0,$h0,r3		@ accumulate input</div><div class='del'>-</div><div class='del'>-	ldrb	r3,[lr,#-9]</div><div class='del'>-	orr	r1,r0,r1,lsl#8</div><div class='del'>-	ldrb	r0,[lr,#-8]</div><div class='del'>-	orr	r2,r1,r2,lsl#16</div><div class='del'>-	ldrb	r1,[lr,#-7]</div><div class='del'>-	orr	r3,r2,r3,lsl#24</div><div class='del'>-	ldrb	r2,[lr,#-6]</div><div class='del'>-	adcs	$h1,$h1,r3</div><div class='del'>-</div><div class='del'>-	ldrb	r3,[lr,#-5]</div><div class='del'>-	orr	r1,r0,r1,lsl#8</div><div class='del'>-	ldrb	r0,[lr,#-4]</div><div class='del'>-	orr	r2,r1,r2,lsl#16</div><div class='del'>-	ldrb	r1,[lr,#-3]</div><div class='del'>-	orr	r3,r2,r3,lsl#24</div><div class='del'>-	ldrb	r2,[lr,#-2]</div><div class='del'>-	adcs	$h2,$h2,r3</div><div class='del'>-</div><div class='del'>-	ldrb	r3,[lr,#-1]</div><div class='del'>-	orr	r1,r0,r1,lsl#8</div><div class='del'>-	str	lr,[sp,#8]		@ offload input pointer</div><div class='del'>-	orr	r2,r1,r2,lsl#16</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2</div><div class='del'>-	orr	r3,r2,r3,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r0,[lr],#16		@ load input</div><div class='del'>-	it	hi</div><div class='del'>-	addhi	$h4,$h4,#1		@ padbit</div><div class='del'>-	ldr	r1,[lr,#-12]</div><div class='del'>-	ldr	r2,[lr,#-8]</div><div class='del'>-	ldr	r3,[lr,#-4]</div><div class='del'>-# ifdef	__ARMEB__</div><div class='del'>-	rev	r0,r0</div><div class='del'>-	rev	r1,r1</div><div class='del'>-	rev	r2,r2</div><div class='del'>-	rev	r3,r3</div><div class='del'>-# endif</div><div class='del'>-	adds	$h0,$h0,r0		@ accumulate input</div><div class='del'>-	str	lr,[sp,#8]		@ offload input pointer</div><div class='del'>-	adcs	$h1,$h1,r1</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2</div><div class='del'>-	adcs	$h2,$h2,r2</div><div class='del'>-#endif</div><div class='del'>-	add	$s2,$r2,$r2,lsr#2</div><div class='del'>-	adcs	$h3,$h3,r3</div><div class='del'>-	add	$s3,$r3,$r3,lsr#2</div><div class='del'>-</div><div class='del'>-	umull	r2,r3,$h1,$r0</div><div class='del'>-	 adc	$h4,$h4,#0</div><div class='del'>-	umull	r0,r1,$h0,$r0</div><div class='del'>-	umlal	r2,r3,$h4,$s1</div><div class='del'>-	umlal	r0,r1,$h3,$s1</div><div class='del'>-	ldr	$r1,[sp,#20]		@ reload $r1</div><div class='del'>-	umlal	r2,r3,$h2,$s3</div><div class='del'>-	umlal	r0,r1,$h1,$s3</div><div class='del'>-	umlal	r2,r3,$h3,$s2</div><div class='del'>-	umlal	r0,r1,$h2,$s2</div><div class='del'>-	umlal	r2,r3,$h0,$r1</div><div class='del'>-	str	r0,[sp,#0]		@ future $h0</div><div class='del'>-	 mul	r0,$s2,$h4</div><div class='del'>-	ldr	$r2,[sp,#24]		@ reload $r2</div><div class='del'>-	adds	r2,r2,r1		@ d1+=d0&gt;&gt;32</div><div class='del'>-	 eor	r1,r1,r1</div><div class='del'>-	adc	lr,r3,#0		@ future $h2</div><div class='del'>-	str	r2,[sp,#4]		@ future $h1</div><div class='del'>-</div><div class='del'>-	mul	r2,$s3,$h4</div><div class='del'>-	eor	r3,r3,r3</div><div class='del'>-	umlal	r0,r1,$h3,$s3</div><div class='del'>-	ldr	$r3,[sp,#28]		@ reload $r3</div><div class='del'>-	umlal	r2,r3,$h3,$r0</div><div class='del'>-	umlal	r0,r1,$h2,$r0</div><div class='del'>-	umlal	r2,r3,$h2,$r1</div><div class='del'>-	umlal	r0,r1,$h1,$r1</div><div class='del'>-	umlal	r2,r3,$h1,$r2</div><div class='del'>-	umlal	r0,r1,$h0,$r2</div><div class='del'>-	umlal	r2,r3,$h0,$r3</div><div class='del'>-	ldr	$h0,[sp,#0]</div><div class='del'>-	mul	$h4,$r0,$h4</div><div class='del'>-	ldr	$h1,[sp,#4]</div><div class='del'>-</div><div class='del'>-	adds	$h2,lr,r0		@ d2+=d1&gt;&gt;32</div><div class='del'>-	ldr	lr,[sp,#8]		@ reload input pointer</div><div class='del'>-	adc	r1,r1,#0</div><div class='del'>-	adds	$h3,r2,r1		@ d3+=d2&gt;&gt;32</div><div class='del'>-	ldr	r0,[sp,#16]		@ reload end pointer</div><div class='del'>-	adc	r3,r3,#0</div><div class='del'>-	add	$h4,$h4,r3		@ h4+=d3&gt;&gt;32</div><div class='del'>-</div><div class='del'>-	and	r1,$h4,#-4</div><div class='del'>-	and	$h4,$h4,#3</div><div class='del'>-	add	r1,r1,r1,lsr#2		@ *=5</div><div class='del'>-	adds	$h0,$h0,r1</div><div class='del'>-	adcs	$h1,$h1,#0</div><div class='del'>-	adcs	$h2,$h2,#0</div><div class='del'>-	adcs	$h3,$h3,#0</div><div class='del'>-	adc	$h4,$h4,#0</div><div class='del'>-</div><div class='del'>-	cmp	r0,lr			@ done yet?</div><div class='del'>-	bhi	.Loop</div><div class='del'>-</div><div class='del'>-	ldr	$ctx,[sp,#12]</div><div class='del'>-	add	sp,sp,#32</div><div class='del'>-	stmdb	$ctx,{$h0-$h4}		@ store the result</div><div class='del'>-</div><div class='del'>-.Lno_data:</div><div class='del'>-#if	__ARM_ARCH__&gt;=5</div><div class='del'>-	ldmia	sp!,{r3-r11,pc}</div><div class='del'>-#else</div><div class='del'>-	ldmia	sp!,{r3-r11,lr}</div><div class='del'>-	tst	lr,#1</div><div class='del'>-	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='del'>-	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='del'>-#endif</div><div class='del'>-.size	poly1305_blocks,.-poly1305_blocks</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-{</div><div class='del'>-my ($ctx,$mac,$nonce)=map("r$_",(0..2));</div><div class='del'>-my ($h0,$h1,$h2,$h3,$h4,$g0,$g1,$g2,$g3)=map("r$_",(3..11));</div><div class='del'>-my $g4=$ctx;</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.type	poly1305_emit,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_emit:</div><div class='del'>-.Lpoly1305_emit:</div><div class='del'>-	stmdb	sp!,{r4-r11}</div><div class='del'>-</div><div class='del'>-	ldmia	$ctx,{$h0-$h4}</div><div class='del'>-</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-	ldr	ip,[$ctx,#36]		@ is_base2_26</div><div class='del'>-</div><div class='del'>-	adds	$g0,$h0,$h1,lsl#26	@ base 2^26 -&gt; base 2^32</div><div class='del'>-	mov	$g1,$h1,lsr#6</div><div class='del'>-	adcs	$g1,$g1,$h2,lsl#20</div><div class='del'>-	mov	$g2,$h2,lsr#12</div><div class='del'>-	adcs	$g2,$g2,$h3,lsl#14</div><div class='del'>-	mov	$g3,$h3,lsr#18</div><div class='del'>-	adcs	$g3,$g3,$h4,lsl#8</div><div class='del'>-	mov	$g4,#0</div><div class='del'>-	adc	$g4,$g4,$h4,lsr#24</div><div class='del'>-</div><div class='del'>-	tst	ip,ip</div><div class='del'>-	itttt	ne</div><div class='del'>-	movne	$h0,$g0</div><div class='del'>-	movne	$h1,$g1</div><div class='del'>-	movne	$h2,$g2</div><div class='del'>-	movne	$h3,$g3</div><div class='del'>-	it	ne</div><div class='del'>-	movne	$h4,$g4</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	adds	$g0,$h0,#5		@ compare to modulus</div><div class='del'>-	adcs	$g1,$h1,#0</div><div class='del'>-	adcs	$g2,$h2,#0</div><div class='del'>-	adcs	$g3,$h3,#0</div><div class='del'>-	adc	$g4,$h4,#0</div><div class='del'>-	tst	$g4,#4			@ did it carry/borrow?</div><div class='del'>-</div><div class='del'>-#ifdef	__thumb2__</div><div class='del'>-	it	ne</div><div class='del'>-#endif</div><div class='del'>-	movne	$h0,$g0</div><div class='del'>-	ldr	$g0,[$nonce,#0]</div><div class='del'>-#ifdef	__thumb2__</div><div class='del'>-	it	ne</div><div class='del'>-#endif</div><div class='del'>-	movne	$h1,$g1</div><div class='del'>-	ldr	$g1,[$nonce,#4]</div><div class='del'>-#ifdef	__thumb2__</div><div class='del'>-	it	ne</div><div class='del'>-#endif</div><div class='del'>-	movne	$h2,$g2</div><div class='del'>-	ldr	$g2,[$nonce,#8]</div><div class='del'>-#ifdef	__thumb2__</div><div class='del'>-	it	ne</div><div class='del'>-#endif</div><div class='del'>-	movne	$h3,$g3</div><div class='del'>-	ldr	$g3,[$nonce,#12]</div><div class='del'>-</div><div class='del'>-	adds	$h0,$h0,$g0</div><div class='del'>-	adcs	$h1,$h1,$g1</div><div class='del'>-	adcs	$h2,$h2,$g2</div><div class='del'>-	adc	$h3,$h3,$g3</div><div class='del'>-</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-# ifdef __ARMEB__</div><div class='del'>-	rev	$h0,$h0</div><div class='del'>-	rev	$h1,$h1</div><div class='del'>-	rev	$h2,$h2</div><div class='del'>-	rev	$h3,$h3</div><div class='del'>-# endif</div><div class='del'>-	str	$h0,[$mac,#0]</div><div class='del'>-	str	$h1,[$mac,#4]</div><div class='del'>-	str	$h2,[$mac,#8]</div><div class='del'>-	str	$h3,[$mac,#12]</div><div class='del'>-#else</div><div class='del'>-	strb	$h0,[$mac,#0]</div><div class='del'>-	mov	$h0,$h0,lsr#8</div><div class='del'>-	strb	$h1,[$mac,#4]</div><div class='del'>-	mov	$h1,$h1,lsr#8</div><div class='del'>-	strb	$h2,[$mac,#8]</div><div class='del'>-	mov	$h2,$h2,lsr#8</div><div class='del'>-	strb	$h3,[$mac,#12]</div><div class='del'>-	mov	$h3,$h3,lsr#8</div><div class='del'>-</div><div class='del'>-	strb	$h0,[$mac,#1]</div><div class='del'>-	mov	$h0,$h0,lsr#8</div><div class='del'>-	strb	$h1,[$mac,#5]</div><div class='del'>-	mov	$h1,$h1,lsr#8</div><div class='del'>-	strb	$h2,[$mac,#9]</div><div class='del'>-	mov	$h2,$h2,lsr#8</div><div class='del'>-	strb	$h3,[$mac,#13]</div><div class='del'>-	mov	$h3,$h3,lsr#8</div><div class='del'>-</div><div class='del'>-	strb	$h0,[$mac,#2]</div><div class='del'>-	mov	$h0,$h0,lsr#8</div><div class='del'>-	strb	$h1,[$mac,#6]</div><div class='del'>-	mov	$h1,$h1,lsr#8</div><div class='del'>-	strb	$h2,[$mac,#10]</div><div class='del'>-	mov	$h2,$h2,lsr#8</div><div class='del'>-	strb	$h3,[$mac,#14]</div><div class='del'>-	mov	$h3,$h3,lsr#8</div><div class='del'>-</div><div class='del'>-	strb	$h0,[$mac,#3]</div><div class='del'>-	strb	$h1,[$mac,#7]</div><div class='del'>-	strb	$h2,[$mac,#11]</div><div class='del'>-	strb	$h3,[$mac,#15]</div><div class='del'>-#endif</div><div class='del'>-	ldmia	sp!,{r4-r11}</div><div class='del'>-#if	__ARM_ARCH__&gt;=5</div><div class='del'>-	ret				@ bx	lr</div><div class='del'>-#else</div><div class='del'>-	tst	lr,#1</div><div class='del'>-	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='del'>-	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='del'>-#endif</div><div class='del'>-.size	poly1305_emit,.-poly1305_emit</div><div class='del'>-___</div><div class='del'>-{</div><div class='del'>-my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));</div><div class='del'>-my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));</div><div class='del'>-my ($T0,$T1,$MASK) = map("q$_",(15,4,0));</div><div class='del'>-</div><div class='del'>-my ($in2,$zeros,$tbl0,$tbl1) = map("r$_",(4..7));</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if	__ARM_MAX_ARCH__&gt;=7</div><div class='del'>-.fpu	neon</div><div class='del'>-</div><div class='del'>-.type	poly1305_init_neon,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_init_neon:</div><div class='del'>-.Lpoly1305_init_neon:</div><div class='del'>-	ldr	r3,[$ctx,#48]		@ first table element</div><div class='del'>-	cmp	r3,#-1			@ is value impossible?</div><div class='del'>-	bne	.Lno_init_neon</div><div class='del'>-</div><div class='del'>-	ldr	r4,[$ctx,#20]		@ load key base 2^32</div><div class='del'>-	ldr	r5,[$ctx,#24]</div><div class='del'>-	ldr	r6,[$ctx,#28]</div><div class='del'>-	ldr	r7,[$ctx,#32]</div><div class='del'>-</div><div class='del'>-	and	r2,r4,#0x03ffffff	@ base 2^32 -&gt; base 2^26</div><div class='del'>-	mov	r3,r4,lsr#26</div><div class='del'>-	mov	r4,r5,lsr#20</div><div class='del'>-	orr	r3,r3,r5,lsl#6</div><div class='del'>-	mov	r5,r6,lsr#14</div><div class='del'>-	orr	r4,r4,r6,lsl#12</div><div class='del'>-	mov	r6,r7,lsr#8</div><div class='del'>-	orr	r5,r5,r7,lsl#18</div><div class='del'>-	and	r3,r3,#0x03ffffff</div><div class='del'>-	and	r4,r4,#0x03ffffff</div><div class='del'>-	and	r5,r5,#0x03ffffff</div><div class='del'>-</div><div class='del'>-	vdup.32	$R0,r2			@ r^1 in both lanes</div><div class='del'>-	add	r2,r3,r3,lsl#2		@ *5</div><div class='del'>-	vdup.32	$R1,r3</div><div class='del'>-	add	r3,r4,r4,lsl#2</div><div class='del'>-	vdup.32	$S1,r2</div><div class='del'>-	vdup.32	$R2,r4</div><div class='del'>-	add	r4,r5,r5,lsl#2</div><div class='del'>-	vdup.32	$S2,r3</div><div class='del'>-	vdup.32	$R3,r5</div><div class='del'>-	add	r5,r6,r6,lsl#2</div><div class='del'>-	vdup.32	$S3,r4</div><div class='del'>-	vdup.32	$R4,r6</div><div class='del'>-	vdup.32	$S4,r5</div><div class='del'>-</div><div class='del'>-	mov	$zeros,#2		@ counter</div><div class='del'>-</div><div class='del'>-.Lsquare_neon:</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4</div><div class='del'>-	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4</div><div class='del'>-	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4</div><div class='del'>-	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4</div><div class='del'>-	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4</div><div class='del'>-</div><div class='del'>-	vmull.u32	$D0,$R0,${R0}[1]</div><div class='del'>-	vmull.u32	$D1,$R1,${R0}[1]</div><div class='del'>-	vmull.u32	$D2,$R2,${R0}[1]</div><div class='del'>-	vmull.u32	$D3,$R3,${R0}[1]</div><div class='del'>-	vmull.u32	$D4,$R4,${R0}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$R4,${S1}[1]</div><div class='del'>-	vmlal.u32	$D1,$R0,${R1}[1]</div><div class='del'>-	vmlal.u32	$D2,$R1,${R1}[1]</div><div class='del'>-	vmlal.u32	$D3,$R2,${R1}[1]</div><div class='del'>-	vmlal.u32	$D4,$R3,${R1}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$R3,${S2}[1]</div><div class='del'>-	vmlal.u32	$D1,$R4,${S2}[1]</div><div class='del'>-	vmlal.u32	$D3,$R1,${R2}[1]</div><div class='del'>-	vmlal.u32	$D2,$R0,${R2}[1]</div><div class='del'>-	vmlal.u32	$D4,$R2,${R2}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$R2,${S3}[1]</div><div class='del'>-	vmlal.u32	$D3,$R0,${R3}[1]</div><div class='del'>-	vmlal.u32	$D1,$R3,${S3}[1]</div><div class='del'>-	vmlal.u32	$D2,$R4,${S3}[1]</div><div class='del'>-	vmlal.u32	$D4,$R1,${R3}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$R4,${S4}[1]</div><div class='del'>-	vmlal.u32	$D0,$R1,${S4}[1]</div><div class='del'>-	vmlal.u32	$D1,$R2,${S4}[1]</div><div class='del'>-	vmlal.u32	$D2,$R3,${S4}[1]</div><div class='del'>-	vmlal.u32	$D4,$R0,${R4}[1]</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ lazy reduction as discussed in "NEON crypto" by D.J. Bernstein</div><div class='del'>-	@ and P. Schwabe</div><div class='del'>-	@</div><div class='del'>-	@ H0&gt;&gt;+H1&gt;&gt;+H2&gt;&gt;+H3&gt;&gt;+H4</div><div class='del'>-	@ H3&gt;&gt;+H4&gt;&gt;*5+H0&gt;&gt;+H1</div><div class='del'>-	@</div><div class='del'>-	@ Trivia.</div><div class='del'>-	@</div><div class='del'>-	@ Result of multiplication of n-bit number by m-bit number is</div><div class='del'>-	@ n+m bits wide. However! Even though 2^n is a n+1-bit number,</div><div class='del'>-	@ m-bit number multiplied by 2^n is still n+m bits wide.</div><div class='del'>-	@</div><div class='del'>-	@ Sum of two n-bit numbers is n+1 bits wide, sum of three - n+2,</div><div class='del'>-	@ and so is sum of four. Sum of 2^m n-m-bit numbers and n-bit</div><div class='del'>-	@ one is n+1 bits wide.</div><div class='del'>-	@</div><div class='del'>-	@ &gt;&gt;+ denotes Hnext += Hn&gt;&gt;26, Hn &amp;= 0x3ffffff. This means that</div><div class='del'>-	@ H0, H2, H3 are guaranteed to be 26 bits wide, while H1 and H4</div><div class='del'>-	@ can be 27. However! In cases when their width exceeds 26 bits</div><div class='del'>-	@ they are limited by 2^26+2^6. This in turn means that *sum*</div><div class='del'>-	@ of the products with these values can still be viewed as sum</div><div class='del'>-	@ of 52-bit numbers as long as the amount of addends is not a</div><div class='del'>-	@ power of 2. For example,</div><div class='del'>-	@</div><div class='del'>-	@ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 + H0 * R4,</div><div class='del'>-	@</div><div class='del'>-	@ which can't be larger than 5 * (2^26 + 2^6) * (2^26 + 2^6), or</div><div class='del'>-	@ 5 * (2^52 + 2*2^32 + 2^12), which in turn is smaller than</div><div class='del'>-	@ 8 * (2^52) or 2^55. However, the value is then multiplied by</div><div class='del'>-	@ by 5, so we should be looking at 5 * 5 * (2^52 + 2^33 + 2^12),</div><div class='del'>-	@ which is less than 32 * (2^52) or 2^57. And when processing</div><div class='del'>-	@ data we are looking at triple as many addends...</div><div class='del'>-	@</div><div class='del'>-	@ In key setup procedure pre-reduced H0 is limited by 5*4+1 and</div><div class='del'>-	@ 5*H4 - by 5*5 52-bit addends, or 57 bits. But when hashing the</div><div class='del'>-	@ input H0 is limited by (5*4+1)*3 addends, or 58 bits, while</div><div class='del'>-	@ 5*H4 by 5*5*3, or 59[!] bits. How is this relevant? vmlal.u32</div><div class='del'>-	@ instruction accepts 2x32-bit input and writes 2x64-bit result.</div><div class='del'>-	@ This means that result of reduction have to be compressed upon</div><div class='del'>-	@ loop wrap-around. This can be done in the process of reduction</div><div class='del'>-	@ to minimize amount of instructions [as well as amount of</div><div class='del'>-	@ 128-bit instructions, which benefits low-end processors], but</div><div class='del'>-	@ one has to watch for H2 (which is narrower than H0) and 5*H4</div><div class='del'>-	@ not being wider than 58 bits, so that result of right shift</div><div class='del'>-	@ by 26 bits fits in 32 bits. This is also useful on x86,</div><div class='del'>-	@ because it allows to use paddd in place for paddq, which</div><div class='del'>-	@ benefits Atom, where paddq is ridiculously slow.</div><div class='del'>-</div><div class='del'>-	vshr.u64	$T0,$D3,#26</div><div class='del'>-	vmovn.i64	$D3#lo,$D3</div><div class='del'>-	 vshr.u64	$T1,$D0,#26</div><div class='del'>-	 vmovn.i64	$D0#lo,$D0</div><div class='del'>-	vadd.i64	$D4,$D4,$T0		@ h3 -&gt; h4</div><div class='del'>-	vbic.i32	$D3#lo,#0xfc000000	@ &amp;=0x03ffffff</div><div class='del'>-	 vadd.i64	$D1,$D1,$T1		@ h0 -&gt; h1</div><div class='del'>-	 vbic.i32	$D0#lo,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vshrn.u64	$T0#lo,$D4,#26</div><div class='del'>-	vmovn.i64	$D4#lo,$D4</div><div class='del'>-	 vshr.u64	$T1,$D1,#26</div><div class='del'>-	 vmovn.i64	$D1#lo,$D1</div><div class='del'>-	 vadd.i64	$D2,$D2,$T1		@ h1 -&gt; h2</div><div class='del'>-	vbic.i32	$D4#lo,#0xfc000000</div><div class='del'>-	 vbic.i32	$D1#lo,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vadd.i32	$D0#lo,$D0#lo,$T0#lo</div><div class='del'>-	vshl.u32	$T0#lo,$T0#lo,#2</div><div class='del'>-	 vshrn.u64	$T1#lo,$D2,#26</div><div class='del'>-	 vmovn.i64	$D2#lo,$D2</div><div class='del'>-	vadd.i32	$D0#lo,$D0#lo,$T0#lo	@ h4 -&gt; h0</div><div class='del'>-	 vadd.i32	$D3#lo,$D3#lo,$T1#lo	@ h2 -&gt; h3</div><div class='del'>-	 vbic.i32	$D2#lo,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vshr.u32	$T0#lo,$D0#lo,#26</div><div class='del'>-	vbic.i32	$D0#lo,#0xfc000000</div><div class='del'>-	 vshr.u32	$T1#lo,$D3#lo,#26</div><div class='del'>-	 vbic.i32	$D3#lo,#0xfc000000</div><div class='del'>-	vadd.i32	$D1#lo,$D1#lo,$T0#lo	@ h0 -&gt; h1</div><div class='del'>-	 vadd.i32	$D4#lo,$D4#lo,$T1#lo	@ h3 -&gt; h4</div><div class='del'>-</div><div class='del'>-	subs		$zeros,$zeros,#1</div><div class='del'>-	beq		.Lsquare_break_neon</div><div class='del'>-</div><div class='del'>-	add		$tbl0,$ctx,#(48+0*9*4)</div><div class='del'>-	add		$tbl1,$ctx,#(48+1*9*4)</div><div class='del'>-</div><div class='del'>-	vtrn.32		$R0,$D0#lo		@ r^2:r^1</div><div class='del'>-	vtrn.32		$R2,$D2#lo</div><div class='del'>-	vtrn.32		$R3,$D3#lo</div><div class='del'>-	vtrn.32		$R1,$D1#lo</div><div class='del'>-	vtrn.32		$R4,$D4#lo</div><div class='del'>-</div><div class='del'>-	vshl.u32	$S2,$R2,#2		@ *5</div><div class='del'>-	vshl.u32	$S3,$R3,#2</div><div class='del'>-	vshl.u32	$S1,$R1,#2</div><div class='del'>-	vshl.u32	$S4,$R4,#2</div><div class='del'>-	vadd.i32	$S2,$S2,$R2</div><div class='del'>-	vadd.i32	$S1,$S1,$R1</div><div class='del'>-	vadd.i32	$S3,$S3,$R3</div><div class='del'>-	vadd.i32	$S4,$S4,$R4</div><div class='del'>-</div><div class='del'>-	vst4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!</div><div class='del'>-	vst4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!</div><div class='del'>-	vst4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!</div><div class='del'>-	vst4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!</div><div class='del'>-	vst1.32		{${S4}[0]},[$tbl0,:32]</div><div class='del'>-	vst1.32		{${S4}[1]},[$tbl1,:32]</div><div class='del'>-</div><div class='del'>-	b		.Lsquare_neon</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Lsquare_break_neon:</div><div class='del'>-	add		$tbl0,$ctx,#(48+2*4*9)</div><div class='del'>-	add		$tbl1,$ctx,#(48+3*4*9)</div><div class='del'>-</div><div class='del'>-	vmov		$R0,$D0#lo		@ r^4:r^3</div><div class='del'>-	vshl.u32	$S1,$D1#lo,#2		@ *5</div><div class='del'>-	vmov		$R1,$D1#lo</div><div class='del'>-	vshl.u32	$S2,$D2#lo,#2</div><div class='del'>-	vmov		$R2,$D2#lo</div><div class='del'>-	vshl.u32	$S3,$D3#lo,#2</div><div class='del'>-	vmov		$R3,$D3#lo</div><div class='del'>-	vshl.u32	$S4,$D4#lo,#2</div><div class='del'>-	vmov		$R4,$D4#lo</div><div class='del'>-	vadd.i32	$S1,$S1,$D1#lo</div><div class='del'>-	vadd.i32	$S2,$S2,$D2#lo</div><div class='del'>-	vadd.i32	$S3,$S3,$D3#lo</div><div class='del'>-	vadd.i32	$S4,$S4,$D4#lo</div><div class='del'>-</div><div class='del'>-	vst4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!</div><div class='del'>-	vst4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!</div><div class='del'>-	vst4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!</div><div class='del'>-	vst4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!</div><div class='del'>-	vst1.32		{${S4}[0]},[$tbl0]</div><div class='del'>-	vst1.32		{${S4}[1]},[$tbl1]</div><div class='del'>-</div><div class='del'>-.Lno_init_neon:</div><div class='del'>-	ret				@ bx	lr</div><div class='del'>-.size	poly1305_init_neon,.-poly1305_init_neon</div><div class='del'>-</div><div class='del'>-.type	poly1305_blocks_neon,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_blocks_neon:</div><div class='del'>-.Lpoly1305_blocks_neon:</div><div class='del'>-	ldr	ip,[$ctx,#36]		@ is_base2_26</div><div class='del'>-</div><div class='del'>-	cmp	$len,#64</div><div class='del'>-	blo	.Lpoly1305_blocks</div><div class='del'>-</div><div class='del'>-	stmdb	sp!,{r4-r7}</div><div class='del'>-	vstmdb	sp!,{d8-d15}		@ ABI specification says so</div><div class='del'>-</div><div class='del'>-	tst	ip,ip			@ is_base2_26?</div><div class='del'>-	bne	.Lbase2_26_neon</div><div class='del'>-</div><div class='del'>-	stmdb	sp!,{r1-r3,lr}</div><div class='del'>-	bl	.Lpoly1305_init_neon</div><div class='del'>-</div><div class='del'>-	ldr	r4,[$ctx,#0]		@ load hash value base 2^32</div><div class='del'>-	ldr	r5,[$ctx,#4]</div><div class='del'>-	ldr	r6,[$ctx,#8]</div><div class='del'>-	ldr	r7,[$ctx,#12]</div><div class='del'>-	ldr	ip,[$ctx,#16]</div><div class='del'>-</div><div class='del'>-	and	r2,r4,#0x03ffffff	@ base 2^32 -&gt; base 2^26</div><div class='del'>-	mov	r3,r4,lsr#26</div><div class='del'>-	 veor	$D0#lo,$D0#lo,$D0#lo</div><div class='del'>-	mov	r4,r5,lsr#20</div><div class='del'>-	orr	r3,r3,r5,lsl#6</div><div class='del'>-	 veor	$D1#lo,$D1#lo,$D1#lo</div><div class='del'>-	mov	r5,r6,lsr#14</div><div class='del'>-	orr	r4,r4,r6,lsl#12</div><div class='del'>-	 veor	$D2#lo,$D2#lo,$D2#lo</div><div class='del'>-	mov	r6,r7,lsr#8</div><div class='del'>-	orr	r5,r5,r7,lsl#18</div><div class='del'>-	 veor	$D3#lo,$D3#lo,$D3#lo</div><div class='del'>-	and	r3,r3,#0x03ffffff</div><div class='del'>-	orr	r6,r6,ip,lsl#24</div><div class='del'>-	 veor	$D4#lo,$D4#lo,$D4#lo</div><div class='del'>-	and	r4,r4,#0x03ffffff</div><div class='del'>-	mov	r1,#1</div><div class='del'>-	and	r5,r5,#0x03ffffff</div><div class='del'>-	str	r1,[$ctx,#36]		@ set is_base2_26</div><div class='del'>-</div><div class='del'>-	vmov.32	$D0#lo[0],r2</div><div class='del'>-	vmov.32	$D1#lo[0],r3</div><div class='del'>-	vmov.32	$D2#lo[0],r4</div><div class='del'>-	vmov.32	$D3#lo[0],r5</div><div class='del'>-	vmov.32	$D4#lo[0],r6</div><div class='del'>-	adr	$zeros,.Lzeros</div><div class='del'>-</div><div class='del'>-	ldmia	sp!,{r1-r3,lr}</div><div class='del'>-	b	.Lhash_loaded</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Lbase2_26_neon:</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ load hash value</div><div class='del'>-</div><div class='del'>-	veor		$D0#lo,$D0#lo,$D0#lo</div><div class='del'>-	veor		$D1#lo,$D1#lo,$D1#lo</div><div class='del'>-	veor		$D2#lo,$D2#lo,$D2#lo</div><div class='del'>-	veor		$D3#lo,$D3#lo,$D3#lo</div><div class='del'>-	veor		$D4#lo,$D4#lo,$D4#lo</div><div class='del'>-	vld4.32		{$D0#lo[0],$D1#lo[0],$D2#lo[0],$D3#lo[0]},[$ctx]!</div><div class='del'>-	adr		$zeros,.Lzeros</div><div class='del'>-	vld1.32		{$D4#lo[0]},[$ctx]</div><div class='del'>-	sub		$ctx,$ctx,#16		@ rewind</div><div class='del'>-</div><div class='del'>-.Lhash_loaded:</div><div class='del'>-	add		$in2,$inp,#32</div><div class='del'>-	mov		$padbit,$padbit,lsl#24</div><div class='del'>-	tst		$len,#31</div><div class='del'>-	beq		.Leven</div><div class='del'>-</div><div class='del'>-	vld4.32		{$H0#lo[0],$H1#lo[0],$H2#lo[0],$H3#lo[0]},[$inp]!</div><div class='del'>-	vmov.32		$H4#lo[0],$padbit</div><div class='del'>-	sub		$len,$len,#16</div><div class='del'>-	add		$in2,$inp,#32</div><div class='del'>-</div><div class='del'>-# ifdef	__ARMEB__</div><div class='del'>-	vrev32.8	$H0,$H0</div><div class='del'>-	vrev32.8	$H3,$H3</div><div class='del'>-	vrev32.8	$H1,$H1</div><div class='del'>-	vrev32.8	$H2,$H2</div><div class='del'>-# endif</div><div class='del'>-	vsri.u32	$H4#lo,$H3#lo,#8	@ base 2^32 -&gt; base 2^26</div><div class='del'>-	vshl.u32	$H3#lo,$H3#lo,#18</div><div class='del'>-</div><div class='del'>-	vsri.u32	$H3#lo,$H2#lo,#14</div><div class='del'>-	vshl.u32	$H2#lo,$H2#lo,#12</div><div class='del'>-	vadd.i32	$H4#hi,$H4#lo,$D4#lo	@ add hash value and move to #hi</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H3#lo,#0xfc000000</div><div class='del'>-	vsri.u32	$H2#lo,$H1#lo,#20</div><div class='del'>-	vshl.u32	$H1#lo,$H1#lo,#6</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H2#lo,#0xfc000000</div><div class='del'>-	vsri.u32	$H1#lo,$H0#lo,#26</div><div class='del'>-	vadd.i32	$H3#hi,$H3#lo,$D3#lo</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H0#lo,#0xfc000000</div><div class='del'>-	vbic.i32	$H1#lo,#0xfc000000</div><div class='del'>-	vadd.i32	$H2#hi,$H2#lo,$D2#lo</div><div class='del'>-</div><div class='del'>-	vadd.i32	$H0#hi,$H0#lo,$D0#lo</div><div class='del'>-	vadd.i32	$H1#hi,$H1#lo,$D1#lo</div><div class='del'>-</div><div class='del'>-	mov		$tbl1,$zeros</div><div class='del'>-	add		$tbl0,$ctx,#48</div><div class='del'>-</div><div class='del'>-	cmp		$len,$len</div><div class='del'>-	b		.Long_tail</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Leven:</div><div class='del'>-	subs		$len,$len,#64</div><div class='del'>-	it		lo</div><div class='del'>-	movlo		$in2,$zeros</div><div class='del'>-</div><div class='del'>-	vmov.i32	$H4,#1&lt;&lt;24		@ padbit, yes, always</div><div class='del'>-	vld4.32		{$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp]	@ inp[0:1]</div><div class='del'>-	add		$inp,$inp,#64</div><div class='del'>-	vld4.32		{$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2]	@ inp[2:3] (or 0)</div><div class='del'>-	add		$in2,$in2,#64</div><div class='del'>-	itt		hi</div><div class='del'>-	addhi		$tbl1,$ctx,#(48+1*9*4)</div><div class='del'>-	addhi		$tbl0,$ctx,#(48+3*9*4)</div><div class='del'>-</div><div class='del'>-# ifdef	__ARMEB__</div><div class='del'>-	vrev32.8	$H0,$H0</div><div class='del'>-	vrev32.8	$H3,$H3</div><div class='del'>-	vrev32.8	$H1,$H1</div><div class='del'>-	vrev32.8	$H2,$H2</div><div class='del'>-# endif</div><div class='del'>-	vsri.u32	$H4,$H3,#8		@ base 2^32 -&gt; base 2^26</div><div class='del'>-	vshl.u32	$H3,$H3,#18</div><div class='del'>-</div><div class='del'>-	vsri.u32	$H3,$H2,#14</div><div class='del'>-	vshl.u32	$H2,$H2,#12</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H3,#0xfc000000</div><div class='del'>-	vsri.u32	$H2,$H1,#20</div><div class='del'>-	vshl.u32	$H1,$H1,#6</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H2,#0xfc000000</div><div class='del'>-	vsri.u32	$H1,$H0,#26</div><div class='del'>-</div><div class='del'>-	vbic.i32	$H0,#0xfc000000</div><div class='del'>-	vbic.i32	$H1,#0xfc000000</div><div class='del'>-</div><div class='del'>-	bls		.Lskip_loop</div><div class='del'>-</div><div class='del'>-	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^2</div><div class='del'>-	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^4</div><div class='del'>-	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!</div><div class='del'>-	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!</div><div class='del'>-	b		.Loop_neon</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-.Loop_neon:</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2</div><div class='del'>-	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r</div><div class='del'>-	@   \___________________/</div><div class='del'>-	@ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2</div><div class='del'>-	@ ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r</div><div class='del'>-	@   \___________________/ \____________________/</div><div class='del'>-	@</div><div class='del'>-	@ Note that we start with inp[2:3]*r^2. This is because it</div><div class='del'>-	@ doesn't depend on reduction in previous iteration.</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ d4 = h4*r0 + h3*r1   + h2*r2   + h1*r3   + h0*r4</div><div class='del'>-	@ d3 = h3*r0 + h2*r1   + h1*r2   + h0*r3   + h4*5*r4</div><div class='del'>-	@ d2 = h2*r0 + h1*r1   + h0*r2   + h4*5*r3 + h3*5*r4</div><div class='del'>-	@ d1 = h1*r0 + h0*r1   + h4*5*r2 + h3*5*r3 + h2*5*r4</div><div class='del'>-	@ d0 = h0*r0 + h4*5*r1 + h3*5*r2 + h2*5*r3 + h1*5*r4</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ inp[2:3]*r^2</div><div class='del'>-</div><div class='del'>-	vadd.i32	$H2#lo,$H2#lo,$D2#lo	@ accumulate inp[0:1]</div><div class='del'>-	vmull.u32	$D2,$H2#hi,${R0}[1]</div><div class='del'>-	vadd.i32	$H0#lo,$H0#lo,$D0#lo</div><div class='del'>-	vmull.u32	$D0,$H0#hi,${R0}[1]</div><div class='del'>-	vadd.i32	$H3#lo,$H3#lo,$D3#lo</div><div class='del'>-	vmull.u32	$D3,$H3#hi,${R0}[1]</div><div class='del'>-	vmlal.u32	$D2,$H1#hi,${R1}[1]</div><div class='del'>-	vadd.i32	$H1#lo,$H1#lo,$D1#lo</div><div class='del'>-	vmull.u32	$D1,$H1#hi,${R0}[1]</div><div class='del'>-</div><div class='del'>-	vadd.i32	$H4#lo,$H4#lo,$D4#lo</div><div class='del'>-	vmull.u32	$D4,$H4#hi,${R0}[1]</div><div class='del'>-	subs		$len,$len,#64</div><div class='del'>-	vmlal.u32	$D0,$H4#hi,${S1}[1]</div><div class='del'>-	it		lo</div><div class='del'>-	movlo		$in2,$zeros</div><div class='del'>-	vmlal.u32	$D3,$H2#hi,${R1}[1]</div><div class='del'>-	vld1.32		${S4}[1],[$tbl1,:32]</div><div class='del'>-	vmlal.u32	$D1,$H0#hi,${R1}[1]</div><div class='del'>-	vmlal.u32	$D4,$H3#hi,${R1}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$H3#hi,${S2}[1]</div><div class='del'>-	vmlal.u32	$D3,$H1#hi,${R2}[1]</div><div class='del'>-	vmlal.u32	$D4,$H2#hi,${R2}[1]</div><div class='del'>-	vmlal.u32	$D1,$H4#hi,${S2}[1]</div><div class='del'>-	vmlal.u32	$D2,$H0#hi,${R2}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H0#hi,${R3}[1]</div><div class='del'>-	vmlal.u32	$D0,$H2#hi,${S3}[1]</div><div class='del'>-	vmlal.u32	$D4,$H1#hi,${R3}[1]</div><div class='del'>-	vmlal.u32	$D1,$H3#hi,${S3}[1]</div><div class='del'>-	vmlal.u32	$D2,$H4#hi,${S3}[1]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H4#hi,${S4}[1]</div><div class='del'>-	vmlal.u32	$D0,$H1#hi,${S4}[1]</div><div class='del'>-	vmlal.u32	$D4,$H0#hi,${R4}[1]</div><div class='del'>-	vmlal.u32	$D1,$H2#hi,${S4}[1]</div><div class='del'>-	vmlal.u32	$D2,$H3#hi,${S4}[1]</div><div class='del'>-</div><div class='del'>-	vld4.32		{$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2]	@ inp[2:3] (or 0)</div><div class='del'>-	add		$in2,$in2,#64</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ (hash+inp[0:1])*r^4 and accumulate</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H3#lo,${R0}[0]</div><div class='del'>-	vmlal.u32	$D0,$H0#lo,${R0}[0]</div><div class='del'>-	vmlal.u32	$D4,$H4#lo,${R0}[0]</div><div class='del'>-	vmlal.u32	$D1,$H1#lo,${R0}[0]</div><div class='del'>-	vmlal.u32	$D2,$H2#lo,${R0}[0]</div><div class='del'>-	vld1.32		${S4}[0],[$tbl0,:32]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H2#lo,${R1}[0]</div><div class='del'>-	vmlal.u32	$D0,$H4#lo,${S1}[0]</div><div class='del'>-	vmlal.u32	$D4,$H3#lo,${R1}[0]</div><div class='del'>-	vmlal.u32	$D1,$H0#lo,${R1}[0]</div><div class='del'>-	vmlal.u32	$D2,$H1#lo,${R1}[0]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H1#lo,${R2}[0]</div><div class='del'>-	vmlal.u32	$D0,$H3#lo,${S2}[0]</div><div class='del'>-	vmlal.u32	$D4,$H2#lo,${R2}[0]</div><div class='del'>-	vmlal.u32	$D1,$H4#lo,${S2}[0]</div><div class='del'>-	vmlal.u32	$D2,$H0#lo,${R2}[0]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H0#lo,${R3}[0]</div><div class='del'>-	vmlal.u32	$D0,$H2#lo,${S3}[0]</div><div class='del'>-	vmlal.u32	$D4,$H1#lo,${R3}[0]</div><div class='del'>-	vmlal.u32	$D1,$H3#lo,${S3}[0]</div><div class='del'>-	vmlal.u32	$D3,$H4#lo,${S4}[0]</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D2,$H4#lo,${S3}[0]</div><div class='del'>-	vmlal.u32	$D0,$H1#lo,${S4}[0]</div><div class='del'>-	vmlal.u32	$D4,$H0#lo,${R4}[0]</div><div class='del'>-	vmov.i32	$H4,#1&lt;&lt;24		@ padbit, yes, always</div><div class='del'>-	vmlal.u32	$D1,$H2#lo,${S4}[0]</div><div class='del'>-	vmlal.u32	$D2,$H3#lo,${S4}[0]</div><div class='del'>-</div><div class='del'>-	vld4.32		{$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp]	@ inp[0:1]</div><div class='del'>-	add		$inp,$inp,#64</div><div class='del'>-# ifdef	__ARMEB__</div><div class='del'>-	vrev32.8	$H0,$H0</div><div class='del'>-	vrev32.8	$H1,$H1</div><div class='del'>-	vrev32.8	$H2,$H2</div><div class='del'>-	vrev32.8	$H3,$H3</div><div class='del'>-# endif</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ lazy reduction interleaved with base 2^32 -&gt; base 2^26 of</div><div class='del'>-	@ inp[0:3] previously loaded to $H0-$H3 and smashed to $H0-$H4.</div><div class='del'>-</div><div class='del'>-	vshr.u64	$T0,$D3,#26</div><div class='del'>-	vmovn.i64	$D3#lo,$D3</div><div class='del'>-	 vshr.u64	$T1,$D0,#26</div><div class='del'>-	 vmovn.i64	$D0#lo,$D0</div><div class='del'>-	vadd.i64	$D4,$D4,$T0		@ h3 -&gt; h4</div><div class='del'>-	vbic.i32	$D3#lo,#0xfc000000</div><div class='del'>-	  vsri.u32	$H4,$H3,#8		@ base 2^32 -&gt; base 2^26</div><div class='del'>-	 vadd.i64	$D1,$D1,$T1		@ h0 -&gt; h1</div><div class='del'>-	  vshl.u32	$H3,$H3,#18</div><div class='del'>-	 vbic.i32	$D0#lo,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vshrn.u64	$T0#lo,$D4,#26</div><div class='del'>-	vmovn.i64	$D4#lo,$D4</div><div class='del'>-	 vshr.u64	$T1,$D1,#26</div><div class='del'>-	 vmovn.i64	$D1#lo,$D1</div><div class='del'>-	 vadd.i64	$D2,$D2,$T1		@ h1 -&gt; h2</div><div class='del'>-	  vsri.u32	$H3,$H2,#14</div><div class='del'>-	vbic.i32	$D4#lo,#0xfc000000</div><div class='del'>-	  vshl.u32	$H2,$H2,#12</div><div class='del'>-	 vbic.i32	$D1#lo,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vadd.i32	$D0#lo,$D0#lo,$T0#lo</div><div class='del'>-	vshl.u32	$T0#lo,$T0#lo,#2</div><div class='del'>-	  vbic.i32	$H3,#0xfc000000</div><div class='del'>-	 vshrn.u64	$T1#lo,$D2,#26</div><div class='del'>-	 vmovn.i64	$D2#lo,$D2</div><div class='del'>-	vaddl.u32	$D0,$D0#lo,$T0#lo	@ h4 -&gt; h0 [widen for a sec]</div><div class='del'>-	  vsri.u32	$H2,$H1,#20</div><div class='del'>-	 vadd.i32	$D3#lo,$D3#lo,$T1#lo	@ h2 -&gt; h3</div><div class='del'>-	  vshl.u32	$H1,$H1,#6</div><div class='del'>-	 vbic.i32	$D2#lo,#0xfc000000</div><div class='del'>-	  vbic.i32	$H2,#0xfc000000</div><div class='del'>-</div><div class='del'>-	vshrn.u64	$T0#lo,$D0,#26		@ re-narrow</div><div class='del'>-	vmovn.i64	$D0#lo,$D0</div><div class='del'>-	  vsri.u32	$H1,$H0,#26</div><div class='del'>-	  vbic.i32	$H0,#0xfc000000</div><div class='del'>-	 vshr.u32	$T1#lo,$D3#lo,#26</div><div class='del'>-	 vbic.i32	$D3#lo,#0xfc000000</div><div class='del'>-	vbic.i32	$D0#lo,#0xfc000000</div><div class='del'>-	vadd.i32	$D1#lo,$D1#lo,$T0#lo	@ h0 -&gt; h1</div><div class='del'>-	 vadd.i32	$D4#lo,$D4#lo,$T1#lo	@ h3 -&gt; h4</div><div class='del'>-	  vbic.i32	$H1,#0xfc000000</div><div class='del'>-</div><div class='del'>-	bhi		.Loop_neon</div><div class='del'>-</div><div class='del'>-.Lskip_loop:</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1</div><div class='del'>-</div><div class='del'>-	add		$tbl1,$ctx,#(48+0*9*4)</div><div class='del'>-	add		$tbl0,$ctx,#(48+1*9*4)</div><div class='del'>-	adds		$len,$len,#32</div><div class='del'>-	it		ne</div><div class='del'>-	movne		$len,#0</div><div class='del'>-	bne		.Long_tail</div><div class='del'>-</div><div class='del'>-	vadd.i32	$H2#hi,$H2#lo,$D2#lo	@ add hash value and move to #hi</div><div class='del'>-	vadd.i32	$H0#hi,$H0#lo,$D0#lo</div><div class='del'>-	vadd.i32	$H3#hi,$H3#lo,$D3#lo</div><div class='del'>-	vadd.i32	$H1#hi,$H1#lo,$D1#lo</div><div class='del'>-	vadd.i32	$H4#hi,$H4#lo,$D4#lo</div><div class='del'>-</div><div class='del'>-.Long_tail:</div><div class='del'>-	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^1</div><div class='del'>-	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^2</div><div class='del'>-</div><div class='del'>-	vadd.i32	$H2#lo,$H2#lo,$D2#lo	@ can be redundant</div><div class='del'>-	vmull.u32	$D2,$H2#hi,$R0</div><div class='del'>-	vadd.i32	$H0#lo,$H0#lo,$D0#lo</div><div class='del'>-	vmull.u32	$D0,$H0#hi,$R0</div><div class='del'>-	vadd.i32	$H3#lo,$H3#lo,$D3#lo</div><div class='del'>-	vmull.u32	$D3,$H3#hi,$R0</div><div class='del'>-	vadd.i32	$H1#lo,$H1#lo,$D1#lo</div><div class='del'>-	vmull.u32	$D1,$H1#hi,$R0</div><div class='del'>-	vadd.i32	$H4#lo,$H4#lo,$D4#lo</div><div class='del'>-	vmull.u32	$D4,$H4#hi,$R0</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$H4#hi,$S1</div><div class='del'>-	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!</div><div class='del'>-	vmlal.u32	$D3,$H2#hi,$R1</div><div class='del'>-	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!</div><div class='del'>-	vmlal.u32	$D1,$H0#hi,$R1</div><div class='del'>-	vmlal.u32	$D4,$H3#hi,$R1</div><div class='del'>-	vmlal.u32	$D2,$H1#hi,$R1</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H1#hi,$R2</div><div class='del'>-	vld1.32		${S4}[1],[$tbl1,:32]</div><div class='del'>-	vmlal.u32	$D0,$H3#hi,$S2</div><div class='del'>-	vld1.32		${S4}[0],[$tbl0,:32]</div><div class='del'>-	vmlal.u32	$D4,$H2#hi,$R2</div><div class='del'>-	vmlal.u32	$D1,$H4#hi,$S2</div><div class='del'>-	vmlal.u32	$D2,$H0#hi,$R2</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H0#hi,$R3</div><div class='del'>-	 it		ne</div><div class='del'>-	 addne		$tbl1,$ctx,#(48+2*9*4)</div><div class='del'>-	vmlal.u32	$D0,$H2#hi,$S3</div><div class='del'>-	 it		ne</div><div class='del'>-	 addne		$tbl0,$ctx,#(48+3*9*4)</div><div class='del'>-	vmlal.u32	$D4,$H1#hi,$R3</div><div class='del'>-	vmlal.u32	$D1,$H3#hi,$S3</div><div class='del'>-	vmlal.u32	$D2,$H4#hi,$S3</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H4#hi,$S4</div><div class='del'>-	 vorn		$MASK,$MASK,$MASK	@ all-ones, can be redundant</div><div class='del'>-	vmlal.u32	$D0,$H1#hi,$S4</div><div class='del'>-	 vshr.u64	$MASK,$MASK,#38</div><div class='del'>-	vmlal.u32	$D4,$H0#hi,$R4</div><div class='del'>-	vmlal.u32	$D1,$H2#hi,$S4</div><div class='del'>-	vmlal.u32	$D2,$H3#hi,$S4</div><div class='del'>-</div><div class='del'>-	beq		.Lshort_tail</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ (hash+inp[0:1])*r^4:r^3 and accumulate</div><div class='del'>-</div><div class='del'>-	vld4.32		{${R0}[1],${R1}[1],${S1}[1],${R2}[1]},[$tbl1]!	@ load r^3</div><div class='del'>-	vld4.32		{${R0}[0],${R1}[0],${S1}[0],${R2}[0]},[$tbl0]!	@ load r^4</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D2,$H2#lo,$R0</div><div class='del'>-	vmlal.u32	$D0,$H0#lo,$R0</div><div class='del'>-	vmlal.u32	$D3,$H3#lo,$R0</div><div class='del'>-	vmlal.u32	$D1,$H1#lo,$R0</div><div class='del'>-	vmlal.u32	$D4,$H4#lo,$R0</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D0,$H4#lo,$S1</div><div class='del'>-	vld4.32		{${S2}[1],${R3}[1],${S3}[1],${R4}[1]},[$tbl1]!</div><div class='del'>-	vmlal.u32	$D3,$H2#lo,$R1</div><div class='del'>-	vld4.32		{${S2}[0],${R3}[0],${S3}[0],${R4}[0]},[$tbl0]!</div><div class='del'>-	vmlal.u32	$D1,$H0#lo,$R1</div><div class='del'>-	vmlal.u32	$D4,$H3#lo,$R1</div><div class='del'>-	vmlal.u32	$D2,$H1#lo,$R1</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H1#lo,$R2</div><div class='del'>-	vld1.32		${S4}[1],[$tbl1,:32]</div><div class='del'>-	vmlal.u32	$D0,$H3#lo,$S2</div><div class='del'>-	vld1.32		${S4}[0],[$tbl0,:32]</div><div class='del'>-	vmlal.u32	$D4,$H2#lo,$R2</div><div class='del'>-	vmlal.u32	$D1,$H4#lo,$S2</div><div class='del'>-	vmlal.u32	$D2,$H0#lo,$R2</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H0#lo,$R3</div><div class='del'>-	vmlal.u32	$D0,$H2#lo,$S3</div><div class='del'>-	vmlal.u32	$D4,$H1#lo,$R3</div><div class='del'>-	vmlal.u32	$D1,$H3#lo,$S3</div><div class='del'>-	vmlal.u32	$D2,$H4#lo,$S3</div><div class='del'>-</div><div class='del'>-	vmlal.u32	$D3,$H4#lo,$S4</div><div class='del'>-	 vorn		$MASK,$MASK,$MASK	@ all-ones</div><div class='del'>-	vmlal.u32	$D0,$H1#lo,$S4</div><div class='del'>-	 vshr.u64	$MASK,$MASK,#38</div><div class='del'>-	vmlal.u32	$D4,$H0#lo,$R4</div><div class='del'>-	vmlal.u32	$D1,$H2#lo,$S4</div><div class='del'>-	vmlal.u32	$D2,$H3#lo,$S4</div><div class='del'>-</div><div class='del'>-.Lshort_tail:</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ horizontal addition</div><div class='del'>-</div><div class='del'>-	vadd.i64	$D3#lo,$D3#lo,$D3#hi</div><div class='del'>-	vadd.i64	$D0#lo,$D0#lo,$D0#hi</div><div class='del'>-	vadd.i64	$D4#lo,$D4#lo,$D4#hi</div><div class='del'>-	vadd.i64	$D1#lo,$D1#lo,$D1#hi</div><div class='del'>-	vadd.i64	$D2#lo,$D2#lo,$D2#hi</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ lazy reduction, but without narrowing</div><div class='del'>-</div><div class='del'>-	vshr.u64	$T0,$D3,#26</div><div class='del'>-	vand.i64	$D3,$D3,$MASK</div><div class='del'>-	 vshr.u64	$T1,$D0,#26</div><div class='del'>-	 vand.i64	$D0,$D0,$MASK</div><div class='del'>-	vadd.i64	$D4,$D4,$T0		@ h3 -&gt; h4</div><div class='del'>-	 vadd.i64	$D1,$D1,$T1		@ h0 -&gt; h1</div><div class='del'>-</div><div class='del'>-	vshr.u64	$T0,$D4,#26</div><div class='del'>-	vand.i64	$D4,$D4,$MASK</div><div class='del'>-	 vshr.u64	$T1,$D1,#26</div><div class='del'>-	 vand.i64	$D1,$D1,$MASK</div><div class='del'>-	 vadd.i64	$D2,$D2,$T1		@ h1 -&gt; h2</div><div class='del'>-</div><div class='del'>-	vadd.i64	$D0,$D0,$T0</div><div class='del'>-	vshl.u64	$T0,$T0,#2</div><div class='del'>-	 vshr.u64	$T1,$D2,#26</div><div class='del'>-	 vand.i64	$D2,$D2,$MASK</div><div class='del'>-	vadd.i64	$D0,$D0,$T0		@ h4 -&gt; h0</div><div class='del'>-	 vadd.i64	$D3,$D3,$T1		@ h2 -&gt; h3</div><div class='del'>-</div><div class='del'>-	vshr.u64	$T0,$D0,#26</div><div class='del'>-	vand.i64	$D0,$D0,$MASK</div><div class='del'>-	 vshr.u64	$T1,$D3,#26</div><div class='del'>-	 vand.i64	$D3,$D3,$MASK</div><div class='del'>-	vadd.i64	$D1,$D1,$T0		@ h0 -&gt; h1</div><div class='del'>-	 vadd.i64	$D4,$D4,$T1		@ h3 -&gt; h4</div><div class='del'>-</div><div class='del'>-	cmp		$len,#0</div><div class='del'>-	bne		.Leven</div><div class='del'>-</div><div class='del'>-	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@</div><div class='del'>-	@ store hash value</div><div class='del'>-</div><div class='del'>-	vst4.32		{$D0#lo[0],$D1#lo[0],$D2#lo[0],$D3#lo[0]},[$ctx]!</div><div class='del'>-	vst1.32		{$D4#lo[0]},[$ctx]</div><div class='del'>-</div><div class='del'>-	vldmia	sp!,{d8-d15}			@ epilogue</div><div class='del'>-	ldmia	sp!,{r4-r7}</div><div class='del'>-	ret					@ bx	lr</div><div class='del'>-.size	poly1305_blocks_neon,.-poly1305_blocks_neon</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-.Lzeros:</div><div class='del'>-.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-.LOPENSSL_armcap:</div><div class='del'>-# ifdef	_WIN32</div><div class='del'>-.word	OPENSSL_armcap_P</div><div class='del'>-# else</div><div class='del'>-.word	OPENSSL_armcap_P-.Lpoly1305_init</div><div class='del'>-# endif</div><div class='del'>-.comm	OPENSSL_armcap_P,4,4</div><div class='del'>-.hidden	OPENSSL_armcap_P</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-}	}</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.asciz	"Poly1305 for ARMv4/NEON, CRYPTOGAMS by \@dot-asm"</div><div class='del'>-.align	2</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-foreach (split("\n",$code)) {</div><div class='del'>-	s/\`([^\`]*)\`/eval $1/geo;</div><div class='del'>-</div><div class='del'>-	s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo	or</div><div class='del'>-	s/\bret\b/bx	lr/go						or</div><div class='del'>-	s/\bbx\s+lr\b/.word\t0xe12fff1e/go;	# make it possible to compile with -march=armv4</div><div class='del'>-</div><div class='del'>-	print $_,"\n";</div><div class='del'>-}</div><div class='del'>-close STDOUT; # enforce flush</div><div class='head'>diff --git a/arch/arm/crypto/poly1305-glue.c b/arch/arm/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index 4464ffbf8fd1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/poly1305-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,274 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for ARM</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-void poly1305_init_arm(void *state, const u8 *key);</div><div class='del'>-void poly1305_blocks_arm(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-void poly1305_emit_arm(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_arm(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void arm_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_arm(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; likely(do_neon))</div><div class='del'>-		poly1305_blocks_neon(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-	else</div><div class='del'>-		poly1305_blocks_arm(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void arm_poly1305_do_update(struct poly1305_desc_ctx *dctx,</div><div class='del'>-				    const u8 *src, u32 len, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			arm_poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='del'>-					    POLY1305_BLOCK_SIZE, 1, false);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		arm_poly1305_blocks(dctx, src, len, 1, do_neon);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_update(struct shash_desc *desc,</div><div class='del'>-			       const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	arm_poly1305_do_update(dctx, src, srclen, false);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused arm_poly1305_update_neon(struct shash_desc *desc,</div><div class='del'>-						   const u8 *src,</div><div class='del'>-						   unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	bool do_neon = crypto_simd_usable() &amp;&amp; srclen &gt; 128;</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-	arm_poly1305_do_update(dctx, src, srclen, do_neon);</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	bool do_neon = IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='del'>-		       crypto_simd_usable();</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks_arm(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-					    POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon) {</div><div class='del'>-			do {</div><div class='del'>-				unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='del'>-</div><div class='del'>-				kernel_neon_begin();</div><div class='del'>-				poly1305_blocks_neon(&amp;dctx-&gt;h, src, todo, 1);</div><div class='del'>-				kernel_neon_end();</div><div class='del'>-</div><div class='del'>-				len -= todo;</div><div class='del'>-				src += todo;</div><div class='del'>-			} while (len);</div><div class='del'>-		} else {</div><div class='del'>-			poly1305_blocks_arm(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-			src += len;</div><div class='del'>-		}</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks_arm(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_arm(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	*dctx = (struct poly1305_desc_ctx){};</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg arm_poly1305_algs[] = {{</div><div class='del'>-	.init			= arm_poly1305_init,</div><div class='del'>-	.update			= arm_poly1305_update,</div><div class='del'>-	.final			= arm_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-arm",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_KERNEL_MODE_NEON</div><div class='del'>-}, {</div><div class='del'>-	.init			= arm_poly1305_init,</div><div class='del'>-	.update			= arm_poly1305_update_neon,</div><div class='del'>-	.final			= arm_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-neon",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-#endif</div><div class='del'>-}};</div><div class='del'>-</div><div class='del'>-static int __init arm_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='del'>-	    (elf_hwcap &amp; HWCAP_NEON))</div><div class='del'>-		static_branch_enable(&amp;have_neon);</div><div class='del'>-	else if (IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		/* register only the first entry */</div><div class='del'>-		return crypto_register_shash(&amp;arm_poly1305_algs[0]);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shashes(arm_poly1305_algs,</div><div class='del'>-					ARRAY_SIZE(arm_poly1305_algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit arm_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		return;</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon)) {</div><div class='del'>-		crypto_unregister_shash(&amp;arm_poly1305_algs[0]);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	crypto_unregister_shashes(arm_poly1305_algs,</div><div class='del'>-				  ARRAY_SIZE(arm_poly1305_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(arm_poly1305_mod_init);</div><div class='del'>-module_exit(arm_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Accelerated Poly1305 transform for ARM");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-neon");</div><div class='head'>diff --git a/arch/arm/crypto/sha1-armv4-large.S b/arch/arm/crypto/sha1-armv4-large.S<br/>deleted file mode 100644<br/>index 1c8b685149f2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1-armv4-large.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-armv4-large.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,507 +0,0 @@</div><div class='del'>-#define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-@ SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-@ This code is taken from the OpenSSL project but the author (Andy Polyakov)</div><div class='del'>-@ has relicensed it under the GPLv2. Therefore this program is free software;</div><div class='del'>-@ you can redistribute it and/or modify it under the terms of the GNU General</div><div class='del'>-@ Public License version 2 as published by the Free Software Foundation.</div><div class='del'>-@</div><div class='del'>-@ The original headers, including the original license headers, are</div><div class='del'>-@ included below for completeness.</div><div class='del'>-</div><div class='del'>-@ ====================================================================</div><div class='del'>-@ Written by Andy Polyakov &lt;appro@fy.chalmers.se&gt; for the OpenSSL</div><div class='del'>-@ project. The module is, however, dual licensed under OpenSSL and</div><div class='del'>-@ CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='del'>-@ details see https://www.openssl.org/~appro/cryptogams/.</div><div class='del'>-@ ====================================================================</div><div class='del'>-</div><div class='del'>-@ sha1_block procedure for ARMv4.</div><div class='del'>-@</div><div class='del'>-@ January 2007.</div><div class='del'>-</div><div class='del'>-@ Size/performance trade-off</div><div class='del'>-@ ====================================================================</div><div class='del'>-@ impl		size in bytes	comp cycles[*]	measured performance</div><div class='del'>-@ ====================================================================</div><div class='del'>-@ thumb		304		3212		4420</div><div class='del'>-@ armv4-small	392/+29%	1958/+64%	2250/+96%</div><div class='del'>-@ armv4-compact	740/+89%	1552/+26%	1840/+22%</div><div class='del'>-@ armv4-large	1420/+92%	1307/+19%	1370/+34%[***]</div><div class='del'>-@ full unroll	~5100/+260%	~1260/+4%	~1300/+5%</div><div class='del'>-@ ====================================================================</div><div class='del'>-@ thumb		= same as 'small' but in Thumb instructions[**] and</div><div class='del'>-@		  with recurring code in two private functions;</div><div class='del'>-@ small		= detached Xload/update, loops are folded;</div><div class='del'>-@ compact	= detached Xload/update, 5x unroll;</div><div class='del'>-@ large		= interleaved Xload/update, 5x unroll;</div><div class='del'>-@ full unroll	= interleaved Xload/update, full unroll, estimated[!];</div><div class='del'>-@</div><div class='del'>-@ [*]	Manually counted instructions in "grand" loop body. Measured</div><div class='del'>-@	performance is affected by prologue and epilogue overhead,</div><div class='del'>-@	i-cache availability, branch penalties, etc.</div><div class='del'>-@ [**]	While each Thumb instruction is twice smaller, they are not as</div><div class='del'>-@	diverse as ARM ones: e.g., there are only two arithmetic</div><div class='del'>-@	instructions with 3 arguments, no [fixed] rotate, addressing</div><div class='del'>-@	modes are limited. As result it takes more instructions to do</div><div class='del'>-@	the same job in Thumb, therefore the code is never twice as</div><div class='del'>-@	small and always slower.</div><div class='del'>-@ [***]	which is also ~35% better than compiler generated code. Dual-</div><div class='del'>-@	issue Cortex A8 core was measured to process input block in</div><div class='del'>-@	~990 cycles.</div><div class='del'>-</div><div class='del'>-@ August 2010.</div><div class='del'>-@</div><div class='del'>-@ Rescheduling for dual-issue pipeline resulted in 13% improvement on</div><div class='del'>-@ Cortex A8 core and in absolute terms ~870 cycles per input block</div><div class='del'>-@ [or 13.6 cycles per byte].</div><div class='del'>-</div><div class='del'>-@ February 2011.</div><div class='del'>-@</div><div class='del'>-@ Profiler-assisted and platform-specific optimization resulted in 10%</div><div class='del'>-@ improvement on Cortex A8 core and 12.2 cycles per byte.</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.align	2</div><div class='del'>-ENTRY(sha1_block_data_order)</div><div class='del'>-	stmdb	sp!,{r4-r12,lr}</div><div class='del'>-	add	r2,r1,r2,lsl#6	@ r2 to point at the end of r1</div><div class='del'>-	ldmia	r0,{r3,r4,r5,r6,r7}</div><div class='del'>-.Lloop:</div><div class='del'>-	ldr	r8,.LK_00_19</div><div class='del'>-	mov	r14,sp</div><div class='del'>-	sub	sp,sp,#15*4</div><div class='del'>-	mov	r5,r5,ror#30</div><div class='del'>-	mov	r6,r6,ror#30</div><div class='del'>-	mov	r7,r7,ror#30		@ [6]</div><div class='del'>-.L_00_15:</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r4,r10,ror#2</div><div class='del'>-	add	r7,r7,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r6,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r7,r7,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r6,r8,r6,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r4,r5			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r6,r8,r6,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r4,r5			@ F_xx_xx</div><div class='del'>-	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r3,r10,ror#2</div><div class='del'>-	add	r6,r6,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r5,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r6,r6,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r5,r8,r5,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r3,r4			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r5,r8,r5,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r3,r4			@ F_xx_xx</div><div class='del'>-	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r7,r10,ror#2</div><div class='del'>-	add	r5,r5,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r4,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r5,r5,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r4,r8,r4,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r7,r3			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r4,r8,r4,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r7,r3			@ F_xx_xx</div><div class='del'>-	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r6,r10,ror#2</div><div class='del'>-	add	r4,r4,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r3,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r4,r4,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r3,r8,r3,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r6,r7			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r3,r8,r3,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r6,r7			@ F_xx_xx</div><div class='del'>-	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r5,r10,ror#2</div><div class='del'>-	add	r3,r3,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r7,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r3,r3,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-	cmp	r14,sp</div><div class='del'>-	bne	.L_00_15		@ [((11+4)*5+2)*3]</div><div class='del'>-	sub	sp,sp,#25*4</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	r10,[r1,#2]</div><div class='del'>-	ldrb	r9,[r1,#3]</div><div class='del'>-	ldrb	r11,[r1,#1]</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_00_19</div><div class='del'>-	ldrb	r12,[r1],#4</div><div class='del'>-	orr	r9,r9,r10,lsl#8</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	orr	r9,r9,r11,lsl#16</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	orr	r9,r9,r12,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	r9,[r1],#4			@ handles unaligned</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_00_19</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	r9,r9				@ byte swap</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-	and	r10,r4,r10,ror#2</div><div class='del'>-	add	r7,r7,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r6,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	add	r7,r7,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r6,r8,r6,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r4,r5			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r3,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r6,r6,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r5,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	add	r6,r6,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r5,r8,r5,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r3,r4			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r7,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r5,r5,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r4,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	add	r5,r5,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r4,r8,r4,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r7,r3			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r6,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r4,r4,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r3,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	add	r4,r4,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r3,r8,r3,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r6,r7			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r5,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r3,r3,r9			@ E+=X[i]</div><div class='del'>-	eor	r10,r10,r7,ror#2		@ F_00_19(B,C,D)</div><div class='del'>-	add	r3,r3,r10			@ E+=F_00_19(B,C,D)</div><div class='del'>-</div><div class='del'>-	ldr	r8,.LK_20_39		@ [+15+16*4]</div><div class='del'>-	cmn	sp,#0			@ [+3], clear carry to denote 20_39</div><div class='del'>-.L_20_39_or_60_79:</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	eor r10,r4,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r7,r7,r9			@ E+=X[i]</div><div class='del'>-	add	r7,r7,r10			@ E+=F_20_39(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r6,r8,r6,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r4,r5			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	eor r10,r3,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r6,r6,r9			@ E+=X[i]</div><div class='del'>-	add	r6,r6,r10			@ E+=F_20_39(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r5,r8,r5,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r3,r4			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	eor r10,r7,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r5,r5,r9			@ E+=X[i]</div><div class='del'>-	add	r5,r5,r10			@ E+=F_20_39(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r4,r8,r4,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r7,r3			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	eor r10,r6,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r4,r4,r9			@ E+=X[i]</div><div class='del'>-	add	r4,r4,r10			@ E+=F_20_39(B,C,D)</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r3,r8,r3,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r6,r7			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	eor r10,r5,r10,ror#2					@ F_xx_xx</div><div class='del'>-						@ F_xx_xx</div><div class='del'>-	add	r3,r3,r9			@ E+=X[i]</div><div class='del'>-	add	r3,r3,r10			@ E+=F_20_39(B,C,D)</div><div class='del'>- ARM(	teq	r14,sp		)	@ preserve carry</div><div class='del'>- THUMB(	mov	r11,sp		)</div><div class='del'>- THUMB(	teq	r14,r11		)	@ preserve carry</div><div class='del'>-	bne	.L_20_39_or_60_79	@ [+((12+3)*5+2)*4]</div><div class='del'>-	bcs	.L_done			@ [+((12+3)*5+2)*4], spare 300 bytes</div><div class='del'>-</div><div class='del'>-	ldr	r8,.LK_40_59</div><div class='del'>-	sub	sp,sp,#20*4		@ [+2]</div><div class='del'>-.L_40_59:</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r7,r8,r7,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r5,r6			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r7,r7,r3,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r4,r10,ror#2					@ F_xx_xx</div><div class='del'>-	and r11,r5,r6					@ F_xx_xx</div><div class='del'>-	add	r7,r7,r9			@ E+=X[i]</div><div class='del'>-	add	r7,r7,r10			@ E+=F_40_59(B,C,D)</div><div class='del'>-	add	r7,r7,r11,ror#2</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r6,r8,r6,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r4,r5			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r6,r6,r7,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r3,r10,ror#2					@ F_xx_xx</div><div class='del'>-	and r11,r4,r5					@ F_xx_xx</div><div class='del'>-	add	r6,r6,r9			@ E+=X[i]</div><div class='del'>-	add	r6,r6,r10			@ E+=F_40_59(B,C,D)</div><div class='del'>-	add	r6,r6,r11,ror#2</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r5,r8,r5,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r3,r4			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r5,r5,r6,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r7,r10,ror#2					@ F_xx_xx</div><div class='del'>-	and r11,r3,r4					@ F_xx_xx</div><div class='del'>-	add	r5,r5,r9			@ E+=X[i]</div><div class='del'>-	add	r5,r5,r10			@ E+=F_40_59(B,C,D)</div><div class='del'>-	add	r5,r5,r11,ror#2</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r4,r8,r4,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r7,r3			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r4,r4,r5,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r6,r10,ror#2					@ F_xx_xx</div><div class='del'>-	and r11,r7,r3					@ F_xx_xx</div><div class='del'>-	add	r4,r4,r9			@ E+=X[i]</div><div class='del'>-	add	r4,r4,r10			@ E+=F_40_59(B,C,D)</div><div class='del'>-	add	r4,r4,r11,ror#2</div><div class='del'>-	ldr	r9,[r14,#15*4]</div><div class='del'>-	ldr	r10,[r14,#13*4]</div><div class='del'>-	ldr	r11,[r14,#7*4]</div><div class='del'>-	add	r3,r8,r3,ror#2			@ E+=K_xx_xx</div><div class='del'>-	ldr	r12,[r14,#2*4]</div><div class='del'>-	eor	r9,r9,r10</div><div class='del'>-	eor	r11,r11,r12			@ 1 cycle stall</div><div class='del'>-	eor	r10,r6,r7			@ F_xx_xx</div><div class='del'>-	mov	r9,r9,ror#31</div><div class='del'>-	add	r3,r3,r4,ror#27			@ E+=ROR(A,27)</div><div class='del'>-	eor	r9,r9,r11,ror#31</div><div class='del'>-	str	r9,[r14,#-4]!</div><div class='del'>-	and r10,r5,r10,ror#2					@ F_xx_xx</div><div class='del'>-	and r11,r6,r7					@ F_xx_xx</div><div class='del'>-	add	r3,r3,r9			@ E+=X[i]</div><div class='del'>-	add	r3,r3,r10			@ E+=F_40_59(B,C,D)</div><div class='del'>-	add	r3,r3,r11,ror#2</div><div class='del'>-	cmp	r14,sp</div><div class='del'>-	bne	.L_40_59		@ [+((12+5)*5+2)*4]</div><div class='del'>-</div><div class='del'>-	ldr	r8,.LK_60_79</div><div class='del'>-	sub	sp,sp,#20*4</div><div class='del'>-	cmp	sp,#0			@ set carry to denote 60_79</div><div class='del'>-	b	.L_20_39_or_60_79	@ [+4], spare 300 bytes</div><div class='del'>-.L_done:</div><div class='del'>-	add	sp,sp,#80*4		@ "deallocate" stack frame</div><div class='del'>-	ldmia	r0,{r8,r9,r10,r11,r12}</div><div class='del'>-	add	r3,r8,r3</div><div class='del'>-	add	r4,r9,r4</div><div class='del'>-	add	r5,r10,r5,ror#2</div><div class='del'>-	add	r6,r11,r6,ror#2</div><div class='del'>-	add	r7,r12,r7,ror#2</div><div class='del'>-	stmia	r0,{r3,r4,r5,r6,r7}</div><div class='del'>-	teq	r1,r2</div><div class='del'>-	bne	.Lloop			@ [+18], total 1307</div><div class='del'>-</div><div class='del'>-	ldmia	sp!,{r4-r12,pc}</div><div class='del'>-.align	2</div><div class='del'>-.LK_00_19:	.word	0x5a827999</div><div class='del'>-.LK_20_39:	.word	0x6ed9eba1</div><div class='del'>-.LK_40_59:	.word	0x8f1bbcdc</div><div class='del'>-.LK_60_79:	.word	0xca62c1d6</div><div class='del'>-ENDPROC(sha1_block_data_order)</div><div class='del'>-.asciz	"SHA1 block transform for ARMv4, CRYPTOGAMS by &lt;appro@openssl.org&gt;"</div><div class='del'>-.align	2</div><div class='head'>diff --git a/arch/arm/crypto/sha1-armv7-neon.S b/arch/arm/crypto/sha1-armv7-neon.S<br/>deleted file mode 100644<br/>index 28d816a6a530..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1-armv7-neon.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-armv7-neon.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,634 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/* sha1-armv7-neon.S - ARM/NEON accelerated SHA-1 transform function</div><div class='del'>- *</div><div class='del'>- * Copyright © 2013-2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-.syntax unified</div><div class='del'>-.fpu neon</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Context structure */</div><div class='del'>-</div><div class='del'>-#define state_h0 0</div><div class='del'>-#define state_h1 4</div><div class='del'>-#define state_h2 8</div><div class='del'>-#define state_h3 12</div><div class='del'>-#define state_h4 16</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Constants */</div><div class='del'>-</div><div class='del'>-#define K1  0x5A827999</div><div class='del'>-#define K2  0x6ED9EBA1</div><div class='del'>-#define K3  0x8F1BBCDC</div><div class='del'>-#define K4  0xCA62C1D6</div><div class='del'>-.align 4</div><div class='del'>-.LK_VEC:</div><div class='del'>-.LK1:	.long K1, K1, K1, K1</div><div class='del'>-.LK2:	.long K2, K2, K2, K2</div><div class='del'>-.LK3:	.long K3, K3, K3, K3</div><div class='del'>-.LK4:	.long K4, K4, K4, K4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Register macros */</div><div class='del'>-</div><div class='del'>-#define RSTATE r0</div><div class='del'>-#define RDATA r1</div><div class='del'>-#define RNBLKS r2</div><div class='del'>-#define ROLDSTACK r3</div><div class='del'>-#define RWK lr</div><div class='del'>-</div><div class='del'>-#define _a r4</div><div class='del'>-#define _b r5</div><div class='del'>-#define _c r6</div><div class='del'>-#define _d r7</div><div class='del'>-#define _e r8</div><div class='del'>-</div><div class='del'>-#define RT0 r9</div><div class='del'>-#define RT1 r10</div><div class='del'>-#define RT2 r11</div><div class='del'>-#define RT3 r12</div><div class='del'>-</div><div class='del'>-#define W0 q0</div><div class='del'>-#define W1 q7</div><div class='del'>-#define W2 q2</div><div class='del'>-#define W3 q3</div><div class='del'>-#define W4 q4</div><div class='del'>-#define W5 q6</div><div class='del'>-#define W6 q5</div><div class='del'>-#define W7 q1</div><div class='del'>-</div><div class='del'>-#define tmp0 q8</div><div class='del'>-#define tmp1 q9</div><div class='del'>-#define tmp2 q10</div><div class='del'>-#define tmp3 q11</div><div class='del'>-</div><div class='del'>-#define qK1 q12</div><div class='del'>-#define qK2 q13</div><div class='del'>-#define qK3 q14</div><div class='del'>-#define qK4 q15</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-#define ARM_LE(code...)</div><div class='del'>-#else</div><div class='del'>-#define ARM_LE(code...)		code</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Round function macros. */</div><div class='del'>-</div><div class='del'>-#define WK_offs(i) (((i) &amp; 15) * 4)</div><div class='del'>-</div><div class='del'>-#define _R_F1(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	      W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	ldr RT3, [sp, WK_offs(i)]; \</div><div class='del'>-		pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	bic RT0, d, b; \</div><div class='del'>-	add e, e, a, ror #(32 - 5); \</div><div class='del'>-	and RT1, c, b; \</div><div class='del'>-		pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	add RT0, RT0, RT3; \</div><div class='del'>-	add e, e, RT1; \</div><div class='del'>-	ror b, #(32 - 30); \</div><div class='del'>-		pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	add e, e, RT0;</div><div class='del'>-</div><div class='del'>-#define _R_F2(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	      W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	ldr RT3, [sp, WK_offs(i)]; \</div><div class='del'>-		pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	eor RT0, d, b; \</div><div class='del'>-	add e, e, a, ror #(32 - 5); \</div><div class='del'>-	eor RT0, RT0, c; \</div><div class='del'>-		pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	add e, e, RT3; \</div><div class='del'>-	ror b, #(32 - 30); \</div><div class='del'>-		pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	add e, e, RT0; \</div><div class='del'>-</div><div class='del'>-#define _R_F3(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	      W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	ldr RT3, [sp, WK_offs(i)]; \</div><div class='del'>-		pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	eor RT0, b, c; \</div><div class='del'>-	and RT1, b, c; \</div><div class='del'>-	add e, e, a, ror #(32 - 5); \</div><div class='del'>-		pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	and RT0, RT0, d; \</div><div class='del'>-	add RT1, RT1, RT3; \</div><div class='del'>-	add e, e, RT0; \</div><div class='del'>-	ror b, #(32 - 30); \</div><div class='del'>-		pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \</div><div class='del'>-	add e, e, RT1;</div><div class='del'>-</div><div class='del'>-#define _R_F4(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	      W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	_R_F2(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	      W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28)</div><div class='del'>-</div><div class='del'>-#define _R(a,b,c,d,e,f,i,pre1,pre2,pre3,i16,\</div><div class='del'>-           W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	_R_##f(a,b,c,d,e,i,pre1,pre2,pre3,i16,\</div><div class='del'>-	       W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28)</div><div class='del'>-</div><div class='del'>-#define R(a,b,c,d,e,f,i) \</div><div class='del'>-	_R_##f(a,b,c,d,e,i,dummy,dummy,dummy,i16,\</div><div class='del'>-	       W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28)</div><div class='del'>-</div><div class='del'>-#define dummy(...)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Input expansion macros. */</div><div class='del'>-</div><div class='del'>-/********* Precalc macros for rounds 0-15 *************************************/</div><div class='del'>-</div><div class='del'>-#define W_PRECALC_00_15() \</div><div class='del'>-	add       RWK, sp, #(WK_offs(0));			\</div><div class='del'>-	\</div><div class='del'>-	vld1.32   {W0, W7}, [RDATA]!;				\</div><div class='del'>- ARM_LE(vrev32.8  W0, W0;	)	/* big =&gt; little */	\</div><div class='del'>-	vld1.32   {W6, W5}, [RDATA]!;				\</div><div class='del'>-	vadd.u32  tmp0, W0, curK;				\</div><div class='del'>- ARM_LE(vrev32.8  W7, W7;	)	/* big =&gt; little */	\</div><div class='del'>- ARM_LE(vrev32.8  W6, W6;	)	/* big =&gt; little */	\</div><div class='del'>-	vadd.u32  tmp1, W7, curK;				\</div><div class='del'>- ARM_LE(vrev32.8  W5, W5;	)	/* big =&gt; little */	\</div><div class='del'>-	vadd.u32  tmp2, W6, curK;				\</div><div class='del'>-	vst1.32   {tmp0, tmp1}, [RWK]!;				\</div><div class='del'>-	vadd.u32  tmp3, W5, curK;				\</div><div class='del'>-	vst1.32   {tmp2, tmp3}, [RWK];				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vld1.32   {W0, W7}, [RDATA]!;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	add       RWK, sp, #(WK_offs(0));			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>- ARM_LE(vrev32.8  W0, W0;	)	/* big =&gt; little */	\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vld1.32   {W6, W5}, [RDATA]!;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32  tmp0, W0, curK;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>- ARM_LE(vrev32.8  W7, W7;	)	/* big =&gt; little */	\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>- ARM_LE(vrev32.8  W6, W6;	)	/* big =&gt; little */	\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32  tmp1, W7, curK;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>- ARM_LE(vrev32.8  W5, W5;	)	/* big =&gt; little */	\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32  tmp2, W6, curK;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_10(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vst1.32   {tmp0, tmp1}, [RWK]!;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_11(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32  tmp3, W5, curK;				\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_00_15_12(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vst1.32   {tmp2, tmp3}, [RWK];				\</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/********* Precalc macros for rounds 16-31 ************************************/</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor      tmp0, tmp0;			\</div><div class='del'>-	vext.8    W, W_m16, W_m12, #8;		\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	add       RWK, sp, #(WK_offs(i));	\</div><div class='del'>-	vext.8    tmp0, W_m04, tmp0, #4;	\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor      tmp0, tmp0, W_m16;		\</div><div class='del'>-	veor.32   W, W, W_m08;			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor      tmp1, tmp1;			\</div><div class='del'>-	veor      W, W, tmp0;			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vshl.u32  tmp0, W, #1;			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vext.8    tmp1, tmp1, W, #(16-12);	\</div><div class='del'>-	vshr.u32  W, W, #31;			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vorr      tmp0, tmp0, W;		\</div><div class='del'>-	vshr.u32  W, tmp1, #30;			\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vshl.u32  tmp1, tmp1, #2;		\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor      tmp0, tmp0, W;		\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor      W, tmp0, tmp1;		\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_10(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32  tmp0, W, curK;		\</div><div class='del'>-</div><div class='del'>-#define WPRECALC_16_31_11(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vst1.32   {tmp0}, [RWK];</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/********* Precalc macros for rounds 32-79 ************************************/</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor W, W_m28; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vext.8 tmp0, W_m08, W_m04, #8; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor W, W_m16; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	veor W, tmp0; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	add RWK, sp, #(WK_offs(i&amp;~3)); \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vshl.u32 tmp1, W, #2; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vshr.u32 tmp0, W, #30; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vorr W, tmp0, tmp1; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vadd.u32 tmp0, W, curK; \</div><div class='del'>-</div><div class='del'>-#define WPRECALC_32_79_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \</div><div class='del'>-	vst1.32 {tmp0}, [RWK];</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Transform nblks*64 bytes (nblks*16 32-bit words) at DATA.</div><div class='del'>- *</div><div class='del'>- * unsigned int</div><div class='del'>- * sha1_transform_neon (void *ctx, const unsigned char *data,</div><div class='del'>- *                      unsigned int nblks)</div><div class='del'>- */</div><div class='del'>-.align 3</div><div class='del'>-ENTRY(sha1_transform_neon)</div><div class='del'>-  /* input:</div><div class='del'>-   *	r0: ctx, CTX</div><div class='del'>-   *	r1: data (64*nblks bytes)</div><div class='del'>-   *	r2: nblks</div><div class='del'>-   */</div><div class='del'>-</div><div class='del'>-  cmp RNBLKS, #0;</div><div class='del'>-  beq .Ldo_nothing;</div><div class='del'>-</div><div class='del'>-  push {r4-r12, lr};</div><div class='del'>-  /*vpush {q4-q7};*/</div><div class='del'>-</div><div class='del'>-  adr RT3, .LK_VEC;</div><div class='del'>-</div><div class='del'>-  mov ROLDSTACK, sp;</div><div class='del'>-</div><div class='del'>-  /* Align stack. */</div><div class='del'>-  sub RT0, sp, #(16*4);</div><div class='del'>-  and RT0, #(~(16-1));</div><div class='del'>-  mov sp, RT0;</div><div class='del'>-</div><div class='del'>-  vld1.32 {qK1-qK2}, [RT3]!; /* Load K1,K2 */</div><div class='del'>-</div><div class='del'>-  /* Get the values of the chaining variables. */</div><div class='del'>-  ldm RSTATE, {_a-_e};</div><div class='del'>-</div><div class='del'>-  vld1.32 {qK3-qK4}, [RT3]; /* Load K3,K4 */</div><div class='del'>-</div><div class='del'>-#undef curK</div><div class='del'>-#define curK qK1</div><div class='del'>-  /* Precalc 0-15. */</div><div class='del'>-  W_PRECALC_00_15();</div><div class='del'>-</div><div class='del'>-.Loop:</div><div class='del'>-  /* Transform 0-15 + Precalc 16-31. */</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F1,  0,</div><div class='del'>-      WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 16,</div><div class='del'>-      W4, W5, W6, W7, W0, _, _, _ );</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F1,  1,</div><div class='del'>-      WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 16,</div><div class='del'>-      W4, W5, W6, W7, W0, _, _, _ );</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F1,  2,</div><div class='del'>-      WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 16,</div><div class='del'>-      W4, W5, W6, W7, W0, _, _, _ );</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F1,  3,</div><div class='del'>-      WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,16,</div><div class='del'>-      W4, W5, W6, W7, W0, _, _, _ );</div><div class='del'>-</div><div class='del'>-#undef curK</div><div class='del'>-#define curK qK2</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F1,  4,</div><div class='del'>-      WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 20,</div><div class='del'>-      W3, W4, W5, W6, W7, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F1,  5,</div><div class='del'>-      WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 20,</div><div class='del'>-      W3, W4, W5, W6, W7, _, _, _ );</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F1,  6,</div><div class='del'>-      WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 20,</div><div class='del'>-      W3, W4, W5, W6, W7, _, _, _ );</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F1,  7,</div><div class='del'>-      WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,20,</div><div class='del'>-      W3, W4, W5, W6, W7, _, _, _ );</div><div class='del'>-</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F1,  8,</div><div class='del'>-      WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 24,</div><div class='del'>-      W2, W3, W4, W5, W6, _, _, _ );</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F1,  9,</div><div class='del'>-      WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 24,</div><div class='del'>-      W2, W3, W4, W5, W6, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F1, 10,</div><div class='del'>-      WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 24,</div><div class='del'>-      W2, W3, W4, W5, W6, _, _, _ );</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F1, 11,</div><div class='del'>-      WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,24,</div><div class='del'>-      W2, W3, W4, W5, W6, _, _, _ );</div><div class='del'>-</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F1, 12,</div><div class='del'>-      WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 28,</div><div class='del'>-      W1, W2, W3, W4, W5, _, _, _ );</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F1, 13,</div><div class='del'>-      WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 28,</div><div class='del'>-      W1, W2, W3, W4, W5, _, _, _ );</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F1, 14,</div><div class='del'>-      WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 28,</div><div class='del'>-      W1, W2, W3, W4, W5, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F1, 15,</div><div class='del'>-      WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,28,</div><div class='del'>-      W1, W2, W3, W4, W5, _, _, _ );</div><div class='del'>-</div><div class='del'>-  /* Transform 16-63 + Precalc 32-79. */</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F1, 16,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 32,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F1, 17,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 32,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F1, 18,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 32,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F1, 19,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 32,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F2, 20,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 36,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F2, 21,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 36,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F2, 22,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 36,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F2, 23,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 36,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-</div><div class='del'>-#undef curK</div><div class='del'>-#define curK qK3</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F2, 24,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 40,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F2, 25,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 40,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F2, 26,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 40,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F2, 27,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 40,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F2, 28,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 44,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F2, 29,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 44,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F2, 30,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 44,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F2, 31,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 44,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F2, 32,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 48,</div><div class='del'>-      W4, W5, W6, W7, W0, W1, W2, W3);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F2, 33,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 48,</div><div class='del'>-      W4, W5, W6, W7, W0, W1, W2, W3);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F2, 34,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 48,</div><div class='del'>-      W4, W5, W6, W7, W0, W1, W2, W3);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F2, 35,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 48,</div><div class='del'>-      W4, W5, W6, W7, W0, W1, W2, W3);</div><div class='del'>-</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F2, 36,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 52,</div><div class='del'>-      W3, W4, W5, W6, W7, W0, W1, W2);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F2, 37,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 52,</div><div class='del'>-      W3, W4, W5, W6, W7, W0, W1, W2);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F2, 38,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 52,</div><div class='del'>-      W3, W4, W5, W6, W7, W0, W1, W2);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F2, 39,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 52,</div><div class='del'>-      W3, W4, W5, W6, W7, W0, W1, W2);</div><div class='del'>-</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F3, 40,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 56,</div><div class='del'>-      W2, W3, W4, W5, W6, W7, W0, W1);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F3, 41,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 56,</div><div class='del'>-      W2, W3, W4, W5, W6, W7, W0, W1);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F3, 42,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 56,</div><div class='del'>-      W2, W3, W4, W5, W6, W7, W0, W1);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F3, 43,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 56,</div><div class='del'>-      W2, W3, W4, W5, W6, W7, W0, W1);</div><div class='del'>-</div><div class='del'>-#undef curK</div><div class='del'>-#define curK qK4</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F3, 44,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 60,</div><div class='del'>-      W1, W2, W3, W4, W5, W6, W7, W0);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F3, 45,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 60,</div><div class='del'>-      W1, W2, W3, W4, W5, W6, W7, W0);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F3, 46,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 60,</div><div class='del'>-      W1, W2, W3, W4, W5, W6, W7, W0);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F3, 47,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 60,</div><div class='del'>-      W1, W2, W3, W4, W5, W6, W7, W0);</div><div class='del'>-</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F3, 48,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 64,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F3, 49,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 64,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F3, 50,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 64,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F3, 51,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 64,</div><div class='del'>-      W0, W1, W2, W3, W4, W5, W6, W7);</div><div class='del'>-</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F3, 52,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 68,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F3, 53,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 68,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F3, 54,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 68,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F3, 55,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 68,</div><div class='del'>-      W7, W0, W1, W2, W3, W4, W5, W6);</div><div class='del'>-</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F3, 56,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 72,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F3, 57,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 72,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F3, 58,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 72,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F3, 59,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 72,</div><div class='del'>-      W6, W7, W0, W1, W2, W3, W4, W5);</div><div class='del'>-</div><div class='del'>-  subs RNBLKS, #1;</div><div class='del'>-</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F4, 60,</div><div class='del'>-      WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 76,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F4, 61,</div><div class='del'>-      WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 76,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F4, 62,</div><div class='del'>-      WPRECALC_32_79_6, dummy,            WPRECALC_32_79_7, 76,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F4, 63,</div><div class='del'>-      WPRECALC_32_79_8, dummy,            WPRECALC_32_79_9, 76,</div><div class='del'>-      W5, W6, W7, W0, W1, W2, W3, W4);</div><div class='del'>-</div><div class='del'>-  beq .Lend;</div><div class='del'>-</div><div class='del'>-  /* Transform 64-79 + Precalc 0-15 of next block. */</div><div class='del'>-#undef curK</div><div class='del'>-#define curK qK1</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F4, 64,</div><div class='del'>-      WPRECALC_00_15_0, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F4, 65,</div><div class='del'>-      WPRECALC_00_15_1, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F4, 66,</div><div class='del'>-      WPRECALC_00_15_2, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F4, 67,</div><div class='del'>-      WPRECALC_00_15_3, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F4, 68,</div><div class='del'>-      dummy,            dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F4, 69,</div><div class='del'>-      dummy,            dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F4, 70,</div><div class='del'>-      WPRECALC_00_15_4, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F4, 71,</div><div class='del'>-      WPRECALC_00_15_5, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F4, 72,</div><div class='del'>-      dummy,            dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F4, 73,</div><div class='del'>-      dummy,            dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F4, 74,</div><div class='del'>-      WPRECALC_00_15_6, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _a, _b, _c, _d, _e, F4, 75,</div><div class='del'>-      WPRECALC_00_15_7, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-</div><div class='del'>-  _R( _e, _a, _b, _c, _d, F4, 76,</div><div class='del'>-      WPRECALC_00_15_8, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _d, _e, _a, _b, _c, F4, 77,</div><div class='del'>-      WPRECALC_00_15_9, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _c, _d, _e, _a, _b, F4, 78,</div><div class='del'>-      WPRECALC_00_15_10, dummy, dummy, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-  _R( _b, _c, _d, _e, _a, F4, 79,</div><div class='del'>-      WPRECALC_00_15_11, dummy, WPRECALC_00_15_12, _, _, _, _, _, _, _, _, _ );</div><div class='del'>-</div><div class='del'>-  /* Update the chaining variables. */</div><div class='del'>-  ldm RSTATE, {RT0-RT3};</div><div class='del'>-  add _a, RT0;</div><div class='del'>-  ldr RT0, [RSTATE, #state_h4];</div><div class='del'>-  add _b, RT1;</div><div class='del'>-  add _c, RT2;</div><div class='del'>-  add _d, RT3;</div><div class='del'>-  add _e, RT0;</div><div class='del'>-  stm RSTATE, {_a-_e};</div><div class='del'>-</div><div class='del'>-  b .Loop;</div><div class='del'>-</div><div class='del'>-.Lend:</div><div class='del'>-  /* Transform 64-79 */</div><div class='del'>-  R( _b, _c, _d, _e, _a, F4, 64 );</div><div class='del'>-  R( _a, _b, _c, _d, _e, F4, 65 );</div><div class='del'>-  R( _e, _a, _b, _c, _d, F4, 66 );</div><div class='del'>-  R( _d, _e, _a, _b, _c, F4, 67 );</div><div class='del'>-  R( _c, _d, _e, _a, _b, F4, 68 );</div><div class='del'>-  R( _b, _c, _d, _e, _a, F4, 69 );</div><div class='del'>-  R( _a, _b, _c, _d, _e, F4, 70 );</div><div class='del'>-  R( _e, _a, _b, _c, _d, F4, 71 );</div><div class='del'>-  R( _d, _e, _a, _b, _c, F4, 72 );</div><div class='del'>-  R( _c, _d, _e, _a, _b, F4, 73 );</div><div class='del'>-  R( _b, _c, _d, _e, _a, F4, 74 );</div><div class='del'>-  R( _a, _b, _c, _d, _e, F4, 75 );</div><div class='del'>-  R( _e, _a, _b, _c, _d, F4, 76 );</div><div class='del'>-  R( _d, _e, _a, _b, _c, F4, 77 );</div><div class='del'>-  R( _c, _d, _e, _a, _b, F4, 78 );</div><div class='del'>-  R( _b, _c, _d, _e, _a, F4, 79 );</div><div class='del'>-</div><div class='del'>-  mov sp, ROLDSTACK;</div><div class='del'>-</div><div class='del'>-  /* Update the chaining variables. */</div><div class='del'>-  ldm RSTATE, {RT0-RT3};</div><div class='del'>-  add _a, RT0;</div><div class='del'>-  ldr RT0, [RSTATE, #state_h4];</div><div class='del'>-  add _b, RT1;</div><div class='del'>-  add _c, RT2;</div><div class='del'>-  add _d, RT3;</div><div class='del'>-  /*vpop {q4-q7};*/</div><div class='del'>-  add _e, RT0;</div><div class='del'>-  stm RSTATE, {_a-_e};</div><div class='del'>-</div><div class='del'>-  pop {r4-r12, pc};</div><div class='del'>-</div><div class='del'>-.Ldo_nothing:</div><div class='del'>-  bx lr</div><div class='del'>-ENDPROC(sha1_transform_neon)</div><div class='head'>diff --git a/arch/arm/crypto/sha1-ce-core.S b/arch/arm/crypto/sha1-ce-core.S<br/>deleted file mode 100644<br/>index 8a702e051738..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,123 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd.</div><div class='del'>- * Author: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a</div><div class='del'>-	.fpu		crypto-neon-fp-armv8</div><div class='del'>-</div><div class='del'>-	k0		.req	q0</div><div class='del'>-	k1		.req	q1</div><div class='del'>-	k2		.req	q2</div><div class='del'>-	k3		.req	q3</div><div class='del'>-</div><div class='del'>-	ta0		.req	q4</div><div class='del'>-	ta1		.req	q5</div><div class='del'>-	tb0		.req	q5</div><div class='del'>-	tb1		.req	q4</div><div class='del'>-</div><div class='del'>-	dga		.req	q6</div><div class='del'>-	dgb		.req	q7</div><div class='del'>-	dgbs		.req	s28</div><div class='del'>-</div><div class='del'>-	dg0		.req	q12</div><div class='del'>-	dg1a0		.req	q13</div><div class='del'>-	dg1a1		.req	q14</div><div class='del'>-	dg1b0		.req	q14</div><div class='del'>-	dg1b1		.req	q13</div><div class='del'>-</div><div class='del'>-	.macro		add_only, op, ev, rc, s0, dg1</div><div class='del'>-	.ifnb		\s0</div><div class='del'>-	vadd.u32	tb\ev, q\s0, \rc</div><div class='del'>-	.endif</div><div class='del'>-	sha1h.32	dg1b\ev, dg0</div><div class='del'>-	.ifb		\dg1</div><div class='del'>-	sha1\op\().32	dg0, dg1a\ev, ta\ev</div><div class='del'>-	.else</div><div class='del'>-	sha1\op\().32	dg0, \dg1, ta\ev</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		add_update, op, ev, rc, s0, s1, s2, s3, dg1</div><div class='del'>-	sha1su0.32	q\s0, q\s1, q\s2</div><div class='del'>-	add_only	\op, \ev, \rc, \s1, \dg1</div><div class='del'>-	sha1su1.32	q\s0, q\s3</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.align		6</div><div class='del'>-.Lsha1_rcon:</div><div class='del'>-	.word		0x5a827999, 0x5a827999, 0x5a827999, 0x5a827999</div><div class='del'>-	.word		0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1, 0x6ed9eba1</div><div class='del'>-	.word		0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc, 0x8f1bbcdc</div><div class='del'>-	.word		0xca62c1d6, 0xca62c1d6, 0xca62c1d6, 0xca62c1d6</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * void sha1_ce_transform(struct sha1_state *sst, u8 const *src,</div><div class='del'>-	 *			  int blocks);</div><div class='del'>-	 */</div><div class='del'>-ENTRY(sha1_ce_transform)</div><div class='del'>-	/* load round constants */</div><div class='del'>-	adr		ip, .Lsha1_rcon</div><div class='del'>-	vld1.32		{k0-k1}, [ip, :128]!</div><div class='del'>-	vld1.32		{k2-k3}, [ip, :128]</div><div class='del'>-</div><div class='del'>-	/* load state */</div><div class='del'>-	vld1.32		{dga}, [r0]</div><div class='del'>-	vldr		dgbs, [r0, #16]</div><div class='del'>-</div><div class='del'>-	/* load input */</div><div class='del'>-0:	vld1.32		{q8-q9}, [r1]!</div><div class='del'>-	vld1.32		{q10-q11}, [r1]!</div><div class='del'>-	subs		r2, r2, #1</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-	vrev32.8	q8, q8</div><div class='del'>-	vrev32.8	q9, q9</div><div class='del'>-	vrev32.8	q10, q10</div><div class='del'>-	vrev32.8	q11, q11</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	vadd.u32	ta0, q8, k0</div><div class='del'>-	vmov		dg0, dga</div><div class='del'>-</div><div class='del'>-	add_update	c, 0, k0,  8,  9, 10, 11, dgb</div><div class='del'>-	add_update	c, 1, k0,  9, 10, 11,  8</div><div class='del'>-	add_update	c, 0, k0, 10, 11,  8,  9</div><div class='del'>-	add_update	c, 1, k0, 11,  8,  9, 10</div><div class='del'>-	add_update	c, 0, k1,  8,  9, 10, 11</div><div class='del'>-</div><div class='del'>-	add_update	p, 1, k1,  9, 10, 11,  8</div><div class='del'>-	add_update	p, 0, k1, 10, 11,  8,  9</div><div class='del'>-	add_update	p, 1, k1, 11,  8,  9, 10</div><div class='del'>-	add_update	p, 0, k1,  8,  9, 10, 11</div><div class='del'>-	add_update	p, 1, k2,  9, 10, 11,  8</div><div class='del'>-</div><div class='del'>-	add_update	m, 0, k2, 10, 11,  8,  9</div><div class='del'>-	add_update	m, 1, k2, 11,  8,  9, 10</div><div class='del'>-	add_update	m, 0, k2,  8,  9, 10, 11</div><div class='del'>-	add_update	m, 1, k2,  9, 10, 11,  8</div><div class='del'>-	add_update	m, 0, k3, 10, 11,  8,  9</div><div class='del'>-</div><div class='del'>-	add_update	p, 1, k3, 11,  8,  9, 10</div><div class='del'>-	add_only	p, 0, k3,  9</div><div class='del'>-	add_only	p, 1, k3, 10</div><div class='del'>-	add_only	p, 0, k3, 11</div><div class='del'>-	add_only	p, 1</div><div class='del'>-</div><div class='del'>-	/* update state */</div><div class='del'>-	vadd.u32	dga, dga, dg0</div><div class='del'>-	vadd.u32	dgb, dgb, dg1a0</div><div class='del'>-	bne		0b</div><div class='del'>-</div><div class='del'>-	/* store new state */</div><div class='del'>-	vst1.32		{dga}, [r0]</div><div class='del'>-	vstr		dgbs, [r0, #16]</div><div class='del'>-	bx		lr</div><div class='del'>-ENDPROC(sha1_ce_transform)</div><div class='head'>diff --git a/arch/arm/crypto/sha1-ce-glue.c b/arch/arm/crypto/sha1-ce-glue.c<br/>deleted file mode 100644<br/>index de9100c67b37..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha1-ce-glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA1 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha1_ce_transform(struct sha1_state *sst, u8 const *src,</div><div class='del'>-				  int blocks);</div><div class='del'>-</div><div class='del'>-static int sha1_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return sha1_update_arm(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha1_finup_arm(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_ce_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.init			= sha1_base_init,</div><div class='del'>-	.update			= sha1_ce_update,</div><div class='del'>-	.final			= sha1_ce_final,</div><div class='del'>-	.finup			= sha1_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha1_state),</div><div class='del'>-	.digestsize		= SHA1_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha1",</div><div class='del'>-		.cra_driver_name	= "sha1-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sha1_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha1_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA1, sha1_ce_mod_init);</div><div class='del'>-module_exit(sha1_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm/crypto/sha1.h b/arch/arm/crypto/sha1.h<br/>deleted file mode 100644<br/>index b1b7e21da2c3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef ASM_ARM_CRYPTO_SHA1_H</div><div class='del'>-#define ASM_ARM_CRYPTO_SHA1_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-</div><div class='del'>-extern int sha1_update_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len);</div><div class='del'>-</div><div class='del'>-extern int sha1_finup_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/crypto/sha1_glue.c b/arch/arm/crypto/sha1_glue.c<br/>deleted file mode 100644<br/>index 95a727bcd664..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,86 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- * Glue code for the SHA1 Secure Hash Algorithm assembler implementation</div><div class='del'>- *</div><div class='del'>- * This file is based on sha1_generic.c and sha1_ssse3_glue.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Alan Smithee.</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='del'>- * Copyright (c) Mathias Krause &lt;minipli@googlemail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha1_block_data_order(struct sha1_state *digest,</div><div class='del'>-		const u8 *data, int rounds);</div><div class='del'>-</div><div class='del'>-int sha1_update_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		    unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/* make sure signature matches sha1_block_fn() */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	return sha1_base_do_update(desc, data, len, sha1_block_data_order);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sha1_update_arm);</div><div class='del'>-</div><div class='del'>-static int sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_block_data_order);</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int sha1_finup_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_block_data_order);</div><div class='del'>-	return sha1_final(desc, out);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sha1_finup_arm);</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha1_base_init,</div><div class='del'>-	.update		=	sha1_update_arm,</div><div class='del'>-	.final		=	sha1_final,</div><div class='del'>-	.finup		=	sha1_finup_arm,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha1",</div><div class='del'>-		.cra_driver_name=	"sha1-asm",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init sha1_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit sha1_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-module_init(sha1_mod_init);</div><div class='del'>-module_exit(sha1_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm (ARM)");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1");</div><div class='del'>-MODULE_AUTHOR("David McCullough &lt;ucdevel@gmail.com&gt;");</div><div class='head'>diff --git a/arch/arm/crypto/sha1_neon_glue.c b/arch/arm/crypto/sha1_neon_glue.c<br/>deleted file mode 100644<br/>index 9c70b87e69f7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha1_neon_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha1_neon_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,102 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using</div><div class='del'>- * ARM NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- *</div><div class='del'>- * This file is based on sha1_generic.c and sha1_ssse3_glue.c:</div><div class='del'>- *  Copyright (c) Alan Smithee.</div><div class='del'>- *  Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- *  Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='del'>- *  Copyright (c) Mathias Krause &lt;minipli@googlemail.com&gt;</div><div class='del'>- *  Copyright (c) Chandramouli Narayanan &lt;mouli@linux.intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha1_transform_neon(struct sha1_state *state_h,</div><div class='del'>-				    const u8 *data, int rounds);</div><div class='del'>-</div><div class='del'>-static int sha1_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return sha1_update_arm(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_transform_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha1_finup_arm(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha1_base_do_update(desc, data, len, sha1_transform_neon);</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_transform_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha1_base_init,</div><div class='del'>-	.update		=	sha1_neon_update,</div><div class='del'>-	.final		=	sha1_neon_final,</div><div class='del'>-	.finup		=	sha1_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name		= "sha1",</div><div class='del'>-		.cra_driver_name	= "sha1-neon",</div><div class='del'>-		.cra_priority		= 250,</div><div class='del'>-		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sha1_neon_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_neon())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha1_neon_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha1_neon_mod_init);</div><div class='del'>-module_exit(sha1_neon_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, NEON accelerated");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1");</div><div class='head'>diff --git a/arch/arm/crypto/sha2-ce-core.S b/arch/arm/crypto/sha2-ce-core.S<br/>deleted file mode 100644<br/>index b6369d2440a1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha2-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha2-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,123 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-core.S - SHA-224/256 secure hash using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd.</div><div class='del'>- * Author: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a</div><div class='del'>-	.fpu		crypto-neon-fp-armv8</div><div class='del'>-</div><div class='del'>-	k0		.req	q7</div><div class='del'>-	k1		.req	q8</div><div class='del'>-	rk		.req	r3</div><div class='del'>-</div><div class='del'>-	ta0		.req	q9</div><div class='del'>-	ta1		.req	q10</div><div class='del'>-	tb0		.req	q10</div><div class='del'>-	tb1		.req	q9</div><div class='del'>-</div><div class='del'>-	dga		.req	q11</div><div class='del'>-	dgb		.req	q12</div><div class='del'>-</div><div class='del'>-	dg0		.req	q13</div><div class='del'>-	dg1		.req	q14</div><div class='del'>-	dg2		.req	q15</div><div class='del'>-</div><div class='del'>-	.macro		add_only, ev, s0</div><div class='del'>-	vmov		dg2, dg0</div><div class='del'>-	.ifnb		\s0</div><div class='del'>-	vld1.32		{k\ev}, [rk, :128]!</div><div class='del'>-	.endif</div><div class='del'>-	sha256h.32	dg0, dg1, tb\ev</div><div class='del'>-	sha256h2.32	dg1, dg2, tb\ev</div><div class='del'>-	.ifnb		\s0</div><div class='del'>-	vadd.u32	ta\ev, q\s0, k\ev</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		add_update, ev, s0, s1, s2, s3</div><div class='del'>-	sha256su0.32	q\s0, q\s1</div><div class='del'>-	add_only	\ev, \s1</div><div class='del'>-	sha256su1.32	q\s0, q\s2, q\s3</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.align		6</div><div class='del'>-.Lsha256_rcon:</div><div class='del'>-	.word		0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5</div><div class='del'>-	.word		0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5</div><div class='del'>-	.word		0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3</div><div class='del'>-	.word		0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174</div><div class='del'>-	.word		0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc</div><div class='del'>-	.word		0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da</div><div class='del'>-	.word		0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7</div><div class='del'>-	.word		0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967</div><div class='del'>-	.word		0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13</div><div class='del'>-	.word		0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85</div><div class='del'>-	.word		0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3</div><div class='del'>-	.word		0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070</div><div class='del'>-	.word		0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5</div><div class='del'>-	.word		0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3</div><div class='del'>-	.word		0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208</div><div class='del'>-	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * void sha2_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks);</div><div class='del'>-	 */</div><div class='del'>-ENTRY(sha2_ce_transform)</div><div class='del'>-	/* load state */</div><div class='del'>-	vld1.32		{dga-dgb}, [r0]</div><div class='del'>-</div><div class='del'>-	/* load input */</div><div class='del'>-0:	vld1.32		{q0-q1}, [r1]!</div><div class='del'>-	vld1.32		{q2-q3}, [r1]!</div><div class='del'>-	subs		r2, r2, #1</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-	vrev32.8	q0, q0</div><div class='del'>-	vrev32.8	q1, q1</div><div class='del'>-	vrev32.8	q2, q2</div><div class='del'>-	vrev32.8	q3, q3</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* load first round constant */</div><div class='del'>-	adr		rk, .Lsha256_rcon</div><div class='del'>-	vld1.32		{k0}, [rk, :128]!</div><div class='del'>-</div><div class='del'>-	vadd.u32	ta0, q0, k0</div><div class='del'>-	vmov		dg0, dga</div><div class='del'>-	vmov		dg1, dgb</div><div class='del'>-</div><div class='del'>-	add_update	1, 0, 1, 2, 3</div><div class='del'>-	add_update	0, 1, 2, 3, 0</div><div class='del'>-	add_update	1, 2, 3, 0, 1</div><div class='del'>-	add_update	0, 3, 0, 1, 2</div><div class='del'>-	add_update	1, 0, 1, 2, 3</div><div class='del'>-	add_update	0, 1, 2, 3, 0</div><div class='del'>-	add_update	1, 2, 3, 0, 1</div><div class='del'>-	add_update	0, 3, 0, 1, 2</div><div class='del'>-	add_update	1, 0, 1, 2, 3</div><div class='del'>-	add_update	0, 1, 2, 3, 0</div><div class='del'>-	add_update	1, 2, 3, 0, 1</div><div class='del'>-	add_update	0, 3, 0, 1, 2</div><div class='del'>-</div><div class='del'>-	add_only	1, 1</div><div class='del'>-	add_only	0, 2</div><div class='del'>-	add_only	1, 3</div><div class='del'>-	add_only	0</div><div class='del'>-</div><div class='del'>-	/* update state */</div><div class='del'>-	vadd.u32	dga, dga, dg0</div><div class='del'>-	vadd.u32	dgb, dgb, dg1</div><div class='del'>-	bne		0b</div><div class='del'>-</div><div class='del'>-	/* store new state */</div><div class='del'>-	vst1.32		{dga-dgb}, [r0]</div><div class='del'>-	bx		lr</div><div class='del'>-ENDPROC(sha2_ce_transform)</div><div class='head'>diff --git a/arch/arm/crypto/sha2-ce-glue.c b/arch/arm/crypto/sha2-ce-glue.c<br/>deleted file mode 100644<br/>index aeac45bfbf9f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha2-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha2-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,109 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-glue.c - SHA-224/SHA-256 using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha2_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks);</div><div class='del'>-</div><div class='del'>-static int sha2_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_arm_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha256_base_do_update(desc, data, len,</div><div class='del'>-			      (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha2_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha256_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	sha256_base_do_finalize(desc, (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha2_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha2_ce_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha2_ce_update,</div><div class='del'>-	.final			= sha2_ce_final,</div><div class='del'>-	.finup			= sha2_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha224",</div><div class='del'>-		.cra_driver_name	= "sha224-ce",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha2_ce_update,</div><div class='del'>-	.final			= sha2_ce_final,</div><div class='del'>-	.finup			= sha2_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha256",</div><div class='del'>-		.cra_driver_name	= "sha256-ce",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha2_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha2_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA2, sha2_ce_mod_init);</div><div class='del'>-module_exit(sha2_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm/crypto/sha256-armv4.pl b/arch/arm/crypto/sha256-armv4.pl<br/>deleted file mode 100644<br/>index f3a2b54efd4e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha256-armv4.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256-armv4.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,724 +0,0 @@</div><div class='del'>-#!/usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-# This code is taken from the OpenSSL project but the author (Andy Polyakov)</div><div class='del'>-# has relicensed it under the GPLv2. Therefore this program is free software;</div><div class='del'>-# you can redistribute it and/or modify it under the terms of the GNU General</div><div class='del'>-# Public License version 2 as published by the Free Software Foundation.</div><div class='del'>-#</div><div class='del'>-# The original headers, including the original license headers, are</div><div class='del'>-# included below for completeness.</div><div class='del'>-</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='del'>-# project. The module is, however, dual licensed under OpenSSL and</div><div class='del'>-# CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='del'>-# details see https://www.openssl.org/~appro/cryptogams/.</div><div class='del'>-# ====================================================================</div><div class='del'>-</div><div class='del'>-# SHA256 block procedure for ARMv4. May 2007.</div><div class='del'>-</div><div class='del'>-# Performance is ~2x better than gcc 3.4 generated code and in "abso-</div><div class='del'>-# lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per</div><div class='del'>-# byte [on single-issue Xscale PXA250 core].</div><div class='del'>-</div><div class='del'>-# July 2010.</div><div class='del'>-#</div><div class='del'>-# Rescheduling for dual-issue pipeline resulted in 22% improvement on</div><div class='del'>-# Cortex A8 core and ~20 cycles per processed byte.</div><div class='del'>-</div><div class='del'>-# February 2011.</div><div class='del'>-#</div><div class='del'>-# Profiler-assisted and platform-specific optimization resulted in 16%</div><div class='del'>-# improvement on Cortex A8 core and ~15.4 cycles per processed byte.</div><div class='del'>-</div><div class='del'>-# September 2013.</div><div class='del'>-#</div><div class='del'>-# Add NEON implementation. On Cortex A8 it was measured to process one</div><div class='del'>-# byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon</div><div class='del'>-# S4 does it in 12.5 cycles too, but it's 50% faster than integer-only</div><div class='del'>-# code (meaning that latter performs sub-optimally, nothing was done</div><div class='del'>-# about it).</div><div class='del'>-</div><div class='del'>-# May 2014.</div><div class='del'>-#</div><div class='del'>-# Add ARMv8 code path performing at 2.0 cpb on Apple A7.</div><div class='del'>-</div><div class='del'>-while (($output=shift) &amp;&amp; ($output!~/^\w[\w\-]*\.\w+$/)) {}</div><div class='del'>-open STDOUT,"&gt;$output";</div><div class='del'>-</div><div class='del'>-$ctx="r0";	$t0="r0";</div><div class='del'>-$inp="r1";	$t4="r1";</div><div class='del'>-$len="r2";	$t1="r2";</div><div class='del'>-$T1="r3";	$t3="r3";</div><div class='del'>-$A="r4";</div><div class='del'>-$B="r5";</div><div class='del'>-$C="r6";</div><div class='del'>-$D="r7";</div><div class='del'>-$E="r8";</div><div class='del'>-$F="r9";</div><div class='del'>-$G="r10";</div><div class='del'>-$H="r11";</div><div class='del'>-@V=($A,$B,$C,$D,$E,$F,$G,$H);</div><div class='del'>-$t2="r12";</div><div class='del'>-$Ktbl="r14";</div><div class='del'>-</div><div class='del'>-@Sigma0=( 2,13,22);</div><div class='del'>-@Sigma1=( 6,11,25);</div><div class='del'>-@sigma0=( 7,18, 3);</div><div class='del'>-@sigma1=(17,19,10);</div><div class='del'>-</div><div class='del'>-sub BODY_00_15 {</div><div class='del'>-my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___ if ($i&lt;16);</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-	@ ldr	$t1,[$inp],#4			@ $i</div><div class='del'>-# if $i==15</div><div class='del'>-	str	$inp,[sp,#17*4]			@ make room for $t4</div><div class='del'>-# endif</div><div class='del'>-	eor	$t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]`</div><div class='del'>-	add	$a,$a,$t2			@ h+=Maj(a,b,c) from the past</div><div class='del'>-	eor	$t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]`	@ Sigma1(e)</div><div class='del'>-# ifndef __ARMEB__</div><div class='del'>-	rev	$t1,$t1</div><div class='del'>-# endif</div><div class='del'>-#else</div><div class='del'>-	@ ldrb	$t1,[$inp,#3]			@ $i</div><div class='del'>-	add	$a,$a,$t2			@ h+=Maj(a,b,c) from the past</div><div class='del'>-	ldrb	$t2,[$inp,#2]</div><div class='del'>-	ldrb	$t0,[$inp,#1]</div><div class='del'>-	orr	$t1,$t1,$t2,lsl#8</div><div class='del'>-	ldrb	$t2,[$inp],#4</div><div class='del'>-	orr	$t1,$t1,$t0,lsl#16</div><div class='del'>-# if $i==15</div><div class='del'>-	str	$inp,[sp,#17*4]			@ make room for $t4</div><div class='del'>-# endif</div><div class='del'>-	eor	$t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]`</div><div class='del'>-	orr	$t1,$t1,$t2,lsl#24</div><div class='del'>-	eor	$t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]`	@ Sigma1(e)</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	ldr	$t2,[$Ktbl],#4			@ *K256++</div><div class='del'>-	add	$h,$h,$t1			@ h+=X[i]</div><div class='del'>-	str	$t1,[sp,#`$i%16`*4]</div><div class='del'>-	eor	$t1,$f,$g</div><div class='del'>-	add	$h,$h,$t0,ror#$Sigma1[0]	@ h+=Sigma1(e)</div><div class='del'>-	and	$t1,$t1,$e</div><div class='del'>-	add	$h,$h,$t2			@ h+=K256[i]</div><div class='del'>-	eor	$t1,$t1,$g			@ Ch(e,f,g)</div><div class='del'>-	eor	$t0,$a,$a,ror#`$Sigma0[1]-$Sigma0[0]`</div><div class='del'>-	add	$h,$h,$t1			@ h+=Ch(e,f,g)</div><div class='del'>-#if $i==31</div><div class='del'>-	and	$t2,$t2,#0xff</div><div class='del'>-	cmp	$t2,#0xf2			@ done?</div><div class='del'>-#endif</div><div class='del'>-#if $i&lt;15</div><div class='del'>-# if __ARM_ARCH__&gt;=7</div><div class='del'>-	ldr	$t1,[$inp],#4			@ prefetch</div><div class='del'>-# else</div><div class='del'>-	ldrb	$t1,[$inp,#3]</div><div class='del'>-# endif</div><div class='del'>-	eor	$t2,$a,$b			@ a^b, b^c in next round</div><div class='del'>-#else</div><div class='del'>-	ldr	$t1,[sp,#`($i+2)%16`*4]		@ from future BODY_16_xx</div><div class='del'>-	eor	$t2,$a,$b			@ a^b, b^c in next round</div><div class='del'>-	ldr	$t4,[sp,#`($i+15)%16`*4]	@ from future BODY_16_xx</div><div class='del'>-#endif</div><div class='del'>-	eor	$t0,$t0,$a,ror#`$Sigma0[2]-$Sigma0[0]`	@ Sigma0(a)</div><div class='del'>-	and	$t3,$t3,$t2			@ (b^c)&amp;=(a^b)</div><div class='del'>-	add	$d,$d,$h			@ d+=h</div><div class='del'>-	eor	$t3,$t3,$b			@ Maj(a,b,c)</div><div class='del'>-	add	$h,$h,$t0,ror#$Sigma0[0]	@ h+=Sigma0(a)</div><div class='del'>-	@ add	$h,$h,$t3			@ h+=Maj(a,b,c)</div><div class='del'>-___</div><div class='del'>-	($t2,$t3)=($t3,$t2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub BODY_16_XX {</div><div class='del'>-my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_;</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	@ ldr	$t1,[sp,#`($i+1)%16`*4]		@ $i</div><div class='del'>-	@ ldr	$t4,[sp,#`($i+14)%16`*4]</div><div class='del'>-	mov	$t0,$t1,ror#$sigma0[0]</div><div class='del'>-	add	$a,$a,$t2			@ h+=Maj(a,b,c) from the past</div><div class='del'>-	mov	$t2,$t4,ror#$sigma1[0]</div><div class='del'>-	eor	$t0,$t0,$t1,ror#$sigma0[1]</div><div class='del'>-	eor	$t2,$t2,$t4,ror#$sigma1[1]</div><div class='del'>-	eor	$t0,$t0,$t1,lsr#$sigma0[2]	@ sigma0(X[i+1])</div><div class='del'>-	ldr	$t1,[sp,#`($i+0)%16`*4]</div><div class='del'>-	eor	$t2,$t2,$t4,lsr#$sigma1[2]	@ sigma1(X[i+14])</div><div class='del'>-	ldr	$t4,[sp,#`($i+9)%16`*4]</div><div class='del'>-</div><div class='del'>-	add	$t2,$t2,$t0</div><div class='del'>-	eor	$t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]`	@ from BODY_00_15</div><div class='del'>-	add	$t1,$t1,$t2</div><div class='del'>-	eor	$t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]`	@ Sigma1(e)</div><div class='del'>-	add	$t1,$t1,$t4			@ X[i]</div><div class='del'>-___</div><div class='del'>-	&amp;BODY_00_15(@_);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code=&lt;&lt;___;</div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-# include "arm_arch.h"</div><div class='del'>-#else</div><div class='del'>-# define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-# define __ARM_MAX_ARCH__ 7</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-.code	32</div><div class='del'>-#else</div><div class='del'>-.syntax unified</div><div class='del'>-# ifdef __thumb2__</div><div class='del'>-.thumb</div><div class='del'>-# else</div><div class='del'>-.code   32</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.type	K256,%object</div><div class='del'>-.align	5</div><div class='del'>-K256:</div><div class='del'>-.word	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5</div><div class='del'>-.word	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5</div><div class='del'>-.word	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3</div><div class='del'>-.word	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174</div><div class='del'>-.word	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc</div><div class='del'>-.word	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da</div><div class='del'>-.word	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7</div><div class='del'>-.word	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967</div><div class='del'>-.word	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13</div><div class='del'>-.word	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85</div><div class='del'>-.word	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3</div><div class='del'>-.word	0xd192e819,0xd6990624,0xf40e3585,0x106aa070</div><div class='del'>-.word	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5</div><div class='del'>-.word	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3</div><div class='del'>-.word	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208</div><div class='del'>-.word	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2</div><div class='del'>-.size	K256,.-K256</div><div class='del'>-.word	0				@ terminator</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-.LOPENSSL_armcap:</div><div class='del'>-.word	OPENSSL_armcap_P-sha256_block_data_order</div><div class='del'>-#endif</div><div class='del'>-.align	5</div><div class='del'>-</div><div class='del'>-.global	sha256_block_data_order</div><div class='del'>-.type	sha256_block_data_order,%function</div><div class='del'>-sha256_block_data_order:</div><div class='del'>-.Lsha256_block_data_order:</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	sub	r3,pc,#8		@ sha256_block_data_order</div><div class='del'>-#else</div><div class='del'>-	adr	r3,.Lsha256_block_data_order</div><div class='del'>-#endif</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-	ldr	r12,.LOPENSSL_armcap</div><div class='del'>-	ldr	r12,[r3,r12]		@ OPENSSL_armcap_P</div><div class='del'>-	tst	r12,#ARMV8_SHA256</div><div class='del'>-	bne	.LARMv8</div><div class='del'>-	tst	r12,#ARMV7_NEON</div><div class='del'>-	bne	.LNEON</div><div class='del'>-#endif</div><div class='del'>-	add	$len,$inp,$len,lsl#6	@ len to point at the end of inp</div><div class='del'>-	stmdb	sp!,{$ctx,$inp,$len,r4-r11,lr}</div><div class='del'>-	ldmia	$ctx,{$A,$B,$C,$D,$E,$F,$G,$H}</div><div class='del'>-	sub	$Ktbl,r3,#256+32	@ K256</div><div class='del'>-	sub	sp,sp,#16*4		@ alloca(X[16])</div><div class='del'>-.Loop:</div><div class='del'>-# if __ARM_ARCH__&gt;=7</div><div class='del'>-	ldr	$t1,[$inp],#4</div><div class='del'>-# else</div><div class='del'>-	ldrb	$t1,[$inp,#3]</div><div class='del'>-# endif</div><div class='del'>-	eor	$t3,$B,$C		@ magic</div><div class='del'>-	eor	$t2,$t2,$t2</div><div class='del'>-___</div><div class='del'>-for($i=0;$i&lt;16;$i++)	{ &amp;BODY_00_15($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=".Lrounds_16_xx:\n";</div><div class='del'>-for (;$i&lt;32;$i++)	{ &amp;BODY_16_XX($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-	ite	eq			@ Thumb2 thing, sanity check in ARM</div><div class='del'>-#endif</div><div class='del'>-	ldreq	$t3,[sp,#16*4]		@ pull ctx</div><div class='del'>-	bne	.Lrounds_16_xx</div><div class='del'>-</div><div class='del'>-	add	$A,$A,$t2		@ h+=Maj(a,b,c) from the past</div><div class='del'>-	ldr	$t0,[$t3,#0]</div><div class='del'>-	ldr	$t1,[$t3,#4]</div><div class='del'>-	ldr	$t2,[$t3,#8]</div><div class='del'>-	add	$A,$A,$t0</div><div class='del'>-	ldr	$t0,[$t3,#12]</div><div class='del'>-	add	$B,$B,$t1</div><div class='del'>-	ldr	$t1,[$t3,#16]</div><div class='del'>-	add	$C,$C,$t2</div><div class='del'>-	ldr	$t2,[$t3,#20]</div><div class='del'>-	add	$D,$D,$t0</div><div class='del'>-	ldr	$t0,[$t3,#24]</div><div class='del'>-	add	$E,$E,$t1</div><div class='del'>-	ldr	$t1,[$t3,#28]</div><div class='del'>-	add	$F,$F,$t2</div><div class='del'>-	ldr	$inp,[sp,#17*4]		@ pull inp</div><div class='del'>-	ldr	$t2,[sp,#18*4]		@ pull inp+len</div><div class='del'>-	add	$G,$G,$t0</div><div class='del'>-	add	$H,$H,$t1</div><div class='del'>-	stmia	$t3,{$A,$B,$C,$D,$E,$F,$G,$H}</div><div class='del'>-	cmp	$inp,$t2</div><div class='del'>-	sub	$Ktbl,$Ktbl,#256	@ rewind Ktbl</div><div class='del'>-	bne	.Loop</div><div class='del'>-</div><div class='del'>-	add	sp,sp,#`16+3`*4	@ destroy frame</div><div class='del'>-#if __ARM_ARCH__&gt;=5</div><div class='del'>-	ldmia	sp!,{r4-r11,pc}</div><div class='del'>-#else</div><div class='del'>-	ldmia	sp!,{r4-r11,lr}</div><div class='del'>-	tst	lr,#1</div><div class='del'>-	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='del'>-	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='del'>-#endif</div><div class='del'>-.size	sha256_block_data_order,.-sha256_block_data_order</div><div class='del'>-___</div><div class='del'>-######################################################################</div><div class='del'>-# NEON stuff</div><div class='del'>-#</div><div class='del'>-{{{</div><div class='del'>-my @X=map("q$_",(0..3));</div><div class='del'>-my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");</div><div class='del'>-my $Xfer=$t4;</div><div class='del'>-my $j=0;</div><div class='del'>-</div><div class='del'>-sub Dlo()   { shift=~m|q([1]?[0-9])|?"d".($1*2):"";     }</div><div class='del'>-sub Dhi()   { shift=~m|q([1]?[0-9])|?"d".($1*2+1):"";   }</div><div class='del'>-</div><div class='del'>-sub AUTOLOAD()          # thunk [simplified] x86-style perlasm</div><div class='del'>-{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;</div><div class='del'>-  my $arg = pop;</div><div class='del'>-    $arg = "#$arg" if ($arg*1 eq $arg);</div><div class='del'>-    $code .= "\t$opcode\t".join(',',@_,$arg)."\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub Xupdate()</div><div class='del'>-{ use integer;</div><div class='del'>-  my $body = shift;</div><div class='del'>-  my @insns = (&amp;$body,&amp;$body,&amp;$body,&amp;$body);</div><div class='del'>-  my ($a,$b,$c,$d,$e,$f,$g,$h);</div><div class='del'>-</div><div class='del'>-	&amp;vext_8		($T0,@X[0],@X[1],4);	# X[1..4]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vext_8		($T1,@X[2],@X[3],4);	# X[9..12]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vshr_u32	($T2,$T0,$sigma0[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	(@X[0],@X[0],$T1);	# X[0..3] += X[9..12]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vshr_u32	($T1,$T0,$sigma0[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vsli_32	($T2,$T0,32-$sigma0[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vshr_u32	($T3,$T0,$sigma0[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;veor		($T1,$T1,$T2);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vsli_32	($T3,$T0,32-$sigma0[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T4,&amp;Dhi(@X[3]),$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;veor		($T1,$T1,$T3);		# sigma0(X[1..4])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vsli_32	($T4,&amp;Dhi(@X[3]),32-$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T5,&amp;Dhi(@X[3]),$sigma1[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	(@X[0],@X[0],$T1);	# X[0..3] += sigma0(X[1..4])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;veor		($T5,$T5,$T4);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T4,&amp;Dhi(@X[3]),$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vsli_32	($T4,&amp;Dhi(@X[3]),32-$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;veor		($T5,$T5,$T4);		# sigma1(X[14..15])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	(&amp;Dlo(@X[0]),&amp;Dlo(@X[0]),$T5);# X[0..1] += sigma1(X[14..15])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T4,&amp;Dlo(@X[0]),$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vsli_32	($T4,&amp;Dlo(@X[0]),32-$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T5,&amp;Dlo(@X[0]),$sigma1[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;veor		($T5,$T5,$T4);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vshr_u32	($T4,&amp;Dlo(@X[0]),$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vld1_32	("{$T0}","[$Ktbl,:128]!");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;vsli_32	($T4,&amp;Dlo(@X[0]),32-$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;veor		($T5,$T5,$T4);		# sigma1(X[16..17])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	(&amp;Dhi(@X[0]),&amp;Dhi(@X[0]),$T5);# X[2..3] += sigma1(X[16..17])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	($T0,$T0,@X[0]);</div><div class='del'>-	 while($#insns&gt;=2) { eval(shift(@insns)); }</div><div class='del'>-	&amp;vst1_32	("{$T0}","[$Xfer,:128]!");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-</div><div class='del'>-	push(@X,shift(@X));		# "rotate" X[]</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub Xpreload()</div><div class='del'>-{ use integer;</div><div class='del'>-  my $body = shift;</div><div class='del'>-  my @insns = (&amp;$body,&amp;$body,&amp;$body,&amp;$body);</div><div class='del'>-  my ($a,$b,$c,$d,$e,$f,$g,$h);</div><div class='del'>-</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vld1_32	("{$T0}","[$Ktbl,:128]!");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vrev32_8	(@X[0],@X[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;vadd_i32	($T0,$T0,@X[0]);</div><div class='del'>-	 foreach (@insns) { eval; }	# remaining instructions</div><div class='del'>-	&amp;vst1_32	("{$T0}","[$Xfer,:128]!");</div><div class='del'>-</div><div class='del'>-	push(@X,shift(@X));		# "rotate" X[]</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub body_00_15 () {</div><div class='del'>-	(</div><div class='del'>-	'($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.</div><div class='del'>-	'&amp;add	($h,$h,$t1)',			# h+=X[i]+K[i]</div><div class='del'>-	'&amp;eor	($t1,$f,$g)',</div><div class='del'>-	'&amp;eor	($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',</div><div class='del'>-	'&amp;add	($a,$a,$t2)',			# h+=Maj(a,b,c) from the past</div><div class='del'>-	'&amp;and	($t1,$t1,$e)',</div><div class='del'>-	'&amp;eor	($t2,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))',	# Sigma1(e)</div><div class='del'>-	'&amp;eor	($t0,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',</div><div class='del'>-	'&amp;eor	($t1,$t1,$g)',			# Ch(e,f,g)</div><div class='del'>-	'&amp;add	($h,$h,$t2,"ror#$Sigma1[0]")',	# h+=Sigma1(e)</div><div class='del'>-	'&amp;eor	($t2,$a,$b)',			# a^b, b^c in next round</div><div class='del'>-	'&amp;eor	($t0,$t0,$a,"ror#".($Sigma0[2]-$Sigma0[0]))',	# Sigma0(a)</div><div class='del'>-	'&amp;add	($h,$h,$t1)',			# h+=Ch(e,f,g)</div><div class='del'>-	'&amp;ldr	($t1,sprintf "[sp,#%d]",4*(($j+1)&amp;15))	if (($j&amp;15)!=15);'.</div><div class='del'>-	'&amp;ldr	($t1,"[$Ktbl]")				if ($j==15);'.</div><div class='del'>-	'&amp;ldr	($t1,"[sp,#64]")			if ($j==31)',</div><div class='del'>-	'&amp;and	($t3,$t3,$t2)',			# (b^c)&amp;=(a^b)</div><div class='del'>-	'&amp;add	($d,$d,$h)',			# d+=h</div><div class='del'>-	'&amp;add	($h,$h,$t0,"ror#$Sigma0[0]");'.	# h+=Sigma0(a)</div><div class='del'>-	'&amp;eor	($t3,$t3,$b)',			# Maj(a,b,c)</div><div class='del'>-	'$j++;	unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'</div><div class='del'>-	)</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7</div><div class='del'>-.arch	armv7-a</div><div class='del'>-.fpu	neon</div><div class='del'>-</div><div class='del'>-.global	sha256_block_data_order_neon</div><div class='del'>-.type	sha256_block_data_order_neon,%function</div><div class='del'>-.align	4</div><div class='del'>-sha256_block_data_order_neon:</div><div class='del'>-.LNEON:</div><div class='del'>-	stmdb	sp!,{r4-r12,lr}</div><div class='del'>-</div><div class='del'>-	sub	$H,sp,#16*4+16</div><div class='del'>-	adr	$Ktbl,.Lsha256_block_data_order</div><div class='del'>-	sub	$Ktbl,$Ktbl,#.Lsha256_block_data_order-K256</div><div class='del'>-	bic	$H,$H,#15		@ align for 128-bit stores</div><div class='del'>-	mov	$t2,sp</div><div class='del'>-	mov	sp,$H			@ alloca</div><div class='del'>-	add	$len,$inp,$len,lsl#6	@ len to point at the end of inp</div><div class='del'>-</div><div class='del'>-	vld1.8		{@X[0]},[$inp]!</div><div class='del'>-	vld1.8		{@X[1]},[$inp]!</div><div class='del'>-	vld1.8		{@X[2]},[$inp]!</div><div class='del'>-	vld1.8		{@X[3]},[$inp]!</div><div class='del'>-	vld1.32		{$T0},[$Ktbl,:128]!</div><div class='del'>-	vld1.32		{$T1},[$Ktbl,:128]!</div><div class='del'>-	vld1.32		{$T2},[$Ktbl,:128]!</div><div class='del'>-	vld1.32		{$T3},[$Ktbl,:128]!</div><div class='del'>-	vrev32.8	@X[0],@X[0]		@ yes, even on</div><div class='del'>-	str		$ctx,[sp,#64]</div><div class='del'>-	vrev32.8	@X[1],@X[1]		@ big-endian</div><div class='del'>-	str		$inp,[sp,#68]</div><div class='del'>-	mov		$Xfer,sp</div><div class='del'>-	vrev32.8	@X[2],@X[2]</div><div class='del'>-	str		$len,[sp,#72]</div><div class='del'>-	vrev32.8	@X[3],@X[3]</div><div class='del'>-	str		$t2,[sp,#76]		@ save original sp</div><div class='del'>-	vadd.i32	$T0,$T0,@X[0]</div><div class='del'>-	vadd.i32	$T1,$T1,@X[1]</div><div class='del'>-	vst1.32		{$T0},[$Xfer,:128]!</div><div class='del'>-	vadd.i32	$T2,$T2,@X[2]</div><div class='del'>-	vst1.32		{$T1},[$Xfer,:128]!</div><div class='del'>-	vadd.i32	$T3,$T3,@X[3]</div><div class='del'>-	vst1.32		{$T2},[$Xfer,:128]!</div><div class='del'>-	vst1.32		{$T3},[$Xfer,:128]!</div><div class='del'>-</div><div class='del'>-	ldmia		$ctx,{$A-$H}</div><div class='del'>-	sub		$Xfer,$Xfer,#64</div><div class='del'>-	ldr		$t1,[sp,#0]</div><div class='del'>-	eor		$t2,$t2,$t2</div><div class='del'>-	eor		$t3,$B,$C</div><div class='del'>-	b		.L_00_48</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.L_00_48:</div><div class='del'>-___</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	teq	$t1,#0				@ check for K256 terminator</div><div class='del'>-	ldr	$t1,[sp,#0]</div><div class='del'>-	sub	$Xfer,$Xfer,#64</div><div class='del'>-	bne	.L_00_48</div><div class='del'>-</div><div class='del'>-	ldr		$inp,[sp,#68]</div><div class='del'>-	ldr		$t0,[sp,#72]</div><div class='del'>-	sub		$Ktbl,$Ktbl,#256	@ rewind $Ktbl</div><div class='del'>-	teq		$inp,$t0</div><div class='del'>-	it		eq</div><div class='del'>-	subeq		$inp,$inp,#64		@ avoid SEGV</div><div class='del'>-	vld1.8		{@X[0]},[$inp]!		@ load next input block</div><div class='del'>-	vld1.8		{@X[1]},[$inp]!</div><div class='del'>-	vld1.8		{@X[2]},[$inp]!</div><div class='del'>-	vld1.8		{@X[3]},[$inp]!</div><div class='del'>-	it		ne</div><div class='del'>-	strne		$inp,[sp,#68]</div><div class='del'>-	mov		$Xfer,sp</div><div class='del'>-___</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	ldr	$t0,[$t1,#0]</div><div class='del'>-	add	$A,$A,$t2			@ h+=Maj(a,b,c) from the past</div><div class='del'>-	ldr	$t2,[$t1,#4]</div><div class='del'>-	ldr	$t3,[$t1,#8]</div><div class='del'>-	ldr	$t4,[$t1,#12]</div><div class='del'>-	add	$A,$A,$t0			@ accumulate</div><div class='del'>-	ldr	$t0,[$t1,#16]</div><div class='del'>-	add	$B,$B,$t2</div><div class='del'>-	ldr	$t2,[$t1,#20]</div><div class='del'>-	add	$C,$C,$t3</div><div class='del'>-	ldr	$t3,[$t1,#24]</div><div class='del'>-	add	$D,$D,$t4</div><div class='del'>-	ldr	$t4,[$t1,#28]</div><div class='del'>-	add	$E,$E,$t0</div><div class='del'>-	str	$A,[$t1],#4</div><div class='del'>-	add	$F,$F,$t2</div><div class='del'>-	str	$B,[$t1],#4</div><div class='del'>-	add	$G,$G,$t3</div><div class='del'>-	str	$C,[$t1],#4</div><div class='del'>-	add	$H,$H,$t4</div><div class='del'>-	str	$D,[$t1],#4</div><div class='del'>-	stmia	$t1,{$E-$H}</div><div class='del'>-</div><div class='del'>-	ittte	ne</div><div class='del'>-	movne	$Xfer,sp</div><div class='del'>-	ldrne	$t1,[sp,#0]</div><div class='del'>-	eorne	$t2,$t2,$t2</div><div class='del'>-	ldreq	sp,[sp,#76]			@ restore original sp</div><div class='del'>-	itt	ne</div><div class='del'>-	eorne	$t3,$B,$C</div><div class='del'>-	bne	.L_00_48</div><div class='del'>-</div><div class='del'>-	ldmia	sp!,{r4-r12,pc}</div><div class='del'>-.size	sha256_block_data_order_neon,.-sha256_block_data_order_neon</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-}}}</div><div class='del'>-######################################################################</div><div class='del'>-# ARMv8 stuff</div><div class='del'>-#</div><div class='del'>-{{{</div><div class='del'>-my ($ABCD,$EFGH,$abcd)=map("q$_",(0..2));</div><div class='del'>-my @MSG=map("q$_",(8..11));</div><div class='del'>-my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15));</div><div class='del'>-my $Ktbl="r3";</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-</div><div class='del'>-# ifdef __thumb2__</div><div class='del'>-#  define INST(a,b,c,d)	.byte	c,d|0xc,a,b</div><div class='del'>-# else</div><div class='del'>-#  define INST(a,b,c,d)	.byte	a,b,c,d</div><div class='del'>-# endif</div><div class='del'>-</div><div class='del'>-.type	sha256_block_data_order_armv8,%function</div><div class='del'>-.align	5</div><div class='del'>-sha256_block_data_order_armv8:</div><div class='del'>-.LARMv8:</div><div class='del'>-	vld1.32	{$ABCD,$EFGH},[$ctx]</div><div class='del'>-# ifdef __thumb2__</div><div class='del'>-	adr	$Ktbl,.LARMv8</div><div class='del'>-	sub	$Ktbl,$Ktbl,#.LARMv8-K256</div><div class='del'>-# else</div><div class='del'>-	adrl	$Ktbl,K256</div><div class='del'>-# endif</div><div class='del'>-	add	$len,$inp,$len,lsl#6	@ len to point at the end of inp</div><div class='del'>-</div><div class='del'>-.Loop_v8:</div><div class='del'>-	vld1.8		{@MSG[0]-@MSG[1]},[$inp]!</div><div class='del'>-	vld1.8		{@MSG[2]-@MSG[3]},[$inp]!</div><div class='del'>-	vld1.32		{$W0},[$Ktbl]!</div><div class='del'>-	vrev32.8	@MSG[0],@MSG[0]</div><div class='del'>-	vrev32.8	@MSG[1],@MSG[1]</div><div class='del'>-	vrev32.8	@MSG[2],@MSG[2]</div><div class='del'>-	vrev32.8	@MSG[3],@MSG[3]</div><div class='del'>-	vmov		$ABCD_SAVE,$ABCD	@ offload</div><div class='del'>-	vmov		$EFGH_SAVE,$EFGH</div><div class='del'>-	teq		$inp,$len</div><div class='del'>-___</div><div class='del'>-for($i=0;$i&lt;12;$i++) {</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	vld1.32		{$W1},[$Ktbl]!</div><div class='del'>-	vadd.i32	$W0,$W0,@MSG[0]</div><div class='del'>-	sha256su0	@MSG[0],@MSG[1]</div><div class='del'>-	vmov		$abcd,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-	sha256su1	@MSG[0],@MSG[2],@MSG[3]</div><div class='del'>-___</div><div class='del'>-	($W0,$W1)=($W1,$W0);	push(@MSG,shift(@MSG));</div><div class='del'>-}</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	vld1.32		{$W1},[$Ktbl]!</div><div class='del'>-	vadd.i32	$W0,$W0,@MSG[0]</div><div class='del'>-	vmov		$abcd,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-</div><div class='del'>-	vld1.32		{$W0},[$Ktbl]!</div><div class='del'>-	vadd.i32	$W1,$W1,@MSG[1]</div><div class='del'>-	vmov		$abcd,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W1</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W1</div><div class='del'>-</div><div class='del'>-	vld1.32		{$W1},[$Ktbl]</div><div class='del'>-	vadd.i32	$W0,$W0,@MSG[2]</div><div class='del'>-	sub		$Ktbl,$Ktbl,#256-16	@ rewind</div><div class='del'>-	vmov		$abcd,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-</div><div class='del'>-	vadd.i32	$W1,$W1,@MSG[3]</div><div class='del'>-	vmov		$abcd,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W1</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W1</div><div class='del'>-</div><div class='del'>-	vadd.i32	$ABCD,$ABCD,$ABCD_SAVE</div><div class='del'>-	vadd.i32	$EFGH,$EFGH,$EFGH_SAVE</div><div class='del'>-	it		ne</div><div class='del'>-	bne		.Loop_v8</div><div class='del'>-</div><div class='del'>-	vst1.32		{$ABCD,$EFGH},[$ctx]</div><div class='del'>-</div><div class='del'>-	ret		@ bx lr</div><div class='del'>-.size	sha256_block_data_order_armv8,.-sha256_block_data_order_armv8</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-}}}</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.asciz  "SHA256 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by &lt;appro\@openssl.org&gt;"</div><div class='del'>-.align	2</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-.comm   OPENSSL_armcap_P,4,4</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-open SELF,$0;</div><div class='del'>-while(&lt;SELF&gt;) {</div><div class='del'>-	next if (/^#!/);</div><div class='del'>-	last if (!s/^#/@/ and !/^$/);</div><div class='del'>-	print;</div><div class='del'>-}</div><div class='del'>-close SELF;</div><div class='del'>-</div><div class='del'>-{   my  %opcode = (</div><div class='del'>-	"sha256h"	=&gt; 0xf3000c40,	"sha256h2"	=&gt; 0xf3100c40,</div><div class='del'>-	"sha256su0"	=&gt; 0xf3ba03c0,	"sha256su1"	=&gt; 0xf3200c40	);</div><div class='del'>-</div><div class='del'>-    sub unsha256 {</div><div class='del'>-	my ($mnemonic,$arg)=@_;</div><div class='del'>-</div><div class='del'>-	if ($arg =~ m/q([0-9]+)(?:,\s*q([0-9]+))?,\s*q([0-9]+)/o) {</div><div class='del'>-	    my $word = $opcode{$mnemonic}|(($1&amp;7)&lt;&lt;13)|(($1&amp;8)&lt;&lt;19)</div><div class='del'>-					 |(($2&amp;7)&lt;&lt;17)|(($2&amp;8)&lt;&lt;4)</div><div class='del'>-					 |(($3&amp;7)&lt;&lt;1) |(($3&amp;8)&lt;&lt;2);</div><div class='del'>-	    # since ARMv7 instructions are always encoded little-endian.</div><div class='del'>-	    # correct solution is to use .inst directive, but older</div><div class='del'>-	    # assemblers don't implement it:-(</div><div class='del'>-	    sprintf "INST(0x%02x,0x%02x,0x%02x,0x%02x)\t@ %s %s",</div><div class='del'>-			$word&amp;0xff,($word&gt;&gt;8)&amp;0xff,</div><div class='del'>-			($word&gt;&gt;16)&amp;0xff,($word&gt;&gt;24)&amp;0xff,</div><div class='del'>-			$mnemonic,$arg;</div><div class='del'>-	}</div><div class='del'>-    }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-foreach (split($/,$code)) {</div><div class='del'>-</div><div class='del'>-	s/\`([^\`]*)\`/eval $1/geo;</div><div class='del'>-</div><div class='del'>-	s/\b(sha256\w+)\s+(q.*)/unsha256($1,$2)/geo;</div><div class='del'>-</div><div class='del'>-	s/\bret\b/bx	lr/go		or</div><div class='del'>-	s/\bbx\s+lr\b/.word\t0xe12fff1e/go;	# make it possible to compile with -march=armv4</div><div class='del'>-</div><div class='del'>-	print $_,"\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-close STDOUT; # enforce flush</div><div class='head'>diff --git a/arch/arm/crypto/sha256_glue.c b/arch/arm/crypto/sha256_glue.c<br/>deleted file mode 100644<br/>index f85933fdec75..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha256_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,117 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA256 Secure Hash Algorithm assembly implementation</div><div class='del'>- * using optimized ARM assembler and NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2015 Google Inc.</div><div class='del'>- *</div><div class='del'>- * This file is based on sha256_ssse3_glue.c:</div><div class='del'>- *   Copyright (C) 2013 Intel Corporation</div><div class='del'>- *   Author: Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(struct sha256_state *state,</div><div class='del'>-					const u8 *data, int num_blks);</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/* make sure casting to sha256_block_fn() is safe */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	return sha256_base_do_update(desc, data, len, sha256_block_data_order);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_arm_update);</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_block_data_order);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_block_data_order);</div><div class='del'>-	return crypto_sha256_arm_final(desc, out);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_arm_finup);</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	crypto_sha256_arm_update,</div><div class='del'>-	.final		=	crypto_sha256_arm_final,</div><div class='del'>-	.finup		=	crypto_sha256_arm_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-asm",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	crypto_sha256_arm_update,</div><div class='del'>-	.final		=	crypto_sha256_arm_final,</div><div class='del'>-	.finup		=	crypto_sha256_arm_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-asm",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int res = crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		return res;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon()) {</div><div class='del'>-		res = crypto_register_shashes(sha256_neon_algs,</div><div class='del'>-					      ARRAY_SIZE(sha256_neon_algs));</div><div class='del'>-</div><div class='del'>-		if (res &lt; 0)</div><div class='del'>-			crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon())</div><div class='del'>-		crypto_unregister_shashes(sha256_neon_algs,</div><div class='del'>-					  ARRAY_SIZE(sha256_neon_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_mod_init);</div><div class='del'>-module_exit(sha256_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm (ARM), including NEON");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='head'>diff --git a/arch/arm/crypto/sha256_glue.h b/arch/arm/crypto/sha256_glue.h<br/>deleted file mode 100644<br/>index 9f0d578bab5f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha256_glue.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_glue.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef _CRYPTO_SHA256_GLUE_H</div><div class='del'>-#define _CRYPTO_SHA256_GLUE_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct shash_alg sha256_neon_algs[2];</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len);</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *hash);</div><div class='del'>-</div><div class='del'>-#endif /* _CRYPTO_SHA256_GLUE_H */</div><div class='head'>diff --git a/arch/arm/crypto/sha256_neon_glue.c b/arch/arm/crypto/sha256_neon_glue.c<br/>deleted file mode 100644<br/>index ccdcfff71910..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha256_neon_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha256_neon_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA256 Secure Hash Algorithm assembly implementation</div><div class='del'>- * using NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2015 Google Inc.</div><div class='del'>- *</div><div class='del'>- * This file is based on sha512_neon_glue.c:</div><div class='del'>- *   Copyright © 2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order_neon(struct sha256_state *digest,</div><div class='del'>-					     const u8 *data, int num_blks);</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_arm_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha256_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      sha256_block_data_order_neon);</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return crypto_sha256_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct shash_alg sha256_neon_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	crypto_sha256_neon_update,</div><div class='del'>-	.final		=	crypto_sha256_neon_final,</div><div class='del'>-	.finup		=	crypto_sha256_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	crypto_sha256_neon_update,</div><div class='del'>-	.final		=	crypto_sha256_neon_final,</div><div class='del'>-	.finup		=	crypto_sha256_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='head'>diff --git a/arch/arm/crypto/sha512-armv4.pl b/arch/arm/crypto/sha512-armv4.pl<br/>deleted file mode 100644<br/>index 2fc3516912fa..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha512-armv4.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-armv4.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,657 +0,0 @@</div><div class='del'>-#!/usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-# This code is taken from the OpenSSL project but the author (Andy Polyakov)</div><div class='del'>-# has relicensed it under the GPLv2. Therefore this program is free software;</div><div class='del'>-# you can redistribute it and/or modify it under the terms of the GNU General</div><div class='del'>-# Public License version 2 as published by the Free Software Foundation.</div><div class='del'>-#</div><div class='del'>-# The original headers, including the original license headers, are</div><div class='del'>-# included below for completeness.</div><div class='del'>-</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='del'>-# project. The module is, however, dual licensed under OpenSSL and</div><div class='del'>-# CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='del'>-# details see https://www.openssl.org/~appro/cryptogams/.</div><div class='del'>-# ====================================================================</div><div class='del'>-</div><div class='del'>-# SHA512 block procedure for ARMv4. September 2007.</div><div class='del'>-</div><div class='del'>-# This code is ~4.5 (four and a half) times faster than code generated</div><div class='del'>-# by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue</div><div class='del'>-# Xscale PXA250 core].</div><div class='del'>-#</div><div class='del'>-# July 2010.</div><div class='del'>-#</div><div class='del'>-# Rescheduling for dual-issue pipeline resulted in 6% improvement on</div><div class='del'>-# Cortex A8 core and ~40 cycles per processed byte.</div><div class='del'>-</div><div class='del'>-# February 2011.</div><div class='del'>-#</div><div class='del'>-# Profiler-assisted and platform-specific optimization resulted in 7%</div><div class='del'>-# improvement on Coxtex A8 core and ~38 cycles per byte.</div><div class='del'>-</div><div class='del'>-# March 2011.</div><div class='del'>-#</div><div class='del'>-# Add NEON implementation. On Cortex A8 it was measured to process</div><div class='del'>-# one byte in 23.3 cycles or ~60% faster than integer-only code.</div><div class='del'>-</div><div class='del'>-# August 2012.</div><div class='del'>-#</div><div class='del'>-# Improve NEON performance by 12% on Snapdragon S4. In absolute</div><div class='del'>-# terms it's 22.6 cycles per byte, which is disappointing result.</div><div class='del'>-# Technical writers asserted that 3-way S4 pipeline can sustain</div><div class='del'>-# multiple NEON instructions per cycle, but dual NEON issue could</div><div class='del'>-# not be observed, see https://www.openssl.org/~appro/Snapdragon-S4.html</div><div class='del'>-# for further details. On side note Cortex-A15 processes one byte in</div><div class='del'>-# 16 cycles.</div><div class='del'>-</div><div class='del'>-# Byte order [in]dependence. =========================================</div><div class='del'>-#</div><div class='del'>-# Originally caller was expected to maintain specific *dword* order in</div><div class='del'>-# h[0-7], namely with most significant dword at *lower* address, which</div><div class='del'>-# was reflected in below two parameters as 0 and 4. Now caller is</div><div class='del'>-# expected to maintain native byte order for whole 64-bit values.</div><div class='del'>-$hi="HI";</div><div class='del'>-$lo="LO";</div><div class='del'>-# ====================================================================</div><div class='del'>-</div><div class='del'>-while (($output=shift) &amp;&amp; ($output!~/^\w[\w\-]*\.\w+$/)) {}</div><div class='del'>-open STDOUT,"&gt;$output";</div><div class='del'>-</div><div class='del'>-$ctx="r0";	# parameter block</div><div class='del'>-$inp="r1";</div><div class='del'>-$len="r2";</div><div class='del'>-</div><div class='del'>-$Tlo="r3";</div><div class='del'>-$Thi="r4";</div><div class='del'>-$Alo="r5";</div><div class='del'>-$Ahi="r6";</div><div class='del'>-$Elo="r7";</div><div class='del'>-$Ehi="r8";</div><div class='del'>-$t0="r9";</div><div class='del'>-$t1="r10";</div><div class='del'>-$t2="r11";</div><div class='del'>-$t3="r12";</div><div class='del'>-############	r13 is stack pointer</div><div class='del'>-$Ktbl="r14";</div><div class='del'>-############	r15 is program counter</div><div class='del'>-</div><div class='del'>-$Aoff=8*0;</div><div class='del'>-$Boff=8*1;</div><div class='del'>-$Coff=8*2;</div><div class='del'>-$Doff=8*3;</div><div class='del'>-$Eoff=8*4;</div><div class='del'>-$Foff=8*5;</div><div class='del'>-$Goff=8*6;</div><div class='del'>-$Hoff=8*7;</div><div class='del'>-$Xoff=8*8;</div><div class='del'>-</div><div class='del'>-sub BODY_00_15() {</div><div class='del'>-my $magic = shift;</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	@ Sigma1(x)	(ROTR((x),14) ^ ROTR((x),18)  ^ ROTR((x),41))</div><div class='del'>-	@ LO		lo&gt;&gt;14^hi&lt;&lt;18 ^ lo&gt;&gt;18^hi&lt;&lt;14 ^ hi&gt;&gt;9^lo&lt;&lt;23</div><div class='del'>-	@ HI		hi&gt;&gt;14^lo&lt;&lt;18 ^ hi&gt;&gt;18^lo&lt;&lt;14 ^ lo&gt;&gt;9^hi&lt;&lt;23</div><div class='del'>-	mov	$t0,$Elo,lsr#14</div><div class='del'>-	str	$Tlo,[sp,#$Xoff+0]</div><div class='del'>-	mov	$t1,$Ehi,lsr#14</div><div class='del'>-	str	$Thi,[sp,#$Xoff+4]</div><div class='del'>-	eor	$t0,$t0,$Ehi,lsl#18</div><div class='del'>-	ldr	$t2,[sp,#$Hoff+0]	@ h.lo</div><div class='del'>-	eor	$t1,$t1,$Elo,lsl#18</div><div class='del'>-	ldr	$t3,[sp,#$Hoff+4]	@ h.hi</div><div class='del'>-	eor	$t0,$t0,$Elo,lsr#18</div><div class='del'>-	eor	$t1,$t1,$Ehi,lsr#18</div><div class='del'>-	eor	$t0,$t0,$Ehi,lsl#14</div><div class='del'>-	eor	$t1,$t1,$Elo,lsl#14</div><div class='del'>-	eor	$t0,$t0,$Ehi,lsr#9</div><div class='del'>-	eor	$t1,$t1,$Elo,lsr#9</div><div class='del'>-	eor	$t0,$t0,$Elo,lsl#23</div><div class='del'>-	eor	$t1,$t1,$Ehi,lsl#23	@ Sigma1(e)</div><div class='del'>-	adds	$Tlo,$Tlo,$t0</div><div class='del'>-	ldr	$t0,[sp,#$Foff+0]	@ f.lo</div><div class='del'>-	adc	$Thi,$Thi,$t1		@ T += Sigma1(e)</div><div class='del'>-	ldr	$t1,[sp,#$Foff+4]	@ f.hi</div><div class='del'>-	adds	$Tlo,$Tlo,$t2</div><div class='del'>-	ldr	$t2,[sp,#$Goff+0]	@ g.lo</div><div class='del'>-	adc	$Thi,$Thi,$t3		@ T += h</div><div class='del'>-	ldr	$t3,[sp,#$Goff+4]	@ g.hi</div><div class='del'>-</div><div class='del'>-	eor	$t0,$t0,$t2</div><div class='del'>-	str	$Elo,[sp,#$Eoff+0]</div><div class='del'>-	eor	$t1,$t1,$t3</div><div class='del'>-	str	$Ehi,[sp,#$Eoff+4]</div><div class='del'>-	and	$t0,$t0,$Elo</div><div class='del'>-	str	$Alo,[sp,#$Aoff+0]</div><div class='del'>-	and	$t1,$t1,$Ehi</div><div class='del'>-	str	$Ahi,[sp,#$Aoff+4]</div><div class='del'>-	eor	$t0,$t0,$t2</div><div class='del'>-	ldr	$t2,[$Ktbl,#$lo]	@ K[i].lo</div><div class='del'>-	eor	$t1,$t1,$t3		@ Ch(e,f,g)</div><div class='del'>-	ldr	$t3,[$Ktbl,#$hi]	@ K[i].hi</div><div class='del'>-</div><div class='del'>-	adds	$Tlo,$Tlo,$t0</div><div class='del'>-	ldr	$Elo,[sp,#$Doff+0]	@ d.lo</div><div class='del'>-	adc	$Thi,$Thi,$t1		@ T += Ch(e,f,g)</div><div class='del'>-	ldr	$Ehi,[sp,#$Doff+4]	@ d.hi</div><div class='del'>-	adds	$Tlo,$Tlo,$t2</div><div class='del'>-	and	$t0,$t2,#0xff</div><div class='del'>-	adc	$Thi,$Thi,$t3		@ T += K[i]</div><div class='del'>-	adds	$Elo,$Elo,$Tlo</div><div class='del'>-	ldr	$t2,[sp,#$Boff+0]	@ b.lo</div><div class='del'>-	adc	$Ehi,$Ehi,$Thi		@ d += T</div><div class='del'>-	teq	$t0,#$magic</div><div class='del'>-</div><div class='del'>-	ldr	$t3,[sp,#$Coff+0]	@ c.lo</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-	it	eq			@ Thumb2 thing, sanity check in ARM</div><div class='del'>-#endif</div><div class='del'>-	orreq	$Ktbl,$Ktbl,#1</div><div class='del'>-	@ Sigma0(x)	(ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))</div><div class='del'>-	@ LO		lo&gt;&gt;28^hi&lt;&lt;4  ^ hi&gt;&gt;2^lo&lt;&lt;30 ^ hi&gt;&gt;7^lo&lt;&lt;25</div><div class='del'>-	@ HI		hi&gt;&gt;28^lo&lt;&lt;4  ^ lo&gt;&gt;2^hi&lt;&lt;30 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='del'>-	mov	$t0,$Alo,lsr#28</div><div class='del'>-	mov	$t1,$Ahi,lsr#28</div><div class='del'>-	eor	$t0,$t0,$Ahi,lsl#4</div><div class='del'>-	eor	$t1,$t1,$Alo,lsl#4</div><div class='del'>-	eor	$t0,$t0,$Ahi,lsr#2</div><div class='del'>-	eor	$t1,$t1,$Alo,lsr#2</div><div class='del'>-	eor	$t0,$t0,$Alo,lsl#30</div><div class='del'>-	eor	$t1,$t1,$Ahi,lsl#30</div><div class='del'>-	eor	$t0,$t0,$Ahi,lsr#7</div><div class='del'>-	eor	$t1,$t1,$Alo,lsr#7</div><div class='del'>-	eor	$t0,$t0,$Alo,lsl#25</div><div class='del'>-	eor	$t1,$t1,$Ahi,lsl#25	@ Sigma0(a)</div><div class='del'>-	adds	$Tlo,$Tlo,$t0</div><div class='del'>-	and	$t0,$Alo,$t2</div><div class='del'>-	adc	$Thi,$Thi,$t1		@ T += Sigma0(a)</div><div class='del'>-</div><div class='del'>-	ldr	$t1,[sp,#$Boff+4]	@ b.hi</div><div class='del'>-	orr	$Alo,$Alo,$t2</div><div class='del'>-	ldr	$t2,[sp,#$Coff+4]	@ c.hi</div><div class='del'>-	and	$Alo,$Alo,$t3</div><div class='del'>-	and	$t3,$Ahi,$t1</div><div class='del'>-	orr	$Ahi,$Ahi,$t1</div><div class='del'>-	orr	$Alo,$Alo,$t0		@ Maj(a,b,c).lo</div><div class='del'>-	and	$Ahi,$Ahi,$t2</div><div class='del'>-	adds	$Alo,$Alo,$Tlo</div><div class='del'>-	orr	$Ahi,$Ahi,$t3		@ Maj(a,b,c).hi</div><div class='del'>-	sub	sp,sp,#8</div><div class='del'>-	adc	$Ahi,$Ahi,$Thi		@ h += T</div><div class='del'>-	tst	$Ktbl,#1</div><div class='del'>-	add	$Ktbl,$Ktbl,#8</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-$code=&lt;&lt;___;</div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-# include "arm_arch.h"</div><div class='del'>-# define VFP_ABI_PUSH	vstmdb	sp!,{d8-d15}</div><div class='del'>-# define VFP_ABI_POP	vldmia	sp!,{d8-d15}</div><div class='del'>-#else</div><div class='del'>-# define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-# define __ARM_MAX_ARCH__ 7</div><div class='del'>-# define VFP_ABI_PUSH</div><div class='del'>-# define VFP_ABI_POP</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-# define LO 0</div><div class='del'>-# define HI 4</div><div class='del'>-# define WORD64(hi0,lo0,hi1,lo1)	.word	lo0,hi0, lo1,hi1</div><div class='del'>-#else</div><div class='del'>-# define HI 0</div><div class='del'>-# define LO 4</div><div class='del'>-# define WORD64(hi0,lo0,hi1,lo1)	.word	hi0,lo0, hi1,lo1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-.code	32</div><div class='del'>-#else</div><div class='del'>-.syntax unified</div><div class='del'>-# ifdef __thumb2__</div><div class='del'>-.thumb</div><div class='del'>-# else</div><div class='del'>-.code   32</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.type	K512,%object</div><div class='del'>-.align	5</div><div class='del'>-K512:</div><div class='del'>-WORD64(0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd)</div><div class='del'>-WORD64(0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc)</div><div class='del'>-WORD64(0x3956c25b,0xf348b538, 0x59f111f1,0xb605d019)</div><div class='del'>-WORD64(0x923f82a4,0xaf194f9b, 0xab1c5ed5,0xda6d8118)</div><div class='del'>-WORD64(0xd807aa98,0xa3030242, 0x12835b01,0x45706fbe)</div><div class='del'>-WORD64(0x243185be,0x4ee4b28c, 0x550c7dc3,0xd5ffb4e2)</div><div class='del'>-WORD64(0x72be5d74,0xf27b896f, 0x80deb1fe,0x3b1696b1)</div><div class='del'>-WORD64(0x9bdc06a7,0x25c71235, 0xc19bf174,0xcf692694)</div><div class='del'>-WORD64(0xe49b69c1,0x9ef14ad2, 0xefbe4786,0x384f25e3)</div><div class='del'>-WORD64(0x0fc19dc6,0x8b8cd5b5, 0x240ca1cc,0x77ac9c65)</div><div class='del'>-WORD64(0x2de92c6f,0x592b0275, 0x4a7484aa,0x6ea6e483)</div><div class='del'>-WORD64(0x5cb0a9dc,0xbd41fbd4, 0x76f988da,0x831153b5)</div><div class='del'>-WORD64(0x983e5152,0xee66dfab, 0xa831c66d,0x2db43210)</div><div class='del'>-WORD64(0xb00327c8,0x98fb213f, 0xbf597fc7,0xbeef0ee4)</div><div class='del'>-WORD64(0xc6e00bf3,0x3da88fc2, 0xd5a79147,0x930aa725)</div><div class='del'>-WORD64(0x06ca6351,0xe003826f, 0x14292967,0x0a0e6e70)</div><div class='del'>-WORD64(0x27b70a85,0x46d22ffc, 0x2e1b2138,0x5c26c926)</div><div class='del'>-WORD64(0x4d2c6dfc,0x5ac42aed, 0x53380d13,0x9d95b3df)</div><div class='del'>-WORD64(0x650a7354,0x8baf63de, 0x766a0abb,0x3c77b2a8)</div><div class='del'>-WORD64(0x81c2c92e,0x47edaee6, 0x92722c85,0x1482353b)</div><div class='del'>-WORD64(0xa2bfe8a1,0x4cf10364, 0xa81a664b,0xbc423001)</div><div class='del'>-WORD64(0xc24b8b70,0xd0f89791, 0xc76c51a3,0x0654be30)</div><div class='del'>-WORD64(0xd192e819,0xd6ef5218, 0xd6990624,0x5565a910)</div><div class='del'>-WORD64(0xf40e3585,0x5771202a, 0x106aa070,0x32bbd1b8)</div><div class='del'>-WORD64(0x19a4c116,0xb8d2d0c8, 0x1e376c08,0x5141ab53)</div><div class='del'>-WORD64(0x2748774c,0xdf8eeb99, 0x34b0bcb5,0xe19b48a8)</div><div class='del'>-WORD64(0x391c0cb3,0xc5c95a63, 0x4ed8aa4a,0xe3418acb)</div><div class='del'>-WORD64(0x5b9cca4f,0x7763e373, 0x682e6ff3,0xd6b2b8a3)</div><div class='del'>-WORD64(0x748f82ee,0x5defb2fc, 0x78a5636f,0x43172f60)</div><div class='del'>-WORD64(0x84c87814,0xa1f0ab72, 0x8cc70208,0x1a6439ec)</div><div class='del'>-WORD64(0x90befffa,0x23631e28, 0xa4506ceb,0xde82bde9)</div><div class='del'>-WORD64(0xbef9a3f7,0xb2c67915, 0xc67178f2,0xe372532b)</div><div class='del'>-WORD64(0xca273ece,0xea26619c, 0xd186b8c7,0x21c0c207)</div><div class='del'>-WORD64(0xeada7dd6,0xcde0eb1e, 0xf57d4f7f,0xee6ed178)</div><div class='del'>-WORD64(0x06f067aa,0x72176fba, 0x0a637dc5,0xa2c898a6)</div><div class='del'>-WORD64(0x113f9804,0xbef90dae, 0x1b710b35,0x131c471b)</div><div class='del'>-WORD64(0x28db77f5,0x23047d84, 0x32caab7b,0x40c72493)</div><div class='del'>-WORD64(0x3c9ebe0a,0x15c9bebc, 0x431d67c4,0x9c100d4c)</div><div class='del'>-WORD64(0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a)</div><div class='del'>-WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)</div><div class='del'>-.size	K512,.-K512</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-.LOPENSSL_armcap:</div><div class='del'>-.word	OPENSSL_armcap_P-sha512_block_data_order</div><div class='del'>-.skip	32-4</div><div class='del'>-#else</div><div class='del'>-.skip	32</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.global	sha512_block_data_order</div><div class='del'>-.type	sha512_block_data_order,%function</div><div class='del'>-sha512_block_data_order:</div><div class='del'>-.Lsha512_block_data_order:</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	sub	r3,pc,#8		@ sha512_block_data_order</div><div class='del'>-#else</div><div class='del'>-	adr	r3,.Lsha512_block_data_order</div><div class='del'>-#endif</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-	ldr	r12,.LOPENSSL_armcap</div><div class='del'>-	ldr	r12,[r3,r12]		@ OPENSSL_armcap_P</div><div class='del'>-	tst	r12,#1</div><div class='del'>-	bne	.LNEON</div><div class='del'>-#endif</div><div class='del'>-	add	$len,$inp,$len,lsl#7	@ len to point at the end of inp</div><div class='del'>-	stmdb	sp!,{r4-r12,lr}</div><div class='del'>-	sub	$Ktbl,r3,#672		@ K512</div><div class='del'>-	sub	sp,sp,#9*8</div><div class='del'>-</div><div class='del'>-	ldr	$Elo,[$ctx,#$Eoff+$lo]</div><div class='del'>-	ldr	$Ehi,[$ctx,#$Eoff+$hi]</div><div class='del'>-	ldr	$t0, [$ctx,#$Goff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Goff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Hoff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Hoff+$hi]</div><div class='del'>-.Loop:</div><div class='del'>-	str	$t0, [sp,#$Goff+0]</div><div class='del'>-	str	$t1, [sp,#$Goff+4]</div><div class='del'>-	str	$t2, [sp,#$Hoff+0]</div><div class='del'>-	str	$t3, [sp,#$Hoff+4]</div><div class='del'>-	ldr	$Alo,[$ctx,#$Aoff+$lo]</div><div class='del'>-	ldr	$Ahi,[$ctx,#$Aoff+$hi]</div><div class='del'>-	ldr	$Tlo,[$ctx,#$Boff+$lo]</div><div class='del'>-	ldr	$Thi,[$ctx,#$Boff+$hi]</div><div class='del'>-	ldr	$t0, [$ctx,#$Coff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Coff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Doff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Doff+$hi]</div><div class='del'>-	str	$Tlo,[sp,#$Boff+0]</div><div class='del'>-	str	$Thi,[sp,#$Boff+4]</div><div class='del'>-	str	$t0, [sp,#$Coff+0]</div><div class='del'>-	str	$t1, [sp,#$Coff+4]</div><div class='del'>-	str	$t2, [sp,#$Doff+0]</div><div class='del'>-	str	$t3, [sp,#$Doff+4]</div><div class='del'>-	ldr	$Tlo,[$ctx,#$Foff+$lo]</div><div class='del'>-	ldr	$Thi,[$ctx,#$Foff+$hi]</div><div class='del'>-	str	$Tlo,[sp,#$Foff+0]</div><div class='del'>-	str	$Thi,[sp,#$Foff+4]</div><div class='del'>-</div><div class='del'>-.L00_15:</div><div class='del'>-#if __ARM_ARCH__&lt;7</div><div class='del'>-	ldrb	$Tlo,[$inp,#7]</div><div class='del'>-	ldrb	$t0, [$inp,#6]</div><div class='del'>-	ldrb	$t1, [$inp,#5]</div><div class='del'>-	ldrb	$t2, [$inp,#4]</div><div class='del'>-	ldrb	$Thi,[$inp,#3]</div><div class='del'>-	ldrb	$t3, [$inp,#2]</div><div class='del'>-	orr	$Tlo,$Tlo,$t0,lsl#8</div><div class='del'>-	ldrb	$t0, [$inp,#1]</div><div class='del'>-	orr	$Tlo,$Tlo,$t1,lsl#16</div><div class='del'>-	ldrb	$t1, [$inp],#8</div><div class='del'>-	orr	$Tlo,$Tlo,$t2,lsl#24</div><div class='del'>-	orr	$Thi,$Thi,$t3,lsl#8</div><div class='del'>-	orr	$Thi,$Thi,$t0,lsl#16</div><div class='del'>-	orr	$Thi,$Thi,$t1,lsl#24</div><div class='del'>-#else</div><div class='del'>-	ldr	$Tlo,[$inp,#4]</div><div class='del'>-	ldr	$Thi,[$inp],#8</div><div class='del'>-#ifdef __ARMEL__</div><div class='del'>-	rev	$Tlo,$Tlo</div><div class='del'>-	rev	$Thi,$Thi</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-	&amp;BODY_00_15(0x94);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	tst	$Ktbl,#1</div><div class='del'>-	beq	.L00_15</div><div class='del'>-	ldr	$t0,[sp,#`$Xoff+8*(16-1)`+0]</div><div class='del'>-	ldr	$t1,[sp,#`$Xoff+8*(16-1)`+4]</div><div class='del'>-	bic	$Ktbl,$Ktbl,#1</div><div class='del'>-.L16_79:</div><div class='del'>-	@ sigma0(x)	(ROTR((x),1)  ^ ROTR((x),8)  ^ ((x)&gt;&gt;7))</div><div class='del'>-	@ LO		lo&gt;&gt;1^hi&lt;&lt;31  ^ lo&gt;&gt;8^hi&lt;&lt;24 ^ lo&gt;&gt;7^hi&lt;&lt;25</div><div class='del'>-	@ HI		hi&gt;&gt;1^lo&lt;&lt;31  ^ hi&gt;&gt;8^lo&lt;&lt;24 ^ hi&gt;&gt;7</div><div class='del'>-	mov	$Tlo,$t0,lsr#1</div><div class='del'>-	ldr	$t2,[sp,#`$Xoff+8*(16-14)`+0]</div><div class='del'>-	mov	$Thi,$t1,lsr#1</div><div class='del'>-	ldr	$t3,[sp,#`$Xoff+8*(16-14)`+4]</div><div class='del'>-	eor	$Tlo,$Tlo,$t1,lsl#31</div><div class='del'>-	eor	$Thi,$Thi,$t0,lsl#31</div><div class='del'>-	eor	$Tlo,$Tlo,$t0,lsr#8</div><div class='del'>-	eor	$Thi,$Thi,$t1,lsr#8</div><div class='del'>-	eor	$Tlo,$Tlo,$t1,lsl#24</div><div class='del'>-	eor	$Thi,$Thi,$t0,lsl#24</div><div class='del'>-	eor	$Tlo,$Tlo,$t0,lsr#7</div><div class='del'>-	eor	$Thi,$Thi,$t1,lsr#7</div><div class='del'>-	eor	$Tlo,$Tlo,$t1,lsl#25</div><div class='del'>-</div><div class='del'>-	@ sigma1(x)	(ROTR((x),19) ^ ROTR((x),61) ^ ((x)&gt;&gt;6))</div><div class='del'>-	@ LO		lo&gt;&gt;19^hi&lt;&lt;13 ^ hi&gt;&gt;29^lo&lt;&lt;3 ^ lo&gt;&gt;6^hi&lt;&lt;26</div><div class='del'>-	@ HI		hi&gt;&gt;19^lo&lt;&lt;13 ^ lo&gt;&gt;29^hi&lt;&lt;3 ^ hi&gt;&gt;6</div><div class='del'>-	mov	$t0,$t2,lsr#19</div><div class='del'>-	mov	$t1,$t3,lsr#19</div><div class='del'>-	eor	$t0,$t0,$t3,lsl#13</div><div class='del'>-	eor	$t1,$t1,$t2,lsl#13</div><div class='del'>-	eor	$t0,$t0,$t3,lsr#29</div><div class='del'>-	eor	$t1,$t1,$t2,lsr#29</div><div class='del'>-	eor	$t0,$t0,$t2,lsl#3</div><div class='del'>-	eor	$t1,$t1,$t3,lsl#3</div><div class='del'>-	eor	$t0,$t0,$t2,lsr#6</div><div class='del'>-	eor	$t1,$t1,$t3,lsr#6</div><div class='del'>-	ldr	$t2,[sp,#`$Xoff+8*(16-9)`+0]</div><div class='del'>-	eor	$t0,$t0,$t3,lsl#26</div><div class='del'>-</div><div class='del'>-	ldr	$t3,[sp,#`$Xoff+8*(16-9)`+4]</div><div class='del'>-	adds	$Tlo,$Tlo,$t0</div><div class='del'>-	ldr	$t0,[sp,#`$Xoff+8*16`+0]</div><div class='del'>-	adc	$Thi,$Thi,$t1</div><div class='del'>-</div><div class='del'>-	ldr	$t1,[sp,#`$Xoff+8*16`+4]</div><div class='del'>-	adds	$Tlo,$Tlo,$t2</div><div class='del'>-	adc	$Thi,$Thi,$t3</div><div class='del'>-	adds	$Tlo,$Tlo,$t0</div><div class='del'>-	adc	$Thi,$Thi,$t1</div><div class='del'>-___</div><div class='del'>-	&amp;BODY_00_15(0x17);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if __ARM_ARCH__&gt;=7</div><div class='del'>-	ittt	eq			@ Thumb2 thing, sanity check in ARM</div><div class='del'>-#endif</div><div class='del'>-	ldreq	$t0,[sp,#`$Xoff+8*(16-1)`+0]</div><div class='del'>-	ldreq	$t1,[sp,#`$Xoff+8*(16-1)`+4]</div><div class='del'>-	beq	.L16_79</div><div class='del'>-	bic	$Ktbl,$Ktbl,#1</div><div class='del'>-</div><div class='del'>-	ldr	$Tlo,[sp,#$Boff+0]</div><div class='del'>-	ldr	$Thi,[sp,#$Boff+4]</div><div class='del'>-	ldr	$t0, [$ctx,#$Aoff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Aoff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Boff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Boff+$hi]</div><div class='del'>-	adds	$t0,$Alo,$t0</div><div class='del'>-	str	$t0, [$ctx,#$Aoff+$lo]</div><div class='del'>-	adc	$t1,$Ahi,$t1</div><div class='del'>-	str	$t1, [$ctx,#$Aoff+$hi]</div><div class='del'>-	adds	$t2,$Tlo,$t2</div><div class='del'>-	str	$t2, [$ctx,#$Boff+$lo]</div><div class='del'>-	adc	$t3,$Thi,$t3</div><div class='del'>-	str	$t3, [$ctx,#$Boff+$hi]</div><div class='del'>-</div><div class='del'>-	ldr	$Alo,[sp,#$Coff+0]</div><div class='del'>-	ldr	$Ahi,[sp,#$Coff+4]</div><div class='del'>-	ldr	$Tlo,[sp,#$Doff+0]</div><div class='del'>-	ldr	$Thi,[sp,#$Doff+4]</div><div class='del'>-	ldr	$t0, [$ctx,#$Coff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Coff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Doff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Doff+$hi]</div><div class='del'>-	adds	$t0,$Alo,$t0</div><div class='del'>-	str	$t0, [$ctx,#$Coff+$lo]</div><div class='del'>-	adc	$t1,$Ahi,$t1</div><div class='del'>-	str	$t1, [$ctx,#$Coff+$hi]</div><div class='del'>-	adds	$t2,$Tlo,$t2</div><div class='del'>-	str	$t2, [$ctx,#$Doff+$lo]</div><div class='del'>-	adc	$t3,$Thi,$t3</div><div class='del'>-	str	$t3, [$ctx,#$Doff+$hi]</div><div class='del'>-</div><div class='del'>-	ldr	$Tlo,[sp,#$Foff+0]</div><div class='del'>-	ldr	$Thi,[sp,#$Foff+4]</div><div class='del'>-	ldr	$t0, [$ctx,#$Eoff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Eoff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Foff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Foff+$hi]</div><div class='del'>-	adds	$Elo,$Elo,$t0</div><div class='del'>-	str	$Elo,[$ctx,#$Eoff+$lo]</div><div class='del'>-	adc	$Ehi,$Ehi,$t1</div><div class='del'>-	str	$Ehi,[$ctx,#$Eoff+$hi]</div><div class='del'>-	adds	$t2,$Tlo,$t2</div><div class='del'>-	str	$t2, [$ctx,#$Foff+$lo]</div><div class='del'>-	adc	$t3,$Thi,$t3</div><div class='del'>-	str	$t3, [$ctx,#$Foff+$hi]</div><div class='del'>-</div><div class='del'>-	ldr	$Alo,[sp,#$Goff+0]</div><div class='del'>-	ldr	$Ahi,[sp,#$Goff+4]</div><div class='del'>-	ldr	$Tlo,[sp,#$Hoff+0]</div><div class='del'>-	ldr	$Thi,[sp,#$Hoff+4]</div><div class='del'>-	ldr	$t0, [$ctx,#$Goff+$lo]</div><div class='del'>-	ldr	$t1, [$ctx,#$Goff+$hi]</div><div class='del'>-	ldr	$t2, [$ctx,#$Hoff+$lo]</div><div class='del'>-	ldr	$t3, [$ctx,#$Hoff+$hi]</div><div class='del'>-	adds	$t0,$Alo,$t0</div><div class='del'>-	str	$t0, [$ctx,#$Goff+$lo]</div><div class='del'>-	adc	$t1,$Ahi,$t1</div><div class='del'>-	str	$t1, [$ctx,#$Goff+$hi]</div><div class='del'>-	adds	$t2,$Tlo,$t2</div><div class='del'>-	str	$t2, [$ctx,#$Hoff+$lo]</div><div class='del'>-	adc	$t3,$Thi,$t3</div><div class='del'>-	str	$t3, [$ctx,#$Hoff+$hi]</div><div class='del'>-</div><div class='del'>-	add	sp,sp,#640</div><div class='del'>-	sub	$Ktbl,$Ktbl,#640</div><div class='del'>-</div><div class='del'>-	teq	$inp,$len</div><div class='del'>-	bne	.Loop</div><div class='del'>-</div><div class='del'>-	add	sp,sp,#8*9		@ destroy frame</div><div class='del'>-#if __ARM_ARCH__&gt;=5</div><div class='del'>-	ldmia	sp!,{r4-r12,pc}</div><div class='del'>-#else</div><div class='del'>-	ldmia	sp!,{r4-r12,lr}</div><div class='del'>-	tst	lr,#1</div><div class='del'>-	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='del'>-	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='del'>-#endif</div><div class='del'>-.size	sha512_block_data_order,.-sha512_block_data_order</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-my @Sigma0=(28,34,39);</div><div class='del'>-my @Sigma1=(14,18,41);</div><div class='del'>-my @sigma0=(1, 8, 7);</div><div class='del'>-my @sigma1=(19,61,6);</div><div class='del'>-</div><div class='del'>-my $Ktbl="r3";</div><div class='del'>-my $cnt="r12";	# volatile register known as ip, intra-procedure-call scratch</div><div class='del'>-</div><div class='del'>-my @X=map("d$_",(0..15));</div><div class='del'>-my @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("d$_",(16..23));</div><div class='del'>-</div><div class='del'>-sub NEON_00_15() {</div><div class='del'>-my $i=shift;</div><div class='del'>-my ($a,$b,$c,$d,$e,$f,$g,$h)=@_;</div><div class='del'>-my ($t0,$t1,$t2,$T1,$K,$Ch,$Maj)=map("d$_",(24..31));	# temps</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___ if ($i&lt;16 || $i&amp;1);</div><div class='del'>-	vshr.u64	$t0,$e,#@Sigma1[0]	@ $i</div><div class='del'>-#if $i&lt;16</div><div class='del'>-	vld1.64		{@X[$i%16]},[$inp]!	@ handles unaligned</div><div class='del'>-#endif</div><div class='del'>-	vshr.u64	$t1,$e,#@Sigma1[1]</div><div class='del'>-#if $i&gt;0</div><div class='del'>-	 vadd.i64	$a,$Maj			@ h+=Maj from the past</div><div class='del'>-#endif</div><div class='del'>-	vshr.u64	$t2,$e,#@Sigma1[2]</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	vld1.64		{$K},[$Ktbl,:64]!	@ K[i++]</div><div class='del'>-	vsli.64		$t0,$e,#`64-@Sigma1[0]`</div><div class='del'>-	vsli.64		$t1,$e,#`64-@Sigma1[1]`</div><div class='del'>-	vmov		$Ch,$e</div><div class='del'>-	vsli.64		$t2,$e,#`64-@Sigma1[2]`</div><div class='del'>-#if $i&lt;16 &amp;&amp; defined(__ARMEL__)</div><div class='del'>-	vrev64.8	@X[$i],@X[$i]</div><div class='del'>-#endif</div><div class='del'>-	veor		$t1,$t0</div><div class='del'>-	vbsl		$Ch,$f,$g		@ Ch(e,f,g)</div><div class='del'>-	vshr.u64	$t0,$a,#@Sigma0[0]</div><div class='del'>-	veor		$t2,$t1			@ Sigma1(e)</div><div class='del'>-	vadd.i64	$T1,$Ch,$h</div><div class='del'>-	vshr.u64	$t1,$a,#@Sigma0[1]</div><div class='del'>-	vsli.64		$t0,$a,#`64-@Sigma0[0]`</div><div class='del'>-	vadd.i64	$T1,$t2</div><div class='del'>-	vshr.u64	$t2,$a,#@Sigma0[2]</div><div class='del'>-	vadd.i64	$K,@X[$i%16]</div><div class='del'>-	vsli.64		$t1,$a,#`64-@Sigma0[1]`</div><div class='del'>-	veor		$Maj,$a,$b</div><div class='del'>-	vsli.64		$t2,$a,#`64-@Sigma0[2]`</div><div class='del'>-	veor		$h,$t0,$t1</div><div class='del'>-	vadd.i64	$T1,$K</div><div class='del'>-	vbsl		$Maj,$c,$b		@ Maj(a,b,c)</div><div class='del'>-	veor		$h,$t2			@ Sigma0(a)</div><div class='del'>-	vadd.i64	$d,$T1</div><div class='del'>-	vadd.i64	$Maj,$T1</div><div class='del'>-	@ vadd.i64	$h,$Maj</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub NEON_16_79() {</div><div class='del'>-my $i=shift;</div><div class='del'>-</div><div class='del'>-if ($i&amp;1)	{ &amp;NEON_00_15($i,@_); return; }</div><div class='del'>-</div><div class='del'>-# 2x-vectorized, therefore runs every 2nd round</div><div class='del'>-my @X=map("q$_",(0..7));			# view @X as 128-bit vector</div><div class='del'>-my ($t0,$t1,$s0,$s1) = map("q$_",(12..15));	# temps</div><div class='del'>-my ($d0,$d1,$d2) = map("d$_",(24..26));		# temps from NEON_00_15</div><div class='del'>-my $e=@_[4];					# $e from NEON_00_15</div><div class='del'>-$i /= 2;</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	vshr.u64	$t0,@X[($i+7)%8],#@sigma1[0]</div><div class='del'>-	vshr.u64	$t1,@X[($i+7)%8],#@sigma1[1]</div><div class='del'>-	 vadd.i64	@_[0],d30			@ h+=Maj from the past</div><div class='del'>-	vshr.u64	$s1,@X[($i+7)%8],#@sigma1[2]</div><div class='del'>-	vsli.64		$t0,@X[($i+7)%8],#`64-@sigma1[0]`</div><div class='del'>-	vext.8		$s0,@X[$i%8],@X[($i+1)%8],#8	@ X[i+1]</div><div class='del'>-	vsli.64		$t1,@X[($i+7)%8],#`64-@sigma1[1]`</div><div class='del'>-	veor		$s1,$t0</div><div class='del'>-	vshr.u64	$t0,$s0,#@sigma0[0]</div><div class='del'>-	veor		$s1,$t1				@ sigma1(X[i+14])</div><div class='del'>-	vshr.u64	$t1,$s0,#@sigma0[1]</div><div class='del'>-	vadd.i64	@X[$i%8],$s1</div><div class='del'>-	vshr.u64	$s1,$s0,#@sigma0[2]</div><div class='del'>-	vsli.64		$t0,$s0,#`64-@sigma0[0]`</div><div class='del'>-	vsli.64		$t1,$s0,#`64-@sigma0[1]`</div><div class='del'>-	vext.8		$s0,@X[($i+4)%8],@X[($i+5)%8],#8	@ X[i+9]</div><div class='del'>-	veor		$s1,$t0</div><div class='del'>-	vshr.u64	$d0,$e,#@Sigma1[0]		@ from NEON_00_15</div><div class='del'>-	vadd.i64	@X[$i%8],$s0</div><div class='del'>-	vshr.u64	$d1,$e,#@Sigma1[1]		@ from NEON_00_15</div><div class='del'>-	veor		$s1,$t1				@ sigma0(X[i+1])</div><div class='del'>-	vshr.u64	$d2,$e,#@Sigma1[2]		@ from NEON_00_15</div><div class='del'>-	vadd.i64	@X[$i%8],$s1</div><div class='del'>-___</div><div class='del'>-	&amp;NEON_00_15(2*$i,@_);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7</div><div class='del'>-.arch	armv7-a</div><div class='del'>-.fpu	neon</div><div class='del'>-</div><div class='del'>-.global	sha512_block_data_order_neon</div><div class='del'>-.type	sha512_block_data_order_neon,%function</div><div class='del'>-.align	4</div><div class='del'>-sha512_block_data_order_neon:</div><div class='del'>-.LNEON:</div><div class='del'>-	dmb				@ errata #451034 on early Cortex A8</div><div class='del'>-	add	$len,$inp,$len,lsl#7	@ len to point at the end of inp</div><div class='del'>-	VFP_ABI_PUSH</div><div class='del'>-	adr	$Ktbl,.Lsha512_block_data_order</div><div class='del'>-	sub	$Ktbl,$Ktbl,.Lsha512_block_data_order-K512</div><div class='del'>-	vldmia	$ctx,{$A-$H}		@ load context</div><div class='del'>-.Loop_neon:</div><div class='del'>-___</div><div class='del'>-for($i=0;$i&lt;16;$i++)	{ &amp;NEON_00_15($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	mov		$cnt,#4</div><div class='del'>-.L16_79_neon:</div><div class='del'>-	subs		$cnt,#1</div><div class='del'>-___</div><div class='del'>-for(;$i&lt;32;$i++)	{ &amp;NEON_16_79($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	bne		.L16_79_neon</div><div class='del'>-</div><div class='del'>-	 vadd.i64	$A,d30		@ h+=Maj from the past</div><div class='del'>-	vldmia		$ctx,{d24-d31}	@ load context to temp</div><div class='del'>-	vadd.i64	q8,q12		@ vectorized accumulate</div><div class='del'>-	vadd.i64	q9,q13</div><div class='del'>-	vadd.i64	q10,q14</div><div class='del'>-	vadd.i64	q11,q15</div><div class='del'>-	vstmia		$ctx,{$A-$H}	@ save context</div><div class='del'>-	teq		$inp,$len</div><div class='del'>-	sub		$Ktbl,#640	@ rewind K512</div><div class='del'>-	bne		.Loop_neon</div><div class='del'>-</div><div class='del'>-	VFP_ABI_POP</div><div class='del'>-	ret				@ bx lr</div><div class='del'>-.size	sha512_block_data_order_neon,.-sha512_block_data_order_neon</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.asciz	"SHA512 block transform for ARMv4/NEON, CRYPTOGAMS by &lt;appro\@openssl.org&gt;"</div><div class='del'>-.align	2</div><div class='del'>-#if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='del'>-.comm	OPENSSL_armcap_P,4,4</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-$code =~ s/\`([^\`]*)\`/eval $1/gem;</div><div class='del'>-$code =~ s/\bbx\s+lr\b/.word\t0xe12fff1e/gm;	# make it possible to compile with -march=armv4</div><div class='del'>-$code =~ s/\bret\b/bx	lr/gm;</div><div class='del'>-</div><div class='del'>-open SELF,$0;</div><div class='del'>-while(&lt;SELF&gt;) {</div><div class='del'>-	next if (/^#!/);</div><div class='del'>-	last if (!s/^#/@/ and !/^$/);</div><div class='del'>-	print;</div><div class='del'>-}</div><div class='del'>-close SELF;</div><div class='del'>-</div><div class='del'>-print $code;</div><div class='del'>-close STDOUT; # enforce flush</div><div class='head'>diff --git a/arch/arm/crypto/sha512-glue.c b/arch/arm/crypto/sha512-glue.c<br/>deleted file mode 100644<br/>index 1be5bd498af3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha512-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,114 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha512-glue.c - accelerated SHA-384/512 for ARM</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha512.h"</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Accelerated SHA-384/SHA-512 secure hash for ARM");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512-arm");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha512_block_data_order(struct sha512_state *state,</div><div class='del'>-					u8 const *src, int blocks);</div><div class='del'>-</div><div class='del'>-int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return sha512_base_do_update(desc, data, len, sha512_block_data_order);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_arm_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_block_data_order);</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_block_data_order);</div><div class='del'>-	return sha512_arm_final(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha512_arm_algs[] = { {</div><div class='del'>-	.init			= sha384_base_init,</div><div class='del'>-	.update			= sha512_arm_update,</div><div class='del'>-	.final			= sha512_arm_final,</div><div class='del'>-	.finup			= sha512_arm_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha384",</div><div class='del'>-		.cra_driver_name	= "sha384-arm",</div><div class='del'>-		.cra_priority		= 250,</div><div class='del'>-		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-},  {</div><div class='del'>-	.init			= sha512_base_init,</div><div class='del'>-	.update			= sha512_arm_update,</div><div class='del'>-	.final			= sha512_arm_final,</div><div class='del'>-	.finup			= sha512_arm_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha512",</div><div class='del'>-		.cra_driver_name	= "sha512-arm",</div><div class='del'>-		.cra_priority		= 250,</div><div class='del'>-		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha512_arm_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_shashes(sha512_arm_algs,</div><div class='del'>-				      ARRAY_SIZE(sha512_arm_algs));</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon()) {</div><div class='del'>-		err = crypto_register_shashes(sha512_neon_algs,</div><div class='del'>-					      ARRAY_SIZE(sha512_neon_algs));</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_unregister;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_unregister:</div><div class='del'>-	crypto_unregister_shashes(sha512_arm_algs,</div><div class='del'>-				  ARRAY_SIZE(sha512_arm_algs));</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha512_arm_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(sha512_arm_algs,</div><div class='del'>-				  ARRAY_SIZE(sha512_arm_algs));</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon())</div><div class='del'>-		crypto_unregister_shashes(sha512_neon_algs,</div><div class='del'>-					  ARRAY_SIZE(sha512_neon_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha512_arm_mod_init);</div><div class='del'>-module_exit(sha512_arm_mod_fini);</div><div class='head'>diff --git a/arch/arm/crypto/sha512-neon-glue.c b/arch/arm/crypto/sha512-neon-glue.c<br/>deleted file mode 100644<br/>index c6e58fe475ac..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha512-neon-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512-neon-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha512-neon-glue.c - accelerated SHA-384/512 for ARM NEON</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha512.h"</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512-neon");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha512_block_data_order_neon(struct sha512_state *state,</div><div class='del'>-					     const u8 *src, int blocks);</div><div class='del'>-</div><div class='del'>-static int sha512_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='del'>-		return sha512_arm_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha512_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha512_base_do_update(desc, data, len,</div><div class='del'>-				      sha512_block_data_order_neon);</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct shash_alg sha512_neon_algs[] = { {</div><div class='del'>-	.init			= sha384_base_init,</div><div class='del'>-	.update			= sha512_neon_update,</div><div class='del'>-	.final			= sha512_neon_final,</div><div class='del'>-	.finup			= sha512_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha384",</div><div class='del'>-		.cra_driver_name	= "sha384-neon",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA384_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-},  {</div><div class='del'>-	.init			= sha512_base_init,</div><div class='del'>-	.update			= sha512_neon_update,</div><div class='del'>-	.final			= sha512_neon_final,</div><div class='del'>-	.finup			= sha512_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha512",</div><div class='del'>-		.cra_driver_name	= "sha512-neon",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='head'>diff --git a/arch/arm/crypto/sha512.h b/arch/arm/crypto/sha512.h<br/>deleted file mode 100644<br/>index e14572be76d1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/crypto/sha512.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/crypto/sha512.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,9 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-</div><div class='del'>-int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len);</div><div class='del'>-</div><div class='del'>-int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		     unsigned int len, u8 *out);</div><div class='del'>-</div><div class='del'>-extern struct shash_alg sha512_neon_algs[2];</div><div class='head'>diff --git a/arch/arm/include/asm/arm_pmuv3.h b/arch/arm/include/asm/arm_pmuv3.h<br/>index f63ba8986b24..2ec0e5e83fc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/arm_pmuv3.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/arm_pmuv3.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/arm_pmuv3.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/arm_pmuv3.h</a></div><div class='hunk'>@@ -212,6 +212,8 @@ static inline void write_pmuserenr(u32 val)</div><div class='ctx'> 	write_sysreg(val, PMUSERENR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void write_pmuacr(u64 val) {}</div><div class='add'>+</div><div class='ctx'> static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}</div><div class='ctx'> static inline void kvm_clr_pmu_events(u32 clr) {}</div><div class='ctx'> static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)</div><div class='hunk'>@@ -231,6 +233,7 @@ static inline void kvm_vcpu_pmu_resync_el0(void) {}</div><div class='ctx'> #define ARMV8_PMU_DFR_VER_V3P1      0x4</div><div class='ctx'> #define ARMV8_PMU_DFR_VER_V3P4      0x5</div><div class='ctx'> #define ARMV8_PMU_DFR_VER_V3P5      0x6</div><div class='add'>+#define ARMV8_PMU_DFR_VER_V3P9      0x9</div><div class='ctx'> #define ARMV8_PMU_DFR_VER_IMP_DEF   0xF</div><div class='ctx'> </div><div class='ctx'> static inline bool pmuv3_implemented(int pmuver)</div><div class='hunk'>@@ -249,6 +252,11 @@ static inline bool is_pmuv3p5(int pmuver)</div><div class='ctx'> 	return pmuver &gt;= ARMV8_PMU_DFR_VER_V3P5;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_pmuv3p9(int pmuver)</div><div class='add'>+{</div><div class='add'>+	return pmuver &gt;= ARMV8_PMU_DFR_VER_V3P9;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u64 read_pmceid0(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val = read_sysreg(PMCEID0);</div><div class='head'>diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h<br/>index e3ea34558ada..ecbc100d22a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/cache.h</a></div><div class='hunk'>@@ -26,4 +26,10 @@</div><div class='ctx'> </div><div class='ctx'> #define __read_mostly __section(".data..read_mostly")</div><div class='ctx'> </div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+#ifdef CONFIG_ARCH_HAS_CACHE_LINE_SIZE</div><div class='add'>+int cache_line_size(void);</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h<br/>index b9dbe1d4c8fe..b01c59076b84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/cachetype.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cachetype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/cachetype.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/cachetype.h</a></div><div class='hunk'>@@ -83,6 +83,14 @@ static inline unsigned int read_ccsidr(void)</div><div class='ctx'> 	asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline unsigned int read_clidr(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (val));</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='ctx'> #else /* CONFIG_CPU_V7M */</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include "asm/v7m.h"</div><div class='hunk'>@@ -96,6 +104,11 @@ static inline unsigned int read_ccsidr(void)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline unsigned int read_clidr(void)</div><div class='add'>+{</div><div class='add'>+	return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR);</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h<br/>deleted file mode 100644<br/>index f8500e5d6ea8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/cti.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/cti.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,160 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __ASMARM_CTI_H</div><div class='del'>-#define __ASMARM_CTI_H</div><div class='del'>-</div><div class='del'>-#include	&lt;asm/io.h&gt;</div><div class='del'>-#include	&lt;asm/hardware/coresight.h&gt;</div><div class='del'>-</div><div class='del'>-/* The registers' definition is from section 3.2 of</div><div class='del'>- * Embedded Cross Trigger Revision: r0p0</div><div class='del'>- */</div><div class='del'>-#define		CTICONTROL		0x000</div><div class='del'>-#define		CTISTATUS		0x004</div><div class='del'>-#define		CTILOCK			0x008</div><div class='del'>-#define		CTIPROTECTION		0x00C</div><div class='del'>-#define		CTIINTACK		0x010</div><div class='del'>-#define		CTIAPPSET		0x014</div><div class='del'>-#define		CTIAPPCLEAR		0x018</div><div class='del'>-#define		CTIAPPPULSE		0x01c</div><div class='del'>-#define		CTIINEN			0x020</div><div class='del'>-#define		CTIOUTEN		0x0A0</div><div class='del'>-#define		CTITRIGINSTATUS		0x130</div><div class='del'>-#define		CTITRIGOUTSTATUS	0x134</div><div class='del'>-#define		CTICHINSTATUS		0x138</div><div class='del'>-#define		CTICHOUTSTATUS		0x13c</div><div class='del'>-#define		CTIPERIPHID0		0xFE0</div><div class='del'>-#define		CTIPERIPHID1		0xFE4</div><div class='del'>-#define		CTIPERIPHID2		0xFE8</div><div class='del'>-#define		CTIPERIPHID3		0xFEC</div><div class='del'>-#define		CTIPCELLID0		0xFF0</div><div class='del'>-#define		CTIPCELLID1		0xFF4</div><div class='del'>-#define		CTIPCELLID2		0xFF8</div><div class='del'>-#define		CTIPCELLID3		0xFFC</div><div class='del'>-</div><div class='del'>-/* The below are from section 3.6.4 of</div><div class='del'>- * CoreSight v1.0 Architecture Specification</div><div class='del'>- */</div><div class='del'>-#define		LOCKACCESS		0xFB0</div><div class='del'>-#define		LOCKSTATUS		0xFB4</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct cti - cross trigger interface struct</div><div class='del'>- * @base: mapped virtual address for the cti base</div><div class='del'>- * @irq: irq number for the cti</div><div class='del'>- * @trig_out_for_irq: triger out number which will cause</div><div class='del'>- *	the @irq happen</div><div class='del'>- *</div><div class='del'>- * cti struct used to operate cti registers.</div><div class='del'>- */</div><div class='del'>-struct cti {</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	int irq;</div><div class='del'>-	int trig_out_for_irq;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_init - initialize the cti instance</div><div class='del'>- * @cti: cti instance</div><div class='del'>- * @base: mapped virtual address for the cti base</div><div class='del'>- * @irq: irq number for the cti</div><div class='del'>- * @trig_out: triger out number which will cause</div><div class='del'>- *	the @irq happen</div><div class='del'>- *</div><div class='del'>- * called by machine code to pass the board dependent</div><div class='del'>- * @base, @irq and @trig_out to cti.</div><div class='del'>- */</div><div class='del'>-static inline void cti_init(struct cti *cti,</div><div class='del'>-	void __iomem *base, int irq, int trig_out)</div><div class='del'>-{</div><div class='del'>-	cti-&gt;base = base;</div><div class='del'>-	cti-&gt;irq  = irq;</div><div class='del'>-	cti-&gt;trig_out_for_irq = trig_out;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_map_trigger - use the @chan to map @trig_in to @trig_out</div><div class='del'>- * @cti: cti instance</div><div class='del'>- * @trig_in: trigger in number</div><div class='del'>- * @trig_out: trigger out number</div><div class='del'>- * @channel: channel number</div><div class='del'>- *</div><div class='del'>- * This function maps one trigger in of @trig_in to one trigger</div><div class='del'>- * out of @trig_out using the channel @chan.</div><div class='del'>- */</div><div class='del'>-static inline void cti_map_trigger(struct cti *cti,</div><div class='del'>-	int trig_in, int trig_out, int chan)</div><div class='del'>-{</div><div class='del'>-	void __iomem *base = cti-&gt;base;</div><div class='del'>-	unsigned long val;</div><div class='del'>-</div><div class='del'>-	val = __raw_readl(base + CTIINEN + trig_in * 4);</div><div class='del'>-	val |= BIT(chan);</div><div class='del'>-	__raw_writel(val, base + CTIINEN + trig_in * 4);</div><div class='del'>-</div><div class='del'>-	val = __raw_readl(base + CTIOUTEN + trig_out * 4);</div><div class='del'>-	val |= BIT(chan);</div><div class='del'>-	__raw_writel(val, base + CTIOUTEN + trig_out * 4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_enable - enable the cti module</div><div class='del'>- * @cti: cti instance</div><div class='del'>- *</div><div class='del'>- * enable the cti module</div><div class='del'>- */</div><div class='del'>-static inline void cti_enable(struct cti *cti)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(0x1, cti-&gt;base + CTICONTROL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_disable - disable the cti module</div><div class='del'>- * @cti: cti instance</div><div class='del'>- *</div><div class='del'>- * enable the cti module</div><div class='del'>- */</div><div class='del'>-static inline void cti_disable(struct cti *cti)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(0, cti-&gt;base + CTICONTROL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_irq_ack - clear the cti irq</div><div class='del'>- * @cti: cti instance</div><div class='del'>- *</div><div class='del'>- * clear the cti irq</div><div class='del'>- */</div><div class='del'>-static inline void cti_irq_ack(struct cti *cti)</div><div class='del'>-{</div><div class='del'>-	void __iomem *base = cti-&gt;base;</div><div class='del'>-	unsigned long val;</div><div class='del'>-</div><div class='del'>-	val = __raw_readl(base + CTIINTACK);</div><div class='del'>-	val |= BIT(cti-&gt;trig_out_for_irq);</div><div class='del'>-	__raw_writel(val, base + CTIINTACK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_unlock - unlock cti module</div><div class='del'>- * @cti: cti instance</div><div class='del'>- *</div><div class='del'>- * unlock the cti module, or else any writes to the cti</div><div class='del'>- * module is not allowed.</div><div class='del'>- */</div><div class='del'>-static inline void cti_unlock(struct cti *cti)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(CS_LAR_KEY, cti-&gt;base + LOCKACCESS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cti_lock - lock cti module</div><div class='del'>- * @cti: cti instance</div><div class='del'>- *</div><div class='del'>- * lock the cti module, so any writes to the cti</div><div class='del'>- * module will be not allowed.</div><div class='del'>- */</div><div class='del'>-static inline void cti_lock(struct cti *cti)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(~CS_LAR_KEY, cti-&gt;base + LOCKACCESS);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h<br/>index 4b69cf850451..d3ef8e416b27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/div64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/div64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/div64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/div64.h</a></div><div class='hunk'>@@ -52,10 +52,17 @@ static inline uint32_t __div64_32(uint64_t *n, uint32_t base)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)</div><div class='add'>+#ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE</div><div class='add'>+static __always_inline</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+#endif</div><div class='add'>+uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long res;</div><div class='ctx'> 	register unsigned int tmp asm("ip") = 0;</div><div class='add'>+	bool no_ovf = __builtin_constant_p(m) &amp;&amp;</div><div class='add'>+		      ((m &gt;&gt; 32) + (m &amp; 0xffffffff) &lt; 0x100000000);</div><div class='ctx'> </div><div class='ctx'> 	if (!bias) {</div><div class='ctx'> 		asm (	"umull	%Q0, %R0, %Q1, %Q2\n\t"</div><div class='hunk'>@@ -63,7 +70,7 @@ static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)</div><div class='ctx'> 			: "=&amp;r" (res)</div><div class='ctx'> 			: "r" (m), "r" (n)</div><div class='ctx'> 			: "cc");</div><div class='del'>-	} else if (!(m &amp; ((1ULL &lt;&lt; 63) | (1ULL &lt;&lt; 31)))) {</div><div class='add'>+	} else if (no_ovf) {</div><div class='ctx'> 		res = m;</div><div class='ctx'> 		asm (	"umlal	%Q0, %R0, %Q1, %Q2\n\t"</div><div class='ctx'> 			"mov	%Q0, #0"</div><div class='hunk'>@@ -80,7 +87,7 @@ static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)</div><div class='ctx'> 			: "cc");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(m &amp; ((1ULL &lt;&lt; 63) | (1ULL &lt;&lt; 31)))) {</div><div class='add'>+	if (no_ovf) {</div><div class='ctx'> 		asm (	"umlal	%R0, %Q0, %R1, %Q2\n\t"</div><div class='ctx'> 			"umlal	%R0, %Q0, %Q1, %R2\n\t"</div><div class='ctx'> 			"mov	%R0, #0\n\t"</div><div class='head'>diff --git a/arch/arm/include/asm/ecard.h b/arch/arm/include/asm/ecard.h<br/>index 4befe8d2ae19..7cbe001bf9cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/ecard.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/ecard.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/ecard.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/ecard.h</a></div><div class='hunk'>@@ -195,7 +195,7 @@ void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res,</div><div class='ctx'> 			   unsigned long offset, unsigned long maxsize);</div><div class='ctx'> #define ecardm_iounmap(__ec, __addr)	devm_iounmap(&amp;(__ec)-&gt;dev, __addr)</div><div class='ctx'> </div><div class='del'>-extern struct bus_type ecard_bus_type;</div><div class='add'>+extern const struct bus_type ecard_bus_type;</div><div class='ctx'> </div><div class='ctx'> #define ECARD_DEV(_d)	container_of((_d), struct expansion_card, dev)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/floppy.h b/arch/arm/include/asm/floppy.h<br/>index e1cb04ed5008..e579f77162e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/floppy.h</a></div><div class='hunk'>@@ -65,8 +65,6 @@ static unsigned char floppy_selects[4] = { 0x10, 0x21, 0x23, 0x33 };</div><div class='ctx'> #define N_FDC 1</div><div class='ctx'> #define N_DRIVE 4</div><div class='ctx'> </div><div class='del'>-#define CROSS_64KB(a,s) (0)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This allows people to reverse the order of</div><div class='ctx'>  * fd0 and fd1, in case their hardware is</div><div class='head'>diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h<br/>index b4b66220952d..bdb209e002a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/highmem.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/highmem.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/highmem.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/highmem.h</a></div><div class='hunk'>@@ -46,9 +46,9 @@ extern pte_t *pkmap_page_table;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef ARCH_NEEDS_KMAP_HIGH_GET</div><div class='del'>-extern void *kmap_high_get(struct page *page);</div><div class='add'>+extern void *kmap_high_get(const struct page *page);</div><div class='ctx'> </div><div class='del'>-static inline void *arch_kmap_local_high_get(struct page *page)</div><div class='add'>+static inline void *arch_kmap_local_high_get(const struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_DEBUG_HIGHMEM) &amp;&amp; !cache_is_vivt())</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -57,7 +57,7 @@ static inline void *arch_kmap_local_high_get(struct page *page)</div><div class='ctx'> #define arch_kmap_local_high_get arch_kmap_local_high_get</div><div class='ctx'> </div><div class='ctx'> #else /* ARCH_NEEDS_KMAP_HIGH_GET */</div><div class='del'>-static inline void *kmap_high_get(struct page *page)</div><div class='add'>+static inline void *kmap_high_get(const struct page *page)</div><div class='ctx'> {</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/include/asm/hugetlb.h b/arch/arm/include/asm/hugetlb.h<br/>index b766c4b373f6..700055b1ccb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> static inline void arch_clear_hugetlb_flags(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h<br/>index 1815748f5d2a..bae5edf348ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/io.h</a></div><div class='hunk'>@@ -381,7 +381,7 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size);</div><div class='ctx'> void iounmap(volatile void __iomem *io_addr);</div><div class='ctx'> #define iounmap iounmap</div><div class='ctx'> </div><div class='del'>-void *arch_memremap_wb(phys_addr_t phys_addr, size_t size);</div><div class='add'>+void *arch_memremap_wb(phys_addr_t phys_addr, size_t size, unsigned long flags);</div><div class='ctx'> #define arch_memremap_wb arch_memremap_wb</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h<br/>index e4eb54f6cd9f..a35aba7f548c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/jump_label.h</a></div><div class='hunk'>@@ -9,13 +9,17 @@</div><div class='ctx'> </div><div class='ctx'> #define JUMP_LABEL_NOP_SIZE 4</div><div class='ctx'> </div><div class='add'>+/* This macro is also expanded on the Rust side. */</div><div class='add'>+#define ARCH_STATIC_BRANCH_ASM(key, label)		\</div><div class='add'>+	"1:\n\t"					\</div><div class='add'>+	WASM(nop) "\n\t"				\</div><div class='add'>+	".pushsection __jump_table,  \"aw\"\n\t"	\</div><div class='add'>+	".word 1b, " label ", " key "\n\t"		\</div><div class='add'>+	".popsection\n\t"				\</div><div class='add'>+</div><div class='ctx'> static __always_inline bool arch_static_branch(struct static_key *key, bool branch)</div><div class='ctx'> {</div><div class='del'>-	asm goto("1:\n\t"</div><div class='del'>-		 WASM(nop) "\n\t"</div><div class='del'>-		 ".pushsection __jump_table,  \"aw\"\n\t"</div><div class='del'>-		 ".word 1b, %l[l_yes], %c0\n\t"</div><div class='del'>-		 ".popsection\n\t"</div><div class='add'>+	asm goto(ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]")</div><div class='ctx'> 		 : :  "i" (&amp;((char *)key)[branch]) :  : l_yes);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h<br/>index ef2aa79ece5a..7c2fa7dcec6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/memory.h</a></div><div class='hunk'>@@ -148,12 +148,6 @@ extern unsigned long vectors_base;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Convert a page to/from a physical address</div><div class='del'>- */</div><div class='del'>-#define page_to_phys(page)	(__pfn_to_phys(page_to_pfn(page)))</div><div class='del'>-#define phys_to_page(phys)	(pfn_to_page(__phys_to_pfn(phys)))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical</div><div class='ctx'>  * memory.  This is used for XIP and NoMMU kernels, and on platforms that don't</div><div class='ctx'>  * have CONFIG_ARM_PATCH_PHYS_VIRT. Assembly code must always use</div><div class='head'>diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h<br/>index 62af9f7f9e96..ef11b721230e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/page.h</a></div><div class='hunk'>@@ -7,10 +7,7 @@</div><div class='ctx'> #ifndef _ASMARM_PAGE_H</div><div class='ctx'> #define _ASMARM_PAGE_H</div><div class='ctx'> </div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-#define PAGE_SHIFT		CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE		(_AC(1,UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK		(~((1 &lt;&lt; PAGE_SHIFT) - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h<br/>index bdbc1e590891..c08f16f2e243 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/perf_event.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/perf_event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/perf_event.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/perf_event.h</a></div><div class='hunk'>@@ -8,13 +8,6 @@</div><div class='ctx'> #ifndef __ARM_PERF_EVENT_H__</div><div class='ctx'> #define __ARM_PERF_EVENT_H__</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PERF_EVENTS</div><div class='del'>-struct pt_regs;</div><div class='del'>-extern unsigned long perf_instruction_pointer(struct pt_regs *regs);</div><div class='del'>-extern unsigned long perf_misc_flags(struct pt_regs *regs);</div><div class='del'>-#define perf_misc_flags(regs)	perf_misc_flags(regs)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define perf_arch_fetch_caller_regs(regs, __ip) { \</div><div class='ctx'> 	(regs)-&gt;ARM_pc = (__ip); \</div><div class='ctx'> 	frame_pointer((regs)) = (unsigned long) __builtin_frame_address(0); \</div><div class='head'>diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h<br/>index fa5939eb9864..7b71a3d414b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/pgtable-3level.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/pgtable-3level.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/pgtable-3level.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/pgtable-3level.h</a></div><div class='hunk'>@@ -209,7 +209,6 @@ PMD_BIT_FUNC(mkyoung,   |= PMD_SECT_AF);</div><div class='ctx'> </div><div class='ctx'> #define pmd_pfn(pmd)		(((pmd_val(pmd) &amp; PMD_MASK) &amp; PHYS_MASK) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pfn_pmd(pfn,prot)	(__pmd(((phys_addr_t)(pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot)))</div><div class='del'>-#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)</div><div class='ctx'> </div><div class='ctx'> /* No hardware dirty/accessed bits -- generic_pmdp_establish() fits */</div><div class='ctx'> #define pmdp_establish generic_pmdp_establish</div><div class='head'>diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h<br/>index be91e376df79..86378eec7757 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/pgtable.h</a></div><div class='hunk'>@@ -19,14 +19,13 @@ extern struct page *empty_zero_page;</div><div class='ctx'> #define ZERO_PAGE(vaddr)	(empty_zero_page)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_MMU</div><div class='del'>-</div><div class='ctx'> #include &lt;asm-generic/pgtable-nopud.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_MMU</div><div class='ctx'> #include &lt;asm/pgtable-nommu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-#include &lt;asm-generic/pgtable-nopud.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable-hwdef.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -169,7 +168,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)</div><div class='ctx'> #define pfn_pte(pfn,prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))</div><div class='ctx'> </div><div class='ctx'> #define pte_page(pte)		pfn_to_page(pte_pfn(pte))</div><div class='del'>-#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page), prot)</div><div class='ctx'> </div><div class='ctx'> #define pte_clear(mm,addr,ptep)	set_pte_ext(ptep, __pte(0), 0)</div><div class='ctx'> </div><div class='hunk'>@@ -303,7 +301,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(swp)	__pte((swp).val)</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_isset(pte, L_PTE_SWP_EXCLUSIVE);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/include/asm/simd.h b/arch/arm/include/asm/simd.h<br/>index 82191dbd7e78..be08a8da046f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/simd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/simd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/simd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/simd.h</a></div><div class='hunk'>@@ -1,8 +1,15 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_SIMD_H</div><div class='add'>+#define _ASM_SIMD_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/compiler_attributes.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __must_check inline bool may_use_simd(void)</div><div class='ctx'> {</div><div class='del'>-	return IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; !in_hardirq();</div><div class='add'>+	return IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; !in_hardirq()</div><div class='add'>+	       &amp;&amp; !irqs_disabled();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#endif	/* _ASM_SIMD_H */</div><div class='head'>diff --git a/arch/arm/include/asm/spinlock_types.h b/arch/arm/include/asm/spinlock_types.h<br/>index 0c14b36ef101..5404a2a96bf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #define __ASM_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_RAW_H</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define TICKET_SHIFT	16</div><div class='head'>diff --git a/arch/arm/include/asm/stacktrace.h b/arch/arm/include/asm/stacktrace.h<br/>index f80a85b091d6..ba2f771cca23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/stacktrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/stacktrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/stacktrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/stacktrace.h</a></div><div class='hunk'>@@ -2,8 +2,9 @@</div><div class='ctx'> #ifndef __ASM_STACKTRACE_H</div><div class='ctx'> #define __ASM_STACKTRACE_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/llist.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct stackframe {</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h<br/>index fe4326d938c1..18b102a30741 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/syscall.h</a></div><div class='hunk'>@@ -68,6 +68,30 @@ static inline void syscall_set_return_value(struct task_struct *task,</div><div class='ctx'> 	regs-&gt;ARM_r0 = (long) error ? error : val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	if (nr == -1) {</div><div class='add'>+		task_thread_info(task)-&gt;abi_syscall = -1;</div><div class='add'>+		/*</div><div class='add'>+		 * When the syscall number is set to -1, the syscall will be</div><div class='add'>+		 * skipped.  In this case the syscall return value has to be</div><div class='add'>+		 * set explicitly, otherwise the first syscall argument is</div><div class='add'>+		 * returned as the syscall return value.</div><div class='add'>+		 */</div><div class='add'>+		syscall_set_return_value(task, regs, -ENOSYS, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if ((IS_ENABLED(CONFIG_AEABI) &amp;&amp; !IS_ENABLED(CONFIG_OABI_COMPAT))) {</div><div class='add'>+		task_thread_info(task)-&gt;abi_syscall = nr;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	task_thread_info(task)-&gt;abi_syscall =</div><div class='add'>+		(task_thread_info(task)-&gt;abi_syscall &amp; ~__NR_SYSCALL_MASK) |</div><div class='add'>+		(nr &amp; __NR_SYSCALL_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define SYSCALL_MAX_ARGS 7</div><div class='ctx'> </div><div class='ctx'> static inline void syscall_get_arguments(struct task_struct *task,</div><div class='hunk'>@@ -80,6 +104,19 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	memcpy(args, &amp;regs-&gt;ARM_r0 + 1, 5 * sizeof(args[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;regs-&gt;ARM_r0, args, 6 * sizeof(args[0]));</div><div class='add'>+	/*</div><div class='add'>+	 * Also copy the first argument into ARM_ORIG_r0</div><div class='add'>+	 * so that syscall_get_arguments() would return it</div><div class='add'>+	 * instead of the previous value.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;ARM_ORIG_r0 = regs-&gt;ARM_r0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	/* ARM tasks don't change audit architectures on the fly. */</div><div class='head'>diff --git a/arch/arm/include/asm/patch.h b/arch/arm/include/asm/text-patching.h<br/>index 0b48247c4600..0b48247c4600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/patch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/patch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/text-patching.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/text-patching.h</a></div><div class='head'>diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h<br/>index f40d06ad5d2a..ea4fbe7b17f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/tlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/tlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/tlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/tlb.h</a></div><div class='hunk'>@@ -26,14 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_MMU */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/swap.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-static inline void __tlb_remove_table(void *_table)</div><div class='del'>-{</div><div class='del'>-	free_page_and_swap_cache((struct page *)_table);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #include &lt;asm-generic/tlb.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -41,8 +34,6 @@ __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdesc *ptdesc = page_ptdesc(pte);</div><div class='ctx'> </div><div class='del'>-	pagetable_pte_dtor(ptdesc);</div><div class='del'>-</div><div class='ctx'> #ifndef CONFIG_ARM_LPAE</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * With the classic ARM MMU, a pte page has two corresponding pmd</div><div class='hunk'>@@ -61,7 +52,6 @@ __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr)</div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='ctx'> 	struct ptdesc *ptdesc = virt_to_ptdesc(pmdp);</div><div class='ctx'> </div><div class='del'>-	pagetable_pmd_dtor(ptdesc);</div><div class='ctx'> 	tlb_remove_ptdesc(tlb, ptdesc);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/include/asm/vdso.h b/arch/arm/include/asm/vdso.h<br/>index 5b85889f82ee..88364a6727ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vdso.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#define __VDSO_PAGES	4</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> struct mm_struct;</div><div class='head'>diff --git a/arch/arm/include/asm/vdso/gettimeofday.h b/arch/arm/include/asm/vdso/gettimeofday.h<br/>index 2134cbd5469f..1e9f81639c88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -15,8 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #define VDSO_HAS_CLOCK_GETRES		1</div><div class='ctx'> </div><div class='del'>-extern struct vdso_data *__get_datapage(void);</div><div class='del'>-</div><div class='ctx'> static __always_inline int gettimeofday_fallback(</div><div class='ctx'> 				struct __kernel_old_timeval *_tv,</div><div class='ctx'> 				struct timezone *_tz)</div><div class='hunk'>@@ -114,7 +112,7 @@ static inline bool arm_vdso_hres_capable(void)</div><div class='ctx'> #define __arch_vdso_hres_capable arm_vdso_hres_capable</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(int clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_ARM_ARCH_TIMER</div><div class='ctx'> 	u64 cycle_now;</div><div class='hunk'>@@ -137,11 +135,6 @@ static __always_inline u64 __arch_get_hw_counter(int clock_mode,</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return __get_datapage();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/arm/include/asm/vdso/vsyscall.h b/arch/arm/include/asm/vdso/vsyscall.h<br/>index 47e41ae8ccd0..ff1c729af05f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vdso/vsyscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vdso/vsyscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vdso/vsyscall.h</a></div><div class='hunk'>@@ -4,29 +4,15 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='del'>-extern bool cntvct_ok;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Update the vDSO data page to keep in sync with kernel timekeeping.</div><div class='del'>- */</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_data *__arm_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __arm_get_k_vdso_data</div><div class='del'>-</div><div class='ctx'> static __always_inline</div><div class='del'>-void __arm_sync_vdso_data(struct vdso_data *vdata)</div><div class='add'>+void __arch_sync_vdso_time_data(struct vdso_time_data *vdata)</div><div class='ctx'> {</div><div class='ctx'> 	flush_dcache_page(virt_to_page(vdata));</div><div class='ctx'> }</div><div class='del'>-#define __arch_sync_vdso_data __arm_sync_vdso_data</div><div class='add'>+#define __arch_sync_vdso_time_data __arch_sync_vdso_time_data</div><div class='ctx'> </div><div class='ctx'> /* The asm-generic header needs to be included after the definitions above */</div><div class='ctx'> #include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='head'>diff --git a/arch/arm/include/asm/vfp.h b/arch/arm/include/asm/vfp.h<br/>index 157ea3426158..85ccc422d4d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vfp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vfp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vfp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vfp.h</a></div><div class='hunk'>@@ -9,16 +9,6 @@</div><div class='ctx'> #ifndef __ASM_VFP_H</div><div class='ctx'> #define __ASM_VFP_H</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_AS_VFP_VMRS_FPINST</div><div class='del'>-#define FPSID			cr0</div><div class='del'>-#define FPSCR			cr1</div><div class='del'>-#define MVFR1			cr6</div><div class='del'>-#define MVFR0			cr7</div><div class='del'>-#define FPEXC			cr8</div><div class='del'>-#define FPINST			cr9</div><div class='del'>-#define FPINST2			cr10</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* FPSID bits */</div><div class='ctx'> #define FPSID_IMPLEMENTER_BIT	(24)</div><div class='ctx'> #define FPSID_IMPLEMENTER_MASK	(0xff &lt;&lt; FPSID_IMPLEMENTER_BIT)</div><div class='head'>diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h<br/>index ba0d4cb5377e..e2e1d5a3727a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vfpmacros.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vfpmacros.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vfpmacros.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vfpmacros.h</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/vfp.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_AS_VFP_VMRS_FPINST</div><div class='ctx'> 	.macro	VFPFMRX, rd, sysreg, cond</div><div class='ctx'> 	vmrs\cond	\rd, \sysreg</div><div class='ctx'> 	.endm</div><div class='hunk'>@@ -16,16 +15,6 @@</div><div class='ctx'> 	.macro	VFPFMXR, sysreg, rd, cond</div><div class='ctx'> 	vmsr\cond	\sysreg, \rd</div><div class='ctx'> 	.endm</div><div class='del'>-#else</div><div class='del'>-	@ Macros to allow building with old toolkits (with no VFP support)</div><div class='del'>-	.macro	VFPFMRX, rd, sysreg, cond</div><div class='del'>-	MRC\cond	p10, 7, \rd, \sysreg, cr0, 0	@ FMRX	\rd, \sysreg</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro	VFPFMXR, sysreg, rd, cond</div><div class='del'>-	MCR\cond	p10, 7, \rd, \sysreg, cr0, 0	@ FMXR	\sysreg, \rd</div><div class='del'>-	.endm</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	@ read all the working registers back into the VFP</div><div class='ctx'> 	.macro	VFPFLDMIA, base, tmp</div><div class='head'>diff --git a/arch/arm/include/asm/vmlinux.lds.h b/arch/arm/include/asm/vmlinux.lds.h<br/>index d60f6e83a9f7..0341973e30e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vmlinux.lds.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/vmlinux.lds.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/vmlinux.lds.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/vmlinux.lds.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-#define ARM_MMU_KEEP(x)		x</div><div class='add'>+#define ARM_MMU_KEEP(x)		KEEP(x)</div><div class='ctx'> #define ARM_MMU_DISCARD(x)</div><div class='ctx'> #else</div><div class='ctx'> #define ARM_MMU_KEEP(x)</div><div class='hunk'>@@ -34,6 +34,12 @@</div><div class='ctx'> #define NOCROSSREFS</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY</div><div class='add'>+#define OVERLAY_KEEP(x)		KEEP(x)</div><div class='add'>+#else</div><div class='add'>+#define OVERLAY_KEEP(x)		x</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Set start/end symbol names to the LMA for the section */</div><div class='ctx'> #define ARM_LMA(sym, section)						\</div><div class='ctx'> 	sym##_start = LOADADDR(section);				\</div><div class='hunk'>@@ -125,13 +131,13 @@</div><div class='ctx'> 	__vectors_lma = .;						\</div><div class='ctx'> 	OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) {		\</div><div class='ctx'> 		.vectors {						\</div><div class='del'>-			*(.vectors)					\</div><div class='add'>+			OVERLAY_KEEP(*(.vectors))			\</div><div class='ctx'> 		}							\</div><div class='ctx'> 		.vectors.bhb.loop8 {					\</div><div class='del'>-			*(.vectors.bhb.loop8)				\</div><div class='add'>+			OVERLAY_KEEP(*(.vectors.bhb.loop8))		\</div><div class='ctx'> 		}							\</div><div class='ctx'> 		.vectors.bhb.bpiall {					\</div><div class='del'>-			*(.vectors.bhb.bpiall)				\</div><div class='add'>+			OVERLAY_KEEP(*(.vectors.bhb.bpiall))		\</div><div class='ctx'> 		}							\</div><div class='ctx'> 	}								\</div><div class='ctx'> 	ARM_LMA(__vectors, .vectors);					\</div><div class='head'>diff --git a/arch/arm/include/asm/word-at-a-time.h b/arch/arm/include/asm/word-at-a-time.h<br/>index f9a3897b06e7..5023f98d8293 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/word-at-a-time.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/include/asm/word-at-a-time.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/include/asm/word-at-a-time.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/include/asm/word-at-a-time.h</a></div><div class='hunk'>@@ -67,7 +67,7 @@ static inline unsigned long find_zero(unsigned long mask)</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned long load_unaligned_zeropad(const void *addr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ret, offset;</div><div class='add'>+	unsigned long ret, tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* Load word from unaligned pointer addr */</div><div class='ctx'> 	asm(</div><div class='hunk'>@@ -75,9 +75,9 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)</div><div class='ctx'> 	"2:\n"</div><div class='ctx'> 	"	.pushsection .text.fixup,\"ax\"\n"</div><div class='ctx'> 	"	.align 2\n"</div><div class='del'>-	"3:	and	%1, %2, #0x3\n"</div><div class='del'>-	"	bic	%2, %2, #0x3\n"</div><div class='del'>-	"	ldr	%0, [%2]\n"</div><div class='add'>+	"3:	bic	%1, %2, #0x3\n"</div><div class='add'>+	"	ldr	%0, [%1]\n"</div><div class='add'>+	"	and	%1, %2, #0x3\n"</div><div class='ctx'> 	"	lsl	%1, %1, #0x3\n"</div><div class='ctx'> #ifndef __ARMEB__</div><div class='ctx'> 	"	lsr	%0, %0, %1\n"</div><div class='hunk'>@@ -90,7 +90,7 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)</div><div class='ctx'> 	"	.align	3\n"</div><div class='ctx'> 	"	.long	1b, 3b\n"</div><div class='ctx'> 	"	.popsection"</div><div class='del'>-	: "=&amp;r" (ret), "=&amp;r" (offset)</div><div class='add'>+	: "=&amp;r" (ret), "=&amp;r" (tmp)</div><div class='ctx'> 	: "r" (addr), "Qo" (*(unsigned long *)addr));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile<br/>index aaae31b8c4a5..afc9de7ef9a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/Makefile</a></div><div class='hunk'>@@ -40,6 +40,7 @@ obj-y		+= entry-armv.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MMU)		+= bugs.o</div><div class='add'>+obj-$(CONFIG_OF)		+= cacheinfo.o</div><div class='ctx'> obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o</div><div class='ctx'> obj-$(CONFIG_ISA_DMA_API)	+= dma.o</div><div class='ctx'> obj-$(CONFIG_FIQ)		+= fiq.o fiqasm.o</div><div class='hunk'>@@ -103,4 +104,4 @@ obj-$(CONFIG_HAVE_ARM_SMCCC)	+= smccc-call.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += spectre.o</div><div class='ctx'> </div><div class='del'>-extra-y := vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN) := vmlinux.lds</div><div class='head'>diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c<br/>index 4853875740d0..2101938d27fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'>  * This code generates raw asm output which is post-processed to extract</div><div class='ctx'>  * and format the required data.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='hunk'>@@ -153,10 +155,6 @@ int main(void)</div><div class='ctx'>   DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);</div><div class='ctx'>   DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);</div><div class='ctx'>   BLANK();</div><div class='del'>-#ifdef CONFIG_VDSO</div><div class='del'>-  DEFINE(VDSO_DATA_SIZE,	sizeof(union vdso_data_store));</div><div class='del'>-#endif</div><div class='del'>-  BLANK();</div><div class='ctx'> #ifdef CONFIG_ARM_MPU</div><div class='ctx'>   DEFINE(MPU_RNG_INFO_RNGS,	offsetof(struct mpu_rgn_info, rgns));</div><div class='ctx'>   DEFINE(MPU_RNG_INFO_USED,	offsetof(struct mpu_rgn_info, used));</div><div class='head'>diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c<br/>index d334c7fb672b..b5793e8fbdc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/bios32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/bios32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/bios32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/bios32.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -337,8 +338,8 @@ void pcibios_fixup_bus(struct pci_bus *bus)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Report what we did for this bus</div><div class='ctx'> 	 */</div><div class='del'>-	pr_info("PCI: bus%d: Fast back to back transfers %sabled\n",</div><div class='del'>-		bus-&gt;number, (features &amp; PCI_COMMAND_FAST_BACK) ? "en" : "dis");</div><div class='add'>+	pr_info("PCI: bus%d: Fast back to back transfers %s\n",</div><div class='add'>+		bus-&gt;number, str_enabled_disabled(features &amp; PCI_COMMAND_FAST_BACK));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(pcibios_fixup_bus);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/cacheinfo.c b/arch/arm/kernel/cacheinfo.c<br/>new file mode 100644<br/>index 000000000000..e1469b641780<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/cacheinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/cacheinfo.c</a></div><div class='hunk'>@@ -0,0 +1,173 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ *  ARM cacheinfo support</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2023 Linaro Ltd.</div><div class='add'>+ *  Copyright (C) 2015 ARM Ltd.</div><div class='add'>+ *  All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/cacheinfo.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cachetype.h&gt;</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/system_info.h&gt;</div><div class='add'>+</div><div class='add'>+/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */</div><div class='add'>+#define CLIDR_CTYPE_SHIFT(level)	(3 * (level - 1))</div><div class='add'>+#define CLIDR_CTYPE_MASK(level)		(7 &lt;&lt; CLIDR_CTYPE_SHIFT(level))</div><div class='add'>+#define CLIDR_CTYPE(clidr, level)	\</div><div class='add'>+	(((clidr) &amp; CLIDR_CTYPE_MASK(level)) &gt;&gt; CLIDR_CTYPE_SHIFT(level))</div><div class='add'>+</div><div class='add'>+#define MAX_CACHE_LEVEL			7	/* Max 7 level supported */</div><div class='add'>+</div><div class='add'>+#define CTR_FORMAT_MASK	GENMASK(31, 29)</div><div class='add'>+#define CTR_FORMAT_ARMV6 0</div><div class='add'>+#define CTR_FORMAT_ARMV7 4</div><div class='add'>+#define CTR_CWG_MASK	GENMASK(27, 24)</div><div class='add'>+#define CTR_DSIZE_LEN_MASK GENMASK(13, 12)</div><div class='add'>+#define CTR_ISIZE_LEN_MASK GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+/* Also valid for v7m */</div><div class='add'>+static inline int cache_line_size_cp15(void)</div><div class='add'>+{</div><div class='add'>+	u32 ctr = read_cpuid_cachetype();</div><div class='add'>+	u32 format = FIELD_GET(CTR_FORMAT_MASK, ctr);</div><div class='add'>+</div><div class='add'>+	if (format == CTR_FORMAT_ARMV7) {</div><div class='add'>+		u32 cwg = FIELD_GET(CTR_CWG_MASK, ctr);</div><div class='add'>+</div><div class='add'>+		return cwg ? 4 &lt;&lt; cwg : ARCH_DMA_MINALIGN;</div><div class='add'>+	} else if (WARN_ON_ONCE(format != CTR_FORMAT_ARMV6)) {</div><div class='add'>+		return ARCH_DMA_MINALIGN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 8 &lt;&lt; max(FIELD_GET(CTR_ISIZE_LEN_MASK, ctr),</div><div class='add'>+			FIELD_GET(CTR_DSIZE_LEN_MASK, ctr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cache_line_size(void)</div><div class='add'>+{</div><div class='add'>+	if (coherency_max_size != 0)</div><div class='add'>+		return coherency_max_size;</div><div class='add'>+</div><div class='add'>+	/* CP15 is optional / implementation defined before ARMv6 */</div><div class='add'>+	if (cpu_architecture() &lt; CPU_ARCH_ARMv6)</div><div class='add'>+		return ARCH_DMA_MINALIGN;</div><div class='add'>+</div><div class='add'>+	return cache_line_size_cp15();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cache_line_size);</div><div class='add'>+</div><div class='add'>+static inline enum cache_type get_cache_type(int level)</div><div class='add'>+{</div><div class='add'>+	u32 clidr;</div><div class='add'>+</div><div class='add'>+	if (level &gt; MAX_CACHE_LEVEL)</div><div class='add'>+		return CACHE_TYPE_NOCACHE;</div><div class='add'>+</div><div class='add'>+	clidr = read_clidr();</div><div class='add'>+</div><div class='add'>+	return CLIDR_CTYPE(clidr, level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ci_leaf_init(struct cacheinfo *this_leaf,</div><div class='add'>+			 enum cache_type type, unsigned int level)</div><div class='add'>+{</div><div class='add'>+	this_leaf-&gt;level = level;</div><div class='add'>+	this_leaf-&gt;type = type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int detect_cache_level(unsigned int *level_p, unsigned int *leaves_p)</div><div class='add'>+{</div><div class='add'>+	unsigned int ctype, level, leaves;</div><div class='add'>+	u32 ctr, format;</div><div class='add'>+</div><div class='add'>+	/* CLIDR is not present before ARMv7/v7m */</div><div class='add'>+	if (cpu_architecture() &lt; CPU_ARCH_ARMv7)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Don't try reading CLIDR if CTR declares old format */</div><div class='add'>+	ctr = read_cpuid_cachetype();</div><div class='add'>+	format = FIELD_GET(CTR_FORMAT_MASK, ctr);</div><div class='add'>+	if (format != CTR_FORMAT_ARMV7)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	for (level = 1, leaves = 0; level &lt;= MAX_CACHE_LEVEL; level++) {</div><div class='add'>+		ctype = get_cache_type(level);</div><div class='add'>+		if (ctype == CACHE_TYPE_NOCACHE) {</div><div class='add'>+			level--;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* Separate instruction and data caches */</div><div class='add'>+		leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*level_p = level;</div><div class='add'>+	*leaves_p = leaves;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int early_cache_level(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+</div><div class='add'>+	return detect_cache_level(&amp;this_cpu_ci-&gt;num_levels, &amp;this_cpu_ci-&gt;num_leaves);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int init_cache_level(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned int level, leaves;</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	int fw_level;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = detect_cache_level(&amp;level, &amp;leaves);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	fw_level = of_find_last_cache_level(cpu);</div><div class='add'>+</div><div class='add'>+	if (level &lt; fw_level) {</div><div class='add'>+		/*</div><div class='add'>+		 * some external caches not specified in CLIDR_EL1</div><div class='add'>+		 * the information may be available in the device tree</div><div class='add'>+		 * only unified external caches are considered here</div><div class='add'>+		 */</div><div class='add'>+		leaves += (fw_level - level);</div><div class='add'>+		level = fw_level;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	this_cpu_ci-&gt;num_levels = level;</div><div class='add'>+	this_cpu_ci-&gt;num_leaves = leaves;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int populate_cache_leaves(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned int level, idx;</div><div class='add'>+	enum cache_type type;</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	struct cacheinfo *this_leaf = this_cpu_ci-&gt;info_list;</div><div class='add'>+	unsigned int arch = cpu_architecture();</div><div class='add'>+</div><div class='add'>+	/* CLIDR is not present before ARMv7/v7m */</div><div class='add'>+	if (arch &lt; CPU_ARCH_ARMv7)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	for (idx = 0, level = 1; level &lt;= this_cpu_ci-&gt;num_levels &amp;&amp;</div><div class='add'>+	     idx &lt; this_cpu_ci-&gt;num_leaves; idx++, level++) {</div><div class='add'>+		type = get_cache_type(level);</div><div class='add'>+		if (type == CACHE_TYPE_SEPARATE) {</div><div class='add'>+			ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);</div><div class='add'>+			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);</div><div class='add'>+		} else {</div><div class='add'>+			ci_leaf_init(this_leaf++, type, level);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c<br/>index fdb74e64206a..3b78966e750a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/devtree.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/devtree.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/devtree.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/devtree.c</a></div><div class='hunk'>@@ -200,7 +200,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt_virt)</div><div class='ctx'> </div><div class='ctx'> 	mdesc_best = &amp;__mach_desc_GENERIC_DT;</div><div class='ctx'> </div><div class='del'>-	if (!dt_virt || !early_init_dt_verify(dt_virt))</div><div class='add'>+	if (!dt_virt || !early_init_dt_verify(dt_virt, __pa(dt_virt)))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);</div><div class='head'>diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S<br/>index 1dfae1af8e31..ef6a657c8d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-armv.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-armv.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-armv.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/entry-armv.S</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;asm/tls.h&gt;</div><div class='ctx'> #include &lt;asm/system_info.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess-asm.h&gt;</div><div class='add'>+#include &lt;asm/kasan_def.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "entry-header.S"</div><div class='ctx'> #include &lt;asm/probes.h&gt;</div><div class='hunk'>@@ -561,6 +562,13 @@ ENTRY(__switch_to)</div><div class='ctx'> 	@ entries covering the vmalloc region.</div><div class='ctx'> 	@</div><div class='ctx'> 	ldr	r2, [ip]</div><div class='add'>+#ifdef CONFIG_KASAN_VMALLOC</div><div class='add'>+	@ Also dummy read from the KASAN shadow memory for the new stack if we</div><div class='add'>+	@ are using KASAN</div><div class='add'>+	mov_l	r2, KASAN_SHADOW_OFFSET</div><div class='add'>+	add	r2, r2, ip, lsr #KASAN_SHADOW_SCALE_SHIFT</div><div class='add'>+	ldr	r2, [r2]</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	@ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what</div><div class='head'>diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S<br/>index f379c852dcb7..88336a1292bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-common.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-common.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-common.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/entry-common.S</a></div><div class='hunk'>@@ -119,7 +119,7 @@ no_work_pending:</div><div class='ctx'> </div><div class='ctx'> 	ct_user_enter save = 0</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_GCC_PLUGIN_STACKLEAK</div><div class='add'>+#ifdef CONFIG_KSTACK_ERASE</div><div class='ctx'> 	bl	stackleak_erase_on_task_stack</div><div class='ctx'> #endif</div><div class='ctx'> 	restore_user_regs fast = 0, offset = 0</div><div class='head'>diff --git a/arch/arm/kernel/entry-ftrace.S b/arch/arm/kernel/entry-ftrace.S<br/>index bc598e3d8dd2..e24ee559af81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-ftrace.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/entry-ftrace.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/entry-ftrace.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/entry-ftrace.S</a></div><div class='hunk'>@@ -257,11 +257,21 @@ ENDPROC(ftrace_graph_regs_caller)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='ctx'> ENTRY(return_to_handler)</div><div class='del'>-	stmdb	sp!, {r0-r3}</div><div class='del'>-	add	r0, sp, #16		@ sp at exit of instrumented routine</div><div class='add'>+	mov	ip, sp				@ sp at exit of instrumented routine</div><div class='add'>+	sub	sp, #PT_REGS_SIZE</div><div class='add'>+	str	r0, [sp, #S_R0]</div><div class='add'>+	str	r1, [sp, #S_R1]</div><div class='add'>+	str	r2, [sp, #S_R2]</div><div class='add'>+	str	r3, [sp, #S_R3]</div><div class='add'>+	str	ip, [sp, #S_FP]</div><div class='add'>+	mov	r0, sp</div><div class='ctx'> 	bl	ftrace_return_to_handler</div><div class='del'>-	mov	lr, r0			@ r0 has real ret addr</div><div class='del'>-	ldmia	sp!, {r0-r3}</div><div class='add'>+	mov	lr, r0				@ r0 has real ret addr</div><div class='add'>+	ldr	r3, [sp, #S_R3]</div><div class='add'>+	ldr	r2, [sp, #S_R2]</div><div class='add'>+	ldr	r1, [sp, #S_R1]</div><div class='add'>+	ldr	r0, [sp, #S_R0]</div><div class='add'>+	add	sp, sp, #PT_REGS_SIZE		@ restore stack pointer</div><div class='ctx'> 	ret	lr</div><div class='ctx'> ENDPROC(return_to_handler)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c<br/>index e61591f33a6c..845acf9ce21e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/ftrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/ftrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/ftrace.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The compiler emitted profiling hook consists of</div><div class='head'>diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S<br/>index 1ec35f065617..f22c50d4bd41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/head.S</a></div><div class='hunk'>@@ -252,18 +252,23 @@ __create_page_tables:</div><div class='ctx'> 	 */</div><div class='ctx'> 	add	r0, r4, #KERNEL_OFFSET &gt;&gt; (SECTION_SHIFT - PMD_ENTRY_ORDER)</div><div class='ctx'> 	ldr	r6, =(_end - 1)</div><div class='add'>+</div><div class='add'>+	/* For XIP, kernel_sec_start/kernel_sec_end are currently in RO memory */</div><div class='add'>+#ifndef CONFIG_XIP_KERNEL</div><div class='ctx'> 	adr_l	r5, kernel_sec_start		@ _pa(kernel_sec_start)</div><div class='ctx'> #if defined CONFIG_CPU_ENDIAN_BE8 || defined CONFIG_CPU_ENDIAN_BE32</div><div class='ctx'> 	str	r8, [r5, #4]			@ Save physical start of kernel (BE)</div><div class='ctx'> #else</div><div class='ctx'> 	str	r8, [r5]			@ Save physical start of kernel (LE)</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> 	orr	r3, r8, r7			@ Add the MMU flags</div><div class='ctx'> 	add	r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ENTRY_ORDER)</div><div class='ctx'> 1:	str	r3, [r0], #1 &lt;&lt; PMD_ENTRY_ORDER</div><div class='ctx'> 	add	r3, r3, #1 &lt;&lt; SECTION_SHIFT</div><div class='ctx'> 	cmp	r0, r6</div><div class='ctx'> 	bls	1b</div><div class='add'>+#ifndef CONFIG_XIP_KERNEL</div><div class='ctx'> 	eor	r3, r3, r7			@ Remove the MMU flags</div><div class='ctx'> 	adr_l	r5, kernel_sec_end		@ _pa(kernel_sec_end)</div><div class='ctx'> #if defined CONFIG_CPU_ENDIAN_BE8 || defined CONFIG_CPU_ENDIAN_BE32</div><div class='hunk'>@@ -271,8 +276,7 @@ __create_page_tables:</div><div class='ctx'> #else</div><div class='ctx'> 	str	r3, [r5]			@ Save physical end of kernel (LE)</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+#else</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Map the kernel image separately as it is not located in RAM.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -407,7 +411,11 @@ ENTRY(secondary_startup)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use the page tables supplied from  __cpu_up.</div><div class='ctx'> 	 */</div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+	ldr	r3, =(secondary_data + PLAT_PHYS_OFFSET - PAGE_OFFSET)</div><div class='add'>+#else</div><div class='ctx'> 	adr_l	r3, secondary_data</div><div class='add'>+#endif</div><div class='ctx'> 	mov_l	r12, __secondary_switched</div><div class='ctx'> 	ldrd	r4, r5, [r3, #0]		@ get secondary_data.pgdir</div><div class='ctx'> ARM_BE8(eor	r4, r4, r5)			@ Swap r5 and r4 in BE:</div><div class='head'>diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c<br/>index a12efd0f43e8..cd4b34c96e35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/hw_breakpoint.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/hw_breakpoint.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -904,7 +904,7 @@ unlock:</div><div class='ctx'> 	watchpoint_single_step_handler(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='ctx'> static void hw_breakpoint_cfi_handler(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c<br/>index dab42d066d06..e1993e28a9ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/irq.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs)</div><div class='ctx'> 	 * Some hardware gives randomly wrong interrupts.  Rather</div><div class='ctx'> 	 * than crashing, do something sensible.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(!irq || irq &gt;= nr_irqs))</div><div class='add'>+	if (unlikely(!irq || irq &gt;= irq_get_nr_irqs()))</div><div class='ctx'> 		desc = NULL;</div><div class='ctx'> 	else</div><div class='ctx'> 		desc = irq_to_desc(irq);</div><div class='hunk'>@@ -151,7 +151,6 @@ void __init init_IRQ(void)</div><div class='ctx'> #ifdef CONFIG_SPARSE_IRQ</div><div class='ctx'> int __init arch_probe_nr_irqs(void)</div><div class='ctx'> {</div><div class='del'>-	nr_irqs = machine_desc-&gt;nr_irqs ? machine_desc-&gt;nr_irqs : NR_IRQS;</div><div class='del'>-	return nr_irqs;</div><div class='add'>+	return irq_set_nr_irqs(machine_desc-&gt;nr_irqs ? : NR_IRQS);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/kernel/isa.c b/arch/arm/kernel/isa.c<br/>index 905b1b191546..db8be609fab2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/isa.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/isa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/isa.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/isa.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> static unsigned int isa_membase, isa_portbase, isa_portshift;</div><div class='ctx'> </div><div class='del'>-static struct ctl_table ctl_isa_vars[] = {</div><div class='add'>+static const struct ctl_table ctl_isa_vars[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "membase",</div><div class='ctx'> 		.data		= &amp;isa_membase, </div><div class='head'>diff --git a/arch/arm/kernel/jump_label.c b/arch/arm/kernel/jump_label.c<br/>index eb9c24b6e8e2..a06a92d0f550 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/jump_label.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/jump_label.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/jump_label.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/jump_label.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __arch_jump_label_transform(struct jump_entry *entry,</div><div class='head'>diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c<br/>index 22f937e6f3ff..ab76c55fd610 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/kgdb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/kgdb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/kgdb.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;linux/kgdb.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] =</div><div class='head'>diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c<br/>index 80ceb5bd2680..dd430477e7c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/machine_kexec.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/machine_kexec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/machine_kexec.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -127,29 +127,6 @@ void crash_smp_send_stop(void)</div><div class='ctx'> 	cpus_stopped = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void machine_kexec_mask_interrupts(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-	struct irq_desc *desc;</div><div class='del'>-</div><div class='del'>-	for_each_irq_desc(i, desc) {</div><div class='del'>-		struct irq_chip *chip;</div><div class='del'>-</div><div class='del'>-		chip = irq_desc_get_chip(desc);</div><div class='del'>-		if (!chip)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_eoi &amp;&amp; irqd_irq_inprogress(&amp;desc-&gt;irq_data))</div><div class='del'>-			chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_mask)</div><div class='del'>-			chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_disable &amp;&amp; !irqd_irq_disabled(&amp;desc-&gt;irq_data))</div><div class='del'>-			chip-&gt;irq_disable(&amp;desc-&gt;irq_data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void machine_crash_shutdown(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	local_irq_disable();</div><div class='head'>diff --git a/arch/arm/kernel/module-plts.c b/arch/arm/kernel/module-plts.c<br/>index da2ee8d6ef1a..354ce16d83cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/module-plts.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/module-plts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/module-plts.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/module-plts.c</a></div><div class='hunk'>@@ -285,11 +285,9 @@ bool in_module_plt(unsigned long loc)</div><div class='ctx'> 	struct module *mod;</div><div class='ctx'> 	bool ret;</div><div class='ctx'> </div><div class='del'>-	preempt_disable();</div><div class='add'>+	guard(rcu)();</div><div class='ctx'> 	mod = __module_text_address(loc);</div><div class='ctx'> 	ret = mod &amp;&amp; (loc - (u32)mod-&gt;arch.core.plt_ent &lt; mod-&gt;arch.core.plt_count * PLT_ENT_SIZE ||</div><div class='ctx'> 		      loc - (u32)mod-&gt;arch.init.plt_ent &lt; mod-&gt;arch.init.plt_count * PLT_ENT_SIZE);</div><div class='del'>-	preempt_enable();</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c<br/>index da488d92e7a0..55ca3fcd37e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/module.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/module.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/module.c</a></div><div class='hunk'>@@ -484,7 +484,7 @@ module_arch_cleanup(struct module *mod)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __weak module_arch_freeing_init(struct module *mod)</div><div class='add'>+void module_arch_freeing_init(struct module *mod)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_ARM_UNWIND</div><div class='ctx'> 	struct unwind_table *init = mod-&gt;arch.init_table;</div><div class='head'>diff --git a/arch/arm/kernel/patch.c b/arch/arm/kernel/patch.c<br/>index e9e828b6bb30..4d45e60cd46d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/patch.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/patch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/patch.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/patch.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> #include &lt;asm/opcodes.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct patch {</div><div class='ctx'> 	void *addr;</div><div class='head'>diff --git a/arch/arm/kernel/perf_callchain.c b/arch/arm/kernel/perf_callchain.c<br/>index 1d230ac9d0eb..a2601b1ef318 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/perf_callchain.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/perf_callchain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/perf_callchain.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/perf_callchain.c</a></div><div class='hunk'>@@ -96,20 +96,3 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *re</div><div class='ctx'> 	arm_get_current_stackframe(regs, &amp;fr);</div><div class='ctx'> 	walk_stackframe(&amp;fr, callchain_trace, entry);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-unsigned long perf_instruction_pointer(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	return instruction_pointer(regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long perf_misc_flags(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	int misc = 0;</div><div class='del'>-</div><div class='del'>-	if (user_mode(regs))</div><div class='del'>-		misc |= PERF_RECORD_MISC_USER;</div><div class='del'>-	else</div><div class='del'>-		misc |= PERF_RECORD_MISC_KERNEL;</div><div class='del'>-</div><div class='del'>-	return misc;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c<br/>index e16ed102960c..d7aa95225c70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/process.c</a></div><div class='hunk'>@@ -234,7 +234,7 @@ asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long stack_start = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct thread_info *thread = task_thread_info(p);</div><div class='head'>diff --git a/arch/arm/kernel/psci_smp.c b/arch/arm/kernel/psci_smp.c<br/>index d4392e177484..3bb0c4dcfc5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/psci_smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/psci_smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/psci_smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/psci_smp.c</a></div><div class='hunk'>@@ -45,8 +45,15 @@ extern void secondary_startup(void);</div><div class='ctx'> static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	if (psci_ops.cpu_on)</div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+		return psci_ops.cpu_on(cpu_logical_map(cpu),</div><div class='add'>+			((phys_addr_t)(&amp;secondary_startup)</div><div class='add'>+			- XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)</div><div class='add'>+			+ CONFIG_XIP_PHYS_ADDR));</div><div class='add'>+#else</div><div class='ctx'> 		return psci_ops.cpu_on(cpu_logical_map(cpu),</div><div class='ctx'> 					virt_to_idmap(&amp;secondary_startup));</div><div class='add'>+#endif</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c<br/>index c421a899fc84..7951b2c06fec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/ptrace.c</a></div><div class='hunk'>@@ -677,7 +677,7 @@ enum arm_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset arm_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -689,7 +689,7 @@ static const struct user_regset arm_regsets[] = {</div><div class='ctx'> 		 * For the FPA regs in fpstate, the real fields are a mixture</div><div class='ctx'> 		 * of sizes, so pretend that the registers are word-sized:</div><div class='ctx'> 		 */</div><div class='del'>-		.core_note_type = NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n = sizeof(struct user_fp) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -702,7 +702,7 @@ static const struct user_regset arm_regsets[] = {</div><div class='ctx'> 		 * Pretend that the VFP regs are word-sized, since the FPSCR is</div><div class='ctx'> 		 * a single word dangling at the end of struct user_vfp:</div><div class='ctx'> 		 */</div><div class='del'>-		.core_note_type = NT_ARM_VFP,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_VFP),</div><div class='ctx'> 		.n = ARM_VFPREGS_SIZE / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='head'>diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c<br/>index e6a857bf0ce6..0bfd66c7ada0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/setup.c</a></div><div class='hunk'>@@ -880,10 +880,7 @@ static void __init request_standard_resources(const struct machine_desc *mdesc)</div><div class='ctx'> 		 */</div><div class='ctx'> 		boot_alias_start = phys_to_idmap(start);</div><div class='ctx'> 		if (arm_has_idmap_alias() &amp;&amp; boot_alias_start != IDMAP_INVALID_ADDR) {</div><div class='del'>-			res = memblock_alloc(sizeof(*res), SMP_CACHE_BYTES);</div><div class='del'>-			if (!res)</div><div class='del'>-				panic("%s: Failed to allocate %zu bytes\n",</div><div class='del'>-				      __func__, sizeof(*res));</div><div class='add'>+			res = memblock_alloc_or_panic(sizeof(*res), SMP_CACHE_BYTES);</div><div class='ctx'> 			res-&gt;name = "System RAM (boot alias)";</div><div class='ctx'> 			res-&gt;start = boot_alias_start;</div><div class='ctx'> 			res-&gt;end = phys_to_idmap(res_end);</div><div class='hunk'>@@ -891,10 +888,7 @@ static void __init request_standard_resources(const struct machine_desc *mdesc)</div><div class='ctx'> 			request_resource(&amp;iomem_resource, res);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		res = memblock_alloc(sizeof(*res), SMP_CACHE_BYTES);</div><div class='del'>-		if (!res)</div><div class='del'>-			panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-			      sizeof(*res));</div><div class='add'>+		res = memblock_alloc_or_panic(sizeof(*res), SMP_CACHE_BYTES);</div><div class='ctx'> 		res-&gt;name  = "System RAM";</div><div class='ctx'> 		res-&gt;start = start;</div><div class='ctx'> 		res-&gt;end = res_end;</div><div class='hunk'>@@ -1010,7 +1004,7 @@ static void __init reserve_crashkernel(void)</div><div class='ctx'> 	total_mem = get_total_mem();</div><div class='ctx'> 	ret = parse_crashkernel(boot_command_line, total_mem,</div><div class='ctx'> 				&amp;crash_size, &amp;crash_base,</div><div class='del'>-				NULL, NULL);</div><div class='add'>+				NULL, NULL, NULL);</div><div class='ctx'> 	/* invalid value specified or crashkernel=0 */</div><div class='ctx'> 	if (ret || !crash_size)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c<br/>index 3431c0553f45..50999886a8b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/smp.c</a></div><div class='hunk'>@@ -551,7 +551,8 @@ void show_ipi_list(struct seq_file *p, int prec)</div><div class='ctx'> 		if (!ipi_desc[i])</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);</div><div class='add'>+		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,</div><div class='add'>+			   prec &gt;= 4 ? " " : "");</div><div class='ctx'> </div><div class='ctx'> 		for_each_online_cpu(cpu)</div><div class='ctx'> 			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));</div><div class='head'>diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c<br/>index 9a14f721a2b0..42a3706e16a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/smp_twd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/smp_twd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/smp_twd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/smp_twd.c</a></div><div class='hunk'>@@ -93,7 +93,6 @@ static void twd_timer_stop(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);</div><div class='ctx'> </div><div class='del'>-	twd_shutdown(clk);</div><div class='ctx'> 	disable_percpu_irq(clk-&gt;irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c<br/>index f5781ff54a5c..2944721e82a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/sys_oabi-compat.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/sys_oabi-compat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/sys_oabi-compat.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/sys_oabi-compat.c</a></div><div class='hunk'>@@ -235,12 +235,12 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,</div><div class='ctx'> 				 unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	void __user *argp = (void __user *)arg;</div><div class='del'>-	struct fd f = fdget_raw(fd);</div><div class='add'>+	CLASS(fd_raw, f)(fd);</div><div class='ctx'> 	struct flock64 flock;</div><div class='del'>-	long err = -EBADF;</div><div class='add'>+	long err;</div><div class='ctx'> </div><div class='del'>-	if (!fd_file(f))</div><div class='del'>-		goto out;</div><div class='add'>+	if (fd_empty(f))</div><div class='add'>+		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case F_GETLK64:</div><div class='hunk'>@@ -271,8 +271,6 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,</div><div class='ctx'> 		err = sys_fcntl64(fd, cmd, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	fdput(f);</div><div class='del'>-out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c<br/>index 480e307501bb..afbd2ebe5c39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/traps.c</a></div><div class='hunk'>@@ -258,13 +258,6 @@ void show_stack(struct task_struct *tsk, unsigned long *sp, const char *loglvl)</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PREEMPT</div><div class='del'>-#define S_PREEMPT " PREEMPT"</div><div class='del'>-#elif defined(CONFIG_PREEMPT_RT)</div><div class='del'>-#define S_PREEMPT " PREEMPT_RT"</div><div class='del'>-#else</div><div class='del'>-#define S_PREEMPT ""</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> #define S_SMP " SMP"</div><div class='ctx'> #else</div><div class='hunk'>@@ -282,8 +275,8 @@ static int __die(const char *str, int err, struct pt_regs *regs)</div><div class='ctx'> 	static int die_counter;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP S_ISA "\n",</div><div class='del'>-	         str, err, ++die_counter);</div><div class='add'>+	pr_emerg("Internal error: %s: %x [#%d]" S_SMP S_ISA "\n",</div><div class='add'>+		 str, err, ++die_counter);</div><div class='ctx'> </div><div class='ctx'> 	/* trap and error numbers are mostly meaningless on ARM */</div><div class='ctx'> 	ret = notify_die(DIE_OOPS, str, regs, err, tsk-&gt;thread.trap_no, SIGSEGV);</div><div class='hunk'>@@ -570,6 +563,7 @@ static int bad_syscall(int n, struct pt_regs *regs)</div><div class='ctx'> static inline int</div><div class='ctx'> __do_cache_op(unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='add'>+	unsigned int ua_flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -578,7 +572,9 @@ __do_cache_op(unsigned long start, unsigned long end)</div><div class='ctx'> 		if (fatal_signal_pending(current))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='add'>+		ua_flags = uaccess_save_and_enable();</div><div class='ctx'> 		ret = flush_icache_user_range(start, start + chunk);</div><div class='add'>+		uaccess_restore(ua_flags);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c<br/>index d499ad461b00..e38a30477f3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/vdso.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='add'>+#include &lt;linux/vdso_datastore.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -14,7 +15,6 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;asm/arch_timer.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='hunk'>@@ -34,15 +34,6 @@ extern char vdso_start[], vdso_end[];</div><div class='ctx'> /* Total number of pages needed for the data and text portions of the VDSO. */</div><div class='ctx'> unsigned int vdso_total_pages __ro_after_init;</div><div class='ctx'> </div><div class='del'>-static union vdso_data_store vdso_data_store __page_aligned_data;</div><div class='del'>-struct vdso_data *vdso_data = vdso_data_store.data;</div><div class='del'>-</div><div class='del'>-static struct page *vdso_data_page __ro_after_init;</div><div class='del'>-static const struct vm_special_mapping vdso_data_mapping = {</div><div class='del'>-	.name = "[vvar]",</div><div class='del'>-	.pages = &amp;vdso_data_page,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int vdso_mremap(const struct vm_special_mapping *sm,</div><div class='ctx'> 		struct vm_area_struct *new_vma)</div><div class='ctx'> {</div><div class='hunk'>@@ -63,11 +54,9 @@ struct elfinfo {</div><div class='ctx'> 	char		*dynstr;	/* ptr to .dynstr section */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Cached result of boot-time check for whether the arch timer exists,</div><div class='del'>- * and if so, whether the virtual counter is useable.</div><div class='add'>+/* Boot-time check for whether the arch timer exists, and if so,</div><div class='add'>+ * whether the virtual counter is usable.</div><div class='ctx'>  */</div><div class='del'>-bool cntvct_ok __ro_after_init;</div><div class='del'>-</div><div class='ctx'> static bool __init cntvct_functional(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='hunk'>@@ -168,7 +157,7 @@ static void __init patch_vdso(void *ehdr)</div><div class='ctx'> 	 * want programs to incur the slight additional overhead of</div><div class='ctx'> 	 * dispatching through the VDSO only to fall back to syscalls.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!cntvct_ok) {</div><div class='add'>+	if (!cntvct_functional()) {</div><div class='ctx'> 		vdso_nullpatch_one(&amp;einfo, "__vdso_gettimeofday");</div><div class='ctx'> 		vdso_nullpatch_one(&amp;einfo, "__vdso_clock_gettime");</div><div class='ctx'> 		vdso_nullpatch_one(&amp;einfo, "__vdso_clock_gettime64");</div><div class='hunk'>@@ -193,9 +182,6 @@ static int __init vdso_init(void)</div><div class='ctx'> 	if (vdso_text_pagelist == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Grab the VDSO data page. */</div><div class='del'>-	vdso_data_page = virt_to_page(vdso_data);</div><div class='del'>-</div><div class='ctx'> 	/* Grab the VDSO text pages. */</div><div class='ctx'> 	for (i = 0; i &lt; text_pages; i++) {</div><div class='ctx'> 		struct page *page;</div><div class='hunk'>@@ -206,27 +192,16 @@ static int __init vdso_init(void)</div><div class='ctx'> </div><div class='ctx'> 	vdso_text_mapping.pages = vdso_text_pagelist;</div><div class='ctx'> </div><div class='del'>-	vdso_total_pages = 1; /* for the data/vvar page */</div><div class='add'>+	vdso_total_pages = VDSO_NR_PAGES; /* for the data/vvar pages */</div><div class='ctx'> 	vdso_total_pages += text_pages;</div><div class='ctx'> </div><div class='del'>-	cntvct_ok = cntvct_functional();</div><div class='del'>-</div><div class='ctx'> 	patch_vdso(vdso_start);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(vdso_init);</div><div class='ctx'> </div><div class='del'>-static int install_vvar(struct mm_struct *mm, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	struct vm_area_struct *vma;</div><div class='del'>-</div><div class='del'>-	vma = _install_special_mapping(mm, addr, PAGE_SIZE,</div><div class='del'>-				       VM_READ | VM_MAYREAD,</div><div class='del'>-				       &amp;vdso_data_mapping);</div><div class='del'>-</div><div class='del'>-	return PTR_ERR_OR_ZERO(vma);</div><div class='del'>-}</div><div class='add'>+static_assert(__VDSO_PAGES == VDSO_NR_PAGES);</div><div class='ctx'> </div><div class='ctx'> /* assumes mmap_lock is write-locked */</div><div class='ctx'> void arm_install_vdso(struct mm_struct *mm, unsigned long addr)</div><div class='hunk'>@@ -239,12 +214,12 @@ void arm_install_vdso(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	if (vdso_text_pagelist == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (install_vvar(mm, addr))</div><div class='add'>+	if (IS_ERR(vdso_install_vvar_mapping(mm, addr)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* Account for vvar page. */</div><div class='del'>-	addr += PAGE_SIZE;</div><div class='del'>-	len = (vdso_total_pages - 1) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	/* Account for vvar pages. */</div><div class='add'>+	addr += VDSO_NR_PAGES * PAGE_SIZE;</div><div class='add'>+	len = (vdso_total_pages - VDSO_NR_PAGES) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	vma = _install_special_mapping(mm, addr, len,</div><div class='ctx'> 		VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,</div><div class='head'>diff --git a/arch/arm/kernel/vmlinux-xip.lds.S b/arch/arm/kernel/vmlinux-xip.lds.S<br/>index 5eddb75a7174..f2e8d4fac068 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vmlinux-xip.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vmlinux-xip.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vmlinux-xip.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/vmlinux-xip.lds.S</a></div><div class='hunk'>@@ -63,7 +63,7 @@ SECTIONS</div><div class='ctx'> 	. = ALIGN(4);</div><div class='ctx'> 	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {</div><div class='ctx'> 		__start___ex_table = .;</div><div class='del'>-		ARM_MMU_KEEP(KEEP(*(__ex_table)))</div><div class='add'>+		ARM_MMU_KEEP(*(__ex_table))</div><div class='ctx'> 		__stop___ex_table = .;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S<br/>index de373c6c2ae8..d592a203f9c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vmlinux.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/kernel/vmlinux.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -74,7 +74,7 @@ SECTIONS</div><div class='ctx'> 	. = ALIGN(4);</div><div class='ctx'> 	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {</div><div class='ctx'> 		__start___ex_table = .;</div><div class='del'>-		ARM_MMU_KEEP(KEEP(*(__ex_table)))</div><div class='add'>+		ARM_MMU_KEEP(*(__ex_table))</div><div class='ctx'> 		__stop___ex_table = .;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/lib/.gitignore b/arch/arm/lib/.gitignore<br/>new file mode 100644<br/>index 000000000000..647d7a922e68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/lib/.gitignore?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/lib/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+# This now-removed directory used to contain generated files.</div><div class='add'>+/crypto/</div><div class='head'>diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig<br/>index 080019aa6fcd..fcf287edd0e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-aspeed/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-aspeed/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-aspeed/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-aspeed/Kconfig</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> menuconfig ARCH_ASPEED</div><div class='ctx'> 	bool "Aspeed BMC architectures"</div><div class='ctx'> 	depends on (CPU_LITTLE_ENDIAN &amp;&amp; ARCH_MULTI_V5) || ARCH_MULTI_V6 || ARCH_MULTI_V7</div><div class='del'>-	select SRAM</div><div class='ctx'> 	select WATCHDOG</div><div class='ctx'> 	select ASPEED_WATCHDOG</div><div class='ctx'> 	select MFD_SYSCON</div><div class='head'>diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig<br/>index 344f5305f69a..c5ef27e3cd8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-at91/Kconfig</a></div><div class='hunk'>@@ -1,4 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config ARCH_MICROCHIP</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> menuconfig ARCH_AT91</div><div class='ctx'> 	bool "AT91/Microchip SoCs"</div><div class='ctx'> 	depends on (CPU_LITTLE_ENDIAN &amp;&amp; (ARCH_MULTI_V4T || ARCH_MULTI_V5)) || \</div><div class='hunk'>@@ -8,6 +11,7 @@ menuconfig ARCH_AT91</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select SOC_BUS</div><div class='add'>+	select ARCH_MICROCHIP</div><div class='ctx'> </div><div class='ctx'> if ARCH_AT91</div><div class='ctx'> config SOC_SAMV7</div><div class='hunk'>@@ -58,6 +62,17 @@ config SOC_SAMA5D4</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this if you are using one of Microchip's SAMA5D4 family SoC.</div><div class='ctx'> </div><div class='add'>+config SOC_SAMA7D65</div><div class='add'>+	bool "SAMA7D65 family"</div><div class='add'>+	depends on ARCH_MULTI_V7</div><div class='add'>+	select HAVE_AT91_GENERATED_CLK</div><div class='add'>+	select HAVE_AT91_SAM9X60_PLL</div><div class='add'>+	select HAVE_AT91_USB_CLK</div><div class='add'>+	select HAVE_AT91_UTMI</div><div class='add'>+	select SOC_SAMA7</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using one of Microchip's SAMA7D65 family SoC.</div><div class='add'>+</div><div class='ctx'> config SOC_SAMA7G5</div><div class='ctx'> 	bool "SAMA7G5 family"</div><div class='ctx'> 	depends on ARCH_MULTI_V7</div><div class='head'>diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c<br/>index b9b995f8a36e..35058b99069c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-at91/pm.c</a></div><div class='hunk'>@@ -222,13 +222,16 @@ static const struct of_device_id sam9x60_ws_ids[] = {</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id sama7g5_ws_ids[] = {</div><div class='add'>+static const struct of_device_id sama7_ws_ids[] = {</div><div class='add'>+	{ .compatible = "microchip,sama7d65-rtc",	.data = &amp;ws_info[1] },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-rtc",	.data = &amp;ws_info[1] },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-ohci",	.data = &amp;ws_info[2] },</div><div class='ctx'> 	{ .compatible = "usb-ohci",			.data = &amp;ws_info[2] },</div><div class='ctx'> 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &amp;ws_info[2] },</div><div class='ctx'> 	{ .compatible = "usb-ehci",			.data = &amp;ws_info[2] },</div><div class='add'>+	{ .compatible = "microchip,sama7d65-sdhci",	.data = &amp;ws_info[3] },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-sdhci",	.data = &amp;ws_info[3] },</div><div class='add'>+	{ .compatible = "microchip,sama7d65-rtt",	.data = &amp;ws_info[4] },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-rtt",	.data = &amp;ws_info[4] },</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='hunk'>@@ -545,11 +548,12 @@ extern u32 at91_pm_suspend_in_sram_sz;</div><div class='ctx'> </div><div class='ctx'> static int at91_suspend_finish(unsigned long val)</div><div class='ctx'> {</div><div class='del'>-	unsigned char modified_gray_code[] = {</div><div class='del'>-		0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, 0x0c, 0x0d,</div><div class='del'>-		0x0e, 0x0f, 0x0a, 0x0b, 0x08, 0x09, 0x18, 0x19, 0x1a, 0x1b,</div><div class='del'>-		0x1e, 0x1f, 0x1c, 0x1d, 0x14, 0x15, 0x16, 0x17, 0x12, 0x13,</div><div class='del'>-		0x10, 0x11,</div><div class='add'>+	/* SYNOPSYS workaround to fix a bug in the calibration logic */</div><div class='add'>+	unsigned char modified_fix_code[] = {</div><div class='add'>+		0x00, 0x01, 0x01, 0x06, 0x07, 0x0c, 0x06, 0x07, 0x0b, 0x18,</div><div class='add'>+		0x0a, 0x0b, 0x0c, 0x0d, 0x0d, 0x0a, 0x13, 0x13, 0x12, 0x13,</div><div class='add'>+		0x14, 0x15, 0x15, 0x12, 0x18, 0x19, 0x19, 0x1e, 0x1f, 0x14,</div><div class='add'>+		0x1e, 0x1f,</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned int tmp, index;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -560,25 +564,25 @@ static int at91_suspend_finish(unsigned long val)</div><div class='ctx'> 		 * restore the ZQ0SR0 with the value saved here. But the</div><div class='ctx'> 		 * calibration is buggy and restoring some values from ZQ0SR0</div><div class='ctx'> 		 * is forbidden and risky thus we need to provide processed</div><div class='del'>-		 * values for these (modified gray code values).</div><div class='add'>+		 * values for these.</div><div class='ctx'> 		 */</div><div class='ctx'> 		tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0);</div><div class='ctx'> </div><div class='ctx'> 		/* Store pull-down output impedance select. */</div><div class='ctx'> 		index = (tmp &gt;&gt; DDR3PHY_ZQ0SR0_PDO_OFF) &amp; 0x1f;</div><div class='del'>-		soc_pm.bu-&gt;ddr_phy_calibration[0] = modified_gray_code[index];</div><div class='add'>+		soc_pm.bu-&gt;ddr_phy_calibration[0] = modified_fix_code[index] &lt;&lt; DDR3PHY_ZQ0SR0_PDO_OFF;</div><div class='ctx'> </div><div class='ctx'> 		/* Store pull-up output impedance select. */</div><div class='ctx'> 		index = (tmp &gt;&gt; DDR3PHY_ZQ0SR0_PUO_OFF) &amp; 0x1f;</div><div class='del'>-		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_gray_code[index];</div><div class='add'>+		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_fix_code[index] &lt;&lt; DDR3PHY_ZQ0SR0_PUO_OFF;</div><div class='ctx'> </div><div class='ctx'> 		/* Store pull-down on-die termination impedance select. */</div><div class='ctx'> 		index = (tmp &gt;&gt; DDR3PHY_ZQ0SR0_PDODT_OFF) &amp; 0x1f;</div><div class='del'>-		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_gray_code[index];</div><div class='add'>+		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_fix_code[index] &lt;&lt; DDR3PHY_ZQ0SR0_PDODT_OFF;</div><div class='ctx'> </div><div class='ctx'> 		/* Store pull-up on-die termination impedance select. */</div><div class='ctx'> 		index = (tmp &gt;&gt; DDR3PHY_ZQ0SRO_PUODT_OFF) &amp; 0x1f;</div><div class='del'>-		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_gray_code[index];</div><div class='add'>+		soc_pm.bu-&gt;ddr_phy_calibration[0] |= modified_fix_code[index] &lt;&lt; DDR3PHY_ZQ0SRO_PUODT_OFF;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The 1st 8 words of memory might get corrupted in the process</div><div class='hunk'>@@ -598,7 +602,21 @@ static int at91_suspend_finish(unsigned long val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void at91_pm_switch_ba_to_vbat(void)</div><div class='add'>+/**</div><div class='add'>+ * at91_pm_switch_ba_to_auto() - Configure Backup Unit Power Switch</div><div class='add'>+ * to automatic/hardware mode.</div><div class='add'>+ *</div><div class='add'>+ * The Backup Unit Power Switch can be managed either by software or hardware.</div><div class='add'>+ * Enabling hardware mode allows the automatic transition of power between</div><div class='add'>+ * VDDANA (or VDDIN33) and VDDBU (or VBAT, respectively), based on the</div><div class='add'>+ * availability of these power sources.</div><div class='add'>+ *</div><div class='add'>+ * If the Backup Unit Power Switch is already in automatic mode, no action is</div><div class='add'>+ * required. If it is in software-controlled mode, it is switched to automatic</div><div class='add'>+ * mode to enhance safety and eliminate the need for toggling between power</div><div class='add'>+ * sources.</div><div class='add'>+ */</div><div class='add'>+static void at91_pm_switch_ba_to_auto(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int offset = offsetof(struct at91_pm_sfrbu_regs, pswbu);</div><div class='ctx'> 	unsigned int val;</div><div class='hunk'>@@ -609,24 +627,19 @@ static void at91_pm_switch_ba_to_vbat(void)</div><div class='ctx'> </div><div class='ctx'> 	val = readl(soc_pm.data.sfrbu + offset);</div><div class='ctx'> </div><div class='del'>-	/* Already on VBAT. */</div><div class='del'>-	if (!(val &amp; soc_pm.sfrbu_regs.pswbu.state))</div><div class='add'>+	/* Already on auto/hardware. */</div><div class='add'>+	if (!(val &amp; soc_pm.sfrbu_regs.pswbu.ctrl))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	val &amp;= ~soc_pm.sfrbu_regs.pswbu.softsw;</div><div class='del'>-	val |= soc_pm.sfrbu_regs.pswbu.key | soc_pm.sfrbu_regs.pswbu.ctrl;</div><div class='add'>+	val &amp;= ~soc_pm.sfrbu_regs.pswbu.ctrl;</div><div class='add'>+	val |= soc_pm.sfrbu_regs.pswbu.key;</div><div class='ctx'> 	writel(val, soc_pm.data.sfrbu + offset);</div><div class='del'>-</div><div class='del'>-	/* Wait for update. */</div><div class='del'>-	val = readl(soc_pm.data.sfrbu + offset);</div><div class='del'>-	while (val &amp; soc_pm.sfrbu_regs.pswbu.state)</div><div class='del'>-		val = readl(soc_pm.data.sfrbu + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void at91_pm_suspend(suspend_state_t state)</div><div class='ctx'> {</div><div class='ctx'> 	if (soc_pm.data.mode == AT91_PM_BACKUP) {</div><div class='del'>-		at91_pm_switch_ba_to_vbat();</div><div class='add'>+		at91_pm_switch_ba_to_auto();</div><div class='ctx'> </div><div class='ctx'> 		cpu_suspend(0, at91_suspend_finish);</div><div class='ctx'> </div><div class='hunk'>@@ -634,6 +647,11 @@ static void at91_pm_suspend(suspend_state_t state)</div><div class='ctx'> 		at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn,</div><div class='ctx'> 					     &amp;at91_pm_suspend_in_sram,</div><div class='ctx'> 					     at91_pm_suspend_in_sram_sz);</div><div class='add'>+</div><div class='add'>+		if (IS_ENABLED(CONFIG_SOC_SAMA7D65)) {</div><div class='add'>+			/* SHDWC.SR */</div><div class='add'>+			readl(soc_pm.data.shdwc + 0x08);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		at91_suspend_finish(0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1052,7 +1070,8 @@ static int __init at91_pm_backup_init(void)</div><div class='ctx'> 	int ret = -ENODEV, located = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_SOC_SAMA5D2) &amp;&amp;</div><div class='del'>-	    !IS_ENABLED(CONFIG_SOC_SAMA7G5))</div><div class='add'>+	    !IS_ENABLED(CONFIG_SOC_SAMA7G5) &amp;&amp;</div><div class='add'>+	    !IS_ENABLED(CONFIG_SOC_SAMA7D65))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	if (!at91_is_pm_mode_active(AT91_PM_BACKUP))</div><div class='hunk'>@@ -1320,6 +1339,7 @@ struct pmc_info {</div><div class='ctx'> 	unsigned long uhp_udp_mask;</div><div class='ctx'> 	unsigned long mckr;</div><div class='ctx'> 	unsigned long version;</div><div class='add'>+	unsigned long mcks;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pmc_info pmc_infos[] __initconst = {</div><div class='hunk'>@@ -1344,15 +1364,21 @@ static const struct pmc_info pmc_infos[] __initconst = {</div><div class='ctx'> 		.version = AT91_PMC_V1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP,</div><div class='add'>+		.uhp_udp_mask = AT91SAM926x_PMC_UHP,</div><div class='ctx'> 		.mckr = 0x28,</div><div class='ctx'> 		.version = AT91_PMC_V2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.mckr = 0x28,</div><div class='ctx'> 		.version = AT91_PMC_V2,</div><div class='add'>+		.mcks = 4,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.uhp_udp_mask = AT91SAM926x_PMC_UHP,</div><div class='add'>+		.mckr = 0x28,</div><div class='add'>+		.version = AT91_PMC_V2,</div><div class='add'>+		.mcks = 9,</div><div class='ctx'> 	},</div><div class='del'>-</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id atmel_pmc_ids[] __initconst = {</div><div class='hunk'>@@ -1369,6 +1395,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = {</div><div class='ctx'> 	{ .compatible = "atmel,sama5d2-pmc", .data = &amp;pmc_infos[1] },</div><div class='ctx'> 	{ .compatible = "microchip,sam9x60-pmc", .data = &amp;pmc_infos[4] },</div><div class='ctx'> 	{ .compatible = "microchip,sam9x7-pmc", .data = &amp;pmc_infos[4] },</div><div class='add'>+	{ .compatible = "microchip,sama7d65-pmc", .data = &amp;pmc_infos[6] },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-pmc", .data = &amp;pmc_infos[5] },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='hunk'>@@ -1439,6 +1466,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))</div><div class='ctx'> 	soc_pm.data.uhp_udp_mask = pmc-&gt;uhp_udp_mask;</div><div class='ctx'> 	soc_pm.data.pmc_mckr_offset = pmc-&gt;mckr;</div><div class='ctx'> 	soc_pm.data.pmc_version = pmc-&gt;version;</div><div class='add'>+	soc_pm.data.pmc_mcks = pmc-&gt;mcks;</div><div class='ctx'> </div><div class='ctx'> 	if (pm_idle)</div><div class='ctx'> 		arm_pm_idle = pm_idle;</div><div class='hunk'>@@ -1662,7 +1690,7 @@ void __init sama7_pm_init(void)</div><div class='ctx'> 	at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));</div><div class='ctx'> 	at91_pm_init(NULL);</div><div class='ctx'> </div><div class='del'>-	soc_pm.ws_ids = sama7g5_ws_ids;</div><div class='add'>+	soc_pm.ws_ids = sama7_ws_ids;</div><div class='ctx'> 	soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;</div><div class='ctx'> </div><div class='ctx'> 	soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C &lt;&lt; 8);</div><div class='head'>diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h<br/>index 53bdc9000e44..50c3a425d140 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-at91/pm.h</a></div><div class='hunk'>@@ -39,6 +39,7 @@ struct at91_pm_data {</div><div class='ctx'> 	unsigned int suspend_mode;</div><div class='ctx'> 	unsigned int pmc_mckr_offset;</div><div class='ctx'> 	unsigned int pmc_version;</div><div class='add'>+	unsigned int pmc_mcks;</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-offsets.c<br/>index 40bd4e8fe40a..0ca5da66dc26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm_data-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm_data-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm_data-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-at91/pm_data-offsets.c</a></div><div class='hunk'>@@ -18,6 +18,8 @@ int main(void)</div><div class='ctx'> 						 pmc_mckr_offset));</div><div class='ctx'> 	DEFINE(PM_DATA_PMC_VERSION,	offsetof(struct at91_pm_data,</div><div class='ctx'> 						 pmc_version));</div><div class='add'>+	DEFINE(PM_DATA_PMC_MCKS,	offsetof(struct at91_pm_data,</div><div class='add'>+						 pmc_mcks));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S<br/>index e5869cca5e79..2e639f9ed648 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm_suspend.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-at91/pm_suspend.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-at91/pm_suspend.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-at91/pm_suspend.S</a></div><div class='hunk'>@@ -87,29 +87,6 @@ tmp3	.req	r6</div><div class='ctx'> </div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * Set state for 2.5V low power regulator</div><div class='del'>- * @ena: 0 - disable regulator</div><div class='del'>- *	 1 - enable regulator</div><div class='del'>- *</div><div class='del'>- * Side effects: overwrites r7, r8, r9, r10</div><div class='del'>- */</div><div class='del'>-	.macro at91_2_5V_reg_set_low_power ena</div><div class='del'>-#ifdef CONFIG_SOC_SAMA7</div><div class='del'>-	ldr	r7, .sfrbu</div><div class='del'>-	mov	r8, #\ena</div><div class='del'>-	ldr	r9, [r7, #AT91_SFRBU_25LDOCR]</div><div class='del'>-	orr	r9, r9, #AT91_SFRBU_25LDOCR_LP</div><div class='del'>-	cmp	r8, #1</div><div class='del'>-	beq	lp_done_\ena</div><div class='del'>-	bic	r9, r9, #AT91_SFRBU_25LDOCR_LP</div><div class='del'>-lp_done_\ena:</div><div class='del'>-	ldr	r10, =AT91_SFRBU_25LDOCR_LDOANAKEY</div><div class='del'>-	orr	r9, r9, r10</div><div class='del'>-	str	r9, [r7, #AT91_SFRBU_25LDOCR]</div><div class='del'>-#endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='ctx'> 	.macro at91_backup_set_lpm reg</div><div class='ctx'> #ifdef CONFIG_SOC_SAMA7</div><div class='ctx'> 	orr	\reg, \reg, #0x200000</div><div class='hunk'>@@ -689,6 +666,10 @@ sr_dis_exit:</div><div class='ctx'> 	bic	tmp2, tmp2, #AT91_PMC_PLL_UPDT_ID</div><div class='ctx'> 	str	tmp2, [pmc, #AT91_PMC_PLL_UPDT]</div><div class='ctx'> </div><div class='add'>+	/* save acr */</div><div class='add'>+	ldr	tmp2, [pmc, #AT91_PMC_PLL_ACR]</div><div class='add'>+	str	tmp2, .saved_acr</div><div class='add'>+</div><div class='ctx'> 	/* save div. */</div><div class='ctx'> 	mov	tmp1, #0</div><div class='ctx'> 	ldr	tmp2, [pmc, #AT91_PMC_PLL_CTRL0]</div><div class='hunk'>@@ -758,7 +739,7 @@ sr_dis_exit:</div><div class='ctx'> 	str	tmp1, [pmc, #AT91_PMC_PLL_UPDT]</div><div class='ctx'> </div><div class='ctx'> 	/* step 2. */</div><div class='del'>-	ldr	tmp1, =AT91_PMC_PLL_ACR_DEFAULT_PLLA</div><div class='add'>+	ldr	tmp1, .saved_acr</div><div class='ctx'> 	str	tmp1, [pmc, #AT91_PMC_PLL_ACR]</div><div class='ctx'> </div><div class='ctx'> 	/* step 3. */</div><div class='hunk'>@@ -814,18 +795,20 @@ sr_dis_exit:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * at91_mckx_ps_enable:	save MCK1..4 settings and switch it to main clock</div><div class='add'>+ * at91_mckx_ps_enable:	save MCK settings and switch it to main clock</div><div class='ctx'>  *</div><div class='del'>- * Side effects: overwrites tmp1, tmp2</div><div class='add'>+ * Side effects: overwrites tmp1, tmp2, tmp3</div><div class='ctx'>  */</div><div class='ctx'> .macro at91_mckx_ps_enable</div><div class='ctx'> #ifdef CONFIG_SOC_SAMA7</div><div class='ctx'> 	ldr	pmc, .pmc_base</div><div class='add'>+	ldr	tmp3, .mcks</div><div class='ctx'> </div><div class='del'>-	/* There are 4 MCKs we need to handle: MCK1..4 */</div><div class='add'>+	/* Start at MCK1 and go until MCKs */</div><div class='ctx'> 	mov	tmp1, #1</div><div class='del'>-e_loop:	cmp	tmp1, #5</div><div class='del'>-	beq	e_done</div><div class='add'>+e_loop:</div><div class='add'>+	cmp	tmp1, tmp3</div><div class='add'>+	bgt	e_done</div><div class='ctx'> </div><div class='ctx'> 	/* Write MCK ID to retrieve the settings. */</div><div class='ctx'> 	str	tmp1, [pmc, #AT91_PMC_MCR_V2]</div><div class='hunk'>@@ -850,7 +833,37 @@ e_save_mck3:</div><div class='ctx'> 	b	e_ps</div><div class='ctx'> </div><div class='ctx'> e_save_mck4:</div><div class='add'>+	cmp	tmp1, #4</div><div class='add'>+	bne	e_save_mck5</div><div class='ctx'> 	str	tmp2, .saved_mck4</div><div class='add'>+	b	e_ps</div><div class='add'>+</div><div class='add'>+e_save_mck5:</div><div class='add'>+	cmp	tmp1, #5</div><div class='add'>+	bne	e_save_mck6</div><div class='add'>+	str	tmp2, .saved_mck5</div><div class='add'>+	b	e_ps</div><div class='add'>+</div><div class='add'>+e_save_mck6:</div><div class='add'>+	cmp	tmp1, #6</div><div class='add'>+	bne	e_save_mck7</div><div class='add'>+	str	tmp2, .saved_mck6</div><div class='add'>+	b	e_ps</div><div class='add'>+</div><div class='add'>+e_save_mck7:</div><div class='add'>+	cmp	tmp1, #7</div><div class='add'>+	bne	e_save_mck8</div><div class='add'>+	str	tmp2, .saved_mck7</div><div class='add'>+	b	e_ps</div><div class='add'>+</div><div class='add'>+e_save_mck8:</div><div class='add'>+	cmp	tmp1, #8</div><div class='add'>+	bne	e_save_mck9</div><div class='add'>+	str	tmp2, .saved_mck8</div><div class='add'>+	b	e_ps</div><div class='add'>+</div><div class='add'>+e_save_mck9:</div><div class='add'>+	str	tmp2, .saved_mck9</div><div class='ctx'> </div><div class='ctx'> e_ps:</div><div class='ctx'> 	/* Use CSS=MAINCK and DIV=1. */</div><div class='hunk'>@@ -870,18 +883,20 @@ e_done:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * at91_mckx_ps_restore: restore MCK1..4 settings</div><div class='add'>+ * at91_mckx_ps_restore: restore MCKx settings</div><div class='ctx'>  *</div><div class='del'>- * Side effects: overwrites tmp1, tmp2</div><div class='add'>+ * Side effects: overwrites tmp1, tmp2 and tmp3</div><div class='ctx'>  */</div><div class='ctx'> .macro at91_mckx_ps_restore</div><div class='ctx'> #ifdef CONFIG_SOC_SAMA7</div><div class='ctx'> 	ldr	pmc, .pmc_base</div><div class='add'>+	ldr	tmp2, .mcks</div><div class='ctx'> </div><div class='del'>-	/* There are 4 MCKs we need to handle: MCK1..4 */</div><div class='add'>+	/* Start from MCK1 and go up to MCKs */</div><div class='ctx'> 	mov	tmp1, #1</div><div class='del'>-r_loop:	cmp	tmp1, #5</div><div class='del'>-	beq	r_done</div><div class='add'>+r_loop:</div><div class='add'>+	cmp	tmp1, tmp2</div><div class='add'>+	bgt	r_done</div><div class='ctx'> </div><div class='ctx'> r_save_mck1:</div><div class='ctx'> 	cmp	tmp1, #1</div><div class='hunk'>@@ -902,7 +917,37 @@ r_save_mck3:</div><div class='ctx'> 	b	r_ps</div><div class='ctx'> </div><div class='ctx'> r_save_mck4:</div><div class='add'>+	cmp	tmp1, #4</div><div class='add'>+	bne	r_save_mck5</div><div class='ctx'> 	ldr	tmp2, .saved_mck4</div><div class='add'>+	b	r_ps</div><div class='add'>+</div><div class='add'>+r_save_mck5:</div><div class='add'>+	cmp	tmp1, #5</div><div class='add'>+	bne	r_save_mck6</div><div class='add'>+	ldr	tmp2, .saved_mck5</div><div class='add'>+	b	r_ps</div><div class='add'>+</div><div class='add'>+r_save_mck6:</div><div class='add'>+	cmp	tmp1, #6</div><div class='add'>+	bne	r_save_mck7</div><div class='add'>+	ldr	tmp2, .saved_mck6</div><div class='add'>+	b	r_ps</div><div class='add'>+</div><div class='add'>+r_save_mck7:</div><div class='add'>+	cmp	tmp1, #7</div><div class='add'>+	bne	r_save_mck8</div><div class='add'>+	ldr	tmp2, .saved_mck7</div><div class='add'>+	b	r_ps</div><div class='add'>+</div><div class='add'>+r_save_mck8:</div><div class='add'>+	cmp	tmp1, #8</div><div class='add'>+	bne	r_save_mck9</div><div class='add'>+	ldr	tmp2, .saved_mck8</div><div class='add'>+	b	r_ps</div><div class='add'>+</div><div class='add'>+r_save_mck9:</div><div class='add'>+	ldr	tmp2, .saved_mck9</div><div class='ctx'> </div><div class='ctx'> r_ps:</div><div class='ctx'> 	/* Write MCK ID to retrieve the settings. */</div><div class='hunk'>@@ -916,11 +961,12 @@ r_ps:</div><div class='ctx'> 	bic	tmp3, tmp3, #AT91_PMC_MCR_V2_ID_MSK</div><div class='ctx'> 	orr	tmp3, tmp3, tmp1</div><div class='ctx'> 	orr	tmp3, tmp3, #AT91_PMC_MCR_V2_CMD</div><div class='del'>-	str	tmp2, [pmc, #AT91_PMC_MCR_V2]</div><div class='add'>+	str	tmp3, [pmc, #AT91_PMC_MCR_V2]</div><div class='ctx'> </div><div class='ctx'> 	wait_mckrdy tmp1</div><div class='ctx'> </div><div class='ctx'> 	add	tmp1, tmp1, #1</div><div class='add'>+	ldr	tmp2, .mcks</div><div class='ctx'> 	b	r_loop</div><div class='ctx'> r_done:</div><div class='ctx'> #endif</div><div class='hunk'>@@ -954,9 +1000,6 @@ save_mck:</div><div class='ctx'> </div><div class='ctx'> 	at91_plla_disable</div><div class='ctx'> </div><div class='del'>-	/* Enable low power mode for 2.5V regulator. */</div><div class='del'>-	at91_2_5V_reg_set_low_power 1</div><div class='del'>-</div><div class='ctx'> 	ldr	tmp3, .pm_mode</div><div class='ctx'> 	cmp	tmp3, #AT91_PM_ULP1</div><div class='ctx'> 	beq	ulp1_mode</div><div class='hunk'>@@ -969,9 +1012,6 @@ ulp1_mode:</div><div class='ctx'> 	b	ulp_exit</div><div class='ctx'> </div><div class='ctx'> ulp_exit:</div><div class='del'>-	/* Disable low power mode for 2.5V regulator. */</div><div class='del'>-	at91_2_5V_reg_set_low_power 0</div><div class='del'>-</div><div class='ctx'> 	ldr	pmc, .pmc_base</div><div class='ctx'> </div><div class='ctx'> 	at91_plla_enable</div><div class='hunk'>@@ -1045,6 +1085,10 @@ ENTRY(at91_pm_suspend_in_sram)</div><div class='ctx'> 	str	tmp1, .memtype</div><div class='ctx'> 	ldr	tmp1, [r0, #PM_DATA_MODE]</div><div class='ctx'> 	str	tmp1, .pm_mode</div><div class='add'>+#ifdef CONFIG_SOC_SAMA7</div><div class='add'>+	ldr	tmp1, [r0, #PM_DATA_PMC_MCKS]</div><div class='add'>+	str	tmp1, .mcks</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ldrne below are here to preload their address in the TLB as access</div><div class='hunk'>@@ -1132,8 +1176,14 @@ ENDPROC(at91_pm_suspend_in_sram)</div><div class='ctx'> 	.word 0</div><div class='ctx'> .pmc_version:</div><div class='ctx'> 	.word 0</div><div class='add'>+#ifdef CONFIG_SOC_SAMA7</div><div class='add'>+.mcks:</div><div class='add'>+	.word 0</div><div class='add'>+#endif</div><div class='ctx'> .saved_mckr:</div><div class='ctx'> 	.word 0</div><div class='add'>+.saved_acr:</div><div class='add'>+	.word 0</div><div class='ctx'> .saved_pllar:</div><div class='ctx'> 	.word 0</div><div class='ctx'> .saved_sam9_lpr:</div><div class='hunk'>@@ -1155,6 +1205,16 @@ ENDPROC(at91_pm_suspend_in_sram)</div><div class='ctx'> 	.word 0</div><div class='ctx'> .saved_mck4:</div><div class='ctx'> 	.word 0</div><div class='add'>+.saved_mck5:</div><div class='add'>+	.word 0</div><div class='add'>+.saved_mck6:</div><div class='add'>+	.word 0</div><div class='add'>+.saved_mck7:</div><div class='add'>+	.word 0</div><div class='add'>+.saved_mck8:</div><div class='add'>+	.word 0</div><div class='add'>+.saved_mck9:</div><div class='add'>+	.word 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> ENTRY(at91_pm_suspend_in_sram_sz)</div><div class='head'>diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile<br/>index 2e523f29ec3b..6baedf4c6304 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-bcm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-bcm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-bcm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-bcm/Makefile</a></div><div class='hunk'>@@ -58,5 +58,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> # BCMBCA</div><div class='ctx'> ifeq ($(CONFIG_ARCH_BCMBCA),y)</div><div class='add'>+obj-$(CONFIG_DEBUG_BCMBCA)	+= board_bcmbca.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= bcm63xx_smp.o bcm63xx_pmb.o</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/mach-bcm/board_bcmbca.c b/arch/arm/mach-bcm/board_bcmbca.c<br/>new file mode 100644<br/>index 000000000000..b510d959870a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-bcm/board_bcmbca.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-bcm/board_bcmbca.c</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright (C) 2024 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+</div><div class='add'>+/* This is needed for LL-debug/earlyprintk/debug-macro.S */</div><div class='add'>+static struct map_desc bcmbca_io_desc[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.virtual = CONFIG_DEBUG_UART_VIRT,</div><div class='add'>+		.pfn = __phys_to_pfn(CONFIG_DEBUG_UART_PHYS),</div><div class='add'>+		.length = SZ_4K,</div><div class='add'>+		.type = MT_DEVICE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init bcmbca_map_io(void)</div><div class='add'>+{</div><div class='add'>+	iotable_init(bcmbca_io_desc, ARRAY_SIZE(bcmbca_io_desc));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const bcmbca_dt_compat[] = {</div><div class='add'>+	/* TODO: Add other BCMBCA SoCs here to get debug UART support */</div><div class='add'>+	"brcm,bcm6846",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(BCMBCA_DT, "BCMBCA Broadband Access Processors")</div><div class='add'>+	.map_io = bcmbca_map_io,</div><div class='add'>+	.dt_compat = bcmbca_dt_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c<br/>index 43bc98e388bf..27948b515993 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-bcm/brcmstb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-bcm/brcmstb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-bcm/brcmstb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-bcm/brcmstb.c</a></div><div class='hunk'>@@ -23,11 +23,6 @@ u32 brcmstb_uart_config[3] = {</div><div class='ctx'> 	0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init brcmstb_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	irqchip_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *const brcmstb_match[] __initconst = {</div><div class='ctx'> 	"brcm,bcm7445",</div><div class='ctx'> 	"brcm,brcmstb",</div><div class='hunk'>@@ -36,5 +31,4 @@ static const char *const brcmstb_match[] __initconst = {</div><div class='ctx'> </div><div class='ctx'> DT_MACHINE_START(BRCMSTB, "Broadcom STB (Flattened Device Tree)")</div><div class='ctx'> 	.dt_compat	= brcmstb_match,</div><div class='del'>-	.init_irq	= brcmstb_init_irq,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig<br/>index 2a8a9fe46586..6cd6d29a2c9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/Kconfig</a></div><div class='hunk'>@@ -4,6 +4,7 @@ menuconfig ARCH_DAVINCI</div><div class='ctx'> 	bool "TI DaVinci"</div><div class='ctx'> 	depends on ARCH_MULTI_V5</div><div class='ctx'> 	depends on CPU_LITTLE_ENDIAN</div><div class='add'>+	select ARCH_DAVINCI_DA850</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select DAVINCI_TIMER</div><div class='ctx'> 	select ZONE_DMA</div><div class='hunk'>@@ -18,15 +19,9 @@ if ARCH_DAVINCI</div><div class='ctx'> </div><div class='ctx'> comment "DaVinci Core Type"</div><div class='ctx'> </div><div class='del'>-config ARCH_DAVINCI_DA830</div><div class='del'>-	bool "DA830/OMAP-L137/AM17x based system"</div><div class='del'>-	select ARCH_DAVINCI_DA8XX</div><div class='del'>-	# needed on silicon revs 1.0, 1.1:</div><div class='del'>-	select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE</div><div class='del'>-	select DAVINCI_CP_INTC</div><div class='del'>-</div><div class='ctx'> config ARCH_DAVINCI_DA850</div><div class='ctx'> 	bool "DA850/OMAP-L138/AM18x based system"</div><div class='add'>+	select ARCH_DAVINCI_DA8XX</div><div class='ctx'> 	select DAVINCI_CP_INTC</div><div class='ctx'> </div><div class='ctx'> config ARCH_DAVINCI_DA8XX</div><div class='head'>diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile<br/>index 31d22a5d8e1e..7a210db669f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/Makefile</a></div><div class='hunk'>@@ -10,7 +10,6 @@ obj-y 					:= common.o sram.o devices-da8xx.o</div><div class='ctx'> obj-$(CONFIG_DAVINCI_MUX)		+= mux.o</div><div class='ctx'> </div><div class='ctx'> # Chip specific</div><div class='del'>-obj-$(CONFIG_ARCH_DAVINCI_DA830)	+= da830.o</div><div class='ctx'> obj-$(CONFIG_ARCH_DAVINCI_DA850)	+= da850.o pdata-quirks.o</div><div class='ctx'> </div><div class='ctx'> obj-y					+= da8xx-dt.o</div><div class='head'>diff --git a/arch/arm/mach-davinci/cputype.h b/arch/arm/mach-davinci/cputype.h<br/>index 148a738391dc..a8f5330aaad1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/cputype.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/cputype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/cputype.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/cputype.h</a></div><div class='hunk'>@@ -25,7 +25,6 @@ struct davinci_id {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Can use lower 16 bits of cpu id  for a variant when required */</div><div class='del'>-#define	DAVINCI_CPU_ID_DA830		0x08300000</div><div class='ctx'> #define	DAVINCI_CPU_ID_DA850		0x08500000</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c<br/>deleted file mode 100644<br/>index 2e497745b624..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/da830.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da830.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,507 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * TI DA830/OMAP L137 chip specific setup</div><div class='del'>- *</div><div class='del'>- * Author: Mark A. Greer &lt;mgreer@mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * 2009 (c) MontaVista Software, Inc.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/clk-provider.h&gt;</div><div class='del'>-#include &lt;linux/clk/davinci.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irqchip/irq-davinci-cp-intc.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;clocksource/timer-davinci.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "cputype.h"</div><div class='del'>-#include "da8xx.h"</div><div class='del'>-#include "irqs.h"</div><div class='del'>-#include "mux.h"</div><div class='del'>-</div><div class='del'>-/* Offsets of the 8 compare registers on the da830 */</div><div class='del'>-#define DA830_CMP12_0		0x60</div><div class='del'>-#define DA830_CMP12_1		0x64</div><div class='del'>-#define DA830_CMP12_2		0x68</div><div class='del'>-#define DA830_CMP12_3		0x6c</div><div class='del'>-#define DA830_CMP12_4		0x70</div><div class='del'>-#define DA830_CMP12_5		0x74</div><div class='del'>-#define DA830_CMP12_6		0x78</div><div class='del'>-#define DA830_CMP12_7		0x7c</div><div class='del'>-</div><div class='del'>-#define DA830_REF_FREQ		24000000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Device specific mux setup</div><div class='del'>- *</div><div class='del'>- *	     soc      description	mux    mode    mode   mux	dbg</div><div class='del'>- *					reg   offset   mask   mode</div><div class='del'>- */</div><div class='del'>-static const struct mux_config da830_pins[] = {</div><div class='del'>-#ifdef CONFIG_DAVINCI_MUX</div><div class='del'>-	MUX_CFG(DA830, GPIO7_14,	0,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, RTCK,		0,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_15,	0,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMU_0,		0,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_SDCKE,	0,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_CLK_GLUE,	0,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_CLK,		0,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_CS_0,	0,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_CAS,	0,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_RAS,	0,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_WE,		0,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_BA_1,	1,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_BA_0,	1,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_0,		1,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_1,		1,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_2,		1,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_3,		1,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_4,		1,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_5,		1,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_0,		1,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_1,		1,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_2,		1,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_3,		1,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_4,		1,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_5,		1,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_6,		1,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_7,		1,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_6,		2,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_7,		2,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_8,		2,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_9,		2,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_10,	2,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_11,	2,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_A_12,	2,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_31,	2,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_8,		2,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_9,		2,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_10,	2,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_11,	2,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_12,	2,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO7_13,	2,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_13,	2,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_30,	3,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_29,	3,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_28,	3,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_27,	3,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_26,	3,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_25,	3,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_24,	3,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_23,	3,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_22,	4,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_21,	4,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_20,	4,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_19,	4,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_18,	4,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_17,	4,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_16,	4,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_WE_DQM_3,	4,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_WE_DQM_2,	5,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_0,		5,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_1,		5,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_2,		5,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_3,		5,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_4,		5,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_5,		5,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_6,		5,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_0,		5,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_1,		5,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_2,		5,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_3,		5,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_4,		5,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_5,		5,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_6,		5,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_7,		6,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_8,		6,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_9,		6,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_10,	6,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_11,	6,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_12,	6,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_13,	6,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_14,	6,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_7,		6,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_8,		6,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_9,		6,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_10,	6,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_11,	6,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_12,	6,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_13,	6,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_14,	6,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMB_D_15,	7,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_WE_DQM_1,	7,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMB_WE_DQM_0,	7,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI0_SOMI_0,	7,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI0_SIMO_0,	7,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI0_CLK,	7,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NSPI0_ENA,	7,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NSPI0_SCS_0,	7,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP0I,		7,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP0S,		7,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP1I,		7,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUART0_CTS,	7,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUART0_RTS,	7,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP0A,		7,	24,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP0B,		7,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO6_15,	7,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_14,	7,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_15,	7,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_0,		7,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_1,		7,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_2,		7,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_3,		7,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_4,		7,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI1_SOMI_0,	8,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI1_SIMO_0,	8,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, SPI1_CLK,	8,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UART0_RXD,	8,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UART0_TXD,	8,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_10,		8,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_11,		8,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NSPI1_ENA,	8,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, I2C1_SCL,	8,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, I2C1_SDA,	8,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP1S,		8,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, I2C0_SDA,	8,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, I2C0_SCL,	8,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UART2_RXD,	8,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, TM64P0_IN12,	8,	12,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, TM64P0_OUT12,	8,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_5,		8,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_6,		8,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_7,		8,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_8,		8,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_9,		8,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_10,	8,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_11,	8,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_12,	8,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, NSPI1_SCS_0,	9,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, USB0_DRVVBUS,	9,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKX0,		9,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKX0,		9,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSX0,		9,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKR0,		9,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKR0,		9,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSR0,		9,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UART2_TXD,	9,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKX2,		9,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, ECAP0_APWM0,	9,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_MHZ_50_CLK,	9,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, ECAP1_APWM1,	9,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, USB_REFCLKIN,	9,	8,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO5_13,	9,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_15,	9,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_11,	9,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_12,	9,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_13,	9,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_14,	9,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_15,	9,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_12,	9,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, AMUTE0,		10,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_0,		10,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_1,		10,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_2,		10,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_3,		10,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_4,		10,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_5,		10,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_6,		10,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_TXD_0,	10,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_TXD_1,	10,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_TXEN,	10,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_CRS_DV,	10,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_RXD_0,	10,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_RXD_1,	10,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, RMII_RXER,	10,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSR2,		10,	4,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKX2,		10,	8,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR2_3,		10,	12,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR2_2,		10,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR2_1,		10,	20,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSX2,		10,	24,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKR2,		10,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, NRESETOUT,	10,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_0,		10,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_1,		10,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_2,		10,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_3,		10,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_4,		10,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_5,		10,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_6,		10,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_7,		11,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_8,		11,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UART1_RXD,	11,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UART1_TXD,	11,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_11,		11,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKX1,		11,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKX1,		11,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSX1,		11,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, MDIO_CLK,	11,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MDIO_D,		11,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_9,		11,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_10,		11,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM0B,		11,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM0A,		11,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWMSYNCI,	11,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR2_0,		11,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWMSYNC0,	11,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_7,		11,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_8,		11,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_9,		11,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_10,	11,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_11,	11,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_14,	11,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO3_15,	11,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_10,	11,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKR1,		12,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, ACLKR1,		12,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AFSR1,		12,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AMUTE1,		12,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_0,		12,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_1,		12,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_2,		12,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_3,		12,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, ECAP2_APWM2,	12,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EHRPWMGLUETZ,	12,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP1A,		12,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_11,	12,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_12,	12,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_13,	12,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_14,	12,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_0,		12,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_1,		12,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_2,		12,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_3,		12,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_4,		13,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_5,		13,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_6,		13,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_7,		13,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_8,		13,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR1_9,		13,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_0,		13,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_1,		13,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EQEP1B,		13,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM2B,		13,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM2A,		13,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM1B,		13,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, EPWM1A,		13,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_0,	13,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_1,	13,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_0,	13,	24,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_1,	13,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_4,		13,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_5,		13,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_6,		13,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_7,		13,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_8,		13,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO4_9,		13,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_0,		13,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_1,		13,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_2,		14,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_3,		14,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_4,		14,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_5,		14,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_6,		14,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_7,		14,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_8,		14,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_9,		14,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_2,	14,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_3,	14,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_4,	14,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_5,	14,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_6,	14,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_DAT_7,	14,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_8,	14,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_9,	14,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_2,	14,	0,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_3,	14,	4,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_4,	14,	8,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_5,	14,	12,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_6,	14,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_7,	14,	20,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_8,		14,	24,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_9,		14,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_2,		14,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_3,		14,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_4,		14,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_5,		14,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_6,		14,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_7,		14,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_8,		14,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_9,		14,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_10,	15,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_11,	15,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_12,	15,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_13,	15,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_14,	15,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_D_15,	15,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_0,		15,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_1,		15,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_10,	15,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_11,	15,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_12,	15,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_13,	15,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_14,	15,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HD_15,	15,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_7,		15,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_CLK,	15,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_10,	15,	0,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_11,	15,	4,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_12,	15,	8,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_13,	15,	12,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_14,	15,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_15,	15,	20,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HCNTL0,	15,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_10,	15,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_11,	15,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_12,	15,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_13,	15,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_14,	15,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO0_15,	15,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_0,		15,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_1,		15,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_2,		16,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_3,		16,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_4,		16,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_5,		16,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_6,		16,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_7,		16,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_8,		16,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_9,		16,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, MMCSD_CMD,	16,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_6,		16,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_3,		16,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_2,		16,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_1,		16,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_0,		16,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_PCLK,	16,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_HSYNC,	16,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HCNTL1,	16,	0,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_2,		16,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_3,		16,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_4,		16,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_5,		16,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_6,		16,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_7,		16,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_8,		16,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_9,		16,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_10,	17,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_11,	17,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_A_12,	17,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_BA_1,	17,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_BA_0,	17,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_CLK,		17,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_SDCKE,	17,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CAS,	17,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_VSYNC,	17,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NLCD_AC_ENB_CS,	17,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_MCLK,	17,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_5,		17,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, LCD_D_4,		17,	16,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, OBSCLK,		17,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CS_4,	17,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HHWIL,	17,	12,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AHCLKR2,		17,	20,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_10,	17,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_11,	17,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_12,	17,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_13,	17,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_14,	17,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO1_15,	17,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_0,		17,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_1,		17,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_RAS,	18,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_WE,		18,	4,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CS_0,	18,	8,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CS_2,	18,	12,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CS_3,	18,	16,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_OE,		18,	20,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_WE_DQM_1,	18,	24,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_WE_DQM_0,	18,	28,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NEMA_CS_5,	18,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, UHPI_HRNW,	18,	4,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HAS,	18,	8,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HCS,	18,	12,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HDS1,	18,	20,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HDS2,	18,	24,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HINT,	18,	28,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_12,		18,	4,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AMUTE2,		18,	16,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_13,		18,	20,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_14,		18,	24,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, AXR0_15,		18,	28,	0xf,	4,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_2,		18,	0,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_3,		18,	4,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_4,		18,	8,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_5,		18,	12,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_6,		18,	16,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_7,		18,	20,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_8,		18,	24,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_9,		18,	28,	0xf,	8,	false)</div><div class='del'>-	MUX_CFG(DA830, EMA_WAIT_0,	19,	0,	0xf,	1,	false)</div><div class='del'>-	MUX_CFG(DA830, NUHPI_HRDY,	19,	0,	0xf,	2,	false)</div><div class='del'>-	MUX_CFG(DA830, GPIO2_10,	19,	0,	0xf,	8,	false)</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct map_desc da830_io_desc[] = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= IO_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(IO_PHYS),</div><div class='del'>-		.length		= IO_SIZE,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.virtual	= DA8XX_CP_INTC_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(DA8XX_CP_INTC_BASE),</div><div class='del'>-		.length		= DA8XX_CP_INTC_SIZE,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Contents of JTAG ID register used to identify exact cpu type */</div><div class='del'>-static struct davinci_id da830_ids[] = {</div><div class='del'>-	{</div><div class='del'>-		.variant	= 0x0,</div><div class='del'>-		.part_no	= 0xb7df,</div><div class='del'>-		.manufacturer	= 0x017,	/* 0x02f &gt;&gt; 1 */</div><div class='del'>-		.cpu_id		= DAVINCI_CPU_ID_DA830,</div><div class='del'>-		.name		= "da830/omap-l137 rev1.0",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.variant	= 0x8,</div><div class='del'>-		.part_no	= 0xb7df,</div><div class='del'>-		.manufacturer	= 0x017,</div><div class='del'>-		.cpu_id		= DAVINCI_CPU_ID_DA830,</div><div class='del'>-		.name		= "da830/omap-l137 rev1.1",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.variant	= 0x9,</div><div class='del'>-		.part_no	= 0xb7df,</div><div class='del'>-		.manufacturer	= 0x017,</div><div class='del'>-		.cpu_id		= DAVINCI_CPU_ID_DA830,</div><div class='del'>-		.name		= "da830/omap-l137 rev2.0",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct davinci_soc_info davinci_soc_info_da830 = {</div><div class='del'>-	.io_desc		= da830_io_desc,</div><div class='del'>-	.io_desc_num		= ARRAY_SIZE(da830_io_desc),</div><div class='del'>-	.jtag_id_reg		= DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,</div><div class='del'>-	.ids			= da830_ids,</div><div class='del'>-	.ids_num		= ARRAY_SIZE(da830_ids),</div><div class='del'>-	.pinmux_base		= DA8XX_SYSCFG0_BASE + 0x120,</div><div class='del'>-	.pinmux_pins		= da830_pins,</div><div class='del'>-	.pinmux_pins_num	= ARRAY_SIZE(da830_pins),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init da830_init(void)</div><div class='del'>-{</div><div class='del'>-	davinci_common_init(&amp;davinci_soc_info_da830);</div><div class='del'>-</div><div class='del'>-	da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);</div><div class='del'>-	WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c<br/>index 287dd987908e..706f8241b5e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/da850.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da850.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/da850.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/da850.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  *</div><div class='del'>- * Derived from: arch/arm/mach-davinci/da830.c</div><div class='ctx'>  * Original Copyrights follow:</div><div class='ctx'>  *</div><div class='ctx'>  * 2009 (c) MontaVista Software, Inc.</div><div class='head'>diff --git a/arch/arm/mach-davinci/da8xx.h b/arch/arm/mach-davinci/da8xx.h<br/>index 54a255b8d8d8..70d14f7f3520 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/da8xx.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/da8xx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/da8xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/da8xx.h</a></div><div class='hunk'>@@ -68,8 +68,6 @@ extern void __iomem *da8xx_syscfg1_base;</div><div class='ctx'> #define DA8XX_SHARED_RAM_BASE	0x80000000</div><div class='ctx'> #define DA8XX_ARM_RAM_BASE	0xffff0000</div><div class='ctx'> </div><div class='del'>-void da830_init(void);</div><div class='del'>-</div><div class='ctx'> void da850_init(void);</div><div class='ctx'> </div><div class='ctx'> int da850_register_vpif_display</div><div class='head'>diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c<br/>index 5e73a725d5da..4e9ac55ae92d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/devices-da8xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/devices-da8xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/devices-da8xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/devices-da8xx.c</a></div><div class='hunk'>@@ -33,7 +33,6 @@</div><div class='ctx'> #define DA8XX_PRUSS_MEM_BASE		0x01c30000</div><div class='ctx'> #define DA8XX_MMCSD0_BASE		0x01c40000</div><div class='ctx'> #define DA8XX_SPI0_BASE			0x01c41000</div><div class='del'>-#define DA830_SPI1_BASE			0x01e12000</div><div class='ctx'> #define DA8XX_LCD_CNTRL_BASE		0x01e13000</div><div class='ctx'> #define DA850_SATA_BASE			0x01e18000</div><div class='ctx'> #define DA850_MMCSD1_BASE		0x01e1b000</div><div class='head'>diff --git a/arch/arm/mach-davinci/irqs.h b/arch/arm/mach-davinci/irqs.h<br/>index b1ceed81e9fa..23e8da5025ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/irqs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/irqs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/irqs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/irqs.h</a></div><div class='hunk'>@@ -101,33 +101,6 @@</div><div class='ctx'> #define IRQ_DA8XX_ECAP2			71</div><div class='ctx'> #define IRQ_DA8XX_ARMCLKSTOPREQ		90</div><div class='ctx'> </div><div class='del'>-/* DA830 specific interrupts */</div><div class='del'>-#define IRQ_DA830_MPUERR		27</div><div class='del'>-#define IRQ_DA830_IOPUERR		27</div><div class='del'>-#define IRQ_DA830_BOOTCFGERR		27</div><div class='del'>-#define IRQ_DA830_EHRPWM2		67</div><div class='del'>-#define IRQ_DA830_EHRPWM2TZ		68</div><div class='del'>-#define IRQ_DA830_EQEP0			72</div><div class='del'>-#define IRQ_DA830_EQEP1			73</div><div class='del'>-#define IRQ_DA830_T12CMPINT0_0		74</div><div class='del'>-#define IRQ_DA830_T12CMPINT1_0		75</div><div class='del'>-#define IRQ_DA830_T12CMPINT2_0		76</div><div class='del'>-#define IRQ_DA830_T12CMPINT3_0		77</div><div class='del'>-#define IRQ_DA830_T12CMPINT4_0		78</div><div class='del'>-#define IRQ_DA830_T12CMPINT5_0		79</div><div class='del'>-#define IRQ_DA830_T12CMPINT6_0		80</div><div class='del'>-#define IRQ_DA830_T12CMPINT7_0		81</div><div class='del'>-#define IRQ_DA830_T12CMPINT0_1		82</div><div class='del'>-#define IRQ_DA830_T12CMPINT1_1		83</div><div class='del'>-#define IRQ_DA830_T12CMPINT2_1		84</div><div class='del'>-#define IRQ_DA830_T12CMPINT3_1		85</div><div class='del'>-#define IRQ_DA830_T12CMPINT4_1		86</div><div class='del'>-#define IRQ_DA830_T12CMPINT5_1		87</div><div class='del'>-#define IRQ_DA830_T12CMPINT6_1		88</div><div class='del'>-#define IRQ_DA830_T12CMPINT7_1		89</div><div class='del'>-</div><div class='del'>-#define DA830_N_CP_INTC_IRQ		96</div><div class='del'>-</div><div class='ctx'> /* DA850 speicific interrupts */</div><div class='ctx'> #define IRQ_DA850_MPUADDRERR0		27</div><div class='ctx'> #define IRQ_DA850_MPUPROTERR0		27</div><div class='head'>diff --git a/arch/arm/mach-davinci/mux.h b/arch/arm/mach-davinci/mux.h<br/>index 05fd3902df65..6325ea5a2730 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/mux.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/mux.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/mux.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/mux.h</a></div><div class='hunk'>@@ -21,410 +21,6 @@ struct mux_config {</div><div class='ctx'> 	bool debug;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum da830_index {</div><div class='del'>-	DA830_GPIO7_14,</div><div class='del'>-	DA830_RTCK,</div><div class='del'>-	DA830_GPIO7_15,</div><div class='del'>-	DA830_EMU_0,</div><div class='del'>-	DA830_EMB_SDCKE,</div><div class='del'>-	DA830_EMB_CLK_GLUE,</div><div class='del'>-	DA830_EMB_CLK,</div><div class='del'>-	DA830_NEMB_CS_0,</div><div class='del'>-	DA830_NEMB_CAS,</div><div class='del'>-	DA830_NEMB_RAS,</div><div class='del'>-	DA830_NEMB_WE,</div><div class='del'>-	DA830_EMB_BA_1,</div><div class='del'>-	DA830_EMB_BA_0,</div><div class='del'>-	DA830_EMB_A_0,</div><div class='del'>-	DA830_EMB_A_1,</div><div class='del'>-	DA830_EMB_A_2,</div><div class='del'>-	DA830_EMB_A_3,</div><div class='del'>-	DA830_EMB_A_4,</div><div class='del'>-	DA830_EMB_A_5,</div><div class='del'>-	DA830_GPIO7_0,</div><div class='del'>-	DA830_GPIO7_1,</div><div class='del'>-	DA830_GPIO7_2,</div><div class='del'>-	DA830_GPIO7_3,</div><div class='del'>-	DA830_GPIO7_4,</div><div class='del'>-	DA830_GPIO7_5,</div><div class='del'>-	DA830_GPIO7_6,</div><div class='del'>-	DA830_GPIO7_7,</div><div class='del'>-	DA830_EMB_A_6,</div><div class='del'>-	DA830_EMB_A_7,</div><div class='del'>-	DA830_EMB_A_8,</div><div class='del'>-	DA830_EMB_A_9,</div><div class='del'>-	DA830_EMB_A_10,</div><div class='del'>-	DA830_EMB_A_11,</div><div class='del'>-	DA830_EMB_A_12,</div><div class='del'>-	DA830_EMB_D_31,</div><div class='del'>-	DA830_GPIO7_8,</div><div class='del'>-	DA830_GPIO7_9,</div><div class='del'>-	DA830_GPIO7_10,</div><div class='del'>-	DA830_GPIO7_11,</div><div class='del'>-	DA830_GPIO7_12,</div><div class='del'>-	DA830_GPIO7_13,</div><div class='del'>-	DA830_GPIO3_13,</div><div class='del'>-	DA830_EMB_D_30,</div><div class='del'>-	DA830_EMB_D_29,</div><div class='del'>-	DA830_EMB_D_28,</div><div class='del'>-	DA830_EMB_D_27,</div><div class='del'>-	DA830_EMB_D_26,</div><div class='del'>-	DA830_EMB_D_25,</div><div class='del'>-	DA830_EMB_D_24,</div><div class='del'>-	DA830_EMB_D_23,</div><div class='del'>-	DA830_EMB_D_22,</div><div class='del'>-	DA830_EMB_D_21,</div><div class='del'>-	DA830_EMB_D_20,</div><div class='del'>-	DA830_EMB_D_19,</div><div class='del'>-	DA830_EMB_D_18,</div><div class='del'>-	DA830_EMB_D_17,</div><div class='del'>-	DA830_EMB_D_16,</div><div class='del'>-	DA830_NEMB_WE_DQM_3,</div><div class='del'>-	DA830_NEMB_WE_DQM_2,</div><div class='del'>-	DA830_EMB_D_0,</div><div class='del'>-	DA830_EMB_D_1,</div><div class='del'>-	DA830_EMB_D_2,</div><div class='del'>-	DA830_EMB_D_3,</div><div class='del'>-	DA830_EMB_D_4,</div><div class='del'>-	DA830_EMB_D_5,</div><div class='del'>-	DA830_EMB_D_6,</div><div class='del'>-	DA830_GPIO6_0,</div><div class='del'>-	DA830_GPIO6_1,</div><div class='del'>-	DA830_GPIO6_2,</div><div class='del'>-	DA830_GPIO6_3,</div><div class='del'>-	DA830_GPIO6_4,</div><div class='del'>-	DA830_GPIO6_5,</div><div class='del'>-	DA830_GPIO6_6,</div><div class='del'>-	DA830_EMB_D_7,</div><div class='del'>-	DA830_EMB_D_8,</div><div class='del'>-	DA830_EMB_D_9,</div><div class='del'>-	DA830_EMB_D_10,</div><div class='del'>-	DA830_EMB_D_11,</div><div class='del'>-	DA830_EMB_D_12,</div><div class='del'>-	DA830_EMB_D_13,</div><div class='del'>-	DA830_EMB_D_14,</div><div class='del'>-	DA830_GPIO6_7,</div><div class='del'>-	DA830_GPIO6_8,</div><div class='del'>-	DA830_GPIO6_9,</div><div class='del'>-	DA830_GPIO6_10,</div><div class='del'>-	DA830_GPIO6_11,</div><div class='del'>-	DA830_GPIO6_12,</div><div class='del'>-	DA830_GPIO6_13,</div><div class='del'>-	DA830_GPIO6_14,</div><div class='del'>-	DA830_EMB_D_15,</div><div class='del'>-	DA830_NEMB_WE_DQM_1,</div><div class='del'>-	DA830_NEMB_WE_DQM_0,</div><div class='del'>-	DA830_SPI0_SOMI_0,</div><div class='del'>-	DA830_SPI0_SIMO_0,</div><div class='del'>-	DA830_SPI0_CLK,</div><div class='del'>-	DA830_NSPI0_ENA,</div><div class='del'>-	DA830_NSPI0_SCS_0,</div><div class='del'>-	DA830_EQEP0I,</div><div class='del'>-	DA830_EQEP0S,</div><div class='del'>-	DA830_EQEP1I,</div><div class='del'>-	DA830_NUART0_CTS,</div><div class='del'>-	DA830_NUART0_RTS,</div><div class='del'>-	DA830_EQEP0A,</div><div class='del'>-	DA830_EQEP0B,</div><div class='del'>-	DA830_GPIO6_15,</div><div class='del'>-	DA830_GPIO5_14,</div><div class='del'>-	DA830_GPIO5_15,</div><div class='del'>-	DA830_GPIO5_0,</div><div class='del'>-	DA830_GPIO5_1,</div><div class='del'>-	DA830_GPIO5_2,</div><div class='del'>-	DA830_GPIO5_3,</div><div class='del'>-	DA830_GPIO5_4,</div><div class='del'>-	DA830_SPI1_SOMI_0,</div><div class='del'>-	DA830_SPI1_SIMO_0,</div><div class='del'>-	DA830_SPI1_CLK,</div><div class='del'>-	DA830_UART0_RXD,</div><div class='del'>-	DA830_UART0_TXD,</div><div class='del'>-	DA830_AXR1_10,</div><div class='del'>-	DA830_AXR1_11,</div><div class='del'>-	DA830_NSPI1_ENA,</div><div class='del'>-	DA830_I2C1_SCL,</div><div class='del'>-	DA830_I2C1_SDA,</div><div class='del'>-	DA830_EQEP1S,</div><div class='del'>-	DA830_I2C0_SDA,</div><div class='del'>-	DA830_I2C0_SCL,</div><div class='del'>-	DA830_UART2_RXD,</div><div class='del'>-	DA830_TM64P0_IN12,</div><div class='del'>-	DA830_TM64P0_OUT12,</div><div class='del'>-	DA830_GPIO5_5,</div><div class='del'>-	DA830_GPIO5_6,</div><div class='del'>-	DA830_GPIO5_7,</div><div class='del'>-	DA830_GPIO5_8,</div><div class='del'>-	DA830_GPIO5_9,</div><div class='del'>-	DA830_GPIO5_10,</div><div class='del'>-	DA830_GPIO5_11,</div><div class='del'>-	DA830_GPIO5_12,</div><div class='del'>-	DA830_NSPI1_SCS_0,</div><div class='del'>-	DA830_USB0_DRVVBUS,</div><div class='del'>-	DA830_AHCLKX0,</div><div class='del'>-	DA830_ACLKX0,</div><div class='del'>-	DA830_AFSX0,</div><div class='del'>-	DA830_AHCLKR0,</div><div class='del'>-	DA830_ACLKR0,</div><div class='del'>-	DA830_AFSR0,</div><div class='del'>-	DA830_UART2_TXD,</div><div class='del'>-	DA830_AHCLKX2,</div><div class='del'>-	DA830_ECAP0_APWM0,</div><div class='del'>-	DA830_RMII_MHZ_50_CLK,</div><div class='del'>-	DA830_ECAP1_APWM1,</div><div class='del'>-	DA830_USB_REFCLKIN,</div><div class='del'>-	DA830_GPIO5_13,</div><div class='del'>-	DA830_GPIO4_15,</div><div class='del'>-	DA830_GPIO2_11,</div><div class='del'>-	DA830_GPIO2_12,</div><div class='del'>-	DA830_GPIO2_13,</div><div class='del'>-	DA830_GPIO2_14,</div><div class='del'>-	DA830_GPIO2_15,</div><div class='del'>-	DA830_GPIO3_12,</div><div class='del'>-	DA830_AMUTE0,</div><div class='del'>-	DA830_AXR0_0,</div><div class='del'>-	DA830_AXR0_1,</div><div class='del'>-	DA830_AXR0_2,</div><div class='del'>-	DA830_AXR0_3,</div><div class='del'>-	DA830_AXR0_4,</div><div class='del'>-	DA830_AXR0_5,</div><div class='del'>-	DA830_AXR0_6,</div><div class='del'>-	DA830_RMII_TXD_0,</div><div class='del'>-	DA830_RMII_TXD_1,</div><div class='del'>-	DA830_RMII_TXEN,</div><div class='del'>-	DA830_RMII_CRS_DV,</div><div class='del'>-	DA830_RMII_RXD_0,</div><div class='del'>-	DA830_RMII_RXD_1,</div><div class='del'>-	DA830_RMII_RXER,</div><div class='del'>-	DA830_AFSR2,</div><div class='del'>-	DA830_ACLKX2,</div><div class='del'>-	DA830_AXR2_3,</div><div class='del'>-	DA830_AXR2_2,</div><div class='del'>-	DA830_AXR2_1,</div><div class='del'>-	DA830_AFSX2,</div><div class='del'>-	DA830_ACLKR2,</div><div class='del'>-	DA830_NRESETOUT,</div><div class='del'>-	DA830_GPIO3_0,</div><div class='del'>-	DA830_GPIO3_1,</div><div class='del'>-	DA830_GPIO3_2,</div><div class='del'>-	DA830_GPIO3_3,</div><div class='del'>-	DA830_GPIO3_4,</div><div class='del'>-	DA830_GPIO3_5,</div><div class='del'>-	DA830_GPIO3_6,</div><div class='del'>-	DA830_AXR0_7,</div><div class='del'>-	DA830_AXR0_8,</div><div class='del'>-	DA830_UART1_RXD,</div><div class='del'>-	DA830_UART1_TXD,</div><div class='del'>-	DA830_AXR0_11,</div><div class='del'>-	DA830_AHCLKX1,</div><div class='del'>-	DA830_ACLKX1,</div><div class='del'>-	DA830_AFSX1,</div><div class='del'>-	DA830_MDIO_CLK,</div><div class='del'>-	DA830_MDIO_D,</div><div class='del'>-	DA830_AXR0_9,</div><div class='del'>-	DA830_AXR0_10,</div><div class='del'>-	DA830_EPWM0B,</div><div class='del'>-	DA830_EPWM0A,</div><div class='del'>-	DA830_EPWMSYNCI,</div><div class='del'>-	DA830_AXR2_0,</div><div class='del'>-	DA830_EPWMSYNC0,</div><div class='del'>-	DA830_GPIO3_7,</div><div class='del'>-	DA830_GPIO3_8,</div><div class='del'>-	DA830_GPIO3_9,</div><div class='del'>-	DA830_GPIO3_10,</div><div class='del'>-	DA830_GPIO3_11,</div><div class='del'>-	DA830_GPIO3_14,</div><div class='del'>-	DA830_GPIO3_15,</div><div class='del'>-	DA830_GPIO4_10,</div><div class='del'>-	DA830_AHCLKR1,</div><div class='del'>-	DA830_ACLKR1,</div><div class='del'>-	DA830_AFSR1,</div><div class='del'>-	DA830_AMUTE1,</div><div class='del'>-	DA830_AXR1_0,</div><div class='del'>-	DA830_AXR1_1,</div><div class='del'>-	DA830_AXR1_2,</div><div class='del'>-	DA830_AXR1_3,</div><div class='del'>-	DA830_ECAP2_APWM2,</div><div class='del'>-	DA830_EHRPWMGLUETZ,</div><div class='del'>-	DA830_EQEP1A,</div><div class='del'>-	DA830_GPIO4_11,</div><div class='del'>-	DA830_GPIO4_12,</div><div class='del'>-	DA830_GPIO4_13,</div><div class='del'>-	DA830_GPIO4_14,</div><div class='del'>-	DA830_GPIO4_0,</div><div class='del'>-	DA830_GPIO4_1,</div><div class='del'>-	DA830_GPIO4_2,</div><div class='del'>-	DA830_GPIO4_3,</div><div class='del'>-	DA830_AXR1_4,</div><div class='del'>-	DA830_AXR1_5,</div><div class='del'>-	DA830_AXR1_6,</div><div class='del'>-	DA830_AXR1_7,</div><div class='del'>-	DA830_AXR1_8,</div><div class='del'>-	DA830_AXR1_9,</div><div class='del'>-	DA830_EMA_D_0,</div><div class='del'>-	DA830_EMA_D_1,</div><div class='del'>-	DA830_EQEP1B,</div><div class='del'>-	DA830_EPWM2B,</div><div class='del'>-	DA830_EPWM2A,</div><div class='del'>-	DA830_EPWM1B,</div><div class='del'>-	DA830_EPWM1A,</div><div class='del'>-	DA830_MMCSD_DAT_0,</div><div class='del'>-	DA830_MMCSD_DAT_1,</div><div class='del'>-	DA830_UHPI_HD_0,</div><div class='del'>-	DA830_UHPI_HD_1,</div><div class='del'>-	DA830_GPIO4_4,</div><div class='del'>-	DA830_GPIO4_5,</div><div class='del'>-	DA830_GPIO4_6,</div><div class='del'>-	DA830_GPIO4_7,</div><div class='del'>-	DA830_GPIO4_8,</div><div class='del'>-	DA830_GPIO4_9,</div><div class='del'>-	DA830_GPIO0_0,</div><div class='del'>-	DA830_GPIO0_1,</div><div class='del'>-	DA830_EMA_D_2,</div><div class='del'>-	DA830_EMA_D_3,</div><div class='del'>-	DA830_EMA_D_4,</div><div class='del'>-	DA830_EMA_D_5,</div><div class='del'>-	DA830_EMA_D_6,</div><div class='del'>-	DA830_EMA_D_7,</div><div class='del'>-	DA830_EMA_D_8,</div><div class='del'>-	DA830_EMA_D_9,</div><div class='del'>-	DA830_MMCSD_DAT_2,</div><div class='del'>-	DA830_MMCSD_DAT_3,</div><div class='del'>-	DA830_MMCSD_DAT_4,</div><div class='del'>-	DA830_MMCSD_DAT_5,</div><div class='del'>-	DA830_MMCSD_DAT_6,</div><div class='del'>-	DA830_MMCSD_DAT_7,</div><div class='del'>-	DA830_UHPI_HD_8,</div><div class='del'>-	DA830_UHPI_HD_9,</div><div class='del'>-	DA830_UHPI_HD_2,</div><div class='del'>-	DA830_UHPI_HD_3,</div><div class='del'>-	DA830_UHPI_HD_4,</div><div class='del'>-	DA830_UHPI_HD_5,</div><div class='del'>-	DA830_UHPI_HD_6,</div><div class='del'>-	DA830_UHPI_HD_7,</div><div class='del'>-	DA830_LCD_D_8,</div><div class='del'>-	DA830_LCD_D_9,</div><div class='del'>-	DA830_GPIO0_2,</div><div class='del'>-	DA830_GPIO0_3,</div><div class='del'>-	DA830_GPIO0_4,</div><div class='del'>-	DA830_GPIO0_5,</div><div class='del'>-	DA830_GPIO0_6,</div><div class='del'>-	DA830_GPIO0_7,</div><div class='del'>-	DA830_GPIO0_8,</div><div class='del'>-	DA830_GPIO0_9,</div><div class='del'>-	DA830_EMA_D_10,</div><div class='del'>-	DA830_EMA_D_11,</div><div class='del'>-	DA830_EMA_D_12,</div><div class='del'>-	DA830_EMA_D_13,</div><div class='del'>-	DA830_EMA_D_14,</div><div class='del'>-	DA830_EMA_D_15,</div><div class='del'>-	DA830_EMA_A_0,</div><div class='del'>-	DA830_EMA_A_1,</div><div class='del'>-	DA830_UHPI_HD_10,</div><div class='del'>-	DA830_UHPI_HD_11,</div><div class='del'>-	DA830_UHPI_HD_12,</div><div class='del'>-	DA830_UHPI_HD_13,</div><div class='del'>-	DA830_UHPI_HD_14,</div><div class='del'>-	DA830_UHPI_HD_15,</div><div class='del'>-	DA830_LCD_D_7,</div><div class='del'>-	DA830_MMCSD_CLK,</div><div class='del'>-	DA830_LCD_D_10,</div><div class='del'>-	DA830_LCD_D_11,</div><div class='del'>-	DA830_LCD_D_12,</div><div class='del'>-	DA830_LCD_D_13,</div><div class='del'>-	DA830_LCD_D_14,</div><div class='del'>-	DA830_LCD_D_15,</div><div class='del'>-	DA830_UHPI_HCNTL0,</div><div class='del'>-	DA830_GPIO0_10,</div><div class='del'>-	DA830_GPIO0_11,</div><div class='del'>-	DA830_GPIO0_12,</div><div class='del'>-	DA830_GPIO0_13,</div><div class='del'>-	DA830_GPIO0_14,</div><div class='del'>-	DA830_GPIO0_15,</div><div class='del'>-	DA830_GPIO1_0,</div><div class='del'>-	DA830_GPIO1_1,</div><div class='del'>-	DA830_EMA_A_2,</div><div class='del'>-	DA830_EMA_A_3,</div><div class='del'>-	DA830_EMA_A_4,</div><div class='del'>-	DA830_EMA_A_5,</div><div class='del'>-	DA830_EMA_A_6,</div><div class='del'>-	DA830_EMA_A_7,</div><div class='del'>-	DA830_EMA_A_8,</div><div class='del'>-	DA830_EMA_A_9,</div><div class='del'>-	DA830_MMCSD_CMD,</div><div class='del'>-	DA830_LCD_D_6,</div><div class='del'>-	DA830_LCD_D_3,</div><div class='del'>-	DA830_LCD_D_2,</div><div class='del'>-	DA830_LCD_D_1,</div><div class='del'>-	DA830_LCD_D_0,</div><div class='del'>-	DA830_LCD_PCLK,</div><div class='del'>-	DA830_LCD_HSYNC,</div><div class='del'>-	DA830_UHPI_HCNTL1,</div><div class='del'>-	DA830_GPIO1_2,</div><div class='del'>-	DA830_GPIO1_3,</div><div class='del'>-	DA830_GPIO1_4,</div><div class='del'>-	DA830_GPIO1_5,</div><div class='del'>-	DA830_GPIO1_6,</div><div class='del'>-	DA830_GPIO1_7,</div><div class='del'>-	DA830_GPIO1_8,</div><div class='del'>-	DA830_GPIO1_9,</div><div class='del'>-	DA830_EMA_A_10,</div><div class='del'>-	DA830_EMA_A_11,</div><div class='del'>-	DA830_EMA_A_12,</div><div class='del'>-	DA830_EMA_BA_1,</div><div class='del'>-	DA830_EMA_BA_0,</div><div class='del'>-	DA830_EMA_CLK,</div><div class='del'>-	DA830_EMA_SDCKE,</div><div class='del'>-	DA830_NEMA_CAS,</div><div class='del'>-	DA830_LCD_VSYNC,</div><div class='del'>-	DA830_NLCD_AC_ENB_CS,</div><div class='del'>-	DA830_LCD_MCLK,</div><div class='del'>-	DA830_LCD_D_5,</div><div class='del'>-	DA830_LCD_D_4,</div><div class='del'>-	DA830_OBSCLK,</div><div class='del'>-	DA830_NEMA_CS_4,</div><div class='del'>-	DA830_UHPI_HHWIL,</div><div class='del'>-	DA830_AHCLKR2,</div><div class='del'>-	DA830_GPIO1_10,</div><div class='del'>-	DA830_GPIO1_11,</div><div class='del'>-	DA830_GPIO1_12,</div><div class='del'>-	DA830_GPIO1_13,</div><div class='del'>-	DA830_GPIO1_14,</div><div class='del'>-	DA830_GPIO1_15,</div><div class='del'>-	DA830_GPIO2_0,</div><div class='del'>-	DA830_GPIO2_1,</div><div class='del'>-	DA830_NEMA_RAS,</div><div class='del'>-	DA830_NEMA_WE,</div><div class='del'>-	DA830_NEMA_CS_0,</div><div class='del'>-	DA830_NEMA_CS_2,</div><div class='del'>-	DA830_NEMA_CS_3,</div><div class='del'>-	DA830_NEMA_OE,</div><div class='del'>-	DA830_NEMA_WE_DQM_1,</div><div class='del'>-	DA830_NEMA_WE_DQM_0,</div><div class='del'>-	DA830_NEMA_CS_5,</div><div class='del'>-	DA830_UHPI_HRNW,</div><div class='del'>-	DA830_NUHPI_HAS,</div><div class='del'>-	DA830_NUHPI_HCS,</div><div class='del'>-	DA830_NUHPI_HDS1,</div><div class='del'>-	DA830_NUHPI_HDS2,</div><div class='del'>-	DA830_NUHPI_HINT,</div><div class='del'>-	DA830_AXR0_12,</div><div class='del'>-	DA830_AMUTE2,</div><div class='del'>-	DA830_AXR0_13,</div><div class='del'>-	DA830_AXR0_14,</div><div class='del'>-	DA830_AXR0_15,</div><div class='del'>-	DA830_GPIO2_2,</div><div class='del'>-	DA830_GPIO2_3,</div><div class='del'>-	DA830_GPIO2_4,</div><div class='del'>-	DA830_GPIO2_5,</div><div class='del'>-	DA830_GPIO2_6,</div><div class='del'>-	DA830_GPIO2_7,</div><div class='del'>-	DA830_GPIO2_8,</div><div class='del'>-	DA830_GPIO2_9,</div><div class='del'>-	DA830_EMA_WAIT_0,</div><div class='del'>-	DA830_NUHPI_HRDY,</div><div class='del'>-	DA830_GPIO2_10,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum davinci_da850_index {</div><div class='ctx'> 	/* UART0 function */</div><div class='ctx'> 	DA850_NUART0_CTS,</div><div class='head'>diff --git a/arch/arm/mach-davinci/psc.h b/arch/arm/mach-davinci/psc.h<br/>index acfef063295f..6c365a2e87fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/psc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-davinci/psc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-davinci/psc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-davinci/psc.h</a></div><div class='hunk'>@@ -97,9 +97,7 @@</div><div class='ctx'> #define DA8XX_LPSC1_CPGMAC		5</div><div class='ctx'> #define DA8XX_LPSC1_EMIF3C		6</div><div class='ctx'> #define DA8XX_LPSC1_McASP0		7</div><div class='del'>-#define DA830_LPSC1_McASP1		8</div><div class='ctx'> #define DA850_LPSC1_SATA		8</div><div class='del'>-#define DA830_LPSC1_McASP2		9</div><div class='ctx'> #define DA850_LPSC1_VPIF		9</div><div class='ctx'> #define DA8XX_LPSC1_SPI1		10</div><div class='ctx'> #define DA8XX_LPSC1_I2C			11</div><div class='hunk'>@@ -111,7 +109,6 @@</div><div class='ctx'> #define DA8XX_LPSC1_PWM			17</div><div class='ctx'> #define DA850_LPSC1_MMC_SD1		18</div><div class='ctx'> #define DA8XX_LPSC1_ECAP		20</div><div class='del'>-#define DA830_LPSC1_EQEP		21</div><div class='ctx'> #define DA850_LPSC1_TPTC2		21</div><div class='ctx'> #define DA8XX_LPSC1_SCR_P0_SS		24</div><div class='ctx'> #define DA8XX_LPSC1_SCR_P1_SS		25</div><div class='head'>diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c<br/>index cac4e82f6c82..150a1e56dcae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-exynos/suspend.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-exynos/suspend.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-exynos/suspend.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-exynos/suspend.c</a></div><div class='hunk'>@@ -209,9 +209,8 @@ static int __init exynos_pmu_irq_init(struct device_node *node,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, 0,</div><div class='del'>-					  node, &amp;exynos_pmu_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, 0, of_fwnode_handle(node),</div><div class='add'>+					     &amp;exynos_pmu_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(pmu_base_addr);</div><div class='ctx'> 		pmu_base_addr = NULL;</div><div class='head'>diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c<br/>index f8920d0010de..6521ab3d24fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-footbridge/dc21285.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-footbridge/dc21285.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-footbridge/dc21285.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-footbridge/dc21285.c</a></div><div class='hunk'>@@ -135,7 +135,7 @@ static struct timer_list perr_timer;</div><div class='ctx'> </div><div class='ctx'> static void dc21285_enable_error(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	del_timer(timer);</div><div class='add'>+	timer_delete(timer);</div><div class='ctx'> </div><div class='ctx'> 	if (timer == &amp;serr_timer)</div><div class='ctx'> 		enable_irq(IRQ_PCI_SERR);</div><div class='head'>diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c<br/>index 5d4f977ac7d2..47335c7dadf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-highbank/highbank.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-highbank/highbank.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-highbank/highbank.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-highbank/highbank.c</a></div><div class='hunk'>@@ -143,7 +143,7 @@ static void __init highbank_init(void)</div><div class='ctx'> 	sregs_base = of_iomap(np, 0);</div><div class='ctx'> 	WARN_ON(!sregs_base);</div><div class='ctx'> </div><div class='del'>-	pm_power_off = highbank_power_off;</div><div class='add'>+	register_platform_power_off(highbank_power_off);</div><div class='ctx'> 	highbank_pm_init();</div><div class='ctx'> </div><div class='ctx'> 	bus_register_notifier(&amp;platform_bus_type, &amp;highbank_platform_nb);</div><div class='head'>diff --git a/arch/arm/mach-hpe/Kconfig b/arch/arm/mach-hpe/Kconfig<br/>deleted file mode 100644<br/>index 3372bbf38d38..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-hpe/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-menuconfig ARCH_HPE</div><div class='del'>-	bool "HPE SoC support"</div><div class='del'>-	depends on ARCH_MULTI_V7</div><div class='del'>-	help</div><div class='del'>-	  This enables support for HPE ARM based BMC chips.</div><div class='del'>-if ARCH_HPE</div><div class='del'>-</div><div class='del'>-config ARCH_HPE_GXP</div><div class='del'>-	bool "HPE GXP SoC"</div><div class='del'>-	depends on ARCH_MULTI_V7</div><div class='del'>-	select ARM_VIC</div><div class='del'>-	select GENERIC_IRQ_CHIP</div><div class='del'>-	select CLKSRC_MMIO</div><div class='del'>-	help</div><div class='del'>-	  HPE GXP is the name of the HPE Soc. This SoC is used to implement many</div><div class='del'>-	  BMC features at HPE. It supports ARMv7 architecture based on the Cortex</div><div class='del'>-	  A9 core. It is capable of using an AXI bus to which a memory controller</div><div class='del'>-	  is attached. It has multiple SPI interfaces to connect boot flash and</div><div class='del'>-	  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It</div><div class='del'>-	  has multiple i2c engines to drive connectivity with a host</div><div class='del'>-	  infrastructure.</div><div class='del'>-</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile<br/>deleted file mode 100644<br/>index 8b0a91234df4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-hpe/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-obj-$(CONFIG_ARCH_HPE_GXP) += gxp.o</div><div class='head'>diff --git a/arch/arm/mach-hpe/gxp.c b/arch/arm/mach-hpe/gxp.c<br/>deleted file mode 100644<br/>index 581c8da517b8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-hpe/gxp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-hpe/gxp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-static const char * const gxp_board_dt_compat[] = {</div><div class='del'>-	"hpe,gxp",</div><div class='del'>-	NULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DT_MACHINE_START(GXP_DT, "HPE GXP")</div><div class='del'>-	.dt_compat	= gxp_board_dt_compat,</div><div class='del'>-	.l2c_aux_val = 0,</div><div class='del'>-	.l2c_aux_mask = ~0,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig<br/>index ab767f059929..6ea1bd55acf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/Kconfig</a></div><div class='hunk'>@@ -49,7 +49,6 @@ config SOC_IMX31</div><div class='ctx'> config SOC_IMX35</div><div class='ctx'> 	bool "i.MX35 support"</div><div class='ctx'> 	select MXC_AVIC</div><div class='del'>-	select PINCTRL_IMX35</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX35 processor</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +60,6 @@ config SOC_IMX1</div><div class='ctx'> 	bool "i.MX1 support"</div><div class='ctx'> 	select CPU_ARM920T</div><div class='ctx'> 	select MXC_AVIC</div><div class='del'>-	select PINCTRL_IMX1</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX1 processor</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +71,6 @@ config SOC_IMX25</div><div class='ctx'> 	bool "i.MX25 support"</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select MXC_AVIC</div><div class='del'>-	select PINCTRL_IMX25</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX25 processor</div><div class='ctx'> </div><div class='hunk'>@@ -81,7 +78,6 @@ config SOC_IMX27</div><div class='ctx'> 	bool "i.MX27 support"</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select MXC_AVIC</div><div class='del'>-	select PINCTRL_IMX27</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX27 processor</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +94,6 @@ config SOC_IMX5</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX50</div><div class='ctx'> 	bool "i.MX50 support"</div><div class='del'>-	select PINCTRL_IMX50</div><div class='ctx'> 	select SOC_IMX5</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -106,14 +101,12 @@ config SOC_IMX50</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX51</div><div class='ctx'> 	bool "i.MX51 support"</div><div class='del'>-	select PINCTRL_IMX51</div><div class='ctx'> 	select SOC_IMX5</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale i.MX51 processor</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX53</div><div class='ctx'> 	bool "i.MX53 support"</div><div class='del'>-	select PINCTRL_IMX53</div><div class='ctx'> 	select SOC_IMX5</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -137,7 +130,6 @@ config SOC_IMX6Q</div><div class='ctx'> 	select ARM_ERRATA_775420</div><div class='ctx'> 	select HAVE_ARM_SCU if SMP</div><div class='ctx'> 	select HAVE_ARM_TWD</div><div class='del'>-	select PINCTRL_IMX6Q</div><div class='ctx'> 	select SOC_IMX6</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -147,7 +139,6 @@ config SOC_IMX6SL</div><div class='ctx'> 	bool "i.MX6 SoloLite support"</div><div class='ctx'> 	select ARM_ERRATA_754322</div><div class='ctx'> 	select ARM_ERRATA_775420</div><div class='del'>-	select PINCTRL_IMX6SL</div><div class='ctx'> 	select SOC_IMX6</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -157,7 +148,6 @@ config SOC_IMX6SLL</div><div class='ctx'> 	bool "i.MX6 SoloLiteLite support"</div><div class='ctx'> 	select ARM_ERRATA_754322</div><div class='ctx'> 	select ARM_ERRATA_775420</div><div class='del'>-	select PINCTRL_IMX6SLL</div><div class='ctx'> 	select SOC_IMX6</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -167,7 +157,6 @@ config SOC_IMX6SX</div><div class='ctx'> 	bool "i.MX6 SoloX support"</div><div class='ctx'> 	select ARM_ERRATA_754322</div><div class='ctx'> 	select ARM_ERRATA_775420</div><div class='del'>-	select PINCTRL_IMX6SX</div><div class='ctx'> 	select SOC_IMX6</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='hunk'>@@ -175,7 +164,6 @@ config SOC_IMX6SX</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX6UL</div><div class='ctx'> 	bool "i.MX6 UltraLite support"</div><div class='del'>-	select PINCTRL_IMX6UL</div><div class='ctx'> 	select SOC_IMX6</div><div class='ctx'> 	select ARM_ERRATA_814220</div><div class='ctx'> </div><div class='hunk'>@@ -211,7 +199,6 @@ config SOC_IMX7D_CM4</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX7D</div><div class='ctx'> 	bool "i.MX7 Dual support"</div><div class='del'>-	select PINCTRL_IMX7D</div><div class='ctx'> 	select SOC_IMX7D_CA7 if ARCH_MULTI_V7</div><div class='ctx'> 	select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M</div><div class='ctx'> 	select ARM_ERRATA_814220 if ARCH_MULTI_V7</div><div class='hunk'>@@ -221,7 +208,6 @@ config SOC_IMX7D</div><div class='ctx'> config SOC_IMX7ULP</div><div class='ctx'> 	bool "i.MX7ULP support"</div><div class='ctx'> 	select CLKSRC_IMX_TPM</div><div class='del'>-	select PINCTRL_IMX7ULP</div><div class='ctx'> 	select SOC_IMX7D_CA7 if ARCH_MULTI_V7</div><div class='ctx'> 	select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M</div><div class='ctx'> 	help</div><div class='hunk'>@@ -237,7 +223,6 @@ config SOC_IMXRT</div><div class='ctx'> config SOC_VF610</div><div class='ctx'> 	bool "Vybrid Family VF610 support"</div><div class='ctx'> 	select ARM_GIC if ARCH_MULTI_V7</div><div class='del'>-	select PINCTRL_VF610</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Freescale Vybrid VF610 processor.</div><div class='hunk'>@@ -257,7 +242,7 @@ choice</div><div class='ctx'> </div><div class='ctx'> 	config VF_USE_PIT_TIMER</div><div class='ctx'> 		bool "Use PIT timer"</div><div class='del'>-		select VF_PIT_TIMER</div><div class='add'>+		select NXP_PIT_TIMER</div><div class='ctx'> 		help</div><div class='ctx'> 		  Use SoC Periodic Interrupt Timer (PIT) as clocksource</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c<br/>index cf6546ddc7a3..3067c06b4b8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/avic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/avic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/avic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/avic.c</a></div><div class='hunk'>@@ -201,8 +201,8 @@ static void __init mxc_init_irq(void __iomem *irqbase)</div><div class='ctx'> 	WARN_ON(irq_base &lt; 0);</div><div class='ctx'> </div><div class='ctx'> 	np = of_find_compatible_node(NULL, NULL, "fsl,avic");</div><div class='del'>-	domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(np), AVIC_NUM_IRQS, irq_base, 0,</div><div class='add'>+					  &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	WARN_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; AVIC_NUM_IRQS / 32; i++, irq_base += 32)</div><div class='head'>diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h<br/>index 13f3068e9845..45c1a2a7b35f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/common.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/common.h</a></div><div class='hunk'>@@ -98,7 +98,7 @@ extern const u32 imx53_suspend_sz;</div><div class='ctx'> void imx6_suspend(void __iomem *ocram_vbase);</div><div class='ctx'> #else</div><div class='ctx'> static inline void imx53_suspend(void __iomem *ocram_vbase) {}</div><div class='del'>-static const u32 imx53_suspend_sz;</div><div class='add'>+static __maybe_unused const u32 imx53_suspend_sz;</div><div class='ctx'> static inline void imx6_suspend(void __iomem *ocram_vbase) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c<br/>index 5909088d5482..2e633569d2f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/gpc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/gpc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/gpc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/gpc.c</a></div><div class='hunk'>@@ -245,9 +245,8 @@ static int __init imx_gpc_init(struct device_node *node,</div><div class='ctx'> 	if (WARN_ON(!gpc_base))</div><div class='ctx'> 	        return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS,</div><div class='del'>-					  node, &amp;imx_gpc_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, GPC_MAX_IRQS, of_fwnode_handle(node),</div><div class='add'>+					     &amp;imx_gpc_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(gpc_base);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c<br/>index b68cb86dbe4c..94e4f4a2f73f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/mmdc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/mmdc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/mmdc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/mmdc.c</a></div><div class='hunk'>@@ -509,9 +509,8 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b</div><div class='ctx'> 	pmu_mmdc-&gt;mmdc_ipg_clk = mmdc_ipg_clk;</div><div class='ctx'> 	pmu_mmdc-&gt;devtype_data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;pmu_mmdc-&gt;hrtimer, CLOCK_MONOTONIC,</div><div class='del'>-			HRTIMER_MODE_REL);</div><div class='del'>-	pmu_mmdc-&gt;hrtimer.function = mmdc_pmu_timer_handler;</div><div class='add'>+	hrtimer_setup(&amp;pmu_mmdc-&gt;hrtimer, mmdc_pmu_timer_handler, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	cpumask_set_cpu(raw_smp_processor_id(), &amp;pmu_mmdc-&gt;cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -596,7 +595,7 @@ static struct platform_driver imx_mmdc_driver = {</div><div class='ctx'> 		.of_match_table = imx_mmdc_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= imx_mmdc_probe,</div><div class='del'>-	.remove_new	= imx_mmdc_remove,</div><div class='add'>+	.remove		= imx_mmdc_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init imx_mmdc_init(void)</div><div class='head'>diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c<br/>index b36f05b54cc7..a671ca498f88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/pm-imx6.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/pm-imx6.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/pm-imx6.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/pm-imx6.c</a></div><div class='hunk'>@@ -634,13 +634,11 @@ static void imx6_pm_stby_poweroff(void)</div><div class='ctx'> </div><div class='ctx'> static int imx6_pm_stby_poweroff_probe(void)</div><div class='ctx'> {</div><div class='del'>-	if (pm_power_off) {</div><div class='del'>-		pr_warn("%s: pm_power_off already claimed  %p %ps!\n",</div><div class='del'>-			__func__, pm_power_off, pm_power_off);</div><div class='add'>+	if (register_platform_power_off(imx6_pm_stby_poweroff)) {</div><div class='add'>+		pr_warn("%s: platform power off already claimed!\n", __func__);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_power_off = imx6_pm_stby_poweroff;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c<br/>index 8b3d98d288d9..50a5668e65d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/tzic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-imx/tzic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-imx/tzic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-imx/tzic.c</a></div><div class='hunk'>@@ -175,8 +175,8 @@ static int __init tzic_init_dt(struct device_node *np, struct device_node *p)</div><div class='ctx'> 	irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());</div><div class='ctx'> 	WARN_ON(irq_base &lt; 0);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(np), TZIC_NUM_IRQS, irq_base, 0,</div><div class='add'>+					  &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	WARN_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 4; i++, irq_base += 32)</div><div class='head'>diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig<br/>index 35a3430c7942..638eabad2dd3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-mediatek/Kconfig</a></div><div class='hunk'>@@ -15,6 +15,10 @@ config MACH_MT2701</div><div class='ctx'> 	bool "MediaTek MT2701 SoCs support"</div><div class='ctx'> 	default ARCH_MEDIATEK</div><div class='ctx'> </div><div class='add'>+config MACH_MT6572</div><div class='add'>+	bool "MediaTek MT6572 SoCs support"</div><div class='add'>+	default ARCH_MEDIATEK</div><div class='add'>+</div><div class='ctx'> config MACH_MT6589</div><div class='ctx'> 	bool "MediaTek MT6589 SoCs support"</div><div class='ctx'> 	default ARCH_MEDIATEK</div><div class='head'>diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c<br/>index e6e9f93a1f01..5c28124bd007 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/mediatek.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/mediatek.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/mediatek.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-mediatek/mediatek.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@ static void __init mediatek_timer_init(void)</div><div class='ctx'> </div><div class='ctx'> static const char * const mediatek_board_dt_compat[] = {</div><div class='ctx'> 	"mediatek,mt2701",</div><div class='add'>+	"mediatek,mt6572",</div><div class='ctx'> 	"mediatek,mt6589",</div><div class='ctx'> 	"mediatek,mt6592",</div><div class='ctx'> 	"mediatek,mt7623",</div><div class='head'>diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c<br/>index 16a4ee6c9590..bbd26d423bde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/platsmp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-mediatek/platsmp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-mediatek/platsmp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-mediatek/platsmp.c</a></div><div class='hunk'>@@ -29,6 +29,12 @@ static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = {</div><div class='ctx'> 	{ 0x3f8, 0x3f8, 0x3f8 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct mtk_smp_boot_info mtk_mt6572_boot = {</div><div class='add'>+	0x10001400, 0x08,</div><div class='add'>+	{ 0x534c4131 },</div><div class='add'>+	{ 0x0c },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct mtk_smp_boot_info mtk_mt6589_boot = {</div><div class='ctx'> 	0x10002000, 0x34,</div><div class='ctx'> 	{ 0x534c4131, 0x4c415332, 0x41534c33 },</div><div class='hunk'>@@ -49,6 +55,7 @@ static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id mtk_smp_boot_infos[] __initconst = {</div><div class='add'>+	{ .compatible   = "mediatek,mt6572", .data = &amp;mtk_mt6572_boot },</div><div class='ctx'> 	{ .compatible   = "mediatek,mt6589", .data = &amp;mtk_mt6589_boot },</div><div class='ctx'> 	{ .compatible   = "mediatek,mt7623", .data = &amp;mtk_mt7623_boot },</div><div class='ctx'> 	{ .compatible   = "mediatek,mt7629", .data = &amp;mtk_mt7623_boot },</div><div class='head'>diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig<br/>index a643b71e30a3..08ec6bd84ada 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/Kconfig</a></div><div class='hunk'>@@ -8,6 +8,7 @@ menuconfig ARCH_OMAP1</div><div class='ctx'> 	select ARCH_OMAP</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='ctx'> 	select FORCE_PCI if PCCARD</div><div class='add'>+	select GENERIC_IRQ_CHIP</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c<br/>index 0daf6c5b5c1c..16392720296c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/board-ams-delta.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/board-ams-delta.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/board-ams-delta.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/board-ams-delta.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/mtd/nand-gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/fixed.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='hunk'>@@ -175,20 +176,18 @@ static struct resource latch1_resources[] = {</div><div class='ctx'> </div><div class='ctx'> #define LATCH1_LABEL	"latch1"</div><div class='ctx'> </div><div class='del'>-static struct bgpio_pdata latch1_pdata = {</div><div class='del'>-	.label	= LATCH1_LABEL,</div><div class='del'>-	.base	= -1,</div><div class='del'>-	.ngpio	= LATCH1_NGPIO,</div><div class='add'>+static const struct property_entry latch1_gpio_props[] = {</div><div class='add'>+	PROPERTY_ENTRY_STRING("label", LATCH1_LABEL),</div><div class='add'>+	PROPERTY_ENTRY_U32("ngpios", LATCH1_NGPIO),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device latch1_gpio_device = {</div><div class='add'>+static const struct platform_device_info latch1_gpio_devinfo = {</div><div class='ctx'> 	.name		= "basic-mmio-gpio",</div><div class='ctx'> 	.id		= 0,</div><div class='del'>-	.resource	= latch1_resources,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(latch1_resources),</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;latch1_pdata,</div><div class='del'>-	},</div><div class='add'>+	.res		= latch1_resources,</div><div class='add'>+	.num_res	= ARRAY_SIZE(latch1_resources),</div><div class='add'>+	.properties	= latch1_gpio_props,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LATCH1_PIN_LED_CAMERA		0</div><div class='hunk'>@@ -213,20 +212,18 @@ static struct resource latch2_resources[] = {</div><div class='ctx'> </div><div class='ctx'> #define LATCH2_LABEL	"latch2"</div><div class='ctx'> </div><div class='del'>-static struct bgpio_pdata latch2_pdata = {</div><div class='del'>-	.label	= LATCH2_LABEL,</div><div class='del'>-	.base	= -1,</div><div class='del'>-	.ngpio	= LATCH2_NGPIO,</div><div class='add'>+static const struct property_entry latch2_gpio_props[] = {</div><div class='add'>+	PROPERTY_ENTRY_STRING("label", LATCH2_LABEL),</div><div class='add'>+	PROPERTY_ENTRY_U32("ngpios", LATCH2_NGPIO),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device latch2_gpio_device = {</div><div class='add'>+static struct platform_device_info latch2_gpio_devinfo = {</div><div class='ctx'> 	.name		= "basic-mmio-gpio",</div><div class='ctx'> 	.id		= 1,</div><div class='del'>-	.resource	= latch2_resources,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(latch2_resources),</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;latch2_pdata,</div><div class='del'>-	},</div><div class='add'>+	.res		= latch2_resources,</div><div class='add'>+	.num_res	= ARRAY_SIZE(latch2_resources),</div><div class='add'>+	.properties	= latch2_gpio_props,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LATCH2_PIN_LCD_VBLEN		0</div><div class='hunk'>@@ -542,8 +539,6 @@ static struct gpiod_lookup_table keybrd_pwr_gpio_table = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *ams_delta_devices[] __initdata = {</div><div class='del'>-	&amp;latch1_gpio_device,</div><div class='del'>-	&amp;latch2_gpio_device,</div><div class='ctx'> 	&amp;ams_delta_kp_device,</div><div class='ctx'> 	&amp;ams_delta_audio_device,</div><div class='ctx'> 	&amp;ams_delta_serio_device,</div><div class='hunk'>@@ -697,6 +692,9 @@ static void __init ams_delta_init(void)</div><div class='ctx'> 	omap1_usb_init(&amp;ams_delta_usb_config);</div><div class='ctx'> 	platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));</div><div class='ctx'> </div><div class='add'>+	platform_device_register_full(&amp;latch1_gpio_devinfo);</div><div class='add'>+	platform_device_register_full(&amp;latch2_gpio_devinfo);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * As soon as regulator consumers have been registered, assign their</div><div class='ctx'> 	 * dev_names to consumer supply entries of respective regulators.</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c<br/>index 3312ef93355d..a5bf5554800f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/board-nokia770.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/board-nokia770.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/board-nokia770.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/board-nokia770.c</a></div><div class='hunk'>@@ -289,7 +289,7 @@ static struct gpiod_lookup_table nokia770_irq_gpio_table = {</div><div class='ctx'> 		GPIO_LOOKUP("gpio-0-15", 15, "ads7846_irq",</div><div class='ctx'> 			    GPIO_ACTIVE_HIGH),</div><div class='ctx'> 		/* GPIO used for retu IRQ */</div><div class='del'>-		GPIO_LOOKUP("gpio-48-63", 15, "retu_irq",</div><div class='add'>+		GPIO_LOOKUP("gpio-48-63", 14, "retu_irq",</div><div class='ctx'> 			    GPIO_ACTIVE_HIGH),</div><div class='ctx'> 		/* GPIO used for tahvo IRQ */</div><div class='ctx'> 		GPIO_LOOKUP("gpio-32-47", 8, "tahvo_irq",</div><div class='head'>diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c<br/>index 83381e23fab9..afc6404f62d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/clock.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/clock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/clock.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/clock.c</a></div><div class='hunk'>@@ -705,14 +705,21 @@ static unsigned long omap1_clk_recalc_rate(struct clk_hw *hw, unsigned long p_ra</div><div class='ctx'> 	return clk-&gt;rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long omap1_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *p_rate)</div><div class='add'>+static int omap1_clk_determine_rate(struct clk_hw *hw,</div><div class='add'>+				    struct clk_rate_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap1_clk *clk = to_omap1_clk(hw);</div><div class='ctx'> </div><div class='del'>-	if (clk-&gt;round_rate != NULL)</div><div class='del'>-		return clk-&gt;round_rate(clk, rate, p_rate);</div><div class='add'>+	if (clk-&gt;round_rate != NULL) {</div><div class='add'>+		req-&gt;rate = clk-&gt;round_rate(clk, req-&gt;rate,</div><div class='add'>+					    &amp;req-&gt;best_parent_rate);</div><div class='ctx'> </div><div class='del'>-	return omap1_clk_recalc_rate(hw, *p_rate);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req-&gt;rate = omap1_clk_recalc_rate(hw, req-&gt;best_parent_rate);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int omap1_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate)</div><div class='hunk'>@@ -771,7 +778,7 @@ const struct clk_ops omap1_clk_gate_ops = {</div><div class='ctx'> </div><div class='ctx'> const struct clk_ops omap1_clk_rate_ops = {</div><div class='ctx'> 	.recalc_rate	= omap1_clk_recalc_rate,</div><div class='del'>-	.round_rate	= omap1_clk_round_rate,</div><div class='add'>+	.determine_rate = omap1_clk_determine_rate,</div><div class='ctx'> 	.set_rate	= omap1_clk_set_rate,</div><div class='ctx'> 	.init		= omap1_clk_init_op,</div><div class='ctx'> };</div><div class='hunk'>@@ -784,7 +791,7 @@ const struct clk_ops omap1_clk_full_ops = {</div><div class='ctx'> 	.disable_unused	= omap1_clk_disable_unused,</div><div class='ctx'> #endif</div><div class='ctx'> 	.recalc_rate	= omap1_clk_recalc_rate,</div><div class='del'>-	.round_rate	= omap1_clk_round_rate,</div><div class='add'>+	.determine_rate = omap1_clk_determine_rate,</div><div class='ctx'> 	.set_rate	= omap1_clk_set_rate,</div><div class='ctx'> 	.init		= omap1_clk_init_op,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c<br/>index 9b587ecebb1c..bb1bc060ecd8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/irq.c</a></div><div class='hunk'>@@ -220,8 +220,7 @@ void __init omap1_init_irq(void)</div><div class='ctx'> 	omap_l2_irq = irq_base;</div><div class='ctx'> 	omap_l2_irq -= NR_IRQS_LEGACY;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(NULL, nr_irqs, irq_base, 0, &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Total of %lu interrupts in %i interrupt banks\n",</div><div class='ctx'> 		nr_irqs, irq_bank_count);</div><div class='head'>diff --git a/arch/arm/mach-omap1/omap-dma.c b/arch/arm/mach-omap1/omap-dma.c<br/>index f091f78631d0..aebe5e55ff60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/omap-dma.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap1/omap-dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap1/omap-dma.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap1/omap-dma.c</a></div><div class='hunk'>@@ -832,7 +832,7 @@ static void omap_system_dma_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver omap_system_dma_driver = {</div><div class='ctx'> 	.probe		= omap_system_dma_probe,</div><div class='del'>-	.remove_new	= omap_system_dma_remove,</div><div class='add'>+	.remove		= omap_system_dma_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "omap_dma_system"</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c<br/>index fcf3d557aa78..3cdf223addcc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/am33xx-restart.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/am33xx-restart.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/am33xx-restart.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/am33xx-restart.c</a></div><div class='hunk'>@@ -2,12 +2,46 @@</div><div class='ctx'> /*</div><div class='ctx'>  * am33xx-restart.c - Code common to all AM33xx machines.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;dt-bindings/pinctrl/am33xx.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='add'>+#include "control.h"</div><div class='ctx'> #include "prm.h"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Advisory 1.0.36 EMU0 and EMU1: Terminals Must be Pulled High Before</div><div class='add'>+ * ICEPick Samples</div><div class='add'>+ *</div><div class='add'>+ * If EMU0/EMU1 pins have been used as GPIO outputs and actively driving low</div><div class='add'>+ * level, the device might not reboot in normal mode. We are in a bad position</div><div class='add'>+ * to override GPIO state here, so just switch the pins into EMU input mode</div><div class='add'>+ * (that's what reset will do anyway) and wait a bit, because the state will be</div><div class='add'>+ * latched 190 ns after reset.</div><div class='add'>+ */</div><div class='add'>+static void am33xx_advisory_1_0_36(void)</div><div class='add'>+{</div><div class='add'>+	u32 emu0 = omap_ctrl_readl(AM335X_PIN_EMU0);</div><div class='add'>+	u32 emu1 = omap_ctrl_readl(AM335X_PIN_EMU1);</div><div class='add'>+</div><div class='add'>+	/* If both pins are in EMU mode, nothing to do */</div><div class='add'>+	if (!(emu0 &amp; 7) &amp;&amp; !(emu1 &amp; 7))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Switch GPIO3_7/GPIO3_8 into EMU0/EMU1 modes respectively */</div><div class='add'>+	omap_ctrl_writel(emu0 &amp; ~7, AM335X_PIN_EMU0);</div><div class='add'>+	omap_ctrl_writel(emu1 &amp; ~7, AM335X_PIN_EMU1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Give pull-ups time to load the pin/PCB trace capacity.</div><div class='add'>+	 * 5 ms shall be enough to load 1 uF (would be huge capacity for these</div><div class='add'>+	 * pins) with TI-recommended 4k7 external pull-ups.</div><div class='add'>+	 */</div><div class='add'>+	mdelay(5);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * am33xx_restart - trigger a software restart of the SoC</div><div class='ctx'>  * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c</div><div class='hunk'>@@ -18,6 +52,8 @@</div><div class='ctx'>  */</div><div class='ctx'> void am33xx_restart(enum reboot_mode mode, const char *cmd)</div><div class='ctx'> {</div><div class='add'>+	am33xx_advisory_1_0_36();</div><div class='add'>+</div><div class='ctx'> 	/* TODO: Handle cmd if necessary */</div><div class='ctx'> 	prm_reboot_mode = mode;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c<br/>index ff2a4a4d8220..969265d5d5c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/board-n8x0.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/board-n8x0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/board-n8x0.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/board-n8x0.c</a></div><div class='hunk'>@@ -167,7 +167,7 @@ static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMC_DEBUG</div><div class='ctx'> 	dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,</div><div class='del'>-		power_on ? "on" : "off", vdd);</div><div class='add'>+		str_on_off(power_on), vdd);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (slot == 0) {</div><div class='ctx'> 		if (!power_on)</div><div class='head'>diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c<br/>index 011076a5952f..96c5cdc718c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c</a></div><div class='hunk'>@@ -70,8 +70,8 @@ static unsigned long omap2_table_mpu_recalc(struct clk_hw *clk,</div><div class='ctx'>  * Some might argue L3-DDR, others ARM, others IVA. This code is simple and</div><div class='ctx'>  * just uses the ARM rates.</div><div class='ctx'>  */</div><div class='del'>-static long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,</div><div class='del'>-			       unsigned long *parent_rate)</div><div class='add'>+static int omap2_determine_rate_to_table(struct clk_hw *hw,</div><div class='add'>+					 struct clk_rate_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	const struct prcm_config *ptr;</div><div class='ctx'> 	long highest_rate;</div><div class='hunk'>@@ -87,10 +87,12 @@ static long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> 		highest_rate = ptr-&gt;mpu_speed;</div><div class='ctx'> </div><div class='ctx'> 		/* Can check only after xtal frequency check */</div><div class='del'>-		if (ptr-&gt;mpu_speed &lt;= rate)</div><div class='add'>+		if (ptr-&gt;mpu_speed &lt;= req-&gt;rate)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	return highest_rate;</div><div class='add'>+	req-&gt;rate = highest_rate;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Sets basic clocks based on the specified rate */</div><div class='hunk'>@@ -215,7 +217,7 @@ static void omap2xxx_clkt_vps_late_init(void)</div><div class='ctx'> static const struct clk_ops virt_prcm_set_ops = {</div><div class='ctx'> 	.recalc_rate	= &amp;omap2_table_mpu_recalc,</div><div class='ctx'> 	.set_rate	= &amp;omap2_select_table_rate,</div><div class='del'>-	.round_rate	= &amp;omap2_round_to_table_rate,</div><div class='add'>+	.determine_rate = &amp;omap2_determine_rate_to_table,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h<br/>index c36fb2721261..86a2f9e5d0ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clockdomain.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clockdomain.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clockdomain.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/clockdomain.h</a></div><div class='hunk'>@@ -48,6 +48,7 @@</div><div class='ctx'> #define CLKDM_NO_AUTODEPS			(1 &lt;&lt; 4)</div><div class='ctx'> #define CLKDM_ACTIVE_WITH_MPU			(1 &lt;&lt; 5)</div><div class='ctx'> #define CLKDM_MISSING_IDLE_REPORTING		(1 &lt;&lt; 6)</div><div class='add'>+#define CLKDM_STANDBY_FORCE_WAKEUP		BIT(7)</div><div class='ctx'> </div><div class='ctx'> #define CLKDM_CAN_HWSUP		(CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)</div><div class='ctx'> #define CLKDM_CAN_SWSUP		(CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)</div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomains33xx_data.c b/arch/arm/mach-omap2/clockdomains33xx_data.c<br/>index 87f4e927eb18..c05a3c07d448 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clockdomains33xx_data.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/clockdomains33xx_data.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/clockdomains33xx_data.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/clockdomains33xx_data.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {</div><div class='ctx'> 	.pwrdm		= { .name = "per_pwrdm" },</div><div class='ctx'> 	.cm_inst	= AM33XX_CM_PER_MOD,</div><div class='ctx'> 	.clkdm_offs	= AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,</div><div class='del'>-	.flags		= CLKDM_CAN_SWSUP,</div><div class='add'>+	.flags		= CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clockdomain l3s_am33xx_clkdm = {</div><div class='head'>diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c<br/>index acdf72a541c0..a4dd42abda89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/cm33xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/cm33xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/cm33xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/cm33xx.c</a></div><div class='hunk'>@@ -20,6 +20,9 @@</div><div class='ctx'> #include "cm-regbits-34xx.h"</div><div class='ctx'> #include "cm-regbits-33xx.h"</div><div class='ctx'> #include "prm33xx.h"</div><div class='add'>+#if IS_ENABLED(CONFIG_SUSPEND)</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:</div><div class='hunk'>@@ -328,8 +331,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)</div><div class='ctx'> {</div><div class='ctx'> 	bool hwsup = false;</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_SUSPEND)</div><div class='add'>+	/*</div><div class='add'>+	 * In case of standby, Don't put the l4ls clk domain to sleep.</div><div class='add'>+	 * Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain</div><div class='add'>+	 * upon wake-up, CM3 PM FW fails to wake-up th MPU.</div><div class='add'>+	 */</div><div class='add'>+	if (pm_suspend_target_state == PM_SUSPEND_STANDBY &amp;&amp;</div><div class='add'>+	    (clkdm-&gt;flags &amp; CLKDM_STANDBY_FORCE_WAKEUP))</div><div class='add'>+		return 0;</div><div class='add'>+#endif</div><div class='ctx'> 	hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm-&gt;cm_inst, clkdm-&gt;clkdm_offs);</div><div class='del'>-</div><div class='ctx'> 	if (!hwsup &amp;&amp; (clkdm-&gt;flags &amp; CLKDM_CAN_FORCE_SLEEP))</div><div class='ctx'> 		am33xx_clkdm_sleep(clkdm);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c<br/>index 6f0d6120c174..a66b1dc61571 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/omap-wakeupgen.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/omap-wakeupgen.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/omap-wakeupgen.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/omap-wakeupgen.c</a></div><div class='hunk'>@@ -585,9 +585,8 @@ static int __init wakeupgen_init(struct device_node *node,</div><div class='ctx'> 		wakeupgen_ops = &amp;am43xx_wakeupgen_ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs,</div><div class='del'>-					  node, &amp;wakeupgen_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, max_irqs, of_fwnode_handle(node),</div><div class='add'>+					     &amp;wakeupgen_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(wakeupgen_base);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c<br/>index c907478be196..4abb86dc98fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/pm33xx-core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/pm33xx-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/pm33xx-core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/pm33xx-core.c</a></div><div class='hunk'>@@ -388,12 +388,15 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu)</div><div class='ctx'> 		if (!state_node)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (!of_device_is_available(state_node))</div><div class='add'>+		if (!of_device_is_available(state_node)) {</div><div class='add'>+			of_node_put(state_node);</div><div class='ctx'> 			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (i == CPUIDLE_STATE_MAX) {</div><div class='ctx'> 			pr_warn("%s: cpuidle states reached max possible\n",</div><div class='ctx'> 				__func__);</div><div class='add'>+			of_node_put(state_node);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -403,6 +406,7 @@ static int __init amx3_idle_init(struct device_node *cpu_node, int cpu)</div><div class='ctx'> 			states[state_count].wfi_flags |= WFI_FLAG_WAKE_M3 |</div><div class='ctx'> 							 WFI_FLAG_FLUSH_CACHE;</div><div class='ctx'> </div><div class='add'>+		of_node_put(state_node);</div><div class='ctx'> 		state_count++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/pmic-cpcap.c b/arch/arm/mach-omap2/pmic-cpcap.c<br/>index 4f31e61c0c90..9f9a20274db8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/pmic-cpcap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/pmic-cpcap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/pmic-cpcap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/pmic-cpcap.c</a></div><div class='hunk'>@@ -264,7 +264,11 @@ int __init omap4_cpcap_init(void)</div><div class='ctx'> </div><div class='ctx'> static int __init cpcap_late_init(void)</div><div class='ctx'> {</div><div class='del'>-	omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);</div><div class='add'>+	if (!of_find_compatible_node(NULL, NULL, "motorola,cpcap"))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (soc_is_omap443x() || soc_is_omap446x() || soc_is_omap447x())</div><div class='add'>+		omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c<br/>index 2441d96b7144..0225b9889404 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/powerdomain.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/powerdomain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/powerdomain.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/powerdomain.c</a></div><div class='hunk'>@@ -523,7 +523,7 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)</div><div class='ctx'>  * Set the powerdomain @pwrdm's next power state to @pwrst.  The powerdomain</div><div class='ctx'>  * may not enter this state immediately if the preconditions for this state</div><div class='ctx'>  * have not been satisfied.  Returns -EINVAL if the powerdomain pointer is</div><div class='del'>- * null or if the power state is invalid for the powerdomin, or returns 0</div><div class='add'>+ * null or if the power state is invalid for the powerdomain, or returns 0</div><div class='ctx'>  * upon success.</div><div class='ctx'>  */</div><div class='ctx'> int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)</div><div class='hunk'>@@ -1111,7 +1111,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)</div><div class='ctx'> 	int curr_pwrst;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!pwrdm || IS_ERR(pwrdm))</div><div class='add'>+	if (IS_ERR_OR_NULL(pwrdm))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	while (!(pwrdm-&gt;pwrsts &amp; (1 &lt;&lt; pwrst))) {</div><div class='head'>diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c<br/>index 49e8bc69abdd..000c2bca5ef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/voltage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/voltage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/voltage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/voltage.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ static LIST_HEAD(voltdm_list);</div><div class='ctx'>  */</div><div class='ctx'> unsigned long voltdm_get_voltage(struct voltagedomain *voltdm)</div><div class='ctx'> {</div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -73,7 +73,7 @@ static int voltdm_scale(struct voltagedomain *voltdm,</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> 	unsigned long volt = 0;</div><div class='ctx'> </div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -124,7 +124,7 @@ void voltdm_reset(struct voltagedomain *voltdm)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long target_volt;</div><div class='ctx'> </div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -154,7 +154,7 @@ void voltdm_reset(struct voltagedomain *voltdm)</div><div class='ctx'> void omap_voltage_get_volttable(struct voltagedomain *voltdm,</div><div class='ctx'> 				struct omap_volt_data **volt_data)</div><div class='ctx'> {</div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -182,7 +182,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -216,7 +216,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,</div><div class='ctx'> int omap_voltage_register_pmic(struct voltagedomain *voltdm,</div><div class='ctx'> 			       struct omap_voltdm_pmic *pmic)</div><div class='ctx'> {</div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c<br/>index a709655b978c..03c481c4742c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/vp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-omap2/vp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-omap2/vp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-omap2/vp.c</a></div><div class='hunk'>@@ -199,7 +199,7 @@ void omap_vp_enable(struct voltagedomain *voltdm)</div><div class='ctx'> 	struct omap_vp_instance *vp;</div><div class='ctx'> 	u32 vpconfig, volt;</div><div class='ctx'> </div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -244,7 +244,7 @@ void omap_vp_disable(struct voltagedomain *voltdm)</div><div class='ctx'> 	u32 vpconfig;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='del'>-	if (!voltdm || IS_ERR(voltdm)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(voltdm)) {</div><div class='ctx'> 		pr_warn("%s: VDD specified does not exist!\n", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c<br/>index a9ef71008147..5bfce8aa4102 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-pxa/irq.c</a></div><div class='hunk'>@@ -147,12 +147,11 @@ pxa_init_irq_common(struct device_node *node, int irq_nr,</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='ctx'> 	pxa_internal_irq_nr = irq_nr;</div><div class='del'>-	pxa_irq_domain = irq_domain_add_legacy(node, irq_nr,</div><div class='del'>-					       PXA_IRQ(0), 0,</div><div class='del'>-					       &amp;pxa_irq_ops, NULL);</div><div class='add'>+	pxa_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), irq_nr, PXA_IRQ(0), 0,</div><div class='add'>+						  &amp;pxa_irq_ops, NULL);</div><div class='ctx'> 	if (!pxa_irq_domain)</div><div class='ctx'> 		panic("Unable to add PXA IRQ domain\n");</div><div class='del'>-	irq_set_default_host(pxa_irq_domain);</div><div class='add'>+	irq_set_default_domain(pxa_irq_domain);</div><div class='ctx'> </div><div class='ctx'> 	for (n = 0; n &lt; irq_nr; n += 32) {</div><div class='ctx'> 		void __iomem *base = irq_base(n &gt;&gt; 5);</div><div class='head'>diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c<br/>index 72fa2e3fd353..71b282b146d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/sharpsl_pm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/sharpsl_pm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/sharpsl_pm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-pxa/sharpsl_pm.c</a></div><div class='hunk'>@@ -31,10 +31,10 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Constants</div><div class='ctx'>  */</div><div class='del'>-#define SHARPSL_CHARGE_ON_TIME_INTERVAL        (msecs_to_jiffies(1*60*1000))  /* 1 min */</div><div class='del'>-#define SHARPSL_CHARGE_FINISH_TIME             (msecs_to_jiffies(10*60*1000)) /* 10 min */</div><div class='del'>-#define SHARPSL_BATCHK_TIME                    (msecs_to_jiffies(15*1000))    /* 15 sec */</div><div class='del'>-#define SHARPSL_BATCHK_TIME_SUSPEND            (60*10)                        /* 10 min */</div><div class='add'>+#define SHARPSL_CHARGE_ON_TIME_INTERVAL        (secs_to_jiffies(60))</div><div class='add'>+#define SHARPSL_CHARGE_FINISH_TIME             (secs_to_jiffies(10*60))</div><div class='add'>+#define SHARPSL_BATCHK_TIME                    (secs_to_jiffies(15))</div><div class='add'>+#define SHARPSL_BATCHK_TIME_SUSPEND            (60*10) /* 10 min */</div><div class='ctx'> </div><div class='ctx'> #define SHARPSL_WAIT_CO_TIME                   15  /* 15 sec */</div><div class='ctx'> #define SHARPSL_WAIT_DISCHARGE_ON              100 /* 100 msec */</div><div class='hunk'>@@ -913,13 +913,13 @@ static void sharpsl_pm_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (sharpsl_pm.machinfo-&gt;exit)</div><div class='ctx'> 		sharpsl_pm.machinfo-&gt;exit();</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;sharpsl_pm.chrg_full_timer);</div><div class='del'>-	del_timer_sync(&amp;sharpsl_pm.ac_timer);</div><div class='add'>+	timer_delete_sync(&amp;sharpsl_pm.chrg_full_timer);</div><div class='add'>+	timer_delete_sync(&amp;sharpsl_pm.ac_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sharpsl_pm_driver = {</div><div class='ctx'> 	.probe		= sharpsl_pm_probe,</div><div class='del'>-	.remove_new	= sharpsl_pm_remove,</div><div class='add'>+	.remove		= sharpsl_pm_remove,</div><div class='ctx'> 	.suspend	= sharpsl_pm_suspend,</div><div class='ctx'> 	.resume		= sharpsl_pm_resume,</div><div class='ctx'> 	.driver		= {</div><div class='head'>diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c<br/>index 33533e35720f..c0b1f7e6be87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/spitz.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-pxa/spitz.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-pxa/spitz.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-pxa/spitz.c</a></div><div class='hunk'>@@ -1096,7 +1096,7 @@ static void __init spitz_init(void)</div><div class='ctx'> 		software_node_register(&amp;spitz_scoop_2_gpiochip_node);</div><div class='ctx'> </div><div class='ctx'> 	init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);</div><div class='del'>-	pm_power_off = spitz_poweroff;</div><div class='add'>+	register_platform_power_off(spitz_poweroff);</div><div class='ctx'> </div><div class='ctx'> 	PMCR = 0x00;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig<br/>index b7855cc665e9..c90193dd3928 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rockchip/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rockchip/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rockchip/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-rockchip/Kconfig</a></div><div class='hunk'>@@ -13,7 +13,7 @@ config ARCH_ROCKCHIP</div><div class='ctx'> 	select HAVE_ARM_SCU if SMP</div><div class='ctx'> 	select HAVE_ARM_TWD if SMP</div><div class='ctx'> 	select DW_APB_TIMER_OF</div><div class='del'>-	select REGULATOR if PM</div><div class='add'>+	select REGULATOR</div><div class='ctx'> 	select ROCKCHIP_TIMER</div><div class='ctx'> 	select ARM_GLOBAL_TIMER</div><div class='ctx'> 	select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK</div><div class='head'>diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c<br/>index 36915a073c23..f432d22bfed8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rockchip/platsmp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rockchip/platsmp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rockchip/platsmp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-rockchip/platsmp.c</a></div><div class='hunk'>@@ -279,11 +279,6 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {</div><div class='del'>-		if (rockchip_smp_prepare_sram(node)) {</div><div class='del'>-			of_node_put(node);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/* enable the SCU power domain */</div><div class='ctx'> 		pmu_set_power_domain(PMU_PWRDN_SCU, true);</div><div class='ctx'> </div><div class='hunk'>@@ -316,11 +311,19 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 		asm ("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr));</div><div class='ctx'> 		ncores = ((l2ctlr &gt;&gt; 24) &amp; 0x3) + 1;</div><div class='ctx'> 	}</div><div class='del'>-	of_node_put(node);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure that all cores except the first are really off */</div><div class='ctx'> 	for (i = 1; i &lt; ncores; i++)</div><div class='ctx'> 		pmu_set_power_domain(0 + i, false);</div><div class='add'>+</div><div class='add'>+	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {</div><div class='add'>+		if (rockchip_smp_prepare_sram(node)) {</div><div class='add'>+			of_node_put(node);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init rk3036_smp_prepare_cpus(unsigned int max_cpus)</div><div class='head'>diff --git a/arch/arm/mach-rpc/ecard.c b/arch/arm/mach-rpc/ecard.c<br/>index 9f7454b8efa7..2cde4c83b7f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rpc/ecard.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-rpc/ecard.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-rpc/ecard.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-rpc/ecard.c</a></div><div class='hunk'>@@ -1124,7 +1124,7 @@ static int ecard_match(struct device *_dev, const struct device_driver *_drv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct bus_type ecard_bus_type = {</div><div class='add'>+const struct bus_type ecard_bus_type = {</div><div class='ctx'> 	.name		= "ecard",</div><div class='ctx'> 	.dev_groups	= ecard_dev_groups,</div><div class='ctx'> 	.match		= ecard_match,</div><div class='head'>diff --git a/arch/arm/mach-s3c/devs.c b/arch/arm/mach-s3c/devs.c<br/>index 8c26d592d2a3..bab2abd8a34a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/devs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/devs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/devs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-s3c/devs.c</a></div><div class='hunk'>@@ -19,7 +19,6 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-s3c/gpio-samsung.c b/arch/arm/mach-s3c/gpio-samsung.c<br/>index 87daaa09e2c3..81e198e5a6d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/gpio-samsung.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/gpio-samsung.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/gpio-samsung.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-s3c/gpio-samsung.c</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'> // Samsung - GPIOlib support</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -430,8 +430,8 @@ static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void samsung_gpiolib_set(struct gpio_chip *chip,</div><div class='del'>-				unsigned offset, int value)</div><div class='add'>+static int samsung_gpiolib_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			       int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);</div><div class='ctx'> 	void __iomem *base = ourchip-&gt;base;</div><div class='hunk'>@@ -447,6 +447,8 @@ static void samsung_gpiolib_set(struct gpio_chip *chip,</div><div class='ctx'> 	__raw_writel(dat, base + 0x04);</div><div class='ctx'> </div><div class='ctx'> 	samsung_gpio_unlock(ourchip, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int samsung_gpiolib_get(struct gpio_chip *chip, unsigned offset)</div><div class='head'>diff --git a/arch/arm/mach-s3c/mach-crag6410.c b/arch/arm/mach-s3c/mach-crag6410.c<br/>index e5df2cb51ab2..028169c7debf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/mach-crag6410.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/mach-crag6410.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/mach-crag6410.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-s3c/mach-crag6410.c</a></div><div class='hunk'>@@ -252,14 +252,17 @@ static struct resource crag6410_mmgpio_resource[] = {</div><div class='ctx'> 	[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device crag6410_mmgpio = {</div><div class='add'>+static const struct property_entry crag6410_mmgpio_props[] = {</div><div class='add'>+	PROPERTY_ENTRY_U32("gpio-mmio,base", MMGPIO_GPIO_BASE),</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device_info crag6410_mmgpio_devinfo = {</div><div class='ctx'> 	.name		= "basic-mmio-gpio",</div><div class='ctx'> 	.id		= -1,</div><div class='del'>-	.resource	= crag6410_mmgpio_resource,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),</div><div class='del'>-	.dev.platform_data = &amp;(struct bgpio_pdata) {</div><div class='del'>-		.base	= MMGPIO_GPIO_BASE,</div><div class='del'>-	},</div><div class='add'>+	.res		= crag6410_mmgpio_resource,</div><div class='add'>+	.num_res	= ARRAY_SIZE(crag6410_mmgpio_resource),</div><div class='add'>+	.properties	= crag6410_mmgpio_props,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device speyside_device = {</div><div class='hunk'>@@ -373,7 +376,6 @@ static struct platform_device *crag6410_devices[] __initdata = {</div><div class='ctx'> 	&amp;crag6410_gpio_keydev,</div><div class='ctx'> 	&amp;crag6410_dm9k_device,</div><div class='ctx'> 	&amp;s3c64xx_device_spi0,</div><div class='del'>-	&amp;crag6410_mmgpio,</div><div class='ctx'> 	&amp;crag6410_lcd_powerdev,</div><div class='ctx'> 	&amp;crag6410_backlight_device,</div><div class='ctx'> 	&amp;speyside_device,</div><div class='hunk'>@@ -871,6 +873,7 @@ static void __init crag6410_machine_init(void)</div><div class='ctx'> </div><div class='ctx'> 	pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));</div><div class='ctx'> 	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));</div><div class='add'>+	platform_device_register_full(&amp;crag6410_mmgpio_devinfo);</div><div class='ctx'> </div><div class='ctx'> 	gpio_led_register_device(-1, &amp;gpio_leds_pdata);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c b/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c<br/>index cfa34b55ca21..c3269cd6a848 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fb.h"</div><div class='head'>diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c<br/>index 0c586047d130..5383a26f5116 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/generic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/generic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/generic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-sa1100/generic.c</a></div><div class='hunk'>@@ -298,7 +298,7 @@ static struct platform_device *sa11x0_devices[] __initdata = {</div><div class='ctx'> static int __init sa1100_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct resource wdt_res = DEFINE_RES_MEM(0x90000000, 0x20);</div><div class='del'>-	pm_power_off = sa1100_power_off;</div><div class='add'>+	register_platform_power_off(sa1100_power_off);</div><div class='ctx'> </div><div class='ctx'> 	regulator_has_full_constraints();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c<br/>index 1956b095e699..d94810217095 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/jornada720_ssp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/jornada720_ssp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/jornada720_ssp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-sa1100/jornada720_ssp.c</a></div><div class='hunk'>@@ -188,7 +188,7 @@ static void jornada_ssp_remove(struct platform_device *dev)</div><div class='ctx'> </div><div class='ctx'> struct platform_driver jornadassp_driver = {</div><div class='ctx'> 	.probe	= jornada_ssp_probe,</div><div class='del'>-	.remove_new = jornada_ssp_remove,</div><div class='add'>+	.remove = jornada_ssp_remove,</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name	= "jornada_ssp",</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c<br/>index 0ef0ebbf31ac..88fe79f0a4ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/neponset.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sa1100/neponset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sa1100/neponset.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-sa1100/neponset.c</a></div><div class='hunk'>@@ -423,7 +423,7 @@ static const struct dev_pm_ops neponset_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver neponset_device_driver = {</div><div class='ctx'> 	.probe		= neponset_probe,</div><div class='del'>-	.remove_new	= neponset_remove,</div><div class='add'>+	.remove		= neponset_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "neponset",</div><div class='ctx'> 		.pm	= PM_OPS,</div><div class='head'>diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S<br/>index a956b489b6ea..2bc7e73a8582 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/headsmp.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/headsmp.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/headsmp.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-shmobile/headsmp.S</a></div><div class='hunk'>@@ -136,6 +136,7 @@ ENDPROC(shmobile_smp_sleep)</div><div class='ctx'> 	.long	shmobile_smp_arg - 1b</div><div class='ctx'> </div><div class='ctx'> 	.bss</div><div class='add'>+	.align	2</div><div class='ctx'> 	.globl	shmobile_smp_mpidr</div><div class='ctx'> shmobile_smp_mpidr:</div><div class='ctx'> 	.space	NR_CPUS * 4</div><div class='head'>diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c<br/>index 907a4f8c5aed..46654d196f8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/pm-rcar-gen2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/pm-rcar-gen2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/pm-rcar-gen2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-shmobile/pm-rcar-gen2.c</a></div><div class='hunk'>@@ -81,7 +81,7 @@ void __init rcar_gen2_pm_init(void)</div><div class='ctx'> </div><div class='ctx'> map:</div><div class='ctx'> 	/* RAM for jump stub, because BAR requires 256KB aligned address */</div><div class='del'>-	if (res.start &amp; (256 * 1024 - 1) ||</div><div class='add'>+	if (res.start &amp; (SZ_256K - 1) ||</div><div class='ctx'> 	    resource_size(&amp;res) &lt; shmobile_boot_size) {</div><div class='ctx'> 		pr_err("Invalid smp-sram region\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c<br/>index c38367a10c79..3cd34a42e39b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/setup-rcar-gen2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-shmobile/setup-rcar-gen2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-shmobile/setup-rcar-gen2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-shmobile/setup-rcar-gen2.c</a></div><div class='hunk'>@@ -8,19 +8,15 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/dma-map-ops.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_clk.h&gt;</div><div class='del'>-#include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;linux/psci.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/secure_cntvoff.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='del'>-#include "rcar-gen2.h"</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id cpg_matches[] __initconst = {</div><div class='ctx'> 	{ .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" },</div><div class='hunk'>@@ -122,76 +118,6 @@ skip_update:</div><div class='ctx'> 	timer_probe();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct memory_reserve_config {</div><div class='del'>-	u64 reserved;</div><div class='del'>-	u64 base, size;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname,</div><div class='del'>-				     int depth, void *data)</div><div class='del'>-{</div><div class='del'>-	const char *type = of_get_flat_dt_prop(node, "device_type", NULL);</div><div class='del'>-	const __be32 *reg, *endp;</div><div class='del'>-	int l;</div><div class='del'>-	struct memory_reserve_config *mrc = data;</div><div class='del'>-	u64 lpae_start = 1ULL &lt;&lt; 32;</div><div class='del'>-</div><div class='del'>-	/* We are scanning "memory" nodes only */</div><div class='del'>-	if (type == NULL || strcmp(type, "memory"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	reg = of_get_flat_dt_prop(node, "linux,usable-memory", &amp;l);</div><div class='del'>-	if (reg == NULL)</div><div class='del'>-		reg = of_get_flat_dt_prop(node, "reg", &amp;l);</div><div class='del'>-	if (reg == NULL)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	endp = reg + (l / sizeof(__be32));</div><div class='del'>-	while ((endp - reg) &gt;= (dt_root_addr_cells + dt_root_size_cells)) {</div><div class='del'>-		u64 base, size;</div><div class='del'>-</div><div class='del'>-		base = dt_mem_next_cell(dt_root_addr_cells, &amp;reg);</div><div class='del'>-		size = dt_mem_next_cell(dt_root_size_cells, &amp;reg);</div><div class='del'>-</div><div class='del'>-		if (base &gt;= lpae_start)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if ((base + size) &gt;= lpae_start)</div><div class='del'>-			size = lpae_start - base;</div><div class='del'>-</div><div class='del'>-		if (size &lt; mrc-&gt;reserved)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (base &lt; mrc-&gt;base)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* keep the area at top near the 32-bit legacy limit */</div><div class='del'>-		mrc-&gt;base = base + size - mrc-&gt;reserved;</div><div class='del'>-		mrc-&gt;size = mrc-&gt;reserved;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init rcar_gen2_reserve(void)</div><div class='del'>-{</div><div class='del'>-	struct memory_reserve_config mrc;</div><div class='del'>-</div><div class='del'>-	/* reserve 256 MiB at the top of the physical legacy 32-bit space */</div><div class='del'>-	memset(&amp;mrc, 0, sizeof(mrc));</div><div class='del'>-	mrc.reserved = SZ_256M;</div><div class='del'>-</div><div class='del'>-	of_scan_flat_dt(rcar_gen2_scan_mem, &amp;mrc);</div><div class='del'>-#ifdef CONFIG_DMA_CMA</div><div class='del'>-	if (mrc.size &amp;&amp; memblock_is_region_memory(mrc.base, mrc.size)) {</div><div class='del'>-		static struct cma *rcar_gen2_dma_contiguous;</div><div class='del'>-</div><div class='del'>-		dma_contiguous_reserve_area(mrc.size, mrc.base, 0,</div><div class='del'>-					    &amp;rcar_gen2_dma_contiguous, true);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char * const rcar_gen2_boards_compat_dt[] __initconst = {</div><div class='ctx'> 	"renesas,r8a7790",</div><div class='ctx'> 	"renesas,r8a7791",</div><div class='hunk'>@@ -204,7 +130,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {</div><div class='ctx'> DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")</div><div class='ctx'> 	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.init_time	= rcar_gen2_timer_init,</div><div class='del'>-	.reserve	= rcar_gen2_reserve,</div><div class='ctx'> 	.dt_compat	= rcar_gen2_boards_compat_dt,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -220,6 +145,5 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {</div><div class='ctx'> DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")</div><div class='ctx'> 	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.init_time	= rcar_gen2_timer_init,</div><div class='del'>-	.reserve	= rcar_gen2_reserve,</div><div class='ctx'> 	.dt_compat	= rz_g1_boards_compat_dt,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig<br/>index b3842c971d31..e58699e13e1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sti/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sti/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sti/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-sti/Kconfig</a></div><div class='hunk'>@@ -19,31 +19,13 @@ menuconfig ARCH_STI</div><div class='ctx'> 	select PL310_ERRATA_769419 if CACHE_L2X0</div><div class='ctx'> 	select RESET_CONTROLLER</div><div class='ctx'> 	help</div><div class='del'>-	  Include support for STMicroelectronics' STiH415/416, STiH407/10 and</div><div class='add'>+	  Include support for STMicroelectronics' STiH407/10 and</div><div class='ctx'> 	  STiH418 family SoCs using the Device Tree for discovery.  More</div><div class='ctx'> 	  information can be found in Documentation/arch/arm/sti/ and</div><div class='ctx'> 	  Documentation/devicetree.</div><div class='ctx'> </div><div class='ctx'> if ARCH_STI</div><div class='ctx'> </div><div class='del'>-config SOC_STIH415</div><div class='del'>-	bool "STiH415 STMicroelectronics Consumer Electronics family"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  This enables support for STMicroelectronics Digital Consumer</div><div class='del'>-	  Electronics family StiH415 parts, primarily targeted at set-top-box</div><div class='del'>-	  and other digital audio/video applications using Flattned Device</div><div class='del'>-	  Trees.</div><div class='del'>-</div><div class='del'>-config SOC_STIH416</div><div class='del'>-	bool "STiH416 STMicroelectronics Consumer Electronics family"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  This enables support for STMicroelectronics Digital Consumer</div><div class='del'>-	  Electronics family StiH416 parts, primarily targeted at set-top-box</div><div class='del'>-	  and other digital audio/video applications using Flattened Device</div><div class='del'>-	  Trees.</div><div class='del'>-</div><div class='ctx'> config SOC_STIH407</div><div class='ctx'> 	bool "STiH407 STMicroelectronics Consumer Electronics family"</div><div class='ctx'> 	default y</div><div class='head'>diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c<br/>index 488084b61b4a..1aaf61184685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sti/board-dt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-sti/board-dt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-sti/board-dt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-sti/board-dt.c</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include "smp.h"</div><div class='ctx'> </div><div class='ctx'> static const char *const stih41x_dt_match[] __initconst = {</div><div class='del'>-	"st,stih415",</div><div class='del'>-	"st,stih416",</div><div class='ctx'> 	"st,stih407",</div><div class='ctx'> 	"st,stih410",</div><div class='ctx'> 	"st,stih418",</div><div class='head'>diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c<br/>index 5dcc4ddd1a56..e6233c8725ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-stm32/board-dt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-stm32/board-dt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-stm32/board-dt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-stm32/board-dt.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@ static const char *const stm32_compat[] __initconst = {</div><div class='ctx'> 	"st,stm32f746",</div><div class='ctx'> 	"st,stm32f769",</div><div class='ctx'> 	"st,stm32h743",</div><div class='add'>+	"st,stm32h747",</div><div class='ctx'> 	"st,stm32h750",</div><div class='ctx'> 	"st,stm32mp131",</div><div class='ctx'> 	"st,stm32mp133",</div><div class='head'>diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c<br/>index d5c805adf7a8..ea706fac6358 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-tegra/reset.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-tegra/reset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-tegra/reset.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-tegra/reset.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static void __init tegra_cpu_reset_handler_enable(void)</div><div class='ctx'> 	BUG_ON(is_enabled);</div><div class='ctx'> 	BUG_ON(tegra_cpu_reset_handler_size &gt; TEGRA_IRAM_RESET_HANDLER_SIZE);</div><div class='ctx'> </div><div class='del'>-	memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start,</div><div class='add'>+	memcpy_toio(iram_base, (void *)__tegra_cpu_reset_handler_start,</div><div class='ctx'> 			tegra_cpu_reset_handler_size);</div><div class='ctx'> </div><div class='ctx'> 	err = call_firmware_op(set_cpu_boot_addr, 0, reset_address);</div><div class='head'>diff --git a/arch/arm/mach-versatile/spc.c b/arch/arm/mach-versatile/spc.c<br/>index 790092734cf6..812db32448fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-versatile/spc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-versatile/spc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-versatile/spc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-versatile/spc.c</a></div><div class='hunk'>@@ -497,12 +497,13 @@ static unsigned long spc_recalc_rate(struct clk_hw *hw,</div><div class='ctx'> 	return freq * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long spc_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='del'>-		unsigned long *parent_rate)</div><div class='add'>+static int spc_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_spc *spc = to_clk_spc(hw);</div><div class='ctx'> </div><div class='del'>-	return ve_spc_round_performance(spc-&gt;cluster, drate);</div><div class='add'>+	req-&gt;rate = ve_spc_round_performance(spc-&gt;cluster, req-&gt;rate);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int spc_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='hunk'>@@ -515,7 +516,7 @@ static int spc_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> </div><div class='ctx'> static struct clk_ops clk_spc_ops = {</div><div class='ctx'> 	.recalc_rate = spc_recalc_rate,</div><div class='del'>-	.round_rate = spc_round_rate,</div><div class='add'>+	.determine_rate = spc_determine_rate,</div><div class='ctx'> 	.set_rate = spc_set_rate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c<br/>index 0ab40087ae1c..1d294255d708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-vt8500/vt8500.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-vt8500/vt8500.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-vt8500/vt8500.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-vt8500/vt8500.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ static void __init vt8500_init(void)</div><div class='ctx'> 			pr_err("%s:ioremap(power_off) failed\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (pmc_base)</div><div class='del'>-		pm_power_off = &amp;vt8500_power_off;</div><div class='add'>+		register_platform_power_off(vt8500_power_off);</div><div class='ctx'> 	else</div><div class='ctx'> 		pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h<br/>index 60e662324699..83a79d0c0bec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-zynq/common.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mach-zynq/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mach-zynq/common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mach-zynq/common.h</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #ifndef __MACH_ZYNQ_COMMON_H__</div><div class='ctx'> #define __MACH_ZYNQ_COMMON_H__</div><div class='ctx'> </div><div class='del'>-extern int zynq_slcr_init(void);</div><div class='ctx'> extern int zynq_early_slcr_init(void);</div><div class='ctx'> extern void zynq_slcr_cpu_stop(int cpu);</div><div class='ctx'> extern void zynq_slcr_cpu_start(int cpu);</div><div class='head'>diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig<br/>index 2b6f50dd5478..7b27ee9482b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/Kconfig</a></div><div class='hunk'>@@ -926,7 +926,6 @@ config VDSO</div><div class='ctx'> 	default y if ARM_ARCH_TIMER</div><div class='ctx'> 	select HAVE_GENERIC_VDSO</div><div class='ctx'> 	select GENERIC_TIME_VSYSCALL</div><div class='del'>-	select GENERIC_VDSO_32</div><div class='ctx'> 	select GENERIC_GETTIMEOFDAY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Place in the process address space an ELF shared object</div><div class='head'>diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile<br/>index a195cd1d3e6d..1e2201013371 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/Makefile</a></div><div class='hunk'>@@ -89,7 +89,7 @@ obj-$(CONFIG_CPU_V6)		+= proc-v6.o</div><div class='ctx'> obj-$(CONFIG_CPU_V6K)		+= proc-v6.o</div><div class='ctx'> obj-$(CONFIG_CPU_V7)		+= proc-v7.o proc-v7-bugs.o</div><div class='ctx'> obj-$(CONFIG_CPU_V7M)		+= proc-v7m.o</div><div class='del'>-obj-$(CONFIG_CFI_CLANG)		+= proc.o</div><div class='add'>+obj-$(CONFIG_CFI)		+= proc.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_OUTER_CACHE)	+= l2c-common.o</div><div class='ctx'> obj-$(CONFIG_CACHE_B15_RAC)	+= cache-b15-rac.o</div><div class='head'>diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c<br/>index 3c6ddb1afdc4..812380f30ae3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/alignment.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/alignment.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/alignment.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/alignment.c</a></div><div class='hunk'>@@ -19,10 +19,11 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/sched/signal.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='ctx'> #include &lt;asm/system_info.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;asm/system_misc.h&gt;</div><div class='ctx'> #include &lt;asm/opcodes.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fault.h"</div><div class='hunk'>@@ -809,6 +810,9 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> 	int thumb2_32b = 0;</div><div class='ctx'> 	int fault;</div><div class='ctx'> </div><div class='add'>+	if (addr &gt;= TASK_SIZE &amp;&amp; user_mode(regs))</div><div class='add'>+		harden_branch_predictor();</div><div class='add'>+</div><div class='ctx'> 	if (interrupts_enabled(regs))</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/cache-fa.S b/arch/arm/mm/cache-fa.S<br/>index 4a3668b52a2d..e1641799569b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-fa.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-fa.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-fa.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-fa.S</a></div><div class='hunk'>@@ -112,7 +112,7 @@ SYM_FUNC_END(fa_flush_user_cache_range)</div><div class='ctx'>  *	- end	 - virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(fa_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	fa_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(fa_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c<br/>index 25dbd84a1aaf..2bfefb252ffd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-feroceon-l2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-feroceon-l2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-feroceon-l2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-feroceon-l2.c</a></div><div class='hunk'>@@ -295,7 +295,7 @@ static inline u32 read_extra_features(void)</div><div class='ctx'> 	return u;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void write_extra_features(u32 u)</div><div class='add'>+static inline void __init write_extra_features(u32 u)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mm/cache-l2x0-pmu.c b/arch/arm/mm/cache-l2x0-pmu.c<br/>index 993fefdc167a..93ef0502b7ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-l2x0-pmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-l2x0-pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-l2x0-pmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-l2x0-pmu.c</a></div><div class='hunk'>@@ -539,8 +539,7 @@ static __init int l2x0_pmu_init(void)</div><div class='ctx'> 	 * at higher frequencies.</div><div class='ctx'> 	 */</div><div class='ctx'> 	l2x0_pmu_poll_period = ms_to_ktime(1000);</div><div class='del'>-	hrtimer_init(&amp;l2x0_pmu_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	l2x0_pmu_hrtimer.function = l2x0_pmu_poll;</div><div class='add'>+	hrtimer_setup(&amp;l2x0_pmu_hrtimer, l2x0_pmu_poll, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	cpumask_set_cpu(0, &amp;pmu_cpu);</div><div class='ctx'> 	ret = cpuhp_setup_state_nocalls(CPUHP_AP_PERF_ARM_L2X0_ONLINE,</div><div class='head'>diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c<br/>index 43d91bfd2360..470867160076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-l2x0.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-l2x0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-l2x0.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-l2x0.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='hunk'>@@ -667,9 +668,9 @@ static void __init l2c310_enable(void __iomem *base, unsigned num_lock)</div><div class='ctx'> 		u32 power_ctrl;</div><div class='ctx'> </div><div class='ctx'> 		power_ctrl = readl_relaxed(base + L310_POWER_CTRL);</div><div class='del'>-		pr_info("L2C-310 dynamic clock gating %sabled, standby mode %sabled\n",</div><div class='del'>-			power_ctrl &amp; L310_DYNAMIC_CLK_GATING_EN ? "en" : "dis",</div><div class='del'>-			power_ctrl &amp; L310_STNDBY_MODE_EN ? "en" : "dis");</div><div class='add'>+		pr_info("L2C-310 dynamic clock gating %s, standby mode %s\n",</div><div class='add'>+			str_enabled_disabled(power_ctrl &amp; L310_DYNAMIC_CLK_GATING_EN),</div><div class='add'>+			str_enabled_disabled(power_ctrl &amp; L310_STNDBY_MODE_EN));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (aux &amp; L310_AUX_CTRL_FULL_LINE_ZERO)</div><div class='head'>diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c<br/>index b1e1aba602f7..bfe166ccace0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-tauros2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-tauros2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-tauros2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-tauros2.c</a></div><div class='hunk'>@@ -177,7 +177,7 @@ static inline void __init write_actlr(u32 actlr)</div><div class='ctx'> 	__asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enable_extra_feature(unsigned int features)</div><div class='add'>+static void __init enable_extra_feature(unsigned int features)</div><div class='ctx'> {</div><div class='ctx'> 	u32 u;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S<br/>index 0e94e5193dbd..001d7042bd46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v4.S</a></div><div class='hunk'>@@ -104,7 +104,7 @@ SYM_FUNC_END(v4_coherent_user_range)</div><div class='ctx'>  *	- size	- region size</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v4_flush_kern_dcache_area)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v4_dma_flush_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v4_flush_kern_dcache_area)</div><div class='head'>diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S<br/>index ce55a2eef5da..874fe5310f9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4wb.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4wb.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4wb.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v4wb.S</a></div><div class='hunk'>@@ -136,7 +136,7 @@ SYM_FUNC_END(v4wb_flush_user_cache_range)</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v4wb_flush_kern_dcache_area)</div><div class='ctx'> 	add	r1, r0, r1</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v4wb_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v4wb_flush_kern_dcache_area)</div><div class='hunk'>@@ -152,7 +152,7 @@ SYM_FUNC_END(v4wb_flush_kern_dcache_area)</div><div class='ctx'>  *	- end	 - virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v4wb_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v4wb_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v4wb_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S<br/>index a97dc267b3b0..2ee62e4b2b07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4wt.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v4wt.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v4wt.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v4wt.S</a></div><div class='hunk'>@@ -108,7 +108,7 @@ SYM_FUNC_END(v4wt_flush_user_cache_range)</div><div class='ctx'>  *	- end	 - virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v4wt_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v4wt_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v4wt_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S<br/>index 9f415476e218..5ceea8965ea1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v6.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v6.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v6.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v6.S</a></div><div class='hunk'>@@ -117,7 +117,7 @@ SYM_FUNC_END(v6_flush_user_cache_range)</div><div class='ctx'>  *	- the Icache does not read data from the write buffer</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v6_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v6_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v6_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S<br/>index 201ca05436fa..726681fb7d4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v7.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v7.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v7.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v7.S</a></div><div class='hunk'>@@ -261,7 +261,7 @@ SYM_FUNC_END(v7_flush_user_cache_range)</div><div class='ctx'>  *	- the Icache does not read data from the write buffer</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v7_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v7_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v7_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S<br/>index 14d719eba729..7f9cfad2ea21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v7m.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/cache-v7m.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/cache-v7m.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/cache-v7m.S</a></div><div class='hunk'>@@ -286,7 +286,7 @@ SYM_FUNC_END(v7m_flush_user_cache_range)</div><div class='ctx'>  *	- the Icache does not read data from the write buffer</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(v7m_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	v7m_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(v7m_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c<br/>index 7ddd82b9fe8b..ed843bb22020 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-v4mc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-v4mc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-v4mc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/copypage-v4mc.c</a></div><div class='hunk'>@@ -67,7 +67,7 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,</div><div class='ctx'> 	struct folio *src = page_folio(from);</div><div class='ctx'> 	void *kto = kmap_atomic(to);</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(folio_flush_mapping(src), src);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(&amp;minicache_lock);</div><div class='head'>diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c<br/>index a1a71f36d850..0710dba5c0bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-v6.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-v6.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-v6.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/copypage-v6.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,</div><div class='ctx'> 	unsigned int offset = CACHE_COLOUR(vaddr);</div><div class='ctx'> 	unsigned long kfrom, kto;</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(folio_flush_mapping(src), src);</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: not highmem safe */</div><div class='head'>diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c<br/>index f1e29d3e8193..e16af68d709f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-xscale.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/copypage-xscale.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/copypage-xscale.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/copypage-xscale.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,</div><div class='ctx'> 	struct folio *src = page_folio(from);</div><div class='ctx'> 	void *kto = kmap_atomic(to);</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;src-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(folio_flush_mapping(src), src);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(&amp;minicache_lock);</div><div class='head'>diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c<br/>index 97db5397c320..fecac107fd0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/dma-mapping-nommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/dma-mapping-nommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/dma-mapping-nommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/dma-mapping-nommu.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@ void arch_setup_dma_ops(struct device *dev, bool coherent)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Cache support for v7m is optional, so can be treated as</div><div class='ctx'> 		 * coherent if no cache has been detected. Note that it is not</div><div class='del'>-		 * enough to check if MPU is in use or not since in absense of</div><div class='add'>+		 * enough to check if MPU is in use or not since in absence of</div><div class='ctx'> 		 * MPU system memory map is used.</div><div class='ctx'> 		 */</div><div class='ctx'> 		dev-&gt;dma_coherent = cacheid ? coherent : true;</div><div class='head'>diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c<br/>index 88c2d68a69c9..08641a936394 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/dma-mapping.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/dma-mapping.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/dma-mapping.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/dma-mapping.c</a></div><div class='hunk'>@@ -718,7 +718,7 @@ static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,</div><div class='ctx'> 			if (size &lt; sz)</div><div class='ctx'> 				break;</div><div class='ctx'> 			if (!offset)</div><div class='del'>-				set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+				set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 			offset = 0;</div><div class='ctx'> 			size -= sz;</div><div class='ctx'> 			if (!size)</div><div class='head'>diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c<br/>index 831793cd6ff9..91e488767783 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/fault-armv.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/fault-armv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/fault-armv.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/fault-armv.c</a></div><div class='hunk'>@@ -61,32 +61,8 @@ static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SPLIT_PTE_PTLOCKS)</div><div class='del'>-/*</div><div class='del'>- * If we are using split PTE locks, then we need to take the page</div><div class='del'>- * lock here.  Otherwise we are using shared mm-&gt;page_table_lock</div><div class='del'>- * which is already locked, thus cannot take it.</div><div class='del'>- */</div><div class='del'>-static inline void do_pte_lock(spinlock_t *ptl)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Use nested version here to indicate that we are already</div><div class='del'>-	 * holding one similar spinlock.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_nested(ptl, SINGLE_DEPTH_NESTING);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void do_pte_unlock(spinlock_t *ptl)</div><div class='del'>-{</div><div class='del'>-	spin_unlock(ptl);</div><div class='del'>-}</div><div class='del'>-#else /* !defined(CONFIG_SPLIT_PTE_PTLOCKS) */</div><div class='del'>-static inline void do_pte_lock(spinlock_t *ptl) {}</div><div class='del'>-static inline void do_pte_unlock(spinlock_t *ptl) {}</div><div class='del'>-#endif /* defined(CONFIG_SPLIT_PTE_PTLOCKS) */</div><div class='del'>-</div><div class='ctx'> static int adjust_pte(struct vm_area_struct *vma, unsigned long address,</div><div class='del'>-	unsigned long pfn)</div><div class='add'>+		      unsigned long pfn, bool need_lock)</div><div class='ctx'> {</div><div class='ctx'> 	spinlock_t *ptl;</div><div class='ctx'> 	pgd_t *pgd;</div><div class='hunk'>@@ -94,6 +70,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 	pud_t *pud;</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='add'>+	pmd_t pmdval;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	pgd = pgd_offset(vma-&gt;vm_mm, address);</div><div class='hunk'>@@ -112,20 +89,32 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 	if (pmd_none_or_clear_bad(pmd))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+again:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is called while another page table is mapped, so we</div><div class='ctx'> 	 * must use the nested version.  This also means we need to</div><div class='ctx'> 	 * open-code the spin-locking.</div><div class='ctx'> 	 */</div><div class='del'>-	pte = pte_offset_map_nolock(vma-&gt;vm_mm, pmd, address, &amp;ptl);</div><div class='add'>+	pte = pte_offset_map_rw_nolock(vma-&gt;vm_mm, pmd, address, &amp;pmdval, &amp;ptl);</div><div class='ctx'> 	if (!pte)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	do_pte_lock(ptl);</div><div class='add'>+	if (need_lock) {</div><div class='add'>+		/*</div><div class='add'>+		 * Use nested version here to indicate that we are already</div><div class='add'>+		 * holding one similar spinlock.</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_nested(ptl, SINGLE_DEPTH_NESTING);</div><div class='add'>+		if (unlikely(!pmd_same(pmdval, pmdp_get_lockless(pmd)))) {</div><div class='add'>+			pte_unmap_unlock(pte, ptl);</div><div class='add'>+			goto again;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = do_adjust_pte(vma, address, pfn, pte);</div><div class='ctx'> </div><div class='del'>-	do_pte_unlock(ptl);</div><div class='add'>+	if (need_lock)</div><div class='add'>+		spin_unlock(ptl);</div><div class='ctx'> 	pte_unmap(pte);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -133,8 +122,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> make_coherent(struct address_space *mapping, struct vm_area_struct *vma,</div><div class='del'>-	unsigned long addr, pte_t *ptep, unsigned long pfn)</div><div class='add'>+	      unsigned long addr, pte_t *ptep, unsigned long pfn)</div><div class='ctx'> {</div><div class='add'>+	const unsigned long pmd_start_addr = ALIGN_DOWN(addr, PMD_SIZE);</div><div class='add'>+	const unsigned long pmd_end_addr = pmd_start_addr + PMD_SIZE;</div><div class='ctx'> 	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> 	struct vm_area_struct *mpnt;</div><div class='ctx'> 	unsigned long offset;</div><div class='hunk'>@@ -151,6 +142,14 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma,</div><div class='ctx'> 	flush_dcache_mmap_lock(mapping);</div><div class='ctx'> 	vma_interval_tree_foreach(mpnt, &amp;mapping-&gt;i_mmap, pgoff, pgoff) {</div><div class='ctx'> 		/*</div><div class='add'>+		 * If we are using split PTE locks, then we need to take the pte</div><div class='add'>+		 * lock. Otherwise we are using shared mm-&gt;page_table_lock which</div><div class='add'>+		 * is already locked, thus cannot take it.</div><div class='add'>+		 */</div><div class='add'>+		bool need_lock = IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS);</div><div class='add'>+		unsigned long mpnt_addr;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='ctx'> 		 * If this VMA is not in our MM, we can ignore it.</div><div class='ctx'> 		 * Note that we intentionally mask out the VMA</div><div class='ctx'> 		 * that we are fixing up.</div><div class='hunk'>@@ -160,7 +159,12 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma,</div><div class='ctx'> 		if (!(mpnt-&gt;vm_flags &amp; VM_MAYSHARE))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		offset = (pgoff - mpnt-&gt;vm_pgoff) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-		aliases += adjust_pte(mpnt, mpnt-&gt;vm_start + offset, pfn);</div><div class='add'>+		mpnt_addr = mpnt-&gt;vm_start + offset;</div><div class='add'>+</div><div class='add'>+		/* Avoid deadlocks by not grabbing the same PTE lock again. */</div><div class='add'>+		if (mpnt_addr &gt;= pmd_start_addr &amp;&amp; mpnt_addr &lt; pmd_end_addr)</div><div class='add'>+			need_lock = false;</div><div class='add'>+		aliases += adjust_pte(mpnt, mpnt_addr, pfn, need_lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	flush_dcache_mmap_unlock(mapping);</div><div class='ctx'> 	if (aliases)</div><div class='hunk'>@@ -199,7 +203,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> 	folio = page_folio(pfn_to_page(pfn));</div><div class='ctx'> 	mapping = folio_flush_mapping(folio);</div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(mapping, folio);</div><div class='ctx'> 	if (mapping) {</div><div class='ctx'> 		if (cache_is_vivt())</div><div class='head'>diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c<br/>index ab01b51de559..ed4330cc3f4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/fault.c</a></div><div class='hunk'>@@ -128,6 +128,19 @@ static inline bool is_translation_fault(unsigned int fsr)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_permission_fault(unsigned int fsr)</div><div class='add'>+{</div><div class='add'>+	int fs = fsr_fs(fsr);</div><div class='add'>+#ifdef CONFIG_ARM_LPAE</div><div class='add'>+	if ((fs &amp; FS_MMU_NOLL_MASK) == FS_PERM_NOLL)</div><div class='add'>+		return true;</div><div class='add'>+#else</div><div class='add'>+	if (fs == FS_L1_PERM || fs == FS_L2_PERM)</div><div class='add'>+		return true;</div><div class='add'>+#endif</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void die_kernel_fault(const char *msg, struct mm_struct *mm,</div><div class='ctx'> 			     unsigned long addr, unsigned int fsr,</div><div class='ctx'> 			     struct pt_regs *regs)</div><div class='hunk'>@@ -135,8 +148,7 @@ static void die_kernel_fault(const char *msg, struct mm_struct *mm,</div><div class='ctx'> 	bust_spinlocks(1);</div><div class='ctx'> 	pr_alert("8&lt;--- cut here ---\n");</div><div class='ctx'> 	pr_alert("Unable to handle kernel %s at virtual address %08lx when %s\n",</div><div class='del'>-		 msg, addr, fsr &amp; FSR_LNX_PF ? "execute" :</div><div class='del'>-		 fsr &amp; FSR_WRITE ? "write" : "read");</div><div class='add'>+		 msg, addr, fsr &amp; FSR_LNX_PF ? "execute" : str_write_read(fsr &amp; FSR_WRITE));</div><div class='ctx'> </div><div class='ctx'> 	show_pte(KERN_ALERT, mm, addr);</div><div class='ctx'> 	die("Oops", regs, fsr);</div><div class='hunk'>@@ -163,6 +175,8 @@ __do_kernel_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (addr &lt; PAGE_SIZE) {</div><div class='ctx'> 		msg = "NULL pointer dereference";</div><div class='add'>+	} else if (is_permission_fault(fsr) &amp;&amp; fsr &amp; FSR_LNX_PF) {</div><div class='add'>+		msg = "execution of memory";</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (is_translation_fault(fsr) &amp;&amp;</div><div class='ctx'> 		    kfence_handle_page_fault(addr, is_write_fault(fsr), regs))</div><div class='hunk'>@@ -184,9 +198,6 @@ __do_user_fault(unsigned long addr, unsigned int fsr, unsigned int sig,</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='ctx'> </div><div class='del'>-	if (addr &gt; TASK_SIZE)</div><div class='del'>-		harden_branch_predictor();</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_DEBUG_USER</div><div class='ctx'> 	if (((user_debug &amp; UDBG_SEGV) &amp;&amp; (sig == SIGSEGV)) ||</div><div class='ctx'> 	    ((user_debug &amp; UDBG_BUS)  &amp;&amp; (sig == SIGBUS))) {</div><div class='hunk'>@@ -226,19 +237,6 @@ void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-static inline bool is_permission_fault(unsigned int fsr)</div><div class='del'>-{</div><div class='del'>-	int fs = fsr_fs(fsr);</div><div class='del'>-#ifdef CONFIG_ARM_LPAE</div><div class='del'>-	if ((fs &amp; FS_MMU_NOLL_MASK) == FS_PERM_NOLL)</div><div class='del'>-		return true;</div><div class='del'>-#else</div><div class='del'>-	if (fs == FS_L1_PERM || fs == FS_L2_PERM)</div><div class='del'>-		return true;</div><div class='del'>-#endif</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CPU_TTBR0_PAN</div><div class='ctx'> static inline bool ttbr0_usermode_access_allowed(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -261,6 +259,37 @@ static inline bool ttbr0_usermode_access_allowed(struct pt_regs *regs)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int __kprobes</div><div class='add'>+do_kernel_address_page_fault(struct mm_struct *mm, unsigned long addr,</div><div class='add'>+			     unsigned int fsr, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Fault from user mode for a kernel space address. User mode</div><div class='add'>+		 * should not be faulting in kernel space, which includes the</div><div class='add'>+		 * vector/khelper page. Handle the branch predictor hardening</div><div class='add'>+		 * while interrupts are still disabled, then send a SIGSEGV.</div><div class='add'>+		 */</div><div class='add'>+		harden_branch_predictor();</div><div class='add'>+		__do_user_fault(addr, fsr, SIGSEGV, SEGV_MAPERR, regs);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Fault from kernel mode. Enable interrupts if they were</div><div class='add'>+		 * enabled in the parent context. Section (upper page table)</div><div class='add'>+		 * translation faults are handled via do_translation_fault(),</div><div class='add'>+		 * so we will only get here for a non-present kernel space</div><div class='add'>+		 * PTE or PTE permission fault. This may happen in exceptional</div><div class='add'>+		 * circumstances and need the fixup tables to be walked.</div><div class='add'>+		 */</div><div class='add'>+		if (interrupts_enabled(regs))</div><div class='add'>+			local_irq_enable();</div><div class='add'>+</div><div class='add'>+		__do_kernel_fault(mm, addr, fsr, regs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __kprobes</div><div class='ctx'> do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='hunk'>@@ -268,11 +297,17 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> 	int sig, code;</div><div class='ctx'> 	vm_fault_t fault;</div><div class='ctx'> 	unsigned int flags = FAULT_FLAG_DEFAULT;</div><div class='del'>-	unsigned long vm_flags = VM_ACCESS_FLAGS;</div><div class='add'>+	vm_flags_t vm_flags = VM_ACCESS_FLAGS;</div><div class='ctx'> </div><div class='ctx'> 	if (kprobe_page_fault(regs, fsr))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Handle kernel addresses faults separately, which avoids touching</div><div class='add'>+	 * the mmap lock from contexts that are not able to sleep.</div><div class='add'>+	 */</div><div class='add'>+	if (addr &gt;= TASK_SIZE)</div><div class='add'>+		return do_kernel_address_page_fault(mm, addr, fsr, regs);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts if they were enabled in the parent context. */</div><div class='ctx'> 	if (interrupts_enabled(regs))</div><div class='hunk'>@@ -449,16 +484,20 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'>  * We enter here because the first level page table doesn't contain</div><div class='ctx'>  * a valid entry for the address.</div><div class='ctx'>  *</div><div class='del'>- * If the address is in kernel space (&gt;= TASK_SIZE), then we are</div><div class='del'>- * probably faulting in the vmalloc() area.</div><div class='add'>+ * If this is a user address (addr &lt; TASK_SIZE), we handle this as a</div><div class='add'>+ * normal page fault. This leaves the remainder of the function to handle</div><div class='add'>+ * kernel address translation faults.</div><div class='add'>+ *</div><div class='add'>+ * Since user mode is not permitted to access kernel addresses, pass these</div><div class='add'>+ * directly to do_kernel_address_page_fault() to handle.</div><div class='ctx'>  *</div><div class='del'>- * If the init_task's first level page tables contains the relevant</div><div class='del'>- * entry, we copy the it to this task.  If not, we send the process</div><div class='del'>- * a signal, fixup the exception, or oops the kernel.</div><div class='add'>+ * Otherwise, we're probably faulting in the vmalloc() area, so try to fix</div><div class='add'>+ * that up. Note that we must not take any locks or enable interrupts in</div><div class='add'>+ * this case.</div><div class='ctx'>  *</div><div class='del'>- * NOTE! We MUST NOT take any locks for this case. We may be in an</div><div class='del'>- * interrupt or a critical region, and should only copy the information</div><div class='del'>- * from the master page table, nothing more.</div><div class='add'>+ * If vmalloc() fixup fails, that means the non-leaf page tables did not</div><div class='add'>+ * contain an entry for this address, so handle this via</div><div class='add'>+ * do_kernel_address_page_fault().</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> static int __kprobes</div><div class='hunk'>@@ -524,7 +563,8 @@ do_translation_fault(unsigned long addr, unsigned int fsr,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> bad_area:</div><div class='del'>-	do_bad_area(addr, fsr, regs);</div><div class='add'>+	do_kernel_address_page_fault(current-&gt;mm, addr, fsr, regs);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #else					/* CONFIG_MMU */</div><div class='hunk'>@@ -544,7 +584,16 @@ do_translation_fault(unsigned long addr, unsigned int fsr,</div><div class='ctx'> static int</div><div class='ctx'> do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * If this is a kernel address, but from user mode, then userspace</div><div class='add'>+	 * is trying bad stuff. Invoke the branch predictor handling.</div><div class='add'>+	 * Interrupts are disabled here.</div><div class='add'>+	 */</div><div class='add'>+	if (addr &gt;= TASK_SIZE &amp;&amp; user_mode(regs))</div><div class='add'>+		harden_branch_predictor();</div><div class='add'>+</div><div class='ctx'> 	do_bad_area(addr, fsr, regs);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_ARM_LPAE */</div><div class='head'>diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c<br/>index 0749cf8a6637..19470d938b23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/flush.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/flush.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/flush.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/flush.c</a></div><div class='hunk'>@@ -227,9 +227,9 @@ void __flush_dcache_folio(struct address_space *mapping, struct folio *folio)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If this is a page cache page, and we have an aliasing VIPT cache,</div><div class='add'>+	 * If this is a page cache folio, and we have an aliasing VIPT cache,</div><div class='ctx'> 	 * we only need to do one flush - which would be at the relevant</div><div class='del'>-	 * userspace colour, which is congruent with page-&gt;index.</div><div class='add'>+	 * userspace colour, which is congruent with folio-&gt;index.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (mapping &amp;&amp; cache_is_vipt_aliasing())</div><div class='ctx'> 		flush_pfn_alias(folio_pfn(folio), folio_pos(folio));</div><div class='hunk'>@@ -304,7 +304,7 @@ void __sync_icache_dcache(pte_t pteval)</div><div class='ctx'> 	else</div><div class='ctx'> 		mapping = NULL;</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(mapping, folio);</div><div class='ctx'> </div><div class='ctx'> 	if (pte_exec(pteval))</div><div class='hunk'>@@ -343,8 +343,8 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (!cache_ops_need_broadcast() &amp;&amp; cache_is_vipt_nonaliasing()) {</div><div class='del'>-		if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='del'>-			clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='add'>+			clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -352,14 +352,14 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> </div><div class='ctx'> 	if (!cache_ops_need_broadcast() &amp;&amp;</div><div class='ctx'> 	    mapping &amp;&amp; !folio_mapped(folio))</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	else {</div><div class='ctx'> 		__flush_dcache_folio(mapping, folio);</div><div class='ctx'> 		if (mapping &amp;&amp; cache_is_vivt())</div><div class='ctx'> 			__flush_dcache_aliases(mapping, folio);</div><div class='ctx'> 		else if (mapping)</div><div class='ctx'> 			__flush_icache_all();</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_folio);</div><div class='head'>diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c<br/>index 448e57c6f653..4a833e89782a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/idmap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/idmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/idmap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/idmap.c</a></div><div class='hunk'>@@ -84,8 +84,15 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,</div><div class='ctx'> 	unsigned long addr, end;</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+	addr = (phys_addr_t)(text_start) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)</div><div class='add'>+		+ CONFIG_XIP_PHYS_ADDR;</div><div class='add'>+	end = (phys_addr_t)(text_end) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)</div><div class='add'>+		+ CONFIG_XIP_PHYS_ADDR;</div><div class='add'>+#else</div><div class='ctx'> 	addr = virt_to_idmap(text_start);</div><div class='ctx'> 	end = virt_to_idmap(text_end);</div><div class='add'>+#endif</div><div class='ctx'> 	pr_info("Setting up static identity map for 0x%lx - 0x%lx\n", addr, end);</div><div class='ctx'> </div><div class='ctx'> 	prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;</div><div class='head'>diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c<br/>index 5345d218899a..54bdca025c9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/init.c</a></div><div class='hunk'>@@ -237,56 +237,17 @@ static inline void poison_init_mem(void *s, size_t count)</div><div class='ctx'> 		*p++ = 0xe7fddef0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init free_highpages(void)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	unsigned long max_low = max_low_pfn;</div><div class='del'>-	phys_addr_t range_start, range_end;</div><div class='del'>-	u64 i;</div><div class='del'>-</div><div class='del'>-	/* set highmem page free */</div><div class='del'>-	for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,</div><div class='del'>-				&amp;range_start, &amp;range_end, NULL) {</div><div class='del'>-		unsigned long start = PFN_UP(range_start);</div><div class='del'>-		unsigned long end = PFN_DOWN(range_end);</div><div class='del'>-</div><div class='del'>-		/* Ignore complete lowmem entries */</div><div class='del'>-		if (end &lt;= max_low)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Truncate partial highmem entries */</div><div class='del'>-		if (start &lt; max_low)</div><div class='del'>-			start = max_low;</div><div class='del'>-</div><div class='del'>-		for (; start &lt; end; start++)</div><div class='del'>-			free_highmem_page(pfn_to_page(start));</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mem_init() marks the free areas in the mem_map and tells us how much</div><div class='del'>- * memory is free.  This is done after various parts of the system have</div><div class='del'>- * claimed their memory after the kernel image.</div><div class='del'>- */</div><div class='del'>-void __init mem_init(void)</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='ctx'> 	swiotlb_init(max_pfn &gt; arm_dma_pfn_limit, SWIOTLB_VERBOSE);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	set_max_mapnr(pfn_to_page(max_pfn) - mem_map);</div><div class='del'>-</div><div class='del'>-	/* this will put all unused low memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SA1111</div><div class='ctx'> 	/* now that our DMA memory is actually so designated, we can free it */</div><div class='del'>-	free_reserved_area(__va(PHYS_OFFSET), swapper_pg_dir, -1, NULL);</div><div class='add'>+	memblock_phys_free(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	free_highpages();</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check boundaries twice: Some fundamental inconsistencies can</div><div class='ctx'> 	 * be detected at build time already.</div><div class='head'>diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c<br/>index 794cfea9f9d4..27e64f782cb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/ioremap.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -115,16 +116,40 @@ int ioremap_page(unsigned long virt, unsigned long phys,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap_page);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KASAN</div><div class='add'>+static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)kasan_mem_to_shadow((void *)addr);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void memcpy_pgd(struct mm_struct *mm, unsigned long start,</div><div class='add'>+		       unsigned long end)</div><div class='add'>+{</div><div class='add'>+	end = ALIGN(end, PGDIR_SIZE);</div><div class='add'>+	memcpy(pgd_offset(mm, start), pgd_offset_k(start),</div><div class='add'>+	       sizeof(pgd_t) * (pgd_index(end) - pgd_index(start)));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __check_vmalloc_seq(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	int seq;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		seq = atomic_read(&amp;init_mm.context.vmalloc_seq);</div><div class='del'>-		memcpy(pgd_offset(mm, VMALLOC_START),</div><div class='del'>-		       pgd_offset_k(VMALLOC_START),</div><div class='del'>-		       sizeof(pgd_t) * (pgd_index(VMALLOC_END) -</div><div class='del'>-					pgd_index(VMALLOC_START)));</div><div class='add'>+		seq = atomic_read_acquire(&amp;init_mm.context.vmalloc_seq);</div><div class='add'>+		memcpy_pgd(mm, VMALLOC_START, VMALLOC_END);</div><div class='add'>+		if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) {</div><div class='add'>+			unsigned long start =</div><div class='add'>+				arm_kasan_mem_to_shadow(VMALLOC_START);</div><div class='add'>+			unsigned long end =</div><div class='add'>+				arm_kasan_mem_to_shadow(VMALLOC_END);</div><div class='add'>+			memcpy_pgd(mm, start, end);</div><div class='add'>+		}</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Use a store-release so that other CPUs that observe the</div><div class='ctx'> 		 * counter's new value are guaranteed to see the results of the</div><div class='hunk'>@@ -411,7 +436,7 @@ void __arm_iomem_set_ro(void __iomem *ptr, size_t size)</div><div class='ctx'> 	set_memory_ro((unsigned long)ptr, PAGE_ALIGN(size) / PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *arch_memremap_wb(phys_addr_t phys_addr, size_t size)</div><div class='add'>+void *arch_memremap_wb(phys_addr_t phys_addr, size_t size, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	return (__force void *)arch_ioremap_caller(phys_addr, size,</div><div class='ctx'> 						   MT_MEMORY_RW,</div><div class='hunk'>@@ -490,7 +515,5 @@ void __init early_ioremap_init(void)</div><div class='ctx'> bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,</div><div class='ctx'> 				 unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pfn = PHYS_PFN(offset);</div><div class='del'>-</div><div class='del'>-	return memblock_is_map_memory(pfn);</div><div class='add'>+	return memblock_is_map_memory(offset);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mm/kasan_init.c b/arch/arm/mm/kasan_init.c<br/>index 111d4f703136..c6625e808bf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/kasan_init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/kasan_init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/kasan_init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/kasan_init.c</a></div><div class='hunk'>@@ -300,6 +300,6 @@ void __init kasan_init(void)</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	memset(kasan_early_shadow_page, 0, PAGE_SIZE);</div><div class='del'>-	pr_info("Kernel address sanitizer initialized\n");</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c<br/>index f85c177cdf8d..8bac96e205ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/mmu.c</a></div><div class='hunk'>@@ -726,13 +726,8 @@ EXPORT_SYMBOL(phys_mem_access_prot);</div><div class='ctx'> </div><div class='ctx'> static void __init *early_alloc(unsigned long sz)</div><div class='ctx'> {</div><div class='del'>-	void *ptr = memblock_alloc(sz, sz);</div><div class='add'>+	return memblock_alloc_or_panic(sz, sz);</div><div class='ctx'> </div><div class='del'>-	if (!ptr)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, sz, sz);</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *__init late_alloc(unsigned long sz)</div><div class='hunk'>@@ -740,9 +735,9 @@ static void *__init late_alloc(unsigned long sz)</div><div class='ctx'> 	void *ptdesc = pagetable_alloc(GFP_PGTABLE_KERNEL &amp; ~__GFP_HIGHMEM,</div><div class='ctx'> 			get_order(sz));</div><div class='ctx'> </div><div class='del'>-	if (!ptdesc || !pagetable_pte_ctor(ptdesc))</div><div class='add'>+	if (!ptdesc || !pagetable_pte_ctor(NULL, ptdesc))</div><div class='ctx'> 		BUG();</div><div class='del'>-	return ptdesc_to_virt(ptdesc);</div><div class='add'>+	return ptdesc_address(ptdesc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static pte_t * __init arm_pte_alloc(pmd_t *pmd, unsigned long addr,</div><div class='hunk'>@@ -1027,10 +1022,7 @@ void __init iotable_init(struct map_desc *io_desc, int nr)</div><div class='ctx'> 	if (!nr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	svm = memblock_alloc(sizeof(*svm) * nr, __alignof__(*svm));</div><div class='del'>-	if (!svm)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",</div><div class='del'>-		      __func__, sizeof(*svm) * nr, __alignof__(*svm));</div><div class='add'>+	svm = memblock_alloc_or_panic(sizeof(*svm) * nr, __alignof__(*svm));</div><div class='ctx'> </div><div class='ctx'> 	for (md = io_desc; nr; md++, nr--) {</div><div class='ctx'> 		create_mapping(md);</div><div class='hunk'>@@ -1052,10 +1044,7 @@ void __init vm_reserve_area_early(unsigned long addr, unsigned long size,</div><div class='ctx'> 	struct vm_struct *vm;</div><div class='ctx'> 	struct static_vm *svm;</div><div class='ctx'> </div><div class='del'>-	svm = memblock_alloc(sizeof(*svm), __alignof__(*svm));</div><div class='del'>-	if (!svm)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",</div><div class='del'>-		      __func__, sizeof(*svm), __alignof__(*svm));</div><div class='add'>+	svm = memblock_alloc_or_panic(sizeof(*svm), __alignof__(*svm));</div><div class='ctx'> </div><div class='ctx'> 	vm = &amp;svm-&gt;vm;</div><div class='ctx'> 	vm-&gt;addr = (void *)addr;</div><div class='hunk'>@@ -1403,18 +1392,6 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Map the kernel if it is XIP.</div><div class='del'>-	 * It is always first in the modulearea.</div><div class='del'>-	 */</div><div class='del'>-#ifdef CONFIG_XIP_KERNEL</div><div class='del'>-	map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR &amp; SECTION_MASK);</div><div class='del'>-	map.virtual = MODULES_VADDR;</div><div class='del'>-	map.length = ((unsigned long)_exiprom - map.virtual + ~SECTION_MASK) &amp; SECTION_MASK;</div><div class='del'>-	map.type = MT_ROM;</div><div class='del'>-	create_mapping(&amp;map);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Map the cache flushing regions.</div><div class='ctx'> 	 */</div><div class='ctx'> #ifdef FLUSH_BASE</div><div class='hunk'>@@ -1603,12 +1580,27 @@ static void __init map_kernel(void)</div><div class='ctx'> 	 * This will only persist until we turn on proper memory management later on</div><div class='ctx'> 	 * and we remap the whole kernel with page granularity.</div><div class='ctx'> 	 */</div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+	phys_addr_t kernel_nx_start = kernel_sec_start;</div><div class='add'>+#else</div><div class='ctx'> 	phys_addr_t kernel_x_start = kernel_sec_start;</div><div class='ctx'> 	phys_addr_t kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);</div><div class='ctx'> 	phys_addr_t kernel_nx_start = kernel_x_end;</div><div class='add'>+#endif</div><div class='ctx'> 	phys_addr_t kernel_nx_end = kernel_sec_end;</div><div class='ctx'> 	struct map_desc map;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Map the kernel if it is XIP.</div><div class='add'>+	 * It is always first in the modulearea.</div><div class='add'>+	 */</div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+	map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR &amp; SECTION_MASK);</div><div class='add'>+	map.virtual = MODULES_VADDR;</div><div class='add'>+	map.length = ((unsigned long)_exiprom - map.virtual + ~SECTION_MASK) &amp; SECTION_MASK;</div><div class='add'>+	map.type = MT_ROM;</div><div class='add'>+	create_mapping(&amp;map);</div><div class='add'>+#else</div><div class='ctx'> 	map.pfn = __phys_to_pfn(kernel_x_start);</div><div class='ctx'> 	map.virtual = __phys_to_virt(kernel_x_start);</div><div class='ctx'> 	map.length = kernel_x_end - kernel_x_start;</div><div class='hunk'>@@ -1618,7 +1610,7 @@ static void __init map_kernel(void)</div><div class='ctx'> 	/* If the nx part is small it may end up covered by the tail of the RWX section */</div><div class='ctx'> 	if (kernel_x_end == kernel_nx_end)</div><div class='ctx'> 		return;</div><div class='del'>-</div><div class='add'>+#endif</div><div class='ctx'> 	map.pfn = __phys_to_pfn(kernel_nx_start);</div><div class='ctx'> 	map.virtual = __phys_to_virt(kernel_nx_start);</div><div class='ctx'> 	map.length = kernel_nx_end - kernel_nx_start;</div><div class='hunk'>@@ -1764,6 +1756,11 @@ void __init paging_init(const struct machine_desc *mdesc)</div><div class='ctx'> {</div><div class='ctx'> 	void *zero_page;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XIP_KERNEL</div><div class='add'>+	/* Store the kernel RW RAM region start/end in these variables */</div><div class='add'>+	kernel_sec_start = CONFIG_PHYS_OFFSET &amp; SECTION_MASK;</div><div class='add'>+	kernel_sec_end = round_up(__pa(_end), SECTION_SIZE);</div><div class='add'>+#endif</div><div class='ctx'> 	pr_debug("physical kernel sections: 0x%08llx-0x%08llx\n",</div><div class='ctx'> 		 kernel_sec_start, kernel_sec_end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c<br/>index c415f3859b20..d638cc87807e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/nommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/nommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/nommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/nommu.c</a></div><div class='hunk'>@@ -162,10 +162,7 @@ void __init paging_init(const struct machine_desc *mdesc)</div><div class='ctx'> 	mpu_setup();</div><div class='ctx'> </div><div class='ctx'> 	/* allocate the zero page. */</div><div class='del'>-	zero_page = (void *)memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!zero_page)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+	zero_page = (void *)memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	bootmem_init();</div><div class='ctx'> </div><div class='hunk'>@@ -251,7 +248,7 @@ void __iomem *pci_remap_cfgspace(resource_size_t res_cookie, size_t size)</div><div class='ctx'> EXPORT_SYMBOL_GPL(pci_remap_cfgspace);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void *arch_memremap_wb(phys_addr_t phys_addr, size_t size)</div><div class='add'>+void *arch_memremap_wb(phys_addr_t phys_addr, size_t size, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	return (void *)phys_addr;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c<br/>index f8e9bc58a84f..4eb81b7ed03a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/pgd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/pgd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/pgd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/pgd.c</a></div><div class='hunk'>@@ -17,11 +17,11 @@</div><div class='ctx'> #include "mm.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='del'>-#define __pgd_alloc()	kmalloc_array(PTRS_PER_PGD, sizeof(pgd_t), GFP_KERNEL)</div><div class='del'>-#define __pgd_free(pgd)	kfree(pgd)</div><div class='add'>+#define _pgd_alloc(mm)		kmalloc_array(PTRS_PER_PGD, sizeof(pgd_t), GFP_KERNEL | __GFP_ZERO)</div><div class='add'>+#define _pgd_free(mm, pgd)	kfree(pgd)</div><div class='ctx'> #else</div><div class='del'>-#define __pgd_alloc()	(pgd_t *)__get_free_pages(GFP_KERNEL, 2)</div><div class='del'>-#define __pgd_free(pgd)	free_pages((unsigned long)pgd, 2)</div><div class='add'>+#define _pgd_alloc(mm)		__pgd_alloc(mm, 2)</div><div class='add'>+#define _pgd_free(mm, pgd)	__pgd_free(mm, pgd)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -35,12 +35,10 @@ pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> 	pmd_t *new_pmd, *init_pmd;</div><div class='ctx'> 	pte_t *new_pte, *init_pte;</div><div class='ctx'> </div><div class='del'>-	new_pgd = __pgd_alloc();</div><div class='add'>+	new_pgd = _pgd_alloc(mm);</div><div class='ctx'> 	if (!new_pgd)</div><div class='ctx'> 		goto no_pgd;</div><div class='ctx'> </div><div class='del'>-	memset(new_pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Copy over the kernel and IO PGD entries</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -134,7 +132,7 @@ no_pmd:</div><div class='ctx'> no_pud:</div><div class='ctx'> 	p4d_free(mm, new_p4d);</div><div class='ctx'> no_p4d:</div><div class='del'>-	__pgd_free(new_pgd);</div><div class='add'>+	_pgd_free(mm, new_pgd);</div><div class='ctx'> no_pgd:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -207,5 +205,5 @@ no_pgd:</div><div class='ctx'> 		p4d_free(mm, p4d);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-	__pgd_free(pgd_base);</div><div class='add'>+	_pgd_free(mm, pgd_base);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S<br/>index d0ce3414a13e..4612a4961e81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1020.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1020.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1020.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm1020.S</a></div><div class='hunk'>@@ -203,7 +203,7 @@ SYM_FUNC_END(arm1020_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm1020_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm1020_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm1020_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S<br/>index 64f031bf6eff..b4a8a3a8eda3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1020e.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1020e.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1020e.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm1020e.S</a></div><div class='hunk'>@@ -200,7 +200,7 @@ SYM_FUNC_END(arm1020e_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm1020e_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm1020e_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm1020e_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S<br/>index 42ed5ed07252..709870e99e19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1022.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1022.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1022.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm1022.S</a></div><div class='hunk'>@@ -199,7 +199,7 @@ SYM_FUNC_END(arm1022_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm1022_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm1022_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm1022_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S<br/>index b3ae62cd553a..02f7370a8c5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1026.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm1026.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm1026.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm1026.S</a></div><div class='hunk'>@@ -194,7 +194,7 @@ SYM_FUNC_END(arm1026_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm1026_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm1026_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm1026_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S<br/>index a30df54ad5fa..4727f4b5b6e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm920.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm920.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm920.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm920.S</a></div><div class='hunk'>@@ -180,7 +180,7 @@ SYM_FUNC_END(arm920_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm920_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm920_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm920_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S<br/>index aac4e048100d..5a4a3f4f2683 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm922.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm922.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm922.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm922.S</a></div><div class='hunk'>@@ -182,7 +182,7 @@ SYM_FUNC_END(arm922_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm922_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm922_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm922_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S<br/>index 035941faeb2e..1c4830afe1d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm925.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm925.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm925.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm925.S</a></div><div class='hunk'>@@ -229,7 +229,7 @@ SYM_FUNC_END(arm925_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm925_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm925_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm925_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S<br/>index 6f43d6af2d9a..a09cc3e02efd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm926.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm926.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm926.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm926.S</a></div><div class='hunk'>@@ -192,7 +192,7 @@ SYM_FUNC_END(arm926_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm926_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm926_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm926_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S<br/>index 0d30bb25c42b..545c076c36d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm940.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm940.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm940.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm940.S</a></div><div class='hunk'>@@ -153,7 +153,7 @@ SYM_FUNC_END(arm940_coherent_kern_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm940_coherent_user_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm940_flush_kern_dcache_area</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm940_coherent_user_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S<br/>index 27750ace2ced..f3d4e18c3fba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm946.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-arm946.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-arm946.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-arm946.S</a></div><div class='hunk'>@@ -173,7 +173,7 @@ SYM_FUNC_END(arm946_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(arm946_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	arm946_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(arm946_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S<br/>index f67b2ffac854..7f08d06c9625 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-feroceon.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-feroceon.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-feroceon.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-feroceon.S</a></div><div class='hunk'>@@ -208,7 +208,7 @@ SYM_FUNC_END(feroceon_flush_user_cache_range)</div><div class='ctx'>  */</div><div class='ctx'> 	.align	5</div><div class='ctx'> SYM_TYPED_FUNC_START(feroceon_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	feroceon_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(feroceon_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S<br/>index 8e9f38da863a..4669c63e3121 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-mohawk.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-mohawk.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-mohawk.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-mohawk.S</a></div><div class='hunk'>@@ -163,7 +163,7 @@ SYM_FUNC_END(mohawk_flush_user_cache_range)</div><div class='ctx'>  *	- end	- virtual end address</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(mohawk_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	mohawk_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(mohawk_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S<br/>index 5fb9a6aecb00..2cd933342679 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-v7.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-v7.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-v7.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-v7.S</a></div><div class='hunk'>@@ -94,7 +94,7 @@ SYM_TYPED_FUNC_START(cpu_v7_dcache_clean_area)</div><div class='ctx'> 	ret	lr</div><div class='ctx'> SYM_FUNC_END(cpu_v7_dcache_clean_area)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM_PSCI</div><div class='add'>+#if defined(CONFIG_ARM_PSCI) &amp;&amp; defined(CONFIG_HARDEN_BRANCH_PREDICTOR)</div><div class='ctx'> 	.arch_extension sec</div><div class='ctx'> SYM_TYPED_FUNC_START(cpu_v7_smc_switch_mm)</div><div class='ctx'> 	stmfd	sp!, {r0 - r3}</div><div class='head'>diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S<br/>index 14927b380452..fd25634a2ed5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-xsc3.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/proc-xsc3.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/proc-xsc3.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/proc-xsc3.S</a></div><div class='hunk'>@@ -223,7 +223,7 @@ SYM_FUNC_END(xsc3_flush_user_cache_range)</div><div class='ctx'>  *	it also trashes the mini I-cache used by JTAG debuggers.</div><div class='ctx'>  */</div><div class='ctx'> SYM_TYPED_FUNC_START(xsc3_coherent_kern_range)</div><div class='del'>-#ifdef CONFIG_CFI_CLANG /* Fallthrough if !CFI */</div><div class='add'>+#ifdef CONFIG_CFI /* Fallthrough if !CFI */</div><div class='ctx'> 	b	xsc3_coherent_user_range</div><div class='ctx'> #endif</div><div class='ctx'> SYM_FUNC_END(xsc3_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/tlb-v4.S b/arch/arm/mm/tlb-v4.S<br/>index 09ff69008d94..079774a02be6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/tlb-v4.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/mm/tlb-v4.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/mm/tlb-v4.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/mm/tlb-v4.S</a></div><div class='hunk'>@@ -52,7 +52,7 @@ SYM_FUNC_END(v4_flush_user_tlb_range)</div><div class='ctx'>  *	- start - virtual address (may not be aligned)</div><div class='ctx'>  *	- end   - virtual address (may not be aligned)</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='ctx'> SYM_TYPED_FUNC_START(v4_flush_kern_tlb_range)</div><div class='ctx'> 	b	.v4_flush_kern_tlb_range</div><div class='ctx'> SYM_FUNC_END(v4_flush_kern_tlb_range)</div><div class='head'>diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c<br/>index 595e9cb33c1d..49e29b7894a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/plat-orion/gpio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/plat-orion/gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/plat-orion/gpio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/plat-orion/gpio.c</a></div><div class='hunk'>@@ -211,7 +211,7 @@ orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value)</div><div class='add'>+static int orion_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct orion_gpio_chip *ochip = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -219,6 +219,8 @@ static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value)</div><div class='ctx'> 	spin_lock_irqsave(&amp;ochip-&gt;lock, flags);</div><div class='ctx'> 	__set_level(ochip, pin, value);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ochip-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin)</div><div class='hunk'>@@ -466,14 +468,14 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)</div><div class='ctx'> </div><div class='ctx'> 		if (is_out) {</div><div class='ctx'> 			seq_printf(s, " out %s %s\n",</div><div class='del'>-				   out &amp; msk ? "hi" : "lo",</div><div class='add'>+				   str_hi_lo(out &amp; msk),</div><div class='ctx'> 				   blink &amp; msk ? "(blink )" : "");</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(s, " in  %s (act %s) - IRQ",</div><div class='del'>-			   (data_in ^ in_pol) &amp; msk  ? "hi" : "lo",</div><div class='del'>-			   in_pol &amp; msk ? "lo" : "hi");</div><div class='add'>+			   str_hi_lo((data_in ^ in_pol) &amp; msk),</div><div class='add'>+			   str_lo_hi(in_pol &amp; msk));</div><div class='ctx'> 		if (!((edg_msk | lvl_msk) &amp; msk)) {</div><div class='ctx'> 			seq_puts(s, " disabled\n");</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -496,11 +498,10 @@ static void orion_gpio_unmask_irq(struct irq_data *d)</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	reg_val = irq_reg_readl(gc, ct-&gt;regs.mask);</div><div class='ctx'> 	reg_val |= mask;</div><div class='ctx'> 	irq_reg_writel(gc, reg_val, ct-&gt;regs.mask);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void orion_gpio_mask_irq(struct irq_data *d)</div><div class='hunk'>@@ -510,11 +511,10 @@ static void orion_gpio_mask_irq(struct irq_data *d)</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	reg_val = irq_reg_readl(gc, ct-&gt;regs.mask);</div><div class='ctx'> 	reg_val &amp;= ~mask;</div><div class='ctx'> 	irq_reg_writel(gc, reg_val, ct-&gt;regs.mask);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init orion_gpio_init(int gpio_base, int ngpio,</div><div class='hunk'>@@ -602,12 +602,12 @@ void __init orion_gpio_init(int gpio_base, int ngpio,</div><div class='ctx'> 			       IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup irq domain on top of the generic chip. */</div><div class='del'>-	ochip-&gt;domain = irq_domain_add_legacy(NULL,</div><div class='del'>-					      ochip-&gt;chip.ngpio,</div><div class='del'>-					      ochip-&gt;secondary_irq_base,</div><div class='del'>-					      ochip-&gt;secondary_irq_base,</div><div class='del'>-					      &amp;irq_domain_simple_ops,</div><div class='del'>-					      ochip);</div><div class='add'>+	ochip-&gt;domain = irq_domain_create_legacy(NULL,</div><div class='add'>+						 ochip-&gt;chip.ngpio,</div><div class='add'>+						 ochip-&gt;secondary_irq_base,</div><div class='add'>+						 ochip-&gt;secondary_irq_base,</div><div class='add'>+						 &amp;irq_domain_simple_ops,</div><div class='add'>+						 ochip);</div><div class='ctx'> 	if (!ochip-&gt;domain)</div><div class='ctx'> 		panic("%s: couldn't allocate irq domain (DT).\n",</div><div class='ctx'> 		      ochip-&gt;chip.label);</div><div class='head'>diff --git a/arch/arm/probes/kprobes/core.c b/arch/arm/probes/kprobes/core.c<br/>index d8238da095df..9fd877c87a38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/kprobes/core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/kprobes/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/kprobes/core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/probes/kprobes/core.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../decode-arm.h"</div><div class='head'>diff --git a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c<br/>index 7f65048380ca..966c6042c5ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/kprobes/opt-arm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/kprobes/opt-arm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/kprobes/opt-arm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/probes/kprobes/opt-arm.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> /* for arm_gen_branch */</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> /* for patch_text */</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/probes/uprobes/core.c b/arch/arm/probes/uprobes/core.c<br/>index f5f790c6e5f8..3d96fb41d624 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/uprobes/core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/probes/uprobes/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/probes/uprobes/core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/probes/uprobes/core.c</a></div><div class='hunk'>@@ -26,11 +26,11 @@ bool is_swbp_insn(uprobe_opcode_t *insn)</div><div class='ctx'> 		(UPROBE_SWBP_ARM_INSN &amp; 0x0fffffff);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm,</div><div class='add'>+int set_swbp(struct arch_uprobe *auprobe, struct vm_area_struct *vma,</div><div class='ctx'> 	     unsigned long vaddr)</div><div class='ctx'> {</div><div class='del'>-	return uprobe_write_opcode(auprobe, mm, vaddr,</div><div class='del'>-		   __opcode_to_mem_arm(auprobe-&gt;bpinsn));</div><div class='add'>+	return uprobe_write_opcode(auprobe, vma, vaddr,</div><div class='add'>+		   __opcode_to_mem_arm(auprobe-&gt;bpinsn), true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool arch_uprobe_ignore(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='head'>diff --git a/arch/arm/tools/syscall.tbl b/arch/arm/tools/syscall.tbl<br/>index 23c98203c40f..b07e699aaa3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/tools/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/tools/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/tools/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/tools/syscall.tbl</a></div><div class='hunk'>@@ -477,3 +477,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile<br/>index 01067a2bc43b..cf8cd39ab804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/vdso/Makefile</a></div><div class='hunk'>@@ -1,11 +1,11 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> hostprogs := vdsomunge</div><div class='ctx'> </div><div class='del'>-obj-vdso := vgettimeofday.o datapage.o note.o</div><div class='add'>+obj-vdso := vgettimeofday.o note.o</div><div class='ctx'> </div><div class='ctx'> # Build rules</div><div class='ctx'> targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.so.raw vdso.lds</div><div class='hunk'>@@ -26,7 +26,7 @@ CPPFLAGS_vdso.lds += -P -C -U$(ARCH)</div><div class='ctx'> CFLAGS_REMOVE_vdso.o = -pg</div><div class='ctx'> </div><div class='ctx'> # Force -O2 to avoid libgcc dependencies</div><div class='del'>-CFLAGS_REMOVE_vgettimeofday.o = -pg -Os $(RANDSTRUCT_CFLAGS) $(GCC_PLUGINS_CFLAGS)</div><div class='add'>+CFLAGS_REMOVE_vgettimeofday.o = -pg -Os $(RANDSTRUCT_CFLAGS) $(KSTACK_ERASE_CFLAGS) $(GCC_PLUGINS_CFLAGS)</div><div class='ctx'> ifeq ($(c-gettimeofday-y),)</div><div class='ctx'> CFLAGS_vgettimeofday.o = -O2</div><div class='ctx'> else</div><div class='head'>diff --git a/arch/arm/vdso/datapage.S b/arch/arm/vdso/datapage.S<br/>deleted file mode 100644<br/>index 9cd73b725d9f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/vdso/datapage.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/datapage.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-</div><div class='del'>-	.align 2</div><div class='del'>-.L_vdso_data_ptr:</div><div class='del'>-	.long	_start - . - VDSO_DATA_SIZE</div><div class='del'>-</div><div class='del'>-ENTRY(__get_datapage)</div><div class='del'>-	.fnstart</div><div class='del'>-	adr	r0, .L_vdso_data_ptr</div><div class='del'>-	ldr	r1, [r0]</div><div class='del'>-	add	r0, r0, r1</div><div class='del'>-	bx	lr</div><div class='del'>-	.fnend</div><div class='del'>-ENDPROC(__get_datapage)</div><div class='head'>diff --git a/arch/arm/vdso/vdso.lds.S b/arch/arm/vdso/vdso.lds.S<br/>index 165d1d2eb76b..7c08371f4400 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/vdso/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vdso/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/vdso/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/vdso/vdso.lds.S</a></div><div class='hunk'>@@ -13,13 +13,14 @@</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")</div><div class='ctx'> OUTPUT_ARCH(arm)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_start = .);</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='ctx'> </div><div class='ctx'> 	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h<br/>index 32090b0fb250..a2f0c47e0ce7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/vfp/vfpinstr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vfp/vfpinstr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/vfp/vfpinstr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/vfp/vfpinstr.h</a></div><div class='hunk'>@@ -62,8 +62,6 @@</div><div class='ctx'> #define FPSCR_C (1 &lt;&lt; 29)</div><div class='ctx'> #define FPSCR_V	(1 &lt;&lt; 28)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_AS_VFP_VMRS_FPINST</div><div class='del'>-</div><div class='ctx'> #define fmrx(_vfp_) ({				\</div><div class='ctx'> 	u32 __v;				\</div><div class='ctx'> 	asm volatile (".fpu	vfpv2\n"	\</div><div class='hunk'>@@ -78,26 +76,6 @@</div><div class='ctx'> 		     : : "r" (_var_) : "cc");	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define vfpreg(_vfp_) #_vfp_</div><div class='del'>-</div><div class='del'>-#define fmrx(_vfp_) ({						\</div><div class='del'>-	u32 __v;						\</div><div class='del'>-	asm volatile ("mrc p10, 7, %0, " vfpreg(_vfp_) ","	\</div><div class='del'>-		      "cr0, 0 @ fmrx	%0, " #_vfp_		\</div><div class='del'>-		     : "=r" (__v) : : "cc");			\</div><div class='del'>-	__v;							\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define fmxr(_vfp_, _var_) ({					\</div><div class='del'>-	asm volatile ("mcr p10, 7, %0, " vfpreg(_vfp_) ","	\</div><div class='del'>-		      "cr0, 0 @ fmxr	" #_vfp_ ", %0"		\</div><div class='del'>-		     : : "r" (_var_) : "cc");			\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> u32 vfp_single_cpdo(u32 inst, u32 fpscr);</div><div class='ctx'> u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c<br/>index b68efe643a12..e559ad3cd148 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/vfp/vfpmodule.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/vfp/vfpmodule.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/vfp/vfpmodule.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/vfp/vfpmodule.c</a></div><div class='hunk'>@@ -56,6 +56,34 @@ extern unsigned int VFP_arch_feroceon __alias(VFP_arch);</div><div class='ctx'> union vfp_state *vfp_current_hw_state[NR_CPUS];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Claim ownership of the VFP unit.</div><div class='add'>+ *</div><div class='add'>+ * The caller may change VFP registers until vfp_state_release() is called.</div><div class='add'>+ *</div><div class='add'>+ * local_bh_disable() is used to disable preemption and to disable VFP</div><div class='add'>+ * processing in softirq context. On PREEMPT_RT kernels local_bh_disable() is</div><div class='add'>+ * not sufficient because it only serializes soft interrupt related sections</div><div class='add'>+ * via a local lock, but stays preemptible. Disabling preemption is the right</div><div class='add'>+ * choice here as bottom half processing is always in thread context on RT</div><div class='add'>+ * kernels so it implicitly prevents bottom half processing as well.</div><div class='add'>+ */</div><div class='add'>+static void vfp_state_hold(void)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		local_bh_disable();</div><div class='add'>+	else</div><div class='add'>+		preempt_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vfp_state_release(void)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		local_bh_enable();</div><div class='add'>+	else</div><div class='add'>+		preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Is 'thread's most up to date state stored in this CPUs hardware?</div><div class='ctx'>  * Must be called from non-preemptible context.</div><div class='ctx'>  */</div><div class='hunk'>@@ -140,7 +168,7 @@ static void vfp_thread_copy(struct thread_info *thread)</div><div class='ctx'> /*</div><div class='ctx'>  * When this function is called with the following 'cmd's, the following</div><div class='ctx'>  * is true while this function is being run:</div><div class='del'>- *  THREAD_NOFTIFY_SWTICH:</div><div class='add'>+ *  THREAD_NOTIFY_SWITCH:</div><div class='ctx'>  *   - the previously running thread will not be scheduled onto another CPU.</div><div class='ctx'>  *   - the next thread to be run (v) will not be running on another CPU.</div><div class='ctx'>  *   - thread-&gt;cpu is the local CPU number</div><div class='hunk'>@@ -240,7 +268,7 @@ static void vfp_panic(char *reason, u32 inst)</div><div class='ctx'> /*</div><div class='ctx'>  * Process bitmask of exception conditions.</div><div class='ctx'>  */</div><div class='del'>-static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)</div><div class='add'>+static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr)</div><div class='ctx'> {</div><div class='ctx'> 	int si_code = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -248,8 +276,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_</div><div class='ctx'> </div><div class='ctx'> 	if (exceptions == VFP_EXCEPTION_ERROR) {</div><div class='ctx'> 		vfp_panic("unhandled bounce", inst);</div><div class='del'>-		vfp_raise_sigfpe(FPE_FLTINV, regs);</div><div class='del'>-		return;</div><div class='add'>+		return FPE_FLTINV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -277,8 +304,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_</div><div class='ctx'> 	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);</div><div class='ctx'> 	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);</div><div class='ctx'> </div><div class='del'>-	if (si_code)</div><div class='del'>-		vfp_raise_sigfpe(si_code, regs);</div><div class='add'>+	return si_code;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -324,6 +350,8 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)</div><div class='ctx'> static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u32 fpscr, orig_fpscr, fpsid, exceptions;</div><div class='add'>+	int si_code2 = 0;</div><div class='add'>+	int si_code = 0;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);</div><div class='ctx'> </div><div class='hunk'>@@ -369,8 +397,8 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'> 		 * unallocated VFP instruction but with FPSCR.IXE set and not</div><div class='ctx'> 		 * on VFP subarch 1.</div><div class='ctx'> 		 */</div><div class='del'>-		 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);</div><div class='del'>-		return;</div><div class='add'>+		si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr);</div><div class='add'>+		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -394,14 +422,14 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'> 	 */</div><div class='ctx'> 	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);</div><div class='ctx'> 	if (exceptions)</div><div class='del'>-		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);</div><div class='add'>+		si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there isn't a second FP instruction, exit now. Note that</div><div class='ctx'> 	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((fpexc &amp; (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))</div><div class='del'>-		return;</div><div class='add'>+		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The barrier() here prevents fpinst2 being read</div><div class='hunk'>@@ -413,7 +441,13 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'>  emulate:</div><div class='ctx'> 	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);</div><div class='ctx'> 	if (exceptions)</div><div class='del'>-		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);</div><div class='add'>+		si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);</div><div class='add'>+exit:</div><div class='add'>+	vfp_state_release();</div><div class='add'>+	if (si_code2)</div><div class='add'>+		vfp_raise_sigfpe(si_code2, regs);</div><div class='add'>+	if (si_code)</div><div class='add'>+		vfp_raise_sigfpe(si_code, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vfp_enable(void *unused)</div><div class='hunk'>@@ -512,11 +546,9 @@ static inline void vfp_pm_init(void) { }</div><div class='ctx'>  */</div><div class='ctx'> void vfp_sync_hwstate(struct thread_info *thread)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpu = get_cpu();</div><div class='add'>+	vfp_state_hold();</div><div class='ctx'> </div><div class='del'>-	local_bh_disable();</div><div class='del'>-</div><div class='del'>-	if (vfp_state_in_hw(cpu, thread)) {</div><div class='add'>+	if (vfp_state_in_hw(raw_smp_processor_id(), thread)) {</div><div class='ctx'> 		u32 fpexc = fmrx(FPEXC);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -527,8 +559,7 @@ void vfp_sync_hwstate(struct thread_info *thread)</div><div class='ctx'> 		fmxr(FPEXC, fpexc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_bh_enable();</div><div class='del'>-	put_cpu();</div><div class='add'>+	vfp_state_release();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Ensure that the thread reloads the hardware VFP state on the next use. */</div><div class='hunk'>@@ -683,7 +714,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return vfp_kmode_exception(regs, trigger);</div><div class='ctx'> </div><div class='del'>-	local_bh_disable();</div><div class='add'>+	vfp_state_hold();</div><div class='ctx'> 	fpexc = fmrx(FPEXC);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -748,6 +779,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger)</div><div class='ctx'> 		 * replay the instruction that trapped.</div><div class='ctx'> 		 */</div><div class='ctx'> 		fmxr(FPEXC, fpexc);</div><div class='add'>+		vfp_state_release();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Check for synchronous or asynchronous exceptions */</div><div class='ctx'> 		if (!(fpexc &amp; (FPEXC_EX | FPEXC_DEX))) {</div><div class='hunk'>@@ -762,17 +794,17 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger)</div><div class='ctx'> 			if (!(fpscr &amp; FPSCR_IXE)) {</div><div class='ctx'> 				if (!(fpscr &amp; FPSCR_LENGTH_MASK)) {</div><div class='ctx'> 					pr_debug("not VFP\n");</div><div class='del'>-					local_bh_enable();</div><div class='add'>+					vfp_state_release();</div><div class='ctx'> 					return -ENOEXEC;</div><div class='ctx'> 				}</div><div class='ctx'> 				fpexc |= FPEXC_DEX;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> bounce:		regs-&gt;ARM_pc += 4;</div><div class='add'>+		/* VFP_bounce() will invoke vfp_state_release() */</div><div class='ctx'> 		VFP_bounce(trigger, fpexc, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_bh_enable();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -837,7 +869,7 @@ void kernel_neon_begin(void)</div><div class='ctx'> 	unsigned int cpu;</div><div class='ctx'> 	u32 fpexc;</div><div class='ctx'> </div><div class='del'>-	local_bh_disable();</div><div class='add'>+	vfp_state_hold();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Kernel mode NEON is only allowed outside of hardirq context with</div><div class='hunk'>@@ -845,6 +877,7 @@ void kernel_neon_begin(void)</div><div class='ctx'> 	 * the kernel mode NEON register contents never need to be preserved.</div><div class='ctx'> 	 */</div><div class='ctx'> 	BUG_ON(in_hardirq());</div><div class='add'>+	BUG_ON(irqs_disabled());</div><div class='ctx'> 	cpu = __smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	fpexc = fmrx(FPEXC) | FPEXC_EN;</div><div class='hunk'>@@ -868,7 +901,7 @@ void kernel_neon_end(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Disable the NEON/VFP unit. */</div><div class='ctx'> 	fmxr(FPEXC, fmrx(FPEXC) &amp; ~FPEXC_EN);</div><div class='del'>-	local_bh_enable();</div><div class='add'>+	vfp_state_release();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(kernel_neon_end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c<br/>index a395b6c0aae2..8655bc3d3634 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm/xen/enlighten.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm/xen/enlighten.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm/xen/enlighten.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm/xen/enlighten.c</a></div><div class='hunk'>@@ -541,7 +541,7 @@ static int __init xen_late_init(void)</div><div class='ctx'> 	if (!xen_domain())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	pm_power_off = xen_power_off;</div><div class='add'>+	register_platform_power_off(xen_power_off);</div><div class='ctx'> 	register_restart_handler(&amp;xen_restart_nb);</div><div class='ctx'> 	if (!xen_initial_domain()) {</div><div class='ctx'> 		struct timespec64 ts;</div><div class='head'>diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig<br/>index fd9df6dcc593..6663ffd23f25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/Kconfig</a></div><div class='hunk'>@@ -14,13 +14,13 @@ config ARM64</div><div class='ctx'> 	select ARCH_HAS_DEBUG_WX</div><div class='ctx'> 	select ARCH_BINFMT_ELF_EXTRA_PHDRS</div><div class='ctx'> 	select ARCH_BINFMT_ELF_STATE</div><div class='del'>-	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE</div><div class='ctx'> 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE &amp;&amp; MIGRATION</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTPLUG</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTREMOVE</div><div class='ctx'> 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS &gt; 2</div><div class='ctx'> 	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE</div><div class='ctx'> 	select ARCH_HAS_CACHE_LINE_SIZE</div><div class='add'>+	select ARCH_HAS_CC_PLATFORM</div><div class='ctx'> 	select ARCH_HAS_CURRENT_STACK_POINTER</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VIRTUAL</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VM_PGTABLE</div><div class='hunk'>@@ -36,14 +36,19 @@ config ARM64</div><div class='ctx'> 	select ARCH_HAS_KEEPINITRD</div><div class='ctx'> 	select ARCH_HAS_MEMBARRIER_SYNC_CORE</div><div class='ctx'> 	select ARCH_HAS_MEM_ENCRYPT</div><div class='add'>+	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS</div><div class='ctx'> 	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS</div><div class='ctx'> 	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE</div><div class='del'>-	select ARCH_HAS_PTE_DEVMAP</div><div class='add'>+	select ARCH_HAS_NONLEAF_PMD_YOUNG if ARM64_HAFT</div><div class='add'>+	select ARCH_HAS_PREEMPT_LAZY</div><div class='add'>+	select ARCH_HAS_PTDUMP</div><div class='ctx'> 	select ARCH_HAS_PTE_SPECIAL</div><div class='ctx'> 	select ARCH_HAS_HW_PTE_YOUNG</div><div class='ctx'> 	select ARCH_HAS_SETUP_DMA_OPS</div><div class='ctx'> 	select ARCH_HAS_SET_DIRECT_MAP</div><div class='ctx'> 	select ARCH_HAS_SET_MEMORY</div><div class='add'>+	select ARCH_HAS_MEM_ENCRYPT</div><div class='add'>+	select ARCH_HAS_FORCE_DMA_UNENCRYPTED</div><div class='ctx'> 	select ARCH_STACKWALK</div><div class='ctx'> 	select ARCH_HAS_STRICT_KERNEL_RWX</div><div class='ctx'> 	select ARCH_HAS_STRICT_MODULE_RWX</div><div class='hunk'>@@ -95,7 +100,7 @@ config ARM64</div><div class='ctx'> 	select ARCH_SUPPORTS_SHADOW_CALL_STACK if CC_HAVE_SHADOW_CALL_STACK</div><div class='ctx'> 	select ARCH_SUPPORTS_LTO_CLANG if CPU_LITTLE_ENDIAN</div><div class='ctx'> 	select ARCH_SUPPORTS_LTO_CLANG_THIN</div><div class='del'>-	select ARCH_SUPPORTS_CFI_CLANG</div><div class='add'>+	select ARCH_SUPPORTS_CFI</div><div class='ctx'> 	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='ctx'> 	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128</div><div class='ctx'> 	select ARCH_SUPPORTS_NUMA_BALANCING</div><div class='hunk'>@@ -103,6 +108,9 @@ config ARM64</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='ctx'> 	select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE</div><div class='ctx'> 	select ARCH_SUPPORTS_RT</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_CLUSTER</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC</div><div class='ctx'> 	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH</div><div class='ctx'> 	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_BPF_JIT</div><div class='hunk'>@@ -110,7 +118,7 @@ config ARM64</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='ctx'> 	select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES &amp;&amp; !ARM64_VA_BITS_36)</div><div class='ctx'> 	select ARCH_WANT_LD_ORPHAN_WARN</div><div class='del'>-	select ARCH_WANTS_EXECMEM_LATE if EXECMEM</div><div class='add'>+	select ARCH_WANTS_EXECMEM_LATE</div><div class='ctx'> 	select ARCH_WANTS_NO_INSTR</div><div class='ctx'> 	select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES</div><div class='ctx'> 	select ARCH_HAS_UBSAN</div><div class='hunk'>@@ -121,14 +129,15 @@ config ARM64</div><div class='ctx'> 	select ARM_GIC_V2M if PCI</div><div class='ctx'> 	select ARM_GIC_V3</div><div class='ctx'> 	select ARM_GIC_V3_ITS if PCI</div><div class='add'>+	select ARM_GIC_V5</div><div class='ctx'> 	select ARM_PSCI_FW</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT</div><div class='ctx'> 	select CLONE_BACKWARDS</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select CPU_PM if (SUSPEND || CPU_IDLE)</div><div class='ctx'> 	select CPUMASK_OFFSTACK if NR_CPUS &gt; 256</div><div class='del'>-	select CRC32</div><div class='ctx'> 	select DCACHE_WORD_ACCESS</div><div class='add'>+	select HAVE_EXTRA_IPI_TRACEPOINTS</div><div class='ctx'> 	select DYNAMIC_FTRACE if FUNCTION_TRACER</div><div class='ctx'> 	select DMA_BOUNCE_UNALIGNED_KMALLOC</div><div class='ctx'> 	select DMA_DIRECT_REMAP</div><div class='hunk'>@@ -145,18 +154,18 @@ config ARM64</div><div class='ctx'> 	select GENERIC_EARLY_IOREMAP</div><div class='ctx'> 	select GENERIC_IDLE_POLL_SETUP</div><div class='ctx'> 	select GENERIC_IOREMAP</div><div class='add'>+	select GENERIC_IRQ_ENTRY</div><div class='ctx'> 	select GENERIC_IRQ_IPI</div><div class='add'>+	select GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_IRQ_SHOW_LEVEL</div><div class='ctx'> 	select GENERIC_LIB_DEVMEM_IS_ALLOWED</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='del'>-	select GENERIC_PTDUMP</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_TIME_VSYSCALL</div><div class='ctx'> 	select GENERIC_GETTIMEOFDAY</div><div class='del'>-	select GENERIC_VDSO_TIME_NS</div><div class='ctx'> 	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select HAS_IOPORT</div><div class='ctx'> 	select HAVE_MOVE_PMD</div><div class='hunk'>@@ -179,12 +188,12 @@ config ARM64</div><div class='ctx'> 	select HAVE_ARCH_KCSAN if EXPERT</div><div class='ctx'> 	select HAVE_ARCH_KFENCE</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='add'>+	select HAVE_ARCH_KSTACK_ERASE</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_BITS</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT</div><div class='ctx'> 	select HAVE_ARCH_PREL32_RELOCATIONS</div><div class='ctx'> 	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER</div><div class='del'>-	select HAVE_ARCH_STACKLEAK</div><div class='ctx'> 	select HAVE_ARCH_THREAD_STRUCT_WHITELIST</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='hunk'>@@ -205,25 +214,27 @@ config ARM64</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS \</div><div class='ctx'> 		if DYNAMIC_FTRACE_WITH_ARGS &amp;&amp; DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS \</div><div class='del'>-		if (DYNAMIC_FTRACE_WITH_ARGS &amp;&amp; !CFI_CLANG &amp;&amp; \</div><div class='add'>+		if (DYNAMIC_FTRACE_WITH_ARGS &amp;&amp; !CFI &amp;&amp; \</div><div class='ctx'> 		    (CC_IS_CLANG || !CC_OPTIMIZE_FOR_SIZE))</div><div class='ctx'> 	select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \</div><div class='ctx'> 		if DYNAMIC_FTRACE_WITH_ARGS</div><div class='ctx'> 	select HAVE_SAMPLE_FTRACE_DIRECT</div><div class='ctx'> 	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI</div><div class='add'>+	select HAVE_BUILDTIME_MCOUNT_SORT</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='ctx'> 	select HAVE_GUP_FAST</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='add'>+	select HAVE_FTRACE_GRAPH_FUNC</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FREGS</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_RETVAL</div><div class='ctx'> 	select HAVE_GCC_PLUGINS</div><div class='ctx'> 	select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS &amp;&amp; \</div><div class='ctx'> 		HW_PERF_EVENTS &amp;&amp; HAVE_PERF_EVENTS_NMI</div><div class='ctx'> 	select HAVE_HW_BREAKPOINT if PERF_EVENTS</div><div class='ctx'> 	select HAVE_IOREMAP_PROT</div><div class='ctx'> 	select HAVE_IRQ_TIME_ACCOUNTING</div><div class='add'>+	select HAVE_LIVEPATCH</div><div class='ctx'> 	select HAVE_MOD_ARCH_SPECIFIC</div><div class='ctx'> 	select HAVE_NMI</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='hunk'>@@ -232,6 +243,7 @@ config ARM64</div><div class='ctx'> 	select HAVE_PERF_USER_STACK_DUMP</div><div class='ctx'> 	select HAVE_PREEMPT_DYNAMIC_KEY</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='add'>+	select HAVE_RELIABLE_STACKTRACE</div><div class='ctx'> 	select HAVE_POSIX_CPU_TIMERS_TASK_WORK</div><div class='ctx'> 	select HAVE_FUNCTION_ARG_ACCESS_API</div><div class='ctx'> 	select MMU_GATHER_RCU_TABLE_FREE</div><div class='hunk'>@@ -243,8 +255,10 @@ config ARM64</div><div class='ctx'> 	select HAVE_KRETPROBES</div><div class='ctx'> 	select HAVE_GENERIC_VDSO</div><div class='ctx'> 	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU</div><div class='add'>+	select HOTPLUG_SMT if HOTPLUG_CPU</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='add'>+	select JUMP_LABEL</div><div class='ctx'> 	select KASAN_VMALLOC if KASAN</div><div class='ctx'> 	select LOCK_MM_AND_FIND_VMA</div><div class='ctx'> 	select MODULES_USE_ELF_RELA</div><div class='hunk'>@@ -268,6 +282,7 @@ config ARM64</div><div class='ctx'> 	select HAVE_SOFTIRQ_ON_OWN_STACK</div><div class='ctx'> 	select USER_STACKTRACE_SUPPORT</div><div class='ctx'> 	select VDSO_GETRANDOM</div><div class='add'>+	select VMAP_STACK</div><div class='ctx'> 	help</div><div class='ctx'> 	  ARM 64-bit (AArch64) Linux support.</div><div class='ctx'> </div><div class='hunk'>@@ -316,15 +331,15 @@ config ARCH_MMAP_RND_BITS_MIN</div><div class='ctx'> 	default 18</div><div class='ctx'> </div><div class='ctx'> # max bits determined by the following formula:</div><div class='del'>-#  VA_BITS - PAGE_SHIFT - 3</div><div class='add'>+#  VA_BITS - PTDESC_TABLE_SHIFT</div><div class='ctx'> config ARCH_MMAP_RND_BITS_MAX</div><div class='ctx'> 	default 19 if ARM64_VA_BITS=36</div><div class='ctx'> 	default 24 if ARM64_VA_BITS=39</div><div class='ctx'> 	default 27 if ARM64_VA_BITS=42</div><div class='ctx'> 	default 30 if ARM64_VA_BITS=47</div><div class='del'>-	default 29 if ARM64_VA_BITS=48 &amp;&amp; ARM64_64K_PAGES</div><div class='del'>-	default 31 if ARM64_VA_BITS=48 &amp;&amp; ARM64_16K_PAGES</div><div class='del'>-	default 33 if ARM64_VA_BITS=48</div><div class='add'>+	default 29 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) &amp;&amp; ARM64_64K_PAGES</div><div class='add'>+	default 31 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) &amp;&amp; ARM64_16K_PAGES</div><div class='add'>+	default 33 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52)</div><div class='ctx'> 	default 14 if ARM64_64K_PAGES</div><div class='ctx'> 	default 16 if ARM64_16K_PAGES</div><div class='ctx'> 	default 18</div><div class='hunk'>@@ -453,6 +468,23 @@ config AMPERE_ERRATUM_AC03_CPU_38</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='add'>+config AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+        bool "AmpereOne: AC04_CPU_23:  Failure to synchronize writes to HCR_EL2 may corrupt address translations."</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  This option adds an alternative code sequence to work around Ampere</div><div class='add'>+	  errata AC04_CPU_23 on AmpereOne.</div><div class='add'>+</div><div class='add'>+	  Updates to HCR_EL2 can rarely corrupt simultaneous translations for</div><div class='add'>+	  data addresses initiated by load/store instructions. Only</div><div class='add'>+	  instruction initiated translations are vulnerable, not translations</div><div class='add'>+	  from prefetches for example. A DSB before the store to HCR_EL2 is</div><div class='add'>+	  sufficient to prevent older instructions from hitting the window</div><div class='add'>+	  for corruption, and an ISB after is sufficient to prevent younger</div><div class='add'>+	  instructions from hitting the window for corruption.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> config ARM64_WORKAROUND_CLEAN_CACHE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -631,9 +663,6 @@ config ARM64_ERRATUM_843419</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='del'>-config ARM64_LD_HAS_FIX_ERRATUM_843419</div><div class='del'>-	def_bool $(ld-option,--fix-cortex-a53-843419)</div><div class='del'>-</div><div class='ctx'> config ARM64_ERRATUM_1024718</div><div class='ctx'> 	bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -1111,6 +1140,7 @@ config ARM64_ERRATUM_3194386</div><div class='ctx'> 	  * ARM Neoverse-V1 erratum 3324341</div><div class='ctx'> 	  * ARM Neoverse V2 erratum 3324336</div><div class='ctx'> 	  * ARM Neoverse-V3 erratum 3312417</div><div class='add'>+	  * ARM Neoverse-V3AE erratum 3312417</div><div class='ctx'> </div><div class='ctx'> 	  On affected cores "MSR SSBS, #0" instructions may not affect</div><div class='ctx'> 	  subsequent speculative instructions, which may permit unexepected</div><div class='hunk'>@@ -1232,6 +1262,17 @@ config HISILICON_ERRATUM_161600802</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='add'>+config HISILICON_ERRATUM_162100801</div><div class='add'>+	bool "Hip09 162100801 erratum support"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  When enabling GICv4.1 in hip09, VMAPP will fail to clear some caches</div><div class='add'>+	  during unmapping operation, which will cause some vSGIs lost.</div><div class='add'>+	  To fix the issue, invalidate related vPE cache through GICR_INVALLR</div><div class='add'>+	  after VMOVP.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> config QCOM_FALKOR_ERRATUM_1003</div><div class='ctx'> 	bool "Falkor E1003: Incorrect translation due to ASID change"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -1284,6 +1325,15 @@ config NVIDIA_CARMEL_CNP_ERRATUM</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='add'>+config ROCKCHIP_ERRATUM_3568002</div><div class='add'>+	bool "Rockchip 3568002: GIC600 can not access physical addresses higher than 4GB"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  The Rockchip RK3566 and RK3568 GIC600 SoC integrations have AXI</div><div class='add'>+	  addressing limited to the first 32bit of physical address space.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> config ROCKCHIP_ERRATUM_3588001</div><div class='ctx'> 	bool "Rockchip 3588001: GIC600 can not support shareability attributes"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -1365,7 +1415,6 @@ config ARM64_VA_BITS_48</div><div class='ctx'> </div><div class='ctx'> config ARM64_VA_BITS_52</div><div class='ctx'> 	bool "52-bit"</div><div class='del'>-	depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable 52-bit virtual addressing for userspace when explicitly</div><div class='ctx'> 	  requested via a hint to mmap(). The kernel will also use 52-bit</div><div class='hunk'>@@ -1417,7 +1466,6 @@ config ARM64_PA_BITS_48</div><div class='ctx'> config ARM64_PA_BITS_52</div><div class='ctx'> 	bool "52-bit"</div><div class='ctx'> 	depends on ARM64_64K_PAGES || ARM64_VA_BITS_52</div><div class='del'>-	depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for a 52-bit physical address space, introduced as</div><div class='ctx'> 	  part of the ARMv8.2-LPA extension.</div><div class='hunk'>@@ -1447,8 +1495,7 @@ choice</div><div class='ctx'> </div><div class='ctx'> config CPU_BIG_ENDIAN</div><div class='ctx'> 	bool "Build big-endian kernel"</div><div class='del'>-	# https://github.com/llvm/llvm-project/commit/1379b150991f70a5782e9a143c2ba5308da1161c</div><div class='del'>-	depends on AS_IS_GNU || AS_VERSION &gt;= 150000</div><div class='add'>+	depends on BROKEN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y if you plan on running a kernel with a big-endian userspace.</div><div class='ctx'> </div><div class='hunk'>@@ -1460,29 +1507,6 @@ config CPU_LITTLE_ENDIAN</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='del'>-config SCHED_MC</div><div class='del'>-	bool "Multi-core scheduler support"</div><div class='del'>-	help</div><div class='del'>-	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='del'>-	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='del'>-	  increased overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='del'>-config SCHED_CLUSTER</div><div class='del'>-	bool "Cluster scheduler support"</div><div class='del'>-	help</div><div class='del'>-	  Cluster scheduler support improves the CPU scheduler's decision</div><div class='del'>-	  making when dealing with machines that have clusters of CPUs.</div><div class='del'>-	  Cluster usually means a couple of CPUs which are placed closely</div><div class='del'>-	  by sharing mid-level caches, last-level cache tags or internal</div><div class='del'>-	  busses.</div><div class='del'>-</div><div class='del'>-config SCHED_SMT</div><div class='del'>-	bool "SMT scheduler support"</div><div class='del'>-	help</div><div class='del'>-	  Improves the CPU scheduler's decision making when dealing with</div><div class='del'>-	  MultiThreading at a cost of slightly increased overhead in some</div><div class='del'>-	  places. If unsure say N here.</div><div class='del'>-</div><div class='ctx'> config NR_CPUS</div><div class='ctx'> 	int "Maximum number of CPUs (2-4096)"</div><div class='ctx'> 	range 2 4096</div><div class='hunk'>@@ -1525,7 +1549,6 @@ source "kernel/Kconfig.hz"</div><div class='ctx'> config ARCH_SPARSEMEM_ENABLE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select SPARSEMEM_VMEMMAP_ENABLE</div><div class='del'>-	select SPARSEMEM_VMEMMAP</div><div class='ctx'> </div><div class='ctx'> config HW_PERF_EVENTS</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -1573,9 +1596,15 @@ config ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG</div><div class='ctx'> config ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_SUPPORTS_KEXEC_HANDOVER</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION</div><div class='ctx'> 	def_bool CRASH_RESERVE</div><div class='ctx'> </div><div class='hunk'>@@ -1647,23 +1676,10 @@ config MITIGATE_SPECTRE_BRANCH_HISTORY</div><div class='ctx'> 	  When taking an exception from user-space, a sequence of branches</div><div class='ctx'> 	  or a firmware call overwrites the branch history.</div><div class='ctx'> </div><div class='del'>-config RODATA_FULL_DEFAULT_ENABLED</div><div class='del'>-	bool "Apply r/o permissions of VM areas also to their linear aliases"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Apply read-only attributes of VM areas to the linear alias of</div><div class='del'>-	  the backing pages as well. This prevents code or read-only data</div><div class='del'>-	  from being modified (inadvertently or intentionally) via another</div><div class='del'>-	  mapping of the same memory page. This additional enhancement can</div><div class='del'>-	  be turned off at runtime by passing rodata=[off|on] (and turned on</div><div class='del'>-	  with rodata=full if this option is set to 'n')</div><div class='del'>-</div><div class='del'>-	  This requires the linear region to be mapped down to pages,</div><div class='del'>-	  which may adversely affect performance in some cases.</div><div class='del'>-</div><div class='ctx'> config ARM64_SW_TTBR0_PAN</div><div class='ctx'> 	bool "Emulate Privileged Access Never using TTBR0_EL1 switching"</div><div class='ctx'> 	depends on !KCSAN</div><div class='add'>+	select ARM64_PAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enabling this option prevents the kernel from accessing</div><div class='ctx'> 	  user-space memory directly by pointing TTBR0_EL1 to a reserved</div><div class='hunk'>@@ -1730,7 +1746,6 @@ config COMPAT_VDSO</div><div class='ctx'> 	bool "Enable vDSO for 32-bit applications"</div><div class='ctx'> 	depends on !CPU_BIG_ENDIAN</div><div class='ctx'> 	depends on (CC_IS_CLANG &amp;&amp; LD_IS_LLD) || "$(CROSS_COMPILE_COMPAT)" != ""</div><div class='del'>-	select GENERIC_COMPAT_VDSO</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Place in the process address space of 32-bit applications an</div><div class='hunk'>@@ -1857,13 +1872,9 @@ config ARM64_PAN</div><div class='ctx'> 	  The feature is detected at runtime, and will remain as a 'nop'</div><div class='ctx'> 	  instruction if the cpu does not implement the feature.</div><div class='ctx'> </div><div class='del'>-config AS_HAS_LSE_ATOMICS</div><div class='del'>-	def_bool $(as-instr,.arch_extension lse)</div><div class='del'>-</div><div class='ctx'> config ARM64_LSE_ATOMICS</div><div class='ctx'> 	bool</div><div class='ctx'> 	default ARM64_USE_LSE_ATOMICS</div><div class='del'>-	depends on AS_HAS_LSE_ATOMICS</div><div class='ctx'> </div><div class='ctx'> config ARM64_USE_LSE_ATOMICS</div><div class='ctx'> 	bool "Atomic instructions"</div><div class='hunk'>@@ -1875,20 +1886,12 @@ config ARM64_USE_LSE_ATOMICS</div><div class='ctx'> </div><div class='ctx'> 	  Say Y here to make use of these instructions for the in-kernel</div><div class='ctx'> 	  atomic routines. This incurs a small overhead on CPUs that do</div><div class='del'>-	  not support these instructions and requires the kernel to be</div><div class='del'>-	  built with binutils &gt;= 2.25 in order for the new instructions</div><div class='del'>-	  to be used.</div><div class='add'>+	  not support these instructions.</div><div class='ctx'> </div><div class='ctx'> endmenu # "ARMv8.1 architectural features"</div><div class='ctx'> </div><div class='ctx'> menu "ARMv8.2 architectural features"</div><div class='ctx'> </div><div class='del'>-config AS_HAS_ARMV8_2</div><div class='del'>-	def_bool $(cc-option,-Wa$(comma)-march=armv8.2-a)</div><div class='del'>-</div><div class='del'>-config AS_HAS_SHA3</div><div class='del'>-	def_bool $(as-instr,.arch armv8.2-a+sha3)</div><div class='del'>-</div><div class='ctx'> config ARM64_PMEM</div><div class='ctx'> 	bool "Enable support for persistent memory"</div><div class='ctx'> 	select ARCH_HAS_PMEM_API</div><div class='hunk'>@@ -1920,7 +1923,6 @@ config ARM64_RAS_EXTN</div><div class='ctx'> config ARM64_CNP</div><div class='ctx'> 	bool "Enable support for Common Not Private (CNP) translations"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Common Not Private (CNP) allows translation table entries to</div><div class='ctx'> 	  be shared between different PEs in the same inner shareable</div><div class='hunk'>@@ -1963,7 +1965,6 @@ config ARM64_PTR_AUTH_KERNEL</div><div class='ctx'> 	bool "Use pointer authentication for kernel"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on ARM64_PTR_AUTH</div><div class='del'>-	depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) &amp;&amp; AS_HAS_ARMV8_3</div><div class='ctx'> 	# Modern compilers insert a .note.gnu.property section note for PAC</div><div class='ctx'> 	# which is only understood by binutils starting with version 2.33.1.</div><div class='ctx'> 	depends on LD_IS_LLD || LD_VERSION &gt;= 23301 || (CC_IS_GCC &amp;&amp; GCC_VERSION &lt; 90100)</div><div class='hunk'>@@ -1984,19 +1985,10 @@ config CC_HAS_BRANCH_PROT_PAC_RET</div><div class='ctx'> 	# GCC 9 or later, clang 8 or later</div><div class='ctx'> 	def_bool $(cc-option,-mbranch-protection=pac-ret+leaf)</div><div class='ctx'> </div><div class='del'>-config CC_HAS_SIGN_RETURN_ADDRESS</div><div class='del'>-	# GCC 7, 8</div><div class='del'>-	def_bool $(cc-option,-msign-return-address=all)</div><div class='del'>-</div><div class='del'>-config AS_HAS_ARMV8_3</div><div class='del'>-	def_bool $(cc-option,-Wa$(comma)-march=armv8.3-a)</div><div class='del'>-</div><div class='ctx'> config AS_HAS_CFI_NEGATE_RA_STATE</div><div class='add'>+	# binutils 2.34+</div><div class='ctx'> 	def_bool $(as-instr,.cfi_startproc\n.cfi_negate_ra_state\n.cfi_endproc\n)</div><div class='ctx'> </div><div class='del'>-config AS_HAS_LDAPR</div><div class='del'>-	def_bool $(as-instr,.arch_extension rcpc)</div><div class='del'>-</div><div class='ctx'> endmenu # "ARMv8.3 architectural features"</div><div class='ctx'> </div><div class='ctx'> menu "ARMv8.4 architectural features"</div><div class='hunk'>@@ -2024,20 +2016,13 @@ config ARM64_AMU_EXTN</div><div class='ctx'> 	  correctly reflect reality. Most commonly, the value read will be 0,</div><div class='ctx'> 	  indicating that the counter is not enabled.</div><div class='ctx'> </div><div class='del'>-config AS_HAS_ARMV8_4</div><div class='del'>-	def_bool $(cc-option,-Wa$(comma)-march=armv8.4-a)</div><div class='del'>-</div><div class='ctx'> config ARM64_TLB_RANGE</div><div class='ctx'> 	bool "Enable support for tlbi range feature"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on AS_HAS_ARMV8_4</div><div class='ctx'> 	help</div><div class='ctx'> 	  ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a</div><div class='ctx'> 	  range of input addresses.</div><div class='ctx'> </div><div class='del'>-	  The feature introduces new assembly instructions, and they were</div><div class='del'>-	  support when binutils &gt;= 2.30.</div><div class='del'>-</div><div class='ctx'> endmenu # "ARMv8.4 architectural features"</div><div class='ctx'> </div><div class='ctx'> menu "ARMv8.5 architectural features"</div><div class='hunk'>@@ -2113,9 +2098,8 @@ config ARM64_MTE</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on ARM64_AS_HAS_MTE &amp;&amp; ARM64_TAGGED_ADDR_ABI</div><div class='ctx'> 	depends on AS_HAS_ARMV8_5</div><div class='del'>-	depends on AS_HAS_LSE_ATOMICS</div><div class='ctx'> 	# Required for tag checking in the uaccess routines</div><div class='del'>-	depends on ARM64_PAN</div><div class='add'>+	select ARM64_PAN</div><div class='ctx'> 	select ARCH_HAS_SUBPAGE_FAULTS</div><div class='ctx'> 	select ARCH_USES_HIGH_VMA_FLAGS</div><div class='ctx'> 	select ARCH_USES_PG_ARCH_2</div><div class='hunk'>@@ -2156,6 +2140,9 @@ config ARM64_EPAN</div><div class='ctx'> 	  if the cpu does not implement the feature.</div><div class='ctx'> endmenu # "ARMv8.7 architectural features"</div><div class='ctx'> </div><div class='add'>+config AS_HAS_MOPS</div><div class='add'>+	def_bool $(as-instr,.arch_extension mops)</div><div class='add'>+</div><div class='ctx'> menu "ARMv8.9 architectural features"</div><div class='ctx'> </div><div class='ctx'> config ARM64_POE</div><div class='hunk'>@@ -2177,8 +2164,43 @@ config ARCH_PKEY_BITS</div><div class='ctx'> 	int</div><div class='ctx'> 	default 3</div><div class='ctx'> </div><div class='add'>+config ARM64_HAFT</div><div class='add'>+	bool "Support for Hardware managed Access Flag for Table Descriptors"</div><div class='add'>+	depends on ARM64_HW_AFDBM</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  The ARMv8.9/ARMv9.5 introduces the feature Hardware managed Access</div><div class='add'>+	  Flag for Table descriptors. When enabled an architectural executed</div><div class='add'>+	  memory access will update the Access Flag in each Table descriptor</div><div class='add'>+	  which is accessed during the translation table walk and for which</div><div class='add'>+	  the Access Flag is 0. The Access Flag of the Table descriptor use</div><div class='add'>+	  the same bit of PTE_AF.</div><div class='add'>+</div><div class='add'>+	  The feature will only be enabled if all the CPUs in the system</div><div class='add'>+	  support this feature. If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> endmenu # "ARMv8.9 architectural features"</div><div class='ctx'> </div><div class='add'>+menu "ARMv9.4 architectural features"</div><div class='add'>+</div><div class='add'>+config ARM64_GCS</div><div class='add'>+	bool "Enable support for Guarded Control Stack (GCS)"</div><div class='add'>+	default y</div><div class='add'>+	select ARCH_HAS_USER_SHADOW_STACK</div><div class='add'>+	select ARCH_USES_HIGH_VMA_FLAGS</div><div class='add'>+	help</div><div class='add'>+	  Guarded Control Stack (GCS) provides support for a separate</div><div class='add'>+	  stack with restricted access which contains only return</div><div class='add'>+	  addresses.  This can be used to harden against some attacks</div><div class='add'>+	  by comparing return address used by the program with what is</div><div class='add'>+	  stored in the GCS, and may also be used to efficiently obtain</div><div class='add'>+	  the call stack for applications such as profiling.</div><div class='add'>+</div><div class='add'>+	  The feature is detected at runtime, and will remain disabled</div><div class='add'>+	  if the system does not implement the feature.</div><div class='add'>+</div><div class='add'>+endmenu # "ARMv9.4 architectural features"</div><div class='add'>+</div><div class='ctx'> config ARM64_SVE</div><div class='ctx'> 	bool "ARM Scalable Vector Extension support"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -2303,8 +2325,7 @@ config STACKPROTECTOR_PER_TASK</div><div class='ctx'> </div><div class='ctx'> config UNWIND_PATCH_PAC_INTO_SCS</div><div class='ctx'> 	bool "Enable shadow call stack dynamically using code patching"</div><div class='del'>-	# needs Clang with https://github.com/llvm/llvm-project/commit/de07cde67b5d205d58690be012106022aea6d2b3 incorporated</div><div class='del'>-	depends on CC_IS_CLANG &amp;&amp; CLANG_VERSION &gt;= 150000</div><div class='add'>+	depends on CC_IS_CLANG</div><div class='ctx'> 	depends on ARM64_PTR_AUTH_KERNEL &amp;&amp; CC_HAS_BRANCH_PROT_PAC_RET</div><div class='ctx'> 	depends on SHADOW_CALL_STACK</div><div class='ctx'> 	select UNWIND_TABLES</div><div class='hunk'>@@ -2441,3 +2462,4 @@ source "drivers/acpi/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm64/kvm/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "kernel/livepatch/Kconfig"</div><div class='head'>diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms<br/>index 6c6d11536b42..13173795c43d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/Kconfig.platforms?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Kconfig.platforms</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/Kconfig.platforms?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/Kconfig.platforms</a></div><div class='hunk'>@@ -37,8 +37,21 @@ config ARCH_APPLE</div><div class='ctx'> 	bool "Apple Silicon SoC family"</div><div class='ctx'> 	select APPLE_AIC</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for Apple's in-house ARM SoC family, starting</div><div class='del'>-	  with the Apple M1.</div><div class='add'>+	  This enables support for Apple's in-house ARM SoC family, such</div><div class='add'>+	  as the Apple M1.</div><div class='add'>+</div><div class='add'>+config ARCH_ARTPEC</div><div class='add'>+	bool "Axis Communications ARTPEC SoC Family"</div><div class='add'>+	depends on ARCH_EXYNOS</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	help</div><div class='add'>+	   This enables support for the ARMv8 based ARTPEC SoC Family.</div><div class='add'>+</div><div class='add'>+config ARCH_AXIADO</div><div class='add'>+	bool "Axiado SoC Family"</div><div class='add'>+	select GPIOLIB</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Axiado SoC family like AX3000</div><div class='ctx'> </div><div class='ctx'> menuconfig ARCH_BCM</div><div class='ctx'> 	bool "Broadcom SoC Support"</div><div class='hunk'>@@ -101,6 +114,17 @@ config ARCH_BITMAIN</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the Bitmain SoC Family.</div><div class='ctx'> </div><div class='add'>+config ARCH_BLAIZE</div><div class='add'>+	bool "Blaize SoC Platforms"</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Blaize SoC family</div><div class='add'>+</div><div class='add'>+config ARCH_CIX</div><div class='add'>+	bool "Cixtech SoC family"</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Cixtech SoC family,</div><div class='add'>+	  like P1(sky1).</div><div class='add'>+</div><div class='ctx'> config ARCH_EXYNOS</div><div class='ctx'> 	bool "Samsung Exynos SoC family"</div><div class='ctx'> 	select COMMON_CLK_SAMSUNG</div><div class='hunk'>@@ -114,29 +138,9 @@ config ARCH_EXYNOS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for ARMv8 based Samsung Exynos SoC family.</div><div class='ctx'> </div><div class='del'>-config ARCH_SPARX5</div><div class='del'>-	bool "Microchip Sparx5 SoC family"</div><div class='del'>-	select PINCTRL</div><div class='del'>-	select DW_APB_TIMER_OF</div><div class='del'>-	help</div><div class='del'>-	  This enables support for the Microchip Sparx5 ARMv8-based</div><div class='del'>-	  SoC family of TSN-capable gigabit switches.</div><div class='del'>-</div><div class='del'>-	  The SparX-5 Ethernet switch family provides a rich set of</div><div class='del'>-	  switching features such as advanced TCAM-based VLAN and QoS</div><div class='del'>-	  processing enabling delivery of differentiated services, and</div><div class='del'>-	  security through TCAM-based frame processing using versatile</div><div class='del'>-	  content aware processor (VCAP).</div><div class='del'>-</div><div class='ctx'> config ARCH_K3</div><div class='ctx'> 	bool "Texas Instruments Inc. K3 multicore SoC architecture"</div><div class='del'>-	select PM_GENERIC_DOMAINS if PM</div><div class='del'>-	select MAILBOX</div><div class='ctx'> 	select SOC_TI</div><div class='del'>-	select TI_MESSAGE_MANAGER</div><div class='del'>-	select TI_SCI_PROTOCOL</div><div class='del'>-	select TI_SCI_INTR_IRQCHIP</div><div class='del'>-	select TI_SCI_INTA_IRQCHIP</div><div class='ctx'> 	select TI_K3_SOCINFO</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Texas Instruments' K3 multicore SoC</div><div class='hunk'>@@ -175,6 +179,51 @@ config ARCH_MESON</div><div class='ctx'> 	  This enables support for the arm64 based Amlogic SoCs</div><div class='ctx'> 	  such as the s905, S905X/D, S912, A113X/D or S905X/D2</div><div class='ctx'> </div><div class='add'>+menu "Microchip SoC support"</div><div class='add'>+</div><div class='add'>+config ARCH_MICROCHIP</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config ARCH_LAN969X</div><div class='add'>+	bool "Microchip LAN969X SoC family"</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select DW_APB_TIMER_OF</div><div class='add'>+	select ARCH_MICROCHIP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Microchip LAN969X ARMv8-based</div><div class='add'>+	  SoC family of TSN-capable gigabit switches.</div><div class='add'>+</div><div class='add'>+	  The LAN969X Ethernet switch family provides a rich set of</div><div class='add'>+	  switching features such as advanced TCAM-based VLAN and QoS</div><div class='add'>+	  processing enabling delivery of differentiated services, and</div><div class='add'>+	  security through TCAM-based frame processing using versatile</div><div class='add'>+	  content aware processor (VCAP).</div><div class='add'>+</div><div class='add'>+config ARCH_SPARX5</div><div class='add'>+	bool "Microchip Sparx5 SoC family"</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select DW_APB_TIMER_OF</div><div class='add'>+	select ARCH_MICROCHIP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Microchip Sparx5 ARMv8-based</div><div class='add'>+	  SoC family of TSN-capable gigabit switches.</div><div class='add'>+</div><div class='add'>+	  The SparX-5 Ethernet switch family provides a rich set of</div><div class='add'>+	  switching features such as advanced TCAM-based VLAN and QoS</div><div class='add'>+	  processing enabling delivery of differentiated services, and</div><div class='add'>+	  security through TCAM-based frame processing using versatile</div><div class='add'>+	  content aware processor (VCAP).</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+config ARCH_MMP</div><div class='add'>+	bool "Marvell MMP SoC Family"</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select PINCTRL_SINGLE</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Marvell MMP SoC family, currently</div><div class='add'>+	  supporting PXA1908 aka IAP140.</div><div class='add'>+</div><div class='ctx'> config ARCH_MVEBU</div><div class='ctx'> 	bool "Marvell EBU SoC Family"</div><div class='ctx'> 	select ARMADA_AP806_SYSCON</div><div class='hunk'>@@ -266,7 +315,7 @@ config ARCH_QCOM</div><div class='ctx'> 	bool "Qualcomm Platforms"</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select PINCTRL</div><div class='del'>-	select HAVE_PWRCTL if PCI</div><div class='add'>+	select HAVE_PWRCTRL if PCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the ARMv8 based Qualcomm chipsets.</div><div class='ctx'> </div><div class='hunk'>@@ -304,11 +353,16 @@ config ARCH_INTEL_SOCFPGA</div><div class='ctx'> 	  Stratix 10 (ex. Altera), Stratix10 Software Virtual Platform,</div><div class='ctx'> 	  Agilex and eASIC N5X.</div><div class='ctx'> </div><div class='add'>+config ARCH_SOPHGO</div><div class='add'>+	bool "Sophgo SoCs"</div><div class='add'>+	select ARCH_HAS_RESET_CONTROLLER</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Sophgo SoC platform hardware.</div><div class='add'>+</div><div class='ctx'> config ARCH_STM32</div><div class='ctx'> 	bool "STMicroelectronics STM32 SoC Family"</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select PINCTRL</div><div class='del'>-	select PINCTRL_STM32MP257</div><div class='ctx'> 	select ARM_SMC_MBOX</div><div class='ctx'> 	select ARM_SCMI_PROTOCOL</div><div class='ctx'> 	select REGULATOR</div><div class='hunk'>@@ -318,6 +372,10 @@ config ARCH_STM32</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for ARMv8 based STMicroelectronics</div><div class='ctx'> 	  STM32 family, including:</div><div class='add'>+		- STM32MP21:</div><div class='add'>+			- STM32MP211, STM32MP213, STM32MP215.</div><div class='add'>+		- STM32MP23:</div><div class='add'>+			- STM32MP231, STM32MP233, STM32MP235.</div><div class='ctx'> 		- STM32MP25:</div><div class='ctx'> 			- STM32MP251, STM32MP253, STM32MP255 and STM32MP257.</div><div class='ctx'> </div><div class='hunk'>@@ -371,13 +429,12 @@ config ARCH_UNIPHIER</div><div class='ctx'> 	  This enables support for Socionext UniPhier SoC family.</div><div class='ctx'> </div><div class='ctx'> config ARCH_VEXPRESS</div><div class='del'>-	bool "ARMv8 software model (Versatile Express)"</div><div class='add'>+	bool "ARM Ltd Platforms"</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select PM</div><div class='ctx'> 	select PM_GENERIC_DOMAINS</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for the ARMv8 software model (Versatile</div><div class='del'>-	  Express).</div><div class='add'>+	  This enables support for the ARM Ltd Platforms.</div><div class='ctx'> </div><div class='ctx'> config ARCH_VISCONTI</div><div class='ctx'> 	bool "Toshiba Visconti SoC Family"</div><div class='head'>diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile<br/>index 9efd3f37c2fd..73a10f65ce8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/Makefile</a></div><div class='hunk'>@@ -16,14 +16,11 @@ ifeq ($(CONFIG_RELOCATABLE), y)</div><div class='ctx'> # Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour</div><div class='ctx'> # for relative relocs, since this leads to better Image compression</div><div class='ctx'> # with the relocation offsets always being zero.</div><div class='del'>-LDFLAGS_vmlinux		+= -shared -Bsymbolic -z notext \</div><div class='del'>-			$(call ld-option, --no-apply-dynamic-relocs)</div><div class='add'>+LDFLAGS_vmlinux	+= -shared -Bsymbolic -z notext --no-apply-dynamic-relocs</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)</div><div class='del'>-  ifeq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)</div><div class='ctx'> LDFLAGS_vmlinux	+= --fix-cortex-a53-843419</div><div class='del'>-  endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> cc_has_k_constraint := $(call try-run,echo				\</div><div class='hunk'>@@ -48,7 +45,11 @@ KBUILD_CFLAGS	+= $(CC_FLAGS_NO_FPU) \</div><div class='ctx'> KBUILD_CFLAGS	+= $(call cc-disable-warning, psabi)</div><div class='ctx'> KBUILD_AFLAGS	+= $(compat_vdso)</div><div class='ctx'> </div><div class='add'>+ifeq ($(call rustc-min-version, 108500),y)</div><div class='add'>+KBUILD_RUSTFLAGS += --target=aarch64-unknown-none-softfloat</div><div class='add'>+else</div><div class='ctx'> KBUILD_RUSTFLAGS += --target=aarch64-unknown-none -Ctarget-feature="-neon"</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> KBUILD_CFLAGS	+= $(call cc-option,-mabi=lp64)</div><div class='ctx'> KBUILD_AFLAGS	+= $(call cc-option,-mabi=lp64)</div><div class='hunk'>@@ -71,7 +72,7 @@ stack_protector_prepare: prepare0</div><div class='ctx'> 				-mstack-protector-guard-reg=sp_el0	  \</div><div class='ctx'> 				-mstack-protector-guard-offset=$(shell	  \</div><div class='ctx'> 			awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \</div><div class='del'>-					include/generated/asm-offsets.h))</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_ARM64_BTI_KERNEL),y)</div><div class='hunk'>@@ -101,12 +102,8 @@ endif</div><div class='ctx'> # hardware.</div><div class='ctx'> ifeq ($(CONFIG_AS_HAS_ARMV8_5), y)</div><div class='ctx'>   asm-arch := armv8.5-a</div><div class='del'>-else ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)</div><div class='add'>+else</div><div class='ctx'>   asm-arch := armv8.4-a</div><div class='del'>-else ifeq ($(CONFIG_AS_HAS_ARMV8_3), y)</div><div class='del'>-  asm-arch := armv8.3-a</div><div class='del'>-else ifeq ($(CONFIG_AS_HAS_ARMV8_2), y)</div><div class='del'>-  asm-arch := armv8.2-a</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifdef asm-arch</div><div class='hunk'>@@ -197,16 +194,6 @@ install zinstall:</div><div class='ctx'> </div><div class='ctx'> archprepare:</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=arch/arm64/tools kapi</div><div class='del'>-ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)</div><div class='del'>-  ifneq ($(CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419),y)</div><div class='del'>-	@echo "warning: ld does not support --fix-cortex-a53-843419; kernel may be susceptible to erratum" &gt;&amp;2</div><div class='del'>-  endif</div><div class='del'>-endif</div><div class='del'>-ifeq ($(CONFIG_ARM64_USE_LSE_ATOMICS),y)</div><div class='del'>-  ifneq ($(CONFIG_ARM64_LSE_ATOMICS),y)</div><div class='del'>-	@echo "warning: LSE atomics not supported by binutils" &gt;&amp;2</div><div class='del'>-  endif</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> ifeq ($(KBUILD_EXTMOD),)</div><div class='ctx'> # We need to generate vdso-offsets.h before compiling certain files in kernel/.</div><div class='head'>diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile<br/>index 21cd3a87f385..b0844404eda1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/Makefile</a></div><div class='hunk'>@@ -9,9 +9,12 @@ subdir-y += amlogic</div><div class='ctx'> subdir-y += apm</div><div class='ctx'> subdir-y += apple</div><div class='ctx'> subdir-y += arm</div><div class='add'>+subdir-y += axiado</div><div class='ctx'> subdir-y += bitmain</div><div class='add'>+subdir-y += blaize</div><div class='ctx'> subdir-y += broadcom</div><div class='ctx'> subdir-y += cavium</div><div class='add'>+subdir-y += cix</div><div class='ctx'> subdir-y += exynos</div><div class='ctx'> subdir-y += freescale</div><div class='ctx'> subdir-y += hisilicon</div><div class='hunk'>@@ -27,6 +30,7 @@ subdir-y += realtek</div><div class='ctx'> subdir-y += renesas</div><div class='ctx'> subdir-y += rockchip</div><div class='ctx'> subdir-y += socionext</div><div class='add'>+subdir-y += sophgo</div><div class='ctx'> subdir-y += sprd</div><div class='ctx'> subdir-y += st</div><div class='ctx'> subdir-y += synaptics</div><div class='head'>diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts<br/>index cf58e43dd5b2..dae9968a4ff6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/airoha/en7581-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/airoha/en7581-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/airoha/en7581-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/airoha/en7581-evb.dts</a></div><div class='hunk'>@@ -24,3 +24,85 @@</div><div class='ctx'> 		reg = &lt;0x0 0x80000000 0x2 0x00000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;spi_nand {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		bootloader@0 {</div><div class='add'>+			label = "bootloader";</div><div class='add'>+			reg = &lt;0x00000000 0x00080000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		art@200000 {</div><div class='add'>+			label = "art";</div><div class='add'>+			reg = &lt;0x00200000 0x00400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tclinux@600000 {</div><div class='add'>+			label = "tclinux";</div><div class='add'>+			reg = &lt;0x00600000 0x03200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tclinux_slave@3800000 {</div><div class='add'>+			label = "tclinux_alt";</div><div class='add'>+			reg = &lt;0x03800000 0x03200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rootfs_data@6a00000 {</div><div class='add'>+			label = "rootfs_data";</div><div class='add'>+			reg = &lt;0x06a00000 0x01400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reserved_bmt@7e00000 {</div><div class='add'>+			label = "reserved_bmt";</div><div class='add'>+			reg = &lt;0x07e00000 0x00200000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;en7581_pinctrl {</div><div class='add'>+	gpio-ranges = &lt;&amp;en7581_pinctrl 0 13 47&gt;;</div><div class='add'>+</div><div class='add'>+	pcie0_rst_pins: pcie0-rst-pins {</div><div class='add'>+		conf {</div><div class='add'>+			pins = "pcie_reset0";</div><div class='add'>+			drive-open-drain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_rst_pins: pcie1-rst-pins {</div><div class='add'>+		conf {</div><div class='add'>+			pins = "pcie_reset1";</div><div class='add'>+			drive-open-drain = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_rst_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_rst_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gdm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi<br/>index 55eb1762fb11..ff6908a76e8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/airoha/en7581.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/airoha/en7581.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/airoha/en7581.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/airoha/en7581.dtsi</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/en7523-clk.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/airoha,en7581-reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='hunk'>@@ -122,6 +124,12 @@</div><div class='ctx'> 			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk20m: clock-20000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -142,6 +150,141 @@</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi@1fa10000 {</div><div class='add'>+			compatible = "airoha,en7581-snand";</div><div class='add'>+			reg = &lt;0x0 0x1fa10000 0x0 0x140&gt;,</div><div class='add'>+			      &lt;0x0 0x1fa11000 0x0 0x160&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;scuclk EN7523_CLK_SPI&gt;;</div><div class='add'>+			clock-names = "spi";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			spi_nand: nand@0 {</div><div class='add'>+				compatible = "spi-nand";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+				spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+				spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scuclk: clock-controller@1fb00000 {</div><div class='add'>+			compatible = "airoha,en7581-scu";</div><div class='add'>+			reg = &lt;0x0 0x1fb00000 0x0 0x970&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pbus_csr: syscon@1fbe3400 {</div><div class='add'>+			compatible = "airoha,en7581-pbus-csr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x1fbe3400 0x0 0xff&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pciephy: phy@1fa5a000 {</div><div class='add'>+			compatible = "airoha,en7581-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x1fa5a000 0x0 0xfff&gt;,</div><div class='add'>+			      &lt;0x0 0x1fa5b000 0x0 0xfff&gt;,</div><div class='add'>+			      &lt;0x0 0x1fa5c000 0x0 0xfff&gt;,</div><div class='add'>+			      &lt;0x0 0x1fc10044 0x0 0x4&gt;,</div><div class='add'>+			      &lt;0x0 0x1fc30044 0x0 0x4&gt;,</div><div class='add'>+			      &lt;0x0 0x1fc15030 0x0 0x104&gt;;</div><div class='add'>+			reg-names = "csr-2l", "pma0", "pma1",</div><div class='add'>+				    "p0-xr-dtime", "p1-xr-dtime",</div><div class='add'>+				    "rx-aeq";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@1fc00000 {</div><div class='add'>+			compatible = "airoha,en7581-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x1fc00000 0x0 0x1670&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;scuclk EN7523_CLK_PCIE&gt;;</div><div class='add'>+			clock-names = "sys-ck";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pciephy&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x02000000 0 0x20000000 0x0 0x20000000 0 0x4000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;scuclk EN7581_PCIE0_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_PCIE1_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_PCIE2_RST&gt;;</div><div class='add'>+			reset-names = "phy-lane0", "phy-lane1", "phy-lane2";</div><div class='add'>+</div><div class='add'>+			mediatek,pbus-csr = &lt;&amp;pbus_csr 0x0 0x4&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc0 3&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc0: interrupt-controller {</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@1fc20000 {</div><div class='add'>+			compatible = "airoha,en7581-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x1fc20000 0x0 0x1670&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;scuclk EN7523_CLK_PCIE&gt;;</div><div class='add'>+			clock-names = "sys-ck";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pciephy&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x02000000 0 0x24000000 0x0 0x24000000 0 0x4000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;scuclk EN7581_PCIE0_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_PCIE1_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_PCIE2_RST&gt;;</div><div class='add'>+			reset-names = "phy-lane0", "phy-lane1", "phy-lane2";</div><div class='add'>+</div><div class='add'>+			mediatek,pbus-csr = &lt;&amp;pbus_csr 0x8 0xc&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc1 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc1 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc1 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc1 3&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc1: interrupt-controller {</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart1: serial@1fbf0000 {</div><div class='ctx'> 			compatible = "ns16550";</div><div class='ctx'> 			reg = &lt;0x0 0x1fbf0000 0x0 0x30&gt;;</div><div class='hunk'>@@ -150,5 +293,107 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clock-frequency = &lt;1843200&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		rng@1faa1000 {</div><div class='add'>+			compatible = "airoha,en7581-trng";</div><div class='add'>+			reg = &lt;0x0 0x1faa1000 0x0 0xc04&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-controller@1fbf0200 {</div><div class='add'>+			compatible = "airoha,en7581-gpio-sysctl", "syscon",</div><div class='add'>+				     "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x1fbf0200 0x0 0xc0&gt;;</div><div class='add'>+</div><div class='add'>+			en7581_pinctrl: pinctrl {</div><div class='add'>+				compatible = "airoha,en7581-pinctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@1fbf8000 {</div><div class='add'>+			compatible = "mediatek,mt7621-i2c";</div><div class='add'>+			reg = &lt;0x0 0x1fbf8000 0x0 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;scuclk EN7581_I2C2_RST&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk20m&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@1fbf8100 {</div><div class='add'>+			compatible = "mediatek,mt7621-i2c";</div><div class='add'>+			reg = &lt;0x0 0x1fbf8100 0x0 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;scuclk EN7581_I2C_MASTER_RST&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk20m&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth: ethernet@1fb50000 {</div><div class='add'>+			compatible = "airoha,en7581-eth";</div><div class='add'>+			reg = &lt;0 0x1fb50000 0 0x2600&gt;,</div><div class='add'>+			      &lt;0 0x1fb54000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x1fb56000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "fe", "qdma0", "qdma1";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;scuclk EN7581_FE_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_FE_PDMA_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_FE_QDMA_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_XSI_MAC_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_DUAL_HSI0_MAC_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_DUAL_HSI1_MAC_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_HSI_MAC_RST&gt;,</div><div class='add'>+				 &lt;&amp;scuclk EN7581_XFP_MAC_RST&gt;;</div><div class='add'>+			reset-names = "fe", "pdma", "qdma",</div><div class='add'>+				      "xsi-mac", "hsi0-mac", "hsi1-mac",</div><div class='add'>+				      "hsi-mac", "xfp-mac";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gdm1: ethernet@1 {</div><div class='add'>+				compatible = "airoha,eth-mac";</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;10000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+					pause;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile<br/>index 00bed412ee31..2edfa7bf4ab3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/Makefile</a></div><div class='hunk'>@@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h64-remix-mini-pc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a133-liontron-h-a133l.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb</div><div class='hunk'>@@ -40,6 +41,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h313-tanix-tx1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h313-x96q.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb</div><div class='hunk'>@@ -48,7 +50,12 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-yuzukihd-chameleon.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-orangepi-4a.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts<br/>index f5c5c1464482..a7e3be0155a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts</a></div><div class='hunk'>@@ -6,6 +6,9 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-a100.dtsi"</div><div class='add'>+#include "sun50i-a100-cpu-opp.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /{</div><div class='ctx'> 	model = "Allwinner A100 Perf1";</div><div class='hunk'>@@ -20,6 +23,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	non-removable;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pio {</div><div class='ctx'> 	vcc-pb-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='ctx'> 	vcc-pc-supply = &lt;&amp;reg_eldo1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi<br/>new file mode 100644<br/>index 000000000000..c6a2efa037dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+// Copyright (c) 2020 Yangtao Li &lt;frank@allwinnertech.com&gt;</div><div class='add'>+// Copyright (c) 2020 ShuoSheng Huang &lt;huangshuosheng@allwinnertech.com&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpu_opp_table: opp-table-cpu {</div><div class='add'>+		compatible = "allwinner,sun50i-a100-operating-points";</div><div class='add'>+		nvmem-cells = &lt;&amp;cpu_speed_grade&gt;;</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;940000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1080000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1080000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;1020000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;980000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;1100000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;1020000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1320000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1320000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;1160000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;1060000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;1030000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1464000000 {</div><div class='add'>+			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1464000000&gt;;</div><div class='add'>+</div><div class='add'>+			opp-microvolt-speed0 = &lt;1180000&gt;;</div><div class='add'>+			opp-microvolt-speed1 = &lt;1180000&gt;;</div><div class='add'>+			opp-microvolt-speed2 = &lt;1130000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi<br/>index a3dccf193765..bb5f9e4f3d42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi</a></div><div class='hunk'>@@ -23,30 +23,43 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='hunk'>@@ -92,6 +105,39 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0 0 0x3fffffff&gt;;</div><div class='ctx'> </div><div class='add'>+		syscon: syscon@3000000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-system-control",</div><div class='add'>+				     "allwinner,sun50i-a64-system-control";</div><div class='add'>+			reg = &lt;0x03000000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			sram_a1: sram@20000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x00020000 0x4000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x00020000 0x4000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sram_c: sram@24000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x024000 0x21000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x024000 0x21000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sram_a2: sram@100000 {</div><div class='add'>+				compatible = "mmio-sram";</div><div class='add'>+				reg = &lt;0x0100000 0x14000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges = &lt;0 0x0100000 0x14000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ccu: clock@3001000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-a100-ccu";</div><div class='ctx'> 			reg = &lt;0x03001000 0x1000&gt;;</div><div class='hunk'>@@ -133,6 +179,18 @@</div><div class='ctx'> 			ths_calibration: calib@14 {</div><div class='ctx'> 				reg = &lt;0x14 8&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			cpu_speed_grade: cpu-speed-grade@1c {</div><div class='add'>+				reg = &lt;0x1c 0x2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@30090a0 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-wdt",</div><div class='add'>+				     "allwinner,sun6i-a31-wdt";</div><div class='add'>+			reg = &lt;0x030090a0 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;dcxo24M&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pio: pinctrl@300b000 {</div><div class='hunk'>@@ -152,12 +210,101 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> </div><div class='add'>+			mmc0_pins: mmc0-pins {</div><div class='add'>+				pins = "PF0", "PF1", "PF2", "PF3",</div><div class='add'>+				       "PF4", "PF5";</div><div class='add'>+				function = "mmc0";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			mmc1_pins: mmc1-pins {</div><div class='add'>+				pins = "PG0", "PG1", "PG2", "PG3",</div><div class='add'>+				       "PG4", "PG5";</div><div class='add'>+				function = "mmc1";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc2_pins: mmc2-pins {</div><div class='add'>+				pins = "PC0", "PC1", "PC5", "PC6",</div><div class='add'>+				       "PC8", "PC9", "PC10", "PC11",</div><div class='add'>+				       "PC13", "PC14", "PC15", "PC16";</div><div class='add'>+				function = "mmc2";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rgmii0_pins: rgmii0-pins {</div><div class='add'>+				pins = "PH0", "PH1", "PH2", "PH3", "PH4",</div><div class='add'>+				       "PH5", "PH6", "PH7", "PH9", "PH10",</div><div class='add'>+				       "PH14", "PH15", "PH16", "PH17", "PH18";</div><div class='add'>+				function = "emac0";</div><div class='add'>+				drive-strength = &lt;40&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rmii0_pins: rmii0-pins {</div><div class='add'>+				pins = "PH0", "PH1", "PH2", "PH3", "PH4",</div><div class='add'>+				       "PH5", "PH6", "PH7", "PH9", "PH10";</div><div class='add'>+				function = "emac0";</div><div class='add'>+				drive-strength = &lt;40&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart0_pb_pins: uart0-pb-pins {</div><div class='ctx'> 				pins = "PB9", "PB10";</div><div class='ctx'> 				function = "uart0";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mmc0: mmc@4020000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-mmc";</div><div class='add'>+			reg = &lt;0x04020000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC0&gt;, &lt;&amp;ccu CLK_MMC0&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC0&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc0_pins&gt;;</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@4021000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-mmc";</div><div class='add'>+			reg = &lt;0x04021000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC1&gt;, &lt;&amp;ccu CLK_MMC1&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC1&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@4022000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-emmc";</div><div class='add'>+			reg = &lt;0x04022000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC2&gt;, &lt;&amp;ccu CLK_MMC2&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC2&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@5000000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x05000000 0x400&gt;;</div><div class='hunk'>@@ -273,6 +420,26 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		emac0: ethernet@5020000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-emac",</div><div class='add'>+				     "allwinner,sun50i-a64-emac";</div><div class='add'>+			reg = &lt;0x5020000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_EMAC&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_EMAC&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ths: thermal-sensor@5070400 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-a100-ths";</div><div class='ctx'> 			reg = &lt;0x05070400 0x100&gt;;</div><div class='hunk'>@@ -285,6 +452,97 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_otg: usb@5100000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-musb",</div><div class='add'>+				     "allwinner,sun8i-a33-musb";</div><div class='add'>+			reg = &lt;0x05100000 0x0400&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OTG&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OTG&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mc";</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			extcon = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy: phy@5100400 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-usb-phy",</div><div class='add'>+				     "allwinner,sun20i-d1-usb-phy";</div><div class='add'>+			reg = &lt;0x05100400 0x100&gt;,</div><div class='add'>+			      &lt;0x05101800 0x100&gt;,</div><div class='add'>+			      &lt;0x05200800 0x100&gt;;</div><div class='add'>+			reg-names = "phy_ctrl",</div><div class='add'>+				    "pmu0",</div><div class='add'>+				    "pmu1";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_USB_PHY0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_PHY1&gt;;</div><div class='add'>+			clock-names = "usb0_phy",</div><div class='add'>+				      "usb1_phy";</div><div class='add'>+			resets = &lt;&amp;ccu RST_USB_PHY0&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_USB_PHY1&gt;;</div><div class='add'>+			reset-names = "usb0_reset",</div><div class='add'>+				      "usb1_reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@5101000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-ehci",</div><div class='add'>+				     "generic-ehci";</div><div class='add'>+			reg = &lt;0x05101000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_BUS_EHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_BUS_EHCI0&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@5101400 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-ohci",</div><div class='add'>+				     "generic-ohci";</div><div class='add'>+			reg = &lt;0x05101400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI0&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci1: usb@5200000 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-ehci",</div><div class='add'>+				     "generic-ehci";</div><div class='add'>+			reg = &lt;0x05200000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_BUS_EHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_BUS_EHCI1&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci1: usb@5200400 {</div><div class='add'>+			compatible = "allwinner,sun50i-a100-ohci",</div><div class='add'>+				     "generic-ohci";</div><div class='add'>+			reg = &lt;0x05200400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI1&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		r_ccu: clock@7010000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-a100-r-ccu";</div><div class='ctx'> 			reg = &lt;0x07010000 0x300&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts b/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts<br/>new file mode 100644<br/>index 000000000000..90a50910f07b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a133-liontron-h-a133l.dts</a></div><div class='hunk'>@@ -0,0 +1,230 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Arm Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun50i-a100.dtsi"</div><div class='add'>+#include "sun50i-a100-cpu-opp.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/{</div><div class='add'>+	model = "Liontron H-A133L";</div><div class='add'>+	compatible = "liontron,h-a133l", "allwinner,sun50i-a100";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 7 16 GPIO_ACTIVE_LOW&gt;; /* PH16 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply from a 12V-&gt;5V regulator */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb1-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_HIGH&gt;; /* PL8 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rmii0_pins&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;rmii_phy&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	reset-gpios = &lt;&amp;pio 7 12 GPIO_ACTIVE_LOW&gt;; /* PH12 */</div><div class='add'>+	reset-delay-us = &lt;2000&gt;;</div><div class='add'>+	reset-post-delay-us = &lt;2000&gt;;</div><div class='add'>+</div><div class='add'>+	rmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_eldo1&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	non-removable;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_eldo1&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp803: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp803";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "axp803.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;ac_power_supply {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-name = "vcc-codec-avcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-name = "vcc-dram-1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_aldo3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-usb-pl";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	regulator-name = "vcc-io-usb-pd-emmc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc2 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpux";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc3 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-name = "vdd-usb-cpus";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc4 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+	regulator-name = "vdd-sys";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_dcdc5 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+	regulator-name = "vcc-dram";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DCDC6 unused */</div><div class='add'>+/* DLDO3 unused */</div><div class='add'>+/* DLDO4 unused */</div><div class='add'>+</div><div class='add'>+&amp;reg_eldo1 {</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-name = "vcc-pc-emmc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ELDO2 unused */</div><div class='add'>+/* ELDO3 unused */</div><div class='add'>+</div><div class='add'>+&amp;reg_fldo1 {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+	regulator-name = "vdd-cpus-usb";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* reg_drivevbus unused */</div><div class='add'>+/* dc1sw unused */</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	dr_mode = "host";       /* USB A type receptacle, always powered */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts<br/>index 09e71fd60785..3256acec1ff9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts</a></div><div class='hunk'>@@ -124,6 +124,17 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* On Wifi/BT connector */</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_eldo1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ohci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -286,6 +297,7 @@</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart1_pins&gt;, &lt;&amp;uart1_rts_cts_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts<br/>index 379c2c8466f5..86d44349e095 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts</a></div><div class='hunk'>@@ -390,6 +390,8 @@</div><div class='ctx'> &amp;tcon0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;lcd_rgb666_pins&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;ccu CLK_TCON0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;ccu CLK_PLL_VIDEO0_2X&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi<br/>index 6eab61a12cd8..4bc6c1ef2cde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi</a></div><div class='hunk'>@@ -188,12 +188,30 @@</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	/* Alternative magnetometer */</div><div class='add'>+	af8133j: magnetometer@1c {</div><div class='add'>+		compatible = "voltafield,af8133j";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+		mount-matrix = "0", "-1", "0",</div><div class='add'>+				"-1", "0", "0",</div><div class='add'>+				"0", "0", "-1";</div><div class='add'>+</div><div class='add'>+		/* status will be fixed up in firmware */</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* Magnetometer */</div><div class='ctx'> 	lis3mdl: magnetometer@1e {</div><div class='ctx'> 		compatible = "st,lis3mdl-magn";</div><div class='ctx'> 		reg = &lt;0x1e&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='ctx'> 		vddio-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+		mount-matrix = "0", "1", "0",</div><div class='add'>+				"-1", "0", "0",</div><div class='add'>+				"0", "0", "1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Light/proximity sensor */</div><div class='hunk'>@@ -212,6 +230,9 @@</div><div class='ctx'> 		interrupts = &lt;7 5 IRQ_TYPE_EDGE_RISING&gt;; /* PH5 */</div><div class='ctx'> 		vdd-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='ctx'> 		vddio-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+		mount-matrix = "0", "1", "0",</div><div class='add'>+			       "-1", "0", "0",</div><div class='add'>+			       "0", "0", "1";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts<br/>index be2347c8f267..231e652cab67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts</a></div><div class='hunk'>@@ -103,6 +103,17 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* On Wifi/BT connector */</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_eldo1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='hunk'>@@ -175,6 +186,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* On Wifi/BT connector, with RTS/CTS */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;, &lt;&amp;uart1_rts_cts_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* On Pi-2 connector */</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts<br/>index b407e1dd08a7..ec055510af8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts</a></div><div class='hunk'>@@ -369,6 +369,8 @@</div><div class='ctx'> &amp;tcon0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;lcd_rgb666_pins&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;ccu CLK_TCON0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;ccu CLK_PLL_VIDEO0_2X&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi<br/>index a5c3920e0f04..0fecf0abb204 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi</a></div><div class='hunk'>@@ -445,6 +445,8 @@</div><div class='ctx'> 			clock-names = "ahb", "tcon-ch0";</div><div class='ctx'> 			clock-output-names = "tcon-data-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;ccu CLK_TCON0&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;ccu CLK_PLL_MIPI&gt;;</div><div class='ctx'> 			resets = &lt;&amp;ccu RST_BUS_TCON0&gt;, &lt;&amp;ccu RST_BUS_LVDS&gt;;</div><div class='ctx'> 			reset-names = "lcd", "lvds";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts<br/>index bb2cde59bd03..7906b79c0389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -65,6 +66,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -73,6 +79,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ir {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts b/arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts<br/>new file mode 100644<br/>index 000000000000..b2275eb3d55b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h313-x96q.dts</a></div><div class='hunk'>@@ -0,0 +1,230 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "X96Q";</div><div class='add'>+	compatible = "amediatech,x96q", "allwinner,sun50i-h616";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply directly from the DC input */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 7 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 7 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdca&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: EMAC1 connected to AC200 PHY */</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdcc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	/* microSD */</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;	/* PF6 */</div><div class='add'>+	disable-wp;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: XRadio XR819 WLAN @ mmc1 */</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	/* eMMC */</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	max-frequency = &lt;100000000&gt;; /* required for stable operation */</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp305: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp305", "x-powers,axp805",</div><div class='add'>+			     "x-powers,axp806";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+		x-powers,self-working-mode;</div><div class='add'>+		vina-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vinb-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vinc-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vind-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vine-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		aldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		bldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		cldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_dcdca: dcdca {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcdcb {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdcc: dcdcc {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;990000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcdcd {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcdce {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			aldo2 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			aldo3 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bldo2 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bldo3 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bldo4 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cldo1 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cldo2 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cldo3 {</div><div class='add'>+				/* unused */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_ph_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	dr_mode = "host";	/* USB A type receptacle */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts<br/>index 526443bb736c..18fa541795a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts</a></div><div class='hunk'>@@ -136,6 +136,7 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts<br/>index 05486cccee1c..128295f5a5d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts</a></div><div class='hunk'>@@ -88,6 +88,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts<br/>index 3a7ee44708a2..44fdc8b3f79d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts</a></div><div class='hunk'>@@ -157,6 +157,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts<br/>index ce3ae19e72db..0f29da7d51e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts</a></div><div class='hunk'>@@ -153,6 +153,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts<br/>index b699bb900e13..d4fc4e60e4e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts</a></div><div class='hunk'>@@ -153,6 +153,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts<br/>index ae85131aac9c..3322cc4d9aa4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts</a></div><div class='hunk'>@@ -82,6 +82,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts<br/>index 734481e998b8..3eb986c354a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts</a></div><div class='hunk'>@@ -79,6 +79,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi<br/>index d3caf27b6a55..01a29c1988a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -26,7 +25,6 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -36,7 +34,6 @@</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -46,7 +43,6 @@</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -207,7 +203,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				cpu-hot-limit {</div><div class='add'>+				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_hot_trip&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts<br/>index 3be1e8c2fdb9..2c64d834a2c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></div><div class='hunk'>@@ -129,6 +129,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -151,28 +152,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	linux,rc-map-name = "rc-beelink-gs1";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_pio {</div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: We can't add that supply for now since it would</div><div class='del'>-	 * create a circular dependency between pinctrl, the regulator</div><div class='del'>-	 * and the RSB Bus.</div><div class='del'>-	 *</div><div class='del'>-	 * vcc-pl-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='del'>-	 */</div><div class='del'>-	vcc-pm-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -290,6 +275,22 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	linux,rc-map-name = "rc-beelink-gs1";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+	/*</div><div class='add'>+	 * PL0 and PL1 are used for PMIC I2C</div><div class='add'>+	 * don't enable the pl-supply else</div><div class='add'>+	 * it will fail at boot</div><div class='add'>+	 *</div><div class='add'>+	 * vcc-pl-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	 */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spdif {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spdif_tx_pin&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts<br/>index 6c3bfe3d09d9..dc7381c944c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></div><div class='hunk'>@@ -131,6 +131,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;; /* PF6 */</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -143,7 +144,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcm: sdio-wifi@1 {</div><div class='add'>+	brcm: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_pio&gt;;</div><div class='hunk'>@@ -175,16 +176,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_vcc_wifi_io&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -295,6 +292,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	clocks = &lt;&amp;ext_osc32k&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts<br/>index a3f65a45bd26..0911c537cc6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcm: sdio-wifi@1 {</div><div class='add'>+	brcm: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_pio&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi<br/>index 13b07141c334..e34dbb992021 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></div><div class='hunk'>@@ -94,6 +94,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -112,20 +113,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_pio {</div><div class='del'>-	vcc-pm-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -240,6 +233,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	clocks = &lt;&amp;ext_osc32k&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts<br/>index c8b275552872..fa7a765ee828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts</a></div><div class='hunk'>@@ -133,6 +133,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi<br/>index 855b7d43bc50..bb7de37c0d58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi</a></div><div class='hunk'>@@ -124,6 +124,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc0_pins&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi<br/>index 2301c59b41b1..73e8604315c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -44,7 +43,6 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -61,7 +59,6 @@</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -78,7 +75,6 @@</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;ccu CLK_CPUX&gt;;</div><div class='del'>-			clock-latency-ns = &lt;244144&gt;; /* 8 32k periods */</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi<br/>index d12b01c5f41b..bebfeb2a337a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi</a></div><div class='hunk'>@@ -67,6 +67,11 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='ctx'> 	/* Card detection pin is not connected */</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi<br/>index fc7315b94406..a8644fb52b04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi</a></div><div class='hunk'>@@ -59,6 +59,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ehci1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -72,6 +77,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdio0 {</div><div class='ctx'> 	ext_rgmii_phy: ethernet-phy@1 {</div><div class='ctx'> 		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='hunk'>@@ -81,6 +90,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;	/* PF6 */</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts<br/>index a360d8567f95..f2e3300e078a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts</a></div><div class='hunk'>@@ -24,6 +24,10 @@</div><div class='ctx'> 	phy-supply = &lt;&amp;reg_dcdce&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdcc&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_dcdce&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts<br/>index 26d25b5b59e0..085f3e4e8eaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts</a></div><div class='hunk'>@@ -33,6 +33,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdca&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -45,6 +50,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdcc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ir {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -52,6 +62,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_dcdce&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;	/* PF6 */</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi<br/>index e88c1fbac6ac..ceedae9e399b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi</a></div><div class='hunk'>@@ -150,6 +150,21 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@1800000 {</div><div class='add'>+			compatible = "allwinner,sun50i-h616-mali",</div><div class='add'>+				     "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x1800000 0x40000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_GPU0&gt;, &lt;&amp;ccu CLK_BUS_GPU&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			power-domains = &lt;&amp;prcm_ppu 2&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_GPU&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		crypto: crypto@1904000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-h616-crypto";</div><div class='ctx'> 			reg = &lt;0x01904000 0x800&gt;;</div><div class='hunk'>@@ -630,21 +645,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		spdif: spdif@5093000 {</div><div class='del'>-			compatible = "allwinner,sun50i-h616-spdif";</div><div class='del'>-			reg = &lt;0x05093000 0x400&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;ccu CLK_BUS_SPDIF&gt;, &lt;&amp;ccu CLK_SPDIF&gt;;</div><div class='del'>-			clock-names = "apb", "spdif";</div><div class='del'>-			resets = &lt;&amp;ccu RST_BUS_SPDIF&gt;;</div><div class='del'>-			dmas = &lt;&amp;dma 2&gt;;</div><div class='del'>-			dma-names = "tx";</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;spdif_tx_pin&gt;;</div><div class='del'>-			#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		gpadc: adc@5070000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-h616-gpadc",</div><div class='ctx'> 				     "allwinner,sun20i-d1-gpadc";</div><div class='hunk'>@@ -679,6 +679,35 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spdif: spdif@5093000 {</div><div class='add'>+			compatible = "allwinner,sun50i-h616-spdif";</div><div class='add'>+			reg = &lt;0x05093000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_SPDIF&gt;, &lt;&amp;ccu CLK_SPDIF&gt;;</div><div class='add'>+			clock-names = "apb", "spdif";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_SPDIF&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 2&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spdif_tx_pin&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec: codec@5096000 {</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "allwinner,sun50i-h616-codec";</div><div class='add'>+			reg = &lt;0x05096000 0x31c&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_AUDIO_CODEC&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_AUDIO_CODEC_1X&gt;;</div><div class='add'>+			clock-names = "apb", "codec";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_AUDIO_CODEC&gt;;</div><div class='add'>+			dmas = &lt;&amp;dma 6&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usbotg: usb@5100000 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-h616-musb",</div><div class='ctx'> 				     "allwinner,sun8i-h3-musb";</div><div class='hunk'>@@ -860,6 +889,12 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		prcm_ppu: power-controller@7010250 {</div><div class='add'>+			compatible = "allwinner,sun50i-h616-prcm-ppu";</div><div class='add'>+			reg = &lt;0x07010250 0x10&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		nmi_intc: interrupt-controller@7010320 {</div><div class='ctx'> 			compatible = "allwinner,sun50i-h616-nmi",</div><div class='ctx'> 				     "allwinner,sun9i-a80-nmi";</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi<br/>index e92d150aaf1c..3f416d129b72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi</a></div><div class='hunk'>@@ -10,6 +10,11 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts<br/>index 18b29c6b867f..16c68177ff69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts</a></div><div class='hunk'>@@ -111,6 +111,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_HIGH&gt;;	/* PF6 */</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts<br/>index 6a4f0da97233..b340bbcb710d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts</a></div><div class='hunk'>@@ -54,6 +54,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -64,6 +69,11 @@</div><div class='ctx'> </div><div class='ctx'> /* USB 2 &amp; 3 are on the FPC connector (or the exansion board) */</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;	/* PF6 */</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts<br/>index e1cd7572a14c..c51d4d9120de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts</a></div><div class='hunk'>@@ -27,6 +27,10 @@</div><div class='ctx'> 	motorcomm,clk-out-frequency-hz = &lt;125000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The schematic shows the card detect pin wired up to PF6, via an</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts<br/>index d6631bfe629f..efe0faa252f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts</a></div><div class='hunk'>@@ -52,6 +52,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -64,6 +69,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ir {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -71,6 +81,7 @@</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;pio 8 16 GPIO_ACTIVE_LOW&gt;;	/* PI16 */</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts<br/>new file mode 100644<br/>index 000000000000..eae56908b9b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h618-yuzukihd-chameleon.dts</a></div><div class='hunk'>@@ -0,0 +1,222 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Arm Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun50i-h616.dtsi"</div><div class='add'>+#include "sun50i-h616-cpu-opp.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Yuzuki Chameleon";</div><div class='add'>+	compatible = "yuzukihd,chameleon", "allwinner,sun50i-h618";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;sdio_wifi;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply directly from the USB-C socket */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-0 = &lt;&amp;x32clk_fanout_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 6 11 GPIO_ACTIVE_LOW&gt;; /* PG11 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	allwinner,audio-routing = "Line Out", "LINEOUT";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 GPIO_ACTIVE_LOW&gt;;	/* PF6 */</div><div class='add'>+	disable-wp;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	sdio_wifi: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;6 12 IRQ_TYPE_LEVEL_LOW&gt;;  /* PG12 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-3_3v;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_dldo1&gt;;	/* via VCC_IO */</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_dldo1&gt;;	/* via VCC_IO */</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_dldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp313: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp313a";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;2 2 IRQ_TYPE_LEVEL_LOW&gt;;	/* PC2 */</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies VCC-PLL, so needs to be always on. */</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies VCC-IO, so needs to be always on. */</div><div class='add'>+			reg_dldo1: dldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;990000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;810000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpu";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_ph_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Connected to the Bluetooth UART pins of the XR829 Wifi/BT chip. */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;, &lt;&amp;uart1_rts_cts_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg {</div><div class='add'>+	/*</div><div class='add'>+	 * PHY0 pins are connected to a USB-C socket, but a role switch</div><div class='add'>+	 * is not implemented: both CC pins are pulled to GND.</div><div class='add'>+	 * The VBUS pins power the device, so a fixed peripheral mode</div><div class='add'>+	 * is the best choice.</div><div class='add'>+	 * The board can be powered via GPIOs, in this case port0 *can*</div><div class='add'>+	 * act as a host (with a cable/adapter ignoring CC), as VBUS is</div><div class='add'>+	 * then provided by the GPIOs. Any user of this setup would</div><div class='add'>+	 * need to adjust the DT accordingly: dr_mode set to "host",</div><div class='add'>+	 * enabling OHCI0 and EHCI0.</div><div class='add'>+	 */</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_id_det-gpios = &lt;&amp;pio 6 18 GPIO_ACTIVE_HIGH&gt;; /* PG18 */</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+	usb2_vbus-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+	usb3_vbus-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts<br/>index 80ccab7b5ba7..1a750c5f6fac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts</a></div><div class='hunk'>@@ -167,6 +167,12 @@</div><div class='ctx'> 			gpios = &lt;&amp;pio 8 12 GPIO_ACTIVE_HIGH&gt;; /* PI12 */</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 8 11 GPIO_ACTIVE_HIGH&gt;; /* PI11 */</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_vcc5v: regulator-vcc5v { /* USB-C power input */</div><div class='hunk'>@@ -177,6 +183,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;codec {</div><div class='add'>+	/* Both speakers and headphone jack connected to 74HC4052D analog mux*/</div><div class='add'>+	allwinner,audio-routing = "Speaker", "LINEOUT",</div><div class='add'>+				  "Headphone", "LINEOUT";</div><div class='add'>+	allwinner,pa-gpios = &lt;&amp;pio 8 5 GPIO_ACTIVE_HIGH&gt;; // PI5</div><div class='add'>+	hp-det-gpios = &lt;&amp;pio 8 3 GPIO_ACTIVE_HIGH&gt;; // PI3</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_dcdc1&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -185,6 +200,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='hunk'>@@ -231,6 +251,7 @@</div><div class='ctx'> 		battery_power: battery-power {</div><div class='ctx'> 			compatible = "x-powers,axp717-battery-power-supply";</div><div class='ctx'> 			monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+			x-powers,no-thermistor;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='hunk'>@@ -270,7 +291,7 @@</div><div class='ctx'> 			reg_aldo4: aldo4 {</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc-pg";</div><div class='add'>+				regulator-name = "avcc";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reg_bldo1: bldo1 {</div><div class='hunk'>@@ -293,7 +314,10 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reg_cldo1: cldo1 {</div><div class='del'>-				/* 3.3v - audio codec - not yet implemented */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-spkr-amp";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reg_cldo2: cldo2 {</div><div class='hunk'>@@ -319,8 +343,17 @@</div><div class='ctx'> 				regulator-name = "boost";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			/*</div><div class='add'>+			 * Regulator function is unknown, but reading</div><div class='add'>+			 * GPIO values in bootloader is inconsistent</div><div class='add'>+			 * on reboot if this is disabled. Setting to</div><div class='add'>+			 * default value from regulator OTP mem.</div><div class='add'>+			 */</div><div class='ctx'> 			reg_cpusldo: cpusldo {</div><div class='del'>-				/* unused */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts<br/>index ff453336eab1..bef4d107482f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-h.dts</a></div><div class='hunk'>@@ -71,6 +71,25 @@</div><div class='ctx'> 			    &lt;&amp;pio 8 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		#mux-control-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_vcc3v8_usb: regulator-vcc3v8-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 4 5 GPIO_ACTIVE_HIGH&gt;; /* PE5 */</div><div class='add'>+		regulator-min-microvolt = &lt;3800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3800000&gt;;</div><div class='add'>+		regulator-name = "vcc3v8-usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 8 7 GPIO_ACTIVE_HIGH&gt;; /* PI7 */</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0-usb";</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc3v8_usb&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpadc {</div><div class='hunk'>@@ -113,3 +132,7 @@</div><div class='ctx'> 		function = "gpio_out";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_vcc5v0_usb&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi<br/>new file mode 100644<br/>index 000000000000..7b36c47a3a13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi</a></div><div class='hunk'>@@ -0,0 +1,735 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+// Copyright (C) 2023-2024 Arm Ltd.</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/sun6i-rtc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/sun55i-a523-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/sun55i-a523-mcu-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/sun55i-a523-r-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/sun55i-a523-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/sun55i-a523-mcu-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/sun55i-a523-r-ccu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/allwinner,sun55i-a523-ppu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/allwinner,sun55i-a523-pck-600.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x000&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@400 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x400&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@500 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x500&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@600 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x600&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@700 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x700&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc24M: osc24M-clk {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "osc24M";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpu: gpu@1800000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-mali",</div><div class='add'>+				     "arm,mali-valhall-jm";</div><div class='add'>+			reg = &lt;0x1800000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_GPU&gt;, &lt;&amp;ccu CLK_BUS_GPU&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			power-domains = &lt;&amp;pck600 PD_GPU&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_GPU&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pio: pinctrl@2000000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-pinctrl";</div><div class='add'>+			reg = &lt;0x2000000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_APB1&gt;, &lt;&amp;osc24M&gt;, &lt;&amp;rtc CLK_OSC32K&gt;;</div><div class='add'>+			clock-names = "apb", "hosc", "losc";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			mmc0_pins: mmc0-pins {</div><div class='add'>+				pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+				function = "mmc0";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			mmc1_pins: mmc1-pins {</div><div class='add'>+				pins = "PG0" ,"PG1", "PG2", "PG3", "PG4", "PG5";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+				function = "mmc1";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mmc2_pins: mmc2-pins {</div><div class='add'>+				pins = "PC0", "PC1" ,"PC5", "PC6", "PC8",</div><div class='add'>+				       "PC9", "PC10", "PC11", "PC13", "PC14",</div><div class='add'>+				       "PC15", "PC16";</div><div class='add'>+				allwinner,pinmux = &lt;3&gt;;</div><div class='add'>+				function = "mmc2";</div><div class='add'>+				drive-strength = &lt;30&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rgmii0_pins: rgmii0-pins {</div><div class='add'>+				pins = "PH0", "PH1", "PH2", "PH3", "PH4",</div><div class='add'>+				       "PH5", "PH6", "PH7", "PH9", "PH10",</div><div class='add'>+				       "PH14", "PH15", "PH16", "PH17", "PH18";</div><div class='add'>+				allwinner,pinmux = &lt;5&gt;;</div><div class='add'>+				function = "gmac0";</div><div class='add'>+				drive-strength = &lt;40&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0_pb_pins: uart0-pb-pins {</div><div class='add'>+				pins = "PB9", "PB10";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+				function = "uart0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			uart1_pins: uart1-pins {</div><div class='add'>+				pins = "PG6", "PG7";</div><div class='add'>+				function = "uart1";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			uart1_rts_cts_pins: uart1-rts-cts-pins {</div><div class='add'>+				pins = "PG8", "PG9";</div><div class='add'>+				function = "uart1";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ccu: clock-controller@2001000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ccu";</div><div class='add'>+			reg = &lt;0x02001000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;rtc CLK_OSC32K&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_IOSC&gt;, &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+			clock-names = "hosc", "losc",</div><div class='add'>+				      "iosc", "losc-fanout";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2050000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-wdt";</div><div class='add'>+			reg = &lt;0x2050000 0x20&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;, &lt;&amp;rtc CLK_OSC32K&gt;;</div><div class='add'>+			clock-names = "hosc", "losc";</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@2500000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02500000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@2500400 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02500400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@2500800 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02500800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART2&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@2500c00 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02500c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART3&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@2501000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02501000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART4&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart5: serial@2501400 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02501400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART5&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART5&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart6: serial@2501800 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02501800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART6&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART6&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart7: serial@2501c00 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x02501c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_UART7&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_UART7&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@2502000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2502000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@2502400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2502400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@2502800 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2502800 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C2&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@2502c00 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2502c00 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C3&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@2503000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2503000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C4&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@2503400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x2503400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_I2C5&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_I2C5&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon: syscon@3000000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-system-control",</div><div class='add'>+				     "allwinner,sun50i-a64-system-control";</div><div class='add'>+			reg = &lt;0x03000000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sid: efuse@3006000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-sid",</div><div class='add'>+				     "allwinner,sun50i-a64-sid";</div><div class='add'>+			reg = &lt;0x03006000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@3400000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x3400000 0x10000&gt;,</div><div class='add'>+			      &lt;0x3460000 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+</div><div class='add'>+			its: msi-controller@3440000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x3440000 0x20000&gt;;</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+				dma-noncoherent;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@4020000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-mmc",</div><div class='add'>+				     "allwinner,sun20i-d1-mmc";</div><div class='add'>+			reg = &lt;0x04020000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC0&gt;, &lt;&amp;ccu CLK_MMC0&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC0&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc0_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			cap-sd-highspeed;</div><div class='add'>+			cap-mmc-highspeed;</div><div class='add'>+			cap-sdio-irq;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@4021000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-mmc",</div><div class='add'>+				     "allwinner,sun20i-d1-mmc";</div><div class='add'>+			reg = &lt;0x04021000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC1&gt;, &lt;&amp;ccu CLK_MMC1&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC1&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			cap-sd-highspeed;</div><div class='add'>+			cap-mmc-highspeed;</div><div class='add'>+			cap-sdio-irq;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@4022000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-mmc",</div><div class='add'>+				     "allwinner,sun20i-d1-mmc";</div><div class='add'>+			reg = &lt;0x04022000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_MMC2&gt;, &lt;&amp;ccu CLK_MMC2&gt;;</div><div class='add'>+			clock-names = "ahb", "mmc";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_MMC2&gt;;</div><div class='add'>+			reset-names = "ahb";</div><div class='add'>+			interrupts = &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mmc2_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			cap-sd-highspeed;</div><div class='add'>+			cap-mmc-highspeed;</div><div class='add'>+			cap-sdio-irq;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg: usb@4100000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-musb",</div><div class='add'>+				     "allwinner,sun8i-a33-musb";</div><div class='add'>+			reg = &lt;0x4100000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mc";</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OTG&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OTG&gt;;</div><div class='add'>+			extcon = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy: phy@4100400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-usb-phy",</div><div class='add'>+				     "allwinner,sun20i-d1-usb-phy";</div><div class='add'>+			reg = &lt;0x4100400 0x100&gt;,</div><div class='add'>+			      &lt;0x4101800 0x100&gt;,</div><div class='add'>+			      &lt;0x4200800 0x100&gt;;</div><div class='add'>+			reg-names = "phy_ctrl",</div><div class='add'>+				    "pmu0",</div><div class='add'>+				    "pmu1";</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;,</div><div class='add'>+				 &lt;&amp;osc24M&gt;;</div><div class='add'>+			clock-names = "usb0_phy",</div><div class='add'>+				      "usb1_phy";</div><div class='add'>+			resets = &lt;&amp;ccu RST_USB_PHY0&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_USB_PHY1&gt;;</div><div class='add'>+			reset-names = "usb0_reset",</div><div class='add'>+				      "usb1_reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@4101000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ehci",</div><div class='add'>+				     "generic-ehci";</div><div class='add'>+			reg = &lt;0x4101000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_BUS_EHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_BUS_EHCI0&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@4101400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ohci",</div><div class='add'>+				     "generic-ohci";</div><div class='add'>+			reg = &lt;0x4101400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI0&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI0&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI0&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 0&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci1: usb@4200000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ehci",</div><div class='add'>+				     "generic-ehci";</div><div class='add'>+			reg = &lt;0x4200000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_BUS_EHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu RST_BUS_EHCI1&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci1: usb@4200400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ohci",</div><div class='add'>+				     "generic-ohci";</div><div class='add'>+			reg = &lt;0x4200400 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_OHCI1&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_USB_OHCI1&gt;;</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_OHCI1&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@4500000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-gmac0",</div><div class='add'>+				     "allwinner,sun50i-a64-emac";</div><div class='add'>+			reg = &lt;0x04500000 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;ccu CLK_BUS_EMAC0&gt;;</div><div class='add'>+			clock-names = "stmmaceth";</div><div class='add'>+			resets = &lt;&amp;ccu RST_BUS_EMAC0&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;rgmii0_pins&gt;;</div><div class='add'>+			syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ppu: power-controller@7001400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-ppu";</div><div class='add'>+			reg = &lt;0x07001400 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;r_ccu CLK_BUS_R_PPU1&gt;;</div><div class='add'>+			resets = &lt;&amp;r_ccu RST_BUS_R_PPU1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_ccu: clock-controller@7010000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-r-ccu";</div><div class='add'>+			reg = &lt;0x7010000 0x250&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_OSC32K&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_IOSC&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_PLL_PERIPH0_200M&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_PLL_AUDIO0_4X&gt;;</div><div class='add'>+			clock-names = "hosc",</div><div class='add'>+				      "losc",</div><div class='add'>+				      "iosc",</div><div class='add'>+				      "pll-periph",</div><div class='add'>+				      "pll-audio";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;r_ccu CLK_R_AHB&gt;, &lt;&amp;r_ccu CLK_R_APB0&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;, &lt;100000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nmi_intc: interrupt-controller@7010320 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-nmi";</div><div class='add'>+			reg = &lt;0x07010320 0xc&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_pio: pinctrl@7022000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-r-pinctrl";</div><div class='add'>+			reg = &lt;0x7022000 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;r_ccu CLK_R_APB0&gt;,</div><div class='add'>+				 &lt;&amp;osc24M&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_OSC32K&gt;;</div><div class='add'>+			clock-names = "apb", "hosc", "losc";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			r_i2c_pins: r-i2c-pins {</div><div class='add'>+				pins = "PL0" ,"PL1";</div><div class='add'>+				allwinner,pinmux = &lt;2&gt;;</div><div class='add'>+				function = "r_i2c0";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pck600: power-controller@7060000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-pck-600";</div><div class='add'>+			reg = &lt;0x07060000 0x8000&gt;;</div><div class='add'>+			clocks = &lt;&amp;r_ccu CLK_BUS_R_PPU0&gt;;</div><div class='add'>+			resets = &lt;&amp;r_ccu RST_BUS_R_PPU0&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_i2c0: i2c@7081400 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-i2c",</div><div class='add'>+				     "allwinner,sun8i-v536-i2c",</div><div class='add'>+				     "allwinner,sun6i-a31-i2c";</div><div class='add'>+			reg = &lt;0x07081400 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;r_ccu CLK_BUS_R_I2C0&gt;;</div><div class='add'>+			resets = &lt;&amp;r_ccu RST_BUS_R_I2C0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;r_i2c_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@7090000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-rtc",</div><div class='add'>+				     "allwinner,sun50i-r329-rtc";</div><div class='add'>+			reg = &lt;0x7090000 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;r_ccu CLK_BUS_R_RTC&gt;,</div><div class='add'>+				 &lt;&amp;osc24M&gt;,</div><div class='add'>+				 &lt;&amp;r_ccu CLK_R_AHB&gt;;</div><div class='add'>+			clock-names = "bus", "hosc", "ahb";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_ccu: clock-controller@7102000 {</div><div class='add'>+			compatible = "allwinner,sun55i-a523-mcu-ccu";</div><div class='add'>+			reg = &lt;0x7102000 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc24M&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_OSC32K&gt;,</div><div class='add'>+				 &lt;&amp;rtc CLK_IOSC&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_PLL_AUDIO0_4X&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_PLL_PERIPH0_300M&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_DSP&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_MBUS&gt;,</div><div class='add'>+				 &lt;&amp;r_ccu CLK_R_AHB&gt;,</div><div class='add'>+				 &lt;&amp;r_ccu CLK_R_APB0&gt;;</div><div class='add'>+			clock-names = "hosc",</div><div class='add'>+				      "losc",</div><div class='add'>+				      "iosc",</div><div class='add'>+				      "pll-audio0-4x",</div><div class='add'>+				      "pll-periph0-300m",</div><div class='add'>+				      "dsp",</div><div class='add'>+				      "mbus",</div><div class='add'>+				      "r-ahb",</div><div class='add'>+				      "r-apb0";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		npu: npu@7122000 {</div><div class='add'>+			compatible = "vivante,gc";</div><div class='add'>+			reg = &lt;0x07122000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;mcu_ccu CLK_BUS_MCU_NPU_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;ccu CLK_NPU&gt;,</div><div class='add'>+				 &lt;&amp;mcu_ccu CLK_BUS_MCU_NPU_HCLK&gt;;</div><div class='add'>+			clock-names = "bus", "core", "reg";</div><div class='add'>+			resets = &lt;&amp;mcu_ccu RST_BUS_MCU_NPU&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ppu PD_NPU&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts<br/>new file mode 100644<br/>index 000000000000..f82a8d121697<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+// Copyright (C) 2025 Arm Ltd.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun55i-a523.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa Cubie A5E";</div><div class='add'>+	compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		power-led {</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;r_pio 0 4 GPIO_ACTIVE_LOW&gt;; /* PL4 */</div><div class='add'>+			default-state = "on";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		use-led {</div><div class='add'>+			function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;r_pio 0 5 GPIO_ACTIVE_LOW&gt;; /* PL5 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;axp717_adc 3&gt;, /* vsys_v */</div><div class='add'>+			      &lt;&amp;axp717_adc 4&gt;; /* pmic_temp */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply from the USB-C connector */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_vbus: vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		gpio = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_HIGH&gt;;	/* PL8 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ext_rgmii_phy&gt;;</div><div class='add'>+	phy-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+</div><div class='add'>+	allwinner,tx-delay-ps = &lt;300&gt;;</div><div class='add'>+	allwinner,rx-delay-ps = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	ext_rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 7 8 GPIO_ACTIVE_LOW&gt;; /* PH8 */</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;150000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	vcc-pd-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_aldo2&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_cldo3&gt;;	/* actually switchable */</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pj-supply = &lt;&amp;reg_cldo4&gt;;</div><div class='add'>+	vcc-pk-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp717: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp717";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		aldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		bldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		cldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		axp717_adc: adc {</div><div class='add'>+			compatible = "x-powers,axp717-adc";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		battery-power {</div><div class='add'>+			compatible = "x-powers,axp717-battery-power-supply";</div><div class='add'>+			/* charger mode design but has no battery terminal */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies the "little" cluster (1.4 GHz cores) */</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpul";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo2: aldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pe";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo3: aldo3 {</div><div class='add'>+				/* supplies the I2C pins for this PMIC */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-pl-usb";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo4: aldo4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pll-dxco-avcc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pg-iowifi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo2: bldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pm-lpddr4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo3: bldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-mipi-cam";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo4: bldo4 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo1: cldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pc-and-their-dog";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo2: cldo2 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo3: cldo3 {</div><div class='add'>+				/* IO, USB-2, 3V3, card, NAND, sensor, PI */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-io-mmc-spi-ana";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo4: cldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-pj-phy";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cpusldo: cpusldo {</div><div class='add'>+				/* supplies the management core */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpus";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb-power {</div><div class='add'>+			compatible = "x-powers,axp717-usb-power-supply";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	axp323: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp323";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			aldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-mipi-dsi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies the "big" cluster (1.8 GHz cores) */</div><div class='add'>+			reg_dcdc1_323: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpub";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* DCDC2 is polyphased with DCDC1 */</div><div class='add'>+</div><div class='add'>+			/* RISC-V management core supply */</div><div class='add'>+			reg_dcdc3_323: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-dnr";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+/*</div><div class='add'>+ * Specifying the supply would create a circular dependency.</div><div class='add'>+ *</div><div class='add'>+ *	vcc-pl-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+ */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	/*</div><div class='add'>+	 * The USB-C port is the primary power supply, so in this configuration</div><div class='add'>+	 * relies on the other end of the USB cable to supply the VBUS power.</div><div class='add'>+	 * So use this port in peripheral mode.</div><div class='add'>+	 * It is possible to supply the board with the 5V pins on the GPIO</div><div class='add'>+	 * header, and since the DCIN_5V line is hardwired to the USB-C VBUS</div><div class='add'>+	 * pins, the port turns into a host port, unconditionally supplying</div><div class='add'>+	 * power. The dr_mode property should be changed to "host" here, if</div><div class='add'>+	 * users choose this setup.</div><div class='add'>+	 */</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The schematic describes USB0_ID (PL10), measuring VBUS_5V, which looks to</div><div class='add'>+ * be always on. Also there is USB-VBUSDET (PL2), which is measuring the same</div><div class='add'>+ * VBUS_5V. There is also DCIN_DET, which measures DCIN_5V, so the power</div><div class='add'>+ * input rail.</div><div class='add'>+ * None of them seem to make any sense in relation to detecting USB devices</div><div class='add'>+ * or whether there is power provided via any USB pins: they would always</div><div class='add'>+ * report high, otherwise the system wouldn't be running.</div><div class='add'>+ * The AXP717C provides proper USB-C CC pin functionality, but the PMIC is</div><div class='add'>+ * not connected to those pins of the USB-C connector.</div><div class='add'>+ */</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts<br/>new file mode 100644<br/>index 000000000000..a96927fbdadd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+// Copyright (C) 2024 Arm Ltd.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun55i-a523.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "X96Q Pro+";</div><div class='add'>+	compatible = "amediatech,x96q-pro-plus", "allwinner,sun55i-h728";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "ext_osc32k";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply from the barrel plug */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc3v3: vcc3v3 {</div><div class='add'>+		/* 3.3V dummy supply for the SD card */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	vcc-pd-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_cldo3&gt;;	/* actually switchable */</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pj-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pk-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp717: pmic@34 {</div><div class='add'>+		compatible = "x-powers,axp717";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		aldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		bldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		cldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies the "little" cluster (1.0(?) GHz cores) */</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpul";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1360000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1360000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc4: dcdc4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-name = "vdd-dcdc4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo2: aldo2 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo3: aldo3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-aldo3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo4: aldo4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pll-dxco-avcc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pg-wifi-lvds";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo2: bldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-dram-1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo3: bldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-name = "vcc-bldo3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo4: bldo4 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo1: cldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-codec-sd";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo2: cldo2 {</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo3: cldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-codec-eth-sd";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo4: cldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-eth-phy";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cpusldo: cpusldo {</div><div class='add'>+				/* supplies the management core */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpus";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	axp323: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp323";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			aldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies the "big" cluster (1.8 GHz cores) */</div><div class='add'>+			reg_dcdc1_323: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpub";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* DCDC2 is polyphased with DCDC1 */</div><div class='add'>+</div><div class='add'>+			reg_dcdc3_323: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-name = "vdd-dcdc3";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+/*</div><div class='add'>+ * Specifying the supply would create a circular dependency.</div><div class='add'>+ *</div><div class='add'>+ *	vcc-pl-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+ */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	/* USB0 is a USB-A receptacle, always powered, so force host mode. */</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts<br/>new file mode 100644<br/>index 000000000000..1b054fa8ef74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts</a></div><div class='hunk'>@@ -0,0 +1,366 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+// Copyright (C) 2024 Arm Ltd.</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun55i-a523.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Avaota A1";</div><div class='add'>+	compatible = "yuzukihd,avaota-a1", "allwinner,sun55i-t527";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "ext_osc32k";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;axp717_adc 3&gt;, /* vsys_v */</div><div class='add'>+			      &lt;&amp;axp717_adc 4&gt;; /* pmic_temp */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc12v: vcc12v {</div><div class='add'>+		/* DC input jack */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-12v";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: vcc5v {</div><div class='add'>+		/* board wide 5V supply from the 12V-&gt;5V regulator */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc12v&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_vbus: vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 8 12 GPIO_ACTIVE_HIGH&gt;;	/* PI12 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ext_rgmii_phy&gt;;</div><div class='add'>+	phy-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+</div><div class='add'>+	allwinner,tx-delay-ps = &lt;100&gt;;</div><div class='add'>+	allwinner,rx-delay-ps = &lt;300&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	ext_rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 7 8 GPIO_ACTIVE_LOW&gt;; /* PH8 */</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;150000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	vcc-pd-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_cldo3&gt;;	/* actually switchable */</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pj-supply = &lt;&amp;reg_dcdc4&gt;;</div><div class='add'>+	vcc-pk-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp717: pmic@35 {</div><div class='add'>+		compatible = "x-powers,axp717";</div><div class='add'>+		reg = &lt;0x35&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		aldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		bldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		cldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		axp717_adc: adc {</div><div class='add'>+			compatible = "x-powers,axp717-adc";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		battery-power {</div><div class='add'>+			compatible = "x-powers,axp717-battery-power-supply";</div><div class='add'>+			/* no battery; output used for dcdc4 instead */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies the "little" cluster (1.4 GHz cores) */</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpul";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc4: dcdc4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vdd-io";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo1: aldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo2: aldo2 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo3: aldo3 {</div><div class='add'>+				/* supplies the I2C pins for this PMIC */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-pl-pm";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo4: aldo4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pll-dxco-avcc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pg-wifi-lvds";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo2: bldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-dram-1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo3: bldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-cvp-pk-vid1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo4: bldo4 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo1: cldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo2: cldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-efuse";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo3: cldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-io-mmc-spi-ana";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo4: cldo4 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cpusldo: cpusldo {</div><div class='add'>+				/* supplies the management core */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpus";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb-power {</div><div class='add'>+			compatible = "x-powers,axp717-usb-power-supply";</div><div class='add'>+			/* 12V-5V buck converter can supply up to 5A */</div><div class='add'>+			input-current-limit-microamp = &lt;3250000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	axp323: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp323";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			aldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dldo1 {</div><div class='add'>+				/* not connected */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies the "big" cluster (1.8 GHz cores) */</div><div class='add'>+			reg_dcdc1_323: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpub";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* DCDC2 is polyphased with DCDC1 */</div><div class='add'>+</div><div class='add'>+			/* Some RISC-V management core related voltage */</div><div class='add'>+			reg_dcdc3_323: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-dnr";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+/*</div><div class='add'>+ * Specifying the supply would create a circular dependency.</div><div class='add'>+ *</div><div class='add'>+ *	vcc-pl-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+ */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;r_ccu CLK_BUS_R_RTC&gt;, &lt;&amp;osc24M&gt;,</div><div class='add'>+		 &lt;&amp;r_ccu CLK_R_AHB&gt;, &lt;&amp;ext_osc32k&gt;;</div><div class='add'>+	clock-names = "bus", "hosc", "ahb", "ext-osc32k";</div><div class='add'>+	assigned-clocks = &lt;&amp;rtc CLK_OSC32K&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	 /*</div><div class='add'>+	  * The CC pins of the USB-C port have two pull-down resistors</div><div class='add'>+	  * connected to GND, which fixes this port to a peripheral role.</div><div class='add'>+	  * There is a regulator, controlled by a GPIO, to provide VBUS power</div><div class='add'>+	  * to the port, and a VBUSDET GPIO, to detect externally provided</div><div class='add'>+	  * power, but without the CC pins there is no real way to do a</div><div class='add'>+	  * runtime role detection.</div><div class='add'>+	  */</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	usb0_vbus_det-gpios = &lt;&amp;pio 8 13 GPIO_ACTIVE_HIGH&gt;; /* PI13 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts<br/>new file mode 100644<br/>index 000000000000..39a4e194712a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts</a></div><div class='hunk'>@@ -0,0 +1,421 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sun55i-a523.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "OrangePi 4A";</div><div class='add'>+	compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_osc32k: ext-osc32k-clk {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "ext_osc32k";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		/* PWM capable pin, but PWM isn't supported yet. */</div><div class='add'>+		led {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 3 20 GPIO_ACTIVE_HIGH&gt;; /* PD20 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;axp717_adc 3&gt;, /* vsys_v */</div><div class='add'>+			      &lt;&amp;axp717_adc 4&gt;, /* pmic_temp */</div><div class='add'>+			      &lt;&amp;axp717_adc 7&gt;; /* bkup_batt_v */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;r_pio 1 1 GPIO_ACTIVE_LOW&gt;; /* PM1 */</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_otg_vbus: regulator-otg-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "otg-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		gpio = &lt;&amp;r_pio 0 4 GPIO_ACTIVE_HIGH&gt;;	/* PL4 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-pcie-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		gpio = &lt;&amp;r_pio 0 8 GPIO_ACTIVE_HIGH&gt;;	/* PL8 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_vbus: regulator-usb-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usb-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		gpio = &lt;&amp;r_pio 0 12 GPIO_ACTIVE_HIGH&gt;;	/* PL12 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc5v: regulator-vcc5v {</div><div class='add'>+		/* board wide 5V supply from USB type-C port */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_dcdc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;; /* PF6 */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_dldo1_323&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;r_pio&gt;;</div><div class='add'>+		interrupts = &lt;1 0 IRQ_TYPE_LEVEL_LOW&gt;; /* PM0 */</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	vcc-pb-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pc-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	vcc-pd-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pe-supply = &lt;&amp;reg_aldo2&gt;;</div><div class='add'>+	vcc-pf-supply = &lt;&amp;reg_cldo3&gt;;	/* VCC-IO for 3.3v; VCC-MCSI for 1.8v */</div><div class='add'>+	vcc-pg-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+	vcc-ph-supply = &lt;&amp;reg_cldo3&gt;;	/* via VCC-IO */</div><div class='add'>+	vcc-pi-supply = &lt;&amp;reg_cldo3&gt;;</div><div class='add'>+	vcc-pj-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+	vcc-pk-supply = &lt;&amp;reg_cldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	axp717: pmic@35 {</div><div class='add'>+		compatible = "x-powers,axp717";</div><div class='add'>+		reg = &lt;0x35&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;nmi_intc 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		aldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		bldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		cldoin-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		axp717_adc: adc {</div><div class='add'>+			compatible = "x-powers,axp717-adc";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		battery-power {</div><div class='add'>+			compatible = "x-powers,axp717-battery-power-supply";</div><div class='add'>+			/* no battery; output used for dcdc4 instead */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* Supplies the "little" cluster (1.4 GHz cores) */</div><div class='add'>+			reg_dcdc1: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpul";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc2: dcdc2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+				regulator-name = "vdd-gpu-sys";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc3: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1160000&gt;;</div><div class='add'>+				regulator-name = "vcc-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dcdc4: dcdc4 {</div><div class='add'>+				/* feeds 3.3V pin on GPIO header */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vdd-io";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			aldo1 {</div><div class='add'>+				/* not actually connected */</div><div class='add'>+				regulator-name = "avdd-csi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo2: aldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pe";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo3: aldo3 {</div><div class='add'>+				/* supplies the I2C pins for this PMIC */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-pl-usb";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_aldo4: aldo4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pll-dxco-avcc";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo1: bldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pg-wifi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_bldo2: bldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-pm-lpddr";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bldo3 {</div><div class='add'>+				/* not actually connected */</div><div class='add'>+				regulator-name = "afvcc-csi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bldo4 {</div><div class='add'>+				/* not actually connected */</div><div class='add'>+				regulator-name = "dvdd-csi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo1: cldo1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc-cvp-pc-lvds-mcsi-pk-efuse-pcie-edp-1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo2: cldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3-csi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo3: cldo3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-io-mmc-nand-pd-pi-usb";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cldo4: cldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-3v3-phy1-lcd";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_cpusldo: cpusldo {</div><div class='add'>+				/* supplies the management core */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpus-usb-0v9";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb-power {</div><div class='add'>+			compatible = "x-powers,axp717-usb-power-supply";</div><div class='add'>+			input-current-limit-microamp = &lt;3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	axp323: pmic@36 {</div><div class='add'>+		compatible = "x-powers,axp323";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		vin1-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;reg_vcc5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_aldo1_323: aldo1 {</div><div class='add'>+				/* less capable and shares load with dldo1 */</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-wifi";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_dldo1_323: dldo1 {</div><div class='add'>+				/* more capable and shares load with aldo1 */</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc-wifi2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* Supplies the "big" cluster (1.8 GHz cores) */</div><div class='add'>+			reg_dcdc1_323: dcdc1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-name = "vdd-cpub";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* DCDC2 is polyphased with DCDC1 */</div><div class='add'>+</div><div class='add'>+			/* Some RISC-V management core related voltage */</div><div class='add'>+			reg_dcdc3_323: dcdc3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd-dnr";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+/*</div><div class='add'>+ * Specifying the supply would create a circular dependency.</div><div class='add'>+ *</div><div class='add'>+ *	vcc-pl-supply = &lt;&amp;reg_aldo3&gt;;</div><div class='add'>+ */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_bldo2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	clocks = &lt;&amp;r_ccu CLK_BUS_R_RTC&gt;, &lt;&amp;osc24M&gt;,</div><div class='add'>+		 &lt;&amp;r_ccu CLK_R_AHB&gt;, &lt;&amp;ext_osc32k&gt;;</div><div class='add'>+	clock-names = "bus", "hosc", "ahb", "ext-osc32k";</div><div class='add'>+	assigned-clocks = &lt;&amp;rtc CLK_OSC32K&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pb_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;, &lt;&amp;uart1_rts_cts_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		clocks = &lt;&amp;rtc CLK_OSC32K_FANOUT&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		vbat-supply = &lt;&amp;reg_aldo1_323&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;reg_bldo1&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;r_pio 1 3 GPIO_ACTIVE_HIGH&gt;; /* PM3 */</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;r_pio 1 4 GPIO_ACTIVE_HIGH&gt;; /* PM4 */</div><div class='add'>+		shutdown-gpios = &lt;&amp;r_pio 1 2 GPIO_ACTIVE_HIGH&gt;; /* PM2 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_otg {</div><div class='add'>+	/*</div><div class='add'>+	 * The OTG controller is connected to one of the type-A ports.</div><div class='add'>+	 * There is a regulator, controlled by a GPIO, to provide VBUS power</div><div class='add'>+	 * to the port, and a VBUSDET GPIO, to detect externally provided</div><div class='add'>+	 * power. But without ID or CC pins there is no real way to do a</div><div class='add'>+	 * runtime role detection.</div><div class='add'>+	 */</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy {</div><div class='add'>+	usb0_vbus-supply = &lt;&amp;reg_otg_vbus&gt;;</div><div class='add'>+	usb0_vbus_det-gpios = &lt;&amp;r_pio 0 7 GPIO_ACTIVE_HIGH&gt;; /* PL7 */</div><div class='add'>+	usb1_vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi<br/>index 0def0b0daaf7..effd242f6bf7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi</a></div><div class='hunk'>@@ -130,16 +130,19 @@</div><div class='ctx'> 		cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;150000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cb_intosc_ls_clk: cb-intosc-ls-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;300000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		f2s_free_clk: f2s-free-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		osc1: osc1 {</div><div class='hunk'>@@ -395,7 +398,7 @@</div><div class='ctx'> </div><div class='ctx'> 		rst: rstmgr@ffd11000 {</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='del'>-			compatible = "altr,stratix10-rst-mgr";</div><div class='add'>+			compatible = "altr,stratix10-rst-mgr", "altr,rst-mgr";</div><div class='ctx'> 			reg = &lt;0xffd11000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts<br/>index 0d837d3e65a5..ad52e8a0b9ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts</a></div><div class='hunk'>@@ -63,13 +63,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='ctx'> 	phy-addr = &lt;0xffffffff&gt;;</div><div class='del'>-	snps,max-mtu = &lt;0x0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='del'>-	phy-addr = &lt;0xffffffff&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac2 {</div><div class='hunk'>@@ -104,12 +102,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;rst {</div><div class='del'>-	altr,modrst-offset = &lt;0x20&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sysmgr {</div><div class='ctx'> 	reg = &lt;0xffd12000 0x1000&gt;;</div><div class='ctx'> 	interrupts = &lt;0x0 0x10 0x4&gt;;</div><div class='del'>-	cpu1-start-addr = &lt;0xffd06230&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi<br/>index da9de4986660..f49209fddbbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></div><div class='hunk'>@@ -123,6 +123,7 @@</div><div class='ctx'> 			      &lt;0x0 0xf0120000 0x0 0x2000&gt;;	/* GICH */</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +152,7 @@</div><div class='ctx'> 			al,msi-num-spis = &lt;160&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric@fc000000 {</div><div class='add'>+		io-bus@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi<br/>index 8b6156b5af65..bd35e0e9d0ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></div><div class='hunk'>@@ -320,6 +320,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gic: interrupt-controller@f0800000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x0 0xf0800000 0 0x10000&gt;,	/* GICD */</div><div class='hunk'>@@ -361,7 +362,7 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric@fc000000 {</div><div class='add'>+		io-bus@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts<br/>index 1a65f1ec183d..8862adae44e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;ccp0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	amd,zlib-support = &lt;1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -59,7 +58,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi1 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	sdcard0: sdcard@0 {</div><div class='add'>+	sdcard0: mmc@0 {</div><div class='ctx'> 		compatible = "mmc-spi-slot";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;20000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts b/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts<br/>index 52f8d36295a8..b34dd8d5d1b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts</a></div><div class='hunk'>@@ -8,33 +8,10 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "amd-seattle-soc.dtsi"</div><div class='del'>-/include/ "amd-seattle-cpus.dtsi"</div><div class='add'>+/include/ "amd-overdrive-rev-b0.dts"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "AMD Seattle (Rev.B1) Development Board (Overdrive)";</div><div class='del'>-	compatible = "amd,seattle-overdrive", "amd,seattle";</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = &amp;serial0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	psci {</div><div class='del'>-		compatible = "arm,psci-0.2";</div><div class='del'>-		method = "smc";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ccp0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	amd,zlib-support = &lt;1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * NOTE: In Rev.B, gpio0 is reserved.</div><div class='del'>- */</div><div class='del'>-&amp;gpio1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio2 {</div><div class='hunk'>@@ -45,48 +22,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gpio4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sata1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	sdcard0: sdcard@0 {</div><div class='del'>-		compatible = "mmc-spi-slot";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;20000000&gt;;</div><div class='del'>-		voltage-ranges = &lt;3200 3400&gt;;</div><div class='del'>-		pl022,interface = &lt;0&gt;;</div><div class='del'>-		pl022,com-mode = &lt;0x0&gt;;</div><div class='del'>-		pl022,rx-level-trig = &lt;0&gt;;</div><div class='del'>-		pl022,tx-level-trig = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ipmi_kcs {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;smb0 {</div><div class='del'>-	/include/ "amd-seattle-xgbe-b.dtsi"</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi<br/>index 2dd2c28171ee..73f687773ce6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi</a></div><div class='hunk'>@@ -5,51 +5,39 @@</div><div class='ctx'>  * Copyright (C) 2014 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	adl3clk_100mhz: clk100mhz_0 {</div><div class='add'>+	adl3clk_100mhz: uartspiclk_100mhz: clock-100000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		clock-output-names = "adl3clk_100mhz";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ccpclk_375mhz: clk375mhz {</div><div class='add'>+	ccpclk_375mhz: clock-375000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;375000000&gt;;</div><div class='ctx'> 		clock-output-names = "ccpclk_375mhz";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sataclk_333mhz: clk333mhz {</div><div class='add'>+	sataclk_333mhz: clock-333000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;333000000&gt;;</div><div class='ctx'> 		clock-output-names = "sataclk_333mhz";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcieclk_500mhz: clk500mhz_0 {</div><div class='add'>+	dmaclk_500mhz: pcieclk_500mhz: clock-500000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;500000000&gt;;</div><div class='ctx'> 		clock-output-names = "pcieclk_500mhz";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dmaclk_500mhz: clk500mhz_1 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;500000000&gt;;</div><div class='del'>-		clock-output-names = "dmaclk_500mhz";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	miscclk_250mhz: clk250mhz_4 {</div><div class='add'>+	xgmacclk0_dma_250mhz: xgmacclk0_ptp_250mhz: xgmacclk1_dma_250mhz: xgmacclk1_ptp_250mhz:</div><div class='add'>+	miscclk_250mhz: clock-250000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;250000000&gt;;</div><div class='ctx'> 		clock-output-names = "miscclk_250mhz";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uartspiclk_100mhz: clk100mhz_1 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;100000000&gt;;</div><div class='del'>-		clock-output-names = "uartspiclk_100mhz";</div><div class='del'>-	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi<br/>index 690020589d41..a611f8288b3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	/include/ "amd-seattle-clks.dtsi"</div><div class='add'>+</div><div class='ctx'> 	gic0: interrupt-controller@e1101000 {</div><div class='ctx'> 		compatible = "arm,gic-400", "arm,cortex-a15-gic";</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -38,7 +40,7 @@</div><div class='ctx'> 			     &lt;1 10 0xff04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	smb0: smb {</div><div class='add'>+	smb0: bus {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -51,8 +53,6 @@</div><div class='ctx'> 		 */</div><div class='ctx'> 		dma-ranges = &lt;0x0 0x0 0x0 0x0 0x100 0x0&gt;;</div><div class='ctx'> </div><div class='del'>-		/include/ "amd-seattle-clks.dtsi"</div><div class='del'>-</div><div class='ctx'> 		sata0: sata@e0300000 {</div><div class='ctx'> 			compatible = "snps,dwc-ahci";</div><div class='ctx'> 			reg = &lt;0 0xe0300000 0 0xf0000&gt;;</div><div class='hunk'>@@ -121,20 +121,18 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			compatible = "arm,pl022", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0xe1020000 0 0x1000&gt;;</div><div class='del'>-			spi-controller;</div><div class='ctx'> 			interrupts = &lt;0 330 4&gt;;</div><div class='del'>-			clocks = &lt;&amp;uartspiclk_100mhz&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='add'>+			clocks = &lt;&amp;uartspiclk_100mhz&gt;, &lt;&amp;uartspiclk_100mhz&gt;;</div><div class='add'>+			clock-names = "sspclk", "apb_pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spi1: spi@e1030000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			compatible = "arm,pl022", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0xe1030000 0 0x1000&gt;;</div><div class='del'>-			spi-controller;</div><div class='ctx'> 			interrupts = &lt;0 329 4&gt;;</div><div class='del'>-			clocks = &lt;&amp;uartspiclk_100mhz&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='add'>+			clocks = &lt;&amp;uartspiclk_100mhz&gt;, &lt;&amp;uartspiclk_100mhz&gt;;</div><div class='add'>+			clock-names = "sspclk", "apb_pclk";</div><div class='ctx'> 			num-cs = &lt;1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi<br/>index 9259e547e2e8..18b0c2dd1b2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi</a></div><div class='hunk'>@@ -5,35 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2015 Advanced Micro Devices, Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	xgmacclk0_dma_250mhz: clk250mhz_0 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;250000000&gt;;</div><div class='del'>-		clock-output-names = "xgmacclk0_dma_250mhz";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	xgmacclk0_ptp_250mhz: clk250mhz_1 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;250000000&gt;;</div><div class='del'>-		clock-output-names = "xgmacclk0_ptp_250mhz";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	xgmacclk1_dma_250mhz: clk250mhz_2 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;250000000&gt;;</div><div class='del'>-		clock-output-names = "xgmacclk1_dma_250mhz";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	xgmacclk1_ptp_250mhz: clk250mhz_3 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;250000000&gt;;</div><div class='del'>-		clock-output-names = "xgmacclk1_ptp_250mhz";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	xgmac0: xgmac@e0700000 {</div><div class='add'>+	xgmac0: ethernet@e0700000 {</div><div class='ctx'> 		compatible = "amd,xgbe-seattle-v1a";</div><div class='ctx'> 		reg = &lt;0 0xe0700000 0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0 0xe0780000 0 0x80000&gt;,</div><div class='hunk'>@@ -59,7 +31,7 @@</div><div class='ctx'> 		dma-coherent;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	xgmac1: xgmac@e0900000 {</div><div class='add'>+	xgmac1: ethernet@e0900000 {</div><div class='ctx'> 		compatible = "amd,xgbe-seattle-v1a";</div><div class='ctx'> 		reg = &lt;0 0xe0900000 0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0 0xe0980000 0 0x80000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile<br/>index 2fbda8419c65..619dce79b020 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/Makefile</a></div><div class='hunk'>@@ -3,6 +3,9 @@ dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c308l-aw419.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MESON) += amlogic-s6-s905x5-bl209.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MESON) += amlogic-s7-s805x3-bp201.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MESON) += amlogic-s7d-s905x5m-bm202.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb</div><div class='hunk'>@@ -49,6 +52,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805x-libretech-ac.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805x-p241.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805y-xiaomi-aquaman.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-libretech-pc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-mecool-kii-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb</div><div class='hunk'>@@ -76,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-ugoos-am3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h<br/>new file mode 100644<br/>index 000000000000..f6a4c90bab3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_AMLOGIC_A4_RESET_H</div><div class='add'>+#define __DTS_AMLOGIC_A4_RESET_H</div><div class='add'>+</div><div class='add'>+/* RESET0 */</div><div class='add'>+/*						0-3 */</div><div class='add'>+#define RESET_USB				4</div><div class='add'>+/*						5-6*/</div><div class='add'>+#define RESET_U2PHY22				7</div><div class='add'>+#define RESET_USBPHY20				8</div><div class='add'>+#define RESET_U2PHY21				9</div><div class='add'>+#define RESET_USB2DRD				10</div><div class='add'>+#define RESET_U2H				11</div><div class='add'>+#define RESET_LED_CTRL				12</div><div class='add'>+/*						13-31 */</div><div class='add'>+</div><div class='add'>+/* RESET1 */</div><div class='add'>+#define RESET_AUDIO				32</div><div class='add'>+#define RESET_AUDIO_VAD				33</div><div class='add'>+/*						34*/</div><div class='add'>+#define RESET_DDR_APB				35</div><div class='add'>+#define RESET_DDR				36</div><div class='add'>+#define RESET_VOUT_VENC				37</div><div class='add'>+#define RESET_VOUT				38</div><div class='add'>+/*						39-47 */</div><div class='add'>+#define RESET_ETHERNET				48</div><div class='add'>+/*						49-63 */</div><div class='add'>+</div><div class='add'>+/* RESET2 */</div><div class='add'>+#define RESET_DEVICE_MMC_ARB			64</div><div class='add'>+#define RESET_IRCTRL				65</div><div class='add'>+/*						66*/</div><div class='add'>+#define RESET_TS_PLL				67</div><div class='add'>+/*						68-72*/</div><div class='add'>+#define RESET_SPICC_0				73</div><div class='add'>+#define RESET_SPICC_1				74</div><div class='add'>+/*						75-79*/</div><div class='add'>+#define RESET_MSR_CLK				80</div><div class='add'>+/*						81*/</div><div class='add'>+#define RESET_SAR_ADC				82</div><div class='add'>+/*						83-87*/</div><div class='add'>+#define RESET_ACODEC				88</div><div class='add'>+/*						89-90*/</div><div class='add'>+#define RESET_WATCHDOG				91</div><div class='add'>+/*						92-95*/</div><div class='add'>+</div><div class='add'>+/* RESET3 */</div><div class='add'>+/*						96-127 */</div><div class='add'>+</div><div class='add'>+/* RESET4 */</div><div class='add'>+/*						128-131 */</div><div class='add'>+#define RESET_PWM_AB				132</div><div class='add'>+#define RESET_PWM_CD				133</div><div class='add'>+#define RESET_PWM_EF				134</div><div class='add'>+#define RESET_PWM_GH				135</div><div class='add'>+/*						136-137*/</div><div class='add'>+#define RESET_UART_A				138</div><div class='add'>+#define RESET_UART_B				139</div><div class='add'>+/*						140*/</div><div class='add'>+#define RESET_UART_D				141</div><div class='add'>+#define RESET_UART_E				142</div><div class='add'>+/*						143-144*/</div><div class='add'>+#define RESET_I2C_M_A				145</div><div class='add'>+#define RESET_I2C_M_B				146</div><div class='add'>+#define RESET_I2C_M_C				147</div><div class='add'>+#define RESET_I2C_M_D				148</div><div class='add'>+/*						149-151*/</div><div class='add'>+#define RESET_SDEMMC_A				152</div><div class='add'>+/*						153*/</div><div class='add'>+#define RESET_SDEMMC_C				154</div><div class='add'>+/*						155-159*/</div><div class='add'>+</div><div class='add'>+/* RESET5 */</div><div class='add'>+/*						160-175*/</div><div class='add'>+#define RESET_BRG_AO_NIC_SYS			176</div><div class='add'>+/*						177*/</div><div class='add'>+#define RESET_BRG_AO_NIC_MAIN			178</div><div class='add'>+#define RESET_BRG_AO_NIC_AUDIO			179</div><div class='add'>+/*						180-183*/</div><div class='add'>+#define RESET_BRG_AO_NIC_ALL			184</div><div class='add'>+/*						185*/</div><div class='add'>+#define RESET_BRG_NIC_SDIO			186</div><div class='add'>+#define RESET_BRG_NIC_EMMC			187</div><div class='add'>+#define RESET_BRG_NIC_DSU			188</div><div class='add'>+#define RESET_BRG_NIC_CLK81			189</div><div class='add'>+#define RESET_BRG_NIC_MAIN			190</div><div class='add'>+#define RESET_BRG_NIC_ALL			191</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi<br/>index de10e7aebf21..fce45933fa28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi</a></div><div class='hunk'>@@ -4,7 +4,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "amlogic-a4-common.dtsi"</div><div class='add'>+#include "amlogic-a4-reset.h"</div><div class='ctx'> #include &lt;dt-bindings/power/amlogic,a4-pwrc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/amlogic,pinctrl.h&gt;</div><div class='ctx'> / {</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -15,6 +17,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -22,6 +31,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -29,6 +45,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -36,6 +59,22 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x80000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -48,3 +87,155 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;apb {</div><div class='add'>+	reset: reset-controller@2000 {</div><div class='add'>+		compatible = "amlogic,a4-reset",</div><div class='add'>+			     "amlogic,meson-s4-reset";</div><div class='add'>+		reg = &lt;0x0 0x2000 0x0 0x98&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	periphs_pinctrl: pinctrl@4000 {</div><div class='add'>+		compatible = "amlogic,pinctrl-a4";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x4000 0x0 0x280&gt;;</div><div class='add'>+</div><div class='add'>+		gpiox: gpio@100 {</div><div class='add'>+			reg = &lt;0 0x100 0 0x40&gt;, &lt;0 0xc 0 0xc&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_X&lt;&lt;8) 18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpiot: gpio@140 {</div><div class='add'>+			reg = &lt;0 0x140 0 0x40&gt;, &lt;0 0x2c 0 0xc&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_T&lt;&lt;8) 23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpiod: gpio@180 {</div><div class='add'>+			reg = &lt;0 0x180 0 0x40&gt;, &lt;0 0x40 0 0x8&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_D&lt;&lt;8) 16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpioe: gpio@1c0 {</div><div class='add'>+			reg = &lt;0 0x1c0 0 0x40&gt;, &lt;0 0x48 0 0x4&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_E&lt;&lt;8) 2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpiob: gpio@240 {</div><div class='add'>+			reg = &lt;0 0x240 0 0x40&gt;, &lt;0 0 0 0x8&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_B&lt;&lt;8) 14&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		func-uart-a {</div><div class='add'>+			uart_a_default: group-uart-a-pins1 {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_X, 11, 1)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_X, 12, 1)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_X, 13, 1)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_X, 14, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			group-uart-a-pins2 {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_D, 2, 3)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_D, 3, 3)&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				drive-strength-microamp = &lt;4000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		func-uart-b {</div><div class='add'>+			uart_b_default: group-uart-b-pins {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_E, 0, 3)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_E, 1, 3)&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				drive-strength-microamp = &lt;4000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		func-uart-d {</div><div class='add'>+			uart_d_default: group-uart-d-pins1 {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_T, 18, 4)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 19, 4)&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				drive-strength-microamp = &lt;4000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			group-uart-d-pins2 {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_T, 7, 2)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 8, 2)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 9, 2)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 10, 2)&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				drive-strength-microamp = &lt;4000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		func-uart-e {</div><div class='add'>+			uart_e_default: group-uart-e-pins {</div><div class='add'>+				pinmux = &lt;AML_PINMUX(AMLOGIC_GPIO_T, 14, 3)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 15, 3)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 16, 3)&gt;,</div><div class='add'>+					 &lt;AML_PINMUX(AMLOGIC_GPIO_T, 17, 3)&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				drive-strength-microamp = &lt;4000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_intc: interrupt-controller@4080 {</div><div class='add'>+		compatible = "amlogic,a4-gpio-intc",</div><div class='add'>+			     "amlogic,meson-gpio-intc";</div><div class='add'>+		reg = &lt;0x0 0x4080 0x0 0x20&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		amlogic,channel-interrupts =</div><div class='add'>+			&lt;10 11 12 13 14 15 16 17 18 19 20 21&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ao_pinctrl: pinctrl@8e700 {</div><div class='add'>+		compatible = "amlogic,pinctrl-a4";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x8e700 0x0 0x80&gt;;</div><div class='add'>+</div><div class='add'>+		gpioao: gpio@4 {</div><div class='add'>+			reg = &lt;0 0x4 0 0x16&gt;, &lt;0 0 0 0x4&gt;;</div><div class='add'>+			reg-names = "gpio", "mux";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_AO&lt;&lt;8) 7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		test_n: gpio@44 {</div><div class='add'>+			reg = &lt;0 0x44 0 0x20&gt;;</div><div class='add'>+			reg-names = "gpio";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N&lt;&lt;8) 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_ao_intc: interrupt-controller@8e72c {</div><div class='add'>+		compatible = "amlogic,a4-gpio-ao-intc",</div><div class='add'>+			     "amlogic,meson-gpio-intc";</div><div class='add'>+		reg = &lt;0x0 0x8e72c 0x0 0x0c&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		amlogic,channel-interrupts = &lt;140 141&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h b/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h<br/>new file mode 100644<br/>index 000000000000..cdf0f5159620<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_AMLOGIC_A5_RESET_H</div><div class='add'>+#define __DTS_AMLOGIC_A5_RESET_H</div><div class='add'>+</div><div class='add'>+/* RESET0 */</div><div class='add'>+/*						0-3 */</div><div class='add'>+#define RESET_USB				4</div><div class='add'>+/*						5-7 */</div><div class='add'>+#define RESET_USBPHY20				8</div><div class='add'>+/*						9 */</div><div class='add'>+#define RESET_USB2DRD				10</div><div class='add'>+/*						11-31 */</div><div class='add'>+</div><div class='add'>+/* RESET1 */</div><div class='add'>+#define RESET_AUDIO				32</div><div class='add'>+#define RESET_AUDIO_VAD				33</div><div class='add'>+/*                                              34 */</div><div class='add'>+#define RESET_DDR_APB				35</div><div class='add'>+#define RESET_DDR				36</div><div class='add'>+/*						37-40 */</div><div class='add'>+#define RESET_DSPA_DEBUG			41</div><div class='add'>+/*                                              42 */</div><div class='add'>+#define RESET_DSPA				43</div><div class='add'>+/*						44-46 */</div><div class='add'>+#define RESET_NNA				47</div><div class='add'>+#define RESET_ETHERNET				48</div><div class='add'>+/*						49-63 */</div><div class='add'>+</div><div class='add'>+/* RESET2 */</div><div class='add'>+#define RESET_ABUS_ARB				64</div><div class='add'>+#define RESET_IRCTRL				65</div><div class='add'>+/*						66 */</div><div class='add'>+#define RESET_TS_PLL				67</div><div class='add'>+/*						68-72 */</div><div class='add'>+#define RESET_SPICC_0				73</div><div class='add'>+#define RESET_SPICC_1				74</div><div class='add'>+#define RESET_RSA				75</div><div class='add'>+</div><div class='add'>+/*						76-79 */</div><div class='add'>+#define RESET_MSR_CLK				80</div><div class='add'>+#define RESET_SPIFC				81</div><div class='add'>+#define RESET_SAR_ADC				82</div><div class='add'>+/*						83-90 */</div><div class='add'>+#define RESET_WATCHDOG				91</div><div class='add'>+/*						92-95 */</div><div class='add'>+</div><div class='add'>+/* RESET3 */</div><div class='add'>+/*						96-127 */</div><div class='add'>+</div><div class='add'>+/* RESET4 */</div><div class='add'>+#define RESET_RTC				128</div><div class='add'>+/*						129-131 */</div><div class='add'>+#define RESET_PWM_AB				132</div><div class='add'>+#define RESET_PWM_CD				133</div><div class='add'>+#define RESET_PWM_EF				134</div><div class='add'>+#define RESET_PWM_GH				135</div><div class='add'>+/*						104-105 */</div><div class='add'>+#define RESET_UART_A				138</div><div class='add'>+#define RESET_UART_B				139</div><div class='add'>+#define RESET_UART_C				140</div><div class='add'>+#define RESET_UART_D				141</div><div class='add'>+#define RESET_UART_E				142</div><div class='add'>+/*						143*/</div><div class='add'>+#define RESET_I2C_S_A				144</div><div class='add'>+#define RESET_I2C_M_A				145</div><div class='add'>+#define RESET_I2C_M_B				146</div><div class='add'>+#define RESET_I2C_M_C				147</div><div class='add'>+#define RESET_I2C_M_D				148</div><div class='add'>+/*						149-151 */</div><div class='add'>+#define RESET_SDEMMC_A				152</div><div class='add'>+/*						153 */</div><div class='add'>+#define RESET_SDEMMC_C				154</div><div class='add'>+/*						155-159*/</div><div class='add'>+</div><div class='add'>+/* RESET5 */</div><div class='add'>+/*						160-175 */</div><div class='add'>+#define RESET_BRG_AO_NIC_SYS			176</div><div class='add'>+#define RESET_BRG_AO_NIC_DSPA			177</div><div class='add'>+#define RESET_BRG_AO_NIC_MAIN			178</div><div class='add'>+#define RESET_BRG_AO_NIC_AUDIO			179</div><div class='add'>+/*						180-183 */</div><div class='add'>+#define RESET_BRG_AO_NIC_ALL			184</div><div class='add'>+#define RESET_BRG_NIC_NNA			185</div><div class='add'>+#define RESET_BRG_NIC_SDIO			186</div><div class='add'>+#define RESET_BRG_NIC_EMMC			187</div><div class='add'>+#define RESET_BRG_NIC_DSU			188</div><div class='add'>+#define RESET_BRG_NIC_SYSCLK			189</div><div class='add'>+#define RESET_BRG_NIC_MAIN			190</div><div class='add'>+#define RESET_BRG_NIC_ALL			191</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi<br/>index 17a6316de891..b1da8cbaa25a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "amlogic-a4-common.dtsi"</div><div class='add'>+#include "amlogic-a5-reset.h"</div><div class='ctx'> #include &lt;dt-bindings/power/amlogic,a5-pwrc.h&gt;</div><div class='ctx'> / {</div><div class='ctx'> 	cpus {</div><div class='hunk'>@@ -48,3 +49,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;apb {</div><div class='add'>+	reset: reset-controller@2000 {</div><div class='add'>+		compatible = "amlogic,a5-reset",</div><div class='add'>+			     "amlogic,meson-s4-reset";</div><div class='add'>+		reg = &lt;0x0 0x2000 0x0 0x98&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_intc: interrupt-controller@4080 {</div><div class='add'>+		compatible = "amlogic,a5-gpio-intc",</div><div class='add'>+			     "amlogic,meson-gpio-intc";</div><div class='add'>+		reg = &lt;0x0 0x4080 0x0 0x20&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		amlogic,channel-interrupts =</div><div class='add'>+			&lt;10 11 12 13 14 15 16 17 18 19 20 21&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi<br/>index d0cda759c25d..07aaaf71ea9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi</a></div><div class='hunk'>@@ -23,6 +23,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a35";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -30,6 +37,22 @@</div><div class='ctx'> 			compatible = "arm,cortex-a35";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x7d000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -53,6 +76,13 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	xtal_32k: xtal-clk-32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "xtal_32k";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sm: secure-monitor {</div><div class='ctx'> 		compatible = "amlogic,meson-gxbb-sm";</div><div class='ctx'> </div><div class='hunk'>@@ -410,6 +440,300 @@</div><div class='ctx'> 						drive-strength-microamp = &lt;4000&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				pwm_a_pins1: pwm-a-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_b_pins1: pwm-b-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_b";</div><div class='add'>+						function = "pwm_b";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_c_pins1: pwm-c-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_c";</div><div class='add'>+						function = "pwm_c";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_d_pins1: pwm-d-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_d";</div><div class='add'>+						function = "pwm_d";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins1: pwm-e-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_f_pins1: pwm-f-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_f";</div><div class='add'>+						function = "pwm_f";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_g_pins1: pwm-g-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_g_b";</div><div class='add'>+						function = "pwm_g";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_g_pins2: pwm-g-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_g_c";</div><div class='add'>+						function = "pwm_g";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_g_pins3: pwm-g-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_g_d";</div><div class='add'>+						function = "pwm_g";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_g_pins4: pwm-g-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_g_x0";</div><div class='add'>+						function = "pwm_g";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_g_pins5: pwm-g-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_g_x8";</div><div class='add'>+						function = "pwm_g";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_h_pins1: pwm-h-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_h_b";</div><div class='add'>+						function = "pwm_h";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_h_pins2: pwm-h-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_h_c";</div><div class='add'>+						function = "pwm_h";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_h_pins3: pwm-h-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_h_d";</div><div class='add'>+						function = "pwm_h";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_h_pins4: pwm-h-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_h_x1";</div><div class='add'>+						function = "pwm_h";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_h_pins5: pwm-h-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_h_x9";</div><div class='add'>+						function = "pwm_h";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_i_pins1: pwm-i-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_i_b";</div><div class='add'>+						function = "pwm_i";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_i_pins2: pwm-i-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_i_c";</div><div class='add'>+						function = "pwm_i";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_i_pins3: pwm-i-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_i_d";</div><div class='add'>+						function = "pwm_i";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_i_pins4: pwm-i-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_i_x2";</div><div class='add'>+						function = "pwm_i";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_i_pins5: pwm-i-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_i_x10";</div><div class='add'>+						function = "pwm_i";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_j_pins1: pwm-j-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_j_c";</div><div class='add'>+						function = "pwm_j";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_j_pins2: pwm-j-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_j_d";</div><div class='add'>+						function = "pwm_j";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_j_pins3: pwm-j-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_j_b";</div><div class='add'>+						function = "pwm_j";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_j_pins4: pwm-j-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_j_x3";</div><div class='add'>+						function = "pwm_j";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_j_pins5: pwm-j-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_j_x12";</div><div class='add'>+						function = "pwm_j";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_k_pins1: pwm-k-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_k_c";</div><div class='add'>+						function = "pwm_k";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_k_pins2: pwm-k-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_k_d";</div><div class='add'>+						function = "pwm_k";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_k_pins3: pwm-k-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_k_b";</div><div class='add'>+						function = "pwm_k";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_k_pins4: pwm-k-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_k_x4";</div><div class='add'>+						function = "pwm_k";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_k_pins5: pwm-k-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_k_x13";</div><div class='add'>+						function = "pwm_k";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_l_pins1: pwm-l-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_l_c";</div><div class='add'>+						function = "pwm_l";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_l_pins2: pwm-l-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_l_x";</div><div class='add'>+						function = "pwm_l";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_l_pins3: pwm-l-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_l_b";</div><div class='add'>+						function = "pwm_l";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_l_pins4: pwm-l-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_l_a";</div><div class='add'>+						function = "pwm_l";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_m_pins1: pwm-m-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_m_c";</div><div class='add'>+						function = "pwm_m";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_m_pins2: pwm-m-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_m_x";</div><div class='add'>+						function = "pwm_m";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_m_pins3: pwm-m-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_m_a";</div><div class='add'>+						function = "pwm_m";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_m_pins4: pwm-m-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_m_b";</div><div class='add'>+						function = "pwm_m";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_n_pins1: pwm-n-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_n_x";</div><div class='add'>+						function = "pwm_n";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_n_pins2: pwm-n-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_n_a";</div><div class='add'>+						function = "pwm_n";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_n_pins3: pwm-n-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_n_b";</div><div class='add'>+						function = "pwm_n";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpio_intc: interrupt-controller@4080 {</div><div class='hunk'>@@ -466,6 +790,11 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			clk_msr: clock-measure@48000 {</div><div class='add'>+				compatible = "amlogic,c3-clk-measure";</div><div class='add'>+				reg = &lt;0x0 0x48000 0x0 0x1c&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spicc0: spi@50000 {</div><div class='ctx'> 				compatible = "amlogic,meson-g12a-spicc";</div><div class='ctx'> 				reg = &lt;0x0 0x50000 0x0 0x44&gt;;</div><div class='hunk'>@@ -490,6 +819,16 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pwm_mn: pwm@54000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x54000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_M&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_N&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spifc: spi@56000 {</div><div class='ctx'> 				compatible = "amlogic,a1-spifc";</div><div class='ctx'> 				reg = &lt;0x0 0x56000 0x0 0x290&gt;;</div><div class='hunk'>@@ -499,6 +838,66 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pwm_ab: pwm@58000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x58000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_A&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_B&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_cd: pwm@5a000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x5a000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_C&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_D&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_ef: pwm@5c000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x5c000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_E&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_F&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_gh: pwm@5e000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x5e000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_G&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_H&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_ij: pwm@60000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x60000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_I&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_J&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_kl: pwm@62000 {</div><div class='add'>+				compatible = "amlogic,c3-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x62000 0x0 0x24&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_K&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_L&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			i2c0: i2c@66000 {</div><div class='ctx'> 				compatible = "amlogic,meson-axg-i2c";</div><div class='ctx'> 				reg = &lt;0x0 0x66000 0x0 0x24&gt;;</div><div class='hunk'>@@ -598,6 +997,15 @@</div><div class='ctx'> 				clock-names = "core", "device";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			rtc@9a000 {</div><div class='add'>+				compatible = "amlogic,c3-rtc",</div><div class='add'>+					     "amlogic,a5-rtc";</div><div class='add'>+				reg = &lt;0x0 0x9a000 0x0 0x38&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 131 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal_32k&gt;, &lt;&amp;clkc_periphs CLKID_SYS_RTC&gt;;</div><div class='add'>+				clock-names = "osc", "sys";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ethmac: ethernet@fdc00000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts b/arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts<br/>new file mode 100644<br/>index 000000000000..c45b22651798<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s6-s905x5-bl209.dts</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "amlogic-s6.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Amlogic S905X5 BL209 Development Board";</div><div class='add'>+	compatible = "amlogic,bl209", "amlogic,s6";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart_b;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x000000 0x0 0xe0000000&gt;,</div><div class='add'>+		      &lt;0x1 0x000000 0x0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* 27 MiB reserved for ARM Trusted Firmware */</div><div class='add'>+		secmon_reserved: secmon@5000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x05000000 0x0 0x1b00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_b {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi<br/>new file mode 100644<br/>index 000000000000..5f602f1170c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/amlogic,pinctrl.h&gt;</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xtal: xtal-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@ff200000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x0 0xff200000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0xff240000 0 0x80000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 0xf04&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb: bus@fe000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+</div><div class='add'>+			uart_b: serial@7a000 {</div><div class='add'>+				compatible = "amlogic,s6-uart",</div><div class='add'>+					     "amlogic,meson-s4-uart";</div><div class='add'>+				reg = &lt;0x0 0x7a000 0x0 0x18&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 169 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='add'>+				clock-names = "xtal", "pclk", "baud";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			periphs_pinctrl: pinctrl@4000 {</div><div class='add'>+				compatible = "amlogic,pinctrl-s6";</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges = &lt;0x0 0x0 0x0 0x4000 0x0 0x340&gt;;</div><div class='add'>+</div><div class='add'>+				gpioz: gpio@c0 {</div><div class='add'>+					reg = &lt;0 0xc0 0 0x20&gt;, &lt;0 0x18 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_Z&lt;&lt;8) 16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiox: gpio@100 {</div><div class='add'>+					reg = &lt;0 0x100 0 0x30&gt;, &lt;0 0xc 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_X&lt;&lt;8) 20&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioh: gpio@140 {</div><div class='add'>+					reg = &lt;0 0x140 0 0x20&gt;, &lt;0 0x2c 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_H&lt;&lt;8) 9&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiod: gpio@180 {</div><div class='add'>+					reg = &lt;0 0x180 0 0x20&gt;, &lt;0 0x8 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_D&lt;&lt;8) 7&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiof: gpio@1a0 {</div><div class='add'>+					reg = &lt;0 0x1a0 0 0x20&gt;, &lt;0 0x20 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_F&lt;&lt;8) 5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioe: gpio@1c0 {</div><div class='add'>+					reg = &lt;0 0x1c0 0 0x20&gt;, &lt;0 0x48 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_E&lt;&lt;8) 3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioc: gpio@200 {</div><div class='add'>+					reg = &lt;0 0x200 0 0x20&gt;, &lt;0 0x24 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_C&lt;&lt;8) 8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiob: gpio@240 {</div><div class='add'>+					reg = &lt;0 0x240 0 0x20&gt;, &lt;0 0x0 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_B&lt;&lt;8) 14&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioa: gpio@280 {</div><div class='add'>+					reg = &lt;0 0x280 0 0x20&gt;, &lt;0 0x40 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_A&lt;&lt;8) 16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				test_n: gpio@2c0 {</div><div class='add'>+					reg = &lt;0 0x2c0 0 0x20&gt;;</div><div class='add'>+					reg-names = "gpio";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges =</div><div class='add'>+						&lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N&lt;&lt;8) 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiocc: gpio@300 {</div><div class='add'>+					reg = &lt;0 0x300 0 0x20&gt;, &lt;0 0x14 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_CC&lt;&lt;8) 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts b/arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts<br/>new file mode 100644<br/>index 000000000000..7fd4ac9321a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s7-s805x3-bp201.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "amlogic-s7.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Amlogic S805X3 BP201 Development Board";</div><div class='add'>+	compatible = "amlogic,bp201", "amlogic,s7";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart_b;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* 35 MiB reserved for ARM Trusted Firmware */</div><div class='add'>+		secmon_reserved: secmon@5000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x05000000 0x0 0x2300000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_b {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi<br/>new file mode 100644<br/>index 000000000000..d262c0b66e4b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/amlogic,pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;; /* L2. 256 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xtal: xtal-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@fff01000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x0 0xfff01000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0xfff02000 0 0x0100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 0xf04&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb: bus@fe000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+</div><div class='add'>+			uart_b: serial@7a000 {</div><div class='add'>+				compatible = "amlogic,s7-uart",</div><div class='add'>+					     "amlogic,meson-s4-uart";</div><div class='add'>+				reg = &lt;0x0 0x7a000 0x0 0x18&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 169 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='add'>+				clock-names = "xtal", "pclk", "baud";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			periphs_pinctrl: pinctrl@4000 {</div><div class='add'>+				compatible = "amlogic,pinctrl-s7";</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges = &lt;0x0 0x0 0x0 0x4000 0x0 0x340&gt;;</div><div class='add'>+</div><div class='add'>+				gpioz: gpio@c0 {</div><div class='add'>+					reg = &lt;0 0xc0 0 0x20&gt;, &lt;0 0x18 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_Z&lt;&lt;8) 13&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiox: gpio@100 {</div><div class='add'>+					reg = &lt;0 0x100 0 0x30&gt;, &lt;0 0xc 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_X&lt;&lt;8) 20&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioh: gpio@140 {</div><div class='add'>+					reg = &lt;0 0x140 0 0x20&gt;, &lt;0 0x2c 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_H&lt;&lt;8) 12&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiod: gpio@180 {</div><div class='add'>+					reg = &lt;0 0x180 0 0x20&gt;, &lt;0 0x40 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_D&lt;&lt;8) 12&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioe: gpio@1c0 {</div><div class='add'>+					reg = &lt;0 0x1c0 0 0x20&gt;, &lt;0 0x48 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_E&lt;&lt;8) 2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioc: gpio@200 {</div><div class='add'>+					reg = &lt;0 0x200 0 0x20&gt;, &lt;0 0x24 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_C&lt;&lt;8) 8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiob: gpio@240 {</div><div class='add'>+					reg = &lt;0 0x240 0 0x20&gt;, &lt;0 0x0 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_B&lt;&lt;8) 14&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				test_n: gpio@2c0 {</div><div class='add'>+					reg = &lt;0 0x2c0 0 0x20&gt;;</div><div class='add'>+					reg-names = "gpio";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges =</div><div class='add'>+						&lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N&lt;&lt;8) 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiocc: gpio@300 {</div><div class='add'>+					reg = &lt;0 0x300 0 0x20&gt;, &lt;0 0x14 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_CC&lt;&lt;8) 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts b/arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts<br/>new file mode 100644<br/>index 000000000000..2933fcdbc8ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s7d-s905x5m-bm202.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "amlogic-s7d.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Amlogic S905X5M BM202 Development Board";</div><div class='add'>+	compatible = "amlogic,bm202", "amlogic,s7d";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart_b;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* 36 MiB reserved for ARM Trusted Firmware */</div><div class='add'>+		secmon_reserved: secmon@5000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x05000000 0x0 0x2400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_b {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi<br/>new file mode 100644<br/>index 000000000000..c4d260d5bb58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Amlogic, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/amlogic,pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xtal: xtal-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@fff01000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x0 0xfff01000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0xfff02000 0 0x0100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 0xf04&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb: bus@fe000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x0 0xfe000000 0x0 0x480000&gt;;</div><div class='add'>+</div><div class='add'>+			uart_b: serial@7a000 {</div><div class='add'>+				compatible = "amlogic,s7d-uart",</div><div class='add'>+					     "amlogic,meson-s4-uart";</div><div class='add'>+				reg = &lt;0x0 0x7a000 0x0 0x18&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 169 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='add'>+				clock-names = "xtal", "pclk", "baud";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			periphs_pinctrl: pinctrl@4000 {</div><div class='add'>+				compatible = "amlogic,pinctrl-s7d",</div><div class='add'>+					     "amlogic,pinctrl-s7";</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges = &lt;0x0 0x0 0x0 0x4000 0x0 0x340&gt;;</div><div class='add'>+</div><div class='add'>+				gpioz: gpio@c0 {</div><div class='add'>+					reg = &lt;0 0xc0 0 0x20&gt;, &lt;0 0x18 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_Z&lt;&lt;8) 13&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiox: gpio@100 {</div><div class='add'>+					reg = &lt;0 0x100 0 0x30&gt;, &lt;0 0xc 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_X&lt;&lt;8) 20&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioh: gpio@140 {</div><div class='add'>+					reg = &lt;0 0x140 0 0x20&gt;, &lt;0 0x2c 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_H&lt;&lt;8) 12&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiod: gpio@180 {</div><div class='add'>+					reg = &lt;0 0x180 0 0x20&gt;, &lt;0 0x40 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_D&lt;&lt;8) 5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioe: gpio@1c0 {</div><div class='add'>+					reg = &lt;0 0x1c0 0 0x20&gt;, &lt;0 0x48 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_E&lt;&lt;8) 2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpioc: gpio@200 {</div><div class='add'>+					reg = &lt;0 0x200 0 0x20&gt;, &lt;0 0x24 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_C&lt;&lt;8) 8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiob: gpio@240 {</div><div class='add'>+					reg = &lt;0 0x240 0 0x20&gt;, &lt;0 0x0 0 0x8&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_B&lt;&lt;8) 14&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiodv: gpio@280 {</div><div class='add'>+					reg = &lt;0 0x280 0 0x20&gt;, &lt;0 0x8 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_DV&lt;&lt;8) 7&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				test_n: gpio@2c0 {</div><div class='add'>+					reg = &lt;0 0x2c0 0 0x20&gt;;</div><div class='add'>+					reg-names = "gpio";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges =</div><div class='add'>+						&lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N&lt;&lt;8) 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpiocc: gpio@300 {</div><div class='add'>+					reg = &lt;0 0x300 0 0x20&gt;, &lt;0 0x14 0 0x4&gt;;</div><div class='add'>+					reg-names = "gpio", "mux";</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					gpio-ranges = &lt;&amp;periphs_pinctrl 0 (AMLOGIC_GPIO_CC&lt;&lt;8) 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi<br/>index ec743cad57db..6510068bcff9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi</a></div><div class='hunk'>@@ -53,6 +53,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu101: cpu@101 {</div><div class='hunk'>@@ -60,6 +67,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu102: cpu@102 {</div><div class='hunk'>@@ -67,6 +81,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu103: cpu@103 {</div><div class='hunk'>@@ -74,6 +95,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0: cpu@0 {</div><div class='hunk'>@@ -81,6 +109,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -88,6 +123,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -95,6 +137,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -102,6 +151,31 @@</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_l: l2-cache-cluster0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;  /* L2. 256 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_b: l2-cache-cluster1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;; /* L2. 1 Mb */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi<br/>index e5366d4239b1..27b68ed85c4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-a1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-a1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-a1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-a1.dtsi</a></div><div class='hunk'>@@ -27,6 +27,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a35";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -36,6 +42,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a35";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -44,6 +56,9 @@</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x80000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -233,6 +248,7 @@</div><div class='ctx'> 						groups = "uart_a_tx",</div><div class='ctx'> 							 "uart_a_rx";</div><div class='ctx'> 						function = "uart_a";</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -245,6 +261,188 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				pwm_a_pins1: pwm-a-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a_x6";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_a_pins2: pwm-a-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a_x7";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_a_pins3: pwm-a-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a_f10";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_a_pins4: pwm-a-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a_f6";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_a_pins5: pwm-a-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_a_a";</div><div class='add'>+						function = "pwm_a";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_b_pins1: pwm-b-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_b_x";</div><div class='add'>+						function = "pwm_b";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_b_pins2: pwm-b-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_b_f";</div><div class='add'>+						function = "pwm_b";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_b_pins3: pwm-b-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_b_a";</div><div class='add'>+						function = "pwm_b";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_c_pins1: pwm-c-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_c_x";</div><div class='add'>+						function = "pwm_c";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_c_pins2: pwm-c-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_c_f3";</div><div class='add'>+						function = "pwm_c";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_c_pins3: pwm-c-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_c_f8";</div><div class='add'>+						function = "pwm_c";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_c_pins4: pwm-c-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_c_a";</div><div class='add'>+						function = "pwm_c";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_d_pins1: pwm-d-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_d_x15";</div><div class='add'>+						function = "pwm_d";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_d_pins2: pwm-d-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_d_x13";</div><div class='add'>+						function = "pwm_d";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_d_pins3: pwm-d-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_d_x10";</div><div class='add'>+						function = "pwm_d";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_d_pins4: pwm-d-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_d_f";</div><div class='add'>+						function = "pwm_d";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins1: pwm-e-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_p";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins2: pwm-e-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_x16";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins3: pwm-e-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_x14";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins4: pwm-e-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_x2";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins5: pwm-e-pins5 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_f";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_e_pins6: pwm-e-pins6 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_e_a";</div><div class='add'>+						function = "pwm_e";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_f_pins1: pwm-f-pins1 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_f_b";</div><div class='add'>+						function = "pwm_f";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_f_pins2: pwm-f-pins2 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_f_x";</div><div class='add'>+						function = "pwm_f";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_f_pins3: pwm-f-pins3 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_f_f4";</div><div class='add'>+						function = "pwm_f";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm_f_pins4: pwm-f-pins4 {</div><div class='add'>+					mux {</div><div class='add'>+						groups = "pwm_f_f12";</div><div class='add'>+						function = "pwm_f";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				sdio_pins: sdio {</div><div class='ctx'> 					mux0 {</div><div class='ctx'> 						groups = "sdcard_d0_x",</div><div class='hunk'>@@ -340,6 +538,28 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pwm_ab: pwm@2400 {</div><div class='add'>+				compatible = "amlogic,meson-a1-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x2400 0x0 0x24&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_A&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_B&gt;;</div><div class='add'>+				power-domains = &lt;&amp;pwrc PWRC_I2C_ID&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm_cd: pwm@2800 {</div><div class='add'>+				compatible = "amlogic,meson-a1-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x2800 0x0 0x24&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_C&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_D&gt;;</div><div class='add'>+				power-domains = &lt;&amp;pwrc PWRC_I2C_ID&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			saradc: adc@2c00 {</div><div class='ctx'> 				compatible = "amlogic,meson-g12a-saradc",</div><div class='ctx'> 					"amlogic,meson-saradc";</div><div class='hunk'>@@ -409,6 +629,7 @@</div><div class='ctx'> 				assigned-clock-rates = &lt;500000&gt;;</div><div class='ctx'> 				#thermal-sensor-cells = &lt;0&gt;;</div><div class='ctx'> 				amlogic,ao-secure = &lt;&amp;sec_AO&gt;;</div><div class='add'>+				power-domains = &lt;&amp;pwrc PWRC_I2C_ID&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			hwrng: rng@5118 {</div><div class='hunk'>@@ -423,6 +644,17 @@</div><div class='ctx'> 				amlogic,has-chip-id;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pwm_ef: pwm@5400 {</div><div class='add'>+				compatible = "amlogic,meson-a1-pwm",</div><div class='add'>+					     "amlogic,meson-s4-pwm";</div><div class='add'>+				reg = &lt;0x0 0x5400 0x0 0x24&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				clocks = &lt;&amp;clkc_periphs CLKID_PWM_E&gt;,</div><div class='add'>+					 &lt;&amp;clkc_periphs CLKID_PWM_F&gt;;</div><div class='add'>+				power-domains = &lt;&amp;pwrc PWRC_I2C_ID&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			clkc_pll: pll-clock-controller@7c80 {</div><div class='ctx'> 				compatible = "amlogic,a1-pll-clkc";</div><div class='ctx'> 				reg = &lt;0 0x7c80 0 0x18c&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi<br/>index e9b22868983d..04fb130ac7c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-axg.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-axg.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-axg.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-axg.dtsi</a></div><div class='hunk'>@@ -83,6 +83,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;140&gt;;</div><div class='hunk'>@@ -94,6 +100,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;140&gt;;</div><div class='hunk'>@@ -105,6 +117,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;140&gt;;</div><div class='hunk'>@@ -115,6 +133,9 @@</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x80000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1164,7 +1185,7 @@</div><div class='ctx'> 						groups = "uart_tx_a",</div><div class='ctx'> 							 "uart_rx_a";</div><div class='ctx'> 						function = "uart_a";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1182,7 +1203,7 @@</div><div class='ctx'> 						groups = "uart_tx_b_x",</div><div class='ctx'> 							 "uart_rx_b_x";</div><div class='ctx'> 						function = "uart_b";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1200,7 +1221,7 @@</div><div class='ctx'> 						groups = "uart_tx_b_z",</div><div class='ctx'> 							 "uart_rx_b_z";</div><div class='ctx'> 						function = "uart_b";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1218,7 +1239,7 @@</div><div class='ctx'> 						groups = "uart_ao_tx_b_z",</div><div class='ctx'> 							 "uart_ao_rx_b_z";</div><div class='ctx'> 						function = "uart_ao_b_z";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1654,7 +1675,7 @@</div><div class='ctx'> 						groups = "uart_ao_tx_a",</div><div class='ctx'> 							 "uart_ao_rx_a";</div><div class='ctx'> 						function = "uart_ao_a";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1672,7 +1693,7 @@</div><div class='ctx'> 						groups = "uart_ao_tx_b",</div><div class='ctx'> 							 "uart_ao_rx_b";</div><div class='ctx'> 						function = "uart_ao_b";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1693,8 +1714,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_AO_cd: pwm@2000 {</div><div class='del'>-				compatible = "amlogic,meson-axg-ao-pwm";</div><div class='add'>+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x02000  0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc_AO CLKID_AO_CLK81&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV5&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1728,8 +1753,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_AO_ab: pwm@7000 {</div><div class='del'>-				compatible = "amlogic,meson-axg-ao-pwm";</div><div class='add'>+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x07000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc_AO CLKID_AO_CLK81&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV5&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1806,15 +1835,23 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_ab: pwm@1b000 {</div><div class='del'>-				compatible = "amlogic,meson-axg-ee-pwm";</div><div class='add'>+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1b000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV5&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_cd: pwm@1a000 {</div><div class='del'>-				compatible = "amlogic,meson-axg-ee-pwm";</div><div class='add'>+				compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1a000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV5&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi<br/>index d08c97797010..dcc927a9da80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a></div><div class='hunk'>@@ -1503,7 +1503,7 @@</div><div class='ctx'> 							groups = "uart_a_tx",</div><div class='ctx'> 								 "uart_a_rx";</div><div class='ctx'> 							function = "uart_a";</div><div class='del'>-							bias-disable;</div><div class='add'>+							bias-pull-up;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -1521,7 +1521,7 @@</div><div class='ctx'> 							groups = "uart_b_tx",</div><div class='ctx'> 								 "uart_b_rx";</div><div class='ctx'> 							function = "uart_b";</div><div class='del'>-							bias-disable;</div><div class='add'>+							bias-pull-up;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -1913,12 +1913,12 @@</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart_ao_a_pins: uart-a-ao {</div><div class='add'>+				uart_ao_a_pins: uart-ao-a {</div><div class='ctx'> 					mux {</div><div class='ctx'> 						groups = "uart_ao_a_tx",</div><div class='ctx'> 							 "uart_ao_a_rx";</div><div class='ctx'> 						function = "uart_ao_a";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1936,7 +1936,7 @@</div><div class='ctx'> 						groups = "uart_ao_b_tx_2",</div><div class='ctx'> 							 "uart_ao_b_rx_3";</div><div class='ctx'> 						function = "uart_ao_b";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -1945,7 +1945,7 @@</div><div class='ctx'> 						groups = "uart_ao_b_tx_8",</div><div class='ctx'> 							 "uart_ao_b_rx_9";</div><div class='ctx'> 						function = "uart_ao_b";</div><div class='del'>-						bias-disable;</div><div class='add'>+						bias-pull-up;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -2060,8 +2060,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_AO_cd: pwm@2000 {</div><div class='del'>-				compatible = "amlogic,meson-g12a-ao-pwm-cd";</div><div class='add'>+				compatible = "amlogic,meson-g12-pwm-v2",</div><div class='add'>+					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x2000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc_AO CLKID_AO_CLK81&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -2099,8 +2102,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_AO_ab: pwm@7000 {</div><div class='del'>-				compatible = "amlogic,meson-g12a-ao-pwm-ab";</div><div class='add'>+				compatible = "amlogic,meson-g12-pwm-v2",</div><div class='add'>+					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x7000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;&amp;clkc_AO CLKID_AO_CLK81&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV5&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -2301,22 +2309,37 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_ef: pwm@19000 {</div><div class='del'>-				compatible = "amlogic,meson-g12a-ee-pwm";</div><div class='add'>+				compatible = "amlogic,meson-g12-pwm-v2",</div><div class='add'>+					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x19000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_cd: pwm@1a000 {</div><div class='del'>-				compatible = "amlogic,meson-g12a-ee-pwm";</div><div class='add'>+				compatible = "amlogic,meson-g12-pwm-v2",</div><div class='add'>+					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1a000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_ab: pwm@1b000 {</div><div class='del'>-				compatible = "amlogic,meson-g12a-ee-pwm";</div><div class='add'>+				compatible = "amlogic,meson-g12-pwm-v2",</div><div class='add'>+					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1b000 0x0 0x20&gt;;</div><div class='add'>+				clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts<br/>index a457b3f4397b..d0a3b4b9229c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts</a></div><div class='hunk'>@@ -267,28 +267,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ethmac {</div><div class='hunk'>@@ -346,8 +342,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -355,8 +349,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pdm {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts<br/>index c779a5da7d1e..4353485c6f26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts</a></div><div class='hunk'>@@ -220,28 +220,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cvbs_vdac_port {</div><div class='hunk'>@@ -284,8 +280,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -293,8 +287,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts<br/>index ea51341f031b..f39fcabc763f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts</a></div><div class='hunk'>@@ -314,28 +314,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cvbs_vdac_port {</div><div class='hunk'>@@ -389,8 +385,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -398,8 +392,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pdm {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts<br/>index f70a46967e2b..b5bf8ecc91e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts</a></div><div class='hunk'>@@ -407,28 +407,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;clkc_audio {</div><div class='hunk'>@@ -502,8 +498,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts<br/>index 32f98a192494..5ab460a3e637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts</a></div><div class='hunk'>@@ -263,28 +263,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cvbs_vdac_port {</div><div class='hunk'>@@ -328,8 +324,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -363,8 +357,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart_A {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi<br/>index 543e70669df5..1321ad95923d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12a.dtsi</a></div><div class='hunk'>@@ -17,6 +17,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -26,6 +32,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -35,6 +47,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -44,6 +62,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -52,6 +76,9 @@</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x80000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -62,6 +89,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;731000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts<br/>index 124a80901084..9fd68195be3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts</a></div><div class='hunk'>@@ -39,3 +39,7 @@</div><div class='ctx'> 	phy-names = "usb2-phy0", "usb2-phy1";</div><div class='ctx'> };</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+&amp;npu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts<br/>index 65b963d794cd..82546b738977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts</a></div><div class='hunk'>@@ -76,46 +76,42 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;, &lt;&amp;pwm_b_x7_pins&gt;;</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0", "clkin1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;npu {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi<br/>index 8e9ad1e51d66..8ecb5bd125c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;761000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='hunk'>@@ -54,6 +55,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;731000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi<br/>index 08c33ec7e9f1..39011b645128 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi</a></div><div class='hunk'>@@ -155,42 +155,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ext_mdio {</div><div class='hunk'>@@ -257,8 +251,6 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -273,8 +265,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi<br/>index d4e1990b5f26..1b08303c4282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi</a></div><div class='hunk'>@@ -263,42 +263,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ethmac {</div><div class='hunk'>@@ -367,8 +361,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='hunk'>@@ -380,8 +372,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi<br/>index de35fa2d7a6d..8e3e3354ed67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a></div><div class='hunk'>@@ -116,6 +116,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;clkc_audio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;frddr_a {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi<br/>index 16dd409051b4..fc737499f207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi</a></div><div class='hunk'>@@ -51,57 +51,47 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts<br/>index e21831dfceee..d5938a4a6da3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts</a></div><div class='hunk'>@@ -281,42 +281,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* RK817 only supports 12.5mV steps, round up the values */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi<br/>index 09d959aefb18..3298d59833b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi</a></div><div class='hunk'>@@ -227,42 +227,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu_thermal {</div><div class='hunk'>@@ -327,16 +321,12 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts<br/>index 39feba7f2d08..1e5c6f984945 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts</a></div><div class='hunk'>@@ -259,42 +259,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu_thermal {</div><div class='hunk'>@@ -379,32 +373,24 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi<br/>index 44c23c984034..19cad93a6889 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;731000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='hunk'>@@ -59,6 +60,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;771000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi<br/>index 4cb6930ffb19..9b6d780eada7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi</a></div><div class='hunk'>@@ -213,42 +213,36 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table_0&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu100 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu101 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu102 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu103 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_a&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpub_opp_table_1&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPUB_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cvbs_vdac_port {</div><div class='hunk'>@@ -304,24 +298,18 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_a_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi<br/>index 86e6ceb31d5e..f04efa828256 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-g12b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-g12b.dtsi</a></div><div class='hunk'>@@ -49,7 +49,13 @@</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;592&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -59,7 +65,13 @@</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;592&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +81,13 @@</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -79,7 +97,13 @@</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -89,7 +113,13 @@</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -99,14 +129,32 @@</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-sets = &lt;64&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-sets = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_b&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		l2: l2-cache0 {</div><div class='add'>+		l2_cache_l: l2-cache-cluster0 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;  /* L2. 256 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_b: l2-cache-cluster1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;; /* L2. 1MB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi<br/>index d38c3a224fbe..2da49cfbde77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi</a></div><div class='hunk'>@@ -345,24 +345,18 @@</div><div class='ctx'> &amp;pwm_AO_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_3_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_b_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;, &lt;&amp;pwm_f_clk_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi<br/>index 45ccddd1aaf0..b4f88ed6273b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi</a></div><div class='hunk'>@@ -97,7 +97,7 @@</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cvbs-connector {</div><div class='add'>+	cvbs_connector: cvbs-connector {</div><div class='ctx'> 		compatible = "composite-video-connector";</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='hunk'>@@ -240,8 +240,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi<br/>index 2673f0dbafe7..c1d8e81d95cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gx.dtsi</a></div><div class='hunk'>@@ -95,6 +95,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -105,6 +111,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -115,6 +127,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -125,6 +143,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -134,6 +158,9 @@</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x80000&gt;; /* L2. 512 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -329,14 +356,14 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_ab: pwm@8550 {</div><div class='del'>-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";</div><div class='add'>+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x08550 0x0 0x10&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_cd: pwm@8650 {</div><div class='del'>-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";</div><div class='add'>+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x08650 0x0 0x10&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -351,7 +378,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_ef: pwm@86c0 {</div><div class='del'>-				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";</div><div class='add'>+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x086c0 0x0 0x10&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -498,7 +525,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			pwm_AO_ab: pwm@550 {</div><div class='del'>-				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";</div><div class='add'>+				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x00550 0x0 0x10&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts<br/>index cf2e2ef81680..2ecc6ebd5a43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts</a></div><div class='hunk'>@@ -298,8 +298,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts<br/>index 7d7dde93fff3..c09da40ff7b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts</a></div><div class='hunk'>@@ -241,8 +241,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Wireless SDIO Module */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts<br/>index 959bd8d77a82..12e26f99d4f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts</a></div><div class='hunk'>@@ -348,10 +348,6 @@</div><div class='ctx'> </div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='del'>-	sd-uhs-sdr12;</div><div class='del'>-	sd-uhs-sdr25;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-ddr50;</div><div class='ctx'> 	max-frequency = &lt;100000000&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi<br/>index 52d57773a77f..6f67364fd63f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi</a></div><div class='hunk'>@@ -150,8 +150,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Wireless SDIO Module */</div><div class='hunk'>@@ -178,9 +176,8 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vddao_3v3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddio_boot&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi<br/>index 3807a184810b..6ff567225fee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi</a></div><div class='hunk'>@@ -222,8 +222,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi<br/>index deb295227189..bfedfc1472ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi</a></div><div class='hunk'>@@ -185,8 +185,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi<br/>index ed00e67e6923..f69923da07fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_a", "uart_rx_ao_a";</div><div class='ctx'> 				function = "uart_ao";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_b", "uart_rx_ao_b";</div><div class='ctx'> 				function = "uart_ao_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -520,7 +520,7 @@</div><div class='ctx'> 				groups = "uart_tx_a",</div><div class='ctx'> 				       "uart_rx_a";</div><div class='ctx'> 				function = "uart_a";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -538,7 +538,7 @@</div><div class='ctx'> 				groups = "uart_tx_b",</div><div class='ctx'> 				       "uart_rx_b";</div><div class='ctx'> 				function = "uart_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -556,7 +556,7 @@</div><div class='ctx'> 				groups = "uart_tx_c",</div><div class='ctx'> 				       "uart_rx_c";</div><div class='ctx'> 				function = "uart_c";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -739,6 +739,31 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pwm_ab {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_AO_ab {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clkc CLKID_CLK81&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_cd {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_ef {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwrc {</div><div class='ctx'> 	resets = &lt;&amp;reset RESET_VIU&gt;,</div><div class='ctx'> 		 &lt;&amp;reset RESET_VENC&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts<br/>index c5e2306ad7a4..ca7c4e8e7cac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts</a></div><div class='hunk'>@@ -280,8 +280,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This is connected to the Bluetooth module: */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts<br/>new file mode 100644<br/>index 000000000000..cac15b89c573<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Ferass El Hafidi &lt;funderscore@postmarketos.org&gt;</div><div class='add'>+ * Heavily based on meson-gxl-s805x-p241.dtb:</div><div class='add'>+ *  - Copyright (c) 2018 BayLibre, SAS.</div><div class='add'>+ *    Author: Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+ *    Author: Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/meson-aiu.h&gt;</div><div class='add'>+</div><div class='add'>+#include "meson-gxl-s805y.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "xiaomi,aquaman", "amlogic,s805y", "amlogic,meson-gxl";</div><div class='add'>+	model = "Xiaomi Mi TV Stick (aquaman)";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart_AO;</div><div class='add'>+		serial1 = &amp;uart_A;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: emmc-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio BOOT_9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_tmds_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-white {</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio GPIODV_24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddio_boot: regulator-vddio-boot {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDIO_BOOT";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddao_3v3: regulator-vddao-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDAO_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddio_ao18: regulator-vddio-ao18 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDIO_AO18";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_5V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: emmc-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio BOOT_9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi32k: wifi32k {</div><div class='add'>+		compatible = "pwm-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm_ef 0 30518 0&gt;; /* PWM_E at 32.768KHz */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio GPIOX_6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		clocks = &lt;&amp;wifi32k&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "amlogic,gx-sound-card";</div><div class='add'>+		model = "XIAOMI-AQUAMAN";</div><div class='add'>+		clocks = &lt;&amp;clkc CLKID_MPLL0&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_MPLL1&gt;,</div><div class='add'>+			 &lt;&amp;clkc CLKID_MPLL2&gt;;</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;clkc CLKID_MPLL0&gt;,</div><div class='add'>+				  &lt;&amp;clkc CLKID_MPLL1&gt;,</div><div class='add'>+				  &lt;&amp;clkc CLKID_MPLL2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;294912000&gt;,</div><div class='add'>+				       &lt;270950400&gt;,</div><div class='add'>+				       &lt;393216000&gt;;</div><div class='add'>+</div><div class='add'>+		dai-link-0 {</div><div class='add'>+			sound-dai = &lt;&amp;aiu AIU_CPU CPU_I2S_FIFO&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dai-link-1 {</div><div class='add'>+			sound-dai = &lt;&amp;aiu AIU_CPU CPU_I2S_ENCODER&gt;;</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+			codec-0 {</div><div class='add'>+				sound-dai = &lt;&amp;aiu AIU_HDMI CTRL_I2S&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dai-link-2 {</div><div class='add'>+			sound-dai = &lt;&amp;aiu AIU_HDMI CTRL_OUT&gt;;</div><div class='add'>+</div><div class='add'>+			codec-0 {</div><div class='add'>+				sound-dai = &lt;&amp;hdmi_tx&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aiu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cec_AO {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ao_cec_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	hdmi-phandle = &lt;&amp;hdmi_tx&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_hpd_pins&gt;, &lt;&amp;hdmi_i2c_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	hdmi-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_tmds_port {</div><div class='add'>+	hdmi_tx_tmds_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vref-supply = &lt;&amp;vddio_ao18&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wireless SDIO Module (Amlogic W155S1 / Realtek RTL8821CS) */</div><div class='add'>+&amp;sd_emmc_b {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdio_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdio_clk_gate_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "clk-gate";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	max-frequency = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	disable-wp;</div><div class='add'>+</div><div class='add'>+	/* WiFi firmware requires power to be kept while in suspend */</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vddao_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vddio_boot&gt;;</div><div class='add'>+</div><div class='add'>+	sdio: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;sd_emmc_c {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_pins&gt;, &lt;&amp;emmc_ds_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;emmc_clk_gate_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "clk-gate";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	disable-wp;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vddio_boot&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_ef {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is connected to the Bluetooth module</div><div class='add'>+ * Note: There's no driver for the Bluetooth module of some variants yet.</div><div class='add'>+ */</div><div class='add'>+&amp;uart_A {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart_a_pins&gt;, &lt;&amp;uart_a_cts_rts_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart_AO {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart_ao_a_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	vbus-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi<br/>new file mode 100644<br/>index 000000000000..49b29b71f732<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s805y.dtsi</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Ferass El Hafidi &lt;funderscore@postmarketos.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "meson-gxl-s805x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "amlogic,s805y", "amlogic,meson-gxl";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts<br/>index c1470416faad..7dffeb5931c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts</a></div><div class='hunk'>@@ -102,8 +102,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sd_emmc_a {</div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts<br/>index 92c425d0259c..ff9145d49090 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts</a></div><div class='hunk'>@@ -21,8 +21,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sd_emmc_a {</div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts<br/>index 2b94b6e5285e..4ca90ac947b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts</a></div><div class='hunk'>@@ -116,8 +116,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts<br/>index 89fe5110f7a2..62a2da766a00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts</a></div><div class='hunk'>@@ -115,8 +115,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* SD card */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts<br/>index a80f0ea2773b..4e89d6f6bb57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts</a></div><div class='hunk'>@@ -211,8 +211,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_3_pins&gt;, &lt;&amp;pwm_ao_b_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt; , &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0", "clkin1" ;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts<br/>index c79f9f2099bf..236cedec9f19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts</a></div><div class='hunk'>@@ -145,8 +145,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Wireless SDIO Module */</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi<br/>index 7e7dc87ede2d..05a0d4de3ad7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi</a></div><div class='hunk'>@@ -101,8 +101,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='hunk'>@@ -134,9 +132,8 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vddao_3v3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddio_boot&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi<br/>index f58d1790de1c..ba535010a3c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a></div><div class='hunk'>@@ -163,7 +163,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_a", "uart_rx_ao_a";</div><div class='ctx'> 				function = "uart_ao";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -180,7 +180,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_b", "uart_rx_ao_b";</div><div class='ctx'> 				function = "uart_ao_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -188,7 +188,7 @@</div><div class='ctx'> 			mux {</div><div class='ctx'> 				groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";</div><div class='ctx'> 				function = "uart_ao_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -214,7 +214,7 @@</div><div class='ctx'> 				groups = "i2c_sck_ao",</div><div class='ctx'> 				       "i2c_sda_ao";</div><div class='ctx'> 				function = "i2c_ao";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -522,7 +522,7 @@</div><div class='ctx'> 				groups = "uart_tx_a",</div><div class='ctx'> 				       "uart_rx_a";</div><div class='ctx'> 				function = "uart_a";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -540,7 +540,7 @@</div><div class='ctx'> 				groups = "uart_tx_b",</div><div class='ctx'> 				       "uart_rx_b";</div><div class='ctx'> 				function = "uart_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -558,7 +558,7 @@</div><div class='ctx'> 				groups = "uart_tx_c",</div><div class='ctx'> 				       "uart_rx_c";</div><div class='ctx'> 				function = "uart_c";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -576,7 +576,7 @@</div><div class='ctx'> 				groups = "i2c_sck_a",</div><div class='ctx'> 				     "i2c_sda_a";</div><div class='ctx'> 				function = "i2c_a";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -585,7 +585,7 @@</div><div class='ctx'> 				groups = "i2c_sck_b",</div><div class='ctx'> 				      "i2c_sda_b";</div><div class='ctx'> 				function = "i2c_b";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -594,7 +594,7 @@</div><div class='ctx'> 				groups = "i2c_sck_c",</div><div class='ctx'> 				      "i2c_sda_c";</div><div class='ctx'> 				function = "i2c_c";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -603,7 +603,7 @@</div><div class='ctx'> 				groups = "i2c_sck_c_dv19",</div><div class='ctx'> 				      "i2c_sda_c_dv18";</div><div class='ctx'> 				function = "i2c_c";</div><div class='del'>-				bias-disable;</div><div class='add'>+				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -809,6 +809,31 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pwm_ab {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_AO_ab {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clkc CLKID_CLK81&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_cd {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm_ef {</div><div class='add'>+	clocks = &lt;&amp;xtal&gt;,</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='add'>+		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwrc {</div><div class='ctx'> 	resets = &lt;&amp;reset RESET_VIU&gt;,</div><div class='ctx'> 		 &lt;&amp;reset RESET_VENC&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts<br/>index 942df754a0ed..1221f4545130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxlx-s905l-p271.dts</a></div><div class='hunk'>@@ -38,6 +38,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;saradc {</div><div class='add'>+	compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts<br/>index 96a3dd2d8a99..2a09b3d550e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts</a></div><div class='hunk'>@@ -289,16 +289,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_3_pins&gt;, &lt;&amp;pwm_ao_b_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;, &lt;&amp;pwm_f_clk_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sd_emmc_a {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts<br/>index d4858afa0e9c..feb31207773f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts</a></div><div class='hunk'>@@ -72,8 +72,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sd_emmc_a {</div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts<br/>index d02b80d77378..6c8bec1853ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts</a></div><div class='hunk'>@@ -21,8 +21,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sd_emmc_a {</div><div class='del'>-	brcmf: wifi@1 {</div><div class='add'>+	sdio: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='del'>-		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts<br/>index 7356d3b628b1..9d5a481b309f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts</a></div><div class='hunk'>@@ -192,8 +192,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_FCLK_DIV4&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Wireless SDIO Module */</div><div class='hunk'>@@ -219,7 +217,7 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vddao_3v3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddio_boot&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: brcmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts<br/>new file mode 100644<br/>index 000000000000..ba871f3f53bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm-ugoos-am3.dts</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * Debug UART (3.3V, 115200 baud) at the corner of the board:</div><div class='add'>+ *   (4) (3) (2) [1]</div><div class='add'>+ *   Vcc RXD TXD GND</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "meson-gxm.dtsi"</div><div class='add'>+#include "meson-gx-p23x-q20x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "ugoos,am3", "amlogic,s912", "amlogic,meson-gxm";</div><div class='add'>+	model = "Ugoos AM3";</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1710000&gt;;</div><div class='add'>+</div><div class='add'>+		button-function {</div><div class='add'>+			label = "Update";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;10000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cvbs_connector {</div><div class='add'>+	/* Not used on this board */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethmac {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* Select external PHY by default */</div><div class='add'>+	phy-handle = &lt;&amp;external_phy&gt;;</div><div class='add'>+</div><div class='add'>+	amlogic,tx-delay-ns = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	/* External PHY is in RGMII */</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;external_mdio {</div><div class='add'>+	external_phy: ethernet-phy@0 {</div><div class='add'>+		/* Realtek RTL8211F (0x001cc916) */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio GPIOZ_14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio_intc&gt;;</div><div class='add'>+		/* MAC_INTR on GPIOZ_15 */</div><div class='add'>+		interrupts = &lt;25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_B {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c_b_pins&gt;;</div><div class='add'>+</div><div class='add'>+	rtc: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* WLAN: Atheros 10k (QCA9377) */</div><div class='add'>+&amp;sd_emmc_a {</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;sd_emmc_c {</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi<br/>index 411cc312fc62..514c9bea6423 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-gxm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-gxm.dtsi</a></div><div class='hunk'>@@ -64,6 +64,12 @@</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -75,6 +81,12 @@</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -86,6 +98,12 @@</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -97,6 +115,12 @@</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scpi_dvfs 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi<br/>index 929e4720ae76..ac9c4c2673b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi</a></div><div class='hunk'>@@ -458,24 +458,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_b_x7_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_cd {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_d_x3_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi<br/>index 957577d986c0..9d99ed2994df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-s4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-s4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-s4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-s4.dtsi</a></div><div class='hunk'>@@ -629,6 +629,11 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			clk_msr: clock-measure@48000 {</div><div class='add'>+				compatible = "amlogic,s4-clk-measure";</div><div class='add'>+				reg = &lt;0x0 0x48000 0x0 0x1c&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spicc0: spi@50000 {</div><div class='ctx'> 				compatible = "amlogic,meson-g12a-spicc";</div><div class='ctx'> 				reg = &lt;0x0 0x50000 0x0 0x44&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi<br/>index d1fa8b8bf795..9be3084b090d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi</a></div><div class='hunk'>@@ -147,28 +147,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cvbs_vdac_port {</div><div class='hunk'>@@ -199,15 +195,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -215,8 +207,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi<br/>index 81dce862902a..5e07f0f9538e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi</a></div><div class='hunk'>@@ -185,28 +185,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ext_mdio {</div><div class='hunk'>@@ -367,8 +363,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -386,11 +380,10 @@</div><div class='ctx'> </div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='del'>-	max-frequency = &lt;50000000&gt;;</div><div class='add'>+	/* Boot failures are observed at 50MHz */</div><div class='add'>+	max-frequency = &lt;35000000&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> </div><div class='del'>-	/* TOFIX: SD card is barely usable in SDR modes */</div><div class='del'>-</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio GPIOC_6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;tflash_vdd&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddio_c&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts<br/>index 9c0b544e2209..a3d9b66b6878 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts</a></div><div class='hunk'>@@ -51,35 +51,29 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi<br/>index 7b0e9817a615..c4524eb4f099 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi</a></div><div class='hunk'>@@ -250,28 +250,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ext_mdio {</div><div class='hunk'>@@ -392,8 +388,6 @@</div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts<br/>index 537370db360f..5daadfb170b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts</a></div><div class='hunk'>@@ -64,26 +64,22 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu_b&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts<br/>index 2e3397e55da2..024d2eb8e6ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts</a></div><div class='hunk'>@@ -359,28 +359,24 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU1_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu2 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU2_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu3 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vddcpu&gt;;</div><div class='ctx'> 	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;clkc CLKID_CPU3_CLK&gt;;</div><div class='del'>-	clock-latency = &lt;50000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ethmac {</div><div class='hunk'>@@ -435,15 +431,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_a_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_AO_cd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_ao_d_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -451,8 +443,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_e_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;;</div><div class='del'>-	clock-names = "clkin0";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi<br/>index 97e4b52066dc..e5db8ce94062 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/amlogic/meson-sm1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/amlogic/meson-sm1.dtsi</a></div><div class='hunk'>@@ -55,6 +55,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -64,6 +70,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -73,6 +85,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -82,6 +100,12 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			d-cache-line-size = &lt;32&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;32&gt;;</div><div class='add'>+			i-cache-line-size = &lt;32&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;32&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -90,6 +114,9 @@</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;; /* L2. 256 KB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -100,6 +127,7 @@</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;770000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		opp-1200000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi<br/>index ea5721ea02f0..5bbedb0a7107 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apm/apm-shadowcat.dtsi</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_0&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd0clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@1 {</div><div class='hunk'>@@ -32,7 +31,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_0&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd0clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@100 {</div><div class='hunk'>@@ -42,7 +40,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_1&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd1clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@101 {</div><div class='hunk'>@@ -52,7 +49,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_1&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd1clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@200 {</div><div class='hunk'>@@ -62,7 +58,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_2&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd2clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@201 {</div><div class='hunk'>@@ -72,7 +67,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_2&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd2clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@300 {</div><div class='hunk'>@@ -82,7 +76,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_3&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd3clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu@301 {</div><div class='hunk'>@@ -92,7 +85,6 @@</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='ctx'> 			cpu-release-addr = &lt;0x1 0x0000fff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;xgene_L2_3&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pmd3clk 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		xgene_L2_0: l2-cache-0 {</div><div class='hunk'>@@ -211,9 +203,9 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	refclk: refclk {</div><div class='add'>+	refclk: clock-100000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		clock-output-names = "refclk";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -232,6 +224,16 @@</div><div class='ctx'> 		clock-frequency = &lt;50000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2cslimpro {</div><div class='add'>+		compatible = "apm,xgene-slimpro-i2c";</div><div class='add'>+		mboxes = &lt;&amp;mailbox 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hwmonslimpro {</div><div class='add'>+		compatible = "apm,xgene-slimpro-hwmon";</div><div class='add'>+		mboxes = &lt;&amp;mailbox 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -246,7 +248,7 @@</div><div class='ctx'> 			pmdpll: pmdpll@170000f0 {</div><div class='ctx'> 				compatible = "apm,xgene-pcppll-v2-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x170000f0 0x0 0x10&gt;;</div><div class='ctx'> 				clock-output-names = "pmdpll";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -286,7 +288,7 @@</div><div class='ctx'> 			socpll: socpll@17000120 {</div><div class='ctx'> 				compatible = "apm,xgene-socpll-v2-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x17000120 0x0 0x1000&gt;;</div><div class='ctx'> 				clock-output-names = "socpll";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -585,16 +587,6 @@</div><div class='ctx'> 					0x0 0x7 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2cslimpro {</div><div class='del'>-			compatible = "apm,xgene-slimpro-i2c";</div><div class='del'>-			mboxes = &lt;&amp;mailbox 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hwmonslimpro {</div><div class='del'>-			compatible = "apm,xgene-slimpro-hwmon";</div><div class='del'>-			mboxes = &lt;&amp;mailbox 7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		serial0: serial@10600000 {</div><div class='ctx'> 			compatible = "ns16550";</div><div class='ctx'> 			reg = &lt;0 0x10600000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -617,7 +609,7 @@</div><div class='ctx'> 		pcie0: pcie@1f2b0000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			device_type = "pci";</div><div class='del'>-			compatible = "apm,xgene-pcie", "apm,xgene2-pcie";</div><div class='add'>+			compatible = "apm,xgene-pcie";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			#address-cells = &lt;3&gt;;</div><div class='hunk'>@@ -643,7 +635,7 @@</div><div class='ctx'> 		pcie1: pcie@1f2c0000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			device_type = "pci";</div><div class='del'>-			compatible = "apm,xgene-pcie", "apm,xgene2-pcie";</div><div class='add'>+			compatible = "apm,xgene-pcie";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			#address-cells = &lt;3&gt;;</div><div class='hunk'>@@ -809,7 +801,6 @@</div><div class='ctx'> 			interrupts = &lt;0 0x45 0x4&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sbapbclk 0&gt;;</div><div class='del'>-			bus_num = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c4: i2c@10640000 {</div><div class='hunk'>@@ -819,7 +810,6 @@</div><div class='ctx'> 			reg = &lt;0x0 0x10640000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 0x3a 0x4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;i2c4clk 0&gt;;</div><div class='del'>-			bus_num = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi<br/>index 6ad4703925dc..4ca0ead120c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apm/apm-storm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apm/apm-storm.dtsi</a></div><div class='hunk'>@@ -103,6 +103,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@78010000 {</div><div class='ctx'> 		compatible = "arm,cortex-a15-gic";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x78010000 0x0 0x1000&gt;,	/* GIC Dist */</div><div class='hunk'>@@ -112,9 +113,9 @@</div><div class='ctx'> 		interrupts = &lt;1 9 0xf04&gt;;	/* GIC Maintenence IRQ */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	refclk: refclk {</div><div class='add'>+	refclk: clock-100000000 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		clock-output-names = "refclk";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -133,6 +134,16 @@</div><div class='ctx'> 		interrupts = &lt;1 12 0xff04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2cslimpro {</div><div class='add'>+		compatible = "apm,xgene-slimpro-i2c";</div><div class='add'>+		mboxes = &lt;&amp;mailbox 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hwmonslimpro {</div><div class='add'>+		compatible = "apm,xgene-slimpro-hwmon";</div><div class='add'>+		mboxes = &lt;&amp;mailbox 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -148,28 +159,25 @@</div><div class='ctx'> 			pcppll: pcppll@17000100 {</div><div class='ctx'> 				compatible = "apm,xgene-pcppll-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				clock-names = "pcppll";</div><div class='ctx'> 				reg = &lt;0x0 0x17000100 0x0 0x1000&gt;;</div><div class='ctx'> 				clock-output-names = "pcppll";</div><div class='del'>-				type = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			socpll: socpll@17000120 {</div><div class='ctx'> 				compatible = "apm,xgene-socpll-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;refclk 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				clock-names = "socpll";</div><div class='ctx'> 				reg = &lt;0x0 0x17000120 0x0 0x1000&gt;;</div><div class='ctx'> 				clock-output-names = "socpll";</div><div class='del'>-				type = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			socplldiv2: socplldiv2  {</div><div class='ctx'> 				compatible = "fixed-factor-clock";</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;socpll 0&gt;;</div><div class='del'>-				clock-names = "socplldiv2";</div><div class='ctx'> 				clock-mult = &lt;1&gt;;</div><div class='ctx'> 				clock-div = &lt;2&gt;;</div><div class='ctx'> 				clock-output-names = "socplldiv2";</div><div class='hunk'>@@ -178,7 +186,7 @@</div><div class='ctx'> 			ahbclk: ahbclk@17000000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x17000000 0x0 0x2000&gt;;</div><div class='ctx'> 				reg-names = "div-reg";</div><div class='ctx'> 				divider-offset = &lt;0x164&gt;;</div><div class='hunk'>@@ -190,7 +198,7 @@</div><div class='ctx'> 			sdioclk: sdioclk@1f2ac000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f2ac000 0x0 0x1000</div><div class='ctx'> 					0x0 0x17000000 0x0 0x2000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg", "div-reg";</div><div class='hunk'>@@ -207,7 +215,7 @@</div><div class='ctx'> 			ethclk: ethclk {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				clock-names = "ethclk";</div><div class='ctx'> 				reg = &lt;0x0 0x17000000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "div-reg";</div><div class='hunk'>@@ -229,7 +237,7 @@</div><div class='ctx'> 			sge0clk: sge0clk@1f21c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f21c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				csr-mask = &lt;0xa&gt;;</div><div class='hunk'>@@ -240,7 +248,7 @@</div><div class='ctx'> 			xge0clk: xge0clk@1f61c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f61c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				csr-mask = &lt;0x3&gt;;</div><div class='hunk'>@@ -251,7 +259,7 @@</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f62c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				csr-mask = &lt;0x3&gt;;</div><div class='hunk'>@@ -261,7 +269,7 @@</div><div class='ctx'> 			sataphy1clk: sataphy1clk@1f21c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f21c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sataphy1clk";</div><div class='hunk'>@@ -275,7 +283,7 @@</div><div class='ctx'> 			sataphy2clk: sataphy1clk@1f22c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f22c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sataphy2clk";</div><div class='hunk'>@@ -289,7 +297,7 @@</div><div class='ctx'> 			sataphy3clk: sataphy1clk@1f23c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f23c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sataphy3clk";</div><div class='hunk'>@@ -303,7 +311,7 @@</div><div class='ctx'> 			sata01clk: sata01clk@1f21c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f21c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sata01clk";</div><div class='hunk'>@@ -316,7 +324,7 @@</div><div class='ctx'> 			sata23clk: sata23clk@1f22c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f22c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sata23clk";</div><div class='hunk'>@@ -329,7 +337,7 @@</div><div class='ctx'> 			sata45clk: sata45clk@1f23c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f23c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "sata45clk";</div><div class='hunk'>@@ -342,7 +350,7 @@</div><div class='ctx'> 			rtcclk: rtcclk@17000000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x17000000 0x0 0x2000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				csr-offset = &lt;0xc&gt;;</div><div class='hunk'>@@ -355,7 +363,7 @@</div><div class='ctx'> 			rngpkaclk: rngpkaclk@17000000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x17000000 0x0 0x2000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				csr-offset = &lt;0xc&gt;;</div><div class='hunk'>@@ -369,7 +377,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f2bc000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "pcie0clk";</div><div class='hunk'>@@ -379,7 +387,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f2cc000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "pcie1clk";</div><div class='hunk'>@@ -389,7 +397,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f2dc000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "pcie2clk";</div><div class='hunk'>@@ -399,7 +407,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f50c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "pcie3clk";</div><div class='hunk'>@@ -409,7 +417,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f51c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "pcie4clk";</div><div class='hunk'>@@ -418,7 +426,7 @@</div><div class='ctx'> 			dmaclk: dmaclk@1f27c000 {</div><div class='ctx'> 				compatible = "apm,xgene-device-clock";</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;socplldiv2 0&gt;;</div><div class='add'>+				clocks = &lt;&amp;socplldiv2&gt;;</div><div class='ctx'> 				reg = &lt;0x0 0x1f27c000 0x0 0x1000&gt;;</div><div class='ctx'> 				reg-names = "csr-reg";</div><div class='ctx'> 				clock-output-names = "dmaclk";</div><div class='hunk'>@@ -760,16 +768,6 @@</div><div class='ctx'> 					&lt;0x0 0x7 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2cslimpro {</div><div class='del'>-			compatible = "apm,xgene-slimpro-i2c";</div><div class='del'>-			mboxes = &lt;&amp;mailbox 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hwmonslimpro {</div><div class='del'>-			compatible = "apm,xgene-slimpro-hwmon";</div><div class='del'>-			mboxes = &lt;&amp;mailbox 7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		serial0: serial@1c020000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			compatible = "ns16550a";</div><div class='hunk'>@@ -849,9 +847,7 @@</div><div class='ctx'> 			compatible = "snps,designware-i2c";</div><div class='ctx'> 			reg = &lt;0x0 0x10512000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 0x44 0x4&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;ahbclk 0&gt;;</div><div class='del'>-			bus_num = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		phy1: phy@1f21a000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile<br/>index aec5e29cdfb7..4eebcd85c90f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/Makefile</a></div><div class='hunk'>@@ -1,4 +1,73 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j71.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j73.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j85m.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j86m.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j87m.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-n53.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j72.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j85.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j86.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-j87.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s5l8960x-n51.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-j42d.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-j96.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-j97.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-n102.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-n56.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7000-n61.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7001-j81.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t7001-j82.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8000-j71s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8000-j72s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8000-n66.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8000-n69u.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8000-n71.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8003-j71t.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8003-j72t.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8003-n66m.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8003-n69.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8003-n71m.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8001-j127.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8001-j128.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8001-j98a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += s8001-j99a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-d101.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-d10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-d111.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-d11.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-j171.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-j172.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-j71b.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-j72b.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8010-n112.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8011-j105a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8011-j120.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8011-j121.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8011-j207.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8011-j208.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j132.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j137.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j140a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j140k.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j152f.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j160.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j174.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j185.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j185f.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j213.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j215.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j223.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j230k.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j214k.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j680.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8012-j780.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d201.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d20.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d211.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d21.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d221.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8015-d22.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb</div><div class='hunk'>@@ -10,6 +79,15 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6022-j180d.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6020-j414s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6021-j414c.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6020-j416s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6021-j416c.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6020-j474s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6021-j475c.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t6022-j475d.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_APPLE) += t8112-j415.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi<br/>new file mode 100644<br/>index 000000000000..8868df1538d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 5s common device tree</div><div class='add'>+ * Based on A7 (APL0698), up to 1.3GHz</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s5l8960x.dtsi"</div><div class='add'>+#include "s5l8960x-common.dtsi"</div><div class='add'>+#include "s5l8960x-opp.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwi_bl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi<br/>new file mode 100644<br/>index 000000000000..dd57eb1d34c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air  common device tree</div><div class='add'>+ * Based on A7 (APL5698), up to 1.4GHz</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s5l8960x.dtsi"</div><div class='add'>+#include "s5l8960x-common.dtsi"</div><div class='add'>+#include "s5l8965x-opp.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 110 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-common.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-common.dtsi<br/>new file mode 100644<br/>index 000000000000..243480ca2356<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 5s, iPad mini 2/3, iPad Air</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A7 devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J71, J72, J73, J85, J85m, J86, J86m, J87, J87m, N51, N53</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j71.dts b/arch/arm64/boot/dts/apple/s5l8960x-j71.dts<br/>new file mode 100644<br/>index 000000000000..e13036dacb45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j71.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j71.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air (Wi-Fi), J71, iPad4,1 (A1474)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-air1.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j71", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Air (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j72.dts b/arch/arm64/boot/dts/apple/s5l8960x-j72.dts<br/>new file mode 100644<br/>index 000000000000..afb71b8885c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j72.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j72.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air (Cellular), J72, iPad4,2 (A1475)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-air1.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j72", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Air (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j73.dts b/arch/arm64/boot/dts/apple/s5l8960x-j73.dts<br/>new file mode 100644<br/>index 000000000000..c871962df529<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j73.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j73.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air (Cellular, China), J73, iPad4,2 (A1476)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-air1.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j73", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Air (Cellular, China)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j85.dts b/arch/arm64/boot/dts/apple/s5l8960x-j85.dts<br/>new file mode 100644<br/>index 000000000000..aefb7b36d7aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j85.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j85.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 2 (Wi-Fi), J85, iPad4,4 (A1489)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j85", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 2 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts b/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts<br/>new file mode 100644<br/>index 000000000000..ec2bcaa6d1d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j85m.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 3 (Wi-Fi), J85m, iPad4,7 (A1599)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j85m", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 3 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j86.dts b/arch/arm64/boot/dts/apple/s5l8960x-j86.dts<br/>new file mode 100644<br/>index 000000000000..470f2f825e70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j86.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j86.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 2 (Cellular), J86, iPad4,5 (A1490)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j86", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 2 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts b/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts<br/>new file mode 100644<br/>index 000000000000..90311d98aaad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j86m.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 3 (Cellular), J86m, iPad4,8 (A1600)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j86m", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 3 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j87.dts b/arch/arm64/boot/dts/apple/s5l8960x-j87.dts<br/>new file mode 100644<br/>index 000000000000..3580fd8e3831<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j87.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j87.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 2 (Cellular, China), J87, iPad4,6 (A1491)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j87", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 2 (Cellular, China)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts b/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts<br/>new file mode 100644<br/>index 000000000000..fa0da4fa6727<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-j87m.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 3 (Cellular, China), J87m, iPad4,9 (A1601)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-mini3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j87m", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 3 (Cellular, China)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi<br/>new file mode 100644<br/>index 000000000000..f3696d22e71c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 2 common device tree</div><div class='add'>+ * Based on A7 (APL0698), up to 1.3GHz</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s5l8960x.dtsi"</div><div class='add'>+#include "s5l8960x-common.dtsi"</div><div class='add'>+#include "s5l8960x-opp.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi<br/>new file mode 100644<br/>index 000000000000..4e397b3d7d7a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 3 common device tree</div><div class='add'>+ * Based on A7 (APL0698), up to 1.3GHz</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The Mini 3 seems to be only an iteration over the Mini 2 with some</div><div class='add'>+ * small changes, like the introduction of Touch ID, hence there is little</div><div class='add'>+ * to no differentiation between these 2 for now.</div><div class='add'>+ */</div><div class='add'>+#include "s5l8960x-mini2.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-n51.dts b/arch/arm64/boot/dts/apple/s5l8960x-n51.dts<br/>new file mode 100644<br/>index 000000000000..cd52f814fbf2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-n51.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-n51.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 5s (GSM), N51, iPhone6,1 (A1453/A1533)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-5s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n51", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 5s (GSM)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-n53.dts b/arch/arm64/boot/dts/apple/s5l8960x-n53.dts<br/>new file mode 100644<br/>index 000000000000..4795798a4444<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-n53.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-n53.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 5s (LTE), N53, iPhone6,2 (A1457/A1518/A1528/A1530)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-5s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n53", "apple,s5l8960x", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 5s (LTE)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi<br/>new file mode 100644<br/>index 000000000000..e4d568c4a119<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Operating points for Apple S5L8960X "A7" SoC, Up to 1296 MHz</div><div class='add'>+ *</div><div class='add'>+ * target-type: N51, N53, J85, J86. J87, J85m, J86m, J87m</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cyclone_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;15500&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;43000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;26000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;840000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;30000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1128000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;39500&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1296000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45500&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..da265f484307<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,610 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple S5L8960X "A7" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@20000 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@20008 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_secuart0: power-controller@200f0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "secuart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_secuart1: power-controller@200f8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "secuart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@20010 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_lio: power-controller@20018 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "lio";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_iomux: power-controller@20020 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "iomux";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@20028 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@20030 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@20038 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20038 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@20040 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@20048 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20048 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@20050 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@20058 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20058 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@20060 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20060 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@20068 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20068 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@20070 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20070 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@20078 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20078 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@20080 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20080 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@20088 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20088 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@20090 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20090 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@20098 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20098 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@200a0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@200a8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@200b0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@200b8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@200c0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@200c8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@200d0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@200d8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@200e0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@200e8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@20110 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@20158 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@20160 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@20170 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@20180 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp_busmux: power-controller@201a8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp_busmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@201d8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp: power-controller@201d0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@201e0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@201e8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0: power-controller@201b0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aes0: power-controller@20100 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aes0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@20108 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@20118 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic1_phy: power-controller@20120 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic1_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic2_phy: power-controller@20128 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic2_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens0: power-controller@20130 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens1: power-controller@20138 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@20140 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcu: power-controller@20148 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcu";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_amp: power-controller@20150 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "amp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@20168 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1_ohci: power-controller@20178 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@20188 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@20190 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@20198 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cp: power-controller@201a0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@201b8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@201c0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1: power-controller@201c8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec: power-controller@201f0 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc: power-controller@201f8 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans: power-controller@20200 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans_dll: power-controller@20208 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans_dll";</div><div class='add'>+		power-domains = &lt;&amp;ps_ans&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@20218 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@20268 {</div><div class='add'>+		compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		power-domains = &lt;&amp;ps_secuart1&gt;, &lt;&amp;ps_secuart0&gt;;</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8960x.dtsi b/arch/arm64/boot/dts/apple/s5l8960x.dtsi<br/>new file mode 100644<br/>index 000000000000..462ffdd348fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8960x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8960x.dtsi</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple S5L8960X "A7" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other Names: H6, "Alcatraz"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,cyclone";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;cyclone_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,cyclone";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;cyclone_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202220000 {</div><div class='add'>+			compatible = "apple,s5l8960x-cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02220000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0a0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0a0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,s5l8960x-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,s5l8960x-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,s5l8960x-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,s5l8960x-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,s5l8960x-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x24000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@20e027000 {</div><div class='add'>+			compatible = "apple,s5l8960x-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x0e027000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,s5l8960x-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dwi_bl: backlight@20e200010 {</div><div class='add'>+			compatible = "apple,s5l8960x-dwi-bl", "apple,dwi-bl";</div><div class='add'>+			reg = &lt;0x2 0x0e200010 0x0 0x8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dwi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@20e300000 {</div><div class='add'>+			compatible = "apple,s5l8960x-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0e300000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 200&gt;;</div><div class='add'>+			apple,npins = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(81, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(80, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(83, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(82, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(101, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(100, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(172, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(171, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A7 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "s5l8960x-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi b/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi<br/>new file mode 100644<br/>index 000000000000..d34dae74a90c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Operating points for Apple S5L8965X "A7" Rev A SoC, Up to 1392 MHz</div><div class='add'>+ *</div><div class='add'>+ * target-type: J71, J72, J73</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cyclone_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;10000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;49000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;840000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;30000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1128000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;39500&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1296000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45500&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1392000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;46500&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800-0-3-common.dtsi b/arch/arm64/boot/dts/apple/s800-0-3-common.dtsi<br/>new file mode 100644<br/>index 000000000000..cb42c5f2c1b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800-0-3-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800-0-3-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s, iPhone 6s Plus, iPad 5, iPhone SE</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A9 devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J71s, J72s, N66, N69u, N71, J71t, J72t, N66m, N69, N71m</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwi_bl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi b/arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..196b8e745a95<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,757 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple S8000/3 "A9" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80150 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80158 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@80110 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80118 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80120 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@80148 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80168 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80170 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80178 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80180 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80188 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@80190 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@80198 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80160 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@80128 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic1_phy: power-controller@80130 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic1_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens0: power-controller@80138 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens1: power-controller@80140 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80250 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@80258 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@80260 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@80270 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host2: power-controller@80280 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host2";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_rtmux: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "rtmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0: power-controller@802b0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@802e8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@80200 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@80208 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@80210 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@80218 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aes0: power-controller@80220 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aes0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80228 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80230 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80238 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80240 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80248 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@80268 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1_ohci: power-controller@80278 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host2_ohci: power-controller@80288 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host2_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@80290 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@80298 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802a0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@802c0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc: power-controller@80308 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@80310 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@80318 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link0: power-controller@80320 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link0";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link1: power-controller@80328 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link1";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link2: power-controller@80330 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link2";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link3: power-controller@80338 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80338 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link3";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@80340 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80340 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe: power-controller@88000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88010 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_aop: power-controller@80000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop_busif &amp;ps_aop_cpu &amp;ps_aop_filter&gt;;</div><div class='add'>+		apple,always-on; /* Always on processor */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_gpio: power-controller@80010 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_gpio";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_cpu: power-controller@80040 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_filter: power-controller@80048 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80048 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_filter";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_busif: power-controller@80050 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_busif";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800-0-3.dtsi b/arch/arm64/boot/dts/apple/s800-0-3.dtsi<br/>new file mode 100644<br/>index 000000000000..bb38662b7d2e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800-0-3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800-0-3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple S8000/S8003 "A9" SoC</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to both variants of A9</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,twister";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;twister_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,twister";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;twister_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x300000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202220000 {</div><div class='add'>+			compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02220000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,s8000-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dwi_bl: backlight@20e200080 {</div><div class='add'>+			compatible = "apple,s8000-dwi-bl", "apple,dwi-bl";</div><div class='add'>+			reg = &lt;0x2 0x0e200080 0x0 0x8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dwi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@20f100000 {</div><div class='add'>+			compatible = "apple,s8000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0f100000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 208&gt;;</div><div class='add'>+			apple,npins = &lt;208&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(46, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(45, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(115, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(114, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(23, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(22, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2100f0000 {</div><div class='add'>+			compatible = "apple,s8000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x100f0000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_aop_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 42&gt;;</div><div class='add'>+			apple,npins = &lt;42&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@210200000 {</div><div class='add'>+			compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x10200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2102b0000 {</div><div class='add'>+			compatible = "apple,s8000-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x102b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A9 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "s800-0-3-pmgr.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The A9 was made by two separate fabs on two different process</div><div class='add'>+ * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made</div><div class='add'>+ * the S8003 (APL1022) on 16nm. There are some minor differences</div><div class='add'>+ * such as timing in cpufreq state transistions.</div><div class='add'>+ */</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000-j71s.dts b/arch/arm64/boot/dts/apple/s8000-j71s.dts<br/>new file mode 100644<br/>index 000000000000..b5a2dfa1121e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000-j71s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000-j71s.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 5 (Wi-Fi) (Samsung), J71s, iPad6,11 (A1822)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8000.dtsi"</div><div class='add'>+#include "s800x-ipad5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j71s", "apple,s8000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 5 (Wi-Fi) (Samsung)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000-j72s.dts b/arch/arm64/boot/dts/apple/s8000-j72s.dts<br/>new file mode 100644<br/>index 000000000000..8f3dea5adb09<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000-j72s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000-j72s.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 5 (Cellular) (Samsung), J72s, iPad6,12 (A1823)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8000.dtsi"</div><div class='add'>+#include "s800x-ipad5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j72s", "apple,s8000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 5 (Cellular) (Samsung)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000-n66.dts b/arch/arm64/boot/dts/apple/s8000-n66.dts<br/>new file mode 100644<br/>index 000000000000..30b4b6630b60<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000-n66.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000-n66.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s Plus (Samsung), N66, iPhone8,2 (A1634/A1687/A1690/A1699)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8000.dtsi"</div><div class='add'>+#include "s800x-6s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n66", "apple,s8000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6s Plus (Samsung)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000-n69u.dts b/arch/arm64/boot/dts/apple/s8000-n69u.dts<br/>new file mode 100644<br/>index 000000000000..e63bc2e7f7c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000-n69u.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000-n69u.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone SE (Samsung), N69u, iPhone8,4 (A1662/A1723/A1724)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8000.dtsi"</div><div class='add'>+#include "s800x-se.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n69u", "apple,s8000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone SE (Samsung)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000-n71.dts b/arch/arm64/boot/dts/apple/s8000-n71.dts<br/>new file mode 100644<br/>index 000000000000..f2964a1fc434<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000-n71.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000-n71.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s (Samsung), N71, iPhone8,1 (A1633/A1688/A1691/A1700)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8000.dtsi"</div><div class='add'>+#include "s800x-6s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n71", "apple,s8000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6s (Samsung)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8000.dtsi b/arch/arm64/boot/dts/apple/s8000.dtsi<br/>new file mode 100644<br/>index 000000000000..72322f5677ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8000.dtsi</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple S8000 "A9" (Samsung) SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H8P, "Maui"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s800-0-3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	twister_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;650&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;75000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;27000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;912000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;32000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;35000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;58000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1844000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;58000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The A9 was made by two separate fabs on two different process</div><div class='add'>+ * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made</div><div class='add'>+ * the S8003 (APL1022) on 16nm. There are some minor differences</div><div class='add'>+ * such as timing in cpufreq state transistions.</div><div class='add'>+ */</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-common.dtsi b/arch/arm64/boot/dts/apple/s8001-common.dtsi<br/>new file mode 100644<br/>index 000000000000..91b06e113894<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (9.7-inch), iPad Pro (12.9-inch)</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A9X devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J127, J128, J98a, J99a</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0 &amp;ps_dp0&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-j127.dts b/arch/arm64/boot/dts/apple/s8001-j127.dts<br/>new file mode 100644<br/>index 000000000000..8b522085cb3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-j127.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-j127.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (9.7-inch) (Wi-Fi), J127, iPad6,3 (A1673)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8001-pro.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j127", "apple,s8001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro (9.7-inch) (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-j128.dts b/arch/arm64/boot/dts/apple/s8001-j128.dts<br/>new file mode 100644<br/>index 000000000000..cdd3d06dcbf1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-j128.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-j128.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (9.7-inch) (Cellular), J128, iPad6,4 (A1674/A1675)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8001-pro.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j128", "apple,s8001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro (9.7-inch) (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi b/arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi<br/>new file mode 100644<br/>index 000000000000..e66a4c1c138f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (12.9-inch)</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to iPad Pro (12.9-inch).</div><div class='add'>+ *</div><div class='add'>+ * target-type: J98a, J99a</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs4 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs5 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs6 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs7 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-j98a.dts b/arch/arm64/boot/dts/apple/s8001-j98a.dts<br/>new file mode 100644<br/>index 000000000000..162eca05c2d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-j98a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-j98a.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (12.9-inch) (Wi-Fi), J98a, iPad6,7 (A1584)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8001-pro.dtsi"</div><div class='add'>+#include "s8001-j98a-j99a.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j98a", "apple,s8001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro (12.9-inch) (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-j99a.dts b/arch/arm64/boot/dts/apple/s8001-j99a.dts<br/>new file mode 100644<br/>index 000000000000..7b765820c69e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-j99a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-j99a.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (12.9-inch) (Cellular), J99a, iPad6,8 (A1652)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8001-pro.dtsi"</div><div class='add'>+#include "s8001-j98a-j99a.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j99a", "apple,s8001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro (12.9-inch) (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-pmgr.dtsi b/arch/arm64/boot/dts/apple/s8001-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..859ab77ae92b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,822 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple S8001 "A9X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80148 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80150 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@80110 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80118 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@80140 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80160 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80168 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80170 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80178 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80180 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@80188 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@80190 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@80198 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80158 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@80128 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens0: power-controller@80130 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens1: power-controller@80138 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80120 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80278 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@80280 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@80288 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@80298 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host2: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host2";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_rtmux: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "rtmux";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1mux: power-controller@802e8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1mux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp1mux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@80200 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@80208 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@80210 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aes0: power-controller@80218 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aes0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80230 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80238 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80240 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80248 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80250 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs4: power-controller@80258 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs5: power-controller@80260 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs6: power-controller@80268 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs6";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs7: power-controller@80270 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs7";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@80290 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@802c0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp0: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp1: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp1";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dpa0: power-controller@80220 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dpa0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dpa1: power-controller@80228 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dpa1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@80308 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp: power-controller@80300 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@80318 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@80310 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc: power-controller@80340 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80340 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@80348 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80348 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_srs: power-controller@80390 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80390 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "srs";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@80350 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80350 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link0: power-controller@80358 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80358 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link0";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link1: power-controller@80360 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80360 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link1";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link2: power-controller@80368 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80368 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link2";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link3: power-controller@80370 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80370 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link3";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link4: power-controller@80378 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80378 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link4";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_link5: power-controller@80380 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80380 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_link5";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec: power-controller@80330 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@80388 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80388 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@80320 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@80328 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on*/</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe: power-controller@88000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88010 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_aop: power-controller@80000 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop_cpu &amp;ps_aop_filter &amp;ps_aop_busif&gt;;</div><div class='add'>+		apple,always-on; /* Always on processor */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80008 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_gpio: power-controller@80010 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_cpu: power-controller@80040 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_filter: power-controller@80048 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80048 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_filter";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_busif: power-controller@80050 {</div><div class='add'>+		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_busif";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001-pro.dtsi b/arch/arm64/boot/dts/apple/s8001-pro.dtsi<br/>new file mode 100644<br/>index 000000000000..1fce5a7c4200<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001-pro.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001-pro.dtsi</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro (1st generation) common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s8001.dtsi"</div><div class='add'>+#include "s8001-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 122 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 123 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/apple/s8001.dtsi<br/>new file mode 100644<br/>index 000000000000..b5b00dca6ffa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8001.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8001.dtsi</a></div><div class='hunk'>@@ -0,0 +1,303 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple S8001 "A9X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H8G, "Elba"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,twister";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;twister_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,twister";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;twister_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x300000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	twister_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;800&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;53000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;792000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;18000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1080000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;21000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1440000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;25000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;33000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2160000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2160000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202220000 {</div><div class='add'>+			compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02220000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 218 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 233 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 234 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,s8000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 235 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,s8000-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@20f100000 {</div><div class='add'>+			compatible = "apple,s8000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0f100000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 219&gt;;</div><div class='add'>+			apple,npins = &lt;219&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(165, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(164, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(178, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(177, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(132, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(131, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(115, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(114, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2100f0000 {</div><div class='add'>+			compatible = "apple,s8000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x100f0000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_aop_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 28&gt;;</div><div class='add'>+			apple,npins = &lt;28&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 134 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@210200000 {</div><div class='add'>+			compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x10200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2102b0000 {</div><div class='add'>+			compatible = "apple,s8000-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x102b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A9X doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "s8001-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003-j71t.dts b/arch/arm64/boot/dts/apple/s8003-j71t.dts<br/>new file mode 100644<br/>index 000000000000..0d906ae80b07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003-j71t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003-j71t.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 5 (Wi-Fi) (TSMC), J71t, iPad6,11 (A1822)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8003.dtsi"</div><div class='add'>+#include "s800x-ipad5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j71t", "apple,s8003", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 5 (Wi-Fi) (TSMC)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003-j72t.dts b/arch/arm64/boot/dts/apple/s8003-j72t.dts<br/>new file mode 100644<br/>index 000000000000..0cd7d88e9dfb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003-j72t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003-j72t.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 5 (Cellular) (TSMC), J72t, iPad6,12 (A1823)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8003.dtsi"</div><div class='add'>+#include "s800x-ipad5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j72t", "apple,s8003", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 5 (Cellular) (TSMC)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003-n66m.dts b/arch/arm64/boot/dts/apple/s8003-n66m.dts<br/>new file mode 100644<br/>index 000000000000..4146cd28160d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003-n66m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003-n66m.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s Plus (TSMC), N66m, iPhone8,2 (A1634/A1687/A1690/A1699)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8003.dtsi"</div><div class='add'>+#include "s800x-6s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n66m", "apple,s8003", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6s Plus (TSMC)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003-n69.dts b/arch/arm64/boot/dts/apple/s8003-n69.dts<br/>new file mode 100644<br/>index 000000000000..8eed879b155e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003-n69.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003-n69.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone SE (TSMC), N69, iPhone8,4 (A1662/A1723/A1724)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8003.dtsi"</div><div class='add'>+#include "s800x-se.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n69", "apple,s8003", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone SE (TSMC)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003-n71m.dts b/arch/arm64/boot/dts/apple/s8003-n71m.dts<br/>new file mode 100644<br/>index 000000000000..7ec6d2cda0bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003-n71m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003-n71m.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s (TSMC), N71m, iPhone8,1 (A1633/A1688/A1691/A1700)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "s8003.dtsi"</div><div class='add'>+#include "s800x-6s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n71m", "apple,s8003", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6s (TSMC)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s8003.dtsi b/arch/arm64/boot/dts/apple/s8003.dtsi<br/>new file mode 100644<br/>index 000000000000..79df5c783260<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s8003.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s8003.dtsi</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple S8003 "A9" (TSMC) SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H8P, "Malta"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s800-0-3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	twister_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;22000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;912000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;25000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;28000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;35000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;38000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1844000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;38000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The A9 was made by two separate fabs on two different process</div><div class='add'>+ * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made</div><div class='add'>+ * the S8003 (APL1022) on 16nm. There are some minor differences</div><div class='add'>+ * such as timing in cpufreq state transistions.</div><div class='add'>+ */</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800x-6s.dtsi b/arch/arm64/boot/dts/apple/s800x-6s.dtsi<br/>new file mode 100644<br/>index 000000000000..1dcf80cc2920<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800x-6s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800x-6s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6s / 6S Plus common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s800-0-3-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 96 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 97 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 67 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 66 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi b/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi<br/>new file mode 100644<br/>index 000000000000..c1701e81f0c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800x-ipad5.dtsi</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 5 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s800-0-3-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 96 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 97 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 144 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/s800x-se.dtsi b/arch/arm64/boot/dts/apple/s800x-se.dtsi<br/>new file mode 100644<br/>index 000000000000..deb7c7cc90f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/s800x-se.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/s800x-se.dtsi</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone SE common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "s800-0-3-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 96 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 97 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 67 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 66 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/spi1-nvram.dtsi b/arch/arm64/boot/dts/apple/spi1-nvram.dtsi<br/>new file mode 100644<br/>index 000000000000..9740fbf200f0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/spi1-nvram.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/spi1-nvram.dtsi</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+//</div><div class='add'>+// Devicetree include for common spi-nor nvram flash.</div><div class='add'>+//</div><div class='add'>+// Apple uses a consistent configiguration for the nvram on all known M1* and</div><div class='add'>+// M2* devices.</div><div class='add'>+//</div><div class='add'>+// Copyright The Asahi Linux Contributors</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		nvram = &amp;nvram;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			nvram: partition@700000 {</div><div class='add'>+				label = "nvram";</div><div class='add'>+				/* To be filled by the loader */</div><div class='add'>+				reg = &lt;0x0 0x0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6000-j314s.dts b/arch/arm64/boot/dts/apple/t6000-j314s.dts<br/>index c9e192848fe3..1430b91ff1b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000-j314s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000-j314s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000-j314s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6000-j314s.dts</a></div><div class='hunk'>@@ -16,3 +16,11 @@</div><div class='ctx'> 	compatible = "apple,j314s", "apple,t6000", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (14-inch, M1 Pro, 2021)";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,maldives";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,maldives";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6000-j316s.dts b/arch/arm64/boot/dts/apple/t6000-j316s.dts<br/>index ff1803ce2300..da0cbe7d9673 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000-j316s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000-j316s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000-j316s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6000-j316s.dts</a></div><div class='hunk'>@@ -16,3 +16,11 @@</div><div class='ctx'> 	compatible = "apple,j316s", "apple,t6000", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (16-inch, M1 Pro, 2021)";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,madagascar";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,madagascar";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6000.dtsi b/arch/arm64/boot/dts/apple/t6000.dtsi<br/>index 89c3b211b116..0ad77c98073f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6000.dtsi</a></div><div class='hunk'>@@ -16,3 +16,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;pmgr_south;</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g13s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6001-j314c.dts b/arch/arm64/boot/dts/apple/t6001-j314c.dts<br/>index 1761d15b98c1..c37097dcfdb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j314c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j314c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j314c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6001-j314c.dts</a></div><div class='hunk'>@@ -16,3 +16,11 @@</div><div class='ctx'> 	compatible = "apple,j314c", "apple,t6001", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (14-inch, M1 Max, 2021)";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,maldives";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,maldives";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6001-j316c.dts b/arch/arm64/boot/dts/apple/t6001-j316c.dts<br/>index 750e9beeffc0..3bc6e0c3294c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j316c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j316c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j316c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6001-j316c.dts</a></div><div class='hunk'>@@ -16,3 +16,11 @@</div><div class='ctx'> 	compatible = "apple,j316c", "apple,t6001", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (16-inch, M1 Max, 2021)";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,madagascar";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,madagascar";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6001-j375c.dts b/arch/arm64/boot/dts/apple/t6001-j375c.dts<br/>index 62ea437b58b2..2e7c23714d4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j375c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001-j375c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001-j375c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6001-j375c.dts</a></div><div class='hunk'>@@ -16,3 +16,11 @@</div><div class='ctx'> 	compatible = "apple,j375c", "apple,t6001", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple Mac Studio (M1 Max, 2022)";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,okinawa";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,okinawa";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/apple/t6001.dtsi<br/>index 620b17e4031f..ffbe823b71bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6001.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6001.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6001.dtsi</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "multi-die-cpp.h"</div><div class='ctx'> </div><div class='hunk'>@@ -61,3 +62,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g13c", "apple,agx-g13s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6002-j375d.dts b/arch/arm64/boot/dts/apple/t6002-j375d.dts<br/>index 3365429bdc8b..2b7f80119618 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6002-j375d.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6002-j375d.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6002-j375d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6002-j375d.dts</a></div><div class='hunk'>@@ -38,6 +38,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,okinawa";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,okinawa";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* delete unused always-on power-domains on die 1 */</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;ps_atc2_usb_aon_die1;</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6002.dtsi b/arch/arm64/boot/dts/apple/t6002.dtsi<br/>index a963a5011799..8fb648836b53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6002.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t6002.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6002.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6002.dtsi</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "multi-die-cpp.h"</div><div class='ctx'> </div><div class='hunk'>@@ -299,3 +300,7 @@</div><div class='ctx'> 	// On t6002, the die0 GPU power domain needs both AFR power domains</div><div class='ctx'> 	power-domains = &lt;&amp;ps_afr&gt;, &lt;&amp;ps_afr_die1&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g13d", "apple,agx-g13s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/dts/apple/t600x-common.dtsi<br/>index fa8ead699363..e20234ef2135 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t600x-common.dtsi</a></div><div class='hunk'>@@ -11,6 +11,10 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		gpu = &amp;gpu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -362,6 +366,13 @@</div><div class='ctx'> 		clock-output-names = "clkref";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk_200m: clock-200m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+		clock-output-names = "clk_200m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is a fabulated representation of the input clock</div><div class='ctx'> 	 * to NCO since we don't know the true clock tree.</div><div class='hunk'>@@ -371,4 +382,34 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "nco_ref";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpu_globals: globals {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_a: hw-cal-a {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_b: hw-cal-b {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_handoff: uat-handoff {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_pagetables: uat-pagetables {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_ttbs: uat-ttbs {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dts/apple/t600x-die0.dtsi<br/>index b1c875e692c8..3603b276a2ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-die0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-die0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-die0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t600x-die0.dtsi</a></div><div class='hunk'>@@ -24,6 +24,41 @@</div><div class='ctx'> 		power-domains = &lt;&amp;ps_aic&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	smc: smc@290400000 {</div><div class='add'>+		compatible = "apple,t6000-smc", "apple,smc";</div><div class='add'>+		reg = &lt;0x2 0x90400000 0x0 0x4000&gt;,</div><div class='add'>+			&lt;0x2 0x91e00000 0x0 0x100000&gt;;</div><div class='add'>+		reg-names = "smc", "sram";</div><div class='add'>+		mboxes = &lt;&amp;smc_mbox&gt;;</div><div class='add'>+</div><div class='add'>+		smc_gpio: gpio {</div><div class='add'>+			compatible = "apple,smc-gpio";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc_reboot: reboot {</div><div class='add'>+			compatible = "apple,smc-reboot";</div><div class='add'>+			nvmem-cells = &lt;&amp;shutdown_flag&gt;, &lt;&amp;boot_stage&gt;,</div><div class='add'>+				&lt;&amp;boot_error_count&gt;, &lt;&amp;panic_count&gt;;</div><div class='add'>+			nvmem-cell-names = "shutdown_flag", "boot_stage",</div><div class='add'>+				"boot_error_count", "panic_count";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smc_mbox: mbox@290408000 {</div><div class='add'>+		compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+		reg = &lt;0x2 0x90408000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 754 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 755 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 756 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 757 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+			"recv-empty", "recv-not-empty";</div><div class='add'>+		#mbox-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_smc: pinctrl@290820000 {</div><div class='ctx'> 		compatible = "apple,t6000-pinctrl", "apple,pinctrl";</div><div class='ctx'> 		reg = &lt;0x2 0x90820000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -45,6 +80,63 @@</div><div class='ctx'> 				&lt;AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	nub_spmi0: spmi@2920a1300 {</div><div class='add'>+		compatible = "apple,t6000-spmi", "apple,spmi";</div><div class='add'>+		reg = &lt;0x2 0x920a1300 0x0 0x100&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmic1: pmic@f {</div><div class='add'>+			compatible = "apple,maverick-pmic", "apple,spmi-nvmem";</div><div class='add'>+			reg = &lt;0xf SPMI_USID&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-layout {</div><div class='add'>+				compatible = "fixed-layout";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				pm_setting: pm-setting@1405 {</div><div class='add'>+					reg = &lt;0x1405 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rtc_offset: rtc-offset@1411 {</div><div class='add'>+					reg = &lt;0x1411 0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_stage: boot-stage@6001 {</div><div class='add'>+					reg = &lt;0x6001 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_error_count: boot-error-count@6002,0 {</div><div class='add'>+					reg = &lt;0x6002 0x1&gt;;</div><div class='add'>+					bits = &lt;0 4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				panic_count: panic-count@6002,4 {</div><div class='add'>+					reg = &lt;0x6002 0x1&gt;;</div><div class='add'>+					bits = &lt;4 4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_error_stage: boot-error-stage@6003 {</div><div class='add'>+					reg = &lt;0x6003 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				shutdown_flag: shutdown-flag@600f,3 {</div><div class='add'>+					reg = &lt;0x600f 0x1&gt;;</div><div class='add'>+					bits = &lt;3 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				fault_shadow: fault-shadow@867b {</div><div class='add'>+					reg = &lt;0x867b 0x10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				socd: socd@8b00 {</div><div class='add'>+					reg = &lt;0x8b00 0x400&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wdt: watchdog@2922b0000 {</div><div class='ctx'> 		compatible = "apple,t6000-wdt", "apple,wdt";</div><div class='ctx'> 		reg = &lt;0x2 0x922b0000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -163,6 +255,34 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spi1: spi@39b104000 {</div><div class='add'>+		compatible = "apple,t6000-spi", "apple,spi";</div><div class='add'>+		reg = &lt;0x3 0x9b104000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_200m&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_spi1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3: spi@39b10c000 {</div><div class='add'>+		compatible = "apple,t6000-spi", "apple,spi";</div><div class='add'>+		reg = &lt;0x3 0x9b10c000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi3_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_spi3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	serial0: serial@39b200000 {</div><div class='ctx'> 		compatible = "apple,s5l-uart";</div><div class='ctx'> 		reg = &lt;0x3 0x9b200000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -217,6 +337,34 @@</div><div class='ctx'> 		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpu: gpu@406400000 {</div><div class='add'>+		compatible = "apple,agx-g13s";</div><div class='add'>+		reg = &lt;0x4 0x6400000 0 0x40000&gt;,</div><div class='add'>+			&lt;0x4 0x4000000 0 0x1000000&gt;;</div><div class='add'>+		reg-names = "asc", "sgx";</div><div class='add'>+		mboxes = &lt;&amp;agx_mbox&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_gfx&gt;;</div><div class='add'>+		memory-region = &lt;&amp;uat_ttbs&gt;, &lt;&amp;uat_pagetables&gt;, &lt;&amp;uat_handoff&gt;,</div><div class='add'>+				&lt;&amp;gpu_hw_cal_a&gt;, &lt;&amp;gpu_hw_cal_b&gt;, &lt;&amp;gpu_globals&gt;;</div><div class='add'>+		memory-region-names = "ttbs", "pagetables", "handoff",</div><div class='add'>+				      "hw-cal-a", "hw-cal-b", "globals";</div><div class='add'>+</div><div class='add'>+		apple,firmware-abi = &lt;0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	agx_mbox: mbox@406408000 {</div><div class='add'>+		compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+		reg = &lt;0x4 0x6408000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1059 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1060 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1061 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1062 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+			"recv-empty", "recv-not-empty";</div><div class='add'>+		#mbox-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie0_dart_0: iommu@581008000 {</div><div class='ctx'> 		compatible = "apple,t6000-dart";</div><div class='ctx'> 		reg = &lt;0x5 0x81008000 0x0 0x4000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi<br/>index b31f1a7a2b3f..1a994c3c1b79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi</a></div><div class='hunk'>@@ -36,6 +36,20 @@</div><div class='ctx'> 			&lt;APPLE_PINMUX(101, 1)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spi1_pins: spi1-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(10, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(11, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(32, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(33, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_pins: spi3-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(52, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(53, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(54, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(55, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie_pins: pcie-pins {</div><div class='ctx'> 		pinmux = &lt;APPLE_PINMUX(0, 1)&gt;,</div><div class='ctx'> 				&lt;APPLE_PINMUX(1, 1)&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi<br/>index 2e471dfe43cf..c0aac59a6fae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		bluetooth0 = &amp;bluetooth0;</div><div class='ctx'> 		serial0 = &amp;serial0;</div><div class='ctx'> 		wifi0 = &amp;wifi0;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -99,9 +100,18 @@</div><div class='ctx'> 	/* WLAN */</div><div class='ctx'> 	bus-range = &lt;1 1&gt;;</div><div class='ctx'> 	wifi0: wifi@0,0 {</div><div class='add'>+		compatible = "pci14e4,4433";</div><div class='ctx'> 		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 		/* To be filled by the loader */</div><div class='ctx'> 		local-mac-address = [00 10 18 00 00 10];</div><div class='add'>+		apple,antenna-sku = "XX";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bluetooth0: bluetooth@0,1 {</div><div class='add'>+		compatible = "pci14e4,5f71";</div><div class='add'>+		reg = &lt;0x10100 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+		/* To be filled by the loader */</div><div class='add'>+		local-bd-address = [00 00 00 00 00 00];</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -119,3 +129,5 @@</div><div class='ctx'> &amp;fpwm0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "spi1-nvram.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t600x-j375.dtsi b/arch/arm64/boot/dts/apple/t600x-j375.dtsi<br/>index 1e5a19e49b08..c0fb93ae72f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-j375.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t600x-j375.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t600x-j375.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t600x-j375.dtsi</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		bluetooth0 = &amp;bluetooth0;</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='ctx'> 		serial0 = &amp;serial0;</div><div class='ctx'> 		wifi0 = &amp;wifi0;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -84,9 +86,18 @@</div><div class='ctx'> 	/* WLAN */</div><div class='ctx'> 	bus-range = &lt;1 1&gt;;</div><div class='ctx'> 	wifi0: wifi@0,0 {</div><div class='add'>+		compatible = "pci14e4,4433";</div><div class='ctx'> 		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 		/* To be filled by the loader */</div><div class='ctx'> 		local-mac-address = [00 10 18 00 00 10];</div><div class='add'>+		apple,antenna-sku = "XX";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bluetooth0: bluetooth@0,1 {</div><div class='add'>+		compatible = "pci14e4,5f71";</div><div class='add'>+		reg = &lt;0x10100 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+		/* To be filled by the loader */</div><div class='add'>+		local-bd-address = [00 00 00 00 00 00];</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -126,3 +137,5 @@</div><div class='ctx'> &amp;pcie0_dart_3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "spi1-nvram.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6020-j414s.dts b/arch/arm64/boot/dts/apple/t6020-j414s.dts<br/>new file mode 100644<br/>index 000000000000..631c54c5f03d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6020-j414s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6020-j414s.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * MacBook Pro (14-inch, M2 Pro, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J414s</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6020.dtsi"</div><div class='add'>+#include "t602x-j414-j416.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j414s", "apple,t6020", "apple,arm-platform";</div><div class='add'>+	model = "Apple MacBook Pro (14-inch, M2 Pro, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,tokara";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,tokara";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6020-j416s.dts b/arch/arm64/boot/dts/apple/t6020-j416s.dts<br/>new file mode 100644<br/>index 000000000000..c277ed5889a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6020-j416s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6020-j416s.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * MacBook Pro (16-inch, M2 Pro, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J416s</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6020.dtsi"</div><div class='add'>+#include "t602x-j414-j416.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j416s", "apple,t6020", "apple,arm-platform";</div><div class='add'>+	model = "Apple MacBook Pro (16-inch, M2 Pro, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,amami";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,amami";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6020-j474s.dts b/arch/arm64/boot/dts/apple/t6020-j474s.dts<br/>new file mode 100644<br/>index 000000000000..7c7ad5b8ad18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6020-j474s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6020-j474s.dts</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac mini (M2 Pro, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J474s</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6020.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This model is very similar to M1 and M2 Mac Studio models so base it on those</div><div class='add'>+ * and remove the missing SDHCI controller.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t602x-j474-j475.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j474s", "apple,t6020", "apple,arm-platform";</div><div class='add'>+	model = "Apple Mac mini (M2 Pro, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PCIe devices */</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	compatible = "pci14e4,4434";</div><div class='add'>+	brcm,board-type = "apple,tasmania";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	compatible = "pci14e4,5f72";</div><div class='add'>+	brcm,board-type = "apple,tasmania";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * port01 is unused, remove the PCIe sdhci0 node from t600x-j375.dtsi and adjust</div><div class='add'>+ * the iommu-map.</div><div class='add'>+ */</div><div class='add'>+/delete-node/ &amp;sdhci0;</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	iommu-map = &lt;0x100 &amp;pcie0_dart_0 1 1&gt;,</div><div class='add'>+			&lt;0x200 &amp;pcie0_dart_2 1 1&gt;,</div><div class='add'>+			&lt;0x300 &amp;pcie0_dart_3 1 1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6020.dtsi b/arch/arm64/boot/dts/apple/t6020.dtsi<br/>new file mode 100644<br/>index 000000000000..bffa66a3ffff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6020.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6020.dtsi</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T6020 "M2 Pro" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H14J, "Rhodes Chop"</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* This chip is just a cut down version of t6021, so include it and disable the missing parts */</div><div class='add'>+</div><div class='add'>+#include "t6021.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,t6020", "apple,arm-platform";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;pmgr_south;</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g14s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6021-j414c.dts b/arch/arm64/boot/dts/apple/t6021-j414c.dts<br/>new file mode 100644<br/>index 000000000000..cdcf0740714d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6021-j414c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6021-j414c.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * MacBook Pro (14-inch, M2 Max, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J414c</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6021.dtsi"</div><div class='add'>+#include "t602x-j414-j416.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j414c", "apple,t6021", "apple,arm-platform";</div><div class='add'>+	model = "Apple MacBook Pro (14-inch, M2 Max, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,tokara";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,tokara";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6021-j416c.dts b/arch/arm64/boot/dts/apple/t6021-j416c.dts<br/>new file mode 100644<br/>index 000000000000..6d8146b94170<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6021-j416c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6021-j416c.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * MacBook Pro (16-inch, M2 Max, 2022)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J416c</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6021.dtsi"</div><div class='add'>+#include "t602x-j414-j416.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j416c", "apple,t6021", "apple,arm-platform";</div><div class='add'>+	model = "Apple MacBook Pro (16-inch, M2 Max, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	brcm,board-type = "apple,amami";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	brcm,board-type = "apple,amami";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6021-j475c.dts b/arch/arm64/boot/dts/apple/t6021-j475c.dts<br/>new file mode 100644<br/>index 000000000000..533e35774874<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6021-j475c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6021-j475c.dts</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac Studio (M2 Max, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J475c</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6021.dtsi"</div><div class='add'>+#include "t602x-j474-j475.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j475c", "apple,t6021", "apple,arm-platform";</div><div class='add'>+	model = "Apple Mac Studio (M2 Max, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	compatible = "pci14e4,4434";</div><div class='add'>+	brcm,board-type = "apple,canary";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	compatible = "pci14e4,5f72";</div><div class='add'>+	brcm,board-type = "apple,canary";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* enable PCIe port01 with SDHCI */</div><div class='add'>+&amp;port01 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_dart_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6021.dtsi b/arch/arm64/boot/dts/apple/t6021.dtsi<br/>new file mode 100644<br/>index 000000000000..62907ad6a546<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6021.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6021.dtsi</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T6021 "M2 Max" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H14J, "Rhodes"</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "multi-die-cpp.h"</div><div class='add'>+</div><div class='add'>+#include "t602x-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,t6021", "apple,arm-platform";</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+</div><div class='add'>+		// filled via templated includes at the end of the file</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DIE</div><div class='add'>+#define DIE_NO 0</div><div class='add'>+</div><div class='add'>+&amp;{/soc} {</div><div class='add'>+	#include "t602x-die0.dtsi"</div><div class='add'>+	#include "t602x-dieX.dtsi"</div><div class='add'>+	#include "t602x-nvme.dtsi"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t602x-gpio-pins.dtsi"</div><div class='add'>+#include "t602x-pmgr.dtsi"</div><div class='add'>+</div><div class='add'>+#undef DIE</div><div class='add'>+#undef DIE_NO</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;aic {</div><div class='add'>+	affinities {</div><div class='add'>+		e-core-pmu-affinity {</div><div class='add'>+			apple,fiq-index = &lt;AIC_CPU_PMU_E&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu_e00 &amp;cpu_e01 &amp;cpu_e02 &amp;cpu_e03&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		p-core-pmu-affinity {</div><div class='add'>+			apple,fiq-index = &lt;AIC_CPU_PMU_P&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu_p00 &amp;cpu_p01 &amp;cpu_p02 &amp;cpu_p03</div><div class='add'>+				&amp;cpu_p10 &amp;cpu_p11 &amp;cpu_p12 &amp;cpu_p13&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g14c", "apple,agx-g14s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6022-j180d.dts b/arch/arm64/boot/dts/apple/t6022-j180d.dts<br/>new file mode 100644<br/>index 000000000000..dca6bd167c22<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6022-j180d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6022-j180d.dts</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac Pro (M2 Ultra, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J180d</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6022.dtsi"</div><div class='add'>+#include "t6022-jxxxd.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j180d", "apple,t6022", "apple,arm-platform";</div><div class='add'>+	model = "Apple Mac Pro (M2 Ultra, 2023)";</div><div class='add'>+	aliases {</div><div class='add'>+		nvram = &amp;nvram;</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+			power-domains = &lt;&amp;ps_dispext0_cpu0_die1&gt;, &lt;&amp;ps_dptx_phy_ps_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@10000000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x100 0 0x2 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB Type C Rear */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	hpm2: usb-pd@3b {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3b&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hpm3: usb-pd@3c {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* hpm4 and hpm5 included from t6022-jxxxd.dtsi */</div><div class='add'>+</div><div class='add'>+	hpm6: usb-pd@3d {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hpm7: usb-pd@3e {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3e&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB Type C Front */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hpm0: usb-pd@38 {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;60 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hpm1: usb-pd@3f {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3f&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;60 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Delete unused PCIe nodes, the Mac Pro uses slightly different PCIe</div><div class='add'>+ * controllers with a single port connected to a PM40100 PCIe switch</div><div class='add'>+ */</div><div class='add'>+/delete-node/ &amp;pcie0;</div><div class='add'>+/delete-node/ &amp;pcie0_dart_0;</div><div class='add'>+/delete-node/ &amp;pcie0_dart_1;</div><div class='add'>+/delete-node/ &amp;pcie0_dart_2;</div><div class='add'>+/delete-node/ &amp;pcie0_dart_3;</div><div class='add'>+</div><div class='add'>+&amp;nco_clkref {</div><div class='add'>+	clock-frequency = &lt;1068000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "spi1-nvram.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6022-j475d.dts b/arch/arm64/boot/dts/apple/t6022-j475d.dts<br/>new file mode 100644<br/>index 000000000000..736594544f79<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6022-j475d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6022-j475d.dts</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac Studio (M2 Ultra, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J475d</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t6022.dtsi"</div><div class='add'>+#include "t602x-j474-j475.dtsi"</div><div class='add'>+#include "t6022-jxxxd.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j475d", "apple,t6022", "apple,arm-platform";</div><div class='add'>+	model = "Apple Mac Studio (M2 Ultra, 2023)";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_dispext0_cpu0_die1&gt;, &lt;&amp;ps_dptx_phy_ps_die1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* enable PCIe port01 with SDHCI */</div><div class='add'>+&amp;port01 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_dart_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	compatible = "pci14e4,4434";</div><div class='add'>+	brcm,board-type = "apple,canary";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	compatible = "pci14e4,5f72";</div><div class='add'>+	brcm,board-type = "apple,canary";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi b/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi<br/>new file mode 100644<br/>index 000000000000..4f7bf2ebfe39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac Pro (M2 Ultra, 2023) and Mac Studio (M2 Ultra, 2023)</div><div class='add'>+ *</div><div class='add'>+ * This file contains the parts common to J180 and J475 devices with t6022.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J180d / J475d</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* delete power-domains for missing disp0 / disp0_die1 */</div><div class='add'>+/delete-node/ &amp;ps_disp0_cpu0;</div><div class='add'>+/delete-node/ &amp;ps_disp0_fe;</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;ps_disp0_cpu0_die1;</div><div class='add'>+/delete-node/ &amp;ps_disp0_fe_die1;</div><div class='add'>+</div><div class='add'>+/* USB Type C */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/* front-right */</div><div class='add'>+	hpm4: usb-pd@39 {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* front-left */</div><div class='add'>+	hpm5: usb-pd@3a {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t6022.dtsi b/arch/arm64/boot/dts/apple/t6022.dtsi<br/>new file mode 100644<br/>index 000000000000..e73bf2f7510a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t6022.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t6022.dtsi</a></div><div class='hunk'>@@ -0,0 +1,349 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T6022 "M2 Ultra" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H14J, "Rhodes 2C"</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "multi-die-cpp.h"</div><div class='add'>+</div><div class='add'>+#include "t602x-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,t6022", "apple,arm-platform";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster3 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e10&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e11&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e12&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e13&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster4 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p20&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p21&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p22&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p23&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster5 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p30&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p31&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p32&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p33&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e10: cpu@800 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x800&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_3&gt;;</div><div class='add'>+			i-cache-size  = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e11: cpu@801 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x801&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_3&gt;;</div><div class='add'>+			i-cache-size  = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e12: cpu@802 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x802&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_3&gt;;</div><div class='add'>+			i-cache-size  = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e13: cpu@803 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x803&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_3&gt;;</div><div class='add'>+			i-cache-size  = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p20: cpu@10900 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10900&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_4&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p21: cpu@10901 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10901&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_4&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p22: cpu@10902 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10902&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_4&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p23: cpu@10903 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10903&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_4&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p30: cpu@10a00 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10a00&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_5&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p31: cpu@10a01 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10a01&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_5&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p32: cpu@10a02 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10a02&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_5&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p33: cpu@10a03 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10a03&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_5&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1_die1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_3: l2-cache-3 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_4: l2-cache-4 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_5: l2-cache-5 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	die0: soc@200000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x02 0x00000000 0x02 0x00000000 0x4 0x00000000&gt;,</div><div class='add'>+			 &lt;0x05 0x80000000 0x05 0x80000000 0x1 0x80000000&gt;,</div><div class='add'>+			 &lt;0x07 0x00000000 0x07 0x00000000 0xf 0x80000000&gt;,</div><div class='add'>+			 &lt;0x16 0x80000000 0x16 0x80000000 0x5 0x80000000&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		/* Required to get &gt;32-bit DMA via DARTs */</div><div class='add'>+		dma-ranges = &lt;0 0 0 0 0xffffffff 0xffffc000&gt;;</div><div class='add'>+</div><div class='add'>+		// filled via templated includes at the end of the file</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	die1: soc@2200000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x02 0x00000000 0x22 0x00000000 0x4 0x00000000&gt;,</div><div class='add'>+			 &lt;0x07 0x00000000 0x27 0x00000000 0xf 0x80000000&gt;,</div><div class='add'>+			 &lt;0x16 0x80000000 0x36 0x80000000 0x5 0x80000000&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		/* Required to get &gt;32-bit DMA via DARTs */</div><div class='add'>+		dma-ranges = &lt;0 0 0 0 0xffffffff 0xffffc000&gt;;</div><div class='add'>+</div><div class='add'>+		// filled via templated includes at the end of the file</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DIE</div><div class='add'>+#define DIE_NO 0</div><div class='add'>+</div><div class='add'>+&amp;die0 {</div><div class='add'>+	#include "t602x-die0.dtsi"</div><div class='add'>+	#include "t602x-dieX.dtsi"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t602x-pmgr.dtsi"</div><div class='add'>+#include "t602x-gpio-pins.dtsi"</div><div class='add'>+</div><div class='add'>+#undef DIE</div><div class='add'>+#undef DIE_NO</div><div class='add'>+</div><div class='add'>+#define DIE _die1</div><div class='add'>+#define DIE_NO 1</div><div class='add'>+</div><div class='add'>+&amp;die1 {</div><div class='add'>+	#include "t602x-dieX.dtsi"</div><div class='add'>+	#include "t602x-nvme.dtsi"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t602x-pmgr.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;ps_pmp_die1;</div><div class='add'>+</div><div class='add'>+#undef DIE</div><div class='add'>+#undef DIE_NO</div><div class='add'>+</div><div class='add'>+&amp;aic {</div><div class='add'>+	affinities {</div><div class='add'>+		e-core-pmu-affinity {</div><div class='add'>+			apple,fiq-index = &lt;AIC_CPU_PMU_E&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu_e00 &amp;cpu_e01 &amp;cpu_e02 &amp;cpu_e03</div><div class='add'>+				&amp;cpu_e10 &amp;cpu_e11 &amp;cpu_e12 &amp;cpu_e13&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		p-core-pmu-affinity {</div><div class='add'>+			apple,fiq-index = &lt;AIC_CPU_PMU_P&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu_p00 &amp;cpu_p01 &amp;cpu_p02 &amp;cpu_p03</div><div class='add'>+				&amp;cpu_p10 &amp;cpu_p11 &amp;cpu_p12 &amp;cpu_p13</div><div class='add'>+				&amp;cpu_p20 &amp;cpu_p21 &amp;cpu_p22 &amp;cpu_p23</div><div class='add'>+				&amp;cpu_p30 &amp;cpu_p31 &amp;cpu_p32 &amp;cpu_p33&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_gfx {</div><div class='add'>+	// On t6022, the die0 GPU power domain needs both AFR power domains</div><div class='add'>+	power-domains = &lt;&amp;ps_afr&gt;, &lt;&amp;ps_afr_die1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "apple,agx-g14d", "apple,agx-g14s";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-common.dtsi b/arch/arm64/boot/dts/apple/t602x-common.dtsi<br/>new file mode 100644<br/>index 000000000000..9c800a391e7e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,465 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Nodes common to all T602x family SoCs (M2 Pro/Max/Ultra)</div><div class='add'>+ *</div><div class='add'>+ * Other names: H14J, "Rhodes Chop", "Rhodes", "Rhodes 2C"</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpu = &amp;gpu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e00&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e01&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e02&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e03&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p00&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p01&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p02&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p03&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster2 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p10&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p11&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p12&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p13&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e00: cpu@0 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e01: cpu@1 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e02: cpu@2 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e03: cpu@3 {</div><div class='add'>+			compatible = "apple,blizzard";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* to be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;blizzard_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;756&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p00: cpu@10100 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10100&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p01: cpu@10101 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10101&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p02: cpu@10102 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10102&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p03: cpu@10103 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10103&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p10: cpu@10200 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10200&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_2&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p11: cpu@10201 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10201&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_2&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p12: cpu@10202 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10202&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_2&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p13: cpu@10203 {</div><div class='add'>+			compatible = "apple,avalanche";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0 0x10203&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_2&gt;;</div><div class='add'>+			i-cache-size = &lt;0x30000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;avalanche_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_0: l2-cache-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_1: l2-cache-1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_2: l2-cache-2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	 };</div><div class='add'>+</div><div class='add'>+	blizzard_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		/* pstate #1 is a dummy clone of #2 */</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;912000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;7700&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1284000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;25000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1752000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;33000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2004000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;38000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2256000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;44000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2424000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;48000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avalanche_opp: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;702000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;7400&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;948000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;18000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1188000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;21000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1452000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;24000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1704000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;28000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1968000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;31000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2208000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;33000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;45000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp09 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2568000000&gt;;</div><div class='add'>+			opp-level = &lt;9&gt;;</div><div class='add'>+			clock-latency-ns = &lt;47000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp10 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2724000000&gt;;</div><div class='add'>+			opp-level = &lt;10&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp11 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2868000000&gt;;</div><div class='add'>+			opp-level = &lt;11&gt;;</div><div class='add'>+			clock-latency-ns = &lt;52000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp12 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3000000000&gt;;</div><div class='add'>+			opp-level = &lt;12&gt;;</div><div class='add'>+			clock-latency-ns = &lt;57000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp13 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3132000000&gt;;</div><div class='add'>+			opp-level = &lt;13&gt;;</div><div class='add'>+			clock-latency-ns = &lt;60000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp14 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3264000000&gt;;</div><div class='add'>+			opp-level = &lt;14&gt;;</div><div class='add'>+			clock-latency-ns = &lt;64000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp15 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3360000000&gt;;</div><div class='add'>+			opp-level = &lt;15&gt;;</div><div class='add'>+			clock-latency-ns = &lt;64000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+		opp16 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3408000000&gt;;</div><div class='add'>+			opp-level = &lt;16&gt;;</div><div class='add'>+			clock-latency-ns = &lt;64000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+		opp17 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3504000000&gt;;</div><div class='add'>+			opp-level = &lt;17&gt;;</div><div class='add'>+			clock-latency-ns = &lt;64000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-e {</div><div class='add'>+		compatible = "apple,blizzard-pmu";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_FIQ 0 AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-p {</div><div class='add'>+		compatible = "apple,avalanche-pmu";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_FIQ 0 AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+		interrupts = &lt;AIC_FIQ 0 AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ 0 AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ 0 AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ 0 AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_200m: clock-200m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+		clock-output-names = "clk_200m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is a fabulated representation of the input clock</div><div class='add'>+	 * to NCO since we don't know the true clock tree.</div><div class='add'>+	 */</div><div class='add'>+	nco_clkref: clock-ref-nco {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "nco_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpu_globals: globals {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_a: hw-cal-a {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_b: hw-cal-b {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_handoff: uat-handoff {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_pagetables: uat-pagetables {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_ttbs: uat-ttbs {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-die0.dtsi b/arch/arm64/boot/dts/apple/t602x-die0.dtsi<br/>new file mode 100644<br/>index 000000000000..2e7d2bf08ddc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-die0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-die0.dtsi</a></div><div class='hunk'>@@ -0,0 +1,575 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Devices used on die 0 on the Apple T6022 "M2 Ultra" SoC and present on</div><div class='add'>+ * Apple T6020 / T6021 "M2 Pro" / "M2 Max".</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+	nco: clock-controller@28e03c000 {</div><div class='add'>+		compatible = "apple,t6020-nco", "apple,t8103-nco";</div><div class='add'>+		reg = &lt;0x2 0x8e03c000 0x0 0x14000&gt;;</div><div class='add'>+		clocks = &lt;&amp;nco_clkref&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aic: interrupt-controller@28e100000 {</div><div class='add'>+		compatible = "apple,t6020-aic", "apple,aic2";</div><div class='add'>+		#interrupt-cells = &lt;4&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0x2 0x8e100000 0x0 0xc000&gt;,</div><div class='add'>+			&lt;0x2 0x8e10c000 0x0 0x1000&gt;;</div><div class='add'>+		reg-names = "core", "event";</div><div class='add'>+		power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nub_spmi0: spmi@29e114000 {</div><div class='add'>+		compatible = "apple,t6020-spmi", "apple,t8103-spmi";</div><div class='add'>+		reg = &lt;0x2 0x9e114000 0x0 0x100&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmic1: pmic@f {</div><div class='add'>+			compatible = "apple,maverick-pmic", "apple,spmi-nvmem";</div><div class='add'>+			reg = &lt;0xb SPMI_USID&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-layout {</div><div class='add'>+				compatible = "fixed-layout";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				pm_setting: pm-setting@1405 {</div><div class='add'>+					reg = &lt;0x1405 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rtc_offset: rtc-offset@1411 {</div><div class='add'>+					reg = &lt;0x1411 0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_stage: boot-stage@6001 {</div><div class='add'>+					reg = &lt;0x6001 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_error_count: boot-error-count@6002,0 {</div><div class='add'>+					reg = &lt;0x6002 0x1&gt;;</div><div class='add'>+					bits = &lt;0 4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				panic_count: panic-count@6002,4 {</div><div class='add'>+					reg = &lt;0x6002 0x1&gt;;</div><div class='add'>+					bits = &lt;4 4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot_error_stage: boot-error-stage@6003 {</div><div class='add'>+					reg = &lt;0x6003 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				shutdown_flag: shutdown-flag@600f,3 {</div><div class='add'>+					reg = &lt;0x600f 0x1&gt;;</div><div class='add'>+					bits = &lt;3 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				fault_shadow: fault-shadow@867b {</div><div class='add'>+					reg = &lt;0x867b 0x10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				socd: socd@8b00 {</div><div class='add'>+					reg = &lt;0x8b00 0x400&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wdt: watchdog@29e2c4000 {</div><div class='add'>+		compatible = "apple,t6020-wdt", "apple,t8103-wdt";</div><div class='add'>+		reg = &lt;0x2 0x9e2c4000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 719 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smc_mbox: mbox@2a2408000 {</div><div class='add'>+		compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+		reg = &lt;0x2 0xa2408000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 862 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 863 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 864 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 865 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+			"recv-empty", "recv-not-empty";</div><div class='add'>+		#mbox-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smc: smc@2a2400000 {</div><div class='add'>+		compatible = "apple,t6020-smc", "apple,t8103-smc";</div><div class='add'>+		reg = &lt;0x2 0xa2400000 0x0 0x4000&gt;,</div><div class='add'>+			&lt;0x2 0xa3e00000 0x0 0x100000&gt;;</div><div class='add'>+		reg-names = "smc", "sram";</div><div class='add'>+		mboxes = &lt;&amp;smc_mbox&gt;;</div><div class='add'>+</div><div class='add'>+		smc_gpio: gpio {</div><div class='add'>+			compatible = "apple,smc-gpio";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc_reboot: reboot {</div><div class='add'>+			compatible = "apple,smc-reboot";</div><div class='add'>+			nvmem-cells = &lt;&amp;shutdown_flag&gt;, &lt;&amp;boot_stage&gt;,</div><div class='add'>+				&lt;&amp;boot_error_count&gt;, &lt;&amp;panic_count&gt;;</div><div class='add'>+			nvmem-cell-names = "shutdown_flag", "boot_stage",</div><div class='add'>+				"boot_error_count", "panic_count";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_smc: pinctrl@2a2820000 {</div><div class='add'>+		compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";</div><div class='add'>+		reg = &lt;0x2 0xa2820000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-ranges = &lt;&amp;pinctrl_smc 0 0 30&gt;;</div><div class='add'>+		apple,npins = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 851 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 852 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 853 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 854 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 855 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 856 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 857 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sio_dart: iommu@39b008000 {</div><div class='add'>+		compatible = "apple,t6020-dart", "apple,t8110-dart";</div><div class='add'>+		reg = &lt;0x3 0x9b008000 0x0 0x8000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_cpu&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpwm0: pwm@39b030000 {</div><div class='add'>+		compatible = "apple,t6020-fpwm", "apple,s5l-fpwm";</div><div class='add'>+		reg = &lt;0x3 0x9b030000 0x0 0x4000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_fpwm0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		#pwm-cells = &lt;2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0: i2c@39b040000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b040000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1219 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1: i2c@39b044000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b044000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1220 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2: i2c@39b048000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b048000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1221 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3: i2c@39b04c000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b04c000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4: i2c@39b050000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b050000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c4&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5: i2c@39b054000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b054000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c5&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6: i2c@39b054000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b054000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c6&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7: i2c@39b054000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b054000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1226 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c7_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c7&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8: i2c@39b054000 {</div><div class='add'>+		compatible = "apple,t6020-i2c", "apple,t8103-i2c";</div><div class='add'>+		reg = &lt;0x3 0x9b054000 0x0 0x4000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c8_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_i2c8&gt;;</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1: spi@39b104000 {</div><div class='add'>+		compatible = "apple,t6020-spi", "apple,t8103-spi";</div><div class='add'>+		reg = &lt;0x3 0x9b104000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_200m&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_spi1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2: spi@39b108000 {</div><div class='add'>+		compatible = "apple,t6020-spi", "apple,t8103-spi";</div><div class='add'>+		reg = &lt;0x3 0x9b108000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi2_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_spi2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4: spi@39b110000 {</div><div class='add'>+		compatible = "apple,t6020-spi", "apple,t8103-spi";</div><div class='add'>+		reg = &lt;0x3 0x9b110000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1209 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi4_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;ps_spi4&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial0: serial@39b200000 {</div><div class='add'>+		compatible = "apple,s5l-uart";</div><div class='add'>+		reg = &lt;0x3 0x9b200000 0x0 0x4000&gt;;</div><div class='add'>+		reg-io-width = &lt;4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: figure out the clocking properly, there may</div><div class='add'>+		 * be a third selectable clock.</div><div class='add'>+		 */</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+		clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+		power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	admac: dma-controller@39b400000 {</div><div class='add'>+		compatible = "apple,t6020-admac", "apple,t8103-admac";</div><div class='add'>+		reg = &lt;0x3 0x9b400000 0x0 0x34000&gt;;</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+		dma-channels = &lt;16&gt;;</div><div class='add'>+		interrupts-extended = &lt;0&gt;,</div><div class='add'>+				      &lt;&amp;aic AIC_IRQ 0 1218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				      &lt;0&gt;,</div><div class='add'>+				      &lt;0&gt;;</div><div class='add'>+		iommus = &lt;&amp;sio_dart 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_adma&gt;;</div><div class='add'>+		resets = &lt;&amp;ps_audio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mca: mca@39b600000 {</div><div class='add'>+		compatible = "apple,t6020-mca", "apple,t8103-mca";</div><div class='add'>+		reg = &lt;0x3 0x9b600000 0x0 0x10000&gt;,</div><div class='add'>+		      &lt;0x3 0x9b500000 0x0 0x20000&gt;;</div><div class='add'>+		clocks = &lt;&amp;nco 0&gt;, &lt;&amp;nco 1&gt;, &lt;&amp;nco 2&gt;, &lt;&amp;nco 3&gt;;</div><div class='add'>+		dmas = &lt;&amp;admac 0&gt;, &lt;&amp;admac 1&gt;, &lt;&amp;admac 2&gt;, &lt;&amp;admac 3&gt;,</div><div class='add'>+		       &lt;&amp;admac 4&gt;, &lt;&amp;admac 5&gt;, &lt;&amp;admac 6&gt;, &lt;&amp;admac 7&gt;,</div><div class='add'>+		       &lt;&amp;admac 8&gt;, &lt;&amp;admac 9&gt;, &lt;&amp;admac 10&gt;, &lt;&amp;admac 11&gt;,</div><div class='add'>+		       &lt;&amp;admac 12&gt;, &lt;&amp;admac 13&gt;, &lt;&amp;admac 14&gt;, &lt;&amp;admac 15&gt;;</div><div class='add'>+		dma-names = "tx0a", "rx0a", "tx0b", "rx0b",</div><div class='add'>+			    "tx1a", "rx1a", "tx1b", "rx1b",</div><div class='add'>+			    "tx2a", "rx2a", "tx2b", "rx2b",</div><div class='add'>+			    "tx3a", "rx3a", "tx3b", "rx3b";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_IRQ 0 1212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_IRQ 0 1213 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_IRQ 0 1214 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_audio_p&gt;, &lt;&amp;ps_mca0&gt;, &lt;&amp;ps_mca1&gt;,</div><div class='add'>+				&lt;&amp;ps_mca2&gt;, &lt;&amp;ps_mca3&gt;;</div><div class='add'>+		resets = &lt;&amp;ps_audio_p&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu: gpu@406400000 {</div><div class='add'>+		compatible = "apple,agx-g14s";</div><div class='add'>+		reg = &lt;0x4 0x6400000 0 0x40000&gt;,</div><div class='add'>+			&lt;0x4 0x4000000 0 0x1000000&gt;;</div><div class='add'>+		reg-names = "asc", "sgx";</div><div class='add'>+		mboxes = &lt;&amp;agx_mbox&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_gfx&gt;;</div><div class='add'>+		memory-region = &lt;&amp;uat_ttbs&gt;, &lt;&amp;uat_pagetables&gt;, &lt;&amp;uat_handoff&gt;,</div><div class='add'>+				&lt;&amp;gpu_hw_cal_a&gt;, &lt;&amp;gpu_hw_cal_b&gt;, &lt;&amp;gpu_globals&gt;;</div><div class='add'>+		memory-region-names = "ttbs", "pagetables", "handoff",</div><div class='add'>+				      "hw-cal-a", "hw-cal-b", "globals";</div><div class='add'>+</div><div class='add'>+		apple,firmware-abi = &lt;0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	agx_mbox: mbox@406408000 {</div><div class='add'>+		compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+		reg = &lt;0x4 0x6408000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ 0 1146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+			"recv-empty", "recv-not-empty";</div><div class='add'>+		#mbox-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0: pcie@580000000 {</div><div class='add'>+		compatible = "apple,t6020-pcie";</div><div class='add'>+		device_type = "pci";</div><div class='add'>+</div><div class='add'>+		reg = &lt;0x5 0x80000000 0x0 0x1000000&gt;,	/* config */</div><div class='add'>+			&lt;0x5 0x91000000 0x0 0x4000&gt;,	/* rc */</div><div class='add'>+			&lt;0x5 0x94008000 0x0 0x4000&gt;,	/* port0 */</div><div class='add'>+			&lt;0x5 0x95008000 0x0 0x4000&gt;,	/* port1 */</div><div class='add'>+			&lt;0x5 0x96008000 0x0 0x4000&gt;,	/* port2 */</div><div class='add'>+			&lt;0x5 0x97008000 0x0 0x4000&gt;,	/* port3 */</div><div class='add'>+			&lt;0x5 0x9e00c000 0x0 0x4000&gt;,	/* phy0 */</div><div class='add'>+			&lt;0x5 0x9e010000 0x0 0x4000&gt;,	/* phy1 */</div><div class='add'>+			&lt;0x5 0x9e014000 0x0 0x4000&gt;,	/* phy2 */</div><div class='add'>+			&lt;0x5 0x9e018000 0x0 0x4000&gt;;	/* phy3 */</div><div class='add'>+		reg-names = "config", "rc",</div><div class='add'>+			"port0", "port1", "port2", "port3",</div><div class='add'>+			"phy0", "phy1", "phy2", "phy3";</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 1344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 1348 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 0 1352 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		msi-controller;</div><div class='add'>+		msi-parent = &lt;&amp;pcie0&gt;;</div><div class='add'>+		msi-ranges = &lt;&amp;aic AIC_IRQ 0 1672 IRQ_TYPE_EDGE_RISING 32&gt;;</div><div class='add'>+</div><div class='add'>+		iommu-map = &lt;0x100 &amp;pcie0_dart_0 1 1&gt;,</div><div class='add'>+				&lt;0x200 &amp;pcie0_dart_1 1 1&gt;,</div><div class='add'>+				&lt;0x300 &amp;pcie0_dart_2 1 1&gt;,</div><div class='add'>+				&lt;0x400 &amp;pcie0_dart_3 1 1&gt;;</div><div class='add'>+		iommu-map-mask = &lt;0xff00&gt;;</div><div class='add'>+</div><div class='add'>+		bus-range = &lt;0 4&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000&gt;,</div><div class='add'>+				&lt;0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+		power-domains = &lt;&amp;ps_apcie_gp_sys&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		port00: pci@0,0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pinctrl_ap 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;port00 0 0 0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;port00 0 0 0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;port00 0 0 0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;port00 0 0 0 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port01: pci@1,0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x800 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pinctrl_ap 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;port01 0 0 0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;port01 0 0 0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;port01 0 0 0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;port01 0 0 0 3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port02: pci@2,0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x1000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pinctrl_ap 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;port02 0 0 0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;port02 0 0 0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;port02 0 0 0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;port02 0 0 0 3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port03: pci@3,0 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			reg = &lt;0x1800 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pinctrl_ap 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;port03 0 0 0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;port03 0 0 0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;port03 0 0 0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;port03 0 0 0 3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_dart_0: iommu@594000000 {</div><div class='add'>+		compatible = "apple,t6020-dart", "apple,t8110-dart";</div><div class='add'>+		reg = &lt;0x5 0x94000000 0x0 0x4000&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1341 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_apcie_gp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_dart_1: iommu@595000000 {</div><div class='add'>+		compatible = "apple,t6020-dart", "apple,t8110-dart";</div><div class='add'>+		reg = &lt;0x5 0x95000000 0x0 0x4000&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1345 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_apcie_gp_sys&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_dart_2: iommu@596000000 {</div><div class='add'>+		compatible = "apple,t6020-dart", "apple,t8110-dart";</div><div class='add'>+		reg = &lt;0x5 0x96000000 0x0 0x4000&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1349 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_apcie_gp_sys&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_dart_3: iommu@597000000 {</div><div class='add'>+		compatible = "apple,t6020-dart", "apple,t8110-dart";</div><div class='add'>+		reg = &lt;0x5 0x97000000 0x0 0x4000&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;ps_apcie_gp_sys&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-dieX.dtsi b/arch/arm64/boot/dts/apple/t602x-dieX.dtsi<br/>new file mode 100644<br/>index 000000000000..cb07fd82b32e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-dieX.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-dieX.dtsi</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Nodes present on both dies of T6022 (M2 Ultra) and present on M2 Pro/Max.</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+	DIE_NODE(cpufreq_e): cpufreq@210e20000 {</div><div class='add'>+		compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";</div><div class='add'>+		reg = &lt;0x2 0x10e20000 0 0x1000&gt;;</div><div class='add'>+		#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(cpufreq_p0): cpufreq@211e20000 {</div><div class='add'>+		compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";</div><div class='add'>+		reg = &lt;0x2 0x11e20000 0 0x1000&gt;;</div><div class='add'>+		#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(cpufreq_p1): cpufreq@212e20000 {</div><div class='add'>+		compatible = "apple,t6020-cluster-cpufreq", "apple,t8112-cluster-cpufreq";</div><div class='add'>+		reg = &lt;0x2 0x12e20000 0 0x1000&gt;;</div><div class='add'>+		#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pmgr): power-management@28e080000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x2 0x8e080000 0 0x8000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pmgr_south): power-management@28e680000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x2 0x8e680000 0 0x8000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pmgr_east): power-management@290280000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x2 0x90280000 0 0xc000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pinctrl_nub): pinctrl@29e1f0000 {</div><div class='add'>+		compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";</div><div class='add'>+		reg = &lt;0x2 0x9e1f0000 0x0 0x4000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_nub_gpio)&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-ranges = &lt;&amp;DIE_NODE(pinctrl_nub) 0 0 30&gt;;</div><div class='add'>+		apple,npins = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ DIE_NO 711 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 712 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 713 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 714 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 715 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 716 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 717 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pmgr_mini): power-management@29e280000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x2 0x9e280000 0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pinctrl_aop): pinctrl@2a6820000 {</div><div class='add'>+		compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";</div><div class='add'>+		reg = &lt;0x2 0xa6820000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-ranges = &lt;&amp;DIE_NODE(pinctrl_aop) 0 0 72&gt;;</div><div class='add'>+		apple,npins = &lt;72&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ DIE_NO 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 599 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 600 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 601 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 603 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 604 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pinctrl_ap): pinctrl@39b028000 {</div><div class='add'>+		compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl";</div><div class='add'>+		reg = &lt;0x3 0x9b028000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ DIE_NO 458 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 459 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 460 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 461 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 462 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 463 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ DIE_NO 464 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_gpio)&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-ranges = &lt;&amp;DIE_NODE(pinctrl_ap) 0 0 255&gt;;</div><div class='add'>+		apple,npins = &lt;255&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(pmgr_gfx): power-management@404e80000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		reg = &lt;0x4 0x4e80000 0 0x4000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi b/arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi<br/>new file mode 100644<br/>index 000000000000..e41b6475f792<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-gpio-pins.dtsi</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * GPIO pin mappings for Apple T602x SoCs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_ap {</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(63, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(64, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(65, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(66, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(67, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(68, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(69, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(70, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(71, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(72, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5_pins: i2c5-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(73, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(74, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6_pins: i2c6-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(75, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(76, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7_pins: i2c7-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(77, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(78, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8_pins: i2c8-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(79, 1)&gt;,</div><div class='add'>+			&lt;APPLE_PINMUX(80, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_pins: spi1-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(155, 1)&gt;, /* SDI */</div><div class='add'>+			&lt;APPLE_PINMUX(156, 1)&gt;,  /* SDO */</div><div class='add'>+			&lt;APPLE_PINMUX(157, 1)&gt;,  /* SCK */</div><div class='add'>+			&lt;APPLE_PINMUX(158, 1)&gt;;  /* CS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_pins: spi2-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(159, 1)&gt;, /* SDI */</div><div class='add'>+			&lt;APPLE_PINMUX(160, 1)&gt;,  /* SDO */</div><div class='add'>+			&lt;APPLE_PINMUX(161, 1)&gt;,  /* SCK */</div><div class='add'>+			&lt;APPLE_PINMUX(162, 1)&gt;;  /* CS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_pins: spi4-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(167, 1)&gt;, /* SDI */</div><div class='add'>+			&lt;APPLE_PINMUX(168, 1)&gt;,  /* SDO */</div><div class='add'>+			&lt;APPLE_PINMUX(169, 1)&gt;,  /* SCK */</div><div class='add'>+			&lt;APPLE_PINMUX(170, 1)&gt;;  /* CS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_pins: pcie-pins {</div><div class='add'>+		pinmux = &lt;APPLE_PINMUX(0, 1)&gt;,</div><div class='add'>+				&lt;APPLE_PINMUX(1, 1)&gt;,</div><div class='add'>+				&lt;APPLE_PINMUX(2, 1)&gt;,</div><div class='add'>+				&lt;APPLE_PINMUX(3, 1)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi b/arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi<br/>new file mode 100644<br/>index 000000000000..0e806d8ddf81<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-j414-j416.dtsi</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * MacBook Pro (14/16-inch, 2022)</div><div class='add'>+ *</div><div class='add'>+ * This file contains the parts common to J414 and J416 devices with both t6020 and t6021.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J414s / J414c / J416s / J416c</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These models are essentially identical to the previous generation, other than</div><div class='add'>+ * the GPIO indices.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t600x-j314-j316.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0_cpu0&gt;, &lt;&amp;ps_dptx_phy_ps&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm0 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm1 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm2 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm5 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi0 {</div><div class='add'>+	compatible = "pci14e4,4434";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth0 {</div><div class='add'>+	compatible = "pci14e4,5f72";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi b/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi<br/>new file mode 100644<br/>index 000000000000..ee12fea5b12c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-j474-j475.dtsi</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Mac mini (M2 Pro, 2023) and Mac Studio (2023)</div><div class='add'>+ *</div><div class='add'>+ * This file contains the parts common to J474 and J475 devices with t6020,</div><div class='add'>+ * t6021 and t6022.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J474s / J475c / J475d</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These models are very similar to the previous generation Mac Studio, other</div><div class='add'>+ * than GPIO indices.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t600x-j375.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_dispext0_cpu0&gt;, &lt;&amp;ps_dptx_phy_ps&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm0 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm1 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm2 {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hpm3  {</div><div class='add'>+	interrupts = &lt;44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-nvme.dtsi b/arch/arm64/boot/dts/apple/t602x-nvme.dtsi<br/>new file mode 100644<br/>index 000000000000..590cec8ac804<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-nvme.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-nvme.dtsi</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * NVMe related devices for Apple T602x SoCs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ans_mbox): mbox@347408000 {</div><div class='add'>+		compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+		reg = &lt;0x3 0x47408000 0x0 0x4000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupts = &lt;AIC_IRQ DIE_NO 1169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ DIE_NO 1170 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ DIE_NO 1171 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;AIC_IRQ DIE_NO 1172 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+			"recv-empty", "recv-not-empty";</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ans2)&gt;;</div><div class='add'>+		#mbox-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(sart): sart@34bc50000 {</div><div class='add'>+		compatible = "apple,t6020-sart", "apple,t6000-sart";</div><div class='add'>+		reg = &lt;0x3 0x4bc50000 0x0 0x10000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ans2)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(nvme): nvme@34bcc0000 {</div><div class='add'>+		compatible = "apple,t6020-nvme-ans2", "apple,t8103-nvme-ans2";</div><div class='add'>+		reg = &lt;0x3 0x4bcc0000 0x0 0x40000&gt;, &lt;0x3 0x47400000 0x0 0x4000&gt;;</div><div class='add'>+		reg-names = "nvme", "ans";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		/* The NVME interrupt is always routed to die 0 */</div><div class='add'>+		interrupts = &lt;AIC_IRQ 0 1832 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		mboxes = &lt;&amp;DIE_NODE(ans_mbox)&gt;;</div><div class='add'>+		apple,sart = &lt;&amp;DIE_NODE(sart)&gt;;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ans2)&gt;,</div><div class='add'>+			&lt;&amp;DIE_NODE(ps_apcie_st_sys)&gt;,</div><div class='add'>+			&lt;&amp;DIE_NODE(ps_apcie_st1_sys)&gt;;</div><div class='add'>+		power-domain-names = "ans", "apcie0", "apcie1";</div><div class='add'>+		resets = &lt;&amp;DIE_NODE(ps_ans2)&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t602x-pmgr.dtsi b/arch/arm64/boot/dts/apple/t602x-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..f5382a2faf0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t602x-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t602x-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,2265 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for Apple T602x "M2 Pro/Max/Ultra" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;DIE_NODE(pmgr) {</div><div class='add'>+	DIE_NODE(ps_afi): power-controller@100 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afi);</div><div class='add'>+		apple,always-on; /* Apple Fabric, CPU interface is here */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_aic): power-controller@108 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(aic);</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dwi): power-controller@110 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dwi);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pms): power-controller@118 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pms);</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_gpio): power-controller@120 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(gpio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;, &lt;&amp;DIE_NODE(ps_pms)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_soc_dpe): power-controller@128 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(soc_dpe);</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pms_c1ppt): power-controller@130 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pms_c1ppt);</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pmgr_soc_ocla): power-controller@138 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pmgr_soc_ocla);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc0): power-controller@168 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc0);</div><div class='add'>+		apple,always-on; /* Memory controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc2): power-controller@170 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc2);</div><div class='add'>+		apple,always-on; /* Memory controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_00): power-controller@178 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_00);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_01): power-controller@180 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_01);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_02): power-controller@188 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_02);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_03): power-controller@190 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_03);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_08): power-controller@198 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_08);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_09): power-controller@1a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_09);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_10): power-controller@1a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_10);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_11): power-controller@1b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_11);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc1_ioa): power-controller@1b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc1_ioa);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afc): power-controller@1d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afc);</div><div class='add'>+		apple,always-on; /* Apple Fabric, CPU interface is here */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc0_ioa): power-controller@1e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc0_ioa);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc1_ls): power-controller@1f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc1_ls);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc0_ls): power-controller@1f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc0_ls);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc1_lw0): power-controller@200 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc1_lw0);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc1_lw1): power-controller@208 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc1_lw1);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc1_lw2): power-controller@210 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc1_lw2);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc0_lw0): power-controller@218 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc0_lw0);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_scodec): power-controller@220 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(scodec);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_common): power-controller@228 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_common);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_common): power-controller@230 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_common);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_common): power-controller@238 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_common);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_common): power-controller@240 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_common);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext1_sys): power-controller@248 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext1_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc1_lw2)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pms_bridge): power-controller@250 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pms_bridge);</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext0_sys): power-controller@258 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext0_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_lw0)&gt;, &lt;&amp;DIE_NODE(ps_afr)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_sys): power-controller@260 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_avd_sys): power-controller@268 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(avd_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc0_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_cio): power-controller@270 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_cio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc0_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_pcie): power-controller@278 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc0_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_cio): power-controller@280 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_cio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc1_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_pcie): power-controller@288 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc1_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_cio): power-controller@290 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_cio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc2_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_pcie): power-controller@298 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc2_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_cio): power-controller@2a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_cio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc3_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_pcie): power-controller@2a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc3_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext1_fe): power-controller@2b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext1_fe);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext1_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext1_cpu0): power-controller@2b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext1_cpu0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext1_fe)&gt;;</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext0_fe): power-controller@2c0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext0_fe);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext0_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pmp): power-controller@2c8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pmp);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_pms_sram): power-controller@2d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(pms_sram);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext0_cpu0): power-controller@2d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext0_cpu0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext0_fe)&gt;;</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_cpu): power-controller@2e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_cpu);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_cio_pcie): power-controller@2e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_cio_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc0_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_cio_usb): power-controller@2f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_cio_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc0_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_cio_pcie): power-controller@2f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_cio_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc1_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_cio_usb): power-controller@300 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_cio_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc1_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_cio_pcie): power-controller@308 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_cio_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc2_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_cio_usb): power-controller@310 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_cio_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc2_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_cio_pcie): power-controller@318 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_cio_pcie);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc3_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_cio_usb): power-controller@320 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_cio_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc3_cio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_trace_fab): power-controller@390 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x390 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(trace_fab);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_sys_mpm): power-controller@4000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_sys_mpm);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_td): power-controller@4008 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_td);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_base): power-controller@4010 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_base);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_td)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_set1): power-controller@4018 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_set1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_base)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_set2): power-controller@4020 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_set2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_set1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_set3): power-controller@4028 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_set3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_set2)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ane_set4): power-controller@4030 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ane_set4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_ane_set3)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;DIE_NODE(pmgr_south) {</div><div class='add'>+	DIE_NODE(ps_amcc4): power-controller@100 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc4);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc5): power-controller@108 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc5);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc6): power-controller@110 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc6);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc7): power-controller@118 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc7);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_16): power-controller@120 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_16);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_17): power-controller@128 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_17);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_18): power-controller@130 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_18);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_19): power-controller@138 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_19);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_20): power-controller@140 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_20);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_21): power-controller@148 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_21);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_22): power-controller@150 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_22);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_23): power-controller@158 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_23);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_24): power-controller@160 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_24);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_25): power-controller@168 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_25);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_26): power-controller@170 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_26);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_27): power-controller@178 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_27);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_28): power-controller@180 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_28);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_29): power-controller@188 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_29);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_30): power-controller@190 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_30);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_31): power-controller@198 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_31);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc4_ioa): power-controller@1a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc4_ioa);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc4_ls): power-controller@1a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc4_ls);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc4_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc4_lw0): power-controller@1b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc4_lw0);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc4_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc5_ioa): power-controller@1b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc5_ioa);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc5_ls): power-controller@1c0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc5_ls);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc5_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc5_lw0): power-controller@1c8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc5_lw0);</div><div class='add'>+		apple,always-on; /* Apple Fabric */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc5_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext2_sys): power-controller@1d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext2_sys);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_msr1): power-controller@1d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(msr1);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext2_fe): power-controller@1e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext2_fe);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext2_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext2_cpu0): power-controller@1e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext2_cpu0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext2_fe)&gt;;</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_msr1_ase_core): power-controller@1f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(msr1_ase_core);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_msr1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext3_sys): power-controller@220 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext3_sys);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_sys): power-controller@228 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_sys);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext3_fe): power-controller@230 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext3_fe);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext3_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dispext3_cpu0): power-controller@238 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dispext3_cpu0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dispext3_fe)&gt;;</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_dma): power-controller@4000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_dma);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc1_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_pipe4): power-controller@4008 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_pipe4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc1_dma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_pipe5): power-controller@4010 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_pipe5);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc1_dma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_me0): power-controller@4018 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_me0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc1_pipe5)&gt;, &lt;&amp;DIE_NODE(ps_venc1_pipe4)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc1_me1): power-controller@4020 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc1_me1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc1_me0)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;DIE_NODE(pmgr_east) {</div><div class='add'>+	DIE_NODE(ps_clvr_spmi0): power-controller@100 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(clvr_spmi0);</div><div class='add'>+		apple,always-on; /* PCPU voltage regulator interface (used by SMC) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_clvr_spmi1): power-controller@108 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(clvr_spmi1);</div><div class='add'>+		apple,always-on; /* GPU voltage regulator interface (used by SMC) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_clvr_spmi2): power-controller@110 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(clvr_spmi2);</div><div class='add'>+		apple,always-on; /* ANE, fabric, AFR voltage regulator interface (used by SMC) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_clvr_spmi3): power-controller@118 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(clvr_spmi3);</div><div class='add'>+		apple,always-on; /* Additional voltage regulator, probably used on T6021 (SMC) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_clvr_spmi4): power-controller@120 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(clvr_spmi4);</div><div class='add'>+		apple,always-on; /* Additional voltage regulator, probably used on T6021 (SMC) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ispsens0): power-controller@128 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ispsens0);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ispsens1): power-controller@130 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ispsens1);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ispsens2): power-controller@138 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ispsens2);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ispsens3): power-controller@140 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ispsens3);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc6_ioa): power-controller@148 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc6_ioa);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc6_ls): power-controller@150 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc6_ls);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc6_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc6_lw0): power-controller@158 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc6_lw0);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc6_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc2_ioa): power-controller@160 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc2_ioa);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_dcs_10)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc2_ls): power-controller@168 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc2_ls);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc2_lw0): power-controller@170 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc2_lw0);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc2_lw1): power-controller@178 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc2_lw1);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc3_ioa): power-controller@180 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc3_ioa);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afi)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc3_ls): power-controller@188 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc3_ls);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc3_ioa)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afnc3_lw0): power-controller@190 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afnc3_lw0);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc3_ls)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_gp): power-controller@198 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_gp);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc6_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_st): power-controller@1a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_st);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc6_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_ans2): power-controller@1a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(ans2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc6_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_disp0_sys): power-controller@1b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(disp0_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_jpg): power-controller@1b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(jpg);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio): power-controller@1c0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_lw1)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_sys): power-controller@1c8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc2_lw1)&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_disp0_fe): power-controller@1d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(disp0_fe);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_disp0_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_disp0_cpu0): power-controller@1d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(disp0_cpu0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_disp0_fe)&gt;;</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio_cpu): power-controller@1e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio_cpu);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_fpwm0): power-controller@1e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(fpwm0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_fpwm1): power-controller@1f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(fpwm1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_fpwm2): power-controller@1f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x1f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(fpwm2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c0): power-controller@200 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c1): power-controller@208 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c2): power-controller@210 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c3): power-controller@218 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c4): power-controller@220 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c5): power-controller@228 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c5);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c6): power-controller@230 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c6);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c7): power-controller@238 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c7);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_i2c8): power-controller@240 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(i2c8);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi_p): power-controller@248 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi_p);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio_spmi0): power-controller@250 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio_spmi0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio_spmi1): power-controller@258 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio_spmi1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio_spmi2): power-controller@260 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio_spmi2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart_p): power-controller@268 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart_p);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_audio_p): power-controller@270 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(audio_p);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sio_adma): power-controller@278 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sio_adma);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;, &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_aes): power-controller@280 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(aes);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dptx_phy_ps): power-controller@288 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dptx_phy_ps);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_sio)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi0): power-controller@2d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi1): power-controller@2e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi2): power-controller@2e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi3): power-controller@2f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi4): power-controller@2f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x2f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_spi5): power-controller@300 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(spi5);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_spi_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart_n): power-controller@308 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart_n);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart0): power-controller@310 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc1): power-controller@318 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc1);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_amcc3): power-controller@320 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(amcc3);</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_04): power-controller@328 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_04);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_05): power-controller@330 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_05);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_06): power-controller@338 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x338 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_06);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_07): power-controller@340 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x340 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_07);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_12): power-controller@348 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x348 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_12);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_13): power-controller@350 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x350 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_13);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_14): power-controller@358 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x358 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_14);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dcs_15): power-controller@360 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x360 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dcs_15);</div><div class='add'>+		apple,always-on; /* LPDDR5 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart1): power-controller@368 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x368 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart2): power-controller@370 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x370 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart3): power-controller@378 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x378 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart4): power-controller@380 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x380 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart5): power-controller@388 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x388 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart5);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_uart6): power-controller@390 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x390 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(uart6);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_uart_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mca0): power-controller@398 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x398 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mca0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;, &lt;&amp;DIE_NODE(ps_sio_adma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mca1): power-controller@3a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mca1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;, &lt;&amp;DIE_NODE(ps_sio_adma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mca2): power-controller@3a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mca2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;, &lt;&amp;DIE_NODE(ps_sio_adma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mca3): power-controller@3b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mca3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;, &lt;&amp;DIE_NODE(ps_sio_adma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dpa0): power-controller@3b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dpa0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dpa1): power-controller@3c0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dpa1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dpa2): power-controller@3c8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dpa2);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dpa3): power-controller@3d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dpa3);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_msr0): power-controller@3d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(msr0);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_sys): power-controller@3e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_sys);</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dpa4): power-controller@3e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dpa4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_audio_p)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_msr0_ase_core): power-controller@3f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(msr0_ase_core);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_msr0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_gpshr_sys): power-controller@3f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x3f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_gpshr_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_apcie_gp)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_st_sys): power-controller@408 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x408 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_st_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_apcie_st)&gt;, &lt;&amp;DIE_NODE(ps_ans2)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_st1_sys): power-controller@410 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x410 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_st1_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_apcie_st_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_gp_sys): power-controller@418 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x418 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_gp_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_apcie_gpshr_sys)&gt;;</div><div class='add'>+		apple,always-on; /* Breaks things if shut down */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_ge_sys): power-controller@420 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x420 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_ge_sys);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_apcie_gpshr_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_apcie_phy_sw): power-controller@428 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x428 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(apcie_phy_sw);</div><div class='add'>+		apple,always-on; /* macOS does not turn this off */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_sep): power-controller@c00 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xc00 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(sep);</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* There is a dependency tree involved with these PDs,</div><div class='add'>+	 * but we do not express it here since the ISP driver</div><div class='add'>+	 * is supposed to sequence them in the right order anyway.</div><div class='add'>+	 *</div><div class='add'>+	 * This also works around spurious parent PD activation</div><div class='add'>+	 * on machines with ISP disabled (desktops), so we don't</div><div class='add'>+	 * have to enable/disable everything in the per-model DTs.</div><div class='add'>+	 */</div><div class='add'>+	DIE_NODE(ps_isp_cpu): power-controller@4000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_cpu);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_sys)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_fe): power-controller@4008 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_fe);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_sys)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_dprx): power-controller@4010 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(dprx);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_sys)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_vis): power-controller@4018 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_vis);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_fe)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_be): power-controller@4020 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_be);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_fe)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_raw): power-controller@4028 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_raw);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_fe)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_isp_clr): power-controller@4030 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x4030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(isp_clr);</div><div class='add'>+		/* power-domains = &lt;&amp;DIE_NODE(ps_isp_be)&gt;; */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_dma): power-controller@8000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x8000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_dma);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc_sys)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_pipe4): power-controller@8008 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x8008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_pipe4);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc_dma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_pipe5): power-controller@8010 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x8010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_pipe5);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc_dma)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_me0): power-controller@8018 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x8018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_me0);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc_pipe5)&gt;, &lt;&amp;DIE_NODE(ps_venc_pipe4)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_venc_me1): power-controller@8020 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x8020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(venc_me1);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_venc_me0)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_prores): power-controller@c000 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xc000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(prores);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afnc3_lw0)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;DIE_NODE(pmgr_mini) {</div><div class='add'>+	DIE_NODE(ps_debug): power-controller@58 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x58 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(debug);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_spmi0): power-controller@60 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x60 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_spmi0);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_spmi1): power-controller@68 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x68 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_spmi1);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_aon): power-controller@70 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x70 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_aon);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_msg): power-controller@78 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x78 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(msg);</div><div class='add'>+		apple,always-on; /* Core AON device? */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_gpio): power-controller@80 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_gpio);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_fabric): power-controller@88 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_fabric);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_usb_aon): power-controller@90 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x90 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_usb_aon);</div><div class='add'>+		apple,always-on; /* Needs to stay on for dwc3 to work */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_usb_aon): power-controller@98 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x98 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_usb_aon);</div><div class='add'>+		apple,always-on; /* Needs to stay on for dwc3 to work */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_usb_aon): power-controller@a0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xa0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_usb_aon);</div><div class='add'>+		apple,always-on; /* Needs to stay on for dwc3 to work */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_usb_aon): power-controller@a8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xa8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_usb_aon);</div><div class='add'>+		apple,always-on; /* Needs to stay on for dwc3 to work */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_fabric): power-controller@b0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xb0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_fabric);</div><div class='add'>+		apple,always-on;</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_nub_fabric)&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_nub_sram): power-controller@b8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xb8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(nub_sram);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_debug_switch): power-controller@c0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xc0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(debug_switch);</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc0_usb): power-controller@c8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xc8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc0_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc0_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc1_usb): power-controller@d0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xd0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc1_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc1_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc2_usb): power-controller@d8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xd8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc2_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc2_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_atc3_usb): power-controller@e0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xe0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(atc3_usb);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_atc3_common)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	/* MTP stuff is self-managed */</div><div class='add'>+	DIE_NODE(ps_mtp_gpio): power-controller@e8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xe8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_gpio);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_base): power-controller@f0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xf0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_base);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_periph): power-controller@f8 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0xf8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_periph);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_spi0): power-controller@100 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_spi0);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_i2cm0): power-controller@108 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_i2cm0);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_uart0): power-controller@110 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_uart0);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_cpu): power-controller@118 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_cpu);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_fabric)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_scm_fabric): power-controller@120 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_scm_fabric);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_periph)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_sram): power-controller@128 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_sram);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_scm_fabric)&gt;, &lt;&amp;DIE_NODE(ps_mtp_cpu)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_mtp_dma): power-controller@130 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(mtp_dma);</div><div class='add'>+		apple,always-on; /* MTP always stays on */</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_mtp_sram)&gt;;</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;DIE_NODE(pmgr_gfx) {</div><div class='add'>+	DIE_NODE(ps_gpx): power-controller@0 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(gpx);</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_afr): power-controller@100 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(afr);</div><div class='add'>+		/* Apple Fabric, media stuff: this can power down */</div><div class='add'>+		apple,min-state = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	DIE_NODE(ps_gfx): power-controller@108 {</div><div class='add'>+		compatible = "apple,t6020-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = DIE_LABEL(gfx);</div><div class='add'>+		power-domains = &lt;&amp;DIE_NODE(ps_afr)&gt;, &lt;&amp;DIE_NODE(ps_gpx)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-6.dtsi b/arch/arm64/boot/dts/apple/t7000-6.dtsi<br/>new file mode 100644<br/>index 000000000000..7048d7383982<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-6.dtsi</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6 / 6 Plus common device tree</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "t7000.dtsi"</div><div class='add'>+#include "t7000-common.dtsi"</div><div class='add'>+#include "t7000-handheld.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 45 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 46 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 131 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;typhoon_opp06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-common.dtsi b/arch/arm64/boot/dts/apple/t7000-common.dtsi<br/>new file mode 100644<br/>index 000000000000..87146e6daae7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple TV HD, iPhone 6, iPhone 6 Plus, iPad mini 4, iPod touch 6</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A8 devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: J42d, J96, J97, N56, N61, N102</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial6 = &amp;serial6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-handheld.dtsi b/arch/arm64/boot/dts/apple/t7000-handheld.dtsi<br/>new file mode 100644<br/>index 000000000000..7b58aa648b53<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-handheld.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-handheld.dtsi</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6, iPhone 6 Plus, iPad mini 4, iPod touch 6</div><div class='add'>+ *</div><div class='add'>+ * This file contains the parts common to handheld devices with t7000</div><div class='add'>+ *</div><div class='add'>+ * target-type: J96, J97, N56, N61, N102</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwi_bl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-j42d.dts b/arch/arm64/boot/dts/apple/t7000-j42d.dts<br/>new file mode 100644<br/>index 000000000000..2ec9e06cc63f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-j42d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-j42d.dts</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple TV HD, J42d, AppleTV5,3 (A1625)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000.dtsi"</div><div class='add'>+#include "t7000-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j42d", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple TV HD";</div><div class='add'>+	chassis-type = "television";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial6";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;typhoon_opp06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-j96.dts b/arch/arm64/boot/dts/apple/t7000-j96.dts<br/>new file mode 100644<br/>index 000000000000..8a32a50cc2df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-j96.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-j96.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 4 (Wi-Fi), J96, iPad5,1 (A1538)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000-mini4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j96", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 4 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-j97.dts b/arch/arm64/boot/dts/apple/t7000-j97.dts<br/>new file mode 100644<br/>index 000000000000..ac7d501f88d2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-j97.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-j97.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 4 (Cellular), J97, iPad5,2 (A1550)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000-mini4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j97", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad mini 4 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi<br/>new file mode 100644<br/>index 000000000000..cc235c5a0c43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-mini4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-mini4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad mini 4 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t7000.dtsi"</div><div class='add'>+#include "t7000-common.dtsi"</div><div class='add'>+#include "t7000-handheld.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 45 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 46 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;typhoon_opp06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;typhoon_opp07 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-n102.dts b/arch/arm64/boot/dts/apple/t7000-n102.dts<br/>new file mode 100644<br/>index 000000000000..99eb8a2b8c73<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-n102.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-n102.dts</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPod touch 6, N102, iPod7,1 (A1574)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000.dtsi"</div><div class='add'>+#include "t7000-common.dtsi"</div><div class='add'>+#include "t7000-handheld.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n102", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPod touch 6";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 46 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 45 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0 &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-n56.dts b/arch/arm64/boot/dts/apple/t7000-n56.dts<br/>new file mode 100644<br/>index 000000000000..2c358df14458<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-n56.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-n56.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6 Plus, N56, iPhone7,2 (A1549/A1586/A1589)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000-6.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n56", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6 Plus";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-n61.dts b/arch/arm64/boot/dts/apple/t7000-n61.dts<br/>new file mode 100644<br/>index 000000000000..10b4ca8babf7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-n61.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-n61.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 6, N61, iPhone7,2 (A1549/A1586/A1589)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7000-6.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n61", "apple,t7000", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 6";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000-pmgr.dtsi b/arch/arm64/boot/dts/apple/t7000-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..5948fa7afffc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,641 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T7000 "A8" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@20000 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@20008 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@20040 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@201f8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_lio: power-controller@20100 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "lio";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_iomux: power-controller@20108 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "iomux";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@20110 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@20118 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@20120 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@20128 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@20130 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@20138 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@20140 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@20148 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@20150 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@20158 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@20160 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@20168 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@20170 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@20178 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@20180 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@20188 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@20190 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@20198 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@201a0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@201a8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@201b0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@201b8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@201c0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@201c8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@201d0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@201d8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@201e0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aes0: power-controller@201e8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aes0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@201f0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@20248 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@20250 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@20258 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@20268 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host2: power-controller@20278 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host2";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp_busmux: power-controller@202a8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp_busmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@202d8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp: power-controller@202d0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@202e0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@202e8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0: power-controller@202b0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1: power-controller@202c8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@20220 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@20200 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic1_phy: power-controller@20208 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic1_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens0: power-controller@20210 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens1: power-controller@20218 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@20230 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcu: power-controller@20238 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcu";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_amp: power-controller@20240 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "amp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@20260 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@20288 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@20290 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple Fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@20298 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple Fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cp: power-controller@202a0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@202b8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@202c0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec: power-controller@202f0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans: power-controller@20318 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc: power-controller@20300 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@20308 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@20310 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@20320 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@20400 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe: power-controller@21000 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@21008 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@21010 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi<br/>new file mode 100644<br/>index 000000000000..0342455d3444<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7000.dtsi</a></div><div class='hunk'>@@ -0,0 +1,287 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T7000 "A8" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H7P, "Fiji"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,typhoon";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;typhoon_opp&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,typhoon";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;typhoon_opp&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	typhoon_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;50000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;29000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;840000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;29000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1128000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;36000&gt;;</div><div class='add'>+		};</div><div class='add'>+		typhoon_opp06: opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1392000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;42000&gt;;</div><div class='add'>+			status = "disabled"; /* Not available on N102 */</div><div class='add'>+		};</div><div class='add'>+		typhoon_opp07: opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;49000&gt;;</div><div class='add'>+			status = "disabled"; /* J96 and J97 only */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202220000 {</div><div class='add'>+			compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02220000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial6: serial@20a0d8000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0d8000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart6&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 175 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 177 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x24000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@20e027000 {</div><div class='add'>+			compatible = "apple,t7000-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x0e027000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,t7000-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dwi_bl: backlight@20e200010 {</div><div class='add'>+			compatible = "apple,t7000-dwi-bl", "apple,dwi-bl";</div><div class='add'>+			reg = &lt;0x2 0x0e200010 0x0 0x8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dwi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@20e300000 {</div><div class='add'>+			compatible = "apple,t7000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0e300000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 208&gt;;</div><div class='add'>+			apple,npins = &lt;208&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(97, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(96, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(139, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(138, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(65, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(64, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(87, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(86, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A8 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t7000-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7001-air2.dtsi b/arch/arm64/boot/dts/apple/t7001-air2.dtsi<br/>new file mode 100644<br/>index 000000000000..e4ec8c1977de<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7001-air2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7001-air2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air 2 common device tree</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t7001.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0 &amp;ps_dp&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl 93 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7001-j81.dts b/arch/arm64/boot/dts/apple/t7001-j81.dts<br/>new file mode 100644<br/>index 000000000000..ca90dc0c872c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7001-j81.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7001-j81.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air 2 (Wi-Fi), J81, iPad5,3 (A1566)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7001-air2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j81", "apple,t7001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Air 2 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7001-j82.dts b/arch/arm64/boot/dts/apple/t7001-j82.dts<br/>new file mode 100644<br/>index 000000000000..d9fd16f48db7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7001-j82.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7001-j82.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Air 2 (Cellular), J82, iPad5,4 (A1567)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t7001-air2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j82", "apple,t7001", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Air 2 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi b/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..7321cfdcd189<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7001-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,650 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T7001 "A8X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@20000 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@20008 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu2: power-controller@20010 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu2";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@20040 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@201f8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_lio: power-controller@20100 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "lio";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_iomux: power-controller@20108 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "iomux";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@20110 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@20118 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@20120 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@20128 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@20130 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@20138 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@20140 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@20148 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@20150 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@20158 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@20160 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@20168 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@20170 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@20178 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@20180 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@20188 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@20190 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@20198 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@201a0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@201a8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@201b0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@201b8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@201c0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@201c8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@201d0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@201d8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@201e0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aes0: power-controller@201e8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aes0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@201f0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x201f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@20248 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@20250 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@20258 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@20268 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host2: power-controller@20278 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host2";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp_busmux: power-controller@202a8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp_busmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1_busmux: power-controller@202c0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1_busmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@202d8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp: power-controller@202d0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@202e0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@202e8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0: power-controller@202b0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp1: power-controller@202c8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp1";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp1_busmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@20220 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@20200 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic1_phy: power-controller@20208 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic1_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens0: power-controller@20210 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens1: power-controller@20218 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@20230 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcu: power-controller@20238 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcu";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_amp: power-controller@20240 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "amp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@20260 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@20288 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@20290 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@20298 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cp: power-controller@202a0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cp";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@202b8 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec: power-controller@202f0 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x202f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans: power-controller@20318 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc: power-controller@20300 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@20308 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@20310 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@20320 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@20400 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x20400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe: power-controller@21000 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@21008 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@21010 {</div><div class='add'>+		compatible = "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x21010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t7001.dtsi b/arch/arm64/boot/dts/apple/t7001.dtsi<br/>new file mode 100644<br/>index 000000000000..e1afb0542369<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t7001.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t7001.dtsi</a></div><div class='hunk'>@@ -0,0 +1,280 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T7001 "A8X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,typhoon";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;typhoon_opp&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,typhoon";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled in by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;typhoon_opp&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "apple,typhoon";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;typhoon_opp&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	typhoon_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;396000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;49000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;31000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;840000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;32000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1128000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;32000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1392000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;37000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;41000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202220000 {</div><div class='add'>+			compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02220000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 175 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,t7000-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 177 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x24000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@20e027000 {</div><div class='add'>+			compatible = "apple,t7000-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x0e027000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,t7000-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@20e300000 {</div><div class='add'>+			compatible = "apple,t7000-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0e300000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 184&gt;;</div><div class='add'>+			apple,npins = &lt;184&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(38, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(37, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(66, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(65, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(133, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(132, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(135, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(134, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A8X doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t7001-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-7.dtsi b/arch/arm64/boot/dts/apple/t8010-7.dtsi<br/>new file mode 100644<br/>index 000000000000..1913b7b2c1fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-7.dtsi</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7 / 7 Plus common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t8010.dtsi"</div><div class='add'>+#include "t8010-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 180 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mute {</div><div class='add'>+			label = "Mute Switch";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 86 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0_fe &amp;ps_disp0_be &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hurricane_opp09 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hurricane_opp10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-common.dtsi b/arch/arm64/boot/dts/apple/t8010-common.dtsi<br/>new file mode 100644<br/>index 000000000000..44dc968638b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7, iPhone 7 Plus, iPad 6, iPad 7, iPod touch 7</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A10 devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: D10, D11, D101, D111, J71b, J72b, J171, J172, N112</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwi_bl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-d10.dts b/arch/arm64/boot/dts/apple/t8010-d10.dts<br/>new file mode 100644<br/>index 000000000000..39cdd12db6bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-d10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-d10.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7 (Qualcomm), D10, iPhone9,1 (A1660/A1778/A1779/A1780)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d10", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 7 (Qualcomm)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-d101.dts b/arch/arm64/boot/dts/apple/t8010-d101.dts<br/>new file mode 100644<br/>index 000000000000..6a9f0856f930<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-d101.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-d101.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7 (Intel), D101, iPhone9,3 (A1660/A1778/A1779/A1780)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d101", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 7 (Intel)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-d11.dts b/arch/arm64/boot/dts/apple/t8010-d11.dts<br/>new file mode 100644<br/>index 000000000000..57e41c2cfbe2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-d11.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-d11.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7 Plus (Qualcomm), D11, iPhone9,2 (A1661/A1784/A1785/A1786)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d11", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 7 Plus (Qualcomm)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-d111.dts b/arch/arm64/boot/dts/apple/t8010-d111.dts<br/>new file mode 100644<br/>index 000000000000..37e395a48c1d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-d111.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-d111.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 7 Plus (Intel), D111, iPhone9,4 (A1661/A1784/A1785/A1786)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d111", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 7 Plus (Intel)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi b/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi<br/>new file mode 100644<br/>index 000000000000..1e46e4a3a7f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-ipad6.dtsi</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 6 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t8010.dtsi"</div><div class='add'>+#include "t8010-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 180 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 89 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 90 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0_fe &amp;ps_disp0_be &amp;ps_dp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hurricane_opp09 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hurricane_opp10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi b/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi<br/>new file mode 100644<br/>index 000000000000..bd0e9c0b5696<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-ipad7.dtsi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 7 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The iPad 7 seems to be only an iteration over the iPad 6 with some</div><div class='add'>+ * small changes, like the a bigger screen and 1 GiB of RAM more, hence</div><div class='add'>+ * there is little to no differentiation between these 2 generations for</div><div class='add'>+ * now.</div><div class='add'>+ */</div><div class='add'>+#include "t8010-ipad6.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-j171.dts b/arch/arm64/boot/dts/apple/t8010-j171.dts<br/>new file mode 100644<br/>index 000000000000..6751bf3a4afd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-j171.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-j171.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 7 (Wi-Fi), J171, iPad7,11 (A2197)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-ipad7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j171", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 7 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-j172.dts b/arch/arm64/boot/dts/apple/t8010-j172.dts<br/>new file mode 100644<br/>index 000000000000..51aaa950acd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-j172.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-j172.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 7 (Cellular), J172, iPad7,12 (A2198/A2200)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-ipad7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j172", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 7 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-j71b.dts b/arch/arm64/boot/dts/apple/t8010-j71b.dts<br/>new file mode 100644<br/>index 000000000000..534eb8413e08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-j71b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-j71b.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 6 (Wi-Fi), J71b, iPad7,5 (A1893)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-ipad6.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j71b", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 6 (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-j72b.dts b/arch/arm64/boot/dts/apple/t8010-j72b.dts<br/>new file mode 100644<br/>index 000000000000..264924e41f42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-j72b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-j72b.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad 6 (Cellular), J72b, iPad7,6 (A1954)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010-ipad6.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j72b", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad 6 (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-n112.dts b/arch/arm64/boot/dts/apple/t8010-n112.dts<br/>new file mode 100644<br/>index 000000000000..48fdbedf74da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-n112.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-n112.dts</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPod touch 7, N112, iPod9,1 (A2178)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8010.dtsi"</div><div class='add'>+#include "t8010-common.dtsi"</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,n112", "apple,t8010", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPod touch 7";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 86 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 180 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	power-domains = &lt;&amp;ps_disp0_fe &amp;ps_disp0_be &amp;ps_mipi_dsi&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8010-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..6d451088616a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,772 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T8010 "A10" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80160 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80168 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@80110 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80118 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80120 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@80148 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_socuvd: power-controller@80150 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "socuvd";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80178 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80180 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80188 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80190 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80198 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80170 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@80128 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens0: power-controller@80130 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens1: power-controller@80138 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens2: power-controller@80140 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80268 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@80270 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@80278 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@80288 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_rtmux: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "rtmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sys: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@802e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_fe: power-controller@802b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_fe";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_be: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@80200 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@80208 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@80210 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@80218 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@80220 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@80228 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hfd0: power-controller@80238 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hfd0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80240 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80248 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80250 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80258 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80260 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@80280 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@80290 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@80298 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@802c0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_sys: power-controller@80310 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@80318 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@80320 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec0: power-controller@80300 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec0";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@80328 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts0: power-controller@84000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts0";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts1: power-controller@84008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts1";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_vis: power-controller@84010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_vis";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_be: power-controller@84018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_pearl: power-controller@84020 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_pearl";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dprx: power-controller@84028 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dprx";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe4: power-controller@88000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe4";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe5: power-controller@88008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe5";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_aop: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop_cpu &amp;ps_aop_busif &amp;ps_aop_filter&gt;;</div><div class='add'>+		apple,always-on; /* Always on processor */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_gpio: power-controller@80010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_cpu: power-controller@80048 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80048 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_filter: power-controller@80050 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_filter";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_busif: power-controller@80058 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80058 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_busif";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8010.dtsi b/arch/arm64/boot/dts/apple/t8010.dtsi<br/>new file mode 100644<br/>index 000000000000..522b3896aa87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8010.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8010.dtsi</a></div><div class='hunk'>@@ -0,0 +1,337 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T8010 "A10" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H9P, "Cayman"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x300000&gt;; /* P-cluster */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fusion_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Apple Fusion Architecture: Hardware big.LITTLE switcher</div><div class='add'>+		 * that use p-state transitions to switch between cores.</div><div class='add'>+		 * Only one type of core can be active at a given time.</div><div class='add'>+		 *</div><div class='add'>+		 * The E-core frequencies are adjusted so performance scales</div><div class='add'>+		 * linearly with reported clock speed.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;172000000&gt;; /* 300 MHz, E-core */</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;11000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;230000000&gt;; /* 396 MHz, E-core */</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;49000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;425000000&gt;; /* 732 MHz, E-core */</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;13000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;637000000&gt;; /* 1092 MHz, E-core */</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;18000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;756000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;35000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1056000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;31000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1356000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;37000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1644000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;39500&gt;;</div><div class='add'>+		};</div><div class='add'>+		hurricane_opp09: opp09 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1944000000&gt;;</div><div class='add'>+			opp-level = &lt;9&gt;;</div><div class='add'>+			clock-latency-ns = &lt;46000&gt;;</div><div class='add'>+			status = "disabled"; /* Not available on N112 */</div><div class='add'>+		};</div><div class='add'>+		hurricane_opp10: opp10 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2244000000&gt;;</div><div class='add'>+			opp-level = &lt;10&gt;;</div><div class='add'>+			clock-latency-ns = &lt;56000&gt;;</div><div class='add'>+			status = "disabled"; /* Not available on N112 */</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		hurricane_opp11: opp11 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2340000000&gt;;</div><div class='add'>+			opp-level = &lt;11&gt;;</div><div class='add'>+			clock-latency-ns = &lt;56000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+			status = "disabled"; /* Not available on N112 */</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202f20000 {</div><div class='add'>+			compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02f20000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 218 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 233 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 234 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 235 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,t8010-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dwi_bl: backlight@20e200080 {</div><div class='add'>+			compatible = "apple,t8010-dwi-bl", "apple,dwi-bl";</div><div class='add'>+			reg = &lt;0x2 0x0e200080 0x0 0x8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dwi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@20f100000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0f100000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 208&gt;;</div><div class='add'>+			apple,npins = &lt;208&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(197, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(196, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(40, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(39, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(132, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(133, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(41, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(42, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2100f0000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x100f0000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_aop_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 42&gt;;</div><div class='add'>+			apple,npins = &lt;42&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 134 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@210200000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x10200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2102b0000 {</div><div class='add'>+			compatible = "apple,t8010-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x102b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A10 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t8010-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-common.dtsi b/arch/arm64/boot/dts/apple/t8011-common.dtsi<br/>new file mode 100644<br/>index 000000000000..2010b56246f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple TV 4K, Apple iPad Pro 2</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A10X devices.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0_fe &amp;ps_disp0_be &amp;ps_dp&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-j105a.dts b/arch/arm64/boot/dts/apple/t8011-j105a.dts<br/>new file mode 100644<br/>index 000000000000..d3e5b69c67aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-j105a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-j105a.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple TV 4K (1st Generation), J105a, AppleTV6,2 (A1482)</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8011.dtsi"</div><div class='add'>+#include "t8011-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j105a", "apple,t8011", "apple,arm-platform";</div><div class='add'>+	model = "Apple TV 4K (1st Generation)";</div><div class='add'>+	chassis-type = "television";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-j120.dts b/arch/arm64/boot/dts/apple/t8011-j120.dts<br/>new file mode 100644<br/>index 000000000000..1b49bb5c97c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-j120.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-j120.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro 2 (12.9-inch) (Wi-Fi), J120, iPad7,1 (A1670)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8011.dtsi"</div><div class='add'>+#include "t8011-common.dtsi"</div><div class='add'>+#include "t8011-pro2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j120", "apple,t8011", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro 2 (12.9-inch) (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-j121.dts b/arch/arm64/boot/dts/apple/t8011-j121.dts<br/>new file mode 100644<br/>index 000000000000..22f4aa1ecbda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-j121.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-j121.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro 2 (12.9-inch) (Cellular), J121, iPad7,2 (A1671)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8011.dtsi"</div><div class='add'>+#include "t8011-common.dtsi"</div><div class='add'>+#include "t8011-pro2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j121", "apple,t8011", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro 2 (12.9-inch) (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-j207.dts b/arch/arm64/boot/dts/apple/t8011-j207.dts<br/>new file mode 100644<br/>index 000000000000..c3384e2cad44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-j207.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-j207.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro 2 (10.5-inch) (Wi-Fi), J207, iPad7,3 (A1701)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8011.dtsi"</div><div class='add'>+#include "t8011-common.dtsi"</div><div class='add'>+#include "t8011-pro2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j207", "apple,t8011", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro 2 (10.5-inch) (Wi-Fi)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-j208.dts b/arch/arm64/boot/dts/apple/t8011-j208.dts<br/>new file mode 100644<br/>index 000000000000..251fa76efb6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-j208.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-j208.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro 2 (10.5-inch) (Cellular), J208, iPad7,4 (A1709)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8011.dtsi"</div><div class='add'>+#include "t8011-common.dtsi"</div><div class='add'>+#include "t8011-pro2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j208", "apple,t8011", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPad Pro 2 (10.5-inch) (Cellular)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8011-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..c44e3f9d7087<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,806 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T8011 "A10X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu2: power-controller@80010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu2";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80158 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80160 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@80110 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80118 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80120 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@80148 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80170 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80178 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80180 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80188 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80190 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@80198 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80168 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsic0_phy: power-controller@80128 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsic0_phy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb3host&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens0: power-controller@80130 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens1: power-controller@80138 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens2: power-controller@80140 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80288 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@80290 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host: power-controller@80298 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2dev: power-controller@802a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2dev";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb3host: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb3host";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb3dev: power-controller@802b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb3dev";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@802e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sys: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sys";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_fe: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_fe";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_be: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dpa: power-controller@80230 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dpa";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@80200 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@80208 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@80210 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@80218 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@80220 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hfd0: power-controller@80238 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hfd0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80240 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80248 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80250 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80258 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80260 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs4: power-controller@80268 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs4";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs5: power-controller@80270 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs5";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs6: power-controller@80278 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs6";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs7: power-controller@80280 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs7";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802c0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_sys: power-controller@80320 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_srs: power-controller@80390 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80390 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "srs";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@80308 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@80300 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@80328 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@80330 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec0: power-controller@80310 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec0";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@80338 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80338 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts0: power-controller@84000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts0";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts1: power-controller@84008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts1";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_vis: power-controller@84010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_vis";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_be: power-controller@84018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_pearl: power-controller@84020 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_pearl";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dprx: power-controller@84028 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dprx";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe4: power-controller@88000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe4";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe5: power-controller@88008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe5";</div><div class='add'>+		power-domains = &lt;&amp;ps_venc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_aop: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop_cpu &amp;ps_aop_filter &amp;ps_aop_busif&gt;;</div><div class='add'>+		apple,always-on; /* Always on processor */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_gpio: power-controller@80010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_cpu: power-controller@80048 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80048 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_filter: power-controller@80050 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_filter";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_busif: power-controller@80058 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80058 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_busif";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011-pro2.dtsi b/arch/arm64/boot/dts/apple/t8011-pro2.dtsi<br/>new file mode 100644<br/>index 000000000000..5eaa0a73350f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011-pro2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011-pro2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPad Pro 2 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 139 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "Power Button";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 138 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 43 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pinctrl_ap 40 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs6 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ps_dcs7 {</div><div class='add'>+	apple,always-on; /* LPDDR4 interface */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8011.dtsi b/arch/arm64/boot/dts/apple/t8011.dtsi<br/>new file mode 100644<br/>index 000000000000..039aa4d1e887<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8011.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8011.dtsi</a></div><div class='hunk'>@@ -0,0 +1,334 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T8011 "A10X" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H9G, "Myst"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x800000&gt;; /* P-cluster */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fusion_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Apple Fusion Architecture: Hardwired big.LITTLE switcher</div><div class='add'>+		 * that use p-state transitions to switch between cores.</div><div class='add'>+		 *</div><div class='add'>+		 * The E-core frequencies are adjusted so performance scales</div><div class='add'>+		 * linearly with reported clock speed.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;172000000&gt;; /* 300 MHz, E-core */</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;12000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;230000000&gt;; /* 396 MHz, E-core */</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;135000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;448000000&gt;; /* 768 MHz, E-core */</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;105000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;662000000&gt;; /* 1152 MHz, E-core */</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;115000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;804000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;122000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1140000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;120000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1548000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;125000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1956000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;135000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp09 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2316000000&gt;;</div><div class='add'>+			opp-level = &lt;9&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp10 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='add'>+			opp-level = &lt;10&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202f20000 {</div><div class='add'>+			compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02f20000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a0c0000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a0c0000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 216 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@20a110000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a110000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 230 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@20a111000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a111000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@20a112000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a112000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@20a113000 {</div><div class='add'>+			compatible = "apple,t8010-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x0a113000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 233 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,t8010-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@20f100000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0f100000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 219&gt;;</div><div class='add'>+			apple,npins = &lt;219&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(211, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(210, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(156, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(155, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(58, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(57, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(158, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(157, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2100f0000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x100f0000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_aop_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 42&gt;;</div><div class='add'>+			apple,npins = &lt;42&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 125 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 126 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@210200000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x10200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2102b0000 {</div><div class='add'>+			compatible = "apple,t8010-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x102b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A10X doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t8011-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j132.dts b/arch/arm64/boot/dts/apple/t8012-j132.dts<br/>new file mode 100644<br/>index 000000000000..7dcac51703ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j132.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j132.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro15,2 (j132), J132, iBridge2,4</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro15,2 (j132)";</div><div class='add'>+	compatible = "apple,j132", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j137.dts b/arch/arm64/boot/dts/apple/t8012-j137.dts<br/>new file mode 100644<br/>index 000000000000..dbde1ad7ce14<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j137.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j137.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 iMacPro1,1 (j137), J137, iBridge2,1</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 iMacPro1,1 (j137)";</div><div class='add'>+	compatible = "apple,j137", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j140a.dts b/arch/arm64/boot/dts/apple/t8012-j140a.dts<br/>new file mode 100644<br/>index 000000000000..5df1ff74d2df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j140a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j140a.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookAir8,2 (j140a), J140a, iBridge2,12</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookAir8,2 (j140a)";</div><div class='add'>+	compatible = "apple,j140a", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j140k.dts b/arch/arm64/boot/dts/apple/t8012-j140k.dts<br/>new file mode 100644<br/>index 000000000000..a0ef1585e5c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j140k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j140k.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookAir8,1 (j140k), J140k, iBridge2,8</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookAir8,1 (j140k)";</div><div class='add'>+	compatible = "apple,j140k", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j152f.dts b/arch/arm64/boot/dts/apple/t8012-j152f.dts<br/>new file mode 100644<br/>index 000000000000..261416eaf97e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j152f.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j152f.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro16,1 (j152f), J152f, iBridge2,14</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro16,1 (j152f)";</div><div class='add'>+	compatible = "apple,j152f", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j160.dts b/arch/arm64/boot/dts/apple/t8012-j160.dts<br/>new file mode 100644<br/>index 000000000000..fbcc0604f4a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j160.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j160.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacPro7,1 (j160), J160, iBridge2,6</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacPro7,1 (j160)";</div><div class='add'>+	compatible = "apple,j160", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j174.dts b/arch/arm64/boot/dts/apple/t8012-j174.dts<br/>new file mode 100644<br/>index 000000000000..d11c70f84a71<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j174.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j174.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 Macmini8,1 (j174), J174, iBridge2,5</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 Macmini8,1 (j174)";</div><div class='add'>+	compatible = "apple,j174", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j185.dts b/arch/arm64/boot/dts/apple/t8012-j185.dts<br/>new file mode 100644<br/>index 000000000000..33492f5db46d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j185.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j185.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 iMac20,1 (j185), J185, iBridge2,19</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 iMac20,1 (j185)";</div><div class='add'>+	compatible = "apple,j185", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j185f.dts b/arch/arm64/boot/dts/apple/t8012-j185f.dts<br/>new file mode 100644<br/>index 000000000000..3a4abdd8f7d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j185f.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j185f.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 iMac20,2 (j185f), J185f, iBridge2,20</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 iMac20,2 (j185f)";</div><div class='add'>+	compatible = "apple,j185f", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j213.dts b/arch/arm64/boot/dts/apple/t8012-j213.dts<br/>new file mode 100644<br/>index 000000000000..8270812b9a68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j213.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j213.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro15,4 (j213), J213, iBridge2,10</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro15,4 (j213)";</div><div class='add'>+	compatible = "apple,j213", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j214k.dts b/arch/arm64/boot/dts/apple/t8012-j214k.dts<br/>new file mode 100644<br/>index 000000000000..5b8e42512060<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j214k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j214k.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro16,2 (j214k), J214k, iBridge2,16</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro16,2 (j214k)";</div><div class='add'>+	compatible = "apple,j214k", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j215.dts b/arch/arm64/boot/dts/apple/t8012-j215.dts<br/>new file mode 100644<br/>index 000000000000..ad574fbf7f92<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j215.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j215.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro16,4 (j215), J215, iBridge2,22</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro16,4 (j215)";</div><div class='add'>+	compatible = "apple,j215", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j223.dts b/arch/arm64/boot/dts/apple/t8012-j223.dts<br/>new file mode 100644<br/>index 000000000000..de75d775aac5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j223.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j223.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro16,3 (j223), J223, iBridge2,21</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro16,3 (j223)";</div><div class='add'>+	compatible = "apple,j223", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j230k.dts b/arch/arm64/boot/dts/apple/t8012-j230k.dts<br/>new file mode 100644<br/>index 000000000000..4b19bc70ab0f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j230k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j230k.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookAir9,1 (j230k), J230k, iBridge2,15</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookAir9,1 (j230k)";</div><div class='add'>+	compatible = "apple,j230k", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j680.dts b/arch/arm64/boot/dts/apple/t8012-j680.dts<br/>new file mode 100644<br/>index 000000000000..aa5a72e07d3f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j680.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j680.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro15,1 (j680), J680, iBridge2,3</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro15,1 (j680)";</div><div class='add'>+	compatible = "apple,j680", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-j780.dts b/arch/arm64/boot/dts/apple/t8012-j780.dts<br/>new file mode 100644<br/>index 000000000000..9cee891cb16d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-j780.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-j780.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T2 MacBookPro15,3 (j780), J780, iBridge2,7</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8012-jxxx.dtsi"</div><div class='add'>+#include "t8012-touchbar.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Apple T2 MacBookPro15,3 (j780)";</div><div class='add'>+	compatible = "apple,j780", "apple,t8012", "apple,arm-platform";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8012-jxxx.dtsi<br/>new file mode 100644<br/>index 000000000000..36e82633bc52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-jxxx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-jxxx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Common Device Tree for all T2 devices</div><div class='add'>+ *</div><div class='add'>+ * target-type: J132, J137, J140a, J140k, J152f, J160, J174, J185, J185f</div><div class='add'>+ * J213, J214k, J215, J223, J230k, J680, J780</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t8012.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8012-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..35a462edd4af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,837 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T8012 "T2" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80158 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80160 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_iomux: power-controller@80150 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80150 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "iomux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80110 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_down_ref: power-controller@80138 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_down_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg0_ref: power-controller@80140 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg0_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg1_ref: power-controller@80148 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg1_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80170 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80178 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80180 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80188 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80190 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca5: power-controller@80198 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80168 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens0: power-controller@80120 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens1: power-controller@80128 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sens2: power-controller@80130 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sens2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80118 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c4: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c5: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c6: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80268 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctrl: power-controller@80270 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctrl";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@80278 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@80288 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_rtmux: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "rtmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sys: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@802e8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_fe: power-controller@802b0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_fe";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_be: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@80200 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@80208 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@80210 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@80218 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@80220 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dpa: power-controller@80228 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dpa";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hfd0: power-controller@80230 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hfd0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80240 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80240 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80248 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80250 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80258 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		/* Not used on some devicecs, to be disabled by loader */</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80260 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		/* Not used on some devicecs, to be disabled by loader */</div><div class='add'>+		apple,always-on; /* LPDDR4 interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@80280 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbotg: power-controller@80290 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbotg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctrl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@80298 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_up_af: power-controller@80320 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_up_af";</div><div class='add'>+		power-domains = &lt;&amp;ps_iomux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_up: power-controller@80328 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_up";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie_up_af&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_sys: power-controller@80300 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans2: power-controller@80308 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans2";</div><div class='add'>+		power-domains = &lt;&amp;ps_iomux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_down: power-controller@80310 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_down";</div><div class='add'>+		power-domains = &lt;&amp;ps_iomux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_down_aux: power-controller@80318 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_down_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_up_aux: power-controller@80330 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_up_aux";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie_up&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg0: power-controller@80338 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80338 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg0";</div><div class='add'>+		power-domains = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg0_aux: power-controller@80340 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80340 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg0_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg1: power-controller@80348 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80348 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg1";</div><div class='add'>+		power-domains = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_stg1_aux: power-controller@80350 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80350 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_stg1_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts0: power-controller@84000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts0";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts1: power-controller@84008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts1";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_vis: power-controller@84010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_vis";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_be: power-controller@84018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_pearl: power-controller@84020 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_pearl";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe4: power-controller@88000 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe5: power-controller@88008 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88010 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88018 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_spmi: power-controller@80058 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80058 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spmi";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_nub_aon: power-controller@80060 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80060 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "nub_aon";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_fabric: power-controller@80030 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_fabric";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_aon: power-controller@80088 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80088 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_aon";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80050 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_nub_sram: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "nub_sram";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_nub_fabric: power-controller@80198 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "nub_fabric";</div><div class='add'>+		apple,always-on; /* Core AON device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_cpu: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_cpu";</div><div class='add'>+		power-domains = &lt;&amp;ps_smc_fabric &amp;ps_smc_aon&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012-touchbar.dtsi b/arch/arm64/boot/dts/apple/t8012-touchbar.dtsi<br/>new file mode 100644<br/>index 000000000000..fc4a80d0c787<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012-touchbar.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012-touchbar.dtsi</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Common Device Tree for T2 devices with a Touch Bar</div><div class='add'>+ *</div><div class='add'>+ * target-type: J152f, J213, J214k, J215, J223, J680, J780</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0_fe &amp;ps_disp0_be &amp;ps_mipi_dsi&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8012.dtsi b/arch/arm64/boot/dts/apple/t8012.dtsi<br/>new file mode 100644<br/>index 000000000000..e7923814169b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8012.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8012.dtsi</a></div><div class='hunk'>@@ -0,0 +1,302 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T8012 "T2" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H9M, "Gibraltar"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@10000 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@10001 {</div><div class='add'>+			compatible = "apple,hurricane-zephyr";</div><div class='add'>+			reg = &lt;0x0 0x10001&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			operating-points-v2 = &lt;&amp;fusion_opp&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* P-core */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x300000&gt;; /* P-cluster */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fusion_opp: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Apple Fusion Architecture: Hardware big.LITTLE switcher</div><div class='add'>+		 * that use p-state transitions to switch between cores.</div><div class='add'>+		 * Only one type of core can be active at a given time.</div><div class='add'>+		 *</div><div class='add'>+		 * The E-core frequencies are adjusted so performance scales</div><div class='add'>+		 * linearly with reported clock speed.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;172000000&gt;; /* 300 MHz, E-core */</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;11000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;230000000&gt;; /* 396 MHz, E-core */</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;425000000&gt;; /* 732 MHz, E-core */</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;110000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;637000000&gt;; /* 1092 MHz, E-core */</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;130000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;756000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;130000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1056000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;130000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1356000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;130000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1644000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;135000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp09 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1944000000&gt;;</div><div class='add'>+			opp-level = &lt;9&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp10 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2244000000&gt;;</div><div class='add'>+			opp-level = &lt;10&gt;;</div><div class='add'>+			clock-latency-ns = &lt;150000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp11 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2340000000&gt;;</div><div class='add'>+			opp-level = &lt;11&gt;;</div><div class='add'>+			clock-latency-ns = &lt;150000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq: performance-controller@202f20000 {</div><div class='add'>+			compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x02f20000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@20a600000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x0a600000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@20e000000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0xe000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@20e100000 {</div><div class='add'>+			compatible = "apple,t8010-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x0e100000 0x0 0x100000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@20f100000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0f100000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 221&gt;;</div><div class='add'>+			apple,npins = &lt;221&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2100f0000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x0100f0000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 41&gt;;</div><div class='add'>+			apple,npins = &lt;41&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi: spmi@211180700 {</div><div class='add'>+			compatible = "apple,t8012-spmi", "apple,t8103-spmi";</div><div class='add'>+			reg = &lt;0x2 0x11180700 0x0 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_nub: pinctrl@2111f0000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x111f0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_nub 0 0 19&gt;;</div><div class='add'>+			apple,npins = &lt;19&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 166 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@211200000 {</div><div class='add'>+			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x11200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2112b0000 {</div><div class='add'>+			compatible = "apple,t8010-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x112b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_smc: pinctrl@212024000 {</div><div class='add'>+			compatible = "apple,t8010-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x12024000 0x0 0x1000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_smc_cpu&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_smc 0 0 81&gt;;</div><div class='add'>+			apple,npins = &lt;81&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 197 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * SMC is not yet supported and accessing this pinctrl while SMC is</div><div class='add'>+			 * suspended results in a hang.</div><div class='add'>+			 */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that T2 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t8012-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-8.dtsi b/arch/arm64/boot/dts/apple/t8015-8.dtsi<br/>new file mode 100644<br/>index 000000000000..0300ee1a2ffb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-8.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-8.dtsi</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t8015.dtsi"</div><div class='add'>+#include "t8015-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwi_bl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-8plus.dtsi b/arch/arm64/boot/dts/apple/t8015-8plus.dtsi<br/>new file mode 100644<br/>index 000000000000..ea291a95f028<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-8plus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-8plus.dtsi</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 Plus common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* The 8 Plus has minor differences like 1 more camera, 1 GiB of RAM more and a bigger display. */</div><div class='add'>+#include "t8015-8.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-common.dtsi b/arch/arm64/boot/dts/apple/t8015-common.dtsi<br/>new file mode 100644<br/>index 000000000000..498f58fb9715<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8, iPhone 8 Plus, iPhone X</div><div class='add'>+ *</div><div class='add'>+ * This file contains parts common to all Apple A11 devices.</div><div class='add'>+ *</div><div class='add'>+ * target-type: D20, D21, D22, D201, D211, D221</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@0 {</div><div class='add'>+			compatible = "apple,simple-framebuffer", "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+			power-domains = &lt;&amp;ps_disp0_be &amp;ps_mipi_dsi &amp;ps_disp0_hilo &amp;ps_disp0_ppp&gt;;</div><div class='add'>+			/* Format properties will be added by loader */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@800000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x8 0 0 0&gt;; /* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* To be filled by loader */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d20.dts b/arch/arm64/boot/dts/apple/t8015-d20.dts<br/>new file mode 100644<br/>index 000000000000..35d79e2ceebc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d20.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d20.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 (Global), D20 iPhone10,1 (A1863/A1906/A1907)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d20", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 8 (Global)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d201.dts b/arch/arm64/boot/dts/apple/t8015-d201.dts<br/>new file mode 100644<br/>index 000000000000..31e0947fee70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d201.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d201.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 (GSM), D20 iPhone10,4 (A1905)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-8.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d201", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 8 (GSM)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d21.dts b/arch/arm64/boot/dts/apple/t8015-d21.dts<br/>new file mode 100644<br/>index 000000000000..a902ba7f1133<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d21.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d21.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 Plus (Global), D21 iPhone10,2 (A1864/A1897/A1898)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-8plus.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d21", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 8 Plus (Global)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d211.dts b/arch/arm64/boot/dts/apple/t8015-d211.dts<br/>new file mode 100644<br/>index 000000000000..3b3f886c0c09<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d211.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d211.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone 8 Plus (GSM), D211 iPhone10,5 (A1899)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-8plus.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d211", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone 8 Plus (GSM)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d22.dts b/arch/arm64/boot/dts/apple/t8015-d22.dts<br/>new file mode 100644<br/>index 000000000000..5a7a6092c2d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d22.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d22.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone X (Global), D22, iPhone10,3 (A1865)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d22", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone X (Global)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-d221.dts b/arch/arm64/boot/dts/apple/t8015-d221.dts<br/>new file mode 100644<br/>index 000000000000..dd920c945bd6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-d221.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-d221.dts</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone X (GSM), D221, iPhone10,6 (A1901)</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8015-x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,d221", "apple,t8015", "apple,arm-platform";</div><div class='add'>+	model = "Apple iPhone X (GSM)";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8015-pmgr.dtsi<br/>new file mode 100644<br/>index 000000000000..1d8da9c7863e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-pmgr.dtsi</a></div><div class='hunk'>@@ -0,0 +1,932 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * PMGR Power domains for the Apple T8015 "A11" SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Nick Chan &lt;towinchenmi@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pmgr {</div><div class='add'>+	ps_cpu0: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu0";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu1: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu1";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu2: power-controller@80010 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu2";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu3: power-controller@80018 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu3";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu4: power-controller@80020 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu4";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpu5: power-controller@80028 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpu5";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_cpm: power-controller@80040 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80040 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "cpm";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_busif: power-controller@80158 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80158 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_busif";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio_p: power-controller@80160 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80160 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio_p";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_busif&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sbr: power-controller@80100 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80100 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sbr";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aic: power-controller@80108 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80108 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aic";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dwi: power-controller@80110 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80110 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dwi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gpio: power-controller@80118 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80118 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms: power-controller@80120 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80120 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms";</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_ref: power-controller@80148 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80148 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_ref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca0: power-controller@80170 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80170 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca1: power-controller@80178 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80178 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca2: power-controller@80180 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80180 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca3: power-controller@80188 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80188 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca4: power-controller@80190 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80190 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pwm0: power-controller@801a0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pwm0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c0: power-controller@801a8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c1: power-controller@801b0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c2: power-controller@801b8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_i2c3: power-controller@801c0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "i2c3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi0: power-controller@801c8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi1: power-controller@801d0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi2: power-controller@801d8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spi3: power-controller@801e0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart0: power-controller@801e8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801e8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart1: power-controller@801f0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart1";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart2: power-controller@801f8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x801f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart2";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sio: power-controller@80168 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80168 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sio";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+		apple,always-on; /* Core device */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hsicphy: power-controller@80128 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80128 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hsicphy";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens0: power-controller@80130 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80130 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens1: power-controller@80138 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80138 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ispsens2: power-controller@80140 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ispsens2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mca5: power-controller@80198 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80198 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mca5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb: power-controller@80270 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80270 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usbctlreg: power-controller@80278 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80278 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usbctlreg";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0: power-controller@80280 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80280 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctlreg&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host1: power-controller@80290 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80290 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host1";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctlreg&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_rtmux: power-controller@802b0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "rtmux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_media: power-controller@802f0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "media";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_jpg: power-controller@802f8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802f8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "jpg";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_fe: power-controller@802b8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802b8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_fe";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_be: power-controller@802c0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_gp: power-controller@802c8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802c8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_gp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart3: power-controller@80200 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80200 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart3";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart4: power-controller@80208 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80208 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart5: power-controller@80210 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80210 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart5";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart6: power-controller@80218 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80218 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart6";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart7: power-controller@80220 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80220 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart7";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_uart8: power-controller@80228 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80228 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "uart8";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_hfd0: power-controller@80238 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80238 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "hfd0";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mcc: power-controller@80248 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80248 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mcc";</div><div class='add'>+		apple,always-on; /* Memory cache controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs0: power-controller@80250 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80250 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs0";</div><div class='add'>+		apple,always-on; /* LPDDR4X interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs1: power-controller@80258 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80258 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs1";</div><div class='add'>+		apple,always-on; /* LPDDR4X interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs2: power-controller@80260 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs2";</div><div class='add'>+		apple,always-on; /* LPDDR4X interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dcs3: power-controller@80268 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80268 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dcs3";</div><div class='add'>+		apple,always-on; /* LPDDR4X interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2host0_ohci: power-controller@80288 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80288 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2host0_ohci";</div><div class='add'>+		power-domains = &lt;&amp;ps_usb2host0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_usb2dev: power-controller@80298 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80298 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "usb2dev";</div><div class='add'>+		power-domains = &lt;&amp;ps_usbctlreg&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smx: power-controller@802a0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smx";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sf: power-controller@802a8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sf";</div><div class='add'>+		apple,always-on; /* Apple fabric, critical block */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_mipi_dsi: power-controller@802d8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "mipi_dsi";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dp: power-controller@802e0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802e0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dp";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dpa: power-controller@80230 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80230 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dpa";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_be_2x: power-controller@802d0 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x802d0 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_be_2x";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_be&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_sys: power-controller@80350 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80350 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_rtmux&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_msr: power-controller@80300 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80300 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "msr";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_sys: power-controller@80398 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80398 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pmp: power-controller@80308 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80308 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pmp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pms_sram: power-controller@80310 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80310 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pms_sram";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie: power-controller@80318 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80318 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie";</div><div class='add'>+		power-domains = &lt;&amp;ps_pcie_aux&gt;, &lt;&amp;ps_pcie_direct&gt;, &lt;&amp;ps_pcie_ref&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_aux: power-controller@80320 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80320 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_aux";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_vdec0: power-controller@80388 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80388 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "vdec0";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_gfx: power-controller@80338 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80338 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "gfx";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_ans2: power-controller@80328 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80328 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "ans2";</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_pcie_direct: power-controller@80330 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80330 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "pcie_direct";</div><div class='add'>+		apple,always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_avd_sys: power-controller@803a8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x803a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "avd_sys";</div><div class='add'>+		power-domains = &lt;&amp;ps_media&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_sep: power-controller@80400 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80400 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "sep";</div><div class='add'>+		apple,always-on; /* Locked on */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_gp0: power-controller@80830 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80830 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_gp0";</div><div class='add'>+		power-domains = &lt;&amp;ps_disp0_gp&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_gp1: power-controller@80838 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80838 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_gp1";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_ppp: power-controller@80840 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80840 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_ppp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_disp0_hilo: power-controller@80848 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80848 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "disp0_hilo";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts0: power-controller@84000 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts0";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_rsts1: power-controller@84008 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_rsts1";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_vis: power-controller@84010 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_vis";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_be: power-controller@84018 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_be";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_pearl: power-controller@84020 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_pearl";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_dprx: power-controller@84028 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "dprx";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_isp_cnv: power-controller@84030 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x84030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "isp_cnv";</div><div class='add'>+		power-domains = &lt;&amp;ps_isp_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_dma: power-controller@88000 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_dma";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe4: power-controller@88010 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88010 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_pipe5: power-controller@88018 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88018 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_pipe5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me0: power-controller@88020 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_venc_me1: power-controller@88028 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x88028 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "venc_me1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmgr_mini {</div><div class='add'>+	ps_aop_base: power-controller@80008 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80008 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_base";</div><div class='add'>+		power-domains = &lt;&amp;ps_aop_cpu &amp;ps_aop_filter&gt;;</div><div class='add'>+		apple,always-on; /* Always on processor */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_debug: power-controller@80050 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80050 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "debug";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_cpu: power-controller@80020 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80020 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_aop_filter: power-controller@80000 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80000 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "aop_filter";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_spmi: power-controller@80058 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80058 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spmi";</div><div class='add'>+		apple,always-on; /* System Power Management Interface */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_i2cm1: power-controller@800a8 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x800a8 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_i2cm1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_fabric: power-controller@80030 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80030 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_fabric";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ps_smc_cpu: power-controller@80140 {</div><div class='add'>+		compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x80140 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "smc_cpu";</div><div class='add'>+		power-domains = &lt;&amp;ps_smc_fabric &amp;ps_smc_i2cm1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015-x.dtsi b/arch/arm64/boot/dts/apple/t8015-x.dtsi<br/>new file mode 100644<br/>index 000000000000..41134ed40b89<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015-x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015-x.dtsi</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple iPhone X common device tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "t8015.dtsi"</div><div class='add'>+#include "t8015-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8015.dtsi b/arch/arm64/boot/dts/apple/t8015.dtsi<br/>new file mode 100644<br/>index 000000000000..586d3cf1f375<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8015.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8015.dtsi</a></div><div class='hunk'>@@ -0,0 +1,535 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple T8015 "A11" SoC</div><div class='add'>+ *</div><div class='add'>+ * Other names: H10, "Skye"</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022, Konrad Dybcio &lt;konradybcio@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clkref: clock-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "clkref";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_e3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_p1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e0: cpu@0 {</div><div class='add'>+			compatible = "apple,mistral";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;mistral_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;633&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e1: cpu@1 {</div><div class='add'>+			compatible = "apple,mistral";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;mistral_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;633&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e2: cpu@2 {</div><div class='add'>+			compatible = "apple,mistral";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;mistral_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;633&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_e3: cpu@3 {</div><div class='add'>+			compatible = "apple,mistral";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;mistral_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;633&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p0: cpu@10004 {</div><div class='add'>+			compatible = "apple,monsoon";</div><div class='add'>+			reg = &lt;0x0 0x10004&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;monsoon_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_p1: cpu@10005 {</div><div class='add'>+			compatible = "apple,monsoon";</div><div class='add'>+			reg = &lt;0x0 0x10005&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0 0&gt;; /* To be filled by loader */</div><div class='add'>+			performance-domains = &lt;&amp;cpufreq_p&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;monsoon_opp&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_0: l2-cache-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_1: l2-cache-1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x800000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mistral_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;453000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;672000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;105000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;972000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;115000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1272000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;125000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1572000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;135000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1680000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;135000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	monsoon_opp: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-level = &lt;1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;1400&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;453000000&gt;;</div><div class='add'>+			opp-level = &lt;2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;853000000&gt;;</div><div class='add'>+			opp-level = &lt;3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;110000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1332000000&gt;;</div><div class='add'>+			opp-level = &lt;4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;110000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1812000000&gt;;</div><div class='add'>+			opp-level = &lt;5&gt;;</div><div class='add'>+			clock-latency-ns = &lt;125000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2064000000&gt;;</div><div class='add'>+			opp-level = &lt;6&gt;;</div><div class='add'>+			clock-latency-ns = &lt;130000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp07 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2304000000&gt;;</div><div class='add'>+			opp-level = &lt;7&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+		};</div><div class='add'>+#if 0</div><div class='add'>+		/* Not available until CPU deep sleep is implemented */</div><div class='add'>+		opp08 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2376000000&gt;;</div><div class='add'>+			opp-level = &lt;8&gt;;</div><div class='add'>+			clock-latency-ns = &lt;140000&gt;;</div><div class='add'>+			turbo-mode;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		nonposted-mmio;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cpufreq_e: performance-controller@208e20000 {</div><div class='add'>+			compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x08e20000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpufreq_p: performance-controller@208ea0000 {</div><div class='add'>+			compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+			reg = &lt;0x2 0x08ea0000 0 0x1000&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@22e200000 {</div><div class='add'>+			compatible = "apple,t8015-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x2e200000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 304 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@22e204000 {</div><div class='add'>+			compatible = "apple,t8015-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x2e204000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@22e208000 {</div><div class='add'>+			compatible = "apple,t8015-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x2e208000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@22e20c000 {</div><div class='add'>+			compatible = "apple,t8015-i2c", "apple,i2c";</div><div class='add'>+			reg = &lt;0x2 0x2e20c000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 307 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_i2c3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@22e600000 {</div><div class='add'>+			compatible = "apple,s5l-uart";</div><div class='add'>+			reg = &lt;0x2 0x2e600000 0x0 0x4000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 282 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/* Use the bootloader-enabled clocks for now. */</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;, &lt;&amp;clkref&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			power-domains = &lt;&amp;ps_uart0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aic: interrupt-controller@232100000 {</div><div class='add'>+			compatible = "apple,t8015-aic", "apple,aic";</div><div class='add'>+			reg = &lt;0x2 0x32100000 0x0 0x8000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			power-domains = &lt;&amp;ps_aic&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr: power-management@232000000 {</div><div class='add'>+			compatible = "apple,t8015-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x32000000 0 0x8c000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dwi_bl: backlight@232200080 {</div><div class='add'>+			compatible = "apple,t8015-dwi-bl", "apple,dwi-bl";</div><div class='add'>+			reg = &lt;0x2 0x32200080 0x0 0x8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dwi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ap: pinctrl@233100000 {</div><div class='add'>+			compatible = "apple,t8015-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x33100000 0x0 0x1000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gpio&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_ap 0 0 223&gt;;</div><div class='add'>+			apple,npins = &lt;223&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			i2c0_pins: i2c0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(73, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(72, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1_pins: i2c1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(182, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(181, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2_pins: i2c2-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(4, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(3, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3_pins: i2c3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(184, 1)&gt;,</div><div class='add'>+					 &lt;APPLE_PINMUX(183, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aop: pinctrl@2340f0000 {</div><div class='add'>+			compatible = "apple,t8015-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x340f0000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_aop 0 0 49&gt;;</div><div class='add'>+			apple,npins = &lt;49&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi: spmi@235180700 {</div><div class='add'>+			compatible = "apple,t8015-spmi", "apple,t8103-spmi";</div><div class='add'>+			reg = &lt;0x2 0x35180700 0x0 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_nub: pinctrl@2351f0000 {</div><div class='add'>+			compatible = "apple,t8015-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x351f0000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_nub 0 0 8&gt;;</div><div class='add'>+			apple,npins = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmgr_mini: power-management@235200000 {</div><div class='add'>+			compatible = "apple,t8015-pmgr", "apple,pmgr", "syscon", "simple-mfd";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x2 0x35200000 0 0x84000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2352b0000 {</div><div class='add'>+			compatible = "apple,t8015-wdt", "apple,wdt";</div><div class='add'>+			reg = &lt;0x2 0x352b0000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 172 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_smc: pinctrl@236024000 {</div><div class='add'>+			compatible = "apple,t8015-pinctrl", "apple,pinctrl";</div><div class='add'>+			reg = &lt;0x2 0x36024000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl_smc 0 0 6&gt;;</div><div class='add'>+			apple,npins = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 203 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * SMC is not yet supported and accessing this pinctrl while SMC is</div><div class='add'>+			 * suspended results in a hang.</div><div class='add'>+			 */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ans_mbox: mbox@257008000 {</div><div class='add'>+			compatible = "apple,t8015-asc-mailbox";</div><div class='add'>+			reg = &lt;0x2 0x57008000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 265 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 267 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+				"recv-empty", "recv-not-empty";</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sart: iommu@259c50000 {</div><div class='add'>+			compatible = "apple,t8015-sart";</div><div class='add'>+			reg = &lt;0x2 0x59c50000 0x0 0x10000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nvme@259cc0000 {</div><div class='add'>+			compatible = "apple,t8015-nvme-ans2";</div><div class='add'>+			reg = &lt;0x2 0x59cc0000 0x0 0x40000&gt;,</div><div class='add'>+				&lt;0x2 0x59d20000 0x0 0x2000&gt;;</div><div class='add'>+			reg-names = "nvme", "ans";</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			mboxes = &lt;&amp;ans_mbox&gt;;</div><div class='add'>+			apple,sart = &lt;&amp;sart&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_ans2&gt;, &lt;&amp;ps_pcie&gt;;</div><div class='add'>+			power-domain-names = "ans", "apcie0";</div><div class='add'>+			resets = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+		interrupt-names = "phys", "virt";</div><div class='add'>+		/* Note that A11 doesn't actually have a hypervisor (EL2 is not implemented). */</div><div class='add'>+		interrupts = &lt;AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "t8015-pmgr.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103-j293.dts b/arch/arm64/boot/dts/apple/t8103-j293.dts<br/>index 56b0c67bfcda..5b3c42e9f0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-j293.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-j293.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-j293.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8103-j293.dts</a></div><div class='hunk'>@@ -17,6 +17,14 @@</div><div class='ctx'> 	compatible = "apple,j293", "apple,t8103", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (13-inch, M1, 2020)";</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * All of those are used by the bootloader to pass calibration</div><div class='add'>+	 * blobs and other device-specific properties</div><div class='add'>+	 */</div><div class='add'>+	aliases {</div><div class='add'>+		touchbar0 = &amp;touchbar0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	led-controller {</div><div class='ctx'> 		compatible = "pwm-leds";</div><div class='ctx'> 		led-0 {</div><div class='hunk'>@@ -49,3 +57,65 @@</div><div class='ctx'> &amp;fpwm1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	cs-gpios = &lt;&amp;pinctrl_ap 109 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchbar0: touchbar@0 {</div><div class='add'>+		compatible = "apple,j293-touchbar";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;11500000&gt;;</div><div class='add'>+		spi-cs-setup-delay-ns = &lt;2000&gt;;</div><div class='add'>+		spi-cs-hold-delay-ns = &lt;2000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pinctrl_ap 139 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl_ap 194 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		firmware-name = "apple/dfrmtfw-j293.bin";</div><div class='add'>+		touchscreen-size-x = &lt;23045&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;640&gt;;</div><div class='add'>+		touchscreen-inverted-y;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The driver depends on boot loader initialized state which resets when this</div><div class='add'>+ * power-domain is powered off. This happens on suspend or when the driver is</div><div class='add'>+ * missing during boot. Mark the domain as always on until the driver can</div><div class='add'>+ * handle this.</div><div class='add'>+ */</div><div class='add'>+&amp;ps_dispdfr_be {</div><div class='add'>+	apple,always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_dfr {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dfr_mipi_out {</div><div class='add'>+	dfr_mipi_out_panel: endpoint@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dfr_panel_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;displaydfr_mipi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	dfr_panel: panel@0 {</div><div class='add'>+		compatible = "apple,j293-summit", "apple,summit";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		max-brightness = &lt;255&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dfr_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dfr_mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;displaydfr_dart {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103-j457.dts b/arch/arm64/boot/dts/apple/t8103-j457.dts<br/>index 152f95fd49a2..7089ccf3ce55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-j457.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-j457.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-j457.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8103-j457.dts</a></div><div class='hunk'>@@ -21,6 +21,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Adjust pcie0's iommu-map to account for the disabled port01.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	iommu-map = &lt;0x100 &amp;pcie0_dart_0 1 1&gt;,</div><div class='add'>+			&lt;0x200 &amp;pcie0_dart_2 1 1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;bluetooth0 {</div><div class='ctx'> 	brcm,board-type = "apple,santorini";</div><div class='ctx'> };</div><div class='hunk'>@@ -36,10 +44,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;port02 {</div><div class='del'>-	bus-range = &lt;3 3&gt;;</div><div class='add'>+	bus-range = &lt;2 2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	ethernet0: ethernet@0,0 {</div><div class='del'>-		reg = &lt;0x30000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+		reg = &lt;0x20000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 		/* To be filled by the loader */</div><div class='ctx'> 		local-mac-address = [00 10 18 00 00 00];</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi<br/>index 5988a4eb6efa..0c8206156bfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-jxxx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8103-jxxx.dtsi</a></div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'>  */</div><div class='ctx'> &amp;port00 {</div><div class='ctx'> 	bus-range = &lt;1 1&gt;;</div><div class='del'>-	wifi0: network@0,0 {</div><div class='add'>+	wifi0: wifi@0,0 {</div><div class='ctx'> 		compatible = "pci14e4,4425";</div><div class='ctx'> 		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 		/* To be filled by the loader */</div><div class='hunk'>@@ -90,3 +90,5 @@</div><div class='ctx'> &amp;nco_clkref {</div><div class='ctx'> 	clock-frequency = &lt;900000000&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "spi1-nvram.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi<br/>index 9645861a858c..c41c57d63997 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103-pmgr.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8103-pmgr.dtsi</a></div><div class='hunk'>@@ -387,6 +387,15 @@</div><div class='ctx'> 		power-domains = &lt;&amp;ps_sio&gt;, &lt;&amp;ps_spi_p&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ps_spi4: power-controller@260 {</div><div class='add'>+		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='add'>+		reg = &lt;0x260 4&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		#reset-cells = &lt;0&gt;;</div><div class='add'>+		label = "spi4";</div><div class='add'>+		power-domains = &lt;&amp;ps_sio&gt;, &lt;&amp;ps_spi_p&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ps_uart_n: power-controller@268 {</div><div class='ctx'> 		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='ctx'> 		reg = &lt;0x268 4&gt;;</div><div class='hunk'>@@ -558,15 +567,6 @@</div><div class='ctx'> 		apple,always-on; /* Memory controller */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ps_spi4: power-controller@260 {</div><div class='del'>-		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='del'>-		reg = &lt;0x260 4&gt;;</div><div class='del'>-		#power-domain-cells = &lt;0&gt;;</div><div class='del'>-		#reset-cells = &lt;0&gt;;</div><div class='del'>-		label = "spi4";</div><div class='del'>-		power-domains = &lt;&amp;ps_sio&gt;, &lt;&amp;ps_spi_p&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	ps_dcs0: power-controller@300 {</div><div class='ctx'> 		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";</div><div class='ctx'> 		reg = &lt;0x300 4&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi<br/>index 9b0dad6b6184..8b7b27887968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8103.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8103.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8103.dtsi</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/apple.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "apple,t8103", "apple,arm-platform";</div><div class='hunk'>@@ -18,6 +19,10 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		gpu = &amp;gpu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -326,6 +331,20 @@</div><div class='ctx'> 		clock-output-names = "clkref";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk_120m: clock-120m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;120000000&gt;;</div><div class='add'>+		clock-output-names = "clk_120m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_200m: clock-200m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+		clock-output-names = "clk_200m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is a fabulated representation of the input clock</div><div class='ctx'> 	 * to NCO since we don't know the true clock tree.</div><div class='hunk'>@@ -336,6 +355,36 @@</div><div class='ctx'> 		clock-output-names = "nco_ref";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpu_globals: globals {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_a: hw-cal-a {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_b: hw-cal-b {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_handoff: uat-handoff {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_pagetables: uat-pagetables {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_ttbs: uat-ttbs {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -344,6 +393,34 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		nonposted-mmio;</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@206400000 {</div><div class='add'>+			compatible = "apple,agx-g13g";</div><div class='add'>+			reg = &lt;0x2 0x6400000 0 0x40000&gt;,</div><div class='add'>+				&lt;0x2 0x4000000 0 0x1000000&gt;;</div><div class='add'>+			reg-names = "asc", "sgx";</div><div class='add'>+			mboxes = &lt;&amp;agx_mbox&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gfx&gt;;</div><div class='add'>+			memory-region = &lt;&amp;uat_ttbs&gt;, &lt;&amp;uat_pagetables&gt;, &lt;&amp;uat_handoff&gt;,</div><div class='add'>+					&lt;&amp;gpu_hw_cal_a&gt;, &lt;&amp;gpu_hw_cal_b&gt;, &lt;&amp;gpu_globals&gt;;</div><div class='add'>+			memory-region-names = "ttbs", "pagetables", "handoff",</div><div class='add'>+					      "hw-cal-a", "hw-cal-b", "globals";</div><div class='add'>+</div><div class='add'>+			apple,firmware-abi = &lt;0 0 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		agx_mbox: mbox@206408000 {</div><div class='add'>+			compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+			reg = &lt;0x2 0x6408000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 575 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 577 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 578 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+				"recv-empty", "recv-not-empty";</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpufreq_e: performance-controller@210e20000 {</div><div class='ctx'> 			compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='ctx'> 			reg = &lt;0x2 0x10e20000 0 0x1000&gt;;</div><div class='hunk'>@@ -356,6 +433,65 @@</div><div class='ctx'> 			#performance-domain-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		display_dfr: display-pipe@228200000 {</div><div class='add'>+			compatible = "apple,t8103-display-pipe", "apple,h7-display-pipe";</div><div class='add'>+			reg = &lt;0x2 0x28200000 0x0 0xc000&gt;,</div><div class='add'>+			      &lt;0x2 0x28400000 0x0 0x4000&gt;;</div><div class='add'>+			reg-names = "be", "fe";</div><div class='add'>+			power-domains = &lt;&amp;ps_dispdfr_fe&gt;, &lt;&amp;ps_dispdfr_be&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 502 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 506 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "be", "fe";</div><div class='add'>+			iommus = &lt;&amp;displaydfr_dart 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				dfr_adp_out_mipi: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dfr_mipi_in_adp&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		displaydfr_dart: iommu@228304000 {</div><div class='add'>+			compatible = "apple,t8103-dart";</div><div class='add'>+			reg = &lt;0x2 0x28304000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 504 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dispdfr_fe&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		displaydfr_mipi: dsi@228600000 {</div><div class='add'>+			compatible = "apple,t8103-display-pipe-mipi", "apple,h7-display-pipe-mipi";</div><div class='add'>+			reg = &lt;0x2 0x28600000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_mipi_dsi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dfr_mipi_in: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					dfr_mipi_in_adp: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;dfr_adp_out_mipi&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfr_mipi_out: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sio_dart: iommu@235004000 {</div><div class='ctx'> 			compatible = "apple,t8103-dart";</div><div class='ctx'> 			reg = &lt;0x2 0x35004000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -441,6 +577,48 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi0: spi@235100000 {</div><div class='add'>+			compatible = "apple,t8103-spi", "apple,spi";</div><div class='add'>+			reg = &lt;0x2 0x35100000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 614 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_200m&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi0_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_spi0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@235104000 {</div><div class='add'>+			compatible = "apple,t8103-spi", "apple,spi";</div><div class='add'>+			reg = &lt;0x2 0x35104000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 615 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_200m&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_spi1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi3: spi@23510c000 {</div><div class='add'>+			compatible = "apple,t8103-spi", "apple,spi";</div><div class='add'>+			reg = &lt;0x2 0x3510c000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_120m&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_spi3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial0: serial@235200000 {</div><div class='ctx'> 			compatible = "apple,s5l-uart";</div><div class='ctx'> 			reg = &lt;0x2 0x35200000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -597,6 +775,26 @@</div><div class='ctx'> 					 &lt;APPLE_PINMUX(134, 1)&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spi0_pins: spi0-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(67, 1)&gt;, /* CLK */</div><div class='add'>+					&lt;APPLE_PINMUX(68, 1)&gt;,  /* MOSI */</div><div class='add'>+					&lt;APPLE_PINMUX(69, 1)&gt;;  /* MISO */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_pins: spi1-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(42, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(43, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(44, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(45, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3_pins: spi3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(46, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(47, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(48, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(49, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcie_pins: pcie-pins {</div><div class='ctx'> 				pinmux = &lt;APPLE_PINMUX(150, 1)&gt;,</div><div class='ctx'> 					 &lt;APPLE_PINMUX(151, 1)&gt;,</div><div class='hunk'>@@ -604,6 +802,63 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		nub_spmi: spmi@23d0d9300 {</div><div class='add'>+			compatible = "apple,t8103-spmi", "apple,spmi";</div><div class='add'>+			reg = &lt;0x2 0x3d0d9300 0x0 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pmic1: pmic@f {</div><div class='add'>+				compatible = "apple,sera-pmic", "apple,spmi-nvmem";</div><div class='add'>+				reg = &lt;0xf SPMI_USID&gt;;</div><div class='add'>+</div><div class='add'>+				nvmem-layout {</div><div class='add'>+					compatible = "fixed-layout";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					boot_stage: boot-stage@9f01 {</div><div class='add'>+						reg = &lt;0x9f01 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					boot_error_count: boot-error-count@9f02,0 {</div><div class='add'>+						reg = &lt;0x9f02 0x1&gt;;</div><div class='add'>+						bits = &lt;0 4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					panic_count: panic-count@9f02,4 {</div><div class='add'>+						reg = &lt;0x9f02 0x1&gt;;</div><div class='add'>+						bits = &lt;4 4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					boot_error_stage: boot-error-stage@9f03 {</div><div class='add'>+						reg = &lt;0x9f03 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					shutdown_flag: shutdown-flag@9f0f,3 {</div><div class='add'>+						reg = &lt;0x9f0f 0x1&gt;;</div><div class='add'>+						bits = &lt;3 1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					fault_shadow: fault-shadow@a67b {</div><div class='add'>+						reg = &lt;0xa67b 0x10&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					socd: socd@ab00 {</div><div class='add'>+						reg = &lt;0xab00 0x400&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pm_setting: pm-setting@d001 {</div><div class='add'>+						reg = &lt;0xd001 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rtc_offset: rtc-offset@d100 {</div><div class='add'>+						reg = &lt;0xd100 0x6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_nub: pinctrl@23d1f0000 {</div><div class='ctx'> 			compatible = "apple,t8103-pinctrl", "apple,pinctrl";</div><div class='ctx'> 			reg = &lt;0x2 0x3d1f0000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -641,6 +896,41 @@</div><div class='ctx'> 			interrupts = &lt;AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		smc: smc@23e400000 {</div><div class='add'>+			compatible = "apple,t8103-smc", "apple,smc";</div><div class='add'>+			reg = &lt;0x2 0x3e400000 0x0 0x4000&gt;,</div><div class='add'>+				&lt;0x2 0x3fe00000 0x0 0x100000&gt;;</div><div class='add'>+			reg-names = "smc", "sram";</div><div class='add'>+			mboxes = &lt;&amp;smc_mbox&gt;;</div><div class='add'>+</div><div class='add'>+			smc_gpio: gpio {</div><div class='add'>+				compatible = "apple,smc-gpio";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			smc_reboot: reboot {</div><div class='add'>+				compatible = "apple,smc-reboot";</div><div class='add'>+				nvmem-cells = &lt;&amp;shutdown_flag&gt;, &lt;&amp;boot_stage&gt;,</div><div class='add'>+					&lt;&amp;boot_error_count&gt;, &lt;&amp;panic_count&gt;;</div><div class='add'>+				nvmem-cell-names = "shutdown_flag", "boot_stage",</div><div class='add'>+					"boot_error_count", "panic_count";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc_mbox: mbox@23e408000 {</div><div class='add'>+			compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+			reg = &lt;0x2 0x3e408000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 403 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+				"recv-empty", "recv-not-empty";</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_smc: pinctrl@23e820000 {</div><div class='ctx'> 			compatible = "apple,t8103-pinctrl", "apple,pinctrl";</div><div class='ctx'> 			reg = &lt;0x2 0x3e820000 0x0 0x4000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8112-j415.dts b/arch/arm64/boot/dts/apple/t8112-j415.dts<br/>new file mode 100644<br/>index 000000000000..b54e218e5384<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112-j415.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8112-j415.dts</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Apple MacBook Air (15-inch, M2, 2023)</div><div class='add'>+ *</div><div class='add'>+ * target-type: J415</div><div class='add'>+ *</div><div class='add'>+ * Copyright The Asahi Linux Contributors</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "t8112.dtsi"</div><div class='add'>+#include "t8112-jxxx.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "apple,j415", "apple,t8112", "apple,arm-platform";</div><div class='add'>+	model = "Apple MacBook Air (15-inch, M2, 2023)";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		bluetooth0 = &amp;bluetooth0;</div><div class='add'>+		wifi0 = &amp;wifi0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+		led-0 {</div><div class='add'>+			pwms = &lt;&amp;fpwm1 0 40000&gt;;</div><div class='add'>+			label = "kbd_backlight";</div><div class='add'>+			function = LED_FUNCTION_KBD_BACKLIGHT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Force the bus number assignments so that we can declare some of the</div><div class='add'>+ * on-board devices and properties that are populated by the bootloader</div><div class='add'>+ * (such as MAC addresses).</div><div class='add'>+ */</div><div class='add'>+&amp;port00 {</div><div class='add'>+	bus-range = &lt;1 1&gt;;</div><div class='add'>+	wifi0: wifi@0,0 {</div><div class='add'>+		compatible = "pci14e4,4433";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+		/* To be filled by the loader */</div><div class='add'>+		local-mac-address = [00 10 18 00 00 10];</div><div class='add'>+		apple,antenna-sku = "XX";</div><div class='add'>+		brcm,board-type = "apple,snake";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bluetooth0: bluetooth@0,1 {</div><div class='add'>+		compatible = "pci14e4,5f71";</div><div class='add'>+		reg = &lt;0x10100 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+		/* To be filled by the loader */</div><div class='add'>+		local-bd-address = [00 00 00 00 00 00];</div><div class='add'>+		brcm,board-type = "apple,snake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/* MagSafe port */</div><div class='add'>+	hpm5: usb-pd@3a {</div><div class='add'>+		compatible = "apple,cd321x";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pinctrl_ap&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "irq";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fpwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts/apple/t8112-j493.dts<br/>index 0ad908349f55..fb8ad7d4c65a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112-j493.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112-j493.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112-j493.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8112-j493.dts</a></div><div class='hunk'>@@ -17,8 +17,13 @@</div><div class='ctx'> 	compatible = "apple,j493", "apple,t8112", "apple,arm-platform";</div><div class='ctx'> 	model = "Apple MacBook Pro (13-inch, M2, 2022)";</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * All of those are used by the bootloader to pass calibration</div><div class='add'>+	 * blobs and other device-specific properties</div><div class='add'>+	 */</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		bluetooth0 = &amp;bluetooth0;</div><div class='add'>+		touchbar0 = &amp;touchbar0;</div><div class='ctx'> 		wifi0 = &amp;wifi0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +41,49 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * The driver depends on boot loader initialized state which resets when this</div><div class='add'>+ * power-domain is powered off. This happens on suspend or when the driver is</div><div class='add'>+ * missing during boot. Mark the domain as always on until the driver can</div><div class='add'>+ * handle this.</div><div class='add'>+ */</div><div class='add'>+&amp;ps_dispdfr_be {</div><div class='add'>+	apple,always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_dfr {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dfr_mipi_out {</div><div class='add'>+	dfr_mipi_out_panel: endpoint@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dfr_panel_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;displaydfr_mipi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	dfr_panel: panel@0 {</div><div class='add'>+		compatible = "apple,j493-summit", "apple,summit";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		max-brightness = &lt;255&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dfr_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dfr_mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;displaydfr_dart {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Force the bus number assignments so that we can declare some of the</div><div class='ctx'>  * on-board devices and properties that are populated by the bootloader</div><div class='ctx'>  * (such as MAC addresses).</div><div class='hunk'>@@ -67,3 +115,21 @@</div><div class='ctx'> &amp;fpwm1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;spi3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchbar0: touchbar@0 {</div><div class='add'>+		compatible = "apple,j493-touchbar";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;8000000&gt;;</div><div class='add'>+		spi-cs-setup-delay-ns = &lt;2000&gt;;</div><div class='add'>+		spi-cs-hold-delay-ns = &lt;2000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pinctrl_ap 170 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl_ap 174 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		firmware-name = "apple/dfrmtfw-j493.bin";</div><div class='add'>+		touchscreen-size-x = &lt;23045&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;640&gt;;</div><div class='add'>+		touchscreen-inverted-y;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi<br/>index f5edf61113e7..6da35496a4c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112-jxxx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8112-jxxx.dtsi</a></div><div class='hunk'>@@ -79,3 +79,5 @@</div><div class='ctx'> &amp;nco_clkref {</div><div class='ctx'> 	clock-frequency = &lt;900000000&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "spi1-nvram.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi<br/>index 1666e6ab250b..3f79878b25af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/apple/t8112.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/apple/t8112.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/apple/t8112.dtsi</a></div><div class='hunk'>@@ -19,6 +19,10 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		gpu = &amp;gpu;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -349,6 +353,13 @@</div><div class='ctx'> 		clock-output-names = "clkref";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk_200m: clock-200m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+		clock-output-names = "clk_200m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is a fabulated representation of the input clock</div><div class='ctx'> 	 * to NCO since we don't know the true clock tree.</div><div class='hunk'>@@ -359,6 +370,36 @@</div><div class='ctx'> 		clock-output-names = "nco_ref";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpu_globals: globals {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_a: hw-cal-a {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_hw_cal_b: hw-cal-b {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_handoff: uat-handoff {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_pagetables: uat-pagetables {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uat_ttbs: uat-ttbs {</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -367,6 +408,34 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		nonposted-mmio;</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@206400000 {</div><div class='add'>+			compatible = "apple,agx-g14g";</div><div class='add'>+			reg = &lt;0x2 0x6400000 0 0x40000&gt;,</div><div class='add'>+				&lt;0x2 0x4000000 0 0x1000000&gt;;</div><div class='add'>+			reg-names = "asc", "sgx";</div><div class='add'>+			mboxes = &lt;&amp;agx_mbox&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_gfx&gt;;</div><div class='add'>+			memory-region = &lt;&amp;uat_ttbs&gt;, &lt;&amp;uat_pagetables&gt;, &lt;&amp;uat_handoff&gt;,</div><div class='add'>+					&lt;&amp;gpu_hw_cal_a&gt;, &lt;&amp;gpu_hw_cal_b&gt;, &lt;&amp;gpu_globals&gt;;</div><div class='add'>+			memory-region-names = "ttbs", "pagetables", "handoff",</div><div class='add'>+					      "hw-cal-a", "hw-cal-b", "globals";</div><div class='add'>+</div><div class='add'>+			apple,firmware-abi = &lt;0 0 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		agx_mbox: mbox@206408000 {</div><div class='add'>+			compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+			reg = &lt;0x2 0x6408000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 709 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 710 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 711 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 712 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+				"recv-empty", "recv-not-empty";</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpufreq_e: cpufreq@210e20000 {</div><div class='ctx'> 			compatible = "apple,t8112-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='ctx'> 			reg = &lt;0x2 0x10e20000 0 0x1000&gt;;</div><div class='hunk'>@@ -379,6 +448,65 @@</div><div class='ctx'> 			#performance-domain-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		display_dfr: display-pipe@228200000 {</div><div class='add'>+			compatible = "apple,t8112-display-pipe", "apple,h7-display-pipe";</div><div class='add'>+			reg = &lt;0x2 0x28200000 0x0 0xc000&gt;,</div><div class='add'>+			      &lt;0x2 0x28400000 0x0 0x4000&gt;;</div><div class='add'>+			reg-names = "be", "fe";</div><div class='add'>+			power-domains = &lt;&amp;ps_dispdfr_fe&gt;, &lt;&amp;ps_dispdfr_be&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 614 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;AIC_IRQ 618 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "be", "fe";</div><div class='add'>+			iommus = &lt;&amp;displaydfr_dart 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				dfr_adp_out_mipi: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dfr_mipi_in_adp&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		displaydfr_dart: iommu@228304000 {</div><div class='add'>+			compatible = "apple,t8110-dart";</div><div class='add'>+			reg = &lt;0x2 0x28304000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 616 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_dispdfr_fe&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		displaydfr_mipi: dsi@228600000 {</div><div class='add'>+			compatible = "apple,t8112-display-pipe-mipi", "apple,h7-display-pipe-mipi";</div><div class='add'>+			reg = &lt;0x2 0x28600000 0x0 0x100000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ps_mipi_dsi&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dfr_mipi_in: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					dfr_mipi_in_adp: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;dfr_adp_out_mipi&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dfr_mipi_out: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sio_dart: iommu@235004000 {</div><div class='ctx'> 			compatible = "apple,t8110-dart";</div><div class='ctx'> 			reg = &lt;0x2 0x35004000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -467,6 +595,34 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi1: spi@235104000 {</div><div class='add'>+			compatible = "apple,t8112-spi", "apple,spi";</div><div class='add'>+			reg = &lt;0x2 0x35104000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 749 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_200m&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_spi1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi3: spi@23510c000 {</div><div class='add'>+			compatible = "apple,t8112-spi", "apple,spi";</div><div class='add'>+			reg = &lt;0x2 0x3510c000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 751 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi3_pins&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;ps_spi3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled"; /* only used in J493 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serial0: serial@235200000 {</div><div class='ctx'> 			compatible = "apple,s5l-uart";</div><div class='ctx'> 			reg = &lt;0x2 0x35200000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -626,13 +782,20 @@</div><div class='ctx'> 					 &lt;APPLE_PINMUX(130, 1)&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			spi3_pins: spi3-pins {</div><div class='add'>+			spi1_pins: spi1-pins {</div><div class='ctx'> 				pinmux = &lt;APPLE_PINMUX(46, 1)&gt;,</div><div class='ctx'> 					&lt;APPLE_PINMUX(47, 1)&gt;,</div><div class='ctx'> 					&lt;APPLE_PINMUX(48, 1)&gt;,</div><div class='ctx'> 					&lt;APPLE_PINMUX(49, 1)&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spi3_pins: spi3-pins {</div><div class='add'>+				pinmux = &lt;APPLE_PINMUX(93, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(94, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(95, 1)&gt;,</div><div class='add'>+					&lt;APPLE_PINMUX(96, 1)&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcie_pins: pcie-pins {</div><div class='ctx'> 				pinmux = &lt;APPLE_PINMUX(162, 1)&gt;,</div><div class='ctx'> 					 &lt;APPLE_PINMUX(163, 1)&gt;,</div><div class='hunk'>@@ -679,6 +842,98 @@</div><div class='ctx'> 			interrupts = &lt;AIC_IRQ 379 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		nub_spmi: spmi@23d714000 {</div><div class='add'>+			compatible = "apple,t8112-spmi", "apple,spmi";</div><div class='add'>+			reg = &lt;0x2 0x3d714000 0x0 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pmic1: pmic@e {</div><div class='add'>+				compatible = "apple,stowe-pmic", "apple,spmi-nvmem";</div><div class='add'>+				reg = &lt;0xe SPMI_USID&gt;;</div><div class='add'>+</div><div class='add'>+				nvmem-layout {</div><div class='add'>+					compatible = "fixed-layout";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					fault_shadow: fault-shadow@867b {</div><div class='add'>+						reg = &lt;0x867b 0x10&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					socd: socd@8b00 {</div><div class='add'>+						reg = &lt;0x8b00 0x400&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					boot_stage: boot-stage@f701 {</div><div class='add'>+						reg = &lt;0xf701 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					boot_error_count: boot-error-count@f702,0 {</div><div class='add'>+						reg = &lt;0xf702 0x1&gt;;</div><div class='add'>+						bits = &lt;0 4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					panic_count: panic-count@f702,4 {</div><div class='add'>+						reg = &lt;0xf702 0x1&gt;;</div><div class='add'>+						bits = &lt;4 4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					boot_error_stage: boot-error-stage@f703 {</div><div class='add'>+						reg = &lt;0xf703 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					shutdown_flag: shutdown-flag@f70f,3 {</div><div class='add'>+						reg = &lt;0xf70f 0x1&gt;;</div><div class='add'>+						bits = &lt;3 1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					pm_setting: pm-setting@f801 {</div><div class='add'>+						reg = &lt;0xf801 0x1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rtc_offset: rtc-offset@f900 {</div><div class='add'>+						reg = &lt;0xf900 0x6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc: smc@23e400000 {</div><div class='add'>+			compatible = "apple,t8112-smc", "apple,smc";</div><div class='add'>+			reg = &lt;0x2 0x3e400000 0x0 0x4000&gt;,</div><div class='add'>+				&lt;0x2 0x3fe00000 0x0 0x100000&gt;;</div><div class='add'>+			reg-names = "smc", "sram";</div><div class='add'>+			mboxes = &lt;&amp;smc_mbox&gt;;</div><div class='add'>+</div><div class='add'>+			smc_gpio: gpio {</div><div class='add'>+				compatible = "apple,smc-gpio";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			smc_reboot: reboot {</div><div class='add'>+				compatible = "apple,smc-reboot";</div><div class='add'>+				nvmem-cells = &lt;&amp;shutdown_flag&gt;, &lt;&amp;boot_stage&gt;,</div><div class='add'>+					&lt;&amp;boot_error_count&gt;, &lt;&amp;panic_count&gt;;</div><div class='add'>+				nvmem-cell-names = "shutdown_flag", "boot_stage",</div><div class='add'>+					"boot_error_count", "panic_count";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smc_mbox: mbox@23e408000 {</div><div class='add'>+			compatible = "apple,t8112-asc-mailbox", "apple,asc-mailbox-v4";</div><div class='add'>+			reg = &lt;0x2 0x3e408000 0x0 0x4000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+			interrupts = &lt;AIC_IRQ 499 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 500 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 501 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;AIC_IRQ 502 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "send-empty", "send-not-empty",</div><div class='add'>+				"recv-empty", "recv-not-empty";</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_smc: pinctrl@23e820000 {</div><div class='ctx'> 			compatible = "apple,t8112-pinctrl", "apple,pinctrl";</div><div class='ctx'> 			reg = &lt;0x2 0x3e820000 0x0 0x4000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile<br/>index d908e96d7ddc..f30ee045dc95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/Makefile</a></div><div class='hunk'>@@ -7,3 +7,4 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-base-revc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_VEXPRESS) += corstone1000-fvp.dtb corstone1000-mps3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_VEXPRESS) += morello-sdp.dtb morello-fvp.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts<br/>index abd013562995..66ba6b027193 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/corstone1000-fvp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/corstone1000-fvp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/corstone1000-fvp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/corstone1000-fvp.dts</a></div><div class='hunk'>@@ -49,3 +49,29 @@</div><div class='ctx'> 		clock-names = "smclk", "apb_pclk";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;cpus {</div><div class='add'>+	cpu1: cpu@1 {</div><div class='add'>+		device_type = "cpu";</div><div class='add'>+		compatible = "arm,cortex-a35";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		enable-method = "psci";</div><div class='add'>+		next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu2: cpu@2 {</div><div class='add'>+		device_type = "cpu";</div><div class='add'>+		compatible = "arm,cortex-a35";</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+		enable-method = "psci";</div><div class='add'>+		next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu3: cpu@3 {</div><div class='add'>+		device_type = "cpu";</div><div class='add'>+		compatible = "arm,cortex-a35";</div><div class='add'>+		reg = &lt;0x3&gt;;</div><div class='add'>+		enable-method = "psci";</div><div class='add'>+		next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi<br/>index bb9b96fb5314..f35a5c96f3da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/corstone1000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/corstone1000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/corstone1000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/corstone1000.dtsi</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cpus {</div><div class='add'>+	cpus: cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a35";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -108,7 +109,6 @@</div><div class='ctx'> 			reg = &lt;0x1a220000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='del'>-			clock-frequency = &lt;50000000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='ctx'> 			frame@1a230000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi<br/>index 083be35495b3..a4b2b78d4df3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/foundation-v8.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/foundation-v8.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/foundation-v8.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/foundation-v8.dtsi</a></div><div class='hunk'>@@ -77,7 +77,6 @@</div><div class='ctx'> 			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts<br/>index 19973ab4ea6b..68a69f17e93d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/fvp-base-revc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/fvp-base-revc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/fvp-base-revc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/fvp-base-revc.dts</a></div><div class='hunk'>@@ -44,6 +44,30 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				entry-latency-us = &lt;40&gt;;</div><div class='add'>+				exit-latency-us = &lt;100&gt;;</div><div class='add'>+				min-residency-us = &lt;150&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x1010000&gt;;</div><div class='add'>+				entry-latency-us = &lt;500&gt;;</div><div class='add'>+				exit-latency-us = &lt;1000&gt;;</div><div class='add'>+				min-residency-us = &lt;2500&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,armv8";</div><div class='hunk'>@@ -56,6 +80,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C0_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -69,6 +94,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C0_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -82,6 +108,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C0_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -95,6 +122,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C0_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu4: cpu@10000 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -108,6 +136,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C1_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu5: cpu@10100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -121,6 +150,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C1_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu6: cpu@10200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -134,6 +164,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C1_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		cpu7: cpu@10300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='hunk'>@@ -147,6 +178,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;C1_L2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0 &amp;CLUSTER_SLEEP_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		C0_L2: l2-cache0 {</div><div class='ctx'> 			compatible = "cache";</div><div class='hunk'>@@ -169,7 +201,7 @@</div><div class='ctx'> </div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='del'>-		reg = &lt;0x00000000 0x80000000 0 0x80000000&gt;,</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0 0x7c000000&gt;,</div><div class='ctx'> 		      &lt;0x00000008 0x80000000 0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -217,6 +249,19 @@</div><div class='ctx'> 			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	timer@2a810000 {</div><div class='add'>+		compatible = "arm,armv7-timer-mem";</div><div class='add'>+		reg = &lt;0x0 0x2a810000 0x0 0x10000&gt;;</div><div class='add'>+		ranges = &lt;0 0x0 0x2a820000 0x20000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		frame@2a830000 {</div><div class='add'>+			frame-number = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg = &lt;0x10000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu {</div><div class='ctx'> 		compatible = "arm,armv8-pmuv3";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -227,13 +272,67 @@</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ete-0 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-1 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-2 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-3 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-4 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-5 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-6 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-7 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	trbe {</div><div class='add'>+		compatible = "arm,trace-buffer-extension";</div><div class='add'>+		interrupts = &lt;GIC_PPI 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pci: pci@40000000 {</div><div class='ctx'> 		#address-cells = &lt;0x3&gt;;</div><div class='ctx'> 		#size-cells = &lt;0x2&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;0x1&gt;;</div><div class='ctx'> 		compatible = "pci-host-ecam-generic";</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		bus-range = &lt;0x0 0x1&gt;;</div><div class='add'>+		bus-range = &lt;0x0 0xff&gt;;</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0x0 0x10000000&gt;;</div><div class='ctx'> 		ranges = &lt;0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000&gt;;</div><div class='ctx'> 		interrupt-map = &lt;0 0 0 1 &amp;gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi<br/>index 055764d0b9e5..9ccb80821bdb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/juno-base.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/juno-base.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/juno-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/juno-base.dtsi</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> 	memtimer: timer@2a810000 {</div><div class='ctx'> 		compatible = "arm,armv7-timer-mem";</div><div class='ctx'> 		reg = &lt;0x0 0x2a810000 0x0 0x10000&gt;;</div><div class='del'>-		clock-frequency = &lt;50000000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0x0 0x2a820000 0x20000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/morello-fvp.dts b/arch/arm64/boot/dts/arm/morello-fvp.dts<br/>new file mode 100644<br/>index 000000000000..2072c0b72325<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/morello-fvp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/morello-fvp.dts</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-2024, Arm Limited. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "morello.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Arm Morello Fixed Virtual Platform";</div><div class='add'>+	compatible = "arm,morello-fvp", "arm,morello";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bp_refclock24mhz: clock-24000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "bp:clock24mhz";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	block_0: virtio_block@1c170000 {</div><div class='add'>+		compatible = "virtio,mmio";</div><div class='add'>+		reg = &lt;0x0 0x1c170000 0x0 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	net_0: virtio_net@1c180000 {</div><div class='add'>+		compatible = "virtio,mmio";</div><div class='add'>+		reg = &lt;0x0 0x1c180000 0x0 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rng_0: virtio_rng@1c190000 {</div><div class='add'>+		compatible = "virtio,mmio";</div><div class='add'>+		reg = &lt;0x0 0x1c190000 0x0 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p9_0: virtio_p9@1c1a0000 {</div><div class='add'>+		compatible = "virtio,mmio";</div><div class='add'>+		reg = &lt;0x0 0x1c1a0000 0x0 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kmi_0: kmi@1c150000 {</div><div class='add'>+		compatible = "arm,pl050", "arm,primecell";</div><div class='add'>+		reg = &lt;0x0 0x1c150000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;bp_refclock24mhz&gt;, &lt;&amp;bp_refclock24mhz&gt;;</div><div class='add'>+		clock-names = "KMIREFCLK", "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kmi_1: kmi@1c160000 {</div><div class='add'>+		compatible = "arm,pl050", "arm,primecell";</div><div class='add'>+		reg = &lt;0x0 0x1c160000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;bp_refclock24mhz&gt;, &lt;&amp;bp_refclock24mhz&gt;;</div><div class='add'>+		clock-names = "KMIREFCLK", "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_0: ethernet@1d100000 {</div><div class='add'>+		compatible = "smsc,lan91c111";</div><div class='add'>+		reg = &lt;0x0 0x1d100000 0x0 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/morello-sdp.dts b/arch/arm64/boot/dts/arm/morello-sdp.dts<br/>new file mode 100644<br/>index 000000000000..cee49dee7571<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/morello-sdp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/morello-sdp.dts</a></div><div class='hunk'>@@ -0,0 +1,157 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-2024, Arm Limited. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "morello.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Arm Morello System Development Platform";</div><div class='add'>+	compatible = "arm,morello-sdp", "arm,morello";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpu_aclk: clock-350000000 {</div><div class='add'>+		/* 77.1 MHz derived from 24 MHz reference clock */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;350000000&gt;;</div><div class='add'>+		clock-output-names = "aclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpu_pixel_clk: clock-148500000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;148500000&gt;;</div><div class='add'>+		clock-output-names = "pxclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0: i2c@1c0f0000 {</div><div class='add'>+		compatible = "cdns,i2c-r1p14";</div><div class='add'>+		reg = &lt;0x0 0x1c0f0000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;dpu_aclk&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		hdmi_tx: hdmi-transmitter@70 {</div><div class='add'>+			compatible = "nxp,tda998x";</div><div class='add'>+			reg = &lt;0x70&gt;;</div><div class='add'>+			video-ports = &lt;0x234501&gt;;</div><div class='add'>+			port {</div><div class='add'>+				tda998x_0_input: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dp_pl0_out0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0: display@2cc00000 {</div><div class='add'>+		compatible = "arm,mali-d32", "arm,mali-d71";</div><div class='add'>+		reg = &lt;0x0 0x2cc00000 0x0 0x20000&gt;;</div><div class='add'>+		interrupts = &lt;0 69 4&gt;;</div><div class='add'>+		clocks = &lt;&amp;dpu_aclk&gt;;</div><div class='add'>+		clock-names = "aclk";</div><div class='add'>+		iommus = &lt;&amp;smmu_dp 0&gt;, &lt;&amp;smmu_dp 1&gt;, &lt;&amp;smmu_dp 2&gt;, &lt;&amp;smmu_dp 3&gt;,</div><div class='add'>+			 &lt;&amp;smmu_dp 8&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pl0: pipeline@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;dpu_pixel_clk&gt;;</div><div class='add'>+			clock-names = "pxclk";</div><div class='add'>+			port {</div><div class='add'>+				dp_pl0_out0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;tda998x_0_input&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smmu_ccix: iommu@4f000000 {</div><div class='add'>+		compatible = "arm,smmu-v3";</div><div class='add'>+		reg = &lt;0x0 0x4f000000 0x0 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 228 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 230 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 41 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 229 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='add'>+		msi-parent = &lt;&amp;its1 0&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smmu_pcie: iommu@4f400000 {</div><div class='add'>+		compatible = "arm,smmu-v3";</div><div class='add'>+		reg = &lt;0x0 0x4f400000 0x0 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 235 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 237 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 40 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					&lt;GIC_SPI 236 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='add'>+		msi-parent = &lt;&amp;its2 0&gt;;</div><div class='add'>+		#iommu-cells = &lt;1&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_ctlr: pcie@28c0000000 {</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		compatible = "pci-host-ecam-generic";</div><div class='add'>+		reg = &lt;0x28 0xC0000000 0 0x10000000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00000000 0x00 0x6f000000 0x00 0x00800000&gt;,</div><div class='add'>+				&lt;0x02000000 0x00 0x60000000 0x00 0x60000000 0x00 0x0f000000&gt;,</div><div class='add'>+				&lt;0x42000000 0x09 0x00000000 0x09 0x00000000 0x1f 0xc0000000&gt;;</div><div class='add'>+		bus-range = &lt;0 255&gt;;</div><div class='add'>+		linux,pci-domain = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic 0 0 0 170 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic 0 0 0 171 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic 0 0 0 172 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		msi-map = &lt;0 &amp;its_pcie 0 0x10000&gt;;</div><div class='add'>+		iommu-map = &lt;0 &amp;smmu_pcie 0 0x10000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ccix_pcie_ctlr: pcie@4fc0000000 {</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		compatible = "pci-host-ecam-generic";</div><div class='add'>+		reg = &lt;0x4f 0xC0000000 0 0x10000000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00000000 0x00 0x7f000000 0x00 0x00800000&gt;,</div><div class='add'>+				&lt;0x02000000 0x00 0x70000000 0x00 0x70000000 0x00 0x0f000000&gt;,</div><div class='add'>+				&lt;0x42000000 0x30 0x00000000 0x30 0x00000000 0x1f 0xc0000000&gt;;</div><div class='add'>+		linux,pci-domain = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic 0 0 0 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic 0 0 0 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic 0 0 0 203 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic 0 0 0 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		msi-map = &lt;0 &amp;its_ccix 0 0x10000&gt;;</div><div class='add'>+		iommu-map = &lt;0 &amp;smmu_ccix 0 0x10000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi<br/>new file mode 100644<br/>index 000000000000..5bc1c725dc86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/morello.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/morello.dtsi</a></div><div class='hunk'>@@ -0,0 +1,323 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020-2024, Arm Limited. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	soc_refclk50mhz: clock-50000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		clock-output-names = "apb_pclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc_refclk85mhz: clock-85000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;85000000&gt;;</div><div class='add'>+		clock-output-names = "iofpga:aclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,rainier";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			/* 4 ways set associative */</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				/* 8 ways set associative */</div><div class='add'>+				cache-size = &lt;0x100000&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				cache-sets = &lt;2048&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,rainier";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			/* 4 ways set associative */</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_1: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				/* 8 ways set associative */</div><div class='add'>+				cache-size = &lt;0x100000&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				cache-sets = &lt;2048&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@10000 {</div><div class='add'>+			compatible = "arm,rainier";</div><div class='add'>+			reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			/* 4 ways set associative */</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+</div><div class='add'>+			l2_2: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				/* 8 ways set associative */</div><div class='add'>+				cache-size = &lt;0x100000&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				cache-sets = &lt;2048&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@10100 {</div><div class='add'>+			compatible = "arm,rainier";</div><div class='add'>+			reg = &lt;0x0 0x10100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			/* 4 ways set associative */</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_3&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+</div><div class='add'>+			l2_3: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				/* 8 ways set associative */</div><div class='add'>+				cache-size = &lt;0x100000&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				cache-sets = &lt;2048&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_0: l3-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "arm,scmi";</div><div class='add'>+			mbox-names = "tx", "rx";</div><div class='add'>+			mboxes = &lt;&amp;mailbox 1 0&gt;, &lt;&amp;mailbox 1 1&gt;;</div><div class='add'>+			shmem = &lt;&amp;cpu_scp_hpri0&gt;, &lt;&amp;cpu_scp_hpri1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_dvfs: protocol@13 {</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* The first bank of memory, memory map is actually provided by UEFI. */</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* [0x80000000-0xffffffff] */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x0 0x7f000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@8080000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* [0x8080000000-0x83f7ffffff] */</div><div class='add'>+		reg = &lt;0x00000080 0x80000000 0x3 0x78000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,rainier-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		secure-firmware@ff000000 {</div><div class='add'>+			reg = &lt;0x0 0xff000000 0x0 0x01000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spe-pmu {</div><div class='add'>+		compatible = "arm,statistical-profiling-extension-v1";</div><div class='add'>+		interrupts = &lt;GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		uart0: serial@2a400000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x2a400000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;soc_refclk50mhz&gt;, &lt;&amp;soc_refclk50mhz&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@30000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x30000000 0x0 0x10000&gt;,	/* GICD */</div><div class='add'>+			      &lt;0x0 0x300c0000 0x0 0x80000&gt;;	/* GICR */</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			its1: msi-controller@30040000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x30040000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			its2: msi-controller@30060000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x30060000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			its_ccix: msi-controller@30080000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x30080000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			its_pcie: msi-controller@300a0000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x300a0000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smmu_dp: iommu@2ce00000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x0 0x2ce00000 0x0 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 80 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 78 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror", "cmdq-sync";</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox: mhu@45000000 {</div><div class='add'>+			compatible = "arm,mhu-doorbell", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x45000000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;soc_refclk50mhz&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram: sram@6000000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x0 0x06000000 0x0 0x8000&gt;;</div><div class='add'>+			ranges = &lt;0 0x0 0x06000000 0x8000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			cpu_scp_hpri0: scp-sram@0 {</div><div class='add'>+				compatible = "arm,scmi-shmem";</div><div class='add'>+				reg = &lt;0x0 0x80&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu_scp_hpri1: scp-sram@80 {</div><div class='add'>+				compatible = "arm,scmi-shmem";</div><div class='add'>+				reg = &lt;0x80 0x80&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts<br/>index 7f7226711d4b..a4a29193d4eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts</a></div><div class='hunk'>@@ -116,7 +116,6 @@</div><div class='ctx'> 			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu {</div><div class='head'>diff --git a/arch/arm64/boot/dts/axiado/Makefile b/arch/arm64/boot/dts/axiado/Makefile<br/>new file mode 100644<br/>index 000000000000..6676ad07db61<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/axiado/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/axiado/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_AXIADO) += ax3000-evk.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/axiado/ax3000-evk.dts b/arch/arm64/boot/dts/axiado/ax3000-evk.dts<br/>new file mode 100644<br/>index 000000000000..b86e96962557<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/axiado/ax3000-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/axiado/ax3000-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "ax3000.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Axiado AX3000 EVK";</div><div class='add'>+	compatible = "axiado,ax3000-evk", "axiado,ax3000";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial3:115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* Cortex-A53 will use following memory map */</div><div class='add'>+		reg = &lt;0x00000000 0x3d000000 0x00000000 0x23000000&gt;,</div><div class='add'>+		      &lt;0x00000004 0x00000000 0x00000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GPIO bank 0 - 7 */</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/axiado/ax3000.dtsi b/arch/arm64/boot/dts/axiado/ax3000.dtsi<br/>new file mode 100644<br/>index 000000000000..792f52e0c7dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/axiado/ax3000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/axiado/ax3000.dtsi</a></div><div class='hunk'>@@ -0,0 +1,520 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/memreserve/ 0x3c0013a0 0x00000008;	/* cpu-release-addr */</div><div class='add'>+/ {</div><div class='add'>+	model = "Axiado AX3000";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0x0 0x3c0013a0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0x0 0x3c0013a0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0x0 0x3c0013a0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = &lt;0x0 0x3c0013a0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;1024&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		clk_xin: clock-200000000 {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			clock-output-names = "clk_xin";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		refclk: clock-125000000 {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+		gic500: interrupt-controller@80300000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x00 0x80300000 0x00 0x10000&gt;,</div><div class='add'>+			      &lt;0x00 0x80380000 0x00 0x80000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIO Controller banks 0 - 7 */</div><div class='add'>+		gpio0: gpio-controller@80500000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80500000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio-controller@80580000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80580000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio-controller@80600000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80600000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio-controller@80680000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80680000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio-controller@80700000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80700000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio5: gpio-controller@80780000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80780000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio6: gpio-controller@80800000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80800000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio7: gpio-controller@80880000 {</div><div class='add'>+			compatible = "axiado,ax3000-gpio", "cdns,gpio-r1p02";</div><div class='add'>+			reg = &lt;0x00 0x80880000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* I3C Controller 0 - 16 */</div><div class='add'>+		i3c0: i3c@80500400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80500400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c1: i3c@80500800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80500800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c2: i3c@80580400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80580400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c3: i3c@80580800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80580800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c4: i3c@80600400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80600400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c5: i3c@80600800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80600800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c6: i3c@80680400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80680400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c7: i3c@80680800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80680800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c8: i3c@80700400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80700400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c9: i3c@80700800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80700800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c10: i3c@80780400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80780400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c11: i3c@80780800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80780800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c12: i3c@80800400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80800400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c13: i3c@80800800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80800800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c14: i3c@80880400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80880400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c15: i3c@80880800 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80880800 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c16: i3c@80620400 {</div><div class='add'>+			compatible = "axiado,ax3000-i3c", "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x00 0x80620400 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;clk_xin&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@80520000 {</div><div class='add'>+			compatible = "axiado,ax3000-uart", "cdns,uart-r1p12";</div><div class='add'>+			reg = &lt;0x00 0x80520000 0x00 0x100&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-names = "uart_clk", "pclk";</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;refclk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@805a0000 {</div><div class='add'>+			compatible = "axiado,ax3000-uart", "cdns,uart-r1p12";</div><div class='add'>+			reg = &lt;0x00 0x805A0000 0x00 0x100&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-names = "uart_clk", "pclk";</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;refclk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@80620000 {</div><div class='add'>+			compatible = "axiado,ax3000-uart", "cdns,uart-r1p12";</div><div class='add'>+			reg = &lt;0x00 0x80620000 0x00 0x100&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-names = "uart_clk", "pclk";</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;refclk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@80520800 {</div><div class='add'>+			compatible = "axiado,ax3000-uart", "cdns,uart-r1p12";</div><div class='add'>+			reg = &lt;0x00 0x80520800 0x00 0x100&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-names = "uart_clk", "pclk";</div><div class='add'>+			clocks = &lt;&amp;refclk &amp;refclk&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			   &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			   &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			   &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/blaize/Makefile b/arch/arm64/boot/dts/blaize/Makefile<br/>new file mode 100644<br/>index 000000000000..7e10b3199e6c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/blaize/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/blaize/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+dtb-$(CONFIG_ARCH_BLAIZE) += blaize-blzp1600-cb2.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts<br/>new file mode 100644<br/>index 000000000000..fb5415eb347a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Blaize, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "blaize-blzp1600-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Blaize BLZP1600 SoM1600P CB2 Development Board";</div><div class='add'>+</div><div class='add'>+	compatible = "blaize,blzp1600-cb2", "blaize,blzp1600";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio_expander: gpio@74 {</div><div class='add'>+		compatible = "ti,tca9539";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "RSP_PIN_7",	/* GPIO_0 */</div><div class='add'>+				  "RSP_PIN_11",	/* GPIO_1 */</div><div class='add'>+				  "RSP_PIN_13",	/* GPIO_2 */</div><div class='add'>+				  "RSP_PIN_15",	/* GPIO_3 */</div><div class='add'>+				  "RSP_PIN_27",	/* GPIO_4 */</div><div class='add'>+				  "RSP_PIN_29",	/* GPIO_5 */</div><div class='add'>+				  "RSP_PIN_31",	/* GPIO_6 */</div><div class='add'>+				  "RSP_PIN_33",	/* GPIO_7 */</div><div class='add'>+				  "RSP_PIN_37",	/* GPIO_8 */</div><div class='add'>+				  "RSP_PIN_16",	/* GPIO_9 */</div><div class='add'>+				  "RSP_PIN_18",	/* GPIO_10 */</div><div class='add'>+				  "RSP_PIN_22",	/* GPIO_11 */</div><div class='add'>+				  "RSP_PIN_28",	/* GPIO_12 */</div><div class='add'>+				  "RSP_PIN_32",	/* GPIO_13 */</div><div class='add'>+				  "RSP_PIN_36",	/* GPIO_14 */</div><div class='add'>+				  "TP31";	/* GPIO_15 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_expander_m2: gpio@75 {</div><div class='add'>+		compatible = "ti,tca9539";</div><div class='add'>+		reg = &lt;0x75&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "M2_W_DIS1_N",	/* GPIO_0 */</div><div class='add'>+				  "M2_W_DIS2_N",	/* GPIO_1 */</div><div class='add'>+				  "M2_UART_WAKE_N",	/* GPIO_2 */</div><div class='add'>+				  "M2_COEX3",		/* GPIO_3 */</div><div class='add'>+				  "M2_COEX_RXD",	/* GPIO_4 */</div><div class='add'>+				  "M2_COEX_TXD",	/* GPIO_5 */</div><div class='add'>+				  "M2_VENDOR_PIN40",	/* GPIO_6 */</div><div class='add'>+				  "M2_VENDOR_PIN42",	/* GPIO_7 */</div><div class='add'>+				  "M2_VENDOR_PIN38",	/* GPIO_8 */</div><div class='add'>+				  "M2_SDIO_RST_N",	/* GPIO_9 */</div><div class='add'>+				  "M2_SDIO_WAKE_N",	/* GPIO_10 */</div><div class='add'>+				  "M2_PETN1",		/* GPIO_11 */</div><div class='add'>+				  "M2_PERP1",		/* GPIO_12 */</div><div class='add'>+				  "M2_PERN1",		/* GPIO_13 */</div><div class='add'>+				  "UIM_SWP",		/* GPIO_14 */</div><div class='add'>+				  "UART1_TO_RSP";	/* GPIO_15 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	gpio-line-names = "PERST_N",		/* GPIO_0 */</div><div class='add'>+			  "LM96063_ALERT_N",	/* GPIO_1 */</div><div class='add'>+			  "INA3221_PV",		/* GPIO_2 */</div><div class='add'>+			  "INA3221_CRIT",	/* GPIO_3 */</div><div class='add'>+			  "INA3221_WARN",	/* GPIO_4 */</div><div class='add'>+			  "INA3221_TC",		/* GPIO_5 */</div><div class='add'>+			  "QSPI0_RST_N",	/* GPIO_6 */</div><div class='add'>+			  "LM96063_TCRIT_N",	/* GPIO_7 */</div><div class='add'>+			  "DSI_TCH_INT",	/* GPIO_8 */</div><div class='add'>+			  "DSI_RST",		/* GPIO_9 */</div><div class='add'>+			  "DSI_BL",		/* GPIO_10 */</div><div class='add'>+			  "DSI_INT",		/* GPIO_11 */</div><div class='add'>+			  "ETH_RST",		/* GPIO_12 */</div><div class='add'>+			  "CSI0_RST",		/* GPIO_13 */</div><div class='add'>+			  "CSI0_PWDN",		/* GPIO_14 */</div><div class='add'>+			  "CSI1_RST",		/* GPIO_15 */</div><div class='add'>+			  "CSI1_PWDN",		/* GPIO_16 */</div><div class='add'>+			  "CSI2_RST",		/* GPIO_17 */</div><div class='add'>+			  "CSI2_PWDN",		/* GPIO_18 */</div><div class='add'>+			  "CSI3_RST",		/* GPIO_19 */</div><div class='add'>+			  "CSI3_PWDN",		/* GPIO_20 */</div><div class='add'>+			  "ADAC_RST",		/* GPIO_21 */</div><div class='add'>+			  "SD_SW_VDD",		/* GPIO_22 */</div><div class='add'>+			  "SD_PON_VDD",		/* GPIO_23 */</div><div class='add'>+			  "GPIO_EXP_INT",	/* GPIO_24 */</div><div class='add'>+			  "BOARD_ID_0",		/* GPIO_25 */</div><div class='add'>+			  "SDIO1_SW_VDD",	/* GPIO_26 */</div><div class='add'>+			  "SDIO1_PON_VDD",	/* GPIO_27 */</div><div class='add'>+			  "SDIO2_SW_VDD",	/* GPIO_28 */</div><div class='add'>+			  "SDIO2_PON_VDD",	/* GPIO_29 */</div><div class='add'>+			  "BOARD_ID_1",		/* GPIO_30 */</div><div class='add'>+			  "BOARD_ID_2";		/* GPIO_31 */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi<br/>new file mode 100644<br/>index 000000000000..bfdff5953edd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Blaize, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "blaize-blzp1600.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x1 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2c4 bus is available only on the SoM, not on the board */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi<br/>new file mode 100644<br/>index 000000000000..5a6c882b2f57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Blaize, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			arm,smc-id = &lt;0x82002000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			shmem = &lt;&amp;scmi0_shm&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_rst: protocol@16 {</div><div class='add'>+				reg = &lt;0x16&gt;;</div><div class='add'>+				#reset-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* SCMI reserved buffer space on DDR space */</div><div class='add'>+		scmi0_shm: scmi-shmem@800 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x800 0x0 0x80&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = /* Physical Secure PPI */</div><div class='add'>+			     &lt;GIC_PPI 13 (GIC_CPU_MASK_RAW(0x3) |</div><div class='add'>+					  IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     /* Physical Non-Secure PPI */</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_RAW(0x3) |</div><div class='add'>+					  IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     /* Hypervisor PPI */</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_RAW(0x3) |</div><div class='add'>+					  IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     /* Virtual PPI */</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_RAW(0x3) |</div><div class='add'>+					  IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@200000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x2 0x0 0x850000&gt;;</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@410000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x410000 0x20000&gt;,</div><div class='add'>+			      &lt;0x420000 0x20000&gt;,</div><div class='add'>+			      &lt;0x440000 0x20000&gt;,</div><div class='add'>+			      &lt;0x460000 0x20000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_RAW(0x3) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@4c0000 {</div><div class='add'>+			compatible = "blaize,blzp1600-gpio";</div><div class='add'>+			reg = &lt;0x4c0000 0x1000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@4d0000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x4d0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 59&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 59&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@4e0000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x4e0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 60&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 60&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@4f0000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x4f0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 54&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 54&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@500000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x500000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 55&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 55&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@510000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x510000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 56&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 56&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@520000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x520000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 57&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 57&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@530000 {</div><div class='add'>+			compatible = "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x530000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 58&gt;;</div><div class='add'>+			resets = &lt;&amp;scmi_rst 58&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arm_cc712: crypto@550000 {</div><div class='add'>+			compatible = "arm,cryptocell-712-ree";</div><div class='add'>+			reg = &lt;0x550000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk 7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile<br/>index 92565e9781ad..83d45afc6588 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/Makefile</a></div><div class='hunk'>@@ -7,11 +7,15 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \</div><div class='ctx'> 			      bcm2711-rpi-4-b.dtb \</div><div class='ctx'> 			      bcm2711-rpi-cm4-io.dtb \</div><div class='ctx'> 			      bcm2712-rpi-5-b.dtb \</div><div class='add'>+			      bcm2712-rpi-5-b-ovl-rp1.dtb \</div><div class='add'>+			      bcm2712-d-rpi-5-b.dtb \</div><div class='add'>+			      bcm2837-rpi-2-b.dtb \</div><div class='ctx'> 			      bcm2837-rpi-3-a-plus.dtb \</div><div class='ctx'> 			      bcm2837-rpi-3-b.dtb \</div><div class='ctx'> 			      bcm2837-rpi-3-b-plus.dtb \</div><div class='ctx'> 			      bcm2837-rpi-cm3-io3.dtb \</div><div class='del'>-			      bcm2837-rpi-zero-2-w.dtb</div><div class='add'>+			      bcm2837-rpi-zero-2-w.dtb \</div><div class='add'>+			      rp1.dtbo</div><div class='ctx'> </div><div class='ctx'> subdir-y	+= bcmbca</div><div class='ctx'> subdir-y	+= northstar2</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts<br/>new file mode 100644<br/>index 000000000000..7de24d60bcd1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "bcm2712-rpi-5-b.dts"</div><div class='add'>+</div><div class='add'>+&amp;gio_aon {</div><div class='add'>+	brcm,gpio-bank-widths = &lt;15 6&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"RP1_SDA", // AON_GPIO_00</div><div class='add'>+		"RP1_SCL", // AON_GPIO_01</div><div class='add'>+		"RP1_RUN", // AON_GPIO_02</div><div class='add'>+		"SD_IOVDD_SEL", // AON_GPIO_03</div><div class='add'>+		"SD_PWR_ON", // AON_GPIO_04</div><div class='add'>+		"SD_CDET_N", // AON_GPIO_05</div><div class='add'>+		"SD_FLG_N", // AON_GPIO_06</div><div class='add'>+		"", // AON_GPIO_07</div><div class='add'>+		"2712_WAKE", // AON_GPIO_08</div><div class='add'>+		"2712_STAT_LED", // AON_GPIO_09</div><div class='add'>+		"", // AON_GPIO_10</div><div class='add'>+		"", // AON_GPIO_11</div><div class='add'>+		"PMIC_INT", // AON_GPIO_12</div><div class='add'>+		"UART_TX_FS", // AON_GPIO_13</div><div class='add'>+		"UART_RX_FS", // AON_GPIO_14</div><div class='add'>+		"", // AON_GPIO_15</div><div class='add'>+		"", // AON_GPIO_16</div><div class='add'>+</div><div class='add'>+		// Pad bank0 out to 32 entries</div><div class='add'>+		"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+</div><div class='add'>+		"HDMI0_SCL", // AON_SGPIO_00</div><div class='add'>+		"HDMI0_SDA", // AON_SGPIO_01</div><div class='add'>+		"HDMI1_SCL", // AON_SGPIO_02</div><div class='add'>+		"HDMI1_SDA", // AON_SGPIO_03</div><div class='add'>+		"PMIC_SCL", // AON_SGPIO_04</div><div class='add'>+		"PMIC_SDA"; // AON_SGPIO_05</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts<br/>new file mode 100644<br/>index 000000000000..04738bf281eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts</a></div><div class='hunk'>@@ -0,0 +1,254 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "bcm2712.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "raspberrypi,5-model-b", "brcm,bcm2712";</div><div class='add'>+	model = "Raspberry Pi 5";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial10 = &amp;uart10;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial10:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_rp1_xosc: clock-50000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "rp1-xosc";</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Will be filled by the bootloader */</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0 0 0x28000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwr_button_default&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		power_button: power-button {</div><div class='add'>+			label = "pwr_button";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gio 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_io_1v8_reg: sd-io-1v8-reg {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "vdd-sd-io";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-settling-time-us = &lt;5000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gio_aon 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 1&gt;,</div><div class='add'>+			 &lt;3300000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_vcc_reg: sd-vcc-reg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc-sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gio_aon 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl_on_reg: wl-on-reg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "wl-on-regulator";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;wl_on_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		gpio = &lt;&amp;gio 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;150000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bt_shutdown_default: bt-shutdown-default-state {</div><div class='add'>+		function = "gpio";</div><div class='add'>+		pins = "gpio29";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_sd_default: emmc-sd-default-state {</div><div class='add'>+		pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwr_button_default: pwr-button-default-state {</div><div class='add'>+		function = "gpio";</div><div class='add'>+		pins = "gpio20";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio2_30_default: sdio2-30-default-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			function = "sd2";</div><div class='add'>+			pins = "gpio30";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		cmd-pins {</div><div class='add'>+			function = "sd2";</div><div class='add'>+			pins = "gpio31";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		dat-pins {</div><div class='add'>+			function = "sd2";</div><div class='add'>+			pins = "gpio32", "gpio33", "gpio34", "gpio35";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uarta_24_default: uarta-24-default-state {</div><div class='add'>+		rts-pins {</div><div class='add'>+			function = "uart0";</div><div class='add'>+			pins = "gpio24";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		cts-pins {</div><div class='add'>+			function = "uart0";</div><div class='add'>+			pins = "gpio25";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		txd-pins {</div><div class='add'>+			function = "uart0";</div><div class='add'>+			pins = "gpio26";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		rxd-pins {</div><div class='add'>+			function = "uart0";</div><div class='add'>+			pins = "gpio27";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl_on_default: wl-on-default-state {</div><div class='add'>+		function = "gpio";</div><div class='add'>+		pins = "gpio28";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_aon {</div><div class='add'>+	emmc_aon_cd_default: emmc-aon-cd-default-state {</div><div class='add'>+		function = "sd_card_g";</div><div class='add'>+		pins = "aon_gpio5";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector</div><div class='add'>+ * labeled "UART", i.e. the interface with the system console.</div><div class='add'>+ */</div><div class='add'>+&amp;uart10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDIO1 is used to drive the SD card */</div><div class='add'>+&amp;sdio1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_sd_default&gt;, &lt;&amp;emmc_aon_cd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vqmmc-supply = &lt;&amp;sd_io_1v8_reg&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;sd_vcc_reg&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-ddr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	cd-gpios = &lt;&amp;gio_aon 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdio2_30_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;wl_on_reg&gt;;</div><div class='add'>+	sd-uhs-ddr50;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	wifi: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	firmware: firmware {</div><div class='add'>+		compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;mailbox&gt;;</div><div class='add'>+		dma-ranges;</div><div class='add'>+</div><div class='add'>+		firmware_clocks: clocks {</div><div class='add'>+			compatible = "raspberrypi,firmware-clocks";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset: reset {</div><div class='add'>+			compatible = "raspberrypi,firmware-reset";</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	power: power {</div><div class='add'>+		compatible = "raspberrypi,bcm2835-power";</div><div class='add'>+		firmware = &lt;&amp;firmware&gt;;</div><div class='add'>+		#power-domain-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uarta communicates with the BT module */</div><div class='add'>+&amp;uarta {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uarta_24_default &amp;bt_shutdown_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth: bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gio 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hvs {</div><div class='add'>+	clocks = &lt;&amp;firmware_clocks 4&gt;, &lt;&amp;firmware_clocks 16&gt;;</div><div class='add'>+	clock-names = "core", "disp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	clocks = &lt;&amp;firmware_clocks 13&gt;, &lt;&amp;firmware_clocks 14&gt;, &lt;&amp;dvp 0&gt;, &lt;&amp;clk_27MHz&gt;;</div><div class='add'>+	clock-names = "hdmi", "bvb", "audio", "cec";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	clocks = &lt;&amp;firmware_clocks 13&gt;, &lt;&amp;firmware_clocks 14&gt;, &lt;&amp;dvp 1&gt;, &lt;&amp;clk_27MHz&gt;;</div><div class='add'>+	clock-names = "hdmi", "bvb", "audio", "cec";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts<br/>index 2bdbb6780242..b8f256545022 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts</a></div><div class='hunk'>@@ -1,64 +1,58 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include "bcm2712.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	compatible = "raspberrypi,5-model-b", "brcm,bcm2712";</div><div class='del'>-	model = "Raspberry Pi 5";</div><div class='add'>+/*</div><div class='add'>+ * bcm2712-rpi-5-b-ovl-rp1.dts is the overlay-ready DT which will make</div><div class='add'>+ * the RP1 driver to load the RP1 dtb overlay at runtime, while</div><div class='add'>+ * bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it</div><div class='add'>+ * already contains RP1 node, so no overlay is loaded nor needed).</div><div class='add'>+ * This file is intended to host the override nodes for the RP1 peripherals,</div><div class='add'>+ * e.g. to declare the phy of the ethernet interface or the custom pin setup</div><div class='add'>+ * for several RP1 peripherals.</div><div class='add'>+ * This in turn is due to the fact that there's no current generic</div><div class='add'>+ * infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) that</div><div class='add'>+ * are not yet defined in the DT since they are loaded at runtime via overlay.</div><div class='add'>+ * All other nodes that do not have anything to do with RP1 should be added</div><div class='add'>+ * to the included bcm2712-rpi-5-b-ovl-rp1.dts instead.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		serial10 = &amp;uart10;</div><div class='del'>-	};</div><div class='add'>+/dts-v1/;</div><div class='ctx'> </div><div class='del'>-	chosen: chosen {</div><div class='del'>-		stdout-path = "serial10:115200n8";</div><div class='del'>-	};</div><div class='add'>+#include "bcm2712-rpi-5-b-ovl-rp1.dts"</div><div class='ctx'> </div><div class='del'>-	/* Will be filled by the bootloader */</div><div class='del'>-	memory@0 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0 0 0 0x28000000&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	#include "rp1-nexus.dtsi"</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	sd_io_1v8_reg: sd-io-1v8-reg {</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='del'>-		regulator-name = "vdd-sd-io";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-settling-time-us = &lt;5000&gt;;</div><div class='del'>-		gpios = &lt;&amp;gio_aon 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		states = &lt;1800000 1&gt;,</div><div class='del'>-			 &lt;3300000 0&gt;;</div><div class='add'>+&amp;rp1_eth {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;rp1_gpio 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;5000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy1: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	sd_vcc_reg: sd-vcc-reg {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc-sd";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gio_aon 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+&amp;rp1_gpio {</div><div class='add'>+	usb_vbus_default_state: usb-vbus-default-state {</div><div class='add'>+		function = "vbus1";</div><div class='add'>+		groups = "vbus1";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector</div><div class='del'>- * labeled "UART", i.e. the interface with the system console.</div><div class='del'>- */</div><div class='del'>-&amp;uart10 {</div><div class='add'>+&amp;rp1_usb0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb_vbus_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* SDIO1 is used to drive the SD card */</div><div class='del'>-&amp;sdio1 {</div><div class='del'>-	vqmmc-supply = &lt;&amp;sd_io_1v8_reg&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;sd_vcc_reg&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-ddr50;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='add'>+&amp;rp1_usb1 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi<br/>index 6e5a984c1d4e..e77a66adc22a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcm2712.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2712.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcm2712.dtsi</a></div><div class='hunk'>@@ -38,6 +38,13 @@</div><div class='ctx'> 			clock-frequency = &lt;200000000&gt;;</div><div class='ctx'> 			clock-output-names = "emmc2-clock";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		clk_sw_baud: clk-sw-baud {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;96000000&gt;;</div><div class='add'>+			clock-output-names = "sw-baud";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus: cpus {</div><div class='hunk'>@@ -64,10 +71,10 @@</div><div class='ctx'> 			i-cache-sets = &lt;256&gt;; // 64KiB(size)/64(line-size)=1024ways/4-way set</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache_l0&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_cache_l0: l2-cache-l0 {</div><div class='add'>+			l2_cache_l0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-size = &lt;0x80000&gt;;</div><div class='del'>-				cache-line-size = &lt;128&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				cache-sets = &lt;1024&gt;; //512KiB(size)/64(line-size)=8192ways/8-way set</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='hunk'>@@ -88,10 +95,10 @@</div><div class='ctx'> 			i-cache-sets = &lt;256&gt;; // 64KiB(size)/64(line-size)=1024ways/4-way set</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache_l1&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_cache_l1: l2-cache-l1 {</div><div class='add'>+			l2_cache_l1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-size = &lt;0x80000&gt;;</div><div class='del'>-				cache-line-size = &lt;128&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				cache-sets = &lt;1024&gt;; //512KiB(size)/64(line-size)=8192ways/8-way set</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='hunk'>@@ -112,10 +119,10 @@</div><div class='ctx'> 			i-cache-sets = &lt;256&gt;; // 64KiB(size)/64(line-size)=1024ways/4-way set</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache_l2&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_cache_l2: l2-cache-l2 {</div><div class='add'>+			l2_cache_l2: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-size = &lt;0x80000&gt;;</div><div class='del'>-				cache-line-size = &lt;128&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				cache-sets = &lt;1024&gt;; //512KiB(size)/64(line-size)=8192ways/8-way set</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='hunk'>@@ -136,10 +143,10 @@</div><div class='ctx'> 			i-cache-sets = &lt;256&gt;; // 64KiB(size)/64(line-size)=1024ways/4-way set</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache_l3&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_cache_l3: l2-cache-l3 {</div><div class='add'>+			l2_cache_l3: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-size = &lt;0x80000&gt;;</div><div class='del'>-				cache-line-size = &lt;128&gt;;</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				cache-sets = &lt;1024&gt;; //512KiB(size)/64(line-size)=8192ways/8-way set</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='hunk'>@@ -192,6 +199,12 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+		pcie_rescal: reset-controller@119500 {</div><div class='add'>+			compatible = "brcm,bcm7216-pcie-sata-rescal";</div><div class='add'>+			reg = &lt;0x00119500 0x10&gt;;</div><div class='add'>+			#reset-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sdio1: mmc@fff000 {</div><div class='ctx'> 			compatible = "brcm,bcm2712-sdhci",</div><div class='ctx'> 				     "brcm,sdhci-brcmstb";</div><div class='hunk'>@@ -204,6 +217,12 @@</div><div class='ctx'> 			mmc-ddr-3_3v;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		bcm_reset: reset-controller@1504318 {</div><div class='add'>+			compatible = "brcm,brcmstb-reset";</div><div class='add'>+			reg = &lt;0x01504318 0x30&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		system_timer: timer@7c003000 {</div><div class='ctx'> 			compatible = "brcm,bcm2835-system-timer";</div><div class='ctx'> 			reg = &lt;0x7c003000 0x1000&gt;;</div><div class='hunk'>@@ -221,21 +240,49 @@</div><div class='ctx'> 			#mbox-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		local_intc: interrupt-controller@7cd00000 {</div><div class='del'>-			compatible = "brcm,bcm2836-l1-intc";</div><div class='del'>-			reg = &lt;0x7cd00000 0x100&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		uart10: serial@7d001000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x7d001000 0x200&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk_uart&gt;, &lt;&amp;clk_vpu&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='del'>-			arm,primecell-periphid = &lt;0x00241011&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0x00341011&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pinctrl: pinctrl@7d504100 {</div><div class='add'>+			compatible = "brcm,bcm2712c0-pinctrl";</div><div class='add'>+			reg = &lt;0x7d504100 0x30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gio: gpio@7d508500 {</div><div class='add'>+			compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";</div><div class='add'>+			reg = &lt;0x7d508500 0x40&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_irq&gt;;</div><div class='add'>+			interrupts = &lt;0&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			brcm,gpio-bank-widths = &lt;32 22&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uarta: serial@7d50c000 {</div><div class='add'>+			compatible = "brcm,bcm7271-uart";</div><div class='add'>+			reg = &lt;0x7d50c000 0x20&gt;;</div><div class='add'>+			reg-names = "uart";</div><div class='add'>+			clocks = &lt;&amp;clk_sw_baud&gt;;</div><div class='add'>+			clock-names = "sw_baud";</div><div class='add'>+			interrupts = &lt;GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uart";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aon: pinctrl@7d510700 {</div><div class='add'>+			compatible = "brcm,bcm2712c0-aon-pinctrl";</div><div class='add'>+			reg = &lt;0x7d510700 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		interrupt-controller@7d517000 {</div><div class='ctx'> 			compatible = "brcm,bcm7271-l2-intc";</div><div class='ctx'> 			reg = &lt;0x7d517000 0x10&gt;;</div><div class='hunk'>@@ -256,6 +303,21 @@</div><div class='ctx'> 			 */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdio2: mmc@1100000 {</div><div class='add'>+			compatible = "brcm,bcm2712-sdhci",</div><div class='add'>+				     "brcm,sdhci-brcmstb";</div><div class='add'>+			reg = &lt;0x01100000  0x260&gt;,</div><div class='add'>+			      &lt;0x01100400  0x200&gt;;</div><div class='add'>+			reg-names = "host", "cfg";</div><div class='add'>+			interrupts = &lt;GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_emmc2&gt;;</div><div class='add'>+			clock-names = "sw_sdio";</div><div class='add'>+			sdhci-caps-mask = &lt;0x0000C000 0x0&gt;;</div><div class='add'>+			sdhci-caps = &lt;0x0 0x0&gt;;</div><div class='add'>+			mmc-ddr-3_3v;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gicv2: interrupt-controller@7fff9000 {</div><div class='ctx'> 			compatible = "arm,gic-400";</div><div class='ctx'> 			reg = &lt;0x7fff9000 0x1000&gt;,</div><div class='hunk'>@@ -263,8 +325,310 @@</div><div class='ctx'> 			      &lt;0x7fffc000 0x2000&gt;,</div><div class='ctx'> 			      &lt;0x7fffe000 0x2000&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		aon_intr: interrupt-controller@7d510600 {</div><div class='add'>+			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";</div><div class='add'>+			reg = &lt;0x7d510600 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pixelvalve0: pixelvalve@7c410000 {</div><div class='add'>+			compatible = "brcm,bcm2712-pixelvalve0";</div><div class='add'>+			reg = &lt;0x7c410000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pixelvalve1: pixelvalve@7c411000 {</div><div class='add'>+			compatible = "brcm,bcm2712-pixelvalve1";</div><div class='add'>+			reg = &lt;0x7c411000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mop: mop@7c500000 {</div><div class='add'>+			compatible = "brcm,bcm2712-mop";</div><div class='add'>+			reg = &lt;0x7c500000 0x28&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;disp_intr&gt;;</div><div class='add'>+			interrupts = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		moplet: moplet@7c501000 {</div><div class='add'>+			compatible = "brcm,bcm2712-moplet";</div><div class='add'>+			reg = &lt;0x7c501000 0x20&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;disp_intr&gt;;</div><div class='add'>+			interrupts = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		disp_intr: interrupt-controller@7c502000 {</div><div class='add'>+			compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";</div><div class='add'>+			reg = &lt;0x7c502000 0x30&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dvp: clock@7c700000 {</div><div class='add'>+			compatible = "brcm,brcm2711-dvp";</div><div class='add'>+			reg = &lt;0x7c700000 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_108MHz&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddc0: i2c@7d508200 {</div><div class='add'>+			compatible = "brcm,brcmstb-i2c";</div><div class='add'>+			reg = &lt;0x7d508200 0x58&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;bsc_irq&gt;;</div><div class='add'>+			interrupts = &lt;1&gt;;</div><div class='add'>+			clock-frequency = &lt;97500&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddc1: i2c@7d508280 {</div><div class='add'>+			compatible = "brcm,brcmstb-i2c";</div><div class='add'>+			reg = &lt;0x7d508280 0x58&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;bsc_irq&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;;</div><div class='add'>+			clock-frequency = &lt;97500&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsc_irq: interrupt-controller@7d508380 {</div><div class='add'>+			compatible = "brcm,bcm7271-l2-intc";</div><div class='add'>+			reg = &lt;0x7d508380 0x10&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_irq: interrupt-controller@7d508400 {</div><div class='add'>+			compatible = "brcm,bcm7271-l2-intc";</div><div class='add'>+			reg = &lt;0x7d508400 0x10&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdmi0: hdmi@7c701400 {</div><div class='add'>+			compatible = "brcm,bcm2712-hdmi0";</div><div class='add'>+			reg = &lt;0x7c701400 0x300&gt;,</div><div class='add'>+			      &lt;0x7c701000 0x200&gt;,</div><div class='add'>+			      &lt;0x7c701d00 0x300&gt;,</div><div class='add'>+			      &lt;0x7c702000 0x80&gt;,</div><div class='add'>+			      &lt;0x7c703800 0x200&gt;,</div><div class='add'>+			      &lt;0x7c704000 0x800&gt;,</div><div class='add'>+			      &lt;0x7c700100 0x80&gt;,</div><div class='add'>+			      &lt;0x7d510800 0x100&gt;,</div><div class='add'>+			      &lt;0x7c720000 0x100&gt;;</div><div class='add'>+			reg-names = "hdmi",</div><div class='add'>+				    "dvp",</div><div class='add'>+				    "phy",</div><div class='add'>+				    "rm",</div><div class='add'>+				    "packet",</div><div class='add'>+				    "metadata",</div><div class='add'>+				    "csc",</div><div class='add'>+				    "cec",</div><div class='add'>+				    "hd";</div><div class='add'>+			resets = &lt;&amp;dvp 1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aon_intr&gt;;</div><div class='add'>+			interrupts = &lt;1&gt;, &lt;2&gt;, &lt;3&gt;,</div><div class='add'>+				     &lt;7&gt;, &lt;8&gt;;</div><div class='add'>+			interrupt-names = "cec-tx", "cec-rx", "cec-low",</div><div class='add'>+					  "hpd-connected", "hpd-removed";</div><div class='add'>+			ddc = &lt;&amp;ddc0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdmi1: hdmi@7c706400 {</div><div class='add'>+			compatible = "brcm,bcm2712-hdmi1";</div><div class='add'>+			reg = &lt;0x7c706400 0x300&gt;,</div><div class='add'>+			      &lt;0x7c706000 0x200&gt;,</div><div class='add'>+			      &lt;0x7c706d00 0x300&gt;,</div><div class='add'>+			      &lt;0x7c707000 0x80&gt;,</div><div class='add'>+			      &lt;0x7c708800 0x200&gt;,</div><div class='add'>+			      &lt;0x7c709000 0x800&gt;,</div><div class='add'>+			      &lt;0x7c700180 0x80&gt;,</div><div class='add'>+			      &lt;0x7d511000 0x100&gt;,</div><div class='add'>+			      &lt;0x7c720000 0x100&gt;;</div><div class='add'>+			reg-names = "hdmi",</div><div class='add'>+				    "dvp",</div><div class='add'>+				    "phy",</div><div class='add'>+				    "rm",</div><div class='add'>+				    "packet",</div><div class='add'>+				    "metadata",</div><div class='add'>+				    "csc",</div><div class='add'>+				    "cec",</div><div class='add'>+				    "hd";</div><div class='add'>+			resets = &lt;&amp;dvp 2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;aon_intr&gt;;</div><div class='add'>+			interrupts = &lt;11&gt;, &lt;12&gt;, &lt;13&gt;,</div><div class='add'>+				     &lt;14&gt;, &lt;15&gt;;</div><div class='add'>+			interrupt-names = "cec-tx", "cec-rx", "cec-low",</div><div class='add'>+					  "hpd-connected", "hpd-removed";</div><div class='add'>+			ddc = &lt;&amp;ddc1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	axi: axi {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00 0x00000000  0x00 0x00000000  0x10 0x00000000&gt;,</div><div class='add'>+			 &lt;0x10 0x00000000  0x10 0x00000000  0x01 0x00000000&gt;,</div><div class='add'>+			 &lt;0x14 0x00000000  0x14 0x00000000  0x04 0x00000000&gt;,</div><div class='add'>+			 &lt;0x18 0x00000000  0x18 0x00000000  0x04 0x00000000&gt;,</div><div class='add'>+			 &lt;0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+		dma-ranges = &lt;0x00 0x00000000  0x00 0x00000000  0x10 0x00000000&gt;,</div><div class='add'>+			     &lt;0x10 0x00000000  0x10 0x00000000  0x01 0x00000000&gt;,</div><div class='add'>+			     &lt;0x14 0x00000000  0x14 0x00000000  0x04 0x00000000&gt;,</div><div class='add'>+			     &lt;0x18 0x00000000  0x18 0x00000000  0x04 0x00000000&gt;,</div><div class='add'>+			     &lt;0x1c 0x00000000  0x1c 0x00000000  0x04 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+		vc4: gpu {</div><div class='add'>+			compatible = "brcm,bcm2712-vc6";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@1000100000 {</div><div class='add'>+			compatible = "brcm,bcm2712-pcie";</div><div class='add'>+			reg = &lt;0x10 0x00100000 0x00 0x9310&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gicv2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pcie", "msi";</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;gicv2 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;gicv2 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;gicv2 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;gicv2 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;pcie_rescal&gt;, &lt;&amp;bcm_reset 42&gt;;</div><div class='add'>+			reset-names = "rescal", "bridge";</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-parent = &lt;&amp;pcie0&gt;;</div><div class='add'>+</div><div class='add'>+			ranges =</div><div class='add'>+				/* ~4GiB, 32-bit, non-prefetchable at PCIe 00_0000_0000 */</div><div class='add'>+				&lt;0x02000000 0x00 0x00000000 0x17 0x00000000 0x00 0xfffffffc&gt;,</div><div class='add'>+				/* 12GiB, 64-bit, prefetchable at PCIe 04_0000_0000 */</div><div class='add'>+				&lt;0x43000000 0x04 0x00000000 0x14 0x00000000 0x03 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+			dma-ranges =</div><div class='add'>+				/* 64GiB, 64-bit, prefetchable at PCIe 10_0000_0000 */</div><div class='add'>+				&lt;0x43000000 0x10 0x00000000 0x00 0x00000000 0x10 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@1000110000 {</div><div class='add'>+			compatible = "brcm,bcm2712-pcie";</div><div class='add'>+			reg = &lt;0x10 0x00110000 0x00 0x9310&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gicv2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pcie", "msi";</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;gicv2 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;gicv2 GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;gicv2 GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;gicv2 GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;pcie_rescal&gt;, &lt;&amp;bcm_reset 43&gt;;</div><div class='add'>+			reset-names = "rescal", "bridge";</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-parent = &lt;&amp;mip1&gt;;</div><div class='add'>+</div><div class='add'>+			ranges =</div><div class='add'>+				/* ~4GiB, 32-bit, non-prefetchable at PCIe 00_0000_0000 */</div><div class='add'>+				&lt;0x02000000 0x00 0x00000000 0x1b 0x00000000 0x00 0xfffffffc&gt;,</div><div class='add'>+				/* 12GiB, 64-bit, prefetchable at PCIe 04_0000_0000 */</div><div class='add'>+				&lt;0x43000000 0x04 0x00000000 0x18 0x00000000 0x03 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+			dma-ranges =</div><div class='add'>+				/* 64GiB, 64-bit, non-prefetchable at PCIe 10_0000_0000 */</div><div class='add'>+				&lt;0x03000000 0x10 0x00000000 0x00 0x00000000 0x10 0x00000000&gt;,</div><div class='add'>+				/* 4KiB, 64-bit, non-prefetchable at PCIe ff_ffff_f000 MIP1 */</div><div class='add'>+				&lt;0x03000000 0xff 0xfffff000 0x10 0x00131000 0x00 0x00001000&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2: pcie@1000120000 {</div><div class='add'>+			compatible = "brcm,bcm2712-pcie";</div><div class='add'>+			reg = &lt;0x10 0x00120000 0x00 0x9310&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;2&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gicv2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pcie", "msi";</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;gicv2 GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;gicv2 GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;gicv2 GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;gicv2 GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;pcie_rescal&gt;, &lt;&amp;bcm_reset 44&gt;;</div><div class='add'>+			reset-names = "rescal", "bridge";</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-parent = &lt;&amp;mip0&gt;;</div><div class='add'>+</div><div class='add'>+			ranges =</div><div class='add'>+				/* ~4GiB, 32-bit, non-prefetchable at PCIe 00_0000_0000 */</div><div class='add'>+				&lt;0x02000000 0x00 0x00000000 0x1f 0x00000000 0x00 0xfffffffc&gt;,</div><div class='add'>+				/* 12GiB, 64-bit, prefetchable at PCIe 04_0000_0000 */</div><div class='add'>+				&lt;0x43000000 0x04 0x00000000 0x1c 0x00000000 0x03 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+			dma-ranges =</div><div class='add'>+				/* 4MiB, 32-bit, non-prefetchable at PCIe 00_0000_0000 */</div><div class='add'>+				&lt;0x02000000 0x00 0x00000000 0x1f 0x00000000 0x00 0x00400000&gt;,</div><div class='add'>+				/* 64GiB, 64-bit, prefetchable at PCIe 10_0000_0000 */</div><div class='add'>+				&lt;0x43000000 0x10 0x00000000 0x00 0x00000000 0x10 0x00000000&gt;,</div><div class='add'>+				/* 4KiB, 64-bit, non-prefetchable at PCIe ff_ffff_f000 MIP0 */</div><div class='add'>+				&lt;0x03000000 0xff 0xfffff000 0x10 0x00130000 0x00 0x00001000&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mip0: msi-controller@1000130000 {</div><div class='add'>+			compatible = "brcm,bcm2712-mip";</div><div class='add'>+			reg = &lt;0x10 0x00130000 0x00 0xc0&gt;,</div><div class='add'>+			      &lt;0xff 0xfffff000 0x00 0x1000&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-ranges = &lt;&amp;gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64&gt;;</div><div class='add'>+			brcm,msi-offset = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mip1: msi-controller@1000131000 {</div><div class='add'>+			compatible = "brcm,bcm2712-mip";</div><div class='add'>+			reg = &lt;0x10 0x00131000 0x00 0xc0&gt;,</div><div class='add'>+			      &lt;0xff 0xfffff000 0x00 0x1000&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-ranges = &lt;&amp;gicv2 GIC_SPI 247 IRQ_TYPE_EDGE_RISING 8&gt;;</div><div class='add'>+			brcm,msi-offset = &lt;8&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='hunk'>@@ -280,4 +644,26 @@</div><div class='ctx'> 			     &lt;GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) |</div><div class='ctx'> 					  IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	clk_27MHz: clk-27M {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;27000000&gt;;</div><div class='add'>+		clock-output-names = "27MHz-clock";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_108MHz: clk-108M {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;108000000&gt;;</div><div class='add'>+		clock-output-names = "108MHz-clock";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hvs: hvs@107c580000 {</div><div class='add'>+		compatible = "brcm,bcm2712-hvs";</div><div class='add'>+		reg = &lt;0x10 0x7c580000 0x0 0x1a000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;disp_intr&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;, &lt;9&gt;, &lt;16&gt;;</div><div class='add'>+		interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts<br/>new file mode 100644<br/>index 000000000000..57742ed40049<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcm2837-rpi-2-b.dts</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "arm/broadcom/bcm2837-rpi-2-b.dts"</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile<br/>index 27741b71ba9e..9a8461d91c8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/Makefile</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> dtb-$(CONFIG_ARCH_BCMBCA) += \</div><div class='ctx'> 				bcm4906-netgear-r8000p.dtb \</div><div class='ctx'> 				bcm4906-tplink-archer-c2300-v1.dtb \</div><div class='add'>+				bcm4906-zyxel-ex3510b.dtb \</div><div class='ctx'> 				bcm4908-asus-gt-ac5300.dtb \</div><div class='ctx'> 				bcm4908-netgear-raxe500.dtb \</div><div class='ctx'> 				bcm94908.dtb \</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts<br/>index 999d93730240..a5f9ec92bd5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts</a></div><div class='hunk'>@@ -144,16 +144,20 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partition@0 {</div><div class='del'>-			compatible = "nvmem-cells";</div><div class='ctx'> 			label = "cferom";</div><div class='ctx'> 			reg = &lt;0x0 0x100000&gt;;</div><div class='del'>-</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges = &lt;0 0x0 0x100000&gt;;</div><div class='ctx'> </div><div class='del'>-			base_mac_addr: mac@106a0 {</div><div class='del'>-				reg = &lt;0x106a0 0x6&gt;;</div><div class='add'>+			nvmem-layout {</div><div class='add'>+				compatible = "fixed-layout";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				base_mac_addr: mac@106a0 {</div><div class='add'>+					reg = &lt;0x106a0 0x6&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts<br/>new file mode 100644<br/>index 000000000000..54e453bd09f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts</a></div><div class='hunk'>@@ -0,0 +1,196 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bcm4906.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "zyxel,ex3510b", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";</div><div class='add'>+	model = "Zyxel EX3510-B";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys-polled {</div><div class='add'>+		compatible = "gpio-keys-polled";</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		key-wps {</div><div class='add'>+			label = "WPS";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-reset {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;leds {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pins_led_0_a&gt;, &lt;&amp;pins_led_2_a&gt;, &lt;&amp;pins_led_3_a&gt;,</div><div class='add'>+		    &lt;&amp;pins_led_4_a&gt;, &lt;&amp;pins_led_10_a&gt;, &lt;&amp;pins_led_12_a&gt;,</div><div class='add'>+		    &lt;&amp;pins_led_14_a&gt;, &lt;&amp;pins_led_15_a&gt;, &lt;&amp;pins_led_21_a&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	led@0 {</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		function = LED_FUNCTION_POWER;</div><div class='add'>+		color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@2 {</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+		function = LED_FUNCTION_WAN_ONLINE;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@3 {</div><div class='add'>+		reg = &lt;0x3&gt;;</div><div class='add'>+		function = LED_FUNCTION_WAN_ONLINE;</div><div class='add'>+		color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@4 {</div><div class='add'>+		reg = &lt;0x4&gt;;</div><div class='add'>+		function = LED_FUNCTION_USB;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		trigger-sources = &lt;&amp;ohci_port1&gt;, &lt;&amp;ohci_port2&gt;,</div><div class='add'>+				  &lt;&amp;ehci_port1&gt;, &lt;&amp;ehci_port2&gt;,</div><div class='add'>+				  &lt;&amp;xhci_port1&gt;, &lt;&amp;xhci_port2&gt;;</div><div class='add'>+		linux,default-trigger = "usbport";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@a {</div><div class='add'>+		reg = &lt;0xa&gt;;</div><div class='add'>+		function = LED_FUNCTION_POWER;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		linux,default-trigger = "default-on";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@c {</div><div class='add'>+		reg = &lt;0xc&gt;;</div><div class='add'>+		function = LED_FUNCTION_LAN;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@e {</div><div class='add'>+		reg = &lt;0xe&gt;;</div><div class='add'>+		function = LED_FUNCTION_WPS;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@f {</div><div class='add'>+		reg = &lt;0xf&gt;;</div><div class='add'>+		function = LED_FUNCTION_WPS;</div><div class='add'>+		color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@15 {</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+		function = LED_FUNCTION_WAN;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		active-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enet {</div><div class='add'>+	nvmem-cells = &lt;&amp;base_mac_addr&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_phy {</div><div class='add'>+	brcm,ioc = &lt;1&gt;;</div><div class='add'>+	brcm,ipp = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ports {</div><div class='add'>+	port@0 {</div><div class='add'>+		label = "lan1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		label = "lan2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@2 {</div><div class='add'>+		label = "lan3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@3 {</div><div class='add'>+		label = "lan4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		phy-mode = "internal";</div><div class='add'>+		phy-handle = &lt;&amp;phy12&gt;;</div><div class='add'>+		label = "wan";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand_controller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nandcs {</div><div class='add'>+	brcm,nand-oob-sector-size = &lt;27&gt;;</div><div class='add'>+	nand-ecc-strength = &lt;8&gt;;</div><div class='add'>+	nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+	nand-on-flash-bbt;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "brcm,bcm4908-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		partition@0 {</div><div class='add'>+			compatible = "nvmem-cells";</div><div class='add'>+			label = "cferom";</div><div class='add'>+			reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			base_mac_addr: mac@106a0 {</div><div class='add'>+				reg = &lt;0x106a0 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@100000 {</div><div class='add'>+			compatible = "brcm,bcm4908-firmware";</div><div class='add'>+			reg = &lt;0x100000 0x5f80000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		partition@6080000 {</div><div class='add'>+			compatible = "brcm,bcm4908-firmware";</div><div class='add'>+			reg = &lt;0x6080000 0x5f80000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi<br/>index 8b924812322c..3b7595fd4e81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> 			compatible = "brcm,brahma-b53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='del'>-			cpu-release-addr = &lt;0x0 0xfff8&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0x0 0xff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 			compatible = "brcm,brahma-b53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='del'>-			cpu-release-addr = &lt;0x0 0xfff8&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0x0 0xff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 			compatible = "brcm,brahma-b53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='del'>-			cpu-release-addr = &lt;0x0 0xfff8&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0x0 0xff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 			compatible = "brcm,brahma-b53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='del'>-			cpu-release-addr = &lt;0x0 0xfff8&gt;;</div><div class='add'>+			cpu-release-addr = &lt;0x0 0xff8&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -68,6 +68,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cfe-stub@0 {</div><div class='add'>+			reg = &lt;0x0 0x0 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	axi@81000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -313,11 +323,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* PERF Peripherals */</div><div class='ctx'> 	bus@ff800000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x00 0xff800000 0x3000&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x00 0xff800000 0x400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		twd: timer-mfd@400 {</div><div class='ctx'> 			compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";</div><div class='hunk'>@@ -338,13 +349,103 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio0: gpio-controller@500 {</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='ctx'> 			reg-names = "dirout", "dat";</div><div class='del'>-			reg = &lt;0x500 0x28&gt;, &lt;0x528 0x28&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x540 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x544 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 256 .. 287 */</div><div class='add'>+		gpio8: gpio@520 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x520 0x04&gt;, &lt;0x548 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 288 .. 319 */</div><div class='add'>+		gpio9: gpio@524 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x524 0x04&gt;, &lt;0x54c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pinctrl@560 {</div><div class='hunk'>@@ -574,6 +675,12 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -626,6 +733,19 @@</div><div class='ctx'> 				#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@59000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x59000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reboot {</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi<br/>index 48d618e75866..a441388c0cd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2022 Broadcom Ltd.</div><div class='add'>+ * This DTSI is for the B0 and later revision of the SoC</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='hunk'>@@ -125,6 +126,101 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x0 0xff800000 0x800000&gt;;</div><div class='ctx'> </div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		leds: led-controller@800 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x800 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -151,6 +247,21 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* B0 AHB Peripherals */</div><div class='add'>+		pl081_dma: dma-controller@11000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x11000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* B0 ARM UART Peripheral block */</div><div class='ctx'> 		uart0: serial@12000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x12000 0x1000&gt;;</div><div class='hunk'>@@ -159,5 +270,23 @@</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@13000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x13000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;uart_clk&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@14000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x14000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;uart_clk&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi<br/>index 00c62c1e5df0..dcbd0fdd33d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi</a></div><div class='hunk'>@@ -93,11 +93,103 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* PERF Peripherals */</div><div class='ctx'> 	bus@ff800000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x0 0xff800000 0x800000&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0xff800000 0x400000&gt;;</div><div class='add'>+</div><div class='add'>+		watchdog@480 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x480 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@4c0 {</div><div class='add'>+			compatible = "brcm,bcm6345-wdt";</div><div class='add'>+			reg = &lt;0x4c0 0x10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='ctx'> 		uart0: serial@640 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='hunk'>@@ -108,6 +200,29 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@660 {</div><div class='add'>+			compatible = "brcm,bcm6345-uart";</div><div class='add'>+			reg = &lt;0x660 0x18&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "refclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		leds: led-controller@800 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x800 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -133,5 +248,18 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@59000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x59000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi<br/>index caeaf428dc15..c105a734a648 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi</a></div><div class='hunk'>@@ -111,11 +111,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* PERF Peripherals */</div><div class='ctx'> 	bus@ff800000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x0 0xff800000 0x62000&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0xff800000 0x400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		twd: timer-mfd@400 {</div><div class='ctx'> 			compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";</div><div class='hunk'>@@ -136,6 +137,86 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* GPIOs 0 .. 31 */</div><div class='add'>+		gpio0: gpio@500 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x500 0x04&gt;, &lt;0x520 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 32 .. 63 */</div><div class='add'>+		gpio1: gpio@504 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x504 0x04&gt;, &lt;0x524 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 64 .. 95 */</div><div class='add'>+		gpio2: gpio@508 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x508 0x04&gt;, &lt;0x528 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 96 .. 127 */</div><div class='add'>+		gpio3: gpio@50c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x50c 0x04&gt;, &lt;0x52c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 128 .. 159 */</div><div class='add'>+		gpio4: gpio@510 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x510 0x04&gt;, &lt;0x530 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 160 .. 191 */</div><div class='add'>+		gpio5: gpio@514 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x514 0x04&gt;, &lt;0x534 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 192 .. 223 */</div><div class='add'>+		gpio6: gpio@518 {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x518 0x04&gt;, &lt;0x538 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* GPIOs 224 .. 255 */</div><div class='add'>+		gpio7: gpio@51c {</div><div class='add'>+			compatible = "brcm,bcm6345-gpio";</div><div class='add'>+			reg = &lt;0x51c 0x04&gt;, &lt;0x53c 0x04&gt;;</div><div class='add'>+			reg-names = "dirout", "dat";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@640 {</div><div class='ctx'> 			compatible = "brcm,bcm6345-uart";</div><div class='ctx'> 			reg = &lt;0x640 0x18&gt;;</div><div class='hunk'>@@ -145,6 +226,29 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart1: serial@660 {</div><div class='add'>+			compatible = "brcm,bcm6345-uart";</div><div class='add'>+			reg = &lt;0x660 0x18&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "refclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		leds: led-controller@800 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "brcm,bcm63138-leds";</div><div class='add'>+			reg = &lt;0x800 0xdc&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@b80 {</div><div class='add'>+			compatible = "brcm,iproc-rng200";</div><div class='add'>+			reg = &lt;0xb80 0x28&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		hsspi: spi@1000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -170,5 +274,18 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pl081_dma: dma-controller@59000 {</div><div class='add'>+			compatible = "arm,pl081", "arm,primecell";</div><div class='add'>+			// The magic B105F00D info is missing</div><div class='add'>+			arm,primecell-periphid = &lt;0x00041081&gt;;</div><div class='add'>+			reg = &lt;0x59000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			memcpy-burst-size = &lt;256&gt;;</div><div class='add'>+			memcpy-bus-width = &lt;32&gt;;</div><div class='add'>+			clocks = &lt;&amp;periph_clk&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts<br/>index f43cfe66b6af..5939d342aec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts</a></div><div class='hunk'>@@ -137,7 +137,6 @@</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		spi-cpol;</div><div class='ctx'> 		pl022,interface = &lt;0&gt;;</div><div class='del'>-		pl022,slave-tx-disable = &lt;0&gt;;</div><div class='ctx'> 		pl022,com-mode = &lt;0&gt;;</div><div class='ctx'> 		pl022,rx-level-trig = &lt;1&gt;;</div><div class='ctx'> 		pl022,tx-level-trig = &lt;1&gt;;</div><div class='hunk'>@@ -200,7 +199,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='del'>-	bspi-sel = &lt;0&gt;;</div><div class='ctx'> 	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts b/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts<br/>index c50df1d02797..0e134a94e142 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts</a></div><div class='hunk'>@@ -151,7 +151,6 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "m25p80";</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='del'>-		m25p,default-addr-width = &lt;3&gt;;</div><div class='ctx'> 		reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partition@0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi<br/>index cfd9fd23a1c2..9888a1fabd5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi</a></div><div class='hunk'>@@ -134,7 +134,6 @@</div><div class='ctx'> 		brcm,pcie-ob;</div><div class='ctx'> 		brcm,pcie-ob-oarr-size;</div><div class='ctx'> 		brcm,pcie-ob-axi-offset = &lt;0x00000000&gt;;</div><div class='del'>-		brcm,pcie-ob-window-size = &lt;256&gt;;</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -165,7 +164,6 @@</div><div class='ctx'> 		brcm,pcie-ob;</div><div class='ctx'> 		brcm,pcie-ob-oarr-size;</div><div class='ctx'> 		brcm,pcie-ob-axi-offset = &lt;0x30000000&gt;;</div><div class='del'>-		brcm,pcie-ob-window-size = &lt;256&gt;;</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -369,7 +367,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m0: v2m@0 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x00000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;72&gt;;</div><div class='hunk'>@@ -378,7 +375,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m1: v2m@10000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x10000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;88&gt;;</div><div class='hunk'>@@ -387,7 +383,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m2: v2m@20000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x20000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;104&gt;;</div><div class='hunk'>@@ -396,7 +391,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m3: v2m@30000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x30000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;120&gt;;</div><div class='hunk'>@@ -405,7 +399,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m4: v2m@40000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x40000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;136&gt;;</div><div class='hunk'>@@ -414,7 +407,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m5: v2m@50000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x50000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;152&gt;;</div><div class='hunk'>@@ -423,7 +415,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m6: v2m@60000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x60000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;168&gt;;</div><div class='hunk'>@@ -432,7 +423,6 @@</div><div class='ctx'> </div><div class='ctx'> 			v2m7: v2m@70000 {</div><div class='ctx'> 				compatible = "arm,gic-v2m-frame";</div><div class='del'>-				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				reg = &lt;0x70000 0x1000&gt;;</div><div class='ctx'> 				arm,msi-base-spi = &lt;184&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi<br/>new file mode 100644<br/>index 000000000000..5a815c379794<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/rp1-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/rp1-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/raspberrypi,rp1-clocks.h&gt;</div><div class='add'>+</div><div class='add'>+pci_ep_bus: pci-ep-bus@1 {</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+	ranges = &lt;0x00 0x40000000  0x01 0x00 0x00000000  0x00 0x00400000&gt;;</div><div class='add'>+	dma-ranges = &lt;0x10 0x00000000  0x43000000 0x10 0x00000000  0x10 0x00000000&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	rp1_clocks: clocks@40018000 {</div><div class='add'>+		compatible = "raspberrypi,rp1-clocks";</div><div class='add'>+		reg = &lt;0x00 0x40018000 0x0 0x10038&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_rp1_xosc&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;rp1_clocks RP1_PLL_SYS_CORE&gt;,</div><div class='add'>+				  &lt;&amp;rp1_clocks RP1_PLL_SYS&gt;,</div><div class='add'>+				  &lt;&amp;rp1_clocks RP1_PLL_SYS_SEC&gt;,</div><div class='add'>+				  &lt;&amp;rp1_clocks RP1_CLK_SYS&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;1000000000&gt;, // RP1_PLL_SYS_CORE</div><div class='add'>+				       &lt;200000000&gt;,  // RP1_PLL_SYS</div><div class='add'>+				       &lt;125000000&gt;,  // RP1_PLL_SYS_SEC</div><div class='add'>+				       &lt;200000000&gt;;  // RP1_CLK_SYS</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rp1_gpio: pinctrl@400d0000 {</div><div class='add'>+		compatible = "raspberrypi,rp1-gpio";</div><div class='add'>+		reg = &lt;0x00 0x400d0000  0x0 0xc000&gt;,</div><div class='add'>+		      &lt;0x00 0x400e0000  0x0 0xc000&gt;,</div><div class='add'>+		      &lt;0x00 0x400f0000  0x0 0xc000&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rp1_eth: ethernet@40100000 {</div><div class='add'>+		compatible = "raspberrypi,rp1-gem";</div><div class='add'>+		reg = &lt;0x00 0x40100000  0x0 0x4000&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rp1_clocks RP1_CLK_SYS&gt;,</div><div class='add'>+			 &lt;&amp;rp1_clocks RP1_CLK_SYS&gt;,</div><div class='add'>+			 &lt;&amp;rp1_clocks RP1_CLK_ETH&gt;,</div><div class='add'>+			 &lt;&amp;rp1_clocks RP1_CLK_ETH_TSU&gt;;</div><div class='add'>+		clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";</div><div class='add'>+		local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rp1_usb0: usb@40200000 {</div><div class='add'>+		compatible = "snps,dwc3";</div><div class='add'>+		reg = &lt;0x00 0x40200000  0x0 0x100000&gt;;</div><div class='add'>+		interrupts = &lt;31 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		dr_mode = "host";</div><div class='add'>+		usb3-lpm-capable;</div><div class='add'>+		snps,dis_rxdet_inp3_quirk;</div><div class='add'>+		snps,parkmode-disable-hs-quirk;</div><div class='add'>+		snps,parkmode-disable-ss-quirk;</div><div class='add'>+		snps,tx-max-burst = /bits/ 8 &lt;8&gt;;</div><div class='add'>+		snps,tx-thr-num-pkt = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rp1_usb1: usb@40300000 {</div><div class='add'>+		compatible = "snps,dwc3";</div><div class='add'>+		reg = &lt;0x00 0x40300000  0x0 0x100000&gt;;</div><div class='add'>+		interrupts = &lt;36 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		dr_mode = "host";</div><div class='add'>+		usb3-lpm-capable;</div><div class='add'>+		snps,dis_rxdet_inp3_quirk;</div><div class='add'>+		snps,parkmode-disable-hs-quirk;</div><div class='add'>+		snps,parkmode-disable-ss-quirk;</div><div class='add'>+		snps,tx-max-burst = /bits/ 8 &lt;8&gt;;</div><div class='add'>+		snps,tx-thr-num-pkt = /bits/ 8 &lt;2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi b/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi<br/>new file mode 100644<br/>index 000000000000..0ef30d7f1c35<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+rp1_nexus {</div><div class='add'>+	compatible = "pci1de4,1";</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	ranges = &lt;0x01 0x00 0x00000000</div><div class='add'>+		  0x02000000 0x00 0x00000000</div><div class='add'>+		  0x0 0x400000&gt;;</div><div class='add'>+	interrupt-controller;</div><div class='add'>+	#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	#include "rp1-common.dtsi"</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/broadcom/rp1.dtso b/arch/arm64/boot/dts/broadcom/rp1.dtso<br/>new file mode 100644<br/>index 000000000000..ab4f146d22c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/broadcom/rp1.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/broadcom/rp1.dtso</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	#include "rp1-nexus.dtsi"</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi<br/>index 6dfe78a7d4ab..966fb57280f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi</a></div><div class='hunk'>@@ -136,8 +136,8 @@</div><div class='ctx'> 			reg = &lt;0x04 0x02020000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk125mhz&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='add'>+			clocks = &lt;&amp;clk125mhz&gt;, &lt;&amp;clk125mhz&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/cix/Makefile b/arch/arm64/boot/dts/cix/Makefile<br/>new file mode 100644<br/>index 000000000000..ed3713982012<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/cix/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/cix/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_CIX) += sky1-orion-o6.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts<br/>new file mode 100644<br/>index 000000000000..d74964d53c3b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/cix/sky1-orion-o6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/cix/sky1-orion-o6.dts</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Cix Technology Group Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sky1.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa Orion O6";</div><div class='add'>+	compatible = "radxa,orion-o6", "cix,sky1";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x0 0x28000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi<br/>new file mode 100644<br/>index 000000000000..2fb2c99c0796<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/cix/sky1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/cix/sky1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,430 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Cix Technology Group Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/cix,sky1.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a520";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;403&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a520";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;403&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a520";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;403&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a520";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;403&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@400 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x400&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@500 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x500&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@600 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x600&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@700 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x700&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu8: cpu@800 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x800&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu9: cpu@900 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0x900&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu10: cpu@a00 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0xa00&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu11: cpu@b00 {</div><div class='add'>+			compatible = "arm,cortex-a720";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x0 0xb00&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+				core4 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core5 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core6 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core7 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+				core8 {</div><div class='add'>+					cpu = &lt;&amp;cpu8&gt;;</div><div class='add'>+				};</div><div class='add'>+				core9 {</div><div class='add'>+					cpu = &lt;&amp;cpu9&gt;;</div><div class='add'>+				};</div><div class='add'>+				core10 {</div><div class='add'>+					cpu = &lt;&amp;cpu10&gt;;</div><div class='add'>+				};</div><div class='add'>+				core11 {</div><div class='add'>+					cpu = &lt;&amp;cpu11&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		ap_to_pm_scmi: scmi {</div><div class='add'>+			compatible = "arm,scmi";</div><div class='add'>+			mbox-names = "tx", "rx";</div><div class='add'>+			mboxes = &lt;&amp;mbox_ap2pm 8&gt;, &lt;&amp;mbox_pm2ap 8&gt;;</div><div class='add'>+			shmem = &lt;&amp;ap2pm_scmi_mem&gt;, &lt;&amp;pm2ap_scmi_mem&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a520 {</div><div class='add'>+		compatible = "arm,cortex-a520-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_partition0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a720 {</div><div class='add'>+		compatible = "arm,cortex-a720-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_partition1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0 0 0 0 0x20 0&gt;;</div><div class='add'>+		dma-ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@4010000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04010000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C0_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@4020000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04020000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C1_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@4030000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04030000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C2_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@4040000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04040000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C3_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@4050000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04050000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C4_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@4060000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04060000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C5_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@4070000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04070000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C6_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@4080000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I2C7_APB&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@40b0000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x040b0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_UART0_FUNC&gt;, &lt;&amp;scmi_clk CLK_TREE_FCH_UART0_APB&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@40c0000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x040c0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_UART1_FUNC&gt;, &lt;&amp;scmi_clk CLK_TREE_FCH_UART1_APB&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@40d0000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x040d0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_UART2_FUNC&gt;, &lt;&amp;scmi_clk CLK_TREE_FCH_UART2_APB&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@40e0000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x040e0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_UART3_FUNC&gt;, &lt;&amp;scmi_clk CLK_TREE_FCH_UART3_APB&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c0: i3c@40f0000 {</div><div class='add'>+			compatible = "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x0 0x040f0000 0x0 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I3C0_APB&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CLK_TREE_FCH_I3C0_FUNC&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c1: i3c@4100000 {</div><div class='add'>+			compatible = "cdns,i3c-master";</div><div class='add'>+			reg = &lt;0x0 0x04100000 0x0 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CLK_TREE_FCH_I3C1_APB&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CLK_TREE_FCH_I3C1_FUNC&gt;;</div><div class='add'>+			clock-names = "pclk", "sysclk";</div><div class='add'>+			i3c-scl-hz = &lt;400000&gt;;</div><div class='add'>+			i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_ap2se: mailbox@5060000 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x05060000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_se2ap: mailbox@5070000 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x05070000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ap2pm_scmi_mem: shmem@6590000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x06590000 0x0 0x80&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_ap2pm: mailbox@6590080 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x06590080 0x0 0xff80&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm2ap_scmi_mem: shmem@65a0000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x065a0000 0x0 0x80&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_pm2ap: mailbox@65a0080 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x065a0080 0x0 0xff80&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_sfh2ap: mailbox@8090000 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x08090000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "rx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mbox_ap2sfh: mailbox@80a0000 {</div><div class='add'>+			compatible = "cix,sky1-mbox";</div><div class='add'>+			reg = &lt;0x0 0x080a0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			cix,mbox-dir = "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@e010000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x0e010000 0 0x10000&gt;,	/* GICD */</div><div class='add'>+			      &lt;0x0 0x0e090000 0 0x300000&gt;;       /* GICR * 12 */</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			gic_its: msi-controller@e050000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x0e050000 0x0 0x30000&gt;;</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ppi-partitions {</div><div class='add'>+				ppi_partition0: interrupt-partition-0 {</div><div class='add'>+					affinity = &lt;&amp;cpu0 &amp;cpu1 &amp;cpu2 &amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_partition1: interrupt-partition-1 {</div><div class='add'>+					affinity = &lt;&amp;cpu4 &amp;cpu5 &amp;cpu6 &amp;cpu7 &amp;cpu8 &amp;cpu9 &amp;cpu10 &amp;cpu11&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 12 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile<br/>index d7f2191c2cdb..bcca63136557 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/Makefile</a></div><div class='hunk'>@@ -1,11 +1,22 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+subdir-y += axis</div><div class='ctx'> subdir-y += google</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_EXYNOS) += \</div><div class='add'>+	exynos2200-g0s.dtb		\</div><div class='ctx'> 	exynos5433-tm2.dtb		\</div><div class='ctx'> 	exynos5433-tm2e.dtb		\</div><div class='ctx'> 	exynos7-espresso.dtb		\</div><div class='add'>+	exynos7870-a2corelte.dtb	\</div><div class='add'>+	exynos7870-j6lte.dtb		\</div><div class='add'>+	exynos7870-on7xelte.dtb		\</div><div class='ctx'> 	exynos7885-jackpotlte.dtb	\</div><div class='ctx'> 	exynos850-e850-96.dtb		\</div><div class='add'>+	exynos8895-dreamlte.dtb		\</div><div class='add'>+	exynos9810-starlte.dtb		\</div><div class='add'>+	exynos990-c1s.dtb		\</div><div class='add'>+	exynos990-r8s.dtb               \</div><div class='add'>+	exynos990-x1s.dtb		\</div><div class='add'>+	exynos990-x1slte.dtb		\</div><div class='ctx'> 	exynosautov9-sadk.dtb		\</div><div class='ctx'> 	exynosautov920-sadk.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/axis/Makefile b/arch/arm64/boot/dts/exynos/axis/Makefile<br/>new file mode 100644<br/>index 000000000000..ccf00de64016<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/axis/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/axis/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ARTPEC) += \</div><div class='add'>+	artpec8-grizzly.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h b/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h<br/>new file mode 100644<br/>index 000000000000..2c151aa98c96<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Axis ARTPEC-8 SoC device tree pinctrl constants</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Samsung Electronics Co., Ltd.</div><div class='add'>+ *             https://www.samsung.com</div><div class='add'>+ * Copyright (c) 2025  Axis Communications AB.</div><div class='add'>+ *             https://www.axis.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__</div><div class='add'>+#define __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__</div><div class='add'>+</div><div class='add'>+#define ARTPEC_PIN_PULL_NONE		0</div><div class='add'>+#define ARTPEC_PIN_PULL_DOWN		1</div><div class='add'>+#define ARTPEC_PIN_PULL_UP		3</div><div class='add'>+</div><div class='add'>+#define ARTPEC_PIN_FUNC_INPUT		0</div><div class='add'>+#define ARTPEC_PIN_FUNC_OUTPUT		1</div><div class='add'>+#define ARTPEC_PIN_FUNC_2		2</div><div class='add'>+#define ARTPEC_PIN_FUNC_3		3</div><div class='add'>+#define ARTPEC_PIN_FUNC_4		4</div><div class='add'>+#define ARTPEC_PIN_FUNC_5		5</div><div class='add'>+#define ARTPEC_PIN_FUNC_6		6</div><div class='add'>+#define ARTPEC_PIN_FUNC_EINT		0xf</div><div class='add'>+#define ARTPEC_PIN_FUNC_F		ARTPEC_PIN_FUNC_EINT</div><div class='add'>+</div><div class='add'>+/* Drive strength for ARTPEC */</div><div class='add'>+#define ARTPEC_PIN_DRV_SR1		0x8</div><div class='add'>+#define ARTPEC_PIN_DRV_SR2		0x9</div><div class='add'>+#define ARTPEC_PIN_DRV_SR3		0xa</div><div class='add'>+#define ARTPEC_PIN_DRV_SR4		0xb</div><div class='add'>+#define ARTPEC_PIN_DRV_SR5		0xc</div><div class='add'>+#define ARTPEC_PIN_DRV_SR6		0xd</div><div class='add'>+</div><div class='add'>+#endif /* __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__ */</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts b/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts<br/>new file mode 100644<br/>index 000000000000..5ae864ec3193<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Axis ARTPEC-8 Grizzly board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Samsung Electronics Co., Ltd.</div><div class='add'>+ *             https://www.samsung.com</div><div class='add'>+ * Copyright (c) 2025  Axis Communications AB.</div><div class='add'>+ *             https://www.axis.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "artpec8.dtsi"</div><div class='add'>+#include "artpec8-pinctrl.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+/ {</div><div class='add'>+	model = "ARTPEC-8 grizzly board";</div><div class='add'>+	compatible = "axis,artpec8-grizzly", "axis,artpec8";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial_0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;serial_0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;osc_clk {</div><div class='add'>+	clock-frequency = &lt;50000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..8d239a70f1b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Axis ARTPEC-8 SoC pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Samsung Electronics Co., Ltd.</div><div class='add'>+ *             https://www.samsung.com</div><div class='add'>+ * Copyright (c) 2025  Axis Communications AB.</div><div class='add'>+ *             https://www.axis.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "artpec-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys {</div><div class='add'>+	gpe0: gpe0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe1: gpe1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe2: gpe2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf2: gpf2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf3: gpf3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf4: gpf4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gps0: gps0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gps1: gps1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial0_bus: serial0-bus-pins {</div><div class='add'>+		samsung,pins = "gpf4-4", "gpf4-5";</div><div class='add'>+		samsung,pin-function = &lt;ARTPEC_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;ARTPEC_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;ARTPEC_PIN_DRV_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric {</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpk0: gpk0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi<br/>new file mode 100644<br/>index 000000000000..db9833297982<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/axis/artpec8.dtsi</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Axis ARTPEC-8 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Samsung Electronics Co., Ltd.</div><div class='add'>+ *             https://www.samsung.com</div><div class='add'>+ * Copyright (c) 2025  Axis Communications AB.</div><div class='add'>+ *             https://www.axis.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/axis,artpec8-clk.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "axis,artpec8";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_fsys;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_peric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cpucl CLK_GOUT_CPUCL_CLUSTER_CPU&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_sleep: cpu-sleep {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;300&gt;;</div><div class='add'>+				exit-latency-us = &lt;1200&gt;;</div><div class='add'>+				min-residency-us = &lt;2000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fin_pll: clock-finpll {</div><div class='add'>+		compatible = "fixed-factor-clock";</div><div class='add'>+		clocks = &lt;&amp;osc_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-div = &lt;2&gt;;</div><div class='add'>+		clock-mult = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "fin_pll";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc_clk: clock-osc {</div><div class='add'>+		/* XXTI */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "osc_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x17000000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		cmu_imem: clock-controller@10010000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-imem";</div><div class='add'>+			reg = &lt;0x10010000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_IMEM_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_IMEM_JPEG&gt;;</div><div class='add'>+			clock-names = "fin_pll", "aclk", "jpeg";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@10040000 {</div><div class='add'>+			compatible = "axis,artpec8-mct", "samsung,exynos4210-mct";</div><div class='add'>+			reg = &lt;0x10040000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;, &lt;&amp;cmu_imem CLK_GOUT_IMEM_MCT_PCLK&gt;;</div><div class='add'>+			clock-names = "fin_pll", "mct";</div><div class='add'>+			interrupts = &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10201000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x10201000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10202000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10204000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10206000 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cpucl: clock-controller@11410000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-cpucl";</div><div class='add'>+			reg = &lt;0x11410000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_CPUCL_SWITCH&gt;;</div><div class='add'>+			clock-names = "fin_pll", "switch";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cmu: clock-controller@12400000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-cmu";</div><div class='add'>+			reg = &lt;0x12400000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;;</div><div class='add'>+			clock-names = "fin_pll";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_core: clock-controller@12410000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-core";</div><div class='add'>+			reg = &lt;0x12410000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_CORE_MAIN&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_CORE_DLP&gt;;</div><div class='add'>+			clock-names = "fin_pll", "main", "dlp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_bus: clock-controller@12c10000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-bus";</div><div class='add'>+			reg = &lt;0x12c10000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_BUS_DLP&gt;;</div><div class='add'>+			clock-names = "fin_pll", "bus", "dlp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peri: clock-controller@16410000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-peri";</div><div class='add'>+			reg = &lt;0x16410000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_PERI_IP&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_PERI_AUDIO&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_PERI_DISP&gt;;</div><div class='add'>+			clock-names = "fin_pll", "ip", "audio", "disp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric: pinctrl@165f0000 {</div><div class='add'>+			compatible = "axis,artpec8-pinctrl";</div><div class='add'>+			reg = &lt;0x165f0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_fsys: clock-controller@16c10000 {</div><div class='add'>+			compatible = "axis,artpec8-cmu-fsys";</div><div class='add'>+			reg = &lt;0x16c10000 0x4000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;fin_pll&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_FSYS_SCAN0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_FSYS_SCAN1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_FSYS_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmu CLK_DOUT_CMU_FSYS_IP&gt;;</div><div class='add'>+			clock-names = "fin_pll", "scan0", "scan1", "bus", "ip";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys: pinctrl@16c30000 {</div><div class='add'>+			compatible = "axis,artpec8-pinctrl";</div><div class='add'>+			reg = &lt;0x16c30000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial_0: serial@16cc0000 {</div><div class='add'>+			compatible = "axis,artpec8-uart";</div><div class='add'>+			reg = &lt;0x16cc0000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_UART0_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_fsys CLK_GOUT_FSYS_UART0_SCLK_UART&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;serial0_bus&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts b/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts<br/>new file mode 100644<br/>index 000000000000..0e348c5cf7df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos2200-g0s.dts</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S22+ (g0s/SM-S906B) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos2200.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S22+ (SM-S906B)";</div><div class='add'>+	compatible = "samsung,g0s", "samsung,exynos2200";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			memory-region = &lt;&amp;cont_splash_mem&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2340&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * RTC clock (XrtcXTI); external, must be 32.768 kHz.</div><div class='add'>+	 *</div><div class='add'>+	 * TODO: Remove this once RTC clock is implemented properly as part of</div><div class='add'>+	 *       PMIC driver.</div><div class='add'>+	 */</div><div class='add'>+	rtcclk: clock-rtcclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-output-names = "rtcclk";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_volup&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;,</div><div class='add'>+		      &lt;0x8 0x80000000 0x1 0x7e000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented  */</div><div class='add'>+	reg_dummy: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dummy_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: framebuffer@f6200000 {</div><div class='add'>+			reg = &lt;0x0 0xf6200000 0x0 (1080 * 2340 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_kinfo_reserved: debug-kinfo-reserved@fcfff000 {</div><div class='add'>+			reg = &lt;0x0 0xfcfff000 0x0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		log_itmon: log-itmon@fffe0000 {</div><div class='add'>+			reg = &lt;0x0 0xfffe0000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cmu_hsi0 {</div><div class='add'>+	clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+		 &lt;&amp;rtcclk&gt;,</div><div class='add'>+		 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_NOC&gt;,</div><div class='add'>+		 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_DPGTC&gt;,</div><div class='add'>+		 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_DPOSC&gt;,</div><div class='add'>+		 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_USB32DRD&gt;;</div><div class='add'>+	clock-names = "oscclk", "rtcclk", "noc", "dpgtc", "dposc", "usb";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cpu2 and cpu3 fail to come up consistently, which leads to a hang later</div><div class='add'>+ * in the boot process. Disable them until the issue is figured out.</div><div class='add'>+ */</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	status = "fail";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	status = "fail";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext_26m {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext_200m {</div><div class='add'>+	clock-frequency = &lt;200000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mct_peris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_F&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ppi_cluster0 {</div><div class='add'>+	affinity = &lt;&amp;cpu0 &amp;cpu1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	/* TODO: Replace these once PMIC is implemented  */</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb32drd {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hsphy {</div><div class='add'>+	/* TODO: Replace these once PMIC is implemented  */</div><div class='add'>+	vdda12-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	vdd-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xtcxo {</div><div class='add'>+	clock-frequency = &lt;76800000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..5877da7baf5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1765 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung's Exynos 2200 SoC pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include "exynos-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa3: gpa3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa4: gpa4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq0: gpq0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq1: gpq1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq2: gpq2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_hostwake: bt-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_F&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus: uart1-bus-pins {</div><div class='add'>+		samsung,pins = "gpq0-3", "gpq0-2", "gpq0-1", "gpq0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_host_wake: wlan-host-wake-pins {</div><div class='add'>+		samsung,pins = "gpa0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_F&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_cmgp {</div><div class='add'>+	gpm0: gpm0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm1: gpm1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm2: gpm2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm3: gpm3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm4: gpm4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm5: gpm5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm6: gpm6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm7: gpm7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm8: gpm8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm9: gpm9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm10: gpm10-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm11: gpm11-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm12: gpm12-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm13: gpm13-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm14: gpm14-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm15: gpm15-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm16: gpm16-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm17: gpm17-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm20: gpm20-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm21: gpm21-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm22: gpm22-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm23: gpm23-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm24: gpm24-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c24_bus: hsi2c24-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c25_bus: hsi2c25-bus-pins {</div><div class='add'>+		samsung,pins = "gpm1-0", "gpm1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c26_bus: hsi2c26-bus-pins {</div><div class='add'>+		samsung,pins = "gpm2-0", "gpm2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c27_bus: hsi2c27-bus-pins {</div><div class='add'>+		samsung,pins = "gpm3-0", "gpm3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c28_bus: hsi2c28-bus-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c29_bus: hsi2c29-bus-pins {</div><div class='add'>+		samsung,pins = "gpm5-0", "gpm5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c30_bus: hsi2c30-bus-pins {</div><div class='add'>+		samsung,pins = "gpm6-0", "gpm6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c31_bus: hsi2c31-bus-pins {</div><div class='add'>+		samsung,pins = "gpm7-0", "gpm7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c32_bus: hsi2c32-bus-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c33_bus: hsi2c33-bus-pins {</div><div class='add'>+		samsung,pins = "gpm9-0", "gpm9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c34_bus: hsi2c34-bus-pins {</div><div class='add'>+		samsung,pins = "gpm10-0", "gpm10-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c35_bus: hsi2c35-bus-pins {</div><div class='add'>+		samsung,pins = "gpm11-0", "gpm11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c36_bus: hsi2c36-bus-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm12-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c37_bus: hsi2c37-bus-pins {</div><div class='add'>+		samsung,pins = "gpm13-0", "gpm13-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c38_bus: hsi2c38-bus-pins {</div><div class='add'>+		samsung,pins = "gpm23-0", "gpm24-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_bus: spi12-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm0-1", "gpm1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_cs: spi12-cs-pins {</div><div class='add'>+		samsung,pins = "gpm1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_cs_func: spi12-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_bus: spi13-bus-pins {</div><div class='add'>+		samsung,pins = "gpm2-0", "gpm2-1", "gpm3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_cs: spi13-cs-pins {</div><div class='add'>+		samsung,pins = "gpm3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_cs_func: spi13-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_bus: spi14-bus-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm4-1", "gpm5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_cs: spi14-cs-pins {</div><div class='add'>+		samsung,pins = "gpm5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_cs_func: spi14-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_bus: spi15-bus-pins {</div><div class='add'>+		samsung,pins = "gpm6-0", "gpm6-1", "gpm7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_cs: spi15-cs-pins {</div><div class='add'>+		samsung,pins = "gpm7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_cs_func: spi15-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_bus: spi16-bus-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm8-1", "gpm9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_cs: spi16-cs-pins {</div><div class='add'>+		samsung,pins = "gpm9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_cs_func: spi16-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_bus: spi17-bus-pins {</div><div class='add'>+		samsung,pins = "gpm10-0", "gpm10-1", "gpm11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_cs: spi17-cs-pins {</div><div class='add'>+		samsung,pins = "gpm11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_cs_func: spi17-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_bus: spi18-bus-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm12-1", "gpm13-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_cs: spi18-cs-pins {</div><div class='add'>+		samsung,pins = "gpm13-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_cs_func: spi18-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm13-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus_single: uart14-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm0-1", "gpm2-0", "gpm2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus_dual: uart14-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus_single: uart15-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm3-0", "gpm3-1", "gpm4-0", "gpm4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus_dual: uart15-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm3-0", "gpm3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart16_bus_single: uart16-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm5-0", "gpm5-1", "gpm6-0", "gpm6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart16_bus_dual: uart16-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm5-0", "gpm5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart17_bus_single: uart17-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm7-0", "gpm7-1", "gpm8-0", "gpm8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart17_bus_dual: uart17-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm7-0", "gpm7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart18_bus_single: uart18-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm8-1", "gpm9-0", "gpm9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart18_bus_dual: uart18-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart19_bus_single: uart19-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm10-0", "gpm10-1", "gpm11-0", "gpm11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart19_bus_dual: uart19-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm12-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart20_bus_single: uart20-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpm13-0", "gpm13-1", "gpm14-0", "gpm14-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart20_bus_dual: uart20-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm13-0", "gpm13-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_hsi1 {</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_clkreq: pcie0-clkreq-pins {</div><div class='add'>+		samsung,pins = "gpf0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_perst: pcie0-perst-pins {</div><div class='add'>+		samsung,pins = "gpf0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_clkreq: pcie1-clkreq-pins {</div><div class='add'>+		samsung,pins = "gpf0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_perst: pcie1-perst-pins {</div><div class='add'>+		samsung,pins = "gpf0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_hsi1ufs {</div><div class='add'>+	gpf2: gpf2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_rst_n: ufs-rst-n-pins {</div><div class='add'>+		samsung,pins = "gpf2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_refclk_out: ufs-refclk-out-pins {</div><div class='add'>+		samsung,pins = "gpf2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV3&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric0 {</div><div class='add'>+	gpb0: gpb0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb1: gpb1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb2: gpb2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb3: gpb3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc0: gpc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc1: gpc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc2: gpc2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg1: gpg1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg2: gpg2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp4: gpp4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s0_bus: aud-i2s0-bus-pins {</div><div class='add'>+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s1_bus: aud-i2s1-bus-pins {</div><div class='add'>+		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s2_bus: aud-i2s2-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s3_bus: aud-i2s3-bus-pins {</div><div class='add'>+		samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s3_pci: aud-i2s3-pci-pins {</div><div class='add'>+		samsung,pins = "gpb3-0", "gpb3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_dsd_bus: aud-dsd-bus-pins {</div><div class='add'>+		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_0_te: decon-0-te-pins {</div><div class='add'>+		samsung,pins = "gpg2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_F&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c8_bus: hsi2c8-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c9_bus: hsi2c9-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-2", "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c0_bus: i3c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpc0-0", "gpc0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c1_bus: i3c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpc1-0", "gpc1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c2_bus: i3c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-0", "gpc2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_bus: spi4-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs: spi4-cs-pins {</div><div class='add'>+		samsung,pins = "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs_func: spi4-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus_single: uart6-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus_dual: uart6-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric1 {</div><div class='add'>+	gpp7: gpp7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp8: gpp8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp9: gpp9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp10: gpp10-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c14_bus: hsi2c14-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-0", "gpp7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c15_bus: hsi2c15-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-2", "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c16_bus: hsi2c16-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-0", "gpp8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c17_bus: hsi2c17-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-2", "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c18_bus: hsi2c18-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-0", "gpp9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c19_bus: hsi2c19-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-2", "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c20_bus: hsi2c20-bus-pins {</div><div class='add'>+		samsung,pins = "gpp10-0", "gpp10-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c21_bus: hsi2c21-bus-pins {</div><div class='add'>+		samsung,pins = "gpp10-2", "gpp10-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_bus: spi7-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-2", "gpp7-1", "gpp7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_cs: spi7-cs-pins {</div><div class='add'>+		samsung,pins = "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_cs_func: spi7-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_bus: spi8-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-2", "gpp8-1", "gpp8-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_cs: spi8-cs-pins {</div><div class='add'>+		samsung,pins = "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_cs_func: spi8-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_bus: spi9-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-2", "gpp9-1", "gpp9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_cs: spi9-cs-pins {</div><div class='add'>+		samsung,pins = "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_cs_func: spi9-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_bus: spi10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp10-2", "gpp10-1", "gpp10-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_cs: spi10-cs-pins {</div><div class='add'>+		samsung,pins = "gpp10-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_cs_func: spi10-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp10-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus_single: uart9-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp7-3", "gpp7-2", "gpp7-1", "gpp7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus_dual: uart9-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp7-0", "gpp7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus_single: uart10-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp8-3", "gpp8-2", "gpp8-1", "gpp8-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus_dual: uart10-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp8-0", "gpp8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus_single: uart11-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp9-3", "gpp9-2", "gpp9-1", "gpp9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus_dual: uart11-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp9-0", "gpp9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus_single: uart12-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp10-3", "gpp10-2", "gpp10-1", "gpp10-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus_dual: uart12-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp10-0", "gpp10-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric2 {</div><div class='add'>+	gpc3: gpc3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc4: gpc4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc5: gpc5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc6: gpc6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc7: gpc7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc8: gpc8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc9: gpc9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg0: gpg0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp0: gpp0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp1: gpp1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp2: gpp2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp3: gpp3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp5: gpp5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp6: gpp6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp11: gpp11-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c0_bus: hsi2c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c1_bus: hsi2c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-2", "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c2_bus: hsi2c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c3_bus: hsi2c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-2", "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c4_bus: hsi2c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c5_bus: hsi2c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-2", "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c6_bus: hsi2c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c7_bus: hsi2c7-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-2", "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c10_bus: hsi2c10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-0", "gpp5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c11_bus: hsi2c11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-2", "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c12_bus: hsi2c12-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-0", "gpp6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c13_bus: hsi2c13-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-2", "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c22_bus: hsi2c22-bus-pins {</div><div class='add'>+		samsung,pins = "gpp11-0", "gpp11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c3_bus: i3c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpc3-0", "gpc3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c4_bus: i3c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpc4-0", "gpc4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c5_bus: i3c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpc5-0", "gpc5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c6_bus: i3c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpc6-0", "gpc6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c7_bus: i3c7-bus-pins {</div><div class='add'>+		samsung,pins = "gpc7-0", "gpc7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c8_bus: i3c8-bus-pins {</div><div class='add'>+		samsung,pins = "gpc8-0", "gpc8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c9_bus: i3c9-bus-pins {</div><div class='add'>+		samsung,pins = "gpc9-0", "gpc9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c10_bus: i3c10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-2", "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_4&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c11_bus: i3c11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-2", "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_4&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c23_bus: hsi2c23-bus-pins {</div><div class='add'>+		samsung,pins = "gpp11-2", "gpp11-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_bus: spi0-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs: spi0-cs-pins {</div><div class='add'>+		samsung,pins = "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs_func: spi0-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_bus: spi1-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs: spi1-cs-pins {</div><div class='add'>+		samsung,pins = "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs_func: spi1-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_bus: spi2-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs: spi2-cs-pins {</div><div class='add'>+		samsung,pins = "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs_func: spi2-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_bus: spi3-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs: spi3-cs-pins {</div><div class='add'>+		samsung,pins = "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs_func: spi3-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_bus: spi5-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_cs: spi5-cs-pins {</div><div class='add'>+		samsung,pins = "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_cs_func: spi5-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_bus: spi6-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-2", "gpp6-1", "gpp6-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_cs: spi6-cs-pins {</div><div class='add'>+		samsung,pins = "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_cs_func: spi6-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_bus: spi11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp11-2", "gpp11-1", "gpp11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_cs: spi11-cs-pins {</div><div class='add'>+		samsung,pins = "gpp11-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_cs_func: spi11-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp11-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_bus_single: uart0-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpg0-2", "gpg0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus_single: uart2-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus_dual: uart2-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus_single: uart3-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus_dual: uart3-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus_single: uart4-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus_dual: uart4-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus_single: uart5-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus_dual: uart5-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus_single: uart7-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus_dual: uart7-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp5-0", "gpp5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus_single: uart8-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp6-3", "gpp6-2", "gpp6-1", "gpp6-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus_dual: uart8-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp6-0", "gpp6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus_single: uart13-bus-single-pins {</div><div class='add'>+		samsung,pins = "gpp11-3", "gpp11-2", "gpp11-1", "gpp11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus_dual: uart13-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp11-0", "gpp11-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_ufs {</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_vts {</div><div class='add'>+	gpv0: gpv0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amic_pdm0_bus: amic-pdm0-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amic_pdm1_bus: amic-pdm1-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amic_pdm2_bus: amic-pdm2-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk0: dmic-bus-clk0-pins {</div><div class='add'>+		samsung,pins = "gpv0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk1: dmic-bus-clk1-pins {</div><div class='add'>+		samsung,pins = "gpv0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk2: dmic-bus-clk2-pins {</div><div class='add'>+		samsung,pins = "gpv0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm0_bus: dmic-pdm0-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm1_bus: dmic-pdm1-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm2_bus: dmic-pdm2-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi<br/>new file mode 100644<br/>index 000000000000..6487ccb58ae7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos2200.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos2200.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1923 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung's Exynos 2200 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,exynos2200-cmu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/samsung,exynos-usi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "samsung,exynos2200";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_alive;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_cmgp;</div><div class='add'>+		pinctrl2 = &amp;pinctrl_hsi1;</div><div class='add'>+		pinctrl3 = &amp;pinctrl_ufs;</div><div class='add'>+		pinctrl4 = &amp;pinctrl_hsi1ufs;</div><div class='add'>+		pinctrl5 = &amp;pinctrl_peric0;</div><div class='add'>+		pinctrl6 = &amp;pinctrl_peric1;</div><div class='add'>+		pinctrl7 = &amp;pinctrl_peric2;</div><div class='add'>+		pinctrl8 = &amp;pinctrl_vts;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xtcxo: clock-1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "oscclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_26m: clock-2 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "ext-26m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_200m: clock-3 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "ext-200m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster2 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;260&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;189&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;260&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;189&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;260&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;189&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a510";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;260&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;189&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@400 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a710";</div><div class='add'>+			reg = &lt;0x400&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;380&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;560&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@500 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a710";</div><div class='add'>+			reg = &lt;0x500&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;380&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;560&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@600 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a710";</div><div class='add'>+			reg = &lt;0x600&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;380&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;560&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@700 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-x2";</div><div class='add'>+			reg = &lt;0x700&gt;;</div><div class='add'>+			capacity-dmips-mhz = &lt;488&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;765&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			cpu-idle-states = &lt;&amp;prime_cpu_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			little_cpu_sleep: cpu-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "c2";</div><div class='add'>+				entry-latency-us = &lt;70&gt;;</div><div class='add'>+				exit-latency-us = &lt;170&gt;;</div><div class='add'>+				min-residency-us = &lt;2000&gt;;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			big_cpu_sleep: cpu-sleep-1 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "c2";</div><div class='add'>+				entry-latency-us = &lt;235&gt;;</div><div class='add'>+				exit-latency-us = &lt;220&gt;;</div><div class='add'>+				min-residency-us = &lt;3500&gt;;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			prime_cpu_sleep: cpu-sleep-2 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "c2";</div><div class='add'>+				entry-latency-us = &lt;150&gt;;</div><div class='add'>+				exit-latency-us = &lt;190&gt;;</div><div class='add'>+				min-residency-us = &lt;2500&gt;;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x10000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a510 {</div><div class='add'>+		compatible = "arm,cortex-a510-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &amp;ppi_cluster0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a710 {</div><div class='add'>+		compatible = "arm,cortex-a710-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &amp;ppi_cluster1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-x2 {</div><div class='add'>+		compatible = "arm,cortex-x2-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &amp;ppi_cluster2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		chipid@10000000 {</div><div class='add'>+			compatible = "samsung,exynos2200-chipid",</div><div class='add'>+				     "samsung,exynos850-chipid";</div><div class='add'>+			reg = &lt;0x10000000 0x24&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peris: clock-controller@10020000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-peris";</div><div class='add'>+			reg = &lt;0x10020000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;cmu_top CLK_DOUT_TCXO_DIV3&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIS_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIS_GIC&gt;;</div><div class='add'>+			clock-names = "tcxo_div3",</div><div class='add'>+				      "noc",</div><div class='add'>+				      "gic";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mct_peris: timer@10040000 {</div><div class='add'>+			compatible = "samsung,exynos2200-mct-peris",</div><div class='add'>+				     "samsung,exynos4210-mct";</div><div class='add'>+			reg = &lt;0x10040000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_top CLK_DOUT_TCXO_DIV3&gt;, &lt;&amp;cmu_peris CLK_MOUT_PERIS_GIC&gt;;</div><div class='add'>+			clock-names = "fin_pll", "mct";</div><div class='add'>+			interrupts = &lt;GIC_SPI 943 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 944 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 945 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 947 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 948 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 954 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10200000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x10200000 0x10000&gt;,     /* GICD */</div><div class='add'>+			      &lt;0x10240000 0x200000&gt;;    /* GICR * 8 */</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+</div><div class='add'>+			ppi-partitions {</div><div class='add'>+				ppi_cluster0: interrupt-partition-0 {</div><div class='add'>+					affinity = &lt;&amp;cpu0 &amp;cpu1 &amp;cpu2 &amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster1: interrupt-partition-1 {</div><div class='add'>+					affinity = &lt;&amp;cpu4 &amp;cpu5 &amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster2: interrupt-partition-2 {</div><div class='add'>+					affinity = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric0: clock-controller@10400000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-peric0";</div><div class='add'>+			reg = &lt;0x10400000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_IP0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_IP1&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc", "ip0", "ip1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_peric0: syscon@10420000 {</div><div class='add'>+			compatible = "samsung,exynos2200-peric0-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x10420000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric0: pinctrl@10430000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x10430000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi4: usi@105000c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x105000c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1024&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_8: i2c@10500000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10500000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_6: serial@10500000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10500000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart6_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi4_i2c: usi@105100c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x105100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1024&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_9: i2c@10510000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10510000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric1: clock-controller@10700000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-peric1";</div><div class='add'>+			reg = &lt;0x10700000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_IP0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_IP1&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc", "ip0", "ip1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_peric1: syscon@10720000 {</div><div class='add'>+			compatible = "samsung,exynos2200-peric1-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x10720000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric1: pinctrl@10730000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x10730000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi7: usi@109000c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109000c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI07&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2030&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_14: i2c@10900000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10900000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI07&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_9: serial@10900000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10900000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI07&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart9_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi7_i2c: usi@109100c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2034&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_15: i2c@10910000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10910000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c15_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi8: usi@109200c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI08&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2038&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_16: i2c@10920000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10920000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI08&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c16_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_10: serial@10920000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10920000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI08&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart10_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi8_i2c: usi@109300c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109300c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x203c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_17: i2c@10930000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10930000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c17_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi9: usi@109400c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109400c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2040&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_18: i2c@10940000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10940000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c18_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_11: serial@10940000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10940000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart11_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi9_i2c: usi@109500c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109500c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2044&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_19: i2c@10950000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10950000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c19_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi10: usi@109600c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109600c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x2048&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_20: i2c@10960000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10960000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c20_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_12: serial@10960000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x10960000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart12_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi10_i2c: usi@109700c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109700c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x204c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_21: i2c@10970000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x10970000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_MOUT_PERIC0_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c21_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_hsi0: clock-controller@10a00000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-hsi0";</div><div class='add'>+			reg = &lt;0x10a00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb32drd: phy@10aa0000 {</div><div class='add'>+			compatible = "samsung,exynos2200-usb32drd-phy";</div><div class='add'>+			reg = &lt;0x10aa0000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_MOUT_HSI0_NOC&gt;;</div><div class='add'>+			clock-names = "phy";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_hsphy&gt;;</div><div class='add'>+			phy-names = "hs";</div><div class='add'>+</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_hsphy: phy@10ab0000 {</div><div class='add'>+			compatible = "samsung,exynos2200-eusb2-phy";</div><div class='add'>+			reg = &lt;0x10ab0000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_MOUT_HSI0_USB32DRD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_MOUT_HSI0_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_DOUT_DIV_CLK_HSI0_EUSB&gt;;</div><div class='add'>+			clock-names = "ref", "bus", "ctrl";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb: usb@10b00000 {</div><div class='add'>+			compatible = "samsung,exynos2200-dwusb3";</div><div class='add'>+			ranges = &lt;0x0 0x10b00000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_MOUT_HSI0_NOC&gt;;</div><div class='add'>+			clock-names = "link_aclk";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb_dwc3: usb@0 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;cmu_hsi0 CLK_MOUT_HSI0_USB32DRD&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;usb32drd 0&gt;;</div><div class='add'>+				phy-names = "usb2-phy";</div><div class='add'>+</div><div class='add'>+				snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+				snps,gfladj-refclk-lpm-sel-quirk;</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				snps,quirk-frame-length-adjustment = &lt;0x20&gt;;</div><div class='add'>+				snps,usb3_lpm_capable;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_ufs: clock-controller@11000000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-ufs";</div><div class='add'>+			reg = &lt;0x11000000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_UFS_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_MOUT_CMU_UFS_MMC_CARD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_UFS_UFS_EMBD&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc", "mmc", "ufs";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_ufs: syscon@11020000 {</div><div class='add'>+			compatible = "samsung,exynos2200-ufs-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x11020000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ufs: pinctrl@11040000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x11040000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_hsi1ufs: pinctrl@11060000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x11060000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_hsi1: pinctrl@11240000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x11240000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric2: clock-controller@11c00000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-peric2";</div><div class='add'>+			reg = &lt;0x11c00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC2_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC2_IP0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC2_IP1&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc", "ip0", "ip1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_peric2: syscon@11c20000 {</div><div class='add'>+			compatible = "samsung,exynos2200-peric2-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x11c20000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric2: pinctrl@11c30000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x11c30000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi0: usi@11d000c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d000c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI00&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_0: i2c@11d00000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d00000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI00&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c0_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_2: serial@11d00000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11d00000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI00&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart2_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi0_i2c: usi@11d100c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2004&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_1: i2c@11d10000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d10000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c1_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi1: usi@11d200c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI01&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2008&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_2: i2c@11d20000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d20000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI01&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c2_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_3: serial@11d20000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11d20000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI01&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart3_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi1_i2c: usi@11d300c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d300c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x200c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_3: i2c@11d30000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d30000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c3_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi2: usi@11d400c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d400c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI02&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2010&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_4: i2c@11d40000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d40000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI02&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c4_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_4: serial@11d40000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11d40000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI02&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart4_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi2_i2c: usi@11d500c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d500c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2014&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_5: i2c@11d50000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d50000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi3: usi@11d600c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d600c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI03&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x2018&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_6: i2c@11d60000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d60000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI03&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_5: serial@11d60000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11d60000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI03&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart5_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi3_i2c: usi@11d700c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d700c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x201c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_7: i2c@11d70000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d70000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c7_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi5_i2c: usi@11d800c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d800c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x102c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_11: i2c@11d80000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d80000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi6_i2c: usi@11d900c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11d900c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x1004&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_13: i2c@11d90000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11d90000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi11: usi@11da00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11da00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI11&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x1058&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_22: i2c@11da0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11da0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI11&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c22_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_13: serial@11da0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11da0000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI11&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart13_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi11_i2c: usi@11db00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11db00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x105c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_23: i2c@11db0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11db0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c23_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi5: usi@11dd00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11dd00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI05&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x117c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_10: i2c@11dd0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11dd0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI05&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_7: serial@11dd0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11dd0000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI05&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart7_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi6: usi@11de00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x11de00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI06&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric2 0x1180&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_12: i2c@11de0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x11de0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI06&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_8: serial@11de0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x11de0000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric2 CLK_MOUT_PERIC2_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric2 CLK_DOUT_PERIC2_USI06&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart8_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cmgp: clock-controller@14e00000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-cmgp";</div><div class='add'>+			reg = &lt;0x14e00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_alive CLK_DOUT_ALIVE_CMGP_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_alive CLK_DOUT_ALIVE_CMGP_PERI&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc", "peri";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_cmgp: syscon@14e20000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmgp-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x14e20000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_cmgp: pinctrl@14e30000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x14e30000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos2200-wakeup-eint",</div><div class='add'>+					     "samsung,exynos850-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp0: usi@14f000c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f000c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI0&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_24: i2c@14f00000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f00000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI0&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c24_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_14: serial@14f00000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14f00000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI0&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart14_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp0: usi@14f100c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f100c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2070&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_25: i2c@14f10000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f10000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c25_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp1: usi@14f200c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f200c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI1&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2010&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_26: i2c@14f20000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f20000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c26_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_15: serial@14f20000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14f20000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI1&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart15_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp1: usi@14f300c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f300c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2074&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_27: i2c@14f30000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f30000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c27_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp2: usi@14f400c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f400c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI2&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2020&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_28: i2c@14f40000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f40000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI2&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c28_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_16: serial@14f40000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14f40000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI2&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart16_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp2: usi@14f500c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f500c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2024&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_29: i2c@14f50000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f50000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c29_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp3: usi@14f600c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f600c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI3&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2030&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_30: i2c@14f60000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f60000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI3&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c30_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_17: serial@14f60000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14f60000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI3&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart17_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp3: usi@14f700c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f700c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2034&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_31: i2c@14f70000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f70000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c31_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp4: usi@14f800c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f800c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI4&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2040&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_32: i2c@14f80000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f80000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI4&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c32_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_18: serial@14f80000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14f80000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI4&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart18_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp4: usi@14f900c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14f900c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2044&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_33: i2c@14f90000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14f90000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c33_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp5: usi@14fa00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14fa00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI5&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2050&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_34: i2c@14fa0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14fa0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI5&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c34_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_19: serial@14fa0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14fa0000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI5&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart19_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp5: usi@14fb00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14fb00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2054&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_35: i2c@14fb0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14fb0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c35_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_cmgp6: usi@14fc00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14fc00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI6&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2060&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_36: i2c@14fc0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14fc0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI6&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c36_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_20: serial@14fc0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-uart", "google,gs101-uart";</div><div class='add'>+				reg = &lt;0x14fc0000 0xc0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_USI6&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart20_bus_single&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp6: usi@14fd00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14fd00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2064&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_37: i2c@14fd0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14fd0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c37_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_i2c_cmgp7: usi@14fe00c0 {</div><div class='add'>+			compatible = "samsung,exynos2200-usi", "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x14fe00c0 0x20&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_cmgp 0x2080&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_38: i2c@14fe0000 {</div><div class='add'>+				compatible = "samsung,exynos2200-hsi2c",</div><div class='add'>+					     "samsung,exynosautov9-hsi2c";</div><div class='add'>+				reg = &lt;0x14fe0000 0xc0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_cmgp CLK_DOUT_CMGP_I2C&gt;,</div><div class='add'>+					 &lt;&amp;cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER&gt;;</div><div class='add'>+				clock-names = "hsi2c", "hsi2c_pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c38_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_vts: clock-controller@15300000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-vts";</div><div class='add'>+			reg = &lt;0x15300000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_VTS_DMIC&gt;;</div><div class='add'>+			clock-names = "oscclk", "dmic";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_vts: pinctrl@15320000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x15320000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_alive: clock-controller@15800000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-alive";</div><div class='add'>+			reg = &lt;0x15800000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_ALIVE_NOC&gt;;</div><div class='add'>+			clock-names = "oscclk", "noc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_alive: pinctrl@15850000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pinctrl";</div><div class='add'>+			reg = &lt;0x15850000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos2200-wakeup-eint",</div><div class='add'>+					     "samsung,exynos850-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_system_controller: system-controller@15860000 {</div><div class='add'>+			compatible = "samsung,exynos2200-pmu",</div><div class='add'>+				     "samsung,exynos7-pmu", "syscon";</div><div class='add'>+			reg = &lt;0x15860000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			reboot: syscon-reboot {</div><div class='add'>+				compatible = "syscon-reboot";</div><div class='add'>+				offset = &lt;0x3c00&gt;; /* SYSTEM_CONFIGURATION */</div><div class='add'>+				mask = &lt;0x2&gt;; /* SWRESET_SYSTEM */</div><div class='add'>+				value = &lt;0x2&gt;; /* reset value */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_top: clock-controller@1a320000 {</div><div class='add'>+			compatible = "samsung,exynos2200-cmu-top";</div><div class='add'>+			reg = &lt;0x1a320000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;;</div><div class='add'>+			clock-names = "oscclk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Non-updatable, broken stock Samsung bootloader does not</div><div class='add'>+		 * configure CNTFRQ_EL0</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;25600000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "exynos2200-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi<br/>index 8f02de8480b6..a1fb354dea9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c_max98504: i2c-gpio-0 {</div><div class='add'>+	i2c_max98504: i2c-13 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;gpd0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;gpd0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi<br/>index 0b9053b9b2b5..fa2029e280a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos5433.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos5433.dtsi</a></div><div class='hunk'>@@ -937,6 +937,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gic: interrupt-controller@11001000 {</div><div class='ctx'> 			compatible = "arm,gic-400";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x11001000 0x1000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts b/arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts<br/>new file mode 100644<br/>index 000000000000..eb7b48593187<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos7870-a2corelte.dts</a></div><div class='hunk'>@@ -0,0 +1,630 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy A2 Core (a2corelte) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2018 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos7870.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy A2 Core";</div><div class='add'>+	compatible = "samsung,a2corelte", "samsung,exynos7870";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;mmc0;</div><div class='add'>+		mmc1 = &amp;mmc1;</div><div class='add'>+		mmc2 = &amp;mmc2;</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial1 = &amp;serial1;</div><div class='add'>+		serial2 = &amp;serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = &amp;serial2;</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x67000000 (540 * 960 * 4)&gt;;</div><div class='add'>+			width = &lt;540&gt;;</div><div class='add'>+			height = &lt;960&gt;;</div><div class='add'>+			stride = &lt;(540 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		label = "GPIO Keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			gpios = &lt;&amp;gpa0 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-voldown {</div><div class='add'>+			label = "Volume Down Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volup {</div><div class='add'>+			label = "Volume Up Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0x3f200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwrseq_mmc1: pwrseq-mmc1 {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* mmc2: vmmc */</div><div class='add'>+	vdd_fixed_mmc2: regulator-fixed-mmc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_fixed_mmc2";</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpc0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_fixed_proxled: regulator-fixed-proxled {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_fixed_proxled";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		gpio = &lt;&amp;gpd4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@46800000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0x46800000 0x8000&gt;;</div><div class='add'>+			console-size = &lt;0x4000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			reg = &lt;0x0 0x67000000 (540 * 960 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vibrator {</div><div class='add'>+		compatible = "regulator-haptic";</div><div class='add'>+		haptic-supply = &lt;&amp;vdd_ldo32&gt;;</div><div class='add'>+		min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mpu05-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_buck1: buck1 {</div><div class='add'>+				regulator-name = "vdd_buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck2: buck2 {</div><div class='add'>+				regulator-name = "vdd_buck2";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck3: buck3 {</div><div class='add'>+				regulator-name = "vdd_buck3";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck4: buck4 {</div><div class='add'>+				regulator-name = "vdd_buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck5: buck5 {</div><div class='add'>+				regulator-name = "vdd_buck5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo1: ldo1 {</div><div class='add'>+				regulator-name = "vdd_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc2: vqmmc */</div><div class='add'>+			vdd_ldo2: ldo2 {</div><div class='add'>+				regulator-name = "vdd_ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo3: ldo3 {</div><div class='add'>+				regulator-name = "vdd_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo4: ldo4 {</div><div class='add'>+				regulator-name = "vdd_ldo4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo5: ldo5 {</div><div class='add'>+				regulator-name = "vdd_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo6: ldo6 {</div><div class='add'>+				regulator-name = "vdd_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo7: ldo7 {</div><div class='add'>+				regulator-name = "vdd_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* usbdrd: vdd33 */</div><div class='add'>+			vdd_ldo8: ldo8 {</div><div class='add'>+				regulator-name = "vdd_ldo8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo9: ldo9 {</div><div class='add'>+				regulator-name = "vdd_ldo9";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo10: ldo10 {</div><div class='add'>+				regulator-name = "vdd_ldo10";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo25: ldo25 {</div><div class='add'>+				regulator-name = "vdd_ldo25";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vmmc */</div><div class='add'>+			vdd_ldo26: ldo26 {</div><div class='add'>+				regulator-name = "vdd_ldo26";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vqmmc */</div><div class='add'>+			vdd_ldo27: ldo27 {</div><div class='add'>+				regulator-name = "vdd_ldo27";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo29: ldo29 {</div><div class='add'>+				regulator-name = "vdd_ldo29";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo30: ldo30 {</div><div class='add'>+				regulator-name = "vdd_ldo30";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo31: ldo31 {</div><div class='add'>+				regulator-name = "vdd_ldo31";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* vibrator: haptic */</div><div class='add'>+			vdd_ldo32: ldo32 {</div><div class='add'>+				regulator-name = "vdd_ldo32";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo33: ldo33 {</div><div class='add'>+				regulator-name = "vdd_ldo33";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo34: ldo34 {</div><div class='add'>+				regulator-name = "vdd_ldo34";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* touchscreen: vdd */</div><div class='add'>+			vdd_ldo35: ldo35 {</div><div class='add'>+				regulator-name = "vdd_ldo35";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	accelerometer@1d {</div><div class='add'>+		compatible = "st,lis2ds12";</div><div class='add'>+		reg = &lt;0x1d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;accel_irq&gt;;</div><div class='add'>+</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	proximity@48 {</div><div class='add'>+		compatible = "sensortek,stk3013", "sensortek,stk3310";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;5 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;proxm_irq&gt;;</div><div class='add'>+</div><div class='add'>+		proximity-near-level = &lt;25&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@4b {</div><div class='add'>+		compatible = "syna,rmi4-i2c";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_irq&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vdd_ldo35&gt;;</div><div class='add'>+</div><div class='add'>+		syna,reset-delay-ms = &lt;200&gt;;</div><div class='add'>+		syna,startup-delay-ms = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+		rmi4-f01@1 {</div><div class='add'>+			reg = &lt;0x01&gt;;</div><div class='add'>+			syna,nosleep-mode = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f12@12 {</div><div class='add'>+			reg = &lt;0x12&gt;;</div><div class='add'>+			syna,sensor-type = &lt;1&gt;;</div><div class='add'>+			syna,rezero-wait-ms = &lt;200&gt;;</div><div class='add'>+			syna,clip-x-high = &lt;539&gt;;</div><div class='add'>+			syna,clip-y-high = &lt;959&gt;;</div><div class='add'>+			touchscreen-x-mm = &lt;62&gt;;</div><div class='add'>+			touchscreen-y-mm = &lt;110&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_rdqs &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_ldo26&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo27&gt;;</div><div class='add'>+</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;2 4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_clk &amp;sd1_cmd &amp;sd1_bus1 &amp;sd1_bus4&gt;;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;pwrseq_mmc1&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43430a1-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus1 &amp;sd2_bus4 &amp;dwmmc2_irq&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_fixed_mmc2&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo2&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	broken-cd;</div><div class='add'>+	disable-wp;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	accel_irq: accel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dwmmc2_irq: dwmmc2-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuel_irq: fuel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_irq: pmic-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-2";</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	proxm_irq: proxm-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_irq: touch-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_hostwake: wlan-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_top {</div><div class='add'>+	bt_enable: bt-enable-pins {</div><div class='add'>+		samsung,pins = "gpd4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_enable: wlan-enable-pins {</div><div class='add'>+		samsung,pins = "gpd3-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+		samsung,pin-val = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43430a1-bt";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_btwake &amp;bt_hostwake &amp;bt_enable&gt;;</div><div class='add'>+</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpa1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpa1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpd4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	vdd33-supply = &lt;&amp;vdd_ldo8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts b/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts<br/>new file mode 100644<br/>index 000000000000..b8ce433b93b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts</a></div><div class='hunk'>@@ -0,0 +1,613 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy J6 (j6lte) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2018 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos7870.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy J6";</div><div class='add'>+	compatible = "samsung,j6lte", "samsung,exynos7870";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;mmc0;</div><div class='add'>+		mmc1 = &amp;mmc1;</div><div class='add'>+		mmc2 = &amp;mmc2;</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial1 = &amp;serial1;</div><div class='add'>+		serial2 = &amp;serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = &amp;serial2;</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x67000000 (720 * 1480 * 4)&gt;;</div><div class='add'>+			width = &lt;720&gt;;</div><div class='add'>+			height = &lt;1480&gt;;</div><div class='add'>+			stride = &lt;(720 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-hall-effect-sensor {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		label = "GPIO Hall Effect Sensor";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_irq&gt;;</div><div class='add'>+</div><div class='add'>+		event-hall-effect-sensor {</div><div class='add'>+			label = "Hall Effect Sensor";</div><div class='add'>+			gpios = &lt;&amp;gpa1 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		label = "GPIO Keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			gpios = &lt;&amp;gpa0 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-voldown {</div><div class='add'>+			label = "Volume Down Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volup {</div><div class='add'>+			label = "Volume Up Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0x3d800000&gt;,</div><div class='add'>+		      &lt;0x0 0x80000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwrseq_mmc1: pwrseq-mmc1 {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* mmc2: vmmc */</div><div class='add'>+	vdd_fixed_mmc2: regulator-fixed-mmc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_fixed_mmc2";</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpc0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@46e00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0x46e00000 0x8000&gt;;</div><div class='add'>+			console-size = &lt;0x4000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			reg = &lt;0x0 0x67000000 (720 * 1480 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vibrator {</div><div class='add'>+		compatible = "regulator-haptic";</div><div class='add'>+		haptic-supply = &lt;&amp;vdd_ldo32&gt;;</div><div class='add'>+		min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mpu05-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_buck1: buck1 {</div><div class='add'>+				regulator-name = "vdd_buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck2: buck2 {</div><div class='add'>+				regulator-name = "vdd_buck2";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck3: buck3 {</div><div class='add'>+				regulator-name = "vdd_buck3";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck4: buck4 {</div><div class='add'>+				regulator-name = "vdd_buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck5: buck5 {</div><div class='add'>+				regulator-name = "vdd_buck5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo1: ldo1 {</div><div class='add'>+				regulator-name = "vdd_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc2: vqmmc */</div><div class='add'>+			vdd_ldo2: ldo2 {</div><div class='add'>+				regulator-name = "vdd_ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo3: ldo3 {</div><div class='add'>+				regulator-name = "vdd_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo4: ldo4 {</div><div class='add'>+				regulator-name = "vdd_ldo4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo5: ldo5 {</div><div class='add'>+				regulator-name = "vdd_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo6: ldo6 {</div><div class='add'>+				regulator-name = "vdd_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo7: ldo7 {</div><div class='add'>+				regulator-name = "vdd_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* usbdrd: vdd33 */</div><div class='add'>+			vdd_ldo8: ldo8 {</div><div class='add'>+				regulator-name = "vdd_ldo8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo9: ldo9 {</div><div class='add'>+				regulator-name = "vdd_ldo9";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo10: ldo10 {</div><div class='add'>+				regulator-name = "vdd_ldo10";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo25: ldo25 {</div><div class='add'>+				regulator-name = "vdd_ldo25";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vmmc */</div><div class='add'>+			vdd_ldo26: ldo26 {</div><div class='add'>+				regulator-name = "vdd_ldo26";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vqmmc */</div><div class='add'>+			vdd_ldo27: ldo27 {</div><div class='add'>+				regulator-name = "vdd_ldo27";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo29: ldo29 {</div><div class='add'>+				regulator-name = "vdd_ldo29";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo30: ldo30 {</div><div class='add'>+				regulator-name = "vdd_ldo30";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo31: ldo31 {</div><div class='add'>+				regulator-name = "vdd_ldo31";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* vibrator: haptic */</div><div class='add'>+			vdd_ldo32: ldo32 {</div><div class='add'>+				regulator-name = "vdd_ldo32";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo33: ldo33 {</div><div class='add'>+				regulator-name = "vdd_ldo33";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* touchscreen: vdd */</div><div class='add'>+			vdd_ldo34: ldo34 {</div><div class='add'>+				regulator-name = "vdd_ldo34";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo35: ldo35 {</div><div class='add'>+				regulator-name = "vdd_ldo35";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	accelerometer@1d {</div><div class='add'>+		compatible = "st,lis2ds12";</div><div class='add'>+		reg = &lt;0x1d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;accel_irq&gt;;</div><div class='add'>+</div><div class='add'>+		mount-matrix = "-1", "0",  "0",</div><div class='add'>+				"0", "1",  "0",</div><div class='add'>+				"0", "0", "-1";</div><div class='add'>+</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@20 {</div><div class='add'>+		compatible = "zinitix,bt532";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_irq&gt;;</div><div class='add'>+</div><div class='add'>+		touchscreen-size-x = &lt;720&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;1480&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vdd_ldo34&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_rdqs &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_ldo26&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo27&gt;;</div><div class='add'>+</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;2 4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_clk &amp;sd1_cmd &amp;sd1_bus1 &amp;sd1_bus4&gt;;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;pwrseq_mmc1&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43430a1-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus1 &amp;sd2_bus4 &amp;dwmmc2_irq&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_fixed_mmc2&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo2&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	broken-cd;</div><div class='add'>+	disable-wp;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	accel_irq: accel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dwmmc2_irq: dwmmc2-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuel_irq: fuel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_irq: hall-irq-pins {</div><div class='add'>+		samsung,pins = "gpa1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_irq: pmic-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-2";</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_irq: touch-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_hostwake: wlan-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_top {</div><div class='add'>+	bt_enable: bt-enable-pins {</div><div class='add'>+		samsung,pins = "gpd4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_enable: wlan-enable-pins {</div><div class='add'>+		samsung,pins = "gpd3-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+		samsung,pin-val = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43430a1-bt";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_btwake &amp;bt_hostwake &amp;bt_enable&gt;;</div><div class='add'>+</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpa1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpa1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpd4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	vdd33-supply = &lt;&amp;vdd_ldo8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts b/arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts<br/>new file mode 100644<br/>index 000000000000..b1d9eff5a827<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos7870-on7xelte.dts</a></div><div class='hunk'>@@ -0,0 +1,662 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy J7 Prime (on7xelte) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos7870.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy J7 Prime";</div><div class='add'>+	compatible = "samsung,on7xelte", "samsung,exynos7870";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;mmc0;</div><div class='add'>+		mmc1 = &amp;mmc1;</div><div class='add'>+		mmc2 = &amp;mmc2;</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial1 = &amp;serial1;</div><div class='add'>+		serial2 = &amp;serial2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = &amp;serial2;</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x67000000 (1080 * 1920 * 4)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;1920&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		label = "GPIO Keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_home &amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+</div><div class='add'>+		key-home {</div><div class='add'>+			label = "Home Key";</div><div class='add'>+			gpios = &lt;&amp;gpa1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			gpios = &lt;&amp;gpa0 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-voldown {</div><div class='add'>+			label = "Volume Down Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volup {</div><div class='add'>+			label = "Volume Up Key";</div><div class='add'>+			gpios = &lt;&amp;gpa2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0x3e400000&gt;,</div><div class='add'>+		      &lt;0x0 0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwrseq_mmc1: pwrseq-mmc1 {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* mmc2: vmmc */</div><div class='add'>+	vdd_fixed_mmc2: regulator-fixed-mmc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_fixed_mmc2";</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpc0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@46e00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0x46e00000 0x8000&gt;;</div><div class='add'>+			console-size = &lt;0x4000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer@67000000 {</div><div class='add'>+			reg = &lt;0x0 0x67000000 (1080 * 1920 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vibrator {</div><div class='add'>+		compatible = "regulator-haptic";</div><div class='add'>+		haptic-supply = &lt;&amp;vdd_ldo32&gt;;</div><div class='add'>+		min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@66 {</div><div class='add'>+		compatible = "samsung,s2mpu05-pmic";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_buck1: buck1 {</div><div class='add'>+				regulator-name = "vdd_buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck2: buck2 {</div><div class='add'>+				regulator-name = "vdd_buck2";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck3: buck3 {</div><div class='add'>+				regulator-name = "vdd_buck3";</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck4: buck4 {</div><div class='add'>+				regulator-name = "vdd_buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_buck5: buck5 {</div><div class='add'>+				regulator-name = "vdd_buck5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo1: ldo1 {</div><div class='add'>+				regulator-name = "vdd_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc2: vqmmc */</div><div class='add'>+			vdd_ldo2: ldo2 {</div><div class='add'>+				regulator-name = "vdd_ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo3: ldo3 {</div><div class='add'>+				regulator-name = "vdd_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo4: ldo4 {</div><div class='add'>+				regulator-name = "vdd_ldo4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo5: ldo5 {</div><div class='add'>+				regulator-name = "vdd_ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo6: ldo6 {</div><div class='add'>+				regulator-name = "vdd_ldo6";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo7: ldo7 {</div><div class='add'>+				regulator-name = "vdd_ldo7";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* usbdrd: vdd33 */</div><div class='add'>+			vdd_ldo8: ldo8 {</div><div class='add'>+				regulator-name = "vdd_ldo8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo9: ldo9 {</div><div class='add'>+				regulator-name = "vdd_ldo9";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo10: ldo10 {</div><div class='add'>+				regulator-name = "vdd_ldo10";</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo25: ldo25 {</div><div class='add'>+				regulator-name = "vdd_ldo25";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vmmc */</div><div class='add'>+			vdd_ldo26: ldo26 {</div><div class='add'>+				regulator-name = "vdd_ldo26";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* mmc0: vqmmc */</div><div class='add'>+			vdd_ldo27: ldo27 {</div><div class='add'>+				regulator-name = "vdd_ldo27";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2375000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo29: ldo29 {</div><div class='add'>+				regulator-name = "vdd_ldo29";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo30: ldo30 {</div><div class='add'>+				regulator-name = "vdd_ldo30";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo31: ldo31 {</div><div class='add'>+				regulator-name = "vdd_ldo31";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* vibrator: haptic */</div><div class='add'>+			vdd_ldo32: ldo32 {</div><div class='add'>+				regulator-name = "vdd_ldo32";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo33: ldo33 {</div><div class='add'>+				regulator-name = "vdd_ldo33";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo34: ldo34 {</div><div class='add'>+				regulator-name = "vdd_ldo34";</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ldo35: ldo35 {</div><div class='add'>+				regulator-name = "vdd_ldo35";</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@70 {</div><div class='add'>+		compatible = "syna,rmi4-i2c";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpc3&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_irq&gt;;</div><div class='add'>+</div><div class='add'>+		syna,reset-delay-ms = &lt;200&gt;;</div><div class='add'>+		syna,startup-delay-ms = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+		rmi4-f01@1 {</div><div class='add'>+			reg = &lt;0x01&gt;;</div><div class='add'>+			syna,nosleep-mode = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f12@12 {</div><div class='add'>+			reg = &lt;0x12&gt;;</div><div class='add'>+			syna,sensor-type = &lt;1&gt;;</div><div class='add'>+			syna,rezero-wait-ms = &lt;200&gt;;</div><div class='add'>+			syna,clip-x-high = &lt;1079&gt;;</div><div class='add'>+			syna,clip-y-high = &lt;1919&gt;;</div><div class='add'>+			touchscreen-x-mm = &lt;68&gt;;</div><div class='add'>+			touchscreen-y-mm = &lt;121&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	accelerometer@1d {</div><div class='add'>+		compatible = "st,lis2hh12";</div><div class='add'>+		reg = &lt;0x1d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;accel_irq&gt;;</div><div class='add'>+</div><div class='add'>+		mount-matrix = "1",  "0",  "0",</div><div class='add'>+			       "0", "-1",  "0",</div><div class='add'>+			       "0",  "0", "-1";</div><div class='add'>+</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+	samsung,i2c-max-bus-freq = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	proximity@48 {</div><div class='add'>+		compatible = "sensortek,stk3013", "sensortek,stk3310";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa0&gt;;</div><div class='add'>+		interrupts = &lt;5 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;proxm_irq&gt;;</div><div class='add'>+</div><div class='add'>+		proximity-near-level = &lt;25&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_rdqs &amp;sd0_bus1 &amp;sd0_bus4 &amp;sd0_bus8&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_ldo26&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo27&gt;;</div><div class='add'>+</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;2 4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd1_clk &amp;sd1_cmd &amp;sd1_bus1 &amp;sd1_bus4&gt;;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;pwrseq_mmc1&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43430a1-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa2&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpd3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus1 &amp;sd2_bus4 &amp;dwmmc2_irq&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_fixed_mmc2&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_ldo2&gt;;</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	fifo-depth = &lt;64&gt;;</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	broken-cd;</div><div class='add'>+	disable-wp;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	accel_irq: accel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dwmmc2_irq: dwmmc2-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuel_irq: fuel-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_home: key-home-pins {</div><div class='add'>+		samsung,pins = "gpa1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_irq: pmic-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-2";</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	proxm_irq: proxm-irq-pins {</div><div class='add'>+		samsung,pins = "gpa0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tkey_irq: tkey-irq-pins {</div><div class='add'>+		samsung,pins = "gpa1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_hostwake: wlan-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_top {</div><div class='add'>+	bt_enable: bt-enable-pins {</div><div class='add'>+		samsung,pins = "gpd4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_enable: wlan-enable-pins {</div><div class='add'>+		samsung,pins = "gpd3-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+		samsung,pin-val = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_touch {</div><div class='add'>+	touch_irq: touch-irq-pins {</div><div class='add'>+		samsung,pins = "gpc3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43430a1-bt";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_btwake &amp;bt_hostwake &amp;bt_enable&gt;;</div><div class='add'>+</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpa1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpa1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpd4 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	vdd33-supply = &lt;&amp;vdd_ldo8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..99a28d06aee7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1021 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Samsung Exynos7870 SoC pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include "exynos-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	etc0: etc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	etc1: etc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq0: gpq0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_btwake: bt-btwake-pins {</div><div class='add'>+		samsung,pins = "gpa1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_hostwake: bt-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa1-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gnss_sensor_i2c: gnss-sensor-i2c-pins {</div><div class='add'>+		samsung,pins = "gpa2-5", "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_6&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gnss_sensor_irq: gnss-sensor-irq-pins {</div><div class='add'>+		samsung,pins = "gpa2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_6&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_int: nfc-int-pins {</div><div class='add'>+		samsung,pins = "gpa2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus: uart2-bus-pins {</div><div class='add'>+		samsung,pins = "gpa1-1", "gpa1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_sleep: uart2-sleep-pins {</div><div class='add'>+		samsung,pins = "gpa1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_dispaud {</div><div class='add'>+	gpz0: gpz0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpz1: gpz1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpz2: gpz2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_amp_bus: i2s-amp-bus-pins {</div><div class='add'>+		samsung,pins = "gpz1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_amp_bus_idle: i2s-amp-bus-idle-pins {</div><div class='add'>+		samsung,pins = "gpz1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_bt_bus: i2s-bt-bus-pins {</div><div class='add'>+		samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_bt_bus_idle: i2s-bt-bus-idle-pins {</div><div class='add'>+		samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_pmic_amp_bus: i2s-pmic-amp-bus-pins {</div><div class='add'>+		samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_pmic_amp_bus_idle: i2s-pmic-amp-bus-idle-pins {</div><div class='add'>+		samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_pmic_bus: i2s-pmic-bus-pins {</div><div class='add'>+		samsung,pins = "gpz1-0", "gpz1-2", "gpz1-3", "gpz1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_pmic_bus_idle: i2s-pmic-bus-idle-pins {</div><div class='add'>+		samsung,pins = "gpz1-0", "gpz1-2", "gpz1-3", "gpz1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_fm_bus: i2s-fm-bus-pins {</div><div class='add'>+		samsung,pins = "gpz2-0", "gpz2-1", "gpz2-2", "gpz2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s_fm_bus_idle: i2s-fm-bus-idle-pins {</div><div class='add'>+		samsung,pins = "gpz2-0", "gpz2-1", "gpz2-2", "gpz2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_ese {</div><div class='add'>+	gpc7: gpc7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_bus: spi0-bus-pins {</div><div class='add'>+		samsung,pins = "gpc7-3", "gpc7-2", "gpc7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs0: spi0-cs0-pins {</div><div class='add'>+		samsung,pins = "gpc7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs1: spi0-cs1-pins {</div><div class='add'>+		samsung,pins = "gpc7-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys {</div><div class='add'>+	gpr0: gpr0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpr1: gpr1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpr2: gpr2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpr3: gpr3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpr4: gpr4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_bus1: sd0-bus-width1-pins {</div><div class='add'>+		samsung,pins = "gpr1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_bus4: sd0-bus-width4-pins {</div><div class='add'>+		samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_bus8: sd0-bus-width8-pins {</div><div class='add'>+		samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk: sd0-clk-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_1x: sd0-clk-fast-slew-rate-1x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_2x: sd0-clk-fast-slew-rate-2x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_3x: sd0-clk-fast-slew-rate-3x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_4x: sd0-clk-fast-slew-rate-4x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_5x: sd0-clk-fast-slew-rate-5x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_clk_fast_slew_rate_6x: sd0-clk-fast-slew-rate-6x-pins {</div><div class='add'>+		samsung,pins = "gpr0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_cmd: sd0-cmd-pins {</div><div class='add'>+		samsung,pins = "gpr0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0_rdqs: sd0-rdqs-pins {</div><div class='add'>+		samsung,pins = "gpr0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_bus1: sd1-bus-width1-pins {</div><div class='add'>+		samsung,pins = "gpr3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_bus4: sd1-bus-width4-pins {</div><div class='add'>+		samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_clk: sd1-clk-pins {</div><div class='add'>+		samsung,pins = "gpr2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1_cmd: sd1-cmd-pins {</div><div class='add'>+		samsung,pins = "gpr2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus1: sd2-bus-width1-pins {</div><div class='add'>+		samsung,pins = "gpr4-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus4: sd2-bus-width4-pins {</div><div class='add'>+		samsung,pins = "gpr4-3", "gpr4-4", "gpr4-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk: sd2-clk-pins {</div><div class='add'>+		samsung,pins = "gpr4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins {</div><div class='add'>+		samsung,pins = "gpr4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins {</div><div class='add'>+		samsung,pins = "gpr4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins {</div><div class='add'>+		samsung,pins = "gpr4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins {</div><div class='add'>+		samsung,pins = "gpr4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_cmd: sd2-cmd-pins {</div><div class='add'>+		samsung,pins = "gpr4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_mif {</div><div class='add'>+	gpm0: gpm0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c0_bus: hsi2c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-1", "gpm0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_nfc {</div><div class='add'>+	gpc2: gpc2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6_bus: i2c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-1", "gpc2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_en: nfc-en-pins {</div><div class='add'>+		samsung,pins = "gpc2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+		samsung,pin-val = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_n5_clk_req: nfc-n5-clk-req-pins {</div><div class='add'>+		samsung,pins = "gpc2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_pd: nfc-pd-pins {</div><div class='add'>+		samsung,pins = "gpc2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_top {</div><div class='add'>+	gpb0: gpb0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc0: gpc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc1: gpc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc4: gpc4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc5: gpc5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc6: gpc6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc8: gpc8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc9: gpc9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd1: gpd1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd2: gpd2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd3: gpd3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd4: gpd4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe0: gpe0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf2: gpf2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf3: gpf3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf4: gpf4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_te_off: decon-te-off-pins {</div><div class='add'>+		samsung,pins = "gpe0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_te_on: decon-te-on-pins {</div><div class='add'>+		samsung,pins = "gpe0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ese_pvdd_en: ese-pvdd-en-pins {</div><div class='add'>+		samsung,pins = "gpf4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_flash: fimc-is-flash-pins {</div><div class='add'>+		samsung,pins = "gpd3-2", "gpd3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk0_fn: fimc-is-mclk0-fn-pins {</div><div class='add'>+		samsung,pins = "gpe0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk0_in: fimc-is-mclk0-in-pins {</div><div class='add'>+		samsung,pins = "gpe0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk0_out: fimc-is-mclk0-out-pins {</div><div class='add'>+		samsung,pins = "gpe0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk1_fn: fimc-is-mclk1-fn-pins {</div><div class='add'>+		samsung,pins = "gpe0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk1_in: fimc-is-mclk1-in-pins {</div><div class='add'>+		samsung,pins = "gpe0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk1_out: fimc-is-mclk1-out-pins {</div><div class='add'>+		samsung,pins = "gpe0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk2_fn: fimc-is-mclk2-fn-pins {</div><div class='add'>+		samsung,pins = "gpf4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fimc_is_mclk2_out: fimc-is-mclk2-out-pins {</div><div class='add'>+		samsung,pins = "gpf4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR3&gt;;</div><div class='add'>+		samsung,pin-val = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c1_bus: hsi2c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpf0-1", "gpf0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c2_bus: hsi2c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpf1-1", "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c3_bus: hsi2c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpf0-3", "gpf0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c4_bus: hsi2c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpf2-1", "gpf2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c5_bus: hsi2c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpf3-0", "gpf3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c6_bus: hsi2c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpf3-2", "gpf3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_bus: i2c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpc4-1", "gpc4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_bus: i2c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpc8-1", "gpc8-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_bus: i2c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpc9-1", "gpc9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_bus: i2c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpc1-1", "gpc1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5_bus: i2c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpc1-3", "gpc1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7_bus: i2c7-bus-pins {</div><div class='add'>+		samsung,pins = "gpc4-3", "gpc4-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8_bus: i2c8-bus-pins {</div><div class='add'>+		samsung,pins = "gpc5-1", "gpc5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_n5_firm: nfc-n5-firm-pins {</div><div class='add'>+		samsung,pins = "gpd4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-val = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_pvdd_en: nfc-pvdd-en-pins {</div><div class='add'>+		samsung,pins = "gpd2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm_tout0: pwm-tout0-pins {</div><div class='add'>+		samsung,pins = "gpc0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm_tout1: pwm-tout1-pins {</div><div class='add'>+		samsung,pins = "gpc0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_bus: spi1-bus-pins {</div><div class='add'>+		samsung,pins = "gpf3-3", "gpf3-2", "gpf3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs0: spi1-cs0-pins {</div><div class='add'>+		samsung,pins = "gpf3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs1: spi1-cs1-pins {</div><div class='add'>+		samsung,pins = "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_bus: spi2-bus-pins {</div><div class='add'>+		samsung,pins = "gpf4-3", "gpf4-2", "gpf4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs0: spi2-cs0-pins {</div><div class='add'>+		samsung,pins = "gpf4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs1: spi2-cs1-pins {</div><div class='add'>+		samsung,pins = "gpd1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_bus: spi3-bus-pins {</div><div class='add'>+		samsung,pins = "gpc6-0", "gpc6-2", "gpc6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_bus_suspend: spi3-bus-suspend-pins {</div><div class='add'>+		samsung,pins = "gpc6-0", "gpc6-2", "gpc6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs: spi3-cs-pins {</div><div class='add'>+		samsung,pins = "gpc6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_bus: spi4-bus-pins {</div><div class='add'>+		samsung,pins = "gpc4-2", "gpc5-0", "gpc5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs: spi4-cs-pins {</div><div class='add'>+		samsung,pins = "gpc4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs_func: spi4-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpc4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_miso: spi4-miso-pins {</div><div class='add'>+		samsung,pins = "gpc5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_mosi_sck_ssn: spi4-mosi-sck-ssn-pins {</div><div class='add'>+		samsung,pins = "gpc5-1", "gpc4-2", "gpc4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_bus: uart0-bus-pins {</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pins = "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus: uart1-bus-pins {</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pins = "gpb0-3", "gpb0-2", "gpb0-1", "gpb0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_touch {</div><div class='add'>+	gpc3: gpc3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_bus: i2c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpc3-1", "gpc3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ese_cs_func: ese-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpc3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+		samsung,pin-val = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ese_cs_func_suspend: ese-cs-func-suspend-pins {</div><div class='add'>+		samsung,pins = "gpc3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos7870.dtsi b/arch/arm64/boot/dts/exynos/exynos7870.dtsi<br/>new file mode 100644<br/>index 000000000000..d5d347623b90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos7870.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos7870.dtsi</a></div><div class='hunk'>@@ -0,0 +1,713 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Samsung Exynos7870 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Kaustabh Chakraborty &lt;kauschluss@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,exynos7870-cmu.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "samsung,exynos7870";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_alive;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_dispaud;</div><div class='add'>+		pinctrl2 = &amp;pinctrl_ese;</div><div class='add'>+		pinctrl3 = &amp;pinctrl_fsys;</div><div class='add'>+		pinctrl4 = &amp;pinctrl_mif;</div><div class='add'>+		pinctrl5 = &amp;pinctrl_nfc;</div><div class='add'>+		pinctrl6 = &amp;pinctrl_top;</div><div class='add'>+		pinctrl7 = &amp;pinctrl_touch;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@102 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@103 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	oscclk: oscclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci";</div><div class='add'>+		method = "smc";</div><div class='add'>+		cpu_suspend = &lt;0xc4000001&gt;;</div><div class='add'>+		cpu_off = &lt;0x84000002&gt;;</div><div class='add'>+		cpu_on = &lt;0xc4000003&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		chipid@10100000 {</div><div class='add'>+			compatible = "samsung,exynos7870-chipid",</div><div class='add'>+				     "samsung,exynos4210-chipid";</div><div class='add'>+			reg = &lt;0x10100000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peri: clock-controller@101f0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-peri";</div><div class='add'>+			reg = &lt;0x101f0000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "bus", "spi0", "spi1", "spi2",</div><div class='add'>+				      "spi3", "spi4", "uart0", "uart1", "uart2";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI2&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI3&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI4&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_UART0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_UART1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_PERI_UART2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_mif: clock-controller@10460000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-mif";</div><div class='add'>+			reg = &lt;0x10460000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_system_controller: system-controller@10480000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pmu",</div><div class='add'>+				     "samsung,exynos7-pmu", "syscon";</div><div class='add'>+			reg = &lt;0x10480000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			reboot-mode {</div><div class='add'>+				compatible = "syscon-reboot-mode";</div><div class='add'>+				offset = &lt;0x080c&gt;;</div><div class='add'>+				mode-bootloader = &lt;0x1234567d&gt;;</div><div class='add'>+				mode-download = &lt;0x12345671&gt;;</div><div class='add'>+				mode-recovery = &lt;0x12345674&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@104e1000 {</div><div class='add'>+			compatible = "arm,cortex-a15-gic";</div><div class='add'>+			reg = &lt;0x104e1000 0x1000&gt;,</div><div class='add'>+			      &lt;0x104e2000 0x1000&gt;,</div><div class='add'>+			      &lt;0x104e4000 0x2000&gt;,</div><div class='add'>+			      &lt;0x104e6000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c0: i2c@10510000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x10510000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c0_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_mif CLK_GOUT_MIF_HSI2C_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_mif: pinctrl@10530000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x10530000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@11400000 {</div><div class='add'>+			compatible = "samsung,exynos7870-mali", "arm,mali-t830";</div><div class='add'>+			reg = &lt;0x11400000 0x5000&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			interrupts = &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			clocks = &lt;&amp;cmu_g3d CLK_GOUT_G3D_CLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_g3d CLK_GOUT_G3D_ASYNCS_D0_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_g3d: clock-controller@11460000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-g3d";</div><div class='add'>+			reg = &lt;0x11460000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "switch";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_G3D_SWITCH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_mfcmscl: clock-controller@12cb0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-mfcmscl";</div><div class='add'>+			reg = &lt;0x12cb0000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "mfc", "mscl";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_MFCMSCL_MFC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_MFCMSCL_MSCL&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@13540000 {</div><div class='add'>+			compatible = "samsung,exynos7870-dw-mshc-smu";</div><div class='add'>+			reg = &lt;0x13540000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_MMC0_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@13550000 {</div><div class='add'>+			compatible = "samsung,exynos7870-dw-mshc-smu";</div><div class='add'>+			reg = &lt;0x13550000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_MMC1_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@13560000 {</div><div class='add'>+			compatible = "samsung,exynos7870-dw-mshc-smu";</div><div class='add'>+			reg = &lt;0x13560000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_MMC2_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd_phy: phy@135c0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-usbdrd-phy";</div><div class='add'>+			reg = &lt;0x135c0000 0x100&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "phy", "ref";</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_MUX_USB20DRD_PHYCLOCK_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_fsys CLK_GOUT_FSYS_MUX_USB_PLL&gt;;</div><div class='add'>+</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd: usb@13600000 {</div><div class='add'>+			compatible = "samsung,exynos7870-dwusb3";</div><div class='add'>+			ranges = &lt;0x0 0x13600000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "bus_early", "ref", "ctrl";</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys CLK_GOUT_FSYS_USB20DRD_ACLK_HSDRD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_fsys CLK_GOUT_FSYS_USB20DRD_HSDRD_REF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_fsys CLK_GOUT_FSYS_USB20DRD_HCLK_USB20_CTRL&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb@0 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				phy-names = "usb2-phy";</div><div class='add'>+				phys = &lt;&amp;usbdrd_phy 0&gt;;</div><div class='add'>+</div><div class='add'>+				usb-role-switch;</div><div class='add'>+				snps,usb2-gadget-lpm-disable;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_fsys: clock-controller@13730000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-fsys";</div><div class='add'>+			reg = &lt;0x13730000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "bus", "usb20drd";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_FSYS_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_FSYS_USB20DRD_REFCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys: pinctrl@13750000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x13750000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@13800000 {</div><div class='add'>+			compatible = "samsung,exynos7870-uart",</div><div class='add'>+				     "samsung,exynos8895-uart";</div><div class='add'>+			reg = &lt;0x13800000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart0_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_UART0_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peri CLK_GOUT_PERI_UART0_EXT_UCLK&gt;;</div><div class='add'>+</div><div class='add'>+			samsung,uart-fifosize = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial1: serial@13810000 {</div><div class='add'>+			compatible = "samsung,exynos7870-uart",</div><div class='add'>+				     "samsung,exynos8895-uart";</div><div class='add'>+			reg = &lt;0x13810000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart1_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_UART1_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peri CLK_GOUT_PERI_UART1_EXT_UCLK&gt;;</div><div class='add'>+</div><div class='add'>+			samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial2: serial@13820000 {</div><div class='add'>+			compatible = "samsung,exynos7870-uart",</div><div class='add'>+				     "samsung,exynos8895-uart";</div><div class='add'>+			reg = &lt;0x13820000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart2_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_UART2_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peri CLK_GOUT_PERI_UART2_EXT_UCLK&gt;;</div><div class='add'>+</div><div class='add'>+			samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@13830000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13830000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C0_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@13840000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13840000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C1_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@13850000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13850000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C2_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@13860000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13860000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C3_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@13870000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13870000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c4_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C4_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@13880000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13880000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c5_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C5_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@13890000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x13890000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c6_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C6_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c1: i2c@138a0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x138a0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c1_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C1_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c2: i2c@138b0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x138b0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c2_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C2_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c3: i2c@138c0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x138c0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c3_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C3_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@138d0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x138d0000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c7_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C7_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c8: i2c@138e0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-i2c",</div><div class='add'>+				     "samsung,s3c2440-i2c";</div><div class='add'>+			reg = &lt;0x138e0000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c8_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "i2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_I2C8_PCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c4: i2c@138f0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x138f0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c4_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C4_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c5: i2c@13950000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x13950000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c5_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C5_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c6: i2c@13960000 {</div><div class='add'>+			compatible = "samsung,exynos7870-hsi2c",</div><div class='add'>+				     "samsung,exynos7-hsi2c";</div><div class='add'>+			reg = &lt;0x13960000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c6_bus&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			clocks = &lt;&amp;cmu_peri CLK_GOUT_PERI_HSI2C6_IPCLK&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_top: pinctrl@139b0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x139b0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_nfc: pinctrl@139c0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x139c0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_touch: pinctrl@139d0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x139d0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_ese: pinctrl@139e0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x139e0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_alive: pinctrl@139f0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x139f0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos7870-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_isp: clock-controller@144d0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-isp";</div><div class='add'>+			reg = &lt;0x144d0000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "cam", "isp", "vra";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_ISP_CAM&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_ISP_ISP&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_ISP_VRA&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_dispaud: pinctrl@148c0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-pinctrl";</div><div class='add'>+			reg = &lt;0x148c0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_dispaud: clock-controller@148d0000 {</div><div class='add'>+			compatible = "samsung,exynos7870-cmu-dispaud";</div><div class='add'>+			reg = &lt;0x148d0000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "oscclk", "bus", "decon_eclk", "decon_vclk";</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_ECLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_VCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Non-updatable, broken stock Samsung bootloader does not</div><div class='add'>+		 * configure CNTFRQ_EL0</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "exynos7870-pinctrl.dtsi"</div><div class='add'>+#include "arm/samsung/exynos-syscon-restart.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts<br/>index f074df8982b3..ab076d326a49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos850-e850-96.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos850-e850-96.dts</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> 	compatible = "winlink,e850-96", "samsung,exynos850";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet;</div><div class='ctx'> 		mmc0 = &amp;mmc_0;</div><div class='ctx'> 		serial0 = &amp;serial_0;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -45,17 +46,9 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * RAM: 4 GiB (eMCP):</div><div class='del'>-	 *   - 2 GiB at 0x80000000</div><div class='del'>-	 *   - 2 GiB at 0x880000000</div><div class='del'>-	 *</div><div class='del'>-	 * 0xbab00000..0xbfffffff: secure memory (85 MiB).</div><div class='del'>-	 */</div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x80000000 0x3ab00000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0000000 0x40000000&gt;,</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x80000000&gt;,</div><div class='ctx'> 		      &lt;0x8 0x80000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +139,11 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		secure_mem: memory@bab00000 {</div><div class='add'>+			reg = &lt;0x0 0xbab00000 0x5500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ramoops@f0000000 {</div><div class='ctx'> 			compatible = "ramoops";</div><div class='ctx'> 			reg = &lt;0x0 0xf0000000 0x200000&gt;;</div><div class='hunk'>@@ -244,10 +242,24 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbdrd_dwc3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='ctx'> 	role-switch-default-mode = "host";</div><div class='ctx'> </div><div class='add'>+	hub@1 {</div><div class='add'>+		compatible = "usb424,9514";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethernet: ethernet@1 {</div><div class='add'>+			compatible = "usb424,ec00";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	port {</div><div class='ctx'> 		usb1_drd_sw: endpoint {</div><div class='ctx'> 			remote-endpoint = &lt;&amp;usb_dr_connector&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi<br/>index f1c8b4613cbc..cb55015c8dce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos850.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos850.dtsi</a></div><div class='hunk'>@@ -651,7 +651,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x138200c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peri 0x1010&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -677,7 +677,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x138a00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peri 0x1020&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -706,7 +706,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x138b00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peri 0x1030&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -735,7 +735,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x138c00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peri 0x1040&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -764,7 +764,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x139400c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peri 0x1050&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_SPI&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_SPI&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -796,7 +796,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x11d000c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_cmgp 0x2000&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -855,7 +855,7 @@</div><div class='ctx'> 			compatible = "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x11d200c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_cmgp 0x2010&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts<br/>new file mode 100644<br/>index 000000000000..61e064af3337<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts</a></div><div class='hunk'>@@ -0,0 +1,198 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S8 (dreamlte/SM-G950F) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos8895.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/samsung,exynos-usi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S8 (SM-G950F)";</div><div class='add'>+	compatible = "samsung,dreamlte", "samsung,exynos8895";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;mmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer@cc000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0xcc000000 (1440 * 2960 * 4)&gt;;</div><div class='add'>+			width = &lt;1440&gt;;</div><div class='add'>+			height = &lt;2960&gt;;</div><div class='add'>+			stride = &lt;(1440 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x3c800000&gt;,</div><div class='add'>+		      &lt;0x0 0xc0000000 0x40000000&gt;,</div><div class='add'>+		      &lt;0x8 0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops@92000000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0 0x92000000 0x8000&gt;;</div><div class='add'>+			record-size = &lt;0x4000&gt;;</div><div class='add'>+			console-size = &lt;0x4000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: framebuffer@cc000000 {</div><div class='add'>+			reg = &lt;0 0xcc000000 (1440 * 2960 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup &amp;key_wink&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		voldown-key {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Typically used for Bixby. Map it as a camera button for now */</div><div class='add'>+		wink-key {</div><div class='add'>+			label = "Camera";</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove once PMIC is implemented  */</div><div class='add'>+	reg_placeholder: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "reg-placeholder";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_23 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@48 {</div><div class='add'>+		compatible = "samsung,s6sy761";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+</div><div class='add'>+		/* TODO: Update once PMIC is implemented */</div><div class='add'>+		avdd-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpa1&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus1 &amp;sd2_bus4 &amp;sd2_cd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	card-detect-delay = &lt;200&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpa1 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	clock-frequency = &lt;800000000&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+</div><div class='add'>+	/* TODO: Add regulators once PMIC is implemented */</div><div class='add'>+</div><div class='add'>+	samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+	samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='add'>+	samsung,dw-mshc-sdr-timing = &lt;0 3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_wink: key-wink-pins {</div><div class='add'>+		samsung,pins = "gpa0-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_cd: sd2-cd-pins {</div><div class='add'>+		samsung,pins = "gpa1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int: ts-int-pins {</div><div class='add'>+		samsung,pins = "gpa1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usi9 {</div><div class='add'>+	samsung,mode = &lt;USI_MODE_I2C0_1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..16903ce63a32<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1094 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include "exynos-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_abox {</div><div class='add'>+	gph0: gph0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gph1: gph1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gph3: gph3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa3: gpa3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa4: gpa4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_hostwake: bt-hostwake-pins {</div><div class='add'>+		samsung,pins = "gpa2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_wake: pcie-wake-pins {</div><div class='add'>+		samsung,pins = "gpa3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus: uart1-bus-pins {</div><div class='add'>+		samsung,pins = "gpa4-4", "gpa4-3", "gpa4-2", "gpa4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_host_wake: wlan-host-wake-pins {</div><div class='add'>+		  samsung,pins = "gpa0-7";</div><div class='add'>+		  samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		  samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		  samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		  samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_busc {</div><div class='add'>+	gpb2: gpb2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c0_bus: hsi2c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-1", "gpb2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speedy_bus: speedy-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys0 {</div><div class='add'>+	gpi0: gpi0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpi1: gpi1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_rst_n: ufs-rst-n-pins {</div><div class='add'>+		samsung,pins = "gpi0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_refclk_out: ufs-refclk-out-pins {</div><div class='add'>+		samsung,pins = "gpi0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys1 {</div><div class='add'>+	gpj0: gpj0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpj1: gpj1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_btwake: bt-btwake-pins {</div><div class='add'>+		samsung,pins = "gpj1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_en: bt-en-pins {</div><div class='add'>+		samsung,pins = "gpj1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cfg_wlanen: cfg-wlanen-pins {</div><div class='add'>+		samsung,pins = "gpj1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk: sd2-clk-pins {</div><div class='add'>+		samsung,pins = "gpj0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_cmd: sd2-cmd-pins {</div><div class='add'>+		samsung,pins = "gpj0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus1: sd2-bus-width1-pins {</div><div class='add'>+		samsung,pins = "gpj0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus4: sd2-bus-width4-pins {</div><div class='add'>+		samsung,pins = "gpj0-3", "gpj0-4", "gpj0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* For Drive strength swapping */</div><div class='add'>+	sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins {</div><div class='add'>+		samsung,pins = "gpj0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins {</div><div class='add'>+		samsung,pins = "gpj0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins {</div><div class='add'>+		samsung,pins = "gpj0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins {</div><div class='add'>+		samsung,pins = "gpj0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric0 {</div><div class='add'>+	gpb1: gpb1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd0: gpd0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd1: gpd1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd2: gpd2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd3: gpd3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe7: gpe7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c5_bus: hsi2c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-1", "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c6_bus: hsi2c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-3", "gpd1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c7_bus: hsi2c7-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-5", "gpd1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c8_bus: hsi2c8-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-7", "gpd1-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c9_bus: hsi2c9-bus-pins {</div><div class='add'>+		samsung,pins = "gpd2-1", "gpd2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c10_bus: hsi2c10-bus-pins {</div><div class='add'>+		samsung,pins = "gpd2-3", "gpd2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c11_bus: hsi2c11-bus-pins {</div><div class='add'>+		samsung,pins = "gpd3-1", "gpd3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c12_bus: hsi2c12-bus-pins {</div><div class='add'>+		samsung,pins = "gpd3-3", "gpd3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hs_i2c14_bus: hs-i2c14-bus-pins {</div><div class='add'>+		samsung,pins = "gpe6-3", "gpe6-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_bus: spi2-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs: spi2-cs-pins {</div><div class='add'>+		samsung,pins = "gpd1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_bus: spi3-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-7", "gpd1-5", "gpd1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs: spi3-cs-pins {</div><div class='add'>+		samsung,pins = "gpd1-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_bus: spi4-bus-pins {</div><div class='add'>+		samsung,pins = "gpd2-3", "gpd2-1", "gpd2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs: spi4-cs-pins {</div><div class='add'>+		samsung,pins = "gpd2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_bus: spi5-bus-pins {</div><div class='add'>+		samsung,pins = "gpd3-3", "gpd3-1", "gpd3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_cs: spi5-cs-pins {</div><div class='add'>+		samsung,pins = "gpd3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_bus: uart0-bus-pins {</div><div class='add'>+		samsung,pins = "gpd0-7", "gpd0-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus: uart2-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus_dual: uart2-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpd1-1", "gpd1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus: uart3-bus-pins {</div><div class='add'>+		samsung,pins = "gpd1-7", "gpd1-6", "gpd1-5", "gpd1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus_dual: uart3-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpd1-5", "gpd1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus: uart4-bus-pins {</div><div class='add'>+		samsung,pins = "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus_dual: uart4-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpd2-1", "gpd2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus: uart5-bus-pins {</div><div class='add'>+		samsung,pins = "gpd3-3", "gpd3-2", "gpd3-1", "gpd3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus_dual: uart5-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpd3-1", "gpd3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric1 {</div><div class='add'>+	gpb0: gpb0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc0: gpc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc1: gpc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc2: gpc2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc3: gpc3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe1: gpe1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe2: gpe2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe3: gpe3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe4: gpe4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe5: gpe5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpe6: gpe6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg0: gpg0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpk0: gpk0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hrm_irq: hrm-irq-pins {</div><div class='add'>+		samsung,pins = "gpe6-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c1_bus: hsi2c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-1", "gpc2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c2_bus: hsi2c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-3", "gpc2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c3_bus: hsi2c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-5", "gpc2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c4_bus: hsi2c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpc2-7", "gpc2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c13_bus: hsi2c13-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-1", "gpe5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c14_bus: hsi2c14-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-3", "gpe5-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c15_bus: hsi2c15-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-1", "gpe1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c16_bus: hsi2c16-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-3", "gpe1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c17_bus: hsi2c17-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-5", "gpe1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c18_bus: hsi2c18-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-7", "gpe1-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c19_bus: hsi2c19-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-1", "gpe2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c20_bus: hsi2c20-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-3", "gpe2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c21_bus: hsi2c21-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-5", "gpe2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c22_bus: hsi2c22-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-7", "gpe2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c23_bus: hsi2c23-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-1", "gpe3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c24_bus: hsi2c24-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-3", "gpe3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c25_bus: hsi2c25-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-5", "gpe3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c26_bus: hsi2c26-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-7", "gpe3-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c27_bus: hsi2c27-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-1", "gpe4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c28_bus: hsi2c28-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-3", "gpe4-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c29_bus: hsi2c29-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-5", "gpe4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c30_bus: hsi2c30-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-7", "gpe4-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c31_bus: hsi2c31-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-5", "gpe5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c32_bus: hsi2c32-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-7", "gpe5-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_bus: spi0-bus-pins {</div><div class='add'>+		samsung,pins = "gpc3-3", "gpc3-2", "gpc3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs: spi0-cs-pins {</div><div class='add'>+		samsung,pins = "gpc3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_bus: spi1-bus-pins {</div><div class='add'>+		samsung,pins = "gpc3-7", "gpc3-6", "gpc3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs: spi1-cs-pins {</div><div class='add'>+		samsung,pins = "gpc3-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_bus: spi6-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-3", "gpe5-1", "gpe5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_cs: spi6-cs-pins {</div><div class='add'>+		samsung,pins = "gpe5-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_bus: spi7-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-3", "gpe1-1", "gpe1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_cs: spi7-cs-pins {</div><div class='add'>+		samsung,pins = "gpe1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_bus: spi8-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-7", "gpe1-5", "gpe1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_cs: spi8-cs-pins {</div><div class='add'>+		samsung,pins = "gpe1-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_bus: spi9-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-3", "gpe2-1", "gpe2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_cs: spi9-cs-pins {</div><div class='add'>+		samsung,pins = "gpe2-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_bus: spi10-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-7", "gpe2-5", "gpe2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_cs: spi10-cs-pins {</div><div class='add'>+		samsung,pins = "gpe2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_bus: spi11-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-3", "gpe3-1", "gpe3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_cs: spi11-cs-pins {</div><div class='add'>+		samsung,pins = "gpe3-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_bus: spi12-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-7", "gpe3-5", "gpe3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_cs: spi12-cs-pins {</div><div class='add'>+		samsung,pins = "gpe3-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_bus: spi13-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-3", "gpe4-1", "gpe4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_cs: spi13-cs-pins {</div><div class='add'>+		samsung,pins = "gpe4-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_bus: spi14-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-7", "gpe4-5", "gpe4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_cs: spi14-cs-pins {</div><div class='add'>+		samsung,pins = "gpe4-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_bus: spi15-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-7", "gpe5-5", "gpe5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_cs: spi15-cs-pins {</div><div class='add'>+		samsung,pins = "gpe5-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS7_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus: uart6-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-3", "gpe5-2", "gpe5-1", "gpe5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus_dual: uart6-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe5-1", "gpe5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus: uart7-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-3", "gpe1-2", "gpe1-1", "gpe1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus_dual: uart7-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe1-1", "gpe1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus: uart8-bus-pins {</div><div class='add'>+		samsung,pins = "gpe1-7", "gpe1-6", "gpe1-5", "gpe1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus_dual: uart8-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe1-5", "gpe1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus: uart9-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-3", "gpe2-2", "gpe2-1", "gpe2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus_dual: uart9-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe2-1", "gpe2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus: uart10-bus-pins {</div><div class='add'>+		samsung,pins = "gpe2-7", "gpe2-6", "gpe2-5", "gpe2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus_dual: uart10-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe2-5", "gpe2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus: uart11-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-3", "gpe3-2", "gpe3-1", "gpe3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus_dual: uart11-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe3-1", "gpe3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus: uart12-bus-pins {</div><div class='add'>+		samsung,pins = "gpe3-7", "gpe3-6", "gpe3-5", "gpe3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus_dual: uart12-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe3-5", "gpe3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus: uart13-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-3", "gpe4-2", "gpe4-1", "gpe4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus_dual: uart13-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe4-1", "gpe4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus: uart14-bus-pins {</div><div class='add'>+		samsung,pins = "gpe4-7", "gpe4-6", "gpe4-5", "gpe4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus_dual: uart14-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe4-5", "gpe4-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus: uart15-bus-pins {</div><div class='add'>+		samsung,pins = "gpe5-7", "gpe5-6", "gpe5-5", "gpe5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus_dual: uart15-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpe5-5", "gpe5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_vts {</div><div class='add'>+	gph2: gph2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi<br/>new file mode 100644<br/>index 000000000000..f92d2a8a20a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos8895.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos8895.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1374 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung's Exynos 8895 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Ivaylo Ivanov &lt;ivo.ivanov.ivanov1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,exynos8895.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "samsung,exynos8895";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_alive;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_abox;</div><div class='add'>+		pinctrl2 = &amp;pinctrl_vts;</div><div class='add'>+		pinctrl3 = &amp;pinctrl_fsys0;</div><div class='add'>+		pinctrl4 = &amp;pinctrl_fsys1;</div><div class='add'>+		pinctrl5 = &amp;pinctrl_busc;</div><div class='add'>+		pinctrl6 = &amp;pinctrl_peric0;</div><div class='add'>+		pinctrl7 = &amp;pinctrl_peric1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m2";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m2";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m2";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m2";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@102 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@103 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	oscclk: osc-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "oscclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a53 {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='add'>+				     &lt;&amp;cpu1&gt;,</div><div class='add'>+				     &lt;&amp;cpu2&gt;,</div><div class='add'>+				     &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-mongoose-m2 {</div><div class='add'>+		compatible = "samsung,mongoose-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu4&gt;,</div><div class='add'>+				     &lt;&amp;cpu5&gt;,</div><div class='add'>+				     &lt;&amp;cpu6&gt;,</div><div class='add'>+				     &lt;&amp;cpu7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci";</div><div class='add'>+		method = "smc";</div><div class='add'>+		cpu_off = &lt;0x84000002&gt;;</div><div class='add'>+		cpu_on = &lt;0xc4000003&gt;;</div><div class='add'>+		cpu_suspend = &lt;0xc4000001&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		chipid@10000000 {</div><div class='add'>+			compatible = "samsung,exynos8895-chipid",</div><div class='add'>+				     "samsung,exynos850-chipid";</div><div class='add'>+			reg = &lt;0x10000000 0x24&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peris: clock-controller@10010000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-peris";</div><div class='add'>+			reg = &lt;0x10010000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIS_BUS&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@10040000 {</div><div class='add'>+			compatible = "samsung,exynos8895-mct",</div><div class='add'>+				     "samsung,exynos4210-mct";</div><div class='add'>+			reg = &lt;0x10040000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;, &lt;&amp;cmu_peris CLK_GOUT_PERIS_MCT_PCLK&gt;;</div><div class='add'>+			clock-names = "fin_pll", "mct";</div><div class='add'>+			interrupts = &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10201000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x10201000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10202000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10204000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10206000 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric0: clock-controller@10400000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-peric0";</div><div class='add'>+			reg = &lt;0x10400000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_UART_DBG&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_USI00&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_USI01&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_USI02&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_USI03&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "uart", "usi0",</div><div class='add'>+				      "usi1", "usi2", "usi3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_peric0: syscon@10420000 {</div><div class='add'>+			compatible = "samsung,exynos8895-peric0-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x10420000 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial_0: serial@10430000 {</div><div class='add'>+			compatible = "samsung,exynos8895-uart";</div><div class='add'>+			reg = &lt;0x10430000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart0_bus&gt;;</div><div class='add'>+			samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi0: usi@10440000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10440000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_5: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_2: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart2_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_2: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi2_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_6: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI00_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi1: usi@10460000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10460000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1004&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_7: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_3: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart3_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_3: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi3_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_8: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI01_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi2: usi@10480000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10480000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1008&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_9: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_4: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart4_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_4: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi4_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_10: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI02_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi3: usi@104a0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x104a0000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x100c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_11: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_5: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_5: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi5_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_12: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_USI03_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric0: pinctrl@104d0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x104d0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric1: clock-controller@10800000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-peric1";</div><div class='add'>+			reg = &lt;0x10800000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_SPEEDY2&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM0&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM1&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_UART_BT&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI04&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI05&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI06&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI07&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI08&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI09&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI10&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI11&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI12&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_USI13&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "speedy", "cam0",</div><div class='add'>+				      "cam1", "uart", "usi4", "usi5",</div><div class='add'>+				      "usi6", "usi7", "usi8", "usi9",</div><div class='add'>+				      "usi10", "usi11", "usi12", "usi13";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_peric1: syscon@10820000 {</div><div class='add'>+			compatible = "samsung,exynos8895-peric1-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x10820000 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial_1: serial@10830000 {</div><div class='add'>+			compatible = "samsung,exynos8895-uart";</div><div class='add'>+			reg = &lt;0x10830000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_UART_BT_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_UART_BT_EXT_UCLK&gt;;</div><div class='add'>+			clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart1_bus&gt;;</div><div class='add'>+			samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi4: usi@10840000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10840000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1008&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_13: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_6: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_6: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi6_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_14: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI04_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi5: usi@10860000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10860000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x100c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_15: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c15_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_7: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart7_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_7: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi7_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_16: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI05_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c16_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi6: usi@10880000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10880000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1010&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_17: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c17_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_8: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_8: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi8_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_18: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI06_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c18_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi7: usi@108a0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x108a0000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1014&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_19: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c19_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_9: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_9: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi9_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_20: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI07_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c20_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi8: usi@108c0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x108c0000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1018&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_21: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c21_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_10: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_10: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi10_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_22: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI08_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c22_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi9: usi@108e0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x108e0000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x101c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_23: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c23_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_11: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_11: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi11_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_24: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI09_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c24_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi10: usi@10900000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10900000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1020&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_25: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c25_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_12: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_12: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi12_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_26: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI10_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c26_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi11: usi@10920000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10920000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1024&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_27: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c27_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_13: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_13: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi13_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_28: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI11_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c28_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi12: usi@10940000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10940000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1028&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_29: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c29_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_14: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_14: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi14_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_30: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI12_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c30_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi13: usi@10960000 {</div><div class='add'>+			compatible = "samsung,exynos8895-usi";</div><div class='add'>+			ranges = &lt;0x0 0x10960000 0x11000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x102c&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			hsi2c_31: i2c@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c31_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial_15: serial@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-uart";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart15_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_15: spi@0 {</div><div class='add'>+				compatible = "samsung,exynos8895-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_SCLK_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				interrupts = &lt;GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi15_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsi2c_32: i2c@10000 {</div><div class='add'>+				compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+				reg = &lt;0x10000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_USI13_I_PCLK&gt;;</div><div class='add'>+				clock-names = "hsi2c";</div><div class='add'>+				interrupts = &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;hsi2c32_bus&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric1: pinctrl@10980000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x10980000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c_1: i2c@10990000 {</div><div class='add'>+			compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+			reg = &lt;0x10990000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM0_IPCLK&gt;;</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			interrupts = &lt;GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c1_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c_2: i2c@109a0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+			reg = &lt;0x109a0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM1_IPCLK&gt;;</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			interrupts = &lt;GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c2_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c_3: i2c@109b0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+			reg = &lt;0x109b0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM2_IPCLK&gt;;</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			interrupts = &lt;GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c3_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsi2c_4: i2c@109c0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-hsi2c";</div><div class='add'>+			reg = &lt;0x109c0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_HSI2C_CAM3_IPCLK&gt;;</div><div class='add'>+			clock-names = "hsi2c";</div><div class='add'>+			interrupts = &lt;GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;hsi2c4_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi_0: spi@109d0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-spi",</div><div class='add'>+				     "samsung,exynos850-spi";</div><div class='add'>+			reg = &lt;0x109d0000 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK&gt;;</div><div class='add'>+			clock-names = "spi", "spi_busclk0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi0_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi_1: spi@109e0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-spi",</div><div class='add'>+				     "samsung,exynos850-spi";</div><div class='add'>+			reg = &lt;0x109e0000 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK&gt;;</div><div class='add'>+			clock-names = "spi", "spi_busclk0";</div><div class='add'>+			interrupts = &lt;GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1_bus&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_fsys0: clock-controller@11000000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-fsys0";</div><div class='add'>+			reg = &lt;0x11000000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS0_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS0_DPGTC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS0_MMC_EMBD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS0_UFS_EMBD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS0_USBDRD30&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "dpgtc", "mmc",</div><div class='add'>+				      "ufs", "usbdrd30";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_fsys0: syscon@11020000 {</div><div class='add'>+			compatible = "samsung,exynos8895-fsys0-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x11020000 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys0: pinctrl@11050000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x11050000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_fsys1: clock-controller@11400000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-fsys1";</div><div class='add'>+			reg = &lt;0x11400000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS1_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS1_PCIE&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_fsys1: syscon@11420000 {</div><div class='add'>+			compatible = "samsung,exynos8895-fsys1-sysreg", "syscon";</div><div class='add'>+			reg = &lt;0x11420000 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys1: pinctrl@11430000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x11430000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc: mmc@11500000 {</div><div class='add'>+			compatible = "samsung,exynos8895-dw-mshc-smu",</div><div class='add'>+				     "samsung,exynos7-dw-mshc-smu";</div><div class='add'>+			reg = &lt;0x11500000 0x2000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cmu_top CLK_MOUT_CMU_FSYS1_MMC_CARD&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;cmu_top CLK_FOUT_SHARED4_PLL&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_I_ACLK&gt;,</div><div class='add'>+				 &lt;&amp;cmu_fsys1 CLK_GOUT_FSYS1_MMC_CARD_SDCLKIN&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			fifo-depth = &lt;64&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_abox: pinctrl@13e60000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x13e60000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_vts: pinctrl@14080000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x14080000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_busc: pinctrl@15a30000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x15a30000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_top: clock-controller@15a80000 {</div><div class='add'>+			compatible = "samsung,exynos8895-cmu-top";</div><div class='add'>+			reg = &lt;0x15a80000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;;</div><div class='add'>+			clock-names = "oscclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_system_controller: system-controller@16480000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pmu",</div><div class='add'>+				     "samsung,exynos7-pmu", "syscon";</div><div class='add'>+			reg = &lt;0x16480000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_alive: pinctrl@164b0000 {</div><div class='add'>+			compatible = "samsung,exynos8895-pinctrl";</div><div class='add'>+			reg = &lt;0x164b0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos8895-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		/* Hypervisor Virtual Timer interrupt is not wired to GIC */</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Non-updatable, broken stock Samsung bootloader does not</div><div class='add'>+		 * configure CNTFRQ_EL0</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "exynos8895-pinctrl.dtsi"</div><div class='add'>+#include "arm/samsung/exynos-syscon-restart.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..88091bf09e4e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,503 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung's Exynos 9810 SoC pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024 Maksym Holovach &lt;nergzd@nergzd723.xyz&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "exynos-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	etc1: etc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa3: gpa3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa4: gpa4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq0: gpq0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_aud {</div><div class='add'>+	gpb0: gpb0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb1: gpb1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb2: gpb2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_chub {</div><div class='add'>+	gph0: gph0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gph1: gph1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_cmgp {</div><div class='add'>+	gpm0: gpm0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm1: gpm1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm2: gpm2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm3: gpm3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm4: gpm4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm5: gpm5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm6: gpm6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm7: gpm7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm10: gpm10-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm11: gpm11-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm12: gpm12-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm13: gpm13-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm14: gpm14-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm15: gpm15-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm16: gpm16-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm17: gpm17-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm40: gpm40-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm41: gpm41-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm42: gpm42-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm43: gpm43-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys0 {</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_fsys1 {</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf2: gpf2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric0 {</div><div class='add'>+	gpg0: gpg0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg1: gpg1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg2: gpg2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp0: gpp0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp1: gpp1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp2: gpp2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp3: gpp3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric1 {</div><div class='add'>+	gpc0: gpc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc1: gpc1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpd0: gpd0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg3: gpg3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp4: gpp4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp5: gpp5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp6: gpp6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_vts {</div><div class='add'>+	gpt0: gpt0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts b/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts<br/>new file mode 100644<br/>index 000000000000..fc0ddfee4cd6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos9810-starlte.dts</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S9 (starlte/SM-G960F) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024 Maksym Holovach &lt;nergzd@nergzd723.xyz&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos9810.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S9 (SM-G960F)";</div><div class='add'>+	compatible = "samsung,starlte", "samsung,exynos9810";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@cc000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0xcc000000 (1440 * 2960 * 4)&gt;;</div><div class='add'>+			width = &lt;1440&gt;;</div><div class='add'>+			height = &lt;2960&gt;;</div><div class='add'>+			stride = &lt;(1440 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup &amp;key_wink&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		voldown-key {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* In stock firmware used for assistant. Map it as a camera button for now */</div><div class='add'>+		wink-key {</div><div class='add'>+			label = "Camera";</div><div class='add'>+			linux,code = &lt;KEY_CAMERA&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x3c800000&gt;,</div><div class='add'>+		      &lt;0x0 0xc0000000 0x20000000&gt;,</div><div class='add'>+		      &lt;0x0 0xe1900000 0x1e700000&gt;,</div><div class='add'>+		      &lt;0x8 0x80000000 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@cc000000 {</div><div class='add'>+			reg = &lt;0x0 0xcc000000 (1440 * 2960 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_wink: key-wink-pins {</div><div class='add'>+		samsung,pins = "gpa0-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos9810.dtsi b/arch/arm64/boot/dts/exynos/exynos9810.dtsi<br/>new file mode 100644<br/>index 000000000000..01eba31f7ca3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos9810.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos9810.dtsi</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Exynos 9810 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024 Maksym Holovach &lt;nergzd@nergzd723.xyz&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "samsung,exynos9810";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_alive;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_aud;</div><div class='add'>+		pinctrl2 = &amp;pinctrl_chub;</div><div class='add'>+		pinctrl3 = &amp;pinctrl_cmgp;</div><div class='add'>+		pinctrl4 = &amp;pinctrl_fsys0;</div><div class='add'>+		pinctrl5 = &amp;pinctrl_fsys1;</div><div class='add'>+		pinctrl6 = &amp;pinctrl_peric0;</div><div class='add'>+		pinctrl7 = &amp;pinctrl_peric1;</div><div class='add'>+		pinctrl8 = &amp;pinctrl_vts;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m3";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m3";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@102 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m3";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@103 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m3";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	oscclk: osc-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "oscclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a55 {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='add'>+				     &lt;&amp;cpu1&gt;,</div><div class='add'>+				     &lt;&amp;cpu2&gt;,</div><div class='add'>+				     &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-mongoose-m3 {</div><div class='add'>+		compatible = "samsung,mongoose-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu4&gt;,</div><div class='add'>+				     &lt;&amp;cpu5&gt;,</div><div class='add'>+				     &lt;&amp;cpu6&gt;,</div><div class='add'>+				     &lt;&amp;cpu7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci";</div><div class='add'>+		method = "smc";</div><div class='add'>+		cpu_off = &lt;0x84000002&gt;;</div><div class='add'>+		cpu_on = &lt;0xc4000003&gt;;</div><div class='add'>+		cpu_suspend = &lt;0xc4000001&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		chipid@10000000 {</div><div class='add'>+			compatible = "samsung,exynos9810-chipid",</div><div class='add'>+				     "samsung,exynos850-chipid";</div><div class='add'>+			reg = &lt;0x10000000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10101000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x10101000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10102000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10104000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10106000 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric0: pinctrl@10430000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x10430000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric1: pinctrl@10830000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x10830000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys0: pinctrl@11050000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x11050000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_fsys1: pinctrl@11430000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x11430000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_vts: pinctrl@13880000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x13880000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_chub: pinctrl@13a80000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x13a80000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_alive: pinctrl@14050000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x14050000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos9810-wakeup-eint",</div><div class='add'>+					     "samsung,exynos850-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_system_controller: system-controller@14060000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pmu",</div><div class='add'>+				     "samsung,exynos7-pmu", "syscon";</div><div class='add'>+			reg = &lt;0x14060000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_cmgp: pinctrl@14220000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x14220000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos9810-wakeup-eint",</div><div class='add'>+					     "samsung,exynos850-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_aud: pinctrl@17c60000 {</div><div class='add'>+			compatible = "samsung,exynos9810-pinctrl";</div><div class='add'>+			reg = &lt;0x17c60000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		/* Hypervisor Virtual Timer interrupt is not wired to GIC */</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Non-updatable, broken stock Samsung bootloader does not</div><div class='add'>+		 * configure CNTFRQ_EL0</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "exynos9810-pinctrl.dtsi"</div><div class='add'>+#include "arm/samsung/exynos-syscon-restart.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts<br/>new file mode 100644<br/>index 000000000000..9f0ad4f9673a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-c1s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-c1s.dts</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy Note20 5G (c1s/SM-N981B) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Igor Belwon &lt;igor.belwon@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos990.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy Note20";</div><div class='add'>+	compatible = "samsung,c1s", "samsung,exynos990";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@f1000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0xf1000000 0 (1080 * 2400 * 4)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2400&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x3ab00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xc1200000 0x0 0x1ee00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xe1900000 0x0 0x1e700000&gt;,</div><div class='add'>+		      /* Memory hole - last block */</div><div class='add'>+		      &lt;0x8 0x80000000 0x1 0x7ec00000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented */</div><div class='add'>+	reg_dummy: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dummy_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: framebuffer@f1000000 {</div><div class='add'>+			reg = &lt;0 0xf1000000 0 0x13c6800&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		abox_reserved: audio@f7fb0000 {</div><div class='add'>+			reg = &lt;0 0xf7fb0000 0 0x2a50000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		voldown-key {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..a03d36458d76<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,2195 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Exynos 990 pin-mux and pin-config device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Igor Belwon &lt;igor.belwon@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include "exynos-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	gpa0: gpa0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa1: gpa1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa2: gpa2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa3: gpa3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpa4: gpa4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpq0: gpq0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speedy_bus: speedy-bus-pins {</div><div class='add'>+		samsung,pins = "gpq0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speedy1_bus: speedy1-bus-pins {</div><div class='add'>+		samsung,pins = "gpq0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* UART1 is also referred to as UART_BT in downstream. */</div><div class='add'>+	uart1_bus_single: uart1-bus-pins {</div><div class='add'>+		samsung,pins = "gpq0-3", "gpq0-2", "gpq0-1", "gpq0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_rxd_pull: uart1-bus-rxd-pins {</div><div class='add'>+		samsung,pins = "gpq0-0";</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus_rts: uart1-bus-rts-pins {</div><div class='add'>+		samsung,pins = "gpq0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus_tx_input: uart1-bus-tx-input-pins {</div><div class='add'>+		samsung,pins = "gpq0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus_tx_dat: uart1-bus-tx-dat-pins {</div><div class='add'>+		samsung,pins = "gpq0-1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_bus_tx_con: uart1-bus-tx-con-pins {</div><div class='add'>+		samsung,pins = "gpq0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_host_wake: wlan-host-wake-pins {</div><div class='add'>+		samsung,pins = "gpa0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_cmgp {</div><div class='add'>+	gpm0: gpm0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm1: gpm1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm2: gpm2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm3: gpm3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm4: gpm4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm5: gpm5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm6: gpm6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm7: gpm7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm8: gpm8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm9: gpm9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm10: gpm10-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm11: gpm11-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm12: gpm12-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm13: gpm13-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm14: gpm14-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm15: gpm15-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm16: gpm16-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm17: gpm17-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm18: gpm18-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm19: gpm19-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm20: gpm20-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm21: gpm21-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm22: gpm22-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm23: gpm23-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm24: gpm24-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm25: gpm25-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm26: gpm26-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm27: gpm27-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm28: gpm28-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm29: gpm29-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm30: gpm30-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm31: gpm31-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm32: gpm32-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpm33: gpm33-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c38_bus: hsi2c38-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c39_bus: hsi2c39-bus-pins {</div><div class='add'>+		samsung,pins = "gpm2-0", "gpm3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c40_bus: hsi2c40-bus-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c41_bus: hsi2c41-bus-pins {</div><div class='add'>+		samsung,pins = "gpm6-0", "gpm7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c42_bus: hsi2c42-bus-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c43_bus: hsi2c43-bus-pins {</div><div class='add'>+		samsung,pins = "gpm10-0", "gpm11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c44_bus: hsi2c44-bus-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm13-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c45_bus: hsi2c45-bus-pins {</div><div class='add'>+		samsung,pins = "gpm14-0", "gpm15-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi19_bus: spi19-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi19_cs: spi19-cs-pins {</div><div class='add'>+		samsung,pins = "gpm3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi19_cs_func: spi19-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi20_bus: spi20-bus-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi20_cs: spi20-cs-pins {</div><div class='add'>+		samsung,pins = "gpm7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi20_cs_func: spi20-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi21_bus: spi21-bus-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm9-0", "gpm10-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi21_cs: spi21-cs-pins {</div><div class='add'>+		samsung,pins = "gpm11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi21_cs_func: spi21-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi22_bus: spi22-bus-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm13-0", "gpm14-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi22_cs: spi22-cs-pins {</div><div class='add'>+		samsung,pins = "gpm15-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi22_cs_func: spi22-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpm15-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart21_bus_single: uart21-bus-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart21_bus_dual: uart21-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm0-0", "gpm1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart22_bus_single: uart22-bus-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart22_bus_dual: uart22-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm4-0", "gpm5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart23_bus_single: uart23-bus-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm9-0", "gpm10-0", "gpm11-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart23_bus_dual: uart23-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm8-0", "gpm9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart24_bus_single: uart24-bus-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm13-0", "gpm14-0", "gpm15-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart24_bus_dual: uart24-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpm12-0", "gpm13-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_hsi1 {</div><div class='add'>+	gpf0: gpf0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf1: gpf1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpf2: gpf2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_clkreq: pcie0-clkreq-pins {</div><div class='add'>+		samsung,pins = "gpf0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_perst: pcie0-perst-pins {</div><div class='add'>+		samsung,pins = "gpf0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_clkreq: pcie1-clkreq-pins {</div><div class='add'>+		samsung,pins = "gpf0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_perst: pcie1-perst-pins {</div><div class='add'>+		samsung,pins = "gpf0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_rst_n: ufs-rst-n-pins {</div><div class='add'>+		samsung,pins = "gpf2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_refclk_out: ufs-refclk-out-pins {</div><div class='add'>+		samsung,pins = "gpf2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk: sd2-clk-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_cmd: sd2-cmd-pins {</div><div class='add'>+		samsung,pins = "gpf1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus1: sd2-bus-width1-pins {</div><div class='add'>+		samsung,pins = "gpf1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_bus4: sd2-bus-width4-pins {</div><div class='add'>+		samsung,pins = "gpf1-3", "gpf1-4", "gpf1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV1_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV2_5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_3x: sd2-clk-fas-slew-rate-3x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS850_HSI_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd2_pins_as_pdn: sd2-pins-as-pdn-pins {</div><div class='add'>+		samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_hsi2 {</div><div class='add'>+	gpf3: gpf3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2_clkreq: pcie2-clkreq-pins {</div><div class='add'>+		samsung,pins = "gpf3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2_perst: pcie2-perst-pins {</div><div class='add'>+		samsung,pins = "gpf3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric0 {</div><div class='add'>+	gpg0: gpg0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp0: gpp0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp1: gpp1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp2: gpp2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp3: gpp3-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp4: gpp4-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c0_bus: hsi2c0-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c1_bus: hsi2c1-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-2", "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c2_bus: hsi2c2-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-4", "gpp0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c3_bus: hsi2c3-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-6", "gpp0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c4_bus: hsi2c4-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c5_bus: hsi2c5-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-2", "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c6_bus: hsi2c6-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-4", "gpp1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c7_bus: hsi2c7-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-6", "gpp1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c8_bus: hsi2c8-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c9_bus: hsi2c9-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-2", "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c10_bus: hsi2c10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-4", "gpp2-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c11_bus: hsi2c11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-6", "gpp2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c26_bus: hsi2c26-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c27_bus: hsi2c27-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-2", "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c28_bus: hsi2c28-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-4", "gpp3-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c29_bus: hsi2c29-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-6", "gpp3-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c30_bus: hsi2c30-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c31_bus: hsi2c31-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-2", "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_bus: spi0-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs: spi0-cs-pins {</div><div class='add'>+		samsung,pins = "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_cs_func: spi0-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_bus: spi1-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs: spi1-cs-pins {</div><div class='add'>+		samsung,pins = "gpp0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_cs_func: spi1-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_bus: spi2-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs: spi2-cs-pins {</div><div class='add'>+		samsung,pins = "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_cs_func: spi2-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_bus: spi3-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs: spi3-cs-pins {</div><div class='add'>+		samsung,pins = "gpp1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3_cs_func: spi3-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_bus: spi4-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs: spi4-cs-pins {</div><div class='add'>+		samsung,pins = "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_cs_func: spi4-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_fp_inactive: spi4-fp-inactive-pins {</div><div class='add'>+		samsung,pins = "gpp2-3", "gpp2-2", "gpp2-1", "gpp2-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4_fp_cs_func_high: spi4-fp-cs-func-high-pins {</div><div class='add'>+		samsung,pins = "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_bus: spi5-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_cs: spi5-cs-pins {</div><div class='add'>+		samsung,pins = "gpp2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi5_cs_func: spi5-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_bus: spi13-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_cs: spi13-cs-pins {</div><div class='add'>+		samsung,pins = "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi13_cs_func: spi13-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_bus: spi14-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_cs: spi14-cs-pins {</div><div class='add'>+		samsung,pins = "gpp3-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi14_cs_func: spi14-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp3-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_bus: spi15-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_cs: spi15-cs-pins {</div><div class='add'>+		samsung,pins = "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi15_cs_func: spi15-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_bus: uart0-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-6", "gpp4-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus_single: uart2-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_bus_dual: uart2-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp0-0", "gpp0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus_single: uart3-bus-pins {</div><div class='add'>+		samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_bus_dual: uart3-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp0-4", "gpp0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus_single: uart4-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4_bus_dual: uart4-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp1-0", "gpp1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus_single: uart5-bus-pins {</div><div class='add'>+		samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5_bus_dual: uart5-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp1-4", "gpp1-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus_single: uart6-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6_bus_dual: uart6-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp2-0", "gpp2-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus_single: uart7-bus-pins {</div><div class='add'>+		samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7_bus_dual: uart7-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp2-4", "gpp2-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus_single: uart15-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart15_bus_dual: uart15-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp3-0", "gpp3-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart16_bus_single: uart16-bus-pins {</div><div class='add'>+		samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart16_bus_dual: uart16-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp3-4", "gpp3-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart17_bus_single: uart17-bus-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart17_bus_dual: uart17-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp4-0", "gpp4-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_peric1 {</div><div class='add'>+	gpb0: gpb0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb1: gpb1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpb2: gpb2-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpc0: gpc0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpg1: gpg1-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp5: gpp5-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp6: gpp6-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp7: gpp7-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp8: gpp8-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpp9: gpp9-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s0_bus: aud-i2s0-bus-pins {</div><div class='add'>+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s0_idle: aud-i2s0-idle-pins {</div><div class='add'>+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s1_bus: aud-i2s1-bus-pins {</div><div class='add'>+		samsung,pins = "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s1_idle: aud-i2s1-idle-pins {</div><div class='add'>+		samsung,pins = "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s2_bus: aud-i2s2-bus-pins {</div><div class='add'>+		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s2_idle: aud-i2s2-idle-pins {</div><div class='add'>+		samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s3_bus: aud-i2s3-bus-pins {</div><div class='add'>+		samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s3_idle: aud-i2s3-idle-pins {</div><div class='add'>+		samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s4_bus: aud-i2s4-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s4_pci: aud-i2s4-pci-pins {</div><div class='add'>+		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s4_idle: aud-i2s4-idle-pins {</div><div class='add'>+		samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s5_bus: aud-i2s5-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_i2s5_idle: aud-i2s5-idle-pins {</div><div class='add'>+		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_dsd_bus: aud-dsd-bus-pins {</div><div class='add'>+		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_dsd_idle: aud-dsd-idle-pins {</div><div class='add'>+		samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cfg_wlanen: cfg-wlanen-pins {</div><div class='add'>+		samsung,pins = "gpb0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cnss_wlan_en_active: cnss-wlan-en-active-pins {</div><div class='add'>+		samsung,pins = "gpb0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV4&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cnss_wlan_en_sleep: cnss-wlan-en-sleep-pins {</div><div class='add'>+		samsung,pins = "gpb0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV2&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_f_te_on: decon-f-te-on-pins {</div><div class='add'>+		samsung,pins = "gpc0-4";</div><div class='add'>+		samsung,pin-function = &lt;0xf&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_f_te_off: decon-f-te-off-pins {</div><div class='add'>+		samsung,pins = "gpc0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_s_te_on: decon-s-te-on-pins {</div><div class='add'>+		samsung,pins = "gpc0-5";</div><div class='add'>+		samsung,pin-function = &lt;0xf&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	decon_s_te_off: decon-s-te-off-pins {</div><div class='add'>+		samsung,pins = "gpc0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c12_bus: hsi2c12-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-0", "gpp5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c13_bus: hsi2c13-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-2", "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c14_bus: hsi2c14-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-4", "gpp5-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c15_bus: hsi2c15-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-6", "gpp5-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c16_bus: hsi2c16-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-0", "gpp6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c17_bus: hsi2c17-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-2", "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c18_bus: hsi2c18-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-4", "gpp6-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c19_bus: hsi2c19-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-6", "gpp6-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c20_bus: hsi2c20-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-0", "gpp7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c21_bus: hsi2c21-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-2", "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c22_bus: hsi2c22-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-4", "gpp7-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c23_bus: hsi2c23-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-6", "gpp7-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c24_bus: hsi2c24-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-0", "gpp8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c25_bus: hsi2c25-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-2", "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c32_bus: hsi2c32-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-4", "gpp8-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c33_bus: hsi2c33-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-6", "gpp8-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c34_bus: hsi2c34-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-0", "gpp9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c35_bus: hsi2c35-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-2", "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c36_bus: hsi2c36-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-4", "gpp9-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsi2c37_bus: hsi2c37-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-6", "gpp9-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk0_out: sensor-mclk0-out-pins {</div><div class='add'>+		samsung,pins = "gpc0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk1_out: sensor-mclk1-out-pins {</div><div class='add'>+		samsung,pins = "gpg1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk2_out: sensor-mclk2-out-pins {</div><div class='add'>+		samsung,pins = "gpc0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk3_out: sensor-mclk3-out-pins {</div><div class='add'>+		samsung,pins = "gpc0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk4_out: sensor-mclk4-out-pins {</div><div class='add'>+		samsung,pins = "gpc0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk5_out: sensor-mclk5-out-pins {</div><div class='add'>+		samsung,pins = "gpg1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk0_fn: sensor-mclk0-fn-pins {</div><div class='add'>+		samsung,pins = "gpc0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk1_fn: sensor-mclk1-fn-pins {</div><div class='add'>+		samsung,pins = "gpg1-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk2_fn: sensor-mclk2-fn-pins {</div><div class='add'>+		samsung,pins = "gpc0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk3_fn: sensor-mclk3-fn-pins {</div><div class='add'>+		samsung,pins = "gpc0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk4_fn: sensor-mclk4-fn-pins {</div><div class='add'>+		samsung,pins = "gpc0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sensor_mclk5_fn: sensor-mclk5-fn-pins {</div><div class='add'>+		samsung,pins = "gpg1-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_bus: spi6-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_cs: spi6-cs-pins {</div><div class='add'>+		samsung,pins = "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi6_cs_func: spi6-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp5-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_bus: spi7-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-6", "gpp5-5", "gpp5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_cs: spi7-cs-pins {</div><div class='add'>+		samsung,pins = "gpp5-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi7_cs_func: spi7-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp5-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_bus: spi8-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-2", "gpp6-1", "gpp6-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_cs: spi8-cs-pins {</div><div class='add'>+		samsung,pins = "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi8_cs_func: spi8-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp6-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_bus: spi9-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-6", "gpp6-5", "gpp6-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_cs: spi9-cs-pins {</div><div class='add'>+		samsung,pins = "gpp6-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi9_cs_func: spi9-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp6-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_bus: spi10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-2", "gpp7-1", "gpp7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_cs: spi10-cs-pins {</div><div class='add'>+		samsung,pins = "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi10_cs_func: spi10-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp7-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_bus: spi11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-6", "gpp7-5", "gpp7-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_cs: spi11-cs-pins {</div><div class='add'>+		samsung,pins = "gpp7-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi11_cs_func: spi11-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp7-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_bus: spi12-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-2", "gpp8-1", "gpp8-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_cs: spi12-cs-pins {</div><div class='add'>+		samsung,pins = "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi12_cs_func: spi12-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp8-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_bus: spi16-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-6", "gpp8-5", "gpp8-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_cs: spi16-cs-pins {</div><div class='add'>+		samsung,pins = "gpp8-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi16_cs_func: spi16-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp8-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_PREV&gt;;</div><div class='add'>+		samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_bus: spi17-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-2", "gpp9-1", "gpp9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_cs: spi17-cs-pins {</div><div class='add'>+		samsung,pins = "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi17_cs_func: spi17-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp9-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_bus: spi18-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-6", "gpp9-5", "gpp9-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_cs: spi18-cs-pins {</div><div class='add'>+		samsung,pins = "gpp9-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi18_cs_func: spi18-cs-func-pins {</div><div class='add'>+		samsung,pins = "gpp9-7";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus_single: uart8-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8_bus_dual: uart8-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp5-0", "gpp5-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus_single: uart9-bus-pins {</div><div class='add'>+		samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9_bus_dual: uart9-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp5-4", "gpp5-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus_single: uart10-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-3", "gpp6-2", "gpp6-1", "gpp6-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10_bus_dual: uart10-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp6-0", "gpp6-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus_single: uart11-bus-pins {</div><div class='add'>+		samsung,pins = "gpp6-7", "gpp6-6", "gpp6-5", "gpp6-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11_bus_dual: uart11-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp6-4", "gpp6-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus_single: uart12-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-3", "gpp7-2", "gpp7-1", "gpp7-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart12_bus_dual: uart12-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp7-0", "gpp7-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus_single: uart13-bus-pins {</div><div class='add'>+		samsung,pins = "gpp7-7", "gpp7-6", "gpp7-5", "gpp7-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart13_bus_dual: uart13-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp7-4", "gpp7-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus_single: uart14-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-3", "gpp8-2", "gpp8-1", "gpp8-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart14_bus_dual: uart14-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp8-0", "gpp8-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart18_bus_single: uart18-bus-pins {</div><div class='add'>+		samsung,pins = "gpp8-7", "gpp8-6", "gpp8-5", "gpp8-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart18_bus_dual: uart18-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp8-4", "gpp8-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart19_bus_single: uart19-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-3", "gpp9-2", "gpp9-1", "gpp9-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart19_bus_dual: uart19-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp9-0", "gpp9-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart20_bus_single: uart20-bus-pins {</div><div class='add'>+		samsung,pins = "gpp9-7", "gpp9-6", "gpp9-5", "gpp9-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart20_bus_dual: uart20-bus-dual-pins {</div><div class='add'>+		samsung,pins = "gpp9-4", "gpp9-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_vts {</div><div class='add'>+	gpv0: gpv0-gpio-bank {</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amic_pdm: amic-pdm-pins {</div><div class='add'>+		samsung,pins = "gpv0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk: dmic-bus-clk-pins {</div><div class='add'>+		samsung,pins = "gpv0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk_idle: dmic-bus-clk-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-0";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk1: dmic-bus-clk1-pins {</div><div class='add'>+		samsung,pins = "gpv0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk1_idle: dmic-bus-clk1-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-1";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk2: dmic-bus-clk2-pins {</div><div class='add'>+		samsung,pins = "gpv0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_bus_clk2_idle: dmic-bus-clk2-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-2";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm: dmic-pdm-pins {</div><div class='add'>+		samsung,pins = "gpv0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm_idle: dmic-pdm-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm1_bus: dmic-pdm1-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm1_idle: dmic-pdm1-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm2_bus: dmic-pdm2-bus-pins {</div><div class='add'>+		samsung,pins = "gpv0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_pdm2_idle: dmic-pdm2-idle-pins {</div><div class='add'>+		samsung,pins = "gpv0-5";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-r8s.dts b/arch/arm64/boot/dts/exynos/exynos990-r8s.dts<br/>new file mode 100644<br/>index 000000000000..55342db61979<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-r8s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-r8s.dts</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S20 FE (r8s/SM-G780F) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Denzeel Oliva &lt;wachiturroxd150@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos990.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S20 FE";</div><div class='add'>+	compatible = "samsung,r8s", "samsung,exynos990";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@f1000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0xf1000000 0 (1080 * 2400 * 4)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2400&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x3ab00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xc1200000 0x0 0x1ee00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xe1900000 0x0 0x1e700000&gt;,</div><div class='add'>+		      /* Memory hole - last block */</div><div class='add'>+		      &lt;0x8 0x80000000 0x0 0xc0000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented */</div><div class='add'>+	reg_dummy: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dummy_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: framebuffer@f1000000 {</div><div class='add'>+			reg = &lt;0 0xf1000000 0 0x13c6800&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		abox_reserved: audio@f7fb0000 {</div><div class='add'>+			reg = &lt;0 0xf7fb0000 0 0x2a50000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		voldown-key {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi<br/>new file mode 100644<br/>index 000000000000..7b97220cccb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S20 Series device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Umer Uddin &lt;umer.uddin@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos990.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@f1000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0xf1000000 0 (1440 * 3200 * 4)&gt;;</div><div class='add'>+			width = &lt;1440&gt;;</div><div class='add'>+			height = &lt;3200&gt;;</div><div class='add'>+			stride = &lt;(1440 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented */</div><div class='add'>+	reg_dummy: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dummy_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: framebuffer@f1000000 {</div><div class='add'>+			reg = &lt;0 0xf1000000 0 0x1194000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		abox_reserved: audio@f7fb0000 {</div><div class='add'>+			reg = &lt;0 0xf7fb0000 0 0x2a50000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_power &amp;key_voldown &amp;key_volup&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			label = "Power";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		voldown-key {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		volup-key {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;oscclk {</div><div class='add'>+	clock-frequency = &lt;26000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_alive {</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa2-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa0-4";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa0-3";</div><div class='add'>+		samsung,pin-function = &lt;EXYNOS_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;EXYNOS5420_PIN_DRV_LV1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_dummy&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1s.dts b/arch/arm64/boot/dts/exynos/exynos990-x1s.dts<br/>new file mode 100644<br/>index 000000000000..1ae881015e0c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-x1s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-x1s.dts</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S20 5G (x1s/SM-G981B) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Umer Uddin &lt;umer.uddin@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos990-x1s-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	model = "Samsung Galaxy S20 5G";</div><div class='add'>+	compatible = "samsung,x1s", "samsung,exynos990";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x3ab00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xc1200000 0x0 0x1ee00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xe1900000 0x0 0x1e700000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x8 0x80000000 0x2 0x7e800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts b/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts<br/>new file mode 100644<br/>index 000000000000..d3720996ba93<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990-x1slte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990-x1slte.dts</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Galaxy S20 (x1slte/SM-G980F) device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Umer Uddin &lt;umer.uddin@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "exynos990-x1s-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	model = "Samsung Galaxy S20";</div><div class='add'>+	compatible = "samsung,x1slte", "samsung,exynos990";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x3ab00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xc1200000 0x0 0x1ee00000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x0 0xe1900000 0x0 0x1e700000&gt;,</div><div class='add'>+		      /* Memory hole */</div><div class='add'>+		      &lt;0x8 0x80000000 0x1 0x7ec00000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi<br/>new file mode 100644<br/>index 000000000000..7179109c49d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynos990.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynos990.dtsi</a></div><div class='hunk'>@@ -0,0 +1,406 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Samsung Exynos 990 SoC device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Igor Belwon &lt;igor.belwon@mentallysanemainliners.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/samsung,exynos990.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "samsung,exynos990";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		pinctrl0 = &amp;pinctrl_alive;</div><div class='add'>+		pinctrl1 = &amp;pinctrl_cmgp;</div><div class='add'>+		pinctrl2 = &amp;pinctrl_hsi1;</div><div class='add'>+		pinctrl3 = &amp;pinctrl_hsi2;</div><div class='add'>+		pinctrl4 = &amp;pinctrl_peric0;</div><div class='add'>+		pinctrl5 = &amp;pinctrl_peric1;</div><div class='add'>+		pinctrl6 = &amp;pinctrl_vts;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster2 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a76";</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a76";</div><div class='add'>+			reg = &lt;0x5&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m5";</div><div class='add'>+			reg = &lt;0x6&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@201 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "samsung,mongoose-m5";</div><div class='add'>+			reg = &lt;0x7&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	oscclk: clock-osc {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "oscclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a55 {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='add'>+				     &lt;&amp;cpu1&gt;,</div><div class='add'>+				     &lt;&amp;cpu2&gt;,</div><div class='add'>+				     &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a76 {</div><div class='add'>+		compatible = "arm,cortex-a76-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu4&gt;,</div><div class='add'>+				     &lt;&amp;cpu5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-mongoose-m5 {</div><div class='add'>+		compatible = "samsung,mongoose-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu6&gt;,</div><div class='add'>+				     &lt;&amp;cpu7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "hvc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		chipid@10000000 {</div><div class='add'>+			compatible = "samsung,exynos990-chipid",</div><div class='add'>+				     "samsung,exynos850-chipid";</div><div class='add'>+			reg = &lt;0x10000000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peris: clock-controller@10020000 {</div><div class='add'>+			compatible = "samsung,exynos990-cmu-peris";</div><div class='add'>+			reg = &lt;0x10020000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIS_BUS&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@10040000 {</div><div class='add'>+			compatible = "samsung,exynos990-mct",</div><div class='add'>+				     "samsung,exynos4210-mct";</div><div class='add'>+			reg = &lt;0x10040000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;, &lt;&amp;cmu_peris CLK_GOUT_PERIS_MCT_PCLK&gt;;</div><div class='add'>+			clock-names = "fin_pll", "mct";</div><div class='add'>+			interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog_cl0: watchdog@10050000 {</div><div class='add'>+			compatible = "samsung,exynos990-wdt";</div><div class='add'>+			reg = &lt;0x10050000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;oscclk&gt;;</div><div class='add'>+			clock-names = "watchdog",</div><div class='add'>+				      "watchdog_src";</div><div class='add'>+			samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			samsung,cluster-index = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog_cl2: watchdog@10060000 {</div><div class='add'>+			compatible = "samsung,exynos990-wdt";</div><div class='add'>+			reg = &lt;0x10060000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;oscclk&gt;;</div><div class='add'>+			clock-names = "watchdog",</div><div class='add'>+				      "watchdog_src";</div><div class='add'>+			samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			samsung,cluster-index = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@10101000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x10101000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10102000 0x1000&gt;,</div><div class='add'>+			      &lt;0x10104000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10106000 0x2000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric0: clock-controller@10400000 {</div><div class='add'>+			compatible = "samsung,exynos990-cmu-peric0";</div><div class='add'>+			reg = &lt;0x10400000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC0_IP&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "ip";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric0: pinctrl@10430000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x10430000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_peric1: clock-controller@10700000 {</div><div class='add'>+			compatible = "samsung,exynos990-cmu-peric1";</div><div class='add'>+			reg = &lt;0x10700000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_PERIC1_IP&gt;;</div><div class='add'>+			clock-names = "oscclk", "bus", "ip";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_peric1: pinctrl@10730000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x10730000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_hsi0: clock-controller@10a00000 {</div><div class='add'>+			compatible = "samsung,exynos990-cmu-hsi0";</div><div class='add'>+			reg = &lt;0x10a00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_BUS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_USB31DRD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top CLK_DOUT_CMU_HSI0_DPGTC&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "usb31drd",</div><div class='add'>+				      "usbdp_debug",</div><div class='add'>+				      "dpgtc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd_phy: phy@10c00000 {</div><div class='add'>+			compatible = "samsung,exynos990-usbdrd-phy";</div><div class='add'>+			reg = &lt;0x10c00000 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL&gt;,</div><div class='add'>+				 &lt;&amp;oscclk&gt;;</div><div class='add'>+			clock-names = "phy", "ref";</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdrd: usb@10e00000 {</div><div class='add'>+			compatible = "samsung,exynos990-dwusb3",</div><div class='add'>+				     "samsung,exynos850-dwusb3";</div><div class='add'>+			ranges = &lt;0x0 0x10e00000 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY&gt;,</div><div class='add'>+				 &lt;&amp;cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_USB31DRD_REF_CLK_40&gt;;</div><div class='add'>+			clock-names = "bus_early", "ref";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usbdrd_dwc3: usb@0 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				phys = &lt;&amp;usbdrd_phy 0&gt;;</div><div class='add'>+				phy-names = "usb2-phy";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_hsi1: pinctrl@13040000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x13040000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_hsi2: pinctrl@13c30000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x13c30000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_vts: pinctrl@15580000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x15580000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_alive: pinctrl@15850000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x15850000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			wakeup-interrupt-controller {</div><div class='add'>+				compatible = "samsung,exynos990-wakeup-eint",</div><div class='add'>+					     "samsung,exynos850-wakeup-eint",</div><div class='add'>+					     "samsung,exynos7-wakeup-eint";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_system_controller: system-controller@15860000 {</div><div class='add'>+			compatible = "samsung,exynos990-pmu",</div><div class='add'>+				     "samsung,exynos7-pmu", "syscon";</div><div class='add'>+			reg = &lt;0x15860000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			reboot: syscon-reboot {</div><div class='add'>+				compatible = "syscon-reboot";</div><div class='add'>+				regmap = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+				offset = &lt;0x3a00&gt;; /* SWRESET */</div><div class='add'>+				mask = &lt;0x2&gt;; /* SWRESET_TRIGGER */</div><div class='add'>+				value = &lt;0x2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_cmgp: pinctrl@15c30000 {</div><div class='add'>+			compatible = "samsung,exynos990-pinctrl";</div><div class='add'>+			reg = &lt;0x15c30000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_top: clock-controller@1a330000 {</div><div class='add'>+			compatible = "samsung,exynos990-cmu-top";</div><div class='add'>+			reg = &lt;0x1a330000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;oscclk&gt;;</div><div class='add'>+			clock-names = "oscclk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Non-updatable, broken stock Samsung bootloader does not</div><div class='add'>+		 * configure CNTFRQ_EL0</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "exynos990-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi<br/>index b36292a7db64..66628cb32776 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynosautov9.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynosautov9.dtsi</a></div><div class='hunk'>@@ -442,7 +442,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103000c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1000&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -505,7 +505,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103100c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1004&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -534,7 +534,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103200c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1008&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -597,7 +597,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103300c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x100c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -626,7 +626,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103400c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1010&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -689,7 +689,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103500c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1014&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -718,7 +718,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103600c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1018&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -781,7 +781,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103700c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x101c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -810,7 +810,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103800c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1020&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -873,7 +873,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103900c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1024&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -902,7 +902,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103a00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1028&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -965,7 +965,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x103b00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x102c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -994,7 +994,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109000c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1000&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1057,7 +1057,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109100c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1004&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1086,7 +1086,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109200c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1008&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1149,7 +1149,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109300c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x100c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1178,7 +1178,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109400c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1010&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1241,7 +1241,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109500c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1014&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1270,7 +1270,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109600c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1018&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1333,7 +1333,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109700c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x101c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1362,7 +1362,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109800c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1020&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1425,7 +1425,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109900c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1024&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1454,7 +1454,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109a00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x1028&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -1515,7 +1515,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x109b00c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric1 0x102c&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi<br/>index 91882b37fdb3..0fdf2062930a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynosautov920.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/exynosautov920.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/exynosautov920.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/exynosautov920.dtsi</a></div><div class='hunk'>@@ -89,6 +89,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@100 {</div><div class='hunk'>@@ -96,6 +103,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@200 {</div><div class='hunk'>@@ -103,6 +117,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@300 {</div><div class='hunk'>@@ -110,6 +131,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu4: cpu@10000 {</div><div class='hunk'>@@ -117,6 +145,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x10000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu5: cpu@10100 {</div><div class='hunk'>@@ -124,6 +159,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x10100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu6: cpu@10200 {</div><div class='hunk'>@@ -131,6 +173,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x10200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu7: cpu@10300 {</div><div class='hunk'>@@ -138,6 +187,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x10300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu8: cpu@20000 {</div><div class='hunk'>@@ -145,6 +201,13 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x20000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu9: cpu@20100 {</div><div class='hunk'>@@ -152,6 +215,70 @@</div><div class='ctx'> 			compatible = "arm,cortex-a78ae";</div><div class='ctx'> 			reg = &lt;0x0 0x20100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_cl2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_cl0: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache_cl0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_cl1: l2-cache1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache_cl1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_cl2: l2-cache2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x40000&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache_cl2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_cache_cl0: l3-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x200000&gt;;/* 2MB L3 cache for cpu cluster-0 */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_cache_cl1: l3-cache1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x200000&gt;;/* 2MB L3 cache for cpu cluster-1 */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_cache_cl2: l3-cache2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;/* 1MB L3 cache for cpu cluster-2 */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;1365&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -172,6 +299,37 @@</div><div class='ctx'> 			reg = &lt;0x10000000 0x24&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_misc: clock-controller@10020000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-misc";</div><div class='add'>+			reg = &lt;0x10020000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_MISC_NOC&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "noc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog_cl0: watchdog@10060000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-wdt";</div><div class='add'>+			reg = &lt;0x10060000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;, &lt;&amp;xtcxo&gt;;</div><div class='add'>+			clock-names = "watchdog", "watchdog_src";</div><div class='add'>+			samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			samsung,cluster-index = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog_cl1: watchdog@10070000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-wdt";</div><div class='add'>+			reg = &lt;0x10070000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;, &lt;&amp;xtcxo&gt;;</div><div class='add'>+			clock-names = "watchdog", "watchdog_src";</div><div class='add'>+			samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			samsung,cluster-index = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@10400000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='hunk'>@@ -182,6 +340,69 @@</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spdma0: dma-controller@10180000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x10180000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 918 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spdma1: dma-controller@10190000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x10190000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 917 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdma0: dma-controller@101a0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x101a0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 916 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdma1: dma-controller@101b0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x101b0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 915 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdma2: dma-controller@101c0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x101c0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 914 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdma3: dma-controller@101d0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x101d0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 913 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdma4: dma-controller@101e0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x101e0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 912 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_misc CLK_MOUT_MISC_NOC_USER&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmu_peric0: clock-controller@10800000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-cmu-peric0";</div><div class='ctx'> 			reg = &lt;0x10800000 0x8000&gt;;</div><div class='hunk'>@@ -212,7 +433,7 @@</div><div class='ctx'> 				     "samsung,exynos850-usi";</div><div class='ctx'> 			reg = &lt;0x108800c0 0x20&gt;;</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;syscon_peric0 0x1000&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -234,6 +455,419 @@</div><div class='ctx'> 				samsung,uart-fifosize = &lt;256&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			spi_0: spi@10880000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10880000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi0_bus &amp;spi0_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI00_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 1&gt;, &lt;&amp;pdma0 0&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_1: usi@108a00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x108a00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1008&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI01_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_1: serial@108a0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x108a0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart1_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI01_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_1: spi@108a0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x108a0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi1_bus &amp;spi1_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI01_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 3&gt;, &lt;&amp;pdma0 2&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_2: usi@108c00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x108c00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1010&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI02_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_2: serial@108c0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x108c0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart2_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI02_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_2: spi@108c0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x108c0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi2_bus &amp;spi2_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI02_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 5&gt;, &lt;&amp;pdma0 4&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_3: usi@108e00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x108e00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1018&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI03_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_3: serial@108e0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x108e0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart3_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI03_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_3: spi@108e0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x108e0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi3_bus &amp;spi3_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI03_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 7&gt;, &lt;&amp;pdma0 6&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_4: usi@109000c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109000c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1020&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_4: serial@10900000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10900000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart4_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_4: spi@10900000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10900000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi4_bus &amp;spi4_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI04_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 9&gt;, &lt;&amp;pdma0 8&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_5: usi@109200c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109200c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1028&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI05_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_5: serial@10920000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10920000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart5_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI05_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_5: spi@10920000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10920000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi5_bus &amp;spi5_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI05_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 11&gt;, &lt;&amp;pdma0 10&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_6: usi@109400c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109400c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1030&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI06_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_6: serial@10940000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10940000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart6_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI06_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_6: spi@10940000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10940000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi6_bus &amp;spi6_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI06_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 13&gt;, &lt;&amp;pdma0 12&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_7: usi@109600c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109600c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1038&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI07_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_7: serial@10960000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10960000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart7_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI07_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_7: spi@10960000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10960000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 778 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi7_bus &amp;spi7_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI07_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 15&gt;, &lt;&amp;pdma0 14&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_8: usi@109800c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x109800c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric0 0x1040&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI08_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_8: serial@10980000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10980000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart8_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI08_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_8: spi@10980000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10980000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi8_bus &amp;spi8_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric0 CLK_MOUT_PERIC0_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric0 CLK_DOUT_PERIC0_USI08_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma0 17&gt;, &lt;&amp;pdma0 16&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm: pwm@109b0000 {</div><div class='hunk'>@@ -247,6 +881,19 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_peric1: clock-controller@10c00000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-peric1";</div><div class='add'>+			reg = &lt;0x10c00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_PERIC1_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_PERIC1_IP&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "noc",</div><div class='add'>+				      "ip";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		syscon_peric1: syscon@10c20000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-peric1-sysreg",</div><div class='ctx'> 				     "syscon";</div><div class='hunk'>@@ -259,6 +906,447 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usi_9: usi@10c800c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10c800c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1000&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_9: serial@10c8000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10c80000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart9_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_9: spi@10c80000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10c80000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi9_bus &amp;spi9_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI09_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 1&gt;, &lt;&amp;pdma1 0&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;256&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_10: usi@10ca00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10ca00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1008&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_10: serial@10ca0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10ca0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart10_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_10: spi@10ca0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10ca0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi10_bus &amp;spi10_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI10_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 3&gt;, &lt;&amp;pdma1 2&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_11: usi@10cc00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10cc00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1010&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI11_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_11: serial@10cc0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10cc0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart11_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI11_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_11: spi@10cc0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10cc0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi11_bus &amp;spi11_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI11_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 5&gt;, &lt;&amp;pdma1 4&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_12: usi@10ce00c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10ce00c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1018&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI12_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_12: serial@10ce0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10ce0000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart12_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI12_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_12: spi@10ce0000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10ce0000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi12_bus &amp;spi12_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI12_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 7&gt;, &lt;&amp;pdma1 6&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_13: usi@10d000c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d000c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1020&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI13_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_13: serial@10d00000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10d00000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart13_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI13_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_13: spi@10d00000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10d00000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi13_bus &amp;spi13_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI13_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 9&gt;, &lt;&amp;pdma1 8&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_14: usi@10d200c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d200c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1028&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI14_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_14: serial@10d20000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10d20000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart14_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI14_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_14: spi@10d20000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10d20000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi14_bus &amp;spi14_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI14_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 11&gt;, &lt;&amp;pdma1 10&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_15: usi@10d400c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d400c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1030&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI15_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_15: serial@10d40000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10d40000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart15_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI15_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_15: spi@10d40000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10d40000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi15_bus &amp;spi15_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI15_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 13&gt;, &lt;&amp;pdma1 12&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_16: usi@10d600c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d600c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1038&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI16_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_16: serial@10d60000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10d60000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart16_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI16_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_16: spi@10d60000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10d60000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi16_bus &amp;spi16_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI16_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 15&gt;, &lt;&amp;pdma1 14&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usi_17: usi@10d800c0 {</div><div class='add'>+			compatible = "samsung,exynosautov920-usi",</div><div class='add'>+				     "samsung,exynos850-usi";</div><div class='add'>+			reg = &lt;0x10d800c0 0x20&gt;;</div><div class='add'>+			samsung,sysreg = &lt;&amp;syscon_peric1 0x1040&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI17_USI&gt;;</div><div class='add'>+			clock-names = "pclk", "ipclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			serial_17: serial@10d80000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-uart",</div><div class='add'>+					     "samsung,exynos850-uart";</div><div class='add'>+				reg = &lt;0x10d80000 0xc0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;uart17_bus&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI17_USI&gt;;</div><div class='add'>+				clock-names = "uart", "clk_uart_baud0";</div><div class='add'>+				samsung,uart-fifosize = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_17: spi@10d80000 {</div><div class='add'>+				compatible = "samsung,exynosautov920-spi",</div><div class='add'>+					     "samsung,exynos850-spi";</div><div class='add'>+				reg = &lt;0x10d80000 0x30&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;spi17_bus &amp;spi17_cs_func&gt;;</div><div class='add'>+				clocks = &lt;&amp;cmu_peric1 CLK_MOUT_PERIC1_NOC_USER&gt;,</div><div class='add'>+					 &lt;&amp;cmu_peric1 CLK_DOUT_PERIC1_USI17_USI&gt;;</div><div class='add'>+				clock-names = "spi", "spi_busclk0";</div><div class='add'>+				samsung,spi-src-clk = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;pdma1 17&gt;, &lt;&amp;pdma1 16&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				num-cs = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				fifo-depth = &lt;64&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmu_top: clock-controller@11000000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-cmu-top";</div><div class='ctx'> 			reg = &lt;0x11000000 0x8000&gt;;</div><div class='hunk'>@@ -283,18 +1371,61 @@</div><div class='ctx'> 			reg = &lt;0x11860000 0x10000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_hsi0: clock-controller@16000000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-hsi0";</div><div class='add'>+			reg = &lt;0x16000000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI0_NOC&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "noc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_hsi0: pinctrl@16040000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-pinctrl";</div><div class='ctx'> 			reg = &lt;0x16040000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_hsi1: clock-controller@16400000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-hsi1";</div><div class='add'>+			reg = &lt;0x16400000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI1_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI1_USBDRD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI1_MMC_CARD&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "noc",</div><div class='add'>+				      "usbdrd",</div><div class='add'>+				      "mmc_card";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_hsi1: pinctrl@16450000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-pinctrl";</div><div class='ctx'> 			reg = &lt;0x16450000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cmu_hsi2: clock-controller@16b00000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-hsi2";</div><div class='add'>+			reg = &lt;0x16b00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI2_NOC&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI2_NOC_UFS&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI2_UFS_EMBD&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_HSI2_ETHERNET&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "noc",</div><div class='add'>+				      "ufs",</div><div class='add'>+				      "embd",</div><div class='add'>+				      "ethernet";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_hsi2: pinctrl@16c10000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-pinctrl";</div><div class='ctx'> 			reg = &lt;0x16c10000 0x10000&gt;;</div><div class='hunk'>@@ -307,10 +1438,62 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ufs_0_phy: phy@16e04000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-ufs-phy";</div><div class='add'>+			reg = &lt;0x16e04000 0x4000&gt;;</div><div class='add'>+			reg-names = "phy-pma";</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;;</div><div class='add'>+			clock-names = "ref_clk";</div><div class='add'>+			samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_aud: pinctrl@1a460000 {</div><div class='ctx'> 			compatible = "samsung,exynosautov920-pinctrl";</div><div class='ctx'> 			reg = &lt;0x1a460000 0x10000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cmu_cpucl0: clock-controller@1ec00000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-cpucl0";</div><div class='add'>+			reg = &lt;0x1ec00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL0_SWITCH&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL0_CLUSTER&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL0_DBG&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "switch",</div><div class='add'>+				      "cluster",</div><div class='add'>+				      "dbg";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cpucl1: clock-controller@1ed00000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-cpucl1";</div><div class='add'>+			reg = &lt;0x1ed00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL1_SWITCH&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL1_CLUSTER&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "switch",</div><div class='add'>+				      "cluster";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmu_cpucl2: clock-controller@1ee00000 {</div><div class='add'>+			compatible = "samsung,exynosautov920-cmu-cpucl2";</div><div class='add'>+			reg = &lt;0x1ee00000 0x8000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL2_SWITCH&gt;,</div><div class='add'>+				 &lt;&amp;cmu_top DOUT_CLKCMU_CPUCL2_CLUSTER&gt;;</div><div class='add'>+			clock-names = "oscclk",</div><div class='add'>+				      "switch",</div><div class='add'>+				      "cluster";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/Makefile b/arch/arm64/boot/dts/exynos/google/Makefile<br/>index 0a6d5e1fe4ee..7385f82b03c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/google/Makefile</a></div><div class='hunk'>@@ -2,3 +2,4 @@</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_EXYNOS) += \</div><div class='ctx'> 	gs101-oriole.dtb \</div><div class='add'>+	gs101-raven.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts<br/>index 387fb779bd29..8df42bedbc03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/google/gs101-oriole.dts</a></div><div class='hunk'>@@ -8,169 +8,22 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include "gs101-pinctrl.h"</div><div class='del'>-#include "gs101.dtsi"</div><div class='add'>+#include "gs101-pixel-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Oriole";</div><div class='ctx'> 	compatible = "google,gs101-oriole", "google,gs101";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;serial_0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		/* Bootloader expects bootargs specified otherwise it crashes */</div><div class='del'>-		bootargs = "";</div><div class='del'>-		stdout-path = &amp;serial_0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		pinctrl-0 = &lt;&amp;key_voldown&gt;, &lt;&amp;key_volup&gt;, &lt;&amp;key_power&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		button-vol-down {</div><div class='del'>-			label = "KEY_VOLUMEDOWN";</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpa7 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		button-vol-up {</div><div class='del'>-			label = "KEY_VOLUMEUP";</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpa8 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		button-power {</div><div class='del'>-			label = "KEY_POWER";</div><div class='del'>-			linux,code = &lt;KEY_POWER&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpa10 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TODO: Remove this once PMIC is implemented  */</div><div class='del'>-	reg_placeholder: regulator-0 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "placeholder_reg";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TODO: Remove this once S2MPG11 slave PMIC is implemented  */</div><div class='del'>-	ufs_0_fixed_vcc_reg: regulator-1 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "ufs-vcc";</div><div class='del'>-		gpio = &lt;&amp;gpp0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ext_24_5m {</div><div class='del'>-	clock-frequency = &lt;24576000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ext_200m {</div><div class='del'>-	clock-frequency = &lt;200000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hsi2c_8 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	eeprom: eeprom@50 {</div><div class='del'>-		compatible = "atmel,24c08";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hsi2c_12 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	/* TODO: add the devices once drivers exist */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl_far_alive {</div><div class='del'>-	key_voldown: key-voldown-pins {</div><div class='del'>-		samsung,pins = "gpa7-3";</div><div class='del'>-		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	key_volup: key-volup-pins {</div><div class='del'>-		samsung,pins = "gpa8-1";</div><div class='del'>-		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl_gpio_alive {</div><div class='del'>-	key_power: key-power-pins {</div><div class='del'>-		samsung,pins = "gpa10-1";</div><div class='del'>-		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='del'>-		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='del'>-		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serial_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ufs_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vcc-supply = &lt;&amp;ufs_0_fixed_vcc_reg&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ufs_0_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd31 {</div><div class='del'>-	vdd10-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	vdd33-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd31_dwc3 {</div><div class='del'>-	dr_mode = "otg";</div><div class='del'>-	usb-role-switch;</div><div class='del'>-	role-switch-default-mode = "peripheral";</div><div class='del'>-	maximum-speed = "super-speed-plus";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd31_phy {</div><div class='del'>-	/* TODO: Update these once PMIC is implemented */</div><div class='del'>-	pll-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	dvdd-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	vddh-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	vdd33-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	vdda-usbdp-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	vddh-usbdp-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usi_uart {</div><div class='del'>-	samsung,clkreq-on; /* needed for UART mode */</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usi8 {</div><div class='del'>-	samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usi12 {</div><div class='del'>-	samsung,mode = &lt;USI_V2_I2C&gt;;</div><div class='add'>+&amp;cont_splash_mem {</div><div class='add'>+	reg = &lt;0x0 0xfac00000 (1080 * 2400 * 4)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;watchdog_cl0 {</div><div class='del'>-	timeout-sec = &lt;30&gt;;</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	width = &lt;1080&gt;;</div><div class='add'>+	height = &lt;2400&gt;;</div><div class='add'>+	stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+	format = "a8r8g8b8";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi<br/>new file mode 100644<br/>index 000000000000..84ff3e047d3b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Device Tree nodes common for all GS101-based Pixel</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2021-2023 Google LLC</div><div class='add'>+ * Copyright 2023 Linaro Ltd - &lt;peter.griffin@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "gs101-pinctrl.h"</div><div class='add'>+#include "gs101.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial_0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		/* Bootloader expects bootargs specified otherwise it crashes */</div><div class='add'>+		bootargs = "";</div><div class='add'>+		stdout-path = &amp;serial_0;</div><div class='add'>+</div><div class='add'>+		/* Use display framebuffer as setup by bootloader */</div><div class='add'>+		framebuffer0: framebuffer-0 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			memory-region = &lt;&amp;cont_splash_mem&gt;;</div><div class='add'>+			/* format properties to be added by actual board */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;key_voldown&gt;, &lt;&amp;key_volup&gt;, &lt;&amp;key_power&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button-vol-down {</div><div class='add'>+			label = "KEY_VOLUMEDOWN";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa7 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "KEY_VOLUMEUP";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa8 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-power {</div><div class='add'>+			label = "KEY_POWER";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpa10 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reboot-mode {</div><div class='add'>+		compatible = "nvmem-reboot-mode";</div><div class='add'>+		nvmem-cells = &lt;&amp;nvmem_reboot_mode&gt;;</div><div class='add'>+		nvmem-cell-names = "reboot-mode";</div><div class='add'>+		mode-bootloader = &lt;0x800000fc&gt;;</div><div class='add'>+		mode-charge = &lt;0x8000000a&gt;;</div><div class='add'>+		mode-dm-verity-device-corrupted = &lt;0x80000050&gt;;</div><div class='add'>+		mode-fastboot = &lt;0x800000fa&gt;;</div><div class='add'>+		mode-reboot-ab-update = &lt;0x80000052&gt;;</div><div class='add'>+		mode-recovery = &lt;0x800000ff&gt;;</div><div class='add'>+		mode-rescue = &lt;0x800000f9&gt;;</div><div class='add'>+		mode-shutdown-thermal = &lt;0x80000051&gt;;</div><div class='add'>+		mode-shutdown-thermal-battery = &lt;0x80000051&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once PMIC is implemented  */</div><div class='add'>+	reg_placeholder: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "placeholder_reg";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: Remove this once S2MPG11 slave PMIC is implemented  */</div><div class='add'>+	ufs_0_fixed_vcc_reg: regulator-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ufs-vcc";</div><div class='add'>+		gpio = &lt;&amp;gpp0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		cont_splash_mem: splash@fac00000 {</div><div class='add'>+			/* size to be updated by actual board */</div><div class='add'>+			reg = &lt;0x0 0xfac00000 0x0&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;acpm_ipc {</div><div class='add'>+	pmic {</div><div class='add'>+		compatible = "samsung,s2mpg10-pmic";</div><div class='add'>+		interrupts-extended = &lt;&amp;gpa0 6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext_24_5m {</div><div class='add'>+	clock-frequency = &lt;24576000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ext_200m {</div><div class='add'>+	clock-frequency = &lt;200000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c08";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsi2c_12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* TODO: add the devices once drivers exist */</div><div class='add'>+</div><div class='add'>+	usb-typec@25 {</div><div class='add'>+		compatible = "maxim,max77759-tcpci", "maxim,max33359";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpa8 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			self-powered;</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			op-sink-microwatt = &lt;2600000&gt;;</div><div class='add'>+			slow-charger-loop;</div><div class='add'>+			/*</div><div class='add'>+			 * max77759 operating in reverse boost mode (0xA) can</div><div class='add'>+			 * source up to 1.5A while extboost can only do ~1A.</div><div class='add'>+			 * Since extboost is the primary path, advertise 900mA.</div><div class='add'>+			 */</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 900,</div><div class='add'>+						 (PDO_FIXED_SUSPEND</div><div class='add'>+						  | PDO_FIXED_USB_COMM</div><div class='add'>+						  | PDO_FIXED_DATA_SWAP</div><div class='add'>+						  | PDO_FIXED_DUAL_ROLE))&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000,</div><div class='add'>+					       (PDO_FIXED_DATA_SWAP</div><div class='add'>+						| PDO_FIXED_USB_COMM</div><div class='add'>+						| PDO_FIXED_HIGHER_CAP</div><div class='add'>+						| PDO_FIXED_DUAL_ROLE))</div><div class='add'>+				     PDO_FIXED(9000, 2200, 0)</div><div class='add'>+				     PDO_PPS_APDO(5000, 11000, 3000)&gt;;</div><div class='add'>+			sink-vdos = &lt;VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,</div><div class='add'>+					     IDH_PTYPE_DFP_HOST, 2, 0x18d1)</div><div class='add'>+				     VDO_CERT(0x0)</div><div class='add'>+				     VDO_PRODUCT(0x4ee1, 0x0)</div><div class='add'>+				     VDO_UFP(UFP_VDO_VER1_2,</div><div class='add'>+					     (DEV_USB2_CAPABLE</div><div class='add'>+					      | DEV_USB3_CAPABLE),</div><div class='add'>+					     UFP_RECEPTACLE, 0,</div><div class='add'>+					     AMA_VCONN_NOT_REQ, 0,</div><div class='add'>+					     UFP_ALTMODE_NOT_SUPP,</div><div class='add'>+					     UFP_USB32_GEN1)</div><div class='add'>+				     /* padding */ 0</div><div class='add'>+				     VDO_DFP(DFP_VDO_VER1_1,</div><div class='add'>+					     (HOST_USB2_CAPABLE</div><div class='add'>+					      | HOST_USB3_CAPABLE),</div><div class='add'>+					     DFP_RECEPTACLE, 0)&gt;;</div><div class='add'>+			sink-vdos-v1 = &lt;VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,</div><div class='add'>+						0, 0, 0x18d1)</div><div class='add'>+					VDO_CERT(0x0)</div><div class='add'>+					VDO_PRODUCT(0x4ee1, 0x0)&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * Until bootloader is updated to set those two when</div><div class='add'>+			 * console is enabled, we disable PD here.</div><div class='add'>+			 */</div><div class='add'>+			pd-disable;</div><div class='add'>+			typec-power-opmode = "default";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdrd31_phy_orien_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdrd31_dwc3_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@66 {</div><div class='add'>+		compatible = "maxim,max77759";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;if_pmic_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		interrupts-extended = &lt;&amp;gpa8 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio {</div><div class='add'>+			compatible = "maxim,max77759-gpio";</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * "Human-readable name [SIGNAL_LABEL]" where the</div><div class='add'>+			 * latter comes from the schematic</div><div class='add'>+			 */</div><div class='add'>+			gpio-line-names = "OTG boost [OTG_BOOST_EN]",</div><div class='add'>+					  "max20339 IRQ [MW_OVP_INT_L]";</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nvmem-0 {</div><div class='add'>+			compatible = "maxim,max77759-nvmem";</div><div class='add'>+</div><div class='add'>+			nvmem-layout {</div><div class='add'>+				compatible = "fixed-layout";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				nvmem_reboot_mode: reboot-mode@0 {</div><div class='add'>+					reg = &lt;0x0 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				boot-reason@4 {</div><div class='add'>+					reg = &lt;0x4 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				shutdown-user-flag@8 {</div><div class='add'>+					reg = &lt;0x8 0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rsoc@a {</div><div class='add'>+					reg = &lt;0xa 0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_far_alive {</div><div class='add'>+	key_voldown: key-voldown-pins {</div><div class='add'>+		samsung,pins = "gpa7-3";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_volup: key-volup-pins {</div><div class='add'>+		samsung,pins = "gpa8-1";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	typec_int: typec-int-pins {</div><div class='add'>+		samsung,pins = "gpa8-2";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if_pmic_int: if-pmic-int-pins {</div><div class='add'>+		samsung,pins = "gpa8-3";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_gpio_alive {</div><div class='add'>+	pmic_int: pmic-int-pins {</div><div class='add'>+		samsung,pins = "gpa0-6";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	key_power: key-power-pins {</div><div class='add'>+		samsung,pins = "gpa10-1";</div><div class='add'>+		samsung,pin-function = &lt;GS101_PIN_FUNC_EINT&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;GS101_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;GS101_PIN_DRV_2_5_MA&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vcc-supply = &lt;&amp;ufs_0_fixed_vcc_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31 {</div><div class='add'>+	vdd10-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vdd33-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	maximum-speed = "super-speed-plus";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usbdrd31_dwc3_role_switch: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd31_phy {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	/* TODO: Update these once PMIC is implemented */</div><div class='add'>+	pll-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	dvdd-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vddh-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vdd33-usb20-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vdda-usbdp-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	vddh-usbdp-supply = &lt;&amp;reg_placeholder&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usbdrd31_phy_orien_switch: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usi_uart {</div><div class='add'>+	samsung,clkreq-on; /* needed for UART mode */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usi8 {</div><div class='add'>+	samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usi12 {</div><div class='add'>+	samsung,mode = &lt;USI_MODE_I2C&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog_cl0 {</div><div class='add'>+	timeout-sec = &lt;30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts<br/>new file mode 100644<br/>index 000000000000..1e7e6b34b864<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101-raven.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/google/gs101-raven.dts</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Raven Device Tree</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2021-2023 Google LLC</div><div class='add'>+ * Copyright 2023-2025 Linaro Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "gs101-pixel-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Raven";</div><div class='add'>+	compatible = "google,gs101-raven", "google,gs101";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cont_splash_mem {</div><div class='add'>+	reg = &lt;0x0 0xfac00000 (1440 * 3120 * 4)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;framebuffer0 {</div><div class='add'>+	width = &lt;1440&gt;;</div><div class='add'>+	height = &lt;3120&gt;;</div><div class='add'>+	stride = &lt;(1440 * 4)&gt;;</div><div class='add'>+	format = "a8r8g8b8";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi<br/>index 302c5beb224a..31c99526470d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/exynos/google/gs101.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/exynos/google/gs101.dtsi</a></div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ANANKE_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;ananke_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;250&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;70&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ANANKE_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;ananke_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;250&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;70&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ANANKE_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;ananke_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;250&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;70&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ANANKE_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;ananke_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;250&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;70&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a76";</div><div class='ctx'> 			reg = &lt;0x0400&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ENYO_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;enyo_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;620&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;284&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-a76";</div><div class='ctx'> 			reg = &lt;0x0500&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;ENYO_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;enyo_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;620&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;284&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-x1";</div><div class='ctx'> 			reg = &lt;0x0600&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;HERA_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;hera_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;650&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 			compatible = "arm,cortex-x1";</div><div class='ctx'> 			reg = &lt;0x0700&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;HERA_CPU_SLEEP&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;hera_cpu_sleep&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;650&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -151,28 +151,31 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			ANANKE_CPU_SLEEP: cpu-ananke-sleep {</div><div class='add'>+			ananke_cpu_sleep: cpu-ananke-sleep {</div><div class='ctx'> 				idle-state-name = "c2";</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='ctx'> 				entry-latency-us = &lt;70&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;160&gt;;</div><div class='ctx'> 				min-residency-us = &lt;2000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			ENYO_CPU_SLEEP: cpu-enyo-sleep {</div><div class='add'>+			enyo_cpu_sleep: cpu-enyo-sleep {</div><div class='ctx'> 				idle-state-name = "c2";</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='ctx'> 				entry-latency-us = &lt;150&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;190&gt;;</div><div class='ctx'> 				min-residency-us = &lt;2500&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			HERA_CPU_SLEEP: cpu-hera-sleep {</div><div class='add'>+			hera_cpu_sleep: cpu-hera-sleep {</div><div class='ctx'> 				idle-state-name = "c2";</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='ctx'> 				entry-latency-us = &lt;235&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;220&gt;;</div><div class='ctx'> 				min-residency-us = &lt;3500&gt;;</div><div class='hunk'>@@ -196,6 +199,14 @@</div><div class='ctx'> 		clock-output-names = "ext-200m";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	firmware {</div><div class='add'>+		acpm_ipc: power-management {</div><div class='add'>+			compatible = "google,gs101-acpm-ipc";</div><div class='add'>+			mboxes = &lt;&amp;ap2apm_mailbox&gt;;</div><div class='add'>+			shmem = &lt;&amp;apm_sram&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu-0 {</div><div class='ctx'> 		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &amp;ppi_cluster0&gt;;</div><div class='hunk'>@@ -330,6 +341,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gic: interrupt-controller@10400000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x10400000 0x10000&gt;, /* GICD */</div><div class='hunk'>@@ -825,7 +837,7 @@</div><div class='ctx'> 				 &lt;&amp;cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0&gt;;</div><div class='ctx'> 			clock-names = "pclk", "ipclk";</div><div class='ctx'> 			samsung,sysreg = &lt;&amp;sysreg_peric0 0x1020&gt;;</div><div class='del'>-			samsung,mode = &lt;USI_V2_UART&gt;;</div><div class='add'>+			samsung,mode = &lt;USI_MODE_UART&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			serial_0: serial@10a00000 {</div><div class='hunk'>@@ -1267,7 +1279,7 @@</div><div class='ctx'> </div><div class='ctx'> 		usbdrd31_phy: phy@11100000 {</div><div class='ctx'> 			compatible = "google,gs101-usb31drd-phy";</div><div class='del'>-			reg = &lt;0x11100000 0x0100&gt;,</div><div class='add'>+			reg = &lt;0x11100000 0x0200&gt;,</div><div class='ctx'> 			      &lt;0x110f0000 0x0800&gt;,</div><div class='ctx'> 			      &lt;0x110e0000 0x2800&gt;;</div><div class='ctx'> 			reg-names = "phy", "pcs", "pma";</div><div class='hunk'>@@ -1302,6 +1314,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usbdrd31_phy 0&gt;, &lt;&amp;usbdrd31_phy 1&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1357,6 +1372,7 @@</div><div class='ctx'> 				 &lt;&amp;cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK&gt;;</div><div class='ctx'> 			clock-names = "core_clk", "sclk_unipro_main", "fmp",</div><div class='ctx'> 				      "aclk", "pclk", "sysreg";</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 			freq-table-hz = &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;;</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;ufs_rst_n &amp;ufs_refclk_out&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='hunk'>@@ -1394,23 +1410,39 @@</div><div class='ctx'> 		pmu_system_controller: system-controller@17460000 {</div><div class='ctx'> 			compatible = "google,gs101-pmu", "syscon";</div><div class='ctx'> 			reg = &lt;0x17460000 0x10000&gt;;</div><div class='add'>+			google,pmu-intr-gen-syscon = &lt;&amp;pmu_intr_gen&gt;;</div><div class='ctx'> </div><div class='ctx'> 			poweroff: syscon-poweroff {</div><div class='ctx'> 				compatible = "syscon-poweroff";</div><div class='del'>-				regmap = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'> 				offset = &lt;0x3e9c&gt;; /* PAD_CTRL_PWR_HOLD */</div><div class='del'>-				mask = &lt;0x100&gt;; /* reset value */</div><div class='add'>+				mask = &lt;0x00000100&gt;;</div><div class='add'>+				value = &lt;0x0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reboot: syscon-reboot {</div><div class='del'>-				compatible = "syscon-reboot";</div><div class='del'>-				regmap = &lt;&amp;pmu_system_controller&gt;;</div><div class='del'>-				offset = &lt;0x3a00&gt;; /* SYSTEM_CONFIGURATION */</div><div class='del'>-				mask = &lt;0x2&gt;; /* SWRESET_SYSTEM */</div><div class='del'>-				value = &lt;0x2&gt;; /* reset value */</div><div class='add'>+				compatible = "google,gs101-reboot";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reboot-mode {</div><div class='add'>+				compatible = "syscon-reboot-mode";</div><div class='add'>+				offset = &lt;0x0810&gt;; /* EXYNOS_PMU_SYSIP_DAT0 */</div><div class='add'>+				mode-bootloader = &lt;0xfc&gt;;</div><div class='add'>+				mode-charge = &lt;0x0a&gt;;</div><div class='add'>+				mode-dm-verity-device-corrupted = &lt;0x50&gt;;</div><div class='add'>+				mode-fastboot = &lt;0xfa&gt;;</div><div class='add'>+				mode-reboot-ab-update = &lt;0x52&gt;;</div><div class='add'>+				mode-recovery = &lt;0xff&gt;;</div><div class='add'>+				mode-rescue = &lt;0xf9&gt;;</div><div class='add'>+				mode-shutdown-thermal = &lt;0x51&gt;;</div><div class='add'>+				mode-shutdown-thermal-battery = &lt;0x51&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pmu_intr_gen: syscon@17470000 {</div><div class='add'>+			compatible = "google,gs101-pmu-intr-gen", "syscon";</div><div class='add'>+			reg = &lt;0x17470000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_gpio_alive: pinctrl@174d0000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x174d0000 0x00001000&gt;;</div><div class='hunk'>@@ -1437,6 +1469,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ap2apm_mailbox: mailbox@17610000 {</div><div class='add'>+			compatible = "google,gs101-mbox";</div><div class='add'>+			reg = &lt;0x17610000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cmu_apm CLK_GOUT_APM_MAILBOX_APM_AP_PCLK&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_gsactrl: pinctrl@17940000 {</div><div class='ctx'> 			compatible = "google,gs101-pinctrl";</div><div class='ctx'> 			reg = &lt;0x17940000 0x00001000&gt;;</div><div class='hunk'>@@ -1451,6 +1492,7 @@</div><div class='ctx'> 			/* TODO: update once support for this CMU exists */</div><div class='ctx'> 			clocks = &lt;0&gt;;</div><div class='ctx'> 			clock-names = "pclk";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmu_top: clock-controller@1e080000 {</div><div class='hunk'>@@ -1463,6 +1505,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	apm_sram: sram@2039000 {</div><div class='add'>+		compatible = "mmio-sram";</div><div class='add'>+		reg = &lt;0x0 0x2039000 0x40000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0x2039000 0x40000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts =</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile<br/>index 9d3df8b218a2..525ef180481d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/Makefile</a></div><div class='hunk'>@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-tqmls1012al-mbls1012al.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-kbox-a-230-ls.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var1.dtb</div><div class='hunk'>@@ -104,7 +106,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-eval-v3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris-v2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dx-colibri-iris.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb</div><div class='add'>+</div><div class='add'>+imx8dxl-evk-pcie-ep-dtbs += imx8dxl-evk.dtb imx-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk-pcie-ep.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdps-mb-smarc-2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb</div><div class='hunk'>@@ -112,6 +119,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-emtop-baseboard.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb</div><div class='add'>+</div><div class='add'>+imx8mm-evk-pcie-ep-dtbs += imx8mm-evk.dtb imx-pcie0-ep.dtbo</div><div class='add'>+imx8mm-evkb-pcie-ep-dtbs += imx8mm-evkb.dtb imx-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk-pcie-ep.dtb imx8mm-evkb-pcie-ep.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-iot-gateway.dtb</div><div class='hunk'>@@ -122,6 +134,19 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb</div><div class='add'>+</div><div class='add'>+imx8mm-phyboard-polis-peb-av-10-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-av-10.dtbo</div><div class='add'>+imx8mm-phyboard-polis-peb-eval-01-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-eval-01.dtbo</div><div class='add'>+imx8mm-phycore-no-eth-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phycore-no-eth.dtbo</div><div class='add'>+imx8mm-phycore-no-spiflash-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phycore-no-spiflash.dtbo</div><div class='add'>+imx8mm-phycore-rpmsg-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phycore-rpmsg.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-av-10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-eval-01.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-phycore-no-eth.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-phycore-no-spiflash.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-phycore-rpmsg.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb</div><div class='hunk'>@@ -136,10 +161,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-yavia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-wifi-yavia.dtb</div><div class='ctx'> </div><div class='hunk'>@@ -163,48 +190,108 @@ imx8mn-tqma8mqnl-mba8mx-usbotg-dtbs += imx8mn-tqma8mqnl-mba8mx.dtb imx8mn-tqma8m</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-usbotg.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-adpismarc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-helios.dtb</div><div class='add'>+imx8mp-aristainetos3-helios-lvds-dtbs += imx8mp-aristainetos3-helios.dtb imx8mp-aristainetos3-helios-lvds.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-helios-lvds.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-proton2s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-cubox-m.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-drc02.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pro.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pulse.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-ripple.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-bl-osm-s.dtb</div><div class='add'>+</div><div class='add'>+imx8mp-kontron-dl-dtbs += imx8mp-kontron-bl-osm-s.dtb imx8mp-kontron-dl.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb</div><div class='add'>+imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-enc-carrier-board.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb</div><div class='ctx'> imx8mp-phyboard-pollux-rdk-no-eth-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-eth.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-eth.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-basic.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-bd500.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-toradex-smarc-dev.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb</div><div class='add'>+</div><div class='add'>+imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \</div><div class='add'>+	imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtbo</div><div class='add'>+imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \</div><div class='add'>+	imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-ultra-mach-sbc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw82xx-2x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-yavia.dtb</div><div class='ctx'> </div><div class='add'>+imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtbo</div><div class='add'>+imx8mp-evk-lvds0-imx-lvds-hdmi-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds0-imx-lvds-hdmi.dtbo</div><div class='add'>+imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtbo</div><div class='add'>+imx8mp-evk-lvds1-imx-lvds-hdmi-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds1-imx-lvds-hdmi.dtbo</div><div class='ctx'> imx8mp-evk-mx8-dlvds-lcd1-dtbs += imx8mp-evk.dtb imx8mp-evk-mx8-dlvds-lcd1.dtbo</div><div class='add'>+imx8mp-evk-pcie-ep-dtbs += imx8mp-evk.dtb imx-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds0-imx-lvds-hdmi.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds1-imx-lvds-hdmi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-mx8-dlvds-lcd1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-pcie-ep.dtb</div><div class='ctx'> </div><div class='del'>-imx8mp-tqma8mpql-mba8mpxl-lvds-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds.dtbo</div><div class='add'>+imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtbo</div><div class='ctx'> imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtbo</div><div class='del'>-dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds.dtb</div><div class='add'>+imx8mp-tqma8mpql-mba8mp-ras314-imx219-dtbs += imx8mp-tqma8mpql-mba8mp-ras314.dtb imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtbo</div><div class='add'>+imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33-dtbs += imx8mp-tqma8mpql-mba8mp-ras314.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtbo</div><div class='add'>+imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33-imx219-dtbs += imx8mp-tqma8mpql-mba8mp-ras314.dtb imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtbo imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33-imx219.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb</div><div class='add'>+imx8mq-evk-pcie1-ep-dtbs += imx8mq-evk.dtb imx-pcie1-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-pcie1-ep.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mq-kontron-pitx-imx8m.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb</div><div class='hunk'>@@ -231,23 +318,75 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval-v1.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb</div><div class='add'>+</div><div class='add'>+imx8qm-mek-ov5640-csi0-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi0.dtbo</div><div class='add'>+dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-csi0.dtb</div><div class='add'>+imx8qm-mek-ov5640-csi1-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi1.dtbo</div><div class='add'>+dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-csi1.dtb</div><div class='add'>+imx8qm-mek-ov5640-dual-dtbs := imx8qm-mek.dtb imx8qm-mek-ov5640-csi0.dtbo imx8qm-mek-ov5640-csi1.dtbo</div><div class='add'>+dtb-${CONFIG_ARCH_MXC} += imx8qm-mek-ov5640-dual.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-aster.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb</div><div class='add'>+</div><div class='add'>+imx8qxp-mek-pcie-ep-dtbs += imx8qxp-mek.dtb imx-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-pcie-ep.dtb</div><div class='add'>+</div><div class='add'>+imx8qxp-mek-ov5640-csi-dtbs := imx8qxp-mek.dtb imx8qxp-mek-ov5640-csi.dtbo</div><div class='add'>+dtb-${CONFIG_ARCH_MXC} += imx8qxp-mek-ov5640-csi.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqps-mb-smarc-2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8ulp-9x9-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx91-11x11-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx91-tqma9131-mba91xxca.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb</div><div class='add'>+</div><div class='add'>+imx93-9x9-qsb-i3c-dtbs += imx93-9x9-qsb.dtb imx93-9x9-qsb-i3c.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb-i3c.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-kontron-bl-osm-s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb</div><div class='add'>+</div><div class='add'>+imx93-phyboard-nash-peb-wlbt-07-dtbs += imx93-phyboard-nash.dtb imx93-phyboard-nash-peb-wlbt-07.dtbo</div><div class='add'>+imx93-phyboard-segin-peb-eval-01-dtbs += imx93-phyboard-segin.dtb imx93-phyboard-segin-peb-eval-01.dtbo</div><div class='add'>+imx93-phyboard-segin-peb-wlbt-05-dtbs += imx93-phyboard-segin.dtb imx93-phyboard-segin-peb-wlbt-05.dtbo</div><div class='add'>+imx93-phycore-rpmsg-dtbs += imx93-phyboard-nash.dtb imx93-phyboard-segin.dtb imx93-phycore-rpmsg.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash-peb-wlbt-07.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin-peb-eval-01.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin-peb-wlbt-05.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb</div><div class='add'>+</div><div class='add'>+imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb</div><div class='add'>+imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo</div><div class='add'>+imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie0-ep.dtb imx95-19x19-evk-pcie1-ep.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx95-libra-rdk-fpsc.dtb</div><div class='add'>+</div><div class='add'>+imx8mm-kontron-dl-dtbs			:= imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo</div><div class='add'>+imx8mm-kontron-bl-lte-dtbs		:= imx8mm-kontron-bl.dtb imx8mm-kontron-bl-lte.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-bl-lte.dtb</div><div class='ctx'> </div><div class='ctx'> imx8mm-venice-gw72xx-0x-imx219-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo</div><div class='ctx'> imx8mm-venice-gw72xx-0x-rpidsi-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts<br/>index bbdf989058ff..ce59b94d8c22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts</a></div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'> 	flash@2 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "en25s64", "jedec,spi-nor";</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='ctx'> 		spi-cpol;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		reg = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts<br/>new file mode 100644<br/>index 000000000000..07026b067320<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al-emmc.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Matthias Schiffer</div><div class='add'>+ * Author: Max Merchel</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "fsl-ls1012a-tqmls1012al-mbls1012al.dts"</div><div class='add'>+</div><div class='add'>+&amp;esdhc0 {</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	/delete-property/ no-mmc;</div><div class='add'>+	/delete-property/ sd-uhs-sdr12;</div><div class='add'>+	/delete-property/ sd-uhs-sdr25;</div><div class='add'>+	/delete-property/ sd-uhs-sdr50;</div><div class='add'>+	/delete-property/ sd-uhs-sdr104;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	voltage-ranges = &lt;1800 1800&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts<br/>new file mode 100644<br/>index 000000000000..e46cc1a07f0c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al-mbls1012al.dts</a></div><div class='hunk'>@@ -0,0 +1,366 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Matthias Schiffer</div><div class='add'>+ * Author: Max Merchel</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "fsl-ls1012a-tqmls1012al.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems TQMLS1012AL on MBLS1012AL";</div><div class='add'>+	compatible = "tq,ls1012a-tqmls1012al-mbls1012al", "tq,ls1012a-tqmls1012al", "fsl,ls1012a";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		/* use MAC from U-Boot environment */</div><div class='add'>+		/* TODO: PFE */</div><div class='add'>+		ethernet2 = &amp;swport0;</div><div class='add'>+		ethernet3 = &amp;swport1;</div><div class='add'>+		ethernet4 = &amp;swport2;</div><div class='add'>+		ethernet5 = &amp;swport3;</div><div class='add'>+		serial0 = &amp;duart0;</div><div class='add'>+		spi0 = &amp;qspi;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;duart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		switch-1 {</div><div class='add'>+			label = "S2";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio_exp_3p3v 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-2 {</div><div class='add'>+			label = "X15";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio_exp_1p8v 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-3 {</div><div class='add'>+			label = "X16";</div><div class='add'>+			linux,code = &lt;BTN_2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio_exp_1p8v 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio_exp_3p3v 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio_exp_3p3v 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* global autoconfigured region for contiguous allocations */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			/* 64 MiB */</div><div class='add'>+			size = &lt;0 0x04000000&gt;;</div><div class='add'>+			/*  512 - 128 MiB, our minimum RAM config will be 512 MiB */</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x98000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p5v_pcie: regulator-1p5v-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V5_PCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio_exp_1p8v 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p5v_wlan: regulator-1p5v-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V5_WLAN";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio_exp_1p8v 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3P3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_pcie: regulator-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_PCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio_exp_3p3v 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_wlan: regulator-3v3-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_WLAN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;gpio_exp_3p3v 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;duart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;esdhc0 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	gpio_exp_3p3v: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "", "", "GPIO_3V3_3", "",</div><div class='add'>+				  "", "", "", "",</div><div class='add'>+				  "", "GPIO_3V3_1", "GPIO_3V3_2", "",</div><div class='add'>+				  "", "", "", "";</div><div class='add'>+</div><div class='add'>+		wlan-disable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "WLAN_DISABLE#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-rst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "PCIE_RST#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wlan-rst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "WLAN_RST#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-dis-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "PCIE_DIS#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-wake-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "PCIE_WAKE#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lm75_48: temperature-sensor@48 {</div><div class='add'>+		compatible = "national,lm75a";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch@5f {</div><div class='add'>+		compatible = "microchip,ksz9897";</div><div class='add'>+		reg = &lt;0x5f&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio_exp_3p3v 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			swport0: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				label = "swp0";</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			swport1: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "swp1";</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			swport2: port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				label = "swp2";</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			swport3: port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				label = "swp3";</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@6 {</div><div class='add'>+				reg = &lt;6&gt;;</div><div class='add'>+				label = "cpu";</div><div class='add'>+				/* TODO: PFE */</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				rx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+				tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;1000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_exp_1p8v: gpio@70 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "PCIE_CLK_PD#", "PMIC_INT#", "ETH_SW_INT#", "",</div><div class='add'>+				  "", "", "", "",</div><div class='add'>+				  "", "GPIO_3V3_1", "GPIO_3V3_2", "",</div><div class='add'>+				  "", "", "", "";</div><div class='add'>+</div><div class='add'>+		/* do not change PCIE_CLK_PD */</div><div class='add'>+		pcie-clk-pd-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "PCIE_CLK_PD#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmic-int-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "PMIC_INT#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth-sw-int-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "ETH_SW_INT#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth-link-pwrdwn-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "ETH_LINK_PWRDWN#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: PFE */</div><div class='add'>+</div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb451,8142";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio_exp_3p3v 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb451,8140";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio_exp_3p3v 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi<br/>new file mode 100644<br/>index 000000000000..7c5a3dee91b9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1012a-tqmls1012al.dtsi</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Matthias Schiffer</div><div class='add'>+ * Author: Max Merchel</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "fsl-ls1012a.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "tq,ls1012a-tqmls1012al", "fsl,ls1012a";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/*  our minimum RAM config will be 512 MiB */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	jc42_19: temperature-sensor@19 {</div><div class='add'>+		compatible = "nxp,se97b", "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m24c64_50: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m24c02_51: eeprom@51 {</div><div class='add'>+		compatible = "nxp,se97b", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc1: rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1339";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;39000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi<br/>index dd479889658d..fc3e138077b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi</a></div><div class='hunk'>@@ -87,6 +87,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@1400000 {</div><div class='ctx'> 		compatible = "arm,gic-400";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x1401000 0 0x1000&gt;, /* GICD */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts<br/>index d9fac647f432..1d53b529af88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pwm-fan {</div><div class='ctx'> 		compatible = "pwm-fan";</div><div class='del'>-		cooling-min-state = &lt;0&gt;;</div><div class='del'>-		cooling-max-state = &lt;3&gt;;</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		pwms = &lt;&amp;sl28cpld_pwm0 0 4000000&gt;;</div><div class='ctx'> 		cooling-levels = &lt;1 128 192 255&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts<br/>index 03748a7f657b..e04483fdb908 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts</a></div><div class='hunk'>@@ -41,9 +41,21 @@</div><div class='ctx'> 	wp-gpios = &lt;&amp;gpio3 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sfp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfp1_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #include "fsl-ls1043-post.dtsi"</div><div class='ctx'> #include "tqmls104xa-mbls10xxa-fman.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;enet6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi<br/>index 12d5f3938e5d..257d90bb9c20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi</a></div><div class='hunk'>@@ -17,11 +17,10 @@</div><div class='ctx'> 	qflash0: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi<br/>index c0e3e8fa1e79..73315c517039 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi</a></div><div class='hunk'>@@ -289,6 +289,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@1400000 {</div><div class='ctx'> 		compatible = "arm,gic-400";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x1401000 0 0x1000&gt;, /* GICD */</div><div class='hunk'>@@ -550,6 +551,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 36&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 37&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -563,6 +567,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 34&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 35&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -576,6 +583,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 40&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 41&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -717,6 +727,9 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_SYSCLK 0&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 32&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 33&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -727,6 +740,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 30&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 31&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -737,6 +753,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 28&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 29&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -747,6 +766,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 26&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 27&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -757,6 +779,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 24&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 25&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -767,6 +792,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 22&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 23&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts<br/>index a1d9102ff32b..736722b58e77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts</a></div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 	flash@2 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "en25s64", "jedec,spi-nor";</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='ctx'> 		spi-cpol;</div><div class='ctx'> 		spi-cpha;</div><div class='ctx'> 		reg = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts<br/>index 37834ae3deac..43261cda3fcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts</a></div><div class='hunk'>@@ -44,6 +44,22 @@</div><div class='ctx'> 	wp-gpios = &lt;&amp;gpio3 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sfp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfp1_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfp2_i2c {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -51,6 +67,10 @@</div><div class='ctx'> #include "fsl-ls1046-post.dtsi"</div><div class='ctx'> #include "tqmls104xa-mbls10xxa-fman.dtsi"</div><div class='ctx'> </div><div class='add'>+&amp;enet6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;enet7 {</div><div class='del'>-	status = "disabled";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi<br/>index 4a8f8bc688f5..fa543db99def 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi</a></div><div class='hunk'>@@ -17,11 +17,10 @@</div><div class='ctx'> 	qflash0: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -38,5 +37,6 @@</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi<br/>index 0baf256b4400..770d91ef0310 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi</a></div><div class='hunk'>@@ -260,6 +260,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@1400000 {</div><div class='ctx'> 		compatible = "arm,gic-400";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x1410000 0 0x10000&gt;, /* GICD */</div><div class='hunk'>@@ -523,6 +524,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio3 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 36&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 37&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -535,6 +539,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio3 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 34&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 35&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -547,6 +554,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			scl-gpios = &lt;&amp;gpio3 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 40&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 41&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -633,6 +643,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(1)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 32&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 33&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -643,6 +656,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 30&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 31&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -653,6 +669,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 28&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 29&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -663,6 +682,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 26&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 27&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -673,6 +695,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 24&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 25&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -683,15 +708,19 @@</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='ctx'> 			clock-names = "ipg";</div><div class='add'>+			dmas = &lt;&amp;edma0 1 22&gt;,</div><div class='add'>+			       &lt;&amp;edma0 1 23&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		wdog0: watchdog@2ad0000 {</div><div class='del'>-			compatible = "fsl,imx21-wdt";</div><div class='add'>+			compatible = "fsl,ls1046a-wdt", "fsl,imx21-wdt";</div><div class='ctx'> 			reg = &lt;0x0 0x2ad0000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='ctx'> 					    QORIQ_CLK_PLL_DIV(2)&gt;;</div><div class='add'>+			big-endian;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		edma0: dma-controller@2c00000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts<br/>index bc0d89427fbe..3a11068f2212 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts</a></div><div class='hunk'>@@ -87,6 +87,22 @@</div><div class='ctx'> 		los-gpios = &lt;&amp;sfpgpio 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		maximum-power-milliwatt = &lt;2000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb1v2_supply: regulator-usbhub-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "usbhub_1v2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	system3v3_supply: regulator-system-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "system_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* XG1 - Upper SFP */</div><div class='hunk'>@@ -231,6 +247,12 @@</div><div class='ctx'> 		compatible = "atmel,at97sc3204t";</div><div class='ctx'> 		reg = &lt;0x29&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usbhub: usb-hub@2d {</div><div class='add'>+		compatible = "microchip,usb5744";</div><div class='add'>+		reg = &lt;0x2d&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='hunk'>@@ -378,10 +400,32 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* LS1088A USB Port 0 - direct to bottom USB-A port */</div><div class='ctx'> &amp;usb0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* LS1088A USB Port 1 - to Microchip USB5744 USB Hub */</div><div class='ctx'> &amp;usb1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;usbhub&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;system3v3_supply&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;usb1v2_supply&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;usbhub&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;system3v3_supply&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;usb1v2_supply&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts<br/>index e567918f6afc..181eeab55aa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a-mbls10xxa.dts</a></div><div class='hunk'>@@ -53,6 +53,14 @@</div><div class='ctx'> 	wp-gpios = &lt;&amp;gpio3 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sfp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sfp1_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi<br/>index 9a0f21484be9..b8a213df238a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-ls1088a-tqmls1088a.dtsi</a></div><div class='hunk'>@@ -17,11 +17,10 @@</div><div class='ctx'> 	qflash0: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -38,5 +37,6 @@</div><div class='ctx'> 		spi-max-frequency = &lt;62500000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi<br/>index d32a52ab00a4..eec2cd6c6d32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> 	rgmii_phy1: ethernet-phy@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		qca,smarteee-tw-us-1g = &lt;24&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -94,9 +95,6 @@</div><div class='ctx'> 			fan-temperature-ctrlr@18 {</div><div class='ctx'> 				compatible = "ti,amc6821";</div><div class='ctx'> 				reg = &lt;0x18&gt;;</div><div class='del'>-				cooling-min-state = &lt;0&gt;;</div><div class='del'>-				cooling-max-state = &lt;9&gt;;</div><div class='del'>-				#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -159,6 +157,7 @@</div><div class='ctx'> 	rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf2129";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi<br/>index a7dcbecc1f41..af6258b2fe82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi</a></div><div class='hunk'>@@ -96,6 +96,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcs_mdio7 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts<br/>index 4d721197d837..2d01e20b47e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts</a></div><div class='hunk'>@@ -43,12 +43,22 @@</div><div class='ctx'> 			reg = &lt;0x00&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+				compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+				reg = &lt;0x1&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mdio@8 { /* On-board PHY #2 RGMI2*/</div><div class='ctx'> 			reg = &lt;0x8&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			rgmii_phy2: ethernet-phy@2 {</div><div class='add'>+				compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+				reg = &lt;0x2&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mdio@18 { /* Slot #1 */</div><div class='hunk'>@@ -169,6 +179,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dpmac17 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-connection-type = "rgmii-id";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dpmac18 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy2&gt;;</div><div class='add'>+	phy-connection-type = "rgmii-id";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dspi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi<br/>new file mode 100644<br/>index 000000000000..f54005e37924<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+//</div><div class='add'>+// Device Tree file for LX2160 REV2</div><div class='add'>+//</div><div class='add'>+// Copyright 2025 NXP</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "fsl-lx2160a.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03400000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	      0x80 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03500000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	       0x88 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03600000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	       0x90 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0x90 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03700000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	       0x98 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0x98 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03800000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	       0xa0 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0xa0 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6 {</div><div class='add'>+	compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";</div><div class='add'>+	reg = &lt;0x00 0x03900000 0x0 0x00100000   /* controller registers */</div><div class='add'>+	       0xa8 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+	reg-names = "regs", "config";</div><div class='add'>+</div><div class='add'>+	ranges = &lt;0x81000000 0x0 0x00000000 0xa8 0x00010000 0x0 0x00010000</div><div class='add'>+		  0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+	interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+	/delete-property/ apio-wins;</div><div class='add'>+	/delete-property/ ppio-wins;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	pcie_ep1: pcie-ep@3400000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03400000 0x0 0x00100000</div><div class='add'>+		       0x80 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;8&gt;;</div><div class='add'>+		num-ib-windows = &lt;8&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_ep2: pcie-ep@3500000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03500000 0x0 0x00100000</div><div class='add'>+		       0x88 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;8&gt;;</div><div class='add'>+		num-ib-windows = &lt;8&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_ep3: pcie-ep@3600000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03600000 0x0 0x00100000</div><div class='add'>+		       0x90 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;256&gt;;</div><div class='add'>+		num-ib-windows = &lt;24&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_ep4: pcie-ep@3700000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03700000 0x0 0x00100000</div><div class='add'>+		       0x98 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;8&gt;;</div><div class='add'>+		num-ib-windows = &lt;8&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	pcie_ep5: pcie-ep@3800000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03800000 0x0 0x00100000</div><div class='add'>+		       0xa0 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;256&gt;;</div><div class='add'>+		num-ib-windows = &lt;24&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_ep6: pcie-ep@3900000 {</div><div class='add'>+		compatible = "fsl,lx2160ar2-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x03900000 0x0 0x00100000</div><div class='add'>+		       0xa8 0x00000000 0x8 0x00000000&gt;;</div><div class='add'>+		reg-names = "regs", "addr_space";</div><div class='add'>+		num-ob-windows = &lt;8&gt;;</div><div class='add'>+		num-ib-windows = &lt;8&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi<br/>index 927ecf66a740..c9541403bcd8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi</a></div><div class='hunk'>@@ -614,7 +614,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	soc {</div><div class='add'>+	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso b/arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso<br/>new file mode 100644<br/>index 000000000000..ed73284d9bb6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx-pcie0-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso b/arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso<br/>new file mode 100644<br/>index 000000000000..0e7ef7ef8560<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_ep {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi<br/>index f5c6a0164f36..5862b24fb764 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi</a></div><div class='hunk'>@@ -51,6 +51,40 @@</div><div class='ctx'> 		regulator-name = "5V_SW_CAN2";</div><div class='ctx'> 		startup-delay-us = &lt;10000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound-carrier {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,name = "apalis-nau8822";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "LHP",</div><div class='add'>+			"Headphones", "RHP",</div><div class='add'>+			"Speaker", "LSPK",</div><div class='add'>+			"Speaker", "RSPK",</div><div class='add'>+			"Line Out", "AUXOUT1",</div><div class='add'>+			"Line Out", "AUXOUT2",</div><div class='add'>+			"LAUX", "Line In",</div><div class='add'>+			"RAUX", "Line In",</div><div class='add'>+			"LMICP", "Mic In",</div><div class='add'>+			"RMICP", "Mic In";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Headphones", "Headphones",</div><div class='add'>+			"Line Out", "Line Out",</div><div class='add'>+			"Speaker", "Speaker",</div><div class='add'>+			"Microphone", "Mic In",</div><div class='add'>+			"Line", "Line In";</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;nau8822_1a&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Apalis CAN1 */</div><div class='hunk'>@@ -69,6 +103,13 @@</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	/* Audio Codec */</div><div class='add'>+	nau8822_1a: audio-codec@1a {</div><div class='add'>+		compatible = "nuvoton,nau8822";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* Power/Current Measurement Sensor */</div><div class='ctx'> 	hwmon@40 {</div><div class='ctx'> 		compatible = "ti,ina219";</div><div class='hunk'>@@ -87,6 +128,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sai0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai0&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Apalis MMC1 */</div><div class='ctx'> &amp;usdhc2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc2_4bit&gt;, &lt;&amp;pinctrl_mmc1_cd&gt;;</div><div class='hunk'>@@ -105,6 +158,15 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_cam1_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_esai0_gpios&gt;, &lt;&amp;pinctrl_fec2_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio3&gt;, &lt;&amp;pinctrl_gpio4&gt;, &lt;&amp;pinctrl_gpio_keys&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_usbh_oc_n&gt;, &lt;&amp;pinctrl_lpuart1ctrl&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_lvds0_i2c0_gpio&gt;, &lt;&amp;pinctrl_lvds1_i2c0_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_mipi_dsi_0_1_en&gt;, &lt;&amp;pinctrl_mipi_dsi1_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_mlb_gpios&gt;, &lt;&amp;pinctrl_qspi1a_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_sata1_act&gt;, &lt;&amp;pinctrl_sim0_gpios&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc1_gpios&gt;;</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_enable_3v3_mmc: enable3v3mmcgrp {</div><div class='ctx'> 		fsl,pins = &lt;IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19	0x00000021&gt;; /* MXM3_148 */</div><div class='hunk'>@@ -121,4 +183,11 @@</div><div class='ctx'> 	pinctrl_enable_can2_power: enablecan2powergrp {</div><div class='ctx'> 		fsl,pins = &lt;IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21	0x00000021&gt;; /* MXM3_156 */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai0: sai0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QM_SAI1_RXC_AUD_SAI0_TXD	0xc600006c&gt;, /* MXM3_196 */</div><div class='add'>+			   &lt;IMX8QM_SPI0_CS1_AUD_SAI0_TXC	0xc600004c&gt;, /* MXM3_200 */</div><div class='add'>+			   &lt;IMX8QM_SAI1_RXFS_AUD_SAI0_RXD	0xc600004c&gt;, /* MXM3_202 */</div><div class='add'>+			   &lt;IMX8QM_SPI2_CS1_AUD_SAI0_TXFS	0xc600004c&gt;; /* MXM3_204 */</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi<br/>index deecb96a1596..311d4950793c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi</a></div><div class='hunk'>@@ -22,9 +22,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Audio Mixer */</div><div class='add'>+&amp;amix {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Asynchronous Sample Rate Converter (ASRC) */</div><div class='add'>+&amp;asrc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Display Controller */</div><div class='ctx'> </div><div class='hunk'>@@ -100,17 +104,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis PCIE1 */</div><div class='add'>+/* Apalis PCIE1 */</div><div class='add'>+&amp;pciea {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis BKL1_PWM */</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis DAP1 */</div><div class='add'>+/* Apalis DAP1 */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis Analogue Audio */</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SATA1 */</div><div class='add'>+&amp;sai5_lpcg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SPDIF1 */</div><div class='add'>+/* Apalis SATA1 */</div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Apalis SPDIF1 */</div><div class='add'>+&amp;spdif0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */</div><div class='ctx'> </div><div class='hunk'>@@ -119,4 +141,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis USBH4 SuperSpeed */</div><div class='add'>+/* Apalis USBH4 SuperSpeed */</div><div class='add'>+&amp;usbotg3_cdns3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi<br/>index 5438923a905c..3d8731504ce1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi</a></div><div class='hunk'>@@ -62,9 +62,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Audio Mixer */</div><div class='add'>+&amp;amix {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Asynchronous Sample Rate Converter (ASRC) */</div><div class='add'>+&amp;asrc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Display Controller */</div><div class='ctx'> </div><div class='hunk'>@@ -187,17 +191,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis PCIE1 */</div><div class='add'>+/* Apalis PCIE1 */</div><div class='add'>+&amp;pciea {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis BKL1_PWM */</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis DAP1 */</div><div class='add'>+/* Apalis DAP1 */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis Analogue Audio */</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SATA1 */</div><div class='add'>+&amp;sai5_lpcg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SPDIF1 */</div><div class='add'>+/* Apalis SATA1 */</div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Apalis SPDIF1 */</div><div class='add'>+&amp;spdif0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +228,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis USBH4 SuperSpeed */</div><div class='add'>+/* Apalis USBH4 SuperSpeed */</div><div class='add'>+&amp;usbotg3_cdns3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* Apalis MMC1 */</div><div class='ctx'> &amp;usdhc2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi<br/>index f6654fdcb147..106e802a68ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi</a></div><div class='hunk'>@@ -94,9 +94,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Audio Mixer */</div><div class='add'>+&amp;amix {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Asynchronous Sample Rate Converter (ASRC) */</div><div class='add'>+&amp;asrc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Display Controller */</div><div class='ctx'> </div><div class='hunk'>@@ -236,17 +240,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis PCIE1 */</div><div class='add'>+/* Apalis PCIE1 */</div><div class='add'>+&amp;pciea {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis BKL1_PWM */</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis DAP1 */</div><div class='add'>+/* Apalis DAP1 */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis Analogue Audio */</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SATA1 */</div><div class='add'>+&amp;sai5_lpcg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SPDIF1 */</div><div class='add'>+/* Apalis SATA1 */</div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Apalis SPDIF1 */</div><div class='add'>+&amp;spdif0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */</div><div class='ctx'> </div><div class='hunk'>@@ -255,7 +277,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis USBH4 SuperSpeed */</div><div class='add'>+/* Apalis USBH4 SuperSpeed */</div><div class='add'>+&amp;usbotg3_cdns3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* Apalis MMC1 */</div><div class='ctx'> &amp;usdhc2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi<br/>index 160153853b68..86d018f470c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi</a></div><div class='hunk'>@@ -126,6 +126,13 @@</div><div class='ctx'> 		regulator-name = "usb-phy-dummy";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_vref_1v8: regulator-vref-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "+V1.8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -198,11 +205,32 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* TODO: Apalis Analogue Audio */</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,name = "apalis-imx8qm";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dailink_master: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: HDMI Audio */</div><div class='ctx'> </div><div class='del'>-	/* TODO: Apalis SPDIF1 */</div><div class='add'>+	/* Apalis SPDIF1 */</div><div class='add'>+	sound-spdif {</div><div class='add'>+		compatible = "fsl,imx-audio-spdif";</div><div class='add'>+		model = "imx-spdif";</div><div class='add'>+		spdif-controller = &lt;&amp;spdif0&gt;;</div><div class='add'>+		spdif-in;</div><div class='add'>+		spdif-out;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	touchscreen: touchscreen {</div><div class='ctx'> 		compatible = "toradex,vf50-touchscreen";</div><div class='hunk'>@@ -227,6 +255,10 @@</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;asrc0 {</div><div class='add'>+	fsl,asrc-rate = &lt;48000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;adc0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_adc0&gt;;</div><div class='hunk'>@@ -239,6 +271,30 @@</div><div class='ctx'> </div><div class='ctx'> /* TODO: Asynchronous Sample Rate Converter (ASRC) */</div><div class='ctx'> </div><div class='add'>+&amp;cpu_alert0 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_alert1 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_crit0 {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_crit1 {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;drc_alert0 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;drc_crit0 {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Apalis ETH1 */</div><div class='ctx'> &amp;fec1 {</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='hunk'>@@ -283,8 +339,43 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_flexcan3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-pcieb-sata";</div><div class='add'>+	fsl,refclk-pad-mode = "input";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsio_refa_clk {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_sata_refclk&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;lsio_gpio4 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsio_refb_clk {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_wifi_refclk&gt;;</div><div class='add'>+	clocks = &lt;&amp;hsio_refa_clk&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;lsio_gpio2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* TODO: Apalis HDMI1 */</div><div class='ctx'> </div><div class='add'>+&amp;gpu_alert0 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_alert1 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_crit0 {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_crit1 {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* On-module I2C */</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -294,8 +385,6 @@</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* TODO: Audio Codec */</div><div class='del'>-</div><div class='ctx'> 	/* USB3503A */</div><div class='ctx'> 	usb-hub@8 {</div><div class='ctx'> 		compatible = "smsc,usb3503a";</div><div class='hunk'>@@ -308,6 +397,24 @@</div><div class='ctx'> 		refclk-frequency = &lt;25000000&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;lsio_gpio1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='add'>+	</div><div class='add'>+	/* On Module Audio Codec */</div><div class='add'>+	sgtl5000: audio-codec@a {</div><div class='add'>+		compatible = "fsl,sgtl5000";</div><div class='add'>+		reg = &lt;0x0a&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+				  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sgtl5000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		VDDA-supply = &lt;&amp;reg_module_3v3_avdd&gt;;</div><div class='add'>+		VDDD-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_module_3v3&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Apalis I2C1 */</div><div class='hunk'>@@ -426,7 +533,10 @@</div><div class='ctx'> 			  "MXM3_112",</div><div class='ctx'> 			  "MXM3_118",</div><div class='ctx'> 			  "MXM3_114",</div><div class='del'>-			  "MXM3_116";</div><div class='add'>+			  "MXM3_116",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "MXM3_26";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lsio_gpio1 {</div><div class='hunk'>@@ -498,15 +608,6 @@</div><div class='ctx'> 			  "MXM3_183",</div><div class='ctx'> 			  "MXM3_185",</div><div class='ctx'> 			  "MXM3_187";</div><div class='del'>-</div><div class='del'>-	pcie-wifi-hog {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_pcie_wifi_refclk&gt;;</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		line-name = "PCIE_WIFI_CLK";</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lsio_gpio3 {</div><div class='hunk'>@@ -572,16 +673,6 @@</div><div class='ctx'> 			  "MXM3_291",</div><div class='ctx'> 			  "MXM3_289",</div><div class='ctx'> 			  "MXM3_287";</div><div class='del'>-</div><div class='del'>-	/* Enable pcie root / sata ref clock unconditionally */</div><div class='del'>-	pcie-sata-hog {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_pcie_sata_refclk&gt;;</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		line-name = "PCIE_SATA_CLK";</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lsio_gpio5 {</div><div class='hunk'>@@ -683,25 +774,89 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis PCIE1 */</div><div class='add'>+/* Apalis PCIE1 */</div><div class='add'>+&amp;pciea {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_reset_moci&gt;;</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio0 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcie_switch&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: On-module Wi-Fi */</div><div class='add'>+/* On-module Wi-Fi */</div><div class='add'>+&amp;pcieb {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;, &lt;&amp;pinctrl_wifi&gt;;</div><div class='add'>+	phys = &lt;&amp;hsio_phy 1 PHY_TYPE_PCIE 1&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis BKL1_PWM */</div><div class='add'>+&amp;phyx2_lpcg {</div><div class='add'>+	clocks = &lt;&amp;hsio_refa_clk&gt;, &lt;&amp;hsio_refb_clk&gt;,</div><div class='add'>+		 &lt;&amp;hsio_refa_clk&gt;, &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis DAP1 */</div><div class='add'>+/* TODO: Apalis BKL1_PWM */</div><div class='ctx'> </div><div class='del'>-/* TODO: Analogue Audio */</div><div class='add'>+/* Apalis DAP1 */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai1_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SATA1 */</div><div class='add'>+/* Apalis HDMI Audio */</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	assigned-clocks = &lt;&amp;acm IMX_ADMA_ACM_SAI5_MCLK_SEL&gt;,</div><div class='add'>+			  &lt;&amp;acm IMX_ADMA_ACM_AUD_CLK1_SEL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai5_lpcg 0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aud_pll_div0_lpcg 0&gt;, &lt;&amp;aud_rec1_lpcg 0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;0&gt;, &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;,</div><div class='add'>+			       &lt;722534400&gt;, &lt;45158400&gt;, &lt;11289600&gt;, &lt;49152000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis SPDIF1 */</div><div class='add'>+/* Apalis SPDIF1 */</div><div class='add'>+&amp;spdif0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spdif0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* TODO: Thermal Zones */</div><div class='ctx'> </div><div class='ctx'> /* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */</div><div class='ctx'> </div><div class='del'>-/* TODO: Apalis USBH4 */</div><div class='add'>+/* Apalis USBH4 */</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg3_cdns3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* Apalis USBO1 */</div><div class='ctx'> &amp;usbphy1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi<br/>index ff5df0fed9e9..c32a6947ae9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi</a></div><div class='hunk'>@@ -165,7 +165,7 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	esai0: esai@59010000 {</div><div class='del'>-		compatible = "fsl,imx8qm-esai";</div><div class='add'>+		compatible = "fsl,imx8qm-esai", "fsl,imx6ull-esai";</div><div class='ctx'> 		reg = &lt;0x59010000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;esai0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='hunk'>@@ -431,22 +431,19 @@ audio_subsys: bus@59000000 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dsp: dsp@596e8000 {</div><div class='del'>-		compatible = "fsl,imx8qxp-dsp";</div><div class='add'>+		compatible = "fsl,imx8qxp-hifi4";</div><div class='ctx'> 		reg = &lt;0x596e8000 0x88000&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;dsp_lpcg IMX_LPCG_CLK_5&gt;,</div><div class='ctx'> 			 &lt;&amp;dsp_ram_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='ctx'> 			 &lt;&amp;dsp_lpcg IMX_LPCG_CLK_7&gt;;</div><div class='ctx'> 		clock-names = "ipg", "ocram", "core";</div><div class='del'>-		power-domains = &lt;&amp;pd IMX_SC_R_MU_13A&gt;,</div><div class='del'>-			&lt;&amp;pd IMX_SC_R_MU_13B&gt;,</div><div class='del'>-			&lt;&amp;pd IMX_SC_R_DSP&gt;,</div><div class='del'>-			&lt;&amp;pd IMX_SC_R_DSP_RAM&gt;;</div><div class='del'>-		mbox-names = "txdb0", "txdb1",</div><div class='del'>-			"rxdb0", "rxdb1";</div><div class='del'>-		mboxes = &lt;&amp;lsio_mu13 2 0&gt;,</div><div class='del'>-			&lt;&amp;lsio_mu13 2 1&gt;,</div><div class='del'>-			&lt;&amp;lsio_mu13 3 0&gt;,</div><div class='del'>-			&lt;&amp;lsio_mu13 3 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_MU_13B&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_MU_2A&gt;;</div><div class='add'>+		mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+		mboxes = &lt;&amp;lsio_mu13 0 0&gt;,</div><div class='add'>+			 &lt;&amp;lsio_mu13 1 0&gt;,</div><div class='add'>+			 &lt;&amp;lsio_mu13 3 0&gt;;</div><div class='add'>+		firmware-name = "imx/dsp/hifi4.bin";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi<br/>index a4a10ce03bfe..ce6ef160fd55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi</a></div><div class='hunk'>@@ -350,7 +350,7 @@ conn_subsys: bus@5b000000 {</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_NAND&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gpmi: nand-controller@5b812000{</div><div class='add'>+	gpmi: nand-controller@5b812000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-gpmi-nand";</div><div class='ctx'> 		reg = &lt;0x5b812000 0x2000&gt;, &lt;0x5b814000 0x2000&gt;;</div><div class='ctx'> 		reg-names = "gpmi-nand", "bch";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi<br/>new file mode 100644<br/>index 000000000000..469de8b536b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *</div><div class='add'>+ * Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+</div><div class='add'>+hsio_axi_clk: clock-hsio-axi {</div><div class='add'>+	compatible = "fixed-clock";</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000000&gt;;</div><div class='add'>+	clock-output-names = "hsio_axi_clk";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+hsio_per_clk: clock-hsio-per {</div><div class='add'>+	compatible = "fixed-clock";</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;133333333&gt;;</div><div class='add'>+	clock-output-names = "hsio_per_clk";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+hsio_refa_clk: clock-hsio-refa {</div><div class='add'>+	compatible = "gpio-gate-clock";</div><div class='add'>+	clocks = &lt;&amp;xtal100m&gt;;</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;lsio_gpio4 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+hsio_refb_clk: clock-hsio-refb {</div><div class='add'>+	compatible = "gpio-gate-clock";</div><div class='add'>+	clocks = &lt;&amp;xtal100m&gt;;</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;lsio_gpio4 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+xtal100m: clock-xtal100m {</div><div class='add'>+	compatible = "fixed-clock";</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	clock-output-names = "xtal_100MHz";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+hsio_subsys: bus@5f000000 {</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+	ranges = &lt;0x5f000000 0x0 0x5f000000 0x01000000&gt;,</div><div class='add'>+		 &lt;0x80000000 0x0 0x70000000 0x10000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	dma-ranges = &lt;0x80000000 0 0x80000000 0x80000000&gt;;</div><div class='add'>+</div><div class='add'>+	pcieb: pcie@5f010000 {</div><div class='add'>+		compatible = "fsl,imx8q-pcie";</div><div class='add'>+		reg = &lt;0x5f010000 0x10000&gt;,</div><div class='add'>+		      &lt;0x8ff00000 0x80000&gt;;</div><div class='add'>+		reg-names = "dbi", "config";</div><div class='add'>+		ranges = &lt;0x81000000 0 0x00000000 0x8ff80000 0 0x00010000&gt;,</div><div class='add'>+			 &lt;0x82000000 0 0x80000000 0x80000000 0 0x0ff00000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi", "dma";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		clocks = &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_6&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-names = "dbi", "mstr", "slv";</div><div class='add'>+		bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		num-viewport = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_B&gt;;</div><div class='add'>+		fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcieb_ep: pcie-ep@5f010000 {</div><div class='add'>+		compatible = "fsl,imx8q-pcie-ep";</div><div class='add'>+		reg = &lt;0x5f010000 0x00010000&gt;,</div><div class='add'>+		      &lt;0x80000000 0x10000000&gt;;</div><div class='add'>+		reg-names = "dbi", "addr_space";</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "dma";</div><div class='add'>+		clocks = &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_6&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-names = "dbi", "mstr", "slv";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_B&gt;;</div><div class='add'>+		fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-ib-windows = &lt;6&gt;;</div><div class='add'>+		num-ob-windows = &lt;6&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcieb_lpcg: clock-controller@5f060000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f060000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_axi_clk&gt;, &lt;&amp;hsio_axi_clk&gt;, &lt;&amp;hsio_axi_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;, &lt;IMX_LPCG_CLK_5&gt;, &lt;IMX_LPCG_CLK_6&gt;;</div><div class='add'>+		clock-output-names = "hsio_pcieb_mstr_axi_clk",</div><div class='add'>+				     "hsio_pcieb_slv_axi_clk",</div><div class='add'>+				     "hsio_pcieb_dbi_axi_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_B&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phyx1_crr1_lpcg: clock-controller@5f0b0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0b0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx1_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcieb_crr3_lpcg: clock-controller@5f0d0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0d0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_pcieb_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_B&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	misc_crr5_lpcg: clock-controller@5f0f0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0f0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_misc_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_HSIO_GPIO&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi<br/>index d39242c1b9f7..2cf0f7208350 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi</a></div><div class='hunk'>@@ -10,12 +10,264 @@ img_ipg_clk: clock-img-ipg {</div><div class='ctx'> 	clock-output-names = "img_ipg_clk";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+img_pxl_clk: clock-img-pxl {</div><div class='add'>+	compatible = "fixed-clock";</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;600000000&gt;;</div><div class='add'>+	clock-output-names = "img_pxl_clk";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> img_subsys: bus@58000000 {</div><div class='ctx'> 	compatible = "simple-bus";</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> 	ranges = &lt;0x58000000 0x0 0x58000000 0x1000000&gt;;</div><div class='ctx'> </div><div class='add'>+	isi: isi@58100000 {</div><div class='add'>+		reg = &lt;0x58100000 0x80000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;pdma0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma2_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma3_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma4_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma5_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma6_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;pdma7_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "per0", "per1", "per2", "per3",</div><div class='add'>+			      "per4", "per5", "per6", "per7";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH1&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH2&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH3&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH4&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH5&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH6&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_ISI_CH7&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	irqsteer_csi0: irqsteer@58220000 {</div><div class='add'>+		compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";</div><div class='add'>+		reg = &lt;0x58220000 0x1000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_ipg_clk&gt;;</div><div class='add'>+		clock-names = "ipg";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_0&gt;;</div><div class='add'>+		fsl,channel = &lt;0&gt;;</div><div class='add'>+		fsl,num-irqs = &lt;32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio0_mipi_csi0: gpio@58222000 {</div><div class='add'>+		compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";</div><div class='add'>+		reg = &lt;0x58222000 0x1000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;irqsteer_csi0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi0_core_lpcg: clock-controller@58223018 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58223018 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "csi0_lpcg_core_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi0_esc_lpcg: clock-controller@5822301c {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5822301c 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_0 IMX_SC_PM_CLK_MISC&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "csi0_lpcg_esc_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_mipi_csi0: i2c@58226000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+		reg = &lt;0x58226000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;8&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_0_I2C_0 IMX_SC_PM_CLK_PER&gt;,</div><div class='add'>+			 &lt;&amp;img_ipg_clk&gt;;</div><div class='add'>+		clock-names = "per", "ipg";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_CSI_0_I2C_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;irqsteer_csi0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_0_I2C_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi_csi_0: csi@58227000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-mipi-csi2";</div><div class='add'>+		reg = &lt;0x58227000 0x1000&gt;,</div><div class='add'>+		      &lt;0x58221000 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;csi0_core_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;csi0_esc_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;csi0_pxl_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "core", "esc", "ui";</div><div class='add'>+		assigned-clocks = &lt;&amp;csi0_core_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+				  &lt;&amp;csi0_esc_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;360000000&gt;, &lt;72000000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+		resets = &lt;&amp;scu_reset IMX_SC_R_CSI_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	irqsteer_csi1: irqsteer@58240000 {</div><div class='add'>+		compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";</div><div class='add'>+		reg = &lt;0x58240000 0x1000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_ipg_clk&gt;;</div><div class='add'>+		clock-names = "ipg";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_1&gt;;</div><div class='add'>+		fsl,channel = &lt;0&gt;;</div><div class='add'>+		fsl,num-irqs = &lt;32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio0_mipi_csi1: gpio@58242000 {</div><div class='add'>+		compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";</div><div class='add'>+		reg = &lt;0x58242000 0x1000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;irqsteer_csi1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi1_core_lpcg: clock-controller@58243018 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58243018 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_1 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "csi1_lpcg_core_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi1_esc_lpcg: clock-controller@5824301c {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5824301c 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_1 IMX_SC_PM_CLK_MISC&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "csi1_lpcg_esc_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_mipi_csi1: i2c@58246000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+		reg = &lt;0x58246000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;8&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_CSI_1_I2C_0 IMX_SC_PM_CLK_PER&gt;,</div><div class='add'>+			 &lt;&amp;img_ipg_clk&gt;;</div><div class='add'>+		clock-names = "per", "ipg";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_CSI_1_I2C_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;irqsteer_csi1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_1_I2C_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi_csi_1: csi@58247000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-mipi-csi2";</div><div class='add'>+		reg = &lt;0x58247000 0x1000&gt;,</div><div class='add'>+		      &lt;0x58241000 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;csi1_core_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;csi1_esc_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;csi1_pxl_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "core", "esc", "ui";</div><div class='add'>+		assigned-clocks = &lt;&amp;csi1_core_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+				  &lt;&amp;csi1_esc_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;360000000&gt;, &lt;72000000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+		resets = &lt;&amp;scu_reset IMX_SC_R_CSI_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	irqsteer_parallel: irqsteer@58260000 {</div><div class='add'>+		compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";</div><div class='add'>+		reg = &lt;0x58260000 0x1000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_dummy&gt;;</div><div class='add'>+		clock-names = "ipg";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PI_0&gt;;</div><div class='add'>+		fsl,channel = &lt;0&gt;;</div><div class='add'>+		fsl,num-irqs = &lt;32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pi0_ipg_lpcg: clock-controller@58263004 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58263004 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "pi0_lpcg_ipg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pi0_pxl_lpcg: clock-controller@58263018 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58263018 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pi0_lpcg_pxl_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pi0_misc_lpcg: clock-controller@5826301c {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5826301c 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_MISC0&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pi0_lpcg_misc_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_parallel: i2c@58266000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+		reg = &lt;0x58266000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;8&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX_SC_R_PI_0_I2C_0 IMX_SC_PM_CLK_PER&gt;,</div><div class='add'>+			 &lt;&amp;img_ipg_clk&gt;;</div><div class='add'>+		clock-names = "per", "ipg";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_PI_0_I2C_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;irqsteer_parallel&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PI_0_I2C_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	jpegdec: jpegdec@58400000 {</div><div class='ctx'> 		reg = &lt;0x58400000 0x00050000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -40,6 +292,116 @@ img_subsys: bus@58000000 {</div><div class='ctx'> 				&lt;&amp;pd IMX_SC_R_MJPEG_ENC_S0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pdma0_lpcg: clock-controller@58500000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58500000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma0_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma1_lpcg: clock-controller@58510000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58510000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma1_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma2_lpcg: clock-controller@58520000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58520000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma2_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma3_lpcg: clock-controller@58530000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58530000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma3_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma4_lpcg: clock-controller@58540000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58540000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma4_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma5_lpcg: clock-controller@58550000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58550000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma5_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma6_lpcg: clock-controller@58560000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58560000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma6_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdma7_lpcg: clock-controller@58570000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58570000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "pdma7_lpcg_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi0_pxl_lpcg: clock-controller@58580000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58580000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "csi0_lpcg_pxl_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi1_pxl_lpcg: clock-controller@58590000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x58590000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "csi1_lpcg_pxl_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CSI_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_rx_pxl_link_lpcg: clock-controller@585a0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x585a0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;img_pxl_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-output-names = "hdmi_rx_lpcg_pxl_link_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_HDMI_RX&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	img_jpeg_dec_lpcg: clock-controller@585d0000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='ctx'> 		reg = &lt;0x585d0000 0x10000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi<br/>index d00036204a8c..dad0dc8fb431 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi</a></div><div class='hunk'>@@ -14,7 +14,7 @@ lvds0_subsys: bus@56240000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='ctx'> 		reg = &lt;0x56243000 0x4&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "mipi1_lis_lpcg_ipg_clk";</div><div class='add'>+		clock-output-names = "lvds0_lis_lpcg_ipg_clk";</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_MIPI_1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -22,9 +22,9 @@ lvds0_subsys: bus@56240000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='ctx'> 		reg = &lt;0x5624300c 0x4&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "mipi1_pwm_lpcg_clk",</div><div class='del'>-				     "mipi1_pwm_lpcg_ipg_clk",</div><div class='del'>-				     "mipi1_pwm_lpcg_32k_clk";</div><div class='add'>+		clock-output-names = "lvds0_pwm_lpcg_clk",</div><div class='add'>+				     "lvds0_pwm_lpcg_ipg_clk",</div><div class='add'>+				     "lvds0_pwm_lpcg_32k_clk";</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_MIPI_1_PWM_0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -32,8 +32,8 @@ lvds0_subsys: bus@56240000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='ctx'> 		reg = &lt;0x56243010 0x4&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "mipi1_i2c0_lpcg_clk",</div><div class='del'>-				     "mipi1_i2c0_lpcg_ipg_clk";</div><div class='add'>+		clock-output-names = "lvds0_i2c0_lpcg_clk",</div><div class='add'>+				     "lvds0_i2c0_lpcg_ipg_clk";</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_MIPI_1_I2C_0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi<br/>new file mode 100644<br/>index 000000000000..3e04142aca5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-security.dtsi</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2019 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+</div><div class='add'>+security_subsys: bus@31400000 {</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges = &lt;0x31400000 0x0 0x31400000 0x90000&gt;;</div><div class='add'>+</div><div class='add'>+	crypto: crypto@31400000 {</div><div class='add'>+		compatible = "fsl,imx8qm-caam", "fsl,sec-v4.0";</div><div class='add'>+		reg = &lt;0x31400000 0x90000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0x31400000 0x90000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_CAAM_JR2&gt;;</div><div class='add'>+		fsl,sec-era = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+		sec_jr2: jr@30000 {</div><div class='add'>+			compatible = "fsl,imx8qm-job-ring", "fsl,sec-v4.0-job-ring";</div><div class='add'>+			reg = &lt;0x30000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd IMX_SC_R_CAAM_JR2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sec_jr3: jr@40000 {</div><div class='add'>+			compatible = "fsl,imx8qm-job-ring", "fsl,sec-v4.0-job-ring";</div><div class='add'>+			reg = &lt;0x40000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;pd IMX_SC_R_CAAM_JR3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi<br/>index c6540768bdb9..87211c18d65a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi</a></div><div class='hunk'>@@ -15,7 +15,7 @@ vpu: vpu@2c000000 {</div><div class='ctx'> 	mu_m0: mailbox@2d000000 {</div><div class='ctx'> 		compatible = "fsl,imx6sx-mu";</div><div class='ctx'> 		reg = &lt;0x2d000000 0x20000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_VPU_MU_0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -24,7 +24,7 @@ vpu: vpu@2c000000 {</div><div class='ctx'> 	mu1_m0: mailbox@2d020000 {</div><div class='ctx'> 		compatible = "fsl,imx6sx-mu";</div><div class='ctx'> 		reg = &lt;0x2d020000 0x20000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;pd IMX_SC_R_VPU_MU_1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts<br/>index 4caaecc19227..25a77cac6f0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxl-evk.dts</a></div><div class='hunk'>@@ -182,6 +182,42 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_pcieb: regulator-pcieb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "reg_pcieb";</div><div class='add'>+		gpio = &lt;&amp;pca6416_1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_5v: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	bt_sco_codec: audio-codec-bt {</div><div class='ctx'> 		compatible = "linux,bt-sco";</div><div class='ctx'> 		#sound-dai-cells = &lt;1&gt;;</div><div class='hunk'>@@ -411,6 +447,11 @@</div><div class='ctx'> 				wlf,shared-lrclk;</div><div class='ctx'> 				wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='ctx'> 				wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -435,6 +476,11 @@</div><div class='ctx'> 				wlf,shared-lrclk;</div><div class='ctx'> 				wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='ctx'> 				wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -459,6 +505,11 @@</div><div class='ctx'> 				wlf,shared-lrclk;</div><div class='ctx'> 				wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='ctx'> 				wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -567,6 +618,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-x2-pcieb";</div><div class='add'>+	fsl,refclk-pad-mode = "output";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cm40_intmux {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='hunk'>@@ -585,6 +642,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcieb&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcieb&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sai0&gt;;</div><div class='hunk'>@@ -868,6 +945,14 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pcieb: pcieagrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x06000021</div><div class='add'>+			IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x06000021</div><div class='add'>+			IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x04000021</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_sai0: sai0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8DXL_SPI0_CS0_ADMA_SAI0_RXD		0x06000060</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi<br/>index 1e02b04494e9..a66ba6d0a8c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;enet1_lpcg;</div><div class='ctx'> /delete-node/ &amp;fec2;</div><div class='add'>+/delete-node/ &amp;usbotg3;</div><div class='add'>+/delete-node/ &amp;usb3_phy;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	conn_enet0_root_clk: clock-conn-enet0-root {</div><div class='hunk'>@@ -138,6 +140,10 @@</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	compatible = "fsl,imx8dxl-usbphy", "fsl,imx7ulp-usbphy";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc1 {</div><div class='ctx'> 	compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc";</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi<br/>new file mode 100644<br/>index 000000000000..ec466e4d7df5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxl-ss-hsio.dtsi</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;hsio_subsys {</div><div class='add'>+	phyx1_lpcg: clock-controller@5f090000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f090000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_refb_clk&gt;, &lt;&amp;hsio_per_clk&gt;,</div><div class='add'>+			 &lt;&amp;hsio_per_clk&gt;, &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_1&gt;,</div><div class='add'>+				&lt;IMX_LPCG_CLK_2&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx1_pclk",</div><div class='add'>+				     "hsio_phyx1_epcs_tx_clk",</div><div class='add'>+				     "hsio_phyx1_epcs_rx_clk",</div><div class='add'>+				     "hsio_phyx1_apb_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsio_phy: phy@5f1a0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-hsio";</div><div class='add'>+		reg = &lt;0x5f1a0000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f120000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f140000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f160000 0x10000&gt;;</div><div class='add'>+		reg-names = "reg", "phy", "ctrl", "misc";</div><div class='add'>+		clocks = &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_crr1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_crr3_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;misc_crr5_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-names = "pclk0", "apb_pclk0", "phy0_crr", "ctl0_crr",</div><div class='add'>+			      "misc_crr";</div><div class='add'>+		#phy-cells = &lt;3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0: pcie@5f010000 {</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi";</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_ep: pcie-ep@5f010000 {</div><div class='add'>+		interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "dma";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi<br/>index 7e54cf202858..8d60827822ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxl.dtsi</a></div><div class='hunk'>@@ -30,6 +30,10 @@</div><div class='ctx'> 		gpio6 = &amp;lsio_gpio6;</div><div class='ctx'> 		gpio7 = &amp;lsio_gpio7;</div><div class='ctx'> 		mu1 = &amp;lsio_mu1;</div><div class='add'>+		spi0 = &amp;lpspi0;</div><div class='add'>+		spi1 = &amp;lpspi1;</div><div class='add'>+		spi2 = &amp;lpspi2;</div><div class='add'>+		spi3 = &amp;lpspi3;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus: cpus {</div><div class='hunk'>@@ -88,6 +92,7 @@</div><div class='ctx'> 		compatible = "arm,gic-v3";</div><div class='ctx'> 		reg = &lt;0x0 0x51a00000 0 0x10000&gt;, /* GIC Dist */</div><div class='ctx'> 		      &lt;0x0 0x51b00000 0 0xc0000&gt;; /* GICR (RD_base + SGI_base) */</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -237,12 +242,14 @@</div><div class='ctx'> 	#include "imx8-ss-conn.dtsi"</div><div class='ctx'> 	#include "imx8-ss-ddr.dtsi"</div><div class='ctx'> 	#include "imx8-ss-lsio.dtsi"</div><div class='add'>+	#include "imx8-ss-hsio.dtsi"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #include "imx8dxl-ss-adma.dtsi"</div><div class='ctx'> #include "imx8dxl-ss-conn.dtsi"</div><div class='ctx'> #include "imx8dxl-ss-lsio.dtsi"</div><div class='ctx'> #include "imx8dxl-ss-ddr.dtsi"</div><div class='add'>+#include "imx8dxl-ss-hsio.dtsi"</div><div class='ctx'> </div><div class='ctx'> &amp;cm40_intmux {</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts b/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts<br/>new file mode 100644<br/>index 000000000000..331787df2fe4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps-mb-smarc-2.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8dxp-tqma8xdps.dtsi"</div><div class='add'>+#include "tqma8xxs-mb-smarc-2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems i.MX8DXP TQMa8XDPS on MB-SMARC-2";</div><div class='add'>+	compatible = "tq,imx8dxp-tqma8xdps-mb-smarc-2", "tq,imx8dxp-tqma8xdps", "fsl,imx8dxp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi b/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi<br/>new file mode 100644<br/>index 000000000000..a97286fe7e0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdps.dtsi</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8dxp.dtsi"</div><div class='add'>+#include "tqma8xxs.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems i.MX8DXP TQMa8XDPS";</div><div class='add'>+	compatible = "tq,imx8dxp-tqma8xdps", "fsl,imx8dxp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmic0_thermal {</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			cooling-device =</div><div class='add'>+				&lt;&amp;A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts<br/>index 97ff1ddd6318..734a75198f06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts</a></div><div class='hunk'>@@ -124,6 +124,7 @@</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;24576000&gt;;</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi<br/>index 62ed64663f49..8287a7f66ed3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi</a></div><div class='hunk'>@@ -78,6 +78,9 @@</div><div class='ctx'> 		ethphy0: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+			interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -233,6 +236,12 @@</div><div class='ctx'> 	rtc: rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf85263";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+		wakeup-source;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -269,7 +278,7 @@</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;usdhc1_pwrseq&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -285,6 +294,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -314,6 +325,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC	0x91</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10             0x146</div><div class='ctx'> 			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22	0x19</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -349,6 +361,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x146</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts b/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts<br/>index 7d2cb74c64ee..87fe3ebedb8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-emtop-baseboard.dts</a></div><div class='hunk'>@@ -1,6 +1,9 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2023 Emtop Embedded Solutions</div><div class='add'>+ *</div><div class='add'>+ * Author: Himanshu Bhavani &lt;himanshu.bhavani@siliconsignals.io&gt;</div><div class='add'>+ * Author: Tarang Raval &lt;tarang.raval@siliconsignals.io&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -11,6 +14,113 @@</div><div class='ctx'> 	model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1";</div><div class='ctx'> 	compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",</div><div class='ctx'> 		"fsl,imx8mm";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+		label = "USB-C";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb_otg&gt;;</div><div class='add'>+		id-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			high_speed_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_hs_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+		        label = "buzzer";</div><div class='add'>+		        gpios = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		        default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc_can: clock-osc-can {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;16000000&gt;;</div><div class='add'>+		clock-output-names = "osc-can";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio: regulator-audio {</div><div class='add'>+	        compatible = "regulator-fixed";</div><div class='add'>+	        regulator-name = "wm8904_supply";</div><div class='add'>+	        regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_wifi_vmmc: regulator-wifi-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmmc";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+		off-on-delay-us = &lt;20000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8904 {</div><div class='add'>+	        compatible = "simple-audio-card";</div><div class='add'>+	        simple-audio-card,bitclock-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+	        simple-audio-card,format = "i2s";</div><div class='add'>+	        simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+	        simple-audio-card,name = "wm8904-audio";</div><div class='add'>+	        simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+	        simple-audio-card,routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"IN2L", "Line In Jack",</div><div class='add'>+			"IN2R", "Line In Jack",</div><div class='add'>+			"Headphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Headphone Jack";</div><div class='add'>+</div><div class='add'>+	        simple-audio-card,widgets =</div><div class='add'>+	                "Microphone","Headphone Jack",</div><div class='add'>+	                "Headphone", "Headphone Jack",</div><div class='add'>+	                "Line", "Line In Jack";</div><div class='add'>+</div><div class='add'>+	        dailink_master: simple-audio-card,codec {</div><div class='add'>+	                sound-dai = &lt;&amp;wm8904&gt;;</div><div class='add'>+	        };</div><div class='add'>+</div><div class='add'>+	        simple-audio-card,cpu {</div><div class='add'>+	                sound-dai = &lt;&amp;sai3&gt;;</div><div class='add'>+	        };</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-spdif {</div><div class='add'>+	        compatible = "fsl,imx-audio-spdif";</div><div class='add'>+	        model = "imx-spdif";</div><div class='add'>+	        spdif-controller = &lt;&amp;spdif1&gt;;</div><div class='add'>+	        spdif-out;</div><div class='add'>+	        spdif-in;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN BUS */</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+        status = "okay";</div><div class='add'>+</div><div class='add'>+        can: can@0 {</div><div class='add'>+                compatible = "microchip,mcp2515";</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;pinctrl_canbus&gt;;</div><div class='add'>+                clocks = &lt;&amp;osc_can&gt;;</div><div class='add'>+                interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+                interrupts = &lt;14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+        };</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;fec1 {</div><div class='hunk'>@@ -40,7 +150,135 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8904: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8904";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX8MM_CLK_SAI3_ROOT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@32 {</div><div class='add'>+		compatible = "epson,rx8025";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AUDIO */</div><div class='add'>+&amp;sai3 {</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+        assigned-clocks = &lt;&amp;clk IMX8MM_CLK_SAI3&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;24576000&gt;;</div><div class='add'>+        status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spdif1 {</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_spdif1&gt;;</div><div class='add'>+        assigned-clocks = &lt;&amp;clk IMX8MM_CLK_SPDIF1&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;24576000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MM_CLK_AUDIO_AHB&gt;, &lt;&amp;clk IMX8MM_CLK_24M&gt;,</div><div class='add'>+                &lt;&amp;clk IMX8MM_CLK_SPDIF1&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+                &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+                &lt;&amp;clk IMX8MM_CLK_AUDIO_AHB&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+                &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+                &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;, &lt;&amp;clk IMX8MM_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+        clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",</div><div class='add'>+                "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";</div><div class='add'>+        status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USBOTG */</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb_hs_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;high_speed_ep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+        dr_mode = "host";</div><div class='add'>+        status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wifi */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_wifi_vmmc&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD-card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+        pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+        cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl_canbus: canbusgrp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+		        MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14              0x14</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0  		0x82</div><div class='add'>+			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82</div><div class='add'>+			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82</div><div class='add'>+			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb_otg: usbotggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10		0x140   /* otg_id */</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12		0x19    /* otg_vbus */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec1: fec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3</div><div class='hunk'>@@ -60,4 +298,101 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22                0x19</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL                  0x400001c3</div><div class='add'>+	                MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA                  0x400001c3</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC             0xd6</div><div class='add'>+	                MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK              0xd6</div><div class='add'>+	                MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK                0xd6</div><div class='add'>+	                MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0             0xd6</div><div class='add'>+	                MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0             0xd6</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spdif1: spdif1grp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT                0xd6</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x190</div><div class='add'>+			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d0</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d0</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d0</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d0</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK         	0x194</div><div class='add'>+			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD         	0x1d4</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0     	0x1d4</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1     	0x1d4</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2     	0x1d4</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3     	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK         	0x196</div><div class='add'>+			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD         	0x1d6</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0     	0x1d6</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1     	0x1d6</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2     	0x1d6</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3     	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10             0x41    /* wl_reg_on */</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9                0x41    /* wl_host_wake */</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K      0x141   /* LP0: 32KHz */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         	0x190</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         	0x1d0</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     	0x1d0</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     	0x1d0</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     	0x1d0</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     	0x1d0</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         	0x194</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         	0x1d4</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     	0x1d4</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     	0x1d4</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     	0x1d4</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     	0x1d4</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+	        fsl,pins = &lt;</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         	0x196</div><div class='add'>+	                MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         	0x1d6</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     	0x1d6</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     	0x1d6</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     	0x1d6</div><div class='add'>+	                MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     	0x1d6</div><div class='add'>+	        &gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi<br/>index 5f8336217bb8..ff7ca2075230 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi</a></div><div class='hunk'>@@ -147,6 +147,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;cpudai&gt;;</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;cpudai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Line", "Left Line Out Jack",</div><div class='ctx'> 			"Line", "Right Line Out Jack";</div><div class='hunk'>@@ -158,11 +159,11 @@</div><div class='ctx'> 			sound-dai = &lt;&amp;sai3&gt;;</div><div class='ctx'> 			dai-tdm-slot-num = &lt;2&gt;;</div><div class='ctx'> 			dai-tdm-slot-width = &lt;32&gt;;</div><div class='add'>+			system-clock-direction-out;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,codec {</div><div class='ctx'> 			sound-dai = &lt;&amp;wm8524&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX8MM_CLK_SAI3_ROOT&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -544,6 +545,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MM_CLK_PCIE1_ROOT&gt;, &lt;&amp;pcie0_refclk&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MM_CLK_PCIE1_AUX&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_PCIE1_AUX&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MM_CLK_PCIE1_CTRL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;10000000&gt;, &lt;250000000&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MM_SYS_PLL2_50M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MM_SYS_PLL2_250M&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai2 {</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -557,9 +571,17 @@</div><div class='ctx'> &amp;sai3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='del'>-	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_SAI3&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;24576000&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_AUDIO_PLL1&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MM_AUDIO_PLL2&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MM_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;393216000&gt;, &lt;361267200&gt;, &lt;24576000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MM_CLK_SAI3_IPG&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_CLK_SAI3_ROOT&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso<br/>new file mode 100644<br/>index 000000000000..324004b0eca3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-lte.dtso</a></div><div class='hunk'>@@ -0,0 +1,186 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx8mm-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		key-user {</div><div class='add'>+			label = "user";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_led_lte&gt;;</div><div class='add'>+</div><div class='add'>+		lte-led1-b {</div><div class='add'>+			label = "lte-led1-blue";</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lte-led1-g {</div><div class='add'>+			label = "lte-led1-green";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lte-led1-r {</div><div class='add'>+			label = "lte-led1-red";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lte-led2-b {</div><div class='add'>+			label = "lte-led2-blue";</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lte-led2-g {</div><div class='add'>+			label = "lte-led2-green";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lte-led2-r {</div><div class='add'>+			label = "lte-led2-red";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@2e {</div><div class='add'>+		compatible = "infineon,slb9673", "tcg,tpm-tis-i2c";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tpm&gt;;</div><div class='add'>+		reg = &lt;0x2e&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio3&gt;;</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "VDD_IO_REF", "TPM_PIRQ#",</div><div class='add'>+			  "TPM_RESET# ", "", "", "",</div><div class='add'>+			  "", "LTE_LED1_B", "LTE_LED1_G", "",</div><div class='add'>+			  "";</div><div class='add'>+</div><div class='add'>+	vdd-io-ref-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		line-name = "VDD_IO_REF";</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpm-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		line-name = "TPM_RESET#";</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+	gpio-line-names = "", "", "LTE_RESET", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "LTE_PWRKEY",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "LTE_PWR_EN";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "LTE_LED2_G", "LTE_LED1_R",</div><div class='add'>+			  "LTE_LED2_R", "LTE_LED2_B";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio3: gpio3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_NAND_DATA04_GPIO3_IO10		0x19 /* VDD_IO_REF */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2		0x19 /* LTE_RESET */</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 		0x19 /* LTE_PWRKEY */</div><div class='add'>+			MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20		0x19 /* LTE_PWR_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12		0x19 /* Pushbutton */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_led_lte: gpioledltegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_NAND_WE_B_GPIO3_IO17		0x19 /* LTE_LED1_B */</div><div class='add'>+			MX8MM_IOMUXC_NAND_WP_B_GPIO3_IO18		0x19 /* LTE_LED1_G */</div><div class='add'>+			MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23		0x19 /* LTE_LED1_R */</div><div class='add'>+			MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25		0x19 /* LTE_LED2_B */</div><div class='add'>+			MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22		0x19 /* LTE_LED2_G */</div><div class='add'>+			MX8MM_IOMUXC_UART2_RXD_GPIO5_IO24		0x19 /* LTE_LED2_R */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL			0x40000083 /* I2C_A_SCL */</div><div class='add'>+			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA			0x40000083 /* I2C_A_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm: tpmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_NAND_DATA05_GPIO3_IO11		0x19 /* TPM_PIRQ# */</div><div class='add'>+			MX8MM_IOMUXC_NAND_DATA06_GPIO3_IO12		0x39 /* TPM_RESET# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts<br/>index 33f8d7d1970e..3a166cf0afcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts</a></div><div class='hunk'>@@ -48,14 +48,6 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 5000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_rst_eth2: regulator-rst-eth2 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-name = "rst-usb-eth2";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_vdd_5v: regulator-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts<br/>index aab8e2421650..e756fe5db56b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts</a></div><div class='hunk'>@@ -25,6 +25,17 @@</div><div class='ctx'> 		clock-output-names = "osc-can";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-out {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_in_conn: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;bridge_out_conn&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -132,6 +143,86 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+</div><div class='add'>+	dsi_mux_sel_hdmi: dsi-mux-sel-hdmi-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "dsi-mux-sel";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi_mux_sel_lvds: dsi-mux-sel-lvds-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "dsi-mux-sel";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi-mux-oe-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "dsi-mux-oe";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	lvds: bridge@2c {</div><div class='add'>+		compatible = "ti,sn65dsi84";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sn65dsi84&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi: hdmi@39 {</div><div class='add'>+		compatible = "adi,adv7535";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_adv7535&gt;;</div><div class='add'>+		adi,dsi-lanes = &lt;4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		a2vdd-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		pvdd-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		v1p2-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		v3p3-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				bridge_in_dsi_hdmi: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mipi_dsi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				bridge_out_conn: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_in_conn&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -144,12 +235,29 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lcdif {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	samsung,esc-clock-frequency = &lt;54000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;bridge_in_dsi_hdmi&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwm2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;reg_nvcc_sd {</div><div class='add'>+	sd-vsel-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='hunk'>@@ -160,8 +268,16 @@</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * During bootup the CTS needs to stay LOW, which is only possible if this</div><div class='add'>+	 * pin is controlled by a GPIO. The UART IP always sets CTS to HIGH if not</div><div class='add'>+	 * running. So using 'uart-has-rtscts' is not a good choice here! There are</div><div class='add'>+	 * workarounds for this, but they introduce unnecessary complexity and are</div><div class='add'>+	 * therefore avoided here. For more information about this see:</div><div class='add'>+	 * https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=79d0224f6bf296d04cd843cfc49921b19c97bb09</div><div class='add'>+	 */</div><div class='add'>+	rts-gpios = &lt;&amp;gpio4 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	linux,rs485-enabled-at-boot-time;</div><div class='del'>-	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -207,6 +323,12 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_gpio&gt;;</div><div class='ctx'> </div><div class='add'>+	pinctrl_adv7535: adv7535grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_can: cangrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28		0x19</div><div class='hunk'>@@ -277,6 +399,20 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14		0x19</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL			0x40000083</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA			0x40000083</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c4: i2c4grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL			0x40000083</div><div class='hunk'>@@ -290,6 +426,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_sn65dsi84: sn65dsi84grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26		0x19</div><div class='add'>+			MX8MM_IOMUXC_SD2_WP_GPIO2_IO20			0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX		0x0</div><div class='hunk'>@@ -304,7 +447,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX		0x0</div><div class='ctx'> 			MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX		0x0</div><div class='ctx'> 			MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B		0x0</div><div class='del'>-			MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B		0x0</div><div class='add'>+			MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29		0x19</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -323,7 +466,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d0</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d0</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x19</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xd0</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -336,7 +479,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x19</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xd0</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -349,7 +492,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x19</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xd0</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso b/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso<br/>new file mode 100644<br/>index 000000000000..57d0739fcce3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso</a></div><div class='hunk'>@@ -0,0 +1,200 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mm-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "jenson,bl-jt60050-01a", "panel-lvds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_panel&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		data-mapping = "vesa-24";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		height-mm = &lt;86&gt;;</div><div class='add'>+		width-mm = &lt;154&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;51200000&gt;;</div><div class='add'>+			hactive = &lt;1024&gt;;</div><div class='add'>+			vactive = &lt;600&gt;;</div><div class='add'>+			hsync-len = &lt;1&gt;;</div><div class='add'>+			hfront-porch = &lt;160&gt;;</div><div class='add'>+			hback-porch = &lt;160&gt;;</div><div class='add'>+			vsync-len = &lt;1&gt;;</div><div class='add'>+			vfront-porch = &lt;12&gt;;</div><div class='add'>+			vback-porch = &lt;23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_out_bridge: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;bridge_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_mux_sel_hdmi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_mux_sel_lvds {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;bridge_in_dsi_lvds&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio3&gt;;</div><div class='add'>+</div><div class='add'>+	panel-rst-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "panel-reset";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel-stby-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "panel-standby";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel-hinv-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "panel-horizontal-invert";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel-vinv-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "panel-vertical-invert";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gt911: touchscreen@5d {</div><div class='add'>+		compatible = "goodix,gt928";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touch&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;22 8&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 23 0&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio3 22 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	st1633: touchscreen@55 {</div><div class='add'>+		compatible = "sitronix,st1633";</div><div class='add'>+		reg = &lt;0x55&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touch&gt;;</div><div class='add'>+		interrupts = &lt;22 8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio3 22 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			bridge_in_dsi_lvds: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_dsi_out&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			bridge_out_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_out_bridge&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio3: gpio3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24		0x19</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20		0x19</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21		0x19</div><div class='add'>+			MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL			0x40000083</div><div class='add'>+			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA			0x40000083</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_panel: panelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT		0x6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touch: touchgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22		0x19</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi<br/>index 663ae52b4852..96987910609f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi</a></div><div class='hunk'>@@ -30,29 +30,6 @@</div><div class='ctx'> 		stdout-path = &amp;uart3;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_vdd_carrier: regulator-vdd-carrier {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_reg_vdd_carrier&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-name = "VDD_CARRIER";</div><div class='del'>-</div><div class='del'>-		regulator-state-standby {</div><div class='del'>-			regulator-on-in-suspend;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		regulator-state-disk {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -61,7 +38,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-name = "VBUS_USB1";</div><div class='add'>+		regulator-name = "VBUS_USB_A";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_usb2_vbus: regulator-usb2-vbus {</div><div class='hunk'>@@ -72,7 +49,7 @@</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-name = "VBUS_USB2";</div><div class='add'>+		regulator-name = "VBUS_USB_B";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_usdhc2_vcc: regulator-usdhc2-vcc {</div><div class='hunk'>@@ -96,6 +73,29 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-name = "VCC_SDIO_B";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_carrier: regulator-vdd-carrier {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_vdd_carrier&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "VDD_CARRIER";</div><div class='add'>+</div><div class='add'>+		regulator-state-standby {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulator-state-disk {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;A53_0 {</div><div class='hunk'>@@ -342,6 +342,7 @@</div><div class='ctx'> 				regulator-name = "NVCC_SD (LDO5)";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				sd-vsel-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -794,7 +795,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d0 /* SDIO_A_D2 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d0 /* SDIO_A_D3 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_WP_USDHC2_WP			0x400000d6 /* SDIO_A_WP */</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x90</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000090</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -807,7 +808,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4 /* SDIO_A_D2 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4 /* SDIO_A_D3 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_WP_USDHC2_WP			0x400000d6 /* SDIO_A_WP */</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x90</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000090</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -820,7 +821,7 @@</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6 /* SDIO_A_D2 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6 /* SDIO_A_D3 */</div><div class='ctx'> 			MX8MM_IOMUXC_SD2_WP_USDHC2_WP			0x400000d6 /* SDIO_A_WP */</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x90</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x40000090</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phg.dts b/arch/arm64/boot/dts/freescale/imx8mm-phg.dts<br/>index 75bbedc6164c..a134b1833649 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phg.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phg.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phg.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phg.dts</a></div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	panel {</div><div class='del'>-		compatible = "panel-lvds";</div><div class='add'>+		compatible = "auo,g084sn05", "panel-lvds";</div><div class='ctx'> 		width-mm = &lt;170&gt;;</div><div class='ctx'> 		height-mm = &lt;28&gt;;</div><div class='ctx'> 		data-mapping = "jeida-18";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso<br/>new file mode 100644<br/>index 000000000000..79e4c3710ac3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Teresa Remmet &lt;t.remmet@phytec.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mm-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lcd&gt;;</div><div class='add'>+		default-brightness-level = &lt;6&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 50000 0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vdd_3v3_s&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "edt,etml1010g3dra";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;bridge_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sound_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_1V8_Audio";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sound_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3_Analog";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-peb-av-10 {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "snd-peb-av-10";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;32&gt;;</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Line", "Line In",</div><div class='add'>+			"Speaker", "Speaker",</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Headphone", "Headphone Jack";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Speaker", "SPOP",</div><div class='add'>+			"Speaker", "SPOM",</div><div class='add'>+			"Headphone Jack", "HPLOUT",</div><div class='add'>+			"Headphone Jack", "HPROUT",</div><div class='add'>+			"LINE1L", "Line In",</div><div class='add'>+			"LINE1R", "Line In",</div><div class='add'>+			"MIC3R", "Microphone Jack",</div><div class='add'>+			"Microphone Jack", "Mic Bias";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dailink_master: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;codec&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX8MM_CLK_SAI5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	codec: codec@18 {</div><div class='add'>+		compatible = "ti,tlv320aic3007";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tlv320&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		ai3x-gpio-func = &lt;0xd 0x0&gt;;</div><div class='add'>+		ai3x-micbias-vg = &lt;2&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		IOVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		DRVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_sound_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_3v3_s&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@5f {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		reg = &lt;0x5f&gt;;</div><div class='add'>+		size = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_3v3_s&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	samsung,esc-clock-frequency = &lt;10000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;bridge_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_SAI5&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MM_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;11289600&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MM_CLK_SAI5_IPG&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_CLK_SAI5_ROOT&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MM_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k",</div><div class='add'>+			"pll11k";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sn65dsi83 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			bridge_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			bridge_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+				ti,lvds-vod-swing-clock-microvolt = &lt;200000 600000&gt;;</div><div class='add'>+				ti,lvds-vod-swing-data-microvolt = &lt;200000 600000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c2</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA          0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x1e2</div><div class='add'>+			MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+	pinctrl_lcd: lcd0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1		0x12</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT		0x12</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai5: sai5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK        0xd6</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0    0xd6</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC     0xd6</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK     0xd6</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0    0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tlv320: tlv320grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28       0x16</div><div class='add'>+			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20        0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso<br/>new file mode 100644<br/>index 000000000000..a28f51ece93b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-eval-01.dtso</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Janine Hagemann &lt;j.hagemann@phytec.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include "imx8mm-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		button-0 {</div><div class='add'>+			label = "home";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-1 {</div><div class='add'>+			label = "menu";</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	user-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_user_leds&gt;;</div><div class='add'>+</div><div class='add'>+		user-led1 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user-led2 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user-led3 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio_keys: gpio_keysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17	0x16</div><div class='add'>+			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_user_leds: user_ledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15	0x16</div><div class='add'>+			MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28	0x16</div><div class='add'>+			MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14	0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts<br/>index 5eacbd9611ee..be470cfb03d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts</a></div><div class='hunk'>@@ -219,9 +219,15 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* RTC */</div><div class='ctx'> &amp;rv3028 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	aux-voltage-chargeable = &lt;1&gt;;</div><div class='ctx'> 	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+	wakeup-source;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;snvs_pwrkey {</div><div class='hunk'>@@ -255,11 +261,12 @@</div><div class='ctx'> 		device-wakeup-gpios = &lt;&amp;gpio2 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		interrupt-names = "host-wakeup";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;9 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		max-speed = &lt;2000000&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_bt&gt;;</div><div class='ctx'> 		shutdown-gpios = &lt;&amp;gpio2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='ctx'> 		vddio-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -332,7 +339,7 @@</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6	0x00</div><div class='ctx'> 			MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8	0x00</div><div class='del'>-			MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9	0x00</div><div class='add'>+			MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9	0x140</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -408,6 +415,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_tpm: tpmgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11      0x140</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso<br/>new file mode 100644<br/>index 000000000000..0fb4b6da6c10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phycore-no-eth.dtso</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Teresa Remmet &lt;t.remmet@phytec.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;ethphy0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso<br/>new file mode 100644<br/>index 000000000000..7bfc366c1689<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phycore-no-spiflash.dtso</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Teresa Remmet &lt;t.remmet@phytec.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;flexspi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;som_flash {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso<br/>new file mode 100644<br/>index 000000000000..43d5905f3d72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Dominik Haller &lt;d.haller@phytec.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		m4_reserved: m4@80000000 {</div><div class='add'>+			reg = &lt;0 0x80000000 0 0x1000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring0: vdev0vring0@b8000000 {</div><div class='add'>+			reg = &lt;0 0xb8000000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: vdev0vring1@b8008000 {</div><div class='add'>+			reg = &lt;0 0xb8008000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rsc_table: rsc_table@b80ff000 {</div><div class='add'>+			reg = &lt;0 0xb80ff000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdevbuffer: vdevbuffer@b8400000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0xb8400000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	core-m4 {</div><div class='add'>+		compatible = "fsl,imx8mm-cm4";</div><div class='add'>+		clocks = &lt;&amp;clk IMX8MM_CLK_M4_DIV&gt;;</div><div class='add'>+		mboxes = &lt;&amp;mu 0 1</div><div class='add'>+			&amp;mu 1 1</div><div class='add'>+			&amp;mu 3 1&gt;;</div><div class='add'>+		mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+		memory-region = &lt;&amp;vdevbuffer&gt;, &lt;&amp;vdev0vring0&gt;, &lt;&amp;vdev0vring1&gt;, &lt;&amp;rsc_table&gt;;</div><div class='add'>+		syscon = &lt;&amp;src&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi<br/>index 6069678244f3..921a7f58fd41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi</a></div><div class='hunk'>@@ -69,7 +69,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Ethernet */</div><div class='ctx'> &amp;fec1 {</div><div class='del'>-	fsl,magic-packet;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -161,11 +160,13 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='del'>-				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='ctx'> 				regulator-name = "VCC_ENET_2V5 (LDO3)";</div><div class='ctx'> </div><div class='ctx'> 				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+					regulator-suspend-min-microvolt = &lt;2500000&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -285,9 +286,11 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_sn65dsi83&gt;;</div><div class='ctx'> 		reg = &lt;0x2d&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* EEPROM */</div><div class='ctx'> 	eeprom@51 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='hunk'>@@ -295,17 +298,14 @@</div><div class='ctx'> 		vcc-supply = &lt;&amp;reg_vdd_3v3_s&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* RTC */</div><div class='ctx'> 	rv3028: rtc@52 {</div><div class='ctx'> 		compatible = "microcrystal,rv3028";</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* EMMC */</div><div class='add'>+/* eMMC */</div><div class='ctx'> &amp;usdhc3 {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3_ROOT&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;400000000&gt;;</div><div class='hunk'>@@ -340,10 +340,10 @@</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x90</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x16</div><div class='ctx'> 			MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x16</div><div class='del'>-			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x16</div><div class='del'>-			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x16</div><div class='del'>-			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x16</div><div class='del'>-			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x16</div><div class='add'>+			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x12</div><div class='add'>+			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x12</div><div class='add'>+			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x12</div><div class='add'>+			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x12</div><div class='ctx'> 			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x10</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -373,12 +373,6 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_rtc: rtcgrp {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pinctrl_sn65dsi83: sn65dsi83grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10		0x0</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts<br/>index c3835b2d860a..755cf9cacd22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts</a></div><div class='hunk'>@@ -215,8 +215,13 @@</div><div class='ctx'> </div><div class='ctx'> /* RTC */</div><div class='ctx'> &amp;rv3028 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	aux-voltage-chargeable = &lt;1&gt;;</div><div class='ctx'> 	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+	wakeup-source;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart1 {</div><div class='hunk'>@@ -394,6 +399,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_tempsense: tempsensegrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31	0x00</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts<br/>index 01b632b220dc..b941c8c4f7bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts</a></div><div class='hunk'>@@ -75,6 +75,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	samsung,burst-clock-frequency = &lt;891000000&gt;;</div><div class='add'>+	samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie_phy {</div><div class='ctx'> 	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_INPUT&gt;;</div><div class='ctx'> 	fsl,clkreq-unsupported;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi<br/>index 8f58c84e14c8..b82e9790ea20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;84000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck5_reg&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi<br/>index cdfacbc35db5..190bde4edcd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi</a></div><div class='hunk'>@@ -306,7 +306,7 @@</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi<br/>index 36803b038cd5..37db4f0dd505 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi</a></div><div class='hunk'>@@ -9,6 +9,11 @@</div><div class='ctx'> #include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0 0x80000000&gt;;</div><div class='hunk'>@@ -292,7 +297,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -413,6 +418,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso<br/>index 9bee7159a67b..b1a9f35e1dfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso</a></div><div class='hunk'>@@ -15,10 +15,6 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> /plugin/;</div><div class='ctx'> </div><div class='del'>-&amp;{/} {</div><div class='del'>-	compatible = "gw,imx8mm-gw73xx-0x";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpio4 {</div><div class='ctx'> 	rs485-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso<br/>index e98f50bcec57..44ebc0a58c51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs422.dtso</a></div><div class='hunk'>@@ -18,10 +18,6 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> /plugin/;</div><div class='ctx'> </div><div class='del'>-&amp;{/} {</div><div class='del'>-	compatible = "gw,imx8mm-gw73xx-0x";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpio4 {</div><div class='ctx'> 	rs485-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso<br/>index e875ff4637bd..2f8a7ac40873 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso</a></div><div class='hunk'>@@ -18,10 +18,6 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> /plugin/;</div><div class='ctx'> </div><div class='del'>-&amp;{/} {</div><div class='del'>-	compatible = "gw,imx8mm-gw73xx-0x";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpio4 {</div><div class='ctx'> 	rs485-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi<br/>index 5eb92005195c..53004c4a13aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi</a></div><div class='hunk'>@@ -116,6 +116,16 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	accelerometer@19 {</div><div class='add'>+		compatible = "st,lis2de12";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_accel&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	eeprom@52 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='hunk'>@@ -198,6 +208,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_accel: accelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8	0x159</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_gpio_leds: gpioledgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x6	/* LEDG */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts<br/>index 35ae0faa815b..272c2b223d16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts</a></div><div class='hunk'>@@ -22,6 +22,8 @@</div><div class='ctx'> 		ethernet2 = &amp;lan2;</div><div class='ctx'> 		ethernet3 = &amp;lan3;</div><div class='ctx'> 		ethernet4 = &amp;lan4;</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 		usb0 = &amp;usbotg1;</div><div class='ctx'> 		usb1 = &amp;usbotg2;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -497,7 +499,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -831,6 +833,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts<br/>index c11260c26d0b..c09b40fc6dec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet1 = &amp;eth1;</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 		usb0 = &amp;usbotg1;</div><div class='ctx'> 		usb1 = &amp;usbotg2;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -564,7 +566,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -741,6 +743,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts<br/>index db1737bf637d..636daa3d6ca2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;fec1;</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 		usb0 = &amp;usbotg1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -394,7 +396,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -619,6 +621,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts<br/>index 05489a31e7fd..99572961d9e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts</a></div><div class='hunk'>@@ -16,6 +16,11 @@</div><div class='ctx'> 	model = "Gateworks Venice GW7904 i.MX8MM board";</div><div class='ctx'> 	compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;uart2;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -438,7 +443,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -677,6 +682,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi<br/>index ce20de259805..3d0b14968131 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -16,10 +16,10 @@</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='ctx'> 			"IN2L", "Line In Jack",</div><div class='ctx'> 			"IN2R", "Line In Jack",</div><div class='del'>-			"Headphone Jack", "MICBIAS",</div><div class='del'>-			"IN1L", "Headphone Jack";</div><div class='add'>+			"Microphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Microphone Jack";</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='del'>-			"Microphone", "Headphone Jack",</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='ctx'> 			"Headphone", "Headphone Jack",</div><div class='ctx'> 			"Line", "Line In Jack";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi<br/>new file mode 100644<br/>index 000000000000..29075ff5eda6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-verdin-ivy.dtsi</a></div><div class='hunk'>@@ -0,0 +1,471 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin IMX8MM SoM on Ivy carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini-nano</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* AIN1 Voltage w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_voltage_unmanaged: voltage-divider-ain1 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1 Current w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_current_unmanaged: current-sense-shunt-ain1 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1_MODE - SODIMM 216 */</div><div class='add'>+	ain1_mode_mux_ctrl: mux-controller-0 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio5&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain1_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain1_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain1_current";</div><div class='add'>+		io-channels = &lt;&amp;ain1_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Voltage w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_voltage_unmanaged: voltage-divider-ain2 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Current w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_current_unmanaged: current-sense-shunt-ain2 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2_MODE - SODIMM 218 */</div><div class='add'>+	ain2_mode_mux_ctrl: mux-controller-1 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio6&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain2_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain2_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain2_current";</div><div class='add'>+		io-channels = &lt;&amp;ain2_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ivy_leds&gt;;</div><div class='add'>+</div><div class='add'>+		/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Green - SODIMM 32 - LEDs.GPIO2 */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Red - SODIMM 34 - LEDs.GPIO3 */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Green - SODIMM 54 - LEDs.GPIO5 */</div><div class='add'>+		led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Red - SODIMM 44 - LEDs.GPIO6 */</div><div class='add'>+		led-5 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */</div><div class='add'>+		led-6 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Red - SODIMM 48 - LEDs.GPIO8 */</div><div class='add'>+		led-7 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain1: regulator-3v2-ain1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain2: regulator-3v2-ain2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Ivy Power Supply Input Voltage */</div><div class='add'>+	ivy-input-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_1 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 7&gt;;</div><div class='add'>+		full-ohms = &lt;204700&gt;; /* 200k + 4.7k */</div><div class='add'>+		output-ohms = &lt;4700&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-5v-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_2 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 6&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 27k + 12k */</div><div class='add'>+		output-ohms = &lt;12000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-3v3-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_3 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 5&gt;;</div><div class='add'>+		full-ohms = &lt;54000&gt;; /* 27k + 27k */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-1v8-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_4 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 4&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 12k + 27k */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio3 4 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio5 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@1 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fram@2 {</div><div class='add'>+		compatible = "fujitsu,mb85rs256", "atmel,at25";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		address-width = &lt;16&gt;;</div><div class='add'>+		size = &lt;32768&gt;;</div><div class='add'>+		spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+		pagesize = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EEPROM on Ivy */</div><div class='add'>+&amp;eeprom_carrier_board {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 */</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"REL3", /* SODIMM 64 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"DIG_1", /* SODIMM 56 */</div><div class='add'>+		"DIG_2", /* SODIMM 58 */</div><div class='add'>+		"REL1",  /* SODIMM 60 */</div><div class='add'>+		"REL2",  /* SODIMM 62 */</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"REL4",  /* SODIMM 66 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Temperature sensor on Ivy */</div><div class='add'>+&amp;hwmon_temp {</div><div class='add'>+	compatible = "ti,tmp1075";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4 CSI */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ivy_adc1: adc@40 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio7&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy_adc2: adc@41 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1 */</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3 */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1*/</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio2&gt;, &lt;&amp;pinctrl_gpio3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_ivy_dig_inputs&gt;, &lt;&amp;pinctrl_ivy_relays&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_dig_inputs: ivydiginputsgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6	0x96&gt;, /* SODIMM 56 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7	0x96&gt;; /* SODIMM 58 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_leds: ivyledsgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25	0x16&gt;, /* SODIMM 30 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24	0x16&gt;, /* SODIMM 32 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26	0x16&gt;, /* SODIMM 34 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23	0x16&gt;, /* SODIMM 36 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22	0x16&gt;, /* SODIMM 44 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24	0x16&gt;, /* SODIMM 46 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21	0x16&gt;, /* SODIMM 48 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1	0x16&gt;; /* SODIMM 54 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_relays: ivyrelaysgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8	0x16&gt;, /* SODIMM 60 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9	0x16&gt;, /* SODIMM 62 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2	0x16&gt;, /* SODIMM 64 */</div><div class='add'>+			&lt;MX8MM_IOMUXC_NAND_DQS_GPIO3_IO14	0x16&gt;; /* SODIMM 66 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..82b34a12ee2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mm-verdin.dtsi"</div><div class='add'>+#include "imx8mm-verdin-nonwifi.dtsi"</div><div class='add'>+#include "imx8mm-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin iMX8M Mini on Ivy";</div><div class='add'>+	compatible = "toradex,verdin-imx8mm-nonwifi-ivy",</div><div class='add'>+		     "toradex,verdin-imx8mm-nonwifi",</div><div class='add'>+		     "toradex,verdin-imx8mm",</div><div class='add'>+		     "fsl,imx8mm";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts b/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..3369ba852b5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mm-verdin.dtsi"</div><div class='add'>+#include "imx8mm-verdin-wifi.dtsi"</div><div class='add'>+#include "imx8mm-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin iMX8M Mini WB on Ivy";</div><div class='add'>+	compatible = "toradex,verdin-imx8mm-wifi-ivy",</div><div class='add'>+		     "toradex,verdin-imx8mm-wifi",</div><div class='add'>+		     "toradex,verdin-imx8mm",</div><div class='add'>+		     "fsl,imx8mm";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi<br/>index 5fa395914191..1594ce9182a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></div><div class='hunk'>@@ -18,20 +18,6 @@</div><div class='ctx'> 		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	backlight: backlight {</div><div class='del'>-		compatible = "pwm-backlight";</div><div class='del'>-		brightness-levels = &lt;0 45 63 88 119 158 203 255&gt;;</div><div class='del'>-		default-brightness-level = &lt;4&gt;;</div><div class='del'>-		/* Verdin I2S_2_D_OUT (DSI_1_BKL_EN/DSI_1_BKL_EN_LVDS, SODIMM 46) */</div><div class='del'>-		enable-gpios = &lt;&amp;gpio3 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_i2s_2_d_out_dsi_1_bkl_en&gt;;</div><div class='del'>-		power-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='del'>-		/* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 6666667 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	/* Fixed clock dedicated to SPI CAN controller */</div><div class='ctx'> 	clk40m: oscillator {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='hunk'>@@ -66,13 +52,6 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	panel_lvds: panel-lvds {</div><div class='del'>-		compatible = "panel-lvds";</div><div class='del'>-		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-		data-mapping = "vesa-24";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	/* Carrier Board Supplies */</div><div class='ctx'> 	reg_1p8v: regulator-1p8v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -162,7 +141,20 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-name = "+V3.3_SD";</div><div class='del'>-		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_vsel&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;,</div><div class='add'>+			 &lt;3300000 0x0&gt;;</div><div class='add'>+		regulator-name = "PMIC_USDHC_VSELECT";</div><div class='add'>+		vin-supply = &lt;&amp;reg_nvcc_sd&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved-memory {</div><div class='hunk'>@@ -290,7 +282,7 @@</div><div class='ctx'> 			  "SODIMM_19",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='del'>-			  "",</div><div class='add'>+			  "PMIC_USDHC_VSELECT",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='hunk'>@@ -367,6 +359,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pca9450: pmic@25 {</div><div class='hunk'>@@ -471,6 +464,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reg_nvcc_sd: LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-name = "On-module +V3.3_1.8_SD (LDO5)";</div><div class='hunk'>@@ -483,11 +477,12 @@</div><div class='ctx'> 		reg = &lt;0x32&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	adc@49 {</div><div class='add'>+	verdin_som_adc: adc@49 {</div><div class='ctx'> 		compatible = "ti,ads1015";</div><div class='ctx'> 		reg = &lt;0x49&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/* Verdin I2C_1 (ADC_4 - ADC_3) */</div><div class='ctx'> 		channel@0 {</div><div class='hunk'>@@ -547,7 +542,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eeprom@50 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -561,6 +556,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -574,6 +570,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_1 */</div><div class='hunk'>@@ -584,6 +581,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> </div><div class='ctx'> 	gpio_expander_21: gpio-expander@21 {</div><div class='ctx'> 		compatible = "nxp,pcal6416";</div><div class='hunk'>@@ -649,7 +647,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM on display adapter (MIPI DSI Display Adapter) */</div><div class='ctx'> 	eeprom_display_adapter: eeprom@50 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -657,7 +655,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM on carrier board */</div><div class='ctx'> 	eeprom_carrier_board: eeprom@57 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -801,6 +799,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='ctx'> 	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;, &lt;&amp;pinctrl_usdhc2_cd_sleep&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wdog1 {</div><div class='hunk'>@@ -1222,13 +1221,17 @@</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5		0x6&gt;;	/* SODIMM 76 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_usdhc2_vsel: usdhc2vselgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x10&gt;; /* PMIC_USDHC_VSELECT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the</div><div class='ctx'> 	 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pinctrl_usdhc2: usdhc2grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x90&gt;,	/* SODIMM 78 */</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x90&gt;,	/* SODIMM 74 */</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x90&gt;,	/* SODIMM 80 */</div><div class='hunk'>@@ -1239,7 +1242,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x94&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x94&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x94&gt;,</div><div class='hunk'>@@ -1250,7 +1252,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x96&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x96&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x96&gt;,</div><div class='hunk'>@@ -1262,7 +1263,6 @@</div><div class='ctx'> 	/* Avoid backfeeding with removed card power */</div><div class='ctx'> 	pinctrl_usdhc2_sleep: usdhc2slpgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x0&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi<br/>index 9535dedcef59..fc3cd639310e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mm.dtsi</a></div><div class='hunk'>@@ -62,7 +62,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MM_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -83,7 +82,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MM_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -102,7 +100,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MM_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -121,7 +118,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MM_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -919,6 +915,8 @@</div><div class='ctx'> 					clocks = &lt;&amp;clk IMX8MM_CLK_UART2_ROOT&gt;,</div><div class='ctx'> 						 &lt;&amp;clk IMX8MM_CLK_UART2_ROOT&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='add'>+					dmas = &lt;&amp;sdma1 24 4 0&gt;, &lt;&amp;sdma1 25 4 0&gt;;</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1375,9 +1373,11 @@</div><div class='ctx'> </div><div class='ctx'> 		pcie0_ep: pcie-ep@33800000 {</div><div class='ctx'> 			compatible = "fsl,imx8mm-pcie-ep";</div><div class='del'>-			reg = &lt;0x33800000 0x400000&gt;,</div><div class='del'>-			      &lt;0x18000000 0x8000000&gt;;</div><div class='del'>-			reg-names = "dbi", "addr_space";</div><div class='add'>+			reg = &lt;0x33800000 0x100000&gt;,</div><div class='add'>+			      &lt;0x18000000 0x8000000&gt;,</div><div class='add'>+			      &lt;0x33900000 0x100000&gt;,</div><div class='add'>+			      &lt;0x33b00000 0x100000&gt;;</div><div class='add'>+			reg-names = "dbi", "addr_space", "dbi2", "atu";</div><div class='ctx'> 			num-lanes = &lt;1&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "dma";</div><div class='hunk'>@@ -1467,6 +1467,7 @@</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0x38800000 0x10000&gt;, /* GIC Dist */</div><div class='ctx'> 			      &lt;0x38880000 0xc0000&gt;; /* GICR (RD_base + SGI_base) */</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts<br/>index 1df5ceb11387..37fc5ed98d7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-beacon-kit.dts</a></div><div class='hunk'>@@ -124,6 +124,7 @@</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clk IMX8MN_AUDIO_PLL1_OUT&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;24576000&gt;;</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi<br/>index 2a64115eebf1..917b7d0007a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi</a></div><div class='hunk'>@@ -88,6 +88,9 @@</div><div class='ctx'> 		ethphy0: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+			interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -242,6 +245,12 @@</div><div class='ctx'> 	rtc: rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf85263";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+		wakeup-source;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +289,7 @@</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;usdhc1_pwrseq&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -296,6 +305,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MN_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -325,6 +336,7 @@</div><div class='ctx'> 			MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC	0x91</div><div class='ctx'> 			MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91</div><div class='ctx'> 			MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f</div><div class='add'>+			MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10             0x146</div><div class='ctx'> 			MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22	0x19</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -360,6 +372,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x146</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi<br/>index bbb07c650da9..d20393c2d901 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi</a></div><div class='hunk'>@@ -265,7 +265,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi<br/>index 7675583a6b67..98dec3c42060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi</a></div><div class='hunk'>@@ -4,6 +4,34 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer-panel0 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			clocks = &lt;&amp;clk IMX8MN_CLK_DISP_PIXEL_ROOT&gt;, /* lcdif */</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_APB_ROOT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_AXI_ROOT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_VIDEO_PLL1&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_AXI_ROOT&gt;, /* pgc_dispmix */</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_APB_ROOT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_AXI&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DISP_APB&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_SYS_PLL2_1000M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DSI_CORE&gt;, /* mipi_disi */</div><div class='add'>+				 &lt;&amp;clk IMX8MN_CLK_DSI_PHY_REF&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF&gt;,</div><div class='add'>+					&lt;&amp;disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI&gt;;</div><div class='add'>+			dvdd-supply = &lt;&amp;reg_3v3_dvdd&gt;;</div><div class='add'>+			avdd-supply = &lt;&amp;reg_v3v3_avdd&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 700000 0&gt;;	/* 700000 ns = 1337Hz */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts<br/>index c6ad65becc97..475cbf9e0d1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts</a></div><div class='hunk'>@@ -64,7 +64,6 @@</div><div class='ctx'> 		DVDD-supply = &lt;&amp;buck5_reg&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		ai31xx-micbias-vg = &lt;MICBIAS_AVDDV&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk IMX8MN_CLK_SAI3_ROOT&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi<br/>index 33d73f3dc187..145355ff91b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi</a></div><div class='hunk'>@@ -387,6 +387,11 @@</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clk IMX8MN_AUDIO_PLL1_OUT&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;24576000&gt;;</div><div class='ctx'> 	fsl,sai-mclk-direction-output;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MN_CLK_SAI3_IPG&gt;, &lt;&amp;clk IMX8MN_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MN_CLK_SAI3_ROOT&gt;, &lt;&amp;clk IMX8MN_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MN_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MN_AUDIO_PLL1_OUT&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MN_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso<br/>index 96db07fc9bec..1f2a0fe70a0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtso</a></div><div class='hunk'>@@ -29,12 +29,37 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * rst_usb_hub_hog and sel_usb_hub_hog have property 'output-high',</div><div class='add'>+ * dt overlay don't support /delete-property/. Both 'output-low' and</div><div class='add'>+ * 'output-high' will be exist under hog nodes if overlay file set</div><div class='add'>+ * 'output-low'. Workaround is disable these hog and create new hog with</div><div class='add'>+ * 'output-low'.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> &amp;rst_usb_hub_hog {</div><div class='del'>-	output-low;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;expander0 {</div><div class='add'>+	rst-usb-low-hub-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;13 0&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "RST_USB_HUB#";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sel_usb_hub_hog {</div><div class='del'>-	output-low;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	sel-usb-low-hub-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbotg1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts<br/>index 433d8bba4425..d7f7f9aafb7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts</a></div><div class='hunk'>@@ -64,6 +64,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	samsung,burst-clock-frequency = &lt;891000000&gt;;</div><div class='add'>+	samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai3 {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MN_CLK_SAI3&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clk IMX8MN_AUDIO_PLL1_OUT&gt;;</div><div class='hunk'>@@ -74,6 +79,10 @@</div><div class='ctx'> 		 &lt;&amp;clk IMX8MN_AUDIO_PLL2_OUT&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sound {</div><div class='add'>+	audio-asrc = &lt;&amp;easrc&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlv320aic3x04 {</div><div class='ctx'> 	clock-names = "mclk";</div><div class='ctx'> 	clocks = &lt;&amp;clk IMX8MN_CLK_SAI3_ROOT&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi<br/>index e68a3fd73e17..1d23814e11cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi</a></div><div class='hunk'>@@ -52,6 +52,10 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;buck2_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;easrc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;flexspi {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_flexspi&gt;;</div><div class='hunk'>@@ -63,6 +67,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;84000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck5_reg&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi<br/>index b364307868f2..38ef9e4fdf07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi</a></div><div class='hunk'>@@ -300,7 +300,7 @@</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts<br/>index 0b1fa04f1d67..a5f52f60169e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> 	compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 		usb0 = &amp;usbotg1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -562,7 +564,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -691,6 +693,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MN_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi<br/>index a5f9cfb46e5d..b98b3d0ddf25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mn.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mn.dtsi</a></div><div class='hunk'>@@ -62,7 +62,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MN_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -83,7 +82,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MN_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -102,7 +100,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MN_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -121,7 +118,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MN_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -864,6 +860,8 @@</div><div class='ctx'> 					clocks = &lt;&amp;clk IMX8MN_CLK_UART2_ROOT&gt;,</div><div class='ctx'> 						 &lt;&amp;clk IMX8MN_CLK_UART2_ROOT&gt;;</div><div class='ctx'> 					clock-names = "ipg", "per";</div><div class='add'>+					dmas = &lt;&amp;sdma1 24 4 0&gt;, &lt;&amp;sdma1 25 4 0&gt;;</div><div class='add'>+					dma-names = "rx", "tx";</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts<br/>new file mode 100644<br/>index 000000000000..6a688510dad9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include "imx8mp-aristainetos3a-som-v1.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "Aristainetos3 ADLink PI SMARC carrier";</div><div class='add'>+	compatible = "abb,imx8mp-aristanetos3-adpismarc",</div><div class='add'>+		     "abb,imx8mp-aristanetos3-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	gpio8: pinctrl@3e {</div><div class='add'>+		compatible = "semtech,sx1509q";</div><div class='add'>+		reg = &lt;0x3e&gt;;</div><div class='add'>+</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		semtech,probe-reset;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso<br/>new file mode 100644<br/>index 000000000000..9d1f3b4ccc79<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "Aristainetos3 helios carrier with LVDS";</div><div class='add'>+	compatible = "abb,imx8mp-aristanetos3-helios",</div><div class='add'>+		     "abb,imx8mp-aristanetos3-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	panel_lvds: panel-lvds {</div><div class='add'>+		compatible = "lg,lb070wv8";</div><div class='add'>+		power-supply = &lt;&amp;reg_vcc_disp&gt;;</div><div class='add'>+		backlight = &lt;&amp;lvds_backlight&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			in_lvds0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_disp: regulator-disp {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lcd0_vcc_en&gt;;</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "disp_power_en_2v8";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio3_hog&gt;;</div><div class='add'>+</div><div class='add'>+	lvdssel-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "LVDSSEL";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_blk_ctrl {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_hdmi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ldb_lvds_ch0 {</div><div class='add'>+	remote-endpoint = &lt;&amp;in_lvds0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_backlight {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */</div><div class='add'>+	assigned-clock-rates = &lt;232820000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;media_blk_ctrl {</div><div class='add'>+	/*</div><div class='add'>+	 * currently it is not possible to let display clocks configure</div><div class='add'>+	 * automatically, so we need to set them manually</div><div class='add'>+	 */</div><div class='add'>+	assigned-clock-rates = &lt;500000000&gt;, &lt;200000000&gt;, &lt;0&gt;,</div><div class='add'>+		/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */</div><div class='add'>+		&lt;33260000&gt;, &lt;0&gt;,</div><div class='add'>+		/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */</div><div class='add'>+		&lt;465640000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts<br/>new file mode 100644<br/>index 000000000000..a4e649a8239b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mp-aristainetos3a-som-v1.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "Aristainetos3 helios carrier";</div><div class='add'>+	compatible = "abb,imx8mp-aristanetos3-helios",</div><div class='add'>+		     "abb,imx8mp-aristanetos3-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca6416 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca6416 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca6416 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca6416 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pca6416: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "DIN0_CON",</div><div class='add'>+			"DIN1_CON",</div><div class='add'>+			"DIN2_CON",</div><div class='add'>+			"DIN3_CON",</div><div class='add'>+			"DIN4_CON",</div><div class='add'>+			"DIN5_CON",</div><div class='add'>+			"DIN6_CON",</div><div class='add'>+			"DIN7_CON",</div><div class='add'>+			"PM102_RES",</div><div class='add'>+			"COMx_RES",</div><div class='add'>+			"BPL_RES",</div><div class='add'>+			"PC_RES",</div><div class='add'>+			"LED_RED",</div><div class='add'>+			"LED_YELLOW",</div><div class='add'>+			"LED_GREEN",</div><div class='add'>+			"LED_BLUE";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "st,m41t00";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts<br/>new file mode 100644<br/>index 000000000000..58e36de7a2cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts</a></div><div class='hunk'>@@ -0,0 +1,161 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx8mp-aristainetos3a-som-v1.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "Aristainetos3 proton2s carrier";</div><div class='add'>+	compatible = "abb,imx8mp-aristanetos3-proton2s",</div><div class='add'>+		     "abb,imx8mp-aristanetos3-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	watchdog {</div><div class='add'>+		/* MAX6371KA */</div><div class='add'>+		compatible = "linux,wdt-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_watchdog_gpio&gt;;</div><div class='add'>+		always-running;</div><div class='add'>+		gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hw_algo = "level";</div><div class='add'>+		/* Reset triggers in 3..9 seconds */</div><div class='add'>+		hw_margin_ms = &lt;1500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	max-speed = &lt;100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_proton2s&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "POWER",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio6 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"RELAY0", "RELAY1", "RELAY2", "HEATER",</div><div class='add'>+		"FAN", "SPARE",	"CLEAR", "FAULT",</div><div class='add'>+		"", "", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	tlc59108@40 {</div><div class='add'>+		compatible = "ti,tlc59108";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@0 {</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function-enumerator = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@2 {</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function-enumerator = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function-enumerator = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@4 {</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function-enumerator = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@5 {</div><div class='add'>+			reg = &lt;0x5&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function-enumerator = &lt;22&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@6 {</div><div class='add'>+			reg = &lt;0x6&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function-enumerator = &lt;22&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@7 {</div><div class='add'>+			reg = &lt;0x7&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function-enumerator = &lt;22&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc1: rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1339";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rts-active-low;</div><div class='add'>+	rs485-rts-delay = &lt;0 0&gt;;</div><div class='add'>+	rts-gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi<br/>new file mode 100644<br/>index 000000000000..f654d866e58c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1107 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Heiko Schocher &lt;hs@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ADLINK LEC-iMX8MP-Q-N-4G-32G";</div><div class='add'>+	compatible = "abb,imx8mp-aristanetos3-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		mmc0 = &amp;usdhc3;	/* eMMC */</div><div class='add'>+		mmc1 = &amp;usdhc2;	/* MicroSD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+		label = "USB-C";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_dr_connector: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb3_dwc&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+			function-enumerator = &lt;0&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lvds_backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds_bklt_en&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 50000 0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;80&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* Memory size 512 MiB..8 GiB will be filled by U-Boot */</div><div class='add'>+		reg = &lt;0x0 0x40000000 0 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_refclk: clock-pcie-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can1_stby: regulator-can1-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan1_reg&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio5 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "can1-stby";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can2_stby: regulator-can2-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan2_reg&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "can2-stby";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_dp83867_2v5: regulator-enet {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio7 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "enet_2v5";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_host_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb1_vbus&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "usb1_host_vbus";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_vmmc&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;; /* SD2_RESET */</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDD_3V3_SD";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;clk {</div><div class='add'>+	clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;osc_24m&gt;, &lt;&amp;clk_ext1&gt;, &lt;&amp;clk_ext2&gt;,</div><div class='add'>+		 &lt;&amp;clk_ext3&gt;, &lt;&amp;clk_ext4&gt;;</div><div class='add'>+	clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",</div><div class='add'>+		      "clk_ext3", "clk_ext4";</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_A53_SRC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_A53_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_NOC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_NOC_IO&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_GIC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_AUDIO_AHB&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_AUDIO_AXI_SRC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_AUDIO_PLL1&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_AUDIO_PLL2&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1 &amp;pinctrl_ecspi1_cs2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW &amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eth0 */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos_rgmii&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	snps,force_thresh_dma_mode;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: eqos-ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_75_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_1_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,min-output-impedance;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;21 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eth1 */</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec_rgmii&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpio = &lt;&amp;gpio4 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_75_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_1_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,min-output-impedance;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			eee-broken-1000t;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can1_stby&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can1_stby&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * i.MX 8M Plus Data Sheet for Consumer Products</div><div class='add'>+		 * 3.1.4 Operating ranges</div><div class='add'>+		 * MIMX8ML8CVNKZAB</div><div class='add'>+		 */</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {	/* VDD_SOC (dual-phase with BUCK3) */</div><div class='add'>+				regulator-name = "buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {	/* VDD_ARM */</div><div class='add'>+				regulator-name = "buck2";</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {	/* VDD_3V3 */</div><div class='add'>+				regulator-name = "buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {	/* VDD_1V8 */</div><div class='add'>+				regulator-name = "buck5";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {	/* NVCC_DRAM_1V1 */</div><div class='add'>+				regulator-name = "buck6";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {	/* NVCC_SNVS_1V8 */</div><div class='add'>+				regulator-name = "ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2: LDO2 {	/* VDDA_1V8 */</div><div class='add'>+				regulator-name = "ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {	/* VDDA_1V8 */</div><div class='add'>+				regulator-name = "ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {	/* PMIC_LDO4 */</div><div class='add'>+				regulator-name = "ldo4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {	/* NVCC_SD2 */</div><div class='add'>+				regulator-name = "ldo5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c6_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* TPM - ST33TPHF2XI2C U2301 */</div><div class='add'>+	tpm: tpm@2e {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tpm_irq&gt;;</div><div class='add'>+		compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";</div><div class='add'>+		reg = &lt;0x2e&gt;;</div><div class='add'>+</div><div class='add'>+		label = "tpm";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio6 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SX1509(0) U2605 */</div><div class='add'>+	gpio6: pinctrl@3f {</div><div class='add'>+		compatible = "semtech,sx1509q";</div><div class='add'>+		reg = &lt;0x3f&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		semtech,probe-reset;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* RTC U2607 */</div><div class='add'>+	rtc0: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SX1509(1) U2606 */</div><div class='add'>+	gpio7: pinctrl@70 {</div><div class='add'>+		compatible = "semtech,sx1509q";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		semtech,probe-reset;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		gpio6-cfg {</div><div class='add'>+			pins = "gpio6";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio7-cfg {</div><div class='add'>+			pins = "gpio7";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* HDMI */</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio4 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	fsl,tx-deemph-gen1 = &lt;0x1f&gt;;</div><div class='add'>+	fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_INPUT&gt;;</div><div class='add'>+	clocks = &lt;&amp;pcie0_refclk&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+	#pwm-cells = &lt;3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_dwc: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_dr_connector&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD slot */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_ecspi1: aristainetos3-ecspi1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x40000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1_cs2: aristainetos3-ecspi1-cs2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x40000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: aristainetos3-ecspi2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x40000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_rgmii: aristainetos3-eqos-rgmii-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22				0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec_rgmii: aristainetos3-fec-rgmii-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x3</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x3</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: aristainetos3-flexcan1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX			0x154</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX			0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1_reg: aristainetos3-flexcan1-reg-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05  0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: aristainetos3-flexcan2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX         0x154</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX         0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2_reg: aristainetos3-flexcan2-reg-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27      0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio3_hog: aristainetos3-gpio3-hog-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_led: aristainetos3-gpio-led-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16	0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_proton2s: aristainetos3-gpio-proton2s-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07	0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: aristainetos3-hdmi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000019</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x40000019</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: aristainetos3-i2c1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: aristainetos3-i2c1-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: aristainetos3-i2c2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: aristainetos3-i2c2-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: aristainetos3-i2c3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: aristainetos3-i2c3-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: aristainetos3-i2c5-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__I2C5_SDA	0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6: aristainetos3-i2c6-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6_gpio: aristainetos3-i2c6-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lcd0_vcc_en: aristainetos3-lcd0-vcc-en-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lvds_bklt_en: aristainetos3-lvds-bklt-en-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie: aristainetos3-pcie-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B	0x61</div><div class='add'>+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: aristainetos3-pmic-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: aristainetos3-pwm1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT	0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: aristainetos3-pwm2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT	0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm_irq: aristainetos3-tpm-irq-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: aristainetos3-uart1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: aristainetos3-uart2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x140</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: aristainetos3-uart3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_ALE__UART3_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE0_B__UART3_DCE_TX	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: aristainetos3-uart4-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX    0x140</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX    0x140</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09	0x140</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA02__UART4_DCE_CTS 0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_vbus: aristainetos3-usb1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14	0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: aristainetos3-usdhc1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: aristainetos3-usdhc1-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: aristainetos3-usdhc1-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: aristainetos3-usdhc2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1</div><div class='add'>+</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: aristainetos3-usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: aristainetos3-usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: aristainetos3-usdhc2-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x40000080</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_vmmc: aristainetos3-usdhc2-vmmc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: aristainetos3-usdhc3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: aristainetos3-usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: aristainetos3-usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_watchdog_gpio: aristainetos3-wdog-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06	0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: aristainetos3-wdog-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0xc6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi<br/>index 15f7ab58db36..6a62cb32e22e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi</a></div><div class='hunk'>@@ -257,6 +257,12 @@</div><div class='ctx'> 	rtc: rtc@51 {</div><div class='ctx'> 		compatible = "nxp,pcf85263";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+		wakeup-source;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -381,6 +387,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts b/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts<br/>new file mode 100644<br/>index 000000000000..8290f187b79f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts</a></div><div class='hunk'>@@ -0,0 +1,223 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-sr-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP CuBox-M";</div><div class='add'>+	compatible = "solidrun,imx8mp-cubox-m",</div><div class='add'>+		     "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		/delete-property/ ethernet1;</div><div class='add'>+		rtc0 = &amp;carrier_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ir_pins&gt;;</div><div class='add'>+		linux,autosuspend-period = &lt;125&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		status {</div><div class='add'>+			label = "status";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-hdmi {</div><div class='add'>+		compatible = "fsl,imx-audio-hdmi";</div><div class='add'>+		model = "audio-hdmi";</div><div class='add'>+		audio-cpu = &lt;&amp;aud2htx&gt;;</div><div class='add'>+		hdmi-out;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus: regulator-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus";</div><div class='add'>+		gpio = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vbus_pins&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc: regulator-mmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vmmc_pins&gt;;</div><div class='add'>+		regulator-name = "vmmc";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aud2htx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	/* this board does not use second phy / ethernet on SoM */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	carrier_rtc: rtc@32 {</div><div class='add'>+		compatible = "epson,rx8130";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_pins&gt;;</div><div class='add'>+</div><div class='add'>+	hdmi_pins: pinctrl-hdmi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x154</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir_pins: pinctrl-ir-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x4f</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins: pinctrl-led-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_pins: pinctrl-usdhc2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus_pins: pinctrl-vbus-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc_pins: pinctrl-vmmc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	fsl,phy-tx-preemp-amp-tune-microamp = &lt;1200&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	fsl,phy-tx-preemp-amp-tune-microamp = &lt;1200&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usdhc2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usdhc2_100mhz_pins&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usdhc2_200mhz_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	full-pwr-cycle;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts<br/>index d0fc5977258f..16078ff60ef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts</a></div><div class='hunk'>@@ -555,6 +555,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;ldo5&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts<br/>new file mode 100644<br/>index 000000000000..c6bf7fd91981<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * DHCOM iMX8MP variant:</div><div class='add'>+ * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E2-CAN2-RTC-I-01D2</div><div class='add'>+ * DHCOM PCB number: 660-100 or newer</div><div class='add'>+ * DRC02 PCB number: 568-100 or newer</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include "imx8mp-dhcom-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "DH electronics i.MX8M Plus DHCOM on DRC02";</div><div class='add'>+	compatible = "dh,imx8mp-dhcom-drc02", "dh,imx8mp-dhcom-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {	/* First ethernet */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos_rmii&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0f&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_266M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_100M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;100000000&gt;, &lt;50000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy0g {	/* Micrel KSZ9131RNXI */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy0f {	/* SMSC LAN8740Ai */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {	/* Second ethernet */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec_rmii&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1f&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_266M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_100M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;100000000&gt;, &lt;50000000&gt;, &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy1f {	/* SMSC LAN8740Ai */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"DRC02-In1", "", "", "", "", "DHCOM-I", "DRC02-HW2", "DRC02-HW0",</div><div class='add'>+		"DHCOM-B", "DHCOM-A", "", "DHCOM-H", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate</div><div class='add'>+	 * GPIO line, however the i.MX8 UART driver assumes RX happens</div><div class='add'>+	 * during TX anyway and that it only controls drive enable DE</div><div class='add'>+	 * line. Hence, the RX is always enabled here.</div><div class='add'>+	 */</div><div class='add'>+	rs485-rx-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;13 0&gt;; /* GPIO Q */</div><div class='add'>+		line-name = "rs485-rx-en";</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"DHCOM-O", "DHCOM-N", "", "SOM-HW1", "", "", "", "",</div><div class='add'>+		"", "", "", "", "DRC02-In2", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "SOM-HW0", "",</div><div class='add'>+		"", "", "", "", "", "", "SOM-MEM0", "SOM-MEM1",</div><div class='add'>+		"SOM-MEM2", "SOM-HW2", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "SOM-HW1", "", "", "", "",</div><div class='add'>+		"", "", "", "DRC02-Out2", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "DHCOM-C", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "DHCOM-E", "DRC02-Out1",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */</div><div class='add'>+&amp;hdmi_blk_ctrl {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	/* Resistive touch controller not populated on this one SoM variant. */</div><div class='add'>+	touchscreen@49 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_hdmi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Console UART */</div><div class='add'>+&amp;pinctrl_uart1 {</div><div class='add'>+	fsl,pins = &lt;</div><div class='add'>+		/* No pull-ups on DRC02, enable in-SoC pull-ups */</div><div class='add'>+		MX8MP_IOMUXC_SAI2_RXC__UART1_DCE_RX		0x149</div><div class='add'>+		MX8MP_IOMUXC_SAI2_RXFS__UART1_DCE_TX		0x149</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_uart3 {</div><div class='add'>+	fsl,pins = &lt;</div><div class='add'>+		/* No pull-ups on DRC02, enable in-SoC pull-ups */</div><div class='add'>+		MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x149</div><div class='add'>+		MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x149</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	/*</div><div class='add'>+	 * Due to the use of CAN2 the signals for CAN2 Tx and Rx are routed to</div><div class='add'>+	 * DHCOM UART1 RTS/CTS pins. Therefore this UART have to use DHCOM GPIOs</div><div class='add'>+	 * for RTS/CTS. So configure DHCOM GPIO I as RTS and GPIO M as CTS.</div><div class='add'>+	 */</div><div class='add'>+	/delete-property/ uart-has-rtscts;</div><div class='add'>+	cts-gpios = &lt;&amp;gpio5 5 GPIO_ACTIVE_HIGH&gt;; /* GPIO M */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1 &amp;pinctrl_dhcom_i &amp;pinctrl_dhcom_m&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	rts-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;; /* GPIO I */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	/*</div><div class='add'>+	 * On DRC02 this UART is used as RS485 interface and RS485_TX_En is</div><div class='add'>+	 * controlled by DHCOM GPIO P. So remove RTS/CTS pins and the property</div><div class='add'>+	 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via</div><div class='add'>+	 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1</div><div class='add'>+	 * node above.</div><div class='add'>+	 */</div><div class='add'>+	/delete-property/ uart-has-rtscts;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3 &amp;pinctrl_dhcom_p &amp;pinctrl_dhcom_q&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	rts-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_HIGH&gt;; /* GPIO P */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No WiFi/BT chipset on this SoM variant. */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	bluetooth {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB_OTG port is not routed out on DRC02. */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB_HOST port has USB Hub connected to it, PWR/OC pins are unused */</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+	fsl,permanently-attached;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No WiFi/BT chipset on this SoM variant. */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	/*</div><div class='add'>+	 * GPIO I is connected to UART1_RTS</div><div class='add'>+	 * GPIO M is connected to UART1_CTS</div><div class='add'>+	 * GPIO P is connected to RS485_TX_En</div><div class='add'>+	 * GPIO Q is connected to RS485_RX_En</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog_base</div><div class='add'>+		     &amp;pinctrl_dhcom_a &amp;pinctrl_dhcom_b &amp;pinctrl_dhcom_c</div><div class='add'>+		     &amp;pinctrl_dhcom_d &amp;pinctrl_dhcom_e &amp;pinctrl_dhcom_f</div><div class='add'>+		     &amp;pinctrl_dhcom_g &amp;pinctrl_dhcom_h &amp;pinctrl_dhcom_j</div><div class='add'>+		     &amp;pinctrl_dhcom_k &amp;pinctrl_dhcom_l &amp;pinctrl_dhcom_n</div><div class='add'>+		     &amp;pinctrl_dhcom_o &amp;pinctrl_dhcom_r &amp;pinctrl_dhcom_s</div><div class='add'>+		     &amp;pinctrl_dhcom_int&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts<br/>new file mode 100644<br/>index 000000000000..703cf0fb3d2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts</a></div><div class='hunk'>@@ -0,0 +1,176 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023-2024 Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * DHCOM iMX8MP variant:</div><div class='add'>+ * DHCM-iMX8ML8-C160-R204-F1638-SPI16-E-SD-RTC-T-RGB-I-01D2</div><div class='add'>+ * DHCOM PCB number: 660-200 or newer</div><div class='add'>+ * PicoITX PCB number: 487-600 or newer</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx8mp-dhcom-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "DH electronics i.MX8M Plus DHCOM PicoITX";</div><div class='add'>+	compatible = "dh,imx8mp-dhcom-picoitx", "dh,imx8mp-dhcom-som",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;; /* GPIO I */</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_dhcom_i&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {	/* First ethernet */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos_rmii&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0f&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_266M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_100M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;100000000&gt;, &lt;50000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy0g {	/* Micrel KSZ9131RNXI */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethphy0f {	/* SMSC LAN8740Ai */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"DHCOM-G", "", "", "",</div><div class='add'>+		"", "DHCOM-I", "PicoITX-HW0", "PicoITX-HW2",</div><div class='add'>+		"DHCOM-B", "DHCOM-A", "", "DHCOM-H", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "PicoITX-HW1", "", "", "", "",</div><div class='add'>+		"", "", "", "", "DHCOM-INT", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "SOM-HW1", "", "", "", "",</div><div class='add'>+		"", "", "", "PicoITX-Out2", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "PicoITX-In2", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "PicoITX-In1", "PicoITX-Out1",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */</div><div class='add'>+&amp;hdmi_blk_ctrl {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_hdmi {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No WiFi/BT chipset on this SoM variant. */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	bluetooth {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB_OTG port is not routed out on PicoITX. */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,over-current-active-low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No WiFi/BT chipset on this SoM variant. */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	/*</div><div class='add'>+	 * The following DHCOM GPIOs are used on this board.</div><div class='add'>+	 * Therefore, they have been removed from the list below.</div><div class='add'>+	 * I: yellow led</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_dhcom_a &amp;pinctrl_dhcom_b &amp;pinctrl_dhcom_c</div><div class='add'>+		     &amp;pinctrl_dhcom_d &amp;pinctrl_dhcom_e &amp;pinctrl_dhcom_f</div><div class='add'>+		     &amp;pinctrl_dhcom_g &amp;pinctrl_dhcom_h &amp;pinctrl_dhcom_j</div><div class='add'>+		     &amp;pinctrl_dhcom_k &amp;pinctrl_dhcom_l &amp;pinctrl_dhcom_m</div><div class='add'>+		     &amp;pinctrl_dhcom_n &amp;pinctrl_dhcom_o &amp;pinctrl_dhcom_p</div><div class='add'>+		     &amp;pinctrl_dhcom_q &amp;pinctrl_dhcom_r &amp;pinctrl_dhcom_s</div><div class='add'>+		     &amp;pinctrl_dhcom_int&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi<br/>index a90e28c07e3f..68c2e0156a5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi</a></div><div class='hunk'>@@ -590,7 +590,7 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {	/* muRata 2AE */</div><div class='add'>+	brcmf: wifi@1 {	/* muRata 2AE */</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "cypress,cyw4373-fmac", "brcm,bcm4329-fmac";</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -609,6 +609,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;ldo5&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts<br/>new file mode 100644<br/>index 000000000000..138f21e257aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 TechNexion Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: Ray Chang &lt;ray.chang@technexion.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include "imx8mp-edm-g.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "technexion,edm-g-imx8mp-wb", "technexion,edm-g-imx8mp", "fsl,imx8mp";</div><div class='add'>+	model = "TechNexion EDM-G-IMX8MP SOM on WB-EDM-G";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+		data-role = "dual";</div><div class='add'>+		label = "USB-C";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hs_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb3_hs_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				ss_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hd3ss3220_in_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "HDMI OUT";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			default-state = "on";</div><div class='add'>+			gpios = &lt;&amp;expander2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "gpio-led";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_refclk: clock-pcie-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pwr_3v3: regulator-pwr-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "pwr-3v3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pwr_5v: regulator-pwr-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "pwr-5v";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-hdmi {</div><div class='add'>+		compatible = "fsl,imx-audio-hdmi";</div><div class='add'>+		audio-cpu = &lt;&amp;aud2htx&gt;;</div><div class='add'>+		hdmi-out;</div><div class='add'>+		model = "audio-hdmi";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8960 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8960";</div><div class='add'>+		audio-asrc = &lt;&amp;easrc&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8960&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HP_L",</div><div class='add'>+			"Headphone Jack", "HP_R",</div><div class='add'>+			"Ext Spk", "SPK_LP",</div><div class='add'>+			"Ext Spk", "SPK_LN",</div><div class='add'>+			"Ext Spk", "SPK_RP",</div><div class='add'>+			"Ext Spk", "SPK_RN",</div><div class='add'>+			"LINPUT1", "Mic Jack",</div><div class='add'>+			"LINPUT1", "Mic Jack",</div><div class='add'>+			"Mic Jack", "MICB";</div><div class='add'>+		model = "wm8960-audio";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aud2htx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;easrc {</div><div class='add'>+	fsl,asrc-rate  = &lt;48000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "DSI_RST", "",</div><div class='add'>+		"", "", "", "", "", "PCIE_CLKREQ_N", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "GPIO_P249", "GPIO_P251",</div><div class='add'>+		"", "GPIO_P255", "", "", "", "", "", "",</div><div class='add'>+		"DSI_BL_EN", "DSI_VDDEN", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			hdmi_tx_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8960: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8960";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_pwr_3v3&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_pwr_3v3&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_pwr_3v3&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_pwr_5v&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_pwr_5v&gt;;</div><div class='add'>+		wlf,gpio-cfg = &lt;1 2&gt;;</div><div class='add'>+		wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='add'>+		wlf,shared-lrclk;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander1: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "EXPOSURE_TRIG_IN1", "FLASH_OUT1",</div><div class='add'>+				  "INFO_TRIG_IN1", "CAM_SHUTTER1", "XVS1",</div><div class='add'>+				  "PWR1_TIME0", "PWR1_TIME1", "PWR1_TIME2",</div><div class='add'>+				  "EXPOSURE_TRIG_IN2", "FLASH_OUT2",</div><div class='add'>+				  "INFO_TRIG_IN2", "CAM_SHUTTER2", "XVS2",</div><div class='add'>+				  "PWR2_TIME0", "PWR2_TIME1", "PWR2_TIME2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander2: gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "M2_DISABLE_N", "LED_EN", "", "",</div><div class='add'>+				  "", "", "", "USB_OTG_OC",</div><div class='add'>+				  "EXT_GPIO8", "EXT_GPIO9", "", "",</div><div class='add'>+				  "", "CSI1_PDB", "CSI2_PDB", "PD_FAULT";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_expander2_irq&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_typec: usb-typec@67 {</div><div class='add'>+		compatible = "ti,hd3ss3220";</div><div class='add'>+		reg = &lt;0x67&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_hd3ss3220_irq&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hd3ss3220_in_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ss_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				hd3ss3220_out_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb3_role_switch&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_0 {</div><div class='add'>+	eeprom2: eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;pcie0_refclk&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_INPUT&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	/* dual role is implemented but not a full featured OTG */</div><div class='add'>+	adp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	srp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			usb3_hs_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hs_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			usb3_role_switch: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hd3ss3220_out_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_expander2_irq: expander2-irqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11		0x140 /* GPIO_P247 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio1: gpio1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x16 /* DSI_RST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__GPIO4_IO06		0x16 /* GPIO_P249 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__GPIO4_IO07		0x16 /* GPIO_P251 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09		0x16 /* GPIO_P255 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16		0x16 /* DSI_BL_EN */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17		0x16 /* DSI_VDDEN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x41 /* GPIO_P253 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x1c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x1c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi<br/>new file mode 100644<br/>index 000000000000..3f1e0837f349<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi</a></div><div class='hunk'>@@ -0,0 +1,786 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 TechNexion Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: Ray Chang &lt;ray.chang@technexion.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_0: i2c {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_i2c_brd_conf&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		scl-gpios = &lt;&amp;gpio4 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;gpio4 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+		eeprom: eeprom@53 {</div><div class='add'>+			compatible = "atmel,24c02";</div><div class='add'>+			reg = &lt;0x53&gt;;</div><div class='add'>+			pagesize = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		reg = &lt;0x0 0x40000000 0 0xc0000000&gt;,</div><div class='add'>+		      &lt;0x1 0x00000000 0 0xc0000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		name = "rfkill";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_bt_ctrl&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		radio-type = "bluetooth";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl_reg_on: regulator-wl-reg-on {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;20000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_wifi_ctrl&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "WL_REG_ON";</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1 &amp;pinctrl_ecspi1_cs&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	snps,force_thresh_dma_mode;</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			eee-broken-1000t;</div><div class='add'>+			reset-assert-us = &lt;35000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;75000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			realtek,clkout-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;4&gt;;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_arm: BUCK2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1025000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_buck5: BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1155000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1045000&gt;;</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1890000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1710000&gt;;</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* I2C_B on EDMG */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	/* I2C_A on EDMG */</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	/* I2C_C on EDMG */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	/* AUD_B on EDMG */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	/* AUD_A on EDMG */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	/* BT */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	/* UART_A on EDMG, console */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	/* UART_C on EDMG */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	/* UART_B on EDMG */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART4&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	/* WIFI SDIO */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	vmmc-supply = &lt;&amp;wl_reg_on&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	/* SD card on baseboard */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	/* eMMC on SOM */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	pinctrl_bt_ctrl: bt-ctrlgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05	0x41 /* BT_REG_ON */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x41 /* BT_WAKE_HOST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1_cs: ecspi1csgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09	0x40000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK	0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI	0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO	0x82</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC			0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO			0x23</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0		0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1		0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2		0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3		0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0		0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1		0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2		0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3		0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09			0x19</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12			0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__CAN1_RX		0x154</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD1__CAN1_TX		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX		0x154</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD	0x40000019</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001a3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001a3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001a3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001a3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL		0x400001a3</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA		0x400001a3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c_brd_conf: i2cbrdconfgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x1c3 /* BRD_CONF_SCL, bitbang */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x1c3 /* BRD_CONF_SDA, bitbang */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x41 /* PCIE CLKREQ */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x41 /* PCIE WAKE */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01	0x41 /* PCIE RST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicirqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT	0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT	0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT		0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT	0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART2_DCE_CTS	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART2_DCE_RTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__UART3_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__UART3_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS	0x140</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__UART3_DCE_RTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__UART4_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__UART4_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__UART4_DCE_CTS	0x140</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__UART4_DCE_RTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0xc6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_ctrl: wifi-ctrlgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00	0x41 /* WL_REG_ON */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x41 /* WL_WAKE_HOST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi<br/>new file mode 100644<br/>index 000000000000..44b30e9b3fde<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	lvds-hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "J2";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			lvds2hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso<br/>new file mode 100644<br/>index 000000000000..4008d2fd36d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;it6263 {</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dual-lvds-odd-pixels;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dual-lvds-even-pixels;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			ldb_lvds_ch1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi<br/>new file mode 100644<br/>index 000000000000..6eae7477abf8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	it6263: hdmi@4c {</div><div class='add'>+		compatible = "ite,it6263";</div><div class='add'>+		reg = &lt;0x4c&gt;;</div><div class='add'>+		data-mapping = "jeida-24";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds_en&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		ivdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		ovdd-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		txavcc18-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		txavcc33-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		pvcc1-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		pvcc2-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		avcc-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		anvdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		apvdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				it6263_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;lvds2hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso<br/>new file mode 100644<br/>index 000000000000..9e11f261ad13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;it6263 {</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso<br/>new file mode 100644<br/>index 000000000000..af2e73e36a1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;it6263 {</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dual-lvds-even-pixels;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dual-lvds-odd-pixels;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			ldb_lvds_ch1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi<br/>new file mode 100644<br/>index 000000000000..8cc9d361c2a4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	it6263: hdmi@4c {</div><div class='add'>+		compatible = "ite,it6263";</div><div class='add'>+		reg = &lt;0x4c&gt;;</div><div class='add'>+		data-mapping = "jeida-24";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds_en&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		ivdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		ovdd-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		txavcc18-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		txavcc33-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		pvcc1-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		pvcc2-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		avcc-supply = &lt;&amp;reg_vext_3v3&gt;;</div><div class='add'>+		anvdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+		apvdd-supply = &lt;&amp;reg_buck5&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				it6263_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;lvds2hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso b/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso<br/>new file mode 100644<br/>index 000000000000..527a893a71b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;it6263 {</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			it6263_lvds_link1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	ports {</div><div class='add'>+		port@2 {</div><div class='add'>+			ldb_lvds_ch1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;it6263_lvds_link1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts<br/>index d26930f1a9e9..3730792daf50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-evk.dts</a></div><div class='hunk'>@@ -74,6 +74,24 @@</div><div class='ctx'> 		clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_audio_pwr: regulator-audio-pwr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -150,37 +168,6 @@</div><div class='ctx'> 		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sound {</div><div class='del'>-		compatible = "simple-audio-card";</div><div class='del'>-		simple-audio-card,name = "wm8960-audio";</div><div class='del'>-		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,frame-master = &lt;&amp;cpudai&gt;;</div><div class='del'>-		simple-audio-card,bitclock-master = &lt;&amp;cpudai&gt;;</div><div class='del'>-		simple-audio-card,widgets =</div><div class='del'>-			"Headphone", "Headphone Jack",</div><div class='del'>-			"Speaker", "External Speaker",</div><div class='del'>-			"Microphone", "Mic Jack";</div><div class='del'>-		simple-audio-card,routing =</div><div class='del'>-			"Headphone Jack", "HP_L",</div><div class='del'>-			"Headphone Jack", "HP_R",</div><div class='del'>-			"External Speaker", "SPK_LP",</div><div class='del'>-			"External Speaker", "SPK_LN",</div><div class='del'>-			"External Speaker", "SPK_RP",</div><div class='del'>-			"External Speaker", "SPK_RN",</div><div class='del'>-			"LINPUT1", "Mic Jack",</div><div class='del'>-			"LINPUT3", "Mic Jack",</div><div class='del'>-			"Mic Jack", "MICB";</div><div class='del'>-</div><div class='del'>-		cpudai: simple-audio-card,cpu {</div><div class='del'>-			sound-dai = &lt;&amp;sai3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		simple-audio-card,codec {</div><div class='del'>-			sound-dai = &lt;&amp;wm8960&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	sound-bt-sco {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "bt-sco-audio";</div><div class='hunk'>@@ -221,6 +208,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound-wm8960 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8960";</div><div class='add'>+		audio-asrc = &lt;&amp;easrc&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8960&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HP_L",</div><div class='add'>+			"Headphone Jack", "HP_R",</div><div class='add'>+			"Ext Spk", "SPK_LP",</div><div class='add'>+			"Ext Spk", "SPK_LN",</div><div class='add'>+			"Ext Spk", "SPK_RP",</div><div class='add'>+			"Ext Spk", "SPK_RN",</div><div class='add'>+			"LINPUT1", "Mic Jack",</div><div class='add'>+			"LINPUT3", "Mic Jack",</div><div class='add'>+			"Mic Jack", "MICB";</div><div class='add'>+		hp-det-gpio = &lt;&amp;gpio4 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		model = "wm8960-audio";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_hpdet&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-xcvr {</div><div class='ctx'> 		compatible = "fsl,imx-audio-card";</div><div class='ctx'> 		model = "imx-audio-xcvr";</div><div class='hunk'>@@ -291,6 +298,21 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsp_reserved {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsp {</div><div class='add'>+	memory-region = &lt;&amp;dsp_vdev0buffer&gt;, &lt;&amp;dsp_vdev0vring0&gt;,</div><div class='add'>+			&lt;&amp;dsp_vdev0vring1&gt;, &lt;&amp;dsp_reserved&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;easrc {</div><div class='add'>+	fsl,asrc-rate = &lt;48000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;eqos {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='hunk'>@@ -586,7 +608,11 @@</div><div class='ctx'> 		wlf,shared-lrclk;</div><div class='ctx'> 		wlf,hp-cfg = &lt;3 2 3&gt;;</div><div class='ctx'> 		wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='ctx'> 		SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pca6416: gpio@20 {</div><div class='hunk'>@@ -668,6 +694,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mu2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie_phy {</div><div class='ctx'> 	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_INPUT&gt;;</div><div class='ctx'> 	clocks = &lt;&amp;pcie0_refclk&gt;;</div><div class='hunk'>@@ -675,7 +705,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pcie {</div><div class='add'>+&amp;pcie0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='ctx'> 	reset-gpio = &lt;&amp;gpio2 7 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -683,6 +713,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwm1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='hunk'>@@ -910,6 +946,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_hpdet: hpdetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c1: i2c1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c2</div><div class='hunk'>@@ -938,6 +980,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lvds_en: lvdsengrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pcie0: pcie0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B	0x60 /* open drain, pull up */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts<br/>new file mode 100644<br/>index 000000000000..00614f5d58ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-sr-som.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-common.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-hdmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP HummingBoard Mate";</div><div class='add'>+	compatible = "solidrun,imx8mp-hummingboard-mate",</div><div class='add'>+		     "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		/delete-property/ ethernet1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	/* this board does not use second phy / ethernet on SoM */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikro_pwm_pins&gt;, &lt;&amp;mikro_int_pins&gt;, &lt;&amp;mikro_rst_pins&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts<br/>new file mode 100644<br/>index 000000000000..36cd452f1583<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-sr-som.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-codec.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-common.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-hdmi.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-m2con.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP HummingBoard Pro";</div><div class='add'>+	compatible = "solidrun,imx8mp-hummingboard-pro",</div><div class='add'>+		     "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikro_pwm_pins&gt;, &lt;&amp;mikro_int_pins&gt;, &lt;&amp;hdmi_pins&gt;,</div><div class='add'>+		    &lt;&amp;m2_wwan_wake_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-0 = &lt;&amp;m2_reset_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;hsio_blk_ctrl&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy0 {</div><div class='add'>+	leds {</div><div class='add'>+		/* ADIN1300 LED_0 pin */</div><div class='add'>+		led@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/delete-node/ led@1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy1 {</div><div class='add'>+	leds {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* ADIN1300 LED_0 pin */</div><div class='add'>+		led@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi<br/>new file mode 100644<br/>index 000000000000..77402a3db9ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-codec.dtsi</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	sound-wm8904 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8904";</div><div class='add'>+		model = "audio-wm8904";</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;codec&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"AMIC", "MICBIAS",</div><div class='add'>+			"IN2R", "AMIC";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	codec: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8904";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		AVDD-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	sai3_pins: pinctrl-sai3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sai3_pins&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG&gt;, &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;,</div><div class='add'>+		 &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1&gt;, &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;;</div><div class='add'>+	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi<br/>new file mode 100644<br/>index 000000000000..825ad6a2ba14<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,384 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;carrier_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "D30";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			label = "D31";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			label = "D32";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			label = "D33";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			label = "D34";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill-mpcie-wifi {</div><div class='add'>+		/*</div><div class='add'>+		 * The mpcie connector only has USB,</div><div class='add'>+		 * therefore this rfkill is for cellular radios only.</div><div class='add'>+		 */</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mpcie_rfkill_pins&gt;;</div><div class='add'>+		label = "mpcie radio";</div><div class='add'>+		radio-type = "wwan";</div><div class='add'>+		/* rfkill-gpio inverts internally */</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc: regulator-mmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vmmc_pins&gt;;</div><div class='add'>+		regulator-name = "vmmc";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus1: regulator-vbus-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus1";</div><div class='add'>+		gpio = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vbus1_pins&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus2: regulator-vbus-2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus2";</div><div class='add'>+		gpio = &lt;&amp;gpio1 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vbus2_pins&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v_1_2: regulator-1-2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmpcie {</div><div class='add'>+		/* supplies mpcie and m2 connectors */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmpcie";</div><div class='add'>+		gpio = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vmpcie_pins&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mikrobus spi */</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikro_spi_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mpcie_reset_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	mpcie-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "mpcie-reset";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	carrier_eeprom: eeprom@57{</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_rtc: rtc@69 {</div><div class='add'>+		compatible = "abracon,ab1805";</div><div class='add'>+		reg = &lt;0x69&gt;;</div><div class='add'>+		abracon,tc-diode = "schottky";</div><div class='add'>+		abracon,tc-resistor = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	csi_pins: pinctrl-csi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* Pin 24: STROBE */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led_pins: pinctrl-led-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22		0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21		0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23		0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24		0x0</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__GPIO5_IO28		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mikro_int_pins: pinctrl-mikro-int-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mikro_pwm_pins: pinctrl-mikro-pwm-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mikro_rst_pins: pinctrl-mikro-rst-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mikro_spi_pins: pinctrl-mikro-spi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__ECSPI2_SS0		0x40000</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mikro_uart_pins: pinctrl-mikro-uart-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x140</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mpcie_reset_pins: pinctrl-mpcie-reset-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mpcie_rfkill_pins: pinctrl-pcie-rfkill-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* weak i/o, open drain */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_hub_pins: pinctrl-usb-hub-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_pins: pinctrl-usdhc2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x140</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus1_pins: pinctrl-vbus-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus2_pins: pinctrl-vbus-2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc_pins: pinctrl-vmmc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19		0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmpcie_pins: pinctrl-vmpcie-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy0 {</div><div class='add'>+	leds {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* ADIN1300 LED_0 pin */</div><div class='add'>+		led@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_ORANGE&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ADIN1300 LINK_ST pin */</div><div class='add'>+		led@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			default-state = "keep";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mikrobus uart */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	fsl,phy-tx-preemp-amp-tune-microamp = &lt;1200&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;vbus2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;vbus1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb_hub_pins&gt;;</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb4b4,6502", "usb4b4,6506";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;v_1_2&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb4b4,6500", "usb4b4,6504";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;v_1_2&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usdhc2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usdhc2_100mhz_pins&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usdhc2_200mhz_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	full-pwr-cycle;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi<br/>new file mode 100644<br/>index 000000000000..d7a999c0d7e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-hdmi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	sound-hdmi {</div><div class='add'>+		compatible = "fsl,imx-audio-hdmi";</div><div class='add'>+		model = "audio-hdmi";</div><div class='add'>+		audio-cpu = &lt;&amp;aud2htx&gt;;</div><div class='add'>+		hdmi-out;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aud2htx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	hdmi_pins: pinctrl-hdmi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x154</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi<br/>new file mode 100644<br/>index 000000000000..8d8d8d2e3da8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-m2con.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	rfkill-m2-gnss {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;m2_gnss_rfkill_pins&gt;;</div><div class='add'>+		label = "m.2 GNSS";</div><div class='add'>+		radio-type = "gps";</div><div class='add'>+		/* rfkill-gpio inverts internally */</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* M.2 is B-keyed, so w-disable is for WWAN */</div><div class='add'>+	rfkill-m2-wwan {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;m2_wwan_rfkill_pins&gt;;</div><div class='add'>+		label = "m.2 WWAN";</div><div class='add'>+		radio-type = "wwan";</div><div class='add'>+		/* rfkill-gpio inverts internally */</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	m2_gnss_rfkill_pins: pinctrl-m2-gnss-rfkill-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* weak i/o, open drain */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m2_reset_pins: pinctrl-m2-reset-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/*</div><div class='add'>+			 * 3.3V domain on SoC, set open-drain to ensure</div><div class='add'>+			 * 1.8V logic on connector</div><div class='add'>+			 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m2_wwan_rfkill_pins: pinctrl-m2-wwan-rfkill-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* weak i/o, open drain */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m2_wwan_wake_pins: pinctrl-m2-wwan-wake-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* weak i/o, open drain */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi<br/>new file mode 100644<br/>index 000000000000..46916ddc0533<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+		type = "c";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;adv7535_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	hdmi@3d {</div><div class='add'>+		compatible = "adi,adv7535";</div><div class='add'>+		reg = &lt;0x3d&gt;, &lt;0x3f&gt;, &lt;0x3c&gt;, &lt;0x38&gt;;</div><div class='add'>+		reg-names = "main", "edid", "cec", "packet";</div><div class='add'>+		adi,dsi-lanes = &lt;4&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		pvdd-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		a2vdd-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+		v3p3-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mini_hdmi_pins&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				adv7535_from_dsim: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dsim_to_adv7535&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				adv7535_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	mini_hdmi_pins: pinctrl-mini-hdmi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	samsung,esc-clock-frequency = &lt;10000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		dsim_to_adv7535: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;adv7535_from_dsim&gt;;</div><div class='add'>+			attach-bridge;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts<br/>new file mode 100644<br/>index 000000000000..d32844c3af05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-sr-som.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-codec.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-common.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-hdmi.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-m2con.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP HummingBoard Pulse";</div><div class='add'>+	compatible = "solidrun,imx8mp-hummingboard-pulse",</div><div class='add'>+		     "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;pcie_eth;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	/* this board does not use second phy / ethernet on SoM */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mpcie_reset_pins&gt;, &lt;&amp;m2_reset_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	m2-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "m2-reset";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikro_pwm_pins&gt;, &lt;&amp;mikro_int_pins&gt;, &lt;&amp;hdmi_pins&gt;,</div><div class='add'>+		    &lt;&amp;m2_wwan_wake_pins&gt;;</div><div class='add'>+</div><div class='add'>+	pcie_eth_pins: pinctrl-pcie-eth-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_eth_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;gpio4 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	root@0,0 {</div><div class='add'>+		compatible = "pci16c3,abcd";</div><div class='add'>+		reg = &lt;0x00000000 0 0 0 0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		/* Intel i210 */</div><div class='add'>+		pcie_eth: ethernet@1,0 {</div><div class='add'>+			compatible = "pci8086,157b";</div><div class='add'>+			reg = &lt;0x00010000 0 0 0 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;hsio_blk_ctrl&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts<br/>new file mode 100644<br/>index 000000000000..4ce5b799b6ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-sr-som.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-common.dtsi"</div><div class='add'>+#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP HummingBoard Ripple";</div><div class='add'>+	compatible = "solidrun,imx8mp-hummingboard-ripple",</div><div class='add'>+		     "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		/delete-property/ ethernet1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	/* this board does not use second phy / ethernet on SoM */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikro_pwm_pins&gt;, &lt;&amp;mikro_int_pins&gt;, &lt;&amp;mikro_rst_pins&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts<br/>new file mode 100644<br/>index 000000000000..f48cf22b423d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts</a></div><div class='hunk'>@@ -0,0 +1,423 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Y Soft</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp";</div><div class='add'>+	model = "Y Soft i.MX8MPlus IOTA2 Lumpy board";</div><div class='add'>+</div><div class='add'>+	beeper {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 500000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "Factory RESET";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_host: regulator-usb-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb_host_vbus&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "usb-host";</div><div class='add'>+		gpio = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		reg = &lt;0x0 0x40000000 0 0x80000000&gt;,</div><div class='add'>+		      &lt;0x1 0x00000000 0 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;1000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;1000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			micrel,led-mode = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;1000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;1000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			micrel,led-mode = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_arm: BUCK2 {</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1025000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1155000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1045000&gt;;</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1890000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1710000&gt;;</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc: rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1341";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC		0x2</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO		0x2</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy0: ethphy0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21		0x10</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22		0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy1: ethphy1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x10</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x2</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x2</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07	0x80</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT	0x102</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x0</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb_host_vbus: usb1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR	0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts<br/>new file mode 100644<br/>index 000000000000..614b4ce330b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts</a></div><div class='hunk'>@@ -0,0 +1,318 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-kontron-osm-s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kontron BL i.MX8MP OSM-S";</div><div class='add'>+	compatible = "kontron,imx8mp-bl-osm-s", "kontron,imx8mp-osm-s", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extcon_usbc: usbc {</div><div class='add'>+		compatible = "linux,extcon-usb-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb1_id&gt;;</div><div class='add'>+		id-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm-beeper {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_panel: regulator-vcc-panel {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VCC_PANEL";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeram@0 {</div><div class='add'>+		compatible = "microchip,48l640";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {	/* Second ethernet (OSM-S ETH_B) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos_rgmii&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id4f51.e91b";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec { /* First ethernet (OSM-S ETH_A) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet_rgmii&gt;;</div><div class='add'>+	phy-connection-type = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id4f51.e91b";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to board usage:</div><div class='add'>+ *   SDIO_A_PWR_EN -&gt; CAN_ADDR2</div><div class='add'>+ *   SDIO_A_WP     -&gt; CAN_ADDR3</div><div class='add'>+ */</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio2&gt;;</div><div class='add'>+	gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "SDIO_A_CD", "SDIO_A_CLK", "SDIO_A_CMD", "SDIO_A_D0",</div><div class='add'>+			  "SDIO_A_D1", "SDIO_A_D2", "SDIO_A_D3", "CAN_ADDR2",</div><div class='add'>+			  "CAN_ADDR3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to board usage:</div><div class='add'>+ *   GPIO_B_0      -&gt; IO_EXP_INT</div><div class='add'>+ *   GPIO_B_1      -&gt; IO_EXP_RST</div><div class='add'>+ */</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5",</div><div class='add'>+			  "SDIO_B_D6", "SDIO_B_D7", "SPI_A_WP", "SPI_A_HOLD",</div><div class='add'>+			  "UART_B_RTS", "UART_B_CTS", "SDIO_B_D0", "SDIO_B_D1",</div><div class='add'>+			  "SDIO_B_D2", "SDIO_B_D3", "SDIO_B_WP", "SDIO_B_D4",</div><div class='add'>+			  "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "IO_EXP_INT",</div><div class='add'>+			  "IO_EXP_RST", "", "BOOT_SEL0", "BOOT_SEL1",</div><div class='add'>+			  "", "", "SDIO_B_CD", "SDIO_B_PWR_EN",</div><div class='add'>+			  "HDMI_CEC", "HDMI_HPD";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to board usage and remove labels for unsed pins:</div><div class='add'>+ *   GPIO_A_6      -&gt; TFT_RESET</div><div class='add'>+ *   GPIO_A_7      -&gt; TFT_STBY</div><div class='add'>+ *   GPIO_B_3      -&gt; CSI_ENABLE</div><div class='add'>+ *   GPIO_B_2      -&gt; USB_HUB_RST</div><div class='add'>+ */</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1",</div><div class='add'>+			  "ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK",</div><div class='add'>+			  "ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3",</div><div class='add'>+			  "ETH_A_TX_EN", "ETH_A_TX_CLK", "CSI_ENABLE", "",</div><div class='add'>+			  "USB_HUB_RST", "TFT_RESET", "CAN_A_TX", "UART_A_CTS",</div><div class='add'>+			  "UART_A_RTS", "CAN_A_RX", "CAN_B_TX", "CAN_B_RX",</div><div class='add'>+			  "TFT_STBY", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to board usage:</div><div class='add'>+ *   SPI_A_SDI	-&gt; CAN_ADDR0</div><div class='add'>+ *   SPI_A_SDO	-&gt; CAN_ADDR1</div><div class='add'>+ */</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio5&gt;;</div><div class='add'>+	gpio-line-names = "I2S_BITCLK", "I2S_A_DATA_OUT", "I2S_MCLK", "PWM_2",</div><div class='add'>+			  "PWM_1", "PWM_0", "SPI_A_SCK", "CAN_ADDR1",</div><div class='add'>+			  "CAN_ADDR0", "SPI_A_CS0", "SPI_B_SCK", "SPI_B_SDO",</div><div class='add'>+			  "SPI_B_SDI", "SPI_B_CS0", "I2C_A_SCL", "I2C_A_SDA",</div><div class='add'>+			  "I2C_B_SCL", "I2C_B_SDA", "PCIE_SMCLK", "PCIE_SMDAT",</div><div class='add'>+			  "I2C_CAM_SCL", "I2C_CAM_SDA", "UART_A_RX", "UART_A_TX",</div><div class='add'>+			  "UART_C_RX", "UART_C_TX", "UART_CON_RX", "UART_CON_TX",</div><div class='add'>+			  "UART_B_RX", "UART_B_TX";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio_expander_dio: io-expander@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "DIO1_OUT","DIO1_IN", "DIO2_OUT","DIO2_IN",</div><div class='add'>+				  "DIO3_OUT","DIO3_IN", "DIO4_OUT","DIO4_IN";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_usdhc2_vcc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	extcon = &lt;&amp;extcon_usbc&gt;;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usb-hub@1 {</div><div class='add'>+		compatible = "usb424,2514";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+	fsl,permanently-attached;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_ethphy0: ethphy0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01		0x46</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy1: ethphy1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x46</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio2: gpio2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19		0x46</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x46</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio5: gpio5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__GPIO5_IO07		0x46 /* CAN_ADR0 */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08		0x46 /* CAN_ADR1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso b/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso<br/>new file mode 100644<br/>index 000000000000..a3cba41d2b53<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtso</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mp-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "Kontron DL i.MX8MP OSM-S";</div><div class='add'>+	compatible = "kontron,imx8mp-bl-osm-s", "kontron,imx8mp-osm-s", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "jenson,bl-jt60050-01a", "panel-lvds";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		data-mapping = "vesa-24";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vcc_panel&gt;;</div><div class='add'>+		height-mm = &lt;86&gt;;</div><div class='add'>+		width-mm = &lt;154&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+			hactive = &lt;1024&gt;;</div><div class='add'>+			hback-porch = &lt;160&gt;;</div><div class='add'>+			hfront-porch = &lt;160&gt;;</div><div class='add'>+			hsync-len = &lt;1&gt;;</div><div class='add'>+			vactive = &lt;600&gt;;</div><div class='add'>+			vback-porch = &lt;23&gt;;</div><div class='add'>+			vfront-porch = &lt;12&gt;;</div><div class='add'>+			vsync-len = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;, &lt;&amp;pinctrl_panel_stby&gt;;</div><div class='add'>+</div><div class='add'>+	panel-rst-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "panel-reset";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel-stby-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "panel-standby";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@5d {</div><div class='add'>+		compatible = "goodix,gt928";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;6 8&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio1 6 0&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;reg_vcc_panel&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_vcc_panel&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 7 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ldb_lvds_ch0 {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in_lvds0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_panel_stby: panelstbygrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi<br/>new file mode 100644<br/>index 000000000000..b97bfeb1c30f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,909 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kontron OSM-S i.MX8MP";</div><div class='add'>+	compatible = "kontron,imx8mp-osm-s", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;rv3028;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/*</div><div class='add'>+		 * There are multiple SoM flavors with different DDR sizes.</div><div class='add'>+		 * The smallest is 1GB. For larger sizes the bootloader will</div><div class='add'>+		 * update the reg property.</div><div class='add'>+		 */</div><div class='add'>+		reg = &lt;0x0 0x40000000 0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb1_vbus&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "VBUS_USB_A";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb2_vbus: regulator-usb2-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb2_vbus&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "VBUS_USB_B";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vcc: regulator-usdhc2-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vcc&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VCC_SDIO_A";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc3_vcc: regulator-usdhc3-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc3_vcc&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VCC_SDIO_B";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_carrier: regulator-vdd-carrier {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_vdd_carrier&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "VDD_CARRIER";</div><div class='add'>+</div><div class='add'>+		regulator-state-standby {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulator-state-disk {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 { /* OSM-S SPI_A */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 { /* OSM-S SPI_B */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 { /* OSM-S CAN_A */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 { /* OSM-S CAN_B */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio1&gt;;</div><div class='add'>+	gpio-line-names = "GPIO_A_0", "GPIO_A_1", "", "",</div><div class='add'>+			  "", "GPIO_A_2", "GPIO_A_3", "GPIO_A_4",</div><div class='add'>+			  "GPIO_A_5", "USB_B_EN", "USB_A_ID", "USB_B_ID",</div><div class='add'>+			  "USB_A_EN", "USB_A_OC","CAM_MCK", "USB_B_OC",</div><div class='add'>+			  "ETH_B_MDC", "ETH_B_MDIO", "ETH_B_TXD3", "ETH_B_TXD2",</div><div class='add'>+			  "ETH_B_TXD1", "ETH_B_TXD0", "ETH_B_TX_EN", "ETH_B_TX_CLK",</div><div class='add'>+			  "ETH_B_RX_DV", "ETH_B_RX_CLK", "ETH_B_RXD0", "ETH_B_RXD1",</div><div class='add'>+			  "ETH_B_RXD2", "ETH_B_RXD3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "SDIO_A_CD", "SDIO_A_CLK", "SDIO_A_CMD", "SDIO_A_D0",</div><div class='add'>+			  "SDIO_A_D1", "SDIO_A_D2", "SDIO_A_D3", "SDIO_A_PWR_EN",</div><div class='add'>+			  "SDIO_A_WP";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio3&gt;;</div><div class='add'>+	gpio-line-names = "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_A_PERST", "SDIO_B_D5",</div><div class='add'>+			  "SDIO_B_D6", "SDIO_B_D7", "SPI_A_WP", "SPI_A_HOLD",</div><div class='add'>+			  "UART_B_RTS", "UART_B_CTS", "SDIO_B_D0", "SDIO_B_D1",</div><div class='add'>+			  "SDIO_B_D2", "SDIO_B_D3", "SDIO_B_WP", "SDIO_B_D4",</div><div class='add'>+			  "PCIE_SM_ALERT", "SDIO_B_CLK", "SDIO_B_CMD", "GPIO_B_0",</div><div class='add'>+			  "GPIO_B_1", "", "BOOT_SEL0", "BOOT_SEL1",</div><div class='add'>+			  "", "", "SDIO_B_CD", "SDIO_B_PWR_EN",</div><div class='add'>+			  "HDMI_CEC", "HDMI_HPD";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+	gpio-line-names = "GPIO_B_5", "GPIO_B_6", "GPIO_B_7", "GPIO_C_0",</div><div class='add'>+			  "ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1",</div><div class='add'>+			  "ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK",</div><div class='add'>+			  "ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3",</div><div class='add'>+			  "ETH_A_TX_EN", "ETH_A_TX_CLK", "GPIO_B_3", "GPIO_B_4",</div><div class='add'>+			  "GPIO_B_2", "GPIO_A_6", "CAN_A_TX", "UART_A_CTS",</div><div class='add'>+			  "UART_A_RTS", "CAN_A_RX", "CAN_B_TX", "CAN_B_RX",</div><div class='add'>+			  "GPIO_A_7", "CARRIER_PWR_EN", "I2S_A_DATA_IN", "I2S_LRCLK";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "I2S_BITCLK", "I2S_A_DATA_OUT", "I2S_MCLK", "PWM_2",</div><div class='add'>+			  "PWM_1", "PWM_0", "SPI_A_SCK", "SPI_A_SDO",</div><div class='add'>+			  "SPI_A_SDI", "SPI_A_CS0", "SPI_B_SCK", "SPI_B_SDO",</div><div class='add'>+			  "SPI_B_SDI", "SPI_B_CS0", "I2C_A_SCL", "I2C_A_SDA",</div><div class='add'>+			  "I2C_B_SCL", "I2C_B_SDA", "PCIE_SMCLK", "PCIE_SMDAT",</div><div class='add'>+			  "I2C_CAM_SCL", "I2C_CAM_SDA", "UART_A_RX", "UART_A_TX",</div><div class='add'>+			  "UART_C_RX", "UART_C_TX", "UART_CON_RX", "UART_CON_TX",</div><div class='add'>+			  "UART_B_RX", "UART_B_TX";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 { /* OSM-S I2C_A */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 { /* OSM-S I2C_B */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 { /* OSM-S PCIe SMDAT/SMCLK */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 { /* OSM-S I2C_CAM */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 { /* PMIC, EEPROM, RTC */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9450: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		nxp,i2c-lt-enable;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_vdd_soc: BUCK1 { /* dual phase with BUCK3 */</div><div class='add'>+				regulator-name = "+0V8_VDD_SOC (BUCK1)";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_arm: BUCK2 {</div><div class='add'>+				regulator-name = "+0V9_VDD_ARM (BUCK2)";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_3v3: BUCK4 {</div><div class='add'>+				regulator-name = "+3V3 (BUCK4)";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_1v8: BUCK5 {</div><div class='add'>+				regulator-name = "+1V8 (BUCK5)";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_nvcc_dram: BUCK6 {</div><div class='add'>+				regulator-name = "+1V1_NVCC_DRAM (BUCK6)";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_nvcc_snvs: LDO1 {</div><div class='add'>+				regulator-name = "+1V8_NVCC_SNVS (LDO1)";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdda: LDO3 {</div><div class='add'>+				regulator-name = "+1V8_VDDA (LDO3)";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_nvcc_sd: LDO5 {</div><div class='add'>+				regulator-name = "NVCC_SD (LDO5)";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				sd-vsel-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "onnn,n24s64b", "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		size = &lt;8192&gt;;</div><div class='add'>+		num-addresses = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rv3028: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 { /* OSM-S PWM_0 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 { /* OSM-S PWM_1 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 { /* OSM-S PWM_2 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 { /* OSM-S I2S_A */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 { /* OSM-S UART_A */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 { /* OSM-S UART_C */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 { /* OSM-S UART_CON */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 { /* OSM-S UART_B */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 { /* OSM-S USB_A */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1_oc&gt;;</div><div class='add'>+	fsl,over-current-active-low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 { /* OSM-S USB_B */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb2_oc&gt;;</div><div class='add'>+	fsl,over-current-active-low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 { /* eMMC */</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 { /* OSM-S SDIO_A */</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;, &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;, &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;, &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vcc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_nvcc_sd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 { /* OSM-S SDIO_B */</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;, &lt;&amp;pinctrl_usdhc3_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;, &lt;&amp;pinctrl_usdhc3_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;, &lt;&amp;pinctrl_usdhc3_gpio&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc3_vcc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_nvcc_sd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio3 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_csi_mck: csimckgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1		0x59 /* CAM_MCK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO		0x44 /* SPI_A_SDI_(IO0) */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI		0x44 /* SPI_A_SDO_(IO1) */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK		0x44 /* SPI_A_SCK */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x40 /* SPI_A_CS0# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x44 /* SPI_B_SDI */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x44 /* SPI_B_SDO */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x44 /* SPI_B_SCK */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x40 /* SPI_B_CS0# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enet_rgmii: enetrgmiigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x3 /* ETH_MDC */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x3 /* ETH_MDIO */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x91 /* ETH_A_(S)(R)(G)MII_RXD0 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x91 /* ETH_A_(S)(R)(G)MII_RXD1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x91 /* ETH_A_(R)(G)MII_RXD2 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x91 /* ETH_A_(R)(G)MII_RXD3 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x91 /* ETH_A_(R)(G)MII_RX_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x91 /* ETH_A_(R)(G)MII_RX_DV(_ER) */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x1f /* ETH_A_(S)(R)(G)MII_TXD0 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x1f /* ETH_A_(S)(R)(G)MII_TXD1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x1f /* ETH_A_(S)(R)(G)MII_TXD2 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x1f /* ETH_A_(S)(R)(G)MII_TXD3 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x1f /* ETH_A_(R)(G)MII_TX_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x1f /* ETH_A_(R)(G)MII_TX_EN(_ER) */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_rgmii: eqosrgmiigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC		0x3 /* ETH_B_MDC */</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO		0x3 /* ETH_B_MDIO */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0	0x91 /* ETH_B_(S)(R)(G)MII_RXD0 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1	0x91 /* ETH_B_(S)(R)(G)MII_RXD1 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2	0x91 /* ETH_B_(R)(G)MII_RXD2 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3	0x91 /* ETH_B_(R)(G)MII_RXD3 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 /* ETH_B_(R)(G)MII_RX_CLK */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x91 /* ETH_B_(R)(G)MII_RX_DV(_ER) */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0	0x1f /* ETH_B_(S)(R)(G)MII_TXD0 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1	0x1f /* ETH_B_(S)(R)(G)MII_TXD1 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2	0x1f /* ETH_B_(S)(R)(G)MII_TXD2 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3	0x1f /* ETH_B_(S)(R)(G)MII_TXD3 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f /* ETH_B_(R)(G)MII_TX_CLK */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x1f /* ETH_B_(R)(G)MII_TX_EN(_ER) */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__CAN1_TX			0x154 /* CAN_A_TX */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXC__CAN1_RX			0x154 /* CAN_A_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX			0x154 /* CAN_B_TX */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX			0x154 /* CAN_B_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio1: gpio1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x19 /* GPIO_A_0 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01		0x19 /* GPIO_A_1 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x19 /* GPIO_A_2 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x19 /* GPIO_A_3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x19 /* GPIO_A_4 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x19 /* GPIO_A_5 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio3: gpio3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01		0x19 /* GPIO_A_7 */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x19 /* GPIO_B_0 */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x19 /* GPIO_B_1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22		0x19 /* BOOT_SEL0# */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23		0x19 /* BOOT_SEL1# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00		0x19 /* GPIO_B_5 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01		0x19 /* GPIO_B_6 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x19 /* GPIO_B_7 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x19 /* GPIO_C_0 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18		0x19 /* GPIO_B_3 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x19 /* GPIO_B_4 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x19 /* GPIO_B_2 */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21		0x19 /* GPIO_A_6 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x19 /* HDMI_HPD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL			0x40000084 /* I2C_A_SCL */</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA			0x40000084 /* I2C_A_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14		0x84 /* I2C_A_SCL */</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15		0x84 /* I2C_A_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL			0x40000084 /* I2C_B_SCL */</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA			0x40000084 /* I2C_B_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16		0x84 /* I2C_B_SCL */</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17		0x84 /* I2C_B_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL			0x40000084 /* PCIe_SMCLK */</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA			0x40000084 /* PCIe_SMDAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18		0x84 /* PCIe_SMCLK */</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19		0x84 /* PCIe_SMDAT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL			0x40000084 /* I2C_CAM_SCL/CSI_TX_P */</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA			0x40000084 /* I2C_CAM_SDA/CSI_TX_N */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4_gpio: i2c4gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20		0x84 /* I2C_CAM_SCL/CSI_TX_P */</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21		0x84 /* I2C_CAM_SDA/CSI_TX_N */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL		0x40000084</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__I2C5_SDA		0x40000084</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21		0x84</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25		0x84</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__PCIE_CLKREQ_B		0x19 /* PCIe_CLKREQ# */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__GPIO3_IO02		0x19 /* PCIe_A_PERST# */</div><div class='add'>+			MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00		0x19 /* PCIe_WAKE# */</div><div class='add'>+			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16		0x19 /* PCIe_SM_ALERT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT		0x6 /* PWM_0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__PWM2_OUT			0x6 /* PWM_1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__PWM3_OUT			0x6 /* PWM_2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb1_vbus: regusb1vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x19 /* USB_A_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb2_vbus: regusb2vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09		0x19 /* USB_B_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vcc: regusdhc2vccgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19		0x19 /* SDIO_A_PWR_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc3_vcc: regusdhc3vccgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27		0x19 /* SDIO_B_PWR_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_vdd_carrier: regvddcarriergrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29		0x19 /* CARRIER_PWR_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00		0xd6 /* I2S_A_DATA_IN */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00		0xd6 /* I2S_A_DATA_OUT */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__AUDIOMIX_SAI3_RX_DATA01		0xd6 /* I2S_B_DATA_IN */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_DATA01		0xd6 /* I2S_B_DATA_OUT */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK		0xd6 /* I2S_MCLK */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA01__AUDIOMIX_SAI3_TX_SYNC		0xd6 /* I2S_LRCLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK		0xd6 /* I2S_BITCLK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX		0x140 /* UART_A_RX */</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX		0x140 /* UART_A_TX */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS		0x140 /* UART_A_CTS */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS		0x140 /* UART_A_RTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x140 /* UART_C_RX */</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x140 /* UART_C_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX		0x140 /* UART_CON_RX */</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX		0x140 /* UART_CON_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA00__UART4_DCE_RX		0x140 /* UART_B_RX */</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX		0x140 /* UART_B_TX */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA03__UART4_DCE_RTS		0x140 /* UART_B_CTS */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA02__UART4_DCE_CTS		0x140 /* UART_B_RTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_id: usb1idgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10		0x1c4 /* USB_A_ID */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_oc: usb1ocgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC		0x1c0 /* USB_A_OC# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb2_id: usb2idgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO11__USB2_OTG_ID		0x1c4 /* USB_B_ID */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb2_oc: usb2ocgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO15__USB2_OTG_OC		0x1c0 /* USB_B_OC# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B	0x141</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE		0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B	0x141</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE		0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B	0x141</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE		0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190 /* SDIO_A_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0 /* SDIO_A_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0 /* SDIO_A_D0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0 /* SDIO_A_D1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0 /* SDIO_A_D2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0 /* SDIO_A_D3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194 /* SDIO_A_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4 /* SDIO_A_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4 /* SDIO_A_D0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4 /* SDIO_A_D1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4 /* SDIO_A_D2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4 /* SDIO_A_D3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196 /* SDIO_A_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6 /* SDIO_A_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6 /* SDIO_A_D0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6 /* SDIO_A_D1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6 /* SDIO_A_D2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6 /* SDIO_A_D3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0x400001d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x19 /* SDIO_A_CD# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_wp: usdhc2wpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__USDHC2_WP			0x400000d6 /* SDIO_A_WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x190 /* SDIO_B_CLK */</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d0 /* SDIO_B_CMD */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d0 /* SDIO_B_D0 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d0 /* SDIO_B_D1 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d0 /* SDIO_B_D2 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d0 /* SDIO_B_D3 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d0 /* SDIO_B_D4 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d0 /* SDIO_B_D5 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d0 /* SDIO_B_D6 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d0 /* SDIO_B_D7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194 /* SDIO_B_CLK */</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4 /* SDIO_B_CMD */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d4 /* SDIO_B_D0 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d4 /* SDIO_B_D1 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d4 /* SDIO_B_D2 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d4 /* SDIO_B_D3 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d4 /* SDIO_B_D4 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d4 /* SDIO_B_D5 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d4 /* SDIO_B_D6 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d4 /* SDIO_B_D7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x196 /* SDIO_B_CLK */</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d6 /* SDIO_B_CMD */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d6 /* SDIO_B_D0 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d6 /* SDIO_B_D1 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d6 /* SDIO_B_D2 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d6 /* SDIO_B_D3 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d6 /* SDIO_B_D4 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d6 /* SDIO_B_D5 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d6 /* SDIO_B_D6 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d6 /* SDIO_B_D7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_gpio: usdhc3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26		0x19 /* SDIO_B_CD# */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14		0x19 /* SDIO_B_WP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B		0xc6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts<br/>new file mode 100644<br/>index 000000000000..2173a36ff691<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts</a></div><div class='hunk'>@@ -0,0 +1,254 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include "imx8mp-kontron-smarc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kontron SMARC Eval Carrier with i.MX8MP";</div><div class='add'>+	compatible = "kontron,imx8mp-smarc-eval-carrier", "kontron,imx8mp-smarc",</div><div class='add'>+		     "kontron,imx8mp-osm-s", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;100&gt;;</div><div class='add'>+		default-brightness-level = &lt;100&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extcon_usbc: usbc {</div><div class='add'>+		compatible = "linux,extcon-usb-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb1_id&gt;;</div><div class='add'>+		id-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "imx8mp-wm8904";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"IN2L", "Line In Jack",</div><div class='add'>+			"IN2R", "Line In Jack",</div><div class='add'>+			"Headphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Headphone Jack";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Headphone Jack",</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Line", "Line In Jack";</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;wm8904&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator_can0: can0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "can0_en";</div><div class='add'>+		gpio = &lt;&amp;expander_pm_out 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator_can1: can1-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "can1_en";</div><div class='add'>+		gpio = &lt;&amp;expander_pm_out 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	xceiver-supply = &lt;&amp;regulator_can0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	xceiver-supply = &lt;&amp;regulator_can1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	expander_pm_out: io-expander@22 {</div><div class='add'>+		compatible = "nxp,pca9554";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "EN_5V0_S0", "EN_3V3_S0", "EN_1V8_S0",</div><div class='add'>+				  "EN_1V5_S0", "EN_12V0_PCIE", "EN_3V3_S5",</div><div class='add'>+				  "CAN0_EN", "CAN1_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander_pm_in: io-expander@24 {</div><div class='add'>+		compatible = "nxp,pca9554";</div><div class='add'>+		reg = &lt;0x24&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "PG_5V0_3V3_S0", "PG_5V0_3V3_S5", "PG_1V8_S0",</div><div class='add'>+				  "PG_1V5_S0", "PG_BKLT_5V", "PG_BKLT_12V";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8904: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8904";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander_audio: io-expander@20 {</div><div class='add'>+		compatible = "nxp,pca9554";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "I2C_SEL_CODEC_LOOPBACK", "FPAH_PRESENCE",</div><div class='add'>+				  "CODEC_OPTION_SW_I2S_HDA", "LINE_IN_JD",</div><div class='add'>+				  "LINE_OUT_JD", "HEADPHONES_JD", "MIC_JD";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&gt;;</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	clocks = &lt;&amp;hsio_blk_ctrl&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio3 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;24576000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	extcon = &lt;&amp;extcon_usbc&gt;;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi<br/>new file mode 100644<br/>index 000000000000..1e831d9b8a93<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,280 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Kontron Electronics GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx8mp-kontron-osm-s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Kontron SMARC i.MX8MP";</div><div class='add'>+	compatible = "kontron,imx8mp-smarc", "kontron,imx8mp-osm-s", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@0 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {	/* Second ethernet (OSM-S ETH_B) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos_rgmii&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id4f51.e91b";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec { /* First ethernet (OSM-S ETH_A) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enet_rgmii&gt;;</div><div class='add'>+	phy-connection-type = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id4f51.e91b";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to SMARC module usage:</div><div class='add'>+ *   GPIO_A_2 -&gt; GPIO0</div><div class='add'>+ *   GPIO_A_3 -&gt; GPIO1</div><div class='add'>+ *   GPIO_A_4 -&gt; GPIO2</div><div class='add'>+ *   GPIO_A_5 -&gt; GPIO3</div><div class='add'>+ *   USB_B_EN -&gt; n.a.</div><div class='add'>+ *   USB_B_ID -&gt; n.a.</div><div class='add'>+ *   USB_B_OC -&gt; n.a.</div><div class='add'>+ */</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names = "GPIO_A_0", "GPIO_A_1", "", "",</div><div class='add'>+			  "", "GPIO0", "GPIO1", "GPIO2",</div><div class='add'>+			  "GPIO3", "", "USB_A_ID", "",</div><div class='add'>+			  "USB_A_EN", "USB_A_OC","CAM_MCK", "",</div><div class='add'>+			  "ETH_B_MDC", "ETH_B_MDIO", "ETH_B_TXD3", "ETH_B_TXD2",</div><div class='add'>+			  "ETH_B_TXD1", "ETH_B_TXD0", "ETH_B_TX_EN", "ETH_B_TX_CLK",</div><div class='add'>+			  "ETH_B_RX_DV", "ETH_B_RX_CLK", "ETH_B_RXD0", "ETH_B_RXD1",</div><div class='add'>+			  "ETH_B_RXD2", "ETH_B_RXD3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to SMARC module usage:</div><div class='add'>+ *   SDIO_A_CD -&gt; SDIO_CD</div><div class='add'>+ *   SDIO_A_CLK -&gt; SDIO_CK</div><div class='add'>+ *   SDIO_A_CMD -&gt; SDIO_CMD</div><div class='add'>+ *   SDIO_A_D0 -&gt; SDIO_D0</div><div class='add'>+ *   SDIO_A_D1 -&gt; SDIO_D1</div><div class='add'>+ *   SDIO_A_D2 -&gt; SDIO_D2</div><div class='add'>+ *   SDIO_A_D3 -&gt; SDIO_D3</div><div class='add'>+ *   SDIO_A_PWR_EN -&gt; SDIO_PWR_EN</div><div class='add'>+ *   SDIO_A_WP -&gt; SDIO_WP</div><div class='add'>+ */</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "SDIO_CD", "SDIO_CK", "SDIO_CMD", "SDIO_D0",</div><div class='add'>+			  "SDIO_D1", "SDIO_D2", "SDIO_D3", "SDIO_PWR_EN",</div><div class='add'>+			  "SDIO_WP";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to SMARC module usage:</div><div class='add'>+ *   PCIE_CLKREQ -&gt; PCIE_A_CKREQ</div><div class='add'>+ *   PCIE_A_PERST -&gt; PCIE_A_RST</div><div class='add'>+ *   SDIO_B_D5 -&gt; n.a.</div><div class='add'>+ *   SDIO_B_D6 -&gt; n.a.</div><div class='add'>+ *   SDIO_B_D7 -&gt; n.a.</div><div class='add'>+ *   SPI_A_WP -&gt; n.a.</div><div class='add'>+ *   SPI_A_HOLD -&gt; n.a.</div><div class='add'>+ *   UART_B_RTS -&gt; SER2_RTS</div><div class='add'>+ *   UART_B_CTS -&gt; SER2_CTS</div><div class='add'>+ *   SDIO_B_D0 -&gt; GPIO8</div><div class='add'>+ *   SDIO_B_D1 -&gt; GPIO9</div><div class='add'>+ *   SDIO_B_D2 -&gt; GPIO10</div><div class='add'>+ *   SDIO_B_D3 -&gt; GPIO11</div><div class='add'>+ *   SDIO_B_WP -&gt; n.a.</div><div class='add'>+ *   SDIO_B_D4 -&gt; n.a.</div><div class='add'>+ *   PCIE_SM_ALERT -&gt; SMB_ALERT</div><div class='add'>+ *   SDIO_B_CLK -&gt; GPIO6</div><div class='add'>+ *   SDIO_B_CMD -&gt; GPIO7</div><div class='add'>+ *   GPIO_B_0 -&gt; LCD0_BKLT_EN</div><div class='add'>+ *   GPIO_B_1 -&gt; LCD1_BKLT_EN</div><div class='add'>+ *   BOOT_SEL0 -&gt; BOOT_SEL2</div><div class='add'>+ *   SDIO_B_CD -&gt; n.a.</div><div class='add'>+ *   SDIO_B_PWR_EN -&gt; n.a.</div><div class='add'>+ *   HDMI_CEC -&gt; n.a.</div><div class='add'>+ *   SDIO_B_PWR_EN -&gt; n.a.</div><div class='add'>+ */</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio3&gt;, &lt;&amp;pinctrl_gpio3_smarc&gt;;</div><div class='add'>+	gpio-line-names = "PCIE_WAKE", "PCIE_A_CKREQ", "PCIE_A_RST", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "SER2_RTS", "SER2_CTS", "GPIO8", "GPIO9",</div><div class='add'>+			  "GPIO10", "GPIO11", "", "",</div><div class='add'>+			  "SMB_ALERT", "GPIO6", "GPIO7", "LCD0_BKLT_EN",</div><div class='add'>+			  "LCD1_BKLT_EN", "", "BOOT_SEL2", "BOOT_SEL1",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "HDMI_HPD";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to SMARC module usage:</div><div class='add'>+ *   GPIO_B_5 -&gt; n.a.</div><div class='add'>+ *   GPIO_B_6 -&gt; n.a.</div><div class='add'>+ *   GPIO_B_7 -&gt; n.a.</div><div class='add'>+ *   GPIO_C_0 -&gt; LED</div><div class='add'>+ *   GPIO_B_3 -&gt; ETH2_INT</div><div class='add'>+ *   GPIO_B_4 -&gt; USB_HUB_RST</div><div class='add'>+ *   GPIO_B_2 -&gt; ETH1_INT</div><div class='add'>+ *   GPIO_A_6 -&gt; GPIO4</div><div class='add'>+ *   CAN_A_TX -&gt; CAN0_TX</div><div class='add'>+ *   UART_A_CTS -&gt; SER0_CTS</div><div class='add'>+ *   UART_A_RTS -&gt; SER0_RTS</div><div class='add'>+ *   CAN_A_RX -&gt; CAN0_RX</div><div class='add'>+ *   CAN_B_TX -&gt; CAN1_TX</div><div class='add'>+ *   CAN_B_RX -&gt; CAN1_RX</div><div class='add'>+ *   GPIO_A_7 -&gt; TEST</div><div class='add'>+ *   I2S_A_DATA_IN -&gt; I2S0_SDIN</div><div class='add'>+ *   I2S_LRCLK -&gt; I2S0_LRCK</div><div class='add'>+ */</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names = "", "", "", "LED",</div><div class='add'>+			  "ETH_A_MDC", "ETH_A_MDIO", "ETH_A_RXD0", "ETH_A_RXD1",</div><div class='add'>+			  "ETH_A_RXD2", "ETH_A_RXD3", "ETH_A_RX_DV", "ETH_A_RX_CLK",</div><div class='add'>+			  "ETH_A_TXD0", "ETH_A_TXD1", "ETH_A_TXD2", "ETH_A_TXD3",</div><div class='add'>+			  "ETH_A_TX_EN", "ETH_A_TX_CLK", "ETH2_INT", "USB_HUB_RST",</div><div class='add'>+			  "ETH1_INT", "GPIO4", "CAN0_TX", "SER0_CTS",</div><div class='add'>+			  "SER0_RTS", "CAN0_RX", "CAN1_TX", "CAN1_RX",</div><div class='add'>+			  "TEST", "CARRIER_PWR_EN", "I2S0_SDIN", "I2S0_LRCK";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Rename SoM signals according to SMARC module usage:</div><div class='add'>+ *   I2S_BITCLK -&gt; I2S0_CK</div><div class='add'>+ *   I2S_A_DATA_OUT -&gt; I2S0_SDOUT</div><div class='add'>+ *   I2S_MCLK -&gt; AUDIO_MCK</div><div class='add'>+ *   PWM_2 -&gt; GPIO5</div><div class='add'>+ *   PWM_1 -&gt; LCD1_BKLT_PWM</div><div class='add'>+ *   PWM_0 -&gt; LCD0_BKLT_PWM</div><div class='add'>+ *   SPI_A_SCK -&gt; SPI0_CK</div><div class='add'>+ *   SPI_A_SDO -&gt; SPI0_DO</div><div class='add'>+ *   SPI_A_SDI -&gt; SPI0_DIN</div><div class='add'>+ *   SPI_A_CS0 -&gt; SPI0_CS0</div><div class='add'>+ *   SPI_B_SCK -&gt; ESPI_CK</div><div class='add'>+ *   SPI_B_SDO -&gt; ESPI_IO_0</div><div class='add'>+ *   SPI_B_SDI -&gt; ESPI_IO_1</div><div class='add'>+ *   SPI_B_CS0 -&gt; ESPI_CS0</div><div class='add'>+ *   I2C_A_SCL -&gt; I2C_PM_CK</div><div class='add'>+ *   I2C_A_SDA -&gt; I2C_PM_DAT</div><div class='add'>+ *   I2C_B_SCL -&gt; I2C_GP_CK</div><div class='add'>+ *   I2C_B_SDA -&gt; I2C_GP_DAT</div><div class='add'>+ *   PCIE_SMCLK -&gt; HDMI_CTRL_CK</div><div class='add'>+ *   PCIE_SMDAT -&gt; HDMI_CTRL_DAT</div><div class='add'>+ *   I2C_CAM_SCL -&gt; I2C_CAM1_CK</div><div class='add'>+ *   I2C_CAM_SDA -&gt; I2C_CAM1_DAT</div><div class='add'>+ *   UART_A_RX -&gt; SER0_RX</div><div class='add'>+ *   UART_A_TX -&gt; SER0_TX</div><div class='add'>+ *   UART_C_RX -&gt; SER3_RX</div><div class='add'>+ *   UART_C_TX -&gt; SER3_TX</div><div class='add'>+ *   UART_CON_RX -&gt; SER1_RX</div><div class='add'>+ *   UART_CON_TX -&gt; SER1_TX</div><div class='add'>+ *   UART_B_RX -&gt; SER2_RX</div><div class='add'>+ *   UART_B_TX -&gt; SER2_TX</div><div class='add'>+ */</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio5_smarc&gt;;</div><div class='add'>+	gpio-line-names = "I2S0_CK", "I2S0_SDOUT", "AUDIO_MCK", "GPIO5",</div><div class='add'>+			  "LCD1_BKLT_PWM", "LCD0_BKLT_PWM", "SPI0_CK", "SPI0_DO",</div><div class='add'>+			  "SPI0_DIN", "SPI0_CS0", "ESPI_CK", "ESPI_IO_0",</div><div class='add'>+			  "ESPI_IO_1", "ESPI_CS0", "I2C_PM_CK", "I2C_PM_DAT",</div><div class='add'>+			  "I2C_GP_CK", "I2C_GP_DAT", "HDMI_CTRL_CK", "HDMI_CTRL_DAT",</div><div class='add'>+			  "I2C_CAM1_CK", "I2C_CAM1_DAT", "SER0_RX", "SER0_TX",</div><div class='add'>+			  "SER3_RX", "SER3_TX", "SER1_RX", "SER1_TX",</div><div class='add'>+			  "SER2_RX", "SER2_TX";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	usb-hub@1 {</div><div class='add'>+		compatible = "usb424,2514";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+	fsl,permanently-attached;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_ethphy0: ethphy0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01		0x46</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy1: ethphy1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x46</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio3_smarc: gpio3smarcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__GPIO3_IO10		0x1d0 /* SMARC GPIO8 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__GPIO3_IO11		0x1d0 /* SMARC GPIO9 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__GPIO3_IO12		0x1d0 /* SMARC GPIO10 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__GPIO3_IO13		0x1d0 /* SMARC GPIO11 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__GPIO3_IO17		0x190 /* SMARC GPIO6 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__GPIO3_IO18		0x1d0 /* SMARC GPIO7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio5_smarc: gpio5smarcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04		0x1d0 /* SMARC GPIO5 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso<br/>new file mode 100644<br/>index 000000000000..1dcf249ca90d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;backlight_lvds0 {</div><div class='add'>+	brightness-levels = &lt;0 8 16 32 64 128 255&gt;;</div><div class='add'>+	default-brightness-level = &lt;8&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;gpio5 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	num-interpolated-steps = &lt;2&gt;;</div><div class='add'>+	pwms = &lt;&amp;pwm1 0 66667 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;, &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to</div><div class='add'>+	 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout</div><div class='add'>+	 * engine can reach accurate pixel clock of exactly 72.4 MHz.</div><div class='add'>+	 */</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;506800000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel0_lvds {</div><div class='add'>+	compatible = "edt,etml1010g3dra";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts<br/>new file mode 100644<br/>index 000000000000..6f3a7b863dca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts</a></div><div class='hunk'>@@ -0,0 +1,290 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "imx8mp-phycore-fpsc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "phytec,imx8mp-libra-rdk-fpsc",</div><div class='add'>+		     "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";</div><div class='add'>+	model = "PHYTEC i.MX8MP Libra RDK FPSC";</div><div class='add'>+</div><div class='add'>+	backlight_lvds0: backlight0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-supply = &lt;&amp;reg_vdd_12v0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel0_lvds: panel-lvds {</div><div class='add'>+		/* compatible panel in overlay */</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can1_stby: regulator-can1-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "can1-stby";</div><div class='add'>+		gpio = &lt;&amp;gpio_expander 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can2_stby: regulator-can2-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "can2-stby";</div><div class='add'>+		gpio = &lt;&amp;gpio_expander 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_12v0: regulator-vdd-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "VDD_12V0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_1v8: regulator-vdd-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "VDD_1V8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_3v3: regulator-vdd-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDD_3V3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_5v0: regulator-vdd-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "VDD_5V0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_50_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_1_50_NS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN FD */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can1_stby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can2_stby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spi_nor: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;80000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "I2C5_SDA",</div><div class='add'>+			  "GPIO1", "", "", "", "SPI1_CS",</div><div class='add'>+			  "", "", "", "SPI2_CS", "I2C1_SCL",</div><div class='add'>+			  "I2C1_SDA", "I2C2_SCL", "I2C2_SDA", "I2C3_SCL", "I2C3_SDA",</div><div class='add'>+			  "", "GPIO2", "", "LVDS1_BL_EN", "SPI3_CS",</div><div class='add'>+			  "", "GPIO3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	leds@62 {</div><div class='add'>+		compatible = "nxp,pca9533";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio_expander: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3",</div><div class='add'>+				  "CSI1_CTRL4", "CSI2_CTRL1", "CSI2_CTRL2",</div><div class='add'>+				  "CSI2_CTRL3", "CSI2_CTRL4", "CLK_EN_AV",</div><div class='add'>+				  "nCAN2_EN", "nCAN1_EN", "PCIE1_nWAKE",</div><div class='add'>+				  "PCIE2_nWAKE", "PCIE2_nALERT_3V3",</div><div class='add'>+				  "UART1_BT_RS_SEL", "UART1_RS232_485_SEL";</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		uart1_bt_rs_sel: bt-rs-hog {</div><div class='add'>+			gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-hog;</div><div class='add'>+			line-name = "UART1_BT_RS_SEL";</div><div class='add'>+			output-low;	/* default RS232/RS485 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1_rs232_485_sel: rs232-485-hog {</div><div class='add'>+			gpios = &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-hog;</div><div class='add'>+			line-name = "UART1_RS232_485_SEL";</div><div class='add'>+			output-high;	/* default RS232 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_lvds0: lvds0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__GPIO5_IO23	0x12</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25	0x1C0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Mini PCIe */</div><div class='add'>+&amp;pcie {</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;hsio_blk_ctrl&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_vdd_io {</div><div class='add'>+	regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rv3028 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+	interrupts = &lt;25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	aux-voltage-chargeable = &lt;1&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* debug console */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD-Card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts b/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts<br/>index 5fd1614982cd..4a4f7c1adc23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-navqp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-navqp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-navqp.dts</a></div><div class='hunk'>@@ -18,6 +18,18 @@</div><div class='ctx'> 		stdout-path = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "J15";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -85,6 +97,28 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			hdmi_tx_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -213,6 +247,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	/* console */</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -279,6 +317,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL			0x1c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA			0x1c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD				0x10</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC				0x10</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c1: i2c1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL					0x400001c3</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts b/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts<br/>new file mode 100644<br/>index 000000000000..1df9488aaeb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-enc-carrier-board.dts</a></div><div class='hunk'>@@ -0,0 +1,452 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2020 Boundary Devices</div><div class='add'>+ * Copyright 2025 Collabora Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-nitrogen-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Boundary Devices Nitrogen8M Plus ENC Carrier Board";</div><div class='add'>+	compatible = "boundary,imx8mp-nitrogen-enc-carrier-board",</div><div class='add'>+			"boundary,imx8mp-nitrogen-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+		data-role = "dual";</div><div class='add'>+		label = "USB-C";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hs_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb3_hs_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				ss_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hd3ss3220_in_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_vbus: regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb_vbus&gt;;</div><div class='add'>+		regulator-name = "usb_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	usb-hub-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		line-name = "usb-hub-reset";</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			hdmi_tx_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_i2c2_pca9546&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+			rtc@52 {</div><div class='add'>+				compatible = "microcrystal,rv3028";</div><div class='add'>+				reg = &lt;0x52&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;gpio1 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_rv3028&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	usb-mux@47 {</div><div class='add'>+		compatible = "ti,hd3ss3220";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_i2c4_hd3ss3220&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hd3ss3220_in_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ss_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				hd3ss3220_out_ep: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb3_role_switch&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART4&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	fsl,over-current-active-low;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb3_0&gt;;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			usb3_hs_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hs_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			usb3_role_switch: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hd3ss3220_out_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;, &lt;&amp;pinctrl_usdhc1_gpio&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x143</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x40000019</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000019</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x100</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07		0x119</div><div class='add'>+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06		0x41</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07		0x41</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08		0x41</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x41</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x41</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04		0x41</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__GPIO5_IO03		0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_pca9546: i2c2-pca9546grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4_hd3ss3220: i2c4-hd3ss3220grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x03</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT		0xd6</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT		0xd6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+		MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT			0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb_vbus: reg-usb-vbusgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rv3028: rv3028grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x140</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x140</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX		0x140</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb3_0: usb3-0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC		0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__USDHC1_VSELECT		0x116</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi<br/>new file mode 100644<br/>index 000000000000..5da0f1b3ed8a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,348 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Boundary Devices</div><div class='add'>+ * Copyright 2024 Silicon Signals Pvt. Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author : Bhavin Sharma &lt;bhavin.sharma@siliconsignals.io&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Boundary Device Nitrogen8MP SMARC SoM";</div><div class='add'>+	compatible = "boundary,imx8mp-nitrogen-smarc-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='add'>+	        compatible = "regulator-fixed";</div><div class='add'>+	        regulator-name = "VSD_3V3";</div><div class='add'>+	        regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	        regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	        gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	        enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+        cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+        cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+        cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+        cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2: LDO2 {</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c6&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mcp23018: gpio@20 {</div><div class='add'>+		compatible = "microchip,mcp23018";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;0x2&gt;;</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+		microchip,irq-mirror;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mcp23018&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Console */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD-card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio_led: gpioledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+		        MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10                     	0x19</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL					0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA					0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6: i2c6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+		        MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL            			0x400001c3</div><div class='add'>+		        MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA                 		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mcp23018: mcp23018grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+		        MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22            			0x1c0</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27             			0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14				0x1c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX                            0x40</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX                            0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        			0x10</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7    			0x150</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE  			0x10</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B 			0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        			0x14</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7    			0x154</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE  			0x14</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        			0x12</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7    			0x152</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE  			0x12</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B				0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts b/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts<br/>new file mode 100644<br/>index 000000000000..46b243218dc8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-smarc-universal-board.dts</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Boundary Devices</div><div class='add'>+ * Copyright 2024 Silicon Signals Pvt. Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author : Bhavin Sharma &lt;bhavin.sharma@siliconsignals.io&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-nitrogen-smarc-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Boundary Device Nitrogen8MP Universal SMARC Carrier Board";</div><div class='add'>+	compatible = "boundary,imx8mp-nitrogen-smarc-universal-board",</div><div class='add'>+			"boundary,imx8mp-nitrogen-smarc-som", "fsl,imx8mp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi<br/>new file mode 100644<br/>index 000000000000..f658309612ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-nitrogen-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,409 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2020 Boundary Devices</div><div class='add'>+ * Copyright 2025 Collabora Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Boundary Devices Nitrogen8M Plus Som";</div><div class='add'>+	compatible = "boundary,imx8mp-nitrogen-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	rfkill-bt {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-bluetooth";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rfkill_bt&gt;;</div><div class='add'>+		radio-type = "bluetooth";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill-wlan {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-wlan";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rfkill_wlan&gt;;</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@4 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			eee-broken-1000t;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "VDD_SOC (BUCK1)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "VDD_ARM (BUCK2)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-name = "VDD_3P3V (BUCK4)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-name = "VDD_1P8V (BUCK5)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "NVCC_DRAM_1P1V (BUCK6)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "NVCC_SNVS_1V8 (LDO1)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {</div><div class='add'>+				regulator-name = "VDDA_1V8 (LDO3)";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "NVCC_SD1 (LDO5)";</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 20 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 21 GPIO_OPEN_DRAIN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-mmc-hs400;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x20</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0xa0</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f</div><div class='add'>+</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__GPIO3_IO02				0x10</div><div class='add'>+			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16				0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4_gpio: i2c4gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20	0x1c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21	0x1c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicirqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00	0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rfkill_bt: rfkill-btgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09	0x119</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rfkill_wlan: rfkill-wlangrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x10</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x150</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01	0x140</div><div class='add'>+</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x14</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x154</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x12</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x152</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x152</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0xc6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi<br/>new file mode 100644<br/>index 000000000000..f269f7a004fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Pengutronix, Ahmad Fatoum &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;clk {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_A53_SRC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_A53_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_SYS_PLL3&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_NOC&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_NOC_IO&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_GIC&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_ARM_PLL_OUT&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL3_OUT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+			       &lt;600000000&gt;,</div><div class='add'>+			       &lt;800000000&gt;,</div><div class='add'>+			       &lt;600000000&gt;,</div><div class='add'>+			       &lt;400000000&gt;;</div><div class='add'>+	fsl,operating-mode = "nominal";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu2d {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU2D_CORE&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu3d {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU3D_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_GPU3D_SHADER_CORE&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;, &lt;800000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pgc_hdmimix {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_133M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;, &lt;133000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pgc_hsiomix {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HSIO_AXI&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pgc_gpumix {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_GPU_AHB&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL3_OUT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL3_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;600000000&gt;, &lt;300000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pgc_mlmix {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_ML_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ML_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ML_AHB&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;,</div><div class='add'>+			       &lt;800000000&gt;,</div><div class='add'>+			       &lt;300000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;media_blk_ctrl {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_MEDIA_APB&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_MEDIA_DISP1_PIX&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_MEDIA_DISP2_PIX&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_MEDIA_ISP&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;, &lt;200000000&gt;,</div><div class='add'>+			       &lt;0&gt;, &lt;0&gt;, &lt;400000000&gt;,</div><div class='add'>+			       &lt;1039500000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu_g1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;600000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu_g2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;500000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpumix_blk_ctrl {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_VPU_PLL&gt;, &lt;&amp;clk IMX8MP_CLK_VPU_BUS&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;600000000&gt;, &lt;600000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;{noc_opp_table/opp-1000000000};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts<br/>index 50debe821c42..436152308642 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> #include "imx8mp-phycore-som.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -32,6 +33,16 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm3 0 50000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	fan0: fan {</div><div class='add'>+		compatible = "gpio-fan";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_fan&gt;;</div><div class='add'>+		gpio-fan,speed-map = &lt;0     0</div><div class='add'>+				      13000 1&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio5 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	panel1_lvds: panel-lvds {</div><div class='ctx'> 		compatible = "edt,etml1010g3dra";</div><div class='ctx'> 		backlight = &lt;&amp;backlight_lvds&gt;;</div><div class='hunk'>@@ -111,6 +122,25 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		soc-thermal {</div><div class='add'>+			trips {</div><div class='add'>+				active1: trip2 {</div><div class='add'>+					temperature = &lt;60000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;active1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;fan0 1 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* TPM */</div><div class='hunk'>@@ -218,6 +248,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;media_blk_ctrl {</div><div class='add'>+	/*</div><div class='add'>+	 * The LVDS panel on this device uses 72.4 MHz pixel clock,</div><div class='add'>+	 * set IMX8MP_VIDEO_PLL1 to 72.4 * 7 = 506.8 MHz so the LDB</div><div class='add'>+	 * serializer and LCDIFv3 scanout engine can reach accurate</div><div class='add'>+	 * pixel clock of exactly 72.4 MHz.</div><div class='add'>+	 */</div><div class='add'>+	assigned-clock-rates = &lt;500000000&gt;, &lt;200000000&gt;,</div><div class='add'>+			       &lt;0&gt;, &lt;0&gt;, &lt;500000000&gt;,</div><div class='add'>+			       &lt;506800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;snvs_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -322,15 +364,16 @@</div><div class='ctx'> </div><div class='ctx'> &amp;gpio1 {</div><div class='ctx'> 	gpio-line-names = "", "", "X_PMIC_WDOG_B", "",</div><div class='del'>-		"PMIC_SD_VSEL", "", "", "", "", "",</div><div class='del'>-		"", "", "USB1_OTG_PWR", "", "", "X_nETHPHY_INT";</div><div class='add'>+		"PMIC_SD_VSEL", "", "", "", "PCIe_nPERST", "LVDS1REG_EN",</div><div class='add'>+		"PCIe_nWAKE", "PCIe_nCLKREQ", "USB1_OTG_PWR", "",</div><div class='add'>+		"PCIe_nW_DISABLE";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio2 {</div><div class='ctx'> 	gpio-line-names = "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "",</div><div class='ctx'> 		"", "", "X_SD2_CD_B", "", "", "",</div><div class='del'>-		"", "", "", "SD2_RESET_B";</div><div class='add'>+		"", "", "", "SD2_RESET_B", "LVDS1_BL_EN";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio3 {</div><div class='hunk'>@@ -344,7 +387,12 @@</div><div class='ctx'> 	gpio-line-names = "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "",</div><div class='del'>-		"", "", "X_PMIC_IRQ_B", "", "nENET0_INT_PWDN";</div><div class='add'>+		"", "", "X_PMIC_IRQ_B", "nRTC_INT", "nENET0_INT_PWDN";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "X_ECSPI1_SSO";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='hunk'>@@ -377,6 +425,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_fan: fan0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04       0x16</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_flexcan1: flexcan1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_SAI5_RXD2__CAN1_RX		0x154</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi<br/>new file mode 100644<br/>index 000000000000..8b0e8cf86cad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-phycore-fpsc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,796 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";</div><div class='add'>+	model = "PHYTEC phyCORE-i.MX8MP FPSC";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;rv3028;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		 compatible = "regulator-fixed";</div><div class='add'>+		 off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		 pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		 pinctrl-names = "default";</div><div class='add'>+		 regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		 regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		 regulator-name = "VDDSW_SD2";</div><div class='add'>+		 startup-delay-us = &lt;100&gt;;</div><div class='add'>+		 gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		 enable-active-high;</div><div class='add'>+	 };</div><div class='add'>+</div><div class='add'>+	reg_vdd_io: regulator-vdd-io {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "VDD_IO";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 { /* FPSC SPI1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 { /* FPSC SPI2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi3 { /* FPSC SPI3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos { /* FPSC RGMII2 */</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec { /* FPSC GB_ETH1 */</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,min-output-impedance;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_50_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_1_50_NS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 { /* FPSC CAN1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 { /* FPSC CAN2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi { /* FPSC QSPI */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "PCIE1_nPERST";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "SD2_RESET_B";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "I2C6_SCL",</div><div class='add'>+			  "I2C6_SDA", "I2C5_SCL";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 { /* FPSC GPIO */</div><div class='add'>+	gpio-line-names = "GPIO6", "RGMII2_nINT", "GPIO7", "GPIO4", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "X_PMIC_IRQ_B", "",</div><div class='add'>+			  "", "GPIO5", "", "", "RGMII2_EVENT_OUT",</div><div class='add'>+			  "", "", "RGMII2_EVENT_IN";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 { /* FPSC GPIO */</div><div class='add'>+	gpio-line-names = "", "", "", "", "I2C5_SDA",</div><div class='add'>+			  "GPIO1", "", "", "", "SPI1_CS",</div><div class='add'>+			  "", "", "", "SPI2_CS", "I2C1_SCL",</div><div class='add'>+			  "I2C1_SDA", "I2C2_SCL", "I2C2_SDA", "I2C3_SCL", "I2C3_SDA",</div><div class='add'>+			  "", "GPIO2", "", "", "SPI3_CS",</div><div class='add'>+			  "", "GPIO3";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 { /* FPSC I2C1 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "VDD_SOC (BUCK1)";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "VDD_ARM (BUCK2)";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "VDD_3V3 (BUCK4)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "VDD_1V8 (BUCK5)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1155000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1045000&gt;;</div><div class='add'>+				regulator-name = "NVCC_DRAM_1V1 (BUCK6)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "NVCC_SNVS_1V8 (LDO1)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "VDDA_1V8 (LDO3)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "NVCC_SD2 (LDO5)";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* User EEPROM */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* factory EEPROM */</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rv3028: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 { /* FPSC I2C2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 { /* FPSC I2C3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 { /* FPSC I2C4 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 { /* FPSC I2C5 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c6_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_flexcan1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__CAN1_TX		0x154	/* CAN1_TX */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXC__CAN1_RX		0x154	/* CAN1_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX		0x154	/* CAN2_TX */</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__CAN2_RX		0x154	/* CAN2_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01				0x10	/* RGMII2_nINT */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27				0x10	/* RGMII2_EVENT_IN */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24				0x10	/* RGMII2_EVENT_OUT */</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x2	/* RGMII2_MDIO */</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x2	/* RGMII2_MDC */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x12	/* RGMII2_TX_D3 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x12	/* RGMII2_TX_D2 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x12	/* RGMII2_TX_D1 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x12	/* RGMII2_TX_D0 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x12	/* RGMII2_TX_CTL */</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x12	/* RGMII2_TXC */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x90	/* RGMII2_RX_D3 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x90	/* RGMII2_RX_D2 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x90	/* RGMII2_RX_D1 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x90	/* RGMII2_RX_D0 */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x90	/* RGMII2_RX_CTL */</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90	/* RGMII2_RXC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x2</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x2</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x140</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x12</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x12</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x14</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x14</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x14</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x14</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexspi: flexspigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B	0x82	/* QSPI_CE */</div><div class='add'>+			MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK		0x1c2	/* QSPI_CLK */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00	0x82	/* QSPI_DATA_0 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01	0x82	/* QSPI_DATA_1 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02	0x82	/* QSPI_DATA_2 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03	0x82	/* QSPI_DATA_3 */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DQS__FLEXSPI_A_DQS		0x82	/* QSPI_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x40	/* GPIO4 */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x106	/* GPIO5 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00	0x106	/* GPIO6 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x106	/* GPIO7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio5: gpio5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05	0x106	/* GPIO1 */</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21	0x106	/* GPIO2 */</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__GPIO5_IO26	0x106	/* GPIO3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x106	/* HDMI_CEC */</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x106	/* HDMI_SCL */</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x106	/* HDMI_SDA */</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x106	/* HDMI_HPD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15	0x1e2</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14	0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c2	/* I2C1_SDA_DNU */</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c2	/* I2C1_SCL_DNU */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x1e2</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2	/* I2C2_SDA */</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2	/* I2C2_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19	0x1e2</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18	0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2	/* I2C3_SDA */</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2	/* I2C3_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04	0x1e2</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21	0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA		0x400001c2	/* I2C4_SDA */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__I2C5_SCL	0x400001c2	/* I2C4_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6_gpio: i2c6gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20	0x1e2</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19	0x1e2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c6: i2c6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA		0x400001c2	/* I2C5_SDA */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL	0x400001c2	/* I2C5_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie0: pcie0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B	0x10	/* PCIE1_nCLKREQ */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08     0x40	/* PCIE1_nPERST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicirqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT	0x106	/* PWM1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT	0x106	/* PWM2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm3: pwm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__PWM3_OUT		0x106	/* PWM3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm4: pwm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT	0x106	/* PWM4 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19    0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai5: sai5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI5_MCLK	0x106	/* SAI1_MCLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__AUDIOMIX_SAI5_RX_SYNC	0x106	/* SAI1_RX_SYNC */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__AUDIOMIX_SAI5_RX_BCLK	0x106	/* SAI1_RX_BCLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI5_RX_DATA00	0x106	/* SAI1_RX_DATA */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC	0x106	/* SAI1_TX_SYNC */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK	0x106	/* SAI1_TX_BCLK */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI5_TX_DATA00	0x106	/* SAI1_TX_DATA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: spi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK	0x82	/* SPI1_SCLK */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI	0x82	/* SPI1_MOSI */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO	0x82	/* SPI1_MISO */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09	0x106	/* SPI1_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: spi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x82	/* SPI2_SCLK */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x82	/* SPI2_MOSI */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x82	/* SPI2_MISO */</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x106     /* SPI2_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi3: spi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__ECSPI3_SCLK	0x82	/* SPI3_SCLK */</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__ECSPI3_MOSI	0x82	/* SPI3_MOSI */</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__ECSPI3_MISO	0x82	/* SPI3_MISO */</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__GPIO5_IO24	0x106     /* SPI3_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXC__UART2_DTE_RX	0x140	/* UART2_RXD */</div><div class='add'>+			MX8MP_IOMUXC_SAI3_TXFS__UART2_DTE_TX	0x140	/* UART2_TXD */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__UART2_DTE_RTS	0x140	/* UART2_RTS */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA4__UART2_DTE_CTS	0x140	/* UART2_CTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__UART3_DTE_RX	0x140	/* UART1_RXD */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__UART3_DTE_TX	0x140	/* UART1_TXD */</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__UART3_DTE_RTS	0x140	/* UART1_RTS */</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__UART3_DTE_CTS	0x140	/* UART1_CTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX	0x140	/* UART3_RXD */</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140	/* UART3_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb0: usb0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR	0x106	/* USB1_PWR_EN */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC	0x106	/* USB1_OC */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID	0x106	/* USB1_ID */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1: usb1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR	0x106	/* USB2_PWR_EN */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO15__USB2_OTG_OC	0x106	/* USB2_OC */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO11__USB2_OTG_ID	0x106	/* USB2_ID */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__USDHC1_WP	0x106	/* SDIO_WP */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__USDHC1_CD_B	0x106	/* SDIO_CD */</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x106	/* SDIO_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x106	/* SDIO_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x106	/* SDIO_DATA0 */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x106	/* SDIO_DATA1 */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x106	/* SDIO_DATA2 */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x106	/* SDIO_DATA3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B	0x40	/* SDCARD_CD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__USDHC2_WP		0x40	/* SDCARD_WP */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190	/* SDCARD_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0	/* SDCARD_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0	/* SDCARD_DATA0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0	/* SDCARD_DATA1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0	/* SDCARD_DATA2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0	/* SDCARD_DATA3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B	0x40	/* SDCARD_CD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__USDHC2_WP		0x40	/* SDCARD_WP */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194	/* SDCARD_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4	/* SDCARD_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4	/* SDCARD_DATA0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4	/* SDCARD_DATA1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4	/* SDCARD_DATA2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4	/* SDCARD_DATA3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B	0x40	/* SDCARD_CD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__USDHC2_WP		0x40	/* SDCARD_WP */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196	/* SDCARD_CLK */</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6	/* SDCARD_CMD */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6	/* SDCARD_DATA0 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6	/* SDCARD_DATA1 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6	/* SDCARD_DATA2 */</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6	/* SDCARD_DATA3 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0xe6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie { /* FPSC PCIE1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 { /* FPSC PWM1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 { /* FPSC PWM2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 { /* FPSC PWM3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 { /* FPSC PWM4 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai5 { /* FPSC SAI1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 { /* FPSC UART2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,dte-mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 { /* FPSC UART1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,dte-mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 { /* FPSC UART3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 { /* FPSC USB1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 { /* FPSC USB2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 { /* FPSC SDIO */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 { /* FPSC SDCARD */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;ldo5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3_ROOT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi<br/>index a5ecdca8bc0e..04f724c6ec21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi</a></div><div class='hunk'>@@ -209,9 +209,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio1 {</div><div class='del'>-	gpio-line-names = "", "", "X_PMIC_WDOG_B", "",</div><div class='del'>-		"", "", "", "", "", "",</div><div class='del'>-		"", "", "", "", "", "X_nETHPHY_INT";</div><div class='add'>+	gpio-line-names = "", "", "X_PMIC_WDOG_B";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio4 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h<br/>index 0fef066471ba..16f5899de415 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h</a></div><div class='hunk'>@@ -6,6 +6,39 @@</div><div class='ctx'> #ifndef __DTS_IMX8MP_PINFUNC_H</div><div class='ctx'> #define __DTS_IMX8MP_PINFUNC_H</div><div class='ctx'> </div><div class='add'>+/* Drive Strength */</div><div class='add'>+#define MX8MP_DSE_X1		0x0</div><div class='add'>+#define MX8MP_DSE_X2		0x4</div><div class='add'>+#define MX8MP_DSE_X4		0x2</div><div class='add'>+#define MX8MP_DSE_X6		0x6</div><div class='add'>+</div><div class='add'>+/* Slew Rate */</div><div class='add'>+#define MX8MP_FSEL_FAST		0x10</div><div class='add'>+#define MX8MP_FSEL_SLOW		0x0</div><div class='add'>+</div><div class='add'>+/* Open Drain */</div><div class='add'>+#define MX8MP_ODE_ENABLE	0x20</div><div class='add'>+#define MX8MP_ODE_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+#define MX8MP_PULL_DOWN		0x0</div><div class='add'>+#define MX8MP_PULL_UP		0x40</div><div class='add'>+</div><div class='add'>+/* Hysteresis */</div><div class='add'>+#define MX8MP_HYS_CMOS		0x0</div><div class='add'>+#define MX8MP_HYS_SCHMITT	0x80</div><div class='add'>+</div><div class='add'>+#define MX8MP_PULL_ENABLE	0x100</div><div class='add'>+#define MX8MP_PULL_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+/* SION force input mode */</div><div class='add'>+#define MX8MP_SION		0x40000000</div><div class='add'>+</div><div class='add'>+/* long defaults */</div><div class='add'>+#define MX8MP_USDHC_DATA_DEFAULT (MX8MP_FSEL_FAST | MX8MP_PULL_UP | \</div><div class='add'>+				  MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+#define MX8MP_I2C_DEFAULT (MX8MP_DSE_X6 | MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | \</div><div class='add'>+			   MX8MP_PULL_ENABLE | MX8MP_SION)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The pin function ID is a tuple of</div><div class='ctx'>  * &lt;mux_reg conf_reg input_reg mux_mode input_val&gt;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts<br/>new file mode 100644<br/>index 000000000000..5a2629f3567c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-basic.dts</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-skov-reva.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SKOV IMX8MP CPU basic/fallback";</div><div class='add'>+	compatible = "skov,imx8mp-skov-basic", "fsl,imx8mp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi<br/>index 59813ef8e2bb..020f20c8ce66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='ctx'> </div><div class='ctx'> #include "imx8mp.dtsi"</div><div class='add'>+#include "imx8mp-nominal.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -116,6 +117,11 @@</div><div class='ctx'> 		regulator-name = "24V";</div><div class='ctx'> 		regulator-min-microvolt = &lt;24000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;24000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg24v&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		system-critical-regulator;</div><div class='add'>+		regulator-uv-less-critical-window-ms = &lt;50&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_can2rs: regulator-can2rs {</div><div class='hunk'>@@ -163,6 +169,19 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Board is passively cooled and heatsink is specced for continuous operation</div><div class='add'>+ * at 1.2 GHz only. Short bouts of 1.6 GHz are ok, but these should be done</div><div class='add'>+ * intentionally, not as part of suspend/resume cycles.</div><div class='add'>+ */</div><div class='add'>+&amp;{/opp-table/opp-1600000000} {</div><div class='add'>+	/delete-property/ opp-suspend;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{/opp-table/opp-1800000000} {</div><div class='add'>+	/delete-property/ opp-suspend;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;A53_0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -197,7 +216,7 @@</div><div class='ctx'> &amp;eqos {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='del'>-	phy-mode = "rgmii-txid";</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	fixed-link {</div><div class='hunk'>@@ -222,8 +241,11 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pmic@25 {</div><div class='hunk'>@@ -232,13 +254,12 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;gpio1 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		sd-vsel-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			reg_vdd_soc: BUCK1 {</div><div class='ctx'> 				regulator-name = "VDD_SOC";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -247,20 +268,20 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_vdd_arm: BUCK2 {</div><div class='ctx'> 				regulator-name = "VDD_ARM";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-ramp-delay = &lt;3125&gt;;</div><div class='del'>-				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;850000&gt;;</div><div class='ctx'> 				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			reg_vdd_3v3: BUCK4 {</div><div class='ctx'> 				regulator-name = "VDD_3V3";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -268,8 +289,8 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_vdd_1v8: BUCK5 {</div><div class='ctx'> 				regulator-name = "VDD_1V8";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -277,8 +298,8 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_nvcc_dram_1v1: BUCK6 {</div><div class='ctx'> 				regulator-name = "NVCC_DRAM_1V1";</div><div class='del'>-				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -286,8 +307,8 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_nvcc_snvs_1v8: LDO1 {</div><div class='ctx'> 				regulator-name = "NVCC_SNVS_1V8";</div><div class='del'>-				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -295,8 +316,8 @@</div><div class='ctx'> </div><div class='ctx'> 			reg_vdda_1v8: LDO3 {</div><div class='ctx'> 				regulator-name = "VDDA_1V8";</div><div class='del'>-				regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				vin-supply = &lt;&amp;reg_5v_p&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='hunk'>@@ -314,10 +335,21 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c3 {</div><div class='del'>-	clock-frequency = &lt;100000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	i2c_rtc: rtc@51 {</div><div class='hunk'>@@ -332,8 +364,11 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	clock-frequency = &lt;380000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	switch: switch@5f {</div><div class='hunk'>@@ -391,6 +426,13 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	/*</div><div class='add'>+	 * While there is no CTS line, the property "uart-has-rtscts" is still</div><div class='add'>+	 * the right thing to do to enable the UART to do RS485. In RS485-Mode</div><div class='add'>+	 * CTS isn't used anyhow and there is no dedicated property</div><div class='add'>+	 * "uart-has-rts-but-no-cts".</div><div class='add'>+	 */</div><div class='add'>+	uart-has-rtscts;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart2 {</div><div class='hunk'>@@ -538,6 +580,27 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL				0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA				0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c3: i2c3grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL				0x400001c2</div><div class='hunk'>@@ -545,6 +608,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c4: i2c4grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL				0x400001c3</div><div class='hunk'>@@ -552,10 +622,16 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_i2c4_gpio: i2c4gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pmic: pmicirqgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03			0x41</div><div class='del'>-			MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04			0x41</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -571,6 +647,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_reg24v: reg24vgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23			0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_reg_vsd_3v3: regvsd3v3grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40</div><div class='hunk'>@@ -605,6 +687,8 @@</div><div class='ctx'> 			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX			0x140</div><div class='ctx'> 			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX			0x140</div><div class='ctx'> 			MX8MP_IOMUXC_UART3_RXD__UART1_DTE_RTS			0x140</div><div class='add'>+			/* CTS pin is not connected, but needed as workaround */</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART1_DTE_CTS			0x140</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -623,6 +707,7 @@</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1			0x1d0</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2			0x1d0</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3			0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT			0xc0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -634,6 +719,7 @@</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1			0x1d4</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2			0x1d4</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3			0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT			0xc0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -645,6 +731,7 @@</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1			0x1d6</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2			0x1d6</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3			0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT			0xc0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts<br/>index c1ca69da3cb8..32a429437cbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts</a></div><div class='hunk'>@@ -9,12 +9,53 @@</div><div class='ctx'> 	compatible = "skov,imx8mp-skov-revb-hdmi", "fsl,imx8mp";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl_hdmi: hdmigrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL		0x1c3</div><div class='del'>-			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA		0x1c3</div><div class='ctx'> 			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD			0x19</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts<br/>index ccbd3abedd69..e602c1c96143 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts</a></div><div class='hunk'>@@ -8,6 +8,45 @@</div><div class='ctx'> 	model = "SKOV IMX8MP CPU revB - LT6";</div><div class='ctx'> 	compatible = "skov,imx8mp-skov-revb-lt6", "fsl,imx8mp";</div><div class='ctx'> </div><div class='add'>+	lvds-decoder {</div><div class='add'>+		compatible = "ti,sn65lvds822", "lvds-decoder";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				in_lvds1: endpoint {</div><div class='add'>+					data-mapping = "vesa-24";</div><div class='add'>+					remote-endpoint = &lt;&amp;ldb_lvds_ch1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_decoder_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "logictechno,lttd800480070-l6wh-rt";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_tft_vcom&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds_decoder_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	touchscreen {</div><div class='ctx'> 		compatible = "resistive-adc-touch";</div><div class='ctx'> 		io-channels = &lt;&amp;adc_ts 1&gt;, &lt;&amp;adc_ts 3&gt;, &lt;&amp;adc_ts 4&gt;, &lt;&amp;adc_ts 5&gt;;</div><div class='hunk'>@@ -44,7 +83,7 @@</div><div class='ctx'> 		compatible = "ti,tsc2046e-adc";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_touch&gt;;</div><div class='del'>-		pinctrl-names ="default";</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> 		spi-max-frequency = &lt;1000000&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;gpio4 25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		#io-channel-cells = &lt;1&gt;;</div><div class='hunk'>@@ -78,6 +117,27 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;;</div><div class='add'>+	/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;462000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@2 {</div><div class='add'>+			ldb_lvds_ch1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;in_lvds1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pwm1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts<br/>index 3c2efdc59bfa..45c9a6d55bc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts</a></div><div class='hunk'>@@ -27,8 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	touchscreen@38 {</div><div class='hunk'>@@ -51,8 +49,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lvds_bridge {</div><div class='del'>-	/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */</div><div class='del'>-	assigned-clock-rates = &lt;482300000&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;;</div><div class='add'>+	/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;980000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='hunk'>@@ -64,17 +65,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;media_blk_ctrl {</div><div class='del'>-	/* currently it is not possible to let display clocks confugure</div><div class='del'>-	 * automatically, so we need to set them manually</div><div class='del'>-	 */</div><div class='del'>-	assigned-clock-rates = &lt;500000000&gt;, &lt;200000000&gt;, &lt;0&gt;,</div><div class='del'>-		/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */</div><div class='del'>-		&lt;68900000&gt;,</div><div class='del'>-		/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */</div><div class='del'>-		&lt;964600000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pwm4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -89,12 +79,3 @@</div><div class='ctx'> 	voltage-table = &lt;3160000 73&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;iomuxc {</div><div class='del'>-	pinctrl_i2c2: i2c2grp {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL				0x400001c2</div><div class='del'>-			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA				0x400001c2</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts<br/>new file mode 100644<br/>index 000000000000..b816c6cd3bca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-revc-bd500.dts</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-skov-reva.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SKOV IMX8MP CPU revC - bd500";</div><div class='add'>+	compatible = "skov,imx8mp-skov-revc-bd500", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_system_red: led-3 {</div><div class='add'>+			label = "bd500:system:red";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			/* Inverted compared to others due to NMOS inverter */</div><div class='add'>+			gpios = &lt;&amp;gpioexp 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_system_green: led-4 {</div><div class='add'>+			label = "bd500:system:green";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioexp 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_lan1_red: led-5 {</div><div class='add'>+			label = "bd500:lan1:act";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			gpios = &lt;&amp;gpioexp 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_lan1_green: led-6 {</div><div class='add'>+			label = "bd500:lan1:link";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			gpios = &lt;&amp;gpioexp 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_lan2_red: led-7 {</div><div class='add'>+			label = "bd500:lan2:act";</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			gpios = &lt;&amp;gpioexp 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_lan2_green: led-8 {</div><div class='add'>+			label = "bd500:lan2:link";</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			gpios = &lt;&amp;gpioexp 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-1 {</div><div class='add'>+			label = "S1";</div><div class='add'>+			linux,code = &lt;KEY_CONFIG&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioexp 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpioexp: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_exp&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 28 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio_exp: gpioexpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts<br/>new file mode 100644<br/>index 000000000000..9a562c011f2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-skov-revc-tian-g07017.dts</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-skov-reva.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SKOV IMX8MP CPU revC - TIAN G07017";</div><div class='add'>+	compatible = "skov,imx8mp-skov-revc-tian-g07017", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "topland,tian-g07017-01";</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_tft_vcom&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			in_lvds0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;backlight {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5506";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touchscreen&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 28 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;1024&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;600&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_VIDEO_PLL1_OUT&gt;;</div><div class='add'>+	/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;358400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;in_lvds0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_tft_vcom {</div><div class='add'>+	regulator-min-microvolt = &lt;3160000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;3160000&gt;;</div><div class='add'>+	voltage-table = &lt;3160000 73&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi<br/>new file mode 100644<br/>index 000000000000..4e6629f940bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,591 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun i.MX8MP SoM";</div><div class='add'>+	compatible = "solidrun,imx8mp-sr-som", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "earlycon=ec_imx6q,0x30890000,115200";</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0 0xc0000000&gt;,</div><div class='add'>+		      &lt;0x1 0x00000000 0 0xc0000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc1_pwrseq: usdhc1-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v_1_8: regulator-1-8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v_3_3: regulator-3-3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reserve all physical memory from within the first 1GB of DDR address</div><div class='add'>+ * space to avoid panic on low memory systems.</div><div class='add'>+ */</div><div class='add'>+&amp;dsp_reserved {</div><div class='add'>+	reg = &lt;0 0x6f000000 0 0x1000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eqos_pins&gt;, &lt;&amp;phy0_pins&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy = &lt;&amp;phy0&gt;;</div><div class='add'>+	snps,force_thresh_dma_mode;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;5&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fec_pins&gt;, &lt;&amp;phy1_pins&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy = &lt;&amp;phy1&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_gpio_pins&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		nxp,i2c-lt-enable;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4{</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5{</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2: LDO2 {</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_eeprom: eeprom@50{</div><div class='add'>+		compatible = "st,24c01", "atmel,24c01";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c2_gpio_pins&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c3_gpio_pins&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	/* routed to basler camera connector */</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c4_gpio_pins&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	eqos_pins: pinctrl-eqos-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC		0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO		0x3</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x91</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0	0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1	0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2	0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3	0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x1f</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fec_pins: pinctrl-fec-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x3</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x3</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x91</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x1f</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x1f</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: pinctrl-i2c1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_gpio_pins: pinctrl-i2c1-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: pinctrl-i2c2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_gpio_pins: pinctrl-i2c2-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: pinctrl-i2c3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_gpio_pins: pinctrl-i2c3-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18		0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19		0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: pinctrl-i2c4-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_gpio_pins: pinctrl-i2c4-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20			0x400001c3</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21			0x400001c3</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phy0_pins: pinctrl-phy0-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* RESET_N: weak i/o, open drain, external 1k pull-up */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x20</div><div class='add'>+			/* INT_N: weak i/o, open drain, internal pull-up */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18		0x160</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phy1_pins: pinctrl-phy-1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			/* RESET_N: weak i/o, open drain, external 1k pull-up */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x20</div><div class='add'>+			/* INT_N: weak i/o, open drain, internal pull-up */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x160</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_pins: pinctrl-pmic-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x41</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_pins: pinctrl-uart1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX		0x140</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX		0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS		0x140</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS		0x140</div><div class='add'>+			/* BT_REG_ON */</div><div class='add'>+			MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10		0x0</div><div class='add'>+			/* BT_WAKE_DEV */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07		0x0</div><div class='add'>+			/* BT_WAKE_HOST */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_pins: pinctrl-uart2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x49</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x49</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc1_pins: pinctrl-usdhc1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d0</div><div class='add'>+			/* WL_REG_ON */</div><div class='add'>+			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11		0x0</div><div class='add'>+			/* WL_WAKE_HOST */</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09		0x100</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc1_100mhz_pins: pinctrl-usdhc1g-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc1_200mhz_pins: pinctrl-usdhc1-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3		0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_pins: pinctrl-usdhc3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x190</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_100mhz_pins: pinctrl-usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_200mhz_pins: pinctrl-usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x196</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wdog1_pins: pinctrl-wdog1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B		0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	/* select 80MHz parent clock to support maximum baudrate 4Mbps */</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_UART1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_80M&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio2 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/* Murata 1MW module supports max. 3M baud */</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usdhc1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usdhc1_100mhz_pins&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usdhc1_200mhz_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc1_pwrseq&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usdhc3_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usdhc3_100mhz_pins&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usdhc3_200mhz_pins&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;v_3_3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wdog1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts<br/>new file mode 100644<br/>index 000000000000..6f9dcd3a75c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts</a></div><div class='hunk'>@@ -0,0 +1,300 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (C) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-toradex-smarc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex SMARC iMX8M Plus on Toradex SMARC Development Board";</div><div class='add'>+	compatible = "toradex,smarc-imx8mp-dev",</div><div class='add'>+		     "toradex,smarc-imx8mp",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	hdmi-connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "J64";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			native_hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_tx_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_carrier_1p8v: regulator-carrier-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "On-carrier 1V8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "tdx-smarc-wm8904";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"IN2L", "Line In Jack",</div><div class='add'>+			"IN2R", "Line In Jack",</div><div class='add'>+			"Microphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Microphone Jack";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Line", "Line In Jack";</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;wm8904_1a&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aud2htx {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SPI0 */</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC GBE0 */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC GBE1 */</div><div class='add'>+&amp;fec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC CAN1 */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC CAN0 */</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio8&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio9&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio10&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio11&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio12&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio13&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio4&gt;, &lt;&amp;pinctrl_gpio6&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC HDMI */</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			hdmi_tx_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;native_hdmi_connector_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_LCD */</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9543";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* I2C on DSI Connector Pins 4/6 */</div><div class='add'>+		i2c_dsi_0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* I2C on DSI Connector Pins 52/54 */</div><div class='add'>+		i2c_dsi_1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_CAM0 */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_GP */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	/* Audio Codec */</div><div class='add'>+	wm8904_1a: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8904";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;, &lt;&amp;pinctrl_sai1_mclk&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_carrier_1p8v&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_carrier_1p8v&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_carrier_1p8v&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_carrier_1p8v&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_carrier_1p8v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-Carrier Temperature Sensor */</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-Carrier EEPROM */</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_CAM1 */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_PM */</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Fan controller */</div><div class='add'>+	fan_controller: fan@18 {</div><div class='add'>+		compatible = "ti,amc6821";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		fan {</div><div class='add'>+			cooling-levels = &lt;255&gt;;</div><div class='add'>+			pwms = &lt;&amp;fan_controller 40000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Current measurement into module VDD */</div><div class='add'>+	hwmon@40 {</div><div class='add'>+		compatible = "ti,ina226";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor = &lt;5000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC PCIE_A, M2 Key B */</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC LCD1_BKLT_PWM */</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC LCD0_BKLT_PWM */</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2S0 */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;24576000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC HDMI Audio */</div><div class='add'>+&amp;sound_hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER0, RS485. Optional M.2 KEY E */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rts-active-low;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER2 */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER1, used as the Linux Console */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC USB0 */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC USB1..4 */</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SDIO */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi<br/>new file mode 100644<br/>index 000000000000..bebe19eb360f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1308 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/* Copyright (C) 2025 Toradex */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		can0 = &amp;flexcan2;</div><div class='add'>+		can1 = &amp;flexcan1;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		mmc0 = &amp;usdhc3;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		mmc2 = &amp;usdhc1;</div><div class='add'>+		rtc0 = &amp;rtc_i2c;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial1 = &amp;uart4;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb0_id&gt;;</div><div class='add'>+		id-gpios = &lt;&amp;gpio5 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		label = "USB0";</div><div class='add'>+		self-powered;</div><div class='add'>+		type = "micro";</div><div class='add'>+		vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_dr_connector: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb3_0_dwc&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sleep&gt;;</div><div class='add'>+</div><div class='add'>+		smarc_key_sleep: key-sleep {</div><div class='add'>+			gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "SMARC_SLEEP#";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smarc_switch_lid: switch-lid {</div><div class='add'>+			gpios = &lt;&amp;som_ec_gpio_expander 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "SMARC_LID#";</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb0_vbus: regulator-usb0-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb0_en_oc&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-name = "USB0_EN_OC#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb1_vbus: regulator-usb1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb1_en_oc&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-name = "USB2_EN_OC#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_pwr_en&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		off-on-delay-us = &lt;100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "3V3_SD";</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_vsel&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;,</div><div class='add'>+			 &lt;3300000 0x0&gt;;</div><div class='add'>+		regulator-name = "PMIC_USDHC_VSELECT";</div><div class='add'>+		vin-supply = &lt;&amp;reg_sd_3v3_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_wifi_en: regulator-wifi-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_wifi_pwr_en&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio3 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "CTRL_EN_WIFI";</div><div class='add'>+		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			size = &lt;0 0x20000000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0 0x40000000 0 0x80000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound_hdmi: sound-hdmi {</div><div class='add'>+		compatible = "fsl,imx-audio-hdmi";</div><div class='add'>+		model = "audio-hdmi";</div><div class='add'>+		audio-cpu = &lt;&amp;aud2htx&gt;;</div><div class='add'>+		hdmi-out;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SPI0 */</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;, &lt;&amp;gpio4 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SPI1 */</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2&gt;, &lt;&amp;pinctrl_tpm_cs&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio4 3 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@2 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC GBE0 */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_eth_mdio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_eqos_1588_event&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;eqos_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	snps,force_thresh_dma_mode;</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+</div><div class='add'>+	mdio: mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+			snps,map-to-dma-channel = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0x8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue4 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,priority = &lt;0xf0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC GBE1 */</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;, &lt;&amp;pinctrl_fec_1588_event&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;fec_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC CAN1 */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC CAN0 */</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names = "SMARC_GPIO7", /* 0 */</div><div class='add'>+			  "SMARC_GPIO8",</div><div class='add'>+			  "",</div><div class='add'>+			  "PMIC_INT#",</div><div class='add'>+			  "PMIC_USDHC_VSELECT",</div><div class='add'>+			  "SMARC_GPIO9",</div><div class='add'>+			  "SMARC_GPIO10",</div><div class='add'>+			  "SMARC_GPIO11",</div><div class='add'>+			  "SMARC_GPIO12",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_GPIO5", /* 10 */</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_USB0_EN_OC#",</div><div class='add'>+			  "SMARC_GPIO13",</div><div class='add'>+			  "SMARC_USB2_EN_OC#";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "", /* 0 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "", /* 10 */</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SDIO_CD#",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SDIO_PWR_EN",</div><div class='add'>+			  "SMARC_SDIO_WP"; /* 20 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lvds_dsi_sel&gt;;</div><div class='add'>+	gpio-line-names = "ETH_0_INT#", /* 0 */</div><div class='add'>+			  "SLEEP#",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "TPM_CS#",</div><div class='add'>+			  "LVDS_DSI_SEL",</div><div class='add'>+			  "MCU_INT#",</div><div class='add'>+			  "GPIO_EX_INT#",</div><div class='add'>+			  "", /* 10 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SMB_ALERT#",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_I2C_PM_DAT", /* 20 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_I2C_PM_CK";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names = "SMARC_PCIE_WAKE#", /* 0 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SPI1_CS1#",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "", /* 10 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_GPIO4",</div><div class='add'>+			  "SMARC_PCIE_A_RST#",</div><div class='add'>+			  "", /* 20 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SPI0_CS1#",</div><div class='add'>+			  "SMARC_GPIO6";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "", /* 0 */</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_USB0_OTG_ID",</div><div class='add'>+			  "SMARC_I2C_CAM1_CK",</div><div class='add'>+			  "SMARC_I2C_CAM1_DAT",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SPI0_CS0#",</div><div class='add'>+			  "", /* 10 */</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SMARC_SPI1_CS0#",</div><div class='add'>+			  "CTRL_I2C_SCL",</div><div class='add'>+			  "CTRL_I2C_SDA",</div><div class='add'>+			  "SMARC_I2C_LCD_CK",</div><div class='add'>+			  "SMARC_I2C_LCD_DAT",</div><div class='add'>+			  "SMARC_I2C_CAM0_CK",</div><div class='add'>+			  "SMARC_I2C_CAM0_DAT",</div><div class='add'>+			  "SMARC_I2C_GP_CK", /* 20 */</div><div class='add'>+			  "SMARC_I2C_GP_DAT";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC HDMI */</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module I2C */</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	som_gpio_expander: gpio@21 {</div><div class='add'>+		compatible = "nxp,pcal6408";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcal6408&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"SMARC_GPIO0",</div><div class='add'>+			"SMARC_GPIO1",</div><div class='add'>+			"SMARC_GPIO2",</div><div class='add'>+			"SMARC_GPIO3",</div><div class='add'>+			"SMARC_LCD0_VDD_EN",</div><div class='add'>+			"SMARC_LCD0_BKLT_EN",</div><div class='add'>+			"SMARC_LCD1_VDD_EN",</div><div class='add'>+			"SMARC_LCD1_BKLT_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9450: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;805000&gt;;</div><div class='add'>+				regulator-name = "+VDD_SOC (PMIC BUCK1)";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_arm: BUCK2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;805000&gt;;</div><div class='add'>+				regulator-name = "+VDD_ARM (PMIC BUCK2)";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_3v3: BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "+V3.3 (PMIC BUCK4)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_1v8: BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "+V1.8 (PMIC BUCK5)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1155000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1045000&gt;;</div><div class='add'>+				regulator-name = "+VDD_DDR (PMIC BUCK6)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1710000&gt;;</div><div class='add'>+				regulator-name = "+V1.8_SNVS (PMIC LDO1)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "+V1.8A (PMIC LDO3)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			LDO4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "+V3.3_ADC (PMIC LDO4)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_sd_3v3_1v8: LDO5 {</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "+V3.3_1.8_SD (PMIC LDO5)";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	embedded-controller@28 {</div><div class='add'>+		compatible = "toradex,smarc-imx8mp-ec", "toradex,smarc-ec";</div><div class='add'>+		reg = &lt;0x28&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_ec_gpio_expander: gpio@29 {</div><div class='add'>+		compatible = "toradex,ecgpiol16", "nxp,pcal6416";</div><div class='add'>+		reg = &lt;0x29&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mcu_int&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names =</div><div class='add'>+			"SMARC_CHARGER_PRSNT#",</div><div class='add'>+			"SMARC_CHARGING#",</div><div class='add'>+			"SMARC_LID#",</div><div class='add'>+			"SMARC_BATLOW#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc_i2c: rtc@32 {</div><div class='add'>+		compatible = "epson,rx8130";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_LCD */</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_CAM0 */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_GP */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "st,24c32", "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_CAM1 */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC I2C_PM */</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c6_gpio&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	eqos_phy: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fec_phy: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC PCIE_A */</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;hsio_blk_ctrl&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC LCD1_BKLT_PWM */</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lcd1_bklt_pwm1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC LCD0_BKLT_PWM */</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lcd0_bklt_pwm2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC GPIO5 as PWM */</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio5_pwm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER0 */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER2 */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module Bluetooth, optional SMARC SER3 */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_bt_uart&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	som_bt: bluetooth {</div><div class='add'>+		compatible = "mrvl,88w8997";</div><div class='add'>+		max-speed = &lt;921600&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SER1, used as the Linux Console */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC USB0 */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC USB1..4 */</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb1_vbus&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	srp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_0_dwc: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_dr_connector&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module Wi-Fi */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_wifi_en&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SMARC SDIO */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_cd&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_cd&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_cd&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_cd_sleep&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_usdhc2_wp&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio2 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module eMMC */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3_ROOT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	/* On-module Bluetooth */</div><div class='add'>+	pinctrl_bt_uart: btuartgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD1_DATA6__UART3_DCE_TX	0x1c4&gt;, /* WiFi_UART_TXD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA7__UART3_DCE_RX	0x1c4&gt;, /* WiFi_UART_RXD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS	0x1c4&gt;, /* WiFi_UART_RTS */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_RESET_B__UART3_DCE_RTS	0x1c4&gt;; /* WiFi_UART_CTS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC CAM_MCK */</div><div class='add'>+	pinctrl_csi_mclk: csimclkgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2	0x16&gt;; /* SMARC S6 - CAM_MCK  */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SPI0 */</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO	0x1c4&gt;, /* SMARC P45 - SPI0_DIN */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI	0x4&gt;,   /* SMARC P46 - SPI0_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK	0x4&gt;,   /* SMARC P44 - SPI0_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x1c4&gt;, /* SMARC P43 - SPI0_CS0# */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0x1c4&gt;; /* SMARC P31 - SPI0_CS1# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SPI1 */</div><div class='add'>+	pinctrl_ecspi2: ecspi2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x1c4&gt;, /* SMARC P56 - SPI1_DIN */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x4&gt;,   /* SMARC P57 - SPI1_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x4&gt;,   /* SMARC P58 - SPI1_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x1c4&gt;, /* SMARC P54 - SPI1_CS0# */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x1c4&gt;; /* SMARC P55 - SPI1_CS1# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* ETH_0 RGMII (On-module PHY) */</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x90&gt;, /* ETH0_RGMII_RXD0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x90&gt;, /* ETH0_RGMII_RXD1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x90&gt;, /* ETH0_RGMII_RXD2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x90&gt;, /* ETH0_RGMII_RXD3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90&gt;, /* ETH0_RGMII_RXC */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x90&gt;, /* ETH0_RGMII_RX_CTL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x16&gt;, /* ETH0_RGMII_TXD0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x16&gt;, /* ETH0_RGMII_TXD1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x16&gt;, /* ETH0_RGMII_TXD2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x16&gt;, /* ETH0_RGMII_TXD3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x16&gt;, /* ETH0_RGMII_TX_CTL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16&gt;; /* ETH0_RGMII_TXC */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GBE0_SDP */</div><div class='add'>+	pinctrl_eqos_1588_event: eqos1588eventgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO09__ENET_QOS_1588_EVENT0_OUT	0x4&gt;; /* SMARC P6 - GBE0_SDP */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* ETH_0_MDIO and ETH_0_INT# shared between ETH_PHY0 and ETH_PHY1 */</div><div class='add'>+	pinctrl_eth_mdio: ethmdiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC		0x2&gt;,  /* ETH_0_MDC */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO	0x2&gt;,  /* ETH_0_MDIO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00		0x80&gt;; /* ETH_0_INT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* ETH_1 RGMII (On-module PHY) */</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0	0x90&gt;, /* ETH1_RGMII_RXD0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1	0x90&gt;, /* ETH1_RGMII_RXD1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2	0x90&gt;, /* ETH1_RGMII_RXD2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3	0x90&gt;, /* ETH1_RGMII_RXD3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC	0x90&gt;, /* ETH1_RGMII_RXC */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90&gt;, /* ETH1_RGMII_RX_CTL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0	0x16&gt;, /* ETH1_RGMII_TXD0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1	0x16&gt;, /* ETH1_RGMII_TXD1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2	0x16&gt;, /* ETH1_RGMII_TXD2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3	0x16&gt;, /* ETH1_RGMII_TXD3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x16&gt;, /* ETH1_RGMII_TX_CTL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC	0x16&gt;; /* ETH1_RGMII_TXC */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GBE1_SDP */</div><div class='add'>+	pinctrl_fec_1588_event: fec1588eventgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT	0x4&gt;; /* SMARC P5 - GBE1_SDP */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC CAN1 */</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI2_TXC__CAN1_RX	0x154&gt;, /* SMARC P146 - CAN1_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI2_RXC__CAN1_TX	0x154&gt;; /* SMARC P145 - CAN1_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC CAN0 */</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX	0x154&gt;, /* SMARC P144 - CAN0_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX	0x154&gt;; /* SMARC P143 - CAN0_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO4 */</div><div class='add'>+	pinctrl_gpio4: gpio4grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x144&gt;; /* SMARC P112 - GPIO4 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO5 */</div><div class='add'>+	pinctrl_gpio5: gpio5grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x144&gt;; /* SMARC P113 - GPIO5 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO5 as PWM */</div><div class='add'>+	pinctrl_gpio5_pwm: gpio5pwmgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO10__PWM3_OUT	0x12&gt;; /* SMARC P113 - PWM_OUT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO6 */</div><div class='add'>+	pinctrl_gpio6: gpio6grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x144&gt;; /* SMARC P114 - GPIO6 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO7 */</div><div class='add'>+	pinctrl_gpio7: gpio7grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00	0x144&gt;; /* SMARC P115 - GPIO7 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO8 */</div><div class='add'>+	pinctrl_gpio8: gpio8grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01	0x144&gt;; /* SMARC P116 - GPIO8 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO9 */</div><div class='add'>+	pinctrl_gpio9: gpio9grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05	0x144&gt;; /* SMARC P117 - GPIO9 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO10 */</div><div class='add'>+	pinctrl_gpio10: gpio10grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06	0x144&gt;; /* SMARC P118 - GPIO10 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO11 */</div><div class='add'>+	pinctrl_gpio11: gpio11grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07	0x144&gt;; /* SMARC P119 - GPIO11 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO12 */</div><div class='add'>+	pinctrl_gpio12: gpio12grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08	0x144&gt;; /* SMARC S142 - GPIO12 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC GPIO13 */</div><div class='add'>+	pinctrl_gpio13: gpio13grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x144&gt;; /* SMARC S123 - GPIO13 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC HDMI */</div><div class='add'>+	pinctrl_hdmi: hdmigrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c6&gt;, /* SMARC P105 - HDMI_CTRL_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c6&gt;, /* SMARC P106 - HDMI_CTRL_DAT */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD	0x180&gt;;      /* SMARC P104 - HDMI_HPD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module I2C */</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL	0x400001c6&gt;, /* CTRL_I2C_SCL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA	0x400001c6&gt;; /* CTRL_I2C_SDA */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module I2C as GPIOs */</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14	0x400001c6&gt;, /* CTRL_I2C_SCL */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15	0x400001c6&gt;; /* CTRL_I2C_SDA */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_LCD */</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL	0x400001c6&gt;, /* SMARC S139 - I2C_LCD_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA	0x400001c6&gt;; /* SMARC S140 - I2C_LCD_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_LCD as GPIOs */</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16	0x400001c6&gt;, /* SMARC S139 - I2C_LCD_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17	0x400001c6&gt;; /* SMARC S140 - I2C_LCD_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_CAM0 */</div><div class='add'>+	pinctrl_i2c3: i2c3grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL	0x400001c6&gt;, /* SMARC S5 - I2C_CAM0_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA	0x400001c6&gt;; /* SMARC S7 - I2C_CAM0_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_CAM0 as GPIOs */</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18	0x400001c6&gt;, /* SMARC S5 - I2C_CAM0_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19	0x400001c6&gt;; /* SMARC S7 - I2C_CAM0_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_GP */</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL	0x400001c6&gt;, /* SMARC S48 - I2C_GP_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA	0x400001c6&gt;; /* SMARC S49 - I2C_GP_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_GP as GPIOs */</div><div class='add'>+	pinctrl_i2c4_gpio: i2c4gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20	0x400001c6&gt;, /* SMARC S48 - I2C_GP_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21	0x400001c6&gt;; /* SMARC S49 - I2C_GP_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_CAM1 */</div><div class='add'>+	pinctrl_i2c5: i2c5grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA	0x400001c6&gt;, /* SMARC S2 - I2C_CAM1_DAT  */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL	0x400001c6&gt;; /* SMARC S1 - I2C_CAM1_CK  */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_CAM1 as GPIOs */</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04	0x400001c6&gt;, /* SMARC S2 - I2C_CAM1_DAT  */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SPDIF_TX__GPIO5_IO03	0x400001c6&gt;; /* SMARC S1 - I2C_CAM1_CK  */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_PM */</div><div class='add'>+	pinctrl_i2c6: i2c6grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_HDMI_CEC__I2C6_SCL	0x400001c6&gt;, /* SMARC P121 - I2C_PM_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA	0x400001c6&gt;; /* SMARC P122 - I2C_PM_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2C_PM as GPIOs */</div><div class='add'>+	pinctrl_i2c6_gpio: i2c6gpiogrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_HDMI_CEC__GPIO3_IO28	0x400001c6&gt;, /* SMARC P121 - I2C_PM_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20	0x400001c6&gt;; /* SMARC P122 - I2C_PM_DAT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lvds_dsi_sel: lvdsdsiselgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07	0x104&gt;; /* LVDS_DSI_SEL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mcu_int: mcuintgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08	0x1C0&gt;; /* MCU_INT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC LCD1_BKLT_PWM */</div><div class='add'>+	pinctrl_lcd1_bklt_pwm1: pwm1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT	0x12&gt;; /* SMARC S122 - LCD1_BKLT_PWM */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC LCD0_BKLT_PWM */</div><div class='add'>+	pinctrl_lcd0_bklt_pwm2: pwm2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT	0x12&gt;; /* SMARC S141 - LCD0_BKLT_PWM */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PCAL6408 Interrupt */</div><div class='add'>+	pinctrl_pcal6408: pcal6408intgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09	0x1c4&gt;; /* GPIO_EX_INT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC PCIE_A */</div><div class='add'>+	pinctrl_pcie: pciegrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00	0x1c0&gt;, /* SMARC S146 - PCIE_WAKE# */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x04&gt;;  /* SMARC P75 - PCIE_A_RST# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMIC Interrupt */</div><div class='add'>+	pinctrl_pmic: pmicintgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x1c4&gt;; /* PMIC_INT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2S0 */</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK	0x94&gt;, /* SMARC S42 - I2S0_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC	0x94&gt;, /* SMARC S39 - I2S0_LRCLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00	0x94&gt;, /* SMARC S41 - I2S0_SDIN */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00	0x94&gt;; /* SMARC S40 - I2S0_SDOUT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC AUDIO_MCK */</div><div class='add'>+	pinctrl_sai1_mclk: sai1mclkgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK	0x96&gt;; /* SMARC S38 - AUDIO_MCK */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC I2S2 */</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0x94&gt;, /* SMARC S52 - I2S2_SDIN */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0x94&gt;, /* SMARC S53 - I2S2_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0x94&gt;, /* SMARC S51 - I2S2_SDOUT */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0x94&gt;; /* SMARC S50 - I2S2_LRCLK */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SLEEP# */</div><div class='add'>+	pinctrl_sleep: sleepgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01	0x1C0&gt;; /* SMARC S149 - SLEEP# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SMB_ALERT# */</div><div class='add'>+	pinctrl_smb_alert: smbalertgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16	0x1C0&gt;; /* SMARC P1 - SMB_ALERT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TPM_CS# */</div><div class='add'>+	pinctrl_tpm_cs: tpmcsgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x82&gt;; /* TPM_CS# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WIFI_BT_WKUP_HOST/TPM_INT# */</div><div class='add'>+	pinctrl_tpm_irq_wifi_bt_wkup: tpmirq-wifibtwkupgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x16&gt;; /* WIFI_BT_WKUP_HOST/TPM_INT# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SER0 */</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS	0x1c4&gt;, /* SMARC P132 - SER2_CTS */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS	0x1c4&gt;, /* SMARC P131 - SER2_RTS */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x1c4&gt;, /* SMARC P130 - SER2_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x1c4&gt;; /* SMARC P139 - SER2_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SER2 */</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS	0x1c4&gt;, /* SMARC P139 - SER2_CTS */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS	0x1c4&gt;, /* SMARC P138 - SER2_RTS */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x1c4&gt;, /* SMARC P137 - SER2_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x1c4&gt;; /* SMARC P136 - SER2_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SER3 */</div><div class='add'>+	pinctrl_uart3: uart3grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX	0x1c4&gt;, /* SMARC P141 - SER3_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX	0x1c4&gt;; /* SMARC P140 - SER3_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SER1 */</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX	0x1c4&gt;, /* SMARC P135 - SER1_RX */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x1c4&gt;; /* SMARC P134 - SER1_TX */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC USB0_OTG_ID */</div><div class='add'>+	pinctrl_usb0_id: usb0idgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02	0x1c4&gt;; /* SMARC P64 - USB0_OTG_ID */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC USB0_EN_OC# */</div><div class='add'>+	pinctrl_usb0_en_oc: usb0enocgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x04&gt;; /* SMARC P62 - USB0_EN_OC# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On module USB Hub VBUS, or SMARC USB2_EN_OC# depending on assembling */</div><div class='add'>+	pinctrl_usb1_en_oc: usb1enocgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14	0x04&gt;; /* SMARC P71 - USB2_EN_OC# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module Wi-Fi */</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x190&gt;, /* WiFi_SDIO_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d0&gt;, /* WiFi_SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0&gt;, /* WiFi_SDIO_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0&gt;, /* WiFi_SDIO_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0&gt;, /* WiFi_SDIO_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0&gt;; /* WiFi_SDIO_DATA3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module Wi-Fi */</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x194&gt;, /* WiFi_SDIO_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d4&gt;, /* WiFi_SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4&gt;, /* WiFi_SDIO_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4&gt;, /* WiFi_SDIO_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4&gt;, /* WiFi_SDIO_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4&gt;; /* WiFi_SDIO_DATA3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module Wi-Fi */</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK		0x196&gt;, /* WiFi_SDIO_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD		0x1d6&gt;, /* WiFi_SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6&gt;, /* WiFi_SDIO_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6&gt;, /* WiFi_SDIO_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6&gt;, /* WiFi_SDIO_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6&gt;; /* WiFi_SDIO_DATA3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO */</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190&gt;, /* SMARC P36 - SDIO_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0&gt;, /* SMARC P34 - SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0&gt;, /* SMARC P39 - SDIO_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0&gt;, /* SMARC P40 - SDIO_D1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0&gt;, /* SMARC P41 - SDIO_D2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0&gt;; /* SMARC P42 - SDIO_D3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO 100MHz */</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194&gt;, /* SMARC P36 - SDIO_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4&gt;, /* SMARC P34 - SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4&gt;, /* SMARC P39 - SDIO_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4&gt;, /* SMARC P40 - SDIO_D1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4&gt;, /* SMARC P41 - SDIO_D2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;; /* SMARC P42 - SDIO_D3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO 200MHz */</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196&gt;, /* SMARC P36 - SDIO_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6&gt;, /* SMARC P34 - SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6&gt;, /* SMARC P39 - SDIO_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6&gt;, /* SMARC P40 - SDIO_D1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6&gt;, /* SMARC P41 - SDIO_D2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6&gt;; /* SMARC P42 - SDIO_D3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO_CD# */</div><div class='add'>+	pinctrl_usdhc2_cd: usdhc2cdgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4&gt;; /* SMARC P35 - SDIO_CD# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO_CD# */</div><div class='add'>+	pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x0&gt;; /* SMARC P35 - SDIO_CD# */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO_PWR_EN */</div><div class='add'>+	pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x1c4&gt;; /* SMARC P37 - SDIO_PWR_EN */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO Sleep - Avoid backfeeding with removed card power */</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2slpgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x100&gt;, /* SMARC P36 - SDIO_CK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x100&gt;, /* SMARC P34 - SDIO_CMD */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x100&gt;, /* SMARC P39 - SDIO_DO */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x100&gt;, /* SMARC P39 - SDIO_D1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x100&gt;, /* SMARC P39 - SDIO_D2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x100&gt;; /* SMARC P39 - SDIO_D3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_vsel: usdhc2vselgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04	0x4&gt;; /* PMIC_USDHC_VSELECT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SMARC SDIO_WP */</div><div class='add'>+	pinctrl_usdhc2_wp: usdhc2wpgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_SD2_WP__GPIO2_IO20	0x144&gt;; /* SMARC P33 - SDIO_WP */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module eMMC */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190&gt;, /* eMMC_STROBE */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0&gt;, /* eMMC_DATA5 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0&gt;, /* eMMC_DATA6 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d0&gt;, /* eMMC_DATA7 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0&gt;, /* eMMC_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0&gt;, /* eMMC_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0&gt;, /* eMMC_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0&gt;, /* eMMC_DATA3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0&gt;, /* eMMC_DATA4 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x190&gt;, /* eMMC_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d0&gt;; /* eMMC_CMD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module eMMC */</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194&gt;, /* eMMC_STROBE */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4&gt;, /* eMMC_DATA5 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4&gt;, /* eMMC_DATA6 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d4&gt;, /* eMMC_DATA7 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4&gt;, /* eMMC_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4&gt;, /* eMMC_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4&gt;, /* eMMC_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4&gt;, /* eMMC_DATA3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4&gt;, /* eMMC_DATA4 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194&gt;, /* eMMC_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4&gt;; /* eMMC_CMD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module eMMC */</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196&gt;, /* eMMC_STROBE */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d2&gt;, /* eMMC_DATA5 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d2&gt;, /* eMMC_DATA6 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d2&gt;, /* eMMC_DATA7 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d2&gt;, /* eMMC_DATA0 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d2&gt;, /* eMMC_DATA1 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d2&gt;, /* eMMC_DATA2 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d2&gt;, /* eMMC_DATA3 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d2&gt;, /* eMMC_DATA4 */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x196&gt;, /* eMMC_CLK */</div><div class='add'>+			   &lt;MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d6&gt;; /* eMMC_CMD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SoC Watchdog */</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x4&gt;; /* CTRL_SOC_WDOG */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module Wi-Fi power enable */</div><div class='add'>+	pinctrl_wifi_pwr_en: wifipwrengrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x104&gt;; /* CTRL_EN_WIFI */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso<br/>new file mode 100644<br/>index 000000000000..e5a2b3780215<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtso</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2022-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	/*</div><div class='add'>+	 * The three camera regulators are controlled by a single GPIO. Declare</div><div class='add'>+	 * a single regulator for the three supplies.</div><div class='add'>+	 */</div><div class='add'>+	reg_cam: regulator-cam {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "reg_cam";</div><div class='add'>+		/* pad muxing already done in gpio2grp */</div><div class='add'>+		gpio = &lt;&amp;gpio2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vcc_3v3&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam24m: clock-cam24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "cam24m";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	camera@10 {</div><div class='add'>+		compatible = "sony,imx219";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		clocks = &lt;&amp;cam24m&gt;;</div><div class='add'>+		VANA-supply = &lt;&amp;reg_cam&gt;;</div><div class='add'>+		VDIG-supply = &lt;&amp;reg_cam&gt;;</div><div class='add'>+		VDDL-supply = &lt;&amp;reg_cam&gt;;</div><div class='add'>+		orientation = &lt;2&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			sony_imx219: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;imx8mp_mipi_csi_in&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				clock-noncontinuous;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isi_0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			/delete-node/ endpoint;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			isp0_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_PARALLEL&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi_0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			imx8mp_mipi_csi_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;sony_imx219&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;isp0_in&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts<br/>index d7fd9d36f824..f7346b3d35fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts</a></div><div class='hunk'>@@ -467,6 +467,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;reg_usdhc2_vqmmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai5 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='hunk'>@@ -876,8 +880,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d2&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d2&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d2&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='hunk'>@@ -886,8 +889,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='hunk'>@@ -896,8 +898,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso<br/>index ea44d605342b..ea44d605342b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso</a></div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts<br/>index ae64731266f3..4eedd00d83b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts</a></div><div class='hunk'>@@ -234,7 +234,8 @@</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='del'>-		model = "tq-tlv320aic32x";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='add'>+		audio-asrc = &lt;&amp;easrc&gt;;</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic3x04&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -603,6 +604,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;reg_usdhc2_vqmmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='hunk'>@@ -982,8 +987,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d2&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d2&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d2&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='hunk'>@@ -992,8 +996,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='hunk'>@@ -1002,8 +1005,7 @@</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;,</div><div class='del'>-			   &lt;MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0&gt;;</div><div class='add'>+			   &lt;MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi<br/>index 336785a9fba8..9716f24f7c6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2021-2022 TQ-Systems GmbH</div><div class='del'>- * Author: Alexander Stein &lt;alexander.stein@tq-group.com&gt;</div><div class='add'>+ * Copyright 2021-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "imx8mp.dtsi"</div><div class='hunk'>@@ -15,22 +16,18 @@</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* identical to buck4_reg, but should never change */</div><div class='del'>-	reg_vcc3v3: regulator-vcc3v3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VCC3V3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* e-MMC IO, needed for HS modes */</div><div class='del'>-	reg_vcc1v8: regulator-vcc1v8 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VCC1V8";</div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vqmmc&gt;;</div><div class='add'>+		regulator-name = "V_SD2";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;,</div><div class='add'>+			 &lt;3300000 0x0&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ldo5_reg&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +35,10 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;buck2_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;easrc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;flexspi {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_flexspi0&gt;;</div><div class='hunk'>@@ -49,6 +50,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;80000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck5_reg&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -176,17 +178,21 @@</div><div class='ctx'> 		read-only;</div><div class='ctx'> 		reg = &lt;0x53&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	m24c64: eeprom@57 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc3 {</div><div class='ctx'> 	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='hunk'>@@ -196,8 +202,8 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	no-sd;</div><div class='ctx'> 	no-sdio;</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_vcc3v3&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;reg_vcc1v8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;buck4_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;buck5_reg&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -236,6 +242,10 @@</div><div class='ctx'> 		fsl,pins = &lt;MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x10&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_reg_usdhc2_vqmmc: regusdhc2vqmmcgrp {</div><div class='add'>+		fsl,pins = &lt;MX8MP_IOMUXC_GPIO1_IO04__GPIO1_IO04		0xc0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc3: usdhc3grp {</div><div class='ctx'> 		fsl,pins = &lt;MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194&gt;,</div><div class='ctx'> 			   &lt;MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso<br/>new file mode 100644<br/>index 000000000000..e3965caca6be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 GOcontroll B.V.</div><div class='add'>+ * Author: Maud Spierings &lt;maudspierings@gocontroll.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-pinfunc.h"</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "GOcontroll Moduline Display with BOE av101hdt-a10 display";</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "boe,av101hdt-a10";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_panel&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_lvds_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ldb_lvds_ch0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vbus: regulator-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		power-supply = &lt;&amp;reg_6v4&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "usb-c-vbus";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_panel: panelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_bridge {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;, &lt;&amp;clk IMX8MP_VIDEO_PLL1&gt;;</div><div class='add'>+	/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;1054620000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			ldb_lvds_ch0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_lvds_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "usb-c-connector";</div><div class='add'>+		data-role = "host";</div><div class='add'>+		pd-disable;</div><div class='add'>+		vbus-supply = &lt;&amp;reg_vbus&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			high_speed_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb1_hs_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb1_hs_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;high_speed_ep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso<br/>new file mode 100644<br/>index 000000000000..3eb665ce9d5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 GOcontroll B.V.</div><div class='add'>+ * Author: Maud Spierings &lt;maudspierings@gocontroll.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-pinfunc.h"</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	model = "GOcontroll Moduline Display with BOE av123z7m-n17 display";</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "boe,av123z7m-n17";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_panel&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				dual-lvds-odd-pixels;</div><div class='add'>+</div><div class='add'>+				panel_in0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;lvds1_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				dual-lvds-even-pixels;</div><div class='add'>+</div><div class='add'>+				panel_in1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;lvds0_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* sn65dsi85 */</div><div class='add'>+	bridge@2d {</div><div class='add'>+		compatible = "ti,sn65dsi84";</div><div class='add'>+		reg = &lt;0x2d&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds_bridge&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8_per&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dsi_lvds_bridge_in: endpoint {</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;mipi_dsi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				lvds0_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_in1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+				lvds1_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_in0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* max25014 @ 0x6f */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_lvds_bridge: lvdsbridgegrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_panel: panelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	/*</div><div class='add'>+	 * burst has to be at least 2x dsi clock that the sn65dsi85 expects</div><div class='add'>+	 * display pixelclock * bpp / lanes / 2 = dsi clock</div><div class='add'>+	 * 88.000.000 * 24 / 4 / 2 = 264.000.000</div><div class='add'>+	 * range gets rounded up to 265.000.000 - 270.000.000</div><div class='add'>+	 * 267.500.000 * 2 = 535.000.000</div><div class='add'>+	 */</div><div class='add'>+	samsung,burst-clock-frequency = &lt;535000000&gt;;</div><div class='add'>+	samsung,esc-clock-frequency = &lt;12000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			mipi_dsi_out: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt; &amp;dsi_lvds_bridge_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts<br/>new file mode 100644<br/>index 000000000000..88ad422c2760<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts</a></div><div class='hunk'>@@ -0,0 +1,525 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 GOcontroll B.V.</div><div class='add'>+ * Author: Maud Spierings &lt;maudspierings@gocontroll.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-tx8p-ml81.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "gocontroll,moduline-display", "fsl,imx8mp";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+	hardware = "Moduline Display V1.06";</div><div class='add'>+	model = "GOcontroll Moduline Display baseboard";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		can0 = &amp;flexcan1;</div><div class='add'>+		can1 = &amp;flexcan2;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		mmc0 = &amp;usdhc3;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;rtc_pcf; /* i2c rtc is the main rtc */</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+		spi0 = &amp;ecspi2; /* spidev number compatibility */</div><div class='add'>+		spi1 = &amp;ecspi1; /* spidev number compatibility */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	external-sensor-supply {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;reg_5v0_sensor&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexcan1_phy: can-phy0 {</div><div class='add'>+		compatible = "ti,tcan1051", "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan1_stby&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexcan2_phy: can-phy1 {</div><div class='add'>+		compatible = "ti,tcan1051", "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan2_stby&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8_per: regulator-1v8-per {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "1v8-per";</div><div class='add'>+		gpio = &lt;&amp;gpio3 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_per: regulator-3v3-per {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		power-supply = &lt;&amp;reg_6v4&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "3v3-per";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v0: regulator-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		power-supply = &lt;&amp;reg_6v4&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "5v0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v0_sensor: regulator-5v0-sensor {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_5v0_sensor&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "5v0-supply-external-sensor";</div><div class='add'>+		gpio = &lt;&amp;gpio4 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_6v4: regulator-6v4 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;6400000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;6400000&gt;;</div><div class='add'>+		regulator-name = "6v4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;cpudai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;cpudai&gt;;</div><div class='add'>+		simple-audio-card,name = "tas2505-audio";</div><div class='add'>+		simple-audio-card,routing = "Speaker", "DAC";</div><div class='add'>+		simple-audio-card,widgets = "Speaker", "Speaker External";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2505&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpudai: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai6&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_powerseq: wifi-powerseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_wl_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		post-power-on-delay-ms = &lt;100&gt;;</div><div class='add'>+		power-off-delay-us = &lt;500000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	cs-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	connector@0 {</div><div class='add'>+		compatible = "gocontroll,moduline-module-slot";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;i2c2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		slot-number = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;54000000&gt;;</div><div class='add'>+		sync-gpios = &lt;&amp;gpio4 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vddhpp-supply = &lt;&amp;reg_6v4&gt;;</div><div class='add'>+		vddp-supply = &lt;&amp;reg_5v0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector@1 {</div><div class='add'>+		compatible = "gocontroll,moduline-module-slot";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;i2c2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		slot-number = &lt;2&gt;;</div><div class='add'>+		spi-max-frequency = &lt;54000000&gt;;</div><div class='add'>+		sync-gpios = &lt;&amp;gpio4 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vddhpp-supply = &lt;&amp;reg_6v4&gt;;</div><div class='add'>+		vddp-supply = &lt;&amp;reg_5v0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc@2 {</div><div class='add'>+		compatible = "microchip,mcp3004";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		spi-max-frequency = &lt;2300000&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	phys = &lt;&amp;flexcan1_phy&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	phys = &lt;&amp;flexcan2_phy&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tas2505: audio-codec@18 {</div><div class='add'>+		compatible = "ti,tas2505";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		aic32x4-gpio-func = &lt;0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+		av-supply = &lt;&amp;reg_1v8_per&gt;;</div><div class='add'>+		dv-supply = &lt;&amp;reg_1v8_per&gt;;</div><div class='add'>+		iov-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tas_reset&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc_pcf: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85063a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;7000&gt;;</div><div class='add'>+</div><div class='add'>+		clock {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32768&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_bt: btgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI</div><div class='add'>+				MX8MP_DSE_X4</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO</div><div class='add'>+				(MX8MP_DSE_X4 | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK</div><div class='add'>+				MX8MP_DSE_X4</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			 MX8MP_IOMUXC_SPDIF_RX__CAN1_RX</div><div class='add'>+				 (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX</div><div class='add'>+				 (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1_stby: flexcan1stbygrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__CAN2_RX</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__CAN2_TX</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2_stby: flexcan2stbygrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4: i2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__I2C4_SCL</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__I2C4_SDA</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c4_gpio: i2c4-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: pinctrlusdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_1v8: reg-1v8-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_5v0_sensor: reg-5v0-sensorgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai6: sai6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__AUDIOMIX_SAI6_TX_SYNC</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__AUDIOMIX_SAI6_TX_BCLK</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__AUDIOMIX_SAI6_TX_DATA00</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__AUDIOMIX_SAI6_MCLK</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI6_RX_DATA00</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tas_reset: tasresetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_HYS_SCHMITT)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wl_int: wlintgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wl_reg: wlreggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19</div><div class='add'>+				MX8MP_DSE_X1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai6 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_SAI6&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_AUDIO_PLL1_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai6&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio1 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;921600&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_bt&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;50000000&gt;;</div><div class='add'>+	cap-power-off-card;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	max-frequency = &lt;50000000&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_powerseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3v3_per&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_wl_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		brcm,board-type = "GOcontroll,moduline";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi<br/>new file mode 100644<br/>index 000000000000..fe8ba16eb40e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi</a></div><div class='hunk'>@@ -0,0 +1,548 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 Lothar Waßmann &lt;LW@KARO-electronics.de&gt;</div><div class='add'>+ * 2025 Maud Spierings &lt;maudspierings@gocontroll.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* PHY regulator */</div><div class='add'>+	regulator-3v3-etn {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_3v3_etn&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "3v3-etn";</div><div class='add'>+		vin-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;reg_vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_ENET_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ENET_QOS_TIMER&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ENET_QOS&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_266M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_100M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;266000000&gt;, &lt;100000000&gt;, &lt;50000000&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_eqos_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ethphy_rst_b&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-delay-us = &lt;25000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;21 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX8MP_CLK_ENET_QOS&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy_int_b&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			smsc,disable-energy-detect;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names = "SODIMM_152",</div><div class='add'>+			  "SODIMM_42",</div><div class='add'>+			  "PMIC_WDOG_B SODIMM_153",</div><div class='add'>+			  "PMIC_IRQ_B",</div><div class='add'>+			  "SODIMM_154",</div><div class='add'>+			  "SODIMM_155",</div><div class='add'>+			  "SODIMM_156",</div><div class='add'>+			  "SODIMM_157",</div><div class='add'>+			  "SODIMM_158",</div><div class='add'>+			  "SODIMM_159",</div><div class='add'>+			  "SODIMM_161",</div><div class='add'>+			  "SODIMM_162",</div><div class='add'>+			  "SODIMM_34",</div><div class='add'>+			  "SODIMM_36",</div><div class='add'>+			  "SODIMM_27",</div><div class='add'>+			  "SODIMM_28",</div><div class='add'>+			  "ENET_MDC",</div><div class='add'>+			  "ENET_MDIO",</div><div class='add'>+			  "",</div><div class='add'>+			  "ENET_XTAL1/CLKIN",</div><div class='add'>+			  "ENET_TXD1",</div><div class='add'>+			  "ENET_TXD0",</div><div class='add'>+			  "ENET_TXEN",</div><div class='add'>+			  "ENET_POWER",</div><div class='add'>+			  "ENET_COL/CRS_DV",</div><div class='add'>+			  "ENET_RXER",</div><div class='add'>+			  "ENET_RXD0",</div><div class='add'>+			  "ENET_RXD1",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SODIMM_51",</div><div class='add'>+			  "SODIMM_57",</div><div class='add'>+			  "SODIMM_56",</div><div class='add'>+			  "SODIMM_52",</div><div class='add'>+			  "SODIMM_53",</div><div class='add'>+			  "SODIMM_54",</div><div class='add'>+			  "SODIMM_55",</div><div class='add'>+			  "SODIMM_15",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names = "",</div><div class='add'>+			  "",</div><div class='add'>+			  "EMMC_DS",</div><div class='add'>+			  "EMMC_DAT5",</div><div class='add'>+			  "EMMC_DAT6",</div><div class='add'>+			  "EMMC_DAT7",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "EMMC_DAT0",</div><div class='add'>+			  "EMMC_DAT1",</div><div class='add'>+			  "EMMC_DAT2",</div><div class='add'>+			  "EMMC_DAT3",</div><div class='add'>+			  "",</div><div class='add'>+			  "EMMC_DAT4",</div><div class='add'>+			  "",</div><div class='add'>+			  "EMMC_CLK",</div><div class='add'>+			  "EMMC_CMD",</div><div class='add'>+			  "SODIMM_75",</div><div class='add'>+			  "SODIMM_145",</div><div class='add'>+			  "SODIMM_163",</div><div class='add'>+			  "SODIMM_164",</div><div class='add'>+			  "SODIMM_165",</div><div class='add'>+			  "SODIMM_143",</div><div class='add'>+			  "SODIMM_144",</div><div class='add'>+			  "SODIMM_72",</div><div class='add'>+			  "SODIMM_73",</div><div class='add'>+			  "SODIMM_74",</div><div class='add'>+			  "SODIMM_93",</div><div class='add'>+			  "",</div><div class='add'>+			  "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names = "SODIMM_98",</div><div class='add'>+			  "SODIMM_99",</div><div class='add'>+			  "SODIMM_100",</div><div class='add'>+			  "SODIMM_101",</div><div class='add'>+			  "SODIMM_45",</div><div class='add'>+			  "SODIMM_43",</div><div class='add'>+			  "SODIMM_105",</div><div class='add'>+			  "SODIMM_106",</div><div class='add'>+			  "SODIMM_107",</div><div class='add'>+			  "SODIMM_108",</div><div class='add'>+			  "SODIMM_104",</div><div class='add'>+			  "SODIMM_103",</div><div class='add'>+			  "SODIMM_115",</div><div class='add'>+			  "SODIMM_114",</div><div class='add'>+			  "SODIMM_113",</div><div class='add'>+			  "SODIMM_112",</div><div class='add'>+			  "SODIMM_109",</div><div class='add'>+			  "SODIMM_110",</div><div class='add'>+			  "SODIMM_95",</div><div class='add'>+			  "SODIMM_96",</div><div class='add'>+			  "SODIMM_97",</div><div class='add'>+			  "ENET_nINT",</div><div class='add'>+			  "ENET_nRST",</div><div class='add'>+			  "SODIMM_84",</div><div class='add'>+			  "SODIMM_87",</div><div class='add'>+			  "SODIMM_86",</div><div class='add'>+			  "SODIMM_85",</div><div class='add'>+			  "SODIMM_83",</div><div class='add'>+			  "",</div><div class='add'>+			  "SODIMM_66",</div><div class='add'>+			  "SODIMM_65",</div><div class='add'>+			  "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "",</div><div class='add'>+			  "",</div><div class='add'>+			  "",</div><div class='add'>+			  "SODIMM_76",</div><div class='add'>+			  "SODIMM_81",</div><div class='add'>+			  "SODIMM_146",</div><div class='add'>+			  "SODIMM_48",</div><div class='add'>+			  "SODIMM_46",</div><div class='add'>+			  "SODIMM_47",</div><div class='add'>+			  "SODIMM_44",</div><div class='add'>+			  "SODIMM_49",</div><div class='add'>+			  "",</div><div class='add'>+			  "SODIMM_70",</div><div class='add'>+			  "SODIMM_69",</div><div class='add'>+			  "PMIC_SCL",</div><div class='add'>+			  "PMIC_SDA",</div><div class='add'>+			  "SODIMM_41",</div><div class='add'>+			  "SODIMM_40",</div><div class='add'>+			  "SODIMM_148",</div><div class='add'>+			  "SODIMM_149",</div><div class='add'>+			  "SODIMM_150",</div><div class='add'>+			  "SODIMM_151",</div><div class='add'>+			  "SODIMM_60",</div><div class='add'>+			  "SODIMM_59",</div><div class='add'>+			  "SODIMM_64",</div><div class='add'>+			  "SODIMM_63",</div><div class='add'>+			  "SODIMM_62",</div><div class='add'>+			  "SODIMM_61",</div><div class='add'>+			  "SODIMM_68",</div><div class='add'>+			  "SODIMM_67",</div><div class='add'>+			  "",</div><div class='add'>+			  "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_vdd_soc: BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;805000&gt;;</div><div class='add'>+				regulator-name = "vdd-soc";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_arm: BUCK2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;805000&gt;;</div><div class='add'>+				regulator-name = "vdd-core";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdd_3v3: BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "3v3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_nvcc_nand: BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "nvcc-nand";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_nvcc_dram: BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "nvcc-dram";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_snvs_1v8: LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "snvs-1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: LDO2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "LDO2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_vdda_1v8: LDO3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vdda-1v8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: LDO4 {</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK</div><div class='add'>+				(MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_SION)</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC</div><div class='add'>+				(MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO</div><div class='add'>+				(MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__ENET_QOS_RX_ER</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_sleep: eqos-sleep-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__GPIO1_IO16</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__GPIO1_IO17</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__GPIO1_IO26</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__GPIO1_IO27</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__GPIO1_IO25</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__GPIO1_IO24</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22</div><div class='add'>+				(MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy_int_b: ethphy-int-bgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy_rst_b: ethphy-rst-bgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15</div><div class='add'>+				MX8MP_I2C_DEFAULT</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_3v3_etn: reg-3v3-etngrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23</div><div class='add'>+				(MX8MP_PULL_UP | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7</div><div class='add'>+				MX8MP_USDHC_DATA_DEFAULT</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE</div><div class='add'>+				(MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE</div><div class='add'>+				(MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE</div><div class='add'>+				(MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	voltage-ranges = &lt;3300 3300&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_nvcc_nand&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts<br/>new file mode 100644<br/>index 000000000000..9ecec1a41878<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-ultra-mach-sbc.dts</a></div><div class='hunk'>@@ -0,0 +1,907 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Ultratronik</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NXP i.MX8MPlus Ultratronik MMI_A53 board";</div><div class='add'>+	compatible = "ultratronik,imx8mp-ultra-mach-sbc", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		rtc0 = &amp;hwrtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-sbu-mux {</div><div class='add'>+		compatible = "nxp,cbdtu02043", "gpio-sbu-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sbu_mux&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;gpio4 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio2 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb3_data_ss: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;typec_con_ss&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 27 GPIO_ACTIVE_LOW&gt;; /* Wakeup */</div><div class='add'>+			label = "Wakeup";</div><div class='add'>+			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_gpio_key_wakeup&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "red";</div><div class='add'>+			gpios = &lt;&amp;gpio4 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2 {</div><div class='add'>+			label = "green";</div><div class='add'>+			gpios = &lt;&amp;gpio4 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led3 {</div><div class='add'>+			label = "yellow";</div><div class='add'>+			gpios = &lt;&amp;gpio4 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usba_vbus: regulator-usba-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='add'>+		regulator-name = "usb-A-vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_0 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_1 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_2 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;A53_3 {</div><div class='add'>+	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1 &amp;pinctrl_ecspi1_cs&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	slb9670: tpm@0 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;32000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_slb9670&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi2 &amp;pinctrl_ecspi2_cs&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		&lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		&lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nfc-transceiver@1 {</div><div class='add'>+		compatible = "st,st95hf";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_nfc&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		enable-gpio = &lt;&amp;gpio1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@2 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+			interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"#TPM_IRQ", "GPIO1", "", "#PMIC_INT",</div><div class='add'>+		"SD2_VSEL", "#TOUCH_IRQ", "#NFC_INT_I", "#NFC_INT",</div><div class='add'>+		"#SPI2_CS2", "#SPI2_CS3", "#RTS4", "",</div><div class='add'>+		"USB_PWR", "GPIO2", "GPIO3", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "#SD2_CD", "", "", "",</div><div class='add'>+		"", "", "", "", "#USB-C_EN", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "DISP_POW", "GPIO4",</div><div class='add'>+		"#", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"BKL_POW", "#ETH1_INT", "#TPM_RES", "#PCAP_RES",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "#ETH0_INT", "#USB-C_ALERT",</div><div class='add'>+		"#USB-C_SEL", "", "", "",</div><div class='add'>+		"LED_RED", "LED_GREEN", "LED_YELLOW", "#WAKEUP",</div><div class='add'>+		"", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "#SPI1_CS", "", "", "", "#SPI2_CS1", "", "",</div><div class='add'>+		"", "", "", "", "ENA_KAM", "ENA_LED", "", "",</div><div class='add'>+		"", "", "", "", "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_pvi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx {</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hdmi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_tx_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9450c";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * i.MX 8M Plus Data Sheet for Consumer Products</div><div class='add'>+		 * 3.1.4 Operating ranges</div><div class='add'>+		 * MIMX8ML8DVNLZAB</div><div class='add'>+		 */</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {	/* VDD_SOC (dual-phase with BUCK3) */</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {	/* VDD_ARM */</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+				nxp,dvs-run-voltage = &lt;950000&gt;;</div><div class='add'>+				nxp,dvs-standby-voltage = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {	/* +3V3 */</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {	/* +1V8 */</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {	/* DRAM_1V1 */</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {	/* NVCC_SNVS_1V8 */</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {	/* VDDA_1P8 */</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {	/* ENET_2V5 */</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {	/* NVCC_SD2 */</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	crypto@35 {</div><div class='add'>+		compatible = "atmel,atecc508a";</div><div class='add'>+		reg = &lt;0x35&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hwrtc: rtc@32 {</div><div class='add'>+		compatible = "epson,rx8900";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+		epson,vdet-disable;</div><div class='add'>+		trickle-diode-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tcpc@52 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ptn5110&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 5000, 3000)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					typec_con_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_data_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {	/* HDMI EDID bus */</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lcdif3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pwm2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;snvs_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	/* system console */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	/* expansion port serial connection */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_dr_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usba_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,hsphy_interface = "utmi";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;ldo5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1_cs: ecspi1-cs-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09		0x40	/* #SPI1_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi1: ecspi1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO		0x82</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2_cs: ecspi2-cs-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x40	/* #SPI2_CS */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08		0x40	/* #SPI2_CS2 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09		0x40	/* #SPI2_CS3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ecspi2: ecspi2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos: eqos-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC		0x0</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO		0x0</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18		0x10	/* #ETH0_INT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fec-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC               0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO              0x0</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0         0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1         0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2         0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3         0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC          0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL      0x90</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0         0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1         0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2         0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3         0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL      0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC         0x16</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01               0x10	/* #ETH1_INT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX			0x154</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX			0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_key_wakeup: gpio-key-wakeup-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27		0x40	/* #WAKEUP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_leds: gpio-leds-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24		0x40	/* LED_RED */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25		0x40	/* LED_GREEN */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26		0x40	/* LED_YELLOW */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hdmi: hdmi-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x154</div><div class='add'>+			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hog-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01	0x40	/* GPIO1 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x40	/* GPIO2 */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14	0x40	/* GPIO3 */</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23	0x40	/* GPIO4 */</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20	0x40	/* ENA_KAM */</div><div class='add'>+			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21	0x40	/* ENA_LED */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x40	/* #PCAP_RES */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x40	/* #RTS4 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: i2c1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL			0x400001c0</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA			0x400001c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14		0xc0</div><div class='add'>+			MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15		0xc0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: i2c2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL			0x400001c0</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA			0x400001c0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2_gpio: i2c2-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16		0xc0</div><div class='add'>+			MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17		0xc0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: i2c3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL			0x400001c2</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA			0x400001c2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3_gpio: i2c3-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18		0xc2</div><div class='add'>+			MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19		0xc2</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5: i2c5-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL		0x400000c4</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA		0x400000c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c5_gpio: i2c5-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26		0xc4</div><div class='add'>+			MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27		0xc4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_nfc: nfc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x40	/* NFC_INT_I */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x40	/* NFC_INT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic: pmic-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03		0x40	/* #PMIC_INT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ptn5110: ptn5110-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x1c4	/* #USB-C_ALERT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm1: pwm1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT		0x116</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm2: pwm2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT		0x116	/* EXT_PWM */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: reg-usdhc2-vmmc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sbu_mux: sbu-mux-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20		0x16	/* #USB-C_SEL */</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20			0x16	/* #USB-C_EN */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_slb9670: slb9670-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00		0x40	/* #TPM_IRQ */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x40	/* #TPM_RES */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX		0x40</div><div class='add'>+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX		0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart3: uart3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX		0x40</div><div class='add'>+			MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX		0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX		0x40</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX		0x40</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1: usb1-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x40	/* USB_PWR */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0	/* SD2_VSEL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0	/* SD2_VSEL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0	/* SD2_VSEL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2-gpio-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d0</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x190</div><div class='add'>+			MX8MP_IOMUXC_NAND_READY_B__USDHC3_RESET_B	0x40	/* #SD3_RESET */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d4</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x194</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x192</div><div class='add'>+			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d2</div><div class='add'>+			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x192</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdog-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B		0xc6	/* #WDOG */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi<br/>index b2ac2583a592..29f080904482 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> 		      &lt;0x1 0x00000000 0 0xc0000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='ctx'> 	        compatible = "regulator-fixed";</div><div class='ctx'> 	        regulator-name = "VSD_3V3";</div><div class='hunk'>@@ -46,6 +45,34 @@</div><div class='ctx'> 	        startup-delay-us = &lt;100&gt;;</div><div class='ctx'> 	        off-on-delay-us = &lt;12000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "VSD_VSEL";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;3300000 0x0 1800000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ldo5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_phy_supply: regulator-phy-supply {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "phy-supply";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-enable-ramp-delay = &lt;20000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_phy_vddio: regulator-phy-vddio {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vddio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;A53_0 {</div><div class='hunk'>@@ -64,6 +91,53 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;buck2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * The required RGMII TX and RX 2ns delays are implemented directly</div><div class='add'>+	 * in hardware via passive delay elements on the SOM PCB.</div><div class='add'>+	 * No delay configuration is needed in software via PHY driver.</div><div class='add'>+	 */</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@4 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+			vddio-supply = &lt;&amp;reg_phy_vddio&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					linux,default-trigger = "netdev";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					linux,default-trigger = "netdev";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -205,6 +279,7 @@</div><div class='ctx'>         pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'>         cd-gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='ctx'>         bus-width = &lt;4&gt;;</div><div class='ctx'>         status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -229,6 +304,27 @@</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> </div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x2</div><div class='add'>+			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x2</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x90</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x16</div><div class='add'>+			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16</div><div class='add'>+			MX8MP_IOMUXC_SD2_WP__GPIO2_IO20					0x10</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10				0x150</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c1: i2c1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_SD1_DATA4__I2C1_SCL				0x400001c2</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi<br/>index 6c75a5ecf56b..cbf0c9a740fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;eqos;</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory@40000000 {</div><div class='hunk'>@@ -280,7 +282,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -432,6 +434,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_USDHC3&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi<br/>index 2f740d74707b..4bf818873fe3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 	tpm@1 {</div><div class='ctx'> 		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='del'>-		spi-max-frequency = &lt;36000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi<br/>index 5ab3ffe9931d..cf747ec6fa16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi</a></div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 	tpm@1 {</div><div class='ctx'> 		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='del'>-		spi-max-frequency = &lt;36000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi<br/>index e2b5e7ac3e46..5eb114d2360a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi</a></div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 	tpm@1 {</div><div class='ctx'> 		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x1&gt;;</div><div class='del'>-		spi-max-frequency = &lt;36000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts<br/>index d765b7972841..12de7cf1e853 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> 		ethernet4 = &amp;lan3;</div><div class='ctx'> 		ethernet5 = &amp;lan4;</div><div class='ctx'> 		ethernet6 = &amp;lan5;</div><div class='add'>+		rtc0 = &amp;gsc_rtc;</div><div class='add'>+		rtc1 = &amp;snvs_rtc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -199,7 +201,7 @@</div><div class='ctx'> 	tpm@0 {</div><div class='ctx'> 		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;36000000&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -299,7 +301,7 @@</div><div class='ctx'> &amp;gpio3 {</div><div class='ctx'> 	gpio-line-names =</div><div class='ctx'> 		"", "", "", "", "", "", "m2_rst", "",</div><div class='del'>-		"", "", "", "", "", "", "", "",</div><div class='add'>+		"", "", "", "", "", "", "m2_wdis2#", "",</div><div class='ctx'> 		"", "", "", "", "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "", "", "";</div><div class='ctx'> };</div><div class='hunk'>@@ -308,7 +310,7 @@</div><div class='ctx'> 	gpio-line-names =</div><div class='ctx'> 		"", "", "m2_off#", "", "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "", "", "",</div><div class='del'>-		"", "", "m2_wdis#", "", "", "", "", "",</div><div class='add'>+		"", "", "m2_wdis1#", "", "", "", "", "",</div><div class='ctx'> 		"", "", "", "", "", "", "", "rs485_en";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -481,7 +483,7 @@</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtc@68 {</div><div class='add'>+	gsc_rtc: rtc@68 {</div><div class='ctx'> 		compatible = "dallas,ds1672";</div><div class='ctx'> 		reg = &lt;0x68&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -809,13 +811,14 @@</div><div class='ctx'> 			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09	0x40000040 /* DIO0 */</div><div class='ctx'> 			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11	0x40000040 /* DIO1 */</div><div class='ctx'> 			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x40000040 /* M2SKT_OFF# */</div><div class='del'>-			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS# */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS1# */</div><div class='ctx'> 			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x40000040 /* M2SKT_PIN20 */</div><div class='ctx'> 			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11	0x40000040 /* M2SKT_PIN22 */</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13	0x40000150 /* PCIE1_WDIS# */</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14	0x40000150 /* PCIE3_WDIS# */</div><div class='ctx'> 			MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18	0x40000150 /* PCIE2_WDIS# */</div><div class='ctx'> 			MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x40000040 /* M2SKT_RST# */</div><div class='add'>+			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x40000150 /* M2KST_WDIS2# */</div><div class='ctx'> 			MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x40000104 /* UART_TERM */</div><div class='ctx'> 			MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	0x40000104 /* UART_RS485 */</div><div class='ctx'> 			MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00	0x40000104 /* UART_HALF */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi<br/>index 0d40cb0f05f6..f90b293c85fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi</a></div><div class='hunk'>@@ -104,6 +104,16 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	accelerometer@19 {</div><div class='add'>+		compatible = "st,lis2de12";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_accel&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	eeprom@52 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='hunk'>@@ -204,6 +214,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_accel: accelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08	0x159</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_gpio_leds: gpioledgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x6	/* LEDG */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts<br/>new file mode 100644<br/>index 000000000000..597813308630<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Gateworks Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp.dtsi"</div><div class='add'>+#include "imx8mp-venice-gw702x.dtsi"</div><div class='add'>+#include "imx8mp-venice-gw82xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Gateworks Venice GW82xx-2x i.MX8MP Development Kit";</div><div class='add'>+	compatible = "gateworks,imx8mp-gw82xx-2x", "fsl,imx8mp";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi<br/>new file mode 100644<br/>index 000000000000..2b86cc62a41a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,533 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Gateworks Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+		fsa1 = &amp;fsa0;</div><div class='add'>+		fsa2 = &amp;fsa1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_leds&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_refclk: clock-pcie0 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pps {</div><div class='add'>+		compatible = "pps-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pps&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb2_vbus: regulator-usb2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usb2_en&gt;;</div><div class='add'>+		regulator-name = "usb2_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio4 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_vmmc&gt;;</div><div class='add'>+		regulator-name = "VDD_3V3_SD";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecspi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi2&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;,	/* CS0 onboard TPM */</div><div class='add'>+		   &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;, /* CS1 off-board J32 SPI */</div><div class='add'>+		   &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;, /* CS3 off-board J52 FSA1 */</div><div class='add'>+		   &lt;&amp;gpio4 26 GPIO_ACTIVE_LOW&gt;; /* CS2 off-board J51 FSA2 */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@0 {</div><div class='add'>+		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "fsa2_gpio1", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"dio1", "fsa1_gpio2", "", "dio0",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "", "",</div><div class='add'>+		"", "", "rs485_en", "rs485_term",</div><div class='add'>+		"fsa2_gpio2", "fsa1_gpio1", "", "rs485_half",</div><div class='add'>+		"", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	accelerometer@19 {</div><div class='add'>+		compatible = "st,lis2de12";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_accel&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		st,drdy-int-pin = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	magnetometer@1e {</div><div class='add'>+		compatible = "st,lis2mdl";</div><div class='add'>+		reg = &lt;0x1e&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mag&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;28 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* J30 */</div><div class='add'>+		fsa1: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_fsa2i2c&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@20 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+				interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+				pagesize = &lt;16&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@55 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x55&gt;;</div><div class='add'>+				pagesize = &lt;16&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* J29 */</div><div class='add'>+		fsa0: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_fsa1i2c&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpio@20 {</div><div class='add'>+				compatible = "nxp,pca9555";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+				interrupts = &lt;14 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@54 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x54&gt;;</div><div class='add'>+				pagesize = &lt;16&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@55 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x55&gt;;</div><div class='add'>+				pagesize = &lt;16&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* J33 */</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	clocks = &lt;&amp;pcie0_refclk&gt;;</div><div class='add'>+	clock-names = "ref";</div><div class='add'>+	fsl,refclk-pad-mode = &lt;IMX8_PCIE_REFCLK_PAD_INPUT&gt;;</div><div class='add'>+	fsl,clkreq-unsupported;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	reset-gpio = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie@0,0 {</div><div class='add'>+			reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			pcie@7,0 {</div><div class='add'>+				reg = &lt;0x3800 0 0 0 0&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				eth1: ethernet@0,0 {</div><div class='add'>+					reg = &lt;0x0000 0 0 0 0&gt;;</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+					local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GPS */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RS232 */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB1 - FSA1 */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	fsl,permanently-attached;</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB2 - USB3.0 Hub */</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	fsl,permanently-attached;</div><div class='add'>+	fsl,disable-port-power-control;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb2_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDIO 1.8V */</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* microSD */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_HIGH&gt;; /* CD is active high */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_hog: hoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08	0x40000146 /* DIO1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11	0x40000146 /* DIO0 */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x40000106 /* RS485_HALF */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x40000106 /* RS485_EN */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23	0x40000106 /* RS485_TERM */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_accel: accelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x150	/* IRQ# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX		0x154</div><div class='add'>+			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX		0x154</div><div class='add'>+			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX		0x154</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio_leds: gpioledgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x6	/* LEDG */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x6	/* LEDR */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fsa1i2c: fsa1i2cgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14	0x1d0		/* FSA1_ALERT# */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25	0x400001d0	/* FSA1_GPIO1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09	0x400001d0	/* FSA1_GPIO2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fsa2i2c: fsa2i2cgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x1d0		/* FSA2_ALERT# */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x400001d0	/* FSA2_GPIO1 */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24	0x400001d0	/* FSA2_GPIO2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mag: maggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x140	/* IRQ# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie0: pcie0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106	/* PERST# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pps: ppsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x146</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usb2_en: regusb2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x146	/* USBHUB_RST# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spi2: spi2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0xd0</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0xd0</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0xd0</div><div class='add'>+			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140	/* J32_CS */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x140	/* TPM_CS */</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x140	/* FSA1_CS */</div><div class='add'>+			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26	0x140	/* FSA2_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart4: uart4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX	0x140</div><div class='add'>+			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196</div><div class='add'>+			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6</div><div class='add'>+			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x1d0</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi<br/>index da8902c5f7e5..1493319aa748 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -28,10 +28,10 @@</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='ctx'> 			"IN2L", "Line In Jack",</div><div class='ctx'> 			"IN2R", "Line In Jack",</div><div class='del'>-			"Headphone Jack", "MICBIAS",</div><div class='del'>-			"IN1L", "Headphone Jack";</div><div class='add'>+			"Microphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Microphone Jack";</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='del'>-			"Microphone", "Headphone Jack",</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='ctx'> 			"Headphone", "Headphone Jack",</div><div class='ctx'> 			"Line", "Line In Jack";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi<br/>new file mode 100644<br/>index 000000000000..db1b4ee7728c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-verdin-ivy.dtsi</a></div><div class='hunk'>@@ -0,0 +1,512 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin IMX8MP SoM on Ivy carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* AIN1 Voltage w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_voltage_unmanaged: voltage-divider-ain1 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1 Current w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_current_unmanaged: current-sense-shunt-ain1 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1_MODE - SODIMM 216 */</div><div class='add'>+	ain1_mode_mux_ctrl: mux-controller-0 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio5&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain1_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain1_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain1_current";</div><div class='add'>+		io-channels = &lt;&amp;ain1_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Voltage w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_voltage_unmanaged: voltage-divider-ain2 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Current w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_current_unmanaged: current-sense-shunt-ain2 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2_MODE - SODIMM 218 */</div><div class='add'>+	ain2_mode_mux_ctrl: mux-controller-1 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio6&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain2_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain2_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain2_current";</div><div class='add'>+		io-channels = &lt;&amp;ain2_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ivy_leds&gt;;</div><div class='add'>+</div><div class='add'>+		/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Green - SODIMM 32 - LEDs.GPIO2 */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Red - SODIMM 34 - LEDs.GPIO3 */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Green - SODIMM 54 - LEDs.GPIO5 */</div><div class='add'>+		led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Red - SODIMM 44 - LEDs.GPIO6 */</div><div class='add'>+		led-5 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */</div><div class='add'>+		led-6 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio5 01 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Red - SODIMM 48 - LEDs.GPIO8 */</div><div class='add'>+		led-7 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain1: regulator-3v2-ain1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain2: regulator-3v2-ain2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Ivy Power Supply Input Voltage */</div><div class='add'>+	ivy-input-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_1 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 7&gt;;</div><div class='add'>+		full-ohms = &lt;204700&gt;; /* 200k + 4.7k */</div><div class='add'>+		output-ohms = &lt;4700&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-5v-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_2 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 6&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 27k + 12k */</div><div class='add'>+		output-ohms = &lt;12000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-3v3-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_3 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 5&gt;;</div><div class='add'>+		full-ohms = &lt;54000&gt;; /* 27k + 27k */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-1v8-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_4 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 4&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 12k + 27k */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;ecspi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ecspi1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio4&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio1 0 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@1 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fram@2 {</div><div class='add'>+		compatible = "fujitsu,mb85rs256", "atmel,at25";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		address-width = &lt;16&gt;;</div><div class='add'>+		size = &lt;32768&gt;;</div><div class='add'>+		spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+		pagesize = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EEPROM on Ivy */</div><div class='add'>+&amp;eeprom_carrier_board {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_2 */</div><div class='add'>+&amp;fec {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;verdin_eth2_mdio {</div><div class='add'>+	ethphy2: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"DIG_1", /* SODIMM 56 */</div><div class='add'>+		"DIG_2", /* SODIMM 58 */</div><div class='add'>+		"REL1",  /* SODIMM 60 */</div><div class='add'>+		"REL2",  /* SODIMM 62 */</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"REL4", /* SODIMM 66 */</div><div class='add'>+		"",</div><div class='add'>+		"REL3", /* SODIMM 64 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Temperature sensor on Ivy */</div><div class='add'>+&amp;hwmon_temp {</div><div class='add'>+	compatible = "ti,tmp1075";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4 CSI */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ivy_adc1: adc@40 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio7&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy_adc2: adc@41 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1 */</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3 */</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usb3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usb3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio2&gt;, &lt;&amp;pinctrl_gpio3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_ivy_dig_inputs&gt;, &lt;&amp;pinctrl_ivy_relays&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_dig_inputs: ivydiginputsgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x96&gt;, /* SODIMM 56 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07	0x96&gt;; /* SODIMM 58 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_leds: ivyledsgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25	0x16&gt;, /* SODIMM 30 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22	0x16&gt;, /* SODIMM 32 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19	0x16&gt;, /* SODIMM 34 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x16&gt;, /* SODIMM 36 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	0x16&gt;, /* SODIMM 44 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x16&gt;, /* SODIMM 46 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30	0x16&gt;, /* SODIMM 48 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01	0x16&gt;; /* SODIMM 54 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ivy_relays: ivyrelaysgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08	0x16&gt;, /* SODIMM 60 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09	0x16&gt;, /* SODIMM 62 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16	0x16&gt;, /* SODIMM 64 */</div><div class='add'>+			&lt;MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x16&gt;; /* SODIMM 66 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts b/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..cb49690050ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-verdin.dtsi"</div><div class='add'>+#include "imx8mp-verdin-nonwifi.dtsi"</div><div class='add'>+#include "imx8mp-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin iMX8M Plus on Ivy";</div><div class='add'>+	compatible = "toradex,verdin-imx8mp-nonwifi-ivy",</div><div class='add'>+		     "toradex,verdin-imx8mp-nonwifi",</div><div class='add'>+		     "toradex,verdin-imx8mp",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts b/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..22b8fe70b36d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8mp-verdin.dtsi"</div><div class='add'>+#include "imx8mp-verdin-wifi.dtsi"</div><div class='add'>+#include "imx8mp-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin iMX8M Plus WB on Ivy";</div><div class='add'>+	compatible = "toradex,verdin-imx8mp-wifi-ivy",</div><div class='add'>+		     "toradex,verdin-imx8mp-wifi",</div><div class='add'>+		     "toradex,verdin-imx8mp",</div><div class='add'>+		     "fsl,imx8mp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi<br/>index a19ad5ee7f79..d43ba0087126 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi</a></div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-name = "+V3.3_SD";</div><div class='del'>-		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved-memory {</div><div class='hunk'>@@ -320,7 +320,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_fec_sleep&gt;;</div><div class='ctx'> </div><div class='del'>-	mdio {</div><div class='add'>+	verdin_eth2_mdio: mdio {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -478,6 +478,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pca9450: pmic@25 {</div><div class='hunk'>@@ -591,11 +592,12 @@</div><div class='ctx'> 		vs-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	adc@49 {</div><div class='add'>+	verdin_som_adc: adc@49 {</div><div class='ctx'> 		compatible = "ti,ads1015";</div><div class='ctx'> 		reg = &lt;0x49&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/* Verdin I2C_1 (ADC_4 - ADC_3) */</div><div class='ctx'> 		channel@0 {</div><div class='hunk'>@@ -655,7 +657,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eeprom@50 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -669,6 +671,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c2_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> </div><div class='ctx'> 	atmel_mxt_ts_mezzanine: touch-mezzanine@4a {</div><div class='ctx'> 		compatible = "atmel,maxtouch";</div><div class='hunk'>@@ -690,6 +693,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c3_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin I2C_1 */</div><div class='hunk'>@@ -700,6 +704,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c4_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> </div><div class='ctx'> 	gpio_expander_21: gpio-expander@21 {</div><div class='ctx'> 		compatible = "nxp,pcal6416";</div><div class='hunk'>@@ -765,7 +770,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM on display adapter (MIPI DSI Display Adapter) */</div><div class='ctx'> 	eeprom_display_adapter: eeprom@50 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -773,7 +778,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM on carrier board */</div><div class='ctx'> 	eeprom_carrier_board: eeprom@57 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -788,6 +793,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_i2c5_gpio&gt;;</div><div class='ctx'> 	scl-gpios = &lt;&amp;gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	single-master;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Verdin PCIE_1 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi<br/>index f3531cfb0d79..a3de6604e29f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/imx8mp-reset.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/imx8mp-reset-audiomix.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/fsl,imx8mp.h&gt;</div><div class='hunk'>@@ -47,11 +48,24 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_pd_wait: cpu-pd-wait {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010033&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;1000&gt;;</div><div class='add'>+				exit-latency-us = &lt;700&gt;;</div><div class='add'>+				min-residency-us = &lt;2700&gt;;</div><div class='add'>+				wakeup-latency-us = &lt;1500&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		A53_0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -65,13 +79,13 @@</div><div class='ctx'> 			nvmem-cell-names = "speed_grade";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		A53_1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -83,13 +97,13 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		A53_2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -101,13 +115,13 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		A53_3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -119,6 +133,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;A53_L2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		A53_L2: l2-cache0 {</div><div class='hunk'>@@ -262,7 +277,7 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		dsp_reserved: dsp@92400000 {</div><div class='del'>-			reg = &lt;0 0x92400000 0 0x2000000&gt;;</div><div class='add'>+			reg = &lt;0 0x92400000 0 0x1000000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -283,7 +298,7 @@</div><div class='ctx'> 		cpu-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;250&gt;;</div><div class='ctx'> 			polling-delay = &lt;2000&gt;;</div><div class='del'>-			thermal-sensors = &lt;&amp;tmu 0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tmu 1&gt;;</div><div class='ctx'> 			trips {</div><div class='ctx'> 				cpu_alert0: trip0 {</div><div class='ctx'> 					temperature = &lt;85000&gt;;</div><div class='hunk'>@@ -305,7 +320,10 @@</div><div class='ctx'> 						&lt;&amp;A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 						&lt;&amp;A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 						&lt;&amp;A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						&lt;&amp;A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+						&lt;&amp;A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;gpu3d THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;gpu2d THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;npu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -313,7 +331,7 @@</div><div class='ctx'> 		soc-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;250&gt;;</div><div class='ctx'> 			polling-delay = &lt;2000&gt;;</div><div class='del'>-			thermal-sensors = &lt;&amp;tmu 1&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tmu 0&gt;;</div><div class='ctx'> 			trips {</div><div class='ctx'> 				soc_alert0: trip0 {</div><div class='ctx'> 					temperature = &lt;85000&gt;;</div><div class='hunk'>@@ -335,7 +353,10 @@</div><div class='ctx'> 						&lt;&amp;A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 						&lt;&amp;A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 						&lt;&amp;A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						&lt;&amp;A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+						&lt;&amp;A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;gpu3d THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;gpu2d THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;npu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -798,12 +819,12 @@</div><div class='ctx'> 						assigned-clocks = &lt;&amp;clk IMX8MP_CLK_ML_CORE&gt;,</div><div class='ctx'> 								  &lt;&amp;clk IMX8MP_CLK_ML_AXI&gt;,</div><div class='ctx'> 								  &lt;&amp;clk IMX8MP_CLK_ML_AHB&gt;;</div><div class='del'>-						assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+						assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;,</div><div class='ctx'> 									 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='ctx'> 									 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='del'>-						assigned-clock-rates = &lt;800000000&gt;,</div><div class='add'>+						assigned-clock-rates = &lt;1000000000&gt;,</div><div class='ctx'> 								       &lt;800000000&gt;,</div><div class='del'>-								       &lt;300000000&gt;;</div><div class='add'>+								       &lt;400000000&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					pgc_audio: power-domain@5 {</div><div class='hunk'>@@ -816,7 +837,7 @@</div><div class='ctx'> 						assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='ctx'> 									 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='ctx'> 						assigned-clock-rates = &lt;400000000&gt;,</div><div class='del'>-								       &lt;600000000&gt;;</div><div class='add'>+								       &lt;800000000&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					pgc_gpu2d: power-domain@6 {</div><div class='hunk'>@@ -861,24 +882,17 @@</div><div class='ctx'> </div><div class='ctx'> 					pgc_vpu_g1: power-domain@11 {</div><div class='ctx'> 						#power-domain-cells = &lt;0&gt;;</div><div class='del'>-						power-domains = &lt;&amp;pgc_vpumix&gt;;</div><div class='ctx'> 						reg = &lt;IMX8MP_POWER_DOMAIN_VPU_G1&gt;;</div><div class='del'>-						clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G1_ROOT&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					pgc_vpu_g2: power-domain@12 {</div><div class='ctx'> 						#power-domain-cells = &lt;0&gt;;</div><div class='del'>-						power-domains = &lt;&amp;pgc_vpumix&gt;;</div><div class='ctx'> 						reg = &lt;IMX8MP_POWER_DOMAIN_VPU_G2&gt;;</div><div class='del'>-						clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G2_ROOT&gt;;</div><div class='del'>-</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					pgc_vpu_vc8000e: power-domain@13 {</div><div class='ctx'> 						#power-domain-cells = &lt;0&gt;;</div><div class='del'>-						power-domains = &lt;&amp;pgc_vpumix&gt;;</div><div class='ctx'> 						reg = &lt;IMX8MP_POWER_DOMAIN_VPU_VC8000E&gt;;</div><div class='del'>-						clocks = &lt;&amp;clk IMX8MP_CLK_VPU_VC8KE_ROOT&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					pgc_hdmimix: power-domain@14 {</div><div class='hunk'>@@ -1234,6 +1248,7 @@</div><div class='ctx'> 				reg = &lt;0x30e60000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_MU2_ROOT&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1261,7 +1276,7 @@</div><div class='ctx'> 				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";</div><div class='ctx'> 				reg = &lt;0x30b40000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;,</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_IPG_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_NAND_USDHC_BUS&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_USDHC1_ROOT&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='hunk'>@@ -1275,7 +1290,7 @@</div><div class='ctx'> 				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";</div><div class='ctx'> 				reg = &lt;0x30b50000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;,</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_IPG_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_NAND_USDHC_BUS&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_USDHC2_ROOT&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='hunk'>@@ -1289,7 +1304,7 @@</div><div class='ctx'> 				compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";</div><div class='ctx'> 				reg = &lt;0x30b60000 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX8MP_CLK_DUMMY&gt;,</div><div class='add'>+				clocks = &lt;&amp;clk IMX8MP_CLK_IPG_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_NAND_USDHC_BUS&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_USDHC3_ROOT&gt;;</div><div class='ctx'> 				clock-names = "ipg", "ahb", "per";</div><div class='hunk'>@@ -1601,10 +1616,11 @@</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_SAI3&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_SAI5&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_SAI6&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX8MP_CLK_SAI7&gt;;</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_SAI7&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_AUDIO_AXI_ROOT&gt;;</div><div class='ctx'> 				clock-names = "ahb",</div><div class='ctx'> 					      "sai1", "sai2", "sai3",</div><div class='del'>-					      "sai5", "sai6", "sai7";</div><div class='add'>+					      "sai5", "sai6", "sai7", "axi";</div><div class='ctx'> 				power-domains = &lt;&amp;pgc_audio&gt;;</div><div class='ctx'> 				assigned-clocks = &lt;&amp;clk IMX8MP_AUDIO_PLL1&gt;,</div><div class='ctx'> 						  &lt;&amp;clk IMX8MP_AUDIO_PLL2&gt;;</div><div class='hunk'>@@ -1626,6 +1642,12 @@</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				/* Nominal drive mode maximum */</div><div class='add'>+				opp-800000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* Overdrive mode maximum */</div><div class='ctx'> 				opp-1000000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 				};</div><div class='hunk'>@@ -1679,9 +1701,12 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_ISP_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;;</div><div class='del'>-				clock-names = "isp", "aclk", "hclk";</div><div class='del'>-				power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP&gt;;</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT&gt;;</div><div class='add'>+				clock-names = "isp", "aclk", "hclk", "pclk";</div><div class='add'>+				power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP&gt;,</div><div class='add'>+						&lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1&gt;;</div><div class='add'>+				power-domain-names = "isp", "csi2";</div><div class='ctx'> 				fsl,blk-ctrl = &lt;&amp;media_blk_ctrl 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -1701,9 +1726,12 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_ISP_ROOT&gt;,</div><div class='ctx'> 					 &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;;</div><div class='del'>-				clock-names = "isp", "aclk", "hclk";</div><div class='del'>-				power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP&gt;;</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT&gt;;</div><div class='add'>+				clock-names = "isp", "aclk", "hclk", "pclk";</div><div class='add'>+				power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP&gt;,</div><div class='add'>+						&lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_2&gt;;</div><div class='add'>+				power-domain-names = "isp", "csi2";</div><div class='ctx'> 				fsl,blk-ctrl = &lt;&amp;media_blk_ctrl 1&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2023,6 +2051,10 @@</div><div class='ctx'> 						     "pai", "pvi", "trng",</div><div class='ctx'> 						     "hdmi-tx", "hdmi-tx-phy",</div><div class='ctx'> 						     "hdcp", "hrv";</div><div class='add'>+				interconnects = &lt;&amp;noc IMX8MP_ICM_HRV &amp;noc IMX8MP_ICN_HDMI&gt;,</div><div class='add'>+						&lt;&amp;noc IMX8MP_ICM_LCDIF_HDMI &amp;noc IMX8MP_ICN_HDMI&gt;,</div><div class='add'>+						&lt;&amp;noc IMX8MP_ICM_HDCP &amp;noc IMX8MP_ICN_HDMI&gt;;</div><div class='add'>+				interconnect-names = "hrv", "lcdif-hdmi", "hdcp";</div><div class='ctx'> 				#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -2136,7 +2168,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie: pcie@33800000 {</div><div class='add'>+		pcie0: pcie: pcie@33800000 {</div><div class='ctx'> 			compatible = "fsl,imx8mp-pcie";</div><div class='ctx'> 			reg = &lt;0x33800000 0x400000&gt;, &lt;0x1ff00000 0x80000&gt;;</div><div class='ctx'> 			reg-names = "dbi", "config";</div><div class='hunk'>@@ -2174,10 +2206,13 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie_ep: pcie-ep@33800000 {</div><div class='add'>+		pcie0_ep: pcie_ep: pcie-ep@33800000 {</div><div class='ctx'> 			compatible = "fsl,imx8mp-pcie-ep";</div><div class='del'>-			reg = &lt;0x33800000 0x000400000&gt;, &lt;0x18000000 0x08000000&gt;;</div><div class='del'>-			reg-names = "dbi", "addr_space";</div><div class='add'>+			reg = &lt;0x33800000 0x100000&gt;,</div><div class='add'>+			      &lt;0x18000000 0x8000000&gt;,</div><div class='add'>+			      &lt;0x33900000 0x100000&gt;,</div><div class='add'>+			      &lt;0x33b00000 0x100000&gt;;</div><div class='add'>+			reg-names = "dbi", "addr_space", "dbi2", "atu";</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_HSIO_ROOT&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_HSIO_AXI&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_PCIE_ROOT&gt;;</div><div class='hunk'>@@ -2209,11 +2244,12 @@</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_GPU_ROOT&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_GPU_AHB&gt;;</div><div class='ctx'> 			clock-names = "core", "shader", "bus", "reg";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU3D_CORE&gt;,</div><div class='ctx'> 					  &lt;&amp;clk IMX8MP_CLK_GPU3D_SHADER_CORE&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='del'>-						 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;800000000&gt;, &lt;800000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;,</div><div class='add'>+						 &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;1000000000&gt;, &lt;1000000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;pgc_gpu3d&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2225,9 +2261,10 @@</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_GPU_ROOT&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_GPU_AHB&gt;;</div><div class='ctx'> 			clock-names = "core", "bus", "reg";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU2D_CORE&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;800000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;1000000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;pgc_gpu2d&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2237,8 +2274,8 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G1_ROOT&gt;;</div><div class='ctx'> 			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G1&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;600000000&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;800000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2247,9 +2284,9 @@</div><div class='ctx'> 			reg = &lt;0x38310000 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G2_ROOT&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G2&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_1000M&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;500000000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_G2&gt;, &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;700000000&gt;, &lt;700000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2264,9 +2301,9 @@</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_VPU_G2_ROOT&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_VPU_VC8KE_ROOT&gt;;</div><div class='ctx'> 			clock-names = "g1", "g2", "vc8000e";</div><div class='del'>-			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_BUS&gt;, &lt;&amp;clk IMX8MP_VPU_PLL&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX8MP_VPU_PLL_OUT&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;600000000&gt;, &lt;600000000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX8MP_CLK_VPU_BUS&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;800000000&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;noc IMX8MP_ICM_VPU_G1 &amp;noc IMX8MP_ICN_VIDEO&gt;,</div><div class='ctx'> 					&lt;&amp;noc IMX8MP_ICM_VPU_G2 &amp;noc IMX8MP_ICN_VIDEO&gt;,</div><div class='ctx'> 					&lt;&amp;noc IMX8MP_ICM_VPU_H1 &amp;noc IMX8MP_ICN_VIDEO&gt;;</div><div class='hunk'>@@ -2282,6 +2319,7 @@</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_ML_AXI&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MP_CLK_ML_AHB&gt;;</div><div class='ctx'> 			clock-names = "core", "shader", "bus", "reg";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;pgc_mlmix&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2289,6 +2327,7 @@</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0x38800000 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x38880000 0xc0000&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -2393,13 +2432,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dsp: dsp@3b6e8000 {</div><div class='del'>-			compatible = "fsl,imx8mp-dsp";</div><div class='add'>+			compatible = "fsl,imx8mp-hifi4";</div><div class='ctx'> 			reg = &lt;0x3b6e8000 0x88000&gt;;</div><div class='del'>-			mbox-names = "txdb0", "txdb1",</div><div class='del'>-				"rxdb0", "rxdb1";</div><div class='del'>-			mboxes = &lt;&amp;mu2 2 0&gt;, &lt;&amp;mu2 2 1&gt;,</div><div class='del'>-				&lt;&amp;mu2 3 0&gt;, &lt;&amp;mu2 3 1&gt;;</div><div class='del'>-			memory-region = &lt;&amp;dsp_reserved&gt;;</div><div class='add'>+			clocks = &lt;&amp;audio_blk_ctrl  IMX8MP_CLK_AUDIOMIX_DSP_ROOT&gt;,</div><div class='add'>+				&lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG&gt;,</div><div class='add'>+				&lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT&gt;,</div><div class='add'>+				&lt;&amp;audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT&gt;;</div><div class='add'>+			clock-names = "ipg", "ocram", "core", "debug";</div><div class='add'>+			power-domains = &lt;&amp;pgc_audio&gt;;</div><div class='add'>+			mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+			mboxes = &lt;&amp;mu2 0 0&gt;, &lt;&amp;mu2 1 0&gt;, &lt;&amp;mu2 3 0&gt;;</div><div class='add'>+			firmware-name = "imx/dsp/hifi4.bin";</div><div class='add'>+			resets = &lt;&amp;audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL&gt;;</div><div class='add'>+			reset-names = "runstall";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts<br/>index a87d0692c3bb..a88bc9034663 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq-evk.dts</a></div><div class='hunk'>@@ -108,6 +108,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;cpudai&gt;;</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;cpudai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Line", "Left Line Out Jack",</div><div class='ctx'> 			"Line", "Right Line Out Jack";</div><div class='hunk'>@@ -117,11 +118,11 @@</div><div class='ctx'> </div><div class='ctx'> 		cpudai: simple-audio-card,cpu {</div><div class='ctx'> 			sound-dai = &lt;&amp;sai2&gt;;</div><div class='add'>+			system-clock-direction-out;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		link_codec: simple-audio-card,codec {</div><div class='ctx'> 			sound-dai = &lt;&amp;wm8524&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX8MQ_CLK_SAI2_ROOT&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -377,6 +378,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MQ_CLK_PCIE1_ROOT&gt;,</div><div class='add'>+		 &lt;&amp;pcie0_refclk&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MQ_CLK_PCIE1_PHY&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MQ_CLK_PCIE1_AUX&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='hunk'>@@ -390,6 +401,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie1_ep {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MQ_CLK_PCIE2_ROOT&gt;,</div><div class='add'>+		 &lt;&amp;pcie0_refclk&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX8MQ_CLK_PCIE2_AUX&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pgc_gpu {</div><div class='ctx'> 	power-supply = &lt;&amp;sw1a_reg&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -420,6 +441,11 @@</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MQ_AUDIO_PLL1_BYPASS&gt;, &lt;&amp;clk IMX8MQ_CLK_SAI2&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;clk IMX8MQ_AUDIO_PLL1&gt;, &lt;&amp;clk IMX8MQ_AUDIO_PLL1_OUT&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;0&gt;, &lt;24576000&gt;;</div><div class='add'>+	clocks = &lt;&amp;clk IMX8MQ_CLK_SAI2_IPG&gt;, &lt;&amp;clk IMX8MQ_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MQ_CLK_SAI2_ROOT&gt;, &lt;&amp;clk IMX8MQ_CLK_DUMMY&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MQ_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MQ_AUDIO_PLL1_OUT&gt;,</div><div class='add'>+		&lt;&amp;clk IMX8MQ_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts<br/>index b268ba7a0e12..d9f203c79519 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts</a></div><div class='hunk'>@@ -172,7 +172,7 @@</div><div class='ctx'> 			"Headphones", "HP_OUT",</div><div class='ctx'> 			"Builtin Speaker", "Speaker Amp OUTR",</div><div class='ctx'> 			"Speaker Amp INR", "LINE_OUT";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio3 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,cpu {</div><div class='ctx'> 			sound-dai = &lt;&amp;sai2&gt;;</div><div class='hunk'>@@ -979,24 +979,27 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_dwc3_0 {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	port@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		typec_hs: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			typec_hs: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	port@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		typec_ss: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;usb_con_ss&gt;;</div><div class='add'>+			typec_ss: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_con_ss&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi<br/>index 1b39514d5c12..9e0e2d7271ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi</a></div><div class='hunk'>@@ -241,7 +241,7 @@</div><div class='ctx'> 			"Headset Mic", "MICBIAS",</div><div class='ctx'> 			"IN3R", "Headset Mic",</div><div class='ctx'> 			"DMICDAT", "Digital Mic";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio3 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,cpu {</div><div class='ctx'> 			sound-dai = &lt;&amp;sai2&gt;;</div><div class='hunk'>@@ -794,7 +794,6 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'> 		interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-names = "irq";</div><div class='del'>-		extcon = &lt;&amp;usb3_phy0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		connector {</div><div class='hunk'>@@ -1322,25 +1321,28 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_dwc3_0 {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	port@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		typec_hs: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			typec_hs: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	port@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		typec_ss: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;usb_con_ss&gt;;</div><div class='add'>+			typec_ss: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb_con_ss&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi<br/>index 01e5092e4c40..c92001c80f11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi</a></div><div class='hunk'>@@ -254,6 +254,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;84000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;nvcc_1v8_reg&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi<br/>index 0c960efd9b3d..c7bbba45f368 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi</a></div><div class='hunk'>@@ -517,8 +517,6 @@</div><div class='ctx'> 		eeprom@a4 {</div><div class='ctx'> 			compatible = "zii,rave-sp-eeprom";</div><div class='ctx'> 			reg = &lt;0xa4 0x4000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			zii,eeprom-name = "main-eeprom";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi<br/>index e03186bbc415..607962f807be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8mq.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8mq.dtsi</a></div><div class='hunk'>@@ -106,7 +106,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MQ_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -126,7 +125,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MQ_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -144,7 +142,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MQ_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -162,7 +159,6 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			clock-latency = &lt;61036&gt;; /* two CLK32 periods */</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MQ_CLK_ARM&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='hunk'>@@ -1774,6 +1770,41 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie0_ep: pcie-ep@33800000 {</div><div class='add'>+			compatible = "fsl,imx8mq-pcie-ep";</div><div class='add'>+			reg = &lt;0x33800000 0x100000&gt;,</div><div class='add'>+			      &lt;0x18000000 0x8000000&gt;,</div><div class='add'>+			      &lt;0x33900000 0x100000&gt;,</div><div class='add'>+			      &lt;0x33b00000 0x100000&gt;;</div><div class='add'>+			reg-names = "dbi", "addr_space", "dbi2", "atu";</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dma";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX8MQ_CLK_PCIE2_ROOT&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MQ_CLK_PCIE2_AUX&gt;;</div><div class='add'>+			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='add'>+			power-domains = &lt;&amp;pgc_pcie&gt;;</div><div class='add'>+			resets = &lt;&amp;src IMX8MQ_RESET_PCIEPHY2&gt;,</div><div class='add'>+				 &lt;&amp;src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN&gt;,</div><div class='add'>+				 &lt;&amp;src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF&gt;;</div><div class='add'>+			reset-names = "pciephy", "apps", "turnoff";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX8MQ_CLK_PCIE2_CTRL&gt;,</div><div class='add'>+					  &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='add'>+					  &lt;&amp;clk IMX8MQ_CLK_PCIE2_AUX&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX8MQ_SYS2_PLL_250M&gt;,</div><div class='add'>+						 &lt;&amp;clk IMX8MQ_SYS2_PLL_100M&gt;,</div><div class='add'>+						 &lt;&amp;clk IMX8MQ_SYS1_PLL_80M&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;250000000&gt;, &lt;100000000&gt;,</div><div class='add'>+					       &lt;10000000&gt;;</div><div class='add'>+			num-ib-windows = &lt;4&gt;;</div><div class='add'>+			num-ob-windows = &lt;4&gt;;</div><div class='add'>+			fsl,max-link-speed = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie1: pcie@33c00000 {</div><div class='ctx'> 			compatible = "fsl,imx8mq-pcie";</div><div class='ctx'> 			reg = &lt;0x33c00000 0x400000&gt;,</div><div class='hunk'>@@ -1819,13 +1850,16 @@</div><div class='ctx'> </div><div class='ctx'> 		pcie1_ep: pcie-ep@33c00000 {</div><div class='ctx'> 			compatible = "fsl,imx8mq-pcie-ep";</div><div class='del'>-			reg = &lt;0x33c00000 0x000400000&gt;,</div><div class='del'>-			      &lt;0x20000000 0x08000000&gt;;</div><div class='del'>-			reg-names = "dbi", "addr_space";</div><div class='add'>+			reg = &lt;0x33c00000 0x100000&gt;,</div><div class='add'>+			      &lt;0x20000000 0x8000000&gt;,</div><div class='add'>+			      &lt;0x33d00000 0x100000&gt;,</div><div class='add'>+			      &lt;0x33f00000 0x100000&gt;;</div><div class='add'>+			reg-names = "dbi", "addr_space", "dbi2", "atu";</div><div class='ctx'> 			num-lanes = &lt;1&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "dma";</div><div class='ctx'> 			fsl,max-link-speed = &lt;2&gt;;</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk IMX8MQ_CLK_PCIE2_ROOT&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='ctx'> 				 &lt;&amp;clk IMX8MQ_CLK_PCIE2_PHY&gt;,</div><div class='hunk'>@@ -1856,6 +1890,7 @@</div><div class='ctx'> 			      &lt;0x31000000 0x2000&gt;,	/* GICC */</div><div class='ctx'> 			      &lt;0x31010000 0x2000&gt;,	/* GICV */</div><div class='ctx'> 			      &lt;0x31020000 0x2000&gt;;	/* GICH */</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi<br/>index 81ba8b2831ac..b1c3f331c4ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi</a></div><div class='hunk'>@@ -9,8 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Toradex Apalis iMX8QM V1.1";</div><div class='del'>-	compatible = "toradex,apalis-imx8-v1.1",</div><div class='del'>-		     "fsl,imx8qm";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* TODO: Cooling Maps */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi<br/>index 4d6427fbe875..f97feee52c81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi</a></div><div class='hunk'>@@ -7,8 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Toradex Apalis iMX8QM";</div><div class='del'>-	compatible = "toradex,apalis-imx8",</div><div class='del'>-		     "fsl,imx8qm";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ethphy0 {</div><div class='hunk'>@@ -24,6 +22,10 @@</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_refa_clk {</div><div class='add'>+	enable-gpios = &lt;&amp;lsio_gpio4 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* TODO: Apalis HDMI1 */</div><div class='ctx'> </div><div class='ctx'> /* Apalis I2C2 (DDC) */</div><div class='hunk'>@@ -190,12 +192,6 @@</div><div class='ctx'> 			  "MXM3_291",</div><div class='ctx'> 			  "MXM3_289",</div><div class='ctx'> 			  "MXM3_287";</div><div class='del'>-</div><div class='del'>-	/* Enable pcie root / sata ref clock unconditionally */</div><div class='del'>-	pcie-sata-hog {</div><div class='del'>-		gpios = &lt;27 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lsio_gpio5 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso b/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso<br/>new file mode 100644<br/>index 000000000000..ceb63c28b21a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi0.dtso</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;i2c_mipi_csi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c_mipi_csi0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ov5640_mipi_0: camera@3c {</div><div class='add'>+		compatible = "ovti,ov5640";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal24m&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mipi_csi0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;lsio_gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lsio_gpio1 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ov5640_mipi_0_ep: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi0_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_csi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_csi0_in: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ov5640_mipi_0_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso b/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso<br/>new file mode 100644<br/>index 000000000000..9e6d33c0315e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-mek-ov5640-csi1.dtso</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;i2c_mipi_csi1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c_mipi_csi1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ov5640_mipi_1: camera@3c {</div><div class='add'>+		compatible = "ovti,ov5640";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal24m&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mipi_csi1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;lsio_gpio1 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lsio_gpio1 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ov5640_mipi_1_ep: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi1_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_csi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_csi1_in: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ov5640_mipi_1_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts<br/>index 62203eed6a6c..202d5c67ac40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-mek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-mek.dts</a></div><div class='hunk'>@@ -32,6 +32,13 @@</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	xtal24m: clock-xtal24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xtal_24MHz";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -92,6 +99,36 @@</div><div class='ctx'> 			reg = &lt;0 0x90400000 0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		dsp_reserved: memory@92400000 {</div><div class='add'>+			reg = &lt;0 0x92400000 0 0x1000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0vring0: memory@942f0000 {</div><div class='add'>+			reg = &lt;0 0x942f0000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0vring1: memory@942f8000 {</div><div class='add'>+			reg = &lt;0 0x942f8000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0buffer: memory@94300000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x94300000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* global autoconfigured region for contiguous allocations */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0xc0000000 0 0x3c000000&gt;;</div><div class='add'>+			size = &lt;0 0x3c000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	lvds_backlight0: backlight-lvds0 {</div><div class='hunk'>@@ -110,6 +147,72 @@</div><div class='ctx'> 		default-brightness-level = &lt;80&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c-mux {</div><div class='add'>+		compatible = "i2c-mux-gpio";</div><div class='add'>+		mux-gpios = &lt;&amp;lsio_gpio5 3 GPIO_ACTIVE_HIGH&gt;; /* needs to be an unused GPIO */</div><div class='add'>+		i2c-parent = &lt;&amp;i2c1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			wm8960: audio-codec@1a {</div><div class='add'>+				compatible = "wlf,wm8960";</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+				clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				clock-names = "mclk";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+						  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;786432000&gt;,</div><div class='add'>+						       &lt;49152000&gt;,</div><div class='add'>+						       &lt;12288000&gt;,</div><div class='add'>+						       &lt;12288000&gt;;</div><div class='add'>+				wlf,shared-lrclk;</div><div class='add'>+				wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='add'>+				wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			wm8962: wm8962@1a {</div><div class='add'>+				compatible = "wlf,wm8962";</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+				clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+						  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;786432000&gt;,</div><div class='add'>+						       &lt;49152000&gt;,</div><div class='add'>+						       &lt;12288000&gt;,</div><div class='add'>+						       &lt;12288000&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				CPVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				MICVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				PLLVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mux-controller {</div><div class='ctx'> 		compatible = "nxp,cbdtu02043", "gpio-sbu-mux";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -125,6 +228,27 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2v8: regulator-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2v8";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usdhc2_vmmc: usdhc2-vmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "SD1_SPWR";</div><div class='hunk'>@@ -134,6 +258,13 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio: regulator-audio {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cs42888_supply";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_fec2_supply: regulator-fec2-nvcc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "fec2_nvcc";</div><div class='hunk'>@@ -181,6 +312,17 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;reg_can2_en&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_pciea: regulator-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pciea_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "mpcie_3v3";</div><div class='add'>+		gpio = &lt;&amp;lsio_gpio1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_vref_1v8: regulator-adc-vref {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vref_1v8";</div><div class='hunk'>@@ -188,6 +330,33 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_5v: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	bt_sco_codec: audio-codec-bt {</div><div class='ctx'> 		compatible = "linux,bt-sco";</div><div class='ctx'> 		#sound-dai-cells = &lt;1&gt;;</div><div class='hunk'>@@ -212,13 +381,33 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound-cs42888 {</div><div class='add'>+		compatible = "fsl,imx-audio-cs42888";</div><div class='add'>+		model = "imx-cs42888";</div><div class='add'>+		audio-cpu = &lt;&amp;esai0&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;cs42888&gt;;</div><div class='add'>+		audio-asrc = &lt;&amp;asrc0&gt;;</div><div class='add'>+		audio-routing = "Line Out Jack", "AOUT1L",</div><div class='add'>+				"Line Out Jack", "AOUT1R",</div><div class='add'>+				"Line Out Jack", "AOUT2L",</div><div class='add'>+				"Line Out Jack", "AOUT2R",</div><div class='add'>+				"Line Out Jack", "AOUT3L",</div><div class='add'>+				"Line Out Jack", "AOUT3R",</div><div class='add'>+				"Line Out Jack", "AOUT4L",</div><div class='add'>+				"Line Out Jack", "AOUT4R",</div><div class='add'>+				"AIN1L", "Line In Jack",</div><div class='add'>+				"AIN1R", "Line In Jack",</div><div class='add'>+				"AIN2L", "Line In Jack",</div><div class='add'>+				"AIN2R", "Line In Jack";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-wm8960 {</div><div class='ctx'> 		compatible = "fsl,imx-audio-wm8960";</div><div class='ctx'> 		model = "wm8960-audio";</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;wm8960&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;lsio_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		audio-routing =	"Headphone Jack", "HP_L",</div><div class='add'>+		hp-det-gpios = &lt;&amp;lsio_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HP_L",</div><div class='ctx'> 				"Headphone Jack", "HP_R",</div><div class='ctx'> 				"Ext Spk", "SPK_LP",</div><div class='ctx'> 				"Ext Spk", "SPK_LN",</div><div class='hunk'>@@ -228,6 +417,21 @@</div><div class='ctx'> 				"Mic Jack", "MICB";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;lsio_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HPOUTL",</div><div class='add'>+				"Headphone Jack", "HPOUTR",</div><div class='add'>+				"Ext Spk", "SPKOUTL",</div><div class='add'>+				"Ext Spk", "SPKOUTR",</div><div class='add'>+				"AMIC", "MICBIAS",</div><div class='add'>+				"IN1R", "AMIC",</div><div class='add'>+				"IN3R", "AMIC";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	imx8qm-cm4-0 {</div><div class='ctx'> 		compatible = "fsl,imx8qm-cm4";</div><div class='ctx'> 		clocks = &lt;&amp;clk_dummy&gt;;</div><div class='hunk'>@@ -290,12 +494,50 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	cs42888: audio-codec@48 {</div><div class='add'>+		compatible = "cirrus,cs42888";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_cs42888_reset&gt;;</div><div class='add'>+		VA-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VLS-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VLC-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lsio_gpio4 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+				  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;12288000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cm41_intmux {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;esai0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_esai0&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;acm IMX_ADMA_ACM_ESAI0_MCLK_SEL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;esai0_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aud_pll_div0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-pcieb-sata";</div><div class='add'>+	fsl,refclk-pad-mode = "input";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -387,21 +629,6 @@</div><div class='ctx'> 	scl-gpios = &lt;&amp;lsio_gpio0 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	sda-gpios = &lt;&amp;lsio_gpio0 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='del'>-</div><div class='del'>-	wm8960: audio-codec@1a {</div><div class='del'>-		compatible = "wlf,wm8960";</div><div class='del'>-		reg = &lt;0x1a&gt;;</div><div class='del'>-		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='del'>-				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='del'>-				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='del'>-				  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;12288000&gt;;</div><div class='del'>-		wlf,shared-lrclk;</div><div class='del'>-		wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='del'>-		wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1_lvds0 {</div><div class='hunk'>@@ -541,6 +768,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pciea {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pciea&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pciea&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcieb {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 1 PHY_TYPE_PCIE 1&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;lsio_gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qm_pwm_lvds0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pwm_lvds0&gt;;</div><div class='hunk'>@@ -640,6 +886,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sata {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu_dsp {</div><div class='add'>+	memory-region = &lt;&amp;dsp_vdev0buffer&gt;, &lt;&amp;dsp_vdev0vring0&gt;,</div><div class='add'>+			&lt;&amp;dsp_vdev0vring1&gt;, &lt;&amp;dsp_reserved&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;iomuxc {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_hog&gt;;</div><div class='hunk'>@@ -651,6 +907,26 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_cs42888_reset: cs42888_resetgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25			0x0600004c</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c_mipi_csi0: i2c-mipi-csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL		0xc2000020</div><div class='add'>+			IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA		0xc2000020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c_mipi_csi1: i2c-mipi-csi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL		0xc2000020</div><div class='add'>+			IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA		0xc2000020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_i2c0: i2c0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL			0x06000021</div><div class='hunk'>@@ -685,6 +961,21 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_esai0: esai0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR				0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_FST_AUD_ESAI0_FST				0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR			0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT			0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0				0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1				0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3			0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2			0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1			0xc6000040</div><div class='add'>+			IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0			0xc6000040</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec1: fec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020</div><div class='hunk'>@@ -829,6 +1120,44 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_mipi_csi0: mipi-csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27		0xC0000041</div><div class='add'>+			IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28		0xC0000041</div><div class='add'>+			IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT	0xC0000041</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mipi_csi1: mipi-csi1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30		0xC0000041</div><div class='add'>+			IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31		0xC0000041</div><div class='add'>+			IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT	0xC0000041</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pciea: pcieagrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28		0x04000021</div><div class='add'>+			IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29		0x06000021</div><div class='add'>+			IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pciea_reg: pcieareggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13			0x06000021</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcieb: pciebgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_CLKREQ_B		0x06000021</div><div class='add'>+			IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31		0x04000021</div><div class='add'>+			IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00		0x06000021</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pwm_lvds0: pwmlvds0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT		0x00000020</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi<br/>index 3036af49fc85..c9b55f02497a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi</a></div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	esai1: esai@59810000 {</div><div class='del'>-		compatible = "fsl,imx8qm-esai";</div><div class='add'>+		compatible = "fsl,imx8qm-esai", "fsl,imx6ull-esai";</div><div class='ctx'> 		reg = &lt;0x59810000 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;esai1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='hunk'>@@ -304,7 +304,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* edma2 called in imx8qm RM with the same address in edma0 of imx8qxp */</div><div class='del'>-&amp;edma0{</div><div class='add'>+&amp;edma0 {</div><div class='ctx'> 	reg = &lt;0x591f0000 0x150000&gt;;</div><div class='ctx'> 	dma-channels = &lt;20&gt;;</div><div class='ctx'> 	dma-channel-mask = &lt;0&gt;;</div><div class='hunk'>@@ -351,7 +351,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* edma3 called in imx8qm RM with the same address in edma1 of imx8qxp */</div><div class='del'>-&amp;edma1{</div><div class='add'>+&amp;edma1 {</div><div class='ctx'> 	reg = &lt;0x599f0000 0xc0000&gt;;</div><div class='ctx'> 	dma-channels = &lt;11&gt;;</div><div class='ctx'> 	dma-channel-mask = &lt;0xc0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi<br/>index 545e175c88b3..ccf9f510e0f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi</a></div><div class='hunk'>@@ -4,6 +4,10 @@</div><div class='ctx'>  *	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;fec1 {</div><div class='ctx'> 	compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec";</div><div class='ctx'> 	iommus = &lt;&amp;smmu 0x12 0x7f80&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi<br/>index aa9f28c4431d..d4856b8590e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi</a></div><div class='hunk'>@@ -4,6 +4,9 @@</div><div class='ctx'>  *	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/delete-node/ &amp;adma_pwm;</div><div class='add'>+/delete-node/ &amp;adma_pwm_lpcg;</div><div class='add'>+</div><div class='ctx'> &amp;dma_subsys {</div><div class='ctx'> 	uart4_lpcg: clock-controller@5a4a0000 {</div><div class='ctx'> 		compatible = "fsl,imx8qxp-lpcg";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi<br/>new file mode 100644<br/>index 000000000000..bd6e0aa27efe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *	Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;hsio_subsys {</div><div class='add'>+	compatible = "simple-bus";</div><div class='add'>+	ranges = &lt;0x5f000000 0x0 0x5f000000 0x01000000&gt;,</div><div class='add'>+		 &lt;0x40000000 0x0 0x60000000 0x10000000&gt;,</div><div class='add'>+		 &lt;0x80000000 0x0 0x70000000 0x10000000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	pcie0: pciea: pcie@5f000000 {</div><div class='add'>+		compatible = "fsl,imx8q-pcie";</div><div class='add'>+		reg = &lt;0x5f000000 0x10000&gt;,</div><div class='add'>+		      &lt;0x4ff00000 0x80000&gt;;</div><div class='add'>+		reg-names = "dbi", "config";</div><div class='add'>+		ranges = &lt;0x81000000 0 0x00000000 0x4ff80000 0 0x00010000&gt;,</div><div class='add'>+			 &lt;0x82000000 0 0x40000000 0x40000000 0 0x0ff00000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		clocks = &lt;&amp;pciea_lpcg IMX_LPCG_CLK_6&gt;,</div><div class='add'>+			 &lt;&amp;pciea_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pciea_lpcg IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-names = "dbi", "mstr", "slv";</div><div class='add'>+		bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		num-viewport = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_A&gt;;</div><div class='add'>+		fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_ep: pciea_ep: pcie-ep@5f000000 {</div><div class='add'>+		compatible = "fsl,imx8q-pcie-ep";</div><div class='add'>+		reg = &lt;0x5f000000 0x00010000&gt;,</div><div class='add'>+		      &lt;0x40000000 0x10000000&gt;;</div><div class='add'>+		reg-names = "dbi", "addr_space";</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "dma";</div><div class='add'>+		clocks = &lt;&amp;pciea_lpcg IMX_LPCG_CLK_6&gt;,</div><div class='add'>+			 &lt;&amp;pciea_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pciea_lpcg IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-names = "dbi", "mstr", "slv";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_A&gt;;</div><div class='add'>+		fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-ib-windows = &lt;6&gt;;</div><div class='add'>+		num-ob-windows = &lt;6&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1: pcieb: pcie@5f010000 {</div><div class='add'>+		compatible = "fsl,imx8q-pcie";</div><div class='add'>+		reg = &lt;0x5f010000 0x10000&gt;,</div><div class='add'>+		      &lt;0x8ff00000 0x80000&gt;;</div><div class='add'>+		reg-names = "dbi", "config";</div><div class='add'>+		ranges = &lt;0x81000000 0 0x00000000 0x8ff80000 0 0x00010000&gt;,</div><div class='add'>+			 &lt;0x82000000 0 0x80000000 0x80000000 0 0x0ff00000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi", "dma";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		clocks = &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_6&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_lpcg IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-names = "dbi", "mstr", "slv";</div><div class='add'>+		bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		interrupt-map = &lt;0 0 0 1 &amp;gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 2 &amp;gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 3 &amp;gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0 0 0 4 &amp;gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		num-viewport = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_B&gt;;</div><div class='add'>+		fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata: sata@5f020000 {</div><div class='add'>+		compatible = "fsl,imx8qm-ahci";</div><div class='add'>+		reg = &lt;0x5f020000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;sata_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;sata_crr4_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-names = "sata", "sata_ref";</div><div class='add'>+		phy-names = "sata-phy", "cali-phy0", "cali-phy1";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SATA_0&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Since "REXT" pin is only present for first lane PHY</div><div class='add'>+		 * and its calibration result will be stored, and shared</div><div class='add'>+		 * by the PHY used by SATA.</div><div class='add'>+		 *</div><div class='add'>+		 * Add the calibration PHYs for SATA here, although only</div><div class='add'>+		 * the third lane PHY is used by SATA.</div><div class='add'>+		 */</div><div class='add'>+		phys = &lt;&amp;hsio_phy 2 PHY_TYPE_SATA 0&gt;,</div><div class='add'>+		       &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;,</div><div class='add'>+		       &lt;&amp;hsio_phy 1 PHY_TYPE_PCIE 1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pciea_lpcg: clock-controller@5f050000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f050000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_axi_clk&gt;, &lt;&amp;hsio_axi_clk&gt;, &lt;&amp;hsio_axi_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;, &lt;IMX_LPCG_CLK_5&gt;, &lt;IMX_LPCG_CLK_6&gt;;</div><div class='add'>+		clock-output-names = "hsio_pciea_mstr_axi_clk",</div><div class='add'>+				     "hsio_pciea_slv_axi_clk",</div><div class='add'>+				     "hsio_pciea_dbi_axi_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_A&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_lpcg: clock-controller@5f070000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f070000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_axi_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_sata_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SATA_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phyx2_lpcg: clock-controller@5f080000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f080000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_refa_clk&gt;, &lt;&amp;hsio_per_clk&gt;,</div><div class='add'>+			 &lt;&amp;hsio_refa_clk&gt;, &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_1&gt;,</div><div class='add'>+				&lt;IMX_LPCG_CLK_4&gt;, &lt;IMX_LPCG_CLK_5&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx2_pclk_0",</div><div class='add'>+				     "hsio_phyx2_pclk_1",</div><div class='add'>+				     "hsio_phyx2_apbclk_0",</div><div class='add'>+				     "hsio_phyx2_apbclk_1";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phyx1_lpcg: clock-controller@5f090000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f090000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_refa_clk&gt;, &lt;&amp;hsio_per_clk&gt;,</div><div class='add'>+			 &lt;&amp;hsio_per_clk&gt;, &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_1&gt;,</div><div class='add'>+				&lt;IMX_LPCG_CLK_2&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx1_pclk",</div><div class='add'>+				     "hsio_phyx1_epcs_tx_clk",</div><div class='add'>+				     "hsio_phyx1_epcs_rx_clk",</div><div class='add'>+				     "hsio_phyx1_apb_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phyx2_crr0_lpcg: clock-controller@5f0a0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0a0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx2_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pciea_crr2_lpcg: clock-controller@5f0c0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0c0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_pciea_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_PCIE_A&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata_crr4_lpcg: clock-controller@5f0e0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f0e0000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_sata_per_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SATA_0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsio_phy: phy@5f180000 {</div><div class='add'>+		compatible = "fsl,imx8qm-hsio";</div><div class='add'>+		reg = &lt;0x5f180000 0x30000&gt;,</div><div class='add'>+		      &lt;0x5f110000 0x20000&gt;,</div><div class='add'>+		      &lt;0x5f130000 0x30000&gt;,</div><div class='add'>+		      &lt;0x5f160000 0x10000&gt;;</div><div class='add'>+		reg-names = "reg", "phy", "ctrl", "misc";</div><div class='add'>+		clocks = &lt;&amp;phyx2_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;phyx2_lpcg IMX_LPCG_CLK_1&gt;,</div><div class='add'>+			 &lt;&amp;phyx2_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;phyx2_lpcg IMX_LPCG_CLK_5&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_1&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_2&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;phyx2_crr0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_crr1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pciea_crr2_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_crr3_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;sata_crr4_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;misc_crr5_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-names = "pclk0", "pclk1", "apb_pclk0", "apb_pclk1",</div><div class='add'>+			      "pclk2", "epcs_tx", "epcs_rx", "apb_pclk2",</div><div class='add'>+			      "phy0_crr", "phy1_crr", "ctl0_crr",</div><div class='add'>+			      "ctl1_crr", "ctl2_crr", "misc_crr";</div><div class='add'>+		#phy-cells = &lt;3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_0&gt;, &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi<br/>index 2bbdacb1313f..4b7e685daa02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi</a></div><div class='hunk'>@@ -3,6 +3,31 @@</div><div class='ctx'>  * Copyright 2021 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+&amp;isi {</div><div class='add'>+	compatible = "fsl,imx8qm-isi";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			isi_in_2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			isi_in_3: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;jpegdec {</div><div class='ctx'> 	compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec";</div><div class='ctx'> };</div><div class='hunk'>@@ -10,3 +35,57 @@</div><div class='ctx'> &amp;jpegenc {</div><div class='ctx'> 	compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0 {</div><div class='add'>+	compatible = "fsl,imx8qm-mipi-csi2", "fsl,imx8qxp-mipi-csi2";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mipi_csi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;isi_in_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_1 {</div><div class='add'>+	compatible = "fsl,imx8qm-mipi-csi2", "fsl,imx8qxp-mipi-csi2";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mipi_csi1_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;isi_in_3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pi0_ipg_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pi0_misc_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pi0_pxl_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi<br/>index 3ee6e2869e3c..5206ca82eaf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qm.dtsi</a></div><div class='hunk'>@@ -24,6 +24,10 @@</div><div class='ctx'> 		serial1 = &amp;lpuart1;</div><div class='ctx'> 		serial2 = &amp;lpuart2;</div><div class='ctx'> 		serial3 = &amp;lpuart3;</div><div class='add'>+		spi0 = &amp;lpspi0;</div><div class='add'>+		spi1 = &amp;lpspi1;</div><div class='add'>+		spi2 = &amp;lpspi2;</div><div class='add'>+		spi3 = &amp;lpspi3;</div><div class='ctx'> 		vpu-core0 = &amp;vpu_core0;</div><div class='ctx'> 		vpu-core1 = &amp;vpu_core1;</div><div class='ctx'> 		vpu-core2 = &amp;vpu_core2;</div><div class='hunk'>@@ -241,6 +245,7 @@</div><div class='ctx'> 		      &lt;0x0 0x52000000 0 0x2000&gt;,  /* GICC */</div><div class='ctx'> 		      &lt;0x0 0x52010000 0 0x1000&gt;,  /* GICH */</div><div class='ctx'> 		      &lt;0x0 0x52020000 0 0x20000&gt;; /* GICV */</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -329,6 +334,11 @@</div><div class='ctx'> 			compatible = "fsl,imx8qm-iomuxc";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scu_reset: reset-controller {</div><div class='add'>+			compatible = "fsl,imx-scu-reset";</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc: rtc {</div><div class='ctx'> 			compatible = "fsl,imx8qxp-sc-rtc";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -352,6 +362,11 @@</div><div class='ctx'> 			compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		watchdog {</div><div class='add'>+			compatible = "fsl,imx8qm-sc-wdt", "fsl,imx-sc-wdt";</div><div class='add'>+			timeout-sec = &lt;60&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='hunk'>@@ -581,7 +596,34 @@</div><div class='ctx'> 		clock-output-names = "mipi_pll_div2_clk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vpu_subsys_dsp: bus@55000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x55000000 0x0 0x55000000 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+		vpu_dsp: dsp@556e8000 {</div><div class='add'>+			compatible = "fsl,imx8qm-hifi4";</div><div class='add'>+			reg = &lt;0x556e8000 0x88000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_dummy&gt;,</div><div class='add'>+				 &lt;&amp;clk_dummy&gt;,</div><div class='add'>+				 &lt;&amp;clk_dummy&gt;;</div><div class='add'>+			clock-names = "ipg", "ocram", "core";</div><div class='add'>+			power-domains = &lt;&amp;pd IMX_SC_R_MU_13B&gt;,</div><div class='add'>+					&lt;&amp;pd IMX_SC_R_DSP&gt;,</div><div class='add'>+					&lt;&amp;pd IMX_SC_R_DSP_RAM&gt;,</div><div class='add'>+					&lt;&amp;pd IMX_SC_R_MU_2A&gt;;</div><div class='add'>+			mboxes = &lt;&amp;lsio_mu13 0 0&gt;,</div><div class='add'>+				 &lt;&amp;lsio_mu13 1 0&gt;,</div><div class='add'>+				 &lt;&amp;lsio_mu13 3 0&gt;;</div><div class='add'>+			mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+			firmware-name = "imx/dsp/hifi4.bin";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* sorted in register address */</div><div class='add'>+	#include "imx8-ss-security.dtsi"</div><div class='ctx'> 	#include "imx8-ss-cm41.dtsi"</div><div class='ctx'> 	#include "imx8-ss-audio.dtsi"</div><div class='ctx'> 	#include "imx8-ss-vpu.dtsi"</div><div class='hunk'>@@ -594,6 +636,7 @@</div><div class='ctx'> 	#include "imx8-ss-dma.dtsi"</div><div class='ctx'> 	#include "imx8-ss-conn.dtsi"</div><div class='ctx'> 	#include "imx8-ss-lsio.dtsi"</div><div class='add'>+	#include "imx8-ss-hsio.dtsi"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #include "imx8qm-ss-img.dtsi"</div><div class='hunk'>@@ -603,3 +646,6 @@</div><div class='ctx'> #include "imx8qm-ss-audio.dtsi"</div><div class='ctx'> #include "imx8qm-ss-lvds.dtsi"</div><div class='ctx'> #include "imx8qm-ss-mipi.dtsi"</div><div class='add'>+#include "imx8qm-ss-hsio.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;dsp;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso b/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso<br/>new file mode 100644<br/>index 000000000000..dd65ed8bb37c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-csi.dtso</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;i2c_mipi_csi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c_mipi_csi0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ov5640_mipi: camera@3c {</div><div class='add'>+		compatible = "ovti,ov5640";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal24m&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mipi_csi0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;lsio_gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lsio_gpio3 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2v8&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1v5&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ov5640_mipi_ep: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi0_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_csi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_csi0_in: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ov5640_mipi_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts<br/>index 936ba5ecdcac..7b0337445541 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-mek.dts</a></div><div class='hunk'>@@ -12,10 +12,29 @@</div><div class='ctx'> 	model = "Freescale i.MX8QXP MEK";</div><div class='ctx'> 	compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";</div><div class='ctx'> </div><div class='add'>+	bt_sco_codec: audio-codec-bt {</div><div class='add'>+		compatible = "linux,bt-sco";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	imx8x_cm4: imx8x-cm4 {</div><div class='add'>+		compatible = "fsl,imx8qxp-cm4";</div><div class='add'>+		mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+		mboxes = &lt;&amp;lsio_mu5 0 1</div><div class='add'>+			  &amp;lsio_mu5 1 1</div><div class='add'>+			  &amp;lsio_mu5 3 1&gt;;</div><div class='add'>+		memory-region = &lt;&amp;vdevbuffer&gt;, &lt;&amp;vdev0vring0&gt;, &lt;&amp;vdev0vring1&gt;,</div><div class='add'>+				&lt;&amp;vdev1vring0&gt;, &lt;&amp;vdev1vring1&gt;, &lt;&amp;rsc_table&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_M4_0_PID0&gt;,</div><div class='add'>+				&lt;&amp;pd IMX_SC_R_M4_0_MU_1A&gt;;</div><div class='add'>+		fsl,entry-address = &lt;0x34fe0000&gt;;</div><div class='add'>+		fsl,resource-id = &lt;IMX_SC_R_M4_0_PID0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0 0x40000000&gt;;</div><div class='hunk'>@@ -45,12 +64,276 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c-mux {</div><div class='add'>+		compatible = "i2c-mux-gpio";</div><div class='add'>+		mux-gpios = &lt;&amp;lsio_gpio5 0 GPIO_ACTIVE_HIGH&gt;; /* needs to be an unused GPIO */</div><div class='add'>+		i2c-parent = &lt;&amp;cm40_i2c&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			wm8960: audio-codec@1a {</div><div class='add'>+				compatible = "wlf,wm8960";</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+				clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				clock-names = "mclk";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+						  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;786432000&gt;,</div><div class='add'>+						       &lt;49152000&gt;,</div><div class='add'>+						       &lt;12288000&gt;,</div><div class='add'>+						       &lt;12288000&gt;;</div><div class='add'>+				wlf,shared-lrclk;</div><div class='add'>+				wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='add'>+				wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			wm8962: wm8962@1a {</div><div class='add'>+				compatible = "wlf,wm8962";</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+				clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+						  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;786432000&gt;,</div><div class='add'>+						       &lt;49152000&gt;,</div><div class='add'>+						       &lt;12288000&gt;,</div><div class='add'>+						       &lt;12288000&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				CPVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				MICVDD-supply = &lt;&amp;reg_audio_3v3&gt;;</div><div class='add'>+				PLLVDD-supply = &lt;&amp;reg_audio_1v8&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_5v&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v5: regulator-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v5";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2v8: regulator-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2v8";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_pcieb: regulator-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "mpcie_3v3";</div><div class='add'>+		gpio = &lt;&amp;pca9557_a 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio: regulator-audio {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "cs42888_supply";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_5v: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_3v3: regulator-audio-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_1v8: regulator-audio-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can_en: regulator-can-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "can-en";</div><div class='add'>+		gpio = &lt;&amp;pca6416 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can_stby: regulator-can-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "can-stby";</div><div class='add'>+		gpio = &lt;&amp;pca6416 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_can_en&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_otg1_vbus: regulator-usbotg1-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "usb_otg1_vbus";</div><div class='add'>+		gpio = &lt;&amp;pca9557_b 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		vdev0vring0: memory@90000000 {</div><div class='add'>+			reg = &lt;0 0x90000000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: memory@90008000 {</div><div class='add'>+			reg = &lt;0 0x90008000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring0: memory@90010000 {</div><div class='add'>+			reg = &lt;0 0x90010000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring1: memory@90018000 {</div><div class='add'>+			reg = &lt;0 0x90018000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rsc_table: memory@900ff000 {</div><div class='add'>+			reg = &lt;0 0x900ff000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdevbuffer: memory@90400000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90400000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0vring0: memory@942f0000 {</div><div class='add'>+			reg = &lt;0 0x942f0000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0vring1: memory@942f8000 {</div><div class='add'>+			reg = &lt;0 0x942f8000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsp_vdev0buffer: memory@94300000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x94300000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* global autoconfigured region for contiguous allocations */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0xc0000000 0 0x3c000000&gt;;</div><div class='add'>+			size = &lt;0 0x3c000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+			reusable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_reserved: memory@880000000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x8 0x80000000 0 0x10000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-bt-sco {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,format = "dsp_a";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,name = "bt-sco-audio";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;bt_sco_codec 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		btcpu: simple-audio-card,cpu {</div><div class='add'>+			dai-tdm-slot-num = &lt;2&gt;;</div><div class='add'>+			dai-tdm-slot-width = &lt;16&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;sai0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-cs42888 {</div><div class='add'>+		compatible = "fsl,imx-audio-cs42888";</div><div class='add'>+		audio-asrc = &lt;&amp;asrc0&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;cs42888&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;esai0&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"Line Out Jack", "AOUT1L",</div><div class='add'>+			"Line Out Jack", "AOUT1R",</div><div class='add'>+			"Line Out Jack", "AOUT2L",</div><div class='add'>+			"Line Out Jack", "AOUT2R",</div><div class='add'>+			"Line Out Jack", "AOUT3L",</div><div class='add'>+			"Line Out Jack", "AOUT3R",</div><div class='add'>+			"Line Out Jack", "AOUT4L",</div><div class='add'>+			"Line Out Jack", "AOUT4R",</div><div class='add'>+			"AIN1L", "Line In Jack",</div><div class='add'>+			"AIN1R", "Line In Jack",</div><div class='add'>+			"AIN2L", "Line In Jack",</div><div class='add'>+			"AIN2R", "Line In Jack";</div><div class='add'>+		model = "imx-cs42888";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-wm8960 {</div><div class='ctx'> 		compatible = "fsl,imx-audio-wm8960";</div><div class='ctx'> 		model = "wm8960-audio";</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;wm8960&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;lsio_gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;lsio_gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		audio-routing = "Headphone Jack", "HP_L",</div><div class='ctx'> 				"Headphone Jack", "HP_R",</div><div class='ctx'> 				"Ext Spk", "SPK_LP",</div><div class='hunk'>@@ -60,10 +343,35 @@</div><div class='ctx'> 				"LINPUT1", "Mic Jack",</div><div class='ctx'> 				"Mic Jack", "MICB";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;lsio_gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HPOUTL",</div><div class='add'>+				"Headphone Jack", "HPOUTR",</div><div class='add'>+				"Ext Spk", "SPKOUTL",</div><div class='add'>+				"Ext Spk", "SPKOUTR",</div><div class='add'>+				"AMIC", "MICBIAS",</div><div class='add'>+				"IN3R", "AMIC",</div><div class='add'>+				"IN1R", "AMIC";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;amix {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;asrc0 {</div><div class='add'>+	fsl,asrc-rate = &lt;48000&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsp {</div><div class='del'>-	memory-region = &lt;&amp;dsp_reserved&gt;;</div><div class='add'>+	memory-region = &lt;&amp;dsp_vdev0buffer&gt;, &lt;&amp;dsp_vdev0vring0&gt;,</div><div class='add'>+			&lt;&amp;dsp_vdev0vring1&gt;, &lt;&amp;dsp_reserved&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -71,6 +379,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;esai0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;acm IMX_ADMA_ACM_ESAI0_MCLK_SEL&gt;,</div><div class='add'>+			&lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			&lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			&lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			&lt;&amp;esai0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aud_pll_div0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_esai0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;fec1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_fec1&gt;;</div><div class='hunk'>@@ -216,36 +537,63 @@</div><div class='ctx'> 	sda-gpios = &lt;&amp;lsio_gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	wm8960: audio-codec@1a {</div><div class='del'>-		compatible = "wlf,wm8960";</div><div class='del'>-		reg = &lt;0x1a&gt;;</div><div class='del'>-		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='del'>-				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='del'>-				  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='del'>-				  &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;786432000&gt;,</div><div class='del'>-				       &lt;49152000&gt;,</div><div class='del'>-				       &lt;12288000&gt;,</div><div class='del'>-				       &lt;12288000&gt;;</div><div class='del'>-		wlf,shared-lrclk;</div><div class='del'>-		wlf,hp-cfg = &lt;2 2 3&gt;;</div><div class='del'>-		wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pca6416: gpio@20 {</div><div class='ctx'> 		compatible = "ti,tca6416";</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	cs42888: audio-codec@48 {</div><div class='add'>+		compatible = "cirrus,cs42888";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		clocks = &lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+				&lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+				&lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+				&lt;&amp;mclkout0_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;12288000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9557_b 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		VA-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VD-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VLC-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+		VLS-supply = &lt;&amp;reg_audio&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cm40_intmux {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-x2-pcieb";</div><div class='add'>+	fsl,refclk-pad-mode = "input";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can_stby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can_stby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;jpegdec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;jpegenc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpuart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpuart0&gt;;</div><div class='hunk'>@@ -264,6 +612,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lsio_mu5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mu_m0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -272,6 +624,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpios = &lt;&amp;lsio_gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcieb&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcieb&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;scu_key {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -384,6 +755,20 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	power-active-high;</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_otg1_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbotg3 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -434,6 +819,21 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_esai0: esai0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR           0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST           0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR         0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT         0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0           0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1           0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3   0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2   0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1   0xc6000040</div><div class='add'>+			IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0   0xc6000040</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_fec1: fec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020</div><div class='hunk'>@@ -453,6 +853,27 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_flexcan1: flexcan0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX			0x21</div><div class='add'>+			IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX			0x21</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX			0x21</div><div class='add'>+			IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX			0x21</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c_mipi_csi0: i2c-mipi-csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL		0xc2000020</div><div class='add'>+			IMX8QXP_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA		0xc2000020</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_ioexp_rst: ioexprstgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01			0x06000021</div><div class='hunk'>@@ -493,6 +914,22 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_mipi_csi0: mipi-csi0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07		0xC0000041</div><div class='add'>+			IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08		0xC0000041</div><div class='add'>+			IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT	0xC0000041</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcieb: pcieagrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00		0x06000021</div><div class='add'>+			IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B		0x06000021</div><div class='add'>+			IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02		0x04000021</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_typec: typecgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03                        0x06000021</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi<br/>index 46da21af3702..4eb48ad48745 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-ss-conn.dtsi</a></div><div class='hunk'>@@ -4,6 +4,10 @@</div><div class='ctx'>  *	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	compatible = "fsl,imx8qxp-usbphy", "fsl,imx7ulp-usbphy";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc1 {</div><div class='ctx'> 	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi<br/>new file mode 100644<br/>index 000000000000..255b8c91c88c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-ss-hsio.dtsi</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *	Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;hsio_subsys {</div><div class='add'>+	phyx1_lpcg: clock-controller@5f090000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+		reg = &lt;0x5f090000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;hsio_refb_clk&gt;, &lt;&amp;hsio_per_clk&gt;,</div><div class='add'>+			 &lt;&amp;hsio_per_clk&gt;, &lt;&amp;hsio_per_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-indices = &lt;IMX_LPCG_CLK_0&gt;, &lt;IMX_LPCG_CLK_1&gt;,</div><div class='add'>+				&lt;IMX_LPCG_CLK_2&gt;, &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-output-names = "hsio_phyx1_pclk",</div><div class='add'>+				     "hsio_phyx1_epcs_tx_clk",</div><div class='add'>+				     "hsio_phyx1_epcs_rx_clk",</div><div class='add'>+				     "hsio_phyx1_apb_clk";</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsio_phy: phy@5f1a0000 {</div><div class='add'>+		compatible = "fsl,imx8qxp-hsio";</div><div class='add'>+		reg = &lt;0x5f1a0000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f120000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f140000 0x10000&gt;,</div><div class='add'>+		      &lt;0x5f160000 0x10000&gt;;</div><div class='add'>+		reg-names = "reg", "phy", "ctrl", "misc";</div><div class='add'>+		clocks = &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_lpcg IMX_LPCG_CLK_1&gt;,</div><div class='add'>+			 &lt;&amp;phyx1_crr1_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;pcieb_crr3_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+			 &lt;&amp;misc_crr5_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+		clock-names = "pclk0", "apb_pclk0", "phy0_crr", "ctl0_crr",</div><div class='add'>+			      "misc_crr";</div><div class='add'>+		#phy-cells = &lt;3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;pd IMX_SC_R_SERDES_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0: pcie@5f010000 {</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_ep: pcie-ep@5f010000 {</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi<br/>index 3a087317591d..232cf25dadfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi</a></div><div class='hunk'>@@ -4,6 +4,86 @@</div><div class='ctx'>  *	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+&amp;csi1_pxl_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi1_core_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi1_esc_lpcg {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0_mipi_csi1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_mipi_csi1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;irqsteer_csi1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isi {</div><div class='add'>+	compatible = "fsl,imx8qxp-isi";</div><div class='add'>+	reg = &lt;0x58100000 0x60000&gt;;</div><div class='add'>+	interrupts = &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+		     &lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	clocks = &lt;&amp;pdma0_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+		 &lt;&amp;pdma1_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+		 &lt;&amp;pdma2_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+		 &lt;&amp;pdma3_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+		 &lt;&amp;pdma4_lpcg IMX_LPCG_CLK_0&gt;,</div><div class='add'>+		 &lt;&amp;pdma5_lpcg IMX_LPCG_CLK_0&gt;;</div><div class='add'>+	clock-names = "per0", "per1", "per2", "per3", "per4", "per5";</div><div class='add'>+	power-domains = &lt;&amp;pd IMX_SC_R_ISI_CH0&gt;,</div><div class='add'>+			&lt;&amp;pd IMX_SC_R_ISI_CH1&gt;,</div><div class='add'>+			&lt;&amp;pd IMX_SC_R_ISI_CH2&gt;,</div><div class='add'>+			&lt;&amp;pd IMX_SC_R_ISI_CH3&gt;,</div><div class='add'>+			&lt;&amp;pd IMX_SC_R_ISI_CH4&gt;,</div><div class='add'>+			&lt;&amp;pd IMX_SC_R_ISI_CH5&gt;;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			isi_in_2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_csi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mipi_csi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;isi_in_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;jpegdec {</div><div class='ctx'> 	compatible = "nxp,imx8qxp-jpgdec";</div><div class='ctx'> };</div><div class='hunk'>@@ -11,3 +91,7 @@</div><div class='ctx'> &amp;jpegenc {</div><div class='ctx'> 	compatible = "nxp,imx8qxp-jpgenc";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mipi_csi_1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi<br/>new file mode 100644<br/>index 000000000000..15f1239dab24<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-ss-security.dtsi</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Actia Nordic AB</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;crypto {</div><div class='add'>+	compatible = "fsl,imx8qxp-caam", "fsl,sec-v4.0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sec_jr2 {</div><div class='add'>+	compatible = "fsl,imx8qxp-job-ring", "fsl,sec-v4.0-job-ring";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sec_jr3 {</div><div class='add'>+	compatible = "fsl,imx8qxp-job-ring", "fsl,sec-v4.0-job-ring";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi<br/>index 7894a3ab26d6..f81937b5fb72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi</a></div><div class='hunk'>@@ -5,6 +5,14 @@</div><div class='ctx'>  * Author: Alexander Stein</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+&amp;mu_m0 {</div><div class='add'>+	interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mu1_m0 {</div><div class='add'>+	interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;vpu_core0 {</div><div class='ctx'> 	reg = &lt;0x2d040000 0x10000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts b/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts<br/>new file mode 100644<br/>index 000000000000..3fa9b5aee2c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps-mb-smarc-2.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8qxp-tqma8xqps.dtsi"</div><div class='add'>+#include "tqma8xxs-mb-smarc-2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems i.MX8QXP TQMa8XQPS on MB-SMARC-2";</div><div class='add'>+	compatible = "tq,imx8qxp-tqma8xqps-mb-smarc-2", "tq,imx8qxp-tqma8xqps", "fsl,imx8qxp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi<br/>new file mode 100644<br/>index 000000000000..f008b7a34505<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqps.dtsi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx8qxp.dtsi"</div><div class='add'>+#include "tqma8xxs.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems i.MX8QXP TQMa8XQPS";</div><div class='add'>+	compatible = "tq,imx8qxp-tqma8xqps", "fsl,imx8qxp";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi<br/>index 0313f295de2e..95edab058276 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8qxp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8qxp.dtsi</a></div><div class='hunk'>@@ -46,6 +46,10 @@</div><div class='ctx'> 		serial1 = &amp;lpuart1;</div><div class='ctx'> 		serial2 = &amp;lpuart2;</div><div class='ctx'> 		serial3 = &amp;lpuart3;</div><div class='add'>+		spi0 = &amp;lpspi0;</div><div class='add'>+		spi1 = &amp;lpspi1;</div><div class='add'>+		spi2 = &amp;lpspi2;</div><div class='add'>+		spi3 = &amp;lpspi3;</div><div class='ctx'> 		vpu-core0 = &amp;vpu_core0;</div><div class='ctx'> 		vpu-core1 = &amp;vpu_core1;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -155,6 +159,7 @@</div><div class='ctx'> 		compatible = "arm,gic-v3";</div><div class='ctx'> 		reg = &lt;0x0 0x51a00000 0 0x10000&gt;, /* GIC Dist */</div><div class='ctx'> 		      &lt;0x0 0x51b00000 0 0xc0000&gt;; /* GICR (RD_base + SGI_base) */</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -237,6 +242,11 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scu_reset: reset-controller {</div><div class='add'>+			compatible = "fsl,imx-scu-reset";</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc: rtc {</div><div class='ctx'> 			compatible = "fsl,imx8qxp-sc-rtc";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -317,16 +327,20 @@</div><div class='ctx'> 	/* sorted in register address */</div><div class='ctx'> 	#include "imx8-ss-img.dtsi"</div><div class='ctx'> 	#include "imx8-ss-vpu.dtsi"</div><div class='add'>+	#include "imx8-ss-security.dtsi"</div><div class='ctx'> 	#include "imx8-ss-cm40.dtsi"</div><div class='ctx'> 	#include "imx8-ss-gpu0.dtsi"</div><div class='ctx'> 	#include "imx8-ss-adma.dtsi"</div><div class='ctx'> 	#include "imx8-ss-conn.dtsi"</div><div class='ctx'> 	#include "imx8-ss-ddr.dtsi"</div><div class='ctx'> 	#include "imx8-ss-lsio.dtsi"</div><div class='add'>+	#include "imx8-ss-hsio.dtsi"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #include "imx8qxp-ss-img.dtsi"</div><div class='ctx'> #include "imx8qxp-ss-vpu.dtsi"</div><div class='add'>+#include "imx8qxp-ss-security.dtsi"</div><div class='ctx'> #include "imx8qxp-ss-adma.dtsi"</div><div class='ctx'> #include "imx8qxp-ss-conn.dtsi"</div><div class='ctx'> #include "imx8qxp-ss-lsio.dtsi"</div><div class='add'>+#include "imx8qxp-ss-hsio.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts<br/>new file mode 100644<br/>index 000000000000..5497e3d78136<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8ulp-9x9-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx8ulp-evk.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NXP i.MX8ULP EVK9";</div><div class='add'>+	compatible = "fsl,imx8ulp-9x9-evk", "fsl,imx8ulp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;btcpu {</div><div class='add'>+	sound-dai = &lt;&amp;sai6&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc1 {</div><div class='add'>+	pinctrl_sai6: sai6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTE10__I2S6_TX_BCLK  0x43</div><div class='add'>+			MX8ULP_PAD_PTE11__I2S6_TX_FS    0x43</div><div class='add'>+			MX8ULP_PAD_PTE14__I2S6_TXD2     0x43</div><div class='add'>+			MX8ULP_PAD_PTE6__I2S6_RXD0      0x43</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_enet {</div><div class='add'>+	fsl,pins = &lt;</div><div class='add'>+		MX8ULP_PAD_PTF9__ENET0_MDC		0x43</div><div class='add'>+		MX8ULP_PAD_PTF8__ENET0_MDIO             0x43</div><div class='add'>+		MX8ULP_PAD_PTF5__ENET0_RXER             0x43</div><div class='add'>+		MX8ULP_PAD_PTF6__ENET0_CRS_DV           0x43</div><div class='add'>+		MX8ULP_PAD_PTF1__ENET0_RXD0             0x43</div><div class='add'>+		MX8ULP_PAD_PTF0__ENET0_RXD1             0x43</div><div class='add'>+		MX8ULP_PAD_PTF4__ENET0_TXEN             0x43</div><div class='add'>+		MX8ULP_PAD_PTF3__ENET0_TXD0             0x43</div><div class='add'>+		MX8ULP_PAD_PTF2__ENET0_TXD1             0x43</div><div class='add'>+		MX8ULP_PAD_PTF7__ENET0_REFCLK           0x43</div><div class='add'>+		MX8ULP_PAD_PTF10__ENET0_1588_CLKIN      0x43</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_usb1 {</div><div class='add'>+	fsl,pins = &lt;</div><div class='add'>+		MX8ULP_PAD_PTE16__USB0_ID		0x10003</div><div class='add'>+		MX8ULP_PAD_PTE18__USB0_OC		0x10003</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl_usb2 {</div><div class='add'>+	fsl,pins = &lt;</div><div class='add'>+		MX8ULP_PAD_PTD23__USB1_ID		0x10003</div><div class='add'>+		MX8ULP_PAD_PTE20__USB1_OC		0x10003</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai6 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_sai6&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1&gt;, &lt;&amp;cgc2 IMX8ULP_CLK_SAI6_SEL&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	fsl,dataline = &lt;1 0x01 0x04&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts<br/>index e937e5f8fa8b..290a49bea2f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8ulp-evk.dts</a></div><div class='hunk'>@@ -11,6 +11,11 @@</div><div class='ctx'> 	model = "NXP i.MX8ULP EVK";</div><div class='ctx'> 	compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";</div><div class='ctx'> </div><div class='add'>+	bt_sco_codec: bt-sco-codec {</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "linux,bt-sco";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart5;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -83,6 +88,37 @@</div><div class='ctx'> 		clock-output-names = "ext_ts_clk";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound-bt-sco {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "bt-sco-audio";</div><div class='add'>+		simple-audio-card,format = "dsp_a";</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+</div><div class='add'>+		btcpu: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai5&gt;;</div><div class='add'>+			dai-tdm-slot-num = &lt;2&gt;;</div><div class='add'>+			dai-tdm-slot-width = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;bt_sco_codec 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-spdif {</div><div class='add'>+		compatible = "fsl,imx-audio-spdif";</div><div class='add'>+		model = "imx-spdif";</div><div class='add'>+		audio-cpu = &lt;&amp;spdif&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;spdif_out&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_out: spdif-out {</div><div class='add'>+		compatible = "linux,spdif-dit";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cm33 {</div><div class='hunk'>@@ -153,6 +189,25 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sai5 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cgc1 IMX8ULP_CLK_SAI5_SEL&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1&gt;;</div><div class='add'>+	fsl,dataline = &lt;1 0x08 0x01&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spdif {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spdif&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_spdif&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cgc2 IMX8ULP_CLK_SPDIF_SEL&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cgc1 IMX8ULP_CLK_SPLL3_PFD1_DIV1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbotg1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='hunk'>@@ -282,6 +337,21 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_sai5: sai5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTF26__I2S5_TX_BCLK	0x43</div><div class='add'>+			MX8ULP_PAD_PTF27__I2S5_TX_FS	0x43</div><div class='add'>+			MX8ULP_PAD_PTF28__I2S5_TXD0	0x43</div><div class='add'>+			MX8ULP_PAD_PTF24__I2S5_RXD3	0x43</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX8ULP_PAD_PTF25__SPDIF_OUT1    0x43</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_typec1: typec1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX8ULP_PAD_PTF3__PTF3           0x3</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi<br/>index e32d5afcf4a9..13b01f3aa2a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8ulp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8ulp.dtsi</a></div><div class='hunk'>@@ -28,6 +28,8 @@</div><div class='ctx'> 		serial1 = &amp;lpuart5;</div><div class='ctx'> 		serial2 = &amp;lpuart6;</div><div class='ctx'> 		serial3 = &amp;lpuart7;</div><div class='add'>+		spi0 = &amp;lpspi4;</div><div class='add'>+		spi1 = &amp;lpspi5;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='hunk'>@@ -212,6 +214,70 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			edma1: dma-controller@29010000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-edma";</div><div class='add'>+				reg = &lt;0x29010000 0x210000&gt;;</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;32&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_MP&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH0&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH1&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH2&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH3&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH4&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH5&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH6&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH7&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH8&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH9&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH10&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH11&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH12&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH13&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH14&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH15&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH16&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH17&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH18&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH19&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH20&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH21&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH22&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH23&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH24&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH25&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH26&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH27&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH28&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH29&gt;,</div><div class='add'>+					&lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH30&gt;, &lt;&amp;pcc3 IMX8ULP_CLK_DMA1_CH31&gt;;</div><div class='add'>+				clock-names = "dma", "ch00","ch01", "ch02", "ch03",</div><div class='add'>+						"ch04", "ch05", "ch06", "ch07",</div><div class='add'>+						"ch08", "ch09", "ch10", "ch11",</div><div class='add'>+						"ch12", "ch13", "ch14", "ch15",</div><div class='add'>+						"ch16", "ch17", "ch18", "ch19",</div><div class='add'>+						"ch20", "ch21", "ch22", "ch23",</div><div class='add'>+						"ch24", "ch25", "ch26", "ch27",</div><div class='add'>+						"ch28", "ch29", "ch30", "ch31";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			mu: mailbox@29220000 {</div><div class='ctx'> 				compatible = "fsl,imx8ulp-mu";</div><div class='ctx'> 				reg = &lt;0x29220000 0x10000&gt;;</div><div class='hunk'>@@ -384,7 +450,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			flexspi2: spi@29810000 {</div><div class='del'>-				compatible = "nxp,imx8mm-fspi";</div><div class='add'>+				compatible = "nxp,imx8ulp-fspi";</div><div class='ctx'> 				reg = &lt;0x29810000 0x10000&gt;, &lt;0x60000000 0x10000000&gt;;</div><div class='ctx'> 				reg-names = "fspi_base", "fspi_mmap";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -442,6 +508,36 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			sai4: sai@29880000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-sai";</div><div class='add'>+				reg = &lt;0x29880000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_SAI4&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_SAI4_SEL&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma1 67 0 1&gt;, &lt;&amp;edma1 68 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				fsl,dataline = &lt;0 0x03 0x03&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai5: sai@29890000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-sai";</div><div class='add'>+				reg = &lt;0x29890000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc4 IMX8ULP_CLK_SAI5&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_SAI5_SEL&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma1 69 0 1&gt;, &lt;&amp;edma1 70 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				fsl,dataline = &lt;0 0x0f 0x0f&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			iomuxc1: pinctrl@298c0000 {</div><div class='ctx'> 				compatible = "fsl,imx8ulp-iomuxc1";</div><div class='ctx'> 				reg = &lt;0x298c0000 0x10000&gt;;</div><div class='hunk'>@@ -590,6 +686,7 @@</div><div class='ctx'> 					 &lt;&amp;pcc4 IMX8ULP_CLK_PCTLE&gt;;</div><div class='ctx'> 				clock-names = "gpio", "port";</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc1 0 32 24&gt;;</div><div class='add'>+				ngpios = &lt;24&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpiof: gpio@2d010000 {</div><div class='hunk'>@@ -605,6 +702,7 @@</div><div class='ctx'> 					 &lt;&amp;pcc4 IMX8ULP_CLK_PCTLF&gt;;</div><div class='ctx'> 				clock-names = "gpio", "port";</div><div class='ctx'> 				gpio-ranges = &lt;&amp;iomuxc1 0 64 32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		per_bridge5: bus@2d800000 {</div><div class='hunk'>@@ -614,6 +712,70 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			edma2: dma-controller@2d800000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-edma";</div><div class='add'>+				reg = &lt;0x2d800000 0x210000&gt;;</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;32&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_MP&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH0&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH1&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH2&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH3&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH4&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH5&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH6&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH7&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH8&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH9&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH10&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH11&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH12&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH13&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH14&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH15&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH16&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH17&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH18&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH19&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH20&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH21&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH22&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH23&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH24&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH25&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH26&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH27&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH28&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH29&gt;,</div><div class='add'>+					&lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH30&gt;, &lt;&amp;pcc5 IMX8ULP_CLK_DMA2_CH31&gt;;</div><div class='add'>+				clock-names = "dma", "ch00","ch01", "ch02", "ch03",</div><div class='add'>+						"ch04", "ch05", "ch06", "ch07",</div><div class='add'>+						"ch08", "ch09", "ch10", "ch11",</div><div class='add'>+						"ch12", "ch13", "ch14", "ch15",</div><div class='add'>+						"ch16", "ch17", "ch18", "ch19",</div><div class='add'>+						"ch20", "ch21", "ch22", "ch23",</div><div class='add'>+						"ch24", "ch25", "ch26", "ch27",</div><div class='add'>+						"ch28", "ch29", "ch30", "ch31";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			cgc2: clock-controller@2da60000 {</div><div class='ctx'> 				compatible = "fsl,imx8ulp-cgc2";</div><div class='ctx'> 				reg = &lt;0x2da60000 0x10000&gt;;</div><div class='hunk'>@@ -626,6 +788,60 @@</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 				#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			sai6: sai@2da90000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-sai";</div><div class='add'>+				reg = &lt;0x2da90000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc5 IMX8ULP_CLK_SAI6&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc2 IMX8ULP_CLK_SAI6_SEL&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 71 0 1&gt;, &lt;&amp;edma2 72 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				fsl,dataline = &lt;0 0x0f 0x0f&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai7: sai@2daa0000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-sai";</div><div class='add'>+				reg = &lt;0x2daa0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc5 IMX8ULP_CLK_SAI7&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc2 IMX8ULP_CLK_SAI7_SEL&gt;, &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 73 0 1&gt;, &lt;&amp;edma2 74 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				fsl,dataline = &lt;0 0x0f 0x0f&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spdif: spdif@2dab0000 {</div><div class='add'>+				compatible = "fsl,imx8ulp-spdif";</div><div class='add'>+				reg = &lt;0x2dab0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcc5 IMX8ULP_CLK_SPDIF&gt;, /* core */</div><div class='add'>+					 &lt;&amp;sosc&gt;, /* 0, extal */</div><div class='add'>+					 &lt;&amp;cgc2 IMX8ULP_CLK_SPDIF_SEL&gt;, /* 1, tx */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;, /* 2, tx1 */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;, /* 3, tx2 */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;, /* 4, tx3 */</div><div class='add'>+					 &lt;&amp;pcc5 IMX8ULP_CLK_SPDIF&gt;, /* 5, sys */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;, /* 6, tx4 */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;, /* 7, tx5 */</div><div class='add'>+					 &lt;&amp;cgc1 IMX8ULP_CLK_DUMMY&gt;; /* spba */</div><div class='add'>+				clock-names = "core", "rxtx0",</div><div class='add'>+					      "rxtx1", "rxtx2",</div><div class='add'>+					      "rxtx3", "rxtx4",</div><div class='add'>+					      "rxtx5", "rxtx6",</div><div class='add'>+					      "rxtx7", "spba";</div><div class='add'>+				dmas = &lt;&amp;edma2 75 0 5&gt;, &lt;&amp;edma2 76 0 4&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpiod: gpio@2e200000 {</div><div class='hunk'>@@ -641,6 +857,7 @@</div><div class='ctx'> 				 &lt;&amp;pcc5 IMX8ULP_CLK_RGPIOD&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;iomuxc1 0 0 24&gt;;</div><div class='add'>+			ngpios = &lt;24&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi<br/>index edba5b582414..8e9e841cc828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi</a></div><div class='hunk'>@@ -52,6 +52,15 @@</div><div class='ctx'> 		regulator-name = "vref-1v8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_module_wifi: regulator-module-wifi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio_expander_43 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-name = "Wi-Fi_PDn";</div><div class='add'>+		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usbh_vbus: regulator-usbh-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -166,7 +175,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Touch controller */</div><div class='del'>-	touchscreen@2c {</div><div class='add'>+	ad7879_ts: touchscreen@2c {</div><div class='ctx'> 		compatible = "adi,ad7879-1";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_ad7879_int&gt;;</div><div class='hunk'>@@ -261,6 +270,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-x2-pcieb";</div><div class='add'>+	fsl,refclk-pad-mode = "input";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsio_refb_clk {</div><div class='add'>+	enable-gpios = &lt;&amp;gpio_expander_43 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Colibri SPI */</div><div class='ctx'> &amp;lpspi2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -295,8 +314,8 @@</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "SODIMM_61",</div><div class='ctx'> 			  "SODIMM_103",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='add'>+			  "SODIMM_79",</div><div class='add'>+			  "SODIMM_97",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "SODIMM_25",</div><div class='ctx'> 			  "SODIMM_27",</div><div class='hunk'>@@ -443,18 +462,26 @@</div><div class='ctx'> </div><div class='ctx'> /* VPU Mailboxes */</div><div class='ctx'> &amp;mu_m0 {</div><div class='del'>-	status="okay";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mu1_m0 {</div><div class='del'>-	status="okay";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* TODO MIPI CSI */</div><div class='ctx'> </div><div class='ctx'> /* TODO MIPI DSI with DSI-to-HDMI bridge lt8912 */</div><div class='ctx'> </div><div class='del'>-/* TODO on-module PCIe for Wi-Fi */</div><div class='add'>+/* On-module PCIe for Wi-Fi */</div><div class='add'>+&amp;pcieb {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	reset-gpios = &lt;&amp;lsio_gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* On-module I2S */</div><div class='ctx'> &amp;sai0 {</div><div class='hunk'>@@ -698,7 +725,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This pin is used in the SCFW as a UART. Using it from</div><div class='del'>-	 * Linux would require rewritting the SCFW board file.</div><div class='add'>+	 * Linux would require rewriting the SCFW board file.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pinctrl_hog_scfw: hogscfwgrp {</div><div class='ctx'> 		fsl,pins = &lt;IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03		0x20&gt;;		/* SODIMM 144 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts<br/>new file mode 100644<br/>index 000000000000..aca78768dbd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,674 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx91.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "fsl,imx91-11x11-evk", "fsl,imx91";</div><div class='add'>+	model = "NXP i.MX91 11X11 EVK board";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vref_1v8: regulator-adc-vref {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vref_1v8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_pwr: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "audio-pwr";</div><div class='add'>+		gpio = &lt;&amp;adp5585 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x40000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x10000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_eqos_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy1: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			realtek,clkout-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_fec_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy2: ethernet-phy@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			realtek,clkout-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	audio_codec: wm8962@1a {</div><div class='add'>+		compatible = "wlf,wm8962";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		PLLVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		gpio-cfg = &lt;</div><div class='add'>+			0x0000 /* 0:Default */</div><div class='add'>+			0x0000 /* 1:Default */</div><div class='add'>+			0x0000 /* 2:FN_DMICCLK */</div><div class='add'>+			0x0000 /* 3:Default */</div><div class='add'>+			0x0000 /* 4:FN_DMICCDAT */</div><div class='add'>+			0x0000 /* 5:Default */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	inertial-meter@6a {</div><div class='add'>+		compatible = "st,lsm6dso";</div><div class='add'>+		reg = &lt;0x6a&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcal6524: gpio@22 {</div><div class='add'>+		compatible = "nxp,pcal6524";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcal6524&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9451a";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2237500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;650000&gt;;</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2187500&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adp5585: io-expander@34 {</div><div class='add'>+		compatible = "adi,adp5585-00", "adi,adp5585";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		gpio-reserved-ranges = &lt;5 1&gt;;</div><div class='add'>+</div><div class='add'>+		exp-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ptn5110: tcpc@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+</div><div class='add'>+		typec1_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			self-powered;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec1_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ptn5110_2: tcpc@51 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		typec2_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			self-powered;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec2_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb2_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcf2131: rtc@53 {</div><div class='add'>+		compatible = "nxp,pcf2131";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb1_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec1_dr_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb2_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec2_dr_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 00 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;, &lt;&amp;pinctrl_usdhc2_gpio_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog3 {</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_ENET1_MDC__ENET1_MDC                           0x57e</div><div class='add'>+			MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO                      0x57e</div><div class='add'>+			MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC                  0x5fe</div><div class='add'>+			MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL            0x57e</div><div class='add'>+			MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1                     0x57e</div><div class='add'>+			MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3                  0x57e</div><div class='add'>+			MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK  0x5fe</div><div class='add'>+			MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL            0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_sleep: eqossleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_ENET1_MDC__GPIO4_IO0                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_MDIO__GPIO4_IO1                          0x31e</div><div class='add'>+			MX91_PAD_ENET1_RD0__GPIO4_IO10                          0x31e</div><div class='add'>+			MX91_PAD_ENET1_RD1__GPIO4_IO11                          0x31e</div><div class='add'>+			MX91_PAD_ENET1_RD2__GPIO4_IO12                          0x31e</div><div class='add'>+			MX91_PAD_ENET1_RD3__GPIO4_IO13                          0x31e</div><div class='add'>+			MX91_PAD_ENET1_RXC__GPIO4_IO9                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_RX_CTL__GPIO4_IO8                        0x31e</div><div class='add'>+			MX91_PAD_ENET1_TD0__GPIO4_IO5                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_TD1__GPIO4_IO4                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_TD2__GPIO4_IO3                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_TD3__GPIO4_IO2                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_TXC__GPIO4_IO7                           0x31e</div><div class='add'>+			MX91_PAD_ENET1_TX_CTL__GPIO4_IO6                        0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_ENET2_MDC__ENET2_MDC                           0x57e</div><div class='add'>+			MX91_PAD_ENET2_MDIO__ENET2_MDIO                         0x57e</div><div class='add'>+			MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC                     0x5fe</div><div class='add'>+			MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL               0x57e</div><div class='add'>+			MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3                     0x57e</div><div class='add'>+			MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC                     0x5fe</div><div class='add'>+			MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL               0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec_sleep: fecsleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_ENET2_MDC__GPIO4_IO14                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_MDIO__GPIO4_IO15                         0x51e</div><div class='add'>+			MX91_PAD_ENET2_RD0__GPIO4_IO24                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_RD1__GPIO4_IO25                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_RD2__GPIO4_IO26                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_RD3__GPIO4_IO27                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_RXC__GPIO4_IO23                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_RX_CTL__GPIO4_IO22                       0x51e</div><div class='add'>+			MX91_PAD_ENET2_TD0__GPIO4_IO19                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_TD1__GPIO4_IO18                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_TD2__GPIO4_IO17                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_TD3__GPIO4_IO16                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_TXC__GPIO4_IO21                          0x51e</div><div class='add'>+			MX91_PAD_ENET2_TX_CTL__GPIO4_IO20                       0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_I2C1_SCL__LPI2C1_SCL                           0x40000b9e</div><div class='add'>+			MX91_PAD_I2C1_SDA__LPI2C1_SDA                           0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_I2C2_SCL__LPI2C2_SCL                           0x40000b9e</div><div class='add'>+			MX91_PAD_I2C2_SDA__LPI2C2_SDA                           0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_GPIO_IO28__LPI2C3_SDA                          0x40000b9e</div><div class='add'>+			MX91_PAD_GPIO_IO29__LPI2C3_SCL                          0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcal6524: pcal6524grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_CCM_CLKO2__GPIO3_IO27                          0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_RESET_B__GPIO3_IO7                         0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_UART1_RXD__LPUART1_RX                          0x31e</div><div class='add'>+			MX91_PAD_UART1_TXD__LPUART1_TX                          0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_DAP_TDO_TRACESWO__LPUART5_TX                   0x31e</div><div class='add'>+			MX91_PAD_DAP_TDI__LPUART5_RX                            0x31e</div><div class='add'>+			MX91_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B                   0x31e</div><div class='add'>+			MX91_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B                  0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD1_CLK__USDHC1_CLK                            0x158e</div><div class='add'>+			MX91_PAD_SD1_CMD__USDHC1_CMD                            0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA0__USDHC1_DATA0                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA1__USDHC1_DATA1                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA2__USDHC1_DATA2                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA3__USDHC1_DATA3                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA4__USDHC1_DATA4                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA5__USDHC1_DATA5                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA6__USDHC1_DATA6                        0x138e</div><div class='add'>+			MX91_PAD_SD1_DATA7__USDHC1_DATA7                        0x138e</div><div class='add'>+			MX91_PAD_SD1_STROBE__USDHC1_STROBE                      0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD1_CLK__USDHC1_CLK                            0x15fe</div><div class='add'>+			MX91_PAD_SD1_CMD__USDHC1_CMD                            0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA0__USDHC1_DATA0                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA1__USDHC1_DATA1                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA2__USDHC1_DATA2                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA3__USDHC1_DATA3                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA4__USDHC1_DATA4                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA5__USDHC1_DATA5                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA6__USDHC1_DATA6                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_DATA7__USDHC1_DATA7                        0x13fe</div><div class='add'>+			MX91_PAD_SD1_STROBE__USDHC1_STROBE                      0x15fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD1_CLK__USDHC1_CLK                            0x1582</div><div class='add'>+			MX91_PAD_SD1_CMD__USDHC1_CMD                            0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA0__USDHC1_DATA0                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA1__USDHC1_DATA1                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA2__USDHC1_DATA2                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA3__USDHC1_DATA3                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA4__USDHC1_DATA4                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA5__USDHC1_DATA5                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA6__USDHC1_DATA6                        0x1382</div><div class='add'>+			MX91_PAD_SD1_DATA7__USDHC1_DATA7                        0x1382</div><div class='add'>+			MX91_PAD_SD1_STROBE__USDHC1_STROBE                      0x1582</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CLK__USDHC2_CLK                            0x158e</div><div class='add'>+			MX91_PAD_SD2_CMD__USDHC2_CMD                            0x138e</div><div class='add'>+			MX91_PAD_SD2_DATA0__USDHC2_DATA0                        0x138e</div><div class='add'>+			MX91_PAD_SD2_DATA1__USDHC2_DATA1                        0x138e</div><div class='add'>+			MX91_PAD_SD2_DATA2__USDHC2_DATA2                        0x138e</div><div class='add'>+			MX91_PAD_SD2_DATA3__USDHC2_DATA3                        0x138e</div><div class='add'>+			MX91_PAD_SD2_VSELECT__USDHC2_VSELECT                    0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CLK__USDHC2_CLK                            0x15fe</div><div class='add'>+			MX91_PAD_SD2_CMD__USDHC2_CMD                            0x13fe</div><div class='add'>+			MX91_PAD_SD2_DATA0__USDHC2_DATA0                        0x13fe</div><div class='add'>+			MX91_PAD_SD2_DATA1__USDHC2_DATA1                        0x13fe</div><div class='add'>+			MX91_PAD_SD2_DATA2__USDHC2_DATA2                        0x13fe</div><div class='add'>+			MX91_PAD_SD2_DATA3__USDHC2_DATA3                        0x13fe</div><div class='add'>+			MX91_PAD_SD2_VSELECT__USDHC2_VSELECT                    0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CD_B__GPIO3_IO0                            0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CD_B__GPIO3_IO0                            0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CLK__USDHC2_CLK                            0x1582</div><div class='add'>+			MX91_PAD_SD2_CMD__USDHC2_CMD                            0x1382</div><div class='add'>+			MX91_PAD_SD2_DATA0__USDHC2_DATA0                        0x1382</div><div class='add'>+			MX91_PAD_SD2_DATA1__USDHC2_DATA1                        0x1382</div><div class='add'>+			MX91_PAD_SD2_DATA2__USDHC2_DATA2                        0x1382</div><div class='add'>+			MX91_PAD_SD2_DATA3__USDHC2_DATA3                        0x1382</div><div class='add'>+			MX91_PAD_SD2_VSELECT__USDHC2_VSELECT                    0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_sleep: usdhc2sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX91_PAD_SD2_CLK__GPIO3_IO1                             0x51e</div><div class='add'>+			MX91_PAD_SD2_CMD__GPIO3_IO2                             0x51e</div><div class='add'>+			MX91_PAD_SD2_DATA0__GPIO3_IO3                           0x51e</div><div class='add'>+			MX91_PAD_SD2_DATA1__GPIO3_IO4                           0x51e</div><div class='add'>+			MX91_PAD_SD2_DATA2__GPIO3_IO5                           0x51e</div><div class='add'>+			MX91_PAD_SD2_DATA3__GPIO3_IO6                           0x51e</div><div class='add'>+			MX91_PAD_SD2_VSELECT__GPIO3_IO19                        0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91-pinfunc.h b/arch/arm64/boot/dts/freescale/imx91-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..3e19945f5ce3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,770 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_IMX91_PINFUNC_H</div><div class='add'>+#define __DTS_IMX91_PINFUNC_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The pin function ID is a tuple of</div><div class='add'>+ * &lt;mux_reg conf_reg input_reg mux_mode input_val&gt;</div><div class='add'>+ */</div><div class='add'>+#define MX91_PAD_DAP_TDI__JTAG_MUX_TDI                                           0x0000 0x01b0 0x03d8 0x00 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDI__MQS2_LEFT                                              0x0000 0x01b0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDI__CAN2_TX                                                0x0000 0x01b0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDI__FLEXIO2_FLEXIO30                                       0x0000 0x01b0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDI__GPIO3_IO28                                             0x0000 0x01b0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDI__LPUART5_RX                                             0x0000 0x01b0 0x0488 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS                                     0x0004 0x01b4 0x03dc 0x00 0x00</div><div class='add'>+#define MX91_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31                                 0x0004 0x01b4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_DAP_TMS_SWDIO__GPIO3_IO29                                       0x0004 0x01b4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B                                    0x0004 0x01b4 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK                                    0x0008 0x01b8 0x03d4 0x00 0x00</div><div class='add'>+#define MX91_PAD_DAP_TCLK_SWCLK__FLEXIO1_FLEXIO30                                0x0008 0x01b8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_DAP_TCLK_SWCLK__GPIO3_IO30                                      0x0008 0x01b8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B                                   0x0008 0x01b8 0x0484 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO                                  0x000c 0x01bc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__MQS2_RIGHT                                    0x000c 0x01bc 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__CAN2_RX                                       0x000c 0x01bc 0x0364 0x03 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__FLEXIO1_FLEXIO31                              0x000c 0x01bc 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__GPIO3_IO31                                    0x000c 0x01bc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_DAP_TDO_TRACESWO__LPUART5_TX                                    0x000c 0x01bc 0x048c 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO00__GPIO2_IO0                                            0x0010 0x01c0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__LPI2C3_SDA                                           0x0010 0x01c0 0x03f4 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__MEDIAMIX_CAM_CLK                                     0x0010 0x01c0 0x04bc 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__MEDIAMIX_DISP_CLK                                    0x0010 0x01c0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__LPSPI6_PCS0                                          0x0010 0x01c0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__LPUART5_TX                                           0x0010 0x01c0 0x048c 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO00__LPI2C5_SDA                                           0x0010 0x01c0 0x0404 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO00__FLEXIO1_FLEXIO0                                      0x0010 0x01c0 0x036c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO01__GPIO2_IO1                                            0x0014 0x01c4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__LPI2C3_SCL                                           0x0014 0x01c4 0x03f0 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__MEDIAMIX_CAM_DATA0                                   0x0014 0x01c4 0x0490 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__MEDIAMIX_DISP_DE                                     0x0014 0x01c4 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__LPSPI6_SIN                                           0x0014 0x01c4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__LPUART5_RX                                           0x0014 0x01c4 0x0488 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO01__LPI2C5_SCL                                           0x0014 0x01c4 0x0400 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO01__FLEXIO1_FLEXIO1                                      0x0014 0x01c4 0x0370 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO02__GPIO2_IO2                                            0x0018 0x01c8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__LPI2C4_SDA                                           0x0018 0x01c8 0x03fc 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__MEDIAMIX_CAM_VSYNC                                   0x0018 0x01c8 0x04c0 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__MEDIAMIX_DISP_VSYNC                                  0x0018 0x01c8 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__LPSPI6_SOUT                                          0x0018 0x01c8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__LPUART5_CTS_B                                        0x0018 0x01c8 0x0484 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO02__LPI2C6_SDA                                           0x0018 0x01c8 0x040c 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO02__FLEXIO1_FLEXIO2                                      0x0018 0x01c8 0x0374 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO03__GPIO2_IO3                                            0x001c 0x01cc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__LPI2C4_SCL                                           0x001c 0x01cc 0x03f8 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__MEDIAMIX_CAM_HSYNC                                   0x001c 0x01cc 0x04b8 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__MEDIAMIX_DISP_HSYNC                                  0x001c 0x01cc 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__LPSPI6_SCK                                           0x001c 0x01cc 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__LPUART5_RTS_B                                        0x001c 0x01cc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__LPI2C6_SCL                                           0x001c 0x01cc 0x0408 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO03__FLEXIO1_FLEXIO3                                      0x001c 0x01cc 0x0378 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO04__GPIO2_IO4                                            0x0020 0x01d0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__TPM3_CH0                                             0x0020 0x01d0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__PDM_CLK                                              0x0020 0x01d0 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__MEDIAMIX_DISP_DATA0                                  0x0020 0x01d0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__LPSPI7_PCS0                                          0x0020 0x01d0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__LPUART6_TX                                           0x0020 0x01d0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO04__LPI2C6_SDA                                           0x0020 0x01d0 0x040c 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO04__FLEXIO1_FLEXIO4                                      0x0020 0x01d0 0x037c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO05__GPIO2_IO5                                            0x0024 0x01d4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__TPM4_CH0                                             0x0024 0x01d4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__PDM_BIT_STREAM0                                      0x0024 0x01d4 0x04c4 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__MEDIAMIX_DISP_DATA1                                  0x0024 0x01d4 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__LPSPI7_SIN                                           0x0024 0x01d4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__LPUART6_RX                                           0x0024 0x01d4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO05__LPI2C6_SCL                                           0x0024 0x01d4 0x0408 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO05__FLEXIO1_FLEXIO5                                      0x0024 0x01d4 0x0380 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO06__GPIO2_IO6                                            0x0028 0x01d8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__TPM5_CH0                                             0x0028 0x01d8 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__PDM_BIT_STREAM1                                      0x0028 0x01d8 0x04c8 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__MEDIAMIX_DISP_DATA2                                  0x0028 0x01d8 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__LPSPI7_SOUT                                          0x0028 0x01d8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__LPUART6_CTS_B                                        0x0028 0x01d8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__LPI2C7_SDA                                           0x0028 0x01d8 0x0414 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO06__FLEXIO1_FLEXIO6                                      0x0028 0x01d8 0x0384 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO07__GPIO2_IO7                                            0x002c 0x01dc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__LPSPI3_PCS1                                          0x002c 0x01dc 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__MEDIAMIX_CAM_DATA1                                   0x002c 0x01dc 0x0494 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__MEDIAMIX_DISP_DATA3                                  0x002c 0x01dc 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__LPSPI7_SCK                                           0x002c 0x01dc 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__LPUART6_RTS_B                                        0x002c 0x01dc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__LPI2C7_SCL                                           0x002c 0x01dc 0x0410 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO07__FLEXIO1_FLEXIO7                                      0x002c 0x01dc 0x0388 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO08__GPIO2_IO8                                            0x0030 0x01e0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__LPSPI3_PCS0                                          0x0030 0x01e0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__MEDIAMIX_CAM_DATA2                                   0x0030 0x01e0 0x0498 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__MEDIAMIX_DISP_DATA4                                  0x0030 0x01e0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__TPM6_CH0                                             0x0030 0x01e0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__LPUART7_TX                                           0x0030 0x01e0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO08__LPI2C7_SDA                                           0x0030 0x01e0 0x0414 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO08__FLEXIO1_FLEXIO8                                      0x0030 0x01e0 0x038c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO09__GPIO2_IO9                                            0x0034 0x01e4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__LPSPI3_SIN                                           0x0034 0x01e4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__MEDIAMIX_CAM_DATA3                                   0x0034 0x01e4 0x049c 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__MEDIAMIX_DISP_DATA5                                  0x0034 0x01e4 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__TPM3_EXTCLK                                          0x0034 0x01e4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__LPUART7_RX                                           0x0034 0x01e4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO09__LPI2C7_SCL                                           0x0034 0x01e4 0x0410 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO09__FLEXIO1_FLEXIO9                                      0x0034 0x01e4 0x0390 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO10__GPIO2_IO10                                           0x0038 0x01e8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__LPSPI3_SOUT                                          0x0038 0x01e8 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__MEDIAMIX_CAM_DATA4                                   0x0038 0x01e8 0x04a0 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__MEDIAMIX_DISP_DATA6                                  0x0038 0x01e8 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__TPM4_EXTCLK                                          0x0038 0x01e8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__LPUART7_CTS_B                                        0x0038 0x01e8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__LPI2C8_SDA                                           0x0038 0x01e8 0x041c 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO10__FLEXIO1_FLEXIO10                                     0x0038 0x01e8 0x0394 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO11__GPIO2_IO11                                           0x003c 0x01ec 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__LPSPI3_SCK                                           0x003c 0x01ec 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__MEDIAMIX_CAM_DATA5                                   0x003c 0x01ec 0x04a4 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__MEDIAMIX_DISP_DATA7                                  0x003c 0x01ec 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__TPM5_EXTCLK                                          0x003c 0x01ec 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__LPUART7_RTS_B                                        0x003c 0x01ec 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__LPI2C8_SCL                                           0x003c 0x01ec 0x0418 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO11__FLEXIO1_FLEXIO11                                     0x003c 0x01ec 0x0398 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO12__GPIO2_IO12                                           0x0040 0x01f0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__TPM3_CH2                                             0x0040 0x01f0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__PDM_BIT_STREAM2                                      0x0040 0x01f0 0x04cc 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__MEDIAMIX_DISP_DATA8                                  0x0040 0x01f0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__LPSPI8_PCS0                                          0x0040 0x01f0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__LPUART8_TX                                           0x0040 0x01f0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO12__LPI2C8_SDA                                           0x0040 0x01f0 0x041c 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO12__SAI3_RX_SYNC                                         0x0040 0x01f0 0x04dc 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO13__GPIO2_IO13                                           0x0044 0x01f4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__TPM4_CH2                                             0x0044 0x01f4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__PDM_BIT_STREAM3                                      0x0044 0x01f4 0x04d0 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__MEDIAMIX_DISP_DATA9                                  0x0044 0x01f4 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__LPSPI8_SIN                                           0x0044 0x01f4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__LPUART8_RX                                           0x0044 0x01f4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO13__LPI2C8_SCL                                           0x0044 0x01f4 0x0418 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO13__FLEXIO1_FLEXIO13                                     0x0044 0x01f4 0x039c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO14__GPIO2_IO14                                           0x0048 0x01f8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__LPUART3_TX                                           0x0048 0x01f8 0x0474 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__MEDIAMIX_CAM_DATA6                                   0x0048 0x01f8 0x04a8 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__MEDIAMIX_DISP_DATA10                                 0x0048 0x01f8 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__LPSPI8_SOUT                                          0x0048 0x01f8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__LPUART8_CTS_B                                        0x0048 0x01f8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__LPUART4_TX                                           0x0048 0x01f8 0x0480 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO14__FLEXIO1_FLEXIO14                                     0x0048 0x01f8 0x03a0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO15__GPIO2_IO15                                           0x004c 0x01fc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__LPUART3_RX                                           0x004c 0x01fc 0x0470 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__MEDIAMIX_CAM_DATA7                                   0x004c 0x01fc 0x04ac 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__MEDIAMIX_DISP_DATA11                                 0x004c 0x01fc 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__LPSPI8_SCK                                           0x004c 0x01fc 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__LPUART8_RTS_B                                        0x004c 0x01fc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__LPUART4_RX                                           0x004c 0x01fc 0x047c 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO15__FLEXIO1_FLEXIO15                                     0x004c 0x01fc 0x03a4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO16__GPIO2_IO16                                           0x0050 0x0200 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__SAI3_TX_BCLK                                         0x0050 0x0200 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__PDM_BIT_STREAM2                                      0x0050 0x0200 0x04cc 0x02 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO16__MEDIAMIX_DISP_DATA12                                 0x0050 0x0200 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__LPUART3_CTS_B                                        0x0050 0x0200 0x046c 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__LPSPI4_PCS2                                          0x0050 0x0200 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__LPUART4_CTS_B                                        0x0050 0x0200 0x0478 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO16__FLEXIO1_FLEXIO16                                     0x0050 0x0200 0x03a8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO17__GPIO2_IO17                                           0x0054 0x0204 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__SAI3_MCLK                                            0x0054 0x0204 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__MEDIAMIX_CAM_DATA8                                   0x0054 0x0204 0x04b0 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__MEDIAMIX_DISP_DATA13                                 0x0054 0x0204 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__LPUART3_RTS_B                                        0x0054 0x0204 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__LPSPI4_PCS1                                          0x0054 0x0204 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__LPUART4_RTS_B                                        0x0054 0x0204 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO17__FLEXIO1_FLEXIO17                                     0x0054 0x0204 0x03ac 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO18__GPIO2_IO18                                           0x0058 0x0208 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__SAI3_RX_BCLK                                         0x0058 0x0208 0x04d8 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__MEDIAMIX_CAM_DATA9                                   0x0058 0x0208 0x04b4 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__MEDIAMIX_DISP_DATA14                                 0x0058 0x0208 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__LPSPI5_PCS0                                          0x0058 0x0208 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__LPSPI4_PCS0                                          0x0058 0x0208 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__TPM5_CH2                                             0x0058 0x0208 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO18__FLEXIO1_FLEXIO18                                     0x0058 0x0208 0x03b0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO19__GPIO2_IO19                                           0x005c 0x020c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO19__SAI3_RX_SYNC                                         0x005c 0x020c 0x04dc 0x01 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO19__PDM_BIT_STREAM3                                      0x005c 0x020c 0x04d0 0x02 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO19__MEDIAMIX_DISP_DATA15                                 0x005c 0x020c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO19__LPSPI5_SIN                                           0x005c 0x020c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO19__LPSPI4_SIN                                           0x005c 0x020c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO19__TPM6_CH2                                             0x005c 0x020c 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO19__SAI3_TX_DATA0                                        0x005c 0x020c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO20__GPIO2_IO20                                           0x0060 0x0210 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__SAI3_RX_DATA0                                        0x0060 0x0210 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__PDM_BIT_STREAM0                                      0x0060 0x0210 0x04c4 0x02 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO20__MEDIAMIX_DISP_DATA16                                 0x0060 0x0210 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__LPSPI5_SOUT                                          0x0060 0x0210 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__LPSPI4_SOUT                                          0x0060 0x0210 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__TPM3_CH1                                             0x0060 0x0210 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO20__FLEXIO1_FLEXIO20                                     0x0060 0x0210 0x03b4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO21__GPIO2_IO21                                           0x0064 0x0214 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__SAI3_TX_DATA0                                        0x0064 0x0214 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__PDM_CLK                                              0x0064 0x0214 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__MEDIAMIX_DISP_DATA17                                 0x0064 0x0214 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__LPSPI5_SCK                                           0x0064 0x0214 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__LPSPI4_SCK                                           0x0064 0x0214 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__TPM4_CH1                                             0x0064 0x0214 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO21__SAI3_RX_BCLK                                         0x0064 0x0214 0x04d8 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO22__GPIO2_IO22                                           0x0068 0x0218 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__USDHC3_CLK                                           0x0068 0x0218 0x04e8 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__SPDIF_IN                                             0x0068 0x0218 0x04e4 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__MEDIAMIX_DISP_DATA18                                 0x0068 0x0218 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__TPM5_CH1                                             0x0068 0x0218 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__TPM6_EXTCLK                                          0x0068 0x0218 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO22__LPI2C5_SDA                                           0x0068 0x0218 0x0404 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO22__FLEXIO1_FLEXIO22                                     0x0068 0x0218 0x03b8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO23__GPIO2_IO23                                           0x006c 0x021c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO23__USDHC3_CMD                                           0x006c 0x021c 0x04ec 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO23__SPDIF_OUT                                            0x006c 0x021c 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO23__MEDIAMIX_DISP_DATA19                                 0x006c 0x021c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO23__TPM6_CH1                                             0x006c 0x021c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO23__LPI2C5_SCL                                           0x006c 0x021c 0x0400 0x06 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO23__FLEXIO1_FLEXIO23                                     0x006c 0x021c 0x03bc 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO24__GPIO2_IO24                                           0x0070 0x0220 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__USDHC3_DATA0                                         0x0070 0x0220 0x04f0 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__MEDIAMIX_DISP_DATA20                                 0x0070 0x0220 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__TPM3_CH3                                             0x0070 0x0220 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__JTAG_MUX_TDO                                         0x0070 0x0220 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__LPSPI6_PCS1                                          0x0070 0x0220 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO24__FLEXIO1_FLEXIO24                                     0x0070 0x0220 0x03c0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO25__GPIO2_IO25                                           0x0074 0x0224 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__USDHC3_DATA1                                         0x0074 0x0224 0x04f4 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__CAN2_TX                                              0x0074 0x0224 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__MEDIAMIX_DISP_DATA21                                 0x0074 0x0224 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__TPM4_CH3                                             0x0074 0x0224 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__JTAG_MUX_TCK                                         0x0074 0x0224 0x03d4 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO25__LPSPI7_PCS1                                          0x0074 0x0224 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO25__FLEXIO1_FLEXIO25                                     0x0074 0x0224 0x03c4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO26__GPIO2_IO26                                           0x0078 0x0228 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO26__USDHC3_DATA2                                         0x0078 0x0228 0x04f8 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO26__PDM_BIT_STREAM1                                      0x0078 0x0228 0x04c8 0x02 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO26__MEDIAMIX_DISP_DATA22                                 0x0078 0x0228 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO26__TPM5_CH3                                             0x0078 0x0228 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO26__JTAG_MUX_TDI                                         0x0078 0x0228 0x03d8 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO26__LPSPI8_PCS1                                          0x0078 0x0228 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO26__SAI3_TX_SYNC                                         0x0078 0x0228 0x04e0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO27__GPIO2_IO27                                           0x007c 0x022c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO27__USDHC3_DATA3                                         0x007c 0x022c 0x04fc 0x01 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO27__CAN2_RX                                              0x007c 0x022c 0x0364 0x02 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO27__MEDIAMIX_DISP_DATA23                                 0x007c 0x022c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO27__TPM6_CH3                                             0x007c 0x022c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO27__JTAG_MUX_TMS                                         0x007c 0x022c 0x03dc 0x05 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO27__LPSPI5_PCS1                                          0x007c 0x022c 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO27__FLEXIO1_FLEXIO27                                     0x007c 0x022c 0x03c8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO28__GPIO2_IO28                                           0x0080 0x0230 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO28__LPI2C3_SDA                                           0x0080 0x0230 0x03f4 0x01 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO28__CAN1_TX                                              0x0080 0x0230 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO28__FLEXIO1_FLEXIO28                                     0x0080 0x0230 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_GPIO_IO29__GPIO2_IO29                                           0x0084 0x0234 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO29__LPI2C3_SCL                                           0x0084 0x0234 0x03f0 0x01 0x01</div><div class='add'>+#define MX91_PAD_GPIO_IO29__CAN1_RX                                              0x0084 0x0234 0x0360 0x02 0x00</div><div class='add'>+#define MX91_PAD_GPIO_IO29__FLEXIO1_FLEXIO29                                     0x0084 0x0234 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_CCM_CLKO1__CCMSRCGPCMIX_CLKO1                                   0x0088 0x0238 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO1__FLEXIO1_FLEXIO26                                     0x0088 0x0238 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO1__GPIO3_IO26                                           0x0088 0x0238 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_CCM_CLKO2__GPIO3_IO27                                           0x008c 0x023c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO2__CCMSRCGPCMIX_CLKO2                                   0x008c 0x023c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO2__FLEXIO1_FLEXIO27                                     0x008c 0x023c 0x03c8 0x04 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3                                   0x0090 0x0240 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO3__FLEXIO2_FLEXIO28                                     0x0090 0x0240 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO3__GPIO4_IO28                                           0x0090 0x0240 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_CCM_CLKO4__CCMSRCGPCMIX_CLKO4                                   0x0094 0x0244 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO4__FLEXIO2_FLEXIO29                                     0x0094 0x0244 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_CCM_CLKO4__GPIO4_IO29                                           0x0094 0x0244 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_MDC__ENET1_MDC                                            0x0098 0x0248 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__LPUART3_DCB_B                                        0x0098 0x0248 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__I3C2_SCL                                             0x0098 0x0248 0x03cc 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__HSIOMIX_OTG_ID1                                      0x0098 0x0248 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__FLEXIO2_FLEXIO0                                      0x0098 0x0248 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__GPIO4_IO0                                            0x0098 0x0248 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDC__LPI2C1_SCL                                           0x0098 0x0248 0x03e0 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO                                       0x009c 0x024c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__LPUART3_RIN_B                                       0x009c 0x024c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__I3C2_SDA                                            0x009c 0x024c 0x03d0 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__HSIOMIX_OTG_PWR1                                    0x009c 0x024c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__FLEXIO2_FLEXIO1                                     0x009c 0x024c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__GPIO4_IO1                                           0x009c 0x024c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_MDIO__LPI2C1_SDA                                          0x009c 0x024c 0x03e4 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3                                   0x00a0 0x0250 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD3__CAN2_TX                                              0x00a0 0x0250 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD3__HSIOMIX_OTG_ID2                                      0x00a0 0x0250 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD3__FLEXIO2_FLEXIO2                                      0x00a0 0x0250 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD3__GPIO4_IO2                                            0x00a0 0x0250 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD3__LPI2C2_SCL                                           0x00a0 0x0250 0x03e8 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2                                   0x00a4 0x0254 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD2__ENET_QOS_CLOCK_GENERATE_CLK                          0x00a4 0x0254 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD2__CAN2_RX                                              0x00a4 0x0254 0x0364 0x02 0x02</div><div class='add'>+#define MX91_PAD_ENET1_TD2__HSIOMIX_OTG_OC2                                      0x00a4 0x0254 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD2__FLEXIO2_FLEXIO3                                      0x00a4 0x0254 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD2__GPIO4_IO3                                            0x00a4 0x0254 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD2__LPI2C2_SDA                                           0x00a4 0x0254 0x03ec 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1                                      0x00a8 0x0258 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__LPUART3_RTS_B                                        0x00a8 0x0258 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__I3C2_PUR                                             0x00a8 0x0258 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__HSIOMIX_OTG_OC1                                      0x00a8 0x0258 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__FLEXIO2_FLEXIO4                                      0x00a8 0x0258 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__GPIO4_IO4                                            0x00a8 0x0258 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD1__I3C2_PUR_B                                           0x00a8 0x0258 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0                                   0x00ac 0x025c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD0__LPUART3_TX                                           0x00ac 0x025c 0x0474 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET1_TD0__FLEXIO2_FLEXIO5                                      0x00ac 0x025c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TD0__GPIO4_IO5                                            0x00ac 0x025c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL                             0x00b0 0x0260 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TX_CTL__LPUART3_DTR_B                                     0x00b0 0x0260 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TX_CTL__FLEXIO2_FLEXIO6                                   0x00b0 0x0260 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TX_CTL__GPIO4_IO6                                         0x00b0 0x0260 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TX_CTL__LPSPI2_SCK                                        0x00b0 0x0260 0x043c 0x02 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK                   0x00b4 0x0264 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TXC__ENET_QOS_TX_ER                                       0x00b4 0x0264 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TXC__FLEXIO2_FLEXIO7                                      0x00b4 0x0264 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TXC__GPIO4_IO7                                            0x00b4 0x0264 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_TXC__LPSPI2_SIN                                           0x00b4 0x0264 0x0440 0x02 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL                             0x00b8 0x0268 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__LPUART3_DSR_B                                     0x00b8 0x0268 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__HSIOMIX_OTG_PWR2                                  0x00b8 0x0268 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__FLEXIO2_FLEXIO8                                   0x00b8 0x0268 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__GPIO4_IO8                                         0x00b8 0x0268 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RX_CTL__LPSPI2_PCS0                                       0x00b8 0x0268 0x0434 0x02 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC                                   0x00bc 0x026c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RXC__ENET_QOS_RX_ER                                       0x00bc 0x026c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RXC__FLEXIO2_FLEXIO9                                      0x00bc 0x026c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RXC__GPIO4_IO9                                            0x00bc 0x026c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RXC__LPSPI2_SOUT                                          0x00bc 0x026c 0x0444 0x02 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0                                   0x00c0 0x0270 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD0__LPUART3_RX                                           0x00c0 0x0270 0x0470 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET1_RD0__FLEXIO2_FLEXIO10                                     0x00c0 0x0270 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD0__GPIO4_IO10                                           0x00c0 0x0270 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1                                   0x00c4 0x0274 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD1__LPUART3_CTS_B                                        0x00c4 0x0274 0x046c 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET1_RD1__LPTMR2_ALT1                                          0x00c4 0x0274 0x0448 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD1__FLEXIO2_FLEXIO11                                     0x00c4 0x0274 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD1__GPIO4_IO11                                           0x00c4 0x0274 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2                                   0x00c8 0x0278 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD2__LPTMR2_ALT2                                          0x00c8 0x0278 0x044c 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD2__FLEXIO2_FLEXIO12                                     0x00c8 0x0278 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD2__GPIO4_IO12                                           0x00c8 0x0278 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3                                   0x00cc 0x027c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD3__FLEXSPI1_TESTER_TRIGGER                              0x00cc 0x027c 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD3__LPTMR2_ALT3                                          0x00cc 0x027c 0x0450 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD3__FLEXIO2_FLEXIO13                                     0x00cc 0x027c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET1_RD3__GPIO4_IO13                                           0x00cc 0x027c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_MDC__ENET2_MDC                                            0x00d0 0x0280 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDC__LPUART4_DCB_B                                        0x00d0 0x0280 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDC__SAI2_RX_SYNC                                         0x00d0 0x0280 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDC__FLEXIO2_FLEXIO14                                     0x00d0 0x0280 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDC__GPIO4_IO14                                           0x00d0 0x0280 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDC__MEDIAMIX_CAM_CLK                                     0x00d0 0x0280 0x04bc 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__ENET2_MDIO                                          0x00d4 0x0284 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__LPUART4_RIN_B                                       0x00d4 0x0284 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__SAI2_RX_BCLK                                        0x00d4 0x0284 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__FLEXIO2_FLEXIO15                                    0x00d4 0x0284 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__GPIO4_IO15                                          0x00d4 0x0284 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_MDIO__MEDIAMIX_CAM_DATA0                                  0x00d4 0x0284 0x0490 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TD3__SAI2_RX_DATA0                                        0x00d8 0x0288 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD3__FLEXIO2_FLEXIO16                                     0x00d8 0x0288 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD3__GPIO4_IO16                                           0x00d8 0x0288 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD3__MEDIAMIX_CAM_VSYNC                                   0x00d8 0x0288 0x04c0 0x06 0x01</div><div class='add'>+#define MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3                                      0x00d8 0x0288 0x0000 0x00 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2                                      0x00dc 0x028c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD2__ENET2_TX_CLK2                                        0x00dc 0x028c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD2__FLEXIO2_FLEXIO17                                     0x00dc 0x028c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD2__GPIO4_IO17                                           0x00dc 0x028c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD2__MEDIAMIX_CAM_HSYNC                                   0x00dc 0x028c 0x04b8 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1                                      0x00e0 0x0290 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD1__LPUART4_RTS_B                                        0x00e0 0x0290 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD1__FLEXIO2_FLEXIO18                                     0x00e0 0x0290 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD1__GPIO4_IO18                                           0x00e0 0x0290 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD1__MEDIAMIX_CAM_DATA1                                   0x00e0 0x0290 0x0494 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0                                      0x00e4 0x0294 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD0__LPUART4_TX                                           0x00e4 0x0294 0x0480 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET2_TD0__FLEXIO2_FLEXIO19                                     0x00e4 0x0294 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD0__GPIO4_IO19                                           0x00e4 0x0294 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TD0__MEDIAMIX_CAM_DATA2                                   0x00e4 0x0294 0x0498 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL                                0x00e8 0x0298 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__LPUART4_DTR_B                                     0x00e8 0x0298 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__SAI2_TX_SYNC                                      0x00e8 0x0298 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__FLEXIO2_FLEXIO20                                  0x00e8 0x0298 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__GPIO4_IO20                                        0x00e8 0x0298 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TX_CTL__MEDIAMIX_CAM_DATA3                                0x00e8 0x0298 0x049c 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC                                      0x00ec 0x029c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TXC__ENET2_TX_ER                                          0x00ec 0x029c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TXC__SAI2_TX_BCLK                                         0x00ec 0x029c 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TXC__FLEXIO2_FLEXIO21                                     0x00ec 0x029c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TXC__GPIO4_IO21                                           0x00ec 0x029c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_TXC__MEDIAMIX_CAM_DATA4                                   0x00ec 0x029c 0x04a0 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL                                0x00f0 0x02a0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__LPUART4_DSR_B                                     0x00f0 0x02a0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__SAI2_TX_DATA0                                     0x00f0 0x02a0 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__FLEXIO2_FLEXIO22                                  0x00f0 0x02a0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__GPIO4_IO22                                        0x00f0 0x02a0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RX_CTL__MEDIAMIX_CAM_DATA5                                0x00f0 0x02a0 0x04a4 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC                                      0x00f4 0x02a4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RXC__ENET2_RX_ER                                          0x00f4 0x02a4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RXC__FLEXIO2_FLEXIO23                                     0x00f4 0x02a4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RXC__GPIO4_IO23                                           0x00f4 0x02a4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RXC__MEDIAMIX_CAM_DATA6                                   0x00f4 0x02a4 0x04a8 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0                                      0x00f8 0x02a8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD0__LPUART4_RX                                           0x00f8 0x02a8 0x047c 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET2_RD0__FLEXIO2_FLEXIO24                                     0x00f8 0x02a8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD0__GPIO4_IO24                                           0x00f8 0x02a8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD0__MEDIAMIX_CAM_DATA7                                   0x00f8 0x02a8 0x04ac 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1                                      0x00fc 0x02ac 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD1__SPDIF_IN                                             0x00fc 0x02ac 0x04e4 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET2_RD1__FLEXIO2_FLEXIO25                                     0x00fc 0x02ac 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD1__GPIO4_IO25                                           0x00fc 0x02ac 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD1__MEDIAMIX_CAM_DATA8                                   0x00fc 0x02ac 0x04b0 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2                                      0x0100 0x02b0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD2__LPUART4_CTS_B                                        0x0100 0x02b0 0x0478 0x01 0x01</div><div class='add'>+#define MX91_PAD_ENET2_RD2__SAI2_MCLK                                            0x0100 0x02b0 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD2__MQS2_RIGHT                                           0x0100 0x02b0 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD2__FLEXIO2_FLEXIO26                                     0x0100 0x02b0 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD2__GPIO4_IO26                                           0x0100 0x02b0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD2__MEDIAMIX_CAM_DATA9                                   0x0100 0x02b0 0x04b4 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3                                      0x0104 0x02b4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD3__SPDIF_OUT                                            0x0104 0x02b4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD3__SPDIF_IN                                             0x0104 0x02b4 0x04e4 0x02 0x02</div><div class='add'>+#define MX91_PAD_ENET2_RD3__MQS2_LEFT                                            0x0104 0x02b4 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD3__FLEXIO2_FLEXIO27                                     0x0104 0x02b4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_ENET2_RD3__GPIO4_IO27                                           0x0104 0x02b4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_CLK__FLEXIO1_FLEXIO8                                        0x0108 0x02b8 0x038c 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_CLK__GPIO3_IO8                                              0x0108 0x02b8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_CLK__USDHC1_CLK                                             0x0108 0x02b8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_CLK__LPSPI2_SCK                                             0x0108 0x02b8 0x043c 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_CMD__USDHC1_CMD                                             0x010c 0x02bc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_CMD__FLEXIO1_FLEXIO9                                        0x010c 0x02bc 0x0390 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_CMD__GPIO3_IO9                                              0x010c 0x02bc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_CMD__LPSPI2_SIN                                             0x010c 0x02bc 0x0440 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA0__USDHC1_DATA0                                         0x0110 0x02c0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA0__FLEXIO1_FLEXIO10                                     0x0110 0x02c0 0x0394 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA0__GPIO3_IO10                                           0x0110 0x02c0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA0__LPSPI2_PCS0                                          0x0110 0x02c0 0x0434 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA1__USDHC1_DATA1                                         0x0114 0x02c4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA1__FLEXIO1_FLEXIO11                                     0x0114 0x02c4 0x0398 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA1__GPIO3_IO11                                           0x0114 0x02c4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA1__CCMSRCGPCMIX_INT_BOOT                                0x0114 0x02c4 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA1__LPSPI2_SOUT                                          0x0114 0x02c4 0x0444 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA2__USDHC1_DATA2                                         0x0118 0x02c8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA2__FLEXIO1_FLEXIO12                                     0x0118 0x02c8 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA2__GPIO3_IO12                                           0x0118 0x02c8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA2__CCMSRCGPCMIX_PMIC_READY                              0x0118 0x02c8 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA2__LPSPI2_PCS1                                          0x0118 0x02c8 0x0438 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA3__USDHC1_DATA3                                         0x011c 0x02cc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA3__FLEXSPI1_A_SS1_B                                     0x011c 0x02cc 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA3__FLEXIO1_FLEXIO13                                     0x011c 0x02cc 0x039c 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA3__GPIO3_IO13                                           0x011c 0x02cc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA3__LPSPI1_PCS1                                          0x011c 0x02cc 0x0424 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA4__USDHC1_DATA4                                         0x0120 0x02d0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA4__FLEXSPI1_A_DATA4                                     0x0120 0x02d0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA4__FLEXIO1_FLEXIO14                                     0x0120 0x02d0 0x03a0 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA4__GPIO3_IO14                                           0x0120 0x02d0 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA4__LPSPI1_PCS0                                          0x0120 0x02d0 0x0420 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA5__USDHC1_DATA5                                         0x0124 0x02d4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA5__FLEXSPI1_A_DATA5                                     0x0124 0x02d4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA5__USDHC1_RESET_B                                       0x0124 0x02d4 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA5__FLEXIO1_FLEXIO15                                     0x0124 0x02d4 0x03a4 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA5__GPIO3_IO15                                           0x0124 0x02d4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA5__LPSPI1_SIN                                           0x0124 0x02d4 0x042c 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA6__USDHC1_DATA6                                         0x0128 0x02d8 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA6__FLEXSPI1_A_DATA6                                     0x0128 0x02d8 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA6__USDHC1_CD_B                                          0x0128 0x02d8 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA6__FLEXIO1_FLEXIO16                                     0x0128 0x02d8 0x03a8 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA6__GPIO3_IO16                                           0x0128 0x02d8 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA6__LPSPI1_SCK                                           0x0128 0x02d8 0x0428 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_DATA7__USDHC1_DATA7                                         0x012c 0x02dc 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA7__FLEXSPI1_A_DATA7                                     0x012c 0x02dc 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA7__USDHC1_WP                                            0x012c 0x02dc 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA7__FLEXIO1_FLEXIO17                                     0x012c 0x02dc 0x03ac 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_DATA7__GPIO3_IO17                                           0x012c 0x02dc 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD1_DATA7__LPSPI1_SOUT                                          0x012c 0x02dc 0x0430 0x03 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD1_STROBE__USDHC1_STROBE                                       0x0130 0x02e0 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD1_STROBE__FLEXSPI1_A_DQS                                      0x0130 0x02e0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD1_STROBE__FLEXIO1_FLEXIO18                                    0x0130 0x02e0 0x03b0 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD1_STROBE__GPIO3_IO18                                          0x0130 0x02e0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__USDHC2_VSELECT                                     0x0134 0x02e4 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__USDHC2_WP                                          0x0134 0x02e4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__LPTMR2_ALT3                                        0x0134 0x02e4 0x0450 0x02 0x01</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__FLEXIO1_FLEXIO19                                   0x0134 0x02e4 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__GPIO3_IO19                                         0x0134 0x02e4 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_VSELECT__CCMSRCGPCMIX_EXT_CLK1                              0x0134 0x02e4 0x0368 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_CLK__USDHC3_CLK                                             0x0138 0x02e8 0x04e8 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_CLK__FLEXSPI1_A_SCLK                                        0x0138 0x02e8 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_CLK__LPUART1_CTS_B                                          0x0138 0x02e8 0x0454 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD3_CLK__FLEXIO1_FLEXIO20                                       0x0138 0x02e8 0x03b4 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD3_CLK__GPIO3_IO20                                             0x0138 0x02e8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_CMD__USDHC3_CMD                                             0x013c 0x02ec 0x04ec 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_CMD__FLEXSPI1_A_SS0_B                                       0x013c 0x02ec 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_CMD__LPUART1_RTS_B                                          0x013c 0x02ec 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD3_CMD__FLEXIO1_FLEXIO21                                       0x013c 0x02ec 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SD3_CMD__GPIO3_IO21                                             0x013c 0x02ec 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_DATA0__USDHC3_DATA0                                         0x0140 0x02f0 0x04f0 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA0__FLEXSPI1_A_DATA0                                     0x0140 0x02f0 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA0__LPUART2_CTS_B                                        0x0140 0x02f0 0x0460 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA0__FLEXIO1_FLEXIO22                                     0x0140 0x02f0 0x03b8 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA0__GPIO3_IO22                                           0x0140 0x02f0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_DATA1__USDHC3_DATA1                                         0x0144 0x02f4 0x04f4 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA1__FLEXSPI1_A_DATA1                                     0x0144 0x02f4 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA1__LPUART2_RTS_B                                        0x0144 0x02f4 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA1__FLEXIO1_FLEXIO23                                     0x0144 0x02f4 0x03bc 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA1__GPIO3_IO23                                           0x0144 0x02f4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_DATA2__USDHC3_DATA2                                         0x0148 0x02f8 0x04f8 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA2__LPI2C4_SDA                                           0x0148 0x02f8 0x03fc 0x02 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA2__FLEXSPI1_A_DATA2                                     0x0148 0x02f8 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA2__FLEXIO1_FLEXIO24                                     0x0148 0x02f8 0x03c0 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA2__GPIO3_IO24                                           0x0148 0x02f8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD3_DATA3__USDHC3_DATA3                                         0x014c 0x02fc 0x04fc 0x00 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA3__FLEXSPI1_A_DATA3                                     0x014c 0x02fc 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD3_DATA3__LPI2C4_SCL                                           0x014c 0x02fc 0x03f8 0x02 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA3__FLEXIO1_FLEXIO25                                     0x014c 0x02fc 0x03c4 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD3_DATA3__GPIO3_IO25                                           0x014c 0x02fc 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_CD_B__USDHC2_CD_B                                           0x0150 0x0300 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_CD_B__ENET_QOS_1588_EVENT0_IN                               0x0150 0x0300 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_CD_B__I3C2_SCL                                              0x0150 0x0300 0x03cc 0x02 0x01</div><div class='add'>+#define MX91_PAD_SD2_CD_B__FLEXIO1_FLEXIO0                                       0x0150 0x0300 0x036c 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_CD_B__GPIO3_IO0                                             0x0150 0x0300 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_CD_B__LPI2C1_SCL                                            0x0150 0x0300 0x03e0 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_CLK__USDHC2_CLK                                             0x0154 0x0304 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_CLK__ENET_QOS_1588_EVENT0_OUT                               0x0154 0x0304 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_CLK__I2C1_SDA                                               0x0154 0x0304 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_CLK__I3C2_SDA                                               0x0154 0x0304 0x03d0 0x02 0x01</div><div class='add'>+#define MX91_PAD_SD2_CLK__FLEXIO1_FLEXIO1                                        0x0154 0x0304 0x0370 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_CLK__GPIO3_IO1                                              0x0154 0x0304 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_CLK__CCMSRCGPCMIX_OBSERVE0                                  0x0154 0x0304 0x0000 0x06 0x00</div><div class='add'>+#define MX91_PAD_SD2_CLK__LPI2C1_SDA                                             0x0154 0x0304 0x03e4 0x03 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_CMD__USDHC2_CMD                                             0x0158 0x0308 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_CMD__ENET2_1588_EVENT0_IN                                   0x0158 0x0308 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_CMD__I3C2_PUR                                               0x0158 0x0308 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD2_CMD__I3C2_PUR_B                                             0x0158 0x0308 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_CMD__FLEXIO1_FLEXIO2                                        0x0158 0x0308 0x0374 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_CMD__GPIO3_IO2                                              0x0158 0x0308 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_CMD__CCMSRCGPCMIX_OBSERVE1                                  0x0158 0x0308 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_DATA0__USDHC2_DATA0                                         0x015c 0x030c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA0__ENET2_1588_EVENT0_OUT                                0x015c 0x030c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA0__CAN2_TX                                              0x015c 0x030c 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA0__FLEXIO1_FLEXIO3                                      0x015c 0x030c 0x0378 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_DATA0__GPIO3_IO3                                            0x015c 0x030c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA0__LPUART1_TX                                           0x015c 0x030c 0x045c 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA0__CCMSRCGPCMIX_OBSERVE2                                0x015c 0x030c 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_DATA1__USDHC2_DATA1                                         0x0160 0x0310 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA1__ENET2_1588_EVENT1_IN                                 0x0160 0x0310 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA1__CAN2_RX                                              0x0160 0x0310 0x0364 0x02 0x03</div><div class='add'>+#define MX91_PAD_SD2_DATA1__FLEXIO1_FLEXIO4                                      0x0160 0x0310 0x037c 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_DATA1__GPIO3_IO4                                            0x0160 0x0310 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA1__LPUART1_RX                                           0x0160 0x0310 0x0458 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA1__CCMSRCGPCMIX_WAIT                                    0x0160 0x0310 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_DATA2__USDHC2_DATA2                                         0x0164 0x0314 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA2__ENET2_1588_EVENT1_OUT                                0x0164 0x0314 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA2__MQS2_RIGHT                                           0x0164 0x0314 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA2__FLEXIO1_FLEXIO5                                      0x0164 0x0314 0x0380 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_DATA2__GPIO3_IO5                                            0x0164 0x0314 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA2__LPUART2_TX                                           0x0164 0x0314 0x0468 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA2__CCMSRCGPCMIX_STOP                                    0x0164 0x0314 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_DATA3__USDHC2_DATA3                                         0x0168 0x0318 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA3__LPTMR2_ALT1                                          0x0168 0x0318 0x0448 0x01 0x01</div><div class='add'>+#define MX91_PAD_SD2_DATA3__MQS2_LEFT                                            0x0168 0x0318 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA3__FLEXIO1_FLEXIO6                                      0x0168 0x0318 0x0384 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_DATA3__GPIO3_IO6                                            0x0168 0x0318 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA3__LPUART2_RX                                           0x0168 0x0318 0x0464 0x03 0x00</div><div class='add'>+#define MX91_PAD_SD2_DATA3__CCMSRCGPCMIX_EARLY_RESET                             0x0168 0x0318 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SD2_RESET_B__USDHC2_RESET_B                                     0x016c 0x031c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SD2_RESET_B__LPTMR2_ALT2                                        0x016c 0x031c 0x044c 0x01 0x01</div><div class='add'>+#define MX91_PAD_SD2_RESET_B__FLEXIO1_FLEXIO7                                    0x016c 0x031c 0x0388 0x04 0x01</div><div class='add'>+#define MX91_PAD_SD2_RESET_B__GPIO3_IO7                                          0x016c 0x031c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SD2_RESET_B__CCMSRCGPCMIX_SYSTEM_RESET                          0x016c 0x031c 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_I2C1_SCL__LPI2C1_SCL                                            0x0170 0x0320 0x03e0 0x00 0x02</div><div class='add'>+#define MX91_PAD_I2C1_SCL__I3C1_SCL                                              0x0170 0x0320 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SCL__LPUART1_DCB_B                                         0x0170 0x0320 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SCL__TPM2_CH0                                              0x0170 0x0320 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SCL__GPIO1_IO0                                             0x0170 0x0320 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_I2C1_SDA__LPI2C1_SDA                                            0x0174 0x0324 0x03e4 0x00 0x02</div><div class='add'>+#define MX91_PAD_I2C1_SDA__I3C1_SDA                                              0x0174 0x0324 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SDA__LPUART1_RIN_B                                         0x0174 0x0324 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SDA__TPM2_CH1                                              0x0174 0x0324 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_I2C1_SDA__GPIO1_IO1                                             0x0174 0x0324 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_I2C2_SCL__LPI2C2_SCL                                            0x0178 0x0328 0x03e8 0x00 0x01</div><div class='add'>+#define MX91_PAD_I2C2_SCL__I3C1_PUR                                              0x0178 0x0328 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SCL__LPUART2_DCB_B                                         0x0178 0x0328 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SCL__TPM2_CH2                                              0x0178 0x0328 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SCL__SAI1_RX_SYNC                                          0x0178 0x0328 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SCL__GPIO1_IO2                                             0x0178 0x0328 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SCL__I3C1_PUR_B                                            0x0178 0x0328 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_I2C2_SDA__LPI2C2_SDA                                            0x017c 0x032c 0x03ec 0x00 0x01</div><div class='add'>+#define MX91_PAD_I2C2_SDA__LPUART2_RIN_B                                         0x017c 0x032c 0x0000 0x02 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SDA__TPM2_CH3                                              0x017c 0x032c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SDA__SAI1_RX_BCLK                                          0x017c 0x032c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_I2C2_SDA__GPIO1_IO3                                             0x017c 0x032c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_UART1_RXD__LPUART1_RX                                           0x0180 0x0330 0x0458 0x00 0x01</div><div class='add'>+#define MX91_PAD_UART1_RXD__ELE_UART_RX                                          0x0180 0x0330 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_UART1_RXD__LPSPI2_SIN                                           0x0180 0x0330 0x0440 0x02 0x02</div><div class='add'>+#define MX91_PAD_UART1_RXD__TPM1_CH0                                             0x0180 0x0330 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_UART1_RXD__GPIO1_IO4                                            0x0180 0x0330 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_UART1_TXD__LPUART1_TX                                           0x0184 0x0334 0x045c 0x00 0x01</div><div class='add'>+#define MX91_PAD_UART1_TXD__ELE_UART_TX                                          0x0184 0x0334 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_UART1_TXD__LPSPI2_PCS0                                          0x0184 0x0334 0x0434 0x02 0x02</div><div class='add'>+#define MX91_PAD_UART1_TXD__TPM1_CH1                                             0x0184 0x0334 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_UART1_TXD__GPIO1_IO5                                            0x0184 0x0334 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_UART2_RXD__LPUART2_RX                                           0x0188 0x0338 0x0464 0x00 0x01</div><div class='add'>+#define MX91_PAD_UART2_RXD__LPUART1_CTS_B                                        0x0188 0x0338 0x0454 0x01 0x01</div><div class='add'>+#define MX91_PAD_UART2_RXD__LPSPI2_SOUT                                          0x0188 0x0338 0x0444 0x02 0x02</div><div class='add'>+#define MX91_PAD_UART2_RXD__TPM1_CH2                                             0x0188 0x0338 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_UART2_RXD__SAI1_MCLK                                            0x0188 0x0338 0x04d4 0x04 0x00</div><div class='add'>+#define MX91_PAD_UART2_RXD__GPIO1_IO6                                            0x0188 0x0338 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_UART2_TXD__LPUART2_TX                                           0x018c 0x033c 0x0468 0x00 0x01</div><div class='add'>+#define MX91_PAD_UART2_TXD__LPUART1_RTS_B                                        0x018c 0x033c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_UART2_TXD__LPSPI2_SCK                                           0x018c 0x033c 0x043c 0x02 0x02</div><div class='add'>+#define MX91_PAD_UART2_TXD__TPM1_CH3                                             0x018c 0x033c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_UART2_TXD__GPIO1_IO7                                            0x018c 0x033c 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_UART2_TXD__SAI3_TX_SYNC                                         0x018c 0x033c 0x04e0 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_PDM_CLK__PDM_CLK                                                0x0190 0x0340 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_PDM_CLK__MQS1_LEFT                                              0x0190 0x0340 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_PDM_CLK__LPTMR1_ALT1                                            0x0190 0x0340 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_PDM_CLK__GPIO1_IO8                                              0x0190 0x0340 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_PDM_CLK__CAN1_TX                                                0x0190 0x0340 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0                                0x0194 0x0344 0x04c4 0x00 0x02</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__MQS1_RIGHT                                     0x0194 0x0344 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__LPSPI1_PCS1                                    0x0194 0x0344 0x0424 0x02 0x01</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__TPM1_EXTCLK                                    0x0194 0x0344 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__LPTMR1_ALT2                                    0x0194 0x0344 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__GPIO1_IO9                                      0x0194 0x0344 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM0__CAN1_RX                                        0x0194 0x0344 0x0360 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1                                0x0198 0x0348 0x04c8 0x00 0x02</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__LPSPI2_PCS1                                    0x0198 0x0348 0x0438 0x02 0x01</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__TPM2_EXTCLK                                    0x0198 0x0348 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__LPTMR1_ALT3                                    0x0198 0x0348 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10                                     0x0198 0x0348 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_PDM_BIT_STREAM1__CCMSRCGPCMIX_EXT_CLK1                          0x0198 0x0348 0x0368 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__SAI1_TX_SYNC                                         0x019c 0x034c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__SAI1_TX_DATA1                                        0x019c 0x034c 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__LPSPI1_PCS0                                          0x019c 0x034c 0x0420 0x02 0x01</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__LPUART2_DTR_B                                        0x019c 0x034c 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__MQS1_LEFT                                            0x019c 0x034c 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXFS__GPIO1_IO11                                           0x019c 0x034c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SAI1_TXC__SAI1_TX_BCLK                                          0x01a0 0x0350 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXC__LPUART2_CTS_B                                         0x01a0 0x0350 0x0460 0x01 0x01</div><div class='add'>+#define MX91_PAD_SAI1_TXC__LPSPI1_SIN                                            0x01a0 0x0350 0x042c 0x02 0x01</div><div class='add'>+#define MX91_PAD_SAI1_TXC__LPUART1_DSR_B                                         0x01a0 0x0350 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXC__CAN1_RX                                               0x01a0 0x0350 0x0360 0x04 0x02</div><div class='add'>+#define MX91_PAD_SAI1_TXC__GPIO1_IO12                                            0x01a0 0x0350 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__SAI1_TX_DATA0                                        0x01a4 0x0354 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__LPUART2_RTS_B                                        0x01a4 0x0354 0x0000 0x01 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__LPSPI1_SCK                                           0x01a4 0x0354 0x0428 0x02 0x01</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__LPUART1_DTR_B                                        0x01a4 0x0354 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__CAN1_TX                                              0x01a4 0x0354 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__GPIO1_IO13                                           0x01a4 0x0354 0x0000 0x05 0x00</div><div class='add'>+#define MX91_PAD_SAI1_TXD0__SAI1_MCLK                                            0x01a4 0x0354 0x04d4 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__SAI1_RX_DATA0                                        0x01a8 0x0358 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__SAI1_MCLK                                            0x01a8 0x0358 0x04d4 0x01 0x02</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__LPSPI1_SOUT                                          0x01a8 0x0358 0x0430 0x02 0x01</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__LPUART2_DSR_B                                        0x01a8 0x0358 0x0000 0x03 0x00</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__MQS1_RIGHT                                           0x01a8 0x0358 0x0000 0x04 0x00</div><div class='add'>+#define MX91_PAD_SAI1_RXD0__GPIO1_IO14                                           0x01a8 0x0358 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY                                        0x01ac 0x035c 0x0000 0x00 0x00</div><div class='add'>+#define MX91_PAD_WDOG_ANY__GPIO1_IO15                                            0x01ac 0x035c 0x0000 0x05 0x00</div><div class='add'>+#endif /* __DTS_IMX91_PINFUNC_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts b/arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts<br/>new file mode 100644<br/>index 000000000000..5c430e6fca65<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91-tqma9131-mba91xxca.dts</a></div><div class='hunk'>@@ -0,0 +1,739 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Markus Niebel</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx91-tqma9131.dtsi"</div><div class='add'>+</div><div class='add'>+/{</div><div class='add'>+	model = "TQ-Systems i.MX91 TQMa91xxLA/TQMa91xxCA on MBa91xxCA starter kit";</div><div class='add'>+	compatible = "tq,imx91-tqma9131-mba91xxca", "tq,imx91-tqma9131", "fsl,imx91";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom0 = &amp;eeprom0;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		rtc0 = &amp;pcf85063;</div><div class='add'>+		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;tpm2 2 5000000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display: display {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT overlay</div><div class='add'>+		 */</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan0: gpio-fan {</div><div class='add'>+		compatible = "gpio-fan";</div><div class='add'>+		gpios = &lt;&amp;expander2 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio-fan,speed-map = &lt;0 0&gt;, &lt;10000 1&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		switch-a {</div><div class='add'>+			label = "switcha";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;expander0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-b {</div><div class='add'>+			label = "switchb";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;expander0 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;expander2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;expander2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc1 0&gt;, &lt;&amp;adc1 1&gt;, &lt;&amp;adc1 2&gt;, &lt;&amp;adc1 3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lvds_encoder: lvds-encoder {</div><div class='add'>+		compatible = "ti,sn75lvds83", "lvds-encoder";</div><div class='add'>+		powerdown-gpios = &lt;&amp;expander2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_input: endpoint {</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_output: endpoint {</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_MB";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v0: regulator-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_5V0_MB";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_12v0: regulator-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_12V";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_mpcie_1v5: regulator-mpcie-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V5_MPCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_mpcie_3v3: regulator-mpcie-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_MPCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy_eqos&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy_eqos: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_eqos_phy&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;expander1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy_fec&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy_fec: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_fec_phy&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;expander1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "PMIC_IRQ#",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "USB_C_ALERT#", "BM2_LCD_INT#",</div><div class='add'>+		/* 12 */ "PEX_INT#", "", "RTC_EVENT#", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_jtag&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "SD2_CD#", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "SD2_RST#",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "ENET1_INT#", "ENET2_INT#",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@1c {</div><div class='add'>+		compatible = "nxp,se97b", "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ptn5110: usb-typec@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "X17";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			typec-power-opmode = "default";</div><div class='add'>+			pd-disable;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				typec_con_hs: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;typec_hs&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom2: eeprom@54 {</div><div class='add'>+		compatible = "nxp,se97b", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander0: gpio@70 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pexp_irq&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "TEMP_EVENT_MOD#", "MPCIE_WAKE#",</div><div class='add'>+				  "MPCIE_1V5_EN", "MPCIE_3V3_EN",</div><div class='add'>+				  "MPCIE_PERST#", "MPCIE_WDISABLE#",</div><div class='add'>+				  "BUTTON_A#", "BUTTON_B#";</div><div class='add'>+</div><div class='add'>+		temp-event-mod-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "TEMP_EVENT_MOD#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mpcie-wake-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "MPCIE_WAKE#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the mPCIE slot reset which is low active as</div><div class='add'>+		 * reset signal. The output-low states, the signal is</div><div class='add'>+		 * inactive, e.g. not in reset</div><div class='add'>+		 */</div><div class='add'>+		mpcie_rst_hog: mpcie-rst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "MPCIE_PERST#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the mPCIE slot WDISABLE pin which is low active</div><div class='add'>+		 * as disable signal. The output-low states, the signal is</div><div class='add'>+		 * inactive, e.g. not disabled</div><div class='add'>+		 */</div><div class='add'>+		mpcie_wdisable_hog: mpcie-wdisable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "MPCIE_WDISABLE#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander1: gpio@71 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "ENET1_RESET#", "ENET2_RESET#",</div><div class='add'>+				  "USB_RESET#", "",</div><div class='add'>+				  "WLAN_PD#", "WLAN_W_DISABLE#",</div><div class='add'>+				  "WLAN_PERST#", "12V_EN";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card PD pin which is low active</div><div class='add'>+		 * as power down signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not power down</div><div class='add'>+		 */</div><div class='add'>+		wlan-pd-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_PD#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card disable pin which is low active</div><div class='add'>+		 * as disable signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not disabled</div><div class='add'>+		 */</div><div class='add'>+		wlan-wdisable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_W_DISABLE#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card reset pin which is low active</div><div class='add'>+		 * as reset signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not in reset</div><div class='add'>+		 */</div><div class='add'>+		wlan-perst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_PERST#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander2: gpio@72 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "LCD_RESET#", "LCD_PWR_EN",</div><div class='add'>+				  "LCD_BLT_EN", "LVDS_SHDN#",</div><div class='add'>+				  "FAN_PWR_EN", "",</div><div class='add'>+				  "USER_LED1", "USER_LED2";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcf85063 {</div><div class='add'>+	/* RTC_EVENT# from SoM is connected on mainboard */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcf85063&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;14 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;se97_som {</div><div class='add'>+	/* TEMP_EVENT# from SoM is connected on mainboard */</div><div class='add'>+	interrupt-parent = &lt;&amp;expander0&gt;;</div><div class='add'>+	interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		typec_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2517";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2_hs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_uhs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_uhs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_MDC__ENET1_MDC				0x51e&gt;,</div><div class='add'>+			   /* SION | HYS | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO				0x4000111e&gt;,</div><div class='add'>+			   /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0			0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x1000&gt;,</div><div class='add'>+			   /* HYS | PD | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC			0x1400&gt;,</div><div class='add'>+			   /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1				0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x51e&gt;,</div><div class='add'>+			   /* PD | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_phy: eqosphygrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_CCM_CLKO1__GPIO3_IO26		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_MDC__ENET2_MDC		0x51e&gt;,</div><div class='add'>+			   /* SION | HYS | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_MDIO__ENET2_MDIO		0x4000111e&gt;,</div><div class='add'>+			   /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RD0__ENET2_RGMII_RD0		0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RD1__ENET2_RGMII_RD1		0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RD2__ENET2_RGMII_RD2		0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RD3__ENET2_RGMII_RD3		0x1000&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RX_CTL__ENET2_RGMII_RX_CTL	0x1000&gt;,</div><div class='add'>+			   /* HYS | PD | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_RXC__ENET2_RGMII_RXC		0x1400&gt;,</div><div class='add'>+			   /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TD0__ENET2_RGMII_TD0		0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TD1__ENET2_RGMII_TD1		0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TD2__ENET2_RGMII_TD2		0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TD3__ENET2_RGMII_TD3		0x51e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TX_CTL__ENET2_RGMII_TX_CTL	0x51e&gt;,</div><div class='add'>+			   /* PD | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX91_PAD_ENET2_TXC__ENET2_RGMII_TXC		0x58e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec_phy: fecphygrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_CCM_CLKO2__GPIO3_IO27		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX91_PAD_PDM_BIT_STREAM0__CAN1_RX		0x1200&gt;,</div><div class='add'>+			   /* PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_PDM_CLK__CAN1_TX			0x039e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_jtag: jtaggrp {</div><div class='add'>+		fsl,pins = &lt;MX91_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK	0x051e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_DAP_TDI__JTAG_MUX_TDI		0x1200&gt;,</div><div class='add'>+			   &lt;MX91_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO	0x031e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS	0x1200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO28__LPI2C3_SDA		0x4000199e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO29__LPI2C3_SCL		0x4000199e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcf85063: pcf85063grp {</div><div class='add'>+		fsl,pins = &lt;MX91_PAD_SAI1_RXD0__GPIO1_IO14		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pexp_irq: pexpirqgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_SAI1_TXC__GPIO1_IO12		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rgbdisp: rgbdispgrp {</div><div class='add'>+		fsl,pins = &lt;MX91_PAD_GPIO_IO00__MEDIAMIX_DISP_CLK	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO01__MEDIAMIX_DISP_DE	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO02__MEDIAMIX_DISP_VSYNC	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO03__MEDIAMIX_DISP_HSYNC	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO04__MEDIAMIX_DISP_DATA0	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO05__MEDIAMIX_DISP_DATA1	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO06__MEDIAMIX_DISP_DATA2	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO07__MEDIAMIX_DISP_DATA3	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO08__MEDIAMIX_DISP_DATA4	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO09__MEDIAMIX_DISP_DATA5	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO10__MEDIAMIX_DISP_DATA6	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO11__MEDIAMIX_DISP_DATA7	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO12__MEDIAMIX_DISP_DATA8	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO13__MEDIAMIX_DISP_DATA9	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO14__MEDIAMIX_DISP_DATA10	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO15__MEDIAMIX_DISP_DATA11	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO16__MEDIAMIX_DISP_DATA12	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO17__MEDIAMIX_DISP_DATA13	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO18__MEDIAMIX_DISP_DATA14	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO19__MEDIAMIX_DISP_DATA15	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO20__MEDIAMIX_DISP_DATA16	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO21__MEDIAMIX_DISP_DATA17	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO22__MEDIAMIX_DISP_DATA18	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO23__MEDIAMIX_DISP_DATA19	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO24__MEDIAMIX_DISP_DATA20	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO25__MEDIAMIX_DISP_DATA21	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO26__MEDIAMIX_DISP_DATA22	0x31e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_GPIO_IO27__MEDIAMIX_DISP_DATA23	0x31e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touch: touchgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_SAI1_TXFS__GPIO1_IO11		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm2: tpm2grp {</div><div class='add'>+		fsl,pins = &lt;MX91_PAD_I2C2_SCL__TPM2_CH2			0x57e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_typec: typecgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10	0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_UART1_RXD__LPUART1_RX		0x1000&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_UART1_TXD__LPUART1_TX		0x011e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_UART2_RXD__LPUART2_RX		0x1000&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_UART2_TXD__LPUART2_TX		0x011e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_SAI1_TXD0__LPUART2_RTS_B		0x011e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX91_PAD_SD2_CD_B__GPIO3_IO0		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* enable SION for data and cmd pad due to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_hs: usdhc2hsgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_3 | DSE X5 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_CLK__USDHC2_CLK		0x05be&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_CMD__USDHC2_CMD		0x4000139e&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA0__USDHC2_DATA0		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA1__USDHC2_DATA1		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA2__USDHC2_DATA2		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA3__USDHC2_DATA3		0x4000138e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X3 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_VSELECT__USDHC2_VSELECT	0x010e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* enable SION for data and cmd pad due to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_uhs: usdhc2uhsgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_3 | DSE X6 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_CLK__USDHC2_CLK		0x05fe&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_CMD__USDHC2_CMD		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA0__USDHC2_DATA0		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA1__USDHC2_DATA1		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA2__USDHC2_DATA2		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD2_DATA3__USDHC2_DATA3		0x4000139e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X3 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_VSELECT__USDHC2_VSELECT	0x010e&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi b/arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi<br/>new file mode 100644<br/>index 000000000000..5792952b7a8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91-tqma9131.dtsi</a></div><div class='hunk'>@@ -0,0 +1,295 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Markus Niebel</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx91.dtsi"</div><div class='add'>+</div><div class='add'>+/{</div><div class='add'>+	model = "TQ-Systems i.MX91 TQMa91xxCA / TQMa91xxLA SOM";</div><div class='add'>+	compatible = "tq,imx91-tqma9131", "fsl,imx91";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* our minimum RAM config will be 1024 MiB */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* default CMA, must not exceed assembled memory */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x40000000&gt;;</div><div class='add'>+			size = &lt;0 0x10000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* EdgeLock secure enclave  */</div><div class='add'>+		ele_reserved: ele-reserved@a4120000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0xa4120000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SD2 RST# via PMIC SW_EN */</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		regulator-name = "VSD_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash0: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * no DQS, RXCLKSRC internal loop back, max 66 MHz</div><div class='add'>+		 * clk framework uses CLK_DIVIDER_ROUND_CLOSEST</div><div class='add'>+		 * selected value together with root from</div><div class='add'>+		 * IMX91_CLK_SYS_PLL_PFD1 @ 800.000.000 Hz helps to</div><div class='add'>+		 * respect the maximum value.</div><div class='add'>+		 */</div><div class='add'>+		spi-max-frequency = &lt;62000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	se97_som: temperature-sensor@1b {</div><div class='add'>+		compatible = "nxp,se97b", "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x1b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9451a: pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9451a";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pca9451&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			/* V_0V8_SOC - hw developer guide: 0.75 .. 0.9 */</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_DDRQ - 1.1 V for LPDDR4 */</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_3V3 - EEPROM, RTC, ... */</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_1V8 - SPI NOR, eMMC, RAM VDD1... */</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_1V1 - RAM VDD2*/</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_1V8_BBSM, fix 1.8 */</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_0V8_ANA */</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* V_SD2 - 3.3/1.8V USDHC2 io Voltage */</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcf85063: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85063a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;7000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@53 {</div><div class='add'>+		compatible = "nxp,se97b", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom1: eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* protectable identification memory (part of M24C64-D @57) */</div><div class='add'>+	eeprom@5f {</div><div class='add'>+		compatible = "atmel,24c64d-wl";</div><div class='add'>+		reg = &lt;0x5f&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	accelerometer@6a {</div><div class='add'>+		compatible = "st,ism330dhcx";</div><div class='add'>+		reg = &lt;0x6a&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_flexspi1: flexspi1grp {</div><div class='add'>+		fsl,pins = /* FSEL 3  | DSE X6 */</div><div class='add'>+			   &lt;MX91_PAD_SD3_CMD__FLEXSPI1_A_SS0_B		0x01fe&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD3_CLK__FLEXSPI1_A_SCLK		0x01fe&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL 3  | DSE X6 */</div><div class='add'>+			   &lt;MX91_PAD_SD3_DATA0__FLEXSPI1_A_DATA0	0x13fe&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD3_DATA1__FLEXSPI1_A_DATA1	0x13fe&gt;,</div><div class='add'>+			   /* HYS | FSEL 3  | DSE X6 (external PU) */</div><div class='add'>+			   &lt;MX91_PAD_SD3_DATA2__FLEXSPI1_A_DATA2	0x11fe&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD3_DATA3__FLEXSPI1_A_DATA3	0x11fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = /* SION | OD | FSEL 3 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_I2C1_SCL__LPI2C1_SCL		0x4000199e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_I2C1_SDA__LPI2C1_SDA		0x4000199e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pca9451: pca9451grp {</div><div class='add'>+		fsl,pins = /* HYS | PU */</div><div class='add'>+			   &lt;MX91_PAD_I2C2_SDA__GPIO1_IO3		0x1200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = /* FSEL 2 | DSE X2 */</div><div class='add'>+			   &lt;MX91_PAD_SD2_RESET_B__GPIO3_IO7		0x106&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* enable SION for data and cmd pad due to ERR052021 */</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = /* PD | FSEL 3 | DSE X5 */</div><div class='add'>+			   &lt;MX91_PAD_SD1_CLK__USDHC1_CLK		0x5be&gt;,</div><div class='add'>+			   /* HYS | FSEL 0 | no drive */</div><div class='add'>+			   &lt;MX91_PAD_SD1_STROBE__USDHC1_STROBE		0x1000&gt;,</div><div class='add'>+			   /* HYS | FSEL 3 | X5 */</div><div class='add'>+			   &lt;MX91_PAD_SD1_CMD__USDHC1_CMD		0x400011be&gt;,</div><div class='add'>+			   /* HYS | FSEL 3 | X4 */</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA0__USDHC1_DATA0		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA1__USDHC1_DATA1		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA2__USDHC1_DATA2		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA3__USDHC1_DATA3		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA4__USDHC1_DATA4		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA5__USDHC1_DATA5		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA6__USDHC1_DATA6		0x4000119e&gt;,</div><div class='add'>+			   &lt;MX91_PAD_SD1_DATA7__USDHC1_DATA7		0x4000119e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = /* PU | FSEL 1 | DSE X4 */</div><div class='add'>+			   &lt;MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY		0x31e&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91.dtsi b/arch/arm64/boot/dts/freescale/imx91.dtsi<br/>new file mode 100644<br/>index 000000000000..4d8300b2a7bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91.dtsi</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx91-pinfunc.h"</div><div class='add'>+#include "imx91_93_common.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;clk {</div><div class='add'>+	compatible = "fsl,imx91-ccm";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ddr_pmu {</div><div class='add'>+	compatible = "fsl,imx91-ddr-pmu", "fsl,imx93-ddr-pmu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	clocks = &lt;&amp;clk IMX91_CLK_ENET1_QOS_TSN_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET1_QOS_TSN_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET_TIMER&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET1_QOS_TSN&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET1_QOS_TSN_GATE&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX91_CLK_ENET_TIMER&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX91_CLK_ENET1_QOS_TSN&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	clocks = &lt;&amp;clk IMX91_CLK_ENET2_REGULAR_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET2_REGULAR_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET_TIMER&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX91_CLK_ENET2_REGULAR&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX91_CLK_ENET_TIMER&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX91_CLK_ENET2_REGULAR&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c1 {</div><div class='add'>+	clocks = &lt;&amp;clk IMX93_CLK_BUS_AON&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_I3C1_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c2 {</div><div class='add'>+	clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_I3C2_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	compatible = "fsl,imx91-iomuxc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;media_blk_ctrl {</div><div class='add'>+	compatible = "fsl,imx91-media-blk-ctrl", "syscon";</div><div class='add'>+	clocks = &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_MEDIA_AXI&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_MEDIA_DISP_PIX&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_CAM_PIX&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_LCDIF_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_ISI_GATE&gt;,</div><div class='add'>+		 &lt;&amp;clk IMX93_CLK_MIPI_CSI_GATE&gt;;</div><div class='add'>+	clock-names = "apb", "axi", "nic", "disp", "cam",</div><div class='add'>+		      "lcdif", "isi", "csi";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi<br/>new file mode 100644<br/>index 000000000000..52da571f26c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx91_93_common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1187 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2022,2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/fsl,imx93-power.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx93-pinfunc.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus: cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_pd_wait: cpu-pd-wait {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010033&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;10000&gt;;</div><div class='add'>+				exit-latency-us = &lt;7000&gt;;</div><div class='add'>+				min-residency-us = &lt;27000&gt;;</div><div class='add'>+				wakeup-latency-us = &lt;15000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		A55_0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc_32k: clock-osc-32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "osc_32k";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc_24m: clock-osc-24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "osc_24m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_ext1: clock-ext1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;133000000&gt;;</div><div class='add'>+		clock-output-names = "clk_ext1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@48000000 {</div><div class='add'>+		compatible = "arm,gic-v3";</div><div class='add'>+		reg = &lt;0 0x48000000 0 0x10000&gt;,</div><div class='add'>+		      &lt;0 0x48040000 0 0xc0000&gt;;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs1: mqs1 {</div><div class='add'>+		compatible = "fsl,imx93-mqs";</div><div class='add'>+		gpr = &lt;&amp;aonmix_ns_gpr&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs2: mqs2 {</div><div class='add'>+		compatible = "fsl,imx93-mqs";</div><div class='add'>+		gpr = &lt;&amp;wakeupmix_gpr&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbphynop1: usbphynop1 {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='add'>+		clock-names = "main_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbphynop2: usbphynop2 {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='add'>+		clock-names = "main_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x80000000&gt;,</div><div class='add'>+			 &lt;0x28000000 0x0 0x28000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		aips1: bus@44000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x44000000 0x800000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			edma1: dma-controller@44000000 {</div><div class='add'>+				compatible = "fsl,imx93-edma3";</div><div class='add'>+				reg = &lt;0x44000000 0x200000&gt;;</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;31&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,  //  0: Reserved</div><div class='add'>+					     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,  //  1: CANFD1</div><div class='add'>+					     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,  //  2: Reserved</div><div class='add'>+					     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,  //  3: GPIO1 CH0</div><div class='add'>+					     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,  //  4: GPIO1 CH1</div><div class='add'>+					     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;, //  5: I3C1 TO Bus</div><div class='add'>+					     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;, //  6: I3C1 From Bus</div><div class='add'>+					     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;, //  7: LPI2C1 M TX</div><div class='add'>+					     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;, //  8: LPI2C1 S TX</div><div class='add'>+					     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;, //  9: LPI2C2 M RX</div><div class='add'>+					     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;, // 10: LPI2C2 S RX</div><div class='add'>+					     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;, // 11: LPSPI1 TX</div><div class='add'>+					     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;, // 12: LPSPI1 RX</div><div class='add'>+					     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;, // 13: LPSPI2 TX</div><div class='add'>+					     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;, // 14: LPSPI2 RX</div><div class='add'>+					     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;, // 15: LPTMR1</div><div class='add'>+					     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;, // 16: LPUART1 TX</div><div class='add'>+					     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;, // 17: LPUART1 RX</div><div class='add'>+					     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;, // 18: LPUART2 TX</div><div class='add'>+					     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;, // 19: LPUART2 RX</div><div class='add'>+					     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;, // 20: S400</div><div class='add'>+					     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;, // 21: SAI TX</div><div class='add'>+					     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;, // 22: SAI RX</div><div class='add'>+					     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;, // 23: TPM1 CH0/CH2</div><div class='add'>+					     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;, // 24: TPM1 CH1/CH3</div><div class='add'>+					     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;, // 25: TPM1 Overflow</div><div class='add'>+					     &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;, // 26: TMP2 CH0/CH2</div><div class='add'>+					     &lt;GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH&gt;, // 27: TMP2 CH1/CH3</div><div class='add'>+					     &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;, // 28: TMP2 Overflow</div><div class='add'>+					     &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;, // 29: PDM</div><div class='add'>+					     &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;, // 30: ADC1</div><div class='add'>+					     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;  // err</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_EDMA1_GATE&gt;;</div><div class='add'>+				clock-names = "dma";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			aonmix_ns_gpr: syscon@44210000 {</div><div class='add'>+				compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";</div><div class='add'>+				reg = &lt;0x44210000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			system_counter: timer@44290000 {</div><div class='add'>+				compatible = "nxp,sysctr-timer";</div><div class='add'>+				reg = &lt;0x44290000 0x30000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc_24m&gt;;</div><div class='add'>+				clock-names = "per";</div><div class='add'>+				nxp,no-divider;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdog1: watchdog@442d0000 {</div><div class='add'>+				compatible = "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x442d0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_WDOG1_GATE&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdog2: watchdog@442e0000 {</div><div class='add'>+				compatible = "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x442e0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_WDOG2_GATE&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm1: pwm@44310000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x44310000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM1_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm2: pwm@44320000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x44320000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM2_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i3c1: i3c@44330000 {</div><div class='add'>+				compatible = "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x44330000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_AON&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_I3C1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_I3C1_SLOW&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c1: i2c@44340000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x44340000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 7 0 0&gt;, &lt;&amp;edma1 8 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c2: i2c@44350000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x44350000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C2_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 9 0 0&gt;, &lt;&amp;edma1 10 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi1: spi@44360000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x44360000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 11 0 0&gt;, &lt;&amp;edma1 12 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi2: spi@44370000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x44370000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI2_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 13 0 0&gt;, &lt;&amp;edma1 14 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart1: serial@44380000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x44380000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART1_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 17 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 16 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart2: serial@44390000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x44390000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART2_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 19 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 18 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan1: can@443a0000 {</div><div class='add'>+				compatible = "fsl,imx93-flexcan";</div><div class='add'>+				reg = &lt;0x443a0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_AON&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_CAN1_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_CAN1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				fsl,stop-mode = &lt;&amp;aonmix_ns_gpr 0x14 0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai1: sai@443b0000 {</div><div class='add'>+				compatible = "fsl,imx93-sai";</div><div class='add'>+				reg = &lt;0x443b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_SAI1_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_SAI1_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma1 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 21 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			iomuxc: pinctrl@443c0000 {</div><div class='add'>+				compatible = "fsl,imx93-iomuxc";</div><div class='add'>+				reg = &lt;0x443c0000 0x10000&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bbnsm: bbnsm@44440000 {</div><div class='add'>+				compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";</div><div class='add'>+				reg = &lt;0x44440000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+				bbnsm_rtc: rtc {</div><div class='add'>+					compatible = "nxp,imx93-bbnsm-rtc";</div><div class='add'>+					interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				bbnsm_pwrkey: pwrkey {</div><div class='add'>+					compatible = "nxp,imx93-bbnsm-pwrkey";</div><div class='add'>+					interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clk: clock-controller@44450000 {</div><div class='add'>+				compatible = "fsl,imx93-ccm";</div><div class='add'>+				reg = &lt;0x44450000 0x10000&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;osc_24m&gt;, &lt;&amp;clk_ext1&gt;;</div><div class='add'>+				clock-names = "osc_32k", "osc_24m", "clk_ext1";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;393216000&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			src: system-controller@44460000 {</div><div class='add'>+				compatible = "fsl,imx93-src", "syscon";</div><div class='add'>+				reg = &lt;0x44460000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				mediamix: power-domain@44462400 {</div><div class='add'>+					compatible = "fsl,imx93-src-slice";</div><div class='add'>+					reg = &lt;0x44462400 0x400&gt;, &lt;0x44465800 0x400&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='add'>+						 &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			clock-controller@44480000 {</div><div class='add'>+				compatible = "fsl,imx93-anatop";</div><div class='add'>+				reg = &lt;0x44480000 0x2000&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			micfil: micfil@44520000 {</div><div class='add'>+				compatible = "fsl,imx93-micfil";</div><div class='add'>+				reg = &lt;0x44520000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_PDM_IPG&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_PDM_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+				clock-names = "ipg_clk", "ipg_clk_app", "pll8k";</div><div class='add'>+				dmas = &lt;&amp;edma1 29 0 5&gt;;</div><div class='add'>+				dma-names = "rx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc1: adc@44530000 {</div><div class='add'>+				compatible = "nxp,imx93-adc";</div><div class='add'>+				reg = &lt;0x44530000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_ADC1_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips2: bus@42000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x42000000 0x800000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			edma2: dma-controller@42000000 {</div><div class='add'>+				compatible = "fsl,imx93-edma4";</div><div class='add'>+				reg = &lt;0x42000000 0x210000&gt;;</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;64&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_EDMA2_GATE&gt;;</div><div class='add'>+				clock-names = "dma";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wakeupmix_gpr: syscon@42420000 {</div><div class='add'>+				compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";</div><div class='add'>+				reg = &lt;0x42420000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdog3: watchdog@42490000 {</div><div class='add'>+				compatible = "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x42490000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_WDOG3_GATE&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdog4: watchdog@424a0000 {</div><div class='add'>+				compatible = "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x424a0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_WDOG4_GATE&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdog5: watchdog@424b0000 {</div><div class='add'>+				compatible = "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x424b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_WDOG5_GATE&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm3: pwm@424e0000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x424e0000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM3_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm4: pwm@424f0000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x424f0000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM4_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm5: pwm@42500000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x42500000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM5_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm6: pwm@42510000 {</div><div class='add'>+				compatible = "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x42510000 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_TPM6_GATE&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i3c2: i3c@42520000 {</div><div class='add'>+				compatible = "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x42520000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_I3C2_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_I3C2_SLOW&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c3: i2c@42530000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x42530000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C3_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 8 0 0&gt;, &lt;&amp;edma2 9 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c4: i2c@42540000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x42540000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C4_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 10 0 0&gt;, &lt;&amp;edma2 11 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi3: spi@42550000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42550000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI3_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 12 0 0&gt;, &lt;&amp;edma2 13 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi4: spi@42560000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42560000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI4_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 14 0 0&gt;, &lt;&amp;edma2 15 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart3: serial@42570000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42570000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART3_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 18 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 17 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart4: serial@42580000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42580000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART4_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 20 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 19 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart5: serial@42590000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42590000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART5_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 21 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart6: serial@425a0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x425a0000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART6_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 24 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 23 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan2: can@425b0000 {</div><div class='add'>+				compatible = "fsl,imx93-flexcan";</div><div class='add'>+				reg = &lt;0x425b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_CAN2_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_CAN2&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				fsl,stop-mode = &lt;&amp;wakeupmix_gpr 0x0c 2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexspi1: spi@425e0000 {</div><div class='add'>+				compatible = "nxp,imx8mm-fspi";</div><div class='add'>+				reg = &lt;0x425e0000 0x10000&gt;, &lt;0x28000000 0x10000000&gt;;</div><div class='add'>+				reg-names = "fspi_base", "fspi_mmap";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_FLEXSPI1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_FLEXSPI1_GATE&gt;;</div><div class='add'>+				clock-names = "fspi_en", "fspi";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_FLEXSPI1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai2: sai@42650000 {</div><div class='add'>+				compatible = "fsl,imx93-sai";</div><div class='add'>+				reg = &lt;0x42650000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_SAI2_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_SAI2_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 59 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 58 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai3: sai@42660000 {</div><div class='add'>+				compatible = "fsl,imx93-sai";</div><div class='add'>+				reg = &lt;0x42660000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_SAI3_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 61 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 60 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			xcvr: xcvr@42680000 {</div><div class='add'>+				compatible = "fsl,imx93-xcvr";</div><div class='add'>+				reg = &lt;0x42680000 0x800&gt;,</div><div class='add'>+				      &lt;0x42680800 0x400&gt;,</div><div class='add'>+				      &lt;0x42680c00 0x080&gt;,</div><div class='add'>+				      &lt;0x42680e00 0x080&gt;;</div><div class='add'>+				reg-names = "ram", "regs", "rxfifo", "txfifo";</div><div class='add'>+				interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_SPDIF_IPG&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_SPDIF_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_AUD_XCVR_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "phy", "spba", "pll_ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 65 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 66 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart7: serial@42690000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42690000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART7_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 88 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 87 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart8: serial@426a0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x426a0000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPUART8_GATE&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 90 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 89 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c5: i2c@426b0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426b0000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C5_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 71 0 0&gt;, &lt;&amp;edma2 72 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c6: i2c@426c0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426c0000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C6_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 73 0 0&gt;, &lt;&amp;edma2 74 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c7: i2c@426d0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426d0000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C7_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 75 0 0&gt;, &lt;&amp;edma2 76 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c8: i2c@426e0000 {</div><div class='add'>+				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426e0000 0x10000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPI2C8_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 77 0 0&gt;, &lt;&amp;edma2 78 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi5: spi@426f0000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x426f0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI5_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 79 0 0&gt;, &lt;&amp;edma2 80 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi6: spi@42700000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42700000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI6_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 81 0 0&gt;, &lt;&amp;edma2 82 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi7: spi@42710000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42710000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI7_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 83 0 0&gt;, &lt;&amp;edma2 84 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi8: spi@42720000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42720000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_LPSPI8_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 85 0 0&gt;, &lt;&amp;edma2 86 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips3: bus@42800000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x42800000 0x800000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			usdhc1: mmc@42850000 {</div><div class='add'>+				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x42850000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_USDHC1_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc2: mmc@42860000 {</div><div class='add'>+				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x42860000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_USDHC2_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC2&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			fec: ethernet@42890000 {</div><div class='add'>+				compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";</div><div class='add'>+				reg = &lt;0x42890000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_ENET1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET1_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_TIMER1&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_REF&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "ptp",</div><div class='add'>+					      "enet_clk_ref", "enet_out";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_ENET_TIMER1&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX93_CLK_ENET_REF&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='add'>+							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;,</div><div class='add'>+							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;, &lt;50000000&gt;;</div><div class='add'>+				fsl,num-tx-queues = &lt;3&gt;;</div><div class='add'>+				fsl,num-rx-queues = &lt;3&gt;;</div><div class='add'>+				fsl,stop-mode = &lt;&amp;wakeupmix_gpr 0x0c 1&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;eth_mac1&gt;;</div><div class='add'>+				nvmem-cell-names = "mac-address";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eqos: ethernet@428a0000 {</div><div class='add'>+				compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";</div><div class='add'>+				reg = &lt;0x428a0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_TIMER2&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;;</div><div class='add'>+				clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_ENET_TIMER2&gt;,</div><div class='add'>+						  &lt;&amp;clk IMX93_CLK_ENET&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='add'>+							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;;</div><div class='add'>+				intf_mode = &lt;&amp;wakeupmix_gpr 0x28&gt;;</div><div class='add'>+				snps,clk-csr = &lt;6&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;eth_mac2&gt;;</div><div class='add'>+				nvmem-cell-names = "mac-address";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc3: mmc@428b0000 {</div><div class='add'>+				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x428b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='add'>+					 &lt;&amp;clk IMX93_CLK_USDHC3_GATE&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC3&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@43810000 {</div><div class='add'>+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x43810000 0x1000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_GPIO2_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_GPIO2_GATE&gt;;</div><div class='add'>+			clock-names = "gpio", "port";</div><div class='add'>+			gpio-ranges = &lt;&amp;iomuxc 0 4 30&gt;;</div><div class='add'>+			ngpios = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@43820000 {</div><div class='add'>+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x43820000 0x1000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_GPIO3_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_GPIO3_GATE&gt;;</div><div class='add'>+			clock-names = "gpio", "port";</div><div class='add'>+			gpio-ranges = &lt;&amp;iomuxc 0 84 8&gt;, &lt;&amp;iomuxc 8 66 18&gt;,</div><div class='add'>+				      &lt;&amp;iomuxc 26 34 2&gt;, &lt;&amp;iomuxc 28 0 4&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@43830000 {</div><div class='add'>+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x43830000 0x1000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_GPIO4_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_GPIO4_GATE&gt;;</div><div class='add'>+			clock-names = "gpio", "port";</div><div class='add'>+			gpio-ranges = &lt;&amp;iomuxc 0 38 28&gt;, &lt;&amp;iomuxc 28 36 2&gt;;</div><div class='add'>+			ngpios = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@47400000 {</div><div class='add'>+			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x47400000 0x1000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_GPIO1_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_GPIO1_GATE&gt;;</div><div class='add'>+			clock-names = "gpio", "port";</div><div class='add'>+			gpio-ranges = &lt;&amp;iomuxc 0 92 16&gt;;</div><div class='add'>+			ngpios = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ocotp: efuse@47510000 {</div><div class='add'>+			compatible = "fsl,imx93-ocotp", "syscon";</div><div class='add'>+			reg = &lt;0x47510000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth_mac1: mac-address@4ec {</div><div class='add'>+				reg = &lt;0x4ec 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eth_mac2: mac-address@4f2 {</div><div class='add'>+				reg = &lt;0x4f2 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		s4muap: mailbox@47520000 {</div><div class='add'>+			compatible = "fsl,imx93-mu-s4";</div><div class='add'>+			reg = &lt;0x47520000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tx", "rx";</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		media_blk_ctrl: system-controller@4ac10000 {</div><div class='add'>+			compatible = "fsl,imx93-media-blk-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4ac10000 0x10000&gt;;</div><div class='add'>+			power-domains = &lt;&amp;mediamix&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_MEDIA_AXI&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_MEDIA_DISP_PIX&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_CAM_PIX&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_PXP_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_LCDIF_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_ISI_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_MIPI_CSI_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_MIPI_DSI_GATE&gt;;</div><div class='add'>+			clock-names = "apb", "axi", "nic", "disp", "cam",</div><div class='add'>+				      "pxp", "lcdif", "isi", "csi", "dsi";</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbotg1: usb@4c100000 {</div><div class='add'>+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='add'>+			reg = &lt;0x4c100000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='add'>+			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;133000000&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphynop1&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc1 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbmisc1: usbmisc@4c100200 {</div><div class='add'>+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+				     "fsl,imx6q-usbmisc";</div><div class='add'>+			reg = &lt;0x4c100200 0x200&gt;;</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbotg2: usb@4c200000 {</div><div class='add'>+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='add'>+			reg = &lt;0x4c200000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='add'>+			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='add'>+			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;133000000&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphynop2&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc2 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbmisc2: usbmisc@4c200200 {</div><div class='add'>+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+				     "fsl,imx6q-usbmisc";</div><div class='add'>+			reg = &lt;0x4c200200 0x200&gt;;</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		memory-controller@4e300000 {</div><div class='add'>+			compatible = "nxp,imx9-memory-controller";</div><div class='add'>+			reg = &lt;0x4e300000 0x800&gt;, &lt;0x4e301000 0x1000&gt;;</div><div class='add'>+			reg-names = "ctrl", "inject";</div><div class='add'>+			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			little-endian;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddr_pmu: ddr-pmu@4e300dc0 {</div><div class='add'>+			compatible = "fsl,imx93-ddr-pmu";</div><div class='add'>+			reg = &lt;0x4e300dc0 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts<br/>index 8d036b3962e9..b94a24193e19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts</a></div><div class='hunk'>@@ -12,6 +12,25 @@</div><div class='ctx'> 	model = "NXP i.MX93 11X11 EVK board";</div><div class='ctx'> 	compatible = "fsl,imx93-11x11-evk", "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -78,6 +97,32 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_pwr: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;adp5585 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can2_standby: regulator-can2-standby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "can2-stby";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;adp5585 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_m2_pwr: regulator-m2-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "M.2-power";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -90,6 +135,28 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_usdhc3_vmmc: regulator-usdhc3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "WLAN_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * IW612 wifi chip needs more delay than other wifi chips to complete</div><div class='add'>+		 * the host interface initialization after power up, otherwise the</div><div class='add'>+		 * internal state of IW612 may be unstable, resulting in the failure of</div><div class='add'>+		 * the SDIO3.0 switch voltage.</div><div class='add'>+		 */</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_pwrseq: usdhc3_pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;pcal6524 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight_lvds: backlight-lvds {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;adp5585 0 100000 0&gt;;</div><div class='hunk'>@@ -139,6 +206,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		hp-det-gpio = &lt;&amp;pcal6524 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Ext Spk", "SPKOUTL",</div><div class='add'>+			"Ext Spk", "SPKOUTR",</div><div class='add'>+			"AMIC", "MICBIAS",</div><div class='add'>+			"IN3R", "AMIC",</div><div class='add'>+			"IN1R", "AMIC";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-xcvr {</div><div class='ctx'> 		compatible = "fsl,imx-audio-card";</div><div class='ctx'> 		model = "imx-audio-xcvr";</div><div class='hunk'>@@ -184,10 +267,10 @@</div><div class='ctx'> </div><div class='ctx'> 		ethphy1: ethernet-phy@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			eee-broken-1000t;</div><div class='ctx'> 			reset-gpios = &lt;&amp;pcal6524 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;10000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+			realtek,clkout-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -208,20 +291,49 @@</div><div class='ctx'> </div><div class='ctx'> 		ethphy2: ethernet-phy@2 {</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			eee-broken-1000t;</div><div class='ctx'> 			reset-gpios = &lt;&amp;pcal6524 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;10000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+			realtek,clkout-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can2_standby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpi2c1 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	wm8962: codec@1a {</div><div class='add'>+		compatible = "wlf,wm8962";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		PLLVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		gpio-cfg = &lt;</div><div class='add'>+			0x0000 /* 0:Default */</div><div class='add'>+			0x0000 /* 1:Default */</div><div class='add'>+			0x0000 /* 2:FN_DMICCLK */</div><div class='add'>+			0x0000 /* 3:Default */</div><div class='add'>+			0x0000 /* 4:FN_DMICCDAT */</div><div class='add'>+			0x0000 /* 5:Default */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	inertial-meter@6a {</div><div class='ctx'> 		compatible = "st,lsm6dso";</div><div class='ctx'> 		reg = &lt;0x6a&gt;;</div><div class='hunk'>@@ -230,9 +342,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;lpi2c2 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pcal6524: gpio@22 {</div><div class='hunk'>@@ -273,7 +384,7 @@</div><div class='ctx'> 				regulator-ramp-delay = &lt;3125&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			buck4: BUCK4{</div><div class='add'>+			buck4: BUCK4 {</div><div class='ctx'> 				regulator-name = "BUCK4";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='hunk'>@@ -281,7 +392,7 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			buck5: BUCK5{</div><div class='add'>+			buck5: BUCK5 {</div><div class='ctx'> 				regulator-name = "BUCK5";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='hunk'>@@ -340,6 +451,14 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	adp5585_isp: io-expander@34 {</div><div class='add'>+		compatible = "adi,adp5585-01", "adi,adp5585";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ptn5110: tcpc@50 {</div><div class='ctx'> 		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -424,6 +543,10 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;micfil {</div><div class='hunk'>@@ -455,6 +578,17 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sai3 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_sai3_sleep&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX93_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbotg1 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	hnp-disable;</div><div class='hunk'>@@ -514,7 +648,25 @@</div><div class='ctx'> 	no-mmc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc3_sleep&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc3_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdog3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -539,13 +691,13 @@</div><div class='ctx'> 			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x57e</div><div class='del'>-			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x5fe</div><div class='add'>+			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x58e</div><div class='ctx'> 			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x57e</div><div class='del'>-			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x5fe</div><div class='add'>+			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e</div><div class='ctx'> 			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x57e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -577,24 +729,17 @@</div><div class='ctx'> 			MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1		0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2		0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3		0x57e</div><div class='del'>-			MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC		0x5fe</div><div class='add'>+			MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC		0x58e</div><div class='ctx'> 			MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL	0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0		0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1		0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2		0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3		0x57e</div><div class='del'>-			MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC		0x5fe</div><div class='add'>+			MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC		0x58e</div><div class='ctx'> 			MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL	0x57e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_lpi2c3: lpi2c3grp {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_GPIO_IO28__LPI2C3_SDA			0x40000b9e</div><div class='del'>-			MX93_PAD_GPIO_IO29__LPI2C3_SCL			0x40000b9e</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pinctrl_fec_sleep: fecsleepgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_ENET2_MDC__GPIO4_IO14			0x51e</div><div class='hunk'>@@ -614,6 +759,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO25__CAN2_TX	0x139e</div><div class='add'>+			MX93_PAD_GPIO_IO27__CAN2_RX	0x139e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_UART1_RXD__LPUART1_RX			0x31e</div><div class='hunk'>@@ -748,6 +900,26 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO26__SAI3_TX_SYNC                0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO16__SAI3_TX_BCLK                0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO17__SAI3_MCLK           0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO19__SAI3_TX_DATA00              0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO20__SAI3_RX_DATA00              0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3_sleep: sai3sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO26__GPIO2_IO26			0x51e</div><div class='add'>+			MX93_PAD_GPIO_IO16__GPIO2_IO16			0x51e</div><div class='add'>+			MX93_PAD_GPIO_IO17__GPIO2_IO17			0x51e</div><div class='add'>+			MX93_PAD_GPIO_IO19__GPIO2_IO19			0x51e</div><div class='add'>+			MX93_PAD_GPIO_IO20__GPIO2_IO20			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_spdif: spdifgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_GPIO_IO22__SPDIF_IN		0x31e</div><div class='hunk'>@@ -825,4 +997,62 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x1582</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x40001382</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x4000138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x15fe</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x400013fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3grpsleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__GPIO3_IO20		0x31e</div><div class='add'>+			MX93_PAD_SD3_CMD__GPIO3_IO21		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA0__GPIO3_IO22		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA1__GPIO3_IO23		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA2__GPIO3_IO24		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA3__GPIO3_IO25		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_wlan: usdhc3wlangrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_CCM_CLKO1__GPIO3_IO26		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts<br/>index 236a44c1782a..f9eebd27d640 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts</a></div><div class='hunk'>@@ -12,6 +12,21 @@</div><div class='ctx'> 	model = "NXP i.MX93 14X14 EVK board";</div><div class='ctx'> 	compatible = "fsl,imx93-14x14-evk", "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -99,6 +114,15 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_m2_pwr: regulator-m2-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "M.2-power";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -111,6 +135,23 @@</div><div class='ctx'> 		off-on-delay-us = &lt;12000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_usdhc3_vmmc: regulator-usdhc3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "WLAN_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * IW612 wifi chip needs more delay than other wifi chips to complete</div><div class='add'>+		 * the host interface initialization after power up, otherwise the</div><div class='add'>+		 * internal state of IW612 may be unstable, resulting in the failure of</div><div class='add'>+		 * the SDIO3.0 switch voltage.</div><div class='add'>+		 */</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_vdd_12v: regulator-vdd-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "reg_vdd_12v";</div><div class='hunk'>@@ -126,6 +167,11 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usdhc3_pwrseq: usdhc3_pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;pcal6524 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;adc1 {</div><div class='hunk'>@@ -219,6 +265,89 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='ctx'> 		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9452";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "BUCK1";</div><div class='add'>+				regulator-min-microvolt = &lt;610000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "BUCK2";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;670000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-name = "BUCK4";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-name = "BUCK5";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "BUCK6";</div><div class='add'>+				regulator-min-microvolt = &lt;1060000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1140000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "LDO1";</div><div class='add'>+				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: LDO3 {</div><div class='add'>+				regulator-name = "LDO3";</div><div class='add'>+				regulator-min-microvolt = &lt;1710000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1890000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "LDO4";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;840000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "LDO5";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpi2c3 {</div><div class='hunk'>@@ -283,7 +412,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc3_sleep&gt;, &lt;&amp;pinctrl_usdhc3_wlan&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc3_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdog3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -465,4 +612,63 @@</div><div class='ctx'> 			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x1582</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x40001382</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x4000138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x15fe</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x400013fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3grpsleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__GPIO3_IO20		0x31e</div><div class='add'>+			MX93_PAD_SD3_CMD__GPIO3_IO21		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA0__GPIO3_IO22		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA1__GPIO3_IO23		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA2__GPIO3_IO24		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA3__GPIO3_IO25		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_wlan: usdhc3wlangrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_CCM_CLKO1__GPIO3_IO26	  0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso<br/>new file mode 100644<br/>index 000000000000..3fe6209a3423<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-9x9-qsb-i3c.dtso</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/i3c/i3c.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx93-pinfunc.h"</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i3c1&gt;;</div><div class='add'>+	#address-cells = &lt;3&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	i2c-scl-hz = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tcpc@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50 0x00 (I2C_FM | I2C_NO_FILTER_LOW_FREQUENCY)&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec1_dr_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1_drd_sw {</div><div class='add'>+	remote-endpoint = &lt;&amp;typec1_dr_sw&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_i3c1: i3c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_I2C1_SCL__I3C1_SCL	0x40000186</div><div class='add'>+			MX93_PAD_I2C1_SDA__I3C1_SDA	0x40000186</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts<br/>index f8a73612fa05..0852067eab2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts</a></div><div class='hunk'>@@ -12,6 +12,29 @@</div><div class='ctx'> 	model = "NXP i.MX93 9x9 Quick Start Board";</div><div class='ctx'> 	compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	bt_sco_codec: bt-sco-codec {</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "linux,bt-sco";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -68,6 +91,24 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_audio_pwr: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "audio-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_m2_pwr: regulator-m2-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "M.2-power";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_rpi_3v3: regulator-rpi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDD_RPI_3V3";</div><div class='hunk'>@@ -88,6 +129,77 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		off-on-delay-us = &lt;12000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc3_vmmc: regulator-usdhc3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "WLAN_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * IW612 wifi chip needs more delay than other wifi chips to complete</div><div class='add'>+		 * the host interface initialization after power up, otherwise the</div><div class='add'>+		 * internal state of IW612 may be unstable, resulting in the failure of</div><div class='add'>+		 * the SDIO3.0 switch voltage.</div><div class='add'>+		 */</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-bt-sco {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "bt-sco-audio";</div><div class='add'>+		simple-audio-card,format = "dsp_a";</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+</div><div class='add'>+		btcpu: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+			dai-tdm-slot-num = &lt;2&gt;;</div><div class='add'>+			dai-tdm-slot-width = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;bt_sco_codec 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-micfil {</div><div class='add'>+		compatible = "fsl,imx-audio-card";</div><div class='add'>+		model = "micfil-audio";</div><div class='add'>+</div><div class='add'>+		pri-dai-link {</div><div class='add'>+			link-name = "micfil hifi";</div><div class='add'>+			format = "i2s";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;micfil&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		hp-det-gpio = &lt;&amp;pcal6524 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Ext Spk", "SPKOUTL",</div><div class='add'>+			"Ext Spk", "SPKOUTR",</div><div class='add'>+			"AMIC", "MICBIAS",</div><div class='add'>+			"IN3R", "AMIC",</div><div class='add'>+			"IN1R", "AMIC";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_pwrseq: usdhc3_pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;pcal6524 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;adc1 {</div><div class='hunk'>@@ -121,7 +233,6 @@</div><div class='ctx'> 		ethphy1: ethernet-phy@1 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			eee-broken-1000t;</div><div class='ctx'> 			reset-gpios = &lt;&amp;pcal6524 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;10000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;80000&gt;;</div><div class='hunk'>@@ -136,6 +247,33 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	wm8962: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8962";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		PLLVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		gpio-cfg = &lt;</div><div class='add'>+			0x0000 /* 0:Default */</div><div class='add'>+			0x0000 /* 1:Default */</div><div class='add'>+			0x0000 /* 2:FN_DMICCLK */</div><div class='add'>+			0x0000 /* 3:Default */</div><div class='add'>+			0x0000 /* 4:FN_DMICCDAT */</div><div class='add'>+			0x0000 /* 5:Default */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	p3t1085: temperature-sensor@48 {</div><div class='add'>+		compatible = "nxp,p3t1085";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ptn5110: tcpc@50 {</div><div class='ctx'> 		compatible = "nxp,ptn5110", "tcpci";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='hunk'>@@ -175,6 +313,11 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pcal6524&gt;;</div><div class='ctx'> 		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	inertial-meter@6a {</div><div class='add'>+		compatible = "st,lsm6dso";</div><div class='add'>+		reg = &lt;0x6a&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpi2c2 {</div><div class='hunk'>@@ -194,6 +337,18 @@</div><div class='ctx'> 		interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pinctrl_pcal6524&gt;;</div><div class='add'>+</div><div class='add'>+		exp-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mic-can-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmic@25 {</div><div class='hunk'>@@ -221,7 +376,7 @@</div><div class='ctx'> 				regulator-ramp-delay = &lt;3125&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			buck4: BUCK4{</div><div class='add'>+			buck4: BUCK4 {</div><div class='ctx'> 				regulator-name = "BUCK4";</div><div class='ctx'> 				regulator-min-microvolt = &lt;600000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='hunk'>@@ -229,7 +384,7 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			buck5: BUCK5{</div><div class='add'>+			buck5: BUCK5 {</div><div class='ctx'> 				regulator-name = "BUCK5";</div><div class='ctx'> 				regulator-min-microvolt = &lt;600000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3400000&gt;;</div><div class='hunk'>@@ -278,6 +433,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	/* BT */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;micfil {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pdm&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX93_CLK_PDM&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;49152000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mu1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -286,6 +461,27 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sai1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX93_CLK_SAI1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX93_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	fsl,sai-synchronous-rx;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbotg1 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	hnp-disable;</div><div class='hunk'>@@ -326,7 +522,24 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc3_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdog3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -370,6 +583,14 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pdm: pdmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_PDM_CLK__PDM_CLK			0x31e</div><div class='add'>+			MX93_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM00	0x31e</div><div class='add'>+			MX93_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM01	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_uart1: uart1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e</div><div class='hunk'>@@ -443,6 +664,25 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SAI1_TXC__SAI1_TX_BCLK			0x31e</div><div class='add'>+			MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC		0x31e</div><div class='add'>+			MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00		0x31e</div><div class='add'>+			MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO12__SAI3_RX_SYNC		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO18__SAI3_RX_BCLK		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO17__SAI3_MCLK			0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO19__SAI3_TX_DATA00		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO20__SAI3_RX_DATA00		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e</div><div class='hunk'>@@ -487,4 +727,46 @@</div><div class='ctx'> 			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x1582</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x40001382</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x40001382</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x4000138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD3_CLK__USDHC3_CLK		0x15fe</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD		0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x400013fe</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x400013fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts<br/>index 89e97c604bd3..4620c070f4d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-kontron-bl-osm-s.dts</a></div><div class='hunk'>@@ -14,6 +14,27 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;fec;</div><div class='ctx'> 		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='add'>+		serial6 = &amp;lpuart7;</div><div class='add'>+		spi0 = &amp;lpspi1;</div><div class='add'>+		spi1 = &amp;lpspi2;</div><div class='add'>+		spi2 = &amp;lpspi3;</div><div class='add'>+		spi3 = &amp;lpspi4;</div><div class='add'>+		spi4 = &amp;lpspi5;</div><div class='add'>+		spi5 = &amp;lpspi6;</div><div class='add'>+		spi6 = &amp;lpspi7;</div><div class='add'>+		spi7 = &amp;lpspi8;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -33,7 +54,9 @@</div><div class='ctx'> </div><div class='ctx'> 	reg_vcc_panel: regulator-vcc-panel {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_vcc_panel&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -135,6 +158,16 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbotg1 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	disable-over-current;</div><div class='hunk'>@@ -147,17 +180,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usbotg2 {</div><div class='del'>-	adp-disable;</div><div class='del'>-	hnp-disable;</div><div class='del'>-	srp-disable;</div><div class='del'>-	disable-over-current;</div><div class='del'>-	dr_mode = "otg";</div><div class='del'>-	usb-role-switch;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;usdhc2 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_reg_vcc_panel: regvccpanelgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO21__GPIO2_IO21		0x31e /* PWM_2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi<br/>index 47c1363a2f99..c79b1df339db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-kontron-osm-s.dtsi</a></div><div class='hunk'>@@ -189,6 +189,7 @@</div><div class='ctx'> 				regulator-name = "NVCC_SD (LDO5)";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				nxp,sd-vsel-fixed-low;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -204,6 +205,9 @@</div><div class='ctx'> 	rv3028: rtc@52 {</div><div class='ctx'> 		compatible = "microcrystal,rv3028";</div><div class='ctx'> 		reg = &lt;0x52&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -282,6 +286,7 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vcc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_nvcc_sd&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -466,6 +471,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_VSELECT__GPIO3_IO19		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_sai3: sai3grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_GPIO_IO20__SAI3_RX_DATA00		0x31e /* I2S_A_DATA_IN */</div><div class='hunk'>@@ -553,7 +564,6 @@</div><div class='ctx'> 			MX93_PAD_SD2_DATA1__USDHC2_DATA1		0x40001382 /* SDIO_A_D1 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA2__USDHC2_DATA2		0x40001382 /* SDIO_A_D2 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA3__USDHC2_DATA3		0x40001382 /* SDIO_A_D3 */</div><div class='del'>-			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT		0x1d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -565,7 +575,6 @@</div><div class='ctx'> 			MX93_PAD_SD2_DATA1__USDHC2_DATA1		0x4000138e /* SDIO_A_D1 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA2__USDHC2_DATA2		0x4000138e /* SDIO_A_D2 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA3__USDHC2_DATA3		0x4000138e /* SDIO_A_D3 */</div><div class='del'>-			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT		0x1d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -577,7 +586,6 @@</div><div class='ctx'> 			MX93_PAD_SD2_DATA1__USDHC2_DATA1		0x400013fe /* SDIO_A_D1 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA2__USDHC2_DATA2		0x400013fe /* SDIO_A_D2 */</div><div class='ctx'> 			MX93_PAD_SD2_DATA3__USDHC2_DATA3		0x400013fe /* SDIO_A_D3 */</div><div class='del'>-			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT		0x1d0</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso<br/>new file mode 100644<br/>index 000000000000..7381b87444e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Primoz Fiser &lt;primoz.fiser@norik.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx93-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	usdhc3_pwrseq: usdhc3-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * NOTE: When uSDHC3 port is multiplexed on GPIO_IO[27:22] pads, it only</div><div class='add'>+ * supports 50 MHz mode, due to introduction of potential variations in</div><div class='add'>+ * trace impedance, drive strength, and timing skew. Refer to i.MX 93</div><div class='add'>+ * Application Processors Data Sheet, Rev. 3, page 60 for more details.</div><div class='add'>+ */</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;, &lt;&amp;pinctrl_wlbt&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_sleep&gt;, &lt;&amp;pinctrl_wlbt&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX	0x31e</div><div class='add'>+			MX93_PAD_DAP_TDI__LPUART5_RX		0x31e</div><div class='add'>+			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B	0x31e</div><div class='add'>+			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO22__USDHC3_CLK		0x179e</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD 		0x4000178e</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x4000138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO22__USDHC3_CLK		0x31e</div><div class='add'>+			MX93_PAD_SD3_CMD__USDHC3_CMD 		0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA0__USDHC3_DATA0	0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA1__USDHC3_DATA1	0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA2__USDHC3_DATA2	0x31e</div><div class='add'>+			MX93_PAD_SD3_DATA3__USDHC3_DATA3	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wlbt: wlbtgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_CCM_CLKO2__GPIO3_IO27		0x31e	/* WAKE_DEV */</div><div class='add'>+			MX93_PAD_CCM_CLKO3__GPIO4_IO28		0x31e	/* WAKE_HOST */</div><div class='add'>+			MX93_PAD_CCM_CLKO4__GPIO4_IO29		0x31e	/* PDn */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts<br/>new file mode 100644<br/>index 000000000000..5599e296919f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts</a></div><div class='hunk'>@@ -0,0 +1,343 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Primoz Fiser &lt;primoz.fiser@norik.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Product homepage:</div><div class='add'>+ * https://www.phytec.eu/en/produkte/development-kits/phyboard-nash/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "imx93-phycore-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "PHYTEC phyBOARD-Nash-i.MX93";</div><div class='add'>+	compatible = "phytec,imx93-phyboard-nash", "phytec,imx93-phycore-som",</div><div class='add'>+		     "fsl,imx93";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;i2c_rtc;</div><div class='add'>+		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='add'>+		serial6 = &amp;lpuart7;</div><div class='add'>+		spi0 = &amp;lpspi1;</div><div class='add'>+		spi1 = &amp;lpspi2;</div><div class='add'>+		spi2 = &amp;lpspi3;</div><div class='add'>+		spi3 = &amp;lpspi4;</div><div class='add'>+		spi4 = &amp;lpspi5;</div><div class='add'>+		spi5 = &amp;lpspi6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	curr_sens: current-sense {</div><div class='add'>+		compatible = "current-sense-amplifier";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;adc1 1&gt;;</div><div class='add'>+		sense-gain-div = &lt;2&gt;;</div><div class='add'>+		sense-gain-mult = &lt;50&gt;;</div><div class='add'>+		sense-resistor-micro-ohms = &lt;35000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexcan1_tc: can-phy0 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan1_tc&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;gpio4 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;curr_sens 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		regulator-name = "VCC_SD";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC1V8";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ADC */</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ethernet */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	ethphy2: ethernet-phy@2 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_75_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	phys = &lt;&amp;flexcan1_tc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C2 */</div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* RTC */</div><div class='add'>+	i2c_rtc: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* EEPROM */</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SPI6 */</div><div class='add'>+&amp;lpspi6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi6&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* TPM */</div><div class='add'>+	tpm@0 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tpm&gt;;</div><div class='add'>+		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Console */</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RS-232/RS-485 */</div><div class='add'>+&amp;lpuart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB */</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD-Card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2_default&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0	0x57e</div><div class='add'>+			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1	0x57e</div><div class='add'>+			MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2	0x57e</div><div class='add'>+			MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3	0x57e</div><div class='add'>+			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x5fe</div><div class='add'>+			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x57e</div><div class='add'>+			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0	0x51e</div><div class='add'>+			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1	0x51e</div><div class='add'>+			MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2	0x50e</div><div class='add'>+			MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3	0x50e</div><div class='add'>+			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e</div><div class='add'>+			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x50e</div><div class='add'>+			MX93_PAD_CCM_CLKO1__GPIO3_IO26		0x1002</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_PDM_BIT_STREAM0__CAN1_RX	0x139e</div><div class='add'>+			MX93_PAD_PDM_CLK__CAN1_TX		0x1382</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1_tc: flexcan1tcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_TD3__GPIO4_IO16		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e</div><div class='add'>+			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi6: lpspi6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO00__GPIO2_IO00		0x386</div><div class='add'>+			MX93_PAD_GPIO_IO01__LPSPI6_SIN		0x3fe</div><div class='add'>+			MX93_PAD_GPIO_IO02__LPSPI6_SOUT		0x386</div><div class='add'>+			MX93_PAD_GPIO_IO03__LPSPI6_SCK		0x386</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_RD2__GPIO4_IO26		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm: tpmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO17__GPIO2_IO17		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e</div><div class='add'>+			MX93_PAD_UART1_TXD__LPUART1_TX		0x30e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart7: uart7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO08__LPUART7_TX		0x30e</div><div class='add'>+			MX93_PAD_GPIO_IO09__LPUART7_RX		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO10__LPUART7_CTS_B	0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO11__LPUART7_RTS_B	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_cd: usdhc2cdgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_default: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000178e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x40001386</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x40001386</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x40001386</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x400013be</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso<br/>new file mode 100644<br/>index 000000000000..a20898734741<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Andrej Picej &lt;andrej.picej@norik.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "imx93-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_keys&gt;;</div><div class='add'>+</div><div class='add'>+		button-s2 {</div><div class='add'>+			label = "sleep";</div><div class='add'>+			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	user-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_user_leds&gt;;</div><div class='add'>+</div><div class='add'>+		user-led2 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_gpio_keys: gpiokeysgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_user_leds: userledsgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET1_RD3__GPIO4_IO13		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso<br/>new file mode 100644<br/>index 000000000000..a7285f009566<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Andrej Picej &lt;andrej.picej@norik.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "imx93-pinfunc.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	usdhc3_pwrseq: usdhc3-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		post-power-on-delay-ms = &lt;100&gt;;</div><div class='add'>+		power-off-delay-us = &lt;60&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;, &lt;&amp;pinctrl_wlbt&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_sleep&gt;, &lt;&amp;pinctrl_wlbt&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brmcf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX	0x31e</div><div class='add'>+			MX93_PAD_DAP_TDI__LPUART5_RX		0x31e</div><div class='add'>+			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B	0x31e</div><div class='add'>+			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO22__USDHC3_CLK		0x179e</div><div class='add'>+			MX93_PAD_GPIO_IO23__USDHC3_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_GPIO_IO24__USDHC3_DATA0	0x4000139e</div><div class='add'>+			MX93_PAD_GPIO_IO25__USDHC3_DATA1	0x4000139e</div><div class='add'>+			MX93_PAD_GPIO_IO26__USDHC3_DATA2	0x4000139e</div><div class='add'>+			MX93_PAD_GPIO_IO27__USDHC3_DATA3	0x4000139e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_sleep: usdhc3sleepgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO22__USDHC3_CLK		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO23__USDHC3_CMD		0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO24__USDHC3_DATA0	0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO25__USDHC3_DATA1	0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO26__USDHC3_DATA2	0x31e</div><div class='add'>+			MX93_PAD_GPIO_IO27__USDHC3_DATA3	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wlbt: wlbtgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET1_RD3__GPIO4_IO13		0x31e	/* BT ENABLE */</div><div class='add'>+			MX93_PAD_ENET1_TXC__GPIO4_IO07		0x31e	/* WLAN ENABLE */</div><div class='add'>+			MX93_PAD_I2C1_SCL__GPIO1_IO00		0x31e	/* HOST WAKEUP */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts<br/>index 85fb188b057f..802d96b19e4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts</a></div><div class='hunk'>@@ -17,10 +17,48 @@</div><div class='ctx'> 	compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",</div><div class='ctx'> 		     "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;eqos;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;i2c_rtc;</div><div class='add'>+		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	flexcan1_tc: can-phy0 {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;1000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_flexcan1_tc&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sound_1v8: regulator-sound-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "VCC1V8_AUDIO";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sound_3v3: regulator-sound-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VCC3V3_ANALOG";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -31,6 +69,93 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-name = "VCC_SD";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound: sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "phyBOARD-Segin-TLV320AIC3007";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;dailink_master&gt;;</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Line", "Line In",</div><div class='add'>+			"Line", "Line Out",</div><div class='add'>+			"Speaker", "Speaker";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Line Out", "LLOUT",</div><div class='add'>+			"Line Out", "RLOUT",</div><div class='add'>+			"Speaker", "SPOP",</div><div class='add'>+			"Speaker", "SPOM",</div><div class='add'>+			"LINE1L", "Line In",</div><div class='add'>+			"LINE1R", "Line In";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dailink_master: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk IMX93_CLK_SAI1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ethernet */</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;100000000&gt;, &lt;50000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	ethphy2: ethernet-phy@2 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1561";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='add'>+		clock-names = "rmii-ref";</div><div class='add'>+		micrel,led-mode = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	phys = &lt;&amp;flexcan1_tc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C2 */</div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Codec */</div><div class='add'>+	audio_codec: audio-codec@18 {</div><div class='add'>+		compatible = "ti,tlv320aic3007";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		IOVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		DRVDD-supply = &lt;&amp;reg_sound_3v3&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_sound_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* RTC */</div><div class='add'>+	i2c_rtc: rtc@68 {</div><div class='add'>+		compatible = "microcrystal,rv4162";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;26 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Console */</div><div class='hunk'>@@ -40,9 +165,28 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* eMMC */</div><div class='del'>-&amp;usdhc1 {</div><div class='del'>-	no-1-8-v;</div><div class='add'>+/* Audio */</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX93_CLK_SAI1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB  */</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	disable-over-current;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* SD-Card */</div><div class='hunk'>@@ -53,6 +197,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='ctx'> 	no-mmc;</div><div class='ctx'> 	no-sdio;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='hunk'>@@ -60,10 +205,36 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;iomuxc {</div><div class='del'>-	pinctrl_uart1: uart1grp {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e</div><div class='del'>-			MX93_PAD_UART1_TXD__LPUART1_TX		0x30e</div><div class='add'>+			MX93_PAD_ENET1_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK	0x4000050e</div><div class='add'>+			MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0		0x57e</div><div class='add'>+			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1		0x57e</div><div class='add'>+			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0		0x50e</div><div class='add'>+			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1		0x50e</div><div class='add'>+			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL	0x57e</div><div class='add'>+			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x50e</div><div class='add'>+			MX93_PAD_ENET1_RXC__ENET_QOS_RX_ER		0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_PDM_BIT_STREAM0__CAN1_RX	0x139e</div><div class='add'>+			MX93_PAD_PDM_CLK__CAN1_TX		0x139e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1_tc: flexcan1tcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_TD3__GPIO4_IO16		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e</div><div class='add'>+			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -73,45 +244,71 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_RD2__GPIO4_IO26		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_UART2_RXD__SAI1_MCLK		0x1202</div><div class='add'>+			MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC	0x1202</div><div class='add'>+			MX93_PAD_SAI1_TXC__SAI1_TX_BCLK		0x1202</div><div class='add'>+			MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00	0x1402</div><div class='add'>+			MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00	0x1402</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e</div><div class='add'>+			MX93_PAD_UART1_TXD__LPUART1_TX		0x30e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc2_cd: usdhc2cdgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='ctx'> 	pinctrl_usdhc2_default: usdhc2grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_SD2_CLK__USDHC2_CLK		0x179e</div><div class='del'>-			MX93_PAD_SD2_CMD__USDHC2_CMD		0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x138e</div><div class='del'>-			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x138e</div><div class='del'>-			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x138e</div><div class='del'>-			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x139e</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e</div><div class='ctx'> 			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_100mhz: usdhc2grp {</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_SD2_CLK__USDHC2_CLK            0x179e</div><div class='del'>-			MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x138e</div><div class='del'>-			MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x138e</div><div class='del'>-			MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e</div><div class='del'>-			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x159e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_usdhc2_200mhz: usdhc2grp {</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_SD2_CLK__USDHC2_CLK            0x178e</div><div class='del'>-			MX93_PAD_SD2_CMD__USDHC2_CMD            0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x139e</div><div class='del'>-			MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x139e</div><div class='del'>-			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e</div><div class='add'>+			MX93_PAD_SD2_CLK__USDHC2_CLK		0x158e</div><div class='add'>+			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000139e</div><div class='add'>+			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso<br/>new file mode 100644<br/>index 000000000000..23bede7833f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Primoz Fiser &lt;primoz.fiser@norik.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rsc_table: rsc-table@2021e000 {</div><div class='add'>+			reg = &lt;0 0x2021e000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring0: vdev0vring0@a4000000 {</div><div class='add'>+			reg = &lt;0 0xa4000000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: vdev0vring1@a4008000 {</div><div class='add'>+			reg = &lt;0 0xa4008000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring0: vdev1vring0@a4010000 {</div><div class='add'>+			reg = &lt;0 0xa4010000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring1: vdev1vring1@a4018000 {</div><div class='add'>+			reg = &lt;0 0xa4018000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdevbuffer: vdevbuffer@a4020000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0xa4020000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cm33 {</div><div class='add'>+	mbox-names = "tx", "rx", "rxdb";</div><div class='add'>+	mboxes = &lt;&amp;mu1 0 1&gt;,</div><div class='add'>+		 &lt;&amp;mu1 1 1&gt;,</div><div class='add'>+		 &lt;&amp;mu1 3 1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;vdevbuffer&gt;, &lt;&amp;vdev0vring0&gt;, &lt;&amp;vdev0vring1&gt;,</div><div class='add'>+		 &lt;&amp;vdev1vring0&gt;, &lt;&amp;vdev1vring1&gt;, &lt;&amp;rsc_table&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mu1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi<br/>index 88c2657b50e6..3f069905cf0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi</a></div><div class='hunk'>@@ -16,6 +16,10 @@</div><div class='ctx'> 	model = "PHYTEC phyCORE-i.MX93";</div><div class='ctx'> 	compatible = "phytec,imx93-phycore-som", "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;fec;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -42,6 +46,19 @@</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_vdda_1v8: regulator-vdda-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDA_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;buck5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ADC */</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vdda_1v8&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Ethernet */</div><div class='hunk'>@@ -50,7 +67,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='ctx'> 	phy-mode = "rmii";</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='del'>-	fsl,magic-packet;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX93_CLK_ENET_TIMER1&gt;,</div><div class='ctx'> 			  &lt;&amp;clk IMX93_CLK_ENET_REF&gt;,</div><div class='ctx'> 			  &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='hunk'>@@ -68,21 +84,121 @@</div><div class='ctx'> 		ethphy1: ethernet-phy@1 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			reset-assert-us = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C3 */</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@25 {</div><div class='add'>+		compatible = "nxp,pca9451a";</div><div class='add'>+		reg = &lt;0x25&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1: BUCK1 {</div><div class='add'>+				regulator-name = "VDD_SOC";</div><div class='add'>+				regulator-min-microvolt = &lt;610000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-ramp-delay = &lt;3125&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: BUCK2 {</div><div class='add'>+				regulator-name = "VDDQ_0V6";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: BUCK4 {</div><div class='add'>+				regulator-name = "VDD_3V3_BUCK";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck5: BUCK5 {</div><div class='add'>+				regulator-name = "VDD_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck6: BUCK6 {</div><div class='add'>+				regulator-name = "VDD_1V1";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: LDO1 {</div><div class='add'>+				regulator-name = "PMIC_SNVS_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4: LDO4 {</div><div class='add'>+				regulator-name = "VDD_0V8";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5: LDO5 {</div><div class='add'>+				regulator-name = "NVCC_SD2";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* EEPROM */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;buck4&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* eMMC */</div><div class='ctx'> &amp;usdhc1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='add'>+	no-1-8-v;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Watchdog */</div><div class='ctx'> &amp;wdog3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wdog&gt;;</div><div class='add'>+	fsl,ext-reset-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -91,36 +207,93 @@</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_ENET2_MDC__ENET1_MDC			0x50e</div><div class='ctx'> 			MX93_PAD_ENET2_MDIO__ENET1_MDIO			0x502</div><div class='del'>-			MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0		0x57e</div><div class='del'>-			MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1		0x57e</div><div class='del'>-			MX93_PAD_ENET2_RXC__ENET1_RX_ER			0x5fe</div><div class='add'>+			/* the three pins below are connected to PHYs straps,</div><div class='add'>+			 * that is what the pull-up/down setting is for.</div><div class='add'>+			 */</div><div class='add'>+			MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0		0x37e</div><div class='add'>+			MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1		0x37e</div><div class='ctx'> 			MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL	0x57e</div><div class='ctx'> 			MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0		0x50e</div><div class='ctx'> 			MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1		0x50e</div><div class='ctx'> 			MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL	0x50e</div><div class='ctx'> 			MX93_PAD_ENET2_TD2__ENET1_TX_CLK		0x4000050e</div><div class='add'>+			MX93_PAD_ENET2_RXC__GPIO4_IO23			0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_leds: ledsgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_I2C1_SDA__GPIO1_IO01		0x31e</div><div class='add'>+			MX93_PAD_I2C1_SDA__GPIO1_IO01		0x11e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_GPIO_IO28__LPI2C3_SDA		0x40000b9e</div><div class='add'>+			MX93_PAD_GPIO_IO29__LPI2C3_SCL		0x40000b9e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pmic: pmicgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_ENET2_RD3__GPIO4_IO27		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='ctx'> 	pinctrl_usdhc1: usdhc1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_SD1_CLK__USDHC1_CLK		0x179e</div><div class='del'>-			MX93_PAD_SD1_CMD__USDHC1_CMD		0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x138e</div><div class='del'>-			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x138e</div><div class='del'>-			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x1386</div><div class='del'>-			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x1386</div><div class='add'>+			MX93_PAD_SD1_CMD__USDHC1_CMD		0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x40001386</div><div class='add'>+			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x40001386</div><div class='add'>+			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x179e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD1_CLK__USDHC1_CLK		0x17be</div><div class='add'>+			MX93_PAD_SD1_CMD__USDHC1_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000138e</div><div class='add'>+			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x179e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* need to config the SION for data and cmd pad, refer to ERR052021 */</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SD1_CLK__USDHC1_CLK		0x17be</div><div class='add'>+			MX93_PAD_SD1_CMD__USDHC1_CMD		0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000139e</div><div class='add'>+			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x400013be</div><div class='add'>+			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x400013be</div><div class='ctx'> 			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x179e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wdog: wdoggrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts<br/>new file mode 100644<br/>index 000000000000..2673d9dccbf4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca.dts</a></div><div class='hunk'>@@ -0,0 +1,760 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Markus Niebel</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx93-tqma9352.dtsi"</div><div class='add'>+</div><div class='add'>+/{</div><div class='add'>+	model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA on MBa91xxCA starter kit";</div><div class='add'>+	compatible = "tq,imx93-tqma9352-mba91xxca", "tq,imx93-tqma9352", "fsl,imx93";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom0 = &amp;eeprom0;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;pcf85063;</div><div class='add'>+		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;tpm2 2 5000000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display: display {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT overlay</div><div class='add'>+		 */</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan0: gpio-fan {</div><div class='add'>+		compatible = "gpio-fan";</div><div class='add'>+		gpios = &lt;&amp;expander2 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio-fan,speed-map = &lt;0 0&gt;, &lt;10000 1&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		switch-a {</div><div class='add'>+			label = "switcha";</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			gpios = &lt;&amp;expander0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-b {</div><div class='add'>+			label = "switchb";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;expander0 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;expander2 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;expander2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	iio-hwmon {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;adc1 0&gt;, &lt;&amp;adc1 1&gt;, &lt;&amp;adc1 2&gt;, &lt;&amp;adc1 3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lvds_encoder: lvds-encoder {</div><div class='add'>+		compatible = "ti,sn75lvds83", "lvds-encoder";</div><div class='add'>+		powerdown-gpios = &lt;&amp;expander2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_input: endpoint {</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				lvds_encoder_output: endpoint {</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_MB";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5v0: regulator-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_5V0_MB";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_12v0: regulator-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_12V";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_mpcie_1v5: regulator-mpcie-1v5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V5_MPCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_mpcie_3v3: regulator-mpcie-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3_MPCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			trips {</div><div class='add'>+				cpu_active: trip-active0 {</div><div class='add'>+					temperature = &lt;40000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;cpu_active&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eqos {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy_eqos&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy_eqos: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_eqos_phy&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;expander1 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy_fec&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy_fec: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_fec_phy&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;expander1 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "PMIC_IRQ#",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "USB_C_ALERT#", "BM2_LCD_INT#",</div><div class='add'>+		/* 12 */ "PEX_INT#", "", "RTC_EVENT#", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "SD2_CD#", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "SD2_RST#",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "ENET1_INT#", "ENET2_INT#",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		/* 00 */ "", "", "", "",</div><div class='add'>+		/* 04 */ "", "", "", "",</div><div class='add'>+		/* 08 */ "", "", "", "",</div><div class='add'>+		/* 12 */ "", "", "", "",</div><div class='add'>+		/* 16 */ "", "", "", "",</div><div class='add'>+		/* 20 */ "", "", "", "",</div><div class='add'>+		/* 24 */ "", "", "", "",</div><div class='add'>+		/* 28 */ "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@1c {</div><div class='add'>+		compatible = "nxp,se97b", "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ptn5110: usb-typec@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;10 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "X17";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			typec-power-opmode = "default";</div><div class='add'>+			pd-disable;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				typec_con_hs: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;typec_hs&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom2: eeprom@54 {</div><div class='add'>+		compatible = "nxp,se97b", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander0: gpio@70 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pexp_irq&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "TEMP_EVENT_MOD#", "MPCIE_WAKE#",</div><div class='add'>+				  "MPCIE_1V5_EN", "MPCIE_3V3_EN",</div><div class='add'>+				  "MPCIE_PERST#", "MPCIE_WDISABLE#",</div><div class='add'>+				  "BUTTON_A#", "BUTTON_B#";</div><div class='add'>+</div><div class='add'>+		temp-event-mod-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "TEMP_EVENT_MOD#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mpcie-wake-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			input;</div><div class='add'>+			line-name = "MPCIE_WAKE#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the mPCIE slot reset which is low active as</div><div class='add'>+		 * reset signal. The output-low states, the signal is</div><div class='add'>+		 * inactive, e.g. not in reset</div><div class='add'>+		 */</div><div class='add'>+		mpcie_rst_hog: mpcie-rst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "MPCIE_PERST#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the mPCIE slot WDISABLE pin which is low active</div><div class='add'>+		 * as disable signal. The output-low states, the signal is</div><div class='add'>+		 * inactive, e.g. not disabled</div><div class='add'>+		 */</div><div class='add'>+		mpcie_wdisable_hog: mpcie-wdisable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "MPCIE_WDISABLE#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander1: gpio@71 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "ENET1_RESET#", "ENET2_RESET#",</div><div class='add'>+				  "USB_RESET#", "",</div><div class='add'>+				  "WLAN_PD#", "WLAN_W_DISABLE#",</div><div class='add'>+				  "WLAN_PERST#", "12V_EN";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card PD pin which is low active</div><div class='add'>+		 * as power down signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not power down</div><div class='add'>+		 */</div><div class='add'>+		wlan-pd-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_PD#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card disable pin which is low active</div><div class='add'>+		 * as disable signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not disabled</div><div class='add'>+		 */</div><div class='add'>+		wlan-wdisable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_W_DISABLE#";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Controls the WiFi card reset pin which is low active</div><div class='add'>+		 * as reset signal. The output-low states, the signal</div><div class='add'>+		 * is inactive, e.g. not in reset</div><div class='add'>+		 */</div><div class='add'>+		wlan-perst-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "WLAN_PERST#";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander2: gpio@72 {</div><div class='add'>+		compatible = "nxp,pca9538";</div><div class='add'>+		reg = &lt;0x72&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		gpio-line-names = "LCD_RESET#", "LCD_PWR_EN",</div><div class='add'>+				  "LCD_BLT_EN", "LVDS_SHDN#",</div><div class='add'>+				  "FAN_PWR_EN", "",</div><div class='add'>+				  "USER_LED1", "USER_LED2";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcf85063 {</div><div class='add'>+	/* RTC_EVENT# from SoM is connected on mainboard */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcf85063&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;14 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;se97_som {</div><div class='add'>+	/* TEMP_EVENT# from SoM is connected on mainboard */</div><div class='add'>+	interrupt-parent = &lt;&amp;expander0&gt;;</div><div class='add'>+	interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		typec_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	samsung,picophy-pre-emp-curr-control = &lt;3&gt;;</div><div class='add'>+	samsung,picophy-dc-vol-level-adjust = &lt;7&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2517";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander1 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2_hs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_uhs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_uhs&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	disable-wp;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_eqos: eqosgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_MDC__ENET_QOS_MDC				0x51e&gt;,</div><div class='add'>+			   /* SION | HYS | ODE | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO				0x4000111e&gt;,</div><div class='add'>+			   /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x1000&gt;,</div><div class='add'>+			   /* HYS | PD | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x1400&gt;,</div><div class='add'>+			   /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x51e&gt;,</div><div class='add'>+			   /* PD | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eqos_phy: eqosphygrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_CCM_CLKO1__GPIO3_IO26			0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec: fecgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_MDC__ENET1_MDC			0x51e&gt;,</div><div class='add'>+			   /* SION | HYS | ODE | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_MDIO__ENET1_MDIO			0x4000111e&gt;,</div><div class='add'>+			   /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3			0x1000&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL		0x1000&gt;,</div><div class='add'>+			   /* HYS | PD | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC			0x1400&gt;,</div><div class='add'>+			   /* PD | FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3			0x51e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL		0x51e&gt;,</div><div class='add'>+			   /* PD | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC			0x58e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec_phy: fecphygrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_CCM_CLKO2__GPIO3_IO27			0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = /* HYS | PU | FSEL_0 | DSE no drive */</div><div class='add'>+			   &lt;MX93_PAD_PDM_BIT_STREAM0__CAN1_RX		0x1200&gt;,</div><div class='add'>+			   /* PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_PDM_CLK__CAN1_TX			0x039e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_jtag: jtaggrp {</div><div class='add'>+		fsl,pins = &lt;MX93_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK	0x051e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_DAP_TDI__JTAG_MUX_TDI		0x1200&gt;,</div><div class='add'>+			   &lt;MX93_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO	0x031e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS	0x1200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = /* SION | HYS | OD | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO28__LPI2C3_SDA		0x4000199e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO29__LPI2C3_SCL		0x4000199e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcf85063: pcf85063grp {</div><div class='add'>+		fsl,pins = &lt;MX93_PAD_SAI1_RXD0__GPIO1_IO14		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pexp_irq: pexpirqgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_SAI1_TXC__GPIO1_IO12		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rgbdisp: rgbdispgrp {</div><div class='add'>+		fsl,pins = &lt;MX93_PAD_GPIO_IO00__MEDIAMIX_DISP_CLK	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO01__MEDIAMIX_DISP_DE	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO02__MEDIAMIX_DISP_VSYNC	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO03__MEDIAMIX_DISP_HSYNC	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO04__MEDIAMIX_DISP_DATA00	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO05__MEDIAMIX_DISP_DATA01	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO06__MEDIAMIX_DISP_DATA02	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO07__MEDIAMIX_DISP_DATA03	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO08__MEDIAMIX_DISP_DATA04	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO09__MEDIAMIX_DISP_DATA05	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO10__MEDIAMIX_DISP_DATA06	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO11__MEDIAMIX_DISP_DATA07	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO12__MEDIAMIX_DISP_DATA08	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO13__MEDIAMIX_DISP_DATA09	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO14__MEDIAMIX_DISP_DATA10	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO15__MEDIAMIX_DISP_DATA11	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO16__MEDIAMIX_DISP_DATA12	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO17__MEDIAMIX_DISP_DATA13	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO18__MEDIAMIX_DISP_DATA14	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO19__MEDIAMIX_DISP_DATA15	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO20__MEDIAMIX_DISP_DATA16	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO21__MEDIAMIX_DISP_DATA17	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO22__MEDIAMIX_DISP_DATA18	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO23__MEDIAMIX_DISP_DATA19	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO24__MEDIAMIX_DISP_DATA20	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO25__MEDIAMIX_DISP_DATA21	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO26__MEDIAMIX_DISP_DATA22	0x31e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_GPIO_IO27__MEDIAMIX_DISP_DATA23	0x31e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_touch: touchgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_SAI1_TXFS__GPIO1_IO11		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm2: tpm2grp {</div><div class='add'>+		fsl,pins = &lt;MX93_PAD_I2C2_SCL__TPM2_CH2			0x57e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_typec: typecgrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10	0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_UART1_RXD__LPUART1_RX		0x1000&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_UART1_TXD__LPUART1_TX		0x011e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: uart2grp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_UART2_RXD__LPUART2_RX		0x1000&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_UART2_TXD__LPUART2_TX		0x011e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_SAI1_TXD0__LPUART2_RTS_B		0x011e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = /* HYS | FSEL_0 | No DSE */</div><div class='add'>+			   &lt;MX93_PAD_SD2_CD_B__GPIO3_IO00		0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* enable SION for data and cmd pad due to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_hs: usdhc2hsgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_3 | DSE X5 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_CLK__USDHC2_CLK		0x05be&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X3 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA0__USDHC2_DATA0		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA1__USDHC2_DATA1		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA2__USDHC2_DATA2		0x4000138e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA3__USDHC2_DATA3		0x4000138e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X3 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x010e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* enable SION for data and cmd pad due to ERR052021 */</div><div class='add'>+	pinctrl_usdhc2_uhs: usdhc2uhsgrp {</div><div class='add'>+		fsl,pins = /* PD | FSEL_3 | DSE X6 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_CLK__USDHC2_CLK		0x05fe&gt;,</div><div class='add'>+			   /* HYS | PU | FSEL_3 | DSE X4 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA0__USDHC2_DATA0		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA1__USDHC2_DATA1		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA2__USDHC2_DATA2		0x4000139e&gt;,</div><div class='add'>+			   &lt;MX93_PAD_SD2_DATA3__USDHC2_DATA3		0x4000139e&gt;,</div><div class='add'>+			   /* FSEL_2 | DSE X3 */</div><div class='add'>+			   &lt;MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x010e&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts<br/>index 599df32976e2..4760d07ea24b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2022-2023 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * Copyright (c) 2022-2024 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='ctx'>  * D-82229 Seefeld, Germany.</div><div class='ctx'>  * Author: Markus Niebel</div><div class='ctx'>  * Author: Alexander Stein</div><div class='hunk'>@@ -26,10 +26,35 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		eeprom0 = &amp;eeprom0;</div><div class='del'>-		ethernet0 = &amp;fec;</div><div class='del'>-		ethernet1 = &amp;eqos;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='ctx'> 		rtc0 = &amp;pcf85063;</div><div class='ctx'> 		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='add'>+		serial6 = &amp;lpuart7;</div><div class='add'>+		serial7 = &amp;lpuart8;</div><div class='add'>+		spi0 = &amp;lpspi1;</div><div class='add'>+		spi1 = &amp;lpspi2;</div><div class='add'>+		spi2 = &amp;lpspi3;</div><div class='add'>+		spi3 = &amp;lpspi4;</div><div class='add'>+		spi4 = &amp;lpspi5;</div><div class='add'>+		spi5 = &amp;lpspi6;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight {</div><div class='hunk'>@@ -448,38 +473,38 @@</div><div class='ctx'> 				  "WLAN_PERST#", "12V_EN";</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Controls the WiFi card PD pin which is low active</div><div class='del'>-		 * as power down signal. The output-high states, the signal</div><div class='del'>-		 * is active, e.g. card is powered down</div><div class='add'>+		 * Controls the WiFi card's low-active power down pin.</div><div class='add'>+		 * The output-low states, the signal is inactive,</div><div class='add'>+		 * resulting in high signal at power-down pin</div><div class='ctx'> 		 */</div><div class='ctx'> 		wlan-pd-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			output-high;</div><div class='add'>+			output-low;</div><div class='ctx'> 			line-name = "WLAN_PD#";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Controls the WiFi card disable pin which is low active</div><div class='del'>-		 * as disable signal. The output-high states, the signal</div><div class='del'>-		 * is active, e.g. card is disabled</div><div class='add'>+		 * Controls the WiFi card's low-active disable pin.</div><div class='add'>+		 * The output-low states, the signal is inactive,</div><div class='add'>+		 * resulting in high signal at power-down pin</div><div class='ctx'> 		 */</div><div class='ctx'> 		wlan-wdisable-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			output-high;</div><div class='add'>+			output-low;</div><div class='ctx'> 			line-name = "WLAN_W_DISABLE#";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Controls the WiFi card reset pin which is low active</div><div class='del'>-		 * as reset signal. The output-high states, the signal</div><div class='del'>-		 * is active, e.g. card in reset</div><div class='add'>+		 * Controls the WiFi card's reset pin.</div><div class='add'>+		 * The output-low states, the signal is inactive,</div><div class='add'>+		 * resulting in high signal at power-down pin</div><div class='ctx'> 		 */</div><div class='ctx'> 		wlan-perst-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			output-high;</div><div class='add'>+			output-low;</div><div class='ctx'> 			line-name = "WLAN_PERST#";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -755,12 +780,6 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pcf85063: pcf85063grp {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX93_PAD_SAI1_RXD0__GPIO1_IO14			0x1000</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pinctrl_mipi_csi: mipicsigrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			MX93_PAD_CCM_CLKO3__CCMSRCGPCMIX_CLKO3		0x051e /* MCLK */</div><div class='hunk'>@@ -769,6 +788,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pcf85063: pcf85063grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			MX93_PAD_SAI1_RXD0__GPIO1_IO14			0x1000</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pexp_irq: pexpirqgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			/* HYS | FSEL_0 | No DSE */</div><div class='hunk'>@@ -783,17 +808,17 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_temp_sensor_som: tempsensorsomgrp {</div><div class='add'>+	pinctrl_tc9595: tc9595-grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			/* HYS | FSEL_0 | no DSE */</div><div class='del'>-			MX93_PAD_SAI1_TXFS__GPIO1_IO11			0x1000</div><div class='add'>+			/* HYS | PD | FSEL_0 | no DSE */</div><div class='add'>+			MX93_PAD_CCM_CLKO4__GPIO4_IO29			0x1400</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_tc9595: tc9595-grp {</div><div class='add'>+	pinctrl_temp_sensor_som: tempsensorsomgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			/* HYS | PD | FSEL_0 | no DSE */</div><div class='del'>-			MX93_PAD_CCM_CLKO4__GPIO4_IO29			0x1400</div><div class='add'>+			/* HYS | FSEL_0 | no DSE */</div><div class='add'>+			MX93_PAD_SAI1_TXFS__GPIO1_IO11			0x1000</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts b/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts<br/>index 0b4b3bb866d0..8a88c98ac05a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2022-2023 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * Copyright (c) 2022-2024 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='ctx'>  * D-82229 Seefeld, Germany.</div><div class='ctx'>  * Author: Markus Niebel</div><div class='ctx'>  * Author: Alexander Stein</div><div class='hunk'>@@ -26,10 +26,35 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		eeprom0 = &amp;eeprom0;</div><div class='del'>-		ethernet0 = &amp;fec;</div><div class='del'>-		ethernet1 = &amp;eqos;</div><div class='add'>+		ethernet0 = &amp;eqos;</div><div class='add'>+		ethernet1 = &amp;fec;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='ctx'> 		rtc0 = &amp;pcf85063;</div><div class='ctx'> 		rtc1 = &amp;bbnsm_rtc;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='add'>+		serial6 = &amp;lpuart7;</div><div class='add'>+		serial7 = &amp;lpuart8;</div><div class='add'>+		spi0 = &amp;lpspi1;</div><div class='add'>+		spi1 = &amp;lpspi2;</div><div class='add'>+		spi2 = &amp;lpspi3;</div><div class='add'>+		spi3 = &amp;lpspi4;</div><div class='add'>+		spi4 = &amp;lpspi5;</div><div class='add'>+		spi5 = &amp;lpspi6;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight_lvds: backlight {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi b/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi<br/>index 2cabdae24227..82914ca148d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2022 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * Copyright (c) 2022-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='ctx'>  * D-82229 Seefeld, Germany.</div><div class='ctx'>  * Author: Markus Niebel</div><div class='ctx'>  */</div><div class='hunk'>@@ -11,6 +11,12 @@</div><div class='ctx'> 	model = "TQ-Systems i.MX93 TQMa93xxLA/TQMa93xxCA SOM";</div><div class='ctx'> 	compatible = "tq,imx93-tqma9352", "fsl,imx93";</div><div class='ctx'> </div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* our minimum RAM config will be 1024 MiB */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -70,15 +76,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gpio1 {</div><div class='del'>-	pmic-irq-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		input;</div><div class='del'>-		line-name = "PMIC_IRQ#";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;lpi2c1 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='hunk'>@@ -110,11 +107,11 @@</div><div class='ctx'> 				regulator-ramp-delay = &lt;3125&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			/* V_DDRQ - 1.1 LPDDR4 or 0.6 LPDDR4X */</div><div class='add'>+			/* V_DDRQ - 0.6 V for LPDDR4X */</div><div class='ctx'> 			buck2: BUCK2 {</div><div class='ctx'> 				regulator-name = "BUCK2";</div><div class='ctx'> 				regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;600000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-ramp-delay = &lt;3125&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts<br/>index 576d6982a4a0..c789c1f24bdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts</a></div><div class='hunk'>@@ -17,8 +17,25 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;eqos;</div><div class='ctx'> 		ethernet1 = &amp;fec;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi<br/>index 783938245e4f..a5f09487d803 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93-var-som.dtsi</a></div><div class='hunk'>@@ -19,26 +19,19 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 14 GPIO_ACTIVE_LOW&gt;,	/* WIFI_RESET */</div><div class='ctx'> 			      &lt;&amp;gpio3 7 GPIO_ACTIVE_LOW&gt;;	/* WIFI_PWR_EN */</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	reg_eqos_phy: regulator-eqos-phy {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_reg_eqos_phy&gt;;</div><div class='del'>-		regulator-name = "eth_phy_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		startup-delay-us = &lt;100000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;eqos {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_eqos&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * The required RGMII TX and RX 2ns delays are implemented directly</div><div class='add'>+	 * in hardware via passive delay elements on the SOM PCB.</div><div class='add'>+	 * No delay configuration is needed in software via PHY driver.</div><div class='add'>+	 */</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='ctx'> 	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	snps,clk-csr = &lt;5&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='hunk'>@@ -51,6 +44,28 @@</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			eee-broken-1000t;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+			leds {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					linux,default-trigger = "netdev";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+					function = LED_FUNCTION_LAN;</div><div class='add'>+					linux,default-trigger = "netdev";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -75,14 +90,15 @@</div><div class='ctx'> 			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x57e</div><div class='del'>-			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x5fe</div><div class='add'>+			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x58e</div><div class='ctx'> 			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x57e</div><div class='ctx'> 			MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x57e</div><div class='del'>-			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x5fe</div><div class='add'>+			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e</div><div class='ctx'> 			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x57e</div><div class='add'>+			MX93_PAD_UART2_TXD__GPIO1_IO07				0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi<br/>index 04b9b3d31f4f..7b27012dfcb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx93.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx93.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx93.dtsi</a></div><div class='hunk'>@@ -1,179 +1,15 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2022 NXP</div><div class='add'>+ * Copyright 2022,2025 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='del'>-#include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-#include &lt;dt-bindings/power/fsl,imx93-power.h&gt;</div><div class='del'>-#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+#include "imx91_93_common.dtsi"</div><div class='ctx'> </div><div class='del'>-#include "imx93-pinfunc.h"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		gpio0 = &amp;gpio1;</div><div class='del'>-		gpio1 = &amp;gpio2;</div><div class='del'>-		gpio2 = &amp;gpio3;</div><div class='del'>-		gpio3 = &amp;gpio4;</div><div class='del'>-		i2c0 = &amp;lpi2c1;</div><div class='del'>-		i2c1 = &amp;lpi2c2;</div><div class='del'>-		i2c2 = &amp;lpi2c3;</div><div class='del'>-		i2c3 = &amp;lpi2c4;</div><div class='del'>-		i2c4 = &amp;lpi2c5;</div><div class='del'>-		i2c5 = &amp;lpi2c6;</div><div class='del'>-		i2c6 = &amp;lpi2c7;</div><div class='del'>-		i2c7 = &amp;lpi2c8;</div><div class='del'>-		mmc0 = &amp;usdhc1;</div><div class='del'>-		mmc1 = &amp;usdhc2;</div><div class='del'>-		mmc2 = &amp;usdhc3;</div><div class='del'>-		serial0 = &amp;lpuart1;</div><div class='del'>-		serial1 = &amp;lpuart2;</div><div class='del'>-		serial2 = &amp;lpuart3;</div><div class='del'>-		serial3 = &amp;lpuart4;</div><div class='del'>-		serial4 = &amp;lpuart5;</div><div class='del'>-		serial5 = &amp;lpuart6;</div><div class='del'>-		serial6 = &amp;lpuart7;</div><div class='del'>-		serial7 = &amp;lpuart8;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		idle-states {</div><div class='del'>-			entry-method = "psci";</div><div class='del'>-</div><div class='del'>-			cpu_pd_wait: cpu-pd-wait {</div><div class='del'>-				compatible = "arm,idle-state";</div><div class='del'>-				arm,psci-suspend-param = &lt;0x0010033&gt;;</div><div class='del'>-				local-timer-stop;</div><div class='del'>-				entry-latency-us = &lt;10000&gt;;</div><div class='del'>-				exit-latency-us = &lt;7000&gt;;</div><div class='del'>-				min-residency-us = &lt;27000&gt;;</div><div class='del'>-				wakeup-latency-us = &lt;15000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		A55_0: cpu@0 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a55";</div><div class='del'>-			reg = &lt;0x0&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='del'>-			i-cache-size = &lt;32768&gt;;</div><div class='del'>-			i-cache-line-size = &lt;64&gt;;</div><div class='del'>-			i-cache-sets = &lt;128&gt;;</div><div class='del'>-			d-cache-size = &lt;32768&gt;;</div><div class='del'>-			d-cache-line-size = &lt;64&gt;;</div><div class='del'>-			d-cache-sets = &lt;128&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2_cache_l0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		A55_1: cpu@100 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a55";</div><div class='del'>-			reg = &lt;0x100&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='del'>-			i-cache-size = &lt;32768&gt;;</div><div class='del'>-			i-cache-line-size = &lt;64&gt;;</div><div class='del'>-			i-cache-sets = &lt;128&gt;;</div><div class='del'>-			d-cache-size = &lt;32768&gt;;</div><div class='del'>-			d-cache-line-size = &lt;64&gt;;</div><div class='del'>-			d-cache-sets = &lt;128&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;l2_cache_l1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		l2_cache_l0: l2-cache-l0 {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-size = &lt;65536&gt;;</div><div class='del'>-			cache-line-size = &lt;64&gt;;</div><div class='del'>-			cache-sets = &lt;256&gt;;</div><div class='del'>-			cache-level = &lt;2&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		l2_cache_l1: l2-cache-l1 {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-size = &lt;65536&gt;;</div><div class='del'>-			cache-line-size = &lt;64&gt;;</div><div class='del'>-			cache-sets = &lt;256&gt;;</div><div class='del'>-			cache-level = &lt;2&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		l3_cache: l3-cache {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-size = &lt;262144&gt;;</div><div class='del'>-			cache-line-size = &lt;64&gt;;</div><div class='del'>-			cache-sets = &lt;256&gt;;</div><div class='del'>-			cache-level = &lt;3&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	osc_32k: clock-osc-32k {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;32768&gt;;</div><div class='del'>-		clock-output-names = "osc_32k";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	osc_24m: clock-osc-24m {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		clock-output-names = "osc_24m";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clk_ext1: clock-ext1 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;133000000&gt;;</div><div class='del'>-		clock-output-names = "clk_ext1";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,cortex-a55-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	psci {</div><div class='del'>-		compatible = "arm,psci-1.0";</div><div class='del'>-		method = "smc";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-		clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		arm,no-tick-in-suspend;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gic: interrupt-controller@48000000 {</div><div class='del'>-		compatible = "arm,gic-v3";</div><div class='del'>-		reg = &lt;0 0x48000000 0 0x10000&gt;,</div><div class='del'>-		      &lt;0 0x48040000 0 0xc0000&gt;;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+/{</div><div class='add'>+	cm33: remoteproc-cm33 {</div><div class='add'>+		compatible = "fsl,imx93-cm33";</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_CM33_GATE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='hunk'>@@ -207,1129 +43,119 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	cm33: remoteproc-cm33 {</div><div class='del'>-		compatible = "fsl,imx93-cm33";</div><div class='del'>-		clocks = &lt;&amp;clk IMX93_CLK_CM33_GATE&gt;;</div><div class='add'>+&amp;aips1 {</div><div class='add'>+	mu1: mailbox@44230000 {</div><div class='add'>+		compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";</div><div class='add'>+		reg = &lt;0x44230000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_MU1_B_GATE&gt;;</div><div class='add'>+		#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mqs1: mqs1 {</div><div class='del'>-		compatible = "fsl,imx93-mqs";</div><div class='del'>-		gpr = &lt;&amp;aonmix_ns_gpr&gt;;</div><div class='del'>-		status = "disabled";</div><div class='add'>+	tmu: tmu@44482000 {</div><div class='add'>+		compatible = "fsl,qoriq-tmu";</div><div class='add'>+		reg = &lt;0x44482000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_TMC_GATE&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		little-endian;</div><div class='add'>+		fsl,tmu-range = &lt;0x800000da 0x800000e9</div><div class='add'>+				 0x80000102 0x8000012a</div><div class='add'>+				 0x80000166 0x800001a7</div><div class='add'>+				 0x800001b6&gt;;</div><div class='add'>+		fsl,tmu-calibration = &lt;0x00000000 0x0000000e</div><div class='add'>+				       0x00000001 0x00000029</div><div class='add'>+				       0x00000002 0x00000056</div><div class='add'>+				       0x00000003 0x000000a2</div><div class='add'>+				       0x00000004 0x00000116</div><div class='add'>+				       0x00000005 0x00000195</div><div class='add'>+				       0x00000006 0x000001b2&gt;;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	mqs2: mqs2 {</div><div class='del'>-		compatible = "fsl,imx93-mqs";</div><div class='del'>-		gpr = &lt;&amp;wakeupmix_gpr&gt;;</div><div class='add'>+&amp;aips2 {</div><div class='add'>+	mu2: mailbox@42440000 {</div><div class='add'>+		compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";</div><div class='add'>+		reg = &lt;0x42440000 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_MU2_B_GATE&gt;;</div><div class='add'>+		#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	usbphynop1: usbphynop1 {</div><div class='del'>-		compatible = "usb-nop-xceiv";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='del'>-		clock-names = "main_clk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usbphynop2: usbphynop2 {</div><div class='del'>-		compatible = "usb-nop-xceiv";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk IMX93_CLK_USB_PHY_BURUNIN&gt;;</div><div class='del'>-		clock-names = "main_clk";</div><div class='add'>+&amp;cpus {</div><div class='add'>+	A55_0: cpu@0 {</div><div class='add'>+		device_type = "cpu";</div><div class='add'>+		compatible = "arm,cortex-a55";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		enable-method = "psci";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+		i-cache-size = &lt;32768&gt;;</div><div class='add'>+		i-cache-line-size = &lt;64&gt;;</div><div class='add'>+		i-cache-sets = &lt;128&gt;;</div><div class='add'>+		d-cache-size = &lt;32768&gt;;</div><div class='add'>+		d-cache-line-size = &lt;64&gt;;</div><div class='add'>+		d-cache-sets = &lt;128&gt;;</div><div class='add'>+		next-level-cache = &lt;&amp;l2_cache_l0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	A55_1: cpu@100 {</div><div class='add'>+		device_type = "cpu";</div><div class='add'>+		compatible = "arm,cortex-a55";</div><div class='add'>+		reg = &lt;0x100&gt;;</div><div class='add'>+		enable-method = "psci";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+		i-cache-size = &lt;32768&gt;;</div><div class='add'>+		i-cache-line-size = &lt;64&gt;;</div><div class='add'>+		i-cache-sets = &lt;128&gt;;</div><div class='add'>+		d-cache-size = &lt;32768&gt;;</div><div class='add'>+		d-cache-line-size = &lt;64&gt;;</div><div class='add'>+		d-cache-sets = &lt;128&gt;;</div><div class='add'>+		next-level-cache = &lt;&amp;l2_cache_l1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	l2_cache_l0: l2-cache-l0 {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-size = &lt;65536&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;256&gt;;</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+		next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	l2_cache_l1: l2-cache-l1 {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-size = &lt;65536&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;256&gt;;</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+		next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	l3_cache: l3-cache {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-size = &lt;262144&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;256&gt;;</div><div class='add'>+		cache-level = &lt;3&gt;;</div><div class='add'>+		cache-unified;</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	soc@0 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x0 0x0 0x80000000&gt;,</div><div class='del'>-			 &lt;0x28000000 0x0 0x28000000 0x10000000&gt;;</div><div class='del'>-</div><div class='del'>-		aips1: bus@44000000 {</div><div class='del'>-			compatible = "fsl,aips-bus", "simple-bus";</div><div class='del'>-			reg = &lt;0x44000000 0x800000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			edma1: dma-controller@44000000 {</div><div class='del'>-				compatible = "fsl,imx93-edma3";</div><div class='del'>-				reg = &lt;0x44000000 0x200000&gt;;</div><div class='del'>-				#dma-cells = &lt;3&gt;;</div><div class='del'>-				dma-channels = &lt;31&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,  //  0: Reserved</div><div class='del'>-					     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,  //  1: CANFD1</div><div class='del'>-					     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,  //  2: Reserved</div><div class='del'>-					     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,  //  3: GPIO1 CH0</div><div class='del'>-					     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,  //  4: GPIO1 CH1</div><div class='del'>-					     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;, //  5: I3C1 TO Bus</div><div class='del'>-					     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;, //  6: I3C1 From Bus</div><div class='del'>-					     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;, //  7: LPI2C1 M TX</div><div class='del'>-					     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;, //  8: LPI2C1 S TX</div><div class='del'>-					     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;, //  9: LPI2C2 M RX</div><div class='del'>-					     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;, // 10: LPI2C2 S RX</div><div class='del'>-					     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;, // 11: LPSPI1 TX</div><div class='del'>-					     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;, // 12: LPSPI1 RX</div><div class='del'>-					     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;, // 13: LPSPI2 TX</div><div class='del'>-					     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;, // 14: LPSPI2 RX</div><div class='del'>-					     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;, // 15: LPTMR1</div><div class='del'>-					     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;, // 16: LPUART1 TX</div><div class='del'>-					     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;, // 17: LPUART1 RX</div><div class='del'>-					     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;, // 18: LPUART2 TX</div><div class='del'>-					     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;, // 19: LPUART2 RX</div><div class='del'>-					     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;, // 20: S400</div><div class='del'>-					     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;, // 21: SAI TX</div><div class='del'>-					     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;, // 22: SAI RX</div><div class='del'>-					     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;, // 23: TPM1 CH0/CH2</div><div class='del'>-					     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;, // 24: TPM1 CH1/CH3</div><div class='del'>-					     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;, // 25: TPM1 Overflow</div><div class='del'>-					     &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;, // 26: TMP2 CH0/CH2</div><div class='del'>-					     &lt;GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH&gt;, // 27: TMP2 CH1/CH3</div><div class='del'>-					     &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;, // 28: TMP2 Overflow</div><div class='del'>-					     &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;, // 29: PDM</div><div class='del'>-					     &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;; // 30: ADC1</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_EDMA1_GATE&gt;;</div><div class='del'>-				clock-names = "dma";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			aonmix_ns_gpr: syscon@44210000 {</div><div class='del'>-				compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";</div><div class='del'>-				reg = &lt;0x44210000 0x1000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mu1: mailbox@44230000 {</div><div class='del'>-				compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";</div><div class='del'>-				reg = &lt;0x44230000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_MU1_B_GATE&gt;;</div><div class='del'>-				#mbox-cells = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			system_counter: timer@44290000 {</div><div class='del'>-				compatible = "nxp,sysctr-timer";</div><div class='del'>-				reg = &lt;0x44290000 0x30000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;osc_24m&gt;;</div><div class='del'>-				clock-names = "per";</div><div class='del'>-				nxp,no-divider;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wdog1: watchdog@442d0000 {</div><div class='del'>-				compatible = "fsl,imx93-wdt";</div><div class='del'>-				reg = &lt;0x442d0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_WDOG1_GATE&gt;;</div><div class='del'>-				timeout-sec = &lt;40&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wdog2: watchdog@442e0000 {</div><div class='del'>-				compatible = "fsl,imx93-wdt";</div><div class='del'>-				reg = &lt;0x442e0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_WDOG2_GATE&gt;;</div><div class='del'>-				timeout-sec = &lt;40&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm1: pwm@44310000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x44310000 0x1000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM1_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm2: pwm@44320000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x44320000 0x10000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM2_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i3c1: i3c@44330000 {</div><div class='del'>-				compatible = "silvaco,i3c-master-v1";</div><div class='del'>-				reg = &lt;0x44330000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				#address-cells = &lt;3&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_AON&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_I3C1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_I3C1_SLOW&gt;;</div><div class='del'>-				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c1: i2c@44340000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x44340000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 7 0 0&gt;, &lt;&amp;edma1 8 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c2: i2c@44350000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x44350000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C2_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 9 0 0&gt;, &lt;&amp;edma1 10 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi1: spi@44360000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x44360000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 11 0 0&gt;, &lt;&amp;edma1 12 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi2: spi@44370000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x44370000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI2_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_AON&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 13 0 0&gt;, &lt;&amp;edma1 14 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart1: serial@44380000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x44380000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART1_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 17 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 16 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart2: serial@44390000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x44390000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART2_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma1 19 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 18 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			flexcan1: can@443a0000 {</div><div class='del'>-				compatible = "fsl,imx93-flexcan";</div><div class='del'>-				reg = &lt;0x443a0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_AON&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_CAN1_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "per";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_CAN1&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;40000000&gt;;</div><div class='del'>-				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='del'>-				fsl,stop-mode = &lt;&amp;aonmix_ns_gpr 0x14 0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai1: sai@443b0000 {</div><div class='del'>-				compatible = "fsl,imx93-sai";</div><div class='del'>-				reg = &lt;0x443b0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_SAI1_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_SAI1_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='del'>-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma1 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 21 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			iomuxc: pinctrl@443c0000 {</div><div class='del'>-				compatible = "fsl,imx93-iomuxc";</div><div class='del'>-				reg = &lt;0x443c0000 0x10000&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bbnsm: bbnsm@44440000 {</div><div class='del'>-				compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";</div><div class='del'>-				reg = &lt;0x44440000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-				bbnsm_rtc: rtc {</div><div class='del'>-					compatible = "nxp,imx93-bbnsm-rtc";</div><div class='del'>-					interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				bbnsm_pwrkey: pwrkey {</div><div class='del'>-					compatible = "nxp,imx93-bbnsm-pwrkey";</div><div class='del'>-					interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-					linux,code = &lt;KEY_POWER&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clk: clock-controller@44450000 {</div><div class='del'>-				compatible = "fsl,imx93-ccm";</div><div class='del'>-				reg = &lt;0x44450000 0x10000&gt;;</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-				clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;osc_24m&gt;, &lt;&amp;clk_ext1&gt;;</div><div class='del'>-				clock-names = "osc_32k", "osc_24m", "clk_ext1";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;393216000&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			src: system-controller@44460000 {</div><div class='del'>-				compatible = "fsl,imx93-src", "syscon";</div><div class='del'>-				reg = &lt;0x44460000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;1&gt;;</div><div class='del'>-				ranges;</div><div class='del'>-</div><div class='del'>-				mlmix: power-domain@44461800 {</div><div class='del'>-					compatible = "fsl,imx93-src-slice";</div><div class='del'>-					reg = &lt;0x44461800 0x400&gt;, &lt;0x44464800 0x400&gt;;</div><div class='del'>-					#power-domain-cells = &lt;0&gt;;</div><div class='del'>-					clocks = &lt;&amp;clk IMX93_CLK_ML_APB&gt;,</div><div class='del'>-						 &lt;&amp;clk IMX93_CLK_ML&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				mediamix: power-domain@44462400 {</div><div class='del'>-					compatible = "fsl,imx93-src-slice";</div><div class='del'>-					reg = &lt;0x44462400 0x400&gt;, &lt;0x44465800 0x400&gt;;</div><div class='del'>-					#power-domain-cells = &lt;0&gt;;</div><div class='del'>-					clocks = &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='del'>-						 &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			clock-controller@44480000 {</div><div class='del'>-				compatible = "fsl,imx93-anatop";</div><div class='del'>-				reg = &lt;0x44480000 0x2000&gt;;</div><div class='del'>-				#clock-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tmu: tmu@44482000 {</div><div class='del'>-				compatible = "fsl,qoriq-tmu";</div><div class='del'>-				reg = &lt;0x44482000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TMC_GATE&gt;;</div><div class='del'>-				little-endian;</div><div class='del'>-				fsl,tmu-range = &lt;0x800000da 0x800000e9</div><div class='del'>-						 0x80000102 0x8000012a</div><div class='del'>-						 0x80000166 0x800001a7</div><div class='del'>-						 0x800001b6&gt;;</div><div class='del'>-				fsl,tmu-calibration = &lt;0x00000000 0x0000000e</div><div class='del'>-						       0x00000001 0x00000029</div><div class='del'>-						       0x00000002 0x00000056</div><div class='del'>-						       0x00000003 0x000000a2</div><div class='del'>-						       0x00000004 0x00000116</div><div class='del'>-						       0x00000005 0x00000195</div><div class='del'>-						       0x00000006 0x000001b2&gt;;</div><div class='del'>-				#thermal-sensor-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			micfil: micfil@44520000 {</div><div class='del'>-				compatible = "fsl,imx93-micfil";</div><div class='del'>-				reg = &lt;0x44520000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_PDM_IPG&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_PDM_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_AUDIO_PLL&gt;;</div><div class='del'>-				clock-names = "ipg_clk", "ipg_clk_app", "pll8k";</div><div class='del'>-				dmas = &lt;&amp;edma1 29 0 5&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			adc1: adc@44530000 {</div><div class='del'>-				compatible = "nxp,imx93-adc";</div><div class='del'>-				reg = &lt;0x44530000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_ADC1_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				#io-channel-cells = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		aips2: bus@42000000 {</div><div class='del'>-			compatible = "fsl,aips-bus", "simple-bus";</div><div class='del'>-			reg = &lt;0x42000000 0x800000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			edma2: dma-controller@42000000 {</div><div class='del'>-				compatible = "fsl,imx93-edma4";</div><div class='del'>-				reg = &lt;0x42000000 0x210000&gt;;</div><div class='del'>-				#dma-cells = &lt;3&gt;;</div><div class='del'>-				dma-channels = &lt;64&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_EDMA2_GATE&gt;;</div><div class='del'>-				clock-names = "dma";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wakeupmix_gpr: syscon@42420000 {</div><div class='del'>-				compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";</div><div class='del'>-				reg = &lt;0x42420000 0x1000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mu2: mailbox@42440000 {</div><div class='del'>-				compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";</div><div class='del'>-				reg = &lt;0x42440000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_MU2_B_GATE&gt;;</div><div class='del'>-				#mbox-cells = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wdog3: watchdog@42490000 {</div><div class='del'>-				compatible = "fsl,imx93-wdt";</div><div class='del'>-				reg = &lt;0x42490000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_WDOG3_GATE&gt;;</div><div class='del'>-				timeout-sec = &lt;40&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wdog4: watchdog@424a0000 {</div><div class='del'>-				compatible = "fsl,imx93-wdt";</div><div class='del'>-				reg = &lt;0x424a0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_WDOG4_GATE&gt;;</div><div class='del'>-				timeout-sec = &lt;40&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wdog5: watchdog@424b0000 {</div><div class='del'>-				compatible = "fsl,imx93-wdt";</div><div class='del'>-				reg = &lt;0x424b0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_WDOG5_GATE&gt;;</div><div class='del'>-				timeout-sec = &lt;40&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm3: pwm@424e0000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x424e0000 0x1000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM3_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm4: pwm@424f0000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x424f0000 0x10000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM4_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm5: pwm@42500000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x42500000 0x10000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM5_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tpm6: pwm@42510000 {</div><div class='del'>-				compatible = "fsl,imx7ulp-pwm";</div><div class='del'>-				reg = &lt;0x42510000 0x10000&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_TPM6_GATE&gt;;</div><div class='del'>-				#pwm-cells = &lt;3&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			i3c2: i3c@42520000 {</div><div class='del'>-				compatible = "silvaco,i3c-master-v1";</div><div class='del'>-				reg = &lt;0x42520000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				#address-cells = &lt;3&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_I3C2_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_I3C2_SLOW&gt;;</div><div class='del'>-				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c3: i2c@42530000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x42530000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C3_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 8 0 0&gt;, &lt;&amp;edma2 9 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c4: i2c@42540000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x42540000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C4_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 10 0 0&gt;, &lt;&amp;edma2 11 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi3: spi@42550000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x42550000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI3_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 12 0 0&gt;, &lt;&amp;edma2 13 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi4: spi@42560000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x42560000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI4_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 14 0 0&gt;, &lt;&amp;edma2 15 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart3: serial@42570000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x42570000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART3_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 18 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 17 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart4: serial@42580000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x42580000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART4_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 20 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 19 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart5: serial@42590000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x42590000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART5_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 22 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 21 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart6: serial@425a0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x425a0000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART6_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 24 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 23 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			flexcan2: can@425b0000 {</div><div class='del'>-				compatible = "fsl,imx93-flexcan";</div><div class='del'>-				reg = &lt;0x425b0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_CAN2_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "per";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_CAN2&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;40000000&gt;;</div><div class='del'>-				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='del'>-				fsl,stop-mode = &lt;&amp;wakeupmix_gpr 0x0c 2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			flexspi1: spi@425e0000 {</div><div class='del'>-				compatible = "nxp,imx8mm-fspi";</div><div class='del'>-				reg = &lt;0x425e0000 0x10000&gt;, &lt;0x28000000 0x10000000&gt;;</div><div class='del'>-				reg-names = "fspi_base", "fspi_mmap";</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_FLEXSPI1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_FLEXSPI1_GATE&gt;;</div><div class='del'>-				clock-names = "fspi_en", "fspi";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_FLEXSPI1&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai2: sai@42650000 {</div><div class='del'>-				compatible = "fsl,imx93-sai";</div><div class='del'>-				reg = &lt;0x42650000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_SAI2_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_SAI2_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='del'>-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma2 59 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 58 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sai3: sai@42660000 {</div><div class='del'>-				compatible = "fsl,imx93-sai";</div><div class='del'>-				reg = &lt;0x42660000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_SAI3_IPG&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_SAI3_GATE&gt;, &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;;</div><div class='del'>-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='del'>-				dmas = &lt;&amp;edma2 61 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 60 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			xcvr: xcvr@42680000 {</div><div class='del'>-				compatible = "fsl,imx93-xcvr";</div><div class='del'>-				reg = &lt;0x42680000 0x800&gt;,</div><div class='del'>-				      &lt;0x42680800 0x400&gt;,</div><div class='del'>-				      &lt;0x42680c00 0x080&gt;,</div><div class='del'>-				      &lt;0x42680e00 0x080&gt;;</div><div class='del'>-				reg-names = "ram", "regs", "rxfifo", "txfifo";</div><div class='del'>-				interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_SPDIF_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_DUMMY&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_AUD_XCVR_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "phy", "spba", "pll_ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 65 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 66 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart7: serial@42690000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x42690000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART7_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 88 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 87 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpuart8: serial@426a0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";</div><div class='del'>-				reg = &lt;0x426a0000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPUART8_GATE&gt;;</div><div class='del'>-				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 90 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 89 0 0&gt;;</div><div class='del'>-				dma-names = "rx", "tx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c5: i2c@426b0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x426b0000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C5_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 71 0 0&gt;, &lt;&amp;edma2 72 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c6: i2c@426c0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x426c0000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C6_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 73 0 0&gt;, &lt;&amp;edma2 74 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c7: i2c@426d0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x426d0000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C7_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 75 0 0&gt;, &lt;&amp;edma2 76 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpi2c8: i2c@426e0000 {</div><div class='del'>-				compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='del'>-				reg = &lt;0x426e0000 0x10000&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPI2C8_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 77 0 0&gt;, &lt;&amp;edma2 78 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi5: spi@426f0000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x426f0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI5_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 79 0 0&gt;, &lt;&amp;edma2 80 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi6: spi@42700000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x42700000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI6_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 81 0 0&gt;, &lt;&amp;edma2 82 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi7: spi@42710000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x42710000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI7_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 83 0 0&gt;, &lt;&amp;edma2 84 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lpspi8: spi@42720000 {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";</div><div class='del'>-				reg = &lt;0x42720000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_LPSPI8_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;;</div><div class='del'>-				clock-names = "per", "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 85 0 0&gt;, &lt;&amp;edma2 86 0 FSL_EDMA_RX&gt;;</div><div class='del'>-				dma-names = "tx", "rx";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		aips3: bus@42800000 {</div><div class='del'>-			compatible = "fsl,aips-bus", "simple-bus";</div><div class='del'>-			reg = &lt;0x42800000 0x800000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			usdhc1: mmc@42850000 {</div><div class='del'>-				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='del'>-				reg = &lt;0x42850000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_USDHC1_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "ahb", "per";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC1&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;400000000&gt;;</div><div class='del'>-				bus-width = &lt;8&gt;;</div><div class='del'>-				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usdhc2: mmc@42860000 {</div><div class='del'>-				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='del'>-				reg = &lt;0x42860000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_USDHC2_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "ahb", "per";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC2&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;400000000&gt;;</div><div class='del'>-				bus-width = &lt;4&gt;;</div><div class='del'>-				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			fec: ethernet@42890000 {</div><div class='del'>-				compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";</div><div class='del'>-				reg = &lt;0x42890000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_ENET1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET1_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_TIMER1&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_REF&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='del'>-				clock-names = "ipg", "ahb", "ptp",</div><div class='del'>-					      "enet_clk_ref", "enet_out";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_ENET_TIMER1&gt;,</div><div class='del'>-						  &lt;&amp;clk IMX93_CLK_ENET_REF&gt;,</div><div class='del'>-						  &lt;&amp;clk IMX93_CLK_ENET_REF_PHY&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='del'>-							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;,</div><div class='del'>-							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;, &lt;50000000&gt;;</div><div class='del'>-				fsl,num-tx-queues = &lt;3&gt;;</div><div class='del'>-				fsl,num-rx-queues = &lt;3&gt;;</div><div class='del'>-				fsl,stop-mode = &lt;&amp;wakeupmix_gpr 0x0c 1&gt;;</div><div class='del'>-				nvmem-cells = &lt;&amp;eth_mac1&gt;;</div><div class='del'>-				nvmem-cell-names = "mac-address";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			eqos: ethernet@428a0000 {</div><div class='del'>-				compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";</div><div class='del'>-				reg = &lt;0x428a0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "macirq", "eth_wake_irq";</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_TIMER2&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_ENET_QOS_GATE&gt;;</div><div class='del'>-				clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_ENET_TIMER2&gt;,</div><div class='del'>-						  &lt;&amp;clk IMX93_CLK_ENET&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;,</div><div class='del'>-							 &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD0_DIV2&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;100000000&gt;, &lt;250000000&gt;;</div><div class='del'>-				intf_mode = &lt;&amp;wakeupmix_gpr 0x28&gt;;</div><div class='del'>-				snps,clk-csr = &lt;6&gt;;</div><div class='del'>-				nvmem-cells = &lt;&amp;eth_mac2&gt;;</div><div class='del'>-				nvmem-cell-names = "mac-address";</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usdhc3: mmc@428b0000 {</div><div class='del'>-				compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";</div><div class='del'>-				reg = &lt;0x428b0000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk IMX93_CLK_BUS_WAKEUP&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_WAKEUP_AXI&gt;,</div><div class='del'>-					 &lt;&amp;clk IMX93_CLK_USDHC3_GATE&gt;;</div><div class='del'>-				clock-names = "ipg", "ahb", "per";</div><div class='del'>-				assigned-clocks = &lt;&amp;clk IMX93_CLK_USDHC3&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;400000000&gt;;</div><div class='del'>-				bus-width = &lt;4&gt;;</div><div class='del'>-				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step = &lt;2&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio2: gpio@43810000 {</div><div class='del'>-			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='del'>-			reg = &lt;0x43810000 0x1000&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_GPIO2_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_GPIO2_GATE&gt;;</div><div class='del'>-			clock-names = "gpio", "port";</div><div class='del'>-			gpio-ranges = &lt;&amp;iomuxc 0 4 30&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio3: gpio@43820000 {</div><div class='del'>-			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='del'>-			reg = &lt;0x43820000 0x1000&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_GPIO3_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_GPIO3_GATE&gt;;</div><div class='del'>-			clock-names = "gpio", "port";</div><div class='del'>-			gpio-ranges = &lt;&amp;iomuxc 0 84 8&gt;, &lt;&amp;iomuxc 8 66 18&gt;,</div><div class='del'>-				      &lt;&amp;iomuxc 26 34 2&gt;, &lt;&amp;iomuxc 28 0 4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio4: gpio@43830000 {</div><div class='del'>-			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='del'>-			reg = &lt;0x43830000 0x1000&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_GPIO4_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_GPIO4_GATE&gt;;</div><div class='del'>-			clock-names = "gpio", "port";</div><div class='del'>-			gpio-ranges = &lt;&amp;iomuxc 0 38 28&gt;, &lt;&amp;iomuxc 28 36 2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio1: gpio@47400000 {</div><div class='del'>-			compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";</div><div class='del'>-			reg = &lt;0x47400000 0x1000&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_GPIO1_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_GPIO1_GATE&gt;;</div><div class='del'>-			clock-names = "gpio", "port";</div><div class='del'>-			gpio-ranges = &lt;&amp;iomuxc 0 92 16&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ocotp: efuse@47510000 {</div><div class='del'>-			compatible = "fsl,imx93-ocotp", "syscon";</div><div class='del'>-			reg = &lt;0x47510000 0x10000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			eth_mac1: mac-address@4ec {</div><div class='del'>-				reg = &lt;0x4ec 0x6&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			eth_mac2: mac-address@4f2 {</div><div class='del'>-				reg = &lt;0x4f2 0x6&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		s4muap: mailbox@47520000 {</div><div class='del'>-			compatible = "fsl,imx93-mu-s4";</div><div class='del'>-			reg = &lt;0x47520000 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "tx", "rx";</div><div class='del'>-			#mbox-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		media_blk_ctrl: system-controller@4ac10000 {</div><div class='del'>-			compatible = "fsl,imx93-media-blk-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x4ac10000 0x10000&gt;;</div><div class='del'>-			power-domains = &lt;&amp;mediamix&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_MEDIA_AXI&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_MEDIA_DISP_PIX&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_CAM_PIX&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_PXP_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_LCDIF_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_ISI_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_MIPI_CSI_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_MIPI_DSI_GATE&gt;;</div><div class='del'>-			clock-names = "apb", "axi", "nic", "disp", "cam",</div><div class='del'>-				      "pxp", "lcdif", "isi", "csi", "dsi";</div><div class='del'>-			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbotg1: usb@4c100000 {</div><div class='del'>-			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='del'>-			reg = &lt;0x4c100000 0x200&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='del'>-			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='del'>-			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;133000000&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphynop1&gt;;</div><div class='del'>-			fsl,usbmisc = &lt;&amp;usbmisc1 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbmisc1: usbmisc@4c100200 {</div><div class='del'>-			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='del'>-				     "fsl,imx6q-usbmisc";</div><div class='del'>-			reg = &lt;0x4c100200 0x200&gt;;</div><div class='del'>-			#index-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbotg2: usb@4c200000 {</div><div class='del'>-			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='del'>-			reg = &lt;0x4c200000 0x200&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk IMX93_CLK_USB_CONTROLLER_GATE&gt;,</div><div class='del'>-				 &lt;&amp;clk IMX93_CLK_HSIO_32K_GATE&gt;;</div><div class='del'>-			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='del'>-			assigned-clocks = &lt;&amp;clk IMX93_CLK_HSIO&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;clk IMX93_CLK_SYS_PLL_PFD1_DIV2&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;133000000&gt;;</div><div class='del'>-			phys = &lt;&amp;usbphynop2&gt;;</div><div class='del'>-			fsl,usbmisc = &lt;&amp;usbmisc2 0&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbmisc2: usbmisc@4c200200 {</div><div class='del'>-			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",</div><div class='del'>-				     "fsl,imx6q-usbmisc";</div><div class='del'>-			reg = &lt;0x4c200200 0x200&gt;;</div><div class='del'>-			#index-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ddr-pmu@4e300dc0 {</div><div class='del'>-			compatible = "fsl,imx93-ddr-pmu";</div><div class='del'>-			reg = &lt;0x4e300dc0 0x200&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;src {</div><div class='add'>+	mlmix: power-domain@44461800 {</div><div class='add'>+		compatible = "fsl,imx93-src-slice";</div><div class='add'>+		reg = &lt;0x44461800 0x400&gt;, &lt;0x44464800 0x400&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk IMX93_CLK_ML_APB&gt;,</div><div class='add'>+			 &lt;&amp;clk IMX93_CLK_ML&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx94-clock.h b/arch/arm64/boot/dts/freescale/imx94-clock.h<br/>new file mode 100644<br/>index 000000000000..27e8c0839722<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx94-clock.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx94-clock.h</a></div><div class='hunk'>@@ -0,0 +1,193 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024-2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __IMX94_CLOCK_H</div><div class='add'>+#define __IMX94_CLOCK_H</div><div class='add'>+</div><div class='add'>+#define IMX94_CLK_EXT				0</div><div class='add'>+#define IMX94_CLK_32K				1</div><div class='add'>+#define IMX94_CLK_24M				2</div><div class='add'>+#define IMX94_CLK_FRO				3</div><div class='add'>+#define IMX94_CLK_SYSPLL1_VCO			4</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD0_UNGATED		5</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD0			6</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD0_DIV2		7</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD1_UNGATED		8</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD1			9</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD1_DIV2		10</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD2_UNGATED		11</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD2			12</div><div class='add'>+#define IMX94_CLK_SYSPLL1_PFD2_DIV2		13</div><div class='add'>+#define IMX94_CLK_AUDIOPLL1_VCO			14</div><div class='add'>+#define IMX94_CLK_AUDIOPLL1			15</div><div class='add'>+#define IMX94_CLK_AUDIOPLL2_VCO			16</div><div class='add'>+#define IMX94_CLK_AUDIOPLL2			17</div><div class='add'>+#define IMX94_CLK_RESERVED18			18</div><div class='add'>+#define IMX94_CLK_RESERVED19			19</div><div class='add'>+#define IMX94_CLK_RESERVED20			20</div><div class='add'>+#define IMX94_CLK_RESERVED21			21</div><div class='add'>+#define IMX94_CLK_RESERVED22			22</div><div class='add'>+#define IMX94_CLK_RESERVED23			23</div><div class='add'>+#define IMX94_CLK_ENCPLL_VCO			24</div><div class='add'>+#define IMX94_CLK_ENCPLL_PFD0_UNGATED		25</div><div class='add'>+#define IMX94_CLK_ENCPLL_PFD0			26</div><div class='add'>+#define IMX94_CLK_ENCPLL_PFD1_UNGATED		27</div><div class='add'>+#define IMX94_CLK_ENCPLL_PFD1			28</div><div class='add'>+#define IMX94_CLK_ARMPLL_VCO			29</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD0_UNGATED		30</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD0			31</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD1_UNGATED		32</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD1			33</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD2_UNGATED		34</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD2			35</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD3_UNGATED		36</div><div class='add'>+#define IMX94_CLK_ARMPLL_PFD3			37</div><div class='add'>+#define IMX94_CLK_DRAMPLL_VCO			38</div><div class='add'>+#define IMX94_CLK_DRAMPLL			39</div><div class='add'>+#define IMX94_CLK_HSIOPLL_VCO			40</div><div class='add'>+#define IMX94_CLK_HSIOPLL			41</div><div class='add'>+#define IMX94_CLK_LDBPLL_VCO			42</div><div class='add'>+#define IMX94_CLK_LDBPLL			43</div><div class='add'>+#define IMX94_CLK_EXT1				44</div><div class='add'>+#define IMX94_CLK_EXT2				45</div><div class='add'>+#define IMX94_CLK_ADC				46</div><div class='add'>+#define IMX94_CLK_BUSAON			47</div><div class='add'>+#define IMX94_CLK_CAN1				48</div><div class='add'>+#define IMX94_CLK_GLITCHFILTER			49</div><div class='add'>+#define IMX94_CLK_GPT1				50</div><div class='add'>+#define IMX94_CLK_I3C1SLOW			51</div><div class='add'>+#define IMX94_CLK_LPI2C1			52</div><div class='add'>+#define IMX94_CLK_LPI2C2			53</div><div class='add'>+#define IMX94_CLK_LPSPI1			54</div><div class='add'>+#define IMX94_CLK_LPSPI2			55</div><div class='add'>+#define IMX94_CLK_LPTMR1			56</div><div class='add'>+#define IMX94_CLK_LPUART1			57</div><div class='add'>+#define IMX94_CLK_LPUART2			58</div><div class='add'>+#define IMX94_CLK_M33				59</div><div class='add'>+#define IMX94_CLK_M33SYSTICK			60</div><div class='add'>+#define IMX94_CLK_PDM				61</div><div class='add'>+#define IMX94_CLK_SAI1				62</div><div class='add'>+#define IMX94_CLK_TPM2				63</div><div class='add'>+#define IMX94_CLK_A55				64</div><div class='add'>+#define IMX94_CLK_A55MTRBUS			65</div><div class='add'>+#define IMX94_CLK_A55PERIPH			66</div><div class='add'>+#define IMX94_CLK_DRAMALT			67</div><div class='add'>+#define IMX94_CLK_DRAMAPB			68</div><div class='add'>+#define IMX94_CLK_DISPAPB			69</div><div class='add'>+#define IMX94_CLK_DISPAXI			70</div><div class='add'>+#define IMX94_CLK_DISPPIX			71</div><div class='add'>+#define IMX94_CLK_HSIOACSCAN480M		72</div><div class='add'>+#define IMX94_CLK_HSIOACSCAN80M			73</div><div class='add'>+#define IMX94_CLK_HSIO				74</div><div class='add'>+#define IMX94_CLK_HSIOPCIEAUX			75</div><div class='add'>+#define IMX94_CLK_HSIOPCIETEST160M		76</div><div class='add'>+#define IMX94_CLK_HSIOPCIETEST400M		77</div><div class='add'>+#define IMX94_CLK_HSIOPCIETEST500M		78</div><div class='add'>+#define IMX94_CLK_HSIOPCIETEST50M		79</div><div class='add'>+#define IMX94_CLK_HSIOUSBTEST60M		80</div><div class='add'>+#define IMX94_CLK_BUSM70			81</div><div class='add'>+#define IMX94_CLK_M70				82</div><div class='add'>+#define IMX94_CLK_M70SYSTICK			83</div><div class='add'>+#define IMX94_CLK_BUSM71			84</div><div class='add'>+#define IMX94_CLK_M71				85</div><div class='add'>+#define IMX94_CLK_M71SYSTICK			86</div><div class='add'>+#define IMX94_CLK_BUSNETCMIX			87</div><div class='add'>+#define IMX94_CLK_ECAT				88</div><div class='add'>+#define IMX94_CLK_ENET				89</div><div class='add'>+#define IMX94_CLK_ENETPHYTEST200M		90</div><div class='add'>+#define IMX94_CLK_ENETPHYTEST500M		91</div><div class='add'>+#define IMX94_CLK_ENETPHYTEST667M		92</div><div class='add'>+#define IMX94_CLK_ENETREF			93</div><div class='add'>+#define IMX94_CLK_ENETTIMER1			94</div><div class='add'>+#define IMX94_CLK_ENETTIMER2			95</div><div class='add'>+#define IMX94_CLK_ENETTIMER3			96</div><div class='add'>+#define IMX94_CLK_FLEXIO3			97</div><div class='add'>+#define IMX94_CLK_FLEXIO4			98</div><div class='add'>+#define IMX94_CLK_M33SYNC			99</div><div class='add'>+#define IMX94_CLK_M33SYNCSYSTICK		100</div><div class='add'>+#define IMX94_CLK_MAC0				101</div><div class='add'>+#define IMX94_CLK_MAC1				102</div><div class='add'>+#define IMX94_CLK_MAC2				103</div><div class='add'>+#define IMX94_CLK_MAC3				104</div><div class='add'>+#define IMX94_CLK_MAC4				105</div><div class='add'>+#define IMX94_CLK_MAC5				106</div><div class='add'>+#define IMX94_CLK_NOCAPB			107</div><div class='add'>+#define IMX94_CLK_NOC				108</div><div class='add'>+#define IMX94_CLK_NPUAPB			109</div><div class='add'>+#define IMX94_CLK_NPU				110</div><div class='add'>+#define IMX94_CLK_CCMCKO1			111</div><div class='add'>+#define IMX94_CLK_CCMCKO2			112</div><div class='add'>+#define IMX94_CLK_CCMCKO3			113</div><div class='add'>+#define IMX94_CLK_CCMCKO4			114</div><div class='add'>+#define IMX94_CLK_BISS				115</div><div class='add'>+#define IMX94_CLK_BUSWAKEUP			116</div><div class='add'>+#define IMX94_CLK_CAN2				117</div><div class='add'>+#define IMX94_CLK_CAN3				118</div><div class='add'>+#define IMX94_CLK_CAN4				119</div><div class='add'>+#define IMX94_CLK_CAN5				120</div><div class='add'>+#define IMX94_CLK_ENDAT21			121</div><div class='add'>+#define IMX94_CLK_ENDAT22			122</div><div class='add'>+#define IMX94_CLK_ENDAT31FAST			123</div><div class='add'>+#define IMX94_CLK_ENDAT31SLOW			124</div><div class='add'>+#define IMX94_CLK_FLEXIO1			125</div><div class='add'>+#define IMX94_CLK_FLEXIO2			126</div><div class='add'>+#define IMX94_CLK_GPT2				127</div><div class='add'>+#define IMX94_CLK_GPT3				128</div><div class='add'>+#define IMX94_CLK_GPT4				129</div><div class='add'>+#define IMX94_CLK_HIPERFACE1			130</div><div class='add'>+#define IMX94_CLK_HIPERFACE1SYNC		131</div><div class='add'>+#define IMX94_CLK_HIPERFACE2			132</div><div class='add'>+#define IMX94_CLK_HIPERFACE2SYNC		133</div><div class='add'>+#define IMX94_CLK_I3C2SLOW			134</div><div class='add'>+#define IMX94_CLK_LPI2C3			135</div><div class='add'>+#define IMX94_CLK_LPI2C4			136</div><div class='add'>+#define IMX94_CLK_LPI2C5			137</div><div class='add'>+#define IMX94_CLK_LPI2C6			138</div><div class='add'>+#define IMX94_CLK_LPI2C7			139</div><div class='add'>+#define IMX94_CLK_LPI2C8			140</div><div class='add'>+#define IMX94_CLK_LPSPI3			141</div><div class='add'>+#define IMX94_CLK_LPSPI4			142</div><div class='add'>+#define IMX94_CLK_LPSPI5			143</div><div class='add'>+#define IMX94_CLK_LPSPI6			144</div><div class='add'>+#define IMX94_CLK_LPSPI7			145</div><div class='add'>+#define IMX94_CLK_LPSPI8			146</div><div class='add'>+#define IMX94_CLK_LPTMR2			147</div><div class='add'>+#define IMX94_CLK_LPUART10			148</div><div class='add'>+#define IMX94_CLK_LPUART11			149</div><div class='add'>+#define IMX94_CLK_LPUART12			150</div><div class='add'>+#define IMX94_CLK_LPUART3			151</div><div class='add'>+#define IMX94_CLK_LPUART4			152</div><div class='add'>+#define IMX94_CLK_LPUART5			153</div><div class='add'>+#define IMX94_CLK_LPUART6			154</div><div class='add'>+#define IMX94_CLK_LPUART7			155</div><div class='add'>+#define IMX94_CLK_LPUART8			156</div><div class='add'>+#define IMX94_CLK_LPUART9			157</div><div class='add'>+#define IMX94_CLK_SAI2				158</div><div class='add'>+#define IMX94_CLK_SAI3				159</div><div class='add'>+#define IMX94_CLK_SAI4				160</div><div class='add'>+#define IMX94_CLK_SWOTRACE			161</div><div class='add'>+#define IMX94_CLK_TPM4				162</div><div class='add'>+#define IMX94_CLK_TPM5				163</div><div class='add'>+#define IMX94_CLK_TPM6				164</div><div class='add'>+#define IMX94_CLK_USBPHYBURUNIN			165</div><div class='add'>+#define IMX94_CLK_USDHC1			166</div><div class='add'>+#define IMX94_CLK_USDHC2			167</div><div class='add'>+#define IMX94_CLK_USDHC3			168</div><div class='add'>+#define IMX94_CLK_V2XPK				169</div><div class='add'>+#define IMX94_CLK_WAKEUPAXI			170</div><div class='add'>+#define IMX94_CLK_XSPISLVROOT			171</div><div class='add'>+#define IMX94_CLK_XSPI1				172</div><div class='add'>+#define IMX94_CLK_XSPI2				173</div><div class='add'>+#define IMX94_CLK_SEL_EXT			174</div><div class='add'>+#define IMX94_CLK_SEL_A55C0			175</div><div class='add'>+#define IMX94_CLK_SEL_A55C1			176</div><div class='add'>+#define IMX94_CLK_SEL_A55C2			177</div><div class='add'>+#define IMX94_CLK_SEL_A55C3			178</div><div class='add'>+#define IMX94_CLK_SEL_A55P			179</div><div class='add'>+#define IMX94_CLK_SEL_DRAM			180</div><div class='add'>+#define IMX94_CLK_SEL_TEMPSENSE			181</div><div class='add'>+#define IMX94_CLK_NPU_CGC			182</div><div class='add'>+</div><div class='add'>+#endif /* __IMX94_CLOCK_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx94-pinfunc.h b/arch/arm64/boot/dts/freescale/imx94-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..00255db89185<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx94-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx94-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,1570 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024-2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DTS_IMX94_PINFUNC_H</div><div class='add'>+#define __DTS_IMX94_PINFUNC_H</div><div class='add'>+</div><div class='add'>+/* Drive Strength */</div><div class='add'>+#define IMX94_DSE_X1		0x2</div><div class='add'>+#define IMX94_DSE_X2		0x6</div><div class='add'>+#define IMX94_DSE_X3		0xe</div><div class='add'>+#define IMX94_DSE_X4		0x1e</div><div class='add'>+#define IMX94_DSE_X5		0x3e</div><div class='add'>+#define IMX94_DSE_X6		0x7e</div><div class='add'>+</div><div class='add'>+/* Slew Rate */</div><div class='add'>+#define IMX94_FSEL_FAST		0x180</div><div class='add'>+#define IMX94_FSEL_SLOW		0x100</div><div class='add'>+</div><div class='add'>+/* Pull Up */</div><div class='add'>+#define IMX94_PU_ENABLE		0x200</div><div class='add'>+#define IMX94_PU_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+/* Pull Down */</div><div class='add'>+#define IMX94_PD_ENABLE		0x400</div><div class='add'>+#define IMX94_PD_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+/* Open Drain */</div><div class='add'>+#define IMX94_OD_ENABLE		0x800</div><div class='add'>+#define IMX94_OD_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+/* Schmitt trigger */</div><div class='add'>+#define IMX94_HYS_SCHMITT	0x1000</div><div class='add'>+#define IMX94_HYS_NO_SCHMITT	0x0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The pin function ID is a tuple of &lt;mux_reg conf_reg input_reg mux_mode input_val&gt;</div><div class='add'>+ */</div><div class='add'>+#define IMX94_PAD_DAP_TDI__JTAG_MUX_TDI                     0x0000 0x0304 0x092c 0x00 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__MQS2_LEFT                        0x0000 0x0304 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__ECAT_LED_ERR                     0x0000 0x0304 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__CAN2_TX                          0x0000 0x0304 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__SINC_FILTER_GLUE3_BREAK          0x0000 0x0304 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__GPIO4_IO4                        0x0000 0x0304 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__LPUART5_RX                       0x0000 0x0304 0x07bc 0x06 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDI__XBAR1_XBAR_INOUT26               0x0000 0x0304 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS               0x0004 0x0308 0x0930 0x00 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__CAN5_TX                    0x0004 0x0308 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__GPT_MUX_INOUT10            0x0004 0x0308 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__LPUART8_TX                 0x0004 0x0308 0x07dc 0x03 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__SINC3_MOD_CLK1             0x0004 0x0308 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__GPIO4_IO5                  0x0004 0x0308 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B              0x0004 0x0308 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TMS_SWDIO__XBAR1_XBAR_INOUT27         0x0004 0x0308 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__JTAG_MUX_TCK              0x0008 0x030c 0x0928 0x00 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__CAN5_RX                   0x0008 0x030c 0x0688 0x01 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__GPT_MUX_INOUT11           0x0008 0x030c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__LPUART8_RX                0x0008 0x030c 0x07d8 0x03 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__SINC3_MOD_CLK0            0x0008 0x030c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__GPIO4_IO6                 0x0008 0x030c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B             0x0008 0x030c 0x07b8 0x06 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TCLK_SWCLK__XBAR1_XBAR_INOUT28        0x0008 0x030c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__JTAG_MUX_TDO            0x000c 0x0310 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__MQS2_RIGHT              0x000c 0x0310 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__ECAT_RESET_OUT          0x000c 0x0310 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__CAN2_RX                 0x000c 0x0310 0x067c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__SINC3_MOD_CLK2          0x000c 0x0310 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__GPIO4_IO7               0x000c 0x0310 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__LPUART5_TX              0x000c 0x0310 0x07c0 0x06 0x00</div><div class='add'>+#define IMX94_PAD_DAP_TDO_TRACESWO__XBAR1_XBAR_INOUT29      0x000c 0x0310 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__GPIO2_IO0                      0x0010 0x0314 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__I3C2_PUR                       0x0010 0x0314 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__XBAR1_XBAR_INOUT39             0x0010 0x0314 0x08d4 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__I3C2_PUR_B                     0x0010 0x0314 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__LPSPI6_PCS0                    0x0010 0x0314 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__LPUART5_TX                     0x0010 0x0314 0x07c0 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__LPI2C5_SDA                     0x0010 0x0314 0x0740 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO00__FLEXIO1_FLEXIO0                0x0010 0x0314 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__GPIO2_IO1                      0x0014 0x0318 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__I3C2_SCL                       0x0014 0x0318 0x0720 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__XBAR1_XBAR_INOUT40             0x0014 0x0318 0x08d8 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__EWM_OUT_B                      0x0014 0x0318 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__LPSPI6_SIN                     0x0014 0x0318 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__LPUART5_RX                     0x0014 0x0318 0x07bc 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__LPI2C5_SCL                     0x0014 0x0318 0x073c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO01__FLEXIO1_FLEXIO1                0x0014 0x0318 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__GPIO2_IO2                      0x0018 0x031c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__I3C2_SDA                       0x0018 0x031c 0x0724 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__XBAR1_XBAR_INOUT41             0x0018 0x031c 0x08dc 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__GPT_MUX_INOUT1                 0x0018 0x031c 0x0700 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__LPSPI6_SOUT                    0x0018 0x031c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__LPUART5_CTS_B                  0x0018 0x031c 0x07b8 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__LPI2C6_SDA                     0x0018 0x031c 0x074c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO02__FLEXIO1_FLEXIO2                0x0018 0x031c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__GPIO2_IO3                      0x001c 0x0320 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__EWM_OUT_B                      0x001c 0x0320 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__XBAR1_XBAR_INOUT42             0x001c 0x0320 0x08e0 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__GPT_MUX_INOUT4                 0x001c 0x0320 0x0708 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__LPSPI6_SCK                     0x001c 0x0320 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__LPUART5_RTS_B                  0x001c 0x0320 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__LPI2C6_SCL                     0x001c 0x0320 0x0748 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO03__FLEXIO1_FLEXIO3                0x001c 0x0320 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__GPIO2_IO4                      0x0020 0x0324 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__TPM3_CH0                       0x0020 0x0324 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__PDM_CLK                        0x0020 0x0324 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__GPT_MUX_INOUT5                 0x0020 0x0324 0x070c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__LPSPI7_PCS0                    0x0020 0x0324 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__LPUART6_TX                     0x0020 0x0324 0x07cc 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__LPI2C6_SDA                     0x0020 0x0324 0x074c 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO04__FLEXIO1_FLEXIO4                0x0020 0x0324 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__GPIO2_IO5                      0x0024 0x0328 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__TPM4_CH0                       0x0024 0x0328 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__PDM_BIT_STREAM0                0x0024 0x0328 0x0610 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__GPT_MUX_INOUT7                 0x0024 0x0328 0x0714 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__LPSPI7_SIN                     0x0024 0x0328 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__LPUART6_RX                     0x0024 0x0328 0x07c8 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__LPI2C6_SCL                     0x0024 0x0328 0x0748 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO05__FLEXIO1_FLEXIO5                0x0024 0x0328 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__GPIO2_IO6                      0x0028 0x032c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__TPM5_CH0                       0x0028 0x032c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__PDM_BIT_STREAM1                0x0028 0x032c 0x0614 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__GPT_MUX_INOUT8                 0x0028 0x032c 0x0718 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__LPSPI7_SOUT                    0x0028 0x032c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__LPUART6_CTS_B                  0x0028 0x032c 0x07c4 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__LPI2C7_SDA                     0x0028 0x032c 0x0754 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO06__FLEXIO1_FLEXIO6                0x0028 0x032c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__GPIO2_IO7                      0x002c 0x0330 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__LPSPI3_PCS1                    0x002c 0x0330 0x0768 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__XBAR1_XBAR_INOUT43             0x002c 0x0330 0x08e4 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__GPT_MUX_INOUT3                 0x002c 0x0330 0x0704 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__LPSPI7_SCK                     0x002c 0x0330 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__LPUART6_RTS_B                  0x002c 0x0330 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__LPI2C7_SCL                     0x002c 0x0330 0x0750 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO07__FLEXIO1_FLEXIO7                0x002c 0x0330 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__GPIO2_IO8                      0x0030 0x0334 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__LPSPI3_PCS0                    0x0030 0x0334 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__USDHC2_WP                      0x0030 0x0334 0x0854 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__GPT_MUX_INOUT2                 0x0030 0x0334 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__TPM6_CH0                       0x0030 0x0334 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__LPUART7_TX                     0x0030 0x0334 0x07d4 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__LPI2C7_SDA                     0x0030 0x0334 0x0754 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO08__FLEXIO1_FLEXIO8                0x0030 0x0334 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__GPIO2_IO9                      0x0034 0x0338 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__LPSPI3_SIN                     0x0034 0x0338 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__XBAR1_XBAR_INOUT44             0x0034 0x0338 0x08e8 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__GPT_MUX_INOUT0                 0x0034 0x0338 0x06fc 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__TPM3_EXTCLK                    0x0034 0x0338 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__LPUART7_RX                     0x0034 0x0338 0x07d0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__LPI2C7_SCL                     0x0034 0x0338 0x0750 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO09__FLEXIO1_FLEXIO9                0x0034 0x0338 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__GPIO2_IO10                     0x0038 0x033c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__LPSPI3_SOUT                    0x0038 0x033c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__XBAR1_XBAR_INOUT45             0x0038 0x033c 0x08ec 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__GPT_MUX_INOUT6                 0x0038 0x033c 0x0710 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__TPM4_EXTCLK                    0x0038 0x033c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__LPUART7_CTS_B                  0x0038 0x033c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__LPI2C8_SDA                     0x0038 0x033c 0x075c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO10__FLEXIO1_FLEXIO10               0x0038 0x033c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__GPIO2_IO11                     0x003c 0x0340 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__LPSPI3_SCK                     0x003c 0x0340 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__XBAR1_XBAR_INOUT46             0x003c 0x0340 0x08f0 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__GPT_MUX_INOUT9                 0x003c 0x0340 0x071c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__TPM5_EXTCLK                    0x003c 0x0340 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__LPUART7_RTS_B                  0x003c 0x0340 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__LPI2C8_SCL                     0x003c 0x0340 0x0758 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO11__FLEXIO1_FLEXIO11               0x003c 0x0340 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__GPIO2_IO12                     0x0040 0x0344 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__TPM3_CH2                       0x0040 0x0344 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__PDM_BIT_STREAM2                0x0040 0x0344 0x0618 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__FLEXIO1_FLEXIO12               0x0040 0x0344 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__LPSPI8_PCS0                    0x0040 0x0344 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__LPUART8_TX                     0x0040 0x0344 0x07dc 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO12__LPI2C8_SDA                     0x0040 0x0344 0x075c 0x06 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__GPIO2_IO13                     0x0044 0x0348 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__TPM4_CH2                       0x0044 0x0348 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__PDM_BIT_STREAM3                0x0044 0x0348 0x061c 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__XBAR1_XBAR_INOUT47             0x0044 0x0348 0x08f4 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__LPSPI8_SIN                     0x0044 0x0348 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__LPUART8_RX                     0x0044 0x0348 0x07d8 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__LPI2C8_SCL                     0x0044 0x0348 0x0758 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO13__FLEXIO1_FLEXIO13               0x0044 0x0348 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__GPIO2_IO14                     0x0048 0x034c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__LPUART10_CTS_B                 0x0048 0x034c 0x078c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__ECAT_SDA                       0x0048 0x034c 0x062c 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__XBAR1_XBAR_INOUT48             0x0048 0x034c 0x08f8 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__LPSPI8_SOUT                    0x0048 0x034c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__LPUART8_CTS_B                  0x0048 0x034c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__LPUART4_TX                     0x0048 0x034c 0x07b4 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO14__FLEXIO1_FLEXIO14               0x0048 0x034c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__GPIO2_IO15                     0x004c 0x0350 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__LPUART10_RTS_B                 0x004c 0x0350 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__ECAT_SCL                       0x004c 0x0350 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__XBAR1_XBAR_INOUT8              0x004c 0x0350 0x087c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__LPSPI8_SCK                     0x004c 0x0350 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__LPUART8_RTS_B                  0x004c 0x0350 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__LPUART4_RX                     0x004c 0x0350 0x07b0 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO15__FLEXIO1_FLEXIO15               0x004c 0x0350 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__GPIO2_IO16                     0x0050 0x0354 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__LPI2C3_SDA                     0x0050 0x0354 0x0730 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__CAN3_TX                        0x0050 0x0354 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__EWM_OUT_B                      0x0050 0x0354 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__LPUART11_TX                    0x0050 0x0354 0x079c 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__GPT_MUX_INOUT0                 0x0050 0x0354 0x06fc 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__FLEXPWM4_PWMA0                 0x0050 0x0354 0x06d4 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO16__XBAR1_XBAR_INOUT30             0x0050 0x0354 0x08b0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__GPIO2_IO17                     0x0054 0x0358 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__LPI2C3_SCL                     0x0054 0x0358 0x072c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__CAN3_RX                        0x0054 0x0358 0x0680 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__LPI2C6_HREQ                    0x0054 0x0358 0x0744 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__LPUART11_RX                    0x0054 0x0358 0x0798 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__GPT_MUX_INOUT3                 0x0054 0x0358 0x0704 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__FLEXPWM4_PWMB0                 0x0054 0x0358 0x06e4 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO17__XBAR1_XBAR_INOUT31             0x0054 0x0358 0x08b4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__GPIO2_IO18                     0x0058 0x035c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__LPI2C4_SDA                     0x0058 0x035c 0x0738 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__LPUART10_TX                    0x0058 0x035c 0x0794 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__LPI2C7_HREQ                    0x0058 0x035c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__LPUART11_CTS_B                 0x0058 0x035c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__GPT_MUX_INOUT6                 0x0058 0x035c 0x0710 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__FLEXPWM4_PWMA1                 0x0058 0x035c 0x06d8 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO18__XBAR1_XBAR_INOUT32             0x0058 0x035c 0x08b8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__GPIO2_IO19                     0x005c 0x0360 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__LPI2C4_SCL                     0x005c 0x0360 0x0734 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__LPUART10_RX                    0x005c 0x0360 0x0790 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__LPI2C8_HREQ                    0x005c 0x0360 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__LPUART11_RTS_B                 0x005c 0x0360 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__GPT_MUX_INOUT9                 0x005c 0x0360 0x071c 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__FLEXPWM4_PWMB1                 0x005c 0x0360 0x06e8 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO19__XBAR1_XBAR_INOUT33             0x005c 0x0360 0x08bc 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__GPIO2_IO20                     0x0060 0x0364 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__PCIE1_CLKREQ_B                 0x0060 0x0364 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__LPUART6_TX                     0x0060 0x0364 0x07cc 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__LPI2C8_SDA                     0x0060 0x0364 0x075c 0x03 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__LPSPI4_PCS2                    0x0060 0x0364 0x076c 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__LPSPI3_PCS1                    0x0060 0x0364 0x0768 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__FLEXPWM4_PWMA2                 0x0060 0x0364 0x06dc 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO20__XBAR1_XBAR_INOUT34             0x0060 0x0364 0x08c0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__GPIO2_IO21                     0x0064 0x0368 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__SAI2_TX_BCLK                   0x0064 0x0368 0x07f8 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__LPUART6_RX                     0x0064 0x0368 0x07c8 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__LPI2C8_SCL                     0x0064 0x0368 0x0758 0x03 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__LPSPI4_PCS1                    0x0064 0x0368 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__LPI2C3_HREQ                    0x0064 0x0368 0x0728 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__FLEXPWM4_PWMB2                 0x0064 0x0368 0x06ec 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO21__XBAR1_XBAR_INOUT35             0x0064 0x0368 0x08c4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__GPIO2_IO22                     0x0068 0x036c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__SAI2_MCLK                      0x0068 0x036c 0x07e8 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__LPUART6_CTS_B                  0x0068 0x036c 0x07c4 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__XBAR1_XBAR_INOUT9              0x0068 0x036c 0x0880 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__LPSPI4_PCS0                    0x0068 0x036c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__FLEXPWM3_PWMA3                 0x0068 0x036c 0x06b4 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__FLEXPWM4_PWMA3                 0x0068 0x036c 0x06e0 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO22__SINC4_EMCLK0                   0x0068 0x036c 0x082c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__GPIO2_IO23                     0x006c 0x0370 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__PCIE2_CLKREQ_B                 0x006c 0x0370 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__LPUART6_RTS_B                  0x006c 0x0370 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__XBAR1_XBAR_INOUT10             0x006c 0x0370 0x0884 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__LPSPI4_SIN                     0x006c 0x0370 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__FLEXPWM3_PWMB3                 0x006c 0x0370 0x06c4 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__FLEXPWM4_PWMB3                 0x006c 0x0370 0x06f0 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO23__SINC4_EMBIT0                   0x006c 0x0370 0x0820 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__GPIO2_IO24                     0x0070 0x0374 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__SAI2_RX_BCLK                   0x0070 0x0374 0x07ec 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__LPUART11_TX                    0x0070 0x0374 0x079c 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__LPI2C3_HREQ                    0x0070 0x0374 0x0728 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__LPSPI4_SOUT                    0x0070 0x0374 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__SINC_FILTER_GLUE2_BREAK        0x0070 0x0374 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__FLEXPWM4_PWMX0                 0x0070 0x0374 0x06f4 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO24__XBAR1_XBAR_INOUT36             0x0070 0x0374 0x08c8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__GPIO2_IO25                     0x0074 0x0378 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__SAI2_RX_SYNC                   0x0074 0x0378 0x07f4 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__LPUART11_RX                    0x0074 0x0378 0x0798 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__LPI2C4_HREQ                    0x0074 0x0378 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__LPSPI4_SCK                     0x0074 0x0378 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__SINC_FILTER_GLUE1_BREAK        0x0074 0x0378 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__FLEXPWM4_PWMX1                 0x0074 0x0378 0x06f8 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO25__XBAR1_XBAR_INOUT37             0x0074 0x0378 0x08cc 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__GPIO2_IO26                     0x0078 0x037c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__LPI2C5_SCL                     0x0078 0x037c 0x073c 0x01 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__LPUART12_TX                    0x0078 0x037c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__GPT_MUX_INOUT4                 0x0078 0x037c 0x0708 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__FLEXIO1_3_1_FLEXIO0            0x0078 0x037c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__SAI2_RX_DATA0                  0x0078 0x037c 0x07f0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__FLEXPWM4_PWMX2                 0x0078 0x037c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO26__XBAR1_XBAR_INOUT38             0x0078 0x037c 0x08d0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__GPIO2_IO27                     0x007c 0x0380 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__LPI2C5_SDA                     0x007c 0x0380 0x0740 0x01 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__LPUART12_RX                    0x007c 0x0380 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__GPT_MUX_INOUT5                 0x007c 0x0380 0x070c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__FLEXIO1_3_1_FLEXIO1            0x007c 0x0380 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__SAI2_TX_DATA0                  0x007c 0x0380 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__FLEXPWM4_PWMX3                 0x007c 0x0380 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO27__SINC4_MOD_CLK0                 0x007c 0x0380 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__GPIO2_IO28                     0x0080 0x0384 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__LPI2C6_SCL                     0x0080 0x0384 0x0748 0x01 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__LPUART12_CTS_B                 0x0080 0x0384 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__GPT_MUX_INOUT7                 0x0080 0x0384 0x0714 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__FLEXIO1_3_1_FLEXIO2            0x0080 0x0384 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__SAI2_TX_SYNC                   0x0080 0x0384 0x07fc 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__FLEXPWM1_PWMX2                 0x0080 0x0384 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO28__XBAR1_XBAR_INOUT4              0x0080 0x0384 0x086c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__GPIO2_IO29                     0x0084 0x0388 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__LPI2C6_SDA                     0x0084 0x0388 0x074c 0x01 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__LPUART12_RTS_B                 0x0084 0x0388 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__I3C2_SDA                       0x0084 0x0388 0x0724 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__FLEXIO1_3_1_FLEXIO3            0x0084 0x0388 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__FLEXPWM3_PWMX0                 0x0084 0x0388 0x06c8 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__FLEXPWM1_PWMX3                 0x0084 0x0388 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO29__XBAR1_XBAR_INOUT5              0x0084 0x0388 0x0870 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__GPIO2_IO30                     0x0088 0x038c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__LPIT2_TRIGGER0                 0x0088 0x038c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__LPUART3_TX                     0x0088 0x038c 0x07a8 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__I3C2_PUR                       0x0088 0x038c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__FLEXIO1_3_1_FLEXIO4            0x0088 0x038c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__I3C2_PUR_B                     0x0088 0x038c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__FLEXPWM2_PWMX2                 0x0088 0x038c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO30__XBAR1_XBAR_INOUT6              0x0088 0x038c 0x0874 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__GPIO2_IO31                     0x008c 0x0390 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__LPIT2_TRIGGER1                 0x008c 0x0390 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__LPUART3_RX                     0x008c 0x0390 0x07a4 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__I3C2_SCL                       0x008c 0x0390 0x0720 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__FLEXIO1_3_1_FLEXIO5            0x008c 0x0390 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__FLEXPWM3_PWMX1                 0x008c 0x0390 0x06cc 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__FLEXPWM2_PWMX3                 0x008c 0x0390 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO31__XBAR1_XBAR_INOUT7              0x008c 0x0390 0x0878 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__GPIO3_IO0                      0x0090 0x0394 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__LPIT3_TRIGGER0                 0x0090 0x0394 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__LPUART7_TX                     0x0090 0x0394 0x07d4 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__GPT_MUX_INOUT8                 0x0090 0x0394 0x0718 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__FLEXIO1_3_1_FLEXIO6            0x0090 0x0394 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__FLEXPWM3_PWMA0                 0x0090 0x0394 0x06a8 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__SINC_FILTER_GLUE2_BREAK        0x0090 0x0394 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO32__XBAR1_XBAR_INOUT8              0x0090 0x0394 0x087c 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__GPIO3_IO1                      0x0094 0x0398 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__LPIT3_TRIGGER1                 0x0094 0x0398 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__LPUART7_RX                     0x0094 0x0398 0x07d0 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__GPT_MUX_INOUT1                 0x0094 0x0398 0x0700 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__FLEXIO1_3_1_FLEXIO7            0x0094 0x0398 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__FLEXPWM3_PWMB0                 0x0094 0x0398 0x06b8 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__SINC_FILTER_GLUE1_BREAK        0x0094 0x0398 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO33__XBAR1_XBAR_INOUT9              0x0094 0x0398 0x0880 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__GPIO3_IO2                      0x0098 0x039c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__LPI2C7_SDA                     0x0098 0x039c 0x0754 0x01 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__CAN2_TX                        0x0098 0x039c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__ECAT_SDA                       0x0098 0x039c 0x062c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__FLEXIO1_3_1_FLEXIO8            0x0098 0x039c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__FLEXPWM3_PWMA1                 0x0098 0x039c 0x06ac 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__FLEXPWM1_PWMX0                 0x0098 0x039c 0x0698 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO34__XBAR1_XBAR_INOUT10             0x0098 0x039c 0x0884 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__GPIO3_IO3                      0x009c 0x03a0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__LPI2C7_SCL                     0x009c 0x03a0 0x0750 0x01 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__CAN2_RX                        0x009c 0x03a0 0x067c 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__ECAT_SCL                       0x009c 0x03a0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__FLEXIO1_3_1_FLEXIO9            0x009c 0x03a0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__FLEXPWM3_PWMB1                 0x009c 0x03a0 0x06bc 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__FLEXPWM1_PWMX1                 0x009c 0x03a0 0x069c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO35__XBAR1_XBAR_INOUT11             0x009c 0x03a0 0x0888 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__USDHC2_WP                      0x00a0 0x03a4 0x0854 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__FLEXIO1_3_1_FLEXIO10           0x00a0 0x03a4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__FLEXPWM3_PWMA2                 0x00a0 0x03a4 0x06b0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__FLEXPWM2_PWMX0                 0x00a0 0x03a4 0x06a0 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__XBAR1_XBAR_INOUT12             0x00a0 0x03a4 0x088c 0x07 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__GPIO3_IO4                      0x00a0 0x03a4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__LPI2C8_SDA                     0x00a0 0x03a4 0x075c 0x01 0x03</div><div class='add'>+#define IMX94_PAD_GPIO_IO36__CAN4_TX                        0x00a0 0x03a4 0x0000 0x02 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__GPIO3_IO5                      0x00a4 0x03a8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__LPI2C8_SCL                     0x00a4 0x03a8 0x0758 0x01 0x03</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__CAN4_RX                        0x00a4 0x03a8 0x0684 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__LPI2C5_HREQ                    0x00a4 0x03a8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__FLEXIO1_3_1_FLEXIO11           0x00a4 0x03a8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__FLEXPWM3_PWMB2                 0x00a4 0x03a8 0x06c0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__FLEXPWM2_PWMX1                 0x00a4 0x03a8 0x06a4 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO37__XBAR1_XBAR_INOUT13             0x00a4 0x03a8 0x0890 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__GPIO3_IO6                      0x00a8 0x03ac 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__NETC_1588MUX_INOUT0            0x00a8 0x03ac 0x064c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__LPI2C3_SDA                     0x00a8 0x03ac 0x0730 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__LPIT3_TRIGGER2                 0x00a8 0x03ac 0x0764 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__FLEXIO1_3_1_FLEXIO12           0x00a8 0x03ac 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__LPUART3_CTS_B                  0x00a8 0x03ac 0x07a0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__FLEXPWM3_PWMX0                 0x00a8 0x03ac 0x06c8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO38__XBAR1_XBAR_INOUT14             0x00a8 0x03ac 0x0894 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__GPIO3_IO7                      0x00ac 0x03b0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__NETC_1588MUX_INOUT1            0x00ac 0x03b0 0x0650 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__LPI2C3_SCL                     0x00ac 0x03b0 0x072c 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__LPIT2_TRIGGER2                 0x00ac 0x03b0 0x0760 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__FLEXIO1_3_1_FLEXIO13           0x00ac 0x03b0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__LPUART3_RTS_B                  0x00ac 0x03b0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__FLEXPWM3_PWMX1                 0x00ac 0x03b0 0x06cc 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO39__XBAR1_XBAR_INOUT15             0x00ac 0x03b0 0x0898 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__GPIO3_IO8                      0x00b0 0x03b4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__NETC_1588MUX_INOUT2            0x00b0 0x03b4 0x0654 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__LPI2C7_SDA                     0x00b0 0x03b4 0x0754 0x02 0x03</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__LPUART4_TX                     0x00b0 0x03b4 0x07b4 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__FLEXIO1_3_1_FLEXIO14           0x00b0 0x03b4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__FLEXPWM3_PWMX2                 0x00b0 0x03b4 0x06d0 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__FLEXPWM4_PWMX0                 0x00b0 0x03b4 0x06f4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO40__XBAR1_XBAR_INOUT16             0x00b0 0x03b4 0x089c 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__GPIO3_IO9                      0x00b4 0x03b8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__NETC_1588MUX_INOUT3            0x00b4 0x03b8 0x0658 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__LPI2C7_SCL                     0x00b4 0x03b8 0x0750 0x02 0x03</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__LPUART4_RX                     0x00b4 0x03b8 0x07b0 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__FLEXIO1_3_1_FLEXIO15           0x00b4 0x03b8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__LPI2C6_HREQ                    0x00b4 0x03b8 0x0744 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__FLEXPWM4_PWMX1                 0x00b4 0x03b8 0x06f8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO41__XBAR1_XBAR_INOUT17             0x00b4 0x03b8 0x08a0 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__GPIO3_IO10                     0x00b8 0x03bc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__SAI3_TX_BCLK                   0x00b8 0x03bc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__PDM_BIT_STREAM2                0x00b8 0x03bc 0x0618 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__XBAR1_XBAR_INOUT11             0x00b8 0x03bc 0x0888 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__LPUART3_TX                     0x00b8 0x03bc 0x07a8 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__LPSPI4_PCS2                    0x00b8 0x03bc 0x076c 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__LPUART4_CTS_B                  0x00b8 0x03bc 0x07ac 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO42__SINC4_EMCLK1                   0x00b8 0x03bc 0x0830 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__GPIO3_IO11                     0x00bc 0x03c0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__SAI3_MCLK                      0x00bc 0x03c0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__XBAR1_XBAR_INOUT12             0x00bc 0x03c0 0x088c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__LPUART3_RX                     0x00bc 0x03c0 0x07a4 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__LPSPI3_PCS1                    0x00bc 0x03c0 0x0768 0x05 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__LPUART4_RTS_B                  0x00bc 0x03c0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO43__SINC4_EMBIT1                   0x00bc 0x03c0 0x0824 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__GPIO3_IO12                     0x00c0 0x03c4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__SAI3_RX_BCLK                   0x00c0 0x03c4 0x0800 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__PDM_BIT_STREAM1                0x00c0 0x03c4 0x0614 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__LPUART9_TX                     0x00c0 0x03c4 0x07e4 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__LPSPI5_PCS0                    0x00c0 0x03c4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__LPI2C3_SDA                     0x00c0 0x03c4 0x0730 0x05 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__TPM5_CH2                       0x00c0 0x03c4 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO44__SINC_FILTER_GLUE4_BREAK        0x00c0 0x03c4 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__GPIO3_IO13                     0x00c4 0x03c8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__SAI3_RX_SYNC                   0x00c4 0x03c8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__PDM_BIT_STREAM3                0x00c4 0x03c8 0x061c 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__LPUART9_RX                     0x00c4 0x03c8 0x07e0 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__LPSPI5_SIN                     0x00c4 0x03c8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__LPI2C3_SCL                     0x00c4 0x03c8 0x072c 0x05 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__TPM6_CH2                       0x00c4 0x03c8 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO45__SAI3_TX_DATA0                  0x00c4 0x03c8 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__GPIO3_IO14                     0x00c8 0x03cc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__SAI3_RX_DATA0                  0x00c8 0x03cc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__PDM_BIT_STREAM0                0x00c8 0x03cc 0x0610 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__LPUART9_CTS_B                  0x00c8 0x03cc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__LPSPI5_SOUT                    0x00c8 0x03cc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__LPI2C4_SDA                     0x00c8 0x03cc 0x0738 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__TPM3_CH1                       0x00c8 0x03cc 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO46__EWM_OUT_B                      0x00c8 0x03cc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__GPIO3_IO15                     0x00cc 0x03d0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__SAI3_TX_DATA0                  0x00cc 0x03d0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__PDM_CLK                        0x00cc 0x03d0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__LPUART9_RTS_B                  0x00cc 0x03d0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__LPSPI5_SCK                     0x00cc 0x03d0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__LPI2C4_SCL                     0x00cc 0x03d0 0x0734 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__TPM4_CH1                       0x00cc 0x03d0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO47__SAI3_RX_BCLK                   0x00cc 0x03d0 0x0800 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__GPIO3_IO16                     0x00d0 0x03d4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__USDHC3_CLK                     0x00d0 0x03d4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__CAN5_TX                        0x00d0 0x03d4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__LPUART10_TX                    0x00d0 0x03d4 0x0794 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__TPM5_CH1                       0x00d0 0x03d4 0x0840 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__TPM6_EXTCLK                    0x00d0 0x03d4 0x0850 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__LPI2C5_SDA                     0x00d0 0x03d4 0x0740 0x06 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO48__SINC4_EMCLK2                   0x00d0 0x03d4 0x0834 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__GPIO3_IO17                     0x00d4 0x03d8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__USDHC3_CMD                     0x00d4 0x03d8 0x0858 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__CAN5_RX                        0x00d4 0x03d8 0x0688 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__LPUART10_RX                    0x00d4 0x03d8 0x0790 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__TPM6_CH1                       0x00d4 0x03d8 0x0848 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__XBAR1_XBAR_INOUT13             0x00d4 0x03d8 0x0890 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__LPI2C5_SCL                     0x00d4 0x03d8 0x073c 0x06 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO49__SINC4_EMBIT2                   0x00d4 0x03d8 0x0828 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__GPIO3_IO18                     0x00d8 0x03dc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__USDHC3_DATA0                   0x00d8 0x03dc 0x085c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__XBAR1_XBAR_INOUT14             0x00d8 0x03dc 0x0894 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__LPUART10_CTS_B                 0x00d8 0x03dc 0x078c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__TPM3_CH3                       0x00d8 0x03dc 0x0838 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__JTAG_MUX_TDO                   0x00d8 0x03dc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__LPSPI6_PCS1                    0x00d8 0x03dc 0x0774 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO50__SINC4_EMCLK3                   0x00d8 0x03dc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__GPIO3_IO19                     0x00dc 0x03e0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__USDHC3_DATA1                   0x00dc 0x03e0 0x0860 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__CAN2_TX                        0x00dc 0x03e0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__LPUART10_RTS_B                 0x00dc 0x03e0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__TPM4_CH3                       0x00dc 0x03e0 0x083c 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__JTAG_MUX_TCK                   0x00dc 0x03e0 0x0928 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__LPSPI7_PCS1                    0x00dc 0x03e0 0x0778 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO51__SINC4_EMBIT3                   0x00dc 0x03e0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__GPIO3_IO20                     0x00e0 0x03e4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__USDHC3_DATA2                   0x00e0 0x03e4 0x0864 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__PDM_BIT_STREAM1                0x00e0 0x03e4 0x0614 0x02 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__LPSPI4_PCS2                    0x00e0 0x03e4 0x076c 0x03 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__TPM5_CH3                       0x00e0 0x03e4 0x0844 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__JTAG_MUX_TDI                   0x00e0 0x03e4 0x092c 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__LPSPI8_PCS1                    0x00e0 0x03e4 0x077c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO52__SAI3_TX_SYNC                   0x00e0 0x03e4 0x0804 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__GPIO3_IO21                     0x00e4 0x03e8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__USDHC3_DATA3                   0x00e4 0x03e8 0x0868 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__CAN2_RX                        0x00e4 0x03e8 0x067c 0x02 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__LPSPI3_PCS1                    0x00e4 0x03e8 0x0768 0x03 0x03</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__TPM6_CH3                       0x00e4 0x03e8 0x084c 0x04 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__JTAG_MUX_TMS                   0x00e4 0x03e8 0x0930 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__LPSPI5_PCS1                    0x00e4 0x03e8 0x0770 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO53__SINC4_MOD_CLK1                 0x00e4 0x03e8 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__GPIO3_IO22                     0x00e8 0x03ec 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__NETC_1588MUX_INOUT4            0x00e8 0x03ec 0x065c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__CAN4_TX                        0x00e8 0x03ec 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__LPIT3_TRIGGER2                 0x00e8 0x03ec 0x0764 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__LPSPI6_PCS1                    0x00e8 0x03ec 0x0774 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__TPM3_CH3                       0x00e8 0x03ec 0x0838 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__SINC3_EMCLK0                   0x00e8 0x03ec 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO54__XBAR1_XBAR_INOUT18             0x00e8 0x03ec 0x08a4 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__GPIO3_IO23                     0x00ec 0x03f0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__NETC_1588MUX_INOUT5            0x00ec 0x03f0 0x0660 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__CAN4_RX                        0x00ec 0x03f0 0x0684 0x02 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__LPIT2_TRIGGER2                 0x00ec 0x03f0 0x0760 0x03 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__LPSPI7_PCS1                    0x00ec 0x03f0 0x0778 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__TPM4_CH3                       0x00ec 0x03f0 0x083c 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__SINC3_EMBIT0                   0x00ec 0x03f0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO55__XBAR1_XBAR_INOUT19             0x00ec 0x03f0 0x08a8 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__GPIO3_IO24                     0x00f0 0x03f4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__NETC_1588MUX_INOUT6            0x00f0 0x03f4 0x0664 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__CAN5_TX                        0x00f0 0x03f4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__LPIT3_TRIGGER3                 0x00f0 0x03f4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__LPSPI8_PCS1                    0x00f0 0x03f4 0x077c 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__SAI3_TX_SYNC                   0x00f0 0x03f4 0x0804 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__SINC3_EMCLK1                   0x00f0 0x03f4 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO56__XBAR1_XBAR_INOUT20             0x00f0 0x03f4 0x08ac 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__GPIO3_IO25                     0x00f4 0x03f8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__NETC_1588MUX_INOUT7            0x00f4 0x03f8 0x0668 0x01 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__CAN5_RX                        0x00f4 0x03f8 0x0688 0x02 0x02</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__LPIT2_TRIGGER3                 0x00f4 0x03f8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__LPSPI5_PCS1                    0x00f4 0x03f8 0x0770 0x04 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__TPM6_CH3                       0x00f4 0x03f8 0x084c 0x05 0x01</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__SINC3_EMBIT1                   0x00f4 0x03f8 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_GPIO_IO57__ENET_REF_CLK_ROOT              0x00f4 0x03f8 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__CLKO_1                         0x00f8 0x03fc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__NETC_1588MUX_INOUT8            0x00f8 0x03fc 0x066c 0x01 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__LPUART9_TX                     0x00f8 0x03fc 0x07e4 0x02 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__ECAT_LED_RUN                   0x00f8 0x03fc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__TPM6_EXTCLK                    0x00f8 0x03fc 0x0850 0x04 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__GPIO4_IO0                      0x00f8 0x03fc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__SINC3_EMCLK2                   0x00f8 0x03fc 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO1__XBAR1_XBAR_INOUT22             0x00f8 0x03fc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__CLKO_2                         0x00fc 0x0400 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__NETC_1588MUX_INOUT9            0x00fc 0x0400 0x0670 0x01 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__LPUART9_RX                     0x00fc 0x0400 0x07e0 0x02 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__ECAT_LED_ERR                   0x00fc 0x0400 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__TPM5_CH1                       0x00fc 0x0400 0x0840 0x04 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__GPIO4_IO1                      0x00fc 0x0400 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__SINC3_EMBIT2                   0x00fc 0x0400 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO2__XBAR1_XBAR_INOUT23             0x00fc 0x0400 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__CLKO_3                         0x0100 0x0404 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__NETC_1588MUX_INOUT10           0x0100 0x0404 0x0674 0x01 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__CAN3_TX                        0x0100 0x0404 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__ECAT_LED_STATE_RUN             0x0100 0x0404 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__TPM6_CH1                       0x0100 0x0404 0x0848 0x04 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__GPIO4_IO2                      0x0100 0x0404 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__SINC3_EMCLK3                   0x0100 0x0404 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO3__ENET_REF_CLK_ROOT              0x0100 0x0404 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__CLKO_4                         0x0104 0x0408 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__NETC_1588MUX_INOUT11           0x0104 0x0408 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__CAN3_RX                        0x0104 0x0408 0x0680 0x02 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__ECAT_RESET_OUT                 0x0104 0x0408 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__TPM5_CH3                       0x0104 0x0408 0x0844 0x04 0x01</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__GPIO4_IO3                      0x0104 0x0408 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__SINC3_EMBIT3                   0x0104 0x0408 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_CCM_CLKO4__XBAR1_XBAR_INOUT25             0x0104 0x0408 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__NETC_EMDC                 0x0108 0x040c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__NETC_ETH2_SLV_MDC         0x0108 0x040c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__I3C2_SCL                  0x0108 0x040c 0x0720 0x02 0x02</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__USB1_OTG_ID               0x0108 0x040c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__FLEXIO2_FLEXIO0           0x0108 0x040c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__GPIO6_IO0                 0x0108 0x040c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__FLEXPWM2_PWMX0            0x0108 0x040c 0x06a0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH2_MDC_GPIO1__XBAR1_XBAR_INOUT30        0x0108 0x040c 0x08b0 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__NETC_EMDIO               0x010c 0x0410 0x0678 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__NETC_ETH2_SLV_MDIO       0x010c 0x0410 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__I3C2_SDA                 0x010c 0x0410 0x0724 0x02 0x02</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__USB1_OTG_PWR             0x010c 0x0410 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__FLEXIO2_FLEXIO1          0x010c 0x0410 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__GPIO6_IO1                0x010c 0x0410 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__FLEXPWM2_PWMX1           0x010c 0x0410 0x06a4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH2_MDIO_GPIO2__XBAR1_XBAR_INOUT31       0x010c 0x0410 0x08b4 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__NETC_PINMUX_ETH2_TXD3          0x0110 0x0414 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__LPUART3_DCD_B                  0x0110 0x0414 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__CAN2_TX                        0x0110 0x0414 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__USB2_OTG_ID                    0x0110 0x0414 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__FLEXIO2_FLEXIO2                0x0110 0x0414 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__GPIO6_IO2                      0x0110 0x0414 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__FLEXPWM2_PWMA0                 0x0110 0x0414 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD3__XBAR1_XBAR_INOUT32             0x0110 0x0414 0x08b8 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__NETC_PINMUX_ETH2_TXD2          0x0114 0x0418 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__ETH2_RMII_REF50_CLK            0x0114 0x0418 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__CAN2_RX                        0x0114 0x0418 0x067c 0x02 0x03</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__USB2_OTG_OC                    0x0114 0x0418 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__FLEXIO2_FLEXIO3                0x0114 0x0418 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__GPIO6_IO3                      0x0114 0x0418 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__FLEXPWM2_PWMB0                 0x0114 0x0418 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD2__XBAR1_XBAR_INOUT33             0x0114 0x0418 0x08bc 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__NETC_PINMUX_ETH2_TXD1          0x0118 0x041c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__LPUART3_RTS_B                  0x0118 0x041c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__ECAT_CLK25                     0x0118 0x041c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__USB1_OTG_OC                    0x0118 0x041c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__FLEXIO2_FLEXIO4                0x0118 0x041c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__GPIO6_IO4                      0x0118 0x041c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__FLEXPWM2_PWMA1                 0x0118 0x041c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD1__XBAR1_XBAR_INOUT34             0x0118 0x041c 0x08c0 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__NETC_PINMUX_ETH2_TXD0          0x011c 0x0420 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__LPUART3_TX                     0x011c 0x0420 0x07a8 0x01 0x02</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__I3C2_PUR                       0x011c 0x0420 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__I3C2_PUR_B                     0x011c 0x0420 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__FLEXIO2_FLEXIO5                0x011c 0x0420 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__GPIO6_IO5                      0x011c 0x0420 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__FLEXPWM2_PWMB1                 0x011c 0x0420 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TXD0__XBAR1_XBAR_INOUT35             0x011c 0x0420 0x08c4 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__NETC_PINMUX_ETH2_TX_CTL      0x0120 0x0424 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__LPUART3_DTR_B                0x0120 0x0424 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__ECAT_LED_RUN                 0x0120 0x0424 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__FLEXIO2_FLEXIO6              0x0120 0x0424 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__GPIO6_IO6                    0x0120 0x0424 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__FLEXPWM2_PWMA2               0x0120 0x0424 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CTL__XBAR1_XBAR_INOUT36           0x0120 0x0424 0x08c8 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__NETC_PINMUX_ETH2_TX_CLK      0x0124 0x0428 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__ECAT_LED_ERR                 0x0124 0x0428 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__FLEXIO2_FLEXIO7              0x0124 0x0428 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__GPIO6_IO7                    0x0124 0x0428 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__FLEXPWM2_PWMB2               0x0124 0x0428 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_TX_CLK__XBAR1_XBAR_INOUT37           0x0124 0x0428 0x08cc 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__NETC_PINMUX_ETH2_RX_CTL      0x0128 0x042c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__LPUART3_DSR_B                0x0128 0x042c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__ECAT_LED_STATE_RUN           0x0128 0x042c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__USB2_OTG_PWR                 0x0128 0x042c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__FLEXIO2_FLEXIO8              0x0128 0x042c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__GPIO6_IO8                    0x0128 0x042c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__FLEXPWM2_PWMA3               0x0128 0x042c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CTL__SINC4_EMCLK0                 0x0128 0x042c 0x082c 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__NETC_PINMUX_ETH2_RX_CLK      0x012c 0x0430 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__LPUART3_RIN_B                0x012c 0x0430 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__ECAT_RESET_OUT               0x012c 0x0430 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__XBAR1_XBAR_INOUT38           0x012c 0x0430 0x08d0 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__FLEXIO2_FLEXIO9              0x012c 0x0430 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__GPIO6_IO9                    0x012c 0x0430 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__FLEXPWM2_PWMB3               0x012c 0x0430 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RX_CLK__SINC4_EMBIT0                 0x012c 0x0430 0x0820 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__NETC_PINMUX_ETH2_RXD0          0x0130 0x0434 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__LPUART3_RX                     0x0130 0x0434 0x07a4 0x01 0x02</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__FLEXIO2_FLEXIO10               0x0130 0x0434 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__GPIO6_IO10                     0x0130 0x0434 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__DIG_ENCODER2_DATA_EN           0x0130 0x0434 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD0__XBAR1_XBAR_INOUT39             0x0130 0x0434 0x08d4 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__NETC_PINMUX_ETH2_RXD1          0x0134 0x0438 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__LPUART3_CTS_B                  0x0134 0x0438 0x07a0 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__LPTMR2_ALT0                    0x0134 0x0438 0x0780 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__FLEXIO2_FLEXIO11               0x0134 0x0438 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__GPIO6_IO11                     0x0134 0x0438 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__DIG_ENCODER2_DATA_CLK          0x0134 0x0438 0x068c 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD1__XBAR1_XBAR_INOUT40             0x0134 0x0438 0x08d8 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__NETC_PINMUX_ETH2_RXD2          0x0138 0x043c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__LPTMR2_ALT1                    0x0138 0x043c 0x0784 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__FLEXIO2_FLEXIO12               0x0138 0x043c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__GPIO6_IO12                     0x0138 0x043c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__DIG_ENCODER2_DATA_OUT          0x0138 0x043c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD2__XBAR1_XBAR_INOUT41             0x0138 0x043c 0x08dc 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__NETC_PINMUX_ETH2_RXD3          0x013c 0x0440 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__LPTMR2_ALT2                    0x013c 0x0440 0x0788 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__FLEXIO2_FLEXIO13               0x013c 0x0440 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__GPIO6_IO13                     0x013c 0x0440 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__DIG_ENCODER2_DATA_IN           0x013c 0x0440 0x0690 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH2_RXD3__XBAR1_XBAR_INOUT42             0x013c 0x0440 0x08e0 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__NETC_EMDC                 0x0140 0x0444 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__LPUART4_DCD_B             0x0140 0x0444 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__NETC_ETH3_SLV_MDC         0x0140 0x0444 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__SAI4_TX_SYNC              0x0140 0x0444 0x081c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__FLEXIO2_FLEXIO14          0x0140 0x0444 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__GPIO6_IO14                0x0140 0x0444 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__FLEXPWM1_PWMX0            0x0140 0x0444 0x0698 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_MDC_GPIO1__SINC4_MOD_CLK0            0x0140 0x0444 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__NETC_EMDIO               0x0144 0x0448 0x0678 0x00 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__LPUART4_RIN_B            0x0144 0x0448 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__NETC_ETH3_SLV_MDIO       0x0144 0x0448 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__SAI4_TX_BCLK             0x0144 0x0448 0x0818 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__FLEXIO2_FLEXIO15         0x0144 0x0448 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__GPIO6_IO15               0x0144 0x0448 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__FLEXPWM1_PWMX1           0x0144 0x0448 0x069c 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_MDIO_GPIO2__SINC4_MOD_CLK1           0x0144 0x0448 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__NETC_PINMUX_ETH3_TXD3          0x0148 0x044c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__XSPI_SLV_DATA7                 0x0148 0x044c 0x0924 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__SAI4_TX_DATA0                  0x0148 0x044c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__LPUART3_TX                     0x0148 0x044c 0x07a8 0x04 0x03</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__GPIO6_IO16                     0x0148 0x044c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD3__FLEXPWM1_PWMA0                 0x0148 0x044c 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__NETC_PINMUX_ETH3_TXD2          0x014c 0x0450 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__ETH3_RMII_REF50_CLK            0x014c 0x0450 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__XSPI_SLV_DATA6                 0x014c 0x0450 0x0920 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__SAI4_RX_SYNC                   0x014c 0x0450 0x0814 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__GPIO6_IO17                     0x014c 0x0450 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD2__FLEXPWM1_PWMB0                 0x014c 0x0450 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__NETC_PINMUX_ETH3_TXD1          0x0150 0x0454 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__LPUART4_RTS_B                  0x0150 0x0454 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__XSPI_SLV_DATA5                 0x0150 0x0454 0x091c 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__SAI4_RX_BCLK                   0x0150 0x0454 0x080c 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__GPIO6_IO18                     0x0150 0x0454 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD1__FLEXPWM1_PWMA1                 0x0150 0x0454 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__NETC_PINMUX_ETH3_TXD0          0x0154 0x0458 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__LPUART4_TX                     0x0154 0x0458 0x07b4 0x01 0x02</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__XSPI_SLV_DATA4                 0x0154 0x0458 0x0918 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__SAI4_RX_DATA0                  0x0154 0x0458 0x0810 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__GPIO6_IO19                     0x0154 0x0458 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TXD0__FLEXPWM1_PWMB1                 0x0154 0x0458 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__NETC_PINMUX_ETH3_TX_CTL      0x0158 0x045c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__LPUART4_DTR_B                0x0158 0x045c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__XSPI_SLV_DQS                 0x0158 0x045c 0x0900 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__SAI4_MCLK                    0x0158 0x045c 0x0808 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__LPUART3_RX                   0x0158 0x045c 0x07a4 0x04 0x03</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__GPIO6_IO20                   0x0158 0x045c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CTL__FLEXPWM1_PWMA2               0x0158 0x045c 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__NETC_PINMUX_ETH3_TX_CLK      0x015c 0x0460 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__XSPI_SLV_CLK                 0x015c 0x0460 0x0904 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__SAI2_TX_SYNC                 0x015c 0x0460 0x07fc 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__LPUART3_CTS_B                0x015c 0x0460 0x07a0 0x04 0x02</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__GPIO6_IO21                   0x015c 0x0460 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_TX_CLK__FLEXPWM1_PWMB2               0x015c 0x0460 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__NETC_PINMUX_ETH3_RX_CTL      0x0160 0x0464 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__LPUART4_DSR_B                0x0160 0x0464 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__XSPI_SLV_CS                  0x0160 0x0464 0x08fc 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__SAI2_TX_BCLK                 0x0160 0x0464 0x07f8 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__XBAR1_XBAR_INOUT43           0x0160 0x0464 0x08e4 0x04 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__GPIO6_IO22                   0x0160 0x0464 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__FLEXPWM1_PWMA3               0x0160 0x0464 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CTL__SINC4_EMCLK1                 0x0160 0x0464 0x0830 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__NETC_PINMUX_ETH3_RX_CLK      0x0164 0x0468 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__LPUART4_CTS_B                0x0164 0x0468 0x07ac 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__XSPI_SLV_DATA3               0x0164 0x0468 0x0914 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__SAI2_TX_DATA0                0x0164 0x0468 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__XBAR1_XBAR_INOUT44           0x0164 0x0468 0x08e8 0x04 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__GPIO6_IO23                   0x0164 0x0468 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__FLEXPWM1_PWMB3               0x0164 0x0468 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RX_CLK__SINC4_EMBIT1                 0x0164 0x0468 0x0824 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__NETC_PINMUX_ETH3_RXD0          0x0168 0x046c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__LPUART4_RX                     0x0168 0x046c 0x07b0 0x01 0x02</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__XSPI_SLV_DATA2                 0x0168 0x046c 0x0910 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__SAI2_RX_SYNC                   0x0168 0x046c 0x07f4 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__GPIO6_IO24                     0x0168 0x046c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__DIG_ENCODER1_DATA_EN           0x0168 0x046c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD0__XBAR1_XBAR_INOUT45             0x0168 0x046c 0x08ec 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__NETC_PINMUX_ETH3_RXD1          0x016c 0x0470 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__XSPI_SLV_DATA1                 0x016c 0x0470 0x090c 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__SAI2_RX_BCLK                   0x016c 0x0470 0x07ec 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__LPUART3_RTS_B                  0x016c 0x0470 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__GPIO6_IO25                     0x016c 0x0470 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__DIG_ENCODER1_DATA_CLK          0x016c 0x0470 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD1__XBAR1_XBAR_INOUT46             0x016c 0x0470 0x08f0 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__NETC_PINMUX_ETH3_RXD2          0x0170 0x0474 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__MQS2_RIGHT                     0x0170 0x0474 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__XSPI_SLV_DATA0                 0x0170 0x0474 0x0908 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__SAI2_RX_DATA0                  0x0170 0x0474 0x07f0 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__GPIO6_IO26                     0x0170 0x0474 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__DIG_ENCODER1_DATA_OUT          0x0170 0x0474 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD2__XBAR1_XBAR_INOUT47             0x0170 0x0474 0x08f4 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__NETC_PINMUX_ETH3_RXD3          0x0174 0x0478 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__MQS2_LEFT                      0x0174 0x0478 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__SAI2_MCLK                      0x0174 0x0478 0x07e8 0x03 0x01</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__GPIO6_IO27                     0x0174 0x0478 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__DIG_ENCODER1_DATA_IN           0x0174 0x0478 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH3_RXD3__XBAR1_XBAR_INOUT48             0x0174 0x0478 0x08f8 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__NETC_EMDC                 0x0178 0x047c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__ECAT_MDC                  0x0178 0x047c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__ECAT_CLK25                0x0178 0x047c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__NETC_ETH4_SLV_MDC         0x0178 0x047c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__FLEXIO1_3_2_FLEXIO12      0x0178 0x047c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__GPIO6_IO28                0x0178 0x047c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__FLEXPWM4_PWMX0            0x0178 0x047c 0x06f4 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH4_MDC_GPIO1__SINC4_MOD_CLK2            0x0178 0x047c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__NETC_EMDIO               0x017c 0x0480 0x0678 0x00 0x02</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__ECAT_MDIO                0x017c 0x0480 0x0628 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__ENET_REF_CLK_ROOT        0x017c 0x0480 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__NETC_ETH4_SLV_MDIO       0x017c 0x0480 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__FLEXIO1_3_2_FLEXIO13     0x017c 0x0480 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__GPIO6_IO29               0x017c 0x0480 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__FLEXPWM4_PWMX1           0x017c 0x0480 0x06f8 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH4_MDIO_GPIO2__SINC_FILTER_GLUE4_BREAK  0x017c 0x0480 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__NETC_PINMUX_ETH4_TX_CLK      0x0180 0x0484 0x0648 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__USDHC3_CLK                   0x0180 0x0484 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__XSPI2_A_SCLK                 0x0180 0x0484 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__ECAT_LED_ERR                 0x0180 0x0484 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__FLEXIO1_3_2_FLEXIO0          0x0180 0x0484 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__GPIO6_IO30                   0x0180 0x0484 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__FLEXPWM4_PWMA0               0x0180 0x0484 0x06d4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CLK__XBAR1_XBAR_INOUT30           0x0180 0x0484 0x08b0 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__NETC_PINMUX_ETH4_TX_CTL      0x0184 0x0488 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__USDHC3_CMD                   0x0184 0x0488 0x0858 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__XSPI2_A_SS0_B                0x0184 0x0488 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__ECAT_RESET_OUT               0x0184 0x0488 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__FLEXIO1_3_2_FLEXIO1          0x0184 0x0488 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__GPIO6_IO31                   0x0184 0x0488 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__FLEXPWM4_PWMB0               0x0184 0x0488 0x06e4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TX_CTL__XBAR1_XBAR_INOUT31           0x0184 0x0488 0x08b4 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__NETC_PINMUX_ETH4_TXD0          0x0188 0x048c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__USDHC3_DATA0                   0x0188 0x048c 0x085c 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__XSPI2_A_DATA0                  0x0188 0x048c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__ECAT_LED_RUN                   0x0188 0x048c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__FLEXIO1_3_2_FLEXIO2            0x0188 0x048c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__GPIO7_IO0                      0x0188 0x048c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__FLEXPWM4_PWMA1                 0x0188 0x048c 0x06d8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD0__XBAR1_XBAR_INOUT32             0x0188 0x048c 0x08b8 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__NETC_PINMUX_ETH4_TXD1          0x018c 0x0490 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__USDHC3_DATA1                   0x018c 0x0490 0x0860 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__XSPI2_A_DATA1                  0x018c 0x0490 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__ECAT_LED_STATE_RUN             0x018c 0x0490 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__FLEXIO1_3_2_FLEXIO3            0x018c 0x0490 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__GPIO7_IO1                      0x018c 0x0490 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__FLEXPWM4_PWMB1                 0x018c 0x0490 0x06e8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD1__XBAR1_XBAR_INOUT33             0x018c 0x0490 0x08bc 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__NETC_PINMUX_ETH4_TXD2          0x0190 0x0494 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__USDHC3_DATA2                   0x0190 0x0494 0x0864 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__XSPI2_A_DATA2                  0x0190 0x0494 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__ECAT_CLK25                     0x0190 0x0494 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__FLEXIO1_3_2_FLEXIO4            0x0190 0x0494 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__GPIO7_IO2                      0x0190 0x0494 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__FLEXPWM4_PWMA2                 0x0190 0x0494 0x06dc 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD2__ETH4_RMII_REF50_CLK            0x0190 0x0494 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__NETC_PINMUX_ETH4_TXD3          0x0194 0x0498 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__USDHC3_DATA3                   0x0194 0x0498 0x0868 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__XSPI2_A_DATA3                  0x0194 0x0498 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__FLEXIO1_3_2_FLEXIO5            0x0194 0x0498 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__GPIO7_IO3                      0x0194 0x0498 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__FLEXPWM4_PWMB2                 0x0194 0x0498 0x06ec 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_TXD3__XBAR1_XBAR_INOUT35             0x0194 0x0498 0x08c4 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__NETC_PINMUX_ETH4_RXD0          0x0198 0x049c 0x0638 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__XSPI2_A_DATA4                  0x0198 0x049c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__FLEXIO1_3_2_FLEXIO6            0x0198 0x049c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__GPIO7_IO4                      0x0198 0x049c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__FLEXPWM4_PWMA3                 0x0198 0x049c 0x06e0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_RXD0__SINC4_EMCLK2                   0x0198 0x049c 0x0834 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__NETC_PINMUX_ETH4_RXD1          0x019c 0x04a0 0x063c 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__XSPI2_A_DATA5                  0x019c 0x04a0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__FLEXIO2_4_1_FLEXIO11           0x019c 0x04a0 0x0694 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__FLEXIO1_3_2_FLEXIO7            0x019c 0x04a0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__GPIO7_IO5                      0x019c 0x04a0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__FLEXPWM4_PWMB3                 0x019c 0x04a0 0x06f0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_RXD1__SINC4_EMBIT2                   0x019c 0x04a0 0x0828 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__NETC_PINMUX_ETH4_RXD2          0x01a0 0x04a4 0x0640 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__XSPI2_A_DATA6                  0x01a0 0x04a4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__FLEXIO2_4_1_FLEXIO12           0x01a0 0x04a4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__FLEXIO1_3_2_FLEXIO8            0x01a0 0x04a4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__GPIO7_IO6                      0x01a0 0x04a4 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__DIG_ENCODER2_DATA_EN           0x01a0 0x04a4 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD2__XBAR1_XBAR_INOUT4              0x01a0 0x04a4 0x086c 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__NETC_PINMUX_ETH4_RXD3          0x01a4 0x04a8 0x0644 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__ENET_REF_CLK_ROOT              0x01a4 0x04a8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__XSPI2_A_DATA7                  0x01a4 0x04a8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__FLEXIO2_4_1_FLEXIO13           0x01a4 0x04a8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__FLEXIO1_3_2_FLEXIO9            0x01a4 0x04a8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__GPIO7_IO7                      0x01a4 0x04a8 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__DIG_ENCODER2_DATA_CLK          0x01a4 0x04a8 0x068c 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_RXD3__XBAR1_XBAR_INOUT5              0x01a4 0x04a8 0x0870 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__NETC_PINMUX_ETH4_RX_CTL      0x01a8 0x04ac 0x0634 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__XSPI2_A_SS1_B                0x01a8 0x04ac 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__FLEXIO2_4_1_FLEXIO14         0x01a8 0x04ac 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__FLEXIO1_3_2_FLEXIO10         0x01a8 0x04ac 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__GPIO7_IO8                    0x01a8 0x04ac 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__DIG_ENCODER2_DATA_OUT        0x01a8 0x04ac 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CTL__XBAR1_XBAR_INOUT6            0x01a8 0x04ac 0x0874 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__NETC_PINMUX_ETH4_RX_CLK      0x01ac 0x04b0 0x0630 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__XSPI2_A_DQS                  0x01ac 0x04b0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__FLEXIO2_4_1_FLEXIO15         0x01ac 0x04b0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__FLEXIO1_3_2_FLEXIO11         0x01ac 0x04b0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__GPIO7_IO9                    0x01ac 0x04b0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__DIG_ENCODER2_DATA_IN         0x01ac 0x04b0 0x0690 0x06 0x01</div><div class='add'>+#define IMX94_PAD_ETH4_RX_CLK__XBAR1_XBAR_INOUT7            0x01ac 0x04b0 0x0878 0x07 0x01</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TXD0__NETC_PINMUX_ETH0_TXD0          0x01b0 0x04b4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD0__ECAT_PT0_TXD0                  0x01b0 0x04b4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD0__FLEXIO4_FLEXIO0                0x01b0 0x04b4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD0__GPIO5_IO0                      0x01b0 0x04b4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TXD1__NETC_PINMUX_ETH0_TXD1          0x01b4 0x04b8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD1__ECAT_PT0_TXD1                  0x01b4 0x04b8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD1__FLEXIO4_FLEXIO1                0x01b4 0x04b8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD1__GPIO5_IO1                      0x01b4 0x04b8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TX_EN__NETC_PINMUX_ETH0_TX_EN        0x01b8 0x04bc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_EN__ECAT_PT0_TX_EN                0x01b8 0x04bc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_EN__FLEXIO4_FLEXIO2               0x01b8 0x04bc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_EN__GPIO5_IO2                     0x01b8 0x04bc 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TX_CLK__NETC_PINMUX_ETH0_TX_CLK      0x01bc 0x04c0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_CLK__ECAT_PT0_TX_CLK              0x01bc 0x04c0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_CLK__FLEXIO4_FLEXIO3              0x01bc 0x04c0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_CLK__GPIO5_IO3                    0x01bc 0x04c0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RXD0__NETC_PINMUX_ETH0_RXD0          0x01c0 0x04c4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD0__ECAT_PT0_RXD0                  0x01c0 0x04c4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD0__FLEXIO4_FLEXIO4                0x01c0 0x04c4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD0__GPIO5_IO4                      0x01c0 0x04c4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RXD1__NETC_PINMUX_ETH0_RXD1          0x01c4 0x04c8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD1__ECAT_PT0_RXD1                  0x01c4 0x04c8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD1__FLEXIO4_FLEXIO5                0x01c4 0x04c8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD1__GPIO5_IO5                      0x01c4 0x04c8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RX_DV__NETC_PINMUX_ETH0_RX_DV        0x01c8 0x04cc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_DV__ECAT_PT0_RX_DV                0x01c8 0x04cc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_DV__FLEXIO4_FLEXIO6               0x01c8 0x04cc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_DV__GPIO5_IO6                     0x01c8 0x04cc 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TXD2__NETC_PINMUX_ETH0_TXD2          0x01cc 0x04d0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD2__ECAT_PT0_TXD2                  0x01cc 0x04d0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD2__ETH0_RMII_REF50_CLK            0x01cc 0x04d0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD2__FLEXIO4_FLEXIO7                0x01cc 0x04d0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD2__GPIO5_IO7                      0x01cc 0x04d0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TXD3__NETC_PINMUX_ETH0_TXD3          0x01d0 0x04d4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD3__ECAT_PT0_TXD3                  0x01d0 0x04d4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD3__FLEXIO4_FLEXIO8                0x01d0 0x04d4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TXD3__GPIO5_IO8                      0x01d0 0x04d4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RXD2__NETC_PINMUX_ETH0_RXD2          0x01d4 0x04d8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD2__ECAT_PT0_RXD2                  0x01d4 0x04d8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD2__FLEXIO4_FLEXIO9                0x01d4 0x04d8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD2__GPIO5_IO9                      0x01d4 0x04d8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RXD3__NETC_PINMUX_ETH0_RXD3          0x01d8 0x04dc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD3__ECAT_PT0_RXD3                  0x01d8 0x04dc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD3__FLEXIO4_FLEXIO10               0x01d8 0x04dc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RXD3__GPIO5_IO10                     0x01d8 0x04dc 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RX_CLK__NETC_PINMUX_ETH0_RX_CLK      0x01dc 0x04e0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_CLK__ECAT_PT0_RX_CLK              0x01dc 0x04e0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_CLK__FLEXIO4_FLEXIO11             0x01dc 0x04e0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_CLK__GPIO5_IO11                   0x01dc 0x04e0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_RX_ER__NETC_PINMUX_ETH0_RX_ER        0x01e0 0x04e4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_ER__ECAT_PT0_RX_ER                0x01e0 0x04e4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_ER__FLEXIO4_FLEXIO12              0x01e0 0x04e4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_RX_ER__GPIO5_IO12                    0x01e0 0x04e4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_TX_ER__NETC_PINMUX_ETH0_TX_ER        0x01e4 0x04e8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_ER__ECAT_LINK_ACT0                0x01e4 0x04e8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_ER__FLEXIO4_FLEXIO13              0x01e4 0x04e8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_TX_ER__GPIO5_IO13                    0x01e4 0x04e8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__NETC_PINMUX_ETH0_CRS            0x01e8 0x04ec 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__ECAT_LINK0                      0x01e8 0x04ec 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__NETC_EMDC                       0x01e8 0x04ec 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__FLEXIO4_FLEXIO14                0x01e8 0x04ec 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__GPIO5_IO14                      0x01e8 0x04ec 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__XBAR1_XBAR_INOUT8               0x01e8 0x04ec 0x087c 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH0_CRS__SINC_FILTER_GLUE2_BREAK         0x01e8 0x04ec 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH0_COL__NETC_PINMUX_ETH0_COL            0x01ec 0x04f0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_COL__ECAT_LINK1                      0x01ec 0x04f0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_COL__NETC_EMDIO                      0x01ec 0x04f0 0x0678 0x02 0x03</div><div class='add'>+#define IMX94_PAD_ETH0_COL__FLEXIO4_FLEXIO15                0x01ec 0x04f0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_COL__GPIO5_IO15                      0x01ec 0x04f0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH0_COL__XBAR1_XBAR_INOUT9               0x01ec 0x04f0 0x0880 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH0_COL__SINC_FILTER_GLUE1_BREAK         0x01ec 0x04f0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TXD0__NETC_PINMUX_ETH1_TXD0          0x01f0 0x04f4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD0__ECAT_PT1_TXD0                  0x01f0 0x04f4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD0__ENCODER_DIAG0                  0x01f0 0x04f4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD0__FLEXIO3_FLEXIO0                0x01f0 0x04f4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD0__GPIO5_IO16                     0x01f0 0x04f4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TXD1__NETC_PINMUX_ETH1_TXD1          0x01f4 0x04f8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD1__ECAT_PT1_TXD1                  0x01f4 0x04f8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD1__ENCODER_DIAG1                  0x01f4 0x04f8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD1__FLEXIO3_FLEXIO1                0x01f4 0x04f8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD1__GPIO5_IO17                     0x01f4 0x04f8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TX_EN__NETC_PINMUX_ETH1_TX_EN        0x01f8 0x04fc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_EN__ECAT_PT1_TX_EN                0x01f8 0x04fc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_EN__ENCODER_DIAG2                 0x01f8 0x04fc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_EN__FLEXIO3_FLEXIO2               0x01f8 0x04fc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_EN__GPIO5_IO18                    0x01f8 0x04fc 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TX_CLK__NETC_PINMUX_ETH1_TX_CLK      0x01fc 0x0500 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_CLK__ECAT_PT1_TX_CLK              0x01fc 0x0500 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_CLK__ENCODER_DIAG3                0x01fc 0x0500 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_CLK__FLEXIO3_FLEXIO3              0x01fc 0x0500 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_CLK__GPIO5_IO19                   0x01fc 0x0500 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RXD0__NETC_PINMUX_ETH1_RXD0          0x0200 0x0504 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD0__ECAT_PT1_RXD0                  0x0200 0x0504 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD0__ENCODER_DIAG4                  0x0200 0x0504 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD0__FLEXIO3_FLEXIO4                0x0200 0x0504 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD0__GPIO5_IO20                     0x0200 0x0504 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RXD1__NETC_PINMUX_ETH1_RXD1          0x0204 0x0508 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD1__ECAT_PT1_RXD1                  0x0204 0x0508 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD1__ENCODER_DIAG5                  0x0204 0x0508 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD1__FLEXIO3_FLEXIO5                0x0204 0x0508 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD1__GPIO5_IO21                     0x0204 0x0508 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RX_DV__NETC_PINMUX_ETH1_RX_DV        0x0208 0x050c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_DV__ECAT_PT1_RX_DV                0x0208 0x050c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_DV__ENCODER_DIAG6                 0x0208 0x050c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_DV__FLEXIO3_FLEXIO6               0x0208 0x050c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_DV__GPIO5_IO22                    0x0208 0x050c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__NETC_PINMUX_ETH1_TXD2          0x020c 0x0510 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__ECAT_PT1_TXD2                  0x020c 0x0510 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__ETH1_RMII_REF50_CLK            0x020c 0x0510 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__ENCODER_DIAG7                  0x020c 0x0510 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__FLEXIO3_FLEXIO7                0x020c 0x0510 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD2__GPIO5_IO23                     0x020c 0x0510 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TXD3__NETC_PINMUX_ETH1_TXD3          0x0210 0x0514 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD3__ECAT_PT1_TXD3                  0x0210 0x0514 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD3__ENCODER_DIAG8                  0x0210 0x0514 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD3__FLEXIO3_FLEXIO8                0x0210 0x0514 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TXD3__GPIO5_IO24                     0x0210 0x0514 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RXD2__NETC_PINMUX_ETH1_RXD2          0x0214 0x0518 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD2__ECAT_PT1_RXD2                  0x0214 0x0518 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD2__ENCODER_DIAG9                  0x0214 0x0518 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD2__FLEXIO3_FLEXIO9                0x0214 0x0518 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD2__GPIO5_IO25                     0x0214 0x0518 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RXD3__NETC_PINMUX_ETH1_RXD3          0x0218 0x051c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD3__ECAT_PT1_RXD3                  0x0218 0x051c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD3__ENCODER_DIAG10                 0x0218 0x051c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD3__FLEXIO3_FLEXIO10               0x0218 0x051c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RXD3__GPIO5_IO26                     0x0218 0x051c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RX_CLK__NETC_PINMUX_ETH1_RX_CLK      0x021c 0x0520 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_CLK__ECAT_PT1_RX_CLK              0x021c 0x0520 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_CLK__ENCODER_DIAG11               0x021c 0x0520 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_CLK__FLEXIO3_FLEXIO11             0x021c 0x0520 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_CLK__GPIO5_IO27                   0x021c 0x0520 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_RX_ER__NETC_PINMUX_ETH1_RX_ER        0x0220 0x0524 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_ER__ECAT_PT1_RX_ER                0x0220 0x0524 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_ER__ENCODER_DIAG12                0x0220 0x0524 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_ER__FLEXIO3_FLEXIO12              0x0220 0x0524 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_RX_ER__GPIO5_IO28                    0x0220 0x0524 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_TX_ER__NETC_PINMUX_ETH1_TX_ER        0x0224 0x0528 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_ER__ECAT_LINK_ACT1                0x0224 0x0528 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_ER__ENCODER_DIAG13                0x0224 0x0528 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_ER__FLEXIO3_FLEXIO13              0x0224 0x0528 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_TX_ER__GPIO5_IO29                    0x0224 0x0528 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__NETC_PINMUX_ETH1_CRS            0x0228 0x052c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__ECAT_MDC                        0x0228 0x052c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__NETC_EMDC                       0x0228 0x052c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__ENCODER_DIAG14                  0x0228 0x052c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__FLEXIO3_FLEXIO14                0x0228 0x052c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__GPIO5_IO30                      0x0228 0x052c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__XBAR1_XBAR_INOUT10              0x0228 0x052c 0x0884 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH1_CRS__SINC_FILTER_GLUE1_BREAK         0x0228 0x052c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_ETH1_COL__NETC_PINMUX_ETH1_COL            0x022c 0x0530 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_COL__ECAT_MDIO                       0x022c 0x0530 0x0628 0x01 0x01</div><div class='add'>+#define IMX94_PAD_ETH1_COL__NETC_EMDIO                      0x022c 0x0530 0x0678 0x02 0x04</div><div class='add'>+#define IMX94_PAD_ETH1_COL__ENCODER_DIAG15                  0x022c 0x0530 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_COL__FLEXIO3_FLEXIO15                0x022c 0x0530 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_COL__GPIO5_IO31                      0x022c 0x0530 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_ETH1_COL__XBAR1_XBAR_INOUT11              0x022c 0x0530 0x0888 0x06 0x02</div><div class='add'>+#define IMX94_PAD_ETH1_COL__SINC_FILTER_GLUE2_BREAK         0x022c 0x0530 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_CLK__USDHC1_CLK                       0x0230 0x0534 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CLK__SAI4_TX_BCLK                     0x0230 0x0534 0x0818 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD1_CLK__CAN4_TX                          0x0230 0x0534 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CLK__NETC_1588MUX_INOUT0              0x0230 0x0534 0x064c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_CLK__FLEXIO2_4_1_FLEXIO0              0x0230 0x0534 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CLK__GPIO4_IO8                        0x0230 0x0534 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CLK__FLEXPWM3_PWMX0                   0x0230 0x0534 0x06c8 0x06 0x02</div><div class='add'>+#define IMX94_PAD_SD1_CLK__SINC1_EMCLK0                     0x0230 0x0534 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_CMD__USDHC1_CMD                       0x0234 0x0538 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CMD__SAI4_RX_BCLK                     0x0234 0x0538 0x080c 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD1_CMD__CAN4_RX                          0x0234 0x0538 0x0684 0x02 0x02</div><div class='add'>+#define IMX94_PAD_SD1_CMD__NETC_1588MUX_INOUT1              0x0234 0x0538 0x0650 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_CMD__FLEXIO2_4_1_FLEXIO1              0x0234 0x0538 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CMD__GPIO4_IO9                        0x0234 0x0538 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_CMD__FLEXPWM3_PWMX1                   0x0234 0x0538 0x06cc 0x06 0x02</div><div class='add'>+#define IMX94_PAD_SD1_CMD__SINC1_EMBIT0                     0x0234 0x0538 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__USDHC1_DATA0                   0x0238 0x053c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__SAI4_RX_SYNC                   0x0238 0x053c 0x0814 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__CAN5_TX                        0x0238 0x053c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__NETC_1588MUX_INOUT2            0x0238 0x053c 0x0654 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__FLEXIO2_4_1_FLEXIO2            0x0238 0x053c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__GPIO4_IO10                     0x0238 0x053c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__FLEXPWM3_PWMX2                 0x0238 0x053c 0x06d0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA0__SINC1_EMCLK1                   0x0238 0x053c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__USDHC1_DATA1                   0x023c 0x0540 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__SAI4_TX_SYNC                   0x023c 0x0540 0x081c 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__CAN5_RX                        0x023c 0x0540 0x0688 0x02 0x03</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__NETC_1588MUX_INOUT3            0x023c 0x0540 0x0658 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__FLEXIO2_4_1_FLEXIO3            0x023c 0x0540 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__GPIO4_IO11                     0x023c 0x0540 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__FLEXPWM3_PWMA3                 0x023c 0x0540 0x06b4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA1__SINC1_EMBIT1                   0x023c 0x0540 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__USDHC1_DATA2                   0x0240 0x0544 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__SAI4_TX_DATA0                  0x0240 0x0544 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__PMIC_READY                     0x0240 0x0544 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__NETC_1588MUX_INOUT4            0x0240 0x0544 0x065c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__FLEXIO2_4_1_FLEXIO4            0x0240 0x0544 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__GPIO4_IO12                     0x0240 0x0544 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__FLEXPWM3_PWMB3                 0x0240 0x0544 0x06c4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA2__SINC1_EMCLK2                   0x0240 0x0544 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__USDHC1_DATA3                   0x0244 0x0548 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__SAI4_RX_DATA0                  0x0244 0x0548 0x0810 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__NETC_1588MUX_INOUT5            0x0244 0x0548 0x0660 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__FLEXIO2_4_1_FLEXIO5            0x0244 0x0548 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__GPIO4_IO13                     0x0244 0x0548 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__FLEXPWM3_PWMA2                 0x0244 0x0548 0x06b0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA3__SINC1_EMBIT2                   0x0244 0x0548 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__USDHC1_DATA4                   0x0248 0x054c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__SAI2_RX_DATA0                  0x0248 0x054c 0x07f0 0x01 0x02</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__NETC_1588MUX_INOUT6            0x0248 0x054c 0x0664 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__FLEXIO2_4_1_FLEXIO6            0x0248 0x054c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__GPIO4_IO14                     0x0248 0x054c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__FLEXPWM3_PWMB2                 0x0248 0x054c 0x06c0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA4__SINC1_EMCLK3                   0x0248 0x054c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__USDHC1_DATA5                   0x024c 0x0550 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__SAI2_TX_DATA0                  0x024c 0x0550 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__USDHC1_RESET_B                 0x024c 0x0550 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__NETC_1588MUX_INOUT7            0x024c 0x0550 0x0668 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__FLEXIO2_4_1_FLEXIO7            0x024c 0x0550 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__GPIO4_IO15                     0x024c 0x0550 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__FLEXPWM3_PWMA1                 0x024c 0x0550 0x06ac 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA5__SINC1_EMBIT3                   0x024c 0x0550 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__USDHC1_DATA6                   0x0250 0x0554 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__SAI2_TX_BCLK                   0x0250 0x0554 0x07f8 0x01 0x02</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__USDHC1_CD_B                    0x0250 0x0554 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__NETC_1588MUX_INOUT8            0x0250 0x0554 0x066c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__FLEXIO2_4_1_FLEXIO8            0x0250 0x0554 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__GPIO4_IO16                     0x0250 0x0554 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__FLEXPWM3_PWMB1                 0x0250 0x0554 0x06bc 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA6__SINC1_MOD_CLK0                 0x0250 0x0554 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__USDHC1_DATA7                   0x0254 0x0558 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__SAI2_RX_SYNC                   0x0254 0x0558 0x07f4 0x01 0x02</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__USDHC1_WP                      0x0254 0x0558 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__NETC_1588MUX_INOUT9            0x0254 0x0558 0x0670 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__FLEXIO2_4_1_FLEXIO9            0x0254 0x0558 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__GPIO4_IO17                     0x0254 0x0558 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__FLEXPWM3_PWMA0                 0x0254 0x0558 0x06a8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_DATA7__SINC1_MOD_CLK1                 0x0254 0x0558 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__USDHC1_STROBE                 0x0258 0x055c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__SAI2_TX_SYNC                  0x0258 0x055c 0x07fc 0x01 0x02</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__NETC_1588MUX_INOUT10          0x0258 0x055c 0x0674 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__FLEXIO2_4_1_FLEXIO10          0x0258 0x055c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__GPIO4_IO18                    0x0258 0x055c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__FLEXPWM3_PWMB0                0x0258 0x055c 0x06b8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD1_STROBE__SINC1_MOD_CLK2                0x0258 0x055c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT               0x025c 0x0560 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__SAI4_MCLK                    0x025c 0x0560 0x0808 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__USDHC2_WP                    0x025c 0x0560 0x0854 0x02 0x02</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__NETC_1588MUX_INOUT10         0x025c 0x0560 0x0674 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__FLEXIO2_4_1_FLEXIO11         0x025c 0x0560 0x0694 0x04 0x01</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__GPIO4_IO19                   0x025c 0x0560 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__EXT_CLK1                     0x025c 0x0560 0x0624 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_VSELECT__XBAR1_XBAR_INOUT12           0x025c 0x0560 0x088c 0x07 0x02</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA0__XSPI1_A_DATA0                0x0260 0x0564 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA0__SAI2_RX_SYNC                 0x0260 0x0564 0x07f4 0x01 0x03</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA0__XSPI_SLV_DATA0               0x0260 0x0564 0x0908 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA0__FLEXIO1_3_3_FLEXIO0          0x0260 0x0564 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA0__GPIO7_IO16                   0x0260 0x0564 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA1__XSPI1_A_DATA1                0x0264 0x0568 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA1__SAI2_TX_SYNC                 0x0264 0x0568 0x07fc 0x01 0x03</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA1__XSPI_SLV_DATA1               0x0264 0x0568 0x090c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA1__FLEXIO1_3_3_FLEXIO1          0x0264 0x0568 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA1__GPIO7_IO17                   0x0264 0x0568 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA2__XSPI1_A_DATA2                0x0268 0x056c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA2__SAI2_TX_DATA0                0x0268 0x056c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA2__XSPI_SLV_DATA2               0x0268 0x056c 0x0910 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA2__FLEXIO1_3_3_FLEXIO2          0x0268 0x056c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA2__GPIO7_IO18                   0x0268 0x056c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__XSPI1_A_DATA3                0x026c 0x0570 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__SAI2_RX_DATA0                0x026c 0x0570 0x07f0 0x01 0x03</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__SAI2_MCLK                    0x026c 0x0570 0x07e8 0x02 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__XSPI_SLV_DATA3               0x026c 0x0570 0x0914 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__FLEXIO1_3_3_FLEXIO3          0x026c 0x0570 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA3__GPIO7_IO19                   0x026c 0x0570 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA4__XSPI1_A_DATA4                0x0270 0x0574 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA4__SAI4_RX_SYNC                 0x0270 0x0574 0x0814 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA4__XSPI_SLV_DATA4               0x0270 0x0574 0x0918 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA4__FLEXIO1_3_3_FLEXIO4          0x0270 0x0574 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA4__GPIO7_IO20                   0x0270 0x0574 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA5__XSPI1_A_DATA5                0x0274 0x0578 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA5__SAI4_TX_SYNC                 0x0274 0x0578 0x081c 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA5__XSPI_SLV_DATA5               0x0274 0x0578 0x091c 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA5__FLEXIO1_3_3_FLEXIO5          0x0274 0x0578 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA5__GPIO7_IO21                   0x0274 0x0578 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA6__XSPI1_A_DATA6                0x0278 0x057c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA6__SAI4_TX_DATA0                0x0278 0x057c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA6__XSPI_SLV_DATA6               0x0278 0x057c 0x0920 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA6__FLEXIO1_3_3_FLEXIO6          0x0278 0x057c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA6__GPIO7_IO22                   0x0278 0x057c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__XSPI1_A_DATA7                0x027c 0x0580 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__SAI4_RX_DATA0                0x027c 0x0580 0x0810 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__SAI4_MCLK                    0x027c 0x0580 0x0808 0x02 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__XSPI_SLV_DATA7               0x027c 0x0580 0x0924 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__FLEXIO1_3_3_FLEXIO7          0x027c 0x0580 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DATA7__GPIO7_IO23                   0x027c 0x0580 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_DQS__XSPI1_A_DQS                    0x0280 0x0584 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DQS__SAI2_TX_BCLK                   0x0280 0x0584 0x07f8 0x01 0x03</div><div class='add'>+#define IMX94_PAD_XSPI1_DQS__XSPI_SLV_DQS                   0x0280 0x0584 0x0900 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_DQS__FLEXIO1_3_3_FLEXIO8            0x0280 0x0584 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_DQS__GPIO7_IO24                     0x0280 0x0584 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_SCLK__XSPI1_A_SCLK                  0x0284 0x0588 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SCLK__SAI4_TX_BCLK                  0x0284 0x0588 0x0818 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_SCLK__XSPI_SLV_CLK                  0x0284 0x0588 0x0904 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_SCLK__FLEXIO1_3_3_FLEXIO9           0x0284 0x0588 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SCLK__GPIO7_IO25                    0x0284 0x0588 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_SS0_B__XSPI1_A_SS0_B                0x0288 0x058c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS0_B__SAI4_RX_BCLK                 0x0288 0x058c 0x080c 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_SS0_B__XSPI_SLV_CS                  0x0288 0x058c 0x08fc 0x03 0x01</div><div class='add'>+#define IMX94_PAD_XSPI1_SS0_B__FLEXIO1_3_3_FLEXIO10         0x0288 0x058c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS0_B__GPIO7_IO26                   0x0288 0x058c 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__XSPI1_A_SS1_B                0x028c 0x0590 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__SAI2_RX_BCLK                 0x028c 0x0590 0x07ec 0x01 0x02</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__FLEXPWM3_PWMX3               0x028c 0x0590 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__FLEXIO1_3_3_FLEXIO11         0x028c 0x0590 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__GPIO7_IO27                   0x028c 0x0590 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__SINC1_MOD_CLK0               0x028c 0x0590 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_XSPI1_SS1_B__SINC_FILTER_GLUE1_BREAK      0x028c 0x0590 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__USDHC2_CD_B                     0x0290 0x0594 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__NETC_PINMUX_ETH4_RX_CTL         0x0290 0x0594 0x0634 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__I3C2_SCL                        0x0290 0x0594 0x0720 0x02 0x03</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__NETC_1588MUX_INOUT9             0x0290 0x0594 0x0670 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__FLEXIO2_4_2_FLEXIO0             0x0290 0x0594 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__GPIO4_IO20                      0x0290 0x0594 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__XBAR1_XBAR_INOUT13              0x0290 0x0594 0x0890 0x06 0x02</div><div class='add'>+#define IMX94_PAD_SD2_CD_B__SINC2_EMCLK0                    0x0290 0x0594 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_CLK__USDHC2_CLK                       0x0294 0x0598 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CLK__NETC_PINMUX_ETH4_TX_CLK          0x0294 0x0598 0x0648 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_CLK__I3C2_SDA                         0x0294 0x0598 0x0724 0x02 0x03</div><div class='add'>+#define IMX94_PAD_SD2_CLK__NETC_1588MUX_INOUT8              0x0294 0x0598 0x066c 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_CLK__FLEXIO2_4_2_FLEXIO1              0x0294 0x0598 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CLK__GPIO4_IO21                       0x0294 0x0598 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CLK__OBSERVE0                         0x0294 0x0598 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CLK__SINC2_EMBIT0                     0x0294 0x0598 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_CMD__USDHC2_CMD                       0x0298 0x059c 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__NETC_PINMUX_ETH4_TX_CTL          0x0298 0x059c 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__I3C2_PUR                         0x0298 0x059c 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__I3C2_PUR_B                       0x0298 0x059c 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__FLEXIO2_4_2_FLEXIO2              0x0298 0x059c 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__GPIO4_IO22                       0x0298 0x059c 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__OBSERVE1                         0x0298 0x059c 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_SD2_CMD__SINC2_EMCLK1                     0x0298 0x059c 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__USDHC2_DATA0                   0x029c 0x05a0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__NETC_PINMUX_ETH4_TXD0          0x029c 0x05a0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__CAN2_TX                        0x029c 0x05a0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__NETC_1588MUX_INOUT7            0x029c 0x05a0 0x0668 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__FLEXIO2_4_2_FLEXIO3            0x029c 0x05a0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__GPIO4_IO23                     0x029c 0x05a0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__OBSERVE2                       0x029c 0x05a0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA0__SINC2_EMBIT1                   0x029c 0x05a0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__USDHC2_DATA1                   0x02a0 0x05a4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__NETC_PINMUX_ETH4_TXD1          0x02a0 0x05a4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__CAN2_RX                        0x02a0 0x05a4 0x067c 0x02 0x04</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__NETC_1588MUX_INOUT6            0x02a0 0x05a4 0x0664 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__FLEXIO2_4_2_FLEXIO4            0x02a0 0x05a4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__GPIO4_IO24                     0x02a0 0x05a4 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__XBAR1_XBAR_INOUT14             0x02a0 0x05a4 0x0894 0x06 0x02</div><div class='add'>+#define IMX94_PAD_SD2_DATA1__SINC2_EMCLK2                   0x02a0 0x05a4 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__USDHC2_DATA2                   0x02a4 0x05a8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__NETC_PINMUX_ETH4_TXD2          0x02a4 0x05a8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__MQS2_RIGHT                     0x02a4 0x05a8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__NETC_1588MUX_INOUT5            0x02a4 0x05a8 0x0660 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__FLEXIO2_4_2_FLEXIO5            0x02a4 0x05a8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__GPIO4_IO25                     0x02a4 0x05a8 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__XBAR1_XBAR_INOUT15             0x02a4 0x05a8 0x0898 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_DATA2__SINC2_EMBIT2                   0x02a4 0x05a8 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__USDHC2_DATA3                   0x02a8 0x05ac 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__NETC_PINMUX_ETH4_TXD3          0x02a8 0x05ac 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__MQS2_LEFT                      0x02a8 0x05ac 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__LPTMR2_ALT0                    0x02a8 0x05ac 0x0780 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__FLEXIO2_4_2_FLEXIO6            0x02a8 0x05ac 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__GPIO4_IO26                     0x02a8 0x05ac 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__XBAR1_XBAR_INOUT16             0x02a8 0x05ac 0x089c 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_DATA3__SINC2_EMCLK3                   0x02a8 0x05ac 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__USDHC2_RESET_B               0x02ac 0x05b0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__NETC_PINMUX_ETH4_RXD0        0x02ac 0x05b0 0x0638 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__NETC_1588MUX_INOUT4          0x02ac 0x05b0 0x065c 0x02 0x02</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__LPTMR2_ALT1                  0x02ac 0x05b0 0x0784 0x03 0x01</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__FLEXIO2_4_2_FLEXIO7          0x02ac 0x05b0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__GPIO4_IO27                   0x02ac 0x05b0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__XBAR1_XBAR_INOUT17           0x02ac 0x05b0 0x08a0 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_RESET_B__SINC2_EMBIT3                 0x02ac 0x05b0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__USDHC2_WP                      0x02b0 0x05b4 0x0854 0x00 0x03</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__NETC_PINMUX_ETH4_RXD1          0x02b0 0x05b4 0x063c 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__NETC_1588MUX_INOUT3            0x02b0 0x05b4 0x0658 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__FLEXIO2_4_2_FLEXIO8            0x02b0 0x05b4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__GPIO4_IO28                     0x02b0 0x05b4 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__XBAR1_XBAR_INOUT18             0x02b0 0x05b4 0x08a4 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO0__SINC2_MOD_CLK1                 0x02b0 0x05b4 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__LPTMR2_ALT2                    0x02b4 0x05b8 0x0788 0x00 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__NETC_PINMUX_ETH4_RXD2          0x02b4 0x05b8 0x0640 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__ECAT_CLK25                     0x02b4 0x05b8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__NETC_1588MUX_INOUT2            0x02b4 0x05b8 0x0654 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__FLEXIO2_4_2_FLEXIO9            0x02b4 0x05b8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__GPIO4_IO29                     0x02b4 0x05b8 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__XBAR1_XBAR_INOUT19             0x02b4 0x05b8 0x08a8 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO1__SINC2_MOD_CLK0                 0x02b4 0x05b8 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__NETC_PINMUX_ETH4_RXD3          0x02b8 0x05bc 0x0644 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__CAN5_TX                        0x02b8 0x05bc 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__NETC_1588MUX_INOUT1            0x02b8 0x05bc 0x0650 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__FLEXIO2_4_2_FLEXIO10           0x02b8 0x05bc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__GPIO4_IO30                     0x02b8 0x05bc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__XBAR1_XBAR_INOUT20             0x02b8 0x05bc 0x08ac 0x06 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO2__SINC2_MOD_CLK2                 0x02b8 0x05bc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__NETC_PINMUX_ETH4_RX_CLK        0x02bc 0x05c0 0x0630 0x01 0x01</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__CAN5_RX                        0x02bc 0x05c0 0x0688 0x02 0x04</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__NETC_1588MUX_INOUT0            0x02bc 0x05c0 0x064c 0x03 0x02</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__FLEXIO2_4_2_FLEXIO11           0x02bc 0x05c0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__GPIO4_IO31                     0x02bc 0x05c0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__XBAR1_XBAR_INOUT21             0x02bc 0x05c0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_SD2_GPIO3__SINC_FILTER_GLUE2_BREAK        0x02bc 0x05c0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__LPI2C1_SCL                      0x02c0 0x05c4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__I3C1_SCL                        0x02c0 0x05c4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__LPUART1_DCD_B                   0x02c0 0x05c4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__TPM2_CH0                        0x02c0 0x05c4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__SAI1_RX_SYNC                    0x02c0 0x05c4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SCL__GPIO1_IO0                       0x02c0 0x05c4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__LPI2C1_SDA                      0x02c4 0x05c8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__I3C1_SDA                        0x02c4 0x05c8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__LPUART1_RIN_B                   0x02c4 0x05c8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__TPM2_CH1                        0x02c4 0x05c8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__SAI1_RX_BCLK                    0x02c4 0x05c8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_I2C1_SDA__GPIO1_IO1                       0x02c4 0x05c8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__LPI2C2_SCL                      0x02c8 0x05cc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__I3C1_PUR                        0x02c8 0x05cc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__LPUART2_DCD_B                   0x02c8 0x05cc 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__TPM2_CH2                        0x02c8 0x05cc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__GPT1_CLK                        0x02c8 0x05cc 0x060c 0x04 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__GPIO1_IO2                       0x02c8 0x05cc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__I3C1_PUR_B                      0x02c8 0x05cc 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SCL__LPIT1_TRIGGER0                  0x02c8 0x05cc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__LPI2C2_SDA                      0x02cc 0x05d0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__LPI2C1_HREQ                     0x02cc 0x05d0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__LPUART2_RIN_B                   0x02cc 0x05d0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__TPM2_CH3                        0x02cc 0x05d0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__SAI1_MCLK                       0x02cc 0x05d0 0x0620 0x04 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__GPIO1_IO3                       0x02cc 0x05d0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__EWM_OUT_B                       0x02cc 0x05d0 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_I2C2_SDA__LPIT1_TRIGGER1                  0x02cc 0x05d0 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_UART1_RXD__LPUART1_RX                     0x02d0 0x05d4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_UART1_RXD__S400_UART_RX                   0x02d0 0x05d4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_UART1_RXD__LPSPI2_SIN                     0x02d0 0x05d4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_UART1_RXD__TPM1_CH0                       0x02d0 0x05d4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_UART1_RXD__GPT1_CAPTURE1                  0x02d0 0x05d4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_UART1_RXD__GPIO1_IO4                      0x02d0 0x05d4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_UART1_TXD__LPUART1_TX                     0x02d4 0x05d8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_UART1_TXD__S400_UART_TX                   0x02d4 0x05d8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_UART1_TXD__LPSPI2_PCS0                    0x02d4 0x05d8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_UART1_TXD__TPM1_CH1                       0x02d4 0x05d8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_UART1_TXD__GPT1_COMPARE1                  0x02d4 0x05d8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_UART1_TXD__GPIO1_IO5                      0x02d4 0x05d8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_UART2_RXD__LPUART2_RX                     0x02d8 0x05dc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_UART2_RXD__LPUART1_CTS_B                  0x02d8 0x05dc 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_UART2_RXD__LPSPI2_SOUT                    0x02d8 0x05dc 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_UART2_RXD__TPM1_CH2                       0x02d8 0x05dc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_UART2_RXD__SAI1_MCLK                      0x02d8 0x05dc 0x0620 0x04 0x01</div><div class='add'>+#define IMX94_PAD_UART2_RXD__GPIO1_IO6                      0x02d8 0x05dc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_UART2_RXD__GPT1_CLK                       0x02d8 0x05dc 0x060c 0x06 0x01</div><div class='add'>+#define IMX94_PAD_UART2_RXD__LPIT1_TRIGGER2                 0x02d8 0x05dc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_UART2_TXD__LPUART2_TX                     0x02dc 0x05e0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_UART2_TXD__LPUART1_RTS_B                  0x02dc 0x05e0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_UART2_TXD__LPSPI2_SCK                     0x02dc 0x05e0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_UART2_TXD__TPM1_CH3                       0x02dc 0x05e0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_UART2_TXD__GPIO1_IO7                      0x02dc 0x05e0 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_PDM_CLK__PDM_CLK                          0x02e0 0x05e4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_PDM_CLK__MQS1_LEFT                        0x02e0 0x05e4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_PDM_CLK__LPTMR1_ALT0                      0x02e0 0x05e4 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_PDM_CLK__GPIO1_IO8                        0x02e0 0x05e4 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_PDM_CLK__CAN1_TX                          0x02e0 0x05e4 0x0000 0x06 0x00</div><div class='add'>+#define IMX94_PAD_PDM_CLK__EWM_OUT_B                        0x02e0 0x05e4 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0          0x02e4 0x05e8 0x0610 0x00 0x02</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__MQS1_RIGHT               0x02e4 0x05e8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__LPSPI1_PCS1              0x02e4 0x05e8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__TPM1_EXTCLK              0x02e4 0x05e8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__LPTMR1_ALT1              0x02e4 0x05e8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__GPIO1_IO9                0x02e4 0x05e8 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM0__CAN1_RX                  0x02e4 0x05e8 0x0608 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1          0x02e8 0x05ec 0x0614 0x00 0x03</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__NMI_GLUE_NMI             0x02e8 0x05ec 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__LPSPI2_PCS1              0x02e8 0x05ec 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__TPM2_EXTCLK              0x02e8 0x05ec 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__LPTMR1_ALT2              0x02e8 0x05ec 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__GPIO1_IO10               0x02e8 0x05ec 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_PDM_BIT_STREAM1__EXT_CLK1                 0x02e8 0x05ec 0x0624 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__SAI1_TX_SYNC                   0x02ec 0x05f0 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__SAI1_TX_DATA1                  0x02ec 0x05f0 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__LPSPI1_PCS0                    0x02ec 0x05f0 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__LPUART2_DTR_B                  0x02ec 0x05f0 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__MQS1_LEFT                      0x02ec 0x05f0 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__GPIO1_IO11                     0x02ec 0x05f0 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXFS__EWM_OUT_B                      0x02ec 0x05f0 0x0000 0x06 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__SAI1_TX_BCLK                    0x02f0 0x05f4 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__LPUART2_CTS_B                   0x02f0 0x05f4 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__LPSPI1_SIN                      0x02f0 0x05f4 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__LPUART1_DSR_B                   0x02f0 0x05f4 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__CAN1_RX                         0x02f0 0x05f4 0x0608 0x04 0x01</div><div class='add'>+#define IMX94_PAD_SAI1_TXC__GPIO1_IO12                      0x02f0 0x05f4 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__SAI1_TX_DATA0                  0x02f4 0x05f8 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__LPUART2_RTS_B                  0x02f4 0x05f8 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__LPSPI1_SCK                     0x02f4 0x05f8 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__LPUART1_DTR_B                  0x02f4 0x05f8 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__CAN1_TX                        0x02f4 0x05f8 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_TXD0__GPIO1_IO13                     0x02f4 0x05f8 0x0000 0x05 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__SAI1_RX_DATA0                  0x02f8 0x05fc 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__SAI1_MCLK                      0x02f8 0x05fc 0x0620 0x01 0x02</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__LPSPI1_SOUT                    0x02f8 0x05fc 0x0000 0x02 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__LPUART2_DSR_B                  0x02f8 0x05fc 0x0000 0x03 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__MQS1_RIGHT                     0x02f8 0x05fc 0x0000 0x04 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__GPIO1_IO14                     0x02f8 0x05fc 0x0000 0x05 0x00</div><div class='add'>+#define IMX94_PAD_SAI1_RXD0__LPIT1_TRIGGER3                 0x02f8 0x05fc 0x0000 0x07 0x00</div><div class='add'>+</div><div class='add'>+#define IMX94_PAD_WDOG_ANY__WDOG_ANY                        0x02fc 0x0600 0x0000 0x00 0x00</div><div class='add'>+#define IMX94_PAD_WDOG_ANY__FCCU_EOUT1                      0x02fc 0x0600 0x0000 0x01 0x00</div><div class='add'>+#define IMX94_PAD_WDOG_ANY__GPIO1_IO15                      0x02fc 0x0600 0x0000 0x05 0x00</div><div class='add'>+#endif /* __DTS_IMX94_PINFUNC_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx94-power.h b/arch/arm64/boot/dts/freescale/imx94-power.h<br/>new file mode 100644<br/>index 000000000000..5209afed60ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx94-power.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx94-power.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ *  Copyright 2024-2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __IMX94_POWER_H</div><div class='add'>+#define __IMX94_POWER_H</div><div class='add'>+</div><div class='add'>+#define IMX94_PD_ANA		0</div><div class='add'>+#define IMX94_PD_AON		1</div><div class='add'>+#define IMX94_PD_BBSM		2</div><div class='add'>+#define IMX94_PD_M71		3</div><div class='add'>+#define IMX94_PD_CCMSRCGPC	4</div><div class='add'>+#define IMX94_PD_A55C0		5</div><div class='add'>+#define IMX94_PD_A55C1		6</div><div class='add'>+#define IMX94_PD_A55C2		7</div><div class='add'>+#define IMX94_PD_A55C3		8</div><div class='add'>+#define IMX94_PD_A55P		9</div><div class='add'>+#define IMX94_PD_DDR		10</div><div class='add'>+#define IMX94_PD_DISPLAY	11</div><div class='add'>+#define IMX94_PD_M70		12</div><div class='add'>+#define IMX94_PD_HSIO_TOP	13</div><div class='add'>+#define IMX94_PD_HSIO_WAON	14</div><div class='add'>+#define IMX94_PD_NETC		15</div><div class='add'>+#define IMX94_PD_NOC		16</div><div class='add'>+#define IMX94_PD_NPU		17</div><div class='add'>+#define IMX94_PD_WAKEUP		18</div><div class='add'>+</div><div class='add'>+#define IMX94_PERF_M33		0</div><div class='add'>+#define IMX94_PERF_M33S		1</div><div class='add'>+#define IMX94_PERF_WAKEUP	2</div><div class='add'>+#define IMX94_PERF_M70		3</div><div class='add'>+#define IMX94_PERF_M71		4</div><div class='add'>+#define IMX94_PERF_DRAM		5</div><div class='add'>+#define IMX94_PERF_HSIO		6</div><div class='add'>+#define IMX94_PERF_NPU		7</div><div class='add'>+#define IMX94_PERF_NOC		8</div><div class='add'>+#define IMX94_PERF_A55		9</div><div class='add'>+#define IMX94_PERF_DISP		10</div><div class='add'>+</div><div class='add'>+#endif /* __IMX94_POWER_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi<br/>new file mode 100644<br/>index 000000000000..d4a880496b0e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx94.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx94.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1194 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024-2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx94-clock.h"</div><div class='add'>+#include "imx94-pinfunc.h"</div><div class='add'>+#include "imx94-power.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	osc_24m: clock-24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "osc_24m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dummy: clock-dummy {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "dummy";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_ext1: clock-ext1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;133000000&gt;;</div><div class='add'>+		clock-output-names = "clk_ext1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai1_mclk: clock-sai1-mclk1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "sai1_mclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai2_mclk: clock-sai2-mclk1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "sai2_mclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai3_mclk: clock-sai3-mclk1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "sai3_mclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai4_mclk: clock-sai4-mclk1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "sai4_mclk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "arm,scmi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			mboxes = &lt;&amp;mu2 5 0&gt;, &lt;&amp;mu2 3 0&gt;, &lt;&amp;mu2 3 1&gt;, &lt;&amp;mu2 5 1&gt;;</div><div class='add'>+			shmem = &lt;&amp;scmi_buf0&gt;, &lt;&amp;scmi_buf1&gt;;</div><div class='add'>+			arm,max-rx-timeout-ms = &lt;5000&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_devpd: protocol@11 {</div><div class='add'>+				reg = &lt;0x11&gt;;</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_sys_power: protocol@12 {</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_perf: protocol@13 {</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_iomuxc: protocol@19 {</div><div class='add'>+				reg = &lt;0x19&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_bbm: protocol@81 {</div><div class='add'>+				reg = &lt;0x81&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_misc: protocol@84 {</div><div class='add'>+				reg = &lt;0x84&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs1: mqs1 {</div><div class='add'>+		compatible = "fsl,imx943-aonmix-mqs";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mqs2: mqs2 {</div><div class='add'>+		compatible = "fsl,imx943-wakeupmix-mqs";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@48000000 {</div><div class='add'>+		compatible = "arm,gic-v3";</div><div class='add'>+		reg = &lt;0 0x48000000 0 0x10000&gt;,</div><div class='add'>+		      &lt;0 0x48060000 0 0xc0000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+		its: msi-controller@48040000 {</div><div class='add'>+			compatible = "arm,gic-v3-its";</div><div class='add'>+			reg = &lt;0 0x48040000 0 0x20000&gt;;</div><div class='add'>+			#msi-cells = &lt;1&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+			msi-controller;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		aips2: bus@42000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0x42000000 0x0 0x800000&gt;;</div><div class='add'>+			ranges = &lt;0x42000000 0x0 0x42000000 0x8000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			edma2: dma-controller@42000000 {</div><div class='add'>+				compatible = "fsl,imx94-edma5", "fsl,imx95-edma5";</div><div class='add'>+				reg = &lt;0x42000000 0x210000&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "dma";</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;64&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;a55_irqsteer 0&gt;, &lt;&amp;a55_irqsteer 1&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 2&gt;, &lt;&amp;a55_irqsteer 3&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 4&gt;, &lt;&amp;a55_irqsteer 5&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 6&gt;, &lt;&amp;a55_irqsteer 7&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 8&gt;, &lt;&amp;a55_irqsteer 9&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 10&gt;, &lt;&amp;a55_irqsteer 11&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 12&gt;, &lt;&amp;a55_irqsteer 13&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 14&gt;, &lt;&amp;a55_irqsteer 15&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 16&gt;, &lt;&amp;a55_irqsteer 17&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 18&gt;, &lt;&amp;a55_irqsteer 19&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 20&gt;, &lt;&amp;a55_irqsteer 21&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 22&gt;, &lt;&amp;a55_irqsteer 23&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 24&gt;, &lt;&amp;a55_irqsteer 25&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 26&gt;, &lt;&amp;a55_irqsteer 27&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 28&gt;, &lt;&amp;a55_irqsteer 29&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 30&gt;, &lt;&amp;a55_irqsteer 31&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 64&gt;, &lt;&amp;a55_irqsteer 65&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 66&gt;, &lt;&amp;a55_irqsteer 67&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 68&gt;, &lt;&amp;a55_irqsteer 69&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 70&gt;, &lt;&amp;a55_irqsteer 71&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 72&gt;, &lt;&amp;a55_irqsteer 73&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 74&gt;, &lt;&amp;a55_irqsteer 75&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 76&gt;, &lt;&amp;a55_irqsteer 77&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 78&gt;, &lt;&amp;a55_irqsteer 79&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 80&gt;, &lt;&amp;a55_irqsteer 81&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 82&gt;, &lt;&amp;a55_irqsteer 83&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 84&gt;, &lt;&amp;a55_irqsteer 85&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 86&gt;, &lt;&amp;a55_irqsteer 87&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 88&gt;, &lt;&amp;a55_irqsteer 89&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 90&gt;, &lt;&amp;a55_irqsteer 91&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 92&gt;, &lt;&amp;a55_irqsteer 93&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 94&gt;, &lt;&amp;a55_irqsteer 95&gt;,</div><div class='add'>+						      &lt;&amp;gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu10: mailbox@42430000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42430000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i3c2: i3c@42520000 {</div><div class='add'>+				compatible = "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x42520000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_I3C2SLOW&gt;,</div><div class='add'>+					 &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c3: i2c@42530000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x42530000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C3&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 5 0 0&gt;, &lt;&amp;edma2 6 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c4: i2c@42540000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x42540000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C4&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 4 0 0&gt;, &lt;&amp;edma4 5 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi3: spi@42550000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42550000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI3&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 7 0 0&gt;, &lt;&amp;edma2 8 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi4: spi@42560000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42560000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI4&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 6 0 0&gt;, &lt;&amp;edma4 7 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart3: serial@42570000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42570000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART3&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 10 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 9 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart4: serial@42580000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42580000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART4&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 10 0 FSL_EDMA_RX&gt;, &lt;&amp;edma4 9 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart5: serial@42590000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42590000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART5&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 12 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 11 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart6: serial@425a0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x425a0000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART6&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 12 0 FSL_EDMA_RX&gt;, &lt;&amp;edma4 11 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan2: can@425b0000 {</div><div class='add'>+				compatible = "fsl,imx94-flexcan", "fsl,imx95-flexcan";</div><div class='add'>+				reg = &lt;0x425b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_CAN2&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_CAN2&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan3: can@425e0000 {</div><div class='add'>+				compatible = "fsl,imx94-flexcan", "fsl,imx95-flexcan";</div><div class='add'>+				reg = &lt;0x425e0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_CAN3&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_CAN3&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan4: can@425f0000 {</div><div class='add'>+				compatible = "fsl,imx94-flexcan", "fsl,imx95-flexcan";</div><div class='add'>+				reg = &lt;0x425f0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_CAN4&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_CAN4&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan5: can@42600000 {</div><div class='add'>+				compatible = "fsl,imx94-flexcan", "fsl,imx95-flexcan";</div><div class='add'>+				reg = &lt;0x42600000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_CAN5&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_CAN5&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai2: sai@42650000 {</div><div class='add'>+				compatible = "fsl,imx94-sai", "fsl,imx95-sai";</div><div class='add'>+				reg = &lt;0x42650000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;, &lt;&amp;dummy&gt;,</div><div class='add'>+					&lt;&amp;scmi_clk IMX94_CLK_SAI2&gt;, &lt;&amp;dummy&gt;, &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 30 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 29 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai3: sai@42660000 {</div><div class='add'>+				compatible = "fsl,imx94-sai", "fsl,imx95-sai";</div><div class='add'>+				reg = &lt;0x42660000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;, &lt;&amp;dummy&gt;,</div><div class='add'>+					&lt;&amp;scmi_clk IMX94_CLK_SAI3&gt;, &lt;&amp;dummy&gt;, &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 32 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 31 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai4: sai@42670000 {</div><div class='add'>+				compatible = "fsl,imx94-sai", "fsl,imx95-sai";</div><div class='add'>+				reg = &lt;0x42670000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;, &lt;&amp;dummy&gt;,</div><div class='add'>+					&lt;&amp;scmi_clk IMX94_CLK_SAI4&gt;, &lt;&amp;dummy&gt;, &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma2 36 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 35 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart7: serial@42690000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42690000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART7&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 46 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 45 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart8: serial@426a0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x426a0000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART8&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 39 0 FSL_EDMA_RX&gt;, &lt;&amp;edma4 38 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c5: i2c@426b0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C5&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 37 0 0&gt;, &lt;&amp;edma2 38 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c6: i2c@426c0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426c0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C6&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 30 0 0&gt;, &lt;&amp;edma4 31 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c7: i2c@426d0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426d0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C7&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 39 0 0&gt;, &lt;&amp;edma2 40 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c8: i2c@426e0000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x426e0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C8&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 32 0 0&gt;, &lt;&amp;edma4 33 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi5: spi@426f0000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x426f0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI5&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 41 0 0&gt;, &lt;&amp;edma2 42 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi6: spi@42700000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42700000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI6&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 34 0 0&gt;, &lt;&amp;edma4 35 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi7: spi@42710000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42710000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI7&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 43 0 0&gt;, &lt;&amp;edma2 44 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi8: spi@42720000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x42720000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI8&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 36 0 0&gt;, &lt;&amp;edma4 37 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu11: mailbox@42730000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42730000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edma4: dma-controller@42df0000 {</div><div class='add'>+				compatible = "fsl,imx94-edma5", "fsl,imx95-edma5";</div><div class='add'>+				reg = &lt;0x42df0000 0x210000&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				clock-names = "dma";</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;64&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;a55_irqsteer 128&gt;, &lt;&amp;a55_irqsteer 129&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 130&gt;, &lt;&amp;a55_irqsteer 131&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 132&gt;, &lt;&amp;a55_irqsteer 133&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 134&gt;, &lt;&amp;a55_irqsteer 135&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 136&gt;, &lt;&amp;a55_irqsteer 137&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 138&gt;, &lt;&amp;a55_irqsteer 139&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 140&gt;, &lt;&amp;a55_irqsteer 141&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 142&gt;, &lt;&amp;a55_irqsteer 143&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 144&gt;, &lt;&amp;a55_irqsteer 145&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 146&gt;, &lt;&amp;a55_irqsteer 147&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 148&gt;, &lt;&amp;a55_irqsteer 149&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 150&gt;, &lt;&amp;a55_irqsteer 151&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 152&gt;, &lt;&amp;a55_irqsteer 153&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 154&gt;, &lt;&amp;a55_irqsteer 155&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 156&gt;, &lt;&amp;a55_irqsteer 157&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 158&gt;, &lt;&amp;a55_irqsteer 159&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 192&gt;, &lt;&amp;a55_irqsteer 193&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 194&gt;, &lt;&amp;a55_irqsteer 195&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 196&gt;, &lt;&amp;a55_irqsteer 197&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 198&gt;, &lt;&amp;a55_irqsteer 199&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 200&gt;, &lt;&amp;a55_irqsteer 201&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 202&gt;, &lt;&amp;a55_irqsteer 203&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 204&gt;, &lt;&amp;a55_irqsteer 205&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 206&gt;, &lt;&amp;a55_irqsteer 207&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 208&gt;, &lt;&amp;a55_irqsteer 209&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 210&gt;, &lt;&amp;a55_irqsteer 211&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 212&gt;, &lt;&amp;a55_irqsteer 213&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 214&gt;, &lt;&amp;a55_irqsteer 215&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 216&gt;, &lt;&amp;a55_irqsteer 217&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 218&gt;, &lt;&amp;a55_irqsteer 219&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 220&gt;, &lt;&amp;a55_irqsteer 221&gt;,</div><div class='add'>+						      &lt;&amp;a55_irqsteer 222&gt;, &lt;&amp;a55_irqsteer 223&gt;,</div><div class='add'>+						      &lt;&amp;gic GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips3: bus@42800000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0 0x42800000 0 0x800000&gt;;</div><div class='add'>+			ranges = &lt;0x42800000 0x0 0x42800000 0x800000&gt;,</div><div class='add'>+				 &lt;0x28000000 0x0 0x28000000 0x1000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			usdhc1: mmc@42850000 {</div><div class='add'>+				compatible = "fsl,imx94-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x42850000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_WAKEUPAXI&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_USDHC1&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_USDHC1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;400000000&gt;;</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc2: mmc@42860000 {</div><div class='add'>+				compatible = "fsl,imx94-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x42860000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_WAKEUPAXI&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_USDHC2&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_USDHC2&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc3: mmc@42880000 {</div><div class='add'>+				compatible = "fsl,imx94-usdhc", "fsl,imx8mm-usdhc";</div><div class='add'>+				reg = &lt;0x42880000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_WAKEUPAXI&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_USDHC3&gt;;</div><div class='add'>+				clock-names = "ipg", "ahb", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_USDHC3&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+				bus-width = &lt;4&gt;;</div><div class='add'>+				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart9: serial@42a50000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42a50000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART10&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 51 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 50 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart10: serial@42a60000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42a60000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART10&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 47 0 FSL_EDMA_RX&gt;, &lt;&amp;edma4 46 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart11: serial@42a70000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42a70000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART11&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma2 53 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 52 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart12: serial@42a80000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x42a80000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART12&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma4 49 0 FSL_EDMA_RX&gt;, &lt;&amp;edma4 48 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu12: mailbox@42ac0000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42ac0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu13: mailbox@42ae0000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42ae0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu14: mailbox@42b00000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42b00000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu15: mailbox@42b20000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42b20000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu16: mailbox@42b40000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42b40000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu17: mailbox@42b60000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x42b60000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@43810000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43810000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 4 32&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@43820000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43820000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 36 26&gt;;</div><div class='add'>+			ngpios = &lt;26&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@43840000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43840000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 62 4&gt;, &lt;&amp;scmi_iomuxc 4 0 4&gt;,</div><div class='add'>+				      &lt;&amp;scmi_iomuxc 8 140 12&gt;, &lt;&amp;scmi_iomuxc 20 164 12&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio5: gpio@43850000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43850000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 108 32&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio6: gpio@43860000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43860000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 66 32&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio7: gpio@43870000 {</div><div class='add'>+			compatible = "fsl,imx94-gpio", "fsl,imx8ulp-gpio";</div><div class='add'>+			reg = &lt;0x0 0x43870000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;scmi_iomuxc 0 98 10&gt;, &lt;&amp;scmi_iomuxc 16 152 12&gt;;</div><div class='add'>+			gpio-reserved-ranges = &lt;10 6&gt;;</div><div class='add'>+			ngpios = &lt;28&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips1: bus@44000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0x44000000 0x0 0x800000&gt;;</div><div class='add'>+			ranges = &lt;0x44000000 0x0 0x44000000 0x800000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			edma1: dma-controller@44000000 {</div><div class='add'>+				compatible = "fsl,imx94-edma3", "fsl,imx93-edma3";</div><div class='add'>+				reg = &lt;0x44000000 0x210000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "dma";</div><div class='add'>+				#dma-cells = &lt;3&gt;;</div><div class='add'>+				dma-channels = &lt;32&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu1: mailbox@44220000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x44220000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			system_counter: timer@44290000 {</div><div class='add'>+				compatible = "nxp,imx94-sysctr-timer", "nxp,imx95-sysctr-timer";</div><div class='add'>+				reg = &lt;0x44290000 0x30000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc_24m&gt;;</div><div class='add'>+				clock-names = "per";</div><div class='add'>+				nxp,no-divider;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm1: pwm@44310000 {</div><div class='add'>+				compatible = "fsl,imx94-pwm", "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x44310000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tpm2: pwm@44320000 {</div><div class='add'>+				compatible = "fsl,imx94-pwm", "fsl,imx7ulp-pwm";</div><div class='add'>+				reg = &lt;0x44320000 0x1000&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_TPM2&gt;;</div><div class='add'>+				#pwm-cells = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i3c1: i3c@44330000 {</div><div class='add'>+				compatible = "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x44330000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_I3C1SLOW&gt;,</div><div class='add'>+					 &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk", "slow_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c1: i2c@44340000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x44340000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C1&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 12 0 0&gt;, &lt;&amp;edma1 13 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpi2c2: i2c@44350000 {</div><div class='add'>+				compatible = "fsl,imx94-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='add'>+				reg = &lt;0x44350000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPI2C2&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 14 0 0&gt;, &lt;&amp;edma1 15 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi1: spi@44360000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x44360000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI2&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 16 0 0&gt;, &lt;&amp;edma1 17 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpspi2: spi@44370000 {</div><div class='add'>+				compatible = "fsl,imx94-spi", "fsl,imx7ulp-spi";</div><div class='add'>+				reg = &lt;0x44370000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPSPI2&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "per", "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 18 0 0&gt;, &lt;&amp;edma1 19 0 FSL_EDMA_RX&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart1: serial@44380000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x44380000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART1&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 21 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 20 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpuart2: serial@44390000 {</div><div class='add'>+				compatible = "fsl,imx94-lpuart", "fsl,imx8ulp-lpuart",</div><div class='add'>+					     "fsl,imx7ulp-lpuart";</div><div class='add'>+				reg = &lt;0x44390000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_LPUART2&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				dmas = &lt;&amp;edma1 23 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 22 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			flexcan1: can@443a0000 {</div><div class='add'>+				compatible = "fsl,imx94-flexcan", "fsl,imx95-flexcan";</div><div class='add'>+				reg = &lt;0x443a0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_CAN1&gt;;</div><div class='add'>+				clock-names = "ipg", "per";</div><div class='add'>+				assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_CAN1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+				fsl,clk-source = /bits/ 8 &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai1: sai@443b0000 {</div><div class='add'>+				compatible = "fsl,imx94-sai", "fsl,imx95-sai";</div><div class='add'>+				reg = &lt;0x443b0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;, &lt;&amp;dummy&gt;,</div><div class='add'>+					&lt;&amp;scmi_clk IMX94_CLK_SAI1&gt;, &lt;&amp;dummy&gt;,</div><div class='add'>+					&lt;&amp;dummy&gt;, &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+				dmas = &lt;&amp;edma1 25 0 FSL_EDMA_RX&gt;, &lt;&amp;edma1 24 0 0&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			micfil: micfil@44520000 {</div><div class='add'>+				compatible = "fsl,imx943-micfil";</div><div class='add'>+				reg = &lt;0x44520000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_PDM&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2&gt;,</div><div class='add'>+					 &lt;&amp;dummy&gt;;</div><div class='add'>+				clock-names = "ipg_clk", "ipg_clk_app",</div><div class='add'>+					      "pll8k", "pll11k", "clkext3";</div><div class='add'>+				dmas = &lt;&amp;edma1 6 0 (FSL_EDMA_MULTI_FIFO | FSL_EDMA_RX)&gt;;</div><div class='add'>+				dma-names = "rx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc1: adc@44530000 {</div><div class='add'>+				compatible = "nxp,imx94-adc", "nxp,imx93-adc";</div><div class='add'>+				reg = &lt;0x44530000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_ADC&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu2: mailbox@445b0000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x445b0000 0x1000&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+				interrupts = &lt;GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				sram0: sram@445b1000 {</div><div class='add'>+					compatible = "mmio-sram";</div><div class='add'>+					reg = &lt;0x445b1000 0x400&gt;;</div><div class='add'>+					ranges = &lt;0x0 0x445b1000 0x400&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					scmi_buf0: scmi-sram-section@0 {</div><div class='add'>+						compatible = "arm,scmi-shmem";</div><div class='add'>+						reg = &lt;0x0 0x80&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					scmi_buf1: scmi-sram-section@80 {</div><div class='add'>+						compatible = "arm,scmi-shmem";</div><div class='add'>+						reg = &lt;0x80 0x80&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu3: mailbox@445d0000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x445d0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu4: mailbox@445f0000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x445f0000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mu6: mailbox@44630000 {</div><div class='add'>+				compatible = "fsl,imx94-mu", "fsl,imx95-mu";</div><div class='add'>+				reg = &lt;0x44630000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#mbox-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			a55_irqsteer: interrupt-controller@446a0000 {</div><div class='add'>+				compatible = "fsl,imx94-irqsteer", "fsl,imx-irqsteer";</div><div class='add'>+				reg = &lt;0x446a0000 0x1000&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSAON&gt;;</div><div class='add'>+				clock-names = "ipg";</div><div class='add'>+				fsl,channel = &lt;0&gt;;</div><div class='add'>+				fsl,num-irqs = &lt;960&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips4: bus@49000000 {</div><div class='add'>+			compatible = "fsl,aips-bus", "simple-bus";</div><div class='add'>+			reg = &lt;0x0 0x49000000 0x0 0x800000&gt;;</div><div class='add'>+			ranges = &lt;0x49000000 0x0 0x49000000 0x800000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			wdog3: watchdog@49220000 {</div><div class='add'>+				compatible = "fsl,imx94-wdt", "fsl,imx93-wdt";</div><div class='add'>+				reg = &lt;0x49220000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_BUSWAKEUP&gt;;</div><div class='add'>+				timeout-sec = &lt;40&gt;;</div><div class='add'>+				fsl,ext-reset-output;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts<br/>new file mode 100644<br/>index 000000000000..c8c3eff9df1a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx943-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx943-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,627 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024-2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx943.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "fsl,imx943-evk", "fsl,imx94";</div><div class='add'>+	model = "NXP i.MX943 EVK board";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c5 = &amp;lpi2c6;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_sco_codec: bt-sco-codec {</div><div class='add'>+		compatible = "linux,bt-sco";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic: dmic {</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDD_SD2_3V3";</div><div class='add'>+		gpio = &lt;&amp;gpio4 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_pwr: regulator-wm8962-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "audio-pwr";</div><div class='add'>+		gpio = &lt;&amp;pcal6416_i2c3_u171 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x7f000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x10000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-bt-sco {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,format = "dsp_a";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,name = "bt-sco-audio";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;bt_sco_codec 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		btcpu: simple-audio-card,cpu {</div><div class='add'>+			dai-tdm-slot-num = &lt;2&gt;;</div><div class='add'>+			dai-tdm-slot-width = &lt;16&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;sai3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-micfil {</div><div class='add'>+		compatible = "fsl,imx-audio-card";</div><div class='add'>+		model = "micfil-audio";</div><div class='add'>+</div><div class='add'>+		pri-dai-link {</div><div class='add'>+			format = "i2s";</div><div class='add'>+			link-name = "micfil hifi";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;dmic&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;micfil&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;sai1&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Ext Spk", "SPKOUTL",</div><div class='add'>+			"Ext Spk", "SPKOUTR",</div><div class='add'>+			"AMIC", "MICBIAS",</div><div class='add'>+			"IN3R", "AMIC",</div><div class='add'>+			"IN1R", "AMIC";</div><div class='add'>+		hp-det-gpio = &lt;&amp;pcal6416_i2c3_u48 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9670_i2c3: gpio@23 {</div><div class='add'>+		compatible = "nxp,pca9670";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9548_i2c3: i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			wm8962: codec@1a {</div><div class='add'>+				compatible = "wlf,wm8962";</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX94_CLK_SAI1&gt;;</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				CPVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				DBVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				DCVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				gpio-cfg = &lt;</div><div class='add'>+					0x0000 /* 0:Default */</div><div class='add'>+					0x0000 /* 1:Default */</div><div class='add'>+					0x0000 /* 2:FN_DMICCLK */</div><div class='add'>+					0x0000 /* 3:Default */</div><div class='add'>+					0x0000 /* 4:FN_DMICCDAT */</div><div class='add'>+					0x0000 /* 5:Default */</div><div class='add'>+				&gt;;</div><div class='add'>+				MICVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				PLLVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+				SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6416_i2c3_u46: gpio@20 {</div><div class='add'>+				compatible = "nxp,pcal6416";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+</div><div class='add'>+				sd-card-on-hog {</div><div class='add'>+					gpios = &lt;13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcal6416_i2c3_u171: gpio@21 {</div><div class='add'>+				compatible = "nxp,pcal6416";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+</div><div class='add'>+				audio-pwren-hog {</div><div class='add'>+					gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mqs-mic-sel-hog {</div><div class='add'>+					gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-low;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6416_i2c3_u48: gpio@20 {</div><div class='add'>+				compatible = "nxp,pcal6416";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_ioexpander_int&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6408_i2c3_u172: gpio@20 {</div><div class='add'>+				compatible = "nxp,pcal6408";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+				/* shared int pin with u48 */</div><div class='add'>+				interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c6 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c6&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9544_i2c6: i2c-mux@77 {</div><div class='add'>+		compatible = "nxp,pca9544";</div><div class='add'>+		reg = &lt;0x77&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6416_i2c6_u50: gpio@21 {</div><div class='add'>+				compatible = "nxp,pcal6416";</div><div class='add'>+				reg = &lt;0x21&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6408_i2c6_u170: gpio@20 {</div><div class='add'>+				compatible = "nxp,pcal6408";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+				interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_ioexpander_int2&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcal6416_i2c6_u44: gpio@20 {</div><div class='add'>+				compatible = "nxp,pcal6416";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+</div><div class='add'>+				/* pdm selection */</div><div class='add'>+				can-pdm-sel-hog {</div><div class='add'>+					gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-low;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai3-sel-hog {</div><div class='add'>+					gpios = &lt;11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* eMMC IOMUX selection */</div><div class='add'>+				sd1-sel-hog {</div><div class='add'>+					gpios = &lt;0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* SD card IOMUX selection */</div><div class='add'>+				sd2-sel-hog {</div><div class='add'>+					gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+					gpio-hog;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;micfil {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_PDM&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;,</div><div class='add'>+			       &lt;3612672000&gt;, &lt;393216000&gt;,</div><div class='add'>+			       &lt;361267200&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pdm&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_SAI1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;,</div><div class='add'>+			       &lt;3612672000&gt;, &lt;393216000&gt;,</div><div class='add'>+			       &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX94_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX94_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;,</div><div class='add'>+			       &lt;3612672000&gt;, &lt;393216000&gt;,</div><div class='add'>+			       &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_iomuxc {</div><div class='add'>+</div><div class='add'>+	pinctrl_ioexpander_int2: ioexpanderint2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_CCM_CLKO4__GPIO4_IO3		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ioexpander_int: ioexpanderintgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_GPIO_IO45__GPIO3_IO13		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_GPIO_IO16__LPI2C3_SDA		0x40000b9e</div><div class='add'>+			IMX94_PAD_GPIO_IO17__LPI2C3_SCL		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c4: lpi2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_GPIO_IO18__LPI2C4_SDA		0x40000b9e</div><div class='add'>+			IMX94_PAD_GPIO_IO19__LPI2C4_SCL		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c6: lpi2c6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_GPIO_IO29__LPI2C6_SDA		0x40000b9e</div><div class='add'>+			IMX94_PAD_GPIO_IO28__LPI2C6_SCL		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pdm: pdmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_PDM_CLK__PDM_CLK			0x31e</div><div class='add'>+			IMX94_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0	0x31e</div><div class='add'>+			IMX94_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SAI1_TXFS__SAI1_TX_SYNC	0x31e</div><div class='add'>+			IMX94_PAD_SAI1_TXC__SAI1_TX_BCLK	0x31e</div><div class='add'>+			IMX94_PAD_SAI1_TXD0__SAI1_TX_DATA0	0x31e</div><div class='add'>+			IMX94_PAD_SAI1_RXD0__SAI1_RX_DATA0	0x31e</div><div class='add'>+			IMX94_PAD_I2C2_SDA__SAI1_MCLK		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_GPIO_IO42__SAI3_TX_BCLK	0x31e</div><div class='add'>+			IMX94_PAD_GPIO_IO56__SAI3_TX_SYNC	0x31e</div><div class='add'>+			IMX94_PAD_GPIO_IO46__SAI3_RX_DATA0	0x31e</div><div class='add'>+			IMX94_PAD_GPIO_IO47__SAI3_TX_DATA0	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_UART1_TXD__LPUART1_TX		0x31e</div><div class='add'>+			IMX94_PAD_UART1_RXD__LPUART1_RX		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e</div><div class='add'>+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e</div><div class='add'>+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x15fe</div><div class='add'>+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x13fe</div><div class='add'>+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e</div><div class='add'>+			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e</div><div class='add'>+			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e</div><div class='add'>+			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e</div><div class='add'>+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e</div><div class='add'>+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x15fe</div><div class='add'>+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x13fe</div><div class='add'>+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x13fe</div><div class='add'>+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x13fe</div><div class='add'>+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x13fe</div><div class='add'>+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x13fe</div><div class='add'>+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD2_CD_B__GPIO4_IO20		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e</div><div class='add'>+			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e</div><div class='add'>+			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e</div><div class='add'>+			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX94_PAD_SD2_RESET_B__GPIO4_IO27	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio4 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog3 {</div><div class='add'>+	fsl,ext-reset-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi<br/>new file mode 100644<br/>index 000000000000..45b8da758e87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx943.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx943.dtsi</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "imx94.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_pd_wait: cpu-pd-wait {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010033&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;1000&gt;;</div><div class='add'>+				exit-latency-us = &lt;700&gt;;</div><div class='add'>+				min-residency-us = &lt;2700&gt;;</div><div class='add'>+				wakeup-latency-us = &lt;1500&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_perf IMX94_PERF_A55&gt;;</div><div class='add'>+			power-domain-names = "perf";</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_perf IMX94_PERF_A55&gt;;</div><div class='add'>+			power-domain-names = "perf";</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_perf IMX94_PERF_A55&gt;;</div><div class='add'>+			power-domain-names = "perf";</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_perf IMX94_PERF_A55&gt;;</div><div class='add'>+			power-domain-names = "perf";</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_l3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_l0: l2-cache-l0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;65536&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_l1: l2-cache-l1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;65536&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_l2: l2-cache-l2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;65536&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_l3: l2-cache-l3 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;65536&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;256&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_cache: l3-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-size = &lt;1048576&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-sets = &lt;1024&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts<br/>new file mode 100644<br/>index 000000000000..148243470dd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,1182 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/i3c/i3c.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx95.dtsi"</div><div class='add'>+</div><div class='add'>+#define FALLING_EDGE		BIT(0)</div><div class='add'>+#define RISING_EDGE		BIT(1)</div><div class='add'>+</div><div class='add'>+#define BRD_SM_CTRL_SD3_WAKE		0x8000</div><div class='add'>+#define BRD_SM_CTRL_PCIE1_WAKE		0x8001</div><div class='add'>+#define BRD_SM_CTRL_BT_WAKE		0x8002</div><div class='add'>+#define BRD_SM_CTRL_PCIE2_WAKE		0x8003</div><div class='add'>+#define BRD_SM_CTRL_BUTTON		0x8004</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "fsl,imx95-15x15-evk", "fsl,imx95";</div><div class='add'>+	model = "NXP i.MX95 15X15 board";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;enetc_port0;</div><div class='add'>+		ethernet1 = &amp;enetc_port1;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		gpio4 = &amp;gpio5;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		i2c5 = &amp;lpi2c6;</div><div class='add'>+		i2c6 = &amp;lpi2c7;</div><div class='add'>+		i2c7 = &amp;lpi2c8;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		mmc2 = &amp;usdhc3;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_sco_codec: bt-sco-codec {</div><div class='add'>+		compatible = "linux,bt-sco";</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		stdout-path = &amp;lpuart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan0: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cooling-levels = &lt;64 128 192 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;tpm6 0 4000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "+V1.8_SW";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "+V3.3_SW";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vref_1v8: regulator-adc-vref {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vref_1v8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_pwr: regulator-audio-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "audio-pwr";</div><div class='add'>+		gpio = &lt;&amp;pcal6524 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_audio_switch1: regulator-audio-switch1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "audio-switch1";</div><div class='add'>+		gpio = &lt;&amp;pcal6524 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_can2_stby: regulator-can2-stby {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "can2-stby";</div><div class='add'>+		gpio = &lt;&amp;pcal6524 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_m2_pwr: regulator-m2-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "M.2-power";</div><div class='add'>+		gpio = &lt;&amp;pcal6524 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDD_SD2_3V3";</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc3_vmmc: regulator-usdhc3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "WLAN_EN";</div><div class='add'>+		vin-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/*</div><div class='add'>+		 * IW612 wifi chip needs more delay than other wifi chips to complete</div><div class='add'>+		 * the host interface initialization after power up, otherwise the</div><div class='add'>+		 * internal state of IW612 may be unstable, resulting in the failure of</div><div class='add'>+		 * the SDIO3.0 switch voltage.</div><div class='add'>+		 */</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb_vbus: regulator-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "USB_VBUS";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pcal6524 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vcc_12v: regulator-vcc-12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "VCC_12V";</div><div class='add'>+		gpio = &lt;&amp;pcal6524 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		linux_cma: linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x7F000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x3c000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring0: vdev0vring0@88000000 {</div><div class='add'>+			reg = &lt;0 0x88000000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: vdev0vring1@88008000 {</div><div class='add'>+			reg = &lt;0 0x88008000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring0: vdev1vring0@88010000 {</div><div class='add'>+			reg = &lt;0 0x88010000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring1: vdev1vring1@88018000 {</div><div class='add'>+			reg = &lt;0 0x88018000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdevbuffer: vdevbuffer@88020000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x88020000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rsc_table: rsc-table@88220000 {</div><div class='add'>+			reg = &lt;0 0x88220000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpu_boot: vpu_boot@a0000000 {</div><div class='add'>+			reg = &lt;0 0xa0000000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-bt-sco {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-inversion;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,format = "dsp_a";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;btcpu&gt;;</div><div class='add'>+		simple-audio-card,name = "bt-sco-audio";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;bt_sco_codec 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		btcpu: simple-audio-card,cpu {</div><div class='add'>+			dai-tdm-slot-num = &lt;2&gt;;</div><div class='add'>+			dai-tdm-slot-width = &lt;16&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-micfil {</div><div class='add'>+		compatible = "fsl,imx-audio-card";</div><div class='add'>+		model = "micfil-audio";</div><div class='add'>+</div><div class='add'>+		pri-dai-link {</div><div class='add'>+			format = "i2s";</div><div class='add'>+			link-name = "micfil hifi";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;micfil&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		compatible = "fsl,imx-audio-wm8962";</div><div class='add'>+		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+		audio-routing = "Headphone Jack", "HPOUTL", "Headphone Jack", "HPOUTR",</div><div class='add'>+				"Ext Spk", "SPKOUTL", "Ext Spk", "SPKOUTR", "AMIC", "MICBIAS",</div><div class='add'>+				"IN3R", "AMIC", "IN1R", "AMIC";</div><div class='add'>+		hp-det-gpio = &lt;&amp;gpio2 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		model = "wm8962-audio";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_hp&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-xcvr {</div><div class='add'>+		compatible = "fsl,imx-audio-card";</div><div class='add'>+		model = "imx-audio-xcvr";</div><div class='add'>+</div><div class='add'>+		pri-dai-link {</div><div class='add'>+			link-name = "XCVR PCM";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;xcvr&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usdhc3_pwrseq: usdhc3-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc3_pwrseq&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		reg = &lt;0x0 0x80000000 0 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port1 {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_can2_stby&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c2 {</div><div class='add'>+	i2c-scl-hz = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i3c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9570: gpio@24 {</div><div class='add'>+		compatible = "nxp,pca9570";</div><div class='add'>+		reg = &lt;0x24 0 (I2C_FILTER)&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "OUT1", "OUT2", "OUT3", "OUT4";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8962: codec@1a {</div><div class='add'>+		compatible = "wlf,wm8962";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;scmi_clk IMX95_CLK_SAI3&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		gpio-cfg = &lt;</div><div class='add'>+			0x0000</div><div class='add'>+			0x0000</div><div class='add'>+			0x0000</div><div class='add'>+			0x0000</div><div class='add'>+			0x0000</div><div class='add'>+			0x0000</div><div class='add'>+		&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		PLLVDD-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD1-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+		SPKVDD2-supply = &lt;&amp;reg_audio_pwr&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcal6524: gpio@22 {</div><div class='add'>+		compatible = "nxp,pcal6524";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcal6524&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ptn5110: tcpc@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ptn5110&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		typec_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			op-sink-microwatt = &lt;15000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			self-powered;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_VAR(5000, 20000, 3000)&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec_con_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_data_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					typec_con_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_data_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9632: led-controller@62 {</div><div class='add'>+		compatible = "nxp,pca9632";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		nxp,inverted-out;</div><div class='add'>+</div><div class='add'>+		led_backlight0: led@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_BACKLIGHT;</div><div class='add'>+			function-enumerator = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_backlight1: led@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			function = LED_FUNCTION_BACKLIGHT;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c6 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c6&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;micfil {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_PDM&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;, &lt;3612672000&gt;, &lt;393216000&gt;, &lt;361267200&gt;, &lt;49152000&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pdm&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mu7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_bus0 {</div><div class='add'>+	msi-map = &lt;0x00 &amp;its 0x60 0x1&gt;,	//ENETC0 PF</div><div class='add'>+		  &lt;0x10 &amp;its 0x61 0x1&gt;, //ENETC0 VF0</div><div class='add'>+		  &lt;0x20 &amp;its 0x62 0x1&gt;, //ENETC0 VF1</div><div class='add'>+		  &lt;0x40 &amp;its 0x63 0x1&gt;, //ENETC1 PF</div><div class='add'>+		  &lt;0x50 &amp;its 0x65 0x1&gt;, //ENETC1 VF0</div><div class='add'>+		  &lt;0x60 &amp;its 0x66 0x1&gt;, //ENETC1 VF1</div><div class='add'>+		  &lt;0x80 &amp;its 0x64 0x1&gt;, //ENETC2 PF</div><div class='add'>+		  &lt;0xc0 &amp;its 0x67 0x1&gt;;</div><div class='add'>+	iommu-map = &lt;0x0 &amp;smmu 0x20 0x1&gt;,</div><div class='add'>+		    &lt;0x10 &amp;smmu 0x21 0x1&gt;,</div><div class='add'>+		    &lt;0x20 &amp;smmu 0x22 0x1&gt;,</div><div class='add'>+		    &lt;0x40 &amp;smmu 0x23 0x1&gt;,</div><div class='add'>+		    &lt;0x50 &amp;smmu 0x25 0x1&gt;,</div><div class='add'>+		    &lt;0x60 &amp;smmu 0x26 0x1&gt;,</div><div class='add'>+		    &lt;0x80 &amp;smmu 0x24 0x1&gt;,</div><div class='add'>+		    &lt;0xc0 &amp;smmu 0x27 0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_emdio {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_emdio&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy0: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pcal6524 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		realtek,clkout-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethphy1: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pcal6524 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		realtek,clkout-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_timer {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netcmix_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpio = &lt;&amp;gpio5 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_m2_pwr&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SAI1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;, &lt;3612672000&gt;, &lt;393216000&gt;, &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;, &lt;3612672000&gt;, &lt;393216000&gt;, &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_iomuxc {</div><div class='add'>+	pinctrl_emdio: emdiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET2_MDC__NETCMIX_TOP_NETC_MDC		0x50e</div><div class='add'>+			IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_NETC_MDIO		0x90e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc0: enetc0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3		0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc1: enetc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET2_TD3__NETCMIX_TOP_ETH1_RGMII_TD3		0x50e</div><div class='add'>+			IMX95_PAD_ENET2_TD2__NETCMIX_TOP_ETH1_RGMII_TD2		0x50e</div><div class='add'>+			IMX95_PAD_ENET2_TD1__NETCMIX_TOP_ETH1_RGMII_TD1		0x50e</div><div class='add'>+			IMX95_PAD_ENET2_TD0__NETCMIX_TOP_ETH1_RGMII_TD0		0x50e</div><div class='add'>+			IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_ETH1_RGMII_TX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TXC__NETCMIX_TOP_ETH1_RGMII_TX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_ETH1_RGMII_RX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RXC__NETCMIX_TOP_ETH1_RGMII_RX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET2_RD0__NETCMIX_TOP_ETH1_RGMII_RD0		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD1__NETCMIX_TOP_ETH1_RGMII_RD1		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD2__NETCMIX_TOP_ETH1_RGMII_RD2		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD3__NETCMIX_TOP_ETH1_RGMII_RD3		0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO25__CAN2_TX				0x39e</div><div class='add'>+			IMX95_PAD_GPIO_IO27__CAN2_RX				0x39e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_hp: hpgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO21__GPIO2_IO_BIT21			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i3c2: i3c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET1_MDC__I3C2_SCL				0x40000186</div><div class='add'>+			IMX95_PAD_ENET1_MDIO__I3C2_SDA				0x40000186</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C1_SCL__AONMIX_TOP_LPI2C1_SCL		0x40000b9e</div><div class='add'>+			IMX95_PAD_I2C1_SDA__AONMIX_TOP_LPI2C1_SDA		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL		0x40000b9e</div><div class='add'>+			IMX95_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO28__LPI2C3_SDA				0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO29__LPI2C3_SCL				0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c4: lpi2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO30__LPI2C4_SDA				0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO31__LPI2C4_SCL				0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c6: lpi2c6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO02__LPI2C6_SDA				0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO03__LPI2C6_SCL				0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mipi_dsi_csi: mipidsigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_XSPI1_DATA6__GPIO5_IO_BIT6			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcal6524: pcal6524grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie0: pcie0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B		0x40000b1e</div><div class='add'>+			IMX95_PAD_GPIO_IO33__GPIO5_IO_BIT13			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pdm: pdmgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e</div><div class='add'>+			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ptn5110: ptn5110grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SAI1_RXD0__AONMIX_TOP_SAI1_RX_DATA_BIT0	0x31e</div><div class='add'>+			IMX95_PAD_SAI1_TXC__AONMIX_TOP_SAI1_TX_BCLK		0x31e</div><div class='add'>+			IMX95_PAD_SAI1_TXFS__AONMIX_TOP_SAI1_TX_SYNC		0x31e</div><div class='add'>+			IMX95_PAD_SAI1_TXD0__AONMIX_TOP_SAI1_TX_DATA_BIT0	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai2: sai2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_SAI2_RX_BCLK		0x31e</div><div class='add'>+			IMX95_PAD_ENET2_MDC__NETCMIX_TOP_SAI2_RX_SYNC		0x31e</div><div class='add'>+			IMX95_PAD_ENET2_TD3__NETCMIX_TOP_SAI2_RX_DATA_BIT0	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_TD2__NETCMIX_TOP_SAI2_RX_DATA_BIT1	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_TXC__NETCMIX_TOP_SAI2_TX_BCLK		0x31e</div><div class='add'>+			IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_SAI2_TX_SYNC	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_SAI2_TX_DATA_BIT0	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_RXC__NETCMIX_TOP_SAI2_TX_DATA_BIT1	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_RD0__NETCMIX_TOP_SAI2_TX_DATA_BIT2	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_RD1__NETCMIX_TOP_SAI2_TX_DATA_BIT3	0x31e</div><div class='add'>+			IMX95_PAD_ENET2_RD2__NETCMIX_TOP_SAI2_MCLK		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO17__SAI3_MCLK				0x31e</div><div class='add'>+			IMX95_PAD_GPIO_IO16__SAI3_TX_BCLK			0x31e</div><div class='add'>+			IMX95_PAD_GPIO_IO26__SAI3_TX_SYNC			0x31e</div><div class='add'>+			IMX95_PAD_GPIO_IO20__SAI3_RX_DATA_BIT0			0x31e</div><div class='add'>+			IMX95_PAD_GPIO_IO19__SAI3_TX_DATA_BIT0			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spdif: spdifgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO22__SPDIF_IN				0x3fe</div><div class='add'>+			IMX95_PAD_GPIO_IO23__SPDIF_OUT				0x3fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm3: tpm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_CCM_CLKO2__GPIO3_IO_BIT27			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm6: tpm6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO08__TPM6_CH0				0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1: uart1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX		0x31e</div><div class='add'>+			IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_DAP_TDO_TRACESWO__LPUART5_TX			0x31e</div><div class='add'>+			IMX95_PAD_DAP_TDI__LPUART5_RX				0x31e</div><div class='add'>+			IMX95_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B			0x31e</div><div class='add'>+			IMX95_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x138e</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x138e</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK				0x15fe</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD				0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x15fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD3_CLK__USDHC3_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD3_CMD__USDHC3_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA0__USDHC3_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA1__USDHC3_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA2__USDHC3_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA3__USDHC3_DATA3			0x138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_pwrseq: usdhc3pwrseqgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_XSPI1_SCLK__GPIO5_IO_BIT9			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD3_CLK__USDHC3_CLK				0x158e</div><div class='add'>+			IMX95_PAD_SD3_CMD__USDHC3_CMD				0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA0__USDHC3_DATA0			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA1__USDHC3_DATA1			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA2__USDHC3_DATA2			0x138e</div><div class='add'>+			IMX95_PAD_SD3_DATA3__USDHC3_DATA3			0x138e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD3_CLK__USDHC3_CLK				0x15fe</div><div class='add'>+			IMX95_PAD_SD3_CMD__USDHC3_CMD				0x13fe</div><div class='add'>+			IMX95_PAD_SD3_DATA0__USDHC3_DATA0			0x13fe</div><div class='add'>+			IMX95_PAD_SD3_DATA1__USDHC3_DATA1			0x13fe</div><div class='add'>+			IMX95_PAD_SD3_DATA2__USDHC3_DATA2			0x13fe</div><div class='add'>+			IMX95_PAD_SD3_DATA3__USDHC3_DATA3			0x13fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_misc {</div><div class='add'>+	nxp,ctrl-ids = &lt;BRD_SM_CTRL_SD3_WAKE		1&gt;,</div><div class='add'>+		       &lt;BRD_SM_CTRL_PCIE1_WAKE		1&gt;,</div><div class='add'>+		       &lt;BRD_SM_CTRL_BT_WAKE		1&gt;,</div><div class='add'>+		       &lt;BRD_SM_CTRL_PCIE2_WAKE		1&gt;,</div><div class='add'>+		       &lt;BRD_SM_CTRL_BUTTON		1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;thermal_zones {</div><div class='add'>+	a55-thermal {</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map1 {</div><div class='add'>+				cooling-device = &lt;&amp;fan0 0 1&gt;;</div><div class='add'>+				trip = &lt;&amp;atrip2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			map2 {</div><div class='add'>+				cooling-device = &lt;&amp;fan0 1 2&gt;;</div><div class='add'>+				trip = &lt;&amp;atrip3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			map3 {</div><div class='add'>+				cooling-device = &lt;&amp;fan0 2 3&gt;;</div><div class='add'>+				trip = &lt;&amp;atrip4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			atrip2: trip2 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;55000&gt;;</div><div class='add'>+				type = "active";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			atrip3: trip3 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;65000&gt;;</div><div class='add'>+				type = "active";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			atrip4: trip4 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;75000&gt;;</div><div class='add'>+				type = "active";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pf09-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 2&gt;;</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf09_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf09_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pf53arm-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 4&gt;;</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				cooling-device = &lt;&amp;A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						 &lt;&amp;A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						 &lt;&amp;A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						 &lt;&amp;A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						 &lt;&amp;A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						 &lt;&amp;A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				trip = &lt;&amp;pf5301_alert&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf5301_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf5301_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pf53soc-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 3&gt;;</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf5302_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf5302_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm6 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm6&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	srp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	snps,dis-u1-entry-quirk;</div><div class='add'>+	snps,dis-u2-entry-quirk;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_data_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	fsl,phy-pcs-tx-deemph-3p5db-attenuation-db = &lt;17&gt;;</div><div class='add'>+	fsl,phy-pcs-tx-swing-full-percent = &lt;100&gt;;</div><div class='add'>+	fsl,phy-tx-preemp-amp-tune-microamp = &lt;600&gt;;</div><div class='add'>+	fsl,phy-tx-vboost-level-microvolt = &lt;1156&gt;;</div><div class='add'>+	fsl,phy-tx-vref-tune-percent = &lt;100&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_data_ss: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	fsl,tuning-step = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 00 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	fsl,tuning-step = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;usdhc3_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc3_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc3_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc3_vmmc&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xcvr {</div><div class='add'>+	clocks = &lt;&amp;scmi_clk IMX95_CLK_BUSWAKEUP&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_SPDIF&gt;,</div><div class='add'>+		 &lt;&amp;dummy&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_AUDIOXCVR&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;;</div><div class='add'>+	clock-names = "ipg", "phy", "spba", "pll_ipg", "pll8k", "pll11k";</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SPDIF&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOXCVR&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;, &lt;3612672000&gt;,</div><div class='add'>+			       &lt;393216000&gt;, &lt;361267200&gt;,</div><div class='add'>+			       &lt;12288000&gt;, &lt;0&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spdif&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts<br/>new file mode 100644<br/>index 000000000000..808a9fe3ebb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "imx95-19x19-evk.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	sof_cpu: cm7-cpu@80000000 {</div><div class='add'>+		compatible = "fsl,imx95-cm7-sof";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x6100000&gt;;</div><div class='add'>+		reg-names = "sram";</div><div class='add'>+		memory-region = &lt;&amp;adma_res&gt;;</div><div class='add'>+		memory-region-names = "dma";</div><div class='add'>+		mboxes = &lt;&amp;mu7 2 0&gt;, &lt;&amp;mu7 2 1&gt;, &lt;&amp;mu7 3 0&gt;, &lt;&amp;mu7 3 1&gt;;</div><div class='add'>+		mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";</div><div class='add'>+</div><div class='add'>+		sai3_cpu: port {</div><div class='add'>+			sai3_cpu_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;wm8962_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		adma_res: memory@86100000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x86100000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sof-sound {</div><div class='add'>+		compatible = "audio-graph-card2";</div><div class='add'>+		links = &lt;&amp;sai3_cpu&gt;;</div><div class='add'>+		label = "audio";</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_hp&gt;;</div><div class='add'>+		widgets = "Headphone", "Headphones",</div><div class='add'>+			  "Microphone", "Headset Mic";</div><div class='add'>+		routing = "Headphones", "HPOUTL",</div><div class='add'>+			  "Headphones", "HPOUTR",</div><div class='add'>+			  "Headset Mic", "MICBIAS",</div><div class='add'>+			  "IN3R", "Headset Mic",</div><div class='add'>+			  "IN1R", "Headset Mic";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound-wm8962 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edma2 {</div><div class='add'>+	/* channels 30 and 31 reserved for FW usage */</div><div class='add'>+	dma-channel-mask = &lt;0xc0000000&gt;, &lt;0x0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wm8962 {</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;, &lt;3612672000&gt;,</div><div class='add'>+			       &lt;393216000&gt;, &lt;361267200&gt;,</div><div class='add'>+			       &lt;12288000&gt;;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		wm8962_ep: endpoint {</div><div class='add'>+			bitclock-master;</div><div class='add'>+			frame-master;</div><div class='add'>+			remote-endpoint = &lt;&amp;sai3_cpu_ep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts<br/>index 37a1d4ca1b20..9f968feccef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts</a></div><div class='hunk'>@@ -6,16 +6,41 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "imx95.dtsi"</div><div class='ctx'> </div><div class='add'>+#define FALLING_EDGE			1</div><div class='add'>+#define RISING_EDGE			2</div><div class='add'>+</div><div class='add'>+#define BRD_SM_CTRL_SD3_WAKE		0x8000	/* PCAL6408A-0 */</div><div class='add'>+#define BRD_SM_CTRL_PCIE1_WAKE		0x8001	/* PCAL6408A-4 */</div><div class='add'>+#define BRD_SM_CTRL_BT_WAKE		0x8002	/* PCAL6408A-5 */</div><div class='add'>+#define BRD_SM_CTRL_PCIE2_WAKE		0x8003	/* PCAL6408A-6 */</div><div class='add'>+#define BRD_SM_CTRL_BUTTON		0x8004	/* PCAL6408A-7 */</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "NXP i.MX95 19X19 board";</div><div class='ctx'> 	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		ethernet0 = &amp;enetc_port0;</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		gpio4 = &amp;gpio5;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		i2c5 = &amp;lpi2c6;</div><div class='add'>+		i2c6 = &amp;lpi2c7;</div><div class='add'>+		i2c7 = &amp;lpi2c8;</div><div class='ctx'> 		mmc0 = &amp;usdhc1;</div><div class='ctx'> 		mmc1 = &amp;usdhc2;</div><div class='ctx'> 		serial0 = &amp;lpuart1;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	bt_sco_codec: audio-codec-bt-sco {</div><div class='hunk'>@@ -53,6 +78,29 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	flexcan1_phy: can-phy0 {</div><div class='add'>+		compatible = "nxp,tjr1443";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;i2c6_pcal6416 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;i2c6_pcal6416 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexcan2_phy: can-phy1 {</div><div class='add'>+		compatible = "nxp,tjr1443";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;i2c4_gpio_expander_21 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;i2c4_gpio_expander_21 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vref_1v8: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "+V1.8_SW";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_3p3v: regulator-3p3v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -88,6 +136,13 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		gpio = &lt;&amp;i2c7_pcal6524 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='add'>+		/*</div><div class='add'>+		 * M.2 device only can be enabled(W_DISABLE1#) after all Power</div><div class='add'>+		 * Rails reach their minimum operating voltage (PCI Express M.2</div><div class='add'>+		 * Specification r5.1 3.1.4 Power-up Timing).</div><div class='add'>+		 * Set a delay equal to the max value of Tsettle here.</div><div class='add'>+		 */</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_pcie0: regulator-pcie {</div><div class='hunk'>@@ -121,6 +176,15 @@</div><div class='ctx'> 		off-on-delay-us = &lt;12000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_usb_vbus: regulator-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "USB_VBUS";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;i2c7_pcal6524 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound-bt-sco {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "bt-sco-audio";</div><div class='hunk'>@@ -160,7 +224,7 @@</div><div class='ctx'> 		model = "wm8962-audio";</div><div class='ctx'> 		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;wm8962&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		audio-routing = "Headphone Jack", "HPOUTL",</div><div class='ctx'> 				"Headphone Jack", "HPOUTR",</div><div class='ctx'> 				"Ext Spk", "SPKOUTL",</div><div class='hunk'>@@ -171,6 +235,33 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adc1 {</div><div class='add'>+	vref-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	phys = &lt;&amp;flexcan1_phy&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	phys = &lt;&amp;flexcan2_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;flexspi1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_flexspi1&gt;;</div><div class='hunk'>@@ -190,6 +281,50 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpi2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adp5585: io-expander@34 {</div><div class='add'>+		compatible = "adi,adp5585-00", "adi,adp5585";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-reserved-ranges = &lt;5 1&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c3_gpio_expander_20: gpio@20 {</div><div class='add'>+		compatible = "nxp,pcal6408";</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9632: pca9632@62 {</div><div class='add'>+		compatible = "nxp,pca9632";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led_baclklight: led@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			label = "backlight";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpi2c4 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -232,6 +367,42 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpi2c5 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c5_pcal6408: gpio@21 {</div><div class='add'>+		compatible = "nxp,pcal6408";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c6 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c6&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2c6_pcal6416: gpio@21 {</div><div class='add'>+		compatible = "nxp,pcal6416";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;28 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcal6416&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpi2c7 {</div><div class='ctx'> 	clock-frequency = &lt;1000000&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -250,6 +421,48 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='ctx'> 		interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ptn5110: tcpc@50 {</div><div class='add'>+		compatible = "nxp,ptn5110", "tcpci";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_typec&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		typec_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 0, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			op-sink-microwatt = &lt;0&gt;;</div><div class='add'>+			self-powered;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					typec_con_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_data_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					typec_con_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb3_data_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpuart1 {</div><div class='hunk'>@@ -259,6 +472,24 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi7 {</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi7&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio2 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;micfil {</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -280,6 +511,32 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;netcmix_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_emdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_emdio&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy0: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;i2c5_pcal6408 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		realtek,clkout-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_timer {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -288,6 +545,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0_ep {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcie0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -296,6 +560,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie1_ep {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_slot_pwr&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sai1 {</div><div class='ctx'> 	#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -332,6 +603,57 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;tpm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	vbus-supply = &lt;&amp;reg_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	hnp-disable;</div><div class='add'>+	srp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	role-switch-default-mode = "peripheral";</div><div class='add'>+	snps,dis-u1-entry-quirk;</div><div class='add'>+	snps,dis-u2-entry-quirk;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_data_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	fsl,phy-pcs-tx-deemph-3p5db-attenuation-db = &lt;17&gt;;</div><div class='add'>+	fsl,phy-pcs-tx-swing-full-percent = &lt;100&gt;;</div><div class='add'>+	fsl,phy-tx-preemp-amp-tune-microamp = &lt;600&gt;;</div><div class='add'>+	fsl,phy-tx-vboost-level-microvolt = &lt;1156&gt;;</div><div class='add'>+	fsl,phy-tx-vref-tune-percent = &lt;100&gt;;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb3_data_ss: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc1 {</div><div class='ctx'> 	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='hunk'>@@ -357,12 +679,58 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;scmi_misc {</div><div class='add'>+	nxp,ctrl-ids = &lt;BRD_SM_CTRL_SD3_WAKE	FALLING_EDGE</div><div class='add'>+			BRD_SM_CTRL_PCIE1_WAKE	FALLING_EDGE</div><div class='add'>+			BRD_SM_CTRL_BT_WAKE	FALLING_EDGE</div><div class='add'>+			BRD_SM_CTRL_PCIE2_WAKE	FALLING_EDGE</div><div class='add'>+			BRD_SM_CTRL_BUTTON	FALLING_EDGE&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdog3 {</div><div class='ctx'> 	fsl,ext-reset-output;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scmi_iomuxc {</div><div class='add'>+	pinctrl_emdio: emdiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO		0x90e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc0: enetc0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0		0x50e</div><div class='add'>+			IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2		0x57e</div><div class='add'>+			IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3		0x57e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX			0x39e</div><div class='add'>+			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX		0x39e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO25__CAN2_TX				0x39e</div><div class='add'>+			IMX95_PAD_GPIO_IO27__CAN2_RX				0x39e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_flexspi1: flexspi1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B			0x3fe</div><div class='hunk'>@@ -403,6 +771,27 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C1_SCL__AONMIX_TOP_LPI2C1_SCL		0x40000b9e</div><div class='add'>+			IMX95_PAD_I2C1_SDA__AONMIX_TOP_LPI2C1_SDA		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL		0x40000b9e</div><div class='add'>+			IMX95_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA		0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO00__LPI2C3_SDA				0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO01__LPI2C3_SCL				0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_lpi2c4: lpi2c4grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_GPIO_IO30__LPI2C4_SDA			0x40000b9e</div><div class='hunk'>@@ -410,6 +799,20 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpi2c5: lpi2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO22__LPI2C5_SDA			0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO23__LPI2C5_SCL			0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c6: lpi2c6grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO02__LPI2C6_SDA			0x40000b9e</div><div class='add'>+			IMX95_PAD_GPIO_IO03__LPI2C6_SCL			0x40000b9e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_lpi2c7: lpi2c7grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_GPIO_IO08__LPI2C7_SDA			0x40000b9e</div><div class='hunk'>@@ -417,6 +820,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_lpspi7: lpspi7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO04__GPIO2_IO_BIT4		0x3fe</div><div class='add'>+			IMX95_PAD_GPIO_IO05__LPSPI7_SIN			0x3fe</div><div class='add'>+			IMX95_PAD_GPIO_IO06__LPSPI7_SOUT		0x3fe</div><div class='add'>+			IMX95_PAD_GPIO_IO07__LPSPI7_SCK			0x3fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pcie0: pcie0grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B		0x4000031e</div><div class='hunk'>@@ -429,6 +841,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_pcal6416: pcal6416grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_pdm: pdmgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e</div><div class='hunk'>@@ -471,6 +889,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_tpm3: tpm3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO12__TPM3_CH2			0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_tpm6: tpm6grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_GPIO_IO19__TPM6_CH2			0x51e</div><div class='hunk'>@@ -484,6 +908,15 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_uart5: uart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_DAP_TDO_TRACESWO__LPUART5_TX		0x31e</div><div class='add'>+			IMX95_PAD_DAP_TDI__LPUART5_RX			0x31e</div><div class='add'>+			IMX95_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B		0x31e</div><div class='add'>+			IMX95_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B		0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc1: usdhc1grp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_SD1_CLK__USDHC1_CLK			0x158e</div><div class='hunk'>@@ -538,6 +971,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_typec: typecgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14			0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='ctx'> 			IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0		0x31e</div><div class='hunk'>@@ -570,12 +1009,12 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins = &lt;</div><div class='del'>-			IMX95_PAD_SD2_CLK__USDHC2_CLK			0x15fe</div><div class='del'>-			IMX95_PAD_SD2_CMD__USDHC2_CMD			0x13fe</div><div class='del'>-			IMX95_PAD_SD2_DATA0__USDHC2_DATA0		0x13fe</div><div class='del'>-			IMX95_PAD_SD2_DATA1__USDHC2_DATA1		0x13fe</div><div class='del'>-			IMX95_PAD_SD2_DATA2__USDHC2_DATA2		0x13fe</div><div class='del'>-			IMX95_PAD_SD2_DATA3__USDHC2_DATA3		0x13fe</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK			0x158e</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD			0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0		0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1		0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2		0x138e</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3		0x138e</div><div class='ctx'> 			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT		0x51e</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -620,6 +1059,79 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pf09-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 2&gt;;</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf09_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf09_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pf53arm-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 4&gt;;</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;pf5301_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf5301_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf5301_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pf53soc-thermal {</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;scmi_sensor 3&gt;;</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pf5302_alert: trip0 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;140000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pf5302_crit: trip1 {</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				temperature = &lt;155000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tpm6 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts<br/>new file mode 100644<br/>index 000000000000..26c2df9b1b60<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts</a></div><div class='hunk'>@@ -0,0 +1,318 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+</div><div class='add'>+#include "imx95-phycore-fpsc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "phytec,imx95-libra-rdk-fpsc",</div><div class='add'>+		"phytec,imx95-phycore-fpsc", "fsl,imx95";</div><div class='add'>+	model = "PHYTEC Libra i.MX95 RDK FPSC";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		can1 = &amp;flexcan2;</div><div class='add'>+		can2 = &amp;flexcan1;</div><div class='add'>+		ethernet0 = &amp;enetc_port0;</div><div class='add'>+		serial0 = &amp;lpuart7;</div><div class='add'>+		serial1 = &amp;lpuart8;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lvds0: backlight0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vdd_12v0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver1: can-phy {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio_expander 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver2: can-phy {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio_expander 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel0_lvds: panel-lvds0 {</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_12v0: regulator-vdd-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "VDD_12V0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_1v8: regulator-vdd-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "VDD_1V8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_3v3: regulator-vdd-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDD_3V3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd_5v0: regulator-vdd-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "VDD_5V0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port2 {</div><div class='add'>+	managed = "in-band-status";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy2&gt;;</div><div class='add'>+	phy-mode = "10gbase-r";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN FD */</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	phys = &lt;&amp;transceiver1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	phys = &lt;&amp;transceiver2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SPI-NOR */</div><div class='add'>+&amp;flexspi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spi_nor: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;166000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "RGMII2_nINT", "GPIO4", "RTC_INT", "",</div><div class='add'>+			  "LVDS1_BL_EN";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "nxp,p3t1755";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	leds@62 {</div><div class='add'>+		compatible = "nxp,pca9533";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	gpio_expander: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3",</div><div class='add'>+				  "CSI1_CTRL4", "CSI2_CTRL1", "CSI2_CTRL2",</div><div class='add'>+				  "CSI2_CTRL3", "CSI2_CTRL4", "CLK_EN_AV",</div><div class='add'>+				  "nCAN2_EN", "nCAN1_EN", "PCIE1_nWAKE",</div><div class='add'>+				  "PCIE2_nWAKE", "PCIE2_nALERT_3V3",</div><div class='add'>+				  "UART1_BT_RS_SEL", "UART1_RS232_485_SEL";</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		uart1_bt_rs_sel: bt-rs-hog {</div><div class='add'>+			gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			gpio-hog;</div><div class='add'>+			line-name = "UART1_BT_RS_SEL";</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c02";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_vdd_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used for M33 debug */</div><div class='add'>+&amp;lpuart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* A-55 debug UART */</div><div class='add'>+&amp;lpuart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RS232/RS485/BT */</div><div class='add'>+&amp;lpuart8 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_emdio { /* RGMII2 */</div><div class='add'>+	ethphy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		enet-phy-lane-no-swap;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_1_50_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethphy2: ethernet-phy@8 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+		max-speed = &lt;10000&gt;; /* 10Gbit/s */</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	reset-gpio = &lt;&amp;gpio1 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_vdd_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rv3028 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+	interrupts = &lt;18 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	aux-voltage-chargeable = &lt;1&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_iomuxc {</div><div class='add'>+	pinctrl_lpuart2: lpuart2grp { /* FPSC proprietary */</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_UART2_TXD__AONMIX_TOP_LPUART2_TX	0x31e</div><div class='add'>+			IMX95_PAD_UART2_RXD__AONMIX_TOP_LPUART2_RX	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lvds0: lvds0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO20__GPIO2_IO_BIT20	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm4: tpm4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO21__TPM4_CH1	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	fsl,over-current-active-low;</div><div class='add'>+	fsl,power-active-low;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	vbus-supply = &lt;&amp;reg_vdd_5v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uSD Card */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi b/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi<br/>new file mode 100644<br/>index 000000000000..7519d5bd06ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-phycore-fpsc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,656 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "imx95.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "PHYTEC phyCORE-i.MX95 FPSC";</div><div class='add'>+	compatible = "phytec,imx95-phycore-fpsc", "fsl,imx95";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;enetc_port1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c5;</div><div class='add'>+		i2c3 = &amp;lpi2c3;</div><div class='add'>+		i2c4 = &amp;lpi2c4;</div><div class='add'>+		i2c5 = &amp;lpi2c1;</div><div class='add'>+		rtc0 = &amp;rv3028;</div><div class='add'>+		rtc1 = &amp;scmi_bbm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000001 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_nvcc_aon: regulator-nvcc-aon {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "VDD_IO";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vmmc: regulator-usdhc2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		off-on-delay-us = &lt;12000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_reg_usdhc2_vmmc&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VDDSW_SD2";</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x7f000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x3c000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 { /* FPSC RGMII2 */</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port1 {</div><div class='add'>+	phy-handle = &lt;&amp;ethphy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 { /* FPSC CAN1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 { /* FPSC CAN2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi1 { /* FPSC QSPI */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 { /* FPSC GPIO */</div><div class='add'>+	gpio-line-names = "", "", "", "", "GPIO2",</div><div class='add'>+			  "GPIO1", "", "", "", "",</div><div class='add'>+			  "PCIE1_nPERST", "USB1_PWR_EN", "GPIO3", "USB2_PWR_EN", "PCIE2_nPERST";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 { /* FPSC GPIO */</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "RGMII2_nINT", "GPIO4";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "SD2_RESET_B";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	gpio-line-names = "ENET2_nINT";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio5 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "", "", "", "USB1_OC", "USB2_OC";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 { /* FPSC I2C5 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	dram_sense: temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_sense: temperature-sensor@49 {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethphy_sense: temperature-sensor@4a {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x4a&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_sense: temperature-sensor@4b {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* User EEPROM */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "st,24c32", "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_nvcc_aon&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Factory EEPROM */</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "st,24c32", "atmel,24c32";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_nvcc_aon&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rv3028: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* User EEPROM ID page */</div><div class='add'>+	eeprom@58 {</div><div class='add'>+		compatible = "st,24c32", "atmel,24c32";</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_nvcc_aon&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c2 { /* FPSC I2C1 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c3 { /* FPSC I2C3 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c4 { /* FPSC I2C4 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c5 { /* FPSC I2C2 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi3 { /* FPSC SPI2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi4 { /* FPSC SPI3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi7 { /* FPSC SPI1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi7&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart5 { /* FPSC UART2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart7 { /* FPSC UART3 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart7&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart8 { /* FPSC UART1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart8&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_emdio { /* FPSC RGMII2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_emdio&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy1: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		enet-phy-lane-no-swap;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netcmix_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 { /* FPSC PCIE1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 { /* FPSC PCIE2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai5 {	/* FPSC SAI1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	pintrc-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_iomuxc {</div><div class='add'>+	pinctrl_emdio: emdiogrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_NETC_MDIO	0x97e	/* RGMII2_MDIO */</div><div class='add'>+			IMX95_PAD_ENET2_MDC__NETCMIX_TOP_NETC_MDC	0x502	/* RGMII2_MDC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc0: enetc0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO16__GPIO2_IO_BIT16			0x31e	/* RGMII2_nINT */</div><div class='add'>+			IMX95_PAD_CCM_CLKO3__NETCMIX_TOP_NETC_TMR_1588_TRIG2	0x31e	/* RGMII2_EVENT_IN */</div><div class='add'>+			IMX95_PAD_CCM_CLKO4__NETCMIX_TOP_NETC_TMR_1588_PP2	0x31e	/* RGMII2_EVENT_OUT */</div><div class='add'>+</div><div class='add'>+			IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3		0x57e	/* RGMII2_TX_3 */</div><div class='add'>+			IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2		0x57e	/* RGMII2_TX_2 */</div><div class='add'>+			IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1		0x57e	/* RGMII2_TX_1 */</div><div class='add'>+			IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0		0x57e	/* RGMII2_TX_0 */</div><div class='add'>+			IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL	0x57e	/* RGMII2_TX_CTL */</div><div class='add'>+			IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK	0x58e	/* RGMII2_TXC */</div><div class='add'>+			IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3		0x57e	/* RGMII2_RX_3 */</div><div class='add'>+			IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2		0x57e	/* RGMII2_RX_2 */</div><div class='add'>+			IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1		0x57e	/* RGMII2_RX_1 */</div><div class='add'>+			IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0		0x57e	/* RGMII2_RX_0 */</div><div class='add'>+			IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL	0x57e	/* RGMII2_RX_CTL */</div><div class='add'>+			IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK	0x58e	/* RGMII2_RXC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc1: enetc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_ENET1_MDC__GPIO4_IO_BIT0			0x31e</div><div class='add'>+			IMX95_PAD_ENET2_TD0__NETCMIX_TOP_ETH1_RGMII_TD0		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TD1__NETCMIX_TOP_ETH1_RGMII_TD1		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TD2__NETCMIX_TOP_ETH1_RGMII_TD2		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TD3__NETCMIX_TOP_ETH1_RGMII_TD3		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_ETH1_RGMII_TX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET2_TXC__NETCMIX_TOP_ETH1_RGMII_TX_CLK	0x58e</div><div class='add'>+			IMX95_PAD_ENET2_RD0__NETCMIX_TOP_ETH1_RGMII_RD0		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD1__NETCMIX_TOP_ETH1_RGMII_RD1		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD2__NETCMIX_TOP_ETH1_RGMII_RD2		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RD3__NETCMIX_TOP_ETH1_RGMII_RD3		0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_ETH1_RGMII_RX_CTL	0x57e</div><div class='add'>+			IMX95_PAD_ENET2_RXC__NETCMIX_TOP_ETH1_RGMII_RX_CLK	0x58e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX		0x51e	/* CAN1_TX */</div><div class='add'>+			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX	0x51e	/* CAN1_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan2: flexcan2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO25__CAN2_TX	0x51e	/* CAN2_TX */</div><div class='add'>+			IMX95_PAD_GPIO_IO27__CAN2_RX	0x51e	/* CAN2_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexspi: flexspigrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B		0x3fe	/* QSPI_CE */</div><div class='add'>+			IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK		0x3fe	/* QSPI_CLK */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0	0x3fe	/* QSPI_DATA_0 */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1	0x3fe	/* QSPI_DATA_1 */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2	0x3fe	/* QSPI_DATA_2 */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3	0x3fe	/* QSPI_DATA_3 */</div><div class='add'>+			IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS		0x3fe	/* QSPI_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio1: gpio1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_UART1_TXD__AONMIX_TOP_GPIO1_IO_BIT5	0x31e	/* GPIO1 */</div><div class='add'>+			IMX95_PAD_UART1_RXD__AONMIX_TOP_GPIO1_IO_BIT4	0x31e	/* GPIO2 */</div><div class='add'>+			IMX95_PAD_SAI1_TXC__AONMIX_TOP_GPIO1_IO_BIT12	0x31e	/* GPIO3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio2: gpio2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO17__GPIO2_IO_BIT17	0x31e	/* GPIO4 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C1_SCL__AONMIX_TOP_LPI2C1_SCL	0x40000b9e	/* I2C5_SCL */</div><div class='add'>+			IMX95_PAD_I2C1_SDA__AONMIX_TOP_LPI2C1_SDA	0x40000b9e	/* I2C5_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c2: lpi2c2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA	0x40000b9e	/* I2C1_SDA_DNU */</div><div class='add'>+			IMX95_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL	0x40000b9e	/* I2C1_SCL_DNU */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e	/* I2C3_SDA */</div><div class='add'>+			IMX95_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e	/* I2C3_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c4: lpi2c4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO30__LPI2C4_SDA 0x40000b9e	/* I2C4_SDA */</div><div class='add'>+			IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e	/* I2C4_SDL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c5: lpi2c5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO22__LPI2C5_SDA	0x40000b9e	/* I2C2_SDA */</div><div class='add'>+			IMX95_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e	/* I2C2_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi3: lpspi3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO11__LPSPI3_SCK		0x51e	/* SPI2_SCLK */</div><div class='add'>+			IMX95_PAD_GPIO_IO10__LPSPI3_SOUT	0x51e	/* SPI2_MOSI */</div><div class='add'>+			IMX95_PAD_GPIO_IO09__LPSPI3_SIN		0x51e	/* SPI2_MISO */</div><div class='add'>+			IMX95_PAD_GPIO_IO08__LPSPI3_PCS0	0x51e	/* SPI2_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi4: lpspi4grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO21__LPSPI4_SCK		0x51e	/* SPI3_SCLK */</div><div class='add'>+			IMX95_PAD_GPIO_IO20__LPSPI4_SOUT	0x51e	/* SPI3_MOSI */</div><div class='add'>+			IMX95_PAD_GPIO_IO19__LPSPI4_SIN		0x51e	/* SPI3_MISO */</div><div class='add'>+			IMX95_PAD_GPIO_IO18__LPSPI4_PCS0	0x51e	/* SPI3_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi7: lpspi7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO07__LPSPI7_SCK		0x51e	/* SPI1_SCLK */</div><div class='add'>+			IMX95_PAD_GPIO_IO06__LPSPI7_SOUT	0x51e	/* SPI1_MOSI */</div><div class='add'>+			IMX95_PAD_GPIO_IO05__LPSPI7_SIN		0x51e	/* SPI1_MISO */</div><div class='add'>+			IMX95_PAD_GPIO_IO04__LPSPI7_PCS0	0x51e	/* SPI1_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart5: lpuart5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO01__LPUART5_RX		0x51e	/* UART2_RXD */</div><div class='add'>+			IMX95_PAD_GPIO_IO00__LPUART5_TX		0x51e	/* UART2_TXD */</div><div class='add'>+			IMX95_PAD_GPIO_IO03__LPUART5_RTS_B	0x51e	/* UART2_RTS */</div><div class='add'>+			IMX95_PAD_GPIO_IO02__LPUART5_CTS_B	0x51e	/* UART2_CTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart7: lpuart7grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO37__LPUART7_RX	0x31e	/* UART3_RXD */</div><div class='add'>+			IMX95_PAD_GPIO_IO36__LPUART7_TX	0x31e	/* UART3_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart8: lpuart8grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO13__LPUART8_RX		0x51e	/* UART1_RXD */</div><div class='add'>+			IMX95_PAD_GPIO_IO12__LPUART8_TX		0x51e	/* UART1_TXD */</div><div class='add'>+			IMX95_PAD_GPIO_IO15__LPUART8_RTS_B	0x51e	/* UART1_RTS */</div><div class='add'>+			IMX95_PAD_GPIO_IO14__LPUART8_CTS_B	0x51e	/* UART1_CTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie0: pcie0grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B		0x31e	/* PCIE1_nCLKREQ */</div><div class='add'>+			IMX95_PAD_PDM_BIT_STREAM1__AONMIX_TOP_GPIO1_IO_BIT10	0x31e	/* PCIE1_nPERST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie1: pcie1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B	0x31e	/* PCIE2_nCLKREQ */</div><div class='add'>+			IMX95_PAD_SAI1_RXD0__AONMIX_TOP_GPIO1_IO_BIT14	0x31e	/* PCIE2_nPERST */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7	0x31e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai5: sai5grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_XSPI1_DQS__SAI5_RX_SYNC		0x51e	/* SAI1_RX_SYNC */</div><div class='add'>+			IMX95_PAD_XSPI1_SS1_B__SAI5_RX_BCLK		0x51e	/* SAI1_RX_BCLK */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA7__SAI5_RX_DATA_BIT0	0x51e	/* SAI1_RX_DATA */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA5__SAI5_TX_SYNC		0x51e	/* SAI1_TX_SYNC */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA6__SAI5_TX_BCLK		0x51e	/* SAI1_TX_BCLK */</div><div class='add'>+			IMX95_PAD_XSPI1_DATA4__SAI5_TX_DATA_BIT0	0x51e	/* SAI1_TX_DATA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm3: tpm3grp {</div><div class='add'>+	      fsl,pins = &lt;</div><div class='add'>+		      IMX95_PAD_GPIO_IO24__TPM3_CH3	0x51e	/* PWM1 */</div><div class='add'>+	      &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm5: tpm5grp {</div><div class='add'>+	      fsl,pins = &lt;</div><div class='add'>+		      IMX95_PAD_GPIO_IO26__TPM5_CH3	0x51e	/* PWM2 */</div><div class='add'>+	      &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbc: usbcgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SAI1_TXFS__AONMIX_TOP_GPIO1_IO_BIT11	0x51e	/* USB1_PWR_EN */</div><div class='add'>+			IMX95_PAD_GPIO_IO33__GPIO5_IO_BIT13		0x51e	/* USB1_OC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb2: usb2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SAI1_TXD0__AONMIX_TOP_GPIO1_IO_BIT13	0x51e	/* USB2_PWR_EN */</div><div class='add'>+			IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14		0x51e	/* USB2_OC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7		0x138e</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD			0x138e</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK			0x158e</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE		0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6		0x138e</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7		0x138e</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD			0x138e</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK			0x158e</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE		0x158e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD1_DATA0__USDHC1_DATA0		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA1__USDHC1_DATA1		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA2__USDHC1_DATA2		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA3__USDHC1_DATA3		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA4__USDHC1_DATA4		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA5__USDHC1_DATA5		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA6__USDHC1_DATA6		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_DATA7__USDHC1_DATA7		0x13fe</div><div class='add'>+			IMX95_PAD_SD1_CMD__USDHC1_CMD			0x13fe</div><div class='add'>+			IMX95_PAD_SD1_CLK__USDHC1_CLK			0x15fe</div><div class='add'>+			IMX95_PAD_SD1_STROBE__USDHC1_STROBE		0x15fe</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CD_B__USDHC2_CD_B		0x31e	/* CD */</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK		0x158e	/* CLK */</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD		0x138e	/* CMD */</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0	0x138e	/* DATA0 */</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1	0x138e	/* DATA1 */</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2	0x138e	/* DATA2 */</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3	0x138e	/* DATA3 */</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CD_B__USDHC2_CD_B		0x31e	/* CD */</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK		0x158e	/* CLK */</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD		0x138e	/* CMD */</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0	0x138e	/* DATA0 */</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1	0x138e	/* DATA1 */</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2	0x138e	/* DATA2 */</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3	0x138e	/* DATA3 */</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD2_CD_B__USDHC2_CD_B		0x31e	/* CD */</div><div class='add'>+			IMX95_PAD_SD2_CLK__USDHC2_CLK		0x15fe	/* CLK */</div><div class='add'>+			IMX95_PAD_SD2_CMD__USDHC2_CMD		0x13fe	/* CMD */</div><div class='add'>+			IMX95_PAD_SD2_DATA0__USDHC2_DATA0	0x13fe	/* DATA0 */</div><div class='add'>+			IMX95_PAD_SD2_DATA1__USDHC2_DATA1	0x13fe	/* DATA1 */</div><div class='add'>+			IMX95_PAD_SD2_DATA2__USDHC2_DATA2	0x13fe	/* DATA2 */</div><div class='add'>+			IMX95_PAD_SD2_DATA3__USDHC2_DATA3	0x13fe	/* DATA3 */</div><div class='add'>+			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc3: usdhc3grp {</div><div class='add'>+		fsl,pins = &lt;</div><div class='add'>+			IMX95_PAD_SD3_CLK__USDHC3_CLK		0x158e	/* SDIO_CLK */</div><div class='add'>+			IMX95_PAD_SD3_CMD__USDHC3_CMD		0x138e	/* SDIO_CMD */</div><div class='add'>+			IMX95_PAD_SD3_DATA0__USDHC3_DATA0	0x138e	/* SDIO_DATA0 */</div><div class='add'>+			IMX95_PAD_SD3_DATA1__USDHC3_DATA1	0x138e	/* SDIO_DATA1 */</div><div class='add'>+			IMX95_PAD_SD3_DATA2__USDHC3_DATA2	0x138e	/* SDIO_DATA2 */</div><div class='add'>+			IMX95_PAD_SD3_DATA3__USDHC3_DATA3	0x138e	/* SDIO_DATA3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm3 { /* FPSC PWM1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm5 {	/* FPSC PWM2 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm5&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 { /* FPSC USB1 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 { /* FPSC SDCARD */</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc3 { /* FPSC SDIO */</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts<br/>new file mode 100644<br/>index 000000000000..5b6b2bb80b28<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts</a></div><div class='hunk'>@@ -0,0 +1,324 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include "imx95-tqma9596sa.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "TQ-Systems i.MX95 TQMa95xxSA on MB-SMARC-2";</div><div class='add'>+	compatible = "tq,imx95-tqma9596sa-mb-smarc-2", "tq,imx95-tqma9596sa", "fsl,imx95";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio1;</div><div class='add'>+		gpio1 = &amp;gpio2;</div><div class='add'>+		gpio2 = &amp;gpio3;</div><div class='add'>+		gpio3 = &amp;gpio4;</div><div class='add'>+		i2c0 = &amp;lpi2c1;</div><div class='add'>+		i2c1 = &amp;lpi2c2;</div><div class='add'>+		i2c2 = &amp;lpi2c3;</div><div class='add'>+		i2c3 = &amp;lpi2c4;</div><div class='add'>+		i2c4 = &amp;lpi2c5;</div><div class='add'>+		i2c5 = &amp;lpi2c6;</div><div class='add'>+		i2c6 = &amp;lpi2c7;</div><div class='add'>+		i2c7 = &amp;lpi2c8;</div><div class='add'>+		mmc0 = &amp;usdhc1;</div><div class='add'>+		mmc1 = &amp;usdhc2;</div><div class='add'>+		rtc0 = &amp;pcf85063;</div><div class='add'>+		rtc1 = &amp;scmi_bbm;</div><div class='add'>+		serial0 = &amp;lpuart1;</div><div class='add'>+		serial1 = &amp;lpuart2;</div><div class='add'>+		serial2 = &amp;lpuart3;</div><div class='add'>+		serial3 = &amp;lpuart4;</div><div class='add'>+		serial4 = &amp;lpuart5;</div><div class='add'>+		serial5 = &amp;lpuart6;</div><div class='add'>+		serial6 = &amp;lpuart7;</div><div class='add'>+		serial7 = &amp;lpuart8;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lvds0: backlight-lvds0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;tpm3 0 100000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lvds1: backlight-lvds1 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;tpm4 0 100000 0&gt;;</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;expander2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_lvds0: panel-lvds0 {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT overlay</div><div class='add'>+		 */</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_lvds0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds0: endpoint {</div><div class='add'>+				/* TODO: LVDS0 out */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_lvds1: panel-lvds1 {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT overlay</div><div class='add'>+		 */</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds1&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_lvds1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds1: endpoint {</div><div class='add'>+				/* TODO: LVDS1 out */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_12v0: regulator-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "12V0";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_lvds0: regulator-lvds0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "LCD0_VDD_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_lvds1: regulator-lvds1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "LCD1_VDD_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;expander2 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='add'>+		audio-codec = &lt;&amp;tlv320aic3x04&gt;;</div><div class='add'>+		audio-cpu = &lt;&amp;sai3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;expander2 {</div><div class='add'>+	pcie1-clk-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "PCIE1_CLK_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2-clk-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "PCIE2_CLK_EN";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan1&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexcan3&gt;;</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	tlv320aic3x04: audio-codec@18 {</div><div class='add'>+		compatible = "ti,tlv320aic32x4";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		clocks = &lt;&amp;scmi_clk IMX95_CLK_SAI3&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		iov-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		ldoin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom2: eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpspi3&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;gpio2 8 GPIO_ACTIVE_LOW&gt;, &lt;&amp;gpio2 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER0 */</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER3 */</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER1 */</div><div class='add'>+&amp;lpuart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER2 */</div><div class='add'>+&amp;lpuart8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* X44 mPCIe */</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='add'>+		 &lt;&amp;pcieclk 1&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='add'>+	reset-gpio = &lt;&amp;expander2 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* X22 PCIe x1 socket */</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='add'>+		 &lt;&amp;pcieclk 0&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+		 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+	clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='add'>+	reset-gpio = &lt;&amp;expander2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_sdvmmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai3 {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai3&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SAI3&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;,</div><div class='add'>+			       &lt;3612672000&gt;, &lt;393216000&gt;,</div><div class='add'>+			       &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+	fsl,sai-mclk-direction-output;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai5 {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai5&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2_VCO&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL2&gt;,</div><div class='add'>+			  &lt;&amp;scmi_clk IMX95_CLK_SAI5&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_AUDIOPLL1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;3932160000&gt;,</div><div class='add'>+			       &lt;3612672000&gt;, &lt;393216000&gt;,</div><div class='add'>+			       &lt;361267200&gt;, &lt;12288000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* X4 */</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	srp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	/* DR not yet supported */</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	disable-over-current;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* X16 */</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc2&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_sdvmmc&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	disable-wp;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi<br/>new file mode 100644<br/>index 000000000000..180124cc5bce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi</a></div><div class='hunk'>@@ -0,0 +1,698 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-imx8-pcie.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "imx95.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;enetc_port0;</div><div class='add'>+		ethernet1 = &amp;enetc_port1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/*</div><div class='add'>+		 * DRAM base addr, size : 2048 MiB DRAM</div><div class='add'>+		 * should be corrected by bootloader</div><div class='add'>+		 */</div><div class='add'>+		reg = &lt;0 0x80000000 0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		linux_cma: linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x28000000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0 0x80000000 0 0x80000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpu_boot: vpu_boot@a0000000 {</div><div class='add'>+			reg = &lt;0 0xa0000000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_dp: clk-dp {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_xtal25: clk-xtal25 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "V_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Controlled by system manager */</div><div class='add'>+	reg_sdvmmc: regulator-sdvmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sdvmmc&gt;;</div><div class='add'>+		regulator-name = "SDIO_PWR_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio3 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;enetc_port1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_enetc1&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ethphy3&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_timer {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_flexspi1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash0: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;80000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio1&gt;;</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "GPIO7", "GPIO8",</div><div class='add'>+			  "", "GPIO9", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio2&gt;;</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "SLEEP", "GPIO5",</div><div class='add'>+			  "", "", "GPIO6", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpi2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tmp1075: temperature-sensor@4a {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4a&gt;;</div><div class='add'>+		vs-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom_smarc: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcf85063: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85063a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;7000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pcf85063&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	m24c64: eeprom@54 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* protectable identification memory (part of M24C64-D @50) */</div><div class='add'>+	eeprom@58 {</div><div class='add'>+		compatible = "atmel,24c64d-wl";</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* protectable identification memory (part of M24C64-D @54) */</div><div class='add'>+	eeprom@5c {</div><div class='add'>+		compatible = "atmel,24c64d-wl";</div><div class='add'>+		reg = &lt;0x5c&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcieclk: clock-generator@6a {</div><div class='add'>+		compatible = "renesas,9fgv0441";</div><div class='add'>+		reg = &lt;0x6a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_xtal25&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	imu@6b {</div><div class='add'>+		compatible = "st,ism330dhcx";</div><div class='add'>+		reg = &lt;0x6b&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* D23 */</div><div class='add'>+	expander2: gpio@74 {</div><div class='add'>+		compatible = "ti,tca9539";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "GPIO4", "LCD0_BLKT_EN", "LCD0_VDD_EN", "LCD1_BLKT_EN",</div><div class='add'>+				  "LCD1_VDD_EN", "ENET1_RESET#", "ENET2_RESET#", "GBE0_SDP_DIR",</div><div class='add'>+				  "GBE1_SDP_DIR", "PCIE1_RST#", "PCIE2_RST#", "DP_BRIDGE_EN",</div><div class='add'>+				  "HUB_RST#", "QSPI_RESET#", "PCIE1_CLK_EN", "PCIE2_CLK_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* D21 */</div><div class='add'>+	expander1: gpio@75 {</div><div class='add'>+		compatible = "ti,tca9539";</div><div class='add'>+		reg = &lt;0x75&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_expander1&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		gpio-line-names = "GPIO10", "GPIO11", "GPIO12", "GPIO13",</div><div class='add'>+				  "CHG_PRSNT#", "CHARGING", "LID", "BATLOW#",</div><div class='add'>+				  "TEMP_EVENT#", "PGOOD_ARM", "PGOOD_SOC", "PCIE_WAKE#_1V8",</div><div class='add'>+				  "GPIO0", "GPIO1", "GPIO2", "GPIO3";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C_CAM0 */</div><div class='add'>+&amp;lpi2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	dp_bridge: dp-bridge@f {</div><div class='add'>+		compatible = "toshiba,tc9595", "toshiba,tc358767";</div><div class='add'>+		reg = &lt;0x0f&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tc9595&gt;;</div><div class='add'>+		clock-names = "ref";</div><div class='add'>+		clocks = &lt;&amp;clk_dp&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		toshiba,hpd-pin = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dp_dsi_in: endpoint {</div><div class='add'>+					/* TODO: DSI out */</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C_CAM1 */</div><div class='add'>+&amp;lpi2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c4&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C_LCD */</div><div class='add'>+&amp;lpi2c6 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c6&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c6&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER0 */</div><div class='add'>+&amp;lpuart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER3 */</div><div class='add'>+&amp;lpuart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER1 */</div><div class='add'>+&amp;lpuart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart7&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SER2 */</div><div class='add'>+&amp;lpuart8 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_blk_ctrl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;netc_emdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mdio&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ethphy0: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ethphy0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander2 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;500000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethphy3: ethernet-phy@3 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ethphy3&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander2 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;500000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+		interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_bbm {</div><div class='add'>+	linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tpm5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_tpm5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb451,8142";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb451,8140";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;expander2 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdog3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_iomuxc {</div><div class='add'>+	pinctrl_ethphy0: ethphy0grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO33__GPIO5_IO_BIT13				0x1100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy3: ethphy3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14				0x1100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc0: enetc0grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL	0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL	0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO23__GPIO2_IO_BIT23				0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_enetc1: enetc1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_ENET2_RD0__NETCMIX_TOP_ETH1_RGMII_RD0		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_RD1__NETCMIX_TOP_ETH1_RGMII_RD1		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_RD2__NETCMIX_TOP_ETH1_RGMII_RD2		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_RD3__NETCMIX_TOP_ETH1_RGMII_RD3		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_RXC__NETCMIX_TOP_ETH1_RGMII_RX_CLK		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_ETH1_RGMII_RX_CTL	0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TD0__NETCMIX_TOP_ETH1_RGMII_TD0		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TD1__NETCMIX_TOP_ETH1_RGMII_TD1		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TD2__NETCMIX_TOP_ETH1_RGMII_TD2		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TD3__NETCMIX_TOP_ETH1_RGMII_TD3		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TXC__NETCMIX_TOP_ETH1_RGMII_TX_CLK		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_ETH1_RGMII_TX_CTL	0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO24__GPIO2_IO_BIT24				0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_expander1: expander1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_CCM_CLKO2__GPIO3_IO_BIT27				0x1100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan1: flexcan1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX	0x1300&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX		0x31e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexcan3: flexcan3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_CCM_CLKO3__CAN3_TX		0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_CCM_CLKO4__CAN3_RX		0x1300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexspi1: flexspi1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD3_CLK__FLEXSPI1_A_SCLK		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD3_CMD__FLEXSPI1_A_SS0_B		0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD3_DATA0__FLEXSPI1_A_DATA_BIT0	0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD3_DATA1__FLEXSPI1_A_DATA_BIT1	0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD3_DATA2__FLEXSPI1_A_DATA_BIT2	0x11e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD3_DATA3__FLEXSPI1_A_DATA_BIT3	0x11e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio1: gpio1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_PDM_BIT_STREAM1__AONMIX_TOP_GPIO1_IO_BIT10	0x111e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SAI1_TXD0__AONMIX_TOP_GPIO1_IO_BIT13		0x111e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SAI1_TXFS__AONMIX_TOP_GPIO1_IO_BIT11		0x111e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gpio2: gpio2grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18		0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO19__GPIO2_IO_BIT19		0x111e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO22__GPIO2_IO_BIT22		0x111e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c1: lpi2c1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_I2C1_SCL__AONMIX_TOP_LPI2C1_SCL		0x4000191e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_I2C1_SDA__AONMIX_TOP_LPI2C1_SDA		0x4000191e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c3: lpi2c3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO28__LPI2C3_SDA			0x4000191e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO29__LPI2C3_SCL			0x4000191e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c4: lpi2c4grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO30__LPI2C4_SDA             0x4000191e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO31__LPI2C4_SCL             0x4000191e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c6: lpi2c6grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO02__LPI2C6_SDA             0x4000191e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO03__LPI2C6_SCL             0x4000191e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpspi3: lpspi3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO07__GPIO2_IO_BIT7		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO08__GPIO2_IO_BIT8		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO09__LPSPI3_SIN		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO10__LPSPI3_SOUT		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO11__LPSPI3_SCK		0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart1: lpuart1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX		0x1300&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX		0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_UART2_TXD__AONMIX_TOP_LPUART1_RTS_B	0x1300&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_UART2_RXD__AONMIX_TOP_LPUART1_CTS_B	0x31e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart5: lpuart5grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO00__LPUART5_TX			0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO01__LPUART5_RX			0x1300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart7: lpuart7grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO36__LPUART7_TX			0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO37__LPUART7_RX			0x1300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart8: lpuart8grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO12__LPUART8_TX			0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO13__LPUART8_RX			0x1300&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO14__LPUART8_CTS_B			0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO15__LPUART8_RTS_B			0x1300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mdio: mdiogrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO		0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcf85063: pcf85063grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO27__GPIO2_IO_BIT27			0x1100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie0: pcie0grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B	0x111e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcie1: pcie1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B	0x111e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai3: sai3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO16__SAI3_TX_BCLK			0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO17__SAI3_MCLK			0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO20__SAI3_RX_DATA_BIT0		0x1300&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO21__SAI3_TX_DATA_BIT0		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_GPIO_IO26__SAI3_TX_SYNC			0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai5: sai5grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_XSPI1_DATA4__SAI5_TX_DATA_BIT0		0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_XSPI1_DATA5__SAI5_TX_SYNC			0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_XSPI1_DATA6__SAI5_TX_BCLK			0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_XSPI1_DATA7__SAI5_RX_DATA_BIT0		0x1300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sdvmmc: sdvmmcgrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7		0x11e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tc9595: tc9595grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO25__GPIO2_IO_BIT25			0x1500&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm3: tpm3grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO04__TPM3_CH0			0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm4: tpm4grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO05__TPM4_CH0			0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm5: tpm4grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_GPIO_IO06__TPM5_CH0			0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD1_CLK__USDHC1_CLK	0x158e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_CMD__USDHC1_CMD	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA0__USDHC1_DATA0	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA1__USDHC1_DATA1	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA2__USDHC1_DATA2	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA3__USDHC1_DATA3	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA4__USDHC1_DATA4	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA5__USDHC1_DATA5	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA6__USDHC1_DATA6	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA7__USDHC1_DATA7	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_STROBE__USDHC1_STROBE	0x158e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD1_CLK__USDHC1_CLK	0x158e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_CMD__USDHC1_CMD	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA0__USDHC1_DATA0	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA1__USDHC1_DATA1	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA2__USDHC1_DATA2	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA3__USDHC1_DATA3	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA4__USDHC1_DATA4	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA5__USDHC1_DATA5	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA6__USDHC1_DATA6	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA7__USDHC1_DATA7	0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_STROBE__USDHC1_STROBE	0x158e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD1_CLK__USDHC1_CLK	0x15fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_CMD__USDHC1_CMD	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA0__USDHC1_DATA0	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA1__USDHC1_DATA1	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA2__USDHC1_DATA2	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA3__USDHC1_DATA3	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA4__USDHC1_DATA4	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA5__USDHC1_DATA5	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA6__USDHC1_DATA6	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_DATA7__USDHC1_DATA7	0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0			0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CLK__USDHC2_CLK			0x51e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CMD__USDHC2_CMD			0x31e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x131e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x131e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x131e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x131e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT		0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0			0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CLK__USDHC2_CLK			0x158e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CMD__USDHC2_CMD			0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT		0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0			0x1100&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CLK__USDHC2_CLK			0x15fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_CMD__USDHC2_CMD			0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x13fe&gt;,</div><div class='add'>+			   &lt;IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT		0x51e&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi<br/>index 03661e76550f..1292677cbe4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/imx95.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/imx95.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/imx95.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright 2024 NXP</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/nxp,imx95-clock.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/dma/fsl-edma.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='hunk'>@@ -22,12 +23,27 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_pd_wait: cpu-pd-wait {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010033&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;10000&gt;;</div><div class='add'>+				exit-latency-us = &lt;7000&gt;;</div><div class='add'>+				min-residency-us = &lt;27000&gt;;</div><div class='add'>+				wakeup-latency-us = &lt;15000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		A55_0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_perf IMX95_PERF_A55&gt;;</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='hunk'>@@ -45,6 +61,7 @@</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_perf IMX95_PERF_A55&gt;;</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='hunk'>@@ -62,6 +79,7 @@</div><div class='ctx'> 			reg = &lt;0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_perf IMX95_PERF_A55&gt;;</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='hunk'>@@ -79,6 +97,7 @@</div><div class='ctx'> 			reg = &lt;0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_perf IMX95_PERF_A55&gt;;</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='hunk'>@@ -98,6 +117,7 @@</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -115,6 +135,7 @@</div><div class='ctx'> 			power-domain-names = "perf";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_pd_wait&gt;;</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -239,38 +260,45 @@</div><div class='ctx'> 	sai1_mclk: clock-sai-mclk1 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency= &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "sai1_mclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sai2_mclk: clock-sai-mclk2 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency= &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "sai2_mclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sai3_mclk: clock-sai-mclk3 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency= &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "sai3_mclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sai4_mclk: clock-sai-mclk4 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency= &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "sai4_mclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sai5_mclk: clock-sai-mclk5 {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency= &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "sai5_mclk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clk_sys100m: clock-sys100m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		clock-output-names = "clk_sys100m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	osc_24m: clock-24m {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -293,12 +321,17 @@</div><div class='ctx'> 			shmem = &lt;&amp;scmi_buf0&gt;, &lt;&amp;scmi_buf1&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			arm,max-rx-timeout-ms = &lt;5000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			scmi_devpd: protocol@11 {</div><div class='ctx'> 				reg = &lt;0x11&gt;;</div><div class='ctx'> 				#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			scmi_sys_power: protocol@12 {</div><div class='add'>+				reg = &lt;0x12&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			scmi_perf: protocol@13 {</div><div class='ctx'> 				reg = &lt;0x13&gt;;</div><div class='ctx'> 				#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -318,6 +351,21 @@</div><div class='ctx'> 				reg = &lt;0x19&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			scmi_lmm: protocol@80 {</div><div class='add'>+				reg = &lt;0x80&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_bbm: protocol@81 {</div><div class='add'>+				reg = &lt;0x81&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_cpu: protocol@82 {</div><div class='add'>+				reg = &lt;0x82&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_misc: protocol@84 {</div><div class='add'>+				reg = &lt;0x84&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -334,13 +382,13 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				cpu_alert0: trip0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;105000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpu_crit0: trip1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='ctx'> 					hysteresis = &lt;2000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -359,6 +407,38 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		ana-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+			polling-delay = &lt;2000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;scmi_sensor 0&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				ana_alert: trip0 {</div><div class='add'>+					temperature = &lt;105000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ana_crit0: trip1 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;ana_alert&gt;;</div><div class='add'>+					cooling-device =</div><div class='add'>+						&lt;&amp;A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='hunk'>@@ -399,12 +479,123 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usbphynop: usbphynop {</div><div class='add'>+		compatible = "usb-nop-xceiv";</div><div class='add'>+		clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;;</div><div class='add'>+		clock-names = "main_clk";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		etm0: etm@40840000 {</div><div class='add'>+			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x40840000 0x0 0x10000&gt;;</div><div class='add'>+			arm,primecell-periphid = &lt;0xbb95d&gt;;</div><div class='add'>+			cpu = &lt;&amp;A55_0&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_A55PERIPH&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm0_out_port: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ca_funnel_in_port0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel0: funnel {</div><div class='add'>+			/*</div><div class='add'>+			 * non-configurable funnel don't show up on the AMBA</div><div class='add'>+			 * bus.  As such no need to add "arm,primecell".</div><div class='add'>+			 */</div><div class='add'>+			compatible = "arm,coresight-static-funnel";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ca_funnel_in_port0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm0_out_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ca_funnel_out_port0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;hugo_funnel_in_port0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel1: funnel-sys {</div><div class='add'>+			compatible = "arm,coresight-static-funnel";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					hugo_funnel_in_port0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ca_funnel_out_port0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					hugo_funnel_out_port0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf_in_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etf: etf@41030000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x41030000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_A55PERIPH&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf_in_port: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;hugo_funnel_out_port0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf_out_port: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr_in_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etr: etr@41040000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x41040000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_A55PERIPH&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr_in_port: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf_out_port&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		aips2: bus@42000000 {</div><div class='ctx'> 			compatible = "fsl,aips-bus", "simple-bus";</div><div class='ctx'> 			reg = &lt;0x0 0x42000000 0x0 0x800000&gt;;</div><div class='hunk'>@@ -609,6 +800,18 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			i3c2: i3c@42520000 {</div><div class='add'>+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x42520000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX95_CLK_BUSAON&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX95_CLK_I3C2SLOW&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			lpi2c3: i2c@42530000 {</div><div class='ctx'> 				compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='ctx'> 				reg = &lt;0x42530000 0x10000&gt;;</div><div class='hunk'>@@ -822,7 +1025,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;scmi_clk IMX95_CLK_LPUART7&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 26 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 25 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 88 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 87 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -834,7 +1037,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;scmi_clk IMX95_CLK_LPUART8&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='del'>-				dmas = &lt;&amp;edma2 28 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 27 0 0&gt;;</div><div class='add'>+				dmas = &lt;&amp;edma2 90 0 FSL_EDMA_RX&gt;, &lt;&amp;edma2 89 0 0&gt;;</div><div class='ctx'> 				dma-names = "rx", "tx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1009,7 +1212,7 @@</div><div class='ctx'> 				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;8&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step= &lt;2&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1026,7 +1229,7 @@</div><div class='ctx'> 				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;4&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step= &lt;2&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1043,7 +1246,7 @@</div><div class='ctx'> 				assigned-clock-rates = &lt;400000000&gt;;</div><div class='ctx'> 				bus-width = &lt;4&gt;;</div><div class='ctx'> 				fsl,tuning-start-tap = &lt;1&gt;;</div><div class='del'>-				fsl,tuning-step= &lt;2&gt;;</div><div class='add'>+				fsl,tuning-step = &lt;2&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1061,6 +1264,7 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_BUSWAKEUP&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;scmi_iomuxc 0 4 32&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio3: gpio@43820000 {</div><div class='hunk'>@@ -1077,6 +1281,7 @@</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;scmi_iomuxc 0 104 8&gt;, &lt;&amp;scmi_iomuxc 8 74 18&gt;,</div><div class='ctx'> 				      &lt;&amp;scmi_iomuxc 26 42 2&gt;, &lt;&amp;scmi_iomuxc 28 0 4&gt;;</div><div class='add'>+			ngpios = &lt;32&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio4: gpio@43840000 {</div><div class='hunk'>@@ -1092,6 +1297,7 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_BUSWAKEUP&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;scmi_iomuxc 0 46 28&gt;, &lt;&amp;scmi_iomuxc 28 44 2&gt;;</div><div class='add'>+			ngpios = &lt;30&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio5: gpio@43850000 {</div><div class='hunk'>@@ -1107,6 +1313,7 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_BUSWAKEUP&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;scmi_iomuxc 0 92 12&gt;, &lt;&amp;scmi_iomuxc 12 36 6&gt;;</div><div class='add'>+			ngpios = &lt;18&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		aips1: bus@44000000 {</div><div class='hunk'>@@ -1165,6 +1372,15 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			system_counter: timer@44290000 {</div><div class='add'>+				compatible = "nxp,imx95-sysctr-timer";</div><div class='add'>+				reg = &lt;0x44290000 0x30000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;osc_24m&gt;;</div><div class='add'>+				clock-names = "per";</div><div class='add'>+				nxp,no-divider;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			tpm1: pwm@44310000 {</div><div class='ctx'> 				compatible = "fsl,imx7ulp-pwm";</div><div class='ctx'> 				reg = &lt;0x44310000 0x1000&gt;;</div><div class='hunk'>@@ -1181,6 +1397,18 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			i3c1: i3c@44330000 {</div><div class='add'>+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";</div><div class='add'>+				reg = &lt;0x44330000 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX95_CLK_BUSAON&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX95_CLK_I3C1SLOW&gt;;</div><div class='add'>+				clock-names = "pclk", "fast_clk";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			lpi2c1: i2c@44340000 {</div><div class='ctx'> 				compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c";</div><div class='ctx'> 				reg = &lt;0x44340000 0x10000&gt;;</div><div class='hunk'>@@ -1315,6 +1543,7 @@</div><div class='ctx'> 					     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;scmi_clk IMX95_CLK_ADC&gt;;</div><div class='ctx'> 				clock-names = "ipg";</div><div class='add'>+				#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1375,6 +1604,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mailbox@47300000 {</div><div class='add'>+			compatible = "fsl,imx95-mu-v2x";</div><div class='add'>+			reg = &lt;0x0 0x47300000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mailbox@47320000 {</div><div class='ctx'> 			compatible = "fsl,imx95-mu-v2x";</div><div class='ctx'> 			reg = &lt;0x0 0x47320000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -1382,6 +1618,20 @@</div><div class='ctx'> 			#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mailbox@47330000 {</div><div class='add'>+			compatible = "fsl,imx95-mu-v2x";</div><div class='add'>+			reg = &lt;0x0 0x47330000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox@47340000 {</div><div class='add'>+			compatible = "fsl,imx95-mu-v2x";</div><div class='add'>+			reg = &lt;0x0 0x47340000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mailbox@47350000 {</div><div class='ctx'> 			compatible = "fsl,imx95-mu-v2x";</div><div class='ctx'> 			reg = &lt;0x0 0x47350000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -1403,9 +1653,29 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_M33&gt;;</div><div class='ctx'> 			clock-names = "gpio", "port";</div><div class='ctx'> 			gpio-ranges = &lt;&amp;scmi_iomuxc 0 112 16&gt;;</div><div class='add'>+			ngpios = &lt;16&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ocotp: efuse@47510000 {</div><div class='add'>+			compatible = "fsl,imx95-ocotp", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x47510000 0x0 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			eth_mac0: mac-address@0 {</div><div class='add'>+				reg = &lt;0x0514 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eth_mac1: mac-address@1 {</div><div class='add'>+				reg = &lt;0x1514 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eth_mac2: mac-address@2 {</div><div class='add'>+				reg = &lt;0x2514 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		elemu0: mailbox@47520000 {</div><div class='ctx'> 			compatible = "fsl,imx95-mu-ele";</div><div class='ctx'> 			reg = &lt;0x0 0x47520000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -1473,12 +1743,85 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb3: usb@4c010010 {</div><div class='add'>+			compatible = "fsl,imx95-dwc3", "fsl,imx8mp-dwc3";</div><div class='add'>+			reg = &lt;0x0 0x4c010010 0x0 0x04&gt;,</div><div class='add'>+			      &lt;0x0 0x4c1f0000 0x0 0x20&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_32K&gt;;</div><div class='add'>+			clock-names = "hsio", "suspend";</div><div class='add'>+			interrupts = &lt;GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x0 0x0 0x0 0x10 0x0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb3_dwc3: usb@4c100000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x4c100000 0x0 0x10000&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX95_CLK_24M&gt;,</div><div class='add'>+					 &lt;&amp;scmi_clk IMX95_CLK_32K&gt;;</div><div class='add'>+				clock-names = "bus_early", "ref", "suspend";</div><div class='add'>+				interrupts = &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				phys = &lt;&amp;usb3_phy&gt;, &lt;&amp;usb3_phy&gt;;</div><div class='add'>+				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				snps,gfladj-refclk-lpm-sel-quirk;</div><div class='add'>+				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				iommus = &lt;&amp;smmu 0xe&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsio_blk_ctl: syscon@4c0100c0 {</div><div class='add'>+			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x4c0100c0 0x0 0x1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_sys100m&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3_phy: phy@4c1f0040 {</div><div class='add'>+			compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";</div><div class='add'>+			reg = &lt;0x0 0x4c1f0040 0x0 0x40&gt;,</div><div class='add'>+			      &lt;0x0 0x4c1fc000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;;</div><div class='add'>+			clock-names = "phy";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2: usb@4c200000 {</div><div class='add'>+			compatible = "fsl,imx95-usb", "fsl,imx7d-usb", "fsl,imx27-usb";</div><div class='add'>+			reg = &lt;0x0 0x4c200000 0x0 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_32K&gt;;</div><div class='add'>+			clock-names = "usb_ctrl_root", "usb_wakeup";</div><div class='add'>+			iommus = &lt;&amp;smmu 0xf&gt;;</div><div class='add'>+			phys = &lt;&amp;usbphynop&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbmisc: usbmisc@4c200200 {</div><div class='add'>+			compatible = "fsl,imx95-usbmisc", "fsl,imx7d-usbmisc",</div><div class='add'>+				     "fsl,imx6q-usbmisc";</div><div class='add'>+			reg = &lt;0x0 0x4c200200 0x0 0x200&gt;,</div><div class='add'>+			      &lt;0x0 0x4c010014 0x0 0x04&gt;;</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie0: pcie@4c300000 {</div><div class='ctx'> 			compatible = "fsl,imx95-pcie";</div><div class='ctx'> 			reg = &lt;0 0x4c300000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x60100000 0 0xfe00000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c360000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x4c340000 0 0x2000&gt;;</div><div class='add'>+			      &lt;0 0x4c340000 0 0x4000&gt;;</div><div class='ctx'> 			reg-names = "dbi", "config", "atu", "app";</div><div class='ctx'> 			ranges = &lt;0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000&gt;,</div><div class='ctx'> 				 &lt;0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000&gt;;</div><div class='hunk'>@@ -1500,15 +1843,22 @@</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='del'>-			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='del'>-			assigned-clocks =&lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;,</div><div class='add'>+				 &lt;&amp;hsio_blk_ctl 0&gt;;</div><div class='add'>+			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;3600000000&gt;, &lt;100000000&gt;, &lt;10000000&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;0&gt;, &lt;0&gt;,</div><div class='ctx'> 						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+			/* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */</div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0x10 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;its 0x11 0x7&gt;;</div><div class='add'>+			iommu-map = &lt;0x000 &amp;smmu 0x10 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;smmu 0x11 0x7&gt;;</div><div class='add'>+			iommu-map-mask = &lt;0x1ff&gt;;</div><div class='ctx'> 			fsl,max-link-speed = &lt;3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1518,24 +1868,25 @@</div><div class='ctx'> 			reg = &lt;0 0x4c300000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c360000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c320000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x4c340000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x4c340000 0 0x4000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c370000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x9 0 1 0&gt;;</div><div class='ctx'> 			reg-names = "dbi","atu", "dbi2", "app", "dma", "addr_space";</div><div class='ctx'> 			num-lanes = &lt;1&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "dma";</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='del'>-			assigned-clocks =&lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;3600000000&gt;, &lt;100000000&gt;, &lt;10000000&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;0&gt;, &lt;0&gt;,</div><div class='ctx'> 						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0x98 0x1&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1545,7 +1896,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c380000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;8 0x80100000 0 0xfe00000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3e0000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x4c3c0000 0 0x2000&gt;;</div><div class='add'>+			      &lt;0 0x4c3c0000 0 0x4000&gt;;</div><div class='ctx'> 			reg-names = "dbi", "config", "atu", "app";</div><div class='ctx'> 			ranges = &lt;0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000&gt;,</div><div class='ctx'> 				 &lt;0x82000000 0 0x10000000 0xa 0x10000000 0 0x10000000&gt;;</div><div class='hunk'>@@ -1567,15 +1918,24 @@</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIO&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='del'>-			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='del'>-			assigned-clocks =&lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;,</div><div class='add'>+				 &lt;&amp;hsio_blk_ctl 0&gt;;</div><div class='add'>+			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;3600000000&gt;, &lt;100000000&gt;, &lt;10000000&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;0&gt;, &lt;0&gt;,</div><div class='ctx'> 						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;scmi_devpd IMX95_PD_HSIO_TOP&gt;;</div><div class='add'>+			/* pcie1's Devid(BIT[7:6]) is 0x10, stream id(BIT[5:0]) is 0x18~0x1f */</div><div class='add'>+			msi-map = &lt;0x0 &amp;its 0x98 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;its 0x99 0x7&gt;;</div><div class='add'>+			msi-map-mask = &lt;0x1ff&gt;;</div><div class='add'>+			/* smmu have not Devid(BIT[7:6]) */</div><div class='add'>+			iommu-map = &lt;0x000 &amp;smmu 0x18 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;smmu 0x19 0x7&gt;;</div><div class='add'>+			iommu-map-mask = &lt;0x1ff&gt;;</div><div class='ctx'> 			fsl,max-link-speed = &lt;3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1585,7 +1945,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c380000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3e0000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3a0000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x4c3c0000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x4c3c0000 0 0x4000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3f0000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0xa 0 1 0&gt;;</div><div class='ctx'> 			reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";</div><div class='hunk'>@@ -1597,9 +1957,9 @@</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='ctx'> 				 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";</div><div class='del'>-			assigned-clocks =&lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='del'>-					 &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL_VCO&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPLL&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_HSIOPCIEAUX&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;3600000000&gt;, &lt;100000000&gt;, &lt;10000000&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;0&gt;, &lt;0&gt;,</div><div class='ctx'> 						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;;</div><div class='hunk'>@@ -1607,9 +1967,52 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vpu_blk_ctrl: clock-controller@4c410000 {</div><div class='add'>+			compatible = "nxp,imx95-vpu-csr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x4c410000 0x0 0x10000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_VPUAPB&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_VPU&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_VPUAPB&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_VPU&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_VPUJPEG&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2&gt;,</div><div class='add'>+						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD2&gt;,</div><div class='add'>+						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD0&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;133333333&gt;, &lt;667000000&gt;, &lt;500000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		jpegdec: jpegdec@4c500000 {</div><div class='add'>+			compatible = "nxp,imx95-jpgdec", "nxp,imx8qxp-jpgdec";</div><div class='add'>+			reg = &lt;0x0 0x4C500000 0x0 0x00050000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_VPU&gt;,</div><div class='add'>+				 &lt;&amp;vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_DEC&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_DEC&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;scmi_clk IMX95_CLK_VPUJPEG&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_VPU&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		jpegenc: jpegenc@4c550000 {</div><div class='add'>+			compatible = "nxp,imx95-jpgenc", "nxp,imx8qxp-jpgenc";</div><div class='add'>+			reg = &lt;0x0 0x4C550000 0x0 0x00050000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_VPU&gt;,</div><div class='add'>+				 &lt;&amp;vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;vpu_blk_ctrl IMX95_CLK_VPUBLK_JPEG_ENC&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;scmi_clk IMX95_CLK_VPUJPEG&gt;;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_VPU&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		netcmix_blk_ctrl: syscon@4c810000 {</div><div class='ctx'> 			compatible = "nxp,imx95-netcmix-blk-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x0 0x4c810000 0x0 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x4c810000 0x0 0x8&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk IMX95_CLK_BUSNETCMIX&gt;;</div><div class='ctx'> 			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_BUSNETCMIX&gt;;</div><div class='hunk'>@@ -1633,6 +2036,108 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		netc_blk_ctrl: system-controller@4cde0000 {</div><div class='add'>+			compatible = "nxp,imx95-netc-blk-ctrl";</div><div class='add'>+			reg = &lt;0x0 0x4cde0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x4cdf0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x4c81000c 0x0 0x18&gt;;</div><div class='add'>+			reg-names = "ierb", "prb", "netcmix";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			power-domains = &lt;&amp;scmi_devpd IMX95_PD_NETC&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk IMX95_CLK_ENET&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk IMX95_CLK_ENETREF&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD2&gt;,</div><div class='add'>+						 &lt;&amp;scmi_clk IMX95_CLK_SYSPLL1_PFD0&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;666666666&gt;, &lt;250000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk IMX95_CLK_ENET&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			netc_bus0: pcie@4ca00000 {</div><div class='add'>+				compatible = "pci-host-ecam-generic";</div><div class='add'>+				reg = &lt;0x0 0x4ca00000 0x0 0x100000&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				bus-range = &lt;0x0 0x0&gt;;</div><div class='add'>+				msi-map = &lt;0x0 &amp;its 0x60 0x1&gt;,	//ENETC0 PF</div><div class='add'>+					  &lt;0x10 &amp;its 0x61 0x1&gt;, //ENETC0 VF0</div><div class='add'>+					  &lt;0x20 &amp;its 0x62 0x1&gt;, //ENETC0 VF1</div><div class='add'>+					  &lt;0x40 &amp;its 0x63 0x1&gt;, //ENETC1 PF</div><div class='add'>+					  &lt;0x80 &amp;its 0x64 0x1&gt;, //ENETC2 PF</div><div class='add'>+					  &lt;0x90 &amp;its 0x65 0x1&gt;, //ENETC2 VF0</div><div class='add'>+					  &lt;0xa0 &amp;its 0x66 0x1&gt;, //ENETC2 VF1</div><div class='add'>+					  &lt;0xc0 &amp;its 0x67 0x1&gt;; //NETC Timer</div><div class='add'>+				iommu-map = &lt;0x0 &amp;smmu 0x20 0x1&gt;,</div><div class='add'>+					    &lt;0x10 &amp;smmu 0x21 0x1&gt;,</div><div class='add'>+					    &lt;0x20 &amp;smmu 0x22 0x1&gt;,</div><div class='add'>+					    &lt;0x40 &amp;smmu 0x23 0x1&gt;,</div><div class='add'>+					    &lt;0x80 &amp;smmu 0x24 0x1&gt;,</div><div class='add'>+					    &lt;0x90 &amp;smmu 0x25 0x1&gt;,</div><div class='add'>+					    &lt;0xa0 &amp;smmu 0x26 0x1&gt;,</div><div class='add'>+					    &lt;0xc0 &amp;smmu 0x27 0x1&gt;;</div><div class='add'>+					 /* ENETC0~2 and Timer BAR0 - non-prefetchable memory */</div><div class='add'>+				ranges = &lt;0x82000000 0x0 0x4cc00000  0x0 0x4cc00000  0x0 0xe0000</div><div class='add'>+					 /* Timer BAR2 - prefetchable memory */</div><div class='add'>+					 0xc2000000 0x0 0x4cd00000  0x0 0x4cd00000  0x0 0x10000</div><div class='add'>+					 /* ENETC0~2: VF0-1 BAR0 - non-prefetchable memory */</div><div class='add'>+					 0x82000000 0x0 0x4cd20000  0x0 0x4cd20000  0x0 0x60000</div><div class='add'>+					 /* ENETC0~2: VF0-1 BAR2 - prefetchable memory */</div><div class='add'>+					 0xc2000000 0x0 0x4cd80000  0x0 0x4cd80000  0x0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+				enetc_port0: ethernet@0,0 {</div><div class='add'>+					compatible = "pci1131,e101";</div><div class='add'>+					reg = &lt;0x000000 0 0 0 0&gt;;</div><div class='add'>+					clocks = &lt;&amp;scmi_clk IMX95_CLK_ENETREF&gt;;</div><div class='add'>+					clock-names = "ref";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				enetc_port1: ethernet@8,0 {</div><div class='add'>+					compatible = "pci1131,e101";</div><div class='add'>+					reg = &lt;0x004000 0 0 0 0&gt;;</div><div class='add'>+					clocks = &lt;&amp;scmi_clk IMX95_CLK_ENETREF&gt;;</div><div class='add'>+					clock-names = "ref";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				enetc_port2: ethernet@10,0 {</div><div class='add'>+					compatible = "pci1131,e101";</div><div class='add'>+					reg = &lt;0x008000 0 0 0 0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				netc_timer: ethernet@18,0 {</div><div class='add'>+					compatible = "pci1131,ee02";</div><div class='add'>+					reg = &lt;0x00c000 0 0 0 0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			netc_bus1: pcie@4cb00000 {</div><div class='add'>+				compatible = "pci-host-ecam-generic";</div><div class='add'>+				reg = &lt;0x0 0x4cb00000 0x0 0x100000&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				bus-range = &lt;0x1 0x1&gt;;</div><div class='add'>+					 /* EMDIO BAR0 - non-prefetchable memory */</div><div class='add'>+				ranges = &lt;0x82000000 0x0 0x4cce0000  0x0 0x4cce0000  0x0 0x20000</div><div class='add'>+					 /* EMDIO BAR2 - prefetchable memory */</div><div class='add'>+					 0xc2000000 0x0 0x4cd10000  0x0 0x4cd10000  0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+				netc_emdio: mdio@0,0 {</div><div class='add'>+					compatible = "pci1131,ee00";</div><div class='add'>+					reg = &lt;0x010000 0 0 0 0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ddr-pmu@4e090dc0 {</div><div class='ctx'> 			compatible = "fsl,imx95-ddr-pmu", "fsl,imx93-ddr-pmu";</div><div class='ctx'> 			reg = &lt;0x0 0x4e090dc0 0x0 0x200&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi<br/>index c60c7a9e54af..79daba930ad6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/mba8mx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/mba8mx.dtsi</a></div><div class='hunk'>@@ -100,7 +100,6 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			panel_in_lvds: endpoint {</div><div class='del'>-				data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;lvds_bridge_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -137,9 +136,9 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sound {</div><div class='add'>+	sound: sound {</div><div class='ctx'> 		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='del'>-		model = "imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='ctx'> 		ssi-controller = &lt;&amp;sai3&gt;;</div><div class='ctx'> 		audio-codec = &lt;&amp;tlv320aic3x04&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -318,11 +317,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mipi_dsi {</div><div class='del'>-	samsung,burst-clock-frequency = &lt;891000000&gt;;</div><div class='del'>-	samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;mipi_dsi_out {</div><div class='ctx'> 	data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'> 	remote-endpoint = &lt;&amp;lvds_bridge_in&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/mba8xx.dtsi b/arch/arm64/boot/dts/freescale/mba8xx.dtsi<br/>index 276d1683b03b..c4b5663949ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/mba8xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/mba8xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/mba8xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/mba8xx.dtsi</a></div><div class='hunk'>@@ -36,6 +36,13 @@</div><div class='ctx'> 		stdout-path = &amp;lpuart1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* Non-controllable PCIe reference clock generator */</div><div class='add'>+	pcie_refclk: clock-pcie-ref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -208,6 +215,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hsio_phy {</div><div class='add'>+	fsl,hsio-cfg = "pciea-x2-pcieb";</div><div class='add'>+	fsl,refclk-pad-mode = "input";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	tlv320aic3x04: audio-codec@18 {</div><div class='ctx'> 		compatible = "ti,tlv320aic32x4";</div><div class='hunk'>@@ -309,7 +322,15 @@</div><div class='ctx'> 			  "", "", "", "";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO: Mini-PCIe */</div><div class='add'>+&amp;pcieb {</div><div class='add'>+	phys = &lt;&amp;hsio_phy 0 PHY_TYPE_PCIE 0&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcieb&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	reset-gpios = &lt;&amp;lsio_gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vpcie-supply = &lt;&amp;reg_pcie_1v5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;sai1 {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='hunk'>@@ -467,10 +488,10 @@</div><div class='ctx'> 		fsl,pins = &lt;IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19	0x00000020&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinctrl_pcieb: pcieagrp {</div><div class='del'>-		fsl,pins = &lt;IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x06000041&gt;,</div><div class='del'>-			   &lt;IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x06000041&gt;,</div><div class='del'>-			   &lt;IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x04000041&gt;;</div><div class='add'>+	pinctrl_pcieb: pciebgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B	0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02		0x04000041&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_reg_pcie_1v5: regpcie1v5grp {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi<br/>index fa054bfe7d5c..d167624d1f0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32g2.dtsi</a></div><div class='hunk'>@@ -114,6 +114,14 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0 0 0x80000000&gt;;</div><div class='ctx'> </div><div class='add'>+		rtc0: rtc@40060000 {</div><div class='add'>+			compatible = "nxp,s32g2-rtc";</div><div class='add'>+			reg = &lt;0x40060000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 54&gt;, &lt;&amp;clks 55&gt;;</div><div class='add'>+			clock-names = "ipg", "source0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl: pinctrl@4009c240 {</div><div class='ctx'> 			compatible = "nxp,s32g2-siul2-pinctrl";</div><div class='ctx'> 				/* MSCR0-MSCR101 registers on siul2_0 */</div><div class='hunk'>@@ -162,6 +170,277 @@</div><div class='ctx'> 					slew-rate = &lt;166&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0: usdhc0grp-pins {</div><div class='add'>+				usdhc0-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0_100mhz: usdhc0-100mhzgrp-pins {</div><div class='add'>+				usdhc0-100mhz-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0_200mhz: usdhc0-200mhzgrp-pins {</div><div class='add'>+				usdhc0-200mhz-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ocotp: nvmem@400a4000 {</div><div class='add'>+			compatible = "nxp,s32g2-ocotp";</div><div class='add'>+			reg = &lt;0x400a4000 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt0: watchdog@40100000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40100000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt1: watchdog@40104000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40104000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt2: watchdog@40108000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40108000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt3: watchdog@4010c000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x4010c000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm0: timer@4011c000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x4011c000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm1: timer@40120000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40120000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm2: timer@40124000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40124000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm3: timer@40128000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40128000 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edma0: dma-controller@40144000 {</div><div class='add'>+			compatible = "nxp,s32g2-edma";</div><div class='add'>+			reg = &lt;0x40144000 0x24000&gt;,</div><div class='add'>+			      &lt;0x4012c000 0x3000&gt;,</div><div class='add'>+			      &lt;0x40130000 0x3000&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+			dma-channels = &lt;32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tx-0-15",</div><div class='add'>+					  "tx-16-31",</div><div class='add'>+					  "err";</div><div class='add'>+			clocks = &lt;&amp;clks 63&gt;, &lt;&amp;clks 64&gt;;</div><div class='add'>+			clock-names = "dmamux0", "dmamux1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0: can@401b4000 {</div><div class='add'>+			compatible = "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x401b4000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1: can@401be000 {</div><div class='add'>+			compatible = "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x401be000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart0: serial@401c8000 {</div><div class='hunk'>@@ -180,6 +459,195 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usbmisc: usbmisc@44064200 {</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "nxp,s32g2-usbmisc";</div><div class='add'>+			reg = &lt;0x44064200 0x200&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbotg: usb@44064000 {</div><div class='add'>+			compatible = "nxp,s32g2-usb";</div><div class='add'>+			reg = &lt;0x44064000 0x200&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;, /* OTG Core */</div><div class='add'>+					 &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;; /* OTG Wakeup */</div><div class='add'>+			clocks = &lt;&amp;clks 94&gt;, &lt;&amp;clks 95&gt;;</div><div class='add'>+			fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='add'>+			ahb-burst-config = &lt;0x3&gt;;</div><div class='add'>+			tx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+			rx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+			phy_type = "ulpi";</div><div class='add'>+			dr_mode = "host";</div><div class='add'>+			maximum-speed = "high-speed";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@401d4000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401d4000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;8&gt;;</div><div class='add'>+			bus-num = &lt;0&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 7&gt;, &lt;&amp;edma0 0 8&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@401d8000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401d8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;1&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 10&gt;, &lt;&amp;edma0 0 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@401dc000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401dc000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;2&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 13&gt;, &lt;&amp;edma0 0 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@401e4000 {</div><div class='add'>+			compatible = "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401e4000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@401e8000 {</div><div class='add'>+			compatible = "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401e8000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@401ec000 {</div><div class='add'>+			compatible = "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401ec000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt4: watchdog@40200000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40200000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt5: watchdog@40204000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40204000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt6: watchdog@40208000 {</div><div class='add'>+			compatible = "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40208000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm4: timer@4021c000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x4021c000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm5: timer@40220000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40220000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm6: timer@40224000 {</div><div class='add'>+			compatible = "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40224000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edma1: dma-controller@40244000 {</div><div class='add'>+			compatible = "nxp,s32g2-edma";</div><div class='add'>+			reg = &lt;0x40244000 0x24000&gt;,</div><div class='add'>+			      &lt;0x4022c000 0x3000&gt;,</div><div class='add'>+			      &lt;0x40230000 0x3000&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+			dma-channels = &lt;32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tx-0-15",</div><div class='add'>+					  "tx-16-31",</div><div class='add'>+					  "err";</div><div class='add'>+			clocks = &lt;&amp;clks 63&gt;, &lt;&amp;clks 64&gt;;</div><div class='add'>+			clock-names = "dmamux0", "dmamux1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can2: can@402a8000 {</div><div class='add'>+			compatible = "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x402a8000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can3: can@402b2000 {</div><div class='add'>+			compatible = "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x402b2000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart2: serial@402bc000 {</div><div class='ctx'> 			compatible = "nxp,s32g2-linflexuart",</div><div class='ctx'> 				     "fsl,s32v234-linflexuart";</div><div class='hunk'>@@ -188,6 +656,67 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi3: spi@402c8000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402c8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;3&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 7&gt;, &lt;&amp;edma0 1 8&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi4: spi@402cc000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402cc000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;4&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 10&gt;, &lt;&amp;edma0 1 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi5: spi@402d0000 {</div><div class='add'>+			compatible = "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402d0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;5&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 13&gt;, &lt;&amp;edma0 1 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@402d8000 {</div><div class='add'>+			compatible = "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x402d8000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@402dc000 {</div><div class='add'>+			compatible = "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x402dc000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usdhc0: mmc@402f0000 {</div><div class='ctx'> 			compatible = "nxp,s32g2-usdhc";</div><div class='ctx'> 			reg = &lt;0x402f0000 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts<br/>index dbe498798bd9..c4a195dd67bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g274a-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32g274a-evb.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "s32g2.dtsi"</div><div class='add'>+#include "s32gxxxa-evb.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "NXP S32G2 Evaluation Board (S32G-VNP-EVB)";</div><div class='hunk'>@@ -34,6 +35,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usdhc0 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc0&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc0_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc0_200mhz&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	no-1-8-v;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts<br/>index ab1e5caaeae7..4f58be68c818 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "s32g2.dtsi"</div><div class='add'>+#include "s32gxxxa-rdb.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "NXP S32G2 Reference Design Board 2 (S32G-VNP-RDB2)";</div><div class='hunk'>@@ -39,7 +40,40 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;stm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swt0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc0 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc0&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc0_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc0_200mhz&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	/* Remove no-1-8-v to enable higher speed modes for SD card.</div><div class='add'>+	 * However, this is not enough to enable HS400 or HS200 modes for eMMC.</div><div class='add'>+	 * In this case, the position of the resistor R797 must be changed</div><div class='add'>+	 * from A to B before removing the property.</div><div class='add'>+	 * If the property is removed without changing the resistor position,</div><div class='add'>+	 * HS*00 may be enabled, but the interface might be unstable because of</div><div class='add'>+	 * the wrong VCCQ voltage applied to the eMMC.</div><div class='add'>+	 */</div><div class='add'>+	no-1-8-v;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi<br/>index b4226a9143c8..be3a582ebc1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32g3.dtsi</a></div><div class='hunk'>@@ -171,6 +171,15 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0 0 0 0x80000000&gt;;</div><div class='ctx'> </div><div class='add'>+		rtc0: rtc@40060000 {</div><div class='add'>+			compatible = "nxp,s32g3-rtc",</div><div class='add'>+				     "nxp,s32g2-rtc";</div><div class='add'>+			reg = &lt;0x40060000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 54&gt;, &lt;&amp;clks 55&gt;;</div><div class='add'>+			clock-names = "ipg", "source0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl: pinctrl@4009c240 {</div><div class='ctx'> 			compatible = "nxp,s32g2-siul2-pinctrl";</div><div class='ctx'> 				/* MSCR0-MSCR101 registers on siul2_0 */</div><div class='hunk'>@@ -219,6 +228,279 @@</div><div class='ctx'> 					slew-rate = &lt;166&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0: usdhc0grp-pins {</div><div class='add'>+				usdhc0-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0_100mhz: usdhc0-100mhzgrp-pins {</div><div class='add'>+				usdhc0-100mhz-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;150&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-100mhz-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl_usdhc0_200mhz: usdhc0-200mhzgrp-pins {</div><div class='add'>+				usdhc0-200mhz-grp0 {</div><div class='add'>+					pinmux = &lt;0x2e1&gt;,</div><div class='add'>+						 &lt;0x381&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp1 {</div><div class='add'>+					pinmux = &lt;0x2f1&gt;,</div><div class='add'>+						 &lt;0x301&gt;,</div><div class='add'>+						 &lt;0x311&gt;,</div><div class='add'>+						 &lt;0x321&gt;,</div><div class='add'>+						 &lt;0x331&gt;,</div><div class='add'>+						 &lt;0x341&gt;,</div><div class='add'>+						 &lt;0x351&gt;,</div><div class='add'>+						 &lt;0x361&gt;,</div><div class='add'>+						 &lt;0x371&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					input-enable;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp2 {</div><div class='add'>+					pinmux = &lt;0x391&gt;;</div><div class='add'>+					output-enable;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp3 {</div><div class='add'>+					pinmux = &lt;0x3a0&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+					slew-rate = &lt;208&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc0-200mhz-grp4 {</div><div class='add'>+					pinmux = &lt;0x2032&gt;,</div><div class='add'>+						 &lt;0x2042&gt;,</div><div class='add'>+						 &lt;0x2052&gt;,</div><div class='add'>+						 &lt;0x2062&gt;,</div><div class='add'>+						 &lt;0x2072&gt;,</div><div class='add'>+						 &lt;0x2082&gt;,</div><div class='add'>+						 &lt;0x2092&gt;,</div><div class='add'>+						 &lt;0x20a2&gt;,</div><div class='add'>+						 &lt;0x20b2&gt;,</div><div class='add'>+						 &lt;0x20c2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ocotp: nvmem@400a4000 {</div><div class='add'>+			compatible = "nxp,s32g3-ocotp", "nxp,s32g2-ocotp";</div><div class='add'>+			reg = &lt;0x400a4000 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt0: watchdog@40100000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40100000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt1: watchdog@40104000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40104000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt2: watchdog@40108000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40108000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt3: watchdog@4010c000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x4010c000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm0: timer@4011c000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x4011c000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm1: timer@40120000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40120000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm2: timer@40124000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40124000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm3: timer@40128000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40128000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edma0: dma-controller@40144000 {</div><div class='add'>+			compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";</div><div class='add'>+			reg = &lt;0x40144000 0x24000&gt;,</div><div class='add'>+			      &lt;0x4012c000 0x3000&gt;,</div><div class='add'>+			      &lt;0x40130000 0x3000&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+			dma-channels = &lt;32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tx-0-15",</div><div class='add'>+					  "tx-16-31",</div><div class='add'>+					  "err";</div><div class='add'>+			clocks = &lt;&amp;clks 63&gt;, &lt;&amp;clks 64&gt;;</div><div class='add'>+			clock-names = "dmamux0", "dmamux1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0: can@401b4000 {</div><div class='add'>+			compatible = "nxp,s32g3-flexcan",</div><div class='add'>+					   "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x401b4000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1: can@401be000 {</div><div class='add'>+			compatible = "nxp,s32g3-flexcan",</div><div class='add'>+					   "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x401be000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart0: serial@401c8000 {</div><div class='hunk'>@@ -237,6 +519,208 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usbmisc: usbmisc@44064200 {</div><div class='add'>+			#index-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "nxp,s32g3-usbmisc";</div><div class='add'>+			reg = &lt;0x44064200 0x200&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+                usbotg: usb@44064000 {</div><div class='add'>+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";</div><div class='add'>+                        reg = &lt;0x44064000 0x200&gt;;</div><div class='add'>+                        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+                        interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;, /* OTG Core */</div><div class='add'>+                                     &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;; /* OTG Wakeup */</div><div class='add'>+                        clocks = &lt;&amp;clks 94&gt;, &lt;&amp;clks 95&gt;;</div><div class='add'>+                        fsl,usbmisc = &lt;&amp;usbmisc 0&gt;;</div><div class='add'>+                        ahb-burst-config = &lt;0x3&gt;;</div><div class='add'>+                        tx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+                        rx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+                        phy_type = "ulpi";</div><div class='add'>+                        dr_mode = "host";</div><div class='add'>+                        maximum-speed = "high-speed";</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+		spi0: spi@401d4000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401d4000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;8&gt;;</div><div class='add'>+			bus-num = &lt;0&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 7&gt;, &lt;&amp;edma0 0 8&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@401d8000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401d8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;1&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 10&gt;, &lt;&amp;edma0 0 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@401dc000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x401dc000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;2&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 0 13&gt;, &lt;&amp;edma0 0 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@401e4000 {</div><div class='add'>+			compatible = "nxp,s32g3-i2c",</div><div class='add'>+				     "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401e4000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@401e8000 {</div><div class='add'>+			compatible = "nxp,s32g3-i2c",</div><div class='add'>+				     "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401e8000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@401ec000 {</div><div class='add'>+			compatible = "nxp,s32g3-i2c",</div><div class='add'>+				     "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x401ec000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt4: watchdog@40200000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40200000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt5: watchdog@40204000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40204000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt6: watchdog@40208000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40208000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt7: watchdog@4020C000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x4020C000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm4: timer@4021c000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x4021c000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm5: timer@40220000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40220000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm6: timer@40224000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40224000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edma1: dma-controller@40244000 {</div><div class='add'>+			compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";</div><div class='add'>+			reg = &lt;0x40244000 0x24000&gt;,</div><div class='add'>+			      &lt;0x4022c000 0x3000&gt;,</div><div class='add'>+			      &lt;0x40230000 0x3000&gt;;</div><div class='add'>+			#dma-cells = &lt;2&gt;;</div><div class='add'>+			dma-channels = &lt;32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tx-0-15",</div><div class='add'>+					  "tx-16-31",</div><div class='add'>+					  "err";</div><div class='add'>+			clocks = &lt;&amp;clks 63&gt;, &lt;&amp;clks 64&gt;;</div><div class='add'>+			clock-names = "dmamux0", "dmamux1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can2: can@402a8000 {</div><div class='add'>+			compatible = "nxp,s32g3-flexcan",</div><div class='add'>+					   "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x402a8000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can3: can@402b2000 {</div><div class='add'>+			compatible = "nxp,s32g3-flexcan",</div><div class='add'>+					   "nxp,s32g2-flexcan";</div><div class='add'>+			reg = &lt;0x402b2000 0xa000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "mb-0", "state", "berr", "mb-1";</div><div class='add'>+			clocks = &lt;&amp;clks 9&gt;, &lt;&amp;clks 11&gt;;</div><div class='add'>+			clock-names = "ipg", "per";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart2: serial@402bc000 {</div><div class='ctx'> 			compatible = "nxp,s32g3-linflexuart",</div><div class='ctx'> 				     "fsl,s32v234-linflexuart";</div><div class='hunk'>@@ -245,6 +729,69 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi3: spi@402c8000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402c8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;3&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 7&gt;, &lt;&amp;edma0 1 8&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi4: spi@402cc000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402cc000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;4&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 10&gt;, &lt;&amp;edma0 1 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi5: spi@402d0000 {</div><div class='add'>+			compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";</div><div class='add'>+			reg = &lt;0x402d0000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 26&gt;;</div><div class='add'>+			clock-names = "dspi";</div><div class='add'>+			spi-num-chipselects = &lt;5&gt;;</div><div class='add'>+			bus-num = &lt;5&gt;;</div><div class='add'>+			dmas = &lt;&amp;edma0 1 13&gt;, &lt;&amp;edma0 1 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@402d8000 {</div><div class='add'>+			compatible = "nxp,s32g3-i2c",</div><div class='add'>+				     "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x402d8000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@402dc000 {</div><div class='add'>+			compatible = "nxp,s32g3-i2c",</div><div class='add'>+				     "nxp,s32g2-i2c";</div><div class='add'>+			reg = &lt;0x402dc000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 40&gt;;</div><div class='add'>+			clock-names = "ipg";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usdhc0: mmc@402f0000 {</div><div class='ctx'> 			compatible = "nxp,s32g3-usdhc",</div><div class='ctx'> 				     "nxp,s32g2-usdhc";</div><div class='hunk'>@@ -257,6 +804,74 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		swt8: watchdog@40500000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;40500000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt9: watchdog@40504000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40504000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt10: watchdog@40508000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x40508000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swt11: watchdog@4050c000 {</div><div class='add'>+			compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";</div><div class='add'>+			reg = &lt;0x4050c000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3a&gt;, &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3b&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm8: timer@40520000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40520000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm9: timer@40524000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40524000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm10: timer@40528000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x40528000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm11: timer@4052c000 {</div><div class='add'>+			compatible = "nxp,s32g3-stm", "nxp,s32g2-stm";</div><div class='add'>+			reg = &lt;0x4052c000 0x3000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+			clock-names = "counter", "module", "register";</div><div class='add'>+			interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@50800000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts<br/>index 176e5af191c8..e94f70ad82d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "s32g3.dtsi"</div><div class='add'>+#include "s32gxxxa-rdb.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)";</div><div class='hunk'>@@ -39,7 +40,55 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;stm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;stm8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swt0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	current-sensor@40 {</div><div class='add'>+		compatible = "ti,ina231";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usdhc0 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc0&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc0_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc0_200mhz&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi<br/>new file mode 100644<br/>index 000000000000..f1969cdcef19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ciprian Marian Costea &lt;ciprianmarian.costea@oss.nxp.com&gt;</div><div class='add'>+ *          Ghennadi Procopciuc &lt;ghennadi.procopciuc@oss.nxp.com&gt;</div><div class='add'>+ *          Larisa Grigore &lt;larisa.grigore@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	can0_pins: can0-pins {</div><div class='add'>+		can0-grp0 {</div><div class='add'>+			pinmux = &lt;0x2c1&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0-grp1 {</div><div class='add'>+			pinmux = &lt;0x2b0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0-grp2 {</div><div class='add'>+			pinmux = &lt;0x2012&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can2_pins: can2-pins {</div><div class='add'>+		can2-grp0 {</div><div class='add'>+			pinmux = &lt;0x1b2&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can2-grp1 {</div><div class='add'>+			pinmux = &lt;0x1c0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can2-grp2 {</div><div class='add'>+			pinmux = &lt;0x2782&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can3_pins: can3-pins {</div><div class='add'>+		can3-grp0 {</div><div class='add'>+			pinmux = &lt;0x192&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can3-grp1 {</div><div class='add'>+			pinmux = &lt;0x1a0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can3-grp2 {</div><div class='add'>+			pinmux = &lt;0x2792&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		i2c0-grp0 {</div><div class='add'>+			pinmux = &lt;0x101&gt;, &lt;0x111&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0-grp1 {</div><div class='add'>+			pinmux = &lt;0x2352&gt;, &lt;0x2362&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_gpio_pins: i2c0-gpio-pins {</div><div class='add'>+		i2c0-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x100&gt;, &lt;0x110&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2350&gt;, &lt;0x2360&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		i2c1-grp0 {</div><div class='add'>+			pinmux = &lt;0x131&gt;, &lt;0x141&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1-grp1 {</div><div class='add'>+			pinmux = &lt;0x2cd2&gt;, &lt;0x2ce2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_gpio_pins: i2c1-gpio-pins {</div><div class='add'>+		i2c1-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x130&gt;, &lt;0x140&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2cd0&gt;, &lt;0x2ce0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='add'>+		i2c2-grp0 {</div><div class='add'>+			pinmux = &lt;0x151&gt;, &lt;0x161&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2-grp1 {</div><div class='add'>+			pinmux = &lt;0x2cf2&gt;, &lt;0x2d02&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_gpio_pins: i2c2-gpio-pins {</div><div class='add'>+		i2c2-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x150&gt;, &lt;0x160&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2cf0&gt;, &lt;0x2d00&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='add'>+		i2c4-grp0 {</div><div class='add'>+			pinmux = &lt;0x211&gt;, &lt;0x222&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4-grp1 {</div><div class='add'>+			pinmux = &lt;0x2d43&gt;, &lt;0x2d33&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_gpio_pins: i2c4-gpio-pins {</div><div class='add'>+		i2c4-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x210&gt;, &lt;0x220&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2d40&gt;, &lt;0x2d30&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dspi1_pins: dspi1-pins {</div><div class='add'>+		dspi1-grp0 {</div><div class='add'>+			pinmux = &lt;0x72&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp1 {</div><div class='add'>+			pinmux = &lt;0x62&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp2 {</div><div class='add'>+			pinmux = &lt;0x83&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp3 {</div><div class='add'>+			pinmux = &lt;0x5F0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp4 {</div><div class='add'>+			pinmux = &lt;0x3D92&gt;,</div><div class='add'>+				 &lt;0x3DA2&gt;,</div><div class='add'>+				 &lt;0x3DB2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dspi5_pins: dspi5-pins {</div><div class='add'>+		dspi5-grp0 {</div><div class='add'>+			pinmux = &lt;0x93&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp1 {</div><div class='add'>+			pinmux = &lt;0xA0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp2 {</div><div class='add'>+			pinmux = &lt;0x3ED2&gt;,</div><div class='add'>+				 &lt;0x3EE2&gt;,</div><div class='add'>+				 &lt;0x3EF2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp3 {</div><div class='add'>+			pinmux = &lt;0xB3&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp4 {</div><div class='add'>+			pinmux = &lt;0xC3&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can3_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c0_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c1_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c2_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c4_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dspi1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dspi5_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi<br/>new file mode 100644<br/>index 000000000000..3bc3335c9248<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi</a></div><div class='hunk'>@@ -0,0 +1,259 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ciprian Marian Costea &lt;ciprianmarian.costea@oss.nxp.com&gt;</div><div class='add'>+ *          Ghennadi Procopciuc &lt;ghennadi.procopciuc@oss.nxp.com&gt;</div><div class='add'>+ *          Larisa Grigore &lt;larisa.grigore@nxp.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	can0_pins: can0-pins {</div><div class='add'>+		can0-grp0 {</div><div class='add'>+			pinmux = &lt;0x112&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0-grp1 {</div><div class='add'>+			pinmux = &lt;0x120&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0-grp2 {</div><div class='add'>+			pinmux = &lt;0x2013&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can1_pins: can1-pins {</div><div class='add'>+		can1-grp0 {</div><div class='add'>+			pinmux = &lt;0x132&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1-grp1 {</div><div class='add'>+			pinmux = &lt;0x140&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1-grp2 {</div><div class='add'>+			pinmux = &lt;0x2772&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		i2c0-grp0 {</div><div class='add'>+			pinmux = &lt;0x1f2&gt;, &lt;0x201&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0-grp1 {</div><div class='add'>+			pinmux = &lt;0x2353&gt;, &lt;0x2363&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_gpio_pins: i2c0-gpio-pins {</div><div class='add'>+		i2c0-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x1f0&gt;, &lt;0x200&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2350&gt;, &lt;0x2360&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='add'>+		i2c2-grp0 {</div><div class='add'>+			pinmux = &lt;0x151&gt;, &lt;0x161&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2-grp1 {</div><div class='add'>+			pinmux = &lt;0x2cf2&gt;, &lt;0x2d02&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_gpio_pins: i2c2-gpio-pins {</div><div class='add'>+		i2c2-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x2cf0&gt;, &lt;0x2d00&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x150&gt;, &lt;0x160&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='add'>+		i2c4-grp0 {</div><div class='add'>+			pinmux = &lt;0x211&gt;, &lt;0x222&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4-grp1 {</div><div class='add'>+			pinmux = &lt;0x2d43&gt;, &lt;0x2d33&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_gpio_pins: i2c4-gpio-pins {</div><div class='add'>+		i2c4-gpio-grp0 {</div><div class='add'>+			pinmux = &lt;0x210&gt;, &lt;0x220&gt;;</div><div class='add'>+			drive-open-drain;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;133&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4-gpio-grp1 {</div><div class='add'>+			pinmux = &lt;0x2d40&gt;, &lt;0x2d30&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dspi1_pins: dspi1-pins {</div><div class='add'>+		dspi1-grp0 {</div><div class='add'>+			pinmux = &lt;0x72&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp1 {</div><div class='add'>+			pinmux = &lt;0x62&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp2 {</div><div class='add'>+			pinmux = &lt;0x83&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp3 {</div><div class='add'>+			pinmux = &lt;0x5F0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi1-grp4 {</div><div class='add'>+			pinmux = &lt;0x3D92&gt;,</div><div class='add'>+				 &lt;0x3DA2&gt;,</div><div class='add'>+				 &lt;0x3DB2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dspi5_pins: dspi5-pins {</div><div class='add'>+		dspi5-grp0 {</div><div class='add'>+			pinmux = &lt;0x93&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp1 {</div><div class='add'>+			pinmux = &lt;0xA0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp2 {</div><div class='add'>+			pinmux = &lt;0x3ED2&gt;,</div><div class='add'>+				 &lt;0x3EE2&gt;,</div><div class='add'>+				 &lt;0x3EF2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp3 {</div><div class='add'>+			pinmux = &lt;0xB3&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dspi5-grp4 {</div><div class='add'>+			pinmux = &lt;0xC3&gt;;</div><div class='add'>+			output-enable;</div><div class='add'>+			input-enable;</div><div class='add'>+			slew-rate = &lt;150&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;can1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c0_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcal6524: gpio-expander@22 {</div><div class='add'>+		compatible = "nxp,pcal6524";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca85073a: rtc@51 {</div><div class='add'>+		compatible = "nxp,pca85073a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dspi1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dspi5_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c2_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;i2c4_gpio_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqma8xx.dtsi b/arch/arm64/boot/dts/freescale/tqma8xx.dtsi<br/>index 366912bf3d5e..58693b774d4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqma8xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqma8xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqma8xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqma8xx.dtsi</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;66000000&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1v8&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -74,8 +75,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* TODO GPU */</div><div class='del'>-</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -114,6 +113,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;jpegdec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;jpegenc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> &amp;mu_m0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi b/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi<br/>new file mode 100644<br/>index 000000000000..478cc8ede05e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		rtc0 = &amp;rtc1;</div><div class='add'>+		rtc1 = &amp;rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lvds0: backlight-lvds0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_backlight_lvds0&gt;;</div><div class='add'>+		/* PWM support still missing */</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;lsio_gpio1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lvds1: backlight-lvds1 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_backlight_lvds1&gt;;</div><div class='add'>+		/* PWM support still missing */</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;7&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_12v0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;lsio_gpio1 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;lpuart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_lvds0: panel-lvds0 {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT</div><div class='add'>+		 */</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds0&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_lvds0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds0: endpoint {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_lvds1: panel-lvds1 {</div><div class='add'>+		/*</div><div class='add'>+		 * Display is not fixed, so compatible has to be added from</div><div class='add'>+		 * DT</div><div class='add'>+		 */</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds1&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_lvds1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds1: endpoint {</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_12v0: regulator-12v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "12V0";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx-audio-tlv320aic32x4";</div><div class='add'>+		model = "tqm-tlv320aic32";</div><div class='add'>+		ssi-controller = &lt;&amp;sai1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;tlv320aic3x04&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan3 {</div><div class='add'>+	xceiver-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	tlv320aic3x04: audio-codec@18 {</div><div class='add'>+		compatible = "ti,tlv320aic32x4";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		clocks = &lt;&amp;mclkout0_lpcg 0&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		iov-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		ldoin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom2: eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;reg_sdvmmc {</div><div class='add'>+	off-on-delay-us = &lt;200000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usbotg1&gt;;</div><div class='add'>+	srp-disable;</div><div class='add'>+	hnp-disable;</div><div class='add'>+	adp-disable;</div><div class='add'>+	power-active-high;</div><div class='add'>+	over-current-active-low;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbotg3_cdns3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	cd-gpios = &lt;&amp;lsio_gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wp-gpios = &lt;&amp;lsio_gpio4 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_sdvmmc&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi b/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi<br/>new file mode 100644<br/>index 000000000000..2d0a329c2fa5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqma8xxs.dtsi</a></div><div class='hunk'>@@ -0,0 +1,768 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2025 TQ-Systems GmbH &lt;linux@ew.tq-group.com&gt;,</div><div class='add'>+ * D-82229 Seefeld, Germany.</div><div class='add'>+ * Author: Alexander Stein</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;encoder_rpc;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/*</div><div class='add'>+		 * DRAM base addr, minimal size : 1024 MiB DRAM</div><div class='add'>+		 * should be corrected by bootloader</div><div class='add'>+		 */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_xtal25: clk-xtal25 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_tqma8xxs_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_lvds0: regulator-lvds0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds0&gt;;</div><div class='add'>+		regulator-name = "LCD0_VDD_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;lsio_gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_lvds1: regulator-lvds1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_lvds1&gt;;</div><div class='add'>+		regulator-name = "LCD1_VDD_EN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;lsio_gpio1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sdvmmc: regulator-sdvmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sdvmmc&gt;;</div><div class='add'>+		regulator-name = "SD1_VMMC";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;lsio_gpio4 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vmmc: regulator-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "MMC0_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vqmmc: regulator-vqmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "MMC0_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * global autoconfigured region for contiguous allocations</div><div class='add'>+		 * must not exceed memory size and region</div><div class='add'>+		 */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0 0x20000000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0 0x96000000 0 0x30000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		decoder_boot: decoder-boot@84000000 {</div><div class='add'>+			reg = &lt;0 0x84000000 0 0x2000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		encoder_boot: encoder-boot@86000000 {</div><div class='add'>+			reg = &lt;0 0x86000000 0 0x200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		m4_reserved: m4@88000000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0 0x88000000 0 0x8000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring0: vdev0vring0@90000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90000000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev0vring1: vdev0vring1@90008000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90008000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring0: vdev1vring0@90010000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90010000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdev1vring1: vdev1vring1@90018000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90018000 0 0x8000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rsc_table: rsc-table@900ff000 {</div><div class='add'>+			reg = &lt;0 0x900ff000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdevbuffer: vdevbuffer@90400000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x90400000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		decoder_rpc: decoder-rpc@92000000 {</div><div class='add'>+			reg = &lt;0 0x92000000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		encoder_rpc: encoder-rpc@92100000 {</div><div class='add'>+			reg = &lt;0 0x92100000 0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TQMa8XxS only uses industrial grade, reduce trip points accordingly */</div><div class='add'>+&amp;cpu_alert0 {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_crit0 {</div><div class='add'>+	temperature = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+/* end of temperature grade adjustments */</div><div class='add'>+</div><div class='add'>+&amp;fec1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy0&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ethphy0: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy0&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;lsio_gpio3 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			interrupt-parent = &lt;&amp;lsio_gpio1&gt;;</div><div class='add'>+			interrupts = &lt;30 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethphy3: ethernet-phy@3 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pinctrl_ethphy1&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;lsio_gpio0 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;500000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			enet-phy-lane-no-swap;</div><div class='add'>+			interrupt-parent = &lt;&amp;lsio_gpio1&gt;;</div><div class='add'>+			interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fec2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_fec2&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethphy3&gt;;</div><div class='add'>+	fsl,magic-packet;</div><div class='add'>+	mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexcan3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;flexspi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_flexspi0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash0: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;66000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lsio_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_smarc_fangpio&gt;, &lt;&amp;pinctrl_smarc_mngtpio&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "LID", "SLEEP", "CHARGING#", "CHGPRSNT#",</div><div class='add'>+			  "BATLOW#", "", "", "",</div><div class='add'>+			  "", "SMARC_GPIO6", "SMARC_GPIO5", "",</div><div class='add'>+			  "PHY3 RST#", "", "", "SPI0_CS0",</div><div class='add'>+			  "", "SPI0_CS1", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lsio_gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_smarc_gpio&gt;;</div><div class='add'>+</div><div class='add'>+	gpio-line-names = "LCD1_BLKT_EN", "LCD1_VDD_EN", "LCD0_BLKT_EN", "LCD0_VDD_EN",</div><div class='add'>+			  "SMARC_GPIO0", "SMARC_GPIO1", "SMARC_GPIO2", "",</div><div class='add'>+			  "SMARC_GPIO3", "SMARC_GPIO8", "SMARC_GPIO7", "SMARC_GPIO10",</div><div class='add'>+			  "SMARC_GPIO9", "SMARC_GPIO4", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lsio_gpio2 {</div><div class='add'>+	gpio-line-names = "RTC_INT#", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lsio_gpio3 {</div><div class='add'>+	gpio-line-names = "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "PHY0_RST#", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lsio_gpio4 {</div><div class='add'>+	gpio-line-names = "PCIE_PERST#", "", "PCIE_WAKE#", "USB_OTG1_PWR",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "SDIO_PWR_EN",</div><div class='add'>+			  "", "SDIO_WP", "SDIO_CD#", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "", "", "", "";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpi2c0&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_lpi2c0_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;lsio_gpio3 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;lsio_gpio3 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* NXP SE97BTP with temperature sensor + eeprom */</div><div class='add'>+	sensor0: temperature-sensor@1b {</div><div class='add'>+		compatible = "nxp,se97b", "jedec,jc-42.4-temp";</div><div class='add'>+		reg = &lt;0x1b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c64";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_tqma8xxs_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc1: rtc@51 {</div><div class='add'>+		compatible = "nxp,pcf85063a";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_rtc&gt;;</div><div class='add'>+		quartz-load-femtofarads = &lt;7000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;lsio_gpio2&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom1: eeprom@53 {</div><div class='add'>+		compatible = "nxp,se97b", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_tqma8xxs_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcieclk: clock-generator@6a {</div><div class='add'>+		compatible = "renesas,9fgv0241";</div><div class='add'>+		reg = &lt;0x6a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_xtal25&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpspi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi1&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;lsio_gpio0 27 GPIO_ACTIVE_LOW&gt;, &lt;&amp;lsio_gpio0 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpuart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_lpuart3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mu_m0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mu1_m0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS&gt;,</div><div class='add'>+			  &lt;&amp;sai1_lpcg 0&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;786432000&gt;, &lt;49152000&gt;, &lt;12288000&gt;, &lt;49152000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sai1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;thermal_zones {</div><div class='add'>+	pmic0_thermal: pmic0-thermal {</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;</div><div class='add'>+		polling-delay = &lt;2000&gt;;</div><div class='add'>+		thermal-sensors = &lt;&amp;tsens IMX_SC_R_PMIC_0&gt;;</div><div class='add'>+</div><div class='add'>+		trips {</div><div class='add'>+			pmic_alert0: trip0 {</div><div class='add'>+				temperature = &lt;110000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmic_crit0: trip1 {</div><div class='add'>+				temperature = &lt;125000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "critical";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;pmic_alert0&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc1 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc1&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc1_100mhz&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc1_200mhz&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_vqmmc&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usdhc2 {</div><div class='add'>+	pinctrl-names = "default", "state_100mhz", "state_200mhz";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc2&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_usdhc2_100mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	/* NOTE: CD / WP and VMMC support depends on mainboard */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu {</div><div class='add'>+	compatible = "nxp,imx8qxp-vpu";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu_core0 {</div><div class='add'>+	memory-region = &lt;&amp;decoder_boot&gt;, &lt;&amp;decoder_rpc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vpu_core1 {</div><div class='add'>+	memory-region = &lt;&amp;encoder_boot&gt;, &lt;&amp;encoder_rpc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iomuxc {</div><div class='add'>+	pinctrl_backlight_lvds0: backlight-lvds0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_backlight_lvds1: backlight-lvds1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can1: can1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_UART2_TX_ADMA_FLEXCAN1_TX	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_UART2_RX_ADMA_FLEXCAN1_RX	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_can2: can2grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy0: ethphy0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO30	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22		0x00000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ethphy1: ethphy1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_ADC_IN4_LSIO_GPIO1_IO14		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_UART1_CTS_B_LSIO_GPIO0_IO24		0x00000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec1: fec1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2	0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3	0x00000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_fec2: fec2grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_FSR_CONN_ENET1_RGMII_TXC		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_FST_CONN_ENET1_RGMII_TXD2		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_SCKT_CONN_ENET1_RGMII_TXD3		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX0_CONN_ENET1_RGMII_RXC		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SPDIF0_TX_CONN_ENET1_RGMII_RX_CTL		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SPDIF0_RX_CONN_ENET1_RGMII_RXD0		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX2_RX3_CONN_ENET1_RGMII_RXD2		0x00000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_ESAI0_TX1_CONN_ENET1_RGMII_RXD3		0x00000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_flexspi0: flexspi0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_QSPI0A_DATA0_LSIO_QSPI0A_DATA0	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_DATA1_LSIO_QSPI0A_DATA1	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_DATA2_LSIO_QSPI0A_DATA2	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_DATA3_LSIO_QSPI0A_DATA3	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_DQS_LSIO_QSPI0A_DQS		0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0A_SCLK_LSIO_QSPI0A_SCLK	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_SCLK_LSIO_QSPI0B_SCLK	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_DATA0_LSIO_QSPI0B_DATA0	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_DATA1_LSIO_QSPI0B_DATA1	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_DATA2_LSIO_QSPI0B_DATA2	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_DATA3_LSIO_QSPI0B_DATA3	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B	0x0000004d&gt;,</div><div class='add'>+			   &lt;IMX8QXP_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B	0x0000004d&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_smarc_gpio: smarcgpiogrp {</div><div class='add'>+		fsl,pins = /* SMARC_GPIO0 / CAM0_PWR# */</div><div class='add'>+			   &lt;IMX8QXP_SPI0_SCK_LSIO_GPIO1_IO04	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO1 / CAM1_PWR# */</div><div class='add'>+			   &lt;IMX8QXP_SPI0_SDI_LSIO_GPIO1_IO05	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO2 / CAM0_RST# */</div><div class='add'>+			   &lt;IMX8QXP_SPI0_SDO_LSIO_GPIO1_IO06	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO3 / CAM1_RST# */</div><div class='add'>+			   &lt;IMX8QXP_SPI0_CS0_LSIO_GPIO1_IO08	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO4 / HDA_RST# */</div><div class='add'>+			   &lt;IMX8QXP_ADC_IN5_LSIO_GPIO1_IO13	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO7 */</div><div class='add'>+			   &lt;IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO8 */</div><div class='add'>+			   &lt;IMX8QXP_ADC_IN1_LSIO_GPIO1_IO09	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO9 */</div><div class='add'>+			   &lt;IMX8QXP_ADC_IN2_LSIO_GPIO1_IO12	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO10 */</div><div class='add'>+			   &lt;IMX8QXP_ADC_IN3_LSIO_GPIO1_IO11	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_smarc_fangpio: smarcfangpiogrp {</div><div class='add'>+		fsl,pins = /* SMARC_GPIO5 */</div><div class='add'>+			   &lt;IMX8QXP_UART1_RX_LSIO_GPIO0_IO22	0x00000021&gt;,</div><div class='add'>+			   /* SMARC_GPIO6 */</div><div class='add'>+			   &lt;IMX8QXP_UART1_TX_LSIO_GPIO0_IO21	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_smarc_mngtpio: smarcmngtgpiogrp {</div><div class='add'>+		fsl,pins = /* SMARC BATLOW# */</div><div class='add'>+			   &lt;IMX8QXP_SPI3_CS0_LSIO_GPIO0_IO16		0x00000021&gt;,</div><div class='add'>+			   /* SMARC SLEEP */</div><div class='add'>+			   &lt;IMX8QXP_SPI3_SCK_LSIO_GPIO0_IO13		0x00000021&gt;,</div><div class='add'>+			   /* SMARC CHGPRSNT# */</div><div class='add'>+			   &lt;IMX8QXP_SPI3_SDI_LSIO_GPIO0_IO15		0x00000021&gt;,</div><div class='add'>+			   /* SMARC CHARGING# */</div><div class='add'>+			   &lt;IMX8QXP_SPI3_SDO_LSIO_GPIO0_IO14		0x00000021&gt;,</div><div class='add'>+			   /* SMARC LID */</div><div class='add'>+			   &lt;IMX8QXP_SPDIF0_EXT_CLK_LSIO_GPIO0_IO12	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lvds0: lbdpanel0grp {</div><div class='add'>+		fsl,pins = /* LCD PWR */</div><div class='add'>+			&lt;IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03		0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lvds1: lbdpanel1grp {</div><div class='add'>+		fsl,pins = /* LCD PWR */</div><div class='add'>+			&lt;IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01		0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c0: lpi2c0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL	0x06000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA	0x06000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpi2c0_gpio: lpi2c0gpiogrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart0: lpuart0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_UART0_RX_ADMA_UART0_RX		0x06000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_UART0_TX_ADMA_UART0_TX		0x06000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B	0x06000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B	0x06000020&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_lpuart3: lpuart3grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_SCU_GPIO0_00_ADMA_UART3_RX		0x06000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SCU_GPIO0_01_ADMA_UART3_TX		0x06000020&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c0_mipi_lvds0: mipi-lvds0-i2c0grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL	0x06000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA	0x06000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c0_gpio_mipi_lvds0: mipi-lvds0-i2c0-gpiogrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO25	0x0000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO26	0x0000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pcieb: pcieagrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x04000041&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm_mipi_lvds0: mipi-lvds0-pwmgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pwm_mipi_lvds1: mipi-lvds1-pwmgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rtc: rtcgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00		0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1: usdhc1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE	0x00000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE	0x00000041&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE	0x00000041&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sdvmmc: sdvmmcgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spi1: spi1grp {</div><div class='add'>+		fsl,pins = /* PD + PDRV Low + INOUT - MEK has 0x0600004c */</div><div class='add'>+			   &lt;IMX8QXP_SAI0_TXC_ADMA_SPI1_SDI		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI0_TXD_ADMA_SPI1_SDO		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI0_TXFS_ADMA_SPI1_SCK		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29		0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sai1: sai1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_MCLK_OUT0_ADMA_ACM_MCLK_OUT0	0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_FLEXCAN1_RX_ADMA_SAI1_TXD		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_FLEXCAN1_TX_ADMA_SAI1_RXD		0x06000040&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usbotg1: usbotg1grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USB_SS3_TC0_CONN_USB_OTG1_PWR	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USB_SS3_TC2_CONN_USB_OTG1_OC	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_gpio: usdhc2gpiogrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21		0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22		0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2: usdhc2grp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000021&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000021&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_100mhz: usdhc2100mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usdhc2_200mhz: usdhc2200mhzgrp {</div><div class='add'>+		fsl,pins = &lt;IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020&gt;,</div><div class='add'>+			   &lt;IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi b/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi<br/>index 2471bb109e8e..9d44f488c083 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi</a></div><div class='hunk'>@@ -10,23 +10,7 @@</div><div class='ctx'> #include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	sfp1: sfp1 {</div><div class='del'>-		compatible = "sff,sfp";</div><div class='del'>-		i2c-bus = &lt;&amp;sfp1_i2c&gt;;</div><div class='del'>-		mod-def0-gpios = &lt;&amp;gpioexp2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		los-gpios = &lt;&amp;gpioexp2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		tx-fault-gpios = &lt;&amp;gpioexp2 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		tx-disable-gpios = &lt;&amp;gpioexp2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	sfp2: sfp2 {</div><div class='del'>-		compatible = "sff,sfp";</div><div class='del'>-		i2c-bus = &lt;&amp;sfp2_i2c&gt;;</div><div class='del'>-		mod-def0-gpios = &lt;&amp;gpioexp2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		los-gpios = &lt;&amp;gpioexp2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		tx-fault-gpios = &lt;&amp;gpioexp2 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		tx-disable-gpios = &lt;&amp;gpioexp2 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dpmac1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi b/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi<br/>index 65b4ed28a3d4..444bbf511596 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi</a></div><div class='hunk'>@@ -47,6 +47,26 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sfp1: sfp1 {</div><div class='add'>+		compatible = "sff,sfp";</div><div class='add'>+		i2c-bus = &lt;&amp;sfp1_i2c&gt;;</div><div class='add'>+		mod-def0-gpios = &lt;&amp;gpioexp2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		los-gpios = &lt;&amp;gpioexp2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-fault-gpios = &lt;&amp;gpioexp2 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-disable-gpios = &lt;&amp;gpioexp2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sfp2: sfp2 {</div><div class='add'>+		compatible = "sff,sfp";</div><div class='add'>+		i2c-bus = &lt;&amp;sfp2_i2c&gt;;</div><div class='add'>+		mod-def0-gpios = &lt;&amp;gpioexp2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		los-gpios = &lt;&amp;gpioexp2 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-fault-gpios = &lt;&amp;gpioexp2 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-disable-gpios = &lt;&amp;gpioexp2 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;duart0 {</div><div class='hunk'>@@ -69,6 +89,7 @@</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='ctx'> </div><div class='ctx'> 		i2c@0 {</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi b/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi<br/>index 138f8778afde..7da1bfd83cca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi</a></div><div class='hunk'>@@ -8,6 +8,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	reg_vcc1v8: regulator-vcc1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reg_vcc3v3: regulator-vcc3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC3V3";</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi<br/>index 79a55a0fa2f1..4c6a075908d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -51,6 +53,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -68,6 +71,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -160,6 +164,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -177,6 +182,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -194,6 +200,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -211,6 +218,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='head'>diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi<br/>index a589954c29e2..f8b56d443850 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/hisilicon/hi6220.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/hisilicon/hi6220.dtsi</a></div><div class='hunk'>@@ -727,8 +727,6 @@</div><div class='ctx'> 			compatible = "arm,pl022", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0xf7106000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 50 4&gt;;</div><div class='del'>-			bus-id = &lt;0&gt;;</div><div class='del'>-			enable-dma = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sys_ctrl HI6220_SPI_CLK&gt;, &lt;&amp;sys_ctrl HI6220_SPI_CLK&gt;;</div><div class='ctx'> 			clock-names = "sspclk", "apb_pclk";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile<br/>index d39cfb723f5b..33f6d01266b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/intel/Makefile</a></div><div class='hunk'>@@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \</div><div class='ctx'> 				socfpga_agilex_socdk.dtb \</div><div class='ctx'> 				socfpga_agilex_socdk_nand.dtb \</div><div class='ctx'> 				socfpga_agilex5_socdk.dtb \</div><div class='add'>+				socfpga_agilex5_socdk_nand.dtb \</div><div class='ctx'> 				socfpga_n5x_socdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi<br/>index 2a5eeb21da47..c1e66db0f4c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/intel/socfpga_agilex.dtsi</a></div><div class='hunk'>@@ -101,26 +101,32 @@</div><div class='ctx'> 		compatible = "arm,gic-400", "arm,cortex-a15-gic";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		reg = &lt;0x0 0xfffc1000 0x0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x0 0xfffc2000 0x0 0x2000&gt;,</div><div class='ctx'> 		      &lt;0x0 0xfffc4000 0x0 0x2000&gt;,</div><div class='ctx'> 		      &lt;0x0 0xfffc6000 0x0 0x2000&gt;;</div><div class='add'>+		/* VGIC maintenance interrupt */</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='ctx'> 		cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cb_intosc_ls_clk: cb-intosc-ls-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;400000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		f2s_free_clk: f2s-free-clk {</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		osc1: osc1 {</div><div class='hunk'>@@ -454,6 +460,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			num-cs = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clkmgr AGILEX_L4_MAIN_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;pdma 16&gt;, &lt;&amp;pdma 17&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -468,6 +476,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			num-cs = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clkmgr AGILEX_L4_MAIN_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;pdma 20&gt;, &lt;&amp;pdma 21&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi<br/>index 1162978329c1..04e99cd7e74b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi</a></div><div class='hunk'>@@ -222,6 +222,26 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpio0: gpio@10c03200 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x10c03200 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;rst GPIO0_RESET&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			porta: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				snps,nr-gpios = &lt;24&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpio1: gpio@10c03300 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0x10c03300 0x100&gt;;</div><div class='hunk'>@@ -314,7 +334,7 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			num-cs = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clkmgr AGILEX5_L4_MAIN_CLK&gt;;</div><div class='del'>-			dmas = &lt;&amp;dmac0 2&gt;, &lt;&amp;dmac0 3&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac0 16&gt;, &lt;&amp;dmac0 17&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +351,8 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			num-cs = &lt;4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clkmgr AGILEX5_L4_MAIN_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac0 20&gt;, &lt;&amp;dmac0 21&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -464,5 +486,341 @@</div><div class='ctx'> 			clocks = &lt;&amp;qspi_clk&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@10810000 {</div><div class='add'>+			compatible = "altr,socfpga-stmmac-agilex5",</div><div class='add'>+				     "snps,dwxgmac-2.10";</div><div class='add'>+			reg = &lt;0x10810000 0x3500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			resets = &lt;&amp;rst EMAC0_RESET&gt;, &lt;&amp;rst EMAC0_OCP_RESET&gt;;</div><div class='add'>+			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			clocks = &lt;&amp;clkmgr AGILEX5_EMAC0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;clkmgr AGILEX5_EMAC_PTP_CLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref";</div><div class='add'>+			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			tx-fifo-depth = &lt;32768&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;64&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_emac0_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_emac0_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_emac0_setup&gt;;</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x44 0&gt;;</div><div class='add'>+			snps,clk-csr = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			stmmac_axi_emac0_setup: stmmac-axi-config {</div><div class='add'>+				snps,wr_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,blen = &lt;0 0 0 32 16 8 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_emac0_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_emac0_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,tx-sched-wrr;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,weight = &lt;0x09&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,weight = &lt;0x0A&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,weight = &lt;0x0B&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,weight = &lt;0x0C&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,weight = &lt;0x0D&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,weight = &lt;0x0E&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,weight = &lt;0x0F&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,weight = &lt;0x10&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1: ethernet@10820000 {</div><div class='add'>+			compatible = "altr,socfpga-stmmac-agilex5",</div><div class='add'>+				     "snps,dwxgmac-2.10";</div><div class='add'>+			reg = &lt;0x10820000 0x3500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			resets = &lt;&amp;rst EMAC1_RESET&gt;, &lt;&amp;rst EMAC1_OCP_RESET&gt;;</div><div class='add'>+			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			clocks = &lt;&amp;clkmgr AGILEX5_EMAC1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;clkmgr AGILEX5_EMAC_PTP_CLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref";</div><div class='add'>+			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			tx-fifo-depth = &lt;32768&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;64&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_emac1_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_emac1_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_emac1_setup&gt;;</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x48 0&gt;;</div><div class='add'>+			snps,clk-csr = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			stmmac_axi_emac1_setup: stmmac-axi-config {</div><div class='add'>+				snps,wr_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,blen = &lt;0 0 0 32 16 8 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_emac1_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_emac1_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,tx-sched-wrr;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,weight = &lt;0x09&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,weight = &lt;0x0A&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,weight = &lt;0x0B&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,weight = &lt;0x0C&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,weight = &lt;0x0D&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,weight = &lt;0x0E&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,weight = &lt;0x0F&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,weight = &lt;0x10&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac2: ethernet@10830000 {</div><div class='add'>+			compatible = "altr,socfpga-stmmac-agilex5",</div><div class='add'>+				     "snps,dwxgmac-2.10";</div><div class='add'>+			reg = &lt;0x10830000 0x3500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			resets = &lt;&amp;rst EMAC2_RESET&gt;, &lt;&amp;rst EMAC2_OCP_RESET&gt;;</div><div class='add'>+			reset-names = "stmmaceth", "ahb";</div><div class='add'>+			clocks = &lt;&amp;clkmgr AGILEX5_EMAC2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;clkmgr AGILEX5_EMAC_PTP_CLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref";</div><div class='add'>+			mac-address = [00 00 00 00 00 00];</div><div class='add'>+			tx-fifo-depth = &lt;32768&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;64&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_emac2_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_emac2_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_emac2_setup&gt;;</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			altr,sysmgr-syscon = &lt;&amp;sysmgr 0x4c 0&gt;;</div><div class='add'>+			snps,clk-csr = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			stmmac_axi_emac2_setup: stmmac-axi-config {</div><div class='add'>+				snps,wr_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;31&gt;;</div><div class='add'>+				snps,blen = &lt;0 0 0 32 16 8 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_emac2_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_emac2_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,tx-sched-wrr;</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,weight = &lt;0x09&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,weight = &lt;0x0A&gt;;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,weight = &lt;0x0B&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,weight = &lt;0x0C&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue4 {</div><div class='add'>+					snps,weight = &lt;0x0D&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue5 {</div><div class='add'>+					snps,weight = &lt;0x0E&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue6 {</div><div class='add'>+					snps,weight = &lt;0x0F&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+				queue7 {</div><div class='add'>+					snps,weight = &lt;0x10&gt;;</div><div class='add'>+					snps,coe-unsupported;</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts<br/>index c533e5a3a610..e9776e1cdc9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts</a></div><div class='hunk'>@@ -10,11 +10,51 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		ethernet2 = &amp;gmac2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "hps_led0";</div><div class='add'>+			gpios = &lt;&amp;porta 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the reg */</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;emac2_phy0&gt;;</div><div class='add'>+	max-frame-size = &lt;9000&gt;;</div><div class='add'>+</div><div class='add'>+	mdio0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		emac2_phy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpio1 {</div><div class='hunk'>@@ -25,6 +65,37 @@</div><div class='ctx'> 	clock-frequency = &lt;25000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "micron,mt25qu02g", "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000000&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;50&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;50&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;4&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			qspi_boot: partition@0 {</div><div class='add'>+				label = "u-boot";</div><div class='add'>+				reg = &lt;0x0 0x04200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			root: partition@4200000 {</div><div class='add'>+				label = "root";</div><div class='add'>+				reg = &lt;0x04200000 0x0be00000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts<br/>new file mode 100644<br/>index 000000000000..38a582ef86b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier:     GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025, Altera Corporation</div><div class='add'>+ */</div><div class='add'>+#include "socfpga_agilex5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SoCFPGA Agilex5 SoCDK NAND daughter board";</div><div class='add'>+	compatible = "intel,socfpga-agilex5-socdk-nand", "intel,socfpga-agilex5";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		led0 {</div><div class='add'>+			label = "hps_led0";</div><div class='add'>+			gpios = &lt;&amp;porta 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "hps_led1";</div><div class='add'>+			gpios = &lt;&amp;porta 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the reg */</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		nand-bus-width = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+		partition@0 {</div><div class='add'>+			label = "u-boot";</div><div class='add'>+			reg = &lt;0 0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+		partition@200000 {</div><div class='add'>+			label = "root";</div><div class='add'>+			reg = &lt;0x200000 0xffe00000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;osc1 {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi<br/>index b864ffa74ea8..e83fdc92621e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/lg/lg1312.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/lg/lg1312.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/lg/lg1312.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/lg/lg1312.dtsi</a></div><div class='hunk'>@@ -5,103 +5,12 @@</div><div class='ctx'>  * Copyright (C) 2016, LG Electronics</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='add'>+#include "lg131x.dtsi"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='ctx'> 	compatible = "lge,lg1312";</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu1: cpu@1 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x1&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu2: cpu@2 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x2&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu3: cpu@3 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x3&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		L2_0: l2-cache0 {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-level = &lt;2&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	psci {</div><div class='del'>-		compatible = "arm,psci-0.2", "arm,psci";</div><div class='del'>-		method = "smc";</div><div class='del'>-		cpu_suspend = &lt;0x84000001&gt;;</div><div class='del'>-		cpu_off = &lt;0x84000002&gt;;</div><div class='del'>-		cpu_on = &lt;0x84000003&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gic: interrupt-controller@c0001000 {</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		compatible = "arm,gic-400";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0x0 0xc0001000 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0002000 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0004000 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0006000 0x2000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,cortex-a53-pmu";</div><div class='del'>-		interrupts = &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='del'>-				     &lt;&amp;cpu1&gt;,</div><div class='del'>-				     &lt;&amp;cpu2&gt;,</div><div class='del'>-				     &lt;&amp;cpu3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clk_bus: clk_bus {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;198000000&gt;;</div><div class='del'>-		clock-output-names = "BUSCLK";</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -122,233 +31,4 @@</div><div class='ctx'> 			mac-address = [ 00 00 00 00 00 00 ];</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	amba {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		timers: timer@fd100000 {</div><div class='del'>-			compatible = "arm,sp804", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfd100000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "timer0clk", "timer1clk", "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		wdog: watchdog@fd200000 {</div><div class='del'>-			compatible = "arm,sp805", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfd200000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "wdog_clk", "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		uart0: serial@fe000000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe000000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		uart1: serial@fe100000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe100000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		uart2: serial@fe200000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe200000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		spi0: spi@fe800000 {</div><div class='del'>-			compatible = "arm,pl022", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe800000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		spi1: spi@fe900000 {</div><div class='del'>-			compatible = "arm,pl022", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe900000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		dmac0: dma-controller@c1128000 {</div><div class='del'>-			compatible = "arm,pl330", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xc1128000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			#dma-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		gpio0: gpio@fd400000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd400000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio1: gpio@fd410000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd410000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio2: gpio@fd420000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd420000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio3: gpio@fd430000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd430000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		gpio4: gpio@fd440000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd440000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio5: gpio@fd450000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd450000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio6: gpio@fd460000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd460000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio7: gpio@fd470000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd470000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio8: gpio@fd480000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd480000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio9: gpio@fd490000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd490000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio10: gpio@fd4a0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4a0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio11: gpio@fd4b0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4b0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		gpio12: gpio@fd4c0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4c0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio13: gpio@fd4d0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4d0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio14: gpio@fd4e0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4e0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio15: gpio@fd4f0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4f0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio16: gpio@fd500000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd500000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio17: gpio@fd510000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd510000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi<br/>index 996fb39bb50c..92fa5694cad1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/lg/lg1313.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/lg/lg1313.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/lg/lg1313.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/lg/lg1313.dtsi</a></div><div class='hunk'>@@ -5,103 +5,12 @@</div><div class='ctx'>  * Copyright (C) 2016, LG Electronics</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='add'>+#include "lg131x.dtsi"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='ctx'> 	compatible = "lge,lg1313";</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu1: cpu@1 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x1&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu2: cpu@2 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x2&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu3: cpu@3 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "arm,cortex-a53";</div><div class='del'>-			reg = &lt;0x0 0x3&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-		};</div><div class='del'>-		L2_0: l2-cache0 {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-level = &lt;2&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	psci {</div><div class='del'>-		compatible = "arm,psci-0.2", "arm,psci";</div><div class='del'>-		method = "smc";</div><div class='del'>-		cpu_suspend = &lt;0x84000001&gt;;</div><div class='del'>-		cpu_off = &lt;0x84000002&gt;;</div><div class='del'>-		cpu_on = &lt;0x84000003&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gic: interrupt-controller@c0001000 {</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		compatible = "arm,gic-400";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0x0 0xc0001000 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0002000 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0004000 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0xc0006000 0x2000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,cortex-a53-pmu";</div><div class='del'>-		interrupts = &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='del'>-				     &lt;&amp;cpu1&gt;,</div><div class='del'>-				     &lt;&amp;cpu2&gt;,</div><div class='del'>-				     &lt;&amp;cpu3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='del'>-			      IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	clk_bus: clk_bus {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;198000000&gt;;</div><div class='del'>-		clock-output-names = "BUSCLK";</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -122,233 +31,4 @@</div><div class='ctx'> 			mac-address = [ 00 00 00 00 00 00 ];</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	amba {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		timers: timer@fd100000 {</div><div class='del'>-			compatible = "arm,sp804", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfd100000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "timer0clk", "timer1clk", "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		wdog: watchdog@fd200000 {</div><div class='del'>-			compatible = "arm,sp805", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfd200000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "wdog_clk", "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		uart0: serial@fe000000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe000000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		uart1: serial@fe100000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe100000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		uart2: serial@fe200000 {</div><div class='del'>-			compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe200000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		spi0: spi@fe800000 {</div><div class='del'>-			compatible = "arm,pl022", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe800000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		spi1: spi@fe900000 {</div><div class='del'>-			compatible = "arm,pl022", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xfe900000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		dmac0: dma-controller@c1128000 {</div><div class='del'>-			compatible = "arm,pl330", "arm,primecell";</div><div class='del'>-			reg = &lt;0x0 0xc1128000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			#dma-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		gpio0: gpio@fd400000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd400000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio1: gpio@fd410000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd410000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio2: gpio@fd420000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd420000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio3: gpio@fd430000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd430000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		gpio4: gpio@fd440000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd440000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio5: gpio@fd450000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd450000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio6: gpio@fd460000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd460000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio7: gpio@fd470000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd470000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio8: gpio@fd480000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd480000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio9: gpio@fd490000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd490000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio10: gpio@fd4a0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4a0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio11: gpio@fd4b0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4b0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-		gpio12: gpio@fd4c0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4c0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio13: gpio@fd4d0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4d0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio14: gpio@fd4e0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4e0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio15: gpio@fd4f0000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd4f0000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio16: gpio@fd500000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd500000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-		gpio17: gpio@fd510000 {</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			compatible = "arm,pl061", "arm,primecell";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			reg = &lt;0x0 0xfd510000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;clk_bus&gt;;</div><div class='del'>-			clock-names = "apb_pclk";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/lg/lg131x.dtsi b/arch/arm64/boot/dts/lg/lg131x.dtsi<br/>new file mode 100644<br/>index 000000000000..4cb1e4510897<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/lg/lg131x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/lg/lg131x.dtsi</a></div><div class='hunk'>@@ -0,0 +1,333 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for lg131x SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016, LG Electronics</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+		L2_0: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2", "arm,psci";</div><div class='add'>+		method = "smc";</div><div class='add'>+		cpu_suspend = &lt;0x84000001&gt;;</div><div class='add'>+		cpu_off = &lt;0x84000002&gt;;</div><div class='add'>+		cpu_on = &lt;0x84000003&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@c0001000 {</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		compatible = "arm,gic-400";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0x0 0xc0001000 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xc0002000 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0xc0004000 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0xc0006000 0x2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;,</div><div class='add'>+				     &lt;&amp;cpu1&gt;,</div><div class='add'>+				     &lt;&amp;cpu2&gt;,</div><div class='add'>+				     &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='add'>+			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='add'>+			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='add'>+			      IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_RAW(0x0f) |</div><div class='add'>+			      IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_bus: clk_bus {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;198000000&gt;;</div><div class='add'>+		clock-output-names = "BUSCLK";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amba {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		timers: timer@fd100000 {</div><div class='add'>+			compatible = "arm,sp804", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfd100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "timer0clk", "timer1clk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		wdog: watchdog@fd200000 {</div><div class='add'>+			compatible = "arm,sp805", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfd200000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "wdog_clk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		uart0: serial@fe000000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfe000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		uart1: serial@fe100000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfe100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		uart2: serial@fe200000 {</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfe200000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		spi0: spi@fe800000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfe800000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "sspclk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		spi1: spi@fe900000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xfe900000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;, &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "sspclk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		dmac0: dma-controller@c1128000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xc1128000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio0: gpio@fd400000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd400000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio1: gpio@fd410000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd410000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio2: gpio@fd420000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd420000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio3: gpio@fd430000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd430000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		gpio4: gpio@fd440000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd440000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio5: gpio@fd450000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd450000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio6: gpio@fd460000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd460000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio7: gpio@fd470000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd470000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio8: gpio@fd480000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd480000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio9: gpio@fd490000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd490000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio10: gpio@fd4a0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4a0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio11: gpio@fd4b0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4b0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+		gpio12: gpio@fd4c0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4c0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio13: gpio@fd4d0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4d0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio14: gpio@fd4e0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4e0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio15: gpio@fd4f0000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd4f0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio16: gpio@fd500000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd500000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+		gpio17: gpio@fd510000 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0x0 0xfd510000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_bus&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile<br/>index ce751b5028e2..a774bc74a0a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/Makefile</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> # Mvebu SoC Family</div><div class='add'>+dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-atlas-v5.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-eDPU.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb</div><div class='hunk'>@@ -32,3 +33,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-base.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += cn9131-cf-solidwan.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MVEBU) += cn9132-clearfog.dtb</div><div class='add'>+</div><div class='add'>+subdir-y	+= mmp</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi<br/>index 75377c292bcb..4878773883c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		internal-regs@7f000000 {</div><div class='add'>+		bus@7f000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='hunk'>@@ -322,7 +322,7 @@</div><div class='ctx'> </div><div class='ctx'> 		nand: nand-controller@805b0000 {</div><div class='ctx'> 			compatible = "marvell,ac5-nand-controller";</div><div class='del'>-			reg =  &lt;0x0 0x805b0000 0x0 0x00000054&gt;;</div><div class='add'>+			reg = &lt;0x0 0x805b0000 0x0 0x00000054&gt;;</div><div class='ctx'> 			#address-cells = &lt;0x1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0x0&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-371x.dtsi b/arch/arm64/boot/dts/marvell/armada-371x.dtsi<br/>deleted file mode 100644<br/>index dc1182ec9fa1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-371x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-371x.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Device Tree Include file for Marvell Armada 371x family of SoCs</div><div class='del'>- * (also named 88F3710)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 Marvell</div><div class='del'>- *</div><div class='del'>- * Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include "armada-37xx.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada 3710 SoC";</div><div class='del'>-	compatible = "marvell,armada3710", "marvell,armada3700";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts b/arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts<br/>new file mode 100644<br/>index 000000000000..070d10a705bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree file for RIPE Atlas Probe v5</div><div class='add'>+ * 2025 by Marek Behún &lt;kabel@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/bus/moxtet.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "armada-372x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "RIPE Atlas Probe v5";</div><div class='add'>+	compatible = "ripe,atlas-v5", "marvell,armada3720",</div><div class='add'>+		     "marvell,armada3710";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x00000000 0x00000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			gpios = &lt;&amp;gpiosb 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsdc_reg: vsdc-reg {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "vsdc";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+</div><div class='add'>+		gpios = &lt;&amp;gpiosb 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;1800000 0x1</div><div class='add'>+			  3300000 0x0&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		armada-3700-rwtm {</div><div class='add'>+			compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii_pins&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	non-removable;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	marvell,xenon-emmc;</div><div class='add'>+	marvell,xenon-tun-count = &lt;9&gt;;</div><div class='add'>+	marvell,pad-type = "fixed-1-8v";</div><div class='add'>+	vqmmc-supply = &lt;&amp;vsdc_reg&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	mmccard: mmccard@0 {</div><div class='add'>+		compatible = "mmc-card";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;smi_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts<br/>index 0cfb38492021..bd4e61d5448e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-db.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-db.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-db.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-db.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";</div><div class='del'>-	compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3700";</div><div class='add'>+	compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts<br/>index 6715a19c1483..5c4d8f379704 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Globalscale Marvell ESPRESSOBin Board (eMMC)";</div><div class='ctx'> 	compatible = "globalscale,espressobin-emmc", "globalscale,espressobin",</div><div class='del'>-		     "marvell,armada3720", "marvell,armada3700";</div><div class='add'>+		     "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts<br/>index b3cc2b7b5d19..97a180c8dcd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Globalscale Marvell ESPRESSOBin Ultra Board";</div><div class='ctx'> 	compatible = "globalscale,espressobin-ultra", "globalscale,espressobin",</div><div class='del'>-		     "marvell,armada3720", "marvell,armada3700";</div><div class='add'>+		     "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		/* ethernet1 is WAN port */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts<br/>index 2a8aa3901a9f..75401eab4d42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dts</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> 	model = "Globalscale Marvell ESPRESSOBin Board V7 (eMMC)";</div><div class='ctx'> 	compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",</div><div class='ctx'> 		     "globalscale,espressobin", "marvell,armada3720",</div><div class='del'>-		     "marvell,armada3700";</div><div class='add'>+		     "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		/* ethernet1 is wan port */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts<br/>index b03af87611a9..48a7f50fb427 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Globalscale Marvell ESPRESSOBin Board V7";</div><div class='ctx'> 	compatible = "globalscale,espressobin-v7", "globalscale,espressobin",</div><div class='del'>-		     "marvell,armada3720", "marvell,armada3700";</div><div class='add'>+		     "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		/* ethernet1 is wan port */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts<br/>index c5a834b33b77..1542d836c090 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts</a></div><div class='hunk'>@@ -16,5 +16,5 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Globalscale Marvell ESPRESSOBin Board";</div><div class='del'>-	compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3700";</div><div class='add'>+	compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts<br/>index 56930f2ce481..9f4bafeddd82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "GL.iNet GL-MV1000";</div><div class='del'>-	compatible = "glinet,gl-mv1000", "marvell,armada3720";</div><div class='add'>+	compatible = "glinet,gl-mv1000", "marvell,armada3720", "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		led-boot = &amp;led_power;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts<br/>index 54453b0a91f9..f4d73c8b1a6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "CZ.NIC Turris Mox Board";</div><div class='ctx'> 	compatible = "cznic,turris-mox", "marvell,armada3720",</div><div class='del'>-		     "marvell,armada3700";</div><div class='add'>+		     "marvell,armada3710";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		spi0 = &amp;spi0;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi<br/>index 3a9b6907185d..242820845707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi_quad_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 		led-power1 {</div><div class='ctx'> 			label = "udpu:green:power";</div><div class='hunk'>@@ -82,8 +84,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi_quad_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='hunk'>@@ -108,6 +108,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spi_quad_pins {</div><div class='add'>+	function = "gpio";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl_nb {</div><div class='ctx'> 	i2c2_recovery_pins: i2c2-recovery-pins {</div><div class='ctx'> 		groups = "i2c2";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi<br/>index 02ae1e153288..b99ac4c03a48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-372x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-372x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-372x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-372x.dtsi</a></div><div class='hunk'>@@ -12,9 +12,6 @@</div><div class='ctx'> #include "armada-37xx.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada 3720 SoC";</div><div class='del'>-	compatible = "marvell,armada3720", "marvell,armada3700";</div><div class='del'>-</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi<br/>index 9603223dd761..c612317043ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-37xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-37xx.dtsi</a></div><div class='hunk'>@@ -11,8 +11,6 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada 37xx SoC";</div><div class='del'>-	compatible = "marvell,armada3700";</div><div class='ctx'> 	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -78,7 +76,7 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		internal-regs@d0000000 {</div><div class='add'>+		bus@d0000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='hunk'>@@ -526,6 +524,7 @@</div><div class='ctx'> 			pcie_intc: interrupt-controller {</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-7020.dtsi b/arch/arm64/boot/dts/marvell/armada-7020.dtsi<br/>index 4e46326dd123..570f901b4f4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7020.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7020.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7020.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-7020.dtsi</a></div><div class='hunk'>@@ -8,9 +8,3 @@</div><div class='ctx'> </div><div class='ctx'> #include "armada-ap806-dual.dtsi"</div><div class='ctx'> #include "armada-70x0.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada 7020";</div><div class='del'>-	compatible = "marvell,armada7020", "marvell,armada-ap806-dual",</div><div class='del'>-		     "marvell,armada-ap806";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts<br/>index 5e5baf6beea4..3add6506ff20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040-db.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040-db.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040-db.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-7040-db.dts</a></div><div class='hunk'>@@ -124,7 +124,6 @@</div><div class='ctx'> </div><div class='ctx'> 	expander0: pca9555@21 {</div><div class='ctx'> 		compatible = "nxp,pca9555";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='hunk'>@@ -214,7 +213,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy3 1&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts<br/>index 40b7ee7ead72..6bdc4f1e6939 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts</a></div><div class='hunk'>@@ -433,13 +433,13 @@</div><div class='ctx'> 	/* 7 + 12 SATA connector (J24) */</div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy2 0&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-0-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* M.2-2250 B-key (J39) */</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy3 1&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-7040.dtsi b/arch/arm64/boot/dts/marvell/armada-7040.dtsi<br/>index 2f440711d21d..710ac44870bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-7040.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-7040.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-7040.dtsi</a></div><div class='hunk'>@@ -9,12 +9,6 @@</div><div class='ctx'> #include "armada-ap806-quad.dtsi"</div><div class='ctx'> #include "armada-70x0.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada 7040";</div><div class='del'>-	compatible = "marvell,armada7040", "marvell,armada-ap806-quad",</div><div class='del'>-		     "marvell,armada-ap806";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;cp0_pcie0 {</div><div class='ctx'> 	iommu-map =</div><div class='ctx'> 		&lt;0x0   &amp;smmu 0x480 0x20&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8020.dtsi b/arch/arm64/boot/dts/marvell/armada-8020.dtsi<br/>index ba1307c0fadb..b6fc18876093 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8020.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8020.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8020.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8020.dtsi</a></div><div class='hunk'>@@ -9,12 +9,6 @@</div><div class='ctx'> #include "armada-ap806-dual.dtsi"</div><div class='ctx'> #include "armada-80x0.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada 8020";</div><div class='del'>-	compatible = "marvell,armada8020", "marvell,armada-ap806-dual",</div><div class='del'>-		     "marvell,armada-ap806";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock</div><div class='ctx'>  * in CP master is not connected (by package) to the oscillator. So</div><div class='ctx'>  * disable it. However, the RTC clock in CP slave is connected to the</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts<br/>index 67892f0d2863..90ae93274a16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts</a></div><div class='hunk'>@@ -371,25 +371,25 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cp0_gpio2 {</div><div class='del'>-	sata_reset {</div><div class='add'>+	sata-reset-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lte_reset {</div><div class='add'>+	lte-reset-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wlan_disable {</div><div class='add'>+	wlan_disable-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lte_disable {</div><div class='add'>+	lte-disable-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;21 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		output-low;</div><div class='hunk'>@@ -475,7 +475,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy0 1&gt;;</div><div class='del'>-		phy-names = "cp1-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts<br/>index 92897bd7e6cf..21ecb9c12505 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-db.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-db.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-db.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8040-db.dts</a></div><div class='hunk'>@@ -122,7 +122,6 @@</div><div class='ctx'> 	/* U31 */</div><div class='ctx'> 	expander0: pca9555@21 {</div><div class='ctx'> 		compatible = "nxp,pca9555";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='hunk'>@@ -131,7 +130,6 @@</div><div class='ctx'> 	/* U25 */</div><div class='ctx'> 	expander1: pca9555@25 {</div><div class='ctx'> 		compatible = "nxp,pca9555";</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		reg = &lt;0x25&gt;;</div><div class='hunk'>@@ -145,11 +143,12 @@</div><div class='ctx'> </div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy1 0&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-0-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy3 1&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -306,11 +305,9 @@</div><div class='ctx'> </div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy1 0&gt;;</div><div class='del'>-		phy-names = "cp1-sata0-0-phy";</div><div class='ctx'> 	};</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy3 1&gt;;</div><div class='del'>-		phy-names = "cp1-sata0-1-phy";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi<br/>index c864df9ec84d..f2d278d171eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi</a></div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 	/* CPM Lane 5 - U29 */</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy5 1&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -345,13 +345,13 @@</div><div class='ctx'> 	/* CPS Lane 1 - U32 */</div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy1 0&gt;;</div><div class='del'>-		phy-names = "cp1-sata0-0-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* CPS Lane 3 - U31 */</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy3 1&gt;;</div><div class='del'>-		phy-names = "cp1-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts b/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts<br/>index 42a60f3dd5d1..def25d51c4bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "IEI-Puzzle-M801";</div><div class='del'>-	compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";</div><div class='add'>+	compatible = "iei,puzzle-m801", "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;cp0_eth0;</div><div class='hunk'>@@ -408,12 +408,12 @@</div><div class='ctx'> </div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy2 0&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-0-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy5 1&gt;;</div><div class='del'>-		phy-names = "cp0-sata0-1-phy";</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi b/arch/arm64/boot/dts/marvell/armada-8040.dtsi<br/>index 22c2d6ebf381..3efd9b9e6892 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8040.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8040.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8040.dtsi</a></div><div class='hunk'>@@ -9,12 +9,6 @@</div><div class='ctx'> #include "armada-ap806-quad.dtsi"</div><div class='ctx'> #include "armada-80x0.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada 8040";</div><div class='del'>-	compatible = "marvell,armada8040", "marvell,armada-ap806-quad",</div><div class='del'>-		     "marvell,armada-ap806";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;cp0_pcie0 {</div><div class='ctx'> 	iommu-map =</div><div class='ctx'> 		&lt;0x0   &amp;smmu 0x480 0x20&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-8080.dtsi b/arch/arm64/boot/dts/marvell/armada-8080.dtsi<br/>index 299e814d1ded..32bb56f2fe3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8080.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-8080.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-8080.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-8080.dtsi</a></div><div class='hunk'>@@ -6,9 +6,3 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "armada-ap810-ap0-octa-core.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell 8080 board";</div><div class='del'>-	compatible = "marvell,armada-8080", "marvell,armada-ap810-octa",</div><div class='del'>-				"marvell,armada-ap810";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi<br/>index 3ed6fba1f438..82f4dedfc25e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi</a></div><div class='hunk'>@@ -8,9 +8,6 @@</div><div class='ctx'> #include "armada-ap806.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada AP806 Dual";</div><div class='del'>-	compatible = "marvell,armada-ap806-dual", "marvell,armada-ap806";</div><div class='del'>-</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi<br/>index cf6a96ddcf40..f37f49c79a50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi</a></div><div class='hunk'>@@ -8,9 +8,6 @@</div><div class='ctx'> #include "armada-ap806.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada AP806 Quad";</div><div class='del'>-	compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";</div><div class='del'>-</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi<br/>index 866628679ac7..73a570cf1010 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap806.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap806.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap806.dtsi</a></div><div class='hunk'>@@ -5,14 +5,8 @@</div><div class='ctx'>  * Device Tree file for Marvell Armada AP806.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define AP_NAME		ap806</div><div class='ctx'> #include "armada-ap80x.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada AP806";</div><div class='del'>-	compatible = "marvell,armada-ap806";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ap_syscon0 {</div><div class='ctx'> 	ap_clk: clock {</div><div class='ctx'> 		compatible = "marvell,ap806-clock";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi<br/>index 8848238f9565..e8af7546e893 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi</a></div><div class='hunk'>@@ -8,9 +8,6 @@</div><div class='ctx'> #include "armada-ap807.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada AP807 Quad";</div><div class='del'>-	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";</div><div class='del'>-</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap807.dtsi b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi<br/>index a3328d05fc94..196793d8715c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap807.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap807.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap807.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap807.dtsi</a></div><div class='hunk'>@@ -5,14 +5,8 @@</div><div class='ctx'>  * Copyright (C) 2019 Marvell Technology Group Ltd.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define AP_NAME		ap807</div><div class='ctx'> #include "armada-ap80x.dtsi"</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='del'>-	model = "Marvell Armada AP807";</div><div class='del'>-	compatible = "marvell,armada-ap807";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ap_syscon0 {</div><div class='ctx'> 	ap_clk: clock {</div><div class='ctx'> 		compatible = "marvell,ap807-clock";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi<br/>index fdf88cd0eb02..40e146982921 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap80x.dtsi</a></div><div class='hunk'>@@ -48,14 +48,29 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	AP_NAME {</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+				&lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+				&lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+				&lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='add'>+		interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+		interrupts = &lt;17&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		config-space@f0000000 {</div><div class='add'>+		bus@f0000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='hunk'>@@ -122,20 +137,6 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			timer {</div><div class='del'>-				compatible = "arm,armv8-timer";</div><div class='del'>-				interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-					     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-					     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-					     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pmu {</div><div class='del'>-				compatible = "arm,cortex-a72-pmu";</div><div class='del'>-				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='del'>-				interrupts = &lt;17&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			odmi: odmi@300000 {</div><div class='ctx'> 				compatible = "marvell,odmi-controller";</div><div class='ctx'> 				msi-controller;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi<br/>index d1a7143ef3d4..2e719ffc8289 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "marvell,armada-ap810-octa";</div><div class='ctx'> </div><div class='ctx'> 		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi b/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi<br/>index 2f9ab6b4a2c9..abb37e5fc2c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi</a></div><div class='hunk'>@@ -10,10 +10,9 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Marvell Armada AP810";</div><div class='del'>-	compatible = "marvell,armada-ap810";</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0_ap0;</div><div class='hunk'>@@ -25,14 +24,21 @@</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ap810-ap0 {</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				&lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				&lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				&lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		config-space@e8000000 {</div><div class='add'>+		bus@e8000000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='hunk'>@@ -62,14 +68,6 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			timer {</div><div class='del'>-				compatible = "arm,armv8-timer";</div><div class='del'>-				interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-					     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-					     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-					     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			xor@400000 {</div><div class='ctx'> 				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";</div><div class='ctx'> 				reg = &lt;0x400000 0x1000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi<br/>index 4fd33b0fa56e..e3cfd168becc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp110.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp110.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp110.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-cp110.dtsi</a></div><div class='hunk'>@@ -5,8 +5,4 @@</div><div class='ctx'>  * Device Tree file for Marvell Armada CP110.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define CP11X_TYPE cp110</div><div class='del'>-</div><div class='ctx'> #include "armada-cp11x.dtsi"</div><div class='del'>-</div><div class='del'>-#undef CP11X_TYPE</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-cp115.dtsi b/arch/arm64/boot/dts/marvell/armada-cp115.dtsi<br/>index 1d0a9653e681..ec6432c8db7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp115.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp115.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp115.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-cp115.dtsi</a></div><div class='hunk'>@@ -5,8 +5,4 @@</div><div class='ctx'>  * Device Tree file for Marvell Armada CP115.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define CP11X_TYPE cp115</div><div class='del'>-</div><div class='ctx'> #include "armada-cp11x.dtsi"</div><div class='del'>-</div><div class='del'>-#undef CP11X_TYPE</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi<br/>index 7e595ac80043..d9d409eac259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/armada-cp11x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/armada-cp11x.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 	 * The contents of the node are defined below, in order to</div><div class='ctx'> 	 * save one indentation level</div><div class='ctx'> 	 */</div><div class='del'>-	CP11X_NAME: CP11X_NAME { };</div><div class='add'>+	CP11X_NAME: CP11X_NODE_NAME(bus) { };</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * CPs only have one sensor in the thermal IC.</div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 	interrupt-parent = &lt;&amp;CP11X_LABEL(icu_nsr)&gt;;</div><div class='ctx'> 	ranges;</div><div class='ctx'> </div><div class='del'>-	config-space@CP11X_BASE {</div><div class='add'>+	bus@CP11X_BASE {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='hunk'>@@ -202,6 +202,7 @@</div><div class='ctx'> 			CP11X_LABEL(icu_nsr): interrupt-controller@10 {</div><div class='ctx'> 				compatible = "marvell,cp110-icu-nsr";</div><div class='ctx'> 				reg = &lt;0x10 0x20&gt;;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				msi-parent = &lt;&amp;gicp&gt;;</div><div class='hunk'>@@ -347,10 +348,12 @@</div><div class='ctx'> </div><div class='ctx'> 			sata-port@0 {</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			sata-port@1 {</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi b/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi<br/>index ad0ab34b6602..bd42bfbe408b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-cf.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9130-cf.dtsi</a></div><div class='hunk'>@@ -152,11 +152,12 @@</div><div class='ctx'> </div><div class='ctx'> /* SRDS #0 - SATA on M.2 connector */</div><div class='ctx'> &amp;cp0_sata0 {</div><div class='del'>-	phys = &lt;&amp;cp0_comphy0 1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* only port 1 is available */</div><div class='del'>-	/delete-node/ sata-port@0;</div><div class='add'>+	sata-port@1 {</div><div class='add'>+		phys = &lt;&amp;cp0_comphy0 1&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* microSD */</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb-B.dts b/arch/arm64/boot/dts/marvell/cn9130-crb-B.dts<br/>index 0904cb0309ae..34194745f79e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-crb-B.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-crb-B.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-crb-B.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9130-crb-B.dts</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		/* Generic PHY, providing serdes lanes */</div><div class='ctx'> 		phys = &lt;&amp;cp0_comphy2 0&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi<br/>index be56a2336265..50e9e0724828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-db.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9130-db.dtsi</a></div><div class='hunk'>@@ -209,7 +209,6 @@</div><div class='ctx'> 			/* U12 */</div><div class='ctx'> 			cp0_module_expander1: pca9555@21 {</div><div class='ctx'> 				compatible = "nxp,pca9555";</div><div class='del'>-				pinctrl-names = "default";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 				reg = &lt;0x21&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi<br/>index 4676e3488f54..f95202decfce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi</a></div><div class='hunk'>@@ -7,9 +7,6 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "SolidRun CN9130 SoM";</div><div class='del'>-	compatible = "solidrun,cn9130-sr-som", "marvell,cn9130";</div><div class='del'>-</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;cp0_eth0;</div><div class='ctx'> 		ethernet1 = &amp;cp0_eth1;</div><div class='hunk'>@@ -64,6 +61,8 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ap_mmc0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -136,7 +135,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cp0_mdio_pins: cp0-mdio-pins {</div><div class='del'>-			marvell,pins = "mpp40", "mpp41";</div><div class='add'>+			marvell,pins = "mpp0", "mpp1";</div><div class='ctx'> 			marvell,function = "ge";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts b/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts<br/>index b1ea7dcaed17..338853d3b179 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts</a></div><div class='hunk'>@@ -435,7 +435,7 @@</div><div class='ctx'> 	managed = "in-band-status";</div><div class='ctx'> 	phy-mode = "sgmii";</div><div class='ctx'> 	phy = &lt;&amp;cp1_phy0&gt;;</div><div class='del'>-	phys = &lt;&amp;cp0_comphy3 1&gt;;</div><div class='add'>+	phys = &lt;&amp;cp1_comphy3 1&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -444,7 +444,7 @@</div><div class='ctx'> 	managed = "in-band-status";</div><div class='ctx'> 	phy-mode = "sgmii";</div><div class='ctx'> 	phy = &lt;&amp;cp1_phy1&gt;;</div><div class='del'>-	phys = &lt;&amp;cp0_comphy5 2&gt;;</div><div class='add'>+	phys = &lt;&amp;cp1_comphy5 2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -563,11 +563,13 @@</div><div class='ctx'> </div><div class='ctx'> /* SRDS #1 - SATA on M.2 (J44) */</div><div class='ctx'> &amp;cp1_sata0 {</div><div class='del'>-	phys = &lt;&amp;cp1_comphy1 0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* only port 0 is available */</div><div class='del'>-	/delete-node/ sata-port@1;</div><div class='add'>+	sata-port@0 {</div><div class='add'>+		phys = &lt;&amp;cp1_comphy1 0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cp1_syscon0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi<br/>index ad7360c83048..626042fce7e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9131-db.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9131-db.dtsi</a></div><div class='hunk'>@@ -127,6 +127,7 @@</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		/* Generic PHY, providing serdes lanes */</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy5 1&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts<br/>index 0f53745a6fa0..5cf83d8ca1f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-clearfog.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9132-clearfog.dts</a></div><div class='hunk'>@@ -413,7 +413,13 @@</div><div class='ctx'> /* SRDS #0,#1,#2,#3 - PCIe */</div><div class='ctx'> &amp;cp0_pcie0 {</div><div class='ctx'> 	num-lanes = &lt;4&gt;;</div><div class='del'>-	phys = &lt;&amp;cp0_comphy0 0&gt;, &lt;&amp;cp0_comphy1 0&gt;, &lt;&amp;cp0_comphy2 0&gt;, &lt;&amp;cp0_comphy3 0&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * The mvebu-comphy driver does not currently know how to pass correct</div><div class='add'>+	 * lane-count to ATF while configuring the serdes lanes.</div><div class='add'>+	 * Rely on bootloader configuration only.</div><div class='add'>+	 *</div><div class='add'>+	 * phys = &lt;&amp;cp0_comphy0 0&gt;, &lt;&amp;cp0_comphy1 0&gt;, &lt;&amp;cp0_comphy2 0&gt;, &lt;&amp;cp0_comphy3 0&gt;;</div><div class='add'>+	 */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -475,7 +481,13 @@</div><div class='ctx'> /* SRDS #0,#1 - PCIe */</div><div class='ctx'> &amp;cp1_pcie0 {</div><div class='ctx'> 	num-lanes = &lt;2&gt;;</div><div class='del'>-	phys = &lt;&amp;cp1_comphy0 0&gt;, &lt;&amp;cp1_comphy1 0&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * The mvebu-comphy driver does not currently know how to pass correct</div><div class='add'>+	 * lane-count to ATF while configuring the serdes lanes.</div><div class='add'>+	 * Rely on bootloader configuration only.</div><div class='add'>+	 *</div><div class='add'>+	 * phys = &lt;&amp;cp1_comphy0 0&gt;, &lt;&amp;cp1_comphy1 0&gt;;</div><div class='add'>+	 */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -512,10 +524,9 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* only port 1 is available */</div><div class='del'>-	/delete-node/ sata-port@0;</div><div class='del'>-</div><div class='ctx'> 	sata-port@1 {</div><div class='ctx'> 		phys = &lt;&amp;cp1_comphy3 1&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -559,7 +570,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cp2_ethernet {</div><div class='del'>-	status =  "okay";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* SRDS #2 - 5GE */</div><div class='hunk'>@@ -572,7 +583,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cp2_gpio1 {</div><div class='del'>-	pinctrl-names= "default";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;cp2_rsvd9_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 	/* J21 */</div><div class='hunk'>@@ -631,9 +642,8 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	/* only port 1 is available */</div><div class='del'>-	/delete-node/ sata-port@0;</div><div class='del'>-</div><div class='ctx'> 	sata-port@1 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		phys = &lt;&amp;cp2_comphy3 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9132-db.dtsi b/arch/arm64/boot/dts/marvell/cn9132-db.dtsi<br/>index e753cfdac697..f91fc69905b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-db.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9132-db.dtsi</a></div><div class='hunk'>@@ -175,6 +175,7 @@</div><div class='ctx'> 	sata-port@0 {</div><div class='ctx'> 		/* Generic PHY, providing serdes lanes */</div><div class='ctx'> 		phys = &lt;&amp;cp2_comphy2 0&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi<br/>index afc041c1c448..91ba5f7dc9b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi</a></div><div class='hunk'>@@ -137,6 +137,14 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ap_mmc0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;v_1_8&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * Not stable in HS modes - phy needs "more calibration", so disable</div><div class='add'>+	 * UHS (by preventing voltage switch), SDR104, SDR50 and DDR50 modes.</div><div class='add'>+	 */</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -442,7 +450,7 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='del'>-		pinctrl-names  = "default";</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;cp1_tpm_irq_pins&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;cp1_gpio1&gt;;</div><div class='ctx'> 		interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/mmp/Makefile b/arch/arm64/boot/dts/marvell/mmp/Makefile<br/>new file mode 100644<br/>index 000000000000..103175ed63b0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/mmp/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/mmp/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_MMP) += pxa1908-samsung-coreprimevelte.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts<br/>new file mode 100644<br/>index 000000000000..47a4f01a7077<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts</a></div><div class='hunk'>@@ -0,0 +1,331 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#include "pxa1908.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy Core Prime VE LTE";</div><div class='add'>+	compatible = "samsung,coreprimevelte", "marvell,pxa1908";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdh2; /* eMMC */</div><div class='add'>+		mmc1 = &amp;sdh0; /* SD card */</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+</div><div class='add'>+		fb0: framebuffer@17177000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0x17177000 0 (480 * 800 * 4)&gt;;</div><div class='add'>+			width = &lt;480&gt;;</div><div class='add'>+			height = &lt;800&gt;;</div><div class='add'>+			stride = &lt;(480 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Bootloader fills this in */</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@17000000 {</div><div class='add'>+			reg = &lt;0 0x17000000 0 0x1800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu@9000000 {</div><div class='add'>+			reg = &lt;0 0x9000000 0 0x1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Communications processor, aka modem */</div><div class='add'>+		cp@5000000 {</div><div class='add'>+			reg = &lt;0 0x5000000 0 0x3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cm3@a000000 {</div><div class='add'>+			reg = &lt;0 0xa000000 0 0x80000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		seclog@8000000 {</div><div class='add'>+			reg = &lt;0 0x8000000 0 0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ramoops@8100000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0 0x8100000 0 0x40000&gt;;</div><div class='add'>+			record-size = &lt;0x8000&gt;;</div><div class='add'>+			console-size = &lt;0x20000&gt;;</div><div class='add'>+			max-reason = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-muic {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		sda-gpios = &lt;&amp;gpio 30 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;gpio 29 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		i2c-gpio,delay-us = &lt;3&gt;;</div><div class='add'>+		i2c-gpio,timeout-ms = &lt;100&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c_muic_pins&gt;;</div><div class='add'>+</div><div class='add'>+		muic: extcon@14 {</div><div class='add'>+			compatible = "siliconmitus,sm5504-muic";</div><div class='add'>+			reg = &lt;0x14&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_pins&gt;;</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		key-home {</div><div class='add'>+			label = "Home";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 50 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-voldown {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmx {</div><div class='add'>+	pinctrl-single,gpio-range = &lt;&amp;range 55 55 0&gt;,</div><div class='add'>+				    &lt;&amp;range 110 32 0&gt;,</div><div class='add'>+				    &lt;&amp;range 52 1 0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;board_pins_0 &amp;board_pins_1 &amp;board_pins_2&gt;;</div><div class='add'>+</div><div class='add'>+	board_pins_0: board-pins-0 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x160 0</div><div class='add'>+			0x164 0</div><div class='add'>+			0x168 0</div><div class='add'>+			0x16c 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0x8000 0x8000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0x8000 0x8000 0 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0x288 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	board_pins_1: board-pins-1 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x44 1</div><div class='add'>+			0x48 1</div><div class='add'>+			0x20 1</div><div class='add'>+			0x18 1</div><div class='add'>+			0x14 1</div><div class='add'>+			0x10 1</div><div class='add'>+			0xc 1</div><div class='add'>+			0x8 1</div><div class='add'>+			0x68 1</div><div class='add'>+			0x58 0</div><div class='add'>+			0x54 0</div><div class='add'>+			0x7c 0</div><div class='add'>+			0x6c 0</div><div class='add'>+			0x70 0</div><div class='add'>+			0x4c 1</div><div class='add'>+			0x50 1</div><div class='add'>+			0xac 0</div><div class='add'>+			0x90 0</div><div class='add'>+			0x8c 0</div><div class='add'>+			0x88 0</div><div class='add'>+			0x84 0</div><div class='add'>+			0xc8 0</div><div class='add'>+			0x128 0</div><div class='add'>+			0x190 0</div><div class='add'>+			0x194 0</div><div class='add'>+			0x1a0 0</div><div class='add'>+			0x114 0</div><div class='add'>+			0x118 0</div><div class='add'>+			0x1d8 0</div><div class='add'>+			0x1e4 0</div><div class='add'>+			0xe8 0</div><div class='add'>+			0x100 0</div><div class='add'>+			0x204 0</div><div class='add'>+			0x210 0</div><div class='add'>+			0x218 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0xc000 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0x8000 0xa000 0x8000 0xc000&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0x288 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	board_pins_2: board-pins-2 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x260 0</div><div class='add'>+			0x264 0</div><div class='add'>+			0x268 0</div><div class='add'>+			0x26c 0</div><div class='add'>+			0x270 0</div><div class='add'>+			0x274 0</div><div class='add'>+			0x78 0</div><div class='add'>+			0x74 0</div><div class='add'>+			0xb0 1</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0 0xa000 0 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x198 6</div><div class='add'>+			0x19c 6</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0 0xa000 0 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys_pins: gpio-keys-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x11c 0</div><div class='add'>+			0x120 0</div><div class='add'>+			0x1a4 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0xc000 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0x8000 0xa0000 0x8000 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_muic_pins: i2c-muic-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x154 0</div><div class='add'>+			0x150 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0 0xa000 0 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0x288 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdh0_pins_0: sdh0-pins-0 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x108 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0xc000 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0x8000 0xa000 0x8000 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdh0_pins_1: sdh0-pins-1 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0x94 0</div><div class='add'>+			0x98 0</div><div class='add'>+			0x9c 0</div><div class='add'>+			0xa0 0</div><div class='add'>+			0xa4 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x800 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0xc000 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0x8000 0xa000 0x8000 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdh0_pins_2: sdh0-pins-2 {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			0xa8 0</div><div class='add'>+		&gt;;</div><div class='add'>+		pinctrl-single,drive-strength = &lt;0x1000 0x1800&gt;;</div><div class='add'>+		pinctrl-single,bias-pullup = &lt;0 0xc000 0 0xc000&gt;;</div><div class='add'>+		pinctrl-single,bias-pulldown = &lt;0 0xa000 0 0xa000&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt = &lt;0 0x30&gt;;</div><div class='add'>+		pinctrl-single,input-schmitt-enable = &lt;0x40 0 0x40 0x40&gt;;</div><div class='add'>+		pinctrl-single,low-power-mode = &lt;0x208 0x388&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;twsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;twsi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;twsi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;twsi3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	extcon = &lt;&amp;muic&gt;, &lt;&amp;muic&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdh2 {</div><div class='add'>+	/* Disabled for now because initialization fails with -ETIMEDOUT. */</div><div class='add'>+	status = "disabled";</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdh0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdh0_pins_0 &amp;sdh0_pins_1 &amp;sdh0_pins_2&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio 11 0&gt;;</div><div class='add'>+	cd-inverted;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	wp-inverted;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi<br/>new file mode 100644<br/>index 000000000000..cf2b9109688c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi</a></div><div class='hunk'>@@ -0,0 +1,300 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/marvell,pxa1908.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Marvell Armada PXA1908";</div><div class='add'>+	compatible = "marvell,pxa1908";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0 0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0 1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0 2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0 3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			&lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			&lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			&lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			&lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		smmu: iommu@c0010000 {</div><div class='add'>+			compatible = "arm,mmu-400";</div><div class='add'>+			reg = &lt;0 0xc0010000 0 0x10000&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@d1df9000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0 0xd1df9000 0 0x1000&gt;,</div><div class='add'>+				&lt;0 0xd1dfa000 0 0x2000&gt;,</div><div class='add'>+				/* The subsequent registers are guesses. */</div><div class='add'>+				&lt;0 0xd1dfc000 0 0x2000&gt;,</div><div class='add'>+				&lt;0 0xd1dfe000 0 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb@d4000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0 0xd4000000 0 0x200000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0 0xd4000000 0x200000&gt;;</div><div class='add'>+</div><div class='add'>+			pdma: dma-controller@0 {</div><div class='add'>+				compatible = "marvell,pdma-1.0";</div><div class='add'>+				reg = &lt;0 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dma-channels = &lt;30&gt;;</div><div class='add'>+				#dma-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi1: i2c@10800 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x10800 0x64&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_TWSI1&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi0: i2c@11000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x11000 0x64&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_TWSI0&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi3: i2c@13800 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x13800 0x64&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_TWSI3&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apbc: clock-controller@15000 {</div><div class='add'>+				compatible = "marvell,pxa1908-apbc";</div><div class='add'>+				reg = &lt;0x15000 0x1000&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0: serial@17000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x17000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_UART0&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: serial@18000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x18000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_UART1&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio: gpio@19000 {</div><div class='add'>+				compatible = "marvell,mmp-gpio";</div><div class='add'>+				reg = &lt;0x19000 0x800&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbc PXA1908_CLK_GPIO&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "gpio_mux";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				ranges = &lt;0 0x19000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+				gpio@0 {</div><div class='add'>+					reg = &lt;0x0 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio@4 {</div><div class='add'>+					reg = &lt;0x4 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio@8 {</div><div class='add'>+					reg = &lt;0x8 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio@100 {</div><div class='add'>+					reg = &lt;0x100 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmx: pinmux@1e000 {</div><div class='add'>+				compatible = "marvell,pxa1908-padconf", "pinconf-single";</div><div class='add'>+				reg = &lt;0x1e000 0x330&gt;;</div><div class='add'>+</div><div class='add'>+				#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+				pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+				pinctrl-single,function-mask = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+				range: gpio-range {</div><div class='add'>+					#pinctrl-single,gpio-range-cells = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@36000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart", "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x36000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbcp PXA1908_CLK_UART2&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi2: i2c@37000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x37000 0x64&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apbcp PXA1908_CLK_TWSI2&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apbcp: clock-controller@3b000 {</div><div class='add'>+				compatible = "marvell,pxa1908-apbcp";</div><div class='add'>+				reg = &lt;0x3b000 0x1000&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mpmu: clock-controller@50000 {</div><div class='add'>+				compatible = "marvell,pxa1908-mpmu";</div><div class='add'>+				reg = &lt;0x50000 0x1000&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		axi@d4200000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0 0xd4200000 0 0x200000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0 0xd4200000 0x200000&gt;;</div><div class='add'>+</div><div class='add'>+			usbphy: phy@7000 {</div><div class='add'>+				compatible = "marvell,pxa1928-usb-phy";</div><div class='add'>+				reg = &lt;0x7000 0x200&gt;;</div><div class='add'>+				clocks = &lt;&amp;apmu PXA1908_CLK_USB&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb: usb@8000 {</div><div class='add'>+				compatible = "chipidea,usb2";</div><div class='add'>+				reg = &lt;0x8000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apmu PXA1908_CLK_USB&gt;;</div><div class='add'>+				phys = &lt;&amp;usbphy&gt;;</div><div class='add'>+				phy-names = "usb-phy";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdh0: mmc@80000 {</div><div class='add'>+				compatible = "mrvl,pxav3-mmc";</div><div class='add'>+				reg = &lt;0x80000 0x120&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apmu PXA1908_CLK_SDH0&gt;;</div><div class='add'>+				clock-names = "io";</div><div class='add'>+				mrvl,clk-delay-cycles = &lt;31&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdh1: mmc@80800 {</div><div class='add'>+				compatible = "mrvl,pxav3-mmc";</div><div class='add'>+				reg = &lt;0x80800 0x120&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apmu PXA1908_CLK_SDH1&gt;;</div><div class='add'>+				clock-names = "io";</div><div class='add'>+				mrvl,clk-delay-cycles = &lt;31&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdh2: mmc@81000 {</div><div class='add'>+				compatible = "mrvl,pxav3-mmc";</div><div class='add'>+				reg = &lt;0x81000 0x120&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;apmu PXA1908_CLK_SDH2&gt;;</div><div class='add'>+				clock-names = "io";</div><div class='add'>+				mrvl,clk-delay-cycles = &lt;31&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			apmu: clock-controller@82800 {</div><div class='add'>+				compatible = "marvell,pxa1908-apmu";</div><div class='add'>+				reg = &lt;0x82800 0x400&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile<br/>index 8fd7b2bb7a15..a4df4c21399e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/Makefile</a></div><div class='hunk'>@@ -17,10 +17,14 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-mini.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sata.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-2g5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-emmc.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-sd.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb</div><div class='hunk'>@@ -55,24 +59,37 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-chinchou-sku0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-chinchou-sku1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-chinchou-sku16.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393216.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393217.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393218.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-ponyta-sku0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-ponyta-sku1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-rusty-sku196608.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-squirtle.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-starmie-sku0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-starmie-sku1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-steelix-sku131072.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-steelix-sku131073.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacool-sku327681.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacool-sku327683.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacruel-sku262144.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacruel-sku262148.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-voltorb-sku589824.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-voltorb-sku589825.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-voltorb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-evb.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku4.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku6.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku7.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r1.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r5-sku2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-spherion-r0.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-spherion-r4.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-dojo-r1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r1.dtb</div><div class='hunk'>@@ -81,12 +98,17 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8370-genio-510-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-genio-1200-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8390-genio-700-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-kontron-3-5-sbc-i1200.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l-8-hd-panel.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb</div><div class='ctx'> </div><div class='ctx'> # Device tree overlays support</div><div class='ctx'> DTC_FLAGS_mt7986a-bananapi-bpi-r3 := -@</div><div class='ctx'> DTC_FLAGS_mt7986a-bananapi-bpi-r3-mini := -@</div><div class='add'>+DTC_FLAGS_mt7988a-bananapi-bpi-r4 := -@</div><div class='add'>+DTC_FLAGS_mt7988a-bananapi-bpi-r4-2g5 := -@</div><div class='add'>+DTC_FLAGS_mt8395-radxa-nio-12l := -@</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts<br/>index c84c47c1352f..0449686bd06b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt2712-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt2712-evb.dts</a></div><div class='hunk'>@@ -115,6 +115,7 @@</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;eth_default&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;eth_sleep&gt;;</div><div class='add'>+	mediatek,mac-wol;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6331.dtsi b/arch/arm64/boot/dts/mediatek/mt6331.dtsi<br/>index d89858c73ab1..243afbffa21f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6331.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6331.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6331.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6331.dtsi</a></div><div class='hunk'>@@ -6,12 +6,12 @@</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;pwrap {</div><div class='del'>-	pmic: mt6331 {</div><div class='add'>+	pmic: pmic {</div><div class='ctx'> 		compatible = "mediatek,mt6331";</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		mt6331regulator: mt6331regulator {</div><div class='add'>+		mt6331regulator: regulators {</div><div class='ctx'> 			compatible = "mediatek,mt6331-regulator";</div><div class='ctx'> </div><div class='ctx'> 			mt6331_vdvfs11_reg: buck-vdvfs11 {</div><div class='hunk'>@@ -258,7 +258,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6331_vdig18_reg: ldo-vdig18 {</div><div class='del'>-				regulator-name = "dvdd18_dig";</div><div class='add'>+				regulator-name = "vdig18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;0&gt;;</div><div class='hunk'>@@ -266,11 +266,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6331rtc: mt6331rtc {</div><div class='add'>+		mt6331rtc: rtc {</div><div class='ctx'> 			compatible = "mediatek,mt6331-rtc";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6331keys: mt6331keys {</div><div class='add'>+		mt6331keys: keys {</div><div class='ctx'> 			compatible = "mediatek,mt6331-keys";</div><div class='ctx'> 			power {</div><div class='ctx'> 				linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6357.dtsi b/arch/arm64/boot/dts/mediatek/mt6357.dtsi<br/>index 5fafa842d312..dca4e5c3d8e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6357.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6357.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6357.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6357.dtsi</a></div><div class='hunk'>@@ -60,7 +60,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vfe28_reg: ldo-vfe28 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vfe28";</div><div class='ctx'> 				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -75,7 +74,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vrf18_reg: ldo-vrf18 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vrf18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -83,7 +81,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vrf12_reg: ldo-vrf12 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vrf12";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -112,7 +109,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vcn28_reg: ldo-vcn28 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vcn28";</div><div class='ctx'> 				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -120,7 +116,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vcn18_reg: ldo-vcn18 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vcn18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -142,7 +137,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vcamio_reg: ldo-vcamio18 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vcamio";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -175,7 +169,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vaux18_reg: ldo-vaux18 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vaux18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -183,7 +176,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vaud28_reg: ldo-vaud28 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vaud28";</div><div class='ctx'> 				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -191,7 +183,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vio28_reg: ldo-vio28 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vio28";</div><div class='ctx'> 				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -199,7 +190,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6357_vio18_reg: ldo-vio18 {</div><div class='del'>-				compatible = "regulator-fixed";</div><div class='ctx'> 				regulator-name = "vio18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6358.dtsi b/arch/arm64/boot/dts/mediatek/mt6358.dtsi<br/>index 641d452fbc08..e23672a2eea4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6358.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6358.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6358.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6358.dtsi</a></div><div class='hunk'>@@ -15,12 +15,12 @@</div><div class='ctx'> 			#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6358codec: mt6358codec {</div><div class='add'>+		mt6358codec: audio-codec {</div><div class='ctx'> 			compatible = "mediatek,mt6358-sound";</div><div class='ctx'> 			mediatek,dmic-mode = &lt;0&gt;; /* two-wires */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6358regulator: mt6358regulator {</div><div class='add'>+		mt6358regulator: regulators {</div><div class='ctx'> 			compatible = "mediatek,mt6358-regulator";</div><div class='ctx'> </div><div class='ctx'> 			mt6358_vdram1_reg: buck_vdram1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6359.dtsi b/arch/arm64/boot/dts/mediatek/mt6359.dtsi<br/>index 8e1b8c85c6ed..467d8a4c2aa7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6359.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6359.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6359.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6359.dtsi</a></div><div class='hunk'>@@ -8,16 +8,20 @@</div><div class='ctx'> 		compatible = "mediatek,mt6359";</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		pmic_adc: adc {</div><div class='ctx'> 			compatible = "mediatek,mt6359-auxadc";</div><div class='ctx'> 			#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6359codec: mt6359codec {</div><div class='add'>+		mt6359codec: audio-codec {</div><div class='add'>+			compatible = "mediatek,mt6359-codec";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='add'>+			compatible = "mediatek,mt6359-regulator";</div><div class='add'>+</div><div class='ctx'> 			mt6359_vs1_buck_reg: buck_vs1 {</div><div class='ctx'> 				regulator-name = "vs1";</div><div class='ctx'> 				regulator-min-microvolt = &lt;800000&gt;;</div><div class='hunk'>@@ -296,7 +300,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mt6359rtc: mt6359rtc {</div><div class='add'>+		mt6359rtc: rtc {</div><div class='ctx'> 			compatible = "mediatek,mt6358-rtc";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6755.dtsi b/arch/arm64/boot/dts/mediatek/mt6755.dtsi<br/>index b55d3fac9bd4..8da5c0a56a02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6755.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6755.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6755.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6755.dtsi</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sysirq: intpol-controller@10200620 {</div><div class='add'>+	sysirq: interrupt-controller@10200620 {</div><div class='ctx'> 		compatible = "mediatek,mt6755-sysirq",</div><div class='ctx'> 			     "mediatek,mt6577-sysirq";</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi<br/>index 5c579e88e749..70f3375916e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6779.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6779.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6779.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6779.dtsi</a></div><div class='hunk'>@@ -138,7 +138,7 @@</div><div class='ctx'> </div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sysirq: intpol-controller@c53a650 {</div><div class='add'>+		sysirq: interrupt-controller@c53a650 {</div><div class='ctx'> 			compatible = "mediatek,mt6779-sysirq",</div><div class='ctx'> 				     "mediatek,mt6577-sysirq";</div><div class='ctx'> 			interrupt-controller;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts<br/>index 91de920c2245..fccb948cfa45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts</a></div><div class='hunk'>@@ -212,7 +212,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	/* eMMC controller */</div><div class='del'>-	mediatek,latch-ck = &lt;0x14&gt;; /* hs400 */</div><div class='add'>+	mediatek,latch-ck = &lt;4&gt;; /* hs400 */</div><div class='ctx'> 	mediatek,hs200-cmd-int-delay = &lt;1&gt;;</div><div class='ctx'> 	mediatek,hs400-cmd-int-delay = &lt;1&gt;;</div><div class='ctx'> 	mediatek,hs400-ds-dly3 = &lt;0x1a&gt;;</div><div class='hunk'>@@ -227,6 +227,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc1 {</div><div class='ctx'> 	/* MicroSD card slot */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_pins_default&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;mt6331_vmc_reg&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;mt6331_vmch_reg&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -234,6 +236,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mmc2 {</div><div class='ctx'> 	/* SDIO WiFi on MMC2 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc2_pins_default&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;mt6331_vmc_reg&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;mt6331_vmch_reg&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -311,6 +315,40 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mmc1_pins_default: microsd-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO171__FUNC_MSDC1_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO172__FUNC_MSDC1_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO173__FUNC_MSDC1_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO174__FUNC_MSDC1_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO170__FUNC_MSDC1_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO175__FUNC_MSDC1_CLK&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc2_pins_default: sdio-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO100__FUNC_MSDC2_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO101__FUNC_MSDC2_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO102__FUNC_MSDC2_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO103__FUNC_MSDC2_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO105__FUNC_MSDC2_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO104__FUNC_MSDC2_CLK&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	nfc_pins: nfc-pins {</div><div class='ctx'> 		pins-irq {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO3__FUNC_GPIO3&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi<br/>index e5e269a660b1..58833e5135c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6795.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6795.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6795.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6795.dtsi</a></div><div class='hunk'>@@ -404,7 +404,7 @@</div><div class='ctx'> 			clock-names = "spi", "wrap";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sysirq: intpol-controller@10200620 {</div><div class='add'>+		sysirq: interrupt-controller@10200620 {</div><div class='ctx'> 			compatible = "mediatek,mt6795-sysirq",</div><div class='ctx'> 				     "mediatek,mt6577-sysirq";</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -427,6 +427,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_M4U&gt;;</div><div class='ctx'> 			clock-names = "bclk";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			mediatek,infracfg = &lt;&amp;infracfg&gt;;</div><div class='ctx'> 			mediatek,larbs = &lt;&amp;larb0 &amp;larb1 &amp;larb2 &amp;larb3&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT6795_POWER_DOMAIN_MM&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi<br/>index 0e9d11b4585b..8ac98a378fd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6797.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt6797.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6797.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6797.dtsi</a></div><div class='hunk'>@@ -135,71 +135,71 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		uart0_pins_a: uart0 {</div><div class='del'>-			pins0 {</div><div class='add'>+		uart0_pins_a: uart0-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO234__FUNC_UTXD0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO235__FUNC_URXD0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		uart1_pins_a: uart1 {</div><div class='del'>-			pins1 {</div><div class='add'>+		uart1_pins_a: uart1-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO232__FUNC_URXD1&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO233__FUNC_UTXD1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c0_pins_a: i2c0 {</div><div class='del'>-			pins0 {</div><div class='add'>+		i2c0_pins_a: i2c0-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO37__FUNC_SCL0_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO38__FUNC_SDA0_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c1_pins_a: i2c1 {</div><div class='del'>-			pins1 {</div><div class='add'>+		i2c1_pins_a: i2c1-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO55__FUNC_SCL1_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO56__FUNC_SDA1_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c2_pins_a: i2c2 {</div><div class='del'>-			pins2 {</div><div class='add'>+		i2c2_pins_a: i2c2-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO96__FUNC_SCL2_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO95__FUNC_SDA2_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c3_pins_a: i2c3 {</div><div class='del'>-			pins3 {</div><div class='add'>+		i2c3_pins_a: i2c3-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO75__FUNC_SDA3_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO74__FUNC_SCL3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c4_pins_a: i2c4 {</div><div class='del'>-			pins4 {</div><div class='add'>+		i2c4_pins_a: i2c4-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO238__FUNC_SDA4_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO239__FUNC_SCL4_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c5_pins_a: i2c5 {</div><div class='del'>-			pins5 {</div><div class='add'>+		i2c5_pins_a: i2c5-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO240__FUNC_SDA5_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO241__FUNC_SCL5_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c6_pins_a: i2c6 {</div><div class='del'>-			pins6 {</div><div class='add'>+		i2c6_pins_a: i2c6-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO152__FUNC_SDA6_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO151__FUNC_SCL6_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c7_pins_a: i2c7 {</div><div class='del'>-			pins7 {</div><div class='add'>+		i2c7_pins_a: i2c7-pins {</div><div class='add'>+			pins-bus {</div><div class='ctx'> 				pinmux = &lt;MT6797_GPIO154__FUNC_SDA7_0&gt;,</div><div class='ctx'> 					 &lt;MT6797_GPIO153__FUNC_SCL7_0&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -228,7 +228,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sysirq: intpol-controller@10200620 {</div><div class='add'>+	sysirq: interrupt-controller@10200620 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-sysirq",</div><div class='ctx'> 			     "mediatek,mt6577-sysirq";</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -285,7 +285,6 @@</div><div class='ctx'> 	i2c0: i2c@11007000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11007000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000100 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -301,7 +300,6 @@</div><div class='ctx'> 	i2c1: i2c@11008000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;1&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11008000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000180 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -317,7 +315,6 @@</div><div class='ctx'> 	i2c8: i2c@11009000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;8&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11009000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000200 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -334,7 +331,6 @@</div><div class='ctx'> 	i2c9: i2c@1100d000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;9&gt;;</div><div class='ctx'> 		reg = &lt;0 0x1100d000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000280 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -351,7 +347,6 @@</div><div class='ctx'> 	i2c6: i2c@1100e000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;6&gt;;</div><div class='ctx'> 		reg = &lt;0 0x1100e000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000500 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -367,7 +362,6 @@</div><div class='ctx'> 	i2c7: i2c@11010000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;7&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11010000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000580 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -383,7 +377,6 @@</div><div class='ctx'> 	i2c4: i2c@11011000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;4&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11011000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000300 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -399,7 +392,6 @@</div><div class='ctx'> 	i2c2: i2c@11013000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;2&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11013000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000400 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -416,7 +408,6 @@</div><div class='ctx'> 	i2c3: i2c@11014000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;3&gt;;</div><div class='ctx'> 		reg = &lt;0 0x11014000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000480 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='hunk'>@@ -433,7 +424,6 @@</div><div class='ctx'> 	i2c5: i2c@1101c000 {</div><div class='ctx'> 		compatible = "mediatek,mt6797-i2c",</div><div class='ctx'> 			     "mediatek,mt6577-i2c";</div><div class='del'>-		id = &lt;5&gt;;</div><div class='ctx'> 		reg = &lt;0 0x1101c000 0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0 0x11000380 0 0x80&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h b/arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..982bc95c471c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt6893-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,1356 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2019 MediaTek Inc.</div><div class='add'>+ * Copyright (c) 2025 Collabora Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MT6893_PINFUNC_H</div><div class='add'>+#define __MT6893_PINFUNC_H</div><div class='add'>+</div><div class='add'>+#include "mt65xx.h"</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_SPI6_CLK (MTK_PIN_NO(0) | 1)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_I2S5_MCK (MTK_PIN_NO(0) | 2)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_PWM_0 (MTK_PIN_NO(0) | 3)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_MD_INT0 (MTK_PIN_NO(0) | 4)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_TP_GPIO0_AO (MTK_PIN_NO(0) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_SPI6_CSB (MTK_PIN_NO(1) | 1)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_I2S5_BCK (MTK_PIN_NO(1) | 2)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_PWM_1 (MTK_PIN_NO(1) | 3)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(1) | 4)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_TP_GPIO1_AO (MTK_PIN_NO(1) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_SPI6_MI (MTK_PIN_NO(2) | 1)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_I2S5_LRCK (MTK_PIN_NO(2) | 2)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_PWM_2 (MTK_PIN_NO(2) | 3)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(2) | 4)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_TP_GPIO2_AO (MTK_PIN_NO(2) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_SPI6_MO (MTK_PIN_NO(3) | 1)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_I2S5_DO (MTK_PIN_NO(3) | 2)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_PWM_3 (MTK_PIN_NO(3) | 3)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_CLKM0 (MTK_PIN_NO(3) | 4)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_TP_GPIO3_AO (MTK_PIN_NO(3) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_SPI7_A_CLK (MTK_PIN_NO(4) | 1)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_I2S2_MCK (MTK_PIN_NO(4) | 2)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_DMIC1_CLK (MTK_PIN_NO(4) | 3)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_PCM1_DI (MTK_PIN_NO(4) | 4)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_TP_GPIO4_AO (MTK_PIN_NO(4) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_SPI7_A_CSB (MTK_PIN_NO(5) | 1)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_I2S2_BCK (MTK_PIN_NO(5) | 2)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_DMIC1_DAT (MTK_PIN_NO(5) | 3)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_PCM1_CLK (MTK_PIN_NO(5) | 4)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_TP_GPIO5_AO (MTK_PIN_NO(5) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_SPI7_A_MI (MTK_PIN_NO(6) | 1)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_I2S2_LRCK (MTK_PIN_NO(6) | 2)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_DMIC_CLK (MTK_PIN_NO(6) | 3)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_PCM1_SYNC (MTK_PIN_NO(6) | 4)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_TP_GPIO6_AO (MTK_PIN_NO(6) | 5)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(6) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_SPI7_A_MO (MTK_PIN_NO(7) | 1)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_I2S2_DI (MTK_PIN_NO(7) | 2)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_DMIC_DAT (MTK_PIN_NO(7) | 3)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_PCM1_DO0 (MTK_PIN_NO(7) | 4)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_TP_GPIO7_AO (MTK_PIN_NO(7) | 5)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_WIFI_TXD (MTK_PIN_NO(7) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_SRCLKENAI1 (MTK_PIN_NO(8) | 1)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_I2S2_DI2 (MTK_PIN_NO(8) | 2)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_KPCOL2 (MTK_PIN_NO(8) | 3)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_PCM1_DO1 (MTK_PIN_NO(8) | 4)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_CLKM1 (MTK_PIN_NO(8) | 5)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_CONN_BT_TXD (MTK_PIN_NO(8) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_SRCLKENAI0 (MTK_PIN_NO(9) | 1)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(9) | 2)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_KPROW2 (MTK_PIN_NO(9) | 3)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_PCM1_DO2 (MTK_PIN_NO(9) | 4)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_CLKM3 (MTK_PIN_NO(9) | 5)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_CMMCLK4 (MTK_PIN_NO(9) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_MSDC1_CLK_A (MTK_PIN_NO(10) | 1)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_SPI4_B_CLK (MTK_PIN_NO(10) | 2)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_I2S8_MCK (MTK_PIN_NO(10) | 3)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_DSI1_TE (MTK_PIN_NO(10) | 4)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_MD_INT0 (MTK_PIN_NO(10) | 5)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_TP_GPIO0_AO (MTK_PIN_NO(10) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_MSDC1_CMD_A (MTK_PIN_NO(11) | 1)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_SPI4_B_CSB (MTK_PIN_NO(11) | 2)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_I2S8_BCK (MTK_PIN_NO(11) | 3)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_LCM1_RST (MTK_PIN_NO(11) | 4)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(11) | 5)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_TP_GPIO1_AO (MTK_PIN_NO(11) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_MSDC1_DAT3_A (MTK_PIN_NO(12) | 1)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_SPI4_B_MI (MTK_PIN_NO(12) | 2)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_I2S8_LRCK (MTK_PIN_NO(12) | 3)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_DMIC1_CLK (MTK_PIN_NO(12) | 4)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(12) | 5)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_TP_GPIO2_AO (MTK_PIN_NO(12) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_MSDC1_DAT0_A (MTK_PIN_NO(13) | 1)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_SPI4_B_MO (MTK_PIN_NO(13) | 2)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_I2S8_DI (MTK_PIN_NO(13) | 3)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_DMIC1_DAT (MTK_PIN_NO(13) | 4)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_ANT_SEL10 (MTK_PIN_NO(13) | 5)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_TP_GPIO3_AO (MTK_PIN_NO(13) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_MSDC1_DAT2_A (MTK_PIN_NO(14) | 1)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_SPI5_C_CLK (MTK_PIN_NO(14) | 2)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_I2S9_MCK (MTK_PIN_NO(14) | 3)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_IDDIG (MTK_PIN_NO(14) | 4)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_ANT_SEL11 (MTK_PIN_NO(14) | 5)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_TP_GPIO4_AO (MTK_PIN_NO(14) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_MSDC1_DAT1_A (MTK_PIN_NO(15) | 1)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_SPI5_C_CSB (MTK_PIN_NO(15) | 2)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_I2S9_BCK (MTK_PIN_NO(15) | 3)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_USB_DRVVBUS (MTK_PIN_NO(15) | 4)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_ANT_SEL12 (MTK_PIN_NO(15) | 5)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_TP_GPIO5_AO (MTK_PIN_NO(15) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_SRCLKENAI1 (MTK_PIN_NO(16) | 1)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_SPI5_C_MI (MTK_PIN_NO(16) | 2)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_I2S9_LRCK (MTK_PIN_NO(16) | 3)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_KPCOL2 (MTK_PIN_NO(16) | 4)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(16) | 5)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_TP_GPIO6_AO (MTK_PIN_NO(16) | 6)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_DBG_MON_A30 (MTK_PIN_NO(16) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_SRCLKENAI0 (MTK_PIN_NO(17) | 1)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_SPI5_C_MO (MTK_PIN_NO(17) | 2)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_I2S9_DO (MTK_PIN_NO(17) | 3)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_KPROW2 (MTK_PIN_NO(17) | 4)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(17) | 5)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_TP_GPIO7_AO (MTK_PIN_NO(17) | 6)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_DBG_MON_A31 (MTK_PIN_NO(17) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_DP_TX_HPD (MTK_PIN_NO(18) | 1)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_SPI4_C_MI (MTK_PIN_NO(18) | 2)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_SPI1_B_MI (MTK_PIN_NO(18) | 3)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(18) | 4)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_ANT_SEL10 (MTK_PIN_NO(18) | 5)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_MD_INT0 (MTK_PIN_NO(18) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO19__FUNC_GPIO19 (MTK_PIN_NO(19) | 0)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_SRCLKENAI1 (MTK_PIN_NO(19) | 1)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_SPI4_C_MO (MTK_PIN_NO(19) | 2)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_SPI1_B_MO (MTK_PIN_NO(19) | 3)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(19) | 4)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_ANT_SEL11 (MTK_PIN_NO(19) | 5)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(19) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO20__FUNC_GPIO20 (MTK_PIN_NO(20) | 0)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_SRCLKENAI0 (MTK_PIN_NO(20) | 1)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_SPI4_C_CLK (MTK_PIN_NO(20) | 2)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_SPI1_B_CLK (MTK_PIN_NO(20) | 3)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_PWM_3 (MTK_PIN_NO(20) | 4)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_ANT_SEL12 (MTK_PIN_NO(20) | 5)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(20) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO21__FUNC_GPIO21 (MTK_PIN_NO(21) | 0)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_DP_TX_HPD (MTK_PIN_NO(21) | 1)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_SPI4_C_CSB (MTK_PIN_NO(21) | 2)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_SPI1_B_CSB (MTK_PIN_NO(21) | 3)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_I2S7_MCK (MTK_PIN_NO(21) | 4)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_I2S9_MCK (MTK_PIN_NO(21) | 5)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_IDDIG (MTK_PIN_NO(21) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO22__FUNC_GPIO22 (MTK_PIN_NO(22) | 0)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_LCM1_RST (MTK_PIN_NO(22) | 1)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_SPI0_C_CLK (MTK_PIN_NO(22) | 2)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_SPI7_B_CLK (MTK_PIN_NO(22) | 3)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_I2S7_BCK (MTK_PIN_NO(22) | 4)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_I2S9_BCK (MTK_PIN_NO(22) | 5)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_SCL13 (MTK_PIN_NO(22) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO23__FUNC_GPIO23 (MTK_PIN_NO(23) | 0)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_DSI1_TE (MTK_PIN_NO(23) | 1)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_SPI0_C_CSB (MTK_PIN_NO(23) | 2)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_SPI7_B_CSB (MTK_PIN_NO(23) | 3)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_I2S7_LRCK (MTK_PIN_NO(23) | 4)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_I2S9_LRCK (MTK_PIN_NO(23) | 5)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_SDA13 (MTK_PIN_NO(23) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO24__FUNC_GPIO24 (MTK_PIN_NO(24) | 0)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_SRCLKENAI1 (MTK_PIN_NO(24) | 1)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_SPI0_C_MI (MTK_PIN_NO(24) | 2)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_SPI7_B_MI (MTK_PIN_NO(24) | 3)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_I2S6_DI (MTK_PIN_NO(24) | 4)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_I2S8_DI (MTK_PIN_NO(24) | 5)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_SCL_6306 (MTK_PIN_NO(24) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO25__FUNC_GPIO25 (MTK_PIN_NO(25) | 0)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_SRCLKENAI0 (MTK_PIN_NO(25) | 1)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_SPI0_C_MO (MTK_PIN_NO(25) | 2)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_SPI7_B_MO (MTK_PIN_NO(25) | 3)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_I2S7_DO (MTK_PIN_NO(25) | 4)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_I2S9_DO (MTK_PIN_NO(25) | 5)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_SDA_6306 (MTK_PIN_NO(25) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO26__FUNC_GPIO26 (MTK_PIN_NO(26) | 0)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_PWM_2 (MTK_PIN_NO(26) | 1)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_CLKM0 (MTK_PIN_NO(26) | 2)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_USB_DRVVBUS (MTK_PIN_NO(26) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_PWM_3 (MTK_PIN_NO(27) | 1)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_CLKM1 (MTK_PIN_NO(27) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_PWM_0 (MTK_PIN_NO(28) | 1)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_CLKM2 (MTK_PIN_NO(28) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO29__FUNC_GPIO29 (MTK_PIN_NO(29) | 0)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_PWM_1 (MTK_PIN_NO(29) | 1)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_CLKM3 (MTK_PIN_NO(29) | 2)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_DSI1_TE (MTK_PIN_NO(29) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO30__FUNC_GPIO30 (MTK_PIN_NO(30) | 0)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_PWM_2 (MTK_PIN_NO(30) | 1)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_CLKM0 (MTK_PIN_NO(30) | 2)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_LCM1_RST (MTK_PIN_NO(30) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO31__FUNC_GPIO31 (MTK_PIN_NO(31) | 0)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_I2S3_MCK (MTK_PIN_NO(31) | 1)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_I2S1_MCK (MTK_PIN_NO(31) | 2)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_I2S5_MCK (MTK_PIN_NO(31) | 3)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_SRCLKENAI0 (MTK_PIN_NO(31) | 4)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_I2S0_MCK (MTK_PIN_NO(31) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO32__FUNC_GPIO32 (MTK_PIN_NO(32) | 0)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_I2S3_BCK (MTK_PIN_NO(32) | 1)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_I2S1_BCK (MTK_PIN_NO(32) | 2)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_I2S5_BCK (MTK_PIN_NO(32) | 3)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_PCM0_CLK (MTK_PIN_NO(32) | 4)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_I2S0_BCK (MTK_PIN_NO(32) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO33__FUNC_GPIO33 (MTK_PIN_NO(33) | 0)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_I2S3_LRCK (MTK_PIN_NO(33) | 1)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_I2S1_LRCK (MTK_PIN_NO(33) | 2)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_I2S5_LRCK (MTK_PIN_NO(33) | 3)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_PCM0_SYNC (MTK_PIN_NO(33) | 4)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_I2S0_LRCK (MTK_PIN_NO(33) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO34__FUNC_GPIO34 (MTK_PIN_NO(34) | 0)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_I2S0_DI (MTK_PIN_NO(34) | 1)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_I2S2_DI (MTK_PIN_NO(34) | 2)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_I2S2_DI2 (MTK_PIN_NO(34) | 3)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_PCM0_DI (MTK_PIN_NO(34) | 4)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_I2S0_DI_A (MTK_PIN_NO(34) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO35__FUNC_GPIO35 (MTK_PIN_NO(35) | 0)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_I2S3_DO (MTK_PIN_NO(35) | 1)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_I2S1_DO (MTK_PIN_NO(35) | 2)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_I2S5_DO (MTK_PIN_NO(35) | 3)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_PCM0_DO (MTK_PIN_NO(35) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO36__FUNC_GPIO36 (MTK_PIN_NO(36) | 0)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_SPI5_A_CLK (MTK_PIN_NO(36) | 1)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_DMIC1_CLK (MTK_PIN_NO(36) | 2)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_IDDIG (MTK_PIN_NO(36) | 3)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_MD_URXD0 (MTK_PIN_NO(36) | 4)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_UCTS0 (MTK_PIN_NO(36) | 5)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_URXD1 (MTK_PIN_NO(36) | 6)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_DBG_MON_A0 (MTK_PIN_NO(36) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO37__FUNC_GPIO37 (MTK_PIN_NO(37) | 0)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_SPI5_A_CSB (MTK_PIN_NO(37) | 1)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_DMIC1_DAT (MTK_PIN_NO(37) | 2)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_USB_DRVVBUS (MTK_PIN_NO(37) | 3)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_MD_UTXD0 (MTK_PIN_NO(37) | 4)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_URTS0 (MTK_PIN_NO(37) | 5)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_UTXD1 (MTK_PIN_NO(37) | 6)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_DBG_MON_A1 (MTK_PIN_NO(37) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO38__FUNC_GPIO38 (MTK_PIN_NO(38) | 0)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_SPI5_A_MI (MTK_PIN_NO(38) | 1)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_DMIC_CLK (MTK_PIN_NO(38) | 2)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_DSI1_TE (MTK_PIN_NO(38) | 3)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_MD_URXD1 (MTK_PIN_NO(38) | 4)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_URXD0 (MTK_PIN_NO(38) | 5)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_UCTS1 (MTK_PIN_NO(38) | 6)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_DBG_MON_A2 (MTK_PIN_NO(38) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO39__FUNC_GPIO39 (MTK_PIN_NO(39) | 0)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_SPI5_A_MO (MTK_PIN_NO(39) | 1)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_DMIC_DAT (MTK_PIN_NO(39) | 2)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_LCM1_RST (MTK_PIN_NO(39) | 3)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_MD_UTXD1 (MTK_PIN_NO(39) | 4)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_UTXD0 (MTK_PIN_NO(39) | 5)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_URTS1 (MTK_PIN_NO(39) | 6)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_DBG_MON_A3 (MTK_PIN_NO(39) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO40__FUNC_GPIO40 (MTK_PIN_NO(40) | 0)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_DISP_PWM (MTK_PIN_NO(40) | 1)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_DBG_MON_A6 (MTK_PIN_NO(40) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO41__FUNC_GPIO41 (MTK_PIN_NO(41) | 0)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_DSI_TE (MTK_PIN_NO(41) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO42__FUNC_GPIO42 (MTK_PIN_NO(42) | 0)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_LCM_RST (MTK_PIN_NO(42) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO43__FUNC_GPIO43 (MTK_PIN_NO(43) | 0)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(43) | 1)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(43) | 2)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_SCL_6306 (MTK_PIN_NO(43) | 3)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_ADSP_URXD0 (MTK_PIN_NO(43) | 4)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_PTA_RXD (MTK_PIN_NO(43) | 5)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_SSPM_URXD_AO (MTK_PIN_NO(43) | 6)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_DBG_MON_A4 (MTK_PIN_NO(43) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO44__FUNC_GPIO44 (MTK_PIN_NO(44) | 0)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(44) | 1)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(44) | 2)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_SDA_6306 (MTK_PIN_NO(44) | 3)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_ADSP_UTXD0 (MTK_PIN_NO(44) | 4)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_PTA_TXD (MTK_PIN_NO(44) | 5)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(44) | 6)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_DBG_MON_A5 (MTK_PIN_NO(44) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO45__FUNC_GPIO45 (MTK_PIN_NO(45) | 0)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(45) | 1)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(45) | 2)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_MCUPM_JTAG_TDI (MTK_PIN_NO(45) | 3)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_APU_JTAG_TDI (MTK_PIN_NO(45) | 4)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_CCU_JTAG_TDI (MTK_PIN_NO(45) | 5)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_LVTS_SCK (MTK_PIN_NO(45) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO46__FUNC_GPIO46 (MTK_PIN_NO(46) | 0)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(46) | 1)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(46) | 2)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_MCUPM_JTAG_TMS (MTK_PIN_NO(46) | 3)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_APU_JTAG_TMS (MTK_PIN_NO(46) | 4)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_CCU_JTAG_TMS (MTK_PIN_NO(46) | 5)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_LVTS_SDI (MTK_PIN_NO(46) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO47__FUNC_GPIO47 (MTK_PIN_NO(47) | 0)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(47) | 1)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(47) | 2)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_MCUPM_JTAG_TDO (MTK_PIN_NO(47) | 3)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_APU_JTAG_TDO (MTK_PIN_NO(47) | 4)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_CCU_JTAG_TDO (MTK_PIN_NO(47) | 5)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_LVTS_SCF (MTK_PIN_NO(47) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO48__FUNC_GPIO48 (MTK_PIN_NO(48) | 0)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(48) | 1)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(48) | 2)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_MCUPM_JTAG_TRSTN (MTK_PIN_NO(48) | 3)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_APU_JTAG_TRST (MTK_PIN_NO(48) | 4)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_CCU_JTAG_TRST (MTK_PIN_NO(48) | 5)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_LVTS_FOUT (MTK_PIN_NO(48) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO49__FUNC_GPIO49 (MTK_PIN_NO(49) | 0)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(49) | 1)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(49) | 2)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_MCUPM_JTAG_TCK (MTK_PIN_NO(49) | 3)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_APU_JTAG_TCK (MTK_PIN_NO(49) | 4)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_CCU_JTAG_TCK (MTK_PIN_NO(49) | 5)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_LVTS_SDO (MTK_PIN_NO(49) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO50__FUNC_GPIO50 (MTK_PIN_NO(50) | 0)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(50) | 1)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(50) | 2)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_LVTS_26M (MTK_PIN_NO(50) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO51__FUNC_GPIO51 (MTK_PIN_NO(51) | 0)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_MSDC1_CLK (MTK_PIN_NO(51) | 1)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_PCM1_CLK (MTK_PIN_NO(51) | 2)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_VPU_UDI_TCK (MTK_PIN_NO(51) | 3)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_UDI_TCK (MTK_PIN_NO(51) | 4)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_IPU_JTAG_TCK (MTK_PIN_NO(51) | 5)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_SSPM_JTAG_TCK (MTK_PIN_NO(51) | 6)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_JTCK_SEL3 (MTK_PIN_NO(51) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO52__FUNC_GPIO52 (MTK_PIN_NO(52) | 0)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_MSDC1_CMD (MTK_PIN_NO(52) | 1)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_PCM1_SYNC (MTK_PIN_NO(52) | 2)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_VPU_UDI_TMS (MTK_PIN_NO(52) | 3)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_UDI_TMS (MTK_PIN_NO(52) | 4)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_IPU_JTAG_TMS (MTK_PIN_NO(52) | 5)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_SSPM_JTAG_TMS (MTK_PIN_NO(52) | 6)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_JTMS_SEL3 (MTK_PIN_NO(52) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO53__FUNC_GPIO53 (MTK_PIN_NO(53) | 0)</div><div class='add'>+#define PINMUX_GPIO53__FUNC_MSDC1_DAT3 (MTK_PIN_NO(53) | 1)</div><div class='add'>+#define PINMUX_GPIO53__FUNC_PCM1_DI (MTK_PIN_NO(53) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO54__FUNC_GPIO54 (MTK_PIN_NO(54) | 0)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_MSDC1_DAT0 (MTK_PIN_NO(54) | 1)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_PCM1_DO0 (MTK_PIN_NO(54) | 2)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_VPU_UDI_TDI (MTK_PIN_NO(54) | 3)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_UDI_TDI (MTK_PIN_NO(54) | 4)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_IPU_JTAG_TDI (MTK_PIN_NO(54) | 5)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_SSPM_JTAG_TDI (MTK_PIN_NO(54) | 6)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_JTDI_SEL3 (MTK_PIN_NO(54) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO55__FUNC_GPIO55 (MTK_PIN_NO(55) | 0)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_MSDC1_DAT2 (MTK_PIN_NO(55) | 1)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_PCM1_DO2 (MTK_PIN_NO(55) | 2)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_VPU_UDI_NTRST (MTK_PIN_NO(55) | 3)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_UDI_NTRST (MTK_PIN_NO(55) | 4)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_IPU_JTAG_TRST (MTK_PIN_NO(55) | 5)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_SSPM_JTAG_TRSTN (MTK_PIN_NO(55) | 6)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_JTRSTN_SEL3 (MTK_PIN_NO(55) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO56__FUNC_GPIO56 (MTK_PIN_NO(56) | 0)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_MSDC1_DAT1 (MTK_PIN_NO(56) | 1)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_PCM1_DO1 (MTK_PIN_NO(56) | 2)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_VPU_UDI_TDO (MTK_PIN_NO(56) | 3)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_UDI_TDO (MTK_PIN_NO(56) | 4)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_IPU_JTAG_TDO (MTK_PIN_NO(56) | 5)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_SSPM_JTAG_TDO (MTK_PIN_NO(56) | 6)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_JTDO_SEL3 (MTK_PIN_NO(56) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO57__FUNC_GPIO57 (MTK_PIN_NO(57) | 0)</div><div class='add'>+#define PINMUX_GPIO57__FUNC_MIPI2_D_SCLK (MTK_PIN_NO(57) | 1)</div><div class='add'>+#define PINMUX_GPIO57__FUNC_DBG_MON_A14 (MTK_PIN_NO(57) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO58__FUNC_GPIO58 (MTK_PIN_NO(58) | 0)</div><div class='add'>+#define PINMUX_GPIO58__FUNC_MIPI2_D_SDATA (MTK_PIN_NO(58) | 1)</div><div class='add'>+#define PINMUX_GPIO58__FUNC_DBG_MON_A15 (MTK_PIN_NO(58) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO59__FUNC_GPIO59 (MTK_PIN_NO(59) | 0)</div><div class='add'>+#define PINMUX_GPIO59__FUNC_MIPI_M_SCLK (MTK_PIN_NO(59) | 1)</div><div class='add'>+#define PINMUX_GPIO59__FUNC_DBG_MON_A17 (MTK_PIN_NO(59) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO60__FUNC_GPIO60 (MTK_PIN_NO(60) | 0)</div><div class='add'>+#define PINMUX_GPIO60__FUNC_MIPI_M_SDATA (MTK_PIN_NO(60) | 1)</div><div class='add'>+#define PINMUX_GPIO60__FUNC_DBG_MON_A18 (MTK_PIN_NO(60) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO61__FUNC_GPIO61 (MTK_PIN_NO(61) | 0)</div><div class='add'>+#define PINMUX_GPIO61__FUNC_MD_UCNT_A_TGL (MTK_PIN_NO(61) | 1)</div><div class='add'>+#define PINMUX_GPIO61__FUNC_DBG_MON_A16 (MTK_PIN_NO(61) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO62__FUNC_GPIO62 (MTK_PIN_NO(62) | 0)</div><div class='add'>+#define PINMUX_GPIO62__FUNC_DIGRF_IRQ (MTK_PIN_NO(62) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO63__FUNC_GPIO63 (MTK_PIN_NO(63) | 0)</div><div class='add'>+#define PINMUX_GPIO63__FUNC_BPI_BUS0 (MTK_PIN_NO(63) | 1)</div><div class='add'>+#define PINMUX_GPIO63__FUNC_DBG_MON_A19 (MTK_PIN_NO(63) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO64__FUNC_GPIO64 (MTK_PIN_NO(64) | 0)</div><div class='add'>+#define PINMUX_GPIO64__FUNC_BPI_BUS1 (MTK_PIN_NO(64) | 1)</div><div class='add'>+#define PINMUX_GPIO64__FUNC_DBG_MON_A20 (MTK_PIN_NO(64) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO65__FUNC_GPIO65 (MTK_PIN_NO(65) | 0)</div><div class='add'>+#define PINMUX_GPIO65__FUNC_BPI_BUS2 (MTK_PIN_NO(65) | 1)</div><div class='add'>+#define PINMUX_GPIO65__FUNC_DBG_MON_A21 (MTK_PIN_NO(65) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO66__FUNC_GPIO66 (MTK_PIN_NO(66) | 0)</div><div class='add'>+#define PINMUX_GPIO66__FUNC_BPI_BUS3 (MTK_PIN_NO(66) | 1)</div><div class='add'>+#define PINMUX_GPIO66__FUNC_DBG_MON_A22 (MTK_PIN_NO(66) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO67__FUNC_GPIO67 (MTK_PIN_NO(67) | 0)</div><div class='add'>+#define PINMUX_GPIO67__FUNC_BPI_BUS4 (MTK_PIN_NO(67) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO68__FUNC_GPIO68 (MTK_PIN_NO(68) | 0)</div><div class='add'>+#define PINMUX_GPIO68__FUNC_BPI_BUS5 (MTK_PIN_NO(68) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO69__FUNC_GPIO69 (MTK_PIN_NO(69) | 0)</div><div class='add'>+#define PINMUX_GPIO69__FUNC_BPI_BUS6 (MTK_PIN_NO(69) | 1)</div><div class='add'>+#define PINMUX_GPIO69__FUNC_CONN_BPI_BUS6 (MTK_PIN_NO(69) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO70__FUNC_GPIO70 (MTK_PIN_NO(70) | 0)</div><div class='add'>+#define PINMUX_GPIO70__FUNC_BPI_BUS7 (MTK_PIN_NO(70) | 1)</div><div class='add'>+#define PINMUX_GPIO70__FUNC_CONN_BPI_BUS7 (MTK_PIN_NO(70) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO71__FUNC_GPIO71 (MTK_PIN_NO(71) | 0)</div><div class='add'>+#define PINMUX_GPIO71__FUNC_BPI_BUS8 (MTK_PIN_NO(71) | 1)</div><div class='add'>+#define PINMUX_GPIO71__FUNC_CONN_BPI_BUS8 (MTK_PIN_NO(71) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO72__FUNC_GPIO72 (MTK_PIN_NO(72) | 0)</div><div class='add'>+#define PINMUX_GPIO72__FUNC_BPI_BUS9 (MTK_PIN_NO(72) | 1)</div><div class='add'>+#define PINMUX_GPIO72__FUNC_CONN_BPI_BUS9 (MTK_PIN_NO(72) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO73__FUNC_GPIO73 (MTK_PIN_NO(73) | 0)</div><div class='add'>+#define PINMUX_GPIO73__FUNC_BPI_BUS10 (MTK_PIN_NO(73) | 1)</div><div class='add'>+#define PINMUX_GPIO73__FUNC_CONN_BPI_BUS10 (MTK_PIN_NO(73) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO74__FUNC_GPIO74 (MTK_PIN_NO(74) | 0)</div><div class='add'>+#define PINMUX_GPIO74__FUNC_BPI_BUS11_OLAT0 (MTK_PIN_NO(74) | 1)</div><div class='add'>+#define PINMUX_GPIO74__FUNC_CONN_BPI_BUS11_OLAT0 (MTK_PIN_NO(74) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO75__FUNC_GPIO75 (MTK_PIN_NO(75) | 0)</div><div class='add'>+#define PINMUX_GPIO75__FUNC_BPI_BUS12_OLAT1 (MTK_PIN_NO(75) | 1)</div><div class='add'>+#define PINMUX_GPIO75__FUNC_CONN_BPI_BUS12_OLAT1 (MTK_PIN_NO(75) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO76__FUNC_GPIO76 (MTK_PIN_NO(76) | 0)</div><div class='add'>+#define PINMUX_GPIO76__FUNC_BPI_BUS13_OLAT2 (MTK_PIN_NO(76) | 1)</div><div class='add'>+#define PINMUX_GPIO76__FUNC_CONN_BPI_BUS13_OLAT2 (MTK_PIN_NO(76) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO77__FUNC_GPIO77 (MTK_PIN_NO(77) | 0)</div><div class='add'>+#define PINMUX_GPIO77__FUNC_BPI_BUS14_OLAT3 (MTK_PIN_NO(77) | 1)</div><div class='add'>+#define PINMUX_GPIO77__FUNC_CONN_BPI_BUS14_OLAT3 (MTK_PIN_NO(77) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO78__FUNC_GPIO78 (MTK_PIN_NO(78) | 0)</div><div class='add'>+#define PINMUX_GPIO78__FUNC_BPI_BUS15_OLAT4 (MTK_PIN_NO(78) | 1)</div><div class='add'>+#define PINMUX_GPIO78__FUNC_CONN_BPI_BUS15_OLAT4 (MTK_PIN_NO(78) | 2)</div><div class='add'>+#define PINMUX_GPIO78__FUNC_DBG_MON_A7 (MTK_PIN_NO(78) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO79__FUNC_GPIO79 (MTK_PIN_NO(79) | 0)</div><div class='add'>+#define PINMUX_GPIO79__FUNC_BPI_BUS16_OLAT5 (MTK_PIN_NO(79) | 1)</div><div class='add'>+#define PINMUX_GPIO79__FUNC_CONN_BPI_BUS16_OLAT5 (MTK_PIN_NO(79) | 2)</div><div class='add'>+#define PINMUX_GPIO79__FUNC_DBG_MON_A8 (MTK_PIN_NO(79) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO80__FUNC_GPIO80 (MTK_PIN_NO(80) | 0)</div><div class='add'>+#define PINMUX_GPIO80__FUNC_BPI_BUS17_ANT0 (MTK_PIN_NO(80) | 1)</div><div class='add'>+#define PINMUX_GPIO80__FUNC_CONN_BPI_BUS17_ANT0 (MTK_PIN_NO(80) | 2)</div><div class='add'>+#define PINMUX_GPIO80__FUNC_DBG_MON_A9 (MTK_PIN_NO(80) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO81__FUNC_GPIO81 (MTK_PIN_NO(81) | 0)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_BPI_BUS18_ANT1 (MTK_PIN_NO(81) | 1)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_CONN_BPI_BUS18_ANT1 (MTK_PIN_NO(81) | 2)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_DBG_MON_A10 (MTK_PIN_NO(81) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO82__FUNC_GPIO82 (MTK_PIN_NO(82) | 0)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_BPI_BUS19_ANT2 (MTK_PIN_NO(82) | 1)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_CONN_BPI_BUS19_ANT2 (MTK_PIN_NO(82) | 2)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_DBG_MON_A11 (MTK_PIN_NO(82) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO83__FUNC_GPIO83 (MTK_PIN_NO(83) | 0)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_BPI_BUS20_ANT3 (MTK_PIN_NO(83) | 1)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_CONN_BPI_BUS20_ANT3 (MTK_PIN_NO(83) | 2)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_DBG_MON_A12 (MTK_PIN_NO(83) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO84__FUNC_GPIO84 (MTK_PIN_NO(84) | 0)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_BPI_BUS21_ANT4 (MTK_PIN_NO(84) | 1)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_CONN_BPI_BUS21_ANT4 (MTK_PIN_NO(84) | 2)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_DBG_MON_A13 (MTK_PIN_NO(84) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO85__FUNC_GPIO85 (MTK_PIN_NO(85) | 0)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_MIPI1_D_SCLK (MTK_PIN_NO(85) | 1)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_CONN_MIPI1_SCLK (MTK_PIN_NO(85) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO86__FUNC_GPIO86 (MTK_PIN_NO(86) | 0)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_MIPI1_D_SDATA (MTK_PIN_NO(86) | 1)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_CONN_MIPI1_SDATA (MTK_PIN_NO(86) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO87__FUNC_GPIO87 (MTK_PIN_NO(87) | 0)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_MIPI0_D_SCLK (MTK_PIN_NO(87) | 1)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_CONN_MIPI0_SCLK (MTK_PIN_NO(87) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO88__FUNC_GPIO88 (MTK_PIN_NO(88) | 0)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_MIPI0_D_SDATA (MTK_PIN_NO(88) | 1)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_CONN_MIPI0_SDATA (MTK_PIN_NO(88) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO89__FUNC_GPIO89 (MTK_PIN_NO(89) | 0)</div><div class='add'>+#define PINMUX_GPIO89__FUNC_SPMI_SCL (MTK_PIN_NO(89) | 1)</div><div class='add'>+#define PINMUX_GPIO89__FUNC_SCL10 (MTK_PIN_NO(89) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO90__FUNC_GPIO90 (MTK_PIN_NO(90) | 0)</div><div class='add'>+#define PINMUX_GPIO90__FUNC_SPMI_SDA (MTK_PIN_NO(90) | 1)</div><div class='add'>+#define PINMUX_GPIO90__FUNC_SDA10 (MTK_PIN_NO(90) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO91__FUNC_GPIO91 (MTK_PIN_NO(91) | 0)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_AP_GOOD (MTK_PIN_NO(91) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO92__FUNC_GPIO92 (MTK_PIN_NO(92) | 0)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_URXD0 (MTK_PIN_NO(92) | 1)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_MD_URXD0 (MTK_PIN_NO(92) | 2)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_MD_URXD1 (MTK_PIN_NO(92) | 3)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_SSPM_URXD_AO (MTK_PIN_NO(92) | 4)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_CONN_BGF_UART0_RXD (MTK_PIN_NO(92) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO93__FUNC_GPIO93 (MTK_PIN_NO(93) | 0)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_UTXD0 (MTK_PIN_NO(93) | 1)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_MD_UTXD0 (MTK_PIN_NO(93) | 2)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_MD_UTXD1 (MTK_PIN_NO(93) | 3)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(93) | 4)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_CONN_BGF_UART0_TXD (MTK_PIN_NO(93) | 5)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_WIFI_TXD (MTK_PIN_NO(93) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO94__FUNC_GPIO94 (MTK_PIN_NO(94) | 0)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_URXD1 (MTK_PIN_NO(94) | 1)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_ADSP_URXD0 (MTK_PIN_NO(94) | 2)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_MD32_0_RXD (MTK_PIN_NO(94) | 3)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_SSPM_URXD_AO (MTK_PIN_NO(94) | 4)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_TP_URXD1_AO (MTK_PIN_NO(94) | 5)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_TP_URXD2_AO (MTK_PIN_NO(94) | 6)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(94) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO95__FUNC_GPIO95 (MTK_PIN_NO(95) | 0)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_UTXD1 (MTK_PIN_NO(95) | 1)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_ADSP_UTXD0 (MTK_PIN_NO(95) | 2)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_MD32_0_TXD (MTK_PIN_NO(95) | 3)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(95) | 4)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_TP_UTXD1_AO (MTK_PIN_NO(95) | 5)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_TP_UTXD2_AO (MTK_PIN_NO(95) | 6)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(95) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO96__FUNC_GPIO96 (MTK_PIN_NO(96) | 0)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_TDM_LRCK (MTK_PIN_NO(96) | 1)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_I2S7_LRCK (MTK_PIN_NO(96) | 2)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_I2S9_LRCK (MTK_PIN_NO(96) | 3)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_SPI4_A_CLK (MTK_PIN_NO(96) | 4)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_ADSP_JTAG0_TDI (MTK_PIN_NO(96) | 5)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_CONN_BGF_DSP_L1_JDI (MTK_PIN_NO(96) | 6)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_IO_JTAG_TDI (MTK_PIN_NO(96) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO97__FUNC_GPIO97 (MTK_PIN_NO(97) | 0)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_TDM_BCK (MTK_PIN_NO(97) | 1)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_I2S7_BCK (MTK_PIN_NO(97) | 2)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_I2S9_BCK (MTK_PIN_NO(97) | 3)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_SPI4_A_CSB (MTK_PIN_NO(97) | 4)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_ADSP_JTAG0_TRSTN (MTK_PIN_NO(97) | 5)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_CONN_BGF_DSP_L1_JINTP (MTK_PIN_NO(97) | 6)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_IO_JTAG_TRSTN (MTK_PIN_NO(97) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO98__FUNC_GPIO98 (MTK_PIN_NO(98) | 0)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_TDM_MCK (MTK_PIN_NO(98) | 1)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_I2S7_MCK (MTK_PIN_NO(98) | 2)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_I2S9_MCK (MTK_PIN_NO(98) | 3)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_SPI4_A_MI (MTK_PIN_NO(98) | 4)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_ADSP_JTAG0_TCK (MTK_PIN_NO(98) | 5)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_CONN_BGF_DSP_L1_JCK (MTK_PIN_NO(98) | 6)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_IO_JTAG_TCK (MTK_PIN_NO(98) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO99__FUNC_GPIO99 (MTK_PIN_NO(99) | 0)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_TDM_DATA0 (MTK_PIN_NO(99) | 1)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_I2S6_DI (MTK_PIN_NO(99) | 2)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_I2S8_DI (MTK_PIN_NO(99) | 3)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_SPI4_A_MO (MTK_PIN_NO(99) | 4)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_ADSP_JTAG0_TDO (MTK_PIN_NO(99) | 5)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_CONN_BGF_DSP_L1_JDO (MTK_PIN_NO(99) | 6)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_IO_JTAG_TDO (MTK_PIN_NO(99) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO100__FUNC_GPIO100 (MTK_PIN_NO(100) | 0)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_TDM_DATA1 (MTK_PIN_NO(100) | 1)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_I2S7_DO (MTK_PIN_NO(100) | 2)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_I2S9_DO (MTK_PIN_NO(100) | 3)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_DP_TX_HPD (MTK_PIN_NO(100) | 4)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_ADSP_JTAG0_TMS (MTK_PIN_NO(100) | 5)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_CONN_BGF_DSP_L1_JMS (MTK_PIN_NO(100) | 6)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_IO_JTAG_TMS (MTK_PIN_NO(100) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO101__FUNC_GPIO101 (MTK_PIN_NO(101) | 0)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_TDM_DATA2 (MTK_PIN_NO(101) | 1)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_DMIC1_CLK (MTK_PIN_NO(101) | 2)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SRCLKENAI0 (MTK_PIN_NO(101) | 3)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SPI5_B_CLK (MTK_PIN_NO(101) | 4)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_CLKM0 (MTK_PIN_NO(101) | 5)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_DAP_MD32_SWD (MTK_PIN_NO(101) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO102__FUNC_GPIO102 (MTK_PIN_NO(102) | 0)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_TDM_DATA3 (MTK_PIN_NO(102) | 1)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_DMIC1_DAT (MTK_PIN_NO(102) | 2)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SRCLKENAI1 (MTK_PIN_NO(102) | 3)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SPI5_B_CSB (MTK_PIN_NO(102) | 4)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_DP_TX_HPD (MTK_PIN_NO(102) | 5)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(102) | 6)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(102) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO103__FUNC_GPIO103 (MTK_PIN_NO(103) | 0)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_SPI0_A_MI (MTK_PIN_NO(103) | 1)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_SCP_SPI0_MI (MTK_PIN_NO(103) | 2)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_DFD_TDO (MTK_PIN_NO(103) | 5)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_SPM_JTAG_TDO (MTK_PIN_NO(103) | 6)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_JTDO_SEL1 (MTK_PIN_NO(103) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO104__FUNC_GPIO104 (MTK_PIN_NO(104) | 0)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_SPI0_A_CSB (MTK_PIN_NO(104) | 1)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_SCP_SPI0_CS (MTK_PIN_NO(104) | 2)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_DFD_TMS (MTK_PIN_NO(104) | 5)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_SPM_JTAG_TMS (MTK_PIN_NO(104) | 6)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_JTMS_SEL1 (MTK_PIN_NO(104) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO105__FUNC_GPIO105 (MTK_PIN_NO(105) | 0)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SPI0_A_MO (MTK_PIN_NO(105) | 1)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SCP_SPI0_MO (MTK_PIN_NO(105) | 2)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SCP_SDA0 (MTK_PIN_NO(105) | 3)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_DFD_TDI (MTK_PIN_NO(105) | 5)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SPM_JTAG_TDI (MTK_PIN_NO(105) | 6)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_JTDI_SEL1 (MTK_PIN_NO(105) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO106__FUNC_GPIO106 (MTK_PIN_NO(106) | 0)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SPI0_A_CLK (MTK_PIN_NO(106) | 1)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SCP_SPI0_CK (MTK_PIN_NO(106) | 2)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SCP_SCL0 (MTK_PIN_NO(106) | 3)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_DFD_TCK_XI (MTK_PIN_NO(106) | 5)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SPM_JTAG_TCK (MTK_PIN_NO(106) | 6)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_JTCK_SEL1 (MTK_PIN_NO(106) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO107__FUNC_GPIO107 (MTK_PIN_NO(107) | 0)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_DMIC_CLK (MTK_PIN_NO(107) | 1)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_PWM_0 (MTK_PIN_NO(107) | 2)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_CLKM2 (MTK_PIN_NO(107) | 3)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_SPI5_B_MI (MTK_PIN_NO(107) | 4)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_SPM_JTAG_TRSTN (MTK_PIN_NO(107) | 6)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(107) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO108__FUNC_GPIO108 (MTK_PIN_NO(108) | 0)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_DMIC_DAT (MTK_PIN_NO(108) | 1)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_PWM_1 (MTK_PIN_NO(108) | 2)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_CLKM3 (MTK_PIN_NO(108) | 3)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_SPI5_B_MO (MTK_PIN_NO(108) | 4)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_DAP_SONIC_SWD (MTK_PIN_NO(108) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO109__FUNC_GPIO109 (MTK_PIN_NO(109) | 0)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_I2S1_MCK (MTK_PIN_NO(109) | 1)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_I2S3_MCK (MTK_PIN_NO(109) | 2)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_I2S2_MCK (MTK_PIN_NO(109) | 3)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_DP_TX_HPD (MTK_PIN_NO(109) | 4)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_I2S2_MCK_A (MTK_PIN_NO(109) | 5)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_SRCLKENAI0 (MTK_PIN_NO(109) | 6)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_DAP_SONIC_SWCK (MTK_PIN_NO(109) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO110__FUNC_GPIO110 (MTK_PIN_NO(110) | 0)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_I2S1_BCK (MTK_PIN_NO(110) | 1)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_I2S3_BCK (MTK_PIN_NO(110) | 2)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_I2S2_BCK (MTK_PIN_NO(110) | 3)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_PCM0_CLK (MTK_PIN_NO(110) | 4)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_I2S2_BCK_A (MTK_PIN_NO(110) | 5)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_CONN_BGF_MCU_TDO (MTK_PIN_NO(110) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO111__FUNC_GPIO111 (MTK_PIN_NO(111) | 0)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_I2S1_LRCK (MTK_PIN_NO(111) | 1)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_I2S3_LRCK (MTK_PIN_NO(111) | 2)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_I2S2_LRCK (MTK_PIN_NO(111) | 3)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_PCM0_SYNC (MTK_PIN_NO(111) | 4)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_I2S2_LRCK_A (MTK_PIN_NO(111) | 5)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_CONN_BGF_MCU_TDI (MTK_PIN_NO(111) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO112__FUNC_GPIO112 (MTK_PIN_NO(112) | 0)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_I2S2_DI (MTK_PIN_NO(112) | 1)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_I2S0_DI (MTK_PIN_NO(112) | 2)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_I2S2_DI2 (MTK_PIN_NO(112) | 3)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_PCM0_DI (MTK_PIN_NO(112) | 4)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_I2S2_DI_A (MTK_PIN_NO(112) | 5)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_CONN_BGF_MCU_TMS (MTK_PIN_NO(112) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO113__FUNC_GPIO113 (MTK_PIN_NO(113) | 0)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_I2S1_DO (MTK_PIN_NO(113) | 1)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_I2S3_DO (MTK_PIN_NO(113) | 2)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_I2S5_DO (MTK_PIN_NO(113) | 3)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_PCM0_DO (MTK_PIN_NO(113) | 4)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_I2S2_DI2 (MTK_PIN_NO(113) | 5)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_CONN_BGF_MCU_TCK (MTK_PIN_NO(113) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO114__FUNC_GPIO114 (MTK_PIN_NO(114) | 0)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_SPI2_MI (MTK_PIN_NO(114) | 1)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_SCP_SPI2_MI (MTK_PIN_NO(114) | 2)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_CONN_BGF_MCU_TRST_B (MTK_PIN_NO(114) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO115__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_SPI2_CSB (MTK_PIN_NO(115) | 1)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_SCP_SPI2_CS (MTK_PIN_NO(115) | 2)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_CONN_BGF_MCU_DBGI_N (MTK_PIN_NO(115) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO116__FUNC_GPIO116 (MTK_PIN_NO(116) | 0)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_SPI2_MO (MTK_PIN_NO(116) | 1)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_SCP_SPI2_MO (MTK_PIN_NO(116) | 2)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_SCP_SDA1 (MTK_PIN_NO(116) | 3)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_CONN_BGF_MCU_DBGACK_N (MTK_PIN_NO(116) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO117__FUNC_GPIO117 (MTK_PIN_NO(117) | 0)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_SPI2_CLK (MTK_PIN_NO(117) | 1)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_SCP_SPI2_CK (MTK_PIN_NO(117) | 2)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_SCP_SCL1 (MTK_PIN_NO(117) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO118__FUNC_GPIO118 (MTK_PIN_NO(118) | 0)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_SCL1 (MTK_PIN_NO(118) | 1)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_SCP_SCL0 (MTK_PIN_NO(118) | 2)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_SCP_SCL1 (MTK_PIN_NO(118) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO119__FUNC_GPIO119 (MTK_PIN_NO(119) | 0)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_SDA1 (MTK_PIN_NO(119) | 1)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_SCP_SDA0 (MTK_PIN_NO(119) | 2)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_SCP_SDA1 (MTK_PIN_NO(119) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO120__FUNC_GPIO120 (MTK_PIN_NO(120) | 0)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_SCL9 (MTK_PIN_NO(120) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO121__FUNC_GPIO121 (MTK_PIN_NO(121) | 0)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_SDA9 (MTK_PIN_NO(121) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO122__FUNC_GPIO122 (MTK_PIN_NO(122) | 0)</div><div class='add'>+#define PINMUX_GPIO122__FUNC_SCL8 (MTK_PIN_NO(122) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO123__FUNC_GPIO123 (MTK_PIN_NO(123) | 0)</div><div class='add'>+#define PINMUX_GPIO123__FUNC_SDA8 (MTK_PIN_NO(123) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO124__FUNC_GPIO124 (MTK_PIN_NO(124) | 0)</div><div class='add'>+#define PINMUX_GPIO124__FUNC_SCL7 (MTK_PIN_NO(124) | 1)</div><div class='add'>+#define PINMUX_GPIO124__FUNC_DMIC1_CLK (MTK_PIN_NO(124) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO125__FUNC_GPIO125 (MTK_PIN_NO(125) | 0)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_SDA7 (MTK_PIN_NO(125) | 1)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_DMIC1_DAT (MTK_PIN_NO(125) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO126__FUNC_GPIO126 (MTK_PIN_NO(126) | 0)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_CMFLASH0 (MTK_PIN_NO(126) | 1)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_PWM_2 (MTK_PIN_NO(126) | 2)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_TP_UCTS1_AO (MTK_PIN_NO(126) | 3)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_UCTS0 (MTK_PIN_NO(126) | 4)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_SCL11 (MTK_PIN_NO(126) | 5)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_MD32_1_GPIO0 (MTK_PIN_NO(126) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO127__FUNC_GPIO127 (MTK_PIN_NO(127) | 0)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_CMFLASH1 (MTK_PIN_NO(127) | 1)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_PWM_3 (MTK_PIN_NO(127) | 2)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_TP_URTS1_AO (MTK_PIN_NO(127) | 3)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_URTS0 (MTK_PIN_NO(127) | 4)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_SDA11 (MTK_PIN_NO(127) | 5)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_MD32_1_GPIO1 (MTK_PIN_NO(127) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO128__FUNC_GPIO128 (MTK_PIN_NO(128) | 0)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_CMFLASH2 (MTK_PIN_NO(128) | 1)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_PWM_0 (MTK_PIN_NO(128) | 2)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_TP_UCTS2_AO (MTK_PIN_NO(128) | 3)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_UCTS1 (MTK_PIN_NO(128) | 4)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_SCL12 (MTK_PIN_NO(128) | 5)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_MD32_1_GPIO2 (MTK_PIN_NO(128) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO129__FUNC_GPIO129 (MTK_PIN_NO(129) | 0)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_CMFLASH3 (MTK_PIN_NO(129) | 1)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_PWM_1 (MTK_PIN_NO(129) | 2)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_TP_URTS2_AO (MTK_PIN_NO(129) | 3)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_URTS1 (MTK_PIN_NO(129) | 4)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_SDA12 (MTK_PIN_NO(129) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO130__FUNC_GPIO130 (MTK_PIN_NO(130) | 0)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_CMVREF0 (MTK_PIN_NO(130) | 1)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_ANT_SEL10 (MTK_PIN_NO(130) | 2)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_SCP_JTAG0_TDO (MTK_PIN_NO(130) | 3)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_MD32_0_JTAG_TDO (MTK_PIN_NO(130) | 4)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_SCL11 (MTK_PIN_NO(130) | 5)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_CONN_WF_MCU_TDO (MTK_PIN_NO(130) | 6)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_DBG_MON_A23 (MTK_PIN_NO(130) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO131__FUNC_GPIO131 (MTK_PIN_NO(131) | 0)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_CMVREF1 (MTK_PIN_NO(131) | 1)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_ANT_SEL11 (MTK_PIN_NO(131) | 2)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_SCP_JTAG0_TDI (MTK_PIN_NO(131) | 3)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_MD32_0_JTAG_TDI (MTK_PIN_NO(131) | 4)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_SDA11 (MTK_PIN_NO(131) | 5)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_CONN_WF_MCU_TDI (MTK_PIN_NO(131) | 6)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_DBG_MON_A26 (MTK_PIN_NO(131) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO132__FUNC_GPIO132 (MTK_PIN_NO(132) | 0)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_CMVREF2 (MTK_PIN_NO(132) | 1)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_ANT_SEL12 (MTK_PIN_NO(132) | 2)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_SCP_JTAG0_TMS (MTK_PIN_NO(132) | 3)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_MD32_0_JTAG_TMS (MTK_PIN_NO(132) | 4)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_CONN_WF_MCU_TMS (MTK_PIN_NO(132) | 6)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_DBG_MON_A28 (MTK_PIN_NO(132) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO133__FUNC_GPIO133 (MTK_PIN_NO(133) | 0)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_CMVREF3 (MTK_PIN_NO(133) | 1)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(133) | 2)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_SCP_JTAG0_TCK (MTK_PIN_NO(133) | 3)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_MD32_0_JTAG_TCK (MTK_PIN_NO(133) | 4)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_CONN_WF_MCU_TCK (MTK_PIN_NO(133) | 6)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_DBG_MON_A24 (MTK_PIN_NO(133) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO134__FUNC_GPIO134 (MTK_PIN_NO(134) | 0)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_CMVREF4 (MTK_PIN_NO(134) | 1)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(134) | 2)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_SCP_JTAG0_TRSTN (MTK_PIN_NO(134) | 3)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_MD32_0_JTAG_TRST (MTK_PIN_NO(134) | 4)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_CONN_WF_MCU_TRST_B (MTK_PIN_NO(134) | 6)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_DBG_MON_A27 (MTK_PIN_NO(134) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO135__FUNC_GPIO135 (MTK_PIN_NO(135) | 0)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_PWM_0 (MTK_PIN_NO(135) | 1)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_SRCLKENAI1 (MTK_PIN_NO(135) | 2)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_MD_URXD0 (MTK_PIN_NO(135) | 3)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_MD32_0_RXD (MTK_PIN_NO(135) | 4)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(135) | 5)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_CONN_WF_MCU_DBGI_N (MTK_PIN_NO(135) | 6)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_DBG_MON_A29 (MTK_PIN_NO(135) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO136__FUNC_GPIO136 (MTK_PIN_NO(136) | 0)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_CMMCLK3 (MTK_PIN_NO(136) | 1)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_CLKM1 (MTK_PIN_NO(136) | 2)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_MD_UTXD0 (MTK_PIN_NO(136) | 3)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_MD32_0_TXD (MTK_PIN_NO(136) | 4)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_CONN_BT_TXD (MTK_PIN_NO(136) | 5)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_CONN_WF_MCU_DBGACK_N (MTK_PIN_NO(136) | 6)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_DBG_MON_A25 (MTK_PIN_NO(136) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO137__FUNC_GPIO137 (MTK_PIN_NO(137) | 0)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_CMMCLK4 (MTK_PIN_NO(137) | 1)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_CLKM2 (MTK_PIN_NO(137) | 2)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_MD_URXD1 (MTK_PIN_NO(137) | 3)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_MD32_1_RXD (MTK_PIN_NO(137) | 4)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_ILDO_DOUT0 (MTK_PIN_NO(137) | 5)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_CONN_BGF_UART0_RXD (MTK_PIN_NO(137) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO138__FUNC_GPIO138 (MTK_PIN_NO(138) | 0)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_CMMCLK5 (MTK_PIN_NO(138) | 1)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_CLKM3 (MTK_PIN_NO(138) | 2)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_MD_UTXD1 (MTK_PIN_NO(138) | 3)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_MD32_1_TXD (MTK_PIN_NO(138) | 4)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_ILDO_DOUT1 (MTK_PIN_NO(138) | 5)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_CONN_BGF_UART0_TXD (MTK_PIN_NO(138) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO139__FUNC_GPIO139 (MTK_PIN_NO(139) | 0)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_SCL4 (MTK_PIN_NO(139) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO140__FUNC_GPIO140 (MTK_PIN_NO(140) | 0)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_SDA4 (MTK_PIN_NO(140) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO141__FUNC_GPIO141 (MTK_PIN_NO(141) | 0)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_SCL2 (MTK_PIN_NO(141) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO142__FUNC_GPIO142 (MTK_PIN_NO(142) | 0)</div><div class='add'>+#define PINMUX_GPIO142__FUNC_SDA2 (MTK_PIN_NO(142) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO143__FUNC_GPIO143 (MTK_PIN_NO(143) | 0)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_CMVREF0 (MTK_PIN_NO(143) | 1)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_SPI3_CLK (MTK_PIN_NO(143) | 2)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_ADSP_JTAG1_TDO (MTK_PIN_NO(143) | 3)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_SCP_JTAG1_TDO (MTK_PIN_NO(143) | 4)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_MD32_1_JTAG_TDO (MTK_PIN_NO(143) | 5)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_CONN_BGF_DSP_L5_JDO (MTK_PIN_NO(143) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO144__FUNC_GPIO144 (MTK_PIN_NO(144) | 0)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_CMVREF1 (MTK_PIN_NO(144) | 1)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_SPI3_CSB (MTK_PIN_NO(144) | 2)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_ADSP_JTAG1_TDI (MTK_PIN_NO(144) | 3)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_SCP_JTAG1_TDI (MTK_PIN_NO(144) | 4)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_MD32_1_JTAG_TDI (MTK_PIN_NO(144) | 5)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_CONN_BGF_DSP_L5_JDI (MTK_PIN_NO(144) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO145__FUNC_GPIO145 (MTK_PIN_NO(145) | 0)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_CMVREF2 (MTK_PIN_NO(145) | 1)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_SPI3_MI (MTK_PIN_NO(145) | 2)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_ADSP_JTAG1_TMS (MTK_PIN_NO(145) | 3)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_SCP_JTAG1_TMS (MTK_PIN_NO(145) | 4)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_MD32_1_JTAG_TMS (MTK_PIN_NO(145) | 5)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_CONN_BGF_DSP_L5_JMS (MTK_PIN_NO(145) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO146__FUNC_GPIO146 (MTK_PIN_NO(146) | 0)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_CMVREF3 (MTK_PIN_NO(146) | 1)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_SPI3_MO (MTK_PIN_NO(146) | 2)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_ADSP_JTAG1_TCK (MTK_PIN_NO(146) | 3)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_SCP_JTAG1_TCK (MTK_PIN_NO(146) | 4)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_MD32_1_JTAG_TCK (MTK_PIN_NO(146) | 5)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_CONN_BGF_DSP_L5_JCK (MTK_PIN_NO(146) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO147__FUNC_GPIO147 (MTK_PIN_NO(147) | 0)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_CMVREF4 (MTK_PIN_NO(147) | 1)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(147) | 2)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_ADSP_JTAG1_TRSTN (MTK_PIN_NO(147) | 3)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_SCP_JTAG1_TRSTN (MTK_PIN_NO(147) | 4)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_MD32_1_JTAG_TRST (MTK_PIN_NO(147) | 5)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_CONN_BGF_DSP_L5_JINTP (MTK_PIN_NO(147) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_PWM_1 (MTK_PIN_NO(148) | 1)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_AGPS_SYNC (MTK_PIN_NO(148) | 2)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_CMMCLK5 (MTK_PIN_NO(148) | 3)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_CONN_WF_MCU_AICE_TMSC (MTK_PIN_NO(148) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_CMMCLK0 (MTK_PIN_NO(149) | 1)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_CLKM0 (MTK_PIN_NO(149) | 2)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(149) | 3)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_CONN_WF_MCU_AICE_TCKC (MTK_PIN_NO(149) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_CMMCLK1 (MTK_PIN_NO(150) | 1)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_CLKM1 (MTK_PIN_NO(150) | 2)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_MD32_0_GPIO1 (MTK_PIN_NO(150) | 3)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_CONN_BGF_MCU_AICE_TMSC (MTK_PIN_NO(150) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_CMMCLK2 (MTK_PIN_NO(151) | 1)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_CLKM2 (MTK_PIN_NO(151) | 2)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_MD32_0_GPIO2 (MTK_PIN_NO(151) | 3)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_CONN_BGF_MCU_AICE_TCKC (MTK_PIN_NO(151) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_KPROW1 (MTK_PIN_NO(152) | 1)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_PWM_2 (MTK_PIN_NO(152) | 2)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_IDDIG (MTK_PIN_NO(152) | 3)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_DP_TX_HPD (MTK_PIN_NO(152) | 4)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_DSI1_TE (MTK_PIN_NO(152) | 5)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(152) | 6)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_DBG_MON_B2 (MTK_PIN_NO(152) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO153__FUNC_GPIO153 (MTK_PIN_NO(153) | 0)</div><div class='add'>+#define PINMUX_GPIO153__FUNC_KPROW0 (MTK_PIN_NO(153) | 1)</div><div class='add'>+#define PINMUX_GPIO153__FUNC_DBG_MON_B1 (MTK_PIN_NO(153) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO154__FUNC_GPIO154 (MTK_PIN_NO(154) | 0)</div><div class='add'>+#define PINMUX_GPIO154__FUNC_KPCOL0 (MTK_PIN_NO(154) | 1)</div><div class='add'>+#define PINMUX_GPIO154__FUNC_DBG_MON_A32 (MTK_PIN_NO(154) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO155__FUNC_GPIO155 (MTK_PIN_NO(155) | 0)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_KPCOL1 (MTK_PIN_NO(155) | 1)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_PWM_3 (MTK_PIN_NO(155) | 2)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_USB_DRVVBUS (MTK_PIN_NO(155) | 3)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(155) | 4)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_LCM1_RST (MTK_PIN_NO(155) | 5)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(155) | 6)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_DBG_MON_B0 (MTK_PIN_NO(155) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO156__FUNC_GPIO156 (MTK_PIN_NO(156) | 0)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_SPI1_A_CLK (MTK_PIN_NO(156) | 1)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_SCP_SPI1_A_CK (MTK_PIN_NO(156) | 2)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_MRG_CLK (MTK_PIN_NO(156) | 3)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_AGPS_SYNC (MTK_PIN_NO(156) | 4)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_SCL12 (MTK_PIN_NO(156) | 5)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_DBG_MON_B3 (MTK_PIN_NO(156) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO157__FUNC_GPIO157 (MTK_PIN_NO(157) | 0)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_SPI1_A_CSB (MTK_PIN_NO(157) | 1)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_SCP_SPI1_A_CS (MTK_PIN_NO(157) | 2)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_MRG_SYNC (MTK_PIN_NO(157) | 3)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(157) | 4)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_SDA12 (MTK_PIN_NO(157) | 5)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_DBG_MON_B4 (MTK_PIN_NO(157) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO158__FUNC_GPIO158 (MTK_PIN_NO(158) | 0)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_SPI1_A_MI (MTK_PIN_NO(158) | 1)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_SCP_SPI1_A_MI (MTK_PIN_NO(158) | 2)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_MRG_DI (MTK_PIN_NO(158) | 3)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_PTA_RXD (MTK_PIN_NO(158) | 4)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_SCL13 (MTK_PIN_NO(158) | 5)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_DBG_MON_B5 (MTK_PIN_NO(158) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO159__FUNC_GPIO159 (MTK_PIN_NO(159) | 0)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_SPI1_A_MO (MTK_PIN_NO(159) | 1)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_SCP_SPI1_A_MO (MTK_PIN_NO(159) | 2)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_MRG_DO (MTK_PIN_NO(159) | 3)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_PTA_TXD (MTK_PIN_NO(159) | 4)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_SDA13 (MTK_PIN_NO(159) | 5)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_DBG_MON_B6 (MTK_PIN_NO(159) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO160__FUNC_GPIO160 (MTK_PIN_NO(160) | 0)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_SCL3 (MTK_PIN_NO(160) | 1)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_SCP_SCL0 (MTK_PIN_NO(160) | 2)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_SCP_SCL1 (MTK_PIN_NO(160) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO161__FUNC_GPIO161 (MTK_PIN_NO(161) | 0)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_SDA3 (MTK_PIN_NO(161) | 1)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_SCP_SDA0 (MTK_PIN_NO(161) | 2)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_SCP_SDA1 (MTK_PIN_NO(161) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO162__FUNC_GPIO162 (MTK_PIN_NO(162) | 0)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_ANT_SEL0 (MTK_PIN_NO(162) | 1)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(162) | 2)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_DBG_MON_B7 (MTK_PIN_NO(162) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO163__FUNC_GPIO163 (MTK_PIN_NO(163) | 0)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_ANT_SEL1 (MTK_PIN_NO(163) | 1)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(163) | 2)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_DBG_MON_B8 (MTK_PIN_NO(163) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO164__FUNC_GPIO164 (MTK_PIN_NO(164) | 0)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_ANT_SEL2 (MTK_PIN_NO(164) | 1)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_SCP_SPI1_B_CK (MTK_PIN_NO(164) | 2)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_TP_URXD1_AO (MTK_PIN_NO(164) | 3)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_UCTS0 (MTK_PIN_NO(164) | 5)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_DBG_MON_B9 (MTK_PIN_NO(164) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO165__FUNC_GPIO165 (MTK_PIN_NO(165) | 0)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_ANT_SEL3 (MTK_PIN_NO(165) | 1)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_SCP_SPI1_B_CS (MTK_PIN_NO(165) | 2)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_TP_UTXD1_AO (MTK_PIN_NO(165) | 3)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(165) | 4)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_URTS0 (MTK_PIN_NO(165) | 5)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_DBG_MON_B10 (MTK_PIN_NO(165) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO166__FUNC_GPIO166 (MTK_PIN_NO(166) | 0)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_ANT_SEL4 (MTK_PIN_NO(166) | 1)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_SCP_SPI1_B_MI (MTK_PIN_NO(166) | 2)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_TP_URXD2_AO (MTK_PIN_NO(166) | 3)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_SRCLKENAI1 (MTK_PIN_NO(166) | 4)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_UCTS1 (MTK_PIN_NO(166) | 5)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_DBG_MON_B11 (MTK_PIN_NO(166) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO167__FUNC_GPIO167 (MTK_PIN_NO(167) | 0)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_ANT_SEL5 (MTK_PIN_NO(167) | 1)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_SCP_SPI1_B_MO (MTK_PIN_NO(167) | 2)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_TP_UTXD2_AO (MTK_PIN_NO(167) | 3)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_SRCLKENAI0 (MTK_PIN_NO(167) | 4)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_URTS1 (MTK_PIN_NO(167) | 5)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_DBG_MON_B12 (MTK_PIN_NO(167) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO168__FUNC_GPIO168 (MTK_PIN_NO(168) | 0)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_ANT_SEL6 (MTK_PIN_NO(168) | 1)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_SPI0_B_CLK (MTK_PIN_NO(168) | 2)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_TP_UCTS1_AO (MTK_PIN_NO(168) | 3)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_KPCOL2 (MTK_PIN_NO(168) | 4)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_MD_UCTS0 (MTK_PIN_NO(168) | 5)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_SCL12 (MTK_PIN_NO(168) | 6)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_DBG_MON_B13 (MTK_PIN_NO(168) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO169__FUNC_GPIO169 (MTK_PIN_NO(169) | 0)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_ANT_SEL7 (MTK_PIN_NO(169) | 1)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_SPI0_B_CSB (MTK_PIN_NO(169) | 2)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_TP_URTS1_AO (MTK_PIN_NO(169) | 3)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_KPROW2 (MTK_PIN_NO(169) | 4)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_MD_URTS0 (MTK_PIN_NO(169) | 5)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_SDA12 (MTK_PIN_NO(169) | 6)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_DBG_MON_B14 (MTK_PIN_NO(169) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO170__FUNC_GPIO170 (MTK_PIN_NO(170) | 0)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_ANT_SEL8 (MTK_PIN_NO(170) | 1)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SPI0_B_MI (MTK_PIN_NO(170) | 2)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_TP_UCTS2_AO (MTK_PIN_NO(170) | 3)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SRCLKENAI1 (MTK_PIN_NO(170) | 4)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_MD_UCTS1 (MTK_PIN_NO(170) | 5)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SCL13 (MTK_PIN_NO(170) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO171__FUNC_GPIO171 (MTK_PIN_NO(171) | 0)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_ANT_SEL9 (MTK_PIN_NO(171) | 1)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_SPI0_B_MO (MTK_PIN_NO(171) | 2)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_TP_URTS2_AO (MTK_PIN_NO(171) | 3)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_SRCLKENAI0 (MTK_PIN_NO(171) | 4)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_MD_URTS1 (MTK_PIN_NO(171) | 5)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_SDA13 (MTK_PIN_NO(171) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO172__FUNC_GPIO172 (MTK_PIN_NO(172) | 0)</div><div class='add'>+#define PINMUX_GPIO172__FUNC_CONN_TOP_CLK (MTK_PIN_NO(172) | 1)</div><div class='add'>+#define PINMUX_GPIO172__FUNC_AUXIF_CLK0 (MTK_PIN_NO(172) | 2)</div><div class='add'>+#define PINMUX_GPIO172__FUNC_DBG_MON_B18 (MTK_PIN_NO(172) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO173__FUNC_GPIO173 (MTK_PIN_NO(173) | 0)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_CONN_TOP_DATA (MTK_PIN_NO(173) | 1)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_AUXIF_ST0 (MTK_PIN_NO(173) | 2)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_DBG_MON_B19 (MTK_PIN_NO(173) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO174__FUNC_GPIO174 (MTK_PIN_NO(174) | 0)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_CONN_HRST_B (MTK_PIN_NO(174) | 1)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_DBG_MON_B17 (MTK_PIN_NO(174) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO175__FUNC_GPIO175 (MTK_PIN_NO(175) | 0)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_CONN_WB_PTA (MTK_PIN_NO(175) | 1)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_DBG_MON_B20 (MTK_PIN_NO(175) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO176__FUNC_GPIO176 (MTK_PIN_NO(176) | 0)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_CONN_BT_CLK (MTK_PIN_NO(176) | 1)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_AUXIF_CLK1 (MTK_PIN_NO(176) | 2)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_DBG_MON_B15 (MTK_PIN_NO(176) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO177__FUNC_GPIO177 (MTK_PIN_NO(177) | 0)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_CONN_BT_DATA (MTK_PIN_NO(177) | 1)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_AUXIF_ST1 (MTK_PIN_NO(177) | 2)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_DBG_MON_B16 (MTK_PIN_NO(177) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO178__FUNC_GPIO178 (MTK_PIN_NO(178) | 0)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_CONN_WF_CTRL0 (MTK_PIN_NO(178) | 1)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_DBG_MON_B21 (MTK_PIN_NO(178) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO179__FUNC_GPIO179 (MTK_PIN_NO(179) | 0)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_CONN_WF_CTRL1 (MTK_PIN_NO(179) | 1)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(179) | 2)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_DBG_MON_B22 (MTK_PIN_NO(179) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO180__FUNC_GPIO180 (MTK_PIN_NO(180) | 0)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_CONN_WF_CTRL2 (MTK_PIN_NO(180) | 1)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(180) | 2)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_DBG_MON_B23 (MTK_PIN_NO(180) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_CONN_WF_CTRL3 (MTK_PIN_NO(181) | 1)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_UFS_UNIPRO_SDA (MTK_PIN_NO(181) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO182__FUNC_GPIO182 (MTK_PIN_NO(182) | 0)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_CONN_WF_CTRL4 (MTK_PIN_NO(182) | 1)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_UFS_UNIPRO_SCL (MTK_PIN_NO(182) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO183__FUNC_GPIO183 (MTK_PIN_NO(183) | 0)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_MSDC0_CMD (MTK_PIN_NO(183) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO184__FUNC_GPIO184 (MTK_PIN_NO(184) | 0)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_MSDC0_DAT0 (MTK_PIN_NO(184) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO185__FUNC_GPIO185 (MTK_PIN_NO(185) | 0)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_MSDC0_DAT2 (MTK_PIN_NO(185) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO186__FUNC_GPIO186 (MTK_PIN_NO(186) | 0)</div><div class='add'>+#define PINMUX_GPIO186__FUNC_MSDC0_DAT4 (MTK_PIN_NO(186) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO187__FUNC_GPIO187 (MTK_PIN_NO(187) | 0)</div><div class='add'>+#define PINMUX_GPIO187__FUNC_MSDC0_DAT6 (MTK_PIN_NO(187) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO188__FUNC_GPIO188 (MTK_PIN_NO(188) | 0)</div><div class='add'>+#define PINMUX_GPIO188__FUNC_MSDC0_DAT1 (MTK_PIN_NO(188) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO189__FUNC_GPIO189 (MTK_PIN_NO(189) | 0)</div><div class='add'>+#define PINMUX_GPIO189__FUNC_MSDC0_DAT5 (MTK_PIN_NO(189) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO190__FUNC_GPIO190 (MTK_PIN_NO(190) | 0)</div><div class='add'>+#define PINMUX_GPIO190__FUNC_MSDC0_DAT7 (MTK_PIN_NO(190) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO191__FUNC_GPIO191 (MTK_PIN_NO(191) | 0)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_MSDC0_DSL (MTK_PIN_NO(191) | 1)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(191) | 2)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_IDDIG (MTK_PIN_NO(191) | 3)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_DMIC_CLK (MTK_PIN_NO(191) | 4)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_DSI1_TE (MTK_PIN_NO(191) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO192__FUNC_GPIO192 (MTK_PIN_NO(192) | 0)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_MSDC0_CLK (MTK_PIN_NO(192) | 1)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(192) | 2)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_USB_DRVVBUS (MTK_PIN_NO(192) | 3)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_DMIC_DAT (MTK_PIN_NO(192) | 4)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_LCM1_RST (MTK_PIN_NO(192) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0)</div><div class='add'>+#define PINMUX_GPIO193__FUNC_MSDC0_DAT3 (MTK_PIN_NO(193) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO194__FUNC_GPIO194 (MTK_PIN_NO(194) | 0)</div><div class='add'>+#define PINMUX_GPIO194__FUNC_MSDC0_RSTB (MTK_PIN_NO(194) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO195__FUNC_GPIO195 (MTK_PIN_NO(195) | 0)</div><div class='add'>+#define PINMUX_GPIO195__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(195) | 1)</div><div class='add'>+#define PINMUX_GPIO195__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(195) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO196__FUNC_GPIO196 (MTK_PIN_NO(196) | 0)</div><div class='add'>+#define PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2 (MTK_PIN_NO(196) | 1)</div><div class='add'>+#define PINMUX_GPIO196__FUNC_DBG_MON_B27 (MTK_PIN_NO(196) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO197__FUNC_GPIO197 (MTK_PIN_NO(197) | 0)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1 (MTK_PIN_NO(197) | 1)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_AUD_CLK_MISO (MTK_PIN_NO(197) | 2)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_I2S2_MCK (MTK_PIN_NO(197) | 3)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_I2S6_MCK (MTK_PIN_NO(197) | 4)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_I2S8_MCK (MTK_PIN_NO(197) | 5)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_UFS_UNIPRO_SDA (MTK_PIN_NO(197) | 6)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_DBG_MON_B28 (MTK_PIN_NO(197) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO198__FUNC_GPIO198 (MTK_PIN_NO(198) | 0)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0 (MTK_PIN_NO(198) | 1)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_AUD_SYNC_MISO (MTK_PIN_NO(198) | 2)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_I2S2_BCK (MTK_PIN_NO(198) | 3)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_I2S6_BCK (MTK_PIN_NO(198) | 4)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_I2S8_BCK (MTK_PIN_NO(198) | 5)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_DBG_MON_B29 (MTK_PIN_NO(198) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO199__FUNC_GPIO199 (MTK_PIN_NO(199) | 0)</div><div class='add'>+#define PINMUX_GPIO199__FUNC_AUD_DAT_MISO2 (MTK_PIN_NO(199) | 1)</div><div class='add'>+#define PINMUX_GPIO199__FUNC_I2S2_DI2 (MTK_PIN_NO(199) | 3)</div><div class='add'>+#define PINMUX_GPIO199__FUNC_DBG_MON_B32 (MTK_PIN_NO(199) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO200__FUNC_GPIO200 (MTK_PIN_NO(200) | 0)</div><div class='add'>+#define PINMUX_GPIO200__FUNC_SCL6 (MTK_PIN_NO(200) | 1)</div><div class='add'>+#define PINMUX_GPIO200__FUNC_SCP_SCL0 (MTK_PIN_NO(200) | 2)</div><div class='add'>+#define PINMUX_GPIO200__FUNC_SCP_SCL1 (MTK_PIN_NO(200) | 3)</div><div class='add'>+#define PINMUX_GPIO200__FUNC_SCL_6306 (MTK_PIN_NO(200) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO201__FUNC_GPIO201 (MTK_PIN_NO(201) | 0)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_SDA6 (MTK_PIN_NO(201) | 1)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_SCP_SDA0 (MTK_PIN_NO(201) | 2)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_SCP_SDA1 (MTK_PIN_NO(201) | 3)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_SDA_6306 (MTK_PIN_NO(201) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO202__FUNC_GPIO202 (MTK_PIN_NO(202) | 0)</div><div class='add'>+#define PINMUX_GPIO202__FUNC_SCL5 (MTK_PIN_NO(202) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO203__FUNC_GPIO203 (MTK_PIN_NO(203) | 0)</div><div class='add'>+#define PINMUX_GPIO203__FUNC_SDA5 (MTK_PIN_NO(203) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO204__FUNC_GPIO204 (MTK_PIN_NO(204) | 0)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_SCL0 (MTK_PIN_NO(204) | 1)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_SPI4_C_CLK (MTK_PIN_NO(204) | 2)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_SPI7_B_CLK (MTK_PIN_NO(204) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO205__FUNC_GPIO205 (MTK_PIN_NO(205) | 0)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_SDA0 (MTK_PIN_NO(205) | 1)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_SPI4_C_CSB (MTK_PIN_NO(205) | 2)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_SPI7_B_CSB (MTK_PIN_NO(205) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO206__FUNC_GPIO206 (MTK_PIN_NO(206) | 0)</div><div class='add'>+#define PINMUX_GPIO206__FUNC_SRCLKENA0 (MTK_PIN_NO(206) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO207__FUNC_GPIO207 (MTK_PIN_NO(207) | 0)</div><div class='add'>+#define PINMUX_GPIO207__FUNC_SRCLKENA1 (MTK_PIN_NO(207) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO208__FUNC_GPIO208 (MTK_PIN_NO(208) | 0)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_WATCHDOG (MTK_PIN_NO(208) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO209__FUNC_GPIO209 (MTK_PIN_NO(209) | 0)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(209) | 1)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(209) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO210__FUNC_GPIO210 (MTK_PIN_NO(210) | 0)</div><div class='add'>+#define PINMUX_GPIO210__FUNC_PWRAP_SPI0_CSN (MTK_PIN_NO(210) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO211__FUNC_GPIO211 (MTK_PIN_NO(211) | 0)</div><div class='add'>+#define PINMUX_GPIO211__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(211) | 1)</div><div class='add'>+#define PINMUX_GPIO211__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(211) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO212__FUNC_GPIO212 (MTK_PIN_NO(212) | 0)</div><div class='add'>+#define PINMUX_GPIO212__FUNC_PWRAP_SPI0_CK (MTK_PIN_NO(212) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO213__FUNC_GPIO213 (MTK_PIN_NO(213) | 0)</div><div class='add'>+#define PINMUX_GPIO213__FUNC_RTC32K_CK (MTK_PIN_NO(213) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO214__FUNC_GPIO214 (MTK_PIN_NO(214) | 0)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(214) | 1)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_I2S1_MCK (MTK_PIN_NO(214) | 3)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_I2S7_MCK (MTK_PIN_NO(214) | 4)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_I2S9_MCK (MTK_PIN_NO(214) | 5)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_UFS_UNIPRO_SCL (MTK_PIN_NO(214) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO215__FUNC_GPIO215 (MTK_PIN_NO(215) | 0)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI (MTK_PIN_NO(215) | 1)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_I2S1_BCK (MTK_PIN_NO(215) | 3)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_I2S7_BCK (MTK_PIN_NO(215) | 4)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_I2S9_BCK (MTK_PIN_NO(215) | 5)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_DBG_MON_B24 (MTK_PIN_NO(215) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO216__FUNC_GPIO216 (MTK_PIN_NO(216) | 0)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(216) | 1)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_I2S1_LRCK (MTK_PIN_NO(216) | 3)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_I2S7_LRCK (MTK_PIN_NO(216) | 4)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_I2S9_LRCK (MTK_PIN_NO(216) | 5)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_DBG_MON_B25 (MTK_PIN_NO(216) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO217__FUNC_GPIO217 (MTK_PIN_NO(217) | 0)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(217) | 1)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_I2S1_DO (MTK_PIN_NO(217) | 3)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_I2S7_DO (MTK_PIN_NO(217) | 4)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_I2S9_DO (MTK_PIN_NO(217) | 5)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(217) | 6)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_DBG_MON_B26 (MTK_PIN_NO(217) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO218__FUNC_GPIO218 (MTK_PIN_NO(218) | 0)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(218) | 1)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_VOW_DAT_MISO (MTK_PIN_NO(218) | 2)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_I2S2_LRCK (MTK_PIN_NO(218) | 3)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_I2S6_LRCK (MTK_PIN_NO(218) | 4)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_I2S8_LRCK (MTK_PIN_NO(218) | 5)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_DBG_MON_B30 (MTK_PIN_NO(218) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO219__FUNC_GPIO219 (MTK_PIN_NO(219) | 0)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(219) | 1)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_VOW_CLK_MISO (MTK_PIN_NO(219) | 2)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_I2S2_DI (MTK_PIN_NO(219) | 3)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_I2S6_DI (MTK_PIN_NO(219) | 4)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_I2S8_DI (MTK_PIN_NO(219) | 5)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(219) | 6)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_DBG_MON_B31 (MTK_PIN_NO(219) | 7)</div><div class='add'>+</div><div class='add'>+#endif /* __MT6893-PINFUNC_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts<br/>index d12eac9b3eeb..9f100b18a676 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts</a></div><div class='hunk'>@@ -320,7 +320,7 @@</div><div class='ctx'> 	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and</div><div class='ctx'> 	 * SATA functions. i.e. output-high: PCIe, output-low: SATA</div><div class='ctx'> 	 */</div><div class='del'>-	asm_sel {</div><div class='add'>+	asm-sel-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;90 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi<br/>index 5cbea9cd411f..277c11247c13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7981b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7981b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7981b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7981b.dtsi</a></div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@1001e000 {</div><div class='add'>+		apmixedsys: clock-controller@1001e000 {</div><div class='ctx'> 			compatible = "mediatek,mt7981-apmixedsys";</div><div class='ctx'> 			reg = &lt;0 0x1001e000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -184,6 +184,31 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		thermal@1100c800 {</div><div class='add'>+			compatible = "mediatek,mt7981-thermal",</div><div class='add'>+				     "mediatek,mt7986-thermal";</div><div class='add'>+			reg = &lt;0 0x1100c800 0 0x800&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_THERM_CK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_ADC_26M_CK&gt;;</div><div class='add'>+			clock-names = "therm", "auxadc";</div><div class='add'>+			nvmem-cells = &lt;&amp;thermal_calibration&gt;;</div><div class='add'>+			nvmem-cell-names = "calibration-data";</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,auxadc = &lt;&amp;auxadc&gt;;</div><div class='add'>+			mediatek,apmixedsys = &lt;&amp;apmixedsys&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		auxadc: adc@1100d000 {</div><div class='add'>+			compatible = "mediatek,mt7981-auxadc",</div><div class='add'>+				     "mediatek,mt7986-auxadc";</div><div class='add'>+			reg = &lt;0 0x1100d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_ADC_26M_CK&gt;;</div><div class='add'>+			clock-names = "main";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pio: pinctrl@11d00000 {</div><div class='ctx'> 			compatible = "mediatek,mt7981-pinctrl";</div><div class='ctx'> 			reg = &lt;0 0x11d00000 0 0x1000&gt;,</div><div class='hunk'>@@ -211,6 +236,10 @@</div><div class='ctx'> 			reg = &lt;0 0x11f20000 0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			thermal_calibration: thermal-calib@274 {</div><div class='add'>+				reg = &lt;0x274 0xc&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		clock-controller@15000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts b/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts<br/>index 08b3b0827436..30805a610262 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts</a></div><div class='hunk'>@@ -98,8 +98,6 @@</div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "spi-nand";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;52000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;4&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso<br/>new file mode 100644<br/>index 000000000000..f7dd52981977<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3-sata.dtso</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2021 MediaTek Inc.</div><div class='add'>+ * Author: Frank Wunderlich &lt;frank-w@public-files.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "bananapi,bpi-r3", "mediatek,mt7986a";</div><div class='add'>+</div><div class='add'>+	reg_sata12v: regulator-sata12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "sata12v";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sata5v: regulator-sata5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "sata5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_sata12v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts<br/>index ed79ad1ae871..e7654dc9a1c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts</a></div><div class='hunk'>@@ -64,23 +64,19 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* i2c of the left SFP cage (wan) */</div><div class='del'>-	i2c_sfp1: i2c-gpio-0 {</div><div class='add'>+	i2c_sfp1: i2c-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* i2c of the right SFP cage (lan) */</div><div class='del'>-	i2c_sfp2: i2c-gpio-1 {</div><div class='add'>+	i2c_sfp2: i2c-1 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		scl-gpios = &lt;&amp;pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -204,8 +200,9 @@</div><div class='ctx'> 		compatible = "mediatek,mt7531";</div><div class='ctx'> 		reg = &lt;31&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;pio 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi<br/>index 559990dcd1d1..a8972330a7b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7986a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7986a.dtsi</a></div><div class='hunk'>@@ -428,16 +428,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie_phy: t-phy {</div><div class='add'>+		pcie_phy: t-phy@11c00000 {</div><div class='ctx'> 			compatible = "mediatek,mt7986-tphy",</div><div class='ctx'> 				     "mediatek,generic-tphy-v2";</div><div class='del'>-			ranges;</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x11c00000 0x20000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			pcie_port: pcie-phy@11c00000 {</div><div class='del'>-				reg = &lt;0 0x11c00000 0 0x20000&gt;;</div><div class='add'>+			pcie_port: pcie-phy@0 {</div><div class='add'>+				reg = &lt;0 0x20000&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clk40m&gt;;</div><div class='ctx'> 				clock-names = "ref";</div><div class='ctx'> 				#phy-cells = &lt;1&gt;;</div><div class='hunk'>@@ -523,11 +523,17 @@</div><div class='ctx'> </div><div class='ctx'> 		eth: ethernet@15100000 {</div><div class='ctx'> 			compatible = "mediatek,mt7986-eth";</div><div class='del'>-			reg = &lt;0 0x15100000 0 0x80000&gt;;</div><div class='add'>+			reg = &lt;0 0x15100000 0 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "fe0", "fe1", "fe2", "fe3", "pdma0",</div><div class='add'>+					  "pdma1", "pdma2", "pdma3";</div><div class='ctx'> 			clocks = &lt;&amp;ethsys CLK_ETH_FE_EN&gt;,</div><div class='ctx'> 				 &lt;&amp;ethsys CLK_ETH_GP2_EN&gt;,</div><div class='ctx'> 				 &lt;&amp;ethsys CLK_ETH_GP1_EN&gt;,</div><div class='hunk'>@@ -553,6 +559,7 @@</div><div class='ctx'> 					  &lt;&amp;topckgen CLK_TOP_SGM_325M_SEL&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;&amp;apmixedsys CLK_APMIXED_NET2PLL&gt;,</div><div class='ctx'> 						 &lt;&amp;apmixedsys CLK_APMIXED_SGMPLL&gt;;</div><div class='add'>+			sram = &lt;&amp;eth_sram&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='hunk'>@@ -562,6 +569,15 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/*15100000+0x40000*/</div><div class='add'>+		eth_sram: sram@15140000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0 0x15140000 0 0x40000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x15140000 0 0x40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		wo_ccif0: syscon@151a5000 {</div><div class='ctx'> 			compatible = "mediatek,mt7986-wo-ccif", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x151a5000 0 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts<br/>new file mode 100644<br/>index 000000000000..6f0c81e3fd94<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "mt7988a-bananapi-bpi-r4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "bananapi,bpi-r4-2g5", "bananapi,bpi-r4", "mediatek,mt7988a";</div><div class='add'>+	model = "Banana Pi BPI-R4 (1x SFP+, 1x 2.5GbE)";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	phy = &lt;&amp;int_2p5g_phy&gt;;</div><div class='add'>+	phy-mode = "internal";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;int_2p5g_phy {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2p5gbe_led0_pins&gt;;</div><div class='add'>+	pinctrl-names = "i2p5gbe-led";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso<br/>new file mode 100644<br/>index 000000000000..3e320b2f83d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-emmc.dtso</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2021 MediaTek Inc.</div><div class='add'>+ * Author: Frank Wunderlich &lt;frank-w@public-files.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{/soc/mmc@11230000} {</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_emmc_51&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc0_pins_emmc_51&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	hs400-ds-delay = &lt;0x12814&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso<br/>new file mode 100644<br/>index 000000000000..663c6345dd31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-sd.dtso</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 MediaTek Inc.</div><div class='add'>+ * Author: Frank Wunderlich &lt;frank-w@public-files.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{/soc/mmc@11230000} {</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_sdcard&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc0_pins_sdcard&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	max-frequency = &lt;52000000&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts<br/>index efc4ad0b08b8..4b3796ba82e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts</a></div><div class='hunk'>@@ -2,10 +2,37 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "mt7988a.dtsi"</div><div class='add'>+#include "mt7988a-bananapi-bpi-r4.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "bananapi,bpi-r4", "mediatek,mt7988a";</div><div class='del'>-	model = "Banana Pi BPI-R4";</div><div class='add'>+	model = "Banana Pi BPI-R4 (2x SFP+)";</div><div class='ctx'> 	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	/* SFP2 cage (LAN) */</div><div class='add'>+	sfp2: sfp2 {</div><div class='add'>+		compatible = "sff,sfp";</div><div class='add'>+		i2c-bus = &lt;&amp;i2c_sfp2&gt;;</div><div class='add'>+		maximum-power-milliwatt = &lt;3000&gt;;</div><div class='add'>+</div><div class='add'>+		los-gpios = &lt;&amp;pio 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mod-def0-gpios = &lt;&amp;pio 83 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rate-select0-gpios = &lt;&amp;pio 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		tx-disable-gpios = &lt;&amp;pio 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-fault-gpios = &lt;&amp;pio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	managed = "in-band-status";</div><div class='add'>+	phy-mode = "usxgmii";</div><div class='add'>+	sfp = &lt;&amp;sfp2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pca9545 {</div><div class='add'>+	i2c_sfp2: i2c@2 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi<br/>new file mode 100644<br/>index 000000000000..0ff69dae45d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,471 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/richtek,rt5190a-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mt7988a.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		ethernet2 = &amp;gmac2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		/* cooling level (0, 1, 2, 3) : (0% duty, 30% duty, 50% duty, 100% duty) */</div><div class='add'>+		cooling-levels = &lt;0 80 128 255&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 0 50000&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_green: led-green {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 79 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_blue: led-blue {</div><div class='add'>+			function = LED_FUNCTION_WPS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 63 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SFP1 cage (WAN) */</div><div class='add'>+	sfp1: sfp1 {</div><div class='add'>+		compatible = "sff,sfp";</div><div class='add'>+		i2c-bus = &lt;&amp;i2c_sfp1&gt;;</div><div class='add'>+		maximum-power-milliwatt = &lt;3000&gt;;</div><div class='add'>+</div><div class='add'>+		los-gpios = &lt;&amp;pio 54 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mod-def0-gpios = &lt;&amp;pio 82 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rate-select0-gpios = &lt;&amp;pio 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		tx-disable-gpios = &lt;&amp;pio 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		tx-fault-gpios = &lt;&amp;pio 69 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci {</div><div class='add'>+	proc-supply = &lt;&amp;rt5190_buck3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	proc-supply = &lt;&amp;rt5190_buck3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	proc-supply = &lt;&amp;rt5190_buck3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	proc-supply = &lt;&amp;rt5190_buck3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	proc-supply = &lt;&amp;rt5190_buck3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_thermal {</div><div class='add'>+	trips {</div><div class='add'>+		cpu_trip_hot: hot {</div><div class='add'>+			temperature = &lt;120000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "hot";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_trip_active_high: active-high {</div><div class='add'>+			temperature = &lt;115000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_trip_active_med: active-med {</div><div class='add'>+			temperature = &lt;85000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_trip_active_low: active-low {</div><div class='add'>+			temperature = &lt;40000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map-cpu-active-high {</div><div class='add'>+			/* active: set fan to cooling level 2 */</div><div class='add'>+			cooling-device = &lt;&amp;fan 3 3&gt;;</div><div class='add'>+			trip = &lt;&amp;cpu_trip_active_high&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map-cpu-active-med {</div><div class='add'>+			/* active: set fan to cooling level 1 */</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 2&gt;;</div><div class='add'>+			trip = &lt;&amp;cpu_trip_active_med&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map-cpu-active-low {</div><div class='add'>+			/* active: set fan to cooling level 0 */</div><div class='add'>+			cooling-device = &lt;&amp;fan 1 1&gt;;</div><div class='add'>+			trip = &lt;&amp;cpu_trip_active_low&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2 {</div><div class='add'>+	managed = "in-band-status";</div><div class='add'>+	phy-mode = "usxgmii";</div><div class='add'>+	sfp = &lt;&amp;sfp1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;gbe0_led0_pins&gt;;</div><div class='add'>+	pinctrl-names = "gbe-led";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy0_led0 {</div><div class='add'>+	function = LED_FUNCTION_WAN;</div><div class='add'>+	color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_port0 {</div><div class='add'>+	label = "wan";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;gbe1_led0_pins&gt;;</div><div class='add'>+	pinctrl-names = "gbe-led";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy1_led0 {</div><div class='add'>+	function = LED_FUNCTION_LAN;</div><div class='add'>+	color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_port1 {</div><div class='add'>+	label = "lan1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;gbe2_led0_pins&gt;;</div><div class='add'>+	pinctrl-names = "gbe-led";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy2_led0 {</div><div class='add'>+	function = LED_FUNCTION_LAN;</div><div class='add'>+	color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_port2 {</div><div class='add'>+	label = "lan2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;gbe3_led0_pins&gt;;</div><div class='add'>+	pinctrl-names = "gbe-led";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_phy3_led0 {</div><div class='add'>+	function = LED_FUNCTION_LAN;</div><div class='add'>+	color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gsw_port3 {</div><div class='add'>+	label = "lan3";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rt5190a_64: rt5190a@64 {</div><div class='add'>+		compatible = "richtek,rt5190a";</div><div class='add'>+		reg = &lt;0x64&gt;;</div><div class='add'>+		vin2-supply = &lt;&amp;rt5190_buck1&gt;;</div><div class='add'>+		vin3-supply = &lt;&amp;rt5190_buck1&gt;;</div><div class='add'>+		vin4-supply = &lt;&amp;rt5190_buck1&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			rt5190_buck1: buck1 {</div><div class='add'>+				regulator-name = "rt5190a-buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;5090000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;5090000&gt;;</div><div class='add'>+				regulator-allowed-modes =</div><div class='add'>+				&lt;RT5190A_OPMODE_AUTO&gt;, &lt;RT5190A_OPMODE_FPWM&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+			buck2 {</div><div class='add'>+				regulator-name = "vcore";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+			rt5190_buck3: buck3 {</div><div class='add'>+				regulator-name = "vproc";</div><div class='add'>+				regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+			};</div><div class='add'>+			buck4 {</div><div class='add'>+				regulator-name = "rt5190a-buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-allowed-modes =</div><div class='add'>+				&lt;RT5190A_OPMODE_AUTO&gt;, &lt;RT5190A_OPMODE_FPWM&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+			ldo {</div><div class='add'>+				regulator-name = "rt5190a-ldo";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9545: i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9545";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			pcf8563: rtc@51 {</div><div class='add'>+				compatible = "nxp,pcf8563";</div><div class='add'>+				reg = &lt;0x51&gt;;</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eeprom@57 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x57&gt;;</div><div class='add'>+				size = &lt;256&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c_sfp1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mPCIe SIM2 */</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mPCIe SIM3 */</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* M.2 key-B SIM1 */</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* M.2 key-M SSD */</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	i2c0_pins: i2c0-g0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "i2c";</div><div class='add'>+			groups = "i2c0_1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-g0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "i2c";</div><div class='add'>+			groups = "i2c1_0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_1_pins: i2c2-g1-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "i2c";</div><div class='add'>+			groups = "i2c2_1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gbe0_led0_pins: gbe0-led0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "led";</div><div class='add'>+			groups = "gbe0_led0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gbe1_led0_pins: gbe1-led0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "led";</div><div class='add'>+			groups = "gbe1_led0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gbe2_led0_pins: gbe2-led0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "led";</div><div class='add'>+			groups = "gbe2_led0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gbe3_led0_pins: gbe3-led0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "led";</div><div class='add'>+			groups = "gbe3_led0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2p5gbe_led0_pins: 2p5gbe-led0-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "led";</div><div class='add'>+			groups = "2p5gbe_led0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_pins_emmc_45: mmc0-emmc-45-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "flash";</div><div class='add'>+			groups = "emmc_45";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_pins_emmc_51: mmc0-emmc-51-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "flash";</div><div class='add'>+			groups = "emmc_51";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_pins_sdcard: mmc0-sdcard-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "flash";</div><div class='add'>+			groups = "sdcard";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_flash_pins: spi0-flash-pins {</div><div class='add'>+		mux {</div><div class='add'>+			function = "spi";</div><div class='add'>+			groups = "spi0", "spi0_wp_hold";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_flash_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spi_nand: flash@0 {</div><div class='add'>+		compatible = "spi-nand";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;52000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi_nand {</div><div class='add'>+	partitions {</div><div class='add'>+		compatible = "fixed-partitions";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		partition@0 {</div><div class='add'>+			label = "bl2";</div><div class='add'>+			reg = &lt;0x0 0x200000&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssusb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xsphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi<br/>index aa728331e876..366203a72d6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt7988a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt7988a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt7988a.dtsi</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/mediatek,mt7988-clk.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/mt65xx.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/mediatek,mt7988-resets.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "mediatek,mt7988a";</div><div class='hunk'>@@ -10,36 +12,107 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	cci: cci {</div><div class='add'>+		compatible = "mediatek,mt7988-cci", "mediatek,mt8183-cci";</div><div class='add'>+		clocks = &lt;&amp;mcusys CLK_MCU_BUS_DIV_SEL&gt;,</div><div class='add'>+			 &lt;&amp;topckgen CLK_TOP_XTAL&gt;;</div><div class='add'>+		clock-names = "cci", "intermediate";</div><div class='add'>+		operating-points-v2 = &lt;&amp;cci_opp&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cci_opp: opp-table-cci {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+		opp-480000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;480000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-660000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;660000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-900000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;900000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1080000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1080000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;mcusys CLK_MCU_ARM_DIV_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XTAL&gt;;</div><div class='add'>+			clock-names = "cpu", "intermediate";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+			mediatek,cci = &lt;&amp;cci&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;mcusys CLK_MCU_ARM_DIV_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XTAL&gt;;</div><div class='add'>+			clock-names = "cpu", "intermediate";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+			mediatek,cci = &lt;&amp;cci&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;mcusys CLK_MCU_ARM_DIV_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XTAL&gt;;</div><div class='add'>+			clock-names = "cpu", "intermediate";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+			mediatek,cci = &lt;&amp;cci&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;mcusys CLK_MCU_ARM_DIV_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XTAL&gt;;</div><div class='add'>+			clock-names = "cpu", "intermediate";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+			mediatek,cci = &lt;&amp;cci&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster0_opp: opp-table-0 {</div><div class='add'>+			compatible = "operating-points-v2";</div><div class='add'>+			opp-shared;</div><div class='add'>+</div><div class='add'>+			opp-800000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-1100000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1100000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-1500000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1500000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			};</div><div class='add'>+			opp-1800000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+				opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -61,6 +134,18 @@</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */</div><div class='add'>+		secmon@43000000 {</div><div class='add'>+			reg = &lt;0 0x43000000 0 0x50000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -84,9 +169,10 @@</div><div class='ctx'> 			compatible = "mediatek,mt7988-infracfg", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@1001b000 {</div><div class='add'>+		topckgen: clock-controller@1001b000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-topckgen", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x1001b000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -99,13 +185,80 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@1001e000 {</div><div class='add'>+		apmixedsys: clock-controller@1001e000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-apmixedsys";</div><div class='ctx'> 			reg = &lt;0 0x1001e000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pwm@10048000 {</div><div class='add'>+		pio: pinctrl@1001f000 {</div><div class='add'>+			compatible = "mediatek,mt7988-pinctrl";</div><div class='add'>+			reg = &lt;0 0x1001f000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11c10000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11d00000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11d20000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11e00000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11f00000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='add'>+			reg-names = "gpio", "iocfg_tr",</div><div class='add'>+				    "iocfg_br", "iocfg_rb",</div><div class='add'>+				    "iocfg_lb", "iocfg_tl", "eint";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pio 0 0 84&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			pcie0_pins: pcie0-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "pcie";</div><div class='add'>+					groups = "pcie_2l_0_pereset", "pcie_clk_req_n0_0",</div><div class='add'>+						 "pcie_wake_n0_0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie1_pins: pcie1-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "pcie";</div><div class='add'>+					groups = "pcie_2l_1_pereset", "pcie_clk_req_n1",</div><div class='add'>+						 "pcie_wake_n1_0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie2_pins: pcie2-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "pcie";</div><div class='add'>+					groups = "pcie_1l_0_pereset", "pcie_clk_req_n2_0",</div><div class='add'>+						 "pcie_wake_n2_0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie3_pins: pcie3-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "pcie";</div><div class='add'>+					groups = "pcie_1l_1_pereset", "pcie_clk_req_n3",</div><div class='add'>+						 "pcie_wake_n3_0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1_pins: spi1-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "spi";</div><div class='add'>+					groups = "spi1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0_pins: uart0-pins {</div><div class='add'>+				mux {</div><div class='add'>+					function = "uart";</div><div class='add'>+					groups =  "uart0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm: pwm@10048000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-pwm";</div><div class='ctx'> 			reg = &lt;0 0x10048000 0 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_66M_PWM_BCK&gt;,</div><div class='hunk'>@@ -124,11 +277,53 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c@11003000 {</div><div class='add'>+		mcusys: mcusys@100e0000 {</div><div class='add'>+			compatible = "mediatek,mt7988-mcusys", "syscon";</div><div class='add'>+			reg = &lt;0 0x100e0000 0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@11000000 {</div><div class='add'>+			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";</div><div class='add'>+			reg = &lt;0 0x11000000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uart", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_UART_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_52M_UART0_CK&gt;;</div><div class='add'>+			clock-names = "baud", "bus";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@11000100 {</div><div class='add'>+			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";</div><div class='add'>+			reg = &lt;0 0x11000100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uart", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_UART_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_52M_UART1_CK&gt;;</div><div class='add'>+			clock-names = "baud", "bus";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@11000200 {</div><div class='add'>+			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";</div><div class='add'>+			reg = &lt;0 0x11000200 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uart", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_UART_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_52M_UART2_CK&gt;;</div><div class='add'>+			clock-names = "baud", "bus";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@11003000 {</div><div class='ctx'> 			compatible = "mediatek,mt7981-i2c";</div><div class='ctx'> 			reg = &lt;0 0x11003000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x10217080 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-div = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_I2C_BCK&gt;,</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_66M_AP_DMA_BCK&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='hunk'>@@ -137,11 +332,12 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c@11004000 {</div><div class='add'>+		i2c1: i2c@11004000 {</div><div class='ctx'> 			compatible = "mediatek,mt7981-i2c";</div><div class='ctx'> 			reg = &lt;0 0x11004000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x10217100 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-div = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_I2C_BCK&gt;,</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_66M_AP_DMA_BCK&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='hunk'>@@ -150,11 +346,12 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		i2c@11005000 {</div><div class='add'>+		i2c2: i2c@11005000 {</div><div class='ctx'> 			compatible = "mediatek,mt7981-i2c";</div><div class='ctx'> 			reg = &lt;0 0x11005000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x10217180 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-div = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;infracfg CLK_INFRA_I2C_BCK&gt;,</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_66M_AP_DMA_BCK&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='hunk'>@@ -163,6 +360,64 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi0: spi@11007000 {</div><div class='add'>+			compatible = "mediatek,mt7988-spi-quad", "mediatek,spi-ipm";</div><div class='add'>+			reg = &lt;0 0x11007000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_MPLL_D2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SPI_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_104M_SPI0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_66M_SPI0_HCK&gt;;</div><div class='add'>+			clock-names = "parent-clk", "sel-clk", "spi-clk",</div><div class='add'>+				      "hclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@11008000 {</div><div class='add'>+			compatible = "mediatek,mt7988-spi-single", "mediatek,spi-ipm";</div><div class='add'>+			reg = &lt;0 0x11008000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_MPLL_D2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SPIM_MST_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_104M_SPI1&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_66M_SPI1_HCK&gt;;</div><div class='add'>+			clock-names = "parent-clk", "sel-clk", "spi-clk",</div><div class='add'>+				      "hclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@11009000 {</div><div class='add'>+			compatible = "mediatek,mt7988-spi-quad", "mediatek,spi-ipm";</div><div class='add'>+			reg = &lt;0 0x11009000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_MPLL_D2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SPI_SEL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_104M_SPI2_BCK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_66M_SPI2_HCK&gt;;</div><div class='add'>+			clock-names = "parent-clk", "sel-clk", "spi-clk",</div><div class='add'>+				      "hclk";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lvts: lvts@1100a000 {</div><div class='add'>+			compatible = "mediatek,mt7988-lvts-ap";</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0 0x1100a000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_26M_THERM_SYSTEM&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST&gt;;</div><div class='add'>+			nvmem-cells = &lt;&amp;lvts_calibration&gt;;</div><div class='add'>+			nvmem-cell-names = "lvts-calib-data-1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb@11190000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";</div><div class='ctx'> 			reg = &lt;0 0x11190000 0 0x2e00&gt;,</div><div class='hunk'>@@ -175,9 +430,12 @@</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_133M_USB_HCK&gt;,</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_USB_XHCI&gt;;</div><div class='ctx'> 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";</div><div class='add'>+			phys = &lt;&amp;xphyu2port0 PHY_TYPE_USB2&gt;,</div><div class='add'>+			       &lt;&amp;xphyu3port0 PHY_TYPE_USB3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb@11200000 {</div><div class='add'>+		ssusb1: usb@11200000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";</div><div class='ctx'> 			reg = &lt;0 0x11200000 0 0x2e00&gt;,</div><div class='ctx'> 			      &lt;0 0x11203e00 0 0x0100&gt;;</div><div class='hunk'>@@ -189,28 +447,580 @@</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_133M_USB_HCK_CK_P1&gt;,</div><div class='ctx'> 				 &lt;&amp;infracfg CLK_INFRA_USB_XHCI_CK_P1&gt;;</div><div class='ctx'> 			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";</div><div class='add'>+			phys = &lt;&amp;tphyu2port0 PHY_TYPE_USB2&gt;,</div><div class='add'>+			       &lt;&amp;tphyu3port0 PHY_TYPE_USB3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc0: mmc@11230000 {</div><div class='add'>+			compatible = "mediatek,mt7988-mmc";</div><div class='add'>+			reg = &lt;0 0x11230000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11D60000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_MSDC400&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_MSDC2_HCK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_66M_MSDC_0_HCK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_133M_MSDC_0_HCK&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_EMMC_250M_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_EMMC_400M_SEL&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_NET1PLL_D5_D2&gt;,</div><div class='add'>+						 &lt;&amp;apmixedsys CLK_APMIXED_MSDCPLL&gt;;</div><div class='add'>+			clock-names = "source", "hclk", "axi_cg", "ahb_cg";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2: pcie@11280000 {</div><div class='add'>+			compatible = "mediatek,mt7986-pcie",</div><div class='add'>+				     "mediatek,mt8192-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0 0x11280000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+			linux,pci-domain = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			ranges = &lt;0x81000000 0x00 0x20000000 0x00</div><div class='add'>+				  0x20000000 0x00 0x00200000&gt;,</div><div class='add'>+				 &lt;0x82000000 0x00 0x20200000 0x00</div><div class='add'>+				  0x20200000 0x00 0x07e00000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_PCIE_PIPE_P2&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_GFMUX_TL_P2&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_PERI_26M_CK_P2&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_133M_PCIE_CK_P2&gt;;</div><div class='add'>+			clock-names = "pl_250m", "tl_26m", "peri_26m",</div><div class='add'>+				      "top_133m";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie2_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;xphyu3port0 PHY_TYPE_PCIE&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc2 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc2 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc2 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc2 3&gt;;</div><div class='add'>+			pcie_intc2: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3: pcie@11290000 {</div><div class='add'>+			compatible = "mediatek,mt7986-pcie",</div><div class='add'>+				     "mediatek,mt8192-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0 0x11290000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+			linux,pci-domain = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			ranges = &lt;0x81000000 0x00 0x28000000 0x00</div><div class='add'>+				  0x28000000 0x00 0x00200000&gt;,</div><div class='add'>+				 &lt;0x82000000 0x00 0x28200000 0x00</div><div class='add'>+				  0x28200000 0x00 0x07e00000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_PCIE_PIPE_P3&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_GFMUX_TL_P3&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_PERI_26M_CK_P3&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_133M_PCIE_CK_P3&gt;;</div><div class='add'>+			clock-names = "pl_250m", "tl_26m", "peri_26m",</div><div class='add'>+				      "top_133m";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie3_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc3 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc3 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc3 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc3 3&gt;;</div><div class='add'>+			pcie_intc3: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@11300000 {</div><div class='add'>+			compatible = "mediatek,mt7986-pcie",</div><div class='add'>+				     "mediatek,mt8192-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0 0x11300000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			ranges = &lt;0x81000000 0x00 0x30000000 0x00</div><div class='add'>+				  0x30000000 0x00 0x00200000&gt;,</div><div class='add'>+				 &lt;0x82000000 0x00 0x30200000 0x00</div><div class='add'>+				  0x30200000 0x00 0x07e00000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_PCIE_PIPE_P0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_GFMUX_TL_P0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_PERI_26M_CK_P0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_133M_PCIE_CK_P0&gt;;</div><div class='add'>+			clock-names = "pl_250m", "tl_26m", "peri_26m",</div><div class='add'>+				      "top_133m";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie0_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc0 3&gt;;</div><div class='add'>+			pcie_intc0: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@11310000 {</div><div class='add'>+			compatible = "mediatek,mt7986-pcie",</div><div class='add'>+				     "mediatek,mt8192-pcie";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0 0x11310000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			ranges = &lt;0x81000000 0x00 0x38000000 0x00</div><div class='add'>+				  0x38000000 0x00 0x00200000&gt;,</div><div class='add'>+				 &lt;0x82000000 0x00 0x38200000 0x00</div><div class='add'>+				  0x38200000 0x00 0x07e00000&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg CLK_INFRA_PCIE_PIPE_P1&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_GFMUX_TL_P1&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_PCIE_PERI_26M_CK_P1&gt;,</div><div class='add'>+				 &lt;&amp;infracfg CLK_INFRA_133M_PCIE_CK_P1&gt;;</div><div class='add'>+			clock-names = "pl_250m", "tl_26m", "peri_26m",</div><div class='add'>+				      "top_133m";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie1_pins&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc1 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc1 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc1 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc1 3&gt;;</div><div class='add'>+			pcie_intc1: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tphy: t-phy@11c50000 {</div><div class='add'>+			compatible = "mediatek,mt7986-tphy",</div><div class='add'>+				     "mediatek,generic-tphy-v2";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			tphyu2port0: usb-phy@11c50000 {</div><div class='add'>+				reg = &lt;0 0x11c50000 0 0x700&gt;;</div><div class='add'>+				clocks = &lt;&amp;infracfg CLK_INFRA_USB_UTMI_CK_P1&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tphyu3port0: usb-phy@11c50700 {</div><div class='add'>+				reg = &lt;0 0x11c50700 0 0x900&gt;;</div><div class='add'>+				clocks = &lt;&amp;infracfg CLK_INFRA_USB_PIPE_CK_P1&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		topmisc: system-controller@11d10084 {</div><div class='add'>+			compatible = "mediatek,mt7988-topmisc",</div><div class='add'>+				     "syscon";</div><div class='add'>+			reg = &lt;0 0x11d10084 0 0xff80&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xsphy: xs-phy@11e10000 {</div><div class='add'>+			compatible = "mediatek,mt7988-xsphy",</div><div class='add'>+				     "mediatek,xsphy";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			xphyu2port0: usb-phy@11e10000 {</div><div class='add'>+				reg = &lt;0 0x11e10000 0 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;infracfg CLK_INFRA_USB_UTMI&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			xphyu3port0: usb-phy@11e13000 {</div><div class='add'>+				reg = &lt;0 0x11e13400 0 0x500&gt;;</div><div class='add'>+				clocks = &lt;&amp;infracfg CLK_INFRA_USB_PIPE&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+				mediatek,syscon-type = &lt;&amp;topmisc 0x194 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xfi_tphy0: phy@11f20000 {</div><div class='add'>+			compatible = "mediatek,mt7988-xfi-tphy";</div><div class='add'>+			reg = &lt;0 0x11f20000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xfi_pll CLK_XFIPLL_PLL_EN&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL&gt;;</div><div class='add'>+			clock-names = "xfipll", "topxtal";</div><div class='add'>+			resets = &lt;&amp;watchdog 14&gt;;</div><div class='add'>+			mediatek,usxgmii-performance-errata;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xfi_tphy1: phy@11f30000 {</div><div class='add'>+			compatible = "mediatek,mt7988-xfi-tphy";</div><div class='add'>+			reg = &lt;0 0x11f30000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xfi_pll CLK_XFIPLL_PLL_EN&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_XFI_PHY_1_XTAL_SEL&gt;;</div><div class='add'>+			clock-names = "xfipll", "topxtal";</div><div class='add'>+			resets = &lt;&amp;watchdog 15&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@11f40000 {</div><div class='add'>+		xfi_pll: clock-controller@11f40000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-xfi-pll";</div><div class='ctx'> 			reg = &lt;0 0x11f40000 0 0x1000&gt;;</div><div class='ctx'> 			resets = &lt;&amp;watchdog 16&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@15000000 {</div><div class='add'>+		efuse@11f50000 {</div><div class='add'>+			compatible = "mediatek,mt7988-efuse", "mediatek,efuse";</div><div class='add'>+			reg = &lt;0 0x11f50000 0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			lvts_calibration: calib@918 {</div><div class='add'>+				reg = &lt;0x918 0x28&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			phy_calibration_p0: calib@940 {</div><div class='add'>+				reg = &lt;0x940 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			phy_calibration_p1: calib@954 {</div><div class='add'>+				reg = &lt;0x954 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			phy_calibration_p2: calib@968 {</div><div class='add'>+				reg = &lt;0x968 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			phy_calibration_p3: calib@97c {</div><div class='add'>+				reg = &lt;0x97c 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethsys: clock-controller@15000000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-ethsys", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x15000000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		clock-controller@15031000 {</div><div class='add'>+		switch: switch@15020000 {</div><div class='add'>+			compatible = "mediatek,mt7988-switch";</div><div class='add'>+			reg = &lt;0 0x15020000 0 0x8000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;ethwarp MT7988_ETHWARP_RST_SWITCH&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				gsw_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;gsw_phy0&gt;;</div><div class='add'>+					phy-mode = "internal";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;gsw_phy1&gt;;</div><div class='add'>+					phy-mode = "internal";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;gsw_phy2&gt;;</div><div class='add'>+					phy-mode = "internal";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					phy-handle = &lt;&amp;gsw_phy3&gt;;</div><div class='add'>+					phy-mode = "internal";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+					phy-mode = "internal";</div><div class='add'>+</div><div class='add'>+					fixed-link {</div><div class='add'>+						speed = &lt;10000&gt;;</div><div class='add'>+						full-duplex;</div><div class='add'>+						pause;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				mediatek,pio = &lt;&amp;pio&gt;;</div><div class='add'>+</div><div class='add'>+				gsw_phy0: ethernet-phy@0 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					interrupts = &lt;0&gt;;</div><div class='add'>+					nvmem-cells = &lt;&amp;phy_calibration_p0&gt;;</div><div class='add'>+					nvmem-cell-names = "phy-cal-data";</div><div class='add'>+</div><div class='add'>+					leds {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						gsw_phy0_led0: led@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						gsw_phy0_led1: led@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_phy1: ethernet-phy@1 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					interrupts = &lt;1&gt;;</div><div class='add'>+					nvmem-cells = &lt;&amp;phy_calibration_p1&gt;;</div><div class='add'>+					nvmem-cell-names = "phy-cal-data";</div><div class='add'>+</div><div class='add'>+					leds {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						gsw_phy1_led0: led@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						gsw_phy1_led1: led@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_phy2: ethernet-phy@2 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					interrupts = &lt;2&gt;;</div><div class='add'>+					nvmem-cells = &lt;&amp;phy_calibration_p2&gt;;</div><div class='add'>+					nvmem-cell-names = "phy-cal-data";</div><div class='add'>+</div><div class='add'>+					leds {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						gsw_phy2_led0: led@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						gsw_phy2_led1: led@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gsw_phy3: ethernet-phy@3 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					interrupts = &lt;3&gt;;</div><div class='add'>+					nvmem-cells = &lt;&amp;phy_calibration_p3&gt;;</div><div class='add'>+					nvmem-cell-names = "phy-cal-data";</div><div class='add'>+</div><div class='add'>+					leds {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						gsw_phy3_led0: led@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						gsw_phy3_led1: led@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+							status = "disabled";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethwarp: clock-controller@15031000 {</div><div class='ctx'> 			compatible = "mediatek,mt7988-ethwarp";</div><div class='ctx'> 			reg = &lt;0 0x15031000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		eth: ethernet@15100000 {</div><div class='add'>+			compatible = "mediatek,mt7988-eth";</div><div class='add'>+			reg = &lt;0 0x15100000 0 0x40000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "fe0", "fe1", "fe2", "fe3", "pdma0",</div><div class='add'>+					  "pdma1", "pdma2", "pdma3";</div><div class='add'>+			clocks = &lt;&amp;ethsys CLK_ETHDMA_CRYPT0_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_FE_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_GP2_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_GP1_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_GP3_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethwarp CLK_ETHWARP_WOCPU2_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethwarp CLK_ETHWARP_WOCPU1_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethwarp CLK_ETHWARP_WOCPU0_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_ESW_EN&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_GMII_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_REFCK_50M_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_SYS_200M_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_SYS_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_XGMII_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETH_MII_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_500M_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_PAO_2X_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_SYNC_250M_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_PPEFB_250M_SEL&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_NETSYS_WARP_SEL&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_XGP1_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_XGP2_EN&gt;,</div><div class='add'>+				 &lt;&amp;ethsys CLK_ETHDMA_XGP3_EN&gt;;</div><div class='add'>+			clock-names = "crypto", "fe", "gp2", "gp1", "gp3",</div><div class='add'>+				      "ethwarp_wocpu2", "ethwarp_wocpu1",</div><div class='add'>+				      "ethwarp_wocpu0", "esw", "top_eth_gmii_sel",</div><div class='add'>+				      "top_eth_refck_50m_sel", "top_eth_sys_200m_sel",</div><div class='add'>+				      "top_eth_sys_sel", "top_eth_xgmii_sel",</div><div class='add'>+				      "top_eth_mii_sel", "top_netsys_sel",</div><div class='add'>+				      "top_netsys_500m_sel", "top_netsys_pao_2x_sel",</div><div class='add'>+				      "top_netsys_sync_250m_sel",</div><div class='add'>+				      "top_netsys_ppefb_250m_sel",</div><div class='add'>+				      "top_netsys_warp_sel","xgp1", "xgp2", "xgp3";</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_NETSYS_2X_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_NETSYS_GSW_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_USXGMII_SBUS_0_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_USXGMII_SBUS_1_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_SGM_0_SEL&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_SGM_1_SEL&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;apmixedsys CLK_APMIXED_NET2PLL&gt;,</div><div class='add'>+						 &lt;&amp;topckgen CLK_TOP_NET1PLL_D4&gt;,</div><div class='add'>+						 &lt;&amp;topckgen CLK_TOP_NET1PLL_D8_D4&gt;,</div><div class='add'>+						 &lt;&amp;topckgen CLK_TOP_NET1PLL_D8_D4&gt;,</div><div class='add'>+						 &lt;&amp;apmixedsys CLK_APMIXED_SGMPLL&gt;,</div><div class='add'>+						 &lt;&amp;apmixedsys CLK_APMIXED_SGMPLL&gt;;</div><div class='add'>+			sram = &lt;&amp;eth_sram&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='add'>+			mediatek,infracfg = &lt;&amp;topmisc&gt;;</div><div class='add'>+</div><div class='add'>+			gmac0: mac@0 {</div><div class='add'>+				compatible = "mediatek,eth-mac";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				phy-mode = "internal";</div><div class='add'>+</div><div class='add'>+				/* Connected to internal switch */</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;10000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+					pause;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1: mac@1 {</div><div class='add'>+				compatible = "mediatek,eth-mac";</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac2: mac@2 {</div><div class='add'>+				compatible = "mediatek,eth-mac";</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdio_bus: mdio-bus {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				/* internal 2.5G PHY */</div><div class='add'>+				int_2p5g_phy: ethernet-phy@15 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+					reg = &lt;15&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth_sram: sram@15400000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0 0x15400000 0 0x200000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x15400000 0 0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu_thermal: cpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;lvts 0&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				cpu_trip_crit: crit {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi<br/>index 8d1cbc92bce3..dfc5c2f0ddef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> 		compatible = "melfas,mip4_ts";</div><div class='ctx'> 		reg = &lt;0x34&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 88 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -26,6 +27,7 @@</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x0020&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 88 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Lenovo Ideapad C330 uses G2Touch touchscreen as a 2nd source touchscreen */</div><div class='hunk'>@@ -35,6 +37,7 @@</div><div class='ctx'> 		hid-descr-addr = &lt;0x0001&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='ctx'> 		interrupts = &lt;88 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -47,9 +50,20 @@</div><div class='ctx'> 	trackpad2: trackpad@2c {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 117 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_irq&gt;;</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x0020&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * The trackpad needs a post-power-on delay of 100ms,</div><div class='add'>+		 * but at time of writing, the power supply for it on</div><div class='add'>+		 * this board is always on. The delay is therefore not</div><div class='add'>+		 * added to avoid impacting the readiness of the</div><div class='add'>+		 * trackpad.</div><div class='add'>+		 */</div><div class='add'>+		vdd-supply = &lt;&amp;mt6397_vgp6_reg&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -74,3 +88,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;touchscreen {</div><div class='add'>+	status = "fail-needs-probe";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;trackpad {</div><div class='add'>+	status = "fail-needs-probe";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi<br/>index b4d85147b77b..0d995b342d46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi</a></div><div class='hunk'>@@ -358,12 +358,12 @@</div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;trackpad_irq&gt;;</div><div class='ctx'> </div><div class='ctx'> 	trackpad: trackpad@15 {</div><div class='ctx'> 		compatible = "elan,ekth3000";</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 117 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_irq&gt;;</div><div class='ctx'> 		reg = &lt;0x15&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;mt6397_vgp6_reg&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='hunk'>@@ -925,13 +925,11 @@</div><div class='ctx'> &amp;pwrap {</div><div class='ctx'> 	pmic: pmic {</div><div class='ctx'> 		compatible = "mediatek,mt6397";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		clock: mt6397clock {</div><div class='add'>+		clock: clocks {</div><div class='ctx'> 			compatible = "mediatek,mt6397-clk";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -942,11 +940,10 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		regulator: mt6397regulator {</div><div class='add'>+		regulators {</div><div class='ctx'> 			compatible = "mediatek,mt6397-regulator";</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vpca15_reg: buck_vpca15 {</div><div class='del'>-				regulator-compatible = "buck_vpca15";</div><div class='ctx'> 				regulator-name = "vpca15";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -956,7 +953,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vpca7_reg: buck_vpca7 {</div><div class='del'>-				regulator-compatible = "buck_vpca7";</div><div class='ctx'> 				regulator-name = "vpca7";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -966,7 +962,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vsramca15_reg: buck_vsramca15 {</div><div class='del'>-				regulator-compatible = "buck_vsramca15";</div><div class='ctx'> 				regulator-name = "vsramca15";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -975,7 +970,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vsramca7_reg: buck_vsramca7 {</div><div class='del'>-				regulator-compatible = "buck_vsramca7";</div><div class='ctx'> 				regulator-name = "vsramca7";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -984,7 +978,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vcore_reg: buck_vcore {</div><div class='del'>-				regulator-compatible = "buck_vcore";</div><div class='ctx'> 				regulator-name = "vcore";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -993,7 +986,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgpu_reg: buck_vgpu {</div><div class='del'>-				regulator-compatible = "buck_vgpu";</div><div class='ctx'> 				regulator-name = "vgpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -1002,7 +994,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vdrm_reg: buck_vdrm {</div><div class='del'>-				regulator-compatible = "buck_vdrm";</div><div class='ctx'> 				regulator-name = "vdrm";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='hunk'>@@ -1011,7 +1002,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vio18_reg: buck_vio18 {</div><div class='del'>-				regulator-compatible = "buck_vio18";</div><div class='ctx'> 				regulator-name = "vio18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1980000&gt;;</div><div class='hunk'>@@ -1020,18 +1010,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vtcxo_reg: ldo_vtcxo {</div><div class='del'>-				regulator-compatible = "ldo_vtcxo";</div><div class='ctx'> 				regulator-name = "vtcxo";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_va28_reg: ldo_va28 {</div><div class='del'>-				regulator-compatible = "ldo_va28";</div><div class='ctx'> 				regulator-name = "va28";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vcama_reg: ldo_vcama {</div><div class='del'>-				regulator-compatible = "ldo_vcama";</div><div class='ctx'> 				regulator-name = "vcama";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -1039,18 +1026,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vio28_reg: ldo_vio28 {</div><div class='del'>-				regulator-compatible = "ldo_vio28";</div><div class='ctx'> 				regulator-name = "vio28";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vusb_reg: ldo_vusb {</div><div class='del'>-				regulator-compatible = "ldo_vusb";</div><div class='ctx'> 				regulator-name = "vusb";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vmc_reg: ldo_vmc {</div><div class='del'>-				regulator-compatible = "ldo_vmc";</div><div class='ctx'> 				regulator-name = "vmc";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1058,7 +1042,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vmch_reg: ldo_vmch {</div><div class='del'>-				regulator-compatible = "ldo_vmch";</div><div class='ctx'> 				regulator-name = "vmch";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1066,7 +1049,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vemc_3v3_reg: ldo_vemc3v3 {</div><div class='del'>-				regulator-compatible = "ldo_vemc3v3";</div><div class='ctx'> 				regulator-name = "vemc_3v3";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1074,7 +1056,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp1_reg: ldo_vgp1 {</div><div class='del'>-				regulator-compatible = "ldo_vgp1";</div><div class='ctx'> 				regulator-name = "vcamd";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -1082,7 +1063,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp2_reg: ldo_vgp2 {</div><div class='del'>-				regulator-compatible = "ldo_vgp2";</div><div class='ctx'> 				regulator-name = "vcamio";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1090,7 +1070,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp3_reg: ldo_vgp3 {</div><div class='del'>-				regulator-compatible = "ldo_vgp3";</div><div class='ctx'> 				regulator-name = "vcamaf";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -1098,7 +1077,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp4_reg: ldo_vgp4 {</div><div class='del'>-				regulator-compatible = "ldo_vgp4";</div><div class='ctx'> 				regulator-name = "vgp4";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1106,7 +1084,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp5_reg: ldo_vgp5 {</div><div class='del'>-				regulator-compatible = "ldo_vgp5";</div><div class='ctx'> 				regulator-name = "vgp5";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='hunk'>@@ -1114,7 +1091,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp6_reg: ldo_vgp6 {</div><div class='del'>-				regulator-compatible = "ldo_vgp6";</div><div class='ctx'> 				regulator-name = "vgp6";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1123,7 +1099,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vibr_reg: ldo_vibr {</div><div class='del'>-				regulator-compatible = "ldo_vibr";</div><div class='ctx'> 				regulator-name = "vibr";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -1131,7 +1106,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rtc: mt6397rtc {</div><div class='add'>+		rtc: rtc {</div><div class='ctx'> 			compatible = "mediatek,mt6397-rtc";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts<br/>index bb4671c18e3b..9fffed0ef4bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8173-evb.dts</a></div><div class='hunk'>@@ -307,11 +307,10 @@</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		mt6397regulator: mt6397regulator {</div><div class='add'>+		regulators {</div><div class='ctx'> 			compatible = "mediatek,mt6397-regulator";</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vpca15_reg: buck_vpca15 {</div><div class='del'>-				regulator-compatible = "buck_vpca15";</div><div class='ctx'> 				regulator-name = "vpca15";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -320,7 +319,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vpca7_reg: buck_vpca7 {</div><div class='del'>-				regulator-compatible = "buck_vpca7";</div><div class='ctx'> 				regulator-name = "vpca7";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -329,7 +327,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vsramca15_reg: buck_vsramca15 {</div><div class='del'>-				regulator-compatible = "buck_vsramca15";</div><div class='ctx'> 				regulator-name = "vsramca15";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -338,7 +335,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vsramca7_reg: buck_vsramca7 {</div><div class='del'>-				regulator-compatible = "buck_vsramca7";</div><div class='ctx'> 				regulator-name = "vsramca7";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -347,7 +343,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vcore_reg: buck_vcore {</div><div class='del'>-				regulator-compatible = "buck_vcore";</div><div class='ctx'> 				regulator-name = "vcore";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -356,7 +351,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgpu_reg: buck_vgpu {</div><div class='del'>-				regulator-compatible = "buck_vgpu";</div><div class='ctx'> 				regulator-name = "vgpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt; 700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -365,7 +359,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vdrm_reg: buck_vdrm {</div><div class='del'>-				regulator-compatible = "buck_vdrm";</div><div class='ctx'> 				regulator-name = "vdrm";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='hunk'>@@ -374,7 +367,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vio18_reg: buck_vio18 {</div><div class='del'>-				regulator-compatible = "buck_vio18";</div><div class='ctx'> 				regulator-name = "vio18";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1620000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1980000&gt;;</div><div class='hunk'>@@ -383,19 +375,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vtcxo_reg: ldo_vtcxo {</div><div class='del'>-				regulator-compatible = "ldo_vtcxo";</div><div class='ctx'> 				regulator-name = "vtcxo";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_va28_reg: ldo_va28 {</div><div class='del'>-				regulator-compatible = "ldo_va28";</div><div class='ctx'> 				regulator-name = "va28";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vcama_reg: ldo_vcama {</div><div class='del'>-				regulator-compatible = "ldo_vcama";</div><div class='ctx'> 				regulator-name = "vcama";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -403,18 +392,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vio28_reg: ldo_vio28 {</div><div class='del'>-				regulator-compatible = "ldo_vio28";</div><div class='ctx'> 				regulator-name = "vio28";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vusb_reg: ldo_vusb {</div><div class='del'>-				regulator-compatible = "ldo_vusb";</div><div class='ctx'> 				regulator-name = "vusb";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vmc_reg: ldo_vmc {</div><div class='del'>-				regulator-compatible = "ldo_vmc";</div><div class='ctx'> 				regulator-name = "vmc";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -422,7 +408,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vmch_reg: ldo_vmch {</div><div class='del'>-				regulator-compatible = "ldo_vmch";</div><div class='ctx'> 				regulator-name = "vmch";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -430,7 +415,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vemc_3v3_reg: ldo_vemc3v3 {</div><div class='del'>-				regulator-compatible = "ldo_vemc3v3";</div><div class='ctx'> 				regulator-name = "vemc_3v3";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -438,7 +422,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp1_reg: ldo_vgp1 {</div><div class='del'>-				regulator-compatible = "ldo_vgp1";</div><div class='ctx'> 				regulator-name = "vcamd";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1220000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -446,7 +429,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp2_reg: ldo_vgp2 {</div><div class='del'>-				regulator-compatible = "ldo_vgp2";</div><div class='ctx'> 				regulator-name = "vcamio";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -454,7 +436,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp3_reg: ldo_vgp3 {</div><div class='del'>-				regulator-compatible = "ldo_vgp3";</div><div class='ctx'> 				regulator-name = "vcamaf";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -462,7 +443,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp4_reg: ldo_vgp4 {</div><div class='del'>-				regulator-compatible = "ldo_vgp4";</div><div class='ctx'> 				regulator-name = "vgp4";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -470,7 +450,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp5_reg: ldo_vgp5 {</div><div class='del'>-				regulator-compatible = "ldo_vgp5";</div><div class='ctx'> 				regulator-name = "vgp5";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='hunk'>@@ -478,7 +457,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vgp6_reg: ldo_vgp6 {</div><div class='del'>-				regulator-compatible = "ldo_vgp6";</div><div class='ctx'> 				regulator-name = "vgp6";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -486,7 +464,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6397_vibr_reg: ldo_vibr {</div><div class='del'>-				regulator-compatible = "ldo_vibr";</div><div class='ctx'> 				regulator-name = "vibr";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi<br/>index 3458be7f7f61..122a57c3780b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8173.dtsi</a></div><div class='hunk'>@@ -318,6 +318,14 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='add'>+</div><div class='add'>+		afe_dma_mem: audio-dma-pool {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0 0x100000&gt;;</div><div class='add'>+			alignment = &lt;0 0x10&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vpu_dma_reserved: vpu-dma-mem@b7000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0xb7000000 0 0x500000&gt;;</div><div class='hunk'>@@ -352,14 +360,14 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		infracfg: power-controller@10001000 {</div><div class='add'>+		infracfg: clock-controller@10001000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-infracfg", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pericfg: power-controller@10003000 {</div><div class='add'>+		pericfg: clock-controller@10003000 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-pericfg", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x10003000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -564,7 +572,7 @@</div><div class='ctx'> 			memory-region = &lt;&amp;vpu_dma_reserved&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sysirq: intpol-controller@10200620 {</div><div class='add'>+		sysirq: interrupt-controller@10200620 {</div><div class='ctx'> 			compatible = "mediatek,mt8173-sysirq",</div><div class='ctx'> 				     "mediatek,mt6577-sysirq";</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -887,6 +895,7 @@</div><div class='ctx'> 					  &lt;&amp;topckgen CLK_TOP_AUD_2_SEL&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_APLL1&gt;,</div><div class='ctx'> 						 &lt;&amp;topckgen CLK_TOP_APLL2&gt;;</div><div class='add'>+			memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc0: mmc@11230000 {</div><div class='hunk'>@@ -1255,8 +1264,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm0: pwm@1401e000 {</div><div class='del'>-			compatible = "mediatek,mt8173-disp-pwm",</div><div class='del'>-				     "mediatek,mt6595-disp-pwm";</div><div class='add'>+			compatible = "mediatek,mt8173-disp-pwm";</div><div class='ctx'> 			reg = &lt;0 0x1401e000 0 0x1000&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_PWM026M&gt;,</div><div class='hunk'>@@ -1266,8 +1274,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pwm1: pwm@1401f000 {</div><div class='del'>-			compatible = "mediatek,mt8173-disp-pwm",</div><div class='del'>-				     "mediatek,mt6595-disp-pwm";</div><div class='add'>+			compatible = "mediatek,mt8173-disp-pwm";</div><div class='ctx'> 			reg = &lt;0 0x1401f000 0 0x1000&gt;;</div><div class='ctx'> 			#pwm-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_PWM126M&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi<br/>index 586eee79c73c..f69ffcb9792a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi</a></div><div class='hunk'>@@ -39,8 +39,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio {</div><div class='del'>-	da7219_pins: da7219_pins {</div><div class='del'>-		pins1 {</div><div class='add'>+	da7219_pins: da7219-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO165__FUNC_GPIO165&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi<br/>index 548e22c194a2..c4aedf8cbfcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio {</div><div class='del'>-	ts3a227e_pins: ts3a227e_pins {</div><div class='add'>+	ts3a227e_pins: ts3a227e-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO157__FUNC_GPIO157&gt;;</div><div class='ctx'> 			input-enable;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts<br/>index 19c1e2bee494..20b71f2e7159 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts</a></div><div class='hunk'>@@ -30,3 +30,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;4100&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts<br/>index f34964afe39b..83bbcfe62083 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;25000&gt;;</div><div class='add'>+</div><div class='ctx'> 	trackpad@2c {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts<br/>index 0b45aee2e299..7bc7c2687d6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts</a></div><div class='hunk'>@@ -14,19 +14,23 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;touchscreen {</div><div class='del'>-	status = "okay";</div><div class='add'>+	compatible = "elan,ekth6a12nay";</div><div class='ctx'> </div><div class='del'>-	compatible = "hid-over-i2c";</div><div class='del'>-	reg = &lt;0x10&gt;;</div><div class='del'>-	interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-	hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	vcc33-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='add'>+	vccio-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6358codec {</div><div class='add'>+	mediatek,dmic-mode = &lt;1&gt;; /* one-wire */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qca_wifi {</div><div class='ctx'> 	qcom,ath10k-calibration-variant = "GO_DAMU";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;20000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts<br/>index 72852b760038..863f3e403de8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts</a></div><div class='hunk'>@@ -27,16 +27,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;touchscreen {</div><div class='del'>-	status = "okay";</div><div class='add'>+	compatible = "elan,ekth6a12nay";</div><div class='ctx'> </div><div class='del'>-	compatible = "hid-over-i2c";</div><div class='del'>-	reg = &lt;0x10&gt;;</div><div class='del'>-	interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-	hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	vcc33-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qca_wifi {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts<br/>index 757d0afd14fb..e0a583ce4a0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts</a></div><div class='hunk'>@@ -14,16 +14,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;touchscreen {</div><div class='del'>-	status = "okay";</div><div class='add'>+	compatible = "elan,ekth6a12nay";</div><div class='ctx'> </div><div class='del'>-	compatible = "hid-over-i2c";</div><div class='del'>-	reg = &lt;0x10&gt;;</div><div class='del'>-	interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-	hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	vcc33-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts<br/>index 6641b087e7c5..7874c9a20e12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts</a></div><div class='hunk'>@@ -14,16 +14,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;touchscreen {</div><div class='del'>-	status = "okay";</div><div class='add'>+	compatible = "elan,ekth6a12nay";</div><div class='ctx'> </div><div class='del'>-	compatible = "hid-over-i2c";</div><div class='del'>-	reg = &lt;0x10&gt;;</div><div class='del'>-	interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-	hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	vcc33-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi<br/>index bbe6c338f465..f9c1ec366b26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi</a></div><div class='hunk'>@@ -25,3 +25,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;21500&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts<br/>index e8241587949b..561770fcf69e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts</a></div><div class='hunk'>@@ -12,3 +12,18 @@</div><div class='ctx'> 	chassis-type = "laptop";</div><div class='ctx'> 	compatible = "google,juniper-sku17", "google,juniper", "mediatek,mt8183";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	touchscreen@40 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		post-power-on-delay-ms = &lt;70&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi<br/>index 76d33540166f..c942e461a177 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi</a></div><div class='hunk'>@@ -6,6 +6,21 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include "mt8183-kukui-jacuzzi.dtsi"</div><div class='ctx'> </div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	touchscreen@40 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		post-power-on-delay-ms = &lt;70&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	trackpad@2c {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi<br/>index 783c333107bc..1b74ec171c10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi</a></div><div class='hunk'>@@ -8,35 +8,37 @@</div><div class='ctx'> #include &lt;arm/cros-ec-keyboard.dtsi&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	pp1200_mipibrdg: pp1200-mipibrdg {</div><div class='add'>+	pp1000_mipibrdg: pp1000-mipibrdg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "pp1200_mipibrdg";</div><div class='add'>+		regulator-name = "pp1000_mipibrdg";</div><div class='add'>+		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pp1200_mipibrdg_en&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pp1000_mipibrdg_en&gt;;</div><div class='ctx'> </div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> </div><div class='ctx'> 		gpio = &lt;&amp;pio 54 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pp1800_mipibrdg: pp1800-mipibrdg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1800_mipibrdg";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pp1800_lcd_en&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pp1800_mipibrdg_en&gt;;</div><div class='ctx'> </div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> </div><div class='ctx'> 		gpio = &lt;&amp;pio 36 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pp3300_panel: pp3300-panel {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3300_panel";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pp3300_panel_pins&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -44,18 +46,20 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> </div><div class='ctx'> 		gpio = &lt;&amp;pio 35 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vddio_mipibrdg: vddio-mipibrdg {</div><div class='add'>+	pp3300_mipibrdg: pp3300-mipibrdg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vddio_mipibrdg";</div><div class='add'>+		regulator-name = "pp3300_mipibrdg";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vddio_mipibrdg_en&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pp3300_mipibrdg_en&gt;;</div><div class='ctx'> </div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> </div><div class='ctx'> 		gpio = &lt;&amp;pio 37 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	volume_buttons: volume-buttons {</div><div class='hunk'>@@ -89,11 +93,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dsi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	/delete-node/panel@0;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;dsi_out {</div><div class='ctx'> 	remote-endpoint = &lt;&amp;anx7625_in&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -146,9 +145,9 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;anx7625_pins&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;pio 45 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 73 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		vdd10-supply = &lt;&amp;pp1200_mipibrdg&gt;;</div><div class='add'>+		vdd10-supply = &lt;&amp;pp1000_mipibrdg&gt;;</div><div class='ctx'> 		vdd18-supply = &lt;&amp;pp1800_mipibrdg&gt;;</div><div class='del'>-		vdd33-supply = &lt;&amp;vddio_mipibrdg&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;pp3300_mipibrdg&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -391,14 +390,14 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='ctx'> </div><div class='del'>-	pp1200_mipibrdg_en: pp1200-mipibrdg-en {</div><div class='add'>+	pp1000_mipibrdg_en: pp1000-mipibrdg-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO54__FUNC_GPIO54&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800_lcd_en: pp1800-lcd-en {</div><div class='add'>+	pp1800_mipibrdg_en: pp1800-mipibrdg-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO36__FUNC_GPIO36&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -406,20 +405,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pp3300_panel_pins: pp3300-panel-pins {</div><div class='del'>-		panel_3v3_enable: panel-3v3-enable {</div><div class='add'>+		panel_3v3_enable: pins-panel-en {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO35__FUNC_GPIO35&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarp_lcd_en: ppvarp-lcd-en {</div><div class='add'>+	ppvarp_lcd_en: ppvarp-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO66__FUNC_GPIO66&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarn_lcd_en: ppvarn-lcd-en {</div><div class='add'>+	ppvarn_lcd_en: ppvarn-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO166__FUNC_GPIO166&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -440,27 +439,27 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	touchscreen_pins: touchscreen-pins {</div><div class='del'>-		touch-int-odl {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO155__FUNC_GPIO155&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		touch-rst-l {</div><div class='add'>+		pins-rst {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO156__FUNC_GPIO156&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	trackpad_pins: trackpad-pins {</div><div class='del'>-		trackpad-int {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO7__FUNC_GPIO7&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-disable; /* pulled externally */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vddio_mipibrdg_en: vddio-mipibrdg-en {</div><div class='add'>+	pp3300_mipibrdg_en: pp3300-mipibrdg-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO37__FUNC_GPIO37&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -468,13 +467,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	volume_button_pins: volume-button-pins {</div><div class='del'>-		voldn-btn-odl {</div><div class='add'>+		pins-voldn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO6__FUNC_GPIO6&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		volup-btn-odl {</div><div class='add'>+		pins-volup {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO5__FUNC_GPIO5&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi<br/>index bfb9e42c8aca..d71972c94e42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi</a></div><div class='hunk'>@@ -61,6 +61,33 @@</div><div class='ctx'> 	firmware-name = "nvm_00440302_i2s_eu.bin";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		/* compatible will be set in board dts */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 45 0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_pins_default&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;ppvarn_lcd&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;ppvarp_lcd&gt;;</div><div class='add'>+		pp1800-supply = &lt;&amp;pp1800_lcd&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -92,9 +119,9 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	vbus-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> </div><div class='del'>-	eeprom@54 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='del'>-		reg = &lt;0x54&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -304,35 +331,35 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='ctx'> </div><div class='del'>-	ppvarp_lcd_en: ppvarp-lcd-en {</div><div class='add'>+	ppvarp_lcd_en: ppvarp-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO66__FUNC_GPIO66&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarn_lcd_en: ppvarn-lcd-en {</div><div class='add'>+	ppvarn_lcd_en: ppvarn-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO166__FUNC_GPIO166&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800_lcd_en: pp1800-lcd-en {</div><div class='add'>+	pp1800_lcd_en: pp1800-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO36__FUNC_GPIO36&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	open_touch: open_touch {</div><div class='del'>-		irq_pin {</div><div class='add'>+	open_touch: opentouch-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO155__FUNC_GPIO155&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rst_pin {</div><div class='add'>+		pins-rst {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO156__FUNC_GPIO156&gt;;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -349,8 +376,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pen_eject: peneject {</div><div class='del'>-		pen_eject {</div><div class='add'>+	pen_eject: pen-pins {</div><div class='add'>+		pins-eject {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO6__FUNC_GPIO6&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			/* External pull-up. */</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts<br/>index 05361008e8ac..2b5a8d1f900e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 156 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;lcd_pp3300&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts<br/>index cf008ed82878..75fadf2c7059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 155 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		reset-gpios = &lt;&amp;pio 156 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;lcd_pp3300&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi<br/>index 5c1bf6a1e475..b702ff066636 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi</a></div><div class='hunk'>@@ -42,6 +42,34 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		/* compatible will be set in board dts */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 45 0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_pins_default&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;ppvarn_lcd&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;ppvarp_lcd&gt;;</div><div class='add'>+		pp1800-supply = &lt;&amp;pp1800_lcd&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -79,9 +107,9 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	vbus-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> </div><div class='del'>-	eeprom@54 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c64";</div><div class='del'>-		reg = &lt;0x54&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -292,35 +320,35 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='ctx'> </div><div class='del'>-	ppvarp_lcd_en: ppvarp-lcd-en {</div><div class='add'>+	ppvarp_lcd_en: ppvarp-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO66__FUNC_GPIO66&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarn_lcd_en: ppvarn-lcd-en {</div><div class='add'>+	ppvarn_lcd_en: ppvarn-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO166__FUNC_GPIO166&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800_lcd_en: pp1800-lcd-en {</div><div class='add'>+	pp1800_lcd_en: pp1800-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO36__FUNC_GPIO36&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	touch_default: touchdefault {</div><div class='del'>-		pin_irq {</div><div class='add'>+	touch_default: touch-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO155__FUNC_GPIO155&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		touch_pin_reset: pin_reset {</div><div class='add'>+		touch_pin_reset: pins-rst {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO156__FUNC_GPIO156&gt;;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi<br/>index 0f5fa893a774..b6cfcafd8b06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi</a></div><div class='hunk'>@@ -45,6 +45,34 @@</div><div class='ctx'> 	firmware-name = "nvm_00440302_i2s_eu.bin";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		/* compatible will be set in board dts */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 45 0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_pins_default&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;ppvarn_lcd&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;ppvarp_lcd&gt;;</div><div class='add'>+		pp1800-supply = &lt;&amp;pp1800_lcd&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -88,9 +116,9 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	vbus-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> </div><div class='del'>-	eeprom@54 {</div><div class='add'>+	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='del'>-		reg = &lt;0x54&gt;;</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -296,35 +324,35 @@</div><div class='ctx'> 		"",</div><div class='ctx'> 		"";</div><div class='ctx'> </div><div class='del'>-	ppvarp_lcd_en: ppvarp-lcd-en {</div><div class='add'>+	ppvarp_lcd_en: ppvarp-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO66__FUNC_GPIO66&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarn_lcd_en: ppvarn-lcd-en {</div><div class='add'>+	ppvarn_lcd_en: ppvarn-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO166__FUNC_GPIO166&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800_lcd_en: pp1800-lcd-en {</div><div class='add'>+	pp1800_lcd_en: pp1800-lcd-en-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO36__FUNC_GPIO36&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	open_touch: open_touch {</div><div class='del'>-		irq_pin {</div><div class='add'>+	open_touch: opentouch-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO155__FUNC_GPIO155&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rst_pin {</div><div class='add'>+		pins-rst {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO156__FUNC_GPIO156&gt;;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi<br/>index 22924f61ec9e..4b87d4940c8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi</a></div><div class='hunk'>@@ -52,27 +52,6 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lcd_pp3300: regulator1 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "lcd_pp3300";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc1_fixed_power: regulator3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "mmc1_power";</div><div class='del'>-		vin-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc1_fixed_io: regulator4 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "mmc1_io";</div><div class='del'>-		vin-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	pp1800_alw: regulator5 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1800_alw";</div><div class='hunk'>@@ -106,6 +85,13 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		afe_dma_mem: audio-dma-pool {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0 0x100000&gt;;</div><div class='add'>+			alignment = &lt;0 0x10&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		scp_mem_reserved: memory@50000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0x50000000 0 0x2900000&gt;;</div><div class='hunk'>@@ -126,6 +112,7 @@</div><div class='ctx'> </div><div class='ctx'> 	btsco: bt-sco {</div><div class='ctx'> 		compatible = "linux,bt-sco";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wifi_pwrseq: wifi-pwrseq {</div><div class='hunk'>@@ -219,6 +206,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;auxadc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -261,33 +252,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;dsi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	panel: panel@0 {</div><div class='del'>-		/* compatible will be set in board dts */</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;pio 45 0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;panel_pins_default&gt;;</div><div class='del'>-		avdd-supply = &lt;&amp;ppvarn_lcd&gt;;</div><div class='del'>-		avee-supply = &lt;&amp;ppvarp_lcd&gt;;</div><div class='del'>-		pp1800-supply = &lt;&amp;pp1800_lcd&gt;;</div><div class='del'>-		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='del'>-		rotation = &lt;270&gt;;</div><div class='del'>-		port {</div><div class='del'>-			panel_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		port {</div><div class='del'>-			dsi_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gic {</div><div class='hunk'>@@ -369,8 +333,8 @@</div><div class='ctx'> 	pinctrl-names = "default", "state_uhs";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc1_pins_default&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;mmc1_pins_uhs&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;mmc1_fixed_power&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;mmc1_fixed_io&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;pp3300_alw&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pp1800_alw&gt;;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	max-frequency = &lt;200000000&gt;;</div><div class='hunk'>@@ -448,7 +412,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio {</div><div class='del'>-	aud_pins_default: audiopins {</div><div class='add'>+	aud_pins_default: audio-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO97__FUNC_I2S2_MCK&gt;,</div><div class='ctx'> 				&lt;PINMUX_GPIO98__FUNC_I2S2_BCK&gt;,</div><div class='hunk'>@@ -470,7 +434,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	aud_pins_tdm_out_on: audiotdmouton {</div><div class='add'>+	aud_pins_tdm_out_on: audio-tdmout-on-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO169__FUNC_TDM_BCK_2ND&gt;,</div><div class='ctx'> 				&lt;PINMUX_GPIO170__FUNC_TDM_LRCK_2ND&gt;,</div><div class='hunk'>@@ -482,7 +446,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	aud_pins_tdm_out_off: audiotdmoutoff {</div><div class='add'>+	aud_pins_tdm_out_off: audio-tdmout-off-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO169__FUNC_GPIO169&gt;,</div><div class='ctx'> 				&lt;PINMUX_GPIO170__FUNC_GPIO170&gt;,</div><div class='hunk'>@@ -503,22 +467,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ec_ap_int_odl: ec-ap-int-odl {</div><div class='del'>-		pins1 {</div><div class='add'>+	ec_ap_int_odl: ec-ap-int-odl-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO151__FUNC_GPIO151&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	h1_int_od_l: h1-int-od-l {</div><div class='del'>-		pins1 {</div><div class='add'>+	h1_int_od_l: h1-int-od-l-pins {</div><div class='add'>+		pins-intn {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO153__FUNC_GPIO153&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c0_pins: i2c0 {</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO82__FUNC_SDA0&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO83__FUNC_SCL0&gt;;</div><div class='hunk'>@@ -526,7 +490,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c1_pins: i2c1 {</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO81__FUNC_SDA1&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO84__FUNC_SCL1&gt;;</div><div class='hunk'>@@ -534,7 +498,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2_pins: i2c2 {</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO103__FUNC_SCL2&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO104__FUNC_SDA2&gt;;</div><div class='hunk'>@@ -542,7 +506,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c3_pins: i2c3 {</div><div class='add'>+	i2c3_pins: i2c3-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO50__FUNC_SCL3&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO51__FUNC_SDA3&gt;;</div><div class='hunk'>@@ -550,7 +514,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c4_pins: i2c4 {</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO105__FUNC_SCL4&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO106__FUNC_SDA4&gt;;</div><div class='hunk'>@@ -558,7 +522,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c5_pins: i2c5 {</div><div class='add'>+	i2c5_pins: i2c5-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO48__FUNC_SCL5&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO49__FUNC_SDA5&gt;;</div><div class='hunk'>@@ -566,7 +530,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c6_pins: i2c6 {</div><div class='add'>+	i2c6_pins: i2c6-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO11__FUNC_SCL6&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO12__FUNC_SDA6&gt;;</div><div class='hunk'>@@ -574,7 +538,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc0_pins_default: mmc0-pins-default {</div><div class='add'>+	mmc0_pins_default: mmc0-default-pins {</div><div class='ctx'> 		pins-cmd-dat {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO123__FUNC_MSDC0_DAT0&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO128__FUNC_MSDC0_DAT1&gt;,</div><div class='hunk'>@@ -593,7 +557,7 @@</div><div class='ctx'> 		pins-clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO124__FUNC_MSDC0_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins-rst {</div><div class='hunk'>@@ -622,13 +586,13 @@</div><div class='ctx'> 		pins-clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO124__FUNC_MSDC0_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins-ds {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO131__FUNC_MSDC0_DSL&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins-rst {</div><div class='hunk'>@@ -638,7 +602,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc1_pins_default: mmc1-pins-default {</div><div class='add'>+	mmc1_pins_default: mmc1-default-pins {</div><div class='ctx'> 		pins-cmd-dat {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO31__FUNC_MSDC1_CMD&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO32__FUNC_MSDC1_DAT0&gt;,</div><div class='hunk'>@@ -646,17 +610,17 @@</div><div class='ctx'> 				 &lt;PINMUX_GPIO33__FUNC_MSDC1_DAT2&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO30__FUNC_MSDC1_DAT3&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-up-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-up-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins-clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO29__FUNC_MSDC1_CLK&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mmc1_pins_uhs: mmc1-pins-uhs {</div><div class='add'>+	mmc1_pins_uhs: mmc1-uhs-pins {</div><div class='ctx'> 		pins-cmd-dat {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO31__FUNC_MSDC1_CMD&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO32__FUNC_MSDC1_DAT0&gt;,</div><div class='hunk'>@@ -665,26 +629,26 @@</div><div class='ctx'> 				 &lt;PINMUX_GPIO30__FUNC_MSDC1_DAT3&gt;;</div><div class='ctx'> 			drive-strength = &lt;6&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-up-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-up-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins-clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO29__FUNC_MSDC1_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;8&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	panel_pins_default: panel-pins-default {</div><div class='del'>-		panel-reset {</div><div class='add'>+	panel_pins_default: panel-pins {</div><div class='add'>+		pins-panel-reset {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO45__FUNC_GPIO45&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pwm0_pin_default: pwm0-pin-default {</div><div class='add'>+	pwm0_pin_default: pwm0-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO176__FUNC_GPIO176&gt;;</div><div class='ctx'> 			output-high;</div><div class='hunk'>@@ -695,15 +659,15 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	scp_pins: scp {</div><div class='add'>+	scp_pins: scp-pins {</div><div class='ctx'> 		pins-scp-uart {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO110__FUNC_TP_URXD1_AO&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO112__FUNC_TP_UTXD1_AO&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi0_pins: spi0 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi0_pins: spi0-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO85__FUNC_SPI0_MI&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO86__FUNC_GPIO86&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO87__FUNC_SPI0_MO&gt;,</div><div class='hunk'>@@ -712,8 +676,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi1_pins: spi1 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi1_pins: spi1-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO161__FUNC_SPI1_A_MI&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO162__FUNC_SPI1_A_CSB&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO163__FUNC_SPI1_A_MO&gt;,</div><div class='hunk'>@@ -722,21 +686,21 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi2_pins: spi2 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi2_pins: spi2-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO0__FUNC_SPI2_CSB&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO1__FUNC_SPI2_MO&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO2__FUNC_SPI2_CLK&gt;;</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='del'>-		pins-spi-mi {</div><div class='add'>+		pins-miso {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO94__FUNC_SPI2_MI&gt;;</div><div class='ctx'> 			mediatek,pull-down-adv = &lt;00&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi3_pins: spi3 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi3_pins: spi3-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO21__FUNC_SPI3_MI&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO22__FUNC_SPI3_CSB&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO23__FUNC_SPI3_MO&gt;,</div><div class='hunk'>@@ -745,8 +709,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi4_pins: spi4 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi4_pins: spi4-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO17__FUNC_SPI4_MI&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO18__FUNC_SPI4_CSB&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO19__FUNC_SPI4_MO&gt;,</div><div class='hunk'>@@ -755,8 +719,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	spi5_pins: spi5 {</div><div class='del'>-		pins-spi {</div><div class='add'>+	spi5_pins: spi5-pins {</div><div class='add'>+		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO13__FUNC_SPI5_MI&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO14__FUNC_SPI5_CSB&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO15__FUNC_SPI5_MO&gt;,</div><div class='hunk'>@@ -765,7 +729,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart0_pins_default: uart0-pins-default {</div><div class='add'>+	uart0_pins_default: uart0-pins {</div><div class='ctx'> 		pins-rx {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO95__FUNC_URXD0&gt;;</div><div class='ctx'> 			input-enable;</div><div class='hunk'>@@ -776,7 +740,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart1_pins_default: uart1-pins-default {</div><div class='add'>+	uart1_pins_default: uart1-pins {</div><div class='ctx'> 		pins-rx {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO121__FUNC_URXD1&gt;;</div><div class='ctx'> 			input-enable;</div><div class='hunk'>@@ -794,7 +758,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	uart1_pins_sleep: uart1-pins-sleep {</div><div class='add'>+	uart1_pins_sleep: uart1-sleep-pins {</div><div class='ctx'> 		pins-rx {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO121__FUNC_GPIO121&gt;;</div><div class='ctx'> 			input-enable;</div><div class='hunk'>@@ -812,14 +776,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pins_pwrseq: wifi-pins-pwrseq {</div><div class='add'>+	wifi_pins_pwrseq: wifi-pwr-pins {</div><div class='ctx'> 		pins-wifi-enable {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO119__FUNC_GPIO119&gt;;</div><div class='ctx'> 			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wifi_pins_wakeup: wifi-pins-wakeup {</div><div class='add'>+	wifi_pins_wakeup: wifi-wake-pins {</div><div class='ctx'> 		pins-wifi-wakeup {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO113__FUNC_GPIO113&gt;;</div><div class='ctx'> 			input-enable;</div><div class='hunk'>@@ -960,13 +924,13 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;thermal_zones {</div><div class='del'>-	tboard1 {</div><div class='add'>+	tboard1-thermal {</div><div class='ctx'> 		polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='ctx'> 		polling-delay-passive = &lt;0&gt;; /* milliseconds */</div><div class='ctx'> 		thermal-sensors = &lt;&amp;tboard_thermistor1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	tboard2 {</div><div class='add'>+	tboard2-thermal {</div><div class='ctx'> 		polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='ctx'> 		polling-delay-passive = &lt;0&gt;; /* milliseconds */</div><div class='ctx'> 		thermal-sensors = &lt;&amp;tboard_thermistor2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts<br/>index 1aa668c3ccf9..f60ef3e53a09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts</a></div><div class='hunk'>@@ -63,6 +63,18 @@</div><div class='ctx'> 		pulldown-ohm = &lt;0&gt;;</div><div class='ctx'> 		io-channels = &lt;&amp;auxadc 0&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_connector_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;auxadc {</div><div class='hunk'>@@ -120,6 +132,43 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	it66121hdmitx: hdmitx@4c {</div><div class='add'>+		compatible = "ite,it66121";</div><div class='add'>+		reg = &lt;0x4c&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ite_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 160 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		vcn33-supply = &lt;&amp;mt6358_vcn33_reg&gt;;</div><div class='add'>+		vcn18-supply = &lt;&amp;mt6358_vcn18_reg&gt;;</div><div class='add'>+		vrf12-supply = &lt;&amp;mt6358_vrf12_reg&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				it66121_in: endpoint {</div><div class='add'>+					bus-width = &lt;12&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;dpi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_connector_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;keyboard {</div><div class='hunk'>@@ -275,7 +324,7 @@</div><div class='ctx'> 		pins_clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO124__FUNC_MSDC0_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_rst {</div><div class='hunk'>@@ -304,13 +353,13 @@</div><div class='ctx'> 		pins_clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO124__FUNC_MSDC0_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_ds {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO131__FUNC_MSDC0_DSL&gt;;</div><div class='ctx'> 			drive-strength = &lt;MTK_DRIVE_14mA&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_rst {</div><div class='hunk'>@@ -328,13 +377,13 @@</div><div class='ctx'> 				 &lt;PINMUX_GPIO33__FUNC_MSDC1_DAT2&gt;,</div><div class='ctx'> 				 &lt;PINMUX_GPIO30__FUNC_MSDC1_DAT3&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-up-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-up-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO29__FUNC_MSDC1_CLK&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_pmu {</div><div class='hunk'>@@ -352,16 +401,77 @@</div><div class='ctx'> 				 &lt;PINMUX_GPIO30__FUNC_MSDC1_DAT3&gt;;</div><div class='ctx'> 			drive-strength = &lt;6&gt;;</div><div class='ctx'> 			input-enable;</div><div class='del'>-			mediatek,pull-up-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-up-adv = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pins_clk {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO29__FUNC_MSDC1_CLK&gt;;</div><div class='ctx'> 			drive-strength = &lt;8&gt;;</div><div class='del'>-			mediatek,pull-down-adv = &lt;10&gt;;</div><div class='add'>+			mediatek,pull-down-adv = &lt;2&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ite_pins: ite-pins {</div><div class='add'>+		pins-irq {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO4__FUNC_GPIO4&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO160__FUNC_GPIO160&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpi_func_pins: dpi-func-pins {</div><div class='add'>+		pins-dpi {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO12__FUNC_I2S5_BCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO46__FUNC_I2S5_LRCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO47__FUNC_I2S5_DO&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO13__FUNC_DBPI_D0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO14__FUNC_DBPI_D1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO15__FUNC_DBPI_D2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO16__FUNC_DBPI_D3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO17__FUNC_DBPI_D4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO18__FUNC_DBPI_D5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO19__FUNC_DBPI_D6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO20__FUNC_DBPI_D7&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO21__FUNC_DBPI_D8&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO22__FUNC_DBPI_D9&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO23__FUNC_DBPI_D10&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO24__FUNC_DBPI_D11&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO25__FUNC_DBPI_HSYNC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO26__FUNC_DBPI_VSYNC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO27__FUNC_DBPI_DE&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO28__FUNC_DBPI_CK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpi_idle_pins: dpi-idle-pins {</div><div class='add'>+		pins-idle {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO12__FUNC_GPIO12&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO46__FUNC_GPIO46&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO47__FUNC_GPIO47&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO13__FUNC_GPIO13&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO14__FUNC_GPIO14&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO15__FUNC_GPIO15&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO16__FUNC_GPIO16&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO17__FUNC_GPIO17&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO18__FUNC_GPIO18&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO19__FUNC_GPIO19&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO20__FUNC_GPIO20&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO21__FUNC_GPIO21&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO22__FUNC_GPIO22&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO23__FUNC_GPIO23&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO24__FUNC_GPIO24&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO25__FUNC_GPIO25&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO26__FUNC_GPIO26&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO27__FUNC_GPIO27&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO28__FUNC_GPIO28&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmic {</div><div class='hunk'>@@ -372,6 +482,10 @@</div><div class='ctx'> 	domain-supply = &lt;&amp;mt6358_vgpu_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cci {</div><div class='add'>+	proc-supply = &lt;&amp;mt6358_vproc12_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	proc-supply = &lt;&amp;mt6358_vproc12_reg&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -412,6 +526,13 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dsi0 {</div><div class='del'>-	status = "disabled";</div><div class='add'>+&amp;dpi0 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dpi_func_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;dpi_idle_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dpi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;it66121_in&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi<br/>index 266441e999f2..960d8955d018 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8183.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8183.dtsi</a></div><div class='hunk'>@@ -1024,7 +1024,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		keyboard: keyboard@10010000 {</div><div class='del'>-			compatible = "mediatek,mt6779-keypad";</div><div class='add'>+			compatible = "mediatek,mt8183-keypad",</div><div class='add'>+				     "mediatek,mt6779-keypad";</div><div class='ctx'> 			reg = &lt;0 0x10010000 0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk26m&gt;;</div><div class='hunk'>@@ -1666,6 +1667,21 @@</div><div class='ctx'> 			mboxes = &lt;&amp;gce 0 CMDQ_THR_PRIO_HIGHEST&gt;,</div><div class='ctx'> 				 &lt;&amp;gce 1 CMDQ_THR_PRIO_HIGHEST&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				mmsys_ep_main: endpoint@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmsys_ep_ext: endpoint@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;ovl_2l1_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dma-controller0@14001000 {</div><div class='hunk'>@@ -1732,6 +1748,25 @@</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_OVL0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu M4U_PORT_DISP_OVL0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x8000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mmsys_ep_main&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl_2l0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ovl_2l0: ovl@14009000 {</div><div class='hunk'>@@ -1742,6 +1777,25 @@</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_OVL0_2L&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu M4U_PORT_DISP_2L_OVL0_LARB0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x9000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl_2l0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl_2l0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ovl_2l1: ovl@1400a000 {</div><div class='hunk'>@@ -1752,6 +1806,25 @@</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_OVL1_2L&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu M4U_PORT_DISP_2L_OVL1_LARB0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0xa000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl_2l1_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mmsys_ep_ext&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl_2l1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma1_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rdma0: rdma@1400b000 {</div><div class='hunk'>@@ -1763,6 +1836,25 @@</div><div class='ctx'> 			iommus = &lt;&amp;iommu M4U_PORT_DISP_RDMA0&gt;;</div><div class='ctx'> 			mediatek,rdma-fifo-size = &lt;5120&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0xb000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl_2l0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rdma1: rdma@1400c000 {</div><div class='hunk'>@@ -1774,6 +1866,25 @@</div><div class='ctx'> 			iommus = &lt;&amp;iommu M4U_PORT_DISP_RDMA1&gt;;</div><div class='ctx'> 			mediatek,rdma-fifo-size = &lt;2048&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0xc000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma1_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl_2l1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dpi_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		color0: color@1400e000 {</div><div class='hunk'>@@ -1784,6 +1895,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_COLOR0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0xe000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ccorr0: ccorr@1400f000 {</div><div class='hunk'>@@ -1793,6 +1923,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_CCORR0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0xf000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ccorr0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ccorr0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		aal0: aal@14010000 {</div><div class='hunk'>@@ -1802,6 +1951,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_AAL0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1401XXXX 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					aal0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					aal0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gamma0: gamma@14011000 {</div><div class='hunk'>@@ -1811,6 +1979,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_GAMMA0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1401XXXX 0x1000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					gamma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					gamma0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dither0: dither@14012000 {</div><div class='hunk'>@@ -1820,6 +2007,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;mmsys CLK_MM_DISP_DITHER0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1401XXXX 0x2000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dither0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dither0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dsi_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dsi0: dsi@14014000 {</div><div class='hunk'>@@ -1834,6 +2040,24 @@</div><div class='ctx'> 			resets = &lt;&amp;mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0&gt;;</div><div class='ctx'> 			phys = &lt;&amp;mipi_tx0&gt;;</div><div class='ctx'> 			phy-names = "dphy";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dsi_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dsi_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dpi0: dpi@14015000 {</div><div class='hunk'>@@ -1845,6 +2069,24 @@</div><div class='ctx'> 				 &lt;&amp;mmsys CLK_MM_DPI_MM&gt;,</div><div class='ctx'> 				 &lt;&amp;apmixedsys CLK_APMIXED_TVDPLL&gt;;</div><div class='ctx'> 			clock-names = "pixel", "engine", "pll";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dpi_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dpi_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mutex: mutex@14016000 {</div><div class='hunk'>@@ -1974,6 +2216,23 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_VENC&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vcodec_enc: vcodec@17020000 {</div><div class='add'>+			compatible = "mediatek,mt8183-vcodec-enc";</div><div class='add'>+			reg = &lt;0 0x17020000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			iommus = &lt;&amp;iommu M4U_PORT_VENC_REC&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_BSDMA&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_RD_COMV&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_CUR_LUMA&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_CUR_CHROMA&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_REF_LUMA&gt;,</div><div class='add'>+				 &lt;&amp;iommu M4U_PORT_VENC_REF_CHROMA&gt;;</div><div class='add'>+			mediatek,scp = &lt;&amp;scp&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_VENC&gt;;</div><div class='add'>+			clocks = &lt;&amp;vencsys CLK_VENC_VENC&gt;;</div><div class='add'>+			clock-names = "venc_sel";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		venc_jpg: jpeg-encoder@17030000 {</div><div class='ctx'> 			compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";</div><div class='ctx'> 			reg = &lt;0 0x17030000 0 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts<br/>new file mode 100644<br/>index 000000000000..5d012bc4ff0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-chinchou.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google chinchou CZ1104CM2A/CZ1204CM2A";</div><div class='add'>+	compatible = "google,chinchou-sku0", "google,chinchou-sku2",</div><div class='add'>+			"google,chinchou-sku4", "google,chinchou-sku5",</div><div class='add'>+			"google,chinchou", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio_keys {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts<br/>new file mode 100644<br/>index 000000000000..9d6e62af6944<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-chinchou.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google chinchou CZ1104FM2A/CZ1204FM2A/CZ1104CM2A/CZ1204CM2A";</div><div class='add'>+	compatible = "google,chinchou-sku1", "google,chinchou-sku3",</div><div class='add'>+			"google,chinchou-sku6", "google,chinchou-sku7",</div><div class='add'>+			"google,chinchou-sku17", "google,chinchou-sku20",</div><div class='add'>+			"google,chinchou-sku22", "google,chinchou-sku23",</div><div class='add'>+			"google,chinchou", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio_keys {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;10000&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen: touchscreen@41 {</div><div class='add'>+		compatible = "ilitek,ili2901";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;pp1800_tchscr_report_disable&gt;;</div><div class='add'>+		vcc33-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts<br/>new file mode 100644<br/>index 000000000000..eb377de1fcde<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-chinchou.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google chinchou CZ1104FM2A/CZ1204FM2A";</div><div class='add'>+	compatible = "google,chinchou-sku16", "google,chinchou-sku18",</div><div class='add'>+			"google,chinchou-sku19", "google,chinchou-sku21",</div><div class='add'>+			"google,chinchou", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	i2c-scl-internal-delay-ns = &lt;10000&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen: touchscreen@41 {</div><div class='add'>+		compatible = "ilitek,ili2901";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;pp1800_tchscr_report_disable&gt;;</div><div class='add'>+		vcc33-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi<br/>new file mode 100644<br/>index 000000000000..800792157021<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi</a></div><div class='hunk'>@@ -0,0 +1,321 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/delete-node/ speaker-codec;</div><div class='add'>+</div><div class='add'>+	pp1000_edpbrdg: regulator-pp1000-edpbrdg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp1000_edpbrdg";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;en_pp1000_edpbrdg&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pio 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pp1800_edpbrdg_dx: regulator-pp1800-edpbrdg-dx {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp1800_edpbrdg_dx";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;en_pp1800_edpbrdg&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pio 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pp3300_edp_dx: regulator-pp3300-edp-dx {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp3300_edp_dx";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;en_pp3300_edpbrdg&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio = &lt;&amp;pio 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pp1800_tchscr_report_disable: regulator-pp1800-tchscr-report-disable {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp1800_tchscr_report_disable";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_pin_report&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 37 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;anx7625_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	anx_bridge: anx7625@58 {</div><div class='add'>+		compatible = "analogix,anx7625";</div><div class='add'>+		reg = &lt;0x58&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;anx7625_pins&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 98 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vdd10-supply = &lt;&amp;pp1000_edpbrdg&gt;;</div><div class='add'>+		vdd18-supply = &lt;&amp;pp1800_edpbrdg_dx&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;pp3300_edp_dx&gt;;</div><div class='add'>+		analogix,lane0-swing = /bits/ 8 &lt;0x70 0x30&gt;;</div><div class='add'>+		analogix,lane1-swing = /bits/ 8 &lt;0x70 0x30&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				anx7625_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+					data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				anx7625_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aux-bus {</div><div class='add'>+			panel: panel {</div><div class='add'>+				compatible = "edp-panel";</div><div class='add'>+				power-supply = &lt;&amp;pp3300_disp_x&gt;;</div><div class='add'>+				backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					panel_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;anx7625_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/delete-node/ trackpad@15;</div><div class='add'>+</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;10&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	/delete-node/ codec@1a;</div><div class='add'>+</div><div class='add'>+	rt5650: rt5650@1a {</div><div class='add'>+		compatible = "realtek,rt5650";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		cpvdd-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_codec_pins_default&gt;;</div><div class='add'>+		cbj-sleeve-gpios = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;17 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		realtek,dmic1-data-pin = &lt;2&gt;;</div><div class='add'>+		realtek,jd-mode = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_tunnel {</div><div class='add'>+	/delete-node/ sbs-battery@b;</div><div class='add'>+</div><div class='add'>+	battery: sbs-battery@f {</div><div class='add'>+		compatible = "sbs,sbs-battery";</div><div class='add'>+		reg = &lt;0xf&gt;;</div><div class='add'>+		sbs,i2c-retry-count = &lt;2&gt;;</div><div class='add'>+		sbs,poll-retry-count = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;keyboard_controller {</div><div class='add'>+	keypad,num-columns = &lt;15&gt;;</div><div class='add'>+</div><div class='add'>+	function-row-physmap = &lt;</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, 0)        /* T1 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, 0)        /* T2 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, 0)        /* T3 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, 0)        /* T4 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, 0)        /* T5 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, 0)        /* T6 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, 0)        /* T7 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, 0)        /* T8 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, 0)        /* T9 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, 0)        /* T10 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x01, 0)        /* T11 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x05, 0)        /* T12 */</div><div class='add'>+	&gt;;</div><div class='add'>+</div><div class='add'>+	linux,keymap = &lt;</div><div class='add'>+		CROS_STD_MAIN_KEYMAP</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, KEY_BACK)           /* T1 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)        /* T2 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)           /* T3 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, KEY_SCALE)          /* T4 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)          /* T5 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) /* T6 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)   /* T7 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, KEY_MUTE)           /* T8 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)	   /* T9 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)	   /* T10 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x01, KEY_MICMUTE)        /* T11 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x05, KEY_CONTROLPANEL)   /* T12 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x05, KEY_PREVIOUSSONG)   /* T13 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x09, KEY_PLAYPAUSE)	   /* T14 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x0b, KEY_NEXTSONG)	   /* T15 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x00, KEY_LEFTMETA)	   /* Search*/</div><div class='add'>+		MATRIX_KEY(0x01, 0x0e, KEY_LEFTCTRL)	   /* Left Control*/</div><div class='add'>+		MATRIX_KEY(0x06, 0x0d, KEY_LEFTALT)        /* Left ALT*/</div><div class='add'>+		MATRIX_KEY(0x03, 0x0e, KEY_RIGHTCTRL)      /* Right Control*/</div><div class='add'>+		MATRIX_KEY(0x06, 0x0a, KEY_BACKSLASH)      /* BACKSLASH*/</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1_pins_default {</div><div class='add'>+	pins-clk {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins-cmd-dat {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1_pins_uhs {</div><div class='add'>+	pins-clk {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins-cmd-dat {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pen_insert {</div><div class='add'>+	wakeup-event-action = &lt;EV_ACT_ANY&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	anx7625_pins: anx7625-pins {</div><div class='add'>+		pins-int {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO9__FUNC_GPIO9&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-reset {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO98__FUNC_GPIO98&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-power-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO96__FUNC_GPIO96&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	en_pp1000_edpbrdg: pp1000-edpbrdg-en-pins {</div><div class='add'>+		pins-vreg-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO29__FUNC_GPIO29&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	en_pp1800_edpbrdg: pp1800-edpbrdg-en-pins {</div><div class='add'>+		pins-vreg-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO30__FUNC_GPIO30&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	en_pp3300_edpbrdg: pp3300-edpbrdg-en-pins {</div><div class='add'>+		pins-vreg-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO31__FUNC_GPIO31&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_pin_report: pin-report-pins {</div><div class='add'>+		pins-touch-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO37__FUNC_GPIO37&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8186-mt6366-rt5650-sound";</div><div class='add'>+	model = "mt8186_rt5650";</div><div class='add'>+	mediatek,adsp = &lt;&amp;adsp&gt;;</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"Headphone", "HPOL",</div><div class='add'>+		"Headphone", "HPOR",</div><div class='add'>+		"IN1P", "Headset Mic",</div><div class='add'>+		"IN1N", "Headset Mic",</div><div class='add'>+		"Speakers", "SPOL",</div><div class='add'>+		"Speakers", "SPOR",</div><div class='add'>+		"HDMI1", "TX";</div><div class='add'>+</div><div class='add'>+	hs-playback-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5650&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hs-capture-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5650&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spk-share-dai-link {</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spk-hdmi-playback-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;it6505dptx&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;touchscreen_pins {</div><div class='add'>+	/delete-node/ pins-report-sw;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi_enable_pin {</div><div class='add'>+	pins-wifi-enable {</div><div class='add'>+		pinmux = &lt;PINMUX_GPIO51__FUNC_GPIO51&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi_pwrseq {</div><div class='add'>+	reset-gpios = &lt;&amp;pio 51 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi<br/>index 7c971198fa95..72a2a2bff0a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi</a></div><div class='hunk'>@@ -71,14 +71,14 @@</div><div class='ctx'> 	i2c-scl-internal-delay-ns = &lt;10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	touchscreen: touchscreen@10 {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='add'>+		compatible = "elan,ekth6915";</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='del'>-		post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-		hid-descr-addr = &lt;0x0001&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		no-reset-on-power-off;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts<br/>new file mode 100644<br/>index 000000000000..986498af4c70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku0.dts</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-ponyta.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ponyta sku0 board";</div><div class='add'>+	compatible = "google,ponyta-sku0", "google,ponyta", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	trackpad@15 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts<br/>new file mode 100644<br/>index 000000000000..ff5eea0ddeb4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta-sku1.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-ponyta.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ponyta sku1 board";</div><div class='add'>+	compatible = "google,ponyta-sku1", "google,ponyta", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	trackpad@2c {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_c1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi<br/>new file mode 100644<br/>index 000000000000..0abf69077089<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-ponyta.dtsi</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-steelix.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;keyboard_controller {</div><div class='add'>+	function-row-physmap = &lt;</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, 0)	/* T8 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x01, 0)	/* T9 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, 0)	/* T10 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, 0)	/* T11 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x05, 0)	/* T12 */</div><div class='add'>+	&gt;;</div><div class='add'>+</div><div class='add'>+	linux,keymap = &lt;</div><div class='add'>+		CROS_STD_MAIN_KEYMAP</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, KEY_BACK)</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, KEY_SCALE)</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, KEY_PLAYPAUSE)</div><div class='add'>+		MATRIX_KEY(0x00, 0x01, KEY_MICMUTE)</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, KEY_MUTE)</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)</div><div class='add'>+		MATRIX_KEY(0x01, 0x05, KEY_VOLUMEUP)</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6366codec {</div><div class='add'>+	mediatek,dmic-mode = &lt;1&gt;; /* one-wire */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	model = "mt8186_rt1019_rt5682s";</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts<br/>new file mode 100644<br/>index 000000000000..f721ad4e5c97<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-squirtle.dts</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-voltorb.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google squirtle board";</div><div class='add'>+	compatible = "google,squirtle", "mediatek,mt8186";</div><div class='add'>+	chassis-type = "convertible";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "elan,ekth6915";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchscreen@16 {</div><div class='add'>+		compatible = "elan,ekth8d18", "elan,ekth6a12nay";</div><div class='add'>+		reg = &lt;0x16&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	trackpad@68 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pin&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	/delete-node/ codec@1a;</div><div class='add'>+</div><div class='add'>+	rt5650: codec@1a {</div><div class='add'>+		compatible = "realtek,rt5650";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 17 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		cpvdd-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_codec_pins_default&gt;;</div><div class='add'>+		cbj-sleeve-gpios = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		realtek,dmic1-data-pin = &lt;2&gt;;</div><div class='add'>+		realtek,jd-mode = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8186-mt6366-rt5650-sound";</div><div class='add'>+	model = "mt8186_rt5650";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"Headphone", "HPOL",</div><div class='add'>+		"Headphone", "HPOR",</div><div class='add'>+		"HDMI1", "TX";</div><div class='add'>+</div><div class='add'>+	hs-playback-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5650&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hs-capture-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5650&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spk-hdmi-playback-dai-link {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;it6505dptx&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;speaker_codec {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;trackpad_steelix {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts<br/>new file mode 100644<br/>index 000000000000..23e194579bf2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku0.dts</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-starmie.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Starmie sku0 board";</div><div class='add'>+	compatible = "google,starmie-sku0", "google,starmie-sku2",</div><div class='add'>+		     "google,starmie-sku3", "google,starmie",</div><div class='add'>+		     "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel {</div><div class='add'>+	compatible = "starry,ili9882t";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	touchscreen: touchscreen@41 {</div><div class='add'>+		compatible = "ilitek,ili9882t";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		panel = &lt;&amp;panel&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts<br/>new file mode 100644<br/>index 000000000000..214b972c9357<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie-sku1.dts</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola-starmie.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Starmie sku1 board";</div><div class='add'>+	compatible = "google,starmie-sku1", "google,starmie-sku4",</div><div class='add'>+		     "google,starmie", "mediatek,mt8186";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel {</div><div class='add'>+	compatible = "starry,himax83102-j02", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	touchscreen_himax: touchscreen@4f {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touchscreen_pins&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		panel = &lt;&amp;panel&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;450&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x0001&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi<br/>new file mode 100644<br/>index 000000000000..a8e79c2791ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-starmie.dtsi</a></div><div class='hunk'>@@ -0,0 +1,427 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8186-corsola.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	en_pp6000_mipi_disp_150ma: en-pp6000-mipi-disp-150ma {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "en_pp6000_mipi_disp_150ma";</div><div class='add'>+		gpio = &lt;&amp;pio 154 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;en_pp6000_mipi_disp_150ma_fixed_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Starmie does not have 3.3V display regulator. It is replaced</div><div class='add'>+	 * with 6V module for enabling panel, re-using eDP GPIOs.</div><div class='add'>+	 */</div><div class='add'>+	/delete-node/ pp3300_disp_x;</div><div class='add'>+	en_pp6000_mipi_disp: en-regulator-pp6000-mipi-disp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_panel_fixed_pins&gt;;</div><div class='add'>+		gpios = &lt;&amp;pio 153 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "en_pp6000_mipi_disp";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-enable-ramp-delay = &lt;3000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tboard_thermistor1: thermal-sensor1 {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;auxadc 0&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+		temperature-lookup-table = &lt;    (-5000) 1492</div><div class='add'>+						0 1413</div><div class='add'>+						5000 1324</div><div class='add'>+						10000 1227</div><div class='add'>+						15000 1121</div><div class='add'>+						20000 1017</div><div class='add'>+						25000 900</div><div class='add'>+						30000 797</div><div class='add'>+						35000 698</div><div class='add'>+						40000 606</div><div class='add'>+						45000 522</div><div class='add'>+						50000 449</div><div class='add'>+						55000 383</div><div class='add'>+						60000 327</div><div class='add'>+						65000 278</div><div class='add'>+						70000 236</div><div class='add'>+						75000 201</div><div class='add'>+						80000 171</div><div class='add'>+						85000 145</div><div class='add'>+						90000 163</div><div class='add'>+						95000 124</div><div class='add'>+						100000 91</div><div class='add'>+						105000 78</div><div class='add'>+						110000 67</div><div class='add'>+						115000 58</div><div class='add'>+						120000 50</div><div class='add'>+						125000 44&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tboard_thermistor2: thermal-sensor2 {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;auxadc 1&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+		temperature-lookup-table = &lt;    (-5000) 1492</div><div class='add'>+						0 1413</div><div class='add'>+						5000 1324</div><div class='add'>+						10000 1227</div><div class='add'>+						15000 1121</div><div class='add'>+						20000 1017</div><div class='add'>+						25000 900</div><div class='add'>+						30000 797</div><div class='add'>+						35000 698</div><div class='add'>+						40000 606</div><div class='add'>+						45000 522</div><div class='add'>+						50000 449</div><div class='add'>+						55000 383</div><div class='add'>+						60000 327</div><div class='add'>+						65000 278</div><div class='add'>+						70000 236</div><div class='add'>+						75000 201</div><div class='add'>+						80000 171</div><div class='add'>+						85000 145</div><div class='add'>+						90000 163</div><div class='add'>+						95000 124</div><div class='add'>+						100000 91</div><div class='add'>+						105000 78</div><div class='add'>+						110000 67</div><div class='add'>+						115000 58</div><div class='add'>+						120000 50</div><div class='add'>+						125000 44&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Starmie does not have EC keyboard. Remove default keyboard controller</div><div class='add'>+ * and replace it with the driver for side switches.</div><div class='add'>+ */</div><div class='add'>+/delete-node/ &amp;keyboard_controller;</div><div class='add'>+</div><div class='add'>+&amp;cros_ec {</div><div class='add'>+	cbas: cbas {</div><div class='add'>+		compatible = "google,cros-cbas";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keyboard-controller {</div><div class='add'>+		compatible = "google,cros-ec-keyb-switches";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		/* compatible will be set in board dts */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 98 0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_default_pins&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;en_pp6000_mipi_disp&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;en_pp6000_mipi_disp_150ma&gt;;</div><div class='add'>+		pp1800-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1_pins_default {</div><div class='add'>+	pins-clk {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins-cmd-dat {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1_pins_uhs {</div><div class='add'>+	pins-clk {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pins-cmd-dat {</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pen_insert {</div><div class='add'>+	wakeup-event-action = &lt;EV_ACT_ANY&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	/* 185 lines */</div><div class='add'>+	gpio-line-names = "TP",</div><div class='add'>+			  "TP",</div><div class='add'>+			  "TP",</div><div class='add'>+			  "I2S0_HP_DI",</div><div class='add'>+			  "I2S3_DP_SPKR_DO",</div><div class='add'>+			  "SAR_INT_ODL",</div><div class='add'>+			  "BT_WAKE_AP_ODL",</div><div class='add'>+			  "WIFI_INT_ODL",</div><div class='add'>+			  "DPBRDG_INT_ODL",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "EC_AP_HPD_OD",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "TCHSCR_INT_1V8_ODL",</div><div class='add'>+			  "EC_AP_INT_ODL",</div><div class='add'>+			  "EC_IN_RW_ODL",</div><div class='add'>+			  "GSC_AP_INT_ODL",</div><div class='add'>+			  /*</div><div class='add'>+			   * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics</div><div class='add'>+			   * call it AP_WP_ODL.</div><div class='add'>+			   */</div><div class='add'>+			  "AP_FLASH_WP_L",</div><div class='add'>+			  "HP_INT_ODL",</div><div class='add'>+			  "PEN_EJECT_OD",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "UCAM_SEN_EN",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "I2S2_DP_SPK_MCK",</div><div class='add'>+			  "I2S2_DP_SPKR_BCK",</div><div class='add'>+			  "I2S2_DP_SPKR_LRCK",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "UART_GSC_TX_AP_RX",</div><div class='add'>+			  "UART_AP_TX_GSC_RX",</div><div class='add'>+			  "UART_DBGCON_TX_ADSP_RX",</div><div class='add'>+			  "UART_ADSP_TX_DBGCON_RX",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "TCHSCR_REPORT_DISABLE",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "EN_PP1800_DPBRDG",</div><div class='add'>+			  "SPI_AP_CLK_EC",</div><div class='add'>+			  "SPI_AP_CS_EC_L",</div><div class='add'>+			  "SPI_AP_DO_EC_DI",</div><div class='add'>+			  "SPI_AP_DI_EC_DO",</div><div class='add'>+			  "SPI_AP_CLK_GSC",</div><div class='add'>+			  "SPI_AP_CS_GSC_L",</div><div class='add'>+			  "SPI_AP_DO_GSC_DI",</div><div class='add'>+			  "SPI_AP_DI_GSC_DO",</div><div class='add'>+			  "UART_DBGCON_TX_SCP_RX",</div><div class='add'>+			  "UART_SCP_TX_DBGCON_RX",</div><div class='add'>+			  "EN_PP1200_CAM_X",</div><div class='add'>+			  "WLAN_MODULE_RST_L",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "I2S1_HP_DO",</div><div class='add'>+			  "I2S1_HP_BCK",</div><div class='add'>+			  "I2S1_HP_LRCK",</div><div class='add'>+			  "I2S1_HP_MCK",</div><div class='add'>+			  "TCHSCR_RST_1V8_L",</div><div class='add'>+			  "SPI_AP_CLK_ROM",</div><div class='add'>+			  "SPI_AP_CS_ROM_L",</div><div class='add'>+			  "SPI_AP_DO_ROM_DI",</div><div class='add'>+			  "SPI_AP_DI_ROM_DO",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "EMMC_STRB",</div><div class='add'>+			  "EMMC_CLK",</div><div class='add'>+			  "EMMC_CMD",</div><div class='add'>+			  "EMMC_RST_L",</div><div class='add'>+			  "EMMC_DATA0",</div><div class='add'>+			  "EMMC_DATA1",</div><div class='add'>+			  "EMMC_DATA2",</div><div class='add'>+			  "EMMC_DATA3",</div><div class='add'>+			  "EMMC_DATA4",</div><div class='add'>+			  "EMMC_DATA5",</div><div class='add'>+			  "EMMC_DATA6",</div><div class='add'>+			  "EMMC_DATA7",</div><div class='add'>+			  "AP_KPCOL0",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "TP",</div><div class='add'>+			  "SDIO_CLK",</div><div class='add'>+			  "SDIO_CMD",</div><div class='add'>+			  "SDIO_DATA0",</div><div class='add'>+			  "SDIO_DATA1",</div><div class='add'>+			  "SDIO_DATA2",</div><div class='add'>+			  "SDIO_DATA3",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "MIPI_BL_PWM_1V8",</div><div class='add'>+			  "DISP_RST_1V8_L",</div><div class='add'>+			  "MIPI_DPI_CLK",</div><div class='add'>+			  "MIPI_DPI_VSYNC",</div><div class='add'>+			  "MIPI_DPI_HSYNC",</div><div class='add'>+			  "MIPI_DPI_DE",</div><div class='add'>+			  "MIPI_DPI_D0",</div><div class='add'>+			  "MIPI_DPI_D1",</div><div class='add'>+			  "MIPI_DPI_D2",</div><div class='add'>+			  "MIPI_DPI_D3",</div><div class='add'>+			  "MIPI_DPI_D4",</div><div class='add'>+			  "MIPI_DPI_D5",</div><div class='add'>+			  "MIPI_DPI_D6",</div><div class='add'>+			  "MIPI_DPI_DA7",</div><div class='add'>+			  "MIPI_DPI_D8",</div><div class='add'>+			  "MIPI_DPI_D9",</div><div class='add'>+			  "MIPI_DPI_D10",</div><div class='add'>+			  "MIPI_DPI_D11",</div><div class='add'>+			  "PCM_BT_CLK",</div><div class='add'>+			  "PCM_BT_SYNC",</div><div class='add'>+			  "PCM_BT_DI",</div><div class='add'>+			  "PCM_BT_DO",</div><div class='add'>+			  "JTAG_TMS_TP",</div><div class='add'>+			  "JTAG_TCK_TP",</div><div class='add'>+			  "JTAG_TDI_TP",</div><div class='add'>+			  "JTAG_TDO_TP",</div><div class='add'>+			  "JTAG_TRSTN_TP",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "UCAM_DET_ODL",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "AP_I2C_TCHSCR_SCL_1V8",</div><div class='add'>+			  "AP_I2C_TCHSCR_SDA_1V8",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "AP_I2C_DPBRDG_SCL_1V8",</div><div class='add'>+			  "AP_I2C_DPBRDG_SDA_1V8",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "AP_I2C_AUD_SCL_1V8",</div><div class='add'>+			  "AP_I2C_AUD_SDA_1V8",</div><div class='add'>+			  "AP_I2C_DISP_SCL_1V8",</div><div class='add'>+			  "AP_I2C_DISP_SDA_1V8",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "SCP_I2C_SENSOR_SCL_1V8",</div><div class='add'>+			  "SCP_I2C_SENSOR_SDA_1V8",</div><div class='add'>+			  "AP_EC_WARM_RST_REQ",</div><div class='add'>+			  "AP_XHCI_INIT_DONE",</div><div class='add'>+			  "USB3_HUB_RST_L",</div><div class='add'>+			  "EN_SPKR",</div><div class='add'>+			  "BEEP_ON",</div><div class='add'>+			  "AP_DISP_BKLTEN",</div><div class='add'>+			  "EN_PP6000_MIPI_DISP",</div><div class='add'>+			  "EN_PP6000_MIPI_DISP_150MA",</div><div class='add'>+			  "BT_KILL_1V8_L",</div><div class='add'>+			  "WIFI_KILL_1V8_L",</div><div class='add'>+			  "PWRAP_SPI0_CSN",</div><div class='add'>+			  "PWRAP_SPI0_CK",</div><div class='add'>+			  "PWRAP_SPI0_MO",</div><div class='add'>+			  "PWRAP_SPI0_MI",</div><div class='add'>+			  "SRCLKENA0",</div><div class='add'>+			  "SRCLKENA1",</div><div class='add'>+			  "SCP_VREQ_VAO",</div><div class='add'>+			  "AP_RTC_CLK32K",</div><div class='add'>+			  "AP_PMIC_WDTRST_L",</div><div class='add'>+			  "AUD_CLK_MOSI",</div><div class='add'>+			  "AUD_SYNC_MOSI",</div><div class='add'>+			  "AUD_DAT_MOSI0",</div><div class='add'>+			  "AUD_DAT_MOSI1",</div><div class='add'>+			  "AUD_CLK_MISO",</div><div class='add'>+			  "AUD_SYNC_MISO",</div><div class='add'>+			  "AUD_DAT_MISO0",</div><div class='add'>+			  "AUD_DAT_MISO1",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "DPBRDG_RST_L",</div><div class='add'>+			  "LTE_W_DISABLE_L",</div><div class='add'>+			  "LTE_SAR_DETECT_L",</div><div class='add'>+			  "EN_PP3300_LTE_X",</div><div class='add'>+			  "LTE_PWR_OFF_L",</div><div class='add'>+			  "LTE_RESET_L",</div><div class='add'>+			  "TP",</div><div class='add'>+			  "TP";</div><div class='add'>+</div><div class='add'>+	en_pp6000_mipi_disp_150ma_fixed_pins: en_pp6000-mipi-disp-150ma-fixed-pins {</div><div class='add'>+		pins-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO154__FUNC_GPIO154&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_default_pins: panel-default-pins {</div><div class='add'>+		pins-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO98__FUNC_GPIO98&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_c1 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;thermal_zones {</div><div class='add'>+	tboard1-thermal {</div><div class='add'>+		polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+		polling-delay-passive = &lt;0&gt;; /* milliseconds */</div><div class='add'>+		thermal-sensors = &lt;&amp;tboard_thermistor1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tboard2-thermal {</div><div class='add'>+		polling-delay = &lt;1000&gt;; /* milliseconds */</div><div class='add'>+		polling-delay-passive = &lt;0&gt;; /* milliseconds */</div><div class='add'>+		thermal-sensors = &lt;&amp;tboard_thermistor2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi_pwrseq {</div><div class='add'>+	reset-gpios = &lt;&amp;pio 51 1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Battery on Starmie is using a different address than default.</div><div class='add'>+ * Remove old node to reuse "battery" alias.</div><div class='add'>+ */</div><div class='add'>+/delete-node/ &amp;battery;</div><div class='add'>+&amp;i2c_tunnel {</div><div class='add'>+	battery: sbs-battery@f {</div><div class='add'>+		compatible = "sbs,sbs-battery";</div><div class='add'>+		reg = &lt;0xf&gt;;</div><div class='add'>+		sbs,i2c-retry-count = &lt;2&gt;;</div><div class='add'>+		sbs,poll-retry-count = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi<br/>index e74e886a00cb..8a196dc9a96b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-steelix.dtsi</a></div><div class='hunk'>@@ -118,13 +118,16 @@</div><div class='ctx'> 	i2c-scl-internal-delay-ns = &lt;22000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	/* second source component */</div><div class='del'>-	trackpad@2c {</div><div class='add'>+	trackpad_steelix: trackpad@2c {</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x20&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pin&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -197,3 +200,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;trackpad {</div><div class='add'>+	status = "fail-needs-probe";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts<br/>index c3ae6f9616c8..4dbf2cb73a81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacool-sku327683.dts</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x15&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pin&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x0001&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts<br/>index 26d3451a5e47..24d9ede63eaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts</a></div><div class='hunk'>@@ -42,3 +42,7 @@</div><div class='ctx'> 		CROS_STD_MAIN_KEYMAP</div><div class='ctx'> 	&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;touchscreen {</div><div class='add'>+	compatible = "elan,ekth6a12nay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts<br/>index 447b57b12b41..ee5bc2cd9e9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262148.dts</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'> 		compatible = "hid-over-i2c";</div><div class='ctx'> 		reg = &lt;0x15&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pin&gt;;</div><div class='ctx'> 		hid-descr-addr = &lt;0x0001&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts<br/>deleted file mode 100644<br/>index d16834eec87a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589824.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Copyright 2022 Google LLC</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "mt8186-corsola-voltorb.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Voltorb sku589824 board";</div><div class='del'>-	compatible = "google,voltorb-sku589824", "google,voltorb",</div><div class='del'>-		     "mediatek,mt8186";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589825.dts b/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dts<br/>index 45e57f7706cc..cc805408a8b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589825.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb-sku589825.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dts</a></div><div class='hunk'>@@ -7,9 +7,8 @@</div><div class='ctx'> #include "mt8186-corsola-voltorb.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Google Voltorb sku589825 board";</div><div class='del'>-	compatible = "google,voltorb-sku589825", "google,voltorb",</div><div class='del'>-		     "mediatek,mt8186";</div><div class='add'>+	model = "Google Voltorb board";</div><div class='add'>+	compatible = "google,voltorb", "mediatek,mt8186";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi<br/>index 52ec58128d56..b495a241b443 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi</a></div><div class='hunk'>@@ -10,12 +10,6 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	chassis-type = "laptop";</div><div class='del'>-</div><div class='del'>-	max98360a: max98360a {</div><div class='del'>-		compatible = "maxim,max98360a";</div><div class='del'>-		sdmode-gpios = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu6 {</div><div class='hunk'>@@ -59,19 +53,14 @@</div><div class='ctx'> 	opp-hz = /bits/ 64 &lt;2200000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;rt1019p{</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "mediatek,mt8186-mt6366-rt5682s-max98360-sound";</div><div class='del'>-	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	spk-hdmi-playback-dai-link {</div><div class='del'>-		codec {</div><div class='del'>-			sound-dai = &lt;&amp;it6505dptx&gt;, &lt;&amp;max98360a&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;speaker_codec {</div><div class='add'>+	compatible = "maxim,max98360a";</div><div class='add'>+	sdmode-gpios = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	/delete-property/ sdb-gpios;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spmi {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi<br/>index 682c6ad2574d..ff20376a44d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi</a></div><div class='hunk'>@@ -161,6 +161,13 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		afe_dma_mem: audio-dma-pool {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0 0x100000&gt;;</div><div class='add'>+			alignment = &lt;0 0x10&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		adsp_dma_mem: memory@61000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0x61000000 0 0x100000&gt;;</div><div class='hunk'>@@ -259,15 +266,15 @@</div><div class='ctx'> 			mediatek,clk-provider = "cpu";</div><div class='ctx'> 			/* RT1019P and IT6505 connected to the same I2S line */</div><div class='ctx'> 			codec {</div><div class='del'>-				sound-dai = &lt;&amp;it6505dptx&gt;, &lt;&amp;rt1019p&gt;;</div><div class='add'>+				sound-dai = &lt;&amp;it6505dptx&gt;, &lt;&amp;speaker_codec&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rt1019p: speaker-codec {</div><div class='add'>+	speaker_codec: speaker-codec {</div><div class='ctx'> 		compatible = "realtek,rt1019p";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;rt1019p_pins_default&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_codec_pins_default&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		sdb-gpios = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -310,6 +317,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -390,19 +398,17 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	/*</div><div class='del'>-	 * Trackpad pin put here to work around second source components</div><div class='del'>-	 * sharing the pinmux in steelix designs.</div><div class='del'>-	 */</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c2_pins&gt;, &lt;&amp;trackpad_pin&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	i2c-scl-internal-delay-ns = &lt;10000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	trackpad@15 {</div><div class='add'>+	trackpad: trackpad@15 {</div><div class='ctx'> 		compatible = "elan,ekth3000";</div><div class='ctx'> 		reg = &lt;0x15&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pin&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -423,7 +429,8 @@</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		ovdd-supply = &lt;&amp;mt6366_vsim2_reg&gt;;</div><div class='ctx'> 		pwr18-supply = &lt;&amp;pp1800_dpbrdg_dx&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pio 177 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 177 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		extcon = &lt;&amp;usbc_extcon&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -517,7 +524,6 @@</div><div class='ctx'> 	cap-sdio-irq;</div><div class='ctx'> 	no-mmc;</div><div class='ctx'> 	no-sd;</div><div class='del'>-	non-removable;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;mt6366_vio18_reg&gt;;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='hunk'>@@ -1179,7 +1185,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rt1019p_pins_default: rt1019p-default-pins {</div><div class='add'>+	speaker_codec_pins_default: speaker-codec-default-pins {</div><div class='ctx'> 		pins-sdb {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO150__FUNC_GPIO150&gt;;</div><div class='ctx'> 			output-low;</div><div class='hunk'>@@ -1275,7 +1281,7 @@</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		mt6366codec: codec {</div><div class='add'>+		mt6366codec: audio-codec {</div><div class='ctx'> 			compatible = "mediatek,mt6366-sound", "mediatek,mt6358-sound";</div><div class='ctx'> 			Avdd-supply = &lt;&amp;mt6366_vaud28_reg&gt;;</div><div class='ctx'> 			mediatek,dmic-mode = &lt;1&gt;; /* one-wire */</div><div class='hunk'>@@ -1336,7 +1342,7 @@</div><div class='ctx'> 				regulator-allowed-modes = &lt;MT6397_BUCK_MODE_AUTO</div><div class='ctx'> 							   MT6397_BUCK_MODE_FORCE_PWM&gt;;</div><div class='ctx'> 				regulator-coupled-with = &lt;&amp;mt6366_vsram_gpu_reg&gt;;</div><div class='del'>-				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;100000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6366_vproc11_reg: vproc11 {</div><div class='hunk'>@@ -1545,7 +1551,7 @@</div><div class='ctx'> 				regulator-ramp-delay = &lt;6250&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;240&gt;;</div><div class='ctx'> 				regulator-coupled-with = &lt;&amp;mt6366_vgpu_reg&gt;;</div><div class='del'>-				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;100000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6366_vsram_others_reg: vsram-others {</div><div class='hunk'>@@ -1656,6 +1662,11 @@</div><div class='ctx'> 				try-power-role = "source";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		usbc_extcon: extcon0 {</div><div class='add'>+			compatible = "google,extcon-usbc-cros-ec";</div><div class='add'>+			google,usb-port-id = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi<br/>index 148c332018b0..b91f88ffae0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8186.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8186.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8186.dtsi</a></div><div class='hunk'>@@ -29,6 +29,13 @@</div><div class='ctx'> 		rdma1 = &amp;rdma1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	fhctl: fhctl@1000ce00 {</div><div class='add'>+		compatible = "mediatek,mt8186-fhctl";</div><div class='add'>+		clocks = &lt;&amp;apmixedsys CLK_APMIXED_TVDPLL&gt;;</div><div class='add'>+		reg = &lt;0 0x1000ce00 0 0x200&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cci: cci {</div><div class='ctx'> 		compatible = "mediatek,mt8186-cci";</div><div class='ctx'> 		clocks = &lt;&amp;mcusys CLK_MCU_ARMPLL_BUS_SEL&gt;,</div><div class='hunk'>@@ -1570,6 +1577,8 @@</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x420 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			usb_host0: usb@11200000 {</div><div class='hunk'>@@ -1583,8 +1592,6 @@</div><div class='ctx'> 					 &lt;&amp;infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI&gt;;</div><div class='ctx'> 				clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-				mediatek,syscon-wakeup = &lt;&amp;pericfg 0x420 2&gt;;</div><div class='del'>-				wakeup-source;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1636,6 +1643,8 @@</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x424 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			usb_host1: usb@11280000 {</div><div class='hunk'>@@ -1649,8 +1658,6 @@</div><div class='ctx'> 					 &lt;&amp;infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI&gt;;</div><div class='ctx'> 				clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck","xhci_ck";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-				mediatek,syscon-wakeup = &lt;&amp;pericfg 0x424 2&gt;;</div><div class='del'>-				wakeup-source;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-evb.dts b/arch/arm64/boot/dts/mediatek/mt8188-evb.dts<br/>index 68a82b49f7a3..f4c207d65b87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-evb.dts</a></div><div class='hunk'>@@ -140,8 +140,6 @@</div><div class='ctx'> &amp;nor_flash {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;nor_pins_default&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='hunk'>@@ -333,7 +331,11 @@</div><div class='ctx'> 	interrupts-extended = &lt;&amp;pio 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;scp {</div><div class='add'>+&amp;scp_cluster {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scp_c0 {</div><div class='ctx'> 	memory-region = &lt;&amp;scp_mem_reserved&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts<br/>new file mode 100644<br/>index 000000000000..79d6d12394b9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku0.dts</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku0 board";</div><div class='add'>+	compatible = "google,ciri-sku0", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "boe,nv110wum-l60", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-rt5682s";</div><div class='add'>+	model = "mt8188_m98390_5682";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"IN1P", "Headset Mic",</div><div class='add'>+		"Left Spk", "Front Left BE_OUT",</div><div class='add'>+		"Right Spk", "Front Right BE_OUT";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts<br/>new file mode 100644<br/>index 000000000000..ef5ea9d12b1d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku1.dts</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku1 board";</div><div class='add'>+	compatible = "google,ciri-sku1", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "ivo,t109nw41", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ audio-codec@1a;</div><div class='add'>+</div><div class='add'>+	es8326: audio-codec@19 {</div><div class='add'>+		compatible = "everest,es8326";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 108 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_codec_pins&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		everest,jack-pol = [0e];</div><div class='add'>+		everest,interrupt-clk = [00];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-es8326";</div><div class='add'>+	model = "mt8188_m98390_8326";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"MIC1", "Headset Mic",</div><div class='add'>+		"Left Spk", "Front Left BE_OUT",</div><div class='add'>+		"Right Spk", "Front Right BE_OUT";</div><div class='add'>+</div><div class='add'>+	dai-link-2 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-3 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts<br/>new file mode 100644<br/>index 000000000000..ef56786fc2be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku2.dts</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku2 board";</div><div class='add'>+	compatible = "google,ciri-sku2", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "boe,nv110wum-l60", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ audio-codec@1a;</div><div class='add'>+</div><div class='add'>+	es8326: audio-codec@19 {</div><div class='add'>+		compatible = "everest,es8326";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 108 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_codec_pins&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		everest,jack-pol = [0e];</div><div class='add'>+		everest,interrupt-clk = [00];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-es8326";</div><div class='add'>+	model = "mt8188_m98390_8326";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"MIC1", "Headset Mic",</div><div class='add'>+		"Left Spk", "Front Left BE_OUT",</div><div class='add'>+		"Right Spk", "Front Right BE_OUT";</div><div class='add'>+</div><div class='add'>+	dai-link-2 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-3 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts<br/>new file mode 100644<br/>index 000000000000..524f7f0064c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku3.dts</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku3 board";</div><div class='add'>+	compatible = "google,ciri-sku3", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "ivo,t109nw41", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-rt5682s";</div><div class='add'>+	model = "mt8188_m98390_5682";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"IN1P", "Headset Mic",</div><div class='add'>+		"Left Spk", "Front Left BE_OUT",</div><div class='add'>+		"Right Spk", "Front Right BE_OUT";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts<br/>new file mode 100644<br/>index 000000000000..ea953d7e1543<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku4.dts</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku4 board (rev4)";</div><div class='add'>+	compatible = "google,ciri-sku4", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "boe,nv110wum-l60", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ amplifier@38;</div><div class='add'>+	/delete-node/ amplifier@39;</div><div class='add'>+</div><div class='add'>+	tas2563: amplifier@4f {</div><div class='add'>+		compatible = "ti,tas2563", "ti,tas2781";</div><div class='add'>+		reg = &lt;0x4f&gt;, &lt;0x4c&gt;; /* left / right channel */</div><div class='add'>+		reset-gpios = &lt;&amp;pio 118 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-rt5682s";</div><div class='add'>+	model = "mt8188_tas2563_5682";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"IN1P", "Headset Mic";</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2563&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts<br/>new file mode 100644<br/>index 000000000000..bf87201ccf27<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku5.dts</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku5 board (rev4)";</div><div class='add'>+	compatible = "google,ciri-sku5", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "ivo,t109nw41", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ audio-codec@1a;</div><div class='add'>+	/delete-node/ amplifier@38;</div><div class='add'>+	/delete-node/ amplifier@39;</div><div class='add'>+</div><div class='add'>+	es8326: audio-codec@19 {</div><div class='add'>+		compatible = "everest,es8326";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 108 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_codec_pins&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		everest,jack-pol = [0e];</div><div class='add'>+		everest,interrupt-clk = [00];</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tas2563: amplifier@4f {</div><div class='add'>+		compatible = "ti,tas2563", "ti,tas2781";</div><div class='add'>+		reg = &lt;0x4f&gt;, &lt;0x4c&gt;; /* left / right channel */</div><div class='add'>+		reset-gpios = &lt;&amp;pio 118 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-es8326";</div><div class='add'>+	model = "mt8188_tas2563_8326";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"MIC1", "Headset Mic";</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2563&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-2 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-3 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts<br/>new file mode 100644<br/>index 000000000000..17d7359dfb6a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku6.dts</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku6 board (rev4)";</div><div class='add'>+	compatible = "google,ciri-sku6", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "boe,nv110wum-l60", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ audio-codec@1a;</div><div class='add'>+	/delete-node/ amplifier@38;</div><div class='add'>+	/delete-node/ amplifier@39;</div><div class='add'>+</div><div class='add'>+	es8326: audio-codec@19 {</div><div class='add'>+		compatible = "everest,es8326";</div><div class='add'>+		reg = &lt;0x19&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 108 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_codec_pins&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		everest,jack-pol = [0e];</div><div class='add'>+		everest,interrupt-clk = [00];</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tas2563: amplifier@4f {</div><div class='add'>+		compatible = "ti,tas2563", "ti,tas2781";</div><div class='add'>+		reg = &lt;0x4f&gt;, &lt;0x4c&gt;; /* left / right channel */</div><div class='add'>+		reset-gpios = &lt;&amp;pio 118 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-es8326";</div><div class='add'>+	model = "mt8188_tas2563_8326";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"MIC1", "Headset Mic";</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2563&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-2 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-3 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8326&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts<br/>new file mode 100644<br/>index 000000000000..825015b452d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri-sku7.dts</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt-ciri.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Google Ciri sku7 board (rev4)";</div><div class='add'>+	compatible = "google,ciri-sku7", "google,ciri", "mediatek,mt8188";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_panel {</div><div class='add'>+	compatible = "ivo,t109nw41", "himax,hx83102";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	/delete-node/ amplifier@38;</div><div class='add'>+	/delete-node/ amplifier@39;</div><div class='add'>+</div><div class='add'>+	tas2563: amplifier@4f {</div><div class='add'>+		compatible = "ti,tas2563", "ti,tas2781";</div><div class='add'>+		reg = &lt;0x4f&gt;, &lt;0x4c&gt;; /* left / right channel */</div><div class='add'>+		reset-gpios = &lt;&amp;pio 118 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8188-rt5682s";</div><div class='add'>+	model = "mt8188_tas2563_5682";</div><div class='add'>+</div><div class='add'>+	audio-routing =</div><div class='add'>+		"ETDM1_OUT", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_OUT", "ETDM_HP_PIN",</div><div class='add'>+		"ETDM1_IN", "ETDM_SPK_PIN",</div><div class='add'>+		"ETDM2_IN", "ETDM_HP_PIN",</div><div class='add'>+		"ADDA Capture", "MTKAIF_PIN",</div><div class='add'>+		"Headphone Jack", "HPOL",</div><div class='add'>+		"Headphone Jack", "HPOR",</div><div class='add'>+		"IN1P", "Headset Mic";</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;tas2563&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi<br/>new file mode 100644<br/>index 000000000000..6815c435a57e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt-ciri.dtsi</a></div><div class='hunk'>@@ -0,0 +1,316 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Google LLC</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188-geralt.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;aud_etdm_hp_on {</div><div class='add'>+	pins-mclk {</div><div class='add'>+		pinmux = &lt;PINMUX_GPIO114__FUNC_O_I2SO2_MCK&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;aud_etdm_hp_off {</div><div class='add'>+	pins-mclk {</div><div class='add'>+		pinmux = &lt;PINMUX_GPIO114__FUNC_B_GPIO114&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	rt5682s: audio-codec@1a {</div><div class='add'>+		compatible = "realtek,rt5682s";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 108 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;audio_codec_pins&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		AVDD-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='add'>+		LDO1-IN-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+		realtek,jd-src = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	max98390_38: amplifier@38 {</div><div class='add'>+		compatible = "maxim,max98390";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		sound-name-prefix = "Front Right";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 118 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_en&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	max98390_39: amplifier@39 {</div><div class='add'>+		compatible = "maxim,max98390";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		sound-name-prefix = "Front Left";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_tunnel {</div><div class='add'>+	/*</div><div class='add'>+	 * The virtual battery I2C addr is 0xf on Ciri, so we describe it</div><div class='add'>+	 * manually instead of including 'arm/cros-ec-sbs.dtsi'.</div><div class='add'>+	 **/</div><div class='add'>+	battery: sbs-battery@f {</div><div class='add'>+		compatible = "sbs,sbs-battery";</div><div class='add'>+		reg = &lt;0xf&gt;;</div><div class='add'>+		sbs,i2c-retry-count = &lt;2&gt;;</div><div class='add'>+		sbs,poll-retry-count = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_tx_config0 {</div><div class='add'>+	drive-strength-microamp = &lt;5200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vm18_ldo_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+	regulator-microvolt-offset = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	dai-link-0 {</div><div class='add'>+		link-name = "ETDM1_IN_BE";</div><div class='add'>+		dai-format = "i2s";</div><div class='add'>+		mediatek,clk-provider = "cpu";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		link-name = "ETDM1_OUT_BE";</div><div class='add'>+		dai-format = "i2s";</div><div class='add'>+		mediatek,clk-provider = "cpu";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;max98390_38&gt;,</div><div class='add'>+				    &lt;&amp;max98390_39&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-2 {</div><div class='add'>+		link-name = "ETDM2_IN_BE";</div><div class='add'>+		mediatek,clk-provider = "cpu";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5682s 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-3 {</div><div class='add'>+		link-name = "ETDM2_OUT_BE";</div><div class='add'>+		mediatek,clk-provider = "cpu";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5682s 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-4 {</div><div class='add'>+		link-name = "DPTX_BE";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;dp_tx&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"GSC_AP_INT_ODL",</div><div class='add'>+		"AP_DISP_BKLTEN",</div><div class='add'>+		"",</div><div class='add'>+		"EN_PPVAR_MIPI_DISP",</div><div class='add'>+		"EN_PPVAR_MIPI_DISP_150MA",</div><div class='add'>+		"TCHSCR_RST_1V8_L",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"I2S_SPKR_DATAOUT",</div><div class='add'>+		"EN_PP3300_WLAN_X",</div><div class='add'>+		"WIFI_KILL_1V8_L",</div><div class='add'>+		"BT_KILL_1V8_L",</div><div class='add'>+		"AP_FLASH_WP_L", /* ... is crossystem ABI. Rev1 schematics call it AP_WP_ODL. */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"WCAM_PWDN_L",</div><div class='add'>+		"WCAM_RST_L",</div><div class='add'>+		"UCAM_PWDM_L",</div><div class='add'>+		"UCAM_RST_L",</div><div class='add'>+		"WCAM_24M_CLK",</div><div class='add'>+		"UCAM_24M_CLK",</div><div class='add'>+		"MT6319_INT",</div><div class='add'>+		"DISP_RST_1V8_L",</div><div class='add'>+		"DSIO_DSI_TE",</div><div class='add'>+		"",</div><div class='add'>+		"TP",</div><div class='add'>+		"MIPI_BL_PWM_1V8",</div><div class='add'>+		"",</div><div class='add'>+		"UART_AP_TX_GSC_RX",</div><div class='add'>+		"UART_GSC_TX_AP_RX",</div><div class='add'>+		"UART_SSPM_TX_DBGCON_RX",</div><div class='add'>+		"UART_DBGCON_TX_SSPM_RX",</div><div class='add'>+		"UART_ADSP_TX_DBGCON_RX",</div><div class='add'>+		"UART_DBGCON_TX_ADSP_RX",</div><div class='add'>+		"JTAG_AP_TMS",</div><div class='add'>+		"JTAG_AP_TCK",</div><div class='add'>+		"JTAG_AP_TDI",</div><div class='add'>+		"JTAG_AP_TDO",</div><div class='add'>+		"JTAG_AP_TRST",</div><div class='add'>+		"AP_KPCOL0",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"TP",</div><div class='add'>+		"EC_AP_HPD_OD",</div><div class='add'>+		"PCIE_WAKE_1V8_ODL",</div><div class='add'>+		"PCIE_RST_1V8_L",</div><div class='add'>+		"PCIE_CLKREQ_1V8_ODL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"AP_I2C_AUD_SCL_1V8",</div><div class='add'>+		"AP_I2C_AUD_SDA_1V8",</div><div class='add'>+		"AP_I2C_TPM_SCL_1V8",</div><div class='add'>+		"AP_I2C_TPM_SDA_1V8",</div><div class='add'>+		"AP_I2C_TCHSCR_SCL_1V8",</div><div class='add'>+		"AP_I2C_TCHSCR_SDA_1V8",</div><div class='add'>+		"AP_I2C_PMIC_SAR_SCL_1V8",</div><div class='add'>+		"AP_I2C_PMIC_SAR_SDA_1V8",</div><div class='add'>+		"AP_I2C_EC_HID_KB_SCL_1V8",</div><div class='add'>+		"AP_I2C_EC_HID_KB_SDA_1V8",</div><div class='add'>+		"AP_I2C_UCAM_SCL_1V8",</div><div class='add'>+		"AP_I2C_UCAM_SDA_1V8",</div><div class='add'>+		"AP_I2C_WCAM_SCL_1V8",</div><div class='add'>+		"AP_I2C_WCAM_SDA_1V8",</div><div class='add'>+		"SPI_AP_CS_EC_L",</div><div class='add'>+		"SPI_AP_CLK_EC",</div><div class='add'>+		"SPI_AP_DO_EC_DI",</div><div class='add'>+		"SPI_AP_DI_EC_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"SPI_AP_CS_TCHSCR_L",</div><div class='add'>+		"SPI_AP_CLK_TCHSCR",</div><div class='add'>+		"SPI_AP_DO_TCHSCR_DI",</div><div class='add'>+		"SPI_AP_DI_TCHSCR_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"PWRAP_SPI_CS_L",</div><div class='add'>+		"PWRAP_SPI_CK",</div><div class='add'>+		"PWRAP_SPI_MOSI",</div><div class='add'>+		"PWRAP_SPI_MISO",</div><div class='add'>+		"SRCLKENA0",</div><div class='add'>+		"SRCLKENA1",</div><div class='add'>+		"SCP_VREQ_VAO",</div><div class='add'>+		"AP_RTC_CLK32K",</div><div class='add'>+		"AP_PMIC_WDTRST_L",</div><div class='add'>+		"AUD_CLK_MOSI",</div><div class='add'>+		"AUD_SYNC_MOSI",</div><div class='add'>+		"AUD_DAT_MOSI0",</div><div class='add'>+		"AUD_DAT_MOSI1",</div><div class='add'>+		"AUD_DAT_MISO0",</div><div class='add'>+		"AUD_DAT_MISO1",</div><div class='add'>+		"",</div><div class='add'>+		"HP_INT_ODL",</div><div class='add'>+		"SPKR_INT_ODL",</div><div class='add'>+		"I2S_HP_DATAIN",</div><div class='add'>+		"EN_SPKR",</div><div class='add'>+		"I2S_SPKR_MCLK",</div><div class='add'>+		"I2S_SPKR_BCLK",</div><div class='add'>+		"I2S_HP_MCLK",</div><div class='add'>+		"I2S_HP_BCLK",</div><div class='add'>+		"I2S_HP_LRCK",</div><div class='add'>+		"I2S_HP_DATAOUT",</div><div class='add'>+		"RST_SPKR_L",</div><div class='add'>+		"I2S_SPKR_LRCK",</div><div class='add'>+		"I2S_SPKR_DATAIN",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SPI_AP_CLK_ROM",</div><div class='add'>+		"SPI_AP_CS_ROM_L",</div><div class='add'>+		"SPI_AP_DO_ROM_DI",</div><div class='add'>+		"SPI_AP_DI_ROM_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"EN_PP2800A_UCAM_X",</div><div class='add'>+		"EN_PP1200_UCAM_X",</div><div class='add'>+		"EN_PP2800A_WCAM_X",</div><div class='add'>+		"EN_PP1100_WCAM_X",</div><div class='add'>+		"TCHSCR_INT_1V8_L",</div><div class='add'>+		"",</div><div class='add'>+		"MT7921_PMU_EN_1V8",</div><div class='add'>+		"",</div><div class='add'>+		"AP_EC_WARM_RST_REQ",</div><div class='add'>+		"EC_AP_HID_INT_ODL",</div><div class='add'>+		"EC_AP_INT_ODL",</div><div class='add'>+		"AP_XHCI_INIT_DONE",</div><div class='add'>+		"EMMC_DAT7",</div><div class='add'>+		"EMMC_DAT6",</div><div class='add'>+		"EMMC_DAT5",</div><div class='add'>+		"EMMC_DAT4",</div><div class='add'>+		"EMMC_RST_L",</div><div class='add'>+		"EMMC_CMD",</div><div class='add'>+		"EMMC_CLK",</div><div class='add'>+		"EMMC_DAT3",</div><div class='add'>+		"EMMC_DAT2",</div><div class='add'>+		"EMMC_DAT1",</div><div class='add'>+		"EMMC_DAT0",</div><div class='add'>+		"EMMC_DSL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"USB3_HUB_RST_L",</div><div class='add'>+		"EC_AP_RSVD0_ODL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SPMI_SCL",</div><div class='add'>+		"SPMI_SDA";</div><div class='add'>+</div><div class='add'>+	audio_codec_pins: audio-codec-pins {</div><div class='add'>+		pins-hp-int-odl {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO108__FUNC_B_GPIO108&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speaker_en: speaker-en-pins {</div><div class='add'>+		pins-en-spkr {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO111__FUNC_B_GPIO111&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi<br/>new file mode 100644<br/>index 000000000000..7fedbacdac44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1340 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022 MediaTek Inc.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "mt8188.dtsi"</div><div class='add'>+#include "mt6359.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		dsi0 = &amp;disp_dsi0;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c5 = &amp;i2c5;</div><div class='add'>+		i2c6 = &amp;i2c6;</div><div class='add'>+		mmc0 = &amp;mmc0;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lcd0: backlight-lcd0 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 1023&gt;;</div><div class='add'>+		default-brightness-level = &lt;576&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;1023&gt;;</div><div class='add'>+		power-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;disp_pwm0 0 500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic-codec {</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		num-channels = &lt;2&gt;;</div><div class='add'>+		wakeup-delay-ms = &lt;100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* The size will be filled in by the bootloader */</div><div class='add'>+		reg = &lt;0 0x40000000 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide LDO 1.8V power rail */</div><div class='add'>+	pp1800_ldo_z1: regulator-pp1800-ldo-z1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp1800_ldo_z1";</div><div class='add'>+		/* controlled by PP3300_Z1 */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* separately switched 3.3V power rail */</div><div class='add'>+	pp3300_s3: regulator-pp3300-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp3300_s3";</div><div class='add'>+		/* controlled by PMIC */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide 3.3V power rail */</div><div class='add'>+	pp3300_z1: regulator-pp3300-z1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp3300_z1";</div><div class='add'>+		/* controlled by PP3300_LDO_Z5 &amp; EN_PWR_Z1 */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pp3300_wlan: regulator-pp3300-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp3300_wlan";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vin-supply = &lt;&amp;pp3300_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide 4.2V power rail */</div><div class='add'>+	pp4200_s5: regulator-pp4200-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp4200_s5";</div><div class='add'>+		/* controlled by EC */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;4200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide 5.0V power rail */</div><div class='add'>+	pp5000_z1: regulator-pp5000-z1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp5000_z1";</div><div class='add'>+		/* controlled by EC */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pp5000_usb_vbus: regulator-pp5000-usb-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pp5000_usb_vbus";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 150 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp5000_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide semi-regulated power rail from battery or USB */</div><div class='add'>+	ppvar_sys: regulator-ppvar-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ppvar_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ppvar_mipi_disp_avdd: regulator-ppvar-mipi-disp-avdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ppvar_mipi_disp_avdd";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mipi_disp_avdd_en&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp5000_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ppvar_mipi_disp_avee: regulator-ppvar-mipi-disp-avee {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ppvar_mipi_disp_avee";</div><div class='add'>+		regulator-enable-ramp-delay = &lt;10000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mipi_disp_avee_en&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;pp5000_z1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scp_mem_reserved: memory@50000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x50000000 0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apu_mem: memory@55000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x55000000 0 0x1400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: memory@60000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60000000 0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		afe_dma_mem: memory@60f00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60f00000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_dma_mem: memory@61000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x61000000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adsp {</div><div class='add'>+	memory-region = &lt;&amp;adsp_dma_mem&gt;, &lt;&amp;adsp_mem&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;adsp_uart_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+	mediatek,etdm-out1-cowork-source = &lt;0&gt;; /* in1 */</div><div class='add'>+	mediatek,etdm-in2-cowork-source = &lt;3&gt;; /* out2 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;auxadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cam_vcore {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vproc1_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Geralt is the reference design and doesn't have target TDP.</div><div class='add'>+ * Ciri is (currently) the only device following Geralt, and its</div><div class='add'>+ * TDP target is 90 degrees.</div><div class='add'>+ **/</div><div class='add'>+&amp;cpu_little0_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little1_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little2_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little3_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_big0_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_big1_alert0 {</div><div class='add'>+	temperature = &lt;90000&gt;;</div><div class='add'>+	hysteresis = &lt;2000&gt;;</div><div class='add'>+	type = "passive";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	dsi_panel: panel@0 {</div><div class='add'>+		/* Compatible string for different panels can be found in each device dts */</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mipi_dsi_pins&gt;;</div><div class='add'>+</div><div class='add'>+		backlight = &lt;&amp;backlight_lcd0&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;ppvar_mipi_disp_avdd&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;ppvar_mipi_disp_avee&gt;;</div><div class='add'>+		pp1800-supply = &lt;&amp;mt6359_vm18_ldo_reg&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsi0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_pwm0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;disp_pwm0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;disp_pwm1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dither0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;postmask0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethdr0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ethdr0_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;vdosys1_ep_ext&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			ethdr0_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;merge5_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gamma0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;postmask0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp_intf1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dp_intf1_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;merge5_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dp_intf1_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dptx_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp_tx {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp_tx_hpd&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dptx_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp_intf1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dptx_out: endpoint {</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@50 {</div><div class='add'>+		compatible = "google,cr50";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gsc_int&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;merge5 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			merge5_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ethdr0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			merge5_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dp_intf1_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfg0 {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfg1 {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vsram_others_ldo_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_tx_config0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	hs400-ds-delay = &lt;0x1481b&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_pins_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc0_pins_uhs&gt;;</div><div class='add'>+	supports-cqe;</div><div class='add'>+	vmmc-supply = &lt;&amp;mt6359_vemc_1_ldo_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;mt6359_vufs_ldo_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359codec {</div><div class='add'>+	mediatek,dmic-mode = &lt;1&gt;; /* one-wire */</div><div class='add'>+	mediatek,mic-type-0 = &lt;2&gt;; /* DMIC */</div><div class='add'>+	mediatek,mic-type-2 = &lt;2&gt;; /* DMIC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vcore_buck_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vgpu11_buck_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vgpu11_sshub_buck_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;550000&gt;;</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vio28_ldo_reg {</div><div class='add'>+	/delete-property/ regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vm18_ldo_reg {</div><div class='add'>+	/delete-property/ regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vmodem_buck_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;775000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;775000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vpa_buck_reg {</div><div class='add'>+	regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vproc2_buck_reg {</div><div class='add'>+	/*</div><div class='add'>+	 * Called "ppvar_dvdd_gpu" in the schematic. Renamed to</div><div class='add'>+	 * "ppvar_dvdd_vgpu" here to match mtk-regulator-coupler requirements.</div><div class='add'>+	 */</div><div class='add'>+	regulator-name = "ppvar_dvdd_vgpu";</div><div class='add'>+	regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+	regulator-coupled-with = &lt;&amp;mt6359_vsram_others_ldo_reg&gt;;</div><div class='add'>+	regulator-coupled-max-spread = &lt;6250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vpu_buck_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vrf12_ldo_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vsram_md_ldo_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vsram_others_ldo_reg {</div><div class='add'>+	regulator-name = "pp0850_dvdd_sram_gpu";</div><div class='add'>+	regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+	regulator-coupled-with = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+	regulator-coupled-max-spread = &lt;6250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vufs_ldo_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nor_flash {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;nor_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;52000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ovl0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;vdosys0_ep_main&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciephy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"gsc_int",</div><div class='add'>+		"AP_DISP_BKLTEN",</div><div class='add'>+		"",</div><div class='add'>+		"EN_PPVAR_MIPI_DISP",</div><div class='add'>+		"EN_PPVAR_MIPI_DISP_150MA",</div><div class='add'>+		"TCHSCR_RST_1V8_L",</div><div class='add'>+		"TCHSRC_REPORT_DISABLE",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"I2S_SPKR_DATAOUT",</div><div class='add'>+		"EN_PP3300_WLAN_X",</div><div class='add'>+		"WIFI_KILL_1V8_L",</div><div class='add'>+		"BT_KILL_1V8_L",</div><div class='add'>+		"AP_FLASH_WP_L", /* ... is crossystem ABI. Rev1 schematics call it AP_WP_ODL. */</div><div class='add'>+		"",</div><div class='add'>+		"EDP_HPD_1V8",</div><div class='add'>+		"WCAM_PWDN_L",</div><div class='add'>+		"WCAM_RST_L",</div><div class='add'>+		"UCAM_PWDM_L",</div><div class='add'>+		"UCAM_RST_L",</div><div class='add'>+		"WCAM_24M_CLK",</div><div class='add'>+		"UCAM_24M_CLK",</div><div class='add'>+		"MT6319_INT",</div><div class='add'>+		"DISP_RST_1V8_L",</div><div class='add'>+		"DSIO_DSI_TE",</div><div class='add'>+		"EN_PP3300_EDP_DISP_X",</div><div class='add'>+		"TP",</div><div class='add'>+		"MIPI_BL_PWM_1V8",</div><div class='add'>+		"EDP_BL_PWM_1V8",</div><div class='add'>+		"UART_AP_TX_GSC_RX",</div><div class='add'>+		"UART_GSC_TX_AP_RX",</div><div class='add'>+		"UART_SSPM_TX_DBGCON_RX",</div><div class='add'>+		"UART_DBGCON_TX_SSPM_RX",</div><div class='add'>+		"UART_ADSP_TX_DBGCON_RX",</div><div class='add'>+		"UART_DBGCON_TX_ADSP_RX",</div><div class='add'>+		"JTAG_AP_TMS",</div><div class='add'>+		"JTAG_AP_TCK",</div><div class='add'>+		"JTAG_AP_TDI",</div><div class='add'>+		"JTAG_AP_TDO",</div><div class='add'>+		"JTAG_AP_TRST",</div><div class='add'>+		"AP_KPCOL0",</div><div class='add'>+		"TP",</div><div class='add'>+		"BEEP_ON_OD",</div><div class='add'>+		"TP",</div><div class='add'>+		"EC_AP_HPD_OD",</div><div class='add'>+		"PCIE_WAKE_1V8_ODL",</div><div class='add'>+		"PCIE_RST_1V8_L",</div><div class='add'>+		"PCIE_CLKREQ_1V8_ODL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"AP_I2C_AUD_SCL_1V8",</div><div class='add'>+		"AP_I2C_AUD_SDA_1V8",</div><div class='add'>+		"AP_I2C_TPM_SCL_1V8",</div><div class='add'>+		"AP_I2C_TPM_SDA_1V8",</div><div class='add'>+		"AP_I2C_TCHSCR_SCL_1V8",</div><div class='add'>+		"AP_I2C_TCHSCR_SDA_1V8",</div><div class='add'>+		"AP_I2C_PMIC_SAR_SCL_1V8",</div><div class='add'>+		"AP_I2C_PMIC_SAR_SDA_1V8",</div><div class='add'>+		"AP_I2C_EC_HID_KB_SCL_1V8",</div><div class='add'>+		"AP_I2C_EC_HID_KB_SDA_1V8",</div><div class='add'>+		"AP_I2C_UCAM_SCL_1V8",</div><div class='add'>+		"AP_I2C_UCAM_SDA_1V8",</div><div class='add'>+		"AP_I2C_WCAM_SCL_1V8",</div><div class='add'>+		"AP_I2C_WCAM_SDA_1V8",</div><div class='add'>+		"SPI_AP_CS_EC_L",</div><div class='add'>+		"SPI_AP_CLK_EC",</div><div class='add'>+		"SPI_AP_DO_EC_DI",</div><div class='add'>+		"SPI_AP_DI_EC_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"SPI_AP_CS_TCHSCR_L",</div><div class='add'>+		"SPI_AP_CLK_TCHSCR",</div><div class='add'>+		"SPI_AP_DO_TCHSCR_DI",</div><div class='add'>+		"SPI_AP_DI_TCHSCR_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"SAR_INT_ODL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"PWRAP_SPI_CS_L",</div><div class='add'>+		"PWRAP_SPI_CK",</div><div class='add'>+		"PWRAP_SPI_MOSI",</div><div class='add'>+		"PWRAP_SPI_MISO",</div><div class='add'>+		"SRCLKENA0",</div><div class='add'>+		"SRCLKENA1",</div><div class='add'>+		"SCP_VREQ_VAO",</div><div class='add'>+		"AP_RTC_CLK32K",</div><div class='add'>+		"AP_PMIC_WDTRST_L",</div><div class='add'>+		"AUD_CLK_MOSI",</div><div class='add'>+		"AUD_SYNC_MOSI",</div><div class='add'>+		"AUD_DAT_MOSI0",</div><div class='add'>+		"AUD_DAT_MOSI1",</div><div class='add'>+		"AUD_DAT_MISO0",</div><div class='add'>+		"AUD_DAT_MISO1",</div><div class='add'>+		"SD_CD_ODL",</div><div class='add'>+		"HP_INT_ODL",</div><div class='add'>+		"SPKR_INT_ODL",</div><div class='add'>+		"I2S_HP_DATAIN",</div><div class='add'>+		"EN_SPKR",</div><div class='add'>+		"I2S_SPKR_MCLK",</div><div class='add'>+		"I2S_SPKR_BCLK",</div><div class='add'>+		"I2S_HP_MCLK",</div><div class='add'>+		"I2S_HP_BCLK",</div><div class='add'>+		"I2S_HP_LRCK",</div><div class='add'>+		"I2S_HP_DATAOUT",</div><div class='add'>+		"RST_SPKR_L",</div><div class='add'>+		"I2S_SPKR_LRCK",</div><div class='add'>+		"I2S_SPKR_DATAIN",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SPI_AP_CLK_ROM",</div><div class='add'>+		"SPI_AP_CS_ROM_L",</div><div class='add'>+		"SPI_AP_DO_ROM_DI",</div><div class='add'>+		"SPI_AP_DI_ROM_DO",</div><div class='add'>+		"TP",</div><div class='add'>+		"TP",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"EN_PP2800A_UCAM_X",</div><div class='add'>+		"EN_PP1200_UCAM_X",</div><div class='add'>+		"EN_PP2800A_WCAM_X",</div><div class='add'>+		"EN_PP1100_WCAM_X",</div><div class='add'>+		"TCHSCR_INT_1V8_L",</div><div class='add'>+		"EN_PP3300_MIPI_TCHSCR_X",</div><div class='add'>+		"MT7921_PMU_EN_1V8",</div><div class='add'>+		"EN_PP3300_EDP_TCHSCR_X",</div><div class='add'>+		"AP_EC_WARM_RST_REQ",</div><div class='add'>+		"EC_AP_HID_INT_ODL",</div><div class='add'>+		"EC_AP_INT_ODL",</div><div class='add'>+		"AP_XHCI_INIT_DONE",</div><div class='add'>+		"EMMC_DAT7",</div><div class='add'>+		"EMMC_DAT6",</div><div class='add'>+		"EMMC_DAT5",</div><div class='add'>+		"EMMC_DAT4",</div><div class='add'>+		"EMMC_RST_L",</div><div class='add'>+		"EMMC_CMD",</div><div class='add'>+		"EMMC_CLK",</div><div class='add'>+		"EMMC_DAT3",</div><div class='add'>+		"EMMC_DAT2",</div><div class='add'>+		"EMMC_DAT1",</div><div class='add'>+		"EMMC_DAT0",</div><div class='add'>+		"EMMC_DSL",</div><div class='add'>+		"SD_CMD",</div><div class='add'>+		"SD_CLK",</div><div class='add'>+		"SD_DAT0",</div><div class='add'>+		"SD_DAT1",</div><div class='add'>+		"SD_DAT2",</div><div class='add'>+		"SD_DAT3",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"USB3_HUB_RST_L",</div><div class='add'>+		"EC_AP_RSVD0_ODL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SPMI_SCL",</div><div class='add'>+		"SPMI_SDA";</div><div class='add'>+</div><div class='add'>+	adsp_uart_pins: adsp-uart-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO35__FUNC_O_ADSP_UTXD0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO36__FUNC_I1_ADSP_URXD0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_etdm_hp_on: aud-etdm-hp-on-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO110__FUNC_I0_I2SIN_D0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO115__FUNC_B0_I2SO2_BCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO116__FUNC_B0_I2SO2_WS&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO117__FUNC_O_I2SO2_D0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_etdm_hp_off: aud-etdm-hp-off-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO110__FUNC_B_GPIO110&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO115__FUNC_B_GPIO115&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO116__FUNC_B_GPIO116&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO117__FUNC_B_GPIO117&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_etdm_spk_on: aud-etdm-spk-on-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO11__FUNC_O_I2SO1_D0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO113__FUNC_B0_TDMIN_BCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO119__FUNC_B0_TDMIN_LRCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO120__FUNC_I0_TDMIN_DI&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_etdm_spk_off: aud-etdm-spk-off-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO11__FUNC_B_GPIO11&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO113__FUNC_B_GPIO113&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO119__FUNC_B_GPIO119&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO120__FUNC_B_GPIO120&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_mtkaif_on: aud-mtkaif-on-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aud_mtkaif_off: aud-mtkaif-off-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO101__FUNC_B_GPIO101&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO102__FUNC_B_GPIO102&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO103__FUNC_B_GPIO103&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO104__FUNC_B_GPIO104&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO105__FUNC_B_GPIO105&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO106__FUNC_B_GPIO106&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cros_ec_int: cros-ec-int-pins {</div><div class='add'>+		pins-ec-ap-int-odl {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO149__FUNC_B_GPIO149&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	disp_pwm0_pins: disp-pwm0-pins {</div><div class='add'>+		pins-disp-pwm0 {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO29__FUNC_O_DISP_PWM0&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	disp_pwm1_pins: disp-pwm1-pins {</div><div class='add'>+		pins-disp-pwm1 {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO30__FUNC_O_DISP_PWM1&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp_tx_hpd: dp-tx-hpd-pins {</div><div class='add'>+		pins-dp-tx-hpd {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO46__FUNC_I0_DP_TX_HPD&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gsc_int: gsc-int-pins {</div><div class='add'>+		pins-gsc-ap-int-odl {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO0__FUNC_B_GPIO0&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO56__FUNC_B1_SDA0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO55__FUNC_B1_SCL0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO58__FUNC_B1_SDA1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO57__FUNC_B1_SCL1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO60__FUNC_B1_SDA2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO59__FUNC_B1_SCL2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO62__FUNC_B1_SDA3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO61__FUNC_B1_SCL3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO64__FUNC_B1_SDA4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO63__FUNC_B1_SCL4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5_pins: i2c5-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO66__FUNC_B1_SDA5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO65__FUNC_B1_SCL5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6_pins: i2c6-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO68__FUNC_B1_SDA6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO67__FUNC_B1_SCL6&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi_disp_avdd_en: mipi-disp-avdd-en-pins {</div><div class='add'>+		pins-en-ppvar-mipi-disp {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO3__FUNC_B_GPIO3&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi_disp_avee_en: mipi-disp-avee-en-pins {</div><div class='add'>+		pins-en-ppvar-mipi-disp-150ma {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO4__FUNC_B_GPIO4&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi_dsi_pins: mipi-dsi-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO1__FUNC_B_GPIO1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO25__FUNC_B_GPIO25&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_pins_default: mmc0-default-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_pins_uhs: mmc0-uhs-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-ds {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO162__FUNC_B0_MSDC0_DSL&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nor_pins: nor-default-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO127__FUNC_B0_SPINOR_IO0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO125__FUNC_O_SPINOR_CK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO128__FUNC_B0_SPINOR_IO1&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cs {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO126__FUNC_O_SPINOR_CS&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_pins: pcie-default-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO47__FUNC_I1_WAKEN&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO48__FUNC_O_PERSTN&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO49__FUNC_B1_CLKREQN&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scp_pins: scp-pins {</div><div class='add'>+		pins-scp-vreq {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO98__FUNC_O_SCP_VREQ_VAO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_pins: spi0-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO69__FUNC_O_SPIM0_CSB&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO70__FUNC_O_SPIM0_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO72__FUNC_B0_SPIM0_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_pins_default: spi1-default-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO75__FUNC_O_SPIM1_CSB&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO76__FUNC_O_SPIM1_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO78__FUNC_B0_SPIM1_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_pins_sleep: spi1-sleep-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO75__FUNC_B_GPIO75&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO76__FUNC_B_GPIO76&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO77__FUNC_B_GPIO77&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO78__FUNC_B_GPIO78&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_pins: spi2-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO79__FUNC_O_SPIM2_CSB&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO80__FUNC_O_SPIM2_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO82__FUNC_B0_SPIM2_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-pins {</div><div class='add'>+		pins-bus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO31__FUNC_O_UTXD0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO32__FUNC_I1_URXD0&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-pins {</div><div class='add'>+		pins-en-pp3300-wlan {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO12__FUNC_B_GPIO12&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmic {</div><div class='add'>+	interrupts-extended = &lt;&amp;pio 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;postmask0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;postmask0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scp_cluster {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scp_c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;scp_pins&gt;;</div><div class='add'>+	firmware-name = "mediatek/mt8188/scp.img";</div><div class='add'>+	memory-region = &lt;&amp;scp_mem_reserved&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	pinctrl-names = "aud_etdm_hp_on", "aud_etdm_hp_off",</div><div class='add'>+			"aud_etdm_spk_on", "aud_etdm_spk_off",</div><div class='add'>+			"aud_mtkaif_on", "aud_mtkaif_off";</div><div class='add'>+	pinctrl-0 = &lt;&amp;aud_etdm_hp_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;aud_etdm_hp_off&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;aud_etdm_spk_on&gt;;</div><div class='add'>+	pinctrl-3 = &lt;&amp;aud_etdm_spk_off&gt;;</div><div class='add'>+	pinctrl-4 = &lt;&amp;aud_mtkaif_on&gt;;</div><div class='add'>+	pinctrl-5 = &lt;&amp;aud_mtkaif_off&gt;;</div><div class='add'>+	mediatek,adsp = &lt;&amp;adsp&gt;;</div><div class='add'>+	/* The audio-routing is defined in each board dts */</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cros_ec: ec@0 {</div><div class='add'>+		compatible = "google,cros-ec-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 149 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cros_ec_int&gt;;</div><div class='add'>+		spi-max-frequency = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		i2c_tunnel: i2c-tunnel {</div><div class='add'>+			compatible = "google,cros-ec-i2c-tunnel";</div><div class='add'>+			google,remote-bus = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cbas {</div><div class='add'>+			compatible = "google,cros-cbas";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_pins_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;spi1_pins_sleep&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB detachable base */</div><div class='add'>+&amp;ssusb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vusb33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci0 {</div><div class='add'>+	/* controlled by EC */</div><div class='add'>+	vbus-supply = &lt;&amp;pp3300_z1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB3 hub */</div><div class='add'>+&amp;ssusb1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vusb33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci1 {</div><div class='add'>+	vusb33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;pp5000_usb_vbus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB BT */</div><div class='add'>+&amp;ssusb2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	vusb33-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vdosys0 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys0_ep_main: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vdosys1 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys1_ep_ext: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ethdr0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci2 {</div><div class='add'>+	/* no power supply since MT7921's power is controlled by PCIe */</div><div class='add'>+	/* MT7921's USB BT has issues with USB2 LPM */</div><div class='add'>+	usb2-lpm-disable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include &lt;arm/cros-ec-keyboard.dtsi&gt;</div><div class='add'>+</div><div class='add'>+&amp;keyboard_controller {</div><div class='add'>+	function-row-physmap = &lt;</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */</div><div class='add'>+	&gt;;</div><div class='add'>+</div><div class='add'>+	linux,keymap = &lt;</div><div class='add'>+		MATRIX_KEY(0x00, 0x02, KEY_BACK)</div><div class='add'>+		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)</div><div class='add'>+		MATRIX_KEY(0x02, 0x02, KEY_ZOOM)</div><div class='add'>+		MATRIX_KEY(0x01, 0x02, KEY_SCALE)</div><div class='add'>+		MATRIX_KEY(0x03, 0x04, KEY_BRIGHTNESSDOWN)</div><div class='add'>+		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSUP)</div><div class='add'>+		MATRIX_KEY(0x01, 0x04, KEY_MICMUTE)</div><div class='add'>+		MATRIX_KEY(0x02, 0x09, KEY_MUTE)</div><div class='add'>+		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)</div><div class='add'>+		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)</div><div class='add'>+		CROS_STD_MAIN_KEYMAP</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi<br/>index cd27966d2e3c..90c388f1890f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8188.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8188.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8188.dtsi</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mailbox/mediatek,mt8188-gce.h&gt;</div><div class='add'>+#include &lt;dt-bindings/memory/mediatek,mt8188-memory-port.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/mediatek,mt8188-power.h&gt;</div><div class='hunk'>@@ -22,6 +23,39 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		dp-intf0 = &amp;dp_intf0;</div><div class='add'>+		dp-intf1 = &amp;dp_intf1;</div><div class='add'>+		dsc0 = &amp;dsc0;</div><div class='add'>+		ethdr0 = &amp;ethdr0;</div><div class='add'>+		gce0 = &amp;gce0;</div><div class='add'>+		gce1 = &amp;gce1;</div><div class='add'>+		merge0 = &amp;merge0;</div><div class='add'>+		merge1 = &amp;merge1;</div><div class='add'>+		merge2 = &amp;merge2;</div><div class='add'>+		merge3 = &amp;merge3;</div><div class='add'>+		merge4 = &amp;merge4;</div><div class='add'>+		merge5 = &amp;merge5;</div><div class='add'>+		mutex0 = &amp;mutex0;</div><div class='add'>+		mutex1 = &amp;mutex1;</div><div class='add'>+		padding0 = &amp;padding0;</div><div class='add'>+		padding1 = &amp;padding1;</div><div class='add'>+		padding2 = &amp;padding2;</div><div class='add'>+		padding3 = &amp;padding3;</div><div class='add'>+		padding4 = &amp;padding4;</div><div class='add'>+		padding5 = &amp;padding5;</div><div class='add'>+		padding6 = &amp;padding6;</div><div class='add'>+		padding7 = &amp;padding7;</div><div class='add'>+		vdo1-rdma0 = &amp;vdo1_rdma0;</div><div class='add'>+		vdo1-rdma1 = &amp;vdo1_rdma1;</div><div class='add'>+		vdo1-rdma2 = &amp;vdo1_rdma2;</div><div class='add'>+		vdo1-rdma3 = &amp;vdo1_rdma3;</div><div class='add'>+		vdo1-rdma4 = &amp;vdo1_rdma4;</div><div class='add'>+		vdo1-rdma5 = &amp;vdo1_rdma5;</div><div class='add'>+		vdo1-rdma6 = &amp;vdo1_rdma6;</div><div class='add'>+		vdo1-rdma7 = &amp;vdo1_rdma7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -41,6 +75,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +94,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +113,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +132,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -113,6 +151,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +170,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -149,6 +189,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -167,6 +208,7 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;256&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			performance-domains = &lt;&amp;performance 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -420,6 +462,11 @@</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound: sound {</div><div class='add'>+		mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	thermal_zones: thermal-zones {</div><div class='ctx'> 		cpu-little0-thermal {</div><div class='ctx'> 			polling-delay = &lt;1000&gt;;</div><div class='hunk'>@@ -447,7 +494,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				map0 {</div><div class='add'>+				cpu_little0_cooling_map0: map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_little0_alert0&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -485,7 +532,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				map0 {</div><div class='add'>+				cpu_little1_cooling_map0: map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_little1_alert0&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -523,7 +570,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				map0 {</div><div class='add'>+				cpu_little2_cooling_map0: map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_little2_alert0&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -561,7 +608,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='del'>-				map0 {</div><div class='add'>+				cpu_little3_cooling_map0: map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_little3_alert0&gt;;</div><div class='ctx'> 					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='ctx'> 							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='hunk'>@@ -878,8 +925,15 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='add'>+		dma-ranges = &lt;0x0 0x0 0x0 0x0 0x4 0x0&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		performance: performance-controller@11bc10 {</div><div class='add'>+			compatible = "mediatek,cpufreq-hw";</div><div class='add'>+			reg = &lt;0 0x0011bc10 0 0x120&gt;, &lt;0 0x0011bd30 0 0x120&gt;;</div><div class='add'>+			#performance-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@c000000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='hunk'>@@ -956,9 +1010,9 @@</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-					power-domain@MT8188_POWER_DOMAIN_MFG1 {</div><div class='add'>+					mfg1: power-domain@MT8188_POWER_DOMAIN_MFG1 {</div><div class='ctx'> 						reg = &lt;MT8188_POWER_DOMAIN_MFG1&gt;;</div><div class='del'>-						clocks = &lt;&amp;topckgen CLK_APMIXED_MFGPLL&gt;,</div><div class='add'>+						clocks = &lt;&amp;apmixedsys CLK_APMIXED_MFGPLL&gt;,</div><div class='ctx'> 							 &lt;&amp;topckgen CLK_TOP_MFG_CORE_TMP&gt;;</div><div class='ctx'> 						clock-names = "mfg", "alt";</div><div class='ctx'> 						mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='hunk'>@@ -1061,20 +1115,22 @@</div><div class='ctx'> 							#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> </div><div class='del'>-						power-domain@MT8188_POWER_DOMAIN_VDEC1 {</div><div class='del'>-							reg = &lt;MT8188_POWER_DOMAIN_VDEC1&gt;;</div><div class='del'>-							clocks = &lt;&amp;vdecsys CLK_VDEC2_LARB1&gt;;</div><div class='del'>-							clock-names = "ss-vdec";</div><div class='del'>-							mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='del'>-							#power-domain-cells = &lt;0&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='ctx'> 						power-domain@MT8188_POWER_DOMAIN_VDEC0 {</div><div class='ctx'> 							reg = &lt;MT8188_POWER_DOMAIN_VDEC0&gt;;</div><div class='ctx'> 							clocks = &lt;&amp;vdecsys_soc CLK_VDEC1_SOC_LARB1&gt;;</div><div class='del'>-							clock-names = "ss-vdec";</div><div class='add'>+							clock-names = "ss-vdec1-soc-l1";</div><div class='ctx'> 							mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='del'>-							#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+							power-domain@MT8188_POWER_DOMAIN_VDEC1 {</div><div class='add'>+								reg = &lt;MT8188_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+								clocks = &lt;&amp;vdecsys CLK_VDEC2_LARB1&gt;;</div><div class='add'>+								clock-names = "ss-vdec2-l1";</div><div class='add'>+								mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+								#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							};</div><div class='ctx'> 						};</div><div class='ctx'> </div><div class='ctx'> 						cam_vcore: power-domain@MT8188_POWER_DOMAIN_CAM_VCORE {</div><div class='hunk'>@@ -1291,6 +1347,25 @@</div><div class='ctx'> 			clock-names = "spi", "wrap";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spmi: spmi@10027000 {</div><div class='add'>+			compatible = "mediatek,mt8188-spmi", "mediatek,mt8195-spmi";</div><div class='add'>+			reg = &lt;0 0x10027000 0 0xe00&gt;, &lt;0 0x10029000 0 0x100&gt;;</div><div class='add'>+			reg-names = "pmif", "spmimst";</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SPMI_M_MST&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_ULPOSC1_D10&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg_ao CLK_INFRA_AO_PMIC_AP&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PMIC_TMR&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SPMI_M_MST&gt;;</div><div class='add'>+			clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		infra_iommu: iommu@10315000 {</div><div class='add'>+			compatible = "mediatek,mt8188-iommu-infra";</div><div class='add'>+			reg = &lt;0 0x10315000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gce0: mailbox@10320000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-gce";</div><div class='ctx'> 			reg = &lt;0 0x10320000 0 0x4000&gt;;</div><div class='hunk'>@@ -1307,12 +1382,121 @@</div><div class='ctx'> 			clocks = &lt;&amp;infracfg_ao CLK_INFRA_AO_GCE2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		scp: scp@10500000 {</div><div class='del'>-			compatible = "mediatek,mt8188-scp";</div><div class='del'>-			reg = &lt;0 0x10500000 0 0x100000&gt;,</div><div class='del'>-			      &lt;0 0x10720000 0 0xe0000&gt;;</div><div class='del'>-			reg-names = "sram", "cfg";</div><div class='del'>-			interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		scp_cluster: scp@10720000 {</div><div class='add'>+			compatible = "mediatek,mt8188-scp-dual";</div><div class='add'>+			reg = &lt;0 0x10720000 0 0xe0000&gt;;</div><div class='add'>+			reg-names = "cfg";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x10500000 0x100000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			scp_c0: scp@0 {</div><div class='add'>+				compatible = "mediatek,scp-core";</div><div class='add'>+				reg = &lt;0x0 0xd0000&gt;;</div><div class='add'>+				reg-names = "sram";</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scp_c1: scp@d0000 {</div><div class='add'>+				compatible = "mediatek,scp-core";</div><div class='add'>+				reg = &lt;0xd0000 0x2f000&gt;;</div><div class='add'>+				reg-names = "sram";</div><div class='add'>+				interrupts = &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		afe: audio-controller@10b10000 {</div><div class='add'>+			compatible = "mediatek,mt8188-afe";</div><div class='add'>+			reg = &lt;0 0x10b10000 0 0x10000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_A1SYS_HP&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_APLL1_D4&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk26m&gt;,</div><div class='add'>+				 &lt;&amp;apmixedsys CLK_APMIXED_APLL1&gt;,</div><div class='add'>+				 &lt;&amp;apmixedsys CLK_APMIXED_APLL2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV0&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV1&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV3&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV9&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_A1SYS_HP&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_AUD_INTBUS&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_AUDIO_H&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_AUDIO_LOCAL_BUS&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_DPTX&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_I2SO1&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_I2SO2&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_I2SI1&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_I2SI2&gt;,</div><div class='add'>+				 &lt;&amp;adsp_audio26m CLK_AUDIODSP_AUDIO26M&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL1_D4&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL2_D4&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_APLL12_CK_DIV4&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_A2SYS&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_AUD_IEC&gt;;</div><div class='add'>+			clock-names = "clk26m",</div><div class='add'>+				      "apll1",</div><div class='add'>+				      "apll2",</div><div class='add'>+				      "apll12_div0",</div><div class='add'>+				      "apll12_div1",</div><div class='add'>+				      "apll12_div2",</div><div class='add'>+				      "apll12_div3",</div><div class='add'>+				      "apll12_div9",</div><div class='add'>+				      "top_a1sys_hp",</div><div class='add'>+				      "top_aud_intbus",</div><div class='add'>+				      "top_audio_h",</div><div class='add'>+				      "top_audio_local_bus",</div><div class='add'>+				      "top_dptx",</div><div class='add'>+				      "top_i2so1",</div><div class='add'>+				      "top_i2so2",</div><div class='add'>+				      "top_i2si1",</div><div class='add'>+				      "top_i2si2",</div><div class='add'>+				      "adsp_audio_26m",</div><div class='add'>+				      "apll1_d4",</div><div class='add'>+				      "apll2_d4",</div><div class='add'>+				      "apll12_div4",</div><div class='add'>+				      "top_a2sys",</div><div class='add'>+				      "top_aud_iec";</div><div class='add'>+			interrupts = &lt;GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;watchdog MT8188_TOPRGU_AUDIO_SW_RST&gt;;</div><div class='add'>+			reset-names = "audiosys";</div><div class='add'>+			mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+			mediatek,topckgen = &lt;&amp;topckgen&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp: adsp@10b80000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dsp";</div><div class='add'>+			reg = &lt;0 0x10b80000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x10d00000 0 0x80000&gt;,</div><div class='add'>+			      &lt;0 0x10b8b000 0 0x100&gt;,</div><div class='add'>+			      &lt;0 0x10b8f000 0 0x1000&gt;;</div><div class='add'>+			reg-names = "cfg", "sram", "sec", "bus";</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_ADSP&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_ADSP&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_AUDIO_LOCAL_BUS&gt;;</div><div class='add'>+			clock-names = "audiodsp", "adsp_bus";</div><div class='add'>+			mboxes = &lt;&amp;adsp_mailbox0&gt;, &lt;&amp;adsp_mailbox1&gt;;</div><div class='add'>+			mbox-names = "rx", "tx";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_ADSP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mailbox0: mailbox@10b86100 {</div><div class='add'>+			compatible = "mediatek,mt8188-adsp-mbox", "mediatek,mt8186-adsp-mbox";</div><div class='add'>+			reg = &lt;0 0x10b86100 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mailbox1: mailbox@10b87100 {</div><div class='add'>+			compatible = "mediatek,mt8188-adsp-mbox", "mediatek,mt8186-adsp-mbox";</div><div class='add'>+			reg = &lt;0 0x10b87100 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#mbox-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		adsp_audio26m: clock-controller@10b91100 {</div><div class='hunk'>@@ -1396,6 +1580,28 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		disp_pwm0: pwm@1100e000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-pwm", "mediatek,mt8183-disp-pwm";</div><div class='add'>+			reg = &lt;0 0x1100e000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_DISP_PWM0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_DISP_PWM&gt;;</div><div class='add'>+			clock-names = "main", "mm";</div><div class='add'>+			interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#pwm-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		disp_pwm1: pwm@1100f000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-pwm", "mediatek,mt8183-disp-pwm";</div><div class='add'>+			reg = &lt;0 0x1100f000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_DISP_PWM1&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_DISP_PWM1&gt;;</div><div class='add'>+			clock-names = "main", "mm";</div><div class='add'>+			interrupts = &lt;GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#pwm-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		spi1: spi@11010000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-spi-ipm", "mediatek,spi-ipm";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1461,25 +1667,133 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		xhci1: usb@11200000 {</div><div class='del'>-			compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='del'>-			reg = &lt;0 0x11200000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x11203e00 0 0x0100&gt;;</div><div class='add'>+		ssusb1: usb@11201000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3";</div><div class='add'>+			reg = &lt;0 0x11201000 0 0x2dff&gt;, &lt;0 0x11203e00 0 0x0100&gt;;</div><div class='ctx'> 			reg-names = "mac", "ippc";</div><div class='del'>-			interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-			phys = &lt;&amp;u2port1 PHY_TYPE_USB2&gt;,</div><div class='del'>-			       &lt;&amp;u3port1 PHY_TYPE_USB3&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;topckgen CLK_TOP_USB_TOP&gt;,</div><div class='del'>-					  &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;,</div><div class='del'>-						 &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x11200000 0 0x3f00&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_USB_TOP&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_BUS&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_SSUSB_TOP_REF&gt;,</div><div class='ctx'> 				 &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_XHCI&gt;;</div><div class='ctx'> 			clock-names = "sys_ck", "ref_ck", "mcu_ck";</div><div class='del'>-			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x468 2&gt;;</div><div class='add'>+			phys = &lt;&amp;u2port1 PHY_TYPE_USB2&gt;, &lt;&amp;u3port1 PHY_TYPE_USB3&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='add'>+			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x468 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			xhci1: usb@0 {</div><div class='add'>+				compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='add'>+				reg = &lt;0 0 0 0x1000&gt;;</div><div class='add'>+				reg-names = "mac";</div><div class='add'>+				interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+				clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_XHCI&gt;;</div><div class='add'>+				clock-names = "sys_ck";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth: ethernet@11021000 {</div><div class='add'>+			compatible = "mediatek,mt8188-gmac", "mediatek,mt8195-gmac",</div><div class='add'>+				     "snps,dwmac-5.10a";</div><div class='add'>+			reg = &lt;0 0x11021000 0 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_ETHERNET&gt;,</div><div class='add'>+				 &lt;&amp;pericfg_ao CLK_PERI_AO_ETHERNET_BUS&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SNPS_ETH_250M&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SNPS_ETH_62P4M_PTP&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_SNPS_ETH_50M_RMII&gt;,</div><div class='add'>+				 &lt;&amp;pericfg_ao CLK_PERI_AO_ETHERNET_MAC&gt;;</div><div class='add'>+			clock-names = "axi", "apb", "mac_main", "ptp_ref",</div><div class='add'>+				      "rmii_internal", "mac_cg";</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SNPS_ETH_250M&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_SNPS_ETH_62P4M_PTP&gt;,</div><div class='add'>+					  &lt;&amp;topckgen CLK_TOP_SNPS_ETH_50M_RMII&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_ETHPLL_D2&gt;,</div><div class='add'>+						 &lt;&amp;topckgen CLK_TOP_ETHPLL_D8&gt;,</div><div class='add'>+						 &lt;&amp;topckgen CLK_TOP_ETHPLL_D10&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_ETHER&gt;;</div><div class='add'>+			mediatek,pericfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+			snps,txpbl = &lt;16&gt;;</div><div class='add'>+			snps,rxpbl = &lt;16&gt;;</div><div class='add'>+			snps,clk-csr = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			eth_mdio: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,tx-sched-wrr;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x0&gt;;</div><div class='add'>+					snps,weight = &lt;0x10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,weight = &lt;0x11&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,weight = &lt;0x12&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x3&gt;;</div><div class='add'>+					snps,weight = &lt;0x13&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc0: mmc@11230000 {</div><div class='hunk'>@@ -1509,6 +1823,20 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mmc2: mmc@11250000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mmc", "mediatek,mt8183-mmc";</div><div class='add'>+			reg = &lt;0 0x11250000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x11e60000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_MSDC30_2&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_MSDC2&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_MSDC30_2&gt;;</div><div class='add'>+			clock-names = "source", "hclk", "source_cg";</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_MSDC30_2&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_MSDCPLL_D2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lvts_mcu: thermal-sensor@11278000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-lvts-mcu";</div><div class='ctx'> 			reg = &lt;0 0x11278000 0 0x1000&gt;;</div><div class='hunk'>@@ -1568,42 +1896,116 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		xhci2: usb@112a0000 {</div><div class='del'>-			compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='del'>-			reg = &lt;0 0x112a0000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x112a3e00 0 0x0100&gt;;</div><div class='add'>+		ssusb2: usb@112a1000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3";</div><div class='add'>+			reg = &lt;0 0x112a1000 0 0x2dff&gt;, &lt;0 0x112a3e00 0 0x0100&gt;;</div><div class='ctx'> 			reg-names = "mac", "ippc";</div><div class='del'>-			interrupts = &lt;GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-			phys = &lt;&amp;u2port2 PHY_TYPE_USB2&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI_3P&gt;,</div><div class='del'>-					  &lt;&amp;topckgen CLK_TOP_USB_TOP_3P&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;,</div><div class='del'>-						 &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x112a0000 0 0x3f00&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_USB_TOP_3P&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_3P_BUS&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_SSUSB_TOP_P3_REF&gt;,</div><div class='ctx'> 				 &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI&gt;;</div><div class='ctx'> 			clock-names = "sys_ck", "ref_ck", "mcu_ck";</div><div class='add'>+			phys = &lt;&amp;u2port2 PHY_TYPE_USB2&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x470 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			xhci2: usb@0 {</div><div class='add'>+				compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='add'>+				reg = &lt;0 0 0 0x1000&gt;;</div><div class='add'>+				reg-names = "mac";</div><div class='add'>+				interrupts = &lt;GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI_3P&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+				clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI&gt;;</div><div class='add'>+				clock-names = "sys_ck";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		xhci0: usb@112b0000 {</div><div class='del'>-			compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='del'>-			reg = &lt;0 0x112b0000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x112b3e00 0 0x0100&gt;;</div><div class='add'>+		ssusb0: usb@112b1000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3";</div><div class='add'>+			reg = &lt;0 0x112b1000 0 0x2dff&gt;, &lt;0 0x112b3e00 0 0x0100&gt;;</div><div class='ctx'> 			reg-names = "mac", "ippc";</div><div class='del'>-			interrupts = &lt;GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-			phys = &lt;&amp;u2port0 PHY_TYPE_USB2&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI_2P&gt;,</div><div class='del'>-					  &lt;&amp;topckgen CLK_TOP_USB_TOP_2P&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;,</div><div class='del'>-						 &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x112b0000 0 0x3f00&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SSUSB_XHCI_2P&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_2P_BUS&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_SSUSB_TOP_P2_REF&gt;,</div><div class='ctx'> 				 &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI&gt;;</div><div class='ctx'> 			clock-names = "sys_ck", "ref_ck", "mcu_ck";</div><div class='del'>-			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x460 2&gt;;</div><div class='add'>+			phys = &lt;&amp;u2port0 PHY_TYPE_USB2&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='add'>+			mediatek,syscon-wakeup = &lt;&amp;pericfg 0x460 2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			xhci0: usb@0 {</div><div class='add'>+				compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";</div><div class='add'>+				reg = &lt;0 0 0 0x1000&gt;;</div><div class='add'>+				reg-names = "mac";</div><div class='add'>+				interrupts = &lt;GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;topckgen CLK_TOP_USB_TOP_2P&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D5_D4&gt;;</div><div class='add'>+				clocks = &lt;&amp;pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI&gt;;</div><div class='add'>+				clock-names = "sys_ck";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie: pcie@112f0000 {</div><div class='add'>+			compatible = "mediatek,mt8188-pcie", "mediatek,mt8192-pcie";</div><div class='add'>+			reg = &lt;0 0x112f0000 0 0x2000&gt;;</div><div class='add'>+			reg-names = "pcie-mac";</div><div class='add'>+			ranges = &lt;0x82000000 0 0x20000000 0 0x20000000 0 0x4000000&gt;;</div><div class='add'>+			bus-range = &lt;0 0xff&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;infracfg_ao CLK_INFRA_AO_PCIE_PL_P_250M_P0&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PCIE_TL_26M&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PCIE_TL_96M&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PCIE_TL_32K&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PCIE_PERI_26M&gt;,</div><div class='add'>+				 &lt;&amp;pericfg_ao CLK_PERI_AO_PCIE_P0_FMEM&gt;;</div><div class='add'>+			clock-names = "pl_250m", "tl_26m", "tl_96m", "tl_32k",</div><div class='add'>+				      "peri_26m", "peri_mem";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc 3&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0 &amp;infra_iommu IFR_IOMMU_PORT_PCIE_0 0xffff&gt;;</div><div class='add'>+			iommu-map-mask = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcieport PHY_TYPE_PCIE&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_PEXTP_MAC_P0&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;watchdog MT8188_TOPRGU_PCIE_SW_RST&gt;;</div><div class='add'>+			reset-names = "mac";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nor_flash: spi@1132c000 {</div><div class='hunk'>@@ -1615,6 +2017,44 @@</div><div class='ctx'> 			clock-names = "spi", "sf", "axi";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;topckgen CLK_TOP_SPINOR&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pciephy: t-phy@11c20700 {</div><div class='add'>+			compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3";</div><div class='add'>+			ranges = &lt;0 0 0x11c20700 0x700&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_PEXTP_PHY_TOP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcieport: pcie-phy@0 {</div><div class='add'>+				reg = &lt;0 0x700&gt;;</div><div class='add'>+				clocks = &lt;&amp;topckgen CLK_TOP_CFGREG_F_PCIE_PHY_REF&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mipi_tx_config0: dsi-phy@11c80000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mipi-tx", "mediatek,mt8183-mipi-tx";</div><div class='add'>+			reg = &lt;0 0x11c80000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+			clock-output-names = "mipi_tx0_pll";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mipi_tx_config1: dsi-phy@11c90000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mipi-tx", "mediatek,mt8183-mipi-tx";</div><div class='add'>+			reg = &lt;0 0x11c90000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+			clock-output-names = "mipi_tx0_pll";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1689,7 +2129,6 @@</div><div class='ctx'> 					 &lt;&amp;clk26m&gt;;</div><div class='ctx'> 				clock-names = "ref", "da_ref";</div><div class='ctx'> 				#phy-cells = &lt;1&gt;;</div><div class='del'>-				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1744,14 +2183,31 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		efuse: efuse@11f20000 {</div><div class='del'>-			compatible = "mediatek,mt8188-efuse", "mediatek,efuse";</div><div class='add'>+			compatible = "mediatek,mt8188-efuse", "mediatek,mt8186-efuse";</div><div class='ctx'> 			reg = &lt;0 0x11f20000 0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			dp_calib_data: dp-calib@1a0 {</div><div class='add'>+				reg = &lt;0x1a0 0xc&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			lvts_efuse_data1: lvts1-calib@1ac {</div><div class='ctx'> 				reg = &lt;0x1ac 0x40&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			gpu_speedbin: gpu-speedbin@581 {</div><div class='add'>+				reg = &lt;0x581 0x1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			socinfo-data1@7a0 {</div><div class='add'>+				reg = &lt;0x7a0 0x4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			socinfo-data2@7e0 {</div><div class='add'>+				reg = &lt;0x7e0 0x4&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpu: gpu@13000000 {</div><div class='hunk'>@@ -1763,6 +2219,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			nvmem-cells = &lt;&amp;gpu_speedbin&gt;;</div><div class='add'>+			nvmem-cell-names = "speed-bin";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_MFG2&gt;,</div><div class='ctx'> 					&lt;&amp;spm MT8188_POWER_DOMAIN_MFG3&gt;,</div><div class='hunk'>@@ -1778,12 +2236,333 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		vppsys0: clock-controller@14000000 {</div><div class='del'>-			compatible = "mediatek,mt8188-vppsys0";</div><div class='add'>+		vppsys0: syscon@14000000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vppsys0", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x14000000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dma-controller@14001000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rdma";</div><div class='add'>+			reg = &lt;0 0x14001000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_RDMA&gt;;</div><div class='add'>+			mboxes = &lt;&amp;gce0 13 CMDQ_THR_PRIO_1&gt;,</div><div class='add'>+				 &lt;&amp;gce0 14 CMDQ_THR_PRIO_1&gt;,</div><div class='add'>+				 &lt;&amp;gce0 16 CMDQ_THR_PRIO_1&gt;,</div><div class='add'>+				 &lt;&amp;gce0 21 CMDQ_THR_PRIO_1&gt;,</div><div class='add'>+				 &lt;&amp;gce0 22 CMDQ_THR_PRIO_1&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L4_MDP_RDMA&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x1000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP0_MDP_RDMA_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP0_MDP_RDMA_FRAME_DONE&gt;;</div><div class='add'>+			mediatek,scp = &lt;&amp;scp_c0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14002000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-fg", "mediatek,mt8195-mdp3-fg";</div><div class='add'>+			reg = &lt;0 0x14002000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_FG&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x2000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14004000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-hdr", "mediatek,mt8195-mdp3-hdr";</div><div class='add'>+			reg = &lt;0 0x14004000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_HDR&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x4000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14005000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-aal", "mediatek,mt8195-mdp3-aal";</div><div class='add'>+			reg = &lt;0 0x14005000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_AAL&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x5000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14006000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rsz", "mediatek,mt8183-mdp3-rsz";</div><div class='add'>+			reg = &lt;0 0x14006000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_RSZ&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x6000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP0_MDP_RSZ_IN_RSZ_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP0_MDP_RSZ_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14007000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-tdshp", "mediatek,mt8195-mdp3-tdshp";</div><div class='add'>+			reg = &lt;0 0x14007000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_TDSHP&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x7000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14008000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-color", "mediatek,mt8195-mdp3-color";</div><div class='add'>+			reg = &lt;0 0x14008000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_COLOR&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x8000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14009000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-ovl", "mediatek,mt8195-mdp3-ovl";</div><div class='add'>+			reg = &lt;0 0x14009000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_OVL&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0x9000 0x1000&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L4_MDP_OVL&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@1400a000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-padding", "mediatek,mt8195-mdp3-padding";</div><div class='add'>+			reg = &lt;0 0x1400a000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_PADDING&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0xa000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@1400b000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-tcc", "mediatek,mt8195-mdp3-tcc";</div><div class='add'>+			reg = &lt;0 0x1400b000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_TCC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0xb000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@1400c000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-wrot", "mediatek,mt8183-mdp3-wrot";</div><div class='add'>+			reg = &lt;0 0x1400c000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MDP_WROT&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L4_MDP_WROT&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0xc000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP0_MDP_WROT_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP0_MDP_WROT_VIDO_WDONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mutex@1400f000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vpp-mutex";</div><div class='add'>+			reg = &lt;0 0x1400f000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_MUTEX&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_1400XXXX 0xf000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpp_smi_common: smi@14012000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-common-vpp";</div><div class='add'>+			reg = &lt;0 0x14012000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_SMI_COMMON_LARB4&gt;,</div><div class='add'>+				 &lt;&amp;vppsys0 CLK_VPP0_SMI_SUB_COMMON_REORDER&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb4: smi@14013000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x14013000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_SMI_COMMON_LARB4&gt;,</div><div class='add'>+				 &lt;&amp;vppsys0 CLK_VPP0_SMI_COMMON_LARB4&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L4_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpp_iommu: iommu@14018000 {</div><div class='add'>+			compatible = "mediatek,mt8188-iommu-vpp";</div><div class='add'>+			reg = &lt;0 0x14018000 0 0x5000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys0 CLK_VPP0_SMI_IOMMU&gt;;</div><div class='add'>+			clock-names = "bclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS0&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,larbs = &lt;&amp;larb1 &amp;larb3 &amp;larb4 &amp;larb6 &amp;larb7 &amp;larb23&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma-controller@14f09000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rdma";</div><div class='add'>+			reg = &lt;0 0x14f09000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_RDMA&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L5_SVPP2_MDP_RDMA&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0x9000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_RDMA_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_RDMA_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma-controller@14f0a000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rdma";</div><div class='add'>+			reg = &lt;0 0x14f0a000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_RDMA&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L6_SVPP3_MDP_RDMA&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0xa000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_RDMA_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_RDMA_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f0c000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-fg", "mediatek,mt8195-mdp3-fg";</div><div class='add'>+			reg = &lt;0 0x14f0c000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_FG&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0xc000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f0d000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-fg", "mediatek,mt8195-mdp3-fg";</div><div class='add'>+			reg = &lt;0 0x14f0d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_FG&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0xd000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f0f000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-hdr", "mediatek,mt8195-mdp3-hdr";</div><div class='add'>+			reg = &lt;0 0x14f0f000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_HDR&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0xf000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f10000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-hdr", "mediatek,mt8195-mdp3-hdr";</div><div class='add'>+			reg = &lt;0 0x14f10000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_HDR&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f12000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-aal", "mediatek,mt8195-mdp3-aal";</div><div class='add'>+			reg = &lt;0 0x14f12000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_AAL&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x2000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f13000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-aal", "mediatek,mt8195-mdp3-aal";</div><div class='add'>+			reg = &lt;0 0x14f13000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_AAL&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x3000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f15000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rsz", "mediatek,mt8183-mdp3-rsz";</div><div class='add'>+			reg = &lt;0 0x14f15000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_RSZ&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x5000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_RSZ_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_RSZ_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f16000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-rsz", "mediatek,mt8183-mdp3-rsz";</div><div class='add'>+			reg = &lt;0 0x14f16000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_RSZ&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x6000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_RSZ_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_RSZ_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f18000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-tdshp", "mediatek,mt8195-mdp3-tdshp";</div><div class='add'>+			reg = &lt;0 0x14f18000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_TDSHP&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x8000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f19000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-tdshp", "mediatek,mt8195-mdp3-tdshp";</div><div class='add'>+			reg = &lt;0 0x14f19000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_TDSHP&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0x9000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f1a000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-merge", "mediatek,mt8195-mdp3-merge";</div><div class='add'>+			reg = &lt;0 0x14f1a000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_VPP_MERGE&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0xa000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f1b000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-merge", "mediatek,mt8195-mdp3-merge";</div><div class='add'>+			reg = &lt;0 0x14f1b000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_VPP_MERGE&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0xb000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f1d000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-color", "mediatek,mt8195-mdp3-color";</div><div class='add'>+			reg = &lt;0 0x14f1d000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 629 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_COLOR&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0xd000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f1e000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-color", "mediatek,mt8195-mdp3-color";</div><div class='add'>+			reg = &lt;0 0x14f1e000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 630 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_COLOR&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f1XXXX 0xe000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f21000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-padding",</div><div class='add'>+				     "mediatek,mt8195-mdp3-padding";</div><div class='add'>+			reg = &lt;0 0x14f21000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_VPP_PAD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f2XXXX 0x1000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f22000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-padding",</div><div class='add'>+				     "mediatek,mt8195-mdp3-padding";</div><div class='add'>+			reg = &lt;0 0x14f22000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_VPP_PAD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f2XXXX 0x2000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f24000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-wrot", "mediatek,mt8183-mdp3-wrot";</div><div class='add'>+			reg = &lt;0 0x14f24000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP2_MDP_WROT&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L5_SVPP2_MDP_WROT&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f2XXXX 0x4000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_WROT_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP2_MDP_WROT_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display@14f25000 {</div><div class='add'>+			compatible = "mediatek,mt8188-mdp3-wrot", "mediatek,mt8183-mdp3-wrot";</div><div class='add'>+			reg = &lt;0 0x14f25000 0 0x1000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_SVPP3_MDP_WROT&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L6_SVPP3_MDP_WROT&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f2XXXX 0x5000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_WROT_SOF&gt;,</div><div class='add'>+					      &lt;CMDQ_EVENT_VPP1_SVPP3_MDP_WROT_FRAME_DONE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		wpesys: clock-controller@14e00000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-wpesys";</div><div class='ctx'> 			reg = &lt;0 0x14e00000 0 0x1000&gt;;</div><div class='hunk'>@@ -1796,12 +2575,54 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		vppsys1: clock-controller@14f00000 {</div><div class='del'>-			compatible = "mediatek,mt8188-vppsys1";</div><div class='add'>+		larb7: smi@14e04000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x14e04000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;wpesys CLK_WPE_TOP_SMI_LARB7&gt;,</div><div class='add'>+				 &lt;&amp;wpesys CLK_WPE_TOP_SMI_LARB7&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_WPE&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L7_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vppsys1: syscon@14f00000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vppsys1", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x14f00000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mutex@14f01000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vpp-mutex";</div><div class='add'>+			reg = &lt;0 0x14f01000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_DISP_MUTEX&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce1 SUBSYS_14f0XXXX 0x1000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb5: smi@14f02000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x14f02000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_GALS5&gt;,</div><div class='add'>+				 &lt;&amp;vppsys1 CLK_VPP1_LARB5&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L5_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vdo_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb6: smi@14f03000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x14f03000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vppsys1 CLK_VPP1_GALS6&gt;,</div><div class='add'>+				 &lt;&amp;vppsys1 CLK_VPP1_LARB6&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VPPSYS1&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L6_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		imgsys: clock-controller@15000000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys";</div><div class='ctx'> 			reg = &lt;0 0x15000000 0 0x1000&gt;;</div><div class='hunk'>@@ -1812,36 +2633,42 @@</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys1-dip-top";</div><div class='ctx'> 			reg = &lt;0 0x15110000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		imgsys1_dip_nr: clock-controller@15130000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys1-dip-nr";</div><div class='ctx'> 			reg = &lt;0 0x15130000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		imgsys_wpe1: clock-controller@15220000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys-wpe1";</div><div class='ctx'> 			reg = &lt;0 0x15220000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ipesys: clock-controller@15330000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-ipesys";</div><div class='ctx'> 			reg = &lt;0 0x15330000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		imgsys_wpe2: clock-controller@15520000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys-wpe2";</div><div class='ctx'> 			reg = &lt;0 0x15520000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		imgsys_wpe3: clock-controller@15620000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-imgsys-wpe3";</div><div class='ctx'> 			reg = &lt;0 0x15620000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		camsys: clock-controller@16000000 {</div><div class='hunk'>@@ -1854,24 +2681,28 @@</div><div class='ctx'> 			compatible = "mediatek,mt8188-camsys-rawa";</div><div class='ctx'> 			reg = &lt;0 0x1604f000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		camsys_yuva: clock-controller@1606f000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-camsys-yuva";</div><div class='ctx'> 			reg = &lt;0 0x1606f000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		camsys_rawb: clock-controller@1608f000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-camsys-rawb";</div><div class='ctx'> 			reg = &lt;0 0x1608f000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		camsys_yuvb: clock-controller@160af000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-camsys-yuvb";</div><div class='ctx'> 			reg = &lt;0 0x160af000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ccusys: clock-controller@17200000 {</div><div class='hunk'>@@ -1880,12 +2711,92 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		video_decoder: video-decoder@18000000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vcodec-dec";</div><div class='add'>+			reg = &lt;0 0x18000000 0 0x1000&gt;, &lt;0 0x18004000 0 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x18000000 0 0x26000&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_UFO_ENC_EXT&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			mediatek,scp = &lt;&amp;scp_c0&gt;;</div><div class='add'>+</div><div class='add'>+			video-codec@10000 {</div><div class='add'>+				compatible = "mediatek,mtk-vcodec-lat";</div><div class='add'>+				reg = &lt;0 0x10000 0 0x800&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;topckgen CLK_TOP_VDEC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D6&gt;;</div><div class='add'>+				clocks = &lt;&amp;topckgen CLK_TOP_VDEC&gt;,</div><div class='add'>+					 &lt;&amp;vdecsys_soc CLK_VDEC1_SOC_VDEC&gt;,</div><div class='add'>+					 &lt;&amp;vdecsys_soc CLK_VDEC1_SOC_LAT&gt;,</div><div class='add'>+					 &lt;&amp;topckgen CLK_TOP_UNIVPLL_D6&gt;;</div><div class='add'>+				clock-names = "sel", "vdec", "lat", "top";</div><div class='add'>+				interrupts = &lt;GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				iommus = &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_VLD_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_VLD2_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_AVC_MV_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_PRED_RD_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_TILE_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_LAT0_WDMA_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_UFO_ENC_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_UFO_ENC_EXT_C&gt;,</div><div class='add'>+					 &lt;&amp;vpp_iommu M4U_PORT_L23_HW_VDEC_MC_EXT_C&gt;;</div><div class='add'>+				power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDEC0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			video-codec@25000 {</div><div class='add'>+				compatible = "mediatek,mtk-vcodec-core";</div><div class='add'>+				reg = &lt;0 0x25000 0 0x1000&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;topckgen CLK_TOP_VDEC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D6&gt;;</div><div class='add'>+				clocks = &lt;&amp;topckgen CLK_TOP_VDEC&gt;,</div><div class='add'>+					 &lt;&amp;vdecsys CLK_VDEC2_VDEC&gt;,</div><div class='add'>+					 &lt;&amp;vdecsys CLK_VDEC2_LAT&gt;,</div><div class='add'>+					 &lt;&amp;topckgen CLK_TOP_UNIVPLL_D6&gt;;</div><div class='add'>+				clock-names = "sel", "vdec", "lat", "top";</div><div class='add'>+				interrupts = &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				iommus = &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_MC_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_UFO_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_PP_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_PRED_RD_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_PRED_WR_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_PPWRAP_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_TILE_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_VLD_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_VLD2_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_AVC_MV_EXT&gt;,</div><div class='add'>+					 &lt;&amp;vdo_iommu M4U_PORT_L21_HW_VDEC_UFO_EXT_C&gt;;</div><div class='add'>+				power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb23: smi@1800d000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1800d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdecsys_soc CLK_VDEC1_SOC_LARB1&gt;,</div><div class='add'>+				 &lt;&amp;vdecsys_soc CLK_VDEC1_SOC_LARB1&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDEC0&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L23_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vdecsys_soc: clock-controller@1800f000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-vdecsys-soc";</div><div class='ctx'> 			reg = &lt;0 0x1800f000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		larb21: smi@1802e000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1802e000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdecsys CLK_VDEC2_LARB1&gt;,</div><div class='add'>+				 &lt;&amp;vdecsys CLK_VDEC2_LARB1&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L21_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vdo_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vdecsys: clock-controller@1802f000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-vdecsys";</div><div class='ctx'> 			reg = &lt;0 0x1802f000 0 0x1000&gt;;</div><div class='hunk'>@@ -1898,14 +2809,409 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		larb19: smi@1a010000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1a010000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vencsys CLK_VENC1_VENC&gt;,</div><div class='add'>+				 &lt;&amp;vencsys CLK_VENC1_VENC&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VENC&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L19_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vdo_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_encoder: video-encoder@1a020000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vcodec-enc";</div><div class='add'>+			reg = &lt;0 0x1a020000 0 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;topckgen CLK_TOP_VENC&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_UNIVPLL_D4&gt;;</div><div class='add'>+			clocks = &lt;&amp;vencsys CLK_VENC1_VENC&gt;;</div><div class='add'>+			clock-names = "venc_sel";</div><div class='add'>+			interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_RCPU&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_REC&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_BSDMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_SV_COMV&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_RD_COMV&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_CUR_LUMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_CUR_CHROMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_REF_LUMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_REF_CHROMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_SUB_W_LUMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_VENC_SUB_R_LUMA&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VENC&gt;;</div><div class='add'>+			mediatek,scp = &lt;&amp;scp_c0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		jpeg_encoder: jpeg-encoder@1a030000 {</div><div class='add'>+			compatible = "mediatek,mt8188-jpgenc", "mediatek,mtk-jpgenc";</div><div class='add'>+			reg = &lt;0 0x1a030000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vencsys CLK_VENC1_JPGENC&gt;;</div><div class='add'>+			clock-names = "jpgenc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L19_JPGENC_Y_RDMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGENC_C_RDMA&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGENC_Q_TABLE&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGENC_BSDMA&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VENC&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		jpeg_decoder: jpeg-decoder@1a040000 {</div><div class='add'>+			compatible = "mediatek,mt8188-jpgdec", "mediatek,mt2701-jpgdec";</div><div class='add'>+			reg = &lt;0 0x1a040000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vencsys CLK_VENC1_LARB&gt;,</div><div class='add'>+				 &lt;&amp;vencsys CLK_VENC1_JPGDEC&gt;;</div><div class='add'>+			clock-names = "jpgdec-smi", "jpgdec";</div><div class='add'>+			interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_WDMA_0&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_BSDMA_0&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_WDMA_1&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_BSDMA_1&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_HUFF_OFFSET_1&gt;,</div><div class='add'>+				 &lt;&amp;vdo_iommu M4U_PORT_L19_JPGDEC_HUFF_OFFSET_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDEC0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ovl0: ovl@1c000000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-ovl", "mediatek,mt8195-disp-ovl";</div><div class='add'>+			reg = &lt;0 0x1c000000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_OVL0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L0_DISP_OVL0_RDMA0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl0_in: endpoint { };</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rdma0: rdma@1c002000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-rdma", "mediatek,mt8195-disp-rdma";</div><div class='add'>+			reg = &lt;0 0x1c002000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_RDMA0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L1_DISP_RDMA0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x2000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		color0: color@1c003000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-color", "mediatek,mt8173-disp-color";</div><div class='add'>+			reg = &lt;0 0x1c003000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_COLOR0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x3000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ccorr0: ccorr@1c004000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-ccorr", "mediatek,mt8192-disp-ccorr";</div><div class='add'>+			reg = &lt;0 0x1c004000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_CCORR0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x4000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ccorr0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ccorr0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aal0: aal@1c005000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-aal", "mediatek,mt8183-disp-aal";</div><div class='add'>+			reg = &lt;0 0x1c005000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_AAL0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x5000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					aal0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					aal0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gamma0: gamma@1c006000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-gamma", "mediatek,mt8195-disp-gamma";</div><div class='add'>+			reg = &lt;0 0x1c006000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_GAMMA0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x6000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					gamma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					gamma0_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dither0: dither@1c007000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-dither", "mediatek,mt8183-disp-dither";</div><div class='add'>+			reg = &lt;0 0x1c007000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_DITHER0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x7000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dither0_in: endpoint { };</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dither0_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		disp_dsi0: dsi@1c008000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dsi";</div><div class='add'>+			reg = &lt;0 0x1c008000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DSI0&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_DSI0_DSI&gt;,</div><div class='add'>+				 &lt;&amp;mipi_tx_config0&gt;;</div><div class='add'>+			clock-names = "engine", "digital", "hs";</div><div class='add'>+			interrupts = &lt;GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			phys = &lt;&amp;mipi_tx_config0&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys0 MT8188_VDO0_RST_DSI0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsc0: dsc@1c009000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-dsc", "mediatek,mt8195-disp-dsc";</div><div class='add'>+			reg = &lt;0 0x1c009000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DSC_WRAP0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x9000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		disp_dsi1: dsi@1c012000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dsi";</div><div class='add'>+			reg = &lt;0 0x1c012000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DSI1&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_DSI1_DSI&gt;,</div><div class='add'>+				 &lt;&amp;mipi_tx_config1&gt;;</div><div class='add'>+			clock-names = "engine", "digital", "hs";</div><div class='add'>+			interrupts = &lt;GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			phys = &lt;&amp;mipi_tx_config1&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys0 MT8188_VDO0_RST_DSI1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge0: merge0@1c014000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c014000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_VPP_MERGE0&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE_VDO1_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0x4000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dp_intf0: dp-intf@1c015000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dp-intf";</div><div class='add'>+			reg = &lt;0 0x1c015000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DP_INTF0_DP_INTF&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_DP_INTF0&gt;,</div><div class='add'>+				 &lt;&amp;apmixedsys CLK_APMIXED_TVDPLL1&gt;;</div><div class='add'>+			clock-names = "pixel", "engine", "pll";</div><div class='add'>+			interrupts = &lt;GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mutex0: mutex@1c016000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-mutex";</div><div class='add'>+			reg = &lt;0 0x1c016000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_MUTEX0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0x6000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VDO0_DISP_STREAM_DONE_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		postmask0: postmask@1c01a000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-postmask",</div><div class='add'>+				     "mediatek,mt8192-disp-postmask";</div><div class='add'>+			reg = &lt;0 0x1c01a000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_POSTMASK0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0xa000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					postmask0_in: endpoint { };</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					postmask0_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vdosys0: syscon@1c01d000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-vdosys0", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x1c01d000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			mboxes = &lt;&amp;gce0 0 CMDQ_THR_PRIO_4&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c01XXXX 0xd000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		larb0: smi@1c022000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1c022000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_SMI_LARB&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_SMI_LARB&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L0_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vdo_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb1: smi@1c023000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1c023000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_SMI_LARB&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_SMI_LARB&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L1_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo_smi_common: smi@1c024000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-common-vdo";</div><div class='add'>+			reg = &lt;0 0x1c024000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_SMI_COMMON&gt;,</div><div class='add'>+				 &lt;&amp;vdosys0 CLK_VDO0_SMI_GALS&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo_iommu: iommu@1c028000 {</div><div class='add'>+			compatible = "mediatek,mt8188-iommu-vdo";</div><div class='add'>+			reg = &lt;0 0x1c028000 0 0x5000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys0 CLK_VDO0_SMI_IOMMU&gt;;</div><div class='add'>+			clock-names = "bclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,larbs = &lt;&amp;larb0 &amp;larb2 &amp;larb5 &amp;larb19 &amp;larb21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vdosys1: syscon@1c100000 {</div><div class='ctx'> 			compatible = "mediatek,mt8188-vdosys1", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x1c100000 0 0x1000&gt;;</div><div class='hunk'>@@ -1914,5 +3220,336 @@</div><div class='ctx'> 			mboxes = &lt;&amp;gce0 1 CMDQ_THR_PRIO_4&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mutex1: mutex@1c101000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-mutex";</div><div class='add'>+			reg = &lt;0 0x1c101000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_DISP_MUTEX&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x1000 0x1000&gt;;</div><div class='add'>+			mediatek,gce-events = &lt;CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb2: smi@1c102000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1c102000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_SMI_LARB2&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_SMI_LARB2&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L2_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vdo_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		larb3: smi@1c103000 {</div><div class='add'>+			compatible = "mediatek,mt8188-smi-larb";</div><div class='add'>+			reg = &lt;0 0x1c103000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_SMI_LARB3&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_SMI_LARB3&gt;;</div><div class='add'>+			clock-names = "apb", "smi";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,larb-id = &lt;SMI_L3_ID&gt;;</div><div class='add'>+			mediatek,smi = &lt;&amp;vpp_smi_common&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma0: rdma@1c104000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c104000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L2_MDP_RDMA0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x4000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma1: rdma@1c105000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c105000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L3_MDP_RDMA1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x5000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma2: rdma@1c106000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c106000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L2_MDP_RDMA2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x6000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma3: rdma@1c107000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c107000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L3_MDP_RDMA3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x7000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma4: rdma@1c108000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c108000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA4&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L2_MDP_RDMA4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x8000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma5: rdma@1c109000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c109000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA5&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L3_MDP_RDMA5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x9000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma6: rdma@1c10a000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c10a000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA6&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vdo_iommu M4U_PORT_L2_MDP_RDMA6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xa000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdo1_rdma7: rdma@1c10b000 {</div><div class='add'>+			compatible = "mediatek,mt8188-vdo1-rdma", "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+			reg = &lt;0 0x1c10b000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA7&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L3_MDP_RDMA7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xb000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge1: merge@1c10c000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c10c000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_VPP_MERGE0&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE0_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_MERGE0_DL_ASYNC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xc000 0x1000&gt;;</div><div class='add'>+			mediatek,merge-mute;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge2: merge@1c10d000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c10d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_VPP_MERGE1&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE1_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_MERGE1_DL_ASYNC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xd000 0x1000&gt;;</div><div class='add'>+			mediatek,merge-mute;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge3: merge@1c10e000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c10e000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_VPP_MERGE2&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE2_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_MERGE2_DL_ASYNC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xe000 0x1000&gt;;</div><div class='add'>+			mediatek,merge-mute;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge4: merge@1c10f000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c10f000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_VPP_MERGE3&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE3_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_MERGE3_DL_ASYNC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0xf000 0x1000&gt;;</div><div class='add'>+			mediatek,merge-mute;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		merge5: merge@1c110000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-merge", "mediatek,mt8195-disp-merge";</div><div class='add'>+			reg = &lt;0 0x1c110000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_VPP_MERGE4&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_MERGE4_DL_ASYNC&gt;;</div><div class='add'>+			clock-names = "merge", "merge_async";</div><div class='add'>+			interrupts = &lt;GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_MERGE4_DL_ASYNC&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0x0000 0x1000&gt;;</div><div class='add'>+			mediatek,merge-fifo-en;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dp_intf1: dp-intf@1c113000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dp-intf";</div><div class='add'>+			reg = &lt;0 0x1c113000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_DPINTF&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_DP_INTF0_MMCK&gt;,</div><div class='add'>+				 &lt;&amp;apmixedsys CLK_APMIXED_TVDPLL2&gt;;</div><div class='add'>+			clock-names = "pixel", "engine", "pll";</div><div class='add'>+			interrupts = &lt;GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethdr0: ethdr@1c114000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-ethdr", "mediatek,mt8195-disp-ethdr";</div><div class='add'>+			reg = &lt;0 0x1c114000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c115000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c117000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c119000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c11a000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c11b000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c11c000 0 0x1000&gt;;</div><div class='add'>+			reg-names = "mixer", "vdo_fe0", "vdo_fe1", "gfx_fe0", "gfx_fe1",</div><div class='add'>+				    "vdo_be", "adl_ds";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_DISP_MIXER&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE0&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE1&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE0&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE1&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_BE&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_26M_SLOW&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE0_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE1_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE0_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE1_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_BE_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;topckgen CLK_TOP_ETHDR&gt;;</div><div class='add'>+			clock-names = "mixer", "vdo_fe0", "vdo_fe1", "gfx_fe0", "gfx_fe1",</div><div class='add'>+				      "vdo_be", "adl_ds", "vdo_fe0_async", "vdo_fe1_async",</div><div class='add'>+				      "gfx_fe0_async", "gfx_fe1_async", "vdo_be_async", "ethdr_top";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 566 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			iommus = &lt;&amp;vpp_iommu M4U_PORT_L3_HDR_DS_SMI&gt;,</div><div class='add'>+				 &lt;&amp;vpp_iommu M4U_PORT_L3_HDR_ADL_SMI&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			resets = &lt;&amp;vdosys1 MT8188_VDO1_RST_HDR_VDO_FE0_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 MT8188_VDO1_RST_HDR_VDO_FE1_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 MT8188_VDO1_RST_HDR_GFX_FE0_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 MT8188_VDO1_RST_HDR_GFX_FE1_DL_ASYNC&gt;,</div><div class='add'>+				 &lt;&amp;vdosys1 MT8188_VDO1_RST_HDR_VDO_BE_DL_ASYNC&gt;;</div><div class='add'>+</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0x4000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0x5000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0x7000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0x9000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0xa000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0xb000 0x1000&gt;,</div><div class='add'>+						  &lt;&amp;gce0 SUBSYS_1c11XXXX 0xc000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding0: padding@1c11d000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c11d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0xd000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding1: padding@1c11e000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c11e000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0xe000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding2: padding@1c11f000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c11f000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0xf000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding3: padding@1c120000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c120000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c12XXXX 0x0000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding4: padding@1c121000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c121000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c12XXXX 0x1000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding5: padding@1c122000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c122000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c12XXXX 0x2000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding6: padding@1c123000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c123000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c12XXXX 0x3000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padding7: padding@1c124000 {</div><div class='add'>+			compatible = "mediatek,mt8188-disp-padding";</div><div class='add'>+			reg = &lt;0 0x1c124000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vdosys1 CLK_VDO1_PADDING7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c12XXXX 0x4000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		edp_tx: edp-tx@1c500000 {</div><div class='add'>+			compatible = "mediatek,mt8188-edp-tx";</div><div class='add'>+			reg = &lt;0 0x1c500000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			nvmem-cells = &lt;&amp;dp_calib_data&gt;;</div><div class='add'>+			nvmem-cell-names = "dp_calibration_data";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_EDP_TX&gt;;</div><div class='add'>+			max-linkrate-mhz = &lt;8100&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dp_tx: dp-tx@1c600000 {</div><div class='add'>+			compatible = "mediatek,mt8188-dp-tx";</div><div class='add'>+			reg = &lt;0 0x1c600000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			nvmem-cells = &lt;&amp;dp_calib_data&gt;;</div><div class='add'>+			nvmem-cell-names = "dp_calibration_data";</div><div class='add'>+			power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_DP_TX&gt;;</div><div class='add'>+			max-linkrate-mhz = &lt;5400&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts<br/>deleted file mode 100644<br/>index cd86ad9ba28a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r5-sku2.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,65 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Copyright 2022 Google LLC</div><div class='del'>- */</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "mt8192-asurada.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Hayato rev5";</div><div class='del'>-	chassis-type = "convertible";</div><div class='del'>-	compatible = "google,hayato-rev5-sku2", "google,hayato-sku2",</div><div class='del'>-		     "google,hayato", "mediatek,mt8192";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;keyboard_controller {</div><div class='del'>-	function-row-physmap = &lt;</div><div class='del'>-		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */</div><div class='del'>-		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */</div><div class='del'>-		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */</div><div class='del'>-		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */</div><div class='del'>-	&gt;;</div><div class='del'>-	linux,keymap = &lt;</div><div class='del'>-		MATRIX_KEY(0x00, 0x02, KEY_BACK)</div><div class='del'>-		MATRIX_KEY(0x03, 0x02, KEY_FORWARD)</div><div class='del'>-		MATRIX_KEY(0x02, 0x02, KEY_REFRESH)</div><div class='del'>-		MATRIX_KEY(0x01, 0x02, KEY_FULL_SCREEN)</div><div class='del'>-		MATRIX_KEY(0x03, 0x04, KEY_SCALE)</div><div class='del'>-		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)</div><div class='del'>-		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)</div><div class='del'>-		MATRIX_KEY(0x02, 0x09, KEY_MUTE)</div><div class='del'>-		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)</div><div class='del'>-		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)</div><div class='del'>-</div><div class='del'>-		CROS_STD_MAIN_KEYMAP</div><div class='del'>-	&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rt5682 {</div><div class='del'>-	compatible = "realtek,rt5682s";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sound {</div><div class='del'>-	compatible = "mediatek,mt8192_mt6359_rt1015p_rt5682s";</div><div class='del'>-</div><div class='del'>-	speaker-codecs {</div><div class='del'>-		sound-dai = &lt;&amp;rt1015p&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	headset-codec {</div><div class='del'>-		sound-dai = &lt;&amp;rt5682 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;touchscreen {</div><div class='del'>-	compatible = "hid-over-i2c";</div><div class='del'>-	post-power-on-delay-ms = &lt;10&gt;;</div><div class='del'>-	hid-descr-addr = &lt;0x0001&gt;;</div><div class='del'>-	vdd-supply = &lt;&amp;pp3300_u&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts<br/>index 29aa87e93888..163960f58db5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts</a></div><div class='hunk'>@@ -79,3 +79,21 @@</div><div class='ctx'> &amp;touchscreen {</div><div class='ctx'> 	compatible = "elan,ekth3500";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* synaptics touchpad */</div><div class='add'>+	trackpad@2c {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;trackpad_pins&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		status = "fail-needs-probe";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;trackpad {</div><div class='add'>+	status = "fail-needs-probe";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts<br/>deleted file mode 100644<br/>index 5e9e598bab90..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r4.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,78 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Copyright 2022 Google LLC</div><div class='del'>- */</div><div class='del'>-/dts-v1/;</div><div class='del'>-#include "mt8192-asurada.dtsi"</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Spherion (rev4)";</div><div class='del'>-	chassis-type = "laptop";</div><div class='del'>-	compatible = "google,spherion-rev4", "google,spherion",</div><div class='del'>-		     "mediatek,mt8192";</div><div class='del'>-</div><div class='del'>-	pwmleds {</div><div class='del'>-		compatible = "pwm-leds";</div><div class='del'>-</div><div class='del'>-		led {</div><div class='del'>-			function = LED_FUNCTION_KBD_BACKLIGHT;</div><div class='del'>-			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='del'>-			pwms = &lt;&amp;cros_ec_pwm 0&gt;;</div><div class='del'>-			max-brightness = &lt;1023&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cros_ec_pwm {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;keyboard_controller {</div><div class='del'>-	function-row-physmap = &lt;</div><div class='del'>-		MATRIX_KEY(0x00, 0x02, 0)	/* T1 */</div><div class='del'>-		MATRIX_KEY(0x03, 0x02, 0)	/* T2 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x02, 0)	/* T3 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x02, 0)	/* T4 */</div><div class='del'>-		MATRIX_KEY(0x03, 0x04, 0)	/* T5 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x04, 0)	/* T6 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x04, 0)	/* T7 */</div><div class='del'>-		MATRIX_KEY(0x02, 0x09, 0)	/* T8 */</div><div class='del'>-		MATRIX_KEY(0x01, 0x09, 0)	/* T9 */</div><div class='del'>-		MATRIX_KEY(0x00, 0x04, 0)	/* T10 */</div><div class='del'>-	&gt;;</div><div class='del'>-	linux,keymap = &lt;</div><div class='del'>-		MATRIX_KEY(0x00, 0x02, KEY_BACK)</div><div class='del'>-		MATRIX_KEY(0x03, 0x02, KEY_REFRESH)</div><div class='del'>-		MATRIX_KEY(0x02, 0x02, KEY_FULL_SCREEN)</div><div class='del'>-		MATRIX_KEY(0x01, 0x02, KEY_SCALE)</div><div class='del'>-		MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)</div><div class='del'>-		MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)</div><div class='del'>-		MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)</div><div class='del'>-		MATRIX_KEY(0x02, 0x09, KEY_MUTE)</div><div class='del'>-		MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)</div><div class='del'>-		MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)</div><div class='del'>-</div><div class='del'>-		CROS_STD_MAIN_KEYMAP</div><div class='del'>-	&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rt5682 {</div><div class='del'>-	compatible = "realtek,rt5682s";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sound {</div><div class='del'>-	compatible = "mediatek,mt8192_mt6359_rt1015p_rt5682s";</div><div class='del'>-</div><div class='del'>-	speaker-codecs {</div><div class='del'>-		sound-dai = &lt;&amp;rt1015p&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	headset-codec {</div><div class='del'>-		sound-dai = &lt;&amp;rt5682 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;touchscreen {</div><div class='del'>-	compatible = "elan,ekth3500";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi<br/>index 08d71ddf3668..0b4664f044a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi</a></div><div class='hunk'>@@ -199,6 +199,13 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		afe_dma_mem: audio-dma-pool {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0 0x100000&gt;;</div><div class='add'>+			alignment = &lt;0 0x10&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		scp_mem_reserved: scp@50000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0x50000000 0 0x2900000&gt;;</div><div class='hunk'>@@ -276,6 +283,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dsi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -337,12 +348,12 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='ctx'> </div><div class='del'>-	trackpad@15 {</div><div class='add'>+	trackpad: trackpad@15 {</div><div class='ctx'> 		compatible = "elan,ekth3000";</div><div class='ctx'> 		reg = &lt;0x15&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;pio 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;trackpad_pins&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		vcc-supply = &lt;&amp;pp3300_u&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1420,7 +1431,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -1430,7 +1440,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6315_6_vbuck3: vbuck3 {</div><div class='del'>-				regulator-compatible = "vbuck3";</div><div class='ctx'> 				regulator-name = "Vlcpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -1447,7 +1456,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;800000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts<br/>index a82d716f10d4..a50b4e8efaba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> &amp;audio_codec {</div><div class='ctx'> 	compatible = "realtek,rt5682i";</div><div class='ctx'> 	realtek,btndet-delay = &lt;16&gt;;</div><div class='add'>+	VBAT-supply = &lt;&amp;pp3300_z5&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sound {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts<br/>index 2d6522c144b7..a8657c0068d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> &amp;audio_codec {</div><div class='ctx'> 	compatible = "realtek,rt5682i";</div><div class='ctx'> 	realtek,btndet-delay = &lt;16&gt;;</div><div class='add'>+	VBAT-supply = &lt;&amp;pp3300_z5&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio_default {</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi<br/>index 75d56b2d5a3d..b3761b80cac7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi</a></div><div class='hunk'>@@ -297,12 +297,29 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsc0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dp_intf0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	port {</div><div class='del'>-		dp_intf0_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;edp_in&gt;;</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dp_intf0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;merge0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dp_intf0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;edp_in&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -310,9 +327,51 @@</div><div class='ctx'> &amp;dp_intf1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	port {</div><div class='del'>-		dp_intf1_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;dptx_in&gt;;</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dp_intf1_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;merge5_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dp_intf1_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dptx_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsc0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsc0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsc0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;merge0_in&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -357,6 +416,35 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ethdr0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			ethdr0_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;vdosys1_ep_ext&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			ethdr0_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;merge5_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;disp_pwm0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -376,8 +464,12 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			dptx_in: endpoint {</div><div class='add'>+</div><div class='add'>+			dptx_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;dp_intf1_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -438,12 +530,13 @@</div><div class='ctx'> 		/* Realtek RT5682i or RT5682s, sharing the same configuration */</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;pio 89 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> 		realtek,jd-src = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		AVDD-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='ctx'> 		MICVDD-supply = &lt;&amp;pp3300_z2&gt;;</div><div class='del'>-		VBAT-supply = &lt;&amp;pp3300_z5&gt;;</div><div class='add'>+		LDO1-IN-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -511,6 +604,56 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;merge0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			merge0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsc0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			merge0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp_intf0_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;merge5 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			merge5_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ethdr0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			merge5_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dp_intf1_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mfg0 {</div><div class='ctx'> 	domain-supply = &lt;&amp;mt6315_7_vbuck1&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -612,6 +755,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ovl0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;vdosys0_ep_main&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -1181,7 +1328,7 @@</div><div class='ctx'> 		link-name = "ETDM1_OUT_BE";</div><div class='ctx'> 		mediatek,clk-provider = "cpu";</div><div class='ctx'> 		codec {</div><div class='del'>-			sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;audio_codec 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1189,7 +1336,7 @@</div><div class='ctx'> 		link-name = "ETDM2_IN_BE";</div><div class='ctx'> 		mediatek,clk-provider = "cpu";</div><div class='ctx'> 		codec {</div><div class='del'>-			sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;audio_codec 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1285,7 +1432,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -1303,7 +1449,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;400000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -1365,6 +1510,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;vdosys0 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys0_ep_main: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * For the USB Type-C ports the role and alternate modes switching is</div><div class='ctx'>  * done by the EC so we set dr_mode to host to avoid interfering.</div><div class='hunk'>@@ -1387,6 +1544,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;vdosys1 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys1_ep_ext: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ethdr0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;xhci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts<br/>index 31d424b8fc7c..1f59b5786b81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-demo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195-demo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195-demo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8195-demo.dts</a></div><div class='hunk'>@@ -109,6 +109,7 @@</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;eth_default_pins&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;eth_sleep_pins&gt;;</div><div class='add'>+	mediatek,mac-wol;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='hunk'>@@ -137,7 +138,6 @@</div><div class='ctx'> 			richtek,vinovp-microvolt = &lt;14500000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			otg_vbus_regulator: usb-otg-vbus-regulator {</div><div class='del'>-				regulator-compatible = "usb-otg-vbus";</div><div class='ctx'> 				regulator-name = "usb-otg-vbus";</div><div class='ctx'> 				regulator-min-microvolt = &lt;4425000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;5825000&gt;;</div><div class='hunk'>@@ -149,7 +149,6 @@</div><div class='ctx'> 			LDO_VIN3-supply = &lt;&amp;mt6360_buck2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			mt6360_buck1: buck1 {</div><div class='del'>-				regulator-compatible = "BUCK1";</div><div class='ctx'> 				regulator-name = "mt6360,buck1";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='hunk'>@@ -160,7 +159,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_buck2: buck2 {</div><div class='del'>-				regulator-compatible = "BUCK2";</div><div class='ctx'> 				regulator-name = "mt6360,buck2";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='hunk'>@@ -171,7 +169,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo1: ldo1 {</div><div class='del'>-				regulator-compatible = "LDO1";</div><div class='ctx'> 				regulator-name = "mt6360,ldo1";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -180,7 +177,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo2: ldo2 {</div><div class='del'>-				regulator-compatible = "LDO2";</div><div class='ctx'> 				regulator-name = "mt6360,ldo2";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -189,7 +185,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo3: ldo3 {</div><div class='del'>-				regulator-compatible = "LDO3";</div><div class='ctx'> 				regulator-name = "mt6360,ldo3";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -198,7 +193,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo5: ldo5 {</div><div class='del'>-				regulator-compatible = "LDO5";</div><div class='ctx'> 				regulator-name = "mt6360,ldo5";</div><div class='ctx'> 				regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -207,7 +201,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo6: ldo6 {</div><div class='del'>-				regulator-compatible = "LDO6";</div><div class='ctx'> 				regulator-name = "mt6360,ldo6";</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='hunk'>@@ -216,7 +209,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mt6360_ldo7: ldo7 {</div><div class='del'>-				regulator-compatible = "LDO7";</div><div class='ctx'> 				regulator-name = "mt6360,ldo7";</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi<br/>index e89ba384c4aa..ec452d657031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8195.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8195.dtsi</a></div><div class='hunk'>@@ -487,7 +487,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		infracfg_ao: syscon@10001000 {</div><div class='del'>-			compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd";</div><div class='add'>+			compatible = "mediatek,mt8195-infracfg_ao", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -617,22 +617,6 @@</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-					power-domain@MT8195_POWER_DOMAIN_VDEC1 {</div><div class='del'>-						reg = &lt;MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='del'>-						clocks = &lt;&amp;vdecsys CLK_VDEC_LARB1&gt;;</div><div class='del'>-						clock-names = "vdec1-0";</div><div class='del'>-						mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='del'>-						#power-domain-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {</div><div class='del'>-						reg = &lt;MT8195_POWER_DOMAIN_VENC_CORE1&gt;;</div><div class='del'>-						clocks = &lt;&amp;vencsys_core1 CLK_VENC_CORE1_LARB&gt;;</div><div class='del'>-						clock-names = "venc1-larb";</div><div class='del'>-						mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='del'>-						#power-domain-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='ctx'> 					power-domain@MT8195_POWER_DOMAIN_VDOSYS0 {</div><div class='ctx'> 						reg = &lt;MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 						clocks = &lt;&amp;topckgen CLK_TOP_CFG_VDO0&gt;,</div><div class='hunk'>@@ -678,15 +662,25 @@</div><div class='ctx'> 							clocks = &lt;&amp;vdecsys_soc CLK_VDEC_SOC_LARB1&gt;;</div><div class='ctx'> 							clock-names = "vdec0-0";</div><div class='ctx'> 							mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='ctx'> 							#power-domain-cells = &lt;0&gt;;</div><div class='del'>-						};</div><div class='ctx'> </div><div class='del'>-						power-domain@MT8195_POWER_DOMAIN_VDEC2 {</div><div class='del'>-							reg = &lt;MT8195_POWER_DOMAIN_VDEC2&gt;;</div><div class='del'>-							clocks = &lt;&amp;vdecsys_core1 CLK_VDEC_CORE1_LARB1&gt;;</div><div class='del'>-							clock-names = "vdec2-0";</div><div class='del'>-							mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='del'>-							#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							power-domain@MT8195_POWER_DOMAIN_VDEC1 {</div><div class='add'>+								reg = &lt;MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+								clocks = &lt;&amp;vdecsys CLK_VDEC_LARB1&gt;;</div><div class='add'>+								clock-names = "vdec1-0";</div><div class='add'>+								mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+								#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							power-domain@MT8195_POWER_DOMAIN_VDEC2 {</div><div class='add'>+								reg = &lt;MT8195_POWER_DOMAIN_VDEC2&gt;;</div><div class='add'>+								clocks = &lt;&amp;vdecsys_core1 CLK_VDEC_CORE1_LARB1&gt;;</div><div class='add'>+								clock-names = "vdec2-0";</div><div class='add'>+								mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+								#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							};</div><div class='ctx'> 						};</div><div class='ctx'> </div><div class='ctx'> 						power-domain@MT8195_POWER_DOMAIN_VENC {</div><div class='hunk'>@@ -694,7 +688,17 @@</div><div class='ctx'> 							clocks = &lt;&amp;vencsys CLK_VENC_LARB&gt;;</div><div class='ctx'> 							clock-names = "venc0-larb";</div><div class='ctx'> 							mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='ctx'> 							#power-domain-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+							power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {</div><div class='add'>+								reg = &lt;MT8195_POWER_DOMAIN_VENC_CORE1&gt;;</div><div class='add'>+								clocks = &lt;&amp;vencsys_core1 CLK_VENC_CORE1_LARB&gt;;</div><div class='add'>+								clock-names = "venc1-larb";</div><div class='add'>+								mediatek,infracfg = &lt;&amp;infracfg_ao&gt;;</div><div class='add'>+								#power-domain-cells = &lt;0&gt;;</div><div class='add'>+							};</div><div class='ctx'> 						};</div><div class='ctx'> </div><div class='ctx'> 						power-domain@MT8195_POWER_DOMAIN_VDOSYS1 {</div><div class='hunk'>@@ -1426,6 +1430,31 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ufshci: ufshci@11270000 {</div><div class='add'>+			compatible = "mediatek,mt8195-ufshci";</div><div class='add'>+			reg = &lt;0 0x11270000 0 0x2300&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			phys = &lt;&amp;ufsphy&gt;;</div><div class='add'>+			clocks = &lt;&amp;infracfg_ao CLK_INFRA_AO_AES_UFSFDE&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_AES&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_UFS_TICK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_UNIPRO_SYS&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_UNIPRO_TICK&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_UFS_MP_SAP_B&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_UFS_TX_SYMBOL&gt;,</div><div class='add'>+				 &lt;&amp;infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB&gt;;</div><div class='add'>+			clock-names = "ufs", "ufs_aes", "ufs_tick",</div><div class='add'>+					"unipro_sysclk", "unipro_tick",</div><div class='add'>+					"unipro_mp_bclk", "ufs_tx_symbol",</div><div class='add'>+					"ufs_mem_sub";</div><div class='add'>+			freq-table-hz = &lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;, &lt;0 0&gt;, &lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;, &lt;0 0&gt;;</div><div class='add'>+</div><div class='add'>+			mediatek,ufs-disable-mcq;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lvts_mcu: thermal-sensor@11278000 {</div><div class='ctx'> 			compatible = "mediatek,mt8195-lvts-mcu";</div><div class='ctx'> 			reg = &lt;0 0x11278000 0 0x1000&gt;;</div><div class='hunk'>@@ -1559,9 +1588,6 @@</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_PCIE_MAC_P0&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;infracfg_ao MT8195_INFRA_RST2_PCIE_P0_SWRST&gt;;</div><div class='del'>-			reset-names = "mac";</div><div class='del'>-</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='ctx'> 			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc0 0&gt;,</div><div class='hunk'>@@ -1611,9 +1637,6 @@</div><div class='ctx'> 			phy-names = "pcie-phy";</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_PCIE_MAC_P1&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;infracfg_ao MT8195_INFRA_RST2_PCIE_P1_SWRST&gt;;</div><div class='del'>-			reset-names = "mac";</div><div class='del'>-</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='ctx'> 			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc1 0&gt;,</div><div class='hunk'>@@ -3013,7 +3036,7 @@</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		jpgdec-master {</div><div class='add'>+		jpeg-decoder@1a040000 {</div><div class='ctx'> 			compatible = "mediatek,mt8195-jpgdec";</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='hunk'>@@ -3024,11 +3047,12 @@</div><div class='ctx'> 				 &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0&gt;;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+			ranges = &lt;0 0 0 0x1a040000 0 0x20000&gt;,</div><div class='add'>+				 &lt;1 0 0 0x1b040000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			jpgdec@1a040000 {</div><div class='add'>+			jpgdec@0,0 {</div><div class='ctx'> 				compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='del'>-				reg = &lt;0 0x1a040000 0 0x10000&gt;;/* JPGDEC_C0 */</div><div class='add'>+				reg = &lt;0 0 0 0x10000&gt;;/* JPGDEC_C0 */</div><div class='ctx'> 				iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1&gt;,</div><div class='hunk'>@@ -3041,9 +3065,9 @@</div><div class='ctx'> 				power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			jpgdec@1a050000 {</div><div class='add'>+			jpgdec@0,10000 {</div><div class='ctx'> 				compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='del'>-				reg = &lt;0 0x1a050000 0 0x10000&gt;;/* JPGDEC_C1 */</div><div class='add'>+				reg = &lt;0 0 0x10000 0x10000&gt;;/* JPGDEC_C1 */</div><div class='ctx'> 				iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1&gt;,</div><div class='hunk'>@@ -3056,9 +3080,9 @@</div><div class='ctx'> 				power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			jpgdec@1b040000 {</div><div class='add'>+			jpgdec@1,0 {</div><div class='ctx'> 				compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='del'>-				reg = &lt;0 0x1b040000 0 0x10000&gt;;/* JPGDEC_C2 */</div><div class='add'>+				reg = &lt;1 0 0 0x10000&gt;;/* JPGDEC_C2 */</div><div class='ctx'> 				iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_WDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_BSDMA0&gt;,</div><div class='ctx'> 					 &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_WDMA1&gt;,</div><div class='hunk'>@@ -3087,7 +3111,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		jpgenc-master {</div><div class='add'>+		jpeg-encoder@1a030000 {</div><div class='ctx'> 			compatible = "mediatek,mt8195-jpgenc";</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VENC_CORE1&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA&gt;,</div><div class='hunk'>@@ -3096,11 +3120,12 @@</div><div class='ctx'> 					&lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_BSDMA&gt;;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+			ranges = &lt;0 0 0 0x1a030000 0 0x10000&gt;,</div><div class='add'>+				 &lt;1 0 0 0x1b030000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			jpgenc@1a030000 {</div><div class='add'>+			jpgenc@0,0 {</div><div class='ctx'> 				compatible = "mediatek,mt8195-jpgenc-hw";</div><div class='del'>-				reg = &lt;0 0x1a030000 0 0x10000&gt;;</div><div class='add'>+				reg = &lt;0 0 0 0x10000&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_Y_RDMA&gt;,</div><div class='ctx'> 						&lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_C_RDMA&gt;,</div><div class='ctx'> 						&lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_Q_TABLE&gt;,</div><div class='hunk'>@@ -3111,9 +3136,9 @@</div><div class='ctx'> 				power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VENC&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			jpgenc@1b030000 {</div><div class='add'>+			jpgenc@1,0 {</div><div class='ctx'> 				compatible = "mediatek,mt8195-jpgenc-hw";</div><div class='del'>-				reg = &lt;0 0x1b030000 0 0x10000&gt;;</div><div class='add'>+				reg = &lt;1 0 0 0x10000&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA&gt;,</div><div class='ctx'> 						&lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA&gt;,</div><div class='ctx'> 						&lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE&gt;,</div><div class='hunk'>@@ -3138,13 +3163,30 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ovl0: ovl@1c000000 {</div><div class='del'>-			compatible = "mediatek,mt8195-disp-ovl", "mediatek,mt8183-disp-ovl";</div><div class='add'>+			compatible = "mediatek,mt8195-disp-ovl";</div><div class='ctx'> 			reg = &lt;0 0x1c000000 0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_OVL0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu_vdo M4U_PORT_L0_DISP_OVL0_RDMA0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl0_in: endpoint { };</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rdma0: rdma@1c002000 {</div><div class='hunk'>@@ -3155,6 +3197,25 @@</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_RDMA0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;iommu_vdo M4U_PORT_L0_DISP_RDMA0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x2000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		color0: color@1c003000 {</div><div class='hunk'>@@ -3164,6 +3225,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_COLOR0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x3000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ccorr0: ccorr@1c004000 {</div><div class='hunk'>@@ -3173,6 +3253,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_CCORR0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x4000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ccorr0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ccorr0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		aal0: aal@1c005000 {</div><div class='hunk'>@@ -3182,6 +3281,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_AAL0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x5000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					aal0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					aal0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gamma0: gamma@1c006000 {</div><div class='hunk'>@@ -3191,6 +3309,25 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_GAMMA0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x6000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					gamma0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					gamma0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dither0: dither@1c007000 {</div><div class='hunk'>@@ -3200,6 +3337,23 @@</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DISP_DITHER0&gt;;</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c00XXXX 0x7000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dither0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dither0_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dsi0: dsi@1c008000 {</div><div class='hunk'>@@ -3252,6 +3406,7 @@</div><div class='ctx'> 			compatible = "mediatek,mt8195-dp-intf";</div><div class='ctx'> 			reg = &lt;0 0x1c015000 0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys0 CLK_VDO0_DP_INTF0_DP_INTF&gt;,</div><div class='ctx'> 				 &lt;&amp;vdosys0  CLK_VDO0_DP_INTF0&gt;,</div><div class='ctx'> 				 &lt;&amp;apmixedsys CLK_APMIXED_TVDPLL1&gt;;</div><div class='hunk'>@@ -3331,11 +3486,9 @@</div><div class='ctx'> 		mutex1: mutex@1c101000 {</div><div class='ctx'> 			compatible = "mediatek,mt8195-disp-mutex";</div><div class='ctx'> 			reg = &lt;0 0x1c101000 0 0x1000&gt;;</div><div class='del'>-			reg-names = "vdo1_mutex";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;vdosys1 CLK_VDO1_DISP_MUTEX&gt;;</div><div class='del'>-			clock-names = "vdo1_mutex";</div><div class='ctx'> 			mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x1000 0x1000&gt;;</div><div class='ctx'> 			mediatek,gce-events = &lt;CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h b/arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h<br/>new file mode 100644<br/>index 000000000000..99535a6d5cba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h</a></div><div class='hunk'>@@ -0,0 +1,1574 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 MediaTek Inc.</div><div class='add'>+ * Author: Guodong Liu &lt;guodong.liu@mediatek.com&gt;</div><div class='add'>+ *         Lei Xue &lt;lei.xue@mediatek.com&gt;</div><div class='add'>+ *         Cathy Xu &lt;ot_cathy.xu@mediatek.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MT8196_PINFUNC_H</div><div class='add'>+#define __MT8196_PINFUNC_H</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/mt65xx.h&gt;</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_DMIC1_CLK (MTK_PIN_NO(0) | 1)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_SPI3_A_MO (MTK_PIN_NO(0) | 3)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_FMI2S_B_LRCK (MTK_PIN_NO(0) | 4)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(0) | 5)</div><div class='add'>+#define PINMUX_GPIO0__FUNC_TP_GPIO14_AO (MTK_PIN_NO(0) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_DMIC1_DAT (MTK_PIN_NO(1) | 1)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_SRCLKENAI1 (MTK_PIN_NO(1) | 2)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_SPI3_A_MI (MTK_PIN_NO(1) | 3)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_FMI2S_B_DI (MTK_PIN_NO(1) | 4)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(1) | 5)</div><div class='add'>+#define PINMUX_GPIO1__FUNC_TP_GPIO15_AO (MTK_PIN_NO(1) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_PWM_VLP (MTK_PIN_NO(2) | 1)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_DSI_HSYNC (MTK_PIN_NO(2) | 2)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_RG_TSFDC_LDO_EN (MTK_PIN_NO(2) | 5)</div><div class='add'>+#define PINMUX_GPIO2__FUNC_TP_GPIO8_AO (MTK_PIN_NO(2) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_MD_INT0 (MTK_PIN_NO(3) | 1)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_DSI1_HSYNC (MTK_PIN_NO(3) | 2)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_DA_TSFDC_LDO_MODE (MTK_PIN_NO(3) | 5)</div><div class='add'>+#define PINMUX_GPIO3__FUNC_TP_GPIO9_AO (MTK_PIN_NO(3) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_DISP_PWM1 (MTK_PIN_NO(4) | 1)</div><div class='add'>+#define PINMUX_GPIO4__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(4) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_LCM1_RST (MTK_PIN_NO(5) | 1)</div><div class='add'>+#define PINMUX_GPIO5__FUNC_SPI7_A_CLK (MTK_PIN_NO(5) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_DSI1_TE (MTK_PIN_NO(6) | 1)</div><div class='add'>+#define PINMUX_GPIO6__FUNC_SPI7_A_CSB (MTK_PIN_NO(6) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_SPI7_A_MO (MTK_PIN_NO(7) | 2)</div><div class='add'>+#define PINMUX_GPIO7__FUNC_GPS_PPS0 (MTK_PIN_NO(7) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_SPI7_A_MI (MTK_PIN_NO(8) | 2)</div><div class='add'>+#define PINMUX_GPIO8__FUNC_EDP_TX_HPD (MTK_PIN_NO(8) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_I2SIN1_LRCK (MTK_PIN_NO(9) | 3)</div><div class='add'>+#define PINMUX_GPIO9__FUNC_RG_TSFDC_LDO_REFSEL0 (MTK_PIN_NO(9) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_I2SOUT1_DO (MTK_PIN_NO(10) | 3)</div><div class='add'>+#define PINMUX_GPIO10__FUNC_RG_TSFDC_LDO_REFSEL1 (MTK_PIN_NO(10) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_FMI2S_B_BCK (MTK_PIN_NO(11) | 4)</div><div class='add'>+#define PINMUX_GPIO11__FUNC_DBG_MON_A30 (MTK_PIN_NO(11) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0)</div><div class='add'>+#define PINMUX_GPIO12__FUNC_I2SIN1_DI_B (MTK_PIN_NO(12) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_EDP_TX_HPD (MTK_PIN_NO(13) | 1)</div><div class='add'>+#define PINMUX_GPIO13__FUNC_GPS_PPS1 (MTK_PIN_NO(13) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_SRCLKENA2 (MTK_PIN_NO(14) | 1)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_DSI2_TE (MTK_PIN_NO(14) | 2)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_SPMI_P_TRIG_FLAG (MTK_PIN_NO(14) | 3)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_MD_INT3 (MTK_PIN_NO(14) | 5)</div><div class='add'>+#define PINMUX_GPIO14__FUNC_TP_GPIO8_AO (MTK_PIN_NO(14) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_SRCLKENAI0 (MTK_PIN_NO(15) | 1)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_SPMI_M_TRIG_FLAG (MTK_PIN_NO(15) | 2)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_UCTS0 (MTK_PIN_NO(15) | 3)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_MD_INT4 (MTK_PIN_NO(15) | 4)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_I2SOUT2_DO (MTK_PIN_NO(15) | 5)</div><div class='add'>+#define PINMUX_GPIO15__FUNC_TP_GPIO9_AO (MTK_PIN_NO(15) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_SRCLKENAI1 (MTK_PIN_NO(16) | 1)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_DP_TX_HPD (MTK_PIN_NO(16) | 2)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_URTS0 (MTK_PIN_NO(16) | 3)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(16) | 4)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_KPROW2 (MTK_PIN_NO(16) | 5)</div><div class='add'>+#define PINMUX_GPIO16__FUNC_TP_GPIO10_AO (MTK_PIN_NO(16) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_MD_INT0 (MTK_PIN_NO(17) | 1)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_DP_OC_EN (MTK_PIN_NO(17) | 2)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_UCTS1 (MTK_PIN_NO(17) | 3)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_MD_NTN_URXD1 (MTK_PIN_NO(17) | 4)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_KPCOL2 (MTK_PIN_NO(17) | 5)</div><div class='add'>+#define PINMUX_GPIO17__FUNC_TP_GPIO11_AO (MTK_PIN_NO(17) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_DMIC1_CLK (MTK_PIN_NO(18) | 1)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(18) | 2)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_URTS1 (MTK_PIN_NO(18) | 3)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_MD_NTN_UTXD1 (MTK_PIN_NO(18) | 4)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_I2SIN2_DI (MTK_PIN_NO(18) | 5)</div><div class='add'>+#define PINMUX_GPIO18__FUNC_TP_UTXD_GNSS_VLP (MTK_PIN_NO(18) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO19__FUNC_GPIO19 (MTK_PIN_NO(19) | 0)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_DMIC1_DAT (MTK_PIN_NO(19) | 1)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(19) | 2)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(19) | 3)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_CLKM3_A (MTK_PIN_NO(19) | 4)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_I2SIN2_BCK (MTK_PIN_NO(19) | 5)</div><div class='add'>+#define PINMUX_GPIO19__FUNC_TP_URXD_GNSS_VLP (MTK_PIN_NO(19) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO20__FUNC_GPIO20 (MTK_PIN_NO(20) | 0)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_IDDIG (MTK_PIN_NO(20) | 1)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_LCM2_RST (MTK_PIN_NO(20) | 2)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_GPS_PPS1 (MTK_PIN_NO(20) | 3)</div><div class='add'>+#define PINMUX_GPIO20__FUNC_CLKM2_A (MTK_PIN_NO(20) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO21__FUNC_GPIO21 (MTK_PIN_NO(21) | 0)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_BPI_BUS11 (MTK_PIN_NO(21) | 1)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_PCIE_PERSTN_1P (MTK_PIN_NO(21) | 2)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_DSI1_TE (MTK_PIN_NO(21) | 3)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_DMIC_CLK (MTK_PIN_NO(21) | 4)</div><div class='add'>+#define PINMUX_GPIO21__FUNC_SCP_DMIC_CLK (MTK_PIN_NO(21) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO22__FUNC_GPIO22 (MTK_PIN_NO(22) | 0)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_BPI_BUS12 (MTK_PIN_NO(22) | 1)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_PCIE_CLKREQN_1P (MTK_PIN_NO(22) | 2)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_DSI2_TE (MTK_PIN_NO(22) | 3)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_DMIC_DAT (MTK_PIN_NO(22) | 4)</div><div class='add'>+#define PINMUX_GPIO22__FUNC_SCP_DMIC_DAT (MTK_PIN_NO(22) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO23__FUNC_GPIO23 (MTK_PIN_NO(23) | 0)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_BPI_BUS13 (MTK_PIN_NO(23) | 1)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_PCIE_WAKEN_1P (MTK_PIN_NO(23) | 2)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_DSI3_TE (MTK_PIN_NO(23) | 3)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_DMIC1_CLK (MTK_PIN_NO(23) | 4)</div><div class='add'>+#define PINMUX_GPIO23__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(23) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO24__FUNC_GPIO24 (MTK_PIN_NO(24) | 0)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_BPI_BUS14 (MTK_PIN_NO(24) | 1)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_LCM1_RST (MTK_PIN_NO(24) | 2)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_AGPS_SYNC (MTK_PIN_NO(24) | 3)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_DMIC1_DAT (MTK_PIN_NO(24) | 4)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(24) | 5)</div><div class='add'>+#define PINMUX_GPIO24__FUNC_DISP_PWM1 (MTK_PIN_NO(24) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO25__FUNC_GPIO25 (MTK_PIN_NO(25) | 0)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_BPI_BUS15 (MTK_PIN_NO(25) | 1)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_LCM2_RST (MTK_PIN_NO(25) | 2)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_SRCLKENAI1 (MTK_PIN_NO(25) | 3)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_DMIC2_CLK (MTK_PIN_NO(25) | 4)</div><div class='add'>+#define PINMUX_GPIO25__FUNC_DISP_PWM2 (MTK_PIN_NO(25) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO26__FUNC_GPIO26 (MTK_PIN_NO(26) | 0)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_BPI_BUS16 (MTK_PIN_NO(26) | 1)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_LCM3_RST (MTK_PIN_NO(26) | 2)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_DMIC2_DAT (MTK_PIN_NO(26) | 4)</div><div class='add'>+#define PINMUX_GPIO26__FUNC_DISP_PWM3 (MTK_PIN_NO(26) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_BPI_BUS17 (MTK_PIN_NO(27) | 1)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_UTXD4 (MTK_PIN_NO(27) | 2)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_DISP_PWM4 (MTK_PIN_NO(27) | 6)</div><div class='add'>+#define PINMUX_GPIO27__FUNC_DBG_MON_A20 (MTK_PIN_NO(27) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_BPI_BUS18 (MTK_PIN_NO(28) | 1)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_URXD4 (MTK_PIN_NO(28) | 2)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_SPI2_A_MI (MTK_PIN_NO(28) | 3)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_CLKM0_A (MTK_PIN_NO(28) | 4)</div><div class='add'>+#define PINMUX_GPIO28__FUNC_DBG_MON_A21 (MTK_PIN_NO(28) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO29__FUNC_GPIO29 (MTK_PIN_NO(29) | 0)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_BPI_BUS19 (MTK_PIN_NO(29) | 1)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_MD_NTN_UTXD1 (MTK_PIN_NO(29) | 2)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_SPI2_A_MO (MTK_PIN_NO(29) | 3)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_CLKM1_A (MTK_PIN_NO(29) | 4)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_UCTS4 (MTK_PIN_NO(29) | 6)</div><div class='add'>+#define PINMUX_GPIO29__FUNC_DBG_MON_A17 (MTK_PIN_NO(29) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO30__FUNC_GPIO30 (MTK_PIN_NO(30) | 0)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_BPI_BUS20 (MTK_PIN_NO(30) | 1)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_MD_NTN_URXD1 (MTK_PIN_NO(30) | 2)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_SPI2_A_CLK (MTK_PIN_NO(30) | 3)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_CLKM2_A (MTK_PIN_NO(30) | 4)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_DSI3_HSYNC (MTK_PIN_NO(30) | 5)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_URTS4 (MTK_PIN_NO(30) | 6)</div><div class='add'>+#define PINMUX_GPIO30__FUNC_DBG_MON_A18 (MTK_PIN_NO(30) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO31__FUNC_GPIO31 (MTK_PIN_NO(31) | 0)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_BPI_BUS21 (MTK_PIN_NO(31) | 1)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_SPI2_A_CSB (MTK_PIN_NO(31) | 3)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_CLKM3_A (MTK_PIN_NO(31) | 4)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_EDP_TX_HPD (MTK_PIN_NO(31) | 6)</div><div class='add'>+#define PINMUX_GPIO31__FUNC_DBG_MON_A19 (MTK_PIN_NO(31) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO32__FUNC_GPIO32 (MTK_PIN_NO(32) | 0)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_LCM4_RST (MTK_PIN_NO(32) | 1)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_DP_TX_HPD (MTK_PIN_NO(32) | 2)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_SSPM_JTAG_TCK_VLP (MTK_PIN_NO(32) | 3)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_ADSP_JTAG0_TCK (MTK_PIN_NO(32) | 4)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_SCP_JTAG0_TCK_VLP (MTK_PIN_NO(32) | 5)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_SPU0_TCK (MTK_PIN_NO(32) | 6)</div><div class='add'>+#define PINMUX_GPIO32__FUNC_IO_JTAG_TCK (MTK_PIN_NO(32) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO33__FUNC_GPIO33 (MTK_PIN_NO(33) | 0)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_DSI4_TE (MTK_PIN_NO(33) | 1)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_DP_OC_EN (MTK_PIN_NO(33) | 2)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_SSPM_JTAG_TRSTN_VLP (MTK_PIN_NO(33) | 3)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_ADSP_JTAG0_TRSTN (MTK_PIN_NO(33) | 4)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_SCP_JTAG0_TRSTN_VLP (MTK_PIN_NO(33) | 5)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_SPU0_NTRST (MTK_PIN_NO(33) | 6)</div><div class='add'>+#define PINMUX_GPIO33__FUNC_IO_JTAG_TRSTN (MTK_PIN_NO(33) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO34__FUNC_GPIO34 (MTK_PIN_NO(34) | 0)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_UCTS5 (MTK_PIN_NO(34) | 1)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(34) | 2)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_SSPM_JTAG_TDI_VLP (MTK_PIN_NO(34) | 3)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_ADSP_JTAG0_TDI (MTK_PIN_NO(34) | 4)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_SCP_JTAG0_TDI_VLP (MTK_PIN_NO(34) | 5)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_SPU0_TDI (MTK_PIN_NO(34) | 6)</div><div class='add'>+#define PINMUX_GPIO34__FUNC_IO_JTAG_TDI (MTK_PIN_NO(34) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO35__FUNC_GPIO35 (MTK_PIN_NO(35) | 0)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_URTS5 (MTK_PIN_NO(35) | 1)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(35) | 2)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_SSPM_JTAG_TDO_VLP (MTK_PIN_NO(35) | 3)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_ADSP_JTAG0_TDO (MTK_PIN_NO(35) | 4)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_SCP_JTAG0_TDO_VLP (MTK_PIN_NO(35) | 5)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_SPU0_TDO (MTK_PIN_NO(35) | 6)</div><div class='add'>+#define PINMUX_GPIO35__FUNC_IO_JTAG_TDO (MTK_PIN_NO(35) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO36__FUNC_GPIO36 (MTK_PIN_NO(36) | 0)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_UTXD5 (MTK_PIN_NO(36) | 1)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_SSPM_JTAG_TMS_VLP (MTK_PIN_NO(36) | 3)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_ADSP_JTAG0_TMS (MTK_PIN_NO(36) | 4)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_SCP_JTAG0_TMS_VLP (MTK_PIN_NO(36) | 5)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_SPU0_TMS (MTK_PIN_NO(36) | 6)</div><div class='add'>+#define PINMUX_GPIO36__FUNC_IO_JTAG_TMS (MTK_PIN_NO(36) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO37__FUNC_GPIO37 (MTK_PIN_NO(37) | 0)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_URXD5 (MTK_PIN_NO(37) | 1)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_MD_INT3 (MTK_PIN_NO(37) | 3)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_CLKM0_B (MTK_PIN_NO(37) | 4)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_TP_GPIO5_AO (MTK_PIN_NO(37) | 5)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_SPU0_UTX (MTK_PIN_NO(37) | 6)</div><div class='add'>+#define PINMUX_GPIO37__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(37) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO38__FUNC_GPIO38 (MTK_PIN_NO(38) | 0)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_SPMI_P_TRIG_FLAG (MTK_PIN_NO(38) | 2)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_MD_INT4 (MTK_PIN_NO(38) | 3)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_CLKM1_B (MTK_PIN_NO(38) | 4)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_TP_GPIO6_AO (MTK_PIN_NO(38) | 5)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_SPU0_URX (MTK_PIN_NO(38) | 6)</div><div class='add'>+#define PINMUX_GPIO38__FUNC_DAP_MD32_SWD (MTK_PIN_NO(38) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO39__FUNC_GPIO39 (MTK_PIN_NO(39) | 0)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_I2S_MCK0 (MTK_PIN_NO(39) | 1)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_GPS_PPS0 (MTK_PIN_NO(39) | 3)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(39) | 4)</div><div class='add'>+#define PINMUX_GPIO39__FUNC_DBG_MON_B12 (MTK_PIN_NO(39) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO40__FUNC_GPIO40 (MTK_PIN_NO(40) | 0)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_I2SIN6_0_BCK (MTK_PIN_NO(40) | 1)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_SPI4_B_CLK (MTK_PIN_NO(40) | 3)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_UCTS2 (MTK_PIN_NO(40) | 4)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_CCU1_UTXD (MTK_PIN_NO(40) | 5)</div><div class='add'>+#define PINMUX_GPIO40__FUNC_DBG_MON_B13 (MTK_PIN_NO(40) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO41__FUNC_GPIO41 (MTK_PIN_NO(41) | 0)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_I2SIN6_0_LRCK (MTK_PIN_NO(41) | 1)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_SPI4_B_CSB (MTK_PIN_NO(41) | 3)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_URTS2 (MTK_PIN_NO(41) | 4)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_CCU1_URXD (MTK_PIN_NO(41) | 5)</div><div class='add'>+#define PINMUX_GPIO41__FUNC_DBG_MON_B14 (MTK_PIN_NO(41) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO42__FUNC_GPIO42 (MTK_PIN_NO(42) | 0)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_I2SIN6_0_DI (MTK_PIN_NO(42) | 1)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_SPI4_B_MI (MTK_PIN_NO(42) | 3)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_URXD2 (MTK_PIN_NO(42) | 4)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_CCU1_URTS (MTK_PIN_NO(42) | 5)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_MD32_0_RXD (MTK_PIN_NO(42) | 6)</div><div class='add'>+#define PINMUX_GPIO42__FUNC_DBG_MON_B15 (MTK_PIN_NO(42) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO43__FUNC_GPIO43 (MTK_PIN_NO(43) | 0)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_I2SOUT6_0_DO (MTK_PIN_NO(43) | 1)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_SPI4_B_MO (MTK_PIN_NO(43) | 3)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_UTXD2 (MTK_PIN_NO(43) | 4)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_CCU1_UCTS (MTK_PIN_NO(43) | 5)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_MD32_0_TXD (MTK_PIN_NO(43) | 6)</div><div class='add'>+#define PINMUX_GPIO43__FUNC_DBG_MON_B16 (MTK_PIN_NO(43) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO44__FUNC_GPIO44 (MTK_PIN_NO(44) | 0)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(44) | 1)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_SPI3_A_CLK (MTK_PIN_NO(44) | 3)</div><div class='add'>+#define PINMUX_GPIO44__FUNC_TP_GPIO10_AO (MTK_PIN_NO(44) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO45__FUNC_GPIO45 (MTK_PIN_NO(45) | 0)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(45) | 1)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_DSI2_HSYNC (MTK_PIN_NO(45) | 2)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_SPI3_A_CSB (MTK_PIN_NO(45) | 3)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_PWM_VLP (MTK_PIN_NO(45) | 4)</div><div class='add'>+#define PINMUX_GPIO45__FUNC_TP_GPIO11_AO (MTK_PIN_NO(45) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO46__FUNC_GPIO46 (MTK_PIN_NO(46) | 0)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_SCP_SCL4 (MTK_PIN_NO(46) | 1)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_PWM_VLP (MTK_PIN_NO(46) | 2)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_SCP_ILDO_DTEST1_VLP (MTK_PIN_NO(46) | 4)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(46) | 5)</div><div class='add'>+#define PINMUX_GPIO46__FUNC_TP_GPIO0_AO (MTK_PIN_NO(46) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO47__FUNC_GPIO47 (MTK_PIN_NO(47) | 0)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_SCP_SDA4 (MTK_PIN_NO(47) | 1)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_SCP_ILDO_DTEST2_VLP (MTK_PIN_NO(47) | 4)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(47) | 5)</div><div class='add'>+#define PINMUX_GPIO47__FUNC_TP_GPIO1_AO (MTK_PIN_NO(47) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO48__FUNC_GPIO48 (MTK_PIN_NO(48) | 0)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_SCP_SCL5 (MTK_PIN_NO(48) | 1)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_PWM_VLP (MTK_PIN_NO(48) | 2)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_CCU0_UTXD (MTK_PIN_NO(48) | 3)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_SCP_ILDO_DTEST3_VLP (MTK_PIN_NO(48) | 4)</div><div class='add'>+#define PINMUX_GPIO48__FUNC_TP_GPIO2_AO (MTK_PIN_NO(48) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO49__FUNC_GPIO49 (MTK_PIN_NO(49) | 0)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_SCP_SDA5 (MTK_PIN_NO(49) | 1)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_CCU0_URXD (MTK_PIN_NO(49) | 3)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_SCP_ILDO_DTEST4_VLP (MTK_PIN_NO(49) | 4)</div><div class='add'>+#define PINMUX_GPIO49__FUNC_TP_GPIO3_AO (MTK_PIN_NO(49) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO50__FUNC_GPIO50 (MTK_PIN_NO(50) | 0)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_SCP_SCL6 (MTK_PIN_NO(50) | 1)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_PWM_VLP (MTK_PIN_NO(50) | 2)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_CCU0_URTS (MTK_PIN_NO(50) | 3)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_DSI_HSYNC (MTK_PIN_NO(50) | 4)</div><div class='add'>+#define PINMUX_GPIO50__FUNC_TP_GPIO4_AO (MTK_PIN_NO(50) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO51__FUNC_GPIO51 (MTK_PIN_NO(51) | 0)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_SCP_SDA6 (MTK_PIN_NO(51) | 1)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_CCU0_UCTS (MTK_PIN_NO(51) | 3)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_DSI1_HSYNC (MTK_PIN_NO(51) | 4)</div><div class='add'>+#define PINMUX_GPIO51__FUNC_TP_GPIO5_AO (MTK_PIN_NO(51) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO52__FUNC_GPIO52 (MTK_PIN_NO(52) | 0)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_SCP_SCL1 (MTK_PIN_NO(52) | 1)</div><div class='add'>+#define PINMUX_GPIO52__FUNC_TDM_DATA2 (MTK_PIN_NO(52) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO53__FUNC_GPIO53 (MTK_PIN_NO(53) | 0)</div><div class='add'>+#define PINMUX_GPIO53__FUNC_SCP_SDA1 (MTK_PIN_NO(53) | 1)</div><div class='add'>+#define PINMUX_GPIO53__FUNC_TDM_DATA3 (MTK_PIN_NO(53) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO54__FUNC_GPIO54 (MTK_PIN_NO(54) | 0)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(54) | 1)</div><div class='add'>+#define PINMUX_GPIO54__FUNC_TDM_MCK (MTK_PIN_NO(54) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO55__FUNC_GPIO55 (MTK_PIN_NO(55) | 0)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_AUD_CLK_MISO (MTK_PIN_NO(55) | 1)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_I2SOUT2_BCK (MTK_PIN_NO(55) | 2)</div><div class='add'>+#define PINMUX_GPIO55__FUNC_TDM_BCK (MTK_PIN_NO(55) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO56__FUNC_GPIO56 (MTK_PIN_NO(56) | 0)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(56) | 1)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_I2SOUT2_LRCK (MTK_PIN_NO(56) | 2)</div><div class='add'>+#define PINMUX_GPIO56__FUNC_TDM_LRCK (MTK_PIN_NO(56) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO57__FUNC_GPIO57 (MTK_PIN_NO(57) | 0)</div><div class='add'>+#define PINMUX_GPIO57__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(57) | 1)</div><div class='add'>+#define PINMUX_GPIO57__FUNC_I2SOUT2_DO (MTK_PIN_NO(57) | 2)</div><div class='add'>+#define PINMUX_GPIO57__FUNC_TDM_DATA0 (MTK_PIN_NO(57) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO58__FUNC_GPIO58 (MTK_PIN_NO(58) | 0)</div><div class='add'>+#define PINMUX_GPIO58__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(58) | 1)</div><div class='add'>+#define PINMUX_GPIO58__FUNC_TDM_DATA1 (MTK_PIN_NO(58) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO59__FUNC_GPIO59 (MTK_PIN_NO(59) | 0)</div><div class='add'>+#define PINMUX_GPIO59__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(59) | 1)</div><div class='add'>+#define PINMUX_GPIO59__FUNC_I2SIN1_BCK (MTK_PIN_NO(59) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO60__FUNC_GPIO60 (MTK_PIN_NO(60) | 0)</div><div class='add'>+#define PINMUX_GPIO60__FUNC_KPCOL0 (MTK_PIN_NO(60) | 1)</div><div class='add'>+#define PINMUX_GPIO60__FUNC_TP_GPIO13_AO (MTK_PIN_NO(60) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO61__FUNC_GPIO61 (MTK_PIN_NO(61) | 0)</div><div class='add'>+#define PINMUX_GPIO61__FUNC_MCU_M_PMIC_POC_I (MTK_PIN_NO(61) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO62__FUNC_GPIO62 (MTK_PIN_NO(62) | 0)</div><div class='add'>+#define PINMUX_GPIO62__FUNC_MCU_B_PMIC_POC_I (MTK_PIN_NO(62) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO63__FUNC_GPIO63 (MTK_PIN_NO(63) | 0)</div><div class='add'>+#define PINMUX_GPIO63__FUNC_MFG_PMIC_POC_I (MTK_PIN_NO(63) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO64__FUNC_GPIO64 (MTK_PIN_NO(64) | 0)</div><div class='add'>+#define PINMUX_GPIO64__FUNC_PRE_UVLO (MTK_PIN_NO(64) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO65__FUNC_GPIO65 (MTK_PIN_NO(65) | 0)</div><div class='add'>+#define PINMUX_GPIO65__FUNC_DPM2PMIC (MTK_PIN_NO(65) | 1)</div><div class='add'>+#define PINMUX_GPIO65__FUNC_SRCLKENA1 (MTK_PIN_NO(65) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO66__FUNC_GPIO66 (MTK_PIN_NO(66) | 0)</div><div class='add'>+#define PINMUX_GPIO66__FUNC_WATCHDOG (MTK_PIN_NO(66) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO67__FUNC_GPIO67 (MTK_PIN_NO(67) | 0)</div><div class='add'>+#define PINMUX_GPIO67__FUNC_SRCLKENA0 (MTK_PIN_NO(67) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO68__FUNC_GPIO68 (MTK_PIN_NO(68) | 0)</div><div class='add'>+#define PINMUX_GPIO68__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(68) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO69__FUNC_GPIO69 (MTK_PIN_NO(69) | 0)</div><div class='add'>+#define PINMUX_GPIO69__FUNC_RTC32K_CK (MTK_PIN_NO(69) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO70__FUNC_GPIO70 (MTK_PIN_NO(70) | 0)</div><div class='add'>+#define PINMUX_GPIO70__FUNC_CMFLASH0 (MTK_PIN_NO(70) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO71__FUNC_GPIO71 (MTK_PIN_NO(71) | 0)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO72__FUNC_GPIO72 (MTK_PIN_NO(72) | 0)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO73__FUNC_GPIO73 (MTK_PIN_NO(73) | 0)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO74__FUNC_GPIO74 (MTK_PIN_NO(74) | 0)</div><div class='add'>+#define PINMUX_GPIO74__FUNC_DCXO_FPM_LPM (MTK_PIN_NO(74) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO75__FUNC_GPIO75 (MTK_PIN_NO(75) | 0)</div><div class='add'>+#define PINMUX_GPIO75__FUNC_SPMI_M_SCL (MTK_PIN_NO(75) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO76__FUNC_GPIO76 (MTK_PIN_NO(76) | 0)</div><div class='add'>+#define PINMUX_GPIO76__FUNC_SPMI_M_SDA (MTK_PIN_NO(76) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO77__FUNC_GPIO77 (MTK_PIN_NO(77) | 0)</div><div class='add'>+#define PINMUX_GPIO77__FUNC_SPMI_P_SCL (MTK_PIN_NO(77) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO78__FUNC_GPIO78 (MTK_PIN_NO(78) | 0)</div><div class='add'>+#define PINMUX_GPIO78__FUNC_SPMI_P_SDA (MTK_PIN_NO(78) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO79__FUNC_GPIO79 (MTK_PIN_NO(79) | 0)</div><div class='add'>+#define PINMUX_GPIO79__FUNC_CMMCLK0 (MTK_PIN_NO(79) | 1)</div><div class='add'>+#define PINMUX_GPIO79__FUNC_MD_INT4 (MTK_PIN_NO(79) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO80__FUNC_GPIO80 (MTK_PIN_NO(80) | 0)</div><div class='add'>+#define PINMUX_GPIO80__FUNC_CMMCLK1 (MTK_PIN_NO(80) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO81__FUNC_GPIO81 (MTK_PIN_NO(81) | 0)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_SCP_SPI0_CK (MTK_PIN_NO(81) | 1)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_SPI6_B_CLK (MTK_PIN_NO(81) | 2)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_PWM_VLP (MTK_PIN_NO(81) | 3)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_I2SOUT5_BCK (MTK_PIN_NO(81) | 4)</div><div class='add'>+#define PINMUX_GPIO81__FUNC_TP_GPIO0_AO (MTK_PIN_NO(81) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO82__FUNC_GPIO82 (MTK_PIN_NO(82) | 0)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_SCP_SPI0_CS (MTK_PIN_NO(82) | 1)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_SPI6_B_CSB (MTK_PIN_NO(82) | 2)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_I2SOUT5_LRCK (MTK_PIN_NO(82) | 4)</div><div class='add'>+#define PINMUX_GPIO82__FUNC_TP_GPIO1_AO (MTK_PIN_NO(82) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO83__FUNC_GPIO83 (MTK_PIN_NO(83) | 0)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_SCP_SPI0_MO (MTK_PIN_NO(83) | 1)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_SPI6_B_MO (MTK_PIN_NO(83) | 2)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_I2SOUT5_DATA0 (MTK_PIN_NO(83) | 4)</div><div class='add'>+#define PINMUX_GPIO83__FUNC_TP_GPIO2_AO (MTK_PIN_NO(83) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO84__FUNC_GPIO84 (MTK_PIN_NO(84) | 0)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_SCP_SPI0_MI (MTK_PIN_NO(84) | 1)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_SPI6_B_MI (MTK_PIN_NO(84) | 2)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_I2SOUT5_DATA1 (MTK_PIN_NO(84) | 4)</div><div class='add'>+#define PINMUX_GPIO84__FUNC_TP_GPIO3_AO (MTK_PIN_NO(84) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO85__FUNC_GPIO85 (MTK_PIN_NO(85) | 0)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_SCP_SPI1_CK (MTK_PIN_NO(85) | 1)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_SPI7_B_CLK (MTK_PIN_NO(85) | 2)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_I2SIN5_DATA0 (MTK_PIN_NO(85) | 4)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_PWM_VLP (MTK_PIN_NO(85) | 5)</div><div class='add'>+#define PINMUX_GPIO85__FUNC_TP_GPIO4_AO (MTK_PIN_NO(85) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO86__FUNC_GPIO86 (MTK_PIN_NO(86) | 0)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_SCP_SPI1_CS (MTK_PIN_NO(86) | 1)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_SPI7_B_CSB (MTK_PIN_NO(86) | 2)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_I2SIN5_DATA1 (MTK_PIN_NO(86) | 4)</div><div class='add'>+#define PINMUX_GPIO86__FUNC_TP_GPIO5_AO (MTK_PIN_NO(86) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO87__FUNC_GPIO87 (MTK_PIN_NO(87) | 0)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_SCP_SPI1_MO (MTK_PIN_NO(87) | 1)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_SPI7_B_MO (MTK_PIN_NO(87) | 2)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_I2SIN5_BCK (MTK_PIN_NO(87) | 4)</div><div class='add'>+#define PINMUX_GPIO87__FUNC_TP_GPIO6_AO (MTK_PIN_NO(87) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO88__FUNC_GPIO88 (MTK_PIN_NO(88) | 0)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_SCP_SPI1_MI (MTK_PIN_NO(88) | 1)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_SPI7_B_MI (MTK_PIN_NO(88) | 2)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_I2SIN5_LRCK (MTK_PIN_NO(88) | 4)</div><div class='add'>+#define PINMUX_GPIO88__FUNC_TP_GPIO7_AO (MTK_PIN_NO(88) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO89__FUNC_GPIO89 (MTK_PIN_NO(89) | 0)</div><div class='add'>+#define PINMUX_GPIO89__FUNC_DSI_TE (MTK_PIN_NO(89) | 1)</div><div class='add'>+#define PINMUX_GPIO89__FUNC_DSI1_TE (MTK_PIN_NO(89) | 2)</div><div class='add'>+#define PINMUX_GPIO89__FUNC_DBG_MON_B30 (MTK_PIN_NO(89) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO90__FUNC_GPIO90 (MTK_PIN_NO(90) | 0)</div><div class='add'>+#define PINMUX_GPIO90__FUNC_LCM_RST (MTK_PIN_NO(90) | 1)</div><div class='add'>+#define PINMUX_GPIO90__FUNC_LCM1_RST (MTK_PIN_NO(90) | 2)</div><div class='add'>+#define PINMUX_GPIO90__FUNC_DBG_MON_B31 (MTK_PIN_NO(90) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO91__FUNC_GPIO91 (MTK_PIN_NO(91) | 0)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_CMFLASH2 (MTK_PIN_NO(91) | 1)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_SF_D0 (MTK_PIN_NO(91) | 2)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_SRCLKENAI1 (MTK_PIN_NO(91) | 3)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_KPCOL2 (MTK_PIN_NO(91) | 5)</div><div class='add'>+#define PINMUX_GPIO91__FUNC_TP_GPIO11_AO (MTK_PIN_NO(91) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO92__FUNC_GPIO92 (MTK_PIN_NO(92) | 0)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_CMFLASH3 (MTK_PIN_NO(92) | 1)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_SF_D1 (MTK_PIN_NO(92) | 2)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_DISP_PWM1 (MTK_PIN_NO(92) | 4)</div><div class='add'>+#define PINMUX_GPIO92__FUNC_TP_GPIO12_AO (MTK_PIN_NO(92) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO93__FUNC_GPIO93 (MTK_PIN_NO(93) | 0)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_CMFLASH1 (MTK_PIN_NO(93) | 1)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_SF_D2 (MTK_PIN_NO(93) | 2)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_SRCLKENAI0 (MTK_PIN_NO(93) | 3)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_KPROW2 (MTK_PIN_NO(93) | 5)</div><div class='add'>+#define PINMUX_GPIO93__FUNC_TP_GPIO13_AO (MTK_PIN_NO(93) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO94__FUNC_GPIO94 (MTK_PIN_NO(94) | 0)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_I2S_MCK1 (MTK_PIN_NO(94) | 1)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_SF_D3 (MTK_PIN_NO(94) | 2)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(94) | 4)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_CLKM0_A (MTK_PIN_NO(94) | 5)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_TP_GPIO14_AO (MTK_PIN_NO(94) | 6)</div><div class='add'>+#define PINMUX_GPIO94__FUNC_DBG_MON_B18 (MTK_PIN_NO(94) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO95__FUNC_GPIO95 (MTK_PIN_NO(95) | 0)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_I2SIN1_BCK (MTK_PIN_NO(95) | 1)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_I2SIN4_BCK (MTK_PIN_NO(95) | 2)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_SPI6_A_CLK (MTK_PIN_NO(95) | 3)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_MD32_1_GPIO0 (MTK_PIN_NO(95) | 4)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_CLKM1_A (MTK_PIN_NO(95) | 5)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_TP_GPIO15_AO (MTK_PIN_NO(95) | 6)</div><div class='add'>+#define PINMUX_GPIO95__FUNC_DBG_MON_B19 (MTK_PIN_NO(95) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO96__FUNC_GPIO96 (MTK_PIN_NO(96) | 0)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_I2SIN1_LRCK (MTK_PIN_NO(96) | 1)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_I2SIN4_LRCK (MTK_PIN_NO(96) | 2)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_SPI6_A_CSB (MTK_PIN_NO(96) | 3)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_MD32_2_GPIO0 (MTK_PIN_NO(96) | 4)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_CLKM2_A (MTK_PIN_NO(96) | 5)</div><div class='add'>+#define PINMUX_GPIO96__FUNC_DBG_MON_B20 (MTK_PIN_NO(96) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO97__FUNC_GPIO97 (MTK_PIN_NO(97) | 0)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_I2SIN1_DI_A (MTK_PIN_NO(97) | 1)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_I2SIN4_DATA0 (MTK_PIN_NO(97) | 2)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_SPI6_A_MO (MTK_PIN_NO(97) | 3)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_MD32_3_GPIO0 (MTK_PIN_NO(97) | 4)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_CLKM3_A (MTK_PIN_NO(97) | 5)</div><div class='add'>+#define PINMUX_GPIO97__FUNC_DBG_MON_B21 (MTK_PIN_NO(97) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO98__FUNC_GPIO98 (MTK_PIN_NO(98) | 0)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_I2SOUT1_DO (MTK_PIN_NO(98) | 1)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_I2SOUT4_DATA0 (MTK_PIN_NO(98) | 2)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_SPI6_A_MI (MTK_PIN_NO(98) | 3)</div><div class='add'>+#define PINMUX_GPIO98__FUNC_DBG_MON_B22 (MTK_PIN_NO(98) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO99__FUNC_GPIO99 (MTK_PIN_NO(99) | 0)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_LCM2_RST (MTK_PIN_NO(99) | 2)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(99) | 3)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_SPU0_SCL (MTK_PIN_NO(99) | 4)</div><div class='add'>+#define PINMUX_GPIO99__FUNC_DBG_MON_B24 (MTK_PIN_NO(99) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO100__FUNC_GPIO100 (MTK_PIN_NO(100) | 0)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_DSI2_TE (MTK_PIN_NO(100) | 2)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_SPU0_SDA (MTK_PIN_NO(100) | 4)</div><div class='add'>+#define PINMUX_GPIO100__FUNC_DBG_MON_B25 (MTK_PIN_NO(100) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO101__FUNC_GPIO101 (MTK_PIN_NO(101) | 0)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SCL10 (MTK_PIN_NO(101) | 1)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SF_CS (MTK_PIN_NO(101) | 2)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SCP_DMIC1_CLK (MTK_PIN_NO(101) | 3)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_I2SIN5_DATA2 (MTK_PIN_NO(101) | 4)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_SCP_SCL_OIS (MTK_PIN_NO(101) | 5)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_TP_GPIO10_AO (MTK_PIN_NO(101) | 6)</div><div class='add'>+#define PINMUX_GPIO101__FUNC_DBG_MON_B28 (MTK_PIN_NO(101) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO102__FUNC_GPIO102 (MTK_PIN_NO(102) | 0)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SDA10 (MTK_PIN_NO(102) | 1)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SF_CK (MTK_PIN_NO(102) | 2)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SCP_DMIC1_DAT (MTK_PIN_NO(102) | 3)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_I2SIN5_DATA3 (MTK_PIN_NO(102) | 4)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_SCP_SDA_OIS (MTK_PIN_NO(102) | 5)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_TP_GPIO11_AO (MTK_PIN_NO(102) | 6)</div><div class='add'>+#define PINMUX_GPIO102__FUNC_DBG_MON_B29 (MTK_PIN_NO(102) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO103__FUNC_GPIO103 (MTK_PIN_NO(103) | 0)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_DISP_PWM (MTK_PIN_NO(103) | 1)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_DSI1_TE (MTK_PIN_NO(103) | 2)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_I2S_MCK0 (MTK_PIN_NO(103) | 5)</div><div class='add'>+#define PINMUX_GPIO103__FUNC_DBG_MON_B23 (MTK_PIN_NO(103) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO104__FUNC_GPIO104 (MTK_PIN_NO(104) | 0)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_SCL6 (MTK_PIN_NO(104) | 1)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_SPU1_SCL (MTK_PIN_NO(104) | 2)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(104) | 3)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_USB_DRVVBUS_2P (MTK_PIN_NO(104) | 4)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_I2S_MCK1 (MTK_PIN_NO(104) | 5)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_IDDIG_2P (MTK_PIN_NO(104) | 6)</div><div class='add'>+#define PINMUX_GPIO104__FUNC_DBG_MON_B26 (MTK_PIN_NO(104) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO105__FUNC_GPIO105 (MTK_PIN_NO(105) | 0)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SDA6 (MTK_PIN_NO(105) | 1)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_SPU1_SDA (MTK_PIN_NO(105) | 2)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_DISP_PWM2 (MTK_PIN_NO(105) | 3)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_VBUSVALID_2P (MTK_PIN_NO(105) | 4)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_I2S_MCK2 (MTK_PIN_NO(105) | 5)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_VBUSVALID_3P (MTK_PIN_NO(105) | 6)</div><div class='add'>+#define PINMUX_GPIO105__FUNC_DBG_MON_B27 (MTK_PIN_NO(105) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO106__FUNC_GPIO106 (MTK_PIN_NO(106) | 0)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SCP_SPI3_CK (MTK_PIN_NO(106) | 1)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_SPI3_B_CLK (MTK_PIN_NO(106) | 2)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_MD_UTXD0 (MTK_PIN_NO(106) | 3)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_TP_UTXD1_VLP (MTK_PIN_NO(106) | 4)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_CONN_BG_GPS_MCU_UART0_TXD (MTK_PIN_NO(106) | 5)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_TP_GPIO6_AO (MTK_PIN_NO(106) | 6)</div><div class='add'>+#define PINMUX_GPIO106__FUNC_DBG_MON_B0 (MTK_PIN_NO(106) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO107__FUNC_GPIO107 (MTK_PIN_NO(107) | 0)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_SCP_SPI3_CS (MTK_PIN_NO(107) | 1)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_SPI3_B_CSB (MTK_PIN_NO(107) | 2)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_MD_URXD0 (MTK_PIN_NO(107) | 3)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_TP_URXD1_VLP (MTK_PIN_NO(107) | 4)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_CONN_BG_GPS_MCU_UART0_RXD (MTK_PIN_NO(107) | 5)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_TP_GPIO7_AO (MTK_PIN_NO(107) | 6)</div><div class='add'>+#define PINMUX_GPIO107__FUNC_DBG_MON_B1 (MTK_PIN_NO(107) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO108__FUNC_GPIO108 (MTK_PIN_NO(108) | 0)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_SCP_SPI3_MO (MTK_PIN_NO(108) | 1)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_SPI3_B_MO (MTK_PIN_NO(108) | 2)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_MD_UTXD1 (MTK_PIN_NO(108) | 3)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_MD32PCM_UTXD_AO_VLP (MTK_PIN_NO(108) | 4)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_CONN_BG_GPS_MCU_UART1_TXD (MTK_PIN_NO(108) | 5)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_TP_GPIO8_AO (MTK_PIN_NO(108) | 6)</div><div class='add'>+#define PINMUX_GPIO108__FUNC_DBG_MON_B2 (MTK_PIN_NO(108) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO109__FUNC_GPIO109 (MTK_PIN_NO(109) | 0)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_SCP_SPI3_MI (MTK_PIN_NO(109) | 1)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_SPI3_B_MI (MTK_PIN_NO(109) | 2)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_MD_URXD1 (MTK_PIN_NO(109) | 3)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_MD32PCM_URXD_AO_VLP (MTK_PIN_NO(109) | 4)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_CONN_BG_GPS_MCU_UART1_RXD (MTK_PIN_NO(109) | 5)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_TP_GPIO9_AO (MTK_PIN_NO(109) | 6)</div><div class='add'>+#define PINMUX_GPIO109__FUNC_DBG_MON_B3 (MTK_PIN_NO(109) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO110__FUNC_GPIO110 (MTK_PIN_NO(110) | 0)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_SPI1_CLK (MTK_PIN_NO(110) | 1)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_PWM_0 (MTK_PIN_NO(110) | 2)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_MD_UCTS0 (MTK_PIN_NO(110) | 3)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_TP_UCTS1_VLP (MTK_PIN_NO(110) | 4)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_SPU0_GPIO_O (MTK_PIN_NO(110) | 6)</div><div class='add'>+#define PINMUX_GPIO110__FUNC_DBG_MON_B4 (MTK_PIN_NO(110) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO111__FUNC_GPIO111 (MTK_PIN_NO(111) | 0)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_SPI1_CSB (MTK_PIN_NO(111) | 1)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_PWM_1 (MTK_PIN_NO(111) | 2)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_MD_URTS0 (MTK_PIN_NO(111) | 3)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_TP_URTS1_VLP (MTK_PIN_NO(111) | 4)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_SPU0_GPIO_I (MTK_PIN_NO(111) | 6)</div><div class='add'>+#define PINMUX_GPIO111__FUNC_DBG_MON_B5 (MTK_PIN_NO(111) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO112__FUNC_GPIO112 (MTK_PIN_NO(112) | 0)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_SPI1_MO (MTK_PIN_NO(112) | 1)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_PWM_2 (MTK_PIN_NO(112) | 2)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_MD_UCTS1 (MTK_PIN_NO(112) | 3)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_SPU1_GPIO_O (MTK_PIN_NO(112) | 6)</div><div class='add'>+#define PINMUX_GPIO112__FUNC_DBG_MON_B6 (MTK_PIN_NO(112) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO113__FUNC_GPIO113 (MTK_PIN_NO(113) | 0)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_SPI1_MI (MTK_PIN_NO(113) | 1)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_PWM_3 (MTK_PIN_NO(113) | 2)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_MD_URTS1 (MTK_PIN_NO(113) | 3)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_SPU1_GPIO_I (MTK_PIN_NO(113) | 6)</div><div class='add'>+#define PINMUX_GPIO113__FUNC_DBG_MON_B7 (MTK_PIN_NO(113) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO114__FUNC_GPIO114 (MTK_PIN_NO(114) | 0)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_SPI0_SPU_CLK (MTK_PIN_NO(114) | 1)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_SPI4_A_CLK (MTK_PIN_NO(114) | 2)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_CONN_BG_GPS_MCU_DBG_UART_TXD (MTK_PIN_NO(114) | 5)</div><div class='add'>+#define PINMUX_GPIO114__FUNC_DBG_MON_B8 (MTK_PIN_NO(114) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO115__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_SPI0_SPU_CSB (MTK_PIN_NO(115) | 1)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_SPI4_A_CSB (MTK_PIN_NO(115) | 2)</div><div class='add'>+#define PINMUX_GPIO115__FUNC_DBG_MON_B9 (MTK_PIN_NO(115) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO116__FUNC_GPIO116 (MTK_PIN_NO(116) | 0)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_SPI0_SPU_MO (MTK_PIN_NO(116) | 1)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_SPI4_A_MO (MTK_PIN_NO(116) | 2)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_LCM1_RST (MTK_PIN_NO(116) | 3)</div><div class='add'>+#define PINMUX_GPIO116__FUNC_DBG_MON_B10 (MTK_PIN_NO(116) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO117__FUNC_GPIO117 (MTK_PIN_NO(117) | 0)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_SPI0_SPU_MI (MTK_PIN_NO(117) | 1)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_SPI4_A_MI (MTK_PIN_NO(117) | 2)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_DSI1_TE (MTK_PIN_NO(117) | 3)</div><div class='add'>+#define PINMUX_GPIO117__FUNC_DBG_MON_B11 (MTK_PIN_NO(117) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO118__FUNC_GPIO118 (MTK_PIN_NO(118) | 0)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_SPI5_CLK (MTK_PIN_NO(118) | 1)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_USB_DRVVBUS (MTK_PIN_NO(118) | 2)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_DP_TX_HPD (MTK_PIN_NO(118) | 3)</div><div class='add'>+#define PINMUX_GPIO118__FUNC_AD_ILDO_DTEST0 (MTK_PIN_NO(118) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO119__FUNC_GPIO119 (MTK_PIN_NO(119) | 0)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_SPI5_CSB (MTK_PIN_NO(119) | 1)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_VBUSVALID (MTK_PIN_NO(119) | 2)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_DP_OC_EN (MTK_PIN_NO(119) | 3)</div><div class='add'>+#define PINMUX_GPIO119__FUNC_AD_ILDO_DTEST1 (MTK_PIN_NO(119) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO120__FUNC_GPIO120 (MTK_PIN_NO(120) | 0)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_SPI5_MO (MTK_PIN_NO(120) | 1)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_LCM2_RST (MTK_PIN_NO(120) | 2)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_DP_RAUX_SBU1 (MTK_PIN_NO(120) | 3)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_AD_ILDO_DTEST2 (MTK_PIN_NO(120) | 4)</div><div class='add'>+#define PINMUX_GPIO120__FUNC_IDDIG_3P (MTK_PIN_NO(120) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO121__FUNC_GPIO121 (MTK_PIN_NO(121) | 0)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_SPI5_MI (MTK_PIN_NO(121) | 1)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_DSI2_TE (MTK_PIN_NO(121) | 2)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_DP_RAUX_SBU2 (MTK_PIN_NO(121) | 3)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_AD_ILDO_DTEST3 (MTK_PIN_NO(121) | 4)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_USB_DRVVBUS_3P (MTK_PIN_NO(121) | 6)</div><div class='add'>+#define PINMUX_GPIO121__FUNC_DBG_MON_B17 (MTK_PIN_NO(121) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO122__FUNC_GPIO122 (MTK_PIN_NO(122) | 0)</div><div class='add'>+#define PINMUX_GPIO122__FUNC_AP_GOOD (MTK_PIN_NO(122) | 1)</div><div class='add'>+#define PINMUX_GPIO122__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(122) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO123__FUNC_GPIO123 (MTK_PIN_NO(123) | 0)</div><div class='add'>+#define PINMUX_GPIO123__FUNC_SCL3 (MTK_PIN_NO(123) | 1)</div><div class='add'>+#define PINMUX_GPIO123__FUNC_I2SIN2_LRCK (MTK_PIN_NO(123) | 5)</div><div class='add'>+#define PINMUX_GPIO123__FUNC_TP_UTXD_MD_VCORE (MTK_PIN_NO(123) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO124__FUNC_GPIO124 (MTK_PIN_NO(124) | 0)</div><div class='add'>+#define PINMUX_GPIO124__FUNC_SDA3 (MTK_PIN_NO(124) | 1)</div><div class='add'>+#define PINMUX_GPIO124__FUNC_TP_URXD_MD_VCORE (MTK_PIN_NO(124) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO125__FUNC_GPIO125 (MTK_PIN_NO(125) | 0)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_MSDC1_CLK (MTK_PIN_NO(125) | 1)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(125) | 2)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_HFRP_JTAG0_TCK (MTK_PIN_NO(125) | 3)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_UDI_TCK (MTK_PIN_NO(125) | 4)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_CONN_BGF_DSP_L1_JCK (MTK_PIN_NO(125) | 5)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_SCP_JTAG_LITTLE_TCK_VLP (MTK_PIN_NO(125) | 6)</div><div class='add'>+#define PINMUX_GPIO125__FUNC_JTCK2_SEL1 (MTK_PIN_NO(125) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO126__FUNC_GPIO126 (MTK_PIN_NO(126) | 0)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_MSDC1_CMD (MTK_PIN_NO(126) | 1)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_HFRP_JTAG0_TMS (MTK_PIN_NO(126) | 3)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_UDI_TMS (MTK_PIN_NO(126) | 4)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_CONN_BGF_DSP_L1_JMS (MTK_PIN_NO(126) | 5)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_SCP_JTAG_LITTLE_TMS_VLP (MTK_PIN_NO(126) | 6)</div><div class='add'>+#define PINMUX_GPIO126__FUNC_JTMS2_SEL1 (MTK_PIN_NO(126) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO127__FUNC_GPIO127 (MTK_PIN_NO(127) | 0)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_MSDC1_DAT0 (MTK_PIN_NO(127) | 1)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(127) | 2)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_HFRP_JTAG0_TDI (MTK_PIN_NO(127) | 3)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_UDI_TDI_0 (MTK_PIN_NO(127) | 4)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_CONN_BGF_DSP_L1_JDI (MTK_PIN_NO(127) | 5)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_SCP_JTAG_LITTLE_TDI_VLP (MTK_PIN_NO(127) | 6)</div><div class='add'>+#define PINMUX_GPIO127__FUNC_JTDI2_SEL1 (MTK_PIN_NO(127) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO128__FUNC_GPIO128 (MTK_PIN_NO(128) | 0)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_MSDC1_DAT1 (MTK_PIN_NO(128) | 1)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(128) | 2)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_HFRP_JTAG0_TDO (MTK_PIN_NO(128) | 3)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_UDI_TDO_0 (MTK_PIN_NO(128) | 4)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_CONN_BGF_DSP_L1_JDO (MTK_PIN_NO(128) | 5)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_SCP_JTAG_LITTLE_TDO_VLP (MTK_PIN_NO(128) | 6)</div><div class='add'>+#define PINMUX_GPIO128__FUNC_JTDO2_SEL1 (MTK_PIN_NO(128) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO129__FUNC_GPIO129 (MTK_PIN_NO(129) | 0)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_MSDC1_DAT2 (MTK_PIN_NO(129) | 1)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_DSI2_HSYNC (MTK_PIN_NO(129) | 2)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_HFRP_JTAG0_TRSTN (MTK_PIN_NO(129) | 3)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_UDI_NTRST (MTK_PIN_NO(129) | 4)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_SCP_JTAG_LITTLE_TRSTN_VLP (MTK_PIN_NO(129) | 6)</div><div class='add'>+#define PINMUX_GPIO129__FUNC_JTRSTN2_SEL1 (MTK_PIN_NO(129) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO130__FUNC_GPIO130 (MTK_PIN_NO(130) | 0)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_MSDC1_DAT3 (MTK_PIN_NO(130) | 1)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_DSI3_HSYNC (MTK_PIN_NO(130) | 2)</div><div class='add'>+#define PINMUX_GPIO130__FUNC_CONN_BGF_DSP_L1_JINTP (MTK_PIN_NO(130) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO131__FUNC_GPIO131 (MTK_PIN_NO(131) | 0)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(131) | 1)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(131) | 2)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_MCUPM_JTAG_TDI (MTK_PIN_NO(131) | 3)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_CLKM0_A (MTK_PIN_NO(131) | 4)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_CONN_BGF_DSP_L5_JDI (MTK_PIN_NO(131) | 5)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_TSFDC_SCK (MTK_PIN_NO(131) | 6)</div><div class='add'>+#define PINMUX_GPIO131__FUNC_SCP_JTAG0_TDI_VCORE (MTK_PIN_NO(131) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO132__FUNC_GPIO132 (MTK_PIN_NO(132) | 0)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(132) | 1)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(132) | 2)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_MCUPM_JTAG_TMS (MTK_PIN_NO(132) | 3)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_CLKM1_B (MTK_PIN_NO(132) | 4)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_CONN_BGF_DSP_L5_JMS (MTK_PIN_NO(132) | 5)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_TSFDC_SDI (MTK_PIN_NO(132) | 6)</div><div class='add'>+#define PINMUX_GPIO132__FUNC_SCP_JTAG0_TMS_VCORE (MTK_PIN_NO(132) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO133__FUNC_GPIO133 (MTK_PIN_NO(133) | 0)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(133) | 1)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(133) | 2)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_MCUPM_JTAG_TDO (MTK_PIN_NO(133) | 3)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_CONN_BGF_DSP_L5_JDO (MTK_PIN_NO(133) | 5)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_TSFDC_SCF (MTK_PIN_NO(133) | 6)</div><div class='add'>+#define PINMUX_GPIO133__FUNC_SCP_JTAG0_TDO_VCORE (MTK_PIN_NO(133) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO134__FUNC_GPIO134 (MTK_PIN_NO(134) | 0)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(134) | 1)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(134) | 2)</div><div class='add'>+#define PINMUX_GPIO134__FUNC_TSFDC_26M (MTK_PIN_NO(134) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO135__FUNC_GPIO135 (MTK_PIN_NO(135) | 0)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(135) | 1)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(135) | 2)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_MCUPM_JTAG_TCK (MTK_PIN_NO(135) | 3)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_CONN_BGF_DSP_L5_JCK (MTK_PIN_NO(135) | 5)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_TSFDC_SDO (MTK_PIN_NO(135) | 6)</div><div class='add'>+#define PINMUX_GPIO135__FUNC_SCP_JTAG0_TCK_VCORE (MTK_PIN_NO(135) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO136__FUNC_GPIO136 (MTK_PIN_NO(136) | 0)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(136) | 1)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(136) | 2)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_MCUPM_JTAG_TRSTN (MTK_PIN_NO(136) | 3)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_CONN_BGF_DSP_L5_JINTP (MTK_PIN_NO(136) | 5)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_TSFDC_FOUT (MTK_PIN_NO(136) | 6)</div><div class='add'>+#define PINMUX_GPIO136__FUNC_SCP_JTAG0_TRSTN_VCORE (MTK_PIN_NO(136) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO137__FUNC_GPIO137 (MTK_PIN_NO(137) | 0)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_MIPI0_D_SCLK (MTK_PIN_NO(137) | 1)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_BPI_BUS16 (MTK_PIN_NO(137) | 2)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(137) | 4)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_SPM_JTAG_TRSTN_VCORE (MTK_PIN_NO(137) | 6)</div><div class='add'>+#define PINMUX_GPIO137__FUNC_DBG_MON_A0 (MTK_PIN_NO(137) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO138__FUNC_GPIO138 (MTK_PIN_NO(138) | 0)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_MIPI0_D_SDATA (MTK_PIN_NO(138) | 1)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_BPI_BUS17 (MTK_PIN_NO(138) | 2)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_PCM0_LRCK (MTK_PIN_NO(138) | 4)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_SPM_JTAG_TCK_VCORE (MTK_PIN_NO(138) | 6)</div><div class='add'>+#define PINMUX_GPIO138__FUNC_DBG_MON_A1 (MTK_PIN_NO(138) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO139__FUNC_GPIO139 (MTK_PIN_NO(139) | 0)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_MIPI1_D_SCLK (MTK_PIN_NO(139) | 1)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_BPI_BUS18 (MTK_PIN_NO(139) | 2)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_MD_GPS_BLANK (MTK_PIN_NO(139) | 4)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_SPM_JTAG_TMS_VCORE (MTK_PIN_NO(139) | 6)</div><div class='add'>+#define PINMUX_GPIO139__FUNC_DBG_MON_A2 (MTK_PIN_NO(139) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO140__FUNC_GPIO140 (MTK_PIN_NO(140) | 0)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_MIPI1_D_SDATA (MTK_PIN_NO(140) | 1)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_BPI_BUS19 (MTK_PIN_NO(140) | 2)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_MD_URXD1_CONN (MTK_PIN_NO(140) | 4)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_SPM_JTAG_TDO_VCORE (MTK_PIN_NO(140) | 6)</div><div class='add'>+#define PINMUX_GPIO140__FUNC_DBG_MON_A3 (MTK_PIN_NO(140) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO141__FUNC_GPIO141 (MTK_PIN_NO(141) | 0)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_MIPI2_D_SCLK (MTK_PIN_NO(141) | 1)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_BPI_BUS20 (MTK_PIN_NO(141) | 2)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(141) | 4)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_SPM_JTAG_TDI_VCORE (MTK_PIN_NO(141) | 6)</div><div class='add'>+#define PINMUX_GPIO141__FUNC_DBG_MON_A4 (MTK_PIN_NO(141) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO142__FUNC_GPIO142 (MTK_PIN_NO(142) | 0)</div><div class='add'>+#define PINMUX_GPIO142__FUNC_MIPI2_D_SDATA (MTK_PIN_NO(142) | 1)</div><div class='add'>+#define PINMUX_GPIO142__FUNC_BPI_BUS21 (MTK_PIN_NO(142) | 2)</div><div class='add'>+#define PINMUX_GPIO142__FUNC_SSPM_JTAG_TRSTN_VCORE (MTK_PIN_NO(142) | 6)</div><div class='add'>+#define PINMUX_GPIO142__FUNC_DBG_MON_A5 (MTK_PIN_NO(142) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO143__FUNC_GPIO143 (MTK_PIN_NO(143) | 0)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_MIPI3_D_SCLK (MTK_PIN_NO(143) | 1)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_BPI_BUS22 (MTK_PIN_NO(143) | 2)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_TP_UTXD_GNSS_VLP (MTK_PIN_NO(143) | 4)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(143) | 5)</div><div class='add'>+#define PINMUX_GPIO143__FUNC_SSPM_JTAG_TCK_VCORE (MTK_PIN_NO(143) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO144__FUNC_GPIO144 (MTK_PIN_NO(144) | 0)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_MIPI3_D_SDATA (MTK_PIN_NO(144) | 1)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_BPI_BUS23 (MTK_PIN_NO(144) | 2)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_TP_URXD_GNSS_VLP (MTK_PIN_NO(144) | 4)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_MD_URXD1_CONN (MTK_PIN_NO(144) | 5)</div><div class='add'>+#define PINMUX_GPIO144__FUNC_SSPM_JTAG_TMS_VCORE (MTK_PIN_NO(144) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO145__FUNC_GPIO145 (MTK_PIN_NO(145) | 0)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_BPI_BUS0 (MTK_PIN_NO(145) | 1)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_PCIE_WAKEN_1P (MTK_PIN_NO(145) | 4)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_SSPM_JTAG_TDO_VCORE (MTK_PIN_NO(145) | 6)</div><div class='add'>+#define PINMUX_GPIO145__FUNC_DBG_MON_A10 (MTK_PIN_NO(145) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO146__FUNC_GPIO146 (MTK_PIN_NO(146) | 0)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_BPI_BUS1 (MTK_PIN_NO(146) | 1)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_PCIE_PERSTN_1P (MTK_PIN_NO(146) | 4)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_SSPM_JTAG_TDI_VCORE (MTK_PIN_NO(146) | 6)</div><div class='add'>+#define PINMUX_GPIO146__FUNC_DBG_MON_A11 (MTK_PIN_NO(146) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO147__FUNC_GPIO147 (MTK_PIN_NO(147) | 0)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_BPI_BUS2 (MTK_PIN_NO(147) | 1)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(147) | 2)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_PCIE_CLKREQN_1P (MTK_PIN_NO(147) | 4)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_SCP_JTAG_LITTLE_TRSTN_VCORE (MTK_PIN_NO(147) | 6)</div><div class='add'>+#define PINMUX_GPIO147__FUNC_DBG_MON_A12 (MTK_PIN_NO(147) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_BPI_BUS3 (MTK_PIN_NO(148) | 1)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_AUD_DAC_26M_CLK (MTK_PIN_NO(148) | 2)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_TP_UTXD_MD_VLP (MTK_PIN_NO(148) | 4)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_TP_GPIO0_AO (MTK_PIN_NO(148) | 5)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_SCP_JTAG_LITTLE_TCK_VCORE (MTK_PIN_NO(148) | 6)</div><div class='add'>+#define PINMUX_GPIO148__FUNC_DBG_MON_A13 (MTK_PIN_NO(148) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_BPI_BUS4 (MTK_PIN_NO(149) | 1)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(149) | 2)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_TP_URXD_MD_VLP (MTK_PIN_NO(149) | 4)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_TP_GPIO1_AO (MTK_PIN_NO(149) | 5)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_SCP_JTAG_LITTLE_TMS_VCORE (MTK_PIN_NO(149) | 6)</div><div class='add'>+#define PINMUX_GPIO149__FUNC_DBG_MON_A14 (MTK_PIN_NO(149) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_BPI_BUS5 (MTK_PIN_NO(150) | 1)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_GPS_PPS0 (MTK_PIN_NO(150) | 2)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_TP_GPIO2_AO (MTK_PIN_NO(150) | 5)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_SCP_JTAG_LITTLE_TDO_VCORE (MTK_PIN_NO(150) | 6)</div><div class='add'>+#define PINMUX_GPIO150__FUNC_DBG_MON_A15 (MTK_PIN_NO(150) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_BPI_BUS6 (MTK_PIN_NO(151) | 1)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_GPS_PPS1 (MTK_PIN_NO(151) | 2)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_TP_GPIO3_AO (MTK_PIN_NO(151) | 5)</div><div class='add'>+#define PINMUX_GPIO151__FUNC_SCP_JTAG_LITTLE_TDI_VCORE (MTK_PIN_NO(151) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_BPI_BUS7 (MTK_PIN_NO(152) | 1)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_EDP_TX_HPD (MTK_PIN_NO(152) | 2)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_AGPS_SYNC (MTK_PIN_NO(152) | 5)</div><div class='add'>+#define PINMUX_GPIO152__FUNC_SSPM_UTXD_AO_VCORE (MTK_PIN_NO(152) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO153__FUNC_GPIO153 (MTK_PIN_NO(153) | 0)</div><div class='add'>+#define PINMUX_GPIO153__FUNC_MD_UCNT_A_TGL (MTK_PIN_NO(153) | 1)</div><div class='add'>+#define PINMUX_GPIO153__FUNC_TP_URTS1_VCORE (MTK_PIN_NO(153) | 6)</div><div class='add'>+#define PINMUX_GPIO153__FUNC_DBG_MON_A8 (MTK_PIN_NO(153) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO154__FUNC_GPIO154 (MTK_PIN_NO(154) | 0)</div><div class='add'>+#define PINMUX_GPIO154__FUNC_DIGRF_IRQ (MTK_PIN_NO(154) | 1)</div><div class='add'>+#define PINMUX_GPIO154__FUNC_TP_UCTS1_VCORE (MTK_PIN_NO(154) | 6)</div><div class='add'>+#define PINMUX_GPIO154__FUNC_DBG_MON_A9 (MTK_PIN_NO(154) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO155__FUNC_GPIO155 (MTK_PIN_NO(155) | 0)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_MIPI_M_SCLK (MTK_PIN_NO(155) | 1)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_UCTS2 (MTK_PIN_NO(155) | 4)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_TP_UTXD_CONSYS_VCORE (MTK_PIN_NO(155) | 6)</div><div class='add'>+#define PINMUX_GPIO155__FUNC_DBG_MON_A6 (MTK_PIN_NO(155) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO156__FUNC_GPIO156 (MTK_PIN_NO(156) | 0)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_MIPI_M_SDATA (MTK_PIN_NO(156) | 1)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_URTS2 (MTK_PIN_NO(156) | 4)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_TP_URXD_CONSYS_VCORE (MTK_PIN_NO(156) | 6)</div><div class='add'>+#define PINMUX_GPIO156__FUNC_DBG_MON_A7 (MTK_PIN_NO(156) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO157__FUNC_GPIO157 (MTK_PIN_NO(157) | 0)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_BPI_BUS8 (MTK_PIN_NO(157) | 1)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_UTXD2 (MTK_PIN_NO(157) | 4)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_CLKM0_A (MTK_PIN_NO(157) | 5)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_SSPM_URXD_AO_VCORE (MTK_PIN_NO(157) | 6)</div><div class='add'>+#define PINMUX_GPIO157__FUNC_DBG_MON_A16 (MTK_PIN_NO(157) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO158__FUNC_GPIO158 (MTK_PIN_NO(158) | 0)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_BPI_BUS9 (MTK_PIN_NO(158) | 1)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_URXD2 (MTK_PIN_NO(158) | 4)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_CLKM1_A (MTK_PIN_NO(158) | 5)</div><div class='add'>+#define PINMUX_GPIO158__FUNC_TP_UTXD1_VCORE (MTK_PIN_NO(158) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO159__FUNC_GPIO159 (MTK_PIN_NO(159) | 0)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_BPI_BUS10 (MTK_PIN_NO(159) | 1)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_MD_INT0 (MTK_PIN_NO(159) | 2)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_SRCLKENAI1 (MTK_PIN_NO(159) | 3)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_CLKM2_A (MTK_PIN_NO(159) | 5)</div><div class='add'>+#define PINMUX_GPIO159__FUNC_TP_URXD1_VCORE (MTK_PIN_NO(159) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO160__FUNC_GPIO160 (MTK_PIN_NO(160) | 0)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_UTXD0 (MTK_PIN_NO(160) | 1)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_MD_UTXD1 (MTK_PIN_NO(160) | 2)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(160) | 5)</div><div class='add'>+#define PINMUX_GPIO160__FUNC_CONN_BG_GPS_MCU_DBG_UART_TXD (MTK_PIN_NO(160) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO161__FUNC_GPIO161 (MTK_PIN_NO(161) | 0)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_URXD0 (MTK_PIN_NO(161) | 1)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_MD_URXD1 (MTK_PIN_NO(161) | 2)</div><div class='add'>+#define PINMUX_GPIO161__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(161) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO162__FUNC_GPIO162 (MTK_PIN_NO(162) | 0)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_UTXD1 (MTK_PIN_NO(162) | 1)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_MD_UTXD0 (MTK_PIN_NO(162) | 2)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_TP_UTXD1_VLP (MTK_PIN_NO(162) | 3)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_ADSP_UTXD0 (MTK_PIN_NO(162) | 4)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_SSPM_UTXD_AO_VLP (MTK_PIN_NO(162) | 5)</div><div class='add'>+#define PINMUX_GPIO162__FUNC_HFRP_UTXD1 (MTK_PIN_NO(162) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO163__FUNC_GPIO163 (MTK_PIN_NO(163) | 0)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_URXD1 (MTK_PIN_NO(163) | 1)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_MD_URXD0 (MTK_PIN_NO(163) | 2)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_TP_URXD1_VLP (MTK_PIN_NO(163) | 3)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_ADSP_URXD0 (MTK_PIN_NO(163) | 4)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_SSPM_URXD_AO_VLP (MTK_PIN_NO(163) | 5)</div><div class='add'>+#define PINMUX_GPIO163__FUNC_HFRP_URXD1 (MTK_PIN_NO(163) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO164__FUNC_GPIO164 (MTK_PIN_NO(164) | 0)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_SCP_SCL0 (MTK_PIN_NO(164) | 1)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_TP_GPIO0_AO (MTK_PIN_NO(164) | 6)</div><div class='add'>+#define PINMUX_GPIO164__FUNC_DBG_MON_A22 (MTK_PIN_NO(164) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO165__FUNC_GPIO165 (MTK_PIN_NO(165) | 0)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_SCP_SDA0 (MTK_PIN_NO(165) | 1)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_TP_GPIO1_AO (MTK_PIN_NO(165) | 6)</div><div class='add'>+#define PINMUX_GPIO165__FUNC_DBG_MON_A23 (MTK_PIN_NO(165) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO166__FUNC_GPIO166 (MTK_PIN_NO(166) | 0)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_SCP_SCL2 (MTK_PIN_NO(166) | 1)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_TP_GPIO2_AO (MTK_PIN_NO(166) | 6)</div><div class='add'>+#define PINMUX_GPIO166__FUNC_DBG_MON_A24 (MTK_PIN_NO(166) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO167__FUNC_GPIO167 (MTK_PIN_NO(167) | 0)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_SCP_SDA2 (MTK_PIN_NO(167) | 1)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_TP_GPIO3_AO (MTK_PIN_NO(167) | 6)</div><div class='add'>+#define PINMUX_GPIO167__FUNC_DBG_MON_A25 (MTK_PIN_NO(167) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO168__FUNC_GPIO168 (MTK_PIN_NO(168) | 0)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_SCP_SPI2_CK (MTK_PIN_NO(168) | 1)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_SPI2_B_CLK (MTK_PIN_NO(168) | 2)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_PWM_VLP (MTK_PIN_NO(168) | 3)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_SCP_SCL2 (MTK_PIN_NO(168) | 4)</div><div class='add'>+#define PINMUX_GPIO168__FUNC_DBG_MON_A26 (MTK_PIN_NO(168) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO169__FUNC_GPIO169 (MTK_PIN_NO(169) | 0)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_SCP_SPI2_CS (MTK_PIN_NO(169) | 1)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_SPI2_B_CSB (MTK_PIN_NO(169) | 2)</div><div class='add'>+#define PINMUX_GPIO169__FUNC_DBG_MON_A27 (MTK_PIN_NO(169) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO170__FUNC_GPIO170 (MTK_PIN_NO(170) | 0)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SCP_SPI2_MO (MTK_PIN_NO(170) | 1)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SPI2_B_MO (MTK_PIN_NO(170) | 2)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_SCP_SDA2 (MTK_PIN_NO(170) | 4)</div><div class='add'>+#define PINMUX_GPIO170__FUNC_DBG_MON_A28 (MTK_PIN_NO(170) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO171__FUNC_GPIO171 (MTK_PIN_NO(171) | 0)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_SCP_SPI2_MI (MTK_PIN_NO(171) | 1)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_SPI2_B_MI (MTK_PIN_NO(171) | 2)</div><div class='add'>+#define PINMUX_GPIO171__FUNC_DBG_MON_A29 (MTK_PIN_NO(171) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO172__FUNC_GPIO172 (MTK_PIN_NO(172) | 0)</div><div class='add'>+#define PINMUX_GPIO172__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(172) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO173__FUNC_GPIO173 (MTK_PIN_NO(173) | 0)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_CMFLASH3 (MTK_PIN_NO(173) | 1)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_PWM_3 (MTK_PIN_NO(173) | 2)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_MD_GPS_L5_BLANK (MTK_PIN_NO(173) | 3)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_CLKM1_A (MTK_PIN_NO(173) | 4)</div><div class='add'>+#define PINMUX_GPIO173__FUNC_DBG_MON_A31 (MTK_PIN_NO(173) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO174__FUNC_GPIO174 (MTK_PIN_NO(174) | 0)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_CMFLASH0 (MTK_PIN_NO(174) | 1)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_PWM_0 (MTK_PIN_NO(174) | 2)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_VBUSVALID_1P (MTK_PIN_NO(174) | 3)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_MD32_2_RXD (MTK_PIN_NO(174) | 4)</div><div class='add'>+#define PINMUX_GPIO174__FUNC_DISP_PWM3 (MTK_PIN_NO(174) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO175__FUNC_GPIO175 (MTK_PIN_NO(175) | 0)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_CMFLASH1 (MTK_PIN_NO(175) | 1)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_PWM_1 (MTK_PIN_NO(175) | 2)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_EDP_TX_HPD (MTK_PIN_NO(175) | 3)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_MD32_2_TXD (MTK_PIN_NO(175) | 4)</div><div class='add'>+#define PINMUX_GPIO175__FUNC_DISP_PWM4 (MTK_PIN_NO(175) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO176__FUNC_GPIO176 (MTK_PIN_NO(176) | 0)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_SCL5 (MTK_PIN_NO(176) | 1)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_LCM3_RST (MTK_PIN_NO(176) | 2)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_MD_URXD1_CONN (MTK_PIN_NO(176) | 4)</div><div class='add'>+#define PINMUX_GPIO176__FUNC_TP_UTXD_GNSS_VCORE (MTK_PIN_NO(176) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO177__FUNC_GPIO177 (MTK_PIN_NO(177) | 0)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_SDA5 (MTK_PIN_NO(177) | 1)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_DSI3_TE (MTK_PIN_NO(177) | 2)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_MD_UTXD1_CONN (MTK_PIN_NO(177) | 4)</div><div class='add'>+#define PINMUX_GPIO177__FUNC_TP_URXD_GNSS_VCORE (MTK_PIN_NO(177) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO178__FUNC_GPIO178 (MTK_PIN_NO(178) | 0)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_DMIC_CLK (MTK_PIN_NO(178) | 1)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_SCP_DMIC_CLK (MTK_PIN_NO(178) | 2)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_SRCLKENAI0 (MTK_PIN_NO(178) | 3)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_CLKM2_B (MTK_PIN_NO(178) | 4)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_TP_GPIO7_AO (MTK_PIN_NO(178) | 5)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_SPU1_UTX (MTK_PIN_NO(178) | 6)</div><div class='add'>+#define PINMUX_GPIO178__FUNC_DAP_SONIC_SWCK (MTK_PIN_NO(178) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO179__FUNC_GPIO179 (MTK_PIN_NO(179) | 0)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_DMIC_DAT (MTK_PIN_NO(179) | 1)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_SCP_DMIC_DAT (MTK_PIN_NO(179) | 2)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_SRCLKENAI1 (MTK_PIN_NO(179) | 3)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_CLKM3_B (MTK_PIN_NO(179) | 4)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_TP_GPIO8_AO (MTK_PIN_NO(179) | 5)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_SPU1_URX (MTK_PIN_NO(179) | 6)</div><div class='add'>+#define PINMUX_GPIO179__FUNC_DAP_SONIC_SWD (MTK_PIN_NO(179) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO180__FUNC_GPIO180 (MTK_PIN_NO(180) | 0)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_IDDIG_1P (MTK_PIN_NO(180) | 1)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_CMVREF0 (MTK_PIN_NO(180) | 2)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_GPS_PPS1 (MTK_PIN_NO(180) | 3)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(180) | 4)</div><div class='add'>+#define PINMUX_GPIO180__FUNC_DISP_PWM1 (MTK_PIN_NO(180) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_USB_DRVVBUS_1P (MTK_PIN_NO(181) | 1)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_CMVREF1 (MTK_PIN_NO(181) | 2)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_MFG_EB_JTAG_TRSTN (MTK_PIN_NO(181) | 3)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_ADSP_JTAG1_TRSTN (MTK_PIN_NO(181) | 4)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_HFRP_JTAG1_TRSTN (MTK_PIN_NO(181) | 5)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_SPU1_NTRST (MTK_PIN_NO(181) | 6)</div><div class='add'>+#define PINMUX_GPIO181__FUNC_CONN_BG_GPS_MCU_TRST_B (MTK_PIN_NO(181) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO182__FUNC_GPIO182 (MTK_PIN_NO(182) | 0)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_SCL11 (MTK_PIN_NO(182) | 1)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_CMVREF2 (MTK_PIN_NO(182) | 2)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_MFG_EB_JTAG_TCK (MTK_PIN_NO(182) | 3)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_ADSP_JTAG1_TCK (MTK_PIN_NO(182) | 4)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_HFRP_JTAG1_TCK (MTK_PIN_NO(182) | 5)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_SPU1_TCK (MTK_PIN_NO(182) | 6)</div><div class='add'>+#define PINMUX_GPIO182__FUNC_CONN_BG_GPS_MCU_TCK (MTK_PIN_NO(182) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO183__FUNC_GPIO183 (MTK_PIN_NO(183) | 0)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_SDA11 (MTK_PIN_NO(183) | 1)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_CMVREF3 (MTK_PIN_NO(183) | 2)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_MFG_EB_JTAG_TMS (MTK_PIN_NO(183) | 3)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_ADSP_JTAG1_TMS (MTK_PIN_NO(183) | 4)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_HFRP_JTAG1_TMS (MTK_PIN_NO(183) | 5)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_SPU1_TMS (MTK_PIN_NO(183) | 6)</div><div class='add'>+#define PINMUX_GPIO183__FUNC_CONN_BG_GPS_MCU_TMS (MTK_PIN_NO(183) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO184__FUNC_GPIO184 (MTK_PIN_NO(184) | 0)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_SCL12 (MTK_PIN_NO(184) | 1)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_CMVREF4 (MTK_PIN_NO(184) | 2)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_MFG_EB_JTAG_TDO (MTK_PIN_NO(184) | 3)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_ADSP_JTAG1_TDO (MTK_PIN_NO(184) | 4)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_HFRP_JTAG1_TDO (MTK_PIN_NO(184) | 5)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_SPU1_TDO (MTK_PIN_NO(184) | 6)</div><div class='add'>+#define PINMUX_GPIO184__FUNC_CONN_BG_GPS_MCU_TDO (MTK_PIN_NO(184) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO185__FUNC_GPIO185 (MTK_PIN_NO(185) | 0)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_SDA12 (MTK_PIN_NO(185) | 1)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_CMVREF5 (MTK_PIN_NO(185) | 2)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_MFG_EB_JTAG_TDI (MTK_PIN_NO(185) | 3)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_ADSP_JTAG1_TDI (MTK_PIN_NO(185) | 4)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_HFRP_JTAG1_TDI (MTK_PIN_NO(185) | 5)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_SPU1_TDI (MTK_PIN_NO(185) | 6)</div><div class='add'>+#define PINMUX_GPIO185__FUNC_CONN_BG_GPS_MCU_TDI (MTK_PIN_NO(185) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO186__FUNC_GPIO186 (MTK_PIN_NO(186) | 0)</div><div class='add'>+#define PINMUX_GPIO186__FUNC_MD_GPS_L1_BLANK (MTK_PIN_NO(186) | 1)</div><div class='add'>+#define PINMUX_GPIO186__FUNC_PMSR_SMAP (MTK_PIN_NO(186) | 2)</div><div class='add'>+#define PINMUX_GPIO186__FUNC_TP_GPIO2_AO (MTK_PIN_NO(186) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO187__FUNC_GPIO187 (MTK_PIN_NO(187) | 0)</div><div class='add'>+#define PINMUX_GPIO187__FUNC_MD_GPS_L5_BLANK (MTK_PIN_NO(187) | 1)</div><div class='add'>+#define PINMUX_GPIO187__FUNC_TP_GPIO4_AO (MTK_PIN_NO(187) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO188__FUNC_GPIO188 (MTK_PIN_NO(188) | 0)</div><div class='add'>+#define PINMUX_GPIO188__FUNC_SCL2 (MTK_PIN_NO(188) | 1)</div><div class='add'>+#define PINMUX_GPIO188__FUNC_SCP_SCL8 (MTK_PIN_NO(188) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO189__FUNC_GPIO189 (MTK_PIN_NO(189) | 0)</div><div class='add'>+#define PINMUX_GPIO189__FUNC_SDA2 (MTK_PIN_NO(189) | 1)</div><div class='add'>+#define PINMUX_GPIO189__FUNC_SCP_SDA8 (MTK_PIN_NO(189) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO190__FUNC_GPIO190 (MTK_PIN_NO(190) | 0)</div><div class='add'>+#define PINMUX_GPIO190__FUNC_SCL4 (MTK_PIN_NO(190) | 1)</div><div class='add'>+#define PINMUX_GPIO190__FUNC_SCP_SCL9 (MTK_PIN_NO(190) | 2)</div><div class='add'>+#define PINMUX_GPIO190__FUNC_UDI_TDI_6 (MTK_PIN_NO(190) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO191__FUNC_GPIO191 (MTK_PIN_NO(191) | 0)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_SDA4 (MTK_PIN_NO(191) | 1)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_SCP_SDA9 (MTK_PIN_NO(191) | 2)</div><div class='add'>+#define PINMUX_GPIO191__FUNC_UDI_TDI_7 (MTK_PIN_NO(191) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO192__FUNC_GPIO192 (MTK_PIN_NO(192) | 0)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_CMMCLK2 (MTK_PIN_NO(192) | 1)</div><div class='add'>+#define PINMUX_GPIO192__FUNC_MD32_3_RXD (MTK_PIN_NO(192) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0)</div><div class='add'>+#define PINMUX_GPIO193__FUNC_CLKM0_B (MTK_PIN_NO(193) | 3)</div><div class='add'>+#define PINMUX_GPIO193__FUNC_MD32_3_TXD (MTK_PIN_NO(193) | 4)</div><div class='add'>+#define PINMUX_GPIO193__FUNC_UDI_TDO_7 (MTK_PIN_NO(193) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO194__FUNC_GPIO194 (MTK_PIN_NO(194) | 0)</div><div class='add'>+#define PINMUX_GPIO194__FUNC_SCL7 (MTK_PIN_NO(194) | 1)</div><div class='add'>+#define PINMUX_GPIO194__FUNC_MD32_3_GPIO0 (MTK_PIN_NO(194) | 2)</div><div class='add'>+#define PINMUX_GPIO194__FUNC_CLKM2_B (MTK_PIN_NO(194) | 3)</div><div class='add'>+#define PINMUX_GPIO194__FUNC_UDI_TDI_2 (MTK_PIN_NO(194) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO195__FUNC_GPIO195 (MTK_PIN_NO(195) | 0)</div><div class='add'>+#define PINMUX_GPIO195__FUNC_SDA7 (MTK_PIN_NO(195) | 1)</div><div class='add'>+#define PINMUX_GPIO195__FUNC_CLKM3_B (MTK_PIN_NO(195) | 3)</div><div class='add'>+#define PINMUX_GPIO195__FUNC_UDI_TDI_3 (MTK_PIN_NO(195) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO196__FUNC_GPIO196 (MTK_PIN_NO(196) | 0)</div><div class='add'>+#define PINMUX_GPIO196__FUNC_CMMCLK3 (MTK_PIN_NO(196) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO197__FUNC_GPIO197 (MTK_PIN_NO(197) | 0)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_CLKM1_B (MTK_PIN_NO(197) | 3)</div><div class='add'>+#define PINMUX_GPIO197__FUNC_UDI_TDI_1 (MTK_PIN_NO(197) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO198__FUNC_GPIO198 (MTK_PIN_NO(198) | 0)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_SCL8 (MTK_PIN_NO(198) | 1)</div><div class='add'>+#define PINMUX_GPIO198__FUNC_UDI_TDI_4 (MTK_PIN_NO(198) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO199__FUNC_GPIO199 (MTK_PIN_NO(199) | 0)</div><div class='add'>+#define PINMUX_GPIO199__FUNC_SDA8 (MTK_PIN_NO(199) | 1)</div><div class='add'>+#define PINMUX_GPIO199__FUNC_UDI_TDI_5 (MTK_PIN_NO(199) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO200__FUNC_GPIO200 (MTK_PIN_NO(200) | 0)</div><div class='add'>+#define PINMUX_GPIO200__FUNC_SCL1 (MTK_PIN_NO(200) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO201__FUNC_GPIO201 (MTK_PIN_NO(201) | 0)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_SDA1 (MTK_PIN_NO(201) | 1)</div><div class='add'>+#define PINMUX_GPIO201__FUNC_TSFDC_BG_COMP (MTK_PIN_NO(201) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO202__FUNC_GPIO202 (MTK_PIN_NO(202) | 0)</div><div class='add'>+#define PINMUX_GPIO202__FUNC_SCL9 (MTK_PIN_NO(202) | 1)</div><div class='add'>+#define PINMUX_GPIO202__FUNC_SCP_SCL7 (MTK_PIN_NO(202) | 2)</div><div class='add'>+#define PINMUX_GPIO202__FUNC_TP_GPIO15_AO (MTK_PIN_NO(202) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO203__FUNC_GPIO203 (MTK_PIN_NO(203) | 0)</div><div class='add'>+#define PINMUX_GPIO203__FUNC_SDA9 (MTK_PIN_NO(203) | 1)</div><div class='add'>+#define PINMUX_GPIO203__FUNC_SCP_SDA7 (MTK_PIN_NO(203) | 2)</div><div class='add'>+#define PINMUX_GPIO203__FUNC_TP_GPIO9_AO (MTK_PIN_NO(203) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO204__FUNC_GPIO204 (MTK_PIN_NO(204) | 0)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_SCL13 (MTK_PIN_NO(204) | 1)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_CMVREF6 (MTK_PIN_NO(204) | 2)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(204) | 3)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_CLKM2_B (MTK_PIN_NO(204) | 5)</div><div class='add'>+#define PINMUX_GPIO204__FUNC_TP_GPIO12_AO (MTK_PIN_NO(204) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO205__FUNC_GPIO205 (MTK_PIN_NO(205) | 0)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_SDA13 (MTK_PIN_NO(205) | 1)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_CMVREF7 (MTK_PIN_NO(205) | 2)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(205) | 3)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_CLKM3_B (MTK_PIN_NO(205) | 5)</div><div class='add'>+#define PINMUX_GPIO205__FUNC_TP_GPIO13_AO (MTK_PIN_NO(205) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO206__FUNC_GPIO206 (MTK_PIN_NO(206) | 0)</div><div class='add'>+#define PINMUX_GPIO206__FUNC_MD32_2_GPIO0 (MTK_PIN_NO(206) | 2)</div><div class='add'>+#define PINMUX_GPIO206__FUNC_VBUSVALID (MTK_PIN_NO(206) | 5)</div><div class='add'>+#define PINMUX_GPIO206__FUNC_UDI_TDO_3 (MTK_PIN_NO(206) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO207__FUNC_GPIO207 (MTK_PIN_NO(207) | 0)</div><div class='add'>+#define PINMUX_GPIO207__FUNC_PCIE_WAKEN_2P (MTK_PIN_NO(207) | 1)</div><div class='add'>+#define PINMUX_GPIO207__FUNC_PMSR_SMAP_MAX (MTK_PIN_NO(207) | 2)</div><div class='add'>+#define PINMUX_GPIO207__FUNC_FMI2S_A_BCK (MTK_PIN_NO(207) | 4)</div><div class='add'>+#define PINMUX_GPIO207__FUNC_UDI_TDO_4 (MTK_PIN_NO(207) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO208__FUNC_GPIO208 (MTK_PIN_NO(208) | 0)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_PCIE_CLKREQN_2P (MTK_PIN_NO(208) | 1)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_PMSR_SMAP_MAX_W (MTK_PIN_NO(208) | 2)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_FMI2S_A_LRCK (MTK_PIN_NO(208) | 4)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_CLKM0_B (MTK_PIN_NO(208) | 5)</div><div class='add'>+#define PINMUX_GPIO208__FUNC_UDI_TDO_5 (MTK_PIN_NO(208) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO209__FUNC_GPIO209 (MTK_PIN_NO(209) | 0)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_PCIE_PERSTN_2P (MTK_PIN_NO(209) | 1)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_PMSR_SMAP (MTK_PIN_NO(209) | 2)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_FMI2S_A_DI (MTK_PIN_NO(209) | 4)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_CLKM1_B (MTK_PIN_NO(209) | 5)</div><div class='add'>+#define PINMUX_GPIO209__FUNC_UDI_TDO_6 (MTK_PIN_NO(209) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO210__FUNC_GPIO210 (MTK_PIN_NO(210) | 0)</div><div class='add'>+#define PINMUX_GPIO210__FUNC_CMMCLK4 (MTK_PIN_NO(210) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO211__FUNC_GPIO211 (MTK_PIN_NO(211) | 0)</div><div class='add'>+#define PINMUX_GPIO211__FUNC_CMMCLK5 (MTK_PIN_NO(211) | 1)</div><div class='add'>+#define PINMUX_GPIO211__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(211) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO212__FUNC_GPIO212 (MTK_PIN_NO(212) | 0)</div><div class='add'>+#define PINMUX_GPIO212__FUNC_CMMCLK6 (MTK_PIN_NO(212) | 1)</div><div class='add'>+#define PINMUX_GPIO212__FUNC_TP_GPIO10_AO (MTK_PIN_NO(212) | 2)</div><div class='add'>+#define PINMUX_GPIO212__FUNC_IDDIG (MTK_PIN_NO(212) | 5)</div><div class='add'>+#define PINMUX_GPIO212__FUNC_UDI_TDO_1 (MTK_PIN_NO(212) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO213__FUNC_GPIO213 (MTK_PIN_NO(213) | 0)</div><div class='add'>+#define PINMUX_GPIO213__FUNC_CMMCLK7 (MTK_PIN_NO(213) | 1)</div><div class='add'>+#define PINMUX_GPIO213__FUNC_TP_GPIO11_AO (MTK_PIN_NO(213) | 2)</div><div class='add'>+#define PINMUX_GPIO213__FUNC_USB_DRVVBUS (MTK_PIN_NO(213) | 5)</div><div class='add'>+#define PINMUX_GPIO213__FUNC_UDI_TDO_2 (MTK_PIN_NO(213) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO214__FUNC_GPIO214 (MTK_PIN_NO(214) | 0)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_SCP_SCL3 (MTK_PIN_NO(214) | 1)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_SDA14_E1 (MTK_PIN_NO(214) | 2)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_SCL14_E2 (MTK_PIN_NO(214) | 2)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_GBE1_MDC (MTK_PIN_NO(214) | 6)</div><div class='add'>+#define PINMUX_GPIO214__FUNC_GBE0_MDC (MTK_PIN_NO(214) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO215__FUNC_GPIO215 (MTK_PIN_NO(215) | 0)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_SCP_SDA3 (MTK_PIN_NO(215) | 1)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_SCL14_E1 (MTK_PIN_NO(215) | 2)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_SDA14_E2 (MTK_PIN_NO(215) | 2)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_GBE1_MDIO (MTK_PIN_NO(215) | 6)</div><div class='add'>+#define PINMUX_GPIO215__FUNC_GBE0_MDIO (MTK_PIN_NO(215) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO216__FUNC_GPIO216 (MTK_PIN_NO(216) | 0)</div><div class='add'>+#define PINMUX_GPIO216__FUNC_GPS_PPS0 (MTK_PIN_NO(216) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO217__FUNC_GPIO217 (MTK_PIN_NO(217) | 0)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_KPROW0 (MTK_PIN_NO(217) | 1)</div><div class='add'>+#define PINMUX_GPIO217__FUNC_TP_GPIO12_AO (MTK_PIN_NO(217) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO218__FUNC_GPIO218 (MTK_PIN_NO(218) | 0)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_KPROW1 (MTK_PIN_NO(218) | 1)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_SPI0_WP (MTK_PIN_NO(218) | 2)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(218) | 3)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_GPS_L5_ELNA_EN (MTK_PIN_NO(218) | 5)</div><div class='add'>+#define PINMUX_GPIO218__FUNC_TP_GPIO14_AO (MTK_PIN_NO(218) | 6)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO219__FUNC_GPIO219 (MTK_PIN_NO(219) | 0)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_KPCOL1 (MTK_PIN_NO(219) | 1)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_SPI0_HOLD (MTK_PIN_NO(219) | 2)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(219) | 3)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_SPMI_M_TRIG_FLAG (MTK_PIN_NO(219) | 4)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(219) | 5)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_SPM_JTAG_TRSTN_VLP (MTK_PIN_NO(219) | 6)</div><div class='add'>+#define PINMUX_GPIO219__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(219) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO220__FUNC_GPIO220 (MTK_PIN_NO(220) | 0)</div><div class='add'>+#define PINMUX_GPIO220__FUNC_SPI0_CLK (MTK_PIN_NO(220) | 1)</div><div class='add'>+#define PINMUX_GPIO220__FUNC_SPM_JTAG_TCK_VLP (MTK_PIN_NO(220) | 6)</div><div class='add'>+#define PINMUX_GPIO220__FUNC_JTCK_SEL1 (MTK_PIN_NO(220) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO221__FUNC_GPIO221 (MTK_PIN_NO(221) | 0)</div><div class='add'>+#define PINMUX_GPIO221__FUNC_SPI0_CSB (MTK_PIN_NO(221) | 1)</div><div class='add'>+#define PINMUX_GPIO221__FUNC_SPM_JTAG_TMS_VLP (MTK_PIN_NO(221) | 6)</div><div class='add'>+#define PINMUX_GPIO221__FUNC_JTMS_SEL1 (MTK_PIN_NO(221) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO222__FUNC_GPIO222 (MTK_PIN_NO(222) | 0)</div><div class='add'>+#define PINMUX_GPIO222__FUNC_SPI0_MO (MTK_PIN_NO(222) | 1)</div><div class='add'>+#define PINMUX_GPIO222__FUNC_SCP_SCL7 (MTK_PIN_NO(222) | 2)</div><div class='add'>+#define PINMUX_GPIO222__FUNC_SPM_JTAG_TDO_VLP (MTK_PIN_NO(222) | 6)</div><div class='add'>+#define PINMUX_GPIO222__FUNC_JTDO_SEL1 (MTK_PIN_NO(222) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO223__FUNC_GPIO223 (MTK_PIN_NO(223) | 0)</div><div class='add'>+#define PINMUX_GPIO223__FUNC_SPI0_MI (MTK_PIN_NO(223) | 1)</div><div class='add'>+#define PINMUX_GPIO223__FUNC_SCP_SDA7 (MTK_PIN_NO(223) | 2)</div><div class='add'>+#define PINMUX_GPIO223__FUNC_SPM_JTAG_TDI_VLP (MTK_PIN_NO(223) | 6)</div><div class='add'>+#define PINMUX_GPIO223__FUNC_JTDI_SEL1 (MTK_PIN_NO(223) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO224__FUNC_GPIO224 (MTK_PIN_NO(224) | 0)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_MSDC2_CLK (MTK_PIN_NO(224) | 1)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_DMIC2_CLK (MTK_PIN_NO(224) | 2)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_GBE0_AUX_PPS0 (MTK_PIN_NO(224) | 3)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_GBE0_TXER (MTK_PIN_NO(224) | 4)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_GBE1_TXER (MTK_PIN_NO(224) | 5)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_GBE1_AUX_PPS0 (MTK_PIN_NO(224) | 6)</div><div class='add'>+#define PINMUX_GPIO224__FUNC_MD32_1_TXD (MTK_PIN_NO(224) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO225__FUNC_GPIO225 (MTK_PIN_NO(225) | 0)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_MSDC2_CMD (MTK_PIN_NO(225) | 1)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_DMIC2_DAT (MTK_PIN_NO(225) | 2)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_GBE0_AUX_PPS1 (MTK_PIN_NO(225) | 3)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_GBE0_RXER (MTK_PIN_NO(225) | 4)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_GBE1_RXER (MTK_PIN_NO(225) | 5)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_GBE1_AUX_PPS1 (MTK_PIN_NO(225) | 6)</div><div class='add'>+#define PINMUX_GPIO225__FUNC_MD32_1_RXD (MTK_PIN_NO(225) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GPIO226 (MTK_PIN_NO(226) | 0)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_MSDC2_DAT0 (MTK_PIN_NO(226) | 1)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_I2SIN3_BCK (MTK_PIN_NO(226) | 2)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GBE0_AUX_PPS2 (MTK_PIN_NO(226) | 3)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GBE0_COL (MTK_PIN_NO(226) | 4)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GBE1_COL (MTK_PIN_NO(226) | 5)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GBE1_AUX_PPS2 (MTK_PIN_NO(226) | 6)</div><div class='add'>+#define PINMUX_GPIO226__FUNC_GBE1_MDC (MTK_PIN_NO(226) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GPIO227 (MTK_PIN_NO(227) | 0)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_MSDC2_DAT1 (MTK_PIN_NO(227) | 1)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_I2SIN3_LRCK (MTK_PIN_NO(227) | 2)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GBE0_AUX_PPS3 (MTK_PIN_NO(227) | 3)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GBE0_INTR (MTK_PIN_NO(227) | 4)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GBE1_INTR (MTK_PIN_NO(227) | 5)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GBE1_AUX_PPS3 (MTK_PIN_NO(227) | 6)</div><div class='add'>+#define PINMUX_GPIO227__FUNC_GBE1_MDIO (MTK_PIN_NO(227) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO228__FUNC_GPIO228 (MTK_PIN_NO(228) | 0)</div><div class='add'>+#define PINMUX_GPIO228__FUNC_MSDC2_DAT2 (MTK_PIN_NO(228) | 1)</div><div class='add'>+#define PINMUX_GPIO228__FUNC_I2SIN3_DI (MTK_PIN_NO(228) | 2)</div><div class='add'>+#define PINMUX_GPIO228__FUNC_GBE0_MDC (MTK_PIN_NO(228) | 3)</div><div class='add'>+#define PINMUX_GPIO228__FUNC_GBE1_MDC (MTK_PIN_NO(228) | 4)</div><div class='add'>+#define PINMUX_GPIO228__FUNC_CONN_BG_GPS_MCU_AICE_TCKC (MTK_PIN_NO(228) | 5)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO229__FUNC_GPIO229 (MTK_PIN_NO(229) | 0)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_MSDC2_DAT3 (MTK_PIN_NO(229) | 1)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_I2SOUT3_DO (MTK_PIN_NO(229) | 2)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_GBE0_MDIO (MTK_PIN_NO(229) | 3)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_GBE1_MDIO (MTK_PIN_NO(229) | 4)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_CONN_BG_GPS_MCU_AICE_TMSC (MTK_PIN_NO(229) | 5)</div><div class='add'>+#define PINMUX_GPIO229__FUNC_AVB_CLK2 (MTK_PIN_NO(229) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO230__FUNC_GPIO230 (MTK_PIN_NO(230) | 0)</div><div class='add'>+#define PINMUX_GPIO230__FUNC_CONN_TOP_CLK (MTK_PIN_NO(230) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO231__FUNC_GPIO231 (MTK_PIN_NO(231) | 0)</div><div class='add'>+#define PINMUX_GPIO231__FUNC_CONN_TOP_DATA (MTK_PIN_NO(231) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO232__FUNC_GPIO232 (MTK_PIN_NO(232) | 0)</div><div class='add'>+#define PINMUX_GPIO232__FUNC_CONN_HRST_B (MTK_PIN_NO(232) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO233__FUNC_GPIO233 (MTK_PIN_NO(233) | 0)</div><div class='add'>+#define PINMUX_GPIO233__FUNC_I2SIN0_BCK (MTK_PIN_NO(233) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO234__FUNC_GPIO234 (MTK_PIN_NO(234) | 0)</div><div class='add'>+#define PINMUX_GPIO234__FUNC_I2SIN0_LRCK (MTK_PIN_NO(234) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO235__FUNC_GPIO235 (MTK_PIN_NO(235) | 0)</div><div class='add'>+#define PINMUX_GPIO235__FUNC_I2SIN0_DI (MTK_PIN_NO(235) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO236__FUNC_GPIO236 (MTK_PIN_NO(236) | 0)</div><div class='add'>+#define PINMUX_GPIO236__FUNC_I2SOUT0_DO (MTK_PIN_NO(236) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO237__FUNC_GPIO237 (MTK_PIN_NO(237) | 0)</div><div class='add'>+#define PINMUX_GPIO237__FUNC_CONN_UARTHUB_UART_TX (MTK_PIN_NO(237) | 1)</div><div class='add'>+#define PINMUX_GPIO237__FUNC_UTXD3 (MTK_PIN_NO(237) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO238__FUNC_GPIO238 (MTK_PIN_NO(238) | 0)</div><div class='add'>+#define PINMUX_GPIO238__FUNC_CONN_UARTHUB_UART_RX (MTK_PIN_NO(238) | 1)</div><div class='add'>+#define PINMUX_GPIO238__FUNC_URXD3 (MTK_PIN_NO(238) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO239__FUNC_GPIO239 (MTK_PIN_NO(239) | 0)</div><div class='add'>+#define PINMUX_GPIO239__FUNC_TP_UTXD_CONSYS_VLP (MTK_PIN_NO(239) | 1)</div><div class='add'>+#define PINMUX_GPIO239__FUNC_TP_URXD_CONSYS_VLP (MTK_PIN_NO(239) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO240__FUNC_GPIO240 (MTK_PIN_NO(240) | 0)</div><div class='add'>+#define PINMUX_GPIO240__FUNC_TP_URXD_CONSYS_VLP (MTK_PIN_NO(240) | 1)</div><div class='add'>+#define PINMUX_GPIO240__FUNC_TP_UTXD_CONSYS_VLP (MTK_PIN_NO(240) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO241__FUNC_GPIO241 (MTK_PIN_NO(241) | 0)</div><div class='add'>+#define PINMUX_GPIO241__FUNC_PCIE_PERSTN (MTK_PIN_NO(241) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO242__FUNC_GPIO242 (MTK_PIN_NO(242) | 0)</div><div class='add'>+#define PINMUX_GPIO242__FUNC_PCIE_WAKEN (MTK_PIN_NO(242) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO243__FUNC_GPIO243 (MTK_PIN_NO(243) | 0)</div><div class='add'>+#define PINMUX_GPIO243__FUNC_PCIE_CLKREQN (MTK_PIN_NO(243) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO244__FUNC_GPIO244 (MTK_PIN_NO(244) | 0)</div><div class='add'>+#define PINMUX_GPIO244__FUNC_CONN_RST (MTK_PIN_NO(244) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO245__FUNC_GPIO245 (MTK_PIN_NO(245) | 0)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO246__FUNC_GPIO246 (MTK_PIN_NO(246) | 0)</div><div class='add'>+#define PINMUX_GPIO246__FUNC_CONN_PTA_TXD0 (MTK_PIN_NO(246) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO247__FUNC_GPIO247 (MTK_PIN_NO(247) | 0)</div><div class='add'>+#define PINMUX_GPIO247__FUNC_CONN_PTA_RXD0 (MTK_PIN_NO(247) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO248__FUNC_GPIO248 (MTK_PIN_NO(248) | 0)</div><div class='add'>+#define PINMUX_GPIO248__FUNC_UCTS3 (MTK_PIN_NO(248) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO249__FUNC_GPIO249 (MTK_PIN_NO(249) | 0)</div><div class='add'>+#define PINMUX_GPIO249__FUNC_URTS3 (MTK_PIN_NO(249) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO250__FUNC_GPIO250 (MTK_PIN_NO(250) | 0)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO251__FUNC_GPIO251 (MTK_PIN_NO(251) | 0)</div><div class='add'>+#define PINMUX_GPIO251__FUNC_IDDIG_1P (MTK_PIN_NO(251) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO252__FUNC_GPIO252 (MTK_PIN_NO(252) | 0)</div><div class='add'>+#define PINMUX_GPIO252__FUNC_USB_DRVVBUS_1P (MTK_PIN_NO(252) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO253__FUNC_GPIO253 (MTK_PIN_NO(253) | 0)</div><div class='add'>+#define PINMUX_GPIO253__FUNC_VBUSVALID_1P (MTK_PIN_NO(253) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO254__FUNC_GPIO254 (MTK_PIN_NO(254) | 0)</div><div class='add'>+#define PINMUX_GPIO254__FUNC_IDDIG_2P (MTK_PIN_NO(254) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO255__FUNC_GPIO255 (MTK_PIN_NO(255) | 0)</div><div class='add'>+#define PINMUX_GPIO255__FUNC_USB_DRVVBUS_2P (MTK_PIN_NO(255) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO256__FUNC_GPIO256 (MTK_PIN_NO(256) | 0)</div><div class='add'>+#define PINMUX_GPIO256__FUNC_VBUSVALID_2P (MTK_PIN_NO(256) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO257__FUNC_GPIO257 (MTK_PIN_NO(257) | 0)</div><div class='add'>+#define PINMUX_GPIO257__FUNC_VBUSVALID_3P (MTK_PIN_NO(257) | 1)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO258__FUNC_GPIO258 (MTK_PIN_NO(258) | 0)</div><div class='add'>+#define PINMUX_GPIO258__FUNC_AVB_CLK1 (MTK_PIN_NO(258) | 7)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO259__FUNC_GPIO259 (MTK_PIN_NO(259) | 0)</div><div class='add'>+#define PINMUX_GPIO259__FUNC_GBE0_TXD0 (MTK_PIN_NO(259) | 1)</div><div class='add'>+#define PINMUX_GPIO259__FUNC_GBE1_TXD0 (MTK_PIN_NO(259) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO260__FUNC_GPIO260 (MTK_PIN_NO(260) | 0)</div><div class='add'>+#define PINMUX_GPIO260__FUNC_GBE0_TXD1 (MTK_PIN_NO(260) | 1)</div><div class='add'>+#define PINMUX_GPIO260__FUNC_GBE1_TXD1 (MTK_PIN_NO(260) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO261__FUNC_GPIO261 (MTK_PIN_NO(261) | 0)</div><div class='add'>+#define PINMUX_GPIO261__FUNC_GBE0_TXC (MTK_PIN_NO(261) | 1)</div><div class='add'>+#define PINMUX_GPIO261__FUNC_GBE1_TXC (MTK_PIN_NO(261) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO262__FUNC_GPIO262 (MTK_PIN_NO(262) | 0)</div><div class='add'>+#define PINMUX_GPIO262__FUNC_GBE0_TXEN (MTK_PIN_NO(262) | 1)</div><div class='add'>+#define PINMUX_GPIO262__FUNC_GBE1_TXEN (MTK_PIN_NO(262) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO263__FUNC_GPIO263 (MTK_PIN_NO(263) | 0)</div><div class='add'>+#define PINMUX_GPIO263__FUNC_GBE0_RXD0 (MTK_PIN_NO(263) | 1)</div><div class='add'>+#define PINMUX_GPIO263__FUNC_GBE1_RXD0 (MTK_PIN_NO(263) | 2)</div><div class='add'>+#define PINMUX_GPIO263__FUNC_GBE0_AUX_PPS0 (MTK_PIN_NO(263) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO264__FUNC_GPIO264 (MTK_PIN_NO(264) | 0)</div><div class='add'>+#define PINMUX_GPIO264__FUNC_GBE0_RXD1 (MTK_PIN_NO(264) | 1)</div><div class='add'>+#define PINMUX_GPIO264__FUNC_GBE1_RXD1 (MTK_PIN_NO(264) | 2)</div><div class='add'>+#define PINMUX_GPIO264__FUNC_GBE0_AUX_PPS1 (MTK_PIN_NO(264) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO265__FUNC_GPIO265 (MTK_PIN_NO(265) | 0)</div><div class='add'>+#define PINMUX_GPIO265__FUNC_GBE0_RXC (MTK_PIN_NO(265) | 1)</div><div class='add'>+#define PINMUX_GPIO265__FUNC_GBE1_RXC (MTK_PIN_NO(265) | 2)</div><div class='add'>+#define PINMUX_GPIO265__FUNC_GBE0_AUX_PPS2 (MTK_PIN_NO(265) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO266__FUNC_GPIO266 (MTK_PIN_NO(266) | 0)</div><div class='add'>+#define PINMUX_GPIO266__FUNC_GBE0_RXDV (MTK_PIN_NO(266) | 1)</div><div class='add'>+#define PINMUX_GPIO266__FUNC_GBE1_RXDV (MTK_PIN_NO(266) | 2)</div><div class='add'>+#define PINMUX_GPIO266__FUNC_GBE0_AUX_PPS3 (MTK_PIN_NO(266) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO267__FUNC_GPIO267 (MTK_PIN_NO(267) | 0)</div><div class='add'>+#define PINMUX_GPIO267__FUNC_GBE0_TXD2 (MTK_PIN_NO(267) | 1)</div><div class='add'>+#define PINMUX_GPIO267__FUNC_GBE1_TXD2 (MTK_PIN_NO(267) | 2)</div><div class='add'>+#define PINMUX_GPIO267__FUNC_GBE0_RXER (MTK_PIN_NO(267) | 3)</div><div class='add'>+#define PINMUX_GPIO267__FUNC_GBE1_RXER (MTK_PIN_NO(267) | 4)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO268__FUNC_GPIO268 (MTK_PIN_NO(268) | 0)</div><div class='add'>+#define PINMUX_GPIO268__FUNC_GBE0_TXD3 (MTK_PIN_NO(268) | 1)</div><div class='add'>+#define PINMUX_GPIO268__FUNC_GBE1_TXD3 (MTK_PIN_NO(268) | 2)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO269__FUNC_GPIO269 (MTK_PIN_NO(269) | 0)</div><div class='add'>+#define PINMUX_GPIO269__FUNC_GBE0_RXD2 (MTK_PIN_NO(269) | 1)</div><div class='add'>+#define PINMUX_GPIO269__FUNC_GBE1_RXD2 (MTK_PIN_NO(269) | 2)</div><div class='add'>+#define PINMUX_GPIO269__FUNC_GBE0_MDC (MTK_PIN_NO(269) | 3)</div><div class='add'>+</div><div class='add'>+#define PINMUX_GPIO270__FUNC_GPIO270 (MTK_PIN_NO(270) | 0)</div><div class='add'>+#define PINMUX_GPIO270__FUNC_GBE0_RXD3 (MTK_PIN_NO(270) | 1)</div><div class='add'>+#define PINMUX_GPIO270__FUNC_GBE1_RXD3 (MTK_PIN_NO(270) | 2)</div><div class='add'>+#define PINMUX_GPIO270__FUNC_GBE0_MDIO (MTK_PIN_NO(270) | 3)</div><div class='add'>+</div><div class='add'>+#endif /* __MT8196_PINFUNC_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts<br/>index 7d90112a7e27..c8418888268d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8365-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8365-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8365-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8365-evk.dts</a></div><div class='hunk'>@@ -21,12 +21,28 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='add'>+		ethernet = &amp;ethernet;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:921600n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	connector {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		label = "hdmi";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			hdmi_connector_in: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_connector_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		optee {</div><div class='ctx'> 			compatible = "linaro,optee-tz";</div><div class='hunk'>@@ -62,6 +78,21 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_vsys: regulator-vsys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch0_fixed_3v3: regulator-vio33tp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vio33_tp";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -104,6 +135,16 @@</div><div class='ctx'> 		pinctrl-5 = &lt;&amp;aud_mosi_on_pins&gt;;</div><div class='ctx'> 		mediatek,platform = &lt;&amp;afe&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vsys_lcm_reg: regulator-vsys-lcm {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 129 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vsys_lcm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;afe {</div><div class='hunk'>@@ -131,13 +172,102 @@</div><div class='ctx'> 	sram-supply = &lt;&amp;mt6357_vsram_proc_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dpi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dpi_default_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;dpi_idle_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	/*</div><div class='add'>+	 * Ethernet and HDMI (DPI0) are sharing pins.</div><div class='add'>+	 * Only one can be enabled at a time and require the physical switch</div><div class='add'>+	 * SW2101 to be set on LAN position</div><div class='add'>+	 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dpi0_in: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;rdma1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dpi0_out: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;it66121_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "startek,kd070fhfid015";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 67 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;mt6357_vsim1_reg&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vsys_lcm_reg&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			panel_in: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsi0_in: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi0_out: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ethernet {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ethernet_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	phy-handle = &lt;&amp;eth_phy&gt;;</div><div class='ctx'> 	phy-mode = "rmii";</div><div class='ctx'> 	/*</div><div class='del'>-	 * Ethernet and HDMI (DSI0) are sharing pins.</div><div class='add'>+	 * Ethernet and HDMI (DPI0) are sharing pins.</div><div class='ctx'> 	 * Only one can be enabled at a time and require the physical switch</div><div class='ctx'> 	 * SW2101 to be set on LAN position</div><div class='ctx'> 	 * mt6357_vibr_reg and mt6357_vsim2_reg are needed to supply ethernet</div><div class='hunk'>@@ -161,6 +291,68 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	clock-div = &lt;2&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	it66121_hdmi: hdmi@4c {</div><div class='add'>+		compatible = "ite,it66121";</div><div class='add'>+		reg = &lt;0x4c&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts = &lt;68 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;ite_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;pio 69 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcn18-supply = &lt;&amp;mt6357_vsim2_reg&gt;;</div><div class='add'>+		vcn33-supply = &lt;&amp;mt6357_vibr_reg&gt;;</div><div class='add'>+		vrf12-supply = &lt;&amp;mt6357_vrf12_reg&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				it66121_in: endpoint@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					bus-width = &lt;12&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;dpi0_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				hdmi_connector_out: endpoint@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchscreen@5d {</div><div class='add'>+		compatible = "goodix,gt9271";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 78 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_pins&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;pio 78 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 79 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;touch0_fixed_3v3&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;mt6357_vrf12_reg&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;topckgen CLK_TOP_MSDCPLL&gt;;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;topckgen CLK_TOP_MSDC50_0_SEL&gt;;</div><div class='hunk'>@@ -205,6 +397,11 @@</div><div class='ctx'> 	mediatek,micbias1-microvolt = &lt;1700000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mt6357_vsim1_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pio {</div><div class='ctx'> 	aud_default_pins: audiodefault-pins {</div><div class='ctx'> 		clk-dat-pins {</div><div class='hunk'>@@ -267,6 +464,49 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dpi_default_pins: dpi-default-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_0_GPIO0__FUNC_DPI_D0&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_1_GPIO1__FUNC_DPI_D1&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_2_GPIO2__FUNC_DPI_D2&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_3_GPIO3__FUNC_DPI_D3&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_4_GPIO4__FUNC_DPI_D4&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_5_GPIO5__FUNC_DPI_D5&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_6_GPIO6__FUNC_DPI_D6&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_7_GPIO7__FUNC_DPI_D7&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_8_GPIO8__FUNC_DPI_D8&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_9_GPIO9__FUNC_DPI_D9&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_10_GPIO10__FUNC_DPI_D10&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_11_GPIO11__FUNC_DPI_D11&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_12_GPIO12__FUNC_DPI_DE&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_13_GPIO13__FUNC_DPI_VSYNC&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_14_GPIO14__FUNC_DPI_CK&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_15_GPIO15__FUNC_DPI_HSYNC&gt;;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpi_idle_pins: dpi-idle-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_0_GPIO0__FUNC_GPIO0&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_1_GPIO1__FUNC_GPIO1&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_2_GPIO2__FUNC_GPIO2&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_3_GPIO3__FUNC_GPIO3&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_4_GPIO4__FUNC_GPIO4&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_5_GPIO5__FUNC_GPIO5&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_6_GPIO6__FUNC_GPIO6&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_7_GPIO7__FUNC_GPIO7&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_8_GPIO8__FUNC_GPIO8&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_9_GPIO9__FUNC_GPIO9&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_10_GPIO10__FUNC_GPIO10&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_11_GPIO11__FUNC_GPIO11&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_12_GPIO12__FUNC_GPIO12&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_13_GPIO13__FUNC_GPIO13&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_14_GPIO14__FUNC_GPIO14&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_15_GPIO15__FUNC_GPIO15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ethernet_pins: ethernet-pins {</div><div class='ctx'> 		phy_reset_pins {</div><div class='ctx'> 			pinmux = &lt;MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133&gt;;</div><div class='hunk'>@@ -308,6 +548,33 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_59_SDA1__FUNC_SDA1_0&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_60_SCL1__FUNC_SCL1_0&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ite_pins: ite-pins {</div><div class='add'>+		irq_ite_pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_68_CMDAT0__FUNC_GPIO68&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwr_pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_70_CMDAT2__FUNC_GPIO70&gt;,</div><div class='add'>+				 &lt;MT8365_PIN_71_CMDAT3__FUNC_GPIO71&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rst_ite_pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_69_CMDAT1__FUNC_GPIO69&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mmc0_default_pins: mmc0-default-pins {</div><div class='ctx'> 		clk-pins {</div><div class='ctx'> 			pinmux = &lt;MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK&gt;;</div><div class='hunk'>@@ -410,6 +677,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	touch_pins: touch-pins {</div><div class='add'>+		ctp-int1-pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_78_CMHSYNC__FUNC_GPIO78&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rst-pins {</div><div class='add'>+			pinmux = &lt;MT8365_PIN_79_CMVSYNC__FUNC_GPIO79&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uart0_pins: uart0-pins {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;MT8365_PIN_35_URXD0__FUNC_URXD0&gt;,</div><div class='hunk'>@@ -463,6 +743,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;rdma1_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dpi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ssusb {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	maximum-speed = "high-speed";</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi<br/>index 9c91fe8ea0f9..e6d2b3221a3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8365.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8365.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8365.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8365.dtsi</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/mediatek,mt8365-clk.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/memory/mediatek,mt8365-larb-port.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/mediatek,mt8365-power.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -19,6 +20,19 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		aal0 = &amp;aal0;</div><div class='add'>+		ccorr0 = &amp;ccorr0;</div><div class='add'>+		color0 = &amp;color0;</div><div class='add'>+		dither0 = &amp;dither0;</div><div class='add'>+		dpi0 = &amp;dpi0;</div><div class='add'>+		dsi0 = &amp;dsi0;</div><div class='add'>+		gamma0 = &amp;gamma0;</div><div class='add'>+		ovl0 = &amp;ovl0;</div><div class='add'>+		rdma0 = &amp;rdma0;</div><div class='add'>+		rdma1 = &amp;rdma1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -449,7 +463,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		keypad: keypad@10010000 {</div><div class='del'>-			compatible = "mediatek,mt6779-keypad";</div><div class='add'>+			compatible = "mediatek,mt8365-keypad",</div><div class='add'>+				     "mediatek,mt6779-keypad";</div><div class='ctx'> 			reg = &lt;0 0x10010000 0 0x1000&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 124 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='hunk'>@@ -608,6 +623,15 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		disp_pwm: pwm@1100e000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-pwm", "mediatek,mt8183-disp-pwm";</div><div class='add'>+			reg = &lt;0 0x1100e000 0 0x1000&gt;;</div><div class='add'>+			clock-names = "main", "mm";</div><div class='add'>+			clocks = &lt;&amp;topckgen CLK_TOP_DISP_PWM_SEL&gt;, &lt;&amp;infracfg CLK_IFR_DISP_PWM&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			#pwm-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c3: i2c@1100f000 {</div><div class='ctx'> 			compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c";</div><div class='ctx'> 			reg = &lt;0 0x1100f000 0 0xa0&gt;, &lt;0 0x11000200 0 0x80&gt;;</div><div class='hunk'>@@ -704,6 +728,15 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mipi_tx0: dsi-phy@11c00000 {</div><div class='add'>+			compatible = "mediatek,mt8365-mipi-tx", "mediatek,mt8183-mipi-tx";</div><div class='add'>+			reg = &lt;0 0x11c00000 0 0x800&gt;;</div><div class='add'>+			clock-output-names = "mipi_tx0_pll";</div><div class='add'>+			clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		u3phy: t-phy@11cc0000 {</div><div class='ctx'> 			compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -731,6 +764,26 @@</div><div class='ctx'> 			compatible = "mediatek,mt8365-mmsys", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x14000000 0 0x1000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='add'>+			port {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				mmsys_main: endpoint@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+				};</div><div class='add'>+				mmsys_ext: endpoint@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;rdma1_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mutex: mutex@14001000 {</div><div class='add'>+			compatible =  "mediatek,mt8365-disp-mutex";</div><div class='add'>+			reg = &lt;0 0x14001000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		smi_common: smi@14002000 {</div><div class='hunk'>@@ -756,6 +809,290 @@</div><div class='ctx'> 			mediatek,larb-id = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ovl0: ovl@1400b000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-ovl", "mediatek,mt8192-disp-ovl";</div><div class='add'>+			reg = &lt;0 0x1400b000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_OVL0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			iommus = &lt;&amp;iommu M4U_PORT_DISP_OVL0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ovl0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;mmsys_main&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ovl0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rdma0: rdma@1400d000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-rdma", "mediatek,mt8183-disp-rdma";</div><div class='add'>+			reg = &lt;0 0x1400d000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_RDMA0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			iommus = &lt;&amp;iommu M4U_PORT_DISP_RDMA0&gt;;</div><div class='add'>+			mediatek,rdma-fifo-size = &lt;5120&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;ovl0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		color0: color@1400f000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-color", "mediatek,mt8173-disp-color";</div><div class='add'>+			reg = &lt;0 0x1400f000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_COLOR0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					color0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;rdma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ccorr0: ccorr@14010000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-ccorr", "mediatek,mt8183-disp-ccorr";</div><div class='add'>+			reg = &lt;0 0x14010000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_CCORR0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					ccorr0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;color0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					ccorr0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aal0: aal@14011000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-aal", "mediatek,mt8183-disp-aal";</div><div class='add'>+			reg = &lt;0 0x14011000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_AAL0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 166 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					aal0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;ccorr0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					aal0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gamma0: gamma@14012000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-gamma", "mediatek,mt8183-disp-gamma";</div><div class='add'>+			reg = &lt;0 0x14012000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_GAMMA0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					gamma0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;aal0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					gamma0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dither0: dither@14013000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-dither", "mediatek,mt8183-disp-dither";</div><div class='add'>+			reg = &lt;0 0x14013000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_DITHER0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dither0_in: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					dither0_out: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsi0: dsi@14014000 {</div><div class='add'>+			compatible = "mediatek,mt8365-dsi", "mediatek,mt8183-dsi";</div><div class='add'>+			reg = &lt;0 0x14014000 0 0x1000&gt;;</div><div class='add'>+			clock-names = "engine", "digital", "hs";</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DSI0&gt;,</div><div class='add'>+				 &lt;&amp;mmsys CLK_MM_DSI0_DIG_DSI&gt;,</div><div class='add'>+				 &lt;&amp;mipi_tx0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+			phys = &lt;&amp;mipi_tx0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rdma1: rdma@14016000 {</div><div class='add'>+			compatible = "mediatek,mt8365-disp-rdma", "mediatek,mt8183-disp-rdma";</div><div class='add'>+			reg = &lt;0 0x14016000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_MM_DISP_RDMA1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			iommus = &lt;&amp;iommu M4U_PORT_DISP_RDMA1&gt;;</div><div class='add'>+			mediatek,rdma-fifo-size = &lt;2048&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					rdma1_in: endpoint@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;mmsys_ext&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					rdma1_out: endpoint@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dpi0: dpi@14018000 {</div><div class='add'>+			compatible = "mediatek,mt8365-dpi", "mediatek,mt8192-dpi";</div><div class='add'>+			reg = &lt;0 0x14018000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;mmsys CLK_MM_DPI0_DPI0&gt;,</div><div class='add'>+				 &lt;&amp;mmsys CLK_MM_MM_DPI0&gt;,</div><div class='add'>+				 &lt;&amp;apmixedsys CLK_APMIXED_LVDSPLL&gt;;</div><div class='add'>+			clock-names = "pixel", "engine", "pll";</div><div class='add'>+			interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			power-domains = &lt;&amp;spm MT8365_POWER_DOMAIN_MM&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		camsys: syscon@15000000 {</div><div class='ctx'> 			compatible = "mediatek,mt8365-imgsys", "syscon";</div><div class='ctx'> 			reg = &lt;0 0x15000000 0 0x1000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts b/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts<br/>new file mode 100644<br/>index 000000000000..71a8cbed1df6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Collabora Ltd.</div><div class='add'>+ * Author: Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "mt8370.dtsi"</div><div class='add'>+#include "mt8390-genio-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "MediaTek Genio-510 EVK";</div><div class='add'>+	compatible = "mediatek,mt8370-evk", "mediatek,mt8370", "mediatek,mt8188";</div><div class='add'>+</div><div class='add'>+	memory@40000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x40000000 0x1 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8370.dtsi b/arch/arm64/boot/dts/mediatek/mt8370.dtsi<br/>new file mode 100644<br/>index 000000000000..7ac8b8d03494<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8370.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8370.dtsi</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Collabora Ltd.</div><div class='add'>+ * Author: Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "mt8188.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "mediatek,mt8370";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		/delete-node/ cpu@400;</div><div class='add'>+		/delete-node/ cpu@500;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				/delete-node/ core4;</div><div class='add'>+				/delete-node/ core5;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu6 {</div><div class='add'>+	clock-frequency = &lt;2200000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu7 {</div><div class='add'>+	clock-frequency = &lt;2200000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little0_cooling_map0 {</div><div class='add'>+	cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little1_cooling_map0 {</div><div class='add'>+	cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little2_cooling_map0 {</div><div class='add'>+	cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_little3_cooling_map0 {</div><div class='add'>+	cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+				&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Please note that overriding compatibles is a discouraged practice and is a</div><div class='add'>+ * clear indication of nodes not being, well, compatible!</div><div class='add'>+ *</div><div class='add'>+ * This is a special case, where the GPU is the same as MT8188, but with one</div><div class='add'>+ * of the cores fused out in this lower-binned SoC.</div><div class='add'>+ */</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "mediatek,mt8370-mali", "arm,mali-valhall-jm";</div><div class='add'>+</div><div class='add'>+	power-domains = &lt;&amp;spm MT8188_POWER_DOMAIN_MFG2&gt;,</div><div class='add'>+			&lt;&amp;spm MT8188_POWER_DOMAIN_MFG3&gt;;</div><div class='add'>+</div><div class='add'>+	power-domain-names = "core0", "core1";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ppi_cluster0 {</div><div class='add'>+	affinity = &lt;&amp;cpu0 &amp;cpu1 &amp;cpu2 &amp;cpu3&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts<br/>index 1474bef7e754..612336713a64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts</a></div><div class='hunk'>@@ -8,873 +8,16 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "mt8188.dtsi"</div><div class='del'>-#include "mt6359.dtsi"</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-#include &lt;dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h&gt;</div><div class='del'>-#include &lt;dt-bindings/regulator/mediatek,mt6360-regulator.h&gt;</div><div class='del'>-#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='del'>-#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "mt8390-genio-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "MediaTek Genio-700 EVK";</div><div class='ctx'> 	compatible = "mediatek,mt8390-evk", "mediatek,mt8390",</div><div class='ctx'> 		     "mediatek,mt8188";</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:921600n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	firmware {</div><div class='del'>-		optee {</div><div class='del'>-			compatible = "linaro,optee-tz";</div><div class='del'>-			method = "smc";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0 0x40000000 0x2 0x00000000&gt;;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * 12 MiB reserved for OP-TEE (BL32)</div><div class='del'>-		 * +-----------------------+ 0x43e0_0000</div><div class='del'>-		 * |      SHMEM 2MiB       |</div><div class='del'>-		 * +-----------------------+ 0x43c0_0000</div><div class='del'>-		 * |        | TA_RAM  8MiB |</div><div class='del'>-		 * + TZDRAM +--------------+ 0x4340_0000</div><div class='del'>-		 * |        | TEE_RAM 2MiB |</div><div class='del'>-		 * +-----------------------+ 0x4320_0000</div><div class='del'>-		 */</div><div class='del'>-		optee_reserved: optee@43200000 {</div><div class='del'>-			no-map;</div><div class='del'>-			reg = &lt;0 0x43200000 0 0x00c00000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		scp_mem: memory@50000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0x50000000 0 0x2900000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */</div><div class='del'>-		bl31_secmon_reserved: memory@54600000 {</div><div class='del'>-			no-map;</div><div class='del'>-			reg = &lt;0 0x54600000 0x0 0x200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		apu_mem: memory@55000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0x55000000 0 0x1400000&gt;; /* 20 MB */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vpu_mem: memory@57000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0x57000000 0 0x1400000&gt;; /* 20 MB */</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	common_fixed_5v: regulator-0 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "5v_en";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	edp_panel_fixed_3v3: regulator-1 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "edp_panel_3v3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;pio 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_panel_3v3_en_pins&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio_fixed_3v3: regulator-2 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "gpio_3v3_en";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdio_fixed_1v8: regulator-3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "sdio_io";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdio_fixed_3v3: regulator-4 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "sdio_card";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 74 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	touch0_fixed_3v3: regulator-5 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "touch_3v3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 119 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_hub_fixed_3v3: regulator-6 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_hub_3v3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 112 GPIO_ACTIVE_HIGH&gt;; /* HUB_3V3_EN */</div><div class='del'>-		startup-delay-us = &lt;10000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_hub_reset_1v8: regulator-7 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_hub_reset";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 7 GPIO_ACTIVE_HIGH&gt;; /* HUB_RESET */</div><div class='del'>-		vin-supply = &lt;&amp;usb_hub_fixed_3v3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_p0_vbus: regulator-8 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_p0_vbus";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 84 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_p1_vbus: regulator-9 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_p1_vbus";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		gpio = &lt;&amp;pio 87 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_p2_vbus: regulator-10 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "usb_p2_vbus";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	touchscreen@5d {</div><div class='del'>-		compatible = "goodix,gt9271";</div><div class='del'>-		reg = &lt;0x5d&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;pio 6 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		irq-gpios = &lt;&amp;pio 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pio 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		AVDD28-supply = &lt;&amp;touch0_fixed_3v3&gt;;</div><div class='del'>-		VDDIO-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;touch_pins&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c3 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c4 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;rt1715_int_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;1000000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c5 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c6 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default", "state_uhs";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mmc0_default_pins&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;mmc0_uhs_pins&gt;;</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	max-frequency = &lt;200000000&gt;;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	mmc-hs400-1_8v;</div><div class='del'>-	supports-cqe;</div><div class='del'>-	cap-mmc-hw-reset;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-sd;</div><div class='del'>-	hs400-ds-delay = &lt;0x1481b&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;mt6359_vemc_1_ldo_reg&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;mt6359_vufs_ldo_reg&gt;;</div><div class='del'>-	non-removable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default", "state_uhs";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mmc1_default_pins&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;mmc1_uhs_pins&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	max-frequency = &lt;200000000&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	no-mmc;</div><div class='del'>-	no-sdio;</div><div class='del'>-	cd-gpios = &lt;&amp;pio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;mt6359_vpa_buck_reg&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;mt6359_vsim1_ldo_reg&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vbbck_ldo_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vcn18_ldo_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vcn33_2_bt_ldo_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vcore_buck_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vgpu11_buck_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vpa_buck_reg {</div><div class='del'>-	regulator-max-microvolt = &lt;3100000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vpu_buck_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vrf12_ldo_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vsim1_ldo_reg {</div><div class='del'>-	regulator-enable-ramp-delay = &lt;480&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359_vufs_ldo_reg {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mt6359codec {</div><div class='del'>-	mediatek,mic-type-0 = &lt;1&gt;; /* ACC */</div><div class='del'>-	mediatek,mic-type-1 = &lt;3&gt;; /* DCC */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pio {</div><div class='del'>-	audio_default_pins: audio-default-pins {</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO107__FUNC_B0_I2SIN_MCK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO108__FUNC_B0_I2SIN_BCK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO109__FUNC_B0_I2SIN_WS&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO110__FUNC_I0_I2SIN_D0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO114__FUNC_O_I2SO2_MCK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO115__FUNC_B0_I2SO2_BCK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO116__FUNC_B0_I2SO2_WS&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO117__FUNC_O_I2SO2_D0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO118__FUNC_O_I2SO2_D1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO121__FUNC_B0_PCM_CLK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO122__FUNC_B0_PCM_SYNC&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO124__FUNC_I0_PCM_DI&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO125__FUNC_O_DMIC1_CLK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO126__FUNC_I0_DMIC1_DAT&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO128__FUNC_O_DMIC2_CLK&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO129__FUNC_I0_DMIC2_DAT&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dptx_pins: dptx-pins {</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO46__FUNC_I0_DP_TX_HPD&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {</div><div class='del'>-		pins1 {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO15__FUNC_B_GPIO15&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eth_default_pins: eth-default-pins {</div><div class='del'>-		pins-cc {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO139__FUNC_B0_GBE_TXC&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO140__FUNC_I0_GBE_RXC&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO141__FUNC_I0_GBE_RXDV&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO142__FUNC_O_GBE_TXEN&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-mdio {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO143__FUNC_O_GBE_MDC&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO144__FUNC_B1_GBE_MDIO&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-power {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO145__FUNC_B_GPIO145&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO146__FUNC_B_GPIO146&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-rxd {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO135__FUNC_I0_GBE_RXD3&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO136__FUNC_I0_GBE_RXD2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO137__FUNC_I0_GBE_RXD1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO138__FUNC_I0_GBE_RXD0&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-txd {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO131__FUNC_O_GBE_TXD3&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO132__FUNC_O_GBE_TXD2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO133__FUNC_O_GBE_TXD1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO134__FUNC_O_GBE_TXD0&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eth_sleep_pins: eth-sleep-pins {</div><div class='del'>-		pins-cc {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO139__FUNC_B_GPIO139&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO140__FUNC_B_GPIO140&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO141__FUNC_B_GPIO141&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO142__FUNC_B_GPIO142&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-mdio {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO143__FUNC_B_GPIO143&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO144__FUNC_B_GPIO144&gt;;</div><div class='del'>-			input-disable;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-rxd {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO135__FUNC_B_GPIO135&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO136__FUNC_B_GPIO136&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO137__FUNC_B_GPIO137&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO138__FUNC_B_GPIO138&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-txd {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO131__FUNC_B_GPIO131&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO132__FUNC_B_GPIO132&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO133__FUNC_B_GPIO133&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO134__FUNC_B_GPIO134&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c0_pins: i2c0-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO56__FUNC_B1_SDA0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO55__FUNC_B1_SCL0&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c1_pins: i2c1-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO58__FUNC_B1_SDA1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO57__FUNC_B1_SCL1&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c2_pins: i2c2-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO60__FUNC_B1_SDA2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO59__FUNC_B1_SCL2&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c3_pins: i2c3-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO62__FUNC_B1_SDA3&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO61__FUNC_B1_SCL3&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c4_pins: i2c4-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO64__FUNC_B1_SDA4&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO63__FUNC_B1_SCL4&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c5_pins: i2c5-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO66__FUNC_B1_SDA5&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO65__FUNC_B1_SCL5&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c6_pins: i2c6-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO68__FUNC_B1_SDA6&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO67__FUNC_B1_SCL6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='del'>-			drive-strength-microamp = &lt;1000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio_key_pins: gpio-key-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO42__FUNC_B1_KPCOL0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO43__FUNC_B1_KPCOL1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO44__FUNC_B1_KPROW0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc0_default_pins: mmc0-default-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-rst {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc0_uhs_pins: mmc0-uhs-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-ds {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO162__FUNC_B0_MSDC0_DSL&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-rst {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc1_default_pins: mmc1-default-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO164__FUNC_B1_MSDC1_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO163__FUNC_B1_MSDC1_CMD&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-insert {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO2__FUNC_B_GPIO2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc1_uhs_pins: mmc1-uhs-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO164__FUNC_B1_MSDC1_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO163__FUNC_B1_MSDC1_CMD&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc2_default_pins: mmc2-default-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO170__FUNC_B1_MSDC2_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;4&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO169__FUNC_B1_MSDC2_CMD&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-pcm {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO123__FUNC_O_PCM_DO&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc2_uhs_pins: mmc2-uhs-pins {</div><div class='del'>-		pins-clk {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO170__FUNC_B1_MSDC2_CLK&gt;;</div><div class='del'>-			drive-strength = &lt;4&gt;;</div><div class='del'>-			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-cmd-dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO169__FUNC_B1_MSDC2_CMD&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc2_eint_pins: mmc2-eint-pins {</div><div class='del'>-		pins-dat1 {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO172__FUNC_B_GPIO172&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc2_dat1_pins: mmc2-dat1-pins {</div><div class='del'>-		pins-dat1 {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			drive-strength = &lt;6&gt;;</div><div class='del'>-			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel_default_pins: panel-default-pins {</div><div class='del'>-		pins-dcdc {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO45__FUNC_B_GPIO45&gt;;</div><div class='del'>-			output-low;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-en {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO111__FUNC_B_GPIO111&gt;;</div><div class='del'>-			output-low;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-rst {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO25__FUNC_B_GPIO25&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rt1715_int_pins: rt1715-int-pins {</div><div class='del'>-		pins_cmd0_dat {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO12__FUNC_B_GPIO12&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-			input-enable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spi0_pins: spi0-pins {</div><div class='del'>-		pins-spi {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO69__FUNC_O_SPIM0_CSB&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO70__FUNC_O_SPIM0_CLK&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO72__FUNC_B0_SPIM0_MISO&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spi1_pins: spi1-pins {</div><div class='del'>-		pins-spi {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO75__FUNC_O_SPIM1_CSB&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO76__FUNC_O_SPIM1_CLK&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO78__FUNC_B0_SPIM1_MISO&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spi2_pins: spi2-pins {</div><div class='del'>-		pins-spi {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO79__FUNC_O_SPIM2_CSB&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO80__FUNC_O_SPIM2_CLK&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI&gt;,</div><div class='del'>-				&lt;PINMUX_GPIO82__FUNC_B0_SPIM2_MISO&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	touch_pins: touch-pins {</div><div class='del'>-		pins-irq {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO6__FUNC_B_GPIO6&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-reset {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO5__FUNC_B_GPIO5&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart0_pins: uart0-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO31__FUNC_O_UTXD0&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO32__FUNC_I1_URXD0&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart1_pins: uart1-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO33__FUNC_O_UTXD1&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO34__FUNC_I1_URXD1&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uart2_pins: uart2-pins {</div><div class='del'>-		pins {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO35__FUNC_O_UTXD2&gt;,</div><div class='del'>-				 &lt;PINMUX_GPIO36__FUNC_I1_URXD2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb_default_pins: usb-default-pins {</div><div class='del'>-		pins-iddig {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO83__FUNC_B_GPIO83&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-valid {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO85__FUNC_I0_VBUSVALID&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-vbus {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO84__FUNC_O_USB_DRVVBUS&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb1_default_pins: usb1-default-pins {</div><div class='del'>-		pins-valid {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P&gt;;</div><div class='del'>-			input-enable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins-usb-hub-3v3-en {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO112__FUNC_B_GPIO112&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wifi_pwrseq_pins: wifi-pwrseq-pins {</div><div class='del'>-		pins-wifi-enable {</div><div class='del'>-			pinmux = &lt;PINMUX_GPIO127__FUNC_B_GPIO127&gt;;</div><div class='del'>-			output-low;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pmic {</div><div class='del'>-	interrupt-parent = &lt;&amp;pio&gt;;</div><div class='del'>-	interrupts = &lt;222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;scp {</div><div class='del'>-	memory-region = &lt;&amp;scp_mem&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart1 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi2_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	mediatek,pad-select = &lt;0&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u3phy0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u3phy1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u3phy2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;xhci0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xhci1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='del'>-	vbus-supply = &lt;&amp;usb_hub_reset_1v8&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;xhci2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi<br/>new file mode 100644<br/>index 000000000000..a2cdecd2b903<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1370 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 MediaTek Inc.</div><div class='add'>+ * Author: Chris Chen &lt;chris-qj.chen@mediatek.com&gt;</div><div class='add'>+ *         Pablo Sun &lt;pablo.sun@mediatek.com&gt;</div><div class='add'>+ *         Macpaul Lin &lt;macpaul.lin@mediatek.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Collabora Ltd.</div><div class='add'>+ *                    Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;</div><div class='add'>+ *                    AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;   </div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "mt6359.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/mediatek,mt6360-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		dsi0 = &amp;disp_dsi0;</div><div class='add'>+		ethernet0 = &amp;eth;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c5 = &amp;i2c5;</div><div class='add'>+		i2c6 = &amp;i2c6;</div><div class='add'>+		mmc0 = &amp;mmc0;</div><div class='add'>+		mmc1 = &amp;mmc1;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_lcm1: backlight-lcm1 {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 1023&gt;;</div><div class='add'>+		default-brightness-level = &lt;576&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;1023&gt;;</div><div class='add'>+		power-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+		pwms = &lt;&amp;disp_pwm1 0 500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:921600n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic_codec: dmic-codec {</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		num-channels = &lt;2&gt;;</div><div class='add'>+		wakeup-delay-ms = &lt;30&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		optee {</div><div class='add'>+			compatible = "linaro,optee-tz";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * 12 MiB reserved for OP-TEE (BL32)</div><div class='add'>+		 * +-----------------------+ 0x43e0_0000</div><div class='add'>+		 * |      SHMEM 2MiB       |</div><div class='add'>+		 * +-----------------------+ 0x43c0_0000</div><div class='add'>+		 * |        | TA_RAM  8MiB |</div><div class='add'>+		 * + TZDRAM +--------------+ 0x4340_0000</div><div class='add'>+		 * |        | TEE_RAM 2MiB |</div><div class='add'>+		 * +-----------------------+ 0x4320_0000</div><div class='add'>+		 */</div><div class='add'>+		optee_reserved: optee@43200000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0 0x43200000 0 0x00c00000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scp_mem: memory@50000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x50000000 0 0x2900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */</div><div class='add'>+		bl31_secmon_reserved: memory@54600000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0 0x54600000 0x0 0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apu_mem: memory@55000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x55000000 0 0x1400000&gt;; /* 20 MB */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpu_mem: memory@57000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x57000000 0 0x1400000&gt;; /* 20 MB */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: memory@60000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60000000 0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		afe_dma_mem: memory@60f00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60f00000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_dma_mem: memory@61000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x61000000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	common_fixed_5v: regulator-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_panel_fixed_3v3: regulator-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vedp_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_panel_3v3_en_pins&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_fixed_3v3: regulator-2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ext_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* system wide 4.2V power rail from charger */</div><div class='add'>+	reg_vsys: regulator-vsys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* used by mmc2 */</div><div class='add'>+	sdio_fixed_1v8: regulator-3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vio18_conn";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* used by mmc2 */</div><div class='add'>+	sdio_fixed_3v3: regulator-4 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "wifi_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 74 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch0_fixed_3v3: regulator-5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vio33_tp1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 119 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_vreg_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_hub_fixed_3v3: regulator-6 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vhub_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 112 GPIO_ACTIVE_HIGH&gt;; /* HUB_3V3_EN */</div><div class='add'>+		startup-delay-us = &lt;10000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_p0_vbus: regulator-7 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus_p0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 84 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_p1_vbus: regulator-8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus_p1";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;pio 87 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* used by ssusb2 */</div><div class='add'>+	usb_p2_vbus: regulator-9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus_p2";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcm1_iovcc: regulator-vio18-lcm1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vio18_lcm1";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 111 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsi0_vreg_en_pins&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcm1_vddp: regulator-vsys-lcm1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_lcm1";</div><div class='add'>+		regulator-min-microvolt = &lt;4200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;reg_vsys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adsp {</div><div class='add'>+	memory-region = &lt;&amp;adsp_dma_mem&gt;, &lt;&amp;adsp_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "startek,kd070fhfid078", "himax,hx8279";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcm1&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 45 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;lcm1_iovcc&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;lcm1_vddp&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_default_pins&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsi0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;disp_pwm1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dither0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;postmask0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gamma0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;postmask0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@5d {</div><div class='add'>+		compatible = "goodix,gt9271";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 6 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;pio 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;touch0_fixed_3v3&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;mt6359_vio18_ldo_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@48 {</div><div class='add'>+		compatible = "ite,it5205";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		vcc-supply = &lt;&amp;mt6359_vcn33_1_bt_ldo_reg&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			it5205_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;typec_sbu_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rt1715@4e {</div><div class='add'>+		compatible = "richtek,rt1715";</div><div class='add'>+		reg = &lt;0x4e&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tcpci_int_pins&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;usb_p1_vbus&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			try-power-role  = "sink";</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x03 0x00 0x01 0x08&gt;;</div><div class='add'>+</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 2000,</div><div class='add'>+					       PDO_FIXED_DUAL_ROLE |</div><div class='add'>+					       PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 2000,</div><div class='add'>+						 PDO_FIXED_DUAL_ROLE |</div><div class='add'>+						 PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+</div><div class='add'>+			altmodes {</div><div class='add'>+				displayport {</div><div class='add'>+					svid = /bits/ 16 &lt;0xff01&gt;;</div><div class='add'>+					vdo = &lt;0x001c1c47&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					typec_con_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mtu3_hs1_role_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					typec_con_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;xhci_ss_ep&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					typec_sbu_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;it5205_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfg0 {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mfg1 {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vsram_others_ldo_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_tx_config0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc0_default_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc0_uhs_pins&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	supports-cqe;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	hs400-ds-delay = &lt;0x1481b&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;mt6359_vemc_1_ldo_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;mt6359_vufs_ldo_reg&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc1_default_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc1_uhs_pins&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	cd-gpios = &lt;&amp;pio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;mt6359_vpa_buck_reg&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;mt6359_vsim1_ldo_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vbbck_ldo_reg {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vcn18_ldo_reg {</div><div class='add'>+	regulator-name = "vcn18_pmu";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vcn33_2_bt_ldo_reg {</div><div class='add'>+	regulator-name = "vcn33_2_pmu";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vcore_buck_reg {</div><div class='add'>+	regulator-name = "dvdd_proc_l";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vgpu11_buck_reg {</div><div class='add'>+	regulator-name = "dvdd_core";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vpa_buck_reg {</div><div class='add'>+	regulator-name = "vpa_pmu";</div><div class='add'>+	regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vproc2_buck_reg {</div><div class='add'>+	/* The name "vgpu" is required by mtk-regulator-coupler */</div><div class='add'>+	regulator-name = "vgpu";</div><div class='add'>+	regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+	regulator-coupled-with = &lt;&amp;mt6359_vsram_others_ldo_reg&gt;;</div><div class='add'>+	regulator-coupled-max-spread = &lt;6250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vpu_buck_reg {</div><div class='add'>+	regulator-name = "dvdd_adsp";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vrf12_ldo_reg {</div><div class='add'>+	regulator-name = "va12_abb2_pmu";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vsim1_ldo_reg {</div><div class='add'>+	regulator-name = "vsim1_pmu";</div><div class='add'>+	regulator-enable-ramp-delay = &lt;480&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vsram_others_ldo_reg {</div><div class='add'>+	/* The name "vsram_gpu" is required by mtk-regulator-coupler */</div><div class='add'>+	regulator-name = "vsram_gpu";</div><div class='add'>+	regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+	regulator-coupled-with = &lt;&amp;mt6359_vproc2_buck_reg&gt;;</div><div class='add'>+	regulator-coupled-max-spread = &lt;6250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359_vufs_ldo_reg {</div><div class='add'>+	regulator-name = "vufs18_pmu";</div><div class='add'>+	regulator-always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mt6359codec {</div><div class='add'>+	mediatek,mic-type-0 = &lt;1&gt;; /* ACC */</div><div class='add'>+	mediatek,mic-type-1 = &lt;3&gt;; /* DCC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ovl0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;vdosys0_ep_main&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_default_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciephy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pio {</div><div class='add'>+	audio_default_pins: audio-default-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO107__FUNC_B0_I2SIN_MCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO108__FUNC_B0_I2SIN_BCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO109__FUNC_B0_I2SIN_WS&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO110__FUNC_I0_I2SIN_D0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO114__FUNC_O_I2SO2_MCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO115__FUNC_B0_I2SO2_BCK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO116__FUNC_B0_I2SO2_WS&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO117__FUNC_O_I2SO2_D0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO118__FUNC_O_I2SO2_D1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO121__FUNC_B0_PCM_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO122__FUNC_B0_PCM_SYNC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO124__FUNC_I0_PCM_DI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO125__FUNC_O_DMIC1_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO126__FUNC_I0_DMIC1_DAT&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO128__FUNC_O_DMIC2_CLK&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO129__FUNC_I0_DMIC2_DAT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	disp_pwm1_pins: disp-pwm1-pins {</div><div class='add'>+		pins-pwm {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO30__FUNC_O_DISP_PWM1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dptx_pins: dptx-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO46__FUNC_I0_DP_TX_HPD&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO15__FUNC_B_GPIO15&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_default_pins: eth-default-pins {</div><div class='add'>+		pins-cc {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO139__FUNC_B0_GBE_TXC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO140__FUNC_I0_GBE_RXC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO141__FUNC_I0_GBE_RXDV&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO142__FUNC_O_GBE_TXEN&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-mdio {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO143__FUNC_O_GBE_MDC&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO144__FUNC_B1_GBE_MDIO&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-power {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO145__FUNC_B_GPIO145&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO146__FUNC_B_GPIO146&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rxd {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO135__FUNC_I0_GBE_RXD3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO136__FUNC_I0_GBE_RXD2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO137__FUNC_I0_GBE_RXD1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO138__FUNC_I0_GBE_RXD0&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-txd {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO131__FUNC_O_GBE_TXD3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO132__FUNC_O_GBE_TXD2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO133__FUNC_O_GBE_TXD1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO134__FUNC_O_GBE_TXD0&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_sleep_pins: eth-sleep-pins {</div><div class='add'>+		pins-cc {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO139__FUNC_B_GPIO139&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO140__FUNC_B_GPIO140&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO141__FUNC_B_GPIO141&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO142__FUNC_B_GPIO142&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-mdio {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO143__FUNC_B_GPIO143&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO144__FUNC_B_GPIO144&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rxd {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO135__FUNC_B_GPIO135&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO136__FUNC_B_GPIO136&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO137__FUNC_B_GPIO137&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO138__FUNC_B_GPIO138&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-txd {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO131__FUNC_B_GPIO131&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO132__FUNC_B_GPIO132&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO133__FUNC_B_GPIO133&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO134__FUNC_B_GPIO134&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO56__FUNC_B1_SDA0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO55__FUNC_B1_SCL0&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO58__FUNC_B1_SDA1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO57__FUNC_B1_SCL1&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO60__FUNC_B1_SDA2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO59__FUNC_B1_SCL2&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO62__FUNC_B1_SDA3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO61__FUNC_B1_SCL3&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_pins: i2c4-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO64__FUNC_B1_SDA4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO63__FUNC_B1_SCL4&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5_pins: i2c5-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO66__FUNC_B1_SDA5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO65__FUNC_B1_SCL5&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6_pins: i2c6-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO68__FUNC_B1_SDA6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO67__FUNC_B1_SCL6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PULL_SET_RSEL_011&gt;;</div><div class='add'>+			drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_key_pins: gpio-key-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO42__FUNC_B1_KPCOL0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO43__FUNC_B1_KPCOL1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO44__FUNC_B1_KPROW0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_default_pins: mmc0-default-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc0_uhs_pins: mmc0-uhs-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO157__FUNC_B1_MSDC0_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO156__FUNC_B1_MSDC0_CMD&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-ds {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO162__FUNC_B0_MSDC0_DSL&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO155__FUNC_O_MSDC0_RSTB&gt;;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_default_pins: mmc1-default-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO164__FUNC_B1_MSDC1_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO163__FUNC_B1_MSDC1_CMD&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-insert {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO2__FUNC_B_GPIO2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc1_uhs_pins: mmc1-uhs-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO164__FUNC_B1_MSDC1_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO163__FUNC_B1_MSDC1_CMD&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc2_default_pins: mmc2-default-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO170__FUNC_B1_MSDC2_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO169__FUNC_B1_MSDC2_CMD&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-pcm {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO123__FUNC_O_PCM_DO&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc2_uhs_pins: mmc2-uhs-pins {</div><div class='add'>+		pins-clk {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO170__FUNC_B1_MSDC2_CLK&gt;;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO169__FUNC_B1_MSDC2_CMD&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc2_eint_pins: mmc2-eint-pins {</div><div class='add'>+		pins-dat1 {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO172__FUNC_B_GPIO172&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc2_dat1_pins: mmc2-dat1-pins {</div><div class='add'>+		pins-dat1 {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi0_vreg_en_pins: dsi0-vreg-en-pins {</div><div class='add'>+		pins-pwr-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO111__FUNC_B_GPIO111&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_default_pins: panel-default-pins {</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO25__FUNC_B_GPIO25&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO45__FUNC_B_GPIO45&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_default_pins: pcie-default-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO47__FUNC_I1_WAKEN&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO48__FUNC_O_PERSTN&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO49__FUNC_B1_CLKREQN&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rt1715_int_pins: rt1715-int-pins {</div><div class='add'>+		pins_cmd0_dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO12__FUNC_B_GPIO12&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_pins: spi0-pins {</div><div class='add'>+		pins-spi {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO69__FUNC_O_SPIM0_CSB&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO70__FUNC_O_SPIM0_CLK&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO72__FUNC_B0_SPIM0_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1_pins: spi1-pins {</div><div class='add'>+		pins-spi {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO75__FUNC_O_SPIM1_CSB&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO76__FUNC_O_SPIM1_CLK&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO78__FUNC_B0_SPIM1_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2_pins: spi2-pins {</div><div class='add'>+		pins-spi {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO79__FUNC_O_SPIM2_CSB&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO80__FUNC_O_SPIM2_CLK&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI&gt;,</div><div class='add'>+				&lt;PINMUX_GPIO82__FUNC_B0_SPIM2_MISO&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_vreg_pins: touch-avdd-pins {</div><div class='add'>+		pins-power {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO120__FUNC_B_GPIO120&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_pins: touch-pins {</div><div class='add'>+		pins-irq {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO6__FUNC_B_GPIO6&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-reset {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO5__FUNC_B_GPIO5&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tcpci_int_pins: tcpci-int-pins {</div><div class='add'>+		pins-int-n {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO12__FUNC_B_GPIO12&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO31__FUNC_O_UTXD0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO32__FUNC_I1_URXD0&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1_pins: uart1-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO33__FUNC_O_UTXD1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO34__FUNC_I1_URXD1&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_pins: uart2-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO35__FUNC_O_UTXD2&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO36__FUNC_I1_URXD2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_default_pins: usb-default-pins {</div><div class='add'>+		pins-iddig {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO83__FUNC_B_GPIO83&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-valid {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO85__FUNC_I0_VBUSVALID&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-vbus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO84__FUNC_O_USB_DRVVBUS&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_default_pins: usb1-default-pins {</div><div class='add'>+		pins-valid {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-usb-hub-3v3-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO112__FUNC_B_GPIO112&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_default_pins: usb2-default-pins {</div><div class='add'>+		pins-iddig {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO89__FUNC_B_GPIO89&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq_pins: wifi-pwrseq-pins {</div><div class='add'>+		pins-wifi-enable {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO127__FUNC_B_GPIO127&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth {</div><div class='add'>+	phy-mode ="rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;ethernet_phy0&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth_default_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;eth_sleep_pins&gt;;</div><div class='add'>+	mediatek,mac-wol;</div><div class='add'>+	snps,reset-gpio = &lt;&amp;pio 147 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	snps,reset-delays-us = &lt;0 10000 10000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth_mdio {</div><div class='add'>+	ethernet_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmic {</div><div class='add'>+	interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+	interrupts = &lt;222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	mt6359keys: keys {</div><div class='add'>+		compatible = "mediatek,mt6359-keys";</div><div class='add'>+		mediatek,long-press-mode = &lt;1&gt;;</div><div class='add'>+		power-off-time-sec = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		home {</div><div class='add'>+			linux,keycodes = &lt;KEY_HOME&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;postmask0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;postmask0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scp_cluster {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scp_c0 {</div><div class='add'>+	memory-region = &lt;&amp;scp_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb";</div><div class='add'>+	model = "mt8390-evk";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;audio_default_pins&gt;;</div><div class='add'>+	audio-routing =</div><div class='add'>+		"Headphone", "Headphone L",</div><div class='add'>+		"Headphone", "Headphone R",</div><div class='add'>+		"DMIC_INPUT", "AP DMIC",</div><div class='add'>+		"AP DMIC", "AUDGLB",</div><div class='add'>+		"AP DMIC", "MIC_BIAS_0",</div><div class='add'>+		"AP DMIC", "MIC_BIAS_2";</div><div class='add'>+	mediatek,adsp = &lt;&amp;adsp&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	dai-link-0 {</div><div class='add'>+		link-name = "DL_SRC_BE";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;pmic 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai-link-1 {</div><div class='add'>+		link-name = "DMIC_BE";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;dmic_codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	mediatek,pad-select = &lt;0&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vdosys0 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys0_ep_main: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u3phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssusb0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb_default_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+		type = "micro";</div><div class='add'>+		id-gpios = &lt;&amp;pio 83 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;usb_p0_vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssusb1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_default_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		mtu3_hs1_role_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb451,8025";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;usb_hub_fixed_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb451,8027";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;usb_hub_fixed_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		xhci_ss_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;typec_con_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssusb2 {</div><div class='add'>+	/*</div><div class='add'>+	 * the ssusb2 controller is one but we got two ports : one is routed</div><div class='add'>+	 * to the M.2 slot, the other is on the RPi header who does support</div><div class='add'>+	 * full OTG.</div><div class='add'>+	 * As the controller is shared between them, the role switch default</div><div class='add'>+	 * mode is set to host to make any peripheral inserted in the M.2</div><div class='add'>+	 * slot (i.e BT/WIFI module) be detected when the other port is</div><div class='add'>+	 * unused.</div><div class='add'>+	 */</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	role-switch-default-mode = "host";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_default_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+		type = "micro";</div><div class='add'>+		id-gpios = &lt;&amp;pio 89 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;usb_p2_vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xhci2 {</div><div class='add'>+	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='add'>+	vbus-supply = &lt;&amp;sdio_fixed_3v3&gt;; /* wifi_3v3 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts<br/>index 1ef6262b65c9..cf8cd37f5708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts</a></div><div class='hunk'>@@ -79,9 +79,21 @@</div><div class='ctx'> 			reg = &lt;0 0x54600000 0x0 0x200000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		snd_dma_mem: memory@60000000 {</div><div class='add'>+		adsp_mem: memory@60000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0x60000000 0 0x1100000&gt;;</div><div class='add'>+			reg = &lt;0 0x60000000 0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		afe_dma_mem: memory@60f00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60f00000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_dma_mem: memory@61000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x61000000 0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -91,13 +103,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	backlight_lcd0: backlight-lcd0 {</div><div class='add'>+	backlight_lcm0: backlight-lcm0 {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;disp_pwm0 0 500000&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;pio 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		brightness-levels = &lt;0 1023&gt;;</div><div class='del'>-		num-interpolated-steps = &lt;1023&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;576&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;1023&gt;;</div><div class='add'>+		pwms = &lt;&amp;disp_pwm0 0 500000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight_lcd1: backlight-lcd1 {</div><div class='hunk'>@@ -107,6 +118,7 @@</div><div class='ctx'> 		brightness-levels = &lt;0 1023&gt;;</div><div class='ctx'> 		num-interpolated-steps = &lt;1023&gt;;</div><div class='ctx'> 		default-brightness-level = &lt;576&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	can_clk: can-clk {</div><div class='hunk'>@@ -150,6 +162,24 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	lcm0_iovcc: regulator-vio18-lcm0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vio18_lcm0";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pio 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsi0_vreg_en_pins&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;mt6360_ldo2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcm0_vddp: regulator-vsys-lcm0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_lcm0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;mt6360_ldo1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wifi_fixed_3v3: regulator-2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "wifi_3v3";</div><div class='hunk'>@@ -161,16 +191,77 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adsp {</div><div class='add'>+	memory-region = &lt;&amp;adsp_dma_mem&gt;, &lt;&amp;adsp_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;disp_pwm0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pwm0_default_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;disp_pwm0_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dither0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;gamma0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dmic_codec {</div><div class='ctx'> 	wakeup-delay-ms = &lt;200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "startek,kd070fhfid078", "himax,hx8279";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight_lcm0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 48 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 108 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;lcm0_iovcc&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;lcm0_vddp&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_default_pins&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsi0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi_panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;eth {</div><div class='ctx'> 	phy-mode ="rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;eth_phy0&gt;;</div><div class='hunk'>@@ -187,13 +278,22 @@</div><div class='ctx'> 		compatible = "snps,dwmac-mdio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		eth_phy0: eth-phy0@1 {</div><div class='add'>+		eth_phy0: ethernet-phy@1 {</div><div class='ctx'> 			compatible = "ethernet-phy-id001c.c916";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gamma0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dither0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;mt6315_7_vbuck1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='hunk'>@@ -224,6 +324,21 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@48 {</div><div class='add'>+		compatible = "ite,it5205";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;mt6359_vibr_ldo_reg&gt;;</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			it5205_sbu_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mt6360_ssusb_sbu_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='hunk'>@@ -330,6 +445,63 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		tcpc {</div><div class='add'>+			compatible = "mediatek,mt6360-tcpc";</div><div class='add'>+			interrupts-extended = &lt;&amp;pio 17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupt-names = "PD_IRQB";</div><div class='add'>+</div><div class='add'>+			connector {</div><div class='add'>+				compatible = "usb-c-connector";</div><div class='add'>+				label = "USB-C";</div><div class='add'>+				data-role = "dual";</div><div class='add'>+				op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+				power-role = "dual";</div><div class='add'>+				try-power-role = "sink";</div><div class='add'>+</div><div class='add'>+				source-pdos = &lt;PDO_FIXED(5000, 1000,</div><div class='add'>+							 PDO_FIXED_DUAL_ROLE |</div><div class='add'>+							 PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+				sink-pdos = &lt;PDO_FIXED(5000, 2000,</div><div class='add'>+						       PDO_FIXED_DUAL_ROLE |</div><div class='add'>+						       PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+</div><div class='add'>+				pd-revision = /bits/ 8 &lt;0x03 0x01 0x01 0x06&gt;;</div><div class='add'>+</div><div class='add'>+				altmodes {</div><div class='add'>+					displayport {</div><div class='add'>+						svid = /bits/ 16 &lt;0xff01&gt;;</div><div class='add'>+						vdo = &lt;0x00001c46&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						typec_con_hs: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mtu3_hs0_role_sw&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						typec_con_ss: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mtu3_ss0_role_sw&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						mt6360_ssusb_sbu_ep: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;it5205_sbu_ep&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -337,6 +509,14 @@</div><div class='ctx'> 	domain-supply = &lt;&amp;mt6315_7_vbuck1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mfg1 {</div><div class='add'>+	domain-supply = &lt;&amp;mt6359_vsram_others_ldo_reg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_tx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default", "state_uhs";</div><div class='hunk'>@@ -407,12 +587,22 @@</div><div class='ctx'> 	regulator-always-on;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* for GPU SRAM */</div><div class='add'>+&amp;mt6359_vsram_others_ldo_reg {</div><div class='add'>+	regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mt6359codec {</div><div class='ctx'> 	mediatek,mic-type-0 = &lt;1&gt;; /* ACC */</div><div class='ctx'> 	mediatek,mic-type-1 = &lt;3&gt;; /* DCC */</div><div class='ctx'> 	mediatek,mic-type-2 = &lt;1&gt;; /* ACC */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ovl0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;vdosys0_ep_main&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	pinctrl-names = "default", "idle";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie0_default_pins&gt;;</div><div class='hunk'>@@ -690,6 +880,25 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dsi0_vreg_en_pins: dsi0-vreg-en-pins {</div><div class='add'>+		pins-pwr-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO47__FUNC_GPIO47&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_default_pins: panel-default-pins {</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO108__FUNC_GPIO108&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO48__FUNC_GPIO48&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie0_default_pins: pcie0-default-pins {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO19__FUNC_WAKEN&gt;,</div><div class='hunk'>@@ -716,8 +925,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pwm0_default_pins: pwm0-default-pins {</div><div class='del'>-		pins-cmd-dat {</div><div class='add'>+	disp_pwm0_pins: disp-pwm0-pins {</div><div class='add'>+		pins-disp-pwm {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO97__FUNC_DISP_PWM0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -755,6 +964,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	u3_p0_vbus: u3-p0-vbus-default-pins {</div><div class='add'>+		pins-vbus {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO63__FUNC_VBUSVALID&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uart0_pins: uart0-pins {</div><div class='ctx'> 		pins {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO98__FUNC_UTXD0&gt;,</div><div class='hunk'>@@ -774,11 +990,47 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pmic {</div><div class='ctx'> 	interrupts-extended = &lt;&amp;pio 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	mt6359keys: keys {</div><div class='add'>+		compatible = "mediatek,mt6359-keys";</div><div class='add'>+		mediatek,long-press-mode = &lt;1&gt;;</div><div class='add'>+		power-off-time-sec = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		home {</div><div class='add'>+			linux,keycodes = &lt;KEY_HOME&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scp {</div><div class='ctx'> 	memory-region = &lt;&amp;scp_mem&gt;;</div><div class='add'>+	firmware-name = "mediatek/mt8195/scp.img";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8195_mt6359";</div><div class='add'>+	model = "mt8395-evk";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;audio_default_pins&gt;;</div><div class='add'>+	audio-routing =</div><div class='add'>+		"Headphone", "Headphone L",</div><div class='add'>+		"Headphone", "Headphone R";</div><div class='add'>+	mediatek,adsp = &lt;&amp;adsp&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	headphone-dai-link {</div><div class='add'>+		link-name = "DL_SRC_BE";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;pmic 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spi1 {</div><div class='hunk'>@@ -820,7 +1072,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -837,10 +1088,9 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='del'>-				regulator-min-microvolt = &lt;300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;546000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;787000&gt;;</div><div class='ctx'> 				regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='ctx'> 				regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -885,8 +1135,31 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ssusb0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;u3_p0_vbus&gt;;</div><div class='add'>+	usb-role-switch;</div><div class='ctx'> 	vusb33-supply = &lt;&amp;mt6359_vusb_ldo_reg&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			mtu3_hs0_role_sw: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;typec_con_hs&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			mtu3_ss0_role_sw: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;typec_con_ss&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ssusb2 {</div><div class='hunk'>@@ -899,6 +1172,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;vdosys0 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys0_ep_main: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;xhci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts b/arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts<br/>index e2e75b8ff918..d16f545cbbb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts</a></div><div class='hunk'>@@ -271,6 +271,7 @@</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;eth_default_pins&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;eth_sleep_pins&gt;;</div><div class='add'>+	mediatek,mac-wol;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='hunk'>@@ -351,7 +352,7 @@</div><div class='ctx'> 			LDO_VIN2-supply = &lt;&amp;vsys&gt;;</div><div class='ctx'> 			LDO_VIN3-supply = &lt;&amp;vsys&gt;;</div><div class='ctx'> </div><div class='del'>-			mt6360_buck1: BUCK1 {</div><div class='add'>+			mt6360_buck1: buck1 {</div><div class='ctx'> 				regulator-name = "emi_vdd2";</div><div class='ctx'> 				regulator-min-microvolt = &lt;600000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -361,7 +362,7 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_buck2: BUCK2 {</div><div class='add'>+			mt6360_buck2: buck2 {</div><div class='ctx'> 				regulator-name = "emi_vddq";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='hunk'>@@ -371,7 +372,7 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo1: LDO1 {</div><div class='add'>+			mt6360_ldo1: ldo1 {</div><div class='ctx'> 				regulator-name = "mt6360_ldo1"; /* Test point */</div><div class='ctx'> 				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -379,7 +380,7 @@</div><div class='ctx'> 							   MT6360_OPMODE_LP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo2: LDO2 {</div><div class='add'>+			mt6360_ldo2: ldo2 {</div><div class='ctx'> 				regulator-name = "panel1_p1v8";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -387,7 +388,7 @@</div><div class='ctx'> 							   MT6360_OPMODE_LP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo3: LDO3 {</div><div class='add'>+			mt6360_ldo3: ldo3 {</div><div class='ctx'> 				regulator-name = "vmc_pmu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -395,7 +396,7 @@</div><div class='ctx'> 							   MT6360_OPMODE_LP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo5: LDO5 {</div><div class='add'>+			mt6360_ldo5: ldo5 {</div><div class='ctx'> 				regulator-name = "vmch_pmu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -403,7 +404,7 @@</div><div class='ctx'> 							   MT6360_OPMODE_LP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo6: LDO6 {</div><div class='add'>+			mt6360_ldo6: ldo6 {</div><div class='ctx'> 				regulator-name = "mt6360_ldo6"; /* Test point */</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;2100000&gt;;</div><div class='hunk'>@@ -411,7 +412,7 @@</div><div class='ctx'> 							   MT6360_OPMODE_LP&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mt6360_ldo7: LDO7 {</div><div class='add'>+			mt6360_ldo7: ldo7 {</div><div class='ctx'> 				regulator-name = "emi_vmddr_en";</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso<br/>new file mode 100644<br/>index 000000000000..0389c9cb8581<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Radxa Display 8 HD touchscreen module</div><div class='add'>+ * Copyright (C) 2025 Collabora Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;backlight {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;disp_pwm0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_default_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "radxa,display-8hd-ad002", "jadard,jd9365da-h3";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;mt6359_vcn33_2_bt_ldo_reg&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;mt6360_ldo2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 108 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_default_pins&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dsi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pio 132 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;pio 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pio 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;mt6359_vcn33_2_bt_ldo_reg&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_pins&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_tx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ovl0_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;vdosys0_ep_main&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vdosys0 {</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdosys0_ep_main: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;ovl0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts<br/>index 14ec970c4e49..d32f973f5e05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include "mt8195.dtsi"</div><div class='ctx'> #include "mt6359.dtsi"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/mt8195-pinfunc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/mediatek,mt6360-regulator.h&gt;</div><div class='hunk'>@@ -48,6 +49,30 @@</div><div class='ctx'> 		reg = &lt;0 0x40000000 0x1 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 1023&gt;;</div><div class='add'>+		default-brightness-level = &lt;576&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pio 107 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;1023&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsi0_backlight_pins&gt;;</div><div class='add'>+		pwms = &lt;&amp;disp_pwm0 0 500000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-volume-up {</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;100&gt;;</div><div class='add'>+			gpios = &lt;&amp;pio 106 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "volume_up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wifi_vreg: regulator-wifi-3v3-en {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "wifi_3v3_en";</div><div class='hunk'>@@ -127,9 +152,21 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		afe_mem: memory@60000000 {</div><div class='add'>+		adsp_mem: memory@60000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x60000000 0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		afe_dma_mem: memory@60f00000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0x60000000 0 0x1100000&gt;;</div><div class='add'>+			reg = &lt;0 0x60f00000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_dma_mem: memory@61000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0 0x61000000 0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +177,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adsp {</div><div class='add'>+	memory-region = &lt;&amp;adsp_dma_mem&gt;, &lt;&amp;adsp_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;afe {</div><div class='add'>+	memory-region = &lt;&amp;afe_dma_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;mt6359_vcore_buck_reg&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -172,6 +219,32 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;mt6315_6_vbuck1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dither0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dsi0_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dither0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dsi0_out: endpoint { };</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;eth {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='hunk'>@@ -476,6 +549,25 @@</div><div class='ctx'> &amp;pio {</div><div class='ctx'> 	mediatek,rsel-resistance-in-si-unit;</div><div class='ctx'> </div><div class='add'>+	audio_default_pins: audio-default-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO69__FUNC_AUD_CLK_MOSI&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO73__FUNC_AUD_DAT_MISO0&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO74__FUNC_AUD_DAT_MISO1&gt;,</div><div class='add'>+				 &lt;PINMUX_GPIO75__FUNC_AUD_DAT_MISO2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi0_backlight_pins: dsi0-backlight-pins {</div><div class='add'>+		pins-backlight-en {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO107__FUNC_GPIO107&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	eth_default_pins: eth-default-pins {</div><div class='ctx'> 		pins-cc {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO85__FUNC_GBE_TXC&gt;,</div><div class='hunk'>@@ -547,6 +639,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio_key_pins: gpio-keys-pins {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO106__FUNC_GPIO106&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c2_pins: i2c2-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO12__FUNC_SDA2&gt;,</div><div class='hunk'>@@ -673,6 +773,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	panel_default_pins: panel-pins {</div><div class='add'>+		pins-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO108__FUNC_GPIO108&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie0_default_pins: pcie0-default-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO19__FUNC_WAKEN&gt;,</div><div class='hunk'>@@ -691,6 +798,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pwm0_default_pins: pwm0-pins {</div><div class='add'>+		pins-disp-pwm {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO97__FUNC_DISP_PWM0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	spi1_pins: spi1-default-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO136__FUNC_SPIM1_CSB&gt;,</div><div class='hunk'>@@ -711,6 +824,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	touch_pins: touch-pins {</div><div class='add'>+		pins-touch-int {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO132__FUNC_GPIO132&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-touch-rst {</div><div class='add'>+			pinmux = &lt;PINMUX_GPIO133__FUNC_GPIO133&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	uart0_pins: uart0-pins {</div><div class='ctx'> 		pins-bus {</div><div class='ctx'> 			pinmux = &lt;PINMUX_GPIO98__FUNC_UTXD0&gt;,</div><div class='hunk'>@@ -775,13 +901,49 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pmic {</div><div class='ctx'> 	interrupts-extended = &lt;&amp;pio 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	mt6359keys: keys {</div><div class='add'>+		compatible = "mediatek,mt6359-keys";</div><div class='add'>+		mediatek,long-press-mode = &lt;1&gt;;</div><div class='add'>+		power-off-time-sec = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		power-key {</div><div class='add'>+			linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		home {</div><div class='add'>+			linux,keycodes = &lt;KEY_HOME&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scp {</div><div class='ctx'> 	memory-region = &lt;&amp;scp_mem&gt;;</div><div class='add'>+	firmware-name = "mediatek/mt8195/scp.img";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "mediatek,mt8195_mt6359";</div><div class='add'>+	model = "mt8395-evk";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;audio_default_pins&gt;;</div><div class='add'>+	audio-routing =</div><div class='add'>+		"Headphone", "Headphone L",</div><div class='add'>+		"Headphone", "Headphone R";</div><div class='add'>+	mediatek,adsp = &lt;&amp;adsp&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	headphone-dai-link {</div><div class='add'>+		link-name = "DL_SRC_BE";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;pmic 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi1 {</div><div class='ctx'> 	/* Exposed at 40 pin connector */</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spi1_pins&gt;;</div><div class='hunk'>@@ -812,7 +974,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_6_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vbcpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -829,7 +990,6 @@</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			mt6315_7_vbuck1: vbuck1 {</div><div class='del'>-				regulator-compatible = "vbuck1";</div><div class='ctx'> 				regulator-name = "Vgpu";</div><div class='ctx'> 				regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1193750&gt;;</div><div class='hunk'>@@ -866,6 +1026,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ufshci {</div><div class='add'>+	vcc-supply = &lt;&amp;mt6359_vemc_1_ldo_reg&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;mt6359_vufs_ldo_reg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufsphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ssusb0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;usb3_port0_pins&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts<br/>index cce642c53812..3d3db33a64dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Pumpkin MT8516";</div><div class='del'>-	compatible = "mediatek,mt8516";</div><div class='add'>+	compatible = "mediatek,mt8516-pumpkin", "mediatek,mt8516";</div><div class='ctx'> </div><div class='ctx'> 	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi<br/>index d0b03dc4d3f4..b5e753759465 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/mt8516.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/mt8516.dtsi</a></div><div class='hunk'>@@ -144,10 +144,10 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		/* 128 KiB reserved for ARM Trusted Firmware (BL31) */</div><div class='add'>+		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */</div><div class='ctx'> 		bl31_secmon_reserved: secmon@43000000 {</div><div class='ctx'> 			no-map;</div><div class='del'>-			reg = &lt;0 0x43000000 0 0x20000&gt;;</div><div class='add'>+			reg = &lt;0 0x43000000 0 0x30000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +206,7 @@</div><div class='ctx'> 			compatible = "mediatek,mt8516-wdt",</div><div class='ctx'> 				     "mediatek,mt6589-wdt";</div><div class='ctx'> 			reg = &lt;0 0x10007000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 198 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -220,6 +220,17 @@</div><div class='ctx'> 			clock-names = "clk13m", "bus";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		keypad: keypad@10002000 {</div><div class='add'>+			compatible = "mediatek,mt8516-keypad",</div><div class='add'>+				     "mediatek,mt6779-keypad";</div><div class='add'>+			reg = &lt;0 0x10002000 0 0x1000&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			interrupts = &lt;GIC_SPI 149 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+			clock-names = "kpd";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		syscfg_pctl: syscfg-pctl@10005000 {</div><div class='ctx'> 			compatible = "syscon";</div><div class='ctx'> 			reg = &lt;0 0x10005000 0 0x1000&gt;;</div><div class='hunk'>@@ -268,7 +279,7 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0 0x10310000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x10320000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1032f000 0 0x2000&gt;,</div><div class='ctx'> 			      &lt;0 0x10340000 0 0x2000&gt;,</div><div class='ctx'> 			      &lt;0 0x10360000 0 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9</div><div class='hunk'>@@ -344,6 +355,7 @@</div><div class='ctx'> 			reg = &lt;0 0x11009000 0 0x90&gt;,</div><div class='ctx'> 			      &lt;0 0x11000180 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;topckgen CLK_TOP_I2C0&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_APDMA&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='hunk'>@@ -358,6 +370,7 @@</div><div class='ctx'> 			reg = &lt;0 0x1100a000 0 0x90&gt;,</div><div class='ctx'> 			      &lt;0 0x11000200 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;topckgen CLK_TOP_I2C1&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_APDMA&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='hunk'>@@ -372,6 +385,7 @@</div><div class='ctx'> 			reg = &lt;0 0x1100b000 0 0x90&gt;,</div><div class='ctx'> 			      &lt;0 0x11000280 0 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;topckgen CLK_TOP_I2C2&gt;,</div><div class='ctx'> 				 &lt;&amp;topckgen CLK_TOP_APDMA&gt;;</div><div class='ctx'> 			clock-names = "main", "dma";</div><div class='head'>diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi<br/>index ec8dfb3d1c6d..805fb82138a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi</a></div><div class='hunk'>@@ -47,7 +47,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c0 {</div><div class='del'>-	clock-div = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -156,7 +155,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='del'>-	clock-div = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2_pins_a&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -200,8 +198,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pio {</div><div class='del'>-	gpio_keys_default: gpiodefault {</div><div class='del'>-		pins_cmd_dat {</div><div class='add'>+	gpio_keys_default: gpio-keys-pins {</div><div class='add'>+		pins-cmd-dat {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_42_KPCOL0__FUNC_GPIO42&gt;,</div><div class='ctx'> 				 &lt;MT8516_PIN_43_KPCOL1__FUNC_GPIO43&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='hunk'>@@ -209,7 +207,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c0_pins_a: i2c0 {</div><div class='add'>+	i2c0_pins_a: i2c0-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_58_SDA0__FUNC_SDA0_0&gt;,</div><div class='ctx'> 				 &lt;MT8516_PIN_59_SCL0__FUNC_SCL0_0&gt;;</div><div class='hunk'>@@ -217,7 +215,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c2_pins_a: i2c2 {</div><div class='add'>+	i2c2_pins_a: i2c2-pins {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_60_SDA2__FUNC_SDA2_0&gt;,</div><div class='ctx'> 				 &lt;MT8516_PIN_61_SCL2__FUNC_SCL2_0&gt;;</div><div class='hunk'>@@ -225,21 +223,21 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	tca6416_pins: pinmux_tca6416_pins {</div><div class='del'>-		gpio_mux_rst_n_pin {</div><div class='add'>+	tca6416_pins: tca6416-pins {</div><div class='add'>+		pins-mux-rstn {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_65_UTXD1__FUNC_GPIO65&gt;;</div><div class='ctx'> 			output-high;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio_mux_int_n_pin {</div><div class='add'>+		pins-mux-intn {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_64_URXD1__FUNC_GPIO64&gt;;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ethernet_pins_default: ethernet {</div><div class='del'>-		pins_ethernet {</div><div class='add'>+	ethernet_pins_default: ethernet-pins {</div><div class='add'>+		pins-eth {</div><div class='ctx'> 			pinmux = &lt;MT8516_PIN_0_EINT0__FUNC_EXT_TXD0&gt;,</div><div class='ctx'> 				 &lt;MT8516_PIN_1_EINT1__FUNC_EXT_TXD1&gt;,</div><div class='ctx'> 				 &lt;MT8516_PIN_5_EINT5__FUNC_EXT_RXER&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi<br/>index 32bb76b3202a..83bf5c81b5f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi</a></div><div class='hunk'>@@ -12,10 +12,12 @@</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu1 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi<br/>index ecd171b2feba..24133528b8e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi</a></div><div class='hunk'>@@ -32,11 +32,6 @@</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#address-cells = &lt;0&gt;;</div><div class='del'>-			ppi-partitions {</div><div class='del'>-				ppi_cluster0: interrupt-partition-0 {</div><div class='del'>-					affinity = &lt;&amp;cpu0 &amp;cpu1 &amp;cpu2 &amp;cpu3&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -47,17 +42,13 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		rstc: reset-controller@f0801000 {</div><div class='add'>+		clk: rstc: reset-controller@f0801000 {</div><div class='ctx'> 			compatible = "nuvoton,npcm845-reset";</div><div class='del'>-			reg = &lt;0x0 0xf0801000 0x0 0x78&gt;;</div><div class='del'>-			#reset-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf0801000 0x0 0xC4&gt;;</div><div class='ctx'> 			nuvoton,sysgcr = &lt;&amp;gcr&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clk: clock-controller@f0801000 {</div><div class='del'>-			compatible = "nuvoton,npcm845-clk";</div><div class='add'>+			#reset-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;0x0 0xf0801000 0x0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apb {</div><div class='hunk'>@@ -81,7 +72,7 @@</div><div class='ctx'> 				compatible = "nuvoton,npcm845-timer";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				reg = &lt;0x8000 0x1C&gt;;</div><div class='del'>-				clocks = &lt;&amp;clk NPCM8XX_CLK_REFCLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				clock-names = "refclk";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -153,7 +144,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				reg = &lt;0x801c 0x4&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='del'>-				clocks = &lt;&amp;clk NPCM8XX_CLK_REFCLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				syscon = &lt;&amp;gcr&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +153,7 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				reg = &lt;0x901c 0x4&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='del'>-				clocks = &lt;&amp;clk NPCM8XX_CLK_REFCLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				syscon = &lt;&amp;gcr&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -171,9 +162,723 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				reg = &lt;0xa01c 0x4&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='del'>-				clocks = &lt;&amp;clk NPCM8XX_CLK_REFCLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;refclk&gt;;</div><div class='ctx'> 				syscon = &lt;&amp;gcr&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pinctrl: pinctrl@f0010000 {</div><div class='add'>+		compatible = "nuvoton,npcm845-pinctrl";</div><div class='add'>+		ranges = &lt;0x0 0x0 0xf0010000 0x8000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		nuvoton,sysgcr = &lt;&amp;gcr&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+		gpio0: gpio@f0010000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x0 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio1: gpio@f0011000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x1000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 32 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio2: gpio@f0012000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x2000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 64 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio3: gpio@f0013000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x3000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 96 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio4: gpio@f0014000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x4000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 128 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio5: gpio@f0015000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x5000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 160 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio6: gpio@f0016000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x6000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 192 32&gt;;</div><div class='add'>+		};</div><div class='add'>+		gpio7: gpio@f0017000 {</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x7000 0xB0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 224 32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		iox1_pins: iox1-mux {</div><div class='add'>+			groups = "iox1";</div><div class='add'>+			function = "iox1";</div><div class='add'>+		};</div><div class='add'>+		iox2_pins: iox2-mux {</div><div class='add'>+			groups = "iox2";</div><div class='add'>+			function = "iox2";</div><div class='add'>+		};</div><div class='add'>+		smb1d_pins: smb1d-mux {</div><div class='add'>+			groups = "smb1d";</div><div class='add'>+			function = "smb1d";</div><div class='add'>+		};</div><div class='add'>+		smb2d_pins: smb2d-mux {</div><div class='add'>+			groups = "smb2d";</div><div class='add'>+			function = "smb2d";</div><div class='add'>+		};</div><div class='add'>+		lkgpo1_pins: lkgpo1-mux {</div><div class='add'>+			groups = "lkgpo1";</div><div class='add'>+			function = "lkgpo1";</div><div class='add'>+		};</div><div class='add'>+		lkgpo2_pins: lkgpo2-mux {</div><div class='add'>+			groups = "lkgpo2";</div><div class='add'>+			function = "lkgpo2";</div><div class='add'>+		};</div><div class='add'>+		ioxh_pins: ioxh-mux {</div><div class='add'>+			groups = "ioxh";</div><div class='add'>+			function = "ioxh";</div><div class='add'>+		};</div><div class='add'>+		gspi_pins: gspi-mux {</div><div class='add'>+			groups = "gspi";</div><div class='add'>+			function = "gspi";</div><div class='add'>+		};</div><div class='add'>+		smb5b_pins: smb5b-mux {</div><div class='add'>+			groups = "smb5b";</div><div class='add'>+			function = "smb5b";</div><div class='add'>+		};</div><div class='add'>+		smb5c_pins: smb5c-mux {</div><div class='add'>+			groups = "smb5c";</div><div class='add'>+			function = "smb5c";</div><div class='add'>+		};</div><div class='add'>+		lkgpo0_pins: lkgpo0-mux {</div><div class='add'>+			groups = "lkgpo0";</div><div class='add'>+			function = "lkgpo0";</div><div class='add'>+		};</div><div class='add'>+		pspi_pins: pspi-mux {</div><div class='add'>+			groups = "pspi";</div><div class='add'>+			function = "pspi";</div><div class='add'>+		};</div><div class='add'>+		jm1_pins: jm1-mux {</div><div class='add'>+			groups = "jm1";</div><div class='add'>+			function = "jm1";</div><div class='add'>+		};</div><div class='add'>+		jm2_pins: jm2-mux {</div><div class='add'>+			groups = "jm2";</div><div class='add'>+			function = "jm2";</div><div class='add'>+		};</div><div class='add'>+		smb4b_pins: smb4b-mux {</div><div class='add'>+			groups = "smb4b";</div><div class='add'>+			function = "smb4b";</div><div class='add'>+		};</div><div class='add'>+		smb4c_pins: smb4c-mux {</div><div class='add'>+			groups = "smb4c";</div><div class='add'>+			function = "smb4c";</div><div class='add'>+		};</div><div class='add'>+		smb15_pins: smb15-mux {</div><div class='add'>+			groups = "smb15";</div><div class='add'>+			function = "smb15";</div><div class='add'>+		};</div><div class='add'>+		smb16_pins: smb16-mux {</div><div class='add'>+			groups = "smb16";</div><div class='add'>+			function = "smb16";</div><div class='add'>+		};</div><div class='add'>+		smb17_pins: smb17-mux {</div><div class='add'>+			groups = "smb17";</div><div class='add'>+			function = "smb17";</div><div class='add'>+		};</div><div class='add'>+		smb18_pins: smb18-mux {</div><div class='add'>+			groups = "smb18";</div><div class='add'>+			function = "smb18";</div><div class='add'>+		};</div><div class='add'>+		smb19_pins: smb19-mux {</div><div class='add'>+			groups = "smb19";</div><div class='add'>+			function = "smb19";</div><div class='add'>+		};</div><div class='add'>+		smb20_pins: smb20-mux {</div><div class='add'>+			groups = "smb20";</div><div class='add'>+			function = "smb20";</div><div class='add'>+		};</div><div class='add'>+		smb21_pins: smb21-mux {</div><div class='add'>+			groups = "smb21";</div><div class='add'>+			function = "smb21";</div><div class='add'>+		};</div><div class='add'>+		smb22_pins: smb22-mux {</div><div class='add'>+			groups = "smb22";</div><div class='add'>+			function = "smb22";</div><div class='add'>+		};</div><div class='add'>+		smb23_pins: smb23-mux {</div><div class='add'>+			groups = "smb23";</div><div class='add'>+			function = "smb23";</div><div class='add'>+		};</div><div class='add'>+		smb23b_pins: smb23b-mux {</div><div class='add'>+			groups = "smb23b";</div><div class='add'>+			function = "smb23b";</div><div class='add'>+		};</div><div class='add'>+		smb4d_pins: smb4d-mux {</div><div class='add'>+			groups = "smb4d";</div><div class='add'>+			function = "smb4d";</div><div class='add'>+		};</div><div class='add'>+		smb14_pins: smb14-mux {</div><div class='add'>+			groups = "smb14";</div><div class='add'>+			function = "smb14";</div><div class='add'>+		};</div><div class='add'>+		smb5_pins: smb5-mux {</div><div class='add'>+			groups = "smb5";</div><div class='add'>+			function = "smb5";</div><div class='add'>+		};</div><div class='add'>+		smb4_pins: smb4-mux {</div><div class='add'>+			groups = "smb4";</div><div class='add'>+			function = "smb4";</div><div class='add'>+		};</div><div class='add'>+		smb3_pins: smb3-mux {</div><div class='add'>+			groups = "smb3";</div><div class='add'>+			function = "smb3";</div><div class='add'>+		};</div><div class='add'>+		spi0cs1_pins: spi0cs1-mux {</div><div class='add'>+			groups = "spi0cs1";</div><div class='add'>+			function = "spi0cs1";</div><div class='add'>+		};</div><div class='add'>+		spi1cs0_pins: spi1cs0-mux {</div><div class='add'>+			groups = "spi1cs0";</div><div class='add'>+			function = "spi1cs0";</div><div class='add'>+		};</div><div class='add'>+		spi1cs1_pins: spi1cs1-mux {</div><div class='add'>+			groups = "spi1cs1";</div><div class='add'>+			function = "spi1cs1";</div><div class='add'>+		};</div><div class='add'>+		spi1cs2_pins: spi1cs2-mux {</div><div class='add'>+			groups = "spi1cs2";</div><div class='add'>+			function = "spi1cs2";</div><div class='add'>+		};</div><div class='add'>+		spi1cs3_pins: spi1cs3-mux {</div><div class='add'>+			groups = "spi1cs3";</div><div class='add'>+			function = "spi1cs3";</div><div class='add'>+		};</div><div class='add'>+		smb3c_pins: smb3c-mux {</div><div class='add'>+			groups = "smb3c";</div><div class='add'>+			function = "smb3c";</div><div class='add'>+		};</div><div class='add'>+		smb3b_pins: smb3b-mux {</div><div class='add'>+			groups = "smb3b";</div><div class='add'>+			function = "smb3b";</div><div class='add'>+		};</div><div class='add'>+		bmcuart0a_pins: bmcuart0a-mux {</div><div class='add'>+			groups = "bmcuart0a";</div><div class='add'>+			function = "bmcuart0a";</div><div class='add'>+		};</div><div class='add'>+		uart1_pins: uart1-mux {</div><div class='add'>+			groups = "uart1";</div><div class='add'>+			function = "uart1";</div><div class='add'>+		};</div><div class='add'>+		jtag2_pins: jtag2-mux {</div><div class='add'>+			groups = "jtag2";</div><div class='add'>+			function = "jtag2";</div><div class='add'>+		};</div><div class='add'>+		bmcuart1_pins: bmcuart1-mux {</div><div class='add'>+			groups = "bmcuart1";</div><div class='add'>+			function = "bmcuart1";</div><div class='add'>+		};</div><div class='add'>+		uart2_pins: uart2-mux {</div><div class='add'>+			groups = "uart2";</div><div class='add'>+			function = "uart2";</div><div class='add'>+		};</div><div class='add'>+		bmcuart0b_pins: bmcuart0b-mux {</div><div class='add'>+			groups = "bmcuart0b";</div><div class='add'>+			function = "bmcuart0b";</div><div class='add'>+		};</div><div class='add'>+		r1err_pins: r1err-mux {</div><div class='add'>+			groups = "r1err";</div><div class='add'>+			function = "r1err";</div><div class='add'>+		};</div><div class='add'>+		r1md_pins: r1md-mux {</div><div class='add'>+			groups = "r1md";</div><div class='add'>+			function = "r1md";</div><div class='add'>+		};</div><div class='add'>+		r1oen_pins: r1oen-mux {</div><div class='add'>+			groups = "r1oen";</div><div class='add'>+			function = "r1oen";</div><div class='add'>+		};</div><div class='add'>+		r2oen_pins: r2oen-mux {</div><div class='add'>+			groups = "r2oen";</div><div class='add'>+			function = "r2oen";</div><div class='add'>+		};</div><div class='add'>+		rmii3_pins: rmii3-mux {</div><div class='add'>+			groups = "rmii3";</div><div class='add'>+			function = "rmii3";</div><div class='add'>+		};</div><div class='add'>+		r3oen_pins: r3oen-mux {</div><div class='add'>+			groups = "r3oen";</div><div class='add'>+			function = "r3oen";</div><div class='add'>+		};</div><div class='add'>+		smb3d_pins: smb3d-mux {</div><div class='add'>+			groups = "smb3d";</div><div class='add'>+			function = "smb3d";</div><div class='add'>+		};</div><div class='add'>+		fanin0_pins: fanin0-mux {</div><div class='add'>+			groups = "fanin0";</div><div class='add'>+			function = "fanin0";</div><div class='add'>+		};</div><div class='add'>+		fanin1_pins: fanin1-mux {</div><div class='add'>+			groups = "fanin1";</div><div class='add'>+			function = "fanin1";</div><div class='add'>+		};</div><div class='add'>+		fanin2_pins: fanin2-mux {</div><div class='add'>+			groups = "fanin2";</div><div class='add'>+			function = "fanin2";</div><div class='add'>+		};</div><div class='add'>+		fanin3_pins: fanin3-mux {</div><div class='add'>+			groups = "fanin3";</div><div class='add'>+			function = "fanin3";</div><div class='add'>+		};</div><div class='add'>+		fanin4_pins: fanin4-mux {</div><div class='add'>+			groups = "fanin4";</div><div class='add'>+			function = "fanin4";</div><div class='add'>+		};</div><div class='add'>+		fanin5_pins: fanin5-mux {</div><div class='add'>+			groups = "fanin5";</div><div class='add'>+			function = "fanin5";</div><div class='add'>+		};</div><div class='add'>+		fanin6_pins: fanin6-mux {</div><div class='add'>+			groups = "fanin6";</div><div class='add'>+			function = "fanin6";</div><div class='add'>+		};</div><div class='add'>+		fanin7_pins: fanin7-mux {</div><div class='add'>+			groups = "fanin7";</div><div class='add'>+			function = "fanin7";</div><div class='add'>+		};</div><div class='add'>+		fanin8_pins: fanin8-mux {</div><div class='add'>+			groups = "fanin8";</div><div class='add'>+			function = "fanin8";</div><div class='add'>+		};</div><div class='add'>+		fanin9_pins: fanin9-mux {</div><div class='add'>+			groups = "fanin9";</div><div class='add'>+			function = "fanin9";</div><div class='add'>+		};</div><div class='add'>+		fanin10_pins: fanin10-mux {</div><div class='add'>+			groups = "fanin10";</div><div class='add'>+			function = "fanin10";</div><div class='add'>+		};</div><div class='add'>+		fanin11_pins: fanin11-mux {</div><div class='add'>+			groups = "fanin11";</div><div class='add'>+			function = "fanin11";</div><div class='add'>+		};</div><div class='add'>+		fanin12_pins: fanin12-mux {</div><div class='add'>+			groups = "fanin12";</div><div class='add'>+			function = "fanin12";</div><div class='add'>+		};</div><div class='add'>+		fanin13_pins: fanin13-mux {</div><div class='add'>+			groups = "fanin13";</div><div class='add'>+			function = "fanin13";</div><div class='add'>+		};</div><div class='add'>+		fanin14_pins: fanin14-mux {</div><div class='add'>+			groups = "fanin14";</div><div class='add'>+			function = "fanin14";</div><div class='add'>+		};</div><div class='add'>+		fanin15_pins: fanin15-mux {</div><div class='add'>+			groups = "fanin15";</div><div class='add'>+			function = "fanin15";</div><div class='add'>+		};</div><div class='add'>+		pwm0_pins: pwm0-mux {</div><div class='add'>+			groups = "pwm0";</div><div class='add'>+			function = "pwm0";</div><div class='add'>+		};</div><div class='add'>+		pwm1_pins: pwm1-mux {</div><div class='add'>+			groups = "pwm1";</div><div class='add'>+			function = "pwm1";</div><div class='add'>+		};</div><div class='add'>+		pwm2_pins: pwm2-mux {</div><div class='add'>+			groups = "pwm2";</div><div class='add'>+			function = "pwm2";</div><div class='add'>+		};</div><div class='add'>+		pwm3_pins: pwm3-mux {</div><div class='add'>+			groups = "pwm3";</div><div class='add'>+			function = "pwm3";</div><div class='add'>+		};</div><div class='add'>+		r2_pins: r2-mux {</div><div class='add'>+			groups = "r2";</div><div class='add'>+			function = "r2";</div><div class='add'>+		};</div><div class='add'>+		r2err_pins: r2err-mux {</div><div class='add'>+			groups = "r2err";</div><div class='add'>+			function = "r2err";</div><div class='add'>+		};</div><div class='add'>+		r2md_pins: r2md-mux {</div><div class='add'>+			groups = "r2md";</div><div class='add'>+			function = "r2md";</div><div class='add'>+		};</div><div class='add'>+		r3rxer_pins: r3rxer-mux {</div><div class='add'>+			groups = "r3rxer";</div><div class='add'>+			function = "r3rxer";</div><div class='add'>+		};</div><div class='add'>+		ga20kbc_pins: ga20kbc-mux {</div><div class='add'>+			groups = "ga20kbc";</div><div class='add'>+			function = "ga20kbc";</div><div class='add'>+		};</div><div class='add'>+		smb5d_pins: smb5d-mux {</div><div class='add'>+			groups = "smb5d";</div><div class='add'>+			function = "smb5d";</div><div class='add'>+		};</div><div class='add'>+		lpc_pins: lpc-mux {</div><div class='add'>+			groups = "lpc";</div><div class='add'>+			function = "lpc";</div><div class='add'>+		};</div><div class='add'>+		espi_pins: espi-mux {</div><div class='add'>+			groups = "espi";</div><div class='add'>+			function = "espi";</div><div class='add'>+		};</div><div class='add'>+		sg1mdio_pins: sg1mdio-mux {</div><div class='add'>+			groups = "sg1mdio";</div><div class='add'>+			function = "sg1mdio";</div><div class='add'>+		};</div><div class='add'>+		rg2_pins: rg2-mux {</div><div class='add'>+			groups = "rg2";</div><div class='add'>+			function = "rg2";</div><div class='add'>+		};</div><div class='add'>+		ddr_pins: ddr-mux {</div><div class='add'>+			groups = "ddr";</div><div class='add'>+			function = "ddr";</div><div class='add'>+		};</div><div class='add'>+		i3c0_pins: i3c0-mux {</div><div class='add'>+			groups = "i3c0";</div><div class='add'>+			function = "i3c0";</div><div class='add'>+		};</div><div class='add'>+		i3c1_pins: i3c1-mux {</div><div class='add'>+			groups = "i3c1";</div><div class='add'>+			function = "i3c1";</div><div class='add'>+		};</div><div class='add'>+		i3c2_pins: i3c2-mux {</div><div class='add'>+			groups = "i3c2";</div><div class='add'>+			function = "i3c2";</div><div class='add'>+		};</div><div class='add'>+		i3c3_pins: i3c3-mux {</div><div class='add'>+			groups = "i3c3";</div><div class='add'>+			function = "i3c3";</div><div class='add'>+		};</div><div class='add'>+		i3c4_pins: i3c4-mux {</div><div class='add'>+			groups = "i3c4";</div><div class='add'>+			function = "i3c4";</div><div class='add'>+		};</div><div class='add'>+		i3c5_pins: i3c5-mux {</div><div class='add'>+			groups = "i3c5";</div><div class='add'>+			function = "i3c5";</div><div class='add'>+		};</div><div class='add'>+		smb0_pins: smb0-mux {</div><div class='add'>+			groups = "smb0";</div><div class='add'>+			function = "smb0";</div><div class='add'>+		};</div><div class='add'>+		smb1_pins: smb1-mux {</div><div class='add'>+			groups = "smb1";</div><div class='add'>+			function = "smb1";</div><div class='add'>+		};</div><div class='add'>+		smb2_pins: smb2-mux {</div><div class='add'>+			groups = "smb2";</div><div class='add'>+			function = "smb2";</div><div class='add'>+		};</div><div class='add'>+		smb2c_pins: smb2c-mux {</div><div class='add'>+			groups = "smb2c";</div><div class='add'>+			function = "smb2c";</div><div class='add'>+		};</div><div class='add'>+		smb2b_pins: smb2b-mux {</div><div class='add'>+			groups = "smb2b";</div><div class='add'>+			function = "smb2b";</div><div class='add'>+		};</div><div class='add'>+		smb1c_pins: smb1c-mux {</div><div class='add'>+			groups = "smb1c";</div><div class='add'>+			function = "smb1c";</div><div class='add'>+		};</div><div class='add'>+		smb1b_pins: smb1b-mux {</div><div class='add'>+			groups = "smb1b";</div><div class='add'>+			function = "smb1b";</div><div class='add'>+		};</div><div class='add'>+		smb8_pins: smb8-mux {</div><div class='add'>+			groups = "smb8";</div><div class='add'>+			function = "smb8";</div><div class='add'>+		};</div><div class='add'>+		smb9_pins: smb9-mux {</div><div class='add'>+			groups = "smb9";</div><div class='add'>+			function = "smb9";</div><div class='add'>+		};</div><div class='add'>+		smb10_pins: smb10-mux {</div><div class='add'>+			groups = "smb10";</div><div class='add'>+			function = "smb10";</div><div class='add'>+		};</div><div class='add'>+		smb11_pins: smb11-mux {</div><div class='add'>+			groups = "smb11";</div><div class='add'>+			function = "smb11";</div><div class='add'>+		};</div><div class='add'>+		sd1_pins: sd1-mux {</div><div class='add'>+			groups = "sd1";</div><div class='add'>+			function = "sd1";</div><div class='add'>+		};</div><div class='add'>+		sd1pwr_pins: sd1pwr-mux {</div><div class='add'>+			groups = "sd1pwr";</div><div class='add'>+			function = "sd1pwr";</div><div class='add'>+		};</div><div class='add'>+		pwm4_pins: pwm4-mux {</div><div class='add'>+			groups = "pwm4";</div><div class='add'>+			function = "pwm4";</div><div class='add'>+		};</div><div class='add'>+		pwm5_pins: pwm5-mux {</div><div class='add'>+			groups = "pwm5";</div><div class='add'>+			function = "pwm5";</div><div class='add'>+		};</div><div class='add'>+		pwm6_pins: pwm6-mux {</div><div class='add'>+			groups = "pwm6";</div><div class='add'>+			function = "pwm6";</div><div class='add'>+		};</div><div class='add'>+		pwm7_pins: pwm7-mux {</div><div class='add'>+			groups = "pwm7";</div><div class='add'>+			function = "pwm7";</div><div class='add'>+		};</div><div class='add'>+		pwm8_pins: pwm8-mux {</div><div class='add'>+			groups = "pwm8";</div><div class='add'>+			function = "pwm8";</div><div class='add'>+		};</div><div class='add'>+		pwm9_pins: pwm9-mux {</div><div class='add'>+			groups = "pwm9";</div><div class='add'>+			function = "pwm9";</div><div class='add'>+		};</div><div class='add'>+		pwm10_pins: pwm10-mux {</div><div class='add'>+			groups = "pwm10";</div><div class='add'>+			function = "pwm10";</div><div class='add'>+		};</div><div class='add'>+		pwm11_pins: pwm11-mux {</div><div class='add'>+			groups = "pwm11";</div><div class='add'>+			function = "pwm11";</div><div class='add'>+		};</div><div class='add'>+		mmc8_pins: mmc8-mux {</div><div class='add'>+			groups = "mmc8";</div><div class='add'>+			function = "mmc8";</div><div class='add'>+		};</div><div class='add'>+		mmc_pins: mmc-mux {</div><div class='add'>+			groups = "mmc";</div><div class='add'>+			function = "mmc";</div><div class='add'>+		};</div><div class='add'>+		mmcwp_pins: mmcwp-mux {</div><div class='add'>+			groups = "mmcwp";</div><div class='add'>+			function = "mmcwp";</div><div class='add'>+		};</div><div class='add'>+		mmccd_pins: mmccd-mux {</div><div class='add'>+			groups = "mmccd";</div><div class='add'>+			function = "mmccd";</div><div class='add'>+		};</div><div class='add'>+		mmcrst_pins: mmcrst-mux {</div><div class='add'>+			groups = "mmcrst";</div><div class='add'>+			function = "mmcrst";</div><div class='add'>+		};</div><div class='add'>+		clkout_pins: clkout-mux {</div><div class='add'>+			groups = "clkout";</div><div class='add'>+			function = "clkout";</div><div class='add'>+		};</div><div class='add'>+		serirq_pins: serirq-mux {</div><div class='add'>+			groups = "serirq";</div><div class='add'>+			function = "serirq";</div><div class='add'>+		};</div><div class='add'>+		scipme_pins: scipme-mux {</div><div class='add'>+			groups = "scipme";</div><div class='add'>+			function = "scipme";</div><div class='add'>+		};</div><div class='add'>+		smb6_pins: smb6-mux {</div><div class='add'>+			groups = "smb6";</div><div class='add'>+			function = "smb6";</div><div class='add'>+		};</div><div class='add'>+		smb6b_pins: smb6b-mux {</div><div class='add'>+			groups = "smb6b";</div><div class='add'>+			function = "smb6b";</div><div class='add'>+		};</div><div class='add'>+		smb6c_pins: smb6c-mux {</div><div class='add'>+			groups = "smb6c";</div><div class='add'>+			function = "smb6c";</div><div class='add'>+		};</div><div class='add'>+		smb6d_pins: smb6d-mux {</div><div class='add'>+			groups = "smb6d";</div><div class='add'>+			function = "smb6d";</div><div class='add'>+		};</div><div class='add'>+		smb7_pins: smb7-mux {</div><div class='add'>+			groups = "smb7";</div><div class='add'>+			function = "smb7";</div><div class='add'>+		};</div><div class='add'>+		smb7b_pins: smb7b-mux {</div><div class='add'>+			groups = "smb7b";</div><div class='add'>+			function = "smb7b";</div><div class='add'>+		};</div><div class='add'>+		smb7c_pins: smb7c-mux {</div><div class='add'>+			groups = "smb7c";</div><div class='add'>+			function = "smb7c";</div><div class='add'>+		};</div><div class='add'>+		smb7d_pins: smb7d-mux {</div><div class='add'>+			groups = "smb7d";</div><div class='add'>+			function = "smb7d";</div><div class='add'>+		};</div><div class='add'>+		spi1_pins: spi1-mux {</div><div class='add'>+			groups = "spi1";</div><div class='add'>+			function = "spi1";</div><div class='add'>+		};</div><div class='add'>+		faninx_pins: faninx-mux {</div><div class='add'>+			groups = "faninx";</div><div class='add'>+			function = "faninx";</div><div class='add'>+		};</div><div class='add'>+		r1_pins: r1-mux {</div><div class='add'>+			groups = "r1";</div><div class='add'>+			function = "r1";</div><div class='add'>+		};</div><div class='add'>+		spi3_pins: spi3-mux {</div><div class='add'>+			groups = "spi3";</div><div class='add'>+			function = "spi3";</div><div class='add'>+		};</div><div class='add'>+		spi3cs1_pins: spi3cs1-mux {</div><div class='add'>+			groups = "spi3cs1";</div><div class='add'>+			function = "spi3cs1";</div><div class='add'>+		};</div><div class='add'>+		spi3quad_pins: spi3quad-mux {</div><div class='add'>+			groups = "spi3quad";</div><div class='add'>+			function = "spi3quad";</div><div class='add'>+		};</div><div class='add'>+		spi3cs2_pins: spi3cs2-mux {</div><div class='add'>+			groups = "spi3cs2";</div><div class='add'>+			function = "spi3cs2";</div><div class='add'>+		};</div><div class='add'>+		spi3cs3_pins: spi3cs3-mux {</div><div class='add'>+			groups = "spi3cs3";</div><div class='add'>+			function = "spi3cs3";</div><div class='add'>+		};</div><div class='add'>+		nprd_smi_pins: nprd-smi-mux {</div><div class='add'>+			groups = "nprd_smi";</div><div class='add'>+			function = "nprd_smi";</div><div class='add'>+		};</div><div class='add'>+		smi_pins: smi-mux {</div><div class='add'>+			groups = "smi";</div><div class='add'>+			function = "smi";</div><div class='add'>+		};</div><div class='add'>+		smb0b_pins: smb0b-mux {</div><div class='add'>+			groups = "smb0b";</div><div class='add'>+			function = "smb0b";</div><div class='add'>+		};</div><div class='add'>+		smb0c_pins: smb0c-mux {</div><div class='add'>+			groups = "smb0c";</div><div class='add'>+			function = "smb0c";</div><div class='add'>+		};</div><div class='add'>+		smb0den_pins: smb0den-mux {</div><div class='add'>+			groups = "smb0den";</div><div class='add'>+			function = "smb0den";</div><div class='add'>+		};</div><div class='add'>+		smb0d_pins: smb0d-mux {</div><div class='add'>+			groups = "smb0d";</div><div class='add'>+			function = "smb0d";</div><div class='add'>+		};</div><div class='add'>+		ddc_pins: ddc-mux {</div><div class='add'>+			groups = "ddc";</div><div class='add'>+			function = "ddc";</div><div class='add'>+		};</div><div class='add'>+		rg2mdio_pins: rg2mdio-mux {</div><div class='add'>+			groups = "rg2mdio";</div><div class='add'>+			function = "rg2mdio";</div><div class='add'>+		};</div><div class='add'>+		wdog1_pins: wdog1-mux {</div><div class='add'>+			groups = "wdog1";</div><div class='add'>+			function = "wdog1";</div><div class='add'>+		};</div><div class='add'>+		wdog2_pins: wdog2-mux {</div><div class='add'>+			groups = "wdog2";</div><div class='add'>+			function = "wdog2";</div><div class='add'>+		};</div><div class='add'>+		smb12_pins: smb12-mux {</div><div class='add'>+			groups = "smb12";</div><div class='add'>+			function = "smb12";</div><div class='add'>+		};</div><div class='add'>+		smb13_pins: smb13-mux {</div><div class='add'>+			groups = "smb13";</div><div class='add'>+			function = "smb13";</div><div class='add'>+		};</div><div class='add'>+		spix_pins: spix-mux {</div><div class='add'>+			groups = "spix";</div><div class='add'>+			function = "spix";</div><div class='add'>+		};</div><div class='add'>+		spixcs1_pins: spixcs1-mux {</div><div class='add'>+			groups = "spixcs1";</div><div class='add'>+			function = "spixcs1";</div><div class='add'>+		};</div><div class='add'>+		clkreq_pins: clkreq-mux {</div><div class='add'>+			groups = "clkreq";</div><div class='add'>+			function = "clkreq";</div><div class='add'>+		};</div><div class='add'>+		hgpio0_pins: hgpio0-mux {</div><div class='add'>+			groups = "hgpio0";</div><div class='add'>+			function = "hgpio0";</div><div class='add'>+		};</div><div class='add'>+		hgpio1_pins: hgpio1-mux {</div><div class='add'>+			groups = "hgpio1";</div><div class='add'>+			function = "hgpio1";</div><div class='add'>+		};</div><div class='add'>+		hgpio2_pins: hgpio2-mux {</div><div class='add'>+			groups = "hgpio2";</div><div class='add'>+			function = "hgpio2";</div><div class='add'>+		};</div><div class='add'>+		hgpio3_pins: hgpio3-mux {</div><div class='add'>+			groups = "hgpio3";</div><div class='add'>+			function = "hgpio3";</div><div class='add'>+		};</div><div class='add'>+		hgpio4_pins: hgpio4-mux {</div><div class='add'>+			groups = "hgpio4";</div><div class='add'>+			function = "hgpio4";</div><div class='add'>+		};</div><div class='add'>+		hgpio5_pins: hgpio5-mux {</div><div class='add'>+			groups = "hgpio5";</div><div class='add'>+			function = "hgpio5";</div><div class='add'>+		};</div><div class='add'>+		hgpio6_pins: hgpio6-mux {</div><div class='add'>+			groups = "hgpio6";</div><div class='add'>+			function = "hgpio6";</div><div class='add'>+		};</div><div class='add'>+		hgpio7_pins: hgpio7-mux {</div><div class='add'>+			groups = "hgpio7";</div><div class='add'>+			function = "hgpio7";</div><div class='add'>+		};</div><div class='add'>+		bu4_pins: bu4-mux {</div><div class='add'>+			groups = "bu4";</div><div class='add'>+			function = "bu4";</div><div class='add'>+		};</div><div class='add'>+		bu4b_pins: bu4b-mux {</div><div class='add'>+			groups = "bu4b";</div><div class='add'>+			function = "bu4b";</div><div class='add'>+		};</div><div class='add'>+		bu5_pins: bu5-mux {</div><div class='add'>+			groups = "bu5";</div><div class='add'>+			function = "bu5";</div><div class='add'>+		};</div><div class='add'>+		bu5b_pins: bu5b-mux {</div><div class='add'>+			groups = "bu5b";</div><div class='add'>+			function = "bu5b";</div><div class='add'>+		};</div><div class='add'>+		bu6_pins: bu6-mux {</div><div class='add'>+			groups = "bu6";</div><div class='add'>+			function = "bu6";</div><div class='add'>+		};</div><div class='add'>+		gpo187_pins: gpo187-mux {</div><div class='add'>+			groups = "gpo187";</div><div class='add'>+			function = "gpo187";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts<br/>index eeceb5b292a8..2638ee1c3846 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts</a></div><div class='hunk'>@@ -19,6 +19,12 @@</div><div class='ctx'> 	memory@0 {</div><div class='ctx'> 		reg = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	refclk: refclk-25mhz {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serial0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile<br/>index c38c809fe577..171e08c94d5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/Makefile</a></div><div class='hunk'>@@ -12,6 +12,7 @@ DTC_FLAGS_tegra234-p3737-0000+p3701-0000 := -@</div><div class='ctx'> DTC_FLAGS_tegra234-p3740-0002+p3701-0008 := -@</div><div class='ctx'> DTC_FLAGS_tegra234-p3768-0000+p3767-0000 := -@</div><div class='ctx'> DTC_FLAGS_tegra234-p3768-0000+p3767-0005 := -@</div><div class='add'>+DTC_FLAGS_tegra264-p3971-0089+p3834-0008 := -@</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra132-norrin.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2371-0000.dtb</div><div class='hunk'>@@ -27,6 +28,8 @@ dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3740-0002+p3701-0008.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3768-0000+p3767-0000.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3768-0000+p3767-0005.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_TEGRA_264_SOC) += tegra264-p3971-0089+p3834-0008.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts<br/>index 15aa49fc4503..8b3736cee323 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts</a></div><div class='hunk'>@@ -2394,6 +2394,12 @@</div><div class='ctx'> 		phy-names = "usb2-0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cec@3960000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		hdmi-phandle = &lt;&amp;sor1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c@c250000 {</div><div class='ctx'> 		/* carrier board ID EEPROM */</div><div class='ctx'> 		eeprom@57 {</div><div class='hunk'>@@ -2409,6 +2415,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pwm@c340000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie@10003000 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -2508,6 +2518,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 45334&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vdd_fan&gt;;</div><div class='add'>+</div><div class='add'>+		/* cooling level (0, 1, 2, 3) - pwm inverted */</div><div class='add'>+		cooling-levels = &lt;255 128 64 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_sd: regulator-vdd-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "SD_CARD_SW_PWR";</div><div class='hunk'>@@ -2556,6 +2576,17 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vdd_fan: regulator-vdd-fan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_FAN";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;exp1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "nvidia,tegra186-audio-graph-card";</div><div class='ctx'> 		status = "okay";</div><div class='hunk'>@@ -2621,4 +2652,88 @@</div><div class='ctx'> </div><div class='ctx'> 		label = "NVIDIA Jetson TX2 APE";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			polling-delay-passive = &lt;500&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu_trip_critical: critical {</div><div class='add'>+					temperature = &lt;96500&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_hot: hot {</div><div class='add'>+					temperature = &lt;79000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_active: active {</div><div class='add'>+					temperature = &lt;62000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_passive: passive {</div><div class='add'>+					temperature = &lt;45000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 3 3&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_critical&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 2 2&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_hot&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map2 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 1 1&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_active&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map3 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 0 0&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_passive&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aux-thermal {</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			polling-delay-passive = &lt;500&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				aux_alert0: critical {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu-thermal {</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			polling-delay-passive = &lt;500&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu_alert0: critical {</div><div class='add'>+					temperature = &lt;99000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi<br/>index e2d6857a3709..970ce5a03540 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi</a></div><div class='hunk'>@@ -61,6 +61,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@3100000 {</div><div class='add'>+		/delete-property/ dmas;</div><div class='add'>+		/delete-property/ dma-names;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -191,6 +193,10 @@</div><div class='ctx'> 		nvidia,invert-interrupt;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpu@17000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	bpmp {</div><div class='ctx'> 		i2c {</div><div class='ctx'> 			status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts b/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts<br/>index 26f71651933d..5f3f572ecea9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts</a></div><div class='hunk'>@@ -549,6 +549,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@3100000 {</div><div class='add'>+		/delete-property/ dmas;</div><div class='add'>+		/delete-property/ dma-names;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -712,6 +714,12 @@</div><div class='ctx'> 		phy-names = "usb2-0";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cec@3960000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		hdmi-phandle = &lt;&amp;sor1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hsp@3c00000 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi<br/>index 2b3bb5d0af17..5778c93af3e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra186.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra186.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra186.dtsi</a></div><div class='hunk'>@@ -124,28 +124,28 @@</div><div class='ctx'> 			 &lt;&amp;bpmp TEGRA186_CLK_APB2APE&gt;;</div><div class='ctx'> 		clock-names = "ape", "apb2ape";</div><div class='ctx'> 		power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_AUD&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x02900000 0x0 0x02900000 0x200000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x02900000 0x0 0x02900000 0x0 0x200000&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		tegra_ahub: ahub@2900800 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-ahub";</div><div class='del'>-			reg = &lt;0x02900800 0x800&gt;;</div><div class='add'>+			reg = &lt;0x0 0x02900800 0x0 0x800&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_AHUB&gt;;</div><div class='ctx'> 			clock-names = "ahub";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_AHUB&gt;;</div><div class='ctx'> 			assigned-clock-parents = &lt;&amp;bpmp TEGRA186_CLK_PLLP_OUT0&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;81600000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0x02900800 0x02900800 0x11800&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x02900800 0x0 0x02900800 0x0 0x11800&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			tegra_i2s1: i2s@2901000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901000 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901000 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S1&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S1_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -159,7 +159,7 @@</div><div class='ctx'> 			tegra_i2s2: i2s@2901100 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901100 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901100 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S2&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S2_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 			tegra_i2s3: i2s@2901200 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901200 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901200 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S3&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S3_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> 			tegra_i2s4: i2s@2901300 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901300 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901300 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S4&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S4_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -201,7 +201,7 @@</div><div class='ctx'> 			tegra_i2s5: i2s@2901400 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901400 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901400 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S5&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S5_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -215,7 +215,7 @@</div><div class='ctx'> 			tegra_i2s6: i2s@2901500 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-i2s",</div><div class='ctx'> 					     "nvidia,tegra210-i2s";</div><div class='del'>-				reg = &lt;0x2901500 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2901500 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_I2S6&gt;,</div><div class='ctx'> 					 &lt;&amp;bpmp TEGRA186_CLK_I2S6_SYNC_INPUT&gt;;</div><div class='ctx'> 				clock-names = "i2s", "sync_input";</div><div class='hunk'>@@ -229,7 +229,7 @@</div><div class='ctx'> 			tegra_sfc1: sfc@2902000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-sfc",</div><div class='ctx'> 					     "nvidia,tegra210-sfc";</div><div class='del'>-				reg = &lt;0x2902000 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2902000 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "SFC1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -237,7 +237,7 @@</div><div class='ctx'> 			tegra_sfc2: sfc@2902200 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-sfc",</div><div class='ctx'> 					     "nvidia,tegra210-sfc";</div><div class='del'>-				reg = &lt;0x2902200 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2902200 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "SFC2";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 			tegra_sfc3: sfc@2902400 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-sfc",</div><div class='ctx'> 					     "nvidia,tegra210-sfc";</div><div class='del'>-				reg = &lt;0x2902400 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2902400 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "SFC3";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 			tegra_sfc4: sfc@2902600 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-sfc",</div><div class='ctx'> 					     "nvidia,tegra210-sfc";</div><div class='del'>-				reg = &lt;0x2902600 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2902600 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "SFC4";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -261,7 +261,7 @@</div><div class='ctx'> 			tegra_amx1: amx@2903000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-amx",</div><div class='ctx'> 					     "nvidia,tegra210-amx";</div><div class='del'>-				reg = &lt;0x2903000 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903000 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "AMX1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -269,7 +269,7 @@</div><div class='ctx'> 			tegra_amx2: amx@2903100 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-amx",</div><div class='ctx'> 					     "nvidia,tegra210-amx";</div><div class='del'>-				reg = &lt;0x2903100 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903100 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "AMX2";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -277,7 +277,7 @@</div><div class='ctx'> 			tegra_amx3: amx@2903200 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-amx",</div><div class='ctx'> 					     "nvidia,tegra210-amx";</div><div class='del'>-				reg = &lt;0x2903200 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903200 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "AMX3";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -285,7 +285,7 @@</div><div class='ctx'> 			tegra_amx4: amx@2903300 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-amx",</div><div class='ctx'> 					     "nvidia,tegra210-amx";</div><div class='del'>-				reg = &lt;0x2903300 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903300 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "AMX4";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -293,7 +293,7 @@</div><div class='ctx'> 			tegra_adx1: adx@2903800 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-adx",</div><div class='ctx'> 					     "nvidia,tegra210-adx";</div><div class='del'>-				reg = &lt;0x2903800 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903800 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "ADX1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -301,7 +301,7 @@</div><div class='ctx'> 			tegra_adx2: adx@2903900 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-adx",</div><div class='ctx'> 					     "nvidia,tegra210-adx";</div><div class='del'>-				reg = &lt;0x2903900 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903900 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "ADX2";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -309,7 +309,7 @@</div><div class='ctx'> 			tegra_adx3: adx@2903a00 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-adx",</div><div class='ctx'> 					     "nvidia,tegra210-adx";</div><div class='del'>-				reg = &lt;0x2903a00 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903a00 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "ADX3";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -317,14 +317,14 @@</div><div class='ctx'> 			tegra_adx4: adx@2903b00 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-adx",</div><div class='ctx'> 					     "nvidia,tegra210-adx";</div><div class='del'>-				reg = &lt;0x2903b00 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2903b00 0x0 0x100&gt;;</div><div class='ctx'> 				sound-name-prefix = "ADX4";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			tegra_dmic1: dmic@2904000 {</div><div class='ctx'> 				compatible = "nvidia,tegra210-dmic";</div><div class='del'>-				reg = &lt;0x2904000 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2904000 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC1&gt;;</div><div class='ctx'> 				clock-names = "dmic";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC1&gt;;</div><div class='hunk'>@@ -336,7 +336,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_dmic2: dmic@2904100 {</div><div class='ctx'> 				compatible = "nvidia,tegra210-dmic";</div><div class='del'>-				reg = &lt;0x2904100 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2904100 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC2&gt;;</div><div class='ctx'> 				clock-names = "dmic";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC2&gt;;</div><div class='hunk'>@@ -348,7 +348,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_dmic3: dmic@2904200 {</div><div class='ctx'> 				compatible = "nvidia,tegra210-dmic";</div><div class='del'>-				reg = &lt;0x2904200 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2904200 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC3&gt;;</div><div class='ctx'> 				clock-names = "dmic";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC3&gt;;</div><div class='hunk'>@@ -360,7 +360,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_dmic4: dmic@2904300 {</div><div class='ctx'> 				compatible = "nvidia,tegra210-dmic";</div><div class='del'>-				reg = &lt;0x2904300 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2904300 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC4&gt;;</div><div class='ctx'> 				clock-names = "dmic";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DMIC4&gt;;</div><div class='hunk'>@@ -372,7 +372,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_dspk1: dspk@2905000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-dspk";</div><div class='del'>-				reg = &lt;0x2905000 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2905000 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DSPK1&gt;;</div><div class='ctx'> 				clock-names = "dspk";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DSPK1&gt;;</div><div class='hunk'>@@ -384,7 +384,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_dspk2: dspk@2905100 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-dspk";</div><div class='del'>-				reg = &lt;0x2905100 0x100&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2905100 0x0 0x100&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_DSPK2&gt;;</div><div class='ctx'> 				clock-names = "dspk";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;bpmp TEGRA186_CLK_DSPK2&gt;;</div><div class='hunk'>@@ -397,9 +397,9 @@</div><div class='ctx'> 			tegra_ope1: processing-engine@2908000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-ope",</div><div class='ctx'> 					     "nvidia,tegra210-ope";</div><div class='del'>-				reg = &lt;0x2908000 0x100&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2908000 0x0 0x100&gt;;</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='ctx'> 				ranges;</div><div class='ctx'> 				sound-name-prefix = "OPE1";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -407,20 +407,20 @@</div><div class='ctx'> 				equalizer@2908100 {</div><div class='ctx'> 					compatible = "nvidia,tegra186-peq",</div><div class='ctx'> 						     "nvidia,tegra210-peq";</div><div class='del'>-					reg = &lt;0x2908100 0x100&gt;;</div><div class='add'>+					reg = &lt;0x0 0x2908100 0x0 0x100&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				dynamic-range-compressor@2908200 {</div><div class='ctx'> 					compatible = "nvidia,tegra186-mbdrc",</div><div class='ctx'> 						     "nvidia,tegra210-mbdrc";</div><div class='del'>-					reg = &lt;0x2908200 0x200&gt;;</div><div class='add'>+					reg = &lt;0x0 0x2908200 0x0 0x200&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			tegra_mvc1: mvc@290a000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-mvc",</div><div class='ctx'> 					     "nvidia,tegra210-mvc";</div><div class='del'>-				reg = &lt;0x290a000 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x290a000 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "MVC1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -428,7 +428,7 @@</div><div class='ctx'> 			tegra_mvc2: mvc@290a200 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-mvc",</div><div class='ctx'> 					     "nvidia,tegra210-mvc";</div><div class='del'>-				reg = &lt;0x290a200 0x200&gt;;</div><div class='add'>+				reg = &lt;0x0 0x290a200 0x0 0x200&gt;;</div><div class='ctx'> 				sound-name-prefix = "MVC2";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -436,14 +436,14 @@</div><div class='ctx'> 			tegra_amixer: amixer@290bb00 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-amixer",</div><div class='ctx'> 					     "nvidia,tegra210-amixer";</div><div class='del'>-				reg = &lt;0x290bb00 0x800&gt;;</div><div class='add'>+				reg = &lt;0x0 0x290bb00 0x0 0x800&gt;;</div><div class='ctx'> 				sound-name-prefix = "MIXER1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			tegra_admaif: admaif@290f000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-admaif";</div><div class='del'>-				reg = &lt;0x0290f000 0x1000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0290f000 0x0 0x1000&gt;;</div><div class='ctx'> 				dmas = &lt;&amp;adma 1&gt;, &lt;&amp;adma 1&gt;,</div><div class='ctx'> 				       &lt;&amp;adma 2&gt;, &lt;&amp;adma 2&gt;,</div><div class='ctx'> 				       &lt;&amp;adma 3&gt;, &lt;&amp;adma 3&gt;,</div><div class='hunk'>@@ -489,7 +489,7 @@</div><div class='ctx'> </div><div class='ctx'> 			tegra_asrc: asrc@2910000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-asrc";</div><div class='del'>-				reg = &lt;0x2910000 0x2000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x2910000 0x0 0x2000&gt;;</div><div class='ctx'> 				sound-name-prefix = "ASRC1";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -497,7 +497,7 @@</div><div class='ctx'> </div><div class='ctx'> 		adma: dma-controller@2930000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-adma";</div><div class='del'>-			reg = &lt;0x02930000 0x20000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x02930000 0x0 0x20000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;agic&gt;;</div><div class='ctx'> 			interrupts =  &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				      &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -542,8 +542,8 @@</div><div class='ctx'> 				     "nvidia,tegra210-agic";</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='del'>-			reg = &lt;0x02a41000 0x1000&gt;,</div><div class='del'>-			      &lt;0x02a42000 0x2000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x02a41000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x02a42000 0x0 0x2000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 145</div><div class='ctx'> 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_APE&gt;;</div><div class='hunk'>@@ -612,6 +612,8 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTA&gt;;</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTA&gt;;</div><div class='add'>+		dmas = &lt;&amp;gpcdma 8&gt;, &lt;&amp;gpcdma 8&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -621,9 +623,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTB&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTB&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 9&gt;, &lt;&amp;gpcdma 9&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -633,9 +635,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTD&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTD&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 19&gt;, &lt;&amp;gpcdma 19&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -645,9 +647,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTE&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTE&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 20&gt;, &lt;&amp;gpcdma 20&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -657,9 +659,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTF&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTF&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 12&gt;, &lt;&amp;gpcdma 12&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1183,7 +1185,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cec@3960000 {</div><div class='del'>-		compatible = "nvidia,tegra186-cec";</div><div class='add'>+		compatible = "nvidia,tegra186-cec", "nvidia,tegra210-cec";</div><div class='ctx'> 		reg = &lt;0x0 0x03960000 0x0 0x10000&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_CEC&gt;;</div><div class='hunk'>@@ -1236,9 +1238,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTC&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTC&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 3&gt;, &lt;&amp;gpcdma 3&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1248,9 +1250,9 @@</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;bpmp TEGRA186_CLK_UARTG&gt;;</div><div class='del'>-		clock-names = "serial";</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_UARTG&gt;;</div><div class='del'>-		reset-names = "serial";</div><div class='add'>+		dmas = &lt;&amp;gpcdma 2&gt;, &lt;&amp;gpcdma 2&gt;;</div><div class='add'>+		dma-names = "rx", "tx";</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1511,10 +1513,10 @@</div><div class='ctx'> 		resets = &lt;&amp;bpmp TEGRA186_RESET_HOST1X&gt;;</div><div class='ctx'> 		reset-names = "host1x";</div><div class='ctx'> </div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		ranges = &lt;0x15000000 0x0 0x15000000 0x01000000&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x15000000 0x0 0x15000000 0x0 0x01000000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interconnects = &lt;&amp;mc TEGRA186_MEMORY_CLIENT_HOST1XDMAR &amp;emc&gt;;</div><div class='ctx'> 		interconnect-names = "dma-mem";</div><div class='hunk'>@@ -1533,7 +1535,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dpaux1: dpaux@15040000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dpaux";</div><div class='del'>-			reg = &lt;0x15040000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15040000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DPAUX1&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_PLLDP&gt;;</div><div class='hunk'>@@ -1567,7 +1569,7 @@</div><div class='ctx'> </div><div class='ctx'> 		display-hub@15200000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-display";</div><div class='del'>-			reg = &lt;0x15200000 0x00040000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15200000 0x0 0x00040000&gt;;</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_MISC&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1&gt;,</div><div class='hunk'>@@ -1585,14 +1587,14 @@</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISP&gt;;</div><div class='ctx'> </div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			ranges = &lt;0x15200000 0x15200000 0x40000&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x15200000 0x0 0x15200000 0x0 0x40000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			display@15200000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-dc";</div><div class='del'>-				reg = &lt;0x15200000 0x10000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x15200000 0x0 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P0&gt;;</div><div class='ctx'> 				clock-names = "dc";</div><div class='hunk'>@@ -1611,7 +1613,7 @@</div><div class='ctx'> </div><div class='ctx'> 			display@15210000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-dc";</div><div class='del'>-				reg = &lt;0x15210000 0x10000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x15210000 0x0 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P1&gt;;</div><div class='ctx'> 				clock-names = "dc";</div><div class='hunk'>@@ -1630,7 +1632,7 @@</div><div class='ctx'> </div><div class='ctx'> 			display@15220000 {</div><div class='ctx'> 				compatible = "nvidia,tegra186-dc";</div><div class='del'>-				reg = &lt;0x15220000 0x10000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x15220000 0x0 0x10000&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P2&gt;;</div><div class='ctx'> 				clock-names = "dc";</div><div class='hunk'>@@ -1650,7 +1652,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dsia: dsi@15300000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dsi";</div><div class='del'>-			reg = &lt;0x15300000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15300000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DSI&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_DSIA_LP&gt;,</div><div class='hunk'>@@ -1665,7 +1667,7 @@</div><div class='ctx'> </div><div class='ctx'> 		vic@15340000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-vic";</div><div class='del'>-			reg = &lt;0x15340000 0x40000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15340000 0x0 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_VIC&gt;;</div><div class='ctx'> 			clock-names = "vic";</div><div class='hunk'>@@ -1681,7 +1683,7 @@</div><div class='ctx'> </div><div class='ctx'> 		nvjpg@15380000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-nvjpg";</div><div class='del'>-			reg = &lt;0x15380000 0x40000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15380000 0x0 0x40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_NVJPG&gt;;</div><div class='ctx'> 			clock-names = "nvjpg";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA186_RESET_NVJPG&gt;;</div><div class='hunk'>@@ -1696,7 +1698,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dsib: dsi@15400000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dsi";</div><div class='del'>-			reg = &lt;0x15400000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15400000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DSIB&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_DSIB_LP&gt;,</div><div class='hunk'>@@ -1711,7 +1713,7 @@</div><div class='ctx'> </div><div class='ctx'> 		nvdec@15480000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-nvdec";</div><div class='del'>-			reg = &lt;0x15480000 0x40000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15480000 0x0 0x40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDEC&gt;;</div><div class='ctx'> 			clock-names = "nvdec";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA186_RESET_NVDEC&gt;;</div><div class='hunk'>@@ -1727,7 +1729,7 @@</div><div class='ctx'> </div><div class='ctx'> 		nvenc@154c0000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-nvenc";</div><div class='del'>-			reg = &lt;0x154c0000 0x40000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x154c0000 0x0 0x40000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_NVENC&gt;;</div><div class='ctx'> 			clock-names = "nvenc";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA186_RESET_NVENC&gt;;</div><div class='hunk'>@@ -1742,7 +1744,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sor0: sor@15540000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-sor";</div><div class='del'>-			reg = &lt;0x15540000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15540000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_SOR0&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_SOR0_OUT&gt;,</div><div class='hunk'>@@ -1766,7 +1768,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sor1: sor@15580000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-sor";</div><div class='del'>-			reg = &lt;0x15580000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15580000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_SOR1&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_SOR1_OUT&gt;,</div><div class='hunk'>@@ -1790,7 +1792,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dpaux: dpaux@155c0000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dpaux";</div><div class='del'>-			reg = &lt;0x155c0000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x155c0000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DPAUX&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_PLLDP&gt;;</div><div class='hunk'>@@ -1824,7 +1826,7 @@</div><div class='ctx'> </div><div class='ctx'> 		padctl@15880000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dsi-padctl";</div><div class='del'>-			reg = &lt;0x15880000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15880000 0x0 0x10000&gt;;</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA186_RESET_DSI&gt;;</div><div class='ctx'> 			reset-names = "dsi";</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1832,7 +1834,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dsic: dsi@15900000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dsi";</div><div class='del'>-			reg = &lt;0x15900000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15900000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DSIC&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_DSIC_LP&gt;,</div><div class='hunk'>@@ -1847,7 +1849,7 @@</div><div class='ctx'> </div><div class='ctx'> 		dsid: dsi@15940000 {</div><div class='ctx'> 			compatible = "nvidia,tegra186-dsi";</div><div class='del'>-			reg = &lt;0x15940000 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15940000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA186_CLK_DSID&gt;,</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA186_CLK_DSID_LP&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi<br/>index e8b296d9e0d3..43942db6eac9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi</a></div><div class='hunk'>@@ -104,6 +104,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serial@3110000 {</div><div class='add'>+			/delete-property/ dmas;</div><div class='add'>+			/delete-property/ dma-names;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts<br/>index c32876699a43..ea6f397a2792 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts</a></div><div class='hunk'>@@ -2121,6 +2121,12 @@</div><div class='ctx'> 			phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cec@3960000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			hdmi-phandle = &lt;&amp;sor2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c@c240000 {</div><div class='ctx'> 			typec@8 {</div><div class='ctx'> 				compatible = "cypress,cypd4226";</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi<br/>index 4a17ea5e40fd..16cf4414de59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi</a></div><div class='hunk'>@@ -2174,6 +2174,12 @@</div><div class='ctx'> 			phy-names = "usb2-1", "usb2-2", "usb3-2";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cec@3960000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			hdmi-phandle = &lt;&amp;sor1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		host1x@13e00000 {</div><div class='ctx'> 			display-hub@15200000 {</div><div class='ctx'> 				status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi<br/>index 59860d19f0f6..a410fc335fa3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi</a></div><div class='hunk'>@@ -78,6 +78,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serial@3100000 {</div><div class='add'>+			/delete-property/ dmas;</div><div class='add'>+			/delete-property/ dma-names;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi<br/>index 33f92b77cd9d..1399342f23e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra194.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra194.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra194.dtsi</a></div><div class='hunk'>@@ -747,6 +747,8 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTA&gt;;</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTA&gt;;</div><div class='add'>+			dmas = &lt;&amp;gpcdma 8&gt;, &lt;&amp;gpcdma 8&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -757,6 +759,8 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTB&gt;;</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTB&gt;;</div><div class='add'>+			dmas = &lt;&amp;gpcdma 9&gt;, &lt;&amp;gpcdma 9&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -766,9 +770,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTD&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTD&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 19&gt;, &lt;&amp;gpcdma 19&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -778,9 +782,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTE&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTE&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 20&gt;, &lt;&amp;gpcdma 20&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -790,9 +794,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTF&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTF&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 12&gt;, &lt;&amp;gpcdma 12&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -817,9 +821,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTH&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTH&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 13&gt;, &lt;&amp;gpcdma 13&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1339,7 +1343,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cec@3960000 {</div><div class='del'>-			compatible = "nvidia,tegra194-cec";</div><div class='add'>+			compatible = "nvidia,tegra194-cec", "nvidia,tegra210-cec";</div><div class='ctx'> 			reg = &lt;0x0 0x03960000 0x0 0x10000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_CEC&gt;;</div><div class='hunk'>@@ -1616,9 +1620,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTC&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTC&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 3&gt;, &lt;&amp;gpcdma 3&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1628,9 +1632,9 @@</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bpmp TEGRA194_CLK_UARTG&gt;;</div><div class='del'>-			clock-names = "serial";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA194_RESET_UARTG&gt;;</div><div class='del'>-			reset-names = "serial";</div><div class='add'>+			dmas = &lt;&amp;gpcdma 2&gt;, &lt;&amp;gpcdma 2&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi<br/>index c00db75e3910..e07aeeee3586 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> 		rtc0 = "/i2c@7000d000/pmic@3c";</div><div class='ctx'> 		rtc1 = "/rtc@7000e000";</div><div class='ctx'> 		serial0 = &amp;uarta;</div><div class='add'>+		serial3 = &amp;uartd;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -24,6 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> 	gpu@57000000 {</div><div class='ctx'> 		vdd-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* debug port */</div><div class='hunk'>@@ -49,6 +51,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		tmp451: temperature-sensor@4c {</div><div class='add'>+			compatible = "ti,tmp451";</div><div class='add'>+			reg = &lt;0x4c&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			vcc-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c@7000c400 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -351,7 +366,7 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		wifi@1 {</div><div class='del'>-			compatible = "brcm,bcm4354-fmac";</div><div class='add'>+			compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac";</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='ctx'> 			interrupts = &lt;TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts<br/>index a6a58e51822d..627abf51a5a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts</a></div><div class='hunk'>@@ -90,6 +90,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cec@70015000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		hdmi-phandle = &lt;&amp;sor1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	clock@70110000 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi<br/>index 63b94a04308e..584461f3a619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi</a></div><div class='hunk'>@@ -1375,6 +1375,15 @@</div><div class='ctx'> </div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(L, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;gpio_1v8&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		exp2: gpio@77 {</div><div class='hunk'>@@ -1383,6 +1392,15 @@</div><div class='ctx'> </div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(Z, 2) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;gpio_1v8&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1605,6 +1623,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		pwms = &lt;&amp;pwm 3 45334&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vdd_fan&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+		interrupts = &lt;TEGRA_GPIO(K, 7) IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		/* cooling level (0, 1, 2, 3) - pwm inverted */</div><div class='add'>+		cooling-levels = &lt;255 128 64 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_sys_mux: regulator-vdd-sys-mux {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VDD_SYS_MUX";</div><div class='hunk'>@@ -1686,7 +1716,7 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='del'>-		gpio = &lt;&amp;exp1 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1760,4 +1790,67 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vdd_fan: regulator-vdd-fan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_FAN";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-enable-ramp-delay = &lt;284&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			trips {</div><div class='add'>+				cpu_trip_critical: critical {</div><div class='add'>+					temperature = &lt;96500&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_hot: hot {</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_active: active {</div><div class='add'>+					temperature = &lt;50000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_trip_passive: passive {</div><div class='add'>+					temperature = &lt;30000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 3 3&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_critical&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 2 2&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_hot&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map2 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 1 1&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_active&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map3 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 0 0&gt;;</div><div class='add'>+					trip = &lt;&amp;cpu_trip_passive&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi<br/>index bbd6ff0564da..b84a8e39b404 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi</a></div><div class='hunk'>@@ -1365,7 +1365,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			hog-0 {</div><div class='add'>+			max77620-hog {</div><div class='ctx'> 				gpio-hog;</div><div class='ctx'> 				output-high;</div><div class='ctx'> 				gpios = &lt;2 GPIO_ACTIVE_HIGH&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts<br/>index c56824d7f4d8..ec0e84cb83ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts</a></div><div class='hunk'>@@ -266,7 +266,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1170000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;146&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;27500&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;300&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='ctx'> </div><div class='hunk'>@@ -281,7 +280,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1150000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;176&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;27500&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;300&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +294,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1350000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;176&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;27500&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;350&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='ctx'> </div><div class='hunk'>@@ -311,7 +308,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;242&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;27500&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;360&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='ctx'> </div><div class='hunk'>@@ -326,7 +322,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;26&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='ctx'> </div><div class='hunk'>@@ -341,7 +336,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;22&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 					maxim,active-fps-source = &lt;MAX77620_FPS_SRC_NONE&gt;;</div><div class='ctx'> 					maxim,active-fps-power-up-slot = &lt;0&gt;;</div><div class='hunk'>@@ -354,7 +348,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;62&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 					maxim,active-fps-source = &lt;MAX77620_FPS_SRC_NONE&gt;;</div><div class='ctx'> 					maxim,active-fps-power-up-slot = &lt;0&gt;;</div><div class='hunk'>@@ -371,7 +364,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;22&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> 					regulator-disable-active-discharge;</div><div class='ctx'> 					regulator-always-on;</div><div class='ctx'> 					regulator-boot-on;</div><div class='hunk'>@@ -395,7 +387,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;24&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 					maxim,active-fps-source = &lt;MAX77620_FPS_SRC_1&gt;;</div><div class='ctx'> 					maxim,active-fps-power-up-slot = &lt;3&gt;;</div><div class='hunk'>@@ -408,7 +399,6 @@</div><div class='ctx'> 					regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 					regulator-enable-ramp-delay = &lt;22&gt;;</div><div class='ctx'> 					regulator-ramp-delay = &lt;100000&gt;;</div><div class='del'>-					regulator-ramp-delay-scale = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 					maxim,active-fps-source = &lt;MAX77620_FPS_SRC_1&gt;;</div><div class='ctx'> 					maxim,active-fps-power-up-slot = &lt;6&gt;;</div><div class='hunk'>@@ -429,6 +419,12 @@</div><div class='ctx'> 		nvidia,sys-clock-req-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cec@70015000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		hdmi-phandle = &lt;&amp;sor1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hda@70030000 {</div><div class='ctx'> 		nvidia,model = "NVIDIA Jetson Nano HDA";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts<br/>index 2e5b6b2c1f56..5aa6afd56cbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210-smaug.dts</a></div><div class='hunk'>@@ -1362,6 +1362,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		touchscreen: i2c-hid-dev@20 {</div><div class='add'>+				compatible = "hid-over-i2c";</div><div class='add'>+				reg = &lt;0x20&gt;;</div><div class='add'>+				hid-descr-addr = &lt;0x0020&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c@7000c400 {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;1000000&gt;;</div><div class='hunk'>@@ -1385,6 +1398,11 @@</div><div class='ctx'> 					reg = &lt;0x55&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			usbc_extcon0: extcon0 {</div><div class='add'>+				compatible = "google,extcon-usbc-cros-ec";</div><div class='add'>+				google,usb-port-id = &lt;0&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1719,6 +1737,15 @@</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		tmp451: temperature-sensor@4c {</div><div class='add'>+			compatible = "ti,tmp451";</div><div class='add'>+			reg = &lt;0x4c&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			vcc-supply = &lt;&amp;pp1800&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmc@7000e400 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi<br/>index 882b1d1f4ada..402b0ede1472 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra210.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra210.dtsi</a></div><div class='hunk'>@@ -874,6 +874,16 @@</div><div class='ctx'> 				pins = "sdmmc3";</div><div class='ctx'> 				power-source = &lt;TEGRA_IO_PAD_VOLTAGE_3V3&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			gpio_1v8: gpio-1v8 {</div><div class='add'>+				pins = "gpio";</div><div class='add'>+				power-source = &lt;TEGRA_IO_PAD_VOLTAGE_1V8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio_3v3: gpio-3v3 {</div><div class='add'>+				pins = "gpio";</div><div class='add'>+				power-source = &lt;TEGRA_IO_PAD_VOLTAGE_3V3&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		powergates {</div><div class='hunk'>@@ -949,6 +959,15 @@</div><div class='ctx'> 		reset-names = "fuse";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cec@70015000 {</div><div class='add'>+		compatible = "nvidia,tegra210-cec";</div><div class='add'>+		reg = &lt;0x0 0x070015000 0x0 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;tegra_car TEGRA210_CLK_CEC&gt;;</div><div class='add'>+		clock-names = "cec";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mc: memory-controller@70019000 {</div><div class='ctx'> 		compatible = "nvidia,tegra210-mc";</div><div class='ctx'> 		reg = &lt;0x0 0x70019000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1218,6 +1237,8 @@</div><div class='ctx'> 		nvidia,pad-autocal-pull-down-offset-3v3 = &lt;0x7d&gt;;</div><div class='ctx'> 		nvidia,pad-autocal-pull-up-offset-1v8 = &lt;0x7b&gt;;</div><div class='ctx'> 		nvidia,pad-autocal-pull-down-offset-1v8 = &lt;0x7b&gt;;</div><div class='add'>+		nvidia,pad-autocal-pull-up-offset-sdr104 = &lt;0x0&gt;;</div><div class='add'>+		nvidia,pad-autocal-pull-down-offset-sdr104 = &lt;0x0&gt;;</div><div class='ctx'> 		nvidia,default-tap = &lt;0x2&gt;;</div><div class='ctx'> 		nvidia,default-trim = &lt;0x4&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_SDMMC4&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts<br/>index 90f12277aede..4c0e96f9d493 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts</a></div><div class='hunk'>@@ -1,551 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='del'>-#include &lt;dt-bindings/sound/rt5640.h&gt;</div><div class='del'>-</div><div class='add'>+// Module files must be included first</div><div class='ctx'> #include "tegra234-p3701-0000.dtsi"</div><div class='add'>+#include "tegra234-p3737-0000+p3701.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "NVIDIA Jetson AGX Orin Developer Kit";</div><div class='ctx'> 	compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;tcu;</div><div class='del'>-		serial1 = &amp;uarta;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttyTCU0,115200n8";</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus@0 {</div><div class='del'>-		aconnect@2900000 {</div><div class='del'>-			ahub@2900800 {</div><div class='del'>-				i2s@2901000 {</div><div class='del'>-					ports {</div><div class='del'>-						port@1 {</div><div class='del'>-							endpoint {</div><div class='del'>-								dai-format = "i2s";</div><div class='del'>-								remote-endpoint = &lt;&amp;rt5640_ep&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		serial@3100000 {</div><div class='del'>-			compatible = "nvidia,tegra194-hsuart";</div><div class='del'>-			reset-names = "serial";</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@3160000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			eeprom@56 {</div><div class='del'>-				compatible = "atmel,24c02";</div><div class='del'>-				reg = &lt;0x56&gt;;</div><div class='del'>-</div><div class='del'>-				label = "system";</div><div class='del'>-				vcc-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='del'>-				address-width = &lt;8&gt;;</div><div class='del'>-				pagesize = &lt;8&gt;;</div><div class='del'>-				size = &lt;256&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		serial@31d0000 {</div><div class='del'>-			current-speed = &lt;115200&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@31e0000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			audio-codec@1c {</div><div class='del'>-				compatible = "realtek,rt5640";</div><div class='del'>-				reg = &lt;0x1c&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-				interrupts = &lt;TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-				clocks = &lt;&amp;bpmp TEGRA234_CLK_AUD_MCLK&gt;;</div><div class='del'>-				clock-names = "mclk";</div><div class='del'>-				realtek,dmic1-data-pin = &lt;RT5640_DMIC1_DATA_PIN_NONE&gt;;</div><div class='del'>-				realtek,dmic2-data-pin = &lt;RT5640_DMIC2_DATA_PIN_NONE&gt;;</div><div class='del'>-				realtek,jack-detect-source = &lt;RT5640_JD_SRC_HDA_HEADER&gt;;</div><div class='del'>-				sound-name-prefix = "CVB-RT";</div><div class='del'>-</div><div class='del'>-				port {</div><div class='del'>-					rt5640_ep: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;i2s1_dap&gt;;</div><div class='del'>-						mclk-fs = &lt;256&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm@3280000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm@32a0000 {</div><div class='del'>-			assigned-clocks = &lt;&amp;bpmp TEGRA234_CLK_PWM3&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;bpmp TEGRA234_CLK_PLLP_OUT0&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm@32c0000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm@32f0000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mmc@3400000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-			bus-width = &lt;4&gt;;</div><div class='del'>-			cd-gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			disable-wp;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hda@3510000 {</div><div class='del'>-			nvidia,model = "NVIDIA Jetson AGX Orin HDA";</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		padctl@3520000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			pads {</div><div class='del'>-				usb2 {</div><div class='del'>-					lanes {</div><div class='del'>-						usb2-0 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						usb2-1 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						usb2-2 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						usb2-3 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb3 {</div><div class='del'>-					lanes {</div><div class='del'>-						usb3-0 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						usb3-1 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						usb3-2 {</div><div class='del'>-							status = "okay";</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				usb2-0 {</div><div class='del'>-					mode = "otg";</div><div class='del'>-					usb-role-switch;</div><div class='del'>-					status = "okay";</div><div class='del'>-</div><div class='del'>-					port {</div><div class='del'>-						hs_typec_p1: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;hs_ucsi_ccg_p1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb2-1 {</div><div class='del'>-					mode = "host";</div><div class='del'>-					status = "okay";</div><div class='del'>-</div><div class='del'>-					port {</div><div class='del'>-						hs_typec_p0: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;hs_ucsi_ccg_p0&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb2-2 {</div><div class='del'>-					mode = "host";</div><div class='del'>-					status = "okay";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb2-3 {</div><div class='del'>-					mode = "host";</div><div class='del'>-					status = "okay";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb3-0 {</div><div class='del'>-					nvidia,usb2-companion = &lt;1&gt;;</div><div class='del'>-					status = "okay";</div><div class='del'>-</div><div class='del'>-					port {</div><div class='del'>-						ss_typec_p0: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;ss_ucsi_ccg_p0&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb3-1 {</div><div class='del'>-					nvidia,usb2-companion = &lt;0&gt;;</div><div class='del'>-					status = "okay";</div><div class='del'>-</div><div class='del'>-					port {</div><div class='del'>-						ss_typec_p1: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;ss_ucsi_ccg_p1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				usb3-2 {</div><div class='del'>-					nvidia,usb2-companion = &lt;3&gt;;</div><div class='del'>-					status = "okay";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb@3550000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}&gt;;</div><div class='del'>-			phy-names = "usb2-0", "usb3-0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb@3610000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}&gt;,</div><div class='del'>-			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}&gt;;</div><div class='del'>-			phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",</div><div class='del'>-				    "usb3-0", "usb3-1", "usb3-2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ethernet@6800000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			phy-handle = &lt;&amp;mgbe0_phy&gt;;</div><div class='del'>-			phy-mode = "10gbase-r";</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				mgbe0_phy: phy@0 {</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					reg = &lt;0x0&gt;;</div><div class='del'>-</div><div class='del'>-					#phy-cells = &lt;0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c@c240000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			typec@8 {</div><div class='del'>-				compatible = "cypress,cypd4226";</div><div class='del'>-				reg = &lt;0x08&gt;;</div><div class='del'>-				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-				interrupts = &lt;TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				firmware-name = "nvidia,jetson-agx-xavier";</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				ccg_typec_con0: connector@0 {</div><div class='del'>-					compatible = "usb-c-connector";</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					label = "USB-C";</div><div class='del'>-					data-role = "host";</div><div class='del'>-</div><div class='del'>-					ports {</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-						port@0 {</div><div class='del'>-							reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-							hs_ucsi_ccg_p0: endpoint {</div><div class='del'>-								remote-endpoint = &lt;&amp;hs_typec_p0&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						port@1 {</div><div class='del'>-							reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-							ss_ucsi_ccg_p0: endpoint {</div><div class='del'>-								remote-endpoint = &lt;&amp;ss_typec_p0&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				ccg_typec_con1: connector@1 {</div><div class='del'>-					compatible = "usb-c-connector";</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					label = "USB-C";</div><div class='del'>-					data-role = "dual";</div><div class='del'>-</div><div class='del'>-					ports {</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-						port@0 {</div><div class='del'>-							reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-							hs_ucsi_ccg_p1: endpoint {</div><div class='del'>-								remote-endpoint = &lt;&amp;hs_typec_p1&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						port@1 {</div><div class='del'>-							reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-							ss_ucsi_ccg_p1: endpoint {</div><div class='del'>-								remote-endpoint = &lt;&amp;ss_typec_p1&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie@14100000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ao&gt;;</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;p2u_hsio_3&gt;;</div><div class='del'>-			phy-names = "p2u-0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie@14160000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ao&gt;;</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;p2u_hsio_4&gt;, &lt;&amp;p2u_hsio_5&gt;, &lt;&amp;p2u_hsio_6&gt;,</div><div class='del'>-			       &lt;&amp;p2u_hsio_7&gt;;</div><div class='del'>-			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie@141a0000 {</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ls&gt;;</div><div class='del'>-			vpcie3v3-supply = &lt;&amp;vdd_3v3_pcie&gt;;</div><div class='del'>-			vpcie12v-supply = &lt;&amp;vdd_12v_pcie&gt;;</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='del'>-			       &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='del'>-			       &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='del'>-			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='del'>-				    "p2u-5", "p2u-6", "p2u-7";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie-ep@141a0000 {</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ls&gt;;</div><div class='del'>-</div><div class='del'>-			reset-gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-			nvidia,refclk-select-gpios = &lt;&amp;gpio_aon</div><div class='del'>-						      TEGRA234_AON_GPIO(AA, 4)</div><div class='del'>-						      GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='del'>-			       &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='del'>-			       &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='del'>-			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='del'>-				    "p2u-5", "p2u-6", "p2u-7";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		key-force-recovery {</div><div class='del'>-			label = "Force Recovery";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;BTN_1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-power {</div><div class='del'>-			label = "Power";</div><div class='del'>-			gpios = &lt;&amp;gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;KEY_POWER&gt;;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-suspend {</div><div class='del'>-			label = "Suspend";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fan: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		cooling-levels = &lt;66 215 255&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 45334&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		compatible = "nvidia,tegra186-audio-graph-card";</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		dais = /* ADMAIF (FE) Ports */</div><div class='del'>-		       &lt;&amp;admaif0_port&gt;, &lt;&amp;admaif1_port&gt;, &lt;&amp;admaif2_port&gt;, &lt;&amp;admaif3_port&gt;,</div><div class='del'>-		       &lt;&amp;admaif4_port&gt;, &lt;&amp;admaif5_port&gt;, &lt;&amp;admaif6_port&gt;, &lt;&amp;admaif7_port&gt;,</div><div class='del'>-		       &lt;&amp;admaif8_port&gt;, &lt;&amp;admaif9_port&gt;, &lt;&amp;admaif10_port&gt;, &lt;&amp;admaif11_port&gt;,</div><div class='del'>-		       &lt;&amp;admaif12_port&gt;, &lt;&amp;admaif13_port&gt;, &lt;&amp;admaif14_port&gt;, &lt;&amp;admaif15_port&gt;,</div><div class='del'>-		       &lt;&amp;admaif16_port&gt;, &lt;&amp;admaif17_port&gt;, &lt;&amp;admaif18_port&gt;, &lt;&amp;admaif19_port&gt;,</div><div class='del'>-		       /* XBAR Ports */</div><div class='del'>-		       &lt;&amp;xbar_i2s1_port&gt;, &lt;&amp;xbar_i2s2_port&gt;, &lt;&amp;xbar_i2s4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_i2s6_port&gt;, &lt;&amp;xbar_dmic3_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_sfc1_in_port&gt;, &lt;&amp;xbar_sfc2_in_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_sfc3_in_port&gt;, &lt;&amp;xbar_sfc4_in_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mvc1_in_port&gt;, &lt;&amp;xbar_mvc2_in_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx1_in1_port&gt;, &lt;&amp;xbar_amx1_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx1_in3_port&gt;, &lt;&amp;xbar_amx1_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx2_in1_port&gt;, &lt;&amp;xbar_amx2_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx2_in3_port&gt;, &lt;&amp;xbar_amx2_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx3_in1_port&gt;, &lt;&amp;xbar_amx3_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx3_in3_port&gt;, &lt;&amp;xbar_amx3_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx4_in1_port&gt;, &lt;&amp;xbar_amx4_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_amx4_in3_port&gt;, &lt;&amp;xbar_amx4_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_adx1_in_port&gt;, &lt;&amp;xbar_adx2_in_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_adx3_in_port&gt;, &lt;&amp;xbar_adx4_in_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mix_in1_port&gt;, &lt;&amp;xbar_mix_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mix_in3_port&gt;, &lt;&amp;xbar_mix_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mix_in5_port&gt;, &lt;&amp;xbar_mix_in6_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mix_in7_port&gt;, &lt;&amp;xbar_mix_in8_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_mix_in9_port&gt;, &lt;&amp;xbar_mix_in10_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_asrc_in1_port&gt;, &lt;&amp;xbar_asrc_in2_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_asrc_in3_port&gt;, &lt;&amp;xbar_asrc_in4_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_asrc_in5_port&gt;, &lt;&amp;xbar_asrc_in6_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_asrc_in7_port&gt;,</div><div class='del'>-		       &lt;&amp;xbar_ope1_in_port&gt;,</div><div class='del'>-		       /* HW accelerators */</div><div class='del'>-		       &lt;&amp;sfc1_out_port&gt;, &lt;&amp;sfc2_out_port&gt;,</div><div class='del'>-		       &lt;&amp;sfc3_out_port&gt;, &lt;&amp;sfc4_out_port&gt;,</div><div class='del'>-		       &lt;&amp;mvc1_out_port&gt;, &lt;&amp;mvc2_out_port&gt;,</div><div class='del'>-		       &lt;&amp;amx1_out_port&gt;, &lt;&amp;amx2_out_port&gt;,</div><div class='del'>-		       &lt;&amp;amx3_out_port&gt;, &lt;&amp;amx4_out_port&gt;,</div><div class='del'>-		       &lt;&amp;adx1_out1_port&gt;, &lt;&amp;adx1_out2_port&gt;,</div><div class='del'>-		       &lt;&amp;adx1_out3_port&gt;, &lt;&amp;adx1_out4_port&gt;,</div><div class='del'>-		       &lt;&amp;adx2_out1_port&gt;, &lt;&amp;adx2_out2_port&gt;,</div><div class='del'>-		       &lt;&amp;adx2_out3_port&gt;, &lt;&amp;adx2_out4_port&gt;,</div><div class='del'>-		       &lt;&amp;adx3_out1_port&gt;, &lt;&amp;adx3_out2_port&gt;,</div><div class='del'>-		       &lt;&amp;adx3_out3_port&gt;, &lt;&amp;adx3_out4_port&gt;,</div><div class='del'>-		       &lt;&amp;adx4_out1_port&gt;, &lt;&amp;adx4_out2_port&gt;,</div><div class='del'>-		       &lt;&amp;adx4_out3_port&gt;, &lt;&amp;adx4_out4_port&gt;,</div><div class='del'>-		       &lt;&amp;mix_out1_port&gt;, &lt;&amp;mix_out2_port&gt;, &lt;&amp;mix_out3_port&gt;,</div><div class='del'>-		       &lt;&amp;mix_out4_port&gt;, &lt;&amp;mix_out5_port&gt;,</div><div class='del'>-		       &lt;&amp;asrc_out1_port&gt;, &lt;&amp;asrc_out2_port&gt;, &lt;&amp;asrc_out3_port&gt;,</div><div class='del'>-		       &lt;&amp;asrc_out4_port&gt;, &lt;&amp;asrc_out5_port&gt;, &lt;&amp;asrc_out6_port&gt;,</div><div class='del'>-		       &lt;&amp;ope1_out_port&gt;,</div><div class='del'>-		       /* BE I/O Ports */</div><div class='del'>-		       &lt;&amp;i2s1_port&gt;, &lt;&amp;i2s2_port&gt;, &lt;&amp;i2s4_port&gt;, &lt;&amp;i2s6_port&gt;,</div><div class='del'>-		       &lt;&amp;dmic3_port&gt;;</div><div class='del'>-</div><div class='del'>-		label = "NVIDIA Jetson AGX Orin APE";</div><div class='del'>-</div><div class='del'>-		widgets = "Microphone",	"CVB-RT MIC Jack",</div><div class='del'>-			  "Microphone",	"CVB-RT MIC",</div><div class='del'>-			  "Headphone",	"CVB-RT HP Jack",</div><div class='del'>-			  "Speaker",	"CVB-RT SPK";</div><div class='del'>-</div><div class='del'>-		routing = /* I2S1 &lt;-&gt; RT5640 */</div><div class='del'>-			  "CVB-RT AIF1 Playback",	"I2S1 DAP-Playback",</div><div class='del'>-			  "I2S1 DAP-Capture",		"CVB-RT AIF1 Capture",</div><div class='del'>-			  /* RT5640 codec controls */</div><div class='del'>-			  "CVB-RT HP Jack",		"CVB-RT HPOL",</div><div class='del'>-			  "CVB-RT HP Jack",		"CVB-RT HPOR",</div><div class='del'>-			  "CVB-RT IN1P",		"CVB-RT MIC Jack",</div><div class='del'>-			  "CVB-RT IN2P",		"CVB-RT MIC Jack",</div><div class='del'>-			  "CVB-RT SPK",			"CVB-RT SPOLP",</div><div class='del'>-			  "CVB-RT SPK",			"CVB-RT SPORP",</div><div class='del'>-			  "CVB-RT DMIC1",		"CVB-RT MIC",</div><div class='del'>-			  "CVB-RT DMIC2",		"CVB-RT MIC";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	thermal-zones {</div><div class='del'>-		tj-thermal {</div><div class='del'>-			cooling-maps {</div><div class='del'>-				map-active-0 {</div><div class='del'>-					cooling-device = &lt;&amp;fan 0 1&gt;;</div><div class='del'>-					trip = &lt;&amp;tj_trip_active0&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				map-active-1 {</div><div class='del'>-					cooling-device = &lt;&amp;fan 1 2&gt;;</div><div class='del'>-					trip = &lt;&amp;tj_trip_active1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_1v8_sys: regulator-vdd-1v8-sys {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VDD_1V8_SYS";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_3v3_pcie: regulator-vdd-3v3-pcie {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VDD_3V3_PCIE";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio TEGRA234_MAIN_GPIO(H, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_12v_pcie: regulator-vdd-12v-pcie {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "VDD_12V_PCIE";</div><div class='del'>-		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='del'>-		gpio = &lt;&amp;gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts<br/>new file mode 100644<br/>index 000000000000..979f085691a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0008.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+// Module files must be included first</div><div class='add'>+#include "tegra234-p3701-0008.dtsi"</div><div class='add'>+#include "tegra234-p3737-0000+p3701.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NVIDIA Jetson AGX Orin Developer Kit";</div><div class='add'>+	compatible = "nvidia,p3737-0000+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi<br/>new file mode 100644<br/>index 000000000000..f6cad29355e6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701.dtsi</a></div><div class='hunk'>@@ -0,0 +1,547 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/tegra234-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/rt5640.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;tcu;</div><div class='add'>+		serial1 = &amp;uarta;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyTCU0,115200n8";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bus@0 {</div><div class='add'>+		aconnect@2900000 {</div><div class='add'>+			ahub@2900800 {</div><div class='add'>+				i2s@2901000 {</div><div class='add'>+					ports {</div><div class='add'>+						port@1 {</div><div class='add'>+							endpoint {</div><div class='add'>+								dai-format = "i2s";</div><div class='add'>+								remote-endpoint = &lt;&amp;rt5640_ep&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@3100000 {</div><div class='add'>+			compatible = "nvidia,tegra194-hsuart";</div><div class='add'>+			reset-names = "serial";</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@3160000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			eeprom@56 {</div><div class='add'>+				compatible = "atmel,24c02";</div><div class='add'>+				reg = &lt;0x56&gt;;</div><div class='add'>+</div><div class='add'>+				label = "system";</div><div class='add'>+				vcc-supply = &lt;&amp;vdd_1v8_sys&gt;;</div><div class='add'>+				address-width = &lt;8&gt;;</div><div class='add'>+				pagesize = &lt;8&gt;;</div><div class='add'>+				size = &lt;256&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@31d0000 {</div><div class='add'>+			current-speed = &lt;115200&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@31e0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			audio-codec@1c {</div><div class='add'>+				compatible = "realtek,rt5640";</div><div class='add'>+				reg = &lt;0x1c&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;bpmp TEGRA234_CLK_AUD_MCLK&gt;;</div><div class='add'>+				clock-names = "mclk";</div><div class='add'>+				realtek,dmic1-data-pin = &lt;RT5640_DMIC1_DATA_PIN_NONE&gt;;</div><div class='add'>+				realtek,dmic2-data-pin = &lt;RT5640_DMIC2_DATA_PIN_NONE&gt;;</div><div class='add'>+				realtek,jack-detect-source = &lt;RT5640_JD_SRC_HDA_HEADER&gt;;</div><div class='add'>+				sound-name-prefix = "CVB-RT";</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					rt5640_ep: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;i2s1_dap&gt;;</div><div class='add'>+						mclk-fs = &lt;256&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@3280000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@32a0000 {</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA234_CLK_PWM3&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA234_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@32c0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@32f0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc@3400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			bus-width = &lt;4&gt;;</div><div class='add'>+			cd-gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			disable-wp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hda@3510000 {</div><div class='add'>+			nvidia,model = "NVIDIA Jetson AGX Orin HDA";</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		padctl@3520000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			pads {</div><div class='add'>+				usb2 {</div><div class='add'>+					lanes {</div><div class='add'>+						usb2-0 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						usb2-1 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						usb2-2 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						usb2-3 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb3 {</div><div class='add'>+					lanes {</div><div class='add'>+						usb3-0 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						usb3-1 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						usb3-2 {</div><div class='add'>+							status = "okay";</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				usb2-0 {</div><div class='add'>+					mode = "otg";</div><div class='add'>+					usb-role-switch;</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					port {</div><div class='add'>+						hs_typec_p1: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;hs_ucsi_ccg_p1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb2-1 {</div><div class='add'>+					mode = "host";</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					port {</div><div class='add'>+						hs_typec_p0: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;hs_ucsi_ccg_p0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb2-2 {</div><div class='add'>+					mode = "host";</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb2-3 {</div><div class='add'>+					mode = "host";</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb3-0 {</div><div class='add'>+					nvidia,usb2-companion = &lt;1&gt;;</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					port {</div><div class='add'>+						ss_typec_p0: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;ss_ucsi_ccg_p0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb3-1 {</div><div class='add'>+					nvidia,usb2-companion = &lt;0&gt;;</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					port {</div><div class='add'>+						ss_typec_p1: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;ss_ucsi_ccg_p1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usb3-2 {</div><div class='add'>+					nvidia,usb2-companion = &lt;3&gt;;</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb@3550000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}&gt;;</div><div class='add'>+			phy-names = "usb2-0", "usb3-0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb@3610000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}&gt;,</div><div class='add'>+			       &lt;&amp;{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}&gt;;</div><div class='add'>+			phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3",</div><div class='add'>+				    "usb3-0", "usb3-1", "usb3-2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet@6800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			phy-handle = &lt;&amp;mgbe0_phy&gt;;</div><div class='add'>+			phy-mode = "10gbase-r";</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				mgbe0_phy: phy@0 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+					reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+					#phy-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@c240000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			typec@8 {</div><div class='add'>+				compatible = "cypress,cypd4226";</div><div class='add'>+				reg = &lt;0x08&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;TEGRA234_MAIN_GPIO(Y, 4) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				firmware-name = "nvidia,jetson-agx-xavier";</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				ccg_typec_con0: connector@0 {</div><div class='add'>+					compatible = "usb-c-connector";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					label = "USB-C";</div><div class='add'>+					data-role = "host";</div><div class='add'>+</div><div class='add'>+					ports {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						port@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+							hs_ucsi_ccg_p0: endpoint {</div><div class='add'>+								remote-endpoint = &lt;&amp;hs_typec_p0&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						port@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+							ss_ucsi_ccg_p0: endpoint {</div><div class='add'>+								remote-endpoint = &lt;&amp;ss_typec_p0&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ccg_typec_con1: connector@1 {</div><div class='add'>+					compatible = "usb-c-connector";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					label = "USB-C";</div><div class='add'>+					data-role = "dual";</div><div class='add'>+</div><div class='add'>+					ports {</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						port@0 {</div><div class='add'>+							reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+							hs_ucsi_ccg_p1: endpoint {</div><div class='add'>+								remote-endpoint = &lt;&amp;hs_typec_p1&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						port@1 {</div><div class='add'>+							reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+							ss_ucsi_ccg_p1: endpoint {</div><div class='add'>+								remote-endpoint = &lt;&amp;ss_typec_p1&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie@14100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ao&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;p2u_hsio_3&gt;;</div><div class='add'>+			phy-names = "p2u-0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie@14160000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ao&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;p2u_hsio_4&gt;, &lt;&amp;p2u_hsio_5&gt;, &lt;&amp;p2u_hsio_6&gt;,</div><div class='add'>+			       &lt;&amp;p2u_hsio_7&gt;;</div><div class='add'>+			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie@141a0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ls&gt;;</div><div class='add'>+			vpcie3v3-supply = &lt;&amp;vdd_3v3_pcie&gt;;</div><div class='add'>+			vpcie12v-supply = &lt;&amp;vdd_12v_pcie&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='add'>+			       &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='add'>+			       &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='add'>+			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='add'>+				    "p2u-5", "p2u-6", "p2u-7";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-ep@141a0000 {</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ls&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			nvidia,refclk-select-gpios = &lt;&amp;gpio_aon</div><div class='add'>+						      TEGRA234_AON_GPIO(AA, 4)</div><div class='add'>+						      GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='add'>+			       &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='add'>+			       &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='add'>+			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='add'>+				    "p2u-5", "p2u-6", "p2u-7";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		key-force-recovery {</div><div class='add'>+			label = "Force Recovery";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power";</div><div class='add'>+			gpios = &lt;&amp;gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-suspend {</div><div class='add'>+			label = "Suspend";</div><div class='add'>+			gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;66 215 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 45334&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "nvidia,tegra186-audio-graph-card";</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		dais = /* ADMAIF (FE) Ports */</div><div class='add'>+		       &lt;&amp;admaif0_port&gt;, &lt;&amp;admaif1_port&gt;, &lt;&amp;admaif2_port&gt;, &lt;&amp;admaif3_port&gt;,</div><div class='add'>+		       &lt;&amp;admaif4_port&gt;, &lt;&amp;admaif5_port&gt;, &lt;&amp;admaif6_port&gt;, &lt;&amp;admaif7_port&gt;,</div><div class='add'>+		       &lt;&amp;admaif8_port&gt;, &lt;&amp;admaif9_port&gt;, &lt;&amp;admaif10_port&gt;, &lt;&amp;admaif11_port&gt;,</div><div class='add'>+		       &lt;&amp;admaif12_port&gt;, &lt;&amp;admaif13_port&gt;, &lt;&amp;admaif14_port&gt;, &lt;&amp;admaif15_port&gt;,</div><div class='add'>+		       &lt;&amp;admaif16_port&gt;, &lt;&amp;admaif17_port&gt;, &lt;&amp;admaif18_port&gt;, &lt;&amp;admaif19_port&gt;,</div><div class='add'>+		       /* XBAR Ports */</div><div class='add'>+		       &lt;&amp;xbar_i2s1_port&gt;, &lt;&amp;xbar_i2s2_port&gt;, &lt;&amp;xbar_i2s4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_i2s6_port&gt;, &lt;&amp;xbar_dmic3_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_sfc1_in_port&gt;, &lt;&amp;xbar_sfc2_in_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_sfc3_in_port&gt;, &lt;&amp;xbar_sfc4_in_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mvc1_in_port&gt;, &lt;&amp;xbar_mvc2_in_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx1_in1_port&gt;, &lt;&amp;xbar_amx1_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx1_in3_port&gt;, &lt;&amp;xbar_amx1_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx2_in1_port&gt;, &lt;&amp;xbar_amx2_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx2_in3_port&gt;, &lt;&amp;xbar_amx2_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx3_in1_port&gt;, &lt;&amp;xbar_amx3_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx3_in3_port&gt;, &lt;&amp;xbar_amx3_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx4_in1_port&gt;, &lt;&amp;xbar_amx4_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_amx4_in3_port&gt;, &lt;&amp;xbar_amx4_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_adx1_in_port&gt;, &lt;&amp;xbar_adx2_in_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_adx3_in_port&gt;, &lt;&amp;xbar_adx4_in_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mix_in1_port&gt;, &lt;&amp;xbar_mix_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mix_in3_port&gt;, &lt;&amp;xbar_mix_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mix_in5_port&gt;, &lt;&amp;xbar_mix_in6_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mix_in7_port&gt;, &lt;&amp;xbar_mix_in8_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_mix_in9_port&gt;, &lt;&amp;xbar_mix_in10_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_asrc_in1_port&gt;, &lt;&amp;xbar_asrc_in2_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_asrc_in3_port&gt;, &lt;&amp;xbar_asrc_in4_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_asrc_in5_port&gt;, &lt;&amp;xbar_asrc_in6_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_asrc_in7_port&gt;,</div><div class='add'>+		       &lt;&amp;xbar_ope1_in_port&gt;,</div><div class='add'>+		       /* HW accelerators */</div><div class='add'>+		       &lt;&amp;sfc1_out_port&gt;, &lt;&amp;sfc2_out_port&gt;,</div><div class='add'>+		       &lt;&amp;sfc3_out_port&gt;, &lt;&amp;sfc4_out_port&gt;,</div><div class='add'>+		       &lt;&amp;mvc1_out_port&gt;, &lt;&amp;mvc2_out_port&gt;,</div><div class='add'>+		       &lt;&amp;amx1_out_port&gt;, &lt;&amp;amx2_out_port&gt;,</div><div class='add'>+		       &lt;&amp;amx3_out_port&gt;, &lt;&amp;amx4_out_port&gt;,</div><div class='add'>+		       &lt;&amp;adx1_out1_port&gt;, &lt;&amp;adx1_out2_port&gt;,</div><div class='add'>+		       &lt;&amp;adx1_out3_port&gt;, &lt;&amp;adx1_out4_port&gt;,</div><div class='add'>+		       &lt;&amp;adx2_out1_port&gt;, &lt;&amp;adx2_out2_port&gt;,</div><div class='add'>+		       &lt;&amp;adx2_out3_port&gt;, &lt;&amp;adx2_out4_port&gt;,</div><div class='add'>+		       &lt;&amp;adx3_out1_port&gt;, &lt;&amp;adx3_out2_port&gt;,</div><div class='add'>+		       &lt;&amp;adx3_out3_port&gt;, &lt;&amp;adx3_out4_port&gt;,</div><div class='add'>+		       &lt;&amp;adx4_out1_port&gt;, &lt;&amp;adx4_out2_port&gt;,</div><div class='add'>+		       &lt;&amp;adx4_out3_port&gt;, &lt;&amp;adx4_out4_port&gt;,</div><div class='add'>+		       &lt;&amp;mix_out1_port&gt;, &lt;&amp;mix_out2_port&gt;, &lt;&amp;mix_out3_port&gt;,</div><div class='add'>+		       &lt;&amp;mix_out4_port&gt;, &lt;&amp;mix_out5_port&gt;,</div><div class='add'>+		       &lt;&amp;asrc_out1_port&gt;, &lt;&amp;asrc_out2_port&gt;, &lt;&amp;asrc_out3_port&gt;,</div><div class='add'>+		       &lt;&amp;asrc_out4_port&gt;, &lt;&amp;asrc_out5_port&gt;, &lt;&amp;asrc_out6_port&gt;,</div><div class='add'>+		       &lt;&amp;ope1_out_port&gt;,</div><div class='add'>+		       /* BE I/O Ports */</div><div class='add'>+		       &lt;&amp;i2s1_port&gt;, &lt;&amp;i2s2_port&gt;, &lt;&amp;i2s4_port&gt;, &lt;&amp;i2s6_port&gt;,</div><div class='add'>+		       &lt;&amp;dmic3_port&gt;;</div><div class='add'>+</div><div class='add'>+		label = "NVIDIA Jetson AGX Orin APE";</div><div class='add'>+</div><div class='add'>+		widgets = "Microphone",	"CVB-RT MIC Jack",</div><div class='add'>+			  "Microphone",	"CVB-RT MIC",</div><div class='add'>+			  "Headphone",	"CVB-RT HP Jack",</div><div class='add'>+			  "Speaker",	"CVB-RT SPK";</div><div class='add'>+</div><div class='add'>+		routing = /* I2S1 &lt;-&gt; RT5640 */</div><div class='add'>+			  "CVB-RT AIF1 Playback",	"I2S1 DAP-Playback",</div><div class='add'>+			  "I2S1 DAP-Capture",		"CVB-RT AIF1 Capture",</div><div class='add'>+			  /* RT5640 codec controls */</div><div class='add'>+			  "CVB-RT HP Jack",		"CVB-RT HPOL",</div><div class='add'>+			  "CVB-RT HP Jack",		"CVB-RT HPOR",</div><div class='add'>+			  "CVB-RT IN1P",		"CVB-RT MIC Jack",</div><div class='add'>+			  "CVB-RT IN2P",		"CVB-RT MIC Jack",</div><div class='add'>+			  "CVB-RT SPK",			"CVB-RT SPOLP",</div><div class='add'>+			  "CVB-RT SPK",			"CVB-RT SPORP",</div><div class='add'>+			  "CVB-RT DMIC1",		"CVB-RT MIC",</div><div class='add'>+			  "CVB-RT DMIC2",		"CVB-RT MIC";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		tj-thermal {</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map-active-0 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 0 1&gt;;</div><div class='add'>+					trip = &lt;&amp;tj_trip_active0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map-active-1 {</div><div class='add'>+					cooling-device = &lt;&amp;fan 1 2&gt;;</div><div class='add'>+					trip = &lt;&amp;tj_trip_active1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_1v8_sys: regulator-vdd-1v8-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_1V8_SYS";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_pcie: regulator-vdd-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_3V3_PCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA234_MAIN_GPIO(H, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_12v_pcie: regulator-vdd-12v-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_12V_PCIE";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio TEGRA234_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts<br/>index 36e888053746..9ce55b4d2de8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts</a></div><div class='hunk'>@@ -302,6 +302,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie@141a0000 {</div><div class='add'>+			reg = &lt;0x00 0x141a0000 0x0 0x00020000   /* appl registers (128K)      */</div><div class='add'>+			       0x00 0x3a000000 0x0 0x00040000   /* configuration space (256K) */</div><div class='add'>+			       0x00 0x3a040000 0x0 0x00040000   /* iATU_DMA reg space (256K)  */</div><div class='add'>+			       0x00 0x3a080000 0x0 0x00040000   /* DBI reg space (256K)       */</div><div class='add'>+			       0x2e 0x20000000 0x0 0x10000000&gt;; /* ECAM (256MB)               */</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x81000000 0x00 0x3a100000 0x00 0x3a100000 0x0 0x00100000      /* downstream I/O (1MB) */</div><div class='add'>+				  0x82000000 0x00 0x40000000 0x2e 0x30000000 0x0 0x08000000      /* non-prefetchable memory (128MB) */</div><div class='add'>+				  0xc3000000 0x28 0x00000000 0x28 0x00000000 0x6 0x20000000&gt;;    /* prefetchable memory (25088MB) */</div><div class='add'>+</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 			vddio-pex-ctl-supply = &lt;&amp;vdd_1v8_ls&gt;;</div><div class='ctx'> 			phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi<br/>index 19340d13f789..41821354bbda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi</a></div><div class='hunk'>@@ -227,13 +227,6 @@</div><div class='ctx'> 			wakeup-event-action = &lt;EV_ACT_ASSERTED&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		key-suspend {</div><div class='del'>-			label = "Suspend";</div><div class='del'>-			gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_KEY&gt;;</div><div class='del'>-			linux,code = &lt;KEY_SLEEP&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fan: pwm-fan {</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi<br/>index 984c85eab41a..df034dbb8285 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra234.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra234.dtsi</a></div><div class='hunk'>@@ -16,6 +16,18 @@</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;gen1_i2c;</div><div class='add'>+		i2c1 = &amp;gen2_i2c;</div><div class='add'>+		i2c2 = &amp;cam_i2c;</div><div class='add'>+		i2c3 = &amp;dp_aux_ch1_i2c;</div><div class='add'>+		i2c4 = &amp;bpmp_i2c;</div><div class='add'>+		i2c5 = &amp;dp_aux_ch0_i2c;</div><div class='add'>+		i2c6 = &amp;dp_aux_ch2_i2c;</div><div class='add'>+		i2c7 = &amp;gen8_i2c;</div><div class='add'>+		i2c8 = &amp;dp_aux_ch3_i2c;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	bus@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> </div><div class='hunk'>@@ -2948,6 +2960,11 @@</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA234_CLK_QSPI0_PM&gt;;</div><div class='ctx'> 			clock-names = "qspi", "qspi_out";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA234_RESET_QSPI0&gt;;</div><div class='add'>+			iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_QSPI0&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA234_CLK_QSPI0_2X_PM&gt;,</div><div class='add'>+					  &lt;&amp;bpmp TEGRA234_CLK_QSPI0_PM&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;199999999 99999999&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA234_CLK_PLLC&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3031,6 +3048,11 @@</div><div class='ctx'> 				 &lt;&amp;bpmp TEGRA234_CLK_QSPI1_PM&gt;;</div><div class='ctx'> 			clock-names = "qspi", "qspi_out";</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA234_RESET_QSPI1&gt;;</div><div class='add'>+			iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_QSPI1&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA234_CLK_QSPI1_2X_PM&gt;,</div><div class='add'>+					  &lt;&amp;bpmp TEGRA234_CLK_QSPI1_PM&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;199999999 99999999&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA234_CLK_PLLC&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3815,7 +3837,7 @@</div><div class='ctx'> 			compatible = "nvidia,tegra234-sce-fabric";</div><div class='ctx'> 			reg = &lt;0x0 0xb600000 0x0 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			status = "okay";</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rce-fabric@be00000 {</div><div class='hunk'>@@ -3900,7 +3922,7 @@</div><div class='ctx'> 			assigned-clock-parents = &lt;&amp;bpmp TEGRA234_CLK_PLLP_OUT0&gt;;</div><div class='ctx'> 			resets = &lt;&amp;bpmp TEGRA234_RESET_SPI2&gt;;</div><div class='ctx'> 			reset-names = "spi";</div><div class='del'>-			dmas = &lt;&amp;gpcdma 19&gt;, &lt;&amp;gpcdma 19&gt;;</div><div class='add'>+			dmas = &lt;&amp;gpcdma 16&gt;, &lt;&amp;gpcdma 16&gt;;</div><div class='ctx'> 			dma-names = "rx", "tx";</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -3995,7 +4017,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dce-fabric@de00000 {</div><div class='del'>-			compatible = "nvidia,tegra234-sce-fabric";</div><div class='add'>+			compatible = "nvidia,tegra234-dce-fabric";</div><div class='ctx'> 			reg = &lt;0x0 0xde00000 0x0 0x40000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			status = "okay";</div><div class='hunk'>@@ -4018,6 +4040,8 @@</div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		smmu_iso: iommu@10000000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi<br/>new file mode 100644<br/>index 000000000000..94ace6784749<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3834-0008.dtsi</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include "tegra264-p3834.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nvidia,p3834-0008", "nvidia,tegra264";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi<br/>new file mode 100644<br/>index 000000000000..06795c82427a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include "tegra264.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nvidia,p3834", "nvidia,tegra264";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bus@0 {</div><div class='add'>+		serial@c4e0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@c5a0000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bus@8100000000 {</div><div class='add'>+		iommu@5000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		iommu@6000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts b/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts<br/>new file mode 100644<br/>index 000000000000..3a6f4b7e6b75<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834-0008.dts</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+// module files must be included first</div><div class='add'>+#include "tegra264-p3834-0008.dtsi"</div><div class='add'>+#include "tegra264-p3971-0089+p3834.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "NVIDIA P3971-0089+P3834-0008 Engineering Reference Platform";</div><div class='add'>+	compatible = "nvidia,p3971-0089+p3834-0008", "nvidia,p3834-0008", "nvidia,tegra264";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi<br/>new file mode 100644<br/>index 000000000000..46cfa8f1da1c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089+p3834.dtsi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include "tegra264-p3971-0089.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;{/bus@0/serial@c4e0000};</div><div class='add'>+		serial1 = &amp;{/bus@0/serial@c5a0000};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi<br/>new file mode 100644<br/>index 000000000000..e8576cf2a0b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3971-0089.dtsi</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include "tegra264-p3971.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi<br/>new file mode 100644<br/>index 000000000000..6b6259b7310f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264-p3971.dtsi</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi<br/>new file mode 100644<br/>index 000000000000..872a69553e3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/nvidia/tegra264.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/nvidia/tegra264.dtsi</a></div><div class='hunk'>@@ -0,0 +1,637 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/nvidia,tegra264.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mailbox/tegra186-hsp.h&gt;</div><div class='add'>+#include &lt;dt-bindings/memory/nvidia,tegra264.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/nvidia,tegra264.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nvidia,tegra264";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		shmem_bpmp: shmem@86070000 {</div><div class='add'>+			compatible = "nvidia,tegra264-bpmp-shmem";</div><div class='add'>+			reg = &lt;0x0 0x86070000 0x0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SYSTEM MMIO */</div><div class='add'>+	bus@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00 0x00000000 0x00 0x00000000 0x01 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+		misc@100000 {</div><div class='add'>+			compatible = "nvidia,tegra234-misc";</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0x0f000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c140000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@8000000 {</div><div class='add'>+			compatible = "nvidia,tegra234-timer";</div><div class='add'>+			reg = &lt;0x0 0x08000000 0x0 0x140000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 776 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpcdma: dma-controller@8400000 {</div><div class='add'>+			compatible = "nvidia,tegra264-gpcdma", "nvidia,tegra186-gpcdma";</div><div class='add'>+			reg = &lt;0x0 0x08400000 0x0 0x210000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			iommus = &lt;&amp;smmu1 0x00000800&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			dma-channel-mask = &lt;0xfffffffe&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsp_top: hsp@8800000 {</div><div class='add'>+			compatible = "nvidia,tegra264-hsp";</div><div class='add'>+			reg = &lt;0x0 0x08800000 0x0 0xd0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 620 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 624 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 626 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "doorbell", "shared0", "shared1", "shared2",</div><div class='add'>+					  "shared3", "shared4", "shared5", "shared6",</div><div class='add'>+					  "shared7";</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@c2c0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-rtc", "nvidia,tegra20-rtc";</div><div class='add'>+			reg = &lt;0x0 0x0c2c0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pmc&gt;;</div><div class='add'>+			interrupts = &lt;65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_CLK_S&gt;;</div><div class='add'>+			clock-names = "rtc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@c4e0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-utc";</div><div class='add'>+			reg = &lt;0x0 0x0c4e0000 0x0 0x8000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c4e8000 0x0 0x8000&gt;;</div><div class='add'>+			reg-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			rx-threshold = &lt;4&gt;;</div><div class='add'>+			tx-threshold = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@c5a0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-utc";</div><div class='add'>+			reg = &lt;0x0 0x0c5a0000 0x0 0x8000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c5a8000 0x0 0x8000&gt;;</div><div class='add'>+			reg-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			rx-threshold = &lt;4&gt;;</div><div class='add'>+			tx-threshold = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@c5f0000 {</div><div class='add'>+			compatible = "arm,sbsa-uart";</div><div class='add'>+			reg = &lt;0x0 0x0c5f0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@c600000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x0 0x0c600000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_AON_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLAON&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_AON_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLAON&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C2&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@c610000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x0 0x0c610000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_AON_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLAON&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_AON_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLAON&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C3&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmc: pmc@c800000 {</div><div class='add'>+			compatible = "nvidia,tegra264-pmc";</div><div class='add'>+			reg = &lt;0x0 0x0c800000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c990000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ca00000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c980000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c9c0000 0x0 0x40000&gt;;</div><div class='add'>+			reg-names = "pmc", "wake", "aotag", "scratch", "misc";</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TOP_MMIO */</div><div class='add'>+	bus@8100000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00 0x00000000 0x81 0x00000000 0x01 0x00000000&gt;, /* MMIO */</div><div class='add'>+			 &lt;0x01 0x00000000 0x00 0x20000000 0x00 0x40000000&gt;, /* non-prefetchable memory (32-bit) */</div><div class='add'>+			 &lt;0x02 0x00000000 0xd0 0x00000000 0x08 0x80000000&gt;; /* ECAM, prefetchable memory, I/O */</div><div class='add'>+</div><div class='add'>+		smmu1: iommu@5000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x00 0x5000000 0x0 0x200000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 12 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smmu2: iommu@6000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x00 0x6000000 0x0 0x200000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 2 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mc: memory-controller@8020000 {</div><div class='add'>+			compatible = "nvidia,tegra264-mc";</div><div class='add'>+			reg = &lt;0x00 0x8020000 0x0 0x20000&gt;, /* MC broadcast */</div><div class='add'>+			      &lt;0x00 0x8040000 0x0 0x20000&gt;, /* MC  0 */</div><div class='add'>+			      &lt;0x00 0x8060000 0x0 0x20000&gt;, /* MC  1 */</div><div class='add'>+			      &lt;0x00 0x8080000 0x0 0x20000&gt;, /* MC  2 */</div><div class='add'>+			      &lt;0x00 0x80a0000 0x0 0x20000&gt;, /* MC  3 */</div><div class='add'>+			      &lt;0x00 0x80c0000 0x0 0x20000&gt;, /* MC  4 */</div><div class='add'>+			      &lt;0x00 0x80e0000 0x0 0x20000&gt;, /* MC  5 */</div><div class='add'>+			      &lt;0x00 0x8100000 0x0 0x20000&gt;, /* MC  6 */</div><div class='add'>+			      &lt;0x00 0x8120000 0x0 0x20000&gt;, /* MC  7 */</div><div class='add'>+			      &lt;0x00 0x8140000 0x0 0x20000&gt;, /* MC  8 */</div><div class='add'>+			      &lt;0x00 0x8160000 0x0 0x20000&gt;, /* MC  9 */</div><div class='add'>+			      &lt;0x00 0x8180000 0x0 0x20000&gt;, /* MC 10 */</div><div class='add'>+			      &lt;0x00 0x81a0000 0x0 0x20000&gt;, /* MC 11 */</div><div class='add'>+			      &lt;0x00 0x81c0000 0x0 0x20000&gt;, /* MC 12 */</div><div class='add'>+			      &lt;0x00 0x81e0000 0x0 0x20000&gt;, /* MC 13 */</div><div class='add'>+			      &lt;0x00 0x8200000 0x0 0x20000&gt;, /* MC 14 */</div><div class='add'>+			      &lt;0x00 0x8220000 0x0 0x20000&gt;; /* MC 15 */</div><div class='add'>+			reg-names = "broadcast", "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+				    "ch4", "ch5", "ch6", "ch7", "ch8", "ch9",</div><div class='add'>+				    "ch10", "ch11", "ch12", "ch13", "ch14",</div><div class='add'>+				    "ch15";</div><div class='add'>+			interrupts = &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/* limit the DMA range for memory clients to [39:0] */</div><div class='add'>+			dma-ranges = &lt;0x0 0x0 0x0 0x0 0x100 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			emc: external-memory-controller@8800000 {</div><div class='add'>+				compatible = "nvidia,tegra264-emc";</div><div class='add'>+				reg = &lt;0x00 0x8800000 0x0 0x20000&gt;,</div><div class='add'>+				      &lt;0x00 0x8890000 0x0 0x20000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;bpmp TEGRA264_CLK_EMC&gt;;</div><div class='add'>+				clock-names = "emc";</div><div class='add'>+</div><div class='add'>+				#interconnect-cells = &lt;0&gt;;</div><div class='add'>+				nvidia,bpmp = &lt;&amp;bpmp&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smmu0: iommu@a000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x00 0xa000000 0x0 0x200000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 21 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 22 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smmu4: iommu@b000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x00 0xb000000 0x0 0x200000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c14: i2c@c410000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c410000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C14&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c15: i2c@c420000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c420000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C15&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c16: i2c@c430000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c430000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C16&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@c630000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c630000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C0&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@c640000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c640000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C1&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@c650000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c650000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C4&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@c670000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c670000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C6&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@c680000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c680000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C7&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c8: i2c@c690000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c690000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C8&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c9: i2c@c6a0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c6a0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C9&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c10: i2c@c6b0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c6b0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C10&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c11: i2c@c6c0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c6c0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C11&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c12: i2c@c6d0000 {</div><div class='add'>+			compatible = "nvidia,tegra264-i2c";</div><div class='add'>+			reg = &lt;0x00 0x0c6d0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;,</div><div class='add'>+				 &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			clock-names = "div-clk", "parent";</div><div class='add'>+			assigned-clocks = &lt;&amp;bpmp TEGRA264_CLK_TOP_I2C&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;bpmp TEGRA264_CLK_PLLP_OUT0&gt;;</div><div class='add'>+			resets = &lt;&amp;bpmp TEGRA264_RESET_I2C12&gt;;</div><div class='add'>+			reset-names = "i2c";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@46000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x00 0x46000000 0x0 0x010000&gt;, /* GICD */</div><div class='add'>+			      &lt;0x00 0x46080000 0x0 0x400000&gt;; /* GICR */</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+			redistributor-stride = &lt;0x0 0x40000&gt;;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x0 0x0 0x00 0x46000000 0x0 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+			its: msi-controller@40000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x40000 0x0 0x40000&gt;;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+				msi-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* DISP_USB MMIO */</div><div class='add'>+	bus@8800000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00 0x00000000 0x88 0x00000000 0x01 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+		smmu3: iommu@6000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0x00 0x6000000 0x0 0x200000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 225 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 226 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq", "gerror";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* UPHY MMIO */</div><div class='add'>+	bus@a800000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ranges = &lt;0x00 0x00000000 0xa8 0x00000000 0x40 0x00000000&gt;, /* MMIO, ECAM, prefetchable memory, I/O */</div><div class='add'>+			 &lt;0x80 0x00000000 0x00 0x20000000 0x00 0x40000000&gt;; /* non-prefetchable memory (32-bit) */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x00000&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,armv8";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0x10000&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bpmp: bpmp {</div><div class='add'>+		compatible = "nvidia,tegra264-bpmp", "nvidia,tegra186-bpmp";</div><div class='add'>+		mboxes = &lt;&amp;hsp_top TEGRA_HSP_MBOX_TYPE_DB</div><div class='add'>+				   TEGRA_HSP_DB_MASTER_BPMP&gt;;</div><div class='add'>+		memory-region = &lt;&amp;shmem_bpmp&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+		#power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		i2c {</div><div class='add'>+			compatible = "nvidia,tegra186-bpmp-i2c";</div><div class='add'>+			nvidia,bpmp-bus-id = &lt;5&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		thermal {</div><div class='add'>+			compatible = "nvidia,tegra186-bpmp-thermal";</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		status = "okay";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile<br/>index ae002c7cf126..296688f7cb26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/Makefile</a></div><div class='hunk'>@@ -1,21 +1,26 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc.dtb</div><div class='ctx'> </div><div class='del'>-apq8016-sbc-usb-host-dtbs	:= apq8016-sbc.dtb apq8016-sbc-usb-host.dtbo</div><div class='add'>+apq8016-sbc-d3-camera-mezzanine-dtbs	:= apq8016-sbc.dtb apq8016-sbc-d3-camera-mezzanine.dtbo</div><div class='add'>+apq8016-sbc-usb-host-dtbs		:= apq8016-sbc.dtb apq8016-sbc-usb-host.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM) += sar2130p-qar2130p.dtb</div><div class='ctx'> </div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc-usb-host.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc-d3-camera-mezzanine.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc-usb-host.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-schneider-hmibsc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8039-t2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8094-sony-xperia-kitakami-karin_windy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= hamoa-iot-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-rdp432-c2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-tplink-archer-ax55-v1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp441.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp442.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp468.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp474.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= ipq5424-rdp466.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk10-c1.dtb</div><div class='hunk'>@@ -25,6 +30,12 @@ dtb-$(CONFIG_ARCH_QCOM)	+= ipq9574-rdp433.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq9574-rdp449.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq9574-rdp453.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= ipq9574-rdp454.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= lemans-evk.dtb</div><div class='add'>+</div><div class='add'>+lemans-evk-camera-csi1-imx577-dtbs	:= lemans-evk.dtb lemans-evk-camera-csi1-imx577.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= lemans-evk-camera-csi1-imx577.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= monaco-evk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8216-samsung-fortuna3g.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-acer-a1-724.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-alcatel-idol347.dtb</div><div class='hunk'>@@ -59,6 +70,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-wingtech-wt86518.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-wingtech-wt86528.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-wingtech-wt88047.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8916-yiming-uz801v3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= msm8917-xiaomi-riva.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8929-wingtech-wt82918hd.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-huawei-kiwi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-longcheer-l9100.dtb</div><div class='hunk'>@@ -66,6 +78,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-samsung-a7.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-sony-xperia-kanuti-tulip.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-wingtech-wt82918.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8939-wingtech-wt82918hd.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-flipkart-rimob.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-motorola-potter.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-daisy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-mido.dtb</div><div class='hunk'>@@ -73,6 +86,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-tissot.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8953-xiaomi-vince.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8956-sony-xperia-loire-kugo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8956-sony-xperia-loire-suzu.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= msm8976-longcheer-l9360.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8992-lg-bullhead-rev-10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8992-lg-bullhead-rev-101.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8992-lg-h815.dtb</div><div class='hunk'>@@ -107,15 +121,29 @@ dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-sony-xperia-yoshino-poplar.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-xiaomi-sagit.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-fairphone-fp5.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-idp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-particle-tachyon.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcm6490-shift-otter.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs615-ride.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb</div><div class='add'>+</div><div class='add'>+qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo</div><div class='add'>+qcs6490-rb3gen2-industrial-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2-industrial-mezzanine.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2-vision-mezzanine.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs8300-ride.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride-r3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qrb2210-rb1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5.dtb</div><div class='add'>+</div><div class='add'>+qrb5165-rb5-vision-mezzanine-dtbs	:= qrb5165-rb5.dtb qrb5165-rb5-vision-mezzanine.dtbo</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5-vision-mezzanine.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb</div><div class='hunk'>@@ -123,7 +151,8 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride-r3.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb</div><div class='add'>+sc7180-acer-aspire1-el2-dtbs	:= sc7180-acer-aspire1.dtb sc7180-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb sc7180-acer-aspire1-el2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1-lte.dtb</div><div class='hunk'>@@ -189,8 +218,16 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd-r3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc8180x-lenovo-flex-5g.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sc8180x-primus.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-crd.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-lenovo-thinkpad-x13s.dtb</div><div class='add'>+sc8280xp-crd-el2-dtbs	:= sc8280xp-crd.dtb sc8280xp-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-crd.dtb sc8280xp-crd-el2.dtb</div><div class='add'>+sc8280xp-huawei-gaokun3-el2-dtbs	:= sc8280xp-huawei-gaokun3.dtb sc8280xp-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-huawei-gaokun3.dtb sc8280xp-huawei-gaokun3-el2.dtb</div><div class='add'>+sc8280xp-lenovo-thinkpad-x13s-el2-dtbs	:= sc8280xp-lenovo-thinkpad-x13s.dtb sc8280xp-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-lenovo-thinkpad-x13s.dtb sc8280xp-lenovo-thinkpad-x13s-el2.dtb</div><div class='add'>+sc8280xp-microsoft-arcata-el2-dtbs	:= sc8280xp-microsoft-arcata.dtb sc8280xp-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-microsoft-arcata.dtb sc8280xp-microsoft-arcata-el2.dtb</div><div class='add'>+sc8280xp-microsoft-blackrock-el2-dtbs	:= sc8280xp-microsoft-blackrock.dtb sc8280xp-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sc8280xp-microsoft-blackrock.dtb sc8280xp-microsoft-blackrock-el2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sda660-inforce-ifc6560.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm450-lenovo-tbx605f.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm450-motorola-ali.dtb</div><div class='hunk'>@@ -203,10 +240,10 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm632-motorola-ocean.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm636-sony-xperia-ganges-mermaid.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm660-xiaomi-lavender.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm670-google-sargo.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r1.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r2.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-db845c.dtb</div><div class='add'>+</div><div class='add'>+sdm845-db845c-navigation-mezzanine-dtbs	:= sdm845-db845c.dtb sdm845-db845c-navigation-mezzanine.dtbo</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-db845c-navigation-mezzanine.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-lg-judyln.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-lg-judyp.dtb</div><div class='hunk'>@@ -229,12 +266,14 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-ginkgo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-xiaomi-laurel-sprout.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6350-sony-xperia-lena-pdx213.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm6375-sony-xperia-murray-pdx225.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm7125-xiaomi-curtana.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm7125-xiaomi-joyeuse.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm7225-fairphone-fp4.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm7325-nothing-spacewar.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-microsoft-surface-duo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb</div><div class='hunk'>@@ -242,6 +281,8 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-bahamut.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-griffin.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-samsung-r8q.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-samsung-x1q.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-sony-xperia-edo-pdx203.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-sony-xperia-edo-pdx206.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-xiaomi-elish-boe.dtb</div><div class='hunk'>@@ -254,6 +295,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8350-sony-xperia-sagami-pdx214.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8350-sony-xperia-sagami-pdx215.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-hdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-qrd.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-samsung-r0q.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-sony-xperia-nagara-pdx223.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8450-sony-xperia-nagara-pdx224.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8550-hdk.dtb</div><div class='hunk'>@@ -268,10 +310,43 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-hdk-display-card.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-hdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-mtp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_QCOM)	+= sm8650-qrd.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e78100-lenovo-thinkpad-t14s.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-asus-vivobook-s15.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-crd.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-lenovo-yoga-slim7x.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-microsoft-romulus13.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-microsoft-romulus15.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-qcp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8750-mtp.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= sm8750-qrd.dtb</div><div class='add'>+x1e001de-devkit-el2-dtbs	:= x1e001de-devkit.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e001de-devkit.dtb x1e001de-devkit-el2.dtb</div><div class='add'>+x1e78100-lenovo-thinkpad-t14s-el2-dtbs	:= x1e78100-lenovo-thinkpad-t14s.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e78100-lenovo-thinkpad-t14s.dtb x1e78100-lenovo-thinkpad-t14s-el2.dtb</div><div class='add'>+x1e78100-lenovo-thinkpad-t14s-oled-el2-dtbs	:= x1e78100-lenovo-thinkpad-t14s-oled.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e78100-lenovo-thinkpad-t14s-oled.dtb x1e78100-lenovo-thinkpad-t14s-oled-el2.dtb</div><div class='add'>+x1e80100-asus-vivobook-s15-el2-dtbs	:= x1e80100-asus-vivobook-s15.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-asus-vivobook-s15.dtb x1e80100-asus-vivobook-s15-el2.dtb</div><div class='add'>+x1e80100-asus-zenbook-a14-el2-dtbs	:= x1e80100-asus-zenbook-a14.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-asus-zenbook-a14.dtb x1e80100-asus-zenbook-a14-el2.dtb</div><div class='add'>+x1e80100-crd-el2-dtbs	:= x1e80100-crd.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-crd.dtb x1e80100-crd-el2.dtb</div><div class='add'>+x1e80100-dell-inspiron-14-plus-7441-el2-dtbs	:= x1e80100-dell-inspiron-14-plus-7441.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-dell-inspiron-14-plus-7441.dtb x1e80100-dell-inspiron-14-plus-7441-el2.dtb</div><div class='add'>+x1e80100-dell-latitude-7455-el2-dtbs	:= x1e80100-dell-latitude-7455.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-dell-latitude-7455.dtb x1e80100-dell-latitude-7455-el2.dtb</div><div class='add'>+x1e80100-dell-xps13-9345-el2-dtbs	:= x1e80100-dell-xps13-9345.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-dell-xps13-9345.dtb x1e80100-dell-xps13-9345-el2.dtb</div><div class='add'>+x1e80100-hp-elitebook-ultra-g1q-el2-dtbs := x1e80100-hp-elitebook-ultra-g1q.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-hp-elitebook-ultra-g1q.dtb x1e80100-hp-elitebook-ultra-g1q-el2.dtb</div><div class='add'>+x1e80100-hp-omnibook-x14-el2-dtbs	:= x1e80100-hp-omnibook-x14.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-hp-omnibook-x14.dtb x1e80100-hp-omnibook-x14-el2.dtb</div><div class='add'>+x1e80100-lenovo-yoga-slim7x-el2-dtbs	:= x1e80100-lenovo-yoga-slim7x.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-lenovo-yoga-slim7x.dtb x1e80100-lenovo-yoga-slim7x-el2.dtb</div><div class='add'>+x1e80100-microsoft-romulus13-el2-dtbs	:= x1e80100-microsoft-romulus13.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-microsoft-romulus13.dtb x1e80100-microsoft-romulus13-el2.dtb</div><div class='add'>+x1e80100-microsoft-romulus15-el2-dtbs	:= x1e80100-microsoft-romulus15.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-microsoft-romulus15.dtb x1e80100-microsoft-romulus15-el2.dtb</div><div class='add'>+x1e80100-qcp-el2-dtbs	:= x1e80100-qcp.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1e80100-qcp.dtb x1e80100-qcp-el2.dtb</div><div class='add'>+x1p42100-asus-zenbook-a14-el2-dtbs	:= x1p42100-asus-zenbook-a14.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1p42100-asus-zenbook-a14.dtb x1p42100-asus-zenbook-a14-el2.dtb</div><div class='add'>+x1p42100-crd-el2-dtbs	:= x1p42100-crd.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1p42100-crd.dtb x1p42100-crd-el2.dtb</div><div class='add'>+x1p42100-hp-omnibook-x14-el2-dtbs := x1p42100-hp-omnibook-x14.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1p42100-hp-omnibook-x14.dtb x1p42100-hp-omnibook-x14-el2.dtb</div><div class='add'>+x1p42100-lenovo-thinkbook-16-el2-dtbs	:= x1p42100-lenovo-thinkbook-16.dtb x1-el2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_QCOM)	+= x1p42100-lenovo-thinkbook-16.dtb x1p42100-lenovo-thinkbook-16-el2.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dtso<br/>index f9cbf8c1d689..d739ece6b44f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dtso</a></div><div class='hunk'>@@ -5,10 +5,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='add'>+/plugin/;</div><div class='ctx'> </div><div class='del'>-#include "apq8016-sbc.dts"</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-/ {</div><div class='add'>+&amp;{/} {</div><div class='ctx'> 	camera_vdddo_1v8: regulator-camera-vdddo {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "camera_vdddo";</div><div class='hunk'>@@ -38,6 +40,9 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 		port@0 {</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			csiphy0_ep: endpoint {</div><div class='hunk'>@@ -53,6 +58,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cci_i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 	camera@3b {</div><div class='ctx'> 		compatible = "ovti,ov5640";</div><div class='ctx'> 		reg = &lt;0x3b&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts<br/>index aba08424aa38..ba6ccf0db16a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-sbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/apq8016-sbc.dts</a></div><div class='hunk'>@@ -157,8 +157,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	adv_bridge: bridge@39 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='ctx'> 		compatible = "adi,adv7533";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -181,7 +179,7 @@</div><div class='ctx'> 		pinctrl-names = "default","sleep";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;adv7533_int_active &amp;adv7533_switch_active&gt;;</div><div class='ctx'> 		pinctrl-1 = &lt;&amp;adv7533_int_suspend &amp;adv7533_switch_suspend&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -222,11 +220,17 @@</div><div class='ctx'> &amp;blsp_uart1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	label = "LS-UART0";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart1_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	label = "LS-UART1";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;camss {</div><div class='hunk'>@@ -340,7 +344,7 @@</div><div class='ctx'> 			sound-dai = &lt;&amp;lpass MI2S_QUATERNARY&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		codec {</div><div class='del'>-			sound-dai = &lt;&amp;adv_bridge 0&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;adv_bridge&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -591,6 +595,21 @@</div><div class='ctx'> 		"USR_LED_2_CTRL", /* GPIO 120 */</div><div class='ctx'> 		"SB_HS_ID";</div><div class='ctx'> </div><div class='add'>+	blsp_uart1_default: blsp-uart1-default-state {</div><div class='add'>+		/* TX, RX, CTS_N, RTS_N */</div><div class='add'>+		pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+		function = "blsp_uart1";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp_uart1_sleep: blsp-uart1-sleep-state {</div><div class='add'>+		pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdc2_cd_default: sdc2-cd-default-state {</div><div class='ctx'> 		pins = "gpio38";</div><div class='ctx'> 		function = "gpio";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts b/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts<br/>index 75c6137e5a11..ce75046ffdac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/apq8016-schneider-hmibsc.dts</a></div><div class='hunk'>@@ -190,11 +190,17 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart1_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	label = "UART0";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	label = "UART1";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -367,6 +373,37 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	blsp_uart1_default: blsp-uart1-default-state {</div><div class='add'>+		/* TX, RX, CTS_N, RTS_N */</div><div class='add'>+		pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+		function = "blsp_uart1";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp_uart1_sleep: blsp-uart1-sleep-state {</div><div class='add'>+		pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp_uart2_default: blsp-uart2-default-state {</div><div class='add'>+		/* TX, RX */</div><div class='add'>+		pins = "gpio4", "gpio5";</div><div class='add'>+		function = "blsp_uart2";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp_uart2_sleep: blsp-uart2-sleep-state {</div><div class='add'>+		pins = "gpio4", "gpio5";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	msm_key_volp_n_default: msm-key-volp-n-default-state {</div><div class='ctx'> 		pins = "gpio107";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -463,10 +500,6 @@</div><div class='ctx'> 	drive-strength = &lt;16&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;blsp_uart1_default {</div><div class='del'>-	bootph-all;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Enable CoreSight */</div><div class='ctx'> &amp;cti0 { status = "okay"; };</div><div class='ctx'> &amp;cti1 { status = "okay"; };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8039-t2.dts b/arch/arm64/boot/dts/qcom/apq8039-t2.dts<br/>index 4f82bb668616..38c281f0fe65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8039-t2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8039-t2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8039-t2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/apq8039-t2.dts</a></div><div class='hunk'>@@ -116,18 +116,16 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart1_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;blsp_uart1_default {</div><div class='del'>-	pins = "gpio0", "gpio1";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;blsp_uart1_sleep {</div><div class='del'>-	pins = "gpio0", "gpio1";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -323,6 +321,20 @@</div><div class='ctx'> 		"USBC_GPIO7_1V8",	/* GPIO_120 */</div><div class='ctx'> 		"NC";</div><div class='ctx'> </div><div class='add'>+	blsp_uart1_default: blsp-uart1-default-state {</div><div class='add'>+		pins = "gpio0", "gpio1";</div><div class='add'>+		function = "blsp_uart1";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blsp_uart1_sleep: blsp-uart1-sleep-state {</div><div class='add'>+		pins = "gpio0", "gpio1";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pinctrl_backlight: backlight-state {</div><div class='ctx'> 		pins = "gpio98";</div><div class='ctx'> 		function = "gpio";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts<br/>index e8148b3d6c50..5b2e88915c2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8096-db820c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/apq8096-db820c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/apq8096-db820c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/apq8096-db820c.dts</a></div><div class='hunk'>@@ -953,15 +953,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1012,10 +1012,7 @@</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "qcom,apq8096-sndcard";</div><div class='ctx'> 	model = "DB820c";</div><div class='del'>-	audio-routing = "RX_BIAS", "MCLK",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL2",  "MultiMedia2 Playback",</div><div class='del'>-		"MultiMedia3 Capture", "MM_UL3";</div><div class='add'>+	audio-routing = "RX_BIAS", "MCLK";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts<br/>new file mode 100644<br/>index 000000000000..df8d6e5c1f45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,1222 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "hamoa-iot-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. Hamoa IoT EVK";</div><div class='add'>+	compatible = "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000</div><div class='add'>+							 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 125 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		connector@2 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss2_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Left unused as the retimer is not used on this board. */</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p15: regulator-rtmr2-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 189 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p8: regulator-rtmr2-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 126 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_3p3: regulator-rtmr2-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 187 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: These two regulators are actually part of the removable M.2</div><div class='add'>+	 * card and not the EVK mainboard. Need to describe this differently.</div><div class='add'>+	 * Functionally it works correctly, because all we need to do is to</div><div class='add'>+	 * turn on the actual 3.3V supply above.</div><div class='add'>+	 */</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "SDX_VPH_PWR";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 221 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-EVK";</div><div class='add'>+		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"TweeterLeft IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"WooferRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"TweeterRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_woofer&gt;,</div><div class='add'>+					    &lt;&amp;left_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr0 0&gt;,</div><div class='add'>+					    &lt;&amp;lpass_wsamacro 0&gt;,</div><div class='add'>+					    &lt;&amp;right_woofer&gt;,</div><div class='add'>+					    &lt;&amp;right_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr3 0&gt;,</div><div class='add'>+					    &lt;&amp;lpass_wsa2macro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss0-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 168 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 167 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK5&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr2_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 185 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb5_repeater: redriver@43 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb5_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_23_sd_n_active: spkr-23-sd-n-active-state {</div><div class='add'>+		pins = "gpio13";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Woofer */</div><div class='add'>+	left_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Tweeter */</div><div class='add'>+	left_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;, &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Woofer */</div><div class='add'>+	right_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Tweeter */</div><div class='add'>+	right_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb5_reset_n: eusb5-reset-n-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_default: rtmr2-reset-n-active-state {</div><div class='add'>+		pins = "gpio185";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio189";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio126";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio187";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss0_sbu_default: usb-1-ss0-sbu-state {</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio166";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio168";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio167";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_bt_en: wcn-bt-en-state {</div><div class='add'>+		pins = "gpio116";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio221";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;4&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Switches USB signal routing between the USB connector and the Wi-Fi card. */</div><div class='add'>+	wcn_usb_sw_n: wcn-usb-sw-n-state {</div><div class='add'>+		pins = "gpio225";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss2_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_hsphy {</div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss2_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	phys = &lt;&amp;eusb5_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wcn_usb_sw_n&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi<br/>new file mode 100644<br/>index 000000000000..1aead50b8920<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,619 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	/* PMC8380C_B */</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p9: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380VE_C */</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380_D */</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380_E */</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380_F */</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_1p0: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380VE_I */</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PMC8380VE_J */</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/gen70500_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/adsp.mbn",</div><div class='add'>+			"qcom/x1e80100/adsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/cdsp.mbn",</div><div class='add'>+			"qcom/x1e80100/cdsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;34 2&gt;, /* TPM LP &amp; INT */</div><div class='add'>+			       &lt;44 4&gt;; /* SPI (TPM) */</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts<br/>index 8460b538eb6a..df3cbb7c79c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "ipq5018.dtsi"</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2";</div><div class='ctx'> 	compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018";</div><div class='hunk'>@@ -28,6 +30,20 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc_1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdc_default_state&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -43,6 +59,30 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='add'>+	pcie0_default: pcie0-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio14";</div><div class='add'>+			function = "pcie0_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio15";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio16";</div><div class='add'>+			function = "pcie0_wake";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdc_default_state: sdc-default-state {</div><div class='ctx'> 		clk-pins {</div><div class='ctx'> 			pins = "gpio9";</div><div class='hunk'>@@ -80,5 +120,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;xo_board_clk {</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	clock-div = &lt;4&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts b/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts<br/>index 5bb021cb29cd..7a25af57749c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dts</a></div><div class='hunk'>@@ -124,5 +124,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;xo_board_clk {</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	clock-div = &lt;4&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi<br/>index 7e6e2c121979..f024b3cba33f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5018.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5018.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5018.dtsi</a></div><div class='hunk'>@@ -2,13 +2,15 @@</div><div class='ctx'> /*</div><div class='ctx'>  * IPQ5018 SoC device tree source</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2023 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2023-2025 The Linux Foundation. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,apss-ipq.h&gt;</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-ipq5018.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,ipq5018-cmn-pll.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/qcom,gcc-ipq5018.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -16,14 +18,41 @@</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='add'>+		gephy_rx_clk: gephy-rx-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;125000000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gephy_tx_clk: gephy-tx-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;125000000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ref_96mhz_clk: ref-96mhz-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;xo_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-div = &lt;1&gt;;</div><div class='add'>+			clock-mult = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		xo_board_clk: xo-board-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;ref_96mhz_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_clk: xo-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -31,27 +60,29 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-size = &lt;0x80000&gt;;</div><div class='hunk'>@@ -79,6 +110,7 @@</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		scm {</div><div class='ctx'> 			compatible = "qcom,scm-ipq5018", "qcom,scm";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x6100&gt;;</div><div class='ctx'> 			qcom,sdi-enabled;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -147,6 +179,235 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie1_phy: phy@7e000 {</div><div class='add'>+			compatible = "qcom,ipq5018-uniphy-pcie-phy";</div><div class='add'>+			reg = &lt;0x0007e000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE1_PIPE_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1PHY_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@86000 {</div><div class='add'>+			compatible = "qcom,ipq5018-uniphy-pcie-phy";</div><div class='add'>+			reg = &lt;0x00086000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE0_PIPE_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0PHY_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio0: mdio@88000 {</div><div class='add'>+			compatible = "qcom,ipq5018-mdio";</div><div class='add'>+			reg = &lt;0x00088000 0x64&gt;,</div><div class='add'>+			      &lt;0x019475c4 0x4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDIO0_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "gcc_mdio_ahb_clk";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ge_phy: ethernet-phy@7 {</div><div class='add'>+				compatible = "ethernet-phy-id004d.d0c0";</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+				resets = &lt;&amp;gcc GCC_GEPHY_MISC_ARES&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio1: mdio@90000 {</div><div class='add'>+			compatible = "qcom,ipq5018-mdio";</div><div class='add'>+			reg = &lt;0x00090000 0x64&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDIO1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "gcc_mdio_ahb_clk";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmn_pll: clock-controller@9b000 {</div><div class='add'>+			compatible = "qcom,ipq5018-cmn-pll";</div><div class='add'>+			reg = &lt;0x0009b000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;ref_96mhz_clk&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_BLK_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_BLK_SYS_CLK&gt;;</div><div class='add'>+			clock-names = "ref",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "sys";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cmn_pll IPQ5018_CMN_PLL_CLK&gt;;</div><div class='add'>+			assigned-clock-rates-u64 = /bits/ 64 &lt;9600000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: qfprom@a0000 {</div><div class='add'>+			compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x000a0000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			tsens_mode: mode@249 {</div><div class='add'>+				reg = &lt;0x249 0x1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base1: base1@249 {</div><div class='add'>+				reg = &lt;0x249 0x2&gt;;</div><div class='add'>+				bits = &lt;3 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base2: base2@24a {</div><div class='add'>+				reg = &lt;0x24a 0x2&gt;;</div><div class='add'>+				bits = &lt;3 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s0_p1: s0-p1@24b {</div><div class='add'>+				reg = &lt;0x24b 0x2&gt;;</div><div class='add'>+				bits = &lt;2 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s0_p2: s0-p2@24c {</div><div class='add'>+				reg = &lt;0x24c 0x1&gt;;</div><div class='add'>+				bits = &lt;1 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s1_p1: s1-p1@24c {</div><div class='add'>+				reg = &lt;0x24c 0x2&gt;;</div><div class='add'>+				bits = &lt;7 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s1_p2: s1-p2@24d {</div><div class='add'>+				reg = &lt;0x24d 0x2&gt;;</div><div class='add'>+				bits = &lt;5 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s2_p1: s2-p1@24e {</div><div class='add'>+				reg = &lt;0x24e 0x2&gt;;</div><div class='add'>+				bits = &lt;3 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s2_p2: s2-p2@24f {</div><div class='add'>+				reg = &lt;0x24f 0x1&gt;;</div><div class='add'>+				bits = &lt;1 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s3_p1: s3-p1@24f {</div><div class='add'>+				reg = &lt;0x24f 0x2&gt;;</div><div class='add'>+				bits = &lt;7 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s3_p2: s3-p2@250 {</div><div class='add'>+				reg = &lt;0x250 0x2&gt;;</div><div class='add'>+				bits = &lt;5 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s4_p1: s4-p1@251 {</div><div class='add'>+				reg = &lt;0x251 0x2&gt;;</div><div class='add'>+				bits = &lt;3 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s4_p2: s4-p2@254 {</div><div class='add'>+				reg = &lt;0x254 0x1&gt;;</div><div class='add'>+				bits = &lt;0 6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		prng: rng@e3000 {</div><div class='add'>+			compatible = "qcom,prng-ee";</div><div class='add'>+			reg = &lt;0x000e3000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsens: thermal-sensor@4a9000 {</div><div class='add'>+			compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1";</div><div class='add'>+			reg = &lt;0x004a9000 0x1000&gt;,</div><div class='add'>+			      &lt;0x004a8000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-cells = &lt;&amp;tsens_mode&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s0_p1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s0_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s1_p1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s1_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s2_p1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s2_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s3_p1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s3_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s4_p1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s4_p2&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-cell-names = "mode",</div><div class='add'>+					   "base1",</div><div class='add'>+					   "base2",</div><div class='add'>+					   "s0_p1",</div><div class='add'>+					   "s0_p2",</div><div class='add'>+					   "s1_p1",</div><div class='add'>+					   "s1_p2",</div><div class='add'>+					   "s2_p1",</div><div class='add'>+					   "s2_p2",</div><div class='add'>+					   "s3_p1",</div><div class='add'>+					   "s3_p2",</div><div class='add'>+					   "s4_p1",</div><div class='add'>+					   "s4_p2";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 184 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "uplow";</div><div class='add'>+			#qcom,sensors = &lt;5&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cryptobam: dma-controller@704000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x00704000 0x20000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CRYPTO_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;1&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@73a000 {</div><div class='add'>+			compatible = "qcom,crypto-v5.1";</div><div class='add'>+			reg = &lt;0x0073a000 0x6000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CRYPTO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CRYPTO_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CRYPTO_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "core";</div><div class='add'>+</div><div class='add'>+			dmas = &lt;&amp;cryptobam 2&gt;,</div><div class='add'>+			       &lt;&amp;cryptobam 3&gt;;</div><div class='add'>+			dma-names = "rx",</div><div class='add'>+				    "tx";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tlmm: pinctrl@1000000 {</div><div class='ctx'> 			compatible = "qcom,ipq5018-tlmm";</div><div class='ctx'> 			reg = &lt;0x01000000 0x300000&gt;;</div><div class='hunk'>@@ -170,11 +431,11 @@</div><div class='ctx'> 			reg = &lt;0x01800000 0x80000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;xo_board_clk&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;gephy_rx_clk&gt;,</div><div class='add'>+				 &lt;&amp;gephy_tx_clk&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -187,6 +448,11 @@</div><div class='ctx'> 			#hwlock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tcsr: syscon@1937000 {</div><div class='add'>+			compatible = "qcom,tcsr-ipq5018", "syscon";</div><div class='add'>+			reg = &lt;0x01937000 0x21000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sdhc_1: mmc@7804000 {</div><div class='ctx'> 			compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";</div><div class='ctx'> 			reg = &lt;0x7804000 0x1000&gt;;</div><div class='hunk'>@@ -224,6 +490,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		blsp1_uart2: serial@78b0000 {</div><div class='add'>+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+			reg = &lt;0x078b0000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_UART2_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		blsp1_spi1: spi@78b5000 {</div><div class='ctx'> 			compatible = "qcom,spi-qup-v2.2.1";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -238,6 +514,59 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		blsp1_i2c3: i2c@78b7000 {</div><div class='add'>+			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x078b7000 0x600&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP3_I2C_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			dmas = &lt;&amp;blsp_dma 9&gt;, &lt;&amp;blsp_dma 8&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qpic_bam: dma-controller@7984000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x07984000 0x1c000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qpic_nand: spi@79b0000 {</div><div class='add'>+			compatible = "qcom,ipq5018-snand", "qcom,ipq9574-snand";</div><div class='add'>+			reg = &lt;0x079b0000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QPIC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QPIC_IO_MACRO_CLK&gt;;</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "aon",</div><div class='add'>+				      "iom";</div><div class='add'>+</div><div class='add'>+			dmas = &lt;&amp;qpic_bam 0&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 1&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 2&gt;;</div><div class='add'>+			dma-names = "tx",</div><div class='add'>+				    "rx",</div><div class='add'>+				    "cmd";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb: usb@8af8800 {</div><div class='ctx'> 			compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";</div><div class='ctx'> 			reg = &lt;0x08af8800 0x400&gt;;</div><div class='hunk'>@@ -387,6 +716,272 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@80000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5018";</div><div class='add'>+			reg = &lt;0x80000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0x80000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x80001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00078000 0x3000&gt;,</div><div class='add'>+			      &lt;0x80100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x0007b000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/* The controller supports Gen3, but the connected PHY is Gen2-capable */</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0 0x00000000 0x80200000 0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0 0x80300000 0x80300000 0 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;v2m0 0x0 0xff8&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SYS_NOC_PCIE1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_BRIDGE_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "axi_bridge";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_SLEEP_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_MASTER_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_SLAVE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_MASTER_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_SLAVE_STICKY_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_s_sticky";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@a0000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5018";</div><div class='add'>+			reg = &lt;0xa0000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0xa0000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0xa0001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00080000 0x3000&gt;,</div><div class='add'>+			      &lt;0xa0100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00083000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			/* The controller supports Gen3, but the connected PHY is Gen2-capable */</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0 0x00000000 0xa0200000 0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0 0xa0300000 0xa0300000 0 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;v2m0 0x0 0xff8&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SYS_NOC_PCIE0_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_BRIDGE_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "axi_bridge";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_SLEEP_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_MASTER_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_SLAVE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_s_sticky";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		cpu-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu_alert: cpu-passive {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu_alert&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gephy-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gephy-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		top-glue-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				top-glue-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ubi32-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				ubi32-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts<br/>index 846413817e9a..79ec77cfe552 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts</a></div><div class='hunk'>@@ -32,6 +32,34 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 38 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 39 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 47 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	i2c_1_pins: i2c-1-state {</div><div class='ctx'> 		pins = "gpio29", "gpio30";</div><div class='hunk'>@@ -40,6 +68,54 @@</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pcie0_default: pcie0-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio37";</div><div class='add'>+			function = "pcie0_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio38";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio39";</div><div class='add'>+			function = "pcie0_wake";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_default: pcie1-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio46";</div><div class='add'>+			function = "pcie1_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio47";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "pcie1_wake";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdc_default_state: sdc-default-state {</div><div class='ctx'> 		clk-pins {</div><div class='ctx'> 			pins = "gpio13";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi<br/>index 71328b223531..45fc512a3bab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5332.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq5332.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5332.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5332.dtsi</a></div><div class='hunk'>@@ -31,47 +31,47 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -177,15 +177,121 @@</div><div class='ctx'> 				reg = &lt;0x1d 0x2&gt;;</div><div class='ctx'> 				bits = &lt;7 2&gt;;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			tsens_sens11_off: s11@3a5 {</div><div class='add'>+				reg = &lt;0x3a5 0x1&gt;;</div><div class='add'>+				bits = &lt;4 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens12_off: s12@3a6 {</div><div class='add'>+				reg = &lt;0x3a6 0x1&gt;;</div><div class='add'>+				bits = &lt;0 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens13_off: s13@3a6 {</div><div class='add'>+				reg = &lt;0x3a6 0x1&gt;;</div><div class='add'>+				bits = &lt;4 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens14_off: s14@3ad {</div><div class='add'>+				reg = &lt;0x3ad 0x2&gt;;</div><div class='add'>+				bits = &lt;7 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens15_off: s15@3ae {</div><div class='add'>+				reg = &lt;0x3ae 0x1&gt;;</div><div class='add'>+				bits = &lt;3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_mode: mode@3e1 {</div><div class='add'>+				reg = &lt;0x3e1 0x1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base0: base0@3e1 {</div><div class='add'>+				reg = &lt;0x3e1 0x2&gt;;</div><div class='add'>+				bits = &lt;3 10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base1: base1@3e2 {</div><div class='add'>+				reg = &lt;0x3e2 0x2&gt;;</div><div class='add'>+				bits = &lt;5 10&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rng: rng@e3000 {</div><div class='del'>-			compatible = "qcom,prng-ee";</div><div class='add'>+			compatible = "qcom,ipq5332-trng", "qcom,trng";</div><div class='ctx'> 			reg = &lt;0x000e3000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tsens: thermal-sensor@4a9000 {</div><div class='add'>+			compatible = "qcom,ipq5332-tsens";</div><div class='add'>+			reg = &lt;0x004a9000 0x1000&gt;,</div><div class='add'>+			      &lt;0x004a8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "combined";</div><div class='add'>+			nvmem-cells = &lt;&amp;tsens_mode&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base0&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens11_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens12_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens13_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens14_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens15_off&gt;;</div><div class='add'>+			nvmem-cell-names = "mode",</div><div class='add'>+					   "base0",</div><div class='add'>+					   "base1",</div><div class='add'>+					   "tsens_sens11_off",</div><div class='add'>+					   "tsens_sens12_off",</div><div class='add'>+					   "tsens_sens13_off",</div><div class='add'>+					   "tsens_sens14_off",</div><div class='add'>+					   "tsens_sens15_off";</div><div class='add'>+			#qcom,sensors = &lt;5&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@4b0000 {</div><div class='add'>+			compatible = "qcom,ipq5332-uniphy-pcie-phy";</div><div class='add'>+			reg = &lt;0x004b0000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3X1_0_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_PHY_AHB_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3X1_0_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_PHY_AHB_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_PHY_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_phy: phy@4b1000 {</div><div class='add'>+			compatible = "qcom,ipq5332-uniphy-pcie-phy";</div><div class='add'>+			reg = &lt;0x004b1000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3X2_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_PHY_AHB_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3X2_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_PHY_AHB_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2PHY_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tlmm: pinctrl@1000000 {</div><div class='ctx'> 			compatible = "qcom,ipq5332-tlmm";</div><div class='ctx'> 			reg = &lt;0x01000000 0x300000&gt;;</div><div class='hunk'>@@ -212,8 +318,8 @@</div><div class='ctx'> 			#interconnect-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;xo_board&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -479,6 +585,283 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@18000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5332", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x18000000 0xf1c&gt;,</div><div class='add'>+			      &lt;0x18000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x18001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00088000 0x3000&gt;,</div><div class='add'>+			      &lt;0x18100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x0008b000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x18200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x18300000 0x18300000 0x0 0x07d00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;v2m0 0x0 0xffd&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3X2_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_RCHG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE3X2_AUX_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			assigned-clock-rates = &lt;2000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3X2_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_S_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AXI_M_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AUX_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X2_AHB_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_SNOC_PCIE3_2_M &amp;gcc SLAVE_SNOC_PCIE3_2_M&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_ANOC_PCIE3_2_S &amp;gcc SLAVE_ANOC_PCIE3_2_S&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@20000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5332", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x20000000 0xf1c&gt;,</div><div class='add'>+			      &lt;0x20000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x20001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00080000 0x3000&gt;,</div><div class='add'>+			      &lt;0x20100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00083000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x20200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x20300000 0x20300000 0x0 0x0fd00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;v2m0 0x0 0xffd&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3X1_0_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_RCHG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE3X1_0_AUX_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			assigned-clock-rates = &lt;2000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3X1_0_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_S_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AXI_M_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AUX_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3X1_0_AHB_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_SNOC_PCIE3_1_M &amp;gcc SLAVE_SNOC_PCIE3_1_M&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_ANOC_PCIE3_1_S &amp;gcc SLAVE_ANOC_PCIE3_1_S&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		rfa-0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 11&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				rfa-0-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rfa-1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 12&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				rfa-1-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		misc-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 13&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				misc-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-top-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 14&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-top-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-passive {</div><div class='add'>+					temperature = &lt;105000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		top-glue-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 15&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				top-glue-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts<br/>new file mode 100644<br/>index 000000000000..738618551203<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts</a></div><div class='hunk'>@@ -0,0 +1,296 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * IPQ5424 RDP466 board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024-2025 The Linux Foundation. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "ipq5424.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. IPQ5424 RDP466";</div><div class='add'>+	compatible = "qcom,ipq5424-rdp466", "qcom,ipq5424";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button-wps {</div><div class='add'>+			label = "wps";</div><div class='add'>+			linux,code = &lt;KEY_WPS_BUTTON&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;60&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_leds_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_WLAN;</div><div class='add'>+			gpios = &lt;&amp;tlmm 42 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "phy0tx";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-usb-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-name = "usb_hs_vdda_3p3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_1p8: regulator-usb-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-name = "vdda_1p8_usb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_0p925: regulator-usb-0p925 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;925000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-name = "vdd_core_usb";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 34 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qusb_phy_0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_misc_0p925&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_misc_1p8&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qusb_phy_1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_misc_0p925&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_misc_1p8&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sleep_clk {</div><div class='add'>+	clock-frequency = &lt;32000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "micron,n25q128a11", "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ssphy_0 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_misc_1p8&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_misc_0p925&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio_keys_default: gpio-keys-default-state {</div><div class='add'>+		pins = "gpio19";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_leds_default: gpio-leds-default-state {</div><div class='add'>+		pins = "gpio42";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0_default_state: spi0-default-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "gpio6";</div><div class='add'>+			function = "spi0_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cs-pins {</div><div class='add'>+			pins = "gpio7";</div><div class='add'>+			function = "spi0_cs";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		miso-pins {</div><div class='add'>+			pins = "gpio8";</div><div class='add'>+			function = "spi0_miso";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mosi-pins {</div><div class='add'>+			pins = "gpio9";</div><div class='add'>+			function = "spi0_mosi";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc_default_state: sdc-default-state {</div><div class='add'>+		clk-pins {</div><div class='add'>+			pins = "gpio5";</div><div class='add'>+			function = "sdc_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmd-pins {</div><div class='add'>+			pins = "gpio4";</div><div class='add'>+			function = "sdc_cmd";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+			function = "sdc_data";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-default-state {</div><div class='add'>+		pins = "gpio10", "gpio11", "gpio12", "gpio13";</div><div class='add'>+		function = "uart0";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2_default_state: pcie2-default-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3_default_state: pcie3-default-state {</div><div class='add'>+		pins = "gpio34";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	/*</div><div class='add'>+	 * The required initialization for this SE is not handled by the</div><div class='add'>+	 * bootloader. Therefore, keep the device in "reserved" state until</div><div class='add'>+	 * linux gains support for configuring the SE.</div><div class='add'>+	 */</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The bootstrap pins for the board select the XO clock frequency that</div><div class='add'>+ * supports 48 MHZ, 96 MHZ or 192 MHZ. This setting automatically</div><div class='add'>+ * enables the right dividers, to ensure the reference clock output</div><div class='add'>+ * from WiFi to the CMN PLL is 48 MHZ.</div><div class='add'>+ */</div><div class='add'>+&amp;ref_48mhz_clk {</div><div class='add'>+	clock-div = &lt;1&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The frequency of xo_board is fixed to 24 MHZ, which is routed</div><div class='add'>+ * from WiFi output clock 48 MHZ divided by 2.</div><div class='add'>+ */</div><div class='add'>+&amp;xo_board {</div><div class='add'>+	clock-div = &lt;2&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_clk {</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi<br/>new file mode 100644<br/>index 000000000000..ef2b52f3597d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq5424.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq5424.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1354 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * IPQ5424 device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,apss-ipq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,ipq5424-cmn-pll.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,ipq5424-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/qcom,ipq5424-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,ipq5424.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		ref_48mhz_clk: ref-48mhz-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;xo_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_board: xo-board-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;ref_48mhz_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_clk: xo-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus: cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			clocks = &lt;&amp;apss_clk APSS_SILVER_CORE_CLK&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;apss_clk MASTER_CPU &amp;apss_clk SLAVE_L3&gt;;</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+</div><div class='add'>+				l3_0: l3-cache {</div><div class='add'>+					compatible = "cache";</div><div class='add'>+					cache-level = &lt;3&gt;;</div><div class='add'>+					cache-unified;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			clocks = &lt;&amp;apss_clk APSS_SILVER_CORE_CLK&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;apss_clk MASTER_CPU &amp;apss_clk SLAVE_L3&gt;;</div><div class='add'>+</div><div class='add'>+			l2_100: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			clocks = &lt;&amp;apss_clk APSS_SILVER_CORE_CLK&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;apss_clk MASTER_CPU &amp;apss_clk SLAVE_L3&gt;;</div><div class='add'>+</div><div class='add'>+			l2_200: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			clocks = &lt;&amp;apss_clk APSS_SILVER_CORE_CLK&gt;;</div><div class='add'>+			clock-names = "cpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;apss_clk MASTER_CPU &amp;apss_clk SLAVE_L3&gt;;</div><div class='add'>+</div><div class='add'>+			l2_300: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm {</div><div class='add'>+			compatible = "qcom,scm-ipq5424", "qcom,scm";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x25100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_opp_table: opp-table-cpu {</div><div class='add'>+		compatible = "operating-points-v2-kryo-cpu";</div><div class='add'>+		opp-shared;</div><div class='add'>+		nvmem-cells = &lt;&amp;cpu_speed_bin&gt;;</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;816000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+			clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;984000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x1&gt;;</div><div class='add'>+			clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;1272000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the size */</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a55 {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-dsu {</div><div class='add'>+		compatible = "arm,dsu-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 50 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		cpus = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		bootloader@8a200000 {</div><div class='add'>+			reg = &lt;0x0 0x8a200000 0x0 0x400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tz@8a600000 {</div><div class='add'>+			reg = &lt;0x0 0x8a600000 0x0 0x200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem@8a800000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x8a800000 0x0 0x32000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tfa@8a832000 {</div><div class='add'>+			reg = &lt;0x0 0x8a832000 0x0 0x7d000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@84000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qmp-gen3x1-pcie-phy",</div><div class='add'>+				     "qcom,ipq9574-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x00084000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie0_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_phy: phy@8c000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qmp-gen3x1-pcie-phy",</div><div class='add'>+				     "qcom,ipq9574-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x0008c000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie1_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmn_pll: clock-controller@9b000 {</div><div class='add'>+			compatible = "qcom,ipq5424-cmn-pll";</div><div class='add'>+			reg = &lt;0 0x0009b000 0 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;ref_48mhz_clk&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_12GPLL_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_12GPLL_SYS_CLK&gt;;</div><div class='add'>+			clock-names = "ref", "ahb", "sys";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cmn_pll IPQ5424_CMN_PLL_CLK&gt;;</div><div class='add'>+			assigned-clock-rates-u64 = /bits/ 64 &lt;12000000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		efuse@a4000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0 0x000a4000 0 0x741&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			tsens_sens9_off: s9@3dc {</div><div class='add'>+				reg = &lt;0x3dc 0x1&gt;;</div><div class='add'>+				bits = &lt;4 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens10_off: s10@3dd {</div><div class='add'>+				reg = &lt;0x3dd 0x1&gt;;</div><div class='add'>+				bits = &lt;0 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens11_off: s11@3dd {</div><div class='add'>+				reg = &lt;0x3dd 0x1&gt;;</div><div class='add'>+				bits = &lt;4 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens12_off: s12@3de {</div><div class='add'>+				reg = &lt;0x3de 0x1&gt;;</div><div class='add'>+				bits = &lt;0 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens13_off: s13@3de {</div><div class='add'>+				reg = &lt;0x3de 0x1&gt;;</div><div class='add'>+				bits = &lt;4 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens14_off: s14@3e5 {</div><div class='add'>+				reg = &lt;0x3e5 0x2&gt;;</div><div class='add'>+				bits = &lt;7 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_sens15_off: s15@3e6 {</div><div class='add'>+				reg = &lt;0x3e6 0x1&gt;;</div><div class='add'>+				bits = &lt;3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_mode: mode@419 {</div><div class='add'>+				reg = &lt;0x419 0x1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base0: base0@419 {</div><div class='add'>+				reg = &lt;0x419 0x2&gt;;</div><div class='add'>+				bits = &lt;3 10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base1: base1@41a {</div><div class='add'>+				reg = &lt;0x41a 0x2&gt;;</div><div class='add'>+				bits = &lt;5 10&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_phy: phy@f4000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qmp-gen3x2-pcie-phy",</div><div class='add'>+				     "qcom,ipq9574-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x000f4000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE2_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie2_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_phy: phy@fc000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qmp-gen3x2-pcie-phy",</div><div class='add'>+				     "qcom,ipq9574-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x000fc000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie3_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsens: thermal-sensor@4a9000 {</div><div class='add'>+			compatible = "qcom,ipq5424-tsens";</div><div class='add'>+			reg = &lt;0 0x004a9000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x004a8000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 105 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "combined";</div><div class='add'>+			nvmem-cells = &lt;&amp;tsens_mode&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base0&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base1&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens9_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens10_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens11_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens12_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens13_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens14_off&gt;,</div><div class='add'>+				      &lt;&amp;tsens_sens15_off&gt;;</div><div class='add'>+			nvmem-cell-names = "mode",</div><div class='add'>+					   "base0",</div><div class='add'>+					   "base1",</div><div class='add'>+					   "tsens_sens9_off",</div><div class='add'>+					   "tsens_sens10_off",</div><div class='add'>+					   "tsens_sens11_off",</div><div class='add'>+					   "tsens_sens12_off",</div><div class='add'>+					   "tsens_sens13_off",</div><div class='add'>+					   "tsens_sens14_off",</div><div class='add'>+					   "tsens_sens15_off";</div><div class='add'>+			#qcom,sensors = &lt;7&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng: rng@4c3000 {</div><div class='add'>+			compatible = "qcom,ipq5424-trng", "qcom,trng";</div><div class='add'>+			reg = &lt;0 0x004c3000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-cache-controller@800000 {</div><div class='add'>+			compatible = "qcom,ipq5424-llcc";</div><div class='add'>+			reg = &lt;0 0x00800000 0 0x200000&gt;;</div><div class='add'>+			reg-names = "llcc0_base";</div><div class='add'>+			interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom@a6000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x0 0x000a6000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			cpu_speed_bin: cpu-speed-bin@234 {</div><div class='add'>+				reg = &lt;0x234 0x1&gt;;</div><div class='add'>+				bits = &lt;0 8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@1000000 {</div><div class='add'>+			compatible = "qcom,ipq5424-tlmm";</div><div class='add'>+			reg = &lt;0 0x01000000 0 0x300000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 50&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			uart1_pins: uart1-state {</div><div class='add'>+				pins = "gpio43", "gpio44";</div><div class='add'>+				function = "uart1";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@1800000 {</div><div class='add'>+			compatible = "qcom,ipq5424-gcc";</div><div class='add'>+			reg = &lt;0 0x01800000 0 0x40000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie2_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie3_phy&gt;,</div><div class='add'>+				 &lt;0&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1905000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0 0x01905000 0 0x20000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr: syscon@1937000 {</div><div class='add'>+			compatible = "qcom,tcsr-ipq5424", "syscon";</div><div class='add'>+			reg = &lt;0 0x01937000 0 0x2a000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3: geniqup@1ac0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0 0x01ac0000 0 0x2000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_AHB_MST_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_AHB_SLV_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb", "s-ahb";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			uart0: serial@1a80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0 0x01a80000 0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_UART0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				interrupts = &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: serial@1a84000 {</div><div class='add'>+				compatible = "qcom,geni-debug-uart";</div><div class='add'>+				reg = &lt;0 0x01a84000 0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_UART1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				interrupts = &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0: spi@1a90000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0 0x01a90000 0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_SPI0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				interrupts = &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@1a94000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0 0x01a94000 0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_SPI1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				interrupts = &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc: mmc@7804000 {</div><div class='add'>+			compatible = "qcom,ipq5424-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0 0x07804000 0 0x1000&gt;, &lt;0 0x07805000 0 0x1000&gt;;</div><div class='add'>+			reg-names = "hc", "cqhci";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+</div><div class='add'>+			supports-cqe;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@f200000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0 0xf200000 0 0x10000&gt;, /* GICD */</div><div class='add'>+			      &lt;0 0xf240000 0 0x80000&gt;; /* GICR * 4 regions */</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;0x3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			redistributor-stride = &lt;0x0 0x20000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			mbi-ranges = &lt;672 128&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@f410000 {</div><div class='add'>+			compatible = "qcom,apss-wdt-ipq5424", "qcom,kpss-wdt";</div><div class='add'>+			reg = &lt;0 0x0f410000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qusb_phy_1: phy@71000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qusb2-phy";</div><div class='add'>+			reg = &lt;0 0x00071000 0 0x180&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB1_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				&lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "cfg_ahb", "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2_1_PHY_BCR&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2: usb2@1e00000 {</div><div class='add'>+			compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0 0x01ef8800 0 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB1_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB1_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB1_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB1_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CNOC_USB_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "cfg_noc";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB1_MASTER_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB1_MOCK_UTMI_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;,</div><div class='add'>+					       &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "qusb2_phy",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB1_BCR&gt;;</div><div class='add'>+			qcom,select-utmi-as-pipe-clk;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			dwc_1: usb@1e00000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0 0x01e00000 0 0xe000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_USB1_MOCK_UTMI_CLK&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				interrupts = &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				phys = &lt;&amp;qusb_phy_1&gt;;</div><div class='add'>+				phy-names = "usb2-phy";</div><div class='add'>+				tx-fifo-resize;</div><div class='add'>+				snps,is-utmi-l1-suspend;</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qusb_phy_0: phy@7b000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qusb2-phy";</div><div class='add'>+			reg = &lt;0 0x0007b000 0 0x180&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB0_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				&lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "cfg_ahb", "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2_0_PHY_BCR&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ssphy_0: phy@7d000 {</div><div class='add'>+			compatible = "qcom,ipq5424-qmp-usb3-phy";</div><div class='add'>+			reg = &lt;0 0x0007d000 0 0xa00&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;xo_board&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB0_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB0_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3PHY_0_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "phy_phy";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "usb0_pipe_clk";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3: usb3@8a00000 {</div><div class='add'>+			compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0 0x08af8800 0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB0_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB0_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB0_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB0_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CNOC_USB_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "cfg_noc";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB0_MASTER_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB0_MOCK_UTMI_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;,</div><div class='add'>+					       &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "qusb2_phy",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB_BCR&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			dwc_0: usb@8a00000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0 0x08a00000 0 0xcd00&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_USB0_MOCK_UTMI_CLK&gt;;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+				interrupts = &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				phys = &lt;&amp;qusb_phy_0&gt;, &lt;&amp;ssphy_0&gt;;</div><div class='add'>+				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				tx-fifo-resize;</div><div class='add'>+				snps,is-utmi-l1-suspend;</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@f420000 {</div><div class='add'>+			compatible = "arm,armv7-timer-mem";</div><div class='add'>+			reg = &lt;0 0xf420000 0 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x10000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			frame@f421000 {</div><div class='add'>+				reg = &lt;0xf421000 0x1000&gt;,</div><div class='add'>+				      &lt;0xf422000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f423000 {</div><div class='add'>+				reg = &lt;0xf423000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f425000 {</div><div class='add'>+				reg = &lt;0xf425000 0x1000&gt;,</div><div class='add'>+				      &lt;0xf426000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f427000 {</div><div class='add'>+				reg = &lt;0xf427000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f429000 {</div><div class='add'>+				reg = &lt;0xf429000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f42b000 {</div><div class='add'>+				reg = &lt;0xf42b000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;5&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@f42d000 {</div><div class='add'>+				reg = &lt;0xf42d000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				frame-number = &lt;6&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apss_clk: clock-controller@fa80000 {</div><div class='add'>+			compatible = "qcom,ipq5424-apss-clk";</div><div class='add'>+			reg = &lt;0x0 0x0fa80000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+				 &lt;&amp;gcc GPLL0&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3: pcie@40000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x0 0x40000000 0x0 0xf1c&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x000f8000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40100000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x000fe000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;3&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x0fd00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;intc 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 480 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 482 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE3_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_CORE_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_M_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie3_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE3 &amp;gcc SLAVE_ANOC_PCIE3&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_CNOC_PCIE3 &amp;gcc SLAVE_CNOC_PCIE3&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2: pcie@50000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x0 0x50000000 0x0 0xf1c&gt;,</div><div class='add'>+			      &lt;0x0 0x50000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x50001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x000f0000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x50100000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x000f6000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x50200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x50300000 0x0 0x50300000 0x0 0x0fd00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;intc 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE2_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE2_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE2_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_CORE_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_M_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie2_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE2 &amp;gcc SLAVE_ANOC_PCIE2&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_CNOC_PCIE2 &amp;gcc SLAVE_CNOC_PCIE2&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@60000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x0 0x60000000 0x0 0xf1c&gt;,</div><div class='add'>+			      &lt;0x0 0x60000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x60001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x00088000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x60100000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0008e000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x0fd00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;intc 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE1_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE1_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_CORE_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_M_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE1	&amp;gcc SLAVE_ANOC_PCIE1&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_CNOC_PCIE1	&amp;gcc SLAVE_CNOC_PCIE1&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@70000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x0 0x70000000 0x0 0xf1c&gt;,</div><div class='add'>+			      &lt;0x0 0x70000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x70001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x00080000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x70100000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x00086000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x00100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x0fd00000&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;intc 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE0_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE0_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_CORE_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_M_STICKY_RESET&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE0 &amp;gcc SLAVE_ANOC_PCIE0&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_CNOC_PCIE0	&amp;gcc SLAVE_CNOC_PCIE0&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_zones: thermal-zones {</div><div class='add'>+		cpu0-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 14&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-passive {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 12&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-passive {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 11&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-passive {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 13&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;120000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu-passive {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcss-tile2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				wcss-tile2-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcss-tile3-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				wcss-tile3-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		top-glue-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 15&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				top-glue-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;9000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts<br/>index f5f4827c0e17..9c69d3027b43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "ipq6018.dtsi"</div><div class='add'>+#include "ipq6018-mp5496.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi<br/>new file mode 100644<br/>index 000000000000..d6b111a77f79<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that</div><div class='add'>+ * apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "ipq6018.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;mp5496_s2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;mp5496_s2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;mp5496_s2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;mp5496_s2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,rpm-mp5496-regulators";</div><div class='add'>+</div><div class='add'>+		mp5496_s2: s2 {</div><div class='add'>+			regulator-min-microvolt = &lt;725000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1062500&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mp5496_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc {</div><div class='add'>+	vqmmc-supply = &lt;&amp;mp5496_l2&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi<br/>index 8edd535a188f..40f1c262126e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq6018.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq6018.dtsi</a></div><div class='hunk'>@@ -34,59 +34,55 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-			cpu-supply = &lt;&amp;ipq6018_s2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-			cpu-supply = &lt;&amp;ipq6018_s2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-			cpu-supply = &lt;&amp;ipq6018_s2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-			cpu-supply = &lt;&amp;ipq6018_s2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -119,6 +115,13 @@</div><div class='ctx'> 			clock-latency-ns = &lt;200000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x4&gt;;</div><div class='add'>+			clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		opp-1320000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1320000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;862500&gt;;</div><div class='hunk'>@@ -133,6 +136,13 @@</div><div class='ctx'> 			clock-latency-ns = &lt;200000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		opp-1512000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;937500&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x2&gt;;</div><div class='add'>+			clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		opp-1608000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;987500&gt;;</div><div class='hunk'>@@ -170,16 +180,6 @@</div><div class='ctx'> 			rpm_requests: rpm-requests {</div><div class='ctx'> 				compatible = "qcom,rpm-ipq6018", "qcom,glink-smd-rpm";</div><div class='ctx'> 				qcom,glink-channels = "rpm_requests";</div><div class='del'>-</div><div class='del'>-				regulators {</div><div class='del'>-					compatible = "qcom,rpm-mp5496-regulators";</div><div class='del'>-</div><div class='del'>-					ipq6018_s2: s2 {</div><div class='del'>-						regulator-min-microvolt = &lt;725000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;1062500&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -210,8 +210,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		smem_region: memory@4aa00000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='ctx'> 			reg = &lt;0x0 0x4aa00000 0x0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='add'>+</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		q6_region: memory@4ab00000 {</div><div class='hunk'>@@ -220,12 +223,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	smem {</div><div class='del'>-		compatible = "qcom,smem";</div><div class='del'>-		memory-region = &lt;&amp;smem_region&gt;;</div><div class='del'>-		hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	soc: soc@0 {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -888,15 +885,31 @@</div><div class='ctx'> 			ranges = &lt;0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000&gt;,</div><div class='ctx'> 				 &lt;0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 75 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 78 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 79 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 83 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SYS_NOC_PCIE0_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE0_AXI_M_CLK&gt;,</div><div class='hunk'>@@ -1015,10 +1028,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi<br/>index 284a4553070f..256e12cf6d54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq8074.dtsi</a></div><div class='hunk'>@@ -32,39 +32,39 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -847,17 +847,33 @@</div><div class='ctx'> 			ranges = &lt;0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000&gt;,   /* I/O */</div><div class='ctx'> 				 &lt;0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000&gt;; /* MEM */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 142</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 142</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 143</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 143</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 144</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 144</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 145</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 145</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SYS_NOC_PCIE1_AXI_CLK&gt;,</div><div class='hunk'>@@ -919,17 +935,33 @@</div><div class='ctx'> 			ranges = &lt;0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000&gt;,   /* I/O */</div><div class='ctx'> 				 &lt;0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000&gt;; /* MEM */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 75</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 75</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 78</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 78</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 79</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 79</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 83</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 83</div><div class='ctx'> 					 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SYS_NOC_PCIE0_AXI_CLK&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi<br/>index 91e104b0f865..bdb396afb992 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * IPQ9574 RDP board common device tree source</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -111,6 +111,13 @@</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 			regulator-boot-on;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mp5496_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -139,6 +146,50 @@</div><div class='ctx'> 		drive-strength = &lt;8&gt;;</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	qpic_snand_default_state: qpic-snand-default-state {</div><div class='add'>+		clock-pins {</div><div class='add'>+			pins = "gpio5";</div><div class='add'>+			function = "qspi_clk";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cs-pins {</div><div class='add'>+			pins = "gpio4";</div><div class='add'>+			function = "qspi_cs";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+			function = "qspi_data";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qpic_bam {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qpic_nand {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qpic_snand_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "spi-nand";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		nand-ecc-engine = &lt;&amp;qpic_nand&gt;;</div><div class='add'>+		nand-ecc-strength = &lt;4&gt;;</div><div class='add'>+		nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_0_dwc3 {</div><div class='hunk'>@@ -146,7 +197,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_0_qmpphy {</div><div class='del'>-	vdda-pll-supply = &lt;&amp;mp5496_l2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;mp5496_l5&gt;;</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;regulator_fixed_0p925&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -154,7 +205,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;usb_0_qusbphy {</div><div class='ctx'> 	vdd-supply = &lt;&amp;regulator_fixed_0p925&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;mp5496_l2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;mp5496_l5&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;regulator_fixed_3p3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -164,6 +215,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The bootstrap pins for the board select the XO clock frequency</div><div class='add'>+ * (48 MHZ or 96 MHZ used for different RDP type board). This setting</div><div class='add'>+ * automatically enables the right dividers, to ensure the reference</div><div class='add'>+ * clock output from WiFi to the CMN PLL is 48 MHZ.</div><div class='add'>+ */</div><div class='add'>+&amp;ref_48mhz_clk {</div><div class='add'>+	clock-div = &lt;1&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed</div><div class='add'>+ * from WiFi output clock 48 MHZ divided by 2.</div><div class='add'>+ */</div><div class='ctx'> &amp;xo_board_clk {</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	clock-div = &lt;2&gt;;</div><div class='add'>+	clock-mult = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_clk {</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts<br/>index 1bb8d96c9a82..5a546a14998b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include "ipq9574-rdp-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -15,48 +16,116 @@</div><div class='ctx'> 	compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;sdhc_1 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc_default_state&gt;;</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_default&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	mmc-ddr-1_8v;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	mmc-hs400-1_8v;</div><div class='del'>-	mmc-hs400-enhanced-strobe;</div><div class='del'>-	max-frequency = &lt;384000000&gt;;</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 30 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 33 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='del'>-	sdc_default_state: sdc-default-state {</div><div class='del'>-		clk-pins {</div><div class='del'>-			pins = "gpio5";</div><div class='del'>-			function = "sdc_clk";</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='del'>-			bias-disable;</div><div class='add'>+</div><div class='add'>+	pcie1_default: pcie1-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio25";</div><div class='add'>+			function = "pcie1_clk";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cmd-pins {</div><div class='del'>-			pins = "gpio4";</div><div class='del'>-			function = "sdc_cmd";</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio26";</div><div class='add'>+			function = "gpio";</div><div class='ctx'> 			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio27";</div><div class='add'>+			function = "pcie1_wake";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		data-pins {</div><div class='del'>-			pins = "gpio0", "gpio1", "gpio2",</div><div class='del'>-			       "gpio3", "gpio6", "gpio7",</div><div class='del'>-			       "gpio8", "gpio9";</div><div class='del'>-			function = "sdc_data";</div><div class='del'>-			drive-strength = &lt;8&gt;;</div><div class='add'>+	pcie2_default: pcie2-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio28";</div><div class='add'>+			function = "pcie2_clk";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rclk-pins {</div><div class='del'>-			pins = "gpio10";</div><div class='del'>-			function = "sdc_rclk";</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio29";</div><div class='add'>+			function = "gpio";</div><div class='ctx'> 			drive-strength = &lt;8&gt;;</div><div class='ctx'> 			bias-pull-down;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio30";</div><div class='add'>+			function = "pcie2_wake";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3_default: pcie3-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio31";</div><div class='add'>+			function = "pcie3_clk";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio32";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio33";</div><div class='add'>+			function = "pcie3_wake";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi<br/>index 08a82a5cf667..86c9cb9fffc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/ipq9574.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/ipq9574.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/ipq9574.dtsi</a></div><div class='hunk'>@@ -3,10 +3,11 @@</div><div class='ctx'>  * IPQ9574 SoC device tree source</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,apss-ipq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,ipq-cmn-pll.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,ipq9574-gcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,ipq9574.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -19,12 +20,24 @@</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='add'>+		ref_48mhz_clk: ref-48mhz-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;xo_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		xo_board_clk: xo-board-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			clocks = &lt;&amp;ref_48mhz_clk&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_clk: xo-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -34,12 +47,12 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -47,12 +60,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -60,12 +73,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -73,12 +86,12 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a73";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb APCS_ALIAS0_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "cpu";</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -86,7 +99,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -226,15 +239,61 @@</div><div class='ctx'> 			reg = &lt;0x00060000 0x6000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie0_phy: phy@84000 {</div><div class='add'>+			compatible = "qcom,ipq9574-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0x00084000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie0_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_phy: phy@8c000 {</div><div class='add'>+			compatible = "qcom,ipq9574-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x0008c000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE2_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie2_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rng: rng@e3000 {</div><div class='del'>-			compatible = "qcom,prng-ee";</div><div class='add'>+			compatible = "qcom,ipq9574-trng", "qcom,trng";</div><div class='ctx'> 			reg = &lt;0x000e3000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mdio: mdio@90000 {</div><div class='del'>-			compatible =  "qcom,ipq9574-mdio", "qcom,ipq4019-mdio";</div><div class='add'>+			compatible = "qcom,ipq9574-mdio", "qcom,ipq4019-mdio";</div><div class='ctx'> 			reg = &lt;0x00090000 0x64&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -243,6 +302,64 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie3_phy: phy@f4000 {</div><div class='add'>+			compatible = "qcom,ipq9574-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x000f4000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie3_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_phy: phy@fc000 {</div><div class='add'>+			compatible = "qcom,ipq9574-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0x000fc000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1PHY_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "gcc_pcie1_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmn_pll: clock-controller@9b000 {</div><div class='add'>+			compatible = "qcom,ipq9574-cmn-pll";</div><div class='add'>+			reg = &lt;0x0009b000 0x800&gt;;</div><div class='add'>+			clocks = &lt;&amp;ref_48mhz_clk&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_12GPLL_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CMN_12GPLL_SYS_CLK&gt;;</div><div class='add'>+			clock-names = "ref", "ahb", "sys";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cmn_pll CMN_PLL_CLK&gt;;</div><div class='add'>+			assigned-clock-rates-u64 = /bits/ 64 &lt;12000000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qfprom: efuse@a4000 {</div><div class='ctx'> 			compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";</div><div class='ctx'> 			reg = &lt;0x000a4000 0x5a1&gt;;</div><div class='hunk'>@@ -261,6 +378,8 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;1&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;16&gt;;</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -309,10 +428,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;xo_board_clk&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie2_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie3_phy&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -556,6 +675,33 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		qpic_bam: dma-controller@7984000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x07984000 0x1c000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qpic_nand: spi@79b0000 {</div><div class='add'>+			compatible = "qcom,ipq9574-snand";</div><div class='add'>+			reg = &lt;0x079b0000 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QPIC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QPIC_IO_MACRO_CLK&gt;;</div><div class='add'>+			clock-names = "core", "aon", "iom";</div><div class='add'>+			dmas = &lt;&amp;qpic_bam 0&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 1&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 2&gt;;</div><div class='add'>+			dma-names = "tx", "rx", "cmd";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_0_qusbphy: phy@7b000 {</div><div class='ctx'> 			compatible = "qcom,ipq9574-qusb2-phy";</div><div class='ctx'> 			reg = &lt;0x0007b000 0x180&gt;;</div><div class='hunk'>@@ -756,6 +902,379 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@10000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x10000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0x10000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x10001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x000f8000 0x4000&gt;,</div><div class='add'>+			      &lt;0x10100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x000fe000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x10200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x10300000 0x10300000 0x0 0x7d00000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE1_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE1_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE1_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE1 &amp;gcc SLAVE_ANOC_PCIE1&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_SNOC_PCIE1 &amp;gcc SLAVE_SNOC_PCIE1&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3: pcie@18000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x18000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0x18000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x18001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x000f0000 0x4000&gt;,</div><div class='add'>+			      &lt;0x18100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x000f6000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;3&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x18200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x18300000 0x18300000 0x0 0x7d00000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE3_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE3_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE3_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie3_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE3 &amp;gcc SLAVE_ANOC_PCIE3&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_SNOC_PCIE3 &amp;gcc SLAVE_SNOC_PCIE3&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2: pcie@20000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x20000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0x20000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x20001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00088000 0x4000&gt;,</div><div class='add'>+			      &lt;0x20100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x0008e000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;2&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x20200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x20300000 0x20300000 0x0 0x7d00000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE2_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE2_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE2_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie2_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE2 &amp;gcc SLAVE_ANOC_PCIE2&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_SNOC_PCIE2 &amp;gcc SLAVE_SNOC_PCIE2&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@28000000 {</div><div class='add'>+			compatible = "qcom,pcie-ipq9574";</div><div class='add'>+			reg = &lt;0x28000000 0xf1d&gt;,</div><div class='add'>+			      &lt;0x28000f20 0xa8&gt;,</div><div class='add'>+			      &lt;0x28001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00080000 0x4000&gt;,</div><div class='add'>+			      &lt;0x28100000 0x1000&gt;,</div><div class='add'>+			      &lt;0x00086000 0x1000&gt;;</div><div class='add'>+			reg-names = "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "parf",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x28200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x28300000 0x28300000 0x0 0x7d00000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE0_AXI_M_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_BRIDGE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "axi_m",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_bridge",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "aux";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE0_PIPE_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_CORE_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_S_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_M_STICKY_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AXI_M_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AUX_ARES&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_AHB_ARES&gt;;</div><div class='add'>+			reset-names = "pipe",</div><div class='add'>+				      "sticky",</div><div class='add'>+				      "axi_s_sticky",</div><div class='add'>+				      "axi_s",</div><div class='add'>+				      "axi_m_sticky",</div><div class='add'>+				      "axi_m",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "ahb";</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			interconnects = &lt;&amp;gcc MASTER_ANOC_PCIE0 &amp;gcc SLAVE_ANOC_PCIE0&gt;,</div><div class='add'>+					&lt;&amp;gcc MASTER_SNOC_PCIE0 &amp;gcc SLAVE_SNOC_PCIE0&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsscc: clock-controller@39b00000 {</div><div class='add'>+			compatible = "qcom,ipq9574-nsscc";</div><div class='add'>+			reg = &lt;0x39b00000 0x80000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board_clk&gt;,</div><div class='add'>+				 &lt;&amp;cmn_pll NSS_1200MHZ_CLK&gt;,</div><div class='add'>+				 &lt;&amp;cmn_pll PPE_353MHZ_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GPLL0_OUT_AUX&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_NSSCC_CLK&gt;;</div><div class='add'>+			clock-names = "xo",</div><div class='add'>+				      "nss_1200",</div><div class='add'>+				      "ppe_353",</div><div class='add'>+				      "gpll0_out",</div><div class='add'>+				      "uniphy0_rx",</div><div class='add'>+				      "uniphy0_tx",</div><div class='add'>+				      "uniphy1_rx",</div><div class='add'>+				      "uniphy1_tx",</div><div class='add'>+				      "uniphy2_rx",</div><div class='add'>+				      "uniphy2_tx",</div><div class='add'>+				      "bus";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='hunk'>@@ -863,10 +1382,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -891,10 +1410,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -919,10 +1438,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -947,10 +1466,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/lemans-auto.dtsi b/arch/arm64/boot/dts/qcom/lemans-auto.dtsi<br/>new file mode 100644<br/>index 000000000000..8db958d60fd1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-auto.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-auto.dtsi</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "lemans.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;pil_camera_mem;</div><div class='add'>+/delete-node/ &amp;pil_adsp_mem;</div><div class='add'>+/delete-node/ &amp;q6_adsp_dtb_mem;</div><div class='add'>+/delete-node/ &amp;q6_gdsp0_dtb_mem;</div><div class='add'>+/delete-node/ &amp;pil_gdsp0_mem;</div><div class='add'>+/delete-node/ &amp;pil_gdsp1_mem;</div><div class='add'>+/delete-node/ &amp;q6_gdsp1_dtb_mem;</div><div class='add'>+/delete-node/ &amp;q6_cdsp0_dtb_mem;</div><div class='add'>+/delete-node/ &amp;pil_cdsp0_mem;</div><div class='add'>+/delete-node/ &amp;pil_gpu_mem;</div><div class='add'>+/delete-node/ &amp;pil_cdsp1_mem;</div><div class='add'>+/delete-node/ &amp;q6_cdsp1_dtb_mem;</div><div class='add'>+/delete-node/ &amp;pil_cvp_mem;</div><div class='add'>+/delete-node/ &amp;pil_video_mem;</div><div class='add'>+/delete-node/ &amp;gunyah_md_mem;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		tz_ffi_mem: tz-ffi@91c00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x91c00000 0x0 0x1400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_camera_mem: pil-camera@95200000 {</div><div class='add'>+			reg = &lt;0x0 0x95200000 0x0 0x500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_adsp_mem: pil-adsp@95c00000 {</div><div class='add'>+			reg = &lt;0x0 0x95c00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_gdsp0_mem: pil-gdsp0@97b00000 {</div><div class='add'>+			reg = &lt;0x0 0x97b00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_gdsp1_mem: pil-gdsp1@99900000 {</div><div class='add'>+			reg = &lt;0x0 0x99900000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_cdsp0_mem: pil-cdsp0@9b800000 {</div><div class='add'>+			reg = &lt;0x0 0x9b800000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_gpu_mem: pil-gpu@9d600000 {</div><div class='add'>+			reg = &lt;0x0 0x9d600000 0x0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_cdsp1_mem: pil-cdsp1@9d700000 {</div><div class='add'>+			reg = &lt;0x0 0x9d700000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_cvp_mem: pil-cvp@9f500000 {</div><div class='add'>+			reg = &lt;0x0 0x9f500000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_video_mem: pil-video@9fc00000 {</div><div class='add'>+			reg = &lt;0x0 0x9fc00000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		audio_mdf_mem: audio-mdf-region@ae000000 {</div><div class='add'>+			reg = &lt;0x0 0xae000000 0x0 0x1000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hyptz_reserved_mem: hyptz-reserved@beb00000 {</div><div class='add'>+			reg = &lt;0x0 0xbeb00000 0x0 0x11500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trusted_apps_mem: trusted-apps@d1900000 {</div><div class='add'>+			reg = &lt;0x0 0xd1900000 0x0 0x3800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm {</div><div class='add'>+			memory-region = &lt;&amp;tz_ffi_mem&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso<br/>new file mode 100644<br/>index 000000000000..769befadd4e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-evk-camera-csi1-imx577.dtso</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-camcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	vreg_cam1_1p8: regulator-cam1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_cam1";</div><div class='add'>+		startup-delay-us = &lt;10000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pmm8654au_0_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;camss {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			csiphy1_ep: endpoint {</div><div class='add'>+				clock-lanes = &lt;7&gt;;</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx577_ep1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;cci1_0_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;cci1_0_sleep&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1_i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	camera@1a {</div><div class='add'>+		compatible = "sony,imx577";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;camcc CAM_CC_MCLK1_CLK&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;camcc CAM_CC_MCLK1_CLK&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+		dovdd-supply = &lt;&amp;vreg_s4a&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;vreg_cam1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx577_ep1: endpoint {</div><div class='add'>+				clock-lanes = &lt;7&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csiphy1_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	cam1_default: cam1-default-state {</div><div class='add'>+		mclk-pins {</div><div class='add'>+			pins = "gpio73";</div><div class='add'>+			function = "cam_mclk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rst-pins {</div><div class='add'>+			pins = "gpio133";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi b/arch/arm64/boot/dts/qcom/lemans-evk.dts<br/>index 0c1b21def4b6..c7dc9b8f4457 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-evk.dts</a></div><div class='hunk'>@@ -1,32 +1,127 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "sa8775p.dtsi"</div><div class='del'>-#include "sa8775p-pmics.dtsi"</div><div class='add'>+#include "lemans.dtsi"</div><div class='add'>+#include "lemans-pmics.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. Lemans EVK";</div><div class='add'>+	compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p";</div><div class='add'>+</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;ethernet0;</div><div class='del'>-		ethernet1 = &amp;ethernet1;</div><div class='del'>-		i2c11 = &amp;i2c11;</div><div class='del'>-		i2c18 = &amp;i2c18;</div><div class='add'>+		mmc1 = &amp;sdhc;</div><div class='ctx'> 		serial0 = &amp;uart10;</div><div class='del'>-		serial1 = &amp;uart12;</div><div class='del'>-		serial2 = &amp;uart17;</div><div class='del'>-		spi16 = &amp;spi16;</div><div class='del'>-		ufshc1 = &amp;ufs_mem_hc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic: audio-codec-0 {</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		num-channels = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	max98357a: audio-codec-1 {</div><div class='add'>+		compatible = "maxim,max98357a";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	edp0-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "EDP0";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			edp0_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp1-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "EDP1";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			edp1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,qcs9100-sndcard";</div><div class='add'>+		model = "LEMANS-EVK";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hs0_mi2s_active&gt;, &lt;&amp;hs2_mi2s_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		hs0-mi2s-playback-dai-link {</div><div class='add'>+			link-name = "HS0 MI2S Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;max98357a&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai PRIMARY_MI2S_RX&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hs2-mi2s-capture-dai-link {</div><div class='add'>+			link-name = "HS2 MI2S Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;dmic&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TERTIARY_MI2S_TX&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc_sdc: regulator-vmmc-sdc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vmmc_sdc";</div><div class='add'>+		regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_sdc: regulator-vreg-sdc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vreg_sdc";</div><div class='add'>+		regulator-type = "voltage";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+</div><div class='add'>+		gpios = &lt;&amp;expander1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 1&gt;, &lt;2950000 0&gt;;</div><div class='add'>+</div><div class='add'>+		startup-delay-us = &lt;100&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='hunk'>@@ -155,11 +250,9 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-			/*</div><div class='del'>-			 * FIXME: This should have regulator-allow-set-load but</div><div class='del'>-			 * we're getting an over-current fault from the PMIC</div><div class='del'>-			 * when switching to LPM.</div><div class='del'>-			 */</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l5c: ldo5 {</div><div class='hunk'>@@ -261,21 +354,32 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ethernet0 {</div><div class='del'>-	phy-handle = &lt;&amp;sgmii_phy0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;hsgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "2500base-x";</div><div class='ctx'> </div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ethernet0_default&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='ctx'> 	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='del'>-	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	nvmem-cells = &lt;&amp;mac_addr0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	mdio: mdio {</div><div class='add'>+	mdio {</div><div class='ctx'> 		compatible = "snps,dwmac-mdio";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		hsgmii_phy0: ethernet-phy@1c {</div><div class='add'>+			compatible = "ethernet-phy-id004d.d101";</div><div class='add'>+			reg = &lt;0x1c&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mtl_rx_setup: rx-queues-config {</div><div class='hunk'>@@ -310,7 +414,6 @@</div><div class='ctx'> </div><div class='ctx'> 	mtl_tx_setup: tx-queues-config {</div><div class='ctx'> 		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='del'>-		snps,tx-sched-sp;</div><div class='ctx'> </div><div class='ctx'> 		queue0 {</div><div class='ctx'> 			snps,dcb-algorithm;</div><div class='hunk'>@@ -338,164 +441,154 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;ethernet1 {</div><div class='del'>-	phy-handle = &lt;&amp;sgmii_phy1&gt;;</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='del'>-	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='del'>-	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+&amp;gpi_dma2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	mtl_rx_setup1: rx-queues-config {</div><div class='del'>-		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='del'>-		snps,rx-sched-sp;</div><div class='add'>+&amp;i2c18 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-		queue0 {</div><div class='del'>-			snps,dcb-algorithm;</div><div class='del'>-			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='del'>-			snps,route-up;</div><div class='del'>-			snps,priority = &lt;0x1&gt;;</div><div class='del'>-		};</div><div class='add'>+	expander0: gpio@38 {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		queue1 {</div><div class='del'>-			snps,dcb-algorithm;</div><div class='del'>-			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='del'>-			snps,route-ptp;</div><div class='del'>-		};</div><div class='add'>+	expander1: gpio@39 {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		queue2 {</div><div class='del'>-			snps,avb-algorithm;</div><div class='del'>-			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='del'>-			snps,route-avcp;</div><div class='del'>-		};</div><div class='add'>+	expander2: gpio@3a {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		queue3 {</div><div class='del'>-			snps,avb-algorithm;</div><div class='del'>-			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='del'>-			snps,priority = &lt;0xc&gt;;</div><div class='del'>-		};</div><div class='add'>+	expander3: gpio@3b {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3b&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mtl_tx_setup1: tx-queues-config {</div><div class='del'>-		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='del'>-		snps,tx-sched-sp;</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "giantec,gt24c256c", "atmel,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;64&gt;;</div><div class='ctx'> </div><div class='del'>-		queue0 {</div><div class='del'>-			snps,dcb-algorithm;</div><div class='del'>-		};</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		queue1 {</div><div class='del'>-			snps,dcb-algorithm;</div><div class='add'>+			mac_addr0: mac-addr@0 {</div><div class='add'>+				reg = &lt;0x0 0x6&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		queue2 {</div><div class='del'>-			snps,avb-algorithm;</div><div class='del'>-			snps,send_slope = &lt;0x1000&gt;;</div><div class='del'>-			snps,idle_slope = &lt;0x1000&gt;;</div><div class='del'>-			snps,high_credit = &lt;0x3e800&gt;;</div><div class='del'>-			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='del'>-		};</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/vpu/vpu30_p4_s6_16mb.mbn";</div><div class='ctx'> </div><div class='del'>-		queue3 {</div><div class='del'>-			snps,avb-algorithm;</div><div class='del'>-			snps,send_slope = &lt;0x1000&gt;;</div><div class='del'>-			snps,idle_slope = &lt;0x1000&gt;;</div><div class='del'>-			snps,high_credit = &lt;0x3e800&gt;;</div><div class='del'>-			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c11 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_i2c11_default&gt;;</div><div class='add'>+&amp;mdss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp0_hot_plug_det&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c18 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_i2c18_default&gt;;</div><div class='add'>+&amp;mdss0_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp0_connector_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp1_hot_plug_det&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmm8654au_0_gpios {</div><div class='del'>-	gpio-line-names = "DS_EN",</div><div class='del'>-			  "POFF_COMPLETE",</div><div class='del'>-			  "UFS0_VER_ID",</div><div class='del'>-			  "FAST_POFF",</div><div class='del'>-			  "DBU1_PON_DONE",</div><div class='del'>-			  "AOSS_SLEEP",</div><div class='del'>-			  "CAM_DES0_EN",</div><div class='del'>-			  "CAM_DES1_EN",</div><div class='del'>-			  "CAM_DES2_EN",</div><div class='del'>-			  "CAM_DES3_EN",</div><div class='del'>-			  "UEFI",</div><div class='del'>-			  "ANALOG_PON_OPT";</div><div class='add'>+&amp;mdss0_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp1_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmm8654au_0_pon_resin {</div><div class='del'>-	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+&amp;mdss0_dp1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmm8654au_1_gpios {</div><div class='del'>-	gpio-line-names = "PMIC_C_ID0",</div><div class='del'>-			  "PMIC_C_ID1",</div><div class='del'>-			  "UFS1_VER_ID",</div><div class='del'>-			  "IPA_PWR",</div><div class='del'>-			  "",</div><div class='del'>-			  "WLAN_DBU4_EN",</div><div class='del'>-			  "WLAN_EN",</div><div class='del'>-			  "BT_EN",</div><div class='del'>-			  "USB2_PWR_EN",</div><div class='del'>-			  "USB2_FAULT";</div><div class='del'>-</div><div class='del'>-	usb2_en_state: usb2-en-state {</div><div class='del'>-		pins = "gpio9";</div><div class='del'>-		function = "normal";</div><div class='del'>-		output-high;</div><div class='del'>-		power-source = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmm8654au_2_gpios {</div><div class='del'>-	gpio-line-names = "PMIC_E_ID0",</div><div class='del'>-			  "PMIC_E_ID1",</div><div class='del'>-			  "USB0_PWR_EN",</div><div class='del'>-			  "USB0_FAULT",</div><div class='del'>-			  "SENSOR_IRQ_1",</div><div class='del'>-			  "SENSOR_IRQ_2",</div><div class='del'>-			  "SENSOR_RST",</div><div class='del'>-			  "SGMIIO0_RST",</div><div class='del'>-			  "SGMIIO1_RST",</div><div class='del'>-			  "USB1_PWR_ENABLE",</div><div class='del'>-			  "USB1_FAULT",</div><div class='del'>-			  "VMON_SPX8";</div><div class='del'>-</div><div class='del'>-	usb0_en_state: usb0-en-state {</div><div class='del'>-		pins = "gpio3";</div><div class='del'>-		function = "normal";</div><div class='del'>-		output-high;</div><div class='del'>-		power-source = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='ctx'> </div><div class='del'>-	usb1_en_state: usb1-en-state {</div><div class='del'>-		pins = "gpio10";</div><div class='del'>-		function = "normal";</div><div class='del'>-		output-high;</div><div class='del'>-		power-source = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmm8654au_3_gpios {</div><div class='del'>-	gpio-line-names = "PMIC_G_ID0",</div><div class='del'>-			  "PMIC_G_ID1",</div><div class='del'>-			  "GNSS_RST",</div><div class='del'>-			  "GNSS_EN",</div><div class='del'>-			  "GNSS_BOOT_MODE";</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qupv3_id_1 {</div><div class='hunk'>@@ -506,26 +599,62 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;serdes0 {</div><div class='del'>-	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sa8775p/adsp.mbn";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;serdes1 {</div><div class='del'>-	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+&amp;remoteproc_cdsp0 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/cdsp0.mbn";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32764&gt;;</div><div class='add'>+&amp;remoteproc_cdsp1 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/cdsp1.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;spi16 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_spi16_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='add'>+&amp;remoteproc_gpdsp0 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/gpdsp0.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_gpdsp1 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/gpdsp1.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc {</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc_sdc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_sdc&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc_default&gt;, &lt;&amp;sd_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc_sleep&gt;, &lt;&amp;sd_cd&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 36 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sleep_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	ethernet0_default: ethernet0-default-state {</div><div class='ctx'> 		ethernet0_mdc: ethernet0-mdc-pins {</div><div class='hunk'>@@ -543,96 +672,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	qup_uart10_default: qup-uart10-state {</div><div class='del'>-		pins = "gpio46", "gpio47";</div><div class='del'>-		function = "qup1_se3";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qup_spi16_default: qup-spi16-state {</div><div class='del'>-		pins = "gpio86", "gpio87", "gpio88", "gpio89";</div><div class='del'>-		function = "qup2_se2";</div><div class='del'>-		drive-strength = &lt;6&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qup_i2c11_default: qup-i2c11-state {</div><div class='del'>-		pins = "gpio48", "gpio49";</div><div class='del'>-		function = "qup1_se4";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qup_i2c18_default: qup-i2c18-state {</div><div class='del'>-		pins = "gpio95", "gpio96";</div><div class='del'>-		function = "qup2_se4";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qup_uart12_default: qup-uart12-state {</div><div class='del'>-		qup_uart12_cts: qup-uart12-cts-pins {</div><div class='del'>-			pins = "gpio52";</div><div class='del'>-			function = "qup1_se5";</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qup_uart12_rts: qup-uart12-rts-pins {</div><div class='del'>-			pins = "gpio53";</div><div class='del'>-			function = "qup1_se5";</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qup_uart12_tx: qup-uart12-tx-pins {</div><div class='del'>-			pins = "gpio54";</div><div class='del'>-			function = "qup1_se5";</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qup_uart12_rx: qup-uart12-rx-pins {</div><div class='del'>-			pins = "gpio55";</div><div class='del'>-			function = "qup1_se5";</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qup_uart17_default: qup-uart17-state {</div><div class='del'>-		qup_uart17_cts: qup-uart17-cts-pins {</div><div class='del'>-			pins = "gpio91";</div><div class='del'>-			function = "qup2_se3";</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qup_uart17_rts: qup0-uart17-rts-pins {</div><div class='del'>-			pins = "gpio92";</div><div class='del'>-			function = "qup2_se3";</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		qup_uart17_tx: qup0-uart17-tx-pins {</div><div class='del'>-			pins = "gpio93";</div><div class='del'>-			function = "qup2_se3";</div><div class='add'>+	pcie0_default_state: pcie0-default-state {</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio1";</div><div class='add'>+			function = "pcie0_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		qup_uart17_rx: qup0-uart17-rx-pins {</div><div class='del'>-			pins = "gpio94";</div><div class='del'>-			function = "qup2_se3";</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie0_default_state: pcie0-default-state {</div><div class='ctx'> 		perst-pins {</div><div class='ctx'> 			pins = "gpio2";</div><div class='ctx'> 			function = "gpio";</div><div class='ctx'> 			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clkreq-pins {</div><div class='del'>-			pins = "gpio1";</div><div class='del'>-			function = "pcie0_clkreq";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -645,13 +696,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie1_default_state: pcie1-default-state {</div><div class='del'>-		perst-pins {</div><div class='del'>-			pins = "gpio4";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-down;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		clkreq-pins {</div><div class='ctx'> 			pins = "gpio3";</div><div class='ctx'> 			function = "pcie1_clkreq";</div><div class='hunk'>@@ -659,6 +703,13 @@</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio4";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		wake-pins {</div><div class='ctx'> 			pins = "gpio5";</div><div class='ctx'> 			function = "gpio";</div><div class='hunk'>@@ -666,83 +717,19 @@</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie0 {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie1 {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie0_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie1_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;remoteproc_adsp {</div><div class='del'>-	firmware-name = "qcom/sa8775p/adsp.mbn";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_cdsp0 {</div><div class='del'>-	firmware-name = "qcom/sa8775p/cdsp0.mbn";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_cdsp1 {</div><div class='del'>-	firmware-name = "qcom/sa8775p/cdsp1.mbn";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_gpdsp0 {</div><div class='del'>-	firmware-name = "qcom/sa8775p/gpdsp0.mbn";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_gpdsp1 {</div><div class='del'>-	firmware-name = "qcom/sa8775p/gpdsp1.mbn";</div><div class='del'>-	status = "okay";</div><div class='add'>+	sd_cd: sd-cd-state {</div><div class='add'>+		pins = "gpio36";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart10 {</div><div class='ctx'> 	compatible = "qcom,geni-debug-uart";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;qup_uart10_default&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart12 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_uart12_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;uart17 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_uart17_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -764,16 +751,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;usb0_en_state&gt;;</div><div class='add'>+	dr_mode = "peripheral";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_0_dwc3 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;usb_0_hsphy {</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='ctx'> 	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='hunk'>@@ -789,51 +771,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;usb1_en_state&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_hsphy {</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='del'>-	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='del'>-	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;usb2_en_state&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_hsphy {</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='del'>-	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='del'>-	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;xo_board_clk {</div><div class='ctx'> 	clock-frequency = &lt;38400000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/lemans-pmics.dtsi<br/>index 1369c3d43f86..1369c3d43f86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-pmics.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-pmics.dtsi</a></div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi<br/>new file mode 100644<br/>index 000000000000..c69aa2f41ce2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1061 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		i2c11 = &amp;i2c11;</div><div class='add'>+		i2c18 = &amp;i2c18;</div><div class='add'>+		serial0 = &amp;uart10;</div><div class='add'>+		serial1 = &amp;uart12;</div><div class='add'>+		serial2 = &amp;uart17;</div><div class='add'>+		spi16 = &amp;spi16;</div><div class='add'>+		ufshc1 = &amp;ufs_mem_hc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_12p0: vreg-12p0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREG_12P0";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_5p0: vreg-5p0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREG_5P0";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_12p0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_1p8: vreg-1p8-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREG_1P8";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_5p0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_1p0: vreg-1p0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREG_1P0";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_3p0: vreg-3p0-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VREG_3P0";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_12p0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_conn_1p8: vreg_conn_1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_conn_1p8";</div><div class='add'>+		startup-delay-us = &lt;4000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pmm8654au_1_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_conn_pa: vreg_conn_pa {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_conn_pa";</div><div class='add'>+		startup-delay-us = &lt;4000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pmm8654au_1_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en_state&gt;, &lt;&amp;wlan_en_state&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_conn_pa&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_l2c&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_conn_1p8&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_l2c&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_l6e&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s5a&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_l6e&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s5a&gt;;</div><div class='add'>+</div><div class='add'>+		bt-enable-gpios = &lt;&amp;pmm8654au_1_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;pmm8654au_1_gpios 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "eDP0";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp0_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp1-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "eDP1";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp-dsi0-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DSI0";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp_dsi0_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi2dp_bridge0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp-dsi1-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DSI1";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp_dsi1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi2dp_bridge1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vreg_s4a: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1816000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s5a: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5a";</div><div class='add'>+			regulator-min-microvolt = &lt;1850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1996000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s9a: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9a";</div><div class='add'>+			regulator-min-microvolt = &lt;535000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4a: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4a";</div><div class='add'>+			regulator-min-microvolt = &lt;788000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a";</div><div class='add'>+			regulator-min-microvolt = &lt;870000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6a";</div><div class='add'>+			regulator-min-microvolt = &lt;870000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;970000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7a";</div><div class='add'>+			regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8a";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9a: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9a";</div><div class='add'>+			regulator-min-microvolt = &lt;2970000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c";</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4c: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * FIXME: This should have regulator-allow-set-load but</div><div class='add'>+			 * we're getting an over-current fault from the PMIC</div><div class='add'>+			 * when switching to LPM.</div><div class='add'>+			 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5c: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5c";</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6c: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7c: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;2400000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vreg_s4e: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4e";</div><div class='add'>+			regulator-min-microvolt = &lt;970000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1520000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s7e: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7e";</div><div class='add'>+			regulator-min-microvolt = &lt;1010000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s9e: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9e";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;570000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6e: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6e";</div><div class='add'>+			regulator-min-microvolt = &lt;1280000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8e: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8e";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c18 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	io_expander: gpio@74 {</div><div class='add'>+		compatible = "ti,tca9539";</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 98 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 97 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;io_expander_intr_active&gt;,</div><div class='add'>+			    &lt;&amp;io_expander_reset_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9543";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			bridge@58 {</div><div class='add'>+				compatible = "analogix,anx7625";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;io_expander 2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+				enable-gpios = &lt;&amp;io_expander 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;io_expander 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				vdd10-supply = &lt;&amp;vreg_1p0&gt;;</div><div class='add'>+				vdd18-supply = &lt;&amp;vreg_1p8&gt;;</div><div class='add'>+				vdd33-supply = &lt;&amp;vreg_3p0&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						dsi2dp_bridge0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dsi0_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						dsi2dp_bridge0_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dp_dsi0_connector_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			bridge@58 {</div><div class='add'>+				compatible = "analogix,anx7625";</div><div class='add'>+				reg = &lt;0x58&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;io_expander 10 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+				enable-gpios = &lt;&amp;io_expander 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;io_expander 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				vdd10-supply = &lt;&amp;vreg_1p0&gt;;</div><div class='add'>+				vdd18-supply = &lt;&amp;vreg_1p8&gt;;</div><div class='add'>+				vdd33-supply = &lt;&amp;vreg_3p0&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						dsi2dp_bridge1_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dsi1_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						dsi2dp_bridge1_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dp_dsi1_connector_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/vpu/vpu30_p4_s6.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp0_hot_plug_det&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dp0_connector_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp1_hot_plug_det&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dp1_connector_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi0 {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi2dp_bridge0_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi0_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi1 {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi1_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dsi2dp_bridge1_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dsi1_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8654au_0_gpios {</div><div class='add'>+	gpio-line-names = "DS_EN",</div><div class='add'>+			  "POFF_COMPLETE",</div><div class='add'>+			  "UFS0_VER_ID",</div><div class='add'>+			  "FAST_POFF",</div><div class='add'>+			  "DBU1_PON_DONE",</div><div class='add'>+			  "AOSS_SLEEP",</div><div class='add'>+			  "CAM_DES0_EN",</div><div class='add'>+			  "CAM_DES1_EN",</div><div class='add'>+			  "CAM_DES2_EN",</div><div class='add'>+			  "CAM_DES3_EN",</div><div class='add'>+			  "UEFI",</div><div class='add'>+			  "ANALOG_PON_OPT";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8654au_0_pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8654au_1_gpios {</div><div class='add'>+	gpio-line-names = "PMIC_C_ID0",</div><div class='add'>+			  "PMIC_C_ID1",</div><div class='add'>+			  "UFS1_VER_ID",</div><div class='add'>+			  "IPA_PWR",</div><div class='add'>+			  "",</div><div class='add'>+			  "WLAN_DBU4_EN",</div><div class='add'>+			  "WLAN_EN",</div><div class='add'>+			  "BT_EN",</div><div class='add'>+			  "USB2_PWR_EN",</div><div class='add'>+			  "USB2_FAULT";</div><div class='add'>+</div><div class='add'>+	wlan_en_state: wlan-en-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_en_state: bt-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_en_state: usb2-en-state {</div><div class='add'>+		pins = "gpio9";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-high;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8654au_2_gpios {</div><div class='add'>+	gpio-line-names = "PMIC_E_ID0",</div><div class='add'>+			  "PMIC_E_ID1",</div><div class='add'>+			  "USB0_PWR_EN",</div><div class='add'>+			  "USB0_FAULT",</div><div class='add'>+			  "SENSOR_IRQ_1",</div><div class='add'>+			  "SENSOR_IRQ_2",</div><div class='add'>+			  "SENSOR_RST",</div><div class='add'>+			  "SGMIIO0_RST",</div><div class='add'>+			  "SGMIIO1_RST",</div><div class='add'>+			  "USB1_PWR_ENABLE",</div><div class='add'>+			  "USB1_FAULT",</div><div class='add'>+			  "VMON_SPX8";</div><div class='add'>+</div><div class='add'>+	usb0_en_state: usb0-en-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-high;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_en_state: usb1-en-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-high;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8654au_3_gpios {</div><div class='add'>+	gpio-line-names = "PMIC_G_ID0",</div><div class='add'>+			  "PMIC_G_ID1",</div><div class='add'>+			  "GNSS_RST",</div><div class='add'>+			  "GNSS_EN",</div><div class='add'>+			  "GNSS_BOOT_MODE";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_spi16_default {</div><div class='add'>+	drive-strength = &lt;6&gt;;</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_i2c11_default {</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-pull-up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_i2c18_default {</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-pull-up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart12_cts {</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart12_rts {</div><div class='add'>+	bias-pull-down;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart12_tx {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart12_rx {</div><div class='add'>+	bias-pull-down;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart17_cts {</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart17_rts {</div><div class='add'>+	bias-pull-down;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart17_tx {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart17_rx {</div><div class='add'>+	bias-pull-down;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes1 {</div><div class='add'>+	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sleep_clk {</div><div class='add'>+	clock-frequency = &lt;32000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi16 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	dp0_hot_plug_det: dp0-hot-plug-det-state {</div><div class='add'>+		pins = "gpio101";</div><div class='add'>+		function = "edp0_hot";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp1_hot_plug_det: dp1-hot-plug-det-state {</div><div class='add'>+		pins = "gpio102";</div><div class='add'>+		function = "edp1_hot";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	io_expander_intr_active: io-expander-intr-active-state {</div><div class='add'>+		pins = "gpio98";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	io_expander_reset_active: io-expander-reset-active-state {</div><div class='add'>+		pins = "gpio97";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_default_state: pcie0-default-state {</div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio2";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio1";</div><div class='add'>+			function = "pcie0_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pins = "gpio0";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_default_state: pcie1-default-state {</div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio4";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio3";</div><div class='add'>+			function = "pcie1_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pins = "gpio5";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcieport0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1101";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "QC_SA8775P_Ride";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sa8775p/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp0 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/cdsp0.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp1 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/cdsp1.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_gpdsp0 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/gpdsp0.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_gpdsp1 {</div><div class='add'>+	firmware-name = "qcom/sa8775p/gpdsp1.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart10 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart12 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_uart12_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart17 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_uart17_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+		firmware-name = "QCA6698/hpnv21", "QCA6698/hpbtfw21.tlv";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l8a&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;1100000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l4c&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_en_state&gt;;</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_en_state&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_en_state&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l6c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board_clk {</div><div class='add'>+	clock-frequency = &lt;38400000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi<br/>new file mode 100644<br/>index 000000000000..9d6bbe1447a4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-ride-ethernet-88ea1512.dtsi</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Ethernet card for Lemans based Ride boards.</div><div class='add'>+ * It supports 2x 1G - SGMII (Marvell 88EA1512-B2) phy for Main domain</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		ethernet1 = &amp;ethernet1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	ethernet0_default: ethernet0-default-state {</div><div class='add'>+		ethernet0_mdc: ethernet0-mdc-pins {</div><div class='add'>+			pins = "gpio8";</div><div class='add'>+			function = "emac0_mdc";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet0_mdio: ethernet0-mdio-pins {</div><div class='add'>+			pins = "gpio9";</div><div class='add'>+			function = "emac0_mdio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	phy-handle = &lt;&amp;sgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		sgmii_phy0: phy@8 {</div><div class='add'>+			compatible = "ethernet-phy-id0141.0dd4";</div><div class='add'>+			reg = &lt;0x8&gt;;</div><div class='add'>+			device_type = "ethernet-phy";</div><div class='add'>+			interrupts-extended = &lt;&amp;tlmm 7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sgmii_phy1: phy@a {</div><div class='add'>+			compatible = "ethernet-phy-id0141.0dd4";</div><div class='add'>+			reg = &lt;0xa&gt;;</div><div class='add'>+			device_type = "ethernet-phy";</div><div class='add'>+			interrupts-extended = &lt;&amp;tlmm 26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	phy-handle = &lt;&amp;sgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='add'>+	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup1: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup1: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi<br/>new file mode 100644<br/>index 000000000000..2d2d9ee5f0d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans-ride-ethernet-aqr115c.dtsi</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Ethernet card for Lemans based Ride r3 boards.</div><div class='add'>+ * It supports 2x 2.5G - HSGMII (Marvell hsgmii) phy for Main domain</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		ethernet1 = &amp;ethernet1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	ethernet0_default: ethernet0-default-state {</div><div class='add'>+		ethernet0_mdc: ethernet0-mdc-pins {</div><div class='add'>+			pins = "gpio8";</div><div class='add'>+			function = "emac0_mdc";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet0_mdio: ethernet0-mdio-pins {</div><div class='add'>+			pins = "gpio9";</div><div class='add'>+			function = "emac0_mdio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	phy-handle = &lt;&amp;hsgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "2500base-x";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		hsgmii_phy0: phy@8 {</div><div class='add'>+			compatible = "ethernet-phy-id31c3.1c33";</div><div class='add'>+			reg = &lt;0x8&gt;;</div><div class='add'>+			device_type = "ethernet-phy";</div><div class='add'>+			interrupts-extended = &lt;&amp;tlmm 7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsgmii_phy1: phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-id31c3.1c33";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			device_type = "ethernet-phy";</div><div class='add'>+			interrupts-extended = &lt;&amp;tlmm 26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	phy-handle = &lt;&amp;hsgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "2500base-x";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='add'>+	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup1: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup1: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi<br/>index e8dbc8d820a6..cf685cb186ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/lemans.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/lemans.dtsi</a></div><div class='hunk'>@@ -1,18 +1,25 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2023, Linaro Limited</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-dispcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sa8775p-gcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sa8775p-gpucc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-videocc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-camcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,osm-l3.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sa8775p-rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/firmware/qcom,scm.h&gt;</div><div class='del'>-#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -37,21 +44,28 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -59,72 +73,100 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_2: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_2: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_3&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_3: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_3: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@10000 {</div><div class='add'>+		cpu4: cpu@10000 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x10000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_4&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_4: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_4: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_1&gt;;</div><div class='del'>-				L3_1: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+				l3_1: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -133,91 +175,112 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@10100 {</div><div class='add'>+		cpu5: cpu@10100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x10100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_5&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_5&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_5: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_5: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_1&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@10200 {</div><div class='add'>+		cpu6: cpu@10200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x10200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_6&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_6&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_6: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_6: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_1&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@10300 {</div><div class='add'>+		cpu7: cpu@10300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x10300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_7&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_7&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			L2_7: l2-cache {</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+			l2_7: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_1&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -225,7 +288,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			GOLD_CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+			gold_cpu_sleep_0: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -235,7 +298,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			GOLD_RAIL_CPU_SLEEP_0: cpu-sleep-1 {</div><div class='add'>+			gold_rail_cpu_sleep_0: cpu-sleep-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -247,7 +310,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_GOLD: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_gold: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -255,7 +318,7 @@</div><div class='ctx'> 				min-residency-us = &lt;6118&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_APSS_RSC_PC: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_apss_rsc_pc: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x42000144&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -265,6 +328,176 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cpu0_opp_table: opp-table-cpu0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1363200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1363200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1459200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1459200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1536000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1536000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1632000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1632000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1785600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1785600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1862400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1862400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1939200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1939200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2112000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2112000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2188800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2188800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2265600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2265600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2361600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2361600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2457600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2457600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2553600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2553600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1708800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu4_opp_table: opp-table-cpu4 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1363200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1363200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1459200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1459200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1536000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1536000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1555200 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1632000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1632000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1785600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1785600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1862400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1862400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1939200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1939200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2112000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2112000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2188800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2188800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2265600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2265600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2361600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2361600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2457600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2457600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2553600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2553600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1708800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	dummy-sink {</div><div class='ctx'> 		compatible = "arm,coresight-dummy-sink";</div><div class='ctx'> </div><div class='hunk'>@@ -281,7 +514,7 @@</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		scm {</div><div class='ctx'> 			compatible = "qcom,scm-sa8775p", "qcom,scm";</div><div class='del'>-			memory-region = &lt;&amp;tz_ffi_mem&gt;;</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x13000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -393,77 +626,77 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;GOLD_RAIL_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;gold_rail_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_0_PD: power-domain-cluster0 {</div><div class='add'>+		cluster_0_pd: power-domain-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_2_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_GOLD&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_gold&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_1_PD: power-domain-cluster1 {</div><div class='add'>+		cluster_1_pd: power-domain-cluster1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_2_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_GOLD&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_gold&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_2_PD: power-domain-cluster2 {</div><div class='add'>+		system_pd: power-domain-system {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_APSS_RSC_PC&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_apss_rsc_pc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -540,6 +773,11 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gunyah_md_mem: gunyah-md@91a80000 {</div><div class='add'>+			reg = &lt;0x0 0x91a80000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		aoss_backup_mem: aoss-backup@91b00000 {</div><div class='ctx'> 			reg = &lt;0x0 0x91b00000 0x0 0x40000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -565,12 +803,6 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		tz_ffi_mem: tz-ffi@91c00000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x0 0x91c00000 0x0 0x1400000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		lpass_machine_learning_mem: lpass-machine-learning@93b00000 {</div><div class='ctx'> 			reg = &lt;0x0 0x93b00000 0x0 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -582,62 +814,77 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_camera_mem: pil-camera@95200000 {</div><div class='del'>-			reg = &lt;0x0 0x95200000 0x0 0x500000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x95200000 0x0 0x700000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_adsp_mem: pil-adsp@95c00000 {</div><div class='del'>-			reg = &lt;0x0 0x95c00000 0x0 0x1e00000&gt;;</div><div class='add'>+		pil_adsp_mem: pil-adsp@95900000 {</div><div class='add'>+			reg = &lt;0x0 0x95900000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_gdsp0_mem: pil-gdsp0@97b00000 {</div><div class='del'>-			reg = &lt;0x0 0x97b00000 0x0 0x1e00000&gt;;</div><div class='add'>+		q6_adsp_dtb_mem: q6-adsp-dtb@97700000 {</div><div class='add'>+			reg = &lt;0x0 0x97700000 0x0 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_gdsp1_mem: pil-gdsp1@99900000 {</div><div class='del'>-			reg = &lt;0x0 0x99900000 0x0 0x1e00000&gt;;</div><div class='add'>+		q6_gdsp0_dtb_mem: q6-gdsp0-dtb@97780000 {</div><div class='add'>+			reg = &lt;0x0 0x97780000 0x0 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_cdsp0_mem: pil-cdsp0@9b800000 {</div><div class='del'>-			reg = &lt;0x0 0x9b800000 0x0 0x1e00000&gt;;</div><div class='add'>+		pil_gdsp0_mem: pil-gdsp0@97800000 {</div><div class='add'>+			reg = &lt;0x0 0x97800000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_gpu_mem: pil-gpu@9d600000 {</div><div class='del'>-			reg = &lt;0x0 0x9d600000 0x0 0x2000&gt;;</div><div class='add'>+		pil_gdsp1_mem: pil-gdsp1@99600000 {</div><div class='add'>+			reg = &lt;0x0 0x99600000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_cdsp1_mem: pil-cdsp1@9d700000 {</div><div class='del'>-			reg = &lt;0x0 0x9d700000 0x0 0x1e00000&gt;;</div><div class='add'>+		q6_gdsp1_dtb_mem: q6-gdsp1-dtb@9b400000 {</div><div class='add'>+			reg = &lt;0x0 0x9b400000 0x0 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_cvp_mem: pil-cvp@9f500000 {</div><div class='del'>-			reg = &lt;0x0 0x9f500000 0x0 0x700000&gt;;</div><div class='add'>+		q6_cdsp0_dtb_mem: q6-cdsp0-dtb@9b480000 {</div><div class='add'>+			reg = &lt;0x0 0x9b480000 0x0 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_video_mem: pil-video@9fc00000 {</div><div class='del'>-			reg = &lt;0x0 0x9fc00000 0x0 0x700000&gt;;</div><div class='add'>+		pil_cdsp0_mem: pil-cdsp0@9b500000 {</div><div class='add'>+			reg = &lt;0x0 0x9b500000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		audio_mdf_mem: audio-mdf-region@ae000000 {</div><div class='del'>-			reg = &lt;0x0 0xae000000 0x0 0x1000000&gt;;</div><div class='add'>+		pil_gpu_mem: pil-gpu@9d300000 {</div><div class='add'>+			reg = &lt;0x0 0x9d300000 0x0 0x2000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		firmware_mem: firmware-region@b0000000 {</div><div class='del'>-			reg = &lt;0x0 0xb0000000 0x0 0x800000&gt;;</div><div class='add'>+		q6_cdsp1_dtb_mem: q6-cdsp1-dtb@9d380000 {</div><div class='add'>+			reg = &lt;0x0 0x9d380000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_cdsp1_mem: pil-cdsp1@9d400000 {</div><div class='add'>+			reg = &lt;0x0 0x9d400000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_cvp_mem: pil-cvp@9f200000 {</div><div class='add'>+			reg = &lt;0x0 0x9f200000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_video_mem: pil-video@9f900000 {</div><div class='add'>+			reg = &lt;0x0 0x9f900000 0x0 0x1000000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		hyptz_reserved_mem: hyptz-reserved@beb00000 {</div><div class='del'>-			reg = &lt;0x0 0xbeb00000 0x0 0x11500000&gt;;</div><div class='add'>+		firmware_mem: firmware-region@b0000000 {</div><div class='add'>+			reg = &lt;0x0 0xb0000000 0x0 0x800000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -682,7 +929,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		trusted_apps_mem: trusted-apps@d1900000 {</div><div class='del'>-			reg = &lt;0x0 0xd1900000 0x0 0x3800000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xd1900000 0x0 0x1c00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -851,6 +1098,28 @@</div><div class='ctx'> 			#mbox-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma2: dma-controller@800000  {</div><div class='add'>+			compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00800000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x5b6 0x0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qupv3_id_2: geniqup@8c0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0x0 0x008c0000 0x0 0x6000&gt;;</div><div class='hunk'>@@ -871,6 +1140,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c14_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -881,6 +1152,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -892,6 +1167,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi14_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -902,6 +1179,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart14: serial@880000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00880000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart14_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -913,6 +1211,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c15_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -923,6 +1223,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -934,6 +1238,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi15_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -944,6 +1250,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart15: serial@884000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00884000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart15_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -955,6 +1282,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c16_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -965,6 +1294,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -974,6 +1307,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi16_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -984,11 +1319,32 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart16: serial@888000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart16_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			i2c17: i2c@88c000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0x0 0x88c000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -997,6 +1353,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c17_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1007,6 +1365,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1018,6 +1380,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi17_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1028,6 +1392,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1037,6 +1405,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart17_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1052,6 +1422,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c18_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1062,6 +1434,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1075,6 +1451,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi18_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1085,6 +1463,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart18: serial@890000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00890000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart18_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1096,6 +1495,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c19_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1106,6 +1507,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1117,6 +1522,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi19_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1127,6 +1534,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart19: serial@894000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00894000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart19_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1138,6 +1566,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c20_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1148,6 +1578,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1159,6 +1593,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi20_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1169,8 +1605,52 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart20: serial@898000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00898000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart20_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma0: dma-controller@900000  {</div><div class='add'>+			compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00900000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x416 0x0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		qupv3_id_0: geniqup@9c0000 {</div><div class='hunk'>@@ -1193,6 +1673,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c0_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1203,6 +1685,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1214,6 +1700,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi0_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1224,6 +1712,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				     &lt;&amp;gpi_dma0 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0: serial@980000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x980000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart0_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1235,6 +1744,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c1_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1245,6 +1756,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1256,6 +1771,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi1_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1266,6 +1783,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: serial@984000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x984000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart1_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1277,6 +1815,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c2_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1287,6 +1827,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1298,6 +1842,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi2_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1308,6 +1854,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@988000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x988000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart2_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1319,6 +1886,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c3_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1329,6 +1898,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1340,6 +1913,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi3_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1350,6 +1925,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: serial@98c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x98c000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart3_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1361,6 +1957,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c4_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1371,6 +1969,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1382,6 +1984,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi4_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1392,6 +1996,27 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@990000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x990000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart4_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1403,6 +2028,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c5_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1413,6 +2040,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1424,6 +2055,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi5_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1434,6 +2067,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1443,6 +2080,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart5_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1453,6 +2092,28 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma1: dma-controller@a00000  {</div><div class='add'>+			compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00a00000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x456 0x0&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qupv3_id_1: geniqup@ac0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0x0 0x00ac0000 0x0 0x6000&gt;;</div><div class='hunk'>@@ -1473,6 +2134,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c7_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1483,6 +2146,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1494,6 +2161,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi7_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1504,6 +2173,28 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@a80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a80000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart7_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1515,6 +2206,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c8_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1525,6 +2218,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1536,6 +2233,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi8_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1546,6 +2245,28 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart8: serial@a84000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart8_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1557,6 +2278,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c9_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1567,6 +2290,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1578,6 +2305,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi9_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1588,6 +2317,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1597,6 +2330,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart9_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1614,6 +2349,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c10_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1624,6 +2361,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1635,6 +2376,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi10_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1645,6 +2388,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1654,6 +2401,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart10_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='hunk'>@@ -1672,6 +2421,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c11_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1682,6 +2433,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1693,6 +2448,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi11_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1703,6 +2460,28 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart11: serial@a90000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a90000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart11_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1714,6 +2493,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c12_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1724,6 +2505,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1735,6 +2520,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi12_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1745,6 +2532,10 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1754,6 +2545,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart12_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1771,6 +2564,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c13_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1781,10 +2576,29 @@</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='add'>+</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma3: dma-controller@b00000  {</div><div class='add'>+			compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00b00000 0x0 0x58000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x056 0x0&gt;;</div><div class='add'>+			dma-channels = &lt;4&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qupv3_id_3: geniqup@bc0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0x0 0xbc0000 0x0 0x6000&gt;;</div><div class='hunk'>@@ -1805,6 +2619,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c21_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						&amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 					   &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1815,6 +2631,10 @@</div><div class='ctx'> 							 "qup-config",</div><div class='ctx'> 							 "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma3 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma3 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1826,6 +2646,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi21_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						&amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='ctx'> 					   &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='hunk'>@@ -1836,6 +2658,28 @@</div><div class='ctx'> 							 "qup-config",</div><div class='ctx'> 							 "qup-memory";</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma3 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma3 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart21: serial@b80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00b80000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart21_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1845,7 +2689,7 @@</div><div class='ctx'> 			reg = &lt;0 0x010d2000 0 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -1908,10 +2752,52 @@</div><div class='ctx'> 		ice: crypto@1d88000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-inline-crypto-engine",</div><div class='ctx'> 				     "qcom,inline-crypto-engine";</div><div class='del'>-			reg = &lt;0x0 0x01d88000 0x0 0x8000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01d88000 0x0 0x18000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01dc4000 0x0 0x28000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;20&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0x00&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0x00&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctcu@4001000 {</div><div class='add'>+			compatible = "qcom,sa8775p-ctcu";</div><div class='add'>+			reg = &lt;0x0 0x04001000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ctcu_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					ctcu_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		stm: stm@4002000 {</div><div class='ctx'> 			compatible = "arm,coresight-stm", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x4002000 0x0 0x1000&gt;,</div><div class='hunk'>@@ -1940,6 +2826,7 @@</div><div class='ctx'> </div><div class='ctx'> 			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='ctx'> 			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2115,6 +3002,122 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		replicator@4046000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04046000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_rep_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;swao_rep_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_rep_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr_rep_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc_etr: tmc@4048000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04048000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x04c0 0x00&gt;;</div><div class='add'>+</div><div class='add'>+			arm,scatter-gather;</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr_rep_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ctcu_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@404e000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0404e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr_rep_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_rep_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					etr_rep_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					etr_rep_out1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr1_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc_etr1: tmc@404f000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0404f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x04a0 0x40&gt;;</div><div class='add'>+</div><div class='add'>+			arm,scatter-gather;</div><div class='add'>+			arm,buffer-size = &lt;0x400000&gt;;</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr1_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etr_rep_out1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etr1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ctcu_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		funnel@4b04000 {</div><div class='ctx'> 			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x4b04000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -2190,6 +3193,14 @@</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					swao_rep_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_rep_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				port@1 {</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> 					swao_rep_out1: endpoint {</div><div class='hunk'>@@ -2382,7 +3393,7 @@</div><div class='ctx'> 		etm@6040000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6040000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2402,7 +3413,7 @@</div><div class='ctx'> 		etm@6140000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6140000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2422,7 +3433,7 @@</div><div class='ctx'> 		etm@6240000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6240000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2442,7 +3453,7 @@</div><div class='ctx'> 		etm@6340000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6340000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2462,7 +3473,7 @@</div><div class='ctx'> 		etm@6440000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6440000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2482,7 +3493,7 @@</div><div class='ctx'> 		etm@6540000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6540000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2502,7 +3513,7 @@</div><div class='ctx'> 		etm@6640000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6640000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2522,7 +3533,7 @@</div><div class='ctx'> 		etm@6740000 {</div><div class='ctx'> 			compatible = "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x0 0x6740000 0x0 0x1000&gt;;</div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2825,6 +3836,58 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdhc: mmc@87c4000 {</div><div class='add'>+			compatible = "qcom,sa8775p-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0x0 0x087c4000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 521 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq",</div><div class='add'>+					  "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_SDC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDC1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc_opp_table&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC1_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1800000 400000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;100000 0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-384000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;384000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;5400000 1600000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;390000 0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_0_hsphy: phy@88e4000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-usb-hs-phy",</div><div class='ctx'> 				     "qcom,usb-snps-hs-5nm-phy";</div><div class='hunk'>@@ -2862,12 +3925,9 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_0: usb@a6f8800 {</div><div class='del'>-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+		usb_0: usb@a600000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a600000 0 0xfc100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='hunk'>@@ -2880,12 +3940,14 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='hunk'>@@ -2902,16 +3964,13 @@</div><div class='ctx'> </div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x080 0x0&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_0_hsphy&gt;, &lt;&amp;usb_0_qmpphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='del'>-			usb_0_dwc3: usb@a600000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a600000 0 0xe000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x080 0x0&gt;;</div><div class='del'>-				phys = &lt;&amp;usb_0_hsphy&gt;, &lt;&amp;usb_0_qmpphy&gt;;</div><div class='del'>-				phy-names = "usb2-phy", "usb3-phy";</div><div class='del'>-			};</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usb_1_hsphy: phy@88e6000 {</div><div class='hunk'>@@ -2951,12 +4010,9 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_1: usb@a8f8800 {</div><div class='del'>-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a8f8800 0 0x400&gt;;</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+		usb_1: usb@a800000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a800000 0 0xfc100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_SEC_MASTER_CLK&gt;,</div><div class='hunk'>@@ -2969,12 +4025,14 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_SEC_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 8 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 7 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='hunk'>@@ -2991,16 +4049,13 @@</div><div class='ctx'> </div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0a0 0x0&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='del'>-			usb_1_dwc3: usb@a800000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a800000 0 0xe000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x0a0 0x0&gt;;</div><div class='del'>-				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy&gt;;</div><div class='del'>-				phy-names = "usb2-phy", "usb3-phy";</div><div class='del'>-			};</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usb_2_hsphy: phy@88e7000 {</div><div class='hunk'>@@ -3016,12 +4071,9 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_2: usb@a4f8800 {</div><div class='del'>-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a4f8800 0 0x400&gt;;</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+		usb_2: usb@a400000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a400000 0 0xfc100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB20_MASTER_CLK&gt;,</div><div class='hunk'>@@ -3034,11 +4086,13 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB20_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 9 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq";</div><div class='hunk'>@@ -3054,16 +4108,13 @@</div><div class='ctx'> </div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x020 0x0&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy";</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='del'>-			usb_2_dwc3: usb@a400000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a400000 0 0xe000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x020 0x0&gt;;</div><div class='del'>-				phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='del'>-				phy-names = "usb2-phy";</div><div class='del'>-			};</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		tcsr_mutex: hwlock@1f40000 {</div><div class='hunk'>@@ -3072,6 +4123,11 @@</div><div class='ctx'> 			#hwlock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		tcsr: syscon@1fc0000 {</div><div class='add'>+			compatible = "qcom,sa8775p-tcsr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x1fc0000 0x0 0x30000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpucc: clock-controller@3d90000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-gpucc";</div><div class='ctx'> 			reg = &lt;0x0 0x03d90000 0x0 0xa000&gt;;</div><div class='hunk'>@@ -3254,6 +4310,963 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		iris: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,sa8775p-iris", "qcom,sm8550-iris";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x0aa00000 0x0 0xf0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VIDEO_CC_MVS0C_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VIDEO_CC_MVS0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "mmcx";</div><div class='add'>+			operating-points-v2 = &lt;&amp;iris_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "vcodec0_core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "cpu-cfg",</div><div class='add'>+					     "video-mem";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;pil_video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "bus";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0880 0x0400&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x0887 0x0400&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			iris_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-366000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-444000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;444000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-533000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;533000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-560000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;560000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		videocc: clock-controller@abf0000 {</div><div class='add'>+			compatible = "qcom,sa8775p-videocc";</div><div class='add'>+			reg = &lt;0x0 0x0abf0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cci0: cci@ac13000 {</div><div class='add'>+			compatible = "qcom,sa8775p-cci", "qcom,msm8996-cci";</div><div class='add'>+			reg = &lt;0x0 0x0ac13000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 460 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CCI_0_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cci";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci0_0_default &amp;cci0_1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;cci0_0_sleep &amp;cci0_1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci0_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cci1: cci@ac14000 {</div><div class='add'>+			compatible = "qcom,sa8775p-cci", "qcom,msm8996-cci";</div><div class='add'>+			reg = &lt;0x0 0x0ac14000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 271 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CCI_1_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cci";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci1_0_default &amp;cci1_1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;cci1_0_sleep &amp;cci1_1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci1_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cci2: cci@ac15000 {</div><div class='add'>+			compatible = "qcom,sa8775p-cci", "qcom,msm8996-cci";</div><div class='add'>+			reg = &lt;0x0 0x0ac15000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 651 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CCI_2_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cci";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci2_0_default &amp;cci2_1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;cci2_0_sleep &amp;cci2_1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci2_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci2_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cci3: cci@ac16000 {</div><div class='add'>+			compatible = "qcom,sa8775p-cci", "qcom,msm8996-cci";</div><div class='add'>+			reg = &lt;0x0 0x0ac16000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 771 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CCI_3_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cci";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci3_0_default &amp;cci3_1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;cci3_0_sleep &amp;cci3_1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci3_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci3_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camss: isp@ac78000 {</div><div class='add'>+			compatible = "qcom,sa8775p-camss";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0xac78000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0xac7a000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac7c000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac84000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac88000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac8c000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac90000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac94000 0x0 0x0f00&gt;,</div><div class='add'>+			      &lt;0x0 0xac9c000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xac9e000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xaca0000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xaca2000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xacac000 0x0 0x0400&gt;,</div><div class='add'>+			      &lt;0x0 0xacad000 0x0 0x0400&gt;,</div><div class='add'>+			      &lt;0x0 0xacae000 0x0 0x0400&gt;,</div><div class='add'>+			      &lt;0x0 0xac4d000 0x0 0xd000&gt;,</div><div class='add'>+			      &lt;0x0 0xac5a000 0x0 0xd000&gt;,</div><div class='add'>+			      &lt;0x0 0xac85000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0xac89000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0xac8d000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0xac91000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0xac95000 0x0 0x0d00&gt;;</div><div class='add'>+			reg-names = "csid_wrapper",</div><div class='add'>+				    "csid0",</div><div class='add'>+				    "csid1",</div><div class='add'>+				    "csid_lite0",</div><div class='add'>+				    "csid_lite1",</div><div class='add'>+				    "csid_lite2",</div><div class='add'>+				    "csid_lite3",</div><div class='add'>+				    "csid_lite4",</div><div class='add'>+				    "csiphy0",</div><div class='add'>+				    "csiphy1",</div><div class='add'>+				    "csiphy2",</div><div class='add'>+				    "csiphy3",</div><div class='add'>+				    "tpg0",</div><div class='add'>+				    "tpg1",</div><div class='add'>+				    "tpg2",</div><div class='add'>+				    "vfe0",</div><div class='add'>+				    "vfe1",</div><div class='add'>+				    "vfe_lite0",</div><div class='add'>+				    "vfe_lite1",</div><div class='add'>+				    "vfe_lite2",</div><div class='add'>+				    "vfe_lite3",</div><div class='add'>+				    "vfe_lite4";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CORE_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_LITE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI2PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY3_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI3PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSID_CSIPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_SF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_ICP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CSID_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "core_ahb",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cpas_fast_ahb_clk",</div><div class='add'>+				      "cpas_vfe_lite",</div><div class='add'>+				      "cpas_vfe0",</div><div class='add'>+				      "cpas_vfe1",</div><div class='add'>+				      "csid",</div><div class='add'>+				      "csiphy0",</div><div class='add'>+				      "csiphy0_timer",</div><div class='add'>+				      "csiphy1",</div><div class='add'>+				      "csiphy1_timer",</div><div class='add'>+				      "csiphy2",</div><div class='add'>+				      "csiphy2_timer",</div><div class='add'>+				      "csiphy3",</div><div class='add'>+				      "csiphy3_timer",</div><div class='add'>+				      "csiphy_rx",</div><div class='add'>+				      "gcc_axi_hf",</div><div class='add'>+				      "gcc_axi_sf",</div><div class='add'>+				      "icp_ahb",</div><div class='add'>+				      "vfe0",</div><div class='add'>+				      "vfe0_fast_ahb",</div><div class='add'>+				      "vfe1",</div><div class='add'>+				      "vfe1_fast_ahb",</div><div class='add'>+				      "vfe_lite",</div><div class='add'>+				      "vfe_lite_ahb",</div><div class='add'>+				      "vfe_lite_cphy_rx",</div><div class='add'>+				      "vfe_lite_csid";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 565 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 564 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 359 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 759 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 758 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 604 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 545 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 546 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 547 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 360 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 761 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 760 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 605 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "csid0",</div><div class='add'>+					  "csid1",</div><div class='add'>+					  "csid_lite0",</div><div class='add'>+					  "csid_lite1",</div><div class='add'>+					  "csid_lite2",</div><div class='add'>+					  "csid_lite3",</div><div class='add'>+					  "csid_lite4",</div><div class='add'>+					  "csiphy0",</div><div class='add'>+					  "csiphy1",</div><div class='add'>+					  "csiphy2",</div><div class='add'>+					  "csiphy3",</div><div class='add'>+					  "tpg0",</div><div class='add'>+					  "tpg1",</div><div class='add'>+					  "tpg2",</div><div class='add'>+					  "vfe0",</div><div class='add'>+					  "vfe1",</div><div class='add'>+					  "vfe_lite0",</div><div class='add'>+					  "vfe_lite1",</div><div class='add'>+					  "vfe_lite2",</div><div class='add'>+					  "vfe_lite3",</div><div class='add'>+					  "vfe_lite4";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "ahb",</div><div class='add'>+					     "hf_0";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x3400 0x20&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+			power-domain-names = "top";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camcc: clock-controller@ade0000 {</div><div class='add'>+			compatible = "qcom,sa8775p-camcc";</div><div class='add'>+			reg = &lt;0x0 0x0ade0000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdss0: display-subsystem@ae00000 {</div><div class='add'>+			compatible = "qcom,sa8775p-mdss";</div><div class='add'>+			reg = &lt;0x0 0x0ae00000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+			/* same path used twice */</div><div class='add'>+			interconnects = &lt;&amp;mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "mdp0-mem",</div><div class='add'>+					     "mdp1-mem",</div><div class='add'>+					     "cpu-cfg";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1000 0x402&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdss0_mdp: display-controller@ae01000 {</div><div class='add'>+				compatible = "qcom,sa8775p-dpu";</div><div class='add'>+				reg = &lt;0x0 0x0ae01000 0x0 0x8f000&gt;,</div><div class='add'>+				      &lt;0x0 0x0aeb0000 0x0 0x3000&gt;;</div><div class='add'>+				reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+				clock-names = "nrt_bus",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "lut",</div><div class='add'>+					      "core",</div><div class='add'>+					      "vsync";</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss0_mdp_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf0_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dp0_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf4_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dp1_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf1_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dsi0_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@3 {</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf2_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss0_dsi1_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdss0_mdp_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-375000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-500000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-575000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;575000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-650000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;650000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_turbo_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dsi0: dsi@ae94000 {</div><div class='add'>+				compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+				reg = &lt;0x0 0x0ae94000 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+				clock-names = "byte",</div><div class='add'>+					      "byte_intf",</div><div class='add'>+					      "pixel",</div><div class='add'>+					      "core",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "bus";</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss0_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+				phys = &lt;&amp;mdss0_dsi0_phy&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dsi0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dsi0_out: endpoint{ };</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdss_dsi_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-358000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dsi0_phy: phy@ae94400 {</div><div class='add'>+				compatible = "qcom,sa8775p-dsi-phy-5nm";</div><div class='add'>+				reg = &lt;0x0 0x0ae94400 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae94600 0x0 0x280&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae94900 0x0 0x27c&gt;;</div><div class='add'>+				reg-names = "dsi_phy",</div><div class='add'>+					    "dsi_phy_lane",</div><div class='add'>+					    "dsi_pll";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dsi1: dsi@ae96000 {</div><div class='add'>+				compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+				reg = &lt;0x0 0x0ae96000 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+				interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+				clock-names = "byte",</div><div class='add'>+					      "byte_intf",</div><div class='add'>+					      "pixel",</div><div class='add'>+					      "core",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "bus";</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss0_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+				phys = &lt;&amp;mdss0_dsi1_phy&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dsi1_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dsi1_out: endpoint { };</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dsi1_phy: phy@ae96400 {</div><div class='add'>+				compatible = "qcom,sa8775p-dsi-phy-5nm";</div><div class='add'>+				reg = &lt;0x0 0x0ae96400 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae96600 0x0 0x280&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae96900 0x0 0x27c&gt;;</div><div class='add'>+				reg-names = "dsi_phy",</div><div class='add'>+					    "dsi_phy_lane",</div><div class='add'>+					    "dsi_pll";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dp0_phy: phy@aec2a00 {</div><div class='add'>+				compatible = "qcom,sa8775p-edp-phy";</div><div class='add'>+</div><div class='add'>+				reg = &lt;0x0 0x0aec2a00 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec2200 0x0 0xd0&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec2600 0x0 0xd0&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec2000 0x0 0x1c8&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;;</div><div class='add'>+				clock-names = "aux",</div><div class='add'>+					      "cfg_ahb";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dp1_phy: phy@aec5a00 {</div><div class='add'>+				compatible = "qcom,sa8775p-edp-phy";</div><div class='add'>+</div><div class='add'>+				reg = &lt;0x0 0x0aec5a00 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec5200 0x0 0xd0&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec5600 0x0 0xd0&gt;,</div><div class='add'>+				      &lt;0x0 0x0aec5000 0x0 0x1c8&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;;</div><div class='add'>+				clock-names = "aux",</div><div class='add'>+					      "cfg_ahb";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dp0: displayport-controller@af54000 {</div><div class='add'>+				compatible = "qcom,sa8775p-dp";</div><div class='add'>+</div><div class='add'>+				reg = &lt;0x0 0x0af54000 0x0 0x104&gt;,</div><div class='add'>+				      &lt;0x0 0x0af54200 0x0 0x0c0&gt;,</div><div class='add'>+				      &lt;0x0 0x0af55000 0x0 0x770&gt;,</div><div class='add'>+				      &lt;0x0 0x0af56000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af57000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af58000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af59000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5a000 0x0 0x23c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5b000 0x0 0x23c&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+				interrupts = &lt;12&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK&gt;;</div><div class='add'>+				clock-names = "core_iface",</div><div class='add'>+					      "core_aux",</div><div class='add'>+					      "ctrl_link",</div><div class='add'>+					      "ctrl_link_iface",</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel",</div><div class='add'>+					      "stream_2_pixel",</div><div class='add'>+					      "stream_3_pixel";</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss0_dp0_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp0_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp0_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp0_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp0_phy 1&gt;;</div><div class='add'>+				phys = &lt;&amp;mdss0_dp0_phy&gt;;</div><div class='add'>+				phy-names = "dp";</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp0_out: endpoint { };</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dp_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-160000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-270000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-540000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-810000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss0_dp1: displayport-controller@af5c000 {</div><div class='add'>+				compatible = "qcom,sa8775p-dp";</div><div class='add'>+</div><div class='add'>+				reg = &lt;0x0 0x0af5c000 0x0 0x104&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5c200 0x0 0x0c0&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5d000 0x0 0x770&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5e000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af5f000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af60000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af61000 0x0 0x09c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af62000 0x0 0x23c&gt;,</div><div class='add'>+				      &lt;0x0 0x0af63000 0x0 0x23c&gt;;</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+				interrupts = &lt;13&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK&gt;;</div><div class='add'>+				clock-names = "core_iface",</div><div class='add'>+					      "core_aux",</div><div class='add'>+					      "ctrl_link",</div><div class='add'>+					      "ctrl_link_iface",</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 MDSS_DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss0_dp1_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp1_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp1_phy 1&gt;;</div><div class='add'>+				phys = &lt;&amp;mdss0_dp1_phy&gt;;</div><div class='add'>+				phy-names = "dp";</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;dp1_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp1_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf4_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp1_out: endpoint { };</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dp1_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-160000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-270000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-540000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-810000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dispcc0: clock-controller@af00000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dispcc0";</div><div class='add'>+			reg = &lt;0x0 0x0af00000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dp0_phy 0&gt;, &lt;&amp;mdss0_dp0_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dp1_phy 0&gt;, &lt;&amp;mdss0_dp1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss0_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pdc: interrupt-controller@b220000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-pdc", "qcom,pdc";</div><div class='ctx'> 			reg = &lt;0x0 0x0b220000 0x0 0x30000&gt;,</div><div class='hunk'>@@ -3392,6 +5405,812 @@</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			gpio-ranges = &lt;&amp;tlmm 0 0 149&gt;;</div><div class='ctx'> 			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+			dp0_hot_plug_det: dp0-hot-plug-det-state {</div><div class='add'>+				pins = "gpio101";</div><div class='add'>+				function = "edp0_hot";</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dp1_hot_plug_det: dp1-hot-plug-det-state {</div><div class='add'>+				pins = "gpio102";</div><div class='add'>+				function = "edp1_hot";</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hs0_mi2s_active: hs0-mi2s-active-state {</div><div class='add'>+				pins = "gpio114", "gpio115", "gpio116", "gpio117";</div><div class='add'>+				function = "hs0_mi2s";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hs2_mi2s_active: hs2-mi2s-active-state {</div><div class='add'>+				pins = "gpio122", "gpio123", "gpio124", "gpio125";</div><div class='add'>+				function = "hs2_mi2s";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_0_default: cci0-0-default-state {</div><div class='add'>+				pins = "gpio60", "gpio61";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_0_sleep: cci0-0-sleep-state {</div><div class='add'>+				pins = "gpio60", "gpio61";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_1_default: cci0-1-default-state {</div><div class='add'>+				pins = "gpio52", "gpio53";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_1_sleep: cci0-1-sleep-state {</div><div class='add'>+				pins = "gpio52", "gpio53";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_0_default: cci1-0-default-state {</div><div class='add'>+				pins = "gpio62", "gpio63";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_0_sleep: cci1-0-sleep-state {</div><div class='add'>+				pins = "gpio62", "gpio63";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_1_default: cci1-1-default-state {</div><div class='add'>+				pins = "gpio54", "gpio55";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_1_sleep: cci1-1-sleep-state {</div><div class='add'>+				pins = "gpio54", "gpio55";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci2_0_default: cci2-0-default-state {</div><div class='add'>+				pins = "gpio64", "gpio65";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci2_0_sleep: cci2-0-sleep-state {</div><div class='add'>+				pins = "gpio64", "gpio65";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci2_1_default: cci2-1-default-state {</div><div class='add'>+				pins = "gpio56", "gpio57";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci2_1_sleep: cci2-1-sleep-state {</div><div class='add'>+				pins = "gpio56", "gpio57";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci3_0_default: cci3-0-default-state {</div><div class='add'>+				pins = "gpio66", "gpio67";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci3_0_sleep: cci3-0-sleep-state {</div><div class='add'>+				pins = "gpio66", "gpio67";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci3_1_default: cci3-1-default-state {</div><div class='add'>+				pins = "gpio58", "gpio59";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up = &lt;2200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci3_1_sleep: cci3-1-sleep-state {</div><div class='add'>+				pins = "gpio58", "gpio59";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c0_default: qup-i2c0-state {</div><div class='add'>+				pins = "gpio20", "gpio21";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c1_default: qup-i2c1-state {</div><div class='add'>+				pins = "gpio24", "gpio25";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c2_default: qup-i2c2-state {</div><div class='add'>+				pins = "gpio36", "gpio37";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c3_default: qup-i2c3-state {</div><div class='add'>+				pins = "gpio28", "gpio29";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c4_default: qup-i2c4-state {</div><div class='add'>+				pins = "gpio32", "gpio33";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c5_default: qup-i2c5-state {</div><div class='add'>+				pins = "gpio36", "gpio37";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c7_default: qup-i2c7-state {</div><div class='add'>+				pins = "gpio40", "gpio41";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c8_default: qup-i2c8-state {</div><div class='add'>+				pins = "gpio42", "gpio43";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c9_default: qup-i2c9-state {</div><div class='add'>+				pins = "gpio46", "gpio47";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c10_default: qup-i2c10-state {</div><div class='add'>+				pins = "gpio44", "gpio45";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c11_default: qup-i2c11-state {</div><div class='add'>+				pins = "gpio48", "gpio49";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c12_default: qup-i2c12-state {</div><div class='add'>+				pins = "gpio52", "gpio53";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c13_default: qup-i2c13-state {</div><div class='add'>+				pins = "gpio56", "gpio57";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c14_default: qup-i2c14-state {</div><div class='add'>+				pins = "gpio80", "gpio81";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c15_default: qup-i2c15-state {</div><div class='add'>+				pins = "gpio84", "gpio85";</div><div class='add'>+				function = "qup2_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c16_default: qup-i2c16-state {</div><div class='add'>+				pins = "gpio86", "gpio87";</div><div class='add'>+				function = "qup2_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c17_default: qup-i2c17-state {</div><div class='add'>+				pins = "gpio91", "gpio92";</div><div class='add'>+				function = "qup2_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c18_default: qup-i2c18-state {</div><div class='add'>+				pins = "gpio95", "gpio96";</div><div class='add'>+				function = "qup2_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c19_default: qup-i2c19-state {</div><div class='add'>+				pins = "gpio99", "gpio100";</div><div class='add'>+				function = "qup2_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c20_default: qup-i2c20-state {</div><div class='add'>+				pins = "gpio97", "gpio98";</div><div class='add'>+				function = "qup2_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c21_default: qup-i2c21-state {</div><div class='add'>+				pins = "gpio13", "gpio14";</div><div class='add'>+				function = "qup3_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_default: qup-spi0-state {</div><div class='add'>+				pins = "gpio20", "gpio21", "gpio22", "gpio23";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_default: qup-spi1-state {</div><div class='add'>+				pins = "gpio24", "gpio25", "gpio26", "gpio27";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_default: qup-spi2-state {</div><div class='add'>+				pins = "gpio36", "gpio37", "gpio38", "gpio39";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_default: qup-spi3-state {</div><div class='add'>+				pins = "gpio28", "gpio29", "gpio30", "gpio31";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_default: qup-spi4-state {</div><div class='add'>+				pins = "gpio32", "gpio33", "gpio34", "gpio35";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_default: qup-spi5-state {</div><div class='add'>+				pins = "gpio36", "gpio37", "gpio38", "gpio39";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_default: qup-spi7-state {</div><div class='add'>+				pins = "gpio40", "gpio41", "gpio42", "gpio43";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_default: qup-spi8-state {</div><div class='add'>+				pins = "gpio42", "gpio43", "gpio40", "gpio41";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_default: qup-spi9-state {</div><div class='add'>+				pins = "gpio46", "gpio47", "gpio44", "gpio45";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_default: qup-spi10-state {</div><div class='add'>+				pins = "gpio44", "gpio45", "gpio46", "gpio47";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi11_default: qup-spi11-state {</div><div class='add'>+				pins = "gpio48", "gpio49", "gpio50", "gpio51";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_default: qup-spi12-state {</div><div class='add'>+				pins = "gpio52", "gpio53", "gpio54", "gpio55";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi14_default: qup-spi14-state {</div><div class='add'>+				pins = "gpio80", "gpio81", "gpio82", "gpio83";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_default: qup-spi15-state {</div><div class='add'>+				pins = "gpio84", "gpio85", "gpio99", "gpio100";</div><div class='add'>+				function = "qup2_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi16_default: qup-spi16-state {</div><div class='add'>+				pins = "gpio86", "gpio87", "gpio88", "gpio89";</div><div class='add'>+				function = "qup2_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi17_default: qup-spi17-state {</div><div class='add'>+				pins = "gpio91", "gpio92", "gpio93", "gpio94";</div><div class='add'>+				function = "qup2_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi18_default: qup-spi18-state {</div><div class='add'>+				pins = "gpio95", "gpio96", "gpio97", "gpio98";</div><div class='add'>+				function = "qup2_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi19_default: qup-spi19-state {</div><div class='add'>+				pins = "gpio99", "gpio100", "gpio84", "gpio85";</div><div class='add'>+				function = "qup2_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi20_default: qup-spi20-state {</div><div class='add'>+				pins = "gpio97", "gpio98", "gpio95", "gpio96";</div><div class='add'>+				function = "qup2_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi21_default: qup-spi21-state {</div><div class='add'>+				pins = "gpio13", "gpio14", "gpio15", "gpio16";</div><div class='add'>+				function = "qup3_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_default: qup-uart0-state {</div><div class='add'>+				qup_uart0_cts: qup-uart0-cts-pins {</div><div class='add'>+					pins = "gpio20";</div><div class='add'>+					function = "qup0_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart0_rts: qup-uart0-rts-pins {</div><div class='add'>+					pins = "gpio21";</div><div class='add'>+					function = "qup0_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart0_tx: qup-uart0-tx-pins {</div><div class='add'>+					pins = "gpio22";</div><div class='add'>+					function = "qup0_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart0_rx: qup-uart0-rx-pins {</div><div class='add'>+					pins = "gpio23";</div><div class='add'>+					function = "qup0_se0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart1_default: qup-uart1-state {</div><div class='add'>+				qup_uart1_cts: qup-uart1-cts-pins {</div><div class='add'>+					pins = "gpio24";</div><div class='add'>+					function = "qup0_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart1_rts: qup-uart1-rts-pins {</div><div class='add'>+					pins = "gpio25";</div><div class='add'>+					function = "qup0_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart1_tx: qup-uart1-tx-pins {</div><div class='add'>+					pins = "gpio26";</div><div class='add'>+					function = "qup0_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart1_rx: qup-uart1-rx-pins {</div><div class='add'>+					pins = "gpio27";</div><div class='add'>+					function = "qup0_se1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_default: qup-uart2-state {</div><div class='add'>+				qup_uart2_cts: qup-uart2-cts-pins {</div><div class='add'>+					pins = "gpio36";</div><div class='add'>+					function = "qup0_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart2_rts: qup-uart2-rts-pins {</div><div class='add'>+					pins = "gpio37";</div><div class='add'>+					function = "qup0_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart2_tx: qup-uart2-tx-pins {</div><div class='add'>+					pins = "gpio38";</div><div class='add'>+					function = "qup0_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart2_rx: qup-uart2-rx-pins {</div><div class='add'>+					pins = "gpio39";</div><div class='add'>+					function = "qup0_se2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart3_default: qup-uart3-state {</div><div class='add'>+				qup_uart3_cts: qup-uart3-cts-pins {</div><div class='add'>+					pins = "gpio28";</div><div class='add'>+					function = "qup0_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart3_rts: qup-uart3-rts-pins {</div><div class='add'>+					pins = "gpio29";</div><div class='add'>+					function = "qup0_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart3_tx: qup-uart3-tx-pins {</div><div class='add'>+					pins = "gpio30";</div><div class='add'>+					function = "qup0_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart3_rx: qup-uart3-rx-pins {</div><div class='add'>+					pins = "gpio31";</div><div class='add'>+					function = "qup0_se3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_default: qup-uart4-state {</div><div class='add'>+				qup_uart4_cts: qup-uart4-cts-pins {</div><div class='add'>+					pins = "gpio32";</div><div class='add'>+					function = "qup0_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart4_rts: qup-uart4-rts-pins {</div><div class='add'>+					pins = "gpio33";</div><div class='add'>+					function = "qup0_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart4_tx: qup-uart4-tx-pins {</div><div class='add'>+					pins = "gpio34";</div><div class='add'>+					function = "qup0_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart4_rx: qup-uart4-rx-pins {</div><div class='add'>+					pins = "gpio35";</div><div class='add'>+					function = "qup0_se4";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart5_default: qup-uart5-state {</div><div class='add'>+				qup_uart5_cts: qup-uart5-cts-pins {</div><div class='add'>+					pins = "gpio36";</div><div class='add'>+					function = "qup0_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart5_rts: qup-uart5-rts-pins {</div><div class='add'>+					pins = "gpio37";</div><div class='add'>+					function = "qup0_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart5_tx: qup-uart5-tx-pins {</div><div class='add'>+					pins = "gpio38";</div><div class='add'>+					function = "qup0_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart5_rx: qup-uart5-rx-pins {</div><div class='add'>+					pins = "gpio39";</div><div class='add'>+					function = "qup0_se5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_default: qup-uart7-state {</div><div class='add'>+				qup_uart7_cts: qup-uart7-cts-pins {</div><div class='add'>+					pins = "gpio40";</div><div class='add'>+					function = "qup1_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart7_rts: qup-uart7-rts-pins {</div><div class='add'>+					pins = "gpio41";</div><div class='add'>+					function = "qup1_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart7_tx: qup-uart7-tx-pins {</div><div class='add'>+					pins = "gpio42";</div><div class='add'>+					function = "qup1_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart7_rx: qup-uart7-rx-pins {</div><div class='add'>+					pins = "gpio43";</div><div class='add'>+					function = "qup1_se0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart8_default: qup-uart8-state {</div><div class='add'>+				qup_uart8_cts: qup-uart8-cts-pins {</div><div class='add'>+					pins = "gpio42";</div><div class='add'>+					function = "qup1_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart8_rts: qup-uart8-rts-pins {</div><div class='add'>+					pins = "gpio43";</div><div class='add'>+					function = "qup1_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart8_tx: qup-uart8-tx-pins {</div><div class='add'>+					pins = "gpio40";</div><div class='add'>+					function = "qup1_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart8_rx: qup-uart8-rx-pins {</div><div class='add'>+					pins = "gpio41";</div><div class='add'>+					function = "qup1_se1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart9_default: qup-uart9-state {</div><div class='add'>+				qup_uart9_cts: qup-uart9-cts-pins {</div><div class='add'>+					pins = "gpio46";</div><div class='add'>+					function = "qup1_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart9_rts: qup-uart9-rts-pins {</div><div class='add'>+					pins = "gpio47";</div><div class='add'>+					function = "qup1_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart9_tx: qup-uart9-tx-pins {</div><div class='add'>+					pins = "gpio44";</div><div class='add'>+					function = "qup1_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart9_rx: qup-uart9-rx-pins {</div><div class='add'>+					pins = "gpio45";</div><div class='add'>+					function = "qup1_se2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart10_default: qup-uart10-state {</div><div class='add'>+				pins = "gpio46", "gpio47";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart11_default: qup-uart11-state {</div><div class='add'>+				qup_uart11_cts: qup-uart11-cts-pins {</div><div class='add'>+					pins = "gpio48";</div><div class='add'>+					function = "qup1_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart11_rts: qup-uart11-rts-pins {</div><div class='add'>+					pins = "gpio49";</div><div class='add'>+					function = "qup1_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart11_tx: qup-uart11-tx-pins {</div><div class='add'>+					pins = "gpio50";</div><div class='add'>+					function = "qup1_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart11_rx: qup-uart11-rx-pins {</div><div class='add'>+					pins = "gpio51";</div><div class='add'>+					function = "qup1_se4";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart12_default: qup-uart12-state {</div><div class='add'>+				qup_uart12_cts: qup-uart12-cts-pins {</div><div class='add'>+					pins = "gpio52";</div><div class='add'>+					function = "qup1_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart12_rts: qup-uart12-rts-pins {</div><div class='add'>+					pins = "gpio53";</div><div class='add'>+					function = "qup1_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart12_tx: qup-uart12-tx-pins {</div><div class='add'>+					pins = "gpio54";</div><div class='add'>+					function = "qup1_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart12_rx: qup-uart12-rx-pins {</div><div class='add'>+					pins = "gpio55";</div><div class='add'>+					function = "qup1_se5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_default: qup-uart14-state {</div><div class='add'>+				qup_uart14_cts: qup-uart14-cts-pins {</div><div class='add'>+					pins = "gpio80";</div><div class='add'>+					function = "qup2_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart14_rts: qup-uart14-rts-pins {</div><div class='add'>+					pins = "gpio81";</div><div class='add'>+					function = "qup2_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart14_tx: qup-uart14-tx-pins {</div><div class='add'>+					pins = "gpio82";</div><div class='add'>+					function = "qup2_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart14_rx: qup-uart14-rx-pins {</div><div class='add'>+					pins = "gpio83";</div><div class='add'>+					function = "qup2_se0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart15_default: qup-uart15-state {</div><div class='add'>+				qup_uart15_cts: qup-uart15-cts-pins {</div><div class='add'>+					pins = "gpio84";</div><div class='add'>+					function = "qup2_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart15_rts: qup-uart15-rts-pins {</div><div class='add'>+					pins = "gpio85";</div><div class='add'>+					function = "qup2_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart15_tx: qup-uart15-tx-pins {</div><div class='add'>+					pins = "gpio99";</div><div class='add'>+					function = "qup2_se1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart15_rx: qup-uart15-rx-pins {</div><div class='add'>+					pins = "gpio100";</div><div class='add'>+					function = "qup2_se1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart16_default: qup-uart16-state {</div><div class='add'>+				qup_uart16_cts: qup-uart16-cts-pins {</div><div class='add'>+					pins = "gpio86";</div><div class='add'>+					function = "qup2_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart16_rts: qup-uart16-rts-pins {</div><div class='add'>+					pins = "gpio87";</div><div class='add'>+					function = "qup2_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart16_tx: qup-uart16-tx-pins {</div><div class='add'>+					pins = "gpio88";</div><div class='add'>+					function = "qup2_se2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart16_rx: qup-uart16-rx-pins {</div><div class='add'>+					pins = "gpio89";</div><div class='add'>+					function = "qup2_se2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart17_default: qup-uart17-state {</div><div class='add'>+				qup_uart17_cts: qup-uart17-cts-pins {</div><div class='add'>+					pins = "gpio91";</div><div class='add'>+					function = "qup2_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart17_rts: qup0-uart17-rts-pins {</div><div class='add'>+					pins = "gpio92";</div><div class='add'>+					function = "qup2_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart17_tx: qup0-uart17-tx-pins {</div><div class='add'>+					pins = "gpio93";</div><div class='add'>+					function = "qup2_se3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart17_rx: qup0-uart17-rx-pins {</div><div class='add'>+					pins = "gpio94";</div><div class='add'>+					function = "qup2_se3";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart18_default: qup-uart18-state {</div><div class='add'>+				qup_uart18_cts: qup-uart18-cts-pins {</div><div class='add'>+					pins = "gpio95";</div><div class='add'>+					function = "qup2_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart18_rts: qup-uart18-rts-pins {</div><div class='add'>+					pins = "gpio96";</div><div class='add'>+					function = "qup2_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart18_tx: qup-uart18-tx-pins {</div><div class='add'>+					pins = "gpio97";</div><div class='add'>+					function = "qup2_se4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart18_rx: qup-uart18-rx-pins {</div><div class='add'>+					pins = "gpio98";</div><div class='add'>+					function = "qup2_se4";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart19_default: qup-uart19-state {</div><div class='add'>+				qup_uart19_cts: qup-uart19-cts-pins {</div><div class='add'>+					pins = "gpio99";</div><div class='add'>+					function = "qup2_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart19_rts: qup-uart19-rts-pins {</div><div class='add'>+					pins = "gpio100";</div><div class='add'>+					function = "qup2_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart19_tx: qup-uart19-tx-pins {</div><div class='add'>+					pins = "gpio84";</div><div class='add'>+					function = "qup2_se5";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart19_rx: qup-uart19-rx-pins {</div><div class='add'>+					pins = "gpio85";</div><div class='add'>+					function = "qup2_se5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart20_default: qup-uart20-state {</div><div class='add'>+				qup_uart20_cts: qup-uart20-cts-pins {</div><div class='add'>+					pins = "gpio97";</div><div class='add'>+					function = "qup2_se6";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart20_rts: qup-uart20-rts-pins {</div><div class='add'>+					pins = "gpio98";</div><div class='add'>+					function = "qup2_se6";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart20_tx: qup-uart20-tx-pins {</div><div class='add'>+					pins = "gpio95";</div><div class='add'>+					function = "qup2_se6";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart20_rx: qup-uart20-rx-pins {</div><div class='add'>+					pins = "gpio96";</div><div class='add'>+					function = "qup2_se6";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart21_default: qup-uart21-state {</div><div class='add'>+				qup_uart21_cts: qup-uart21-cts-pins {</div><div class='add'>+					pins = "gpio13";</div><div class='add'>+					function = "qup3_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart21_rts: qup-uart21-rts-pins {</div><div class='add'>+					pins = "gpio14";</div><div class='add'>+					function = "qup3_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart21_tx: qup-uart21-tx-pins {</div><div class='add'>+					pins = "gpio15";</div><div class='add'>+					function = "qup3_se0";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				qup_uart21_rx: qup-uart21-rx-pins {</div><div class='add'>+					pins = "gpio16";</div><div class='add'>+					function = "qup3_se0";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc_default: sdc-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc_sleep: sdc-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram: sram@146d8000 {</div><div class='hunk'>@@ -3627,6 +6446,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,     /* GICD */</div><div class='ctx'> 			      &lt;0x0 0x17a60000 0x0 0x100000&gt;;    /* GICR * 8 */</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='hunk'>@@ -3714,6 +6534,7 @@</div><div class='ctx'> 					  &lt;WAKE_TCS 3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 0&gt;;</div><div class='ctx'> 			label = "apps_rsc";</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -3777,6 +6598,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		epss_l3_cl0: interconnect@18590000 {</div><div class='add'>+			compatible = "qcom,sa8775p-epss-l3",</div><div class='add'>+				     "qcom,epss-l3";</div><div class='add'>+			reg = &lt;0x0 0x18590000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpufreq_hw: cpufreq@18591000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-cpufreq-epss",</div><div class='ctx'> 				     "qcom,cpufreq-epss";</div><div class='hunk'>@@ -3784,20 +6614,33 @@</div><div class='ctx'> 			      &lt;0x0 0x18593000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "freq-domain0", "freq-domain1";</div><div class='ctx'> </div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";</div><div class='add'>+</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='ctx'> 			clock-names = "xo", "alternate";</div><div class='ctx'> </div><div class='ctx'> 			#freq-domain-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		epss_l3_cl1: interconnect@18592000 {</div><div class='add'>+			compatible = "qcom,sa8775p-epss-l3",</div><div class='add'>+				     "qcom,epss-l3";</div><div class='add'>+			reg = &lt;0x0 0x18592000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		remoteproc_gpdsp0: remoteproc@20c00000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-gpdsp0-pas";</div><div class='ctx'> 			reg = &lt;0x0 0x20c00000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp0_in 0 0&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_gpdsp0_in 2 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp0_in 1 0&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp0_in 2 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp0_in 3 0&gt;;</div><div class='ctx'> 			interrupt-names = "wdog", "fatal", "ready",</div><div class='ctx'> 					  "handover", "stop-ack";</div><div class='hunk'>@@ -3805,8 +6648,8 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MXC&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mxc";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;gpdsp_anoc MASTER_DSP0 0</div><div class='hunk'>@@ -3830,6 +6673,35 @@</div><div class='ctx'> </div><div class='ctx'> 				label = "gpdsp0";</div><div class='ctx'> 				qcom,remote-pid = &lt;17&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "gdsp0";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38a1 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38a2 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38a3 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3839,8 +6711,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp1_in 0 0&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_gpdsp1_in 2 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp1_in 1 0&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp1_in 2 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_gpdsp1_in 3 0&gt;;</div><div class='ctx'> 			interrupt-names = "wdog", "fatal", "ready",</div><div class='ctx'> 					  "handover", "stop-ack";</div><div class='hunk'>@@ -3848,8 +6720,8 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MXC&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mxc";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;gpdsp_anoc MASTER_DSP1 0</div><div class='hunk'>@@ -3873,9 +6745,54 @@</div><div class='ctx'> </div><div class='ctx'> 				label = "gpdsp1";</div><div class='ctx'> 				qcom,remote-pid = &lt;18&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "gdsp1";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38c1 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38c2 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x38c3 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dispcc1: clock-controller@22100000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dispcc1";</div><div class='add'>+			reg = &lt;0x0 0x22100000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ethernet1: ethernet@23000000 {</div><div class='ctx'> 			compatible = "qcom,sa8775p-ethqos";</div><div class='ctx'> 			reg = &lt;0x0 0x23000000 0x0 0x10000&gt;,</div><div class='hunk'>@@ -3964,8 +6881,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp0_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp0_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp0_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp0_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp0_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "wdog", "fatal", "ready",</div><div class='ctx'> 					  "handover", "stop-ack";</div><div class='hunk'>@@ -3973,9 +6890,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_NSP0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_NSP0&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mxc", "nsp";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;nspa_noc MASTER_CDSP_PROC 0</div><div class='hunk'>@@ -4011,15 +6928,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2141 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2161 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2181 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2541 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2561 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2581 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e1 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2181 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4027,15 +6936,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;2&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2142 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2162 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2182 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2542 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2562 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2582 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e2 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2182 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4043,15 +6944,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;3&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2143 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2163 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2183 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2543 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2563 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2583 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e3 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2183 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4059,15 +6952,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;4&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2144 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2164 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2184 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2544 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2564 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2584 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e4 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2184 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4075,15 +6960,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;5&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2145 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2165 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2185 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2545 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2565 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2585 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e5 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2185 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4091,15 +6968,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;6&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2146 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2166 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2186 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2546 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2566 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2586 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e6 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2186 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4107,15 +6976,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;7&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2147 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2167 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2187 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2547 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2567 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2587 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e7 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2187 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4123,15 +6984,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;8&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2148 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2168 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2188 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2548 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2568 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2588 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e8 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2188 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4139,31 +6992,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;9&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2149 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2169 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2189 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21c9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21e9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2549 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2569 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2589 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25c9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25e9 0x04a0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@10 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;10&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x214a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x216a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x218a 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21ca 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21ea 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x254a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x256a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x258a 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25ca 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25ea 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2189 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4171,15 +7000,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;11&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x214b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x216b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x218b 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21cb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x21eb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x254b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x256b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x258b 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25cb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x25eb 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x218b 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='hunk'>@@ -4192,8 +7013,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp1_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp1_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp1_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp1_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp1_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "wdog", "fatal", "ready",</div><div class='ctx'> 					  "handover", "stop-ack";</div><div class='hunk'>@@ -4201,9 +7022,9 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_NSP1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_NSP1&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mxc", "nsp";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;nspb_noc MASTER_CDSP_PROC_B 0</div><div class='hunk'>@@ -4239,15 +7060,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2941 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2961 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2981 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d41 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d61 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d81 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc1 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de1 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2981 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4255,15 +7068,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;2&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2942 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2962 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2982 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d42 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d62 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d82 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc2 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de2 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2982 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4271,15 +7076,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;3&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2943 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2963 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2983 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d43 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d63 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d83 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc3 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de3 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2983 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4287,15 +7084,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;4&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2944 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2964 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2984 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d44 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d64 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d84 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc4 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de4 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2984 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4303,15 +7092,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;5&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2945 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2965 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2985 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d45 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d65 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d85 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc5 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de5 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2985 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4319,15 +7100,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;6&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2946 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2966 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2986 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d46 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d66 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d86 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc6 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de6 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2986 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4335,15 +7108,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;7&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2947 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2967 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2987 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d47 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d67 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d87 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc7 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de7 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2987 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4351,15 +7116,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;8&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2948 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2968 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2988 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d48 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d68 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d88 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc8 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de8 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2988 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4367,15 +7124,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;9&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x2949 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2969 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2989 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29c9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29e9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d49 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d69 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d89 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dc9 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2de9 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x2989 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4383,15 +7132,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;10&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x294a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x296a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x298a 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29ca 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29ea 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d4a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d6a 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d8a 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dca 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dea 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x298a 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4399,15 +7140,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;11&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x294b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x296b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x298b 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29cb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29eb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d4b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d6b 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d8b 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dcb 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2deb 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x298b 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4415,15 +7148,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;12&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x294c 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x296c 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x298c 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29cc 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29ec 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d4c 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d6c 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d8c 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dcc 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dec 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x298c 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4431,15 +7156,7 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;13&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x294d 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x296d 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x298d 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29Cd 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x29ed 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d4d 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d6d 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2d8d 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2dcd 0x04a0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x2ded 0x04a0&gt;;</div><div class='add'>+							 &lt;&amp;apps_smmu 0x298d 0x0400&gt;;</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='hunk'>@@ -4452,8 +7169,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "wdog", "fatal", "ready", "handover",</div><div class='ctx'> 					  "stop-ack";</div><div class='hunk'>@@ -4461,8 +7178,8 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SA8775P_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SA8775P_LMX&gt;;</div><div class='ctx'> 			power-domain-names = "lcx", "lmx";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;lpass_ag_noc MASTER_LPASS_PROC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='hunk'>@@ -4518,6 +7235,45 @@</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x3001 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -5529,9 +8285,17 @@</div><div class='ctx'> 			     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "msi0", "msi1", "msi2", "msi3",</div><div class='del'>-				  "msi4", "msi5", "msi6", "msi7";</div><div class='add'>+			     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi0",</div><div class='add'>+				  "msi1",</div><div class='add'>+				  "msi2",</div><div class='add'>+				  "msi3",</div><div class='add'>+				  "msi4",</div><div class='add'>+				  "msi5",</div><div class='add'>+				  "msi6",</div><div class='add'>+				  "msi7",</div><div class='add'>+				  "global";</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 		interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -5561,16 +8325,22 @@</div><div class='ctx'> 		iommu-map = &lt;0x0 &amp;pcie_smmu 0x0000 0x1&gt;,</div><div class='ctx'> 			    &lt;0x100 &amp;pcie_smmu 0x0001 0x1&gt;;</div><div class='ctx'> </div><div class='del'>-		resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='del'>-		reset-names = "pci";</div><div class='add'>+		resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_0_LINK_DOWN_BCR&gt;;</div><div class='add'>+		reset-names = "pci",</div><div class='add'>+			      "link_down";</div><div class='add'>+</div><div class='ctx'> 		power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='ctx'> </div><div class='ctx'> 		phys = &lt;&amp;pcie0_phy&gt;;</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+		eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555&gt;;</div><div class='add'>+		eq-presets-16gts = /bits/ 8 &lt;0x55 0x55&gt;;</div><div class='add'>+</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		pcie@0 {</div><div class='add'>+		pcieport0: pcie@0 {</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 			bus-range = &lt;0x01 0xff&gt;;</div><div class='hunk'>@@ -5587,7 +8357,7 @@</div><div class='ctx'> 		      &lt;0x0 0x40000000 0x0 0xf20&gt;,</div><div class='ctx'> 		      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='ctx'> 		      &lt;0x0 0x40001000 0x0 0x4000&gt;,</div><div class='del'>-		      &lt;0x0 0x40200000 0x0 0x100000&gt;,</div><div class='add'>+		      &lt;0x0 0x40200000 0x0 0x1fe00000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x01c03000 0x0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x40005000 0x0 0x2000&gt;;</div><div class='ctx'> 		reg-names = "parf", "dbi", "elbi", "atu", "addr_space",</div><div class='hunk'>@@ -5622,8 +8392,8 @@</div><div class='ctx'> 		power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie0_phy&gt;;</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='del'>-		max-link-speed = &lt;3&gt;; /* FIXME: Limiting the Gen speed due to stability issues */</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='add'>+		linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -5632,16 +8402,18 @@</div><div class='ctx'> 		compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";</div><div class='ctx'> 		reg = &lt;0x0 0x1c04000 0x0 0x2000&gt;;</div><div class='ctx'> </div><div class='del'>-		clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+		clocks = &lt;&amp;gcc GCC_PCIE_0_PHY_AUX_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_CLKREF_EN&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_0_PIPEDIV2_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_0_PHY_AUX_CLK&gt;;</div><div class='del'>-</div><div class='del'>-		clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",</div><div class='del'>-			      "pipediv2", "phy_aux";</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_0_PIPEDIV2_CLK&gt;;</div><div class='add'>+		clock-names = "aux",</div><div class='add'>+			      "cfg_ahb",</div><div class='add'>+			      "ref",</div><div class='add'>+			      "rchng",</div><div class='add'>+			      "pipe",</div><div class='add'>+			      "pipediv2";</div><div class='ctx'> </div><div class='ctx'> 		assigned-clocks = &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;100000000&gt;;</div><div class='hunk'>@@ -5686,9 +8458,17 @@</div><div class='ctx'> 			     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 			     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "msi0", "msi1", "msi2", "msi3",</div><div class='del'>-				  "msi4", "msi5", "msi6", "msi7";</div><div class='add'>+			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "msi0",</div><div class='add'>+				  "msi1",</div><div class='add'>+				  "msi2",</div><div class='add'>+				  "msi3",</div><div class='add'>+				  "msi4",</div><div class='add'>+				  "msi5",</div><div class='add'>+				  "msi6",</div><div class='add'>+				  "msi7",</div><div class='add'>+				  "global";</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 		interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -5718,13 +8498,19 @@</div><div class='ctx'> 		iommu-map = &lt;0x0 &amp;pcie_smmu 0x0080 0x1&gt;,</div><div class='ctx'> 			    &lt;0x100 &amp;pcie_smmu 0x0081 0x1&gt;;</div><div class='ctx'> </div><div class='del'>-		resets = &lt;&amp;gcc GCC_PCIE_1_BCR&gt;;</div><div class='del'>-		reset-names = "pci";</div><div class='add'>+		resets = &lt;&amp;gcc GCC_PCIE_1_BCR&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_1_LINK_DOWN_BCR&gt;;</div><div class='add'>+		reset-names = "pci",</div><div class='add'>+			      "link_down";</div><div class='add'>+</div><div class='ctx'> 		power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='ctx'> </div><div class='ctx'> 		phys = &lt;&amp;pcie1_phy&gt;;</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+		eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555 0x5555 0x5555&gt;;</div><div class='add'>+		eq-presets-16gts = /bits/ 8 &lt;0x55 0x55 0x55 0x55&gt;;</div><div class='add'>+</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		pcie@0 {</div><div class='hunk'>@@ -5744,7 +8530,7 @@</div><div class='ctx'> 		      &lt;0x0 0x60000000 0x0 0xf20&gt;,</div><div class='ctx'> 		      &lt;0x0 0x60000f20 0x0 0xa8&gt;,</div><div class='ctx'> 		      &lt;0x0 0x60001000 0x0 0x4000&gt;,</div><div class='del'>-		      &lt;0x0 0x60200000 0x0 0x100000&gt;,</div><div class='add'>+		      &lt;0x0 0x60200000 0x0 0x1fe00000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x01c13000 0x0 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x60005000 0x0 0x2000&gt;;</div><div class='ctx'> 		reg-names = "parf", "dbi", "elbi", "atu", "addr_space",</div><div class='hunk'>@@ -5779,8 +8565,8 @@</div><div class='ctx'> 		power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie1_phy&gt;;</div><div class='ctx'> 		phy-names = "pciephy";</div><div class='del'>-		max-link-speed = &lt;3&gt;; /* FIXME: Limiting the Gen speed due to stability issues */</div><div class='ctx'> 		num-lanes = &lt;4&gt;;</div><div class='add'>+		linux,pci-domain = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -5789,16 +8575,18 @@</div><div class='ctx'> 		compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";</div><div class='ctx'> 		reg = &lt;0x0 0x1c14000 0x0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-		clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+		clocks = &lt;&amp;gcc GCC_PCIE_1_PHY_AUX_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_CLKREF_EN&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_1_PHY_RCHNG_CLK&gt;,</div><div class='ctx'> 			 &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_1_PIPEDIV2_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_1_PHY_AUX_CLK&gt;;</div><div class='del'>-</div><div class='del'>-		clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",</div><div class='del'>-			      "pipediv2", "phy_aux";</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_1_PIPEDIV2_CLK&gt;;</div><div class='add'>+		clock-names = "aux",</div><div class='add'>+			      "cfg_ahb",</div><div class='add'>+			      "ref",</div><div class='add'>+			      "rchng",</div><div class='add'>+			      "pipe",</div><div class='add'>+			      "pipediv2";</div><div class='ctx'> </div><div class='ctx'> 		assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_PHY_RCHNG_CLK&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;100000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts<br/>new file mode 100644<br/>index 000000000000..e72cf6725a52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/monaco-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/monaco-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,507 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qcs8300.dtsi"</div><div class='add'>+#include "qcs8300-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. Monaco EVK";</div><div class='add'>+	compatible = "qcom,monaco-evk", "qcom,qcs8300";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		serial0 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dmic: audio-codec-0 {</div><div class='add'>+		compatible = "dmic-codec";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		num-channels = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	max98357a: audio-codec-1 {</div><div class='add'>+		compatible = "maxim,max98357a";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,qcs8275-sndcard";</div><div class='add'>+		model = "MONACO-EVK";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hs0_mi2s_active&gt;, &lt;&amp;mi2s1_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		hs0-mi2s-playback-dai-link {</div><div class='add'>+			link-name = "HS0 MI2S Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;max98357a&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai PRIMARY_MI2S_RX&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sec-mi2s-capture-dai-link {</div><div class='add'>+			link-name = "Secondary MI2S Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;dmic&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai SECONDARY_MI2S_TX&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vreg_l3a: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3a";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4a: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8a";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9a: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9a";</div><div class='add'>+			regulator-min-microvolt = &lt;2970000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vreg_s5c: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5c";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;512000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;904000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4c: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7c: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	phy-mode = "2500base-x";</div><div class='add'>+	phy-handle = &lt;&amp;hsgmii_phy0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	nvmem-cells = &lt;&amp;mac_addr0&gt;;</div><div class='add'>+	nvmem-cell-names = "mac-address";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		hsgmii_phy0: ethernet-phy@1c {</div><div class='add'>+			compatible = "ethernet-phy-id004d.d101";</div><div class='add'>+			reg = &lt;0x1c&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;tlmm 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcs8300/a623_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_i2c1_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom0: eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+		nvmem-layout {</div><div class='add'>+			compatible = "fixed-layout";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mac_addr0: mac-addr@0 {</div><div class='add'>+				reg = &lt;0x0 0x6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_i2c15_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	expander0: gpio@38 {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander1: gpio@39 {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x39&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander2: gpio@3a {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander3: gpio@3b {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3b&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander4: gpio@3c {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander5: gpio@3d {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3d&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	expander6: gpio@3e {</div><div class='add'>+		compatible = "ti,tca9538";</div><div class='add'>+		reg = &lt;0x3e&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/adsp.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/cdsp0.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_gpdsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/gpdsp0.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	phy-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	ethernet0_default: ethernet0-default-state {</div><div class='add'>+		ethernet0_mdc: ethernet0-mdc-pins {</div><div class='add'>+			pins = "gpio5";</div><div class='add'>+			function = "emac0_mdc";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet0_mdio: ethernet0-mdio-pins {</div><div class='add'>+			pins = "gpio6";</div><div class='add'>+			function = "emac0_mdio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_i2c1_default: qup-i2c1-state {</div><div class='add'>+		pins = "gpio19", "gpio20";</div><div class='add'>+		function = "qup0_se1";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_i2c15_default: qup-i2c15-state {</div><div class='add'>+		pins = "gpio91", "gpio92";</div><div class='add'>+		function = "qup1_se7";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l8a&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;1100000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l4c&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l7c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts b/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts<br/>index b4ce14a79370..3a6eba904641 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts</a></div><div class='hunk'>@@ -133,6 +133,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts<br/>index 3459145516a1..2de8b6f9531b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts</a></div><div class='hunk'>@@ -214,6 +214,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts b/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts<br/>index 77618c7374df..29d61f8d5dc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts</a></div><div class='hunk'>@@ -130,6 +130,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts b/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts<br/>index f7be7e371820..742a325245c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts</a></div><div class='hunk'>@@ -131,6 +131,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts b/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts<br/>index bf7fc89dd106..aa414b5d7ee4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts</a></div><div class='hunk'>@@ -214,6 +214,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpass {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts b/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts<br/>index a823a1c40208..22bc73b94344 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-lg-c50.dts</a></div><div class='hunk'>@@ -59,6 +59,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts b/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts<br/>index 07345e694f6f..c50374979939 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-lg-m216.dts</a></div><div class='hunk'>@@ -112,6 +112,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts<br/>index 7f0c2c1b8a94..eb449112a226 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts</a></div><div class='hunk'>@@ -254,6 +254,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8916_bms {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts<br/>index 2cc54eaf7202..887764dc55b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts</a></div><div class='hunk'>@@ -178,6 +178,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi b/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi<br/>index 039961622633..75103168c1fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi</a></div><div class='hunk'>@@ -58,19 +58,19 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 		direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 		direction = &lt;Q6ASM_DAI_TX&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 		direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> 	dai@3 {</div><div class='del'>-		reg = &lt;3&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 		direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 		is-compress-dai;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi<br/>index 6a27d0ecd2ad..4e202e7ed7db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-motorola-common.dtsi</a></div><div class='hunk'>@@ -69,6 +69,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart1_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart1_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -129,14 +132,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* CTS/RTX are not used */</div><div class='del'>-&amp;blsp_uart1_default {</div><div class='del'>-	pins = "gpio0", "gpio1";</div><div class='del'>-};</div><div class='del'>-&amp;blsp_uart1_sleep {</div><div class='del'>-	pins = "gpio0", "gpio1";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio_keys_default: gpio-keys-default-state {</div><div class='ctx'> 		pins = "gpio107";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dts b/arch/arm64/boot/dts/qcom/msm8916-mtp.dts<br/>index c11a845e91bb..63d476523544 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-mtp.dts</a></div><div class='hunk'>@@ -23,5 +23,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi<br/>index e6355e5e2177..6f75707b6f9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi</a></div><div class='hunk'>@@ -302,6 +302,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpu {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi<br/>index 7a7e99b015d9..fb790b02736a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-samsung-fortuna-common.dtsi</a></div><div class='hunk'>@@ -304,6 +304,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi<br/>index fbd2caf405d5..ff9679d3f664 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi</a></div><div class='hunk'>@@ -116,6 +116,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi<br/>index 5ca2ada266f4..697f25d51d9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi</a></div><div class='hunk'>@@ -135,6 +135,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts<br/>index 5ce8f1350abc..71b5c98458ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts</a></div><div class='hunk'>@@ -319,6 +319,44 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mdss_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mdss_sleep&gt;;</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "samsung,s6e88a0-ams427ap24";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3-supply = &lt;&amp;pm8916_l17&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;pm8916_l6&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		flip-horizontal;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='hunk'>@@ -330,6 +368,13 @@</div><div class='ctx'> 	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8916_rpm_regulators {</div><div class='add'>+	pm8916_l17: l17 {</div><div class='add'>+		regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm8916_vib {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -425,6 +470,22 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mdss_default: mdss-default-state {</div><div class='add'>+		pins = "gpio25";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mdss_sleep: mdss-sleep-state {</div><div class='add'>+		pins = "gpio25";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	muic_i2c_default: muic-i2c-default-state {</div><div class='ctx'> 		pins = "gpio105", "gpio106";</div><div class='ctx'> 		function = "gpio";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi b/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi<br/>index c77ed04bb6c3..5719933fa8e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi</a></div><div class='hunk'>@@ -72,6 +72,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts<br/>index 3cfa80e38a9e..d6b03e08c34a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt86518.dts</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 	widgets = "Speaker", "Speaker",</div><div class='ctx'> 		  "Headphone", "Headphones";</div><div class='ctx'> 	pin-switches = "Speaker", "Headphones";</div><div class='del'>-	audio-routing =	"Speaker", "Speaker Amp OUT",</div><div class='add'>+	audio-routing = "Speaker", "Speaker Amp OUT",</div><div class='ctx'> 			"Speaker Amp IN", "HPH_R",</div><div class='ctx'> 			"Headphones", "Headphones Switch OUTL",</div><div class='ctx'> 			"Headphones", "Headphones Switch OUTR",</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi<br/>index 1a7c347dc3f0..ebe85cd85ddf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt865x8.dtsi</a></div><div class='hunk'>@@ -93,6 +93,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts<br/>index 510b3b3c4e3c..68c8856d4c2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts</a></div><div class='hunk'>@@ -169,6 +169,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mpss_mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi<br/>index 0ee44706b70b..d3a25a837488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8916.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8916.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/arm/coresight-cti-dt.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,msm8916.h&gt;</div><div class='hunk'>@@ -125,7 +126,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -133,67 +134,67 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,acc = &lt;&amp;cpu0_acc&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;cpu0_saw&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,acc = &lt;&amp;cpu1_acc&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;cpu1_saw&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,acc = &lt;&amp;cpu2_acc&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;cpu2_saw&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;apcs&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,acc = &lt;&amp;cpu3_acc&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;cpu3_saw&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -202,7 +203,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "standalone-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000002&gt;;</div><div class='hunk'>@@ -215,7 +216,7 @@</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='ctx'> </div><div class='del'>-			CLUSTER_RET: cluster-retention {</div><div class='add'>+			cluster_ret: cluster-retention {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000012&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;500&gt;;</div><div class='hunk'>@@ -223,7 +224,7 @@</div><div class='ctx'> 				min-residency-us = &lt;2000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_PWRDN: cluster-gdhs {</div><div class='add'>+			cluster_pwrdn: cluster-gdhs {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000032&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2000&gt;;</div><div class='hunk'>@@ -273,33 +274,33 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_RET&gt;, &lt;&amp;CLUSTER_PWRDN&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_ret&gt;, &lt;&amp;cluster_pwrdn&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -823,7 +824,7 @@</div><div class='ctx'> 			reg = &lt;0x00850000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -832,7 +833,7 @@</div><div class='ctx'> 			reg = &lt;0x00852000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -841,7 +842,7 @@</div><div class='ctx'> 			reg = &lt;0x00854000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -850,7 +851,7 @@</div><div class='ctx'> 			reg = &lt;0x00856000 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -864,7 +865,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			arm,cs-dev-assoc = &lt;&amp;etm0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -879,7 +880,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 			arm,cs-dev-assoc = &lt;&amp;etm1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -894,7 +895,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 			arm,cs-dev-assoc = &lt;&amp;etm2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -909,7 +910,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 			arm,cs-dev-assoc = &lt;&amp;etm3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -923,7 +924,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -944,7 +945,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -965,7 +966,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -986,7 +987,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -1231,29 +1232,50 @@</div><div class='ctx'> 				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart1_default: blsp-uart1-default-state {</div><div class='del'>-				/* TX, RX, CTS_N, RTS_N */</div><div class='del'>-				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='del'>-				function = "blsp_uart1";</div><div class='del'>-				drive-strength = &lt;16&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+			blsp_uart1_console_default: blsp-uart1-console-default-state {</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio0";</div><div class='add'>+					function = "blsp_uart1";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio1";</div><div class='add'>+					function = "blsp_uart1";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart1_sleep: blsp-uart1-sleep-state {</div><div class='del'>-				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+			blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {</div><div class='add'>+				pins = "gpio0", "gpio1";</div><div class='ctx'> 				function = "gpio";</div><div class='ctx'> 				drive-strength = &lt;2&gt;;</div><div class='ctx'> 				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart2_default: blsp-uart2-default-state {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-				drive-strength = &lt;16&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+			blsp_uart2_console_default: blsp-uart2-console-default-state {</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio4";</div><div class='add'>+					function = "blsp_uart2";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio5";</div><div class='add'>+					function = "blsp_uart2";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart2_sleep: blsp-uart2-sleep-state {</div><div class='add'>+			blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {</div><div class='ctx'> 				pins = "gpio4", "gpio5";</div><div class='ctx'> 				function = "gpio";</div><div class='ctx'> 				drive-strength = &lt;2&gt;;</div><div class='hunk'>@@ -1497,8 +1519,8 @@</div><div class='ctx'> 			reg = &lt;0x01800000 0x80000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;xo_board&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='hunk'>@@ -1540,6 +1562,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='add'>+			resets = &lt;&amp;gcc GCC_MDSS_BCR&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1590,8 +1614,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -1812,14 +1836,6 @@</div><div class='ctx'> 			iommus = &lt;&amp;apps_iommu 5&gt;;</div><div class='ctx'> 			memory-region = &lt;&amp;venus_mem&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-</div><div class='del'>-			video-decoder {</div><div class='del'>-				compatible = "venus-decoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			video-encoder {</div><div class='del'>-				compatible = "venus-encoder";</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apps_iommu: iommu@1ef0000 {</div><div class='hunk'>@@ -2111,6 +2127,7 @@</div><div class='ctx'> 				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;xo_board&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC1_BCR&gt;;</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;sdc1_default&gt;;</div><div class='ctx'> 			pinctrl-1 = &lt;&amp;sdc1_sleep&gt;;</div><div class='ctx'> 			pinctrl-names = "default", "sleep";</div><div class='hunk'>@@ -2132,6 +2149,7 @@</div><div class='ctx'> 				 &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;xo_board&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC2_BCR&gt;;</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;sdc2_default&gt;;</div><div class='ctx'> 			pinctrl-1 = &lt;&amp;sdc2_sleep&gt;;</div><div class='ctx'> 			pinctrl-names = "default", "sleep";</div><div class='hunk'>@@ -2158,9 +2176,6 @@</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='ctx'> 			dmas = &lt;&amp;blsp_dma 0&gt;, &lt;&amp;blsp_dma 1&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='del'>-			pinctrl-names = "default", "sleep";</div><div class='del'>-			pinctrl-0 = &lt;&amp;blsp_uart1_default&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;blsp_uart1_sleep&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2172,9 +2187,6 @@</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='ctx'> 			dmas = &lt;&amp;blsp_dma 2&gt;, &lt;&amp;blsp_dma 3&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='del'>-			pinctrl-names = "default", "sleep";</div><div class='del'>-			pinctrl-0 = &lt;&amp;blsp_uart2_default&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;blsp_uart2_sleep&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2644,10 +2656,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2673,10 +2685,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts b/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts<br/>new file mode 100644<br/>index 000000000000..9db503e21888<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts</a></div><div class='hunk'>@@ -0,0 +1,358 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Barnabas Czeman</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "msm8917.dtsi"</div><div class='add'>+#include "pm8937.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;qseecom_mem;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Xiaomi Redmi 5A (riva)";</div><div class='add'>+	compatible = "xiaomi,riva", "qcom,msm8917";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_MSM8917 0&gt;;</div><div class='add'>+	qcom,board-id = &lt;0x1000b 2&gt;, &lt;0x2000b 2&gt;;</div><div class='add'>+</div><div class='add'>+	pwm_backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pm8937_pwm 0 100000&gt;;</div><div class='add'>+		brightness-levels = &lt;0 255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;255&gt;;</div><div class='add'>+		default-brightness-level = &lt;128&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;3000000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;11500000&gt;;</div><div class='add'>+		constant-charge-current-max-microamp = &lt;1000000&gt;;</div><div class='add'>+		constant-charge-voltage-max-microvolt = &lt;4400000&gt;;</div><div class='add'>+		precharge-current-microamp = &lt;256000&gt;;</div><div class='add'>+		charge-term-current-microamp = &lt;60000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "framebuffer0";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@90001000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x90001000 0x0 (720 * 1280 * 3)&gt;;</div><div class='add'>+			width = &lt;720&gt;;</div><div class='add'>+			height = &lt;1280&gt;;</div><div class='add'>+			stride = &lt;(720 * 3)&gt;;</div><div class='add'>+			format = "r8g8b8";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_ESC0_CLK&gt;;</div><div class='add'>+			power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_keys_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volup {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		qseecom_mem: qseecom@84a00000 {</div><div class='add'>+			reg = &lt;0x0 0x84a00000 0x0 0x1900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		framebuffer_mem: memory@90001000 {</div><div class='add'>+			reg = &lt;0x0 0x90001000 0x0 (720 * 1280 * 3)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@38 {</div><div class='add'>+		compatible = "edt,edt-ft5306";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 65 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;tsp_int_rst_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vcc-supply = &lt;&amp;pm8937_l10&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;pm8937_l5&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;720&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;1280&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bq27426@55 {</div><div class='add'>+		compatible = "ti,bq27426";</div><div class='add'>+		reg = &lt;0x55&gt;;</div><div class='add'>+		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bq25601@6b {</div><div class='add'>+		compatible = "ti,bq25601";</div><div class='add'>+		reg = &lt;0x6b&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 61 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bq25601_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		input-voltage-limit-microvolt = &lt;4400000&gt;;</div><div class='add'>+		input-current-limit-microamp = &lt;1000000&gt;;</div><div class='add'>+		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8937_gpios {</div><div class='add'>+	pwm_enable_default: pwm-enable-default-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "dtest2";</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+		qcom,drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8937_pwm {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm_enable_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8937_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,rpm-pm8937-regulators";</div><div class='add'>+</div><div class='add'>+		vdd_s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vdd_l1_l19-supply = &lt;&amp;pm8937_s3&gt;;</div><div class='add'>+		vdd_l2_l23-supply = &lt;&amp;pm8937_s3&gt;;</div><div class='add'>+		vdd_l3-supply = &lt;&amp;pm8937_s3&gt;;</div><div class='add'>+		vdd_l4_l5_l6_l7_l16-supply = &lt;&amp;pm8937_s4&gt;;</div><div class='add'>+		vdd_l8_l11_l12_l17_l22-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_l9_l10_l13_l14_l15_l18-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		pm8937_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-system-load = &lt;200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l13: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l19: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8937_l8&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8937_l5&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 67 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8937_l11&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8937_l12&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_cd_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_cd_default&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sleep_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bq25601_int_default: bq25601-int-default-state {</div><div class='add'>+		pins = "gpio61";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys_default: gpio-keys-default-state {</div><div class='add'>+		pins = "gpio91";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_cd_default: sdc2-cd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsp_int_rst_default: tsp-int-rst-default-state {</div><div class='add'>+		pins = "gpio64", "gpio65";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wcnss {</div><div class='add'>+	vddpx-supply = &lt;&amp;pm8937_l5&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wcnss_iris {</div><div class='add'>+	compatible = "qcom,wcn3620";</div><div class='add'>+	vddxo-supply = &lt;&amp;pm8937_l7&gt;;</div><div class='add'>+	vddrfa-supply = &lt;&amp;pm8937_l19&gt;;</div><div class='add'>+	vddpa-supply = &lt;&amp;pm8937_l9&gt;;</div><div class='add'>+	vdddig-supply = &lt;&amp;pm8937_l5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wcnss_mem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board {</div><div class='add'>+	clock-frequency = &lt;19200000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qcom/msm8917.dtsi<br/>new file mode 100644<br/>index 000000000000..8a642fce2e40<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8917.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8917.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1955 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,gcc-msm8917.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	chosen { };</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_board: xo-board {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;apcs&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@101 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;apcs&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@102 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;apcs&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@103 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;apcs&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		domain-idle-states {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x41000053&gt;;</div><div class='add'>+				entry-latency-us = &lt;700&gt;;</div><div class='add'>+				exit-latency-us = &lt;1000&gt;;</div><div class='add'>+				min-residency-us = &lt;6500&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "standalone-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+				entry-latency-us = &lt;125&gt;;</div><div class='add'>+				exit-latency-us = &lt;180&gt;;</div><div class='add'>+				min-residency-us = &lt;595&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_opp_table: opp-table-cpu {</div><div class='add'>+			compatible = "operating-points-v2";</div><div class='add'>+			opp-shared;</div><div class='add'>+</div><div class='add'>+			opp-960000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;960000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			opp-1094400000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1094400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			opp-1248000000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1248000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			opp-1401600000 {</div><div class='add'>+				opp-hz = /bits/ 64 &lt;1401600000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm: scm {</div><div class='add'>+			compatible = "qcom,scm-msm8916", "qcom,scm";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CRYPTO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CRYPTO_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CRYPTO_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "bus", "iface";</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x6100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* We expect the bootloader to fill in the reg */</div><div class='add'>+		reg = &lt;0 0x80000000 0 0&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rpm: remoteproc {</div><div class='add'>+		compatible = "qcom,msm8917-rpm-proc", "qcom,rpm-proc";</div><div class='add'>+</div><div class='add'>+		smd-edge {</div><div class='add'>+			interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			qcom,ipc = &lt;&amp;apcs 8 0&gt;;</div><div class='add'>+			qcom,smd-edge = &lt;15&gt;;</div><div class='add'>+</div><div class='add'>+			rpm_requests: rpm-requests {</div><div class='add'>+				compatible = "qcom,rpm-msm8917", "qcom,smd-rpm";</div><div class='add'>+				qcom,smd-channels = "rpm_requests";</div><div class='add'>+</div><div class='add'>+				rpmcc: clock-controller {</div><div class='add'>+					compatible = "qcom,rpmcc-msm8917", "qcom,rpmcc";</div><div class='add'>+					#clock-cells = &lt;1&gt;;</div><div class='add'>+					clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+					clock-names = "xo";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rpmpd: power-controller {</div><div class='add'>+					compatible = "qcom,msm8917-rpmpd";</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					operating-points-v2 = &lt;&amp;rpmpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+					rpmpd_opp_table: opp-table {</div><div class='add'>+						compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_ret: opp1 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_RETENTION&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_ret_plus: opp2 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_RETENTION_PLUS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_min_svs: opp3 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_MIN_SVS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_low_svs: opp4 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_LOW_SVS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_svs: opp5 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_SVS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_svs_plus: opp6 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_SVS_PLUS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_nom: opp7 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_NOM&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_nom_plus: opp8 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_NOM_PLUS&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						rpmpd_opp_turbo: opp9 {</div><div class='add'>+							opp-level = &lt;RPM_SMD_LEVEL_TURBO&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		qseecom_mem: qseecom@85b00000 {</div><div class='add'>+			reg = &lt;0x0 0x85b00000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem@86300000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x86300000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+			qcom,rpm-msg-ram = &lt;&amp;rpm_msg_ram&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reserved@86400000 {</div><div class='add'>+			reg = &lt;0x0 0x86400000 0x0 0x400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmtfs@92100000 {</div><div class='add'>+			compatible = "qcom,rmtfs-mem";</div><div class='add'>+			reg = &lt;0x0 0x92100000 0x0 0x180000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			qcom,client-id = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: adsp {</div><div class='add'>+			size = &lt;0x0 0x1100000&gt;;</div><div class='add'>+			alignment = &lt;0x0 0x100000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x0 0x86800000 0x0 0x8000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mba_mem: mba {</div><div class='add'>+			size = &lt;0x0 0x100000&gt;;</div><div class='add'>+			alignment = &lt;0x0 0x100000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x0 0x86800000 0x0 0x8000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		venus_mem: venus {</div><div class='add'>+			size = &lt;0x0 0x400000&gt;;</div><div class='add'>+			alignment = &lt;0x0 0x100000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x0 0x86800000 0x0 0x8000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcnss_mem: wcnss {</div><div class='add'>+			size = &lt;0x0 0x700000&gt;;</div><div class='add'>+			alignment = &lt;0x0 0x100000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x0 0x86800000 0x0 0x8000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-adsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;443&gt;, &lt;429&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 291 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;apcs 10&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		adsp_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-modem {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;435&gt;, &lt;428&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 27 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;apcs 14&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		modem_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		modem_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-wcnss {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;451&gt;, &lt;431&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_SPI 143 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;apcs 18&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		wcnss_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcnss_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smsm {</div><div class='add'>+		compatible = "qcom,smsm";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;0&gt;, &lt;&amp;apcs 13&gt;, &lt;0&gt;, &lt;&amp;apcs 19&gt;;</div><div class='add'>+</div><div class='add'>+		apps_smsm: apps@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hexagon_smsm: hexagon@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 26 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcnss_smsm: wcnss@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 144 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0 0 0 0xffffffff&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		rpm_msg_ram: sram@60000 {</div><div class='add'>+			compatible = "qcom,rpm-msg-ram";</div><div class='add'>+			reg = &lt;0x00060000 0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_hs_phy: phy@6c000 {</div><div class='add'>+			compatible = "qcom,usb-hs-28nm-femtophy";</div><div class='add'>+			reg = &lt;0x0006c000 0x200&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB_HS_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB2A_PHY_SLEEP_CLK&gt;;</div><div class='add'>+			clock-names = "ref", "ahb", "sleep";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB2_HS_PHY_ONLY_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "por";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: qfprom@a4000 {</div><div class='add'>+			compatible = "qcom,msm8917-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x000a4000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			tsens_base1: base1@1d8 {</div><div class='add'>+				reg = &lt;0x1d8 1&gt;;</div><div class='add'>+				bits = &lt;0 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s5_p1: s5-p1@1d9 {</div><div class='add'>+				reg = &lt;0x1d9 1&gt;;</div><div class='add'>+				bits = &lt;0 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s5_p2: s5-p2@1d9 {</div><div class='add'>+				reg = &lt;0x1d9 2&gt;;</div><div class='add'>+				bits = &lt;6 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s6_p1: s6-p1@1da {</div><div class='add'>+				reg = &lt;0x1da 2&gt;;</div><div class='add'>+				bits = &lt;4 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s6_p2: s6-p2@1db {</div><div class='add'>+				reg = &lt;0x1db 1&gt;;</div><div class='add'>+				bits = &lt;2 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s7_p1: s7-p1@1dc {</div><div class='add'>+				reg = &lt;0x1dc 1&gt;;</div><div class='add'>+				bits = &lt;0 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s7_p2: s7-p2@1dc {</div><div class='add'>+				reg = &lt;0x1dc 2&gt;;</div><div class='add'>+				bits = &lt;6 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s8_p1: s8-p1@1dd {</div><div class='add'>+				reg = &lt;0x1dd 2&gt;;</div><div class='add'>+				bits = &lt;4 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s8_p2: s8-p2@1de {</div><div class='add'>+				reg = &lt;0x1de 1&gt;;</div><div class='add'>+				bits = &lt;2 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_base2: base2@1df {</div><div class='add'>+				reg = &lt;0x1df 1&gt;;</div><div class='add'>+				bits = &lt;0 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_mode: mode@210 {</div><div class='add'>+				reg = &lt;0x210 1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s0_p1: s0-p1@210 {</div><div class='add'>+				reg = &lt;0x210 2&gt;;</div><div class='add'>+				bits = &lt;3 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s0_p2: s0-p2@211 {</div><div class='add'>+				reg = &lt;0x211 1&gt;;</div><div class='add'>+				bits = &lt;1 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s1_p1: s1-p1@211 {</div><div class='add'>+				reg = &lt;0x211 2&gt;;</div><div class='add'>+				bits = &lt;7 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s1_p2: s1-p2@212 {</div><div class='add'>+				reg = &lt;0x212 2&gt;;</div><div class='add'>+				bits = &lt;5 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s2_p1: s2-p1@213 {</div><div class='add'>+				reg = &lt;0x213 2&gt;;</div><div class='add'>+				bits = &lt;3 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s2_p2: s2-p2@214 {</div><div class='add'>+				reg = &lt;0x214 1&gt;;</div><div class='add'>+				bits = &lt;1 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s3_p1: s3-p1@214 {</div><div class='add'>+				reg = &lt;0x214 2&gt;;</div><div class='add'>+				bits = &lt;7 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s3_p2: s3-p2@215 {</div><div class='add'>+				reg = &lt;0x215 2&gt;;</div><div class='add'>+				bits = &lt;5 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s4_p1: s4-p1@216 {</div><div class='add'>+				reg = &lt;0x216 2&gt;;</div><div class='add'>+				bits = &lt;3 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s4_p2: s4-p2@217 {</div><div class='add'>+				reg = &lt;0x217 1&gt;;</div><div class='add'>+				bits = &lt;1 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s9_p1: s9-p1@230 {</div><div class='add'>+				reg = &lt;0x230 1&gt;;</div><div class='add'>+				bits = &lt;0 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s9_p2: s9-p2@230 {</div><div class='add'>+				reg = &lt;0x230 2&gt;;</div><div class='add'>+				bits = &lt;6 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s10_p1: s10-p1@231 {</div><div class='add'>+				reg = &lt;0x231 2&gt;;</div><div class='add'>+				bits = &lt;4 6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsens_s10_p2: s10-p2@232 {</div><div class='add'>+				reg = &lt;0x232 1&gt;;</div><div class='add'>+				bits = &lt;2 6&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@e3000 {</div><div class='add'>+			compatible = "qcom,prng";</div><div class='add'>+			reg = &lt;0x000e3000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsens: thermal-sensor@4a9000 {</div><div class='add'>+			compatible = "qcom,msm8937-tsens", "qcom,tsens-v1";</div><div class='add'>+			reg = &lt;0x004a9000 0x1000&gt;,</div><div class='add'>+			      &lt;0x004a8000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uplow";</div><div class='add'>+			nvmem-cells = &lt;&amp;tsens_mode&gt;,</div><div class='add'>+				      &lt;&amp;tsens_base1&gt;, &lt;&amp;tsens_base2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s0_p1&gt;, &lt;&amp;tsens_s0_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s1_p1&gt;, &lt;&amp;tsens_s1_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s2_p1&gt;, &lt;&amp;tsens_s2_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s3_p1&gt;, &lt;&amp;tsens_s3_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s4_p1&gt;, &lt;&amp;tsens_s4_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s5_p1&gt;, &lt;&amp;tsens_s5_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s6_p1&gt;, &lt;&amp;tsens_s6_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s7_p1&gt;, &lt;&amp;tsens_s7_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s8_p1&gt;, &lt;&amp;tsens_s8_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s9_p1&gt;, &lt;&amp;tsens_s9_p2&gt;,</div><div class='add'>+				      &lt;&amp;tsens_s10_p1&gt;, &lt;&amp;tsens_s10_p2&gt;;</div><div class='add'>+			nvmem-cell-names = "mode",</div><div class='add'>+					   "base1", "base2",</div><div class='add'>+					   "s0_p1", "s0_p2",</div><div class='add'>+					   "s1_p1", "s1_p2",</div><div class='add'>+					   "s2_p1", "s2_p2",</div><div class='add'>+					   "s3_p1", "s3_p2",</div><div class='add'>+					   "s4_p1", "s4_p2",</div><div class='add'>+					   "s5_p1", "s5_p2",</div><div class='add'>+					   "s6_p1", "s6_p2",</div><div class='add'>+					   "s7_p1", "s7_p2",</div><div class='add'>+					   "s8_p1", "s8_p2",</div><div class='add'>+					   "s9_p1", "s9_p2",</div><div class='add'>+					   "s10_p1", "s10_p2";</div><div class='add'>+			#qcom,sensors = &lt;11&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		restart@4ab000 {</div><div class='add'>+			compatible = "qcom,pshold";</div><div class='add'>+			reg = &lt;0x004ab000 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@1000000 {</div><div class='add'>+			compatible = "qcom,msm8917-pinctrl";</div><div class='add'>+			reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 134&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			blsp1_i2c2_default: blsp1-i2c2-default-state {</div><div class='add'>+				pins = "gpio6", "gpio7";</div><div class='add'>+				function = "blsp_i2c2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_i2c2_sleep: blsp1-i2c2-sleep-state {</div><div class='add'>+				pins = "gpio6", "gpio7";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_i2c3_default: blsp1-i2c3-default-state {</div><div class='add'>+				pins = "gpio10", "gpio11";</div><div class='add'>+				function = "blsp_i2c3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_i2c3_sleep: blsp1-i2c3-sleep-state {</div><div class='add'>+				pins = "gpio10", "gpio11";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_i2c4_default: blsp1-i2c4-default-state {</div><div class='add'>+				pins = "gpio14", "gpio15";</div><div class='add'>+				function = "blsp_i2c4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_i2c4_sleep: blsp1-i2c4-sleep-state {</div><div class='add'>+				pins = "gpio14", "gpio15";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp2_i2c1_default: blsp2-i2c1-default-state {</div><div class='add'>+				pins = "gpio18", "gpio19";</div><div class='add'>+				function = "blsp_i2c5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp2_i2c1_sleep: blsp2-i2c1-sleep-state {</div><div class='add'>+				pins = "gpio18", "gpio19";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_spi3_default: blsp1-spi3-default-state {</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio10";</div><div class='add'>+					function = "blsp_spi3";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio8", "gpio9", "gpio11";</div><div class='add'>+					function = "blsp_spi3";</div><div class='add'>+					drive-strength = &lt;12&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_spi3_sleep: blsp1-spi3-sleep-state {</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio10";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio8", "gpio9", "gpio11";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp2_spi2_default: blsp2-spi2-default-state {</div><div class='add'>+				cs0-pins {</div><div class='add'>+					pins = "gpio47";</div><div class='add'>+					function = "blsp_spi6";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cs1-pins {</div><div class='add'>+					pins = "gpio22";</div><div class='add'>+					function = "blsp_spi6";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio20", "gpio21", "gpio23";</div><div class='add'>+					function = "blsp_spi6";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp2_spi2_sleep: blsp2-spi2-sleep-state {</div><div class='add'>+				cs0-pins {</div><div class='add'>+					pins = "gpio47";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cs1-pins {</div><div class='add'>+					pins = "gpio22";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio20", "gpio21", "gpio23";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_uart1_default: blsp1-uart1-default-state {</div><div class='add'>+				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+				function = "blsp_uart1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_uart1_sleep: blsp1-uart1-sleep-state {</div><div class='add'>+				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_uart2_default: blsp1-uart2-default-state {</div><div class='add'>+				pins = "gpio4", "gpio5";</div><div class='add'>+				function = "blsp_uart2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			blsp1_uart2_sleep: blsp1-uart2-sleep-state {</div><div class='add'>+				pins = "gpio4", "gpio5";</div><div class='add'>+				function = "gpio";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_default: sdc1-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_sleep: sdc1-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_default: sdc2-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_sleep: sdc2-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wcnss_pin_a: wcnss-active-state {</div><div class='add'>+				wcss-wlan-pins {</div><div class='add'>+					pins = "gpio79", "gpio80";</div><div class='add'>+					function = "wcss_wlan";</div><div class='add'>+					drive-strength = &lt;6&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				wcss-wlan0-pins {</div><div class='add'>+					pins = "gpio78";</div><div class='add'>+					function = "wcss_wlan0";</div><div class='add'>+					drive-strength = &lt;6&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				wcss-wlan1-pins {</div><div class='add'>+					pins = "gpio77";</div><div class='add'>+					function = "wcss_wlan1";</div><div class='add'>+					drive-strength = &lt;6&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				wcss-wlan2-pins {</div><div class='add'>+					pins = "gpio76";</div><div class='add'>+					function = "wcss_wlan2";</div><div class='add'>+					drive-strength = &lt;6&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@1800000 {</div><div class='add'>+			compatible = "qcom,gcc-msm8917";</div><div class='add'>+			reg = &lt;0x01800000 0x80000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;;</div><div class='add'>+			clock-names = "xo",</div><div class='add'>+				      "sleep_clk",</div><div class='add'>+				      "dsi0pll",</div><div class='add'>+				      "dsi0pllbyte";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1905000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0x01905000 0x20000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr: syscon@1937000 {</div><div class='add'>+			compatible = "qcom,tcsr-msm8917", "syscon";</div><div class='add'>+			reg = &lt;0x01937000 0x30000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdss: display-subsystem@1a00000 {</div><div class='add'>+			compatible = "qcom,mdss";</div><div class='add'>+			reg = &lt;0x01a00000 0x1000&gt;,</div><div class='add'>+			      &lt;0x01ab0000 0x1040&gt;;</div><div class='add'>+			reg-names = "mdss_phys", "vbif_phys";</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "vsync";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdp: display-controller@1a01000 {</div><div class='add'>+				compatible = "qcom,msm8917-mdp5", "qcom,mdp5";</div><div class='add'>+				reg = &lt;0x01a01000 0x89000&gt;;</div><div class='add'>+				reg-names = "mdp_phys";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+				clock-names = "iface",</div><div class='add'>+					      "bus",</div><div class='add'>+					      "core",</div><div class='add'>+					      "vsync";</div><div class='add'>+</div><div class='add'>+				iommus = &lt;&amp;apps_iommu 0x15&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdp5_intf1_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dsi0_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi0: dsi@1a94000 {</div><div class='add'>+				compatible = "qcom,mdss-dsi-ctrl";</div><div class='add'>+				reg = &lt;0x01a94000 0x300&gt;;</div><div class='add'>+				reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;gcc BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;gcc PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_MDSS_ESC0_CLK&gt;;</div><div class='add'>+				clock-names = "mdp_core",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "bus",</div><div class='add'>+					      "byte",</div><div class='add'>+					      "pixel",</div><div class='add'>+					      "core";</div><div class='add'>+				phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss_dsi0_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmpd MSM8917_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dsi0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdp5_intf1_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dsi0_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdss_dsi0_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-125000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;125000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-187500000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi0_phy: phy@1a94a00 {</div><div class='add'>+				compatible = "qcom,dsi-phy-28nm-8937";</div><div class='add'>+				reg = &lt;0x01a94a00 0xd4&gt;,</div><div class='add'>+				      &lt;0x01a94400 0x280&gt;,</div><div class='add'>+				      &lt;0x01a94b80 0x30&gt;;</div><div class='add'>+				reg-names = "dsi_pll",</div><div class='add'>+					    "dsi_phy",</div><div class='add'>+					    "dsi_phy_regulator";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;xo_board&gt;;</div><div class='add'>+				clock-names = "iface", "ref";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_iommu: iommu@1e20000 {</div><div class='add'>+			compatible = "qcom,msm8917-iommu", "qcom,msm-iommu-v1";</div><div class='add'>+			ranges = &lt;0 0x01e20000 0x20000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_APSS_TCU_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "bus";</div><div class='add'>+</div><div class='add'>+			qcom,iommu-secure-id = &lt;17&gt;;</div><div class='add'>+</div><div class='add'>+			/* VFE */</div><div class='add'>+			iommu-ctx@14000 {</div><div class='add'>+				compatible = "qcom,msm-iommu-v1-ns";</div><div class='add'>+				reg = &lt;0x14000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* MDP_0 */</div><div class='add'>+			iommu-ctx@15000 {</div><div class='add'>+				compatible = "qcom,msm-iommu-v1-ns";</div><div class='add'>+				reg = &lt;0x15000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* VENUS_NS */</div><div class='add'>+			iommu-ctx@16000 {</div><div class='add'>+				compatible = "qcom,msm-iommu-v1-ns";</div><div class='add'>+				reg = &lt;0x16000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_iommu: iommu@1f08000 {</div><div class='add'>+			compatible = "qcom,msm8917-iommu", "qcom,msm-iommu-v1";</div><div class='add'>+			ranges = &lt;0 0x01f08000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GFX_TCU_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "bus";</div><div class='add'>+			qcom,iommu-secure-id = &lt;18&gt;;</div><div class='add'>+</div><div class='add'>+			iommu-ctx@0 {</div><div class='add'>+				compatible = "qcom,msm-iommu-v2-ns";</div><div class='add'>+				reg = &lt;0 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@1c00000 {</div><div class='add'>+			compatible = "qcom,adreno-306.32", "qcom,adreno";</div><div class='add'>+			reg = &lt;0x01c00000 0x20000&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory";</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "kgsl_3d0_irq";</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "mem_iface",</div><div class='add'>+				      "alt_mem_iface",</div><div class='add'>+				      "gfx3d";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_OXILI_GFX3D_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_OXILI_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BIMC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BIMC_GPU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GFX3D_CLK_SRC&gt;;</div><div class='add'>+			power-domains = &lt;&amp;gcc OXILI_GX_GDSC&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;gpu_iommu 0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-19200000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;19200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-270000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-400000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-484800000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;484800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-523200000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;523200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-598000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;598000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi_bus: spmi@200f000 {</div><div class='add'>+			compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x0200f000 0x001000&gt;,</div><div class='add'>+			      &lt;0x02400000 0x800000&gt;,</div><div class='add'>+			      &lt;0x02c00000 0x800000&gt;,</div><div class='add'>+			      &lt;0x03800000 0x200000&gt;,</div><div class='add'>+			      &lt;0x0200a000 0x002100&gt;;</div><div class='add'>+			reg-names = "core",</div><div class='add'>+				    "chnls",</div><div class='add'>+				    "obsrvr",</div><div class='add'>+				    "intr",</div><div class='add'>+				    "cnfg";</div><div class='add'>+			interrupt-names = "periph_irq";</div><div class='add'>+			interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bam_dmux_dma: dma-controller@4044000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x04044000 0x19000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			num-channels = &lt;6&gt;;</div><div class='add'>+			qcom,num-ees = &lt;1&gt;;</div><div class='add'>+			qcom,powered-remotely;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_1: mmc@7824900 {</div><div class='add'>+			compatible = "qcom,sdhci-msm-v4";</div><div class='add'>+			reg = &lt;0x07824900 0x500&gt;,</div><div class='add'>+			      &lt;0x07824000 0x800&gt;;</div><div class='add'>+			reg-names = "hc", "core";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdc1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;sdc1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			power-domains = &lt;&amp;rpmpd MSM8917_VDDCX&gt;;</div><div class='add'>+			mmc-hs200-1_8v;</div><div class='add'>+			mmc-hs400-1_8v;</div><div class='add'>+			mmc-ddr-1_8v;</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			non-removable;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_2: mmc@7864900 {</div><div class='add'>+			compatible = "qcom,sdhci-msm-v4";</div><div class='add'>+			reg = &lt;0x07864900 0x500&gt;,</div><div class='add'>+			      &lt;0x07864000 0x800&gt;;</div><div class='add'>+			reg-names = "hc", "core";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdc2_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;sdc2_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			power-domains = &lt;&amp;rpmpd MSM8917_VDDCX&gt;;</div><div class='add'>+			bus-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_dma: dma-controller@7884000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x07884000 0x1f000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			num-channels = &lt;12&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp2_dma: dma-controller@7ac4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x07ac4000 0x1d000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			num-channels = &lt;10&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_uart1: serial@78af000 {</div><div class='add'>+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+			reg = &lt;0x078af000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_UART1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 0&gt;, &lt;&amp;blsp1_dma 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_uart1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_uart1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_uart2: serial@78b0000 {</div><div class='add'>+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+			reg = &lt;0x078b0000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_UART2_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 2&gt;, &lt;&amp;blsp1_dma 3&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_uart2_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_uart2_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_i2c2: i2c@78b6000 {</div><div class='add'>+			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x078b6000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP2_I2C_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 6&gt;, &lt;&amp;blsp1_dma 7&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_i2c2_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_i2c2_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_i2c3: i2c@78b7000 {</div><div class='add'>+			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x078b7000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP3_I2C_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 8&gt;, &lt;&amp;blsp1_dma 9&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_i2c3_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_i2c3_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_spi3: spi@78b7000 {</div><div class='add'>+			compatible = "qcom,spi-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x078b7000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP3_SPI_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 8&gt;, &lt;&amp;blsp1_dma 9&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_spi3_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_spi3_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp1_i2c4: i2c@78b8000 {</div><div class='add'>+			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x078b8000 0x500&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP4_I2C_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp1_dma 10&gt;, &lt;&amp;blsp1_dma 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp1_i2c4_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp1_i2c4_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp2_i2c1: i2c@7af5000 {</div><div class='add'>+			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x07af5000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_QUP1_I2C_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp2_dma 4&gt;, &lt;&amp;blsp2_dma 5&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp2_i2c1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp2_i2c1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blsp2_spi2: spi@7af6000 {</div><div class='add'>+			compatible = "qcom,spi-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x07af6000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_QUP2_SPI_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp2_dma 6&gt;, &lt;&amp;blsp2_dma 7&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blsp2_spi2_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;blsp2_spi2_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb: usb@78db000 {</div><div class='add'>+			compatible = "qcom,ci-hdrc";</div><div class='add'>+			reg = &lt;0x078db000 0x200&gt;,</div><div class='add'>+			      &lt;0x078db200 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB_HS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB_HS_SYSTEM_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "core";</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB_HS_SYSTEM_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB_HS_BCR&gt;;</div><div class='add'>+			reset-names = "core";</div><div class='add'>+			phy_type = "ulpi";</div><div class='add'>+			dr_mode = "otg";</div><div class='add'>+			hnp-disable;</div><div class='add'>+			srp-disable;</div><div class='add'>+			adp-disable;</div><div class='add'>+			ahb-burst-config = &lt;0&gt;;</div><div class='add'>+			phy-names = "usb-phy";</div><div class='add'>+			phys = &lt;&amp;usb_hs_phy&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcnss: remoteproc@a204000 {</div><div class='add'>+			compatible = "qcom,pronto-v3-pil", "qcom,pronto";</div><div class='add'>+			reg = &lt;0x0a204000 0x2000&gt;,</div><div class='add'>+			      &lt;0x0a202000 0x1000&gt;,</div><div class='add'>+			      &lt;0x0a21b000 0x3000&gt;;</div><div class='add'>+			reg-names = "ccu", "dxe", "pmu";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;wcnss_mem&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmpd MSM8917_VDDCX&gt;,</div><div class='add'>+					&lt;&amp;rpmpd MSM8917_VDDMX&gt;;</div><div class='add'>+			power-domain-names = "cx", "mx";</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;wcnss_smp2p_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;wcnss_pin_a&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			wcnss_iris: iris {</div><div class='add'>+				clocks = &lt;&amp;rpmcc RPM_SMD_RF_CLK2&gt;;</div><div class='add'>+				clock-names = "xo";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			smd-edge {</div><div class='add'>+				interrupts = &lt;GIC_SPI 142 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+				mboxes = &lt;&amp;apcs 17&gt;;</div><div class='add'>+				qcom,smd-edge = &lt;6&gt;;</div><div class='add'>+				qcom,remote-pid = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				label = "pronto";</div><div class='add'>+</div><div class='add'>+				wcnss_ctrl: wcnss {</div><div class='add'>+					compatible = "qcom,wcnss";</div><div class='add'>+					qcom,smd-channels = "WCNSS_CTRL";</div><div class='add'>+</div><div class='add'>+					qcom,mmio = &lt;&amp;wcnss&gt;;</div><div class='add'>+</div><div class='add'>+					wcnss_bt: bluetooth {</div><div class='add'>+						compatible = "qcom,wcnss-bt";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					wcnss_wifi: wifi {</div><div class='add'>+						compatible = "qcom,wcnss-wlan";</div><div class='add'>+</div><div class='add'>+						interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+							     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+						interrupt-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+						qcom,smem-states = &lt;&amp;apps_smsm 10&gt;, &lt;&amp;apps_smsm 9&gt;;</div><div class='add'>+						qcom,smem-state-names = "tx-enable",</div><div class='add'>+									"tx-rings-empty";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@b000000 {</div><div class='add'>+			compatible = "qcom,msm-qgic2";</div><div class='add'>+			reg = &lt;0x0b000000 0x1000&gt;,</div><div class='add'>+			      &lt;0x0b002000 0x1000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apcs: mailbox@b011000 {</div><div class='add'>+			compatible = "qcom,msm8939-apcs-kpss-global", "syscon";</div><div class='add'>+			reg = &lt;0x0b011000 0x1000&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;a53pll&gt;, &lt;&amp;gcc GPLL0_EARLY&gt;, &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+			clock-names = "pll", "aux", "ref";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		a53pll: clock@b016000 {</div><div class='add'>+			compatible = "qcom,msm8939-a53pll";</div><div class='add'>+			reg = &lt;0x0b016000 0x40&gt;;</div><div class='add'>+			clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;pll_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			pll_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-960000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;960000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1094400000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1094400000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1248000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1248000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1401600000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1401600000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@b017000 {</div><div class='add'>+			compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt";</div><div class='add'>+			reg = &lt;0x0b017000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@b120000 {</div><div class='add'>+			compatible = "arm,armv7-timer-mem";</div><div class='add'>+			reg = &lt;0x0b120000 0x1000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			frame@b121000 {</div><div class='add'>+				reg = &lt;0x0b121000 0x1000&gt;,</div><div class='add'>+				      &lt;0x0b122000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b123000 {</div><div class='add'>+				reg = &lt;0x0b123000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;1&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b124000 {</div><div class='add'>+				reg = &lt;0x0b124000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b125000 {</div><div class='add'>+				reg = &lt;0x0b125000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;3&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b126000 {</div><div class='add'>+				reg = &lt;0x0b126000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;4&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b127000 {</div><div class='add'>+				reg = &lt;0x0b127000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;5&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@b128000 {</div><div class='add'>+				reg = &lt;0x0b128000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;6&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_zones: thermal-zones {</div><div class='add'>+		aoss-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				aoss_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				camera_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 4&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpuss1_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpuss1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpuss1_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpuss1_crit: cpuss1-crit {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 5&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu0_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu0_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu0_crit: cpu-crit {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 6&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu1_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu1_crit: cpu-crit {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 7&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu2_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu2_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu2_crit: cpu-crit {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 8&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu3_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu3_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu3_crit: cpu-crit {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 9&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpu_alert&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu_alert: trip-point0 {</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpu_crit: gpu-crit {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdm-core-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				mdm_core_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				q6_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts b/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts<br/>index 3cec51891aed..18381a66daef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts</a></div><div class='hunk'>@@ -126,6 +126,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts b/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts<br/>index b845da4fa23e..13422a19c26a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts</a></div><div class='hunk'>@@ -243,6 +243,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts b/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts<br/>index ceba6e73b211..07613080e79e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts</a></div><div class='hunk'>@@ -373,6 +373,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi b/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi<br/>index 800e0747a2f7..a5187355f9fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8939-wingtech-wt82918.dtsi</a></div><div class='hunk'>@@ -126,6 +126,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;blsp_uart2_console_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;blsp_uart2_console_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi<br/>index 28634789a8a9..eb64ec35e7f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8939.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8939.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8939.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (c) 2020-2023, Linaro Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8939.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,msm8939.h&gt;</div><div class='hunk'>@@ -34,7 +35,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -42,122 +43,130 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@100 {</div><div class='add'>+		cpu0: cpu@100 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw0&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs1_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@101 {</div><div class='add'>+		cpu1: cpu@101 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x101&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc1&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw1&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs1_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@102 {</div><div class='add'>+		cpu2: cpu@102 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x102&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc2&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw2&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs1_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@103 {</div><div class='add'>+		cpu3: cpu@103 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x103&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc3&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw3&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs1_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@0 {</div><div class='add'>+		cpu4: cpu@0 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc4&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw4&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs0_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@1 {</div><div class='add'>+		cpu5: cpu@1 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc5&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw5&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs0_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@2 {</div><div class='add'>+		cpu6: cpu@2 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc6&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw6&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs0_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@3 {</div><div class='add'>+		cpu7: cpu@3 {</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "spin-table";</div><div class='add'>+			cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,acc = &lt;&amp;acc7&gt;;</div><div class='ctx'> 			qcom,saw = &lt;&amp;saw7&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs0_mbox&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		idle-states {</div><div class='del'>-			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;130&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;150&gt;;</div><div class='hunk'>@@ -182,19 +191,19 @@</div><div class='ctx'> 		/* LITTLE (efficiency) cluster */</div><div class='ctx'> 		cluster0 {</div><div class='ctx'> 			core0 {</div><div class='del'>-				cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core1 {</div><div class='del'>-				cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core2 {</div><div class='del'>-				cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core3 {</div><div class='del'>-				cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -202,19 +211,19 @@</div><div class='ctx'> 		/* Boot CPU is cluster 1 core 0 */</div><div class='ctx'> 		cluster1 {</div><div class='ctx'> 			core0 {</div><div class='del'>-				cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core1 {</div><div class='del'>-				cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core2 {</div><div class='del'>-				cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			core3 {</div><div class='del'>-				cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+				cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -248,7 +257,7 @@</div><div class='ctx'> </div><div class='ctx'> 		smd-edge {</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			mboxes = &lt;&amp;apcs1_mbox 0&gt;;</div><div class='add'>+			qcom,ipc = &lt;&amp;apcs1_mbox 8 0&gt;;</div><div class='ctx'> 			qcom,smd-edge = &lt;15&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpm_requests: rpm-requests {</div><div class='hunk'>@@ -896,28 +905,50 @@</div><div class='ctx'> 				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart1_default: blsp-uart1-default-state {</div><div class='del'>-				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='del'>-				function = "blsp_uart1";</div><div class='del'>-				drive-strength = &lt;16&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+			blsp_uart1_console_default: blsp-uart1-console-default-state {</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio0";</div><div class='add'>+					function = "blsp_uart1";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio1";</div><div class='add'>+					function = "blsp_uart1";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart1_sleep: blsp-uart1-sleep-state {</div><div class='del'>-				pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+			blsp_uart1_console_sleep: blsp-uart1-console-sleep-state {</div><div class='add'>+				pins = "gpio0", "gpio1";</div><div class='ctx'> 				function = "gpio";</div><div class='ctx'> 				drive-strength = &lt;2&gt;;</div><div class='ctx'> 				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart2_default: blsp-uart2-default-state {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-				drive-strength = &lt;16&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+			blsp_uart2_console_default: blsp-uart2-console-default-state {</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio4";</div><div class='add'>+					function = "blsp_uart2";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio5";</div><div class='add'>+					function = "blsp_uart2";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					bootph-all;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			blsp_uart2_sleep: blsp-uart2-sleep-state {</div><div class='add'>+			blsp_uart2_console_sleep: blsp-uart2-console-sleep-state {</div><div class='ctx'> 				pins = "gpio4", "gpio5";</div><div class='ctx'> 				function = "gpio";</div><div class='ctx'> 				drive-strength = &lt;2&gt;;</div><div class='hunk'>@@ -1172,8 +1203,8 @@</div><div class='ctx'> 			reg = &lt;0x01800000 0x80000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='hunk'>@@ -1218,6 +1249,8 @@</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='ctx'> </div><div class='add'>+			resets = &lt;&amp;gcc GCC_MDSS_BCR&gt;;</div><div class='add'>+</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1291,8 +1324,8 @@</div><div class='ctx'> 					      "core";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1360,8 +1393,8 @@</div><div class='ctx'> 					      "core";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi1_phy&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -1761,9 +1794,6 @@</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='ctx'> 			dmas = &lt;&amp;blsp_dma 0&gt;, &lt;&amp;blsp_dma 1&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='del'>-			pinctrl-0 = &lt;&amp;blsp_uart1_default&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;blsp_uart1_sleep&gt;;</div><div class='del'>-			pinctrl-names = "default", "sleep";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1775,9 +1805,6 @@</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='ctx'> 			dmas = &lt;&amp;blsp_dma 2&gt;, &lt;&amp;blsp_dma 3&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='del'>-			pinctrl-0 = &lt;&amp;blsp_uart2_default&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;blsp_uart2_sleep&gt;;</div><div class='del'>-			pinctrl-names = "default", "sleep";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2318,10 +2345,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2348,10 +2375,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2378,10 +2405,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2408,10 +2435,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2438,10 +2465,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4567_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts<br/>new file mode 100644<br/>index 000000000000..ef4faf763132<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Cristian Cozzolino</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "msm8953.dtsi"</div><div class='add'>+#include "pm8953.dtsi"</div><div class='add'>+#include "pmi8950.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;cont_splash_mem;</div><div class='add'>+/delete-node/ &amp;qseecom_mem;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Billion Capture+";</div><div class='add'>+	compatible = "flipkart,rimob", "qcom,msm8953";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+	qcom,msm-id = &lt;293 0&gt;;</div><div class='add'>+	qcom,board-id = &lt;0x340008 0&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer@90001000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0x90001000 0 (1920 * 1080 * 3)&gt;;</div><div class='add'>+</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;1920&gt;;</div><div class='add'>+			stride = &lt;(1080 * 3)&gt;;</div><div class='add'>+			format = "r8g8b8";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_ESC0_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio_key_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;tlmm 85 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		qseecom_mem: qseecom@84a00000 {</div><div class='add'>+			reg = &lt;0x0 0x84a00000 0x0 0x1900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: cont-splash@90001000 {</div><div class='add'>+			reg = &lt;0x0 0x90001000 0x0 (1080 * 1920 * 3)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;hsusb_phy {</div><div class='add'>+	vdd-supply = &lt;&amp;pm8953_l3&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm8953_l7&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;pm8953_l13&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8953_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "qcom,rpm-pm8953-regulators";</div><div class='add'>+		vdd_s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_l1-supply = &lt;&amp;pm8953_s3&gt;;</div><div class='add'>+		vdd_l2_l3-supply = &lt;&amp;pm8953_s3&gt;;</div><div class='add'>+		vdd_l4_l5_l6_l7_l16_l19-supply = &lt;&amp;pm8953_s4&gt;;</div><div class='add'>+		vdd_l8_l11_l12_l13_l14_l15-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_l9_l10_l17_l18_l22-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_l23-supply = &lt;&amp;pm8953_s3&gt;;</div><div class='add'>+</div><div class='add'>+		pm8953_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;870000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1156000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1224000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1224000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;975000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;925000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l13: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;3125000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3125000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l19: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8953_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;975000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8953_l8&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8953_l5&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8953_l11&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8953_l12&gt;;</div><div class='add'>+</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_clk_on &amp;sdc2_cmd_on &amp;sdc2_data_on &amp;sdc2_cd_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_clk_off &amp;sdc2_cmd_off &amp;sdc2_data_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;0 4&gt;, &lt;135 4&gt;;</div><div class='add'>+</div><div class='add'>+	gpio_key_default: gpio-key-default-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts b/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts<br/>index 336b916729e4..ddd7af616794 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts</a></div><div class='hunk'>@@ -296,7 +296,7 @@</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pm8953_l11&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;pm8953_l12&gt;;</div><div class='ctx'> </div><div class='del'>-	cd-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdc2_clk_on &amp;sdc2_cmd_on &amp;sdc2_data_on &amp;sdc2_cd_on&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi<br/>index d20fd3d7c46e..76317c578349 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8953.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8953.dtsi</a></div><div class='hunk'>@@ -1,9 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /* Copyright (c) 2022, The Linux Foundation. All rights reserved. */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8953.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,msm8953.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,rpm-icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='hunk'>@@ -38,125 +41,141 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache-0 {</div><div class='add'>+		l2_0: l2-cache-0 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_1: l2-cache-1 {</div><div class='add'>+		l2_1: l2-cache-1 {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -470,6 +489,13 @@</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		bimc: interconnect@400000 {</div><div class='add'>+			compatible = "qcom,msm8953-bimc";</div><div class='add'>+			reg = &lt;0x00400000 0x5a000&gt;;</div><div class='add'>+</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tsens0: thermal-sensor@4a9000 {</div><div class='ctx'> 			compatible = "qcom,msm8953-tsens", "qcom,tsens-v2";</div><div class='ctx'> 			reg = &lt;0x004a9000 0x1000&gt;, /* TM */</div><div class='hunk'>@@ -486,6 +512,29 @@</div><div class='ctx'> 			reg = &lt;0x004ab000 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcnoc: interconnect@500000 {</div><div class='add'>+			compatible = "qcom,msm8953-pcnoc";</div><div class='add'>+			reg = &lt;0x00500000 0x12080&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCNOC_USB3_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "pcnoc_usb3_axi";</div><div class='add'>+</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		snoc: interconnect@580000 {</div><div class='add'>+			compatible = "qcom,msm8953-snoc";</div><div class='add'>+			reg = &lt;0x00580000 0x16080&gt;;</div><div class='add'>+</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			snoc_mm: interconnect-snoc {</div><div class='add'>+				compatible = "qcom,msm8953-snoc-mm";</div><div class='add'>+</div><div class='add'>+				#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tlmm: pinctrl@1000000 {</div><div class='ctx'> 			compatible = "qcom,msm8953-pinctrl";</div><div class='ctx'> 			reg = &lt;0x01000000 0x300000&gt;;</div><div class='hunk'>@@ -726,42 +775,142 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_3_default: spi-3-default-state {</div><div class='del'>-				pins = "gpio10", "gpio11";</div><div class='del'>-				function = "blsp_spi3";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio10";</div><div class='add'>+					function = "blsp_spi3";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio8", "gpio9", "gpio11";</div><div class='add'>+					function = "blsp_spi3";</div><div class='add'>+					drive-strength = &lt;12&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_3_sleep: spi-3-sleep-state {</div><div class='del'>-				pins = "gpio10", "gpio11";</div><div class='del'>-				function = "gpio";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio10";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio8", "gpio9", "gpio11";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_5_default: spi-5-default-state {</div><div class='del'>-				pins = "gpio18", "gpio19";</div><div class='del'>-				function = "blsp_spi5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio18";</div><div class='add'>+					function = "blsp_spi5";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio16", "gpio17", "gpio19";</div><div class='add'>+					function = "blsp_spi5";</div><div class='add'>+					drive-strength = &lt;12&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_5_sleep: spi-5-sleep-state {</div><div class='del'>-				pins = "gpio18", "gpio19";</div><div class='del'>-				function = "gpio";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio18";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio16", "gpio17", "gpio19";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_6_default: spi-6-default-state {</div><div class='del'>-				pins = "gpio22", "gpio23";</div><div class='del'>-				function = "blsp_spi6";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio22";</div><div class='add'>+					function = "blsp_spi6";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio20", "gpio21", "gpio23";</div><div class='add'>+					function = "blsp_spi6";</div><div class='add'>+					drive-strength = &lt;12&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			spi_6_sleep: spi-6-sleep-state {</div><div class='del'>-				pins = "gpio22", "gpio23";</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio22";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio20", "gpio21", "gpio23";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_7_default: spi-7-default-state {</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio136";</div><div class='add'>+					function = "blsp_spi7";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio135", "gpio137", "gpio138";</div><div class='add'>+					function = "blsp_spi7";</div><div class='add'>+					drive-strength = &lt;12&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi_7_sleep: spi-7-sleep-state {</div><div class='add'>+				cs-pins {</div><div class='add'>+					pins = "gpio136";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				spi-pins {</div><div class='add'>+					pins = "gpio135", "gpio137", "gpio138";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart_5_default: uart-5-default-state {</div><div class='add'>+				pins = "gpio16", "gpio17", "gpio18", "gpio19";</div><div class='add'>+				function = "blsp_uart5";</div><div class='add'>+				drive-strength = &lt;16&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart_5_sleep: uart-5-sleep-state {</div><div class='add'>+				pins = "gpio16", "gpio17", "gpio18", "gpio19";</div><div class='ctx'> 				function = "gpio";</div><div class='ctx'> 				drive-strength = &lt;2&gt;;</div><div class='ctx'> 				bias-disable;</div><div class='hunk'>@@ -807,10 +956,10 @@</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;;</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo",</div><div class='ctx'> 				      "sleep",</div><div class='ctx'> 				      "dsi0pll",</div><div class='hunk'>@@ -849,6 +998,13 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;snoc_mm MAS_MDP RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;pcnoc SLV_DISP_SS_CFG RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			interconnect-names = "mdp0-mem",</div><div class='add'>+					     "cpu-cfg";</div><div class='add'>+</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;,</div><div class='hunk'>@@ -917,8 +1073,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -987,8 +1143,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -1065,6 +1221,11 @@</div><div class='ctx'> 				      "alwayson";</div><div class='ctx'> 			power-domains = &lt;&amp;gcc OXILI_GX_GDSC&gt;;</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;bimc MAS_OXILI RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;pcnoc SLV_GPU_CFG RPM_ACTIVE_TAG&gt;;</div><div class='add'>+</div><div class='ctx'> 			iommus = &lt;&amp;gpu_iommu 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1072,7 +1233,7 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			zap-shader {</div><div class='add'>+			gpu_zap_shader: zap-shader {</div><div class='ctx'> 				memory-region = &lt;&amp;zap_shader_region&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1302,6 +1463,13 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;133330000&gt;;</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;pcnoc MAS_USB3 RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;pcnoc SLV_USB3 RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr",</div><div class='add'>+					     "apps-usb";</div><div class='add'>+</div><div class='ctx'> 			power-domains = &lt;&amp;gcc USB30_GDSC&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,select-utmi-as-pipe-clk;</div><div class='hunk'>@@ -1354,6 +1522,13 @@</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo";</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;pcnoc MAS_SDCC_1 RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;pcnoc SLV_SDCC_1 RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='ctx'> 			power-domains = &lt;&amp;rpmpd MSM8953_VDDCX&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;sdhc1_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1374,26 +1549,36 @@</div><div class='ctx'> </div><div class='ctx'> 				opp-25000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;25000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;200000&gt;, &lt;100000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;65360&gt;, &lt;32768&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_low_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-50000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;400000&gt;, &lt;200000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;130718&gt;, &lt;65360&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-100000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;400000&gt;, &lt;400000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;130718&gt;, &lt;65360&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-192000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;192000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;, &lt;600000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;261438&gt;, &lt;130718&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_nom&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-384000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;384000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;, &lt;800000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;261438&gt;, &lt;300000&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_nom&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1414,6 +1599,13 @@</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo";</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;pcnoc MAS_SDCC_2 RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLV_EBI RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MAS_APPS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;pcnoc SLV_SDCC_2 RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='ctx'> 			power-domains = &lt;&amp;rpmpd MSM8953_VDDCX&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;sdhc2_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1430,26 +1622,36 @@</div><div class='ctx'> </div><div class='ctx'> 				opp-25000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;25000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;200000&gt;, &lt;100000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;65360&gt;, &lt;32768&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_low_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-50000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;400000&gt;, &lt;400000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;130718&gt;, &lt;65360&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-100000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;, &lt;400000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;130718&gt;, &lt;130718&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-177770000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;177770000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;600000&gt;, &lt;600000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;261438&gt;, &lt;130718&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_nom&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-200000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;, &lt;800000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;261438&gt;, &lt;130718&gt;;</div><div class='ctx'> 					required-opps = &lt;&amp;rpmpd_opp_nom&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1544,7 +1746,7 @@</div><div class='ctx'> 			reg = &lt;0x078b7000 0x600&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_BLSP1_QUP3_I2C_APPS_CLK&gt;,</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP1_QUP3_SPI_APPS_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='ctx'> 			dmas = &lt;&amp;blsp1_dma 8&gt;, &lt;&amp;blsp1_dma 9&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='hunk'>@@ -1592,6 +1794,24 @@</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		uart_5: serial@7aef000 {</div><div class='add'>+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+			reg = &lt;0x07aef000 0x200&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_UART1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "iface";</div><div class='add'>+			dmas = &lt;&amp;blsp2_dma 0&gt;, &lt;&amp;blsp2_dma 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart_5_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;uart_5_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c_5: i2c@7af5000 {</div><div class='ctx'> 			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='ctx'> 			reg = &lt;0x07af5000 0x600&gt;;</div><div class='hunk'>@@ -1617,7 +1837,7 @@</div><div class='ctx'> 			reg = &lt;0x07af5000 0x600&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_BLSP2_QUP1_I2C_APPS_CLK&gt;,</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_QUP1_SPI_APPS_CLK&gt;,</div><div class='ctx'> 				&lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='ctx'> 			dmas = &lt;&amp;blsp2_dma 4&gt;, &lt;&amp;blsp2_dma 5&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='hunk'>@@ -1657,7 +1877,7 @@</div><div class='ctx'> 			reg = &lt;0x07af6000 0x600&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clock-names = "core", "iface";</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_BLSP2_QUP2_I2C_APPS_CLK&gt;,</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_QUP2_SPI_APPS_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='ctx'> 			dmas = &lt;&amp;blsp2_dma 6&gt;, &lt;&amp;blsp2_dma 7&gt;;</div><div class='ctx'> 			dma-names = "tx", "rx";</div><div class='hunk'>@@ -1692,6 +1912,26 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi_7: spi@7af7000 {</div><div class='add'>+			compatible = "qcom,spi-qup-v2.2.1";</div><div class='add'>+			reg = &lt;0x07af7000 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-names = "core", "iface";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_BLSP2_QUP3_SPI_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;blsp2_dma 8&gt;, &lt;&amp;blsp2_dma 9&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi_7_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;spi_7_sleep&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c_8: i2c@7af8000 {</div><div class='ctx'> 			compatible = "qcom,i2c-qup-v2.2.1";</div><div class='ctx'> 			reg = &lt;0x07af8000 0x600&gt;;</div><div class='hunk'>@@ -1932,19 +2172,19 @@</div><div class='ctx'> 							#sound-dai-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 							dai@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 								direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> 							dai@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 								direction = &lt;Q6ASM_DAI_TX&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> 							dai@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 								direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> 							dai@3 {</div><div class='del'>-								reg = &lt;3&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 								direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='ctx'> 								is-compress-dai;</div><div class='ctx'> 							};</div><div class='hunk'>@@ -1985,7 +2225,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2009,7 +2249,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2033,7 +2273,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2057,7 +2297,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2079,7 +2319,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2101,7 +2341,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2123,7 +2363,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2145,7 +2385,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_alert&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts b/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts<br/>new file mode 100644<br/>index 000000000000..18832a3b9a1c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts</a></div><div class='hunk'>@@ -0,0 +1,496 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, André Apitzsch &lt;git@apitzsch.eu&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "msm8976.dtsi"</div><div class='add'>+#include "pm8004.dtsi"</div><div class='add'>+#include "pm8950.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "BQ Aquaris X5 Plus (Longcheer L9360)";</div><div class='add'>+	compatible = "longcheer,l9360", "qcom,msm8976";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1; /* SDC1 eMMC slot */</div><div class='add'>+		mmc1 = &amp;sdhc_2; /* SDC2 SD card slot */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@83200000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x83200000 0x0 (1080 * 1920 * 3)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;1920&gt;;</div><div class='add'>+			stride = &lt;(1080 * 3)&gt;;</div><div class='add'>+			format = "r8g8b8";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_MDSS_ESC0_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_sensor_default&gt;, &lt;&amp;volume_up_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		event-hall-sensor {</div><div class='add'>+			label = "Hall Effect Sensor";</div><div class='add'>+			gpios = &lt;&amp;tlmm 107 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;tlmm 113 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_KBD_BACKLIGHT;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;button_backlight_default&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_ts_vdd: regulator-vdd-ts {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "regulator-vdd-ts";</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 33 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		framebuffer@83000000 {</div><div class='add'>+			reg = &lt;0x0 0x83000000 0x0 0x2800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph-pwr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-controller@30 {</div><div class='add'>+		compatible = "kinetic,ktd2026";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		multi-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			led@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			led@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nfc@28 {</div><div class='add'>+		compatible = "nxp,pn547", "nxp,nxp-nci-i2c";</div><div class='add'>+		reg = &lt;0x28&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 140 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 122 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		firmware-gpios = &lt;&amp;tlmm 109 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nfc_default&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;nfc_sleep&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@20 {</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		compatible = "syna,rmi4-i2c";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 65 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int_default&gt;, &lt;&amp;ts_reset_default&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;ts_int_sleep&gt;, &lt;&amp;ts_reset_sleep&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;pm8950_l6&gt;;</div><div class='add'>+		vio-supply = &lt;&amp;reg_ts_vdd&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		syna,reset-delay-ms = &lt;200&gt;;</div><div class='add'>+		syna,startup-delay-ms = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		rmi4-f01@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			syna,nosleep-mode = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f12@12 {</div><div class='add'>+			reg = &lt;0x12&gt;;</div><div class='add'>+			syna,sensor-type = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmi4-f1a@1a {</div><div class='add'>+			reg = &lt;0x1a&gt;;</div><div class='add'>+			/* Keys listed from right to left */</div><div class='add'>+			linux,keycodes = &lt;KEY_APPSELECT KEY_HOMEPAGE KEY_BACK&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp2_uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gcc {</div><div class='add'>+	vdd_gfx-supply = &lt;&amp;pm8004_s5&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8004_spmi_regulators {</div><div class='add'>+	vdd_s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+	vdd_s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+	/* Cluster 1 supply */</div><div class='add'>+	pm8004_s2: s2 {</div><div class='add'>+		/* regulator-min-microvolt = &lt;500000&gt;; */</div><div class='add'>+		/* Set .95V to prevent unstabilities until CPR for this SoC is done */</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1165000&gt;;</div><div class='add'>+		regulator-name = "vdd_apc1";</div><div class='add'>+		/* Set always on until the CPU PLL is done */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pm8004_s5: s5 {</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1165000&gt;;</div><div class='add'>+		regulator-enable-ramp-delay = &lt;500&gt;;</div><div class='add'>+		regulator-name = "vdd_gfx";</div><div class='add'>+		/* Hack this on until the gpu driver is ready for it */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8950_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8950_spmi_regulators {</div><div class='add'>+	vdd_s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+	/* Cluster 0 supply */</div><div class='add'>+	pm8950_spmi_s5: s5 {</div><div class='add'>+		/* Set .95V to prevent unstabilities until CPR for this SoC is done */</div><div class='add'>+		/* regulator-min-microvolt = &lt;500000&gt;; */</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1165000&gt;;</div><div class='add'>+		regulator-name = "vdd_apc0";</div><div class='add'>+		/* Set always on until the CPU PLL is done */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	pm8950_regulators: regulators {</div><div class='add'>+		compatible = "qcom,rpm-pm8950-regulators";</div><div class='add'>+</div><div class='add'>+		vdd_s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd_l1_l19-supply = &lt;&amp;pm8950_s3&gt;;</div><div class='add'>+		vdd_l2_l23-supply = &lt;&amp;pm8950_s3&gt;;</div><div class='add'>+		vdd_l3-supply = &lt;&amp;pm8950_s3&gt;;</div><div class='add'>+		vdd_l5_l6_l7_l16-supply = &lt;&amp;pm8950_s4&gt;;</div><div class='add'>+		vdd_l8_l11_l12_l17_l22-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		pm8950_s1: s1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1162500&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_s3: s3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1325000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1325000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_s4: s4 {</div><div class='add'>+			regulator-min-microvolt = &lt;2050000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2050000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l1: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l2: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l3: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l5: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l6: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l7: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l8: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l9: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l10: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l11: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l12: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l13: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;3075000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l14: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l15: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l16: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l17: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l19: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l22: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8950_l23: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8950_l8&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8950_l5&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 100 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;pm8950_l11&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;pm8950_l12&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default&gt;, &lt;&amp;sdc2_cd_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep&gt;, &lt;&amp;sdc2_cd_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;0 4&gt;;</div><div class='add'>+</div><div class='add'>+	button_backlight_default: button-backlight-default-state {</div><div class='add'>+		pins = "gpio101";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_sensor_default: hall-sensor-default-state {</div><div class='add'>+		pins = "gpio107";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;6&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_default: nfc-default-state {</div><div class='add'>+		pins = "gpio122", "gpio140";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;6&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_sleep: nfc-sleep-state {</div><div class='add'>+		int-pins {</div><div class='add'>+			pins = "gpio140";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+		ven-pins {</div><div class='add'>+			pins = "gpio122";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;6&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_cd_default: sdc2-cd-default-state {</div><div class='add'>+		pins = "gpio100";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_cd_sleep: sdc2-cd-sleep-state {</div><div class='add'>+		pins = "gpio100";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int_default: ts-int-state {</div><div class='add'>+		pins = "gpio65";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int_sleep: ts-int-state {</div><div class='add'>+		pins = "gpio65";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_reset_default: ts-reset-state {</div><div class='add'>+		pins = "gpio64";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_reset_sleep: ts-sleep-state {</div><div class='add'>+		pins = "gpio64";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	volume_up_default: volume-up-default-state {</div><div class='add'>+		pins = "gpio113";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board {</div><div class='add'>+	clock-frequency = &lt;19200000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi<br/>index 06af6e5ec578..f9962512f243 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8976.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8976.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8976.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8976.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  * Copyright (c) 2022, Marijn Suijten &lt;marijn.suijten@somainline.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8976.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -31,7 +32,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0&gt;;</div><div class='hunk'>@@ -42,7 +43,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x1&gt;;</div><div class='hunk'>@@ -53,7 +54,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x2&gt;;</div><div class='hunk'>@@ -64,7 +65,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x3&gt;;</div><div class='hunk'>@@ -75,7 +76,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a72";</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='hunk'>@@ -86,7 +87,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a72";</div><div class='ctx'> 			reg = &lt;0x101&gt;;</div><div class='hunk'>@@ -97,7 +98,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a72";</div><div class='ctx'> 			reg = &lt;0x102&gt;;</div><div class='hunk'>@@ -108,7 +109,7 @@</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a72";</div><div class='ctx'> 			reg = &lt;0x103&gt;;</div><div class='hunk'>@@ -122,37 +123,37 @@</div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -781,6 +782,42 @@</div><div class='ctx'> 				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			sdc2_default: sdc2-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+				};</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_sleep: sdc2-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			wcss_wlan_default: wcss-wlan-default-state  {</div><div class='ctx'> 				wcss-wlan2-pins {</div><div class='ctx'> 					pins = "gpio40";</div><div class='hunk'>@@ -824,10 +861,10 @@</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_XO_A_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;;</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;;</div><div class='ctx'> 			clock-names = "xo",</div><div class='ctx'> 				      "xo_a",</div><div class='ctx'> 				      "dsi0pll",</div><div class='hunk'>@@ -970,8 +1007,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc GCC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc GCC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1046,8 +1083,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;gcc GCC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;gcc GCC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi1_phy&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1193,7 +1230,7 @@</div><div class='ctx'> 		apps_iommu: iommu@1ee0000 {</div><div class='ctx'> 			compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2";</div><div class='ctx'> 			reg = &lt;0x01ee0000 0x3000&gt;;</div><div class='del'>-			ranges  = &lt;0 0x01e20000 0x20000&gt;;</div><div class='add'>+			ranges = &lt;0 0x01e20000 0x20000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_APSS_TCU_CLK&gt;;</div><div class='hunk'>@@ -1330,6 +1367,7 @@</div><div class='ctx'> 			clock-names = "bam_clk";</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		blsp1_uart1: serial@78af000 {</div><div class='hunk'>@@ -1450,6 +1488,7 @@</div><div class='ctx'> 			clock-names = "bam_clk";</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		blsp2_uart2: serial@7af0000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts b/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts<br/>index 38b305816d2f..6a231afad85d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts</a></div><div class='hunk'>@@ -91,28 +91,34 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU0 {</div><div class='add'>+&amp;cpu0 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='add'>+&amp;cpu1 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='add'>+&amp;cpu2 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='add'>+&amp;cpu3 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='add'>+&amp;cpu4 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='add'>+&amp;cpu5 {</div><div class='ctx'> 	enable-method = "spin-table";</div><div class='add'>+	cpu-release-addr = /bits/ 64 &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8994_resin {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts<br/>index 133f9c2540bc..d0290a20b888 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts</a></div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm8994_spmi_regulators {</div><div class='del'>-	VDD_APC0: s8 {</div><div class='add'>+	s8 {</div><div class='ctx'> 		regulator-min-microvolt = &lt;680000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1180000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -183,7 +183,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* APC1 is 3-phase, but quoting downstream, s11 is "the gang leader" */</div><div class='del'>-	VDD_APC1: s11 {</div><div class='add'>+	s11 {</div><div class='ctx'> 		regulator-min-microvolt = &lt;700000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1225000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi<br/>index 02fc3795dbfd..b2dc46c25fa2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8992.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8992.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8992.dtsi</a></div><div class='hunk'>@@ -6,8 +6,8 @@</div><div class='ctx'> #include "msm8994.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* 8992 only features 2 A57 cores. */</div><div class='del'>-/delete-node/ &amp;CPU6;</div><div class='del'>-/delete-node/ &amp;CPU7;</div><div class='add'>+/delete-node/ &amp;cpu6;</div><div class='add'>+/delete-node/ &amp;cpu7;</div><div class='ctx'> /delete-node/ &amp;cpu6_map;</div><div class='ctx'> /delete-node/ &amp;cpu7_map;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts<br/>index 29e79ae0849d..1aca11daf83c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts</a></div><div class='hunk'>@@ -2,12 +2,13 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2015, Huawei Inc. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2016, The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023, Petr Vorel &lt;petr.vorel@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2021-2024, Petr Vorel &lt;petr.vorel@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "msm8994.dtsi"</div><div class='add'>+#include "pm8994.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Huawei Nexus 6P";</div><div class='hunk'>@@ -46,6 +47,24 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "volume up";</div><div class='add'>+			gpios = &lt;&amp;pm8994_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8994_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp1_uart2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi<br/>index 10cd244dea4f..4c983b10dd92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi</a></div><div class='hunk'>@@ -387,11 +387,6 @@</div><div class='ctx'> </div><div class='ctx'> 		interrupts = &lt;&amp;tlmm 96 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> </div><div class='del'>-		button_num = &lt;8&gt;;</div><div class='del'>-		touchpad_num = &lt;0&gt;;</div><div class='del'>-		wheel_num = &lt;0&gt;;</div><div class='del'>-		slider_num = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'> 		vcc-supply = &lt;&amp;vreg_l18a_2p85&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi<br/>index fc2a7f13f690..b5cbdd620bb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8994.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8994.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8994.dtsi</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			clock-output-names = "sleep_clk";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -43,114 +43,114 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a57";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a57";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a57";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a57";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpu6_map: core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpu7_map: core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -437,6 +437,15 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "qusb2_phy",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='add'>+</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_USB30_MASTER_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_SYS_NOC_USB3_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_SLEEP_CLK&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi<br/>index 38035e0db80b..63ab564655bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996-oneplus-common.dtsi</a></div><div class='hunk'>@@ -288,15 +288,15 @@</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -492,6 +492,11 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		vreg_lvs2a: lvs2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts b/arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts<br/>index dfe75119b8d2..220eeb31fdc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996-oneplus3.dts</a></div><div class='hunk'>@@ -41,6 +41,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;slpi_pil {</div><div class='ctx'> 	firmware-name = "qcom/msm8996/oneplus3/slpi.mbn";</div><div class='add'>+	px-supply = &lt;&amp;vreg_lvs2a&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts b/arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts<br/>index 51fce65e89f1..f772618e80c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996-oneplus3t.dts</a></div><div class='hunk'>@@ -42,6 +42,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;slpi_pil {</div><div class='ctx'> 	firmware-name = "qcom/msm8996/oneplus3t/slpi.mbn";</div><div class='add'>+	px-supply = &lt;&amp;vreg_lvs2a&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts<br/>index f8e9d90afab0..bd3f39e1b98f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led@1 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='ctx'> 			chan-name = "button-backlight1";</div><div class='ctx'> 			led-cur = /bits/ 8 &lt;0x32&gt;;</div><div class='ctx'> 			max-cur = /bits/ 8 &lt;0xc8&gt;;</div><div class='hunk'>@@ -137,15 +137,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -156,10 +156,7 @@</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "qcom,apq8096-sndcard";</div><div class='ctx'> 	model = "gemini";</div><div class='del'>-	audio-routing = "RX_BIAS", "MCLK",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL2",  "MultiMedia2 Playback",</div><div class='del'>-		"MultiMedia3 Capture", "MM_UL3";</div><div class='add'>+	audio-routing = "RX_BIAS", "MCLK";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi<br/>index e5966724f37c..c75b522f6eba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8996.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-msm8996.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='hunk'>@@ -43,90 +44,90 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;kryocc 0&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cbf MASTER_CBF_M4M &amp;cbf SLAVE_CBF_M4M&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;kryocc 0&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cbf MASTER_CBF_M4M &amp;cbf SLAVE_CBF_M4M&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@100 {</div><div class='add'>+		cpu2: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;kryocc 1&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cbf MASTER_CBF_M4M &amp;cbf SLAVE_CBF_M4M&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@101 {</div><div class='add'>+		cpu3: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;kryocc 1&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cbf MASTER_CBF_M4M &amp;cbf SLAVE_CBF_M4M&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -134,7 +135,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "standalone-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x00000004&gt;;</div><div class='hunk'>@@ -937,10 +938,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;xo_board&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GPLL0&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_MMSS_NOC_CFG_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;mdss_hdmi_phy&gt;;</div><div class='ctx'> 			clock-names = "xo",</div><div class='ctx'> 				      "gpll0",</div><div class='hunk'>@@ -1071,8 +1072,10 @@</div><div class='ctx'> 					      "core_mmss",</div><div class='ctx'> 					      "pixel",</div><div class='ctx'> 					      "core";</div><div class='del'>-				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;, &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1139,8 +1142,10 @@</div><div class='ctx'> 					      "core_mmss",</div><div class='ctx'> 					      "pixel",</div><div class='ctx'> 					      "core";</div><div class='del'>-				assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;, &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;mdss_dsi1_phy&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1905,14 +1910,28 @@</div><div class='ctx'> </div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "msi";</div><div class='add'>+				interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "msi0",</div><div class='add'>+						  "msi1",</div><div class='add'>+						  "msi2",</div><div class='add'>+						  "msi3",</div><div class='add'>+						  "msi4",</div><div class='add'>+						  "msi5",</div><div class='add'>+						  "msi6",</div><div class='add'>+						  "msi7";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-				interrupt-map = &lt;0 0 0 1 &amp;intc 0 244 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-						&lt;0 0 0 2 &amp;intc 0 245 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-						&lt;0 0 0 3 &amp;intc 0 247 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-						&lt;0 0 0 4 &amp;intc 0 248 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+				interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+						&lt;0 0 0 2 &amp;intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+						&lt;0 0 0 3 &amp;intc GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+						&lt;0 0 0 4 &amp;intc GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 				pinctrl-names = "default", "sleep";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pcie0_state_on&gt;;</div><div class='hunk'>@@ -1968,14 +1987,28 @@</div><div class='ctx'> </div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "msi";</div><div class='add'>+				interrupts = &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "msi0",</div><div class='add'>+						  "msi1",</div><div class='add'>+						  "msi2",</div><div class='add'>+						  "msi3",</div><div class='add'>+						  "msi4",</div><div class='add'>+						  "msi5",</div><div class='add'>+						  "msi6",</div><div class='add'>+						  "msi7";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-				interrupt-map = &lt;0 0 0 1 &amp;intc 0 272 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-						&lt;0 0 0 2 &amp;intc 0 273 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-						&lt;0 0 0 3 &amp;intc 0 274 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-						&lt;0 0 0 4 &amp;intc 0 275 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+				interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+						&lt;0 0 0 2 &amp;intc GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+						&lt;0 0 0 3 &amp;intc GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+						&lt;0 0 0 4 &amp;intc GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 				pinctrl-names = "default", "sleep";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pcie1_state_on&gt;;</div><div class='hunk'>@@ -2029,14 +2062,28 @@</div><div class='ctx'> </div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "msi";</div><div class='add'>+				interrupts = &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "msi0",</div><div class='add'>+						  "msi1",</div><div class='add'>+						  "msi2",</div><div class='add'>+						  "msi3",</div><div class='add'>+						  "msi4",</div><div class='add'>+						  "msi5",</div><div class='add'>+						  "msi6",</div><div class='add'>+						  "msi7";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-				interrupt-map = &lt;0 0 0 1 &amp;intc 0 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-						&lt;0 0 0 2 &amp;intc 0 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-						&lt;0 0 0 3 &amp;intc 0 144 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-						&lt;0 0 0 4 &amp;intc 0 145 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+				interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+						&lt;0 0 0 2 &amp;intc GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+						&lt;0 0 0 3 &amp;intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+						&lt;0 0 0 4 &amp;intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 				pinctrl-names = "default", "sleep";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;pcie2_state_on&gt;;</div><div class='hunk'>@@ -2829,7 +2876,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		etm@3840000 {</div><div class='hunk'>@@ -2839,7 +2886,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2858,7 +2905,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		etm@3940000 {</div><div class='hunk'>@@ -2868,7 +2915,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2923,7 +2970,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		etm@3a40000 {</div><div class='hunk'>@@ -2933,7 +2980,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2952,7 +2999,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		etm@3b40000 {</div><div class='hunk'>@@ -2962,7 +3009,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -3065,9 +3112,14 @@</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "hs_phy_irq", "ss_phy_irq";</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "qusb2_phy",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SYS_NOC_USB3_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_MASTER_CLK&gt;,</div><div class='hunk'>@@ -3714,6 +3766,7 @@</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@9bc0000 {</div><div class='ctx'> 			compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts<br/>index 5e3fd1637f44..443599a5a5dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts</a></div><div class='hunk'>@@ -87,15 +87,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts<br/>index 5e3b9130e9c2..33d84ac541e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-scorpio.dts</a></div><div class='hunk'>@@ -139,15 +139,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi b/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi<br/>index 3b7172aa4037..157c4f04564b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi</a></div><div class='hunk'>@@ -61,36 +61,36 @@</div><div class='ctx'>  * not advertised as enabled in ACPI, and enabling it in DT can cause boot</div><div class='ctx'>  * hangs.</div><div class='ctx'>  */</div><div class='del'>-&amp;CPU0 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu4 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu5 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU6 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu6 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU7 {</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+&amp;cpu7 {</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -128,6 +128,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8998_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qusb2phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts b/arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts<br/>index f1ceaedd9520..f5558495cb02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts</a></div><div class='hunk'>@@ -372,6 +372,7 @@</div><div class='ctx'> &amp;qusb2phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l1a_0p875&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;vreg_l24a_3p075&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts b/arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts<br/>index a105143bee4a..c11b972771c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts</a></div><div class='hunk'>@@ -3,12 +3,45 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include "msm8998-clamshell.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Lenovo Miix 630";</div><div class='ctx'> 	compatible = "lenovo,miix-630", "qcom,msm8998";</div><div class='ctx'> 	chassis-type = "convertible";</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;vol_up_pin_a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;blsp1_i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 125 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c5_hid_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp1_i2c6 {</div><div class='hunk'>@@ -27,11 +60,52 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8998_gpios {</div><div class='add'>+	vol_up_pin_a: vol-up-active-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_NO&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/msm8998/LENOVO/81F1/qcadsp8998.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;remoteproc_mss {</div><div class='ctx'> 	firmware-name = "qcom/msm8998/LENOVO/81F1/qcdsp1v28998.mbn",</div><div class='ctx'> 			"qcom/msm8998/LENOVO/81F1/qcdsp28998.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_slpi {</div><div class='add'>+	firmware-name = "qcom/msm8998/LENOVO/81F1/qcslpi8998.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc2 {</div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 95 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	i2c5_hid_active: i2c5-hid-active-state {</div><div class='add'>+		pins = "gpio125";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;venus {</div><div class='add'>+	firmware-name = "qcom/msm8998/LENOVO/81F1/qcvss8998.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	qcom,calibration-variant = "Lenovo_Miix630";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dts b/arch/arm64/boot/dts/qcom/msm8998-mtp.dts<br/>index 7c77612fb990..ad425267e902 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998-mtp.dts</a></div><div class='hunk'>@@ -156,6 +156,7 @@</div><div class='ctx'> &amp;qusb2phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l1a_0p875&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;vreg_l24a_3p075&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi<br/>index d8cc0d729e99..3650f2501886 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi</a></div><div class='hunk'>@@ -450,6 +450,7 @@</div><div class='ctx'> &amp;qusb2phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l1a_0p875&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;vreg_l24a_3p075&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi<br/>index 9aa9c5cee355..5c75fba16ce2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/msm8998.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/msm8998.dtsi</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (c) 2016, The Linux Foundation. All rights reserved. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-msm8998.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-msm8998.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-msm8998.h&gt;</div><div class='hunk'>@@ -136,130 +137,130 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1536&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1536&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1536&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo280";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1536&gt;;</div><div class='del'>-			cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -267,7 +268,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-retention";</div><div class='ctx'> 				/* CPU Retention (C2D), L2 Active */</div><div class='hunk'>@@ -277,7 +278,7 @@</div><div class='ctx'> 				min-residency-us = &lt;504&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-power-collapse";</div><div class='ctx'> 				/* CPU + L2 Power Collapse (C3, D4) */</div><div class='hunk'>@@ -288,7 +289,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-retention";</div><div class='ctx'> 				/* CPU Retention (C2D), L2 Active */</div><div class='hunk'>@@ -298,7 +299,7 @@</div><div class='ctx'> 				min-residency-us = &lt;1302&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-power-collapse";</div><div class='ctx'> 				/* CPU + L2 Power Collapse (C3, D4) */</div><div class='hunk'>@@ -935,8 +936,24 @@</div><div class='ctx'> 				 &lt;0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 135 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;0 0 0 2 &amp;intc 0 0 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1415,6 +1432,34 @@</div><div class='ctx'> 				drive-strength = &lt;6&gt;;</div><div class='ctx'> 				bias-disable;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			hdmi_cec_default: hdmi-cec-default-state {</div><div class='add'>+				pins = "gpio31";</div><div class='add'>+				function = "hdmi_cec";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_ddc_default: hdmi-ddc-default-state {</div><div class='add'>+				pins = "gpio32", "gpio33";</div><div class='add'>+				function = "hdmi_ddc";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_hpd_default: hdmi-hpd-default-state {</div><div class='add'>+				pins = "gpio34";</div><div class='add'>+				function = "hdmi_hot";</div><div class='add'>+				drive-strength = &lt;16&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi_hpd_sleep: hdmi-hpd-sleep-state {</div><div class='add'>+				pins = "gpio34";</div><div class='add'>+				function = "hdmi_hot";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mss: remoteproc@4080000 {</div><div class='hunk'>@@ -1846,7 +1891,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1866,7 +1911,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1886,7 +1931,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -1906,7 +1951,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2040,7 +2085,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2059,7 +2104,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2078,7 +2123,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2097,7 +2142,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_QDSS_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_QDSS_A_CLK&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk", "atclk";</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			out-ports {</div><div class='ctx'> 				port {</div><div class='hunk'>@@ -2762,11 +2807,11 @@</div><div class='ctx'> 				      "gpll0_div";</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_MMSS_GPLL0_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_hdmi_phy&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_MMSS_GPLL0_DIV_CLK&gt;;</div><div class='hunk'>@@ -2801,8 +2846,8 @@</div><div class='ctx'> 				compatible = "qcom,msm8998-dpu";</div><div class='ctx'> 				reg = &lt;0x0c901000 0x8f000&gt;,</div><div class='ctx'> 				      &lt;0x0c9a8e00 0xf0&gt;,</div><div class='del'>-				      &lt;0x0c9b0000 0x2008&gt;,</div><div class='del'>-				      &lt;0x0c9b8000 0x1040&gt;;</div><div class='add'>+				      &lt;0x0c9b0000 0x3000&gt;,</div><div class='add'>+				      &lt;0x0c9b8000 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp",</div><div class='ctx'> 					    "regdma",</div><div class='ctx'> 					    "vbif",</div><div class='hunk'>@@ -2871,6 +2916,14 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;mdss_dsi1_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf3_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;hdmi_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -2896,8 +2949,8 @@</div><div class='ctx'> 					      "bus";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmpd MSM8998_VDDCX&gt;;</div><div class='hunk'>@@ -2972,8 +3025,8 @@</div><div class='ctx'> 					      "bus";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmpd MSM8998_VDDCX&gt;;</div><div class='hunk'>@@ -3026,6 +3079,96 @@</div><div class='ctx'> </div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			mdss_hdmi: hdmi-tx@c9a0000 {</div><div class='add'>+				compatible = "qcom,hdmi-tx-8998";</div><div class='add'>+				reg = &lt;0x0c9a0000 0x50c&gt;,</div><div class='add'>+				      &lt;0x00780000 0x6220&gt;,</div><div class='add'>+				      &lt;0x0c9e0000 0x2c&gt;;</div><div class='add'>+				reg-names = "core_physical",</div><div class='add'>+					    "qfprom_physical",</div><div class='add'>+					    "hdcp_physical";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MDSS_HDMI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MDSS_HDMI_DP_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MDSS_EXTPCLK_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MNOC_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mmcc MISC_AHB_CLK&gt;;</div><div class='add'>+				clock-names =</div><div class='add'>+					"mdp_core",</div><div class='add'>+					"iface",</div><div class='add'>+					"core",</div><div class='add'>+					"alt_iface",</div><div class='add'>+					"extp",</div><div class='add'>+					"bus",</div><div class='add'>+					"mnoc",</div><div class='add'>+					"iface_mmss";</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;mdss_hdmi_phy&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hdmi_hpd_default&gt;,</div><div class='add'>+					    &lt;&amp;hdmi_ddc_default&gt;,</div><div class='add'>+					    &lt;&amp;hdmi_cec_default&gt;;</div><div class='add'>+				pinctrl-1 = &lt;&amp;hdmi_hpd_sleep&gt;,</div><div class='add'>+					    &lt;&amp;hdmi_ddc_default&gt;,</div><div class='add'>+					    &lt;&amp;hdmi_cec_default&gt;;</div><div class='add'>+				pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						hdmi_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf3_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						hdmi_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_hdmi_phy: hdmi-phy@c9a0600 {</div><div class='add'>+				compatible = "qcom,hdmi-phy-8998";</div><div class='add'>+				reg = &lt;0x0c9a0600 0x18b&gt;,</div><div class='add'>+				      &lt;0x0c9a0a00 0x38&gt;,</div><div class='add'>+				      &lt;0x0c9a0c00 0x38&gt;,</div><div class='add'>+				      &lt;0x0c9a0e00 0x38&gt;,</div><div class='add'>+				      &lt;0x0c9a1000 0x38&gt;,</div><div class='add'>+				      &lt;0x0c9a1200 0x0e8&gt;;</div><div class='add'>+				reg-names = "hdmi_pll",</div><div class='add'>+					    "hdmi_tx_l0",</div><div class='add'>+					    "hdmi_tx_l1",</div><div class='add'>+					    "hdmi_tx_l2",</div><div class='add'>+					    "hdmi_tx_l3",</div><div class='add'>+					    "hdmi_phy";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_HDMI_CLKREF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+				clock-names = "iface",</div><div class='add'>+					      "ref",</div><div class='add'>+					      "xo";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		venus: video-codec@cc00000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm660l.dtsi b/arch/arm64/boot/dts/qcom/pm660l.dtsi<br/>index 0094e0ef058b..3f8b9eafe164 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pm660l.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pm660l.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pm660l.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pm660l.dtsi</a></div><div class='hunk'>@@ -70,6 +70,12 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pm660l_flash: led-controller@d300 {</div><div class='add'>+			compatible = "qcom,pm660l-flash-led", "qcom,spmi-flash-led";</div><div class='add'>+			reg = &lt;0xd300&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pm660l_wled: leds@d800 {</div><div class='ctx'> 			compatible = "qcom,pm660l-wled";</div><div class='ctx'> 			reg = &lt;0xd800&gt;, &lt;0xd900&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi<br/>index a74a7ff660d2..d2568686a098 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pm8150.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pm8150.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pm8150.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pm8150.dtsi</a></div><div class='hunk'>@@ -49,8 +49,6 @@</div><div class='ctx'> 		pon: pon@800 {</div><div class='ctx'> 			compatible = "qcom,pm8998-pon";</div><div class='ctx'> 			reg = &lt;0x0800&gt;;</div><div class='del'>-			mode-bootloader = &lt;0x2&gt;;</div><div class='del'>-			mode-recovery = &lt;0x1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			pon_pwrkey: pwrkey {</div><div class='ctx'> 				compatible = "qcom,pm8941-pwrkey";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pm8937.dtsi b/arch/arm64/boot/dts/qcom/pm8937.dtsi<br/>new file mode 100644<br/>index 000000000000..77809c3534a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pm8937.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pm8937.dtsi</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023, Dang Huynh &lt;danct12@riseup.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-vadc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	thermal-zones {</div><div class='add'>+		pm8937-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8937_temp&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;105000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip2 {</div><div class='add'>+					temperature = &lt;145000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "qcom,pm8937", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pon@800 {</div><div class='add'>+			compatible = "qcom,pm8916-pon";</div><div class='add'>+			reg = &lt;0x800&gt;;</div><div class='add'>+			mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+			mode-recovery = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+			pm8937_pwrkey: pwrkey {</div><div class='add'>+				compatible = "qcom,pm8941-pwrkey";</div><div class='add'>+				interrupts = &lt;0 0x8 0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+				debounce = &lt;15625&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pm8937_resin: resin {</div><div class='add'>+				compatible = "qcom,pm8941-resin";</div><div class='add'>+				interrupts = &lt;0 0x8 1 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+				debounce = &lt;15625&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_gpios: gpio@c000 {</div><div class='add'>+			compatible = "qcom,pm8937-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0xc000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8937_gpios 0 0 8&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_mpps: mpps@a000 {</div><div class='add'>+			compatible = "qcom,pm8937-mpp", "qcom,spmi-mpp";</div><div class='add'>+			reg = &lt;0xa000&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8937_mpps 0 0 4&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_temp: temp-alarm@2400 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0x2400&gt;;</div><div class='add'>+			interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			io-channels = &lt;&amp;pm8937_vadc VADC_DIE_TEMP&gt;;</div><div class='add'>+			io-channel-names = "thermal";</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_vadc: adc@3100 {</div><div class='add'>+			compatible = "qcom,spmi-vadc";</div><div class='add'>+			reg = &lt;0x3100&gt;;</div><div class='add'>+			interrupts = &lt;0 0x31 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			channel@8 {</div><div class='add'>+				reg = &lt;VADC_DIE_TEMP&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@9 {</div><div class='add'>+				reg = &lt;VADC_REF_625MV&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@a {</div><div class='add'>+				reg = &lt;VADC_REF_1250MV&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@c {</div><div class='add'>+				reg = &lt;VADC_SPARE1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@e {</div><div class='add'>+				reg = &lt;VADC_GND_REF&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@f {</div><div class='add'>+				reg = &lt;VADC_VDD_VADC&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc@6000 {</div><div class='add'>+			compatible = "qcom,pm8941-rtc";</div><div class='add'>+			reg = &lt;0x6000&gt;, &lt;0x6100&gt;;</div><div class='add'>+			reg-names = "rtc", "alarm";</div><div class='add'>+			interrupts = &lt;0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@1 {</div><div class='add'>+		compatible = "qcom,pm8937", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x1 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8937_pwm: pwm {</div><div class='add'>+			compatible = "qcom,pm8937-pwm", "qcom,pm8916-pwm";</div><div class='add'>+</div><div class='add'>+			#pwm-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8937_spmi_regulators: regulators {</div><div class='add'>+			compatible = "qcom,pm8937-regulators";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pmd8028.dtsi b/arch/arm64/boot/dts/qcom/pmd8028.dtsi<br/>new file mode 100644<br/>index 000000000000..a00913e28a4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmd8028.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pmd8028.dtsi</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	thermal-zones {</div><div class='add'>+		pmd8028-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmd8028_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				pmd8028_trip0: trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pmd8028_trip1: trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pmd8028_trip2: trip2 {</div><div class='add'>+					temperature = &lt;145000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+	pmd8028: pmic@4 {</div><div class='add'>+		compatible = "qcom,pmd8028", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x4 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmd8028_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmd8028_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pmd8028-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pmd8028_gpios 0 0 4&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pmi8950.dtsi b/arch/arm64/boot/dts/qcom/pmi8950.dtsi<br/>index 4aff437263a2..3d3b1cd97cc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmi8950.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmi8950.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmi8950.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pmi8950.dtsi</a></div><div class='hunk'>@@ -84,6 +84,23 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		labibb {</div><div class='add'>+			compatible = "qcom,pmi8950-lab-ibb",</div><div class='add'>+				     "qcom,pmi8998-lab-ibb";</div><div class='add'>+</div><div class='add'>+			ibb: ibb {</div><div class='add'>+				interrupts = &lt;0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					     &lt;0x3 0xdc 0x0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				interrupt-names = "sc-err", "ocp";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lab: lab {</div><div class='add'>+				interrupts = &lt;0x3 0xde 0x1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					     &lt;0x3 0xde 0x0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				interrupt-names = "sc-err", "ocp";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmi8950_pwm: pwm {</div><div class='ctx'> 			compatible = "qcom,pmi8950-pwm";</div><div class='ctx'> 			#pwm-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pmih0108.dtsi b/arch/arm64/boot/dts/qcom/pmih0108.dtsi<br/>new file mode 100644<br/>index 000000000000..1c875995d881<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmih0108.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pmih0108.dtsi</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	thermal-zones {</div><div class='add'>+		pmih0108-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmih0108_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip2 {</div><div class='add'>+					temperature = &lt;145000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+	pmih0108: pmic@7 {</div><div class='add'>+		compatible = "qcom,pmih0108", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x7 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmih0108_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmih0108_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pmih0108-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pmih0108_gpios 0 0 18&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmih0108_eusb2_repeater: phy@fd00 {</div><div class='add'>+			compatible = "qcom,pm8550b-eusb2-repeater";</div><div class='add'>+			reg = &lt;0xfd00&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi b/arch/arm64/boot/dts/qcom/pmk8350.dtsi<br/>index f0ed15458dd7..565752af2204 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmk8350.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmk8350.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmk8350.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pmk8350.dtsi</a></div><div class='hunk'>@@ -76,6 +76,14 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pmk8350_sdam_1: nvram@7000 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x7000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x7000 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmk8350_sdam_2: nvram@7100 {</div><div class='ctx'> 			compatible = "qcom,spmi-sdam";</div><div class='ctx'> 			reg = &lt;0x7100&gt;;</div><div class='hunk'>@@ -89,6 +97,70 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pmk8350_sdam_5: nvram@7400 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x7400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x7400 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_13: nvram@7c00 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x7c00&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x7c00 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_14: nvram@7d00 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x7d00&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x7d00 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_21: nvram@8400 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x8400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x8400 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_22: nvram@8500 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x8500&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x8500 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_23: nvram@8600 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x8600&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x8600 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_41: nvram@9800 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x9800&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x9800 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmk8350_sdam_46: nvram@9d00 {</div><div class='add'>+			compatible = "qcom,spmi-sdam";</div><div class='add'>+			reg = &lt;0x9d00&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x9d00 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmk8350_gpios: gpio@b000 {</div><div class='ctx'> 			compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";</div><div class='ctx'> 			reg = &lt;0xb000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/pmk8550.dtsi b/arch/arm64/boot/dts/qcom/pmk8550.dtsi<br/>index c7ac9b2eaacf..583f61fc16ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmk8550.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/pmk8550.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/pmk8550.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/pmk8550.dtsi</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pmk8550_gpios: gpio@8800 {</div><div class='add'>+		pmk8550_gpios: gpio@b800 {</div><div class='ctx'> 			compatible = "qcom,pmk8550-gpio", "qcom,spmi-gpio";</div><div class='ctx'> 			reg = &lt;0xb800&gt;;</div><div class='ctx'> 			gpio-controller;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi<br/>index 79bc42ffb6a1..08141b41de24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm2290.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcm2290.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-qcm2290.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-qcm2290.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,qcm2290-gpucc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='hunk'>@@ -42,7 +43,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -50,18 +51,18 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='hunk'>@@ -69,13 +70,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='hunk'>@@ -83,13 +84,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='hunk'>@@ -97,34 +98,34 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000043&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;800&gt;;</div><div class='hunk'>@@ -136,7 +137,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_SLEEP: cpu-sleep-0 {</div><div class='add'>+			cpu_sleep: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -153,6 +154,7 @@</div><div class='ctx'> 			compatible = "qcom,scm-qcm2290", "qcom,scm";</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_CE1_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr_regs 0x13000&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG</div><div class='ctx'> 					 &amp;bimc SLAVE_EBI1 RPM_ALWAYS_TAG&gt;;</div><div class='hunk'>@@ -174,34 +176,34 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;mpm&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -550,6 +552,13 @@</div><div class='ctx'> 				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			qup_uart3_default: qup-uart3-default-state {</div><div class='add'>+				pins = "gpio8", "gpio9", "gpio10", "gpio11";</div><div class='add'>+				function = "qup3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			qup_uart4_default: qup-uart4-default-state {</div><div class='ctx'> 				pins = "gpio12", "gpio13";</div><div class='ctx'> 				function = "qup4";</div><div class='hunk'>@@ -557,6 +566,20 @@</div><div class='ctx'> 				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			cci0_default: cci0-default-state {</div><div class='add'>+				pins = "gpio22", "gpio23";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_default: cci1-default-state {</div><div class='add'>+				pins = "gpio29", "gpio30";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			sdc1_state_on: sdc1-on-state {</div><div class='ctx'> 				clk-pins {</div><div class='ctx'> 					pins = "sdc1_clk";</div><div class='hunk'>@@ -749,6 +772,30 @@</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cryptobam: dma-controller@1b04000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01b04000 0x0 0x24000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmcc RPM_SMD_CE1_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0084 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x0086 0x11&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@1b3a000 {</div><div class='add'>+			compatible = "qcom,qcm2290-qce", "qcom,ipq4019-qce", "qcom,qce";</div><div class='add'>+			reg = &lt;0x0 0x01b3a000 0x0 0x6000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmcc RPM_SMD_CE1_CLK&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			dmas = &lt;&amp;cryptobam 6&gt;, &lt;&amp;cryptobam 7&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0084 0x11&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x0086 0x11&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qfprom@1b44000 {</div><div class='ctx'> 			compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";</div><div class='ctx'> 			reg = &lt;0x0 0x01b44000 0x0 0x3000&gt;;</div><div class='hunk'>@@ -921,6 +968,11 @@</div><div class='ctx'> 			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='ctx'> 			bus-width = &lt;8&gt;;</div><div class='ctx'> </div><div class='add'>+			mmc-ddr-1_8v;</div><div class='add'>+			mmc-hs200-1_8v;</div><div class='add'>+			mmc-hs400-1_8v;</div><div class='add'>+			mmc-hs400-enhanced-strobe;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			sdhc1_opp_table: opp-table {</div><div class='hunk'>@@ -1073,7 +1125,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1092,7 +1144,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1137,7 +1189,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1184,7 +1236,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1231,7 +1283,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1239,6 +1291,23 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart3: serial@4a8c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x04a8c000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart3_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='add'>+						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='add'>+						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='add'>+						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			i2c4: i2c@4a90000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0x0 0x04a90000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -1278,7 +1347,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1297,7 +1366,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1342,7 +1411,7 @@</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='ctx'> 						&lt;&amp;bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG</div><div class='del'>-						 &amp;config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG&gt;;</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1405,6 +1474,7 @@</div><div class='ctx'> 				snps,has-lpm-erratum;</div><div class='ctx'> 				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,parkmode-disable-ss-quirk;</div><div class='ctx'> 				maximum-speed = "super-speed";</div><div class='ctx'> 				dr_mode = "otg";</div><div class='ctx'> 				usb-role-switch;</div><div class='hunk'>@@ -1579,6 +1649,145 @@</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cci: cci@5c1b000 {</div><div class='add'>+			compatible = "qcom,qcm2290-cci", "qcom,msm8996-cci";</div><div class='add'>+			reg = &lt;0x0 0x5c1b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 206 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CAMSS_TOP_AHB_CLK&gt;, &lt;&amp;gcc GCC_CAMSS_CCI_0_CLK&gt;;</div><div class='add'>+			clock-names = "ahb", "cci";</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_CAMSS_CCI_0_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;37500000&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_CAMSS_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci0_default &amp;cci1_default&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;400000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;400000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camss: camss@5c6e000 {</div><div class='add'>+			compatible = "qcom,qcm2290-camss";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x5c6e000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c75000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c52000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c53000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c66000 0x0 0x400&gt;,</div><div class='add'>+			      &lt;0x0 0x5c68000 0x0 0x400&gt;,</div><div class='add'>+			      &lt;0x0 0x5c11000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c6f000 0x0 0x4000&gt;,</div><div class='add'>+			      &lt;0x0 0x5c76000 0x0 0x4000&gt;;</div><div class='add'>+			reg-names = "csid0",</div><div class='add'>+				    "csid1",</div><div class='add'>+				    "csiphy0",</div><div class='add'>+				    "csiphy1",</div><div class='add'>+				    "csitpg0",</div><div class='add'>+				    "csitpg1",</div><div class='add'>+				    "top",</div><div class='add'>+				    "vfe0",</div><div class='add'>+				    "vfe1";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_NRT_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_RT_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_0_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_1_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_CPHY_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_CPHY_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TOP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK&gt; ;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "axi",</div><div class='add'>+				      "camnoc_nrt_axi",</div><div class='add'>+				      "camnoc_rt_axi",</div><div class='add'>+				      "csi0",</div><div class='add'>+				      "csi1",</div><div class='add'>+				      "csiphy0",</div><div class='add'>+				      "csiphy0_timer",</div><div class='add'>+				      "csiphy1",</div><div class='add'>+				      "csiphy1_timer",</div><div class='add'>+				      "top_ahb",</div><div class='add'>+				      "vfe0",</div><div class='add'>+				      "vfe0_cphy_rx",</div><div class='add'>+				      "vfe1",</div><div class='add'>+				      "vfe1_cphy_rx";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 210 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 212 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 211 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 213 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "csid0",</div><div class='add'>+					  "csid1",</div><div class='add'>+					  "csiphy0",</div><div class='add'>+					  "csiphy1",</div><div class='add'>+					  "csitpg0",</div><div class='add'>+					  "csitpg1",</div><div class='add'>+					  "vfe0",</div><div class='add'>+					  "vfe1";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG&gt;,</div><div class='add'>+					&lt;&amp;mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLAVE_EBI1 RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLAVE_EBI1 RPM_ALWAYS_TAG&gt;;</div><div class='add'>+			interconnect-names = "ahb",</div><div class='add'>+					     "hf_mnoc",</div><div class='add'>+					     "sf_mnoc";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x400 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x800 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x820 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x840 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_CAMSS_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mdss: display-subsystem@5e00000 {</div><div class='ctx'> 			compatible = "qcom,qcm2290-mdss";</div><div class='ctx'> 			reg = &lt;0x0 0x05e00000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1616,7 +1825,7 @@</div><div class='ctx'> 			mdp: display-controller@5e01000 {</div><div class='ctx'> 				compatible = "qcom,qcm2290-dpu";</div><div class='ctx'> 				reg = &lt;0x0 0x05e01000 0x0 0x8f000&gt;,</div><div class='del'>-				      &lt;0x0 0x05eb0000 0x0 0x2008&gt;;</div><div class='add'>+				      &lt;0x0 0x05eb0000 0x0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp",</div><div class='ctx'> 					    "vbif";</div><div class='ctx'> </div><div class='hunk'>@@ -1702,8 +1911,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='hunk'>@@ -1785,8 +1994,8 @@</div><div class='ctx'> 				 &lt;&amp;rpmcc RPM_SMD_XO_A_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='ctx'> 				      "bi_tcxo_ao",</div><div class='ctx'> 				      "gcc_disp_gpll0_clk_src",</div><div class='hunk'>@@ -1944,6 +2153,61 @@</div><div class='ctx'> 				     &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		venus: video-codec@5a00000 {</div><div class='add'>+			compatible = "qcom,qcm2290-venus";</div><div class='add'>+			reg = &lt;0 0x5a00000 0 0xf0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_VENUS_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gcc GCC_VCODEC0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "cx";</div><div class='add'>+			operating-points-v2 = &lt;&amp;venus_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_VENUS_CTL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VENUS_CTL_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VIDEO_THROTTLE_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VIDEO_VCODEC0_SYS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VCODEC0_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "throttle",</div><div class='add'>+				      "vcodec0_core",</div><div class='add'>+				      "vcodec0_bus";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;pil_video_mem&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x860 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x880 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x861 0x04&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x863 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x804 0xe0&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mmnrt_virt MASTER_VIDEO_P0 RPM_ALWAYS_TAG</div><div class='add'>+					 &amp;bimc SLAVE_EBI1 RPM_ALWAYS_TAG&gt;,</div><div class='add'>+					&lt;&amp;bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG RPM_ACTIVE_TAG&gt;;</div><div class='add'>+			interconnect-names = "video-mem",</div><div class='add'>+					     "cpu-cfg";</div><div class='add'>+</div><div class='add'>+			venus_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-133333333 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;133333333&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-240000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;240000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		wifi: wifi@c800000 {</div><div class='ctx'> 			compatible = "qcom,wcn3990-wifi";</div><div class='ctx'> 			reg = &lt;0x0 0x0c800000 0x0 0x800000&gt;;</div><div class='hunk'>@@ -2067,7 +2331,7 @@</div><div class='ctx'> 			compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";</div><div class='ctx'> 			reg = &lt;0x0 0x0f550800 0x0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts<br/>index 8ab30c01712e..519e458e1a89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='ctx'> #include "sc7280.dtsi"</div><div class='ctx'> #include "pm7250b.dtsi"</div><div class='ctx'> #include "pm7325.dtsi"</div><div class='hunk'>@@ -101,13 +103,96 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;redriver_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ocp96011_sbu_mux&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vreg_afvdd_2p8: regulator-afvdd-2p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "AFVDD_2P8";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;tlmm 68 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_ois_avdd0_1p8: regulator-ois-avdd0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "OIS_AVDD0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;tlmm 157 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_ois_dvdd_1p1: regulator-ois-dvdd-1p1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "OIS_DVDD_1P1";</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		gpio = &lt;&amp;tlmm 97 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vreg_s8b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_oled_dvdd: regulator-oled-dvdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "oled_dvdd";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 51 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_s1b&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_oled_vci: regulator-oled-vci {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "oled_vci";</div><div class='add'>+		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8350c_gpios 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_l13c&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_usb_redrive_1v8: regulator-usb-redrive-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "USB_REDRIVE_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 61 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_redrive_1v8_en_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		cont_splash_mem: cont-splash@e1000000 {</div><div class='ctx'> 			reg = &lt;0x0 0xe1000000 0x0 0x2300000&gt;;</div><div class='hunk'>@@ -134,36 +219,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ois_avdd0_1p8: regulator-ois-avdd0-1p8 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "OIS_AVDD0_1P8";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		gpio = &lt;&amp;tlmm 157 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ois_dvdd_1p1: regulator-ois-dvdd-1p1 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "OIS_DVDD_1P1";</div><div class='del'>-		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-		gpio = &lt;&amp;tlmm 97 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		vin-supply = &lt;&amp;vreg_s8b&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	afvdd_2p8: regulator-afvdd-2p8 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "AFVDD_2P8";</div><div class='del'>-		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-		gpio = &lt;&amp;tlmm 68 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	thermal-zones {</div><div class='ctx'> 		camera-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;0&gt;;</div><div class='hunk'>@@ -207,6 +262,20 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mem-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm7250b_adc_tm 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pm8008-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;100&gt;;</div><div class='ctx'> 			thermal-sensors = &lt;&amp;pm8008&gt;;</div><div class='hunk'>@@ -542,9 +611,45 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='del'>-	/* Disable for now so simple-framebuffer continues working */</div><div class='del'>-	status = "disabled";</div><div class='add'>+&amp;cci0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci0_i2c0 {</div><div class='add'>+	/* IMX800 @ 1a */</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "puya,p24c256c", "atmel,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_l6p&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci0_i2c1 {</div><div class='add'>+	/* IMX858 @ 29 */</div><div class='add'>+</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		compatible = "giantec,gt24p128f", "atmel,24c128";</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_l6p&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1_i2c1 {</div><div class='add'>+	/* S5KJN1SQ03 @ 10 */</div><div class='add'>+</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "giantec,gt24p128f", "atmel,24c128";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_l6p&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gcc {</div><div class='hunk'>@@ -573,6 +678,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcm6490/fairphone5/a660_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -647,7 +760,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Pixelworks @ 26 */</div><div class='del'>-	/* FSA4480 USB audio switch @ 42 */</div><div class='add'>+</div><div class='add'>+	typec-mux@42 {</div><div class='add'>+		compatible = "ocs,ocp96011", "fcs,fsa4480";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ocp96011_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_sbu&gt;;</div><div class='add'>+				data-lanes = &lt;1 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/* AW86927FCR haptics @ 5a */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -661,7 +793,36 @@</div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* PTN36502 USB redriver @ 1a */</div><div class='add'>+	typec-mux@1a {</div><div class='add'>+		compatible = "nxp,ptn36502";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		vdd18-supply = &lt;&amp;vreg_usb_redrive_1v8&gt;;</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				redriver_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				redriver_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_dp_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c9 {</div><div class='hunk'>@@ -678,7 +839,58 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l6b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "fairphone,fp5-rm692e5-boe", "raydium,rm692e5";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vci-supply = &lt;&amp;vreg_oled_vci&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l12c&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;vreg_oled_dvdd&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;disp_reset_n_active&gt;, &lt;&amp;mdp_vsync&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;disp_reset_n_suspend&gt;, &lt;&amp;mdp_vsync&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vreg_l10c&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm7250b_adc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pm7250b_adc_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	channel@4d {</div><div class='ctx'> 		reg = &lt;ADC5_AMUX_THM1_100K_PU&gt;;</div><div class='ctx'> 		qcom,ratiometric;</div><div class='hunk'>@@ -694,6 +906,14 @@</div><div class='ctx'> 		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='ctx'> 		label = "conn_therm";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	channel@53 {</div><div class='add'>+		reg = &lt;ADC5_GPIO2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "mem_therm";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm7250b_adc_tm {</div><div class='hunk'>@@ -712,6 +932,21 @@</div><div class='ctx'> 		qcom,ratiometric;</div><div class='ctx'> 		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mem-therm@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pm7250b_adc ADC5_GPIO2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7250b_gpios {</div><div class='add'>+	pm7250b_adc_default: adc-default-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+		bias-high-impedance;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm7325_gpios {</div><div class='hunk'>@@ -914,10 +1149,65 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "fairphone,fp5-sndcard";</div><div class='add'>+	model = "Fairphone 5";</div><div class='add'>+</div><div class='add'>+	mm1-dai-link {</div><div class='add'>+		link-name = "MultiMedia1";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	displayport-rx-dai-link {</div><div class='add'>+		link-name = "DisplayPort Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;mdss_dp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai DISPLAY_PORT_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-dai-link {</div><div class='add'>+		link-name = "USB Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;q6usbdai USB_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai USB_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spi13 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* Goodix touchscreen @ 0 */</div><div class='add'>+	touchscreen@0 {</div><div class='add'>+		compatible = "goodix,gt9897";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 81 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 105 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;vreg_l3c&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l2c&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		touchscreen-size-x = &lt;1224&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;2700&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='hunk'>@@ -934,6 +1224,20 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	disp_reset_n_active: disp-reset-n-active-state {</div><div class='add'>+		pins = "gpio44";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	disp_reset_n_suspend: disp-reset-n-suspend-state {</div><div class='add'>+		pins = "gpio44";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hall_sensor_default: hall-sensor-default-state {</div><div class='ctx'> 		pins = "gpio155";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -941,6 +1245,13 @@</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mdp_vsync: mdp-vsync-state {</div><div class='add'>+		pins = "gpio80";</div><div class='add'>+		function = "mdp_vsync";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pm8008_int_default: pm8008-int-default-state {</div><div class='ctx'> 		pins = "gpio25";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -999,6 +1310,14 @@</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		bias-pull-down;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb_redrive_1v8_en_default: usb-redrive-1v8-en-default-state {</div><div class='add'>+		pins = "gpio61";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='hunk'>@@ -1061,22 +1380,16 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_dwc3_ss {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l10c&gt;;</div><div class='ctx'> 	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='hunk'>@@ -1103,12 +1416,16 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_dp_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;redriver_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;venus {</div><div class='ctx'> 	firmware-name = "qcom/qcm6490/fairphone5/venus.mbn";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath11k-calibration-variant = "Fairphone_5";</div><div class='add'>+	qcom,calibration-variant = "Fairphone_5";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts<br/>index 84c45419cb8d..73fce639370c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcm6490-idp.dts</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include "pm7325.dtsi"</div><div class='ctx'> #include "pm8350c.dtsi"</div><div class='ctx'> #include "pmk8350.dtsi"</div><div class='add'>+#include "qcs6490-audioreach.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;ipa_fw_mem;</div><div class='ctx'> /delete-node/ &amp;rmtfs_mem;</div><div class='hunk'>@@ -169,6 +170,30 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcd9370: audio-codec-0 {</div><div class='add'>+		compatible = "qcom,wcd9370-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 83 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l17b_1p7&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		vdd-px-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob_3p296&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd937x_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd937x_tx&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='hunk'>@@ -258,6 +283,8 @@</div><div class='ctx'> 			regulator-name = "vreg_l6b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -265,6 +292,8 @@</div><div class='ctx'> 			regulator-name = "vreg_l7b_2p952";</div><div class='ctx'> 			regulator-min-microvolt = &lt;2400000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -279,6 +308,8 @@</div><div class='ctx'> 			regulator-name = "vreg_l9b_1p2";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -467,6 +498,8 @@</div><div class='ctx'> 			regulator-name = "vreg_l10c_0p88";</div><div class='ctx'> 			regulator-min-microvolt = &lt;720000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -499,6 +532,51 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gcc {</div><div class='add'>+	protected-clocks = &lt;GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt; ,&lt;GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+			   &lt;GCC_PCIE_1_AUX_CLK_SRC&gt;, &lt;GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_PCIE_1_MSTR_AXI_CLK&gt;, &lt;GCC_PCIE_1_PHY_RCHNG_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_PCIE_1_PIPE_CLK&gt;, &lt;GCC_PCIE_1_PIPE_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_PCIE_1_SLV_AXI_CLK&gt;, &lt;GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CNOC_PERIPH_AHB_CLK&gt;, &lt;GCC_QSPI_CORE_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CORE_CLK_SRC&gt;,&lt;GCC_USB30_SEC_MASTER_CLK&gt;,</div><div class='add'>+			   &lt;GCC_USB30_SEC_MASTER_CLK_SRC&gt;, &lt;GCC_USB30_SEC_MOCK_UTMI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_USB30_SEC_MOCK_UTMI_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC&gt;, &lt;GCC_USB30_SEC_SLEEP_CLK&gt;,</div><div class='add'>+			   &lt;GCC_USB3_SEC_PHY_AUX_CLK&gt;, &lt;GCC_USB3_SEC_PHY_AUX_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_USB3_SEC_PHY_COM_AUX_CLK&gt;, &lt;GCC_USB3_SEC_PHY_PIPE_CLK&gt;,</div><div class='add'>+			   &lt;GCC_USB3_SEC_PHY_PIPE_CLK_SRC&gt;, &lt;GCC_CFG_NOC_LPASS_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC&gt;, &lt;GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_OFFLINE_AXI_CLK&gt;, &lt;GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_Q6_MEMNOC_AXI_CLK&gt;, &lt;GCC_MSS_Q6SS_BOOT_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_SEC_CTRL_CLK_SRC&gt;, &lt;GCC_WPSS_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_AHB_BDG_MST_CLK&gt;, &lt;GCC_WPSS_RSCP_CLK&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcm6490/a660_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_rx_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tx_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_va_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_wsa_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -679,6 +757,165 @@</div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,qcm6490-idp-sndcard";</div><div class='add'>+	model = "QCM6490-IDP";</div><div class='add'>+</div><div class='add'>+	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+			"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+			"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+			"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+			"AMIC2", "MIC BIAS2",</div><div class='add'>+			"TX DMIC0", "MIC BIAS1",</div><div class='add'>+			"TX DMIC1", "MIC BIAS2",</div><div class='add'>+			"TX DMIC2", "MIC BIAS3",</div><div class='add'>+			"TX SWR_ADC1", "ADC2_OUTPUT",</div><div class='add'>+			"VA DMIC0", "VA MIC BIAS3",</div><div class='add'>+			"VA DMIC1", "VA MIC BIAS3",</div><div class='add'>+			"VA DMIC2", "VA MIC BIAS1",</div><div class='add'>+			"VA DMIC3", "VA MIC BIAS1";</div><div class='add'>+</div><div class='add'>+	wsa-dai-link {</div><div class='add'>+		link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;,</div><div class='add'>+				    &lt;&amp;swr2 0&gt;, &lt;&amp;lpass_wsa_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd-playback-dai-link {</div><div class='add'>+		link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9370 0&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_rx_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd-capture-dai-link {</div><div class='add'>+		link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9370 1&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_tx_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	va-dai-link {</div><div class='add'>+		link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;lpass_va_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd937x_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010a00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9370 RX Port 1 (HPH_L/R)       &lt;==&gt;    SWR1 Port 1 (HPH_L/R)</div><div class='add'>+		 * WCD9370 RX Port 2 (CLSH)          &lt;==&gt;    SWR1 Port 2 (CLSH)</div><div class='add'>+		 * WCD9370 RX Port 3 (COMP_L/R)      &lt;==&gt;    SWR1 Port 3 (COMP_L/R)</div><div class='add'>+		 * WCD9370 RX Port 4 (LO)            &lt;==&gt;    SWR1 Port 4 (LO)</div><div class='add'>+		 * WCD9370 RX Port 5 (DSD_L/R)       &lt;==&gt;    SWR1 Port 5 (DSD)</div><div class='add'>+		 */</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Static channels mapping between slave and master rx port channels.</div><div class='add'>+		 * In the order of slave port channels, which is</div><div class='add'>+		 * hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l.</div><div class='add'>+		 */</div><div class='add'>+		qcom,rx-channel-mapping = /bits/ 8 &lt;1 2 1 1 2 1 1 2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd937x_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010a00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9370 TX Port 1 (ADC1)               &lt;=&gt; SWR2 Port 2</div><div class='add'>+		 * WCD9370 TX Port 2 (ADC2, 3)            &lt;=&gt; SWR2 Port 2</div><div class='add'>+		 * WCD9370 TX Port 3 (DMIC0,1,2,3 &amp; MBHC) &lt;=&gt; SWR2 Port 3</div><div class='add'>+		 * WCD9370 TX Port 4 (DMIC4,5,6,7)        &lt;=&gt; SWR2 Port 4</div><div class='add'>+		 */</div><div class='add'>+		qcom,tx-port-mapping = &lt;1 1 2 3&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Static channel mapping between slave and master tx port channels.</div><div class='add'>+		 * In the order of slave port channels which is adc1, adc2, adc3,</div><div class='add'>+		 * mic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.</div><div class='add'>+		 */</div><div class='add'>+		qcom,tx-channel-mapping = /bits/ 8 &lt;1 2 1 1 2 3 3 4 1 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	left_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 63 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	right_spkr: speaker@0,2 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 2&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 62 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;32 2&gt;, /* ADSP */</div><div class='ctx'> 			       &lt;48 4&gt;; /* NFC */</div><div class='hunk'>@@ -688,19 +925,42 @@</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio83";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1 {</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 175 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l7b_2p952&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;800000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;900000&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq2-max-microamp = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='del'>-	/delete-property/ usb-role-switch;</div><div class='add'>+&amp;usb_1 {</div><div class='ctx'> 	dr_mode = "peripheral";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='hunk'>@@ -720,4 +980,12 @@</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='ctx'> 	memory-region = &lt;&amp;wlan_fw_mem&gt;;</div><div class='add'>+	qcom,calibration-variant = "Qualcomm_qcm6490idp";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_audiocc {</div><div class='add'>+	compatible = "qcom,qcm6490-lpassaudiocc";</div><div class='add'>+	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts b/arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts<br/>new file mode 100644<br/>index 000000000000..251e72f11428<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcm6490-particle-tachyon.dts</a></div><div class='hunk'>@@ -0,0 +1,864 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ * Copyright (c) 2023, Luca Weiss &lt;luca.weiss@fairphone.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pmk8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm7325.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include "sc7280.dtsi"</div><div class='add'>+#include "pm8350c.dtsi"</div><div class='add'>+#include "pmk8350.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;ipa_fw_mem;</div><div class='add'>+/delete-node/ &amp;rmtfs_mem;</div><div class='add'>+/delete-node/ &amp;xbl_mem;</div><div class='add'>+/delete-node/ &amp;adsp_mem;</div><div class='add'>+/delete-node/ &amp;cdsp_mem;</div><div class='add'>+/delete-node/ &amp;wpss_mem;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Particle Tachyon";</div><div class='add'>+	compatible = "particle,tachyon", "qcom,qcm6490";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart5;</div><div class='add'>+		serial1 = &amp;uart12;</div><div class='add'>+		serial2 = &amp;uart7;</div><div class='add'>+		serial3 = &amp;uart8;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;activity_led_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		led-activity {</div><div class='add'>+			function = LED_FUNCTION_ACTIVITY;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 140 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dp_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_power_5v: regulator-power-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "power_5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		gpio = &lt;&amp;tlmm 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		xbl_mem: xbl@80700000 {</div><div class='add'>+			reg = &lt;0x0 0x80700000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tz_stat_mem: tz-stat@c0000000 {</div><div class='add'>+			reg = &lt;0x0 0xc0000000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tags_mem: tags@c0100000 {</div><div class='add'>+			reg = &lt;0x0 0xc0100000 0x0 0x1200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qtee_mem: qtee@c1300000 {</div><div class='add'>+			reg = &lt;0x0 0xc1300000 0x0 0x500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trusted_apps_mem: trusted-apps@c1800000 {</div><div class='add'>+			reg = &lt;0x0 0xc1800000 0x0 0x1c00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug_vm_mem: debug-vm@d0600000 {</div><div class='add'>+			reg = &lt;0x0 0xd0600000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: adsp@86100000 {</div><div class='add'>+			reg = &lt;0x0 0x86700000 0x0 0x2800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_mem: cdsp@88900000 {</div><div class='add'>+			reg = &lt;0x0 0x88f00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wpss_mem: wpss@9ae00000 {</div><div class='add'>+			reg = &lt;0x0 0x9ae00000 0x0 0x1900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mpss_mem: mpss@8b800000 {</div><div class='add'>+			reg = &lt;0x0 0x8b800000 0x0 0xf600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_fw_mem: ipa-fw@8b300000 {</div><div class='add'>+			reg = &lt;0x0 0x8b700000 0x0 0x10000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_gsi_mem: ipa-gsi@8b310000 {</div><div class='add'>+			reg = &lt;0x0 0x8b710000 0x0 0xa000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmtfs_mem: memory@f8500000 {</div><div class='add'>+			compatible = "qcom,rmtfs-mem";</div><div class='add'>+			reg = &lt;0x0 0xf8500000 0x0 0x600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			qcom,client-id = &lt;1&gt;;</div><div class='add'>+			qcom,vmid = &lt;QCOM_SCM_VMID_MSS_MSA&gt;, &lt;QCOM_SCM_VMID_NAV&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	usbdp-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 108 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 42 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbdp_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usbdp_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_sbu_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm7325-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l12-l15-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob_3p296&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s8b_1p272&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vdd-l11-l17-l18-l19-supply = &lt;&amp;vreg_s1b_1p872&gt;;</div><div class='add'>+		vdd-l13-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vdd-l14-l16-supply = &lt;&amp;vreg_s8b_1p272&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1b_1p872: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1b_1p872";</div><div class='add'>+			regulator-min-microvolt = &lt;1840000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s7b_0p972: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7b_0p972";</div><div class='add'>+			regulator-min-microvolt = &lt;535000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s8b_1p272: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8b_1p272";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_RET&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_0p912: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_0p912";</div><div class='add'>+			regulator-min-microvolt = &lt;825000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;925000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p072: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p072";</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3b_0p504: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b_0p504";</div><div class='add'>+			regulator-min-microvolt = &lt;312000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;910000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p2: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p952: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p952";</div><div class='add'>+			regulator-min-microvolt = &lt;2952000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2952000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_0p904: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_0p904";</div><div class='add'>+			regulator-min-microvolt = &lt;870000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;970000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_1p2: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11b_1p504: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p504";</div><div class='add'>+			regulator-min-microvolt = &lt;1504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_0p751: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_0p751";</div><div class='add'>+			regulator-min-microvolt = &lt;751000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;824000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_0p53: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_0p53";</div><div class='add'>+			regulator-min-microvolt = &lt;530000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;824000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_1p08: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_1p08";</div><div class='add'>+			regulator-min-microvolt = &lt;1080000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_0p765: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_0p765";</div><div class='add'>+			regulator-min-microvolt = &lt;765000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1020000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_1p1: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_1p7: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_1p7";</div><div class='add'>+			regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l18b_1p8: ldo18 {</div><div class='add'>+			regulator-name = "vreg_l18b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l19b_1p8: ldo19 {</div><div class='add'>+			regulator-name = "vreg_l19b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_s1b_1p872&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_s1b_1p872&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob_3p296&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob_3p296&gt;;</div><div class='add'>+		vdd-l10-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1c_2p19: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c_2p19";</div><div class='add'>+			regulator-min-microvolt = &lt;2190000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2210000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s9c_1p084: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9c_1p084";</div><div class='add'>+			regulator-min-microvolt = &lt;1084000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_1p62: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_1p62";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_2p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3540000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4c_1p62: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c_1p62";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5c_1p62: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5c_1p62";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6c_2p96: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7c_3p0: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c_1p62: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c_1p62";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c_2p96: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10c_0p88: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10c_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11c_2p8: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11c_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12c_1p65: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c_1p65";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13c_2p7: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c_2p7";</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob_3p296: bob {</div><div class='add'>+			regulator-name = "vreg_bob_3p296";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ipa {</div><div class='add'>+	firmware-name = "qcom/qcm6490/particle/tachyon/ipa_fws.mbn";</div><div class='add'>+	qcom,gsi-loader = "self";</div><div class='add'>+	memory-region = &lt;&amp;ipa_fw_mem&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gcc {</div><div class='add'>+	protected-clocks = &lt;GCC_CFG_NOC_LPASS_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_MSS_OFFLINE_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_Q6SS_BOOT_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_MSS_Q6_MEMNOC_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CNOC_PERIPH_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CORE_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CORE_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_SEC_CTRL_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_AHB_BDG_MST_CLK&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_RSCP_CLK&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcm6490/particle/tachyon/a660_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 87 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 89 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_reset_n&gt;, &lt;&amp;pcie0_wake_n&gt;, &lt;&amp;pcie0_clkreq_n&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_reset_n&gt;, &lt;&amp;pcie1_wake_n&gt;, &lt;&amp;pcie1_clkreq_n&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_power_5v&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	xo-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_vadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	channel@44 {</div><div class='add'>+		reg = &lt;PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pmk8350_xo_therm";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcm6490/particle/tachyon/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcm6490/particle/tachyon/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/qcm6490/particle/tachyon/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_clk {</div><div class='add'>+	bias-disable;</div><div class='add'>+	drive-strength = &lt;16&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_cmd {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+	drive-strength = &lt;10&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_data {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+	drive-strength = &lt;10&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9c_2p96&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6c_2p96&gt;;</div><div class='add'>+</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	activity_led_state: activity-led-state {</div><div class='add'>+		pins = "gpio14";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_en_state: bt-default-state {</div><div class='add'>+		pins = "gpio84";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_reset_n: pcie0-reset-n-state {</div><div class='add'>+		pins = "gpio87";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_wake_n: pcie0-wake-n-state {</div><div class='add'>+		pins = "gpio89";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_reset_n: pcie1-reset-n-state {</div><div class='add'>+		pins = "gpio2";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_wake_n: pcie1-wake-n-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {</div><div class='add'>+		pins = "gpio28";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure a bias-bus-hold on CTS to lower power</div><div class='add'>+		 * usage when Bluetooth is turned off. Bus hold will</div><div class='add'>+		 * maintain a low power state regardless of whether</div><div class='add'>+		 * the Bluetooth module drives the pin in either</div><div class='add'>+		 * direction or leaves the pin fully unpowered.</div><div class='add'>+		 */</div><div class='add'>+		bias-bus-hold;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {</div><div class='add'>+		pins = "gpio29";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure pull-down on RTS. As RTS is active low</div><div class='add'>+		 * signal, pull it low to indicate the BT SoC that it</div><div class='add'>+		 * can wakeup the system anytime from suspend state by</div><div class='add'>+		 * pulling RX low (by sending wakeup bytes).</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {</div><div class='add'>+		pins = "gpio30";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure pull-up on TX when it isn't actively driven</div><div class='add'>+		 * to prevent BT SoC from receiving garbage during sleep.</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure a pull-up on RX. This is needed to avoid</div><div class='add'>+		 * garbage data when the TX pin of the Bluetooth module</div><div class='add'>+		 * is floating which may cause spurious wakeups.</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbdp_sbu_default: usbdp-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio108";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio42";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en_state: wlan-default-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	/delete-property/ interrupts;</div><div class='add'>+	interrupts-extended = &lt;&amp;intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			      &lt;&amp;tlmm 31 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-1 = &lt;&amp;qup_uart7_sleep_cts&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_rts&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_tx&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_rx&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart8 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 175 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l7b_2p952&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;800000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;900000&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq2-max-microamp = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2b_3p072&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c_1p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1b_0p912&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c_1p8&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2b_3p072&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts<br/>index 4667e47a74bc..eb8efba1b9dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2023, Luca Weiss &lt;luca.weiss@fairphone.com&gt;</div><div class='del'>- * Copyright (c) 2024, Caleb Connolly &lt;caleb@postmarketos.org&gt;</div><div class='add'>+ * Copyright (c) 2024, Casey Connolly &lt;casey.connolly@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -910,12 +910,10 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='hunk'>@@ -942,8 +940,6 @@</div><div class='ctx'> </div><div class='ctx'> 	qcom,squelch-detector-bp = &lt;(-2090)&gt;;</div><div class='ctx'> </div><div class='del'>-	orientation-switch;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -955,7 +951,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath11k-calibration-variant = "SHIFTphone_8";</div><div class='add'>+	qcom,calibration-variant = "SHIFTphone_8";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi<br/>index cddc16bac0ce..4328c1dda898 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs404.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs404.dtsi</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -36,13 +36,13 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@100 {</div><div class='add'>+		cpu0: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -50,13 +50,13 @@</div><div class='ctx'> 			power-domain-names = "cpr";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@101 {</div><div class='add'>+		cpu1: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -64,13 +64,13 @@</div><div class='ctx'> 			power-domain-names = "cpr";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@102 {</div><div class='add'>+		cpu2: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -78,13 +78,13 @@</div><div class='ctx'> 			power-domain-names = "cpr";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@103 {</div><div class='add'>+		cpu3: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;cpu_sleep_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;apcs_glb&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 			power-domain-names = "cpr";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		L2_0: l2-cache {</div><div class='add'>+		l2_0: l2-cache {</div><div class='ctx'> 			compatible = "cache";</div><div class='ctx'> 			cache-level = &lt;2&gt;;</div><div class='ctx'> 			cache-unified;</div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "standalone-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -694,6 +694,8 @@</div><div class='ctx'> 				snps,has-lpm-erratum;</div><div class='ctx'> 				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				dr_mode = "otg";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -731,6 +733,8 @@</div><div class='ctx'> 				snps,has-lpm-erratum;</div><div class='ctx'> 				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				dr_mode = "peripheral";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1308,6 +1312,7 @@</div><div class='ctx'> 		intc: interrupt-controller@b000000 {</div><div class='ctx'> 			compatible = "qcom,msm-qgic2";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x0b000000 0x1000&gt;,</div><div class='ctx'> 			      &lt;0x0b002000 0x1000&gt;;</div><div class='hunk'>@@ -1679,10 +1684,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cluster_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1712,10 +1717,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1745,10 +1750,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1778,10 +1783,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1811,10 +1816,10 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-						       &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						       &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts<br/>new file mode 100644<br/>index 000000000000..705ea71b07a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs615-ride.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs615-ride.dts</a></div><div class='hunk'>@@ -0,0 +1,519 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "sm6150.dtsi"</div><div class='add'>+#include "pm8150.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. QCS615 Ride";</div><div class='add'>+	compatible = "qcom,qcs615-ride", "qcom,qcs615", "qcom,sm6150";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='add'>+		mmc1 = &amp;sdhc_2;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_board_clk: xo-board-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;38400000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_conn_1p8: regulator-conn-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_conn_1p8";</div><div class='add'>+		startup-delay-us = &lt;4000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pm8150_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_conn_pa: regulator-conn-pa {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_conn_pa";</div><div class='add'>+		startup-delay-us = &lt;4000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pm8150_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator-usb2-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "USB2_VBUS";</div><div class='add'>+		gpio = &lt;&amp;pm8150_gpios 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en_state&gt;, &lt;&amp;wlan_en_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 85 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 98 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_conn_pa&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s5a&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_conn_1p8&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_conn_1p8&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_conn_pa&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s5a&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s6a&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_l15a&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s6a&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_l15a&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8150-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vreg_s3a: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3a";</div><div class='add'>+			regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;650000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s4a: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1829000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s5a: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5a";</div><div class='add'>+			regulator-min-microvolt = &lt;1896000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s6a: smps6 {</div><div class='add'>+			regulator-name = "vreg_s6a";</div><div class='add'>+			regulator-min-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1404000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1a: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1a";</div><div class='add'>+			regulator-min-microvolt = &lt;488000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;852000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2a: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2a";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3a: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3a";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1248000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a";</div><div class='add'>+			regulator-min-microvolt = &lt;875000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;975000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8a";</div><div class='add'>+			regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10a: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10a";</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3312000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11a: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11a";</div><div class='add'>+			regulator-min-microvolt = &lt;1232000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12a: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1890000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13a: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13a";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3230000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15a: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1904000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16a: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16a";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3312000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17a: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17a";</div><div class='add'>+			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3312000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 100 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l12a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "QC_QCS615_Ride";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8150_gpios {</div><div class='add'>+	usb2_en: usb2-en-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-enable;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcs615/adsp.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcs615/cdsp.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_en_state: bt-en-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_default_state: pcie-default-state {</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio90";</div><div class='add'>+			function = "pcie_clk_req";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio101";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pins = "gpio100";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en_state: wlan-en-state {</div><div class='add'>+		pins = "gpio98";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc1_state_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc1_state_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l17a&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_s4a&gt;;</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_state_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_state_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 99 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l10a&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_s4a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+		firmware-name = "QCA6698/hpnv21", "QCA6698/hpbtfw21.tlv";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l12a&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;vreg_l13a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l12a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_hsphy_2 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l12a&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;vreg_l13a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 123 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l17a&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;600000&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;vreg_s4a&gt;;</div><div class='add'>+	vccq2-max-microamp = &lt;600000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l12a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;venus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi<br/>new file mode 100644<br/>index 000000000000..c1867711298b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ *</div><div class='add'>+ * Common definitions for SC7280-based boards with AudioReach.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,lpass-sc7280.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;lpass_rx_macro {</div><div class='add'>+	/delete-property/ power-domains;</div><div class='add'>+	/delete-property/ power-domain-names;</div><div class='add'>+	clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;lpass_va_macro&gt;;</div><div class='add'>+	clock-names = "mclk",</div><div class='add'>+		      "npl",</div><div class='add'>+		      "macro",</div><div class='add'>+		      "dcodec",</div><div class='add'>+		      "fsgen";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	clocks = &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+	clock-names = "core",</div><div class='add'>+		      "audio";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tx_macro {</div><div class='add'>+	/delete-property/ power-domains;</div><div class='add'>+	/delete-property/ power-domain-names;</div><div class='add'>+	clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;lpass_va_macro&gt;;</div><div class='add'>+	clock-names = "mclk",</div><div class='add'>+		      "npl",</div><div class='add'>+		      "macro",</div><div class='add'>+		      "dcodec",</div><div class='add'>+		      "fsgen";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_va_macro {</div><div class='add'>+	/delete-property/ power-domains;</div><div class='add'>+	/delete-property/ power-domain-names;</div><div class='add'>+	clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_VA_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+	clock-names = "mclk",</div><div class='add'>+		      "macro",</div><div class='add'>+		      "dcodec";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;lpass_dmic01_clk&gt;, &lt;&amp;lpass_dmic01_data&gt;,</div><div class='add'>+		    &lt;&amp;lpass_dmic23_clk&gt;, &lt;&amp;lpass_dmic23_data&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_wsa_macro {</div><div class='add'>+	clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+		 &lt;&amp;lpass_va_macro&gt;;</div><div class='add'>+	clock-names = "mclk",</div><div class='add'>+		      "npl",</div><div class='add'>+		      "macro",</div><div class='add'>+		      "dcodec",</div><div class='add'>+		      "fsgen";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp_glink {</div><div class='add'>+	/delete-node/ apr;</div><div class='add'>+</div><div class='add'>+	gpr {</div><div class='add'>+		compatible = "qcom,gpr";</div><div class='add'>+		qcom,glink-channels = "adsp_apps";</div><div class='add'>+		qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+		qcom,intents = &lt;512 20&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		q6apm: service@1 {</div><div class='add'>+			compatible = "qcom,q6apm";</div><div class='add'>+			reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+			q6apmdai: dais {</div><div class='add'>+				compatible = "qcom,q6apm-dais";</div><div class='add'>+				iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			q6apmbedai: bedais {</div><div class='add'>+				compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+				#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6prm: service@2 {</div><div class='add'>+			compatible = "qcom,q6prm";</div><div class='add'>+			reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+			qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+			q6prmcc: clock-controller {</div><div class='add'>+				compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+				#clock-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso<br/>new file mode 100644<br/>index 000000000000..619a42b5ef48<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;spi11 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	st33htpm0: tpm@0 {</div><div class='add'>+		compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso<br/>new file mode 100644<br/>index 000000000000..b9e4a5214f70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Camera Sensor overlay on top of rb3gen2 core kit.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,camcc-sc7280.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;camss {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* The port index denotes CSIPHY id i.e. csiphy3 */</div><div class='add'>+		port@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			csiphy3_ep: endpoint {</div><div class='add'>+				clock-lanes = &lt;7&gt;;</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx577_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1_i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	camera@1a {</div><div class='add'>+		compatible = "sony,imx577";</div><div class='add'>+</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 78 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default", "suspend";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam2_default&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;cam2_suspend&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;camcc CAM_CC_MCLK3_CLK&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;camcc CAM_CC_MCLK3_CLK&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+		dovdd-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx577_ep: endpoint {</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csiphy3_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	cam2_default: cam2-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "cam_mclk";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam2_suspend: cam2-suspend-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "cam_mclk";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts<br/>index 0d45662b8028..18cea8812001 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='hunk'>@@ -9,12 +9,17 @@</div><div class='ctx'> #define PM7250B_SID 8</div><div class='ctx'> #define PM7250B_SID1 9</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pmk8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm7325.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> #include "sc7280.dtsi"</div><div class='ctx'> #include "pm7250b.dtsi"</div><div class='ctx'> #include "pm7325.dtsi"</div><div class='ctx'> #include "pm8350c.dtsi"</div><div class='ctx'> #include "pmk8350.dtsi"</div><div class='add'>+#include "qcs6490-audioreach.dtsi"</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;ipa_fw_mem;</div><div class='ctx'> /delete-node/ &amp;rmtfs_mem;</div><div class='hunk'>@@ -32,6 +37,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart5;</div><div class='add'>+		serial1 = &amp;uart7;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -153,11 +159,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kypd_vol_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm7325_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmic-glink {</div><div class='ctx'> 		compatible = "qcom,qcm6490-pmic-glink", "qcom,pmic-glink";</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 140 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		connector@0 {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='hunk'>@@ -196,12 +217,107 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	thermal-zones {</div><div class='add'>+		sdm-skin-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		quiet-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcn6750-pmu {</div><div class='add'>+		compatible = "qcom,wcn6750-pmu";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vddasd-supply = &lt;&amp;vreg_l11c_2p8&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_s7b_0p972&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_s8b_1p272&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_s1b_1p872&gt;;</div><div class='add'>+		vddrfa2p2-supply = &lt;&amp;vreg_s1c_2p19&gt;;</div><div class='add'>+</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 85 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='hunk'>@@ -557,6 +673,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcs6490/a660_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -598,6 +722,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	typec-mux@1c {</div><div class='hunk'>@@ -641,6 +766,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpass_va_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_wsa_macro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -684,10 +817,197 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_reset_n&gt;, &lt;&amp;pcie1_wake_n&gt;, &lt;&amp;pcie1_clkreq_n&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	iommu-map = &lt;0x0 &amp;apps_smmu 0x1c80 0x1&gt;,</div><div class='add'>+		    &lt;0x100 &amp;apps_smmu 0x1c81 0x1&gt;,</div><div class='add'>+		    &lt;0x208 &amp;apps_smmu 0x1c84 0x1&gt;,</div><div class='add'>+		    &lt;0x210 &amp;apps_smmu 0x1c85 0x1&gt;,</div><div class='add'>+		    &lt;0x218 &amp;apps_smmu 0x1c86 0x1&gt;,</div><div class='add'>+		    &lt;0x300 &amp;apps_smmu 0x1c87 0x1&gt;,</div><div class='add'>+		    &lt;0x400 &amp;apps_smmu 0x1c88 0x1&gt;,</div><div class='add'>+		    &lt;0x500 &amp;apps_smmu 0x1c89 0x1&gt;,</div><div class='add'>+		    &lt;0x501 &amp;apps_smmu 0x1c90 0x1&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7325_gpios {</div><div class='add'>+	kypd_vol_up_n: kypd-vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7325_temp_alarm {</div><div class='add'>+	io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_DIE_TEMP&gt;;</div><div class='add'>+	io-channel-names = "thermal";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	xo-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	quiet-therm@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdm-skin-therm@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8350c_pwm {</div><div class='add'>+	nvmem = &lt;&amp;pmk8350_sdam_21&gt;,</div><div class='add'>+		&lt;&amp;pmk8350_sdam_22&gt;;</div><div class='add'>+	nvmem-names = "lpg_chan_sdam",</div><div class='add'>+		      "lut_sdam";</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		function = LED_FUNCTION_INDICATOR;</div><div class='add'>+		function-enumerator = &lt;3&gt;;</div><div class='add'>+		linux,default-trigger = "none";</div><div class='add'>+		default-state = "off";</div><div class='add'>+		panic-indicator;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		function = LED_FUNCTION_INDICATOR;</div><div class='add'>+		function-enumerator = &lt;2&gt;;</div><div class='add'>+		linux,default-trigger = "none";</div><div class='add'>+		default-state = "off";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		function = LED_FUNCTION_INDICATOR;</div><div class='add'>+		function-enumerator = &lt;1&gt;;</div><div class='add'>+		linux,default-trigger = "none";</div><div class='add'>+		default-state = "off";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmk8350_rtc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmk8350_vadc {</div><div class='add'>+	channel@3 {</div><div class='add'>+		reg = &lt;PMK8350_ADC7_DIE_TEMP&gt;;</div><div class='add'>+		label = "pmk8350_die_temp";</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@44 {</div><div class='add'>+		reg = &lt;PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		label = "xo_therm";</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@103 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_DIE_TEMP&gt;;</div><div class='add'>+		label = "pm7325_die_temp";</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@144 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_quiet_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@146 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_sdm_skin_therm";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart7_cts {</div><div class='add'>+	/*</div><div class='add'>+	 * Configure a bias-bus-hold on CTS to lower power</div><div class='add'>+	 * usage when Bluetooth is turned off. Bus hold will</div><div class='add'>+	 * maintain a low power state regardless of whether</div><div class='add'>+	 * the Bluetooth module drives the pin in either</div><div class='add'>+	 * direction or leaves the pin fully unpowered.</div><div class='add'>+	 */</div><div class='add'>+	bias-bus-hold;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart7_rts {</div><div class='add'>+	/* We'll drive RTS, so no pull */</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart7_rx {</div><div class='add'>+	/*</div><div class='add'>+	 * Configure a pull-up on RX. This is needed to avoid</div><div class='add'>+	 * garbage data when the TX pin of the Bluetooth module is</div><div class='add'>+	 * in tri-state (module powered off or not driving the</div><div class='add'>+	 * signal yet).</div><div class='add'>+	 */</div><div class='add'>+	bias-pull-up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart7_tx {</div><div class='add'>+	/* We'll drive TX, so no pull */</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -707,7 +1027,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_mpss {</div><div class='del'>-	firmware-name = "qcom/qcs6490/modem.mdt";</div><div class='add'>+	firmware-name = "qcom/qcs6490/modem.mbn";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -716,22 +1036,181 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_clk&gt;, &lt;&amp;sdc2_cmd&gt;, &lt;&amp;sdc2_data&gt;, &lt;&amp;sd_cd&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_clk_sleep&gt;, &lt;&amp;sdc2_cmd_sleep&gt;, &lt;&amp;sdc2_data_sleep&gt;, &lt;&amp;sd_cd&gt;;</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9c_2p96&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6c_2p96&gt;;</div><div class='add'>+</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,qcs6490-rb3gen2-sndcard";</div><div class='add'>+	model = "QCS6490-RB3Gen2";</div><div class='add'>+</div><div class='add'>+	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+			"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+			"VA DMIC0", "vdd-micb",</div><div class='add'>+			"VA DMIC1", "vdd-micb",</div><div class='add'>+			"VA DMIC2", "vdd-micb",</div><div class='add'>+			"VA DMIC3", "vdd-micb";</div><div class='add'>+</div><div class='add'>+	wsa-dai-link {</div><div class='add'>+		link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;,</div><div class='add'>+				    &lt;&amp;swr2 0&gt;, &lt;&amp;lpass_wsa_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	va-dai-link {</div><div class='add'>+		link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;lpass_va_macro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	left_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 158 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	right_spkr: speaker@0,2 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 158 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l18b_1p8&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;32 2&gt;, /* ADSP */</div><div class='ctx'> 			       &lt;48 4&gt;; /* NFC */</div><div class='add'>+</div><div class='add'>+	bt_en: bt-en-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {</div><div class='add'>+		pins = "gpio28";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure a bias-bus-hold on CTS to lower power</div><div class='add'>+		 * usage when Bluetooth is turned off. Bus hold will</div><div class='add'>+		 * maintain a low power state regardless of whether</div><div class='add'>+		 * the Bluetooth module drives the pin in either</div><div class='add'>+		 * direction or leaves the pin fully unpowered.</div><div class='add'>+		 */</div><div class='add'>+		bias-bus-hold;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {</div><div class='add'>+		pins = "gpio29";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure pull-down on RTS. As RTS is active low</div><div class='add'>+		 * signal, pull it low to indicate the BT SoC that it</div><div class='add'>+		 * can wakeup the system anytime from suspend state by</div><div class='add'>+		 * pulling RX low (by sending wakeup bytes).</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure a pull-up on RX. This is needed to avoid</div><div class='add'>+		 * garbage data when the TX pin of the Bluetooth module</div><div class='add'>+		 * is floating which may cause spurious wakeups.</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {</div><div class='add'>+		pins = "gpio30";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		/*</div><div class='add'>+		 * Configure pull-up on TX when it isn't actively driven</div><div class='add'>+		 * to prevent BT SoC from receiving garbage during sleep.</div><div class='add'>+		 */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1 {</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	/delete-property/ interrupts;</div><div class='add'>+	interrupts-extended = &lt;&amp;intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			      &lt;&amp;tlmm 31 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;qup_uart7_sleep_cts&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_rts&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_tx&gt;,</div><div class='add'>+		    &lt;&amp;qup_uart7_sleep_rx&gt;;</div><div class='add'>+	pinctrl-names = "default",</div><div class='add'>+			"sleep";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth: bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6750-bt";</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='add'>+&amp;usb_1 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='hunk'>@@ -790,8 +1269,15 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;venus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wifi {</div><div class='ctx'> 	memory-region = &lt;&amp;wlan_fw_mem&gt;;</div><div class='add'>+	qcom,calibration-variant = "Qualcomm_rb3gen2";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */</div><div class='hunk'>@@ -812,6 +1298,21 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdc2_clk {</div><div class='add'>+	bias-disable;</div><div class='add'>+	drive-strength = &lt;16&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_cmd {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+	drive-strength = &lt;10&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_data {</div><div class='add'>+	bias-pull-up;</div><div class='add'>+	drive-strength = &lt;10&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	lt9611_irq_pin: lt9611-irq-state {</div><div class='ctx'> 		pins = "gpio24";</div><div class='hunk'>@@ -819,4 +1320,30 @@</div><div class='ctx'> 		drive-strength = &lt;2&gt;;</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pcie1_reset_n: pcie1-reset-n-state {</div><div class='add'>+		pins = "gpio2";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_wake_n: pcie1-wake-n-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_cd: sd-cd-state {</div><div class='add'>+		pins = "gpio91";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_audiocc {</div><div class='add'>+	compatible = "qcom,qcm6490-lpassaudiocc";</div><div class='add'>+	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi b/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi<br/>new file mode 100644<br/>index 000000000000..a94b0bfa98dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs8300-pmics.dtsi</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+	pmm8620au_0: pmic@0 {</div><div class='add'>+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmm8620au_0_rtc: rtc@6100 {</div><div class='add'>+			compatible = "qcom,pmk8350-rtc";</div><div class='add'>+			reg = &lt;0x6100&gt;, &lt;0x6200&gt;;</div><div class='add'>+			reg-names = "rtc", "alarm";</div><div class='add'>+			interrupts = &lt;0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			allow-set-time;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmm8620au_0_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pmm8620au_0_gpios 0 0 12&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmm8650au_1: pmic@2 {</div><div class='add'>+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x2 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmm8650au_1_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pmm8650au_1_gpios 0 0 12&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts<br/>new file mode 100644<br/>index 000000000000..cabb3f508704<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8300-ride.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs8300-ride.dts</a></div><div class='hunk'>@@ -0,0 +1,434 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qcs8300.dtsi"</div><div class='add'>+#include "qcs8300-pmics.dtsi"</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. QCS8300 Ride";</div><div class='add'>+	compatible = "qcom,qcs8300-ride", "qcom,qcs8300";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart7;</div><div class='add'>+		mmc0 = &amp;sdhc_1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulator-usb2-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "USB2_VBUS";</div><div class='add'>+		gpio = &lt;&amp;pmm8650au_1_gpios 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vreg_s4a: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4a";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s9a: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9a";</div><div class='add'>+			regulator-min-microvolt = &lt;1352000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1352000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3a: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3a";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4a: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7a";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8a";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9a: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9a";</div><div class='add'>+			regulator-min-microvolt = &lt;2970000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pmm8654au-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vreg_s5c: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5c";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;904000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4c: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6c: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7c: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	phy-mode = "2500base-x";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;ethernet0_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+	snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+	snps,ps-speed = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: phy@8 {</div><div class='add'>+			compatible = "ethernet-phy-id31c3.1c33";</div><div class='add'>+			reg = &lt;0x8&gt;;</div><div class='add'>+			device_type = "ethernet-phy";</div><div class='add'>+			interrupts-extended = &lt;&amp;tlmm 4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;tlmm 31 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;11000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;70000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_rx_setup: rx-queues-config {</div><div class='add'>+		snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+		snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+			snps,route-up;</div><div class='add'>+			snps,priority = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x1&gt;;</div><div class='add'>+			snps,route-ptp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x2&gt;;</div><div class='add'>+			snps,route-avcp;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,map-to-dma-channel = &lt;0x3&gt;;</div><div class='add'>+			snps,priority = &lt;0xc&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mtl_tx_setup: tx-queues-config {</div><div class='add'>+		snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		queue0 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue1 {</div><div class='add'>+			snps,dcb-algorithm;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue2 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		queue3 {</div><div class='add'>+			snps,avb-algorithm;</div><div class='add'>+			snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+			snps,high_credit = &lt;0x3e800&gt;;</div><div class='add'>+			snps,low_credit = &lt;0xffc18000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/qcs8300/a623_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmm8650au_1_gpios {</div><div class='add'>+	usb2_en: usb2-en-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-enable;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/cdsp0.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_gpdsp {</div><div class='add'>+	firmware-name = "qcom/qcs8300/gpdsp0.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	phy-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc1_state_on&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc1_state_off&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l8a&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_s4a&gt;;</div><div class='add'>+</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	ethernet0_default: ethernet0-default-state {</div><div class='add'>+		ethernet0_mdc: ethernet0-mdc-pins {</div><div class='add'>+			pins = "gpio5";</div><div class='add'>+			function = "emac0_mdc";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet0_mdio: ethernet0-mdio-pins {</div><div class='add'>+			pins = "gpio6";</div><div class='add'>+			function = "emac0_mdio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l8a&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;1100000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l4c&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;1200000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l7c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l7c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l9a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi<br/>new file mode 100644<br/>index 000000000000..8d78ccac411e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8300.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs8300.dtsi</a></div><div class='hunk'>@@ -0,0 +1,6223 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs8300-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-camcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-dispcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-gpucc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sa8775p-videocc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/firmware/qcom,scm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,osm-l3.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,qcs8300-rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		xo_board_clk: xo-board-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;38400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a78c";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;472&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a78c";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;472&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_1: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a78c";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;507&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu2_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_2: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a78c";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;507&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu2_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl0 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl0 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_3: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@10000 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_4: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@10100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x10100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_5: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@10200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x10200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_6: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@10300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x10300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3_cl1 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3_cl1 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='add'>+			l2_7: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_0: l3-cache-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_1: l3-cache-1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "silver-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+				entry-latency-us = &lt;449&gt;;</div><div class='add'>+				exit-latency-us = &lt;801&gt;;</div><div class='add'>+				min-residency-us = &lt;1574&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "silver-rail-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='add'>+				entry-latency-us = &lt;602&gt;;</div><div class='add'>+				exit-latency-us = &lt;961&gt;;</div><div class='add'>+				min-residency-us = &lt;4288&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "gold-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+				entry-latency-us = &lt;549&gt;;</div><div class='add'>+				exit-latency-us = &lt;901&gt;;</div><div class='add'>+				min-residency-us = &lt;1774&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "gold-rail-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='add'>+				entry-latency-us = &lt;702&gt;;</div><div class='add'>+				exit-latency-us = &lt;1061&gt;;</div><div class='add'>+				min-residency-us = &lt;4488&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		domain-idle-states {</div><div class='add'>+			silver_cluster_sleep: cluster-sleep-0 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='add'>+				entry-latency-us = &lt;2552&gt;;</div><div class='add'>+				exit-latency-us = &lt;2848&gt;;</div><div class='add'>+				min-residency-us = &lt;5908&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gold_cluster_sleep: cluster-sleep-1 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='add'>+				entry-latency-us = &lt;2752&gt;;</div><div class='add'>+				exit-latency-us = &lt;3048&gt;;</div><div class='add'>+				min-residency-us = &lt;6118&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			system_sleep: domain-sleep {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x42000144&gt;;</div><div class='add'>+				entry-latency-us = &lt;3263&gt;;</div><div class='add'>+				exit-latency-us = &lt;6562&gt;;</div><div class='add'>+				min-residency-us = &lt;9987&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table: opp-table-cpu0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-902400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;902400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(681600 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1017600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1017600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1017600 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1190400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1190400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (998400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1344000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1344000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1075200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1420800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1420800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1152000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1497600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1497600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1574400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1574400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1670400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1670400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1401600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1747200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1747200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1401600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1824000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1824000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1478400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1900800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1900800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1478400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1977600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1977600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2054400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2054400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2112000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2112000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu2_opp_table: opp-table-cpu2 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-940800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;940800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(681600 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1094400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1094400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1017600 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1344000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1344000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (998400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1420800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1420800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (998400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1497600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1497600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1075200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1574400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1574400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1152000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1632000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1632000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1804800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1804800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1900800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1900800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1977600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1977600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1401600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2054400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2054400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1478400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2131200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2131200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2208000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2208000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2284800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2284800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2361600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2361600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu4_opp_table: opp-table-cpu4 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-844800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;844800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(681600 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1113600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1113600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1708800 * 4) (921600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1209600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1209600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (998400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1305600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1305600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1075200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1382400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1382400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1152000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1459200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1459200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2092800 * 4) (1228800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1497600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1497600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1574400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1574400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1651200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1651200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1324800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1728000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1728000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1401600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1804800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1804800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(2736000 * 4) (1478400 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1881600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1881600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1958400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1958400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(3196800 * 4) (1612800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dummy_eud: dummy-sink {</div><div class='add'>+		compatible = "arm,coresight-dummy-sink";</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			port {</div><div class='add'>+				eud_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;swao_rep_out1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm: scm {</div><div class='add'>+			compatible = "qcom,scm-qcs8300", "qcom,scm";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x13000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the size */</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_virt: interconnect-0 {</div><div class='add'>+		compatible = "qcom,qcs8300-clk-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc_virt: interconnect-1 {</div><div class='add'>+		compatible = "qcom,qcs8300-mc-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table: opp-table-qup {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-120000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;120000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a55 {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a78 {</div><div class='add'>+		compatible = "arm,cortex-a78-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_pd0: power-domain-cluster0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cluster_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_pd1: power-domain-cluster1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;silver_cluster_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_pd: power-domain-system {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;system_sleep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		aop_image_mem: aop-image-region@90800000 {</div><div class='add'>+			reg = &lt;0x0 0x90800000 0x0 0x60000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_cmd_db_mem: aop-cmd-db-region@90860000 {</div><div class='add'>+			compatible = "qcom,cmd-db";</div><div class='add'>+			reg = &lt;0x0 0x90860000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem_mem: smem@90900000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x90900000 0x0 0x200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_machine_learning_mem: lpass-machine-learning-region@93b00000 {</div><div class='add'>+			reg = &lt;0x0 0x93b00000 0x0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap-region@94a00000 {</div><div class='add'>+			reg = &lt;0x0 0x94a00000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera_mem: camera-region@95200000 {</div><div class='add'>+			reg = &lt;0x0 0x95200000 0x0 0x500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: adsp-region@95c00000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0x95c00000 0x0 0x1e00000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_adsp_dtb_mem: q6-adsp-dtb-region@97a00000 {</div><div class='add'>+			reg = &lt;0x0 0x97a00000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_gpdsp_dtb_mem: q6-gpdsp-dtb-region@97a80000 {</div><div class='add'>+			reg = &lt;0x0 0x97a80000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpdsp_mem: gpdsp-region@97b00000 {</div><div class='add'>+			reg = &lt;0x0 0x97b00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_cdsp_dtb_mem: q6-cdsp-dtb-region@99900000 {</div><div class='add'>+			reg = &lt;0x0 0x99900000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_mem: cdsp-region@99980000 {</div><div class='add'>+			reg = &lt;0x0 0x99980000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_microcode_mem: gpu-microcode-region@9b780000 {</div><div class='add'>+			reg = &lt;0x0 0x9b780000 0x0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cvp_mem: cvp-region@9b782000 {</div><div class='add'>+			reg = &lt;0x0 0x9b782000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_mem: video-region@9be82000 {</div><div class='add'>+			reg = &lt;0x0 0x9be82000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-adsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;443&gt;, &lt;429&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-cdsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;94&gt;, &lt;432&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-gpdsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_GPDSP0</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_GPDSP0</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;617&gt;, &lt;616&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;17&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_gpdsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_gpdsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@100000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gcc";</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0xc7018&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipcc: mailbox@408000 {</div><div class='add'>+			compatible = "qcom,qcs8300-ipcc", "qcom,ipcc";</div><div class='add'>+			reg = &lt;0x0 0x408000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: efuse@784000 {</div><div class='add'>+			compatible = "qcom,qcs8300-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x0 0x00784000 0x0 0x2410&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			gpu_speed_bin: gpu_speed_bin@240c {</div><div class='add'>+				reg = &lt;0x240c 0x1&gt;;</div><div class='add'>+				bits = &lt;0 8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma0: dma-controller@900000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x900000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x416 0x0&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_0: geniqup@9c0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x9c0000 0x0 0x2000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_0_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_0_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x403 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@980000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x980000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c0_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0: spi@980000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x980000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi0_data_clk&gt;, &lt;&amp;qup_spi0_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0: serial@980000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x980000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart0_cts&gt;, &lt;&amp;qup_uart0_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart0_tx&gt;, &lt;&amp;qup_uart0_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@984000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x984000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c1_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@984000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x984000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi1_data_clk&gt;, &lt;&amp;qup_spi1_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: serial@984000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x984000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart1_cts&gt;, &lt;&amp;qup_uart1_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart1_tx&gt;, &lt;&amp;qup_uart1_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@988000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x988000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@988000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x988000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi2_data_clk&gt;, &lt;&amp;qup_spi2_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@988000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x988000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart2_cts&gt;, &lt;&amp;qup_uart2_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart2_tx&gt;, &lt;&amp;qup_uart2_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@98c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x98c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c3_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@98c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x98c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi3_data_clk&gt;, &lt;&amp;qup_spi3_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: serial@98c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x98c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart3_cts&gt;, &lt;&amp;qup_uart3_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart3_tx&gt;, &lt;&amp;qup_uart3_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@990000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x990000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c4_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@990000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x990000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi4_data_clk&gt;, &lt;&amp;qup_spi4_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@990000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x990000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart4_cts&gt;, &lt;&amp;qup_uart4_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart4_tx&gt;, &lt;&amp;qup_uart4_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@994000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x994000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c5_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@994000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x994000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi5_data_clk&gt;, &lt;&amp;qup_spi5_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@994000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x994000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart5_cts&gt;, &lt;&amp;qup_uart5_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart5_tx&gt;, &lt;&amp;qup_uart5_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@998000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x998000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c6_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@998000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x998000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi6_data_clk&gt;, &lt;&amp;qup_spi6_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart6: serial@998000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x998000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart6_cts&gt;, &lt;&amp;qup_uart6_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart6_tx&gt;, &lt;&amp;qup_uart6_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@99c000 {</div><div class='add'>+				compatible = "qcom,geni-debug-uart";</div><div class='add'>+				reg = &lt;0x0 0x0099c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart7_tx&gt;, &lt;&amp;qup_uart7_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma1: dma-controller@a00000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0xa00000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x456 0x0&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_1: geniqup@ac0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0xac0000 0x0 0x2000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_1_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_1_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x443 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@a80000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c8_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi8: spi@a80000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi8_data_clk&gt;, &lt;&amp;qup_spi8_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart8: serial@a80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart8_cts&gt;, &lt;&amp;qup_uart8_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart8_tx&gt;, &lt;&amp;qup_uart8_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c9: i2c@a84000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa84000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c9_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi9: spi@a84000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa84000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi9_data_clk&gt;, &lt;&amp;qup_spi9_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart9: serial@a84000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa84000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart9_cts&gt;, &lt;&amp;qup_uart9_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart9_tx&gt;, &lt;&amp;qup_uart9_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@a88000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c10_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi10: spi@a88000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi10_data_clk&gt;, &lt;&amp;qup_spi10_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart10: serial@a88000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart10_cts&gt;, &lt;&amp;qup_uart10_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart10_tx&gt;, &lt;&amp;qup_uart10_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c11: i2c@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa8c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c11_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart11: serial@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa8c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart11_tx&gt;, &lt;&amp;qup_uart11_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c12: i2c@a90000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa90000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c12_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi12: spi@a90000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa90000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi12_data_clk&gt;, &lt;&amp;qup_spi12_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart12: serial@a90000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa90000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart12_cts&gt;, &lt;&amp;qup_uart12_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart12_tx&gt;, &lt;&amp;qup_uart12_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c13: i2c@a94000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa94000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c13_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi13: spi@a94000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa94000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi13_data_clk&gt;, &lt;&amp;qup_spi13_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart13: serial@a94000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa94000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart13_cts&gt;, &lt;&amp;qup_uart13_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart13_tx&gt;, &lt;&amp;qup_uart13_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c14: i2c@a98000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa98000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c14_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi14: spi@a98000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa98000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi14_data_clk&gt;, &lt;&amp;qup_spi14_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart14: serial@a98000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa98000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart14_cts&gt;, &lt;&amp;qup_uart14_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart14_tx&gt;, &lt;&amp;qup_uart14_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 835 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c15: i2c@a9c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa9c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c15_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi15: spi@a9c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa9c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi15_data_clk&gt;, &lt;&amp;qup_spi15_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart15: serial@a9c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa9c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart15_cts&gt;, &lt;&amp;qup_uart15_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart15_tx&gt;, &lt;&amp;qup_uart15_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma3: dma-controller@b00000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0xb00000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x56 0x0&gt;;</div><div class='add'>+			dma-channels = &lt;4&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xf&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_3: geniqup@bc0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0xbc0000 0x0 0x2000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_3_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_3_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x43 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c16: i2c@b80000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xb80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c16_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 830 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma3 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma3 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi16: spi@b80000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xb80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi16_data_clk&gt;, &lt;&amp;qup_spi16_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 830 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma3 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma3 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart16: serial@b80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xb80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP3_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart16_cts&gt;, &lt;&amp;qup_uart16_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart16_tx&gt;, &lt;&amp;qup_uart16_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 830 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng: rng@10d2000 {</div><div class='add'>+			compatible = "qcom,qcs8300-trng", "qcom,trng";</div><div class='add'>+			reg = &lt;0x0 0x010d2000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		config_noc: interconnect@14c0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-config-noc";</div><div class='add'>+			reg = &lt;0x0 0x014c0000 0x0 0x13080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_noc: interconnect@1680000 {</div><div class='add'>+			compatible = "qcom,qcs8300-system-noc";</div><div class='add'>+			reg = &lt;0x0 0x01680000 0x0 0x15080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aggre1_noc: interconnect@16c0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-aggre1-noc";</div><div class='add'>+			reg = &lt;0x0 0x016c0000 0x0 0x17080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aggre2_noc: interconnect@1700000 {</div><div class='add'>+			compatible = "qcom,qcs8300-aggre2-noc";</div><div class='add'>+			reg = &lt;0x0 0x01700000 0x0 0x1a080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_anoc: interconnect@1760000 {</div><div class='add'>+			compatible = "qcom,qcs8300-pcie-anoc";</div><div class='add'>+			reg = &lt;0x0 0x01760000 0x0 0xc080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpdsp_anoc: interconnect@1780000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpdsp-anoc";</div><div class='add'>+			reg = &lt;0x0 0x01780000 0x0 0xd080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmss_noc: interconnect@17a0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-mmss-noc";</div><div class='add'>+			reg = &lt;0x0 0x017a0000 0x0 0x40000&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+			compatible = "qcom,qcs8300-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='add'>+			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			phys = &lt;&amp;ufs_mem_phy&gt;;</div><div class='add'>+			phy-names = "ufsphy";</div><div class='add'>+			lanes-per-direction = &lt;2&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_UFS_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "rst";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_UFS_PHY_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x100 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "ufs-ddr",</div><div class='add'>+					     "cpu-ufs";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_UNIPRO_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK&gt;;</div><div class='add'>+			clock-names = "core_clk",</div><div class='add'>+				      "bus_aggr_clk",</div><div class='add'>+				      "iface_clk",</div><div class='add'>+				      "core_clk_unipro",</div><div class='add'>+				      "ref_clk",</div><div class='add'>+				      "tx_lane0_sync_clk",</div><div class='add'>+				      "rx_lane0_sync_clk",</div><div class='add'>+				      "rx_lane1_sync_clk";</div><div class='add'>+			freq-table-hz = &lt;75000000 300000000&gt;,</div><div class='add'>+					&lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;,</div><div class='add'>+					&lt;75000000 300000000&gt;,</div><div class='add'>+					&lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;,</div><div class='add'>+					&lt;0 0&gt;;</div><div class='add'>+			qcom,ice = &lt;&amp;ice&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_phy: phy@1d87000 {</div><div class='add'>+			compatible = "qcom,qcs8300-qmp-ufs-phy", "qcom,sa8775p-qmp-ufs-phy";</div><div class='add'>+			reg = &lt;0x0 0x01d87000 0x0 0xe10&gt;;</div><div class='add'>+			/*</div><div class='add'>+			 * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It</div><div class='add'>+			 * enables the CXO clock to eDP *and* UFS PHY.</div><div class='add'>+			 */</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_EDP_REF_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "ref",</div><div class='add'>+				      "ref_aux",</div><div class='add'>+				      "qref";</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_UFS_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='add'>+			reset-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01dc4000 0x0 0x28000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			num-channels = &lt;20&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0x00&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0x00&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ice: crypto@1d88000 {</div><div class='add'>+			compatible = "qcom,qcs8300-inline-crypto-engine",</div><div class='add'>+				     "qcom,inline-crypto-engine";</div><div class='add'>+			reg = &lt;0x0 0x01d88000 0x0 0x18000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1f40000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0x0 0x01f40000 0x0 0x20000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr: syscon@1fc0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-tcsr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x1fc0000 0x0 0x30000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_adsp: remoteproc@3000000 {</div><div class='add'>+			compatible = "qcom,qcs8300-adsp-pas", "qcom,sa8775p-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x3000000 0x0 0x00100&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx",</div><div class='add'>+					     "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					memory-region = &lt;&amp;adsp_rpc_remote_heap_mem&gt;;</div><div class='add'>+					qcom,vmids = &lt;QCOM_SCM_VMID_LPASS</div><div class='add'>+						      QCOM_SCM_VMID_ADSP_HEAP&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2003 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2004 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2005 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x2001 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_ag_noc: interconnect@3c40000 {</div><div class='add'>+			compatible = "qcom,qcs8300-lpass-ag-noc";</div><div class='add'>+			reg = &lt;0x0 0x03c40000 0x0 0x17200&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm@4002000 {</div><div class='add'>+			compatible = "arm,coresight-stm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04002000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x16280000 0x0 0x180000&gt;;</div><div class='add'>+			reg-names = "stm-base",</div><div class='add'>+				    "stm-stimulus-base";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					stm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4004000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04004000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@400f000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0400f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4041000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04041000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel0_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel0_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;stm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4042000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04042000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlmm_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4045000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04045000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4841000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04841000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					prng_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_tpda_in19&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4850000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04850000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					pimem_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_tpda_in25&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4860000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04860000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_ch_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_tpda_in8&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4864000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04864000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@8 {</div><div class='add'>+					reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_ch_tpda_in8: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_ch_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4865000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04865000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_ch_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_ch_funnel_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_ch_funnel_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_ch_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4980000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04980000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing2_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing2_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4983000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04983000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing2_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing2_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing2_funnel_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_tpda_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4ac0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ac0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlmm_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlmm_tpda_in27&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4ac4000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ac4000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1b {</div><div class='add'>+					reg = &lt;27&gt;;</div><div class='add'>+</div><div class='add'>+					dlmm_tpda_in27: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlmm_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlmm_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlmm_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4ac5000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ac5000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlmm_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlmm_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlmm_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4ad0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ad0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct0_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_tpda_in26&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4ad3000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ad3000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@13 {</div><div class='add'>+					reg = &lt;19&gt;;</div><div class='add'>+</div><div class='add'>+					dlct0_tpda_in19: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;prng_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@19 {</div><div class='add'>+					reg = &lt;25&gt;;</div><div class='add'>+</div><div class='add'>+					dlct0_tpda_in25: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;pimem_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1a {</div><div class='add'>+					reg = &lt;26&gt;;</div><div class='add'>+</div><div class='add'>+					dlct0_tpda_in26: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct0_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4ad4000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04ad4000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					dlct0_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					dlct0_funnel_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel5_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct0_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4b04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_funnel_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_funnel_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc_etf: tmc@4b05000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;swao_rep_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@4b06000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b06000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					swao_rep_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					swao_rep_out1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;eud_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4b08000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm2_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm4_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b09000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b09000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b0a000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b0a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b0b000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b0b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm2_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b0c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b0c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b0d000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b0d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm4_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@4b13000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b13000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4b80000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b80000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing0_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing0_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4b86000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b86000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing0_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing0_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing0_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing0_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4b87000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b87000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing0_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing0_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					turing0_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_funnel_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@4b8b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04b8b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4c40000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c40000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					gdsp_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_tpda_in8&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4c44000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c44000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					gdsp_tpda_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing2_funnel_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@8 {</div><div class='add'>+					reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+					gdsp_tpda_in8: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					gdsp_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4c45000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c45000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					gdsp_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gdsp_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					gdsp_funnel_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;turing0_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					gdsp_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_funnel_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4c50000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c50000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpda_in8&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4c54000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c54000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@8 {</div><div class='add'>+					reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_tpda_in8: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4c55000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04c55000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_ch_funnel_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4e00000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e00000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_tpdm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@4e03000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e03000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ddr_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel0_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					ddr_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel1_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					ddr_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpdm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel5_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4e04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel5_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel5_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct0_funnel_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4e10000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e10000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel0_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4e12000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e12000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel0_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel0_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@4e20000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e20000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel1_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@4e22000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x04e22000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel1_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel1_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6040000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06040000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6140000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06140000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6240000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06240000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm2_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6340000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06340000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6440000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06440000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm4_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6540000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06540000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm5_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6640000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06640000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm6_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@6740000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06740000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm7_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6800000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06800000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm2_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm4_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm5_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm6_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel0_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm7_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_funnel0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel1_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6810000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06810000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel1_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					apss_funnel1_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_funnel1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@682b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0682b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6860000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06860000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpdm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6861000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06861000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpdm4_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@6863000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06863000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					apss_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					apss_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					apss_tpda_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpdm2_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					apss_tpda_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpdm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					apss_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpdm4_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_funnel1_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@68a0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x068a0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@68b0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x068b0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@68c0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x068c0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					apss_tpdm2_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;apss_tpda_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@68e0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x068e0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@68f0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x068f0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6900000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06900000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_1: mmc@87c4000 {</div><div class='add'>+			compatible = "qcom,qcs8300-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0x0 0x087c4000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x087c5000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "hc",</div><div class='add'>+				    "cqhci";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 521 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq",</div><div class='add'>+					  "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC1_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc1_opp_table&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_SDC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDC1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='add'>+			qcom,dll-config = &lt;0x000f64ee&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+			supports-cqe;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc1_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-200000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-384000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;384000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1_hsphy: phy@8904000 {</div><div class='add'>+			compatible = "qcom,qcs8300-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-7nm-phy";</div><div class='add'>+			reg = &lt;0x0 0x08904000 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB2_PHY_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_hsphy: phy@8906000 {</div><div class='add'>+			compatible = "qcom,qcs8300-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-7nm-phy";</div><div class='add'>+			reg = &lt;0x0 0x08906000 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB2_PHY_SEC_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_qmpphy: phy@8907000 {</div><div class='add'>+			compatible = "qcom,qcs8300-qmp-usb3-uni-phy";</div><div class='add'>+			reg = &lt;0x0 0x08907000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "com_aux",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3PHY_PHY_PRIM_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "phy_phy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_USB30_PRIM_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "usb3_prim_phy_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serdes0: phy@8909000 {</div><div class='add'>+			compatible = "qcom,qcs8300-dwmac-sgmii-phy", "qcom,sa8775p-dwmac-sgmii-phy";</div><div class='add'>+			reg = &lt;0x0 0x08909000 0x0 0x00000e10&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SGMI_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "sgmi_ref";</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@3d00000 {</div><div class='add'>+			compatible = "qcom,adreno-623.0", "qcom,adreno";</div><div class='add'>+			reg = &lt;0x0 0x03d00000 0x0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d9e000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d61000 0x0 0x800&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory",</div><div class='add'>+				    "cx_mem",</div><div class='add'>+				    "cx_dbgc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 0 0xc00&gt;,</div><div class='add'>+				 &lt;&amp;adreno_smmu 1 0xc00&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "gfx-mem";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='add'>+			nvmem-cell-names = "speed_bin";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gpu_zap_shader: zap-shader {</div><div class='add'>+				memory-region = &lt;&amp;gpu_microcode_mem&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-877000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;877000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;12484375&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-780000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;780000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;10687500&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-599000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;599000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-479000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;479000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;5285156&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmu: gmu@3d6a000 {</div><div class='add'>+			compatible = "qcom,adreno-gmu-623.0", "qcom,adreno-gmu";</div><div class='add'>+			reg = &lt;0x0 0x03d6a000 0x0 0x34000&gt;,</div><div class='add'>+			      &lt;0x0 0x03de0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0b290000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hfi", "gmu";</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;;</div><div class='add'>+			clock-names = "gmu",</div><div class='add'>+				      "cxo",</div><div class='add'>+				      "axi",</div><div class='add'>+				      "memnoc",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "hub";</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gpucc GPU_CC_GX_GDSC&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "gx";</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 5 0xc00&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			gmu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-500000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpucc: clock-controller@3d90000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpucc";</div><div class='add'>+			reg = &lt;0x0 0x03d90000 0x0 0xa000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+			clock-names = "bi_tcxo",</div><div class='add'>+				      "gcc_gpu_gpll0_clk_src",</div><div class='add'>+				      "gcc_gpu_gpll0_div_clk_src";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adreno_smmu: iommu@3da0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-smmu-500", "qcom,adreno-smmu",</div><div class='add'>+				     "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x3da0000 0x0 0x20000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_AON_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "gcc_gpu_memnoc_gfx_clk",</div><div class='add'>+				      "gcc_gpu_snoc_dvm_gfx_clk",</div><div class='add'>+				      "gpu_cc_ahb_clk",</div><div class='add'>+				      "gpu_cc_hlos1_vote_gpu_smmu_clk",</div><div class='add'>+				      "gpu_cc_cx_gmu_clk",</div><div class='add'>+				      "gpu_cc_hub_cx_int_clk",</div><div class='add'>+				      "gpu_cc_hub_aon_clk";</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu@9091000 {</div><div class='add'>+			compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x9091000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 620 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;llcc_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			llcc_bwmon_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-0 {</div><div class='add'>+					opp-peak-kBps = &lt;762000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1 {</div><div class='add'>+					opp-peak-kBps = &lt;1720000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-2 {</div><div class='add'>+					opp-peak-kBps = &lt;2086000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-3 {</div><div class='add'>+					opp-peak-kBps = &lt;2601000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-4 {</div><div class='add'>+					opp-peak-kBps = &lt;2929000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-5 {</div><div class='add'>+					opp-peak-kBps = &lt;5931000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-6 {</div><div class='add'>+					opp-peak-kBps = &lt;6515000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-7 {</div><div class='add'>+					opp-peak-kBps = &lt;7984000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-8 {</div><div class='add'>+					opp-peak-kBps = &lt;10437000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-9 {</div><div class='add'>+					opp-peak-kBps = &lt;12195000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu@90b5400 {</div><div class='add'>+			compatible = "qcom,qcs8300-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x90b5400 0x0 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			cpu_bwmon_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-0 {</div><div class='add'>+					opp-peak-kBps = &lt;9155000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1 {</div><div class='add'>+					opp-peak-kBps = &lt;12298000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-2 {</div><div class='add'>+					opp-peak-kBps = &lt;14236000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-3 {</div><div class='add'>+					opp-peak-kBps = &lt;16265000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu@90b6400 {</div><div class='add'>+			compatible = "qcom,qcs8300-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x90b6400 0x0 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dc_noc: interconnect@90e0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-dc-noc";</div><div class='add'>+			reg = &lt;0x0 0x090e0000 0x0 0x5080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem_noc: interconnect@9100000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gem-noc";</div><div class='add'>+			reg = &lt;0x0 0x9100000 0x0 0xf7080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		llcc: system-cache-controller@9200000 {</div><div class='add'>+			compatible = "qcom,qcs8300-llcc";</div><div class='add'>+			reg = &lt;0x0 0x09200000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x09300000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x09400000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x09500000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x09a00000 0x0 0x80000&gt;;</div><div class='add'>+			reg-names = "llcc0_base",</div><div class='add'>+				    "llcc1_base",</div><div class='add'>+				    "llcc2_base",</div><div class='add'>+				    "llcc3_base",</div><div class='add'>+				    "llcc_broadcast_base";</div><div class='add'>+			interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1: usb@a600000 {</div><div class='add'>+			compatible = "qcom,qcs8300-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a600000 0x0 0xfc100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_USB30_PRIM_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr", "apps-usb";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x80 0x0&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_qmpphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_u3_susphy_quirk;</div><div class='add'>+</div><div class='add'>+			wakeup-source;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2: usb@a400000 {</div><div class='add'>+			compatible = "qcom,qcs8300-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a400000 0x0 0xfc100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB2_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_MOCK_UTMI_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB20_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB20_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;120000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 9 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_USB20_PRIM_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB20_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_USB2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_USB2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr", "apps-usb";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x20 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy";</div><div class='add'>+			maximum-speed = "high-speed";</div><div class='add'>+</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_u3_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+</div><div class='add'>+			qcom,select-utmi-as-pipe-clk;</div><div class='add'>+			wakeup-source;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		iris: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,qcs8300-iris";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x0aa00000 0x0 0xf0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VIDEO_CC_MVS0C_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VIDEO_CC_MVS0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "mmcx";</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;iris_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "vcodec0_core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "cpu-cfg",</div><div class='add'>+					     "video-mem";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "bus";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0880 0x0400&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x0887 0x0400&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			iris_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-366000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-444000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;444000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-533000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;533000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-560000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;560000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		videocc: clock-controller@abf0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-videocc";</div><div class='add'>+			reg = &lt;0x0 0x0abf0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camcc: clock-controller@ade0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-camcc";</div><div class='add'>+			reg = &lt;0x0 0x0ade0000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dispcc: clock-controller@af00000 {</div><div class='add'>+			compatible = "qcom,sa8775p-dispcc0";</div><div class='add'>+			reg = &lt;0x0 0x0af00000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdc: interrupt-controller@b220000 {</div><div class='add'>+			compatible = "qcom,qcs8300-pdc", "qcom,pdc";</div><div class='add'>+			reg = &lt;0x0 0xb220000 0x0 0x30000&gt;,</div><div class='add'>+			      &lt;0x0 0x17c000f0 0x0 0x64&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			qcom,pdc-ranges = &lt;0 480 40&gt;,</div><div class='add'>+					  &lt;40 140 14&gt;,</div><div class='add'>+					  &lt;54 263 1&gt;,</div><div class='add'>+					  &lt;55 306 4&gt;,</div><div class='add'>+					  &lt;59 312 3&gt;,</div><div class='add'>+					  &lt;62 374 2&gt;,</div><div class='add'>+					  &lt;64 434 2&gt;,</div><div class='add'>+					  &lt;66 438 2&gt;,</div><div class='add'>+					  &lt;70 520 1&gt;,</div><div class='add'>+					  &lt;73 523 1&gt;,</div><div class='add'>+					  &lt;118 568 6&gt;,</div><div class='add'>+					  &lt;124 609 3&gt;,</div><div class='add'>+					  &lt;159 638 1&gt;,</div><div class='add'>+					  &lt;160 720 3&gt;,</div><div class='add'>+					  &lt;169 728 30&gt;,</div><div class='add'>+					  &lt;199 416 2&gt;,</div><div class='add'>+					  &lt;201 449 1&gt;,</div><div class='add'>+					  &lt;202 89 1&gt;,</div><div class='add'>+					  &lt;203 451 1&gt;,</div><div class='add'>+					  &lt;204 462 1&gt;,</div><div class='add'>+					  &lt;205 264 1&gt;,</div><div class='add'>+					  &lt;206 579 1&gt;,</div><div class='add'>+					  &lt;207 653 1&gt;,</div><div class='add'>+					  &lt;208 656 1&gt;,</div><div class='add'>+					  &lt;209 659 1&gt;,</div><div class='add'>+					  &lt;210 122 1&gt;,</div><div class='add'>+					  &lt;211 699 1&gt;,</div><div class='add'>+					  &lt;212 705 1&gt;,</div><div class='add'>+					  &lt;213 450 1&gt;,</div><div class='add'>+					  &lt;214 643 2&gt;,</div><div class='add'>+					  &lt;216 646 5&gt;,</div><div class='add'>+					  &lt;221 390 5&gt;,</div><div class='add'>+					  &lt;226 700 2&gt;,</div><div class='add'>+					  &lt;228 440 1&gt;,</div><div class='add'>+					  &lt;229 663 1&gt;,</div><div class='add'>+					  &lt;230 524 2&gt;,</div><div class='add'>+					  &lt;232 612 3&gt;,</div><div class='add'>+					  &lt;235 723 5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss_qmp: power-management@c300000 {</div><div class='add'>+			compatible = "qcom,qcs8300-aoss-qmp", "qcom,aoss-qmp";</div><div class='add'>+			reg = &lt;0x0 0x0c300000 0x0 0x400&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_AOP</div><div class='add'>+					       IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+					       IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			mboxes = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram@c3f0000 {</div><div class='add'>+			compatible = "qcom,rpmh-stats";</div><div class='add'>+			reg = &lt;0x0 0x0c3f0000 0x0 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi_bus: spmi@c440000 {</div><div class='add'>+			compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x0 0x0c440000 0x0 0x1100&gt;,</div><div class='add'>+			      &lt;0x0 0x0c600000 0x0 0x2000000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e600000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e700000 0x0 0xa0000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c40a000 0x0 0x26000&gt;;</div><div class='add'>+			reg-names = "core",</div><div class='add'>+				    "chnls",</div><div class='add'>+				    "obsrvr",</div><div class='add'>+				    "intr",</div><div class='add'>+				    "cnfg";</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "periph_irq";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@f100000 {</div><div class='add'>+			compatible = "qcom,qcs8300-tlmm";</div><div class='add'>+			reg = &lt;0x0 0x0f100000 0x0 0x300000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 134&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+			hs0_mi2s_active: hs0-mi2s-active-state {</div><div class='add'>+				pins = "gpio106", "gpio107", "gpio108", "gpio109";</div><div class='add'>+				function = "hs0_mi2s";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mi2s1_active: mi2s1-active-state {</div><div class='add'>+				data0-pins {</div><div class='add'>+					pins = "gpio100";</div><div class='add'>+					function = "mi2s1_data0";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data1-pins {</div><div class='add'>+					pins = "gpio101";</div><div class='add'>+					function = "mi2s1_data1";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sclk-pins {</div><div class='add'>+					pins = "gpio98";</div><div class='add'>+					function = "mi2s1_sck";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ws-pins {</div><div class='add'>+					pins = "gpio99";</div><div class='add'>+					function = "mi2s1_ws";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c0_data_clk: qup-i2c0-data-clk-state {</div><div class='add'>+				pins = "gpio17", "gpio18";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c1_data_clk: qup-i2c1-data-clk-state {</div><div class='add'>+				pins = "gpio19", "gpio20";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c2_data_clk: qup-i2c2-data-clk-state {</div><div class='add'>+				pins = "gpio33", "gpio34";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c3_data_clk: qup-i2c3-data-clk-state {</div><div class='add'>+				pins = "gpio25", "gpio26";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c4_data_clk: qup-i2c4-data-clk-state {</div><div class='add'>+				pins = "gpio29", "gpio30";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c5_data_clk: qup-i2c5-data-clk-state {</div><div class='add'>+				pins = "gpio21", "gpio22";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c6_data_clk: qup-i2c6-data-clk-state {</div><div class='add'>+				pins = "gpio80", "gpio81";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c8_data_clk: qup-i2c8-data-clk-state {</div><div class='add'>+				pins = "gpio37", "gpio38";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c9_data_clk: qup-i2c9-data-clk-state {</div><div class='add'>+				pins = "gpio39", "gpio40";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c10_data_clk: qup-i2c10-data-clk-state {</div><div class='add'>+				pins = "gpio84", "gpio85";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c11_data_clk: qup-i2c11-data-clk-state {</div><div class='add'>+				pins = "gpio41", "gpio42";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c12_data_clk: qup-i2c12-data-clk-state {</div><div class='add'>+				pins = "gpio45", "gpio46";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c13_data_clk: qup-i2c13-data-clk-state {</div><div class='add'>+				pins = "gpio49", "gpio50";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c14_data_clk: qup-i2c14-data-clk-state {</div><div class='add'>+				pins = "gpio89", "gpio90";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c15_data_clk: qup-i2c15-data-clk-state {</div><div class='add'>+				pins = "gpio91", "gpio92";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c16_data_clk: qup-i2c16-data-clk-state {</div><div class='add'>+				pins = "gpio10", "gpio11";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_data_clk: qup-spi0-data-clk-state {</div><div class='add'>+				pins = "gpio17", "gpio18", "gpio19";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_cs: qup-spi0-cs-state {</div><div class='add'>+				pins = "gpio20";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_cs_gpio: qup-spi0-cs-gpio-state {</div><div class='add'>+				pins = "gpio20";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_data_clk: qup-spi1-data-clk-state {</div><div class='add'>+				pins = "gpio19", "gpio20", "gpio17";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_cs: qup-spi1-cs-state {</div><div class='add'>+				pins = "gpio18";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_cs_gpio: qup-spi1-cs-gpio-state {</div><div class='add'>+				pins = "gpio18";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_data_clk: qup-spi2-data-clk-state {</div><div class='add'>+				pins = "gpio33", "gpio34", "gpio35";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs: qup-spi2-cs-state {</div><div class='add'>+				pins = "gpio36";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs_gpio: qup-spi2-cs-gpio-state {</div><div class='add'>+				pins = "gpio36";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_data_clk: qup-spi3-data-clk-state {</div><div class='add'>+				pins = "gpio25", "gpio26", "gpio27";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_cs: qup-spi3-cs-state {</div><div class='add'>+				pins = "gpio28";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_cs_gpio: qup-spi3-cs-gpio-state {</div><div class='add'>+				pins = "gpio28";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_data_clk: qup-spi4-data-clk-state {</div><div class='add'>+				pins = "gpio29", "gpio30", "gpio31";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs: qup-spi4-cs-state {</div><div class='add'>+				pins = "gpio32";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs_gpio: qup-spi4-cs-gpio-state {</div><div class='add'>+				pins = "gpio32";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_data_clk: qup-spi5-data-clk-state {</div><div class='add'>+				pins = "gpio21", "gpio22", "gpio23";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_cs: qup-spi5-cs-state {</div><div class='add'>+				pins = "gpio24";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_cs_gpio: qup-spi5-cs-gpio-state {</div><div class='add'>+				pins = "gpio24";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_data_clk: qup-spi6-data-clk-state {</div><div class='add'>+				pins = "gpio80", "gpio81", "gpio82";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs: qup-spi6-cs-state {</div><div class='add'>+				pins = "gpio83";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs_gpio: qup-spi6-cs-gpio-state {</div><div class='add'>+				pins = "gpio83";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_data_clk: qup-spi8-data-clk-state {</div><div class='add'>+				pins = "gpio37", "gpio38", "gpio39";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_cs: qup-spi8-cs-state {</div><div class='add'>+				pins = "gpio40";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_cs_gpio: qup-spi8-cs-gpio-state {</div><div class='add'>+				pins = "gpio40";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_data_clk: qup-spi9-data-clk-state {</div><div class='add'>+				pins = "gpio39", "gpio40", "gpio37";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_cs: qup-spi9-cs-state {</div><div class='add'>+				pins = "gpio38";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_cs_gpio: qup-spi9-cs-gpio-state {</div><div class='add'>+				pins = "gpio38";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_data_clk: qup-spi10-data-clk-state {</div><div class='add'>+				pins = "gpio84", "gpio85", "gpio86";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_cs: qup-spi10-cs-state {</div><div class='add'>+				pins = "gpio87";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_cs_gpio: qup-spi10-cs-gpio-state {</div><div class='add'>+				pins = "gpio87";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_data_clk: qup-spi12-data-clk-state {</div><div class='add'>+				pins = "gpio45", "gpio46", "gpio47";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_cs: qup-spi12-cs-state {</div><div class='add'>+				pins = "gpio48";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_cs_gpio: qup-spi12-cs-gpio-state {</div><div class='add'>+				pins = "gpio48";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi13_data_clk: qup-spi13-data-clk-state {</div><div class='add'>+				pins = "gpio49", "gpio50", "gpio51";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi13_cs: qup-spi13-cs-state {</div><div class='add'>+				pins = "gpio52";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi13_cs_gpio: qup-spi13-cs-gpio-state {</div><div class='add'>+				pins = "gpio52";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi14_data_clk: qup-spi14-data-clk-state {</div><div class='add'>+				pins = "gpio89", "gpio90", "gpio91";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi14_cs: qup-spi14-cs-state {</div><div class='add'>+				pins = "gpio92";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi14_cs_gpio: qup-spi14-cs-gpio-state {</div><div class='add'>+				pins = "gpio92";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_data_clk: qup-spi15-data-clk-state {</div><div class='add'>+				pins = "gpio91", "gpio92", "gpio89";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_cs: qup-spi15-cs-state {</div><div class='add'>+				pins = "gpio90";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_cs_gpio: qup-spi15-cs-gpio-state {</div><div class='add'>+				pins = "gpio90";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi16_data_clk: qup-spi16-data-clk-state {</div><div class='add'>+				pins = "gpio10", "gpio11", "gpio12";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi16_cs: qup-spi16-cs-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi16_cs_gpio: qup-spi16-cs-gpio-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_cts: qup-uart0-cts-state {</div><div class='add'>+				pins = "gpio17";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_rts: qup-uart0-rts-state {</div><div class='add'>+				pins = "gpio18";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_tx: qup-uart0-tx-state {</div><div class='add'>+				pins = "gpio19";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_rx: qup-uart0-rx-state {</div><div class='add'>+				pins = "gpio20";</div><div class='add'>+				function = "qup0_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart1_cts: qup-uart1-cts-state {</div><div class='add'>+				pins = "gpio19";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart1_rts: qup-uart1-rts-state {</div><div class='add'>+				pins = "gpio20";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart1_tx: qup-uart1-tx-state {</div><div class='add'>+				pins = "gpio17";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart1_rx: qup-uart1-rx-state {</div><div class='add'>+				pins = "gpio18";</div><div class='add'>+				function = "qup0_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_cts: qup-uart2-cts-state {</div><div class='add'>+				pins = "gpio33";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_rts: qup-uart2-rts-state {</div><div class='add'>+				pins = "gpio34";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_tx: qup-uart2-tx-state {</div><div class='add'>+				pins = "gpio35";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_rx: qup-uart2-rx-state {</div><div class='add'>+				pins = "gpio36";</div><div class='add'>+				function = "qup0_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart3_cts: qup-uart3-cts-state {</div><div class='add'>+				pins = "gpio25";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart3_rts: qup-uart3-rts-state {</div><div class='add'>+				pins = "gpio26";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart3_tx: qup-uart3-tx-state {</div><div class='add'>+				pins = "gpio27";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart3_rx: qup-uart3-rx-state {</div><div class='add'>+				pins = "gpio28";</div><div class='add'>+				function = "qup0_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_cts: qup-uart4-cts-state {</div><div class='add'>+				pins = "gpio29";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_rts: qup-uart4-rts-state {</div><div class='add'>+				pins = "gpio30";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_tx: qup-uart4-tx-state {</div><div class='add'>+				pins = "gpio31";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_rx: qup-uart4-rx-state {</div><div class='add'>+				pins = "gpio32";</div><div class='add'>+				function = "qup0_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart5_cts: qup-uart5-cts-state {</div><div class='add'>+				pins = "gpio21";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart5_rts: qup-uart5-rts-state {</div><div class='add'>+				pins = "gpio22";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart5_tx: qup-uart5-tx-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart5_rx: qup-uart5-rx-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup0_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_cts: qup-uart6-cts-state {</div><div class='add'>+				pins = "gpio80";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_rts: qup-uart6-rts-state {</div><div class='add'>+				pins = "gpio81";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_tx: qup-uart6-tx-state {</div><div class='add'>+				pins = "gpio82";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_rx: qup-uart6-rx-state {</div><div class='add'>+				pins = "gpio83";</div><div class='add'>+				function = "qup0_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_tx: qup-uart7-tx-state {</div><div class='add'>+				pins = "gpio43";</div><div class='add'>+				function = "qup0_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_rx: qup-uart7-rx-state {</div><div class='add'>+				pins = "gpio44";</div><div class='add'>+				function = "qup0_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart8_cts: qup-uart8-cts-state {</div><div class='add'>+				pins = "gpio37";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart8_rts: qup-uart8-rts-state {</div><div class='add'>+				pins = "gpio38";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart8_tx: qup-uart8-tx-state {</div><div class='add'>+				pins = "gpio39";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart8_rx: qup-uart8-rx-state {</div><div class='add'>+				pins = "gpio40";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart9_cts: qup-uart9-cts-state {</div><div class='add'>+				pins = "gpio39";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart9_rts: qup-uart9-rts-state {</div><div class='add'>+				pins = "gpio40";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart9_tx: qup-uart9-tx-state {</div><div class='add'>+				pins = "gpio37";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart9_rx: qup-uart9-rx-state {</div><div class='add'>+				pins = "gpio38";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart10_cts: qup-uart10-cts-state {</div><div class='add'>+				pins = "gpio84";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart10_rts: qup-uart10-rts-state {</div><div class='add'>+				pins = "gpio84";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart10_tx: qup-uart10-tx-state {</div><div class='add'>+				pins = "gpio85";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart10_rx: qup-uart10-rx-state {</div><div class='add'>+				pins = "gpio87";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart11_tx: qup-uart11-tx-state {</div><div class='add'>+				pins = "gpio41";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart11_rx: qup-uart11-rx-state {</div><div class='add'>+				pins = "gpio42";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart12_cts: qup-uart12-cts-state {</div><div class='add'>+				pins = "gpio45";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart12_rts: qup-uart12-rts-state {</div><div class='add'>+				pins = "gpio46";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart12_tx: qup-uart12-tx-state {</div><div class='add'>+				pins = "gpio47";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart12_rx: qup-uart12-rx-state {</div><div class='add'>+				pins = "gpio48";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart13_cts: qup-uart13-cts-state {</div><div class='add'>+				pins = "gpio49";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart13_rts: qup-uart13-rts-state {</div><div class='add'>+				pins = "gpio50";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart13_tx: qup-uart13-tx-state {</div><div class='add'>+				pins = "gpio51";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart13_rx: qup-uart13-rx-state {</div><div class='add'>+				pins = "gpio52";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_cts: qup-uart14-cts-state {</div><div class='add'>+				pins = "gpio89";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_rts: qup-uart14-rts-state {</div><div class='add'>+				pins = "gpio90";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_tx: qup-uart14-tx-state {</div><div class='add'>+				pins = "gpio91";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_rx: qup-uart14-rx-state {</div><div class='add'>+				pins = "gpio92";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart15_cts: qup-uart15-cts-state {</div><div class='add'>+				pins = "gpio91";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart15_rts: qup-uart15-rts-state {</div><div class='add'>+				pins = "gpio92";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart15_tx: qup-uart15-tx-state {</div><div class='add'>+				pins = "gpio89";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart15_rx: qup-uart15-rx-state {</div><div class='add'>+				pins = "gpio90";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart16_cts: qup-uart16-cts-state {</div><div class='add'>+				pins = "gpio10";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart16_rts: qup-uart16-rts-state {</div><div class='add'>+				pins = "gpio11";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart16_tx: qup-uart16-tx-state {</div><div class='add'>+				pins = "gpio12";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart16_rx: qup-uart16-rx-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_state_on: sdc1-on-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_state_off: sdc1-off-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram: sram@146d8000 {</div><div class='add'>+			compatible = "qcom,qcs8300-imem", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x146d8000 0x0 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x146d8000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			pil-reloc@94c {</div><div class='add'>+				compatible = "qcom,pil-reloc-info";</div><div class='add'>+				reg = &lt;0x94c 0xc8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_smmu: iommu@15000000 {</div><div class='add'>+			compatible = "qcom,qcs8300-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x15000000 0x0 0x100000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;2&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI  98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI  99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 912 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 911 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 909 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 908 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 906 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 905 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 904 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 902 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 901 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 900 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 899 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 898 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 895 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_smmu: iommu@15200000 {</div><div class='add'>+			compatible = "qcom,qcs8300-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x15200000 0x0 0x80000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;2&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 920 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 921 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 925 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 926 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 927 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 928 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 952 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 953 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 954 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 955 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 956 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 957 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 958 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 888 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 820 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 843 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 845 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 847 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 802 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 806 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 807 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 808 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 809 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 814 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 837 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 838 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 854 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 855 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 794 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@17a00000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x17a60000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			redistributor-stride = &lt;0x0 0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@17c10000 {</div><div class='add'>+			compatible = "qcom,apss-wdt-qcs8300", "qcom,kpss-wdt";</div><div class='add'>+			reg = &lt;0x0 0x17c10000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@17c20000 {</div><div class='add'>+			compatible = "arm,armv7-timer-mem";</div><div class='add'>+			reg = &lt;0x0 0x17c20000 0x0 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x0 0x20000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			frame@17c21000 {</div><div class='add'>+				reg = &lt;0x17c21000 0x1000&gt;,</div><div class='add'>+				      &lt;0x17c22000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c23000 {</div><div class='add'>+				reg = &lt;0x17c23000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;1&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c25000 {</div><div class='add'>+				reg = &lt;0x17c25000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c27000 {</div><div class='add'>+				reg = &lt;0x17c27000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;3&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c29000 {</div><div class='add'>+				reg = &lt;0x17c29000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;4&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c2b000 {</div><div class='add'>+				reg = &lt;0x17c2b000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;5&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c2d000 {</div><div class='add'>+				reg = &lt;0x17c2d000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;6&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_rsc: rsc@18200000 {</div><div class='add'>+			compatible = "qcom,rpmh-rsc";</div><div class='add'>+			reg = &lt;0x0 0x18200000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x18210000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x18220000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "drv-0",</div><div class='add'>+				    "drv-1",</div><div class='add'>+				    "drv-2";</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+			label = "apps_rsc";</div><div class='add'>+</div><div class='add'>+			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+			qcom,drv-id = &lt;2&gt;;</div><div class='add'>+			qcom,tcs-config = &lt;ACTIVE_TCS 2&gt;,</div><div class='add'>+					  &lt;SLEEP_TCS 3&gt;,</div><div class='add'>+					  &lt;WAKE_TCS 3&gt;,</div><div class='add'>+					  &lt;CONTROL_TCS 0&gt;;</div><div class='add'>+</div><div class='add'>+			apps_bcm_voter: bcm-voter {</div><div class='add'>+				compatible = "qcom,bcm-voter";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhcc: clock-controller {</div><div class='add'>+				compatible = "qcom,sa8775p-rpmh-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;xo_board_clk&gt;;</div><div class='add'>+				clock-names = "xo";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhpd: power-controller {</div><div class='add'>+				compatible = "qcom,qcs8300-rpmhpd";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				rpmhpd_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_ret: opp-0 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_min_svs: opp-1 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs: opp-2 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs: opp-3 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l1: opp-4 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom: opp-5 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l1: opp-6 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l2: opp-7 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo: opp-8 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l1: opp-9 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		epss_l3_cl0: interconnect@18590000 {</div><div class='add'>+			compatible = "qcom,qcs8300-epss-l3", "qcom,sa8775p-epss-l3",</div><div class='add'>+				     "qcom,epss-l3";</div><div class='add'>+			reg = &lt;0x0 0x18590000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpufreq_hw: cpufreq@18591000 {</div><div class='add'>+			compatible = "qcom,qcs8300-cpufreq-epss", "qcom,cpufreq-epss";</div><div class='add'>+			reg = &lt;0x0 0x18591000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x18593000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x18594000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "freq-domain0",</div><div class='add'>+				    "freq-domain1",</div><div class='add'>+				    "freq-domain2";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dcvsh-irq-0",</div><div class='add'>+					  "dcvsh-irq-1",</div><div class='add'>+					  "dcvsh-irq-2";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+</div><div class='add'>+			#freq-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		epss_l3_cl1: interconnect@18592000 {</div><div class='add'>+			compatible = "qcom,qcs8300-epss-l3", "qcom,sa8775p-epss-l3",</div><div class='add'>+				     "qcom,epss-l3";</div><div class='add'>+			reg = &lt;0x0 0x18592000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_gpdsp: remoteproc@20c00000 {</div><div class='add'>+			compatible = "qcom,qcs8300-gpdsp-pas", "qcom,sa8775p-gpdsp0-pas";</div><div class='add'>+			reg = &lt;0x0 0x20c00000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp_in 0 0&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp_in 1 0&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp_in 2 0&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_gpdsp_in 3 0&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "mxc";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gpdsp_anoc MASTER_DSP0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_CLK_CTL QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;gpdsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_gpdsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_GPDSP0</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_GPDSP0</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "gpdsp";</div><div class='add'>+				qcom,remote-pid = &lt;17&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ethernet0: ethernet@23040000 {</div><div class='add'>+			compatible = "qcom,qcs8300-ethqos", "qcom,sa8775p-ethqos";</div><div class='add'>+			reg = &lt;0x0 0x23040000 0x0 0x00010000&gt;,</div><div class='add'>+			      &lt;0x0 0x23056000 0x0 0x00000100&gt;;</div><div class='add'>+			reg-names = "stmmaceth", "rgmii";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 946 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "sfty";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_EMAC0_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_EMAC0_SLV_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_EMAC0_PTP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_EMAC0_PHY_AUX_CLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth",</div><div class='add'>+				      "pclk",</div><div class='add'>+				      "ptp_ref",</div><div class='add'>+				      "phyaux";</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_EMAC0_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;serdes0&gt;;</div><div class='add'>+			phy-names = "serdes";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x120 0xf&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			snps,tso;</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;16384&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;20480&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nspa_noc: interconnect@260c0000 {</div><div class='add'>+			compatible = "qcom,qcs8300-nspa-noc";</div><div class='add'>+			reg = &lt;0x0 0x260c0000 0x0 0x16080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_cdsp: remoteproc@26300000 {</div><div class='add'>+			compatible = "qcom,qcs8300-cdsp-pas", "qcom,sa8775p-cdsp0-pas";</div><div class='add'>+			reg = &lt;0x0 0x26300000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_NSP0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "nsp";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;nspa_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;cdsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_cdsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "cdsp";</div><div class='add'>+				qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "cdsp";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x19c1 0x0440&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1961 0x0400&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x19c2 0x0440&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1962 0x0400&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x19c3 0x0440&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1963 0x0400&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x19c4 0x0440&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1964 0x0400&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi<br/>index f6960e2d466a..e6ac529e6b72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi</a></div><div class='hunk'>@@ -367,7 +367,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ufs_mem_hc {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs8550.dtsi b/arch/arm64/boot/dts/qcom/qcs8550.dtsi<br/>index 07b314834d88..f0acdd0b1e93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8550.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qcs8550.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs8550.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs8550.dtsi</a></div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mpss_dsm_mem: mpss_dsm_region@d4d00000 {</div><div class='add'>+		mpss_dsm_mem: mpss-dsm-region@d4d00000 {</div><div class='ctx'> 			reg = &lt;0x0 0xd4d00000 0x0 0x3300000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts<br/>new file mode 100644<br/>index 000000000000..7fc2de0d3d5e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "lemans.dtsi"</div><div class='add'>+#include "lemans-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+#include "lemans-ride-common.dtsi"</div><div class='add'>+#include "lemans-ride-ethernet-aqr115c.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. Lemans Ride Rev3";</div><div class='add'>+	compatible = "qcom,qcs9100-ride-r3", "qcom,qcs9100", "qcom,sa8775p";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts<br/>new file mode 100644<br/>index 000000000000..b0c5fdde56ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qcs9100-ride.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qcs9100-ride.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "lemans.dtsi"</div><div class='add'>+#include "lemans-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+#include "lemans-ride-common.dtsi"</div><div class='add'>+#include "lemans-ride-ethernet-88ea1512.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. Lemans Ride";</div><div class='add'>+	compatible = "qcom,qcs9100-ride", "qcom,qcs9100", "qcom,sa8775p";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts<br/>index e65305f8136c..d125fc77ae14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qdu1000-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qdu1000-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qdu1000-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qdu1000-idp.dts</a></div><div class='hunk'>@@ -22,20 +22,6 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	clocks {</div><div class='del'>-		xo_board: xo-board-clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;19200000&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sleep_clk: sleep-clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	ppvar_sys: ppvar-sys-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvar_sys";</div><div class='hunk'>@@ -239,6 +225,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qup_i2c1_data_clk {</div><div class='ctx'> 	drive-strength = &lt;2&gt;;</div><div class='ctx'> 	bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi<br/>index 642ca8f0236b..846e5e5899aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qdu1000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qdu1000.dtsi</a></div><div class='hunk'>@@ -21,26 +21,40 @@</div><div class='ctx'> </div><div class='ctx'> 	chosen: chosen { };</div><div class='ctx'> </div><div class='add'>+	clocks {</div><div class='add'>+		xo_board: xo-board-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;19200000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			qcom,freq-domains = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -48,76 +62,76 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			qcom,freq-domains = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			qcom,freq-domains = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			qcom,freq-domains = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -126,7 +140,7 @@</div><div class='ctx'> 	idle-states {</div><div class='ctx'> 		entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-		CPU_OFF: cpu-sleep-0 {</div><div class='add'>+		cpu_off: cpu-sleep-0 {</div><div class='ctx'> 			compatible = "arm,idle-state";</div><div class='ctx'> 			entry-latency-us = &lt;274&gt;;</div><div class='ctx'> 			exit-latency-us = &lt;480&gt;;</div><div class='hunk'>@@ -137,7 +151,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	domain-idle-states {</div><div class='del'>-		CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+		cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 			compatible = "domain-idle-state";</div><div class='ctx'> 			entry-latency-us = &lt;584&gt;;</div><div class='ctx'> 			exit-latency-us = &lt;2332&gt;;</div><div class='hunk'>@@ -145,7 +159,7 @@</div><div class='ctx'> 			arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+		cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 			compatible = "domain-idle-state";</div><div class='ctx'> 			entry-latency-us = &lt;2893&gt;;</div><div class='ctx'> 			exit-latency-us = &lt;4023&gt;;</div><div class='hunk'>@@ -187,33 +201,33 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0 &amp;CLUSTER_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0 &amp;cluster_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -921,7 +935,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0x088e3000 0x0 0x120&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			clocks =&lt;&amp;gcc GCC_USB2_CLKREF_EN&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB2_CLKREF_EN&gt;;</div><div class='ctx'> 			clock-names = "ref";</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='hunk'>@@ -1008,7 +1022,10 @@</div><div class='ctx'> </div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0xc0 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='ctx'> 				       &lt;&amp;usb_1_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy",</div><div class='hunk'>@@ -1412,6 +1429,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17200000 {</div><div class='hunk'>@@ -1498,7 +1516,7 @@</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS    2&gt;, &lt;SLEEP_TCS     3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS      3&gt;, &lt;CONTROL_TCS   0&gt;;</div><div class='ctx'> 			label = "apps_rsc";</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts<br/>index e19790464a11..67ba508e92ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qrb2210-rb1.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include "qcm2290.dtsi"</div><div class='ctx'> #include "pm4125.dtsi"</div><div class='hunk'>@@ -15,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart4;</div><div class='add'>+		serial1 = &amp;uart3;</div><div class='ctx'> 		sdhc1 = &amp;sdhc_1;</div><div class='ctx'> 		sdhc2 = &amp;sdhc_2;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -24,7 +26,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='del'>-		clk40M: can-clk {</div><div class='add'>+		clk40m: can-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;40000000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -62,8 +64,8 @@</div><div class='ctx'> 	i2c2_gpio: i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> </div><div class='del'>-		sda-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		scl-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;tlmm 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;tlmm 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -188,23 +190,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU_PD0 {</div><div class='add'>+&amp;cpu_pd0 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU_PD1 {</div><div class='add'>+&amp;cpu_pd1 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU_PD2 {</div><div class='add'>+&amp;cpu_pd2 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU_PD3 {</div><div class='add'>+&amp;cpu_pd3 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/delete-node/ &amp;CLUSTER_PD;</div><div class='add'>+/delete-node/ &amp;cluster_pd;</div><div class='ctx'> </div><div class='ctx'> &amp;gpi_dma0 {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -541,7 +543,7 @@</div><div class='ctx'> 		compatible = "microchip,mcp2518fd";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 39 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk40M&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk40m&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;vdc_5v&gt;;</div><div class='ctx'> 		xceiver-supply = &lt;&amp;vdc_5v&gt;;</div><div class='hunk'>@@ -549,6 +551,66 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='add'>+	uart3_default: uart3-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio8";</div><div class='add'>+			function = "qup3";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio9";</div><div class='add'>+			function = "qup3";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio10";</div><div class='add'>+			function = "qup3";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio11";</div><div class='add'>+			function = "qup3";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3_sleep: uart3-sleep-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio8";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio9";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio10";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio11";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	lt9611_rst_pin: lt9611-rst-state {</div><div class='ctx'> 		pins = "gpio41";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -584,6 +646,28 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart3 {</div><div class='add'>+	/delete-property/ interrupts;</div><div class='add'>+	interrupts-extended = &lt;&amp;intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			      &lt;&amp;tlmm 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart3_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;uart3_sleep&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn3950-bt";</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;pm4125_l15&gt;;</div><div class='add'>+		vddxo-supply = &lt;&amp;pm4125_l13&gt;;</div><div class='add'>+		vddrf-supply = &lt;&amp;pm4125_l10&gt;;</div><div class='add'>+		vddch0-supply = &lt;&amp;pm4125_l22&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 87 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* UART connected to the Micro-USB port via a FTDI chip */</div><div class='ctx'> &amp;uart4 {</div><div class='ctx'> 	compatible = "qcom,geni-debug-uart";</div><div class='hunk'>@@ -615,12 +699,16 @@</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pm4125_ss_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;venus {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wifi {</div><div class='ctx'> 	vdd-0.8-cx-mx-supply = &lt;&amp;pm4125_l7&gt;;</div><div class='ctx'> 	vdd-1.8-xo-supply = &lt;&amp;pm4125_l13&gt;;</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;pm4125_l10&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;pm4125_l22&gt;;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Thundercomm_RB1";</div><div class='add'>+	qcom,calibration-variant = "Thundercomm_RB1";</div><div class='ctx'> 	firmware-name = "qcm2290";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts<br/>index 1888d99d398b..bdf2d66e40c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qrb4210-rb2.dts</a></div><div class='hunk'>@@ -5,7 +5,10 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "sm4250.dtsi"</div><div class='ctx'> #include "pm6125.dtsi"</div><div class='hunk'>@@ -25,7 +28,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clocks {</div><div class='del'>-		clk40M: can-clk {</div><div class='add'>+		clk40m: can-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;40000000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='hunk'>@@ -63,8 +66,8 @@</div><div class='ctx'> 	i2c2_gpio: i2c {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> </div><div class='del'>-		sda-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		scl-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		sda-gpios = &lt;&amp;tlmm 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;tlmm 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -103,6 +106,53 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,qrb4210-rb2-sndcard";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lpi_i2s2_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		model = "Qualcomm-RB2-WSA8815-Speakers-DMIC0";</div><div class='add'>+</div><div class='add'>+		mm1-dai-link {</div><div class='add'>+			link-name = "MultiMedia1";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mm2-dai-link {</div><div class='add'>+			link-name = "MultiMedia2";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mm3-dai-link {</div><div class='add'>+			link-name = "MultiMedia3";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdmi-dai-link {</div><div class='add'>+			link-name = "HDMI Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6afedai SECONDARY_MI2S_RX&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lt9611_codec 0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VREG_HDMI_OUT_1P2";</div><div class='hunk'>@@ -318,6 +368,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* SECONDARY I2S uses 1 I2S SD Line for audio on LT9611UXC HDMI Bridge */</div><div class='add'>+&amp;q6afedai {</div><div class='add'>+	dai@20 {</div><div class='add'>+		reg = &lt;SECONDARY_MI2S_RX&gt;;</div><div class='add'>+		qcom,sd-lines = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -537,7 +595,7 @@</div><div class='ctx'> 		compatible = "microchip,mcp2518fd";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 39 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk40M&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk40m&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;vdc_5v&gt;;</div><div class='ctx'> 		xceiver-supply = &lt;&amp;vdc_5v&gt;;</div><div class='hunk'>@@ -545,7 +603,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='hunk'>@@ -690,7 +748,7 @@</div><div class='ctx'> 	vdd-1.8-xo-supply = &lt;&amp;vreg_l16a_1p3&gt;;</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;vreg_l17a_1p3&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;vreg_l23a_3p3&gt;;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Thundercomm_RB2";</div><div class='add'>+	qcom,calibration-variant = "Thundercomm_RB2";</div><div class='ctx'> 	firmware-name = "qrb4210";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso<br/>index edc0e42ee017..771baf7e09e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dtso</a></div><div class='hunk'>@@ -4,12 +4,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='add'>+/plugin/;</div><div class='ctx'> </div><div class='del'>-#include "qrb5165-rb5.dts"</div><div class='del'>-</div><div class='del'>-&amp;camcc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,camcc-sm8250.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;camss {</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l5a_0p88&gt;;</div><div class='hunk'>@@ -33,6 +31,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cci1_i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 	camera@1a {</div><div class='ctx'> 		compatible = "sony,imx577";</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='hunk'>@@ -52,7 +53,6 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			imx577_ep: endpoint {</div><div class='del'>-				clock-lanes = &lt;1&gt;;</div><div class='ctx'> 				link-frequencies = /bits/ 64 &lt;600000000&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2 3 4&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;csiphy2_ep&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts<br/>index ccff6cd73fdf..d99448a0732d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qrb5165-rb5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qrb5165-rb5.dts</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Fixed crystal oscillator dedicated to MCP2518FD */</div><div class='del'>-	clk40M: can-clock {</div><div class='add'>+	clk40m: can-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;40000000&gt;;</div><div class='hunk'>@@ -725,15 +725,11 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> 	qcom,master-dsi;</div><div class='ctx'> #endif</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='hunk'>@@ -964,6 +960,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1003,15 +1004,21 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@3 {</div><div class='add'>+		direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='add'>+		is-compress-dai;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1027,6 +1034,12 @@</div><div class='ctx'> 	no-mmc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;slpi {</div><div class='add'>+	firmware-name = "qcom/sm8250/Thundercomm/RB5/slpi.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "qcom,qrb5165-rb5-sndcard";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;tert_mi2s_active&gt;;</div><div class='hunk'>@@ -1036,10 +1049,7 @@</div><div class='ctx'> 		"SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='ctx'> 		"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='ctx'> 		"VA DMIC0", "vdd-micb",</div><div class='del'>-		"VA DMIC1", "vdd-micb",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL2",  "MultiMedia2 Playback",</div><div class='del'>-		"MultiMedia3 Capture", "MM_UL3";</div><div class='add'>+		"VA DMIC1", "vdd-micb";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='hunk'>@@ -1062,6 +1072,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mm4-dai-link {</div><div class='add'>+		link-name = "MultiMedia4";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hdmi-dai-link {</div><div class='ctx'> 		link-name = "HDMI Playback";</div><div class='ctx'> 		cpu {</div><div class='hunk'>@@ -1118,7 +1136,7 @@</div><div class='ctx'> 	can@0 {</div><div class='ctx'> 		compatible = "microchip,mcp2518fd";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk40M&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk40m&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 15 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;vdc_5v&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/qru1000-idp.dts b/arch/arm64/boot/dts/qcom/qru1000-idp.dts<br/>index 1c781d9e24cf..439f5c327dc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qru1000-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/qru1000-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/qru1000-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/qru1000-idp.dts</a></div><div class='hunk'>@@ -22,20 +22,6 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	clocks {</div><div class='del'>-		xo_board: xo-board-clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;19200000&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sleep_clk: sleep-clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	ppvar_sys: ppvar-sys-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvar_sys";</div><div class='hunk'>@@ -239,6 +225,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qup_i2c1_data_clk {</div><div class='ctx'> 	drive-strength = &lt;2&gt;;</div><div class='ctx'> 	bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts<br/>index 9e9c7f81096b..388d5ecee949 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8155p-adp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sa8155p-adp.dts</a></div><div class='hunk'>@@ -326,7 +326,6 @@</div><div class='ctx'> </div><div class='ctx'> 	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='del'>-	max-speed = &lt;1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='ctx'> 		compatible = "snps,dwmac-mdio";</div><div class='hunk'>@@ -383,12 +382,12 @@</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sa8155p/adsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sa8155p/adsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_cdsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sa8155p/cdsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sa8155p/cdsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhc_2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts<br/>index 2fd1dafe63ce..64e59299672c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8295p-adp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8295p-adp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8295p-adp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sa8295p-adp.dts</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			dp2_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss1_dp0_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss1_dp0_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			dp3_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss1_dp1_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss1_dp1_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -63,7 +63,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			edp0_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss0_dp2_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp2_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			edp1_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss0_dp3_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp3_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			edp2_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss1_dp2_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss1_dp2_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			edp3_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mdss1_dp3_phy_out&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss1_dp3_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -361,18 +361,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp2 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss0_dp2_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp0_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss0_dp2_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;edp0_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp2_phy {</div><div class='hunk'>@@ -383,18 +377,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp3 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss0_dp3_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp1_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss0_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;edp1_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp3_phy {</div><div class='hunk'>@@ -409,18 +397,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp0 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss1_dp0_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dp2_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss1_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dp2_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp0_phy {</div><div class='hunk'>@@ -431,18 +413,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp1 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss1_dp1_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dp3_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss1_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;dp3_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp1_phy {</div><div class='hunk'>@@ -453,18 +429,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp2 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss1_dp2_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp2_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss1_dp2_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;edp2_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp2_phy {</div><div class='hunk'>@@ -475,18 +445,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp3 {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss1_dp3_phy_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp3_connector_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss1_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;edp3_connector_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss1_dp3_phy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts<br/>index 177b9dad6ff7..44177e9b64b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8540p-ride.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8540p-ride.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8540p-ride.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sa8540p-ride.dts</a></div><div class='hunk'>@@ -155,7 +155,6 @@</div><div class='ctx'> 	snps,mtl-rx-config = &lt;&amp;ethernet0_mtl_rx_setup&gt;;</div><div class='ctx'> 	snps,mtl-tx-config = &lt;&amp;ethernet0_mtl_tx_setup&gt;;</div><div class='ctx'> </div><div class='del'>-	max-speed = &lt;1000&gt;;</div><div class='ctx'> 	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-txid";</div><div class='ctx'> </div><div class='hunk'>@@ -225,7 +224,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet0_mtl_tx_setup: tx-queues-config {</div><div class='ctx'> 		snps,tx-queues-to-use = &lt;1&gt;;</div><div class='del'>-		snps,tx-sched-sp;</div><div class='ctx'> </div><div class='ctx'> 		queue0 {</div><div class='ctx'> 			snps,dcb-algorithm;</div><div class='hunk'>@@ -257,7 +255,6 @@</div><div class='ctx'> 	snps,mtl-rx-config = &lt;&amp;ethernet1_mtl_rx_setup&gt;;</div><div class='ctx'> 	snps,mtl-tx-config = &lt;&amp;ethernet1_mtl_tx_setup&gt;;</div><div class='ctx'> </div><div class='del'>-	max-speed = &lt;1000&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-txid";</div><div class='ctx'> </div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -302,7 +299,6 @@</div><div class='ctx'> </div><div class='ctx'> 	ethernet1_mtl_tx_setup: tx-queues-config {</div><div class='ctx'> 		snps,tx-queues-to-use = &lt;1&gt;;</div><div class='del'>-		snps,tx-sched-sp;</div><div class='ctx'> </div><div class='ctx'> 		queue0 {</div><div class='ctx'> 			snps,dcb-algorithm;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts<br/>index ae065ae92478..b25f0b2c9410 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sa8775p-ride-r3.dts</a></div><div class='hunk'>@@ -5,43 +5,13 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "sa8775p-ride.dtsi"</div><div class='add'>+#include "lemans-auto.dtsi"</div><div class='add'>+</div><div class='add'>+#include "lemans-pmics.dtsi"</div><div class='add'>+#include "lemans-ride-common.dtsi"</div><div class='add'>+#include "lemans-ride-ethernet-aqr115c.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm SA8775P Ride Rev3";</div><div class='ctx'> 	compatible = "qcom,sa8775p-ride-r3", "qcom,sa8775p";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;ethernet0 {</div><div class='del'>-	phy-mode = "2500base-x";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ethernet1 {</div><div class='del'>-	phy-mode = "2500base-x";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdio {</div><div class='del'>-	compatible = "snps,dwmac-mdio";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	sgmii_phy0: phy@8 {</div><div class='del'>-		compatible = "ethernet-phy-id31c3.1c33";</div><div class='del'>-		reg = &lt;0x8&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		reset-assert-us = &lt;11000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;70000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sgmii_phy1: phy@0 {</div><div class='del'>-		compatible = "ethernet-phy-id31c3.1c33";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		reset-assert-us = &lt;11000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;70000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts<br/>index 2e87fd760dbd..2d9028cd60be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-ride.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sa8775p-ride.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sa8775p-ride.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sa8775p-ride.dts</a></div><div class='hunk'>@@ -5,43 +5,13 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "sa8775p-ride.dtsi"</div><div class='add'>+#include "lemans-auto.dtsi"</div><div class='add'>+</div><div class='add'>+#include "lemans-pmics.dtsi"</div><div class='add'>+#include "lemans-ride-common.dtsi"</div><div class='add'>+#include "lemans-ride-ethernet-88ea1512.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm SA8775P Ride";</div><div class='ctx'> 	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;ethernet0 {</div><div class='del'>-	phy-mode = "sgmii";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ethernet1 {</div><div class='del'>-	phy-mode = "sgmii";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdio {</div><div class='del'>-	compatible = "snps,dwmac-mdio";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	sgmii_phy0: phy@8 {</div><div class='del'>-		compatible = "ethernet-phy-id0141.0dd4";</div><div class='del'>-		reg = &lt;0x8&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		reset-assert-us = &lt;11000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;70000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sgmii_phy1: phy@a {</div><div class='del'>-		compatible = "ethernet-phy-id0141.0dd4";</div><div class='del'>-		reg = &lt;0xa&gt;;</div><div class='del'>-		device_type = "ethernet-phy";</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		reset-assert-us = &lt;11000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;70000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts b/arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts<br/>new file mode 100644<br/>index 000000000000..74778a5b19ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sar2130p-qar2130p.dts</a></div><div class='hunk'>@@ -0,0 +1,558 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include "sar2130p.dtsi"</div><div class='add'>+#include "pm8150.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Snapdragon AR2 Gen1 Smart Viewer Development Kit";</div><div class='add'>+	compatible = "qcom,qar2130p", "qcom,sar2130p";</div><div class='add'>+	chassis-type = "embedded";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart11;</div><div class='add'>+		serial1 = &amp;uart7;</div><div class='add'>+		i2c0 = &amp;i2c8;</div><div class='add'>+		i2c1 = &amp;i2c10;</div><div class='add'>+		mmc1 = &amp;sdhc_1;</div><div class='add'>+		spi0 = &amp;spi0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* pm3003a on I2C0, should not be controlled */</div><div class='add'>+	vreg_ext_1p3: regulator-ext-1p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_ext_1p3";</div><div class='add'>+		regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* EBI rail, used as LDO input, can not be part of PMIC config */</div><div class='add'>+	vreg_s10a_0p89: regulator-s10a-0p89 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_s10a_0p89";</div><div class='add'>+		regulator-min-microvolt = &lt;890000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;890000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		sar2130p-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8150_adc_tm 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;100000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8150_adc_tm 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;52000&gt;;</div><div class='add'>+					hysteresis = &lt;4000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8150_adc_tm 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;50000&gt;;</div><div class='add'>+					hysteresis = &lt;4000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_en_state&gt;, &lt;&amp;bt_en_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 45 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 46 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_s4a_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15a_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s4a_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_s4a_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_s4a_0p95&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_s5a_1p88&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8150-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l8-l11-supply = &lt;&amp;vreg_s4a_0p95&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l18-supply = &lt;&amp;vreg_ext_1p3&gt;;</div><div class='add'>+		vdd-l6-l9-supply = &lt;&amp;vreg_s10a_0p89&gt;;</div><div class='add'>+		vdd-l7-l12-l14-l15-supply = &lt;&amp;vreg_s5a_1p88&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4a_0p95: smps6 {</div><div class='add'>+			regulator-name = "vreg_s4a_0p95";</div><div class='add'>+			regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s5a_1p88: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5a_1p88";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1a_0p91: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1a_0p91";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2a_3p1: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2a_3p1";</div><div class='add'>+			regulator-min-microvolt = &lt;3080000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3a_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3a_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ldo4 1.26 - system ? */</div><div class='add'>+</div><div class='add'>+		vreg_l5a_1p13: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a_1p13";</div><div class='add'>+			regulator-min-microvolt = &lt;1128000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a_0p6: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6a_0p6";</div><div class='add'>+			regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;650000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a_1p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1950000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a_0p88: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8a_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ldo9 - LCX */</div><div class='add'>+</div><div class='add'>+		vreg_l10a_2p95: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10a_2p95";</div><div class='add'>+			regulator-min-microvolt = &lt;2952000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ldo11 - LMX */</div><div class='add'>+</div><div class='add'>+		vreg_l12a_1p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* no ldo13 */</div><div class='add'>+</div><div class='add'>+		vreg_l14a_1p8: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15a_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* no ldo16 - system */</div><div class='add'>+</div><div class='add'>+		vreg_l17a_3p26: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17a_3p26";</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l18a_1p2: ldo18 {</div><div class='add'>+			regulator-name = "vreg_l18a_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/sar2130p/a620_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ptn3222: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 99 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l2a_3p1&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l15a_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c10 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 55 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 57 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcieport0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l8a_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3a_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8150_adc {</div><div class='add'>+	channel@4c {</div><div class='add'>+		reg = &lt;ADC5_XO_THERM_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		label = "xo_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@4d {</div><div class='add'>+		reg = &lt;ADC5_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "skin_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@4e {</div><div class='add'>+		/* msm-5.10 uses ADC5_AMUX_THM2 / 0x0e, although there is a pullup */</div><div class='add'>+		reg = &lt;ADC5_AMUX_THM2_100K_PU&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "wifi_therm";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8150_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	xo-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pm8150_adc ADC5_XO_THERM_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	skin-therm@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pm8150_adc ADC5_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi-therm@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		/* msm-5.10 uses ADC5_AMUX_THM2, although there is a pullup */</div><div class='add'>+		io-channels = &lt;&amp;pm8150_adc ADC5_AMUX_THM2_100K_PU&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sar2130p/adsp.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l10a_2p95&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l7a_1p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_en_state: bt-enable-state {</div><div class='add'>+		pins = "gpio46";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_default_state: pcie0-default-state {</div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio55";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio56";</div><div class='add'>+			function = "pcie0_clkreqn";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pins = "gpio57";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_default_state: pcie1-default-state {</div><div class='add'>+		perst-pins {</div><div class='add'>+			pins = "gpio58";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pins = "gpio59";</div><div class='add'>+			function = "pcie1_clkreqn";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pins = "gpio60";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en_state: wlan-enable-state {</div><div class='add'>+		pins = "gpio45";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l8a_0p88&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3a_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;ptn3222&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_dp_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3a_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1a_0p91&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/qcom/sar2130p.dtsi<br/>new file mode 100644<br/>index 000000000000..d65ad0df6865<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sar2130p.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sar2130p.dtsi</a></div><div class='hunk'>@@ -0,0 +1,3587 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sar2130p-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sar2130p-gpucc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sm8550-dispcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sm8550-tcsr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,sar2130p-rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-qcom-qmp.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	chosen { };</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		xo_board: xo-board {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+</div><div class='add'>+				l3_0: l3-cache {</div><div class='add'>+					compatible = "cache";</div><div class='add'>+					cache-level = &lt;3&gt;;</div><div class='add'>+					cache-unified;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_100: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_200: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_300: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cpu_sleep_0: cpu-sleep-0-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "silver-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+				entry-latency-us = &lt;549&gt;;</div><div class='add'>+				exit-latency-us = &lt;901&gt;;</div><div class='add'>+				min-residency-us = &lt;1774&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu_sleep_1: cpu-sleep-0-1 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "silver-rail-power-collapse";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='add'>+				entry-latency-us = &lt;702&gt;;</div><div class='add'>+				exit-latency-us = &lt;915&gt;;</div><div class='add'>+				min-residency-us = &lt;4001&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		domain-idle-states {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='add'>+				entry-latency-us = &lt;2752&gt;;</div><div class='add'>+				exit-latency-us = &lt;3048&gt;;</div><div class='add'>+				min-residency-us = &lt;6118&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x41002344&gt;;</div><div class='add'>+				entry-latency-us = &lt;3263&gt;;</div><div class='add'>+				exit-latency-us = &lt;4562&gt;;</div><div class='add'>+				min-residency-us = &lt;8467&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster_sleep_2: cluster-sleep-2 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='add'>+				entry-latency-us = &lt;3638&gt;;</div><div class='add'>+				exit-latency-us = &lt;6562&gt;;</div><div class='add'>+				min-residency-us = &lt;9862&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm: scm {</div><div class='add'>+			compatible = "qcom,scm-sar2130p", "qcom,scm";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr_mutex 0x13000&gt;;</div><div class='add'>+			interconnects = &lt;&amp;system_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_virt: interconnect-0 {</div><div class='add'>+		compatible = "qcom,sar2130p-clk-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc_virt: interconnect-1 {</div><div class='add'>+		compatible = "qcom,sar2130p-mc-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the size */</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;, &lt;&amp;cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;, &lt;&amp;cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;, &lt;&amp;cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_sleep_0&gt;, &lt;&amp;cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;, &lt;&amp;cluster_sleep_1&gt;, &lt;&amp;cluster_sleep_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		hyp_mem: hyp@80000000 {</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xbl_dt_log_mem: xbl-dt-log@80600000 {</div><div class='add'>+			reg = &lt;0x0 0x80600000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xbl_ramdump_mem: xbl-ramdump@80640000 {</div><div class='add'>+			reg = &lt;0x0 0x80640000 0x0 0x1c0000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_image_mem: aop-image@80800000 {</div><div class='add'>+			reg = &lt;0x0 0x80800000 0x0 0x60000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_cmd_db_mem: aop-cmd-db@80860000 {</div><div class='add'>+			compatible = "qcom,cmd-db";</div><div class='add'>+			reg = &lt;0x0 0x80860000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_config_mem: aop-config@80880000 {</div><div class='add'>+			reg = &lt;0x0 0x80880000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tme_crash_dump_mem: tme-crash-dump@808a0000 {</div><div class='add'>+			reg = &lt;0x0 0x808a0000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tme_log_mem: tme-log@808e0000 {</div><div class='add'>+			reg = &lt;0x0 0x808e0000 0x0 0x4000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uefi_log_mem: uefi-log@808e4000 {</div><div class='add'>+			reg = &lt;0x0 0x808e4000 0x0 0x10000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secdata_apss_mem: secdata-apss@808ff000 {</div><div class='add'>+			reg = &lt;0x0 0x808ff000 0x0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem: smem@80900000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x80900000 0x0 0x200000&gt;;</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpucp_fw_mem: cpucp-fw@80b00000 {</div><div class='add'>+			reg = &lt;0x0 0x80b00000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		helios_ram_dump_mem: helios-ram-dump@80c00000 {</div><div class='add'>+			reg = &lt;0x0 0x80c00000 0x0 0xe00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera_mem: camera@84e00000 {</div><div class='add'>+			reg = &lt;0x0 0x84e00000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_mem: video@86f00000 {</div><div class='add'>+			reg = &lt;0x0 0x86f00000 0x0 0x500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: adsp@87600000 {</div><div class='add'>+			reg = &lt;0x0 0x87600000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_mem: cdsp@89400000 {</div><div class='add'>+			reg = &lt;0x0 0x89400000 0x0 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_fw_mem: ipa-fw@8a300000 {</div><div class='add'>+			reg = &lt;0x0 0x8a300000 0x0 0x10000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_gsi_mem: ipa-gsi@8a3a0000 {</div><div class='add'>+			reg = &lt;0x0 0x8a310000 0x0 0xa000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_micro_code_mem: gpu-micro-code@8a31a000 {</div><div class='add'>+			reg = &lt;0x0 0x8a31a000 0x0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cvp_mem: cvp@8a400000 {</div><div class='add'>+			reg = &lt;0x0 0x8a400000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xbl_sc_mem: xbl-sc@a6e00000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xa6e00000 0x0 0x40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		global_sync_mem: global-sync@a6f00000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xa6f00000 0x0 0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tz_stat_mem: tz-stat@e8800000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xe8800000 0x0 0x100000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tags_mem: tags@e8900000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xe8900000 0x0 0x500000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qtee_mem: qtee@e8e00000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xe8e00000 0x0 0x500000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trusted_apps_mem: trusted-apps@e9300000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xe9300000 0x0 0xc00000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-adsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;443&gt;, &lt;429&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-cdsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;94&gt;, &lt;432&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+		dma-ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@100000 {</div><div class='add'>+			compatible = "qcom,sar2130p-gcc";</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0x1f4200&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_1: mmc@7c4000 {</div><div class='add'>+			compatible = "qcom,sar2130p-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0x0 0x007c4000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x007c5000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "hc", "cqhci";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x160 0x0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+			interconnects = &lt;&amp;system_noc MASTER_SDCC_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr","cpu-sdhc";</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc1_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdc1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;sdc1_sleep&gt;;</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			non-removable;</div><div class='add'>+			supports-cqe;</div><div class='add'>+</div><div class='add'>+			mmc-ddr-1_8v;</div><div class='add'>+			mmc-hs200-1_8v;</div><div class='add'>+			mmc-hs400-1_8v;</div><div class='add'>+			mmc-hs400-enhanced-strobe;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc1_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 200000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;104000 0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-384000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;384000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2500000 1000000&gt;;</div><div class='add'>+					opp-avg-kBps = &lt;400000 0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma0: dma-controller@900000 {</div><div class='add'>+			compatible = "qcom,sar2130p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00900000 0x0 0x60000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0x7e&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x76 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_0: geniqup@9c0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x009c0000 0x0 0x2000&gt;;</div><div class='add'>+			clock-names = "m-ahb", "s-ahb";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_0_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_0_S_AHB_CLK&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x63 0x0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "qup-core";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@980000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00980000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c0_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0: spi@980000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00980000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi0_data_clk&gt;, &lt;&amp;qup_spi0_cs0&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@984000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00984000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c1_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@984000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00984000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi1_data_clk&gt;, &lt;&amp;qup_spi1_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@988000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00988000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@988000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00988000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi2_data_clk&gt;, &lt;&amp;qup_spi2_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@98c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x0098c000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c3_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@98c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x0098c000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi3_data_clk&gt;, &lt;&amp;qup_spi3_cs0&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@990000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00990000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c4_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@990000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00990000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi4_data_clk&gt;, &lt;&amp;qup_spi4_cs0&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@994000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00994000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c5_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@994000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00994000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi5_data_clk&gt;, &lt;&amp;qup_spi5_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma1: dma-controller@a00000 {</div><div class='add'>+			compatible = "qcom,sar2130p-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00a00000 0x0 0x60000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0x7e&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x16 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_1: geniqup@ac0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x00ac0000 0x0 0x6000&gt;;</div><div class='add'>+			clock-names = "m-ahb", "s-ahb";</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_1_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_1_S_AHB_CLK&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x3 0x0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "qup-core";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@a80000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a80000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c6_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@a80000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a80000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi6_data_clk&gt;, &lt;&amp;qup_spi6_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@a84000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c7_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi7: spi@a84000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi7_data_clk&gt;, &lt;&amp;qup_spi7_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@a84000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart7_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@a88000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a88000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c8_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi8: spi@a88000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a88000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi8_data_clk&gt;, &lt;&amp;qup_spi8_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c9: i2c@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a8c000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c9_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi9: spi@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a8c000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi9_data_clk&gt;, &lt;&amp;qup_spi9_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@a90000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a90000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c10_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi10: spi@a90000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a90000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi10_data_clk&gt;, &lt;&amp;qup_spi10_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c11: i2c@a94000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a94000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c11_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi11: spi@a94000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a94000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi11_data_clk&gt;, &lt;&amp;qup_spi11_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_A2NOC_SNOC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;system_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart11: serial@a94000 {</div><div class='add'>+				compatible = "qcom,geni-debug-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a94000 0x0 0x4000&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart11_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		config_noc: interconnect@1500000 {</div><div class='add'>+			compatible = "qcom,sar2130p-config-noc";</div><div class='add'>+			reg = &lt;0x0 0x01500000 0x0 0x10&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_noc: interconnect@1680000 {</div><div class='add'>+			compatible = "qcom,sar2130p-system-noc";</div><div class='add'>+			reg = &lt;0x0 0x01680000 0x0 0x29080&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_noc: interconnect@16c0000 {</div><div class='add'>+			compatible = "qcom,sar2130p-pcie-anoc";</div><div class='add'>+			reg = &lt;0x0 0x016c0000 0x0 0xa080&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmss_noc: interconnect@1740000 {</div><div class='add'>+			compatible = "qcom,sar2130p-mmss-noc";</div><div class='add'>+			reg = &lt;0x0 0x01740000 0x0 0x1f100&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@1c00000 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			compatible = "qcom,sar2130p-pcie", "qcom,pcie-sm8550";</div><div class='add'>+			reg = &lt;0x0 0x01c00000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x60000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x60000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x60001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x60100000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x01c0c000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "noc_aggr";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0x0   &amp;apps_smmu 0x1c00 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;apps_smmu 0x1c01 0x1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='add'>+			reset-names = "pci";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcieport0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@1c06000 {</div><div class='add'>+			compatible = "qcom,sar2130p-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x01c06000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_0_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "ref", "rchng",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_0_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pcie0_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@1c08000 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			compatible = "qcom,sar2130p-pcie", "qcom,pcie-sm8550";</div><div class='add'>+			reg = &lt;0x0 0x01c08000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40100000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x01c0b000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QMIP_PCIE_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "noc_aggr",</div><div class='add'>+				      "cnoc_sf_axi",</div><div class='add'>+				      "qmip_pcie_ahb";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0x0   &amp;apps_smmu 0x1e00 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;apps_smmu 0x1e01 0x1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_1_BCR&gt;,</div><div class='add'>+				&lt;&amp;gcc GCC_PCIE_1_LINK_DOWN_BCR&gt;;</div><div class='add'>+			reset-names = "pci", "link_down";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_ep: pcie-ep@1c08000 {</div><div class='add'>+			compatible = "qcom,sar2130p-pcie-ep";</div><div class='add'>+			reg = &lt;0x0 0x01c08000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40200000 0x0 0x1000000&gt;,</div><div class='add'>+			      &lt;0x0 0x01c0b000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40002000 0x0 0x2000&gt;;</div><div class='add'>+			reg-names = "parf",</div><div class='add'>+				    "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "addr_space",</div><div class='add'>+				    "mmio",</div><div class='add'>+				    "dma";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QMIP_PCIE_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "aggre_noc_axi",</div><div class='add'>+				      "cnoc_sf_axi",</div><div class='add'>+				      "qmip_pcie_ahb";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "global",</div><div class='add'>+					  "doorbell",</div><div class='add'>+					  "dma";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem",</div><div class='add'>+					     "cpu-pcie";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1e00 0x1&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_1_BCR&gt;;</div><div class='add'>+			reset-names = "core";</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_phy: phy@1c0e000 {</div><div class='add'>+			compatible = "qcom,sar2130p-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x01c0e000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_1_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_PHY_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "cfg_ahb", "ref", "rchng",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_1_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_PHY_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_1_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pcie1_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1f40000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0x0 0x01f40000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr: clock-controller@1fc0000 {</div><div class='add'>+			compatible = "qcom,sar2130p-tcsr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x01fc0000 0x0 0x30000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_adsp: remoteproc@3000000 {</div><div class='add'>+			compatible = "qcom,sar2130p-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x03000000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+					  "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1806 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@3d00000 {</div><div class='add'>+			compatible = "qcom,adreno-621.0", "qcom,adreno";</div><div class='add'>+			reg = &lt;0x0 0x03d00000 0x0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d9e000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d61000 0x0 0x800&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory",</div><div class='add'>+				    "cx_mem",</div><div class='add'>+				    "cx_dbgc";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 0 0x401&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='add'>+</div><div class='add'>+			nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='add'>+			nvmem-cell-names = "speed_bin";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gpu_zap_shader: zap-shader {</div><div class='add'>+				memory-region = &lt;&amp;gpu_micro_code_mem&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-843000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;843000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-780000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;780000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-644000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;644000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-570000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;570000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-450000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;450000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-320000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;320000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-235000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;235000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmu: gmu@3d6a000 {</div><div class='add'>+			compatible = "qcom,adreno-gmu-621.0", "qcom,adreno-gmu";</div><div class='add'>+			reg = &lt;0x0 0x03d6a000 0x0 0x35000&gt;,</div><div class='add'>+			      &lt;0x0 0x03de0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0b290000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hfi", "gmu";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;;</div><div class='add'>+			clock-names = "ahb",</div><div class='add'>+				      "gmu",</div><div class='add'>+				      "cxo",</div><div class='add'>+				      "axi",</div><div class='add'>+				      "memnoc",</div><div class='add'>+				      "hub";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gpucc GPU_GX_GDSC&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "gx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 5 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			gmu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-220000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;220000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-550000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpucc: clock-controller@3d90000 {</div><div class='add'>+			compatible = "qcom,sar2130p-gpucc";</div><div class='add'>+			reg = &lt;0x0 0x03d90000 0x0 0xa000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adreno_smmu: iommu@3da0000 {</div><div class='add'>+			compatible = "qcom,sar2130p-smmu-500", "qcom,adreno-smmu",</div><div class='add'>+				     "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x03da0000 0x0 0x10000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "hlos",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "ahb";</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1_hsphy: phy@88e3000 {</div><div class='add'>+			compatible = "qcom,sar2130p-snps-eusb2-phy",</div><div class='add'>+				     "qcom,sm8550-snps-eusb2-phy";</div><div class='add'>+			reg = &lt;0x0 0x088e3000 0x0 0x154&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tcsr TCSR_USB2_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_dp_qmpphy: phy@88e8000 {</div><div class='add'>+			compatible = "qcom,sar2130p-qmp-usb3-dp-phy";</div><div class='add'>+			reg = &lt;0x0 0x088e8000 0x0 0x3000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "ref", "com_aux", "usb3_pipe";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB3_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_DP_PHY_PRIM_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			orientation-switch;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_out: endpoint {</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_usb_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_dp_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mdss_dp0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1: usb@a6f8800 {</div><div class='add'>+			compatible = "qcom,sar2130p-dwc3", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a6f8800 0x0 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_USB3_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_PRIM_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;system_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr", "apps-usb";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb_1_dwc3: usb@a600000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x0a600000 0x0 0xcd00&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				iommus = &lt;&amp;apps_smmu 0x20 0x0&gt;;</div><div class='add'>+				phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='add'>+				       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='add'>+				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+				snps,is-utmi-l1-suspend;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,parkmode-disable-ss-quirk;</div><div class='add'>+</div><div class='add'>+				tx-fifo-resize;</div><div class='add'>+				dma-coherent;</div><div class='add'>+				usb-role-switch;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						usb_1_dwc3_hs: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						usb_1_dwc3_ss: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdss: display-subsystem@ae00000 {</div><div class='add'>+			compatible = "qcom,sar2130p-mdss";</div><div class='add'>+			reg = &lt;0x0 0x0ae00000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "mdp0-mem", "cpu-cfg";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x2000 0x402&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdss_mdp: display-controller@ae01000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dpu";</div><div class='add'>+				reg = &lt;0x0 0x0ae01000 0x0 0x8f000&gt;,</div><div class='add'>+				      &lt;0x0 0x0aeb0000 0x0 0x3000&gt;;</div><div class='add'>+				reg-names = "mdp",</div><div class='add'>+					    "vbif";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+				clock-names = "bus",</div><div class='add'>+					      "nrt_bus",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "lut",</div><div class='add'>+					      "core",</div><div class='add'>+					      "vsync";</div><div class='add'>+</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+				assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf1_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dsi0_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf2_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dsi1_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+						dpu_intf0_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dp0_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdp_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-200000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-325000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-514000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;514000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dp0: displayport-controller@ae90000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dp",</div><div class='add'>+					     "qcom,sm8350-dp";</div><div class='add'>+				reg = &lt;0x0 0xae90000 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0xae90200 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0xae90400 0x0 0xc00&gt;,</div><div class='add'>+				      &lt;0x0 0xae91000 0x0 0x400&gt;,</div><div class='add'>+				      &lt;0x0 0xae91400 0x0 0x400&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;12&gt;;</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='add'>+				clock-names = "core_iface",</div><div class='add'>+					      "core_aux",</div><div class='add'>+					      "ctrl_link",</div><div class='add'>+					      "ctrl_link_iface",</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='add'>+				phy-names = "dp";</div><div class='add'>+</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dp0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dp0_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dp_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-162000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;162000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-270000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-540000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-810000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi0: dsi@ae94000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dsi-ctrl",</div><div class='add'>+					     "qcom,mdss-dsi-ctrl";</div><div class='add'>+				reg = &lt;0x0 0x0ae94000 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+				clock-names = "byte",</div><div class='add'>+					      "byte_intf",</div><div class='add'>+					      "pixel",</div><div class='add'>+					      "core",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "bus";</div><div class='add'>+</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='add'>+				phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						mdss_dsi0_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						mdss_dsi0_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdss_dsi_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					opp-187500000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-300000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					opp-358000000 {</div><div class='add'>+						opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+						required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi0_phy: phy@ae95000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dsi-phy-5nm";</div><div class='add'>+				reg = &lt;0x0 0x0ae95000 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae95200 0x0 0x280&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae95500 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_phy",</div><div class='add'>+					    "dsi_phy_lane",</div><div class='add'>+					    "dsi_pll";</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi1: dsi@ae96000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dsi-ctrl",</div><div class='add'>+					     "qcom,mdss-dsi-ctrl";</div><div class='add'>+				reg = &lt;0x0 0x0ae96000 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+				interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+				clock-names = "byte",</div><div class='add'>+					      "byte_intf",</div><div class='add'>+					      "pixel",</div><div class='add'>+					      "core",</div><div class='add'>+					      "iface",</div><div class='add'>+					      "bus";</div><div class='add'>+</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;mdss_dsi1_phy&gt;;</div><div class='add'>+				phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						mdss_dsi1_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						mdss_dsi1_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mdss_dsi1_phy: phy@ae97000 {</div><div class='add'>+				compatible = "qcom,sar2130p-dsi-phy-5nm";</div><div class='add'>+				reg = &lt;0x0 0x0ae97000 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae97200 0x0 0x280&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae97500 0x0 0x400&gt;;</div><div class='add'>+				reg-names = "dsi_phy",</div><div class='add'>+					    "dsi_phy_lane",</div><div class='add'>+					    "dsi_pll";</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+					 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dispcc: clock-controller@af00000 {</div><div class='add'>+			compatible = "qcom,sar2130p-dispcc";</div><div class='add'>+			reg = &lt;0x0 0x0af00000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='add'>+				 &lt;0&gt;, /* dp1 */</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;, /* dp2 */</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;, /* dp3 */</div><div class='add'>+				 &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdc: interrupt-controller@b220000 {</div><div class='add'>+			compatible = "qcom,sar2130p-pdc", "qcom,pdc";</div><div class='add'>+			reg = &lt;0x0 0x0b220000 0x0 0x30000&gt;, &lt;0x0 0x174000f0 0x0 0x64&gt;;</div><div class='add'>+			qcom,pdc-ranges = &lt;0 480 94&gt;,</div><div class='add'>+					  &lt;94 609 31&gt;,</div><div class='add'>+					  &lt;125 63 1&gt;,</div><div class='add'>+					  &lt;126 716 12&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss_qmp: power-management@c300000 {</div><div class='add'>+			compatible = "qcom,sar2130p-aoss-qmp", "qcom,aoss-qmp";</div><div class='add'>+			reg = &lt;0x0 0x0c300000 0x0 0x400&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;ipcc&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+						     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			mboxes = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsens0: thermal-sensor@c263000 {</div><div class='add'>+			compatible = "qcom,sar2130p-tsens", "qcom,tsens-v2";</div><div class='add'>+			reg = &lt;0x0 0x0c263000 0x0 0x1000&gt;, /* TM */</div><div class='add'>+			      &lt;0x0 0x0c222000 0x0 0x1000&gt;; /* SROT */</div><div class='add'>+			#qcom,sensors = &lt;16&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uplow", "critical";</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram@c3f0000 {</div><div class='add'>+			compatible = "qcom,rpmh-stats";</div><div class='add'>+			reg = &lt;0x0 0x0c3f0000 0x0 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		arbiter@c400000 {</div><div class='add'>+			compatible = "qcom,sar2130p-spmi-pmic-arb",</div><div class='add'>+				     "qcom,x1e80100-spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x0 0x0c400000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c500000 0x0 0x400000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c440000 0x0 0x80000&gt;;</div><div class='add'>+			reg-names = "core", "chnls", "obsrvr";</div><div class='add'>+</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			spmi_bus: spmi@c42d000 {</div><div class='add'>+				reg = &lt;0x0 0x0c42d000 0x0 0x4000&gt;,</div><div class='add'>+				      &lt;0x0 0x0c4c0000 0x0 0x10000&gt;;</div><div class='add'>+				reg-names = "cnfg", "intr";</div><div class='add'>+</div><div class='add'>+				interrupt-names = "periph_irq";</div><div class='add'>+				interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;2&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipcc: mailbox@ed18000 {</div><div class='add'>+			compatible = "qcom,sar2130p-ipcc", "qcom,ipcc";</div><div class='add'>+			reg = &lt;0x0 0x0ed18000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@f100000 {</div><div class='add'>+			compatible = "qcom,sar2130p-tlmm";</div><div class='add'>+			reg = &lt;0x0 0x0f100000 0x0 0x300000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 156&gt;;</div><div class='add'>+			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+			qup_i2c0_data_clk: qup-i2c0-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio0", "gpio1";</div><div class='add'>+				function = "qup0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c1_data_clk: qup-i2c1-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio2", "gpio3";</div><div class='add'>+				function = "qup1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c2_data_clk: qup-i2c2-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio22", "gpio23";</div><div class='add'>+				function = "qup2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c3_data_clk: qup-i2c3-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio16", "gpio17";</div><div class='add'>+				function = "qup3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c4_data_clk: qup-i2c4-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio20", "gpio21";</div><div class='add'>+				function = "qup4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c5_data_clk: qup-i2c5-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio95", "gpio96";</div><div class='add'>+				function = "qup5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c6_data_clk: qup-i2c6-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio91", "gpio92";</div><div class='add'>+				function = "qup6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c7_data_clk: qup-i2c7-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio8", "gpio9";</div><div class='add'>+				function = "qup7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c8_data_clk: qup-i2c8-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio8", "gpio9";</div><div class='add'>+				function = "qup8";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c9_data_clk: qup-i2c9-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio109", "gpio110";</div><div class='add'>+				function = "qup9";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c10_data_clk: qup-i2c10-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio4", "gpio5";</div><div class='add'>+				function = "qup10";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c11_data_clk: qup-i2c11-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio28", "gpio30";</div><div class='add'>+				function = "qup11";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_cs0: qup-spi0-cs0-state {</div><div class='add'>+				pins = "gpio3";</div><div class='add'>+				function = "qup0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_cs1: qup-spi0-cs1-state {</div><div class='add'>+				pins = "gpio93";</div><div class='add'>+				function = "qup0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_data_clk: qup-spi0-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio0", "gpio1", "gpio2";</div><div class='add'>+				function = "qup0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_cs: qup-spi1-cs-state {</div><div class='add'>+				pins = "gpio62";</div><div class='add'>+				function = "qup1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_data_clk: qup-spi1-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio2", "gpio3", "gpio61";</div><div class='add'>+				function = "qup1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs: qup-spi2-cs-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "qup2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_data_clk: qup-spi2-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio22", "gpio23", "gpio12";</div><div class='add'>+				function = "qup2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_cs0: qup-spi3-cs0-state {</div><div class='add'>+				pins = "gpio19";</div><div class='add'>+				function = "qup3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_cs1: qup-spi3-cs1-state {</div><div class='add'>+				pins = "gpio41";</div><div class='add'>+				function = "qup3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_data_clk: qup-spi3-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio16", "gpio17", "gpio18";</div><div class='add'>+				function = "qup3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs0: qup-spi4-cs0-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs1: qup-spi4-cs1-state {</div><div class='add'>+				pins = "gpio94";</div><div class='add'>+				function = "qup4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_data_clk: qup-spi4-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio20", "gpio21", "gpio22";</div><div class='add'>+				function = "qup4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_cs: qup-spi5-cs-state {</div><div class='add'>+				pins = "gpio98";</div><div class='add'>+				function = "qup5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_data_clk: qup-spi5-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio95", "gpio96", "gpio97";</div><div class='add'>+				function = "qup5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs: qup-spi6-cs-state {</div><div class='add'>+				pins = "gpio63";</div><div class='add'>+				function = "qup6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_data_clk: qup-spi6-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio91", "gpio92", "gpio64";</div><div class='add'>+				function = "qup6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_cs: qup-spi7-cs-state {</div><div class='add'>+				pins = "gpio27";</div><div class='add'>+				function = "qup7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_data_clk: qup-spi7-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio24", "gpio25", "gpio26";</div><div class='add'>+				function = "qup7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_cs: qup-spi8-cs-state {</div><div class='add'>+				pins = "gpio11";</div><div class='add'>+				function = "qup8";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_data_clk: qup-spi8-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio8", "gpio9", "gpio10";</div><div class='add'>+				function = "qup8";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_cs: qup-spi9-cs-state {</div><div class='add'>+				pins = "gpio35";</div><div class='add'>+				function = "qup9";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_data_clk: qup-spi9-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio109", "gpio110", "gpio34";</div><div class='add'>+				function = "qup9";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_cs: qup-spi10-cs-state {</div><div class='add'>+				pins = "gpio7";</div><div class='add'>+				function = "qup10";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_data_clk: qup-spi10-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio4", "gpio5", "gpio6";</div><div class='add'>+				function = "qup10";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi11_cs: qup-spi11-cs-state {</div><div class='add'>+				pins = "gpio15";</div><div class='add'>+				function = "qup11";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi11_data_clk: qup-spi11-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio28", "gpio30", "gpio14";</div><div class='add'>+				function = "qup11";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_default: qup-uart7-default-state {</div><div class='add'>+				cts-pins {</div><div class='add'>+					pins = "gpio24";</div><div class='add'>+					function = "qup7";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rts-pins {</div><div class='add'>+					pins = "gpio25";</div><div class='add'>+					function = "qup7";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio27";</div><div class='add'>+					function = "qup7";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio26";</div><div class='add'>+					function = "qup7";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart11_default: qup-uart11-default-state {</div><div class='add'>+				pins = "gpio14", "gpio15";</div><div class='add'>+				function = "qup11";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_default: sdc1-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_sleep: sdc1-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_smmu: iommu@15000000 {</div><div class='add'>+			compatible = "qcom,sar2130p-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x15000000 0x0 0x100000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@17200000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			redistributor-stride = &lt;0x0 0x20000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x17200000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x17260000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			gic_its: msi-controller@17240000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x17240000 0x0 0x20000&gt;;</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_rsc: rsc@17a00000 {</div><div class='add'>+			label = "apps_rsc";</div><div class='add'>+			compatible = "qcom,rpmh-rsc";</div><div class='add'>+			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x17a10000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x17a20000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "drv-0", "drv-1", "drv-2";</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+			qcom,drv-id = &lt;2&gt;;</div><div class='add'>+			qcom,tcs-config = &lt;ACTIVE_TCS  3&gt;, &lt;SLEEP_TCS   2&gt;,</div><div class='add'>+					  &lt;WAKE_TCS    2&gt;, &lt;CONTROL_TCS 0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+</div><div class='add'>+			apps_bcm_voter: bcm-voter {</div><div class='add'>+				compatible = "qcom,bcm-voter";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhcc: clock-controller {</div><div class='add'>+				compatible = "qcom,sar2130p-rpmh-clk";</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+				clock-names = "xo";</div><div class='add'>+				clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhpd: power-controller {</div><div class='add'>+				compatible = "qcom,sar2130p-rpmhpd";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				rpmhpd_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_ret: opp1 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_min_svs: opp2 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d1: opp3 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs: opp4 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs: opp5 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l1: opp6 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom: opp7 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo: opp8 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l1: opp9 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpufreq_hw: cpufreq@17d91000 {</div><div class='add'>+			compatible = "qcom,sar2130p-cpufreq-epss", "qcom,cpufreq-epss";</div><div class='add'>+			reg = &lt;0x0 0x17d91000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "freq-domain0";</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dcvsh-irq-0";</div><div class='add'>+			#freq-domain-cells = &lt;1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem_noc: interconnect@19100000 {</div><div class='add'>+			compatible = "qcom,sar2130p-gem-noc";</div><div class='add'>+			reg = &lt;0x0 0x19100000 0x0 0xa2080&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Bootloader expects just cache-controller node instead of</div><div class='add'>+		 * the typical system-cache-controller</div><div class='add'>+		 */</div><div class='add'>+		llcc: cache-controller@19200000 {</div><div class='add'>+			compatible = "qcom,sar2130p-llcc";</div><div class='add'>+			reg = &lt;0x0 0x19200000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x19300000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x19a00000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x19c00000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x19af0000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x19cf0000 0x0 0x80000&gt;;</div><div class='add'>+			reg-names = "llcc0_base",</div><div class='add'>+				    "llcc1_base",</div><div class='add'>+				    "llcc_broadcast_base",</div><div class='add'>+				    "llcc_broadcast_and_base",</div><div class='add'>+				    "llcc_scratchpad_broadcast_base",</div><div class='add'>+				    "llcc_scratchpad_broadcast_and_base";</div><div class='add'>+			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: qfprom@221c8000 {</div><div class='add'>+			compatible = "qcom,sar2130p-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x0 0x221c8000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			read-only;</div><div class='add'>+</div><div class='add'>+			gpu_speed_bin: gpu-speed-bin@119 {</div><div class='add'>+				reg = &lt;0x119 0x2&gt;;</div><div class='add'>+				bits = &lt;5 8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp_noc: interconnect@320c0000 {</div><div class='add'>+			compatible = "qcom,sar2130p-nsp-noc";</div><div class='add'>+			reg = &lt;0x0 0x320c0000 0x0 0x10&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_ag_noc: interconnect@3c40000 {</div><div class='add'>+			compatible = "qcom,sar2130p-lpass-ag-noc";</div><div class='add'>+			reg = &lt;0x0 0x3c40000 0x0 0x10&gt;;</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		aoss0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				aoss0-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu0_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu0_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu0-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu1_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu1-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu2_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu2_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu2-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu3_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu3_alert1: rip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cpu3-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss0-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 5&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpu0_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu0_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point2 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 6&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpu1_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point2 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nspss0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 7&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				nspss1-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nspss1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 8&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				nspss2-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nspss2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				nspss2-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				video-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddr-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 11&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ddr-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 12&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				camera0-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 13&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				camera1-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdmss-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 14&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mdmss-critical {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts<br/>index 3f0d3e33894a..ad342d8b7508 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts</a></div><div class='hunk'>@@ -438,15 +438,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-</div><div class='del'>-	vdda-1p2-supply = &lt;&amp;vreg_l3c_1p2&gt;;</div><div class='del'>-	vdda-0p9-supply = &lt;&amp;vreg_l4a_0p8&gt;;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='ctx'> 	remote-endpoint = &lt;&amp;ec_dp_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -530,19 +526,19 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@3 {</div><div class='del'>-		reg = &lt;3&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-el2.dtso b/arch/arm64/boot/dts/qcom/sc7180-el2.dtso<br/>new file mode 100644<br/>index 000000000000..49a98676ca4d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-el2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-el2.dtso</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * sc7180 specific modifications required to boot in EL2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */</div><div class='add'>+&amp;gpu {</div><div class='add'>+	zap-shader {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Venus can be used in EL2 if booted similarly to ChromeOS devices. */</div><div class='add'>+&amp;venus {</div><div class='add'>+	video-firmware {</div><div class='add'>+		iommus = &lt;&amp;apps_smmu 0x0c42 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi b/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi<br/>index ee35a454dbf6..59162b3afcb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi</a></div><div class='hunk'>@@ -6,82 +6,82 @@</div><div class='ctx'>  * by Qualcomm firmware.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-&amp;CPU0 {</div><div class='add'>+&amp;cpu0 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='add'>+&amp;cpu1 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='add'>+&amp;cpu2 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='add'>+&amp;cpu3 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='add'>+&amp;cpu4 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='add'>+&amp;cpu5 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;little_cpu_sleep_0</div><div class='add'>+			   &amp;little_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU6 {</div><div class='add'>+&amp;cpu6 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_0</div><div class='add'>+			   &amp;big_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU7 {</div><div class='add'>+&amp;cpu7 {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='ctx'> 	/delete-property/ power-domain-names;</div><div class='ctx'> </div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+	cpu-idle-states = &lt;&amp;big_cpu_sleep_0</div><div class='add'>+			   &amp;big_cpu_sleep_1</div><div class='add'>+			   &amp;cluster_sleep_0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /delete-node/ &amp;domain_idle_states;</div><div class='ctx'> </div><div class='ctx'> &amp;idle_states {</div><div class='del'>-	CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+	cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 		compatible = "arm,idle-state";</div><div class='ctx'> 		idle-state-name = "cluster-power-down";</div><div class='ctx'> 		arm,psci-suspend-param = &lt;0x40003444&gt;;</div><div class='hunk'>@@ -92,15 +92,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/delete-node/ &amp;CPU_PD0;</div><div class='del'>-/delete-node/ &amp;CPU_PD1;</div><div class='del'>-/delete-node/ &amp;CPU_PD2;</div><div class='del'>-/delete-node/ &amp;CPU_PD3;</div><div class='del'>-/delete-node/ &amp;CPU_PD4;</div><div class='del'>-/delete-node/ &amp;CPU_PD5;</div><div class='del'>-/delete-node/ &amp;CPU_PD6;</div><div class='del'>-/delete-node/ &amp;CPU_PD7;</div><div class='del'>-/delete-node/ &amp;CLUSTER_PD;</div><div class='add'>+/delete-node/ &amp;cpu_pd0;</div><div class='add'>+/delete-node/ &amp;cpu_pd1;</div><div class='add'>+/delete-node/ &amp;cpu_pd2;</div><div class='add'>+/delete-node/ &amp;cpu_pd3;</div><div class='add'>+/delete-node/ &amp;cpu_pd4;</div><div class='add'>+/delete-node/ &amp;cpu_pd5;</div><div class='add'>+/delete-node/ &amp;cpu_pd6;</div><div class='add'>+/delete-node/ &amp;cpu_pd7;</div><div class='add'>+/delete-node/ &amp;cluster_pd;</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='ctx'> 	/delete-property/ power-domains;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts<br/>index 0146fb0036d4..19cf419cf531 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-idp.dts</a></div><div class='hunk'>@@ -323,15 +323,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi<br/>index 3c124bbe2f4c..25b17b0425f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi</a></div><div class='hunk'>@@ -53,14 +53,14 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi<br/>index b2df22faafe8..8fee8d7a7d4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi</a></div><div class='hunk'>@@ -71,14 +71,14 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -188,7 +188,7 @@ ap_ts_pen_1v8: &amp;i2c4 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_HOMESTAR";</div><div class='add'>+	qcom,calibration-variant = "GO_HOMESTAR";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - modifications to sc7180-trogdor.dtsi */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts<br/>index 655bea928e52..26514640a1ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dts</a></div><div class='hunk'>@@ -79,7 +79,7 @@ ap_ts_pen_1v8: &amp;i2c4 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_KINGOFTOWN";</div><div class='add'>+	qcom,calibration-variant = "GO_KINGOFTOWN";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - modifications to sc7180-trogdor.dtsi */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi<br/>index c3fd6760de7a..eb9c9e713a89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi</a></div><div class='hunk'>@@ -69,7 +69,7 @@ ap_ts_pen_1v8: &amp;i2c4 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_LAZOR";</div><div class='add'>+	qcom,calibration-variant = "GO_LAZOR";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - modifications to sc7180-trogdor.dtsi */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi<br/>index 89034b6702f4..a2224de841b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi</a></div><div class='hunk'>@@ -59,5 +59,5 @@ ap_ts_pen_1v8: &amp;i2c4 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_PAZQUEL360";</div><div class='add'>+	qcom,calibration-variant = "GO_PAZQUEL360";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi<br/>index ac8d4589e3fb..4f5ab378cf8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi</a></div><div class='hunk'>@@ -12,11 +12,11 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	thermal-zones {</div><div class='del'>-		5v-choke-thermal {</div><div class='add'>+		choke-5v-thermal {</div><div class='ctx'> 			thermal-sensors = &lt;&amp;pm6150_adc_tm 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				5v-choke-crit {</div><div class='add'>+				choke-5v-crit {</div><div class='ctx'> 					temperature = &lt;125000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='hunk'>@@ -181,7 +181,7 @@ ap_ts_pen_1v8: &amp;i2c4 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_POMPOM";</div><div class='add'>+	qcom,calibration-variant = "GO_POMPOM";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - board-specific pinctrl */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi<br/>index 00229b1515e6..4bea97e4246e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi</a></div><div class='hunk'>@@ -78,6 +78,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;lcd_rst&gt;;</div><div class='ctx'> 		avdd-supply = &lt;&amp;ppvar_lcd&gt;;</div><div class='add'>+		avee-supply = &lt;&amp;ppvar_lcd&gt;;</div><div class='ctx'> 		pp1800-supply = &lt;&amp;v1p8_disp&gt;;</div><div class='ctx'> 		pp3300-supply = &lt;&amp;pp3300_dx_edp&gt;;</div><div class='ctx'> 		backlight = &lt;&amp;backlight&gt;;</div><div class='hunk'>@@ -89,15 +90,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhc_2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi<br/>index af89d80426ab..6078308694ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi</a></div><div class='hunk'>@@ -78,14 +78,14 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -148,15 +148,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pm6150_adc {</div><div class='hunk'>@@ -196,7 +192,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wifi {</div><div class='del'>-	qcom,ath10k-calibration-variant = "GO_WORMDINGLER";</div><div class='add'>+	qcom,calibration-variant = "GO_WORMDINGLER";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi<br/>index b5ebf8980325..a0df10a97c7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7180.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7180.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sc7180.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sc7180.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,lpasscorecc-sc7180.h&gt;</div><div class='hunk'>@@ -77,28 +78,28 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -106,206 +107,206 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;415&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;137&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;480&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo468";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;480&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;mc_virt SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -313,7 +314,7 @@</div><div class='ctx'> 		idle_states: idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -323,7 +324,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -333,7 +334,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -343,7 +344,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -355,27 +356,24 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain_idle_states: domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_PC: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_pc: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='del'>-				idle-state-name = "cluster-l3-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;3048&gt;;</div><div class='ctx'> 				min-residency-us = &lt;6118&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_cx_ret: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='del'>-				idle-state-name = "cluster-cx-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41001244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3638&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;4562&gt;;</div><div class='ctx'> 				min-residency-us = &lt;8467&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_AOSS_SLEEP: cluster-sleep-2 {</div><div class='add'>+			cluster_aoss_sleep: cluster-sleep-2 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='del'>-				idle-state-name = "cluster-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100b244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;6562&gt;;</div><div class='hunk'>@@ -583,59 +581,59 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_PC</div><div class='del'>-					      &amp;CLUSTER_SLEEP_CX_RET</div><div class='del'>-					      &amp;CLUSTER_AOSS_SLEEP&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_pc</div><div class='add'>+					      &amp;cluster_sleep_cx_ret</div><div class='add'>+					      &amp;cluster_aoss_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2546,7 +2544,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07040000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2566,7 +2564,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07140000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2586,7 +2584,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07240000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2606,7 +2604,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07340000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2626,7 +2624,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07440000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2646,7 +2644,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07540000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2666,7 +2664,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07640000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2686,7 +2684,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07740000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -2899,6 +2897,31 @@</div><div class='ctx'> </div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_qmpphy_out: endpoint { };</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_qmpphy_usb_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_qmpphy_dp_in: endpoint { };</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pmu@90b6300 {</div><div class='hunk'>@@ -3067,9 +3090,31 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 				maximum-speed = "super-speed";</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						usb_1_dwc3_hs: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						usb_1_dwc3_ss: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;usb_1_qmpphy_usb_ss_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3095,14 +3140,6 @@</div><div class='ctx'> 					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_VENUS_CFG 0&gt;;</div><div class='ctx'> 			interconnect-names = "video-mem", "cpu-cfg";</div><div class='ctx'> </div><div class='del'>-			video-decoder {</div><div class='del'>-				compatible = "venus-decoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			video-encoder {</div><div class='del'>-				compatible = "venus-encoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			venus_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='hunk'>@@ -3196,7 +3233,7 @@</div><div class='ctx'> 			mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sc7180-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -3285,8 +3322,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='hunk'>@@ -3390,8 +3429,10 @@</div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 					port@0 {</div><div class='ctx'> 						reg = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 						dp_in: endpoint {</div><div class='ctx'> 							remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='ctx'> 						};</div><div class='hunk'>@@ -3399,6 +3440,7 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='ctx'> 						mdss_dp_out: endpoint { };</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='hunk'>@@ -3434,8 +3476,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0af00000 0 0x200000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -3524,18 +3566,18 @@</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sram@146aa000 {</div><div class='add'>+		sram@14680000 {</div><div class='ctx'> 			compatible = "qcom,sc7180-imem", "syscon", "simple-mfd";</div><div class='del'>-			reg = &lt;0 0x146aa000 0 0x2000&gt;;</div><div class='add'>+			reg = &lt;0 0x14680000 0 0x2e000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			ranges = &lt;0 0 0x146aa000 0x2000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x14680000 0x2e000&gt;;</div><div class='ctx'> </div><div class='del'>-			pil-reloc@94c {</div><div class='add'>+			pil-reloc@2a94c {</div><div class='ctx'> 				compatible = "qcom,pil-reloc-info";</div><div class='del'>-				reg = &lt;0x94c 0xc8&gt;;</div><div class='add'>+				reg = &lt;0x2a94c 0xc8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3625,6 +3667,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='hunk'>@@ -3720,7 +3763,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apps_rsc: rsc@18200000 {</div><div class='del'>-			compatible = "qcom,rpmh-rsc";</div><div class='add'>+			compatible = "qcom,sc7180-rpmh-apps-rsc", "qcom,rpmh-rsc";</div><div class='ctx'> 			reg = &lt;0 0x18200000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x18210000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x18220000 0 0x10000&gt;;</div><div class='hunk'>@@ -3734,7 +3777,7 @@</div><div class='ctx'> 					  &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpmhcc: clock-controller {</div><div class='ctx'> 				compatible = "qcom,sc7180-rpmh-clk";</div><div class='hunk'>@@ -4063,21 +4106,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4111,21 +4154,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4159,21 +4202,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4207,21 +4250,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4255,21 +4298,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4303,21 +4346,21 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4351,13 +4394,13 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4391,13 +4434,13 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4431,13 +4474,13 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu8_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu8_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4471,13 +4514,13 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu9_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu9_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi<br/>index cecb3e89f7f7..84c6d662b54f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		domain_idle_states: domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40003444&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -44,16 +44,15 @@</div><div class='ctx'> 			reg = &lt;0x0 0x8ad00000 0x0 0x500000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		venus_mem: memory@8b200000 {</div><div class='del'>-			reg = &lt;0x0 0x8b200000 0x0 0x500000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CLUSTER_PD {</div><div class='del'>-	domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+&amp;cluster_pd {</div><div class='add'>+	domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpass_aon {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi<br/>index a90c70b1b73e..0e07429982bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi</a></div><div class='hunk'>@@ -139,6 +139,7 @@ hp_i2c: &amp;i2c2 {</div><div class='ctx'> 	vdd-micb-supply = &lt;&amp;pp1800_l2c&gt;;</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;lpass_dmic01_clk&gt;, &lt;&amp;lpass_dmic01_data&gt;, &lt;&amp;lpass_dmic23_clk&gt;,</div><div class='ctx'> 			&lt;&amp;lpass_dmic23_data&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi<br/>index 020ef666e35f..ce48e4cda170 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi</a></div><div class='hunk'>@@ -141,6 +141,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpass_va_macro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;lpass_dmic01_clk&gt;, &lt;&amp;lpass_dmic01_data&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi<br/>index 2ba4ea60cb14..5c5e4f1dd221 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi</a></div><div class='hunk'>@@ -621,15 +621,13 @@ ap_ec_spi: &amp;spi10 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='ctx'> 	/* 2.x hub on port 1 */</div><div class='ctx'> 	usb_hub_2_x: hub@1 {</div><div class='ctx'> 		compatible = "usbbda,5411";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts<br/>index b5fe7356be48..3103f94cd685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-idp.dts</a></div><div class='hunk'>@@ -81,11 +81,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_2_hsphy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi<br/>index 7370aa0dbf0e..ccd39a1baeda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280-idp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280-idp.dtsi</a></div><div class='hunk'>@@ -412,6 +412,8 @@</div><div class='ctx'> &amp;lpass_va_macro {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vdd-micb-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;lpass_dmic01_clk&gt;, &lt;&amp;lpass_dmic01_data&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie1 {</div><div class='hunk'>@@ -518,11 +520,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi<br/>index 3d8410683402..4b04dea57ec8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc7280.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc7280.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,camcc-sc7280.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sc7280.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sc7280.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='hunk'>@@ -27,6 +28,8 @@</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/sound/qcom,lpass.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -83,7 +86,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -193,15 +196,15 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='hunk'>@@ -209,12 +212,12 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -222,15 +225,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='hunk'>@@ -238,23 +241,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='hunk'>@@ -262,23 +265,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='hunk'>@@ -286,23 +289,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;520&gt;;</div><div class='hunk'>@@ -310,23 +313,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;520&gt;;</div><div class='hunk'>@@ -334,23 +337,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1946&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;520&gt;;</div><div class='hunk'>@@ -358,23 +361,23 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu7_opp_table&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1985&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;552&gt;;</div><div class='hunk'>@@ -382,46 +385,46 @@</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -429,7 +432,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -439,7 +442,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -449,7 +452,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -459,7 +462,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-down";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -471,7 +474,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain_idle_states: domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_apss_off: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -479,7 +482,7 @@</div><div class='ctx'> 				min-residency-us = &lt;6118&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_cx_ret: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41001344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -487,7 +490,7 @@</div><div class='ctx'> 				min-residency-us = &lt;8467&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_LLCC_OFF: cluster-sleep-2 {</div><div class='add'>+			cluster_sleep_llcc_off: cluster-sleep-2 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100b344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3638&gt;;</div><div class='hunk'>@@ -618,12 +621,12 @@</div><div class='ctx'> </div><div class='ctx'> 		cpu4_opp_2400mhz: opp-2400000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu4_opp_2611mhz: opp-2611200000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2611200000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -683,22 +686,22 @@</div><div class='ctx'> </div><div class='ctx'> 		cpu7_opp_2400mhz: opp-2400000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu7_opp_2515mhz: opp-2515200000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2515200000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu7_opp_2707mhz: opp-2707200000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2707200000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu7_opp_3014mhz: opp-3014400000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;3014400000&gt;;</div><div class='del'>-			opp-peak-kBps = &lt;8532000 48537600&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12787200 48537600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -845,8 +848,13 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,armv8-pmuv3";</div><div class='add'>+	pmu-a55 {</div><div class='add'>+		compatible = "arm,cortex-a55-pmu";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu-a78 {</div><div class='add'>+		compatible = "arm,cortex-a78-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -854,57 +862,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_APSS_OFF &amp;CLUSTER_SLEEP_CX_RET &amp;CLUSTER_SLEEP_LLCC_OFF&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_apss_off &amp;cluster_sleep_cx_ret &amp;cluster_sleep_llcc_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2193,6 +2201,135 @@</div><div class='ctx'> 			qcom,smem-state-names = "wlan-smp2p-out";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie0: pcie@1c00000 {</div><div class='add'>+			compatible = "qcom,pcie-sc7280";</div><div class='add'>+			reg = &lt;0 0x01c00000 0 0x3000&gt;,</div><div class='add'>+			      &lt;0 0x60000000 0 0xf1d&gt;,</div><div class='add'>+			      &lt;0 0x60000f20 0 0xa8&gt;,</div><div class='add'>+			      &lt;0 0x60001000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x60100000 0 0x100000&gt;,</div><div class='add'>+			      &lt;0 0x01c03000 0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK_SRC&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "pipe",</div><div class='add'>+				      "pipe_mux",</div><div class='add'>+				      "phy_pipe",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "tbu",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "aggre0",</div><div class='add'>+				      "aggre1";</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0x0   &amp;apps_smmu 0x1c00 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;apps_smmu 0x1c01 0x1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='add'>+			reset-names = "pci";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_PCIE_0_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie0_clkreq_n&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie0_port: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@1c06000 {</div><div class='add'>+			compatible = "qcom,sm8250-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0 0x01c06000 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_PHY_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "refgen",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			clock-output-names = "pcie_0_pipe_clk";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE0_PHY_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie1: pcie@1c08000 {</div><div class='ctx'> 			compatible = "qcom,pcie-sc7280";</div><div class='ctx'> 			reg = &lt;0 0x01c08000 0 0x3000&gt;,</div><div class='hunk'>@@ -2220,15 +2357,23 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi0", "msi1", "msi2", "msi3",</div><div class='del'>-					  "msi4", "msi5", "msi6", "msi7";</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK_SRC&gt;,</div><div class='hunk'>@@ -2318,7 +2463,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sc7280-ufshc", "qcom,ufshc",</div><div class='ctx'> 				     "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;;</div><div class='hunk'>@@ -2358,18 +2503,52 @@</div><div class='ctx'> 				      "tx_lane0_sync_clk",</div><div class='ctx'> 				      "rx_lane0_sync_clk",</div><div class='ctx'> 				      "rx_lane1_sync_clk";</div><div class='del'>-			freq-table-hz =</div><div class='del'>-				&lt;75000000 300000000&gt;,</div><div class='del'>-				&lt;0 0&gt;,</div><div class='del'>-				&lt;0 0&gt;,</div><div class='del'>-				&lt;75000000 300000000&gt;,</div><div class='del'>-				&lt;0 0&gt;,</div><div class='del'>-				&lt;0 0&gt;,</div><div class='del'>-				&lt;0 0&gt;,</div><div class='del'>-				&lt;0 0&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;ufs_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			qcom,ice = &lt;&amp;ice&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ufs_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-75000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;75000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;75000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-150000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;150000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;150000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-300000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;300000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;300000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ufs_mem_phy: phy@1d87000 {</div><div class='hunk'>@@ -2595,6 +2774,66 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		lpass_wsa_macro: codec@3240000 {</div><div class='add'>+			compatible = "qcom,sc7280-lpass-wsa-macro";</div><div class='add'>+			reg = &lt;0x0 0x03240000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lpass_aon LPASS_AON_CC_TX_MCLK_CLK&gt;,</div><div class='add'>+				 &lt;&amp;lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK&gt;,</div><div class='add'>+				 &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;lpass_va_macro&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "npl",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec",</div><div class='add'>+				      "fsgen";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;lpass_wsa_swr_clk&gt;, &lt;&amp;lpass_wsa_swr_data&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "mclk";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swr2: soundwire@3250000 {</div><div class='add'>+			compatible = "qcom,soundwire-v1.6.0";</div><div class='add'>+			reg = &lt;0x0 0x03250000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lpass_wsa_macro&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR&gt;;</div><div class='add'>+			reset-names = "swr_audio_cgcr";</div><div class='add'>+</div><div class='add'>+			qcom,din-ports = &lt;2&gt;;</div><div class='add'>+			qcom,dout-ports = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ports-sinterval-low = /bits/ 8 &lt;0x07 0x1f 0x3f 0x07</div><div class='add'>+								0x1f 0x3f 0x0f 0x0f&gt;;</div><div class='add'>+			qcom,ports-offset1 = /bits/ 8 &lt;0x01 0x02 0x0c 0x06 0x12 0x0d 0x07 0x0a&gt;;</div><div class='add'>+			qcom,ports-offset2 = /bits/ 8 &lt;0xff 0x00 0x1f 0xff 0x00 0x1f 0x00 0x00&gt;;</div><div class='add'>+			qcom,ports-hstart = /bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstop = /bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-word-length = /bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode = /bits/ 8 &lt;0xff 0xff 0x01 0xff 0xff 0x01</div><div class='add'>+							       0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-group-count = /bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff</div><div class='add'>+								0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-lane-control = /bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff</div><div class='add'>+							    0xff 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lpass_audiocc: clock-controller@3300000 {</div><div class='ctx'> 			compatible = "qcom,sc7280-lpassaudiocc";</div><div class='ctx'> 			reg = &lt;0 0x03300000 0 0x30000&gt;,</div><div class='hunk'>@@ -2612,9 +2851,6 @@</div><div class='ctx'> 			compatible = "qcom,sc7280-lpass-va-macro";</div><div class='ctx'> 			reg = &lt;0 0x03370000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;lpass_dmic01_clk&gt;, &lt;&amp;lpass_dmic01_data&gt;;</div><div class='del'>-</div><div class='ctx'> 			clocks = &lt;&amp;lpass_aon LPASS_AON_CC_TX_MCLK_CLK&gt;;</div><div class='ctx'> 			clock-names = "mclk";</div><div class='ctx'> </div><div class='hunk'>@@ -2718,7 +2954,7 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='del'>-			num-channels  = &lt;31&gt;;</div><div class='add'>+			num-channels = &lt;31&gt;;</div><div class='ctx'> 			qcom,ee = &lt;1&gt;;</div><div class='ctx'> 			qcom,num-ees = &lt;2&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x1826 0x0&gt;;</div><div class='hunk'>@@ -2765,41 +3001,77 @@</div><div class='ctx'> 			lpass_dmic01_clk: dmic01-clk-state {</div><div class='ctx'> 				pins = "gpio6";</div><div class='ctx'> 				function = "dmic1_clk";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_dmic01_data: dmic01-data-state {</div><div class='ctx'> 				pins = "gpio7";</div><div class='ctx'> 				function = "dmic1_data";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_dmic23_clk: dmic23-clk-state {</div><div class='ctx'> 				pins = "gpio8";</div><div class='ctx'> 				function = "dmic2_clk";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_dmic23_data: dmic23-data-state {</div><div class='ctx'> 				pins = "gpio9";</div><div class='ctx'> 				function = "dmic2_data";</div><div class='add'>+				drive-strength = &lt;8&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_rx_swr_clk: rx-swr-clk-state {</div><div class='ctx'> 				pins = "gpio3";</div><div class='ctx'> 				function = "swr_rx_clk";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_rx_swr_data: rx-swr-data-state {</div><div class='ctx'> 				pins = "gpio4", "gpio5";</div><div class='ctx'> 				function = "swr_rx_data";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-bus-hold;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_tx_swr_clk: tx-swr-clk-state {</div><div class='ctx'> 				pins = "gpio0";</div><div class='ctx'> 				function = "swr_tx_clk";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-disable;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			lpass_tx_swr_data: tx-swr-data-state {</div><div class='ctx'> 				pins = "gpio1", "gpio2", "gpio14";</div><div class='ctx'> 				function = "swr_tx_data";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-bus-hold;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpass_wsa_swr_clk: wsa-swr-clk-state {</div><div class='add'>+				pins = "gpio10";</div><div class='add'>+				function = "wsa_swr_clk";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lpass_wsa_swr_data: wsa-swr-data-state {</div><div class='add'>+				pins = "gpio11";</div><div class='add'>+				function = "wsa_swr_data";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				slew-rate = &lt;1&gt;;</div><div class='add'>+				bias-bus-hold;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2823,6 +3095,8 @@</div><div class='ctx'> 			nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='ctx'> 			nvmem-cell-names = "speed_bin";</div><div class='ctx'> </div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='ctx'> 			gpu_zap_shader: zap-shader {</div><div class='ctx'> 				memory-region = &lt;&amp;gpu_zap_mem&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -2834,14 +3108,14 @@</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;315000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;1804000&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x07&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x17&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-450000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;450000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;4068000&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x07&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x17&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				/* Only applicable for SKUs which has 550Mhz as Fmax */</div><div class='hunk'>@@ -2856,14 +3130,14 @@</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;6832000&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x06&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x16&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-608000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;608000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;8368000&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x06&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x16&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-700000000 {</div><div class='hunk'>@@ -3278,7 +3552,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07040000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3298,7 +3572,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07140000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3318,7 +3592,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07240000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3338,7 +3612,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07340000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3358,7 +3632,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07440000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3378,7 +3652,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07540000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3398,7 +3672,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07640000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3418,7 +3692,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07740000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3632,6 +3906,8 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			orientation-switch;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -3647,6 +3923,7 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					usb_dp_qmpphy_usb_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -3654,19 +3931,16 @@</div><div class='ctx'> 					reg = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 					usb_dp_qmpphy_dp_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mdss_dp_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_2: usb@8cf8800 {</div><div class='del'>-			compatible = "qcom,sc7280-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x08cf8800 0 0x400&gt;;</div><div class='add'>+		usb_2: usb@8c00000 {</div><div class='add'>+			compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x08c00000 0 0xfc100&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-			dma-ranges;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_SEC_MASTER_CLK&gt;,</div><div class='hunk'>@@ -3683,11 +3957,13 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_SEC_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 12 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 13 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq";</div><div class='hunk'>@@ -3701,22 +3977,19 @@</div><div class='ctx'> 					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc2 SLAVE_USB2 0&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr", "apps-usb";</div><div class='ctx'> </div><div class='del'>-			usb_2_dwc3: usb@8c00000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x08c00000 0 0xe000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0xa0 0x0&gt;;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='del'>-				phy-names = "usb2-phy";</div><div class='del'>-				maximum-speed = "high-speed";</div><div class='del'>-				usb-role-switch;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xa0 0x0&gt;;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='add'>+			phy-names = "usb2-phy";</div><div class='add'>+			maximum-speed = "high-speed";</div><div class='add'>+			usb-role-switch;</div><div class='ctx'> </div><div class='del'>-				port {</div><div class='del'>-					usb2_role_switch: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;eud_ep&gt;;</div><div class='del'>-					};</div><div class='add'>+			port {</div><div class='add'>+				usb2_role_switch: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;eud_ep&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3768,7 +4041,7 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			glink-edge {</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='ctx'> 				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='ctx'> 							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='ctx'> 							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='hunk'>@@ -3808,6 +4081,13 @@</div><div class='ctx'> 							compatible = "qcom,q6afe-clocks";</div><div class='ctx'> 							#clock-cells = &lt;2&gt;;</div><div class='ctx'> 						};</div><div class='add'>+</div><div class='add'>+						q6usbdai: usbd {</div><div class='add'>+							compatible = "qcom,q6usb";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x180f 0x0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+							qcom,usb-audio-intr-idx = /bits/ 16 &lt;2&gt;;</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					q6asm: service@7 {</div><div class='hunk'>@@ -3823,15 +4103,15 @@</div><div class='ctx'> 							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='ctx'> </div><div class='ctx'> 							dai@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> </div><div class='ctx'> 							dai@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> </div><div class='ctx'> 							dai@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 							};</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -3860,18 +4140,21 @@</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;3&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@4 {</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;4&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@5 {</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;5&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -3956,6 +4239,12 @@</div><div class='ctx'> 				opp-7 {</div><div class='ctx'> 					opp-peak-kBps = &lt;8532000&gt;;</div><div class='ctx'> 				};</div><div class='add'>+				opp-8 {</div><div class='add'>+					opp-peak-kBps = &lt;10944000&gt;;</div><div class='add'>+				};</div><div class='add'>+				opp-9 {</div><div class='add'>+					opp-peak-kBps = &lt;12787200&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -4099,6 +4388,7 @@</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a1 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1181 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@2 {</div><div class='hunk'>@@ -4106,6 +4396,7 @@</div><div class='ctx'> 						reg = &lt;2&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a2 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1182 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@3 {</div><div class='hunk'>@@ -4113,6 +4404,7 @@</div><div class='ctx'> 						reg = &lt;3&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a3 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1183 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@4 {</div><div class='hunk'>@@ -4120,6 +4412,7 @@</div><div class='ctx'> 						reg = &lt;4&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a4 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1184 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@5 {</div><div class='hunk'>@@ -4127,6 +4420,7 @@</div><div class='ctx'> 						reg = &lt;5&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a5 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1185 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@6 {</div><div class='hunk'>@@ -4134,6 +4428,7 @@</div><div class='ctx'> 						reg = &lt;6&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a6 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1186 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@7 {</div><div class='hunk'>@@ -4141,6 +4436,7 @@</div><div class='ctx'> 						reg = &lt;7&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a7 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1187 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@8 {</div><div class='hunk'>@@ -4148,6 +4444,7 @@</div><div class='ctx'> 						reg = &lt;8&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11a8 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x1188 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					/* note: secure cb9 in downstream */</div><div class='hunk'>@@ -4157,6 +4454,7 @@</div><div class='ctx'> 						reg = &lt;11&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11ab 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x118b 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@12 {</div><div class='hunk'>@@ -4164,6 +4462,7 @@</div><div class='ctx'> 						reg = &lt;12&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11ac 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x118c 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@13 {</div><div class='hunk'>@@ -4171,6 +4470,7 @@</div><div class='ctx'> 						reg = &lt;13&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11ad 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x118d 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					compute-cb@14 {</div><div class='hunk'>@@ -4178,19 +4478,16 @@</div><div class='ctx'> 						reg = &lt;14&gt;;</div><div class='ctx'> 						iommus = &lt;&amp;apps_smmu 0x11ae 0x0420&gt;,</div><div class='ctx'> 							 &lt;&amp;apps_smmu 0x118e 0x0420&gt;;</div><div class='add'>+						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_1: usb@a6f8800 {</div><div class='del'>-			compatible = "qcom,sc7280-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='add'>+		usb_1: usb@a600000 {</div><div class='add'>+			compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a600000 0 0xfc100&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-			dma-ranges;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='hunk'>@@ -4207,12 +4504,14 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='hunk'>@@ -4229,34 +4528,33 @@</div><div class='ctx'> </div><div class='ctx'> 			wakeup-source;</div><div class='ctx'> </div><div class='del'>-			usb_1_dwc3: usb@a600000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a600000 0 0xe000&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0xe0 0x0&gt;;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				snps,parkmode-disable-ss-quirk;</div><div class='del'>-				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='del'>-				phy-names = "usb2-phy", "usb3-phy";</div><div class='del'>-				maximum-speed = "super-speed";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xe0 0x0&gt;;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,parkmode-disable-ss-quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			num-hc-interrupters = /bits/ 16 &lt;3&gt;;</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			maximum-speed = "super-speed";</div><div class='ctx'> </div><div class='del'>-				ports {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-					port@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_hs: endpoint {</div><div class='del'>-						};</div><div class='add'>+					usb_1_dwc3_hs: endpoint {</div><div class='ctx'> 					};</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-					port@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_ss: endpoint {</div><div class='del'>-						};</div><div class='add'>+					usb_1_dwc3_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -4290,14 +4588,6 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			video-decoder {</div><div class='del'>-				compatible = "venus-decoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			video-encoder {</div><div class='del'>-				compatible = "venus-encoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			venus_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='hunk'>@@ -4419,6 +4709,184 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		camss: isp@acb3000 {</div><div class='add'>+			compatible = "qcom,sc7280-camss";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x0acb3000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acba000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acc1000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acc8000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0accf000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace0000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace2000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace4000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace6000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace8000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acaf000 0x0 0x4000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acb6000 0x0 0x4000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acbd000 0x0 0x4000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acc4000 0x0 0x4000&gt;,</div><div class='add'>+			      &lt;0x0 0x0accb000 0x0 0x4000&gt;;</div><div class='add'>+			reg-names = "csid0",</div><div class='add'>+				    "csid1",</div><div class='add'>+				    "csid2",</div><div class='add'>+				    "csid_lite0",</div><div class='add'>+				    "csid_lite1",</div><div class='add'>+				    "csiphy0",</div><div class='add'>+				    "csiphy1",</div><div class='add'>+				    "csiphy2",</div><div class='add'>+				    "csiphy3",</div><div class='add'>+				    "csiphy4",</div><div class='add'>+				    "vfe0",</div><div class='add'>+				    "vfe1",</div><div class='add'>+				    "vfe2",</div><div class='add'>+				    "vfe_lite0",</div><div class='add'>+				    "vfe_lite1";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI2PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY3_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI3PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY4_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI4PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_SF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_ICP_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_0_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_1_CSID_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "csiphy0",</div><div class='add'>+				      "csiphy0_timer",</div><div class='add'>+				      "csiphy1",</div><div class='add'>+				      "csiphy1_timer",</div><div class='add'>+				      "csiphy2",</div><div class='add'>+				      "csiphy2_timer",</div><div class='add'>+				      "csiphy3",</div><div class='add'>+				      "csiphy3_timer",</div><div class='add'>+				      "csiphy4",</div><div class='add'>+				      "csiphy4_timer",</div><div class='add'>+				      "gcc_axi_hf",</div><div class='add'>+				      "gcc_axi_sf",</div><div class='add'>+				      "icp_ahb",</div><div class='add'>+				      "vfe0",</div><div class='add'>+				      "vfe0_axi",</div><div class='add'>+				      "vfe0_cphy_rx",</div><div class='add'>+				      "vfe0_csid",</div><div class='add'>+				      "vfe1",</div><div class='add'>+				      "vfe1_axi",</div><div class='add'>+				      "vfe1_cphy_rx",</div><div class='add'>+				      "vfe1_csid",</div><div class='add'>+				      "vfe2",</div><div class='add'>+				      "vfe2_axi",</div><div class='add'>+				      "vfe2_cphy_rx",</div><div class='add'>+				      "vfe2_csid",</div><div class='add'>+				      "vfe_lite0",</div><div class='add'>+				      "vfe_lite0_cphy_rx",</div><div class='add'>+				      "vfe_lite0_csid",</div><div class='add'>+				      "vfe_lite1",</div><div class='add'>+				      "vfe_lite1_cphy_rx",</div><div class='add'>+				      "vfe_lite1_csid";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 640 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 359 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 122 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 641 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 360 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "csid0",</div><div class='add'>+					  "csid1",</div><div class='add'>+					  "csid2",</div><div class='add'>+					  "csid_lite0",</div><div class='add'>+					  "csid_lite1",</div><div class='add'>+					  "csiphy0",</div><div class='add'>+					  "csiphy1",</div><div class='add'>+					  "csiphy2",</div><div class='add'>+					  "csiphy3",</div><div class='add'>+					  "csiphy4",</div><div class='add'>+					  "vfe0",</div><div class='add'>+					  "vfe1",</div><div class='add'>+					  "vfe2",</div><div class='add'>+					  "vfe_lite0",</div><div class='add'>+					  "vfe_lite1";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc  MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc2 SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_CAMNOC_HF  QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "ahb",</div><div class='add'>+					     "hf_0";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x800 0x4e0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_IFE_0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_IFE_1_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_IFE_2_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+			power-domain-names = "ife0",</div><div class='add'>+					     "ife1",</div><div class='add'>+					     "ife2",</div><div class='add'>+					     "top";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		camcc: clock-controller@ad00000 {</div><div class='ctx'> 			compatible = "qcom,sc7280-camcc";</div><div class='ctx'> 			reg = &lt;0 0x0ad00000 0 0x10000&gt;;</div><div class='hunk'>@@ -4436,8 +4904,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0af00000 0 0x20000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;mdss_edp_phy 0&gt;,</div><div class='hunk'>@@ -4482,6 +4950,8 @@</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x900 0x402&gt;;</div><div class='ctx'> </div><div class='add'>+			resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='hunk'>@@ -4491,7 +4961,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sc7280-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f030&gt;,</div><div class='del'>-					&lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+					&lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -4594,8 +5064,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi_phy 0&gt;, &lt;&amp;mdss_dsi_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='hunk'>@@ -4672,7 +5144,8 @@</div><div class='ctx'> 				reg = &lt;0 0x0aea0000 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0x0aea0200 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0x0aea0400 0 0xc00&gt;,</div><div class='del'>-				      &lt;0 0x0aea1000 0 0x400&gt;;</div><div class='add'>+				      &lt;0 0x0aea1000 0 0x400&gt;,</div><div class='add'>+				      &lt;0 0x0aea1400 0 0x400&gt;;</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='hunk'>@@ -4809,7 +5282,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='del'>-						mdss_dp_out: endpoint { };</div><div class='add'>+						mdss_dp_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -5039,6 +5514,11 @@</div><div class='ctx'> 				function = "mi2s1_ws";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			pcie0_clkreq_n: pcie0-clkreq-n-state {</div><div class='add'>+				pins = "gpio88";</div><div class='add'>+				function = "pcie0_clkreqn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcie1_clkreq_n: pcie1-clkreq-n-state {</div><div class='ctx'> 				pins = "gpio79";</div><div class='ctx'> 				function = "pcie1_clkreqn";</div><div class='hunk'>@@ -6057,7 +6537,7 @@</div><div class='ctx'> 					  &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -6177,17 +6657,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6220,17 +6700,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6263,17 +6743,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6306,17 +6786,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6349,17 +6829,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6392,17 +6872,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6435,17 +6915,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6478,17 +6958,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6521,17 +7001,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu8_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu8_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6564,17 +7044,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu9_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu9_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6607,17 +7087,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu10_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu10_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6650,17 +7130,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu11_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu11_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts<br/>index 62de4774c556..08d0784d0cbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts</a></div><div class='hunk'>@@ -436,8 +436,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_edp {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;edp_hpd_active&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -457,15 +455,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss_edp_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;auo_b140han06_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_edp_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;auo_b140han06_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie3 {</div><div class='hunk'>@@ -681,10 +675,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xo_board_clk {</div><div class='del'>-	clock-frequency = &lt;38400000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* PINCTRL */</div><div class='ctx'> </div><div class='ctx'> &amp;pmc8180c_gpios {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts<br/>index 79b4d293ea1e..93de9fe918eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x-primus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x-primus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x-primus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8180x-primus.dts</a></div><div class='hunk'>@@ -531,8 +531,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_edp {</div><div class='del'>-	data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;edp_hpd_active&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -551,15 +549,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss_edp_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;auo_b133han05_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_edp_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;auo_b133han05_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie1 {</div><div class='hunk'>@@ -773,10 +767,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xo_board_clk {</div><div class='del'>-	clock-frequency = &lt;38400000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* PINCTRL */</div><div class='ctx'> </div><div class='ctx'> &amp;pmc8180c_gpios {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi<br/>index 0e9429684dd9..85c2afcb417d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8180x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8180x.dtsi</a></div><div class='hunk'>@@ -5,9 +5,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm8250.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sc8180x.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sm8150.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sc8180x-camcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,videocc-sm8150.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,osm-l3.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sc8180x.h&gt;</div><div class='hunk'>@@ -42,28 +45,28 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;602&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -71,207 +74,207 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;602&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;602&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;602&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 3 &amp;mc_virt SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -279,7 +282,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;355&gt;;</div><div class='hunk'>@@ -288,7 +291,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2411&gt;;</div><div class='hunk'>@@ -299,7 +302,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_apss_off: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3300&gt;;</div><div class='hunk'>@@ -307,7 +310,7 @@</div><div class='ctx'> 				min-residency-us = &lt;6000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_aoss_sleep: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100a344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -541,57 +544,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_APSS_OFF &amp;CLUSTER_SLEEP_AOSS_SLEEP&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_apss_off &amp;cluster_sleep_aoss_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1725,7 +1728,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1733,30 +1737,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_0_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "ref",</div><div class='del'>-				      "tbu";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='hunk'>@@ -1846,7 +1847,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1854,30 +1856,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_3_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_3_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "ref",</div><div class='del'>-				      "tbu";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_3_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='hunk'>@@ -1968,7 +1967,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 751 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 750 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 749 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 749 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1976,30 +1976,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 747 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 746 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 745 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 744 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 747 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 746 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 744 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_1_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "ref",</div><div class='del'>-				      "tbu";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='hunk'>@@ -2090,7 +2087,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 667 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 744 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2098,30 +2096,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 663 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 662 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 661 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 660 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 663 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 662 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 660 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_2_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_2_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "ref",</div><div class='del'>-				      "tbu";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_2_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='hunk'>@@ -2762,6 +2757,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x60 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_mp_hsphy0&gt;,</div><div class='ctx'> 				       &lt;&amp;usb_mp_qmpphy0&gt;,</div><div class='ctx'> 				       &lt;&amp;usb_mp_hsphy1&gt;,</div><div class='hunk'>@@ -2825,6 +2822,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x140 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_prim_hsphy&gt;, &lt;&amp;usb_prim_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -2902,6 +2901,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x160 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_sec_hsphy&gt;, &lt;&amp;usb_sec_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -2927,7 +2928,34 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mdss: mdss@ae00000 {</div><div class='add'>+		videocc: clock-controller@ab00000 {</div><div class='add'>+			compatible = "qcom,sc8180x-videocc",</div><div class='add'>+				     "qcom,sm8150-videocc";</div><div class='add'>+			reg = &lt;0 0x0ab00000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "bi_tcxo";</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SC8180X_MMCX&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camcc: clock-controller@ad00000 {</div><div class='add'>+			compatible = "qcom,sc8180x-camcc";</div><div class='add'>+			reg = &lt;0 0x0ad00000 0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SC8180X_MMCX&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdss: display-subsystem@ae00000 {</div><div class='ctx'> 			compatible = "qcom,sc8180x-mdss";</div><div class='ctx'> 			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "mdss";</div><div class='hunk'>@@ -2967,10 +2995,10 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			mdss_mdp: mdp@ae01000 {</div><div class='add'>+			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sc8180x-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3061,7 +3089,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mdss_dsi0: dsi@ae94000 {</div><div class='del'>-				compatible = "qcom,mdss-dsi-ctrl";</div><div class='add'>+				compatible = "qcom,sc8180x-dsi-ctrl",</div><div class='add'>+					     "qcom,mdss-dsi-ctrl";</div><div class='ctx'> 				reg = &lt;0 0x0ae94000 0 0x400&gt;;</div><div class='ctx'> 				reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='hunk'>@@ -3127,7 +3156,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mdss_dsi0_phy: dsi-phy@ae94400 {</div><div class='add'>+			mdss_dsi0_phy: phy@ae94400 {</div><div class='ctx'> 				compatible = "qcom,dsi-phy-7nm";</div><div class='ctx'> 				reg = &lt;0 0x0ae94400 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0x0ae94600 0 0x280&gt;,</div><div class='hunk'>@@ -3147,7 +3176,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mdss_dsi1: dsi@ae96000 {</div><div class='del'>-				compatible = "qcom,mdss-dsi-ctrl";</div><div class='add'>+				compatible = "qcom,sc8180x-dsi-ctrl",</div><div class='add'>+					     "qcom,mdss-dsi-ctrl";</div><div class='ctx'> 				reg = &lt;0 0x0ae96000 0 0x400&gt;;</div><div class='ctx'> 				reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='hunk'>@@ -3194,7 +3224,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			mdss_dsi1_phy: dsi-phy@ae96400 {</div><div class='add'>+			mdss_dsi1_phy: phy@ae96400 {</div><div class='ctx'> 				compatible = "qcom,dsi-phy-7nm";</div><div class='ctx'> 				reg = &lt;0 0x0ae96400 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0x0ae96600 0 0x280&gt;,</div><div class='hunk'>@@ -3226,16 +3256,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -3304,16 +3338,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX1_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK1_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK1_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL2_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL2_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK1_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL2_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_sec_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_sec_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_sec_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -3374,7 +3412,8 @@</div><div class='ctx'> 				reg = &lt;0 0xae9a000 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae9a200 0 0x200&gt;,</div><div class='ctx'> 				      &lt;0 0xae9a400 0 0x600&gt;,</div><div class='del'>-				      &lt;0 0xae9aa00 0 0x400&gt;;</div><div class='add'>+				      &lt;0 0xae9aa00 0 0x400&gt;,</div><div class='add'>+				      &lt;0 0xae9b000 0 0x400&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3410,6 +3449,13 @@</div><div class='ctx'> 							remote-endpoint = &lt;&amp;dpu_intf5_out&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_edp_out: endpoint {</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				edp_opp_table: opp-table {</div><div class='hunk'>@@ -3459,10 +3505,10 @@</div><div class='ctx'> 			compatible = "qcom,sc8180x-dispcc";</div><div class='ctx'> 			reg = &lt;0 0x0af00000 0 0x20000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_prim_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;edp_phy 0&gt;,</div><div class='hunk'>@@ -3518,7 +3564,7 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		aoss_qmp: power-controller@c300000 {</div><div class='add'>+		aoss_qmp: power-management@c300000 {</div><div class='ctx'> 			compatible = "qcom,sc8180x-aoss-qmp", "qcom,aoss-qmp";</div><div class='ctx'> 			reg = &lt;0x0 0x0c300000 0x0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 389 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='hunk'>@@ -3662,7 +3708,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_adsp: remoteproc@17300000 {</div><div class='hunk'>@@ -3701,6 +3747,7 @@</div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,	/* GICD */</div><div class='ctx'> 			      &lt;0x0 0x17a60000 0x0 0x100000&gt;;	/* GICR * 8 */</div><div class='hunk'>@@ -3790,7 +3837,7 @@</div><div class='ctx'> 					  &lt;WAKE_TCS    1&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 0&gt;;</div><div class='ctx'> 			label = "apps_rsc";</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -3868,7 +3915,7 @@</div><div class='ctx'> 			compatible = "qcom,sc8180x-lmh";</div><div class='ctx'> 			reg = &lt;0 0x18350800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='hunk'>@@ -3880,7 +3927,7 @@</div><div class='ctx'> 			compatible = "qcom,sc8180x-lmh";</div><div class='ctx'> 			reg = &lt;0 0x18358800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='hunk'>@@ -3889,7 +3936,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpufreq_hw: cpufreq@18323000 {</div><div class='del'>-			compatible = "qcom,cpufreq-hw";</div><div class='add'>+			compatible = "qcom,sc8180x-cpufreq-hw", "qcom,cpufreq-hw";</div><div class='ctx'> 			reg = &lt;0 0x18323000 0 0x1400&gt;, &lt;0 0x18325800 0 0x1400&gt;;</div><div class='ctx'> 			reg-names = "freq-domain0", "freq-domain1";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts<br/>index 6020582b0a59..490e970c54a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-crd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-crd.dts</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> 		i2c4 = &amp;i2c4;</div><div class='ctx'> 		i2c21 = &amp;i2c21;</div><div class='ctx'> 		serial0 = &amp;uart17;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	backlight: backlight {</div><div class='hunk'>@@ -36,6 +37,20 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kypd_vol_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "volume_up";</div><div class='add'>+			gpios = &lt;&amp;pmc8280_1_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmic-glink {</div><div class='ctx'> 		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";</div><div class='ctx'> </div><div class='hunk'>@@ -260,6 +275,70 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en&gt;, &lt;&amp;wlan_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 134 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='hunk'>@@ -269,6 +348,15 @@</div><div class='ctx'> </div><div class='ctx'> 		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='ctx'> </div><div class='add'>+		vreg_s10b: smps10 {</div><div class='add'>+			regulator-name = "vreg_s10b";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_s11b: smps11 {</div><div class='ctx'> 			regulator-name = "vreg_s11b";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1272000&gt;;</div><div class='hunk'>@@ -276,6 +364,13 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_s12b: smps12 {</div><div class='add'>+			regulator-name = "vreg_s12b";</div><div class='add'>+			regulator-min-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l3b: ldo3 {</div><div class='ctx'> 			regulator-name = "vreg_l3b";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -304,6 +399,13 @@</div><div class='ctx'> 		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='ctx'> 		qcom,pmic-id = "c";</div><div class='ctx'> </div><div class='add'>+		vreg_s1c: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1888000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1888000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l1c: ldo1 {</div><div class='ctx'> 			regulator-name = "vreg_l1c";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -393,6 +495,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -446,15 +560,10 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss0_dp3_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss0_dp3_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp3_phy {</div><div class='hunk'>@@ -583,6 +692,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "QC_8280XP_CRD";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmc8280c_lpg {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -630,6 +758,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_slpi {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/qcslpi8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdc2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdc2_default_state&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;sdc2_sleep_state&gt;;</div><div class='hunk'>@@ -643,6 +777,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart17 {</div><div class='ctx'> 	compatible = "qcom,geni-debug-uart";</div><div class='ctx'> </div><div class='hunk'>@@ -758,6 +912,14 @@</div><div class='ctx'> 		function = "normal";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	kypd_vol_up_n: kypd-vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;0&gt;; /* 3.3 V */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='ctx'> 		pins = "gpio2";</div><div class='ctx'> 		function = "normal";</div><div class='hunk'>@@ -788,6 +950,13 @@</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;74 6&gt;, &lt;83 4&gt;, &lt;125 2&gt;, &lt;128 2&gt;, &lt;154 7&gt;;</div><div class='ctx'> </div><div class='add'>+	bt_en: bt-en-state {</div><div class='add'>+		pins = "gpio133";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	edp_reg_en: edp-reg-en-state {</div><div class='ctx'> 		pins = "gpio25";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -981,6 +1150,34 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	uart2_default: uart2-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio121";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio122";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio124";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio123";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usb0_sbu_default: usb0-sbu-state {</div><div class='ctx'> 		oe-n-pins {</div><div class='ctx'> 			pins = "gpio101";</div><div class='hunk'>@@ -1030,4 +1227,11 @@</div><div class='ctx'> 			output-high;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio134";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso b/arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso<br/>new file mode 100644<br/>index 000000000000..25d1fa4bc205<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-el2.dtso</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * sc8280xp specific modifications required to boot in EL2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */</div><div class='add'>+&amp;gpu {</div><div class='add'>+	zap-shader {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * When running under QHEE, this IOMMU is controlled by the firmware,</div><div class='add'>+ * however when we take ownership of it in EL2, we need to configure</div><div class='add'>+ * it properly to use PCIe.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie2a {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x20000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2b {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x30000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3a {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x40000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3b {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x50000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x60000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_smmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts<br/>new file mode 100644<br/>index 000000000000..0374251d3329<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts</a></div><div class='hunk'>@@ -0,0 +1,1493 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022, Linaro Limited</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Tianyu Gao &lt;gty0622@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024, Xuecong Chen &lt;chenxuecong2009@outlook.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024, Pengyu Luo &lt;mitltlatltl@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sc8280xp.dtsi"</div><div class='add'>+#include "sc8280xp-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+	model = "Matebook E Go";</div><div class='add'>+	compatible = "huawei,gaokun3", "qcom,sc8280xp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c15 = &amp;i2c15;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@c6200000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0xc6200000 0x0 0x02400000&gt;;</div><div class='add'>+			width = &lt;1600&gt;;</div><div class='add'>+			height = &lt;2560&gt;;</div><div class='add'>+			stride = &lt;(1600 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9380-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 106 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;mode_pin_active&gt;, &lt;&amp;vol_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pmc8280_1_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-mode {</div><div class='add'>+			label = "Tablet Mode Switch";</div><div class='add'>+			gpios = &lt;&amp;tlmm 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_TABLET_MODE&gt;;</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3_SSD";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 135 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VPH_VCC3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wlan: regulator-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC_WLAN_3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmr735a_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hastings_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		gpu_mem: gpu-mem@8bf00000 {</div><div class='add'>+			reg = &lt;0 0x8bf00000 0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		skin-temp-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8280_adc_tm 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				skin_temp_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;55000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				skin_temp_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;58000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				skin-temp-crit {</div><div class='add'>+					temperature = &lt;73000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 164 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ucsi0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ucsi1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_default&gt;, &lt;&amp;wlan_en&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 134 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s10b: smps10 {</div><div class='add'>+			regulator-name = "vreg_s10b";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s11b: smps11 {</div><div class='add'>+			regulator-name = "vreg_s11b";</div><div class='add'>+			regulator-min-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s12b: smps12 {</div><div class='add'>+			regulator-name = "vreg_s12b";</div><div class='add'>+			regulator-min-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b";</div><div class='add'>+			regulator-min-microvolt = &lt;1904000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1904000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3b: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l10-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1c: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12c: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13c: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob: bob {</div><div class='add'>+			regulator-name = "vreg_bob";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2d: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4d: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6d: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6d";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7d: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8d: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9d: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10d: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dispcc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='add'>+		firmware-name = "qcom/sc8280xp/HUAWEI/gaokun3/qcdxkmsuc8280.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@4f {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 175 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c15 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c15_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	embedded-controller@38 {</div><div class='add'>+		compatible = "huawei,gaokun3-ec";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 107 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_0_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_1_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 141 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 139 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	sys-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_resin {</div><div class='add'>+	status = "okay";</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_rtc {</div><div class='add'>+	nvmem-cells = &lt;&amp;rtc_offset&gt;;</div><div class='add'>+	nvmem-cell-names = "offset";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_sdam_6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc_offset: rtc-offset@bc {</div><div class='add'>+		reg = &lt;0xbc 0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_vadc {</div><div class='add'>+	channel@144 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM1_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@145 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM2_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@146 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM3_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@147 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@344 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM1_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@345 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM2_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm6";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@346 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM3_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm7";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@347 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/HUAWEI/gaokun3/qcadsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_nsp0 {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/HUAWEI/gaokun3/qccdsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rxmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,sc8280xp-sndcard";</div><div class='add'>+	model = "SC8280XP-HUAWEI-MATEBOOKEGO";</div><div class='add'>+	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+			"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+			"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+			"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+			"AMIC2", "MIC BIAS2",</div><div class='add'>+			"VA DMIC0", "MIC BIAS1",</div><div class='add'>+			"VA DMIC1", "MIC BIAS1",</div><div class='add'>+			"VA DMIC2", "MIC BIAS3",</div><div class='add'>+			"VA DMIC0", "VA MIC BIAS1",</div><div class='add'>+			"VA DMIC1", "VA MIC BIAS1",</div><div class='add'>+			"VA DMIC2", "VA MIC BIAS3",</div><div class='add'>+			"TX SWR_ADC1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+	wcd-playback-dai-link {</div><div class='add'>+		link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;rxmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd-capture-dai-link {</div><div class='add'>+		link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 0&gt;, &lt;&amp;txmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wsa-dai-link {</div><div class='add'>+		link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;wsamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	va-dai-link {</div><div class='add'>+		link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;vamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	left_spkr: wsa8830-left@0,1 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_1_sd_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 178 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	right_spkr: wsa8830-right@0,2 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_2_sd_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_rx: wcd9380-rx@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_tx: wcd9380-tx@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;1 1 2 3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;txmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;ucsi0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;ucsi0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;ucsi1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l13c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp1_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;ucsi1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy0 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy1 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l8d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy2 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l8c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy3 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l8c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l8d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wsamacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board_clk {</div><div class='add'>+	clock-frequency = &lt;38400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PINCTRL */</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280_1_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vol_up_n: vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmr735a_gpios {</div><div class='add'>+	hastings_reg_en: hastings-reg-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+</div><div class='add'>+	gpio-reserved-ranges = &lt;70 2&gt;, &lt;74 6&gt;, &lt;83 4&gt;, &lt;125 2&gt;, &lt;128 2&gt;, &lt;154 4&gt;;</div><div class='add'>+</div><div class='add'>+	bt_default: bt-default-state {</div><div class='add'>+		hstp-bt-en-pins {</div><div class='add'>+			pins = "gpio133";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hstp-sw-ctrl-pins {</div><div class='add'>+			pins = "gpio132";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4_default: i2c4-default-state {</div><div class='add'>+		pins = "gpio171", "gpio172";</div><div class='add'>+		function = "qup4";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c15_default: i2c15-default-state {</div><div class='add'>+		pins = "gpio36", "gpio37";</div><div class='add'>+		function = "qup15";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mode_pin_active: mode-pin-state {</div><div class='add'>+		pins = "gpio26";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio135";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2a_default: pcie2a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio142";</div><div class='add'>+			function = "pcie2a_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio143";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+		       pins = "gpio145";</div><div class='add'>+		       function = "gpio";</div><div class='add'>+		       drive-strength = &lt;2&gt;;</div><div class='add'>+		       bias-pull-up;</div><div class='add'>+	       };</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio140";</div><div class='add'>+			function = "pcie4_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio141";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio139";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_1_sd_n_default: spkr-1-sd-n-default-state {</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio178";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_2_sd_n_default: spkr-2-sd-n-default-state {</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio179";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio175";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio99";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_default: uart2-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio121";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio122";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio124";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio123";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_sbu_default: usb0-sbu-state {</div><div class='add'>+		pins = "gpio164";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_sbu_default: usb1-sbu-state {</div><div class='add'>+		pins = "gpio47";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-default-state {</div><div class='add'>+		reset-pins {</div><div class='add'>+			pins = "gpio106";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio134";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts<br/>index 6a28cab97189..637430719e6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts</a></div><div class='hunk'>@@ -346,18 +346,18 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -400,6 +400,70 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_default&gt;, &lt;&amp;wlan_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 134 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='hunk'>@@ -426,7 +490,6 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1272000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1272000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_s12b: smps12 {</div><div class='hunk'>@@ -434,7 +497,6 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;984000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;984000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l1b: ldo1 {</div><div class='hunk'>@@ -633,7 +695,6 @@</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			ov5675_ep: endpoint {</div><div class='del'>-				clock-lanes = &lt;0&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2&gt;;</div><div class='ctx'> 				link-frequencies = /bits/ 64 &lt;450000000&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;csiphy0_lanes01_ep&gt;;</div><div class='hunk'>@@ -647,6 +708,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -665,7 +738,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 	remote-endpoint = &lt;&amp;usb_0_qmpphy_dp_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -674,7 +747,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp1_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 	remote-endpoint = &lt;&amp;usb_1_qmpphy_dp_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -700,15 +773,10 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss0_dp3_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss0_dp3_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss0_dp3_phy {</div><div class='hunk'>@@ -927,7 +995,17 @@</div><div class='ctx'> 		compatible = "pci17cb,1103";</div><div class='ctx'> 		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> </div><div class='del'>-		qcom,ath11k-calibration-variant = "LE_X13S";</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "LE_X13S";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1019,20 +1097,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmk8280_rtc {</div><div class='del'>-	nvmem-cells = &lt;&amp;rtc_offset&gt;;</div><div class='del'>-	nvmem-cell-names = "offset";</div><div class='add'>+	qcom,uefi-rtc-info;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmk8280_sdam_6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	rtc_offset: rtc-offset@bc {</div><div class='del'>-		reg = &lt;0xbc 0x4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pmk8280_vadc {</div><div class='ctx'> 	channel@144 {</div><div class='ctx'> 		reg = &lt;PM8350_ADC7_AMUX_THM1_100K_PU(1)&gt;;</div><div class='hunk'>@@ -1115,6 +1184,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_slpi {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcslpi8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rxmacro {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1131,9 +1206,6 @@</div><div class='ctx'> 		"VA DMIC0", "MIC BIAS1",</div><div class='ctx'> 		"VA DMIC1", "MIC BIAS1",</div><div class='ctx'> 		"VA DMIC2", "MIC BIAS3",</div><div class='del'>-		"VA DMIC0", "VA MIC BIAS1",</div><div class='del'>-		"VA DMIC1", "VA MIC BIAS1",</div><div class='del'>-		"VA DMIC2", "VA MIC BIAS3",</div><div class='ctx'> 		"TX SWR_ADC1", "ADC2_OUTPUT";</div><div class='ctx'> </div><div class='ctx'> 	wcd-playback-dai-link {</div><div class='hunk'>@@ -1258,20 +1330,16 @@</div><div class='ctx'> 	bluetooth {</div><div class='ctx'> 		compatible = "qcom,wcn6855-bt";</div><div class='ctx'> </div><div class='del'>-		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='del'>-		vddbtcxmx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='del'>-		vddrfacmn-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='del'>-		vddrfa0p8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='del'>-		vddrfa1p2-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='del'>-		vddrfa1p7-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='ctx'> </div><div class='ctx'> 		max-speed = &lt;3200000&gt;;</div><div class='del'>-</div><div class='del'>-		enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;bt_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1299,6 +1367,7 @@</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='ctx'> </div><div class='add'>+	mode-switch;</div><div class='ctx'> 	orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -1336,6 +1405,7 @@</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='ctx'> </div><div class='add'>+	mode-switch;</div><div class='ctx'> 	orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -1761,4 +1831,11 @@</div><div class='ctx'> 			bias-disable;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio134";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts<br/>new file mode 100644<br/>index 000000000000..aeed3ef152eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts</a></div><div class='hunk'>@@ -0,0 +1,1044 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Jérôme de Bretagne &lt;jerome.debretagne@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sc8280xp.dtsi"</div><div class='add'>+#include "sc8280xp-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microsoft Surface Pro 9 5G";</div><div class='add'>+	compatible = "microsoft,arcata", "qcom,sc8280xp";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart18;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9380-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 106 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Left-side top port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side bottom port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3_SSD";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 135 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VPH_VCC3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wlan: regulator-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC_WLAN_3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmr735a_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hastings_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B_WAN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		gpu_mem: gpu-mem@8bf00000 {</div><div class='add'>+			reg = &lt;0 0x8bf00000 0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		skin-temp-thermal {</div><div class='add'>+			polling-delay-passive = &lt;250&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8280_adc_tm 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				skin_temp_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;55000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				skin_temp_alert1: trip-point1 {</div><div class='add'>+					temperature = &lt;58000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				skin-temp-crit {</div><div class='add'>+					temperature = &lt;73000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;skin_temp_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;skin_temp_alert1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 164 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_con0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_con1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s10b: smps10 {</div><div class='add'>+			regulator-name = "vreg_s10b";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s11b: smps11 {</div><div class='add'>+			regulator-name = "vreg_s11b";</div><div class='add'>+			regulator-min-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s12b: smps12 {</div><div class='add'>+			regulator-name = "vreg_s12b";</div><div class='add'>+			regulator-min-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3b: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;	// FIXME: VDD_A_EDP_0_0P9</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l10-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1c: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12c: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13c: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob: bob {</div><div class='add'>+			regulator-name = "vreg_bob";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l3d: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4d: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6d: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6d";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7d: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9d: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dispcc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dispcc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='add'>+		firmware-name = "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcdxkmsuc8280.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_0_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_1_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 151 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wwan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 141 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 139 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "MS_SP9_5G";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_resin {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_rtc {</div><div class='add'>+	nvmem-cells = &lt;&amp;rtc_offset&gt;;</div><div class='add'>+	nvmem-cell-names = "offset";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_sdam_6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc_offset: rtc-offset@bc {</div><div class='add'>+		reg = &lt;0xbc 0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcadsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_nsp0 {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/MICROSOFT/SurfacePro9/qccdsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rxmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,sc8280xp-sndcard";</div><div class='add'>+	model = "SC8280XP-MICROSOFT-SURFACE-PRO-9-5G";</div><div class='add'>+	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+			"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+			"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+			"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+			"AMIC2", "MIC BIAS2",</div><div class='add'>+			"VA DMIC0", "MIC BIAS1",</div><div class='add'>+			"VA DMIC1", "MIC BIAS1",</div><div class='add'>+			"VA DMIC2", "MIC BIAS3",</div><div class='add'>+			"VA DMIC0", "VA MIC BIAS1",</div><div class='add'>+			"VA DMIC1", "VA MIC BIAS1",</div><div class='add'>+			"VA DMIC2", "VA MIC BIAS3",</div><div class='add'>+			"TX SWR_ADC1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+	wcd-playback-dai-link {</div><div class='add'>+		link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;rxmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd-capture-dai-link {</div><div class='add'>+		link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 0&gt;, &lt;&amp;txmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wsa-dai-link {</div><div class='add'>+		link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;swr0 0&gt;, &lt;&amp;wsamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	va-dai-link {</div><div class='add'>+		link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;vamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;1 1 2 3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;txmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vddbtcxmx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart18 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	embedded-controller {</div><div class='add'>+		compatible = "microsoft,surface-sam";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 85 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		current-speed = &lt;4000000&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ssam_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con0_hs&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con0_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con1_hs&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l13c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp1_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con1_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wsamacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board_clk {</div><div class='add'>+	clock-frequency = &lt;38400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PINCTRL */</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280_2_gpios {</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmr735a_gpios {</div><div class='add'>+	hastings_reg_en: hastings-reg-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_default: bt-default-state {</div><div class='add'>+		hstp-bt-en-pins {</div><div class='add'>+			pins = "gpio133";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hstp-sw-ctrl-pins {</div><div class='add'>+			pins = "gpio132";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio135";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2a_default: pcie2a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio142";</div><div class='add'>+			function = "pcie2a_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio143";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio145";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+	       };</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3a_default: pcie3a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio150";</div><div class='add'>+			function = "pcie3a_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio151";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio140";</div><div class='add'>+			function = "pcie4_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio141";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio139";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	ssam_state: ssam-state-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_default: uart2-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio121";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio122";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio124";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio123";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_sbu_default: usb0-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio101";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio164";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_sbu_default: usb1-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio47";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-default-state {</div><div class='add'>+		reset-pins {</div><div class='add'>+			pins = "gpio106";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts<br/>new file mode 100644<br/>index 000000000000..a40dccd70dfd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts</a></div><div class='hunk'>@@ -0,0 +1,1332 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022, Linaro Limited</div><div class='add'>+ * Copyright (c) 2023, Merck Hung &lt;merckhung@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2023, 2024 Jens Glathe &lt;jens.glathe@oldschoolsolutions.biz&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sc8280xp.dtsi"</div><div class='add'>+#include "sc8280xp-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Windows Dev Kit 2023";</div><div class='add'>+	compatible = "microsoft,blackrock", "qcom,sc8280xp";</div><div class='add'>+	chassis-type = "desktop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c21 = &amp;i2c21;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9380-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 106 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp3_connector: connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP-3";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		dp-pwr-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss0_dp2_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 166 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/* Left-side rear port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "source";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_0_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side front port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "source";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_con1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3_SSD";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 135 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VPH_VCC3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wlan: regulator-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC_WLAN_3R9";</div><div class='add'>+		regulator-min-microvolt = &lt;3900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3900000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmr735a_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hastings_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B_WAN";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		gpu_mem: gpu-mem@8bf00000 {</div><div class='add'>+			reg = &lt;0 0x8bf00000 0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 164 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_con0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1-sbu-mux {</div><div class='add'>+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_con1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_default&gt;, &lt;&amp;wlan_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 134 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 132 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-s11-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-s12-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s10b: smps10 {</div><div class='add'>+			regulator-name = "vreg_s10b";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s11b: smps11 {</div><div class='add'>+			regulator-name = "vreg_s11b";</div><div class='add'>+			regulator-min-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1272000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s12b: smps12 {</div><div class='add'>+			regulator-name = "vreg_s12b";</div><div class='add'>+			regulator-min-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;984000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3b: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_s1c&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l10-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1c: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6c: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7c: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8c: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12c: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13c: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob: bob {</div><div class='add'>+			regulator-name = "vreg_bob";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_s11b&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s12b&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2d: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+				 RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4d: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4d";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6d: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6d";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7d: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7d";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8d: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9d: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10d: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10d";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dispcc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='add'>+		firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcdxkmsuc8280.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_0_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;usb_1_qmpphy_dp_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp2 {</div><div class='add'>+	compatible = "qcom,sc8280xp-dp";</div><div class='add'>+</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp2_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;dp1_connector_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss0_dp2_phy {</div><div class='add'>+	compatible = "qcom,sc8280xp-dp-phy";</div><div class='add'>+</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6b&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 141 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 139 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wlan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "MS_Volterra";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280c_lpg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	sys-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sys-therm@7 {</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+		qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_pon_resin {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_rtc {</div><div class='add'>+	nvmem-cells = &lt;&amp;rtc_offset&gt;;</div><div class='add'>+	nvmem-cell-names = "offset";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_sdam_6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc_offset: rtc-offset@bc {</div><div class='add'>+		reg = &lt;0xbc 0x4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8280_vadc {</div><div class='add'>+	channel@144 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM1_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@145 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM2_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@146 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM3_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@147 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@344 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM1_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@345 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM2_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm6";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@346 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM3_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm7";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@347 {</div><div class='add'>+		reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(3)&gt;;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		label = "sys_therm8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcadsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_nsp0 {</div><div class='add'>+	firmware-name = "qcom/sc8280xp/microsoft/blackrock/qccdsp8280.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rxmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,sc8280xp-sndcard";</div><div class='add'>+	model = "microsoft/blackrock";</div><div class='add'>+</div><div class='add'>+	wcd-playback-dai-link {</div><div class='add'>+		link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;rxmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd-capture-dai-link {</div><div class='add'>+		link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 0&gt;, &lt;&amp;txmacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wsa-dai-link {</div><div class='add'>+		link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;swr0 0&gt;, &lt;&amp;wsamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	va-dai-link {</div><div class='add'>+		link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;vamacro 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_rx: wcd9380-rx@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcd_tx: wcd9380-tx@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;1 1 2 3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;txmacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con0_hs&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp0_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con0_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con1_hs&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l13c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+</div><div class='add'>+	orientation-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_dp_in {</div><div class='add'>+	remote-endpoint = &lt;&amp;mdss0_dp1_out&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_con1_ss&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb2_en_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	phys = &lt;&amp;usb_2_hsphy0&gt;, &lt;&amp;usb_2_qmpphy0&gt;;</div><div class='add'>+	phy-names = "usb2-0", "usb3-0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy0 {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l7d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_s10b&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wsamacro {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xo_board_clk {</div><div class='add'>+	clock-frequency = &lt;38400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PINCTRL */</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280_1_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_reg_en: edp-bl-reg-en-state {</div><div class='add'>+		pins = "gpio9";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280_2_gpios {</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8280c_gpios {</div><div class='add'>+	edp_bl_pwm: edp-bl-pwm-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "func1";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmr735a_gpios {</div><div class='add'>+	hastings_reg_en: hastings-reg-en-state {</div><div class='add'>+		pins = "gpio1";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_default: bt-default-state {</div><div class='add'>+		hstp-bt-en-pins {</div><div class='add'>+			pins = "gpio133";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hstp-sw-ctrl-pins {</div><div class='add'>+			pins = "gpio132";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio135";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2a_default: pcie2a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio142";</div><div class='add'>+			function = "pcie2a_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio143";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio145";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3a_default: pcie3a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio150";</div><div class='add'>+			function = "pcie3a_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio151";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio140";</div><div class='add'>+			function = "pcie4_clkreq";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio141";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio139";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2_default: uart2-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio121";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-bus-hold;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio122";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio124";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio123";</div><div class='add'>+			function = "qup2";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_sbu_default: usb0-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio101";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio164";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_sbu_default: usb1-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio47";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_en_state: usb2-en-state {</div><div class='add'>+		/* TS3USB221A USB2.0 mux select */</div><div class='add'>+		pins = "gpio24";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-default-state {</div><div class='add'>+		reset-pins {</div><div class='add'>+			pins = "gpio106";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio134";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi<br/>index 1e3babf2e40d..307df1d3dcd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi</a></div><div class='hunk'>@@ -32,6 +32,26 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pmc8280c_thermal: pmc8280c-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pmc8280c_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pm8280_2_thermal: pm8280-2-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;100&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -51,6 +71,26 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pmr735a_thermal: pmr735a-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pmr735a_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -181,6 +221,13 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		pmc8280c_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc8280c_gpios: gpio@8800 {</div><div class='ctx'> 			compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio";</div><div class='ctx'> 			reg = &lt;0x8800&gt;;</div><div class='hunk'>@@ -212,7 +259,7 @@</div><div class='ctx'> 		pm8280_2_temp_alarm: temp-alarm@a00 {</div><div class='ctx'> 			compatible = "qcom,spmi-temp-alarm";</div><div class='ctx'> 			reg = &lt;0xa00&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;spmi_bus 0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			io-channels = &lt;&amp;pmk8280_vadc PM8350_ADC7_DIE_TEMP(3)&gt;;</div><div class='ctx'> 			io-channel-names = "thermal";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;0&gt;;</div><div class='hunk'>@@ -235,6 +282,15 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		pmr735a_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;spmi_bus 0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			io-channels = &lt;&amp;pmk8280_vadc PMR735A_ADC7_DIE_TEMP&gt;;</div><div class='add'>+			io-channel-names = "thermal";</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmr735a_gpios: gpio@8800 {</div><div class='ctx'> 			compatible = "qcom,pmr735a-gpio", "qcom,spmi-gpio";</div><div class='ctx'> 			reg = &lt;0x8800&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi<br/>index 80a57aa22839..279e5e6beae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sc8280xp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sc8280xp.dtsi</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sc8280xp-camcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sc8280xp-lpasscc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,osm-l3.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sc8280xp.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='hunk'>@@ -44,7 +45,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78c";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -52,19 +53,19 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;981&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;549&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -72,7 +73,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78c";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -80,22 +81,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;981&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;549&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78c";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -103,22 +104,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;981&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;549&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78c";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -126,22 +127,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;981&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;549&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x1c";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -149,22 +150,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;590&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x1c";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -172,22 +173,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;590&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x1c";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -195,22 +196,22 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;590&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x1c";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -218,53 +219,53 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;590&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;epss_l3 MASTER_EPSS_L3_APPS &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -272,7 +273,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -282,7 +283,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -294,7 +295,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -593,57 +594,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -695,6 +696,11 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pil_slpi_mem: slpi-region@88c00000 {</div><div class='add'>+			reg = &lt;0 0x88c00000 0 0x1500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pil_nsp0_mem: cdsp0-region@8a100000 {</div><div class='ctx'> 			reg = &lt;0 0x8a100000 0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -783,6 +789,30 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	smp2p-slpi {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;481&gt;, &lt;430&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_SLPI</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_SLPI</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_slpi_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_slpi_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc@0 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -883,6 +913,32 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma2: dma-controller@800000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0 0x00800000 0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xb6 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qup2: geniqup@8c0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0 0x008c0000 0 0x2000&gt;;</div><div class='hunk'>@@ -910,6 +966,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -926,6 +988,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -942,6 +1010,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -958,6 +1032,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -988,6 +1068,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1004,6 +1090,30 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart18: serial@888000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0 0x00888000 0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;;</div><div class='add'>+				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart18_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1020,6 +1130,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1036,6 +1152,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1052,6 +1174,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1068,6 +1196,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1084,6 +1218,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1100,6 +1240,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1116,6 +1262,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1132,6 +1284,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1148,6 +1306,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1164,10 +1328,43 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma0: dma-controller@900000  {</div><div class='add'>+			compatible = "qcom,sc8280xp-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0 0x00900000 0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			dma-channels = &lt;13&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0x1fff&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x576 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qup0: geniqup@9c0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0 0x009c0000 0 0x6000&gt;;</div><div class='hunk'>@@ -1195,6 +1392,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 7 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 7 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1203,7 +1406,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00980000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1211,6 +1414,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1227,6 +1436,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1235,7 +1450,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00984000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1243,6 +1458,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1259,6 +1480,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1267,7 +1494,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00988000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1275,6 +1502,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1305,6 +1538,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1313,7 +1552,7 @@</div><div class='ctx'> 				reg = &lt;0 0x0098c000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1321,6 +1560,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1337,6 +1582,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1345,7 +1596,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00990000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1353,6 +1604,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1369,6 +1626,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1377,7 +1640,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00994000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1385,6 +1648,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1401,6 +1670,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1409,7 +1684,7 @@</div><div class='ctx'> 				reg = &lt;0 0x00998000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1417,6 +1692,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1433,6 +1714,12 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1441,7 +1728,7 @@</div><div class='ctx'> 				reg = &lt;0 0x0099c000 0 0x4000&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S7_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='hunk'>@@ -1449,10 +1736,42 @@</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 7 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 7 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpi_dma1: dma-controller@a00000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0 0x00a00000 0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xfff&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x96 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		qup1: geniqup@ac0000 {</div><div class='ctx'> 			compatible = "qcom,geni-se-qup";</div><div class='ctx'> 			reg = &lt;0 0x00ac0000 0 0x6000&gt;;</div><div class='hunk'>@@ -1480,6 +1799,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1496,6 +1821,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1512,6 +1843,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1528,6 +1865,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1544,6 +1887,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1560,6 +1909,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1576,6 +1931,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1592,6 +1953,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1608,6 +1975,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1624,6 +1997,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1640,6 +2019,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1656,6 +2041,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1672,6 +2063,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1688,6 +2085,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1704,6 +2107,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1720,6 +2129,12 @@</div><div class='ctx'> 				                &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 				                &lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1762,10 +2177,10 @@</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_4_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_4_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1875,10 +2290,10 @@</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_3B_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3B_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1986,10 +2401,10 @@</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_3A_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_3A_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2100,10 +2515,10 @@</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_2B_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2B_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2211,10 +2626,10 @@</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 GIC_SPI GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 GIC_SPI GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 GIC_SPI GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 GIC_SPI GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_2A_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2A_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2294,7 +2709,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-ufshc", "qcom,ufshc",</div><div class='ctx'> 				     "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0 0x01d84000 0 0x3000&gt;;</div><div class='hunk'>@@ -2360,7 +2775,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_card_hc: ufs@1da4000 {</div><div class='add'>+		ufs_card_hc: ufshc@1da4000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-ufshc", "qcom,ufshc",</div><div class='ctx'> 				     "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0 0x01da4000 0 0x3000&gt;;</div><div class='hunk'>@@ -2436,296 +2851,79 @@</div><div class='ctx'> 			reg = &lt;0x0 0x01fc0000 0x0 0x30000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpu: gpu@3d00000 {</div><div class='del'>-			compatible = "qcom,adreno-690.0", "qcom,adreno";</div><div class='del'>-</div><div class='del'>-			reg = &lt;0 0x03d00000 0 0x40000&gt;,</div><div class='del'>-			      &lt;0 0x03d9e000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x03d61000 0 0x800&gt;;</div><div class='del'>-			reg-names = "kgsl_3d0_reg_memory",</div><div class='del'>-				    "cx_mem",</div><div class='del'>-				    "cx_dbgc";</div><div class='del'>-			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			iommus = &lt;&amp;gpu_smmu 0 0xc00&gt;, &lt;&amp;gpu_smmu 1 0xc00&gt;;</div><div class='del'>-			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='del'>-			interconnects = &lt;&amp;gem_noc MASTER_GFX3D 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-			interconnect-names = "gfx-mem";</div><div class='del'>-			#cooling-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			gpu_opp_table: opp-table {</div><div class='del'>-				compatible = "operating-points-v2";</div><div class='del'>-</div><div class='del'>-				opp-270000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;451000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-410000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;410000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;1555000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-500000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;1555000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-547000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;547000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;1555000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-606000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;606000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;2736000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-640000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;640000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;2736000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-655000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;655000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;2736000&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-690000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;690000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;2736000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gmu: gmu@3d6a000 {</div><div class='del'>-			compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";</div><div class='del'>-			reg = &lt;0 0x03d6a000 0 0x34000&gt;,</div><div class='del'>-			      &lt;0 0x03de0000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x0b290000 0 0x10000&gt;;</div><div class='del'>-			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='del'>-			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "hfi", "gmu";</div><div class='del'>-			clocks = &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;;</div><div class='del'>-			clock-names = "gmu",</div><div class='del'>-				      "cxo",</div><div class='del'>-				      "axi",</div><div class='del'>-				      "memnoc",</div><div class='del'>-				      "ahb",</div><div class='del'>-				      "hub",</div><div class='del'>-				      "smmu_vote";</div><div class='del'>-			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;,</div><div class='del'>-					&lt;&amp;gpucc GPU_CC_GX_GDSC&gt;;</div><div class='del'>-			power-domain-names = "cx",</div><div class='del'>-					     "gx";</div><div class='del'>-			iommus = &lt;&amp;gpu_smmu 5 0xc00&gt;;</div><div class='del'>-			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-			gmu_opp_table: opp-table {</div><div class='del'>-				compatible = "operating-points-v2";</div><div class='del'>-</div><div class='del'>-				opp-200000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				opp-500000000 {</div><div class='del'>-					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='del'>-					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpucc: clock-controller@3d90000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-gpucc";</div><div class='del'>-			reg = &lt;0 0x03d90000 0 0x9000&gt;;</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='del'>-			clock-names = "bi_tcxo",</div><div class='del'>-				      "gcc_gpu_gpll0_clk_src",</div><div class='del'>-				      "gcc_gpu_gpll0_div_clk_src";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd SC8280XP_GFX&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			#reset-cells = &lt;1&gt;;</div><div class='del'>-			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpu_smmu: iommu@3da0000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu",</div><div class='del'>-				     "qcom,smmu-500", "arm,mmu-500";</div><div class='del'>-			reg = &lt;0 0x03da0000 0 0x20000&gt;;</div><div class='del'>-			#iommu-cells = &lt;2&gt;;</div><div class='del'>-			#global-interrupts = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gpucc GPU_CC_HUB_AON_CLK&gt;;</div><div class='del'>-			clock-names = "gcc_gpu_memnoc_gfx_clk",</div><div class='del'>-				      "gcc_gpu_snoc_dvm_gfx_clk",</div><div class='del'>-				      "gpu_cc_ahb_clk",</div><div class='del'>-				      "gpu_cc_hlos1_vote_gpu_smmu_clk",</div><div class='del'>-				      "gpu_cc_cx_gmu_clk",</div><div class='del'>-				      "gpu_cc_hub_cx_int_clk",</div><div class='del'>-				      "gpu_cc_hub_aon_clk";</div><div class='add'>+		remoteproc_slpi: remoteproc@2400000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-slpi-pas", "qcom,sm8350-slpi-pas";</div><div class='add'>+			reg = &lt;0 0x02400000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;;</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 9 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='ctx'> </div><div class='del'>-		usb_0_hsphy: phy@88e5000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='del'>-				     "qcom,usb-snps-hs-5nm-phy";</div><div class='del'>-			reg = &lt;0 0x088e5000 0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_2_hsphy0: phy@88e7000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='del'>-				     "qcom,usb-snps-hs-5nm-phy";</div><div class='del'>-			reg = &lt;0 0x088e7000 0 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB2_HS0_CLKREF_CLK&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS0_MP_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_2_hsphy1: phy@88e8000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='del'>-				     "qcom,usb-snps-hs-5nm-phy";</div><div class='del'>-			reg = &lt;0 0x088e8000 0 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB2_HS1_CLKREF_CLK&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS1_MP_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_2_hsphy2: phy@88e9000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='del'>-				     "qcom,usb-snps-hs-5nm-phy";</div><div class='del'>-			reg = &lt;0 0x088e9000 0 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB2_HS2_CLKREF_CLK&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS2_MP_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_2_hsphy3: phy@88ea000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='del'>-				     "qcom,usb-snps-hs-5nm-phy";</div><div class='del'>-			reg = &lt;0 0x088ea000 0 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB2_HS3_CLKREF_CLK&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS3_MP_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_2_qmpphy0: phy@88ef000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";</div><div class='del'>-			reg = &lt;0 0x088ef000 0 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB3_MP_PHY_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP0_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP_PHY_COM_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP_PHY_PIPE_0_CLK&gt;;</div><div class='del'>-			clock-names = "aux", "ref", "com_aux", "pipe";</div><div class='add'>+			clock-names = "xo";</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;gcc GCC_USB3_UNIPHY_MP0_BCR&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3UNIPHY_PHY_MP0_BCR&gt;;</div><div class='del'>-			reset-names = "phy", "phy_phy";</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SC8280XP_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd SC8280XP_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx", "lmx";</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+			memory-region = &lt;&amp;pil_slpi_mem&gt;;</div><div class='ctx'> </div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-output-names = "usb2_phy0_pipe_clk";</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> </div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_slpi_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		usb_2_qmpphy1: phy@88f1000 {</div><div class='del'>-			compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";</div><div class='del'>-			reg = &lt;0 0x088f1000 0 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB3_MP_PHY_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP1_CLKREF_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP_PHY_COM_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_MP_PHY_PIPE_1_CLK&gt;;</div><div class='del'>-			clock-names = "aux", "ref", "com_aux", "pipe";</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_SLPI</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_SLPI</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;gcc GCC_USB3_UNIPHY_MP1_BCR&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3UNIPHY_PHY_MP1_BCR&gt;;</div><div class='del'>-			reset-names = "phy", "phy_phy";</div><div class='add'>+				label = "slpi";</div><div class='add'>+				qcom,remote-pid = &lt;3&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "sdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-output-names = "usb2_phy1_pipe_clk";</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x0521 0x0&gt;;</div><div class='add'>+					};</div><div class='ctx'> </div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x0522 0x0&gt;;</div><div class='add'>+					};</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x0523 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_adsp: remoteproc@3000000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x03000000 0 0x100&gt;;</div><div class='add'>+			reg = &lt;0 0x03000000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -3148,6 +3346,180 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@3d00000 {</div><div class='add'>+			compatible = "qcom,adreno-690.0", "qcom,adreno";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x03d00000 0 0x40000&gt;,</div><div class='add'>+			      &lt;0 0x03d9e000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x03d61000 0 0x800&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory",</div><div class='add'>+				    "cx_mem",</div><div class='add'>+				    "cx_dbgc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;gpu_smmu 0 0xc00&gt;, &lt;&amp;gpu_smmu 1 0xc00&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_GFX3D 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			interconnect-names = "gfx-mem";</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-270000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;451000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-410000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;410000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1555000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-500000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1555000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-547000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;547000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1555000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-606000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;606000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2736000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-640000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;640000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2736000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-655000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;655000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2736000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-690000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;690000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2736000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmu: gmu@3d6a000 {</div><div class='add'>+			compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";</div><div class='add'>+			reg = &lt;0 0x03d6a000 0 0x34000&gt;,</div><div class='add'>+			      &lt;0 0x03de0000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x0b290000 0 0x10000&gt;;</div><div class='add'>+			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hfi", "gmu";</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;;</div><div class='add'>+			clock-names = "gmu",</div><div class='add'>+				      "cxo",</div><div class='add'>+				      "axi",</div><div class='add'>+				      "memnoc",</div><div class='add'>+				      "ahb",</div><div class='add'>+				      "hub",</div><div class='add'>+				      "smmu_vote";</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gpucc GPU_CC_GX_GDSC&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "gx";</div><div class='add'>+			iommus = &lt;&amp;gpu_smmu 5 0xc00&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			gmu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-200000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-500000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpucc: clock-controller@3d90000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-gpucc";</div><div class='add'>+			reg = &lt;0 0x03d90000 0 0x9000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+			clock-names = "bi_tcxo",</div><div class='add'>+				      "gcc_gpu_gpll0_clk_src",</div><div class='add'>+				      "gcc_gpu_gpll0_div_clk_src";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd SC8280XP_GFX&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_smmu: iommu@3da0000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu",</div><div class='add'>+				     "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0 0x03da0000 0 0x20000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 688 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_CX_INT_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_HUB_AON_CLK&gt;;</div><div class='add'>+			clock-names = "gcc_gpu_memnoc_gfx_clk",</div><div class='add'>+				      "gcc_gpu_snoc_dvm_gfx_clk",</div><div class='add'>+				      "gpu_cc_ahb_clk",</div><div class='add'>+				      "gpu_cc_hlos1_vote_gpu_smmu_clk",</div><div class='add'>+				      "gpu_cc_cx_gmu_clk",</div><div class='add'>+				      "gpu_cc_hub_cx_int_clk",</div><div class='add'>+				      "gpu_cc_hub_aon_clk";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CC_CX_GDSC&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sdc2: mmc@8804000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-sdhci", "qcom,sdhci-msm-v5";</div><div class='ctx'> 			reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='hunk'>@@ -3191,6 +3563,71 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_0_hsphy: phy@88e5000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-5nm-phy";</div><div class='add'>+			reg = &lt;0 0x088e5000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_hsphy0: phy@88e7000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-5nm-phy";</div><div class='add'>+			reg = &lt;0 0x088e7000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB2_HS0_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS0_MP_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_hsphy1: phy@88e8000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-5nm-phy";</div><div class='add'>+			reg = &lt;0 0x088e8000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB2_HS1_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS1_MP_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_hsphy2: phy@88e9000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-5nm-phy";</div><div class='add'>+			reg = &lt;0 0x088e9000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB2_HS2_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS2_MP_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_hsphy3: phy@88ea000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='add'>+				     "qcom,usb-snps-hs-5nm-phy";</div><div class='add'>+			reg = &lt;0 0x088ea000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB2_HS3_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_HS3_MP_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_0_qmpphy: phy@88eb000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-qmp-usb43dp-phy";</div><div class='ctx'> 			reg = &lt;0 0x088eb000 0 0x4000&gt;;</div><div class='hunk'>@@ -3238,6 +3675,54 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_2_qmpphy0: phy@88ef000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";</div><div class='add'>+			reg = &lt;0 0x088ef000 0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_MP_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP0_CLKREF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP_PHY_PIPE_0_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "ref", "com_aux", "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_UNIPHY_MP0_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3UNIPHY_PHY_MP0_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "phy_phy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "usb2_phy0_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2_qmpphy1: phy@88f1000 {</div><div class='add'>+			compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";</div><div class='add'>+			reg = &lt;0 0x088f1000 0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_MP_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP1_CLKREF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_MP_PHY_PIPE_1_CLK&gt;;</div><div class='add'>+			clock-names = "aux", "ref", "com_aux", "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_UNIPHY_MP1_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3UNIPHY_PHY_MP1_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "phy_phy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "usb2_phy1_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_1_hsphy: phy@8902000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-usb-hs-phy",</div><div class='ctx'> 				     "qcom,usb-snps-hs-5nm-phy";</div><div class='hunk'>@@ -3518,6 +4003,8 @@</div><div class='ctx'> 					    "usb2-2",</div><div class='ctx'> 					    "usb2-3";</div><div class='ctx'> 				dr_mode = "host";</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3575,6 +4062,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x820 0x0&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usb_0_hsphy&gt;, &lt;&amp;usb_0_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3652,6 +4141,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x860 0x0&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3882,26 +4373,26 @@</div><div class='ctx'> 				    "vfe3",</div><div class='ctx'> 				    "csid3";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 359 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 360 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 640 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 641 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 758 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 759 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 760 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 761 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 762 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 764 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "csid1_lite",</div><div class='ctx'> 					  "vfe_lite1",</div><div class='ctx'> 					  "csiphy3",</div><div class='hunk'>@@ -4117,7 +4608,7 @@</div><div class='ctx'> 			mdss0_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sc8280xp-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -4215,15 +4706,19 @@</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_0_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -4294,14 +4789,18 @@</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					      "ctrl_link_iface", "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -4371,10 +4870,12 @@</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					      "ctrl_link_iface", "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='ctx'> 				phys = &lt;&amp;mdss0_dp2_phy&gt;;</div><div class='hunk'>@@ -4382,8 +4883,11 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss0_dp2_phy 0&gt;, &lt;&amp;mdss0_dp2_phy 1&gt;;</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc0 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss0_dp2_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp2_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss0_dp2_phy 1&gt;;</div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss0_dp2_opp_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -4403,6 +4907,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp2_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -4475,6 +4982,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss0_dp3_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -4871,6 +5381,50 @@</div><div class='ctx'> 					bias-pull-down;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			qup_uart18_default: qup-uart18-default-state {</div><div class='add'>+				cts-pins {</div><div class='add'>+					pins = "gpio66";</div><div class='add'>+					function = "qup18";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rts-pins {</div><div class='add'>+					pins = "gpio67";</div><div class='add'>+					function = "qup18";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio68";</div><div class='add'>+					function = "qup18";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio69";</div><div class='add'>+					function = "qup18";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_smmu: iommu@14f80000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0 0x14f80000 0 0x80000&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 951 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 955 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 953 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq",</div><div class='add'>+					  "gerror",</div><div class='add'>+					  "cmdq-sync";</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "reserved"; /* Controlled by QHEE. */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apps_smmu: iommu@15000000 {</div><div class='hunk'>@@ -5008,6 +5562,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 891 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 890 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='hunk'>@@ -5111,7 +5666,7 @@</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;, &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;, &lt;CONTROL_TCS 1&gt;;</div><div class='ctx'> 			label = "apps_rsc";</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -5205,7 +5760,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_nsp0: remoteproc@1b300000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-nsp0-pas";</div><div class='del'>-			reg = &lt;0 0x1b300000 0 0x100&gt;;</div><div class='add'>+			reg = &lt;0 0x1b300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -5336,7 +5891,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_nsp1: remoteproc@21300000 {</div><div class='ctx'> 			compatible = "qcom,sc8280xp-nsp1-pas";</div><div class='del'>-			reg = &lt;0 0x21300000 0 0x100&gt;;</div><div class='add'>+			reg = &lt;0 0x21300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -5404,7 +5959,7 @@</div><div class='ctx'> 			mdss1_mdp: display-controller@22001000 {</div><div class='ctx'> 				compatible = "qcom,sc8280xp-dpu";</div><div class='ctx'> 				reg = &lt;0 0x22001000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x220b0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x220b0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -5501,10 +6056,12 @@</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					      "ctrl_link_iface", "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss1&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='ctx'> 				phys = &lt;&amp;mdss1_dp0_phy&gt;;</div><div class='hunk'>@@ -5512,8 +6069,11 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss1_dp0_phy 0&gt;, &lt;&amp;mdss1_dp0_phy 1&gt;;</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss1_dp0_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp0_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp0_phy 1&gt;;</div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss1_dp0_opp_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -5533,6 +6093,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss1_dp0_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -5573,10 +6136,12 @@</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					      "ctrl_link_iface", "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss1&gt;;</div><div class='ctx'> 				interrupts = &lt;13&gt;;</div><div class='ctx'> 				phys = &lt;&amp;mdss1_dp1_phy&gt;;</div><div class='hunk'>@@ -5584,8 +6149,11 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss1_dp1_phy 0&gt;, &lt;&amp;mdss1_dp1_phy 1&gt;;</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss1_dp1_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp1_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp1_phy 1&gt;;</div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss1_dp1_opp_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -5605,6 +6173,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss1_dp1_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -5645,10 +6216,12 @@</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface", "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					      "ctrl_link_iface", "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss1&gt;;</div><div class='ctx'> 				interrupts = &lt;14&gt;;</div><div class='ctx'> 				phys = &lt;&amp;mdss1_dp2_phy&gt;;</div><div class='hunk'>@@ -5656,8 +6229,11 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss1_dp2_phy 0&gt;, &lt;&amp;mdss1_dp2_phy 1&gt;;</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc1 DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss1_dp2_phy 0&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp2_phy 1&gt;,</div><div class='add'>+							 &lt;&amp;mdss1_dp2_phy 1&gt;;</div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss1_dp2_opp_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -5677,6 +6253,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss1_dp2_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -5749,6 +6328,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss1_dp3_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts<br/>index 60412281ab27..74cb29cb7f1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts</a></div><div class='hunk'>@@ -104,12 +104,20 @@</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vreg_l10a_1p8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1804000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1896000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1804000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;adreno_gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adreno_gpu_zap {</div><div class='add'>+	firmware-name = "qcom/sda660/a512_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;adsp_pil {</div><div class='ctx'> 	firmware-name = "qcom/sda660/adsp.mbn";</div><div class='ctx'> };</div><div class='hunk'>@@ -167,6 +175,7 @@</div><div class='ctx'> 	 * BAM DMA interconnects support is in place.</div><div class='ctx'> 	 */</div><div class='ctx'> 	/delete-property/ clocks;</div><div class='add'>+	/delete-property/ clock-names;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp1_uart2 {</div><div class='hunk'>@@ -179,6 +188,7 @@</div><div class='ctx'> 	 * BAM DMA interconnects support is in place.</div><div class='ctx'> 	 */</div><div class='ctx'> 	/delete-property/ clocks;</div><div class='add'>+	/delete-property/ clock-names;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp2_uart1 {</div><div class='hunk'>@@ -244,6 +254,11 @@</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;vreg_l7b_3p125&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;remoteproc_mss {</div><div class='add'>+	firmware-name = "qcom/sda660/mba.mbn", "qcom/sda660/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rpm_requests {</div><div class='ctx'> 	regulators-0 {</div><div class='ctx'> 		compatible = "qcom,rpm-pm660-regulators";</div><div class='hunk'>@@ -283,6 +298,11 @@</div><div class='ctx'> 			regulator-allow-set-load;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_l5a_0p8: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;848000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;848000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l6a_1p3: l6 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1304000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1368000&gt;;</div><div class='hunk'>@@ -481,3 +501,15 @@</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l10a_1p8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	vdd-0.8-cx-mx-supply = &lt;&amp;vreg_l5a_0p8&gt;;</div><div class='add'>+	vdd-1.8-xo-supply = &lt;&amp;vreg_l9a_1p8&gt;;</div><div class='add'>+	vdd-1.3-rfa-supply = &lt;&amp;vreg_l6a_1p3&gt;;</div><div class='add'>+	vdd-3.3-ch0-supply = &lt;&amp;vreg_l19a_3p3&gt;;</div><div class='add'>+	vdd-3.3-ch1-supply = &lt;&amp;vreg_l8b_3p3&gt;;</div><div class='add'>+</div><div class='add'>+	qcom,calibration-variant = "Inforce_IFC6560";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts b/arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts<br/>index 175befc02b22..735a21df8cc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm450-lenovo-tbx605f.dts</a></div><div class='hunk'>@@ -40,12 +40,24 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved-memory {</div><div class='del'>-		other_ext_region@0 {</div><div class='add'>+		other-ext-region@0 {</div><div class='ctx'> 			no-map;</div><div class='ctx'> 			reg = &lt;0x00 0x84500000 0x00 0x2300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	backlight: gpio-backlight {</div><div class='add'>+		compatible = "gpio-backlight";</div><div class='add'>+</div><div class='add'>+		gpios = &lt;&amp;tlmm 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		default-on;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;backlight_enable_active&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;backlight_enable_sleep&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		key-volume-up {</div><div class='hunk'>@@ -63,6 +75,49 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	vdda-supply = &lt;&amp;pm8953_s3&gt;;</div><div class='add'>+	vddio-supply = &lt;&amp;pm8953_l6&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "boe,tv101wum-ll2";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vsp-supply = &lt;&amp;lab&gt;;</div><div class='add'>+		vsn-supply = &lt;&amp;ibb&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 61 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;panel_reset_active&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;panel_reset_sleep&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_phy {</div><div class='add'>+	vcca-supply = &lt;&amp;pm8953_l3&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hsusb_phy {</div><div class='ctx'> 	vdd-supply = &lt;&amp;pm8953_l3&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;pm8953_l7&gt;;</div><div class='hunk'>@@ -90,6 +145,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ibb {</div><div class='add'>+	regulator-min-microvolt = &lt;4600000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+	qcom,discharge-resistor-kohms = &lt;32&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lab {</div><div class='add'>+	regulator-min-microvolt = &lt;4600000&gt;;</div><div class='add'>+	regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+	qcom,soft-start-us = &lt;800&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm8953_resin {</div><div class='ctx'> 	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -237,6 +304,36 @@</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;0 4&gt;, &lt;135 4&gt;;</div><div class='ctx'> </div><div class='add'>+	backlight_enable_active: backlight-enable-active-state {</div><div class='add'>+		pins = "gpio16";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight_enable_sleep: backlight-enable-sleep-state {</div><div class='add'>+		pins = "gpio16";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_reset_active: panel-reset-active-state {</div><div class='add'>+		pins = "gpio61";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_reset_sleep: panel-reset-sleep-state {</div><div class='add'>+		pins = "gpio61";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ts_int_active: ts-int-active-state {</div><div class='ctx'> 		pins = "gpio65";</div><div class='ctx'> 		function = "gpio";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi<br/>index a4b722e0fc1e..40522e237eac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi</a></div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;adsp_pil {</div><div class='del'>-	firmware-name = "qcom/sdm630/Sony/nile/adsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sdm630/Sony/nile/adsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;blsp_i2c1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi<br/>index c8da5cb8d04e..8b1a45a4e56e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm630.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm630.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm630.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (c) 2020, AngeloGioacchino Del Regno &lt;kholk11@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sdm660.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sdm660.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,mmcc-sdm660.h&gt;</div><div class='hunk'>@@ -49,170 +50,170 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@100 {</div><div class='add'>+		cpu0: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PERF_CPU_SLEEP_0</div><div class='del'>-						&amp;PERF_CPU_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;perf_cpu_sleep_0</div><div class='add'>+						&amp;perf_cpu_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_0</div><div class='add'>+						&amp;perf_cluster_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1126&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@101 {</div><div class='add'>+		cpu1: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PERF_CPU_SLEEP_0</div><div class='del'>-						&amp;PERF_CPU_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;perf_cpu_sleep_0</div><div class='add'>+						&amp;perf_cpu_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_0</div><div class='add'>+						&amp;perf_cluster_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1126&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@102 {</div><div class='add'>+		cpu2: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PERF_CPU_SLEEP_0</div><div class='del'>-						&amp;PERF_CPU_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;perf_cpu_sleep_0</div><div class='add'>+						&amp;perf_cpu_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_0</div><div class='add'>+						&amp;perf_cluster_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1126&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@103 {</div><div class='add'>+		cpu3: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PERF_CPU_SLEEP_0</div><div class='del'>-						&amp;PERF_CPU_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PERF_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;perf_cpu_sleep_0</div><div class='add'>+						&amp;perf_cpu_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_0</div><div class='add'>+						&amp;perf_cluster_sleep_1</div><div class='add'>+						&amp;perf_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1126&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@0 {</div><div class='add'>+		cpu4: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PWR_CPU_SLEEP_0</div><div class='del'>-						&amp;PWR_CPU_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;pwr_cpu_sleep_0</div><div class='add'>+						&amp;pwr_cpu_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_0</div><div class='add'>+						&amp;pwr_cluster_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@1 {</div><div class='add'>+		cpu5: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PWR_CPU_SLEEP_0</div><div class='del'>-						&amp;PWR_CPU_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;pwr_cpu_sleep_0</div><div class='add'>+						&amp;pwr_cpu_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_0</div><div class='add'>+						&amp;pwr_cluster_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@2 {</div><div class='add'>+		cpu6: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PWR_CPU_SLEEP_0</div><div class='del'>-						&amp;PWR_CPU_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;pwr_cpu_sleep_0</div><div class='add'>+						&amp;pwr_cpu_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_0</div><div class='add'>+						&amp;pwr_cluster_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@3 {</div><div class='add'>+		cpu7: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;PWR_CPU_SLEEP_0</div><div class='del'>-						&amp;PWR_CPU_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_0</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_1</div><div class='del'>-						&amp;PWR_CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;pwr_cpu_sleep_0</div><div class='add'>+						&amp;pwr_cpu_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_0</div><div class='add'>+						&amp;pwr_cluster_sleep_1</div><div class='add'>+						&amp;pwr_cluster_sleep_2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -220,7 +221,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			PWR_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			pwr_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "pwr-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000002&gt;;</div><div class='hunk'>@@ -229,7 +230,7 @@</div><div class='ctx'> 				min-residency-us = &lt;200&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PWR_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			pwr_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "pwr-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -239,7 +240,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PERF_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			perf_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "perf-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000002&gt;;</div><div class='hunk'>@@ -248,7 +249,7 @@</div><div class='ctx'> 				min-residency-us = &lt;200&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PERF_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			perf_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "perf-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -258,7 +259,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PWR_CLUSTER_SLEEP_0: cluster-sleep-0-0 {</div><div class='add'>+			pwr_cluster_sleep_0: cluster-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "pwr-cluster-dynamic-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F2&gt;;</div><div class='hunk'>@@ -268,7 +269,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PWR_CLUSTER_SLEEP_1: cluster-sleep-0-1 {</div><div class='add'>+			pwr_cluster_sleep_1: cluster-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "pwr-cluster-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F3&gt;;</div><div class='hunk'>@@ -278,7 +279,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PWR_CLUSTER_SLEEP_2: cluster-sleep-0-2 {</div><div class='add'>+			pwr_cluster_sleep_2: cluster-sleep-0-2 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "pwr-cluster-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F4&gt;;</div><div class='hunk'>@@ -288,7 +289,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PERF_CLUSTER_SLEEP_0: cluster-sleep-1-0 {</div><div class='add'>+			perf_cluster_sleep_0: cluster-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "perf-cluster-dynamic-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F2&gt;;</div><div class='hunk'>@@ -298,7 +299,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PERF_CLUSTER_SLEEP_1: cluster-sleep-1-1 {</div><div class='add'>+			perf_cluster_sleep_1: cluster-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "perf-cluster-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F3&gt;;</div><div class='hunk'>@@ -308,7 +309,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PERF_CLUSTER_SLEEP_2: cluster-sleep-1-2 {</div><div class='add'>+			perf_cluster_sleep_2: cluster-sleep-1-2 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "perf-cluster-retention";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x400000F4&gt;;</div><div class='hunk'>@@ -508,6 +509,12 @@</div><div class='ctx'> 			reg = &lt;0x0 0xfed00000 0x0 0xa00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mdata_mem: mpss-metadata {</div><div class='add'>+			alloc-ranges = &lt;0x0 0xa0000000 0x0 0x20000000&gt;;</div><div class='add'>+			size = &lt;0x0 0x4000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	smem: smem {</div><div class='hunk'>@@ -665,8 +672,6 @@</div><div class='ctx'> 				&lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		a2noc: interconnect@1704000 {</div><div class='hunk'>@@ -1057,7 +1062,7 @@</div><div class='ctx'> 					&lt;&amp;rpmpd SDM660_VDDMX&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mx";</div><div class='ctx'> </div><div class='del'>-			memory-region = &lt;&amp;mba_region&gt;, &lt;&amp;mpss_region&gt;;</div><div class='add'>+			memory-region = &lt;&amp;mba_region&gt;, &lt;&amp;mpss_region&gt;, &lt;&amp;mdata_mem&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -1150,6 +1155,10 @@</div><div class='ctx'> 					opp-supported-hw = &lt;0xff&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			adreno_gpu_zap: zap-shader {</div><div class='add'>+				memory-region = &lt;&amp;zap_shader_region&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		kgsl_smmu: iommu@5040000 {</div><div class='hunk'>@@ -1186,8 +1195,6 @@</div><div class='ctx'> 				&lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpucc: clock-controller@5065000 {</div><div class='hunk'>@@ -1203,7 +1210,6 @@</div><div class='ctx'> 			clock-names = "xo",</div><div class='ctx'> 				      "gcc_gpu_gpll0_clk",</div><div class='ctx'> 				      "gcc_gpu_gpll0_div_clk";</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		lpass_smmu: iommu@5100000 {</div><div class='hunk'>@@ -1233,8 +1239,6 @@</div><div class='ctx'> 				&lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				&lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sram@290000 {</div><div class='hunk'>@@ -1303,6 +1307,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;qusb2phy0&gt;, &lt;&amp;usb3_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='hunk'>@@ -1380,6 +1386,7 @@</div><div class='ctx'> 					&lt;&amp;xo_board&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo";</div><div class='ctx'> </div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC2_BCR&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;a2noc 3 &amp;a2noc 10&gt;,</div><div class='ctx'> 					&lt;&amp;gnoc 0 &amp;cnoc 28&gt;;</div><div class='hunk'>@@ -1434,6 +1441,8 @@</div><div class='ctx'> 				 &lt;&amp;gcc GCC_SDCC1_ICE_CORE_CLK&gt;;</div><div class='ctx'> 			clock-names = "iface", "core", "xo", "ice";</div><div class='ctx'> </div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC1_BCR&gt;;</div><div class='add'>+</div><div class='ctx'> 			interconnects = &lt;&amp;a2noc 2 &amp;a2noc 10&gt;,</div><div class='ctx'> 					&lt;&amp;gnoc 0 &amp;cnoc 27&gt;;</div><div class='ctx'> 			interconnect-names = "sdhc-ddr", "cpu-sdhc";</div><div class='hunk'>@@ -1508,6 +1517,8 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				/* This is the HS-only host */</div><div class='ctx'> 				maximum-speed = "high-speed";</div><div class='hunk'>@@ -1537,8 +1548,8 @@</div><div class='ctx'> 					&lt;&amp;sleep_clk&gt;,</div><div class='ctx'> 					&lt;&amp;gcc GCC_MMSS_GPLL0_CLK&gt;,</div><div class='ctx'> 					&lt;&amp;gcc GCC_MMSS_GPLL0_DIV_CLK&gt;,</div><div class='del'>-					&lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-					&lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='add'>+					&lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+					&lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 					&lt;0&gt;,</div><div class='ctx'> 					&lt;0&gt;,</div><div class='ctx'> 					&lt;0&gt;,</div><div class='hunk'>@@ -1660,8 +1671,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;mmcc MDSS_BYTE0_CLK&gt;,</div><div class='hunk'>@@ -2415,6 +2426,33 @@</div><div class='ctx'> 			redistributor-stride = &lt;0x0 0x20000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		wifi: wifi@18800000 {</div><div class='add'>+			compatible = "qcom,wcn3990-wifi";</div><div class='add'>+			reg = &lt;0x18800000 0x800000&gt;;</div><div class='add'>+			reg-names = "membase";</div><div class='add'>+			memory-region = &lt;&amp;wlan_msa_mem&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmcc RPM_SMD_RF_CLK1_PIN&gt;;</div><div class='add'>+			clock-names = "cxo_ref_clk_pin";</div><div class='add'>+			interrupts =</div><div class='add'>+				&lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			iommus = &lt;&amp;anoc2_smmu 0x1a00&gt;,</div><div class='add'>+				 &lt;&amp;anoc2_smmu 0x1a01&gt;;</div><div class='add'>+			qcom,snoc-host-cap-8bit-quirk;</div><div class='add'>+			qcom,no-msa-ready-indicator;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound: sound {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts<br/>index 2c1172aa97e4..55a45b528bd3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts</a></div><div class='hunk'>@@ -36,6 +36,14 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* Dummy regulator until PMI632 has LCDB VSP/VSN support */</div><div class='add'>+	lcdb_dummy: regulator-lcdb-dummy {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "lcdb_dummy";</div><div class='add'>+		regulator-min-microvolt = &lt;5500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -44,11 +52,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;hsusb_phy {</div><div class='add'>+&amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/msm8953/fairphone/fp3/a506_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsusb_phy {</div><div class='ctx'> 	vdd-supply = &lt;&amp;pm8953_l3&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;pm8953_l7&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;pm8953_l13&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c_3 {</div><div class='hunk'>@@ -81,12 +98,61 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;lpass {</div><div class='add'>+	firmware-name = "qcom/msm8953/fairphone/fp3/adsp.mbn";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pm8953_resin {</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	vdda-supply = &lt;&amp;pm8953_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "djn,98-03057-6598b-i";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 61 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		iovcc-supply = &lt;&amp;pm8953_l6&gt;;</div><div class='add'>+		vsn-supply = &lt;&amp;lcdb_dummy&gt;;</div><div class='add'>+		vsp-supply = &lt;&amp;lcdb_dummy&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;mdss_te_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_phy {</div><div class='add'>+	vcca-supply = &lt;&amp;pm8953_l3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mpss {</div><div class='add'>+	firmware-name = "qcom/msm8953/fairphone/fp3/mba.mbn",</div><div class='add'>+			"qcom/msm8953/fairphone/fp3/modem.mbn";</div><div class='add'>+	pll-supply = &lt;&amp;pm8953_l7&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8953_resin {</div><div class='ctx'> 	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmi632_lpg {</div><div class='hunk'>@@ -148,17 +214,19 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhc_1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pm8953_l8&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;pm8953_l5&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhc_2 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;pm8953_l11&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;pm8953_l12&gt;;</div><div class='ctx'> </div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;rpm_requests {</div><div class='hunk'>@@ -175,10 +243,12 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;984000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1240000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_s4: s4 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1036000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_s5: s5 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1036000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='hunk'>@@ -188,66 +258,82 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;975000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l2: l2 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;975000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1175000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l3: l3 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;925000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;925000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l5: l5 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l6: l6 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l7: l7 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l8: l8 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2900000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2900000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l9: l9 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l10: l10 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l11: l11 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2950000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l12: l12 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l13: l13 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;3125000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3125000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l16: l16 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l17: l17 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2850000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2850000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l19: l19 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1350000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l22: l22 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='ctx'> 		pm8953_l23: l23 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;975000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1225000&gt;;</div><div class='hunk'>@@ -261,6 +347,13 @@</div><div class='ctx'> 	 * 135-138: fingerprint reader (SPI)</div><div class='ctx'> 	 */</div><div class='ctx'> 	gpio-reserved-ranges = &lt;0 4&gt;, &lt;135 4&gt;;</div><div class='add'>+</div><div class='add'>+	mdss_te_default: mdss-te-default-state {</div><div class='add'>+		pins = "gpio24";</div><div class='add'>+		function = "mdp_vsync";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart_0 {</div><div class='hunk'>@@ -276,9 +369,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wcnss {</div><div class='add'>+	firmware-name = "qcom/msm8953/fairphone/fp3/wcnss.mbn";</div><div class='add'>+	vddpx-supply = &lt;&amp;pm8953_l5&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	vddpx-supply = &lt;&amp;pm8953_l5&gt;;</div><div class='add'>+&amp;wcnss_ctrl {</div><div class='add'>+	firmware-name = "qcom/msm8953/fairphone/fp3/WCNSS_qcom_wlan_nv.bin";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wcnss_iris {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi<br/>index 95b025ea260b..40d86d91b67f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm632.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm632.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm632.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm632.dtsi</a></div><div class='hunk'>@@ -14,10 +14,10 @@</div><div class='ctx'> </div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -42,40 +42,40 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * SDM632 uses Kryo 250 instead of Cortex A53</div><div class='del'>- * CPU0-3 are efficiency cores, CPU4-7 are performance cores</div><div class='add'>+ * cpu0-3 are efficiency cores, cpu4-7 are performance cores</div><div class='ctx'>  */</div><div class='del'>-&amp;CPU0 {</div><div class='add'>+&amp;cpu0 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='add'>+&amp;cpu1 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='add'>+&amp;cpu2 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='add'>+&amp;cpu3 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='add'>+&amp;cpu4 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1980&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='add'>+&amp;cpu5 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1980&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU6 {</div><div class='add'>+&amp;cpu6 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1980&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU7 {</div><div class='add'>+&amp;cpu7 {</div><div class='ctx'> 	compatible = "qcom,kryo250";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1980&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts<br/>index 7167f75bced3..a9926ad6c6f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts</a></div><div class='hunk'>@@ -107,6 +107,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l1b_0p925&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10a_1p8&gt;;</div><div class='ctx'> 	vdda-phy-dpdm-supply = &lt;&amp;vreg_l7b_3p125&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -404,6 +405,8 @@</div><div class='ctx'> &amp;sdhc_2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 54 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vreg_l5b_2p95&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vreg_l2b_2p95&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi<br/>index f89b27c99f40..ef4a563c0feb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm660.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm660.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm660.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm660.dtsi</a></div><div class='hunk'>@@ -85,49 +85,49 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU0 {</div><div class='add'>+&amp;cpu0 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='add'>+&amp;cpu1 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='add'>+&amp;cpu2 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='add'>+&amp;cpu3 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='add'>+&amp;cpu4 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;640&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='add'>+&amp;cpu5 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;640&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU6 {</div><div class='add'>+&amp;cpu6 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;640&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU7 {</div><div class='add'>+&amp;cpu7 {</div><div class='ctx'> 	compatible = "qcom,kryo260";</div><div class='ctx'> 	capacity-dmips-mhz = &lt;640&gt;;</div><div class='ctx'> 	/delete-property/ operating-points-v2;</div><div class='hunk'>@@ -170,8 +170,8 @@</div><div class='ctx'> </div><div class='ctx'> 		assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 					&lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-						&lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 		clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='ctx'> 				&lt;&amp;mmcc MDSS_BYTE1_CLK&gt;,</div><div class='hunk'>@@ -239,10 +239,10 @@</div><div class='ctx'> 			&lt;&amp;sleep_clk&gt;,</div><div class='ctx'> 			&lt;&amp;gcc GCC_MMSS_GPLL0_CLK&gt;,</div><div class='ctx'> 			&lt;&amp;gcc GCC_MMSS_GPLL0_DIV_CLK&gt;,</div><div class='del'>-			&lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-			&lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-			&lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='del'>-			&lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='add'>+			&lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+			&lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+			&lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+			&lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='ctx'> 			&lt;0&gt;,</div><div class='ctx'> 			&lt;0&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts b/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts<br/>index 176b0119fe6d..d01422844fbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='ctx'> #include "sdm670.dtsi"</div><div class='hunk'>@@ -32,6 +33,14 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases { };</div><div class='ctx'> </div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+</div><div class='add'>+		voltage-min-design-microvolt = &lt;3312000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4400000&gt;;</div><div class='add'>+		charge-full-design-microamp-hours = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> </div><div class='hunk'>@@ -49,20 +58,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	clocks {</div><div class='del'>-		sleep_clk: sleep-clk {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32764&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		xo_board: xo-board {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;38400000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	gpio-keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		autorepeat;</div><div class='hunk'>@@ -407,6 +402,15 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='add'>+		firmware-name = "qcom/sdm670/sargo/a615_zap.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c9 {</div><div class='ctx'> 	clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -482,6 +486,28 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm660_charger {</div><div class='add'>+	monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm660_rradc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm660l_flash {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-0 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+		led-sources = &lt;1&gt;, &lt;2&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1500000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm660l_gpios {</div><div class='ctx'> 	vol_up_pin: vol-up-state {</div><div class='ctx'> 		pins = "gpio7";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi<br/>index 187c6698835d..c33f3de779f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm670.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm670.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm670.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm670.dtsi</a></div><div class='hunk'>@@ -6,8 +6,11 @@</div><div class='ctx'>  * Copyright (c) 2022, Richard Acayan. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,camcc-sdm845.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sdm845.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,gpucc-sdm845.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -28,11 +31,25 @@</div><div class='ctx'> </div><div class='ctx'> 	chosen { };</div><div class='ctx'> </div><div class='add'>+	clocks {</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo_board: xo-board {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;38400000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -43,15 +60,15 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -59,7 +76,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -70,18 +87,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -92,18 +109,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -114,18 +131,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -136,18 +153,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -158,18 +175,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -180,18 +197,18 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo360";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -202,49 +219,49 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_AMPSS_M0 3 &amp;mem_noc SLAVE_EBI_CH0 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -252,7 +269,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -262,7 +279,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -274,7 +291,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -429,57 +446,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -617,6 +634,11 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			gpu_speed_bin: gpu_speed_bin@1a2 {</div><div class='add'>+				reg = &lt;0x1a2 0x2&gt;;</div><div class='add'>+				bits = &lt;5 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			qusb2_hstx_trim: hstx-trim@1eb {</div><div class='ctx'> 				reg = &lt;0x1eb 0x1&gt;;</div><div class='ctx'> 				bits = &lt;1 4&gt;;</div><div class='hunk'>@@ -1168,6 +1190,34 @@</div><div class='ctx'> 			gpio-ranges = &lt;&amp;tlmm 0 0 151&gt;;</div><div class='ctx'> 			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='ctx'> </div><div class='add'>+			cci0_default: cci0-default-state {</div><div class='add'>+				pins = "gpio17", "gpio18";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci0_sleep: cci0-sleep-state {</div><div class='add'>+				pins = "gpio17", "gpio18";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_default: cci1-default-state {</div><div class='add'>+				pins = "gpio19", "gpio20";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci1_sleep: cci1-sleep-state {</div><div class='add'>+				pins = "gpio19", "gpio20";</div><div class='add'>+				function = "cci_i2c";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			qup_i2c0_default: qup-i2c0-default-state {</div><div class='ctx'> 				pins = "gpio0", "gpio1";</div><div class='ctx'> 				function = "qup0";</div><div class='hunk'>@@ -1299,6 +1349,180 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@5000000 {</div><div class='add'>+			compatible = "qcom,adreno-615.0", "qcom,adreno";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x05000000 0 0x40000&gt;, &lt;0 0x0509e000 0 0x10&gt;;</div><div class='add'>+			reg-names = "kgsl_3d0_reg_memory", "cx_mem";</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Look ma, no clocks! The GPU clocks and power are</div><div class='add'>+			 * controlled entirely by the GMU</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 0&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mem_noc MASTER_GRAPHICS_3D 0 &amp;mem_noc SLAVE_EBI_CH0 0&gt;;</div><div class='add'>+			interconnect-names = "gfx-mem";</div><div class='add'>+</div><div class='add'>+			nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='add'>+			nvmem-cell-names = "speed_bin";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gpu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-780000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;780000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-750000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;750000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-700000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-650000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;650000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xc&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-565000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;565000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xc&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-504000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;504000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-430000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;430000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7216000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-355000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;355000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6220000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-267000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;267000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;4068000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-180000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;180000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1804000&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adreno_smmu: iommu@5040000 {</div><div class='add'>+			compatible = "qcom,sdm670-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";</div><div class='add'>+			reg = &lt;0 0x05040000 0 0x10000&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			#global-interrupts = &lt;2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 364 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 365 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 366 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 367 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 368 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 369 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 370 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 371 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_CFG_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "bus", "iface";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmu: gmu@506a000 {</div><div class='add'>+			compatible = "qcom,adreno-gmu-615.0", "qcom,adreno-gmu";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x0506a000 0 0x30000&gt;,</div><div class='add'>+			      &lt;0 0x0b280000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x0b480000 0 0x10000&gt;;</div><div class='add'>+			reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hfi", "gmu";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gpucc GPU_CC_CX_GMU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gpucc GPU_CC_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_GPU_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;;</div><div class='add'>+			clock-names = "gmu", "cxo", "axi", "memnoc";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gpucc GPU_CX_GDSC&gt;,</div><div class='add'>+					&lt;&amp;gpucc GPU_GX_GDSC&gt;;</div><div class='add'>+			power-domain-names = "cx", "gx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;adreno_smmu 5&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			gmu_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-200000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpucc: clock-controller@5090000 {</div><div class='add'>+			compatible = "qcom,sdm845-gpucc";</div><div class='add'>+			reg = &lt;0 0x05090000 0 0x9000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+			clock-names = "bi_tcxo",</div><div class='add'>+				      "gcc_gpu_gpll0_clk_src",</div><div class='add'>+				      "gcc_gpu_gpll0_div_clk_src";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_1_hsphy: phy@88e2000 {</div><div class='ctx'> 			compatible = "qcom,sdm670-qusb2-phy", "qcom,qusb2-v2-phy";</div><div class='ctx'> 			reg = &lt;0 0x088e2000 0 0x400&gt;;</div><div class='hunk'>@@ -1400,6 +1624,184 @@</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cci: cci@ac4a000 {</div><div class='add'>+			compatible = "qcom,sdm670-cci", "qcom,msm8996-cci";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x0ac4a000 0 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 460 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			power-domains = &lt;&amp;camcc TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_SOC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CCI_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "soc_ahb",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cci";</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default", "sleep";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cci0_default &amp;cci1_default&gt;;</div><div class='add'>+			pinctrl-1 = &lt;&amp;cci0_sleep &amp;cci1_sleep&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			cci_i2c0: i2c-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cci_i2c1: i2c-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				clock-frequency = &lt;1000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camss: isp@acb3000 {</div><div class='add'>+			compatible = "qcom,sdm670-camss";</div><div class='add'>+			reg = &lt;0 0x0acb3000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0acba000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0acc8000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0ac65000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0ac66000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0ac67000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x0acaf000 0 0x4000&gt;,</div><div class='add'>+			      &lt;0 0x0acb6000 0 0x4000&gt;,</div><div class='add'>+			      &lt;0 0x0acc4000 0 0x4000&gt;;</div><div class='add'>+			reg-names = "csid0",</div><div class='add'>+				    "csid1",</div><div class='add'>+				    "csid2",</div><div class='add'>+				    "csiphy0",</div><div class='add'>+				    "csiphy1",</div><div class='add'>+				    "csiphy2",</div><div class='add'>+				    "vfe0",</div><div class='add'>+				    "vfe1",</div><div class='add'>+				    "vfe_lite";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "csid0",</div><div class='add'>+					  "csid1",</div><div class='add'>+					  "csid2",</div><div class='add'>+					  "csiphy0",</div><div class='add'>+					  "csiphy1",</div><div class='add'>+					  "csiphy2",</div><div class='add'>+					  "vfe0",</div><div class='add'>+					  "vfe1",</div><div class='add'>+					  "vfe_lite";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI2PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_SOC_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CPHY_RX_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "csi0",</div><div class='add'>+				      "csi1",</div><div class='add'>+				      "csi2",</div><div class='add'>+				      "csiphy0",</div><div class='add'>+				      "csiphy0_timer",</div><div class='add'>+				      "csiphy1",</div><div class='add'>+				      "csiphy1_timer",</div><div class='add'>+				      "csiphy2",</div><div class='add'>+				      "csiphy2_timer",</div><div class='add'>+				      "gcc_camera_ahb",</div><div class='add'>+				      "gcc_camera_axi",</div><div class='add'>+				      "soc_ahb",</div><div class='add'>+				      "vfe0",</div><div class='add'>+				      "vfe0_axi",</div><div class='add'>+				      "vfe0_cphy_rx",</div><div class='add'>+				      "vfe1",</div><div class='add'>+				      "vfe1_axi",</div><div class='add'>+				      "vfe1_cphy_rx",</div><div class='add'>+				      "vfe_lite",</div><div class='add'>+				      "vfe_lite_cphy_rx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x808 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x810 0x8&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0xc08 0x0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0xc10 0x8&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc IFE_0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc IFE_1_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc TITAN_TOP_GDSC&gt;;</div><div class='add'>+			power-domain-names = "ife0",</div><div class='add'>+					     "ife1",</div><div class='add'>+					     "top";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					camss_endpoint0: endpoint {</div><div class='add'>+						status = "disabled";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					camss_endpoint1: endpoint {</div><div class='add'>+						status = "disabled";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					camss_endpoint2: endpoint {</div><div class='add'>+						status = "disabled";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camcc: clock-controller@ad00000 {</div><div class='add'>+			compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc";</div><div class='add'>+			reg = &lt;0 0x0ad00000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "bi_tcxo";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mdss: display-subsystem@ae00000 {</div><div class='ctx'> 			compatible = "qcom,sdm670-mdss";</div><div class='ctx'> 			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='hunk'>@@ -1431,7 +1833,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sdm670-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_AXI_CLK&gt;,</div><div class='hunk'>@@ -1516,8 +1918,8 @@</div><div class='ctx'> 					      "bus";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SDM670_CX&gt;;</div><div class='hunk'>@@ -1590,7 +1992,8 @@</div><div class='ctx'> 					      "bus";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SDM670_CX&gt;;</div><div class='hunk'>@@ -1647,10 +2050,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -1737,6 +2140,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gladiator_noc: interconnect@17900000 {</div><div class='hunk'>@@ -1762,7 +2166,7 @@</div><div class='ctx'> 					  &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts b/arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts<br/>deleted file mode 100644<br/>index bd7c25bb8d35..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,238 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Google Cheza board device tree source</div><div class='del'>- *</div><div class='del'>- * Copyright 2018 Google LLC.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include "sdm845-cheza.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Cheza (rev1)";</div><div class='del'>-	compatible = "google,cheza-rev1", "qcom,sdm845";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * NOTE: Technically pp3500_a is not the exact same signal as</div><div class='del'>-	 * pp3500_a_vbob (there's a load switch between them and the EC can</div><div class='del'>-	 * control pp3500_a via "en_pp3300_a"), but from the AP's point of</div><div class='del'>-	 * view they are the same.</div><div class='del'>-	 */</div><div class='del'>-	pp3500_a:</div><div class='del'>-	pp3500_a_vbob: pp3500-a-vbob-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vreg_bob";</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Comes on automatically when pp5000_ldo comes on, which</div><div class='del'>-		 * comes on automatically when ppvar_sys comes on</div><div class='del'>-		 */</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pp3300_dx_edp: pp3300-dx-edp-regulator {</div><div class='del'>-		/* Yes, it's really 3.5 despite the name of the signal */</div><div class='del'>-		regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;pp3500_a&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * L19 and L28 technically go to 3.3V, but most boards have old AOP firmware</div><div class='del'>- * that limits them to 3.0, and trying to run at 3.3V with that old firmware</div><div class='del'>- * prevents the system from booting.</div><div class='del'>- */</div><div class='del'>-&amp;src_pp3000_l19a {</div><div class='del'>-	regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_pp3300_l22a {</div><div class='del'>-	/delete-property/regulator-boot-on;</div><div class='del'>-	/delete-property/regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_pp3300_l28a {</div><div class='del'>-	regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_vreg_bob {</div><div class='del'>-	regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-	vin-supply = &lt;&amp;pp3500_a_vbob&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NON-REGULATOR OVERRIDES</div><div class='del'>- * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* PINCTRL - board-specific pinctrl */</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	gpio-line-names = "AP_SPI_FP_MISO",</div><div class='del'>-			  "AP_SPI_FP_MOSI",</div><div class='del'>-			  "AP_SPI_FP_CLK",</div><div class='del'>-			  "AP_SPI_FP_CS_L",</div><div class='del'>-			  "UART_AP_TX_DBG_RX",</div><div class='del'>-			  "UART_DBG_TX_AP_RX",</div><div class='del'>-			  "",</div><div class='del'>-			  "FP_RST_L",</div><div class='del'>-			  "FCAM_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "EDP_BRIJ_IRQ",</div><div class='del'>-			  "EC_IN_RW_ODL",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_MCLK",</div><div class='del'>-			  "FCAM_MCLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_EN",</div><div class='del'>-			  "CCI0_SDA",</div><div class='del'>-			  "CCI0_SCL",</div><div class='del'>-			  "CCI1_SDA",</div><div class='del'>-			  "CCI1_SCL",</div><div class='del'>-			  "FCAM_RST_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "PEN_RST_L",</div><div class='del'>-			  "PEN_IRQ_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_VSYNC",</div><div class='del'>-			  "ESIM_MISO",</div><div class='del'>-			  "ESIM_MOSI",</div><div class='del'>-			  "ESIM_CLK",</div><div class='del'>-			  "ESIM_CS_L",</div><div class='del'>-			  "AP_PEN_1V8_SDA",</div><div class='del'>-			  "AP_PEN_1V8_SCL",</div><div class='del'>-			  "AP_TS_I2C_SDA",</div><div class='del'>-			  "AP_TS_I2C_SCL",</div><div class='del'>-			  "RCAM_RST_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EDP_BKLTEN",</div><div class='del'>-			  "AP_BRD_ID1",</div><div class='del'>-			  "BOOT_CONFIG_4",</div><div class='del'>-			  "AMP_IRQ_L",</div><div class='del'>-			  "EDP_BRIJ_I2C_SDA",</div><div class='del'>-			  "EDP_BRIJ_I2C_SCL",</div><div class='del'>-			  "EN_PP3300_DX_EDP",</div><div class='del'>-			  "SD_CD_ODL",</div><div class='del'>-			  "BT_UART_RTS",</div><div class='del'>-			  "BT_UART_CTS",</div><div class='del'>-			  "BT_UART_RXD",</div><div class='del'>-			  "BT_UART_TXD",</div><div class='del'>-			  "AMP_I2C_SDA",</div><div class='del'>-			  "AMP_I2C_SCL",</div><div class='del'>-			  "AP_BRD_ID3",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EC_SPI_CLK",</div><div class='del'>-			  "AP_EC_SPI_CS_L",</div><div class='del'>-			  "AP_EC_SPI_MISO",</div><div class='del'>-			  "AP_EC_SPI_MOSI",</div><div class='del'>-			  "FORCED_USB_BOOT",</div><div class='del'>-			  "AMP_BCLK",</div><div class='del'>-			  "AMP_LRCLK",</div><div class='del'>-			  "AMP_DOUT",</div><div class='del'>-			  "AMP_DIN",</div><div class='del'>-			  "AP_BRD_ID2",</div><div class='del'>-			  "PEN_PDCT_L",</div><div class='del'>-			  "HP_MCLK",</div><div class='del'>-			  "HP_BCLK",</div><div class='del'>-			  "HP_LRCLK",</div><div class='del'>-			  "HP_DOUT",</div><div class='del'>-			  "HP_DIN",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "BT_SLIMBUS_DATA",</div><div class='del'>-			  "BT_SLIMBUS_CLK",</div><div class='del'>-			  "AMP_RESET_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "FCAM_VSYNC",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID1",</div><div class='del'>-			  "EC_WOV_BCLK",</div><div class='del'>-			  "EC_WOV_LRCLK",</div><div class='del'>-			  "EC_WOV_DOUT",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_H1_SPI_MISO",</div><div class='del'>-			  "AP_H1_SPI_MOSI",</div><div class='del'>-			  "AP_H1_SPI_CLK",</div><div class='del'>-			  "AP_H1_SPI_CS_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CS0_L",</div><div class='del'>-			  "AP_SPI_MOSI",</div><div class='del'>-			  "AP_SPI_MISO",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RFFE6_CLK",</div><div class='del'>-			  "RFFE6_DATA",</div><div class='del'>-			  "BOOT_CONFIG_1",</div><div class='del'>-			  "BOOT_CONFIG_2",</div><div class='del'>-			  "BOOT_CONFIG_0",</div><div class='del'>-			  "EDP_BRIJ_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "USB_HS_TX_EN",</div><div class='del'>-			  "UIM2_DATA",</div><div class='del'>-			  "UIM2_CLK",</div><div class='del'>-			  "UIM2_RST",</div><div class='del'>-			  "UIM2_PRESENT",</div><div class='del'>-			  "UIM1_DATA",</div><div class='del'>-			  "UIM1_CLK",</div><div class='del'>-			  "UIM1_RST",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID2",</div><div class='del'>-			  "SDM_GRFC_8",</div><div class='del'>-			  "SDM_GRFC_9",</div><div class='del'>-			  "AP_RST_REQ",</div><div class='del'>-			  "HP_IRQ",</div><div class='del'>-			  "TS_RESET_L",</div><div class='del'>-			  "PEN_EJECT_ODL",</div><div class='del'>-			  "HUB_RST_L",</div><div class='del'>-			  "FP_TO_AP_IRQ",</div><div class='del'>-			  "AP_EC_INT_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "TS_INT_L",</div><div class='del'>-			  "AP_SUSPEND_L",</div><div class='del'>-			  "SDM_GRFC_3",</div><div class='del'>-			  "",</div><div class='del'>-			  "H1_AP_INT_ODL",</div><div class='del'>-			  "QLINK_REQ",</div><div class='del'>-			  "QLINK_EN",</div><div class='del'>-			  "SDM_GRFC_2",</div><div class='del'>-			  "BOOT_CONFIG_3",</div><div class='del'>-			  "WMSS_RESET_L",</div><div class='del'>-			  "SDM_GRFC_0",</div><div class='del'>-			  "SDM_GRFC_1",</div><div class='del'>-			  "RFFE3_DATA",</div><div class='del'>-			  "RFFE3_CLK",</div><div class='del'>-			  "RFFE4_DATA",</div><div class='del'>-			  "RFFE4_CLK",</div><div class='del'>-			  "RFFE5_DATA",</div><div class='del'>-			  "RFFE5_CLK",</div><div class='del'>-			  "GNSS_EN",</div><div class='del'>-			  "WCI2_LTE_COEX_RXD",</div><div class='del'>-			  "WCI2_LTE_COEX_TXD",</div><div class='del'>-			  "AP_RAM_ID1",</div><div class='del'>-			  "AP_RAM_ID2",</div><div class='del'>-			  "RFFE1_DATA",</div><div class='del'>-			  "RFFE1_CLK";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts b/arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts<br/>deleted file mode 100644<br/>index 2b7230594ecb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,238 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Google Cheza board device tree source</div><div class='del'>- *</div><div class='del'>- * Copyright 2018 Google LLC.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include "sdm845-cheza.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Cheza (rev2)";</div><div class='del'>-	compatible = "google,cheza-rev2", "qcom,sdm845";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * NOTE: Technically pp3500_a is not the exact same signal as</div><div class='del'>-	 * pp3500_a_vbob (there's a load switch between them and the EC can</div><div class='del'>-	 * control pp3500_a via "en_pp3300_a"), but from the AP's point of</div><div class='del'>-	 * view they are the same.</div><div class='del'>-	 */</div><div class='del'>-	pp3500_a:</div><div class='del'>-	pp3500_a_vbob: pp3500-a-vbob-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vreg_bob";</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Comes on automatically when pp5000_ldo comes on, which</div><div class='del'>-		 * comes on automatically when ppvar_sys comes on</div><div class='del'>-		 */</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pp3300_dx_edp: pp3300-dx-edp-regulator {</div><div class='del'>-		/* Yes, it's really 3.5 despite the name of the signal */</div><div class='del'>-		regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;pp3500_a&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * L19 and L28 technically go to 3.3V, but most boards have old AOP firmware</div><div class='del'>- * that limits them to 3.0, and trying to run at 3.3V with that old firmware</div><div class='del'>- * prevents the system from booting.</div><div class='del'>- */</div><div class='del'>-&amp;src_pp3000_l19a {</div><div class='del'>-	regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_pp3300_l22a {</div><div class='del'>-	/delete-property/regulator-boot-on;</div><div class='del'>-	/delete-property/regulator-always-on;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_pp3300_l28a {</div><div class='del'>-	regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;src_vreg_bob {</div><div class='del'>-	regulator-min-microvolt = &lt;3500000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;3500000&gt;;</div><div class='del'>-	vin-supply = &lt;&amp;pp3500_a_vbob&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NON-REGULATOR OVERRIDES</div><div class='del'>- * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* PINCTRL - board-specific pinctrl */</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	gpio-line-names = "AP_SPI_FP_MISO",</div><div class='del'>-			  "AP_SPI_FP_MOSI",</div><div class='del'>-			  "AP_SPI_FP_CLK",</div><div class='del'>-			  "AP_SPI_FP_CS_L",</div><div class='del'>-			  "UART_AP_TX_DBG_RX",</div><div class='del'>-			  "UART_DBG_TX_AP_RX",</div><div class='del'>-			  "BRIJ_SUSPEND",</div><div class='del'>-			  "FP_RST_L",</div><div class='del'>-			  "FCAM_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "EDP_BRIJ_IRQ",</div><div class='del'>-			  "EC_IN_RW_ODL",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_MCLK",</div><div class='del'>-			  "FCAM_MCLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_EN",</div><div class='del'>-			  "CCI0_SDA",</div><div class='del'>-			  "CCI0_SCL",</div><div class='del'>-			  "CCI1_SDA",</div><div class='del'>-			  "CCI1_SCL",</div><div class='del'>-			  "FCAM_RST_L",</div><div class='del'>-			  "FPMCU_BOOT0",</div><div class='del'>-			  "PEN_RST_L",</div><div class='del'>-			  "PEN_IRQ_L",</div><div class='del'>-			  "FPMCU_SEL_OD",</div><div class='del'>-			  "RCAM_VSYNC",</div><div class='del'>-			  "ESIM_MISO",</div><div class='del'>-			  "ESIM_MOSI",</div><div class='del'>-			  "ESIM_CLK",</div><div class='del'>-			  "ESIM_CS_L",</div><div class='del'>-			  "AP_PEN_1V8_SDA",</div><div class='del'>-			  "AP_PEN_1V8_SCL",</div><div class='del'>-			  "AP_TS_I2C_SDA",</div><div class='del'>-			  "AP_TS_I2C_SCL",</div><div class='del'>-			  "RCAM_RST_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EDP_BKLTEN",</div><div class='del'>-			  "AP_BRD_ID1",</div><div class='del'>-			  "BOOT_CONFIG_4",</div><div class='del'>-			  "AMP_IRQ_L",</div><div class='del'>-			  "EDP_BRIJ_I2C_SDA",</div><div class='del'>-			  "EDP_BRIJ_I2C_SCL",</div><div class='del'>-			  "EN_PP3300_DX_EDP",</div><div class='del'>-			  "SD_CD_ODL",</div><div class='del'>-			  "BT_UART_RTS",</div><div class='del'>-			  "BT_UART_CTS",</div><div class='del'>-			  "BT_UART_RXD",</div><div class='del'>-			  "BT_UART_TXD",</div><div class='del'>-			  "AMP_I2C_SDA",</div><div class='del'>-			  "AMP_I2C_SCL",</div><div class='del'>-			  "AP_BRD_ID3",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EC_SPI_CLK",</div><div class='del'>-			  "AP_EC_SPI_CS_L",</div><div class='del'>-			  "AP_EC_SPI_MISO",</div><div class='del'>-			  "AP_EC_SPI_MOSI",</div><div class='del'>-			  "FORCED_USB_BOOT",</div><div class='del'>-			  "AMP_BCLK",</div><div class='del'>-			  "AMP_LRCLK",</div><div class='del'>-			  "AMP_DOUT",</div><div class='del'>-			  "AMP_DIN",</div><div class='del'>-			  "AP_BRD_ID2",</div><div class='del'>-			  "PEN_PDCT_L",</div><div class='del'>-			  "HP_MCLK",</div><div class='del'>-			  "HP_BCLK",</div><div class='del'>-			  "HP_LRCLK",</div><div class='del'>-			  "HP_DOUT",</div><div class='del'>-			  "HP_DIN",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "BT_SLIMBUS_DATA",</div><div class='del'>-			  "BT_SLIMBUS_CLK",</div><div class='del'>-			  "AMP_RESET_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "FCAM_VSYNC",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID1",</div><div class='del'>-			  "EC_WOV_BCLK",</div><div class='del'>-			  "EC_WOV_LRCLK",</div><div class='del'>-			  "EC_WOV_DOUT",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_H1_SPI_MISO",</div><div class='del'>-			  "AP_H1_SPI_MOSI",</div><div class='del'>-			  "AP_H1_SPI_CLK",</div><div class='del'>-			  "AP_H1_SPI_CS_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CS0_L",</div><div class='del'>-			  "AP_SPI_MOSI",</div><div class='del'>-			  "AP_SPI_MISO",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RFFE6_CLK",</div><div class='del'>-			  "RFFE6_DATA",</div><div class='del'>-			  "BOOT_CONFIG_1",</div><div class='del'>-			  "BOOT_CONFIG_2",</div><div class='del'>-			  "BOOT_CONFIG_0",</div><div class='del'>-			  "EDP_BRIJ_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "USB_HS_TX_EN",</div><div class='del'>-			  "UIM2_DATA",</div><div class='del'>-			  "UIM2_CLK",</div><div class='del'>-			  "UIM2_RST",</div><div class='del'>-			  "UIM2_PRESENT",</div><div class='del'>-			  "UIM1_DATA",</div><div class='del'>-			  "UIM1_CLK",</div><div class='del'>-			  "UIM1_RST",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID2",</div><div class='del'>-			  "SDM_GRFC_8",</div><div class='del'>-			  "SDM_GRFC_9",</div><div class='del'>-			  "AP_RST_REQ",</div><div class='del'>-			  "HP_IRQ",</div><div class='del'>-			  "TS_RESET_L",</div><div class='del'>-			  "PEN_EJECT_ODL",</div><div class='del'>-			  "HUB_RST_L",</div><div class='del'>-			  "FP_TO_AP_IRQ",</div><div class='del'>-			  "AP_EC_INT_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "TS_INT_L",</div><div class='del'>-			  "AP_SUSPEND_L",</div><div class='del'>-			  "SDM_GRFC_3",</div><div class='del'>-			  "",</div><div class='del'>-			  "H1_AP_INT_ODL",</div><div class='del'>-			  "QLINK_REQ",</div><div class='del'>-			  "QLINK_EN",</div><div class='del'>-			  "SDM_GRFC_2",</div><div class='del'>-			  "BOOT_CONFIG_3",</div><div class='del'>-			  "WMSS_RESET_L",</div><div class='del'>-			  "SDM_GRFC_0",</div><div class='del'>-			  "SDM_GRFC_1",</div><div class='del'>-			  "RFFE3_DATA",</div><div class='del'>-			  "RFFE3_CLK",</div><div class='del'>-			  "RFFE4_DATA",</div><div class='del'>-			  "RFFE4_CLK",</div><div class='del'>-			  "RFFE5_DATA",</div><div class='del'>-			  "RFFE5_CLK",</div><div class='del'>-			  "GNSS_EN",</div><div class='del'>-			  "WCI2_LTE_COEX_RXD",</div><div class='del'>-			  "WCI2_LTE_COEX_TXD",</div><div class='del'>-			  "AP_RAM_ID1",</div><div class='del'>-			  "AP_RAM_ID2",</div><div class='del'>-			  "RFFE1_DATA",</div><div class='del'>-			  "RFFE1_CLK";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts b/arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts<br/>deleted file mode 100644<br/>index 1ba67be08f81..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,174 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Google Cheza board device tree source</div><div class='del'>- *</div><div class='del'>- * Copyright 2018 Google LLC.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include "sdm845-cheza.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	model = "Google Cheza (rev3+)";</div><div class='del'>-	compatible = "google,cheza", "qcom,sdm845";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PINCTRL - board-specific pinctrl */</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	gpio-line-names = "AP_SPI_FP_MISO",</div><div class='del'>-			  "AP_SPI_FP_MOSI",</div><div class='del'>-			  "AP_SPI_FP_CLK",</div><div class='del'>-			  "AP_SPI_FP_CS_L",</div><div class='del'>-			  "UART_AP_TX_DBG_RX",</div><div class='del'>-			  "UART_DBG_TX_AP_RX",</div><div class='del'>-			  "BRIJ_SUSPEND",</div><div class='del'>-			  "FP_RST_L",</div><div class='del'>-			  "FCAM_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "EDP_BRIJ_IRQ",</div><div class='del'>-			  "EC_IN_RW_ODL",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_MCLK",</div><div class='del'>-			  "FCAM_MCLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RCAM_EN",</div><div class='del'>-			  "CCI0_SDA",</div><div class='del'>-			  "CCI0_SCL",</div><div class='del'>-			  "CCI1_SDA",</div><div class='del'>-			  "CCI1_SCL",</div><div class='del'>-			  "FCAM_RST_L",</div><div class='del'>-			  "FPMCU_BOOT0",</div><div class='del'>-			  "PEN_RST_L",</div><div class='del'>-			  "PEN_IRQ_L",</div><div class='del'>-			  "FPMCU_SEL_OD",</div><div class='del'>-			  "RCAM_VSYNC",</div><div class='del'>-			  "ESIM_MISO",</div><div class='del'>-			  "ESIM_MOSI",</div><div class='del'>-			  "ESIM_CLK",</div><div class='del'>-			  "ESIM_CS_L",</div><div class='del'>-			  "AP_PEN_1V8_SDA",</div><div class='del'>-			  "AP_PEN_1V8_SCL",</div><div class='del'>-			  "AP_TS_I2C_SDA",</div><div class='del'>-			  "AP_TS_I2C_SCL",</div><div class='del'>-			  "RCAM_RST_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EDP_BKLTEN",</div><div class='del'>-			  "AP_BRD_ID0",</div><div class='del'>-			  "BOOT_CONFIG_4",</div><div class='del'>-			  "AMP_IRQ_L",</div><div class='del'>-			  "EDP_BRIJ_I2C_SDA",</div><div class='del'>-			  "EDP_BRIJ_I2C_SCL",</div><div class='del'>-			  "EN_PP3300_DX_EDP",</div><div class='del'>-			  "SD_CD_ODL",</div><div class='del'>-			  "BT_UART_RTS",</div><div class='del'>-			  "BT_UART_CTS",</div><div class='del'>-			  "BT_UART_RXD",</div><div class='del'>-			  "BT_UART_TXD",</div><div class='del'>-			  "AMP_I2C_SDA",</div><div class='del'>-			  "AMP_I2C_SCL",</div><div class='del'>-			  "AP_BRD_ID2",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_EC_SPI_CLK",</div><div class='del'>-			  "AP_EC_SPI_CS_L",</div><div class='del'>-			  "AP_EC_SPI_MISO",</div><div class='del'>-			  "AP_EC_SPI_MOSI",</div><div class='del'>-			  "FORCED_USB_BOOT",</div><div class='del'>-			  "AMP_BCLK",</div><div class='del'>-			  "AMP_LRCLK",</div><div class='del'>-			  "AMP_DOUT",</div><div class='del'>-			  "AMP_DIN",</div><div class='del'>-			  "AP_BRD_ID1",</div><div class='del'>-			  "PEN_PDCT_L",</div><div class='del'>-			  "HP_MCLK",</div><div class='del'>-			  "HP_BCLK",</div><div class='del'>-			  "HP_LRCLK",</div><div class='del'>-			  "HP_DOUT",</div><div class='del'>-			  "HP_DIN",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "BT_SLIMBUS_DATA",</div><div class='del'>-			  "BT_SLIMBUS_CLK",</div><div class='del'>-			  "AMP_RESET_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "FCAM_VSYNC",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID0",</div><div class='del'>-			  "EC_WOV_BCLK",</div><div class='del'>-			  "EC_WOV_LRCLK",</div><div class='del'>-			  "EC_WOV_DOUT",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_H1_SPI_MISO",</div><div class='del'>-			  "AP_H1_SPI_MOSI",</div><div class='del'>-			  "AP_H1_SPI_CLK",</div><div class='del'>-			  "AP_H1_SPI_CS_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CS0_L",</div><div class='del'>-			  "AP_SPI_MOSI",</div><div class='del'>-			  "AP_SPI_MISO",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SPI_CLK",</div><div class='del'>-			  "",</div><div class='del'>-			  "RFFE6_CLK",</div><div class='del'>-			  "RFFE6_DATA",</div><div class='del'>-			  "BOOT_CONFIG_1",</div><div class='del'>-			  "BOOT_CONFIG_2",</div><div class='del'>-			  "BOOT_CONFIG_0",</div><div class='del'>-			  "EDP_BRIJ_EN",</div><div class='del'>-			  "",</div><div class='del'>-			  "USB_HS_TX_EN",</div><div class='del'>-			  "UIM2_DATA",</div><div class='del'>-			  "UIM2_CLK",</div><div class='del'>-			  "UIM2_RST",</div><div class='del'>-			  "UIM2_PRESENT",</div><div class='del'>-			  "UIM1_DATA",</div><div class='del'>-			  "UIM1_CLK",</div><div class='del'>-			  "UIM1_RST",</div><div class='del'>-			  "",</div><div class='del'>-			  "AP_SKU_ID1",</div><div class='del'>-			  "SDM_GRFC_8",</div><div class='del'>-			  "SDM_GRFC_9",</div><div class='del'>-			  "AP_RST_REQ",</div><div class='del'>-			  "HP_IRQ",</div><div class='del'>-			  "TS_RESET_L",</div><div class='del'>-			  "PEN_EJECT_ODL",</div><div class='del'>-			  "HUB_RST_L",</div><div class='del'>-			  "FP_TO_AP_IRQ",</div><div class='del'>-			  "AP_EC_INT_L",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "TS_INT_L",</div><div class='del'>-			  "AP_SUSPEND_L",</div><div class='del'>-			  "SDM_GRFC_3",</div><div class='del'>-			  /*</div><div class='del'>-			   * AP_FLASH_WP_L is crossystem ABI. Rev3 schematics</div><div class='del'>-			   * call it BIOS_FLASH_WP_R_L.</div><div class='del'>-			   */</div><div class='del'>-			  "AP_FLASH_WP_L",</div><div class='del'>-			  "H1_AP_INT_ODL",</div><div class='del'>-			  "QLINK_REQ",</div><div class='del'>-			  "QLINK_EN",</div><div class='del'>-			  "SDM_GRFC_2",</div><div class='del'>-			  "BOOT_CONFIG_3",</div><div class='del'>-			  "WMSS_RESET_L",</div><div class='del'>-			  "SDM_GRFC_0",</div><div class='del'>-			  "SDM_GRFC_1",</div><div class='del'>-			  "RFFE3_DATA",</div><div class='del'>-			  "RFFE3_CLK",</div><div class='del'>-			  "RFFE4_DATA",</div><div class='del'>-			  "RFFE4_CLK",</div><div class='del'>-			  "RFFE5_DATA",</div><div class='del'>-			  "RFFE5_CLK",</div><div class='del'>-			  "GNSS_EN",</div><div class='del'>-			  "WCI2_LTE_COEX_RXD",</div><div class='del'>-			  "WCI2_LTE_COEX_TXD",</div><div class='del'>-			  "AP_RAM_ID0",</div><div class='del'>-			  "AP_RAM_ID1",</div><div class='del'>-			  "RFFE1_DATA",</div><div class='del'>-			  "RFFE1_CLK";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi<br/>deleted file mode 100644<br/>index e8276db9eabb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1334 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='del'>-/*</div><div class='del'>- * Google Cheza device tree source (common between revisions)</div><div class='del'>- *</div><div class='del'>- * Copyright 2018 Google LLC.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='del'>-#include "sdm845.dtsi"</div><div class='del'>-</div><div class='del'>-/* PMICs depend on spmi_bus label and so must come after SoC */</div><div class='del'>-#include "pm8005.dtsi"</div><div class='del'>-#include "pm8998.dtsi"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	aliases {</div><div class='del'>-		bluetooth0 = &amp;bluetooth;</div><div class='del'>-		serial1 = &amp;uart6;</div><div class='del'>-		serial0 = &amp;uart9;</div><div class='del'>-		wifi0 = &amp;wifi;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	backlight: backlight {</div><div class='del'>-		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;cros_ec_pwm 0&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;tlmm 37 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		power-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;ap_edp_bklten&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* FIXED REGULATORS - parents above children */</div><div class='del'>-</div><div class='del'>-	/* This is the top level supply and variable voltage */</div><div class='del'>-	ppvar_sys: ppvar-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "ppvar_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* This divides ppvar_sys by 2, so voltage is variable */</div><div class='del'>-	src_vph_pwr: src-vph-pwr-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "src_vph_pwr";</div><div class='del'>-</div><div class='del'>-		/* EC turns on with switchcap_on_l; always on for AP */</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pp5000_a: pp5000-a-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "pp5000_a";</div><div class='del'>-</div><div class='del'>-		/* EC turns on with en_pp5000_a; always on for AP */</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	src_vreg_bob: src-vreg-bob-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "src_vreg_bob";</div><div class='del'>-</div><div class='del'>-		/* EC turns on with vbob_en; always on for AP */</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pp3300_dx_edp: pp3300-dx-edp-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "pp3300_dx_edp";</div><div class='del'>-</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;tlmm 43 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;en_pp3300_dx_edp&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Apparently RPMh does not provide support for PM8998 S4 because it</div><div class='del'>-	 * is always-on; model it as a fixed regulator.</div><div class='del'>-	 */</div><div class='del'>-	src_pp1800_s4a: pm8998-smps4 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "src_pp1800_s4a";</div><div class='del'>-</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-</div><div class='del'>-		vin-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* BOARD-SPECIFIC TOP LEVEL NODES */</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pen_eject_odl&gt;;</div><div class='del'>-</div><div class='del'>-		switch-pen-insert {</div><div class='del'>-			label = "Pen Insert";</div><div class='del'>-			/* Insert = low, eject = high */</div><div class='del'>-			gpios = &lt;&amp;tlmm 119 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;SW_PEN_INSERTED&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_SW&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel: panel {</div><div class='del'>-		compatible = "innolux,p120zdg-bf1";</div><div class='del'>-		power-supply = &lt;&amp;pp3300_dx_edp&gt;;</div><div class='del'>-		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-		no-hpd;</div><div class='del'>-</div><div class='del'>-		panel_in: port {</div><div class='del'>-			panel_in_edp: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;sn65dsi86_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpufreq_hw {</div><div class='del'>-	/delete-property/ interrupts-extended; /* reference to lmh_cluster[01] */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;psci {</div><div class='del'>-	/delete-node/ power-domain-cpu0;</div><div class='del'>-	/delete-node/ power-domain-cpu1;</div><div class='del'>-	/delete-node/ power-domain-cpu2;</div><div class='del'>-	/delete-node/ power-domain-cpu3;</div><div class='del'>-	/delete-node/ power-domain-cpu4;</div><div class='del'>-	/delete-node/ power-domain-cpu5;</div><div class='del'>-	/delete-node/ power-domain-cpu6;</div><div class='del'>-	/delete-node/ power-domain-cpu7;</div><div class='del'>-	/delete-node/ power-domain-cluster;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpus {</div><div class='del'>-	/delete-node/ domain-idle-states;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_idle_states {</div><div class='del'>-	LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='del'>-		compatible = "arm,idle-state";</div><div class='del'>-		idle-state-name = "little-power-down";</div><div class='del'>-		arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='del'>-		entry-latency-us = &lt;350&gt;;</div><div class='del'>-		exit-latency-us = &lt;461&gt;;</div><div class='del'>-		min-residency-us = &lt;1890&gt;;</div><div class='del'>-		local-timer-stop;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='del'>-		compatible = "arm,idle-state";</div><div class='del'>-		idle-state-name = "little-rail-power-down";</div><div class='del'>-		arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='del'>-		entry-latency-us = &lt;360&gt;;</div><div class='del'>-		exit-latency-us = &lt;531&gt;;</div><div class='del'>-		min-residency-us = &lt;3934&gt;;</div><div class='del'>-		local-timer-stop;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='del'>-		compatible = "arm,idle-state";</div><div class='del'>-		idle-state-name = "big-power-down";</div><div class='del'>-		arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='del'>-		entry-latency-us = &lt;264&gt;;</div><div class='del'>-		exit-latency-us = &lt;621&gt;;</div><div class='del'>-		min-residency-us = &lt;952&gt;;</div><div class='del'>-		local-timer-stop;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='del'>-		compatible = "arm,idle-state";</div><div class='del'>-		idle-state-name = "big-rail-power-down";</div><div class='del'>-		arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='del'>-		entry-latency-us = &lt;702&gt;;</div><div class='del'>-		exit-latency-us = &lt;1061&gt;;</div><div class='del'>-		min-residency-us = &lt;4488&gt;;</div><div class='del'>-		local-timer-stop;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='del'>-		compatible = "arm,idle-state";</div><div class='del'>-		idle-state-name = "cluster-power-down";</div><div class='del'>-		arm,psci-suspend-param = &lt;0x400000F4&gt;;</div><div class='del'>-		entry-latency-us = &lt;3263&gt;;</div><div class='del'>-		exit-latency-us = &lt;6562&gt;;</div><div class='del'>-		min-residency-us = &lt;9987&gt;;</div><div class='del'>-		local-timer-stop;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU0 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU1 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU2 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU3 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0</div><div class='del'>-			   &amp;LITTLE_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU4 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU5 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU6 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;CPU7 {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-	/delete-property/ power-domain-names;</div><div class='del'>-	cpu-idle-states = &lt;&amp;BIG_CPU_SLEEP_0</div><div class='del'>-			   &amp;BIG_CPU_SLEEP_1</div><div class='del'>-			   &amp;CLUSTER_SLEEP_0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lmh_cluster0 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lmh_cluster1 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reserved memory changes</div><div class='del'>- *</div><div class='del'>- * Putting this all together (out of order with the rest of the file) to keep</div><div class='del'>- * all modifications to the memory map (from sdm845.dtsi) in one place.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Our mpss_region is 8MB bigger than the default one and that conflicts</div><div class='del'>- * with venus_mem and cdsp_mem.</div><div class='del'>- *</div><div class='del'>- * For venus_mem we'll delete and re-create at a different address.</div><div class='del'>- *</div><div class='del'>- * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but</div><div class='del'>- * that also means we need to delete cdsp_pas.</div><div class='del'>- */</div><div class='del'>-/delete-node/ &amp;venus_mem;</div><div class='del'>-/delete-node/ &amp;cdsp_mem;</div><div class='del'>-/delete-node/ &amp;cdsp_pas;</div><div class='del'>-/delete-node/ &amp;gpu_mem;</div><div class='del'>-</div><div class='del'>-/* Increase the size from 120 MB to 128 MB */</div><div class='del'>-&amp;mpss_region {</div><div class='del'>-	reg = &lt;0 0x8e000000 0 0x8000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Increase the size from 2MB to 8MB */</div><div class='del'>-&amp;rmtfs_mem {</div><div class='del'>-	reg = &lt;0 0x88f00000 0 0x800000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	reserved-memory {</div><div class='del'>-		venus_mem: memory@96000000 {</div><div class='del'>-			reg = &lt;0 0x96000000 0 0x500000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qspi {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;qspi_clk&gt;, &lt;&amp;qspi_cs0&gt;, &lt;&amp;qspi_data0&gt;, &lt;&amp;qspi_data1&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;qspi_sleep&gt;;</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * In theory chip supports up to 104 MHz and controller up</div><div class='del'>-		 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use</div><div class='del'>-		 * that for now.  b:117440651</div><div class='del'>-		 */</div><div class='del'>-		spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;2&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-&amp;apps_rsc {</div><div class='del'>-	/delete-property/ power-domains;</div><div class='del'>-</div><div class='del'>-	regulators-0 {</div><div class='del'>-		compatible = "qcom,pm8998-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "a";</div><div class='del'>-</div><div class='del'>-		vdd-s1-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s2-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s3-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s4-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s5-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s6-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s7-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s8-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s9-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s10-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s11-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s12-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s13-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-l1-l27-supply = &lt;&amp;src_pp1025_s7a&gt;;</div><div class='del'>-		vdd-l2-l8-l17-supply = &lt;&amp;src_pp1350_s3a&gt;;</div><div class='del'>-		vdd-l3-l11-supply = &lt;&amp;src_pp1025_s7a&gt;;</div><div class='del'>-		vdd-l4-l5-supply = &lt;&amp;src_pp1025_s7a&gt;;</div><div class='del'>-		vdd-l6-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-l7-l12-l14-l15-supply = &lt;&amp;src_pp2040_s5a&gt;;</div><div class='del'>-		vdd-l9-supply = &lt;&amp;src_pp2040_s5a&gt;;</div><div class='del'>-		vdd-l10-l23-l25-supply = &lt;&amp;src_vreg_bob&gt;;</div><div class='del'>-		vdd-l13-l19-l21-supply = &lt;&amp;src_vreg_bob&gt;;</div><div class='del'>-		vdd-l16-l28-supply = &lt;&amp;src_vreg_bob&gt;;</div><div class='del'>-		vdd-l18-l22-supply = &lt;&amp;src_vreg_bob&gt;;</div><div class='del'>-		vdd-l20-l24-supply = &lt;&amp;src_vreg_bob&gt;;</div><div class='del'>-		vdd-l26-supply = &lt;&amp;src_pp1350_s3a&gt;;</div><div class='del'>-		vin-lvs-1-2-supply = &lt;&amp;src_pp1800_s4a&gt;;</div><div class='del'>-</div><div class='del'>-		src_pp1125_s2a: smps2 {</div><div class='del'>-			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1350_s3a: smps3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1352000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1352000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp2040_s5a: smps5 {</div><div class='del'>-			regulator-min-microvolt = &lt;1904000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1025_s7a: smps7 {</div><div class='del'>-			regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1028000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vdd_qusb_hs0:</div><div class='del'>-		vdda_hp_pcie_core:</div><div class='del'>-		vdda_mipi_csi0_0p9:</div><div class='del'>-		vdda_mipi_csi1_0p9:</div><div class='del'>-		vdda_mipi_csi2_0p9:</div><div class='del'>-		vdda_mipi_dsi0_pll:</div><div class='del'>-		vdda_mipi_dsi1_pll:</div><div class='del'>-		vdda_qlink_lv:</div><div class='del'>-		vdda_qlink_lv_ck:</div><div class='del'>-		vdda_qrefs_0p875:</div><div class='del'>-		vdda_pcie_core:</div><div class='del'>-		vdda_pll_cc_ebi01:</div><div class='del'>-		vdda_pll_cc_ebi23:</div><div class='del'>-		vdda_sp_sensor:</div><div class='del'>-		vdda_ufs1_core:</div><div class='del'>-		vdda_ufs2_core:</div><div class='del'>-		vdda_usb1_ss_core:</div><div class='del'>-		vdda_usb2_ss_core:</div><div class='del'>-		src_pp875_l1a: ldo1 {</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vddpx_10:</div><div class='del'>-		src_pp1200_l2a: ldo2 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-</div><div class='del'>-			/* TODO: why??? */</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp1000_l3a_sdr845: ldo3 {</div><div class='del'>-			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vdd_wcss_cx:</div><div class='del'>-		vdd_wcss_mx:</div><div class='del'>-		vdda_wcss_pll:</div><div class='del'>-		src_pp800_l5a: ldo5 {</div><div class='del'>-			regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vddpx_13:</div><div class='del'>-		src_pp1800_l6a: ldo6 {</div><div class='del'>-			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1856000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp1800_l7a_wcn3990: ldo7 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1200_l8a: ldo8 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1248000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp1800_dx_pen:</div><div class='del'>-		src_pp1800_l9a: ldo9 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1800_l10a: ldo10 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp1000_l11a_sdr845: ldo11 {</div><div class='del'>-			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1048000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vdd_qfprom:</div><div class='del'>-		vdd_qfprom_sp:</div><div class='del'>-		vdda_apc1_cs_1p8:</div><div class='del'>-		vdda_gfx_cs_1p8:</div><div class='del'>-		vdda_qrefs_1p8:</div><div class='del'>-		vdda_qusb_hs0_1p8:</div><div class='del'>-		vddpx_11:</div><div class='del'>-		src_pp1800_l12a: ldo12 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vddpx_2:</div><div class='del'>-		src_pp2950_l13a: ldo13 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1800_l14a: ldo14 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1800_l15a: ldo15 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp2700_l16a: ldo16 {</div><div class='del'>-			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2704000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1300_l17a: ldo17 {</div><div class='del'>-			regulator-min-microvolt = &lt;1304000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp2700_l18a: ldo18 {</div><div class='del'>-			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * NOTE: this rail should have been called</div><div class='del'>-		 * src_pp3300_l19a in the schematic</div><div class='del'>-		 */</div><div class='del'>-		src_pp3000_l19a: ldo19 {</div><div class='del'>-			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='del'>-</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp2950_l20a: ldo20 {</div><div class='del'>-			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp2950_l21a: ldo21 {</div><div class='del'>-			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp3300_hub:</div><div class='del'>-		src_pp3300_l22a: ldo22 {</div><div class='del'>-			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-			/*</div><div class='del'>-			 * HACK: Should add a usb hub node and driver</div><div class='del'>-			 * to turn this on and off at suspend/resume time</div><div class='del'>-			 */</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp3300_l23a_ch1_wcn3990: ldo23 {</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3312000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vdda_qusb_hs0_3p1:</div><div class='del'>-		src_pp3075_l24a: ldo24 {</div><div class='del'>-			regulator-min-microvolt = &lt;3088000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3088000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp3300_l25a_ch0_wcn3990: ldo25 {</div><div class='del'>-			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp1200_hub:</div><div class='del'>-		vdda_hp_pcie_1p2:</div><div class='del'>-		vdda_hv_ebi0:</div><div class='del'>-		vdda_hv_ebi1:</div><div class='del'>-		vdda_hv_ebi2:</div><div class='del'>-		vdda_hv_ebi3:</div><div class='del'>-		vdda_mipi_csi_1p25:</div><div class='del'>-		vdda_mipi_dsi0_1p2:</div><div class='del'>-		vdda_mipi_dsi1_1p2:</div><div class='del'>-		vdda_pcie_1p2:</div><div class='del'>-		vdda_ufs1_1p2:</div><div class='del'>-		vdda_ufs2_1p2:</div><div class='del'>-		vdda_usb1_ss_1p2:</div><div class='del'>-		vdda_usb2_ss_1p2:</div><div class='del'>-		src_pp1200_l26a: ldo26 {</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pp3300_dx_pen:</div><div class='del'>-		src_pp3300_l28a: ldo28 {</div><div class='del'>-			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1800_lvs1: lvs1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		src_pp1800_lvs2: lvs2 {</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-1 {</div><div class='del'>-		compatible = "qcom,pm8005-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "c";</div><div class='del'>-</div><div class='del'>-		vdd-s1-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s2-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s3-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-		vdd-s4-supply = &lt;&amp;src_vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		src_pp600_s3c: smps3 {</div><div class='del'>-			regulator-min-microvolt = &lt;600000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;600000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-edp_brij_i2c: &amp;i2c3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	sn65dsi86_bridge: bridge@2d {</div><div class='del'>-		compatible = "ti,sn65dsi86";</div><div class='del'>-		reg = &lt;0x2d&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_brij_en &amp;edp_brij_irq&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		enable-gpios = &lt;&amp;tlmm 102 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		vpll-supply = &lt;&amp;src_pp1800_s4a&gt;;</div><div class='del'>-		vccio-supply = &lt;&amp;src_pp1800_s4a&gt;;</div><div class='del'>-		vcca-supply = &lt;&amp;src_pp1200_l2a&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;src_pp1200_l2a&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;rpmhcc RPMH_LN_BB_CLK2&gt;;</div><div class='del'>-		clock-names = "refclk";</div><div class='del'>-</div><div class='del'>-		no-hpd;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				sn65dsi86_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				sn65dsi86_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ap_pen_1v8: &amp;i2c11 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	digitizer@9 {</div><div class='del'>-		compatible = "wacom,w9013", "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x9&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pen_irq_l&gt;, &lt;&amp;pen_pdct_l&gt;, &lt;&amp;pen_rst_l&gt;;</div><div class='del'>-</div><div class='del'>-		vdd-supply = &lt;&amp;pp3300_dx_pen&gt;;</div><div class='del'>-		vddl-supply = &lt;&amp;pp1800_dx_pen&gt;;</div><div class='del'>-		post-power-on-delay-ms = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-amp_i2c: &amp;i2c12 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ap_ts_i2c: &amp;i2c14 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	touchscreen@10 {</div><div class='del'>-		compatible = "elan,ekth3500";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;ts_int_l &amp;ts_reset_l&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;125 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		vcc33-supply = &lt;&amp;src_pp3300_l28a&gt;;</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;tlmm 118 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ipa {</div><div class='del'>-	qcom,gsi-loader = "modem";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lpasscc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dsi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vdda-supply = &lt;&amp;vdda_mipi_dsi0_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;sn65dsi86_in&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dsi0_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-	vdds-supply = &lt;&amp;vdda_mipi_dsi0_pll&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Cheza fw does not properly program the GPU aperture to allow the</div><div class='del'>- * GPU to update the SMMU pagetables for context switches.  Work</div><div class='del'>- * around this by dropping the "qcom,adreno-smmu" compat string.</div><div class='del'>- */</div><div class='del'>-&amp;adreno_smmu {</div><div class='del'>-	compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mss_pil {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	iommus = &lt;&amp;apps_smmu 0x781 0x0&gt;,</div><div class='del'>-		 &lt;&amp;apps_smmu 0x724 0x3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pm8998_pwrkey {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qupv3_id_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	iommus = &lt;&amp;apps_smmu 0x0 0x3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qupv3_id_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	iommus = &lt;&amp;apps_smmu 0x6c0 0x3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhc_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdc2_clk &amp;sdc2_cmd &amp;sdc2_data &amp;sd_cd_odl&gt;;</div><div class='del'>-</div><div class='del'>-	vmmc-supply = &lt;&amp;src_pp2950_l21a&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vddpx_2&gt;;</div><div class='del'>-</div><div class='del'>-	cd-gpios = &lt;&amp;tlmm 44 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi5 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	tpm@0 {</div><div class='del'>-		compatible = "google,cr50";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;h1_ap_int_odl&gt;;</div><div class='del'>-		spi-max-frequency = &lt;800000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;129 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi10 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	cros_ec: ec@0 {</div><div class='del'>-		compatible = "google,cros-ec-spi";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='del'>-		interrupts = &lt;122 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;ec_ap_int_l&gt;;</div><div class='del'>-		spi-max-frequency = &lt;3000000&gt;;</div><div class='del'>-		wakeup-source;</div><div class='del'>-</div><div class='del'>-		cros_ec_pwm: pwm {</div><div class='del'>-			compatible = "google,cros-ec-pwm";</div><div class='del'>-			#pwm-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c_tunnel: i2c-tunnel {</div><div class='del'>-			compatible = "google,cros-ec-i2c-tunnel";</div><div class='del'>-			google,remote-bus = &lt;0&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#include &lt;arm/cros-ec-keyboard.dtsi&gt;</div><div class='del'>-#include &lt;arm/cros-ec-sbs.dtsi&gt;</div><div class='del'>-</div><div class='del'>-&amp;uart6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;qup_uart6_4pin&gt;;</div><div class='del'>-</div><div class='del'>-	bluetooth: bluetooth {</div><div class='del'>-		compatible = "qcom,wcn3990-bt";</div><div class='del'>-		vddio-supply = &lt;&amp;src_pp1800_s4a&gt;;</div><div class='del'>-		vddxo-supply = &lt;&amp;pp1800_l7a_wcn3990&gt;;</div><div class='del'>-		vddrf-supply = &lt;&amp;src_pp1300_l17a&gt;;</div><div class='del'>-		vddch0-supply = &lt;&amp;pp3300_l25a_ch0_wcn3990&gt;;</div><div class='del'>-		max-speed = &lt;3200000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart9 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ufs_mem_hc {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	reset-gpios = &lt;&amp;tlmm 150 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	vcc-supply = &lt;&amp;src_pp2950_l20a&gt;;</div><div class='del'>-	vcc-max-microamp = &lt;600000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ufs_mem_phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vdda_ufs1_core&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vdda_ufs1_1p2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* We'll use this as USB 2.0 only */</div><div class='del'>-	qcom,select-utmi-as-pipe-clk;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='del'>-	/*</div><div class='del'>-	 * The hardware design intends this port to be hooked up in peripheral</div><div class='del'>-	 * mode, so we'll hardcode it here.  Some details:</div><div class='del'>-	 * - SDM845 expects only a single Type C connector so it has only one</div><div class='del'>-	 *   native Type C port but cheza has two Type C connectors.</div><div class='del'>-	 * - The only source of DP is the single native Type C port.</div><div class='del'>-	 * - On cheza we want to be able to hook DP up to _either_ of the</div><div class='del'>-	 *   two Type C connectors and want to be able to achieve 4 lanes of DP.</div><div class='del'>-	 * - When you configure a Type C port for 4 lanes of DP you lose USB3.</div><div class='del'>-	 * - In order to make everything work, the native Type C port is always</div><div class='del'>-	 *   configured as 4-lanes DP so it's always available.</div><div class='del'>-	 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then</div><div class='del'>-	 *   sent to the two Type C connectors.</div><div class='del'>-	 * - The extra USB2 lines from the native Type C port are always</div><div class='del'>-	 *   setup as "peripheral" so that we can mux them over to one connector</div><div class='del'>-	 *   or the other if someone needs the connector configured as a gadget</div><div class='del'>-	 *   (but they only get USB2 speeds).</div><div class='del'>-	 *</div><div class='del'>-	 * All the hardware muxes would allow us to hook things up in different</div><div class='del'>-	 * ways to some potential benefit for static configurations (you could</div><div class='del'>-	 * achieve extra USB2 bandwidth by using two different ports for the</div><div class='del'>-	 * two connectors or possibly even get USB3 peripheral mode), but in</div><div class='del'>-	 * each case you end up forcing to disconnect/reconnect an in-use</div><div class='del'>-	 * USB session in some cases depending on what you hotplug into the</div><div class='del'>-	 * other connector.  Thus hardcoding this as peripheral makes sense.</div><div class='del'>-	 */</div><div class='del'>-	dr_mode = "peripheral";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We always need the high speed pins as 4-lanes DP in case someone</div><div class='del'>-	 * hotplugs a DP peripheral.  Thus limit this port to a max of high</div><div class='del'>-	 * speed.</div><div class='del'>-	 */</div><div class='del'>-	maximum-speed = "high-speed";</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We don't need the usb3-phy since we run in highspeed mode always, so</div><div class='del'>-	 * re-define these properties removing the superspeed USB PHY reference.</div><div class='del'>-	 */</div><div class='del'>-	phys = &lt;&amp;usb_1_hsphy&gt;;</div><div class='del'>-	phy-names = "usb2-phy";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_hsphy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd-supply = &lt;&amp;vdda_usb1_ss_core&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vdda_qusb_hs0_1p8&gt;;</div><div class='del'>-	vdda-phy-dpdm-supply = &lt;&amp;vdda_qusb_hs0_3p1&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,imp-res-offset-value = &lt;8&gt;;</div><div class='del'>-	qcom,hstx-trim-value = &lt;QUSB2_V2_HSTX_TRIM_21_6_MA&gt;;</div><div class='del'>-	qcom,preemphasis-level = &lt;QUSB2_V2_PREEMPHASIS_5_PERCENT&gt;;</div><div class='del'>-	qcom,preemphasis-width = &lt;QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_dwc3 {</div><div class='del'>-	/* We have this hooked up to a hub and we always use in host mode */</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_hsphy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd-supply = &lt;&amp;vdda_usb2_ss_core&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vdda_qusb_hs0_1p8&gt;;</div><div class='del'>-	vdda-phy-dpdm-supply = &lt;&amp;vdda_qusb_hs0_3p1&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,imp-res-offset-value = &lt;8&gt;;</div><div class='del'>-	qcom,hstx-trim-value = &lt;QUSB2_V2_HSTX_TRIM_22_8_MA&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_2_qmpphy {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vdda_usb2_ss_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vdda_usb2_ss_core&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wifi {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd-0.8-cx-mx-supply = &lt;&amp;src_pp800_l5a &gt;;</div><div class='del'>-	vdd-1.8-xo-supply = &lt;&amp;pp1800_l7a_wcn3990&gt;;</div><div class='del'>-	vdd-1.3-rfa-supply = &lt;&amp;src_pp1300_l17a&gt;;</div><div class='del'>-	vdd-3.3-ch0-supply = &lt;&amp;pp3300_l25a_ch0_wcn3990&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PINCTRL - additions to nodes defined in sdm845.dtsi */</div><div class='del'>-</div><div class='del'>-&amp;qspi_cs0 {</div><div class='del'>-	bias-disable;		/* External pullup */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qspi_clk {</div><div class='del'>-	bias-disable;		/* Rely on Cr50 internal pulldown */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qspi_data0 {</div><div class='del'>-	bias-disable;		/* Rely on Cr50 internal pulldown */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qspi_data1 {</div><div class='del'>-	bias-pull-down;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_i2c3_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	/* Has external pullup */</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_i2c11_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	/* Has external pullup */</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_i2c12_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	/* Has external pullup */</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_i2c14_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	/* Has external pullup */</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_spi0_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_spi5_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_spi10_default {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_uart9_rx {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-	bias-pull-up;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qup_uart9_tx {</div><div class='del'>-	drive-strength = &lt;2&gt;;</div><div class='del'>-	bias-disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PINCTRL - board-specific pinctrl */</div><div class='del'>-&amp;pm8005_gpios {</div><div class='del'>-	gpio-line-names = "",</div><div class='del'>-			  "",</div><div class='del'>-			  "SLB",</div><div class='del'>-			  "";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pm8998_adc {</div><div class='del'>-	channel@4d {</div><div class='del'>-		reg = &lt;ADC5_AMUX_THM1_100K_PU&gt;;</div><div class='del'>-		label = "sdm_temp";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	channel@4e {</div><div class='del'>-		reg = &lt;ADC5_AMUX_THM2_100K_PU&gt;;</div><div class='del'>-		label = "quiet_temp";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	channel@4f {</div><div class='del'>-		reg = &lt;ADC5_AMUX_THM3_100K_PU&gt;;</div><div class='del'>-		label = "lte_temp_1";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	channel@50 {</div><div class='del'>-		reg = &lt;ADC5_AMUX_THM4_100K_PU&gt;;</div><div class='del'>-		label = "lte_temp_2";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	channel@51 {</div><div class='del'>-		reg = &lt;ADC5_AMUX_THM5_100K_PU&gt;;</div><div class='del'>-		label = "charger_temp";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pm8998_gpios {</div><div class='del'>-	gpio-line-names = "",</div><div class='del'>-			  "",</div><div class='del'>-			  "SW_CTRL",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "",</div><div class='del'>-			  "CFG_OPT1",</div><div class='del'>-			  "WCSS_PWR_REQ",</div><div class='del'>-			  "",</div><div class='del'>-			  "CFG_OPT2",</div><div class='del'>-			  "SLB";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	/*</div><div class='del'>-	 * pinctrl settings for pins that have no real owners.</div><div class='del'>-	 */</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;bios_flash_wp_r_l&gt;,</div><div class='del'>-		    &lt;&amp;ap_suspend_l_deassert&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-1 = &lt;&amp;bios_flash_wp_r_l&gt;,</div><div class='del'>-		    &lt;&amp;ap_suspend_l_assert&gt;;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Hogs prevent usermode from changing the value. A GPIO can be both</div><div class='del'>-	 * here and in the pinctrl section.</div><div class='del'>-	 */</div><div class='del'>-	ap-suspend-l-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;126 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ap_edp_bklten: ap-edp-bklten-state {</div><div class='del'>-		pins = "gpio37";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bios_flash_wp_r_l: bios-flash-wp-r-l-state {</div><div class='del'>-		pins = "gpio128";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ec_ap_int_l: ec-ap-int-l-state {</div><div class='del'>-	       pins = "gpio122";</div><div class='del'>-	       function = "gpio";</div><div class='del'>-	       bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	edp_brij_en: edp-brij-en-state {</div><div class='del'>-		pins = "gpio102";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	edp_brij_irq: edp-brij-irq-state {</div><div class='del'>-		pins = "gpio10";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-pull-down;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	en_pp3300_dx_edp: en-pp3300-dx-edp-state {</div><div class='del'>-		pins = "gpio43";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	h1_ap_int_odl: h1-ap-int-odl-state {</div><div class='del'>-		pins = "gpio129";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pen_eject_odl: pen-eject-odl-state {</div><div class='del'>-		pins = "gpio119";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pen_irq_l: pen-irq-l-state {</div><div class='del'>-		pins = "gpio24";</div><div class='del'>-		function = "gpio";</div><div class='del'>-</div><div class='del'>-		/* Has external pullup */</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pen_pdct_l: pen-pdct-l-state {</div><div class='del'>-		pins = "gpio63";</div><div class='del'>-		function = "gpio";</div><div class='del'>-</div><div class='del'>-		/* Has external pullup */</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pen_rst_l: pen-rst-l-state {</div><div class='del'>-		pins = "gpio23";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The pen driver doesn't currently support</div><div class='del'>-		 * driving this reset line.  By specifying</div><div class='del'>-		 * output-high here we're relying on the fact</div><div class='del'>-		 * that this pin has a default pulldown at boot</div><div class='del'>-		 * (which makes sure the pen was in reset if it</div><div class='del'>-		 * was powered) and then we set it high here to</div><div class='del'>-		 * take it out of reset.  Better would be if the</div><div class='del'>-		 * pen driver could control this and we could</div><div class='del'>-		 * remove "output-high" here.</div><div class='del'>-		 */</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qspi_sleep: qspi-sleep-state {</div><div class='del'>-		pins = "gpio90", "gpio91", "gpio92", "gpio95";</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * When we're not actively transferring we want pins as GPIOs</div><div class='del'>-		 * with output disabled so that the quad SPI IP block stops</div><div class='del'>-		 * driving them. We rely on the normal pulls configured in</div><div class='del'>-		 * the active state and don't redefine them here. Also note</div><div class='del'>-		 * that we don't need the reverse (output-enable) in the</div><div class='del'>-		 * normal mode since the "output-enable" only matters for</div><div class='del'>-		 * GPIO function.</div><div class='del'>-		 */</div><div class='del'>-		function = "gpio";</div><div class='del'>-		output-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc2_clk: sdc2-clk-state {</div><div class='del'>-		pins = "sdc2_clk";</div><div class='del'>-		bias-disable;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * It seems that mmc_test reports errors if drive</div><div class='del'>-		 * strength is not 16.</div><div class='del'>-		 */</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc2_cmd: sdc2-cmd-state {</div><div class='del'>-		pins = "sdc2_cmd";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdc2_data: sdc2-data-state {</div><div class='del'>-		pins = "sdc2_data";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sd_cd_odl: sd-cd-odl-state {</div><div class='del'>-		pins = "gpio44";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ts_int_l: ts-int-l-state {</div><div class='del'>-		pins = "gpio125";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ts_reset_l: ts-reset-l-state {</div><div class='del'>-		pins = "gpio118";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ap_suspend_l_assert: ap-suspend-l-assert-state {</div><div class='del'>-		pins = "gpio126";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ap_suspend_l_deassert: ap-suspend-l-deassert-state {</div><div class='del'>-		pins = "gpio126";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;venus {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	video-firmware {</div><div class='del'>-		iommus = &lt;&amp;apps_smmu 0x10b2 0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso<br/>index a21caa6f3fa2..dbe1911d8e47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso</a></div><div class='hunk'>@@ -4,8 +4,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='add'>+/plugin/;</div><div class='ctx'> </div><div class='del'>-#include "sdm845-db845c.dts"</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,camcc-sdm845.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;camss {</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l1a_0p875&gt;;</div><div class='hunk'>@@ -28,6 +30,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cci_i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 	camera@10 {</div><div class='ctx'> 		compatible = "ovti,ov8856";</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='hunk'>@@ -39,7 +44,8 @@</div><div class='ctx'> </div><div class='ctx'> 		clocks = &lt;&amp;clock_camcc CAM_CC_MCLK0_CLK&gt;;</div><div class='ctx'> 		clock-names = "xvclk";</div><div class='del'>-		clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;clock_camcc CAM_CC_MCLK0_CLK&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The &amp;vreg_s4a_1p8 trace is powered on as a,</div><div class='hunk'>@@ -63,42 +69,3 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;cci_i2c1 {</div><div class='del'>-	camera@60 {</div><div class='del'>-		compatible = "ovti,ov7251";</div><div class='del'>-</div><div class='del'>-		/* I2C address as per ov7251.txt linux documentation */</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-</div><div class='del'>-		/* CAM3_RST_N */</div><div class='del'>-		enable-gpios = &lt;&amp;tlmm 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;cam3_default&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;clock_camcc CAM_CC_MCLK3_CLK&gt;;</div><div class='del'>-		clock-names = "xclk";</div><div class='del'>-		clock-frequency = &lt;24000000&gt;;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The &amp;vreg_s4a_1p8 trace always powered on.</div><div class='del'>-		 *</div><div class='del'>-		 * The 2.8V vdda-supply regulator is enabled when the</div><div class='del'>-		 * vreg_s4a_1p8 trace is pulled high.</div><div class='del'>-		 * It too is represented by a fixed regulator.</div><div class='del'>-		 *</div><div class='del'>-		 * No 1.2V vddd-supply regulator is used.</div><div class='del'>-		 */</div><div class='del'>-		vdddo-supply = &lt;&amp;vreg_lvs1a_1p8&gt;;</div><div class='del'>-		vdda-supply = &lt;&amp;cam3_avdd_2v8&gt;;</div><div class='del'>-</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			ov7251_ep: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1&gt;;</div><div class='del'>-/*				remote-endpoint = &lt;&amp;csiphy3_ep&gt;; */</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts<br/>index 9a6d3d0c0ee4..8abf3e909502 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-db845c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-db845c.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -18,7 +19,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Thundercomm Dragonboard 845c";</div><div class='ctx'> 	compatible = "thundercomm,db845c", "qcom,sdm845";</div><div class='del'>-	qcom,msm-id = &lt;341 0x20001&gt;;</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDA845 0x20001&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;8 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -31,7 +32,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Fixed crystal oscillator dedicated to MCP2517FD */</div><div class='del'>-	clk40M: can-clock {</div><div class='add'>+	clk40m: can-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;40000000&gt;;</div><div class='hunk'>@@ -444,10 +445,6 @@</div><div class='ctx'> 			   &lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpi_dma0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -537,15 +534,11 @@</div><div class='ctx'> </div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> 	qcom,master-dsi;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='hunk'>@@ -559,18 +552,15 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> </div><div class='ctx'> 	/* DSI1 is slave, so use DSI0 clocks */</div><div class='del'>-	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_b&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi1_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_b&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi1_phy {</div><div class='hunk'>@@ -717,19 +707,19 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@3 {</div><div class='del'>-		reg = &lt;3&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 		direction = &lt;2&gt;;</div><div class='ctx'> 		is-compress-dai;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -756,6 +746,12 @@</div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 126 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;slpi_pas {</div><div class='add'>+	firmware-name = "qcom/sdm845/Thundercomm/db845c/slpi.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;quat_mi2s_active</div><div class='hunk'>@@ -774,11 +770,7 @@</div><div class='ctx'> 		"DMIC2", "MIC BIAS3",</div><div class='ctx'> 		"DMIC3", "MIC BIAS3",</div><div class='ctx'> 		"SpkrLeft IN", "SPK1 OUT",</div><div class='del'>-		"SpkrRight IN", "SPK2 OUT",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL2",  "MultiMedia2 Playback",</div><div class='del'>-		"MM_DL4",  "MultiMedia4 Playback",</div><div class='del'>-		"MultiMedia3 Capture", "MM_UL3";</div><div class='add'>+		"SpkrRight IN", "SPK2 OUT";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='hunk'>@@ -863,7 +855,7 @@</div><div class='ctx'> 	can@0 {</div><div class='ctx'> 		compatible = "microchip,mcp2517fd";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk40M&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk40m&gt;;</div><div class='ctx'> 		interrupts-extended = &lt;&amp;tlmm 104 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'> 		vdd-supply = &lt;&amp;vdc_5v&gt;;</div><div class='hunk'>@@ -1166,7 +1158,7 @@</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;vreg_l25a_3p3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	qcom,snoc-host-cap-8bit-quirk;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Thundercomm_DB845C";</div><div class='add'>+	qcom,calibration-variant = "Thundercomm_DB845C";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - additions to nodes defined in sdm845.dtsi */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts<br/>index 2391f842c903..63d2993536ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-mtp.dts</a></div><div class='hunk'>@@ -414,10 +414,6 @@</div><div class='ctx'> 			   &lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -449,15 +445,6 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> 	qcom,master-dsi;</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;truly_in_0&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	panel@0 {</div><div class='ctx'> 		compatible = "truly,nt35597-2K-display";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='hunk'>@@ -487,6 +474,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;truly_in_0&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vdds-supply = &lt;&amp;vdda_mipi_dsi0_pll&gt;;</div><div class='hunk'>@@ -499,16 +491,13 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> </div><div class='ctx'> 	/* DSI1 is slave, so use DSI0 clocks */</div><div class='del'>-	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;truly_in_1&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi1_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;truly_in_1&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi1_phy {</div><div class='hunk'>@@ -789,7 +778,7 @@</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;vreg_l25a_3p3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	qcom,snoc-host-cap-8bit-quirk;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Qualcomm_sdm845mtp";</div><div class='add'>+	qcom,calibration-variant = "Qualcomm_sdm845mtp";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* PINCTRL - additions to nodes defined in sdm845.dtsi */</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi<br/>index 46e25c53829a..dcfffb271fcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -21,6 +22,9 @@</div><div class='ctx'> /delete-node/ &amp;rmtfs_mem;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDM845 0x20001&gt;;</div><div class='add'>+</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart9;</div><div class='ctx'> 		serial1 = &amp;uart6;</div><div class='hunk'>@@ -345,10 +349,6 @@</div><div class='ctx'> 				&lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -521,27 +521,27 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@3 {</div><div class='del'>-		reg = &lt;3&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@4 {</div><div class='del'>-		reg = &lt;4&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA5&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@5 {</div><div class='del'>-		reg = &lt;5&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA6&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts<br/>index 4005e04d998a..a259eb9d45ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts</a></div><div class='hunk'>@@ -5,13 +5,12 @@</div><div class='ctx'>  * Copyright (c) 2020, The Linux Foundation. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include "sdm845-oneplus-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "OnePlus 6";</div><div class='ctx'> 	compatible = "oneplus,enchilada", "qcom,sdm845";</div><div class='del'>-	chassis-type = "handset";</div><div class='del'>-	qcom,msm-id = &lt;0x141 0x20001&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;8 0 17819 22&gt;;</div><div class='ctx'> </div><div class='ctx'> 	battery: battery {</div><div class='hunk'>@@ -20,6 +19,14 @@</div><div class='ctx'> 		charge-full-design-microamp-hours = &lt;3300000&gt;;</div><div class='ctx'> 		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='ctx'> 		voltage-max-design-microvolt = &lt;4400000&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Typical designs have multiple charger ICs which can handle more</div><div class='add'>+		 * current but the OnePlus 6/T do not, hence the lower limit. This</div><div class='add'>+		 * does not apply when using the Dash Charger, however this is not</div><div class='add'>+		 * yet supported.</div><div class='add'>+		 */</div><div class='add'>+		constant-charge-current-max-microamp = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -55,6 +62,33 @@</div><div class='ctx'> 	monitored-battery = &lt;&amp;battery&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmi8998_lpg {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	model = "OnePlus 6";</div><div class='ctx'> 	audio-routing = "RX_BIAS", "MCLK",</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts<br/>index 9471ada0d6ad..7e75decfda05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "OnePlus 6T";</div><div class='ctx'> 	compatible = "oneplus,fajita", "qcom,sdm845";</div><div class='del'>-	chassis-type = "handset";</div><div class='del'>-	qcom,msm-id = &lt;0x141 0x20001&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;8 0 18801 41&gt;;</div><div class='ctx'> </div><div class='ctx'> 	battery: battery {</div><div class='hunk'>@@ -20,6 +18,14 @@</div><div class='ctx'> 		charge-full-design-microamp-hours = &lt;3700000&gt;;</div><div class='ctx'> 		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='ctx'> 		voltage-max-design-microvolt = &lt;4400000&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Typical designs have multiple charger ICs which can handle more</div><div class='add'>+		 * current but the OnePlus 6/T do not, hence the lower limit. This</div><div class='add'>+		 * does not apply when using the Dash Charger, however this is not</div><div class='add'>+		 * yet supported.</div><div class='add'>+		 */</div><div class='add'>+		constant-charge-current-max-microamp = &lt;1800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts b/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts<br/>index d37a433130b9..75a53f0bbebd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts</a></div><div class='hunk'>@@ -7,15 +7,38 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,wcd934x.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "sdm845.dtsi"</div><div class='add'>+#include "pm8998.dtsi"</div><div class='add'>+#include "sdm845-wcd9340.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;rmtfs_mem;</div><div class='add'>+/delete-node/ &amp;spss_mem;</div><div class='add'>+/delete-node/ &amp;adsp_mem;</div><div class='add'>+/delete-node/ &amp;slpi_mem;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> 	model = "Samsung Galaxy S9 SM-G9600";</div><div class='ctx'> 	compatible = "samsung,starqltechn", "qcom,sdm845";</div><div class='ctx'> </div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		constant-charge-current-max-microamp = &lt;2150000&gt;;</div><div class='add'>+		charge-full-design-microamp-hours = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		over-voltage-threshold-microvolt = &lt;4500000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4350000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -27,9 +50,40 @@</div><div class='ctx'> 			height = &lt;2960&gt;;</div><div class='ctx'> 			stride = &lt;(1440 * 4)&gt;;</div><div class='ctx'> 			format = "a8r8g8b8";</div><div class='add'>+			vci-supply = &lt;&amp;s2dos05_ldo4&gt;;</div><div class='add'>+			vddr-supply = &lt;&amp;s2dos05_buck&gt;;</div><div class='add'>+			vdd3-supply = &lt;&amp;s2dos05_ldo1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	slpi_regulator: slpi-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-0 = &lt;&amp;slpi_ldo_active_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "slpi";</div><div class='add'>+</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;tlmm 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vib_regulator: gpio-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "haptic";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8998_gpios 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -68,9 +122,179 @@</div><div class='ctx'> 			ftrace-size = &lt;0x40000&gt;;</div><div class='ctx'> 			pmsg-size = &lt;0x40000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * It seems like reserving the old rmtfs_mem region is also needed to prevent</div><div class='add'>+		 * random crashes which are most likely modem related, more testing needed.</div><div class='add'>+		 */</div><div class='add'>+		removed_region: removed-region@88f00000 {</div><div class='add'>+			reg = &lt;0 0x88f00000 0 0x1c00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		slpi_mem: slpi@96700000 {</div><div class='add'>+			reg = &lt;0 0x96700000 0 0x1000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spss_mem: spss@97700000 {</div><div class='add'>+			reg = &lt;0 0x97700000 0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mem: memory@97800000 {</div><div class='add'>+			reg = &lt;0 0x97800000 0 0x2000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmtfs_mem: rmtfs-mem@fde00000 {</div><div class='add'>+			compatible = "qcom,rmtfs-mem";</div><div class='add'>+			reg = &lt;0 0xfde00000 0 0x202000&gt;;</div><div class='add'>+			qcom,use-guard-pages;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			qcom,client-id = &lt;1&gt;;</div><div class='add'>+			qcom,vmid = &lt;QCOM_SCM_VMID_MSS_MSA&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c21 {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		sda-gpios = &lt;&amp;tlmm 127 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		scl-gpios = &lt;&amp;tlmm 128 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		i2c-gpio,delay-us = &lt;2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;i2c21_sda_state &amp;i2c21_scl_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pmic@60 {</div><div class='add'>+			compatible = "samsung,s2dos05";</div><div class='add'>+			reg = &lt;0x60&gt;;</div><div class='add'>+</div><div class='add'>+			regulators {</div><div class='add'>+				s2dos05_ldo1: ldo1 {</div><div class='add'>+					regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;12000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+					regulator-name = "ldo1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				s2dos05_ldo2: ldo2 {</div><div class='add'>+					regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;12000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+					regulator-name = "ldo2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				s2dos05_ldo3: ldo3 {</div><div class='add'>+					regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+					regulator-boot-on;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;12000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+					regulator-name = "ldo3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				s2dos05_ldo4: ldo4 {</div><div class='add'>+					regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;12000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3775000&gt;;</div><div class='add'>+					regulator-name = "ldo4";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				s2dos05_buck: buck {</div><div class='add'>+					regulator-active-discharge = &lt;1&gt;;</div><div class='add'>+					regulator-enable-ramp-delay = &lt;12000&gt;;</div><div class='add'>+					regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+					regulator-name = "buck";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		autorepeat;</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-wink {</div><div class='add'>+			label = "Bixby";</div><div class='add'>+			gpios = &lt;&amp;pm8998_gpios 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vib_pwm: pwm {</div><div class='add'>+		compatible = "clk-pwm";</div><div class='add'>+		#pwm-cells = &lt;2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;gcc GCC_GP1_CLK_SRC&gt;;</div><div class='add'>+		clocks = &lt;&amp;gcc GCC_GP1_CLK&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;motor_pwm_default_state&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;motor_pwm_suspend_state&gt;;</div><div class='add'>+		pinctrl-names = "default", "suspend";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		memory-region = &lt;&amp;gpu_mem&gt;;</div><div class='add'>+		firmware-name = "qcom/sdm845/starqltechn/a630_zap.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0 {</div><div class='add'>+	vdda-supply = &lt;&amp;vreg_l26a_1p2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "samsung,s6e3ha8";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;s2dos05_ldo4&gt;;</div><div class='add'>+		vddr-supply = &lt;&amp;s2dos05_buck&gt;;</div><div class='add'>+		vdd3-supply = &lt;&amp;s2dos05_ldo1&gt;;</div><div class='add'>+		te-gpios = &lt;&amp;tlmm 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsi_default &amp;dsi_te&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;dsi_suspend &amp;dsi_te&gt;;</div><div class='add'>+		pinctrl-names = "default", "suspend";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vdda_mipi_dsi0_pll&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;apps_rsc {</div><div class='ctx'> 	regulators-0 {</div><div class='hunk'>@@ -135,8 +359,6 @@</div><div class='ctx'> 		vdda_sp_sensor:</div><div class='ctx'> 		vdda_ufs1_core:</div><div class='ctx'> 		vdda_ufs2_core:</div><div class='del'>-		vdda_usb1_ss_core:</div><div class='del'>-		vdda_usb2_ss_core:</div><div class='ctx'> 		vreg_l1a_0p875: ldo1 {</div><div class='ctx'> 			regulator-min-microvolt = &lt;880000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;880000&gt;;</div><div class='hunk'>@@ -157,6 +379,7 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vdda_usb1_ss_core:</div><div class='ctx'> 		vdd_wcss_cx:</div><div class='ctx'> 		vdd_wcss_mx:</div><div class='ctx'> 		vdda_wcss_pll:</div><div class='hunk'>@@ -365,10 +588,78 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart9 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@66 {</div><div class='add'>+		compatible = "maxim,max77705";</div><div class='add'>+		reg = &lt;0x66&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pm8998_gpios&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		leds {</div><div class='add'>+			compatible = "maxim,max77705-rgb";</div><div class='add'>+</div><div class='add'>+			multi-led {</div><div class='add'>+				color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+				function = LED_FUNCTION_STATUS;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				led@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				led@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		haptic {</div><div class='add'>+			compatible = "maxim,max77705-haptic";</div><div class='add'>+			haptic-supply = &lt;&amp;vib_regulator&gt;;</div><div class='add'>+			pwms = &lt;&amp;vib_pwm 0 52084&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	max77705_charger: charger@69 {</div><div class='add'>+		reg = &lt;0x69&gt;;</div><div class='add'>+		compatible = "maxim,max77705-charger";</div><div class='add'>+		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pm8998_gpios&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fuel-gauge@36 {</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		compatible = "maxim,max77705-battery";</div><div class='add'>+		power-supplies = &lt;&amp;max77705_charger&gt;;</div><div class='add'>+		maxim,rsns-microohm = &lt;5000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;pm8998_gpios&gt;;</div><div class='add'>+		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ufs_mem_hc {</div><div class='ctx'> 	reset-gpios = &lt;&amp;tlmm 150 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vcc-supply = &lt;&amp;vreg_l20a_2p95&gt;;</div><div class='hunk'>@@ -383,14 +674,256 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhc_2 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdc2_clk_state &amp;sdc2_cmd_state &amp;sdc2_data_state &amp;sd_card_det_n_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 126 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vreg_l21a_2p95&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddpx_2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c11 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@48 {</div><div class='add'>+		compatible = "samsung,s6sy761";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+		interrupts = &lt;120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;s2dos05_ldo2&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;s2dos05_ldo3&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_irq_state&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adsp_pas {</div><div class='add'>+	firmware-name = "qcom/sdm845/starqltechn/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpasscc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "qcom,sdm845-sndcard";</div><div class='add'>+	model = "Samsung Galaxy S9";</div><div class='add'>+	pinctrl-0 = &lt;&amp;quat_mi2s_active &amp;quat_mi2s_sd0_active &amp;quat_mi2s_sd1_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	audio-routing = "RX_BIAS", "MCLK",</div><div class='add'>+			"AMIC2", "MIC BIAS2",	/* Headset Mic */</div><div class='add'>+			"AMIC3", "MIC BIAS2",	/* FM radio left Tx */</div><div class='add'>+			"AMIC4", "MIC BIAS2",	/* FM radio right Tx */</div><div class='add'>+			"DMIC0", "MCLK",	/* Bottom Mic */</div><div class='add'>+			"DMIC0", "MIC BIAS1",</div><div class='add'>+			"DMIC2", "MCLK",	/* Top Mic */</div><div class='add'>+			"DMIC2", "MIC BIAS3";</div><div class='add'>+</div><div class='add'>+	mm1-dai-link {</div><div class='add'>+		link-name = "MultiMedia1";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mm2-dai-link {</div><div class='add'>+		link-name = "MultiMedia2";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mm3-dai-link {</div><div class='add'>+		link-name = "MultiMedia3";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mm4-dai-link {</div><div class='add'>+		link-name = "MultiMedia4";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mm5-dai-link {</div><div class='add'>+		link-name = "MultiMedia5";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mm6-dai-link {</div><div class='add'>+		link-name = "MultiMedia6";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA6&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slim-dai-link {</div><div class='add'>+		link-name = "SLIM Playback 1";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9340 AIF1_PB&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai SLIMBUS_0_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slimcap-dai-link {</div><div class='add'>+		link-name = "SLIM Capture 1";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9340 AIF1_CAP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai SLIMBUS_0_TX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slim2-dai-link {</div><div class='add'>+		link-name = "SLIM Playback 2";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9340 AIF2_PB&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai SLIMBUS_1_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slimcap2-dai-link {</div><div class='add'>+		link-name = "SLIM Capture 2";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9340 AIF2_CAP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai SLIMBUS_1_TX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slimcap3-dai-link {</div><div class='add'>+		link-name = "SLIM Capture 3";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;wcd9340 AIF3_CAP&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai SLIMBUS_2_TX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;q6afedai {</div><div class='add'>+	dai@22 {</div><div class='add'>+		reg = &lt;22&gt;;</div><div class='add'>+		qcom,sd-lines = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@23 {</div><div class='add'>+		reg = &lt;23&gt;;</div><div class='add'>+		qcom,sd-lines = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;q6asmdai {</div><div class='add'>+	dai@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dai@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wcd9340 {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vdd-buck-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	vdd-buck-sido-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	vdd-tx-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	vdd-rx-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	vdd-io-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+	qcom,micbias2-microvolt = &lt;2700000&gt;;</div><div class='add'>+	qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+	qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mss_pil {</div><div class='add'>+	firmware-name = "qcom/sdm845/starqltechn/mba.mbn",</div><div class='add'>+			"qcom/sdm845/starqltechn/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ipa {</div><div class='add'>+	qcom,gsi-loader = "self";</div><div class='add'>+	memory-region = &lt;&amp;ipa_fw_mem&gt;;</div><div class='add'>+	firmware-name = "qcom/sdm845/starqltechn/ipa_fws.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;slpi_pas {</div><div class='add'>+	firmware-name = "qcom/sdm845/starqltechn/slpi.mbn";</div><div class='add'>+	cx-supply = &lt;&amp;slpi_regulator&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -418,16 +951,75 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;wifi {</div><div class='del'>-	vdd-0.8-cx-mx-supply = &lt;&amp;vreg_l5a_0p8&gt;;</div><div class='del'>-	vdd-1.8-xo-supply = &lt;&amp;vreg_l7a_1p8&gt;;</div><div class='del'>-	vdd-1.3-rfa-supply = &lt;&amp;vreg_l17a_1p3&gt;;</div><div class='del'>-	vdd-3.3-ch0-supply = &lt;&amp;vreg_l25a_3p3&gt;;</div><div class='add'>+&amp;pm8998_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8998_gpios {</div><div class='add'>+	pmic_int_default: pmic-int-default-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-disable;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='del'>-	gpio-reserved-ranges = &lt;0 4&gt;, &lt;27 4&gt;, &lt;81 4&gt;, &lt;85 4&gt;;</div><div class='add'>+	gpio-reserved-ranges = &lt;27 4&gt;, /* SPI (eSE - embedded Secure Element) */</div><div class='add'>+			       &lt;85 4&gt;; /* SPI (fingerprint reader) */</div><div class='add'>+</div><div class='add'>+	dsi_default: dsi-default-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi_suspend: dsi-suspend-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi_te: dsi-te-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "mdp_vsync";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c21_sda_state: i2c21-sda-state {</div><div class='add'>+		pins = "gpio127";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c21_scl_state: i2c21-scl-state {</div><div class='add'>+		pins = "gpio128";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	motor_pwm_default_state: motor-pwm-active-state {</div><div class='add'>+		pins = "gpio57";</div><div class='add'>+		function = "gcc_gp1";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	motor_pwm_suspend_state: motor-pwm-suspend-state {</div><div class='add'>+		pins = "gpio57";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	sdc2_clk_state: sdc2-clk-state {</div><div class='ctx'> 		pins = "sdc2_clk";</div><div class='hunk'>@@ -457,4 +1049,22 @@</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	slpi_ldo_active_state: slpi-ldo-active-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch_irq_state: touch-irq-state {</div><div class='add'>+		pins = "gpio120";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_i2c11_default {</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-disable;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts<br/>index 486ce175e6bc..89260fce6513 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts</a></div><div class='hunk'>@@ -1,12 +1,13 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2022, Alexander Martinz &lt;amartinz@shiftphones.com&gt;</div><div class='del'>- * Copyright (c) 2022, Caleb Connolly &lt;caleb@connolly.tech&gt;</div><div class='add'>+ * Copyright (c) 2022, Casey Connolly &lt;casey.connolly@linaro.org&gt;</div><div class='ctx'>  * Copyright (c) 2022, Dylan Van Assche &lt;me@dylanvanassche.be&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -17,7 +18,8 @@</div><div class='ctx'> / {</div><div class='ctx'> 	model = "SHIFT SHIFT6mq";</div><div class='ctx'> 	compatible = "shift,axolotl", "qcom,sdm845";</div><div class='del'>-	qcom,msm-id = &lt;321 0x20001&gt;;</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDM845 0x20001&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;11 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -419,10 +421,6 @@</div><div class='ctx'> 			   &lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -452,7 +450,6 @@</div><div class='ctx'> 		irq-gpio = &lt;&amp;tlmm 125 GPIO_TRANSITORY&gt;;</div><div class='ctx'> 		touchscreen-size-x = &lt;1080&gt;;</div><div class='ctx'> 		touchscreen-size-y = &lt;2160&gt;;</div><div class='del'>-		focaltech,max-touch-number = &lt;5&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi<br/>index b02a1dc5fecd..f3f4c0900572 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2021, Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -12,7 +13,7 @@</div><div class='ctx'> #include "pmi8998.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	qcom,msm-id = &lt;321 0x20001&gt;; /* SDM845 v2.1 */</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDM845 0x20001&gt;; /* SDM845 v2.1 */</div><div class='ctx'> 	qcom,board-id = &lt;8 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -415,10 +416,6 @@</div><div class='ctx'> 			&lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpi_dma0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi<br/>index 617b17b2d7d9..7480c8d7ac5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -32,7 +33,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* required for bootloader to select correct board */</div><div class='ctx'> 	qcom,board-id = &lt;69 0&gt;;</div><div class='del'>-	qcom,msm-id = &lt;321 0x20001&gt;;</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDM845 0x20001&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial1 = &amp;uart6;</div><div class='hunk'>@@ -239,7 +240,7 @@</div><div class='ctx'> 			   &lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='add'>+&amp;gpi_dma1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -392,15 +393,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -408,6 +409,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc_2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -513,6 +518,37 @@</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		bias-pull-up;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ts_int_default: ts-int-default-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		output-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_reset_default: ts-reset-default-state {</div><div class='add'>+		pins = "gpio32";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_int_sleep: ts-int-sleep-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		output-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_reset_sleep: ts-reset-sleep-state {</div><div class='add'>+		pins = "gpio32";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart6 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts<br/>index 76931ebad065..2d6f0e382a6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts</a></div><div class='hunk'>@@ -13,3 +13,26 @@</div><div class='ctx'> 	compatible = "ebbg,ft8719";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@38 {</div><div class='add'>+		compatible = "focaltech,ft8719";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 31 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		panel = &lt;&amp;display_panel&gt;;</div><div class='add'>+</div><div class='add'>+		iovcc-supply = &lt;&amp;vreg_l14a_1p8&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;lab&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int_default &amp;ts_reset_default&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;ts_int_sleep &amp;ts_reset_sleep&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+		touchscreen-size-x = &lt;1080&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;2246&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts<br/>index e9427851ebaa..b58964cde834 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts</a></div><div class='hunk'>@@ -13,3 +13,26 @@</div><div class='ctx'> 	compatible = "tianma,fhd-video", "novatek,nt36672a";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@1 {</div><div class='add'>+		compatible = "novatek,nt36672a-ts";</div><div class='add'>+		reg = &lt;0x01&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 31 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 32 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		panel = &lt;&amp;display_panel&gt;;</div><div class='add'>+</div><div class='add'>+		iovcc-supply = &lt;&amp;vreg_l14a_1p8&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;lab&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts_int_default &amp;ts_reset_default&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;ts_int_sleep &amp;ts_reset_sleep&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+		touchscreen-size-x = &lt;1080&gt;;</div><div class='add'>+		touchscreen-size-y = &lt;2246&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts<br/>index e386b504e978..1c50a0563bc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -38,7 +39,7 @@</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='ctx'> 	/* required for bootloader to select correct board */</div><div class='del'>-	qcom,msm-id = &lt;0x141 0x20001&gt;;</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SDM845 0x20001&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;0x2a 0x0&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -381,10 +382,6 @@</div><div class='ctx'> 				&lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpi_dma0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -547,15 +544,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi<br/>index 54077549b9da..13c9515260ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm845.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm845.dtsi</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,camcc-sdm845.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sdm845.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sdm845.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,lpass-sdm845.h&gt;</div><div class='hunk'>@@ -91,7 +92,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -103,16 +104,16 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -120,7 +121,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -132,19 +133,19 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -156,19 +157,19 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -181,18 +182,18 @@</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -204,19 +205,19 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -228,19 +229,19 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -252,19 +253,19 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo385";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -276,50 +277,50 @@</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_EBI1 3&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -327,7 +328,7 @@</div><div class='ctx'> 		cpu_idle_states: idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -337,7 +338,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -349,7 +350,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -717,57 +718,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2326,14 +2327,30 @@</div><div class='ctx'> 			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000&gt;,</div><div class='ctx'> 				 &lt;0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='hunk'>@@ -2435,14 +2452,30 @@</div><div class='ctx'> 			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000&gt;,</div><div class='ctx'> 				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "msi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='hunk'>@@ -3615,7 +3648,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07040000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3635,7 +3668,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07140000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3655,7 +3688,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07240000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3675,7 +3708,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07340000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3695,7 +3728,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07440000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3715,7 +3748,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07540000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3735,7 +3768,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07640000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3755,7 +3788,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07740000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3959,7 +3992,7 @@</div><div class='ctx'> 			compatible = "qcom,sdm845-lmh";</div><div class='ctx'> 			reg = &lt;0 0x17d70800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='hunk'>@@ -3971,7 +4004,7 @@</div><div class='ctx'> 			compatible = "qcom,sdm845-lmh";</div><div class='ctx'> 			reg = &lt;0 0x17d78800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;65000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;94500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;95000&gt;;</div><div class='hunk'>@@ -4056,7 +4089,7 @@</div><div class='ctx'> 					reg = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 					usb_1_qmpphy_dp_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;dp_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;mdss_dp_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -4139,6 +4172,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -4215,6 +4250,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_2_hsphy&gt;, &lt;&amp;usb_2_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -4249,14 +4286,6 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			video-core0 {</div><div class='del'>-				compatible = "venus-decoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			video-core1 {</div><div class='del'>-				compatible = "venus-encoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			venus_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='hunk'>@@ -4326,16 +4355,16 @@</div><div class='ctx'> 				"vfe1",</div><div class='ctx'> 				"vfe_lite";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				&lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "csid0",</div><div class='ctx'> 				"csid1",</div><div class='ctx'> 				"csid2",</div><div class='hunk'>@@ -4541,7 +4570,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sdm845-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_AXI_CLK&gt;,</div><div class='hunk'>@@ -4566,7 +4595,7 @@</div><div class='ctx'> 					port@0 {</div><div class='ctx'> 						reg = &lt;0&gt;;</div><div class='ctx'> 						dpu_intf0_out: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='add'>+							remote-endpoint = &lt;&amp;mdss_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='hunk'>@@ -4627,12 +4656,19 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='del'>-				clock-names = "core_iface", "core_aux", "ctrl_link",</div><div class='del'>-					      "ctrl_link_iface", "stream_pixel";</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='add'>+				clock-names = "core_iface",</div><div class='add'>+					      "core_aux",</div><div class='add'>+					      "ctrl_link",</div><div class='add'>+					      "ctrl_link_iface",</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='ctx'> 				phy-names = "dp";</div><div class='hunk'>@@ -4645,14 +4681,14 @@</div><div class='ctx'> 					#size-cells = &lt;0&gt;;</div><div class='ctx'> 					port@0 {</div><div class='ctx'> 						reg = &lt;0&gt;;</div><div class='del'>-						dp_in: endpoint {</div><div class='add'>+						mdss_dp_in: endpoint {</div><div class='ctx'> 							remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='del'>-						dp_out: endpoint {</div><div class='add'>+						mdss_dp_out: endpoint {</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_1_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -4704,8 +4740,10 @@</div><div class='ctx'> 					      "core",</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='hunk'>@@ -4776,8 +4814,10 @@</div><div class='ctx'> 					      "core",</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='hunk'>@@ -4948,8 +4988,6 @@</div><div class='ctx'> </div><div class='ctx'> 			operating-points-v2 = &lt;&amp;gmu_opp_table&gt;;</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='ctx'> 			gmu_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='hunk'>@@ -4971,10 +5009,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -5074,18 +5112,18 @@</div><div class='ctx'> 			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		sram@146bf000 {</div><div class='add'>+		sram@14680000 {</div><div class='ctx'> 			compatible = "qcom,sdm845-imem", "syscon", "simple-mfd";</div><div class='del'>-			reg = &lt;0 0x146bf000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0 0x14680000 0 0x40000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			ranges = &lt;0 0 0x146bf000 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x14680000 0x40000&gt;;</div><div class='ctx'> </div><div class='del'>-			pil-reloc@94c {</div><div class='add'>+			pil-reloc@3f94c {</div><div class='ctx'> 				compatible = "qcom,pil-reloc-info";</div><div class='del'>-				reg = &lt;0x94c 0xc8&gt;;</div><div class='add'>+				reg = &lt;0x3f94c 0xc8&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -5262,8 +5300,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apps_rsc: rsc@179c0000 {</div><div class='add'>+			compatible = "qcom,sdm845-rpmh-apps-rsc", "qcom,rpmh-rsc";</div><div class='ctx'> 			label = "apps_rsc";</div><div class='del'>-			compatible = "qcom,rpmh-rsc";</div><div class='ctx'> 			reg = &lt;0 0x179c0000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x179d0000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x179e0000 0 0x10000&gt;;</div><div class='hunk'>@@ -5277,7 +5315,7 @@</div><div class='ctx'> 					  &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -5365,11 +5403,11 @@</div><div class='ctx'> 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 			reg = &lt;0 0x17184000 0 0x2a000&gt;;</div><div class='del'>-			num-channels = &lt;31&gt;;</div><div class='add'>+			num-channels = &lt;23&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;1&gt;;</div><div class='del'>-			qcom,num-ees = &lt;2&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x1806 0x0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts<br/>index f18050848cd8..90efbb7e3799 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts</a></div><div class='hunk'>@@ -355,10 +355,6 @@</div><div class='ctx'> 			   &lt;GCC_LPASS_SWAY_CLK&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gmu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	zap-shader {</div><div class='hunk'>@@ -425,9 +421,46 @@</div><div class='ctx'> 			data-role = "host";</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * connected to the onboard USB hub, orientation is</div><div class='del'>-			 * handled by the controller</div><div class='add'>+			 * connected to the onboard USB hub, each pair of lanes</div><div class='add'>+			 * (and D+/D- pair) is connected to a separate port on</div><div class='add'>+			 * the hub.</div><div class='ctx'> 			 */</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi1_hs_in_1: endpoint@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_hub_2_1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					ucsi1_hs_in_2: endpoint@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_hub_2_2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					ucsi1_ss_in_1: endpoint@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_hub_3_1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					ucsi1_ss_in_2: endpoint@2 {</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_hub_3_2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -565,15 +598,11 @@</div><div class='ctx'> &amp;mdss_dsi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	vdda-supply = &lt;&amp;vreg_l26a_1p2&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;sn65dsi86_in_a&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;sn65dsi86_in_a&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='hunk'>@@ -616,18 +645,24 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;slpi_pas {</div><div class='add'>+	firmware-name = "qcom/sdm850/LENOVO/81JL/qcslpi850.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sound {</div><div class='ctx'> 	compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard";</div><div class='ctx'> 	model = "Lenovo-YOGA-C630-13Q50";</div><div class='hunk'>@@ -636,10 +671,7 @@</div><div class='ctx'> 		"RX_BIAS", "MCLK",</div><div class='ctx'> 		"AMIC2", "MIC BIAS2",</div><div class='ctx'> 		"SpkrLeft IN", "SPK1 OUT",</div><div class='del'>-		"SpkrRight IN", "SPK2 OUT",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL3",  "MultiMedia3 Playback",</div><div class='del'>-		"MultiMedia2 Capture", "MM_UL2";</div><div class='add'>+		"SpkrRight IN", "SPK2 OUT";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='hunk'>@@ -843,6 +875,69 @@</div><div class='ctx'> </div><div class='ctx'> &amp;usb_2_dwc3 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	usb_hub_2_x: hub@1 {</div><div class='add'>+		compatible = "usb5e3,610";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;usb_hub_3_x&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		camera@3 {</div><div class='add'>+			compatible = "usb4f2,b61e";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				usb_hub_2_1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ucsi1_hs_in_1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				usb_hub_2_2: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ucsi1_hs_in_2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_hub_3_x: hub@2 {</div><div class='add'>+		compatible = "usb5e3,620";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;usb_hub_2_x&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				usb_hub_3_1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ucsi1_ss_in_1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				usb_hub_3_2: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ucsi1_ss_in_2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_2_hsphy {</div><div class='hunk'>@@ -910,7 +1005,7 @@</div><div class='ctx'> 	vdd-3.3-ch1-supply = &lt;&amp;vreg_l23a_3p3&gt;;</div><div class='ctx'> </div><div class='ctx'> 	qcom,snoc-host-cap-8bit-quirk;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Lenovo_C630";</div><div class='add'>+	qcom,calibration-variant = "Lenovo_C630";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;crypto {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts<br/>index 26217836c270..a676d3ea01b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts</a></div><div class='hunk'>@@ -425,15 +425,15 @@</div><div class='ctx'> </div><div class='ctx'> &amp;q6asmdai {</div><div class='ctx'> 	dai@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	dai@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -445,10 +445,7 @@</div><div class='ctx'> 		"RX_BIAS", "MCLK",</div><div class='ctx'> 		"AMIC2", "MIC BIAS2",</div><div class='ctx'> 		"SpkrLeft IN", "SPK1 OUT",</div><div class='del'>-		"SpkrRight IN", "SPK2 OUT",</div><div class='del'>-		"MM_DL1",  "MultiMedia1 Playback",</div><div class='del'>-		"MM_DL3",  "MultiMedia3 Playback",</div><div class='del'>-		"MultiMedia2 Capture", "MM_UL2";</div><div class='add'>+		"SpkrRight IN", "SPK2 OUT";</div><div class='ctx'> </div><div class='ctx'> 	mm1-dai-link {</div><div class='ctx'> 		link-name = "MultiMedia1";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdx75-idp.dts b/arch/arm64/boot/dts/qcom/sdx75-idp.dts<br/>index f1bbe7ab01ab..06cacec3461f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdx75-idp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdx75-idp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdx75-idp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdx75-idp.dts</a></div><div class='hunk'>@@ -278,6 +278,24 @@</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l10b_3p08&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qpic_bam {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qpic_nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		nand-ecc-strength = &lt;8&gt;;</div><div class='add'>+		nand-ecc-step-size = &lt;512&gt;;</div><div class='add'>+		nand-bus-width = &lt;8&gt;;</div><div class='add'>+		/* efs2 partition is secured */</div><div class='add'>+		secure-regions = /bits/ 64 &lt;0x680000 0xb00000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi<br/>index 7cf3fcb469a8..75bfc19f412c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sdx75.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sdx75.dtsi</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -43,25 +43,25 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -69,85 +69,85 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -155,7 +155,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_OFF: cpu-sleep-0 {</div><div class='add'>+			cpu_off: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;235&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;428&gt;;</div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CPU_RAIL_OFF: cpu-rail-sleep-1 {</div><div class='add'>+			cpu_rail_off: cpu-rail-sleep-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				entry-latency-us = &lt;800&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;750&gt;;</div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;1050&gt;;</div><div class='hunk'>@@ -184,7 +184,7 @@</div><div class='ctx'> 				min-residency-us = &lt;5309&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41001344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2761&gt;;</div><div class='hunk'>@@ -192,7 +192,7 @@</div><div class='ctx'> 				min-residency-us = &lt;8467&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_2: cluster-sleep-2 {</div><div class='add'>+			cluster_sleep_2: cluster-sleep-2 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100b344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2793&gt;;</div><div class='hunk'>@@ -235,33 +235,33 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF &amp;CPU_RAIL_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off &amp;cpu_rail_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF &amp;CPU_RAIL_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off &amp;cpu_rail_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF &amp;CPU_RAIL_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off &amp;cpu_rail_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CPU_OFF &amp;CPU_RAIL_OFF&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cpu_off &amp;cpu_rail_off&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0 &amp;CLUSTER_SLEEP_1 &amp;CLUSTER_SLEEP_2&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0 &amp;cluster_sleep_1 &amp;cluster_sleep_2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -880,6 +880,39 @@</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		qpic_bam: dma-controller@1c9c000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01c9c000 0x0 0x1c000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_QPIC_CLK&gt;;</div><div class='add'>+			clock-names = "bam_clk";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x100 0x3&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qpic_nand: nand-controller@1cc8000 {</div><div class='add'>+			compatible = "qcom,sdx75-nand", "qcom,sdx55-nand";</div><div class='add'>+			reg = &lt;0x0 0x01cc8000 0x0 0x10000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_QPIC_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "aon";</div><div class='add'>+			dmas = &lt;&amp;qpic_bam 0&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 1&gt;,</div><div class='add'>+			       &lt;&amp;qpic_bam 2&gt;;</div><div class='add'>+			dma-names = "tx",</div><div class='add'>+				    "rx",</div><div class='add'>+				    "cmd";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x100 0x3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tcsr_mutex: hwlock@1f40000 {</div><div class='ctx'> 			compatible = "qcom,tcsr-mutex";</div><div class='ctx'> 			reg = &lt;0x0 0x01f40000 0x0 0x40000&gt;;</div><div class='hunk'>@@ -893,7 +926,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sdx75-mpss-pas";</div><div class='del'>-			reg = &lt;0 0x04080000 0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0 0x04080000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1008,14 +1041,16 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 9 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "hs_phy_irq",</div><div class='del'>-					  "ss_phy_irq",</div><div class='add'>+					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='del'>-					  "dp_hs_phy_irq";</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc GCC_USB30_GDSC&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1037,6 +1072,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x80 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_hsphy&gt;,</div><div class='ctx'> 				       &lt;&amp;usb_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy",</div><div class='hunk'>@@ -1075,7 +1112,7 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		aoss_qmp: power-controller@c310000 {</div><div class='add'>+		aoss_qmp: power-management@c310000 {</div><div class='ctx'> 			compatible = "qcom,sdx75-aoss-qmp", "qcom,aoss-qmp";</div><div class='ctx'> 			reg = &lt;0 0x0c310000 0 0x1000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;ipcc&gt;;</div><div class='hunk'>@@ -1444,7 +1481,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> 			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS    3&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi<br/>index c5add8f44fc0..cd8c8e59976e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm4250.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm4250.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm4250.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm4250.dtsi</a></div><div class='hunk'>@@ -5,34 +5,73 @@</div><div class='ctx'> </div><div class='ctx'> #include "sm6115.dtsi"</div><div class='ctx'> </div><div class='del'>-&amp;CPU0 {</div><div class='add'>+&amp;cpu0 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU1 {</div><div class='add'>+&amp;cpu1 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU2 {</div><div class='add'>+&amp;cpu2 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU3 {</div><div class='add'>+&amp;cpu3 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU4 {</div><div class='add'>+&amp;cpu4 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU5 {</div><div class='add'>+&amp;cpu5 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU6 {</div><div class='add'>+&amp;cpu6 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;CPU7 {</div><div class='add'>+&amp;cpu7 {</div><div class='ctx'> 	compatible = "qcom,kryo240";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	compatible = "qcom,sm4250-lpass-lpi-pinctrl";</div><div class='add'>+	gpio-ranges = &lt;&amp;lpass_tlmm 0 0 27&gt;;</div><div class='add'>+</div><div class='add'>+	lpi_i2s2_active: lpi-i2s2-active-state {</div><div class='add'>+		sck-pins {</div><div class='add'>+			pins = "gpio10";</div><div class='add'>+			function = "i2s2_clk";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ws-pins {</div><div class='add'>+			pins = "gpio11";</div><div class='add'>+			function = "i2s2_ws";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		data-pins {</div><div class='add'>+			pins = "gpio12";</div><div class='add'>+			function = "i2s2_data";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;8&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ext-mclk1-pins {</div><div class='add'>+			pins = "gpio18";</div><div class='add'>+			function = "ext_mclk1_a";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi<br/>index 1e05cd00b635..d217d922811e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm4450.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm4450.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm4450.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm4450.dtsi</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm4450-gpucc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -29,7 +31,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -46,25 +48,25 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> </div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -72,178 +74,178 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -251,7 +253,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;800&gt;;</div><div class='hunk'>@@ -260,7 +262,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;600&gt;;</div><div class='hunk'>@@ -271,7 +273,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;1050&gt;;</div><div class='hunk'>@@ -279,7 +281,7 @@</div><div class='ctx'> 				min-residency-us = &lt;5309&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41003344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;1561&gt;;</div><div class='hunk'>@@ -309,57 +311,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;, &lt;&amp;CLUSTER_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;, &lt;&amp;cluster_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -579,7 +581,7 @@</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS    2&gt;, &lt;SLEEP_TCS     3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS      3&gt;, &lt;CONTROL_TCS   0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -591,6 +593,72 @@</div><div class='ctx'> 				clocks = &lt;&amp;xo_board&gt;;</div><div class='ctx'> 				clock-names = "xo";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			rpmhpd: power-controller {</div><div class='add'>+				compatible = "qcom,sm4450-rpmhpd";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				rpmhpd_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_ret: opp-16 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_min_svs: opp-48 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d1: opp-56 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs: opp-64 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_l1: opp-80 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_l2: opp-96 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs: opp-128 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l1: opp-192 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l2: opp-224 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom: opp-256 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l1: opp-320 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l2: opp-336 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo: opp-384 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l1: opp-416 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpufreq_hw: cpufreq@17d91000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts<br/>index f60d36c03b9b..ad347ccd1975 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts</a></div><div class='hunk'>@@ -566,7 +566,7 @@</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;pm6125_l17a&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;pm6125_l23a&gt;;</div><div class='ctx'> </div><div class='del'>-	qcom,ath10k-calibration-variant = "Fxtec_QX1050";</div><div class='add'>+	qcom,calibration-variant = "Fxtec_QX1050";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi<br/>index 41216cc319d6..91fc36b59abf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6115.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2021, Iskren Chernev &lt;iskren.chernev@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm6115.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm6115-dispcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm6115-gpucc.h&gt;</div><div class='hunk'>@@ -14,6 +15,9 @@</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm6115.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -40,7 +44,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -48,18 +52,18 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='hunk'>@@ -67,13 +71,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='hunk'>@@ -81,13 +85,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='hunk'>@@ -95,13 +99,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -109,18 +113,18 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;282&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='hunk'>@@ -128,13 +132,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;282&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='hunk'>@@ -142,13 +146,13 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;282&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='hunk'>@@ -156,46 +160,46 @@</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;282&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -203,7 +207,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -213,7 +217,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -225,7 +229,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_0_SLEEP_0: cluster-sleep-0-0 {</div><div class='add'>+			cluster_0_sleep_0: cluster-sleep-0-0 {</div><div class='ctx'> 				/* GDHS */</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000022&gt;;</div><div class='hunk'>@@ -234,7 +238,7 @@</div><div class='ctx'> 				min-residency-us = &lt;782&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_0_SLEEP_1: cluster-sleep-0-1 {</div><div class='add'>+			cluster_0_sleep_1: cluster-sleep-0-1 {</div><div class='ctx'> 				/* Power Collapse */</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='hunk'>@@ -243,7 +247,7 @@</div><div class='ctx'> 				min-residency-us = &lt;7376&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_1_SLEEP_0: cluster-sleep-1-0 {</div><div class='add'>+			cluster_1_sleep_0: cluster-sleep-1-0 {</div><div class='ctx'> 				/* GDHS */</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000042&gt;;</div><div class='hunk'>@@ -252,7 +256,7 @@</div><div class='ctx'> 				min-residency-us = &lt;660&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_1_SLEEP_1: cluster-sleep-1-1 {</div><div class='add'>+			cluster_1_sleep_1: cluster-sleep-1-1 {</div><div class='ctx'> 				/* Power Collapse */</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='hunk'>@@ -306,62 +310,62 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_0_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_1_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_0_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_0_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_0_SLEEP_0&gt;, &lt;&amp;CLUSTER_0_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_0_sleep_0&gt;, &lt;&amp;cluster_0_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_1_PD: power-domain-cpu-cluster1 {</div><div class='add'>+		cluster_1_pd: power-domain-cpu-cluster1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_1_SLEEP_0&gt;, &lt;&amp;CLUSTER_1_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_1_sleep_0&gt;, &lt;&amp;cluster_1_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -717,6 +721,13 @@</div><div class='ctx'> 				bias-pull-up;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			qup_uart4_default: qup-uart4-default-state {</div><div class='add'>+				pins = "gpio12", "gpio13";</div><div class='add'>+				function = "qup4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			sdc1_state_on: sdc1-on-state {</div><div class='ctx'> 				clk-pins {</div><div class='ctx'> 					pins = "sdc1_clk";</div><div class='hunk'>@@ -808,6 +819,20 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		lpass_tlmm: pinctrl@a7c0000 {</div><div class='add'>+			compatible = "qcom,sm6115-lpass-lpi-pinctrl";</div><div class='add'>+			reg = &lt;0x0 0x0a7c0000 0x0 0x20000&gt;,</div><div class='add'>+			      &lt;0x0 0x0a950000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+			clock-names = "audio";</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;lpass_tlmm 0 0 19&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gcc: clock-controller@1400000 {</div><div class='ctx'> 			compatible = "qcom,gcc-sm6115";</div><div class='ctx'> 			reg = &lt;0x0 0x01400000 0x0 0x1f0000&gt;;</div><div class='hunk'>@@ -1178,7 +1203,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@4804000 {</div><div class='add'>+		ufs_mem_hc: ufshc@4804000 {</div><div class='ctx'> 			compatible = "qcom,sm6115-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0x0 0x04804000 0x0 0x3000&gt;, &lt;0x0 0x04810000 0x0 0x8000&gt;;</div><div class='ctx'> 			reg-names = "std", "ice";</div><div class='hunk'>@@ -1547,6 +1572,8 @@</div><div class='ctx'> 				reg = &lt;0x0 0x04a90000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S4_CLK&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart4_default&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG&gt;,</div><div class='hunk'>@@ -1856,7 +1883,7 @@</div><div class='ctx'> 			mdp: display-controller@5e01000 {</div><div class='ctx'> 				compatible = "qcom,sm6115-dpu";</div><div class='ctx'> 				reg = &lt;0x0 0x05e01000 0x0 0x8f000&gt;,</div><div class='del'>-				      &lt;0x0 0x05eb0000 0x0 0x2008&gt;;</div><div class='add'>+				      &lt;0x0 0x05eb0000 0x0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -1943,7 +1970,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmpd SM6115_VDDCX&gt;;</div><div class='hunk'>@@ -2017,8 +2045,8 @@</div><div class='ctx'> 			reg = &lt;0x0 0x05f00000 0 0x20000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -2027,7 +2055,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mpss: remoteproc@6080000 {</div><div class='ctx'> 			compatible = "qcom,sm6115-mpss-pas";</div><div class='del'>-			reg = &lt;0x0 0x06080000 0x0 0x100&gt;;</div><div class='add'>+			reg = &lt;0x0 0x06080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2405,7 +2433,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2426,7 +2454,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2447,7 +2475,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2468,7 +2496,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2489,7 +2517,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2510,7 +2538,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2531,7 +2559,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2552,7 +2580,7 @@</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			arm,coresight-loses-context-with-cpu;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -2670,9 +2698,9 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		remoteproc_adsp: remoteproc@ab00000 {</div><div class='add'>+		remoteproc_adsp: remoteproc@a400000 {</div><div class='ctx'> 			compatible = "qcom,sm6115-adsp-pas";</div><div class='del'>-			reg = &lt;0x0 0x0ab00000 0x0 0x100&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0a400000 0x0 0x4040&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2701,6 +2729,76 @@</div><div class='ctx'> 				qcom,remote-pid = &lt;2&gt;;</div><div class='ctx'> 				mboxes = &lt;&amp;apcs_glb 8&gt;;</div><div class='ctx'> </div><div class='add'>+				apr {</div><div class='add'>+					compatible = "qcom,apr-v2";</div><div class='add'>+					qcom,glink-channels = "apr_audio_svc";</div><div class='add'>+					qcom,domain = &lt;APR_DOMAIN_ADSP&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					service@3 {</div><div class='add'>+						reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='add'>+						compatible = "qcom,q6core";</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6afe: service@4 {</div><div class='add'>+						compatible = "qcom,q6afe";</div><div class='add'>+						reg = &lt;APR_SVC_AFE&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+						q6afedai: dais {</div><div class='add'>+							compatible = "qcom,q6afe-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6afecc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6afe-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6asm: service@7 {</div><div class='add'>+						compatible = "qcom,q6asm";</div><div class='add'>+						reg = &lt;APR_SVC_ASM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+						q6asmdai: dais {</div><div class='add'>+							compatible = "qcom,q6asm-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1c1 0x0&gt;;</div><div class='add'>+</div><div class='add'>+							dai@0 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							dai@1 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							dai@2 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6adm: service@8 {</div><div class='add'>+						compatible = "qcom,q6adm";</div><div class='add'>+						reg = &lt;APR_SVC_ADM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+						q6routing: routing {</div><div class='add'>+							compatible = "qcom,q6adm-routing";</div><div class='add'>+							#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				fastrpc {</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='hunk'>@@ -2744,7 +2842,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_cdsp: remoteproc@b300000 {</div><div class='ctx'> 			compatible = "qcom,sm6115-cdsp-pas";</div><div class='del'>-			reg = &lt;0x0 0x0b300000 0x0 0x100000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0b300000 0x0 0x4040&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts<br/>index 9d78bb3f7190..c17545111f49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts</a></div><div class='hunk'>@@ -379,7 +379,7 @@</div><div class='ctx'> 	vdd-1.8-xo-supply = &lt;&amp;pm6125_l16&gt;;</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;pm6125_l17&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;pm6125_l23&gt;;</div><div class='del'>-	qcom,ath10k-calibration-variant = "Lenovo_P11";</div><div class='add'>+	qcom,calibration-variant = "Lenovo_P11";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts<br/>new file mode 100644<br/>index 000000000000..68a237215bd1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts</a></div><div class='hunk'>@@ -0,0 +1,295 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Gabriel Gonzales &lt;semfault@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include "sm6125.dtsi"</div><div class='add'>+#include "pm6125.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Xiaomi Redmi Note 8";</div><div class='add'>+	compatible = "xiaomi,ginkgo", "qcom,sm6125";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	/* required for bootloader to select correct board */</div><div class='add'>+	qcom,msm-id = &lt;QCOM_ID_SM6125&gt;;</div><div class='add'>+	qcom,board-id = &lt;22 0&gt;;</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@5c000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0 0x5c000000 0 (2340 * 1080 * 4)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2340&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		debug_mem: debug@ffb00000 {</div><div class='add'>+			reg = &lt;0x0 0xffb00000 0x0 0xc0000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		last_log_mem: lastlog@ffbc0000 {</div><div class='add'>+			reg = &lt;0x0 0xffbc0000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pstore_mem: ramoops@ffc00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0xffc40000 0x0 0xc0000&gt;;</div><div class='add'>+			record-size = &lt;0x1000&gt;;</div><div class='add'>+			console-size = &lt;0x40000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cmdline_mem: memory@ffd00000 {</div><div class='add'>+			reg = &lt;0x0 0xffd40000 0x0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extcon_usb: extcon-usb {</div><div class='add'>+		compatible = "linux,extcon-usb-gpio";</div><div class='add'>+		id-gpios = &lt;&amp;tlmm 102 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;vol_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm6125_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm6125_gpios {</div><div class='add'>+	vol_up_n: vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsusb_phy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l7a&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l10a&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;vreg_l15a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpm_requests {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,rpm-pm6125-regulators";</div><div class='add'>+</div><div class='add'>+		vreg_s6a: s6 {</div><div class='add'>+			regulator-min-microvolt = &lt;936000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1422000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1a: l1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2a: l2 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1056000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3a: l3 {</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1064000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4a: l4 {</div><div class='add'>+			regulator-min-microvolt = &lt;872000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;976000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a: l5 {</div><div class='add'>+			regulator-min-microvolt = &lt;1648000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a: l6 {</div><div class='add'>+			regulator-min-microvolt = &lt;576000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;656000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7a: l7 {</div><div class='add'>+			regulator-min-microvolt = &lt;872000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;976000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8a: l8 {</div><div class='add'>+			regulator-min-microvolt = &lt;400000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;728000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9a: l9 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1896000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10a: l10 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1896000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11a: l11 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1952000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12a: l12 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1996000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13a: l13 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1832000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14a: l14 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1904000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15a: l15 {</div><div class='add'>+			regulator-min-microvolt = &lt;3104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3232000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16a: l16 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1904000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17a: l17 {</div><div class='add'>+			regulator-min-microvolt = &lt;1248000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l18a: l18 {</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1264000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l19a: l19 {</div><div class='add'>+			regulator-min-microvolt = &lt;1648000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2952000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l20a: l20 {</div><div class='add'>+			regulator-min-microvolt = &lt;1648000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2952000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l21a: l21 {</div><div class='add'>+			regulator-min-microvolt = &lt;2600000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2856000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l22a: l22 {</div><div class='add'>+			regulator-min-microvolt = &lt;2944000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l23a: l23 {</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l24a: l24 {</div><div class='add'>+			regulator-min-microvolt = &lt;2944000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2950000&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_off_state {</div><div class='add'>+	sd-cd-pins {</div><div class='add'>+		pins = "gpio98";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdc2_on_state {</div><div class='add'>+	sd-cd-pins {</div><div class='add'>+		pins = "gpio98";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l24a&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l11a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 98 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l22a&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;22 2&gt;, &lt;28 6&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb3_dwc3 {</div><div class='add'>+	extcon = &lt;&amp;extcon_usb&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi<br/>index 133610d14fc4..8f2d65543373 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6125.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6125.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6125.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6125.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm6125.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm6125.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='hunk'>@@ -28,7 +29,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			clock-output-names = "sleep_clk";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -37,122 +38,122 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@1 {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@2 {</div><div class='add'>+		cpu2: cpu@2 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@3 {</div><div class='add'>+		cpu3: cpu@3 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x3&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@100 {</div><div class='add'>+		cpu4: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@101 {</div><div class='add'>+		cpu5: cpu@101 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@102 {</div><div class='add'>+		cpu6: cpu@102 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@103 {</div><div class='add'>+		cpu7: cpu@103 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo260";</div><div class='ctx'> 			reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1638&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -763,7 +764,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@4804000 {</div><div class='add'>+		ufs_mem_hc: ufshc@4804000 {</div><div class='ctx'> 			compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0x04804000 0x3000&gt;, &lt;0x04810000 0x8000&gt;;</div><div class='ctx'> 			reg-names = "std", "ice";</div><div class='hunk'>@@ -1209,6 +1210,8 @@</div><div class='ctx'> 				phy-names = "usb2-phy";</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				maximum-speed = "high-speed";</div><div class='ctx'> 				dr_mode = "peripheral";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -1248,7 +1251,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@5e01000 {</div><div class='ctx'> 				compatible = "qcom,sm6125-dpu";</div><div class='ctx'> 				reg = &lt;0x05e01000 0x83208&gt;,</div><div class='del'>-				      &lt;0x05eb0000 0x2008&gt;;</div><div class='add'>+				      &lt;0x05eb0000 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='hunk'>@@ -1338,7 +1341,8 @@</div><div class='ctx'> 					      "bus";</div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmpd SM6125_VDDCX&gt;;</div><div class='hunk'>@@ -1413,8 +1417,8 @@</div><div class='ctx'> 			reg = &lt;0x05f00000 0x20000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='ctx'> 				 &lt;0&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi<br/>new file mode 100644<br/>index 000000000000..3d2a1cb02b62<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6150.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6150.dtsi</a></div><div class='hunk'>@@ -0,0 +1,4466 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs615-camcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs615-dispcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs615-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs615-gpucc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,qcs615-videocc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,qcs615-rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_100: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_200: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_300: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@400 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x400&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_400: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@500 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x0 0x500&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+</div><div class='add'>+			l2_500: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@600 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a76";</div><div class='add'>+			reg = &lt;0x0 0x600&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1740&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;404&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_600: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@700 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a76";</div><div class='add'>+			reg = &lt;0x0 0x700&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1740&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;404&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+</div><div class='add'>+			l2_700: l2-cache {</div><div class='add'>+			      compatible = "cache";</div><div class='add'>+			      cache-level = &lt;2&gt;;</div><div class='add'>+			      cache-unified;</div><div class='add'>+			      next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core4 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core5 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core6 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core7 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_0: l3-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dummy_eud: dummy-sink {</div><div class='add'>+		compatible = "arm,coresight-dummy-sink";</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			port {</div><div class='add'>+				eud_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;replicator_swao_out1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	idle-states {</div><div class='add'>+		entry-method = "psci";</div><div class='add'>+</div><div class='add'>+		little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='add'>+			compatible = "arm,idle-state";</div><div class='add'>+			idle-state-name = "silver-power-collapse";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+			entry-latency-us = &lt;549&gt;;</div><div class='add'>+			exit-latency-us = &lt;901&gt;;</div><div class='add'>+			min-residency-us = &lt;1774&gt;;</div><div class='add'>+			local-timer-stop;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='add'>+			compatible = "arm,idle-state";</div><div class='add'>+			idle-state-name = "silver-rail-power-collapse";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='add'>+			entry-latency-us = &lt;702&gt;;</div><div class='add'>+			exit-latency-us = &lt;915&gt;;</div><div class='add'>+			min-residency-us = &lt;4001&gt;;</div><div class='add'>+			local-timer-stop;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='add'>+			compatible = "arm,idle-state";</div><div class='add'>+			idle-state-name = "gold-power-collapse";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='add'>+			entry-latency-us = &lt;523&gt;;</div><div class='add'>+			exit-latency-us = &lt;1244&gt;;</div><div class='add'>+			min-residency-us = &lt;2207&gt;;</div><div class='add'>+			local-timer-stop;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='add'>+			compatible = "arm,idle-state";</div><div class='add'>+			idle-state-name = "gold-rail-power-collapse";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='add'>+			entry-latency-us = &lt;526&gt;;</div><div class='add'>+			exit-latency-us = &lt;1854&gt;;</div><div class='add'>+			min-residency-us = &lt;5555&gt;;</div><div class='add'>+			local-timer-stop;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	domain-idle-states {</div><div class='add'>+		cluster_sleep_0: cluster-sleep-0 {</div><div class='add'>+			compatible = "domain-idle-state";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='add'>+			entry-latency-us = &lt;2752&gt;;</div><div class='add'>+			exit-latency-us = &lt;3048&gt;;</div><div class='add'>+			min-residency-us = &lt;6118&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_sleep_1: cluster-sleep-1 {</div><div class='add'>+			compatible = "domain-idle-state";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x41001344&gt;;</div><div class='add'>+			entry-latency-us = &lt;3263&gt;;</div><div class='add'>+			exit-latency-us = &lt;4562&gt;;</div><div class='add'>+			min-residency-us = &lt;8467&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_sleep_2: cluster-sleep-2 {</div><div class='add'>+			compatible = "domain-idle-state";</div><div class='add'>+			arm,psci-suspend-param = &lt;0x4100b344&gt;;</div><div class='add'>+			entry-latency-us = &lt;3638&gt;;</div><div class='add'>+			exit-latency-us = &lt;6562&gt;;</div><div class='add'>+			min-residency-us = &lt;9826&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the size */</div><div class='add'>+		reg = &lt;0 0x80000000 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm {</div><div class='add'>+			compatible = "qcom,scm-qcs615", "qcom,scm";</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x13000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	camnoc_virt: interconnect-0 {</div><div class='add'>+		compatible = "qcom,qcs615-camnoc-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ipa_virt: interconnect-1 {</div><div class='add'>+		compatible = "qcom,qcs615-ipa-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc_virt: interconnect-2 {</div><div class='add'>+		compatible = "qcom,qcs615-mc-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-adsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;443&gt;, &lt;429&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 172 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		/* On this platform, bit 26 (normally SLPI) is repurposed for ADSP */</div><div class='add'>+		mboxes = &lt;&amp;apss_shared 26&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		adsp_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-cdsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+		qcom,smem = &lt;94&gt;, &lt;432&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 576 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		mboxes = &lt;&amp;apss_shared 6&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		cdsp_smp2p_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_smp2p_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table: opp-table-qup {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-128000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;128000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0</div><div class='add'>+					      &amp;cluster_sleep_1</div><div class='add'>+					      &amp;cluster_sleep_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		aop_cmd_db_mem: aop-cmd-db@85f20000 {</div><div class='add'>+			compatible = "qcom,cmd-db";</div><div class='add'>+			reg = &lt;0x0 0x85f20000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smem_region: smem@86000000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x86000000 0x0 0x200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pil_video_mem: pil-video@93400000 {</div><div class='add'>+			reg = &lt;0x0 0x93400000 0x0 0x500000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rproc_cdsp_mem: rproc-cdsp@93b00000 {</div><div class='add'>+			reg = &lt;0x0 0x93b00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rproc_adsp_mem: rproc-adsp@95900000 {</div><div class='add'>+			reg = &lt;0x0 0x95900000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+		dma-ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@100000 {</div><div class='add'>+			compatible = "qcom,qcs615-gcc";</div><div class='add'>+			reg = &lt;0 0x00100000 0 0x1f0000&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: efuse@780000 {</div><div class='add'>+			compatible = "qcom,qcs615-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0x0 0x00780000 0x0 0x7000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			qusb2_hstx_trim: hstx-trim@1f8 {</div><div class='add'>+				reg = &lt;0x1fb 0x1&gt;;</div><div class='add'>+				bits = &lt;1 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng@793000 {</div><div class='add'>+			compatible = "qcom,qcs615-trng", "qcom,trng";</div><div class='add'>+			reg = &lt;0x0 0x00793000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_1: mmc@7c4000 {</div><div class='add'>+			compatible = "qcom,qcs615-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0x0 0x007c4000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x007c5000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x007c8000 0x0 0x8000&gt;;</div><div class='add'>+			reg-names = "hc",</div><div class='add'>+				    "cqhci",</div><div class='add'>+				    "ice";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq",</div><div class='add'>+					  "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC1_ICE_CORE_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "xo",</div><div class='add'>+				      "ice";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC1_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc1_opp_table&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x02c0 0x0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_SDCC_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='add'>+			qcom,dll-config = &lt;0x000f642c&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+			supports-cqe;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc1_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-200000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-384000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;384000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma0: dma-controller@800000  {</div><div class='add'>+			compatible = "qcom,qcs615-gpi-dma", "qcom,sdm845-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x800000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;8&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xf&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xd6 0x0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_0: geniqup@8c0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x008c0000 0x0 0x6000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_0_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_0_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xc3 0x0&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			uart0: serial@880000 {</div><div class='add'>+				compatible = "qcom,geni-debug-uart";</div><div class='add'>+				reg = &lt;0x0 0x00880000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart0_tx&gt;, &lt;&amp;qup_uart0_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@884000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x884000 0x0 0x4000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c1_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@888000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x888000 0x0 0x4000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@888000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi2_data_clk&gt;, &lt;&amp;qup_spi2_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@888000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart2_cts&gt;, &lt;&amp;qup_uart2_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart2_tx&gt;, &lt;&amp;qup_uart2_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@88c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x88c000 0x0 0x4000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c3_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma1: dma-controller@a00000 {</div><div class='add'>+			compatible = "qcom,qcs615-gpi-dma", "qcom,sdm845-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0xa00000 0x0 0x60000&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;8&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0xf&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x376 0x0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_id_1: geniqup@ac0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0xac0000 0x0 0x2000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_1_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_1_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x363 0x0&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@a80000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c4_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@a80000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi4_data_clk&gt;, &lt;&amp;qup_spi4_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@a80000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa80000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart4_cts&gt;, &lt;&amp;qup_uart4_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart4_tx&gt;, &lt;&amp;qup_uart4_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@a84000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa84000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c5_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@a88000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c6_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@a88000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi6_data_clk&gt;, &lt;&amp;qup_spi6_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart6: serial@a88000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa88000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart6_cts&gt;, &lt;&amp;qup_uart6_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart6_tx&gt;, &lt;&amp;qup_uart6_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0xa8c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c7_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi7: spi@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0xa8c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi7_data_clk&gt;, &lt;&amp;qup_spi7_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0xa8c000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart7_cts&gt;, &lt;&amp;qup_uart7_rts&gt;,</div><div class='add'>+					    &lt;&amp;qup_uart7_tx&gt;, &lt;&amp;qup_uart7_rx&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interconnects = &lt;&amp;aggre1_noc MASTER_BLSP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		config_noc: interconnect@1500000 {</div><div class='add'>+			reg = &lt;0x0 0x01500000 0x0 0x5080&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-config-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_noc: interconnect@1620000 {</div><div class='add'>+			reg = &lt;0x0 0x01620000 0x0 0x1f300&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-system-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aggre1_noc: interconnect@1700000 {</div><div class='add'>+			reg = &lt;0x0 0x01700000 0x0 0x3f200&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-aggre1-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmss_noc: interconnect@1740000 {</div><div class='add'>+			reg = &lt;0x0 0x01740000 0x0 0x1c100&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-mmss-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie: pcie@1c08000 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			compatible = "qcom,pcie-qcs615", "qcom,pcie-sm8150";</div><div class='add'>+			reg = &lt;0x0 0x01c08000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40100000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x01c0b000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf",</div><div class='add'>+				    "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "pipe",</div><div class='add'>+				      "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a";</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_PCIE QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_PCIE_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0x0 &amp;apps_smmu 0x400 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;apps_smmu 0x401 0x1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='add'>+			reset-names = "pci";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie_port0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_phy: phy@1c0e000 {</div><div class='add'>+			compatible = "qcom,qcs615-qmp-gen3x1-pcie-phy";</div><div class='add'>+			reg = &lt;0x0 0x01c0e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CLKREF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE0_PHY_REFGEN_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "refgen",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE0_PHY_REFGEN_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pcie_0_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='add'>+			compatible = "qcom,qcs615-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='add'>+			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x01d90000 0x0 0x8000&gt;;</div><div class='add'>+			reg-names = "std",</div><div class='add'>+				    "ice";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_UNIPRO_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK&gt;;</div><div class='add'>+			clock-names = "core_clk",</div><div class='add'>+				      "bus_aggr_clk",</div><div class='add'>+				      "iface_clk",</div><div class='add'>+				      "core_clk_unipro",</div><div class='add'>+				      "ref_clk",</div><div class='add'>+				      "tx_lane0_sync_clk",</div><div class='add'>+				      "rx_lane0_sync_clk",</div><div class='add'>+				      "ice_core_clk";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_UFS_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "rst";</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;ufs_opp_table&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "ufs-ddr",</div><div class='add'>+					     "cpu-ufs";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc UFS_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x300 0x0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			lanes-per-direction = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;ufs_mem_phy&gt;;</div><div class='add'>+			phy-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ufs_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;37500000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;75000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;150000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-200000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;200000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;150000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_phy: phy@1d87000 {</div><div class='add'>+			compatible = "qcom,qcs615-qmp-ufs-phy", "qcom,sm6115-qmp-ufs-phy";</div><div class='add'>+			reg = &lt;0x0 0x01d87000 0x0 0xe00&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_MEM_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "ref",</div><div class='add'>+				      "ref_aux",</div><div class='add'>+				      "qref";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc UFS_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='add'>+			reset-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01dc4000 0x0 0x24000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+			num-channels = &lt;16&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0104 0x0011&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@1dfa000 {</div><div class='add'>+			compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='add'>+			reg = &lt;0x0 0x01dfa000 0x0 0x6000&gt;;</div><div class='add'>+			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0104 0x0011&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "memory";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1f40000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0x0 0x01f40000 0x0 0x20000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr: syscon@1fc0000 {</div><div class='add'>+			compatible = "qcom,qcs615-tcsr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x01fc0000 0x0 0x30000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@3100000 {</div><div class='add'>+			compatible = "qcom,qcs615-tlmm";</div><div class='add'>+			reg = &lt;0x0 0x03100000 0x0 0x300000&gt;,</div><div class='add'>+			      &lt;0x0 0x03500000 0x0 0x300000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d00000 0x0 0x300000&gt;;</div><div class='add'>+			reg-names = "east",</div><div class='add'>+				    "west",</div><div class='add'>+				    "south";</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 124&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+			qup_i2c1_data_clk: qup-i2c1-data-clk-state {</div><div class='add'>+				pins = "gpio4", "gpio5";</div><div class='add'>+				function = "qup0";</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c2_data_clk: qup-i2c2-data-clk-state {</div><div class='add'>+				pins = "gpio0", "gpio1";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c3_data_clk: qup-i2c3-data-clk-state {</div><div class='add'>+				pins = "gpio18", "gpio19";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c4_data_clk: qup-i2c4-data-clk-state {</div><div class='add'>+				pins = "gpio20", "gpio21";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c5_data_clk: qup-i2c5-data-clk-state {</div><div class='add'>+				pins = "gpio14", "gpio15";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c6_data_clk: qup-i2c6-data-clk-state {</div><div class='add'>+				pins = "gpio6", "gpio7";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c7_data_clk: qup-i2c7-data-clk-state {</div><div class='add'>+				pins = "gpio10", "gpio11";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_data_clk: qup-spi2-data-clk-state {</div><div class='add'>+				pins = "gpio0", "gpio1", "gpio2";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs: qup-spi2-cs-state {</div><div class='add'>+				pins = "gpio3";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs_gpio: qup-spi2-cs-gpio-state {</div><div class='add'>+				pins = "gpio3";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_data_clk: qup-spi4-data-clk-state {</div><div class='add'>+				pins = "gpio20", "gpio21", "gpio22";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs: qup-spi4-cs-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs_gpio: qup-spi4-cs-gpio-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_data_clk: qup-spi6-data-clk-state {</div><div class='add'>+				pins = "gpio6", "gpio7", "gpio8";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs: qup-spi6-cs-state {</div><div class='add'>+				pins = "gpio9";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs_gpio: qup-spi6-cs-gpio-state {</div><div class='add'>+				pins = "gpio9";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_data_clk: qup-spi7-data-clk-state {</div><div class='add'>+				pins = "gpio10", "gpio11", "gpio12";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_cs: qup-spi7-cs-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi7_cs_gpio: qup-spi7-cs-gpio-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "gpio";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_tx: qup-uart0-tx-state {</div><div class='add'>+				pins = "gpio16";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart0_rx: qup-uart0-rx-state {</div><div class='add'>+				pins = "gpio17";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_cts: qup-uart2-cts-state {</div><div class='add'>+				pins = "gpio0";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_rts: qup-uart2-rts-state {</div><div class='add'>+				pins = "gpio1";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_tx: qup-uart2-tx-state {</div><div class='add'>+				pins = "gpio2";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart2_rx: qup-uart2-rx-state {</div><div class='add'>+				pins = "gpio3";</div><div class='add'>+				function = "qup0";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_cts: qup-uart4-cts-state {</div><div class='add'>+				pins = "gpio20";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_rts: qup-uart4-rts-state {</div><div class='add'>+				pins = "gpio21";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_tx: qup-uart4-tx-state {</div><div class='add'>+				pins = "gpio22";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart4_rx: qup-uart4-rx-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_cts: qup-uart6-cts-state {</div><div class='add'>+				pins = "gpio6";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_rts: qup-uart6-rts-state {</div><div class='add'>+				pins = "gpio7";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_tx: qup-uart6-tx-state {</div><div class='add'>+				pins = "gpio8";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart6_rx: qup-uart6-rx-state {</div><div class='add'>+				pins = "gpio9";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_cts: qup-uart7-cts-state {</div><div class='add'>+				pins = "gpio10";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_rts: qup-uart7-rts-state {</div><div class='add'>+				pins = "gpio11";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_tx: qup-uart7-tx-state {</div><div class='add'>+				pins = "gpio12";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_rx: qup-uart7-rx-state {</div><div class='add'>+				pins = "gpio13";</div><div class='add'>+				function = "qup1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_state_on: sdc1-on-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc1_state_off: sdc1-off-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc1_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc1_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc1_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rclk-pins {</div><div class='add'>+					pins = "sdc1_rclk";</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_state_on: sdc2-on-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_state_off: sdc2-off-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					bias-disable;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpucc: clock-controller@5090000 {</div><div class='add'>+			compatible = "qcom,qcs615-gpucc";</div><div class='add'>+			reg = &lt;0 0x05090000 0 0x9000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GPLL0&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm@6002000 {</div><div class='add'>+			compatible = "arm,coresight-stm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06002000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x16280000 0x0 0x180000&gt;;</div><div class='add'>+			reg-names = "stm-base",</div><div class='add'>+				    "stm-stimulus-base";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					stm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in0_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@6004000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06004000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_center_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_monaq_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_ddr_0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_turing_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_vsense_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@8 {</div><div class='add'>+					reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in8: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_dcc_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@9 {</div><div class='add'>+					reg = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in9: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_prng_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@b {</div><div class='add'>+					reg = &lt;11&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in11: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_qm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@c {</div><div class='add'>+					reg = &lt;12&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in12: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_west_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@d {</div><div class='add'>+					reg = &lt;13&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_qdss_in13: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_pimem_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_qdss_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_qatb_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6005000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06005000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_qatb_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_qatb_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in0_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6010000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06010000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6011000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06011000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6012000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06012000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6013000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06013000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6014000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06014000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6015000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06015000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6016000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06016000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6017000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06017000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6018000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06018000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6019000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06019000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601a000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601c000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601d000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601e000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@601f000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0601f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6041000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06041000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in0_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_qatb_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in0_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;stm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_in0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_merg_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6042000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06042000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in1_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator_swao_out0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in1_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_wcss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in1_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_in1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_merg_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6045000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06045000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_merg_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_merg_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_merg_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmc_etf_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@6046000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06046000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmc_etf_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					replicator0_out1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator1_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc@6047000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06047000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_merg_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@604a000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0604a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator1_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator0_out1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_swao_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@683b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0683b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6840000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06840000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_vsense_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@684c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0684c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_prng_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in9&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6850000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06850000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_pimem_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in13&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6860000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06860000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_turing_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_turing_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6861000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06861000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_turing_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_turing_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_turing_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6867000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06867000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6870000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06870000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_dcc_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in8&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@699c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x0699c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_wcss_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@69c0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x069c0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_monaq_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_monaq_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@69c3000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x069c3000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_monaq_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_monaq_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_monaq_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@69d0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x069d0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_qm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in11&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6a00000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a00000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_ddr_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_ddr_0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6a02000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a02000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6a03000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a03000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6a10000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a10000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6a11000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a11000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6a05000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06a05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_ddr_0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_ddr_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_ddr_0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@6b01000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b01000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_swao_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_swao0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					tpda_swao_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_swao1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_swao_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_swao_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6b02000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b02000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_swao0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_swao_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6b03000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b03000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_swao1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_swao_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6b04000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6b05000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6b06000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b06000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6b07000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b07000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@6b08000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_swao_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_swao_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_swao_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_swao_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmc_etf_swao_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc@6b09000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b09000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_swao_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_swao_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_swao_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;replicator_swao_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@6b0a000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b0a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator_swao_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmc_etf_swao_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					replicator_swao_out0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					replicator_swao_out1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;eud_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6b21000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b21000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6b48000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06b48000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_west_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in12&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6c13000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06c13000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			/* Not all required clocks can be enabled from the OS */</div><div class='add'>+			status = "fail";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6c20000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06c20000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@6c28000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06c28000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_center_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_qdss_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6c29000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06c29000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@6c2a000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x06c2a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7020000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07020000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7040000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07040000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7120000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07120000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7140000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07140000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7220000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07220000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7240000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07240000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm2_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7320000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07320000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7340000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07340000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7420000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07420000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7440000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07440000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm4_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7520000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07520000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7540000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07540000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm5_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7620000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07620000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7640000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07640000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm6_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7720000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07720000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etm@7740000 {</div><div class='add'>+			compatible = "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07740000 0x0 0x1000&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			arm,coresight-loses-context-with-cpu;</div><div class='add'>+			qcom,skip-power-up;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etm7_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@7800000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07800000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm2_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm4_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm5_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm6_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etm7_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@7810000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07810000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_merg_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_merg_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_olc_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_merg_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_llm_silver_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_merg_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_llm_gold_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_apss_merg_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_apss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_merg_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@7830000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07830000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_olc_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_olc_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@7832000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07832000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_olc_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_olc_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_olc_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@7860000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07860000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_apss_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_apss_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@7862000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07862000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_apss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_apss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_apss_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@78a0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078a0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_llm_silver_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_llm_silver_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@78b0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078b0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_llm_gold_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpda_llm_gold_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@78c0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078c0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_llm_silver_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_llm_silver_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_llm_silver_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@78d0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078d0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_llm_gold_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tpdm_llm_gold_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpda_llm_gold_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_merg_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@78e0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078e0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@78f0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x078f0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@7900000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x07900000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_cdsp: remoteproc@8300000 {</div><div class='add'>+			compatible = "qcom,qcs615-cdsp-pas", "qcom,sm8150-cdsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x08300000 0x0 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			power-domain-names = "cx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;rproc_cdsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;cdsp_smp2p_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts = &lt;GIC_SPI 574 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;apss_shared 4&gt;;</div><div class='add'>+				label = "cdsp";</div><div class='add'>+				qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "cdsp";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1081 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1082 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1083 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1084 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1085 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1086 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu@90b6300 {</div><div class='add'>+			compatible = "qcom,qcs615-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x090b6300 0x0 0x600&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			cpu_bwmon_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-0 {</div><div class='add'>+					opp-peak-kBps = &lt;12896000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1 {</div><div class='add'>+					opp-peak-kBps = &lt;14928000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu@90cd000 {</div><div class='add'>+			compatible = "qcom,qcs615-llcc-bwmon", "qcom,sc7280-llcc-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x090cd000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 667 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;llcc_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			llcc_bwmon_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-0 {</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1 {</div><div class='add'>+					opp-peak-kBps = &lt;1200000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-2 {</div><div class='add'>+					opp-peak-kBps = &lt;1804800&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-3 {</div><div class='add'>+					opp-peak-kBps = &lt;2188800&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-4 {</div><div class='add'>+					opp-peak-kBps = &lt;2726400&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-5 {</div><div class='add'>+					opp-peak-kBps = &lt;3072000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-6 {</div><div class='add'>+					opp-peak-kBps = &lt;4070400&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-7 {</div><div class='add'>+					opp-peak-kBps = &lt;5414400&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-8 {</div><div class='add'>+					opp-peak-kBps = &lt;6220800&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_2: mmc@8804000 {</div><div class='add'>+			compatible = "qcom,qcs615-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0x0 0x08804000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "hc";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq",</div><div class='add'>+					  "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc2_opp_table&gt;;</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x02a0 0x0&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_SDCC2_BCR&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr",</div><div class='add'>+					     "cpu-sdhc";</div><div class='add'>+</div><div class='add'>+			qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc2_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-202000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;202000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dc_noc: interconnect@9160000 {</div><div class='add'>+			reg = &lt;0x0 0x09160000 0x0 0x3200&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-dc-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		llcc: system-cache-controller@9200000 {</div><div class='add'>+			compatible = "qcom,qcs615-llcc";</div><div class='add'>+			reg = &lt;0x0 0x09200000 0x0 0x50000&gt;,</div><div class='add'>+			      &lt;0x0 0x09600000 0x0 0x50000&gt;;</div><div class='add'>+			reg-names = "llcc0_base",</div><div class='add'>+				    "llcc_broadcast_base";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem_noc: interconnect@9680000 {</div><div class='add'>+			reg = &lt;0x0 0x09680000 0x0 0x3e200&gt;;</div><div class='add'>+			compatible = "qcom,qcs615-gem-noc";</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		venus: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,qcs615-venus", "qcom,sc7180-venus";</div><div class='add'>+			reg = &lt;0x0 0x0aa00000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "bus",</div><div class='add'>+				      "vcodec0_core",</div><div class='add'>+				      "vcodec0_bus";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VENUS_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VCODEC0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "cx";</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;venus_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "video-mem",</div><div class='add'>+					     "cpu-cfg";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xe60 0x20&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;pil_video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			venus_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-133330000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;133330000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-240000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;240000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-300000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-380000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;380000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-410000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;410000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-460000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;460000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		videocc: clock-controller@ab00000 {</div><div class='add'>+			compatible = "qcom,qcs615-videocc";</div><div class='add'>+			reg = &lt;0 0x0ab00000 0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camcc: clock-controller@ad00000 {</div><div class='add'>+			compatible = "qcom,qcs615-camcc";</div><div class='add'>+			reg = &lt;0 0x0ad00000 0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dispcc: clock-controller@af00000 {</div><div class='add'>+			compatible = "qcom,qcs615-dispcc";</div><div class='add'>+			reg = &lt;0 0x0af00000 0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdc: interrupt-controller@b220000 {</div><div class='add'>+			compatible = "qcom,qcs615-pdc", "qcom,pdc";</div><div class='add'>+			reg = &lt;0x0 0x0b220000 0x0 0x30000&gt;,</div><div class='add'>+			      &lt;0x0 0x17c000f0 0x0 0x64&gt;;</div><div class='add'>+			qcom,pdc-ranges = &lt;0 480 94&gt;, &lt;94 609 31&gt;, &lt;125 63 1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss_qmp: power-management@c300000 {</div><div class='add'>+			compatible = "qcom,qcs615-aoss-qmp", "qcom,aoss-qmp";</div><div class='add'>+			reg = &lt;0x0 0x0c300000 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 389 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			mboxes = &lt;&amp;apss_shared 0&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram@c3f0000 {</div><div class='add'>+			compatible = "qcom,rpmh-stats";</div><div class='add'>+			reg = &lt;0x0 0x0c3f0000 0x0 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram@14680000 {</div><div class='add'>+			compatible = "qcom,qcs615-imem", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x14680000 0x0 0x2c000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x14680000 0x2c000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			pil-reloc@2a94c {</div><div class='add'>+				compatible = "qcom,pil-reloc-info";</div><div class='add'>+				reg = &lt;0x2a94c 0xc8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_smmu: iommu@15000000 {</div><div class='add'>+			compatible = "qcom,qcs615-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x15000000 0x0 0x80000&gt;;</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi_bus: spmi@c440000 {</div><div class='add'>+			compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x0 0x0c440000 0x0 0x1100&gt;,</div><div class='add'>+			      &lt;0x0 0x0c600000 0x0 0x2000000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e600000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e700000 0x0 0xa0000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c40a000 0x0 0x26000&gt;;</div><div class='add'>+			reg-names = "core",</div><div class='add'>+				    "chnls",</div><div class='add'>+				    "obsrvr",</div><div class='add'>+				    "intr",</div><div class='add'>+				    "cnfg";</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "periph_irq";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@17a00000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,     /* GICD */</div><div class='add'>+			      &lt;0x0 0x17a60000 0x0 0x100000&gt;;    /* GICR * 8 */</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			redistributor-stride = &lt;0x0 0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apss_shared: mailbox@17c00000 {</div><div class='add'>+			compatible = "qcom,qcs615-apss-shared",</div><div class='add'>+				     "qcom,sdm845-apss-shared";</div><div class='add'>+			reg = &lt;0x0 0x17c00000 0x0 0x1000&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog: watchdog@17c10000 {</div><div class='add'>+			compatible = "qcom,apss-wdt-qcs615", "qcom,kpss-wdt";</div><div class='add'>+			reg = &lt;0x0 0x17c10000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@17c20000 {</div><div class='add'>+			compatible = "arm,armv7-timer-mem";</div><div class='add'>+			reg = &lt;0x0 0x17c20000 0x0 0x1000&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0x20000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			frame@17c21000 {</div><div class='add'>+				reg = &lt;0x17c21000 0x1000&gt;,</div><div class='add'>+				      &lt;0x17c22000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c23000 {</div><div class='add'>+				reg = &lt;0x17c23000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;1&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c25000 {</div><div class='add'>+				reg = &lt;0x17c25000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c27000 {</div><div class='add'>+				reg = &lt;0x17c27000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;3&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c29000 {</div><div class='add'>+				reg = &lt;0x17c29000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;4&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c2b000 {</div><div class='add'>+				reg = &lt;0x17c2b000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;5&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@17c2d000 {</div><div class='add'>+				reg = &lt;0x17c2d000 0x1000&gt;;</div><div class='add'>+				frame-number = &lt;6&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_rsc: rsc@18200000 {</div><div class='add'>+			compatible = "qcom,rpmh-rsc";</div><div class='add'>+			reg = &lt;0x0 0x18200000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x18210000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x18220000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "drv-0",</div><div class='add'>+				    "drv-1",</div><div class='add'>+				    "drv-2";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,drv-id = &lt;2&gt;;</div><div class='add'>+			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+			qcom,tcs-config = &lt;ACTIVE_TCS    2&gt;,</div><div class='add'>+					  &lt;SLEEP_TCS     3&gt;,</div><div class='add'>+					  &lt;WAKE_TCS      3&gt;,</div><div class='add'>+					  &lt;CONTROL_TCS   1&gt;;</div><div class='add'>+</div><div class='add'>+			label = "apps_rsc";</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+</div><div class='add'>+			apps_bcm_voter: bcm-voter {</div><div class='add'>+				compatible = "qcom,bcm-voter";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhcc: clock-controller {</div><div class='add'>+				compatible = "qcom,qcs615-rpmh-clk";</div><div class='add'>+				clocks = &lt;&amp;xo_board_clk&gt;;</div><div class='add'>+				clock-names = "xo";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhpd: power-controller {</div><div class='add'>+				compatible = "qcom,qcs615-rpmhpd";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				rpmhpd_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_ret: opp-0 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_min_svs: opp-1 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs: opp-2 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs: opp-3 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l1: opp-4 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom: opp-5 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l1: opp-6 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l2: opp-7 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo: opp-8 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l1: opp-9 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1_hsphy: phy@88e2000 {</div><div class='add'>+			compatible = "qcom,qcs615-qusb2-phy";</div><div class='add'>+			reg = &lt;0x0 0x88e2000 0x0 0x180&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AHB2PHY_WEST_CLK&gt;, &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_ahb", "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='add'>+			nvmem-cells = &lt;&amp;qusb2_hstx_trim&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_hsphy_2: phy@88e3000 {</div><div class='add'>+			compatible = "qcom,qcs615-qusb2-phy";</div><div class='add'>+			reg = &lt;0x0 0x088e3000 0x0 0x180&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AHB2PHY_WEST_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_ahb",</div><div class='add'>+				      "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_SEC_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_qmpphy: phy@88e6000 {</div><div class='add'>+			compatible = "qcom,qcs615-qmp-usb3-phy";</div><div class='add'>+			reg = &lt;0x0 0x88e6000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_CLKREF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AHB2PHY_WEST_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_SP0_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR&gt;;</div><div class='add'>+			reset-names = "phy", "phy_phy";</div><div class='add'>+</div><div class='add'>+			qcom,tcsr-reg = &lt;&amp;tcsr 0xb244&gt;;</div><div class='add'>+</div><div class='add'>+			clock-output-names = "usb3_phy_pipe_clk_src";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1: usb@a6f8800 {</div><div class='add'>+			compatible = "qcom,qcs615-dwc3", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a6f8800 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 9 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 8 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_PRIM_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb_1_dwc3: usb@a600000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x0a600000 0x0 0xcd00&gt;;</div><div class='add'>+</div><div class='add'>+				iommus = &lt;&amp;apps_smmu 0x140 0x0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_qmpphy&gt;;</div><div class='add'>+				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='add'>+				snps,usb3_lpm_capable;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_2: usb@a8f8800 {</div><div class='add'>+			compatible = "qcom,qcs615-dwc3", "qcom,dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a8f8800 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB2_SEC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_SEC_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB2_SEC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_SEC_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB20_SEC_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB2_PRIM_CLKREF_CLK&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB20_SEC_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB20_SEC_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 663 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 662 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 11 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='add'>+					      &lt;&amp;pdc 10 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			interrupt-names = "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB20_SEC_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB20_SEC_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,select-utmi-as-pipe-clk;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			usb_2_dwc3: usb@a800000 {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				reg = &lt;0x0 0x0a800000 0x0 0xcd00&gt;;</div><div class='add'>+</div><div class='add'>+				iommus = &lt;&amp;apps_smmu 0xe0 0x0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				phys = &lt;&amp;usb_hsphy_2&gt;;</div><div class='add'>+				phy-names = "usb2-phy";</div><div class='add'>+</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,has-lpm-erratum;</div><div class='add'>+				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+				maximum-speed = "high-speed";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsens0: thermal-sensor@c263000 {</div><div class='add'>+			compatible = "qcom,qcs615-tsens", "qcom,tsens-v2";</div><div class='add'>+			reg = &lt;0x0 0x0c263000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c222000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "uplow", "critical";</div><div class='add'>+			#qcom,sensors = &lt;16&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_adsp: remoteproc@62400000 {</div><div class='add'>+			compatible = "qcom,qcs615-adsp-pas", "qcom,sm8150-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x62400000 0x0 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			power-domain-names = "cx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;rproc_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;adsp_smp2p_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink_edge: glink-edge {</div><div class='add'>+				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;apss_shared 24&gt;;</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1723 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1724 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1725 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1726 0x0&gt;;</div><div class='add'>+						qcom,nsessions = &lt;5&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpufreq_hw: cpufreq@18323000 {</div><div class='add'>+			compatible = "qcom,qcs615-cpufreq-hw", "qcom,cpufreq-hw";</div><div class='add'>+			reg = &lt;0 0x18323000 0 0x1400&gt;, &lt;0 0x18325800 0 0x1400&gt;;</div><div class='add'>+			reg-names = "freq-domain0", "freq-domain1";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+</div><div class='add'>+			#freq-domain-cells = &lt;1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arch_timer: timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		aoss-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				aoss-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss-0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpuss0-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss-1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpuss1-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss-2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpuss2-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss-3-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpuss3-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-1-0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-1-1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 6&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-1-2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 7&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-1-3-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 8&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				cpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6-hvx-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				q6-hvx-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdm-core-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 11&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				mdm-core-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 12&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				camera-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wlan-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 13&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				wlan-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		display-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 14&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				display-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 15&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				video-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts b/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts<br/>index bf23033a294e..8848043f95f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts</a></div><div class='hunk'>@@ -381,9 +381,16 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;pm6350_l18&gt;;</div><div class='add'>+	vdda-phy-dpdm-supply = &lt;&amp;pm6350_l3&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm6350_l2&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;pm6350_l16&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;pm6350_l22&gt;;</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi<br/>index 7986ddb30f6e..8459b27cacc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6350.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6350.dtsi</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm6350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm6350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sm6350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='hunk'>@@ -18,7 +19,9 @@</div><div class='ctx'> #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-qcom-qmp.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -45,7 +48,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -53,21 +56,21 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -75,7 +78,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -83,24 +86,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -108,24 +111,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -133,24 +136,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -158,24 +161,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -183,24 +186,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -208,24 +211,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1894&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;703&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo560";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -233,61 +236,61 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1894&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;703&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_PC: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_pc: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -295,7 +298,7 @@</div><div class='ctx'> 				min-residency-us = &lt;6118&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_cx_ret: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41001244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3638&gt;;</div><div class='hunk'>@@ -303,7 +306,7 @@</div><div class='ctx'> 				min-residency-us = &lt;8467&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_AOSS_SLEEP: cluster-sleep-2 {</div><div class='add'>+			cluster_aoss_sleep: cluster-sleep-2 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100b244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -315,7 +318,7 @@</div><div class='ctx'> 		cpu_idle_states: idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -325,7 +328,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -335,7 +338,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -345,7 +348,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -504,59 +507,59 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_PC</div><div class='del'>-					      &amp;CLUSTER_SLEEP_CX_RET</div><div class='del'>-					      &amp;CLUSTER_AOSS_SLEEP&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_pc</div><div class='add'>+					      &amp;cluster_sleep_cx_ret</div><div class='add'>+					      &amp;cluster_aoss_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -566,114 +569,114 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='ctx'> 		hyp_mem: memory@80000000 {</div><div class='del'>-			reg = &lt;0 0x80000000 0 0x600000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x600000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		xbl_aop_mem: memory@80700000 {</div><div class='del'>-			reg = &lt;0 0x80700000 0 0x160000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x80700000 0x0 0x160000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmd_db: memory@80860000 {</div><div class='ctx'> 			compatible = "qcom,cmd-db";</div><div class='del'>-			reg = &lt;0 0x80860000 0 0x20000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x80860000 0x0 0x20000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sec_apps_mem: memory@808ff000 {</div><div class='del'>-			reg = &lt;0 0x808ff000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x808ff000 0x0 0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		smem_mem: memory@80900000 {</div><div class='del'>-			reg = &lt;0 0x80900000 0 0x200000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x80900000 0x0 0x200000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cdsp_sec_mem: memory@80b00000 {</div><div class='del'>-			reg = &lt;0 0x80b00000 0 0x1e00000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x80b00000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_camera_mem: memory@86000000 {</div><div class='del'>-			reg = &lt;0 0x86000000 0 0x500000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x86000000 0x0 0x500000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_npu_mem: memory@86500000 {</div><div class='del'>-			reg = &lt;0 0x86500000 0 0x500000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x86500000 0x0 0x500000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_video_mem: memory@86a00000 {</div><div class='del'>-			reg = &lt;0 0x86a00000 0 0x500000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x86a00000 0x0 0x500000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_cdsp_mem: memory@86f00000 {</div><div class='del'>-			reg = &lt;0 0x86f00000 0 0x1e00000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x86f00000 0x0 0x1e00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_adsp_mem: memory@88d00000 {</div><div class='del'>-			reg = &lt;0 0x88d00000 0 0x2800000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x88d00000 0x0 0x2800000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		wlan_fw_mem: memory@8b500000 {</div><div class='del'>-			reg = &lt;0 0x8b500000 0 0x200000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x8b500000 0x0 0x200000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_ipa_fw_mem: memory@8b700000 {</div><div class='del'>-			reg = &lt;0 0x8b700000 0 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x8b700000 0x0 0x10000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_ipa_gsi_mem: memory@8b710000 {</div><div class='del'>-			reg = &lt;0 0x8b710000 0 0x5400&gt;;</div><div class='add'>+			reg = &lt;0x0 0x8b710000 0x0 0x5400&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_modem_mem: memory@8b800000 {</div><div class='del'>-			reg = &lt;0 0x8b800000 0 0xf800000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x8b800000 0x0 0xf800000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cont_splash_memory: memory@a0000000 {</div><div class='del'>-			reg = &lt;0 0xa0000000 0 0x2300000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xa0000000 0x0 0x2300000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		dfps_data_memory: memory@a2300000 {</div><div class='del'>-			reg = &lt;0 0xa2300000 0 0x100000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xa2300000 0x0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		removed_region: memory@c0000000 {</div><div class='del'>-			reg = &lt;0 0xc0000000 0 0x3900000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xc0000000 0x0 0x3900000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pil_gpu_mem: memory@f0d00000 {</div><div class='del'>-			reg = &lt;0 0xf0d00000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf0d00000 0x0 0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		debug_region: memory@ffb00000 {</div><div class='del'>-			reg = &lt;0 0xffb00000 0 0xc0000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xffb00000 0x0 0xc0000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		last_log_region: memory@ffbc0000 {</div><div class='del'>-			reg = &lt;0 0xffbc0000 0 0x40000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xffbc0000 0x0 0x40000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ramoops: ramoops@ffc00000 {</div><div class='ctx'> 			compatible = "ramoops";</div><div class='del'>-			reg = &lt;0 0xffc00000 0 0x100000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xffc00000 0x0 0x100000&gt;;</div><div class='ctx'> 			record-size = &lt;0x1000&gt;;</div><div class='ctx'> 			console-size = &lt;0x40000&gt;;</div><div class='ctx'> 			pmsg-size = &lt;0x20000&gt;;</div><div class='hunk'>@@ -682,7 +685,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmdline_region: memory@ffd00000 {</div><div class='del'>-			reg = &lt;0 0xffd00000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0xffd00000 0x0 0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -786,7 +789,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gcc: clock-controller@100000 {</div><div class='ctx'> 			compatible = "qcom,gcc-sm6350";</div><div class='del'>-			reg = &lt;0 0x00100000 0 0x1f0000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0x1f0000&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -800,7 +803,7 @@</div><div class='ctx'> </div><div class='ctx'> 		ipcc: mailbox@408000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-ipcc", "qcom,ipcc";</div><div class='del'>-			reg = &lt;0 0x00408000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00408000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='hunk'>@@ -809,7 +812,7 @@</div><div class='ctx'> </div><div class='ctx'> 		qfprom: qfprom@784000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-qfprom", "qcom,qfprom";</div><div class='del'>-			reg = &lt;0 0x00784000 0 0x3000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00784000 0x0 0x3000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -821,16 +824,16 @@</div><div class='ctx'> </div><div class='ctx'> 		rng: rng@793000 {</div><div class='ctx'> 			compatible = "qcom,prng-ee";</div><div class='del'>-			reg = &lt;0 0x00793000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00793000 0x0 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdhc_1: mmc@7c4000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";</div><div class='del'>-			reg = &lt;0 0x007c4000 0 0x1000&gt;,</div><div class='del'>-				&lt;0 0x007c5000 0 0x1000&gt;,</div><div class='del'>-				&lt;0 0x007c8000 0 0x8000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x007c4000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x007c5000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x007c8000 0x0 0x8000&gt;;</div><div class='ctx'> 			reg-names = "hc", "cqhci", "ice";</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -875,7 +878,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gpi_dma0: dma-controller@800000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-gpi-dma";</div><div class='del'>-			reg = &lt;0 0x00800000 0 0x60000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00800000 0x0 0x60000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -907,7 +910,7 @@</div><div class='ctx'> </div><div class='ctx'> 			i2c0: i2c@880000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00880000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00880000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -927,7 +930,7 @@</div><div class='ctx'> </div><div class='ctx'> 			uart1: serial@884000 {</div><div class='ctx'> 				compatible = "qcom,geni-uart";</div><div class='del'>-				reg = &lt;0 0x00884000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00884000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -936,14 +939,14 @@</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SM6350_CX&gt;;</div><div class='ctx'> 				operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;clk_virt SLAVE_EBI_CH0 0&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			i2c2: i2c@888000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00888000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S2_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -964,7 +967,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gpi_dma1: dma-controller@900000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-gpi-dma";</div><div class='del'>-			reg = &lt;0 0x00900000 0 0x60000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x00900000 0x0 0x60000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 646 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -996,7 +999,7 @@</div><div class='ctx'> </div><div class='ctx'> 			i2c6: i2c@980000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00980000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00980000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -1016,7 +1019,7 @@</div><div class='ctx'> </div><div class='ctx'> 			i2c7: i2c@984000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00984000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00984000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -1036,7 +1039,7 @@</div><div class='ctx'> </div><div class='ctx'> 			i2c8: i2c@988000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00988000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00988000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -1056,7 +1059,7 @@</div><div class='ctx'> </div><div class='ctx'> 			uart9: serial@98c000 {</div><div class='ctx'> 				compatible = "qcom,geni-debug-uart";</div><div class='del'>-				reg = &lt;0 0x0098c000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0098c000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -1070,7 +1073,7 @@</div><div class='ctx'> </div><div class='ctx'> 			i2c10: i2c@990000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='del'>-				reg = &lt;0 0x00990000 0 0x4000&gt;;</div><div class='add'>+				reg = &lt;0x0 0x00990000 0x0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='hunk'>@@ -1091,14 +1094,14 @@</div><div class='ctx'> </div><div class='ctx'> 		config_noc: interconnect@1500000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-config-noc";</div><div class='del'>-			reg = &lt;0 0x01500000 0 0x28000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01500000 0x0 0x28000&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		system_noc: interconnect@1620000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-system-noc";</div><div class='del'>-			reg = &lt;0 0x01620000 0 0x17080&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01620000 0x0 0x17080&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1111,14 +1114,14 @@</div><div class='ctx'> </div><div class='ctx'> 		aggre1_noc: interconnect@16e0000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-aggre1-noc";</div><div class='del'>-			reg = &lt;0 0x016e0000 0 0x15080&gt;;</div><div class='add'>+			reg = &lt;0x0 0x016e0000 0x0 0x15080&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		aggre2_noc: interconnect@1700000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-aggre2-noc";</div><div class='del'>-			reg = &lt;0 0x01700000 0 0x1f880&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01700000 0x0 0x1f880&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1131,16 +1134,16 @@</div><div class='ctx'> </div><div class='ctx'> 		mmss_noc: interconnect@1740000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-mmss-noc";</div><div class='del'>-			reg = &lt;0 0x01740000 0 0x1c100&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01740000 0x0 0x1c100&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-ufshc", "qcom,ufshc",</div><div class='ctx'> 				     "jedec,ufs-2.0";</div><div class='del'>-			reg = &lt;0 0x01d84000 0 0x3000&gt;,</div><div class='del'>-			      &lt;0 0x01d90000 0 0x8000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x01d90000 0x0 0x8000&gt;;</div><div class='ctx'> 			reg-names = "std", "ice";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			phys = &lt;&amp;ufs_mem_phy&gt;;</div><div class='hunk'>@@ -1188,7 +1191,7 @@</div><div class='ctx'> </div><div class='ctx'> 		ufs_mem_phy: phy@1d87000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-qmp-ufs-phy";</div><div class='del'>-			reg = &lt;0 0x01d87000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01d87000 0x0 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;,</div><div class='hunk'>@@ -1209,7 +1212,7 @@</div><div class='ctx'> </div><div class='ctx'> 		cryptobam: dma-controller@1dc4000 {</div><div class='ctx'> 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='del'>-			reg = &lt;0 0x01dc4000 0 0x24000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01dc4000 0x0 0x24000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='hunk'>@@ -1225,7 +1228,7 @@</div><div class='ctx'> </div><div class='ctx'> 		crypto: crypto@1dfa000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='del'>-			reg = &lt;0 0x01dfa000 0 0x6000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01dfa000 0x0 0x6000&gt;;</div><div class='ctx'> 			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='ctx'> 			dma-names = "rx", "tx";</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x426 0x11&gt;,</div><div class='hunk'>@@ -1243,9 +1246,9 @@</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x440 0x0&gt;,</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x442 0x0&gt;;</div><div class='del'>-			reg = &lt;0 0x01e40000 0 0x8000&gt;,</div><div class='del'>-			      &lt;0 0x01e50000 0 0x3000&gt;,</div><div class='del'>-			      &lt;0 0x01e04000 0 0x23000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x01e40000 0x0 0x8000&gt;,</div><div class='add'>+			      &lt;0x0 0x01e50000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x01e04000 0x0 0x23000&gt;;</div><div class='ctx'> 			reg-names = "ipa-reg",</div><div class='ctx'> 				    "ipa-shared",</div><div class='ctx'> 				    "gsi";</div><div class='hunk'>@@ -1283,7 +1286,7 @@</div><div class='ctx'> </div><div class='ctx'> 		adsp: remoteproc@3000000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x03000000 0 0x100&gt;;</div><div class='add'>+			reg = &lt;0x0 0x03000000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1319,6 +1322,70 @@</div><div class='ctx'> 				label = "lpass";</div><div class='ctx'> 				qcom,remote-pid = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+				apr {</div><div class='add'>+					compatible = "qcom,apr-v2";</div><div class='add'>+					qcom,glink-channels = "apr_audio_svc";</div><div class='add'>+					qcom,domain = &lt;APR_DOMAIN_ADSP&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					service@3 {</div><div class='add'>+						reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='add'>+						compatible = "qcom,q6core";</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6afe: service@4 {</div><div class='add'>+						compatible = "qcom,q6afe";</div><div class='add'>+						reg = &lt;APR_SVC_AFE&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6afedai: dais {</div><div class='add'>+							compatible = "qcom,q6afe-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6afecc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6afe-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6usbdai: usbd {</div><div class='add'>+							compatible = "qcom,q6usb";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x100f 0x0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+							qcom,usb-audio-intr-idx = /bits/ 16 &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6asm: service@7 {</div><div class='add'>+						compatible = "qcom,q6asm";</div><div class='add'>+						reg = &lt;APR_SVC_ASM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6asmdai: dais {</div><div class='add'>+							compatible = "qcom,q6asm-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1001 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6adm: service@8 {</div><div class='add'>+						compatible = "qcom,q6adm";</div><div class='add'>+						reg = &lt;APR_SVC_ADM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6routing: routing {</div><div class='add'>+							compatible = "qcom,q6adm-routing";</div><div class='add'>+							#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				fastrpc {</div><div class='ctx'> 					compatible = "qcom,fastrpc";</div><div class='ctx'> 					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='hunk'>@@ -1351,8 +1418,8 @@</div><div class='ctx'> </div><div class='ctx'> 		gpu: gpu@3d00000 {</div><div class='ctx'> 			compatible = "qcom,adreno-619.0", "qcom,adreno";</div><div class='del'>-			reg = &lt;0 0x03d00000 0 0x40000&gt;,</div><div class='del'>-			      &lt;0 0x03d9e000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x03d00000 0x0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x03d9e000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "kgsl_3d0_reg_memory",</div><div class='ctx'> 				    "cx_mem";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -1376,50 +1443,50 @@</div><div class='ctx'> 				opp-850000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;850000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x02&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x03&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-800000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x04&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x07&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-650000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;650000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x08&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-565000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;565000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0x10&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-430000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;430000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0xff&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-355000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;355000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0xff&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-253000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;253000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='del'>-					opp-supported-hw = &lt;0xff&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		adreno_smmu: iommu@3d40000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";</div><div class='del'>-			reg = &lt;0 0x03d40000 0 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x03d40000 0x0 0x10000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;1&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;2&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -1445,9 +1512,9 @@</div><div class='ctx'> </div><div class='ctx'> 		gmu: gmu@3d6a000 {</div><div class='ctx'> 			compatible = "qcom,adreno-gmu-619.0", "qcom,adreno-gmu";</div><div class='del'>-			reg = &lt;0 0x03d6a000 0 0x31000&gt;,</div><div class='del'>-			      &lt;0 0x0b290000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x0b490000 0 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x03d6a000 0x0 0x31000&gt;,</div><div class='add'>+			      &lt;0x0 0x0b290000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0b490000 0x0 0x10000&gt;;</div><div class='ctx'> 			reg-names = "gmu",</div><div class='ctx'> 				    "gmu_pdc",</div><div class='ctx'> 				    "gmu_pdc_seq";</div><div class='hunk'>@@ -1489,7 +1556,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gpucc: clock-controller@3d90000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-gpucc";</div><div class='del'>-			reg = &lt;0 0x03d90000 0 0x9000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x03d90000 0x0 0x9000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_GPLL0_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK&gt;;</div><div class='hunk'>@@ -1503,7 +1570,7 @@</div><div class='ctx'> </div><div class='ctx'> 		mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-mpss-pas";</div><div class='del'>-			reg = &lt;0x0 0x04080000 0x0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 136 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1543,7 +1610,7 @@</div><div class='ctx'> </div><div class='ctx'> 		cdsp: remoteproc@8300000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-cdsp-pas";</div><div class='del'>-			reg = &lt;0 0x08300000 0 0x10000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x08300000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1642,7 +1709,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sdhc_2: mmc@8804000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";</div><div class='del'>-			reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x08804000 0x0 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -1691,7 +1758,7 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_1_hsphy: phy@88e3000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-qusb2-phy", "qcom,qusb2-v2-phy";</div><div class='del'>-			reg = &lt;0 0x088e3000 0 0x400&gt;;</div><div class='add'>+			reg = &lt;0x0 0x088e3000 0x0 0x400&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1703,7 +1770,7 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_1_qmpphy: phy@88e8000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-qmp-usb3-dp-phy";</div><div class='del'>-			reg = &lt;0 0x088e8000 0 0x3000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x088e8000 0x0 0x3000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB3_PRIM_CLKREF_CLK&gt;,</div><div class='hunk'>@@ -1754,27 +1821,27 @@</div><div class='ctx'> </div><div class='ctx'> 		dc_noc: interconnect@9160000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-dc-noc";</div><div class='del'>-			reg = &lt;0 0x09160000 0 0x3200&gt;;</div><div class='add'>+			reg = &lt;0x0 0x09160000 0x0 0x3200&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		system-cache-controller@9200000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-llcc";</div><div class='del'>-			reg = &lt;0 0x09200000 0 0x50000&gt;, &lt;0 0x09600000 0 0x50000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x09200000 0x0 0x50000&gt;, &lt;0x0 0x09600000 0x0 0x50000&gt;;</div><div class='ctx'> 			reg-names = "llcc0_base", "llcc_broadcast_base";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gem_noc: interconnect@9680000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-gem-noc";</div><div class='del'>-			reg = &lt;0 0x09680000 0 0x3e200&gt;;</div><div class='add'>+			reg = &lt;0x0 0x09680000 0x0 0x3e200&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		npu_noc: interconnect@9990000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-npu-noc";</div><div class='del'>-			reg = &lt;0 0x09990000 0 0x1600&gt;;</div><div class='add'>+			reg = &lt;0x0 0x09990000 0x0 0x1600&gt;;</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1878,7 +1945,7 @@</div><div class='ctx'> </div><div class='ctx'> 		usb_1: usb@a6f8800 {</div><div class='ctx'> 			compatible = "qcom,sm6350-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0a6f8800 0x0 0x400&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -1916,14 +1983,17 @@</div><div class='ctx'> </div><div class='ctx'> 			usb_1_dwc3: usb@a600000 {</div><div class='ctx'> 				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a600000 0 0xcd00&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0a600000 0x0 0xcd00&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x540 0x0&gt;;</div><div class='add'>+				num-hc-interrupters = /bits/ 16 &lt;3&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,has-lpm-erratum;</div><div class='ctx'> 				snps,hird-threshold = /bits/ 8 &lt;0x10&gt;;</div><div class='ctx'> 				snps,parkmode-disable-ss-quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 				usb-role-switch;</div><div class='hunk'>@@ -1950,9 +2020,23 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		videocc: clock-controller@aaf0000 {</div><div class='add'>+			compatible = "qcom,sm6350-videocc";</div><div class='add'>+			reg = &lt;0x0 0x0aaf0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "bi_tcxo",</div><div class='add'>+				      "sleep_clk";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cci0: cci@ac4a000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-cci", "qcom,msm8996-cci";</div><div class='del'>-			reg = &lt;0 0x0ac4a000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0ac4a000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc TITAN_TOP_GDSC&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -1999,7 +2083,7 @@</div><div class='ctx'> </div><div class='ctx'> 		cci1: cci@ac4b000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-cci", "qcom,msm8996-cci";</div><div class='del'>-			reg = &lt;0 0x0ac4b000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0ac4b000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 462 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc TITAN_TOP_GDSC&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2041,7 +2125,7 @@</div><div class='ctx'> </div><div class='ctx'> 		camcc: clock-controller@ad00000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-camcc";</div><div class='del'>-			reg = &lt;0 0x0ad00000 0 0x16000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0ad00000 0x0 0x16000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='hunk'>@@ -2050,7 +2134,7 @@</div><div class='ctx'> </div><div class='ctx'> 		mdss: display-subsystem@ae00000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-mdss";</div><div class='del'>-			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0ae00000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "mdss";</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -2082,8 +2166,8 @@</div><div class='ctx'> </div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm6350-dpu";</div><div class='del'>-				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0ae01000 0x0 0x8f000&gt;,</div><div class='add'>+				      &lt;0x0 0x0aeb0000 0x0 0x2008&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='hunk'>@@ -2165,12 +2249,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mdss_dp: displayport-controller@ae90000 {</div><div class='del'>-				compatible = "qcom,sm6350-dp", "qcom,sm8350-dp";</div><div class='del'>-				reg = &lt;0 0xae90000 0 0x200&gt;,</div><div class='del'>-				      &lt;0 0xae90200 0 0x200&gt;,</div><div class='del'>-				      &lt;0 0xae90400 0 0x600&gt;,</div><div class='del'>-				      &lt;0 0xae91000 0 0x400&gt;,</div><div class='del'>-				      &lt;0 0xae91400 0 0x400&gt;;</div><div class='add'>+				compatible = "qcom,sm6350-dp", "qcom,sc7180-dp";</div><div class='add'>+				reg = &lt;0x0 0xae90000 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0xae90200 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0xae90400 0x0 0x600&gt;,</div><div class='add'>+				      &lt;0x0 0xae91000 0x0 0x400&gt;,</div><div class='add'>+				      &lt;0x0 0xae91400 0x0 0x400&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='ctx'> 				interrupts = &lt;12&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -2246,7 +2330,7 @@</div><div class='ctx'> </div><div class='ctx'> 			mdss_dsi0: dsi@ae94000 {</div><div class='ctx'> 				compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='del'>-				reg = &lt;0 0x0ae94000 0 0x400&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0ae94000 0x0 0x400&gt;;</div><div class='ctx'> 				reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='hunk'>@@ -2267,7 +2351,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SM6350_MX&gt;;</div><div class='hunk'>@@ -2322,9 +2407,9 @@</div><div class='ctx'> </div><div class='ctx'> 			mdss_dsi0_phy: phy@ae94400 {</div><div class='ctx'> 				compatible = "qcom,dsi-phy-10nm";</div><div class='del'>-				reg = &lt;0 0x0ae94400 0 0x200&gt;,</div><div class='del'>-				      &lt;0 0x0ae94600 0 0x280&gt;,</div><div class='del'>-				      &lt;0 0x0ae94a00 0 0x1e0&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0ae94400 0x0 0x200&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae94600 0x0 0x280&gt;,</div><div class='add'>+				      &lt;0x0 0x0ae94a00 0x0 0x1e0&gt;;</div><div class='ctx'> 				reg-names = "dsi_phy",</div><div class='ctx'> 					    "dsi_phy_lane",</div><div class='ctx'> 					    "dsi_pll";</div><div class='hunk'>@@ -2342,11 +2427,11 @@</div><div class='ctx'> </div><div class='ctx'> 		dispcc: clock-controller@af00000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-dispcc";</div><div class='del'>-			reg = &lt;0 0x0af00000 0 0x20000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0af00000 0x0 0x20000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_GPLL0_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -2362,7 +2447,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pdc: interrupt-controller@b220000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-pdc", "qcom,pdc";</div><div class='del'>-			reg = &lt;0 0x0b220000 0 0x30000&gt;, &lt;0 0x17c000f0 0 0x64&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0b220000 0x0 0x30000&gt;, &lt;0x0 0x17c000f0 0x0 0x64&gt;;</div><div class='ctx'> 			qcom,pdc-ranges = &lt;0 480 94&gt;, &lt;94 609 31&gt;,</div><div class='ctx'> 					  &lt;125 63 1&gt;, &lt;126 655 12&gt;, &lt;138 139 15&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -2372,8 +2457,8 @@</div><div class='ctx'> </div><div class='ctx'> 		tsens0: thermal-sensor@c263000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-tsens", "qcom,tsens-v2";</div><div class='del'>-			reg = &lt;0 0x0c263000 0 0x1ff&gt;, /* TM */</div><div class='del'>-			      &lt;0 0x0c222000 0 0x8&gt;; /* SROT */</div><div class='add'>+			reg = &lt;0x0 0x0c263000 0x0 0x1ff&gt;, /* TM */</div><div class='add'>+			      &lt;0x0 0x0c222000 0x0 0x8&gt;; /* SROT */</div><div class='ctx'> 			#qcom,sensors = &lt;16&gt;;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;pdc 26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;&amp;pdc 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -2383,8 +2468,8 @@</div><div class='ctx'> </div><div class='ctx'> 		tsens1: thermal-sensor@c265000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-tsens", "qcom,tsens-v2";</div><div class='del'>-			reg = &lt;0 0x0c265000 0 0x1ff&gt;, /* TM */</div><div class='del'>-			      &lt;0 0x0c223000 0 0x8&gt;; /* SROT */</div><div class='add'>+			reg = &lt;0x0 0x0c265000 0x0 0x1ff&gt;, /* TM */</div><div class='add'>+			      &lt;0x0 0x0c223000 0x0 0x8&gt;; /* SROT */</div><div class='ctx'> 			#qcom,sensors = &lt;16&gt;;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;pdc 27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;&amp;pdc 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -2394,7 +2479,7 @@</div><div class='ctx'> </div><div class='ctx'> 		aoss_qmp: power-management@c300000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-aoss-qmp", "qcom,aoss-qmp";</div><div class='del'>-			reg = &lt;0 0x0c300000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0c300000 0x0 0x1000&gt;;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='ctx'> 						     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			mboxes = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='hunk'>@@ -2402,13 +2487,18 @@</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sram@c3f0000 {</div><div class='add'>+			compatible = "qcom,rpmh-stats";</div><div class='add'>+			reg = &lt;0x0 0x0c3f0000 0x0 0x400&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		spmi_bus: spmi@c440000 {</div><div class='ctx'> 			compatible = "qcom,spmi-pmic-arb";</div><div class='del'>-			reg = &lt;0 0x0c440000 0 0x1100&gt;,</div><div class='del'>-			      &lt;0 0x0c600000 0 0x2000000&gt;,</div><div class='del'>-			      &lt;0 0x0e600000 0 0x100000&gt;,</div><div class='del'>-			      &lt;0 0x0e700000 0 0xa0000&gt;,</div><div class='del'>-			      &lt;0 0x0c40a000 0 0x26000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0c440000 0x0 0x1100&gt;,</div><div class='add'>+			      &lt;0x0 0x0c600000 0x0 0x2000000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e600000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x0e700000 0x0 0xa0000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c40a000 0x0 0x26000&gt;;</div><div class='ctx'> 			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";</div><div class='ctx'> 			interrupt-names = "periph_irq";</div><div class='ctx'> 			interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -2422,7 +2512,7 @@</div><div class='ctx'> </div><div class='ctx'> 		tlmm: pinctrl@f100000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-tlmm";</div><div class='del'>-			reg = &lt;0 0x0f100000 0 0x300000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0f100000 0x0 0x300000&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					&lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2601,7 +2691,7 @@</div><div class='ctx'> </div><div class='ctx'> 		apps_smmu: iommu@15000000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-smmu-500", "arm,mmu-500";</div><div class='del'>-			reg = &lt;0 0x15000000 0 0x100000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x15000000 0x0 0x100000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2685,6 +2775,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='hunk'>@@ -2698,7 +2789,7 @@</div><div class='ctx'> </div><div class='ctx'> 		watchdog@17c10000 {</div><div class='ctx'> 			compatible = "qcom,apss-wdt-sm6350", "qcom,kpss-wdt";</div><div class='del'>-			reg = &lt;0 0x17c10000 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x17c10000 0x0 0x1000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;sleep_clk&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2776,7 +2867,7 @@</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS 2&gt;, &lt;SLEEP_TCS 3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS 3&gt;, &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpmhcc: clock-controller {</div><div class='ctx'> 				compatible = "qcom,sm6350-rpmh-clk";</div><div class='hunk'>@@ -2852,7 +2943,7 @@</div><div class='ctx'> </div><div class='ctx'> 		cpufreq_hw: cpufreq@18323000 {</div><div class='ctx'> 			compatible = "qcom,sm6350-cpufreq-hw", "qcom,cpufreq-hw";</div><div class='del'>-			reg = &lt;0 0x18323000 0 0x1000&gt;, &lt;0 0x18325800 0 0x1000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x18323000 0x0 0x1000&gt;, &lt;0x0 0x18325800 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "freq-domain0", "freq-domain1";</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GPLL0&gt;;</div><div class='ctx'> 			clock-names = "xo", "alternate";</div><div class='hunk'>@@ -2863,7 +2954,7 @@</div><div class='ctx'> </div><div class='ctx'> 		wifi: wifi@18800000 {</div><div class='ctx'> 			compatible = "qcom,wcn3990-wifi";</div><div class='del'>-			reg = &lt;0 0x18800000 0 0x800000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x18800000 0x0 0x800000&gt;;</div><div class='ctx'> 			reg-names = "membase";</div><div class='ctx'> 			memory-region = &lt;&amp;wlan_fw_mem&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2884,6 +2975,9 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sound: sound {</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	thermal-zones {</div><div class='ctx'> 		aoss0-thermal {</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='hunk'>@@ -2953,7 +3047,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2978,7 +3072,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3003,7 +3097,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3028,7 +3122,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3053,7 +3147,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3078,7 +3172,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3103,7 +3197,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_left_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3128,7 +3222,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_right_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3153,7 +3247,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_left_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3178,7 +3272,7 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_right_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi<br/>index 4d519dd6e7ef..0faa3a40ff82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm6375.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm6375.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -38,25 +38,25 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -64,185 +64,185 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo660";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu6_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;cpucp_l3 MASTER_EPSS_L3_APPS &amp;cpucp_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -250,7 +250,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -260,7 +260,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {</div><div class='add'>+			little_cpu_sleep_1: cpu-sleep-0-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -270,7 +270,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000003&gt;;</div><div class='hunk'>@@ -280,7 +280,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {</div><div class='add'>+			big_cpu_sleep_1: cpu-sleep-1-1 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -292,7 +292,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -455,58 +455,58 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0 &amp;LITTLE_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0 &amp;little_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0 &amp;BIG_CPU_SLEEP_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0 &amp;big_cpu_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;mpm&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1516,9 +1516,9 @@</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		remoteproc_mss: remoteproc@6000000 {</div><div class='add'>+		remoteproc_mss: remoteproc@6080000 {</div><div class='ctx'> 			compatible = "qcom,sm6375-mpss-pas";</div><div class='del'>-			reg = &lt;0 0x06000000 0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x06080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1559,7 +1559,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_adsp: remoteproc@a400000 {</div><div class='ctx'> 			compatible = "qcom,sm6375-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x0a400000 0 0x100&gt;;</div><div class='add'>+			reg = &lt;0 0x0a400000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -1595,9 +1595,9 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		remoteproc_cdsp: remoteproc@b000000 {</div><div class='add'>+		remoteproc_cdsp: remoteproc@b300000 {</div><div class='ctx'> 			compatible = "qcom,sm6375-cdsp-pas";</div><div class='del'>-			reg = &lt;0x0 0x0b000000 0x0 0x100000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0b300000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm7125.dtsi b/arch/arm64/boot/dts/qcom/sm7125.dtsi<br/>index 12dd72859a43..a53145a610a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7125.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7125.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7125.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm7125.dtsi</a></div><div class='hunk'>@@ -6,11 +6,11 @@</div><div class='ctx'> #include "sc7180.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* SM7125 uses Kryo 465 instead of Kryo 468 */</div><div class='del'>-&amp;CPU0 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU1 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU2 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU3 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU4 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU5 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU6 { compatible = "qcom,kryo465"; };</div><div class='del'>-&amp;CPU7 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu0 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu1 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu2 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu3 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu4 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu5 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu6 { compatible = "qcom,kryo465"; };</div><div class='add'>+&amp;cpu7 { compatible = "qcom,kryo465"; };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts<br/>index 2ee2561b57b1..4afbab570ca1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "sm7225.dtsi"</div><div class='ctx'> #include "pm6150l.dtsi"</div><div class='hunk'>@@ -32,7 +33,7 @@</div><div class='ctx'> 	chassis-type = "handset";</div><div class='ctx'> </div><div class='ctx'> 	/* required for bootloader to select correct board */</div><div class='del'>-	qcom,msm-id = &lt;434 0x10000&gt;, &lt;459 0x10000&gt;;</div><div class='add'>+	qcom,msm-id = &lt;459 0x10000&gt;;</div><div class='ctx'> 	qcom,board-id = &lt;8 32&gt;;</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -938,6 +939,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;q6asmdai {</div><div class='add'>+	dai@0 {</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qup_uart1_cts {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Configure a bias-bus-hold on CTS to lower power</div><div class='hunk'>@@ -1006,6 +1013,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sound {</div><div class='add'>+	compatible = "fairphone,fp4-sndcard";</div><div class='add'>+	model = "Fairphone 4";</div><div class='add'>+</div><div class='add'>+	mm1-dai-link {</div><div class='add'>+		link-name = "MultiMedia1";</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-dai-link {</div><div class='add'>+		link-name = "USB Playback";</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			sound-dai = &lt;&amp;q6usbdai USB_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu {</div><div class='add'>+			sound-dai = &lt;&amp;q6afedai USB_RX&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		platform {</div><div class='add'>+			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;13 4&gt;, &lt;56 2&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm7225.dtsi b/arch/arm64/boot/dts/qcom/sm7225.dtsi<br/>index b7b4044e9bb0..a8ffdfb254fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7225.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm7225.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7225.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm7225.dtsi</a></div><div class='hunk'>@@ -6,14 +6,14 @@</div><div class='ctx'> #include "sm6350.dtsi"</div><div class='ctx'> </div><div class='ctx'> /* SM7225 uses Kryo 570 instead of Kryo 560 */</div><div class='del'>-&amp;CPU0 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU1 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU2 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU3 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU4 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU5 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU6 { compatible = "qcom,kryo570"; };</div><div class='del'>-&amp;CPU7 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu0 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu1 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu2 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu3 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu4 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu5 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu6 { compatible = "qcom,kryo570"; };</div><div class='add'>+&amp;cpu7 { compatible = "qcom,kryo570"; };</div><div class='ctx'> </div><div class='ctx'> &amp;cpu0_opp_table {</div><div class='ctx'> 	opp-1804800000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts b/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts<br/>new file mode 100644<br/>index 000000000000..f16b47b6a74c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts</a></div><div class='hunk'>@@ -0,0 +1,1456 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Eugene Lepshy &lt;fekz115@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024, Danila Tikhonov &lt;danila@jiaxyga.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/arm/qcom,ids.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm7325.h&gt;</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pm8350b.h&gt;</div><div class='add'>+#include &lt;dt-bindings/iio/qcom,spmi-adc7-pmk8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sm7325.dtsi"</div><div class='add'>+#include "pm7325.dtsi"</div><div class='add'>+#include "pm8350b.dtsi" /* PM7325B */</div><div class='add'>+#include "pm8350c.dtsi" /* PM7350C */</div><div class='add'>+#include "pmk8350.dtsi" /* PMK7325 */</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;rmtfs_mem;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Nothing Phone (1)";</div><div class='add'>+	compatible = "nothing,spacewar", "qcom,sm7325";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		bluetooth0 = &amp;bluetooth;</div><div class='add'>+		serial0 = &amp;uart5;</div><div class='add'>+		serial1 = &amp;uart7;</div><div class='add'>+		wifi0 = &amp;wifi;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+</div><div class='add'>+		framebuffer0: framebuffer@e1000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0xe1000000 0x0 (1080 * 2400 * 4)&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2400&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+			power-domains = &lt;&amp;dispcc DISP_CC_MDSS_CORE_GDSC&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kypd_volp_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume up";</div><div class='add'>+			gpios = &lt;&amp;pm7325_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,sm7325-pmic-glink",</div><div class='add'>+			     "qcom,qcm6490-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 140 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;fsa4480_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		ramoops_mem: ramoops@83a00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0x83a00000 0x0 0x400000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x200000&gt;;</div><div class='add'>+			mem-type = &lt;2&gt;;</div><div class='add'>+			console-size = &lt;0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_mem: cdsp@88f00000 {</div><div class='add'>+			reg = &lt;0x0 0x88f00000 0x0 0x1e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		removed_mem: removed@c0000000 {</div><div class='add'>+			reg = &lt;0x0 0xc0000000 0x0 0x5100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cont_splash_mem: cont-splash@e1000000 {</div><div class='add'>+			reg = &lt;0x0 0xe1000000 0x0 (1080 * 2400 * 4)&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rmtfs_mem: rmtfs@f8500000 {</div><div class='add'>+			compatible = "qcom,rmtfs-mem";</div><div class='add'>+			reg = &lt;0x0 0xf8500000 0x0 0x600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			qcom,client-id = &lt;1&gt;;</div><div class='add'>+			qcom,vmid = &lt;QCOM_SCM_VMID_MSS_MSA&gt;,</div><div class='add'>+				    &lt;QCOM_SCM_VMID_NAV&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		camera-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		chg-skin-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 6&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conn-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		quiet-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rear-cam-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdm-skin-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xo-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;pmk8350_adc_tm 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				active-config0 {</div><div class='add'>+					temperature = &lt;125000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_cam_vio_1p8: regulator-cam-vio {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_cam_vio_1p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* Always-on prevents CCI bus timeouts */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camf_vana_2p8: regulator-camf-vana {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camf_vana_2p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 43 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camf_vdig_1p1: regulator-camf-vdig {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camf_vdig_1p1";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 35 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_s8b_1p256&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camu_vaf_1p8: regulator-camu-vaf {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camu_vaf_1p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 71 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camu_vana_2p8: regulator-camu-vana {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camu_vana_2p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		gpio = &lt;&amp;tlmm 68 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camu_vdig_1p1: regulator-camu-vdig {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camu_vdig_1p1";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 50 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_s8b_1p256&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camw_vaf_1p8: regulator-camw-vaf {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camw_vaf_1p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camw_vana_2p8: regulator-camw-vana {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camw_vana_2p8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 79 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_camw_vdig_1p1: regulator-camw-vdig {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_camw_vdig_1p1";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 108 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_s8b_1p256&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	// S2B is really ebi.lvl but it's there for supply map completeness sake.</div><div class='add'>+	vreg_s2b_0p7: smpa3-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vreg_s2b_0p7";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;65535&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;65535&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm7325-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-l1-l4-l12-l15-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s2b_0p7&gt;;</div><div class='add'>+		vdd-l5-supply = &lt;&amp;vreg_s2b_0p7&gt;;</div><div class='add'>+		vdd-l6-l9-l10-supply = &lt;&amp;vreg_s8b_1p256&gt;;</div><div class='add'>+		vdd-l8-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vdd-l11-l17-l18-l19-supply = &lt;&amp;vreg_s1b_1p856&gt;;</div><div class='add'>+		vdd-l13-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vdd-l14-l16-supply = &lt;&amp;vreg_s8b_1p256&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * S2, L4-L5 are ARCs:</div><div class='add'>+		 * S2 - ebi.lvl,</div><div class='add'>+		 * L4 - lmx.lvl,</div><div class='add'>+		 * l5 - lcx.lvl.</div><div class='add'>+		 *</div><div class='add'>+		 * L10 are unused.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		vdd19_pmu_rfa_i:</div><div class='add'>+		vreg_s1b_1p856: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1b_1p856";</div><div class='add'>+			regulator-min-microvolt = &lt;1840000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2040000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_pmu_aon_i:</div><div class='add'>+		vdd09_pmu_rfa_i:</div><div class='add'>+		vdd095_mx_pmu:</div><div class='add'>+		vdd095_pmu_1:</div><div class='add'>+		vdd095_pmu_2:</div><div class='add'>+		vreg_s7b_0p952: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7b_0p952";</div><div class='add'>+			regulator-min-microvolt = &lt;535000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1120000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd13_pmu_rfa_i:</div><div class='add'>+		vreg_s8b_1p256: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8b_1p256";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_RET&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_0p912: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_0p912";</div><div class='add'>+			regulator-min-microvolt = &lt;825000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;925000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_a_usbhs_3p1:</div><div class='add'>+		vreg_l2b_3p072: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p072";</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_io_ebi0_1:</div><div class='add'>+		vdd_io_ebi0_2:</div><div class='add'>+		vdd_io_ebi0_3:</div><div class='add'>+		vdd_io_ebi0_4:</div><div class='add'>+		vdd_io_ebi1_1:</div><div class='add'>+		vdd_io_ebi1_2:</div><div class='add'>+		vdd_io_ebi1_3:</div><div class='add'>+		vdd_io_ebi1_4:</div><div class='add'>+		vreg_l3b_0p6: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3b_0p6";</div><div class='add'>+			regulator-min-microvolt = &lt;312000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;910000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_a_csi_01_1p2:</div><div class='add'>+		vdd_a_csi_23_1p2:</div><div class='add'>+		vdd_a_csi_4_1p2:</div><div class='add'>+		vdd_a_dsi_0_1p2:</div><div class='add'>+		vdd_a_qlink_0_1p2_ck:</div><div class='add'>+		vdd_a_qlink_1_1p2:</div><div class='add'>+		vdd_a_ufs_0_1p2:</div><div class='add'>+		vdd_vref_1p2_1:</div><div class='add'>+		vdd_vref_1p2_2:</div><div class='add'>+		vreg_l6b_1p2: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1140000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1260000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p96: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;2400000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_0p904: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_0p904";</div><div class='add'>+			regulator-min-microvolt = &lt;870000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;970000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px10:</div><div class='add'>+		vreg_l9b_1p2: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vddah_0:</div><div class='add'>+		vddah_1:</div><div class='add'>+		vddah_fbrx:</div><div class='add'>+		vddah_tx0:</div><div class='add'>+		vddah_tx0_1:</div><div class='add'>+		vddah_tx1:</div><div class='add'>+		vddah_tx1_1:</div><div class='add'>+		vreg_l11b_1p776: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p776";</div><div class='add'>+			regulator-min-microvolt = &lt;1504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vddal_dig0:</div><div class='add'>+		vddal_dig_1:</div><div class='add'>+		vddal_dig_2:</div><div class='add'>+		vddal_dig_xo:</div><div class='add'>+		vddal_gps_l1:</div><div class='add'>+		vddal_gps_l5:</div><div class='add'>+		vddal_icon:</div><div class='add'>+		vddal_rx:</div><div class='add'>+		vddal_rx0:</div><div class='add'>+		vddal_rx1:</div><div class='add'>+		vddal_rx2:</div><div class='add'>+		vddal_tx0:</div><div class='add'>+		vddal_tx0_1:</div><div class='add'>+		vddal_tx1:</div><div class='add'>+		vddal_tx1_2:</div><div class='add'>+		vreg_l12b_0p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;751000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;824000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_cx1:</div><div class='add'>+		vdd_cx2:</div><div class='add'>+		vreg_l13b_0p8: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;530000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;824000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_1p2:</div><div class='add'>+		vdd_lna:</div><div class='add'>+		vddam_fbrx:</div><div class='add'>+		vddam_rx_0:</div><div class='add'>+		vddam_rx_1:</div><div class='add'>+		vddam_rx0:</div><div class='add'>+		vddam_rx1:</div><div class='add'>+		vddam_rx2:</div><div class='add'>+		vddam_rxe_a:</div><div class='add'>+		vddam_rxe_b:</div><div class='add'>+		vddam_rxe_c:</div><div class='add'>+		vddam_rxe_d:</div><div class='add'>+		vddam_rxe_e:</div><div class='add'>+		vddam_tx0:</div><div class='add'>+		vddam_tx0_1:</div><div class='add'>+		vddam_tx1:</div><div class='add'>+		vddam_tx1_1:</div><div class='add'>+		vddam_xo:</div><div class='add'>+		vreg_l14b_1p2: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1080000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_mx:</div><div class='add'>+		vddmx_tx:</div><div class='add'>+		vdd_phy:</div><div class='add'>+		vreg_l15b_0p88: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;765000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1020000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_1p2: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_buck:</div><div class='add'>+		vreg_l17b_1p8: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px_wcd9385:</div><div class='add'>+		vdd_txrx:</div><div class='add'>+		vdd_px0:</div><div class='add'>+		vdd_px3:</div><div class='add'>+		vdd_px7:</div><div class='add'>+		vreg_l18b_1p8: ldo18 {</div><div class='add'>+			regulator-name = "vreg_l18b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_1p8:</div><div class='add'>+		vdd_px_sdr735:</div><div class='add'>+		vdd_pxm:</div><div class='add'>+		vddio_px_1:</div><div class='add'>+		vddio_px_2:</div><div class='add'>+		vddio_px_3:</div><div class='add'>+		vdd18_io:</div><div class='add'>+		vddpx_ts:</div><div class='add'>+		vddpx_wl4otp:</div><div class='add'>+		vreg_l19b_1p8: ldo19 {</div><div class='add'>+			regulator-name = "vreg_l19b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_s1b_1p856&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_s1b_1p856&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l10-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * S2, S5, S7, S10 are ARCs:</div><div class='add'>+		 * S2 - cx.lvl,</div><div class='add'>+		 * S5 - mss.lvl,</div><div class='add'>+		 * S7 - gfx.lvl,</div><div class='add'>+		 * S10 - mx.lvl.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		vdd22_wlbtpa_ch0:</div><div class='add'>+		vdd22_wlbtpa_ch1:</div><div class='add'>+		vdd22_wlbtppa_ch0:</div><div class='add'>+		vdd22_wlbtppa_ch1:</div><div class='add'>+		vdd22_wlpa5g_ch0:</div><div class='add'>+		vdd22_wlpa5g_ch1:</div><div class='add'>+		vdd22_wlppa5g_ch0:</div><div class='add'>+		vdd22_wlppa5g_ch1:</div><div class='add'>+		vreg_s1c_2p2: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1c_2p2";</div><div class='add'>+			regulator-min-microvolt = &lt;2190000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2210000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px1:</div><div class='add'>+		vreg_s9c_0p676: smps9 {</div><div class='add'>+			regulator-name = "vreg_s9c_0p676";</div><div class='add'>+			regulator-min-microvolt = &lt;1010000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1170000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_a_apc_cs_1p8:</div><div class='add'>+		vdd_a_cxo_1p8:</div><div class='add'>+		vdd_a_gfx_cs_1p8:</div><div class='add'>+		vdd_a_qrefs_1p8:</div><div class='add'>+		vdd_a_turing_q6_cs_1p8:</div><div class='add'>+		vdd_a_usbhs_1p8:</div><div class='add'>+		vdd_qfprom:</div><div class='add'>+		vreg_l1c_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_1p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1980000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_ts:</div><div class='add'>+		vreg_l3c_3p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3540000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px5:</div><div class='add'>+		vreg_l4c_1p8_3p0: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4c_1p8_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px6:</div><div class='add'>+		vreg_l5c_1p8_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5c_1p8_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_px2:</div><div class='add'>+		vreg_l6c_2p96: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6c_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_sensor_3p3:</div><div class='add'>+		vreg_l7c_3p0: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7c_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_sensor_1p8:</div><div class='add'>+		vreg_l8c_1p8: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1620000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9c_2p96: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9c_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_a_csi_01_0p9:</div><div class='add'>+		vdd_a_csi_23_0p9:</div><div class='add'>+		vdd_a_csi_4_0p9:</div><div class='add'>+		vdd_a_dsi_0_0p9:</div><div class='add'>+		vdd_a_dsi_0_pll_0p9:</div><div class='add'>+		vdd_a_gnss_0p9:</div><div class='add'>+		vdd_a_qlink_0_0p9:</div><div class='add'>+		vdd_a_qlink_0_0p9_ck:</div><div class='add'>+		vdd_a_qlink_1_0p9:</div><div class='add'>+		vdd_a_qlink_1_0p9_ck:</div><div class='add'>+		vdd_a_qrefs_0p875_1:</div><div class='add'>+		vdd_a_qrefs_0p875_2:</div><div class='add'>+		vdd_a_qrefs_0p875_3:</div><div class='add'>+		vdd_a_qrefs_0p875_4:</div><div class='add'>+		vdd_a_qrefs_0p875_5:</div><div class='add'>+		vdd_a_qrefs_0p875_6:</div><div class='add'>+		vdd_a_qrefs_0p875_7:</div><div class='add'>+		vdd_a_qrefs_0p875_8:</div><div class='add'>+		vdd_a_qrefs_0p875_9:</div><div class='add'>+		vdd_a_ufs_0_core:</div><div class='add'>+		vdd_a_usbhs_core:</div><div class='add'>+		vdd_vref_0p9:</div><div class='add'>+		vreg_l10c_0p88: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10c_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;720000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_fm:</div><div class='add'>+		vdd_wlan_fem:</div><div class='add'>+		vreg_l11c_2p8: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11c_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_io_oled:</div><div class='add'>+		vreg_l12c_1p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1650000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_oled:</div><div class='add'>+		vreg_l13c_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13c_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3544000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vdd_flash:</div><div class='add'>+		vdd_mic_bias:</div><div class='add'>+		vreg_bob: bob {</div><div class='add'>+			regulator-name = "vreg_bob";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci0 {</div><div class='add'>+	/*</div><div class='add'>+	 * cci0_i2c1 bus is unused and GPIO 71&amp;72 are repurposed.</div><div class='add'>+	 * So set only cci0_i2c0 pinctrl here.</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;cci0_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;cci0_sleep&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci0_i2c0 {</div><div class='add'>+	/* D-PHY sony,imx471 (Front) @ 0x1a */</div><div class='add'>+</div><div class='add'>+	camf_p24c64f: eeprom@52 {</div><div class='add'>+		compatible = "puya,p24c64f",</div><div class='add'>+			     "atmel,24c64";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_cam_vio_1p8&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1_i2c0 {</div><div class='add'>+	/* actuator (For Ultra Wide sensor) @ 0xc */</div><div class='add'>+	/* D-PHY samsung,s5kjn1 (Ultra Wide) @ 0x2d */</div><div class='add'>+</div><div class='add'>+	camu_gt24p128e: eeprom@51 {</div><div class='add'>+		compatible = "giantec,gt24p128e",</div><div class='add'>+			     "atmel,24c128";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_cam_vio_1p8&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cci1_i2c1 {</div><div class='add'>+	/* actuator (For Wide sensor) @ 0xc */</div><div class='add'>+	/* C-PHY sony,imx766 (Wide) @ 0x10 */</div><div class='add'>+</div><div class='add'>+	camw_gt24p128e: eeprom@50 {</div><div class='add'>+		compatible = "giantec,gt24p128e",</div><div class='add'>+			     "atmel,24c128";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_cam_vio_1p8&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gcc {</div><div class='add'>+	protected-clocks = &lt;GCC_CFG_NOC_LPASS_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_OFFLINE_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_Q6SS_BOOT_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_MSS_Q6_MEMNOC_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CNOC_PERIPH_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CORE_CLK&gt;,</div><div class='add'>+			   &lt;GCC_QSPI_CORE_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_SEC_CTRL_CLK_SRC&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_AHB_BDG_MST_CLK&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_AHB_CLK&gt;,</div><div class='add'>+			   &lt;GCC_WPSS_RSCP_CLK&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpi_dma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/a660_zap.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* awinic,aw21018 (Glyph LED) @ 20 */</div><div class='add'>+</div><div class='add'>+	typec-mux@42 {</div><div class='add'>+		compatible = "fcs,fsa4480";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+</div><div class='add'>+		vcc-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			fsa4480_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* nxp,tfa9873 (EAR speaker codec) @ 34 */</div><div class='add'>+	/* nxp,tfa9873 (Main speaker codec) @ 35 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nfc@28 {</div><div class='add'>+		compatible = "nxp,pn553",</div><div class='add'>+			     "nxp,nxp-nci-i2c";</div><div class='add'>+		reg = &lt;0x28&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+		interrupts = &lt;41 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 38 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		firmware-gpios = &lt;&amp;tlmm 40 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nfc_en&gt;,</div><div class='add'>+			    &lt;&amp;nfc_clk_req&gt;,</div><div class='add'>+			    &lt;&amp;nfc_dwl_req&gt;,</div><div class='add'>+			    &lt;&amp;nfc_int_req&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ipa {</div><div class='add'>+	qcom,gsi-loader = "self";</div><div class='add'>+	memory-region = &lt;&amp;ipa_fw_mem&gt;;</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/ipa_fws.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi {</div><div class='add'>+	vdda-supply = &lt;&amp;vdd_a_dsi_0_1p2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		compatible = "nothing,rm692e5-spacewar",</div><div class='add'>+			     "visionox,rm692e5";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vdd_oled&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vdd_io_oled&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_reset_n&gt;,</div><div class='add'>+			    &lt;&amp;mdp_vsync_p&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dsi_phy {</div><div class='add'>+	vdds-supply = &lt;&amp;vdd_a_dsi_0_0p9&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm7325_gpios {</div><div class='add'>+	gpio-line-names = "NC", /* GPIO_1 */</div><div class='add'>+			  "PA_THERM3",</div><div class='add'>+			  "PA_THERM4",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "KYPD_VOLP_N",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC",</div><div class='add'>+			  "NC"; /* GPIO_10 */</div><div class='add'>+</div><div class='add'>+	kypd_volp_n: kypd-volp-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = PMIC_GPIO_FUNC_NORMAL;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8350c_flash {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-0 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+		led-sources = &lt;1&gt;, &lt;4&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;1500000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_adc_tm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* PMK8350 */</div><div class='add'>+	xo-therm@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PM7325 */</div><div class='add'>+	quiet-therm@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam-flash-therm@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdm-skin-therm@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wide-rfc-therm@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM7325_ADC7_AMUX_THM4_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PM8350B */</div><div class='add'>+	usb-conn-therm@5 {</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM8350B_ADC7_AMUX_THM4_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chg-skin-therm@6 {</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		io-channels = &lt;&amp;pmk8350_vadc PM8350B_ADC7_GPIO2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8350_vadc {</div><div class='add'>+	/* PMK8350 */</div><div class='add'>+	channel@44 {</div><div class='add'>+		reg = &lt;PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pmk8350_xo_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PM7325 */</div><div class='add'>+	channel@144 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_quiet_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@145 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_cam_flash_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@146 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_sdm_skin_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@147 {</div><div class='add'>+		reg = &lt;PM7325_ADC7_AMUX_THM4_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_wide_rfc_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@14a {</div><div class='add'>+		reg = &lt;PM7325_ADC7_GPIO1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_pa3_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@14b {</div><div class='add'>+		reg = &lt;PM7325_ADC7_GPIO2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm7325_pa4_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PM8350B */</div><div class='add'>+	channel@344 {</div><div class='add'>+		reg = &lt;PM8350B_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm8350b_batt_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@347 {</div><div class='add'>+		reg = &lt;PM8350B_ADC7_AMUX_THM4_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm8350b_usb_conn_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@34b {</div><div class='add'>+		reg = &lt;PM8350B_ADC7_GPIO2_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm8350b_chg_skin_therm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel@34c {</div><div class='add'>+		reg = &lt;PM8350B_ADC7_GPIO3_100K_PU&gt;;</div><div class='add'>+		qcom,ratiometric;</div><div class='add'>+		qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+		qcom,pre-scaling = &lt;1 1&gt;;</div><div class='add'>+		label = "pm8350b_usb_therm2";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;q6afedai {</div><div class='add'>+	dai@16 {</div><div class='add'>+		reg = &lt;PRIMARY_MI2S_RX&gt;;</div><div class='add'>+		qcom,sd-lines = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;q6asmdai {</div><div class='add'>+	dai@0 {</div><div class='add'>+		reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qfprom {</div><div class='add'>+	vcc-supply = &lt;&amp;vdd_qfprom&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart5_rx {</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qup_uart5_tx {</div><div class='add'>+	drive-strength = &lt;2&gt;;</div><div class='add'>+	bias-disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_id_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/modem.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_wpss {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/wpss.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* focaltech,ft3680 (Touchscreen) @ 0 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	/* 56-59: Fingerprint reader (SPI) */</div><div class='add'>+	gpio-reserved-ranges = &lt;56 4&gt;;</div><div class='add'>+</div><div class='add'>+	bt_uart_sleep_cts: bt-uart-sleep-cts-state {</div><div class='add'>+		pins = "gpio28";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-bus-hold;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_uart_sleep_rts: bt-uart-sleep-rts-state {</div><div class='add'>+		pins = "gpio29";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_uart_sleep_txd: bt-uart-sleep-txd-state {</div><div class='add'>+		pins = "gpio30";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bt_uart_sleep_rxd: bt-uart-sleep-rxd-state {</div><div class='add'>+		pins = "gpio31";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_en: nfc-en-state {</div><div class='add'>+		pins = "gpio38";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_clk_req: nfc-clk-req-state {</div><div class='add'>+		pins = "gpio39";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_dwl_req: nfc-dwl-req-state {</div><div class='add'>+		pins = "gpio40";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nfc_int_req: nfc-int-req-state {</div><div class='add'>+		pins = "gpio41";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcd_reset_n: lcd-reset-n-state {</div><div class='add'>+		pins = "gpio44";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mdp_vsync_p: mdp-vsync-p-state {</div><div class='add'>+		pins = "gpio80";</div><div class='add'>+		function = "mdp_vsync";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hst_bt_en: hst-bt-en-state {</div><div class='add'>+		pins = "gpio85";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		output-low;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hst_sw_ctrl: hst-sw-ctrl-state {</div><div class='add'>+		pins = "gpio86";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	/delete-property/interrupts;</div><div class='add'>+	interrupts-extended = &lt;&amp;intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			      &lt;&amp;tlmm 31 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-1 = &lt;&amp;bt_uart_sleep_cts&gt;,</div><div class='add'>+		    &lt;&amp;bt_uart_sleep_rts&gt;,</div><div class='add'>+		    &lt;&amp;bt_uart_sleep_txd&gt;,</div><div class='add'>+		    &lt;&amp;bt_uart_sleep_rxd&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth: bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6750-bt";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hst_bt_en&gt;,</div><div class='add'>+			    &lt;&amp;hst_sw_ctrl&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 85 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 86 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l19b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vddbtcxmx-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_s7b_0p952&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vdd19_pmu_rfa_i&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vdd13_pmu_rfa_i&gt;;</div><div class='add'>+		vddrfa2p2-supply = &lt;&amp;vreg_s1c_2p2&gt;;</div><div class='add'>+		vddasd-supply = &lt;&amp;vreg_l11c_2p8&gt;;</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,local-bd-address-broken;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 175 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l7b_2p96&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;800000&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * Technically l9b enables an eLDO (supplied by s1b) which then powers</div><div class='add'>+	 * VCCQ2 of the UFS.</div><div class='add'>+	 */</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l9b_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vdd_a_ufs_0_core&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vdd_a_ufs_0_1p2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	/* USB 2.0 only */</div><div class='add'>+	qcom,select-utmi-as-pipe-clk;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	/* Remove USB3 phy */</div><div class='add'>+	phys = &lt;&amp;usb_1_hsphy&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vdd_a_usbhs_core&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vdd_a_usbhs_1p8&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vdd_a_usbhs_3p1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;venus {</div><div class='add'>+	firmware-name = "qcom/sm7325/nothing/spacewar/vpu20_1v.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm7325.dtsi b/arch/arm64/boot/dts/qcom/sm7325.dtsi<br/>new file mode 100644<br/>index 000000000000..85d34b53e5e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm7325.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm7325.dtsi</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Eugene Lepshy &lt;fekz115@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2024, Danila Tikhonov &lt;danila@jiaxyga.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sc7280.dtsi"</div><div class='add'>+</div><div class='add'>+/* SM7325 uses Kryo 670 */</div><div class='add'>+&amp;cpu0 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu1 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu2 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu3 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu4 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu5 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu6 { compatible = "qcom,kryo670"; };</div><div class='add'>+&amp;cpu7 { compatible = "qcom,kryo670"; };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts<br/>index bac08f00b303..0339a572f34d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8150-hdk.dts</a></div><div class='hunk'>@@ -478,15 +478,11 @@</div><div class='ctx'> </div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> 	qcom,master-dsi;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy {</div><div class='hunk'>@@ -500,18 +496,15 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> </div><div class='ctx'> 	/* DSI1 is slave, so use DSI0 clocks */</div><div class='del'>-	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_b&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi1_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_b&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi1_phy {</div><div class='hunk'>@@ -578,6 +571,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -714,5 +712,5 @@</div><div class='ctx'> 	vdd-1.3-rfa-supply = &lt;&amp;vreg_l2c_1p3&gt;;</div><div class='ctx'> 	vdd-3.3-ch0-supply = &lt;&amp;vreg_l11c_3p3&gt;;</div><div class='ctx'> </div><div class='del'>-	qcom,ath10k-calibration-variant = "Qualcomm_sm8150hdk";</div><div class='add'>+	qcom,calibration-variant = "Qualcomm_sm8150hdk";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts b/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts<br/>index b039773c4465..835ef929ff2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts</a></div><div class='hunk'>@@ -376,8 +376,8 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;da7280_intr_default&gt;;</div><div class='ctx'> </div><div class='ctx'> 		dlg,actuator-type = "LRA";</div><div class='del'>-		dlg,dlg,const-op-mode = &lt;1&gt;;</div><div class='del'>-		dlg,dlg,periodic-op-mode = &lt;1&gt;;</div><div class='add'>+		dlg,const-op-mode = &lt;1&gt;;</div><div class='add'>+		dlg,periodic-op-mode = &lt;1&gt;;</div><div class='ctx'> 		dlg,nom-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 		dlg,abs-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'> 		dlg,imax-microamp = &lt;129000&gt;;</div><div class='hunk'>@@ -430,6 +430,11 @@</div><div class='ctx'> 	/* MAX34417 @ 0x1e */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -448,22 +453,22 @@</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/microsoft/adsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/microsoft/adsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_cdsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/microsoft/cdsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/microsoft/cdsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_mpss {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/microsoft/modem.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/microsoft/modem.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_slpi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/microsoft/slpi.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/microsoft/slpi.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pon_resin {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts<br/>index 256a1ba94945..12e8e1ada6d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8150-mtp.dts</a></div><div class='hunk'>@@ -358,6 +358,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -374,22 +379,22 @@</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/adsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/adsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_cdsp {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/cdsp.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/cdsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_mpss {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/modem.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/modem.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_slpi {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	firmware-name = "qcom/sm8150/slpi.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8150/slpi.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi<br/>index ae0ca48b89a5..70fd6455518b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi</a></div><div class='hunk'>@@ -601,6 +601,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi<br/>index 27f87835bc55..acdba79612aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8150.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8150.dtsi</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm8150.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm8150.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sm8150.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,videocc-sm8150.h&gt;</div><div class='hunk'>@@ -48,7 +49,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -56,20 +57,20 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;488&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;232&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -77,7 +78,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -85,23 +86,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;488&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;232&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -109,23 +110,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;488&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;232&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -133,23 +134,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;488&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;232&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -157,23 +158,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;369&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -181,23 +182,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;369&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -205,23 +206,23 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;369&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -229,54 +230,54 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;421&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu7_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;osm_l3 MASTER_OSM_L3_APPS &amp;osm_l3 SLAVE_OSM_L3&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -284,7 +285,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "little-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -294,7 +295,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "big-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -306,7 +307,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -628,57 +629,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1852,7 +1853,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1860,30 +1862,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "tbu",</div><div class='del'>-				      "ref";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			iommu-map = &lt;0x0   &amp;apps_smmu 0x1d80 0x1&gt;,</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1d81 0x1&gt;;</div><div class='hunk'>@@ -1969,7 +1968,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1977,30 +1977,27 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_MSTR_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_SLV_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_TBU_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;;</div><div class='ctx'> 			clock-names = "pipe",</div><div class='ctx'> 				      "aux",</div><div class='ctx'> 				      "cfg",</div><div class='ctx'> 				      "bus_master",</div><div class='ctx'> 				      "bus_slave",</div><div class='del'>-				      "slave_q2a",</div><div class='del'>-				      "tbu",</div><div class='del'>-				      "ref";</div><div class='add'>+				      "slave_q2a";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='hunk'>@@ -3096,7 +3093,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07040000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3116,7 +3113,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07140000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3136,7 +3133,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07240000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3156,7 +3153,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07340000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3176,7 +3173,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07440000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3196,7 +3193,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07540000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3216,7 +3213,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07640000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3236,7 +3233,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07740000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3657,7 +3654,10 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x140 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -3734,7 +3734,10 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x160 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_2_hsphy&gt;, &lt;&amp;usb_2_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -3804,7 +3807,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8150-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3887,16 +3890,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -3905,7 +3912,7 @@</div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -3977,8 +3984,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='hunk'>@@ -4070,8 +4077,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='hunk'>@@ -4126,10 +4133,10 @@</div><div class='ctx'> 			compatible = "qcom,sm8150-dispcc";</div><div class='ctx'> 			reg = &lt;0 0x0af00000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -4296,6 +4303,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_adsp: remoteproc@17300000 {</div><div class='hunk'>@@ -4362,6 +4370,7 @@</div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,	/* GICD */</div><div class='ctx'> 			      &lt;0x0 0x17a60000 0x0 0x100000&gt;;	/* GICR * 8 */</div><div class='hunk'>@@ -4415,7 +4424,7 @@</div><div class='ctx'> 			frame@17c27000 {</div><div class='ctx'> 				frame-number = &lt;3&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				reg = &lt;0x17c26000 0x1000&gt;;</div><div class='add'>+				reg = &lt;0x17c27000 0x1000&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -4457,7 +4466,7 @@</div><div class='ctx'> 					  &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;,</div><div class='ctx'> 					  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpmhcc: clock-controller {</div><div class='ctx'> 				compatible = "qcom,sm8150-rpmh-clk";</div><div class='hunk'>@@ -4553,7 +4562,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8150-lmh";</div><div class='ctx'> 			reg = &lt;0 0x18350800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;60000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;84500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;85000&gt;;</div><div class='hunk'>@@ -4565,7 +4574,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8150-lmh";</div><div class='ctx'> 			reg = &lt;0 0x18358800 0 0x400&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			cpus = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpus = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 			qcom,lmh-temp-arm-millicelsius = &lt;60000&gt;;</div><div class='ctx'> 			qcom,lmh-temp-low-millicelsius = &lt;84500&gt;;</div><div class='ctx'> 			qcom,lmh-temp-high-millicelsius = &lt;85000&gt;;</div><div class='hunk'>@@ -4634,17 +4643,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4677,17 +4686,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4720,17 +4729,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4763,17 +4772,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4806,17 +4815,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4849,17 +4858,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4892,17 +4901,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4935,17 +4944,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4978,17 +4987,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -5021,17 +5030,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -5064,17 +5073,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -5107,17 +5116,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts<br/>index 1bbb71e1a4fc..f5c193c6c5f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-hdk.dts</a></div><div class='hunk'>@@ -373,6 +373,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts<br/>index 21b2ca1def83..7f592bd30248 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-mtp.dts</a></div><div class='hunk'>@@ -627,6 +627,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_id_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi b/arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi<br/>new file mode 100644<br/>index 000000000000..cf3d917addd8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-samsung-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,204 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include "sm8250.dtsi"</div><div class='add'>+#include "pm8150.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer@9c000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0x9c000000 0x0 0x2300000&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2400&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vol_up_n&gt;;</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			gpios = &lt;&amp;pm8150_gpios 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		cont_splash_mem: memory@9c000000 {</div><div class='add'>+			reg = &lt;0x0 0x9c000000 0x0 0x2300000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ramoops@9fa00000 {</div><div class='add'>+			compatible = "ramoops";</div><div class='add'>+			reg = &lt;0x0 0x9fa00000 0x0 0x100000&gt;;</div><div class='add'>+			record-size = &lt;0x4000&gt;;</div><div class='add'>+			console-size = &lt;0x40000&gt;;</div><div class='add'>+			ftrace-size = &lt;0x40000&gt;;</div><div class='add'>+			pmsg-size = &lt;0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8150-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "a";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4a_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2a_3p1: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2a_3p1";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5a_0p88: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5a_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6a_1p2: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6a_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9a_1p2: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9a_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12a_1p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12a_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17a_3p0: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17a_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;2496000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8150_gpios {</div><div class='add'>+	vol_up_n: vol-up-n-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+		input-enable;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;40 4&gt;; /* I2C (Unused) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	/* Limit to USB 2.0 for now */</div><div class='add'>+	qcom,select-utmi-as-pipe-clk;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_dwc3 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	/* Remove USB3 phy */</div><div class='add'>+	phys = &lt;&amp;usb_1_hsphy&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5a_0p88&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2a_3p1&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l17a_3p0&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;800000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l6a_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;800000&gt;;</div><div class='add'>+	vccq2-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+	vccq2-max-microamp = &lt;800000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l5a_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l9a_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts b/arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts<br/>new file mode 100644<br/>index 000000000000..dc7c3816f156<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-samsung-r8q.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sm8250-samsung-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S20 FE";</div><div class='add'>+	compatible = "samsung,r8q", "qcom,sm8250";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adsp {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/r8q/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdsp {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/r8q/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;slpi {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/r8q/slpi.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts b/arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts<br/>new file mode 100644<br/>index 000000000000..d6aeb5af2ba4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-samsung-x1q.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sm8250-samsung-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S20";</div><div class='add'>+	compatible = "samsung,x1q", "qcom,sm8250";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adsp {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/x1q/adsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdsp {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/x1q/cdsp.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;slpi {</div><div class='add'>+	firmware-name = "qcom/sm8250/Samsung/x1q/slpi.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi<br/>index f6870d3f2886..d8289b2698f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi</a></div><div class='hunk'>@@ -591,6 +591,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi<br/>index 3596dd328c31..465fd6e954a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi</a></div><div class='hunk'>@@ -30,6 +30,10 @@</div><div class='ctx'> 	qcom,msm-id = &lt;QCOM_ID_SM8250 0x20001&gt;; /* SM8250 v2.1 */</div><div class='ctx'> 	qcom,board-id = &lt;0x10008 0&gt;;</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -97,6 +101,67 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qca6390-pmu {</div><div class='add'>+		compatible = "qcom,qca6390-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en_state&gt;, &lt;&amp;wlan_en_state&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s6a_0p95&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s6a_0p95&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s6a_0p95&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s8c_1p35&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s5a_1p9&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s8c_1p35&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s5a_1p9&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -594,7 +659,8 @@</div><div class='ctx'> 	qcom,dual-dsi-mode;</div><div class='ctx'> 	qcom,sync-dual-dsi;</div><div class='ctx'> 	/* DSI1 is slave, so use DSI0 clocks */</div><div class='del'>-	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -619,6 +685,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcieport0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1101";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "Xiaomi_Pad_5Pro";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pm8150_gpios {</div><div class='ctx'> 	vol_up_n: vol-up-n-state {</div><div class='ctx'> 		pins = "gpio6";</div><div class='hunk'>@@ -673,6 +758,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -701,6 +791,37 @@</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;40 4&gt;;</div><div class='add'>+</div><div class='add'>+	bt_en_state: bt-default-state {</div><div class='add'>+		pins = "gpio21";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en_state: wlan-default-state {</div><div class='add'>+		pins = "gpio20";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,qca6390-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p7-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts<br/>index 86e1f7fd1c20..4ad24974c09f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include "pm8150.dtsi"</div><div class='ctx'> #include "pm8150b.dtsi"</div><div class='ctx'> #include "pm8150l.dtsi"</div><div class='del'>-#include "pm8009.dtsi"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Delete following upstream (sm8250.dtsi) reserved</div><div class='hunk'>@@ -50,18 +49,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	battery_l: battery-l {</div><div class='add'>+	battery: battery {</div><div class='ctx'> 		compatible = "simple-battery";</div><div class='del'>-		voltage-min-design-microvolt = &lt;3870000&gt;;</div><div class='del'>-		energy-full-design-microwatt-hours = &lt;16700000&gt;;</div><div class='del'>-		charge-full-design-microamp-hours = &lt;4420000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	battery_r: battery-r {</div><div class='del'>-		compatible = "simple-battery";</div><div class='del'>-		voltage-min-design-microvolt = &lt;3870000&gt;;</div><div class='del'>-		energy-full-design-microwatt-hours = &lt;16700000&gt;;</div><div class='del'>-		charge-full-design-microamp-hours = &lt;4420000&gt;;</div><div class='add'>+		charge-full-design-microamp-hours = &lt;8840000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;34300000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4370000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	bl_vddpos_5p5: bl-vddpos-regulator {</div><div class='hunk'>@@ -406,63 +399,6 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	regulators-2 {</div><div class='del'>-		compatible = "qcom,pm8009-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "f";</div><div class='del'>-</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-s2-supply = &lt;&amp;vreg_bob&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s8c_1p35&gt;;</div><div class='del'>-		vdd-l5-l6-supply = &lt;&amp;vreg_bob&gt;;</div><div class='del'>-		vdd-l7-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s1f_1p2: smps1 {</div><div class='del'>-			regulator-name = "vreg_s1f_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_s2f_0p5: smps2 {</div><div class='del'>-			regulator-name = "vreg_s2f_0p5";</div><div class='del'>-			regulator-min-microvolt = &lt;512000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* L1 is unused. */</div><div class='del'>-</div><div class='del'>-		vreg_l2f_1p3: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2f_1p3";</div><div class='del'>-			regulator-min-microvolt = &lt;1056000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* L3 &amp; L4 are unused. */</div><div class='del'>-</div><div class='del'>-		vreg_l5f_2p8: ldo5 {</div><div class='del'>-			regulator-name = "vreg_l5f_2p85";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l6f_2p8: ldo6 {</div><div class='del'>-			regulator-name = "vreg_l6f_2p8";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l7f_1p8: ldo7 {</div><div class='del'>-			regulator-name = "vreg_l7f_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cdsp {</div><div class='hunk'>@@ -495,17 +431,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	fuel-gauge@55 {</div><div class='del'>-		compatible = "ti,bq27z561";</div><div class='del'>-		reg = &lt;0x55&gt;;</div><div class='del'>-		monitored-battery = &lt;&amp;battery_r&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;i2c11 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -523,17 +448,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c13 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	fuel-gauge@55 {</div><div class='del'>-		compatible = "ti,bq27z561";</div><div class='del'>-		reg = &lt;0x55&gt;;</div><div class='del'>-		monitored-battery = &lt;&amp;battery_l&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -554,6 +468,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pon {</div><div class='add'>+	mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+	mode-recovery = &lt;0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi<br/>index 630f4eff20bf..50dd11432bb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8250.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8250.dtsi</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm8250.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sm8250.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='hunk'>@@ -84,7 +85,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -93,7 +94,7 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='hunk'>@@ -101,21 +102,21 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;448&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;105&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x20000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-size = &lt;0x400000&gt;;</div><div class='hunk'>@@ -124,7 +125,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='hunk'>@@ -132,24 +133,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;448&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;105&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x20000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='hunk'>@@ -157,24 +158,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;448&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;105&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x20000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='hunk'>@@ -182,24 +183,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;448&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;105&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x20000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='hunk'>@@ -207,24 +208,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;379&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x40000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='hunk'>@@ -232,24 +233,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;379&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x40000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='hunk'>@@ -257,24 +258,24 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;379&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu4_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x40000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo485";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='hunk'>@@ -282,55 +283,55 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;444&gt;;</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu7_opp_table&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;,</div><div class='ctx'> 					&lt;&amp;epss_l3 MASTER_OSM_L3_APPS &amp;epss_l3 SLAVE_OSM_L3&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-size = &lt;0x80000&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -338,7 +339,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -348,7 +349,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -360,7 +361,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c244&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3264&gt;;</div><div class='hunk'>@@ -606,7 +607,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu7_opp9: opp-1747200000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1747200000&gt;;</div><div class='ctx'> 			opp-peak-kBps = &lt;5412000 42393600&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -689,57 +690,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1029,7 +1030,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1074,7 +1075,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1119,7 +1120,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1164,7 +1165,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1226,7 +1227,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1288,7 +1289,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_2 0 &amp;qup_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_2 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1369,7 +1370,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1414,7 +1415,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1459,7 +1460,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1521,7 +1522,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1566,7 +1567,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1611,7 +1612,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1656,7 +1657,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1718,7 +1719,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1796,7 +1797,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1841,7 +1842,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1886,7 +1887,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1931,7 +1932,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -1976,7 +1977,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -2038,7 +2039,7 @@</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 				interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_1 0 &amp;qup_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;gem_noc MASTER_AMPSS_M0 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt SLAVE_EBI_CH0 0&gt;;</div><div class='hunk'>@@ -2149,7 +2150,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2157,13 +2159,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='hunk'>@@ -2269,7 +2272,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2277,13 +2281,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='hunk'>@@ -2394,7 +2399,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2402,13 +2408,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 290 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 415 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 416 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 417 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_2_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_2_AUX_CLK&gt;,</div><div class='hunk'>@@ -3522,7 +3529,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07040000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3541,7 +3548,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07140000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3560,7 +3567,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07240000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3579,7 +3586,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07340000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3598,7 +3605,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07440000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3617,7 +3624,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07540000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3636,7 +3643,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07640000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -3655,7 +3662,7 @@</div><div class='ctx'> 			compatible = "arm,coresight-etm4x", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x07740000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+			cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='hunk'>@@ -4207,6 +4214,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -4294,6 +4303,8 @@</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x20 0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_2_hsphy&gt;, &lt;&amp;usb_2_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -4327,14 +4338,6 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			video-decoder {</div><div class='del'>-				compatible = "venus-decoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			video-encoder {</div><div class='del'>-				compatible = "venus-encoder";</div><div class='del'>-			};</div><div class='del'>-</div><div class='ctx'> 			venus_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='ctx'> </div><div class='hunk'>@@ -4481,20 +4484,20 @@</div><div class='ctx'> 				    "vfe_lite0",</div><div class='ctx'> 				    "vfe_lite1";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 359 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 360 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "csiphy0",</div><div class='ctx'> 					  "csiphy1",</div><div class='ctx'> 					  "csiphy2",</div><div class='hunk'>@@ -4648,7 +4651,6 @@</div><div class='ctx'> 			clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk";</div><div class='ctx'> 			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='ctx'> 			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -4686,7 +4688,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8250-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='hunk'>@@ -4769,16 +4771,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -4787,7 +4793,7 @@</div><div class='ctx'> 				#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='del'>-				power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='ctx'> </div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> </div><div class='hunk'>@@ -4857,8 +4863,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -4949,8 +4957,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -5007,10 +5017,10 @@</div><div class='ctx'> 			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='ctx'> 			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -6078,6 +6088,7 @@</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x0 0x17a00000 0x0 0x10000&gt;,     /* GICD */</div><div class='hunk'>@@ -6165,7 +6176,7 @@</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;, &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;, &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpmhcc: clock-controller {</div><div class='ctx'> 				compatible = "qcom,sm8250-rpmh-clk";</div><div class='hunk'>@@ -6302,17 +6313,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6345,17 +6356,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6388,17 +6399,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6431,17 +6442,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6474,17 +6485,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6517,17 +6528,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6560,17 +6571,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6603,17 +6614,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6646,17 +6657,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6689,17 +6700,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6732,17 +6743,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6775,17 +6786,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts<br/>index 895adce59e75..24a8c91e9f70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8350-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8350-hdk.dts</a></div><div class='hunk'>@@ -382,22 +382,14 @@</div><div class='ctx'> 	firmware-name = "qcom/sm8350/cdsp.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;mdss_dsi0 {</div><div class='ctx'> 	vdda-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;lt9611_a&gt;;</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dsi0_phy  {</div><div class='hunk'>@@ -929,3 +921,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ipa {</div><div class='add'>+	qcom,gsi-loader = "self";</div><div class='add'>+	memory-region = &lt;&amp;pil_ipa_fw_mem&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	firmware-name = "qcom/sm8350/ipa_fws.mbn";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi<br/>index 37a2aba0d4ca..fc4ce9d4977e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8350.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8350.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,dispcc-sm8350.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm8350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gpucc-sm8350.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='hunk'>@@ -21,6 +22,7 @@</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +44,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -51,23 +53,23 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -75,171 +77,171 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a55";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a78";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x1";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -247,7 +249,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -257,7 +259,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -269,7 +271,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_apss_off: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2752&gt;;</div><div class='hunk'>@@ -277,7 +279,7 @@</div><div class='ctx'> 				min-residency-us = &lt;6118&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_aoss_sleep: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;3263&gt;;</div><div class='hunk'>@@ -320,57 +322,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_APSS_OFF &amp;CLUSTER_SLEEP_AOSS_SLEEP&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_apss_off &amp;cluster_sleep_aoss_sleep&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -455,7 +457,7 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pil_camera_mem: mmeory@85200000 {</div><div class='add'>+		pil_camera_mem: memory@85200000 {</div><div class='ctx'> 			reg = &lt;0x0 0x85200000 0x0 0x500000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1536,7 +1538,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1544,13 +1547,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1645,7 +1649,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1653,13 +1658,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1806,11 +1812,11 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;16&gt;;</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x594 0x0011&gt;,</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x596 0x0011&gt;;</div><div class='del'>-			/* FIXME: Probing BAM DMA causes some abort and system hang */</div><div class='del'>-			status = "fail";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		crypto: crypto@1dfa000 {</div><div class='hunk'>@@ -1822,8 +1828,6 @@</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x596 0x0011&gt;;</div><div class='ctx'> 			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 			interconnect-names = "memory";</div><div class='del'>-			/* FIXME: dependency BAM DMA is disabled */</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ipa: ipa@1e40000 {</div><div class='hunk'>@@ -1876,6 +1880,142 @@</div><div class='ctx'> 			reg = &lt;0x0 0x1fc0000 0x0 0x30000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		adsp: remoteproc@3000000 {</div><div class='add'>+			compatible = "qcom,sm8350-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x03000000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+					  "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;pil_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				apr {</div><div class='add'>+					compatible = "qcom,apr-v2";</div><div class='add'>+					qcom,glink-channels = "apr_audio_svc";</div><div class='add'>+					qcom,domain = &lt;APR_DOMAIN_ADSP&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					service@3 {</div><div class='add'>+						reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='add'>+						compatible = "qcom,q6core";</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6afe: service@4 {</div><div class='add'>+						compatible = "qcom,q6afe";</div><div class='add'>+						reg = &lt;APR_SVC_AFE&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6afedai: dais {</div><div class='add'>+							compatible = "qcom,q6afe-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6afecc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6afe-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6asm: service@7 {</div><div class='add'>+						compatible = "qcom,q6asm";</div><div class='add'>+						reg = &lt;APR_SVC_ASM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6asmdai: dais {</div><div class='add'>+							compatible = "qcom,q6asm-dais";</div><div class='add'>+							#address-cells = &lt;1&gt;;</div><div class='add'>+							#size-cells = &lt;0&gt;;</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+</div><div class='add'>+							dai@0 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							dai@1 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA2&gt;;</div><div class='add'>+							};</div><div class='add'>+</div><div class='add'>+							dai@2 {</div><div class='add'>+								reg = &lt;MSM_FRONTEND_DAI_MULTIMEDIA3&gt;;</div><div class='add'>+							};</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6adm: service@8 {</div><div class='add'>+						compatible = "qcom,q6adm";</div><div class='add'>+						reg = &lt;APR_SVC_ADM&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6routing: routing {</div><div class='add'>+							compatible = "qcom,q6adm-routing";</div><div class='add'>+							#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lpass_tlmm: pinctrl@33c0000 {</div><div class='ctx'> 			compatible = "qcom,sm8350-lpass-lpi-pinctrl";</div><div class='ctx'> 			reg = &lt;0 0x033c0000 0 0x20000&gt;,</div><div class='hunk'>@@ -2078,7 +2218,7 @@</div><div class='ctx'> </div><div class='ctx'> 		mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sm8350-mpss-pas";</div><div class='del'>-			reg = &lt;0x0 0x04080000 0x0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2360,6 +2500,115 @@</div><div class='ctx'> 			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cdsp: remoteproc@a300000 {</div><div class='add'>+			compatible = "qcom,sm8350-cdsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x0a300000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+					  "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			power-domain-names = "cx", "mxc";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;compute_noc MASTER_CDSP_PROC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;pil_cdsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_cdsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "cdsp";</div><div class='add'>+				qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "cdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2161 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1181 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2162 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1182 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2163 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1183 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2164 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1184 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2165 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1185 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2166 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1186 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@7 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;7&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2167 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1187 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@8 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;8&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x2168 0x0400&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1188 0x0420&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					/* note: secure cb9 in downstream */</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_1: usb@a6f8800 {</div><div class='ctx'> 			compatible = "qcom,sm8350-dwc3", "qcom,dwc3";</div><div class='ctx'> 			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='hunk'>@@ -2408,7 +2657,10 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='hunk'>@@ -2484,7 +2736,10 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x20 0x0&gt;;</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> 				phys = &lt;&amp;usb_2_hsphy&gt;, &lt;&amp;usb_2_qmpphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -2527,7 +2782,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8350-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -2621,16 +2876,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -2711,8 +2970,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi0_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -2810,8 +3069,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dsi1_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -2891,8 +3150,10 @@</div><div class='ctx'> 			compatible = "qcom,sm8350-dispcc";</div><div class='ctx'> 			reg = &lt;0 0x0af00000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> 			clock-names = "bi_tcxo",</div><div class='hunk'>@@ -3282,146 +3543,12 @@</div><div class='ctx'> 				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		adsp: remoteproc@17300000 {</div><div class='del'>-			compatible = "qcom,sm8350-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x17300000 0 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog", "fatal", "ready",</div><div class='del'>-					  "handover", "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='del'>-			power-domain-names = "lcx", "lmx";</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;pil_adsp_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				label = "lpass";</div><div class='del'>-				qcom,remote-pid = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-				apr {</div><div class='del'>-					compatible = "qcom,apr-v2";</div><div class='del'>-					qcom,glink-channels = "apr_audio_svc";</div><div class='del'>-					qcom,domain = &lt;APR_DOMAIN_ADSP&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					service@3 {</div><div class='del'>-						reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='del'>-						compatible = "qcom,q6core";</div><div class='del'>-						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6afe: service@4 {</div><div class='del'>-						compatible = "qcom,q6afe";</div><div class='del'>-						reg = &lt;APR_SVC_AFE&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6afedai: dais {</div><div class='del'>-							compatible = "qcom,q6afe-dais";</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						q6afecc: clock-controller {</div><div class='del'>-							compatible = "qcom,q6afe-clocks";</div><div class='del'>-							#clock-cells = &lt;2&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6asm: service@7 {</div><div class='del'>-						compatible = "qcom,q6asm";</div><div class='del'>-						reg = &lt;APR_SVC_ASM&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6asmdai: dais {</div><div class='del'>-							compatible = "qcom,q6asm-dais";</div><div class='del'>-							#address-cells = &lt;1&gt;;</div><div class='del'>-							#size-cells = &lt;0&gt;;</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='del'>-</div><div class='del'>-							dai@0 {</div><div class='del'>-								reg = &lt;0&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							dai@1 {</div><div class='del'>-								reg = &lt;1&gt;;</div><div class='del'>-							};</div><div class='del'>-</div><div class='del'>-							dai@2 {</div><div class='del'>-								reg = &lt;2&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6adm: service@8 {</div><div class='del'>-						compatible = "qcom,q6adm";</div><div class='del'>-						reg = &lt;APR_SVC_ADM&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6routing: routing {</div><div class='del'>-							compatible = "qcom,q6adm-routing";</div><div class='del'>-							#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-					label = "adsp";</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17a00000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='hunk'>@@ -3504,7 +3631,7 @@</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;, &lt;SLEEP_TCS   3&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    3&gt;, &lt;CONTROL_TCS 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			rpmhcc: clock-controller {</div><div class='ctx'> 				compatible = "qcom,sm8350-rpmh-clk";</div><div class='hunk'>@@ -3588,115 +3715,6 @@</div><div class='ctx'> 			#freq-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		cdsp: remoteproc@98900000 {</div><div class='del'>-			compatible = "qcom,sm8350-cdsp-pas";</div><div class='del'>-			reg = &lt;0 0x98900000 0 0x1400000&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog", "fatal", "ready",</div><div class='del'>-					  "handover", "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='del'>-			power-domain-names = "cx", "mxc";</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;compute_noc MASTER_CDSP_PROC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;pil_cdsp_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_cdsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				label = "cdsp";</div><div class='del'>-				qcom,remote-pid = &lt;5&gt;;</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-					label = "cdsp";</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@1 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2161 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1181 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@2 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;2&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2162 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1182 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2163 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1183 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2164 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1184 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2165 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1185 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@6 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;6&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2166 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1186 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@7 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;7&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2167 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1187 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@8 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;8&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x2168 0x0400&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1188 0x0420&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					/* note: secure cb9 in downstream */</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal_zones: thermal-zones {</div><div class='hunk'>@@ -3728,17 +3746,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu0_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3771,17 +3789,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu1_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3814,17 +3832,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu2_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3857,17 +3875,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu3_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3900,17 +3918,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3943,17 +3961,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3986,17 +4004,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4029,17 +4047,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_top_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4072,17 +4090,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu4_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4115,17 +4133,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu5_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4158,17 +4176,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu6_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4201,17 +4219,17 @@</div><div class='ctx'> 			cooling-maps {</div><div class='ctx'> 				map0 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert0&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 				map1 {</div><div class='ctx'> 					trip = &lt;&amp;cpu7_bottom_alert1&gt;;</div><div class='del'>-					cooling-device = &lt;&amp;CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-							 &lt;&amp;CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+							 &lt;&amp;cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts<br/>index a754b8fe9167..0c6aa7ddf432 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8450-hdk.dts</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart7;</div><div class='add'>+		serial1 = &amp;uart20;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wcd938x: audio-codec {</div><div class='hunk'>@@ -247,6 +248,71 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en&gt;, &lt;&amp;wlan_en&gt;, &lt;&amp;xo_clk_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 80 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 81 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		swctrl-gpios = &lt;&amp;tlmm 82 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		xo-clk-gpios = &lt;&amp;tlmm 204 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_s10b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s11b_0p95&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_s12b_1p25&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_s2e_0p85&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_s11b_0p95&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_s11b_0p95&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_s12b_1p25&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_s1c_1p86&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_s12b_1p25&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_s1c_1p86&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -575,10 +641,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -689,6 +751,23 @@</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcieport0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -896,6 +975,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;qupv3_id_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhc_2 {</div><div class='ctx'> 	cd-gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='hunk'>@@ -1073,6 +1156,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart20 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart20_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ufs_mem_hc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -1096,11 +1199,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='del'>-	dr_mode = "otg";</div><div class='del'>-	usb-role-switch;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -1134,6 +1232,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='add'>+	bt_en: bt-en-state {</div><div class='add'>+		pins = "gpio81";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	spkr_1_sd_n_active: spkr-1-sd-n-active-state {</div><div class='ctx'> 		pins = "gpio1";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -1157,4 +1263,46 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio80";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart20_default: uart20-default-state {</div><div class='add'>+		cts-pins {</div><div class='add'>+			pins = "gpio76";</div><div class='add'>+			function = "qup20";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pins = "gpio77";</div><div class='add'>+			function = "qup20";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "gpio78";</div><div class='add'>+			function = "qup20";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "gpio79";</div><div class='add'>+			function = "qup20";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xo_clk_default: xo-clk-state {</div><div class='add'>+		pins = "gpio204";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts<br/>index 7b62ead68e77..56db5f79f59d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-qrd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8450-qrd.dts</a></div><div class='hunk'>@@ -28,6 +28,49 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 91 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_sbu: endpoint {</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vph_pwr: vph-pwr-regulator {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vph_pwr";</div><div class='hunk'>@@ -349,6 +392,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dispcc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -457,8 +504,8 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='add'>+&amp;usb_1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_hs_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='hunk'>@@ -483,3 +530,7 @@</div><div class='ctx'> 	vdda-phy-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1b_0p91&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss_in&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts b/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts<br/>new file mode 100644<br/>index 000000000000..880d74ae6032<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sm8450.dtsi"</div><div class='add'>+#include "pm8350.dtsi"</div><div class='add'>+#include "pm8350c.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Samsung Galaxy S22 5G";</div><div class='add'>+	compatible = "samsung,r0q", "qcom,sm8450";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		framebuffer: framebuffer@b8000000 {</div><div class='add'>+			compatible = "simple-framebuffer";</div><div class='add'>+			reg = &lt;0x0 0xb8000000 0x0 0x2b00000&gt;;</div><div class='add'>+			width = &lt;1080&gt;;</div><div class='add'>+			height = &lt;2340&gt;;</div><div class='add'>+			stride = &lt;(1080 * 4)&gt;;</div><div class='add'>+			format = "a8r8g8b8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		/*</div><div class='add'>+		 * The bootloader will only keep display hardware enabled</div><div class='add'>+		 * if this memory region is named exactly 'splash_region'</div><div class='add'>+		 */</div><div class='add'>+		splash-region@b8000000 {</div><div class='add'>+			reg = &lt;0x0 0xb8000000 0x0 0x2b00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8350-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s11-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s12-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-l2-l7-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l5-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p07: ldo2 {</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_0p88: ldo5 {</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;888000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8350c-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s6-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s9-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s10-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-l1-l12-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l2-l8-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l3-l4-l5-l7-l13-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+		vdd-l6-l9-l11-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-bob-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob: bob {</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p8: ldo1 {</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;36 4&gt;; /* SPI (not linked to anything) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1 {</div><div class='add'>+	/* Keep USB 2.0 only for now */</div><div class='add'>+	qcom,select-utmi-as-pipe-clk;</div><div class='add'>+</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	/* Remove USB3 phy */</div><div class='add'>+	phys = &lt;&amp;usb_1_hsphy&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_hsphy {</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l5b_0p88&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;vreg_l1c_1p8&gt;;</div><div class='add'>+	vdda33-supply = &lt;&amp;vreg_l2b_3p07&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi<br/>index 17dbb67868ae..6bd315e10992 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi</a></div><div class='hunk'>@@ -468,6 +468,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dispcc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpi_dma0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -777,11 +781,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_hsphy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi<br/>index 9bafb3b350ff..23420e692472 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8450.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8450.dtsi</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm8450-camcc.h&gt;</div><div class='hunk'>@@ -43,7 +44,7 @@</div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -51,23 +52,23 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -75,171 +76,171 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x400&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x500&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x600&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,kryo780";</div><div class='ctx'> 			reg = &lt;0x0 0x700&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -247,7 +248,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -257,7 +258,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -269,7 +270,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;1050&gt;;</div><div class='hunk'>@@ -277,7 +278,7 @@</div><div class='ctx'> 				min-residency-us = &lt;5309&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2700&gt;;</div><div class='hunk'>@@ -287,6 +288,192 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ete-0 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete0_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-1 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete1_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-2 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete2_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-3 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete3_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-4 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete4_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-5 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete5_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete5&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-6 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete6_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-7 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+		cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete7_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	funnel-ete {</div><div class='add'>+		compatible = "arm,coresight-static-funnel";</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				funnel_ete_out_funnel_apss: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;funnel_apss_in_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				funnel_ete_in_ete0: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete0_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				funnel_ete_in_ete1: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete1_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				funnel_ete_in_ete2: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete2_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				funnel_ete_in_ete3: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete3_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				funnel_ete_in_ete4: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete4_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				funnel_ete_in_ete5: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete5_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@6 {</div><div class='add'>+				reg = &lt;6&gt;;</div><div class='add'>+				funnel_ete_in_ete6: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete6_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@7 {</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+				funnel_ete_in_ete7: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;ete7_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		scm: scm {</div><div class='ctx'> 			compatible = "qcom,scm-sm8450", "qcom,scm";</div><div class='hunk'>@@ -323,57 +510,57 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;, &lt;&amp;CLUSTER_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;, &lt;&amp;cluster_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1787,7 +1974,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1795,13 +1983,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='hunk'>@@ -1880,7 +2069,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pcie@0 {</div><div class='add'>+			pcieport0: pcie@0 {</div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> 				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> 				bus-range = &lt;0x01 0xff&gt;;</div><div class='hunk'>@@ -1949,7 +2138,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1957,13 +2147,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='hunk'>@@ -1973,7 +2164,7 @@</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK_SRC&gt;,</div><div class='del'>-				 &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+				 &lt;&amp;pcie1_phy QMP_PCIE_PIPE_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2072,6 +2263,68 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie1_ep: pcie-ep@1c08000 {</div><div class='add'>+			compatible = "qcom,sm8450-pcie-ep";</div><div class='add'>+			reg = &lt;0x0 0x01c08000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40200000 0x0 0x1000000&gt;,</div><div class='add'>+			      &lt;0x0 0x01c0b000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40002000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf",</div><div class='add'>+				    "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "addr_space",</div><div class='add'>+				    "mmio",</div><div class='add'>+				    "dma";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_TBU_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "aggre_noc_axi";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "global",</div><div class='add'>+					  "doorbell",</div><div class='add'>+					  "dma";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem",</div><div class='add'>+					     "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1c80 0x7f&gt;;</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_1_BCR&gt;;</div><div class='add'>+			reset-names = "core";</div><div class='add'>+			power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='add'>+			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pcie1_default_state&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie1_phy: phy@1c0e000 {</div><div class='ctx'> 			compatible = "qcom,sm8450-qmp-gen4x2-pcie-phy";</div><div class='ctx'> 			reg = &lt;0 0x01c0e000 0 0x2000&gt;;</div><div class='hunk'>@@ -2492,6 +2745,112 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		remoteproc_adsp: remoteproc@3000000 {</div><div class='add'>+			compatible = "qcom,sm8450-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x03000000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+					  "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		wsa2macro: codec@31e0000 {</div><div class='ctx'> 			compatible = "qcom,sm8450-lpass-wsa-macro";</div><div class='ctx'> 			reg = &lt;0 0x031e0000 0 0x1000&gt;;</div><div class='hunk'>@@ -2688,115 +3047,9 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		remoteproc_adsp: remoteproc@30000000 {</div><div class='del'>-			compatible = "qcom,sm8450-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x30000000 0 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog", "fatal", "ready",</div><div class='del'>-					  "handover", "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='del'>-			power-domain-names = "lcx", "lmx";</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			remoteproc_adsp_glink: glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				label = "lpass";</div><div class='del'>-				qcom,remote-pid = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-				gpr {</div><div class='del'>-					compatible = "qcom,gpr";</div><div class='del'>-					qcom,glink-channels = "adsp_apps";</div><div class='del'>-					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-					qcom,intents = &lt;512 20&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					q6apm: service@1 {</div><div class='del'>-						compatible = "qcom,q6apm";</div><div class='del'>-						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-						#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6apmdai: dais {</div><div class='del'>-							compatible = "qcom,q6apm-dais";</div><div class='del'>-							iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						q6apmbedai: bedais {</div><div class='del'>-							compatible = "qcom,q6apm-lpass-dais";</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6prm: service@2 {</div><div class='del'>-						compatible = "qcom,q6prm";</div><div class='del'>-						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6prmcc: clock-controller {</div><div class='del'>-							compatible = "qcom,q6prm-lpass-clocks";</div><div class='del'>-							#clock-cells = &lt;2&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-					label = "adsp";</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1803 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1804 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1805 0x0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		remoteproc_cdsp: remoteproc@32300000 {</div><div class='ctx'> 			compatible = "qcom,sm8450-cdsp-pas";</div><div class='del'>-			reg = &lt;0 0x32300000 0 0x1400000&gt;;</div><div class='add'>+			reg = &lt;0 0x32300000 0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2903,7 +3156,7 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sm8450-mpss-pas";</div><div class='del'>-			reg = &lt;0x0 0x04080000 0x0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2946,8 +3199,10 @@</div><div class='ctx'> 			reg = &lt;0 0x0aaf0000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='del'>-			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3038,12 +3293,13 @@</div><div class='ctx'> 				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='del'>-			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mdss: display-subsystem@ae00000 {</div><div class='hunk'>@@ -3084,7 +3340,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8450-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -3178,16 +3434,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -3266,8 +3526,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -3358,8 +3620,10 @@</div><div class='ctx'> 					      "iface",</div><div class='ctx'> 					      "bus";</div><div class='ctx'> </div><div class='del'>-				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> 				power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='hunk'>@@ -3418,10 +3682,10 @@</div><div class='ctx'> 				 &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;, /* dp1 */</div><div class='hunk'>@@ -3435,7 +3699,6 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pdc: interrupt-controller@b220000 {</div><div class='hunk'>@@ -3483,6 +3746,7 @@</div><div class='ctx'> 		sram@c3f0000 {</div><div class='ctx'> 			compatible = "qcom,rpmh-stats";</div><div class='ctx'> 			reg = &lt;0 0x0c3f0000 0 0x400&gt;;</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spmi_bus: spmi@c400000 {</div><div class='hunk'>@@ -4141,6 +4405,546 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		stm@10002000 {</div><div class='add'>+			compatible = "arm,coresight-stm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10002000 0x0 0x1000&gt;,</div><div class='add'>+				&lt;0x0 0x16280000 0x0 0x180000&gt;;</div><div class='add'>+			reg-names = "stm-base", "stm-stimulus-base";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					stm_out_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_in0_in_stm&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10041000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10041000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					funnel_in0_in_stm: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;stm_out_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_in0_out_funnel_qdss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_qdss_in_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10042000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10042000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					funnel_in1_in_funnel_apss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_apss_out_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					funnel_in1_in_funnel_dl_center: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_dl_center_out_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_in1_out_funnel_qdss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_qdss_in_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10045000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10045000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					funnel_qdss_in_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_in0_out_funnel_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					funnel_qdss_in_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_in1_out_funnel_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_qdss_out_funnel_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_aoss_in_funnel_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@10046000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10046000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator_qdss_in_replicator_swao: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_swao_out_replicator_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					replicator_qdss_out_replicator_etr: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_etr_in_replicator_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc_etr: tmc@10048000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10048000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0600 0&gt;;</div><div class='add'>+			arm,buffer-size = &lt;0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			arm,scatter-gather;</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etr_in_replicator_etr: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_etr_out_tmc_etr&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@1004e000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x1004e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator_etr_in_replicator_qdss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_qdss_out_replicator_etr&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+</div><div class='add'>+					replicator_etr_out_tmc_etr: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tmc_etr_in_replicator_etr&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10b04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10b04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					funnel_aoss_in_tpda_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_aoss_out_funnel_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					funnel_aoss_in_funnel_qdss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_qdss_out_funnel_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_aoss_out_tmc_etf: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tmc_etf_in_funnel_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc@10b05000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_in_funnel_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_aoss_out_tmc_etf&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_out_replicator_swao: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_swao_in_tmc_etf&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@10b06000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b06000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,replicator-loses-context;</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					replicator_swao_in_tmc_etf: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tmc_etf_out_replicator_swao&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					replicator_swao_out_replicator_qdss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;replicator_qdss_in_replicator_swao&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10b08000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10b08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					tpda_aoss_in_tpdm_swao_prio_0: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpdm_swao_prio_0_out_tpda_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					tpda_aoss_in_tpdm_swao: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpdm_swao_out_tpda_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					tpda_aoss_out_funnel_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_aoss_in_tpda_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b09000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b09000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_swao_prio_0_out_tpda_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_aoss_in_tpdm_swao_prio_0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b0d000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b0d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_swao_out_tpda_aoss: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_aoss_in_tpdm_swao&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c28000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c28000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_dlct_out_tpda_dl_center_26: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_dl_center_26_in_tpdm_dlct&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c29000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c29000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tpdm_ipcc_out_tpda_dl_center_27: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_dl_center_27_in_tpdm_ipcc&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@10c2a000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@10c2b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10c2e000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1a {</div><div class='add'>+					reg = &lt;26&gt;;</div><div class='add'>+					tpda_dl_center_26_in_tpdm_dlct: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpdm_dlct_out_tpda_dl_center_26&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1b {</div><div class='add'>+					reg = &lt;27&gt;;</div><div class='add'>+					tpda_dl_center_27_in_tpdm_ipcc: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpdm_ipcc_out_tpda_dl_center_27&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					tpda_dl_center_out_funnel_dl_center: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_dl_center_in_tpda_dl_center&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10c2f000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					funnel_dl_center_in_tpda_dl_center: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;tpda_dl_center_out_funnel_dl_center&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_dl_center_out_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_in1_in_funnel_dl_center&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@13810000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x13810000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_in_funnel_ete: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_ete_out_funnel_apss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_out_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint =</div><div class='add'>+							&lt;&amp;funnel_in1_in_funnel_apss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@138e0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x138e0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@138f0000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x138f0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@13900000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x13900000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sram@146aa000 {</div><div class='ctx'> 			compatible = "qcom,sm8450-imem", "syscon", "simple-mfd";</div><div class='ctx'> 			reg = &lt;0 0x146aa000 0 0x1000&gt;;</div><div class='hunk'>@@ -4257,6 +5061,7 @@</div><div class='ctx'> 				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17100000 {</div><div class='hunk'>@@ -4354,7 +5159,7 @@</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS  3&gt;, &lt;SLEEP_TCS   2&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS    2&gt;, &lt;CONTROL_TCS 0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -4553,6 +5358,8 @@</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;16&gt;;</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x584 0x11&gt;,</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x588 0x0&gt;,</div><div class='hunk'>@@ -4617,13 +5424,10 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_1: usb@a6f8800 {</div><div class='del'>-			compatible = "qcom,sm8450-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='add'>+		usb_1: usb@a600000 {</div><div class='add'>+			compatible = "qcom,sm8450-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a600000 0 0xfc100&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='hunk'>@@ -4642,12 +5446,14 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='hunk'>@@ -4661,33 +5467,32 @@</div><div class='ctx'> 					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_USB3_0 0&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr", "apps-usb";</div><div class='ctx'> </div><div class='del'>-			usb_1_dwc3: usb@a600000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a600000 0 0xcd00&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='del'>-				phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x0 0x0&gt;;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_u3_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;, &lt;&amp;usb_1_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			usb-role-switch;</div><div class='ctx'> </div><div class='del'>-				ports {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-					port@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_hs: endpoint {</div><div class='del'>-						};</div><div class='add'>+					usb_1_dwc3_hs: endpoint {</div><div class='ctx'> 					};</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-					port@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_ss: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;usb_1_qmpphy_usb_ss_in&gt;;</div><div class='del'>-						};</div><div class='add'>+					usb_1_dwc3_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_qmpphy_usb_ss_in&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts<br/>index 01c921602605..b5d7f0cd443a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550-hdk.dts</a></div><div class='hunk'>@@ -859,8 +859,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6n_3p3: ldo6 {</div><div class='ctx'> 			regulator-name = "vreg_l6n_3p3";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -945,6 +945,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpi_dma1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -998,10 +1002,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -1172,7 +1172,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;swr0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts<br/>index ab447fc252f7..38f2928f23cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550-mtp.dts</a></div><div class='hunk'>@@ -626,8 +626,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6n_3p3: ldo6 {</div><div class='ctx'> 			regulator-name = "vreg_l6n_3p3";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -672,6 +672,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpass_tlmm {</div><div class='ctx'> 	spkr_1_sd_n_active: spkr-1-sd-n-active-state {</div><div class='ctx'> 		pins = "gpio17";</div><div class='hunk'>@@ -734,10 +738,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -825,7 +825,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;swr0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts<br/>index 6052dd922ec5..a3f4200a1145 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-qrd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-qrd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-qrd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550-qrd.dts</a></div><div class='hunk'>@@ -702,8 +702,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6n_3p3: ldo6 {</div><div class='ctx'> 			regulator-name = "vreg_l6n_3p3";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -779,6 +779,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpi_dma1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -853,10 +857,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -1005,7 +1005,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;swr0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts b/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts<br/>index 3d351e90bb39..b4ef40ae2cd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts</a></div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		 * The bootloader will only keep display hardware enabled</div><div class='ctx'> 		 * if this memory region is named exactly 'splash_region'</div><div class='ctx'> 		 */</div><div class='del'>-		splash_region@b8000000 {</div><div class='add'>+		splash-region@b8000000 {</div><div class='ctx'> 			reg = &lt;0x0 0xb8000000 0x0 0x2b00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -487,8 +487,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l6n_3p3: ldo6 {</div><div class='ctx'> 			regulator-name = "vreg_l6n_3p3";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -547,25 +547,25 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='del'>-	firmware-name = "qcom/sm8550/adsp.mdt",</div><div class='del'>-			"qcom/sm8550/adsp_dtb.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8550/adsp.mbn",</div><div class='add'>+			"qcom/sm8550/adsp_dtb.mbn";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_cdsp {</div><div class='del'>-	firmware-name = "qcom/sm8550/cdsp.mdt",</div><div class='del'>-			"qcom/sm8550/cdsp_dtb.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8550/cdsp.mbn",</div><div class='add'>+			"qcom/sm8550/cdsp_dtb.mbn";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_mpss {</div><div class='del'>-	firmware-name = "qcom/sm8550/modem.mdt",</div><div class='del'>-			"qcom/sm8550/modem_dtb.mdt";</div><div class='add'>+	firmware-name = "qcom/sm8550/modem.mbn",</div><div class='add'>+			"qcom/sm8550/modem_dtb.mbn";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts<br/>index 85d487ef80a0..d90dc7b37c4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts</a></div><div class='hunk'>@@ -722,7 +722,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tlmm {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi<br/>index 9dc0ee3eb98f..7724dba75db7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8550.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8550.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2022, Linaro Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm8450-videocc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm8550-camcc.h&gt;</div><div class='hunk'>@@ -14,6 +15,7 @@</div><div class='ctx'> #include &lt;dt-bindings/firmware/qcom,scm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm8550-rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='hunk'>@@ -64,25 +66,25 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a510";</div><div class='ctx'> 			reg = &lt;0 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -90,185 +92,185 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a510";</div><div class='ctx'> 			reg = &lt;0 0x100&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_100: l2-cache {</div><div class='add'>+			l2_100: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a510";</div><div class='ctx'> 			reg = &lt;0 0x200&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a715";</div><div class='ctx'> 			reg = &lt;0 0x300&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;270&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_300: l2-cache {</div><div class='add'>+			l2_300: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a715";</div><div class='ctx'> 			reg = &lt;0 0x400&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;270&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a710";</div><div class='ctx'> 			reg = &lt;0 0x500&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;270&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a710";</div><div class='ctx'> 			reg = &lt;0 0x600&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;270&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x3";</div><div class='ctx'> 			reg = &lt;0 0x700&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1894&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;588&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -276,7 +278,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			little_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -286,7 +288,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			big_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -296,7 +298,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			PRIME_CPU_SLEEP_0: cpu-sleep-2-0 {</div><div class='add'>+			prime_cpu_sleep_0: cpu-sleep-2-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "goldplus-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -308,7 +310,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;750&gt;;</div><div class='hunk'>@@ -316,7 +318,7 @@</div><div class='ctx'> 				min-residency-us = &lt;9144&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2800&gt;;</div><div class='hunk'>@@ -330,7 +332,8 @@</div><div class='ctx'> 		scm: scm {</div><div class='ctx'> 			compatible = "qcom,scm-sm8550", "qcom,scm";</div><div class='ctx'> 			qcom,dload-mode = &lt;&amp;tcsr 0x19000&gt;;</div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -346,6 +349,48 @@</div><div class='ctx'> 		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qup_opp_table_100mhz: opp-table-qup100mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_120mhz: opp-table-qup120mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-120000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;120000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_125mhz: opp-table-qup125mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-125000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;125000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@a0000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		/* We expect the bootloader to fill in the size */</div><div class='hunk'>@@ -354,79 +399,79 @@</div><div class='ctx'> </div><div class='ctx'> 	pmu-a510 {</div><div class='ctx'> 		compatible = "arm,cortex-a510-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-a710 {</div><div class='ctx'> 		compatible = "arm,cortex-a710-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-a715 {</div><div class='ctx'> 		compatible = "arm,cortex-a715-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-x3 {</div><div class='ctx'> 		compatible = "arm,cortex-x3-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;LITTLE_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;little_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;BIG_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;big_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;PRIME_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;prime_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;, &lt;&amp;CLUSTER_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;, &lt;&amp;cluster_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -797,7 +842,7 @@</div><div class='ctx'> 		ipcc: mailbox@408000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-ipcc", "qcom,ipcc";</div><div class='ctx'> 			reg = &lt;0 0x00408000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			#mbox-cells = &lt;2&gt;;</div><div class='hunk'>@@ -807,18 +852,18 @@</div><div class='ctx'> 			compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='ctx'> 			#dma-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0 0x00800000 0 0x60000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0x3e&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x436 0&gt;;</div><div class='hunk'>@@ -846,16 +891,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c8_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -864,16 +914,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00880000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi8_data_clk&gt;, &lt;&amp;qup_spi8_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -886,16 +941,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c9_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -904,16 +964,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00884000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi9_data_clk&gt;, &lt;&amp;qup_spi9_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -926,16 +991,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c10_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -944,16 +1014,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00888000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi10_data_clk&gt;, &lt;&amp;qup_spi10_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -966,16 +1041,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c11_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -984,16 +1064,21 @@</div><div class='ctx'> 				reg = &lt;0 0x0088c000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi11_data_clk&gt;, &lt;&amp;qup_spi11_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1006,16 +1091,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c12_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1024,16 +1114,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00890000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi12_data_clk&gt;, &lt;&amp;qup_spi12_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1046,16 +1141,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c13_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1064,16 +1164,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00894000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi13_data_clk&gt;, &lt;&amp;qup_spi13_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1086,10 +1191,14 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart14_default&gt;, &lt;&amp;qup_uart14_cts_rts&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_125mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1100,16 +1209,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c15_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1118,16 +1232,21 @@</div><div class='ctx'> 				reg = &lt;0 0x0089c000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi15_data_clk&gt;, &lt;&amp;qup_spi15_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 0 &amp;clk_virt SLAVE_QUP_CORE_2 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_2 0&gt;,</div><div class='del'>-						&lt;&amp;aggre2_noc MASTER_QUP_2 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1152,12 +1271,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c0_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1169,12 +1292,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c1_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1186,12 +1313,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c2_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1203,12 +1334,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c3_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1220,12 +1355,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c4_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1237,12 +1376,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c5_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1254,12 +1397,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c6_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1271,12 +1418,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c7_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1288,12 +1439,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c8_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1305,12 +1460,16 @@</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c9_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 0 &amp;clk_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_I2C 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1319,18 +1478,18 @@</div><div class='ctx'> 			compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='ctx'> 			#dma-cells = &lt;3&gt;;</div><div class='ctx'> 			reg = &lt;0 0x00a00000 0 0x60000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0x1e&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0xb6 0&gt;;</div><div class='hunk'>@@ -1346,7 +1505,8 @@</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_1_M_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_QUPV3_WRAP_1_S_AHB_CLK&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0xa3 0&gt;;</div><div class='del'>-			interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 			interconnect-names = "qup-core";</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -1360,16 +1520,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c0_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1378,16 +1543,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a80000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi0_data_clk&gt;, &lt;&amp;qup_spi0_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1400,16 +1570,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c1_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1418,16 +1593,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a84000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi1_data_clk&gt;, &lt;&amp;qup_spi1_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1440,16 +1620,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1458,16 +1643,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a88000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi2_data_clk&gt;, &lt;&amp;qup_spi2_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1480,16 +1670,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c3_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1498,16 +1693,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a8c000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi3_data_clk&gt;, &lt;&amp;qup_spi3_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1520,16 +1720,21 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c4_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -1538,16 +1743,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a90000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi4_data_clk&gt;, &lt;&amp;qup_spi4_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1560,14 +1770,19 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c5_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1578,16 +1793,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a94000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi5_data_clk&gt;, &lt;&amp;qup_spi5_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1600,14 +1820,19 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_i2c6_data_clk&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1618,16 +1843,21 @@</div><div class='ctx'> 				reg = &lt;0 0x00a98000 0 0x4000&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_spi6_data_clk&gt;, &lt;&amp;qup_spi6_cs&gt;;</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;,</div><div class='del'>-						&lt;&amp;aggre1_noc MASTER_QUP_1 0 &amp;mc_virt  SLAVE_EBI1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx", "rx";</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='hunk'>@@ -1640,10 +1870,14 @@</div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart7_default&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core", "qup-config";</div><div class='del'>-				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 0 &amp;clk_virt SLAVE_QUP_CORE_1 0&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_1 0&gt;;</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1727,14 +1961,15 @@</div><div class='ctx'> 			linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1742,13 +1977,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1765,8 +2001,10 @@</div><div class='ctx'> 				      "ddrss_sf_tbu",</div><div class='ctx'> 				      "noc_aggr";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc_main SLAVE_PCIE_0 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='ctx'> </div><div class='ctx'> 			msi-map = &lt;0x0 &amp;gic_its 0x1400 0x1&gt;,</div><div class='hunk'>@@ -1782,8 +2020,49 @@</div><div class='ctx'> 			phys = &lt;&amp;pcie0_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie0_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			pcie0_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcieport0: pcie@0 {</div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> 				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='hunk'>@@ -1843,14 +2122,15 @@</div><div class='ctx'> 			linux,pci-domain = &lt;1&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -1858,13 +2138,14 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_a */</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_b */</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH 0&gt;, /* int_c */</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH 0&gt;; /* int_d */</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -1886,8 +2167,10 @@</div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc_main SLAVE_PCIE_1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem", "cpu-pcie";</div><div class='ctx'> </div><div class='ctx'> 			msi-map = &lt;0x0 &amp;gic_its 0x1480 0x1&gt;,</div><div class='hunk'>@@ -1904,8 +2187,56 @@</div><div class='ctx'> 			phys = &lt;&amp;pcie1_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie1_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			pcie1_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 and GEN 4 x1 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 4 x2 */</div><div class='add'>+				opp-32000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;32000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;3938000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcie@0 {</div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> 				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='hunk'>@@ -1949,9 +2280,11 @@</div><div class='ctx'> 		cryptobam: dma-controller@1dc4000 {</div><div class='ctx'> 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='ctx'> 			reg = &lt;0x0 0x01dc4000 0x0 0x28000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='ctx'> 			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;20&gt;;</div><div class='ctx'> 			qcom,controlled-remotely;</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x480 0x0&gt;,</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x481 0x0&gt;;</div><div class='hunk'>@@ -1964,7 +2297,8 @@</div><div class='ctx'> 			dma-names = "rx", "tx";</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x480 0x0&gt;,</div><div class='ctx'> 				 &lt;&amp;apps_smmu 0x481 0x0&gt;;</div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 			interconnect-names = "memory";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1989,11 +2323,11 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-ufshc", "qcom,ufshc",</div><div class='ctx'> 				     "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			phys = &lt;&amp;ufs_mem_phy&gt;;</div><div class='ctx'> 			phy-names = "ufsphy";</div><div class='ctx'> 			lanes-per-direction = &lt;2&gt;;</div><div class='hunk'>@@ -2008,8 +2342,10 @@</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			operating-points-v2 = &lt;&amp;ufs_opp_table&gt;;</div><div class='del'>-			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_UFS_MEM_CFG 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interconnect-names = "ufs-ddr", "cpu-ufs";</div><div class='ctx'> 			clock-names = "core_clk",</div><div class='hunk'>@@ -2076,7 +2412,8 @@</div><div class='ctx'> 		ice: crypto@1d88000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-inline-crypto-engine",</div><div class='ctx'> 				     "qcom,inline-crypto-engine";</div><div class='del'>-			reg = &lt;0 0x01d88000 0 0x8000&gt;;</div><div class='add'>+			reg = &lt;0 0x01d88000 0 0x18000&gt;;</div><div class='add'>+</div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2103,7 +2440,7 @@</div><div class='ctx'> 				    "cx_mem",</div><div class='ctx'> 				    "cx_dbgc";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;adreno_smmu 0 0x0&gt;,</div><div class='ctx'> 				 &lt;&amp;adreno_smmu 1 0x0&gt;;</div><div class='hunk'>@@ -2113,6 +2450,10 @@</div><div class='ctx'> 			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "gfx-mem";</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			zap-shader {</div><div class='hunk'>@@ -2126,41 +2467,49 @@</div><div class='ctx'> 				opp-680000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;680000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-615000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;615000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L0&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;12449218&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-550000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;10687500&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-475000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;475000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6074218&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-401000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;401000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6074218&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-348000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;348000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D0&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6074218&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-295000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;295000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6074218&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-220000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;220000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2136718&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2172,8 +2521,8 @@</div><div class='ctx'> 			      &lt;0x0 0x0b280000 0x0 0x10000&gt;;</div><div class='ctx'> 			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "hfi", "gmu";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='hunk'>@@ -2234,32 +2583,32 @@</div><div class='ctx'> 			reg = &lt;0x0 0x03da0000 0x0 0x40000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='hunk'>@@ -2284,8 +2633,8 @@</div><div class='ctx'> 				    "ipa-shared",</div><div class='ctx'> 				    "gsi";</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='ctx'> 					      &lt;&amp;ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "ipa",</div><div class='hunk'>@@ -2296,8 +2645,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_IPA_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_IPA 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_IPA_CFG 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_IPA QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_IPA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "memory",</div><div class='ctx'> 					     "config";</div><div class='ctx'> </div><div class='hunk'>@@ -2313,9 +2664,9 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-mpss-pas";</div><div class='del'>-			reg = &lt;0x0 0x04080000 0x0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2331,7 +2682,8 @@</div><div class='ctx'> 					&lt;&amp;rpmhpd RPMHPD_MSS&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mss";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;mc_virt MASTER_LLCC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> </div><div class='ctx'> 			memory-region = &lt;&amp;mpss_mem&gt;, &lt;&amp;q6_mpss_dtb_mem&gt;, &lt;&amp;mpss_dsm_mem&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2353,6 +2705,138 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		remoteproc_adsp: remoteproc@6800000 {</div><div class='add'>+			compatible = "qcom,sm8550-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x06800000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+					  "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adspslpi_mem&gt;, &lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1063 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1064 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1065 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1066 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@7 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;7&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1007 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1067 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='add'>+								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lpass_wsa2macro: codec@6aa0000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-lpass-wsa-macro";</div><div class='ctx'> 			reg = &lt;0 0x06aa0000 0 0x1000&gt;;</div><div class='hunk'>@@ -2370,7 +2854,7 @@</div><div class='ctx'> 		swr3: soundwire@6ab0000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06ab0000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_wsa2macro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "WSA2";</div><div class='hunk'>@@ -2414,7 +2898,7 @@</div><div class='ctx'> 		swr1: soundwire@6ad0000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06ad0000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_rxmacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "RX";</div><div class='hunk'>@@ -2472,7 +2956,7 @@</div><div class='ctx'> 		swr0: soundwire@6b10000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06b10000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_wsamacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "WSA";</div><div class='hunk'>@@ -2502,8 +2986,8 @@</div><div class='ctx'> 		swr2: soundwire@6d30000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06d30000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "core", "wakeup";</div><div class='ctx'> 			clocks = &lt;&amp;lpass_txmacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='hunk'>@@ -2685,8 +3169,8 @@</div><div class='ctx'> 			compatible = "qcom,sm8550-sdhci", "qcom,sdhci-msm-v5";</div><div class='ctx'> 			reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "hc_irq", "pwr_irq";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;,</div><div class='hunk'>@@ -2699,8 +3183,10 @@</div><div class='ctx'> 			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='ctx'> 			operating-points-v2 = &lt;&amp;sdhc2_opp_table&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_SDCC_2 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_SDCC_2 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "sdhc-ddr", "cpu-sdhc";</div><div class='ctx'> 			bus-width = &lt;4&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='hunk'>@@ -2735,13 +3221,96 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		iris: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,sm8550-iris";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x0aa00000 0 0xf0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VIDEO_CC_MVS0C_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VIDEO_CC_MVS0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "mmcx";</div><div class='add'>+			operating-points-v2 = &lt;&amp;iris_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "vcodec0_core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "cpu-cfg",</div><div class='add'>+					     "video-mem";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "bus";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1940 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x1947 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * IRIS firmware is signed by vendors, only</div><div class='add'>+			 * enable on boards where the proper signed firmware</div><div class='add'>+			 * is available.</div><div class='add'>+			 */</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			iris_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-240000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;240000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-338000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;338000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-366000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-444000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;444000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-533333334 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;533333334&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		videocc: clock-controller@aaf0000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-videocc";</div><div class='ctx'> 			reg = &lt;0 0x0aaf0000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bi_tcxo_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='del'>-			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -2750,7 +3319,7 @@</div><div class='ctx'> 		cci0: cci@ac15000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac15000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 426 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 426 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -2783,7 +3352,7 @@</div><div class='ctx'> 		cci1: cci@ac16000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac16000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 427 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 427 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -2809,7 +3378,7 @@</div><div class='ctx'> 		cci2: cci@ac17000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac17000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 428 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 428 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -2839,6 +3408,216 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		camss: isp@acb7000 {</div><div class='add'>+			compatible = "qcom,sm8550-camss";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x0acb7000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0x0acb9000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0x0acbb000 0x0 0x0d00&gt;,</div><div class='add'>+			      &lt;0x0 0x0acca000 0x0 0x0a00&gt;,</div><div class='add'>+			      &lt;0x0 0x0acce000 0x0 0x0a00&gt;,</div><div class='add'>+			      &lt;0x0 0x0acb6000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace4000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace6000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ace8000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acea000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acec000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acee000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acf0000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0acf2000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ac62000 0x0 0xf000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ac71000 0x0 0xf000&gt;,</div><div class='add'>+			      &lt;0x0 0x0ac80000 0x0 0xf000&gt;,</div><div class='add'>+			      &lt;0x0 0x0accb000 0x0 0x1800&gt;,</div><div class='add'>+			      &lt;0x0 0x0accf000 0x0 0x1800&gt;;</div><div class='add'>+			reg-names = "csid0",</div><div class='add'>+				    "csid1",</div><div class='add'>+				    "csid2",</div><div class='add'>+				    "csid_lite0",</div><div class='add'>+				    "csid_lite1",</div><div class='add'>+				    "csid_wrapper",</div><div class='add'>+				    "csiphy0",</div><div class='add'>+				    "csiphy1",</div><div class='add'>+				    "csiphy2",</div><div class='add'>+				    "csiphy3",</div><div class='add'>+				    "csiphy4",</div><div class='add'>+				    "csiphy5",</div><div class='add'>+				    "csiphy6",</div><div class='add'>+				    "csiphy7",</div><div class='add'>+				    "vfe0",</div><div class='add'>+				    "vfe1",</div><div class='add'>+				    "vfe2",</div><div class='add'>+				    "vfe_lite0",</div><div class='add'>+				    "vfe_lite1";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_LITE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CPAS_IFE_2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSID_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI2PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY3_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI3PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY4_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI4PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY5_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI5PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY6_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI6PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSIPHY7_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSI7PHYTIMER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_CSID_CSIPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CAMERA_HF_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_0_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_1_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_2_FAST_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CPHY_RX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;camcc CAM_CC_IFE_LITE_CSID_CLK&gt;;</div><div class='add'>+			clock-names = "camnoc_axi",</div><div class='add'>+				      "cpas_ahb",</div><div class='add'>+				      "cpas_fast_ahb_clk",</div><div class='add'>+				      "cpas_ife_lite",</div><div class='add'>+				      "cpas_vfe0",</div><div class='add'>+				      "cpas_vfe1",</div><div class='add'>+				      "cpas_vfe2",</div><div class='add'>+				      "csid",</div><div class='add'>+				      "csiphy0",</div><div class='add'>+				      "csiphy0_timer",</div><div class='add'>+				      "csiphy1",</div><div class='add'>+				      "csiphy1_timer",</div><div class='add'>+				      "csiphy2",</div><div class='add'>+				      "csiphy2_timer",</div><div class='add'>+				      "csiphy3",</div><div class='add'>+				      "csiphy3_timer",</div><div class='add'>+				      "csiphy4",</div><div class='add'>+				      "csiphy4_timer",</div><div class='add'>+				      "csiphy5",</div><div class='add'>+				      "csiphy5_timer",</div><div class='add'>+				      "csiphy6",</div><div class='add'>+				      "csiphy6_timer",</div><div class='add'>+				      "csiphy7",</div><div class='add'>+				      "csiphy7_timer",</div><div class='add'>+				      "csiphy_rx",</div><div class='add'>+				      "gcc_axi_hf",</div><div class='add'>+				      "vfe0",</div><div class='add'>+				      "vfe0_fast_ahb",</div><div class='add'>+				      "vfe1",</div><div class='add'>+				      "vfe1_fast_ahb",</div><div class='add'>+				      "vfe2",</div><div class='add'>+				      "vfe2_fast_ahb",</div><div class='add'>+				      "vfe_lite",</div><div class='add'>+				      "vfe_lite_ahb",</div><div class='add'>+				      "vfe_lite_cphy_rx",</div><div class='add'>+				      "vfe_lite_csid";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 601 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 603 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 431 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 605 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 376 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 122 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 278 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 277 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 602 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 604 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 688 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 606 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 377 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='add'>+			interrupt-names = "csid0",</div><div class='add'>+					  "csid1",</div><div class='add'>+					  "csid2",</div><div class='add'>+					  "csid_lite0",</div><div class='add'>+					  "csid_lite1",</div><div class='add'>+					  "csiphy0",</div><div class='add'>+					  "csiphy1",</div><div class='add'>+					  "csiphy2",</div><div class='add'>+					  "csiphy3",</div><div class='add'>+					  "csiphy4",</div><div class='add'>+					  "csiphy5",</div><div class='add'>+					  "csiphy6",</div><div class='add'>+					  "csiphy7",</div><div class='add'>+					  "vfe0",</div><div class='add'>+					  "vfe1",</div><div class='add'>+					  "vfe2",</div><div class='add'>+					  "vfe_lite0",</div><div class='add'>+					  "vfe_lite1";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "ahb",</div><div class='add'>+					     "hf_0_mnoc";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x800 0x20&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;camcc CAM_CC_IFE_0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_IFE_1_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_IFE_2_GDSC&gt;,</div><div class='add'>+					&lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+			power-domain-names = "ife0",</div><div class='add'>+					     "ife1",</div><div class='add'>+					     "ife2",</div><div class='add'>+					     "top";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		camcc: clock-controller@ade0000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-camcc";</div><div class='ctx'> 			reg = &lt;0 0x0ade0000 0 0x20000&gt;;</div><div class='hunk'>@@ -2846,8 +3625,10 @@</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_ao_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='del'>-			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -2858,7 +3639,7 @@</div><div class='ctx'> 			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "mdss";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2871,9 +3652,11 @@</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;mmss_noc MASTER_MDP 0 &amp;gem_noc SLAVE_LLCC 0&gt;,</div><div class='del'>-					&lt;&amp;mc_virt MASTER_LLCC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-			interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+			interconnects = &lt;&amp;mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "mdp0-mem", "cpu-cfg";</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x1c00 0x2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2886,7 +3669,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8550-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp", "vbif";</div><div class='ctx'> </div><div class='ctx'> 				interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='hunk'>@@ -2976,16 +3759,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				phys = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='hunk'>@@ -3012,6 +3799,7 @@</div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> 						mdss_dp0_out: endpoint {</div><div class='add'>+							data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -3067,8 +3855,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3162,8 +3950,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3221,10 +4009,10 @@</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_ao_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;, /* dp1 */</div><div class='hunk'>@@ -3272,6 +4060,7 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			mode-switch;</div><div class='ctx'> 			orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -3305,12 +4094,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		usb_1: usb@a6f8800 {</div><div class='del'>-			compatible = "qcom,sm8550-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0x0 0x0a6f8800 0x0 0x400&gt;;</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='add'>+		usb_1: usb@a600000 {</div><div class='add'>+			compatible = "qcom,sm8550-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0x0 0x0a600000 0x0 0xfc100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='hunk'>@@ -3329,12 +4117,14 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='ctx'> 					  "hs_phy_irq",</div><div class='ctx'> 					  "dp_hs_phy_irq",</div><div class='ctx'> 					  "dm_hs_phy_irq",</div><div class='hunk'>@@ -3345,51 +4135,52 @@</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;aggre1_noc MASTER_USB3_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_USB3_0 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr", "apps-usb";</div><div class='ctx'> </div><div class='del'>-			status = "disabled";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x40 0x0&gt;;</div><div class='ctx'> </div><div class='del'>-			usb_1_dwc3: usb@a600000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0x0 0x0a600000 0x0 0xcd00&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x40 0x0&gt;;</div><div class='del'>-				phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='del'>-				       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='del'>-				phy-names = "usb2-phy", "usb3-phy";</div><div class='del'>-				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='del'>-				snps,usb2-gadget-lpm-disable;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				snps,dis-u1-entry-quirk;</div><div class='del'>-				snps,dis-u2-entry-quirk;</div><div class='del'>-				snps,is-utmi-l1-suspend;</div><div class='del'>-				snps,usb3_lpm_capable;</div><div class='del'>-				snps,usb2-lpm-disable;</div><div class='del'>-				snps,has-lpm-erratum;</div><div class='del'>-				tx-fifo-resize;</div><div class='del'>-				dma-coherent;</div><div class='del'>-				usb-role-switch;</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='add'>+			       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='ctx'> </div><div class='del'>-				ports {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='add'>+			snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,is-utmi-l1-suspend;</div><div class='add'>+			snps,usb3_lpm_capable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='add'>+			snps,has-lpm-erratum;</div><div class='add'>+			tx-fifo-resize;</div><div class='ctx'> </div><div class='del'>-					port@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_hs: endpoint {</div><div class='del'>-						};</div><div class='add'>+			usb-role-switch;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_dwc3_hs: endpoint {</div><div class='ctx'> 					};</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-					port@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-						usb_1_dwc3_ss: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='del'>-						};</div><div class='add'>+					usb_1_dwc3_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -3411,8 +4202,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c271000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c222000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> 			#qcom,sensors = &lt;16&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow", "critical";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3422,8 +4213,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c272000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c223000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> 			#qcom,sensors = &lt;16&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow", "critical";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3433,8 +4224,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c273000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c224000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> 			#qcom,sensors = &lt;16&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow", "critical";</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3453,6 +4244,7 @@</div><div class='ctx'> 		sram@c3f0000 {</div><div class='ctx'> 			compatible = "qcom,rpmh-stats";</div><div class='ctx'> 			reg = &lt;0 0x0c3f0000 0 0x400&gt;;</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spmi_bus: spmi@c400000 {</div><div class='hunk'>@@ -3477,7 +4269,7 @@</div><div class='ctx'> 		tlmm: pinctrl@f100000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-tlmm";</div><div class='ctx'> 			reg = &lt;0 0x0f100000 0 0x300000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='hunk'>@@ -4171,103 +4963,103 @@</div><div class='ctx'> 			reg = &lt;0 0x15000000 0 0x100000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -4276,14 +5068,32 @@</div><div class='ctx'> 			reg = &lt;0 0x17100000 0 0x10000&gt;,		/* GICD */</div><div class='ctx'> 			      &lt;0 0x17180000 0 0x200000&gt;;	/* GICR * 8 */</div><div class='ctx'> 			ranges;</div><div class='del'>-			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='ctx'> 			redistributor-stride = &lt;0 0x40000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='ctx'> 			#address-cells = &lt;2&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			ppi-partitions {</div><div class='add'>+				ppi_cluster0: interrupt-partition-0 {</div><div class='add'>+					affinity = &lt;&amp;cpu0 &amp;cpu1 &amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster1: interrupt-partition-1 {</div><div class='add'>+					affinity = &lt;&amp;cpu3 &amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster2: interrupt-partition-2 {</div><div class='add'>+					affinity = &lt;&amp;cpu5 &amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster3: interrupt-partition-3 {</div><div class='add'>+					affinity = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			gic_its: msi-controller@17140000 {</div><div class='ctx'> 				compatible = "arm,gic-v3-its";</div><div class='ctx'> 				reg = &lt;0 0x17140000 0 0x20000&gt;;</div><div class='hunk'>@@ -4303,49 +5113,49 @@</div><div class='ctx'> 				reg = &lt;0x17421000 0x1000&gt;,</div><div class='ctx'> 				      &lt;0x17422000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@17423000 {</div><div class='ctx'> 				reg = &lt;0x17423000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;1&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@17425000 {</div><div class='ctx'> 				reg = &lt;0x17425000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@17427000 {</div><div class='ctx'> 				reg = &lt;0x17427000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;3&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@17429000 {</div><div class='ctx'> 				reg = &lt;0x17429000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;4&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@1742b000 {</div><div class='ctx'> 				reg = &lt;0x1742b000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;5&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			frame@1742d000 {</div><div class='ctx'> 				reg = &lt;0x1742d000 0x1000&gt;;</div><div class='ctx'> 				frame-number = &lt;6&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -4358,14 +5168,14 @@</div><div class='ctx'> 			      &lt;0 0x17a20000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x17a30000 0 0x10000&gt;;</div><div class='ctx'> 			reg-names = "drv-0", "drv-1", "drv-2", "drv-3";</div><div class='del'>-			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='ctx'> 			qcom,tcs-config = &lt;ACTIVE_TCS    3&gt;, &lt;SLEEP_TCS     2&gt;,</div><div class='ctx'> 					  &lt;WAKE_TCS      2&gt;, &lt;CONTROL_TCS   0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -4457,9 +5267,9 @@</div><div class='ctx'> 			reg-names = "freq-domain0", "freq-domain1", "freq-domain2";</div><div class='ctx'> 			clocks = &lt;&amp;bi_tcxo_div2&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='ctx'> 			clock-names = "xo", "alternate";</div><div class='del'>-			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";</div><div class='ctx'> 			#freq-domain-cells = &lt;1&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -4468,8 +5278,9 @@</div><div class='ctx'> 		pmu@24091000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-llcc-bwmon", "qcom,sc7280-llcc-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x24091000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interconnects = &lt;&amp;mc_virt MASTER_LLCC 3 &amp;mc_virt SLAVE_EBI1 3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> </div><div class='ctx'> 			operating-points-v2 = &lt;&amp;llcc_bwmon_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -4517,8 +5328,9 @@</div><div class='ctx'> 		pmu@240b6400 {</div><div class='ctx'> 			compatible = "qcom,sm8550-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x240b6400 0 0x600&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 3 &amp;gem_noc SLAVE_LLCC 3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> </div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -4572,138 +5384,7 @@</div><div class='ctx'> 				    "llcc3_base",</div><div class='ctx'> 				    "llcc_broadcast_base",</div><div class='ctx'> 				    "llcc_broadcast_and_base";</div><div class='del'>-			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		remoteproc_adsp: remoteproc@30000000 {</div><div class='del'>-			compatible = "qcom,sm8550-adsp-pas";</div><div class='del'>-			reg = &lt;0x0 0x30000000 0x0 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog", "fatal", "ready",</div><div class='del'>-					  "handover", "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='del'>-			power-domain-names = "lcx", "lmx";</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;adspslpi_mem&gt;, &lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			remoteproc_adsp_glink: glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				label = "lpass";</div><div class='del'>-				qcom,remote-pid = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-					label = "adsp";</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1063 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1064 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1065 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@6 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;6&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1066 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@7 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;7&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1007 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1067 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				gpr {</div><div class='del'>-					compatible = "qcom,gpr";</div><div class='del'>-					qcom,glink-channels = "adsp_apps";</div><div class='del'>-					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-					qcom,intents = &lt;512 20&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					q6apm: service@1 {</div><div class='del'>-						compatible = "qcom,q6apm";</div><div class='del'>-						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-						#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6apmdai: dais {</div><div class='del'>-							compatible = "qcom,q6apm-dais";</div><div class='del'>-							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='del'>-								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						q6apmbedai: bedais {</div><div class='del'>-							compatible = "qcom,q6apm-lpass-dais";</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6prm: service@2 {</div><div class='del'>-						compatible = "qcom,q6prm";</div><div class='del'>-						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6prmcc: clock-controller {</div><div class='del'>-							compatible = "qcom,q6prm-lpass-clocks";</div><div class='del'>-							#clock-cells = &lt;2&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsp_noc: interconnect@320c0000 {</div><div class='hunk'>@@ -4715,9 +5396,9 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_cdsp: remoteproc@32300000 {</div><div class='ctx'> 			compatible = "qcom,sm8550-cdsp-pas";</div><div class='del'>-			reg = &lt;0x0 0x32300000 0x0 0x1400000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x32300000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -4733,7 +5414,8 @@</div><div class='ctx'> 					&lt;&amp;rpmhpd RPMHPD_NSP&gt;;</div><div class='ctx'> 			power-domain-names = "cx", "mxc", "nsp";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;nsp_noc MASTER_CDSP_PROC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> </div><div class='ctx'> 			memory-region = &lt;&amp;cdsp_mem&gt;, &lt;&amp;q6_cdsp_dtb_mem&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5898,9 +6580,9 @@</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso b/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso<br/>index cb102535838d..5a594d7311a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso</a></div><div class='hunk'>@@ -60,19 +60,10 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mdss_dsi0_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;mdss_dsi0_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;panel0_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spi4 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts<br/>index 127c7aacd4fc..87d7190dc991 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-hdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-hdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-hdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8650-hdk.dts</a></div><div class='hunk'>@@ -814,10 +814,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpi_dma1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -898,6 +894,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -941,10 +941,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -1050,10 +1046,6 @@</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l5b_3p1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmk8550_rtc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pon_pwrkey {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1117,7 +1109,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;swr0 {</div><div class='hunk'>@@ -1310,12 +1302,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts<br/>index c63822f5b127..c67bbace2743 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8650-mtp.dts</a></div><div class='hunk'>@@ -585,7 +585,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='add'>+&amp;iris {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -734,7 +734,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;swr0 {</div><div class='hunk'>@@ -857,12 +857,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts<br/>index 8ca0d28eba9b..9e790cf44804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650-qrd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8650-qrd.dts</a></div><div class='hunk'>@@ -741,10 +741,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;dispcc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;gpi_dma1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -828,6 +824,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -892,10 +892,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mdss_dp0_out {</div><div class='del'>-	data-lanes = &lt;0 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 96 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 94 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -1006,10 +1002,6 @@</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l5b_3p1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmk8550_rtc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;qup_i2c3_data_clk {</div><div class='ctx'> 	/* Use internal I2C pull-up */</div><div class='ctx'> 	bias-pull-up = &lt;2200&gt;;</div><div class='hunk'>@@ -1045,7 +1037,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sleep_clk {</div><div class='del'>-	clock-frequency = &lt;32000&gt;;</div><div class='add'>+	clock-frequency = &lt;32764&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spi4 {</div><div class='hunk'>@@ -1293,12 +1285,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_dwc3 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_dwc3_hs {</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi<br/>index 01ac3769ffa6..ebf1971b1bfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8650.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8650.dtsi</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2023, Linaro Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/qcom,dsi-phy-28nm.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm8650-camcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sm8650-dispcc.h&gt;</div><div class='hunk'>@@ -15,6 +16,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interconnect/qcom,sm8650-rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,osm-l3.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy-qcom-qmp.h&gt;</div><div class='hunk'>@@ -68,32 +70,41 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a520";</div><div class='ctx'> 			reg = &lt;0 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> </div><div class='del'>-				L3_0: l3-cache {</div><div class='add'>+				l3_0: l3-cache {</div><div class='ctx'> 					compatible = "cache";</div><div class='ctx'> 					cache-level = &lt;3&gt;;</div><div class='ctx'> 					cache-unified;</div><div class='hunk'>@@ -101,213 +112,283 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a520";</div><div class='ctx'> 			reg = &lt;0 0x100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a720";</div><div class='ctx'> 			reg = &lt;0 0x200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_200&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;238&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu2_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_200: l2-cache {</div><div class='add'>+			l2_200: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a720";</div><div class='ctx'> 			reg = &lt;0 0x300&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_300&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;238&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu2_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			l2_300: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@400 {</div><div class='add'>+		cpu4: cpu@400 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a720";</div><div class='ctx'> 			reg = &lt;0 0x400&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_400&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;238&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 3&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu2_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_400: l2-cache {</div><div class='add'>+			l2_400: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@500 {</div><div class='add'>+		cpu5: cpu@500 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a720";</div><div class='ctx'> 			reg = &lt;0 0x500&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_500&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;238&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu5_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_500: l2-cache {</div><div class='add'>+			l2_500: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@600 {</div><div class='add'>+		cpu6: cpu@600 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-a720";</div><div class='ctx'> 			reg = &lt;0 0x600&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_600&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1792&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;238&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu5_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_600: l2-cache {</div><div class='add'>+			l2_600: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@700 {</div><div class='add'>+		cpu7: cpu@700 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "arm,cortex-x4";</div><div class='ctx'> 			reg = &lt;0 0x700&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='ctx'> 			power-domain-names = "psci";</div><div class='ctx'> </div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_700&gt;;</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1894&gt;;</div><div class='ctx'> 			dynamic-power-coefficient = &lt;588&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,freq-domain = &lt;&amp;cpufreq_hw 2&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu7_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;epss_l3 MASTER_EPSS_L3_APPS</div><div class='add'>+					 &amp;epss_l3 SLAVE_EPSS_L3_SHARED&gt;;</div><div class='add'>+</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_700: l2-cache {</div><div class='add'>+			l2_700: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='del'>-				next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core4 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core5 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core6 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core7 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -315,7 +396,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			SILVER_CPU_SLEEP_0: cpu-sleep-0-0 {</div><div class='add'>+			silver_cpu_sleep_0: cpu-sleep-0-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "silver-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -325,7 +406,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			GOLD_CPU_SLEEP_0: cpu-sleep-1-0 {</div><div class='add'>+			gold_cpu_sleep_0: cpu-sleep-1-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -335,7 +416,7 @@</div><div class='ctx'> 				local-timer-stop;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			GOLD_PLUS_CPU_SLEEP_0: cpu-sleep-2-0 {</div><div class='add'>+			gold_plus_cpu_sleep_0: cpu-sleep-2-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "gold-plus-rail-power-collapse";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x40000004&gt;;</div><div class='hunk'>@@ -347,7 +428,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_SLEEP_0: cluster-sleep-0 {</div><div class='add'>+			cluster_sleep_0: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x41000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;750&gt;;</div><div class='hunk'>@@ -355,7 +436,7 @@</div><div class='ctx'> 				min-residency-us = &lt;9144&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_SLEEP_1: cluster-sleep-1 {</div><div class='add'>+			cluster_sleep_1: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x4100c344&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2800&gt;;</div><div class='hunk'>@@ -365,6 +446,199 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ete-0 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete0_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-1 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete1_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-2 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete2_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-3 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete3_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-4 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete4_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-5 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete5_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete5&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-6 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete6_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ete-7 {</div><div class='add'>+		compatible = "arm,embedded-trace-extension";</div><div class='add'>+</div><div class='add'>+		cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				ete7_out_funnel_ete: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_ete_in_ete7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	funnel-ete {</div><div class='add'>+		compatible = "arm,coresight-static-funnel";</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete0_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete1_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete2: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete2_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete3: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete3_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete4: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete4_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete5: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete5_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@6 {</div><div class='add'>+				reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete6: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete6_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@7 {</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+				funnel_ete_in_ete7: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;ete7_out_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		out-ports {</div><div class='add'>+			port {</div><div class='add'>+				funnel_ete_out_funnel_apss: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;funnel_apss_in_funnel_ete&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		scm: scm {</div><div class='ctx'> 			compatible = "qcom,scm-sm8650", "qcom,scm";</div><div class='hunk'>@@ -386,83 +660,999 @@</div><div class='ctx'> 		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qup_opp_table_100mhz: opp-table-qup100mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_120mhz: opp-table-qup120mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-120000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;120000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_128mhz: opp-table-qup128mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-128000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;128000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_240mhz: opp-table-qup240mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-150000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;150000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-240000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;240000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@a0000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		/* We expect the bootloader to fill in the size */</div><div class='ctx'> 		reg = &lt;0 0xa0000000 0 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	cpu0_opp_table: opp-table-cpu0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-307200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;307200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-364800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;364800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-460800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;460800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (384000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-556800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;556800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-672000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;672000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-787200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;787200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (729600 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-902400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;902400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1017600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1017600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (547000 * 4) (940800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1132800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1132800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (547000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1248000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1248000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1132800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1344000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1344000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1440000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1440000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1459200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1459200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1536000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1536000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1574400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1574400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1651200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1651200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1689600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1689600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1747200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1747200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1804800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1804800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1843200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1843200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1555200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1920000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1920000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1939200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1939200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2035200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2035200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2150400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2150400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2265600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2265600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (1555000 * 4) (2035200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu2_opp_table: opp-table-cpu2 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-460800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;460800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-499200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;499200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-576000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;576000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-614400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;614400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-691200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;691200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-729600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;729600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-806400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;806400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-844800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;844800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-902400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;902400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-960000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;960000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1036800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1036800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1075200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1075200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1152000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1152000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1190400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1190400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1286400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1286400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1382400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1382400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1401600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1401600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1497600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1497600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1612800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1612800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1728000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1728000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1824000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1824000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1843200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1843200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1920000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1920000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1958400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1958400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2035200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2035200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2073600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2073600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2131200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2131200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2188800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2188800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2246400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2246400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2304000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2304000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2323200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2323200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2380800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2380800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2438400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2438400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2515200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2515200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2572800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2572800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2630400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2630400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2707200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2707200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2764800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2764800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2841600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2841600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2899200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2899200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2956800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2956800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3014400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3014400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3072000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3072000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3148800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3148800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (2035200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu5_opp_table: opp-table-cpu5 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-460800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;460800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-499200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;499200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-576000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;576000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-614400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;614400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-691200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;691200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-729600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;729600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-806400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;806400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-844800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;844800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-902400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;902400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-960000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;960000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1036800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1036800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1075200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1075200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1152000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1152000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1190400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1190400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1267200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1267200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1286400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1286400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1382400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1382400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1401600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1401600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1497600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1497600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1612800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1612800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1728000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1728000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1824000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1824000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1843200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1843200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1920000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1920000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1958400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1958400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2035200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2035200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2073600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2073600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2131200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2131200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2188800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2188800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2246400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2246400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2304000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2304000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2323200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2323200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2380800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2380800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2438400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2438400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2515200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2515200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2572800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2572800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2630400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2630400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2707200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2707200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2764800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2764800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2841600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2841600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2899200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2899200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2956800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2956800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3014400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3014400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3072000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3072000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3148800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3148800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (2035200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu7_opp_table: opp-table-cpu7 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-480000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;480000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-499200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;499200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-576000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;576000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (307200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-614400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;614400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(300000 * 16) (547000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-672000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;672000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-729600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;729600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-787200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;787200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-844800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;844800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-902400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;902400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-940800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;940800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (768000 * 4) (499200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1017600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1017600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1075200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1075200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1132800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1132800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (844800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1190400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1190400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(466000 * 16) (1555000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1248000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1248000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1305600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1305600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1363200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1363200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1036800 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1420800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1420800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(600000 * 16) (2092000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1478400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1478400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1555200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1555200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1593600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1593600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1670400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1670400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1708800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1708800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1804800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1804800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1824000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1824000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (2736000 * 4) (1248000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1939200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1939200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(806000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2035200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2035200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2073600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2073600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2112000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2112000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2169600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2169600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2208000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2208000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2246400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2246400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2304000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2304000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2342400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2342400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2380800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2380800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2438400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2438400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2457600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2457600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2496000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2496000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2553600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2553600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1440000 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2630400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2630400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2688000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2688000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1651200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2745600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2745600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(933000 * 16) (3686000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2803200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2803200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2880000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2880000000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2937600000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2937600000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2995200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2995200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3052800000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3052800000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (1843200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3187200000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3187200000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (2035200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-3302400000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;3302400000&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;(1066000 * 16) (4224000 * 4) (2035200 * 32)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu-a520 {</div><div class='ctx'> 		compatible = "arm,cortex-a520-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-a720 {</div><div class='ctx'> 		compatible = "arm,cortex-a720-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-x4 {</div><div class='ctx'> 		compatible = "arm,cortex-x4-pmu";</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &amp;ppi_cluster2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;SILVER_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;silver_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;SILVER_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;silver_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;SILVER_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;GOLD_PLUS_CPU_SLEEP_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;gold_plus_cpu_sleep_0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD: power-domain-cluster {</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_SLEEP_0&gt;,</div><div class='del'>-					     &lt;&amp;CLUSTER_SLEEP_1&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_sleep_0&gt;,</div><div class='add'>+					     &lt;&amp;cluster_sleep_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -782,7 +1972,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-ipcc", "qcom,ipcc";</div><div class='ctx'> 			reg = &lt;0 0x00406000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -793,18 +1983,18 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='ctx'> 			reg = &lt;0 0x00800000 0 0x60000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0x3f&gt;;</div><div class='hunk'>@@ -840,21 +2030,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00880000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -873,21 +2067,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00880000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -906,21 +2104,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00884000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -939,21 +2141,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00884000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -972,21 +2178,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00888000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1005,21 +2215,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00888000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1038,21 +2252,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x0088c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1071,21 +2289,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x0088c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1104,21 +2326,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00890000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1137,21 +2363,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00890000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1170,21 +2400,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00894000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1203,21 +2437,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00894000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1236,18 +2474,22 @@</div><div class='ctx'> 				compatible = "qcom,geni-uart";</div><div class='ctx'> 				reg = &lt;0 0x00898000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_128mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart14_default&gt;, &lt;&amp;qup_uart14_cts_rts&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1258,18 +2500,22 @@</div><div class='ctx'> 				compatible = "qcom,geni-debug-uart";</div><div class='ctx'> 				reg = &lt;0 0x0089c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart15_default&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1294,7 +2540,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00980000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S0_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1303,11 +2549,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c0_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1321,7 +2571,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00984000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S1_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1330,11 +2580,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c1_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1348,7 +2602,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00988000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S2_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1357,11 +2611,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c2_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1375,7 +2633,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x0098c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S3_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1384,11 +2642,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c3_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1402,7 +2664,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00990000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S4_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1411,11 +2673,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c4_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1429,7 +2695,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00994000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S5_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1438,11 +2704,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c5_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1456,7 +2726,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x00998000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S6_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1465,11 +2735,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c6_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1483,7 +2757,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x0099c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S7_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1492,11 +2766,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c7_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1510,7 +2788,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x009a0000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S8_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1519,11 +2797,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c8_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1537,7 +2819,7 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c-master-hub";</div><div class='ctx'> 				reg = &lt;0 0x009a4000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S9_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='hunk'>@@ -1546,11 +2828,15 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hub_i2c9_data_clk&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1565,18 +2851,18 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='ctx'> 			reg = &lt;0 0x00a00000 0 0x60000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			dma-channels = &lt;12&gt;;</div><div class='ctx'> 			dma-channel-mask = &lt;0xc&gt;;</div><div class='hunk'>@@ -1615,21 +2901,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a80000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1648,21 +2938,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a80000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1681,21 +2975,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a84000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1714,21 +3012,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a84000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1747,21 +3049,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a88000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_240mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1780,21 +3086,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a88000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_240mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1813,21 +3123,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a8c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1846,21 +3160,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a8c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1879,21 +3197,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a90000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1912,21 +3234,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a90000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1945,21 +3271,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a94000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1978,21 +3308,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a94000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2011,21 +3345,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a98000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2044,21 +3382,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a98000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2077,21 +3419,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a9c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2110,21 +3456,25 @@</div><div class='ctx'> 				compatible = "qcom,geni-spi";</div><div class='ctx'> 				reg = &lt;0 0x00a9c000 0 0x4000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='ctx'> 				clock-names = "se";</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2140,6 +3490,11 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rng: rng@10c3000 {</div><div class='add'>+			compatible = "qcom,sm8650-trng", "qcom,trng";</div><div class='add'>+			reg = &lt;0 0x010c3000 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cnoc_main: interconnect@1500000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cnoc-main";</div><div class='ctx'> 			reg = &lt;0 0x01500000 0 0x14080&gt;;</div><div class='hunk'>@@ -2211,11 +3566,6 @@</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		rng: rng@10c3000 {</div><div class='del'>-			compatible = "qcom,sm8650-trng", "qcom,trng";</div><div class='del'>-			reg = &lt;0 0x010c3000 0 0x1000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		pcie0: pcie@1c00000 {</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			compatible = "qcom,pcie-sm8650", "qcom,pcie-sm8550";</div><div class='hunk'>@@ -2226,14 +3576,15 @@</div><div class='ctx'> 			      &lt;0 0x60100000 0 0x100000&gt;;</div><div class='ctx'> 			reg-names = "parf", "dbi", "elbi", "atu", "config";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2241,7 +3592,8 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2265,20 +3617,22 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem",</div><div class='ctx'> 					     "cpu-pcie";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_0_GDSC&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie0_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			iommu-map = &lt;0     &amp;apps_smmu 0x1400 0x1&gt;,</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1401 0x1&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2302,6 +3656,45 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			pcie0_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcieport0: pcie@0 {</div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> 				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='hunk'>@@ -2358,14 +3751,15 @@</div><div class='ctx'> 				    "atu",</div><div class='ctx'> 				    "config";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2373,7 +3767,8 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_1_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2402,20 +3797,22 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;cnoc_main SLAVE_PCIE_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem",</div><div class='ctx'> 					     "cpu-pcie";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc PCIE_1_GDSC&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie1_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			iommu-map = &lt;0     &amp;apps_smmu 0x1480 0x1&gt;,</div><div class='ctx'> 				    &lt;0x100 &amp;apps_smmu 0x1481 0x1&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -2439,6 +3836,52 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			pcie1_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 and GEN 4 x1 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 4 x2 */</div><div class='add'>+				opp-32000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;32000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;3938000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			pcie@0 {</div><div class='ctx'> 				device_type = "pci";</div><div class='ctx'> 				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='hunk'>@@ -2483,36 +3926,6 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		cryptobam: dma-controller@1dc4000 {</div><div class='del'>-			compatible = "qcom,bam-v1.7.0";</div><div class='del'>-			reg = &lt;0 0x01dc4000 0 0x28000&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			#dma-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='del'>-				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,ee = &lt;0&gt;;</div><div class='del'>-			qcom,controlled-remotely;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		crypto: crypto@1dfa000 {</div><div class='del'>-			compatible = "qcom,sm8650-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='del'>-			reg = &lt;0 0x01dfa000 0 0x6000&gt;;</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='del'>-			interconnect-names = "memory";</div><div class='del'>-</div><div class='del'>-			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='del'>-			dma-names = "rx", "tx";</div><div class='del'>-</div><div class='del'>-			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='del'>-				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		ufs_mem_phy: phy@1d80000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-qmp-ufs-phy";</div><div class='ctx'> 			reg = &lt;0 0x01d80000 0 0x2000&gt;;</div><div class='hunk'>@@ -2535,11 +3948,11 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+		ufs_mem_hc: ufshc@1d84000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='ctx'> 			reg = &lt;0 0x01d84000 0 0x3000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_UFS_PHY_AXI_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='hunk'>@@ -2557,28 +3970,22 @@</div><div class='ctx'> 				      "tx_lane0_sync_clk",</div><div class='ctx'> 				      "rx_lane0_sync_clk",</div><div class='ctx'> 				      "rx_lane1_sync_clk";</div><div class='del'>-			freq-table-hz = &lt;100000000 403000000&gt;,</div><div class='del'>-					&lt;0 0&gt;,</div><div class='del'>-					&lt;0 0&gt;,</div><div class='del'>-					&lt;100000000 403000000&gt;,</div><div class='del'>-					&lt;100000000 403000000&gt;,</div><div class='del'>-					&lt;0 0&gt;,</div><div class='del'>-					&lt;0 0&gt;,</div><div class='del'>-					&lt;0 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_UFS_PHY_BCR&gt;;</div><div class='ctx'> 			reset-names = "rst";</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "ufs-ddr",</div><div class='ctx'> 					     "cpu-ufs";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc UFS_PHY_GDSC&gt;;</div><div class='ctx'> 			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='ctx'> </div><div class='add'>+			operating-points-v2 = &lt;&amp;ufs_opp_table&gt;;</div><div class='add'>+</div><div class='ctx'> 			iommus = &lt;&amp;apps_smmu 0x60 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			lanes-per-direction = &lt;2&gt;;</div><div class='hunk'>@@ -2590,16 +3997,88 @@</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ufs_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;100000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-201500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;201500000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;201500000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-403000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;403000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;403000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ice: crypto@1d88000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-inline-crypto-engine",</div><div class='ctx'> 				     "qcom,inline-crypto-engine";</div><div class='del'>-			reg = &lt;0 0x01d88000 0 0x8000&gt;;</div><div class='add'>+			reg = &lt;0 0x01d88000 0 0x18000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0 0x01dc4000 0 0x28000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,num-ees = &lt;4&gt;;</div><div class='add'>+			num-channels = &lt;20&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@1dfa000 {</div><div class='add'>+			compatible = "qcom,sm8650-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='add'>+			reg = &lt;0 0x01dfa000 0 0x6000&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "memory";</div><div class='add'>+</div><div class='add'>+			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		tcsr_mutex: hwlock@1f40000 {</div><div class='ctx'> 			compatible = "qcom,tcsr-mutex";</div><div class='ctx'> 			reg = &lt;0 0x01f40000 0 0x20000&gt;;</div><div class='hunk'>@@ -2626,7 +4105,7 @@</div><div class='ctx'> 				    "cx_mem",</div><div class='ctx'> 				    "cx_dbgc";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			iommus = &lt;&amp;adreno_smmu 0 0x0&gt;,</div><div class='ctx'> 				 &lt;&amp;adreno_smmu 1 0x0&gt;;</div><div class='hunk'>@@ -2636,6 +4115,10 @@</div><div class='ctx'> 			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "gfx-mem";</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			zap-shader {</div><div class='hunk'>@@ -2644,61 +4127,84 @@</div><div class='ctx'> </div><div class='ctx'> 			/* Speedbin needs more work on A740+, keep only lower freqs */</div><div class='ctx'> 			gpu_opp_table: opp-table {</div><div class='del'>-				compatible = "operating-points-v2";</div><div class='add'>+				compatible = "operating-points-v2-adreno",</div><div class='add'>+					     "operating-points-v2";</div><div class='ctx'> </div><div class='ctx'> 				opp-231000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;231000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2136718&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc82f5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-310000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;310000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2136718&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc82c5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-366000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D0&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;6074218&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc02e5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-422000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;422000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc02d5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-500000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc02a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-578000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;578000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882c5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-629000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;629000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L0&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;10687500&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-680000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;680000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;12449218&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-720000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;720000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;12449218&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-770000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;770000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;12449218&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-834000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;834000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;14398437&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2710,8 +4216,8 @@</div><div class='ctx'> 			      &lt;0x0 0x0b280000 0x0 0x10000&gt;;</div><div class='ctx'> 			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "hfi", "gmu";</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gpucc GPU_CC_AHB_CLK&gt;,</div><div class='hunk'>@@ -2774,32 +4280,32 @@</div><div class='ctx'> 			reg = &lt;0x0 0x03da0000 0x0 0x40000&gt;;</div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 686 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 574 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 575 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 659 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 661 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 664 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 665 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 666 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_MEMNOC_GFX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;,</div><div class='hunk'>@@ -2824,8 +4330,8 @@</div><div class='ctx'> 				    "ipa-shared",</div><div class='ctx'> 				    "gsi";</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='ctx'> 					      &lt;&amp;ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 			interrupt-names = "ipa",</div><div class='hunk'>@@ -2836,8 +4342,10 @@</div><div class='ctx'> 			clocks = &lt;&amp;rpmhcc RPMH_IPA_CLK&gt;;</div><div class='ctx'> 			clock-names = "core";</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;aggre2_noc MASTER_IPA 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_IPA_CFG 0&gt;;</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_IPA QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_IPA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "memory",</div><div class='ctx'> 					     "config";</div><div class='ctx'> </div><div class='hunk'>@@ -2853,9 +4361,9 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_mpss: remoteproc@4080000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-mpss-pas";</div><div class='del'>-			reg = &lt;0 0x04080000 0 0x4040&gt;;</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -2904,6 +4412,154 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		remoteproc_adsp: remoteproc@6800000 {</div><div class='add'>+			compatible = "qcom,sm8650-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x06800000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx",</div><div class='add'>+					     "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adspslpi_mem&gt;, &lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+</div><div class='add'>+					label = "adsp";</div><div class='add'>+</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1043 0x20&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1044 0x20&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1045 0x20&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1046 0x20&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@7 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1007 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1067 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1087 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='add'>+								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lpass_wsa2macro: codec@6aa0000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";</div><div class='ctx'> 			reg = &lt;0 0x06aa0000 0 0x1000&gt;;</div><div class='hunk'>@@ -2924,7 +4580,7 @@</div><div class='ctx'> 		swr3: soundwire@6ab0000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06ab0000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_wsa2macro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "WSA2";</div><div class='hunk'>@@ -2971,7 +4627,7 @@</div><div class='ctx'> 		swr1: soundwire@6ad0000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06ad0000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_rxmacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "RX";</div><div class='hunk'>@@ -3035,7 +4691,7 @@</div><div class='ctx'> 		swr0: soundwire@6b10000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06b10000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;lpass_wsamacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='ctx'> 			label = "WSA";</div><div class='hunk'>@@ -3065,8 +4721,8 @@</div><div class='ctx'> 		swr2: soundwire@6d30000 {</div><div class='ctx'> 			compatible = "qcom,soundwire-v2.0.0";</div><div class='ctx'> 			reg = &lt;0 0x06d30000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "core", "wakeup";</div><div class='ctx'> 			clocks = &lt;&amp;lpass_txmacro&gt;;</div><div class='ctx'> 			clock-names = "iface";</div><div class='hunk'>@@ -3257,8 +4913,8 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-sdhci", "qcom,sdhci-msm-v5";</div><div class='ctx'> 			reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "hc_irq",</div><div class='ctx'> 					  "pwr_irq";</div><div class='ctx'> </div><div class='hunk'>@@ -3271,8 +4927,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "sdhc-ddr",</div><div class='ctx'> 					     "cpu-sdhc";</div><div class='ctx'> </div><div class='hunk'>@@ -3318,12 +4974,271 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb_1_hsphy: phy@88e3000 {</div><div class='add'>+			compatible = "qcom,sm8650-snps-eusb2-phy",</div><div class='add'>+				     "qcom,sm8550-snps-eusb2-phy";</div><div class='add'>+			reg = &lt;0 0x088e3000 0 0x154&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;tcsr TCSR_USB2_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_dp_qmpphy: phy@88e8000 {</div><div class='add'>+			compatible = "qcom,sm8650-qmp-usb3-dp-phy";</div><div class='add'>+			reg = &lt;0 0x088e8000 0 0x3000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "com_aux",</div><div class='add'>+				      "usb3_pipe";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB3_DP_PHY_PRIM_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "common";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB3_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mode-switch;</div><div class='add'>+			orientation-switch;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_out: endpoint {</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_usb_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usb_dp_qmpphy_dp_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mdss_dp0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_1: usb@a600000 {</div><div class='add'>+			compatible = "qcom,sm8650-dwc3", "qcom,snps-dwc3";</div><div class='add'>+			reg = &lt;0 0x0a600000 0 0xfc100&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dwc_usb3",</div><div class='add'>+					  "pwr_event",</div><div class='add'>+					  "hs_phy_irq",</div><div class='add'>+					  "dp_hs_phy_irq",</div><div class='add'>+					  "dm_hs_phy_irq",</div><div class='add'>+					  "ss_phy_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_USB3_CLKREF_EN&gt;;</div><div class='add'>+			clock-names = "cfg_noc",</div><div class='add'>+				      "core",</div><div class='add'>+				      "iface",</div><div class='add'>+				      "sleep",</div><div class='add'>+				      "mock_utmi",</div><div class='add'>+				      "xo";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='add'>+					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='add'>+			       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='add'>+			phy-names = "usb2-phy",</div><div class='add'>+				    "usb3-phy";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "usb-ddr",</div><div class='add'>+					     "apps-usb";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x40 0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc USB30_PRIM_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='add'>+			snps,usb2-gadget-lpm-disable;</div><div class='add'>+			snps,dis_u2_susphy_quirk;</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,is-utmi-l1-suspend;</div><div class='add'>+			snps,usb3_lpm_capable;</div><div class='add'>+			snps,usb2-lpm-disable;</div><div class='add'>+			snps,has-lpm-erratum;</div><div class='add'>+			tx-fifo-resize;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_dwc3_hs: endpoint {</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usb_1_dwc3_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		iris: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,sm8650-iris";</div><div class='add'>+			reg = &lt;0 0x0aa00000 0 0xf0000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VIDEO_CC_MVS0C_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VIDEO_CC_MVS0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "mmcx";</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;iris_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "vcodec0_core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "cpu-cfg",</div><div class='add'>+					     "video-mem";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_XO_CLK_ARES&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "bus",</div><div class='add'>+				      "xo",</div><div class='add'>+				      "core";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1940 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x1947 0&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * IRIS firmware is signed by vendors, only</div><div class='add'>+			 * enable on boards where the proper signed firmware</div><div class='add'>+			 * is available.</div><div class='add'>+			 */</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			iris_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-196000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;196000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-300000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-380000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;380000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-435000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;435000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-480000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;480000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-533333334 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;533333334&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		videocc: clock-controller@aaf0000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-videocc";</div><div class='ctx'> 			reg = &lt;0 0x0aaf0000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;bi_tcxo_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3332,7 +5247,7 @@</div><div class='ctx'> 		cci0: cci@ac15000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac15000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 426 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 426 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_NRT_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3365,7 +5280,7 @@</div><div class='ctx'> 		cci1: cci@ac16000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac16000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 427 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 427 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_NRT_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3398,7 +5313,7 @@</div><div class='ctx'> 		cci2: cci@ac17000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cci", "qcom,msm8996-cci";</div><div class='ctx'> 			reg = &lt;0 0x0ac17000 0 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 428 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 428 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_NRT_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='hunk'>@@ -3435,7 +5350,8 @@</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_ao_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;;</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='hunk'>@@ -3446,7 +5362,7 @@</div><div class='ctx'> 			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='ctx'> 			reg-names = "mdss";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='hunk'>@@ -3455,11 +5371,11 @@</div><div class='ctx'> 			resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "mdp0-mem",</div><div class='del'>-					     "mdp1-mem";</div><div class='add'>+					     "cpu-cfg";</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3477,7 +5393,7 @@</div><div class='ctx'> 			mdss_mdp: display-controller@ae01000 {</div><div class='ctx'> 				compatible = "qcom,sm8650-dpu";</div><div class='ctx'> 				reg = &lt;0 0x0ae01000 0 0x8f000&gt;,</div><div class='del'>-				      &lt;0 0x0aeb0000 0 0x2008&gt;;</div><div class='add'>+				      &lt;0 0x0aeb0000 0 0x3000&gt;;</div><div class='ctx'> 				reg-names = "mdp",</div><div class='ctx'> 					    "vbif";</div><div class='ctx'> </div><div class='hunk'>@@ -3577,8 +5493,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3674,8 +5590,8 @@</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='ctx'> 						  &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-							 &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+				assigned-clock-parents = &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+							 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dsi_opp_table&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -3744,16 +5660,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='hunk'>@@ -3807,6 +5727,7 @@</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 						mdss_dp0_out: endpoint {</div><div class='add'>+							data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -3822,10 +5743,10 @@</div><div class='ctx'> 				 &lt;&amp;bi_tcxo_ao_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi0_phy 1&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 0&gt;,</div><div class='del'>-				 &lt;&amp;mdss_dsi1_phy 1&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi0_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_BYTE_PLL_CLK&gt;,</div><div class='add'>+				 &lt;&amp;mdss_dsi1_phy DSI_PIXEL_PLL_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 				 &lt;0&gt;, /* dp1 */</div><div class='hunk'>@@ -3841,171 +5762,6 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_1_hsphy: phy@88e3000 {</div><div class='del'>-			compatible = "qcom,sm8650-snps-eusb2-phy",</div><div class='del'>-				     "qcom,sm8550-snps-eusb2-phy";</div><div class='del'>-			reg = &lt;0 0x088e3000 0 0x154&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;tcsr TCSR_USB2_CLKREF_EN&gt;;</div><div class='del'>-			clock-names = "ref";</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_dp_qmpphy: phy@88e8000 {</div><div class='del'>-			compatible = "qcom,sm8650-qmp-usb3-dp-phy";</div><div class='del'>-			reg = &lt;0 0x088e8000 0 0x3000&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='del'>-			clock-names = "aux",</div><div class='del'>-				      "ref",</div><div class='del'>-				      "com_aux",</div><div class='del'>-				      "usb3_pipe";</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_BCR&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB3_DP_PHY_PRIM_BCR&gt;;</div><div class='del'>-			reset-names = "phy",</div><div class='del'>-				      "common";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;gcc USB3_PHY_GDSC&gt;;</div><div class='del'>-</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			orientation-switch;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					usb_dp_qmpphy_out: endpoint {</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					usb_dp_qmpphy_usb_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_dwc3_ss&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-					usb_dp_qmpphy_dp_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;mdss_dp0_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_1: usb@a6f8800 {</div><div class='del'>-			compatible = "qcom,sm8650-dwc3", "qcom,dwc3";</div><div class='del'>-			reg = &lt;0 0x0a6f8800 0 0x400&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					      &lt;&amp;pdc 14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;pdc 15 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;pdc 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "pwr_event",</div><div class='del'>-					  "hs_phy_irq",</div><div class='del'>-					  "dp_hs_phy_irq",</div><div class='del'>-					  "dm_hs_phy_irq",</div><div class='del'>-					  "ss_phy_irq";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;tcsr TCSR_USB3_CLKREF_EN&gt;;</div><div class='del'>-			clock-names = "cfg_noc",</div><div class='del'>-				      "core",</div><div class='del'>-				      "iface",</div><div class='del'>-				      "sleep",</div><div class='del'>-				      "mock_utmi",</div><div class='del'>-				      "xo";</div><div class='del'>-</div><div class='del'>-			assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='del'>-					  &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;gcc GCC_USB30_PRIM_BCR&gt;;</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;gcc USB30_PRIM_GDSC&gt;;</div><div class='del'>-			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			usb_1_dwc3: usb@a600000 {</div><div class='del'>-				compatible = "snps,dwc3";</div><div class='del'>-				reg = &lt;0 0x0a600000 0 0xcd00&gt;;</div><div class='del'>-</div><div class='del'>-				interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-				iommus = &lt;&amp;apps_smmu 0x40 0&gt;;</div><div class='del'>-</div><div class='del'>-				phys = &lt;&amp;usb_1_hsphy&gt;,</div><div class='del'>-				       &lt;&amp;usb_dp_qmpphy QMP_USB43DP_USB3_PHY&gt;;</div><div class='del'>-				phy-names = "usb2-phy",</div><div class='del'>-					    "usb3-phy";</div><div class='del'>-</div><div class='del'>-				snps,hird-threshold = /bits/ 8 &lt;0x0&gt;;</div><div class='del'>-				snps,usb2-gadget-lpm-disable;</div><div class='del'>-				snps,dis_u2_susphy_quirk;</div><div class='del'>-				snps,dis_enblslpm_quirk;</div><div class='del'>-				snps,dis-u1-entry-quirk;</div><div class='del'>-				snps,dis-u2-entry-quirk;</div><div class='del'>-				snps,is-utmi-l1-suspend;</div><div class='del'>-				snps,usb3_lpm_capable;</div><div class='del'>-				snps,usb2-lpm-disable;</div><div class='del'>-				snps,has-lpm-erratum;</div><div class='del'>-				tx-fifo-resize;</div><div class='del'>-</div><div class='del'>-				dma-coherent;</div><div class='del'>-</div><div class='del'>-				ports {</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					port@0 {</div><div class='del'>-						reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-						usb_1_dwc3_hs: endpoint {</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					port@1 {</div><div class='del'>-						reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-						usb_1_dwc3_ss: endpoint {</div><div class='del'>-							remote-endpoint = &lt;&amp;usb_dp_qmpphy_usb_ss_in&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pdc: interrupt-controller@b220000 {</div><div class='hunk'>@@ -4027,8 +5783,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c228000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c222000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow",</div><div class='ctx'> 					  "critical";</div><div class='ctx'> </div><div class='hunk'>@@ -4042,8 +5798,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c229000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c223000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow",</div><div class='ctx'> 					  "critical";</div><div class='ctx'> </div><div class='hunk'>@@ -4057,8 +5813,8 @@</div><div class='ctx'> 			reg = &lt;0 0x0c22a000 0 0x1000&gt;, /* TM */</div><div class='ctx'> 			      &lt;0 0x0c224000 0 0x1000&gt;; /* SROT */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "uplow",</div><div class='ctx'> 					  "critical";</div><div class='ctx'> </div><div class='hunk'>@@ -4083,6 +5839,7 @@</div><div class='ctx'> 		sram@c3f0000 {</div><div class='ctx'> 			compatible = "qcom,rpmh-stats";</div><div class='ctx'> 			reg = &lt;0 0x0c3f0000 0 0x400&gt;;</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		spmi_bus: spmi@c400000 {</div><div class='hunk'>@@ -4116,7 +5873,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-tlmm";</div><div class='ctx'> 			reg = &lt;0 0x0f100000 0 0x300000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='hunk'>@@ -4856,107 +6613,239 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		funnel@10042000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10042000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_in1_in_funnel_apss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_apss_out_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_in1_out_funnel_qdss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_qdss_in_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10045000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10045000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_qdss_in_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_out_funnel_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_qdss_out_funnel_aoss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_aoss_in_funnel_qdss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10b04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10b04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel_aoss_in_funnel_qdss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_qdss_out_funnel_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_aoss_out_tmc_etf: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmc_etf_in_funnel_aoss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tmc@10b05000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x10b05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmc_etf_in_funnel_aoss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_aoss_out_tmc_etf&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@13810000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0x0 0x13810000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_in_funnel_ete: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_ete_out_funnel_apss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel_apss_out_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel_in1_in_funnel_apss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		apps_smmu: iommu@15000000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='ctx'> 			reg = &lt;0 0x15000000 0 0x100000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='hunk'>@@ -4969,9 +6858,9 @@</div><div class='ctx'> 			reg = &lt;0 0x17100000 0 0x10000&gt;,		/* GICD */</div><div class='ctx'> 			      &lt;0 0x17180000 0 0x200000&gt;;	/* GICR * 8 */</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='ctx'> </div><div class='del'>-			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> </div><div class='ctx'> 			#redistributor-regions = &lt;1&gt;;</div><div class='hunk'>@@ -4981,6 +6870,20 @@</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			ppi-partitions {</div><div class='add'>+				ppi_cluster0: interrupt-partition-0 {</div><div class='add'>+					affinity = &lt;&amp;cpu0 &amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster1: interrupt-partition-1 {</div><div class='add'>+					affinity = &lt;&amp;cpu2 &amp;cpu3 &amp;cpu4 &amp;cpu5 &amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ppi_cluster2: interrupt-partition-2 {</div><div class='add'>+					affinity = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			gic_its: msi-controller@17140000 {</div><div class='ctx'> 				compatible = "arm,gic-v3-its";</div><div class='ctx'> 				reg = &lt;0 0x17140000 0 0x20000&gt;;</div><div class='hunk'>@@ -5002,8 +6905,8 @@</div><div class='ctx'> 				reg = &lt;0x17421000 0x1000&gt;,</div><div class='ctx'> 				      &lt;0x17422000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -5011,7 +6914,7 @@</div><div class='ctx'> 			frame@17423000 {</div><div class='ctx'> 				reg = &lt;0x17423000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5021,7 +6924,7 @@</div><div class='ctx'> 			frame@17425000 {</div><div class='ctx'> 				reg = &lt;0x17425000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;2&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5031,7 +6934,7 @@</div><div class='ctx'> 			frame@17427000 {</div><div class='ctx'> 				reg = &lt;0x17427000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;3&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5041,7 +6944,7 @@</div><div class='ctx'> 			frame@17429000 {</div><div class='ctx'> 				reg = &lt;0x17429000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;4&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5051,7 +6954,7 @@</div><div class='ctx'> 			frame@1742b000 {</div><div class='ctx'> 				reg = &lt;0x1742b000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;5&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5061,7 +6964,7 @@</div><div class='ctx'> 			frame@1742d000 {</div><div class='ctx'> 				reg = &lt;0x1742d000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 				frame-number = &lt;6&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5073,17 +6976,16 @@</div><div class='ctx'> 			compatible = "qcom,rpmh-rsc";</div><div class='ctx'> 			reg = &lt;0 0x17a00000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x17a10000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x17a20000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x17a30000 0 0x10000&gt;;</div><div class='add'>+			      &lt;0 0x17a20000 0 0x10000&gt;;</div><div class='ctx'> 			reg-names = "drv-0",</div><div class='ctx'> 				    "drv-1",</div><div class='ctx'> 				    "drv-2";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='ctx'> 			qcom,drv-id = &lt;2&gt;;</div><div class='hunk'>@@ -5178,6 +7080,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		epss_l3: interconnect@17d90000 {</div><div class='add'>+			compatible = "qcom,sm8650-epss-l3", "qcom,epss-l3";</div><div class='add'>+			reg = &lt;0 0x17d90000 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;bi_tcxo_div2&gt;, &lt;&amp;gcc GCC_GPLL0&gt;;</div><div class='add'>+			clock-names = "xo", "alternate";</div><div class='add'>+</div><div class='add'>+			#interconnect-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpufreq_hw: cpufreq@17d91000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cpufreq-epss", "qcom,cpufreq-epss";</div><div class='ctx'> 			reg = &lt;0 0x17d91000 0 0x1000&gt;,</div><div class='hunk'>@@ -5189,10 +7101,10 @@</div><div class='ctx'> 				    "freq-domain2",</div><div class='ctx'> 				    "freq-domain3";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+				     &lt;GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 			interrupt-names = "dcvsh-irq-0",</div><div class='ctx'> 					  "dcvsh-irq-1",</div><div class='ctx'> 					  "dcvsh-irq-2",</div><div class='hunk'>@@ -5209,7 +7121,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-llcc-bwmon", "qcom,sc7280-llcc-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x24091000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='hunk'>@@ -5261,7 +7173,7 @@</div><div class='ctx'> 			compatible = "qcom,sm8650-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x240b7400 0 0x600&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='ctx'> 					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='hunk'>@@ -5321,155 +7233,7 @@</div><div class='ctx'> 				    "llcc_broadcast_base",</div><div class='ctx'> 				    "llcc_broadcast_and_base";</div><div class='ctx'> </div><div class='del'>-			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		remoteproc_adsp: remoteproc@30000000 {</div><div class='del'>-			compatible = "qcom,sm8650-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x30000000 0 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog",</div><div class='del'>-					  "fatal",</div><div class='del'>-					  "ready",</div><div class='del'>-					  "handover",</div><div class='del'>-					  "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='del'>-			power-domain-names = "lcx",</div><div class='del'>-					     "lmx";</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;adspslpi_mem&gt;, &lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			remoteproc_adsp_glink: glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				qcom,remote-pid = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-				label = "lpass";</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-</div><div class='del'>-					label = "adsp";</div><div class='del'>-</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1043 0x20&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1044 0x20&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1045 0x20&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@6 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;6&gt;;</div><div class='del'>-</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1046 0x20&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@7 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;7&gt;;</div><div class='del'>-</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1007 0x40&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1067 0x0&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1087 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				gpr {</div><div class='del'>-					compatible = "qcom,gpr";</div><div class='del'>-					qcom,glink-channels = "adsp_apps";</div><div class='del'>-					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-					qcom,intents = &lt;512 20&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					q6apm: service@1 {</div><div class='del'>-						compatible = "qcom,q6apm";</div><div class='del'>-						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-						#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6apmbedai: bedais {</div><div class='del'>-							compatible = "qcom,q6apm-lpass-dais";</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						q6apmdai: dais {</div><div class='del'>-							compatible = "qcom,q6apm-dais";</div><div class='del'>-							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='del'>-								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6prm: service@2 {</div><div class='del'>-						compatible = "qcom,q6prm";</div><div class='del'>-						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6prmcc: clock-controller {</div><div class='del'>-							compatible = "qcom,q6prm-lpass-clocks";</div><div class='del'>-							#clock-cells = &lt;2&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsp_noc: interconnect@320c0000 {</div><div class='hunk'>@@ -5483,9 +7247,9 @@</div><div class='ctx'> </div><div class='ctx'> 		remoteproc_cdsp: remoteproc@32300000 {</div><div class='ctx'> 			compatible = "qcom,sm8650-cdsp-pas";</div><div class='del'>-			reg = &lt;0 0x32300000 0 0x1400000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x32300000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -5624,7 +7388,7 @@</div><div class='ctx'> </div><div class='ctx'> 					/* note: secure cb9 in downstream */</div><div class='ctx'> </div><div class='del'>-					compute-cb@10 {</div><div class='add'>+					compute-cb@12 {</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;12&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5634,7 +7398,7 @@</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='del'>-					compute-cb@11 {</div><div class='add'>+					compute-cb@13 {</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;13&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5644,7 +7408,7 @@</div><div class='ctx'> 						dma-coherent;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='del'>-					compute-cb@12 {</div><div class='add'>+					compute-cb@14 {</div><div class='ctx'> 						compatible = "qcom,fastrpc-compute-cb";</div><div class='ctx'> 						reg = &lt;14&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5663,14 +7427,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				aoss0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss0-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -5681,14 +7445,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				cpuss0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpuss0-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -5699,14 +7463,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				cpuss1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpuss1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -5717,14 +7481,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				cpuss2-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -5735,14 +7499,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				cpuss3-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				cpuss3-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -5753,18 +7517,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu2-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5777,18 +7529,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu2-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5801,18 +7541,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu3-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5825,18 +7553,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu3-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5849,18 +7565,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu4-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5873,18 +7577,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu4-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5897,18 +7589,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 11&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu5-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5921,18 +7601,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 12&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu5-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5945,18 +7613,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 13&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu6-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5969,18 +7625,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 14&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu6-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -5993,14 +7637,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				aoss1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6011,18 +7655,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu7-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -6035,18 +7667,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu7-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -6059,18 +7679,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu7-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -6083,18 +7691,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu0-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -6107,18 +7703,6 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu1-critical {</div><div class='ctx'> 					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='hunk'>@@ -6128,19 +7712,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphvx0-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphvx0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				nsphvx1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+				nsphvx0-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6148,19 +7730,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphvx1-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphvx1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsphvx1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6168,19 +7748,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphmx0-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphmx0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsphmx0-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6188,19 +7766,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphmx1-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphmx1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsphmx1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6208,19 +7784,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphmx2-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphmx2-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsphmx2-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6228,19 +7802,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nsphmx3-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 11&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				nsphmx3-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsphmx3-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6248,19 +7820,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		video-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 12&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				video-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				video-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6268,19 +7838,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ddr-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 13&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				ddr-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				ddr-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6291,14 +7859,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 14&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				camera0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				camera0-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6309,14 +7877,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 15&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				camera1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				camera1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6327,14 +7895,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				aoss2-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss2-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6355,20 +7923,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu0_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6388,20 +7956,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu1_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6421,20 +7989,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu2_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6454,20 +8022,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu3_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6487,20 +8055,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu4_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6520,20 +8088,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu5_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6553,20 +8121,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu6_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6586,20 +8154,20 @@</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				gpu7_alert0: trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				trip-point2 {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6609,14 +8177,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				modem0-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				modem0-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6627,14 +8195,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				modem1-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				modem1-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6645,14 +8213,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 11&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				modem2-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				modem2-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6663,14 +8231,14 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 12&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='add'>+				modem3-hot {</div><div class='add'>+					temperature = &lt;110000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				modem3-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6681,9 +8249,9 @@</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> </div><div class='del'>-		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts<br/>new file mode 100644<br/>index 000000000000..3bbb53b7c71f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8750-mtp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8750-mtp.dts</a></div><div class='hunk'>@@ -0,0 +1,1202 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include "sm8750.dtsi"</div><div class='add'>+#include "pm8010.dtsi"</div><div class='add'>+#include "pm8550.dtsi"</div><div class='add'>+#define PMK8550VE_SID 8</div><div class='add'>+#include "pm8550ve.dtsi"</div><div class='add'>+#include "pmd8028.dtsi"</div><div class='add'>+#include "pmih0108.dtsi"</div><div class='add'>+#include "pmk8550.dtsi"</div><div class='add'>+#include "pmr735d_a.dtsi"</div><div class='add'>+#include "sm8750-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. SM8750 MTP";</div><div class='add'>+	compatible = "qcom,sm8750-mtp", "qcom,sm8750";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd939x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-px-supply = &lt;&amp;vreg_l2i_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		xo_board: xo-board {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;76800000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bi_tcxo_div2: bi-tcxo-div2-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-mult = &lt;1&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;;</div><div class='add'>+			clock-mult = &lt;1&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;volume_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;pm8550_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,sm8750-sndcard", "qcom,sm8450-sndcard";</div><div class='add'>+		model = "SM8750-MTP";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3", /* MIC4 on schematics */</div><div class='add'>+				"VA DMIC1", "MIC BIAS3", /* MIC1 on schematics */</div><div class='add'>+				"VA DMIC2", "MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "MIC BIAS1",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "VA MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "VA MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd939x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd939x 1&gt;, &lt;&amp;swr2 0&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MTPs rev 2.0 (power grid v8) come with two different WiFi chips:</div><div class='add'>+	 * WCN7850 and WCN786x.</div><div class='add'>+	 * Device nodes here for the PMU, WiFi and Bluetooth describe the MTP</div><div class='add'>+	 * variant with WCN7850.</div><div class='add'>+	 */</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wlan_en&gt;, &lt;&amp;bt_default&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;pm8550ve_f_gpios 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_s5f_0p85&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l3f_1p8&gt;;</div><div class='add'>+		vddio1p2-supply = &lt;&amp;vreg_l2f_1p2&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_s4d_0p85&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK1&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l11-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3048000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p1: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p1";</div><div class='add'>+			regulator-min-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3148000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_1p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_1p8: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11b_1p0: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1064000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1292000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p2: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p2";</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p8: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vreg_s1d_0p97: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1d_0p97";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3d_1p2: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3d_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s4d_0p85: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4d_0p85";</div><div class='add'>+			regulator-min-microvolt = &lt;852000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1036000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1d_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p88: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_0p88: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vreg_s5f_0p85: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5f_0p85";</div><div class='add'>+			regulator-min-microvolt = &lt;852000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_0p88: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "g";</div><div class='add'>+</div><div class='add'>+		vreg_s1g_0p5: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1g_0p5";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3g_1p8: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3g_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s4g_0p75: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4g_0p75";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1g_0p91: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1g_0p91";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;936000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2g_1p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2g_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1860000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3g_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3g_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vreg_s7i_1p2: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1224000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1340000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s8i_0p9: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;972000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p88: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-5 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vreg_s2j_1p1: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2j_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3j_1p1: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3j_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p91: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p91";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8010-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "m";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-l4-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l5-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l6-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1m_1p1: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1m_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2m_1p056: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2m_1p056";</div><div class='add'>+			regulator-min-microvolt = &lt;1056000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1056000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3m_2p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4m_2p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5m_1p8: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5m_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6m_2p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7m_2p96: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7m_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8010-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "n";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-l4-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l5-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l6-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1n_1p1: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1n_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2n_1p1: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2n_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3n_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3n_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4n_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4n_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5n_2p8: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5n_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6n_2p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6n_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7n_3p3: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7n_3p3";</div><div class='add'>+			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_flash {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-0 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		led-sources = &lt;1&gt;, &lt;4&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-1 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+		led-sources = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	volume_up_n: volume-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 104 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 102 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_default_state&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1f_0p88&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3g_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcieport0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmih0108_eusb2_repeater {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l5b_3p1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sm8750/adsp.mbn",</div><div class='add'>+			"qcom/sm8750/adsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/sm8750/cdsp.mbn",</div><div class='add'>+			"qcom/sm8750/cdsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/sm8750/modem.mbn",</div><div class='add'>+			"qcom/sm8750/modem_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	/* Modem crashes after some time with "DOG detects stalled initialization" */</div><div class='add'>+	status = "fail";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WSA883x, left/front speaker */</div><div class='add'>+	left_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_0_sd_n_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;lpass_tlmm 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * WSA8835 Port 1 (DAC)     &lt;=&gt; SWR0 Port 1 (SPKR_L)</div><div class='add'>+		 * WSA8835 Port 2 (COMP)    &lt;=&gt; SWR0 Port 2 (SPKR_L_COMP)</div><div class='add'>+		 * WSA8835 Port 3 (BOOST)   &lt;=&gt; SWR0 Port 3 (SPKR_L_BOOST)</div><div class='add'>+		 * WSA8835 Port 4 (VISENSE) &lt;=&gt; SWR0 Port 10 (SPKR_L_VI)</div><div class='add'>+		 */</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 10&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA883x, right/back speaker */</div><div class='add'>+	right_spkr: speaker@0,2 {</div><div class='add'>+		compatible = "sdw10217020200";</div><div class='add'>+		reg = &lt;0 2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_1_sd_n_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;lpass_tlmm 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * WSA8835 Port 1 (DAC)     &lt;=&gt; SWR0 Port 4 (SPKR_R)</div><div class='add'>+		 * WSA8835 Port 2 (COMP)    &lt;=&gt; SWR0 Port 5 (SPKR_R_COMP)</div><div class='add'>+		 * WSA8835 Port 3 (BOOST)   &lt;=&gt; SWR0 Port 6 (SPKR_R_BOOST)</div><div class='add'>+		 * WSA8835 Port 4 (VISENSE) &lt;=&gt; SWR0 Port 11 (SPKR_R_VI)</div><div class='add'>+		 */</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 11&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9395 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010e00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9395 RX Port 1 (HPH_L/R)      &lt;=&gt; SWR1 Port 1 (HPH_L/R)</div><div class='add'>+		 * WCD9395 RX Port 2 (CLSH)         &lt;=&gt; SWR1 Port 2 (CLSH)</div><div class='add'>+		 * WCD9395 RX Port 3 (COMP_L/R)     &lt;=&gt; SWR1 Port 3 (COMP_L/R)</div><div class='add'>+		 * WCD9395 RX Port 4 (LO)           &lt;=&gt; SWR1 Port 4 (LO)</div><div class='add'>+		 * WCD9395 RX Port 5 (DSD_L/R)      &lt;=&gt; SWR1 Port 5 (DSD_L/R)</div><div class='add'>+		 * WCD9395 RX Port 6 (HIFI_PCM_L/R) &lt;=&gt; SWR1 Port 9 (HIFI_PCM_L/R)</div><div class='add'>+		 */</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5 9&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9395 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010e00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9395 TX Port 1 (ADC1,2,3,4)         &lt;=&gt; SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)</div><div class='add'>+		 * WCD9395 TX Port 2 (ADC3,4 &amp; DMIC0,1)   &lt;=&gt; SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)</div><div class='add'>+		 * WCD9395 TX Port 3 (DMIC0,1,2,3 &amp; MBHC) &lt;=&gt; SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)</div><div class='add'>+		 * WCD9395 TX Port 4 (DMIC4,5,6,7)        &lt;=&gt; SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)</div><div class='add'>+		 */</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	/* reserved for secure world */</div><div class='add'>+	gpio-reserved-ranges = &lt;36 4&gt;, &lt;74 1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pinctrl */</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_0_sd_n_active: spkr-0-sd-n-active-state {</div><div class='add'>+		pins = "gpio17";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_1_sd_n_active: spkr-1-sd-n-active-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	bt_default: bt-default-state {</div><div class='add'>+		sw-ctrl-pins {</div><div class='add'>+			pins = "gpio18";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio101";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan_en: wlan-en-state {</div><div class='add'>+		pins = "gpio16";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1j_0p91&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3g_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 215 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l17b_2p5&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;1300000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l1d_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi b/arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi<br/>new file mode 100644<br/>index 000000000000..6eb8d78937c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8750-pmics.dtsi</a></div><div class='hunk'>@@ -0,0 +1,188 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	thermal-zones {</div><div class='add'>+		pm8550ve-d-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8550ve_d_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve-f-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8550ve_f_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve-g-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8550ve_g_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs-j-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;pm8550vs_j_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spmi_bus {</div><div class='add'>+	/* PM8550VE */</div><div class='add'>+	pm8550ve_d: pmic@3 {</div><div class='add'>+		compatible = "qcom,pm8550ve", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x3 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8550ve_d_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_d_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pm8550ve-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8550ve_d_gpios 0 0 8&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pm8550ve_f: pmic@5 {</div><div class='add'>+		compatible = "qcom,pm8550ve", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x5 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8550ve_f_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_f_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pm8550ve-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8550ve_f_gpios 0 0 6&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pm8550ve_g: pmic@6 {</div><div class='add'>+		compatible = "qcom,pm8550ve", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x6 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8550ve_g_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550ve_g_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pm8550ve-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8550ve_g_gpios 0 0 8&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* PM8550VS */</div><div class='add'>+	pm8550vs_j: pmic@9 {</div><div class='add'>+		compatible = "qcom,pm8550vs", "qcom,spmi-pmic";</div><div class='add'>+		reg = &lt;0x9 SPMI_USID&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		pm8550vs_j_temp_alarm: temp-alarm@a00 {</div><div class='add'>+			compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+			reg = &lt;0xa00&gt;;</div><div class='add'>+			interrupts = &lt;0x9 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pm8550vs_j_gpios: gpio@8800 {</div><div class='add'>+			compatible = "qcom,pm8550vs-gpio", "qcom,spmi-gpio";</div><div class='add'>+			reg = &lt;0x8800&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pm8550vs_j_gpios 0 0 6&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts<br/>new file mode 100644<br/>index 000000000000..13c7b9664c89<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8750-qrd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8750-qrd.dts</a></div><div class='hunk'>@@ -0,0 +1,1056 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include "sm8750.dtsi"</div><div class='add'>+#include "pm8010.dtsi"</div><div class='add'>+#include "pm8550.dtsi"</div><div class='add'>+#define PMK8550VE_SID 8</div><div class='add'>+#include "pm8550ve.dtsi"</div><div class='add'>+#include "pmd8028.dtsi"</div><div class='add'>+#include "pmih0108.dtsi"</div><div class='add'>+#include "pmk8550.dtsi"</div><div class='add'>+#include "pmr735d_a.dtsi"</div><div class='add'>+#include "sm8750-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. SM8750 QRD";</div><div class='add'>+	compatible = "qcom,sm8750-qrd", "qcom,sm8750";</div><div class='add'>+	chassis-type = "handset";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart7;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd939x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Mismatch with schematics - downstream DTS has L15B at 1.8 V,</div><div class='add'>+		 * schematics L2I at 1.2 V</div><div class='add'>+		 */</div><div class='add'>+		vdd-px-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		xo_board: xo-board {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;76800000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sleep_clk: sleep-clk {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bi_tcxo_div2: bi-tcxo-div2-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-mult = &lt;1&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk {</div><div class='add'>+			compatible = "fixed-factor-clock";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;;</div><div class='add'>+			clock-mult = &lt;1&gt;;</div><div class='add'>+			clock-div = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;volume_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-volume-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			gpios = &lt;&amp;pm8550_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;15&gt;;</div><div class='add'>+			linux,can-disable;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,sm8750-sndcard", "qcom,sm8450-sndcard";</div><div class='add'>+		model = "SM8750-QRD";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC1", "MIC BIAS1",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"AMIC3", "MIC BIAS3",</div><div class='add'>+				"AMIC4", "MIC BIAS3",</div><div class='add'>+				"AMIC5", "MIC BIAS4",</div><div class='add'>+				"TX SWR_INPUT0", "ADC1_OUTPUT",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT",</div><div class='add'>+				"TX SWR_INPUT2", "ADC3_OUTPUT",</div><div class='add'>+				"TX SWR_INPUT3", "ADC4_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd939x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd939x 1&gt;, &lt;&amp;swr2 0&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;north_spkr&gt;, &lt;&amp;south_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: vph-pwr-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l11-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2704000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3048000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p1: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p1";</div><div class='add'>+			regulator-min-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3148000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_1p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_1p8: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l11b_1p0: ldo11 {</div><div class='add'>+			regulator-name = "vreg_l11b_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1064000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1292000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p8: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p2: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p2";</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p8: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vreg_s1d_0p97: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1d_0p97";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3d_1p2: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3d_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s4d_0p85: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4d_0p85";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1036000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1d_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p88: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_0p88: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vreg_s5f_0p5: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5f_0p5";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_0p88: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "g";</div><div class='add'>+</div><div class='add'>+		vreg_s1g_0p5: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1g_0p5";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3g_1p8: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3g_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_LPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s4g_0p75: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4g_0p75";</div><div class='add'>+			regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1g_0p91: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1g_0p91";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;936000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2g_1p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2g_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1860000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3g_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3g_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-s7-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s8-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vreg_s7i_1p2: smps7 {</div><div class='add'>+			regulator-name = "vreg_s7i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1224000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1340000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s8i_0p9: smps8 {</div><div class='add'>+			regulator-name = "vreg_s8i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;972000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p88: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p88";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-5 {</div><div class='add'>+		compatible = "qcom,pm8550vs-rpmh-regulators";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1d_0p97&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s3-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vreg_s2j_1p1: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2j_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s3j_1p1: smps3 {</div><div class='add'>+			regulator-name = "vreg_s3j_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p91: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p91";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8010-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "m";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-l4-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l5-supply = &lt;&amp;vreg_s3g_1p8&gt;;</div><div class='add'>+		vdd-l6-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1m_1p1: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1m_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2m_1p056: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2m_1p056";</div><div class='add'>+			regulator-min-microvolt = &lt;1056000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1056000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3m_2p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4m_2p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5m_1p8: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5m_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6m_2p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6m_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7m_2p96: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7m_2p96";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8010-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "n";</div><div class='add'>+</div><div class='add'>+		vdd-l1-l2-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l3-l4-supply = &lt;&amp;vreg_s7i_1p2&gt;;</div><div class='add'>+		vdd-l5-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l6-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l7-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1n_1p1: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1n_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2n_1p1: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2n_1p1";</div><div class='add'>+			regulator-min-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1104000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-allow-set-load;</div><div class='add'>+			regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+						   RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3n_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3n_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4n_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4n_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5n_2p8: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5n_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6n_2p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6n_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7n_3p3: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7n_3p3";</div><div class='add'>+			regulator-min-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_flash {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	led-0 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+		led-sources = &lt;1&gt;, &lt;4&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-1 {</div><div class='add'>+		function = LED_FUNCTION_FLASH;</div><div class='add'>+		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+		led-sources = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+		led-max-microamp = &lt;500000&gt;;</div><div class='add'>+		flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+		flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+		function-enumerator = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	volume_up_n: volume-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	multi-led {</div><div class='add'>+		color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		led@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_pwrkey {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pon_resin {</div><div class='add'>+	linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmih0108_eusb2_repeater {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l5b_3p1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/sm8750/adsp.mbn",</div><div class='add'>+			"qcom/sm8750/adsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/sm8750/cdsp.mbn",</div><div class='add'>+			"qcom/sm8750/cdsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_mpss {</div><div class='add'>+	firmware-name = "qcom/sm8750/modem.mbn",</div><div class='add'>+			"qcom/sm8750/modem_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Speaker North */</div><div class='add'>+	north_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_0_sd_n_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 76 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l2i_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WSA8845 Port 1 (DAC)     &lt;=&gt; SWR0 Port 1 (SPKR_L)</div><div class='add'>+		 * WSA8845 Port 2 (COMP)    &lt;=&gt; SWR0 Port 2 (SPKR_L_COMP)</div><div class='add'>+		 * WSA8845 Port 3 (BOOST)   &lt;=&gt; SWR0 Port 3 (SPKR_L_BOOST)</div><div class='add'>+		 * WSA8845 Port 4 (PBR)     &lt;=&gt; SWR0 Port 7 (PBR)</div><div class='add'>+		 * WSA8845 Port 5 (VISENSE) &lt;=&gt; SWR0 Port 10 (SPKR_L_VI)</div><div class='add'>+		 * WSA8845 Port 6 (CPS)     &lt;=&gt; SWR0 Port 13 (CPS)</div><div class='add'>+		 */</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Speaker South */</div><div class='add'>+	south_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spkr_1_sd_n_active&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		powerdown-gpios = &lt;&amp;tlmm 77 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l2i_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WSA8845 Port 1 (DAC)     &lt;=&gt; SWR0 Port 4 (SPKR_R)</div><div class='add'>+		 * WSA8845 Port 2 (COMP)    &lt;=&gt; SWR0 Port 5 (SPKR_R_COMP)</div><div class='add'>+		 * WSA8845 Port 3 (BOOST)   &lt;=&gt; SWR0 Port 6 (SPKR_R_BOOST)</div><div class='add'>+		 * WSA8845 Port 4 (PBR)     &lt;=&gt; SWR0 Port 7 (PBR)</div><div class='add'>+		 * WSA8845 Port 5 (VISENSE) &lt;=&gt; SWR0 Port 11 (SPKR_R_VI)</div><div class='add'>+		 * WSA8845 Port 6 (CPS)     &lt;=&gt; SWR0 Port 13 (CPS)</div><div class='add'>+		 */</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9395 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010e00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9395 RX Port 1 (HPH_L/R)      &lt;=&gt; SWR1 Port 1 (HPH_L/R)</div><div class='add'>+		 * WCD9395 RX Port 2 (CLSH)         &lt;=&gt; SWR1 Port 2 (CLSH)</div><div class='add'>+		 * WCD9395 RX Port 3 (COMP_L/R)     &lt;=&gt; SWR1 Port 3 (COMP_L/R)</div><div class='add'>+		 * WCD9395 RX Port 4 (LO)           &lt;=&gt; SWR1 Port 4 (LO)</div><div class='add'>+		 * WCD9395 RX Port 5 (DSD_L/R)      &lt;=&gt; SWR1 Port 5 (DSD_L/R)</div><div class='add'>+		 * WCD9395 RX Port 6 (HIFI_PCM_L/R) &lt;=&gt; SWR1 Port 9 (HIFI_PCM_L/R)</div><div class='add'>+		 */</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5 9&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9395 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010e00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * WCD9395 TX Port 1 (ADC1,2,3,4)         &lt;=&gt; SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)</div><div class='add'>+		 * WCD9395 TX Port 2 (ADC3,4 &amp; DMIC0,1)   &lt;=&gt; SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)</div><div class='add'>+		 * WCD9395 TX Port 3 (DMIC0,1,2,3 &amp; MBHC) &lt;=&gt; SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)</div><div class='add'>+		 * WCD9395 TX Port 4 (DMIC4,5,6,7)        &lt;=&gt; SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)</div><div class='add'>+		 */</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	/* reserved for secure world */</div><div class='add'>+	gpio-reserved-ranges = &lt;36 4&gt;, &lt;74 1&gt;;</div><div class='add'>+</div><div class='add'>+	spkr_0_sd_n_active: spkr-0-sd-n-active-state {</div><div class='add'>+		pins = "gpio76";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_1_sd_n_active: spkr-1-sd-n-active-state {</div><div class='add'>+		pins = "gpio77";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio101";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1j_0p91&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3g_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_mem_hc {</div><div class='add'>+	reset-gpios = &lt;&amp;tlmm 215 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vcc-supply = &lt;&amp;vreg_l17b_2p5&gt;;</div><div class='add'>+	vcc-max-microamp = &lt;1300000&gt;;</div><div class='add'>+	vccq-supply = &lt;&amp;vreg_l1d_1p2&gt;;</div><div class='add'>+	vccq-max-microamp = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi<br/>new file mode 100644<br/>index 000000000000..a82d9867c7cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/sm8750.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/sm8750.dtsi</a></div><div class='hunk'>@@ -0,0 +1,4083 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sm8750-gcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sm8750-tcsr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interconnect/qcom,sm8750-rpmh.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+</div><div class='add'>+			l2_0: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x300&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@400 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x400&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@500 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x500&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@10000 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+</div><div class='add'>+			l2_1: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@10100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "qcom,oryon";</div><div class='add'>+			reg = &lt;0x0 0x10100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core4 {</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core5 {</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			cluster0_c4: cpu-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "ret";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x00000004&gt;;</div><div class='add'>+				entry-latency-us = &lt;93&gt;;</div><div class='add'>+				exit-latency-us = &lt;129&gt;;</div><div class='add'>+				min-residency-us = &lt;560&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1_c4: cpu-sleep-1 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				idle-state-name = "ret";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x00000004&gt;;</div><div class='add'>+				entry-latency-us = &lt;172&gt;;</div><div class='add'>+				exit-latency-us = &lt;130&gt;;</div><div class='add'>+				min-residency-us = &lt;686&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		domain-idle-states {</div><div class='add'>+			cluster_cl5: cluster-sleep-0 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x01000054&gt;;</div><div class='add'>+				entry-latency-us = &lt;2150&gt;;</div><div class='add'>+				exit-latency-us = &lt;1983&gt;;</div><div class='add'>+				min-residency-us = &lt;9144&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			domain_ss3: domain-sleep-0 {</div><div class='add'>+				compatible = "domain-idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0200c354&gt;;</div><div class='add'>+				entry-latency-us = &lt;2800&gt;;</div><div class='add'>+				exit-latency-us = &lt;4400&gt;;</div><div class='add'>+				min-residency-us = &lt;10150&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scm: scm {</div><div class='add'>+			compatible = "qcom,scm-sm8750", "qcom,scm";</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_virt: interconnect-0 {</div><div class='add'>+		compatible = "qcom,sm8750-clk-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc_virt: interconnect-1 {</div><div class='add'>+		compatible = "qcom,sm8750-mc-virt";</div><div class='add'>+		#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@a0000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* We expect the bootloader to fill in the size */</div><div class='add'>+		reg = &lt;0x0 0xa0000000 0x0 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,armv8-pmuv3";</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster0_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster0_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster1_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster1_pd&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster1_c4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster0_pd: power-domain-cluster0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_cl5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster1_pd: power-domain-cluster1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_cl5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_pd: power-domain-system {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;domain_ss3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gunyah_hyp_mem: gunyah-hyp@80000000 {</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0xe00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpusys_vm_mem: cpusys-vm-mem@80e00000 {</div><div class='add'>+			reg = &lt;0x0 0x80e00000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpucp_mem: cpucp@81200000 {</div><div class='add'>+			reg = &lt;0x0 0x81200000 0x0 0x200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xbl_dtlog_mem: xbl-dtlog@81a00000 {</div><div class='add'>+			reg = &lt;0x0 0x81a00000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_image_mem: aop-image@81c00000 {</div><div class='add'>+			reg = &lt;0x0 0x81c00000 0x0 0x60000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aop_cmd_db_mem: aop-cmd-db@81c60000 {</div><div class='add'>+			compatible = "qcom,cmd-db";</div><div class='add'>+			reg = &lt;0x0 0x81c60000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Merged aop_config, tme_crash_dump, tme_log and uefi_log regions */</div><div class='add'>+		aop_tme_uefi_merged_mem: aop-tme-uefi-merged@81c80000 {</div><div class='add'>+			reg = &lt;0x0 0x81c80000 0x0 0x74000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Secdata region can be reused by apps */</div><div class='add'>+</div><div class='add'>+		smem_mem: smem@81d00000 {</div><div class='add'>+			compatible = "qcom,smem";</div><div class='add'>+			reg = &lt;0x0 0x81d00000 0x0 0x200000&gt;;</div><div class='add'>+			hwlocks = &lt;&amp;tcsr_mutex 3&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdp_ns_shared_mem: pdp-ns-shared@81f00000 {</div><div class='add'>+			reg = &lt;0x0 0x81f00000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpucp_scandump_mem: cpucp-scandump@82000000 {</div><div class='add'>+			reg = &lt;0x0 0x82000000 0x0 0x380000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adsp_mhi_mem: adsp-mhi@82380000 {</div><div class='add'>+			reg = &lt;0x0 0x82380000 0x0 0x20000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		soccp_sdi_mem: soccp-sdi@823a0000 {</div><div class='add'>+			reg = &lt;0x0 0x823a0000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmic_minii_dump_mem: pmic-minii-dump@823e0000 {</div><div class='add'>+			reg = &lt;0x0 0x823e0000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pvmfw_mem: pvmfw@824a0000 {</div><div class='add'>+			reg = &lt;0x0 0x824a0000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		global_sync_mem: global-sync@82600000 {</div><div class='add'>+			reg = &lt;0x0 0x82600000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tz_stat_mem: tz-stat@82700000 {</div><div class='add'>+			reg = &lt;0x0 0x82700000 0x0 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qdss_mem: qdss@82800000 {</div><div class='add'>+			reg = &lt;0x0 0x82800000 0x0 0x2000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsm_partition_1_mem: dsm-partition-1@84a00000 {</div><div class='add'>+			reg = &lt;0x0 0x84a00000 0x0 0x4900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsm_partition_2_mem: dsm-partition-2@89300000 {</div><div class='add'>+			reg = &lt;0x0 0x89300000 0x0 0xa80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mpss_mem: mpss@8ba00000 {</div><div class='add'>+			reg = &lt;0x0 0x8ba00000 0x0 0xf600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_mpss_dtb_mem: q6-mpss-dtb@9b000000 {</div><div class='add'>+			reg = &lt;0x0 0x9b000000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_fw_mem: ipa-fw@9b080000 {</div><div class='add'>+			reg = &lt;0x0 0x9b080000 0x0 0x10000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_gsi_mem: ipa-gsi@9b090000 {</div><div class='add'>+			reg = &lt;0x0 0x9b090000 0x0 0xa000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_micro_code_mem: gpu-micro-code@9b09a000 {</div><div class='add'>+			reg = &lt;0x0 0x9b09a000 0x0 0x2000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spss_region_mem: spss@9b0a0000  {</div><div class='add'>+			reg = &lt;0x0 0x9b0a0000 0x0 0x1e0000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* First part of the "SPU secure shared memory" region */</div><div class='add'>+		spu_tz_shared_mem: spu-tz-shared@9b280000 {</div><div class='add'>+			reg = &lt;0x0 0x9b280000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Second part of the "SPU secure shared memory" region */</div><div class='add'>+		spu_modem_shared_mem: spu-modem-shared@9b2c0000 {</div><div class='add'>+			reg = &lt;0x0 0x9b2c0000 0x0 0x40000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera_mem: camera@9b300000 {</div><div class='add'>+			reg = &lt;0x0 0x9b300000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera_2_mem: camera-2@9bb00000 {</div><div class='add'>+			reg = &lt;0x0 0x9bb00000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video_mem: video@9c300000 {</div><div class='add'>+			reg = &lt;0x0 0x9c300000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cvp_mem: cvp@9cb00000 {</div><div class='add'>+			reg = &lt;0x0 0x9cb00000 0x0 0x700000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cdsp_mem: cdsp@9d200000 {</div><div class='add'>+			reg = &lt;0x0 0x9d200000 0x0 0x1900000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_cdsp_dtb_mem: q6-cdsp-dtb@9eb00000 {</div><div class='add'>+			reg = &lt;0x0 0x9eb00000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		soccp_mem: soccp@9ec00000 {</div><div class='add'>+			reg = &lt;0x0 0x9ec00000 0x0 0x180000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		q6_adsp_dtb_mem: q6-adsp-dtb@9ed80000 {</div><div class='add'>+			reg = &lt;0x0 0x9ed80000 0x0 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adspslpi_mem: adspslpi@9ee00000 {</div><div class='add'>+			reg = &lt;0x0 0x9ee00000 0x0 0x3a80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xbl_ramdump_mem: xbl-ramdump@b8000000 {</div><div class='add'>+			reg = &lt;0x0 0xb8000000 0x0 0x1c0000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hwfence_shbuf: hwfence-shbuf@d4e23000 {</div><div class='add'>+			no-map;</div><div class='add'>+			reg = &lt;0x0 0xd4e23000 0x0 0x2dd000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Merged tz_reserved, xbl_sc, and qtee regions */</div><div class='add'>+		tz_merged_mem: tz-merged@d8000000 {</div><div class='add'>+			reg = &lt;0x0 0xd8000000 0x0 0x600000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		trust_ui_vm_mem: trust-ui-vm@f3800000 {</div><div class='add'>+			reg = &lt;0x0 0xf3800000 0x0 0x4400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oem_vm_mem: oem-vm@f7c00000 {</div><div class='add'>+			reg = &lt;0x0 0xf7c00000 0x0 0x4c00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		llcc_lpi_mem: llcc-lpi@ff800000 {</div><div class='add'>+			reg = &lt;0x0 0xff800000 0x0 0x800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-adsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;443&gt;, &lt;429&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_adsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-cdsp {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;94&gt;, &lt;432&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_cdsp_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smp2p-modem {</div><div class='add'>+		compatible = "qcom,smp2p";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+					     IPCC_MPROC_SIGNAL_SMP2P</div><div class='add'>+					     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+		mboxes = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+				IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,smem = &lt;435&gt;, &lt;428&gt;;</div><div class='add'>+		qcom,local-pid = &lt;0&gt;;</div><div class='add'>+		qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		smp2p_modem_out: master-kernel {</div><div class='add'>+			qcom,entry-name = "master-kernel";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smp2p_modem_in: slave-kernel {</div><div class='add'>+			qcom,entry-name = "slave-kernel";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_smp2p_out: ipa-ap-to-modem {</div><div class='add'>+			qcom,entry-name = "ipa";</div><div class='add'>+			#qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipa_smp2p_in: ipa-modem-to-ap {</div><div class='add'>+			qcom,entry-name = "ipa";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* TODO: smem mailbox in and out */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+		ranges = &lt;0 0 0 0 0x10 0&gt;;</div><div class='add'>+</div><div class='add'>+		gcc: clock-controller@100000 {</div><div class='add'>+			compatible = "qcom,sm8750-gcc";</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0x1f4200&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;bi_tcxo_div2&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+				 &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;,</div><div class='add'>+				 &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ipcc: mailbox@406000 {</div><div class='add'>+			compatible = "qcom,sm8750-ipcc", "qcom,ipcc";</div><div class='add'>+			reg = &lt;0x0 0x00406000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			#mbox-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma2: dma-controller@800000 {</div><div class='add'>+			compatible = "qcom,sm8750-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00800000 0x0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0x1e&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x436 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_2: geniqup@8c0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x008c0000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_2_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_2_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x423 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@880000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00880000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c8_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi8: spi@880000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00880000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi8_data_clk&gt;, &lt;&amp;qup_spi8_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c9: i2c@884000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00884000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c9_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi9: spi@884000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00884000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi9_data_clk&gt;, &lt;&amp;qup_spi9_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@888000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c10_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi10: spi@888000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00888000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi10_data_clk&gt;, &lt;&amp;qup_spi10_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c11: i2c@88c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x0088c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c11_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi11: spi@88c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x0088c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi11_data_clk&gt;, &lt;&amp;qup_spi11_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c12: i2c@890000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00890000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c12_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi12: spi@890000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00890000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi12_data_clk&gt;, &lt;&amp;qup_spi12_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c13: i2c@894000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00894000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c13_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi13: spi@894000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00894000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi13_data_clk&gt;, &lt;&amp;qup_spi13_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart14: serial@898000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0x0 0x00898000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart14_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c15: i2c@89c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x0089c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c15_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi15: spi@89c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x0089c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP2_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi15_data_clk&gt;, &lt;&amp;qup_spi15_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c_master_hub_0: geniqup@9c0000 {</div><div class='add'>+			compatible = "qcom,geni-se-i2c-master-hub";</div><div class='add'>+			reg = &lt;0x0 0x009c0000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "s-ahb";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c_hub_0: i2c@980000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00980000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c0_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_1: i2c@984000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00984000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S1_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c1_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_2: i2c@988000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00988000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S2_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c2_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_3: i2c@98c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x0098c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S3_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c3_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_4: i2c@990000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00990000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S4_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c4_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_5: i2c@994000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00994000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S5_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c5_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_6: i2c@998000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x00998000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S6_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c6_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_7: i2c@99c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x0099c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S7_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c7_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_8: i2c@9a0000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x009a0000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S8_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c8_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c_hub_9: i2c@9a4000 {</div><div class='add'>+				compatible = "qcom,geni-i2c-master-hub";</div><div class='add'>+				reg = &lt;0x0 0x009a4000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_I2C_S9_CLK&gt;,</div><div class='add'>+					 &lt;&amp;gcc GCC_QUPV3_I2C_CORE_CLK&gt;;</div><div class='add'>+				clock-names = "se",</div><div class='add'>+					      "core";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;hub_i2c9_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpi_dma1: dma-controller@a00000 {</div><div class='add'>+			compatible = "qcom,sm8750-gpi-dma", "qcom,sm6350-gpi-dma";</div><div class='add'>+			reg = &lt;0x0 0x00a00000 0x0 0x60000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			dma-channels = &lt;12&gt;;</div><div class='add'>+			dma-channel-mask = &lt;0x1e&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xb6 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qupv3_1: geniqup@ac0000 {</div><div class='add'>+			compatible = "qcom,geni-se-qup";</div><div class='add'>+			reg = &lt;0x0 0x00ac0000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_QUPV3_WRAP_1_M_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_QUPV3_WRAP_1_S_AHB_CLK&gt;;</div><div class='add'>+			clock-names = "m-ahb",</div><div class='add'>+				      "s-ahb";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0xa3 0x0&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@a80000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a80000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c0_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi0: spi@a80000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a80000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S0_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi0_data_clk&gt;, &lt;&amp;qup_spi0_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@a84000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c1_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@a84000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a84000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S1_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi1_data_clk&gt;, &lt;&amp;qup_spi1_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@a88000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a88000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@a88000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a88000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S2_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi2_data_clk&gt;, &lt;&amp;qup_spi2_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a8c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c3_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@a8c000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a8c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S3_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi3_data_clk&gt;, &lt;&amp;qup_spi3_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@a90000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a90000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c4_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@a90000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a90000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S4_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi4_data_clk&gt;, &lt;&amp;qup_spi4_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@a94000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a94000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c5_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@a94000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a94000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S5_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi5_data_clk&gt;, &lt;&amp;qup_spi5_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@a98000 {</div><div class='add'>+				compatible = "qcom,geni-i2c";</div><div class='add'>+				reg = &lt;0x0 0x00a98000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_i2c6_data_clk&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi6: spi@a98000 {</div><div class='add'>+				compatible = "qcom,geni-spi";</div><div class='add'>+				reg = &lt;0x0 0x00a98000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config",</div><div class='add'>+						     "qup-memory";</div><div class='add'>+</div><div class='add'>+				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='add'>+				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='add'>+				dma-names = "tx",</div><div class='add'>+					    "rx";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_spi6_data_clk&gt;, &lt;&amp;qup_spi6_cs&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@a9c000 {</div><div class='add'>+				compatible = "qcom,geni-debug-uart";</div><div class='add'>+				reg = &lt;0x0 0x00a9c000 0x0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S7_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart7_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng: rng@10c3000 {</div><div class='add'>+			compatible = "qcom,sm8750-trng", "qcom,trng";</div><div class='add'>+			reg = &lt;0x0 0x010c3000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cnoc_main: interconnect@1500000 {</div><div class='add'>+			compatible = "qcom,sm8750-cnoc-main";</div><div class='add'>+			reg = &lt;0x0 0x01500000 0x0 0x16080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		config_noc: interconnect@1600000 {</div><div class='add'>+			compatible = "qcom,sm8750-config-noc";</div><div class='add'>+			reg = &lt;0x0 0x01600000 0x0 0x6200&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system_noc: interconnect@1680000 {</div><div class='add'>+			compatible = "qcom,sm8750-system-noc";</div><div class='add'>+			reg = &lt;0x0 0x01680000 0x0 0x1d080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_noc: interconnect@16c0000 {</div><div class='add'>+			compatible = "qcom,sm8750-pcie-anoc";</div><div class='add'>+			reg = &lt;0x0 0x016c0000 0x0 0x11400&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aggre1_noc: interconnect@16e0000 {</div><div class='add'>+			compatible = "qcom,sm8750-aggre1-noc";</div><div class='add'>+			reg = &lt;0x0 0x016e0000 0x0 0x16400&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aggre2_noc: interconnect@1700000 {</div><div class='add'>+			compatible = "qcom,sm8750-aggre2-noc";</div><div class='add'>+			reg = &lt;0x0 0x01700000 0x0 0x1f400&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_IPA_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmss_noc: interconnect@1780000 {</div><div class='add'>+			compatible = "qcom,sm8750-mmss-noc";</div><div class='add'>+			reg = &lt;0x0 0x01780000 0x0 0x5b800&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ice: crypto@1d88000 {</div><div class='add'>+			compatible = "qcom,sm8750-inline-crypto-engine",</div><div class='add'>+				     "qcom,inline-crypto-engine";</div><div class='add'>+			reg = &lt;0x0 0x01d88000 0x0 0x18000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cryptobam: dma-controller@1dc4000 {</div><div class='add'>+			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";</div><div class='add'>+			reg = &lt;0x0 0x01dc4000 0x0 0x28000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,controlled-remotely;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		crypto: crypto@1dfa000 {</div><div class='add'>+			compatible = "qcom,sm8750-qce", "qcom,sm8150-qce", "qcom,qce";</div><div class='add'>+			reg = &lt;0x0 0x01dfa000 0x0 0x6000&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "memory";</div><div class='add'>+</div><div class='add'>+			dmas = &lt;&amp;cryptobam 4&gt;, &lt;&amp;cryptobam 5&gt;;</div><div class='add'>+			dma-names = "rx", "tx";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x480 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x481 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsr_mutex: hwlock@1f40000 {</div><div class='add'>+			compatible = "qcom,tcsr-mutex";</div><div class='add'>+			reg = &lt;0x0 0x01f40000 0x0 0x20000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_mpss: remoteproc@4080000 {</div><div class='add'>+			compatible = "qcom,sm8750-mpss-pas";</div><div class='add'>+			reg = &lt;0x0 0x04080000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack",</div><div class='add'>+					  "shutdown-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MSS&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "mss";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;mpss_mem&gt;, &lt;&amp;q6_mpss_dtb_mem&gt;,</div><div class='add'>+					&lt;&amp;dsm_partition_1_mem&gt;,</div><div class='add'>+					&lt;&amp;dsm_partition_2_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_modem_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				label = "mpss";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_adsp: remoteproc@6800000 {</div><div class='add'>+			compatible = "qcom,sm8750-adsp-pas", "qcom,sm8550-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x06800000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack",</div><div class='add'>+					  "shutdown-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx",</div><div class='add'>+					     "lmx";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adspslpi_mem&gt;, &lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			remoteproc_adsp_glink: glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+				label = "lpass";</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='add'>+								 &lt;&amp;apps_smmu 0x1041 0x20&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_wsa2macro: codec@6aa0000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";</div><div class='add'>+			reg = &lt;0x0 0x06aa0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;lpass_vamacro&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec",</div><div class='add'>+				      "fsgen";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "wsa2-mclk";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swr3: soundwire@6ab0000 {</div><div class='add'>+			compatible = "qcom,soundwire-v2.1.0", "qcom,soundwire-v2.0.0";</div><div class='add'>+			reg = &lt;0x0 0x06ab0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lpass_wsa2macro&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			label = "WSA2";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			qcom,din-ports = &lt;4&gt;;</div><div class='add'>+			qcom,dout-ports = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ports-sinterval =		/bits/ 16 &lt;0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0x18f 0x18f 0x0f 0x0f 0xff 0x31f&gt;;</div><div class='add'>+			qcom,ports-offset1 =		/bits/ 8 &lt;0x01 0x03 0x05 0x02 0x04 0x15 0x00 0x00 0x00 0x06 0x0d 0xff 0x00&gt;;</div><div class='add'>+			qcom,ports-offset2 =		/bits/ 8 &lt;0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstart =		/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f&gt;;</div><div class='add'>+			qcom,ports-hstop =		/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f&gt;;</div><div class='add'>+			qcom,ports-word-length =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0f 0x0f 0x00 0xff 0xff 0x18&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x00 0x00&gt;;</div><div class='add'>+			qcom,ports-block-group-count =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-lane-control =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_rxmacro: codec@6ac0000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-rx-macro", "qcom,sm8550-lpass-rx-macro";</div><div class='add'>+			reg = &lt;0x0 0x06ac0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;lpass_vamacro&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec",</div><div class='add'>+				      "fsgen";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "mclk";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swr1: soundwire@6ad0000 {</div><div class='add'>+			compatible = "qcom,soundwire-v2.1.0", "qcom,soundwire-v2.0.0";</div><div class='add'>+			reg = &lt;0x0 0x06ad0000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lpass_rxmacro&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			label = "RX";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;rx_swr_active&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			qcom,din-ports = &lt;1&gt;;</div><div class='add'>+			qcom,dout-ports = &lt;11&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ports-sinterval =		/bits/ 16 &lt;0x03 0x3f 0x1f 0x07 0x00 0x18f 0xff 0xff 0x31 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-offset1 =		/bits/ 8 &lt;0x00 0x00 0x0b 0x01 0x00 0x00 0xff 0xff 0x00 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-offset2 =		/bits/ 8 &lt;0x00 0x00 0x0b 0x00 0x00 0x00 0xff 0xff 0x00 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstart =		/bits/ 8 &lt;0xff 0x03 0xff 0xff 0xff 0x08 0xff 0xff 0x00 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstop =		/bits/ 8 &lt;0xff 0x06 0xff 0xff 0xff 0x08 0xff 0xff 0x0f 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-word-length =	/bits/ 8 &lt;0x01 0x07 0x04 0xff 0xff 0x0f 0xff 0xff 0x18 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0xff 0x00 0x01 0xff 0xff 0x00 0xff 0xff 0x01 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-group-count =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0x00 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-lane-control =	/bits/ 8 &lt;0x01 0x00 0x00 0x00 0x00 0x00 0xff 0xff 0x01 0xff 0xff 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_txmacro: codec@6ae0000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-tx-macro", "qcom,sm8550-lpass-tx-macro";</div><div class='add'>+			reg = &lt;0x0 0x06ae0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;lpass_vamacro&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec",</div><div class='add'>+				      "fsgen";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "mclk";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_wsamacro: codec@6b00000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";</div><div class='add'>+			reg = &lt;0x0 0x06b00000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;lpass_vamacro&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec",</div><div class='add'>+				      "fsgen";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "mclk";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swr0: soundwire@6b10000 {</div><div class='add'>+			compatible = "qcom,soundwire-v2.1.0", "qcom,soundwire-v2.0.0";</div><div class='add'>+			reg = &lt;0x0 0x06b10000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;lpass_wsamacro&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			label = "WSA";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;wsa_swr_active&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			qcom,din-ports = &lt;4&gt;;</div><div class='add'>+			qcom,dout-ports = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ports-sinterval =		/bits/ 16 &lt;0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0x18f 0x18f 0x0f 0x0f 0xff 0x31f&gt;;</div><div class='add'>+			qcom,ports-offset1 =		/bits/ 8 &lt;0x01 0x03 0x05 0x02 0x04 0x15 0x00 0x00 0x00 0x06 0x0d 0xff 0x00&gt;;</div><div class='add'>+			qcom,ports-offset2 =		/bits/ 8 &lt;0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstart =		/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f&gt;;</div><div class='add'>+			qcom,ports-hstop =		/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f&gt;;</div><div class='add'>+			qcom,ports-word-length =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0x08 0x0f 0x0f 0x00 0xff 0xff 0x18&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x00 0x00&gt;;</div><div class='add'>+			qcom,ports-block-group-count =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-lane-control =	/bits/ 8 &lt;0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_ag_noc: interconnect@7e40000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-ag-noc";</div><div class='add'>+			reg = &lt;0x0 0x07e40000 0x0 0xe080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_lpiaon_noc: interconnect@7400000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-lpiaon-noc";</div><div class='add'>+			reg = &lt;0x0 0x07400000 0x0 0x19080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_lpicx_noc: interconnect@7420000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-lpicx-noc";</div><div class='add'>+			reg = &lt;0x0 0x07420000 0x0 0x44080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		swr2: soundwire@7630000 {</div><div class='add'>+			compatible = "qcom,soundwire-v2.1.0", "qcom,soundwire-v2.0.0";</div><div class='add'>+			reg = &lt;0x0 0x07630000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "core", "wakeup";</div><div class='add'>+			clocks = &lt;&amp;lpass_txmacro&gt;;</div><div class='add'>+			clock-names = "iface";</div><div class='add'>+			label = "TX";</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;tx_swr_active&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			qcom,din-ports = &lt;4&gt;;</div><div class='add'>+			qcom,dout-ports = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,ports-sinterval-low =	/bits/ 8 &lt;0x01 0x01 0x03 0x03&gt;;</div><div class='add'>+			qcom,ports-offset1 =		/bits/ 8 &lt;0x00 0x00 0x01 0x01&gt;;</div><div class='add'>+			qcom,ports-offset2 =		/bits/ 8 &lt;0x00 0x00 0x00 0x00&gt;;</div><div class='add'>+			qcom,ports-hstart =		/bits/ 8 &lt;0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-hstop =		/bits/ 8 &lt;0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-word-length =	/bits/ 8 &lt;0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-pack-mode =	/bits/ 8 &lt;0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-block-group-count =	/bits/ 8 &lt;0xff 0xff 0xff 0xff&gt;;</div><div class='add'>+			qcom,ports-lane-control =	/bits/ 8 &lt;0x01 0x02 0x00 0x00&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_vamacro: codec@7660000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-va-macro", "qcom,sm8550-lpass-va-macro";</div><div class='add'>+			reg = &lt;0x0 0x07660000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+			clock-names = "mclk",</div><div class='add'>+				      "macro",</div><div class='add'>+				      "dcodec";</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "fsgen";</div><div class='add'>+			#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpass_tlmm: pinctrl@7760000 {</div><div class='add'>+			compatible = "qcom,sm8750-lpass-lpi-pinctrl",</div><div class='add'>+				     "qcom,sm8650-lpass-lpi-pinctrl";</div><div class='add'>+			reg = &lt;0x0 0x07760000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+				 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+			clock-names = "core", "audio";</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;lpass_tlmm 0 0 23&gt;;</div><div class='add'>+</div><div class='add'>+			tx_swr_active: tx-swr-active-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio0";</div><div class='add'>+					function = "swr_tx_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio1", "gpio2", "gpio14";</div><div class='add'>+					function = "swr_tx_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rx_swr_active: rx-swr-active-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio3";</div><div class='add'>+					function = "swr_rx_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio4", "gpio5";</div><div class='add'>+					function = "swr_rx_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dmic01_default: dmic01-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio6";</div><div class='add'>+					function = "dmic1_clk";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio7";</div><div class='add'>+					function = "dmic1_data";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dmic23_default: dmic23-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio8";</div><div class='add'>+					function = "dmic2_clk";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					output-high;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio9";</div><div class='add'>+					function = "dmic2_data";</div><div class='add'>+					drive-strength = &lt;8&gt;;</div><div class='add'>+					input-enable;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wsa_swr_active: wsa-swr-active-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio10";</div><div class='add'>+					function = "wsa_swr_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio11";</div><div class='add'>+					function = "wsa_swr_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wsa2_swr_active: wsa2-swr-active-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "gpio15";</div><div class='add'>+					function = "wsa2_swr_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "gpio16";</div><div class='add'>+					function = "wsa2_swr_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					slew-rate = &lt;1&gt;;</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pdc: interrupt-controller@b220000 {</div><div class='add'>+			compatible = "qcom,sm8750-pdc", "qcom,pdc";</div><div class='add'>+			reg = &lt;0x0 0x0b220000 0x0 0x10000&gt;, &lt;0x0 0x164400f0 0x0 0x64&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,pdc-ranges = &lt;0 745 51&gt;, &lt;51 527 47&gt;,</div><div class='add'>+					  &lt;98 609 32&gt;, &lt;130 717 12&gt;,</div><div class='add'>+					  &lt;142 251 5&gt;, &lt;147 796 16&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss_qmp: power-management@c300000 {</div><div class='add'>+			compatible = "qcom,sm8750-aoss-qmp", "qcom,aoss-qmp";</div><div class='add'>+			reg = &lt;0x0 0x0c300000 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;ipcc&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+						     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+			mboxes = &lt;&amp;ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram@c3f0000 {</div><div class='add'>+			compatible = "qcom,rpmh-stats";</div><div class='add'>+			reg = &lt;0x0 0x0c3f0000 0x0 0x400&gt;;</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spmi_bus: spmi@c400000 {</div><div class='add'>+			compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+			reg = &lt;0x0 0x0c400000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c500000 0x0 0x400000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c440000 0x0 0x80000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c4c0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x0c42d000 0x0 0x4000&gt;;</div><div class='add'>+			reg-names = "core",</div><div class='add'>+				    "chnls",</div><div class='add'>+				    "obsrvr",</div><div class='add'>+				    "intr",</div><div class='add'>+				    "cnfg";</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "periph_irq";</div><div class='add'>+</div><div class='add'>+			qcom,ee = &lt;0&gt;;</div><div class='add'>+			qcom,channel = &lt;0&gt;;</div><div class='add'>+			qcom,bus-id = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tlmm: pinctrl@f100000 {</div><div class='add'>+			compatible = "qcom,sm8750-tlmm";</div><div class='add'>+			reg = &lt;0x0 0x0f100000 0x0 0x102000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-ranges = &lt;&amp;tlmm 0 0 216&gt;;</div><div class='add'>+			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+			hub_i2c0_data_clk: hub-i2c0-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio64", "gpio65";</div><div class='add'>+				function = "i2chub0_se0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c1_data_clk: hub-i2c1-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio66", "gpio67";</div><div class='add'>+				function = "i2chub0_se1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c2_data_clk: hub-i2c2-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio68", "gpio69";</div><div class='add'>+				function = "i2chub0_se2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c3_data_clk: hub-i2c3-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio70", "gpio71";</div><div class='add'>+				function = "i2chub0_se3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c4_data_clk: hub-i2c4-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio72", "gpio73";</div><div class='add'>+				function = "i2chub0_se4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c5_data_clk: hub-i2c5-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio74", "gpio75";</div><div class='add'>+				function = "i2chub0_se5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c6_data_clk: hub-i2c6-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio76", "gpio77";</div><div class='add'>+				function = "i2chub0_se6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c7_data_clk: hub-i2c7-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio82", "gpio83";</div><div class='add'>+				function = "i2chub0_se7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c8_data_clk: hub-i2c8-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio206", "gpio207";</div><div class='add'>+				function = "i2chub0_se8";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hub_i2c9_data_clk: hub-i2c9-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio80", "gpio81";</div><div class='add'>+				function = "i2chub0_se9";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie0_default_state: pcie0-default-state {</div><div class='add'>+				perst-pins {</div><div class='add'>+					pins = "gpio102";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-down;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				clkreq-pins {</div><div class='add'>+					pins = "gpio103";</div><div class='add'>+					function = "pcie0_clk_req_n";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				wake-pins {</div><div class='add'>+					pins = "gpio104";</div><div class='add'>+					function = "gpio";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c0_data_clk: qup-i2c0-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio32", "gpio33";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c1_data_clk: qup-i2c1-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio36", "gpio37";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c2_data_clk: qup-i2c2-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio40", "gpio41";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c3_data_clk: qup-i2c3-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio44", "gpio45";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c4_data_clk: qup-i2c4-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio48", "gpio49";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c5_data_clk: qup-i2c5-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio52", "gpio53";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c6_data_clk: qup-i2c6-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio56", "gpio57";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c8_data_clk: qup-i2c8-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio0", "gpio1";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c9_data_clk: qup-i2c9-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio4", "gpio5";</div><div class='add'>+				function = "qup2_se1";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c10_data_clk: qup-i2c10-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio8", "gpio9";</div><div class='add'>+				function = "qup2_se2";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c11_data_clk: qup-i2c11-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio12", "gpio13";</div><div class='add'>+				function = "qup2_se3";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c12_data_clk: qup-i2c12-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio16", "gpio17";</div><div class='add'>+				function = "qup2_se4";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c13_data_clk: qup-i2c13-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio20", "gpio21";</div><div class='add'>+				function = "qup2_se5";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_i2c15_data_clk: qup-i2c15-data-clk-state {</div><div class='add'>+				/* SDA, SCL */</div><div class='add'>+				pins = "gpio28", "gpio29";</div><div class='add'>+				function = "qup2_se7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_cs: qup-spi0-cs-state {</div><div class='add'>+				pins = "gpio35";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi0_data_clk: qup-spi0-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio32", "gpio33", "gpio34";</div><div class='add'>+				function = "qup1_se0";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_cs: qup-spi1-cs-state {</div><div class='add'>+				pins = "gpio39";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi1_data_clk: qup-spi1-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio36", "gpio37", "gpio38";</div><div class='add'>+				function = "qup1_se1";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_cs: qup-spi2-cs-state {</div><div class='add'>+				pins = "gpio43";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi2_data_clk: qup-spi2-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio40", "gpio41", "gpio42";</div><div class='add'>+				function = "qup1_se2";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_cs: qup-spi3-cs-state {</div><div class='add'>+				pins = "gpio47";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi3_data_clk: qup-spi3-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio44", "gpio45", "gpio46";</div><div class='add'>+				function = "qup1_se3";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_cs: qup-spi4-cs-state {</div><div class='add'>+				pins = "gpio51";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi4_data_clk: qup-spi4-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio48", "gpio49", "gpio50";</div><div class='add'>+				function = "qup1_se4";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_cs: qup-spi5-cs-state {</div><div class='add'>+				pins = "gpio55";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi5_data_clk: qup-spi5-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio52", "gpio53", "gpio54";</div><div class='add'>+				function = "qup1_se5";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_cs: qup-spi6-cs-state {</div><div class='add'>+				pins = "gpio59";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi6_data_clk: qup-spi6-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio56", "gpio57", "gpio58";</div><div class='add'>+				function = "qup1_se6";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_cs: qup-spi8-cs-state {</div><div class='add'>+				pins = "gpio3";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi8_data_clk: qup-spi8-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio0", "gpio1", "gpio2";</div><div class='add'>+				function = "qup2_se0";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_cs: qup-spi9-cs-state {</div><div class='add'>+				pins = "gpio7";</div><div class='add'>+				function = "qup2_se1";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi9_data_clk: qup-spi9-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio4", "gpio5", "gpio6";</div><div class='add'>+				function = "qup2_se1";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_cs: qup-spi10-cs-state {</div><div class='add'>+				pins = "gpio11";</div><div class='add'>+				function = "qup2_se2";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi10_data_clk: qup-spi10-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio8", "gpio9", "gpio10";</div><div class='add'>+				function = "qup2_se2";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi11_cs: qup-spi11-cs-state {</div><div class='add'>+				pins = "gpio15";</div><div class='add'>+				function = "qup2_se3";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi11_data_clk: qup-spi11-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio12", "gpio13", "gpio14";</div><div class='add'>+				function = "qup2_se3";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_cs: qup-spi12-cs-state {</div><div class='add'>+				pins = "gpio19";</div><div class='add'>+				function = "qup2_se4";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi12_data_clk: qup-spi12-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio16", "gpio17", "gpio18";</div><div class='add'>+				function = "qup2_se4";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi13_cs: qup-spi13-cs-state {</div><div class='add'>+				pins = "gpio23";</div><div class='add'>+				function = "qup2_se5";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi13_data_clk: qup-spi13-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio20", "gpio21", "gpio22";</div><div class='add'>+				function = "qup2_se5";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_cs: qup-spi15-cs-state {</div><div class='add'>+				pins = "gpio31";</div><div class='add'>+				function = "qup2_se7";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_spi15_data_clk: qup-spi15-data-clk-state {</div><div class='add'>+				/* MISO, MOSI, CLK */</div><div class='add'>+				pins = "gpio28", "gpio29", "gpio30";</div><div class='add'>+				function = "qup2_se7";</div><div class='add'>+				drive-strength = &lt;6&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart7_default: qup-uart7-default-state {</div><div class='add'>+				/* TX, RX */</div><div class='add'>+				pins = "gpio62", "gpio63";</div><div class='add'>+				function = "qup1_se7";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_default: qup-uart14-default-state {</div><div class='add'>+				/* TX, RX */</div><div class='add'>+				pins = "gpio26", "gpio27";</div><div class='add'>+				function = "qup2_se6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-up;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			qup_uart14_cts_rts: qup-uart14-cts-rts-state {</div><div class='add'>+				/* CTS, RTS */</div><div class='add'>+				pins = "gpio24", "gpio25";</div><div class='add'>+				function = "qup2_se6";</div><div class='add'>+				drive-strength = &lt;2&gt;;</div><div class='add'>+				bias-pull-down;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_sleep: sdc2-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_default: sdc2-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tcsrcc: clock-controller@f204008 {</div><div class='add'>+			compatible = "qcom,sm8750-tcsr", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x0f204008 0x0 0x3004&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_smmu: iommu@15000000 {</div><div class='add'>+			compatible = "qcom,sm8750-smmu-500", "qcom,smmu-500", "arm,mmu-500";</div><div class='add'>+			reg = &lt;0x0 0x15000000 0x0 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 493 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			#iommu-cells = &lt;2&gt;;</div><div class='add'>+			#global-interrupts = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@16000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x16000000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x16080000 0x0 0x200000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+</div><div class='add'>+			#redistributor-regions = &lt;1&gt;;</div><div class='add'>+			redistributor-stride = &lt;0x0 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			gic_its: msi-controller@16040000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				reg = &lt;0x0 0x16040000 0x0 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@1c00000 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			compatible = "qcom,pcie-sm8750", "qcom,pcie-sm8550";</div><div class='add'>+			reg = &lt;0x0 0x01c00000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x40000000 0x0 0xf1d&gt;,</div><div class='add'>+			      &lt;0x0 0x40000f20 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x40001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x40100000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x01C03000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf",</div><div class='add'>+				    "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x23d00000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x4 0x00000000 0x4 0x00000000 0x3 0x00000000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0x1400 0x1&gt;,</div><div class='add'>+				  &lt;0x100 &amp;gic_its 0x1401 0x1&gt;;</div><div class='add'>+			msi-map-mask = &lt;0xff00&gt;;</div><div class='add'>+</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_DDRSS_PCIE_SF_QTB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CNOC_PCIE_SF_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "ddrss_sf_tbu",</div><div class='add'>+				      "noc_aggr",</div><div class='add'>+				      "cnoc_sf_axi";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem",</div><div class='add'>+					     "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			iommu-map = &lt;0x0   &amp;apps_smmu 0x1400 0x1&gt;,</div><div class='add'>+				    &lt;0x100 &amp;apps_smmu 0x1401 0x1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='add'>+			reset-names = "pci";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_PCIE_0_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie0_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie0_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcieport0: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+				phys = &lt;&amp;pcie0_phy&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_phy: phy@1c06000 {</div><div class='add'>+			compatible = "qcom,sm8750-qmp-gen3x2-pcie-phy";</div><div class='add'>+			reg = &lt;0 0x01c06000 0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsrcc TCSR_PCIE_0_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "pipe";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_0_PHY_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_0_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_PCIE_0_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pcie0_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_phy: phy@1d80000 {</div><div class='add'>+			compatible = "qcom,sm8750-qmp-ufs-phy";</div><div class='add'>+			reg = &lt;0x0 0x01d80000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsrcc TCSR_UFS_CLKREF_EN&gt;;</div><div class='add'>+</div><div class='add'>+			clock-names = "ref",</div><div class='add'>+				      "ref_aux",</div><div class='add'>+				      "qref";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='add'>+			reset-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_UFS_MEM_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufs_mem_hc: ufs@1d84000 {</div><div class='add'>+			compatible = "qcom,sm8750-ufshc", "qcom,ufshc", "jedec,ufs-2.0";</div><div class='add'>+			reg = &lt;0x0 0x01d84000 0x0 0x3000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_UNIPRO_CORE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_LN_BB_CLK3&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK&gt;;</div><div class='add'>+			clock-names = "core_clk",</div><div class='add'>+				      "bus_aggr_clk",</div><div class='add'>+				      "iface_clk",</div><div class='add'>+				      "core_clk_unipro",</div><div class='add'>+				      "ref_clk",</div><div class='add'>+				      "tx_lane0_sync_clk",</div><div class='add'>+				      "rx_lane0_sync_clk",</div><div class='add'>+				      "rx_lane1_sync_clk";</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;ufs_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_UFS_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "rst";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "ufs-ddr",</div><div class='add'>+					     "cpu-ufs";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_UFS_PHY_GDSC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x60 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			lanes-per-direction = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;ufs_mem_phy&gt;;</div><div class='add'>+			phy-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ufs_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;100000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-403000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;403000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;403000000&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;,</div><div class='add'>+						 /bits/ 64 &lt;0&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apps_rsc: rsc@16500000 {</div><div class='add'>+			compatible = "qcom,rpmh-rsc";</div><div class='add'>+			reg = &lt;0x0 0x16500000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x16510000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x16520000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "drv-0",</div><div class='add'>+				    "drv-1",</div><div class='add'>+				    "drv-2";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+			qcom,drv-id = &lt;2&gt;;</div><div class='add'>+			qcom,tcs-config = &lt;ACTIVE_TCS    3&gt;, &lt;SLEEP_TCS     2&gt;,</div><div class='add'>+					  &lt;WAKE_TCS      2&gt;, &lt;CONTROL_TCS   0&gt;;</div><div class='add'>+</div><div class='add'>+			label = "apps_rsc";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='add'>+</div><div class='add'>+			apps_bcm_voter: bcm-voter {</div><div class='add'>+				compatible = "qcom,bcm-voter";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhcc: clock-controller {</div><div class='add'>+				compatible = "qcom,sm8750-rpmh-clk";</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+				clock-names = "xo";</div><div class='add'>+</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rpmhpd: power-controller {</div><div class='add'>+				compatible = "qcom,sm8750-rpmhpd";</div><div class='add'>+</div><div class='add'>+				operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				rpmhpd_opp_table: opp-table {</div><div class='add'>+					compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_ret: opp-16 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_min_svs: opp-48 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d3: opp-50 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D3&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d2: opp-52 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d1: opp-56 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_d0: opp-60 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs: opp-64 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_low_svs_l1: opp-80 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs: opp-128 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l0: opp-144 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l1: opp-192 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_svs_l2: opp-224 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom: opp-256 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l1: opp-320 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_nom_l2: opp-336 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo: opp-384 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l1: opp-416 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l2: opp-432 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l3: opp-448 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L3&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_turbo_l4: opp-452 {</div><div class='add'>+						opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					rpmhpd_opp_super_turbo_no_cpr: opp-480 {</div><div class='add'>+						opp-level =</div><div class='add'>+							&lt;RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer@16800000 {</div><div class='add'>+			compatible = "arm,armv7-timer-mem";</div><div class='add'>+			reg = &lt;0x0 0x16800000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0 0 0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+			frame@16801000 {</div><div class='add'>+				reg = &lt;0x0 0x16801000 0x1000&gt;,</div><div class='add'>+				      &lt;0x0 0x16802000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@16803000 {</div><div class='add'>+				reg = &lt;0x0 0x16803000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@16805000 {</div><div class='add'>+				reg = &lt;0x0 0x16805000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@16807000 {</div><div class='add'>+				reg = &lt;0x0 0x16807000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@16809000 {</div><div class='add'>+				reg = &lt;0x0 0x16809000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@1680b000 {</div><div class='add'>+				reg = &lt;0x0 0x1680b000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			frame@1680d000 {</div><div class='add'>+				reg = &lt;0x0 0x1680d000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				frame-number = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* cluster0 */</div><div class='add'>+		pmu@240b3400 {</div><div class='add'>+			compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x240b3400 0x0 0x600&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			nonposted-mmio;</div><div class='add'>+</div><div class='add'>+			cpu_bwmon_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-0 {</div><div class='add'>+					opp-peak-kBps = &lt;800000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1 {</div><div class='add'>+					opp-peak-kBps = &lt;2188000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-2 {</div><div class='add'>+					opp-peak-kBps = &lt;5414400&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-3 {</div><div class='add'>+					opp-peak-kBps = &lt;6220800&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-4 {</div><div class='add'>+					opp-peak-kBps = &lt;6835200&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-5 {</div><div class='add'>+					opp-peak-kBps = &lt;8371200&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-6 {</div><div class='add'>+					opp-peak-kBps = &lt;10944000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-7 {</div><div class='add'>+					opp-peak-kBps = &lt;12748800&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-8 {</div><div class='add'>+					opp-peak-kBps = &lt;14745600&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-9 {</div><div class='add'>+					opp-peak-kBps = &lt;16896000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-10 {</div><div class='add'>+					opp-peak-kBps = &lt;19046400&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* cluster1 */</div><div class='add'>+		pmu@240b7400 {</div><div class='add'>+			compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0x0 0x240b7400 0x0 0x600&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem_noc: interconnect@24100000 {</div><div class='add'>+			compatible = "qcom,sm8750-gem-noc";</div><div class='add'>+			reg = &lt;0x0 0x24100000 0x0 0x14b080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		system-cache-controller@24800000 {</div><div class='add'>+			compatible = "qcom,sm8750-llcc";</div><div class='add'>+			reg = &lt;0x0 0x24800000 0x0 0x200000&gt;,</div><div class='add'>+			      &lt;0x0 0x25800000 0x0 0x200000&gt;,</div><div class='add'>+			      &lt;0x0 0x24c00000 0x0 0x200000&gt;,</div><div class='add'>+			      &lt;0x0 0x25c00000 0x0 0x200000&gt;,</div><div class='add'>+			      &lt;0x0 0x26800000 0x0 0x200000&gt;,</div><div class='add'>+			      &lt;0x0 0x26c00000 0x0 0x200000&gt;;</div><div class='add'>+			reg-names = "llcc0_base",</div><div class='add'>+				    "llcc1_base",</div><div class='add'>+				    "llcc2_base",</div><div class='add'>+				    "llcc3_base",</div><div class='add'>+				    "llcc_broadcast_base",</div><div class='add'>+				    "llcc_broadcast_and_base";</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp_noc: interconnect@320c0000 {</div><div class='add'>+			compatible = "qcom,sm8750-nsp-noc";</div><div class='add'>+			reg = &lt;0x0 0x320c0000 0x0 0x13080&gt;;</div><div class='add'>+			qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+			#interconnect-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		remoteproc_cdsp: remoteproc@32300000 {</div><div class='add'>+			compatible = "qcom,sm8750-cdsp-pas", "qcom,sm8650-cdsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x32300000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_cdsp_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack",</div><div class='add'>+					  "shutdown-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_NSP&gt;;</div><div class='add'>+			power-domain-names = "cx",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "nsp";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;cdsp_mem&gt;, &lt;&amp;q6_cdsp_dtb_mem&gt;, &lt;&amp;global_sync_mem&gt;;</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_cdsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_CDSP</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+				qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+				label = "cdsp";</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "cdsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@1 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x19c1 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c21 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c01 0x40&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@2 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;2&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1962 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c02 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c42 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c2 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1963 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c23 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c03 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c3 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1964 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c24 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c04 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c4 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1965 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c25 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c05 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c5 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1966 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c06 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c46 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c6 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@7 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;7&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1967 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c27 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c07 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c7 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@8 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;8&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1968 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c08 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c48 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19c8 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					/* note: secure cb9 in downstream */</div><div class='add'>+</div><div class='add'>+					compute-cb@12 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;12&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196c 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c2c 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0c 0x40&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19cc 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@13 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;13&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196d 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0d 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c2e 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c4d 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19cd 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@14 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;14&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x196e 0x0&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x0c0e 0x20&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x19ce 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi<br/>new file mode 100644<br/>index 000000000000..ee3c8c5e2c50<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1491 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2025 Aleksandrs Vinarskis &lt;alex.vinarskis@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ASUS Zenbook A14";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			label = "lid";</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_indicator_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		led-camera-indicator {</div><div class='add'>+			label = "white:camera-indicator";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 110 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			/* Reuse as a panic indicator until we get a "camera on" trigger */</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Left-side display-adjacent port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side user-adjacent port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-ASUS-Zenbook-A14";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "MIC BIAS1",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;,</div><div class='add'>+					    &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;,</div><div class='add'>+					    &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;,</div><div class='add'>+					    &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_MISC_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p9: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p9: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ELAN, 04F3:3315 */</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Left-side display-adjacent port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8833", "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ASUSTeK, 0B05:4543 */</div><div class='add'>+	hdtl@17 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x17&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 95 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hdtl_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* EC @0x5b */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Left-side user-adjacent port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8833", "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ASUSTeK, 0B05:0220 */</div><div class='add'>+	keyboard@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi10 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	/* Unknown device */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Speaker */</div><div class='add'>+	left_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Speaker */</div><div class='add'>+	right_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;44 4&gt;,  /* SPI11, TZ Protected */</div><div class='add'>+			       &lt;90 1&gt;;	/* Unknown, TZ Protected */</div><div class='add'>+</div><div class='add'>+	cam_indicator_en: cam-indicator-en-state {</div><div class='add'>+		pins = "gpio110";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdtl_default: hdtl-default-state {</div><div class='add'>+		pins = "gpio95";</div><div class='add'>+		function = "gpio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_bt_en: wcn-bt-en-state {</div><div class='add'>+		pins = "gpio116";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_en: wcn-wlan-en-state {</div><div class='add'>+		pins = "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;8&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi<br/>new file mode 100644<br/>index 000000000000..3c9455fede5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1-crd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1-crd.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1811 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. X1E80100 CRD";</div><div class='add'>+	compatible = "qcom,x1e80100-crd", "qcom,x1e80100";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;, &lt;&amp;kypd_vol_up_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-vol-up {</div><div class='add'>+			label = "volume_up";</div><div class='add'>+			gpios = &lt;&amp;pm8550_gpios 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			label = "lid";</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 125 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/* Left-side rear port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side front port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Right-side port */</div><div class='add'>+		connector@2 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss2_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-CRD";</div><div class='add'>+		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"TweeterLeft IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"WooferRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"TweeterRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_woofer&gt;, &lt;&amp;left_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;,</div><div class='add'>+					    &lt;&amp;right_woofer&gt;, &lt;&amp;right_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr3 0&gt;, &lt;&amp;lpass_wsa2macro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_MISC_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p15: regulator-rtmr2-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 189 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p8: regulator-rtmr2-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 126 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_3p3: regulator-rtmr2-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 187 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "SDX_VPH_PWR";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 221 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p9: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_1p0: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keyboard@3a {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK5&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr2_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 185 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_23_sd_n_active: spkr-23-sd-n-active-state {</div><div class='add'>+		pins = "gpio13";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "samsung,atna45af01", "samsung,atna33xc20";</div><div class='add'>+			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 151 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wwan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie5_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	kypd_vol_up_n: kypd-vol-up-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/adsp.mbn",</div><div class='add'>+			"qcom/x1e80100/adsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/cdsp.mbn",</div><div class='add'>+			"qcom/x1e80100/cdsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Woofer */</div><div class='add'>+	left_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Tweeter */</div><div class='add'>+	left_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;, &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Woofer */</div><div class='add'>+	right_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Tweeter */</div><div class='add'>+	right_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='add'>+			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='add'>+			       &lt;238 1&gt;; /* UFS Reset */</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie5_default: pcie5-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio150";</div><div class='add'>+			function = "pcie5_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio149";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio151";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_default: rtmr2-reset-n-active-state {</div><div class='add'>+		pins = "gpio185";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio189";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio126";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio187";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio221";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;4&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss2_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss2_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	/* Only second port is used with USB 2.0 maximum speed */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi<br/>new file mode 100644<br/>index 000000000000..cc64558ed5e6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1666 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Aleksandrs Vinarskis &lt;alex.vinarskis@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2025 Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='add'>+ * Copyright (c) 2025 Val Packett &lt;val@packett.cool&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;40000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Display-adjacent port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* User-adjacent port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_indicator_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		led-camera-indicator {</div><div class='add'>+			label = "white:camera-indicator";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 110 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			/* Reuse as a panic indicator until we get a "camera on" trigger */</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound: sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"TweeterLeft IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"WooferRight IN", "WSA2 WSA_SPK1 OUT",</div><div class='add'>+				"TweeterRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "MIC BIAS1",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_woofer&gt;, &lt;&amp;left_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;,</div><div class='add'>+					    &lt;&amp;right_woofer&gt;, &lt;&amp;right_tweeter&gt;,</div><div class='add'>+					    &lt;&amp;swr3 0&gt;, &lt;&amp;lpass_wsa2macro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_cam_1p8: regulator-cam-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_CAM_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 91 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_ldo_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	keyboard@5 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x5&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchpad@2c {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8833", "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* EC @0x3b */</div><div class='add'>+</div><div class='add'>+	/* Type A Port */</div><div class='add'>+	eusb3_typea_repeater: redriver@43 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Fingerprint scanner */</div><div class='add'>+	eusb5_frp_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb5_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8833", "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c20 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spkr_23_sd_n_active: spkr-23-sd-n-active-state {</div><div class='add'>+		pins = "gpio13";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			enable-gpios = &lt;&amp;tlmm 74 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mdss_dp3_out: endpoint {</div><div class='add'>+				data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 71 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9b_2p9&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6b_1p8&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Woofer */</div><div class='add'>+	left_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Tweeter */</div><div class='add'>+	left_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;, &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Woofer */</div><div class='add'>+	right_woofer: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "WooferRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Tweeter */</div><div class='add'>+	right_tweeter: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "TweeterRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;44 4&gt;,  /* SPI11 (TPM) */</div><div class='add'>+			       &lt;76 4&gt;,  /* SPI19 (TZ Protected) */</div><div class='add'>+			       &lt;238 1&gt;; /* UFS Reset */</div><div class='add'>+</div><div class='add'>+	cam_rgb_default: cam-rgb-default-state {</div><div class='add'>+		mclk-pins {</div><div class='add'>+			pins = "gpio100";</div><div class='add'>+			function = "cam_aon";</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio237";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_indicator_en: cam-indicator-en-state {</div><div class='add'>+		pins = "gpio110";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_ldo_en: cam-ldo-en-state {</div><div class='add'>+		pins = "gpio91";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio74";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb5_reset_n: eusb5-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_card_det_n: sdc2-card-det-state {</div><div class='add'>+		pins = "gpio71";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		disable-pins {</div><div class='add'>+			pins = "gpio38";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio3";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio52";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		disable-pins {</div><div class='add'>+			pins = "gpio75";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			/* Technically should be High-Z input */</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-low;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb5_frp_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_typea_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1-el2.dtso b/arch/arm64/boot/dts/qcom/x1-el2.dtso<br/>new file mode 100644<br/>index 000000000000..2d1c9151cf1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1-el2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1-el2.dtso</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * x1 specific modifications required to boot in EL2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+/* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	/* TODO: Add video-firmware iommus to start IRIS from EL2 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * When running under Gunyah, this IOMMU is controlled by the firmware,</div><div class='add'>+ * however when we take ownership of it in EL2, we need to configure</div><div class='add'>+ * it properly to use PCIe.</div><div class='add'>+ *</div><div class='add'>+ * Additionally, it seems like ITS emulation in Gunyah is broken so we</div><div class='add'>+ * can't use MSI on some PCIe controllers in EL1. But we can add them</div><div class='add'>+ * here for EL2.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x30000 0x10000&gt;;</div><div class='add'>+	msi-map = &lt;0 &amp;gic_its 0xb0000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x40000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x50000 0x10000&gt;;</div><div class='add'>+	msi-map = &lt;0 &amp;gic_its 0xd0000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	iommu-map = &lt;0 &amp;pcie_smmu 0x60000 0x10000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_smmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The "SBSA watchdog" is implemented in software in Gunyah</div><div class='add'>+ * and can't be used when running in EL2.</div><div class='add'>+ */</div><div class='add'>+&amp;sbsa_watchdog {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi b/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi<br/>new file mode 100644<br/>index 000000000000..a4075434162a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1544 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024, Xilin Wu &lt;wuxilin123@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pmk8550_pwm 0 5000000&gt;;</div><div class='add'>+</div><div class='add'>+		brightness-levels = &lt;0 2048 4096 8192 16384 65535&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;20&gt;;</div><div class='add'>+		default-brightness-level = &lt;80&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vreg_edp_bl&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_bl_en&gt;, &lt;&amp;edp_bl_pwm&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Left-side port, closer to the screen */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side port, farther from the screen */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound: sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-HP-OMNIBOOK-X14";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "MIC BIAS1",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "VA MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "VA MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_bl: regulator-edp-bl {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VBL9";</div><div class='add'>+		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_3_gpios 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_bl_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_MISC_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vreg_vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: These two regulators are actually part of the removable M.2</div><div class='add'>+	 * card and not the CRD mainboard. Need to describe this differently.</div><div class='add'>+	 * Functionally it works correctly, because all we need to do is to</div><div class='add'>+	 * turn on the actual 3.3V supply above.</div><div class='add'>+	 */</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss1-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 178 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p9: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_1p0: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	keyboard@3a {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_reg_en: edp-bl-reg-en-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8550_gpios {</div><div class='add'>+	edp_bl_pwm: edp-bl-pwm-state {</div><div class='add'>+		pins = "gpio5";</div><div class='add'>+		function = "func3";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmk8550_pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Speaker */</div><div class='add'>+	left_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Speaker */</div><div class='add'>+	right_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='add'>+			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='add'>+			       &lt;72 2&gt;, /* Secure EC I2C connection (?) */</div><div class='add'>+			       &lt;238 1&gt;; /* UFS Reset */</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio177";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio179";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio178";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_dwc3 {</div><div class='add'>+	phys = &lt;&amp;usb_mp_hsphy0&gt;, &lt;&amp;usb_mp_qmpphy0&gt;;</div><div class='add'>+	phy-names = "usb2-0", "usb3-0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts<br/>new file mode 100644<br/>index 000000000000..bfc649d4b643<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e001de-devkit.dts</a></div><div class='hunk'>@@ -0,0 +1,1500 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows";</div><div class='add'>+	compatible = "qcom,x1e001de-devkit", "qcom,x1e001de", "qcom,x1e80100";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 125 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/* Back panel port closer to the RJ45 connector */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Back panel port closer to the audio jack */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "host";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Front panel port */</div><div class='add'>+		connector@2 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "host";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss2_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E001DE-DEVKIT";</div><div class='add'>+		audio-routing = "IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p15: regulator-rtmr2-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 189 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p8: regulator-rtmr2-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 126 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_3p3: regulator-rtmr2-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 187 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "SDX_VPH_PWR";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 221 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p9: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_1p0: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK5&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr2_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 185 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 151 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wwan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie5_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_en: usb0-pwr-1p15-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/Thundercomm/DEVKIT/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/Thundercomm/DEVKIT/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 71 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9b_2p9&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6b_1p8&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;44 4&gt;; /* SPI (TPM) */</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie5_default: pcie5-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio150";</div><div class='add'>+			function = "pcie5_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio149";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio151";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_default: rtmr2-reset-n-active-state {</div><div class='add'>+		pins = "gpio185";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio189";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio126";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio187";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_card_det_n: sdc2-card-det-state {</div><div class='add'>+		pins = "gpio71";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio221";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;4&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss2_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss2_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts<br/>new file mode 100644<br/>index 000000000000..d524afa12d19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s-oled.dts</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "x1e78100-lenovo-thinkpad-t14s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Lenovo ThinkPad T14s Gen 6 (OLED)";</div><div class='add'>+	compatible = "lenovo,thinkpad-t14s-oled", "lenovo,thinkpad-t14s",</div><div class='add'>+		     "qcom,x1e78100", "qcom,x1e80100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;panel {</div><div class='add'>+	compatible = "samsung,atna40yk20", "samsung,atna33xc20";</div><div class='add'>+	enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts<br/>index 941dfddd6713..5cc6a63d1ef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts</a></div><div class='hunk'>@@ -1,807 +1,60 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='del'>- * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ * Copyright (c) 2025, Linaro Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/dts-v1/;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='del'>-</div><div class='del'>-#include "x1e80100.dtsi"</div><div class='del'>-#include "x1e80100-pmics.dtsi"</div><div class='add'>+#include "x1e78100-lenovo-thinkpad-t14s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Lenovo ThinkPad T14s Gen 6";</div><div class='del'>-	compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";</div><div class='del'>-	chassis-type = "laptop";</div><div class='add'>+	model = "Lenovo ThinkPad T14s Gen 6 (LCD)";</div><div class='add'>+	compatible = "lenovo,thinkpad-t14s-lcd", "lenovo,thinkpad-t14s",</div><div class='add'>+		     "qcom,x1e78100", "qcom,x1e80100";</div><div class='ctx'> </div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pmk8550_pwm 0 4266537&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vreg_edp_bl&gt;;</div><div class='ctx'> </div><div class='del'>-		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_bl_en&gt;, &lt;&amp;edp_bl_pwm&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		switch-lid {</div><div class='del'>-			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_SW&gt;;</div><div class='del'>-			linux,code = &lt;SW_LID&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmic-glink {</div><div class='del'>-		compatible = "qcom,x1e80100-pmic-glink",</div><div class='del'>-			     "qcom,sm8550-pmic-glink",</div><div class='del'>-			     "qcom,pmic-glink";</div><div class='del'>-		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		/* Display-adjacent port */</div><div class='del'>-		connector@0 {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss0_hs_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss0_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* User-adjacent port */</div><div class='del'>-		connector@1 {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss1_hs_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss1_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		linux,cma {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			size = &lt;0x0 0x8000000&gt;;</div><div class='del'>-			reusable;</div><div class='del'>-			linux,cma-default;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "VREG_EDP_3P3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vreg_nvme: regulator-nvme {</div><div class='add'>+	vreg_edp_bl: regulator-edp-bl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='del'>-		regulator-name = "VREG_NVME_3P3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "VBL9";</div><div class='add'>+		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio = &lt;&amp;pmc8380_3_gpios 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> </div><div class='del'>-		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vph_pwr: regulator-vph-pwr {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "vph_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_bl_reg_en&gt;;</div><div class='ctx'> </div><div class='del'>-		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;apps_rsc {</div><div class='del'>-	regulators-0 {</div><div class='del'>-		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "b";</div><div class='del'>-</div><div class='del'>-		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='del'>-		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_bob1: bob1 {</div><div class='del'>-			regulator-name = "vreg_bob1";</div><div class='del'>-			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_bob2: bob2 {</div><div class='del'>-			regulator-name = "vreg_bob2";</div><div class='del'>-			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2b_3p0: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l4b_1p8: ldo4 {</div><div class='del'>-			regulator-name = "vreg_l4b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l6b_1p8: ldo6 {</div><div class='del'>-			regulator-name = "vreg_l6b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l8b_3p0: ldo8 {</div><div class='del'>-			regulator-name = "vreg_l8b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l9b_2p9: ldo9 {</div><div class='del'>-			regulator-name = "vreg_l9b_2p9";</div><div class='del'>-			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l10b_1p8: ldo10 {</div><div class='del'>-			regulator-name = "vreg_l10b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l12b_1p2: ldo12 {</div><div class='del'>-			regulator-name = "vreg_l12b_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l13b_3p0: ldo13 {</div><div class='del'>-			regulator-name = "vreg_l13b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l14b_3p0: ldo14 {</div><div class='del'>-			regulator-name = "vreg_l14b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l15b_1p8: ldo15 {</div><div class='del'>-			regulator-name = "vreg_l15b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l17b_2p5: ldo17 {</div><div class='del'>-			regulator-name = "vreg_l17b_2p5";</div><div class='del'>-			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-1 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "c";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s4c_1p8: smps4 {</div><div class='del'>-			regulator-name = "vreg_s4c_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1c_1p2: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1c_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2c_0p8: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2c_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3c_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3c_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-2 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "d";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_l1d_0p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1d_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2d_0p9: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2d_0p9";</div><div class='del'>-			regulator-min-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3d_1p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3d_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-3 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "e";</div><div class='del'>-</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_l2e_0p8: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2e_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3e_1p2: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3e_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-4 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "f";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s1f_0p7: smps1 {</div><div class='del'>-			regulator-name = "vreg_s1f_0p7";</div><div class='del'>-			regulator-min-microvolt = &lt;700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-6 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "i";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_l1i_1p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1i_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2i_1p2: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2i_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3i_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3i_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-7 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "j";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s5j_1p2: smps5 {</div><div class='del'>-			regulator-name = "vreg_s5j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1j_0p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1j_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2j_1p2: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3j_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3j_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	zap-shader {</div><div class='del'>-		firmware-name = "qcom/x1e80100/LENOVO/21N1/qcdxkmsuc8380.mbn";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* ELAN06E2 or ELAN06E3 */</div><div class='del'>-	touchpad@15 {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x15&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TODO: second-sourced SYNA8022 or SYNA8024 touchpad @ 0x2c */</div><div class='del'>-</div><div class='del'>-	/* ELAN06F1 or SYNA06F2 */</div><div class='del'>-	keyboard@3a {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x3a&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c8 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* ILIT2911 or GTCH1563 */</div><div class='del'>-	touchscreen@10 {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TODO: second-sourced touchscreen @ 0x41 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='del'>-	/delete-property/ #sound-dai-cells;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	aux-bus {</div><div class='del'>-		panel {</div><div class='del'>-			compatible = "edp-panel";</div><div class='del'>-			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='del'>-</div><div class='del'>-			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				edp_panel_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='del'>-</div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dp3_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie4 {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie4_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie6a {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie6a_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;panel {</div><div class='add'>+	backlight = &lt;&amp;backlight&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmc8380_3_gpios {</div><div class='del'>-	edp_bl_en: edp-bl-en-state {</div><div class='del'>-		pins = "gpio4";</div><div class='add'>+	edp_bl_reg_en: edp-bl-reg-en-state {</div><div class='add'>+		pins = "gpio10";</div><div class='ctx'> 		function = "normal";</div><div class='del'>-		power-source = &lt;1&gt;;</div><div class='del'>-		input-disable;</div><div class='del'>-		output-enable;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;qupv3_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qupv3_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qupv3_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_adsp {</div><div class='del'>-	firmware-name = "qcom/x1e80100/LENOVO/21N1/qcadsp8380.mbn",</div><div class='del'>-			"qcom/x1e80100/LENOVO/21N1/adsp_dtbs.elf";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_cdsp {</div><div class='del'>-	firmware-name = "qcom/x1e80100/LENOVO/21N1/qccdsp8380.mbn",</div><div class='del'>-			"qcom/x1e80100/LENOVO/21N1/cdsp_dtbs.elf";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_0_eusb2_repeater {</div><div class='del'>-	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='del'>-	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_1_eusb2_repeater {</div><div class='del'>-	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='del'>-	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='del'>-			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='del'>-			       &lt;72 2&gt;, /* Secure EC I2C connection (?) */</div><div class='del'>-			       &lt;238 1&gt;; /* UFS Reset */</div><div class='del'>-</div><div class='del'>-	tpad_default: tpad-default-state {</div><div class='del'>-		pins = "gpio3";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	nvme_reg_en: nvme-reg-en-state {</div><div class='del'>-		pins = "gpio18";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ts0_default: ts0-default-state {</div><div class='del'>-		reset-n-pins {</div><div class='del'>-			pins = "gpio48";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			output-high;</div><div class='del'>-			drive-strength = &lt;16&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		int-n-pins {</div><div class='del'>-			pins = "gpio51";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	kybd_default: kybd-default-state {</div><div class='del'>-		pins = "gpio67";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	edp_reg_en: edp-reg-en-state {</div><div class='del'>-		pins = "gpio70";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hall_int_n_default: hall-int-n-state {</div><div class='del'>-		pins = "gpio92";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie4_default: pcie4-default-state {</div><div class='del'>-		clkreq-n-pins {</div><div class='del'>-			pins = "gpio147";</div><div class='del'>-			function = "pcie4_clk";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		perst-n-pins {</div><div class='del'>-			pins = "gpio146";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wake-n-pins {</div><div class='del'>-			pins = "gpio148";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie6a_default: pcie6a-default-state {</div><div class='del'>-		clkreq-n-pins {</div><div class='del'>-			pins = "gpio153";</div><div class='del'>-			function = "pcie6a_clk";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		perst-n-pins {</div><div class='del'>-			pins = "gpio152";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wake-n-pins {</div><div class='del'>-			pins = "gpio154";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wcd_default: wcd-reset-n-active-state {</div><div class='del'>-		pins = "gpio191";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-		output-low;</div><div class='add'>+&amp;pmk8550_gpios {</div><div class='add'>+	edp_bl_pwm: edp-bl-pwm-state {</div><div class='add'>+		pins = "gpio5";</div><div class='add'>+		function = "func3";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_1_ss0_hsphy {</div><div class='del'>-	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='del'>-</div><div class='add'>+&amp;pmk8550_pwm {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_dwc3_hs {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_hsphy {</div><div class='del'>-	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_dwc3_hs {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi<br/>new file mode 100644<br/>index 000000000000..654cbce9d6ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1602 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Lenovo ThinkPad T14s Gen 6";</div><div class='add'>+	compatible = "lenovo,thinkpad-t14s", "qcom,x1e78100", "qcom,x1e80100";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		mux-controls = &lt;&amp;us_euro_mux_ctrl&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Display-adjacent port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* User-adjacent port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* two muxes together support CTIA and OMTP switching */</div><div class='add'>+	us_euro_mux_ctrl: mux-controller {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-0 = &lt;&amp;us_euro_hs_sel&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		mux-supply = &lt;&amp;vreg_l16b_2p5&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;tlmm 68 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wwan: regulator-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VCC3B_WAN_RCM";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 221 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-LENOVO-Thinkpad-T14s";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "MIC BIAS1",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS1",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p5: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/x1e80100/LENOVO/21N1/qcdxkmsuc8380.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_i2c0_data_clk&gt;, &lt;&amp;tpad_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ELAN06E2 or ELAN06E3 */</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* SYNA8022 or SYNA8024 */</div><div class='add'>+	touchpad@2c {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* ELAN06F1 or SYNA06F2 */</div><div class='add'>+	keyboard@3a {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb5_repeater: redriver@43 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb5_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	embedded-controller@28 {</div><div class='add'>+		compatible = "lenovo,thinkpad-t14s-ec";</div><div class='add'>+		reg = &lt;0x28&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 66 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ec_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ILIT2911 or GTCH1563 */</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TODO: second-sourced touchscreen @ 0x41 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/x1e80100/LENOVO/21N1/qcvss8380.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel: panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 149 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 151 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_wwan&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie5_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie5_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/LENOVO/21N1/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/LENOVO/21N1/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/LENOVO/21N1/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/LENOVO/21N1/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Speaker */</div><div class='add'>+	left_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Speaker */</div><div class='add'>+	right_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='add'>+			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='add'>+			       &lt;72 2&gt;, /* Secure EC I2C connection (?) */</div><div class='add'>+			       &lt;238 1&gt;; /* UFS Reset */</div><div class='add'>+</div><div class='add'>+	ec_int_n_default: ec-int-n-state {</div><div class='add'>+		pins = "gpio66";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb5_reset_n: eusb5-reset-n-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie5_default: pcie5-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio150";</div><div class='add'>+			function = "pcie5_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio149";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio151";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	us_euro_hs_sel: us-euro-hs-sel-state {</div><div class='add'>+		pins = "gpio68";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wwan_sw_en: wwan-sw-en-state {</div><div class='add'>+		pins = "gpio221";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;4&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb5_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts<br/>index 20616bd4aa6c..0113d856b3ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts</a></div><div class='hunk'>@@ -7,7 +7,9 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x1e80100.dtsi"</div><div class='ctx'> #include "x1e80100-pmics.dtsi"</div><div class='hunk'>@@ -17,6 +19,24 @@</div><div class='ctx'> 	compatible = "asus,vivobook-s15", "qcom,x1e80100";</div><div class='ctx'> 	chassis-type = "laptop";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmic-glink {</div><div class='ctx'> 		compatible = "qcom,x1e80100-pmic-glink",</div><div class='ctx'> 			     "qcom,sm8550-pmic-glink",</div><div class='hunk'>@@ -94,17 +114,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vph_pwr: vph-pwr-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "vph_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='hunk'>@@ -134,6 +143,120 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: These two regulators are actually part of the removable M.2</div><div class='add'>+	 * card and not the CRD mainboard. Need to describe this differently.</div><div class='add'>+	 * Functionally it works correctly, because all we need to do is to</div><div class='add'>+	 * turn on the actual 3.3V supply above.</div><div class='add'>+	 */</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_en&gt;, &lt;&amp;wcn_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -174,12 +297,33 @@</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_l14b_3p0: ldo14 {</div><div class='ctx'> 			regulator-name = "vreg_l14b_3p0";</div><div class='ctx'> 			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	regulators-1 {</div><div class='hunk'>@@ -191,6 +335,13 @@</div><div class='ctx'> 		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='ctx'> 		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='ctx'> </div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vreg_s4c_1p8: smps4 {</div><div class='ctx'> 			regulator-name = "vreg_s4c_1p8";</div><div class='ctx'> 			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='hunk'>@@ -312,8 +463,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2j_1p2: ldo2 {</div><div class='ctx'> 			regulator-name = "vreg_l2j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -326,6 +477,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/x1e80100/ASUSTeK/vivobook-s15/qcdxkmsuc8380.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -375,7 +534,49 @@</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* EC? @ 0x5b, 0x76 */</div><div class='add'>+	eusb5_repeater: redriver@43 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb5_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* EC @ 0x76 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c7 {</div><div class='hunk'>@@ -390,16 +591,22 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='ctx'> 		panel {</div><div class='del'>-			compatible = "edp-panel";</div><div class='add'>+			compatible = "samsung,atna56ac03", "samsung,atna33xc20";</div><div class='add'>+			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='ctx'> </div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 			port {</div><div class='ctx'> 				edp_panel_in: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='hunk'>@@ -407,19 +614,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='ctx'> </div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp3_phy {</div><div class='hunk'>@@ -446,6 +647,23 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie6a {</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -465,6 +683,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_MED&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -491,11 +721,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_0_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_1_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='hunk'>@@ -513,6 +751,36 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb5_reset_n: eusb5-reset-n-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	kybd_default: kybd-default-state {</div><div class='ctx'> 		pins = "gpio67";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -577,6 +845,44 @@</div><div class='ctx'> 		function = "gpio";</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcn_bt_en: wcn-bt-en-state {</div><div class='add'>+		pins = "gpio116";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_en: wcn-wlan-en-state {</div><div class='add'>+		pins = "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_hsphy {</div><div class='hunk'>@@ -589,11 +895,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='ctx'> </div><div class='del'>-	orientation-switch;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -623,11 +927,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='ctx'> </div><div class='del'>-	orientation-switch;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -646,3 +948,56 @@</div><div class='ctx'> &amp;usb_1_ss1_qmpphy_out {</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb5_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts<br/>new file mode 100644<br/>index 000000000000..0d0bcc50207d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2025 Aleksandrs Vinarskis &lt;alex.vinarskis@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1-asus-zenbook-a14.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ASUS Zenbook A14 (UX3407RA)";</div><div class='add'>+	compatible = "asus,zenbook-a14-ux3407ra", "qcom,x1e80100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/ASUSTeK/zenbook-a14/qcdxkmsuc8380.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/ASUSTeK/zenbook-a14/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/ASUSTeK/zenbook-a14/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/ASUSTeK/zenbook-a14/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/ASUSTeK/zenbook-a14/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts<br/>index 10b28d870f08..dfc378e1a056 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-crd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-crd.dts</a></div><div class='hunk'>@@ -5,1228 +5,18 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "x1e80100.dtsi"</div><div class='del'>-#include "x1e80100-pmics.dtsi"</div><div class='add'>+#include "x1-crd.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Qualcomm Technologies, Inc. X1E80100 CRD";</div><div class='ctx'> 	compatible = "qcom,x1e80100-crd", "qcom,x1e80100";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart21;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wcd938x: audio-codec {</div><div class='del'>-		compatible = "qcom,wcd9385-codec";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='del'>-		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='del'>-		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='del'>-		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='del'>-		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='del'>-		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='del'>-		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='del'>-		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='del'>-		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-</div><div class='del'>-		#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		switch-lid {</div><div class='del'>-			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,input-type = &lt;EV_SW&gt;;</div><div class='del'>-			linux,code = &lt;SW_LID&gt;;</div><div class='del'>-			wakeup-source;</div><div class='del'>-			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmic-glink {</div><div class='del'>-		compatible = "qcom,x1e80100-pmic-glink",</div><div class='del'>-			     "qcom,sm8550-pmic-glink",</div><div class='del'>-			     "qcom,pmic-glink";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-				    &lt;&amp;tlmm 125 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		/* Left-side rear port */</div><div class='del'>-		connector@0 {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss0_hs_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss0_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* Left-side front port */</div><div class='del'>-		connector@1 {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss1_hs_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss1_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* Right-side port */</div><div class='del'>-		connector@2 {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss2_hs_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss2_dwc3_hs&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-					pmic_glink_ss2_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		linux,cma {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			size = &lt;0x0 0x8000000&gt;;</div><div class='del'>-			reusable;</div><div class='del'>-			linux,cma-default;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		compatible = "qcom,x1e80100-sndcard";</div><div class='del'>-		model = "X1E80100-CRD";</div><div class='del'>-		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",</div><div class='del'>-				"TwitterLeft IN", "WSA WSA_SPK2 OUT",</div><div class='del'>-				"WooferRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='del'>-				"TwitterRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='del'>-				"IN1_HPHL", "HPHL_OUT",</div><div class='del'>-				"IN2_HPHR", "HPHR_OUT",</div><div class='del'>-				"AMIC2", "MIC BIAS2",</div><div class='del'>-				"VA DMIC0", "MIC BIAS3",</div><div class='del'>-				"VA DMIC1", "MIC BIAS3",</div><div class='del'>-				"VA DMIC2", "MIC BIAS1",</div><div class='del'>-				"VA DMIC3", "MIC BIAS1",</div><div class='del'>-				"VA DMIC0", "VA MIC BIAS3",</div><div class='del'>-				"VA DMIC1", "VA MIC BIAS3",</div><div class='del'>-				"VA DMIC2", "VA MIC BIAS1",</div><div class='del'>-				"VA DMIC3", "VA MIC BIAS1",</div><div class='del'>-				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='del'>-</div><div class='del'>-		wcd-playback-dai-link {</div><div class='del'>-			link-name = "WCD Playback";</div><div class='del'>-</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			platform {</div><div class='del'>-				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wcd-capture-dai-link {</div><div class='del'>-			link-name = "WCD Capture";</div><div class='del'>-</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			platform {</div><div class='del'>-				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wsa-dai-link {</div><div class='del'>-			link-name = "WSA Playback";</div><div class='del'>-</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;left_woofer&gt;, &lt;&amp;left_tweeter&gt;,</div><div class='del'>-					    &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;,</div><div class='del'>-					    &lt;&amp;right_woofer&gt;, &lt;&amp;right_tweeter&gt;,</div><div class='del'>-					    &lt;&amp;swr3 0&gt;, &lt;&amp;lpass_wsa2macro 0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			platform {</div><div class='del'>-				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		va-dai-link {</div><div class='del'>-			link-name = "VA Capture";</div><div class='del'>-</div><div class='del'>-			cpu {</div><div class='del'>-				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			codec {</div><div class='del'>-				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			platform {</div><div class='del'>-				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vph_pwr: vph-pwr-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "vph_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "VREG_EDP_3P3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_nvme: regulator-nvme {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "VREG_NVME_3P3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vreg_wwan: regulator-wwan {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "SDX_VPH_PWR";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio = &lt;&amp;tlmm 221 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;wwan_sw_en&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;apps_rsc {</div><div class='del'>-	regulators-0 {</div><div class='del'>-		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "b";</div><div class='del'>-</div><div class='del'>-		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='del'>-		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='del'>-		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_bob1: bob1 {</div><div class='del'>-			regulator-name = "vreg_bob1";</div><div class='del'>-			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_bob2: bob2 {</div><div class='del'>-			regulator-name = "vreg_bob2";</div><div class='del'>-			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1b_1p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2b_3p0: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l4b_1p8: ldo4 {</div><div class='del'>-			regulator-name = "vreg_l4b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l5b_3p0: ldo5 {</div><div class='del'>-			regulator-name = "vreg_l5b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l6b_1p8: ldo6 {</div><div class='del'>-			regulator-name = "vreg_l6b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l7b_2p8: ldo7 {</div><div class='del'>-			regulator-name = "vreg_l7b_2p8";</div><div class='del'>-			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l8b_3p0: ldo8 {</div><div class='del'>-			regulator-name = "vreg_l8b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l9b_2p9: ldo9 {</div><div class='del'>-			regulator-name = "vreg_l9b_2p9";</div><div class='del'>-			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l10b_1p8: ldo10 {</div><div class='del'>-			regulator-name = "vreg_l10b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l12b_1p2: ldo12 {</div><div class='del'>-			regulator-name = "vreg_l12b_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l13b_3p0: ldo13 {</div><div class='del'>-			regulator-name = "vreg_l13b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l14b_3p0: ldo14 {</div><div class='del'>-			regulator-name = "vreg_l14b_3p0";</div><div class='del'>-			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l15b_1p8: ldo15 {</div><div class='del'>-			regulator-name = "vreg_l15b_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l16b_2p9: ldo16 {</div><div class='del'>-			regulator-name = "vreg_l16b_2p9";</div><div class='del'>-			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l17b_2p5: ldo17 {</div><div class='del'>-			regulator-name = "vreg_l17b_2p5";</div><div class='del'>-			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-1 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "c";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s4c_1p8: smps4 {</div><div class='del'>-			regulator-name = "vreg_s4c_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1c_1p2: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1c_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2c_0p8: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2c_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3c_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3c_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-2 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "d";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_l1d_0p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1d_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2d_0p9: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2d_0p9";</div><div class='del'>-			regulator-min-microvolt = &lt;912000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3d_1p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3d_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-3 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "e";</div><div class='del'>-</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_l2e_0p8: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2e_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3e_1p2: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3e_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-4 {</div><div class='del'>-		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "f";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s1f_0p7: smps1 {</div><div class='del'>-			regulator-name = "vreg_s1f_0p7";</div><div class='del'>-			regulator-min-microvolt = &lt;700000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1f_1p0: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1f_1p0";</div><div class='del'>-			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2f_1p0: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2f_1p0";</div><div class='del'>-			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3f_1p0: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3f_1p0";</div><div class='del'>-			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-6 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "i";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s1i_0p9: smps1 {</div><div class='del'>-			regulator-name = "vreg_s1i_0p9";</div><div class='del'>-			regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_s2i_1p0: smps2 {</div><div class='del'>-			regulator-name = "vreg_s2i_1p0";</div><div class='del'>-			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1i_1p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1i_1p8";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2i_1p2: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2i_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3i_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3i_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	regulators-7 {</div><div class='del'>-		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='del'>-		qcom,pmic-id = "j";</div><div class='del'>-</div><div class='del'>-		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='del'>-		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='del'>-		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='del'>-</div><div class='del'>-		vreg_s5j_1p2: smps5 {</div><div class='del'>-			regulator-name = "vreg_s5j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l1j_0p8: ldo1 {</div><div class='del'>-			regulator-name = "vreg_l1j_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l2j_1p2: ldo2 {</div><div class='del'>-			regulator-name = "vreg_l2j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vreg_l3j_0p8: ldo3 {</div><div class='del'>-			regulator-name = "vreg_l3j_0p8";</div><div class='del'>-			regulator-min-microvolt = &lt;880000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;920000&gt;;</div><div class='del'>-			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	zap-shader {</div><div class='del'>-		firmware-name = "qcom/x1e80100/gen70500_zap.mbn";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	touchpad@15 {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x15&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	keyboard@3a {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x3a&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c8 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	touchscreen@10 {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-</div><div class='del'>-		hid-descr-addr = &lt;0x1&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lpass_tlmm {</div><div class='del'>-	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='del'>-		pins = "gpio12";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spkr_23_sd_n_active: spkr-23-sd-n-active-state {</div><div class='del'>-		pins = "gpio13";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;lpass_vamacro {</div><div class='del'>-	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='del'>-	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='del'>-	/delete-property/ #sound-dai-cells;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	aux-bus {</div><div class='del'>-		panel {</div><div class='del'>-			compatible = "samsung,atna45af01", "samsung,atna33xc20";</div><div class='del'>-			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='del'>-</div><div class='del'>-			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				edp_panel_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='del'>-</div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdss_dp3_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie4 {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie4_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie5 {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 149 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 151 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	vddpe-3v3-supply = &lt;&amp;vreg_wwan&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie5_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie5_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie6a {</div><div class='del'>-	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie6a_phy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pmc8380_3_gpios {</div><div class='del'>-	edp_bl_en: edp-bl-en-state {</div><div class='del'>-		pins = "gpio4";</div><div class='del'>-		function = "normal";</div><div class='del'>-		power-source = &lt;1&gt;; /* 1.8V */</div><div class='del'>-		input-disable;</div><div class='del'>-		output-enable;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qupv3_0 {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/gen70500_zap.mbn";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;qupv3_1 {</div><div class='add'>+&amp;iris {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;qupv3_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_adsp {</div><div class='del'>-	firmware-name = "qcom/x1e80100/adsp.mbn",</div><div class='del'>-			"qcom/x1e80100/adsp_dtb.mbn";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;remoteproc_cdsp {</div><div class='del'>-	firmware-name = "qcom/x1e80100/cdsp.mbn",</div><div class='del'>-			"qcom/x1e80100/cdsp_dtb.mbn";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_0_eusb2_repeater {</div><div class='del'>-	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='del'>-	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_1_eusb2_repeater {</div><div class='del'>-	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='del'>-	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;smb2360_2_eusb2_repeater {</div><div class='del'>-	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='del'>-	vdd3-supply = &lt;&amp;vreg_l8b_3p0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;swr0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	/* WSA8845, Left Woofer */</div><div class='del'>-	left_woofer: speaker@0,0 {</div><div class='del'>-		compatible = "sdw20217020400";</div><div class='del'>-		reg = &lt;0 0&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		sound-name-prefix = "WooferLeft";</div><div class='del'>-		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='del'>-		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* WSA8845, Left Tweeter */</div><div class='del'>-	left_tweeter: speaker@0,1 {</div><div class='del'>-		compatible = "sdw20217020400";</div><div class='del'>-		reg = &lt;0 1&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		sound-name-prefix = "TwitterLeft";</div><div class='del'>-		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='del'>-		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;swr1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* WCD9385 RX */</div><div class='del'>-	wcd_rx: codec@0,4 {</div><div class='del'>-		compatible = "sdw20217010d00";</div><div class='del'>-		reg = &lt;0 4&gt;;</div><div class='del'>-		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;swr2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* WCD9385 TX */</div><div class='del'>-	wcd_tx: codec@0,3 {</div><div class='del'>-		compatible = "sdw20217010d00";</div><div class='del'>-		reg = &lt;0 3&gt;;</div><div class='del'>-		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;swr3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pinctrl-0 = &lt;&amp;wsa2_swr_active&gt;, &lt;&amp;spkr_23_sd_n_active&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	/* WSA8845, Right Woofer */</div><div class='del'>-	right_woofer: speaker@0,0 {</div><div class='del'>-		compatible = "sdw20217020400";</div><div class='del'>-		reg = &lt;0 0&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		sound-name-prefix = "WooferRight";</div><div class='del'>-		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='del'>-		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* WSA8845, Right Tweeter */</div><div class='del'>-	right_tweeter: speaker@0,1 {</div><div class='del'>-		compatible = "sdw20217020400";</div><div class='del'>-		reg = &lt;0 1&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;lpass_tlmm 13 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		sound-name-prefix = "TwitterRight";</div><div class='del'>-		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='del'>-		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='del'>-		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tlmm {</div><div class='del'>-	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='del'>-			       &lt;44 4&gt;, /* SPI (TPM) */</div><div class='del'>-			       &lt;238 1&gt;; /* UFS Reset */</div><div class='del'>-</div><div class='del'>-	edp_reg_en: edp-reg-en-state {</div><div class='del'>-		pins = "gpio70";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hall_int_n_default: hall-int-n-state {</div><div class='del'>-		pins = "gpio92";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	kybd_default: kybd-default-state {</div><div class='del'>-		pins = "gpio67";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	nvme_reg_en: nvme-reg-en-state {</div><div class='del'>-		pins = "gpio18";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;2&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie4_default: pcie4-default-state {</div><div class='del'>-		clkreq-n-pins {</div><div class='del'>-			pins = "gpio147";</div><div class='del'>-			function = "pcie4_clk";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		perst-n-pins {</div><div class='del'>-			pins = "gpio146";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wake-n-pins {</div><div class='del'>-			pins = "gpio148";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie5_default: pcie5-default-state {</div><div class='del'>-		clkreq-n-pins {</div><div class='del'>-			pins = "gpio150";</div><div class='del'>-			function = "pcie5_clk";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		perst-n-pins {</div><div class='del'>-			pins = "gpio149";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wake-n-pins {</div><div class='del'>-			pins = "gpio151";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie6a_default: pcie6a-default-state {</div><div class='del'>-		clkreq-n-pins {</div><div class='del'>-			pins = "gpio153";</div><div class='del'>-			function = "pcie6a_clk";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		perst-n-pins {</div><div class='del'>-			pins = "gpio152";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wake-n-pins {</div><div class='del'>-			pins = "gpio154";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			drive-strength = &lt;2&gt;;</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tpad_default: tpad-default-state {</div><div class='del'>-		pins = "gpio3";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ts0_default: ts0-default-state {</div><div class='del'>-		int-n-pins {</div><div class='del'>-			pins = "gpio51";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		reset-n-pins {</div><div class='del'>-			pins = "gpio48";</div><div class='del'>-			function = "gpio";</div><div class='del'>-			output-high;</div><div class='del'>-			drive-strength = &lt;16&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wcd_default: wcd-reset-n-active-state {</div><div class='del'>-		pins = "gpio191";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;16&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-		output-low;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wwan_sw_en: wwan-sw-en-state {</div><div class='del'>-		pins = "gpio221";</div><div class='del'>-		function = "gpio";</div><div class='del'>-		drive-strength = &lt;4&gt;;</div><div class='del'>-		bias-disable;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart21 {</div><div class='del'>-	compatible = "qcom,geni-debug-uart";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_hsphy {</div><div class='del'>-	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_dwc3_hs {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss0_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_hsphy {</div><div class='del'>-	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_dwc3_hs {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss1_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2_hsphy {</div><div class='del'>-	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='del'>-	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='del'>-</div><div class='del'>-	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='del'>-	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2_dwc3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2_dwc3_hs {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss2_hs_in&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_1_ss2_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts<br/>new file mode 100644<br/>index 000000000000..cf2a7c262888<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-dell-inspiron-14-plus-7441.dts</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Val Packett &lt;val@packett.cool&gt;</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1-dell-thena.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Dell Inspiron 14 Plus 7441";</div><div class='add'>+	compatible = "dell,inspiron-14-plus-7441", "qcom,x1e80100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	model = "X1E80100-Dell-Inspiron-14p-7441";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/inspiron-14-plus-7441/qcdxkmsuc8380.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/inspiron-14-plus-7441/qcvss8380.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/inspiron-14-plus-7441/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/inspiron-14-plus-7441/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/inspiron-14-plus-7441/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/inspiron-14-plus-7441/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts<br/>new file mode 100644<br/>index 000000000000..32ad9679550e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Val Packett &lt;val@packett.cool&gt;</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1-dell-thena.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Dell Latitude 7455";</div><div class='add'>+	compatible = "dell,latitude-7455", "qcom,x1e80100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	model = "X1E80100-Dell-Latitude-7455";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/latitude-7455/qcdxkmsuc8380.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	/* LXST2021 */</div><div class='add'>+	touchscreen@9 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x09&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/latitude-7455/qcvss8380.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/latitude-7455/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/latitude-7455/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/latitude-7455/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/latitude-7455/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts<br/>new file mode 100644<br/>index 000000000000..58f8caaa7258<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts</a></div><div class='hunk'>@@ -0,0 +1,1373 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Aleksandrs Vinarskis &lt;alex.vinarskis@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Dell XPS 13 9345";</div><div class='add'>+	compatible = "dell,xps13-9345", "qcom,x1e80100";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_indicator_en&gt;;</div><div class='add'>+</div><div class='add'>+		led-camera-indicator {</div><div class='add'>+			label = "white:camera-indicator";</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+			gpios = &lt;&amp;tlmm 110 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			default-state = "off";</div><div class='add'>+			/* Reuse as a panic indicator until we get a "camera on" trigger */</div><div class='add'>+			panic-indicator;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* Right-side USB Type-C port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Left-side USB Type-C port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			size = &lt;0x0 0x8000000&gt;;</div><div class='add'>+			reusable;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p9: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vreg_vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p9: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/x1e80100/dell/xps13-9345/qcdxkmsuc8380.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	keyboard@5 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x5&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;kybd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Right-side USB Type-C port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+	/* EC @0x3b */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* Left-side USB Type-C port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c9 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c17 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchpad@2c {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;tpad_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/xps13-9345/qcvss8380.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			enable-gpios = &lt;&amp;tlmm 74 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/xps13-9345/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/xps13-9345/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/dell/xps13-9345/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/dell/xps13-9345/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;44 4&gt;,  /* SPI11 (TPM) */</div><div class='add'>+			       &lt;76 4&gt;,  /* SPI19 (TZ Protected) */</div><div class='add'>+			       &lt;238 1&gt;; /* UFS Reset */</div><div class='add'>+</div><div class='add'>+	cam_indicator_en: cam-indicator-en-state {</div><div class='add'>+		pins = "gpio110";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio74";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		disable-pins {</div><div class='add'>+			pins = "gpio38";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio3";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio52";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		disable-pins {</div><div class='add'>+			pins = "gpio75";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			/* Technically should be High-Z input */</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-low;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts<br/>new file mode 100644<br/>index 000000000000..4ea00d823693<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-hp-elitebook-ultra-g1q.dts</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1e80100-hp-omnibook-x14.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HP EliteBook Ultra G1q";</div><div class='add'>+	compatible = "hp,elitebook-ultra-g1q", "qcom,x1e80100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	zap-shader {</div><div class='add'>+		firmware-name = "qcom/x1e80100/hp/elitebook-ultra-g1q/qcdxkmsuc8380.mbn";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/hp/elitebook-ultra-g1q/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/hp/elitebook-ultra-g1q/adsp_dtbs.elf";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/hp/elitebook-ultra-g1q/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/hp/elitebook-ultra-g1q/cdsp_dtbs.elf";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sound {</div><div class='add'>+	model = "X1E80100-HP-ELITEBOOK-ULTRA-G1Q";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts<br/>new file mode 100644<br/>index 000000000000..e5a839d45840<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024, Xilin Wu &lt;wuxilin123@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+#include "x1-hp-omnibook-x14.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HP Omnibook X 14-fe0";</div><div class='add'>+	compatible = "hp,omnibook-x14", "qcom,x1e80100";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1e80100/hp/omnibook-x14/qcdxkmsuc8380.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/hp/omnibook-x14/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/hp/omnibook-x14/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1e80100/hp/omnibook-x14/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1e80100/hp/omnibook-x14/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts<br/>index 3c13331a9ef4..e0642fe8343f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x1e80100.dtsi"</div><div class='hunk'>@@ -15,6 +16,30 @@</div><div class='ctx'> 	model = "Lenovo Yoga Slim 7x";</div><div class='ctx'> 	compatible = "lenovo,yoga-slim7x", "qcom,x1e80100";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmic-glink {</div><div class='ctx'> 		compatible = "qcom,x1e80100-pmic-glink",</div><div class='ctx'> 			     "qcom,sm8550-pmic-glink",</div><div class='hunk'>@@ -48,7 +73,15 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss0_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -77,7 +110,15 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss1_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -106,7 +147,15 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss2_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss2_con_sbu_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -128,7 +177,11 @@</div><div class='ctx'> 		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",</div><div class='ctx'> 				"TweeterLeft IN", "WSA WSA_SPK2 OUT",</div><div class='ctx'> 				"WooferRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='del'>-				"TweeterRight IN", "WSA2 WSA_SPK2 OUT";</div><div class='add'>+				"TweeterRight IN", "WSA2 WSA_SPK2 OUT",</div><div class='add'>+				"VA DMIC0", "vdd-micb",</div><div class='add'>+				"VA DMIC1", "vdd-micb",</div><div class='add'>+				"VA DMIC2", "vdd-micb",</div><div class='add'>+				"VA DMIC3", "vdd-micb";</div><div class='ctx'> </div><div class='ctx'> 		wsa-dai-link {</div><div class='ctx'> 			link-name = "WSA Playback";</div><div class='hunk'>@@ -166,17 +219,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vph_pwr: vph-pwr-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-</div><div class='del'>-		regulator-name = "vph_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='hunk'>@@ -205,6 +247,264 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb1_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p15: regulator-rtmr2-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P15";</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 189 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_1p8: regulator-rtmr2-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_1P8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 126 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr2_3p3: regulator-rtmr2-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR2_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 187 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb2_pwr_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: These two regulators are actually part of the removable M.2</div><div class='add'>+	 * card and not the CRD mainboard. Need to describe this differently.</div><div class='add'>+	 * Functionally it works correctly, because all we need to do is to</div><div class='add'>+	 * turn on the actual 3.3V supply above.</div><div class='add'>+	 */</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -264,6 +564,7 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l14b_3p0: ldo14 {</div><div class='hunk'>@@ -278,8 +579,8 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	regulators-1 {</div><div class='hunk'>@@ -482,8 +783,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2j_1p2: ldo2 {</div><div class='ctx'> 			regulator-name = "vreg_l2j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -536,6 +837,178 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK5&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr2_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr2_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr2_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 185 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr2_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		orientation-switch;</div><div class='add'>+		retimer-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss2_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss2_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c8 {</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -553,6 +1026,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;iris {</div><div class='add'>+	firmware-name = "qcom/x1e80100/LENOVO/83ED/qcvss8380.mbn";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpass_tlmm {</div><div class='ctx'> 	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='ctx'> 		pins = "gpio12";</div><div class='hunk'>@@ -583,10 +1061,36 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='hunk'>@@ -605,19 +1109,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='ctx'> </div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp3_phy {</div><div class='hunk'>@@ -649,7 +1147,15 @@</div><div class='ctx'> 		compatible = "pci17cb,1107";</div><div class='ctx'> 		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'> </div><div class='del'>-		qcom,ath12k-calibration-variant = "LES790";</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -672,6 +1178,37 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmc8380_3_gpios {</div><div class='ctx'> 	edp_bl_en: edp-bl-en-state {</div><div class='ctx'> 		pins = "gpio4";</div><div class='hunk'>@@ -682,6 +1219,17 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;qupv3_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -707,11 +1255,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_0_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_1_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='hunk'>@@ -801,6 +1357,28 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		lid-n-pins {</div><div class='add'>+			pins = "gpio92";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Pins 71 and 92 seem to be bridged together (pin 71 and 92 show the same</div><div class='add'>+		 * events). By default, pin 71 is set as output-high, which blocks any</div><div class='add'>+		 * event on pin 92. Output-disable on pin 71 is necessary to get events on</div><div class='add'>+		 * pin 92.</div><div class='add'>+		 * The purpose of pin 71 is not yet known; lid-pull is a supposition.</div><div class='add'>+		 */</div><div class='add'>+		lid-pull-n-pins {</div><div class='add'>+			pins = "gpio71";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			output-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	kybd_default: kybd-default-state {</div><div class='ctx'> 		pins = "gpio67";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -860,6 +1438,20 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	rtmr1_default: rtmr1-reset-n-active-state {</div><div class='add'>+		pins = "gpio176";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr2_default: rtmr2-reset-n-active-state {</div><div class='add'>+		pins = "gpio185";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	tpad_default: tpad-default-state {</div><div class='ctx'> 		pins = "gpio3";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -881,6 +1473,83 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio189";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio126";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio187";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart21 {</div><div class='add'>+	compatible = "qcom,geni-debug-uart";</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_hsphy {</div><div class='hunk'>@@ -893,11 +1562,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='ctx'> </div><div class='del'>-	orientation-switch;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -914,7 +1581,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_hsphy {</div><div class='hunk'>@@ -927,11 +1594,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='ctx'> </div><div class='del'>-	orientation-switch;</div><div class='del'>-</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -948,7 +1613,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss2_hsphy {</div><div class='hunk'>@@ -961,7 +1626,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss2_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -980,5 +1645,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss2_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss2_ss_in&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi<br/>index 42e02ad6a9c3..ed468b93ba50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,6 +22,33 @@</div><div class='ctx'> 		i2c7 = &amp;i2c7;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	backlight: backlight {</div><div class='ctx'> 		compatible = "pwm-backlight";</div><div class='ctx'> 		pwms = &lt;&amp;pmk8550_pwm 0 5000000&gt;;</div><div class='hunk'>@@ -30,6 +59,21 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='hunk'>@@ -80,7 +124,15 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss0_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss0_con_sbu_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -109,7 +161,15 @@</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					pmic_glink_ss1_ss_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_ss_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_con_sbu_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;retimer_ss1_con_sbu_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -125,33 +185,125 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vph_pwr: vph-pwr-regulator {</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='del'>-		regulator-name = "vph_pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='del'>-		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P15";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_1P8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR0_3P3";</div><div class='add'>+</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> </div><div class='del'>-		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio = &lt;&amp;pm8550_gpios 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> </div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P15";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 188 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p15_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_1P8";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 175 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_1p8_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_RTMR1_3P3";</div><div class='add'>+</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 186 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr1_3p3_reg_en&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> </div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	vreg_nvme: regulator-nvme {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='hunk'>@@ -164,6 +316,194 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-Romulus";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "MIC BIAS3",</div><div class='add'>+				"VA DMIC0", "VA MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "VA MIC BIAS3",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;,</div><div class='add'>+					    &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -265,6 +605,7 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13b: ldo13 {</div><div class='hunk'>@@ -286,6 +627,7 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l16b: ldo16 {</div><div class='hunk'>@@ -539,7 +881,58 @@</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* PS8830 USB retimer @8 */</div><div class='add'>+	/* Left-side rear port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;pm8550_gpios 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK3&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr0_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr0_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr0_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtmr0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss0_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss0_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c4 {</div><div class='hunk'>@@ -555,7 +948,17 @@</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* Something @4f */</div><div class='add'>+	ptn3222: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b&gt;;</div><div class='add'>+</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c7 {</div><div class='hunk'>@@ -563,18 +966,101 @@</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* PS8830 USB retimer @8 */</div><div class='add'>+	/* Left-side front port */</div><div class='add'>+	typec-mux@8 {</div><div class='add'>+		compatible = "parade,ps8830";</div><div class='add'>+		reg = &lt;0x8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 176 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rpmhcc RPMH_RF_CLK4&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vdd33-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vdd33-cap-supply = &lt;&amp;vreg_rtmr1_3p3&gt;;</div><div class='add'>+		vddar-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddat-supply = &lt;&amp;vreg_rtmr1_1p15&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_rtmr1_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		retimer-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_ss_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				retimer_ss1_con_sbu_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;pmic_glink_ss1_con_sbu_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> &amp;mdss {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='hunk'>@@ -591,19 +1077,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='ctx'> </div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp3_phy {</div><div class='hunk'>@@ -613,6 +1093,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* The RTS5261 chip on the other side only does Gen1x1 anyway */</div><div class='add'>+	max-link-speed = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3c&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -624,6 +1123,23 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie6a {</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -643,6 +1159,28 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8550_gpios {</div><div class='add'>+	rtmr0_default: rtmr0-reset-n-active-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio11";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_9_gpios {</div><div class='add'>+	rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmc8380_3_gpios {</div><div class='ctx'> 	edp_bl_en: edp-bl-en-state {</div><div class='ctx'> 		pins = "gpio4";</div><div class='hunk'>@@ -653,6 +1191,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmc8380_5_gpios {</div><div class='add'>+	rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmk8550_pwm {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -678,15 +1224,19 @@</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_adsp {</div><div class='ctx'> 	firmware-name = "qcom/x1e80100/microsoft/Romulus/qcadsp8380.mbn",</div><div class='del'>-			"qcom/x1e80100/microsoft/Romulus/adsp_dtb.mbn";</div><div class='add'>+			"qcom/x1e80100/microsoft/Romulus/adsp_dtbs.elf";</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;remoteproc_cdsp {</div><div class='ctx'> 	firmware-name = "qcom/x1e80100/microsoft/Romulus/qccdsp8380.mbn",</div><div class='del'>-			"qcom/x1e80100/microsoft/Romulus/cdsp_dtb.mbn";</div><div class='add'>+			"qcom/x1e80100/microsoft/Romulus/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -695,15 +1245,87 @@</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l2b&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_1_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l14b&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_2_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l8b&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left speaker */</div><div class='add'>+	left_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right speaker */</div><div class='add'>+	right_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tlmm {</div><div class='ctx'> 	gpio-reserved-ranges = &lt;44 4&gt;, /* SPI (TPM) */</div><div class='ctx'> 			       &lt;238 1&gt;; /* UFS Reset */</div><div class='ctx'> </div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio2";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	nvme_reg_en: nvme-reg-en-state {</div><div class='ctx'> 		pins = "gpio18";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -724,6 +1346,36 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3_default: pcie3-default-state {</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio143";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio144";</div><div class='add'>+			function = "pcie3_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio145";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie6a_default: pcie6a-default-state {</div><div class='ctx'> 		perst-n-pins {</div><div class='ctx'> 			pins = "gpio152";</div><div class='hunk'>@@ -747,6 +1399,42 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {</div><div class='add'>+		pins = "gpio175";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio186";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {</div><div class='add'>+		pins = "gpio188";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cam_indicator_en: cam-indicator-en-state {</div><div class='ctx'> 		pins = "gpio225";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -770,6 +1458,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_1_ss0_hsphy {</div><div class='ctx'> 	vdd-supply = &lt;&amp;vreg_l3j&gt;;</div><div class='ctx'> 	vdda12-supply = &lt;&amp;vreg_l2j&gt;;</div><div class='hunk'>@@ -780,7 +1485,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1j&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -799,7 +1504,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss0_ss_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_hsphy {</div><div class='hunk'>@@ -812,7 +1517,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -831,5 +1536,42 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy_out {</div><div class='del'>-	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+	remote-endpoint = &lt;&amp;retimer_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MP0 goes to the Surface Connector, MP1 goes to the USB-A port */</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_2_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;ptn3222&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi<br/>index 5b54ee79f048..621890ada153 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-pmics.dtsi</a></div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pmc8380-6-thermal {</div><div class='add'>+		pmc8380_6_thermal: pmc8380-6-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;100&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;pmc8380_6_temp_alarm&gt;;</div><div class='hunk'>@@ -223,8 +223,8 @@</div><div class='ctx'> 			reg = &lt;0x6100&gt;, &lt;0x6200&gt;;</div><div class='ctx'> 			reg-names = "rtc", "alarm";</div><div class='ctx'> 			interrupts = &lt;0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			/* Not yet sure what blocks access */</div><div class='del'>-			status = "reserved";</div><div class='add'>+			qcom,no-alarm; /* alarm owned by ADSP */</div><div class='add'>+			qcom,uefi-rtc-info;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pmk8550_sdam_2: nvram@7100 {</div><div class='hunk'>@@ -475,6 +475,8 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='ctx'> 		pm8010_temp_alarm: temp-alarm@2400 {</div><div class='ctx'> 			compatible = "qcom,spmi-temp-alarm";</div><div class='ctx'> 			reg = &lt;0x2400&gt;;</div><div class='hunk'>@@ -491,6 +493,8 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='ctx'> 		smb2360_0_eusb2_repeater: phy@fd00 {</div><div class='ctx'> 			compatible = "qcom,smb2360-eusb2-repeater";</div><div class='ctx'> 			reg = &lt;0xfd00&gt;;</div><div class='hunk'>@@ -504,6 +508,8 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='ctx'> 		smb2360_1_eusb2_repeater: phy@fd00 {</div><div class='ctx'> 			compatible = "qcom,smb2360-eusb2-repeater";</div><div class='ctx'> 			reg = &lt;0xfd00&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts<br/>index 1c3a6a7b3ed6..4a9b6d791e7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100-qcp.dts</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wcd938x: audio-codec {</div><div class='hunk'>@@ -84,6 +85,14 @@</div><div class='ctx'> 						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +121,14 @@</div><div class='ctx'> 						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +157,14 @@</div><div class='ctx'> 						remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_out&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss2_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss2_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -253,6 +278,202 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_pcie_12v: regulator-pcie-12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_PCIE_12V";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_x8_12v&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_PCIE_3P3_AUX";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_3_gpios 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;pm_sde7_aux_3p3_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_pcie_3v3: regulator-pcie-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_PCIE_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_3_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;pm_sde7_main_3p3_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+	usb-1-ss0-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 168 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 167 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss1-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 179 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 178 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss2-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 171 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 170 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss2_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss2_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss2_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -354,6 +575,7 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l13b_3p0: ldo13 {</div><div class='hunk'>@@ -375,6 +597,7 @@</div><div class='ctx'> 			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vreg_l16b_2p9: ldo16 {</div><div class='hunk'>@@ -592,8 +815,8 @@</div><div class='ctx'> </div><div class='ctx'> 		vreg_l2j_1p2: ldo2 {</div><div class='ctx'> 			regulator-name = "vreg_l2j_1p2";</div><div class='del'>-			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='ctx'> 			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -614,6 +837,40 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;lpass_tlmm {</div><div class='ctx'> 	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='ctx'> 		pins = "gpio12";</div><div class='hunk'>@@ -628,10 +885,36 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp2_out {</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdss_dp3 {</div><div class='del'>-	compatible = "qcom,x1e80100-dp";</div><div class='ctx'> 	/delete-property/ #sound-dai-cells;</div><div class='ctx'> </div><div class='add'>+	pinctrl-0 = &lt;&amp;edp0_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	aux-bus {</div><div class='hunk'>@@ -646,18 +929,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			mdss_dp3_out: endpoint {</div><div class='del'>-				data-lanes = &lt;0 1 2 3&gt;;</div><div class='del'>-				link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='ctx'> </div><div class='del'>-				remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdss_dp3_phy {</div><div class='hunk'>@@ -667,6 +945,59 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	pcie_x8_12v: pcie-12v-default-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-enable;</div><div class='add'>+		output-high;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {</div><div class='add'>+		pins = "gpio8";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-enable;</div><div class='add'>+		output-high;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pm_sde7_main_3p3_en: pcie-main-3p3-default-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		output-enable;</div><div class='add'>+		output-high;</div><div class='add'>+		bias-pull-down;</div><div class='add'>+		power-source = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_default&gt;;</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 143 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 145 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3_port {</div><div class='add'>+	vpcie12v-supply = &lt;&amp;vreg_pcie_12v&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vreg_pcie_3v3&gt;;</div><div class='add'>+	vpcie3v3aux-supply = &lt;&amp;vreg_pcie_3v3_aux&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie4 {</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -684,6 +1015,23 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie6a {</div><div class='ctx'> 	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -729,11 +1077,32 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 71 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9b_2p9&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6b_1p8&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_0_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;smb2360_1_eusb2_repeater {</div><div class='ctx'> 	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='ctx'> 	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='hunk'>@@ -817,6 +1186,22 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	nvme_reg_en: nvme-reg-en-state {</div><div class='ctx'> 		pins = "gpio18";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -824,6 +1209,29 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pcie3_default: pcie3-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio144";</div><div class='add'>+			function = "pcie3_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio143";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio145";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie4_default: pcie4-default-state {</div><div class='ctx'> 		clkreq-n-pins {</div><div class='ctx'> 			pins = "gpio147";</div><div class='hunk'>@@ -870,6 +1278,86 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sdc2_card_det_n: sdc2-card-det-state {</div><div class='add'>+		pins = "gpio71";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss0_sbu_default: usb-1-ss0-sbu-state {</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio166";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio168";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio167";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio177";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio179";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio178";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss2_sbu_default: usb-1-ss2-sbu-state {</div><div class='add'>+		mode-pins {</div><div class='add'>+			pins = "gpio169";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio171";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio170";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wcd_default: wcd-reset-n-active-state {</div><div class='ctx'> 		pins = "gpio191";</div><div class='ctx'> 		function = "gpio";</div><div class='hunk'>@@ -877,6 +1365,37 @@</div><div class='ctx'> 		bias-disable;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart21 {</div><div class='hunk'>@@ -894,7 +1413,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss0_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -926,7 +1445,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss1_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -958,7 +1477,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_1_ss2_qmpphy {</div><div class='del'>-	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='ctx'> 	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -979,3 +1498,39 @@</div><div class='ctx'> &amp;usb_1_ss2_qmpphy_out {</div><div class='ctx'> 	remote-endpoint = &lt;&amp;pmic_glink_ss2_ss_in&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi<br/>index a36076e3c56b..51576d9c935d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,sc8280xp-lpasscc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/qcom,sm8450-videocc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,x1e80100-dispcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,x1e80100-gcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/qcom,x1e80100-gpucc.h&gt;</div><div class='hunk'>@@ -20,6 +21,7 @@</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -38,7 +40,7 @@</div><div class='ctx'> </div><div class='ctx'> 		sleep_clk: sleep-clk {</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-frequency = &lt;32764&gt;;</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -65,208 +67,208 @@</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		CPU0: cpu@0 {</div><div class='add'>+		cpu0: cpu@0 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x0&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd0&gt;, &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_0: l2-cache {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU1: cpu@100 {</div><div class='add'>+		cpu1: cpu@100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd1&gt;, &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU2: cpu@200 {</div><div class='add'>+		cpu2: cpu@200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD2&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd2&gt;, &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU3: cpu@300 {</div><div class='add'>+		cpu3: cpu@300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD3&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd3&gt;, &lt;&amp;scmi_dvfs 0&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU4: cpu@10000 {</div><div class='add'>+		cpu4: cpu@10000 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x10000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD4&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd4&gt;, &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_1: l2-cache {</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU5: cpu@10100 {</div><div class='add'>+		cpu5: cpu@10100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x10100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD5&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd5&gt;, &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU6: cpu@10200 {</div><div class='add'>+		cpu6: cpu@10200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x10200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD6&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd6&gt;, &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU7: cpu@10300 {</div><div class='add'>+		cpu7: cpu@10300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x10300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD7&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd7&gt;, &lt;&amp;scmi_dvfs 1&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU8: cpu@20000 {</div><div class='add'>+		cpu8: cpu@20000 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x20000&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD8&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd8&gt;, &lt;&amp;scmi_dvfs 2&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> </div><div class='del'>-			L2_2: l2-cache {</div><div class='add'>+			l2_2: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU9: cpu@20100 {</div><div class='add'>+		cpu9: cpu@20100 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x20100&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD9&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd9&gt;, &lt;&amp;scmi_dvfs 2&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU10: cpu@20200 {</div><div class='add'>+		cpu10: cpu@20200 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x20200&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD10&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd10&gt;, &lt;&amp;scmi_dvfs 2&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU11: cpu@20300 {</div><div class='add'>+		cpu11: cpu@20300 {</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "qcom,oryon";</div><div class='ctx'> 			reg = &lt;0x0 0x20300&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			next-level-cache = &lt;&amp;L2_2&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CPU_PD11&gt;;</div><div class='del'>-			power-domain-names = "psci";</div><div class='del'>-			cpu-idle-states = &lt;&amp;CLUSTER_C4&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpu_pd11&gt;, &lt;&amp;scmi_dvfs 2&gt;;</div><div class='add'>+			power-domain-names = "psci", "perf";</div><div class='add'>+			cpu-idle-states = &lt;&amp;cluster_c4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu-map {</div><div class='ctx'> 			cluster0 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU0&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU1&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU2&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU3&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cluster1 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU4&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu4&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU5&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU6&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu6&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU7&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			cluster2 {</div><div class='add'>+			cpu_map_cluster2: cluster2 {</div><div class='ctx'> 				core0 {</div><div class='del'>-					cpu = &lt;&amp;CPU8&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu8&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core1 {</div><div class='del'>-					cpu = &lt;&amp;CPU9&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu9&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core2 {</div><div class='del'>-					cpu = &lt;&amp;CPU10&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu10&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				core3 {</div><div class='del'>-					cpu = &lt;&amp;CPU11&gt;;</div><div class='add'>+					cpu = &lt;&amp;cpu11&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -274,42 +276,68 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CLUSTER_C4: cpu-sleep-0 {</div><div class='add'>+			cluster_c4: cpu-sleep-0 {</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				idle-state-name = "ret";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x00000004&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;180&gt;;</div><div class='del'>-				exit-latency-us = &lt;320&gt;;</div><div class='del'>-				min-residency-us = &lt;1000&gt;;</div><div class='add'>+				exit-latency-us = &lt;500&gt;;</div><div class='add'>+				min-residency-us = &lt;600&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		domain-idle-states {</div><div class='del'>-			CLUSTER_CL4: cluster-sleep-0 {</div><div class='add'>+			cluster_cl4: cluster-sleep-0 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='del'>-				idle-state-name = "l2-ret";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x01000044&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;350&gt;;</div><div class='ctx'> 				exit-latency-us = &lt;500&gt;;</div><div class='ctx'> 				min-residency-us = &lt;2500&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			CLUSTER_CL5: cluster-sleep-1 {</div><div class='add'>+			cluster_cl5: cluster-sleep-1 {</div><div class='ctx'> 				compatible = "domain-idle-state";</div><div class='del'>-				idle-state-name = "ret-pll-off";</div><div class='ctx'> 				arm,psci-suspend-param = &lt;0x01000054&gt;;</div><div class='ctx'> 				entry-latency-us = &lt;2200&gt;;</div><div class='del'>-				exit-latency-us = &lt;2500&gt;;</div><div class='add'>+				exit-latency-us = &lt;4000&gt;;</div><div class='ctx'> 				min-residency-us = &lt;7000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dummy-sink {</div><div class='add'>+		compatible = "arm,coresight-dummy-sink";</div><div class='add'>+</div><div class='add'>+		in-ports {</div><div class='add'>+			port {</div><div class='add'>+				eud_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;swao_rep_out1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	firmware {</div><div class='ctx'> 		scm: scm {</div><div class='ctx'> 			compatible = "qcom,scm-x1e80100", "qcom,scm";</div><div class='ctx'> 			interconnects = &lt;&amp;aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			qcom,dload-mode = &lt;&amp;tcsr 0x19000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "arm,scmi";</div><div class='add'>+			mboxes = &lt;&amp;cpucp_mbox 0&gt;, &lt;&amp;cpucp_mbox 2&gt;;</div><div class='add'>+			mbox-names = "tx", "rx";</div><div class='add'>+			shmem = &lt;&amp;cpu_scp_lpri0&gt;, &lt;&amp;cpu_scp_lpri1&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_dvfs: protocol@13 {</div><div class='add'>+				reg = &lt;0x13&gt;;</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -340,85 +368,85 @@</div><div class='ctx'> 		compatible = "arm,psci-1.0";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> </div><div class='del'>-		CPU_PD0: power-domain-cpu0 {</div><div class='add'>+		cpu_pd0: power-domain-cpu0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD1: power-domain-cpu1 {</div><div class='add'>+		cpu_pd1: power-domain-cpu1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD2: power-domain-cpu2 {</div><div class='add'>+		cpu_pd2: power-domain-cpu2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD3: power-domain-cpu3 {</div><div class='add'>+		cpu_pd3: power-domain-cpu3 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD4: power-domain-cpu4 {</div><div class='add'>+		cpu_pd4: power-domain-cpu4 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD5: power-domain-cpu5 {</div><div class='add'>+		cpu_pd5: power-domain-cpu5 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD6: power-domain-cpu6 {</div><div class='add'>+		cpu_pd6: power-domain-cpu6 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD7: power-domain-cpu7 {</div><div class='add'>+		cpu_pd7: power-domain-cpu7 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD8: power-domain-cpu8 {</div><div class='add'>+		cpu_pd8: power-domain-cpu8 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD9: power-domain-cpu9 {</div><div class='add'>+		cpu_pd9: power-domain-cpu9 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD10: power-domain-cpu10 {</div><div class='add'>+		cpu_pd10: power-domain-cpu10 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CPU_PD11: power-domain-cpu11 {</div><div class='add'>+		cpu_pd11: power-domain-cpu11 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			power-domains = &lt;&amp;CLUSTER_PD2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD0: power-domain-cpu-cluster0 {</div><div class='add'>+		cluster_pd0: power-domain-cpu-cluster0 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_CL4&gt;, &lt;&amp;CLUSTER_CL5&gt;;</div><div class='del'>-			power-domains = &lt;&amp;SYSTEM_PD&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_cl4&gt;, &lt;&amp;cluster_cl5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD1: power-domain-cpu-cluster1 {</div><div class='add'>+		cluster_pd1: power-domain-cpu-cluster1 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_CL4&gt;, &lt;&amp;CLUSTER_CL5&gt;;</div><div class='del'>-			power-domains = &lt;&amp;SYSTEM_PD&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_cl4&gt;, &lt;&amp;cluster_cl5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		CLUSTER_PD2: power-domain-cpu-cluster2 {</div><div class='add'>+		cluster_pd2: power-domain-cpu-cluster2 {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='del'>-			domain-idle-states = &lt;&amp;CLUSTER_CL4&gt;, &lt;&amp;CLUSTER_CL5&gt;;</div><div class='del'>-			power-domains = &lt;&amp;SYSTEM_PD&gt;;</div><div class='add'>+			domain-idle-states = &lt;&amp;cluster_cl4&gt;, &lt;&amp;cluster_cl5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		SYSTEM_PD: power-domain-system {</div><div class='add'>+		system_pd: power-domain-system {</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			/* TODO: system-wide idle states */</div><div class='ctx'> 		};</div><div class='hunk'>@@ -678,6 +706,34 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qup_opp_table_100mhz: opp-table-qup100mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qup_opp_table_120mhz: opp-table-qup120mhz {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-75000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;75000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-120000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;120000000&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	smp2p-adsp {</div><div class='ctx'> 		compatible = "qcom,smp2p";</div><div class='ctx'> </div><div class='hunk'>@@ -744,7 +800,7 @@</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;bi_tcxo_div2&gt;,</div><div class='ctx'> 				 &lt;&amp;sleep_clk&gt;,</div><div class='del'>-				 &lt;0&gt;,</div><div class='add'>+				 &lt;&amp;pcie3_phy&gt;,</div><div class='ctx'> 				 &lt;&amp;pcie4_phy&gt;,</div><div class='ctx'> 				 &lt;&amp;pcie5_phy&gt;,</div><div class='ctx'> 				 &lt;&amp;pcie6a_phy&gt;,</div><div class='hunk'>@@ -824,14 +880,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -857,14 +916,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -890,14 +952,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -923,14 +988,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -956,14 +1024,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -989,14 +1060,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1022,14 +1096,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1055,14 +1132,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1088,14 +1168,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1121,14 +1204,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1154,14 +1240,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1187,14 +1276,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1220,11 +1312,14 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart21_default&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -1242,14 +1337,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1275,14 +1373,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 6 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 6 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1308,14 +1409,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1341,14 +1445,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma2 0 7 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma2 1 7 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1418,14 +1525,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1451,14 +1561,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1484,14 +1597,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1517,14 +1633,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1550,14 +1669,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1583,14 +1705,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1616,14 +1741,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1649,14 +1777,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1682,14 +1813,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1715,14 +1849,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1748,14 +1885,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1781,14 +1921,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1814,14 +1957,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1847,14 +1993,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 6 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 6 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1869,6 +2018,31 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			uart14: serial@a98000 {</div><div class='add'>+				compatible = "qcom,geni-uart";</div><div class='add'>+				reg = &lt;0 0x00a98000 0 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				interrupts = &lt;GIC_SPI 806 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;gcc GCC_QUPV3_WRAP1_S6_CLK&gt;;</div><div class='add'>+				clock-names = "se";</div><div class='add'>+</div><div class='add'>+				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+				interconnect-names = "qup-core",</div><div class='add'>+						     "qup-config";</div><div class='add'>+</div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='add'>+				pinctrl-0 = &lt;&amp;qup_uart14_default&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			i2c15: i2c@a9c000 {</div><div class='ctx'> 				compatible = "qcom,geni-i2c";</div><div class='ctx'> 				reg = &lt;0 0x00a9c000 0 0x4000&gt;;</div><div class='hunk'>@@ -1880,14 +2054,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1913,14 +2090,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma1 0 7 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma1 1 7 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -1989,14 +2169,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2022,14 +2205,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 0 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 0 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2055,14 +2241,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2088,14 +2277,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_120mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2121,14 +2313,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2154,11 +2349,14 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;qup_uart2_default&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -2176,14 +2374,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 2 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 2 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2209,14 +2410,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2242,14 +2446,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 3 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 3 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2275,14 +2482,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2308,14 +2518,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 4 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 4 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2341,14 +2554,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2374,14 +2590,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 5 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 5 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2407,14 +2626,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2440,14 +2662,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 6 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 6 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2473,14 +2698,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 7 QCOM_GPI_I2C&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 7 QCOM_GPI_I2C&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2506,14 +2734,17 @@</div><div class='ctx'> </div><div class='ctx'> 				interconnects = &lt;&amp;clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+						&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+						 &amp;config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='ctx'> 						&lt;&amp;aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 						 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='ctx'> 				interconnect-names = "qup-core",</div><div class='ctx'> 						     "qup-config",</div><div class='ctx'> 						     "qup-memory";</div><div class='ctx'> </div><div class='add'>+				power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+				operating-points-v2 = &lt;&amp;qup_opp_table_100mhz&gt;;</div><div class='add'>+</div><div class='ctx'> 				dmas = &lt;&amp;gpi_dma0 0 7 QCOM_GPI_SPI&gt;,</div><div class='ctx'> 				       &lt;&amp;gpi_dma0 1 7 QCOM_GPI_SPI&gt;;</div><div class='ctx'> 				dma-names = "tx",</div><div class='hunk'>@@ -2626,6 +2857,7 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			mode-switch;</div><div class='ctx'> 			orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2696,6 +2928,7 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			mode-switch;</div><div class='ctx'> 			orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2766,6 +2999,7 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+			mode-switch;</div><div class='ctx'> 			orientation-switch;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2907,6 +3141,223 @@</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie3: pcie@1bd0000 {</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			compatible = "qcom,pcie-x1e80100";</div><div class='add'>+			reg = &lt;0x0 0x01bd0000 0x0 0x3000&gt;,</div><div class='add'>+			      &lt;0x0 0x78000000 0x0 0xf20&gt;,</div><div class='add'>+			      &lt;0x0 0x78000f40 0x0 0xa8&gt;,</div><div class='add'>+			      &lt;0x0 0x78001000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x78100000 0x0 0x100000&gt;,</div><div class='add'>+			      &lt;0x0 0x01bd3000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "parf",</div><div class='add'>+				    "dbi",</div><div class='add'>+				    "elbi",</div><div class='add'>+				    "atu",</div><div class='add'>+				    "config",</div><div class='add'>+				    "mhi";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x78200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x78300000 0x0 0x78300000 0x0 0x3d00000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x7 0x40000000 0x7 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			linux,pci-domain = &lt;3&gt;;</div><div class='add'>+			num-lanes = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 671 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi0",</div><div class='add'>+					  "msi1",</div><div class='add'>+					  "msi2",</div><div class='add'>+					  "msi3",</div><div class='add'>+					  "msi4",</div><div class='add'>+					  "msi5",</div><div class='add'>+					  "msi6",</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='add'>+</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_3_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_MSTR_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_SLV_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CFG_NOC_PCIE_ANOC_NORTH_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_CNOC_PCIE_NORTH_SF_AXI_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg",</div><div class='add'>+				      "bus_master",</div><div class='add'>+				      "bus_slave",</div><div class='add'>+				      "slave_q2a",</div><div class='add'>+				      "noc_aggr",</div><div class='add'>+				      "cnoc_sf_axi";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_3_AUX_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;pcie_north_anoc MASTER_PCIE_3 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_3 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "pcie-mem",</div><div class='add'>+					     "cpu-pcie";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_3_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_LINK_DOWN_BCR&gt;;</div><div class='add'>+			reset-names = "pci",</div><div class='add'>+				      "link_down";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_PCIE_3_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			phys = &lt;&amp;pcie3_phy&gt;;</div><div class='add'>+			phy-names = "pciephy";</div><div class='add'>+</div><div class='add'>+			eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555 0x5555 0x5555</div><div class='add'>+						     0x5555 0x5555 0x5555 0x5555&gt;;</div><div class='add'>+			eq-presets-16gts = /bits/ 8 &lt;0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;pcie3_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie3_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x1 */</div><div class='add'>+				opp-2500000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;2500000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;250000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x2 and GEN 2 x1 */</div><div class='add'>+				opp-5000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;5000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;500000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x4 and GEN 2 x2 */</div><div class='add'>+				opp-10000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;10000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 1 x8 and GEN 2 x4 */</div><div class='add'>+				opp-20000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;20000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;2000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 2 x8 */</div><div class='add'>+				opp-40000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;40000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;4000000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x1 */</div><div class='add'>+				opp-8000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;8000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;984500 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x2 and GEN 4 x1 */</div><div class='add'>+				opp-16000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;16000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;1969000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x4 and GEN 4 x2 */</div><div class='add'>+				opp-32000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;32000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;3938000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 3 x8 and GEN 4 x4 */</div><div class='add'>+				opp-64000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;64000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;7876000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* GEN 4 x8 */</div><div class='add'>+				opp-128000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;128000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;15753000 1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie3_port: pcie@0 {</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				compatible = "pciclass,0604";</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_phy: phy@1be0000 {</div><div class='add'>+			compatible = "qcom,x1e80100-qmp-gen4x8-pcie-phy";</div><div class='add'>+			reg = &lt;0 0x01be0000 0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_PCIE_3_PHY_AUX_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_CFG_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_8L_CLKREF_EN&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_PHY_RCHNG_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_PIPEDIV2_CLK&gt;;</div><div class='add'>+			clock-names = "aux",</div><div class='add'>+				      "cfg_ahb",</div><div class='add'>+				      "ref",</div><div class='add'>+				      "rchng",</div><div class='add'>+				      "pipe",</div><div class='add'>+				      "pipediv2";</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_3_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_3_NOCSR_COM_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "phy_nocsr";</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;gcc GCC_PCIE_3_PHY_RCHNG_CLK&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;gcc GCC_PCIE_3_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			clock-output-names = "pcie3_pipe_clk";</div><div class='add'>+</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie6a: pci@1bf8000 {</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			compatible = "qcom,pcie-x1e80100";</div><div class='hunk'>@@ -2924,14 +3375,16 @@</div><div class='ctx'> 				    "mhi";</div><div class='ctx'> 			#address-cells = &lt;3&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges = &lt;0x01000000 0 0x00000000 0 0x70200000 0 0x100000&gt;,</div><div class='del'>-				 &lt;0x02000000 0 0x70300000 0 0x70300000 0 0x3d00000&gt;;</div><div class='del'>-			bus-range = &lt;0 0xff&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x3d00000&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='ctx'> </div><div class='ctx'> 			dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 			linux,pci-domain = &lt;6&gt;;</div><div class='del'>-			num-lanes = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0xe0000 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -2940,7 +3393,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 672 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -2948,14 +3402,15 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 843 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 844 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 845 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 772 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 843 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 845 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_6A_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_6A_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -2977,8 +3432,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;pcie_south_anoc MASTER_PCIE_6A QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;cnoc_main SLAVE_PCIE_6A QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_6A QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem",</div><div class='ctx'> 					     "cpu-pcie";</div><div class='ctx'> </div><div class='hunk'>@@ -2993,23 +3448,29 @@</div><div class='ctx'> 			phys = &lt;&amp;pcie6a_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+			eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555 0x5555 0x5555&gt;;</div><div class='add'>+			eq-presets-16gts = /bits/ 8 &lt;0x55 0x55 0x55 0x55&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pcie6a_phy: phy@1bfc000 {</div><div class='del'>-			compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy";</div><div class='del'>-			reg = &lt;0 0x01bfc000 0 0x2000&gt;;</div><div class='add'>+			compatible = "qcom,x1e80100-qmp-gen4x4-pcie-phy";</div><div class='add'>+			reg = &lt;0 0x01bfc000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x01bfe000 0 0x2000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_6A_PHY_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_6A_CFG_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_4L_CLKREF_EN&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_6A_PHY_RCHNG_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_6A_PIPE_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_6A_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_6A_PIPEDIV2_CLK&gt;;</div><div class='ctx'> 			clock-names = "aux",</div><div class='ctx'> 				      "cfg_ahb",</div><div class='ctx'> 				      "ref",</div><div class='ctx'> 				      "rchng",</div><div class='del'>-				      "pipe";</div><div class='add'>+				      "pipe",</div><div class='add'>+				      "pipediv2";</div><div class='ctx'> </div><div class='ctx'> 			resets = &lt;&amp;gcc GCC_PCIE_6A_PHY_BCR&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_6A_NOCSR_COM_PHY_BCR&gt;;</div><div class='hunk'>@@ -3021,6 +3482,8 @@</div><div class='ctx'> </div><div class='ctx'> 			power-domains = &lt;&amp;gcc GCC_PCIE_6_PHY_GDSC&gt;;</div><div class='ctx'> </div><div class='add'>+			qcom,4ln-config-sel = &lt;&amp;tcsr 0x1a000 0&gt;;</div><div class='add'>+</div><div class='ctx'> 			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 			clock-output-names = "pcie6a_pipe_clk";</div><div class='ctx'> </div><div class='hunk'>@@ -3062,7 +3525,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -3070,14 +3534,15 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_5_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_5_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -3097,10 +3562,10 @@</div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_5_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+			interconnects = &lt;&amp;pcie_north_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem",</div><div class='ctx'> 					     "cpu-pcie";</div><div class='ctx'> </div><div class='hunk'>@@ -3115,6 +3580,8 @@</div><div class='ctx'> 			phys = &lt;&amp;pcie5_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+			eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -3124,17 +3591,21 @@</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_5_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_5_CFG_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_2L_5_CLKREF_EN&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_5_PHY_RCHNG_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_5_PIPE_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_5_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_5_PIPEDIV2_CLK&gt;;</div><div class='ctx'> 			clock-names = "aux",</div><div class='ctx'> 				      "cfg_ahb",</div><div class='ctx'> 				      "ref",</div><div class='ctx'> 				      "rchng",</div><div class='del'>-				      "pipe";</div><div class='add'>+				      "pipe",</div><div class='add'>+				      "pipediv2";</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;gcc GCC_PCIE_5_PHY_BCR&gt;;</div><div class='del'>-			reset-names = "phy";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_5_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_5_NOCSR_COM_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "phy_nocsr";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_5_PHY_RCHNG_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;100000000&gt;;</div><div class='hunk'>@@ -3166,8 +3637,8 @@</div><div class='ctx'> 				    "mhi";</div><div class='ctx'> 			#address-cells = &lt;3&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges = &lt;0x01000000 0 0x00000000 0 0x7c200000 0 0x100000&gt;,</div><div class='del'>-				 &lt;0x02000000 0 0x7c300000 0 0x7c300000 0 0x3d00000&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x00000000 0x0 0x7c200000 0x0 0x100000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0 0x7c300000 0x0 0x7c300000 0x0 0x1d00000&gt;;</div><div class='ctx'> 			bus-range = &lt;0x00 0xff&gt;;</div><div class='ctx'> </div><div class='ctx'> 			dma-coherent;</div><div class='hunk'>@@ -3175,6 +3646,8 @@</div><div class='ctx'> 			linux,pci-domain = &lt;4&gt;;</div><div class='ctx'> 			num-lanes = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			msi-map = &lt;0x0 &amp;gic_its 0xc0000 0x10000&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -3182,7 +3655,8 @@</div><div class='ctx'> 				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "msi0",</div><div class='ctx'> 					  "msi1",</div><div class='ctx'> 					  "msi2",</div><div class='hunk'>@@ -3190,14 +3664,15 @@</div><div class='ctx'> 					  "msi4",</div><div class='ctx'> 					  "msi5",</div><div class='ctx'> 					  "msi6",</div><div class='del'>-					  "msi7";</div><div class='add'>+					  "msi7",</div><div class='add'>+					  "global";</div><div class='ctx'> </div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 2 &amp;intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 3 &amp;intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					&lt;0 0 0 4 &amp;intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_4_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_4_CFG_AHB_CLK&gt;,</div><div class='hunk'>@@ -3217,10 +3692,10 @@</div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_4_AUX_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;;</div><div class='ctx'> </div><div class='del'>-			interconnects = &lt;&amp;pcie_south_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+			interconnects = &lt;&amp;pcie_north_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "pcie-mem",</div><div class='ctx'> 					     "cpu-pcie";</div><div class='ctx'> </div><div class='hunk'>@@ -3235,6 +3710,8 @@</div><div class='ctx'> 			phys = &lt;&amp;pcie4_phy&gt;;</div><div class='ctx'> 			phy-names = "pciephy";</div><div class='ctx'> </div><div class='add'>+			eq-presets-8gts = /bits/ 16 &lt;0x5555 0x5555&gt;;</div><div class='add'>+</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			pcie4_port0: pcie@0 {</div><div class='hunk'>@@ -3254,17 +3731,21 @@</div><div class='ctx'> </div><div class='ctx'> 			clocks = &lt;&amp;gcc GCC_PCIE_4_AUX_CLK&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_4_CFG_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+				 &lt;&amp;tcsr TCSR_PCIE_2L_4_CLKREF_EN&gt;,</div><div class='ctx'> 				 &lt;&amp;gcc GCC_PCIE_4_PHY_RCHNG_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_PCIE_4_PIPE_CLK&gt;;</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_4_PIPE_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_4_PIPEDIV2_CLK&gt;;</div><div class='ctx'> 			clock-names = "aux",</div><div class='ctx'> 				      "cfg_ahb",</div><div class='ctx'> 				      "ref",</div><div class='ctx'> 				      "rchng",</div><div class='del'>-				      "pipe";</div><div class='add'>+				      "pipe",</div><div class='add'>+				      "pipediv2";</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;gcc GCC_PCIE_4_PHY_BCR&gt;;</div><div class='del'>-			reset-names = "phy";</div><div class='add'>+			resets = &lt;&amp;gcc GCC_PCIE_4_PHY_BCR&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_PCIE_4_NOCSR_COM_PHY_BCR&gt;;</div><div class='add'>+			reset-names = "phy",</div><div class='add'>+				      "phy_nocsr";</div><div class='ctx'> </div><div class='ctx'> 			assigned-clocks = &lt;&amp;gcc GCC_PCIE_4_PHY_RCHNG_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;100000000&gt;;</div><div class='hunk'>@@ -3313,70 +3794,141 @@</div><div class='ctx'> 			qcom,gmu = &lt;&amp;gmu&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+			nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='add'>+			nvmem-cell-names = "speed_bin";</div><div class='add'>+</div><div class='ctx'> 			interconnects = &lt;&amp;gem_noc MASTER_GFX3D 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='ctx'> 			interconnect-names = "gfx-mem";</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='del'>-			zap-shader {</div><div class='add'>+			gpu_zap_shader: zap-shader {</div><div class='ctx'> 				memory-region = &lt;&amp;gpu_microcode_mem&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpu_opp_table: opp-table {</div><div class='del'>-				compatible = "operating-points-v2";</div><div class='add'>+				compatible = "operating-points-v2-adreno", "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-1500000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1500000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L5&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x03&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1375000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1375000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L4&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x03&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1250000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1250000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L3&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x07&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1175000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1175000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x07&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1100000000-0 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1100000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x07&gt;;</div><div class='add'>+				};</div><div class='ctx'> </div><div class='del'>-				opp-1100000000 {</div><div class='add'>+				/* Only applicable for SKUs which has 1100Mhz as Fmax */</div><div class='add'>+				opp-1100000000-1 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1100000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x08&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-1000000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82b5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-925000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;925000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82b5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-800000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;12449219&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82c5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-744000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;744000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;10687500&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				opp-687000000 {</div><div class='add'>+				opp-687000000-0 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;687000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x0f&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* Only applicable for SKUs which has 687Mhz as Fmax */</div><div class='add'>+				opp-687000000-1 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;687000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x10&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-550000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;6074219&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-390000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;390000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;3000000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-300000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;2136719&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc02b5ffd&gt;;</div><div class='add'>+					opp-supported-hw = &lt;0x1f&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -3386,7 +3938,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0x03d6a000 0x0 0x35000&gt;,</div><div class='ctx'> 			      &lt;0x0 0x03d50000 0x0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x0 0x0b280000 0x0 0x10000&gt;;</div><div class='del'>-			reg-names =  "gmu", "rscc", "gmu_pdc";</div><div class='add'>+			reg-names = "gmu", "rscc", "gmu_pdc";</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -3506,6 +4058,143 @@</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		remoteproc_adsp: remoteproc@6800000 {</div><div class='add'>+			compatible = "qcom,x1e80100-adsp-pas";</div><div class='add'>+			reg = &lt;0x0 0x06800000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "wdog",</div><div class='add'>+					  "fatal",</div><div class='add'>+					  "ready",</div><div class='add'>+					  "handover",</div><div class='add'>+					  "stop-ack";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "xo";</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='add'>+			power-domain-names = "lcx",</div><div class='add'>+					     "lmx";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;adspslpi_mem&gt;,</div><div class='add'>+					&lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+			qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			glink-edge {</div><div class='add'>+				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+				label = "lpass";</div><div class='add'>+				qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+				fastrpc {</div><div class='add'>+					compatible = "qcom,fastrpc";</div><div class='add'>+					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+					label = "adsp";</div><div class='add'>+					qcom,non-secure-domain;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					compute-cb@3 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;3&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1063 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@4 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;4&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1064 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@5 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;5&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1065 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@6 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;6&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1066 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					compute-cb@7 {</div><div class='add'>+						compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+						reg = &lt;7&gt;;</div><div class='add'>+						iommus = &lt;&amp;apps_smmu 0x1007 0x80&gt;,</div><div class='add'>+							 &lt;&amp;apps_smmu 0x1067 0x0&gt;;</div><div class='add'>+						dma-coherent;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpr {</div><div class='add'>+					compatible = "qcom,gpr";</div><div class='add'>+					qcom,glink-channels = "adsp_apps";</div><div class='add'>+					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+					qcom,intents = &lt;512 20&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					q6apm: service@1 {</div><div class='add'>+						compatible = "qcom,q6apm";</div><div class='add'>+						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+						#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6apmbedai: bedais {</div><div class='add'>+							compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+							#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						q6apmdai: dais {</div><div class='add'>+							compatible = "qcom,q6apm-dais";</div><div class='add'>+							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='add'>+								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					q6prm: service@2 {</div><div class='add'>+						compatible = "qcom,q6prm";</div><div class='add'>+						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+						qcom,protection-domain = "avs/audio",</div><div class='add'>+									 "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+						q6prmcc: clock-controller {</div><div class='add'>+							compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+							#clock-cells = &lt;2&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		lpass_wsa2macro: codec@6aa0000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";</div><div class='ctx'> 			reg = &lt;0 0x06aa0000 0 0x1000&gt;;</div><div class='hunk'>@@ -3880,6 +4569,112 @@</div><div class='ctx'> 			#interconnect-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdhc_2: mmc@8804000 {</div><div class='add'>+			compatible = "qcom,x1e80100-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x520 0&gt;;</div><div class='add'>+			qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc2_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr", "cpu-sdhc";</div><div class='add'>+			bus-width = &lt;4&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc2_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-19200000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;19200000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_min_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-202000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;202000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhc_4: mmc@8844000 {</div><div class='add'>+			compatible = "qcom,x1e80100-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+			reg = &lt;0 0x08844000 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_SDCC4_AHB_CLK&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_SDCC4_APPS_CLK&gt;,</div><div class='add'>+				 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+			clock-names = "iface", "core", "xo";</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x160 0&gt;;</div><div class='add'>+			qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='add'>+			qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_CX&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;sdhc4_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;aggre2_noc MASTER_SDCC_4 QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_SDCC_4 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+			interconnect-names = "sdhc-ddr", "cpu-sdhc";</div><div class='add'>+			bus-width = &lt;4&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhc4_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-19200000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;19200000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_min_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-50000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-100000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-202000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;202000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usb_2_hsphy: phy@88e0000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-snps-eusb2-phy",</div><div class='ctx'> 				     "qcom,sm8550-snps-eusb2-phy";</div><div class='hunk'>@@ -4022,8 +4817,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;usb_south_anoc MASTER_USB3_2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_USB3_2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr",</div><div class='ctx'> 					     "apps-usb";</div><div class='ctx'> </div><div class='hunk'>@@ -4051,6 +4846,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				dma-coherent;</div><div class='ctx'> </div><div class='hunk'>@@ -4106,7 +4903,7 @@</div><div class='ctx'> 					  &lt;&amp;gcc GCC_USB20_MASTER_CLK&gt;;</div><div class='ctx'> 			assigned-clock-rates = &lt;19200000&gt;, &lt;200000000&gt;;</div><div class='ctx'> </div><div class='del'>-			interrupts-extended = &lt;&amp;intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			interrupts-extended = &lt;&amp;intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 50 IRQ_TYPE_EDGE_BOTH&gt;,</div><div class='ctx'> 					      &lt;&amp;pdc 49 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='ctx'> 			interrupt-names = "pwr_event",</div><div class='hunk'>@@ -4120,8 +4917,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;usb_north_anoc MASTER_USB2 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_USB2 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB2 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr",</div><div class='ctx'> 					     "apps-usb";</div><div class='ctx'> </div><div class='hunk'>@@ -4132,11 +4929,15 @@</div><div class='ctx'> 			usb_2_dwc3: usb@a200000 {</div><div class='ctx'> 				compatible = "snps,dwc3";</div><div class='ctx'> 				reg = &lt;0 0x0a200000 0 0xcd00&gt;;</div><div class='del'>-				interrupts = &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				iommus = &lt;&amp;apps_smmu 0x14e0 0x0&gt;;</div><div class='ctx'> 				phys = &lt;&amp;usb_2_hsphy&gt;;</div><div class='ctx'> 				phy-names = "usb2-phy";</div><div class='ctx'> 				maximum-speed = "high-speed";</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='add'>+</div><div class='add'>+				dma-coherent;</div><div class='ctx'> </div><div class='ctx'> 				ports {</div><div class='ctx'> 					#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -4203,8 +5004,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;usb_north_anoc MASTER_USB3_MP QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_USB3_MP QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_MP QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr",</div><div class='ctx'> 					     "apps-usb";</div><div class='ctx'> </div><div class='hunk'>@@ -4233,6 +5034,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				dma-coherent;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -4304,6 +5107,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				dma-coherent;</div><div class='ctx'> </div><div class='hunk'>@@ -4373,8 +5178,8 @@</div><div class='ctx'> </div><div class='ctx'> 			interconnects = &lt;&amp;usb_south_anoc MASTER_USB3_1 QCOM_ICC_TAG_ALWAYS</div><div class='ctx'> 					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='del'>-					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;config_noc SLAVE_USB3_1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+					&lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_USB3_1 QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> 			interconnect-names = "usb-ddr",</div><div class='ctx'> 					     "apps-usb";</div><div class='ctx'> </div><div class='hunk'>@@ -4402,6 +5207,8 @@</div><div class='ctx'> 				snps,dis_u2_susphy_quirk;</div><div class='ctx'> 				snps,dis_enblslpm_quirk;</div><div class='ctx'> 				snps,usb3_lpm_capable;</div><div class='add'>+				snps,dis-u1-entry-quirk;</div><div class='add'>+				snps,dis-u2-entry-quirk;</div><div class='ctx'> </div><div class='ctx'> 				dma-coherent;</div><div class='ctx'> </div><div class='hunk'>@@ -4427,6 +5234,107 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		iris: video-codec@aa00000 {</div><div class='add'>+			compatible = "qcom,x1e80100-iris", "qcom,sm8550-iris";</div><div class='add'>+</div><div class='add'>+			reg = &lt;0 0x0aa00000 0 0xf0000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			power-domains = &lt;&amp;videocc VIDEO_CC_MVS0C_GDSC&gt;,</div><div class='add'>+					&lt;&amp;videocc VIDEO_CC_MVS0_GDSC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+			power-domain-names = "venus",</div><div class='add'>+					     "vcodec0",</div><div class='add'>+					     "mxc",</div><div class='add'>+					     "mmcx";</div><div class='add'>+			operating-points-v2 = &lt;&amp;iris_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+				 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+			clock-names = "iface",</div><div class='add'>+				      "core",</div><div class='add'>+				      "vcodec0_core";</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+					&lt;&amp;mmss_noc MASTER_VIDEO QCOM_ICC_TAG_ALWAYS</div><div class='add'>+					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+			interconnect-names = "cpu-cfg",</div><div class='add'>+					     "video-mem";</div><div class='add'>+</div><div class='add'>+			memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;;</div><div class='add'>+			reset-names = "bus";</div><div class='add'>+</div><div class='add'>+			iommus = &lt;&amp;apps_smmu 0x1940 0&gt;,</div><div class='add'>+				 &lt;&amp;apps_smmu 0x1947 0&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * IRIS firmware is signed by vendors, only</div><div class='add'>+			 * enable on boards where the proper signed firmware</div><div class='add'>+			 * is available.</div><div class='add'>+			 */</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			iris_opp_table: opp-table {</div><div class='add'>+				compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-192000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;192000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-240000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;240000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-338000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;338000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-366000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;366000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-444000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;444000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_nom&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-481000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;481000000&gt;;</div><div class='add'>+					required-opps = &lt;&amp;rpmhpd_opp_turbo&gt;,</div><div class='add'>+							&lt;&amp;rpmhpd_opp_turbo&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		videocc: clock-controller@aaf0000 {</div><div class='add'>+			compatible = "qcom,x1e80100-videocc";</div><div class='add'>+			reg = &lt;0 0x0aaf0000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;bi_tcxo_div2&gt;,</div><div class='add'>+				 &lt;&amp;gcc GCC_VIDEO_AHB_CLK&gt;;</div><div class='add'>+			power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd RPMHPD_MXC&gt;;</div><div class='add'>+			required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;,</div><div class='add'>+					&lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		mdss: display-subsystem@ae00000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-mdss";</div><div class='ctx'> 			reg = &lt;0 0x0ae00000 0 0x1000&gt;;</div><div class='hunk'>@@ -4568,16 +5476,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dp0_opp_table&gt;;</div><div class='hunk'>@@ -4607,6 +5519,7 @@</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 						mdss_dp0_out: endpoint {</div><div class='add'>+							data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -4651,16 +5564,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_ss1_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dp1_opp_table&gt;;</div><div class='hunk'>@@ -4690,6 +5607,7 @@</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 						mdss_dp1_out: endpoint {</div><div class='add'>+							data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -4734,16 +5652,20 @@</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_AUX_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_LINK_CLK&gt;,</div><div class='ctx'> 					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_LINK_INTF_CLK&gt;,</div><div class='del'>-					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;;</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK&gt;,</div><div class='add'>+					 &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK&gt;;</div><div class='ctx'> 				clock-names = "core_iface",</div><div class='ctx'> 					      "core_aux",</div><div class='ctx'> 					      "ctrl_link",</div><div class='ctx'> 					      "ctrl_link_iface",</div><div class='del'>-					      "stream_pixel";</div><div class='add'>+					      "stream_pixel",</div><div class='add'>+					      "stream_1_pixel";</div><div class='ctx'> </div><div class='ctx'> 				assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_LINK_CLK_SRC&gt;,</div><div class='del'>-						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;;</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC&gt;,</div><div class='add'>+						  &lt;&amp;dispcc DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC&gt;;</div><div class='ctx'> 				assigned-clock-parents = &lt;&amp;usb_1_ss2_qmpphy QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+							 &lt;&amp;usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;,</div><div class='ctx'> 							 &lt;&amp;usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='ctx'> </div><div class='ctx'> 				operating-points-v2 = &lt;&amp;mdss_dp2_opp_table&gt;;</div><div class='hunk'>@@ -4772,6 +5694,7 @@</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 						mdss_dp2_out: endpoint {</div><div class='add'>+							data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'> 							remote-endpoint = &lt;&amp;usb_1_ss2_qmpphy_dp_in&gt;;</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='hunk'>@@ -4853,6 +5776,9 @@</div><div class='ctx'> </div><div class='ctx'> 					port@1 {</div><div class='ctx'> 						reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+						mdss_dp3_out: endpoint {</div><div class='add'>+						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='hunk'>@@ -5035,6 +5961,12 @@</div><div class='ctx'> 			gpio-ranges = &lt;&amp;tlmm 0 0 239&gt;;</div><div class='ctx'> 			wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='ctx'> </div><div class='add'>+			edp0_hpd_default: edp0-hpd-default-state {</div><div class='add'>+				pins = "gpio119";</div><div class='add'>+				function = "edp0_hot";</div><div class='add'>+				bias-disable;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			qup_i2c0_data_clk: qup-i2c0-data-clk-state {</div><div class='ctx'> 				/* SDA, SCL */</div><div class='ctx'> 				pins = "gpio0", "gpio1";</div><div class='hunk'>@@ -5617,6 +6549,34 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			qup_uart14_default: qup-uart14-default-state {</div><div class='add'>+				cts-pins {</div><div class='add'>+					pins = "gpio56";</div><div class='add'>+					function = "qup1_se6";</div><div class='add'>+					bias-bus-hold;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rts-pins {</div><div class='add'>+					pins = "gpio57";</div><div class='add'>+					function = "qup1_se6";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				tx-pins {</div><div class='add'>+					pins = "gpio58";</div><div class='add'>+					function = "qup1_se6";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				rx-pins {</div><div class='add'>+					pins = "gpio59";</div><div class='add'>+					function = "qup1_se6";</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			qup_uart21_default: qup-uart21-default-state {</div><div class='ctx'> 				tx-pins {</div><div class='ctx'> 					pins = "gpio86";</div><div class='hunk'>@@ -5632,6 +6592,1487 @@</div><div class='ctx'> 					bias-disable;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			sdc2_default: sdc2-default-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					drive-strength = &lt;16&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					drive-strength = &lt;10&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdc2_sleep: sdc2-sleep-state {</div><div class='add'>+				clk-pins {</div><div class='add'>+					pins = "sdc2_clk";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-disable;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cmd-pins {</div><div class='add'>+					pins = "sdc2_cmd";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				data-pins {</div><div class='add'>+					pins = "sdc2_data";</div><div class='add'>+					drive-strength = &lt;2&gt;;</div><div class='add'>+					bias-pull-up;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stm@10002000 {</div><div class='add'>+			compatible = "arm,coresight-stm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10002000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x16280000 0x0 0x180000&gt;;</div><div class='add'>+			reg-names = "stm-base",</div><div class='add'>+				    "stm-stimulus-base";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					stm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10003000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10003000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dcc_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10004000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10004000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dcc_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@1000f000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x1000f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10041000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10041000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel0_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					funnel0_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;stm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10042000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10042000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmess_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					funnel1_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					funnel1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10045000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10045000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					qdss_funnel_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qdss_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10800000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10800000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					mxa_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpda_in15&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@1082c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x1082c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					gcc_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in21&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10841000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10841000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					prng_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in19&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10844000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10844000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					lpass_cx_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;lpass_cx_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10846000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10846000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					lpass_cx_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;lpass_cx_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					lpass_cx_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cti@1098b000 {</div><div class='add'>+			compatible = "arm,coresight-cti", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x1098b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@109d0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x109d0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					qm_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in20&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10ac0000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10ac0000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpda_in8&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10ac1000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10ac1000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpda_in9&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10ac4000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10ac4000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@8 {</div><div class='add'>+					reg = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_tpda_in8: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@9 {</div><div class='add'>+					reg = &lt;9&gt;;</div><div class='add'>+</div><div class='add'>+					dlst_tpda_in9: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10ac5000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10ac5000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlst_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlst_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10b04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_funnel_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_lpi_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_funnel_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_funnel_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qdss_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etf0: tmc@10b05000 {</div><div class='add'>+			compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b05000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					etf0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;swao_rep_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		replicator@10b06000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b06000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					swao_rep_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;etf0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					swao_rep_out1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;eud_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10b08000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm2_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm3_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					aoss_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpdm4_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b09000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b09000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b0a000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b0a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b0b000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b0b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm2_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b0c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b0c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm3_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b0d000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b0d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					aoss_tpdm4_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10b20000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b20000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					lpicc_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_lpi_tpda_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10b23000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b23000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_lpi_tpda_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;lpicc_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_lpi_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_lpi_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10b24000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10b24000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_lpi_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_lpi_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_lpi_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;aoss_funnel_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c08000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					mm_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mm_funnel_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10c0b000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c0b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					mm_funnel_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mm_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					mm_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c28000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c28000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct1_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in26&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c29000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c29000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ipcc_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_in27&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10c2b000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;lpass_cx_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@13 {</div><div class='add'>+					reg = &lt;19&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in19: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;prng_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@14 {</div><div class='add'>+					reg = &lt;20&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in20: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;qm_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@15 {</div><div class='add'>+					reg = &lt;21&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in21: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;gcc_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1a {</div><div class='add'>+					reg = &lt;26&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in26: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1b {</div><div class='add'>+					reg = &lt;27&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_tpda_in27: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ipcc_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct1_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10c2c000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c2c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_funnel_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					dlct1_funnel_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct1_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c38000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c38000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct2_tpdm0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpda_in16&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10c39000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c39000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct2_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpda_in17&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10c3c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c3c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					dlct2_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mm_funnel_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@f {</div><div class='add'>+					reg = &lt;15&gt;;</div><div class='add'>+</div><div class='add'>+					dlct2_tpda_in15: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;mxa_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@10 {</div><div class='add'>+					reg = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+					dlct2_tpda_in16: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpdm0_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@11 {</div><div class='add'>+					reg = &lt;17&gt;;</div><div class='add'>+</div><div class='add'>+					dlct2_tpda_in17: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct2_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10c3d000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10c3d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct2_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct2_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					dlct2_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_funnel_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10cc1000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10cc1000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;64&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,dsb-msrs-num = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmess_tpdm1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmess_tpda_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10cc4000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10cc4000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					tmess_tpda_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmess_tpdm1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmess_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmess_funnel_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10cc5000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10cc5000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmess_funnel_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;tmess_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					tmess_funnel_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;funnel1_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10d04000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d04000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					ddr_funnel0_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel1_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel0_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dlct1_funnel_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d08000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d08000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc0_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d09000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d09000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc1_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in1&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0a000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0a000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc2_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0b000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0b000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc3_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0c000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0c000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc4_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in4&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0d000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0d000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc5_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in5&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0e000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0e000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc6_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpdm@10d0f000 {</div><div class='add'>+			compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d0f000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			qcom,cmb-element-bits = &lt;32&gt;;</div><div class='add'>+			qcom,cmb-msrs-num = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc7_tpdm_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_in7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tpda@10d12000 {</div><div class='add'>+			compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d12000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc0_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in1: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc1_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in2: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc2_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in3: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc3_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in4: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc4_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@5 {</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in5: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc5_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@6 {</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in6: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc6_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@7 {</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+</div><div class='add'>+					llcc_tpda_in7: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc7_tpdm_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					llcc_tpda_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel1_in0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		funnel@10d13000 {</div><div class='add'>+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x10d13000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+			in-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel1_in0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;llcc_tpda_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			out-ports {</div><div class='add'>+				port {</div><div class='add'>+					ddr_funnel1_out: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;ddr_funnel0_in6&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		apps_smmu: iommu@15000000 {</div><div class='hunk'>@@ -5738,12 +8179,28 @@</div><div class='ctx'> </div><div class='ctx'> 			#iommu-cells = &lt;2&gt;;</div><div class='ctx'> 			#global-interrupts = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_smmu: iommu@15400000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			reg = &lt;0 0x15400000 0 0x80000&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 134 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 136 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eventq",</div><div class='add'>+					  "gerror",</div><div class='add'>+					  "cmdq-sync";</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "reserved"; /* Controlled by Gunyah. */</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@17000000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0 0x17000000 0 0x10000&gt;,     /* GICD */</div><div class='del'>-			      &lt;0 0x17080000 0 0x480000&gt;;    /* GICR * 12 */</div><div class='add'>+			      &lt;0 0x17080000 0 0x300000&gt;;    /* GICR * 12 */</div><div class='ctx'> </div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -5763,11 +8220,16 @@</div><div class='ctx'> </div><div class='ctx'> 				msi-controller;</div><div class='ctx'> 				#msi-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		cpucp_mbox: mailbox@17430000 {</div><div class='add'>+			compatible = "qcom,x1e80100-cpucp-mbox";</div><div class='add'>+			reg = &lt;0 0x17430000 0 0x10000&gt;, &lt;0 0x18830000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		apps_rsc: rsc@17500000 {</div><div class='ctx'> 			compatible = "qcom,rpmh-rsc";</div><div class='ctx'> 			reg = &lt;0 0x17500000 0 0x10000&gt;,</div><div class='hunk'>@@ -5784,7 +8246,7 @@</div><div class='ctx'> 					  &lt;WAKE_TCS      2&gt;, &lt;CONTROL_TCS   0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			label = "apps_rsc";</div><div class='del'>-			power-domains = &lt;&amp;SYSTEM_PD&gt;;</div><div class='add'>+			power-domains = &lt;&amp;system_pd&gt;;</div><div class='ctx'> </div><div class='ctx'> 			apps_bcm_voter: bcm-voter {</div><div class='ctx'> 				compatible = "qcom,bcm-voter";</div><div class='hunk'>@@ -5951,6 +8413,44 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sram: sram@18b4e000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x0 0x18b4e000 0x0 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x18b4e000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+			cpu_scp_lpri0: scp-sram-section@0 {</div><div class='add'>+				compatible = "arm,scmi-shmem";</div><div class='add'>+				reg = &lt;0x0 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu_scp_lpri1: scp-sram-section@200 {</div><div class='add'>+				compatible = "arm,scmi-shmem";</div><div class='add'>+				reg = &lt;0x200 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sbsa_watchdog: watchdog@1c840000 {</div><div class='add'>+			compatible = "arm,sbsa-gwdt";</div><div class='add'>+			reg = &lt;0 0x1c840000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x1c850000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qfprom: efuse@221c8000 {</div><div class='add'>+			compatible = "qcom,x1e80100-qfprom", "qcom,qfprom";</div><div class='add'>+			reg = &lt;0 0x221c8000 0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			gpu_speed_bin: gpu-speed-bin@119 {</div><div class='add'>+				reg = &lt;0x119 0x2&gt;;</div><div class='add'>+				bits = &lt;7 8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmu@24091000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-llcc-bwmon", "qcom,sc7280-llcc-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x24091000 0 0x1000&gt;;</div><div class='hunk'>@@ -6008,7 +8508,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* cluster0 */</div><div class='del'>-		pmu@240b3400 {</div><div class='add'>+		bwmon_cluster0: pmu@240b3400 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='ctx'> 			reg = &lt;0 0x240b3400 0 0x600&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -6018,6 +8518,19 @@</div><div class='ctx'> 					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='ctx'> </div><div class='ctx'> 			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* cluster2 */</div><div class='add'>+		bwmon_cluster2: pmu@240b5400 {</div><div class='add'>+			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+			reg = &lt;0 0x240b5400 0 0x600&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu_bwmon_opp_table: opp-table {</div><div class='ctx'> 				compatible = "operating-points-v2";</div><div class='hunk'>@@ -6048,19 +8561,6 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		/* cluster2 */</div><div class='del'>-		pmu@240b5400 {</div><div class='del'>-			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='del'>-			reg = &lt;0 0x240b5400 0 0x600&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='del'>-					 &amp;gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='del'>-</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* cluster1 */</div><div class='ctx'> 		pmu@240b6400 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='hunk'>@@ -6084,7 +8584,8 @@</div><div class='ctx'> 			      &lt;0 0x25a00000 0 0x200000&gt;,</div><div class='ctx'> 			      &lt;0 0x25c00000 0 0x200000&gt;,</div><div class='ctx'> 			      &lt;0 0x25e00000 0 0x200000&gt;,</div><div class='del'>-			      &lt;0 0x26000000 0 0x200000&gt;;</div><div class='add'>+			      &lt;0 0x26000000 0 0x200000&gt;,</div><div class='add'>+			      &lt;0 0x26200000 0 0x200000&gt;;</div><div class='ctx'> 			reg-names = "llcc0_base",</div><div class='ctx'> 				    "llcc1_base",</div><div class='ctx'> 				    "llcc2_base",</div><div class='hunk'>@@ -6093,150 +8594,14 @@</div><div class='ctx'> 				    "llcc5_base",</div><div class='ctx'> 				    "llcc6_base",</div><div class='ctx'> 				    "llcc7_base",</div><div class='del'>-				    "llcc_broadcast_base";</div><div class='add'>+				    "llcc_broadcast_base",</div><div class='add'>+				    "llcc_broadcast_and_base";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		remoteproc_adsp: remoteproc@30000000 {</div><div class='del'>-			compatible = "qcom,x1e80100-adsp-pas";</div><div class='del'>-			reg = &lt;0 0x30000000 0 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-					      &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			interrupt-names = "wdog",</div><div class='del'>-					  "fatal",</div><div class='del'>-					  "ready",</div><div class='del'>-					  "handover",</div><div class='del'>-					  "stop-ack";</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='del'>-			clock-names = "xo";</div><div class='del'>-</div><div class='del'>-			power-domains = &lt;&amp;rpmhpd RPMHPD_LCX&gt;,</div><div class='del'>-					&lt;&amp;rpmhpd RPMHPD_LMX&gt;;</div><div class='del'>-			power-domain-names = "lcx",</div><div class='del'>-					     "lmx";</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS</div><div class='del'>-					 &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='del'>-</div><div class='del'>-			memory-region = &lt;&amp;adspslpi_mem&gt;,</div><div class='del'>-					&lt;&amp;q6_adsp_dtb_mem&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='del'>-			qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-</div><div class='del'>-			glink-edge {</div><div class='del'>-				interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-							     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='del'>-							     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='del'>-						IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='del'>-</div><div class='del'>-				label = "lpass";</div><div class='del'>-				qcom,remote-pid = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-				fastrpc {</div><div class='del'>-					compatible = "qcom,fastrpc";</div><div class='del'>-					qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='del'>-					label = "adsp";</div><div class='del'>-					qcom,non-secure-domain;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					compute-cb@3 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;3&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1003 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1063 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@4 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;4&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1004 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1064 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@5 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;5&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1005 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1065 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@6 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;6&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1006 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1066 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					compute-cb@7 {</div><div class='del'>-						compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-						reg = &lt;7&gt;;</div><div class='del'>-						iommus = &lt;&amp;apps_smmu 0x1007 0x80&gt;,</div><div class='del'>-							 &lt;&amp;apps_smmu 0x1067 0x0&gt;;</div><div class='del'>-						dma-coherent;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				gpr {</div><div class='del'>-					compatible = "qcom,gpr";</div><div class='del'>-					qcom,glink-channels = "adsp_apps";</div><div class='del'>-					qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-					qcom,intents = &lt;512 20&gt;;</div><div class='del'>-					#address-cells = &lt;1&gt;;</div><div class='del'>-					#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-					q6apm: service@1 {</div><div class='del'>-						compatible = "qcom,q6apm";</div><div class='del'>-						reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-						#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6apmbedai: bedais {</div><div class='del'>-							compatible = "qcom,q6apm-lpass-dais";</div><div class='del'>-							#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						q6apmdai: dais {</div><div class='del'>-							compatible = "qcom,q6apm-dais";</div><div class='del'>-							iommus = &lt;&amp;apps_smmu 0x1001 0x80&gt;,</div><div class='del'>-								 &lt;&amp;apps_smmu 0x1061 0x0&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					q6prm: service@2 {</div><div class='del'>-						compatible = "qcom,q6prm";</div><div class='del'>-						reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='del'>-						qcom,protection-domain = "avs/audio",</div><div class='del'>-									 "msm/adsp/audio_pd";</div><div class='del'>-</div><div class='del'>-						q6prmcc: clock-controller {</div><div class='del'>-							compatible = "qcom,q6prm-lpass-clocks";</div><div class='del'>-							#clock-cells = &lt;2&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		remoteproc_cdsp: remoteproc@32300000 {</div><div class='ctx'> 			compatible = "qcom,x1e80100-cdsp-pas";</div><div class='del'>-			reg = &lt;0 0x32300000 0 0x1400000&gt;;</div><div class='add'>+			reg = &lt;0x0 0x32300000 0x0 0x10000&gt;;</div><div class='ctx'> </div><div class='ctx'> 			interrupts-extended = &lt;&amp;intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'> 					      &lt;&amp;smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -6389,7 +8754,7 @@</div><div class='ctx'> 			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	thermal-zones {</div><div class='add'>+	thermal_zones: thermal-zones {</div><div class='ctx'> 		aoss0-thermal {</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -6401,33 +8766,19 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss0-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-0-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6435,25 +8786,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-0-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6461,25 +8798,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-1-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6487,25 +8810,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-1-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6513,25 +8822,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-2-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6539,25 +8834,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-2-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6565,25 +8846,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-3-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6591,25 +8858,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu0-3-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6620,15 +8873,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6638,15 +8885,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6663,7 +8904,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				mem-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;0&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6671,15 +8912,19 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		video-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens0 12&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='ctx'> 				trip-point0 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				video-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -6695,33 +8940,19 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss0-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-0-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6729,25 +8960,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-0-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6755,25 +8972,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-1-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6781,25 +8984,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-1-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6807,25 +8996,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-2-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6833,25 +9008,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-2-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6859,25 +9020,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-3-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6885,25 +9032,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1-3-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6914,15 +9047,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6932,15 +9059,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens1 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -6957,33 +9078,19 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss0-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-0-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -6991,25 +9098,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-0-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7017,25 +9110,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-1-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7043,25 +9122,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-1-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 4&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7069,25 +9134,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-2-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 5&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7095,25 +9146,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-2-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 6&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7121,25 +9158,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-3-top-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 7&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7147,25 +9170,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2-3-btm-thermal {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 8&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;95000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpu-critical {</div><div class='del'>-					temperature = &lt;110000&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7176,15 +9185,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 9&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7194,15 +9197,9 @@</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens2 10&gt;;</div><div class='ctx'> </div><div class='ctx'> 			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "hot";</div><div class='del'>-				};</div><div class='del'>-</div><div class='ctx'> 				cpuss2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7219,8 +9216,8 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				aoss0-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7237,8 +9234,8 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsp0-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7255,8 +9252,8 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsp1-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7273,8 +9270,8 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsp2-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7291,33 +9288,34 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				nsp3-critical {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-0-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 5&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss0_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss0_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7325,25 +9323,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-1-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 6&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss1_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7351,25 +9350,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-2-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 7&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss2_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss2_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7377,25 +9377,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-3-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 8&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss3_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss3_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7403,25 +9404,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-4-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 9&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss4_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss4_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7429,25 +9431,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-5-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 10&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss5_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss5_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7455,25 +9458,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-6-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 11&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss6_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss6_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7481,25 +9485,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpuss-7-thermal {</div><div class='del'>-			polling-delay-passive = &lt;10&gt;;</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='ctx'> </div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsens3 12&gt;;</div><div class='ctx'> </div><div class='del'>-			trips {</div><div class='del'>-				trip-point0 {</div><div class='del'>-					temperature = &lt;85000&gt;;</div><div class='del'>-					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "passive";</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss7_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-				trip-point1 {</div><div class='del'>-					temperature = &lt;90000&gt;;</div><div class='add'>+			trips {</div><div class='add'>+				gpuss7_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='del'>-					type = "hot";</div><div class='add'>+					type = "passive";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				trip-point2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='add'>+				gpu-critical {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='ctx'> 					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -7518,7 +9523,7 @@</div><div class='ctx'> </div><div class='ctx'> 				camera0-critical {</div><div class='ctx'> 					temperature = &lt;115000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -7536,7 +9541,7 @@</div><div class='ctx'> </div><div class='ctx'> 				camera0-critical {</div><div class='ctx'> 					temperature = &lt;115000&gt;;</div><div class='del'>-					hysteresis = &lt;0&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='ctx'> 					type = "critical";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts b/arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts<br/>new file mode 100644<br/>index 000000000000..bd75ff898601<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dts</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2025 Aleksandrs Vinarskis &lt;alex.vinarskis@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1p42100.dtsi"</div><div class='add'>+#include "x1-asus-zenbook-a14.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;pmc8380_6;</div><div class='add'>+/delete-node/ &amp;pmc8380_6_thermal;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ASUS Zenbook A14 (UX3407QA)";</div><div class='add'>+	compatible = "asus,zenbook-a14-ux3407qa", "qcom,x1p42100";</div><div class='add'>+</div><div class='add'>+	wcn6855-pmu {</div><div class='add'>+		compatible = "qcom,wcn6855-pmu";</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpcie1p3-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpcie1p9-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddpmu-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddpmucx-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddpmumx-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa0p95-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p3-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p9-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_bt_en&gt;, &lt;&amp;wcn_wlan_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn_0p8: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p8: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p8: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p8: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p7: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p7";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1p42100/ASUSTeK/zenbook-a14/qcdxkmsucpurwa.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1103";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+</div><div class='add'>+		qcom,calibration-variant = "UX3407Q";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/ASUSTeK/zenbook-a14/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/ASUSTeK/zenbook-a14/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/ASUSTeK/zenbook-a14/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/ASUSTeK/zenbook-a14/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn6855-bt";</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p8&gt;;</div><div class='add'>+		vddbtcmx-supply = &lt;&amp;vreg_pmu_btcmx_0p8&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p7&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn_0p8&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p8&gt;;</div><div class='add'>+</div><div class='add'>+		max-speed = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1p42100-crd.dts b/arch/arm64/boot/dts/qcom/x1p42100-crd.dts<br/>new file mode 100644<br/>index 000000000000..cf999c2cf8d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1p42100-crd.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1p42100-crd.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1p42100.dtsi"</div><div class='add'>+#include "x1-crd.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;pmc8380_6;</div><div class='add'>+/delete-node/ &amp;pmc8380_6_thermal;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Qualcomm Technologies, Inc. X1P42100 CRD";</div><div class='add'>+	compatible = "qcom,x1p42100-crd", "qcom,x1p42100";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1p42100/gen71500_zap.mbn";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts<br/>new file mode 100644<br/>index 000000000000..6696cab2de3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1p42100-hp-omnibook-x14.dts</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "x1p42100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+#include "x1-hp-omnibook-x14.dtsi"</div><div class='add'>+/delete-node/ &amp;pmc8380_6;</div><div class='add'>+/delete-node/ &amp;pmc8380_6_thermal;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HP Omnibook X 14-fe1";</div><div class='add'>+	compatible = "hp,omnibook-x14-fe1", "qcom,x1p42100";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1p42100/hp/omnibook-x14/qcdxkmsucpurwa.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/hp/omnibook-x14/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/hp/omnibook-x14/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/hp/omnibook-x14/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/hp/omnibook-x14/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts b/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts<br/>new file mode 100644<br/>index 000000000000..1ac46cdc4386<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts</a></div><div class='hunk'>@@ -0,0 +1,1625 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024, Linaro Limited</div><div class='add'>+ * Copyright (c) 2025, Jens Glathe</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/qcom,pmic-gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+#include "x1p42100.dtsi"</div><div class='add'>+#include "x1e80100-pmics.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;pmc8380_6;</div><div class='add'>+/delete-node/ &amp;pmc8380_6_thermal;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Lenovo ThinkBook 16 Gen 7 QOY";</div><div class='add'>+	compatible = "lenovo,thinkbook-16", "qcom,x1p42100";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart21;</div><div class='add'>+		serial1 = &amp;uart14;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd938x: audio-codec {</div><div class='add'>+		compatible = "qcom,wcd9385-codec";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcd_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+		qcom,mbhc-buttons-vthreshold-microvolt = &lt;75000 150000 237000 500000 500000 500000 500000 500000&gt;;</div><div class='add'>+		qcom,mbhc-headset-vthreshold-microvolt = &lt;1700000&gt;;</div><div class='add'>+		qcom,mbhc-headphone-vthreshold-microvolt = &lt;50000&gt;;</div><div class='add'>+		qcom,rx-device = &lt;&amp;wcd_rx&gt;;</div><div class='add'>+		qcom,tx-device = &lt;&amp;wcd_tx&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 191 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-buck-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-rxtx-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-mic-bias-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		pwms = &lt;&amp;pm8550_pwm 3 500000&gt;;</div><div class='add'>+</div><div class='add'>+		power-supply = &lt;&amp;vreg_edp_bl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is an odd one. The camera is physically behind the eusb9 repeater (confirmed) but</div><div class='add'>+	 * if it is placed below the usb_2_dwc3 node, it will be switched off after ~30 seconds.</div><div class='add'>+	 * The reason seems to be that the dwc3 driver does not probe for child nodes when in</div><div class='add'>+	 * host-only mode. But that's the default setting for the xhci controllers due to issues</div><div class='add'>+	 * when in OTG mode. https://lore.kernel.org/all/20241210111444.26240-1-johan+linaro@kernel.org/</div><div class='add'>+	 * The whole reason it is described in the dt (as an USB device) is its requirement for</div><div class='add'>+	 * that additional regulator, and to get power management to switch it off when suspended.</div><div class='add'>+	 * Defining it stand-alone does work.</div><div class='add'>+	 */</div><div class='add'>+	camera {</div><div class='add'>+		compatible = "usb5986,1198";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_cam_5p0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;hall_int_n_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		switch-lid {</div><div class='add'>+			gpios = &lt;&amp;tlmm 92 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic-glink {</div><div class='add'>+		compatible = "qcom,x1e80100-pmic-glink",</div><div class='add'>+			     "qcom,sm8550-pmic-glink",</div><div class='add'>+			     "qcom,pmic-glink";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		orientation-gpios = &lt;&amp;tlmm 121 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+				    &lt;&amp;tlmm 123 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		/* Display-adjacent port */</div><div class='add'>+		connector@0 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "host";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss0_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* User-adjacent port */</div><div class='add'>+		connector@1 {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			data-role = "host";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_hs_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_dwc3_hs&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_ss_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_qmpphy_out&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					pmic_glink_ss1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_1_ss1_sbu_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "qcom,x1e80100-sndcard";</div><div class='add'>+		model = "X1E80100-LENOVO-ThinkBook-16";</div><div class='add'>+		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",</div><div class='add'>+				"SpkrRight IN", "WSA WSA_SPK2 OUT",</div><div class='add'>+				"IN1_HPHL", "HPHL_OUT",</div><div class='add'>+				"IN2_HPHR", "HPHR_OUT",</div><div class='add'>+				"AMIC2", "MIC BIAS2",</div><div class='add'>+				"VA DMIC0", "MIC BIAS3",</div><div class='add'>+				"VA DMIC1", "MIC BIAS3",</div><div class='add'>+				"VA DMIC2", "MIC BIAS1",</div><div class='add'>+				"VA DMIC3", "MIC BIAS1",</div><div class='add'>+				"TX SWR_INPUT1", "ADC2_OUTPUT";</div><div class='add'>+</div><div class='add'>+		wcd-playback-dai-link {</div><div class='add'>+			link-name = "WCD Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 0&gt;, &lt;&amp;swr1 0&gt;, &lt;&amp;lpass_rxmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai RX_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wcd-capture-dai-link {</div><div class='add'>+			link-name = "WCD Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;wcd938x 1&gt;, &lt;&amp;swr2 1&gt;, &lt;&amp;lpass_txmacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai TX_CODEC_DMA_TX_3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wsa-dai-link {</div><div class='add'>+			link-name = "WSA Playback";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;left_spkr&gt;, &lt;&amp;right_spkr&gt;, &lt;&amp;swr0 0&gt;, &lt;&amp;lpass_wsamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai WSA_CODEC_DMA_RX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		va-dai-link {</div><div class='add'>+			link-name = "VA Capture";</div><div class='add'>+</div><div class='add'>+			codec {</div><div class='add'>+				sound-dai = &lt;&amp;lpass_vamacro 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cpu {</div><div class='add'>+				sound-dai = &lt;&amp;q6apmbedai VA_CODEC_DMA_TX_0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			platform {</div><div class='add'>+				sound-dai = &lt;&amp;q6apm&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss0-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 167 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 168 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss0_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss0_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss0_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-1-ss1-sbu-mux {</div><div class='add'>+		compatible = "onnn,fsusb42", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;tlmm 178 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		select-gpios = &lt;&amp;tlmm 179 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_1_ss1_sbu_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		mode-switch;</div><div class='add'>+		orientation-switch;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_1_ss1_sbu_mux: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pmic_glink_ss1_sbu&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_cam_5p0: regulator-cam-5p0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_CAM_5P0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 44 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_3p3: regulator-edp-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_EDP_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_edp_bl: regulator-edp-bl {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VBL9";</div><div class='add'>+		regulator-min-microvolt = &lt;3600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pmc8380_3_gpios 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;edp_bl_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_misc_3p3: regulator-misc-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_MISC_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;misc_3p3_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_nvme: regulator-nvme {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_NVME_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;nvme_reg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_0p95: regulator-wcn-0p95 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_0P95";</div><div class='add'>+		regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_1p9: regulator-wcn-1p9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_1P9";</div><div class='add'>+		regulator-min-microvolt = &lt;1900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1900000&gt;;</div><div class='add'>+</div><div class='add'>+		vin-supply = &lt;&amp;vreg_wcn_3p3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vreg_wcn_3p3: regulator-wcn-3p3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "VREG_WCN_3P3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+		gpio = &lt;&amp;tlmm 214 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_sw_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vph_pwr: regulator-vph-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "vph_pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3700000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3700000&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn7850-pmu {</div><div class='add'>+		compatible = "qcom,wcn7850-pmu";</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vdddig-supply = &lt;&amp;vreg_wcn_0p95&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_wcn_1p9&gt;;</div><div class='add'>+</div><div class='add'>+		wlan-enable-gpios = &lt;&amp;tlmm 117 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bt-enable-gpios = &lt;&amp;tlmm 116 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;wcn_wlan_bt_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vreg_pmu_rfa_cmn: ldo0 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_cmn";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_aon_0p59: ldo1 {</div><div class='add'>+				regulator-name = "vreg_pmu_aon_0p59";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlcx_0p8: ldo2 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlcx_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_wlmx_0p85: ldo3 {</div><div class='add'>+				regulator-name = "vreg_pmu_wlmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_btcmx_0p85: ldo4 {</div><div class='add'>+				regulator-name = "vreg_pmu_btcmx_0p85";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_0p8: ldo5 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_0p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p2: ldo6 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_rfa_1p8: ldo7 {</div><div class='add'>+				regulator-name = "vreg_pmu_rfa_1p8";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_0p9: ldo8 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_0p9";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vreg_pmu_pcie_1p8: ldo9 {</div><div class='add'>+				regulator-name = "vreg_pmu_pcie_1p8";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apps_rsc {</div><div class='add'>+	regulators-0 {</div><div class='add'>+		compatible = "qcom,pm8550-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "b";</div><div class='add'>+</div><div class='add'>+		vdd-bob1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-bob2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-l1-l4-l10-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-l13-l14-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l5-l16-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l6-l7-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+		vdd-l8-l9-supply = &lt;&amp;vreg_bob1&gt;;</div><div class='add'>+		vdd-l12-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l15-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l17-supply = &lt;&amp;vreg_bob2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_bob1: bob1 {</div><div class='add'>+			regulator-name = "vreg_bob1";</div><div class='add'>+			regulator-min-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_bob2: bob2 {</div><div class='add'>+			regulator-name = "vreg_bob2";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3008000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1b_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2b_3p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l4b_1p8: ldo4 {</div><div class='add'>+			regulator-name = "vreg_l4b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l5b_3p0: ldo5 {</div><div class='add'>+			regulator-name = "vreg_l5b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l6b_1p8: ldo6 {</div><div class='add'>+			regulator-name = "vreg_l6b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l7b_2p8: ldo7 {</div><div class='add'>+			regulator-name = "vreg_l7b_2p8";</div><div class='add'>+			regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l8b_3p0: ldo8 {</div><div class='add'>+			regulator-name = "vreg_l8b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l9b_2p9: ldo9 {</div><div class='add'>+			regulator-name = "vreg_l9b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2960000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l10b_1p8: ldo10 {</div><div class='add'>+			regulator-name = "vreg_l10b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l12b_1p2: ldo12 {</div><div class='add'>+			regulator-name = "vreg_l12b_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l13b_3p0: ldo13 {</div><div class='add'>+			regulator-name = "vreg_l13b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l14b_3p0: ldo14 {</div><div class='add'>+			regulator-name = "vreg_l14b_3p0";</div><div class='add'>+			regulator-min-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3072000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l15b_1p8: ldo15 {</div><div class='add'>+			regulator-name = "vreg_l15b_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l16b_2p9: ldo16 {</div><div class='add'>+			regulator-name = "vreg_l16b_2p9";</div><div class='add'>+			regulator-min-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l17b_2p5: ldo17 {</div><div class='add'>+			regulator-name = "vreg_l17b_2p5";</div><div class='add'>+			regulator-min-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2504000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-1 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "c";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s4-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s4c_1p8: smps4 {</div><div class='add'>+			regulator-name = "vreg_s4c_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1856000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1c_1p2: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1c_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2c_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3c_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3c_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-2 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "d";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1d_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1d_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2d_0p9: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2d_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3d_1p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3d_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-3 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "e";</div><div class='add'>+</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l2e_0p8: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2e_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3e_1p2: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3e_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-4 {</div><div class='add'>+		compatible = "qcom,pmc8380-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "f";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s1f_0p7: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1f_0p7";</div><div class='add'>+			regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1f_1p0: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2f_1p0: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3f_1p0: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3f_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1024000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-6 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "i";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s4c_1p8&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s1-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+		vdd-s2-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_l1i_1p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1i_1p8";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2i_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2i_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3i_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3i_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s1i_0p9: smps1 {</div><div class='add'>+			regulator-name = "vreg_s1i_0p9";</div><div class='add'>+			regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;920000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_s2i_1p0: smps2 {</div><div class='add'>+			regulator-name = "vreg_s2i_1p0";</div><div class='add'>+			regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators-7 {</div><div class='add'>+		compatible = "qcom,pm8550ve-rpmh-regulators";</div><div class='add'>+		qcom,pmic-id = "j";</div><div class='add'>+</div><div class='add'>+		vdd-l1-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-l2-supply = &lt;&amp;vreg_s5j_1p2&gt;;</div><div class='add'>+		vdd-l3-supply = &lt;&amp;vreg_s1f_0p7&gt;;</div><div class='add'>+		vdd-s5-supply = &lt;&amp;vph_pwr&gt;;</div><div class='add'>+</div><div class='add'>+		vreg_s5j_1p2: smps5 {</div><div class='add'>+			regulator-name = "vreg_s5j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1304000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l1j_0p8: ldo1 {</div><div class='add'>+			regulator-name = "vreg_l1j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;912000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l2j_1p2: ldo2 {</div><div class='add'>+			regulator-name = "vreg_l2j_1p2";</div><div class='add'>+			regulator-min-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1256000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vreg_l3j_0p8: ldo3 {</div><div class='add'>+			regulator-name = "vreg_l3j_0p8";</div><div class='add'>+			regulator-min-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;880000&gt;;</div><div class='add'>+			regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu_zap_shader {</div><div class='add'>+	firmware-name = "qcom/x1p42100/LENOVO/21NH/qcdxkmsucpurwa.mbn";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;qup_i2c2_data_clk&gt;, &lt;&amp;tpad_default&gt;, &lt;&amp;kybd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ELAN06FA */</div><div class='add'>+	touchpad@15 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CIRQ1080 or SYNA2BA6 */</div><div class='add'>+	touchpad@2c {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* FTCS0038 */</div><div class='add'>+	touchpad@38 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x38&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keyboard@3a {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x3a&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 67 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* GXTP5100 */</div><div class='add'>+	touchpad@5d {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eusb5_repeater: redriver@43 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_repeater: redriver@47 {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x47&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb3_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb9_repeater: redriver@4b {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb9_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_repeater: redriver@4f {</div><div class='add'>+		compatible = "nxp,ptn3222";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		vdd3v3-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+		vdd1v8-supply = &lt;&amp;vreg_l4b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;tlmm 184 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;eusb6_reset_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ILIT2911 or GTCH1563 */</div><div class='add'>+	touchscreen@10 {</div><div class='add'>+		compatible = "hid-over-i2c";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		hid-descr-addr = &lt;0x1&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;tlmm 51 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		vdd-supply = &lt;&amp;vreg_misc_3p3&gt;;</div><div class='add'>+		vddl-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;ts0_default&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_tlmm {</div><div class='add'>+	spkr_01_sd_n_active: spkr-01-sd-n-active-state {</div><div class='add'>+		pins = "gpio12";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpass_vamacro {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dmic01_default&gt;, &lt;&amp;dmic23_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	vdd-micb-supply = &lt;&amp;vreg_l1b_1p8&gt;;</div><div class='add'>+	qcom,dmic-sample-rate = &lt;4800000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp0_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp1_out {</div><div class='add'>+	data-lanes = &lt;0 1&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3 {</div><div class='add'>+	/delete-property/ #sound-dai-cells;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;edp_hpd_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+</div><div class='add'>+			backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+			enable-gpios = &lt;&amp;pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;edp_bl_en&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+			power-supply = &lt;&amp;vreg_edp_3p3&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				edp_panel_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mdss_dp3_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_out {</div><div class='add'>+	data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+	link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='add'>+</div><div class='add'>+	remote-endpoint = &lt;&amp;edp_panel_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdss_dp3_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 146 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 148 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie4_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3i_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4_port0 {</div><div class='add'>+	wifi@0 {</div><div class='add'>+		compatible = "pci17cb,1107";</div><div class='add'>+		reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+		vddpcie0p9-supply = &lt;&amp;vreg_pmu_pcie_0p9&gt;;</div><div class='add'>+		vddpcie1p8-supply = &lt;&amp;vreg_pmu_pcie_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a {</div><div class='add'>+	perst-gpios = &lt;&amp;tlmm 152 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	wake-gpios = &lt;&amp;tlmm 154 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+	vddpe-3v3-supply = &lt;&amp;vreg_nvme&gt;;</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie6a_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l1d_0p8&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550_pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pm8550ve_8_gpios {</div><div class='add'>+	misc_3p3_reg_en: misc-3p3-reg-en-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "normal";</div><div class='add'>+		bias-disable;</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+		drive-push-pull;</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8 V */</div><div class='add'>+		qcom,drive-strength = &lt;PMIC_GPIO_STRENGTH_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmc8380_3_gpios {</div><div class='add'>+	edp_bl_en: edp-bl-en-state {</div><div class='add'>+		pins = "gpio4";</div><div class='add'>+		function = "normal";</div><div class='add'>+		power-source = &lt;1&gt;; /* 1.8V */</div><div class='add'>+		input-disable;</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_bl_reg_en: edp-bl-reg-en-state {</div><div class='add'>+		pins = "gpio10";</div><div class='add'>+		function = "normal";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qupv3_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_adsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/LENOVO/21NH/qcadsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/LENOVO/21NH/adsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;remoteproc_cdsp {</div><div class='add'>+	firmware-name = "qcom/x1p42100/LENOVO/21NH/qccdsp8380.mbn",</div><div class='add'>+			"qcom/x1p42100/LENOVO/21NH/cdsp_dtbs.elf";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhc_2 {</div><div class='add'>+	cd-gpios = &lt;&amp;tlmm 71 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdc2_default &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdc2_sleep &amp;sdc2_card_det_n&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	vmmc-supply = &lt;&amp;vreg_l9b_2p9&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vreg_l6b_1p8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_0_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l2b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smb2360_1_eusb2_repeater {</div><div class='add'>+	vdd18-supply = &lt;&amp;vreg_l3d_1p8&gt;;</div><div class='add'>+	vdd3-supply = &lt;&amp;vreg_l14b_3p0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;wsa_swr_active&gt;, &lt;&amp;spkr_01_sd_n_active&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Left Speaker */</div><div class='add'>+	left_spkr: speaker@0,0 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrLeft";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;1 2 3 7 10 13&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* WSA8845, Right Speaker */</div><div class='add'>+	right_spkr: speaker@0,1 {</div><div class='add'>+		compatible = "sdw20217020400";</div><div class='add'>+		reg = &lt;0 1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;lpass_tlmm 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		sound-name-prefix = "SpkrRight";</div><div class='add'>+		vdd-1p8-supply = &lt;&amp;vreg_l15b_1p8&gt;;</div><div class='add'>+		vdd-io-supply = &lt;&amp;vreg_l12b_1p2&gt;;</div><div class='add'>+		qcom,port-mapping = &lt;4 5 6 7 11 13&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 RX */</div><div class='add'>+	wcd_rx: codec@0,4 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 4&gt;;</div><div class='add'>+		qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;swr2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* WCD9385 TX */</div><div class='add'>+	wcd_tx: codec@0,3 {</div><div class='add'>+		compatible = "sdw20217010d00";</div><div class='add'>+		reg = &lt;0 3&gt;;</div><div class='add'>+		qcom,tx-port-mapping = &lt;2 2 3 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tlmm {</div><div class='add'>+	gpio-reserved-ranges = &lt;34 2&gt;, /* Unused */</div><div class='add'>+			       &lt;72 2&gt;; /* Secure EC I2C connection (?) */</div><div class='add'>+</div><div class='add'>+	edp_hpd_default: edp-hpd-default-state {</div><div class='add'>+		pins = "gpio119";</div><div class='add'>+		function = "edp0_hot";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_reg_en: cam-reg-en-state {</div><div class='add'>+		pins = "gpio44";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb3_reset_n: eusb3-reset-n-state {</div><div class='add'>+		pins = "gpio6";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb6_reset_n: eusb6-reset-n-state {</div><div class='add'>+		pins = "gpio184";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eusb9_reset_n: eusb9-reset-n-state {</div><div class='add'>+		pins = "gpio7";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_reg_en: edp-reg-en-state {</div><div class='add'>+		pins = "gpio70";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hall_int_n_default: hall-int-n-state {</div><div class='add'>+		pins = "gpio92";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	kybd_default: kybd-default-state {</div><div class='add'>+		pins = "gpio67";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nvme_reg_en: nvme-reg-en-state {</div><div class='add'>+		pins = "gpio18";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie4_default: pcie4-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio147";</div><div class='add'>+			function = "pcie4_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio146";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio148";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie6a_default: pcie6a-default-state {</div><div class='add'>+		clkreq-n-pins {</div><div class='add'>+			pins = "gpio153";</div><div class='add'>+			function = "pcie6a_clk";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		perst-n-pins {</div><div class='add'>+			pins = "gpio152";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-n-pins {</div><div class='add'>+			pins = "gpio154";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdc2_card_det_n: sdc2-card-det-state {</div><div class='add'>+		pins = "gpio71";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tpad_default: tpad-default-state {</div><div class='add'>+		pins = "gpio3";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts0_default: ts0-default-state {</div><div class='add'>+		int-n-pins {</div><div class='add'>+			pins = "gpio51";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		reset-n-pins {</div><div class='add'>+			pins = "gpio48";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			output-high;</div><div class='add'>+			drive-strength = &lt;16&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss0_sbu_default: usb-1-ss0-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio167";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio168";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {</div><div class='add'>+		oe-n-pins {</div><div class='add'>+			pins = "gpio178";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sel-pins {</div><div class='add'>+			pins = "gpio179";</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcd_default: wcd-reset-n-active-state {</div><div class='add'>+		pins = "gpio191";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;16&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+		output-low;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_sw_en: wcn-sw-en-state {</div><div class='add'>+		pins = "gpio214";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcn_wlan_bt_en: wcn-wlan-bt-en-state {</div><div class='add'>+		pins = "gpio116", "gpio117";</div><div class='add'>+		function = "gpio";</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		bias-disable;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,wcn7850-bt";</div><div class='add'>+		max-speed = &lt;3200000&gt;;</div><div class='add'>+</div><div class='add'>+		vddaon-supply = &lt;&amp;vreg_pmu_aon_0p59&gt;;</div><div class='add'>+		vddwlcx-supply = &lt;&amp;vreg_pmu_wlcx_0p8&gt;;</div><div class='add'>+		vddwlmx-supply = &lt;&amp;vreg_pmu_wlmx_0p85&gt;;</div><div class='add'>+		vddrfacmn-supply = &lt;&amp;vreg_pmu_rfa_cmn&gt;;</div><div class='add'>+		vddrfa0p8-supply = &lt;&amp;vreg_pmu_rfa_0p8&gt;;</div><div class='add'>+		vddrfa1p2-supply = &lt;&amp;vreg_pmu_rfa_1p2&gt;;</div><div class='add'>+		vddrfa1p8-supply = &lt;&amp;vreg_pmu_rfa_1p8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_0_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l1j_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss0_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss0_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;smb2360_1_eusb2_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l2d_0p9&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_dwc3_hs {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_hs_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss1_qmpphy_out {</div><div class='add'>+	remote-endpoint = &lt;&amp;pmic_glink_ss1_ss_in&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	phys = &lt;&amp;usb_1_ss2_hsphy&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_1_ss2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l3j_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l2j_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb5_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_2_hsphy {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb9_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy0 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb6_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy0 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_hsphy1 {</div><div class='add'>+	vdd-supply = &lt;&amp;vreg_l2e_0p8&gt;;</div><div class='add'>+	vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+	phys = &lt;&amp;eusb3_repeater&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_mp_qmpphy1 {</div><div class='add'>+	vdda-phy-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+	vdda-pll-supply = &lt;&amp;vreg_l3c_0p8&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1p42100.dtsi b/arch/arm64/boot/dts/qcom/x1p42100.dtsi<br/>new file mode 100644<br/>index 000000000000..10d26958d3c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/qcom/x1p42100.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/qcom/x1p42100.dtsi</a></div><div class='hunk'>@@ -0,0 +1,754 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* X1P42100 is heavily based on X1E80100, with some meaningful differences */</div><div class='add'>+#include "x1e80100.dtsi"</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;bwmon_cluster0;</div><div class='add'>+/delete-node/ &amp;cluster_pd2;</div><div class='add'>+/delete-node/ &amp;cpu_map_cluster2;</div><div class='add'>+/delete-node/ &amp;cpu8;</div><div class='add'>+/delete-node/ &amp;cpu9;</div><div class='add'>+/delete-node/ &amp;cpu10;</div><div class='add'>+/delete-node/ &amp;cpu11;</div><div class='add'>+/delete-node/ &amp;cpu_pd8;</div><div class='add'>+/delete-node/ &amp;cpu_pd9;</div><div class='add'>+/delete-node/ &amp;cpu_pd10;</div><div class='add'>+/delete-node/ &amp;cpu_pd11;</div><div class='add'>+/delete-node/ &amp;gpu_opp_table;</div><div class='add'>+/delete-node/ &amp;gpu_speed_bin;</div><div class='add'>+/delete-node/ &amp;pcie3_phy;</div><div class='add'>+/delete-node/ &amp;thermal_zones;</div><div class='add'>+</div><div class='add'>+&amp;gcc {</div><div class='add'>+	compatible = "qcom,x1p42100-gcc", "qcom,x1e80100-gcc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmu {</div><div class='add'>+	compatible = "qcom,adreno-gmu-x145.0", "qcom,adreno-gmu";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	compatible = "qcom,adreno-43030c00", "qcom,adreno";</div><div class='add'>+</div><div class='add'>+	nvmem-cells = &lt;&amp;gpu_speed_bin&gt;;</div><div class='add'>+	nvmem-cell-names = "speed_bin";</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table {</div><div class='add'>+		compatible = "operating-points-v2-adreno", "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L4&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa8295ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1250000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1250000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L3&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1107000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1107000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0x882a5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1014000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1014000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-940000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;940000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-825000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;825000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;12449219&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0x882b5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-720000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;720000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;10687500&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa82c5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-666000000-0 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;666000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa82d5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0xf&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Only applicable for SKUs which has 666Mhz as Fmax */</div><div class='add'>+		opp-666000000-1 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;666000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xa82d5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-550000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;6074219&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-380000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;380000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;3000000&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xc82f5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-280000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;280000000&gt;;</div><div class='add'>+			opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+			opp-peak-kBps = &lt;2136719&gt;;</div><div class='add'>+			qcom,opp-acd-level = &lt;0xc82f5ffd&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x1f&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpucc {</div><div class='add'>+	compatible = "qcom,x1p42100-gpucc";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PCIe3 has half the lanes compared to X1E80100 */</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	num-lanes = &lt;4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie6a_phy {</div><div class='add'>+	compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qfprom {</div><div class='add'>+	gpu_speed_bin: gpu-speed-bin@119 {</div><div class='add'>+		reg = &lt;0x119 0x2&gt;;</div><div class='add'>+		bits = &lt;7 9&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	/* The PCIe3 PHY on X1P42100 uses a different IP block */</div><div class='add'>+	pcie3_phy: phy@1bd4000 {</div><div class='add'>+		compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";</div><div class='add'>+		reg = &lt;0x0 0x01bd4000 0x0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x01bd6000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;gcc GCC_PCIE_3_PHY_AUX_CLK&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_3_CFG_AHB_CLK&gt;,</div><div class='add'>+			 &lt;&amp;tcsr TCSR_PCIE_8L_CLKREF_EN&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_3_PHY_RCHNG_CLK&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_3_PIPE_CLK&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_3_PIPEDIV2_CLK&gt;;</div><div class='add'>+		clock-names = "aux",</div><div class='add'>+			      "cfg_ahb",</div><div class='add'>+			      "ref",</div><div class='add'>+			      "rchng",</div><div class='add'>+			      "pipe",</div><div class='add'>+			      "pipediv2";</div><div class='add'>+</div><div class='add'>+		resets = &lt;&amp;gcc GCC_PCIE_3_PHY_BCR&gt;,</div><div class='add'>+			 &lt;&amp;gcc GCC_PCIE_3_NOCSR_COM_PHY_BCR&gt;;</div><div class='add'>+		reset-names = "phy",</div><div class='add'>+			      "phy_nocsr";</div><div class='add'>+</div><div class='add'>+		assigned-clocks = &lt;&amp;gcc GCC_PCIE_3_PHY_RCHNG_CLK&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+</div><div class='add'>+		power-domains = &lt;&amp;gcc GCC_PCIE_3_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "pcie3_pipe_clk";</div><div class='add'>+</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* While physically present, this controller is left unconfigured and unused */</div><div class='add'>+&amp;tsens3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	thermal-zones {</div><div class='add'>+		aoss0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-0-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-0-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-1-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-1-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-2-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-2-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 6&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-3-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 7&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0-3-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 8&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss0-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss0-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mem-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 11&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		video-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens0 12&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-0-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-0-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-1-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-1-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-2-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-2-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 6&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-3-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 7&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1-3-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 8&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss1-top-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpuss1-btm-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens1 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aoss2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp2-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nsp3-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss-0-thermal {</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 5&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss0_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpuss0_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss-1-thermal {</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 6&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss1_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpuss1_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss-2-thermal {</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 7&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss2_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpuss2_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpuss-3-thermal {</div><div class='add'>+			polling-delay-passive = &lt;200&gt;;</div><div class='add'>+</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 8&gt;;</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpuss3_alert0&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpuss3_alert0: trip-point0 {</div><div class='add'>+					temperature = &lt;95000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera0-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 9&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera1-thermal {</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens2 10&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				trip-point0 {</div><div class='add'>+					temperature = &lt;90000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trip-point1 {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;1000&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile<br/>index 97228a3cb99c..ccdf7aaeca13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/Makefile</a></div><div class='hunk'>@@ -86,14 +86,40 @@ dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f4-s4sk.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk-cpu.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk-ard-audio-da7212.dtbo</div><div class='del'>-r8a779g0-white-hawk-ard-audio-da7212-dtbs := r8a779g0-white-hawk.dtb r8a779g0-white-hawk-ard-audio-da7212.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += white-hawk-ard-audio-da7212.dtbo</div><div class='add'>+r8a779g0-white-hawk-ard-audio-da7212-dtbs := r8a779g0-white-hawk.dtb white-hawk-ard-audio-da7212.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk-ard-audio-da7212.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g2-white-hawk-single.dtb</div><div class='add'>+r8a779g2-white-hawk-single-ard-audio-da7212-dtbs := r8a779g2-white-hawk-single.dtb white-hawk-ard-audio-da7212.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g2-white-hawk-single-ard-audio-da7212.dtb</div><div class='add'>+</div><div class='add'>+DTC_FLAGS_r8a779g3-sparrow-hawk += -Wno-spi_bus_bridge</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j1-imx219.dtbo</div><div class='add'>+r8a779g3-sparrow-hawk-camera-j1-imx219-dtbs := r8a779g3-sparrow-hawk.dtb r8a779g3-sparrow-hawk-camera-j1-imx219.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j1-imx219.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j1-imx462.dtbo</div><div class='add'>+r8a779g3-sparrow-hawk-camera-j1-imx462-dtbs := r8a779g3-sparrow-hawk.dtb r8a779g3-sparrow-hawk-camera-j1-imx462.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j1-imx462.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j2-imx219.dtbo</div><div class='add'>+r8a779g3-sparrow-hawk-camera-j2-imx219-dtbs := r8a779g3-sparrow-hawk.dtb r8a779g3-sparrow-hawk-camera-j2-imx219.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j2-imx219.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j2-imx462.dtbo</div><div class='add'>+r8a779g3-sparrow-hawk-camera-j2-imx462-dtbs := r8a779g3-sparrow-hawk.dtb r8a779g3-sparrow-hawk-camera-j2-imx462.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-camera-j2-imx462.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-fan-pwm.dtbo</div><div class='add'>+r8a779g3-sparrow-hawk-fan-pwm-dtbs := r8a779g3-sparrow-hawk.dtb r8a779g3-sparrow-hawk-fan-pwm.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-sparrow-hawk-fan-pwm.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-white-hawk-single.dtb</div><div class='add'>+r8a779g3-white-hawk-single-ard-audio-da7212-dtbs := r8a779g3-white-hawk-single.dtb white-hawk-ard-audio-da7212.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g3-white-hawk-single-ard-audio-da7212.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A779H0) += r8a779h0-gray-hawk-single.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_R8A779H0) += r8a779h2-gray-hawk-single.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs.dtb</div><div class='ctx'> r8a779m1-salvator-xs-panel-aa104xd12-dtbs := r8a779m1-salvator-xs.dtb salvator-panel-aa104xd12.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs-panel-aa104xd12.dtb</div><div class='hunk'>@@ -126,6 +152,7 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtbo</div><div class='ctx'> r9a07g044c2-smarc-cru-csi-ov5645-dtbs := r9a07g044c2-smarc.dtb r9a07g044c2-smarc-cru-csi-ov5645.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-remi-pi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo</div><div class='ctx'> r9a07g044l2-smarc-cru-csi-ov5645-dtbs := r9a07g044l2-smarc.dtb r9a07g044l2-smarc-cru-csi-ov5645.dtbo</div><div class='hunk'>@@ -137,10 +164,37 @@ r9a07g054l2-smarc-cru-csi-ov5645-dtbs := r9a07g054l2-smarc.dtb r9a07g054l2-smarc</div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc-cru-csi-ov5645.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc-pmod1-type-3a.dtbo</div><div class='add'>+r9a08g045s33-smarc-pmod1-type-3a-dtbs := r9a08g045s33-smarc.dtb r9a08g045s33-smarc-pmod1-type-3a.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc-pmod1-type-3a.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtbo</div><div class='add'>+r9a09g047e57-smarc-cru-csi-ov5645-dtbs := r9a09g047e57-smarc.dtb r9a09g047e57-smarc-cru-csi-ov5645.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G056) += rzv2-evk-cn15-emmc.dtbo</div><div class='add'>+r9a09g056n48-rzv2n-evk-cn15-emmc-dtbs := r9a09g056n48-rzv2n-evk.dtb rzv2-evk-cn15-emmc.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-emmc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G056) += rzv2-evk-cn15-sd.dtbo</div><div class='add'>+r9a09g056n48-rzv2n-evk-cn15-sd-dtbs := r9a09g056n48-rzv2n-evk.dtb rzv2-evk-cn15-sd.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk-cn15-sd.dtb</div><div class='add'>+</div><div class='ctx'> dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G057) += rzv2-evk-cn15-emmc.dtbo</div><div class='add'>+r9a09g057h44-rzv2h-evk-cn15-emmc-dtbs := r9a09g057h44-rzv2h-evk.dtb rzv2-evk-cn15-emmc.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk-cn15-emmc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G057) += rzv2-evk-cn15-sd.dtbo</div><div class='add'>+r9a09g057h44-rzv2h-evk-cn15-sd-dtbs := r9a09g057h44-rzv2h-evk.dtb rzv2-evk-cn15-sd.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk-cn15-sd.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h48-kakip.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G077) += r9a09g077m44-rzt2h-evk.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_R9A09G087) += r9a09g087m44-rzn2h-evk.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi<br/>index 5a14f116f7a1..d55f2d7066ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi</a></div><div class='hunk'>@@ -200,7 +200,7 @@</div><div class='ctx'> 		widgets = "Microphone", "Mic Jack",</div><div class='ctx'> 			  "Line", "Line In Jack",</div><div class='ctx'> 			  "Headphone", "Headphone Jack";</div><div class='del'>-		mic-det-gpio = &lt;&amp;gpio0 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		mic-det-gpios = &lt;&amp;gpio0 2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		routing = "Headphone Jack", "HPOUTL",</div><div class='ctx'> 			 "Headphone Jack", "HPOUTR",</div><div class='ctx'> 			 "IN3R", "MICBIAS",</div><div class='hunk'>@@ -364,6 +364,8 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x304_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		assigned-clocks = &lt;&amp;versaclock6_bb 1&gt;, &lt;&amp;versaclock6_bb 2&gt;,</div><div class='ctx'> 				  &lt;&amp;versaclock6_bb 3&gt;, &lt;&amp;versaclock6_bb 4&gt;;</div><div class='hunk'>@@ -440,16 +442,14 @@</div><div class='ctx'> 	touchscreen@26 {</div><div class='ctx'> 		compatible = "ilitek,ili2117";</div><div class='ctx'> 		reg = &lt;0x26&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;9 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio5 9 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	hd3ss3220@47 {</div><div class='ctx'> 		compatible = "ti,hd3ss3220";</div><div class='ctx'> 		reg = &lt;0x47&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio6 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi<br/>index 68b04e56ae56..d40a7224f9c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi</a></div><div class='hunk'>@@ -62,8 +62,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -131,8 +130,7 @@</div><div class='ctx'> 	pca9654_lte: gpio@21 {</div><div class='ctx'> 		compatible = "onnn,pca9654";</div><div class='ctx'> 		reg = &lt;0x21&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio5 25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='hunk'>@@ -166,6 +164,8 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x304_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;0&gt;;</div><div class='ctx'> 		/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */</div><div class='ctx'> 		assigned-clocks = &lt;&amp;versaclock5 1&gt;,</div><div class='ctx'> 				   &lt;&amp;versaclock5 2&gt;,</div><div class='hunk'>@@ -282,6 +282,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -299,11 +300,10 @@</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	brcmf: bcrmf@1 {</div><div class='add'>+	brcmf: wifi@1 {</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-names = "host-wake";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/cat875.dtsi b/arch/arm64/boot/dts/renesas/cat875.dtsi<br/>index 8c9da8b4bd60..191b051ecfd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/cat875.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/cat875.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/cat875.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/cat875.dtsi</a></div><div class='hunk'>@@ -25,8 +25,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id001c.c915",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/condor-common.dtsi b/arch/arm64/boot/dts/renesas/condor-common.dtsi<br/>index 8b7c0c34eadc..9fe9c722187d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/condor-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/condor-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/condor-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/condor-common.dtsi</a></div><div class='hunk'>@@ -166,8 +166,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -175,6 +174,7 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -196,8 +196,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		avdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='ctx'> 		pvdd-supply = &lt;&amp;d1_8v&gt;;</div><div class='hunk'>@@ -232,6 +231,7 @@</div><div class='ctx'> 		compatible = "rohm,br24t01", "atmel,24c01";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -546,6 +546,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;, &lt;&amp;scif_clk_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi<br/>index 6f133f54ded5..71d9f277c966 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/draak.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/draak.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/draak.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/draak.dtsi</a></div><div class='hunk'>@@ -247,8 +247,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio5 19 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio5 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * TX clock internal delay mode is required for reliable</div><div class='hunk'>@@ -309,6 +308,7 @@</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ak4613: codec@10 {</div><div class='hunk'>@@ -368,8 +368,7 @@</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;, &lt;0x3f&gt;, &lt;0x3c&gt;, &lt;0x38&gt;;</div><div class='ctx'> 		reg-names = "main", "edid", "cec", "packet";</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;28 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 28 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -451,6 +450,7 @@</div><div class='ctx'> 		compatible = "rohm,br24t01", "atmel,24c01";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -697,6 +697,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi<br/>index cba2fde9dd36..c4c86344fb90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ebisu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ebisu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ebisu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ebisu.dtsi</a></div><div class='hunk'>@@ -314,8 +314,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * TX clock internal delay mode is required for reliable</div><div class='hunk'>@@ -328,9 +327,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;can0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;can0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* Please only enable canfd or can0 */</div><div class='add'>+	/* status = "okay"; */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;canfd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;canfd0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	/* Please only enable canfd or can0 */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	channel0 {</div><div class='hunk'>@@ -393,15 +401,13 @@</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	hdmi-encoder@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -437,10 +443,9 @@</div><div class='ctx'> 		compatible = "adi,adv7482";</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 7 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gpio0 17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-names = "intrq1", "intrq2";</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -507,6 +512,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c_dvfs {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -517,8 +523,7 @@</div><div class='ctx'> </div><div class='ctx'> 		compatible = "rohm,bd9571mwv";</div><div class='ctx'> 		reg = &lt;0x30&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc_ex&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='hunk'>@@ -531,6 +536,7 @@</div><div class='ctx'> 		compatible = "rohm,br24t01", "atmel,24c01";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -584,6 +590,11 @@</div><div class='ctx'> 		function = "avb";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	can0_pins: can0 {</div><div class='add'>+		groups = "can0_data";</div><div class='add'>+		function = "can0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	canfd0_pins: canfd0 {</div><div class='ctx'> 		groups = "canfd0_data";</div><div class='ctx'> 		function = "canfd0";</div><div class='hunk'>@@ -791,6 +802,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi b/arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi<br/>new file mode 100644<br/>index 000000000000..2edb5cb3407b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi</a></div><div class='hunk'>@@ -0,0 +1,866 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the Gray Hawk Single board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 Renesas Electronics Corp.</div><div class='add'>+ * Copyright (C) 2024-2025 Glider bv</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * [How to use Sound]</div><div class='add'>+ *</div><div class='add'>+ * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture</div><div class='add'>+ * at the same time. You need to switch the direction which is controlled</div><div class='add'>+ * by the GP0_01 pin via amixer.</div><div class='add'>+ *</div><div class='add'>+ * Playback (CN9500)</div><div class='add'>+ *	&gt; amixer set "MUX" "Playback"	// for GP0_01</div><div class='add'>+ *	&gt; amixer set "DAC 1" 85%</div><div class='add'>+ *	&gt; aplay xxx.wav</div><div class='add'>+ *</div><div class='add'>+ * Capture (CN9501)</div><div class='add'>+ *	&gt; amixer set "MUX" "Capture"	// for GP0_01</div><div class='add'>+ *	&gt; amixer set "Mic 1" 80%</div><div class='add'>+ *	&gt; amixer set "ADC 1" on</div><div class='add'>+ *	&gt; amixer set 'ADC 1' 80%</div><div class='add'>+ *	&gt; arecord xxx hoge.wav</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas Gray Hawk Single board";</div><div class='add'>+	compatible = "renesas,gray-hawk-single";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		serial0 = &amp;hscif0;</div><div class='add'>+		serial1 = &amp;hscif2;</div><div class='add'>+		ethernet0 = &amp;avb0;</div><div class='add'>+		ethernet1 = &amp;avb1;</div><div class='add'>+		ethernet2 = &amp;avb2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can_transceiver0: can-phy0 {</div><div class='add'>+		compatible = "nxp,tjr1443";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";</div><div class='add'>+		stdout-path = "serial0:921600n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sn65dsi86_refclk: clk-x6 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;38400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;keys_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_1&gt;;</div><div class='add'>+			label = "SW47";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_2&gt;;</div><div class='add'>+			label = "SW48";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio5 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_3&gt;;</div><div class='add'>+			label = "SW49";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio7 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* first 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x0 0x78000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@480000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x4 0x80000000 0x1 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_clk: clk-9fgv0841-pci {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mini-dp-con {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "CN5";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mini_dp_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;sn65dsi86_out0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p2v: regulator-1p2v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.2V";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound_mux: sound-mux {</div><div class='add'>+		compatible = "simple-audio-mux";</div><div class='add'>+		mux-gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		state-labels = "Playback", "Capture";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound_card: sound {</div><div class='add'>+		compatible = "audio-graph-card2";</div><div class='add'>+		label = "rcar-sound";</div><div class='add'>+		aux-devs = &lt;&amp;sound_mux&gt;; // for GP0_01</div><div class='add'>+</div><div class='add'>+		links = &lt;&amp;rsnd_port&gt;; // AK4619 Audio Codec</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audio_clkin {</div><div class='add'>+	clock-frequency = &lt;24576000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb0_phy&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		avb0_phy: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-id0022.1622",</div><div class='add'>+				"ethernet-phy-ieee802.3-c22";</div><div class='add'>+				rxc-skew-ps = &lt;1500&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;gpio7 5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				reset-gpios = &lt;&amp;gpio7 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb1_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio6 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb1_phy: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio6 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb2_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb2_phy: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio5 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can_clk {</div><div class='add'>+	clock-frequency = &lt;40000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;canfd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;canfd0_pins&gt;, &lt;&amp;canfd1_pins&gt;, &lt;&amp;can_clk_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	channel0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		phys = &lt;&amp;can_transceiver0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi40 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi40_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;max96724_out0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi41 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi41_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;max96724_out1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			dsi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;sn65dsi86_in0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;du {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extal_clk {</div><div class='add'>+	clock-frequency = &lt;16666666&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extalr_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	audio-power-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "Audio-Power";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hscif0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='add'>+</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hscif2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	io_expander_a: gpio@20 {</div><div class='add'>+		compatible = "onnn,pca9654";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	io_expander_b: gpio@21 {</div><div class='add'>+		compatible = "onnn,pca9654";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	io_expander_c: gpio@22 {</div><div class='add'>+		compatible = "onnn,pca9654";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='add'>+		label = "cpu-board";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@51 {</div><div class='add'>+		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='add'>+		label = "breakout-board";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@52 {</div><div class='add'>+		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='add'>+		label = "csi-dsi-sub-board-id";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@53 {</div><div class='add'>+		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='add'>+		label = "ethernet-sub-board-id";</div><div class='add'>+		reg = &lt;0x53&gt;;</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	bridge@2c {</div><div class='add'>+		pinctrl-0 = &lt;&amp;irq0_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		compatible = "ti,sn65dsi86";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;sn65dsi86_refclk&gt;;</div><div class='add'>+		clock-names = "refclk";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		vccio-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		vpll-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				sn65dsi86_in0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				sn65dsi86_out0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;mini_dp_con_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmsl0: gmsl-deserializer@4e {</div><div class='add'>+		compatible = "maxim,max96724";</div><div class='add'>+		reg = &lt;0x4e&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;io_expander_b 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				max96724_out0: endpoint {</div><div class='add'>+					bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;csi40_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmsl1: gmsl-deserializer@4f {</div><div class='add'>+		compatible = "maxim,max96724";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;io_expander_c 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				max96724_out1: endpoint {</div><div class='add'>+					bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;csi41_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	codec@10 {</div><div class='add'>+		compatible = "asahi-kasei,ak4619";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;rcar_sound&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		port {</div><div class='add'>+			ak4619_endpoint: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;rsnd_endpoint&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mmc_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;mmc_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_clkref {</div><div class='add'>+	compatible = "gpio-gate-clock";</div><div class='add'>+	clocks = &lt;&amp;pcie_clk&gt;;</div><div class='add'>+	enable-gpios = &lt;&amp;gpio4 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	/delete-property/ clock-frequency;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciec0 {</div><div class='add'>+	reset-gpios = &lt;&amp;io_expander_a 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pfc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_clk_pins&gt;, &lt;&amp;scif_clk2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	avb0_pins: avb0 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",</div><div class='add'>+				 "avb0_txcrefclk";</div><div class='add'>+			function = "avb0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins_mdio {</div><div class='add'>+			groups = "avb0_mdio";</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins_mii {</div><div class='add'>+			groups = "avb0_rgmii";</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb1_pins: avb1 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb1_link", "avb1_mdio", "avb1_rgmii",</div><div class='add'>+				 "avb1_txcrefclk";</div><div class='add'>+			function = "avb1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb1_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb1_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb1_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb2_pins: avb2 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb2_link", "avb2_mdio", "avb2_rgmii",</div><div class='add'>+				 "avb2_txcrefclk";</div><div class='add'>+			function = "avb2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb2_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb2_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb2_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can_clk_pins: can-clk {</div><div class='add'>+		groups = "can_clk";</div><div class='add'>+		function = "can_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	canfd0_pins: canfd0 {</div><div class='add'>+		groups = "canfd0_data";</div><div class='add'>+		function = "canfd0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	canfd1_pins: canfd1 {</div><div class='add'>+		groups = "canfd1_data";</div><div class='add'>+		function = "canfd1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hscif0_pins: hscif0 {</div><div class='add'>+		groups = "hscif0_data", "hscif0_ctrl";</div><div class='add'>+		function = "hscif0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hscif2_pins: hscif2 {</div><div class='add'>+		groups = "hscif2_data", "hscif2_ctrl";</div><div class='add'>+		function = "hscif2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0 {</div><div class='add'>+		groups = "i2c0";</div><div class='add'>+		function = "i2c0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1 {</div><div class='add'>+		groups = "i2c1";</div><div class='add'>+		function = "i2c1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3 {</div><div class='add'>+		groups = "i2c3";</div><div class='add'>+		function = "i2c3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	irq0_pins: irq0_pins {</div><div class='add'>+		groups = "intc_ex_irq0_a";</div><div class='add'>+		function = "intc_ex";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys_pins: keys {</div><div class='add'>+		pins = "GP_5_0", "GP_5_1", "GP_5_2";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc_pins: mmc {</div><div class='add'>+		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";</div><div class='add'>+		function = "mmc";</div><div class='add'>+		power-source = &lt;1800&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qspi0_pins: qspi0 {</div><div class='add'>+		groups = "qspi0_ctrl", "qspi0_data4";</div><div class='add'>+		function = "qspi0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif_clk_pins: scif-clk {</div><div class='add'>+		groups = "scif_clk";</div><div class='add'>+		function = "scif_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif_clk2_pins: scif-clk2 {</div><div class='add'>+		groups = "scif_clk2";</div><div class='add'>+		function = "scif_clk2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound_clk_pins: sound_clk {</div><div class='add'>+		groups = "audio_clkin", "audio_clkout";</div><div class='add'>+		function = "audio_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound_pins: sound {</div><div class='add'>+		groups = "ssi_ctrl", "ssi_data";</div><div class='add'>+		function = "ssi";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rcar_sound {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sound_clk_pins&gt;, &lt;&amp;sound_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* audio_clkout */</div><div class='add'>+	clock-frequency = &lt;12288000&gt;;</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		rsnd_port: port {</div><div class='add'>+			rsnd_endpoint: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ak4619_endpoint&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+</div><div class='add'>+				/* see above [How to use Sound] */</div><div class='add'>+				playback = &lt;&amp;ssi0&gt;;</div><div class='add'>+				capture  = &lt;&amp;ssi0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rpc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qspi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "spansion,s25fs512s", "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			boot@0 {</div><div class='add'>+				reg = &lt;0x0 0x1200000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+			user@1200000 {</div><div class='add'>+				reg = &lt;0x1200000 0x2e00000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rwdt {</div><div class='add'>+	timeout-sec = &lt;60&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif_clk {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif_clk2 {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin00 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin01 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin02 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin03 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin04 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin05 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin07 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin08 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin09 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi<br/>index 83104af2813e..4e78139d52f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/hihope-common.dtsi</a></div><div class='hunk'>@@ -198,6 +198,8 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x304_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -287,6 +289,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -325,8 +328,7 @@</div><div class='ctx'> 	wlcore: wlcore@2 {</div><div class='ctx'> 		compatible = "ti,wl1837";</div><div class='ctx'> 		reg = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi b/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi<br/>index 8e2db1d6ca81..25c55b32aafe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rev2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/hihope-rev2.dtsi</a></div><div class='hunk'>@@ -69,9 +69,6 @@</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* Single DAI */</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'> 	rsnd_port: port {</div><div class='ctx'> 		rsnd_endpoint: endpoint {</div><div class='ctx'> 			remote-endpoint = &lt;&amp;dw_hdmi0_snd_in&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi b/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi<br/>index 66f3affe0469..deb69c272775 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rev4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/hihope-rev4.dtsi</a></div><div class='hunk'>@@ -84,9 +84,6 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	/* Single DAI */</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'> 	/* audio_clkout0/1/2/3 */</div><div class='ctx'> 	#clock-cells = &lt;1&gt;;</div><div class='ctx'> 	clock-frequency = &lt;12288000 11289600&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi<br/>index ad898c6db4e6..4113710d5522 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi</a></div><div class='hunk'>@@ -27,8 +27,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id001c.c915",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi<br/>index f065ee90649a..6b737d91b320 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774a1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774a1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774a1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a774a1.dtsi</a></div><div class='hunk'>@@ -215,6 +215,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -222,6 +223,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -262,6 +264,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -400,6 +404,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a774a1";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -480,11 +485,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a774a1-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x018c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1179,7 +1186,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A774A1_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A774A1_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2785,6 +2792,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi<br/>index 117cb6950f91..3f15d656215e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774b1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774b1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774b1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a774b1.dtsi</a></div><div class='hunk'>@@ -108,6 +108,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -115,6 +116,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -146,6 +148,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -284,6 +288,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a774b1";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -364,11 +369,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a774b1-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1063,7 +1070,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A774B1_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A774B1_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2661,6 +2668,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts<br/>index 5a6ea08ffd2b..57a281fc4977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts</a></div><div class='hunk'>@@ -208,8 +208,7 @@</div><div class='ctx'> 	hd3ss3220@47 {</div><div class='ctx'> 		compatible = "ti,hd3ss3220";</div><div class='ctx'> 		reg = &lt;0x47&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio6 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -232,8 +231,7 @@</div><div class='ctx'> 	tda19988: tda19988@70 {</div><div class='ctx'> 		compatible = "nxp,tda998x";</div><div class='ctx'> 		reg = &lt;0x70&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		video-ports = &lt;0x234501&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -380,6 +378,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -414,8 +413,7 @@</div><div class='ctx'> 	wlcore: wlcore@2 {</div><div class='ctx'> 		compatible = "ti,wl1837";</div><div class='ctx'> 		reg = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi<br/>index 7655d5e3a034..55df063cb323 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774c0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774c0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774c0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a774c0.dtsi</a></div><div class='hunk'>@@ -47,16 +47,20 @@</div><div class='ctx'> 	cluster1_opp: opp-table-1 {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='add'>+</div><div class='ctx'> 		opp-800000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1200000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -103,6 +107,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -134,6 +139,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -257,6 +264,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a774c0";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x508&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -337,11 +345,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a774c0-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1019,7 +1029,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A774C0_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A774C0_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1953,6 +1963,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi<br/>index f845ca604de0..5d730b488d46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774e1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a774e1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a774e1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a774e1.dtsi</a></div><div class='hunk'>@@ -277,6 +277,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -284,6 +285,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -326,6 +328,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -464,6 +468,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a774e1";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -544,11 +549,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a774e1-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1291,7 +1298,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A774E1_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A774E1_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2917,6 +2924,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi<br/>index 96f3b5fe7e92..c389ebc7e6ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77951.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77951.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77951.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77951.dtsi</a></div><div class='hunk'>@@ -292,6 +292,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -299,6 +300,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -347,6 +349,7 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -485,6 +488,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7795";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -565,11 +569,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7795-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1367,7 +1373,7 @@</div><div class='ctx'> 			       &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A7795_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -3398,6 +3404,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi<br/>index ee80f52dc7cf..6d039019905d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77960.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77960.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77960.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77960.dtsi</a></div><div class='hunk'>@@ -264,6 +264,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -271,6 +272,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -311,6 +313,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -449,6 +453,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a7796";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -529,11 +534,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a7796-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1238,7 +1245,7 @@</div><div class='ctx'> 			       &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A7796_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A7796_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2996,6 +3003,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi<br/>index 3b9066043a71..1637b534fc68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77961.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77961.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77961.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77961.dtsi</a></div><div class='hunk'>@@ -264,6 +264,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -271,6 +272,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -311,6 +313,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -449,6 +453,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77961";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -529,11 +534,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77961-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1238,7 +1245,7 @@</div><div class='ctx'> 			       &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A77961_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A77961_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2817,6 +2824,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi<br/>index 557bdf8fab17..353a77187089 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77965.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77965.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77965.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77965.dtsi</a></div><div class='hunk'>@@ -143,6 +143,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -150,6 +151,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -182,6 +184,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -320,6 +324,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77965";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -400,11 +405,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77965-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1101,7 +1108,7 @@</div><div class='ctx'> 			       &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A77965_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A77965_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2828,6 +2835,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso b/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso<br/>index 3aa243c5f04c..0c005660d8dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-		vin0_adv7612_en {</div><div class='add'>+		vin0-adv7612-en-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='ctx'> 			gpios = &lt;3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			output-high;</div><div class='hunk'>@@ -82,8 +82,7 @@</div><div class='ctx'> 		compatible = "adi,adv7612";</div><div class='ctx'> 		reg = &lt;0x4c&gt;, &lt;0x50&gt;, &lt;0x52&gt;, &lt;0x54&gt;, &lt;0x56&gt;, &lt;0x58&gt;;</div><div class='ctx'> 		reg-names = "main", "afe", "rep", "edid", "hdmi", "cp";</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-		interrupts = &lt;2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		default-input = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='hunk'>@@ -114,8 +113,8 @@</div><div class='ctx'> 		       0x60 0x61 0x62 0x63 0x64 0x65&gt;;</div><div class='ctx'> 		reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",</div><div class='ctx'> 			    "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-		interrupts = &lt;03 IRQ_TYPE_LEVEL_LOW&gt;, &lt;04 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 3 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gpio3 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-names = "intrq1", "intrq2";</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts<br/>index 0608dce92e40..8b594e9e9dc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-eagle.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77970-eagle.dts</a></div><div class='hunk'>@@ -111,8 +111,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -172,8 +171,7 @@</div><div class='ctx'> 	hdmi@39 {</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		avdd-supply = &lt;&amp;d1p8&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;d1p8&gt;;</div><div class='hunk'>@@ -411,6 +409,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts<br/>index e36999e91af5..445f5dd7c983 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts</a></div><div class='hunk'>@@ -117,8 +117,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 17 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -149,8 +148,7 @@</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		avdd-supply = &lt;&amp;vcc_d1_8v&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;vcc_d1_8v&gt;;</div><div class='ctx'> 		pvdd-supply = &lt;&amp;vcc_d1_8v&gt;;</div><div class='hunk'>@@ -298,6 +296,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi<br/>index 38145fd6acf0..e7a5800bf742 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77970.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77970.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77970.dtsi</a></div><div class='hunk'>@@ -60,6 +60,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -67,6 +68,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu_a53 {</div><div class='hunk'>@@ -91,6 +93,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -200,6 +203,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77970";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x504&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -280,11 +284,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77970-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -562,7 +568,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A77970_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A77970_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1196,6 +1202,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts<br/>index 77d22df25fff..c2692d6fd00d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts</a></div><div class='hunk'>@@ -124,8 +124,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -141,8 +140,7 @@</div><div class='ctx'> 		compatible = "adi,adv7511w";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		reg = &lt;0x39&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 20 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		avdd-supply = &lt;&amp;vcc1v8_d4&gt;;</div><div class='ctx'> 		dvdd-supply = &lt;&amp;vcc1v8_d4&gt;;</div><div class='ctx'> 		pvdd-supply = &lt;&amp;vcc1v8_d4&gt;;</div><div class='hunk'>@@ -284,6 +282,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;, &lt;&amp;scif_clk_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi<br/>index 55a6c622f873..964aa14f3e65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77980.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77980.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77980.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77980.dtsi</a></div><div class='hunk'>@@ -80,6 +80,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -87,6 +88,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -120,6 +122,7 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -229,6 +232,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77980";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x50c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -309,11 +313,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77980-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -615,7 +621,7 @@</div><div class='ctx'> 				 &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A77980_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A77980_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -1579,6 +1585,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi<br/>index 233af3081e84..e16ede6eb379 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77990.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77990.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77990.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77990.dtsi</a></div><div class='hunk'>@@ -47,16 +47,20 @@</div><div class='ctx'> 	cluster1_opp: opp-table-1 {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='add'>+</div><div class='ctx'> 		opp-800000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1000000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1200000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1030000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;300000&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -118,6 +122,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* External PCIe clock - can be overridden by the board */</div><div class='hunk'>@@ -149,6 +154,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -272,6 +279,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77990";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x508&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c_dvfs: i2c@e60b0000 {</div><div class='hunk'>@@ -368,11 +376,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77990-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1051,7 +1061,7 @@</div><div class='ctx'> 			       &lt;&amp;can_clk&gt;;</div><div class='ctx'> 			clock-names = "fck", "canfd", "can_clk";</div><div class='ctx'> 			assigned-clocks = &lt;&amp;cpg CPG_CORE R8A77990_CLK_CANFD&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;40000000&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A77990_PD_ALWAYS_ON&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 914&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='hunk'>@@ -2117,6 +2127,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi<br/>index 5f0828a4675b..b66cd7c90d53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77995.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a77995.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a77995.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a77995.dtsi</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu_a53 {</div><div class='hunk'>@@ -86,6 +87,8 @@</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -209,6 +212,7 @@</div><div class='ctx'> 		pfc: pinctrl@e6060000 {</div><div class='ctx'> 			compatible = "renesas,pfc-r8a77995";</div><div class='ctx'> 			reg = &lt;0 0xe6060000 0 0x508&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='hunk'>@@ -289,11 +293,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a77995-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x0200&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -1448,6 +1454,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi<br/>index 99b73e21c82c..0916fd57d1f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi</a></div><div class='hunk'>@@ -208,8 +208,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;sn65dsi86_refclk&gt;;</div><div class='ctx'> 		clock-names = "refclk";</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;intc_ex&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		vccio-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='ctx'> 		vpll-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -349,6 +348,7 @@</div><div class='ctx'> &amp;scif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi<br/>index e11bf9ace776..2a8537e13873 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi</a></div><div class='hunk'>@@ -5,6 +5,121 @@</div><div class='ctx'>  * Copyright (C) 2021 Glider bv</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;avb1;</div><div class='add'>+		ethernet2 = &amp;avb2;</div><div class='add'>+		ethernet3 = &amp;avb3;</div><div class='add'>+		ethernet4 = &amp;avb4;</div><div class='add'>+		ethernet5 = &amp;avb5;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb1_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio5 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb1_phy: ethernet-phy@7 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio5 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb2_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio6 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb2_phy: ethernet-phy@7 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio6 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb3_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio7 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb3_phy: ethernet-phy@7 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio7 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb4_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb4_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio8 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb4_phy: ethernet-phy@7 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio8 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avb5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb5_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb5_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio9 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		avb5_phy: ethernet-phy@7 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio9 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	eeprom@53 {</div><div class='ctx'> 		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='hunk'>@@ -13,3 +128,130 @@</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pfc {</div><div class='add'>+	avb1_pins: avb1 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb1_link", "avb1_mdio", "avb1_rgmii",</div><div class='add'>+				 "avb1_txcrefclk";</div><div class='add'>+			function = "avb1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb1_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb1_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb1_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb2_pins: avb2 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb2_link", "avb2_mdio", "avb2_rgmii",</div><div class='add'>+				 "avb2_txcrefclk";</div><div class='add'>+			function = "avb2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb2_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb2_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb2_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb3_pins: avb3 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb3_link", "avb3_mdio", "avb3_rgmii",</div><div class='add'>+				 "avb3_txcrefclk";</div><div class='add'>+			function = "avb3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb3_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb3_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb3_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb4_pins: avb4 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb4_link", "avb4_mdio", "avb4_rgmii",</div><div class='add'>+				 "avb4_txcrefclk";</div><div class='add'>+			function = "avb4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb4_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb4_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb4_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	avb5_pins: avb5 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb5_link", "avb5_mdio", "avb5_rgmii",</div><div class='add'>+				 "avb5_txcrefclk";</div><div class='add'>+			function = "avb5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "avb5_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "avb5_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "avb5_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts<br/>index 63db822e5f46..6bd580737f25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts</a></div><div class='hunk'>@@ -31,8 +31,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio4 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio4 15 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi<br/>index 1f4ab27acc33..2c3fb34abb28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779a0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779a0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779a0.dtsi</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -54,6 +55,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu_a76 {</div><div class='hunk'>@@ -71,6 +73,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -93,6 +97,7 @@</div><div class='ctx'> 			      &lt;0 0xe6060000 0 0x16c&gt;, &lt;0 0xe6060800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6068000 0 0x16c&gt;, &lt;0 0xe6068800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6069000 0 0x16c&gt;, &lt;0 0xe6069800 0 0x16c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@e6058180 {</div><div class='hunk'>@@ -245,6 +250,14 @@</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		fuse: fuse@e6078800 {</div><div class='add'>+			compatible = "renesas,r8a779a0-efuse";</div><div class='add'>+			reg = &lt;0 0xe6078800 0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 916&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 916&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-cmt0",</div><div class='ctx'> 				     "renesas,rcar-gen4-cmt0";</div><div class='hunk'>@@ -323,11 +336,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x4000&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -757,8 +772,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_ds1 1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -806,8 +819,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_ds1 2&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -855,8 +866,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_ds1 3&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -904,8 +913,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_ds1 4&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -953,8 +960,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_ds1 11&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -2340,6 +2345,42 @@</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_vi1 7&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		fcpvx0: fcp@fedb0000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedb0000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1100&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 24&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fcpvx1: fcp@fedb8000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedb8000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1101&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1101&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 25&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fcpvx2: fcp@fedc0000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedc0000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1102&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1102&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 26&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fcpvx3: fcp@fedc8000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedc8000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1103&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1103&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 27&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vspd0: vsp@fea20000 {</div><div class='ctx'> 			compatible = "renesas,vsp2";</div><div class='ctx'> 			reg = &lt;0 0xfea20000 0 0x5000&gt;;</div><div class='hunk'>@@ -2362,6 +2403,50 @@</div><div class='ctx'> 			renesas,fcp = &lt;&amp;fcpvd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vspx0: vsp@fedd0000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfedd0000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1028&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1028&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspx1: vsp@fedd8000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfedd8000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1029&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1029&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspx2: vsp@fede0000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfede0000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1030&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1030&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspx3: vsp@fede8000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfede8000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1031&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1031&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		csi40: csi2@feaa0000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-csi2";</div><div class='ctx'> 			reg = &lt;0 0xfeaa0000 0 0x10000&gt;;</div><div class='hunk'>@@ -2503,13 +2588,20 @@</div><div class='ctx'> 		isp0: isp@fed00000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed00000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 612&gt;;</div><div class='add'>+			reg = &lt;0 0xfed00000 0 0x10000&gt;, &lt;0 0xfec00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 612&gt;, &lt;&amp;cpg CPG_MOD 16&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 612&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 612&gt;, &lt;&amp;cpg 16&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx0&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2587,13 +2679,20 @@</div><div class='ctx'> 		isp1: isp@fed20000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed20000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 613&gt;;</div><div class='add'>+			reg = &lt;0 0xfed20000 0 0x10000&gt;, &lt;0 0xfee00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 613&gt;, &lt;&amp;cpg CPG_MOD 17&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 613&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 613&gt;, &lt;&amp;cpg 17&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx1&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2671,13 +2770,20 @@</div><div class='ctx'> 		isp2: isp@fed30000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed30000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 614&gt;;</div><div class='add'>+			reg = &lt;0 0xfed30000 0 0x10000&gt;, &lt;0 0xfef00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 614&gt;, &lt;&amp;cpg CPG_MOD 18&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 614&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 614&gt;, &lt;&amp;cpg 18&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx2&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2755,13 +2861,20 @@</div><div class='ctx'> 		isp3: isp@fed40000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed40000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 615&gt;;</div><div class='add'>+			reg = &lt;0 0xfed40000 0 0x10000&gt;, &lt;0 0xfe400000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 615&gt;, &lt;&amp;cpg CPG_MOD 19&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP23&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 615&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 615&gt;, &lt;&amp;cpg 19&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx3&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2836,7 +2949,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsi0: dsi-encoder@fed80000 {</div><div class='add'>+		dsi0: dsi@fed80000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-dsi-csi2-tx";</div><div class='ctx'> 			reg = &lt;0 0xfed80000 0 0x10000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_ALWAYS_ON&gt;;</div><div class='hunk'>@@ -2864,7 +2977,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsi1: dsi-encoder@fed90000 {</div><div class='add'>+		dsi1: dsi@fed90000 {</div><div class='ctx'> 			compatible = "renesas,r8a779a0-dsi-csi2-tx";</div><div class='ctx'> 			reg = &lt;0 0xfed90000 0 0x10000&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779A0_PD_ALWAYS_ON&gt;;</div><div class='hunk'>@@ -2895,6 +3008,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi<br/>index 4ed8d4c37906..1781bb79a619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi</a></div><div class='hunk'>@@ -101,6 +101,7 @@</div><div class='ctx'> &amp;hscif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -171,7 +172,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pciec0 {</div><div class='del'>-	reset-gpio = &lt;&amp;gpio_exp_20 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio_exp_20 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi<br/>index 33c1015e9ab3..ad2b0398d354 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi</a></div><div class='hunk'>@@ -5,6 +5,14 @@</div><div class='ctx'>  * Copyright (C) 2021 Renesas Electronics Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;rswitch_port0;</div><div class='add'>+		ethernet1 = &amp;rswitch_port1;</div><div class='add'>+		ethernet2 = &amp;rswitch_port2;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;eth_serdes {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -42,64 +50,61 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;tsn0_pins&gt;, &lt;&amp;tsn1_pins&gt;, &lt;&amp;tsn2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rswitch_port0 {</div><div class='add'>+	reg = &lt;0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;u101&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-	ethernet-ports {</div><div class='add'>+	mdio {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			phy-handle = &lt;&amp;u101&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='del'>-			phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				u101: ethernet-phy@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-					interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-		port@1 {</div><div class='add'>+		u101: ethernet-phy@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			phy-handle = &lt;&amp;u201&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='del'>-			phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				u201: ethernet-phy@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-					interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		port@2 {</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rswitch_port1 {</div><div class='add'>+	reg = &lt;1&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;u201&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		u201: ethernet-phy@2 {</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='del'>-			phy-handle = &lt;&amp;u301&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='del'>-			phys = &lt;&amp;eth_serdes 2&gt;;</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				u301: ethernet-phy@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-					interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rswitch_port2 {</div><div class='add'>+	reg = &lt;2&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;u301&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phys = &lt;&amp;eth_serdes 2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		u301: ethernet-phy@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi<br/>index 9629adb47d99..b496495c59a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779f0.dtsi</a></div><div class='hunk'>@@ -253,6 +253,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -260,6 +261,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie0_clkref: pcie0-clkref {</div><div class='hunk'>@@ -296,6 +298,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -315,6 +319,7 @@</div><div class='ctx'> 			compatible = "renesas,pfc-r8a779f0";</div><div class='ctx'> 			reg = &lt;0 0xe6050000 0 0x16c&gt;, &lt;0 0xe6050800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6051000 0 0x16c&gt;, &lt;0 0xe6051800 0 0x16c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@e6050180 {</div><div class='hunk'>@@ -377,6 +382,14 @@</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		fuse: fuse@e6078800 {</div><div class='add'>+			compatible = "renesas,r8a779f0-efuse";</div><div class='add'>+			reg = &lt;0 0xe6078800 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 915&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779F0_PD_ALWAYS_ON&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 915&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cmt0: timer@e60f0000 {</div><div class='ctx'> 			compatible = "renesas,r8a779f0-cmt0",</div><div class='ctx'> 				     "renesas,rcar-gen4-cmt0";</div><div class='hunk'>@@ -455,11 +468,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a779f0-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x4000&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -966,17 +981,20 @@</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-				port@0 {</div><div class='add'>+				rswitch_port0: port@0 {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 					phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='del'>-				port@1 {</div><div class='add'>+				rswitch_port1: port@1 {</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> 					phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='del'>-				port@2 {</div><div class='add'>+				rswitch_port2: port@2 {</div><div class='ctx'> 					reg = &lt;2&gt;;</div><div class='ctx'> 					phys = &lt;&amp;eth_serdes 2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1272,6 +1290,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts<br/>index fa910b85859e..67b18f2bffbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts</a></div><div class='hunk'>@@ -22,7 +22,8 @@</div><div class='ctx'> 		i2c5 = &amp;i2c5;</div><div class='ctx'> 		serial0 = &amp;hscif0;</div><div class='ctx'> 		serial1 = &amp;hscif1;</div><div class='del'>-		ethernet0 = &amp;rswitch;</div><div class='add'>+		ethernet0 = &amp;rswitch_port0;</div><div class='add'>+		ethernet1 = &amp;rswitch_port1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -67,6 +68,7 @@</div><div class='ctx'> &amp;hscif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -179,51 +181,42 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;tsn0_pins&gt;, &lt;&amp;tsn1_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rswitch_port0 {</div><div class='add'>+	reg = &lt;0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ic99&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='del'>-	ethernet-ports {</div><div class='add'>+	mdio {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			phy-handle = &lt;&amp;ic99&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='del'>-			phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				ic99: ethernet-phy@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-					interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		port@1 {</div><div class='add'>+		ic99: ethernet-phy@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='del'>-			phy-handle = &lt;&amp;ic102&gt;;</div><div class='del'>-			phy-mode = "sgmii";</div><div class='del'>-			phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='del'>-</div><div class='del'>-			mdio {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				ic102: ethernet-phy@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-					interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-					interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rswitch_port1 {</div><div class='add'>+	reg = &lt;1&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;ic102&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@2 {</div><div class='del'>-			status = "disabled";</div><div class='add'>+		ic102: ethernet-phy@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio3 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779f4.dtsi b/arch/arm64/boot/dts/renesas/r8a779f4.dtsi<br/>index ebed41892df3..b216d605c321 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779f4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779f4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779f4.dtsi</a></div><div class='hunk'>@@ -10,3 +10,20 @@</div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "renesas,r8a779f4", "renesas,r8a779f0";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;fuse {</div><div class='add'>+	nvmem-layout {</div><div class='add'>+		compatible = "fixed-layout";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ufs_tune: calib@144 {</div><div class='add'>+			reg = &lt;0x144 0x08&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs {</div><div class='add'>+	nvmem-cells = &lt;&amp;ufs_tune&gt;;</div><div class='add'>+	nvmem-cell-names = "calibration";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi<br/>index 12900ebd098b..4fae063bf91b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g0.dtsi</a></div><div class='hunk'>@@ -166,6 +166,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr {</div><div class='hunk'>@@ -173,6 +174,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie0_clkref: pcie0-clkref {</div><div class='hunk'>@@ -215,6 +217,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -237,6 +241,7 @@</div><div class='ctx'> 			      &lt;0 0xe6060000 0 0x16c&gt;, &lt;0 0xe6060800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6061000 0 0x16c&gt;, &lt;0 0xe6061800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6068000 0 0x16c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@e6050180 {</div><div class='hunk'>@@ -452,11 +457,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a779g0-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x4000&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -477,6 +484,11 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		otp: otp@e61be000 {</div><div class='add'>+			compatible = "renesas,r8a779g0-otp";</div><div class='add'>+			reg = &lt;0 0xe61be000 0 0x1000&gt;, &lt;0 0xe61bf000 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		intc_ex: interrupt-controller@e61c0000 {</div><div class='ctx'> 			compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc";</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -786,6 +798,16 @@</div><div class='ctx'> 					&lt;0 0 0 4 &amp;gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			snps,enable-cdm-check;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			/* PCIe bridge, Root Port */</div><div class='add'>+			pciec0_rp: pci@0,0 {</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				compatible = "pciclass,0604";</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pciec1: pcie@e65d8000 {</div><div class='hunk'>@@ -823,6 +845,16 @@</div><div class='ctx'> 					&lt;0 0 0 4 &amp;gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			snps,enable-cdm-check;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			/* PCIe bridge, Root Port */</div><div class='add'>+			pciec1_rp: pci@0,0 {</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+				compatible = "pciclass,0604";</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				ranges;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pciec0_ep: pcie-ep@e65d0000 {</div><div class='hunk'>@@ -2166,6 +2198,24 @@</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_vi1 7&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		fcpvx0: fcp@fedb0000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedb0000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP0&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1100&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 24&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fcpvx1: fcp@fedb8000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedb8000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1101&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP1&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1101&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 25&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		vspd0: vsp@fea20000 {</div><div class='ctx'> 			compatible = "renesas,vsp2";</div><div class='ctx'> 			reg = &lt;0 0xfea20000 0 0x7000&gt;;</div><div class='hunk'>@@ -2188,6 +2238,28 @@</div><div class='ctx'> 			renesas,fcp = &lt;&amp;fcpvd1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		vspx0: vsp@fedd0000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfedd0000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1028&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP0&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1028&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspx1: vsp@fedd8000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfedd8000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1029&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP1&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1029&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		du: display@feb00000 {</div><div class='ctx'> 			compatible = "renesas,du-r8a779g0";</div><div class='ctx'> 			reg = &lt;0 0xfeb00000 0 0x40000&gt;;</div><div class='hunk'>@@ -2225,13 +2297,20 @@</div><div class='ctx'> 		isp0: isp@fed00000 {</div><div class='ctx'> 			compatible = "renesas,r8a779g0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed00000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 612&gt;;</div><div class='add'>+			reg = &lt;0 0xfed00000 0 0x10000&gt;, &lt;0 0xfec00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 612&gt;, &lt;&amp;cpg CPG_MOD 16&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP0&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 612&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 612&gt;, &lt;&amp;cpg 16&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx0&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2309,13 +2388,20 @@</div><div class='ctx'> 		isp1: isp@fed20000 {</div><div class='ctx'> 			compatible = "renesas,r8a779g0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed20000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 613&gt;;</div><div class='add'>+			reg = &lt;0 0xfed20000 0 0x10000&gt;, &lt;0 0xfee00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 613&gt;, &lt;&amp;cpg CPG_MOD 17&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779G0_PD_A3ISP1&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 613&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 613&gt;, &lt;&amp;cpg 17&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx1&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -2390,7 +2476,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsi0: dsi-encoder@fed80000 {</div><div class='add'>+		dsi0: dsi@fed80000 {</div><div class='ctx'> 			compatible = "renesas,r8a779g0-dsi-csi2-tx";</div><div class='ctx'> 			reg = &lt;0 0xfed80000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_MOD 415&gt;,</div><div class='hunk'>@@ -2419,7 +2505,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dsi1: dsi-encoder@fed90000 {</div><div class='add'>+		dsi1: dsi@fed90000 {</div><div class='ctx'> 			compatible = "renesas,r8a779g0-dsi-csi2-tx";</div><div class='ctx'> 			reg = &lt;0 0xfed90000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_MOD 416&gt;,</div><div class='hunk'>@@ -2451,6 +2537,7 @@</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts<br/>index 50a428572d9b..48befde38937 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts</a></div><div class='hunk'>@@ -7,71 +7,10 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include "r8a779g2.dtsi"</div><div class='del'>-#include "white-hawk-cpu-common.dtsi"</div><div class='del'>-#include "white-hawk-common.dtsi"</div><div class='add'>+#include "white-hawk-single.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Renesas White Hawk Single board based on r8a779g2";</div><div class='ctx'> 	compatible = "renesas,white-hawk-single", "renesas,r8a779g2",</div><div class='ctx'> 		     "renesas,r8a779g0";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;hscif0 {</div><div class='del'>-	uart-has-rtscts;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hscif0_pins {</div><div class='del'>-	groups = "hscif0_data", "hscif0_ctrl";</div><div class='del'>-	function = "hscif0";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pfc {</div><div class='del'>-	tsn0_pins: tsn0 {</div><div class='del'>-		mux {</div><div class='del'>-			groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",</div><div class='del'>-				 "tsn0_txcrefclk";</div><div class='del'>-			function = "tsn0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		link {</div><div class='del'>-			groups = "tsn0_link";</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mdio {</div><div class='del'>-			groups = "tsn0_mdio";</div><div class='del'>-			drive-strength = &lt;24&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rgmii {</div><div class='del'>-			groups = "tsn0_rgmii";</div><div class='del'>-			drive-strength = &lt;24&gt;;</div><div class='del'>-			bias-disable;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsn0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;tsn0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	phy-mode = "rgmii";</div><div class='del'>-	phy-handle = &lt;&amp;phy3&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mdio {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		reset-post-delay-us = &lt;4000&gt;;</div><div class='del'>-</div><div class='del'>-		phy3: ethernet-phy@0 {</div><div class='del'>-			compatible = "ethernet-phy-id002b.0980",</div><div class='del'>-				     "ethernet-phy-ieee802.3-c22";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-			interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso<br/>new file mode 100644<br/>index 000000000000..3acaf714cf24<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx219.dtso</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Overlay for an IMX219 camera sensor on connector J1 on R-Car V4H</div><div class='add'>+ * ES3.0 Sparrow Hawk board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Renesas Electronics Corp.</div><div class='add'>+ * Copyright 2025 Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_cam_j1: clk-cam-j1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / J1 */</div><div class='add'>+	reg_cam_j1: reg-cam-j1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cam-J1";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cam@10 {</div><div class='add'>+		compatible = "sony,imx219";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;clk_cam_j1&gt;;</div><div class='add'>+</div><div class='add'>+		VANA-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+		VDIG-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+		VDDL-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+</div><div class='add'>+		orientation = &lt;2&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx219_j1_out: endpoint {</div><div class='add'>+				clock-noncontinuous;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csi40_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN */</div><div class='add'>+&amp;csi40 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi40_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx219_j1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin00 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin01 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin02 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin03 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin04 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin05 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin07 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso<br/>new file mode 100644<br/>index 000000000000..a19bc0840392<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j1-imx462.dtso</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Overlay for an IMX462 camera sensor on connector J1 on R-Car V4H</div><div class='add'>+ * ES3.0 Sparrow Hawk board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Renesas Electronics Corp.</div><div class='add'>+ * Copyright 2025 Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_cam_j1: clk-cam-j1 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;37125000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / J1 */</div><div class='add'>+	reg_cam_j1: reg-cam-j1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cam-J1";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cam@1a {</div><div class='add'>+		compatible = "sony,imx462lqr";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;clk_cam_j1&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		clock-frequency = &lt;37125000&gt;;</div><div class='add'>+</div><div class='add'>+		vdddo-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+		vdda-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+		vddd-supply = &lt;&amp;reg_cam_j1&gt;;</div><div class='add'>+</div><div class='add'>+		orientation = &lt;2&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx462_j1_out: endpoint {</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;222750000 148500000&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csi40_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN */</div><div class='add'>+&amp;csi40 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi40_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx462_j1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin00 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin01 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin02 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin03 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin04 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin05 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin06 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin07 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso<br/>new file mode 100644<br/>index 000000000000..512810b861aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx219.dtso</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Overlay for an IMX219 camera sensor on connector J2 on R-Car V4H</div><div class='add'>+ * ES3.0 Sparrow Hawk board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Renesas Electronics Corp.</div><div class='add'>+ * Copyright 2025 Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_cam_j2: clk-cam-j2 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / J2 */</div><div class='add'>+	reg_cam_j2: reg-cam-j2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cam-J2";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cam@10 {</div><div class='add'>+		compatible = "sony,imx219";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;clk_cam_j2&gt;;</div><div class='add'>+</div><div class='add'>+		VANA-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+		VDIG-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+		VDDL-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+</div><div class='add'>+		orientation = &lt;2&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx219_j2_out: endpoint {</div><div class='add'>+				clock-noncontinuous;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csi41_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN */</div><div class='add'>+&amp;csi41 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi41_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx219_j2_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin08 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin09 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso<br/>new file mode 100644<br/>index 000000000000..a31524b59834<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-camera-j2-imx462.dtso</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Overlay for an IMX462 camera sensor on connector J2 on R-Car V4H</div><div class='add'>+ * ES3.0 Sparrow Hawk board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Renesas Electronics Corp.</div><div class='add'>+ * Copyright 2025 Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_cam_j2: clk-cam-j2 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;37125000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / J2 */</div><div class='add'>+	reg_cam_j2: reg-cam-j2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "cam-J2";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cam@1a {</div><div class='add'>+		compatible = "sony,imx462lqr";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;clk_cam_j2&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		clock-frequency = &lt;37125000&gt;;</div><div class='add'>+</div><div class='add'>+		vdddo-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+		vdda-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+		vddd-supply = &lt;&amp;reg_cam_j2&gt;;</div><div class='add'>+</div><div class='add'>+		orientation = &lt;2&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx462_j2_out: endpoint {</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;222750000 148500000&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;csi41_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN */</div><div class='add'>+&amp;csi41 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			csi41_in: endpoint {</div><div class='add'>+				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;imx462_j2_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin08 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin09 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin10 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin11 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin12 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin13 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin14 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vin15 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso<br/>new file mode 100644<br/>index 000000000000..fbfec57db11e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-fan-pwm.dtso</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Overlay for the PWM controlled blower fan on connector J3:FAN</div><div class='add'>+ * on R-Car V4H ES3.0 Sparrow Hawk board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Example usage:</div><div class='add'>+ *</div><div class='add'>+ * # Localize hwmon sysfs directory that matches the PWM fan,</div><div class='add'>+ * # enable the PWM fan, and configure the fan speed manually.</div><div class='add'>+ * r8a779g3-sparrow-hawk$ ls -1 /sys/devices/platform/pwm-fan/hwmon/hwmon?/pwm?_enable</div><div class='add'>+ * /sys/devices/platform/pwm-fan/hwmon/hwmon4/pwm1_enable</div><div class='add'>+ *</div><div class='add'>+ * # Select mode 2 , enable fan PWM and regulator and keep them enabled.</div><div class='add'>+ * # For details, see Linux Documentation/hwmon/pwm-fan.rst</div><div class='add'>+ * r8a779g3-sparrow-hawk$ echo 2 &gt; /sys/devices/platform/pwm-fan/hwmon/hwmon4/pwm1_enable</div><div class='add'>+ *</div><div class='add'>+ * # Configure PWM fan speed in range 0..255 , 0 is stopped , 255 is full speed .</div><div class='add'>+ * # Fan speed 101 is about 2/5 of the PWM fan speed:</div><div class='add'>+ * r8a779g3-sparrow-hawk$ echo 101 &gt; /sys/devices/platform/pwm-fan/hwmon/hwmon4/pwm1</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Override default PWM fan settings. For a list of available properties,</div><div class='add'>+ * see schema Documentation/devicetree/bindings/hwmon/pwm-fan.yaml .</div><div class='add'>+ */</div><div class='add'>+&amp;fan {</div><div class='add'>+	/* Available cooling levels */</div><div class='add'>+	cooling-levels = &lt;0 50 100 150 200 255&gt;;</div><div class='add'>+	/* Four pulses of tacho signal per one revolution */</div><div class='add'>+	pulses-per-revolution = &lt;4&gt;;</div><div class='add'>+	/* PWM period: 100us ~= 10 kHz */</div><div class='add'>+	pwms = &lt;&amp;pwm0 0 100000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts<br/>new file mode 100644<br/>index 000000000000..1da8e476b219<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts</a></div><div class='hunk'>@@ -0,0 +1,944 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R-Car V4H ES3.0 Sparrow Hawk board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * DA7212 Codec settings</div><div class='add'>+ *</div><div class='add'>+ * for Playback</div><div class='add'>+ *	&gt; amixer set "Headphone" 40%</div><div class='add'>+ *	&gt; amixer set "Headphone" on</div><div class='add'>+ *	&gt; amixer set "Mixout Left DAC Left"  on</div><div class='add'>+ *	&gt; amixer set "Mixout Right DAC Right" on</div><div class='add'>+ *	&gt; aplay xxx.wav</div><div class='add'>+ *</div><div class='add'>+ * for Capture (Aux/Mic)</div><div class='add'>+ *</div><div class='add'>+ *		on/off (B)</div><div class='add'>+ *	CONN3 (HeadSet) ---+----&gt; MSIOF1</div><div class='add'>+ *			   |</div><div class='add'>+ *	CONN4 AUX ---------+ on/off (A)</div><div class='add'>+ *</div><div class='add'>+ *	&gt; amixer set "Mixin PGA" on</div><div class='add'>+ *	&gt; amixer set "Mixin PGA" 50%</div><div class='add'>+ *	&gt; amixer set "ADC" on</div><div class='add'>+ *	&gt; amixer set "ADC" 80%</div><div class='add'>+ *	&gt; amixer set "Aux" on				^</div><div class='add'>+ *	&gt; amixer set "Aux" 80%				| (A)</div><div class='add'>+ *	&gt; amixer set "Mixin Left Aux Left" on		|</div><div class='add'>+ *	&gt; amixer set "Mixin Right Aux Right" on		v</div><div class='add'>+ *	&gt; amixer set "Mic 1" on				^</div><div class='add'>+ *	&gt; amixer set "Mic 1" 80%			| (B)</div><div class='add'>+ *	&gt; amixer set "Mixin Left Mic 1" on		|</div><div class='add'>+ *	&gt; amixer set "Mixin Right Mic 1" on		v</div><div class='add'>+ *	&gt; arecord -f cd xxx.wav</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "r8a779g3.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Retronix Sparrow Hawk board based on r8a779g3";</div><div class='add'>+	compatible = "retronix,sparrow-hawk", "renesas,r8a779g3",</div><div class='add'>+		     "renesas,r8a779g0";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;avb0;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c5 = &amp;i2c5;</div><div class='add'>+		serial0 = &amp;hscif0;</div><div class='add'>+		serial1 = &amp;hscif1;</div><div class='add'>+		serial2 = &amp;hscif3;</div><div class='add'>+		spi0 = &amp;rpc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";</div><div class='add'>+		stdout-path = "serial0:921600n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / FAN */</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		pinctrl-0 = &lt;&amp;irq4_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * The fan model connected to this device can be selected</div><div class='add'>+		 * by user. Set "cooling-levels" DT property to single 255</div><div class='add'>+		 * entry to force the fan PWM into constant HIGH, which</div><div class='add'>+		 * forces the fan to spin at maximum RPM, thus providing</div><div class='add'>+		 * maximum cooling to this device and protection against</div><div class='add'>+		 * misconfigured PWM duty cycle to the fan.</div><div class='add'>+		 *</div><div class='add'>+		 * User has to configure "pwms" and "pulses-per-revolution"</div><div class='add'>+		 * DT properties according to fan datasheet first, and then</div><div class='add'>+		 * extend "cooling-levels = &lt;0 m n ... 255&gt;" property to</div><div class='add'>+		 * achieve proper fan control compatible with fan model</div><div class='add'>+		 * installed by user.</div><div class='add'>+		 */</div><div class='add'>+		cooling-levels = &lt;255&gt;;</div><div class='add'>+		pulses-per-revolution = &lt;2&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 50000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Page 15 / LPDDR5</div><div class='add'>+	 *</div><div class='add'>+	 * This configuration listed below is for the 8 GiB board variant</div><div class='add'>+	 * with MT62F1G64D8EK-023 WT:C LPDDR5 part populated on the board.</div><div class='add'>+	 *</div><div class='add'>+	 * A variant with 16 GiB MT62F2G64D8EK-023 WT:C part populated on</div><div class='add'>+	 * the board is automatically handled by the bootloader, which</div><div class='add'>+	 * adjusts the correct DRAM size into the memory nodes below.</div><div class='add'>+	 */</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* first 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x0 0x78000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@480000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x4 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@600000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x6 0x00000000 0x1 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 27 / DSI to Display */</div><div class='add'>+	mini-dp-con {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "CN6";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mini_dp_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;sn65dsi86_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 26 / PCIe.0/1 CLK */</div><div class='add'>+	pcie_refclk: clk-x8 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p2v: regulator-1p2v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.2V";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 27 / DSI to Display */</div><div class='add'>+	sn65dsi86_refclk: clk-x9 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;38400000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 30 / Audio_Codec */</div><div class='add'>+	sound_card: sound {</div><div class='add'>+		compatible = "audio-graph-card2";</div><div class='add'>+		links = &lt;&amp;msiof1_snd&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 17 uSD-Slot */</div><div class='add'>+	vcc_sdhi: regulator-vcc-sdhi {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI VccQ";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio8 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios-states = &lt;1&gt;;</div><div class='add'>+		states = &lt;1800000 0&gt;, &lt;3300000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Use thermal-idle cooling for all SoC cores */</div><div class='add'>+&amp;a76_0 {</div><div class='add'>+	#cooling-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	a76_0_thermal_idle: thermal-idle {</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		duration-us = &lt;10000&gt;;</div><div class='add'>+		exit-latency-us = &lt;500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;a76_1 {</div><div class='add'>+	a76_1_thermal_idle: thermal-idle {</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		duration-us = &lt;10000&gt;;</div><div class='add'>+		exit-latency-us = &lt;500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;a76_2 {</div><div class='add'>+	a76_2_thermal_idle: thermal-idle {</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		duration-us = &lt;10000&gt;;</div><div class='add'>+		exit-latency-us = &lt;500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;a76_3 {</div><div class='add'>+	a76_3_thermal_idle: thermal-idle {</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		duration-us = &lt;10000&gt;;</div><div class='add'>+		exit-latency-us = &lt;500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audio_clkin {</div><div class='add'>+	clock-frequency = &lt;24576000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 22 / Ether_AVB0 */</div><div class='add'>+&amp;avb0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;avb0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;avb0_phy&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		avb0_phy: ethernet-phy@0 {	/* KSZ9031RNXVB */</div><div class='add'>+			compatible = "ethernet-phy-id0022.1622",</div><div class='add'>+				     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			rxc-skew-ps = &lt;1500&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			/* AVB0_PHY_INT_V */</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio7 5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			/* GP7_10/AVB0_RESETN_V */</div><div class='add'>+			reset-gpios = &lt;&amp;gpio7 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 28 / CANFD_IF */</div><div class='add'>+&amp;can_clk {</div><div class='add'>+	clock-frequency = &lt;40000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 28 / CANFD_IF */</div><div class='add'>+&amp;canfd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;canfd3_pins&gt;, &lt;&amp;canfd4_pins&gt;, &lt;&amp;can_clk_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	channel3 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	channel4 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 27 / DSI to Display */</div><div class='add'>+&amp;dsi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			dsi1_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;sn65dsi86_in&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 27 / DSI to Display */</div><div class='add'>+&amp;du {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 5 / R-Car V4H_INT_I2C */</div><div class='add'>+&amp;extal_clk {	/* X3 */</div><div class='add'>+	clock-frequency = &lt;16666666&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 5 / R-Car V4H_INT_I2C */</div><div class='add'>+&amp;extalr_clk {	/* X2 */</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 26 / 2230 Key M M.2 */</div><div class='add'>+&amp;gpio4 {</div><div class='add'>+	/* 9FGV0441 nOE inputs 0 and 1 */</div><div class='add'>+	pcie-m2-oe-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "PCIe-CLK-nOE-M2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 9FGV0441 nOE inputs 2 and 3 */</div><div class='add'>+	pcie-usb-oe-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "PCIe-CLK-nOE-USB";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 23 / DEBUG */</div><div class='add'>+&amp;hscif0 {	/* FTDI ADBUS[3:0] */</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	bootph-all;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 23 / DEBUG */</div><div class='add'>+&amp;hscif1 {	/* FTDI BDBUS[3:0] */</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 24 / UART */</div><div class='add'>+&amp;hscif3 {	/* CN7 pins 8 (TX) and 10 (RX) */</div><div class='add'>+	pinctrl-0 = &lt;&amp;hscif3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 24 / I2C SWITCH */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mux@71 {</div><div class='add'>+		compatible = "nxp,pca9544";	/* TCA9544 */</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+		i2c0_mux0: i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			/* Page 27 / DSI to Display */</div><div class='add'>+			bridge@2c {</div><div class='add'>+				pinctrl-0 = &lt;&amp;irq0_pins&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+				compatible = "ti,sn65dsi86";</div><div class='add'>+				reg = &lt;0x2c&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;sn65dsi86_refclk&gt;;</div><div class='add'>+				clock-names = "refclk";</div><div class='add'>+</div><div class='add'>+				interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				enable-gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+				vccio-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				vpll-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				vcca-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+				vcc-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+				ports {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					port@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						sn65dsi86_in: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;dsi1_out&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					port@1 {</div><div class='add'>+						reg = &lt;1&gt;;</div><div class='add'>+						sn65dsi86_out: endpoint {</div><div class='add'>+							remote-endpoint = &lt;&amp;mini_dp_con_in&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0_mux1: i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			/* Page 30 / Audio_Codec */</div><div class='add'>+			codec@1a {</div><div class='add'>+				compatible = "dlg,da7212";</div><div class='add'>+</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+				clocks = &lt;&amp;rcar_sound&gt;;</div><div class='add'>+				clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+				VDDA-supply   = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				VDDMIC-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+				VDDIO-supply  = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+				port {</div><div class='add'>+					da7212_endpoint: endpoint {</div><div class='add'>+						bitclock-master;</div><div class='add'>+						frame-master;</div><div class='add'>+						remote-endpoint = &lt;&amp;msiof1_snd_endpoint&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0_mux2: i2c@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			/* Page 26 / PCIe.0/1 CLK */</div><div class='add'>+			pcie_clk: clk@68 {</div><div class='add'>+				compatible = "renesas,9fgv0441";</div><div class='add'>+				reg = &lt;0x68&gt;;</div><div class='add'>+				clocks = &lt;&amp;pcie_refclk&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0_mux3: i2c@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN / CAM_CN0 */</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 29 / CSI_IF_CN / CAM_CN1 */</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / IO_CN */</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / IO_CN */</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 18 / POWER_CORE and Page 19 / POWER_PMIC */</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 17 uSD-Slot */</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sd_uhs_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio3 11 GPIO_ACTIVE_LOW&gt;;	/* SD_CD */</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_sdhi&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;msiof1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;msiof1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* ignore DT warning */</div><div class='add'>+	/delete-property/#address-cells;</div><div class='add'>+	/delete-property/#size-cells;</div><div class='add'>+</div><div class='add'>+	msiof1_snd: port {</div><div class='add'>+		msiof1_snd_endpoint: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;da7212_endpoint&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 26 / 2230 Key M M.2 */</div><div class='add'>+&amp;pcie0_clkref {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciec0 {</div><div class='add'>+	clocks = &lt;&amp;cpg CPG_MOD 624&gt;, &lt;&amp;pcie_clk 0&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciec0_rp {</div><div class='add'>+	clocks = &lt;&amp;pcie_clk 1&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 25 / PCIe to USB */</div><div class='add'>+&amp;pcie1_clkref {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciec1 {</div><div class='add'>+	clocks = &lt;&amp;cpg CPG_MOD 625&gt;, &lt;&amp;pcie_clk 2&gt;;</div><div class='add'>+	/* uPD720201 is PCIe Gen2 x1 device */</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pciec1_rp {</div><div class='add'>+	clocks = &lt;&amp;pcie_clk 3&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pfc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_clk_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* Page 22 / Ether_AVB0 */</div><div class='add'>+	avb0_pins: avb0 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",</div><div class='add'>+				 "avb0_txcrefclk";</div><div class='add'>+			function = "avb0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-mdio {</div><div class='add'>+			groups = "avb0_mdio";</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-mii {</div><div class='add'>+			groups = "avb0_rgmii";</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pins-vddq18-25-avb {</div><div class='add'>+			pins = "PIN_VDDQ_AVB0", "PIN_VDDQ_AVB1", "PIN_VDDQ_AVB2", "PIN_VDDQ_TSN0";</div><div class='add'>+			power-source = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 28 / CANFD_IF */</div><div class='add'>+	can_clk_pins: can-clk {</div><div class='add'>+		groups = "can_clk";</div><div class='add'>+		function = "can_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 28 / CANFD_IF */</div><div class='add'>+	canfd3_pins: canfd3 {</div><div class='add'>+		groups = "canfd3_data";</div><div class='add'>+		function = "canfd3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 28 / CANFD_IF */</div><div class='add'>+	canfd4_pins: canfd4 {</div><div class='add'>+		groups = "canfd4_data";</div><div class='add'>+		function = "canfd4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 23 / DEBUG */</div><div class='add'>+	hscif0_pins: hscif0 {</div><div class='add'>+		groups = "hscif0_data", "hscif0_ctrl";</div><div class='add'>+		function = "hscif0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 23 / DEBUG */</div><div class='add'>+	hscif1_pins: hscif1 {</div><div class='add'>+		groups = "hscif1_data_a", "hscif1_ctrl_a";</div><div class='add'>+		function = "hscif1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 24 / UART */</div><div class='add'>+	hscif3_pins: hscif3 {</div><div class='add'>+		groups = "hscif3_data_a";</div><div class='add'>+		function = "hscif3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 24 / I2C SWITCH */</div><div class='add'>+	i2c0_pins: i2c0 {</div><div class='add'>+		groups = "i2c0";</div><div class='add'>+		function = "i2c0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / CAM_CN0 */</div><div class='add'>+	i2c1_pins: i2c1 {</div><div class='add'>+		groups = "i2c1";</div><div class='add'>+		function = "i2c1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 29 / CSI_IF_CN / CAM_CN1 */</div><div class='add'>+	i2c2_pins: i2c2 {</div><div class='add'>+		groups = "i2c2";</div><div class='add'>+		function = "i2c2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / IO_CN */</div><div class='add'>+	i2c3_pins: i2c3 {</div><div class='add'>+		groups = "i2c3";</div><div class='add'>+		function = "i2c3";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / IO_CN */</div><div class='add'>+	i2c4_pins: i2c4 {</div><div class='add'>+		groups = "i2c4";</div><div class='add'>+		function = "i2c4";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 18 / POWER_CORE */</div><div class='add'>+	i2c5_pins: i2c5 {</div><div class='add'>+		groups = "i2c5";</div><div class='add'>+		function = "i2c5";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 27 / DSI to Display */</div><div class='add'>+	irq0_pins: irq0 {</div><div class='add'>+		groups = "intc_ex_irq0_a";</div><div class='add'>+		function = "intc_ex";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / FAN */</div><div class='add'>+	irq4_pins: irq4 {</div><div class='add'>+		groups = "intc_ex_irq4_b";</div><div class='add'>+		function = "intc_ex";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / FAN */</div><div class='add'>+	pwm0_pins: pwm0 {</div><div class='add'>+		groups = "pwm0";</div><div class='add'>+		function = "pwm0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / CN7 pin 12 */</div><div class='add'>+	pwm1_pins: pwm1 {</div><div class='add'>+		groups = "pwm1_b";</div><div class='add'>+		function = "pwm1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / CN7 pin 32 */</div><div class='add'>+	pwm6_pins: pwm6 {</div><div class='add'>+		groups = "pwm6";</div><div class='add'>+		function = "pwm6";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 31 / CN7 pin 33 */</div><div class='add'>+	pwm7_pins: pwm7 {</div><div class='add'>+		groups = "pwm7";</div><div class='add'>+		function = "pwm7";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 16 / QSPI_FLASH */</div><div class='add'>+	qspi0_pins: qspi0 {</div><div class='add'>+		groups = "qspi0_ctrl", "qspi0_data4";</div><div class='add'>+		function = "qspi0";</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 6 / SCIF_CLK_SOC_V */</div><div class='add'>+	scif_clk_pins: scif-clk {</div><div class='add'>+		groups = "scif_clk";</div><div class='add'>+		function = "scif_clk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 17 uSD-Slot */</div><div class='add'>+	sd_pins: sd {</div><div class='add'>+		groups = "mmc_data4", "mmc_ctrl";</div><div class='add'>+		function = "mmc";</div><div class='add'>+		power-source = &lt;3300&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 17 uSD-Slot */</div><div class='add'>+	sd_uhs_pins: sd-uhs {</div><div class='add'>+		groups = "mmc_data4", "mmc_ctrl";</div><div class='add'>+		function = "mmc";</div><div class='add'>+		power-source = &lt;1800&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 30 / Audio_Codec */</div><div class='add'>+	msiof1_pins: sound {</div><div class='add'>+		groups = "msiof1_clk", "msiof1_sync", "msiof1_txd", "msiof1_rxd";</div><div class='add'>+		function = "msiof1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Page 30 / Audio_Codec */</div><div class='add'>+	sound_clk_pins: sound-clk {</div><div class='add'>+		groups = "audio_clkin", "audio_clkout";</div><div class='add'>+		function = "audio_clk";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / FAN */</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / CN7 pin 12 */</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / CN7 pin 32 */</div><div class='add'>+&amp;pwm6 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm6_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 31 / CN7 pin 33 */</div><div class='add'>+&amp;pwm7 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm7_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 30 / Audio_Codec */</div><div class='add'>+&amp;rcar_sound {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sound_clk_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	/* It is used for ADG output as DA7212_MCLK */</div><div class='add'>+</div><div class='add'>+	/* audio_clkout */</div><div class='add'>+	clock-frequency = &lt;12288000&gt;; /* 48 kHz groups */</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 16 / QSPI_FLASH */</div><div class='add'>+&amp;rpc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qspi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		/*</div><div class='add'>+		 * EVTA1 is populated with Spansion S25FS512S</div><div class='add'>+		 * EVTB1 is populated with Winbond W77Q51NW</div><div class='add'>+		 */</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			boot@0 {</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			user@1000000 {</div><div class='add'>+				reg = &lt;0x1000000 0x2f80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			env1@3f80000 {</div><div class='add'>+				reg = &lt;0x3f80000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			env2@3fc0000 {</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rwdt {</div><div class='add'>+	timeout-sec = &lt;60&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Page 6 / SCIF_CLK_SOC_V */</div><div class='add'>+&amp;scif_clk {	/* X12 */</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* THS sensors in SoC, critical temperature trip point is 100C */</div><div class='add'>+&amp;sensor1_crit {</div><div class='add'>+	temperature = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor2_crit {</div><div class='add'>+	temperature = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor3_crit {</div><div class='add'>+	temperature = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor4_crit {</div><div class='add'>+	temperature = &lt;100000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* THS sensor in SoC near CA76 cores does more progressive cooling. */</div><div class='add'>+&amp;sensor_thermal_ca76 {</div><div class='add'>+	critical-action = "shutdown";</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		/*</div><div class='add'>+		 * The cooling-device minimum and maximum parameters inversely</div><div class='add'>+		 * match opp-table-0 {} node entries in r8a779g0.dtsi, in other</div><div class='add'>+		 * words, 0 refers to 1.8 GHz OPP and 4 refers to 500 MHz OPP.</div><div class='add'>+		 * This is because they refer to cooling levels, where maximum</div><div class='add'>+		 * cooling level happens at 500 MHz OPP, when the CPU core is</div><div class='add'>+		 * running slowly and therefore generates least heat.</div><div class='add'>+		 */</div><div class='add'>+		map0 {</div><div class='add'>+			/* At 68C, inhibit 1.7 GHz and 1.8 GHz modes */</div><div class='add'>+			trip = &lt;&amp;sensor3_passive_low&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;a76_0 2 4&gt;;</div><div class='add'>+			contribution = &lt;128&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map1 {</div><div class='add'>+			/* At 72C, inhibit 1.5 GHz mode */</div><div class='add'>+			trip = &lt;&amp;sensor3_passive_mid&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;a76_0 3 4&gt;;</div><div class='add'>+			contribution = &lt;256&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map2 {</div><div class='add'>+			/* At 76C, start injecting idle states 0..80% of time */</div><div class='add'>+			trip = &lt;&amp;sensor3_passive_hi&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;a76_0_thermal_idle 0 80&gt;,</div><div class='add'>+					 &lt;&amp;a76_1_thermal_idle 0 80&gt;,</div><div class='add'>+					 &lt;&amp;a76_2_thermal_idle 0 80&gt;,</div><div class='add'>+					 &lt;&amp;a76_3_thermal_idle 0 80&gt;;</div><div class='add'>+			contribution = &lt;512&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map3 {</div><div class='add'>+			/* At 80C, inhibit 1.0 GHz mode */</div><div class='add'>+			trip = &lt;&amp;sensor3_passive_crit&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;a76_0 4 4&gt;;</div><div class='add'>+			contribution = &lt;1024&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		sensor3_passive_low: sensor3-passive-low {</div><div class='add'>+			temperature = &lt;68000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "passive";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sensor3_passive_mid: sensor3-passive-mid {</div><div class='add'>+			temperature = &lt;72000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "passive";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sensor3_passive_hi: sensor3-passive-hi {</div><div class='add'>+			temperature = &lt;76000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "passive";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sensor3_passive_crit: sensor3-passive-crit {</div><div class='add'>+			temperature = &lt;80000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "passive";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor_thermal_cnn {</div><div class='add'>+	critical-action = "shutdown";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor_thermal_cr52 {</div><div class='add'>+	critical-action = "shutdown";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sensor_thermal_ddr1 {</div><div class='add'>+	critical-action = "shutdown";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts<br/>new file mode 100644<br/>index 000000000000..cd466d858854<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3-white-hawk-single.dts</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R-Car V4H ES3.0 White Hawk Single board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Glider bv</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "r8a779g3.dtsi"</div><div class='add'>+#include "white-hawk-single.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas White Hawk Single board based on r8a779g3";</div><div class='add'>+	compatible = "renesas,white-hawk-single", "renesas,r8a779g3",</div><div class='add'>+		     "renesas,r8a779g0";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g3.dtsi b/arch/arm64/boot/dts/renesas/r8a779g3.dtsi<br/>new file mode 100644<br/>index 000000000000..0295858a0260<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779g3.dtsi</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R-Car V4H (R8A779G3) SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Glider bv</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "r8a779g0.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r8a779g3", "renesas,r8a779g0";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts<br/>index 9a1917b87f61..1be7836c41f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts</a></div><div class='hunk'>@@ -5,465 +5,13 @@</div><div class='ctx'>  * Copyright (C) 2023 Renesas Electronics Corp.</div><div class='ctx'>  * Copyright (C) 2024 Glider bv</div><div class='ctx'>  */</div><div class='del'>-/*</div><div class='del'>- * [How to use Sound]</div><div class='del'>- *</div><div class='del'>- * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture</div><div class='del'>- * at the same time. You need to switch the direction which is controlled</div><div class='del'>- * by the GP0_01 pin via amixer.</div><div class='del'>- *</div><div class='del'>- * Playback (CN9500)</div><div class='del'>- *	&gt; amixer set "MUX" "Playback"	// for GP0_01</div><div class='del'>- *	&gt; amixer set "DAC 1" 85%</div><div class='del'>- *	&gt; aplay xxx.wav</div><div class='del'>- *</div><div class='del'>- * Capture (CN9501)</div><div class='del'>- *	&gt; amixer set "MUX" "Capture"	// for GP0_01</div><div class='del'>- *	&gt; amixer set "Mic 1" 80%</div><div class='del'>- *	&gt; amixer set "ADC 1" on</div><div class='del'>- *	&gt; amixer set 'ADC 1' 80%</div><div class='del'>- *	&gt; arecord xxx hoge.wav</div><div class='del'>- */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "r8a779h0.dtsi"</div><div class='add'>+#include "gray-hawk-single.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Renesas Gray Hawk Single board based on r8a779h0";</div><div class='ctx'> 	compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		i2c0 = &amp;i2c0;</div><div class='del'>-		i2c1 = &amp;i2c1;</div><div class='del'>-		i2c2 = &amp;i2c2;</div><div class='del'>-		i2c3 = &amp;i2c3;</div><div class='del'>-		serial0 = &amp;hscif0;</div><div class='del'>-		serial1 = &amp;hscif2;</div><div class='del'>-		ethernet0 = &amp;avb0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	can_transceiver0: can-phy0 {</div><div class='del'>-		compatible = "nxp,tjr1443";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;gpio1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";</div><div class='del'>-		stdout-path = "serial0:921600n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;keys_pins&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		key-1 {</div><div class='del'>-			gpios = &lt;&amp;gpio5 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_1&gt;;</div><div class='del'>-			label = "SW47";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			debounce-interval = &lt;20&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-2 {</div><div class='del'>-			gpios = &lt;&amp;gpio5 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_2&gt;;</div><div class='del'>-			label = "SW48";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			debounce-interval = &lt;20&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		key-3 {</div><div class='del'>-			gpios = &lt;&amp;gpio5 2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_3&gt;;</div><div class='del'>-			label = "SW49";</div><div class='del'>-			wakeup-source;</div><div class='del'>-			debounce-interval = &lt;20&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		led-1 {</div><div class='del'>-			gpios = &lt;&amp;gpio7 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			function = LED_FUNCTION_INDICATOR;</div><div class='del'>-			function-enumerator = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-2 {</div><div class='del'>-			gpios = &lt;&amp;gpio7 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			function = LED_FUNCTION_INDICATOR;</div><div class='del'>-			function-enumerator = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-3 {</div><div class='del'>-			gpios = &lt;&amp;gpio7 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			function = LED_FUNCTION_INDICATOR;</div><div class='del'>-			function-enumerator = &lt;3&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@48000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		/* first 128MB is reserved for secure area. */</div><div class='del'>-		reg = &lt;0x0 0x48000000 0x0 0x78000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@480000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x4 0x80000000 0x1 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_1p8v: regulator-1p8v {</div><div class='del'>-			compatible = "regulator-fixed";</div><div class='del'>-			regulator-name = "fixed-1.8V";</div><div class='del'>-			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg_3p3v: regulator-3p3v {</div><div class='del'>-			compatible = "regulator-fixed";</div><div class='del'>-			regulator-name = "fixed-3.3V";</div><div class='del'>-			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-			regulator-boot-on;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound_mux: sound-mux {</div><div class='del'>-		compatible = "simple-audio-mux";</div><div class='del'>-		mux-gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		state-labels = "Playback", "Capture";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound_card: sound {</div><div class='del'>-		compatible = "audio-graph-card2";</div><div class='del'>-		label = "rcar-sound";</div><div class='del'>-		aux-devs = &lt;&amp;sound_mux&gt;; // for GP0_01</div><div class='del'>-</div><div class='del'>-		links = &lt;&amp;rsnd_port&gt;; // AK4619 Audio Codec</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;audio_clkin {</div><div class='del'>-	clock-frequency = &lt;24576000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;avb0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;avb0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-	tx-internal-delay-ps = &lt;2000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	phy0: ethernet-phy@0 {</div><div class='del'>-		compatible = "ethernet-phy-id0022.1622",</div><div class='del'>-			     "ethernet-phy-ieee802.3-c22";</div><div class='del'>-		rxc-skew-ps = &lt;1500&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio7&gt;;</div><div class='del'>-		interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio7 10 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;can_clk {</div><div class='del'>-	clock-frequency = &lt;40000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;canfd {</div><div class='del'>-	pinctrl-0 = &lt;&amp;canfd0_pins&gt;, &lt;&amp;canfd1_pins&gt;, &lt;&amp;can_clk_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	channel0 {</div><div class='del'>-		status = "okay";</div><div class='del'>-		phys = &lt;&amp;can_transceiver0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	channel1 {</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;extal_clk {</div><div class='del'>-	clock-frequency = &lt;16666666&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;extalr_clk {</div><div class='del'>-	clock-frequency = &lt;32768&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpio1 {</div><div class='del'>-	audio-power-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		output-high;</div><div class='del'>-		line-name = "Audio-Power";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hscif0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	uart-has-rtscts;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hscif2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;hscif2_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	uart-has-rtscts;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='del'>-		label = "cpu-board";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-		pagesize = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@51 {</div><div class='del'>-		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='del'>-		label = "breakout-board";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-		pagesize = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@52 {</div><div class='del'>-		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='del'>-		label = "csi-dsi-sub-board-id";</div><div class='del'>-		reg = &lt;0x52&gt;;</div><div class='del'>-		pagesize = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eeprom@53 {</div><div class='del'>-		compatible = "rohm,br24g01", "atmel,24c01";</div><div class='del'>-		label = "ethernet-sub-board-id";</div><div class='del'>-		reg = &lt;0x53&gt;;</div><div class='del'>-		pagesize = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c3 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	codec@10 {</div><div class='del'>-		compatible = "asahi-kasei,ak4619";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;rcar_sound&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		port {</div><div class='del'>-			ak4619_endpoint: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;rsnd_endpoint&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;mmc_pins&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;mmc_pins&gt;;</div><div class='del'>-	pinctrl-names = "default", "state_uhs";</div><div class='del'>-</div><div class='del'>-	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	mmc-hs400-1_8v;</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	no-sd;</div><div class='del'>-	no-sdio;</div><div class='del'>-	non-removable;</div><div class='del'>-	full-pwr-cycle-in-suspend;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pfc {</div><div class='del'>-	pinctrl-0 = &lt;&amp;scif_clk_pins&gt;, &lt;&amp;scif_clk2_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	avb0_pins: avb0 {</div><div class='del'>-		mux {</div><div class='del'>-			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",</div><div class='del'>-				 "avb0_txcrefclk";</div><div class='del'>-			function = "avb0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins_mdio {</div><div class='del'>-			groups = "avb0_mdio";</div><div class='del'>-			drive-strength = &lt;21&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pins_mii {</div><div class='del'>-			groups = "avb0_rgmii";</div><div class='del'>-			drive-strength = &lt;21&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	can_clk_pins: can-clk {</div><div class='del'>-		groups = "can_clk";</div><div class='del'>-		function = "can_clk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	canfd0_pins: canfd0 {</div><div class='del'>-		groups = "canfd0_data";</div><div class='del'>-		function = "canfd0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	canfd1_pins: canfd1 {</div><div class='del'>-		groups = "canfd1_data";</div><div class='del'>-		function = "canfd1";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hscif0_pins: hscif0 {</div><div class='del'>-		groups = "hscif0_data", "hscif0_ctrl";</div><div class='del'>-		function = "hscif0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hscif2_pins: hscif2 {</div><div class='del'>-		groups = "hscif2_data", "hscif2_ctrl";</div><div class='del'>-		function = "hscif2";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c0_pins: i2c0 {</div><div class='del'>-		groups = "i2c0";</div><div class='del'>-		function = "i2c0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c3_pins: i2c3 {</div><div class='del'>-		groups = "i2c3";</div><div class='del'>-		function = "i2c3";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	keys_pins: keys {</div><div class='del'>-		pins = "GP_5_0", "GP_5_1", "GP_5_2";</div><div class='del'>-		bias-pull-up;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mmc_pins: mmc {</div><div class='del'>-		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";</div><div class='del'>-		function = "mmc";</div><div class='del'>-		power-source = &lt;1800&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	qspi0_pins: qspi0 {</div><div class='del'>-		groups = "qspi0_ctrl", "qspi0_data4";</div><div class='del'>-		function = "qspi0";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	scif_clk_pins: scif-clk {</div><div class='del'>-		groups = "scif_clk";</div><div class='del'>-		function = "scif_clk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	scif_clk2_pins: scif-clk2 {</div><div class='del'>-		groups = "scif_clk2";</div><div class='del'>-		function = "scif_clk2";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound_clk_pins: sound_clk {</div><div class='del'>-		groups = "audio_clkin", "audio_clkout";</div><div class='del'>-		function = "audio_clk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound_pins: sound {</div><div class='del'>-		groups = "ssi_ctrl", "ssi_data";</div><div class='del'>-		function = "ssi";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rcar_sound {</div><div class='del'>-	pinctrl-0 = &lt;&amp;sound_clk_pins&gt;, &lt;&amp;sound_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* audio_clkout */</div><div class='del'>-	clock-frequency = &lt;12288000&gt;;</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		rsnd_port: port {</div><div class='del'>-			rsnd_endpoint: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;ak4619_endpoint&gt;;</div><div class='del'>-				bitclock-master;</div><div class='del'>-				frame-master;</div><div class='del'>-</div><div class='del'>-				/* see above [How to use Sound] */</div><div class='del'>-				playback = &lt;&amp;ssi0&gt;;</div><div class='del'>-				capture  = &lt;&amp;ssi0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rpc {</div><div class='del'>-	pinctrl-0 = &lt;&amp;qspi0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "spansion,s25fs512s", "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;40000000&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		partitions {</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			boot@0 {</div><div class='del'>-				reg = &lt;0x0 0x1200000&gt;;</div><div class='del'>-				read-only;</div><div class='del'>-			};</div><div class='del'>-			user@1200000 {</div><div class='del'>-				reg = &lt;0x1200000 0x2e00000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rwdt {</div><div class='del'>-	timeout-sec = &lt;60&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;scif_clk {</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;scif_clk2 {</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi<br/>index 12d8be3fd579..0f20a2d23983 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779h0.dtsi</a></div><div class='hunk'>@@ -138,6 +138,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	extalr_clk: extalr-clk {</div><div class='hunk'>@@ -145,6 +146,14 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		/* This value must be overridden by the board */</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_clkref: pcie0-clkref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmu-a76 {</div><div class='hunk'>@@ -173,6 +182,8 @@</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -194,6 +205,7 @@</div><div class='ctx'> 			      &lt;0 0xe6058000 0 0x16c&gt;, &lt;0 0xe6058800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6060000 0 0x16c&gt;, &lt;0 0xe6060800 0 0x16c&gt;,</div><div class='ctx'> 			      &lt;0 0xe6061000 0 0x16c&gt;, &lt;0 0xe6061800 0 0x16c&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@e6050180 {</div><div class='hunk'>@@ -394,11 +406,13 @@</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			#reset-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		rst: reset-controller@e6160000 {</div><div class='ctx'> 			compatible = "renesas,r8a779h0-rst";</div><div class='ctx'> 			reg = &lt;0 0xe6160000 0 0x4000&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sysc: system-controller@e6180000 {</div><div class='hunk'>@@ -417,6 +431,11 @@</div><div class='ctx'> 			#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		otp: otp@e61be000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-otp";</div><div class='add'>+			reg = &lt;0 0xe61be000 0 0x1000&gt;, &lt;0 0xe61bf000 0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		intc_ex: interrupt-controller@e61c0000 {</div><div class='ctx'> 			compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc";</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -643,6 +662,66 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pciec0: pcie@e65d0000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-pcie",</div><div class='add'>+				     "renesas,rcar-gen4-pcie";</div><div class='add'>+			reg = &lt;0 0xe65d0000 0 0x1000&gt;, &lt;0 0xe65d2000 0 0x0800&gt;,</div><div class='add'>+			      &lt;0 0xe65d3000 0 0x2000&gt;, &lt;0 0xe65d5000 0 0x1200&gt;,</div><div class='add'>+			      &lt;0 0xe65d6200 0 0x0e00&gt;, &lt;0 0xe65d7000 0 0x0400&gt;,</div><div class='add'>+			      &lt;0 0xfe000000 0 0x400000&gt;;</div><div class='add'>+			reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";</div><div class='add'>+			interrupts = &lt;GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "msi", "dma", "sft_ce", "app";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 624&gt;, &lt;&amp;pcie0_clkref&gt;;</div><div class='add'>+			clock-names = "core", "ref";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_A2PCIPHY&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 624&gt;;</div><div class='add'>+			reset-names = "pwr";</div><div class='add'>+			max-link-speed = &lt;4&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			ranges = &lt;0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000&gt;,</div><div class='add'>+				 &lt;0x02000000 0 0x30000000 0 0x30000000 0 0x10000000&gt;;</div><div class='add'>+			dma-ranges = &lt;0x42000000 0 0x00000000 0 0x00000000 1 0x00000000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			snps,enable-cdm-check;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pciec0_ep: pcie-ep@e65d0000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-pcie-ep",</div><div class='add'>+				     "renesas,rcar-gen4-pcie-ep";</div><div class='add'>+			reg = &lt;0 0xe65d0000 0 0x2000&gt;, &lt;0 0xe65d2000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0xe65d3000 0 0x2000&gt;, &lt;0 0xe65d5000 0 0x1200&gt;,</div><div class='add'>+			      &lt;0 0xe65d6200 0 0x0e00&gt;, &lt;0 0xe65d7000 0 0x0400&gt;,</div><div class='add'>+			      &lt;0 0xfe000000 0 0x400000&gt;;</div><div class='add'>+			reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";</div><div class='add'>+			interrupts = &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "dma", "sft_ce", "app";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 624&gt;, &lt;&amp;pcie0_clkref&gt;;</div><div class='add'>+			clock-names = "core", "ref";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_A2PCIPHY&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 624&gt;;</div><div class='add'>+			reset-names = "pwr";</div><div class='add'>+			max-link-speed = &lt;4&gt;;</div><div class='add'>+			num-lanes = &lt;2&gt;;</div><div class='add'>+			max-functions = /bits/ 8 &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		canfd: can@e6660000 {</div><div class='ctx'> 			compatible = "renesas,r8a779h0-canfd",</div><div class='ctx'> 				     "renesas,rcar-gen4-canfd";</div><div class='hunk'>@@ -721,8 +800,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_hc 0&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -770,8 +847,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_hc 1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -819,8 +894,6 @@</div><div class='ctx'> 			rx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			tx-internal-delay-ps = &lt;0&gt;;</div><div class='ctx'> 			iommus = &lt;&amp;ipmmu_hc 2&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1828,16 +1901,87 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		fcpvd0: fcp@fea10000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfea10000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 508&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 508&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fcpvx0: fcp@fedb0000 {</div><div class='add'>+			compatible = "renesas,fcpv";</div><div class='add'>+			reg = &lt;0 0xfedb0000 0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_A3ISP0&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1100&gt;;</div><div class='add'>+			iommus = &lt;&amp;ipmmu_vi1 24&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspd0: vsp@fea20000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfea20000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 830&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 830&gt;;</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvd0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vspx0: vsp@fedd0000 {</div><div class='add'>+			compatible = "renesas,vsp2";</div><div class='add'>+			reg = &lt;0 0xfedd0000 0 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1028&gt;;</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_A3ISP0&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 1028&gt;;</div><div class='add'>+</div><div class='add'>+			renesas,fcp = &lt;&amp;fcpvx0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		du: display@feb00000 {</div><div class='add'>+			compatible = "renesas,du-r8a779h0";</div><div class='add'>+			reg = &lt;0 0xfeb00000 0 0x40000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 411&gt;;</div><div class='add'>+			clock-names = "du.0";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 411&gt;;</div><div class='add'>+			reset-names = "du.0";</div><div class='add'>+			renesas,vsps = &lt;&amp;vspd0 0&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					du_out_dsi0: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		isp0: isp@fed00000 {</div><div class='ctx'> 			compatible = "renesas,r8a779h0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='del'>-			reg = &lt;0 0xfed00000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			clocks = &lt;&amp;cpg CPG_MOD 612&gt;;</div><div class='add'>+			reg = &lt;0 0xfed00000 0 0x10000&gt;, &lt;0 0xfec00000 0 0x100000&gt;;</div><div class='add'>+			reg-names = "cs", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs", "core";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 612&gt;, &lt;&amp;cpg CPG_MOD 16&gt;;</div><div class='add'>+			clock-names = "cs", "core";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779H0_PD_A3ISP0&gt;;</div><div class='del'>-			resets = &lt;&amp;cpg 612&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 612&gt;, &lt;&amp;cpg 16&gt;;</div><div class='add'>+			reset-names = "cs", "core";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='add'>+			renesas,vspx = &lt;&amp;vspx0&gt;;</div><div class='add'>+</div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -1916,10 +2060,14 @@</div><div class='ctx'> 			compatible = "renesas,r8a779h0-isp",</div><div class='ctx'> 				     "renesas,rcar-gen4-isp";</div><div class='ctx'> 			reg = &lt;0 0xfed20000 0 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			reg-names = "cs";</div><div class='add'>+			interrupts = &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cs";</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_MOD 613&gt;;</div><div class='add'>+			clock-names = "cs";</div><div class='ctx'> 			power-domains = &lt;&amp;sysc R8A779H0_PD_A3ISP0&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 613&gt;;</div><div class='add'>+			reset-names = "cs";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='hunk'>@@ -1996,9 +2144,39 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dsi0: dsi@fed80000 {</div><div class='add'>+			compatible = "renesas,r8a779h0-dsi-csi2-tx";</div><div class='add'>+			reg = &lt;0 0xfed80000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 415&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_DSIEXT&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R8A779H0_CLK_DSIREF&gt;;</div><div class='add'>+			clock-names = "fck", "dsi", "pll";</div><div class='add'>+			power-domains = &lt;&amp;sysc R8A779H0_PD_C4&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 415&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					dsi0_in: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;du_out_dsi0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		prr: chipid@fff00044 {</div><div class='ctx'> 			compatible = "renesas,prr";</div><div class='ctx'> 			reg = &lt;0 0xfff00044 0 4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts<br/>new file mode 100644<br/>index 000000000000..aeb32c77099e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779h2-gray-hawk-single.dts</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R-Car V4M-7 Gray Hawk Single board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Glider bv</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "r8a779h2.dtsi"</div><div class='add'>+#include "gray-hawk-single.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas Gray Hawk Single board based on r8a779h2";</div><div class='add'>+	compatible = "renesas,gray-hawk-single", "renesas,r8a779h2",</div><div class='add'>+		     "renesas,r8a779h0";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779h2.dtsi b/arch/arm64/boot/dts/renesas/r8a779h2.dtsi<br/>new file mode 100644<br/>index 000000000000..2707d2d36766<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779h2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r8a779h2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R-Car V4M-7 (R8A779H2) SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "r8a779h0.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r8a779h2", "renesas,r8a779h0";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi<br/>index 6b1c77cd8261..ecaa9c4f305c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g044.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g044.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g044.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a07g044.dtsi</a></div><div class='hunk'>@@ -244,6 +244,121 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpt: pwm@10048000 {</div><div class='add'>+			compatible = "renesas,r9a07g044-gpt",</div><div class='add'>+				     "renesas,rzg2l-gpt";</div><div class='add'>+			reg = &lt;0 0x10048000 0 0x800&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 218 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 219 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 220 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 221 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 222 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 224 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 225 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 226 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 227 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 231 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 232 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 233 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 234 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 235 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 236 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 237 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 238 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 239 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 240 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 244 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 257 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 258 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 259 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 260 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 261 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 262 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 270 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 271 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 272 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 273 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 274 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 275 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 276 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 277 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 278 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 279 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 285 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 286 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 287 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 288 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 289 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 290 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 291 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 292 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 299 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 300 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 301 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 302 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 303 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 311 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "ccmpa0", "ccmpb0", "cmpc0", "cmpd0",</div><div class='add'>+					  "cmpe0", "cmpf0", "adtrga0", "adtrgb0",</div><div class='add'>+					  "ovf0", "unf0",</div><div class='add'>+					  "ccmpa1", "ccmpb1", "cmpc1", "cmpd1",</div><div class='add'>+					  "cmpe1", "cmpf1", "adtrga1", "adtrgb1",</div><div class='add'>+					  "ovf1", "unf1",</div><div class='add'>+					  "ccmpa2", "ccmpb2", "cmpc2", "cmpd2",</div><div class='add'>+					  "cmpe2", "cmpf2", "adtrga2", "adtrgb2",</div><div class='add'>+					  "ovf2", "unf2",</div><div class='add'>+					  "ccmpa3", "ccmpb3", "cmpc3", "cmpd3",</div><div class='add'>+					  "cmpe3", "cmpf3", "adtrga3", "adtrgb3",</div><div class='add'>+					  "ovf3", "unf3",</div><div class='add'>+					  "ccmpa4", "ccmpb4", "cmpc4", "cmpd4",</div><div class='add'>+					  "cmpe4", "cmpf4", "adtrga4", "adtrgb4",</div><div class='add'>+					  "ovf4", "unf4",</div><div class='add'>+					  "ccmpa5", "ccmpb5", "cmpc5", "cmpd5",</div><div class='add'>+					  "cmpe5", "cmpf5", "adtrga5", "adtrgb5",</div><div class='add'>+					  "ovf5", "unf5",</div><div class='add'>+					  "ccmpa6", "ccmpb6", "cmpc6", "cmpd6",</div><div class='add'>+					  "cmpe6", "cmpf6", "adtrga6", "adtrgb6",</div><div class='add'>+					  "ovf6", "unf6",</div><div class='add'>+					  "ccmpa7", "ccmpb7", "cmpc7", "cmpd7",</div><div class='add'>+					  "cmpe7", "cmpf7", "adtrga7", "adtrgb7",</div><div class='add'>+					  "ovf7", "unf7";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A07G044_GPT_PCLK&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A07G044_GPT_RST_C&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ssi0: ssi@10049c00 {</div><div class='ctx'> 			compatible = "renesas,r9a07g044-ssi",</div><div class='ctx'> 				     "renesas,rz-ssi";</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts<br/>new file mode 100644<br/>index 000000000000..3267e7b75b58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a07g044l2-remi-pi.dts</a></div><div class='hunk'>@@ -0,0 +1,339 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the MYIR Remi Pi</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022 MYIR Electronics Corp.</div><div class='add'>+ * Copyright (C) 2025 Collabora Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "r9a07g044l2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "MYIR Tech Limited Remi Pi MYB-YG2LX-REMI";</div><div class='add'>+	compatible = "myir,remi-pi", "renesas,r9a07g044l2", "renesas,r9a07g044";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+</div><div class='add'>+		mmc0 = &amp;sdhi0;</div><div class='add'>+</div><div class='add'>+		serial0 = &amp;scif0;</div><div class='add'>+		serial4 = &amp;scif4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-out {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+		ddc-i2c-bus = &lt;&amp;i2c1&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lt8912_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* first 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x0 0x38000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		vin-supply = &lt;&amp;reg_5p0v&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		vin-supply = &lt;&amp;reg_5p0v&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_5p0v: regulator-5p0v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-5.0V";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p1v: regulator-vdd-core {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.1V";</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@1 {</div><div class='add'>+			dsi_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lt8912_in&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;du {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy0: ethernet-phy@4 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(44, 2) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pinctrl RZG2L_GPIO(44, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@6 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;6&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(43, 2) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pinctrl RZG2L_GPIO(43, 3) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extal_clk {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;reg_1p1v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hdmi-bridge@48 {</div><div class='add'>+		compatible = "lontium,lt8912b";</div><div class='add'>+		reg = &lt;0x48&gt; ;</div><div class='add'>+		reset-gpios = &lt;&amp;pinctrl RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				lt8912_in: endpoint {</div><div class='add'>+					data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+					remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				lt8912_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_con&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mtu3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phyrst {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	eth0_pins: eth0 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(27, 1, 1)&gt;, /* ET0_MDC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(28, 0, 1)&gt;, /* ET0_MDIO */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(20, 0, 1)&gt;, /* ET0_TXC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(20, 1, 1)&gt;, /* ET0_TX_CTL */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(20, 2, 1)&gt;, /* ET0_TXD0 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(21, 0, 1)&gt;, /* ET0_TXD1 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(21, 1, 1)&gt;, /* ET0_TXD2 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(22, 0, 1)&gt;, /* ET0_TXD3 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(24, 0, 1)&gt;, /* ET0_RXC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(24, 1, 1)&gt;, /* ET0_RX_CTL */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(25, 0, 1)&gt;, /* ET0_RXD0 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(25, 1, 1)&gt;, /* ET0_RXD1 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(26, 0, 1)&gt;, /* ET0_RXD2 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(26, 1, 1)&gt;; /* ET0_RXD3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_pins: eth1 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(37, 0, 1)&gt;, /* ET1_MDC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(37, 1, 1)&gt;, /* ET1_MDIO */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(29, 0, 1)&gt;, /* ET1_TXC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(29, 1, 1)&gt;, /* ET1_TX_CTL */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(30, 0, 1)&gt;, /* ET1_TXD0 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(30, 1, 1)&gt;, /* ET1_TXD1 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(31, 0, 1)&gt;, /* ET1_TXD2 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(31, 1, 1)&gt;, /* ET1_TXD3 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(33, 1, 1)&gt;, /* ET1_RXC */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(34, 0, 1)&gt;, /* ET1_RX_CTL */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(34, 1, 1)&gt;, /* ET1_RXD0 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(35, 0, 1)&gt;, /* ET1_RXD1 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(35, 1, 1)&gt;, /* ET1_RXD2 */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(36, 0, 1)&gt;; /* ET1_RXD3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0 {</div><div class='add'>+		pins = "RIIC0_SDA", "RIIC0_SCL";</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1 {</div><div class='add'>+		pins = "RIIC1_SDA", "RIIC1_SCL";</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(3, 0, 2)&gt;, /* SDA */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(3, 1, 2)&gt;; /* SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(18, 0, 3)&gt;, /* SDA */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(18, 1, 3)&gt;; /* SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif0_pins: scif0 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(38, 0, 1)&gt;, /* TxD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(38, 1, 1)&gt;; /* RxD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif4_pins: scif4 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(2, 0, 5)&gt;, /* TxD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(2, 1, 5)&gt;; /* RxD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_pins: sd0 {</div><div class='add'>+		sd0-ctrl {</div><div class='add'>+			pins = "SD0_CLK", "SD0_CMD";</div><div class='add'>+			power-source = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-data {</div><div class='add'>+			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",</div><div class='add'>+			       "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";</div><div class='add'>+			power-source = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-rst {</div><div class='add'>+			pins = "SD0_RST#";</div><div class='add'>+			power-source = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif4_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	fixed-emmc-driver-type = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts<br/>index 568d49cfe44a..b36749f94ccb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts</a></div><div class='hunk'>@@ -27,6 +27,13 @@</div><div class='ctx'> #error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the</div><div class='add'>+ * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT	1"</div><div class='add'>+ * below.</div><div class='add'>+ */</div><div class='add'>+#define PMOD0_GPT	0</div><div class='add'>+</div><div class='ctx'> #include "r9a07g044l2.dtsi"</div><div class='ctx'> #include "rzg2l-smarc-som.dtsi"</div><div class='ctx'> #include "rzg2l-smarc-pinfunction.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi<br/>index 01f59914dd09..669eca74da0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g054.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g054.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g054.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a07g054.dtsi</a></div><div class='hunk'>@@ -244,6 +244,121 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpt: pwm@10048000 {</div><div class='add'>+			compatible = "renesas,r9a07g054-gpt",</div><div class='add'>+				     "renesas,rzg2l-gpt";</div><div class='add'>+			reg = &lt;0 0x10048000 0 0x800&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 218 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 219 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 220 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 221 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 222 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 224 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 225 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 226 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 227 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 231 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 232 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 233 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 234 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 235 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 236 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 237 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 238 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 239 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 240 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 244 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 246 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 249 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 252 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 253 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 257 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 258 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 259 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 260 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 261 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 262 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 270 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 271 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 272 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 273 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 274 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 275 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 276 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 277 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 278 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 279 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 284 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 285 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 286 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 287 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 288 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 289 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 290 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 291 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 292 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 299 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 300 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 301 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 302 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 303 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 311 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 312 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 313 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 314 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 315 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "ccmpa0", "ccmpb0", "cmpc0", "cmpd0",</div><div class='add'>+					  "cmpe0", "cmpf0", "adtrga0", "adtrgb0",</div><div class='add'>+					  "ovf0", "unf0",</div><div class='add'>+					  "ccmpa1", "ccmpb1", "cmpc1", "cmpd1",</div><div class='add'>+					  "cmpe1", "cmpf1", "adtrga1", "adtrgb1",</div><div class='add'>+					  "ovf1", "unf1",</div><div class='add'>+					  "ccmpa2", "ccmpb2", "cmpc2", "cmpd2",</div><div class='add'>+					  "cmpe2", "cmpf2", "adtrga2", "adtrgb2",</div><div class='add'>+					  "ovf2", "unf2",</div><div class='add'>+					  "ccmpa3", "ccmpb3", "cmpc3", "cmpd3",</div><div class='add'>+					  "cmpe3", "cmpf3", "adtrga3", "adtrgb3",</div><div class='add'>+					  "ovf3", "unf3",</div><div class='add'>+					  "ccmpa4", "ccmpb4", "cmpc4", "cmpd4",</div><div class='add'>+					  "cmpe4", "cmpf4", "adtrga4", "adtrgb4",</div><div class='add'>+					  "ovf4", "unf4",</div><div class='add'>+					  "ccmpa5", "ccmpb5", "cmpc5", "cmpd5",</div><div class='add'>+					  "cmpe5", "cmpf5", "adtrga5", "adtrgb5",</div><div class='add'>+					  "ovf5", "unf5",</div><div class='add'>+					  "ccmpa6", "ccmpb6", "cmpc6", "cmpd6",</div><div class='add'>+					  "cmpe6", "cmpf6", "adtrga6", "adtrgb6",</div><div class='add'>+					  "ovf6", "unf6",</div><div class='add'>+					  "ccmpa7", "ccmpb7", "cmpc7", "cmpd7",</div><div class='add'>+					  "cmpe7", "cmpf7", "adtrga7", "adtrgb7",</div><div class='add'>+					  "ovf7", "unf7";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A07G054_GPT_PCLK&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A07G054_GPT_RST_C&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ssi0: ssi@10049c00 {</div><div class='ctx'> 			compatible = "renesas,r9a07g054-ssi",</div><div class='ctx'> 				     "renesas,rz-ssi";</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts<br/>index b3e6016880dd..43c456ffa63c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts</a></div><div class='hunk'>@@ -26,6 +26,13 @@</div><div class='ctx'> #error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the</div><div class='add'>+ * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT	1"</div><div class='add'>+ * below.</div><div class='add'>+ */</div><div class='add'>+#define PMOD0_GPT	0</div><div class='add'>+</div><div class='ctx'> #include "r9a07g054l2.dtsi"</div><div class='ctx'> #include "rzg2l-smarc-som.dtsi"</div><div class='ctx'> #include "rzg2l-smarc-pinfunction.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi<br/>index 067a26a66c24..16e6ac614417 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a08g045.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a08g045.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a08g045.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a08g045.dtsi</a></div><div class='hunk'>@@ -7,12 +7,54 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/r9a08g045-cpg.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a08g045-vbattb.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "renesas,r9a08g045";</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+	audio_clk1: audio1-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by boards that provide it. */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	audio_clk2: audio2-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by boards that provide it. */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster0_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-137500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;137500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;940000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-275000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;275000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;940000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-550000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;940000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1100000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;940000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -25,6 +67,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_CORE R9A08G045_CLK_I&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		L3_CA55: cache-controller-0 {</div><div class='hunk'>@@ -72,6 +115,211 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		scif1: serial@1004bc00 {</div><div class='add'>+			compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";</div><div class='add'>+			reg = &lt;0 0x1004bc00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi",</div><div class='add'>+					  "bri", "dri", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SCIF1_CLK_PCK&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SCIF1_RST_SYSTEM_N&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif2: serial@1004c000 {</div><div class='add'>+			compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";</div><div class='add'>+			reg = &lt;0 0x1004c000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi",</div><div class='add'>+					  "bri", "dri", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SCIF2_CLK_PCK&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SCIF2_RST_SYSTEM_N&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif3: serial@1004c400 {</div><div class='add'>+			compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";</div><div class='add'>+			reg = &lt;0 0x1004c400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi",</div><div class='add'>+					  "bri", "dri", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SCIF3_CLK_PCK&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SCIF3_RST_SYSTEM_N&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif4: serial@1004c800 {</div><div class='add'>+			compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";</div><div class='add'>+			reg = &lt;0 0x1004c800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi",</div><div class='add'>+					  "bri", "dri", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SCIF4_CLK_PCK&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SCIF4_RST_SYSTEM_N&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif5: serial@1004e000 {</div><div class='add'>+			compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";</div><div class='add'>+			reg = &lt;0 0x1004e000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi",</div><div class='add'>+					  "bri", "dri", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SCIF5_CLK_PCK&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SCIF5_RST_SYSTEM_N&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@1004ec00 {</div><div class='add'>+			compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3";</div><div class='add'>+			reg = &lt;0 0x1004ec00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "alarm", "period", "carry";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_VBAT_BCLK&gt;, &lt;&amp;vbattb VBATTB_VBATTCLK&gt;;</div><div class='add'>+			clock-names = "bus", "counter";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_VBAT_BRESETN&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adc: adc@10058000 {</div><div class='add'>+			compatible = "renesas,r9a08g045-adc";</div><div class='add'>+			reg = &lt;0 0x10058000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 312 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_ADC_ADCLK&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_ADC_PCLK&gt;;</div><div class='add'>+			clock-names = "adclk", "pclk";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_ADC_PRESETN&gt;,</div><div class='add'>+				 &lt;&amp;cpg R9A08G045_ADC_ADRST_N&gt;;</div><div class='add'>+			reset-names = "presetn", "adrst-n";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			channel@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@6 {</div><div class='add'>+				reg = &lt;6&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@7 {</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@8 {</div><div class='add'>+				reg = &lt;8&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c: i3c@1005b000 {</div><div class='add'>+			compatible = "renesas,r9a08g045-i3c";</div><div class='add'>+			reg = &lt;0 0x1005b000 0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_I3C_PCLK&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_I3C_TCLK&gt;;</div><div class='add'>+			clock-names = "pclk", "tclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 294 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 295 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 296 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 297 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 299 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "ierr", "terr", "abort", "resp",</div><div class='add'>+					  "cmd", "ibi", "rx", "tx", "rcv",</div><div class='add'>+					  "st", "sp", "tend", "nack", "al",</div><div class='add'>+					  "tmo", "wu", "exit";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_I3C_PRESETN&gt;,</div><div class='add'>+				 &lt;&amp;cpg R9A08G045_I3C_TRESETN&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vbattb: clock-controller@1005c000 {</div><div class='add'>+			compatible = "renesas,r9a08g045-vbattb";</div><div class='add'>+			reg = &lt;0 0x1005c000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_VBAT_BCLK&gt;, &lt;&amp;vbattb_xtal&gt;;</div><div class='add'>+			clock-names = "bclk", "rtx";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_VBAT_BRESETN&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c0: i2c@10090000 {</div><div class='ctx'> 			compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";</div><div class='ctx'> 			reg = &lt;0 0x10090000 0 0x400&gt;;</div><div class='hunk'>@@ -160,6 +408,86 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ssi0: ssi@100a8000 {</div><div class='add'>+			compatible = "renesas,r9a08g045-ssi",</div><div class='add'>+				     "renesas,rz-ssi";</div><div class='add'>+			reg = &lt;0 0x100a8000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 241 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 242 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "int_req", "dma_rx", "dma_tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SSI0_PCLK2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_SSI0_PCLK_SFR&gt;,</div><div class='add'>+				 &lt;&amp;audio_clk1&gt;, &lt;&amp;audio_clk2&gt;;</div><div class='add'>+			clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SSI0_RST_M2_REG&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2665&gt;, &lt;&amp;dmac 0x2666&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ssi1: ssi@100a8400 {</div><div class='add'>+			compatible = "renesas,r9a08g045-ssi",</div><div class='add'>+				     "renesas,rz-ssi";</div><div class='add'>+			reg = &lt;0 0x100a8400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 244 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 245 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "int_req", "dma_rx", "dma_tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SSI1_PCLK2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_SSI1_PCLK_SFR&gt;,</div><div class='add'>+				 &lt;&amp;audio_clk1&gt;, &lt;&amp;audio_clk2&gt;;</div><div class='add'>+			clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SSI1_RST_M2_REG&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2669&gt;, &lt;&amp;dmac 0x266a&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ssi2: ssi@100a8800 {</div><div class='add'>+			compatible = "renesas,r9a08g045-ssi",</div><div class='add'>+				     "renesas,rz-ssi";</div><div class='add'>+			reg = &lt;0 0x100a8800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 247 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 248 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "int_req", "dma_rx", "dma_tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SSI2_PCLK2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_SSI2_PCLK_SFR&gt;,</div><div class='add'>+				 &lt;&amp;audio_clk1&gt;, &lt;&amp;audio_clk2&gt;;</div><div class='add'>+			clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SSI2_RST_M2_REG&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x266d&gt;, &lt;&amp;dmac 0x266e&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ssi3: ssi@100a8c00 {</div><div class='add'>+			compatible = "renesas,r9a08g045-ssi",</div><div class='add'>+				     "renesas,rz-ssi";</div><div class='add'>+			reg = &lt;0 0x100a8c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 251 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "int_req", "dma_rx", "dma_tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SSI3_PCLK2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR&gt;,</div><div class='add'>+				 &lt;&amp;audio_clk1&gt;, &lt;&amp;audio_clk2&gt;;</div><div class='add'>+			clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";</div><div class='add'>+			resets = &lt;&amp;cpg R9A08G045_SSI3_RST_M2_REG&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 0x2671&gt;, &lt;&amp;dmac 0x2672&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpg: clock-controller@11010000 {</div><div class='ctx'> 			compatible = "renesas,r9a08g045-cpg";</div><div class='ctx'> 			reg = &lt;0 0x11010000 0 0x10000&gt;;</div><div class='hunk'>@@ -179,7 +507,6 @@</div><div class='ctx'> 				     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			interrupt-names = "lpm_int", "ca55stbydone_int",</div><div class='ctx'> 					  "cm33stbyr_int", "ca55_deny";</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pinctrl: pinctrl@11030000 {</div><div class='hunk'>@@ -425,4 +752,11 @@</div><div class='ctx'> 		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",</div><div class='ctx'> 				  "hyp-virt";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vbattb_xtal: vbattb-xtal {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board. */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso b/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso<br/>new file mode 100644<br/>index 000000000000..4a81e3a3c8bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod1-type-3a.dtso</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/G3S SMARC Carrier II EVK PMOD parts</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * [Connection]</div><div class='add'>+ *</div><div class='add'>+ * SMARC Carrier II EVK</div><div class='add'>+ * +--------------------------------------------+</div><div class='add'>+ * |PMOD1_3A (PMOD1 PIN HEADER)			|</div><div class='add'>+ * |	SCIF1_CTS# (pin1)  (pin7)  PMOD1_GPIO10	|</div><div class='add'>+ * |	SCIF1_TXD  (pin2)  (pin8)  PMOD1_GPIO11	|</div><div class='add'>+ * |	SCIF1_RXD  (pin3)  (pin9)  PMOD1_GPIO12	|</div><div class='add'>+ * |	SCIF1_RTS# (pin4)  (pin10) PMOD1_GPIO13	|</div><div class='add'>+ * |	GND	   (pin5)  (pin11) GND		|</div><div class='add'>+ * |	PWR_PMOD1  (pin6)  (pin12) GND		|</div><div class='add'>+ * +--------------------------------------------+</div><div class='add'>+ *</div><div class='add'>+ * The following switches should be set as follows for SCIF1:</div><div class='add'>+ * - SW_CONFIG2:  ON</div><div class='add'>+ * - SW_OPT_MUX4: ON</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+#include "rzg3s-smarc-switches.h"</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	scif1_pins: scif1-pins {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(14, 0, 1)&gt;, /* TXD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(14, 1, 1)&gt;, /* RXD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(16, 0, 1)&gt;, /* CTS# */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(16, 1, 1)&gt;; /* RTS# */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if SW_CONFIG3 == SW_ON &amp;&amp; SW_OPT_MUX4 == SW_ON</div><div class='add'>+&amp;scif1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif1_pins&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi<br/>new file mode 100644<br/>index 000000000000..47d843c79021<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g047.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g047.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1185 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/G3E SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a09g047-cpg.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g047";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	audio_extal_clk: audio-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The default cluster table is based on the assumption that the PLLCA55 clock</div><div class='add'>+	 * frequency is set to 1.7GHz. The PLLCA55 clock frequency can be set to</div><div class='add'>+	 * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be</div><div class='add'>+	 * clocked to 1.8GHz as well). The table below should be overridden in the board</div><div class='add'>+	 * DTS based on the PLLCA55 clock frequency.</div><div class='add'>+	 */</div><div class='add'>+	cluster0_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-1700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-850000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;850000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-425000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;425000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-212500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;212500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_CA55_0_CORECLK0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_CA55_0_CORECLK1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_CA55_0_CORECLK2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_CA55_0_CORECLK3&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		L3_CA55: cache-controller-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-630000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;630000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-315000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;315000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-157500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;157500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-78750000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;78750000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-19687500 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;19687500&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qextal_clk: qextal-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtxin_clk: rtxin-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		icu: interrupt-controller@10400000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-icu";</div><div class='add'>+			reg = &lt;0 0x10400000 0 0x10000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 262 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "nmi",</div><div class='add'>+					  "port_irq0", "port_irq1", "port_irq2",</div><div class='add'>+					  "port_irq3", "port_irq4", "port_irq5",</div><div class='add'>+					  "port_irq6", "port_irq7", "port_irq8",</div><div class='add'>+					  "port_irq9", "port_irq10", "port_irq11",</div><div class='add'>+					  "port_irq12", "port_irq13", "port_irq14",</div><div class='add'>+					  "port_irq15",</div><div class='add'>+					  "tint0", "tint1", "tint2", "tint3",</div><div class='add'>+					  "tint4", "tint5", "tint6", "tint7",</div><div class='add'>+					  "tint8", "tint9", "tint10", "tint11",</div><div class='add'>+					  "tint12", "tint13", "tint14", "tint15",</div><div class='add'>+					  "tint16", "tint17", "tint18", "tint19",</div><div class='add'>+					  "tint20", "tint21", "tint22", "tint23",</div><div class='add'>+					  "tint24", "tint25", "tint26", "tint27",</div><div class='add'>+					  "tint28", "tint29", "tint30", "tint31",</div><div class='add'>+					  "int-ca55-0", "int-ca55-1",</div><div class='add'>+					  "int-ca55-2", "int-ca55-3",</div><div class='add'>+					  "icu-error-ca55",</div><div class='add'>+					  "gpt-u0-gtciada", "gpt-u0-gtciadb",</div><div class='add'>+					  "gpt-u1-gtciada", "gpt-u1-gtciadb";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x36&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@10410000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-pinctrl";</div><div class='add'>+			reg = &lt;0 0x10410000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_IOTOP_0_SHCLK&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 232&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;icu&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xa5&gt;, &lt;&amp;cpg 0xa6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpg: clock-controller@10420000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-cpg";</div><div class='add'>+			reg = &lt;0 0x10420000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;audio_extal_clk&gt;, &lt;&amp;rtxin_clk&gt;, &lt;&amp;qextal_clk&gt;;</div><div class='add'>+			clock-names = "audio_extal", "rtxin", "qextal";</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys: system-controller@10430000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-sys";</div><div class='add'>+			reg = &lt;0 0x10430000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G047_SYS_0_PCLK&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xspi: spi@11030000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-xspi";</div><div class='add'>+			reg = &lt;0 0x11030000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x20000000 0 0x10000000&gt;;</div><div class='add'>+			reg-names = "regs", "dirmap";</div><div class='add'>+			interrupts = &lt;GIC_SPI 228 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 229 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "pulse", "err_pulse";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9f&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G047_SPI_CLK_SPI&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa1&gt;;</div><div class='add'>+			clock-names = "ahb", "axi", "spi", "spix2";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa3&gt;, &lt;&amp;cpg 0xa4&gt;;</div><div class='add'>+			reset-names = "hresetn", "aresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac0: dma-controller@11400000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-dmac",</div><div class='add'>+				     "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x11400000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 499 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 90  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 91  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 92  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 93  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 94  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 95  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 96  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x31&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac1: dma-controller@14830000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-dmac",</div><div class='add'>+				     "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x14830000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 495 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 25  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 26  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 27  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 28  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 29  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 34  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 35  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 36  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 39  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 40  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x32&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac2: dma-controller@14840000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-dmac",</div><div class='add'>+				     "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x14840000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 43  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 47  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 49  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 52  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 53  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 54  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x33&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac3: dma-controller@12000000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-dmac",</div><div class='add'>+				     "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x12000000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 497 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 58  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 60  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 61  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 62  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 64  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 65  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 66  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 67  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 69  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 70  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 71  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x34&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac4: dma-controller@12010000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-dmac",</div><div class='add'>+				     "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x12010000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 498 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 74  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 75  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 76  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 77  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 78  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 79  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 80  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 81  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 82  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 83  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 84  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 85  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 87  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 88  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x35&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif0: serial@11c01400 {</div><div class='add'>+			compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x11c01400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 536 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 537 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri", "dri",</div><div class='add'>+					  "tei", "tei-dri", "rxi-edge", "txi-edge";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x8f&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x95&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c: i3c@12400000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-i3c";</div><div class='add'>+			reg = &lt;0 0x12400000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x91&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x92&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x90&gt;;</div><div class='add'>+			clock-names = "pclk", "tclk", "pclkrw";</div><div class='add'>+			interrupts = &lt;GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "ierr", "terr", "abort", "resp",</div><div class='add'>+					  "cmd", "ibi", "rx", "tx", "rcv",</div><div class='add'>+					  "st", "sp", "tend", "nack", "al",</div><div class='add'>+					  "tmo", "wu";</div><div class='add'>+			resets = &lt;&amp;cpg 0x96&gt;, &lt;&amp;cpg 0x97&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		canfd: can@12440000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-canfd";</div><div class='add'>+			reg = &lt;0 0x12440000 0 0x40000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 698 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 701 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "g_err", "g_recc",</div><div class='add'>+					  "ch0_err", "ch0_rec", "ch0_trx",</div><div class='add'>+					  "ch1_err", "ch1_rec", "ch1_trx",</div><div class='add'>+					  "ch2_err", "ch2_rec", "ch2_trx",</div><div class='add'>+					  "ch3_err", "ch3_rec", "ch3_trx",</div><div class='add'>+					  "ch4_err", "ch4_rec", "ch4_trx",</div><div class='add'>+					  "ch5_err", "ch5_rec", "ch5_trx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9c&gt;, &lt;&amp;cpg CPG_MOD 0x9d&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x9e&gt;;</div><div class='add'>+			clock-names = "fck", "ram_clk", "can_clk";</div><div class='add'>+			assigned-clocks = &lt;&amp;cpg CPG_MOD 0x9e&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xa1&gt;, &lt;&amp;cpg 0xa2&gt;;</div><div class='add'>+			reset-names = "rstp_n", "rstc_n";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			channel0 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			channel1 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			channel2 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			channel3 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			channel4 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			channel5 {</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt1: watchdog@14400000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x14400000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4d&gt;, &lt;&amp;cpg CPG_MOD 0x4e&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x76&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt2: watchdog@13000000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x13000000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4f&gt;, &lt;&amp;cpg CPG_MOD 0x50&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x77&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt3: watchdog@13000400 {</div><div class='add'>+			compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x13000400 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x51&gt;, &lt;&amp;cpg CPG_MOD 0x52&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x78&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@14400400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 507 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 506 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x94&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x98&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@14400800 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 509 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 508 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x95&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x99&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@14400c00 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 511 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 510 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x96&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9a&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@14401000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 513 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 512 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x97&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9b&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@14401400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 515 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 514 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x98&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9c&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@14401800 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 517 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 516 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x99&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9d&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@14401c00 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 519 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 518 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9a&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9e&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@14402000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14402000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 521 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 520 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9b&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9f&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c8: i2c@11c01000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g047", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x11c01000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 523 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 522 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x93&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xa0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@14850000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-mali",</div><div class='add'>+				     "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x0 0x14850000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu", "event";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xf0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf1&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf2&gt;;</div><div class='add'>+			clock-names = "gpu", "bus", "bus_ace";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xdd&gt;, &lt;&amp;cpg 0xde&gt;, &lt;&amp;cpg 0xdf&gt;;</div><div class='add'>+			reset-names = "rst", "axi_rst", "ace_rst";</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@14900000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x14900000 0 0x20000&gt;,</div><div class='add'>+			      &lt;0x0 0x14940000 0 0x80000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi0: mmc@15c00000  {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c00000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xa3&gt;, &lt;&amp;cpg CPG_MOD 0xa5&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa4&gt;, &lt;&amp;cpg CPG_MOD 0xa6&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi0_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI0-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi1: mmc@15c10000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c10000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xa7&gt;, &lt;&amp;cpg CPG_MOD 0xa9&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa8&gt;, &lt;&amp;cpg CPG_MOD 0xaa&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi1_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI1-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi2: mmc@15c20000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c20000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xab&gt;, &lt;&amp;cpg CPG_MOD 0xad&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xac&gt;, &lt;&amp;cpg CPG_MOD 0xae&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa9&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi2_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI2-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth0: ethernet@15c30000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c30000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xbd&gt;, &lt;&amp;cpg CPG_MOD 0xbc&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G047_GBETH_0_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xb8&gt;, &lt;&amp;cpg CPG_MOD 0xb9&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xba&gt;, &lt;&amp;cpg CPG_MOD 0xbb&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			interrupts = &lt;GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,force_sf_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup0&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup0&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup0: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup0: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth1: ethernet@15c40000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c40000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xc3&gt;, &lt;&amp;cpg CPG_MOD 0xc2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G047_GBETH_1_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xbe&gt;, &lt;&amp;cpg CPG_MOD 0xbf&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xc0&gt;, &lt;&amp;cpg CPG_MOD 0xc1&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			interrupts = &lt;GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,force_sf_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup1: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup1: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cru: video@16000000 {</div><div class='add'>+			compatible = "renesas,r9a09g047-cru";</div><div class='add'>+			reg = &lt;0 0x16000000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xd3&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xd4&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xd2&gt;;</div><div class='add'>+			clock-names = "video", "apb", "axi";</div><div class='add'>+			interrupts = &lt;GIC_SPI 838 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 840 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 841 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "image_conv", "axi_mst_err",</div><div class='add'>+					  "vd_addr_wend", "sd_addr_wend",</div><div class='add'>+					  "vsd_addr_wend";</div><div class='add'>+			resets = &lt;&amp;cpg 0xc5&gt;, &lt;&amp;cpg 0xc6&gt;;</div><div class='add'>+			reset-names = "presetn", "aresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					crucsi2: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;csi2cru&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		csi2: csi2@16000400 {</div><div class='add'>+			compatible = "renesas,r9a09g047-csi2", "renesas,r9a09g057-csi2";</div><div class='add'>+			reg = &lt;0 0x16000400 0 0xc00&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 837 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xd3&gt;, &lt;&amp;cpg CPG_MOD 0xd4&gt;;</div><div class='add'>+			clock-names = "video", "apb";</div><div class='add'>+			resets = &lt;&amp;cpg 0xc5&gt;, &lt;&amp;cpg 0xc7&gt;;</div><div class='add'>+			reset-names = "presetn", "cmn-rstb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					csi2cru: endpoint@0 {</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+						remote-endpoint = &lt;&amp;crucsi2&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+		snps,lpi_en;</div><div class='add'>+		snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts-extended = &lt;&amp;gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi<br/>new file mode 100644<br/>index 000000000000..e50d9159e832<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/G3E R9A09G047E37 SoC specific parts</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "r9a09g047.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g047e37", "renesas,r9a09g047";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		/delete-node/ cpu@200;</div><div class='add'>+		/delete-node/ cpu@300;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso<br/>new file mode 100644<br/>index 000000000000..0f18f68f8120<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g047e57-smarc-cru-csi-ov5645.dtso</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Device Tree overlay for the RZ/G3E SMARC EVK with OV5645 camera</div><div class='add'>+ * connected to CSI and CRU enabled.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#define OV5645_PARENT_I2C i2c0</div><div class='add'>+#include "rz-smarc-cru-csi-ov5645.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;ov5645 {</div><div class='add'>+	enable-gpios = &lt;&amp;pinctrl RZG3E_GPIO(D, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;pinctrl RZG3E_GPIO(D, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts<br/>new file mode 100644<br/>index 000000000000..08e814c03fa8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts</a></div><div class='hunk'>@@ -0,0 +1,181 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/G3E SMARC EVK board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/* Switch selection settings */</div><div class='add'>+#define SW_LCD_EN		0</div><div class='add'>+#define SW_GPIO8_CAN0_STB	0</div><div class='add'>+#define SW_GPIO9_CAN1_STB	0</div><div class='add'>+#define SW_LCD_EN		0</div><div class='add'>+#define SW_PDM_EN		0</div><div class='add'>+#define SW_SD0_DEV_SEL		0</div><div class='add'>+#define SW_SDIO_M2E		0</div><div class='add'>+</div><div class='add'>+#define PMOD_GPIO4		0</div><div class='add'>+#define PMOD_GPIO6		0</div><div class='add'>+#define PMOD_GPIO7		0</div><div class='add'>+</div><div class='add'>+#define KEY_1_GPIO		RZG3E_GPIO(3, 1)</div><div class='add'>+#define KEY_2_GPIO		RZG3E_GPIO(8, 4)</div><div class='add'>+#define KEY_3_GPIO		RZG3E_GPIO(8, 5)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h&gt;</div><div class='add'>+#include "r9a09g047e57.dtsi"</div><div class='add'>+#include "rzg3e-smarc-som.dtsi"</div><div class='add'>+#include "renesas-smarc2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas SMARC EVK version 2 based on r9a09g047e57";</div><div class='add'>+	compatible = "renesas,smarc2-evk", "renesas,rzg3e-smarcm",</div><div class='add'>+		     "renesas,r9a09g047e57", "renesas,r9a09g047";</div><div class='add'>+</div><div class='add'>+	vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SD1_PVDD";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZG3E_GPIO(1, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;canfd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;canfd_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+#if (!SW_PDM_EN)</div><div class='add'>+	channel1 {</div><div class='add'>+		status = "okay";</div><div class='add'>+#if (!SW_LCD_EN) &amp;&amp; (SW_GPIO9_CAN1_STB)</div><div class='add'>+		phys = &lt;&amp;can_transceiver1&gt;;</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if (!SW_LCD_EN)</div><div class='add'>+	channel4 {</div><div class='add'>+		status = "okay";</div><div class='add'>+#if (SW_GPIO8_CAN0_STB)</div><div class='add'>+		phys = &lt;&amp;can_transceiver0&gt;;</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if (!SW_LCD_EN) &amp;&amp; (SW_GPIO8_CAN0_STB)</div><div class='add'>+&amp;can_transceiver0 {</div><div class='add'>+	standby-gpios = &lt;&amp;pinctrl RZG3E_GPIO(5, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if (!SW_LCD_EN) &amp;&amp; (SW_GPIO9_CAN1_STB)</div><div class='add'>+&amp;can_transceiver1 {</div><div class='add'>+	standby-gpios = &lt;&amp;pinctrl RZG3E_GPIO(5, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;keys {</div><div class='add'>+	pinctrl-0 = &lt;&amp;nmi_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	key-sleep {</div><div class='add'>+		interrupts-extended = &lt;&amp;icu 0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		linux,code = &lt;KEY_SLEEP&gt;;</div><div class='add'>+		label = "SLEEP";</div><div class='add'>+		debounce-interval = &lt;20&gt;;</div><div class='add'>+	};</div><div class='add'>+#if PMOD_GPIO4</div><div class='add'>+	/delete-node/ key-1;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if SW_LCD_EN || PMOD_GPIO6</div><div class='add'>+	/delete-node/ key-2;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if SW_LCD_EN || PMOD_GPIO7</div><div class='add'>+	/delete-node/ key-3;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	canfd_pins: canfd {</div><div class='add'>+		can1_pins: can1 {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(L, 2, 3)&gt;, /* RX */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(L, 3, 3)&gt;; /* TX */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can4_pins: can4 {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(5, 2, 3)&gt;, /* RX */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(5, 3, 3)&gt;; /* TX */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0 {</div><div class='add'>+		pinmux = &lt;RZG3E_PORT_PINMUX(D, 4, 4)&gt;, /* SCL0 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(D, 5, 4)&gt;; /* SDA0 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nmi_pins: nmi {</div><div class='add'>+		pinmux = &lt;RZG3E_PORT_PINMUX(S, 0, 0)&gt;; /* NMI */</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif_pins: scif {</div><div class='add'>+		pins = "SCIF_TXD", "SCIF_RXD";</div><div class='add'>+		renesas,output-impedance = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1-pwr-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZG3E_GPIO(1, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "sd1_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi1_pins: sd1 {</div><div class='add'>+		sd1-cd {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(1, 4, 8)&gt;; /* SD1CD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1-ctrl {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(G, 0, 1)&gt;, /* SD1CLK */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(G, 1, 1)&gt;; /* SD1CMD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1-data {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(G, 2, 1)&gt;, /* SD1DAT0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(G, 3, 1)&gt;, /* SD1DAT1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(G, 4, 1)&gt;, /* SD1DAT2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(G, 5, 1)&gt;; /* SD1DAT3 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vqmmc_sd1_pvdd&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi<br/>new file mode 100644<br/>index 000000000000..98a5faebd47a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/G3E R9A09G047E57 SoC specific parts</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "r9a09g047.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g047e57", "renesas,r9a09g047";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi<br/>new file mode 100644<br/>index 000000000000..887110878906<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g056.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g056.dtsi</a></div><div class='hunk'>@@ -0,0 +1,971 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/V2N SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a09g056-cpg.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+/* RZV2N_Px = Offset address of PFC_P_mn  - 0x20 */</div><div class='add'>+#define RZV2N_P0	0</div><div class='add'>+#define RZV2N_P1	1</div><div class='add'>+#define RZV2N_P2	2</div><div class='add'>+#define RZV2N_P3	3</div><div class='add'>+#define RZV2N_P4	4</div><div class='add'>+#define RZV2N_P5	5</div><div class='add'>+#define RZV2N_P6	6</div><div class='add'>+#define RZV2N_P7	7</div><div class='add'>+#define RZV2N_P8	8</div><div class='add'>+#define RZV2N_P9	9</div><div class='add'>+#define RZV2N_PA	10</div><div class='add'>+#define RZV2N_PB	11</div><div class='add'>+</div><div class='add'>+#define RZV2N_PORT_PINMUX(b, p, f)	RZG2L_PORT_PINMUX(RZV2N_P##b, p, f)</div><div class='add'>+#define RZV2N_GPIO(port, pin)		RZG2L_GPIO(RZV2N_P##port, pin)</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g056";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	audio_extal_clk: audio-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The default cluster table is based on the assumption that the PLLCA55 clock</div><div class='add'>+	 * frequency is set to 1.7GHz. The PLLCA55 clock frequency can be set to</div><div class='add'>+	 * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be</div><div class='add'>+	 * clocked to 1.8GHz as well). The table below should be overridden in the board</div><div class='add'>+	 * DTS based on the PLLCA55 clock frequency.</div><div class='add'>+	 */</div><div class='add'>+	cluster0_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-1700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-850000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;850000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-425000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;425000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-212500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;212500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_CA55_0_CORE_CLK0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_CA55_0_CORE_CLK1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_CA55_0_CORE_CLK2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_CA55_0_CORE_CLK3&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		L3_CA55: cache-controller-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-630000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;630000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-315000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;315000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-157500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;157500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-78750000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;78750000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-19687500 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;19687500&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	qextal_clk: qextal-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtxin_clk: rtxin-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@10410000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-pinctrl";</div><div class='add'>+			reg = &lt;0 0x10410000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_IOTOP_0_SHCLK&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 96&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xa5&gt;, &lt;&amp;cpg 0xa6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpg: clock-controller@10420000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-cpg";</div><div class='add'>+			reg = &lt;0 0x10420000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;audio_extal_clk&gt;, &lt;&amp;rtxin_clk&gt;, &lt;&amp;qextal_clk&gt;;</div><div class='add'>+			clock-names = "audio_extal", "rtxin", "qextal";</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys: system-controller@10430000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-sys";</div><div class='add'>+			reg = &lt;0 0x10430000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G056_SYS_0_PCLK&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xspi: spi@11030000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-xspi", "renesas,r9a09g047-xspi";</div><div class='add'>+			reg = &lt;0 0x11030000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x20000000 0 0x10000000&gt;;</div><div class='add'>+			reg-names = "regs", "dirmap";</div><div class='add'>+			interrupts = &lt;GIC_SPI 228 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 229 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "pulse", "err_pulse";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9f&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G056_SPI_CLK_SPI&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa1&gt;;</div><div class='add'>+			clock-names = "ahb", "axi", "spi", "spix2";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa3&gt;, &lt;&amp;cpg 0xa4&gt;;</div><div class='add'>+			reset-names = "hresetn", "aresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm0: timer@11800000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x11800000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x43&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x6d&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm1: timer@11801000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x11801000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 18 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x44&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x6e&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm2: timer@14000000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x14000000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 19 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x45&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x6f&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm3: timer@14001000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x14001000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 20 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x46&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x70&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm4: timer@12c00000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x12c00000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 21 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x47&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x71&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm5: timer@12c01000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x12c01000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 22 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x48&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x72&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm6: timer@12c02000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x12c02000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 23 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x49&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x73&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ostm7: timer@12c03000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-ostm", "renesas,ostm";</div><div class='add'>+			reg = &lt;0x0 0x12c03000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 24 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4a&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x74&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt0: watchdog@11c00400 {</div><div class='add'>+			compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x11c00400 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4b&gt;, &lt;&amp;cpg CPG_MOD 0x4c&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x75&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt1: watchdog@14400000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x14400000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4d&gt;, &lt;&amp;cpg CPG_MOD 0x4e&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x76&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt2: watchdog@13000000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x13000000 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4f&gt;, &lt;&amp;cpg CPG_MOD 0x50&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x77&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt3: watchdog@13000400 {</div><div class='add'>+			compatible = "renesas,r9a09g056-wdt", "renesas,r9a09g057-wdt";</div><div class='add'>+			reg = &lt;0 0x13000400 0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x51&gt;, &lt;&amp;cpg CPG_MOD 0x52&gt;;</div><div class='add'>+			clock-names = "pclk", "oscclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x78&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scif: serial@11c01400 {</div><div class='add'>+			compatible = "renesas,scif-r9a09g056",</div><div class='add'>+				     "renesas,scif-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x11c01400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 536 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 537 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "bri", "dri",</div><div class='add'>+					  "tei", "tei-dri", "rxi-edge", "txi-edge";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x8f&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x95&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c: i3c@12400000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-i3c", "renesas,r9a09g047-i3c";</div><div class='add'>+			reg = &lt;0 0x12400000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x91&gt;, &lt;&amp;cpg CPG_MOD 0x92&gt;, &lt;&amp;cpg CPG_MOD 0x90&gt;;</div><div class='add'>+			clock-names = "pclk", "tclk", "pclkrw";</div><div class='add'>+			interrupts = &lt;GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "ierr", "terr", "abort", "resp",</div><div class='add'>+					  "cmd", "ibi", "rx", "tx", "rcv",</div><div class='add'>+					  "st", "sp", "tend", "nack",</div><div class='add'>+					  "al", "tmo", "wu";</div><div class='add'>+			resets = &lt;&amp;cpg 0x96&gt;, &lt;&amp;cpg 0x97&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@14400400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 507 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 506 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x94&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x98&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@14400800 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 509 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 508 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x95&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x99&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@14400c00 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14400c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 511 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 510 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x96&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9a&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@14401000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 513 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 512 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x97&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9b&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@14401400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 515 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 514 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x98&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9c&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@14401800 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 517 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 516 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x99&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9d&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@14401c00 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14401c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 519 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 518 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9a&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9e&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@14402000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x14402000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 521 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 520 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9b&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x9f&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c8: i2c@11c01000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g056", "renesas,riic-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x11c01000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 523 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 522 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "tei", "ri", "ti", "spi", "sti",</div><div class='add'>+					  "naki", "ali", "tmoi";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x93&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xa0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@14850000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-mali",</div><div class='add'>+				     "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x0 0x14850000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu", "event";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xf0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf1&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf2&gt;;</div><div class='add'>+			clock-names = "gpu", "bus", "bus_ace";</div><div class='add'>+			resets = &lt;&amp;cpg 0xdd&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xde&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xdf&gt;;</div><div class='add'>+			reset-names = "rst", "axi_rst", "ace_rst";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@14900000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x14900000 0 0x20000&gt;,</div><div class='add'>+			      &lt;0x0 0x14940000 0 0x80000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci0: usb@15800000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0 0x15800000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 742 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;, &lt;&amp;cpg 0xac&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@15800100 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt;0 0x15800100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 743 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;, &lt;&amp;cpg 0xac&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			companion = &lt;&amp;ohci0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2_phy0: usb-phy@15800200 {</div><div class='add'>+			compatible = "renesas,usb2-phy-r9a09g056", "renesas,usb2-phy-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x15800200 0 0x700&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G056_USB2_0_CLK_CORE0&gt;;</div><div class='add'>+			clock-names = "fck", "usb_x1";</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsusb: usb@15820000 {</div><div class='add'>+			compatible = "renesas,usbhs-r9a09g056",</div><div class='add'>+				     "renesas,rzg2l-usbhs";</div><div class='add'>+			reg = &lt;0 0x15820000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 751 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb5&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xae&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb20phyrst: usb20phy-reset@15830000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-usb2phy-reset",</div><div class='add'>+				     "renesas,r9a09g057-usb2phy-reset";</div><div class='add'>+			reg = &lt;0 0x15830000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xaf&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#reset-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi0: mmc@15c00000  {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g056", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c00000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xa3&gt;, &lt;&amp;cpg CPG_MOD 0xa5&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa4&gt;, &lt;&amp;cpg CPG_MOD 0xa6&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa7&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi0_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI0-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi1: mmc@15c10000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g056", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c10000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xa7&gt;, &lt;&amp;cpg CPG_MOD 0xa9&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa8&gt;, &lt;&amp;cpg CPG_MOD 0xaa&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa8&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi1_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI1-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi2: mmc@15c20000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g056", "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x15c20000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xab&gt;, &lt;&amp;cpg CPG_MOD 0xad&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xac&gt;, &lt;&amp;cpg CPG_MOD 0xae&gt;;</div><div class='add'>+			clock-names = "core", "clkh", "cd", "aclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa9&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi2_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI2-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth0: ethernet@15c30000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c30000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xbd&gt;, &lt;&amp;cpg CPG_MOD 0xbc&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G056_GBETH_0_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xb8&gt;, &lt;&amp;cpg CPG_MOD 0xb9&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xba&gt;, &lt;&amp;cpg CPG_MOD 0xbb&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,no-pbl-x8;</div><div class='add'>+			snps,force_thresh_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup0&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup0&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup0: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup0: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth1: ethernet@15c40000 {</div><div class='add'>+			compatible = "renesas,r9a09g056-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c40000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xc3&gt;, &lt;&amp;cpg CPG_MOD 0xc2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G056_GBETH_1_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xbe&gt;, &lt;&amp;cpg CPG_MOD 0xbf&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xc0&gt;, &lt;&amp;cpg CPG_MOD 0xc1&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,no-pbl-x8;</div><div class='add'>+			snps,force_thresh_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup1: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup1: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+		snps,lpi_en;</div><div class='add'>+		snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts-extended = &lt;&amp;gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts<br/>new file mode 100644<br/>index 000000000000..066e66b5d51a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,440 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/V2N EVK board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "r9a09g056.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas RZ/V2N EVK Board based on r9a09g056n48";</div><div class='add'>+	compatible = "renesas,rzv2n-evk", "renesas,r9a09g056n48", "renesas,r9a09g056";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c6 = &amp;i2c6;</div><div class='add'>+		i2c7 = &amp;i2c7;</div><div class='add'>+		i2c8 = &amp;i2c8;</div><div class='add'>+		mmc1 = &amp;sdhi1;</div><div class='add'>+		serial0 = &amp;scif;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ignore_loglevel";</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* first 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x1 0xf8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_0p8v: regulator-0p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-0.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vqmmc_sdhi1: regulator-vqmmc-sdhi1 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI1 VqmmC";</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZV2N_GPIO(A, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 32.768kHz crystal */</div><div class='add'>+	x6: x6-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audio_extal_clk {</div><div class='add'>+	clock-frequency = &lt;22579200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mali-supply = &lt;&amp;reg_0p8v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsusb {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c7_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c8_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	raa215300: pmic@12 {</div><div class='add'>+		compatible = "renesas,raa215300";</div><div class='add'>+		reg = &lt;0x12&gt;, &lt;0x6f&gt;;</div><div class='add'>+		reg-names = "main", "rtc";</div><div class='add'>+		clocks = &lt;&amp;x6&gt;;</div><div class='add'>+		clock-names = "xin";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	phy0: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;0&gt;;</div><div class='add'>+		txc-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;0&gt;;</div><div class='add'>+		txc-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	eth0_pins: eth0 {</div><div class='add'>+		pins = "ET0_TXC_TXCLK";</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_pins: eth1 {</div><div class='add'>+		pins = "ET1_TXC_TXCLK";</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0_pins: i2c0 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(3, 0, 1)&gt;, /* I2C0_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(3, 1, 1)&gt;; /* I2C0_SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(3, 2, 1)&gt;, /* I2C1_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(3, 3, 1)&gt;; /* I2C1_SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c2 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(2, 0, 4)&gt;, /* I2C2_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(2, 1, 4)&gt;; /* I2C2_SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3_pins: i2c3 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(3, 6, 1)&gt;, /* I2C3_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(3, 7, 1)&gt;; /* I2C3_SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6_pins: i2c6 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(4, 4, 1)&gt;, /* I2C6_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(4, 5, 1)&gt;; /* I2C6_SCL */</div><div class='add'>+		/* There are no pull-up resistors on the EVK, so enable the internal pull-up */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7_pins: i2c7 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(4, 6, 1)&gt;, /* I2C7_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(4, 7, 1)&gt;; /* I2C7_SCL */</div><div class='add'>+		/* There are no pull-up resistors on the EVK, so enable the internal pull-up */</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8_pins: i2c8 {</div><div class='add'>+		pinmux = &lt;RZV2N_PORT_PINMUX(0, 6, 1)&gt;, /* I2C8_SDA */</div><div class='add'>+			 &lt;RZV2N_PORT_PINMUX(0, 7, 1)&gt;; /* I2C8_SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scif_pins: scif {</div><div class='add'>+		pins = "SCIF_TXD", "SCIF_RXD";</div><div class='add'>+		renesas,output-impedance = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd1-pwr-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZV2N_GPIO(A, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "sd1_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi1_pins: sd1 {</div><div class='add'>+		sd1-cd {</div><div class='add'>+			pinmux = &lt;RZV2N_PORT_PINMUX(9, 4, 14)&gt;; /* SD1_CD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1-clk {</div><div class='add'>+			pins = "SD1CLK";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd1-dat-cmd {</div><div class='add'>+			pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";</div><div class='add'>+			input-enable;</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb20_pins: usb20 {</div><div class='add'>+		ovc {</div><div class='add'>+			pinmux = &lt;RZV2N_PORT_PINMUX(9, 6, 14)&gt;; /* OVC */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vbus {</div><div class='add'>+			pinmux = &lt;RZV2N_PORT_PINMUX(9, 5, 14)&gt;; /* VBUS */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xspi_pins: xspi0 {</div><div class='add'>+		ctrl {</div><div class='add'>+			pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		io {</div><div class='add'>+			pins = "XSPI0_IO0", "XSPI0_IO1", "XSPI0_IO2", "XSPI0_IO3";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qextal_clk {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtxin_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vqmmc_sdhi1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20phyrst {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2_phy0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb20_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xspi {</div><div class='add'>+	pinctrl-0 = &lt;&amp;xspi_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	/*</div><div class='add'>+	 * MT25QU512ABB8E12 flash chip is capable of running at 166MHz</div><div class='add'>+	 * clock frequency. Set the clock frequency to the maximum 133MHz</div><div class='add'>+	 * supported by the RZ/V2N SoC.</div><div class='add'>+	 */</div><div class='add'>+	assigned-clocks = &lt;&amp;cpg CPG_CORE R9A09G056_SPI_CLK_SPI&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;133333334&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x00060000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@60000 {</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x00060000 0x1fa0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@2000000 {</div><div class='add'>+				label = "user";</div><div class='add'>+				reg = &lt;0x2000000 0x2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi<br/>index 1ad5a1b6917f..630f7a98df38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g057.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g057.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g057.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g057.dtsi</a></div><div class='hunk'>@@ -20,6 +20,39 @@</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The default cluster table is based on the assumption that the PLLCA55 clock</div><div class='add'>+	 * frequency is set to 1.7GHz. The PLLCA55 clock frequency can be set to</div><div class='add'>+	 * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be</div><div class='add'>+	 * clocked to 1.8GHz as well). The table below should be overridden in the board</div><div class='add'>+	 * DTS based on the PLLCA55 clock frequency.</div><div class='add'>+	 */</div><div class='add'>+	cluster0_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-1700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-850000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;850000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-425000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;425000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-212500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;212500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;300000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -30,6 +63,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@100 {</div><div class='hunk'>@@ -38,6 +73,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK1&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@200 {</div><div class='hunk'>@@ -46,6 +83,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK2&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@300 {</div><div class='hunk'>@@ -54,6 +93,8 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK3&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		L3_CA55: cache-controller-0 {</div><div class='hunk'>@@ -64,6 +105,35 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-630000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;630000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-315000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;315000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-157500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;157500000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-78750000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;78750000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-19687500 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;19687500&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	psci {</div><div class='ctx'> 		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='ctx'> 		method = "smc";</div><div class='hunk'>@@ -90,6 +160,95 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		icu: interrupt-controller@10400000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-icu";</div><div class='add'>+			reg = &lt;0 0x10400000 0 0x10000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 262 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 263 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "nmi",</div><div class='add'>+					  "port_irq0", "port_irq1", "port_irq2",</div><div class='add'>+					  "port_irq3", "port_irq4", "port_irq5",</div><div class='add'>+					  "port_irq6", "port_irq7", "port_irq8",</div><div class='add'>+					  "port_irq9", "port_irq10", "port_irq11",</div><div class='add'>+					  "port_irq12", "port_irq13", "port_irq14",</div><div class='add'>+					  "port_irq15",</div><div class='add'>+					  "tint0", "tint1", "tint2", "tint3",</div><div class='add'>+					  "tint4", "tint5", "tint6", "tint7",</div><div class='add'>+					  "tint8", "tint9", "tint10", "tint11",</div><div class='add'>+					  "tint12", "tint13", "tint14", "tint15",</div><div class='add'>+					  "tint16", "tint17", "tint18", "tint19",</div><div class='add'>+					  "tint20", "tint21", "tint22", "tint23",</div><div class='add'>+					  "tint24", "tint25", "tint26", "tint27",</div><div class='add'>+					  "tint28", "tint29", "tint30", "tint31",</div><div class='add'>+					  "int-ca55-0", "int-ca55-1",</div><div class='add'>+					  "int-ca55-2", "int-ca55-3",</div><div class='add'>+					  "icu-error-ca55",</div><div class='add'>+					  "gpt-u0-gtciada", "gpt-u0-gtciadb",</div><div class='add'>+					  "gpt-u1-gtciada", "gpt-u1-gtciadb";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x5&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x36&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl: pinctrl@10410000 {</div><div class='ctx'> 			compatible = "renesas,r9a09g057-pinctrl";</div><div class='ctx'> 			reg = &lt;0 0x10410000 0 0x10000&gt;;</div><div class='hunk'>@@ -99,6 +258,7 @@</div><div class='ctx'> 			gpio-ranges = &lt;&amp;pinctrl 0 0 96&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;icu&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 0xa5&gt;, &lt;&amp;cpg 0xa6&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -118,9 +278,194 @@</div><div class='ctx'> 			reg = &lt;0 0x10430000 0 0x10000&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;cpg CPG_CORE R9A09G057_SYS_0_PCLK&gt;;</div><div class='ctx'> 			resets = &lt;&amp;cpg 0x30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		xspi: spi@11030000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-xspi", "renesas,r9a09g047-xspi";</div><div class='add'>+			reg = &lt;0 0x11030000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x20000000 0 0x10000000&gt;;</div><div class='add'>+			reg-names = "regs", "dirmap";</div><div class='add'>+			interrupts = &lt;GIC_SPI 228 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 229 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "pulse", "err_pulse";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x9f&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G057_SPI_CLK_SPI&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xa1&gt;;</div><div class='add'>+			clock-names = "ahb", "axi", "spi", "spix2";</div><div class='add'>+			resets = &lt;&amp;cpg 0xa3&gt;, &lt;&amp;cpg 0xa4&gt;;</div><div class='add'>+			reset-names = "hresetn", "aresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dmac0: dma-controller@11400000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x11400000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 499 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 90  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 91  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 92  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 93  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 94  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 95  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 96  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 97  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 98  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 99  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 100 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 101 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 103 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 104 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x31&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac1: dma-controller@14830000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x14830000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 495 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 25  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 26  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 27  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 28  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 29  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 30  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 31  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 32  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 34  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 35  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 36  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 39  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 40  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x32&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac2: dma-controller@14840000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x14840000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 496 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 43  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 47  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 49  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 52  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 53  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 54  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x33&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac3: dma-controller@12000000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x12000000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 497 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 58  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 60  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 61  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 62  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 64  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 65  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 66  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 67  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 69  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 70  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 71  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x3&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x34&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac4: dma-controller@12010000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-dmac";</div><div class='add'>+			reg = &lt;0 0x12010000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 498 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 74  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 75  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 76  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 77  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 78  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 79  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 80  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 81  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 82  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 83  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 84  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 85  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 87  IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 88  IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "error",</div><div class='add'>+					  "ch0", "ch1", "ch2", "ch3",</div><div class='add'>+					  "ch4", "ch5", "ch6", "ch7",</div><div class='add'>+					  "ch8", "ch9", "ch10", "ch11",</div><div class='add'>+					  "ch12", "ch13", "ch14", "ch15";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x4&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0x35&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			dma-channels = &lt;16&gt;;</div><div class='add'>+			renesas,icu = &lt;&amp;icu 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ostm0: timer@11800000 {</div><div class='ctx'> 			compatible = "renesas,r9a09g057-ostm", "renesas,ostm";</div><div class='ctx'> 			reg = &lt;0x0 0x11800000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -262,6 +607,102 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		i3c: i3c@12400000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-i3c", "renesas,r9a09g047-i3c";</div><div class='add'>+			reg = &lt;0 0x12400000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x91&gt;, &lt;&amp;cpg CPG_MOD 0x92&gt;, &lt;&amp;cpg CPG_MOD 0x90&gt;;</div><div class='add'>+			clock-names = "pclk", "tclk", "pclkrw";</div><div class='add'>+			interrupts = &lt;GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 677 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 678 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 679 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 680 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 681 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 682 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "ierr", "terr", "abort", "resp",</div><div class='add'>+					  "cmd", "ibi", "rx", "tx", "rcv",</div><div class='add'>+					  "st", "sp", "tend", "nack",</div><div class='add'>+					  "al", "tmo", "wu";</div><div class='add'>+			resets = &lt;&amp;cpg 0x96&gt;, &lt;&amp;cpg 0x97&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rspi0: spi@12800000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-rspi";</div><div class='add'>+			reg = &lt;0x0 0x12800000 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 107 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 500 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 501 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "idle", "error", "end", "rx", "tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x54&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x55&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x56&gt;;</div><div class='add'>+			clock-names = "pclk", "pclk_sfr", "tclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x7b&gt;, &lt;&amp;cpg 0x7c&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rspi1: spi@12800400 {</div><div class='add'>+			compatible = "renesas,r9a09g057-rspi";</div><div class='add'>+			reg = &lt;0x0 0x12800400 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 502 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 503 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "idle", "error", "end", "rx", "tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x57&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x58&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x59&gt;;</div><div class='add'>+			clock-names = "pclk", "pclk_sfr", "tclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x7d&gt;, &lt;&amp;cpg 0x7e&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rspi2: spi@12800800 {</div><div class='add'>+			compatible = "renesas,r9a09g057-rspi";</div><div class='add'>+			reg = &lt;0x0 0x12800800 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 113 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 504 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 505 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			interrupt-names = "idle", "error", "end", "rx", "tx";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0x5a&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x5b&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0x5c&gt;;</div><div class='add'>+			clock-names = "pclk", "pclk_sfr", "tclk";</div><div class='add'>+			resets = &lt;&amp;cpg 0x7f&gt;, &lt;&amp;cpg 0x80&gt;;</div><div class='add'>+			reset-names = "presetn", "tresetn";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		i2c0: i2c@14400400 {</div><div class='ctx'> 			compatible = "renesas,riic-r9a09g057";</div><div class='ctx'> 			reg = &lt;0 0x14400400 0 0x400&gt;;</div><div class='hunk'>@@ -451,6 +892,28 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@14850000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-mali",</div><div class='add'>+				     "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x0 0x14850000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 884 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 885 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 883 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 886 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu", "event";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xf0&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf1&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xf2&gt;;</div><div class='add'>+			clock-names = "gpu", "bus", "bus_ace";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xdd&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xde&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xdf&gt;;</div><div class='add'>+			reset-names = "rst", "axi_rst", "ace_rst";</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@14900000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='ctx'> 			reg = &lt;0x0 0x14900000 0 0x20000&gt;,</div><div class='hunk'>@@ -461,6 +924,119 @@</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ohci0: usb@15800000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0 0x15800000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 742 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;, &lt;&amp;cpg 0xac&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci1: usb@15810000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0 0x15810000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 747 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb4&gt;, &lt;&amp;cpg CPG_MOD 0xb7&gt;;</div><div class='add'>+			resets = &lt;&amp;usb21phyrst&gt;, &lt;&amp;cpg 0xad&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy1 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci0: usb@15800100 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt;0 0x15800100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 743 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;, &lt;&amp;cpg 0xac&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			companion = &lt;&amp;ohci0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci1: usb@15810100 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt;0 0x15810100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 748 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb4&gt;, &lt;&amp;cpg CPG_MOD 0xb7&gt;;</div><div class='add'>+			resets = &lt;&amp;usb21phyrst&gt;, &lt;&amp;cpg 0xad&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy1 2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			companion = &lt;&amp;ohci1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2_phy0: usb-phy@15800200 {</div><div class='add'>+			compatible = "renesas,usb2-phy-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x15800200 0 0x700&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G057_USB2_0_CLK_CORE0&gt;;</div><div class='add'>+			clock-names = "fck", "usb_x1";</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2_phy1: usb-phy@15810200 {</div><div class='add'>+			compatible = "renesas,usb2-phy-r9a09g057";</div><div class='add'>+			reg = &lt;0 0x15810200 0 0x700&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 750 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb4&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G057_USB2_0_CLK_CORE1&gt;;</div><div class='add'>+			clock-names = "fck", "usb_x1";</div><div class='add'>+			resets = &lt;&amp;usb21phyrst&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsusb: usb@15820000 {</div><div class='add'>+			compatible = "renesas,usbhs-r9a09g057",</div><div class='add'>+				     "renesas,rzg2l-usbhs";</div><div class='add'>+			reg = &lt;0 0x15820000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 751 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb3&gt;, &lt;&amp;cpg CPG_MOD 0xb5&gt;;</div><div class='add'>+			resets = &lt;&amp;usb20phyrst&gt;,</div><div class='add'>+				 &lt;&amp;cpg 0xae&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy0 3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb20phyrst: usb20phy-reset@15830000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-usb2phy-reset";</div><div class='add'>+			reg = &lt;0 0x15830000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb6&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xaf&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#reset-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb21phyrst: usb21phy-reset@15840000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-usb2phy-reset";</div><div class='add'>+			reg = &lt;0 0x15840000 0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xb7&gt;;</div><div class='add'>+			resets = &lt;&amp;cpg 0xaf&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#reset-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		sdhi0: mmc@15c00000  {</div><div class='ctx'> 			compatible = "renesas,sdhi-r9a09g057";</div><div class='ctx'> 			reg = &lt;0x0 0x15c00000 0 0x10000&gt;;</div><div class='hunk'>@@ -472,6 +1048,13 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 0xa7&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi0_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI0-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdhi1: mmc@15c10000 {</div><div class='hunk'>@@ -485,6 +1068,13 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 0xa8&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi1_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI1-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdhi2: mmc@15c20000 {</div><div class='hunk'>@@ -498,7 +1088,223 @@</div><div class='ctx'> 			resets = &lt;&amp;cpg 0xa9&gt;;</div><div class='ctx'> 			power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi2_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI2-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth0: ethernet@15c30000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c30000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 775 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xbd&gt;, &lt;&amp;cpg CPG_MOD 0xbc&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G057_GBETH_0_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xb8&gt;, &lt;&amp;cpg CPG_MOD 0xb9&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xba&gt;, &lt;&amp;cpg CPG_MOD 0xbb&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,no-pbl-x8;</div><div class='add'>+			snps,force_thresh_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup0&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup0&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup0: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup0: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		eth1: ethernet@15c40000 {</div><div class='add'>+			compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",</div><div class='add'>+				     "snps,dwmac-5.20";</div><div class='add'>+			reg = &lt;0 0x15c40000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+					  "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+					  "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+					  "tx-queue-2", "tx-queue-3";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 0xc3&gt;, &lt;&amp;cpg CPG_MOD 0xc2&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G057_GBETH_1_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xbe&gt;, &lt;&amp;cpg CPG_MOD 0xbf&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_MOD 0xc0&gt;, &lt;&amp;cpg CPG_MOD 0xc1&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+				      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+			resets = &lt;&amp;cpg 0xb1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,no-pbl-x8;</div><div class='add'>+			snps,force_thresh_dma_mode;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;mtl_rx_setup1&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;mtl_tx_setup1&gt;;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_rx_setup1: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+				snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+					snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtl_tx_setup1: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+				queue0 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue1 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue2 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				queue3 {</div><div class='add'>+					snps,dcb-algorithm;</div><div class='add'>+					snps,priority = &lt;0x8&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+		snps,lpi_en;</div><div class='add'>+		snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+		snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	timer {</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts<br/>index 4703da8e9cff..5c06bce3d5b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include "r9a09g057.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> 	compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='ctx'> 		i2c0 = &amp;i2c0;</div><div class='ctx'> 		i2c1 = &amp;i2c1;</div><div class='ctx'> 		i2c2 = &amp;i2c2;</div><div class='hunk'>@@ -43,7 +45,26 @@</div><div class='ctx'> 		reg = &lt;0x2 0x40000000 0x2 0x00000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reg_3p3v: regulator1 {</div><div class='add'>+	reg_0p8v: regulator-0p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "fixed-0.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> </div><div class='ctx'> 		regulator-name = "fixed-3.3V";</div><div class='hunk'>@@ -56,18 +77,60 @@</div><div class='ctx'> 	vqmmc_sdhi1: regulator-vccq-sdhi1 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "SDHI1 VccQ";</div><div class='del'>-		gpios = &lt;&amp;pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZV2H_GPIO(A, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		gpios-states = &lt;0&gt;;</div><div class='ctx'> 		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* 32.768kHz crystal */</div><div class='add'>+	x6: x6-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;audio_extal_clk {</div><div class='ctx'> 	clock-frequency = &lt;22579200&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ehci0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mali-supply = &lt;&amp;reg_0p8v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsusb {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -122,6 +185,61 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	raa215300: pmic@12 {</div><div class='add'>+		compatible = "renesas,raa215300";</div><div class='add'>+		reg = &lt;0x12&gt;, &lt;0x6f&gt;;</div><div class='add'>+		reg-names = "main", "rtc";</div><div class='add'>+		clocks = &lt;&amp;x6&gt;;</div><div class='add'>+		clock-names = "xin";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	phy0: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;0&gt;;</div><div class='add'>+		txc-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;0&gt;;</div><div class='add'>+		txc-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci1 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ostm0 {</div><div class='hunk'>@@ -157,39 +275,49 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	eth0_pins: eth0 {</div><div class='add'>+		pins = "ET0_TXC_TXCLK";</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_pins: eth1 {</div><div class='add'>+		pins = "ET1_TXC_TXCLK";</div><div class='add'>+		output-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c0_pins: i2c0 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(3, 0, 1)&gt;, /* I2C0_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(3, 1, 1)&gt;; /* I2C0_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(3, 0, 1)&gt;, /* I2C0_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(3, 1, 1)&gt;; /* I2C0_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c1_pins: i2c1 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(3, 2, 1)&gt;, /* I2C1_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(3, 3, 1)&gt;; /* I2C1_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(3, 2, 1)&gt;, /* I2C1_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(3, 3, 1)&gt;; /* I2C1_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c2_pins: i2c2 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(2, 0, 4)&gt;, /* I2C2_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(2, 1, 4)&gt;; /* I2C2_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(2, 0, 4)&gt;, /* I2C2_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(2, 1, 4)&gt;; /* I2C2_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c3_pins: i2c3 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(3, 6, 1)&gt;, /* I2C3_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(3, 7, 1)&gt;; /* I2C3_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(3, 6, 1)&gt;, /* I2C3_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(3, 7, 1)&gt;; /* I2C3_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c6_pins: i2c6 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(4, 4, 1)&gt;, /* I2C6_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(4, 5, 1)&gt;; /* I2C6_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(4, 4, 1)&gt;, /* I2C6_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(4, 5, 1)&gt;; /* I2C6_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c7_pins: i2c7 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(4, 6, 1)&gt;, /* I2C7_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(4, 7, 1)&gt;; /* I2C7_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(4, 6, 1)&gt;, /* I2C7_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(4, 7, 1)&gt;; /* I2C7_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c8_pins: i2c8 {</div><div class='del'>-		pinmux = &lt;RZG2L_PORT_PINMUX(0, 6, 1)&gt;, /* I2C8_SDA */</div><div class='del'>-			 &lt;RZG2L_PORT_PINMUX(0, 7, 1)&gt;; /* I2C8_SCL */</div><div class='add'>+		pinmux = &lt;RZV2H_PORT_PINMUX(0, 6, 1)&gt;, /* I2C8_SDA */</div><div class='add'>+			 &lt;RZV2H_PORT_PINMUX(0, 7, 1)&gt;; /* I2C8_SCL */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	scif_pins: scif {</div><div class='hunk'>@@ -199,7 +327,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sd1-pwr-en-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='del'>-		gpios = &lt;RZG2L_GPIO(10, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios = &lt;RZV2H_GPIO(A, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-high;</div><div class='ctx'> 		line-name = "sd1_pwr_en";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -219,7 +347,39 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sd1_cd {</div><div class='del'>-			pinmux = &lt;RZG2L_PORT_PINMUX(9, 4, 14)&gt;; /* SD1_CD */</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(9, 4, 14)&gt;; /* SD1_CD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb20_pins: usb20 {</div><div class='add'>+		ovc {</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(9, 6, 14)&gt;; /* OVC */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vbus {</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(9, 5, 14)&gt;; /* VBUS */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb21_pins: usb21 {</div><div class='add'>+		ovc {</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(6, 7, 14)&gt;; /* OVC */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vbus {</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(6, 6, 14)&gt;; /* VBUS */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xspi_pins: xspi0 {</div><div class='add'>+		ctrl {</div><div class='add'>+			pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		io {</div><div class='add'>+			pins = "XSPI0_IO0", "XSPI0_IO1", "XSPI0_IO2", "XSPI0_IO3";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -251,6 +411,71 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb20phyrst {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb21phyrst {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2_phy0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb20_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2_phy1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb21_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdt1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;xspi {</div><div class='add'>+	pinctrl-0 = &lt;&amp;xspi_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	/*</div><div class='add'>+	 * MT25QU512ABB8E12 flash chip is capable of running at 166MHz</div><div class='add'>+	 * clock frequency. Set the clock frequency to the maximum 133MHz</div><div class='add'>+	 * supported by the RZ/V2H SoC.</div><div class='add'>+	 */</div><div class='add'>+	assigned-clocks = &lt;&amp;cpg CPG_CORE R9A09G057_SPI_CLK_SPI&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;133333334&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x00060000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@60000 {</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x00060000 0x1fa0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@2000000 {</div><div class='add'>+				label = "user";</div><div class='add'>+				reg = &lt;0x2000000 0x2000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts b/arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts<br/>new file mode 100644<br/>index 000000000000..adf3ab8aef2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the Yuridenki-Shokai Kakip board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "r9a09g057.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Yuridenki-Shokai Kakip Board based on r9a09g057h48";</div><div class='add'>+	compatible = "yuridenki,kakip", "renesas,r9a09g057h48", "renesas,r9a09g057";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;scif;</div><div class='add'>+		mmc0 = &amp;sdhi0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* first 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x1 0xF8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vqmmc_sdhi0: regulator-vccq-sdhi0 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI0 VccQ";</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZV2H_GPIO(A, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ostm7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	scif_pins: scif {</div><div class='add'>+		pins = "SCIF_RXD", "SCIF_TXD";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd0-pwr-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZV2H_GPIO(A, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "sd0_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_pins: sd0 {</div><div class='add'>+		sd0-clk {</div><div class='add'>+			pins = "SD0CLK";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-data {</div><div class='add'>+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD";</div><div class='add'>+			input-enable;</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-mux {</div><div class='add'>+			pinmux = &lt;RZV2H_PORT_PINMUX(A, 5, 15)&gt;; /* SD0_CD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qextal_clk {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif {</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vqmmc_sdhi0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi<br/>new file mode 100644<br/>index 000000000000..7f1aca218c9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g077.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g077.dtsi</a></div><div class='hunk'>@@ -0,0 +1,399 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/T2H SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g077";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		L3_CA55: cache-controller-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extal_clk: extal {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		sci0: serial@80005000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 8&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci1: serial@80005400 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 9&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci2: serial@80005800 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 600 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 10&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci3: serial@80005c00 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 603 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 604 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 11&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci4: serial@80006000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80006000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 607 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 608 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 12&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci5: serial@81005000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x81005000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 611 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 612 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 600&gt;, &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt0: watchdog@80082000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082000 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295100 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt1: watchdog@80082400 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082400 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295104 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt2: watchdog@80082800 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082800 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295108 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt3: watchdog@80082c00 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082c00 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x8129510c 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt4: watchdog@80083000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80083000 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295110 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt5: watchdog@80083400 {</div><div class='add'>+			compatible = "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80083400 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295114 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@80088000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x80088000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 615 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 616 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@80088400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x80088400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 619 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 620 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 621 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 101&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@81008000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x81008000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 623 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 624 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 601&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpg: clock-controller@80280000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-cpg-mssr";</div><div class='add'>+			reg = &lt;0 0x80280000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x81280000 0 0x9000&gt;;</div><div class='add'>+			clocks = &lt;&amp;extal_clk&gt;;</div><div class='add'>+			clock-names = "extal";</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@802c0000 {</div><div class='add'>+			compatible = "renesas,r9a09g077-pinctrl";</div><div class='add'>+			reg = &lt;0 0x802c0000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x812c0000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x802b0000 0 0x10000&gt;;</div><div class='add'>+			reg-names = "nsr", "srs", "srn";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G077_CLK_PCLKM&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 288&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@83000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x83000000 0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x83040000 0 0x160000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci: usb@92040000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0 0x92040000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci: usb@92040100 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt;0 0x92040100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			companion = &lt;&amp;ohci&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2_phy: usb-phy@92040200 {</div><div class='add'>+			compatible = "renesas,usb2-phy-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x92040200 0 0x700&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G077_USB_CLK&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsusb: usb@92041000 {</div><div class='add'>+			compatible = "renesas,usbhs-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x92041000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi0: mmc@92080000  {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g077",</div><div class='add'>+				     "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x92080000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1212&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G077_SDHI_CLKHS&gt;;</div><div class='add'>+			clock-names = "aclk", "clkh";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi0_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI0-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi1: mmc@92090000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g077",</div><div class='add'>+				     "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x92090000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1213&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G077_SDHI_CLKHS&gt;;</div><div class='add'>+			clock-names = "aclk", "clkh";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi1_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI1-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts-extended = &lt;&amp;gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts<br/>new file mode 100644<br/>index 000000000000..2bf867273ad0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/T2H EVK board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "r9a09g077m44.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SD0 can be connected to either eMMC (IC49) or SD card slot CN31</div><div class='add'>+ * Lets by default enable the eMMC, note we need the below SW settings</div><div class='add'>+ * for eMMC.</div><div class='add'>+ * SW2[1] = ON; SW2[2] = ON</div><div class='add'>+ *</div><div class='add'>+ * To enable SD card and disable eMMC on SDHI0 disable the below macro</div><div class='add'>+ * and set the below switch setting:</div><div class='add'>+ * SW2[1] = OFF; SW2[2] = ON</div><div class='add'>+ */</div><div class='add'>+#define SD0_EMMC	1</div><div class='add'>+#define SD0_SD		(!SD0_EMMC)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * P17_4 = SD1_CD; SW2[3] = ON</div><div class='add'>+ * P08_5 = SD1_PWEN; SW2[3] = ON</div><div class='add'>+ * P08_6 = SD1_IOVS; SW2[3] = ON; SW5[3] = OFF; SW5[4] = ON</div><div class='add'>+ */</div><div class='add'>+#define SD1_MICRO_SD	1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * USB Pin Configuration:</div><div class='add'>+ *</div><div class='add'>+ * This board is equipped with three USB connectors: Type-A (CN80), Mini-B</div><div class='add'>+ * (CN79), and Micro-AB (CN33). The RZ/T2H SoC has a single USB channel, so</div><div class='add'>+ * either the USB host interface or the USB function interface can be used,</div><div class='add'>+ * but not both simultaneously when using the CN79 and CN80 connectors.</div><div class='add'>+ *</div><div class='add'>+ * By default, the Type-A (CN80) and Mini-B (CN79) connectors are enabled.</div><div class='add'>+ * Configure the switches as follows:</div><div class='add'>+ *   - P00_0 - P00_2 (control signals for USB power supply): SW1[5] = ON</div><div class='add'>+ *   - USB_VBUSIN (used for USB function): SW7[7] = OFF; SW7[8] = ON</div><div class='add'>+ *   - USB_VBUSEN (used for USB_HF_VBUSEN): SW7[9] = OFF; SW7[10] = ON</div><div class='add'>+ *</div><div class='add'>+ * To enable the Micro-AB (CN33) USB OTG connector, set the following macro</div><div class='add'>+ * to 1 and configure the switches as follows:</div><div class='add'>+ *   - P00_0 - P00_2 (control signals for USB power supply): SW1[5] = ON</div><div class='add'>+ *   - USB_VBUSIN (used for USB OTG): SW7[7] = ON; SW7[8] = OFF</div><div class='add'>+ *   - USB_VBUSEN (used for USB_OTG_VBUSEN): SW7[9] = ON; SW7[10] = OFF</div><div class='add'>+ */</div><div class='add'>+#define USB_OTG		0</div><div class='add'>+</div><div class='add'>+#include "rzt2h-n2h-evk-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas RZ/T2H EVK Board based on r9a09g077m44";</div><div class='add'>+	compatible = "renesas,rzt2h-evk", "renesas,r9a09g077m44", "renesas,r9a09g077";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			/* SW8-9: ON, SW8-10: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(23, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			/* SW5-1: OFF, SW5-2: ON */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(32, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(6, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+#if (!SD1_MICRO_SD)</div><div class='add'>+		led-3 {</div><div class='add'>+			/* SW2-3: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(8, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			/* SW8-3: ON, SW8-4: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(18, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			/* SW8-1: ON, SW8-2: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(18, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-6 {</div><div class='add'>+			/* SW5-9: OFF, SW5-10: ON */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(22, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-7 {</div><div class='add'>+			/* SW5-7: OFF, SW5-8: ON */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(23, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-8 {</div><div class='add'>+			/* SW7-5: OFF, SW7-6: ON */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(23, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	/*</div><div class='add'>+	 * I2C0 Pin Configuration:</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 * Signal | Pin     | SW6</div><div class='add'>+	 * -------|---------|--------------</div><div class='add'>+	 * SCL    | P23_3   | 7: ON, 8: OFF</div><div class='add'>+	 * SDA    | P23_4   | 9: ON, 10: OFF</div><div class='add'>+	 */</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(23, 3, 0x17)&gt;,</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(23, 4, 0x17)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(5, 0, 0x17)&gt;, /* SDA */</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(4, 7, 0x17)&gt;; /* SCL */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if USB_OTG</div><div class='add'>+	usb-exicen-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZT2H_GPIO(0, 2) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "usb_exicen_a";</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	usb_pins: usb-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(0, 0, 0x13)&gt;, /* VBUSEN */</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(0, 1, 0x13)&gt;; /* OVRCUR */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi<br/>new file mode 100644<br/>index 000000000000..6f4a11b39d12<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g077m44.dtsi</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/T2H 4-core SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "r9a09g077.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g077m44", "renesas,r9a09g077";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi<br/>new file mode 100644<br/>index 000000000000..f06c19c73adb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g087.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g087.dtsi</a></div><div class='hunk'>@@ -0,0 +1,399 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/N2H SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g087";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a55";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			next-level-cache = &lt;&amp;L3_CA55&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		L3_CA55: cache-controller-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	extal_clk: extal {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		/* This value must be overridden by the board */</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		sci0: serial@80005000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 591 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 592 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 8&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci1: serial@80005400 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 595 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 596 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 9&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci2: serial@80005800 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005800 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 599 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 600 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 10&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci3: serial@80005c00 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80005c00 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 603 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 604 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 11&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci4: serial@80006000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x80006000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 607 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 608 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 12&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sci5: serial@81005000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";</div><div class='add'>+			reg = &lt;0 0x81005000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 611 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 612 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 600&gt;, &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			clock-names = "operation", "bus";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt0: watchdog@80082000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082000 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295100 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt1: watchdog@80082400 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082400 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295104 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt2: watchdog@80082800 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082800 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295108 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt3: watchdog@80082c00 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80082c00 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x8129510c 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt4: watchdog@80083000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80083000 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295110 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt5: watchdog@80083400 {</div><div class='add'>+			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";</div><div class='add'>+			reg = &lt;0 0x80083400 0 0x400&gt;,</div><div class='add'>+			      &lt;0 0x81295114 0 0x04&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKL&gt;;</div><div class='add'>+			clock-names = "pclk";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@80088000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x80088000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 615 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 616 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 100&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@80088400 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x80088400 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 619 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 620 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 621 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 101&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@81008000 {</div><div class='add'>+			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x81008000 0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 623 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 624 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+				     &lt;GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "eei", "rxi", "txi", "tei";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 601&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpg: clock-controller@80280000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-cpg-mssr";</div><div class='add'>+			reg = &lt;0 0x80280000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0 0x81280000 0 0x9000&gt;;</div><div class='add'>+			clocks = &lt;&amp;extal_clk&gt;;</div><div class='add'>+			clock-names = "extal";</div><div class='add'>+			#clock-cells = &lt;2&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@802c0000 {</div><div class='add'>+			compatible = "renesas,r9a09g087-pinctrl";</div><div class='add'>+			reg = &lt;0 0x802c0000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x812c0000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0x802b0000 0 0x10000&gt;;</div><div class='add'>+			reg-names = "nsr", "srs", "srn";</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_CORE R9A09G087_CLK_PCLKM&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 280&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@83000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			reg = &lt;0x0 0x83000000 0 0x40000&gt;,</div><div class='add'>+			      &lt;0x0 0x83040000 0 0x160000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci: usb@92040000 {</div><div class='add'>+			compatible = "generic-ohci";</div><div class='add'>+			reg = &lt;0 0x92040000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 1&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci: usb@92040100 {</div><div class='add'>+			compatible = "generic-ehci";</div><div class='add'>+			reg = &lt;0 0x92040100 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 2&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			companion = &lt;&amp;ohci&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2_phy: usb-phy@92040200 {</div><div class='add'>+			compatible = "renesas,usb2-phy-r9a09g087", "renesas,usb2-phy-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x92040200 0 0x700&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G087_USB_CLK&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hsusb: usb@92041000 {</div><div class='add'>+			compatible = "renesas,usbhs-r9a09g087", "renesas,usbhs-r9a09g077";</div><div class='add'>+			reg = &lt;0 0x92041000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 408&gt;;</div><div class='add'>+			phys = &lt;&amp;usb2_phy 3&gt;;</div><div class='add'>+			phy-names = "usb";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi0: mmc@92080000  {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g087",</div><div class='add'>+				     "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x92080000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1212&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G087_SDHI_CLKHS&gt;;</div><div class='add'>+			clock-names = "aclk", "clkh";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi0_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI0-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhi1: mmc@92090000 {</div><div class='add'>+			compatible = "renesas,sdhi-r9a09g087",</div><div class='add'>+				     "renesas,sdhi-r9a09g057";</div><div class='add'>+			reg = &lt;0x0 0x92090000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cpg CPG_MOD 1213&gt;,</div><div class='add'>+				 &lt;&amp;cpg CPG_CORE R9A09G087_SDHI_CLKHS&gt;;</div><div class='add'>+			clock-names = "aclk", "clkh";</div><div class='add'>+			power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			sdhi1_vqmmc: vqmmc-regulator {</div><div class='add'>+				regulator-name = "SDHI1-VQMMC";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts-extended = &lt;&amp;gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts<br/>new file mode 100644<br/>index 000000000000..084b3a0c8052<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/N2H EVK board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "r9a09g087m44.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SD0 can be connected to either eMMC (U33) or SD card slot CN21</div><div class='add'>+ * Lets by default enable the eMMC, note we need the below SW settings</div><div class='add'>+ * for eMMC.</div><div class='add'>+ * DSW5[1] = ON; DSW5[2] = ON</div><div class='add'>+ * DSW17[5] = OFF; DSW17[6] = ON</div><div class='add'>+ *</div><div class='add'>+ * To enable SD card and disable eMMC on SDHI0 disable the below macro</div><div class='add'>+ * and set the below switch setting:</div><div class='add'>+ * DSW5[1] = OFF; DSW5[2] = ON</div><div class='add'>+ * P22_6 = SD0_WP; DSW15[1] = OFF; DSW15[2] = ON</div><div class='add'>+ * P22_5 = SD0_CD; DSW15[3] = OFF; DSW15[4] = ON</div><div class='add'>+ * P02_6 = SD0_IOVS; DSW17[5] = OFF; DSW17[6] = ON</div><div class='add'>+ * P02_5 = SD0_PWEN; DSW17[7] = OFF; DSW17[8] = ON</div><div class='add'>+ */</div><div class='add'>+#define SD0_EMMC       1</div><div class='add'>+#define SD0_SD		(!SD0_EMMC)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * P17_4 = SD1_CD; DSW5[3] = ON; DSW19[1] = OFF; DSW19[2] = ON</div><div class='add'>+ * P08_6 = SD1_IOVS; DSW5[3] = ON</div><div class='add'>+ */</div><div class='add'>+#define SD1_MICRO_SD	1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * USB Pin Configuration:</div><div class='add'>+ *</div><div class='add'>+ * This board is equipped with three USB connectors: Type-A (CN7), Mini-B</div><div class='add'>+ * (CN8), and Micro-AB (CN9). The RZ/N2H SoC has a single USB channel, so</div><div class='add'>+ * either the USB host interface or the USB function interface can be used,</div><div class='add'>+ * but not both simultaneously when using the CN7 and CN8 connectors.</div><div class='add'>+ *</div><div class='add'>+ * By default, the Type-A (CN7) and Mini-B (CN8) connectors are enabled.</div><div class='add'>+ * Configure the switches as follows:</div><div class='add'>+ *   - P02_2 - P02_3 (control signals for USB power supply): DSW2[6] = OFF;</div><div class='add'>+ *     - P02_2 (used for VBUSEN): DSW14[5] = OFF; DSW14[6] = ON</div><div class='add'>+ *     - P02_3 (used for USB_OVRCUR): DSW14[1] = OFF; DSW14[2] = ON</div><div class='add'>+ *   - USB_VBUSIN (used for VBUS of CN8): DSW16[1] = OFF; DSW16[2] = ON</div><div class='add'>+ *   - USB_VBUSEN (used for USB_HF_VBUSEN): DSW16[3] = OFF; DSW16[4] = ON</div><div class='add'>+ *</div><div class='add'>+ * To enable the Micro-AB (CN9) USB OTG connector, set the following macro</div><div class='add'>+ * to 1 and configure the switches as follows:</div><div class='add'>+ *   - P02_2 - P02_3 (control signals for USB power supply): DSW2[6] = OFF;</div><div class='add'>+ *     - P02_2 (used for VBUSEN): DSW14[5] = OFF; DSW14[6] = ON</div><div class='add'>+ *     - P02_3 (used for USB_OVRCUR): DSW14[1] = OFF; DSW14[2] = ON</div><div class='add'>+ *   - USB_VBUSIN (used for VBUS for OTG): DSW16[1] = ON; DSW16[2] = OFF</div><div class='add'>+ *   - USB_VBUSEN (used for USB_OTG_VBUSEN): DSW16[3] = ON; DSW16[4] = OFF</div><div class='add'>+ *   - USB_EXICEN (used for USB OTG EXICEN): DSW14[3] = OFF; DSW14[4] = ON</div><div class='add'>+ */</div><div class='add'>+#define USB_OTG		0</div><div class='add'>+</div><div class='add'>+#include "rzt2h-n2h-evk-common.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * I2C0 and LED8/9 share the same pins use the below</div><div class='add'>+ * macro to choose (and set approopriate DIP switches).</div><div class='add'>+ */</div><div class='add'>+#define I2C0	1</div><div class='add'>+#define LED8	(!I2C0)</div><div class='add'>+#define LED9	(!I2C0)</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas RZ/N2H EVK Board based on r9a09g087m44";</div><div class='add'>+	compatible = "renesas,rzn2h-evk", "renesas,r9a09g087m44", "renesas,r9a09g087";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			/* DSW18-7: ON, DSW18-8: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(31, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			/* DSW18-9: ON, DSW18-10: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(18, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			/* DSW18-1: ON, DSW18-2: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(22, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-6 {</div><div class='add'>+			/* DSW18-3: ON, DSW18-4: OFF */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(23, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-7 {</div><div class='add'>+			/*</div><div class='add'>+			 * DSW18-5: ON, DSW18-6: OFF</div><div class='add'>+			 * DSW19-3: OFF, DSW19-4: ON</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(14, 3) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+#if LED8</div><div class='add'>+		led-8 {</div><div class='add'>+			/*</div><div class='add'>+			 * USER_LED0</div><div class='add'>+			 * DSW15-8: OFF, DSW15-9: OFF, DSW15-10: ON</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(14, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if LED9</div><div class='add'>+		led-9 {</div><div class='add'>+			/*</div><div class='add'>+			 * USER_LED1</div><div class='add'>+			 * DSW15-5: OFF, DSW15-6: ON</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(14, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+		led-10 {</div><div class='add'>+			/*</div><div class='add'>+			 * USER_LED2</div><div class='add'>+			 * DSW17-3: OFF, DSW17-4: ON</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(2, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-11 {</div><div class='add'>+			/*</div><div class='add'>+			 * USER_LED3</div><div class='add'>+			 * DSW17-1: OFF, DSW17-2: ON</div><div class='add'>+			 */</div><div class='add'>+			gpios = &lt;&amp;pinctrl RZT2H_GPIO(3, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if I2C0</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	/*</div><div class='add'>+	 * I2C0 Pin Configuration:</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 * Signal | Pin     | DSW15</div><div class='add'>+	 * -------|---------|--------------</div><div class='add'>+	 * SCL    | P14_6   | 8: OFF, 9: ON, 10: OFF</div><div class='add'>+	 * SDA    | P14_7   | 5: ON, 6: OFF</div><div class='add'>+	 */</div><div class='add'>+	i2c0_pins: i2c0-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(14, 6, 0x17)&gt;,</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(14, 7, 0x17)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * I2C1 Pin Configuration:</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 * Signal | Pin     | DSW7</div><div class='add'>+	 * -------|---------|--------------</div><div class='add'>+	 * SCL    | P03_3   | 1: ON, 2: OFF</div><div class='add'>+	 * SDA    | P03_4   | 3: ON, 4: OFF</div><div class='add'>+	 */</div><div class='add'>+	i2c1_pins: i2c1-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(3, 3, 0x17)&gt;,</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(3, 4, 0x17)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if USB_OTG</div><div class='add'>+	usb-exicen-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZT2H_GPIO(2, 4) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "usb_exicen_a";</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	usb_pins: usb-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(2, 2, 0x13)&gt;, /* VBUSEN */</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(2, 3, 0x13)&gt;; /* OVRCUR */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi<br/>new file mode 100644<br/>index 000000000000..ef0343b53309<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/r9a09g087m44.dtsi</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ/N2H 4-core SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "r9a09g087.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,r9a09g087m44", "renesas,r9a09g087";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi<br/>new file mode 100644<br/>index 000000000000..58561da3007a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the RZ SMARC Carrier-II Board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Please set the switch position SW_OPT_MUX.1 on the carrier board and the</div><div class='add'>+ * corresponding macro SW_SDIO_M2E on the board DTS:</div><div class='add'>+ *</div><div class='add'>+ * SW_SDIO_M2E:</div><div class='add'>+ *     0 - SMARC SDIO signal is connected to uSD1</div><div class='add'>+ *     1 - SMARC SDIO signal is connected to M.2 Key E connector</div><div class='add'>+ *</div><div class='add'>+ * Please set the switch position SW_GPIO_CAN_PMOD on the carrier board and the</div><div class='add'>+ * corresponding macro SW_GPIO8_CAN0_STB/SW_GPIO8_CAN0_STB on the board DTS:</div><div class='add'>+ *</div><div class='add'>+ * SW_GPIO8_CAN0_STB:</div><div class='add'>+ *	0 - Connect to GPIO8 PMOD (default)</div><div class='add'>+ *	1 - Connect to CAN0 transceiver STB pin</div><div class='add'>+ *</div><div class='add'>+ * SW_GPIO9_CAN1_STB:</div><div class='add'>+ *	0 - Connect to GPIO9 PMOD (default)</div><div class='add'>+ *	1 - Connect to CAN1 transceiver STB pin</div><div class='add'>+ *</div><div class='add'>+ * GPIO keys are enabled by default. Use PMOD_GPIO macros to disable them</div><div class='add'>+ * if needed.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas RZ SMARC Carrier-II Board";</div><div class='add'>+	compatible = "renesas,smarc2-evk";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ignore_loglevel";</div><div class='add'>+		stdout-path = "serial3:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		serial3 = &amp;scif0;</div><div class='add'>+		mmc1 = &amp;sdhi1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can_transceiver0: can-phy0 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can_transceiver1: can-phy1 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys: keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-1 {</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl KEY_1_GPIO IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			linux,code = &lt;KEY_1&gt;;</div><div class='add'>+			label = "USER_SW1";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-2 {</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl KEY_2_GPIO IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			linux,code = &lt;KEY_2&gt;;</div><div class='add'>+			label = "USER_SW2";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		key-3 {</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl KEY_3_GPIO IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+			linux,code = &lt;KEY_3&gt;;</div><div class='add'>+			label = "USER_SW3";</div><div class='add'>+			wakeup-source;</div><div class='add'>+			debounce-interval = &lt;20&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;canfd {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scif0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi<br/>index e9f244c33d55..2616dbde4dd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi</a></div><div class='hunk'>@@ -38,6 +38,11 @@</div><div class='ctx'> 		line-name = "can1_stb";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpt_pins: gpt {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(43, 0, 2)&gt;, /* GTIOC4A */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(43, 1, 2)&gt;; /* GTIOC4B */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c0_pins: i2c0 {</div><div class='ctx'> 		pins = "RIIC0_SDA", "RIIC0_SCL";</div><div class='ctx'> 		input-enable;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi<br/>index 83f5642d0d35..d511e152d7c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi</a></div><div class='hunk'>@@ -102,8 +102,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -130,8 +129,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_IRQ3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc RZG2L_IRQ3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -329,7 +327,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='del'>-		compatible = "micron,mt25qu512a", "jedec,spi-nor";</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='ctx'> 		spi-max-frequency = &lt;50000000&gt;;</div><div class='hunk'>@@ -341,11 +339,18 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			boot@0 {</div><div class='del'>-				reg = &lt;0x00000000 0x2000000&gt;;</div><div class='del'>-				read-only;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x0001d000&gt;;</div><div class='ctx'> 			};</div><div class='del'>-			user@2000000 {</div><div class='add'>+</div><div class='add'>+			partition@1d000 { /* fip is at offset 0x200 */</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x0001d000 0x1fe3000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@2000000 {</div><div class='add'>+				label = "user";</div><div class='ctx'> 				reg = &lt;0x2000000 0x2000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi<br/>index ee3d96fdb616..b76b55e7f09d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi</a></div><div class='hunk'>@@ -64,8 +64,7 @@</div><div class='ctx'> 		compatible = "adi,adv7535";</div><div class='ctx'> 		reg = &lt;0x3d&gt;;</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_GPIO(2, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(2, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;osc1&gt;;</div><div class='ctx'> 		clock-names = "cec";</div><div class='ctx'> 		avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='hunk'>@@ -105,6 +104,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if PMOD0_GPT</div><div class='add'>+&amp;gpt {</div><div class='add'>+	pinctrl-0 = &lt;&amp;gpt_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif /* PMOD0_GPT */</div><div class='add'>+</div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c3_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi<br/>index b4ef5ea8a9e3..3e8909a872e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi</a></div><div class='hunk'>@@ -82,8 +82,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_IRQ0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc RZG2L_IRQ0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -247,7 +246,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='del'>-		compatible = "micron,mt25qu512a", "jedec,spi-nor";</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='ctx'> 		spi-max-frequency = &lt;50000000&gt;;</div><div class='hunk'>@@ -259,11 +258,18 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			boot@0 {</div><div class='del'>-				reg = &lt;0x00000000 0x2000000&gt;;</div><div class='del'>-				read-only;</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x0001d000&gt;;</div><div class='ctx'> 			};</div><div class='del'>-			user@2000000 {</div><div class='add'>+</div><div class='add'>+			partition@1d000 { /* fip is at offset 0x200 */</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x0001d000 0x1fe3000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@2000000 {</div><div class='add'>+				label = "user";</div><div class='ctx'> 				reg = &lt;0x2000000 0x2000000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi<br/>index 377849cbb462..f3d7eff0d2f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi</a></div><div class='hunk'>@@ -48,7 +48,10 @@</div><div class='ctx'> #if (SW_SCIF_CAN || SW_RSPI_CAN)</div><div class='ctx'> &amp;canfd {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;can1_pins&gt;;</div><div class='del'>-	/delete-node/ channel@0;</div><div class='add'>+</div><div class='add'>+	channel0 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> #else</div><div class='ctx'> &amp;canfd {</div><div class='hunk'>@@ -86,8 +89,7 @@</div><div class='ctx'> 		compatible = "adi,adv7535";</div><div class='ctx'> 		reg = &lt;0x3d&gt;;</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_GPIO(43, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(43, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;osc1&gt;;</div><div class='ctx'> 		clock-names = "cec";</div><div class='ctx'> 		avdd-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi<br/>index 79443fb3f581..cd4275d86935 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi</a></div><div class='hunk'>@@ -78,8 +78,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -107,8 +106,7 @@</div><div class='ctx'> 		compatible = "ethernet-phy-id0022.1640",</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_IRQ7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;irqc RZG2L_IRQ7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;2400&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -201,6 +199,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	qspi0_pins: qspi0 {</div><div class='add'>+		pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3",</div><div class='add'>+		       "QSPI0_SPCLK", "QSPI0_SSL";</div><div class='add'>+		power-source = &lt;1800&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdhi0_emmc_pins: sd0emmc {</div><div class='ctx'> 		sd0_emmc_data {</div><div class='ctx'> 			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",</div><div class='hunk'>@@ -252,6 +256,45 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sbc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;qspi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		spi-cpol;</div><div class='add'>+		spi-cpha;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x0001d000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@1d000 { /* fip is at offset 0x200 */</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x0001d000 0x7e3000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "user";</div><div class='add'>+				reg = &lt;0x800000 0x800000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #if (SW_SW0_DEV_SEL)</div><div class='ctx'> &amp;sdhi0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi<br/>new file mode 100644<br/>index 000000000000..7faa44510d98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,404 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the R9A09G047E57 SMARC SoM board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Please set the below switch position on the SoM and the corresponding macro</div><div class='add'>+ * on the board DTS:</div><div class='add'>+ *</div><div class='add'>+ * Switch position SYS.1, Macro SW_SD0_DEV_SEL:</div><div class='add'>+ *      0 - SD0 is connected to eMMC (default)</div><div class='add'>+ *      1 - SD0 is connected to uSD0 card</div><div class='add'>+ *</div><div class='add'>+ * Switch position SYS.5, Macro SW_LCD_EN:</div><div class='add'>+ *      0 - Select Misc. Signals routing</div><div class='add'>+ *      1 - Select LCD</div><div class='add'>+ *</div><div class='add'>+ * Switch position BOOT.6, Macro SW_PDM_EN:</div><div class='add'>+ *      0 - Select CAN routing</div><div class='add'>+ *      1 - Select PDM</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		mmc0 = &amp;sdhi0;</div><div class='add'>+		mmc2 = &amp;sdhi2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@48000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* First 128MB is reserved for secure area. */</div><div class='add'>+		reg = &lt;0x0 0x48000000 0x0 0xf8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_vdd0p8v_others: regulator-vdd0p8v-others {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+</div><div class='add'>+		regulator-name = "fixed-0.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 32.768kHz crystal */</div><div class='add'>+	x3: x3-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;audio_extal_clk {</div><div class='add'>+	clock-frequency = &lt;48000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mali-supply = &lt;&amp;reg_vdd0p8v_others&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	raa215300: pmic@12 {</div><div class='add'>+		compatible = "renesas,raa215300";</div><div class='add'>+		reg = &lt;0x12&gt;, &lt;0x6f&gt;;</div><div class='add'>+		reg-names = "main", "rtc";</div><div class='add'>+		clocks = &lt;&amp;x3&gt;;</div><div class='add'>+		clock-names = "xin";</div><div class='add'>+</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_irq_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG3E_GPIO(S, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	phy0: ethernet-phy@7 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640",</div><div class='add'>+			     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;icu 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;1400&gt;;</div><div class='add'>+		txc-skew-psec = &lt;1400&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	phy1: ethernet-phy@7 {</div><div class='add'>+		compatible = "ethernet-phy-id0022.1640",</div><div class='add'>+			     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;icu 16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		rxc-skew-psec = &lt;1400&gt;;</div><div class='add'>+		txc-skew-psec = &lt;1400&gt;;</div><div class='add'>+		rxdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		txdv-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		rxd3-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd0-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd1-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd2-skew-psec = &lt;0&gt;;</div><div class='add'>+		txd3-skew-psec = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	eth0_pins: eth0 {</div><div class='add'>+		clk {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(B, 1, 1)&gt;; /* TXC */</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctrl {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(A, 1, 1)&gt;, /* MDC */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(A, 0, 1)&gt;, /* MDIO */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(C, 2, 15)&gt;, /* PHY_INTR (IRQ2) */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(C, 1, 1)&gt;, /* RXD3 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(C, 0, 1)&gt;, /* RXD2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 7, 1)&gt;, /* RXD1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 6, 1)&gt;, /* RXD0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 0, 1)&gt;, /* RXC */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(A, 2, 1)&gt;, /* RX_CTL */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 5, 1)&gt;, /* TXD3 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 4, 1)&gt;, /* TXD2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 3, 1)&gt;, /* TXD1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(B, 2, 1)&gt;, /* TXD0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(A, 3, 1)&gt;; /* TX_CTL */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_pins: eth1 {</div><div class='add'>+		clk {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(E, 1, 1)&gt;; /* TXC */</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctrl {</div><div class='add'>+</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(D, 1, 1)&gt;, /* MDC */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(D, 0, 1)&gt;, /* MDIO */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(F, 2, 15)&gt;, /* PHY_INTR (IRQ15) */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(F, 1, 1)&gt;, /* RXD3 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(F, 0, 1)&gt;, /* RXD2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 7, 1)&gt;, /* RXD1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 6, 1)&gt;, /* RXD0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 0, 1)&gt;, /* RXC */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(D, 2, 1)&gt;, /* RX_CTL */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 5, 1)&gt;, /* TXD3 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 4, 1)&gt;, /* TXD2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 3, 1)&gt;, /* TXD1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(E, 2, 1)&gt;, /* TXD0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(D, 3, 1)&gt;; /* TX_CTL */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2_pins: i2c {</div><div class='add'>+		pinmux = &lt;RZG3E_PORT_PINMUX(3, 4, 1)&gt;, /* SCL2 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(3, 5, 1)&gt;; /* SDA2 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc_irq_pin: rtc-irq {</div><div class='add'>+		pins = "PS1";</div><div class='add'>+		bias-pull-up;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_emmc_pins: sd0-emmc {</div><div class='add'>+		sd0-ctrl {</div><div class='add'>+			pins = "SD0CLK", "SD0CMD";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-data {</div><div class='add'>+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3",</div><div class='add'>+			       "SD0DAT4", "SD0DAT5", "SD0DAT6", "SD0DAT7";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-rst {</div><div class='add'>+			pins = "SD0RSTN";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_usd_pins: sd0-usd {</div><div class='add'>+		sd0-cd {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(5, 0, 8)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-ctrl {</div><div class='add'>+			pins = "SD0CLK", "SD0CMD";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-data {</div><div class='add'>+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-iovs {</div><div class='add'>+			pins = "SD0IOVS";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-pwen {</div><div class='add'>+			pins = "SD0PWEN";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi2_pins: sd2 {</div><div class='add'>+		sd2-cd {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(K, 0, 1)&gt;; /* SD2CD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd2-ctrl {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(H, 0, 1)&gt;, /* SD2CLK */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(H, 1, 1)&gt;; /* SD2CMD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd2-data {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(H, 2, 1)&gt;, /* SD2DAT0 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(H, 3, 1)&gt;, /* SD2DAT1 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(H, 4, 1)&gt;, /* SD2DAT2 */</div><div class='add'>+				 &lt;RZG3E_PORT_PINMUX(H, 5, 1)&gt;; /* SD2DAT3 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd2-iovs {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(K, 1, 1)&gt;; /* SD2IOVS */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd2-pwen {</div><div class='add'>+			pinmux = &lt;RZG3E_PORT_PINMUX(K, 2, 1)&gt;; /* SD2PWEN */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xspi_pins: xspi0 {</div><div class='add'>+		pinmux = &lt;RZG3E_PORT_PINMUX(M, 0, 0)&gt;, /* XSPI0_IO0 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(M, 1, 0)&gt;, /* XSPI0_IO1 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(M, 2, 0)&gt;, /* XSPI0_IO2 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(M, 3, 0)&gt;, /* XSPI0_IO3 */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(L, 0, 0)&gt;, /* XSPI0_CKP */</div><div class='add'>+			 &lt;RZG3E_PORT_PINMUX(L, 1, 0)&gt;; /* XSPI0_CS0 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qextal_clk {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtxin_clk {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if (SW_SD0_DEV_SEL)</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_usd_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_usd_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;sdhi0_vqmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0_vqmmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#else</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	fixed-emmc-driver-type = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+&amp;sdhi2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi2_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;sdhi2_vqmmc&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi2_vqmmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xspi {</div><div class='add'>+	pinctrl-0 = &lt;&amp;xspi_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "bl2";</div><div class='add'>+				reg = &lt;0x00000000 0x00060000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@60000 {</div><div class='add'>+				label = "fip";</div><div class='add'>+				reg = &lt;0x00060000 0x007a0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "user";</div><div class='add'>+				reg = &lt;0x800000 0x800000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi<br/>index 21bfa4e03972..39845faec894 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi</a></div><div class='hunk'>@@ -5,28 +5,11 @@</div><div class='ctx'>  * Copyright (C) 2023 Renesas Electronics Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/clock/renesas,r9a08g045-vbattb.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * On-board switches' states:</div><div class='del'>- * @SW_OFF: switch's state is OFF</div><div class='del'>- * @SW_ON:  switch's state is ON</div><div class='del'>- */</div><div class='del'>-#define SW_OFF		0</div><div class='del'>-#define SW_ON		1</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SW_CONFIG[x] switches' states:</div><div class='del'>- * @SW_CONFIG2:</div><div class='del'>- *	SW_OFF - SD0 is connected to eMMC</div><div class='del'>- *	SW_ON  - SD0 is connected to uSD0 card</div><div class='del'>- * @SW_CONFIG3:</div><div class='del'>- *	SW_OFF - SD2 is connected to SoC</div><div class='del'>- *	SW_ON  - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC</div><div class='del'>- */</div><div class='del'>-#define SW_CONFIG2	SW_OFF</div><div class='del'>-#define SW_CONFIG3	SW_ON</div><div class='add'>+#include "rzg3s-smarc-switches.h"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045";</div><div class='hunk'>@@ -42,11 +25,6 @@</div><div class='ctx'> #endif</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "ignore_loglevel";</div><div class='del'>-		stdout-path = "serial0:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory@48000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		/* First 128MB is reserved for secure area. */</div><div class='hunk'>@@ -62,7 +40,6 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-#if SW_CONFIG2 == SW_ON</div><div class='ctx'> 	vccq_sdhi0: regulator1 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "SDHI0 VccQ";</div><div class='hunk'>@@ -72,8 +49,8 @@</div><div class='ctx'> 		gpios-states = &lt;1&gt;;</div><div class='ctx'> 		states = &lt;3300000 1&gt;, &lt;1800000 0&gt;;</div><div class='ctx'> 	};</div><div class='del'>-#else</div><div class='del'>-	reg_1p8v: regulator1 {</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "fixed-1.8V";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -81,9 +58,17 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-	vcc_sdhi2: regulator2 {</div><div class='add'>+	reg_3p3v: regulator3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sdhi2: regulator4 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "SDHI2 Vcc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -91,6 +76,16 @@</div><div class='ctx'> 		gpios = &lt;&amp;pinctrl RZG2L_GPIO(8, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	x3_clk: x3-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adc {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if SW_CONFIG3 == SW_ON</div><div class='hunk'>@@ -103,8 +98,7 @@</div><div class='ctx'> </div><div class='ctx'> 	phy0: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_GPIO(12, 0) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(12, 0) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;0&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;0&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -129,8 +123,7 @@</div><div class='ctx'> </div><div class='ctx'> 	phy1: ethernet-phy@7 {</div><div class='ctx'> 		reg = &lt;7&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='del'>-		interrupts = &lt;RZG2L_GPIO(12, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(12, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 		rxc-skew-psec = &lt;0&gt;;</div><div class='ctx'> 		txc-skew-psec = &lt;0&gt;;</div><div class='ctx'> 		rxdv-skew-psec = &lt;0&gt;;</div><div class='hunk'>@@ -153,6 +146,30 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	versa3: clock-generator@68 {</div><div class='add'>+		compatible = "renesas,5l35023";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+		clocks = &lt;&amp;x3_clk&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;versa3 0&gt;,</div><div class='add'>+				  &lt;&amp;versa3 1&gt;,</div><div class='add'>+				  &lt;&amp;versa3 2&gt;,</div><div class='add'>+				  &lt;&amp;versa3 3&gt;,</div><div class='add'>+				  &lt;&amp;versa3 4&gt;,</div><div class='add'>+				  &lt;&amp;versa3 5&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;24000000&gt;,</div><div class='add'>+				       &lt;12288000&gt;,</div><div class='add'>+				       &lt;11289600&gt;,</div><div class='add'>+				       &lt;25000000&gt;,</div><div class='add'>+				       &lt;100000000&gt;,</div><div class='add'>+				       &lt;100000000&gt;;</div><div class='add'>+		renesas,settings = [</div><div class='add'>+		  80 00 11 19 4c 42 dc 2f 06 7d 20 1a 5f 1e f2 27</div><div class='add'>+		  00 40 00 00 00 00 00 00 06 0c 19 02 3f f0 90 86</div><div class='add'>+		  a0 80 30 30 9c</div><div class='add'>+		];</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if SW_CONFIG2 == SW_ON</div><div class='hunk'>@@ -346,6 +363,21 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vbattb {</div><div class='add'>+	assigned-clocks = &lt;&amp;vbattb VBATTB_MUX&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;vbattb VBATTB_XC&gt;;</div><div class='add'>+	quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vbattb_xtal {</div><div class='add'>+	clock-frequency = &lt;32768&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wdt0 {</div><div class='ctx'> 	timeout-sec = &lt;60&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h b/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h<br/>new file mode 100644<br/>index 000000000000..bbf908a5322c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * On-board switches for the Renesas RZ/G3S SMARC Module and RZ SMARC Carrier II</div><div class='add'>+ * boards.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __RZG3S_SMARC_SWITCHES_H__</div><div class='add'>+#define __RZG3S_SMARC_SWITCHES_H__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * On-board switches' states:</div><div class='add'>+ * @SW_OFF: switch's state is OFF</div><div class='add'>+ * @SW_ON:  switch's state is ON</div><div class='add'>+ */</div><div class='add'>+#define SW_OFF		0</div><div class='add'>+#define SW_ON		1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SW_CONFIG[x] switches' states:</div><div class='add'>+ * @SW_CONFIG2:</div><div class='add'>+ *	SW_OFF - SD0 is connected to eMMC</div><div class='add'>+ *	SW_ON  - SD0 is connected to uSD0 card</div><div class='add'>+ * @SW_CONFIG3:</div><div class='add'>+ *	SW_OFF - SD2 is connected to SoC</div><div class='add'>+ *	SW_ON  - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC</div><div class='add'>+ */</div><div class='add'>+#define SW_CONFIG2	SW_OFF</div><div class='add'>+#define SW_CONFIG3	SW_ON</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SW_OPT_MUX[x] switches' states:</div><div class='add'>+ * @SW_OPT_MUX4:</div><div class='add'>+ *	SW_OFF - The SMARC SER0 signals are routed to M.2 Key E UART</div><div class='add'>+ *	SW_ON  - The SMARC SER0 signals are routed to PMOD1</div><div class='add'>+ */</div><div class='add'>+#define SW_OPT_MUX4	SW_ON</div><div class='add'>+</div><div class='add'>+#endif /* __RZG3S_SMARC_SWITCHES_H__ */</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi<br/>index 7945d44e6ee1..5e044a4d0234 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi</a></div><div class='hunk'>@@ -12,16 +12,22 @@</div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		i2c0 = &amp;i2c0;</div><div class='del'>-		serial0 = &amp;scif0;</div><div class='add'>+		serial0 = &amp;scif1;</div><div class='add'>+		serial1 = &amp;scif3;</div><div class='add'>+		serial3 = &amp;scif0;</div><div class='ctx'> 		mmc1 = &amp;sdhi1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "ignore_loglevel";</div><div class='add'>+		stdout-path = "serial3:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> </div><div class='ctx'> 		key-1 {</div><div class='del'>-			interrupts = &lt;RZG2L_GPIO(18, 0) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(18, 0) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_1&gt;;</div><div class='ctx'> 			label = "USER_SW1";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -29,8 +35,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key-2 {</div><div class='del'>-			interrupts = &lt;RZG2L_GPIO(0, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(0, 1) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_2&gt;;</div><div class='ctx'> 			label = "USER_SW2";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -38,8 +43,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		key-3 {</div><div class='del'>-			interrupts = &lt;RZG2L_GPIO(0, 3) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;pinctrl&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;pinctrl RZG2L_GPIO(0, 3) IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 			linux,code = &lt;KEY_3&gt;;</div><div class='ctx'> 			label = "USER_SW3";</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -47,6 +51,23 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	snd_rzg3s: sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;cpu_dai&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;cpu_dai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+		cpu_dai: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;ssi3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;da7212&gt;;</div><div class='add'>+			clocks = &lt;&amp;versa3 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc_sdhi1: regulator-vcc-sdhi1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "SDHI1 Vcc";</div><div class='hunk'>@@ -67,13 +88,56 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;audio_clk2 {</div><div class='add'>+	clock-frequency = &lt;12288000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+	da7212: codec@1a {</div><div class='add'>+		compatible = "dlg,da7212";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;versa3 1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dlg,micbias1-lvl = &lt;2500&gt;;</div><div class='add'>+		dlg,micbias2-lvl = &lt;2500&gt;;</div><div class='add'>+		dlg,dmic-data-sel = "lrise_rfall";</div><div class='add'>+		dlg,dmic-samplephase = "between_clkedge";</div><div class='add'>+		dlg,dmic-clkrate = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+		VDDA-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		VDDSP-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		VDDMIC-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	power-monitor@44 {</div><div class='add'>+		compatible = "renesas,isl28022";</div><div class='add'>+		reg = &lt;0x44&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;8000&gt;;</div><div class='add'>+		renesas,average-samples = &lt;32&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	audio_clock_pins: audio-clock {</div><div class='add'>+		pins = "AUDIO_CLK1", "AUDIO_CLK2";</div><div class='add'>+		input-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	key-1-gpio-hog {</div><div class='ctx'> 		gpio-hog;</div><div class='ctx'> 		gpios = &lt;RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -100,6 +164,11 @@</div><div class='ctx'> 			 &lt;RZG2L_PORT_PINMUX(6, 4, 1)&gt;; /* TXD */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	scif3_pins: scif3 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(17, 2, 7)&gt;, /* RXD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(17, 3, 7)&gt;; /* TXD */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdhi1_pins: sd1 {</div><div class='ctx'> 		data {</div><div class='ctx'> 			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";</div><div class='hunk'>@@ -131,6 +200,13 @@</div><div class='ctx'> 			pinmux = &lt;RZG2L_PORT_PINMUX(0, 2, 1)&gt;; /* SD1_CD */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	ssi3_pins: ssi3 {</div><div class='add'>+		pinmux = &lt;RZG2L_PORT_PINMUX(18, 2, 8)&gt;, /* BCK */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(18, 3, 8)&gt;, /* RCK */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(18, 4, 8)&gt;, /* TXD */</div><div class='add'>+			 &lt;RZG2L_PORT_PINMUX(18, 5, 8)&gt;; /* RXD */</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;scif0 {</div><div class='hunk'>@@ -139,6 +215,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;scif3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;scif3_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhi1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdhi1_pins&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;sdhi1_pins_uhs&gt;;</div><div class='hunk'>@@ -151,3 +233,12 @@</div><div class='ctx'> 	max-frequency = &lt;125000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ssi3 {</div><div class='add'>+	clocks = &lt;&amp;cpg CPG_MOD R9A08G045_SSI3_PCLK2&gt;,</div><div class='add'>+		 &lt;&amp;cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR&gt;,</div><div class='add'>+		 &lt;&amp;versa3 2&gt;, &lt;&amp;audio_clk2&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ssi3_pins&gt;, &lt;&amp;audio_clock_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi<br/>new file mode 100644<br/>index 000000000000..5c91002c99c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,246 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Common Device Tree Source for the RZ/T2H and RZ/N2H EVK boards.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		mmc0 = &amp;sdhi0;</div><div class='add'>+		mmc1 = &amp;sdhi1;</div><div class='add'>+		serial0 = &amp;sci0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-1.8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "fixed-3.3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if SD0_SD</div><div class='add'>+	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI0 VqmmC";</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if SD1_MICRO_SD</div><div class='add'>+	vccq_sdhi1: regulator-vccq-sdhi1 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI1 VccQ";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZT2H_GPIO(8, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;extal_clk {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hsusb {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	eeprom: eeprom@50 {</div><div class='add'>+		compatible = "renesas,r1ex24016", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	/*</div><div class='add'>+	 * SCI0 Pin Configuration:</div><div class='add'>+	 * ------------------------</div><div class='add'>+	 * Signal     | Pin     | RZ/T2H (SW4) | RZ/N2H (DSW9)</div><div class='add'>+	 * -----------|---------|--------------|---------------</div><div class='add'>+	 * SCI0_RXD   | P27_4   | 5: ON, 6: OFF| 1: ON, 2: OFF</div><div class='add'>+	 * SCI0_TXD   | P27_5   | 7: ON, 8: OFF| 3: ON, 4: OFF</div><div class='add'>+	 */</div><div class='add'>+	sci0_pins: sci0-pins {</div><div class='add'>+		pinmux = &lt;RZT2H_PORT_PINMUX(27, 4, 0x14)&gt;,</div><div class='add'>+			 &lt;RZT2H_PORT_PINMUX(27, 5, 0x14)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if SD0_EMMC</div><div class='add'>+	sdhi0-emmc-iovs-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "SD0_IOVS";</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	sdhi0_emmc_pins: sd0-emmc-group {</div><div class='add'>+		data-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(12, 2, 0x29)&gt;, /* SD0_DATA0 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 3, 0x29)&gt;, /* SD0_DATA1 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 4, 0x29)&gt;, /* SD0_DATA2 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 5, 0x29)&gt;, /* SD0_DATA3 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 6, 0x29)&gt;, /* SD0_DATA4 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 7, 0x29)&gt;, /* SD0_DATA5 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(13, 0, 0x29)&gt;, /* SD0_DATA6 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(13, 1, 0x29)&gt;; /* SD0_DATA7 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctrl-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(12, 0, 0x29)&gt;, /* SD0_CLK */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 1, 0x29)&gt;, /* SD0_CMD */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(13, 2, 0x29)&gt;; /* SD0_RST# */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if SD0_SD</div><div class='add'>+	sdhi0-pwen-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZT2H_GPIO(2, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "SD0_PWEN";</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	sdhi0_sd_pins: sd0-sd-group {</div><div class='add'>+		data-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(12, 2, 0x29)&gt;, /* SD0_DATA0 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 3, 0x29)&gt;, /* SD0_DATA1 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 4, 0x29)&gt;, /* SD0_DATA2 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 5, 0x29)&gt;; /* SD0_DATA3 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctrl-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(12, 0, 0x29)&gt;, /* SD0_CLK */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(12, 1, 0x29)&gt;, /* SD0_CMD */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(22, 5, 0x29)&gt;, /* SD0_CD */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(22, 6, 0x29)&gt;; /* SD0_WP */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#if SD1_MICRO_SD</div><div class='add'>+	sdhi1-pwen-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZT2H_GPIO(8, 5) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "SD1_PWEN";</div><div class='add'>+	};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	sdhi1_pins: sd1-group {</div><div class='add'>+		data-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(16, 7, 0x29)&gt;, /* SD1_DATA0 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(17, 0, 0x29)&gt;, /* SD1_DATA1 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(17, 1, 0x29)&gt;, /* SD1_DATA2 */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(17, 2, 0x29)&gt;; /* SD1_DATA3 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ctrl-pins {</div><div class='add'>+			pinmux = &lt;RZT2H_PORT_PINMUX(16, 5, 0x29)&gt;, /* SD1_CLK */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(16, 6, 0x29)&gt;, /* SD1_CMD */</div><div class='add'>+				 &lt;RZT2H_PORT_PINMUX(17, 4, 0x29)&gt;; /* SD1_CD */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sci0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sci0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if SD0_EMMC</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	fixed-emmc-driver-type = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if SD0_SD</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_sd_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_sd_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vqmmc_sdhi0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if SD1_MICRO_SD</div><div class='add'>+&amp;sdhi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccq_sdhi1&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+&amp;usb2_phy {</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	timeout-sec = &lt;60&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso<br/>new file mode 100644<br/>index 000000000000..eda2b31f6d79<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Shared DT overlay for the eMMC Sub Board (RTK0EF0186B02000BJ), which</div><div class='add'>+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = "/soc/mmc@15c00000";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	sdhi0_emmc_pins: emmc-pins {</div><div class='add'>+		sd0-clk {</div><div class='add'>+			pins = "SD0CLK";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-dat-cmd {</div><div class='add'>+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0DAT4",</div><div class='add'>+			       "SD0DAT5", "SD0DAT6", "SD0DAT7", "SD0CMD";</div><div class='add'>+			input-enable;</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_emmc_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	fixed-emmc-driver-type = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso<br/>new file mode 100644<br/>index 000000000000..0af1e0a6c7f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Shared DT overlay for the microSD Sub Board (RTK0EF0186B01000BJ), which</div><div class='add'>+ * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = "/soc/mmc@15c00000";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "SDHI0 VqmmC";</div><div class='add'>+		gpios = &lt;&amp;pinctrl RZG2L_GPIO(10, 0) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios-states = &lt;0&gt;;</div><div class='add'>+		states = &lt;3300000 0&gt;, &lt;1800000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	sdhi0-pwr-en-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;RZG2L_GPIO(10, 1) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "sd0_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhi0_pins: sd0 {</div><div class='add'>+		sd0-cd {</div><div class='add'>+			pinmux = &lt;RZG2L_PORT_PINMUX(10, 5, 15)&gt;; /* SD0_CD */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-clk {</div><div class='add'>+			pins = "SD0CLK";</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd0-dat-cmd {</div><div class='add'>+			pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD";</div><div class='add'>+			input-enable;</div><div class='add'>+			renesas,output-impedance = &lt;3&gt;;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhi0_pins&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdhi0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default", "state_uhs";</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vqmmc_sdhi0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi<br/>index 1eb4883b3219..bbb3583372d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/salvator-common.dtsi</a></div><div class='hunk'>@@ -353,8 +353,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -531,10 +530,9 @@</div><div class='ctx'> 		reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",</div><div class='ctx'> 			    "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio6 30 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+				      &lt;&amp;gpio6 31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-names = "intrq1", "intrq2";</div><div class='del'>-		interrupts = &lt;30 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -594,6 +592,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c_dvfs {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -604,8 +603,7 @@</div><div class='ctx'> </div><div class='ctx'> 		compatible = "rohm,bd9571mwv";</div><div class='ctx'> 		reg = &lt;0x30&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc_ex&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='hunk'>@@ -628,6 +626,7 @@</div><div class='ctx'> 		compatible = "rohm,br24t01", "atmel,24c01";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -943,6 +942,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/salvator-x.dtsi b/arch/arm64/boot/dts/renesas/salvator-x.dtsi<br/>index ddee50e64632..5920932cbc2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/salvator-x.dtsi</a></div><div class='hunk'>@@ -25,5 +25,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x23_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/salvator-xs.dtsi b/arch/arm64/boot/dts/renesas/salvator-xs.dtsi<br/>index 08b925624e12..1d18dedb1ff0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-xs.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/salvator-xs.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/salvator-xs.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/salvator-xs.dtsi</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x23_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi<br/>index 8ae6af1af094..4caa0281a687 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card-mix+split.dtsi</a></div><div class='hunk'>@@ -15,7 +15,9 @@</div><div class='ctx'>  *	(D) CPU3 (2ch)  --/			   (TDM-1 : 2,3ch)</div><div class='ctx'>  *	(E) CPU4 (2ch)  --/			   (TDM-2 : 4,5ch)</div><div class='ctx'>  *	(F) CPU5 (2ch)  --/			   (TDM-3 : 6,7ch)</div><div class='del'>- *	(G) CPU6 (6ch) &lt;----  (6ch) (Z) PCM3168A-c</div><div class='add'>+ *	(G) CPU6 (2ch) &lt;----  (6ch) (Z) PCM3168A-c (TDM-a: 0,1ch)</div><div class='add'>+ *	(H) CPU7 (2ch) &lt;--/			   (TDM-b: 2,3ch)</div><div class='add'>+ *	(I) CPU8 (2ch) &lt;--/			   (TDM-c: 4,5ch)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) aplay   -D plughw:0,0 xxx.wav (MIX-0)</div><div class='ctx'>  *	(B) aplay   -D plughw:0,1 xxx.wav (MIX-1)</div><div class='hunk'>@@ -25,7 +27,9 @@</div><div class='ctx'>  *	(F) aplay   -D plughw:1,3 xxx.wav (TDM-3)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) arecord -D plughw:0,0 xxx.wav</div><div class='del'>- *	(G) arecord -D plughw:1,4 xxx.wav</div><div class='add'>+ *	(G) arecord -D plughw:1,4 xxx.wav (TDM-a)</div><div class='add'>+ *	(H) arecord -D plughw:1,5 xxx.wav (TDM-b)</div><div class='add'>+ *	(I) arecord -D plughw:1,6 xxx.wav (TDM-c)</div><div class='ctx'>  */</div><div class='ctx'> / {</div><div class='ctx'> 	sound_card_kf: expand-sound {</div><div class='hunk'>@@ -35,13 +39,18 @@</div><div class='ctx'> 		routing = "pcm3168a Playback", "DAI2 Playback",</div><div class='ctx'> 			  "pcm3168a Playback", "DAI3 Playback",</div><div class='ctx'> 			  "pcm3168a Playback", "DAI4 Playback",</div><div class='del'>-			  "pcm3168a Playback", "DAI5 Playback";</div><div class='add'>+			  "pcm3168a Playback", "DAI5 Playback",</div><div class='add'>+			  "DAI6 Capture", "pcm3168a Capture",</div><div class='add'>+			  "DAI7 Capture", "pcm3168a Capture",</div><div class='add'>+			  "DAI8 Capture", "pcm3168a Capture";</div><div class='ctx'> </div><div class='ctx'> 		dais = &lt;&amp;snd_kf1 /* (C) CPU2 */</div><div class='ctx'> 			&amp;snd_kf2 /* (D) CPU3 */</div><div class='ctx'> 			&amp;snd_kf3 /* (E) CPU4 */</div><div class='ctx'> 			&amp;snd_kf4 /* (F) CPU5 */</div><div class='del'>-			&amp;snd_kf5 /* (G) GPU6 */</div><div class='add'>+			&amp;snd_kf5 /* (G) CPU6 */</div><div class='add'>+			&amp;snd_kf6 /* (H) CPU7 */</div><div class='add'>+			&amp;snd_kf7 /* (I) CPU8 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -50,7 +59,9 @@</div><div class='ctx'> 	ports {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 		mclk-fs = &lt;512&gt;;</div><div class='add'>+		prefix = "pcm3168a";</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * (Y) PCM3168A-p</div><div class='hunk'>@@ -59,7 +70,6 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			prefix = "pcm3168a";</div><div class='ctx'> 			convert-channels = &lt;8&gt;; /* to 8ch TDM */</div><div class='ctx'> </div><div class='ctx'> 			/* (C) CPU2 -&gt; (Y) PCM3168A-p */</div><div class='hunk'>@@ -91,10 +101,28 @@</div><div class='ctx'> 		 * (Z) PCM3168A-c</div><div class='ctx'> 		 */</div><div class='ctx'> 		port@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			convert-channels = &lt;6&gt;; /* to 6ch TDM */</div><div class='add'>+</div><div class='ctx'> 			/* (G) CPU6 &lt;- PCM3168A-c */</div><div class='del'>-			pcm3168a_endpoint_c: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;rsnd_for_pcm3168a_capture&gt;;</div><div class='add'>+			pcm3168a_endpoint_c1: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;rsnd_for_pcm3168a_capture1&gt;;</div><div class='add'>+				clocks = &lt;&amp;clksndsel&gt;;</div><div class='add'>+			};</div><div class='add'>+			/* (H) CPU7 &lt;- PCM3168A-c */</div><div class='add'>+			pcm3168a_endpoint_c2: endpoint@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;rsnd_for_pcm3168a_capture2&gt;;</div><div class='add'>+				clocks = &lt;&amp;clksndsel&gt;;</div><div class='add'>+			};</div><div class='add'>+			/* (I) CPU8 &lt;- PCM3168A-c */</div><div class='add'>+			pcm3168a_endpoint_c3: endpoint@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;rsnd_for_pcm3168a_capture3&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clksndsel&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -160,12 +188,35 @@</div><div class='ctx'> 		 */</div><div class='ctx'> 		snd_kf5: port@6 {</div><div class='ctx'> 			reg = &lt;6&gt;;</div><div class='del'>-			rsnd_for_pcm3168a_capture: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;pcm3168a_endpoint_c&gt;;</div><div class='add'>+			rsnd_for_pcm3168a_capture1: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pcm3168a_endpoint_c1&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				capture = &lt;&amp;ssiu40 &amp;ssi4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (H) CPU7</div><div class='add'>+		 */</div><div class='add'>+		snd_kf6: port@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			rsnd_for_pcm3168a_capture2: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pcm3168a_endpoint_c2&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				capture = &lt;&amp;ssiu41 &amp;ssi4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (I) CPU8</div><div class='add'>+		 */</div><div class='add'>+		snd_kf7: port@8 {</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			rsnd_for_pcm3168a_capture3: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;pcm3168a_endpoint_c3&gt;;</div><div class='ctx'> 				bitclock-master;</div><div class='ctx'> 				frame-master;</div><div class='del'>-				dai-tdm-slot-num = &lt;6&gt;;</div><div class='del'>-				capture  = &lt;&amp;ssi4&gt;;</div><div class='add'>+				capture = &lt;&amp;ssiu42 &amp;ssi4&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi<br/>index 4cf632bc4621..67a0057a3383 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ulcb-kf-audio-graph-card2-mix+split.dtsi</a></div><div class='hunk'>@@ -15,7 +15,9 @@</div><div class='ctx'>  *	(D) CPU2 (2ch)  --/			   (TDM-1 : 2,3ch)</div><div class='ctx'>  *	(E) CPU4 (2ch)  --/			   (TDM-2 : 4,5ch)</div><div class='ctx'>  *	(F) CPU5 (2ch)  --/			   (TDM-3 : 6,7ch)</div><div class='del'>- *	(G) CPU6 (6ch) &lt;----  (6ch) (Z)	PCM3168A-c</div><div class='add'>+ *	(G) CPU6 (2ch) &lt;----  (6ch) (Z) PCM3168A-c (TDM-a: 0,1ch)</div><div class='add'>+ *	(H) CPU7 (2ch) &lt;--/			   (TDM-b: 2,3ch)</div><div class='add'>+ *	(I) CPU8 (2ch) &lt;--/			   (TDM-c: 4,5ch)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) aplay   -D plughw:0,0 xxx.wav (MIX-0)</div><div class='ctx'>  *	(B) aplay   -D plughw:0,1 xxx.wav (MIX-1)</div><div class='hunk'>@@ -25,7 +27,9 @@</div><div class='ctx'>  *	(F) aplay   -D plughw:1,3 xxx.wav (TDM-3)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) arecord -D plughw:0,0 xxx.wav</div><div class='del'>- *	(G) arecord -D plughw:1,4 xxx.wav</div><div class='add'>+ *	(G) arecord -D plughw:1,4 xxx.wav (TDM-a)</div><div class='add'>+ *	(H) arecord -D plughw:1,5 xxx.wav (TDM-b)</div><div class='add'>+ *	(I) arecord -D plughw:1,6 xxx.wav (TDM-c)</div><div class='ctx'>  */</div><div class='ctx'> / {</div><div class='ctx'> 	sound_card_kf: expand-sound {</div><div class='hunk'>@@ -36,19 +40,25 @@</div><div class='ctx'> 			  "pcm3168a Playback", "DAI3 Playback",</div><div class='ctx'> 			  "pcm3168a Playback", "DAI4 Playback",</div><div class='ctx'> 			  "pcm3168a Playback", "DAI5 Playback",</div><div class='del'>-			  "DAI6 Capture",      "pcm3168a Capture";</div><div class='add'>+			  "DAI6 Capture",      "pcm3168a Capture",</div><div class='add'>+			  "DAI7 Capture",      "pcm3168a Capture",</div><div class='add'>+			  "DAI8 Capture",      "pcm3168a Capture";</div><div class='ctx'> </div><div class='ctx'> 		links = &lt;&amp;fe_c		/* (C) CPU2	  */</div><div class='ctx'> 			 &amp;fe_d		/* (D) CPU3	  */</div><div class='ctx'> 			 &amp;fe_e		/* (E) CPU4	  */</div><div class='ctx'> 			 &amp;fe_f		/* (F) CPU5	  */</div><div class='del'>-			 &amp;rsnd_g	/* (G) CPU6	  */</div><div class='add'>+			 &amp;fe_g		/* (G) CPU6	  */</div><div class='add'>+			 &amp;fe_h		/* (H) CPU7	  */</div><div class='add'>+			 &amp;fe_i		/* (I) CPU8	  */</div><div class='ctx'> 			 &amp;be_y		/* (Y) PCM3168A-p */</div><div class='add'>+			 &amp;be_z		/* (Z) PCM3168A-c */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> </div><div class='del'>-		dpcm {</div><div class='add'>+		dpcm: dpcm {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			non-supplier;</div><div class='ctx'> </div><div class='ctx'> 			ports@0 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -62,21 +72,32 @@</div><div class='ctx'> 				 * (D) CPU3</div><div class='ctx'> 				 * (E) CPU4</div><div class='ctx'> 				 * (F) CPU5</div><div class='add'>+				 * (G) CPU6</div><div class='add'>+				 * (H) CPU7</div><div class='add'>+				 * (I) CPU8</div><div class='ctx'> 				 */</div><div class='ctx'> 			fe_c:	port@2 { reg = &lt;2&gt;; fe_c_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_c_ep&gt;; }; };</div><div class='ctx'> 			fe_d:	port@3 { reg = &lt;3&gt;; fe_d_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_d_ep&gt;; }; };</div><div class='ctx'> 			fe_e:	port@4 { reg = &lt;4&gt;; fe_e_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_e_ep&gt;; }; };</div><div class='ctx'> 			fe_f:	port@5 { reg = &lt;5&gt;; fe_f_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_f_ep&gt;; }; };</div><div class='add'>+</div><div class='add'>+			fe_g:	port@6 { reg = &lt;6&gt;; fe_g_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_g_ep&gt;; }; };</div><div class='add'>+			fe_h:	port@7 { reg = &lt;7&gt;; fe_h_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_h_ep&gt;; }; };</div><div class='add'>+			fe_i:	port@8 { reg = &lt;8&gt;; fe_i_ep: endpoint { remote-endpoint = &lt;&amp;rsnd_i_ep&gt;; }; };</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ports@1 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='ctx'> 				reg = &lt;1&gt;;</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * BE</div><div class='ctx'> 				 *</div><div class='ctx'> 				 * (Y) PCM3168A-p</div><div class='add'>+				 * (Z) PCM3168A-c</div><div class='ctx'> 				 */</div><div class='del'>-			be_y:	port { be_y_ep: endpoint { remote-endpoint = &lt;&amp;pcm3168a_y_ep&gt;; }; };</div><div class='add'>+			be_y:	port@0 { reg = &lt;0&gt;; be_y_ep: endpoint { remote-endpoint = &lt;&amp;pcm3168a_y_ep&gt;; }; };</div><div class='add'>+			be_z:	port@1 { reg = &lt;1&gt;; be_z_ep: endpoint { remote-endpoint = &lt;&amp;pcm3168a_z_ep&gt;; }; };</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -106,8 +127,9 @@</div><div class='ctx'> 		 */</div><div class='ctx'> 		port@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+			convert-channels = &lt;6&gt;; /* to 6ch TDM */</div><div class='ctx'> 			pcm3168a_z_ep: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;rsnd_g_ep&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;be_z_ep&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;clksndsel&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -171,13 +193,37 @@</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * (G) CPU6</div><div class='ctx'> 		 */</div><div class='del'>-		rsnd_g: port@6 {</div><div class='add'>+		port@6 {</div><div class='ctx'> 			reg = &lt;6&gt;;</div><div class='ctx'> 			rsnd_g_ep: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;pcm3168a_z_ep&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;fe_g_ep&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				capture = &lt;&amp;ssiu40 &amp;ssi4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (H) CPU7</div><div class='add'>+		 */</div><div class='add'>+		port@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			rsnd_h_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;fe_h_ep&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				capture = &lt;&amp;ssiu41 &amp;ssi4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (I) CPU8</div><div class='add'>+		 */</div><div class='add'>+		port@8 {</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			rsnd_i_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;fe_i_ep&gt;;</div><div class='ctx'> 				bitclock-master;</div><div class='ctx'> 				frame-master;</div><div class='del'>-				capture = &lt;&amp;ssi4&gt;;</div><div class='add'>+				capture = &lt;&amp;ssiu42 &amp;ssi4&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi<br/>index f01d91aaadf3..fd75801c329e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ulcb-kf-simple-audio-card-mix+split.dtsi</a></div><div class='hunk'>@@ -15,7 +15,9 @@</div><div class='ctx'>  *	(D) CPU2 (2ch)  --/			   (TDM-1 : 2,3ch)</div><div class='ctx'>  *	(E) CPU4 (2ch)  --/			   (TDM-2 : 4,5ch)</div><div class='ctx'>  *	(F) CPU5 (2ch)  --/			   (TDM-3 : 6,7ch)</div><div class='del'>- *	(G) CPU6 (6ch) &lt;----  (6ch) (Z)	PCM3168A-c</div><div class='add'>+ *	(G) CPU6 (2ch) &lt;----  (6ch) (Z) PCM3168A-c (TDM-a: 0,1ch)</div><div class='add'>+ *	(H) CPU7 (2ch) &lt;--/			   (TDM-b: 2,3ch)</div><div class='add'>+ *	(I) CPU8 (2ch) &lt;--/			   (TDM-c: 4,5ch)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) aplay   -D plughw:0,0 xxx.wav (MIX-0)</div><div class='ctx'>  *	(B) aplay   -D plughw:0,1 xxx.wav (MIX-1)</div><div class='hunk'>@@ -25,7 +27,9 @@</div><div class='ctx'>  *	(F) aplay   -D plughw:1,3 xxx.wav (TDM-3)</div><div class='ctx'>  *</div><div class='ctx'>  *	(A) arecord -D plughw:0,0 xxx.wav</div><div class='del'>- *	(G) arecord -D plughw:1,4 xxx.wav</div><div class='add'>+ *	(G) arecord -D plughw:1,4 xxx.wav (TDM-a)</div><div class='add'>+ *	(H) arecord -D plughw:1,5 xxx.wav (TDM-b)</div><div class='add'>+ *	(I) arecord -D plughw:1,6 xxx.wav (TDM-c)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -39,7 +43,10 @@</div><div class='ctx'> 		simple-audio-card,routing = "pcm3168a Playback", "DAI2 Playback",</div><div class='ctx'> 					    "pcm3168a Playback", "DAI3 Playback",</div><div class='ctx'> 					    "pcm3168a Playback", "DAI4 Playback",</div><div class='del'>-					    "pcm3168a Playback", "DAI5 Playback";</div><div class='add'>+					    "pcm3168a Playback", "DAI5 Playback",</div><div class='add'>+					    "DAI6 Capture",      "pcm3168a Capture",</div><div class='add'>+					    "DAI7 Capture",      "pcm3168a Capture",</div><div class='add'>+					    "DAI8 Capture",      "pcm3168a Capture";</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,dai-link@0 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -88,16 +95,40 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,dai-link@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='add'>+			convert-channels = &lt;6&gt;; /* to 6ch TDM */</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * (G) CPU6</div><div class='ctx'> 			 */</div><div class='del'>-			cpu {</div><div class='add'>+			cpu@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='ctx'> 				bitclock-master;</div><div class='ctx'> 				frame-master;</div><div class='ctx'> 				sound-dai = &lt;&amp;rcar_sound 6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			/*</div><div class='add'>+			 * (H) CPU7</div><div class='add'>+			 */</div><div class='add'>+			cpu@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				sound-dai = &lt;&amp;rcar_sound 7&gt;;</div><div class='add'>+			};</div><div class='add'>+			/*</div><div class='add'>+			 * (I) CPU8</div><div class='add'>+			 */</div><div class='add'>+			cpu@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				bitclock-master;</div><div class='add'>+				frame-master;</div><div class='add'>+				sound-dai = &lt;&amp;rcar_sound 8&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/*</div><div class='ctx'> 			 * (Z) PCM3168A-c</div><div class='ctx'> 			 */</div><div class='ctx'> 			codec {</div><div class='hunk'>@@ -151,7 +182,19 @@</div><div class='ctx'> 		 * (G) CPU6</div><div class='ctx'> 		 */</div><div class='ctx'> 		dai6 {</div><div class='del'>-			capture = &lt;&amp;ssi4&gt;;</div><div class='add'>+			capture = &lt;&amp;ssiu40 &amp;ssi4&gt;;</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (H) CPU7</div><div class='add'>+		 */</div><div class='add'>+		dai7 {</div><div class='add'>+			capture = &lt;&amp;ssiu41 &amp;ssi4&gt;;</div><div class='add'>+		};</div><div class='add'>+		/*</div><div class='add'>+		 * (I) CPU8</div><div class='add'>+		 */</div><div class='add'>+		dai8 {</div><div class='add'>+			capture = &lt;&amp;ssiu42 &amp;ssi4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi<br/>index 431b37bf5661..2a157d1efb3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb-kf.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ulcb-kf.dtsi</a></div><div class='hunk'>@@ -4,8 +4,24 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2017 Renesas Electronics Corp.</div><div class='ctx'>  * Copyright (C) 2017 Cogent Embedded, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Sample Audio settings:</div><div class='add'>+ *</div><div class='add'>+ *	&gt; amixer set "DVC Out" 1%</div><div class='add'>+ *	&gt; amixer set "DVC In"  20%</div><div class='add'>+ *</div><div class='add'>+ *	// if you use xxxx-mix+split.dtsi</div><div class='add'>+ *	&gt; amixer -D hw:1 set "pcm3168a DAC1" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "pcm3168a DAC2" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "pcm3168a DAC3" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "pcm3168a DAC4" 50%</div><div class='add'>+ *</div><div class='add'>+ *	// else</div><div class='add'>+ *	&gt; amixer -D hw:1 set "DAC1" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "DAC2" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "DAC3" 50%</div><div class='add'>+ *	&gt; amixer -D hw:1 set "DAC4" 50%</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial1 = &amp;hscif0;</div><div class='hunk'>@@ -150,8 +166,7 @@</div><div class='ctx'> 				pinctrl-0 = &lt;&amp;hdmi1_pins&gt;;</div><div class='ctx'> 				pinctrl-names = "default";</div><div class='ctx'> </div><div class='del'>-				interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-				interrupts = &lt;14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;gpio2 14 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;cs2000&gt;;</div><div class='ctx'> 				clock-names = "cec";</div><div class='hunk'>@@ -236,8 +251,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio6 8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> </div><div class='ctx'> 		audio-out-off-hog {</div><div class='ctx'> 			gpio-hog;</div><div class='hunk'>@@ -297,8 +311,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-		interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio6 4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -318,8 +331,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio7&gt;;</div><div class='del'>-		interrupts = &lt;3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio7 3 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio_exp_77: gpio@77 {</div><div class='hunk'>@@ -329,8 +341,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio5 9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -449,8 +460,7 @@</div><div class='ctx'> 	wlcore: wlcore@2 {</div><div class='ctx'> 		compatible = "ti,wl1837";</div><div class='ctx'> 		reg = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio1 25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi<br/>index a2f66f916048..8a30908992ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/ulcb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/ulcb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/ulcb.dtsi</a></div><div class='hunk'>@@ -4,6 +4,11 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2016 Renesas Electronics Corp.</div><div class='ctx'>  * Copyright (C) 2016 Cogent Embedded, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Sample Audio settings:</div><div class='add'>+ *</div><div class='add'>+ *	&gt; amixer set "DVC Out" 1%</div><div class='add'>+ *	&gt; amixer set "DVC In"  20%</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -150,8 +155,7 @@</div><div class='ctx'> 			     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio2 11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -234,10 +238,13 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;x23_clk&gt;;</div><div class='ctx'> 		clock-names = "xin";</div><div class='add'>+		idt,shutdown = &lt;0&gt;;</div><div class='add'>+		idt,output-enable-active = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c_dvfs {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='hunk'>@@ -248,8 +255,7 @@</div><div class='ctx'> </div><div class='ctx'> 		compatible = "rohm,bd9571mwv";</div><div class='ctx'> 		reg = &lt;0x30&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc_ex&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='hunk'>@@ -272,6 +278,7 @@</div><div class='ctx'> 		compatible = "rohm,br24t01", "atmel,24c01";</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		pagesize = &lt;8&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -443,6 +450,7 @@</div><div class='ctx'> &amp;scif2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;scif2_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso b/arch/arm64/boot/dts/renesas/white-hawk-ard-audio-da7212.dtso<br/>index e6cf304c77ee..f2d53e958da1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-ard-audio-da7212.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-ard-audio-da7212.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/white-hawk-ard-audio-da7212.dtso</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /*</div><div class='del'>- * Device Tree Source for the White Hawk board with ARD-AUDIO-DA7212 Board</div><div class='add'>+ * Device Tree Source for White Hawk (Single) board with ARD-AUDIO-DA7212 board</div><div class='ctx'>  *</div><div class='ctx'>  * You can find and buy "ARD-AUDIO-DA7212" at Digi-Key</div><div class='ctx'>  *</div><div class='hunk'>@@ -27,12 +27,12 @@</div><div class='ctx'>  * +----------------------------+</div><div class='ctx'>  * |Breakout board		|</div><div class='ctx'>  * |				|	+---------------+</div><div class='del'>- * |CN34 (I2C CN)		|	|J1		|</div><div class='add'>+ * |CN(30)34 (I2C CN)		|	|J1		|</div><div class='ctx'>  * |	I2C0_SCL	   pin3 |&lt;-----&gt;| pin20 SCL	|</div><div class='ctx'>  * |	I2C0_SDA	   pin5 |&lt;-----&gt;| pin18 SDA	|</div><div class='ctx'>  * |				|	+---------------+</div><div class='ctx'>  * |				|	+-----------------------+</div><div class='del'>- * |CN4 (Power)		        |	|J7			|</div><div class='add'>+ * |CN(300)4 (Power)	        |	|J7			|</div><div class='ctx'>  * |	3v3 (v)		   pin9 |&lt;-----&gt;| pin4  / pin8  3.3v	|</div><div class='ctx'>  * |	GND (v)	    pin3 / pin4 |&lt;-----&gt;| pin12 / pin14 GND	|</div><div class='ctx'>  * +----------------------------+	+-----------------------+</div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tpu0_pins: tpu0 {</div><div class='del'>-		groups = "tpu_to0_a";</div><div class='add'>+		groups = "tpu_to0_b";</div><div class='ctx'> 		function = "tpu";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi<br/>index 3845b413bd24..b4024e85ae5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi</a></div><div class='hunk'>@@ -167,8 +167,7 @@</div><div class='ctx'> 				     "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			rxc-skew-ps = &lt;1500&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio7&gt;;</div><div class='del'>-			interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio7 5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 			reset-gpios = &lt;&amp;gpio7 10 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -202,6 +201,7 @@</div><div class='ctx'> &amp;hscif0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;hscif0_pins&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -216,8 +216,7 @@</div><div class='ctx'> 	io_expander_a: gpio@20 {</div><div class='ctx'> 		compatible = "onnn,pca9654";</div><div class='ctx'> 		reg = &lt;0x20&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio0 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -240,14 +239,16 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	bridge@2c {</div><div class='add'>+		pinctrl-0 = &lt;&amp;irq0_pins&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='ctx'> 		compatible = "ti,sn65dsi86";</div><div class='ctx'> 		reg = &lt;0x2c&gt;;</div><div class='ctx'> </div><div class='ctx'> 		clocks = &lt;&amp;sn65dsi86_refclk&gt;;</div><div class='ctx'> 		clock-names = "refclk";</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;intc_ex&gt;;</div><div class='del'>-		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;intc_ex 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio1 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -302,7 +303,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pciec0 {</div><div class='del'>-	reset-gpio = &lt;&amp;io_expander_a 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;io_expander_a 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -344,6 +345,11 @@</div><div class='ctx'> 		function = "i2c1";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	irq0_pins: irq0 {</div><div class='add'>+		groups = "intc_ex_irq0_a";</div><div class='add'>+		function = "intc_ex";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	keys_pins: keys {</div><div class='ctx'> 		pins = "GP_5_0", "GP_5_1", "GP_5_2";</div><div class='ctx'> 		bias-pull-up;</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi<br/>index 3006b0a64f41..a5d1c1008e7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi</a></div><div class='hunk'>@@ -21,6 +21,9 @@</div><div class='ctx'> 				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_CPHY&gt;;</div><div class='ctx'> 				clock-lanes = &lt;0&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2 3&gt;;</div><div class='add'>+				line-orders = &lt;MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC</div><div class='add'>+					       MEDIA_BUS_CSI2_CPHY_LINE_ORDER_BCA</div><div class='add'>+					       MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;max96712_out0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -41,6 +44,9 @@</div><div class='ctx'> 				bus-type = &lt;MEDIA_BUS_TYPE_CSI2_CPHY&gt;;</div><div class='ctx'> 				clock-lanes = &lt;0&gt;;</div><div class='ctx'> 				data-lanes = &lt;1 2 3&gt;;</div><div class='add'>+				line-orders = &lt;MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC</div><div class='add'>+					       MEDIA_BUS_CSI2_CPHY_LINE_ORDER_BCA</div><div class='add'>+					       MEDIA_BUS_CSI2_CPHY_LINE_ORDER_ABC&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;max96712_out1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi<br/>index 595ec4ff4cdd..ad94bf3f5e6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi</a></div><div class='hunk'>@@ -29,8 +29,7 @@</div><div class='ctx'> 		avb1_phy: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-			interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio6 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -51,8 +50,7 @@</div><div class='ctx'> 		avb2_phy: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c45";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-			interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio5 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/renesas/white-hawk-single.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-single.dtsi<br/>new file mode 100644<br/>index 000000000000..976a3ab44e5a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/renesas/white-hawk-single.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/renesas/white-hawk-single.dtsi</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the White Hawk Single board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023-2024 Glider bv</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "white-hawk-cpu-common.dtsi"</div><div class='add'>+#include "white-hawk-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Renesas White Hawk Single board";</div><div class='add'>+	compatible = "renesas,white-hawk-single";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet3 = &amp;tsn0;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hscif0 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hscif0_pins {</div><div class='add'>+	groups = "hscif0_data", "hscif0_ctrl";</div><div class='add'>+	function = "hscif0";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pfc {</div><div class='add'>+	tsn0_pins: tsn0 {</div><div class='add'>+		mux {</div><div class='add'>+			groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",</div><div class='add'>+				 "tsn0_txcrefclk";</div><div class='add'>+			function = "tsn0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		link {</div><div class='add'>+			groups = "tsn0_link";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio {</div><div class='add'>+			groups = "tsn0_mdio";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii {</div><div class='add'>+			groups = "tsn0_rgmii";</div><div class='add'>+			drive-strength = &lt;24&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsn0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;tsn0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;tsn0_phy&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 23 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;4000&gt;;</div><div class='add'>+</div><div class='add'>+		tsn0_phy: ethernet-phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-id002b.0980",</div><div class='add'>+				     "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;gpio4 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile<br/>index 09423070c992..ad684e3831bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/Makefile</a></div><div class='hunk'>@@ -1,14 +1,24 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-cobra-ltk050h3146w-a2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-cobra-ltk050h3146w.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-cobra-ltk050h3148w.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-cobra-ltk500hd1829.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-firefly-jd4-core-mb.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-pp1516-ltk050h3146w-a2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-pp1516-ltk050h3148w.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou-lvds-9904379.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou-video-demo.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-bpi-p2-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-s0.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-sakurapi-rk3308b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351m.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351v.dtb</div><div class='hunk'>@@ -37,6 +47,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-eaidk-610.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-ind.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb</div><div class='hunk'>@@ -60,6 +71,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinephone-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou-video-demo.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-plus.dtb</div><div class='hunk'>@@ -73,9 +85,16 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-screen.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-v10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-d.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb</div><div class='hunk'>@@ -91,6 +110,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb10max3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb20sx.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb</div><div class='hunk'>@@ -107,15 +127,21 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-model-a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lckfb-tspi.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lubancat-1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-nanopi-r3s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-cb2-manta.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb</div><div class='hunk'>@@ -124,33 +150,132 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5-v1.2-wifibt.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-w3.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-genbook.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb2-v10.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar-ethernet-switch.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar-pre-ict-tester.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-max.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-ultra.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-roc-rt.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5t.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-video-demo.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-coolpi-4b.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-v10.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-gameforce-ace.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-roc-pc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb</div><div class='add'>+</div><div class='add'>+# Overlay application tests</div><div class='add'>+#</div><div class='add'>+# A .dtbo must have its own</div><div class='add'>+#</div><div class='add'>+#  dtb-$(CONFIG_ARCH_ROCKCHIP) += &lt;overlay&gt;.dtbo</div><div class='add'>+#</div><div class='add'>+# entry, and at least one overlay application test reflecting a possible</div><div class='add'>+# hardware combination in real life:</div><div class='add'>+#</div><div class='add'>+#  dtb-$(CONFIG_ARCH_ROCKCHIP) += &lt;overlay-application-test&gt;.dtb</div><div class='add'>+#  &lt;overlay-application-test&gt;-dtbs := &lt;base&gt;.dtb &lt;overlay-1&gt;.dtbo [&lt;overlay-2&gt;.dtbo ...]</div><div class='add'>+#</div><div class='add'>+# This will make the &lt;base&gt;.dtb have symbols (like when DTC_FLAGS has -@ passed)</div><div class='add'>+# and generate a new DTB (&lt;overlay-application-test&gt;.dtb) which is the</div><div class='add'>+# result of the application of &lt;overlay-1&gt;.dtbo and other listed overlays on top</div><div class='add'>+# of &lt;base&gt;.dtb.</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou-haikou-lvds-9904379.dtb</div><div class='add'>+px30-ringneck-haikou-haikou-lvds-9904379-dtbs := px30-ringneck-haikou.dtb \</div><div class='add'>+	px30-ringneck-haikou-lvds-9904379.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou-haikou-video-demo.dtb</div><div class='add'>+px30-ringneck-haikou-haikou-video-demo-dtbs := px30-ringneck-haikou.dtb \</div><div class='add'>+	px30-ringneck-haikou-video-demo.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou-haikou-video-demo.dtb</div><div class='add'>+rk3399-puma-haikou-haikou-video-demo-dtbs := rk3399-puma-haikou.dtb \</div><div class='add'>+	rk3399-puma-haikou-video-demo.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-screen.dtb</div><div class='add'>+rk3399-rockpro64-screen-dtbs := rk3399-rockpro64.dtb \</div><div class='add'>+	rk3399-rockpro64-screen.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb</div><div class='add'>+rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \</div><div class='add'>+	rk3399-rockpro64-screen.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-vz-2-uhd.dtb</div><div class='add'>+rk3568-wolfvision-pf5-vz-2-uhd-dtbs := rk3568-wolfvision-pf5.dtb \</div><div class='add'>+	rk3568-wolfvision-pf5-display-vz.dtbo \</div><div class='add'>+	rk3568-wolfvision-pf5-io-expander.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5-v1.2-wifibt.dtb</div><div class='add'>+rk3576-armsom-sige5-v1.2-wifibt-dtbs := rk3576-armsom-sige5.dtb \</div><div class='add'>+	rk3576-armsom-sige5-v1.2-wifibt.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtb</div><div class='add'>+rk3588-edgeble-neu6a-wifi-dtbs := rk3588-edgeble-neu6a-io.dtb \</div><div class='add'>+	rk3588-edgeble-neu6a-wifi.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-wifi.dtb</div><div class='add'>+rk3588-edgeble-neu6b-wifi-dtbs := rk3588-edgeble-neu6b-io.dtb \</div><div class='add'>+	rk3588-edgeble-neu6a-wifi.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar-ethernet-switch.dtb</div><div class='add'>+rk3588-jaguar-ethernet-switch-dtbs := rk3588-jaguar.dtb \</div><div class='add'>+	rk3588-jaguar-ethernet-switch.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar-pre-ict-tester.dtb</div><div class='add'>+rk3588-jaguar-pre-ict-tester-dtbs := rk3588-jaguar.dtb \</div><div class='add'>+	rk3588-jaguar-pre-ict-tester.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtb</div><div class='add'>+rk3588-rock-5b-pcie-ep-dtbs := rk3588-rock-5b.dtb \</div><div class='add'>+	rk3588-rock-5b-pcie-ep.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtb</div><div class='add'>+rk3588-rock-5b-pcie-srns-dtbs := rk3588-rock-5b.dtb \</div><div class='add'>+	rk3588-rock-5b-pcie-srns.dtbo</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-haikou-video-demo.dtb</div><div class='add'>+rk3588-tiger-haikou-haikou-video-demo-dtbs := rk3588-tiger-haikou.dtb \</div><div class='add'>+	rk3588-tiger-haikou-video-demo.dtbo</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts<br/>new file mode 100644<br/>index 000000000000..a31c61c8f148<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-cobra.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems Cobra with LTK050H3146W-A2 Display";</div><div class='add'>+	compatible = "tsd,px30-cobra-ltk050h3146w-a2", "tsd,px30-cobra", "rockchip,px30";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3146w-a2";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts<br/>new file mode 100644<br/>index 000000000000..a3c6edfdb37c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-cobra.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems Cobra with LTK050H3146W Display";</div><div class='add'>+	compatible = "tsd,px30-cobra-ltk050h3146w", "tsd,px30-cobra", "rockchip,px30";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3146w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts<br/>new file mode 100644<br/>index 000000000000..9b5eff392dfa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-cobra.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems Cobra with ltk050h3148w Display";</div><div class='add'>+	compatible = "tsd,px30-cobra-ltk050h3148w", "tsd,px30-cobra", "rockchip,px30";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3148w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts b/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts<br/>new file mode 100644<br/>index 000000000000..36b7cae49e31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-cobra.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems Cobra prototype with LTK500HD1829 Display";</div><div class='add'>+	compatible = "tsd,px30-cobra-ltk500hd1829", "tsd,px30-cobra", "rockchip,px30";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk500hd1829";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;cobra_pin_hog&gt;, &lt;&amp;cobra_proto_hog&gt;;</div><div class='add'>+</div><div class='add'>+	hog {</div><div class='add'>+		cobra_proto_hog: cobra-proto-hog {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* STUSB4500 open drain outout POWER_OK2, needs pull-up */</div><div class='add'>+				&lt;3 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* STUSB4500 open drain outout POWER_OK3, needs pull-up */</div><div class='add'>+				&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	broken-cd;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc_clk &amp;sdmmc_cmd &amp;sdmmc_bus4&gt;;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-cobra.dtsi b/arch/arm64/boot/dts/rockchip/px30-cobra.dtsi<br/>new file mode 100644<br/>index 000000000000..b7e669d8ba4d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-cobra.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-cobra.dtsi</a></div><div class='hunk'>@@ -0,0 +1,566 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "px30.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac;</div><div class='add'>+		mmc0 = &amp;emmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial5:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	beeper {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 1000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: emmc-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		pinctrl-0 = &lt;&amp;emmc_reset&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;heartbeat_led_pin&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LED14 on the PCB. Typically NOT populated.</div><div class='add'>+		 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "heartbeat";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm-leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		ring_red: led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			label = "ring_red";</div><div class='add'>+			pwms = &lt;&amp;pwm5 0 1000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ring_green: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			label = "ring_green";</div><div class='add'>+			pwms = &lt;&amp;pwm6 0 1000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ring_blue: led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			label = "ring_blue";</div><div class='add'>+			pwms = &lt;&amp;pwm7 0 1000000 0&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* also named 5V_Q7 in schematics */</div><div class='add'>+	vcc5v0_sys: regulator-vccsys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	/*</div><div class='add'>+	 * For hs200 support, U-Boot would have to set the RK809 DCDC4</div><div class='add'>+	 * rail to 1.8V from the default of 3.0V. It doesn't do that on</div><div class='add'>+	 * devices out in the field, so disable hs200.</div><div class='add'>+	 * mmc-hs200-1_8v;</div><div class='add'>+	 */</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_emmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;dp83825&gt;;</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_log&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C0 = PMIC, STUSB4500, RTC */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "xin32k";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_log: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_log";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v0_1v8: vcc_emmc: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc_3v0_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v0: LDO_REG3 {</div><div class='add'>+				regulator-name = "vcc_1v0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v8: LDO_REG4 {</div><div class='add'>+				regulator-name = "vcc_2v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * vccio_sd also supplies the vmmc supply on prototypes</div><div class='add'>+			 * with sd-slots, so needs to stay single voltage for</div><div class='add'>+			 * those. Production models don't have sd-slots anymore</div><div class='add'>+			 * and only supply vccio2 from this regulator.</div><div class='add'>+			 */</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* vcc_sdio also supplies the pull-up resistors for i2c1 */</div><div class='add'>+			vcc_sdio: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc_sdio";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_lcd: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcc_lcd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_lcd: LDO_REG8 {</div><div class='add'>+				regulator-name = "vcc_1v8_lcd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;50&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;300&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tch_int &amp;tch_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		touchscreen-inverted-x;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable pull-ups to prevent floating pins when the touch</div><div class='add'>+ * panel is not connected.</div><div class='add'>+ */</div><div class='add'>+&amp;i2c2_xfer {</div><div class='add'>+	rockchip,pins =</div><div class='add'>+		&lt;2 RK_PB7 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+		&lt;2 RK_PC0 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_emmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	dp83825: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;phy_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;50000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;cobra_pin_hog&gt;;</div><div class='add'>+</div><div class='add'>+	hog {</div><div class='add'>+		cobra_pin_hog: cobra-pin-hog {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* USB_HUB2_RESET */</div><div class='add'>+				&lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_output_high&gt;,</div><div class='add'>+				/* USB_HUB1_RESET */</div><div class='add'>+				&lt;0 RK_PB4 RK_FUNC_GPIO &amp;pcfg_output_high&gt;,</div><div class='add'>+				/* The default pull-down can keep the IC in reset. */</div><div class='add'>+				&lt;3 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* USB-A 5V enable */</div><div class='add'>+				&lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_output_high&gt;,</div><div class='add'>+				/* USB-A data enable */</div><div class='add'>+				&lt;3 RK_PD3 RK_FUNC_GPIO &amp;pcfg_output_high&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc {</div><div class='add'>+		emmc_reset: emmc-reset {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet {</div><div class='add'>+		phy_rst: phy-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;2 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		heartbeat_led_pin: heartbeat-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		dsp_rst: dsp-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tch_int: tch-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tch_rst: tch-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	/delete-property/ dmas;</div><div class='add'>+	/delete-property/ dma-names;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl_mmu {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi<br/>index 5b4e22385165..a334ef0629d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> 		mmc2 = &amp;sdio;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";	/* +5V */</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc3v3_btreg: vcc3v3-btreg {</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_enable_h&gt;;</div><div class='hunk'>@@ -39,10 +39,9 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='del'>-		states = &lt;3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_rf_aux_mod: vcc3v3-rf-aux-mod {</div><div class='add'>+	vcc3v3_rf_aux_mod: regulator-vcc3v3-rf-aux-mod {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_rf_aux_mod";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi<br/>index 80db778c9684..b60e68faa83a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a></div><div class='hunk'>@@ -26,5 +26,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;vcc3v3_btreg {</div><div class='del'>-	enable-gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts<br/>index 165d09ccb942..5886b802c520 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a></div><div class='hunk'>@@ -39,5 +39,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;vcc3v3_btreg {</div><div class='del'>-	enable-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi<br/>index 5eecbefa8a33..dd715d22d4d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi</a></div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> 		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts<br/>index 0a90a88fc664..85d1642eb9be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-evb.dts</a></div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;; /* GPIO3_A4 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vccsys {</div><div class='add'>+	vcc5v0_sys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -124,6 +124,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='hunk'>@@ -189,7 +191,7 @@</div><div class='ctx'> 		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k";</div><div class='hunk'>@@ -483,8 +485,7 @@</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		port@0 {</div><div class='del'>-			mipi_in_ucam: endpoint@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='add'>+			mipi_in_ucam: endpoint {</div><div class='ctx'> 				data-lanes = &lt;1 2&gt;;</div><div class='ctx'> 				remote-endpoint = &lt;&amp;ucam_out&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts b/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts<br/>index d03e6aef54dc..5e3c10d825a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core-mb.dts</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;; /* GPIO3_A4 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_baseboard: vcc5v0-baseboard-regulator {</div><div class='add'>+	vcc5v0_baseboard: regulator-vcc5v0-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi b/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi<br/>index f18d7eb9a9c7..1ad0e52a64ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-firefly-jd4-core.dtsi</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts<br/>new file mode 100644<br/>index 000000000000..932721ffd470<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-pp1516.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems PP-1516 with LTK050H3146W-A2 Display";</div><div class='add'>+	compatible = "tsd,px30-pp1516-ltk050h3146w-a2", "tsd,px30-pp1516", "rockchip,px30";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3146w-a2";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts b/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts<br/>new file mode 100644<br/>index 000000000000..70adf091371c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "px30-pp1516.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Theobroma Systems PP-1516 with LTK050H3148W Display";</div><div class='add'>+	compatible = "tsd,px30-pp1516-ltk050h3148w", "tsd,px30-pp1516", "rockchip,px30";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3148w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;dsp_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi b/arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi<br/>new file mode 100644<br/>index 000000000000..192791993f05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi</a></div><div class='hunk'>@@ -0,0 +1,601 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "px30.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;emmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial5:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	beeper {</div><div class='add'>+		compatible = "pwm-beeper";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 1000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_pwrseq: emmc-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		pinctrl-0 = &lt;&amp;emmc_reset&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;debug_led_pin&gt;, &lt;&amp;heartbeat_led_pin&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LED2 on the PCB, left of the USB-C connector.</div><div class='add'>+		 * Typically NOT populated.</div><div class='add'>+		 */</div><div class='add'>+		debug: led-0 {</div><div class='add'>+			label = "debug";</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LED14 on the PCB, left of the PX30 SoC.</div><div class='add'>+		 * Typically NOT populated.</div><div class='add'>+		 */</div><div class='add'>+		heartbeat: led-1 {</div><div class='add'>+			label = "heartbeat";</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vccsys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_cam_avdd: regulator-vcc-cam-avdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_cam_avdd";</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_avdd_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_cam_dovdd: regulator-vcc-cam-dovdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_cam_dovdd";</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_dovdd_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_cam_dvdd: regulator-vcc-cam-dvdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_cam_dvdd";</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_dvdd_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_lens_afvdd: regulator-vcc-lens-afvdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_lens_afvdd";</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cam_afvdd_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	/*</div><div class='add'>+	 * For hs200 support, U-Boot would have to set the RK809 DCDC4</div><div class='add'>+	 * rail to 1.8V from the default of 3.0V. It doesn't do that on</div><div class='add'>+	 * devices out in the field, so disable hs200.</div><div class='add'>+	 * mmc-hs200-1_8v;</div><div class='add'>+	 */</div><div class='add'>+	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_emmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_log&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C0 = PMIC, Touchscreen */</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tch_int &amp;tch_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "xin32k";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_log: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_log";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v0_1v8: vcc_emmc: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc_3v0_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v0: LDO_REG3 {</div><div class='add'>+				regulator-name = "vcc_1v0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v8: LDO_REG4 {</div><div class='add'>+				regulator-name = "vcc_2v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_sdio: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc_sdio";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_lcd: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcc_lcd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_lcd: LDO_REG8 {</div><div class='add'>+				regulator-name = "vcc_1v8_lcd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C2 = Accelerometer + Camera */</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	/* MEMSIC MXC4005 accelerometer is rated for I2C Fast Mode (&lt;=400KHz) */</div><div class='add'>+	/* OmniVision OV5675 camera is rated for I2C Fast Mode (&lt;=400KHz) */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	focus: focus@c {</div><div class='add'>+		compatible = "dongwoon,dw9714";</div><div class='add'>+		reg = &lt;0xc&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_lens_afvdd&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	accel@15 {</div><div class='add'>+		compatible = "memsic,mxc4005";</div><div class='add'>+		reg = &lt;0x15&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;accel_int&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	camera@36 {</div><div class='add'>+		compatible = "ovti,ov5675";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;vcc_cam_avdd&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;vcc_cam_dvdd&gt;;</div><div class='add'>+		dovdd-supply = &lt;&amp;vcc_cam_dovdd&gt;;</div><div class='add'>+		lens-focus = &lt;&amp;focus&gt;;</div><div class='add'>+		orientation = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cif_clkout_m0 &amp;cam_pwdn&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ucam_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;450000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_emmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_in_ucam: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ucam_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	accel {</div><div class='add'>+		accel_int: accel-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	camera {</div><div class='add'>+		cam_afvdd_en: cam-afvdd-en {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cam_avdd_en: cam-avdd-en {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cam_dovdd_en: cam-dovdd-en {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cam_dvdd_en: cam-dvdd-en {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cam_pwdn: cam-pwdn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;2 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc {</div><div class='add'>+		emmc_reset: emmc-reset {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		debug_led_pin: debug-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		heartbeat_led_pin: heartbeat-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		dsp_rst: dsp-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tch_int: tch-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tch_rst: tch-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso<br/>new file mode 100644<br/>index 000000000000..3fc088a5636a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-lvds-9904379.dtso</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * HAIKOU-LVDS-9904379 adapter for PX30 Ringneck and Haikou carrierboard.</div><div class='add'>+ *</div><div class='add'>+ * This adapter needs to be plugged in the fake PCIe connector called Video</div><div class='add'>+ * Connector on Haikou carrierboard.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	backlight_lvds: backlight-lvds {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;255&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;255&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel {</div><div class='add'>+		compatible = "admatec,9904379", "panel-lvds";</div><div class='add'>+		backlight = &lt;&amp;backlight_lvds&gt;;</div><div class='add'>+		data-mapping = "vesa-24";</div><div class='add'>+		height-mm = &lt;126&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+		width-mm = &lt;224&gt;;</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;49500000&gt;;</div><div class='add'>+			hactive = &lt;1024&gt;;</div><div class='add'>+			hback-porch = &lt;90&gt;;</div><div class='add'>+			hfront-porch = &lt;90&gt;;</div><div class='add'>+			hsync-len = &lt;90&gt;;</div><div class='add'>+			vactive = &lt;600&gt;;</div><div class='add'>+			vback-porch = &lt;10&gt;;</div><div class='add'>+			vfront-porch = &lt;10&gt;;</div><div class='add'>+			vsync-len = &lt;10&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_lvds: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	/* EEPROM and GT928 are limited to 400KHz */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt928";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_int &amp;touch_rst&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		touchscreen-inverted-x;</div><div class='add'>+		touchscreen-inverted-y;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@54 {</div><div class='add'>+		reg = &lt;0x54&gt;;</div><div class='add'>+		compatible = "st,24c04", "atmel,24c04";</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		size = &lt;512&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds_out {</div><div class='add'>+	lvds_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_lvds&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	touch {</div><div class='add'>+		touch_int: touch-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		touch_rst: touch-rst {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso<br/>new file mode 100644<br/>index 000000000000..760d5139f95d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso</a></div><div class='hunk'>@@ -0,0 +1,243 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * DEVKIT ADDON CAM-TS-A01</div><div class='add'>+ * https://embedded.cherry.de/product/development-kit/</div><div class='add'>+ *</div><div class='add'>+ * DT-overlay for the camera / DSI demo appliance for Haikou boards.</div><div class='add'>+ * In the flavour for use with a Ringneck system-on-module.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;dc_12v&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_afvdd_2v8: regulator-cam-afvdd-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pca9670 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "cam-afvdd-2v8";</div><div class='add'>+		vin-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_avdd_2v8: regulator-cam-avdd-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pca9670 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "cam-avdd-2v8";</div><div class='add'>+		vin-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_dovdd_1v8: regulator-cam-dovdd-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+	        gpio = &lt;&amp;pca9670 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	        regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-name = "cam-dovdd-1v8";</div><div class='add'>+	        vin-supply = &lt;&amp;vcc1v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_dvdd_1v2: regulator-cam-dvdd-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pca9670 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-name = "cam-dvdd-1v2";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_video: regulator-vcc1v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vcc1v8-video";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc2v8_video: regulator-vcc2v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "vcc2v8-video";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	video-adapter-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		video-adapter-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9670 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "video-adapter-led";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cif_clkout_m0 {</div><div class='add'>+	rockchip,pins =</div><div class='add'>+		&lt;2 RK_PB3 1 &amp;pcfg_pull_none_12ma&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3148w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc1v8_video&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	/* OV5675, GT911, DW9714 are limited to 400KHz */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	focus: focus@c {</div><div class='add'>+		compatible = "dongwoon,dw9714";</div><div class='add'>+		reg = &lt;0xc&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;cam_afvdd_2v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9670: gpio@27 {</div><div class='add'>+		compatible = "nxp,pca9670";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pca9670_resetn&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	camera@36 {</div><div class='add'>+		compatible = "ovti,ov5675";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+		/* Only parent to get exactly 19.2MHz */</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru USB480M&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;cam_avdd_2v8&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;cam_dvdd_1v2&gt;;</div><div class='add'>+		dovdd-supply = &lt;&amp;cam_dovdd_1v8&gt;;</div><div class='add'>+		lens-focus = &lt;&amp;focus&gt;;</div><div class='add'>+		orientation = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cif_clkout_m0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rotation = &lt;180&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			cam_out: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;450000000&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_in_cam&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp_in {</div><div class='add'>+	mipi_in_cam: endpoint {</div><div class='add'>+		data-lanes = &lt;1 2&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;cam_out&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pca9670 {</div><div class='add'>+		pca9670_resetn: pca9670-resetn {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch {</div><div class='add'>+		touch_int: touch-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts<br/>index ae398acdcf45..91cf4cd3fae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts</a></div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 		clock-frequency = &lt;24576000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_baseboard: vcc3v3-baseboard-regulator {</div><div class='add'>+	vcc3v3_baseboard: regulator-vcc3v3-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_baseboard: vcc5v0-baseboard-regulator {</div><div class='add'>+	vcc5v0_baseboard: regulator-vcc5v0-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdda_codec: vdda-codec-regulator {</div><div class='add'>+	vdda_codec: regulator-vdda-codec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdda_codec";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -128,7 +128,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_baseboard&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vddd_codec: vddd-codec-regulator {</div><div class='add'>+	vddd_codec: regulator-vddd-codec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vddd_codec";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -154,6 +154,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='ctx'> 	eeprom@50 {</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='ctx'> 		compatible = "atmel,24c01";</div><div class='hunk'>@@ -194,6 +196,13 @@</div><div class='ctx'> 			  &lt;3 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	uart {</div><div class='add'>+		uart5_rts_pin: uart5-rts-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			  &lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm0 {</div><div class='hunk'>@@ -222,11 +231,15 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart5 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart5_xfer&gt;;</div><div class='add'>+	/* Add pinmux for rts-gpios (uart5_rts_pin) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_xfer &amp;uart5_rts_pin&gt;;</div><div class='ctx'> 	rts-gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi<br/>index bb1aea82e666..4203b335a263 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi</a></div><div class='hunk'>@@ -9,12 +9,19 @@</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		i2c10 = &amp;i2c10;</div><div class='ctx'> 		mmc0 = &amp;emmc;</div><div class='ctx'> 		mmc1 = &amp;sdio;</div><div class='ctx'> 		rtc0 = &amp;rtc_twi;</div><div class='ctx'> 		rtc1 = &amp;rk809;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */</div><div class='add'>+	attiny-updi-gate-regulator {</div><div class='add'>+		compatible = "regulator-output";</div><div class='add'>+		vout-supply = &lt;&amp;vg_attiny_updi&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	emmc_pwrseq: emmc-pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-emmc";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;emmc_reset&gt;;</div><div class='hunk'>@@ -36,7 +43,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vccsys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -66,7 +73,6 @@</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	mmc-hs200-1_8v;</div><div class='del'>-	supports-emmc;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;emmc_pwrseq&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='hunk'>@@ -77,9 +83,7 @@</div><div class='ctx'> </div><div class='ctx'> /* On-module TI DP83825I PHY but no connector, enable in carrierboard */</div><div class='ctx'> &amp;gmac {</div><div class='del'>-	snps,reset-gpio = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	snps,reset-active-low;</div><div class='del'>-	snps,reset-delays-us = &lt;0 50000 50000&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;dp83825&gt;;</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	clock_in_out = "output";</div><div class='ctx'> };</div><div class='hunk'>@@ -127,7 +131,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k";</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -281,6 +285,11 @@</div><div class='ctx'> 					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			/* supplies the gate of the ATtiny UPDI pass FET */</div><div class='add'>+			vg_attiny_updi: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "vg_attiny_updi";</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -292,19 +301,26 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	fan: fan@18 {</div><div class='del'>-		compatible = "ti,amc6821";</div><div class='add'>+		compatible = "tsd,mule", "ti,amc6821";</div><div class='ctx'> 		reg = &lt;0x18&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	rtc_twi: rtc@6f {</div><div class='del'>-		compatible = "isil,isl1208";</div><div class='del'>-		reg = &lt;0x6f&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='add'>+		i2c-mux {</div><div class='add'>+			compatible = "tsd,mule-i2c-mux";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-&amp;i2c3 {</div><div class='del'>-	status = "okay";</div><div class='add'>+			i2c10: i2c@0 {</div><div class='add'>+				reg = &lt;0x0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				rtc_twi: rtc@6f {</div><div class='add'>+					compatible = "isil,isl1208";</div><div class='add'>+					reg = &lt;0x6f&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2s0_8ch {</div><div class='hunk'>@@ -326,6 +342,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mdio {</div><div class='add'>+	dp83825: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;phy_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;50000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	emmc {</div><div class='ctx'> 		emmc_reset: emmc-reset {</div><div class='hunk'>@@ -333,6 +361,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ethernet {</div><div class='add'>+		phy_rst: phy-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		module_led_pin: module-led-pin {</div><div class='ctx'> 			rockchip,pins = &lt;1 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -345,6 +379,18 @@</div><div class='ctx'> 				&lt;0 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	spi1 {</div><div class='add'>+		spi1_csn0_gpio_pin: spi1-csn0-gpio-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up_4ma&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1_csn1_gpio_pin: spi1-csn1-gpio-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_up_4ma&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pmu_io_domains {</div><div class='hunk'>@@ -362,6 +408,17 @@</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spi1 {</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware CS has a very slow rise time of about 6us,</div><div class='add'>+	 * causing transmission errors.</div><div class='add'>+	 * With cs-gpios we have a rise time of about 20ns.</div><div class='add'>+	 */</div><div class='add'>+	cs-gpios = &lt;&amp;gpio3 RK_PB1 GPIO_ACTIVE_LOW&gt;, &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1_clk &amp;spi1_csn0_gpio_pin &amp;spi1_csn1_gpio_pin &amp;spi1_miso &amp;spi1_mosi&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tsadc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -374,6 +431,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart5 {</div><div class='add'>+	/delete-property/ dmas;</div><div class='add'>+	/delete-property/ dma-names;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Mule UCAN */</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi<br/>index 9137dd76e72c..46f64cd33b9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/px30.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/px30.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/px30.dtsi</a></div><div class='hunk'>@@ -351,8 +351,6 @@</div><div class='ctx'> 	pmugrf: syscon@ff010000 {</div><div class='ctx'> 		compatible = "rockchip,px30-pmugrf", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x0 0xff010000 0x0 0x1000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		pmu_io_domains: io-domains {</div><div class='ctx'> 			compatible = "rockchip,px30-pmu-io-voltage-domain";</div><div class='hunk'>@@ -453,8 +451,6 @@</div><div class='ctx'> 	grf: syscon@ff140000 {</div><div class='ctx'> 		compatible = "rockchip,px30-grf", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0x0 0xff140000 0x0 0x1000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		io_domains: io-domains {</div><div class='ctx'> 			compatible = "rockchip,px30-io-voltage-domain";</div><div class='hunk'>@@ -985,6 +981,12 @@</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_GMAC_A&gt;;</div><div class='ctx'> 		reset-names = "stmmaceth";</div><div class='ctx'> 		status = "disabled";</div><div class='add'>+</div><div class='add'>+		mdio: mdio {</div><div class='add'>+			compatible = "snps,dwmac-mdio";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdmmc: mmc@ff370000 {</div><div class='hunk'>@@ -1131,8 +1133,6 @@</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_MIPIDSI_HOST_P&gt;;</div><div class='ctx'> 		reset-names = "apb";</div><div class='ctx'> 		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='hunk'>@@ -1263,10 +1263,8 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			port@0 {</div><div class='add'>+			isp_in: port@0 {</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts<br/>new file mode 100644<br/>index 000000000000..2f7b09b7f43f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-bpi-p2-pro.dts</a></div><div class='hunk'>@@ -0,0 +1,362 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3308.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Banana Pi P2 Pro (RK3308) Board";</div><div class='add'>+	compatible = "sinovoip,rk3308-bpi-p2pro", "rockchip,rk3308";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac;</div><div class='add'>+		mmc0 = &amp;emmc;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;10000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "rockchip,rk3308";</div><div class='add'>+</div><div class='add'>+		dais = &lt;&amp;i2s_8ch_2_p0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;phone_ctl&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_en0&gt;, &lt;&amp;led_en1&gt;;</div><div class='add'>+</div><div class='add'>+		blue-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "blue:power";</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		green-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "green:heartbeat";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_log: regulator-1v04-vdd-log {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_log";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1040000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1040000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-1v5-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-1v8-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_io: regulator-3v3-vcc-io {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_io";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_in&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_in: regulator-5v0-vcc-in {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_in";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_core: regulator-vdd-core {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc_in&gt;;</div><div class='add'>+		regulator-name = "vdd_core";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;827000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1340000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		codec_p0_0: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;i2s_8ch_2_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_core&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_pwren&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_MAC&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;mac_clkin&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-handle = &lt;&amp;rtl8201f&gt;;</div><div class='add'>+	phy-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		rtl8201f: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mac_rst&gt;;</div><div class='add'>+			reset-assert-us = &lt;50000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio0 RK_PA7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s_8ch_2 {</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s_8ch_2_p0: port {</div><div class='add'>+		i2s_8ch_2_p0_0: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;codec_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	vccio0-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_32k&gt;;</div><div class='add'>+</div><div class='add'>+	bt {</div><div class='add'>+		bt_reg_on: bt-reg-on {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt: host-wake-bt {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac {</div><div class='add'>+		mac_rst: mac-rst {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_en0: led-en0 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_en1: led-en1 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		phone_ctl: phone-ctl {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_reg_on: wifi-reg-on {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_wake_host: wifi-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_pin_pull_down&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* WIFI part of the AP6256 connected with SDIO */</div><div class='add'>+&amp;sdio {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ap6256: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_wake_host&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* BT part of the AP6256 connected with UART */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_RTC32K&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio4 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;1500000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on &amp;bt_wake_host &amp;host_wake_bt&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb.dts<br/>index 184b84fdde07..3f1aafe2dc13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-evb.dts</a></div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_sdio: vcc_1v8: vcc-1v8 {</div><div class='add'>+	vccio_sdio: vcc_1v8: regulator-vcc-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_ddr: vcc-ddr {</div><div class='add'>+	vcc_ddr: regulator-vcc-ddr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_ddr";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_flash: vccio-flash {</div><div class='add'>+	vccio_flash: regulator-vccio-flash {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_flash";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_core: vdd-core {</div><div class='add'>+	vdd_core: regulator-vdd-core {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='ctx'> 		regulator-name = "vdd_core";</div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1050000&gt;;</div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_1v0: vdd-1v0 {</div><div class='add'>+	vdd_1v0: regulator-vdd-1v0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_1v0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts<br/>index 9232357f4fec..5e7181948992 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts</a></div><div class='hunk'>@@ -36,20 +36,20 @@</div><div class='ctx'> </div><div class='ctx'> 		power_led: led-0 {</div><div class='ctx'> 			label = "firefly:red:power";</div><div class='del'>-			linux,default-trigger = "ir-power-click";</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='ctx'> 			default-state = "on";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		user_led: led-1 {</div><div class='ctx'> 			label = "firefly:blue:user";</div><div class='del'>-			linux,default-trigger = "ir-user-click";</div><div class='add'>+			linux,default-trigger = "rc-feedback";</div><div class='ctx'> 			default-state = "off";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	typec_vcc5v: typec-vcc5v {</div><div class='add'>+	typec_vcc5v: regulator-typec-vcc5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "typec_vcc5v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;typec_vcc5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: vcc-sd {</div><div class='add'>+	vcc_sd: regulator-vcc-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		regulator-name = "vcc_sd";</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_core: vdd-core {</div><div class='add'>+	vdd_core: regulator-vdd-core {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='ctx'> 		regulator-name = "vdd_core";</div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1050000&gt;;</div><div class='hunk'>@@ -147,7 +147,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm5 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	pinctrl-names = "active";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm5_pin_pull_down&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts<br/>index 62d18ca769a1..7a32972bc249 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts</a></div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v8: vcc-1v8 {</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_ddr: vcc-ddr {</div><div class='add'>+	vcc_ddr: regulator-vcc-ddr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_ddr";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_core: vdd-core {</div><div class='add'>+	vdd_core: regulator-vdd-core {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts<br/>index bd6419a5c20a..8311af4c8689 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-rock-s0.dts</a></div><div class='hunk'>@@ -74,6 +74,23 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * HW revision prior to v1.2 must pull GPIO4_D6 low to access sdmmc.</div><div class='add'>+	 * This is modeled as an always-on active low fixed regulator.</div><div class='add'>+	 */</div><div class='add'>+	vcc_sd: regulator-3v3-vcc-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_2030&gt;;</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='hunk'>@@ -181,6 +198,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc_2030: sdmmc-2030 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wifi {</div><div class='ctx'> 		wifi_reg_on: wifi-reg-on {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -233,7 +256,7 @@</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='ctx'> 	disable-wp;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts b/arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts<br/>new file mode 100644<br/>index 000000000000..e5e6b800c2d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2019 Akash Gajjar &lt;akash@openedev.com&gt;</div><div class='add'>+ * Copyright (c) 2019 Jagan Teki &lt;jagan@openedev.com&gt;</div><div class='add'>+ * Copyright (C) 2024 TheSnowfield &lt;thesnowfield@sakurapi.org&gt;</div><div class='add'>+ * Copyright (C) 2025 Hsun Lai &lt;i@chainsx.cn&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "rk3308.dtsi"</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sakura Pi RK3308B";</div><div class='add'>+	compatible = "sakurapi,rk3308-sakurapi-rk3308b", "rockchip,rk3308";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;emmc;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_core: regulator-vdd-core {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='add'>+		regulator-name = "vdd_core";</div><div class='add'>+		regulator-min-microvolt = &lt;827000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1340000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_log";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_io";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_phy: regulator-vcc-phy-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_phy";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;otg_vbus_drv&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_otg";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		/*</div><div class='add'>+		 * On the module itself this is one of these (depending</div><div class='add'>+		 * on the actual card populated):</div><div class='add'>+		 * - SDIO_RESET_L_WL_REG_ON</div><div class='add'>+		 * - PDN (power down when low)</div><div class='add'>+		 */</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_core&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_32k&gt;;</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		bt_reg_on: bt-reg-on {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt: host-wake-bt {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio-pwrseq {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		otg_vbus_drv: otg-vbus-drv {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_host_wake: wifi-host-wake {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0_pin_pull_down&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc_clk &amp;sdmmc_cmd &amp;sdmmc_det &amp;sdmmc_bus4&gt;;</div><div class='add'>+	card-detect-delay = &lt;800&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_RTC32K&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;host_wake_bt &amp;bt_wake_host &amp;bt_reg_on&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio4 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;1500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts<br/>index c7b1862fca6a..96c27fc5005d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Power tree */</div><div class='del'>-	vccio_1v8: vccio-1v8-regulator {</div><div class='add'>+	vccio_1v8: regulator-vccio-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_1v8";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_3v3: vccio-3v3-regulator {</div><div class='add'>+	vccio_3v3: regulator-vccio-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_3v3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg_vbus: otg-vbus-regulator {</div><div class='add'>+	vcc_otg_vbus: regulator-otg-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;otg_vbus_drv&gt;;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vccio_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_arm: vdd-arm {</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm0 0 5000 1&gt;;</div><div class='ctx'> 		regulator-name = "vdd_arm";</div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm1 0 5000 1&gt;;</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='hunk'>@@ -274,13 +274,13 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm0_pin_pull_up&gt;;</div><div class='del'>-	pinctrl-names = "active";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm1_pin_pull_up&gt;;</div><div class='del'>-	pinctrl-names = "active";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi<br/>index b6d041dbed94..54395a40b087 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "rk817_int";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccsys: vccsys {</div><div class='add'>+	vccsys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v8_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -118,6 +118,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts b/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts<br/>index 579261b3a474..4d306085646c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts</a></div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='hunk'>@@ -292,7 +292,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccsys: vccsys-regulator {</div><div class='add'>+	vccsys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v8_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -322,6 +322,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	internal_display: panel@0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi<br/>index 80fc53c807a4..bf4554eff47d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi</a></div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "rk817_int";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccsys: vccsys {</div><div class='add'>+	vccsys: regulator-vccsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v8_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: vcc_host {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_host";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -220,6 +220,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-a1.dts b/arch/arm64/boot/dts/rockchip/rk3328-a1.dts<br/>index 824183e515da..30bdb38f0727 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-a1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-a1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-a1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-a1.dts</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host_5v: usb3-current-switch {</div><div class='add'>+	vcc_host_5v: regulator-usb3-current-switch {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -58,6 +58,24 @@</div><div class='ctx'> 		gpios = &lt;&amp;gpio2 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		linux,rc-map-name = "rc-beelink-gs1";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	spdif_dit: spdif-dit {</div><div class='add'>+		compatible = "linux,spdif-dit";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_sound: spdif-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "SPDIF";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;spdif&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;spdif_dit&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;analog_sound {</div><div class='hunk'>@@ -110,7 +128,6 @@</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	snps,aal;</div><div class='ctx'> 	snps,pbl = &lt;0x4&gt;;</div><div class='ctx'> 	tx_delay = &lt;0x26&gt;;</div><div class='ctx'> 	rx_delay = &lt;0x11&gt;;</div><div class='hunk'>@@ -159,7 +176,7 @@</div><div class='ctx'> 		interrupts = &lt;RK_PA6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -326,6 +343,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spdif {</div><div class='add'>+	pinctrl-0 = &lt;&amp;spdifm0_tx&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tsadc {</div><div class='ctx'> 	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='ctx'> 	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='hunk'>@@ -359,6 +381,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdrd3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;vop {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts<br/>index 1eef5504445f..3707df6acf1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-evb.dts</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio1 18 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 30 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi<br/>new file mode 100644<br/>index 000000000000..691d17022afb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,393 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 David Bauer &lt;mail@david-bauer.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "rk3328.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac2io;</div><div class='add'>+		ethernet1 = &amp;rtl8153;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_clk: gmac-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		clock-output-names = "gmac_clkin";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;reset_button_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		key-reset {</div><div class='add'>+			label = "reset";</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_led_pin&gt;,  &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		lan_led: led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "nanopi-r2s:green:lan";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led: led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "nanopi-r2s:red:sys";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led: led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "nanopi-r2s:green:wan";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_io_sdio: regulator-sdmmcio {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdio_vcc_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "vcc_io_sdio";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-settling-time-us = &lt;5000&gt;;</div><div class='add'>+		regulator-type = "voltage";</div><div class='add'>+		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;,</div><div class='add'>+			 &lt;3300000 0x0&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v: regulator-vdd-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v_lan: regulator-vdd-5v-lan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_vdd_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "vdd_5v_lan";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;gmac_clk&gt;, &lt;&amp;gmac_clk&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk805: pmic@18 {</div><div class='add'>+		compatible = "rockchip,rk805";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_log: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_log";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_io_33: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc_io_33";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_18: LDO_REG1 {</div><div class='add'>+				regulator-name = "vcc_18";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc18_emmc: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc18_emmc";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_10: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdd_10";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	pmuio-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_io_sdio&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_18&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	button {</div><div class='add'>+		reset_button_pin: reset-button-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac2io {</div><div class='add'>+		eth_phy_reset_pin: eth-phy-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		lan_led_pin: lan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_pin: wan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lan {</div><div class='add'>+		lan_vdd_pin: lan-vdd-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd {</div><div class='add'>+		sdio_vcc_pin: sdio-vcc-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_clk&gt;, &lt;&amp;sdmmc0_cmd&gt;, &lt;&amp;sdmmc0_dectn&gt;, &lt;&amp;sdmmc0_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_io_sdio&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* Second port is for USB 3.0 */</div><div class='add'>+	rtl8153: device@2 {</div><div class='add'>+		compatible = "usbbda,8153";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts<br/>index 16a1958e4572..3709ba30bbd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts</a></div><div class='hunk'>@@ -7,7 +7,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3328-nanopi-r2c.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3328-nanopi-r2c.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R2C Plus";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts<br/>index a07a26b944a0..e8ab773dc245 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts</a></div><div class='hunk'>@@ -7,34 +7,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3328-nanopi-r2s.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3328-nanopi-r2c.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R2C";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;gmac2io {</div><div class='del'>-	phy-handle = &lt;&amp;yt8521s&gt;;</div><div class='del'>-	tx_delay = &lt;0x22&gt;;</div><div class='del'>-	rx_delay = &lt;0x12&gt;;</div><div class='del'>-</div><div class='del'>-	mdio {</div><div class='del'>-		/delete-node/ ethernet-phy@1;</div><div class='del'>-</div><div class='del'>-		yt8521s: ethernet-phy@3 {</div><div class='del'>-			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='del'>-			reg = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-			motorcomm,clk-out-frequency-hz = &lt;125000000&gt;;</div><div class='del'>-			motorcomm,keep-pll-enabled;</div><div class='del'>-			motorcomm,auto-sleep-disabled;</div><div class='del'>-</div><div class='del'>-			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			reset-assert-us = &lt;10000&gt;;</div><div class='del'>-			reset-deassert-us = &lt;50000&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi<br/>new file mode 100644<br/>index 000000000000..3b0457de2a98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * (http://www.friendlyarm.com)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2021-2023 Tianling Shen &lt;cnsztl@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3328-nanopi-r2.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	phy-handle = &lt;&amp;yt8521s&gt;;</div><div class='add'>+	tx_delay = &lt;0x22&gt;;</div><div class='add'>+	rx_delay = &lt;0x12&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		yt8521s: ethernet-phy@3 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			motorcomm,clk-out-frequency-hz = &lt;125000000&gt;;</div><div class='add'>+			motorcomm,keep-pll-enabled;</div><div class='add'>+			motorcomm,auto-sleep-disabled;</div><div class='add'>+</div><div class='add'>+			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts<br/>index cb81ba3f23ff..f72b1518c14f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts</a></div><div class='hunk'>@@ -7,7 +7,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3328-nanopi-r2s.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3328-nanopi-r2s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";</div><div class='hunk'>@@ -24,9 +25,24 @@</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	mmc-hs200-1_8v;</div><div class='ctx'> 	non-removable;</div><div class='del'>-	num-slots = &lt;1&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_clk &amp;emmc_cmd &amp;emmc_bus8&gt;;</div><div class='del'>-	supports-emmc;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	phy-handle = &lt;&amp;rtl8211e&gt;;</div><div class='add'>+	tx_delay = &lt;0x24&gt;;</div><div class='add'>+	rx_delay = &lt;0x18&gt;;</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		rtl8211e: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts<br/>index a4399da7d8b1..8579f22a1942 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts</a></div><div class='hunk'>@@ -5,406 +5,9 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include "rk3328.dtsi"</div><div class='add'>+#include "rk3328-nanopi-r2s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R2S";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac2io;</div><div class='del'>-		ethernet1 = &amp;rtl8153;</div><div class='del'>-		mmc0 = &amp;sdmmc;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac_clk: gmac-clock {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;125000000&gt;;</div><div class='del'>-		clock-output-names = "gmac_clkin";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		pinctrl-0 = &lt;&amp;reset_button_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		key-reset {</div><div class='del'>-			label = "reset";</div><div class='del'>-			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			linux,code = &lt;KEY_RESTART&gt;;</div><div class='del'>-			debounce-interval = &lt;50&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan_led_pin&gt;,  &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		lan_led: led-0 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "nanopi-r2s:green:lan";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sys_led: led-1 {</div><div class='del'>-			gpios = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "nanopi-r2s:red:sys";</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led: led-2 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "nanopi-r2s:green:wan";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_io_sdio: sdmmcio-regulator {</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio1 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdio_vcc_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		regulator-name = "vcc_io_sdio";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-settling-time-us = &lt;5000&gt;;</div><div class='del'>-		regulator-type = "voltage";</div><div class='del'>-		startup-delay-us = &lt;2000&gt;;</div><div class='del'>-		states = &lt;1800000 0x1&gt;,</div><div class='del'>-			 &lt;3300000 0x0&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		regulator-name = "vcc_sd";</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_5v: vdd-5v {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_5v";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_5v_lan: vdd-5v-lan {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan_vdd_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		regulator-name = "vdd_5v_lan";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;display_subsystem {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmac2io {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;gmac_clk&gt;, &lt;&amp;gmac_clk&gt;;</div><div class='del'>-	clock_in_out = "input";</div><div class='del'>-	phy-handle = &lt;&amp;rtl8211e&gt;;</div><div class='del'>-	phy-mode = "rgmii";</div><div class='del'>-	phy-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	rx_delay = &lt;0x18&gt;;</div><div class='del'>-	snps,aal;</div><div class='del'>-	tx_delay = &lt;0x24&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mdio {</div><div class='del'>-		compatible = "snps,dwmac-mdio";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		rtl8211e: ethernet-phy@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			reset-assert-us = &lt;10000&gt;;</div><div class='del'>-			reset-deassert-us = &lt;50000&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	rk805: pmic@18 {</div><div class='del'>-		compatible = "rockchip,rk805";</div><div class='del'>-		reg = &lt;0x18&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		rockchip,system-power-controller;</div><div class='del'>-		wakeup-source;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_log: DCDC_REG1 {</div><div class='del'>-				regulator-name = "vdd_log";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_arm: DCDC_REG2 {</div><div class='del'>-				regulator-name = "vdd_arm";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_ddr: DCDC_REG3 {</div><div class='del'>-				regulator-name = "vcc_ddr";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_io_33: DCDC_REG4 {</div><div class='del'>-				regulator-name = "vcc_io_33";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_18: LDO_REG1 {</div><div class='del'>-				regulator-name = "vcc_18";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc18_emmc: LDO_REG2 {</div><div class='del'>-				regulator-name = "vcc18_emmc";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_10: LDO_REG3 {</div><div class='del'>-				regulator-name = "vdd_10";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;io_domains {</div><div class='del'>-	pmuio-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	vccio1-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='del'>-	vccio3-supply = &lt;&amp;vcc_io_sdio&gt;;</div><div class='del'>-	vccio4-supply = &lt;&amp;vcc_18&gt;;</div><div class='del'>-	vccio5-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	vccio6-supply = &lt;&amp;vcc_io_33&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	button {</div><div class='del'>-		reset_button_pin: reset-button-pin {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac2io {</div><div class='del'>-		eth_phy_reset_pin: eth-phy-reset-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		lan_led_pin: lan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sys_led_pin: sys-led-pin {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led_pin: wan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	lan {</div><div class='del'>-		lan_vdd_pin: lan-vdd-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmic {</div><div class='del'>-		pmic_int_l: pmic-int-l {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sd {</div><div class='del'>-		sdio_vcc_pin: sdio-vcc-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pwm2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	disable-wp;</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdmmc0_clk&gt;, &lt;&amp;sdmmc0_cmd&gt;, &lt;&amp;sdmmc0_dectn&gt;, &lt;&amp;sdmmc0_bus4&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	sd-uhs-sdr12;</div><div class='del'>-	sd-uhs-sdr25;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vcc_io_sdio&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsadc {</div><div class='del'>-	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='del'>-	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_host {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb20_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	/* Second port is for USB 3.0 */</div><div class='del'>-	rtl8153: device@2 {</div><div class='del'>-		compatible = "usbbda,8153";</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi<br/>new file mode 100644<br/>index 000000000000..308e526c2861<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * (http://www.friendlyarm.com)</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3328-nanopi-r2.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	phy-handle = &lt;&amp;rtl8211e&gt;;</div><div class='add'>+	tx_delay = &lt;0x24&gt;;</div><div class='add'>+	rx_delay = &lt;0x18&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		rtl8211e: ethernet-phy@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;50000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts<br/>index 4237f2ee8fee..ec2ce894da1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts</a></div><div class='hunk'>@@ -7,7 +7,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3328-orangepi-r1-plus.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3328-orangepi-r1-plus.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Xunlong Orange Pi R1 Plus LTS";</div><div class='hunk'>@@ -16,12 +17,10 @@</div><div class='ctx'> </div><div class='ctx'> &amp;gmac2io {</div><div class='ctx'> 	phy-handle = &lt;&amp;yt8531c&gt;;</div><div class='del'>-	tx_delay = &lt;0x19&gt;;</div><div class='del'>-	rx_delay = &lt;0x05&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='del'>-		/delete-node/ ethernet-phy@1;</div><div class='del'>-</div><div class='ctx'> 		yt8531c: ethernet-phy@0 {</div><div class='ctx'> 			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts<br/>index f20662929c77..846b931e16d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts</a></div><div class='hunk'>@@ -6,127 +6,21 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include "rk3328.dtsi"</div><div class='add'>+#include "rk3328-orangepi-r1-plus.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Xunlong Orange Pi R1 Plus";</div><div class='ctx'> 	compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac2io;</div><div class='del'>-		ethernet1 = &amp;rtl8153;</div><div class='del'>-		mmc0 = &amp;sdmmc;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac_clk: gmac-clock {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;125000000&gt;;</div><div class='del'>-		clock-output-names = "gmac_clkin";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan_led_pin&gt;, &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		led-0 {</div><div class='del'>-			function = LED_FUNCTION_LAN;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-1 {</div><div class='del'>-			function = LED_FUNCTION_STATUS;</div><div class='del'>-			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio3 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-2 {</div><div class='del'>-			function = LED_FUNCTION_WAN;</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio2 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		regulator-name = "vcc_sd";</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_5v_lan: vdd-5v-lan-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan_vdd_pin&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		regulator-name = "vdd_5v_lan";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;display_subsystem {</div><div class='del'>-	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac2io {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;gmac_clk&gt;, &lt;&amp;gmac_clk&gt;;</div><div class='del'>-	clock_in_out = "input";</div><div class='ctx'> 	phy-handle = &lt;&amp;rtl8211e&gt;;</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='del'>-	phy-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	snps,aal;</div><div class='del'>-	rx_delay = &lt;0x18&gt;;</div><div class='ctx'> 	tx_delay = &lt;0x24&gt;;</div><div class='add'>+	rx_delay = &lt;0x18&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='del'>-		compatible = "snps,dwmac-mdio";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'> 		rtl8211e: ethernet-phy@1 {</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='hunk'>@@ -137,238 +31,3 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	rk805: pmic@18 {</div><div class='del'>-		compatible = "rockchip,rk805";</div><div class='del'>-		reg = &lt;0x18&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		rockchip,system-power-controller;</div><div class='del'>-		wakeup-source;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_log: DCDC_REG1 {</div><div class='del'>-				regulator-name = "vdd_log";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_arm: DCDC_REG2 {</div><div class='del'>-				regulator-name = "vdd_arm";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_ddr: DCDC_REG3 {</div><div class='del'>-				regulator-name = "vcc_ddr";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_io: DCDC_REG4 {</div><div class='del'>-				regulator-name = "vcc_io";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_18: LDO_REG1 {</div><div class='del'>-				regulator-name = "vcc_18";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc18_emmc: LDO_REG2 {</div><div class='del'>-				regulator-name = "vcc18_emmc";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_10: LDO_REG3 {</div><div class='del'>-				regulator-name = "vdd_10";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;io_domains {</div><div class='del'>-	pmuio-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio1-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='del'>-	vccio3-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio4-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio5-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio6-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	gmac2io {</div><div class='del'>-		eth_phy_reset_pin: eth-phy-reset-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		lan_led_pin: lan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sys_led_pin: sys-led-pin {</div><div class='del'>-			rockchip,pins = &lt;3 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led_pin: wan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	lan {</div><div class='del'>-		lan_vdd_pin: lan-vdd-pin {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmic {</div><div class='del'>-		pmic_int_l: pmic-int-l {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pwm2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	disable-wp;</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdmmc0_clk&gt;, &lt;&amp;sdmmc0_cmd&gt;, &lt;&amp;sdmmc0_dectn&gt;, &lt;&amp;sdmmc0_bus4&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsadc {</div><div class='del'>-	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='del'>-	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_host {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb20_otg {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	/* Second port is for USB 3.0 */</div><div class='del'>-	rtl8153: device@2 {</div><div class='del'>-		compatible = "usbbda,8153";</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi<br/>new file mode 100644<br/>index 000000000000..09508e324a28<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi</a></div><div class='hunk'>@@ -0,0 +1,356 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Based on rk3328-nanopi-r2s.dts, which is:</div><div class='add'>+ *   Copyright (c) 2020 David Bauer &lt;mail@david-bauer.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3328.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac2io;</div><div class='add'>+		ethernet1 = &amp;rtl8153;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_clk: gmac-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		clock-output-names = "gmac_clkin";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_led_pin&gt;, &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v_lan: regulator-vdd-5v-lan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_vdd_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "vdd_5v_lan";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;display_subsystem {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;gmac_clk&gt;, &lt;&amp;gmac_clk&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk805: pmic@18 {</div><div class='add'>+		compatible = "rockchip,rk805";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_log: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_log";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_io: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc_io";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_18: LDO_REG1 {</div><div class='add'>+				regulator-name = "vcc_18";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc18_emmc: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc18_emmc";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_10: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdd_10";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	pmuio-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gmac2io {</div><div class='add'>+		eth_phy_reset_pin: eth-phy-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		lan_led_pin: lan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_pin: wan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lan {</div><div class='add'>+		lan_vdd_pin: lan-vdd-pin {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_clk&gt;, &lt;&amp;sdmmc0_cmd&gt;, &lt;&amp;sdmmc0_dectn&gt;, &lt;&amp;sdmmc0_bus4&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;0&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* Second port is for USB 3.0 */</div><div class='add'>+	rtl8153: device@2 {</div><div class='add'>+		compatible = "usbbda,8153";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts<br/>index 414897a57e75..1ea4b2a95a09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts</a></div><div class='hunk'>@@ -4,381 +4,24 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3328.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "rk3328-roc.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	model = "Firefly roc-rk3328-cc";</div><div class='add'>+	model = "Firefly ROC-RK3328-CC";</div><div class='ctx'> 	compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac2io;</div><div class='del'>-		mmc0 = &amp;sdmmc;</div><div class='del'>-		mmc1 = &amp;emmc;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac_clkin: external-gmac-clock {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		clock-frequency = &lt;125000000&gt;;</div><div class='del'>-		clock-output-names = "gmac_clkin";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dc_12v: dc-12v {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "dc_12v";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-name = "vcc_sd";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sdio: sdmmcio-regulator {</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='del'>-		gpios = &lt;&amp;grf_gpio 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		states = &lt;1800000 0x1&gt;,</div><div class='del'>-			 &lt;3300000 0x0&gt;;</div><div class='del'>-		regulator-name = "vcc_sdio";</div><div class='del'>-		regulator-type = "voltage";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;usb20_host_drv&gt;;</div><div class='del'>-		regulator-name = "vcc_host1_5v";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_phy";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		power_led: led-0 {</div><div class='del'>-			label = "firefly:blue:power";</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-			gpios = &lt;&amp;rk805 1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		user_led: led-1 {</div><div class='del'>-			label = "firefly:yellow:user";</div><div class='del'>-			linux,default-trigger = "mmc1";</div><div class='del'>-			gpios = &lt;&amp;rk805 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			default-state = "off";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;analog_sound {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;codec {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;emmc {</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	mmc-ddr-1_8v;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	non-removable;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;emmc_clk &amp;emmc_cmd &amp;emmc_bus8&gt;;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmac2io {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;gmac_clkin&gt;, &lt;&amp;gmac_clkin&gt;;</div><div class='del'>-	clock_in_out = "input";</div><div class='del'>-	phy-supply = &lt;&amp;vcc_phy&gt;;</div><div class='del'>-	phy-mode = "rgmii";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	snps,aal;</div><div class='del'>-	snps,reset-gpio = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	snps,reset-active-low;</div><div class='del'>-	snps,reset-delays-us = &lt;0 10000 50000&gt;;</div><div class='del'>-	snps,rxpbl = &lt;0x4&gt;;</div><div class='del'>-	snps,txpbl = &lt;0x4&gt;;</div><div class='del'>-	tx_delay = &lt;0x24&gt;;</div><div class='del'>-	rx_delay = &lt;0x18&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hdmi {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hdmiphy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;hdmi_sound {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	rk805: pmic@18 {</div><div class='del'>-		compatible = "rockchip,rk805";</div><div class='del'>-		reg = &lt;0x18&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='del'>-		wakeup-source;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_logic: DCDC_REG1 {</div><div class='del'>-				regulator-name = "vdd_logic";</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_arm: DCDC_REG2 {</div><div class='del'>-				regulator-name = "vdd_arm";</div><div class='del'>-				regulator-min-microvolt = &lt;712500&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_ddr: DCDC_REG3 {</div><div class='del'>-				regulator-name = "vcc_ddr";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_io: DCDC_REG4 {</div><div class='del'>-				regulator-name = "vcc_io";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_18: LDO_REG1 {</div><div class='del'>-				regulator-name = "vcc_18";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc18_emmc: LDO_REG2 {</div><div class='del'>-				regulator-name = "vcc18_emmc";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_10: LDO_REG3 {</div><div class='del'>-				regulator-name = "vdd_10";</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2s0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2s1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;io_domains {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vccio1-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='del'>-	vccio3-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='del'>-	vccio4-supply = &lt;&amp;vcc_18&gt;;</div><div class='del'>-	vccio5-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	vccio6-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-	pmuio-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	pmic {</div><div class='del'>-		pmic_int_l: pmic-int-l {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb2 {</div><div class='del'>-		usb20_host_drv: usb20-host-drv {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	disable-wp;</div><div class='del'>-	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_dectn &amp;sdmmc0_bus4&gt;;</div><div class='del'>-	sd-uhs-sdr12;</div><div class='del'>-	sd-uhs-sdr25;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsadc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_host {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb20_otg {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd3 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;rk805 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+	interrupts = &lt;24 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;vop {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vcc_host1_5v {</div><div class='add'>+	gpio = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;vop_mmu {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vcc_sdio {</div><div class='add'>+	gpios = &lt;&amp;grf_gpio 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts<br/>index e3e3984d01d4..c0b7b98ff788 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-roc-pc.dts</a></div><div class='hunk'>@@ -4,8 +4,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-</div><div class='del'>-#include "rk3328-roc-cc.dts"</div><div class='add'>+#include "rk3328-roc.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Firefly ROC-RK3328-PC";</div><div class='hunk'>@@ -45,10 +44,6 @@</div><div class='ctx'> 	mute-gpios = &lt;&amp;grf_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;gpu {</div><div class='del'>-	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	ir {</div><div class='ctx'> 		ir_int: ir-int {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi<br/>new file mode 100644<br/>index 000000000000..7d62a3e96b19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,394 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3328.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac2io;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+		mmc1 = &amp;emmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac_clkin: external-gmac-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		clock-output-names = "gmac_clkin";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dc_12v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc0m1_pin&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sdio: regulator-sdmmcio {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		states = &lt;1800000 0x1&gt;, &lt;3300000 0x0&gt;;</div><div class='add'>+		regulator-name = "vcc_sdio";</div><div class='add'>+		regulator-type = "voltage";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_host1_5v: vcc_otg_5v: regulator-vcc-host1-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb20_host_drv&gt;;</div><div class='add'>+		regulator-name = "vcc_host1_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_phy";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;ir_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		power_led: led-0 {</div><div class='add'>+			label = "firefly:blue:power";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			gpios = &lt;&amp;rk805 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user_led: led-1 {</div><div class='add'>+			label = "firefly:yellow:user";</div><div class='add'>+			linux,default-trigger = "mmc1";</div><div class='add'>+			gpios = &lt;&amp;rk805 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;analog_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;codec {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_clk &amp;emmc_cmd &amp;emmc_bus8&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac2io {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_MAC2IO&gt;, &lt;&amp;cru SCLK_MAC2IO_EXT&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;gmac_clkin&gt;, &lt;&amp;gmac_clkin&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='add'>+	snps,aal;</div><div class='add'>+	snps,reset-gpio = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	snps,reset-active-low;</div><div class='add'>+	snps,reset-delays-us = &lt;0 10000 50000&gt;;</div><div class='add'>+	snps,rxpbl = &lt;0x4&gt;;</div><div class='add'>+	snps,txpbl = &lt;0x4&gt;;</div><div class='add'>+	tx_delay = &lt;0x24&gt;;</div><div class='add'>+	rx_delay = &lt;0x18&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmiphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk805: pmic@18 {</div><div class='add'>+		compatible = "rockchip,rk805";</div><div class='add'>+		reg = &lt;0x18&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "xin32k", "rk805-clkout2";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_arm: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_arm";</div><div class='add'>+				regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_io: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc_io";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_18: LDO_REG1 {</div><div class='add'>+				regulator-name = "vcc_18";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc18_emmc: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc18_emmc";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_10: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdd_10";</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc18_emmc&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_18&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+	pmuio-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ir {</div><div class='add'>+		ir_int: ir-int {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2 {</div><div class='add'>+		usb20_host_drv: usb20-host-drv {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_dectn &amp;sdmmc0_bus4&gt;;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_sdio&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts<br/>index 3e08e2fd0a78..a4bdd87d0729 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host_5v: vcc-host-5v-regulator {</div><div class='add'>+	vcc_host_5v: regulator-vcc-host-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_wifi: vcc-wifi-regulator {</div><div class='add'>+	vcc_wifi: regulator-vcc-wifi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -153,9 +153,6 @@</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	snps,aal;</div><div class='del'>-	snps,rxpbl = &lt;0x4&gt;;</div><div class='del'>-	snps,txpbl = &lt;0x4&gt;;</div><div class='ctx'> 	tx_delay = &lt;0x26&gt;;</div><div class='ctx'> 	rx_delay = &lt;0x11&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -249,7 +246,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -431,10 +428,18 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb20_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbdrd3 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts<br/>index 90fef766f3ae..592fd8ca21df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328-rock64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328-rock64.dts</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: sdmmc-regulator {</div><div class='add'>+	vcc_sd: regulator-sdmmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Common enable line for all of the rails mentioned in the labels */</div><div class='del'>-	vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator {</div><div class='add'>+	vcc_host_5v: vcc_host1_5v: vcc_otg_5v: regulator-vcc-host-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -144,7 +144,6 @@</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;rgmiim1_pins&gt;;</div><div class='del'>-	snps,force_thresh_dma_mode;</div><div class='ctx'> 	snps,reset-gpio = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	snps,reset-active-low;</div><div class='ctx'> 	snps,reset-delays-us = &lt;0 10000 50000&gt;;</div><div class='hunk'>@@ -153,6 +152,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hdmi {</div><div class='ctx'> 	avdd-0v9-supply = &lt;&amp;vdd_10&gt;;</div><div class='ctx'> 	avdd-1v8-supply = &lt;&amp;vcc_18&gt;;</div><div class='hunk'>@@ -181,7 +184,7 @@</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -344,6 +347,7 @@</div><div class='ctx'> </div><div class='ctx'> 		/* maximum speed for Rockchip SPI */</div><div class='ctx'> 		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi<br/>index 16b4faa22e4f..283d9cbc4368 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3328.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3328.dtsi</a></div><div class='hunk'>@@ -331,8 +331,14 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+			power-domain@RK3328_PD_GPU {</div><div class='add'>+				reg = &lt;RK3328_PD_GPU&gt;;</div><div class='add'>+				clocks = &lt;&amp;cru ACLK_GPU&gt;;</div><div class='add'>+				#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='ctx'> 			power-domain@RK3328_PD_HEVC {</div><div class='ctx'> 				reg = &lt;RK3328_PD_HEVC&gt;;</div><div class='add'>+				clocks = &lt;&amp;cru SCLK_VENC_CORE&gt;;</div><div class='ctx'> 				#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			power-domain@RK3328_PD_VIDEO {</div><div class='hunk'>@@ -569,9 +575,13 @@</div><div class='ctx'> 							 &lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 					contribution = &lt;4096&gt;;</div><div class='ctx'> 				};</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;target&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+					contribution = &lt;4096&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tsadc: tsadc@ff250000 {</div><div class='hunk'>@@ -650,7 +660,36 @@</div><div class='ctx'> 				  "ppmmu1";</div><div class='ctx'> 		clocks = &lt;&amp;cru ACLK_GPU&gt;, &lt;&amp;cru ACLK_GPU&gt;;</div><div class='ctx'> 		clock-names = "bus", "core";</div><div class='add'>+		operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3328_PD_GPU&gt;;</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_GPU_A&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-gpu {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1075000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-500000000 {</div><div class='add'>+			/* causes stability issues */</div><div class='add'>+			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	h265e_mmu: iommu@ff330200 {</div><div class='hunk'>@@ -730,11 +769,7 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		vop_out: port {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			vop_out_hdmi: endpoint@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='add'>+			vop_out_hdmi: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;hdmi_in_vop&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -754,8 +789,7 @@</div><div class='ctx'> 		compatible = "rockchip,rk3328-dw-hdmi";</div><div class='ctx'> 		reg = &lt;0x0 0xff3c0000 0x0 0x20000&gt;;</div><div class='ctx'> 		reg-io-width = &lt;4&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru PCLK_HDMI&gt;,</div><div class='ctx'> 			 &lt;&amp;cru SCLK_HDMI_SFC&gt;,</div><div class='ctx'> 			 &lt;&amp;cru SCLK_RTC32K&gt;;</div><div class='hunk'>@@ -813,8 +847,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cru: clock-controller@ff440000 {</div><div class='del'>-		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";</div><div class='add'>+		compatible = "rockchip,rk3328-cru";</div><div class='ctx'> 		reg = &lt;0x0 0xff440000 0x0 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;xin24m&gt;;</div><div class='add'>+		clock-names = "xin24m";</div><div class='ctx'> 		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		#reset-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi<br/>index e5c0dbf794ae..8662494a44d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi</a></div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* supplies both host and otg */</div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -97,7 +97,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lan: vcc-lan-regulator {</div><div class='add'>+	vcc_lan: regulator-vcc-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_lan";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts<br/>index 029b8e22e709..445ec20d6df8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;pmic_sleep&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='ctx'> 		interrupts = &lt;RK_PA5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts b/arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts<br/>index e0cc4da7f392..b9801a691b48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 	analog-sound {</div><div class='ctx'> 		compatible = "audio-graph-card";</div><div class='ctx'> 		dais = &lt;&amp;i2s_8ch_p0&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		label = "alc5640";</div><div class='ctx'> 		routing = "Mic Jack", "MICBIAS1",</div><div class='ctx'> 			  "IN1P", "Mic Jack",</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hp_det&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hub_avdd: hub-avdd-regulator {</div><div class='add'>+	hub_avdd: regulator-hub-avdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "hub_avdd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;wifi_reg_on&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-name = "vcc_host";</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lan: vcc-lan-regulator {</div><div class='add'>+	vcc_lan: regulator-vcc-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_lan";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_otg: vcc-otg-regulator {</div><div class='add'>+	vcc_otg: regulator-vcc-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-name = "vcc_otg";</div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd10_usb: vdd10-usb-regulator {</div><div class='add'>+	vdd10_usb: regulator-vdd10-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd10_usb";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='hunk'>@@ -609,7 +609,7 @@</div><div class='ctx'> </div><div class='ctx'> 	bluetooth {</div><div class='ctx'> 		compatible = "brcm,bcm4345c5";</div><div class='del'>-		interrupts-extended = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupts-extended = &lt;&amp;gpio3 RK_PA7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		interrupt-names = "host-wakeup";</div><div class='ctx'> 		clocks = &lt;&amp;rk808 RK808_CLKOUT1&gt;;</div><div class='ctx'> 		clock-names = "lpo";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts<br/>index cae01d35b93d..ab70ee5f561a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_baseboard: vcc3v3-baseboard {</div><div class='add'>+	vcc3v3_baseboard: regulator-vcc3v3-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi<br/>index 8ac8acf4082d..8ccc3184a836 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi</a></div><div class='hunk'>@@ -61,7 +61,6 @@</div><div class='ctx'> 			fan: fan@18 {</div><div class='ctx'> 				compatible = "ti,amc6821";</div><div class='ctx'> 				reg = &lt;0x18&gt;;</div><div class='del'>-				#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			rtc_twi: rtc@6f {</div><div class='hunk'>@@ -97,7 +96,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -179,7 +178,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;pmic_sleep&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts<br/>index 23ae2d9de382..abef858e7cea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts</a></div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_18: vcc18-regulator {</div><div class='add'>+	vcc_18: regulator-vcc18 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_18";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* supplies both host and otg */</div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io-regulator {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lan: vcc-lan-regulator {</div><div class='add'>+	vcc_lan: regulator-vcc-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_lan";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd: vcc-sd-regulator {</div><div class='add'>+	vcc_sd: regulator-vcc-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sd";</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_sd: vcc-io-sd-regulator {</div><div class='add'>+	vccio_sd: regulator-vcc-io-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_sd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_wl: vccio-wl-regulator {</div><div class='add'>+	vccio_wl: regulator-vccio-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_wl";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_10: vdd-10-regulator {</div><div class='add'>+	vdd_10: regulator-vdd-10 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_10";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts<br/>index 29df84b81552..5132ffe014ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		interrupts = &lt;RK_PA5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;pmic_sleep&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts<br/>index 7f14206d53c3..b73100c6d182 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3368-r88.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3368-r88.dts</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 			&lt;&amp;gpio3 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_18: vcc18-regulator {</div><div class='add'>+	vcc_18: regulator-vcc18 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_18";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* supplies both host and otg */</div><div class='del'>-	vcc_host: vcc-host-regulator {</div><div class='add'>+	vcc_host: regulator-vcc-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_io: vcc-io-regulator {</div><div class='add'>+	vcc_io: regulator-vcc-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_io";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_lan: vcc-lan-regulator {</div><div class='add'>+	vcc_lan: regulator-vcc-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_lan";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vccio_wl: vccio-wl-regulator {</div><div class='add'>+	vccio_wl: regulator-vccio-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vccio_wl";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -141,7 +141,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_io&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_10: vdd-10-regulator {</div><div class='add'>+	vdd_10: regulator-vdd-10 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_10";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi<br/>index 9d5f5b083e3c..4dcceb9136b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-base.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-base.dtsi</a></div><div class='hunk'>@@ -2071,8 +2071,6 @@</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_P_MIPI_DSI0&gt;;</div><div class='ctx'> 		reset-names = "apb";</div><div class='ctx'> 		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		ports {</div><div class='hunk'>@@ -2112,8 +2110,6 @@</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_P_MIPI_DSI1&gt;;</div><div class='ctx'> 		reset-names = "apb";</div><div class='ctx'> 		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts b/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts<br/>index 1489eb32e266..b90bf26b58be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -168,7 +168,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -188,7 +188,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -199,7 +199,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* For USB3.0 Port1/2 */</div><div class='del'>-	vcc5v0_host1: vcc5v0-host1-regulator {</div><div class='add'>+	vcc5v0_host1: regulator-vcc5v0-host1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* For USB2.0 Port1/2 */</div><div class='del'>-	vcc5v0_host3: vcc5v0-host3-regulator {</div><div class='add'>+	vcc5v0_host3: regulator-vcc5v0-host3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -222,7 +222,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec: vcc5v0-typec-regulator {</div><div class='add'>+	vcc5v0_typec: regulator-vcc5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -233,7 +233,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -309,7 +309,7 @@</div><div class='ctx'> 		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='hunk'>@@ -541,11 +541,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	rt5651: audio-codec@1a {</div><div class='del'>-		compatible = "rockchip,rt5651";</div><div class='add'>+		compatible = "realtek,rt5651";</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru SCLK_I2S_8CH_OUT&gt;;</div><div class='ctx'> 		clock-names = "mclk";</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio4 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio4 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		spk-con-gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts<br/>new file mode 100644<br/>index 000000000000..70aee1ab904c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dts</a></div><div class='hunk'>@@ -0,0 +1,494 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "rk3399.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RK3399 EVB IND LPDDR4 Board";</div><div class='add'>+	compatible = "rockchip,rk3399-evb-ind", "rockchip,rk3399";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_b&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_b&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_l&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_l&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_l&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_l&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmi_i2c_xfer&gt;, &lt;&amp;hdmi_cec&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	i2c-scl-falling-time-ns = &lt;4&gt;;</div><div class='add'>+	i2c-scl-rising-time-ns = &lt;168&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_gpu: regulator@10 {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vsel2_gpio&gt;;</div><div class='add'>+		regulator-name = "vdd_gpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;1000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vsel-gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_b: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vsel1_gpio&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_b";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;1000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vsel-gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_buck5&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_buck5&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_center: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_center";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_l: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_cpu_l";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sys: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vcc3v3_sys";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_buck5: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_buck5";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2200000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_0v9: LDO_REG1 {</div><div class='add'>+				regulator-name = "vcca_0v9";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: LDO_REG2 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc0v9_soc: LDO_REG3 {</div><div class='add'>+				regulator-name = "vcc0v9_soc";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG4 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd1v5_dvp: LDO_REG5 {</div><div class='add'>+				regulator-name = "vdd1v5_dvp";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v5: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc_1v5";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v0: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcc_3v0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG8 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_sd: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcc_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc5v0_usb: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "vcc5v0_usb";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_3v3: SWITCH_REG2 {</div><div class='add'>+				regulator-name = "vccio_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;io_domains {</div><div class='add'>+	audio-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	bt656-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	gpio1830-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='add'>+	sdmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int_l: pmic-int-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vsel1_gpio: vsel1 {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vsel2_gpio: vsel2 {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmu1830-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc_clk &amp;sdmmc_cmd &amp;sdmmc_bus4&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tcphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tcphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	/* tshut mode 0:CRU 1:GPIO */</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	/* tshut polarity 0:LOW 1:HIGH */</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_dwc3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_dwc3_1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopb_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vopl_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts<br/>index 54e67d2dac09..9ea91f90c67a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-evb.dts</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_center: vdd-center {</div><div class='add'>+	vdd_center: regulator-vdd-center {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm3 0 25000 0&gt;;</div><div class='ctx'> 		regulator-name = "vdd_center";</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -104,7 +104,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -114,14 +114,14 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'> 		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts<br/>index f4491317a1b0..0568dfa140b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-firefly.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-firefly.dts</a></div><div class='hunk'>@@ -72,7 +72,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -188,7 +188,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -200,7 +200,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */</div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -222,7 +222,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec: vcc5v0-typec-regulator {</div><div class='add'>+	vcc5v0_typec: regulator-vcc5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -233,7 +233,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -243,7 +243,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -326,7 +326,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi<br/>index cacbad35cfc8..9d07353df52c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "rk3399-gru.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	pp900_ap: pp900-ap {</div><div class='add'>+	pp900_ap: regulator-pp900-ap {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp900_ap";</div><div class='ctx'> </div><div class='hunk'>@@ -22,14 +22,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp900_usb_en */</div><div class='del'>-	pp900_usb: pp900-ap {</div><div class='add'>+	pp900_usb: regulator-pp900-ap {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp900_pcie_en */</div><div class='del'>-	pp900_pcie: pp900-ap {</div><div class='add'>+	pp900_pcie: regulator-pp900-ap {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp3000: pp3000 {</div><div class='add'>+	pp3000: regulator-pp3000 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3000";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvar_centerlogic_pwm: ppvar-centerlogic-pwm {</div><div class='add'>+	ppvar_centerlogic_pwm: regulator-ppvar-centerlogic-pwm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "ppvar_centerlogic_pwm";</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Schematics call this PPVAR even though it's fixed */</div><div class='del'>-	ppvar_logic: ppvar-logic {</div><div class='add'>+	ppvar_logic: regulator-ppvar-logic {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvar_logic";</div><div class='ctx'> </div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800_audio: pp1800-audio {</div><div class='add'>+	pp1800_audio: regulator-pp1800-audio {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1800_audio";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* gpio is shared with pp3300_wifi_bt */</div><div class='del'>-	pp1800_pcie: pp1800-pcie {</div><div class='add'>+	pp1800_pcie: regulator-pp1800-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1800_pcie";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -126,10 +126,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Always on; plain and simple */</div><div class='del'>-	pp3000_ap: pp3000_emmc: pp3000 {</div><div class='add'>+	pp3000_ap: pp3000_emmc: regulator-pp3000 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1500_ap_io: pp1500-ap-io {</div><div class='add'>+	pp1500_ap_io: regulator-pp1500-ap-io {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1500_ap_io";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;pp1800&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp3300_disp: pp3300-disp {</div><div class='add'>+	pp3300_disp: regulator-pp3300-disp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3300_disp";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -160,11 +160,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp3300_usb_en_l */</div><div class='del'>-	pp3300_usb: pp3300 {</div><div class='add'>+	pp3300_usb: regulator-pp3300 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* gpio is shared with pp1800_pcie and pinctrl is set there */</div><div class='del'>-	pp3300_wifi_bt: pp3300-wifi-bt {</div><div class='add'>+	pp3300_wifi_bt: regulator-pp3300-wifi-bt {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3300_wifi_bt";</div><div class='ctx'> </div><div class='hunk'>@@ -180,7 +180,7 @@</div><div class='ctx'> 	 * With some stretching of the imagination, we can call the 1.8V</div><div class='ctx'> 	 * regulator a supply.</div><div class='ctx'> 	 */</div><div class='del'>-	wlan_pd_n: wlan-pd-n {</div><div class='add'>+	wlan_pd_n: regulator-wlan-pd-n {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "wlan_pd_n";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -250,18 +250,11 @@</div><div class='ctx'> 	 */</div><div class='ctx'> 	assigned-clocks = &lt;&amp;cru PCLK_EDP&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		edp_out: port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			edp_out_panel: endpoint@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;edp_out {</div><div class='add'>+	edp_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -550,7 +543,7 @@ ap_i2c_tp: &amp;i2c5 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='del'>-	discrete-regulators {</div><div class='add'>+	discretes {</div><div class='ctx'> 		pp1500_en: pp1500-en {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PB2 RK_FUNC_GPIO</div><div class='ctx'> 					 &amp;pcfg_pull_none&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts<br/>index 2cc9b3386c16..7b907c80dd32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Power tree */</div><div class='ctx'> </div><div class='del'>-	p3_3v_dig: p3-3v-dig {</div><div class='add'>+	p3_3v_dig: regulator-p3-3v-dig {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "p3.3v_dig";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -314,7 +314,7 @@ ap_i2c_dig: &amp;i2c2 {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	discrete-regulators {</div><div class='add'>+	discretes {</div><div class='ctx'> 		cpu3_pen_pwr_en: cpu3-pen-pwr-en {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts<br/>index 9e4b12ed62cb..be3ae473e562 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts</a></div><div class='hunk'>@@ -36,6 +36,6 @@</div><div class='ctx'> 		compatible = "qcom,ath10k";</div><div class='ctx'> 		reg = &lt;0x00000000 0x0 0x00000000 0x0 0x00000000&gt;,</div><div class='ctx'> 		      &lt;0x03000010 0x0 0x00000000 0x0 0x00200000&gt;;</div><div class='del'>-		qcom,ath10k-calibration-variant = "GO_DUMO";</div><div class='add'>+		qcom,calibration-variant = "GO_DUMO";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi<br/>index d5e035823eb5..6aaaf0f7f73f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	/* Power tree */</div><div class='ctx'> </div><div class='ctx'> 	/* ppvar_sys children, sorted by name */</div><div class='del'>-	pp1250_s3: pp1250-s3 {</div><div class='add'>+	pp1250_s3: regulator-pp1250-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1250_s3";</div><div class='ctx'> </div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1250_cam: pp1250-dvdd {</div><div class='add'>+	pp1250_cam: regulator-pp1250-dvdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1250_dvdd";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;pp1250_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp900_s0: pp900-s0 {</div><div class='add'>+	pp900_s0: regulator-pp900-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp900_s0";</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarn_lcd: ppvarn-lcd {</div><div class='add'>+	ppvarn_lcd: regulator-ppvarn-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvarn_lcd";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvarp_lcd: ppvarp-lcd {</div><div class='add'>+	ppvarp_lcd: regulator-ppvarp-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvarp_lcd";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* pp1800 children, sorted by name */</div><div class='del'>-	pp900_s3: pp900-s3 {</div><div class='add'>+	pp900_s3: regulator-pp900-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp900_s3";</div><div class='ctx'> </div><div class='hunk'>@@ -92,11 +92,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on pp1800_s3_en */</div><div class='del'>-	pp1800_s3: pp1800 {</div><div class='add'>+	pp1800_s3: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* pp3300 children, sorted by name */</div><div class='del'>-	pp2800_cam: pp2800-avdd {</div><div class='add'>+	pp2800_cam: regulator-pp2800-avdd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp2800_avdd";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -109,11 +109,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on pp3300_s0_en */</div><div class='del'>-	pp3300_s0: pp3300 {</div><div class='add'>+	pp3300_s0: regulator-pp3300 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on pp3300_s3_en */</div><div class='del'>-	pp3300_s3: pp3300 {</div><div class='add'>+	pp3300_s3: regulator-pp3300 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 	 * the boot process it also enables its supply regulator bt_3v3,</div><div class='ctx'> 	 * which changes BT_EN to high.</div><div class='ctx'> 	 */</div><div class='del'>-	bt_3v3: bt-3v3 {</div><div class='add'>+	bt_3v3: regulator-bt-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "bt_3v3";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -138,7 +138,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;pp3300_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wlan_3v3: wlan-3v3 {</div><div class='add'>+	wlan_3v3: regulator-wlan-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "wlan_3v3";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -627,8 +627,10 @@ camera: &amp;i2c7 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mipi_dsi {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	clock-master;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		mipi_out: port@1 {</div><div class='hunk'>@@ -833,7 +835,7 @@ camera: &amp;i2c7 {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	discrete-regulators {</div><div class='add'>+	discretes {</div><div class='ctx'> 		display_rst_l: display-rst-l {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi<br/>index 776c0eec04d7..7eca1da78cff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi</a></div><div class='hunk'>@@ -42,14 +42,14 @@</div><div class='ctx'> 	 *   schematic.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	ppvar_sys: ppvar-sys {</div><div class='add'>+	ppvar_sys: regulator-ppvar-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "ppvar_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1200_lpddr: pp1200-lpddr {</div><div class='add'>+	pp1200_lpddr: regulator-pp1200-lpddr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1200_lpddr";</div><div class='ctx'> </div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp1800: pp1800 {</div><div class='add'>+	pp1800: regulator-pp1800 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp1800";</div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp3300: pp3300 {</div><div class='add'>+	pp3300: regulator-pp3300 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3300";</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp5000: pp5000 {</div><div class='add'>+	pp5000: regulator-pp5000 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp5000";</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;ppvar_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {</div><div class='add'>+	ppvar_bigcpu_pwm: regulator-ppvar-bigcpu-pwm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "ppvar_bigcpu_pwm";</div><div class='ctx'> </div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> 		regulator-settling-time-up-us = &lt;322&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvar_litcpu_pwm: ppvar-litcpu-pwm {</div><div class='add'>+	ppvar_litcpu_pwm: regulator-ppvar-litcpu-pwm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "ppvar_litcpu_pwm";</div><div class='ctx'> </div><div class='hunk'>@@ -159,7 +159,7 @@</div><div class='ctx'> 		regulator-settling-time-up-us = &lt;384&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ppvar_gpu_pwm: ppvar-gpu-pwm {</div><div class='add'>+	ppvar_gpu_pwm: regulator-ppvar-gpu-pwm {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		regulator-name = "ppvar_gpu_pwm";</div><div class='ctx'> </div><div class='hunk'>@@ -189,42 +189,42 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp900_ddrpll_en */</div><div class='del'>-	pp900_ddrpll: pp900-ap {</div><div class='add'>+	pp900_ddrpll: regulator-pp900-ap {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp900_pll_en */</div><div class='del'>-	pp900_pll: pp900-ap {</div><div class='add'>+	pp900_pll: regulator-pp900-ap {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp900_pmu_en */</div><div class='del'>-	pp900_pmu: pp900-ap {</div><div class='add'>+	pp900_pmu: regulator-pp900-ap {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp1800_s0_en_l */</div><div class='del'>-	pp1800_ap_io: pp1800_emmc: pp1800_nfc: pp1800_s0: pp1800 {</div><div class='add'>+	pp1800_ap_io: pp1800_emmc: pp1800_nfc: pp1800_s0: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp1800_avdd_en_l */</div><div class='del'>-	pp1800_avdd: pp1800 {</div><div class='add'>+	pp1800_avdd: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp1800_lid_en_l */</div><div class='del'>-	pp1800_lid: pp1800_mic: pp1800 {</div><div class='add'>+	pp1800_lid: pp1800_mic: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ lpddr_pwr_en */</div><div class='del'>-	pp1800_lpddr: pp1800 {</div><div class='add'>+	pp1800_lpddr: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp1800_pmu_en_l */</div><div class='del'>-	pp1800_pmu: pp1800 {</div><div class='add'>+	pp1800_pmu: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp1800_usb_en_l */</div><div class='del'>-	pp1800_usb: pp1800 {</div><div class='add'>+	pp1800_usb: regulator-pp1800 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pp3000_sd_slot: pp3000-sd-slot {</div><div class='add'>+	pp3000_sd_slot: regulator-pp3000-sd-slot {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pp3000_sd_slot";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -259,11 +259,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ pp3300_trackpad_en_l */</div><div class='del'>-	pp3300_trackpad: pp3300-trackpad {</div><div class='add'>+	pp3300_trackpad: regulator-pp3300-trackpad {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* EC turns on w/ usb_a_en */</div><div class='del'>-	pp5000_usb_a_vbus: pp5000 {</div><div class='add'>+	pp5000_usb_a_vbus: regulator-pp5000 {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ap_rtc_clk: ap-rtc-clk {</div><div class='hunk'>@@ -724,7 +724,7 @@ ap_i2c_audio: &amp;i2c8 {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	discrete-regulators {</div><div class='add'>+	discretes {</div><div class='ctx'> 		sd_io_pwr_en: sd-io-pwr-en {</div><div class='ctx'> 			rockchip,pins = &lt;2 RK_PA2 RK_FUNC_GPIO</div><div class='ctx'> 					 &amp;pcfg_pull_none&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts<br/>index 5a02502d21cd..352c8efb37e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_5v: dc-5v {</div><div class='add'>+	dc_5v: regulator-dc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -65,14 +65,14 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_phy: vcc-phy-regulator {</div><div class='add'>+	vcc_phy: regulator-vcc-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_phy";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_s0: vcc1v8-s0 {</div><div class='add'>+	vcc1v8_s0: regulator-vcc1v8-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec: vcc5v0-typec-regulator {</div><div class='add'>+	vcc5v0_typec: regulator-vcc5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -211,7 +211,6 @@</div><div class='ctx'> 	vdd_cpu_b: syr827@40 {</div><div class='ctx'> 		compatible = "silergy,syr827";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='del'>-		regulator-compatible = "fan53555-reg";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vsel1_pin&gt;;</div><div class='ctx'> 		regulator-name = "vdd_cpu_b";</div><div class='ctx'> 		regulator-min-microvolt = &lt;712500&gt;;</div><div class='hunk'>@@ -229,7 +228,6 @@</div><div class='ctx'> 	vdd_gpu: syr828@41 {</div><div class='ctx'> 		compatible = "silergy,syr828";</div><div class='ctx'> 		reg = &lt;0x41&gt;;</div><div class='del'>-		regulator-compatible = "fan53555-reg";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vsel2_pin&gt;;</div><div class='ctx'> 		regulator-name = "vdd_gpu";</div><div class='ctx'> 		regulator-min-microvolt = &lt;712500&gt;;</div><div class='hunk'>@@ -252,7 +250,7 @@</div><div class='ctx'> 		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k", "rtc_clko_wifi";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi<br/>index c772985ae4e5..880c24084952 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */</div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='hunk'>@@ -88,14 +88,14 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;1400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys: vsys {</div><div class='add'>+	vsys: regulator-vsys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys_3v3: vsys-3v3 {</div><div class='add'>+	vsys_3v3: regulator-vsys-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys_3v3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vsys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vsys_5v0: vsys-5v0 {</div><div class='add'>+	vsys_5v0: regulator-vsys-5v0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vsys_5v0";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -315,7 +315,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts<br/>index b0c1fb0b704e..e7d4a2f9a95e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 		mmc1 = &amp;sdhci;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd_0v9_s0: avdd-0v9-s0 {</div><div class='add'>+	avdd_0v9_s0: regulator-avdd-0v9-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd_0v9_s0";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc1v8_sys_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd_1v8_s0: avdd-1v8-s0 {</div><div class='add'>+	avdd_1v8_s0: regulator-avdd-1v8-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd_1v8_s0";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hdd_a_power: hdd-a-power {</div><div class='add'>+	hdd_a_power: regulator-hdd-a-power {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		startup-delay-us = &lt;2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hdd_b_power: hdd-b-power {</div><div class='add'>+	hdd_b_power: regulator-hdd-b-power {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 		startup-delay-us = &lt;2000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie_power: pcie-power {</div><div class='add'>+	pcie_power: regulator-pcie-power {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_perdev&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usblan_power: usblan-power {</div><div class='add'>+	usblan_power: regulator-usblan-power {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_sys_s0: vcc1v8-sys-s0 {</div><div class='add'>+	vcc1v8_sys_s0: regulator-vcc1v8-sys-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_sys_s0";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc1v8_sys_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys_s3: vcc_lan: vcc3v3-sys-s3 {</div><div class='add'>+	vcc3v3_sys_s3: vcc_lan: regulator-vcc3v3-sys-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_perdev: vcc5v0-perdev {</div><div class='add'>+	vcc5v0_perdev: regulator-vcc5v0-perdev {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_perdev";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -181,7 +181,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin_bkup&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -195,7 +195,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -209,7 +209,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_perdev&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -218,7 +218,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin_bkup: vcc12v-dcin-bkup {</div><div class='add'>+	vcc12v_dcin_bkup: regulator-vcc12v-dcin-bkup {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin_bkup";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -309,7 +309,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts<br/>index f12b1eb00575..2cdc2013c320 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc5v_adp: dc5v-adp {</div><div class='add'>+	dc5v_adp: regulator-dc5v-adp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc5v_adapter";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lan: vcc3v3-lan {</div><div class='add'>+	vcc3v3_lan: regulator-vcc3v3-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lan";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host0: vcc5v0_host1: vcc5v0-host {</div><div class='add'>+	vcc5v0_host0: vcc5v0_host1: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host3: vcc5v0-host3 {</div><div class='add'>+	vcc5v0_host3: regulator-vcc5v0-host3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host3";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc5v_adp&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -187,7 +187,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts<br/>index 3bf8f959e42c..e5fc05cc64bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dts</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> 	model = "FriendlyElec NanoPC-T4";</div><div class='ctx'> 	compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";</div><div class='ctx'> </div><div class='del'>-	vcc12v0_sys: vcc12v0-sys {</div><div class='add'>+	vcc12v0_sys: regulator-vcc12v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		regulator-name = "vcc12v0_sys";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host0: vcc5v0-host0 {</div><div class='add'>+	vcc5v0_host0: regulator-vcc5v0-host0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts<br/>index 60358ab8c7df..e091b20c2d1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dts</a></div><div class='hunk'>@@ -10,57 +10,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3399-nanopi4.dtsi"</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi-m4.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi M4";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";</div><div class='del'>-</div><div class='del'>-	vdd_5v: vdd-5v {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_5v";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_core: vcc5v0-core {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_core";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_usb1: vcc5v0-usb1 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_usb1";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_usb2: vcc5v0-usb2 {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_usb2";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;vcc3v3_sys {</div><div class='del'>-	vin-supply = &lt;&amp;vcc5v0_core&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;u2phy0_host {</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc5v0_usb1&gt;;</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;u2phy1_host {</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_usb2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;vbus_typec {</div><div class='del'>-	regulator-always-on;</div><div class='del'>-	vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi<br/>new file mode 100644<br/>index 000000000000..1ac6bc140823<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * FriendlyElec NanoPi M4 board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * (http://www.friendlyarm.com)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2018 Collabora Ltd.</div><div class='add'>+ * Copyright (c) 2019 Arm Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	vdd_5v: regulator-vdd-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_core: regulator-vcc5v0-core {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_core";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb1: regulator-vcc5v0-usb1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb1";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb2: regulator-vcc5v0-usb2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb2";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc3v3_sys {</div><div class='add'>+	vin-supply = &lt;&amp;vcc5v0_core&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vbus_typec {</div><div class='add'>+	regulator-always-on;</div><div class='add'>+	vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts<br/>index 65cb21837b0c..d03ce6fa5bf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4b.dts</a></div><div class='hunk'>@@ -6,7 +6,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3399-nanopi-m4.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi-m4.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi M4B";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts<br/>index 195410b089b9..3ae645edeb62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dts</a></div><div class='hunk'>@@ -12,14 +12,14 @@</div><div class='ctx'> 	model = "FriendlyARM NanoPi NEO4";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-neo4", "rockchip,rk3399";</div><div class='ctx'> </div><div class='del'>-	vdd_5v: vdd-5v {</div><div class='add'>+	vdd_5v: regulator-vdd-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_core: vcc5v0-core {</div><div class='add'>+	vcc5v0_core: regulator-vcc5v0-core {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_core";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb1: vcc5v0-usb1 {</div><div class='add'>+	vcc5v0_usb1: regulator-vcc5v0-usb1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb1";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts<br/>index a23d11ca0eb6..b76f98962076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3399-nanopi-r4s.dts"</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi-r4s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R4S Enterprise Edition";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts<br/>index fe5b52610010..ec3883f6221e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts</a></div><div class='hunk'>@@ -1,133 +1,13 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> /*</div><div class='del'>- * FriendlyElec NanoPC-T4 board device tree source</div><div class='del'>- *</div><div class='ctx'>  * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.</div><div class='del'>- * (http://www.friendlyarm.com)</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2018 Collabora Ltd.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2020 Jensen Huang &lt;jensenhuang@friendlyarm.com&gt;</div><div class='del'>- * Copyright (c) 2020 Marty Jones &lt;mj8263788@gmail.com&gt;</div><div class='del'>- * Copyright (c) 2021 Tianling Shen &lt;cnsztl@gmail.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='del'>-#include "rk3399-nanopi4.dtsi"</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi-r4s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R4S";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";</div><div class='del'>-</div><div class='del'>-	/delete-node/ display-subsystem;</div><div class='del'>-</div><div class='del'>-	gpio-leds {</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan_led_pin&gt;, &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='del'>-</div><div class='del'>-		/delete-node/ led-0;</div><div class='del'>-</div><div class='del'>-		lan_led: led-lan {</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "green:lan";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sys_led: led-sys {</div><div class='del'>-			gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "red:power";</div><div class='del'>-			default-state = "on";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led: led-wan {</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "green:wan";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		pinctrl-0 = &lt;&amp;reset_button_pin&gt;;</div><div class='del'>-</div><div class='del'>-		/delete-node/ key-power;</div><div class='del'>-</div><div class='del'>-		key-reset {</div><div class='del'>-			debounce-interval = &lt;50&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			label = "reset";</div><div class='del'>-			linux,code = &lt;KEY_RESTART&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_5v: vdd-5v {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_5v";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;emmc_phy {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c4 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie0 {</div><div class='del'>-	max-link-speed = &lt;1&gt;;</div><div class='del'>-	num-lanes = &lt;1&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	gpio-leds {</div><div class='del'>-		/delete-node/ status-led-pin;</div><div class='del'>-</div><div class='del'>-		lan_led_pin: lan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sys_led_pin: sys-led-pin {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led_pin: wan-led-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rockchip-key {</div><div class='del'>-		/delete-node/ power-key;</div><div class='del'>-</div><div class='del'>-		reset_button_pin: reset-button-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdio0 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy0_host {</div><div class='del'>-	phy-supply = &lt;&amp;vdd_5v&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy1_host {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart0 {</div><div class='del'>-	status = "disabled";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdrd_dwc3_0 {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;vcc3v3_sys {</div><div class='del'>-	vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi<br/>new file mode 100644<br/>index 000000000000..8d94d9f91a5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * FriendlyElec NanoPC-R4 board device tree source</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * (http://www.friendlyarm.com)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2018 Collabora Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2020 Jensen Huang &lt;jensenhuang@friendlyarm.com&gt;</div><div class='add'>+ * Copyright (c) 2020 Marty Jones &lt;mj8263788@gmail.com&gt;</div><div class='add'>+ * Copyright (c) 2021 Tianling Shen &lt;cnsztl@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3399-nanopi4.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/delete-node/ display-subsystem;</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_led_pin&gt;, &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+</div><div class='add'>+		/delete-node/ led-0;</div><div class='add'>+</div><div class='add'>+		lan_led: led-lan {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "green:lan";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led: led-sys {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "red:power";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led: led-wan {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "green:wan";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		pinctrl-0 = &lt;&amp;reset_button_pin&gt;;</div><div class='add'>+</div><div class='add'>+		/delete-node/ key-power;</div><div class='add'>+</div><div class='add'>+		key-reset {</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "reset";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_5v: regulator-vdd-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc_phy {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	max-link-speed = &lt;1&gt;;</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gpio-leds {</div><div class='add'>+		/delete-node/ status-led-pin;</div><div class='add'>+</div><div class='add'>+		lan_led_pin: lan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_pin: wan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rockchip-key {</div><div class='add'>+		/delete-node/ power-key;</div><div class='add'>+</div><div class='add'>+		reset_button_pin: reset-button-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_host {</div><div class='add'>+	phy-supply = &lt;&amp;vdd_5v&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdrd_dwc3_0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc3v3_sys {</div><div class='add'>+	vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi<br/>index 7debc4a1b5fa..c8eb5481f43d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 	 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only</div><div class='ctx'> 	 * drives the enable pin, but we can't quite model that.</div><div class='ctx'> 	 */</div><div class='del'>-	vcca0v9_s3: vcca0v9-s3 {</div><div class='add'>+	vcca0v9_s3: regulator-vcca0v9-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-min-microvolt = &lt;900000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;900000&gt;;</div><div class='hunk'>@@ -90,7 +90,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* As above, actually supplied by vcc3v3_sys */</div><div class='del'>-	vcca1v8_s3: vcca1v8-s3 {</div><div class='add'>+	vcca1v8_s3: regulator-vcca1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc1v8_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_typec: vbus-typec {</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -269,7 +269,7 @@</div><div class='ctx'> 		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;ap_pwroff&gt;, &lt;&amp;clk_32k&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -603,7 +603,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='del'>-	pinctrl-names = "active";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm2_pin_pull_down&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi<br/>index b24bff511513..c4f4f1ff6117 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-op1.dtsi</a></div><div class='hunk'>@@ -12,32 +12,32 @@</div><div class='ctx'> </div><div class='ctx'> 		opp00 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 1150000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp01 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;825000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp02 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp03 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp04 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;975000&gt;;</div><div class='add'>+			opp-microvolt = &lt;975000 975000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp05 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1100000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp06 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1512000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1150000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -47,40 +47,40 @@</div><div class='ctx'> </div><div class='ctx'> 		opp00 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 1250000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp01 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp02 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;825000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp03 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp04 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp05 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;975000&gt;;</div><div class='add'>+			opp-microvolt = &lt;975000 975000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp06 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1050000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1050000 1050000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp07 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1150000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp08 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1250000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1250000 1250000 1250000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -89,27 +89,27 @@</div><div class='ctx'> </div><div class='ctx'> 		opp00 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp01 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;297000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp02 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;825000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp03 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp04 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;925000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp05 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1075000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1075000 1075000 1075000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -118,19 +118,19 @@</div><div class='ctx'> </div><div class='ctx'> 		opp00 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 925000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp01 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;666000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 925000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp02 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 925000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp03 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;928000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;925000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 925000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts<br/>index 07ec33f3f55f..2ddd4da15597 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts</a></div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_typec: vbus-typec-regulator {</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -262,7 +262,7 @@</div><div class='ctx'> 		clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts<br/>index a5a7e374bc59..eaaca08a7601 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts</a></div><div class='hunk'>@@ -150,7 +150,7 @@</div><div class='ctx'> 			"Speaker", "Speaker Amplifier OUTL",</div><div class='ctx'> 			"Speaker", "Speaker Amplifier OUTR";</div><div class='ctx'> </div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;;</div><div class='ctx'> 		simple-audio-card,pin-switches = "Speaker";</div><div class='ctx'> </div><div class='hunk'>@@ -172,7 +172,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Power tree */</div><div class='ctx'> 	/* Root power source */</div><div class='del'>-	vcc_sysin: vcc-sysin {</div><div class='add'>+	vcc_sysin: regulator-vcc-sysin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sysin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -181,7 +181,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Regulators supplied by vcc_sysin */</div><div class='ctx'> 	/* LCD backlight supply */</div><div class='del'>-	vcc_12v: vcc-12v {</div><div class='add'>+	vcc_12v: regulator-vcc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -196,7 +196,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Main 3.3 V supply */</div><div class='del'>-	vcc3v3_sys: wifi_bat: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: wifi_bat: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* 5 V USB power supply */</div><div class='del'>-	vcc5v0_usb: pa_5v: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: pa_5v: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -229,7 +229,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* RK3399 logic supply */</div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='hunk'>@@ -246,7 +246,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Regulators supplied by vcc3v3_sys */</div><div class='ctx'> 	/* 0.9 V supply, always on */</div><div class='del'>-	vcc_0v9: vcc-0v9 {</div><div class='add'>+	vcc_0v9: regulator-vcc-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -257,7 +257,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* S3 1.8 V supply, switched by vcc1v8_s3 */</div><div class='del'>-	vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -268,7 +268,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* micro SD card power */</div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -286,7 +286,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* LCD panel power, called VCC3V3_S0 in schematic */</div><div class='del'>-	vcc3v3_panel: vcc3v3-panel {</div><div class='add'>+	vcc3v3_panel: regulator-vcc3v3-panel {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -305,7 +305,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* M.2 adapter power, switched by vcc1v8_s3 */</div><div class='del'>-	vcc3v3_ssd: vcc3v3-ssd {</div><div class='add'>+	vcc3v3_ssd: regulator-vcc3v3-ssd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_ssd";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -315,7 +315,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Regulators supplied by vcc5v0_usb */</div><div class='ctx'> 	/* USB 3 port power supply regulator  */</div><div class='del'>-	vcc5v0_otg: vcc5v0-otg {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -334,7 +334,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Regulators supplied by vcc5v0_usb */</div><div class='ctx'> 	/* Type C port power supply regulator */</div><div class='del'>-	vbus_5vout: vbus_typec: vbus-5vout {</div><div class='add'>+	vbus_5vout: vbus_typec: regulator-vbus-5vout {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -352,7 +352,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* Regulators supplied by vcc_1v8 */</div><div class='ctx'> 	/* Primary 0.9 V LDO */</div><div class='del'>-	vcca0v9_s3: vcca0v9-s3 {</div><div class='add'>+	vcca0v9_s3: regulator-vcca0v9-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc0v9_s3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -404,18 +404,11 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;edp_hpd&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		edp_out: port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			edp_out_panel: endpoint@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;edp_out {</div><div class='add'>+	edp_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -447,7 +440,7 @@</div><div class='ctx'> 		interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l_pin&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='hunk'>@@ -890,6 +883,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wifi {</div><div class='add'>+		wifi_host_wake_l: wifi-host-wake-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wireless-bluetooth {</div><div class='ctx'> 		bt_wake_pin: bt-wake-pin {</div><div class='ctx'> 			rockchip,pins = &lt;2 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -947,7 +946,19 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdio0_bus4 &amp;sdio0_cmd &amp;sdio0_clk&gt;;</div><div class='ctx'> 	sd-uhs-sdr104;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake_l&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci {</div><div class='hunk'>@@ -966,6 +977,7 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		m25p,fast-read;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts<br/>index 1a44582a49fb..2dca1dca20b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;dt-bindings/input/gpio-keys.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include "rk3399.dtsi"</div><div class='add'>+#include "rk3399-s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Pine64 PinePhone Pro";</div><div class='hunk'>@@ -97,14 +97,24 @@</div><div class='ctx'> 		leds = &lt;&amp;led_red&gt;, &lt;&amp;led_green&gt;, &lt;&amp;led_blue&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	avdd2v8_dvp: regulator-avdd2v8-dvp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "avdd2v8_dvp";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -114,7 +124,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca1v8_s3: vcc1v8-s3-regulator {</div><div class='add'>+	vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca1v8_s3";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -124,7 +134,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_codec: vcc1v8-codec-regulator {</div><div class='add'>+	vcc1v8_codec: regulator-vcc1v8-codec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -136,6 +146,16 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc1v2_dvp: regulator-vcc1v2-dvp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v2_dvp";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcca1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wifi_pwrseq: sdio-wifi-pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rk818 1&gt;;</div><div class='hunk'>@@ -158,7 +178,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* MIPI DSI panel 1.8v supply */</div><div class='del'>-	vcc1v8_lcd: vcc1v8-lcd {</div><div class='add'>+	vcc1v8_lcd: regulator-vcc1v8-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-name = "vcc1v8_lcd";</div><div class='hunk'>@@ -166,11 +186,10 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* MIPI DSI panel 2.8v supply */</div><div class='del'>-	vcc2v8_lcd: vcc2v8-lcd {</div><div class='add'>+	vcc2v8_lcd: regulator-vcc2v8-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		regulator-name = "vcc2v8_lcd";</div><div class='hunk'>@@ -178,7 +197,6 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vibrator {</div><div class='hunk'>@@ -243,7 +261,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -314,6 +332,8 @@</div><div class='ctx'> </div><div class='ctx'> 			vcca1v8_codec: LDO_REG3 {</div><div class='ctx'> 				regulator-name = "vcca1v8_codec";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -422,6 +442,67 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_xfer &amp;cif_clkouta&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wcam: camera@1a {</div><div class='add'>+		compatible = "sony,imx258";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;; /* MIPI_MCLK0, derived from CIF_CLKO */</div><div class='add'>+		lens-focus = &lt;&amp;wcam_lens&gt;;</div><div class='add'>+		orientation = &lt;1&gt;; /* V4L2_CAMERA_ORIENTATION_BACK */</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;camera_rst_l&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rotation = &lt;270&gt;;</div><div class='add'>+		/* Note: both cameras also depend on vcca1v8_codec to power the I2C bus. */</div><div class='add'>+		vif-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='add'>+		vana-supply = &lt;&amp;avdd2v8_dvp&gt;;</div><div class='add'>+		vdig-supply = &lt;&amp;vcc1v2_dvp&gt;; /* DVDD_DVP is the same as VCC1V2_DVP */</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			wcam_out: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;636000000&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_in_wcam&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wcam_lens: camera-lens@c {</div><div class='add'>+		compatible = "dongwoon,dw9714";</div><div class='add'>+		reg = &lt;0x0c&gt;;</div><div class='add'>+		/* Same I2c bus as both cameras, depends on vcca1v8_codec for power. */</div><div class='add'>+		vcc-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ucam: camera@36 {</div><div class='add'>+		compatible = "ovti,ov8858";</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;; /* MIPI_MCLK1, derived from CIF_CLK0 */</div><div class='add'>+		clock-names = "xvclk";</div><div class='add'>+		dovdd-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='add'>+		orientation = &lt;0&gt;; /* V4L2_CAMERA_ORIENTATION_FRONT */</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;camera2_rst_l &amp;dvp_pdn0_h&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rotation = &lt;90&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			ucam_out: endpoint {</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	i2c-scl-rising-time-ns = &lt;450&gt;;</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;15&gt;;</div><div class='hunk'>@@ -456,27 +537,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cluster0_opp {</div><div class='del'>-	opp04 {</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	opp05 {</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cluster1_opp {</div><div class='del'>-	opp06 {</div><div class='del'>-		opp-hz = /bits/ 64 &lt;1500000000&gt;;</div><div class='del'>-		opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	opp07 {</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;io_domains {</div><div class='ctx'> 	bt656-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='ctx'> 	audio-supply = &lt;&amp;vcca1v8_codec&gt;;</div><div class='hunk'>@@ -485,30 +545,61 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mipi_dsi {</div><div class='add'>+&amp;isp0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	clock-master;</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='del'>-		mipi_out: port@1 {</div><div class='del'>-			#address-cells = &lt;0&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_in_ucam: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;ucam_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-			mipi_out_panel: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+&amp;isp0_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		port@0 {</div><div class='add'>+			mipi_in_wcam: endpoint@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+				remote-endpoint = &lt;&amp;wcam_out&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dphy_rx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;isp1_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	clock-master;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	panel@0 {</div><div class='del'>-		compatible = "hannstar,hsd060bhw4";</div><div class='add'>+		compatible = "hannstar,hsd060bhw4", "himax,hx8394";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		vcc-supply = &lt;&amp;vcc2v8_lcd&gt;;</div><div class='ctx'> 		iovcc-supply = &lt;&amp;vcc1v8_lcd&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd1_rst_pin&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc2v8_lcd&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			mipi_in_panel: endpoint {</div><div class='hunk'>@@ -518,6 +609,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mipi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pmu_io_domains {</div><div class='ctx'> 	pmu1830-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -530,6 +631,24 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	lcd {</div><div class='add'>+		lcd1_rst_pin: lcd1-rst-pin {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cameras {</div><div class='add'>+		camera_rst_l: camera-rst-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		camera2_rst_l: camera2-rst-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		dvp_pdn0_h: dvp-pdn0-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		red_led_pin: red-led-pin {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -570,6 +689,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wifi {</div><div class='add'>+		wifi_host_wake_l: wifi-host-wake-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wireless-bluetooth {</div><div class='ctx'> 		bt_wake_pin: bt-wake-pin {</div><div class='ctx'> 			rockchip,pins = &lt;2 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -596,7 +721,19 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;sdio0_bus4 &amp;sdio0_cmd &amp;sdio0_clk&gt;;</div><div class='ctx'> 	sd-uhs-sdr104;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake_l&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm0 {</div><div class='hunk'>@@ -635,6 +772,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso<br/>new file mode 100644<br/>index 000000000000..5e8f729c2cf2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * DEVKIT ADDON CAM-TS-A01</div><div class='add'>+ * https://embedded.cherry.de/product/development-kit/</div><div class='add'>+ *</div><div class='add'>+ * DT-overlay for the camera / DSI demo appliance for Haikou boards.</div><div class='add'>+ * In the flavour for use with a Puma system-on-module.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;dc_12v&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_afvdd_2v8: regulator-cam-afvdd-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pca9670 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "cam-afvdd-2v8";</div><div class='add'>+		vin-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_avdd_2v8: regulator-cam-avdd-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;pca9670 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "cam-avdd-2v8";</div><div class='add'>+		vin-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_dovdd_1v8: regulator-cam-dovdd-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+	        gpio = &lt;&amp;pca9670 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	        regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+	        regulator-name = "cam-dovdd-1v8";</div><div class='add'>+	        vin-supply = &lt;&amp;vcc1v8_video&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_dvdd_1v2: regulator-cam-dvdd-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;pca9670 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-name = "cam-dvdd-1v2";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_video: regulator-vcc1v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vcc1v8-video";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc2v8_video: regulator-vcc2v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-name = "vcc2v8-video";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	video-adapter-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		video-adapter-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9670 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "video-adapter-led";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	/* OV5675, GT911, DW9714 are limited to 400KHz */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio1 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9670: gpio@27 {</div><div class='add'>+		compatible = "nxp,pca9670";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pca9670_resetn&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3148w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc1v8_video&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pca9670 {</div><div class='add'>+		pca9670_resetn: pca9670-resetn {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch {</div><div class='add'>+		touch_int: touch-int {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts<br/>index f6f15946579e..70979079923c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts</a></div><div class='hunk'>@@ -30,6 +30,12 @@</div><div class='ctx'> 			linux,code = &lt;KEY_BATTERY&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		button-pwrbtn-n {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "PWRBTN#";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		button-slp-btn-n {</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			label = "SLP_BTN#";</div><div class='hunk'>@@ -85,7 +91,7 @@</div><div class='ctx'> 			clock-frequency = &lt;24576000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -94,7 +100,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_baseboard: vcc3v3-baseboard {</div><div class='add'>+	vcc3v3_baseboard: regulator-vcc3v3-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -104,7 +110,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_baseboard: vcc5v0-baseboard {</div><div class='add'>+	vcc5v0_baseboard: regulator-vcc5v0-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -114,7 +120,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -124,7 +130,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdda_codec: vdda-codec {</div><div class='add'>+	vdda_codec: regulator-vdda-codec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdda_codec";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -133,7 +139,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_baseboard&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vddd_codec: vddd-codec {</div><div class='add'>+	vddd_codec: regulator-vddd-codec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vddd_codec";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -143,8 +149,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gmac {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;hdmi {</div><div class='del'>-	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -180,9 +193,22 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c6 {</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		compatible = "atmel,24c01";</div><div class='add'>+		pagesize = &lt;8&gt;;</div><div class='add'>+		size = &lt;128&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s2 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie_phy {</div><div class='hunk'>@@ -203,6 +229,8 @@</div><div class='ctx'> 	buttons {</div><div class='ctx'> 		haikou_keys_pin: haikou-keys-pin {</div><div class='ctx'> 			rockchip,pins =</div><div class='add'>+			  /* PWRBTN# */</div><div class='add'>+			  &lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='ctx'> 			  /* LID_BTN */</div><div class='ctx'> 			  &lt;0 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='ctx'> 			  /* BATLOW# */</div><div class='hunk'>@@ -284,14 +312,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;vopb {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi<br/>index 650b1ba9c192..587e89d7fc5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gmac;</div><div class='add'>+		i2c10 = &amp;i2c10;</div><div class='ctx'> 		mmc0 = &amp;sdhci;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +40,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v2_phy: vcc1v2-phy {</div><div class='add'>+	vcc1v2_phy: regulator-vcc1v2-phy {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v2_phy";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -49,7 +50,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -59,17 +60,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpio = &lt;&amp;gpio4 RK_PA3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='del'>-		regulator-name = "vcc5v0_host";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -78,7 +69,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca_0v9: vcca-0v9-regulator {</div><div class='add'>+	vcca_0v9: regulator-vcca-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -88,7 +79,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca_1v8: vcca-1v8-regulator {</div><div class='add'>+	vcca_1v8: regulator-vcca-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -98,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -181,8 +172,7 @@</div><div class='ctx'> 	snps,reset-active-low;</div><div class='ctx'> 	snps,reset-delays-us = &lt;0 10000 50000&gt;;</div><div class='ctx'> 	tx_delay = &lt;0x10&gt;;</div><div class='del'>-	rx_delay = &lt;0x10&gt;;</div><div class='del'>-	status = "okay";</div><div class='add'>+	rx_delay = &lt;0x23&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gpu {</div><div class='hunk'>@@ -205,7 +195,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -388,19 +378,38 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi {</div><div class='add'>+	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c7 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 	fan: fan@18 {</div><div class='del'>-		compatible = "ti,amc6821";</div><div class='add'>+		compatible = "tsd,mule", "ti,amc6821";</div><div class='ctx'> 		reg = &lt;0x18&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	rtc_twi: rtc@6f {</div><div class='del'>-		compatible = "isil,isl1208";</div><div class='del'>-		reg = &lt;0x6f&gt;;</div><div class='add'>+		i2c-mux {</div><div class='add'>+			compatible = "tsd,mule-i2c-mux";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@0 {</div><div class='add'>+				reg = &lt;0x0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				rtc_twi: rtc@6f {</div><div class='add'>+					compatible = "isil,isl1208";</div><div class='add'>+					reg = &lt;0x6f&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -427,7 +436,6 @@</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;i2s0_2ch_bus_bclk_off&gt;;</div><div class='ctx'> 	rockchip,playback-channels = &lt;2&gt;;</div><div class='ctx'> 	rockchip,capture-channels = &lt;2&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -509,10 +517,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb2 {</div><div class='del'>-		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+	usb {</div><div class='add'>+		cy3304_reset: cy3304-reset {</div><div class='ctx'> 			rockchip,pins =</div><div class='del'>-			  &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+			  &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_output_high&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -577,11 +585,6 @@</div><div class='ctx'> 	u2phy1_otg: otg-port {</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	u2phy1_host: host-port {</div><div class='del'>-		phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbdrd3_1 {</div><div class='hunk'>@@ -591,12 +594,27 @@</div><div class='ctx'> &amp;usbdrd_dwc3_1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	dr_mode = "host";</div><div class='del'>-};</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;cy3304_reset&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb4b4,6502", "usb4b4,6506";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vcc1v2_phy&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> </div><div class='del'>-&amp;usb_host1_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-&amp;usb_host1_ohci {</div><div class='del'>-	status = "okay";</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb4b4,6500", "usb4b4,6504";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vcc1v2_phy&gt;;</div><div class='add'>+		vdd2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts<br/>index 9447c8724b65..ce057e2db242 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* MP8009 PoE PD */</div><div class='del'>-	poe_12v: poe-12v {</div><div class='add'>+	poe_12v: regulator-poe-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "poe_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_ngff: vcc3v3-ngff {</div><div class='add'>+	vcc3v3_ngff: regulator-vcc3v3-ngff {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_ngff";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;sys_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		enable-active-high;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts<br/>index 7ba1c28f70a9..8e3858cf988c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 	model = "Firefly ROC-RK3399-PC-PLUS Board";</div><div class='ctx'> 	compatible = "firefly,roc-rk3399-pc-plus", "rockchip,rk3399";</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 			"Headphone Amp INR", "ROUT2",</div><div class='ctx'> 			"Headphones", "Headphone Amp OUTL",</div><div class='ctx'> 			"Headphones", "Headphone Amp OUTR";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio2 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio2 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;headphones_amp&gt;;</div><div class='ctx'> 		simple-audio-card,pin-switches = "Headphones";</div><div class='ctx'> </div><div class='hunk'>@@ -112,9 +112,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	es8388: es8388@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='ctx'> 		clocks = &lt;&amp;cru SCLK_I2S_8CH_OUT&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi<br/>index d95b1cde1fc3..fc9279627ef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi</a></div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_vbus_typec0: vcc-vbus-typec0 {</div><div class='add'>+	vcc_vbus_typec0: regulator-vcc-vbus-typec0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_vbus_typec0";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -122,7 +122,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sys_12v: sys-12v {</div><div class='add'>+	sys_12v: regulator-sys-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "sys_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -141,7 +141,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -164,7 +164,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;sys_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca_0v9: vcca-0v9 {</div><div class='add'>+	vcca_0v9: regulator-vcca-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */</div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -185,7 +185,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_vbus_typec1: vcc-vbus-typec1 {</div><div class='add'>+	vcc_vbus_typec1: regulator-vcc-vbus-typec1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -196,7 +196,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -209,7 +209,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;sys_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='hunk'>@@ -298,7 +298,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -736,6 +736,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;30000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts<br/>index 475d57f64d58..962b8b231c96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts</a></div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_3v3: vcc-3v3-regulator {</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_3v3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_phy1: vcc3v3-phy1-regulator {</div><div class='add'>+	vcc3v3_phy1: regulator-vcc3v3-phy1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_phy1";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host1: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host1: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_host0_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec: vcc5v0-typec-regulator {</div><div class='add'>+	vcc5v0_typec: regulator-vcc5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log-regulator {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_log";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -220,7 +220,7 @@</div><div class='ctx'> 		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;i2s_8ch_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='hunk'>@@ -421,7 +421,6 @@</div><div class='ctx'> 		compatible = "silergy,syr827";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='ctx'> 		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-compatible = "fan53555-reg";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vsel1_gpio&gt;;</div><div class='ctx'> 		vsel-gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-name = "vdd_cpu_b";</div><div class='hunk'>@@ -440,7 +439,6 @@</div><div class='ctx'> 		compatible = "silergy,syr828";</div><div class='ctx'> 		reg = &lt;0x41&gt;;</div><div class='ctx'> 		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-compatible = "fan53555-reg";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vsel2_gpio&gt;;</div><div class='ctx'> 		vsel-gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		regulator-name = "vdd_gpu";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi<br/>index 9666504cd1c1..046dbe329017 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 	sdio_pwrseq: sdio-pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rk808 1&gt;;</div><div class='del'>-		clock-names = "lpo";</div><div class='add'>+		clock-names = "ext_clock";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -72,7 +72,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_typec: vbus-typec-regulator {</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: dc-12v {</div><div class='add'>+	vcc12v_dcin: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lan: vcc3v3-lan-regulator {</div><div class='add'>+	vcc3v3_lan: regulator-vcc3v3-lan {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lan";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_0v9: vcc-0v9 {</div><div class='add'>+	vcc_0v9: regulator-vcc-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -155,7 +155,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts<br/>index 725ac3c1f6f6..4fc9c13dbec1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a-plus.dts</a></div><div class='hunk'>@@ -21,5 +21,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sound {</div><div class='del'>-	hp-det-gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	hp-det-gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts<br/>index 682e8b7297c1..9c741d1a3047 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b-plus.dts</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sound {</div><div class='del'>-	hp-det-gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	hp-det-gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts<br/>index 82ad2ca6b5c2..5dc5505b58e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sound {</div><div class='del'>-	hp-det-gpio = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	hp-det-gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spi1 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi<br/>index 8146f870d2bd..7b1086682d11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_s0: vcc1v8-s0 {</div><div class='add'>+	vcc1v8_s0: regulator-vcc1v8-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_0v9: vcc-0v9 {</div><div class='add'>+	vcc_0v9: regulator-vcc-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -186,7 +186,7 @@</div><div class='ctx'> 		interrupts = &lt;21 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='hunk'>@@ -576,7 +576,7 @@</div><div class='ctx'> 	bluetooth {</div><div class='ctx'> 		compatible = "brcm,bcm43438-bt";</div><div class='ctx'> 		clocks = &lt;&amp;rk808 1&gt;;</div><div class='del'>-		clock-names = "ext_clock";</div><div class='add'>+		clock-names = "txco";</div><div class='ctx'> 		device-wakeup-gpios = &lt;&amp;gpio2 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		host-wakeup-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		shutdown-gpios = &lt;&amp;gpio0 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso<br/>new file mode 100644<br/>index 000000000000..dabe535f2111<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 Peter Robinson &lt;pbrobinson@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	avdd: regulator-avdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "avdd";</div><div class='add'>+		regulator-min-microvolt = &lt;11000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;11000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;5&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 1000000 0&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	touch: touchscreen@5d {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x5d&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc3v0_touch&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc3v0_touch&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio4 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_dsi {</div><div class='add'>+	clock-master;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mipi_panel: panel@0 {</div><div class='add'>+		compatible = "feiyang,fy07024di26a30d";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;avdd&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;vcc3v3_s0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipi_out {</div><div class='add'>+	mipi_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi<br/>index 11d99d8b34a2..8b72ae6449c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi</a></div><div class='hunk'>@@ -20,15 +20,6 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* enable for panel backlight support */</div><div class='del'>-	backlight: backlight {</div><div class='del'>-		compatible = "pwm-backlight";</div><div class='del'>-		brightness-levels = &lt;0 4 8 16 32 64 128 255&gt;;</div><div class='del'>-		default-brightness-level = &lt;5&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm0 0 1000000 0&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	clkin_gmac: external-gmac-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-frequency = &lt;125000000&gt;;</div><div class='hunk'>@@ -116,15 +107,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd: avdd-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "avdd";</div><div class='del'>-		regulator-min-microvolt = &lt;11000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;11000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc3v3_s0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc12v_dcin: vcc12v-dcin {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -134,7 +117,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -145,7 +128,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* micro SD card power */</div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -162,7 +145,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -174,7 +157,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -185,7 +168,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */</div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -196,7 +179,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec: vcc5v0-typec-regulator {</div><div class='add'>+	vcc5v0_typec: regulator-vcc5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -207,7 +190,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -217,7 +200,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -227,7 +210,17 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vcca_0v9: regulator-vcca-0v9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -312,6 +305,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vcca_0v9&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='ctx'> 	ddc-i2c-bus = &lt;&amp;i2c3&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;hdmi_cec&gt;;</div><div class='hunk'>@@ -342,7 +337,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -578,19 +573,6 @@</div><div class='ctx'> 		vbus-supply = &lt;&amp;vcc5v0_typec&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	/* enable for pine64 touch screen support */</div><div class='del'>-	touch: touchscreen@5d {</div><div class='del'>-		compatible = "goodix,gt911";</div><div class='del'>-		reg = &lt;0x5d&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;RK_PD5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		AVDD28-supply = &lt;&amp;vcc3v0_touch&gt;;</div><div class='del'>-		VDDIO-supply = &lt;&amp;vcc3v0_touch&gt;;</div><div class='del'>-		irq-gpios = &lt;&amp;gpio4 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio4 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2s0 {</div><div class='hunk'>@@ -626,41 +608,13 @@</div><div class='ctx'> 	gpio1830-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* enable for pine64 panel display support */</div><div class='del'>-&amp;mipi_dsi {</div><div class='del'>-	clock-master;</div><div class='del'>-	status = "disabled";</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		mipi_out: port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			mipi_out_panel: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mipi_in_panel&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mipi_panel: panel@0 {</div><div class='del'>-		compatible = "feiyang,fy07024di26a30d";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		avdd-supply = &lt;&amp;avdd&gt;;</div><div class='del'>-		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-		dvdd-supply = &lt;&amp;vcc3v3_s0&gt;;</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			mipi_in_panel: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie0 {</div><div class='ctx'> 	ep-gpios = &lt;&amp;gpio2 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	num-lanes = &lt;4&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie_perst&gt;;</div><div class='add'>+	vpcie0v9-supply = &lt;&amp;vcca_0v9&gt;;</div><div class='add'>+	vpcie1v8-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='ctx'> 	vpcie12v-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -768,10 +722,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pwm0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pwm1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -836,6 +786,7 @@</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi<br/>new file mode 100644<br/>index 000000000000..e54f451af9f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-s.dtsi</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "rk3399-base.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cluster0_opp: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster1_opp: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000 1025000 1250000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp06 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-2 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp00 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp01 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;297000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp02 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp03 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp04 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp05 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts<br/>index dbec2b7173a0..a4ceafe6dd7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts</a></div><div class='hunk'>@@ -142,32 +142,24 @@</div><div class='ctx'> </div><div class='ctx'> &amp;edp {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		edp_out: port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			edp_out_panel: endpoint@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;edp_out {</div><div class='add'>+	edp_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	i2c-scl-rising-time-ns = &lt;300&gt;;</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;15&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	rt5651: rt5651@1a {</div><div class='del'>-		compatible = "rockchip,rt5651";</div><div class='add'>+		compatible = "realtek,rt5651";</div><div class='ctx'> 		reg = &lt;0x1a&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru SCLK_I2S_8CH_OUT&gt;;</div><div class='ctx'> 		clock-names = "mclk";</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		spk-con-gpio = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi<br/>index 31832aae9ab6..e5c4addb4837 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* switched by pmic_sleep */</div><div class='del'>-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {</div><div class='add'>+	vcc1v8_s3: vcca1v8_s3: regulator-vcc1v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v0_sd: vcc3v0-sd {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_typec0: vcc5v0-typec0-regulator {</div><div class='add'>+	vcc5v0_typec0: regulator-vcc5v0-typec0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_log: vdd-log {</div><div class='add'>+	vdd_log: regulator-vdd-log {</div><div class='ctx'> 		compatible = "pwm-regulator";</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 1&gt;;</div><div class='ctx'> 		pwm-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -233,7 +233,7 @@</div><div class='ctx'> 		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi<br/>index 8823c924dc1d..64e6ba345739 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 		mmc1 = &amp;sdmmc;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts<br/>new file mode 100644<br/>index 000000000000..6e21579365a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts</a></div><div class='hunk'>@@ -0,0 +1,464 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3528.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ArmSoM Sige1";</div><div class='add'>+	compatible = "armsom,sige1", "rockchip,rk3528";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio0;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "MASKROM";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;g_led&gt;, &lt;&amp;r_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc0v6_ddr: regulator-0v6-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc0v6_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;600000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_0v9: regulator-0v9-vdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-1v1-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-1v8-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_ddr: regulator-1v8-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-3v3-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd: regulator-3v3-vcc-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_pwren_l&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb1_host: regulator-5v0-vcc-usb1-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb20_host1_drv_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb1_host";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb20_host2_drv_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb2_host";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb20_otg0_drv_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_dcin: regulator-vcc-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccio_sd: regulator-vccio-sd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_vol_ctrl_h&gt;;</div><div class='add'>+		regulator-name = "vccio_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;, &lt;3300000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_arm";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;746000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1201000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_logic";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;705000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1006000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on_h&gt;, &lt;&amp;clkm1_32k_out&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PA6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii_miim&gt;, &lt;&amp;rgmii_tx_bus2&gt;, &lt;&amp;rgmii_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;rgmii_rgmii_clk&gt;, &lt;&amp;rgmii_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rstn_l&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth {</div><div class='add'>+		bt_reg_on_h: bt-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host_h: bt-wake-host-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt_h: host-wake-bt-h {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet {</div><div class='add'>+		gmac1_rstn_l: gmac1-rstn-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		g_led: g-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		r_led: r-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		rtc_int_l: rtc-int-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc_pwren_l: sdmmc-pwren-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb20_host1_drv_h: usb20-host1-drv-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb20_host2_drv_h: usb20-host2-drv-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb20_otg0_drv_h: usb20-otg0-drv-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_reg_on_h: wifi-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_wake_host_h: wifi-wake-host-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm3m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_DEEPSLOW&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_wake_host_h&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m1_xfer&gt;, &lt;&amp;uart2m1_ctsn&gt;, &lt;&amp;uart2m1_rtsn&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;cru CLK_DEEPSLOW&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio3 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on_h&gt;, &lt;&amp;bt_wake_host_h&gt;, &lt;&amp;host_wake_bt_h&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts<br/>new file mode 100644<br/>index 000000000000..9f683033c5f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts</a></div><div class='hunk'>@@ -0,0 +1,340 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3528.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "FriendlyElec NanoPi Zero2";</div><div class='add'>+	compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "MASK";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-1 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "RECOVERY";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led1&gt;, &lt;&amp;led_sys&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc0v6_ddr: regulator-0v6-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc0v6_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;600000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_0v9: regulator-0v9-vdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-1v1-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-1v8-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-3v3-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd: regulator-3v3-vcc-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_pwren_l&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb2_host_5v: regulator-5v0-usb2-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb20_host1_pwren&gt;;</div><div class='add'>+		regulator-name = "usb2_host_5v";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccio_sd: regulator-vccio-sd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_vol_ctrl_h&gt;;</div><div class='add'>+		regulator-name = "vccio_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;, &lt;3300000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_arm";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;746000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1201000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_logic";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;705000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1006000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii_miim&gt;, &lt;&amp;rgmii_tx_bus2&gt;, &lt;&amp;rgmii_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;rgmii_rgmii_clk&gt;, &lt;&amp;rgmii_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rstn_l&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ethernet {</div><div class='add'>+		gmac1_rstn_l: gmac1-rstn-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led1: led1 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_sys: led-sys {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		rtc_int_l: rtc-int-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc_pwren_l: sdmmc-pwren-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb20_host1_pwren: usb20-host1-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..59b75c91bbb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1397 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rockchip-pinconf.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file is auto generated by pin2dts tool, please keep these code</div><div class='add'>+ * by adding changes at end of this file.</div><div class='add'>+ */</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	arm {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		arm_pins: arm-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* arm_avs */</div><div class='add'>+				&lt;4 RK_PC4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clkm0_32k_out: clkm0-32k-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clkm0_32k_out */</div><div class='add'>+				&lt;3 RK_PC3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clkm1_32k_out: clkm1-32k-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clkm1_32k_out */</div><div class='add'>+				&lt;1 RK_PC3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_rstnout: emmc-rstnout {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_rstn */</div><div class='add'>+				&lt;1 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_bus8: emmc-bus8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_d0 */</div><div class='add'>+				&lt;1 RK_PC4 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d1 */</div><div class='add'>+				&lt;1 RK_PC5 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d2 */</div><div class='add'>+				&lt;1 RK_PC6 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d3 */</div><div class='add'>+				&lt;1 RK_PC7 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d4 */</div><div class='add'>+				&lt;1 RK_PD0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d5 */</div><div class='add'>+				&lt;1 RK_PD1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d6 */</div><div class='add'>+				&lt;1 RK_PD2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d7 */</div><div class='add'>+				&lt;1 RK_PD3 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_clk: emmc-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_clk */</div><div class='add'>+				&lt;1 RK_PD5 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_cmd: emmc-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_cmd */</div><div class='add'>+				&lt;1 RK_PD4 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_strb: emmc-strb {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_strb */</div><div class='add'>+				&lt;1 RK_PD7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth_pins: eth-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth_clk_25m_out */</div><div class='add'>+				&lt;3 RK_PB5 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fephy {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym0_led_dpx: fephym0-led-dpx {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_dpx_m0 */</div><div class='add'>+				&lt;4 RK_PB5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym0_led_link: fephym0-led-link {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_link_m0 */</div><div class='add'>+				&lt;4 RK_PC0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym0_led_spd: fephym0-led-spd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_spd_m0 */</div><div class='add'>+				&lt;4 RK_PB7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym1_led_dpx: fephym1-led-dpx {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_dpx_m1 */</div><div class='add'>+				&lt;2 RK_PA4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym1_led_link: fephym1-led-link {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_link_m1 */</div><div class='add'>+				&lt;2 RK_PA6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fephym1_led_spd: fephym1-led-spd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fephy_led_spd_m1 */</div><div class='add'>+				&lt;2 RK_PA5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_pins: fspi-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_clk */</div><div class='add'>+				&lt;1 RK_PD5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d0 */</div><div class='add'>+				&lt;1 RK_PC4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d1 */</div><div class='add'>+				&lt;1 RK_PC5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d2 */</div><div class='add'>+				&lt;1 RK_PC6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d3 */</div><div class='add'>+				&lt;1 RK_PC7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_csn0: fspi-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_csn0 */</div><div class='add'>+				&lt;1 RK_PD0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_csn1: fspi-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_csn1 */</div><div class='add'>+				&lt;1 RK_PD1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		gpu_pins: gpu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* gpu_avs */</div><div class='add'>+				&lt;4 RK_PC3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hdmi_pins: hdmi-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hdmi_tx_cec */</div><div class='add'>+				&lt;0 RK_PA3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* hdmi_tx_hpd */</div><div class='add'>+				&lt;0 RK_PA2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* hdmi_tx_scl */</div><div class='add'>+				&lt;0 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* hdmi_tx_sda */</div><div class='add'>+				&lt;0 RK_PA5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hsm {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hsmm0_pins: hsmm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hsm_clk_out_m0 */</div><div class='add'>+				&lt;2 RK_PA2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hsmm1_pins: hsmm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hsm_clk_out_m1 */</div><div class='add'>+				&lt;1 RK_PA4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c0m0_xfer: i2c0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c0_scl_m0 */</div><div class='add'>+				&lt;4 RK_PC4 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c0_sda_m0 */</div><div class='add'>+				&lt;4 RK_PC3 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c0m1_xfer: i2c0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c0_scl_m1 */</div><div class='add'>+				&lt;4 RK_PA1 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c0_sda_m1 */</div><div class='add'>+				&lt;4 RK_PA0 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m0_xfer: i2c1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m0 */</div><div class='add'>+				&lt;4 RK_PA3 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m0 */</div><div class='add'>+				&lt;4 RK_PA2 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m1_xfer: i2c1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m1 */</div><div class='add'>+				&lt;4 RK_PC5 4 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m1 */</div><div class='add'>+				&lt;4 RK_PC6 4 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m0_xfer: i2c2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m0 */</div><div class='add'>+				&lt;0 RK_PA4 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m0 */</div><div class='add'>+				&lt;0 RK_PA5 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m1_xfer: i2c2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m1 */</div><div class='add'>+				&lt;1 RK_PA5 3 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m1 */</div><div class='add'>+				&lt;1 RK_PA6 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m0_xfer: i2c3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m0 */</div><div class='add'>+				&lt;1 RK_PA0 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m0 */</div><div class='add'>+				&lt;1 RK_PA1 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m1_xfer: i2c3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m1 */</div><div class='add'>+				&lt;3 RK_PC1 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m1 */</div><div class='add'>+				&lt;3 RK_PC3 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4_xfer: i2c4-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl */</div><div class='add'>+				&lt;2 RK_PA0 4 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda */</div><div class='add'>+				&lt;2 RK_PA1 4 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m0_xfer: i2c5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m0 */</div><div class='add'>+				&lt;1 RK_PB2 3 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m0 */</div><div class='add'>+				&lt;1 RK_PB3 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m1_xfer: i2c5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m1 */</div><div class='add'>+				&lt;1 RK_PD2 3 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m1 */</div><div class='add'>+				&lt;1 RK_PD3 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m0_xfer: i2c6m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m0 */</div><div class='add'>+				&lt;3 RK_PB2 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m0 */</div><div class='add'>+				&lt;3 RK_PB3 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m1_xfer: i2c6m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m1 */</div><div class='add'>+				&lt;1 RK_PD4 3 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m1 */</div><div class='add'>+				&lt;1 RK_PD7 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c7_xfer: i2c7-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c7_scl */</div><div class='add'>+				&lt;2 RK_PA5 4 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c7_sda */</div><div class='add'>+				&lt;2 RK_PA6 4 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_lrck: i2s0m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_lrck_m0 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_mclk: i2s0m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_mclk_m0 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sclk: i2s0m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sclk_m0 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdi: i2s0m0-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0m0_sdi */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdo: i2s0m0-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0m0_sdo */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_lrck: i2s0m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_lrck_m1 */</div><div class='add'>+				&lt;1 RK_PB6 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_mclk: i2s0m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_mclk_m1 */</div><div class='add'>+				&lt;1 RK_PB4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sclk: i2s0m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sclk_m1 */</div><div class='add'>+				&lt;1 RK_PB5 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdi: i2s0m1-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0m1_sdi */</div><div class='add'>+				&lt;1 RK_PB7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdo: i2s0m1-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0m1_sdo */</div><div class='add'>+				&lt;1 RK_PC0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_lrck: i2s1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_lrck */</div><div class='add'>+				&lt;4 RK_PA6 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_mclk: i2s1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_mclk */</div><div class='add'>+				&lt;4 RK_PA4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sclk: i2s1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sclk */</div><div class='add'>+				&lt;4 RK_PA5 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdi0: i2s1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi0 */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdi1: i2s1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi1 */</div><div class='add'>+				&lt;4 RK_PB3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdi2: i2s1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi2 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdi3: i2s1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi3 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdo0: i2s1-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo0 */</div><div class='add'>+				&lt;4 RK_PA7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdo1: i2s1-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo1 */</div><div class='add'>+				&lt;4 RK_PB0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdo2: i2s1-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo2 */</div><div class='add'>+				&lt;4 RK_PB1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1_sdo3: i2s1-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo3 */</div><div class='add'>+				&lt;4 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	jtag {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm0_pins: jtagm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_cpu_tck_m0 */</div><div class='add'>+				&lt;2 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_cpu_tms_m0 */</div><div class='add'>+				&lt;2 RK_PA3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_mcu_tck_m0 */</div><div class='add'>+				&lt;2 RK_PA4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_mcu_tms_m0 */</div><div class='add'>+				&lt;2 RK_PA5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm1_pins: jtagm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_cpu_tck_m1 */</div><div class='add'>+				&lt;4 RK_PD0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_cpu_tms_m1 */</div><div class='add'>+				&lt;4 RK_PC7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_mcu_tck_m1 */</div><div class='add'>+				&lt;4 RK_PD0 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_mcu_tms_m1 */</div><div class='add'>+				&lt;4 RK_PC7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pciem0_pins: pciem0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie_clkreqn_m0 */</div><div class='add'>+				&lt;3 RK_PA6 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie_perstn_m0 */</div><div class='add'>+				&lt;3 RK_PB0 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie_waken_m0 */</div><div class='add'>+				&lt;3 RK_PA7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pciem1_pins: pciem1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie_clkreqn_m1 */</div><div class='add'>+				&lt;1 RK_PA0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie_perstn_m1 */</div><div class='add'>+				&lt;1 RK_PA2 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie_waken_m1 */</div><div class='add'>+				&lt;1 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_clk0: pdm-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk0 */</div><div class='add'>+				&lt;4 RK_PB5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_clk1: pdm-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk1 */</div><div class='add'>+				&lt;4 RK_PA4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_sdi0: pdm-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi0 */</div><div class='add'>+				&lt;4 RK_PB2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_sdi1: pdm-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi1 */</div><div class='add'>+				&lt;4 RK_PB1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_sdi2: pdm-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi2 */</div><div class='add'>+				&lt;4 RK_PB3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm_sdi3: pdm-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi3 */</div><div class='add'>+				&lt;4 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pmu_pins: pmu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pmu_debug */</div><div class='add'>+				&lt;4 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m0_pins: pwm0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_m0 */</div><div class='add'>+				&lt;4 RK_PC3 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m1_pins: pwm0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_m1 */</div><div class='add'>+				&lt;1 RK_PA2 5 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_pins: pwm1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_m0 */</div><div class='add'>+				&lt;4 RK_PC4 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_pins: pwm1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_m1 */</div><div class='add'>+				&lt;1 RK_PA3 4 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_pins: pwm2m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_m0 */</div><div class='add'>+				&lt;4 RK_PC5 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_pins: pwm2m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_m1 */</div><div class='add'>+				&lt;1 RK_PA7 2 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm3m0_pins: pwm3m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm3_m0 */</div><div class='add'>+				&lt;4 RK_PC6 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm3m1_pins: pwm3m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm3_m1 */</div><div class='add'>+				&lt;2 RK_PA4 3 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm4m0_pins: pwm4m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm4_m0 */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm4m1_pins: pwm4m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm4_m1 */</div><div class='add'>+				&lt;1 RK_PA4 2 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm5m0_pins: pwm5m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm5_m0 */</div><div class='add'>+				&lt;4 RK_PC0 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm5m1_pins: pwm5m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm5_m1 */</div><div class='add'>+				&lt;3 RK_PC3 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm6m0_pins: pwm6m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm6_m0 */</div><div class='add'>+				&lt;4 RK_PC1 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm6m1_pins: pwm6m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm6_m1 */</div><div class='add'>+				&lt;1 RK_PC3 3 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm6m2_pins: pwm6m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm6_m2 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm7m0_pins: pwm7m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm7_m0 */</div><div class='add'>+				&lt;4 RK_PC2 1 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm7m1_pins: pwm7m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm7_m1 */</div><div class='add'>+				&lt;1 RK_PC2 2 &amp;pcfg_pull_none_drv_level_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwr {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwr_pins: pwr-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwr_ctrl0 */</div><div class='add'>+				&lt;4 RK_PC2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pwr_ctrl1 */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ref {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		refm0_pins: refm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk_out_m0 */</div><div class='add'>+				&lt;0 RK_PA1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		refm1_pins: refm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk_out_m1 */</div><div class='add'>+				&lt;3 RK_PC3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rgmii {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_miim: rgmii-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_mdc */</div><div class='add'>+				&lt;3 RK_PB6 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* rgmii_mdio */</div><div class='add'>+				&lt;3 RK_PB7 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_rx_bus2: rgmii-rx-bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd0 */</div><div class='add'>+				&lt;3 RK_PA3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd1 */</div><div class='add'>+				&lt;3 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxdv_crs */</div><div class='add'>+				&lt;3 RK_PC2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_tx_bus2: rgmii-tx-bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_txd0 */</div><div class='add'>+				&lt;3 RK_PA1 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* rgmii_txd1 */</div><div class='add'>+				&lt;3 RK_PA0 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* rgmii_txen */</div><div class='add'>+				&lt;3 RK_PC0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_rgmii_clk: rgmii-rgmii-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxclk */</div><div class='add'>+				&lt;3 RK_PA5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txclk */</div><div class='add'>+				&lt;3 RK_PA4 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_rgmii_bus: rgmii-rgmii-bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd2 */</div><div class='add'>+				&lt;3 RK_PA7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd3 */</div><div class='add'>+				&lt;3 RK_PA6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd2 */</div><div class='add'>+				&lt;3 RK_PB1 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* rgmii_txd3 */</div><div class='add'>+				&lt;3 RK_PB0 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_clk: rgmii-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_clk */</div><div class='add'>+				&lt;3 RK_PB4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmii_txer: rgmii-txer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_txer */</div><div class='add'>+				&lt;3 RK_PC1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scr {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		scrm0_pins: scrm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* scr_clk_m0 */</div><div class='add'>+				&lt;1 RK_PA2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_data_m0 */</div><div class='add'>+				&lt;1 RK_PA1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_detn_m0 */</div><div class='add'>+				&lt;1 RK_PA0 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_rstn_m0 */</div><div class='add'>+				&lt;1 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		scrm1_pins: scrm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* scr_clk_m1 */</div><div class='add'>+				&lt;2 RK_PA5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_data_m1 */</div><div class='add'>+				&lt;2 RK_PA3 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_detn_m1 */</div><div class='add'>+				&lt;2 RK_PA6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* scr_rstn_m1 */</div><div class='add'>+				&lt;2 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio0_bus4: sdio0-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio0_d0 */</div><div class='add'>+				&lt;1 RK_PA0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio0_d1 */</div><div class='add'>+				&lt;1 RK_PA1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio0_d2 */</div><div class='add'>+				&lt;1 RK_PA2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio0_d3 */</div><div class='add'>+				&lt;1 RK_PA3 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio0_clk: sdio0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio0_clk */</div><div class='add'>+				&lt;1 RK_PA5 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio0_cmd: sdio0-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio0_cmd */</div><div class='add'>+				&lt;1 RK_PA4 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio0_det: sdio0-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio0_det */</div><div class='add'>+				&lt;1 RK_PA6 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio0_pwren: sdio0-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio0_pwren */</div><div class='add'>+				&lt;1 RK_PA7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio1_bus4: sdio1-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio1_d0 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio1_d1 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio1_d2 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdio1_d3 */</div><div class='add'>+				&lt;3 RK_PB1 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio1_clk: sdio1-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio1_clk */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio1_cmd: sdio1-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio1_cmd */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio1_det: sdio1-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio1_det */</div><div class='add'>+				&lt;3 RK_PB3 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdio1_pwren: sdio1-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdio1_pwren */</div><div class='add'>+				&lt;3 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc_bus4: sdmmc-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc_d0 */</div><div class='add'>+				&lt;2 RK_PA0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc_d1 */</div><div class='add'>+				&lt;2 RK_PA1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc_d2 */</div><div class='add'>+				&lt;2 RK_PA2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc_d3 */</div><div class='add'>+				&lt;2 RK_PA3 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc_clk: sdmmc-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc_clk */</div><div class='add'>+				&lt;2 RK_PA5 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc_cmd: sdmmc-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc_cmd */</div><div class='add'>+				&lt;2 RK_PA4 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc_det: sdmmc-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc_detn */</div><div class='add'>+				&lt;2 RK_PA6 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc_pwren: sdmmc-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc_pwren */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_pins: spdifm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m0 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_pins: spdifm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m1 */</div><div class='add'>+				&lt;1 RK_PC3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_pins: spdifm2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m2 */</div><div class='add'>+				&lt;3 RK_PC3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0_pins: spi0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk */</div><div class='add'>+				&lt;4 RK_PB4 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* spi0_miso */</div><div class='add'>+				&lt;4 RK_PB3 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* spi0_mosi */</div><div class='add'>+				&lt;4 RK_PB2 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0_csn0: spi0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_csn0 */</div><div class='add'>+				&lt;4 RK_PB6 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0_csn1: spi0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_csn1 */</div><div class='add'>+				&lt;4 RK_PC1 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1_pins: spi1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk */</div><div class='add'>+				&lt;1 RK_PB6 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* spi1_miso */</div><div class='add'>+				&lt;1 RK_PC0 2 &amp;pcfg_pull_none_drv_level_2&gt;,</div><div class='add'>+				/* spi1_mosi */</div><div class='add'>+				&lt;1 RK_PB7 2 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1_csn0: spi1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_csn0 */</div><div class='add'>+				&lt;1 RK_PC1 1 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1_csn1: spi1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_csn1 */</div><div class='add'>+				&lt;1 RK_PC2 1 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsi0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsi0_pins: tsi0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsi0_clkin */</div><div class='add'>+				&lt;3 RK_PB2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d0 */</div><div class='add'>+				&lt;3 RK_PB1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d1 */</div><div class='add'>+				&lt;3 RK_PB5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d2 */</div><div class='add'>+				&lt;3 RK_PB6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d3 */</div><div class='add'>+				&lt;3 RK_PB7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d4 */</div><div class='add'>+				&lt;3 RK_PA3 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d5 */</div><div class='add'>+				&lt;3 RK_PA2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d6 */</div><div class='add'>+				&lt;3 RK_PA1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_d7 */</div><div class='add'>+				&lt;3 RK_PA0 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_fail */</div><div class='add'>+				&lt;3 RK_PC0 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_sync */</div><div class='add'>+				&lt;3 RK_PB4 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi0_valid */</div><div class='add'>+				&lt;3 RK_PB3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsi1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsi1_pins: tsi1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsi1_clkin */</div><div class='add'>+				&lt;3 RK_PA5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi1_d0 */</div><div class='add'>+				&lt;3 RK_PA4 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi1_sync */</div><div class='add'>+				&lt;3 RK_PA7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* tsi1_valid */</div><div class='add'>+				&lt;3 RK_PA6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m0_xfer: uart0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m0 */</div><div class='add'>+				&lt;4 RK_PC7 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m0 */</div><div class='add'>+				&lt;4 RK_PD0 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m1_xfer: uart0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m1 */</div><div class='add'>+				&lt;2 RK_PA0 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m1 */</div><div class='add'>+				&lt;2 RK_PA1 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_xfer: uart1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m0 */</div><div class='add'>+				&lt;4 RK_PA7 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m0 */</div><div class='add'>+				&lt;4 RK_PA6 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_xfer: uart1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m1 */</div><div class='add'>+				&lt;4 RK_PC6 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m1 */</div><div class='add'>+				&lt;4 RK_PC5 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1_ctsn: uart1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_ctsn */</div><div class='add'>+				&lt;4 RK_PA4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1_rtsn: uart1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rtsn */</div><div class='add'>+				&lt;4 RK_PA5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_xfer: uart2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m0 */</div><div class='add'>+				&lt;3 RK_PA0 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m0 */</div><div class='add'>+				&lt;3 RK_PA1 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_ctsn: uart2m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_ctsn */</div><div class='add'>+				&lt;3 RK_PA3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_rtsn: uart2m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_rtsn */</div><div class='add'>+				&lt;3 RK_PA2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_xfer: uart2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m1 */</div><div class='add'>+				&lt;1 RK_PB0 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m1 */</div><div class='add'>+				&lt;1 RK_PB1 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_ctsn: uart2m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_ctsn */</div><div class='add'>+				&lt;1 RK_PB3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_rtsn: uart2m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_rtsn */</div><div class='add'>+				&lt;1 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_xfer: uart3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m0 */</div><div class='add'>+				&lt;4 RK_PB0 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m0 */</div><div class='add'>+				&lt;4 RK_PB1 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_xfer: uart3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m1 */</div><div class='add'>+				&lt;4 RK_PB7 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m1 */</div><div class='add'>+				&lt;4 RK_PC0 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3_ctsn: uart3-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_ctsn */</div><div class='add'>+				&lt;4 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3_rtsn: uart3-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rtsn */</div><div class='add'>+				&lt;4 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4_xfer: uart4-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx */</div><div class='add'>+				&lt;2 RK_PA2 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx */</div><div class='add'>+				&lt;2 RK_PA3 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4_ctsn: uart4-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_ctsn */</div><div class='add'>+				&lt;2 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4_rtsn: uart4-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rtsn */</div><div class='add'>+				&lt;2 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_xfer: uart5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m0 */</div><div class='add'>+				&lt;1 RK_PA2 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m0 */</div><div class='add'>+				&lt;1 RK_PA3 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_ctsn: uart5m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_ctsn */</div><div class='add'>+				&lt;1 RK_PA6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_rtsn: uart5m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_rtsn */</div><div class='add'>+				&lt;1 RK_PA5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_xfer: uart5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m1 */</div><div class='add'>+				&lt;1 RK_PD4 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m1 */</div><div class='add'>+				&lt;1 RK_PD7 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_ctsn: uart5m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_ctsn */</div><div class='add'>+				&lt;1 RK_PD3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_rtsn: uart5m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_rtsn */</div><div class='add'>+				&lt;1 RK_PD2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_xfer: uart6m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m0 */</div><div class='add'>+				&lt;3 RK_PA7 4 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m0 */</div><div class='add'>+				&lt;3 RK_PA6 4 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_xfer: uart6m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m1 */</div><div class='add'>+				&lt;3 RK_PC3 4 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m1 */</div><div class='add'>+				&lt;3 RK_PC1 4 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6_ctsn: uart6-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_ctsn */</div><div class='add'>+				&lt;3 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6_rtsn: uart6-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rtsn */</div><div class='add'>+				&lt;3 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_xfer: uart7m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m0 */</div><div class='add'>+				&lt;3 RK_PB3 4 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m0 */</div><div class='add'>+				&lt;3 RK_PB2 4 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_ctsn: uart7m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_ctsn */</div><div class='add'>+				&lt;3 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_rtsn: uart7m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_rtsn */</div><div class='add'>+				&lt;3 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_xfer: uart7m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m1 */</div><div class='add'>+				&lt;1 RK_PB3 4 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m1 */</div><div class='add'>+				&lt;1 RK_PB2 4 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_ctsn: uart7m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m1_ctsn */</div><div class='add'>+				&lt;1 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_rtsn: uart7m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m1_rtsn */</div><div class='add'>+				&lt;1 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts<br/>new file mode 100644<br/>index 000000000000..12eec2c1db22<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts</a></div><div class='hunk'>@@ -0,0 +1,310 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd</div><div class='add'>+ * Copyright (c) 2024 Radxa Limited</div><div class='add'>+ * Copyright (c) 2024 Yao Zi &lt;ziyao@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3528.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa E20C";</div><div class='add'>+	compatible = "radxa,e20c", "rockchip,rk3528";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "MASKROM";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;user_key&gt;;</div><div class='add'>+</div><div class='add'>+		button-user {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "USER";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_led_g&gt;, &lt;&amp;sys_led_g&gt;, &lt;&amp;wan_led_g&gt;;</div><div class='add'>+</div><div class='add'>+		led-lan {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-sys {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PC1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-wan {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_0v9: regulator-0v9-vdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-1v1-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-1v8-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-3v3-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccio_sd: regulator-vccio-sd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_vol_ctrl_h&gt;;</div><div class='add'>+		regulator-name = "vccio_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;, &lt;3300000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_arm";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;746000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1201000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_logic";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;705000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1006000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii_miim&gt;, &lt;&amp;rgmii_tx_bus2&gt;, &lt;&amp;rgmii_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;rgmii_rgmii_clk&gt;, &lt;&amp;rgmii_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "belling,bl24c16a", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rstn_l&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ethernet {</div><div class='add'>+		gmac1_rstn_l: gmac1-rstn-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		user_key: user-key {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		lan_led_g: lan-led-g {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_led_g: sys-led-g {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_g: wan-led-g {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi<br/>new file mode 100644<br/>index 000000000000..aedc7ee9ee46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,293 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3528.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "MASKROM";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_led_b&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_0v9: regulator-0v9-vdd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ddr: regulator-1v1-vcc-ddr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ddr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-1v8-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-3v3-vcc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_wifi: regulator-3v3-vcc-wifi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_wifi_pwr&gt;;</div><div class='add'>+		regulator-name = "vcc_wifi";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb20: regulator-5v0-vcc-usb20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb20";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccio_sd: regulator-vccio-sd {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc_vol_ctrl_h&gt;;</div><div class='add'>+		regulator-name = "vccio_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;, &lt;3300000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_arm: regulator-vdd-arm {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_arm";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;746000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1201000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		regulator-name = "vdd_logic";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;705000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1006000&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-wlan";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on_h&gt;;</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_arm&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_logic&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "belling,bl24c16a", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth {</div><div class='add'>+		bt_wake_host_h: bt-wake-host-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt_h: host-wake-bt-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		state_led_b: state-led-b {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_en: usb-host-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		usb_wifi_pwr: usb-wifi-pwr {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_reg_on_h: wifi-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_wake_host_h: wifi-wake-host-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;100000000&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts<br/>new file mode 100644<br/>index 000000000000..c03ae1dd3456<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3528-rock-2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 2A";</div><div class='add'>+	compatible = "radxa,rock-2a", "rockchip,rk3528";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb30_otg: regulator-5v0-vcc-usb30-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb30_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii_miim&gt;, &lt;&amp;rgmii_tx_bus2&gt;, &lt;&amp;rgmii_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;rgmii_rgmii_clk&gt;, &lt;&amp;rgmii_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;leds {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;state_led_b&gt;, &lt;&amp;sys_led_g&gt;;</div><div class='add'>+</div><div class='add'>+	led-1 {</div><div class='add'>+		color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+		default-state = "on";</div><div class='add'>+		function = LED_FUNCTION_STATUS;</div><div class='add'>+		gpios = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		linux,default-trigger = "default-on";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rstn_l&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	ethernet {</div><div class='add'>+		gmac1_rstn_l: gmac1-rstn-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		sys_led_g: sys-led-g {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_otg_en: usb-otg-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts<br/>new file mode 100644<br/>index 000000000000..3e2b9b685cb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3528-rock-2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 2F";</div><div class='add'>+	compatible = "radxa,rock-2f", "rockchip,rk3528";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi<br/>new file mode 100644<br/>index 000000000000..d5f8f7b9bf01<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3528.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3528.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1178 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2024 Yao Zi &lt;ziyao@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/rockchip,rk3528-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/rockchip,rk3528-power.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/rockchip,rk3528-cru.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "rockchip,rk3528";</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		gpio4 = &amp;gpio4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPU&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPU&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPU&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPU&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi: scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			arm,smc-id = &lt;0x82000010&gt;;</div><div class='add'>+			shmem = &lt;&amp;scmi_shmem&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_opp_table: opp-table-cpu {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;975000 975000 1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1037500 1037500 1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1100000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-gpu {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1000000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-500000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;875000 875000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl: pinctrl {</div><div class='add'>+		compatible = "rockchip,rk3528-pinctrl";</div><div class='add'>+		rockchip,grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@ff610000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xff610000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO0&gt;, &lt;&amp;cru DBCLK_GPIO0&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 32&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@ffaf0000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffaf0000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO1&gt;, &lt;&amp;cru DBCLK_GPIO1&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 32 32&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@ffb00000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffb00000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO2&gt;, &lt;&amp;cru DBCLK_GPIO2&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 64 32&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@ffb10000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffb10000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO3&gt;, &lt;&amp;cru DBCLK_GPIO3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 96 32&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@ffb20000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffb20000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO4&gt;, &lt;&amp;cru DBCLK_GPIO4&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 128 32&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scmi_shmem: shmem@10f000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xin24m: clock-xin24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xin24m";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac0_clk: clock-gmac50m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;50000000&gt;;</div><div class='add'>+		clock-output-names = "gmac0";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@fed01000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x0 0xfed01000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0xfed02000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xfed04000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xfed06000 0 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |</div><div class='add'>+						 IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_crypto_a: qos@ff200000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_crypto_p: qos@ff200080 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dcf: qos@ff200100 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dft2apb: qos@ff200200 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dma2ddr: qos@ff200280 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200280 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dmac: qos@ff200300 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200300 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_keyreader: qos@ff200380 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff200380 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_cpu: qos@ff210000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff210000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_debug: qos@ff210080 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff210080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gpu_m0: qos@ff220000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff220000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gpu_m1: qos@ff220080 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff220080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_pmu_mcu: qos@ff240000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff240000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rkvdec: qos@ff250000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff250000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rkvenc: qos@ff260000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff260000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gmac0: qos@ff270000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_hdcp: qos@ff270080 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_jpegdec: qos@ff270100 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga2_m0ro: qos@ff270200 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga2_m0wo: qos@ff270280 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270280 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdmmc0: qos@ff270300 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270300 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_usb2host: qos@ff270380 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270380 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vdpp: qos@ff270480 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270480 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vop: qos@ff270500 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff270500 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_emmc: qos@ff280000 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_fspi: qos@ff280080 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gmac1: qos@ff280100 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_pcie: qos@ff280180 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280180 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdio0: qos@ff280200 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdio1: qos@ff280280 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280280 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_tsp: qos@ff280300 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280300 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_usb3otg: qos@ff280380 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280380 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vpu: qos@ff280400 {</div><div class='add'>+			compatible = "rockchip,rk3528-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff280400 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vpu_grf: syscon@ff340000 {</div><div class='add'>+			compatible = "rockchip,rk3528-vpu-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff340000 0x0 0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pipe_phy_grf: syscon@ff348000 {</div><div class='add'>+			compatible = "rockchip,rk3528-pipe-phy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff348000 0x0 0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vo_grf: syscon@ff360000 {</div><div class='add'>+			compatible = "rockchip,rk3528-vo-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff360000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cru: clock-controller@ff4a0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-cru";</div><div class='add'>+			reg = &lt;0x0 0xff4a0000 0x0 0x30000&gt;;</div><div class='add'>+			assigned-clocks =</div><div class='add'>+				&lt;&amp;cru XIN_OSC0_DIV&gt;, &lt;&amp;cru PLL_GPLL&gt;,</div><div class='add'>+				&lt;&amp;cru PLL_PPLL&gt;, &lt;&amp;cru PLL_CPLL&gt;,</div><div class='add'>+				&lt;&amp;cru ARMCLK&gt;, &lt;&amp;cru CLK_MATRIX_250M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_500M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_50M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_100M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_150M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_200M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_300M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_339M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_400M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_MATRIX_600M_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_PPLL_50M_MATRIX&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_PPLL_100M_MATRIX&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_PPLL_125M_MATRIX&gt;,</div><div class='add'>+				&lt;&amp;cru ACLK_BUS_VOPGL_ROOT&gt;;</div><div class='add'>+			assigned-clock-rates =</div><div class='add'>+				&lt;32768&gt;, &lt;1188000000&gt;,</div><div class='add'>+				&lt;1000000000&gt;, &lt;996000000&gt;,</div><div class='add'>+				&lt;408000000&gt;, &lt;250000000&gt;,</div><div class='add'>+				&lt;500000000&gt;,</div><div class='add'>+				&lt;50000000&gt;,</div><div class='add'>+				&lt;100000000&gt;,</div><div class='add'>+				&lt;150000000&gt;,</div><div class='add'>+				&lt;200000000&gt;,</div><div class='add'>+				&lt;300000000&gt;,</div><div class='add'>+				&lt;340000000&gt;,</div><div class='add'>+				&lt;400000000&gt;,</div><div class='add'>+				&lt;600000000&gt;,</div><div class='add'>+				&lt;50000000&gt;,</div><div class='add'>+				&lt;100000000&gt;,</div><div class='add'>+				&lt;125000000&gt;,</div><div class='add'>+				&lt;500000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;xin24m&gt;, &lt;&amp;gmac0_clk&gt;;</div><div class='add'>+			clock-names = "xin24m", "gmac0";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ioc_grf: syscon@ff540000 {</div><div class='add'>+			compatible = "rockchip,rk3528-ioc-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff540000 0x0 0x40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu: power-management@ff600000 {</div><div class='add'>+			compatible = "rockchip,rk3528-pmu", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0xff600000 0x0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			power: power-controller {</div><div class='add'>+				compatible = "rockchip,rk3528-power-controller";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				/* These power domains are grouped by VD_GPU */</div><div class='add'>+				power-domain@RK3528_PD_GPU {</div><div class='add'>+					reg = &lt;RK3528_PD_GPU&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_GPU_MALI&gt;,</div><div class='add'>+						 &lt;&amp;cru PCLK_GPU_ROOT&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_gpu_m0&gt;,</div><div class='add'>+						 &lt;&amp;qos_gpu_m1&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* These power domains are grouped by VD_LOGIC */</div><div class='add'>+				power-domain@RK3528_PD_RKVDEC {</div><div class='add'>+					reg = &lt;RK3528_PD_RKVDEC&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_rkvdec&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+				power-domain@RK3528_PD_RKVENC {</div><div class='add'>+					reg = &lt;RK3528_PD_RKVENC&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_rkvenc&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				power-domain@RK3528_PD_VO {</div><div class='add'>+					reg = &lt;RK3528_PD_VO&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_gmac0&gt;,</div><div class='add'>+						 &lt;&amp;qos_hdcp&gt;,</div><div class='add'>+						 &lt;&amp;qos_jpegdec&gt;,</div><div class='add'>+						 &lt;&amp;qos_rga2_m0ro&gt;,</div><div class='add'>+						 &lt;&amp;qos_rga2_m0wo&gt;,</div><div class='add'>+						 &lt;&amp;qos_sdmmc0&gt;,</div><div class='add'>+						 &lt;&amp;qos_usb2host&gt;,</div><div class='add'>+						 &lt;&amp;qos_vdpp&gt;,</div><div class='add'>+						 &lt;&amp;qos_vop&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+				power-domain@RK3528_PD_VPU {</div><div class='add'>+					reg = &lt;RK3528_PD_VPU&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_emmc&gt;,</div><div class='add'>+						 &lt;&amp;qos_fspi&gt;,</div><div class='add'>+						 &lt;&amp;qos_gmac1&gt;,</div><div class='add'>+						 &lt;&amp;qos_pcie&gt;,</div><div class='add'>+						 &lt;&amp;qos_sdio0&gt;,</div><div class='add'>+						 &lt;&amp;qos_sdio1&gt;,</div><div class='add'>+						 &lt;&amp;qos_tsp&gt;,</div><div class='add'>+						 &lt;&amp;qos_usb3otg&gt;,</div><div class='add'>+						 &lt;&amp;qos_vpu&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@ff700000 {</div><div class='add'>+			compatible = "rockchip,rk3528-mali", "arm,mali-450";</div><div class='add'>+			reg = &lt;0x0 0xff700000 0x0 0x40000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cru ACLK_GPU_MALI&gt;,</div><div class='add'>+					  &lt;&amp;scmi_clk SCMI_CLK_GPU&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;297000000&gt;, &lt;300000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_GPU_MALI&gt;, &lt;&amp;scmi_clk SCMI_CLK_GPU&gt;;</div><div class='add'>+			clock-names = "bus", "core";</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "gp",</div><div class='add'>+					  "gpmmu",</div><div class='add'>+					  "pp",</div><div class='add'>+					  "pp0",</div><div class='add'>+					  "ppmmu0",</div><div class='add'>+					  "pp1",</div><div class='add'>+					  "ppmmu1";</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_GPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_GPU&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@ff9c0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-spi",</div><div class='add'>+				     "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0xff9c0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI0&gt;, &lt;&amp;cru PCLK_SPI0&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 25&gt;, &lt;&amp;dmac 24&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@ff9d0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-spi",</div><div class='add'>+				     "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0xff9d0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI1&gt;, &lt;&amp;cru PCLK_SPI1&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 31&gt;, &lt;&amp;dmac 30&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@ff9f0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff9f0000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART0&gt;, &lt;&amp;cru PCLK_UART0&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 9&gt;, &lt;&amp;dmac 8&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@ff9f8000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff9f8000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART1&gt;, &lt;&amp;cru PCLK_UART1&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 11&gt;, &lt;&amp;dmac 10&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@ffa00000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa00000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART2&gt;, &lt;&amp;cru PCLK_UART2&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 13&gt;, &lt;&amp;dmac 12&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@ffa08000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa08000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART3&gt;, &lt;&amp;cru PCLK_UART3&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 15&gt;, &lt;&amp;dmac 14&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@ffa10000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa10000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART4&gt;, &lt;&amp;cru PCLK_UART4&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 17&gt;, &lt;&amp;dmac 16&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart5: serial@ffa18000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa18000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART5&gt;, &lt;&amp;cru PCLK_UART5&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 19&gt;, &lt;&amp;dmac 18&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart6: serial@ffa20000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa20000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART6&gt;, &lt;&amp;cru PCLK_UART6&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 21&gt;, &lt;&amp;dmac 20&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart7: serial@ffa28000 {</div><div class='add'>+			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xffa28000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART7&gt;, &lt;&amp;cru PCLK_UART7&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dmas = &lt;&amp;dmac 23&gt;, &lt;&amp;dmac 22&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@ffa50000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa50000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C0&gt;, &lt;&amp;cru PCLK_I2C0&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@ffa58000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa58000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C1&gt;, &lt;&amp;cru PCLK_I2C1&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_RKVENC&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@ffa60000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa60000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C2&gt;, &lt;&amp;cru PCLK_I2C2&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@ffa68000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa68000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C3&gt;, &lt;&amp;cru PCLK_I2C3&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@ffa70000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa70000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C4&gt;, &lt;&amp;cru PCLK_I2C4&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c4_xfer&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@ffa78000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa78000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C5&gt;, &lt;&amp;cru PCLK_I2C5&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@ffa80000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa80000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C6&gt;, &lt;&amp;cru PCLK_I2C6&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@ffa88000 {</div><div class='add'>+			compatible = "rockchip,rk3528-i2c",</div><div class='add'>+				     "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa88000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C7&gt;, &lt;&amp;cru PCLK_I2C7&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c7_xfer&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm0: pwm@ffa90000 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa90000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM0&gt;, &lt;&amp;cru PCLK_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm1: pwm@ffa90010 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa90010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM0&gt;, &lt;&amp;cru PCLK_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm2: pwm@ffa90020 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa90020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM0&gt;, &lt;&amp;cru PCLK_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm3: pwm@ffa90030 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa90030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM0&gt;, &lt;&amp;cru PCLK_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm4: pwm@ffa98000 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa98000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1&gt;, &lt;&amp;cru PCLK_PWM1&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm5: pwm@ffa98010 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa98010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1&gt;, &lt;&amp;cru PCLK_PWM1&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm6: pwm@ffa98020 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa98020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1&gt;, &lt;&amp;cru PCLK_PWM1&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm7: pwm@ffa98030 {</div><div class='add'>+			compatible = "rockchip,rk3528-pwm",</div><div class='add'>+				     "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xffa98030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1&gt;, &lt;&amp;cru PCLK_PWM1&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		saradc: adc@ffae0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-saradc";</div><div class='add'>+			reg = &lt;0x0 0xffae0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SARADC&gt;, &lt;&amp;cru PCLK_SARADC&gt;;</div><div class='add'>+			clock-names = "saradc", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_SARADC&gt;;</div><div class='add'>+			reset-names = "saradc-apb";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@ffbd0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a";</div><div class='add'>+			reg = &lt;0x0 0xffbd0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GMAC0_SRC&gt;, &lt;&amp;cru CLK_GMAC0_RMII_50M&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_GMAC0_RX&gt;, &lt;&amp;cru CLK_GMAC0_TX&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_MAC_VO&gt;, &lt;&amp;cru ACLK_MAC_VO&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "clk_mac_ref",</div><div class='add'>+				      "mac_clk_rx", "mac_clk_tx",</div><div class='add'>+				      "pclk_mac", "aclk_mac";</div><div class='add'>+			interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			phy-handle = &lt;&amp;rmii0_phy&gt;;</div><div class='add'>+			phy-mode = "rmii";</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_MAC_VO&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			rockchip,grf = &lt;&amp;vo_grf&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac0_stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac0_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac0_mtl_tx_setup&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;0x1&gt;;</div><div class='add'>+				#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+				rmii0_phy: ethernet-phy@2 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;0x2&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru CLK_MACPHY&gt;;</div><div class='add'>+					phy-is-integrated;</div><div class='add'>+					pinctrl-names = "default";</div><div class='add'>+					pinctrl-0 = &lt;&amp;fephym0_led_link&gt;,</div><div class='add'>+						    &lt;&amp;fephym0_led_spd&gt;;</div><div class='add'>+					resets = &lt;&amp;cru SRST_MACPHY&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;8&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1: ethernet@ffbe0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a";</div><div class='add'>+			reg = &lt;0x0 0xffbe0000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GMAC1_SRC_VPU&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_GMAC1_RMII_VPU&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_MAC_VPU&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_MAC_VPU&gt;;</div><div class='add'>+			clock-names = "stmmaceth",</div><div class='add'>+				      "clk_mac_ref",</div><div class='add'>+				      "pclk_mac",</div><div class='add'>+				      "aclk_mac";</div><div class='add'>+			interrupts = &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_MAC&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			rockchip,grf = &lt;&amp;vpu_grf&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac1_stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac1_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac1_mtl_tx_setup&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;0x1&gt;;</div><div class='add'>+				#size-cells = &lt;0x0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;8&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci: mmc@ffbf0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-dwcmshc",</div><div class='add'>+				     "rockchip,rk3588-dwcmshc";</div><div class='add'>+			reg = &lt;0x0 0xffbf0000 0x0 0x10000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cru BCLK_EMMC&gt;, &lt;&amp;cru TCLK_EMMC&gt;,</div><div class='add'>+					  &lt;&amp;cru CCLK_SRC_EMMC&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;, &lt;24000000&gt;,</div><div class='add'>+					       &lt;200000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CCLK_SRC_EMMC&gt;, &lt;&amp;cru HCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_EMMC&gt;, &lt;&amp;cru BCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru TCLK_EMMC&gt;;</div><div class='add'>+			clock-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;emmc_bus8&gt;, &lt;&amp;emmc_clk&gt;, &lt;&amp;emmc_cmd&gt;,</div><div class='add'>+				    &lt;&amp;emmc_strb&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_C_EMMC&gt;, &lt;&amp;cru SRST_H_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_A_EMMC&gt;, &lt;&amp;cru SRST_B_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_T_EMMC&gt;;</div><div class='add'>+			reset-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdio0: mmc@ffc10000 {</div><div class='add'>+			compatible = "rockchip,rk3528-dw-mshc",</div><div class='add'>+				     "rockchip,rk3288-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0xffc10000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDIO0&gt;,</div><div class='add'>+				 &lt;&amp;cru CCLK_SRC_SDIO0&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDIO0_DRV&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDIO0_SAMPLE&gt;;</div><div class='add'>+			clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdio0_bus4&gt;, &lt;&amp;sdio0_clk&gt;, &lt;&amp;sdio0_cmd&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDIO0&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdio1: mmc@ffc20000 {</div><div class='add'>+			compatible = "rockchip,rk3528-dw-mshc",</div><div class='add'>+				     "rockchip,rk3288-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0xffc20000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDIO1&gt;,</div><div class='add'>+				 &lt;&amp;cru CCLK_SRC_SDIO1&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDIO1_DRV&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDIO1_SAMPLE&gt;;</div><div class='add'>+			clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdio1_bus4&gt;, &lt;&amp;sdio1_clk&gt;, &lt;&amp;sdio1_cmd&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDIO1&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc: mmc@ffc30000 {</div><div class='add'>+			compatible = "rockchip,rk3528-dw-mshc",</div><div class='add'>+				     "rockchip,rk3288-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0xffc30000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDMMC0&gt;,</div><div class='add'>+				 &lt;&amp;cru CCLK_SRC_SDMMC0&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDMMC_DRV&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDMMC_SAMPLE&gt;;</div><div class='add'>+			clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;150000000&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdmmc_bus4&gt;, &lt;&amp;sdmmc_clk&gt;, &lt;&amp;sdmmc_cmd&gt;,</div><div class='add'>+				    &lt;&amp;sdmmc_det&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDMMC0&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			rockchip,default-sample-phase = &lt;90&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac: dma-controller@ffd60000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xffd60000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_DMAC&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			arm,pl330-periph-burst;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		combphy: phy@ffdc0000 {</div><div class='add'>+			compatible = "rockchip,rk3528-naneng-combphy";</div><div class='add'>+			reg = &lt;0x0 0xffdc0000 0x0 0x10000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_REF_PCIE_INNER_PHY&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_REF_PCIE_INNER_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PCIE_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PIPE_GRF&gt;;</div><div class='add'>+			clock-names = "ref", "apb", "pipe";</div><div class='add'>+			power-domains = &lt;&amp;power RK3528_PD_VPU&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE_PIPE_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_PCIE_PHY&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			rockchip,pipe-grf = &lt;&amp;vpu_grf&gt;;</div><div class='add'>+			rockchip,pipe-phy-grf = &lt;&amp;pipe_phy_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "rk3528-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts b/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts<br/>new file mode 100644<br/>index 000000000000..6a84db154a7d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts</a></div><div class='hunk'>@@ -0,0 +1,456 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024-2025 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rk3562.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RK3562 EVB V20 Board";</div><div class='add'>+	compatible = "rockchip,rk3562-evb2-v10", "rockchip,rk3562";</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_keys: adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc0 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			label = "volume up";</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-down {</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			label = "volume down";</div><div class='add'>+			press-threshold-microvolt = &lt;414000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			label = "menu";</div><div class='add'>+			press-threshold-microvolt = &lt;800000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-back {</div><div class='add'>+			linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+			label = "back";</div><div class='add'>+			press-threshold-microvolt = &lt;1200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		work_led: led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rk809 1&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * On the module itself this is one of these (depending</div><div class='add'>+		 * on the actual card populated):</div><div class='add'>+		 * - SDIO_RESET_L_WL_REG_ON</div><div class='add'>+		 * - PDN (power down when low)</div><div class='add'>+		 */</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie20";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_pwren&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_clk: regulator-vcc3v3-clk {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_clk";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default", "pmic-sleep",</div><div class='add'>+			"pmic-power-off", "pmic-reset";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		rockchip,system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu: DCDC_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: DCDC_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc2v8_dvp: LDO_REG1 {</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-name = "vcc2v8_dvp";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v9: LDO_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v9";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_pmu: LDO_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdda0v9_pmu";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+				regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_acodec: LDO_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "vccio_acodec";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3_pmu";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pmu: LDO_REG8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pmu";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+				regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8_dvp: LDO_REG9 {</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc1v8_dvp";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: DCDC_REG5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: SWITCH_REG1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sd: SWITCH_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vcc3v3_sd";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	sdio-pwrseq {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren: usb-host-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg_pwren: usb-otg-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc0 {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	no-sd;</div><div class='add'>+	no-mmc;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_bus4 &amp;sdmmc1_cmd &amp;sdmmc1_clk&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1m0_xfer &amp;uart1m0_ctsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..b311448d77a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3562-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,2352 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rockchip-pinconf.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file is auto generated by pin2dts tool, please keep these code</div><div class='add'>+ * by adding changes at end of this file.</div><div class='add'>+ */</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	cam {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		camm0_clk0_out: camm0-clk0-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* camm0_clk0_out */</div><div class='add'>+				&lt;3 RK_PB2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		camm0_clk1_out: camm0-clk1-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* camm0_clk1_out */</div><div class='add'>+				&lt;3 RK_PB3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		camm1_clk0_out: camm1-clk0-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* camm1_clk0_out */</div><div class='add'>+				&lt;4 RK_PB1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		camm1_clk1_out: camm1-clk1-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* camm1_clk1_out */</div><div class='add'>+				&lt;4 RK_PB7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk2_out: cam-clk2-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk2_out */</div><div class='add'>+				&lt;3 RK_PB4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk3_out: cam-clk3-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk3_out */</div><div class='add'>+				&lt;3 RK_PB5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m0_pins: can0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m0 */</div><div class='add'>+				&lt;3 RK_PA1 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m0 */</div><div class='add'>+				&lt;3 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m1_pins: can0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m1 */</div><div class='add'>+				&lt;3 RK_PB7 6 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m1 */</div><div class='add'>+				&lt;3 RK_PB6 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m2_pins: can0m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m2 */</div><div class='add'>+				&lt;0 RK_PC7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m2 */</div><div class='add'>+				&lt;0 RK_PC6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m0_pins: can1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m0 */</div><div class='add'>+				&lt;1 RK_PB7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m0 */</div><div class='add'>+				&lt;1 RK_PC0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m1_pins: can1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m1 */</div><div class='add'>+				&lt;0 RK_PC1 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m1 */</div><div class='add'>+				&lt;0 RK_PC0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk_32k_in: clk-32k-in {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk_32k_in */</div><div class='add'>+				&lt;0 RK_PB0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk0_32k_out: clk0-32k-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk0_32k_out */</div><div class='add'>+				&lt;0 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk1_32k_out: clk1-32k-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk1_32k_out */</div><div class='add'>+				&lt;2 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cpu_pins: cpu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cpu_avs */</div><div class='add'>+				&lt;0 RK_PB7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsm {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_pins: dsm-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_ln */</div><div class='add'>+				&lt;1 RK_PB4 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* dsm_aud_lp */</div><div class='add'>+				&lt;1 RK_PB3 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* dsm_aud_rn */</div><div class='add'>+				&lt;1 RK_PB6 6 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* dsm_aud_rp */</div><div class='add'>+				&lt;1 RK_PB5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_bus8: emmc-bus8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_d0 */</div><div class='add'>+				&lt;1 RK_PA0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d1 */</div><div class='add'>+				&lt;1 RK_PA1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d2 */</div><div class='add'>+				&lt;1 RK_PA2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d3 */</div><div class='add'>+				&lt;1 RK_PA3 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d4 */</div><div class='add'>+				&lt;1 RK_PA4 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d5 */</div><div class='add'>+				&lt;1 RK_PA5 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d6 */</div><div class='add'>+				&lt;1 RK_PA6 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d7 */</div><div class='add'>+				&lt;1 RK_PA7 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_clk: emmc-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_clk */</div><div class='add'>+				&lt;1 RK_PB1 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_cmd: emmc-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_cmd */</div><div class='add'>+				&lt;1 RK_PB0 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_strb: emmc-strb {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_strb */</div><div class='add'>+				&lt;1 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm0_pins: ethm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth_clk_25m_out_m0 */</div><div class='add'>+				&lt;4 RK_PB1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm1_pins: ethm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth_clk_25m_out_m1 */</div><div class='add'>+				&lt;2 RK_PA1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_pins: fspi-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_clk */</div><div class='add'>+				&lt;1 RK_PB1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d0 */</div><div class='add'>+				&lt;1 RK_PA0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d1 */</div><div class='add'>+				&lt;1 RK_PA1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d2 */</div><div class='add'>+				&lt;1 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi_d3 */</div><div class='add'>+				&lt;1 RK_PA3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_csn0: fspi-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_csn0 */</div><div class='add'>+				&lt;1 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi_csn1: fspi-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi_csn1 */</div><div class='add'>+				&lt;1 RK_PB2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		gpu_pins: gpu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* gpu_avs */</div><div class='add'>+				&lt;0 RK_PC0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c0_xfer: i2c0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c0_scl */</div><div class='add'>+				&lt;0 RK_PB1 1 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c0_sda */</div><div class='add'>+				&lt;0 RK_PB2 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m0_xfer: i2c1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m0 */</div><div class='add'>+				&lt;0 RK_PB3 1 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m0 */</div><div class='add'>+				&lt;0 RK_PB4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m1_xfer: i2c1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m1 */</div><div class='add'>+				&lt;4 RK_PB4 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m1 */</div><div class='add'>+				&lt;4 RK_PB5 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m0_xfer: i2c2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m0 */</div><div class='add'>+				&lt;0 RK_PB5 1 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m0 */</div><div class='add'>+				&lt;0 RK_PB6 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m1_xfer: i2c2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m1 */</div><div class='add'>+				&lt;3 RK_PD2 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m1 */</div><div class='add'>+				&lt;3 RK_PD3 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m0_xfer: i2c3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m0 */</div><div class='add'>+				&lt;3 RK_PA0 1 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m0 */</div><div class='add'>+				&lt;3 RK_PA1 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m1_xfer: i2c3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m1 */</div><div class='add'>+				&lt;4 RK_PA5 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m1 */</div><div class='add'>+				&lt;4 RK_PA6 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m0_xfer: i2c4m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m0 */</div><div class='add'>+				&lt;3 RK_PB6 5 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m0 */</div><div class='add'>+				&lt;3 RK_PB7 5 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m1_xfer: i2c4m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m1 */</div><div class='add'>+				&lt;0 RK_PA5 2 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m1 */</div><div class='add'>+				&lt;0 RK_PA4 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m0_xfer: i2c5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m0 */</div><div class='add'>+				&lt;3 RK_PC2 1 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m0 */</div><div class='add'>+				&lt;3 RK_PC3 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m1_xfer: i2c5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m1 */</div><div class='add'>+				&lt;1 RK_PC7 4 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m1 */</div><div class='add'>+				&lt;1 RK_PD0 4 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_lrck: i2s0m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_lrck_m0 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_mclk: i2s0m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_mclk_m0 */</div><div class='add'>+				&lt;3 RK_PA2 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sclk: i2s0m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sclk_m0 */</div><div class='add'>+				&lt;3 RK_PA3 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdi0: i2s0m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi0_m0 */</div><div class='add'>+				&lt;3 RK_PB1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdi1: i2s0m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi1_m0 */</div><div class='add'>+				&lt;3 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdi2: i2s0m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi2_m0 */</div><div class='add'>+				&lt;3 RK_PA7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdi3: i2s0m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi3_m0 */</div><div class='add'>+				&lt;3 RK_PA6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdo0: i2s0m0-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo0_m0 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdo1: i2s0m0-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo1_m0 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdo2: i2s0m0-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo2_m0 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m0_sdo3: i2s0m0-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo3_m0 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_lrck: i2s0m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_lrck_m1 */</div><div class='add'>+				&lt;1 RK_PC4 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_mclk: i2s0m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_mclk_m1 */</div><div class='add'>+				&lt;1 RK_PC6 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sclk: i2s0m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sclk_m1 */</div><div class='add'>+				&lt;1 RK_PC5 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdi0: i2s0m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi0_m1 */</div><div class='add'>+				&lt;1 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdi1: i2s0m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi1_m1 */</div><div class='add'>+				&lt;1 RK_PC2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdi2: i2s0m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi2_m1 */</div><div class='add'>+				&lt;1 RK_PD3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdi3: i2s0m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdi3_m1 */</div><div class='add'>+				&lt;1 RK_PD4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdo0: i2s0m1-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo0_m1 */</div><div class='add'>+				&lt;1 RK_PC3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdo1: i2s0m1-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo1_m1 */</div><div class='add'>+				&lt;1 RK_PD1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdo2: i2s0m1-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo2_m1 */</div><div class='add'>+				&lt;1 RK_PD2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s0m1_sdo3: i2s0m1-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s0_sdo3_m1 */</div><div class='add'>+				&lt;2 RK_PA1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_lrck: i2s1m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_lrck_m0 */</div><div class='add'>+				&lt;3 RK_PC6 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_mclk: i2s1m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_mclk_m0 */</div><div class='add'>+				&lt;3 RK_PC4 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sclk: i2s1m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sclk_m0 */</div><div class='add'>+				&lt;3 RK_PC5 2 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdi0: i2s1m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi0_m0 */</div><div class='add'>+				&lt;3 RK_PD0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdi1: i2s1m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi1_m0 */</div><div class='add'>+				&lt;3 RK_PD1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdi2: i2s1m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi2_m0 */</div><div class='add'>+				&lt;3 RK_PD2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdi3: i2s1m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi3_m0 */</div><div class='add'>+				&lt;3 RK_PD3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdo0: i2s1m0-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo0_m0 */</div><div class='add'>+				&lt;3 RK_PC7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdo1: i2s1m0-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo1_m0 */</div><div class='add'>+				&lt;4 RK_PB4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdo2: i2s1m0-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo2_m0 */</div><div class='add'>+				&lt;4 RK_PB5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m0_sdo3: i2s1m0-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo3_m0 */</div><div class='add'>+				&lt;4 RK_PB6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_lrck: i2s1m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_lrck_m1 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_mclk: i2s1m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_mclk_m1 */</div><div class='add'>+				&lt;3 RK_PB2 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sclk: i2s1m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sclk_m1 */</div><div class='add'>+				&lt;3 RK_PB3 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdi0: i2s1m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi0_m1 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdi1: i2s1m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi1_m1 */</div><div class='add'>+				&lt;3 RK_PC0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdi2: i2s1m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi2_m1 */</div><div class='add'>+				&lt;3 RK_PB7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdi3: i2s1m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdi3_m1 */</div><div class='add'>+				&lt;3 RK_PB6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdo0: i2s1m1-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo0_m1 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdo1: i2s1m1-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo1_m1 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdo2: i2s1m1-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo2_m1 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s1m1_sdo3: i2s1m1-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s1_sdo3_m1 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m0_lrck: i2s2m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_lrck_m0 */</div><div class='add'>+				&lt;1 RK_PD6 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m0_mclk: i2s2m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_mclk_m0 */</div><div class='add'>+				&lt;2 RK_PA1 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m0_sclk: i2s2m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sclk_m0 */</div><div class='add'>+				&lt;1 RK_PD5 1 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m0_sdi: i2s2m0-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sdi_m0 */</div><div class='add'>+				&lt;2 RK_PA0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m0_sdo: i2s2m0-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sdo_m0 */</div><div class='add'>+				&lt;1 RK_PD7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m1_lrck: i2s2m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_lrck_m1 */</div><div class='add'>+				&lt;4 RK_PA1 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m1_mclk: i2s2m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_mclk_m1 */</div><div class='add'>+				&lt;3 RK_PD6 3 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m1_sclk: i2s2m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sclk_m1 */</div><div class='add'>+				&lt;4 RK_PB1 4 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m1_sdi: i2s2m1-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sdi_m1 */</div><div class='add'>+				&lt;3 RK_PD4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2s2m1_sdo: i2s2m1-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2s2_sdo_m1 */</div><div class='add'>+				&lt;3 RK_PD5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	isp {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		isp_pins: isp-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* isp_flash_trigin */</div><div class='add'>+				&lt;3 RK_PC1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* isp_flash_trigout */</div><div class='add'>+				&lt;3 RK_PC3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* isp_prelight_trigout */</div><div class='add'>+				&lt;3 RK_PC2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	jtag {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm0_pins: jtagm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_cpu_mcu_tck_m0 */</div><div class='add'>+				&lt;0 RK_PD1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_cpu_mcu_tms_m0 */</div><div class='add'>+				&lt;0 RK_PD0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm1_pins: jtagm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_cpu_mcu_tck_m1 */</div><div class='add'>+				&lt;1 RK_PB5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_cpu_mcu_tms_m1 */</div><div class='add'>+				&lt;1 RK_PB6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	npu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		npu_pins: npu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* npu_avs */</div><div class='add'>+				&lt;0 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie20 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20m0_pins: pcie20m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie20_clkreqn_m0 */</div><div class='add'>+				&lt;0 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie20_perstn_m0 */</div><div class='add'>+				&lt;0 RK_PB5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie20_waken_m0 */</div><div class='add'>+				&lt;0 RK_PB6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20m1_pins: pcie20m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie20_clkreqn_m1 */</div><div class='add'>+				&lt;3 RK_PA6 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie20_perstn_m1 */</div><div class='add'>+				&lt;3 RK_PB0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pcie20_waken_m1 */</div><div class='add'>+				&lt;3 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20_buttonrstn: pcie20-buttonrstn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie20_buttonrstn */</div><div class='add'>+				&lt;0 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_clk0: pdmm0-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk0_m0 */</div><div class='add'>+				&lt;3 RK_PA6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_clk1: pdmm0-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk1_m0 */</div><div class='add'>+				&lt;3 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_sdi0: pdmm0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi0_m0 */</div><div class='add'>+				&lt;3 RK_PB1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_sdi1: pdmm0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi1_m0 */</div><div class='add'>+				&lt;3 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_sdi2: pdmm0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi2_m0 */</div><div class='add'>+				&lt;3 RK_PA7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm0_sdi3: pdmm0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi3_m0 */</div><div class='add'>+				&lt;3 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_clk0: pdmm1-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk0_m1 */</div><div class='add'>+				&lt;4 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_clk1: pdmm1-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_clk1_m1 */</div><div class='add'>+				&lt;4 RK_PB1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_sdi0: pdmm1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi0_m1 */</div><div class='add'>+				&lt;4 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_sdi1: pdmm1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi1_m1 */</div><div class='add'>+				&lt;4 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_sdi2: pdmm1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi2_m1 */</div><div class='add'>+				&lt;4 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdmm1_sdi3: pdmm1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm_sdi3_m1 */</div><div class='add'>+				&lt;4 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA3 0 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		soc_slppin_gpio: soc-slppin-gpio {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA2 0 &amp;pcfg_output_low&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		soc_slppin_slp: soc-slppin-slp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;0 RK_PA2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pmu_pins: pmu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pmu_debug */</div><div class='add'>+				&lt;0 RK_PA5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m0_pins: pwm0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_m0 */</div><div class='add'>+				&lt;0 RK_PC3 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m1_pins: pwm0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_m1 */</div><div class='add'>+				&lt;1 RK_PC5 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_pins: pwm1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_m0 */</div><div class='add'>+				&lt;0 RK_PC4 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_pins: pwm1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_m1 */</div><div class='add'>+				&lt;1 RK_PC6 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_pins: pwm2m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_m0 */</div><div class='add'>+				&lt;0 RK_PC5 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_pins: pwm2m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_m1 */</div><div class='add'>+				&lt;1 RK_PC7 3 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm3m0_pins: pwm3m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm3_m0 */</div><div class='add'>+				&lt;0 RK_PA7 1 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm3m1_pins: pwm3m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm3_m1 */</div><div class='add'>+				&lt;1 RK_PD0 3 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm4m0_pins: pwm4m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm4_m0 */</div><div class='add'>+				&lt;0 RK_PB7 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm4m1_pins: pwm4m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm4_m1 */</div><div class='add'>+				&lt;1 RK_PD1 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm5m0_pins: pwm5m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm5_m0 */</div><div class='add'>+				&lt;0 RK_PC2 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm5m1_pins: pwm5m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm5_m1 */</div><div class='add'>+				&lt;1 RK_PD2 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm6m0_pins: pwm6m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm6_m0 */</div><div class='add'>+				&lt;0 RK_PC1 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm6m1_pins: pwm6m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm6_m1 */</div><div class='add'>+				&lt;1 RK_PD3 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm7m0_pins: pwm7m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm7_m0 */</div><div class='add'>+				&lt;0 RK_PC0 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm7m1_pins: pwm7m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm7_m1 */</div><div class='add'>+				&lt;1 RK_PD4 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm8 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm8m0_pins: pwm8m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm8_m0 */</div><div class='add'>+				&lt;3 RK_PA4 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm8m1_pins: pwm8m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm8_m1 */</div><div class='add'>+				&lt;1 RK_PC1 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm9 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm9m0_pins: pwm9m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm9_m0 */</div><div class='add'>+				&lt;3 RK_PA5 2 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm9m1_pins: pwm9m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm9_m1 */</div><div class='add'>+				&lt;1 RK_PC2 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm10 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm10m0_pins: pwm10m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm10_m0 */</div><div class='add'>+				&lt;1 RK_PB5 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm10m1_pins: pwm10m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm10_m1 */</div><div class='add'>+				&lt;1 RK_PC3 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm11 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm11m0_pins: pwm11m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm11_m0 */</div><div class='add'>+				&lt;1 RK_PB6 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm11m1_pins: pwm11m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm11_m1 */</div><div class='add'>+				&lt;1 RK_PC4 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm12 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm12m0_pins: pwm12m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm12_m0 */</div><div class='add'>+				&lt;4 RK_PA1 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm12m1_pins: pwm12m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm12_m1 */</div><div class='add'>+				&lt;3 RK_PB4 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm13 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm13m0_pins: pwm13m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm13_m0 */</div><div class='add'>+				&lt;4 RK_PA4 3 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm13m1_pins: pwm13m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm13_m1 */</div><div class='add'>+				&lt;3 RK_PB5 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm14 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm14m0_pins: pwm14m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm14_m0 */</div><div class='add'>+				&lt;3 RK_PC5 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm14m1_pins: pwm14m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm14_m1 */</div><div class='add'>+				&lt;1 RK_PD7 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm15 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm15m0_pins: pwm15m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm15_m0 */</div><div class='add'>+				&lt;3 RK_PC6 4 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm15m1_pins: pwm15m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm15_m1 */</div><div class='add'>+				&lt;2 RK_PA0 5 &amp;pcfg_pull_none_drv_level_1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwr {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwr_pins: pwr-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwr_ctrl0 */</div><div class='add'>+				&lt;0 RK_PA2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* pwr_ctrl1 */</div><div class='add'>+				&lt;0 RK_PA3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ref {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ref_pins: ref-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk_out */</div><div class='add'>+				&lt;0 RK_PA0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rgmii {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_miim: rgmiim0-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_mdc_m0 */</div><div class='add'>+				&lt;4 RK_PB2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_mdio_m0 */</div><div class='add'>+				&lt;4 RK_PB3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_rx_er: rgmiim0-rx_er {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxer_m0 */</div><div class='add'>+				&lt;4 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_rx_bus2: rgmiim0-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd0_m0 */</div><div class='add'>+				&lt;4 RK_PA5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd1_m0 */</div><div class='add'>+				&lt;4 RK_PA6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxdv_m0 */</div><div class='add'>+				&lt;4 RK_PA7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_tx_bus2: rgmiim0-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_txd0_m0 */</div><div class='add'>+				&lt;4 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd1_m0 */</div><div class='add'>+				&lt;4 RK_PA3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txen_m0 */</div><div class='add'>+				&lt;4 RK_PA4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_rgmii_clk: rgmiim0-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxclk_m0 */</div><div class='add'>+				&lt;4 RK_PA1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txclk_m0 */</div><div class='add'>+				&lt;3 RK_PD6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_rgmii_bus: rgmiim0-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd2_m0 */</div><div class='add'>+				&lt;3 RK_PD7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd3_m0 */</div><div class='add'>+				&lt;4 RK_PA0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd2_m0 */</div><div class='add'>+				&lt;3 RK_PD4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd3_m0 */</div><div class='add'>+				&lt;3 RK_PD5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim0_clk: rgmiim0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmiim0_clk */</div><div class='add'>+				&lt;4 RK_PB7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_miim: rgmiim1-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_mdc_m1 */</div><div class='add'>+				&lt;1 RK_PC7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_mdio_m1 */</div><div class='add'>+				&lt;1 RK_PD0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_rx_er: rgmiim1-rx_er {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxer_m1 */</div><div class='add'>+				&lt;2 RK_PA0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_rx_bus2: rgmiim1-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd0_m1 */</div><div class='add'>+				&lt;1 RK_PD4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd1_m1 */</div><div class='add'>+				&lt;1 RK_PD7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxdv_m1 */</div><div class='add'>+				&lt;1 RK_PD6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_tx_bus2: rgmiim1-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_txd0_m1 */</div><div class='add'>+				&lt;1 RK_PD1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd1_m1 */</div><div class='add'>+				&lt;1 RK_PD2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txen_m1 */</div><div class='add'>+				&lt;1 RK_PD3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_rgmii_clk: rgmiim1-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxclk_m1 */</div><div class='add'>+				&lt;1 RK_PC6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txclk_m1 */</div><div class='add'>+				&lt;1 RK_PC3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_rgmii_bus: rgmiim1-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmii_rxd2_m1 */</div><div class='add'>+				&lt;1 RK_PC4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_rxd3_m1 */</div><div class='add'>+				&lt;1 RK_PC5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd2_m1 */</div><div class='add'>+				&lt;1 RK_PC1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rgmii_txd3_m1 */</div><div class='add'>+				&lt;1 RK_PC2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgmiim1_clk: rgmiim1-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rgmiim1_clk */</div><div class='add'>+				&lt;1 RK_PD5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rmii {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rmii_pins: rmii-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* rmii_clk */</div><div class='add'>+				&lt;1 RK_PD5 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_mdc */</div><div class='add'>+				&lt;1 RK_PC7 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_mdio */</div><div class='add'>+				&lt;1 RK_PD0 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_rxd0 */</div><div class='add'>+				&lt;1 RK_PD4 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_rxd1 */</div><div class='add'>+				&lt;1 RK_PD7 6 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_rxdv_crs */</div><div class='add'>+				&lt;1 RK_PD6 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_rxer */</div><div class='add'>+				&lt;2 RK_PA0 6 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_txd0 */</div><div class='add'>+				&lt;1 RK_PD1 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_txd1 */</div><div class='add'>+				&lt;1 RK_PD2 5 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* rmii_txen */</div><div class='add'>+				&lt;1 RK_PD3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_bus4: sdmmc0-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_d0 */</div><div class='add'>+				&lt;1 RK_PB3 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc0_d1 */</div><div class='add'>+				&lt;1 RK_PB4 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc0_d2 */</div><div class='add'>+				&lt;1 RK_PB5 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc0_d3 */</div><div class='add'>+				&lt;1 RK_PB6 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_clk: sdmmc0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_clk */</div><div class='add'>+				&lt;1 RK_PC0 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_cmd: sdmmc0-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_cmd */</div><div class='add'>+				&lt;1 RK_PB7 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_det: sdmmc0-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_detn */</div><div class='add'>+				&lt;0 RK_PA4 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_pwren: sdmmc0-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_pwren */</div><div class='add'>+				&lt;0 RK_PA5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_bus4: sdmmc1-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_d0 */</div><div class='add'>+				&lt;1 RK_PC1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d1 */</div><div class='add'>+				&lt;1 RK_PC2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d2 */</div><div class='add'>+				&lt;1 RK_PC3 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d3 */</div><div class='add'>+				&lt;1 RK_PC4 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_clk: sdmmc1-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_clk */</div><div class='add'>+				&lt;1 RK_PC6 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_cmd: sdmmc1-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_cmd */</div><div class='add'>+				&lt;1 RK_PC5 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_det: sdmmc1-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_detn */</div><div class='add'>+				&lt;1 RK_PD0 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_pwren: sdmmc1-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_pwren */</div><div class='add'>+				&lt;1 RK_PC7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_pins: spdifm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m0 */</div><div class='add'>+				&lt;3 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_pins: spdifm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m1 */</div><div class='add'>+				&lt;0 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_pins: spdifm2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx_m2 */</div><div class='add'>+				&lt;1 RK_PB7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_pins: spi0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk_m0 */</div><div class='add'>+				&lt;0 RK_PC3 3 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi0_miso_m0 */</div><div class='add'>+				&lt;0 RK_PC5 3 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi0_mosi_m0 */</div><div class='add'>+				&lt;0 RK_PC4 3 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_csn0: spi0m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m0_csn0 */</div><div class='add'>+				&lt;0 RK_PC2 3 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_csn1: spi0m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m0_csn1 */</div><div class='add'>+				&lt;0 RK_PB7 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_pins: spi0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk_m1 */</div><div class='add'>+				&lt;3 RK_PB5 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi0_miso_m1 */</div><div class='add'>+				&lt;3 RK_PC0 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi0_mosi_m1 */</div><div class='add'>+				&lt;3 RK_PB4 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_csn0: spi0m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m1_csn0 */</div><div class='add'>+				&lt;3 RK_PB7 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_csn1: spi0m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m1_csn1 */</div><div class='add'>+				&lt;3 RK_PB6 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_pins: spi1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk_m0 */</div><div class='add'>+				&lt;3 RK_PD6 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi1_miso_m0 */</div><div class='add'>+				&lt;4 RK_PA3 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi1_mosi_m0 */</div><div class='add'>+				&lt;4 RK_PA2 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_csn0: spi1m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m0_csn0 */</div><div class='add'>+				&lt;3 RK_PD7 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_csn1: spi1m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m0_csn1 */</div><div class='add'>+				&lt;4 RK_PA0 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_pins: spi1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk_m1 */</div><div class='add'>+				&lt;1 RK_PC0 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi1_miso_m1 */</div><div class='add'>+				&lt;1 RK_PB4 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi1_mosi_m1 */</div><div class='add'>+				&lt;1 RK_PB3 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_csn0: spi1m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m1_csn0 */</div><div class='add'>+				&lt;1 RK_PB6 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_csn1: spi1m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m1_csn1 */</div><div class='add'>+				&lt;1 RK_PB5 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_pins: spi2m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2_clk_m0 */</div><div class='add'>+				&lt;4 RK_PB6 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi2_miso_m0 */</div><div class='add'>+				&lt;3 RK_PD2 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi2_mosi_m0 */</div><div class='add'>+				&lt;3 RK_PD3 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_csn0: spi2m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m0_csn0 */</div><div class='add'>+				&lt;4 RK_PB5 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_csn1: spi2m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m0_csn1 */</div><div class='add'>+				&lt;4 RK_PB4 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_pins: spi2m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2_clk_m1 */</div><div class='add'>+				&lt;2 RK_PA1 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi2_miso_m1 */</div><div class='add'>+				&lt;2 RK_PA0 4 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* spi2_mosi_m1 */</div><div class='add'>+				&lt;1 RK_PD7 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_csn0: spi2m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m1_csn0 */</div><div class='add'>+				&lt;1 RK_PD6 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_csn1: spi2m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m1_csn1 */</div><div class='add'>+				&lt;1 RK_PD5 4 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsadc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadcm0_pins: tsadcm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_shut_m0 */</div><div class='add'>+				&lt;0 RK_PA1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadcm1_pins: tsadcm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_shut_m1 */</div><div class='add'>+				&lt;0 RK_PA2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadc_shut_org: tsadc-shut-org {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_shut_org */</div><div class='add'>+				&lt;0 RK_PA1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m0_xfer: uart0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m0 */</div><div class='add'>+				&lt;0 RK_PD0 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m0 */</div><div class='add'>+				&lt;0 RK_PD1 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m1_xfer: uart0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m1 */</div><div class='add'>+				&lt;1 RK_PB3 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m1 */</div><div class='add'>+				&lt;1 RK_PB4 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_xfer: uart1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m0 */</div><div class='add'>+				&lt;1 RK_PD1 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m0 */</div><div class='add'>+				&lt;1 RK_PD2 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_ctsn: uart1m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m0_ctsn */</div><div class='add'>+				&lt;1 RK_PD4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_rtsn: uart1m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m0_rtsn */</div><div class='add'>+				&lt;1 RK_PD3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_xfer: uart1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m1 */</div><div class='add'>+				&lt;4 RK_PA6 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m1 */</div><div class='add'>+				&lt;4 RK_PA5 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_ctsn: uart1m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m1_ctsn */</div><div class='add'>+				&lt;4 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_rtsn: uart1m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m1_rtsn */</div><div class='add'>+				&lt;4 RK_PA7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_xfer: uart2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m0 */</div><div class='add'>+				&lt;0 RK_PC1 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m0 */</div><div class='add'>+				&lt;0 RK_PC0 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_ctsn: uart2m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_ctsn */</div><div class='add'>+				&lt;0 RK_PC2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_rtsn: uart2m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_rtsn */</div><div class='add'>+				&lt;0 RK_PC3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_xfer: uart2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m1 */</div><div class='add'>+				&lt;3 RK_PA1 2 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m1 */</div><div class='add'>+				&lt;3 RK_PA0 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_ctsn: uart2m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_ctsn */</div><div class='add'>+				&lt;3 RK_PA2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_rtsn: uart2m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_rtsn */</div><div class='add'>+				&lt;3 RK_PA3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_xfer: uart3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m0 */</div><div class='add'>+				&lt;4 RK_PB5 6 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m0 */</div><div class='add'>+				&lt;4 RK_PB4 6 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_ctsn: uart3m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m0_ctsn */</div><div class='add'>+				&lt;4 RK_PB6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_rtsn: uart3m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m0_rtsn */</div><div class='add'>+				&lt;3 RK_PD1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_xfer: uart3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m1 */</div><div class='add'>+				&lt;3 RK_PC0 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m1 */</div><div class='add'>+				&lt;3 RK_PB7 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_ctsn: uart3m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m1_ctsn */</div><div class='add'>+				&lt;3 RK_PB6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_rtsn: uart3m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m1_rtsn */</div><div class='add'>+				&lt;3 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_xfer: uart4m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx_m0 */</div><div class='add'>+				&lt;3 RK_PD1 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx_m0 */</div><div class='add'>+				&lt;3 RK_PD0 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_ctsn: uart4m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m0_ctsn */</div><div class='add'>+				&lt;3 RK_PC5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_rtsn: uart4m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m0_rtsn */</div><div class='add'>+				&lt;3 RK_PC6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_xfer: uart4m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx_m1 */</div><div class='add'>+				&lt;1 RK_PD5 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx_m1 */</div><div class='add'>+				&lt;1 RK_PD6 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_ctsn: uart4m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m1_ctsn */</div><div class='add'>+				&lt;2 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_rtsn: uart4m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m1_rtsn */</div><div class='add'>+				&lt;1 RK_PD7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_xfer: uart5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m0 */</div><div class='add'>+				&lt;1 RK_PB7 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m0 */</div><div class='add'>+				&lt;1 RK_PC0 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_ctsn: uart5m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_ctsn */</div><div class='add'>+				&lt;1 RK_PB5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_rtsn: uart5m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_rtsn */</div><div class='add'>+				&lt;1 RK_PB6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_xfer: uart5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m1 */</div><div class='add'>+				&lt;3 RK_PA7 5 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m1 */</div><div class='add'>+				&lt;3 RK_PA6 5 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_ctsn: uart5m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_ctsn */</div><div class='add'>+				&lt;3 RK_PA0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_rtsn: uart5m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_rtsn */</div><div class='add'>+				&lt;3 RK_PA1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_xfer: uart6m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m0 */</div><div class='add'>+				&lt;0 RK_PC7 1 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m0 */</div><div class='add'>+				&lt;0 RK_PC6 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_ctsn: uart6m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m0_ctsn */</div><div class='add'>+				&lt;0 RK_PC4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_rtsn: uart6m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m0_rtsn */</div><div class='add'>+				&lt;0 RK_PC5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_xfer: uart6m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m1 */</div><div class='add'>+				&lt;4 RK_PB0 5 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m1 */</div><div class='add'>+				&lt;4 RK_PA7 5 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_ctsn: uart6m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m1_ctsn */</div><div class='add'>+				&lt;4 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_rtsn: uart6m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m1_rtsn */</div><div class='add'>+				&lt;4 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_xfer: uart7m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m0 */</div><div class='add'>+				&lt;3 RK_PC7 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m0 */</div><div class='add'>+				&lt;3 RK_PC4 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_ctsn: uart7m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_ctsn */</div><div class='add'>+				&lt;3 RK_PD2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_rtsn: uart7m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_rtsn */</div><div class='add'>+				&lt;3 RK_PD3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_xfer: uart7m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m1 */</div><div class='add'>+				&lt;1 RK_PB3 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m1 */</div><div class='add'>+				&lt;1 RK_PB4 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_xfer: uart8m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8_rx_m0 */</div><div class='add'>+				&lt;3 RK_PB3 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart8_tx_m0 */</div><div class='add'>+				&lt;3 RK_PB2 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_ctsn: uart8m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m0_ctsn */</div><div class='add'>+				&lt;3 RK_PB4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_rtsn: uart8m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m0_rtsn */</div><div class='add'>+				&lt;3 RK_PB5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_xfer: uart8m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8_rx_m1 */</div><div class='add'>+				&lt;3 RK_PD5 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart8_tx_m1 */</div><div class='add'>+				&lt;3 RK_PD4 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_ctsn: uart8m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m1_ctsn */</div><div class='add'>+				&lt;3 RK_PD7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_rtsn: uart8m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m1_rtsn */</div><div class='add'>+				&lt;4 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_xfer: uart9m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9_rx_m0 */</div><div class='add'>+				&lt;4 RK_PB3 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart9_tx_m0 */</div><div class='add'>+				&lt;4 RK_PB2 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_ctsn: uart9m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m0_ctsn */</div><div class='add'>+				&lt;4 RK_PB4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_rtsn: uart9m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m0_rtsn */</div><div class='add'>+				&lt;4 RK_PB5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m1_xfer: uart9m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9_rx_m1 */</div><div class='add'>+				&lt;3 RK_PC3 3 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart9_tx_m1 */</div><div class='add'>+				&lt;3 RK_PC2 3 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vo {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vo_pins: vo-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d0 */</div><div class='add'>+				&lt;4 RK_PA4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d1 */</div><div class='add'>+				&lt;4 RK_PA5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d2 */</div><div class='add'>+				&lt;4 RK_PB2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d8 */</div><div class='add'>+				&lt;4 RK_PA6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d9 */</div><div class='add'>+				&lt;4 RK_PA7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d16 */</div><div class='add'>+				&lt;4 RK_PB0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d17 */</div><div class='add'>+				&lt;4 RK_PB1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d18 */</div><div class='add'>+				&lt;4 RK_PB3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This part is edited handly.</div><div class='add'>+ */</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	vo {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		bt1120_pins: bt1120-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		bt656_pins: bt656-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb3x8_pins_m0: rgb3x8-pins-m0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb3x8_pins_m1: rgb3x8-pins-m1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb565_pins: rgb565-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb666_pins: rgb666-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;4 RK_PB7 1 &amp;pcfg_pull_none_drv_level_4&gt;,</div><div class='add'>+				/* vo_lcdc_d2 */</div><div class='add'>+				&lt;4 RK_PB2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d18 */</div><div class='add'>+				&lt;4 RK_PB3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;4 RK_PA0 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;4 RK_PB6 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none_drv_level_3&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi<br/>new file mode 100644<br/>index 000000000000..f84676b47b27<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3562.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3562.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1186 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rockchip,rk3562-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/rockchip,rk3562-power.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/rockchip,rk3562-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,boot-mode.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "rockchip,rk3562";</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		gpio4 = &amp;gpio4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xin32k: clock-xin32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "xin32k";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xin24m: clock-xin24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xin24m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk ARMCLK&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;138&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk ARMCLK&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;138&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk ARMCLK&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;138&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0 0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			clocks = &lt;&amp;scmi_clk ARMCLK&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;138&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			CPU_SLEEP: cpu-sleep {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				entry-latency-us = &lt;120&gt;;</div><div class='add'>+				exit-latency-us = &lt;250&gt;;</div><div class='add'>+				min-residency-us = &lt;900&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu0_opp_table: opp-table-cpu0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1008000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000 1000000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-supported-hw = &lt;0xf9 0xffff&gt;;</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1037500 1037500 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1125000 1125000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-gpu {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-500000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-900000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;900000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000 1000000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm_pmu: arm-pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;, &lt;&amp;cpu2&gt;, &lt;&amp;cpu3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi: scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			shmem = &lt;&amp;scmi_shmem&gt;;</div><div class='add'>+			arm,smc-id = &lt;0x82000010&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl: pinctrl {</div><div class='add'>+		compatible = "rockchip,rk3562-pinctrl";</div><div class='add'>+		rockchip,grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@ff260000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xff260000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_PMU0_GPIO0&gt;, &lt;&amp;cru DBCLK_PMU0_GPIO0&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@ff620000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xff620000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_PERI_GPIO1&gt;, &lt;&amp;cru DCLK_PERI_GPIO1&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 32 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@ff630000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xff630000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_PERI_GPIO2&gt;, &lt;&amp;cru DCLK_PERI_GPIO2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 64 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@ffac0000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffac0000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO3_VCCIO156&gt;, &lt;&amp;cru DCLK_BUS_GPIO3&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 96 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@ffad0000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0xffad0000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO4_VCCIO156&gt;, &lt;&amp;cru DCLK_BUS_GPIO4&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 128 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scmi_shmem: shmem@10f000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie2x1: pcie@fe000000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pcie", "rockchip,rk3568-pcie";</div><div class='add'>+			reg = &lt;0x0 0xfe000000 0x0 0x400000&gt;,</div><div class='add'>+			      &lt;0x0 0xff500000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0xfc000000 0x0 0x100000&gt;;</div><div class='add'>+			reg-names = "dbi", "apb", "config";</div><div class='add'>+			bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_PCIE20_MST&gt;, &lt;&amp;cru ACLK_PCIE20_SLV&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_PCIE20_DBI&gt;, &lt;&amp;cru PCLK_PCIE20&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_PCIE20_AUX&gt;;</div><div class='add'>+			clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+				      "aclk_dbi", "pclk", "aux";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie2x1_intc 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie2x1_intc 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie2x1_intc 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie2x1_intc 3&gt;;</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-ib-windows = &lt;8&gt;;</div><div class='add'>+			num-viewport = &lt;8&gt;;</div><div class='add'>+			num-ob-windows = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			phys = &lt;&amp;combphy PHY_TYPE_PCIE&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+			power-domains = &lt;&amp;power RK3562_PD_PHP&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0xfc100000 0x0 0xfc100000 0x0 0x100000</div><div class='add'>+				  0x02000000 0x0 0xfc200000 0x0 0xfc200000 0x0 0x1e00000</div><div class='add'>+				  0x03000000 0x3 0x00000000 0x3 0x00000000 0x0 0x40000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE20_POWERUP&gt;;</div><div class='add'>+			reset-names = "pipe";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie2x1_intc: legacy-interrupt-controller {</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@fe901000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0x0 0xfe901000 0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0xfe902000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xfe904000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0x0 0xfe906000 0 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dma2ddr: qos@fee03800 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee03800 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_mcu: qos@fee10000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee10000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dft_apb: qos@fee10100 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee10100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gmac: qos@fee10200 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee10200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_mac100: qos@fee10300 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee10300 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dcf: qos@fee10400 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee10400 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_cpu: qos@fee20000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee20000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gpu: qos@fee30000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee30000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu: qos@fee40000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee40000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rkvdec: qos@fee50000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee50000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vepu: qos@fee60000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee60000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_isp: qos@fee70000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee70000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vicap: qos@fee70100 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee70100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vop: qos@fee80000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee80000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_jpeg: qos@fee90000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee90000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga_rd: qos@fee90100 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee90100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga_wr: qos@fee90200 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfee90200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_pcie: qos@feea0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeea0000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_usb3: qos@feea0100 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeea0100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_crypto_apb: qos@feeb0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_crypto: qos@feeb0100 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_dmac: qos@feeb0200 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_emmc: qos@feeb0300 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0300 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_fspi: qos@feeb0400 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0400 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rkdma: qos@feeb0500 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0500 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdmmc0: qos@feeb0600 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0600 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdmmc1: qos@feeb0700 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0700 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_usb2: qos@feeb0800 {</div><div class='add'>+			compatible = "rockchip,rk3562-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xfeeb0800 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu_grf: syscon@ff010000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pmu-grf", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0xff010000 0x0 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+			reboot_mode: reboot-mode {</div><div class='add'>+				compatible = "syscon-reboot-mode";</div><div class='add'>+				offset = &lt;0x220&gt;;</div><div class='add'>+				mode-normal = &lt;BOOT_NORMAL&gt;;</div><div class='add'>+				mode-loader = &lt;BOOT_BL_DOWNLOAD&gt;;</div><div class='add'>+				mode-recovery = &lt;BOOT_RECOVERY&gt;;</div><div class='add'>+				mode-bootloader = &lt;BOOT_FASTBOOT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_grf: syscon@ff030000 {</div><div class='add'>+			compatible = "rockchip,rk3562-sys-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff030000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		peri_grf: syscon@ff040000 {</div><div class='add'>+			compatible = "rockchip,rk3562-peri-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff040000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ioc_grf: syscon@ff060000 {</div><div class='add'>+			compatible = "rockchip,rk3562-ioc-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff060000 0x0 0x30000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbphy_grf: syscon@ff090000 {</div><div class='add'>+			compatible = "rockchip,rk3562-usbphy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff090000 0x0 0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pipephy_grf: syscon@ff098000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pipephy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xff098000 0x0 0x8000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cru: clock-controller@ff100000 {</div><div class='add'>+			compatible = "rockchip,rk3562-cru";</div><div class='add'>+			reg = &lt;0x0 0xff100000 0x0 0x40000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			assigned-clocks = &lt;&amp;cru PLL_GPLL&gt;, &lt;&amp;cru PLL_CPLL&gt;,</div><div class='add'>+					  &lt;&amp;cru PLL_HPLL&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;1188000000&gt;, &lt;1000000000&gt;,</div><div class='add'>+					       &lt;983040000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@ff200000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xff200000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU0_I2C0&gt;, &lt;&amp;cru PCLK_PMU0_I2C0&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@ff210000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff210000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_PMU1_UART0&gt;, &lt;&amp;cru PCLK_PMU1_UART0&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@ff220000 {</div><div class='add'>+			compatible = "rockchip,rk3562-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0xff220000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU1_SPI0&gt;, &lt;&amp;cru PCLK_PMU1_SPI0&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac 13&gt;, &lt;&amp;dmac 12&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi0m0_csn0 &amp;spi0m0_csn1 &amp;spi0m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm0: pwm@ff230000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff230000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU1_PWM0&gt;, &lt;&amp;cru PCLK_PMU1_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm0m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm1: pwm@ff230010 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff230010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU1_PWM0&gt;, &lt;&amp;cru PCLK_PMU1_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm1m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm2: pwm@ff230020 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff230020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU1_PWM0&gt;, &lt;&amp;cru PCLK_PMU1_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm2m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm3: pwm@ff230030 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff230030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PMU1_PWM0&gt;, &lt;&amp;cru PCLK_PMU1_PWM0&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm3m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu: power-management@ff258000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pmu", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0xff258000 0x0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+			power: power-controller {</div><div class='add'>+				compatible = "rockchip,rk3562-power-controller";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_GPU {</div><div class='add'>+					reg = &lt;RK3562_PD_GPU&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_gpu&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_NPU {</div><div class='add'>+					reg = &lt;RK3562_PD_NPU&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_npu&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_VDPU {</div><div class='add'>+					reg = &lt;RK3562_PD_VDPU&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_rkvdec&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_VI {</div><div class='add'>+					reg = &lt;RK3562_PD_VI&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_isp&gt;,</div><div class='add'>+						 &lt;&amp;qos_vicap&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3562_PD_VEPU {</div><div class='add'>+						reg = &lt;RK3562_PD_VEPU&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_vepu&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_VO {</div><div class='add'>+					reg = &lt;RK3562_PD_VO&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_vop&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3562_PD_RGA {</div><div class='add'>+						reg = &lt;RK3562_PD_RGA&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_rga_rd&gt;,</div><div class='add'>+							 &lt;&amp;qos_rga_wr&gt;,</div><div class='add'>+							 &lt;&amp;qos_jpeg&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3562_PD_PHP {</div><div class='add'>+					reg = &lt;RK3562_PD_PHP&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_pcie&gt;,</div><div class='add'>+						 &lt;&amp;qos_usb3&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@ff320000 {</div><div class='add'>+			compatible = "rockchip,rk3562-mali", "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x0 0xff320000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GPU&gt;, &lt;&amp;cru CLK_GPU_BRG&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_GPU_PRE&gt;;</div><div class='add'>+			clock-names = "clk_gpu", "clk_gpu_brg", "aclk_gpu";</div><div class='add'>+			dynamic-power-coefficient = &lt;820&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3562_PD_GPU&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@ff640000 {</div><div class='add'>+			compatible = "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0xff640000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI1&gt;, &lt;&amp;cru PCLK_SPI1&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac 15&gt;, &lt;&amp;dmac 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1m0_csn0 &amp;spi1m0_csn1 &amp;spi1m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@ff650000 {</div><div class='add'>+			compatible = "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0xff650000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI2&gt;, &lt;&amp;cru PCLK_SPI2&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac 17&gt;, &lt;&amp;dmac 16&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi2m0_csn0 &amp;spi2m0_csn1 &amp;spi2m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@ff670000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff670000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART1&gt;, &lt;&amp;cru PCLK_UART1&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@ff680000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff680000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART2&gt;, &lt;&amp;cru PCLK_UART2&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@ff690000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff690000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART3&gt;, &lt;&amp;cru PCLK_UART3&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@ff6a0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6a0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART4&gt;, &lt;&amp;cru PCLK_UART4&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart5: serial@ff6b0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6b0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART5&gt;, &lt;&amp;cru PCLK_UART5&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart6: serial@ff6c0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6c0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART6&gt;, &lt;&amp;cru PCLK_UART6&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart7: serial@ff6d0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6d0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART7&gt;, &lt;&amp;cru PCLK_UART7&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart8: serial@ff6e0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6e0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART8&gt;, &lt;&amp;cru PCLK_UART8&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart9: serial@ff6f0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0xff6f0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART9&gt;, &lt;&amp;cru PCLK_UART9&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm4: pwm@ff700000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff700000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1_PERI&gt;, &lt;&amp;cru PCLK_PWM1_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm4m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm5: pwm@ff700010 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff700010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1_PERI&gt;, &lt;&amp;cru PCLK_PWM1_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm5m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm6: pwm@ff700020 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff700020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1_PERI&gt;, &lt;&amp;cru PCLK_PWM1_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm6m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm7: pwm@ff700030 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff700030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM1_PERI&gt;, &lt;&amp;cru PCLK_PWM1_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm7m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm8: pwm@ff710000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff710000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM2_PERI&gt;, &lt;&amp;cru PCLK_PWM2_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm8m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm9: pwm@ff710010 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff710010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM2_PERI&gt;, &lt;&amp;cru PCLK_PWM2_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm9m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm10: pwm@ff710020 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff710020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM2_PERI&gt;, &lt;&amp;cru PCLK_PWM2_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm10m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm11: pwm@ff710030 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff710030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM2_PERI&gt;, &lt;&amp;cru PCLK_PWM2_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm11m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm12: pwm@ff720000 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff720000 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM3_PERI&gt;, &lt;&amp;cru PCLK_PWM3_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm12m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm13: pwm@ff720010 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff720010 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM3_PERI&gt;, &lt;&amp;cru PCLK_PWM3_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm13m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm14: pwm@ff720020 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff720020 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM3_PERI&gt;, &lt;&amp;cru PCLK_PWM3_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm14m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm15: pwm@ff720030 {</div><div class='add'>+			compatible = "rockchip,rk3562-pwm", "rockchip,rk3328-pwm";</div><div class='add'>+			reg = &lt;0x0 0xff720030 0x0 0x10&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PWM3_PERI&gt;, &lt;&amp;cru PCLK_PWM3_PERI&gt;;</div><div class='add'>+			clock-names = "pwm", "pclk";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;pwm15m0_pins&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		saradc0: adc@ff730000 {</div><div class='add'>+			compatible = "rockchip,rk3562-saradc";</div><div class='add'>+			reg = &lt;0x0 0xff730000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SARADC&gt;, &lt;&amp;cru PCLK_SARADC&gt;;</div><div class='add'>+			clock-names = "saradc", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_SARADC&gt;;</div><div class='add'>+			reset-names = "saradc-apb";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		combphy: phy@ff750000 {</div><div class='add'>+			compatible = "rockchip,rk3562-naneng-combphy";</div><div class='add'>+			reg = &lt;0x0 0xff750000 0x0 0x100&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PIPEPHY_REF&gt;, &lt;&amp;cru PCLK_PIPEPHY&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PHP&gt;;</div><div class='add'>+			clock-names = "ref", "apb", "pipe";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_PIPEPHY_REF&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PIPEPHY&gt;;</div><div class='add'>+			reset-names = "phy";</div><div class='add'>+			rockchip,pipe-grf = &lt;&amp;peri_grf&gt;;</div><div class='add'>+			rockchip,pipe-phy-grf = &lt;&amp;pipephy_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sfc: spi@ff860000 {</div><div class='add'>+			compatible = "rockchip,sfc";</div><div class='add'>+			reg = &lt;0x0 0xff860000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_SFC&gt;, &lt;&amp;cru HCLK_SFC&gt;;</div><div class='add'>+			clock-names = "clk_sfc", "hclk_sfc";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci: mmc@ff870000 {</div><div class='add'>+			compatible = "rockchip,rk3562-dwcmshc", "rockchip,rk3588-dwcmshc";</div><div class='add'>+			reg = &lt;0x0 0xff870000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cru BCLK_EMMC&gt;, &lt;&amp;cru CCLK_EMMC&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;, &lt;200000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CCLK_EMMC&gt;, &lt;&amp;cru HCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_EMMC&gt;, &lt;&amp;cru BCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru TMCLK_EMMC&gt;;</div><div class='add'>+			clock-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			resets = &lt;&amp;cru SRST_C_EMMC&gt;, &lt;&amp;cru SRST_H_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_A_EMMC&gt;, &lt;&amp;cru SRST_B_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_T_EMMC&gt;;</div><div class='add'>+			reset-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc0: mmc@ff880000 {</div><div class='add'>+			compatible = "rockchip,rk3562-dw-mshc",</div><div class='add'>+				     "rockchip,rk3288-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0xff880000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDMMC0&gt;, &lt;&amp;cru CCLK_SDMMC0&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDMMC0_DRV&gt;, &lt;&amp;cru SCLK_SDMMC0_SAMPLE&gt;;</div><div class='add'>+			clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDMMC0&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc1: mmc@ff890000 {</div><div class='add'>+			compatible = "rockchip,rk3562-dw-mshc",</div><div class='add'>+				     "rockchip,rk3288-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0xff890000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDMMC1&gt;, &lt;&amp;cru CCLK_SDMMC1&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_SDMMC1_DRV&gt;, &lt;&amp;cru SCLK_SDMMC1_SAMPLE&gt;;</div><div class='add'>+			clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDMMC1&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac: dma-controller@ff990000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0xff990000 0x0 0x4000&gt;;</div><div class='add'>+			arm,pl330-periph-burst;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_DMAC&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@ffa00000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa00000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C1&gt;, &lt;&amp;cru PCLK_I2C1&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@ffa10000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa10000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C2&gt;, &lt;&amp;cru PCLK_I2C2&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@ffa20000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa20000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C3&gt;, &lt;&amp;cru PCLK_I2C3&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@ffa30000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa30000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C4&gt;, &lt;&amp;cru PCLK_I2C4&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c4m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@ffa40000 {</div><div class='add'>+			compatible = "rockchip,rk3562-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0xffa40000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C5&gt;, &lt;&amp;cru PCLK_I2C5&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c5m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		saradc1: adc@ffaa0000 {</div><div class='add'>+			compatible = "rockchip,rk3562-saradc";</div><div class='add'>+			reg = &lt;0x0 0xffaa0000 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SARADC_VCCIO156&gt;, &lt;&amp;cru PCLK_SARADC_VCCIO156&gt;;</div><div class='add'>+			clock-names = "saradc", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_SARADC_VCCIO156&gt;;</div><div class='add'>+			reset-names = "saradc-apb";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "rk3562-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi<br/>index a4a60e4a53d4..0aa2694552ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg-arc.dtsi</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts<br/>index a73cf30801ec..b80b6b593ce4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='del'>-	pintctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts<br/>index ca5284e4807d..4fb712fe918c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353ps.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts<br/>index e9954a33e8cd..01588bebf9cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "rk817_int";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='del'>-	pintctrl-names = "default";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts<br/>index 90da43855d1c..5a30e3918c04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "rk817_int";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts<br/>index 74cf313e0635..4dcc0ea4cf0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts</a></div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi<br/>index 233eade30f21..645db9d3d297 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi</a></div><div class='hunk'>@@ -469,7 +469,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='del'>-	/* Unknown/unused device at 0x3c */</div><div class='add'>+	/* Unused iSmartWare SW2001 encryption device at 0x3c */</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-base.dtsi<br/>new file mode 100644<br/>index 000000000000..e56e0b6ba941<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-base.dtsi</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include "rk356x-base.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "rockchip,rk3566";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pipegrf {</div><div class='add'>+	compatible = "rockchip,rk3566-pipe-grf", "syscon";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;power {</div><div class='add'>+	power-domain@RK3568_PD_PIPE {</div><div class='add'>+		reg = &lt;RK3568_PD_PIPE&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_PIPE&gt;;</div><div class='add'>+		pm_qos = &lt;&amp;qos_pcie2x1&gt;,</div><div class='add'>+			 &lt;&amp;qos_sata1&gt;,</div><div class='add'>+			 &lt;&amp;qos_sata2&gt;,</div><div class='add'>+			 &lt;&amp;qos_usb3_0&gt;,</div><div class='add'>+			 &lt;&amp;qos_usb3_1&gt;;</div><div class='add'>+		#power-domain-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	phys = &lt;&amp;usb2phy0_otg&gt;;</div><div class='add'>+	phy-names = "usb2-phy";</div><div class='add'>+	extcon = &lt;&amp;usb2phy0&gt;;</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	compatible = "rockchip,rk3566-vop";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts<br/>new file mode 100644<br/>index 000000000000..97415d099d88<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2-manta.dts</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3566-bigtreetech-cb2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "BigTreeTech CB2";</div><div class='add'>+	compatible = "bigtreetech,cb2-manta", "bigtreetech,cb2", "rockchip,rk3566";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi<br/>new file mode 100644<br/>index 000000000000..7f578c50b4ad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,904 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3566.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ext_cam_clk: clock-25000000-cam {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+		clock-output-names = "ext_cam_clk";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can_mcp2515_osc: clock-8000000-mcp2515 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;8000000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;blue_led&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;heartbeat_led&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cooling-levels = &lt;0 50 100 150 200 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm7 0 50000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,name = "Analog RK809";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s1_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;rk809&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;rk809 1&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus: regulator-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_drv&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_otg_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_otg3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vbus&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb2b: regulator-vcc5v0-usb2b {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_usb2b_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb2b";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb2t: regulator-vcc5v0-usb2t {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_usb2t_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb2t";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sd: regulator-vcc-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_sd";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru CLK_MAC1_2TOP&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;125000000&gt;;</div><div class='add'>+	clock_in_out = "input";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m0_miim</div><div class='add'>+			&amp;gmac1m0_tx_bus2</div><div class='add'>+			&amp;gmac1m0_rx_bus2</div><div class='add'>+			&amp;gmac1m0_rgmii_clk</div><div class='add'>+			&amp;gmac1m0_clkinout</div><div class='add'>+			&amp;gmac1m0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy0: phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reset-delay-us = &lt;20000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vdda0v9_image&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcca1v8_image&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1390000&gt;;</div><div class='add'>+		regulator-initial-mode = &lt;1&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru CLK_I2S1_8CH_TX&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='add'>+		pinctrl-names = "default", "pmic-sleep",</div><div class='add'>+				"pmic-power-off", "pmic-reset";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: DCDC_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu: DCDC_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-name = "vdd_npu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_image: LDO_REG1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdda0v9_image";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v9: LDO_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v9";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_pmu: LDO_REG3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdda0v9_pmu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_acodec: LDO_REG4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-name = "vccio_acodec";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc3v3_pmu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pmu: LDO_REG8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pmu";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_image: LDO_REG9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_image";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: DCDC_REG5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: SWITCH_REG1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sd: SWITCH_REG2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vcc3v3_sd";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		codec {</div><div class='add'>+			rockchip,mic-in-differential;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tft_tp: touchscreen@48 {</div><div class='add'>+		compatible = "ti,tsc2007";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+		ti,x-plate-ohms = &lt;660&gt;;</div><div class='add'>+		ti,rt-thr = &lt;3000&gt;;</div><div class='add'>+		ti,fuzzx = &lt;32&gt;;</div><div class='add'>+		ti,fuzzy = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1m0_sclktx &amp;i2s1m0_lrcktx &amp;i2s1m0_sdi0 &amp;i2s1m0_sdo0&gt;;</div><div class='add'>+	rockchip,trcm-sync-tx-only;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi1m1_cs0 &amp;spi1m1_pins&gt;;</div><div class='add'>+</div><div class='add'>+	can_mcp2515: can@0 {</div><div class='add'>+		compatible = "microchip,mcp2515";</div><div class='add'>+		reg = &lt;0x00&gt;;</div><div class='add'>+		clocks = &lt;&amp;can_mcp2515_osc&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mcp2515_int_pin&gt;;</div><div class='add'>+		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		xceiver-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi3m1_cs0 &amp;spi3m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset_h&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio1 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bt {</div><div class='add'>+		bt_enable: bt-enable-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_host_wake: bt-host-wake-l {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake: bt-wake-l {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_drv: pcie-drv {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_reset_h: pcie-reset-h {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio-pwrseq {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_host_wake: wifi-host-wake-l {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_otg_en: vcc5v0-otg-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_usb2t_en: vcc5v0-usb2t-en {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_usb2b_en: vcc5v0-usb2b-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	work-led {</div><div class='add'>+		heartbeat_led: led-heartbeat {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		blue_led: led-blue {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcp2515 {</div><div class='add'>+		mcp2515_int_pin: mcp2515-int-pin {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm12 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm12m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm13 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm13m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm14 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm14m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm15 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm15m1_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	/* WiFi &amp; BT combo module AMPAK AP6256 */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_bus4 &amp;sdmmc1_cmd &amp;sdmmc1_clk&gt;;</div><div class='add'>+	rockchip,default-sample-phase = &lt;90&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake&gt;;</div><div class='add'>+		brcm,drive-strength = &lt;10&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	dma-names = "tx","rx";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1m0_xfer &amp;uart1m0_ctsn &amp;uart1m0_rtsn&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm4345c5";</div><div class='add'>+		clocks = &lt;&amp;rk809 1&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio2 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_host_wake &amp;bt_wake &amp;bt_enable&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcca1v8_pmu&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart5m1_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7m2_xfer&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_otg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb2t&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb2b&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	extcon = &lt;&amp;usb2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts<br/>new file mode 100644<br/>index 000000000000..7cd444caa18b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3566-bigtreetech-cb2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "BigTreeTech Pi 2";</div><div class='add'>+	compatible = "bigtreetech,pi2", "rockchip,rk3566";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts b/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts<br/>index 0c18406e4c59..decc6deeef4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts</a></div><div class='hunk'>@@ -19,9 +19,9 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gmac1;</div><div class='del'>-		mmc0 = &amp;sdmmc0;</div><div class='del'>-		mmc1 = &amp;sdmmc1;</div><div class='del'>-		mmc2 = &amp;sdhci;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+		mmc2 = &amp;sdmmc1;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen: chosen {</div><div class='hunk'>@@ -449,9 +449,9 @@</div><div class='ctx'> 	bluetooth {</div><div class='ctx'> 		compatible = "brcm,bcm43438-bt";</div><div class='ctx'> 		clocks = &lt;&amp;pmucru CLK_RTC_32K&gt;;</div><div class='del'>-		clock-names = "ext_clock";</div><div class='del'>-		device-wake-gpios = &lt;&amp;gpio2 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		host-wake-gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		clock-names = "txco";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio2 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		shutdown-gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_host_wake_l &amp;bt_wake_l &amp;bt_enable_h&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts b/arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts<br/>index 7cd91f8000cb..ed65d3120444 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-lckfb-tspi.dts</a></div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'> 		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts b/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts<br/>index c1194d1e438d..ddf84c2a19cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb_5v: usb-5v-regulator {</div><div class='add'>+	usb_5v: regulator-usb-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "usb_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;usb_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {</div><div class='add'>+	vcc5v0_usb20_host: regulator-vcc5v0-usb20-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+	vcc5v0_usb30_host: regulator-vcc5v0-usb30-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -197,7 +197,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -507,13 +507,11 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd&gt;;</div><div class='del'>-	supports-emmc;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdmmc0 {</div><div class='ctx'> 	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	supports-sd;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts<br/>new file mode 100644<br/>index 000000000000..fb1f65c86883<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts</a></div><div class='hunk'>@@ -0,0 +1,554 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * (http://www.friendlyelec.com)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Tianling Shen &lt;cnsztl@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3566.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "FriendlyElec NanoPi R3S";</div><div class='add'>+	compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;reset_button_pin&gt;;</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			label = "reset";</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;power_led_pin&gt;, &lt;&amp;lan_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+</div><div class='add'>+		power_led: led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan_led: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led: led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_usbc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0_usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_usb_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_usbc: regulator-vdd-usbc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_usbc";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru CLK_MAC1_2TOP&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;125000000&gt;;</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m0_miim</div><div class='add'>+		     &amp;gmac1m0_tx_bus2_level3</div><div class='add'>+		     &amp;gmac1m0_rx_bus2</div><div class='add'>+		     &amp;gmac1m0_rgmii_clk_level2</div><div class='add'>+		     &amp;gmac1m0_rgmii_bus_level3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_gpu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vdd_npu";</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_image: LDO_REG1 {</div><div class='add'>+				regulator-name = "vdda0v9_image";</div><div class='add'>+				regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v9: LDO_REG2 {</div><div class='add'>+				regulator-name = "vdda_0v9";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_pmu: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdda0v9_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_acodec: LDO_REG4 {</div><div class='add'>+				regulator-name = "vccio_acodec";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc3v3_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pmu: LDO_REG8 {</div><div class='add'>+				regulator-name = "vcca1v8_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_image: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcca1v8_image";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_sd: SWITCH_REG2 {</div><div class='add'>+				regulator-name = "vcc3v3_sd";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;eth_phy_reset_pin&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset_h&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gpio-leds {</div><div class='add'>+		lan_led_pin: lan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		power_led_pin: power-led-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_pin: wan-led-pin {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac {</div><div class='add'>+		eth_phy_reset_pin: eth-phy-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_reset_h: pcie-reset-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rockchip-key {</div><div class='add'>+		reset_button_pin: reset-button-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_usb_host_en: vcc5v0-usb-host-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vccio_acodec&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	extcon = &lt;&amp;usb2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi<br/>index ae2536c65a83..5c6f8cc401c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #include "rk3566.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	chassis-type = "tablet";</div><div class='add'>+</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc0 = &amp;sdhci;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -53,7 +55,7 @@</div><div class='ctx'> 			label = "cover";</div><div class='ctx'> 			gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 			linux,input-type = &lt;EV_SW&gt;;</div><div class='del'>-			linux,code = &lt;SW_MACHINE_COVER&gt;;</div><div class='add'>+			linux,code = &lt;SW_LID&gt;;</div><div class='ctx'> 			linux,can-disable;</div><div class='ctx'> 			wakeup-event-action = &lt;EV_ACT_DEASSERTED&gt;;</div><div class='ctx'> 			wakeup-source;</div><div class='hunk'>@@ -129,7 +131,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbat_4g: vbat-4g {</div><div class='add'>+	vbat_4g: regulator-vbat-4g {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vbat_4g";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3800000&gt;;</div><div class='hunk'>@@ -138,7 +140,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vbat_4g_en&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v8: vcc-1v8 {</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -148,7 +150,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8_en&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_bat: vcc-bat {</div><div class='add'>+	vcc_bat: regulator-vcc-bat {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_bat";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -156,7 +158,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3800000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_hall_3v3: vcc-hall-3v3 {</div><div class='add'>+	vcc_hall_3v3: regulator-vcc-hall-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_hall_3v3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -165,7 +167,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -174,7 +176,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_bat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_wl: vcc-wl {</div><div class='add'>+	vcc_wl: regulator-vcc-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -186,7 +188,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_bat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdda_0v9: vdda-0v9 {</div><div class='add'>+	vdda_0v9: regulator-vdda-0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdda_0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -244,7 +246,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;i2s1m0_mclk&gt;, &lt;&amp;pmic_int_l&gt;, &lt;&amp;pmic_sleep&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='hunk'>@@ -684,11 +686,11 @@</div><div class='ctx'> 		compatible = "brcm,bcm43438-bt";</div><div class='ctx'> 		clocks = &lt;&amp;rk817 1&gt;;</div><div class='ctx'> 		clock-names = "lpo";</div><div class='del'>-		device-wake-gpios = &lt;&amp;gpio0 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		host-wake-gpios = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio0 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		host-wakeup-gpios = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_enable_h&gt;, &lt;&amp;bt_host_wake_l&gt;, &lt;&amp;bt_wake_h&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		vbat-supply = &lt;&amp;vcc_wl&gt;;</div><div class='ctx'> 		vddio-supply = &lt;&amp;vcca_1v8_pmu&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi<br/>index db40281eafbe..d0e38412d56a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi</a></div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 			"Internal Speakers", "Speaker Amplifier OUTR",</div><div class='ctx'> 			"Speaker Amplifier INL", "HPOL",</div><div class='ctx'> 			"Speaker Amplifier INR", "HPOR";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;;</div><div class='ctx'> 		simple-audio-card,pin-switches = "Internal Speakers";</div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'> 		VCC-supply = &lt;&amp;vcc_bat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_3v3: vcc-3v3-regulator {</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_3v3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_minipcie: vcc3v3-minipcie-regulator {</div><div class='add'>+	vcc3v3_minipcie: regulator-vcc3v3-minipcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sd: vcc3v3-sd-regulator {</div><div class='add'>+	vcc3v3_sd: regulator-vcc3v3-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_flashled: vcc5v0-flashled-regulator {</div><div class='add'>+	vcc5v0_flashled: regulator-vcc5v0-flashled {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -188,7 +188,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_midu&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host0: vcc5v0-usb-host0-regulator {</div><div class='add'>+	vcc5v0_usb_host0: regulator-vcc5v0-usb-host0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -200,7 +200,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_midu&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host2: vcc5v0-usb-host2-regulator {</div><div class='add'>+	vcc5v0_usb_host2: regulator-vcc5v0-usb-host2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -212,14 +212,14 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_midu&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_bat: vcc-bat-regulator {</div><div class='add'>+	vcc_bat: regulator-vcc-bat {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_bat";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -227,7 +227,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_bat&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd1v2_dvp: vdd1v2-dvp-regulator {</div><div class='add'>+	vdd1v2_dvp: regulator-vdd1v2-dvp {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd1v2_dvp";</div><div class='ctx'> 		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -282,11 +282,11 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		backlight = &lt;&amp;backlight&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		rotation = &lt;90&gt;;</div><div class='ctx'> 		power-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		rotation = &lt;90&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='del'>-			panel_in_dsi: endpoint@0 {</div><div class='add'>+		port {</div><div class='add'>+			panel_in_dsi: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;dsi0_out_con&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -370,7 +370,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='hunk'>@@ -867,6 +867,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;2&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts<br/>new file mode 100644<br/>index 000000000000..9b70026ce4a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb20sx.dts</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rk3566-powkiddy-rk2023.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Powkiddy RGB20SX";</div><div class='add'>+	compatible = "powkiddy,rgb20sx", "rockchip,rk3566";</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_keys: adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;60&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Button is labelled as FN, but according to input</div><div class='add'>+		 * guidelines it should be mode.</div><div class='add'>+		 */</div><div class='add'>+		button-mode {</div><div class='add'>+			label = "MODE";</div><div class='add'>+			linux,code = &lt;BTN_MODE&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1750&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;battery {</div><div class='add'>+	charge-full-design-microamp-hours = &lt;5000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;bluetooth {</div><div class='add'>+	compatible = "realtek,rtl8723ds-bt";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cru {</div><div class='add'>+	assigned-clocks = &lt;&amp;pmucru CLK_RTC_32K&gt;, &lt;&amp;cru PLL_GPLL&gt;,</div><div class='add'>+			  &lt;&amp;pmucru PLL_PPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;32768&gt;, &lt;1200000000&gt;,</div><div class='add'>+			       &lt;200000000&gt;, &lt;292500000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	panel: panel@0 {</div><div class='add'>+		compatible = "powkiddy,rgb30-panel";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_rst&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_in_panel: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;712500&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1390000&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts b/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts<br/>index 5a648db41f35..e274f7bf9dfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts</a></div><div class='hunk'>@@ -269,7 +269,7 @@</div><div class='ctx'> 		simple-audio-card,name = "rk817_ext";</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;spk_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Microphone", "Mic Jack",</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts<br/>index 37a1303d9a34..a9021c524afb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> </div><div class='ctx'> 	fan: gpio_fan {</div><div class='ctx'> 		compatible = "gpio-fan";</div><div class='add'>+		fan-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		gpio-fan,speed-map =</div><div class='ctx'> 				&lt;   0 0&gt;,</div><div class='hunk'>@@ -117,7 +118,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v_dcin {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -130,7 +131,7 @@</div><div class='ctx'> 	 * With no battery attached, also feeds vcc_bat+</div><div class='ctx'> 	 * via ON/OFF_BAT jumper</div><div class='ctx'> 	 */</div><div class='del'>-	vbus: vbus {</div><div class='add'>+	vbus: regulator-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vbus";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -140,7 +141,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {</div><div class='add'>+	vcc3v3_pcie_p: regulator-vcc3v3-pcie-p {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -152,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0_usb {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -166,7 +167,7 @@</div><div class='ctx'> 	 * the host ports are sourced from vcc5v0_usb</div><div class='ctx'> 	 * the otg port is sourced from vcc5v0_midu</div><div class='ctx'> 	 */</div><div class='del'>-	vcc5v0_usb20_host: vcc5v0_usb20_host {</div><div class='add'>+	vcc5v0_usb20_host: regulator-vcc5v0-usb20-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -178,7 +179,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb20_otg: vcc5v0_usb20_otg {</div><div class='add'>+	vcc5v0_usb20_otg: regulator-vcc5v0-usb20-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -188,7 +189,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dcdc_boost&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sd: vcc3v3_sd {</div><div class='add'>+	vcc3v3_sd: regulator-vcc3v3-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -201,7 +202,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* sourced from vbus and vcc_bat+ via rk817 sw5 */</div><div class='del'>-	vcc_sys: vcc_sys {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -212,7 +213,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* sourced from vcc_sys, sdio module operates internally at 3.3v */</div><div class='del'>-	vcc_wl: vcc_wl {</div><div class='add'>+	vcc_wl: regulator-vcc-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_wl";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -265,8 +266,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru SCLK_GMAC1&gt;, &lt;&amp;gmac1_clkin&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;,</div><div class='add'>+			  &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;,</div><div class='add'>+			  &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_GMAC1&gt;,</div><div class='add'>+				 &lt;&amp;gmac1_clkin&gt;;</div><div class='ctx'> 	clock_in_out = "input";</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='hunk'>@@ -347,7 +352,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts<br/>index c164074ddf54..f8cf03380636 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		power-off-delay-us = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {</div><div class='add'>+	vcc3v3_pcie_p: regulator-vcc3v3-pcie-p {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_in: vcc5v0-in-regulator {</div><div class='add'>+	vcc5v0_in: regulator-vcc5v0-in {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_in";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -121,7 +121,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+	vcc5v0_usb30_host: regulator-vcc5v0-usb30-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb30_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb_otg";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -173,8 +173,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;, &lt;&amp;cru SCLK_GMAC1&gt;, &lt;&amp;gmac1_clkin&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;,</div><div class='add'>+			  &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;,</div><div class='add'>+			  &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;,</div><div class='add'>+				 &lt;&amp;cru SCLK_GMAC1&gt;,</div><div class='add'>+				 &lt;&amp;gmac1_clkin&gt;;</div><div class='ctx'> 	clock_in_out = "input";</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='ctx'> 	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='hunk'>@@ -255,7 +259,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='hunk'>@@ -644,6 +648,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;24000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts<br/>index 3ae24e39450a..b5b253f04cdf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30: vcc5v0-usb30-regulator {</div><div class='add'>+	vcc5v0_usb30: regulator-vcc5v0-usb30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb30";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca1v8_image: vcca1v8-image-regulator {</div><div class='add'>+	vcca1v8_image: regulator-vcca1v8-image {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca1v8_image";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8_p&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdda0v9_image: vdda0v9-image-regulator {</div><div class='add'>+	vdda0v9_image: regulator-vdda0v9-image {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca0v9_image";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi<br/>index 45de2630bb50..8453f06c261c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v8: vcc-1v8-regulator {</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_1v8_p&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_3v3: vcc-3v3-regulator {</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_3v3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcca_1v8: vcca-1v8-regulator {</div><div class='add'>+	vcca_1v8: regulator-vcca-1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcca_1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -127,7 +127,7 @@</div><div class='ctx'> 		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='hunk'>@@ -402,9 +402,9 @@</div><div class='ctx'> 		clock-names = "lpo";</div><div class='ctx'> 		device-wakeup-gpios = &lt;&amp;gpio2 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		host-wakeup-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_host_wake_h &amp;bt_reg_on_h &amp;bt_wake_host_h&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		vbat-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 		vddio-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi<br/>index de390d92c35e..1ee5d96a46a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='del'>-#include "rk3566.dtsi"</div><div class='add'>+#include "rk3566t.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	chosen {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts<br/>index 67e7801bd489..7e499064e035 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb_5v: usb-5v-regulator {</div><div class='add'>+	usb_5v: regulator-usb-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "usb_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;usb_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+	vcc5v0_usb30_host: regulator-vcc5v0-usb30-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb30_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -133,7 +133,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb_otg";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts b/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts<br/>index f2cc086e5001..6224d72813e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='del'>-#include "rk3566.dtsi"</div><div class='add'>+#include "rk3566t.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Radxa ROCK 3C";</div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v_dcin: vcc5v-dcin-regulator {</div><div class='add'>+	vcc5v_dcin: regulator-vcc5v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+	vcc5v0_usb30_host: regulator-vcc5v0-usb30-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_cam: vcc-cam-regulator {</div><div class='add'>+	vcc_cam: regulator-vcc-cam {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_mipi: vcc-mipi-regulator {</div><div class='add'>+	vcc_mipi: regulator-vcc-mipi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -636,6 +636,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts<br/>index fdbb4a6a19d8..b64d0c957ef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */</div><div class='del'>-	vcc3v0_sd: vcc3v0-sd-regulator {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v0_sd";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled VCC_SSD in schematic */</div><div class='del'>-	vcc3v3_pcie_p: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie_p: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie_p";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vbus&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v_dcin: vcc5v-dcin-regulator {</div><div class='add'>+	vcc5v_dcin: regulator-vcc5v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts<br/>index 2b6f0df477b6..38155316846d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled +12v in schematic */</div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled +5v in schematic */</div><div class='del'>-	vcc_5v: vcc-5v-regulator {</div><div class='add'>+	vcc_5v: regulator-vcc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sd_pwr: vcc-sd-pwr-regulator {</div><div class='add'>+	vcc_sd_pwr: regulator-vcc-sd-pwr {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sd_pwr";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts<br/>index 9a6a63277c3d..2e130eef54df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled DCIN_12V in schematic */</div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 	 * Labelled VCC3V0_SD in schematic to not conflict with PMIC</div><div class='ctx'> 	 * regulator, it's 3.3v in actuality</div><div class='ctx'> 	 */</div><div class='del'>-	vcc3v0_sd: vcc3v0-sd-regulator {</div><div class='add'>+	vcc3v0_sd: regulator-vcc3v0-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v0_sd";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_pcie: vcc12v-pcie-regulator {</div><div class='add'>+	vcc12v_pcie: regulator-vcc12v-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_pcie";</div><div class='ctx'> 		regulator-always-on;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi<br/>index e42c474ef4ad..6b9aa0e1ad21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus: vbus-regulator {</div><div class='add'>+	vbus: regulator-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vbus";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* sourced from vbus, vbus is provided by the carrier board */</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vbus&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -213,7 +213,7 @@</div><div class='ctx'> 		clock-output-names = "rk808-clkout1", "rk808-clkout2";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi<br/>index 6c4b17d27bdc..3fcca79279f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3566.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566.dtsi</a></div><div class='hunk'>@@ -1,35 +1,107 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> </div><div class='del'>-#include "rk356x.dtsi"</div><div class='add'>+#include "rk3566-base.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	compatible = "rockchip,rk3566";</div><div class='add'>+	cpu0_opp_table: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1104000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1104000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000 1025000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000 1000000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pipegrf {</div><div class='del'>-	compatible = "rockchip,rk3566-pipe-grf", "syscon";</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;power {</div><div class='del'>-	power-domain@RK3568_PD_PIPE {</div><div class='del'>-		reg = &lt;RK3568_PD_PIPE&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru PCLK_PIPE&gt;;</div><div class='del'>-		pm_qos = &lt;&amp;qos_pcie2x1&gt;,</div><div class='del'>-			 &lt;&amp;qos_sata1&gt;,</div><div class='del'>-			 &lt;&amp;qos_sata2&gt;,</div><div class='del'>-			 &lt;&amp;qos_usb3_0&gt;,</div><div class='del'>-			 &lt;&amp;qos_usb3_1&gt;;</div><div class='del'>-		#power-domain-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_xhci {</div><div class='del'>-	phys = &lt;&amp;usb2phy0_otg&gt;;</div><div class='del'>-	phy-names = "usb2-phy";</div><div class='del'>-	extcon = &lt;&amp;usb2phy0&gt;;</div><div class='del'>-	maximum-speed = "high-speed";</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;vop {</div><div class='del'>-	compatible = "rockchip,rk3566-vop";</div><div class='add'>+&amp;gpu {</div><div class='add'>+	operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566t.dtsi b/arch/arm64/boot/dts/rockchip/rk3566t.dtsi<br/>new file mode 100644<br/>index 000000000000..cd89bd3b125b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3566t.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3566t.dtsi</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include "rk3566-base.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpu0_opp_table: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1104000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1104000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000 1025000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts<br/>index c87fad2c34cb..4d3ebe50b90b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_receiver_pin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {</div><div class='add'>+	pcie30_avdd0v9: regulator-pcie30-avdd0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* pi6c pcie clock generator feeds both ports */</div><div class='del'>-	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {</div><div class='add'>+	vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -126,7 +126,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */</div><div class='del'>-	vcc3v3_minipcie: vcc3v3-minipcie-regulator {</div><div class='add'>+	vcc3v3_minipcie: regulator-vcc3v3-minipcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_minipcie";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -140,7 +140,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */</div><div class='del'>-	vcc3v3_ngff: vcc3v3-ngff-regulator {</div><div class='add'>+	vcc3v3_ngff: regulator-vcc3v3-ngff {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_ngff";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -153,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -163,7 +163,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -175,7 +175,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -291,7 +291,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts<br/>index 8c3ab07d3807..b01f952b640e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts</a></div><div class='hunk'>@@ -22,11 +22,20 @@</div><div class='ctx'> 		mmc1 = &amp;sdhci;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;20 220&gt;;</div><div class='add'>+		default-brightness-level = &lt;100&gt;;</div><div class='add'>+		num-interpolated-steps = &lt;200&gt;;</div><div class='add'>+		power-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm4 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	chosen: chosen {</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -73,7 +82,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -83,7 +92,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -93,7 +102,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -103,7 +112,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host: vcc5v0-usb-host {</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -115,7 +124,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -127,7 +136,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lcd0_n: vcc3v3-lcd0-n {</div><div class='add'>+	vcc3v3_lcd0_n: regulator-vcc3v3-lcd0-n {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lcd0_n";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -143,7 +152,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lcd1_n: vcc3v3-lcd1-n {</div><div class='add'>+	vcc3v3_lcd1_n: regulator-vcc3v3-lcd1-n {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lcd1_n";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -184,6 +193,47 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	clock-master;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "wanchanglong,w552793baa", "raydium,rm67200";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vdd-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+		vsn-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vsp-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			panel_in_dsi: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_in {</div><div class='add'>+	dsi0_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_dsi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_out {</div><div class='add'>+	dsi0_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_dsi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_dphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gmac0 {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;cru SCLK_GMAC0_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC0&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC0_RGMII_SPEED&gt;;</div><div class='hunk'>@@ -275,7 +325,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -581,6 +631,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;saradc {</div><div class='ctx'> 	vref-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -672,8 +726,9 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;vop {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru PLL_VPLL&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;xin24m&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;132000000&gt;, &lt;132000000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -687,3 +742,10 @@</div><div class='ctx'> 		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_MIPI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dsi0_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi<br/>index 25c49bdbadbc..b0ac1e58a352 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -152,7 +152,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts<br/>new file mode 100644<br/>index 000000000000..bc51123d53f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3568-hinlink-opc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HINLINK H66K";</div><div class='add'>+	compatible = "hinlink,h66k", "rockchip,rk3568";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts<br/>new file mode 100644<br/>index 000000000000..793ee651b868<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3568-hinlink-opc.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "HINLINK H68K";</div><div class='add'>+	compatible = "hinlink,h68k", "rockchip,rk3568";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC0_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC0&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC0_RGMII_SPEED&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;125000000&gt;;</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_tx_bus2</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_rgmii_clk</div><div class='add'>+		     &amp;gmac0_rgmii_bus</div><div class='add'>+		     &amp;gmac0_rstn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;125000000&gt;;</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m1_miim</div><div class='add'>+		     &amp;gmac1m1_tx_bus2</div><div class='add'>+		     &amp;gmac1m1_rx_bus2</div><div class='add'>+		     &amp;gmac1m1_rgmii_clk</div><div class='add'>+		     &amp;gmac1m1_rgmii_bus</div><div class='add'>+		     &amp;gmac1_rstn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PD3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PB0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gmac {</div><div class='add'>+		gmac0_rstn: gmac0-rstn {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1_rstn: gmac1-rstn {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi<br/>new file mode 100644<br/>index 000000000000..14f3839ca091<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,666 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3568.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm3_ir_m0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;factory&gt;;</div><div class='add'>+</div><div class='add'>+		button-factory {</div><div class='add'>+			label = "factory";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;green_led&gt;, &lt;&amp;red_led&gt;, &lt;&amp;work_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			function = LED_FUNCTION_DISK;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc0v9_2g5: regulator-0v9-vcc-2g5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc0v9_2g5";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcinp: regulator-12v-vcc-dcinp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcinp";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pi6c_05: regulator-3v3-vcc-pi6c-05 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan_power_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pi6c_05";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd: regulator-3v3-vcc-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sd_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-3v3-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-vcc-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcinp&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb30_otg0: regulator-5v0-vcc-usb30-otg0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_power_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb30_otg0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vdda0v9_image&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcca1v8_image&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rk809: pmic@20 {</div><div class='add'>+		compatible = "rockchip,rk809";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		wakeup-source;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_logic: DCDC_REG1 {</div><div class='add'>+				regulator-name = "vdd_logic";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu: DCDC_REG2 {</div><div class='add'>+				regulator-name = "vdd_gpu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_ddr: DCDC_REG3 {</div><div class='add'>+				regulator-name = "vcc_ddr";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu: DCDC_REG4 {</div><div class='add'>+				regulator-name = "vdd_npu";</div><div class='add'>+				regulator-initial-mode = &lt;0x2&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8: DCDC_REG5 {</div><div class='add'>+				regulator-name = "vcc_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_image: LDO_REG1 {</div><div class='add'>+				regulator-name = "vdda0v9_image";</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v9: LDO_REG2 {</div><div class='add'>+				regulator-name = "vdda_0v9";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v9_pmu: LDO_REG3 {</div><div class='add'>+				regulator-name = "vdda0v9_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_acodec: LDO_REG4 {</div><div class='add'>+				regulator-name = "vccio_acodec";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd: LDO_REG5 {</div><div class='add'>+				regulator-name = "vccio_sd";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3_pmu: LDO_REG6 {</div><div class='add'>+				regulator-name = "vcc3v3_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8: LDO_REG7 {</div><div class='add'>+				regulator-name = "vcca_1v8";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pmu: LDO_REG8 {</div><div class='add'>+				regulator-name = "vcca1v8_pmu";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_image: LDO_REG9 {</div><div class='add'>+				regulator-name = "vcca1v8_image";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3: SWITCH_REG1 {</div><div class='add'>+				regulator-name = "vcc_3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc3v3: SWITCH_REG2 {</div><div class='add'>+				regulator-name = "vcc3v3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wifi_perstn&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	data-lanes = &lt;1 2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x1 {</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;lan_resetb&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x2 {</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;lan_reseta&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	keys {</div><div class='add'>+		factory: factory {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		green_led: green-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		red_led: red-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		work_led: work-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir {</div><div class='add'>+		pwm3_ir_m0: pwm3-ir-m0 {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc {</div><div class='add'>+		sd_pwren: sd-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		lan_power_en: lan-power-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan_reseta: lan-reseta {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan_resetb: lan-resetb {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_perstn: wifi-perstn {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic {</div><div class='add'>+		pmic_int: pmic-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_power_en: usb-power-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc3v3_pmu&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vccio_acodec&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Via Type-C adapter */</div><div class='add'>+&amp;sata0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det&gt;;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts b/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts<br/>index a3112d5df200..a7fe5655a85d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts</a></div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_5v: dc-5v-regulator {</div><div class='add'>+	dc_5v: regulator-dc-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_5v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_5v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator {</div><div class='add'>+	vcc3v3_m2_pcie: regulator-vcc3v3-m2-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "m2_pcie_3v3";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator {</div><div class='add'>+	vcc3v3_mini_pcie: regulator-vcc3v3-mini-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "minipcie_3v3";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -106,7 +106,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {</div><div class='add'>+	vcc5v0_usb20_host: regulator-vcc5v0-usb20-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb20_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {</div><div class='add'>+	vcc5v0_usb30_host: regulator-vcc5v0-usb30-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb30_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator {</div><div class='add'>+	vcc5v0_otg_vbus: regulator-vcc5v0-otg-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_otg_vbus";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -223,7 +223,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -589,7 +589,6 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd&gt;;</div><div class='del'>-	supports-emmc;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts b/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts<br/>index c491dc4d4947..b1f185a58902 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts</a></div><div class='hunk'>@@ -206,12 +206,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c2m0_xfer&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;i2c3 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='hunk'>@@ -357,6 +351,19 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spi0 {</div><div class='add'>+	/* use hardware chipselect on cs0 (cs1 unconnected) */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi0m0_pins&gt;, &lt;&amp;spi0m0_cs0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	fram@0 {</div><div class='add'>+		compatible = "fujitsu,mb85rs128ty";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;tsadc {</div><div class='ctx'> 	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='ctx'> 	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts<br/>index b6ad8328c7eb..718d1a2da8e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts</a></div><div class='hunk'>@@ -17,36 +17,56 @@</div><div class='ctx'> 		ethernet0 = &amp;gmac0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gpio4_a0_k1_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+		button-reset {</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "RESET";</div><div class='add'>+			linux,code = &lt;KEY_RESTART&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;lan1_led_pin&gt;, &lt;&amp;lan2_led_pin&gt;, &lt;&amp;power_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;lan1_led_pin&gt;, &lt;&amp;lan2_led_pin&gt;, &lt;&amp;sys_led_pin&gt;, &lt;&amp;wan_led_pin&gt;;</div><div class='ctx'> </div><div class='ctx'> 		led-lan1 {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='ctx'> 			function = LED_FUNCTION_LAN;</div><div class='ctx'> 			function-enumerator = &lt;1&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "LAN-1";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-lan2 {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='ctx'> 			function = LED_FUNCTION_LAN;</div><div class='ctx'> 			function-enumerator = &lt;2&gt;;</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 RK_PD7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "LAN-2";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		power_led: led-power {</div><div class='add'>+		power_led: led-sys {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='ctx'> 			function = LED_FUNCTION_POWER;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='ctx'> 			gpios = &lt;&amp;gpio4 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "SYS";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-wan {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='ctx'> 			function = LED_FUNCTION_WAN;</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "WAN";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -58,6 +78,7 @@</div><div class='ctx'> 	clock_in_out = "output";</div><div class='ctx'> 	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='ctx'> 	phy-mode = "rgmii";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='ctx'> 		     &amp;gmac0_tx_bus2</div><div class='hunk'>@@ -116,6 +137,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	gpio-keys {</div><div class='add'>+		gpio4_a0_k1_pin: gpio4-a0-k1-pin {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-leds {</div><div class='ctx'> 		lan1_led_pin: lan1-led-pin {</div><div class='ctx'> 			rockchip,pins = &lt;3 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -125,7 +152,7 @@</div><div class='ctx'> 			rockchip,pins = &lt;3 RK_PD7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		power_led_pin: power-led-pin {</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi<br/>index 93189f830640..e3f44ea4eabe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi</a></div><div class='hunk'>@@ -18,12 +18,27 @@</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		mmc0 = &amp;sdmmc0;</div><div class='ctx'> 		mmc1 = &amp;sdhci;</div><div class='add'>+		rtc0 = &amp;hym8563;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen: chosen {</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "MASKROM";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hdmi-con {</div><div class='ctx'> 		compatible = "hdmi-connector";</div><div class='ctx'> 		type = "a";</div><div class='hunk'>@@ -35,7 +50,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_usbc: vdd-usbc-regulator {</div><div class='add'>+	vdd_usbc: regulator-vdd-usbc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_usbc";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -44,7 +59,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -54,7 +69,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_usbc&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -64,7 +79,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_usbc&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -75,7 +90,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -85,7 +100,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_usbc&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -99,7 +114,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -111,7 +126,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {</div><div class='add'>+	pcie30_avdd0v9: regulator-pcie30-avdd0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -121,7 +136,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -215,7 +230,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -486,9 +501,12 @@</div><div class='ctx'> &amp;sdhci {</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts<br/>index 6a02db4f073f..0f844806ec54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hp_det_pin&gt;;</div><div class='ctx'> 		simple-audio-card,name = "Analog RK817";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio0 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Headphone", "Headphones",</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -126,7 +126,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb_otg";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -273,7 +273,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts b/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts<br/>new file mode 100644<br/>index 000000000000..58c1052ba8ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts</a></div><div class='hunk'>@@ -0,0 +1,588 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3568.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Ariaboard Photonicat";</div><div class='add'>+	compatible = "ariaboard,photonicat", "rockchip,rk3568";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc0;</div><div class='add'>+		mmc2 = &amp;sdmmc1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	battery: battery {</div><div class='add'>+		compatible = "simple-battery";</div><div class='add'>+		device-chemistry = "lithium-ion";</div><div class='add'>+		charge-full-design-microamp-hours = &lt;6800000&gt;;</div><div class='add'>+		energy-full-design-microwatt-hours = &lt;25000000&gt;;</div><div class='add'>+		voltage-max-design-microvolt = &lt;4200000&gt;;</div><div class='add'>+		voltage-min-design-microvolt = &lt;3400000&gt;;</div><div class='add'>+</div><div class='add'>+		ocv-capacity-celsius = &lt;25&gt;;</div><div class='add'>+		ocv-capacity-table-0 =  &lt;4100000 100&gt;, &lt;4040000 90&gt;,</div><div class='add'>+					&lt;3980000 80&gt;, &lt;3920000 70&gt;,</div><div class='add'>+					&lt;3870000 60&gt;, &lt;3820000 50&gt;,</div><div class='add'>+					&lt;3790000 40&gt;, &lt;3770000 30&gt;,</div><div class='add'>+					&lt;3740000 20&gt;, &lt;3680000 10&gt;,</div><div class='add'>+					&lt;3450000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_con: hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* actually fed by vcc_syson, dependent</div><div class='add'>+	 * on pi6c clock generator</div><div class='add'>+	 */</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_pi6c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* pi6c pcie clock generator */</div><div class='add'>+	vcc3v3_pi6c: regulator-vcc3v3-pi6c {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pi6c";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_syson&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd: regulator-vcc3v3-sd {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc0_pwren&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "vcc3v3_sd";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_syson&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v4_rf: regulator-vcc3v4-rf {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rf_pwr_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v4_rf";</div><div class='add'>+		regulator-min-microvolt = &lt;3400000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vccin_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb30_otg0: regulator-vcc5v0-usb30-otg0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb30_otg0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vccin_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vccin_5v: regulator-vccin-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vccin_5v";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sysin: regulator-vcc-sysin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sysin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vccin_5v&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_syson: regulator-vcc-syson {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_syson";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcca_1v8: regulator-vcca-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca_1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdda_0v9: regulator-vdda-0v9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdda_0v9";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_gpu: regulator-vdd-gpu {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm2 0 5000 1&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc_syson&gt;;</div><div class='add'>+		regulator-name = "vdd_gpu";</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_logic: regulator-vdd-logic {</div><div class='add'>+		compatible = "pwm-regulator";</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 5000 1&gt;;</div><div class='add'>+		pwm-supply = &lt;&amp;vcc_syson&gt;;</div><div class='add'>+		regulator-name = "vdd_logic";</div><div class='add'>+		regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+		regulator-settling-time-up-us = &lt;250&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill-modem {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "M.2 USB Modem";</div><div class='add'>+		radio-type = "wwan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;pmucru CLK_RTC_32K&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on_h &amp;clk32k_out1&gt;;</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Motorcomm YT8521SC LAN port (require SGMII) */</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Motorcomm YT8521SC WAN port */</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru SCLK_GMAC1_RX_TX&gt;, &lt;&amp;cru SCLK_GMAC1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru SCLK_GMAC1_RGMII_SPEED&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;125000000&gt;;</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1m1_miim</div><div class='add'>+		     &amp;gmac1m1_tx_bus2</div><div class='add'>+		     &amp;gmac1m1_rx_bus2</div><div class='add'>+		     &amp;gmac1m1_rgmii_clk</div><div class='add'>+		     &amp;gmac1m1_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	avdd-0v9-supply = &lt;&amp;vdda_0v9&gt;;</div><div class='add'>+	avdd-1v8-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu: regulator@1c {</div><div class='add'>+		compatible = "tcs,tcs4525";</div><div class='add'>+		reg = &lt;0x1c&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_syson&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2m1_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy: ethernet-phy@3 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x3&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio4 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+		tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* M.2 E-Key for PCIe WLAN */</div><div class='add'>+&amp;pcie3x2 {</div><div class='add'>+	max-link-speed = &lt;1&gt;;</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x1m0_pins&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bt {</div><div class='add'>+		bt_reg_on_h: bt-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_pwren_h: pcie-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0 {</div><div class='add'>+		sdmmc0_pwren: sdmmc0-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		rf_pwr_en: rf-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_host_pwren_h: usb-host-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_reg_on_h: wifi-reg-on-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pmu_io_domains {</div><div class='add'>+	pmuio1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	pmuio2-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio2-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio3-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio4-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	vccio5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio6-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vccio7-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Micro SD card slot */</div><div class='add'>+&amp;sdmmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_bus4 &amp;sdmmc0_clk &amp;sdmmc0_cmd&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Qualcomm Atheros QCA9377 WiFi */</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_bus4 &amp;sdmmc1_cmd &amp;sdmmc1_clk&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wifi: wifi@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;;</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Qualcomm Atheros QCA9377 Bluetooth */</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1m0_xfer &amp;uart1m0_ctsn &amp;uart1m0_rtsn&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "qcom,qca9377-bt";</div><div class='add'>+		clocks = &lt;&amp;pmucru CLK_RTC_32K&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on_h&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Debug UART */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Onboard power management MCU */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	dma-names = "tx", "rx";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* M.2 E-Key for USB Bluetooth */</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB Type-A Port */</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* M.2 B-Key for USB Modem WWAN */</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc3v4_rf&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP0&gt;, &lt;&amp;cru DCLK_VOP1&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pmucru PLL_HPLL&gt;, &lt;&amp;cru PLL_VPLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xin32k {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;clk32k_out1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts<br/>index e601d9271ba8..6ae4316761c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a></div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			function = LED_FUNCTION_DISK;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "hdd1:green:disk";</div><div class='ctx'> 			linux,default-trigger = "disk-activity";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;hdd1_led_pin&gt;;</div><div class='hunk'>@@ -59,6 +60,7 @@</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			function = LED_FUNCTION_DISK;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "hdd2:green:disk";</div><div class='ctx'> 			linux,default-trigger = "disk-activity";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;hdd2_led_pin&gt;;</div><div class='hunk'>@@ -68,6 +70,7 @@</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			function = LED_FUNCTION_DISK;</div><div class='ctx'> 			gpios = &lt;&amp;gpio1 RK_PD7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "hdd3:green:disk";</div><div class='ctx'> 			linux,default-trigger = "disk-activity";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;hdd3_led_pin&gt;;</div><div class='hunk'>@@ -77,6 +80,7 @@</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			function = LED_FUNCTION_DISK;</div><div class='ctx'> 			gpios = &lt;&amp;gpio2 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "hdd4:green:disk";</div><div class='ctx'> 			linux,default-trigger = "disk-activity";</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;hdd4_led_pin&gt;;</div><div class='hunk'>@@ -477,9 +481,62 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mdio0 {</div><div class='del'>-	rgmii_phy0: ethernet-phy@0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@3 {</div><div class='add'>+		/* Motorcomm YT8521 phy */</div><div class='ctx'> 		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='add'>+		reg = &lt;0x3&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;eth_phy0_reset_pin&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The MCU can provide system temperature too, but only by polling and of</div><div class='add'>+ * course also cannot set trip points. So attach to the cpu thermal-zone</div><div class='add'>+ * instead to control the fan.</div><div class='add'>+ */</div><div class='add'>+&amp;cpu_thermal {</div><div class='add'>+	trips {</div><div class='add'>+		case_fan0: case-fan0 {</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			temperature = &lt;35000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		case_fan1: case-fan1 {</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			temperature = &lt;45000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		case_fan2: case-fan2 {</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			temperature = &lt;65000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		/*</div><div class='add'>+		 * Always provide some air movement, due to small case</div><div class='add'>+		 * full of harddrives.</div><div class='add'>+		 */</div><div class='add'>+		map1 {</div><div class='add'>+			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='add'>+			trip = &lt;&amp;case_fan0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map2 {</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 3&gt;;</div><div class='add'>+			trip = &lt;&amp;case_fan1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map3 {</div><div class='add'>+			cooling-device = &lt;&amp;fan 4 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			trip = &lt;&amp;case_fan2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -504,6 +561,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	gmac0 {</div><div class='add'>+		eth_phy0_reset_pin: eth-phy0-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	keys {</div><div class='ctx'> 		copy_button_pin: copy-button-pin {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='hunk'>@@ -567,6 +630,8 @@</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	max-frequency = &lt;200000000&gt;;</div><div class='ctx'> 	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -582,6 +647,15 @@</div><div class='ctx'>  */</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	mcu {</div><div class='add'>+		compatible = "qnap,ts433-mcu";</div><div class='add'>+</div><div class='add'>+		fan: fan-0 {</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			cooling-levels = &lt;0 64 89 128 166 204 221 238&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi<br/>index 19d309654bdb..729e38b9f620 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {</div><div class='add'>+	pcie30_avdd0v9: regulator-pcie30-avdd0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_input&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* labeled +5v_input in schematic */</div><div class='del'>-	vcc5v_input: vcc5v-input-regulator {</div><div class='add'>+	vcc5v_input: regulator-vcc5v-input {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v_input";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -141,7 +141,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		wakeup-source;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts<br/>index 84a0789fad96..98cfa3abb809 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> 		multi-led {</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> </div><div class='ctx'> 			led-red {</div><div class='hunk'>@@ -35,7 +36,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus_typec: vbus-typec-regulator {</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -50,7 +51,7 @@</div><div class='ctx'> 	/* actually fed by vcc5v0_sys, dependent</div><div class='ctx'> 	 * on pi6c clock generator</div><div class='ctx'> 	 */</div><div class='del'>-	vcc3v3_minipcie: vcc3v3-minipcie-regulator {</div><div class='add'>+	vcc3v3_minipcie: regulator-vcc3v3-minipcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -62,7 +63,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_ngff: vcc3v3-ngff-regulator {</div><div class='add'>+	vcc3v3_ngff: regulator-vcc3v3-ngff {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -74,7 +75,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {</div><div class='add'>+	vcc3v3_pcie30x1: regulator-vcc3v3-pcie30x1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -86,7 +87,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {</div><div class='add'>+	vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -123,7 +124,7 @@</div><div class='ctx'> &amp;pcie3x1 {</div><div class='ctx'> 	num-lanes = &lt;1&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie30x1m0_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x1_reset_h&gt;;</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_minipcie&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -148,6 +149,10 @@</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie30x1_reset_h: pcie30x1-reset-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie30x2_reset_h: pcie30x2-reset-h {</div><div class='ctx'> 			rockchip,pins = &lt;2 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts<br/>index e333449ead04..60faa0c80cd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {</div><div class='add'>+	pcie30_avdd0v9: regulator-pcie30-avdd0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -126,7 +126,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -147,7 +147,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_otg";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -255,7 +255,7 @@</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -272,7 +272,6 @@</div><div class='ctx'> 				regulator-name = "vdd_logic";</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-boot-on;</div><div class='del'>-				regulator-init-microvolt = &lt;900000&gt;;</div><div class='ctx'> 				regulator-initial-mode = &lt;0x2&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -285,7 +284,6 @@</div><div class='ctx'> </div><div class='ctx'> 			vdd_gpu: DCDC_REG2 {</div><div class='ctx'> 				regulator-name = "vdd_gpu";</div><div class='del'>-				regulator-init-microvolt = &lt;900000&gt;;</div><div class='ctx'> 				regulator-initial-mode = &lt;0x2&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='hunk'>@@ -309,7 +307,6 @@</div><div class='ctx'> </div><div class='ctx'> 			vdd_npu: DCDC_REG4 {</div><div class='ctx'> 				regulator-name = "vdd_npu";</div><div class='del'>-				regulator-init-microvolt = &lt;900000&gt;;</div><div class='ctx'> 				regulator-initial-mode = &lt;0x2&gt;;</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts<br/>index 59f1403b4fa5..44cfdfeed668 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts</a></div><div class='hunk'>@@ -79,14 +79,14 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v9: pcie30-avdd0v9-regulator {</div><div class='add'>+	pcie30_avdd0v9: regulator-pcie30-avdd0v9 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v9";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -107,7 +107,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* pi6c pcie clock generator */</div><div class='del'>-	vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {</div><div class='add'>+	vcc3v3_pi6c_03: regulator-vcc3v3-pi6c-03 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pi6c_03";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -117,7 +117,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie: vcc3v3-pcie-regulator {</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -129,7 +129,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -139,7 +139,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -159,7 +159,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -171,7 +171,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_hub: vcc5v0-usb-hub-regulator {</div><div class='add'>+	vcc5v0_usb_hub: regulator-vcc5v0-usb-hub {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -182,7 +182,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {</div><div class='add'>+	vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -194,7 +194,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_cam: vcc-cam-regulator {</div><div class='add'>+	vcc_cam: regulator-vcc-cam {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -210,7 +210,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_mipi: vcc-mipi-regulator {</div><div class='add'>+	vcc_mipi: regulator-vcc-mipi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -333,7 +333,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S1_MCLKOUT_TX&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1m0_mclk&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='hunk'>@@ -778,20 +778,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart1m0_xfer &amp;uart1m0_ctsn &amp;uart1m0_rtsn&gt;;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='ctx'> 	status = "okay";</div><div class='del'>-</div><div class='del'>-	bluetooth {</div><div class='del'>-		compatible = "brcm,bcm43438-bt";</div><div class='del'>-		clocks = &lt;&amp;rk809 1&gt;;</div><div class='del'>-		clock-names = "lpo";</div><div class='del'>-		device-wakeup-gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		host-wakeup-gpios = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		shutdown-gpios = &lt;&amp;gpio4 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;bt_host_wake &amp;bt_wake &amp;bt_enable&gt;;</div><div class='del'>-		vbat-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='del'>-		/* vddio comes from regulator on module, use IO bank voltage instead */</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart2 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso<br/>index ebcaeafc3800..048933de2943 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-io-expander.dtso</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	usb_host_vbus: usb-host-vbus-regulator {</div><div class='add'>+	usb_host_vbus: regulator-usb-host-vbus {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_eth: vcc1v8-eth-regulator {</div><div class='add'>+	vcc1v8_eth: regulator-vcc1v8-eth {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -47,9 +47,8 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_eth: vcc3v3-eth-regulator {</div><div class='add'>+	vcc3v3_eth: regulator-vcc3v3-eth {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-low;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vcc3v3_eth_enn&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts b/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts<br/>index 170b14f92f51..bb33fabae16e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5.dts</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hdmi_tx_5v: hdmi-tx-5v-regulator {</div><div class='add'>+	hdmi_tx_5v: regulator-hdmi-tx-5v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> </div><div class='ctx'> 	pdm_codec: pdm-codec {</div><div class='ctx'> 		compatible = "dmic-codec";</div><div class='del'>-		num-channels = &lt;1&gt;;</div><div class='add'>+		num-channels = &lt;2&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_cam: vcc12v-cam-regulator {</div><div class='add'>+	vcc12v_cam: regulator-vcc12v-cam {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio2 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -82,7 +82,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_in: vcc12v-in-regulator {</div><div class='add'>+	vcc12v_in: regulator-vcc12v-in {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "12v_in";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v8_cam: vcc3v8-cam-regulator {</div><div class='add'>+	vcc3v8_cam: regulator-vcc3v8-cam {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio0 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v_in: vcc5v-in-regulator {</div><div class='add'>+	vcc5v_in: regulator-vcc5v-in {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "5v_in";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -167,6 +167,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +182,7 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='ctx'> 		vcc3-supply = &lt;&amp;vcc5v_in&gt;;</div><div class='hunk'>@@ -414,6 +418,10 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c4m1_xfer&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pdm {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pdmm0_clk</div><div class='ctx'> 		     &amp;pdmm0_sdi0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi<br/>index 0946310e8c12..e719a3df126c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3568.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3568.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3568.dtsi</a></div><div class='hunk'>@@ -3,11 +3,99 @@</div><div class='ctx'>  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "rk356x.dtsi"</div><div class='add'>+#include "rk356x-base.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "rockchip,rk3568";</div><div class='ctx'> </div><div class='add'>+	cpu0_opp_table: opp-table-0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1104000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1104000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1025000 1025000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1100000 1100000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1992000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1992000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000 1000000 1000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sata0: sata@fc000000 {</div><div class='ctx'> 		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";</div><div class='ctx'> 		reg = &lt;0 0xfc000000 0 0x1000&gt;;</div><div class='hunk'>@@ -64,7 +152,7 @@</div><div class='ctx'> 		compatible = "rockchip,rk3568-pcie";</div><div class='ctx'> 		#address-cells = &lt;3&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xf&gt;;</div><div class='add'>+		bus-range = &lt;0x10 0x1f&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru ACLK_PCIE30X1_MST&gt;, &lt;&amp;cru ACLK_PCIE30X1_SLV&gt;,</div><div class='ctx'> 			 &lt;&amp;cru ACLK_PCIE30X1_DBI&gt;, &lt;&amp;cru PCLK_PCIE30X1&gt;,</div><div class='ctx'> 			 &lt;&amp;cru CLK_PCIE30X1_AUX_NDFT&gt;;</div><div class='hunk'>@@ -87,7 +175,7 @@</div><div class='ctx'> 		num-ib-windows = &lt;6&gt;;</div><div class='ctx'> 		num-ob-windows = &lt;2&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='del'>-		msi-map = &lt;0x0 &amp;gic 0x1000 0x1000&gt;;</div><div class='add'>+		msi-map = &lt;0x1000 &amp;its 0x1000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie30phy&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -117,7 +205,7 @@</div><div class='ctx'> 		compatible = "rockchip,rk3568-pcie";</div><div class='ctx'> 		#address-cells = &lt;3&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xf&gt;;</div><div class='add'>+		bus-range = &lt;0x20 0x2f&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru ACLK_PCIE30X2_MST&gt;, &lt;&amp;cru ACLK_PCIE30X2_SLV&gt;,</div><div class='ctx'> 			 &lt;&amp;cru ACLK_PCIE30X2_DBI&gt;, &lt;&amp;cru PCLK_PCIE30X2&gt;,</div><div class='ctx'> 			 &lt;&amp;cru CLK_PCIE30X2_AUX_NDFT&gt;;</div><div class='hunk'>@@ -140,7 +228,7 @@</div><div class='ctx'> 		num-ib-windows = &lt;6&gt;;</div><div class='ctx'> 		num-ob-windows = &lt;2&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='del'>-		msi-map = &lt;0x0 &amp;gic 0x2000 0x1000&gt;;</div><div class='add'>+		msi-map = &lt;0x2000 &amp;its 0x2000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie30phy&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -262,6 +350,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;pmucru CLK_PCIEPHY0_REF&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;100000000&gt;;</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_PIPEPHY0&gt;;</div><div class='add'>+		reset-names = "phy";</div><div class='ctx'> 		rockchip,pipe-grf = &lt;&amp;pipegrf&gt;;</div><div class='ctx'> 		rockchip,pipe-phy-grf = &lt;&amp;pipe_phy_grf0&gt;;</div><div class='ctx'> 		#phy-cells = &lt;1&gt;;</div><div class='hunk'>@@ -269,11 +358,24 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu0_opp_table {</div><div class='del'>-	opp-1992000000 {</div><div class='del'>-		opp-hz = /bits/ 64 &lt;1992000000&gt;;</div><div class='del'>-		opp-microvolt = &lt;1150000 1150000 1150000&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu1 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu2 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu3 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pipegrf {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi<br/>index 0ee0ada6f0ab..fd2214b6fad4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk356x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk356x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk356x-base.dtsi</a></div><div class='hunk'>@@ -56,7 +56,6 @@</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk 0&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -72,7 +71,6 @@</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -88,7 +86,6 @@</div><div class='ctx'> 			reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -104,7 +101,6 @@</div><div class='ctx'> 			reg = &lt;0x0 0x300&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			enable-method = "psci";</div><div class='del'>-			operating-points-v2 = &lt;&amp;cpu0_opp_table&gt;;</div><div class='ctx'> 			i-cache-size = &lt;0x8000&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-sets = &lt;128&gt;;</div><div class='hunk'>@@ -128,48 +124,6 @@</div><div class='ctx'> 		cache-sets = &lt;512&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	cpu0_opp_table: opp-table-0 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-408000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-600000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-816000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='del'>-			opp-suspend;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1104000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1104000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1416000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1608000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;975000 975000 1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1050000 1050000 1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	display_subsystem: display-subsystem {</div><div class='ctx'> 		compatible = "rockchip,display-subsystem";</div><div class='ctx'> 		ports = &lt;&amp;vop_out&gt;;</div><div class='hunk'>@@ -190,40 +144,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gpu_opp_table: opp-table-1 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-</div><div class='del'>-		opp-200000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-300000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-400000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;850000 850000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-600000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000 900000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-700000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;950000 950000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1000000 1000000 1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	hdmi_sound: hdmi-sound {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,name = "HDMI";</div><div class='hunk'>@@ -254,6 +174,18 @@</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		scmi_shmem: shmem@10f000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	timer {</div><div class='ctx'> 		compatible = "arm,armv8-timer";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -279,19 +211,6 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sram@10f000 {</div><div class='del'>-		compatible = "mmio-sram";</div><div class='del'>-		reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0 0x0 0x0010f000 0x100&gt;;</div><div class='del'>-</div><div class='del'>-		scmi_shmem: sram@0 {</div><div class='del'>-			compatible = "arm,scmi-shmem";</div><div class='del'>-			reg = &lt;0x0 0x100&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	sata1: sata@fc400000 {</div><div class='ctx'> 		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";</div><div class='ctx'> 		reg = &lt;0 0xfc400000 0 0x1000&gt;;</div><div class='hunk'>@@ -364,6 +283,18 @@</div><div class='ctx'> 		mbi-alias = &lt;0x0 0xfd410000&gt;;</div><div class='ctx'> 		mbi-ranges = &lt;296 24&gt;;</div><div class='ctx'> 		msi-controller;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='add'>+</div><div class='add'>+		its: msi-controller@fd440000 {</div><div class='add'>+			compatible = "arm,gic-v3-its";</div><div class='add'>+			reg = &lt;0x0 0xfd440000 0 0x20000&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+			msi-controller;</div><div class='add'>+			#msi-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb_host0_ehci: usb@fd800000 {</div><div class='hunk'>@@ -629,7 +560,6 @@</div><div class='ctx'> 		clocks = &lt;&amp;scmi_clk 1&gt;, &lt;&amp;cru CLK_GPU&gt;;</div><div class='ctx'> 		clock-names = "gpu", "bus";</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='del'>-		operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;power RK3568_PD_GPU&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1038,7 +968,7 @@</div><div class='ctx'> 		num-ib-windows = &lt;6&gt;;</div><div class='ctx'> 		num-ob-windows = &lt;2&gt;;</div><div class='ctx'> 		max-link-speed = &lt;2&gt;;</div><div class='del'>-		msi-map = &lt;0x0 &amp;gic 0x0 0x1000&gt;;</div><div class='add'>+		msi-map = &lt;0x0 &amp;its 0x0 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		phys = &lt;&amp;combphy2 PHY_TYPE_PCIE&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -1113,6 +1043,11 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Testing showed that the HWRNG found in RK3566 produces unacceptably</div><div class='add'>+	 * low quality of random data, so the HWRNG isn't enabled for all RK356x</div><div class='add'>+	 * SoC variants despite its presence.</div><div class='add'>+	 */</div><div class='ctx'> 	rng: rng@fe388000 {</div><div class='ctx'> 		compatible = "rockchip,rk3568-rng";</div><div class='ctx'> 		reg = &lt;0x0 0xfe388000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -1762,6 +1697,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;pmucru CLK_PCIEPHY1_REF&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;100000000&gt;;</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_PIPEPHY1&gt;;</div><div class='add'>+		reset-names = "phy";</div><div class='ctx'> 		rockchip,pipe-grf = &lt;&amp;pipegrf&gt;;</div><div class='ctx'> 		rockchip,pipe-phy-grf = &lt;&amp;pipe_phy_grf1&gt;;</div><div class='ctx'> 		#phy-cells = &lt;1&gt;;</div><div class='hunk'>@@ -1778,6 +1714,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;pmucru CLK_PCIEPHY2_REF&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;100000000&gt;;</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_PIPEPHY2&gt;;</div><div class='add'>+		reset-names = "phy";</div><div class='ctx'> 		rockchip,pipe-grf = &lt;&amp;pipegrf&gt;;</div><div class='ctx'> 		rockchip,pipe-phy-grf = &lt;&amp;pipe_phy_grf2&gt;;</div><div class='ctx'> 		#phy-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso<br/>new file mode 100644<br/>index 000000000000..242ccfaf711b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-v1.2-wifibt.dtso</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * DT-overlay to enable the onboard WiFi and Bluetooth module present in v1.2</div><div class='add'>+ * boards. Note that v1.1 boards use a different module, so this probably won't</div><div class='add'>+ * work there.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_wake_host&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio1 RK_PD7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on&gt;, &lt;&amp;bt_wake_host&gt;, &lt;&amp;host_wake_bt&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts<br/>new file mode 100644<br/>index 000000000000..3386084f6318<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts</a></div><div class='hunk'>@@ -0,0 +1,1041 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ArmSoM Sige5";</div><div class='add'>+	compatible = "armsom,sige5", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		green_led: green-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		red_led: red-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	es8388_sound: es8388-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "On-board Analog ES8388";</div><div class='add'>+		simple-audio-card,widgets = "Microphone", "Headphone Mic",</div><div class='add'>+					    "Microphone", "Mic Pads",</div><div class='add'>+					    "Headphone", "Headphone",</div><div class='add'>+					    "Line Out", "Line Out";</div><div class='add'>+		simple-audio-card,routing = "Headphone", "LOUT1",</div><div class='add'>+					    "Headphone", "ROUT1",</div><div class='add'>+					    "Line Out", "LOUT2",</div><div class='add'>+					    "Line Out", "ROUT2",</div><div class='add'>+					    "RINPUT1", "Headphone Mic",</div><div class='add'>+					    "LINPUT2", "Mic Pads",</div><div class='add'>+					    "RINPUT2", "Mic Pads";</div><div class='add'>+		simple-audio-card,pin-switches = "Headphone", "Line Out";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_12v0_dcin: regulator-vcc-12v0-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_12v0_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v2_ufs_vccq_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_s0: regulator-vcc-1v8-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8_ufs_vccq2_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_pcie: regulator-vcc-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwr_en&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_pcie";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PD6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_rtc_s5";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_sys: regulator-vcc-5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_12v0_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_device: regulator-vcc-5v0-device {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v0_device";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_12v0_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_typec0: regulator-vcc-5v0-typec0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg0_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_typec0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_device&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_usbhost: regulator-vcc-5v0-usbhost {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_usbhost";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_device&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_ufs_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0m0_miim</div><div class='add'>+		     &amp;eth0m0_tx_bus2</div><div class='add'>+		     &amp;eth0m0_rx_bus2</div><div class='add'>+		     &amp;eth0m0_rgmii_clk</div><div class='add'>+		     &amp;eth0m0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1m0_miim</div><div class='add'>+		     &amp;eth1m0_tx_bus2</div><div class='add'>+		     &amp;eth1m0_rx_bus2</div><div class='add'>+		     &amp;eth1m0_rgmii_clk</div><div class='add'>+		     &amp;eth1m0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usbc0: typec-portc@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_interrupt&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vcc_5v0_typec0&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			/* fusb302 supports PD Rev 2.0 Ver 1.2 */</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x2&gt;;</div><div class='add'>+			power-role = "source";</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 2000,</div><div class='add'>+						 PDO_FIXED_USB_COMM | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+</div><div class='add'>+			altmodes {</div><div class='add'>+				displayport {</div><div class='add'>+					svid = /bits/ 16 &lt;0xff01&gt;;</div><div class='add'>+					vdo = &lt;0xffffffff&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_hs_ep: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_drd0_hs_ep&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_ss_ep: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_drd0_ss_ep&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					usbc0_dp_ep: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy_ep&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8388: audio-codec@10 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_SAI1_MCLKOUT_TO_IO&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;vcca_3v3_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcca_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SAI1_MCLKOUT_TO_IO&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sai1m0_mclk&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac0_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PA3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gmac {</div><div class='add'>+		gmac0_rst: gmac0-rst {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		gmac1_rst: gmac1-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	headphone {</div><div class='add'>+		hp_det: hp-det {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_r: led-red-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		led_rgb_g: led-green-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_pwr_en: pcie-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+		pcie_reset: pcie-reset {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren: usb-host-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		usb_otg0_pwren: usb-otg0-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		usbc0_interrupt: usbc0-interrupt {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+		usbc0_sbu1: usbc0-sbu1 {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+		usbc0_sbu2: usbc0-sbu2 {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wireless-bluetooth {</div><div class='add'>+		bt_reg_on: bt-reg-on {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt: host-wake-bt {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wireless-wlan {</div><div class='add'>+		wifi_wake_host: wifi-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_reg_on: wifi-reg-on {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sai1m0_lrck</div><div class='add'>+		     &amp;sai1m0_sclk</div><div class='add'>+		     &amp;sai1m0_sdi0</div><div class='add'>+		     &amp;sai1m0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-mmc;</div><div class='add'>+	non-removable;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc_5v0_usbhost&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used by Bluetooth modules, enabled in a version specific overlay */</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4m1_xfer &amp;uart4m1_ctsn &amp;uart4m1_rtsn&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd0_dwc3 {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			usb_drd0_hs_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usbc0_hs_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			usb_drd0_ss_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usbc0_ss_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usbc0_sbu1 &amp;usbc0_sbu2&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio2 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio2 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usbdp_phy_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_dp_ep&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts<br/>new file mode 100644<br/>index 000000000000..db8fef7a4f1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts</a></div><div class='hunk'>@@ -0,0 +1,943 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RK3576 EVB V10 Board";</div><div class='add'>+	compatible = "rockchip,rk3576-evb1-v10", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen: chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_keys: adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-back {</div><div class='add'>+			label = "back";</div><div class='add'>+			linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1235000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			label = "menu";</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;890000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-down {</div><div class='add'>+			label = "volume down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;417000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "volume up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		work_led: led-0 {</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_device&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg0_pwren&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v2_ufs_vccq_s0: regulator-vcc1v2-ufs-vccq-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v2_ufs_vccq_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8_ufs_vccq2_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_lcd_n: regulator-vcc3v3-lcd0-n {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_lcd0_n";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie1: regulator-vcc3v3-pcie1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_rtc_s5";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_device: regulator-vcc5v0-device {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_device";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_device&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_s0: regulator-vcc-1v8-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ufs_s0: regulator-vcc-ufs-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ufs_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_wifi_reg_on: regulator-wifi-reg-on {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_reg_on&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "wifi_reg_on";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0m0_miim</div><div class='add'>+		     &amp;eth0m0_tx_bus2</div><div class='add'>+		     &amp;eth0m0_rx_bus2</div><div class='add'>+		     &amp;eth0m0_rgmii_clk</div><div class='add'>+		     &amp;eth0m0_rgmii_bus</div><div class='add'>+		     &amp;ethm0_clk0_25m_out&gt;;</div><div class='add'>+	tx_delay = &lt;0x21&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1m0_miim</div><div class='add'>+		     &amp;eth1m0_tx_bus2</div><div class='add'>+		     &amp;eth1m0_rx_bus2</div><div class='add'>+		     &amp;eth1m0_rgmii_clk</div><div class='add'>+		     &amp;eth1m0_rgmii_bus</div><div class='add'>+		     &amp;ethm0_clk1_25m_out&gt;;</div><div class='add'>+	tx_delay = &lt;0x20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rk806: pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;25000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rgmii_phy0_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC1_OUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru REFCLKO25M_GMAC1_OUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;25000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rgmii_phy1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PA3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x0 0 0 0 0&gt;;</div><div class='add'>+		bus-range = &lt;0x0 0xf&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		wifi: wifi@0,0 {</div><div class='add'>+			compatible = "pci14e4,449d";</div><div class='add'>+			reg = &lt;0x10000 0 0 0 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+			clock-names = "lpo";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie1&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable usb_drd1_dwc3 if enabling pcie1 and set Dial_Switch_1</div><div class='add'>+	 * to low state according to the schematic of page 17.</div><div class='add'>+	 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	bluetooth {</div><div class='add'>+		bt_reg_on: bt-reg-on {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt: host-wake-bt {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		rtc_int: rtc-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	network {</div><div class='add'>+		rgmii_phy0_rst: rgmii-phy0-rst {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rgmii_phy1_rst: rgmii-phy1-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0 {</div><div class='add'>+		pcie0_rst: pcie0-rst {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren: usb-host-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg0_pwren: usb-otg0-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_reg_on: wifi-reg-on {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_wake_host: wifi-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4m1_xfer &amp;uart4m1_ctsn &amp;uart4m1_rtsn&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio1 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on &amp;bt_wake_host &amp;host_wake_bt&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufshc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy {</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi<br/>new file mode 100644<br/>index 000000000000..9187012d6fa4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi</a></div><div class='hunk'>@@ -0,0 +1,749 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 John Clark &lt;inindev@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Luckfox Core3576 Module";</div><div class='add'>+	compatible = "luckfox,core3576","rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		hdmi-pwr-supply = &lt;&amp;vcc_5v0_hdmi&gt;;</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus_5v0_typec: regulator-vbus-5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg0_pwr_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_device&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_pcie: regulator-vcc-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwr_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_pcie";</div><div class='add'>+		startup-delay-us = &lt;1000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_rtc_s5";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_dcin: regulator-vcc-5v0-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_dcin";</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_device: regulator-vcc-5v0-device {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_device";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_dcin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hdmi_con_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_hdmi";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_host: regulator-vcc-5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwr_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_host";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_device&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_sys: regulator-vcc-5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_sys";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_dcin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-on-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hdmi {</div><div class='add'>+		hdmi_con_en: hdmi-con-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_pwr_en: pcie-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_reset: pcie-reset {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwr_en: usb-host-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg0_pwr_en: usb-otg0-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rng {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4m1_xfer &amp;uart4m1_ctsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc_5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts<br/>new file mode 100644<br/>index 000000000000..6c75959adfe1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-luckfox-omni3576.dts</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 John Clark &lt;inindev@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3576-luckfox-core3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Luckfox Omni3576 Carrier Board";</div><div class='add'>+	compatible = "luckfox,omni3576", "luckfox,core3576", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_green_pin&gt;;</div><div class='add'>+</div><div class='add'>+		green_led: green-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	leds {</div><div class='add'>+		led_green_pin: led-green-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts<br/>new file mode 100644<br/>index 000000000000..cce34c541f7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts</a></div><div class='hunk'>@@ -0,0 +1,941 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.</div><div class='add'>+ * Copyright (c) 2025 John Clark &lt;inindev@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "FriendlyElec NanoPi M5";</div><div class='add'>+	compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		hdmi-pwr-supply = &lt;&amp;vcc5v_hdmi_tx&gt;;</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		usr_button: key-1 {</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PA0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "user";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;usr_button_l&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_sys: led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "sys";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;led_sys_h&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "led1";</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;led1_h&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2: led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			gpios = &lt;&amp;gpio2 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "led2";</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;led2_h&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb3_port2_5v: regulator-usb3-port2-5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb3_host_pwren_h&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "usb3_port2_5v";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_m2_keym: regulator-vcc3v3-m2-keym {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie0_pwren_h&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_m2_keym";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc0_pwren_h&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sd_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_sys_s5";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg0_pwren_h&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v_hdmi_tx";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_det_l&gt;;</div><div class='add'>+</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio2 RK_PD6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "realtek,rt5616-codec";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "HPOL",</div><div class='add'>+			"Headphones", "HPOR",</div><div class='add'>+			"IN1P", "Microphone Jack";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Microphone", "Microphone Jack";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;rt5616&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fspi1m1_pins {</div><div class='add'>+	/* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */</div><div class='add'>+	/* gpio1_d0-d4 muxed to sai2 audio functions */</div><div class='add'>+	rockchip,pins =</div><div class='add'>+		&lt;1 RK_PD5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+		&lt;1 RK_PC4 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+		&lt;1 RK_PC5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+		&lt;1 RK_PC6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+		&lt;1 RK_PC7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0m0_miim&gt;,</div><div class='add'>+		    &lt;&amp;eth0m0_tx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;eth0m0_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;eth0m0_rgmii_clk&gt;,</div><div class='add'>+		    &lt;&amp;eth0m0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1m0_miim&gt;,</div><div class='add'>+		    &lt;&amp;eth1m0_tx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;eth1m0_rx_bus2&gt;,</div><div class='add'>+		    &lt;&amp;eth1m0_rgmii_clk&gt;,</div><div class='add'>+		    &lt;&amp;eth1m0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	clock-frequency = &lt;200000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5m3_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rt5616: audio-codec@1b {</div><div class='add'>+		compatible = "realtek,rt5616";</div><div class='add'>+		reg = &lt;0x1b&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SAI2_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_SAI2_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac0_int&gt;, &lt;&amp;gmac0_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC1_OUT&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_int&gt;, &lt;&amp;gmac1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PA3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie0_perstn&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_m2_keym&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gmac {</div><div class='add'>+		gmac0_int: gmac0-int {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+		gmac0_rst: gmac0-rst {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		gmac1_int: gmac1-int {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+		gmac1_rst: gmac1-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys {</div><div class='add'>+		usr_button_l: usr-button-l {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_sys_h: led-sys-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		led1_h: led1-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		led2_h: led2-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie0_pwren_h: pcie0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		pcie0_perstn: pcie0-perstn {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sdmmc0_pwren_h: sdmmc0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_det_l: hp-det-l {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb3_host_pwren_h: usb3-host-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		usb_otg0_pwren_h: usb-otg0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc0_clk&gt;, &lt;&amp;sdmmc0_cmd&gt;, &lt;&amp;sdmmc0_det&gt;, &lt;&amp;sdmmc0_bus4&gt;;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc3v3_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspi1m1_csn0&gt;, &lt;&amp;fspi1m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		m25p,fast-read;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;usb3_port2_5v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd0_dwc3 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	extcon = &lt;&amp;u2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wdt {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..0b0851a7e4ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,5775 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rockchip-pinconf.dtsi"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file is auto generated by pin2dts tool, please keep these code</div><div class='add'>+ * by adding changes at end of this file.</div><div class='add'>+ */</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	aupll_clk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		aupll_clkm0_pins: aupll_clkm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* aupll_clk_in_m0 */</div><div class='add'>+				&lt;0 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		aupll_clkm1_pins: aupll_clkm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* aupll_clk_in_m1 */</div><div class='add'>+				&lt;0 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		aupll_clkm2_pins: aupll_clkm2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* aupll_clk_in_m2 */</div><div class='add'>+				&lt;4 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_clk0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk0m0_clk0: cam_clk0m0-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk0_out_m0 */</div><div class='add'>+				&lt;3 RK_PD7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk0m1_clk0: cam_clk0m1-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk0_out_m1 */</div><div class='add'>+				&lt;2 RK_PD2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_clk1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk1m0_clk1: cam_clk1m0-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk1_out_m0 */</div><div class='add'>+				&lt;4 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk1m1_clk1: cam_clk1m1-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk1_out_m1 */</div><div class='add'>+				&lt;2 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam_clk2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk2m0_clk2: cam_clk2m0-clk2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk2_out_m0 */</div><div class='add'>+				&lt;4 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cam_clk2m1_clk2: cam_clk2m1-clk2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cam_clk2_out_m1 */</div><div class='add'>+				&lt;2 RK_PD7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m0_pins: can0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m0 */</div><div class='add'>+				&lt;2 RK_PA0 13 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m0 */</div><div class='add'>+				&lt;2 RK_PA1 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m1_pins: can0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m1 */</div><div class='add'>+				&lt;4 RK_PC3 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m1 */</div><div class='add'>+				&lt;4 RK_PC2 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m2_pins: can0m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m2 */</div><div class='add'>+				&lt;4 RK_PA6 13 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m2 */</div><div class='add'>+				&lt;4 RK_PA4 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can0m3_pins: can0m3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can0_rx_m3 */</div><div class='add'>+				&lt;3 RK_PC1 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can0_tx_m3 */</div><div class='add'>+				&lt;3 RK_PC4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	can1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m0_pins: can1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m0 */</div><div class='add'>+				&lt;2 RK_PA2 13 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m0 */</div><div class='add'>+				&lt;2 RK_PA3 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m1_pins: can1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m1 */</div><div class='add'>+				&lt;4 RK_PC7 13 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m1 */</div><div class='add'>+				&lt;4 RK_PC6 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m2_pins: can1m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m2 */</div><div class='add'>+				&lt;4 RK_PB4 13 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m2 */</div><div class='add'>+				&lt;4 RK_PB5 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		can1m3_pins: can1m3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* can1_rx_m3 */</div><div class='add'>+				&lt;3 RK_PA3 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* can1_tx_m3 */</div><div class='add'>+				&lt;3 RK_PA2 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk0_32k {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk0_32k_pins: clk0_32k-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk0_32k_out */</div><div class='add'>+				&lt;0 RK_PA2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk1_32k {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk1_32k_pins: clk1_32k-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk1_32k_out */</div><div class='add'>+				&lt;1 RK_PD5 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_32k {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		clk_32k_pins: clk_32k-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* clk_32k_in */</div><div class='add'>+				&lt;0 RK_PA2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpubig {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cpubig_pins: cpubig-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cpubig_avs */</div><div class='add'>+				&lt;0 RK_PD2 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpulit {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		cpulit_pins: cpulit-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* cpulit_avs */</div><div class='add'>+				&lt;0 RK_PC0 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug0_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug0_test_pins: debug0_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug0_test_out */</div><div class='add'>+				&lt;1 RK_PC4 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug1_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug1_test_pins: debug1_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug1_test_out */</div><div class='add'>+				&lt;1 RK_PC5 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug2_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug2_test_pins: debug2_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug2_test_out */</div><div class='add'>+				&lt;1 RK_PC6 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug3_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug3_test_pins: debug3_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug3_test_out */</div><div class='add'>+				&lt;1 RK_PC7 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug4_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug4_test_pins: debug4_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug4_test_out */</div><div class='add'>+				&lt;1 RK_PD0 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug5_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug5_test_pins: debug5_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug5_test_out */</div><div class='add'>+				&lt;1 RK_PD1 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug6_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug6_test_pins: debug6_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug6_test_out */</div><div class='add'>+				&lt;1 RK_PD2 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	debug7_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		debug7_test_pins: debug7_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* debug7_test_out */</div><div class='add'>+				&lt;1 RK_PD3 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dpm0_pins: dpm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dp_hpdin_m0 */</div><div class='add'>+				&lt;4 RK_PC4 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dpm1_pins: dpm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dp_hpdin_m1 */</div><div class='add'>+				&lt;0 RK_PC5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsm_aud {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm0_ln: dsm_audm0-ln {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_ln_m0 */</div><div class='add'>+				&lt;2 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm0_lp: dsm_audm0-lp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_lp_m0 */</div><div class='add'>+				&lt;2 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm0_rn: dsm_audm0-rn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_rn_m0 */</div><div class='add'>+				&lt;2 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm0_rp: dsm_audm0-rp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_rp_m0 */</div><div class='add'>+				&lt;2 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm1_ln: dsm_audm1-ln {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_ln_m1 */</div><div class='add'>+				&lt;4 RK_PC1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm1_lp: dsm_audm1-lp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_lp_m1 */</div><div class='add'>+				&lt;4 RK_PC0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm1_rn: dsm_audm1-rn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_rn_m1 */</div><div class='add'>+				&lt;4 RK_PC3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsm_audm1_rp: dsm_audm1-rp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsm_aud_rp_m1 */</div><div class='add'>+				&lt;4 RK_PC2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsmc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_clkn: dsmc-clkn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_clkn */</div><div class='add'>+				&lt;3 RK_PD6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_clkp: dsmc-clkp {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_clkp */</div><div class='add'>+				&lt;3 RK_PD5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_csn0: dsmc-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_csn0 */</div><div class='add'>+				&lt;3 RK_PD3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_csn1: dsmc-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_csn1 */</div><div class='add'>+				&lt;3 RK_PB0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_csn2: dsmc-csn2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_csn2 */</div><div class='add'>+				&lt;3 RK_PD1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_csn3: dsmc-csn3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_csn3 */</div><div class='add'>+				&lt;3 RK_PD2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data0: dsmc-data0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data0 */</div><div class='add'>+				&lt;3 RK_PD4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data1: dsmc-data1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data1 */</div><div class='add'>+				&lt;3 RK_PD0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data2: dsmc-data2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data2 */</div><div class='add'>+				&lt;3 RK_PC7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data3: dsmc-data3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data3 */</div><div class='add'>+				&lt;3 RK_PC6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data4: dsmc-data4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data4 */</div><div class='add'>+				&lt;3 RK_PC5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data5: dsmc-data5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data5 */</div><div class='add'>+				&lt;3 RK_PC4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data6: dsmc-data6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data6 */</div><div class='add'>+				&lt;3 RK_PC1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data7: dsmc-data7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data7 */</div><div class='add'>+				&lt;3 RK_PC0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data8: dsmc-data8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data8 */</div><div class='add'>+				&lt;3 RK_PB5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data9: dsmc-data9 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data9 */</div><div class='add'>+				&lt;3 RK_PB4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data10: dsmc-data10 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data10 */</div><div class='add'>+				&lt;3 RK_PB3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data11: dsmc-data11 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data11 */</div><div class='add'>+				&lt;3 RK_PB2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data12: dsmc-data12 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data12 */</div><div class='add'>+				&lt;3 RK_PB1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data13: dsmc-data13 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data13 */</div><div class='add'>+				&lt;3 RK_PA7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data14: dsmc-data14 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data14 */</div><div class='add'>+				&lt;3 RK_PA6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_data15: dsmc-data15 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_data15 */</div><div class='add'>+				&lt;3 RK_PA5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_dqs0: dsmc-dqs0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_dqs0 */</div><div class='add'>+				&lt;3 RK_PB7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_dqs1: dsmc-dqs1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_dqs1 */</div><div class='add'>+				&lt;3 RK_PB6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_int0: dsmc-int0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_int0 */</div><div class='add'>+				&lt;4 RK_PA0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_int1: dsmc-int1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_int1 */</div><div class='add'>+				&lt;3 RK_PC2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_int2: dsmc-int2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_int2 */</div><div class='add'>+				&lt;4 RK_PA1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_int3: dsmc-int3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_int3 */</div><div class='add'>+				&lt;3 RK_PC3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_rdyn: dsmc-rdyn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_rdyn */</div><div class='add'>+				&lt;3 RK_PA4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_resetn: dsmc-resetn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_resetn */</div><div class='add'>+				&lt;3 RK_PD7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsmc_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_testclk_out: dsmc-testclk-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_testclk_out */</div><div class='add'>+				&lt;3 RK_PC2 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsmc_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		dsmc_testdata_out: dsmc-testdata-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* dsmc_testdata_out */</div><div class='add'>+				&lt;3 RK_PC3 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp_tx {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		edp_txm0_pins: edp_txm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* edp_tx_hpdin_m0 */</div><div class='add'>+				&lt;4 RK_PC1 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		edp_txm1_pins: edp_txm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* edp_tx_hpdin_m1 */</div><div class='add'>+				&lt;0 RK_PB6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_rstnout: emmc-rstnout {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_rstn */</div><div class='add'>+				&lt;1 RK_PB3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_bus8: emmc-bus8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_d0 */</div><div class='add'>+				&lt;1 RK_PA0 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d1 */</div><div class='add'>+				&lt;1 RK_PA1 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d2 */</div><div class='add'>+				&lt;1 RK_PA2 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d3 */</div><div class='add'>+				&lt;1 RK_PA3 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d4 */</div><div class='add'>+				&lt;1 RK_PA4 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d5 */</div><div class='add'>+				&lt;1 RK_PA5 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d6 */</div><div class='add'>+				&lt;1 RK_PA6 1 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* emmc_d7 */</div><div class='add'>+				&lt;1 RK_PA7 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_clk: emmc-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_clk */</div><div class='add'>+				&lt;1 RK_PB1 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_cmd: emmc-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_cmd */</div><div class='add'>+				&lt;1 RK_PB0 1 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_strb: emmc-strb {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_strb */</div><div class='add'>+				&lt;1 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_testclk_test: emmc_testclk-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_testclk_out */</div><div class='add'>+				&lt;1 RK_PB3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emmc_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		emmc_testdata_test: emmc_testdata-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* emmc_testdata_out */</div><div class='add'>+				&lt;1 RK_PB7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_miim: eth0m0-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_mdc_m0 */</div><div class='add'>+				&lt;3 RK_PA6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_mdio_m0 */</div><div class='add'>+				&lt;3 RK_PA5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_rx_bus2: eth0m0-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxctl_m0 */</div><div class='add'>+				&lt;3 RK_PA7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd0_m0 */</div><div class='add'>+				&lt;3 RK_PB2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd1_m0 */</div><div class='add'>+				&lt;3 RK_PB1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_tx_bus2: eth0m0-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_txctl_m0 */</div><div class='add'>+				&lt;3 RK_PB3 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd0_m0 */</div><div class='add'>+				&lt;3 RK_PB5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd1_m0 */</div><div class='add'>+				&lt;3 RK_PB4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_rgmii_clk: eth0m0-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxclk_m0 */</div><div class='add'>+				&lt;3 RK_PD1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txclk_m0 */</div><div class='add'>+				&lt;3 RK_PB6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_rgmii_bus: eth0m0-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxd2_m0 */</div><div class='add'>+				&lt;3 RK_PD3 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd3_m0 */</div><div class='add'>+				&lt;3 RK_PD2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd2_m0 */</div><div class='add'>+				&lt;3 RK_PC3 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd3_m0 */</div><div class='add'>+				&lt;3 RK_PC2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_mclk: eth0m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m0_mclk */</div><div class='add'>+				&lt;3 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_ppsclk: eth0m0-ppsclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m0_ppsclk */</div><div class='add'>+				&lt;3 RK_PC0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_ppstrig: eth0m0-ppstrig {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m0_ppstrig */</div><div class='add'>+				&lt;3 RK_PB7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_miim: eth0m1-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_mdc_m1 */</div><div class='add'>+				&lt;3 RK_PA1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_mdio_m1 */</div><div class='add'>+				&lt;3 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_rx_bus2: eth0m1-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxctl_m1 */</div><div class='add'>+				&lt;3 RK_PA2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd0_m1 */</div><div class='add'>+				&lt;2 RK_PA6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd1_m1 */</div><div class='add'>+				&lt;3 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_tx_bus2: eth0m1-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_txctl_m1 */</div><div class='add'>+				&lt;2 RK_PA7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd0_m1 */</div><div class='add'>+				&lt;2 RK_PB1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd1_m1 */</div><div class='add'>+				&lt;2 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_rgmii_clk: eth0m1-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxclk_m1 */</div><div class='add'>+				&lt;2 RK_PB5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txclk_m1 */</div><div class='add'>+				&lt;2 RK_PB3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_rgmii_bus: eth0m1-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_rxd2_m1 */</div><div class='add'>+				&lt;2 RK_PB7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_rxd3_m1 */</div><div class='add'>+				&lt;2 RK_PB6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd2_m1 */</div><div class='add'>+				&lt;2 RK_PB4 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth0_txd3_m1 */</div><div class='add'>+				&lt;2 RK_PB2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_mclk: eth0m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m1_mclk */</div><div class='add'>+				&lt;2 RK_PD6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_ppsclk: eth0m1-ppsclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m1_ppsclk */</div><div class='add'>+				&lt;2 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_ppstrig: eth0m1-ppstrig {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m1_ppstrig */</div><div class='add'>+				&lt;2 RK_PC2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_miim: eth1m0-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_mdc_m0 */</div><div class='add'>+				&lt;2 RK_PD4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_mdio_m0 */</div><div class='add'>+				&lt;2 RK_PD5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_rx_bus2: eth1m0-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxctl_m0 */</div><div class='add'>+				&lt;2 RK_PD3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd0_m0 */</div><div class='add'>+				&lt;2 RK_PD1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd1_m0 */</div><div class='add'>+				&lt;2 RK_PD2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_tx_bus2: eth1m0-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_txctl_m0 */</div><div class='add'>+				&lt;2 RK_PD0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd0_m0 */</div><div class='add'>+				&lt;2 RK_PC6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd1_m0 */</div><div class='add'>+				&lt;2 RK_PC7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_rgmii_clk: eth1m0-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxclk_m0 */</div><div class='add'>+				&lt;2 RK_PC2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txclk_m0 */</div><div class='add'>+				&lt;2 RK_PC5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_rgmii_bus: eth1m0-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxd2_m0 */</div><div class='add'>+				&lt;2 RK_PC0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd3_m0 */</div><div class='add'>+				&lt;2 RK_PC1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd2_m0 */</div><div class='add'>+				&lt;2 RK_PC3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd3_m0 */</div><div class='add'>+				&lt;2 RK_PC4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_mclk: eth1m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m0_mclk */</div><div class='add'>+				&lt;2 RK_PD7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_ppsclk: eth1m0-ppsclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m0_ppsclk */</div><div class='add'>+				&lt;3 RK_PA2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_ppstrig: eth1m0-ppstrig {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m0_ppstrig */</div><div class='add'>+				&lt;3 RK_PA1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_miim: eth1m1-miim {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_mdc_m1 */</div><div class='add'>+				&lt;1 RK_PD2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_mdio_m1 */</div><div class='add'>+				&lt;1 RK_PD3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_rx_bus2: eth1m1-rx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxctl_m1 */</div><div class='add'>+				&lt;1 RK_PD1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd0_m1 */</div><div class='add'>+				&lt;1 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd1_m1 */</div><div class='add'>+				&lt;1 RK_PD0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_tx_bus2: eth1m1-tx_bus2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_txctl_m1 */</div><div class='add'>+				&lt;1 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd0_m1 */</div><div class='add'>+				&lt;1 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd1_m1 */</div><div class='add'>+				&lt;1 RK_PC5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_rgmii_clk: eth1m1-rgmii_clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxclk_m1 */</div><div class='add'>+				&lt;1 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txclk_m1 */</div><div class='add'>+				&lt;1 RK_PC1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_rgmii_bus: eth1m1-rgmii_bus {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_rxd2_m1 */</div><div class='add'>+				&lt;1 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_rxd3_m1 */</div><div class='add'>+				&lt;1 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd2_m1 */</div><div class='add'>+				&lt;1 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* eth1_txd3_m1 */</div><div class='add'>+				&lt;1 RK_PC0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_mclk: eth1m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m1_mclk */</div><div class='add'>+				&lt;1 RK_PD4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_ppsclk: eth1m1-ppsclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m1_ppsclk */</div><div class='add'>+				&lt;1 RK_PC2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_ppstrig: eth1m1-ppstrig {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m1_ppstrig */</div><div class='add'>+				&lt;1 RK_PC3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_ptp {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m0_ptp_refclk: eth0m0-ptp-refclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m0_ptp_refclk */</div><div class='add'>+				&lt;3 RK_PC1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0m1_ptp_refclk: eth0m1-ptp-refclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0m1_ptp_refclk */</div><div class='add'>+				&lt;2 RK_PC0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_testrxclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0_testrxclkm0_test: eth0_testrxclkm0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_testrxclk_out_m0 */</div><div class='add'>+				&lt;3 RK_PC7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0_testrxclkm1_test: eth0_testrxclkm1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_testrxclk_out_m1 */</div><div class='add'>+				&lt;2 RK_PC5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_testrxd {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0_testrxdm0_test: eth0_testrxdm0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_testrxd_out_m0 */</div><div class='add'>+				&lt;3 RK_PD0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth0_testrxdm1_test: eth0_testrxdm1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth0_testrxd_out_m1 */</div><div class='add'>+				&lt;2 RK_PC4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_ptp {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m0_ptp_refclk: eth1m0-ptp-refclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m0_ptp_refclk */</div><div class='add'>+				&lt;3 RK_PA3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1m1_ptp_refclk: eth1m1-ptp-refclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1m1_ptp_refclk */</div><div class='add'>+				&lt;2 RK_PB6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_testrxclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1_testrxclkm0_test: eth1_testrxclkm0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_testrxclk_out_m0 */</div><div class='add'>+				&lt;3 RK_PA1 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1_testrxclkm1_test: eth1_testrxclkm1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_testrxclk_out_m1 */</div><div class='add'>+				&lt;1 RK_PC3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_testrxd {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1_testrxdm0_test: eth1_testrxdm0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_testrxd_out_m0 */</div><div class='add'>+				&lt;3 RK_PA0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		eth1_testrxdm1_test: eth1_testrxdm1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* eth1_testrxd_out_m1 */</div><div class='add'>+				&lt;1 RK_PC2 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_clk0_25m {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm0_clk0_25m_out: ethm0-clk0-25m-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ethm0_clk0_25m_out */</div><div class='add'>+				&lt;3 RK_PA4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm1_clk0_25m_out: ethm1-clk0-25m-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ethm1_clk0_25m_out */</div><div class='add'>+				&lt;2 RK_PD7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_clk1_25m {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm0_clk1_25m_out: ethm0-clk1-25m-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ethm0_clk1_25m_out */</div><div class='add'>+				&lt;2 RK_PD6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ethm1_clk1_25m_out: ethm1-clk1-25m-out {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ethm1_clk1_25m_out */</div><div class='add'>+				&lt;1 RK_PD5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m0_csn: flexbus0m0-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_csn_m0 */</div><div class='add'>+				&lt;3 RK_PA4 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m0_d13: flexbus0m0-d13 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d13_m0 */</div><div class='add'>+				&lt;4 RK_PA0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m0_d14: flexbus0m0-d14 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d14_m0 */</div><div class='add'>+				&lt;4 RK_PA1 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m0_d15: flexbus0m0-d15 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d15_m0 */</div><div class='add'>+				&lt;3 RK_PD7 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m1_csn: flexbus0m1-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_csn_m1 */</div><div class='add'>+				&lt;4 RK_PA1 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m1_d13: flexbus0m1-d13 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d13_m1 */</div><div class='add'>+				&lt;4 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m1_d14: flexbus0m1-d14 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d14_m1 */</div><div class='add'>+				&lt;4 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m1_d15: flexbus0m1-d15 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d15_m1 */</div><div class='add'>+				&lt;4 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m2_csn: flexbus0m2-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_csn_m2 */</div><div class='add'>+				&lt;3 RK_PC3 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m3_csn: flexbus0m3-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_csn_m3 */</div><div class='add'>+				&lt;3 RK_PD2 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0m4_csn: flexbus0m4-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_csn_m4 */</div><div class='add'>+				&lt;4 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_clk: flexbus0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_clk */</div><div class='add'>+				&lt;3 RK_PB6 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d10: flexbus0-d10 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d10 */</div><div class='add'>+				&lt;3 RK_PC3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d11: flexbus0-d11 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d11 */</div><div class='add'>+				&lt;3 RK_PD1 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d12: flexbus0-d12 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d12 */</div><div class='add'>+				&lt;3 RK_PD2 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d0: flexbus0-d0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d0 */</div><div class='add'>+				&lt;3 RK_PB5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d1: flexbus0-d1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d1 */</div><div class='add'>+				&lt;3 RK_PB4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d2: flexbus0-d2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d2 */</div><div class='add'>+				&lt;3 RK_PB3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d3: flexbus0-d3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d3 */</div><div class='add'>+				&lt;3 RK_PB2 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d4: flexbus0-d4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d4 */</div><div class='add'>+				&lt;3 RK_PB1 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d5: flexbus0-d5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d5 */</div><div class='add'>+				&lt;3 RK_PA7 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d6: flexbus0-d6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d6 */</div><div class='add'>+				&lt;3 RK_PA6 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d7: flexbus0-d7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d7 */</div><div class='add'>+				&lt;3 RK_PA5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d8: flexbus0-d8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d8 */</div><div class='add'>+				&lt;3 RK_PB0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_d9: flexbus0-d9 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_d9 */</div><div class='add'>+				&lt;3 RK_PC2 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m0_csn: flexbus1m0-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_csn_m0 */</div><div class='add'>+				&lt;3 RK_PB7 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m0_d12: flexbus1m0-d12 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d12_m0 */</div><div class='add'>+				&lt;3 RK_PD7 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m0_d13: flexbus1m0-d13 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d13_m0 */</div><div class='add'>+				&lt;4 RK_PA1 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m0_d14: flexbus1m0-d14 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d14_m0 */</div><div class='add'>+				&lt;4 RK_PA0 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m0_d15: flexbus1m0-d15 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d15_m0 */</div><div class='add'>+				&lt;3 RK_PD2 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m1_csn: flexbus1m1-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_csn_m1 */</div><div class='add'>+				&lt;3 RK_PD7 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m1_d12: flexbus1m1-d12 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d12_m1 */</div><div class='add'>+				&lt;4 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m1_d13: flexbus1m1-d13 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d13_m1 */</div><div class='add'>+				&lt;4 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m1_d14: flexbus1m1-d14 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d14_m1 */</div><div class='add'>+				&lt;4 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m1_d15: flexbus1m1-d15 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d15_m1 */</div><div class='add'>+				&lt;4 RK_PB2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m2_csn: flexbus1m2-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_csn_m2 */</div><div class='add'>+				&lt;3 RK_PD1 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m3_csn: flexbus1m3-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_csn_m3 */</div><div class='add'>+				&lt;4 RK_PA0 8 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1m4_csn: flexbus1m4-csn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_csn_m4 */</div><div class='add'>+				&lt;4 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_clk: flexbus1-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_clk */</div><div class='add'>+				&lt;3 RK_PD6 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d10: flexbus1-d10 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d10 */</div><div class='add'>+				&lt;3 RK_PB7 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d11: flexbus1-d11 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d11 */</div><div class='add'>+				&lt;3 RK_PA4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d0: flexbus1-d0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d0 */</div><div class='add'>+				&lt;3 RK_PD5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d1: flexbus1-d1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d1 */</div><div class='add'>+				&lt;3 RK_PD4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d2: flexbus1-d2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d2 */</div><div class='add'>+				&lt;3 RK_PD3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d3: flexbus1-d3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d3 */</div><div class='add'>+				&lt;3 RK_PD0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d4: flexbus1-d4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d4 */</div><div class='add'>+				&lt;3 RK_PC7 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d5: flexbus1-d5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d5 */</div><div class='add'>+				&lt;3 RK_PC6 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d6: flexbus1-d6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d6 */</div><div class='add'>+				&lt;3 RK_PC5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d7: flexbus1-d7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d7 */</div><div class='add'>+				&lt;3 RK_PC4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d8: flexbus1-d8 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d8 */</div><div class='add'>+				&lt;3 RK_PC1 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_d9: flexbus1-d9 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_d9 */</div><div class='add'>+				&lt;3 RK_PC0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus0_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_testclk_testclk: flexbus0_testclk-testclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_testclk_out */</div><div class='add'>+				&lt;2 RK_PA3 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus0_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus0_testdata_testdata: flexbus0_testdata-testdata {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus0_testdata_out */</div><div class='add'>+				&lt;2 RK_PA2 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus1_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_testclk_testclk: flexbus1_testclk-testclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_testclk_out */</div><div class='add'>+				&lt;2 RK_PA5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	flexbus1_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		flexbus1_testdata_testdata: flexbus1_testdata-testdata {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* flexbus1_testdata_out */</div><div class='add'>+				&lt;2 RK_PA4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi0_pins: fspi0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi0_clk */</div><div class='add'>+				&lt;1 RK_PB1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d0 */</div><div class='add'>+				&lt;1 RK_PA0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d1 */</div><div class='add'>+				&lt;1 RK_PA1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d2 */</div><div class='add'>+				&lt;1 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d3 */</div><div class='add'>+				&lt;1 RK_PA3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d4 */</div><div class='add'>+				&lt;1 RK_PA4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d5 */</div><div class='add'>+				&lt;1 RK_PA5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d6 */</div><div class='add'>+				&lt;1 RK_PA6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_d7 */</div><div class='add'>+				&lt;1 RK_PA7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi0_dqs */</div><div class='add'>+				&lt;1 RK_PB2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi0_csn0: fspi0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi0_csn0 */</div><div class='add'>+				&lt;1 RK_PB3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi0_csn1: fspi0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi0_csn1 */</div><div class='add'>+				&lt;1 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1m0_pins: fspi1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1_clk_m0 */</div><div class='add'>+				&lt;2 RK_PA5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d0_m0 */</div><div class='add'>+				&lt;2 RK_PA0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d1_m0 */</div><div class='add'>+				&lt;2 RK_PA1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d2_m0 */</div><div class='add'>+				&lt;2 RK_PA2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d3_m0 */</div><div class='add'>+				&lt;2 RK_PA3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1m0_csn0: fspi1m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1m0_csn0 */</div><div class='add'>+				&lt;2 RK_PA4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1m1_pins: fspi1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1_clk_m1 */</div><div class='add'>+				&lt;1 RK_PD5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d0_m1 */</div><div class='add'>+				&lt;1 RK_PC4 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d1_m1 */</div><div class='add'>+				&lt;1 RK_PC5 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d2_m1 */</div><div class='add'>+				&lt;1 RK_PC6 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d3_m1 */</div><div class='add'>+				&lt;1 RK_PC7 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d4_m1 */</div><div class='add'>+				&lt;1 RK_PD0 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d5_m1 */</div><div class='add'>+				&lt;1 RK_PD1 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d6_m1 */</div><div class='add'>+				&lt;1 RK_PD2 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_d7_m1 */</div><div class='add'>+				&lt;1 RK_PD3 3 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* fspi1_dqs_m1 */</div><div class='add'>+				&lt;1 RK_PD4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1m1_csn0: fspi1m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1m1_csn0 */</div><div class='add'>+				&lt;1 RK_PC3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1m1_csn1: fspi1m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1m1_csn1 */</div><div class='add'>+				&lt;1 RK_PC2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi0_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi0_testclk_test: fspi0_testclk-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi0_testclk_out */</div><div class='add'>+				&lt;1 RK_PB0 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi0_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi0_testdata_test: fspi0_testdata-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi0_testdata_out */</div><div class='add'>+				&lt;1 RK_PB7 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi1_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1_testclkm1_test: fspi1_testclkm1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1_testclk_out_m1 */</div><div class='add'>+				&lt;1 RK_PC1 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fspi1_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		fspi1_testdatam1_test: fspi1_testdatam1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* fspi1_testdata_out_m1 */</div><div class='add'>+				&lt;1 RK_PB7 7 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		gpu_pins: gpu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* gpu_avs */</div><div class='add'>+				&lt;0 RK_PD3 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_tx {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hdmi_txm0_pins: hdmi_txm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hdmi_tx_cec_m0 */</div><div class='add'>+				&lt;4 RK_PC0 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* hdmi_tx_hpdin_m0 */</div><div class='add'>+				&lt;4 RK_PC1 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hdmi_txm1_pins: hdmi_txm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hdmi_tx_cec_m1 */</div><div class='add'>+				&lt;0 RK_PC3 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* hdmi_tx_hpdin_m1 */</div><div class='add'>+				&lt;0 RK_PB6 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hdmi_tx_scl: hdmi-tx-scl {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hdmi_tx_scl */</div><div class='add'>+				&lt;4 RK_PC2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		hdmi_tx_sda: hdmi-tx-sda {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* hdmi_tx_sda */</div><div class='add'>+				&lt;4 RK_PC3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c0m0_xfer: i2c0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c0_scl_m0 */</div><div class='add'>+				&lt;0 RK_PB0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c0_sda_m0 */</div><div class='add'>+				&lt;0 RK_PB1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c0m1_xfer: i2c0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c0_scl_m1 */</div><div class='add'>+				&lt;0 RK_PC1 9 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c0_sda_m1 */</div><div class='add'>+				&lt;0 RK_PC2 9 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m0_xfer: i2c1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m0 */</div><div class='add'>+				&lt;0 RK_PB2 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m0 */</div><div class='add'>+				&lt;0 RK_PB3 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c1m1_xfer: i2c1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c1_scl_m1 */</div><div class='add'>+				&lt;0 RK_PB4 9 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c1_sda_m1 */</div><div class='add'>+				&lt;0 RK_PB5 9 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m0_xfer: i2c2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m0 */</div><div class='add'>+				&lt;0 RK_PB7 9 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m0 */</div><div class='add'>+				&lt;0 RK_PC0 9 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m1_xfer: i2c2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m1 */</div><div class='add'>+				&lt;1 RK_PA0 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m1 */</div><div class='add'>+				&lt;1 RK_PA1 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m2_xfer: i2c2m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m2 */</div><div class='add'>+				&lt;4 RK_PA3 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m2 */</div><div class='add'>+				&lt;4 RK_PA5 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c2m3_xfer: i2c2m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c2_scl_m3 */</div><div class='add'>+				&lt;4 RK_PC2 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c2_sda_m3 */</div><div class='add'>+				&lt;4 RK_PC3 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m0_xfer: i2c3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m0 */</div><div class='add'>+				&lt;4 RK_PB5 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m0 */</div><div class='add'>+				&lt;4 RK_PB4 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m1_xfer: i2c3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m1 */</div><div class='add'>+				&lt;0 RK_PC6 9 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m1 */</div><div class='add'>+				&lt;0 RK_PC7 9 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m2_xfer: i2c3m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m2 */</div><div class='add'>+				&lt;3 RK_PD4 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m2 */</div><div class='add'>+				&lt;3 RK_PD5 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c3m3_xfer: i2c3m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c3_scl_m3 */</div><div class='add'>+				&lt;4 RK_PC4 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c3_sda_m3 */</div><div class='add'>+				&lt;4 RK_PC5 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m0_xfer: i2c4m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m0 */</div><div class='add'>+				&lt;0 RK_PD2 9 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m0 */</div><div class='add'>+				&lt;0 RK_PD3 9 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m1_xfer: i2c4m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m1 */</div><div class='add'>+				&lt;4 RK_PA4 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m1 */</div><div class='add'>+				&lt;4 RK_PA6 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m2_xfer: i2c4m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m2 */</div><div class='add'>+				&lt;2 RK_PA6 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m2 */</div><div class='add'>+				&lt;2 RK_PA7 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c4m3_xfer: i2c4m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c4_scl_m3 */</div><div class='add'>+				&lt;3 RK_PC0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c4_sda_m3 */</div><div class='add'>+				&lt;3 RK_PB7 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m0_xfer: i2c5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m0 */</div><div class='add'>+				&lt;2 RK_PA5 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m0 */</div><div class='add'>+				&lt;2 RK_PA4 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m1_xfer: i2c5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m1 */</div><div class='add'>+				&lt;1 RK_PD4 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m1 */</div><div class='add'>+				&lt;1 RK_PD5 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m2_xfer: i2c5m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m2 */</div><div class='add'>+				&lt;2 RK_PC6 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m2 */</div><div class='add'>+				&lt;2 RK_PC7 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c5m3_xfer: i2c5m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c5_scl_m3 */</div><div class='add'>+				&lt;3 RK_PC4 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c5_sda_m3 */</div><div class='add'>+				&lt;3 RK_PC1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m0_xfer: i2c6m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m0 */</div><div class='add'>+				&lt;0 RK_PA2 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m0 */</div><div class='add'>+				&lt;0 RK_PA5 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m1_xfer: i2c6m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m1 */</div><div class='add'>+				&lt;1 RK_PC2 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m1 */</div><div class='add'>+				&lt;1 RK_PC3 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m2_xfer: i2c6m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m2 */</div><div class='add'>+				&lt;2 RK_PD0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m2 */</div><div class='add'>+				&lt;2 RK_PD1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c6m3_xfer: i2c6m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c6_scl_m3 */</div><div class='add'>+				&lt;4 RK_PC6 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c6_sda_m3 */</div><div class='add'>+				&lt;4 RK_PC7 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c7m0_xfer: i2c7m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c7_scl_m0 */</div><div class='add'>+				&lt;1 RK_PB0 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c7_sda_m0 */</div><div class='add'>+				&lt;1 RK_PB3 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c7m1_xfer: i2c7m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c7_scl_m1 */</div><div class='add'>+				&lt;3 RK_PA0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c7_sda_m1 */</div><div class='add'>+				&lt;3 RK_PA1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c7m2_xfer: i2c7m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c7_scl_m2 */</div><div class='add'>+				&lt;4 RK_PA0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c7_sda_m2 */</div><div class='add'>+				&lt;4 RK_PA1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c7m3_xfer: i2c7m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c7_scl_m3 */</div><div class='add'>+				&lt;4 RK_PC0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c7_sda_m3 */</div><div class='add'>+				&lt;4 RK_PC1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c8 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c8m0_xfer: i2c8m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c8_scl_m0 */</div><div class='add'>+				&lt;2 RK_PA0 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c8_sda_m0 */</div><div class='add'>+				&lt;2 RK_PA1 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c8m1_xfer: i2c8m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c8_scl_m1 */</div><div class='add'>+				&lt;1 RK_PC6 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c8_sda_m1 */</div><div class='add'>+				&lt;1 RK_PC7 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c8m2_xfer: i2c8m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c8_scl_m2 */</div><div class='add'>+				&lt;2 RK_PB6 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c8_sda_m2 */</div><div class='add'>+				&lt;2 RK_PB7 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c8m3_xfer: i2c8m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c8_scl_m3 */</div><div class='add'>+				&lt;3 RK_PB3 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c8_sda_m3 */</div><div class='add'>+				&lt;3 RK_PB2 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c9 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c9m0_xfer: i2c9m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c9_scl_m0 */</div><div class='add'>+				&lt;1 RK_PA5 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c9_sda_m0 */</div><div class='add'>+				&lt;1 RK_PA6 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c9m1_xfer: i2c9m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c9_scl_m1 */</div><div class='add'>+				&lt;1 RK_PB5 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c9_sda_m1 */</div><div class='add'>+				&lt;1 RK_PB4 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c9m2_xfer: i2c9m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c9_scl_m2 */</div><div class='add'>+				&lt;2 RK_PD5 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c9_sda_m2 */</div><div class='add'>+				&lt;2 RK_PD4 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i2c9m3_xfer: i2c9m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i2c9_scl_m3 */</div><div class='add'>+				&lt;3 RK_PC2 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i2c9_sda_m3 */</div><div class='add'>+				&lt;3 RK_PC3 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c0m0_xfer: i3c0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c0_scl_m0 */</div><div class='add'>+				&lt;0 RK_PC1 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i3c0_sda_m0 */</div><div class='add'>+				&lt;0 RK_PC2 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c0m1_xfer: i3c0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c0_scl_m1 */</div><div class='add'>+				&lt;1 RK_PD2 10 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i3c0_sda_m1 */</div><div class='add'>+				&lt;1 RK_PD3 10 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1m0_xfer: i3c1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_scl_m0 */</div><div class='add'>+				&lt;2 RK_PD2 12 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i3c1_sda_m0 */</div><div class='add'>+				&lt;2 RK_PD3 12 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1m1_xfer: i3c1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_scl_m1 */</div><div class='add'>+				&lt;2 RK_PA2 14 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i3c1_sda_m1 */</div><div class='add'>+				&lt;2 RK_PA3 14 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1m2_xfer: i3c1m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_scl_m2 */</div><div class='add'>+				&lt;3 RK_PD3 11 &amp;pcfg_pull_none_smt&gt;,</div><div class='add'>+				/* i3c1_sda_m2 */</div><div class='add'>+				&lt;3 RK_PD2 11 &amp;pcfg_pull_none_smt&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c0_sda {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c0_sdam0_pu: i3c0_sdam0-pu {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c0_sda_pu_m0 */</div><div class='add'>+				&lt;0 RK_PC5 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c0_sdam1_pu: i3c0_sdam1-pu {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c0_sda_pu_m1 */</div><div class='add'>+				&lt;1 RK_PD1 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i3c1_sda {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1_sdam0_pu: i3c1_sdam0-pu {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_sda_pu_m0 */</div><div class='add'>+				&lt;2 RK_PD6 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1_sdam1_pu: i3c1_sdam1-pu {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_sda_pu_m1 */</div><div class='add'>+				&lt;2 RK_PA5 14 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		i3c1_sdam2_pu: i3c1_sdam2-pu {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* i3c1_sda_pu_m2 */</div><div class='add'>+				&lt;3 RK_PD1 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	isp_flash {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		isp_flashm0_pins: isp_flashm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* isp_flash_trigout_m0 */</div><div class='add'>+				&lt;2 RK_PD5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		isp_flashm1_pins: isp_flashm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* isp_flash_trigout_m1 */</div><div class='add'>+				&lt;4 RK_PC5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	isp_prelight {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		isp_prelightm0_pins: isp_prelightm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* isp_prelight_trig_m0 */</div><div class='add'>+				&lt;2 RK_PD4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		isp_prelightm1_pins: isp_prelightm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* isp_prelight_trig_m1 */</div><div class='add'>+				&lt;4 RK_PC4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	jtag {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm0_pins: jtagm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_tck_m0 */</div><div class='add'>+				&lt;2 RK_PA2 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_tms_m0 */</div><div class='add'>+				&lt;2 RK_PA3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		jtagm1_pins: jtagm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* jtag_tck_m1 */</div><div class='add'>+				&lt;0 RK_PD4 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* jtag_tms_m1 */</div><div class='add'>+				&lt;0 RK_PD5 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipi {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		mipim0_pins: mipim0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* mipi_te_m0 */</div><div class='add'>+				&lt;4 RK_PB2 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		mipim1_pins: mipim1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* mipi_te_m1 */</div><div class='add'>+				&lt;3 RK_PA2 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		mipim2_pins: mipim2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* mipi_te_m2 */</div><div class='add'>+				&lt;4 RK_PA0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		mipim3_pins: mipim3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* mipi_te_m3 */</div><div class='add'>+				&lt;1 RK_PB3 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	npu {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		npu_pins: npu-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* npu_avs */</div><div class='add'>+				&lt;0 RK_PB7 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie0m0_pins: pcie0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie21_port0_clkreq_m0 */</div><div class='add'>+				&lt;2 RK_PB2 11 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie0m1_pins: pcie0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie0_clkreq_m1 */</div><div class='add'>+				&lt;1 RK_PB6 12 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie0m2_pins: pcie0m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie0_clkreq_m2 */</div><div class='add'>+				&lt;4 RK_PB5 12 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie0m3_pins: pcie0m3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie0_clkreq_m3 */</div><div class='add'>+				&lt;4 RK_PC6 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie0_buttonrst: pcie21-port0-buttonrst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie0_buttonrst */</div><div class='add'>+				&lt;1 RK_PC4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie1m0_pins: pcie1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie1_clkreq_m0 */</div><div class='add'>+				&lt;2 RK_PB3 11 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie1m1_pins: pcie1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie1_clkreq_m1 */</div><div class='add'>+				&lt;1 RK_PB4 12 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie1m2_pins: pcie1m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie1_clkreq_m2 */</div><div class='add'>+				&lt;4 RK_PA5 12 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie1m3_pins: pcie1m3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie1_clkreq_m3 */</div><div class='add'>+				&lt;4 RK_PC1 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie1_buttonrst: pcie21-port1-buttonrst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pcie1_buttonrst */</div><div class='add'>+				&lt;1 RK_PC5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_clk0: pdm0m0-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk0_m0 */</div><div class='add'>+				&lt;0 RK_PC4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_clk1: pdm0m0-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk1_m0 */</div><div class='add'>+				&lt;0 RK_PC3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_sdi0: pdm0m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi0_m0 */</div><div class='add'>+				&lt;0 RK_PD0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_sdi1: pdm0m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi1_m0 */</div><div class='add'>+				&lt;0 RK_PD1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_sdi2: pdm0m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi2_m0 */</div><div class='add'>+				&lt;0 RK_PD2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m0_sdi3: pdm0m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi3_m0 */</div><div class='add'>+				&lt;0 RK_PD3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_clk0: pdm0m1-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk0_m1 */</div><div class='add'>+				&lt;1 RK_PB1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_clk1: pdm0m1-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk1_m1 */</div><div class='add'>+				&lt;1 RK_PA6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_sdi0: pdm0m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi0_m1 */</div><div class='add'>+				&lt;1 RK_PB2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_sdi1: pdm0m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi1_m1 */</div><div class='add'>+				&lt;1 RK_PA3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_sdi2: pdm0m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi2_m1 */</div><div class='add'>+				&lt;1 RK_PA5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m1_sdi3: pdm0m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi3_m1 */</div><div class='add'>+				&lt;1 RK_PA2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_clk0: pdm0m2-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk0_m2 */</div><div class='add'>+				&lt;1 RK_PC1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_clk1: pdm0m2-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk1_m2 */</div><div class='add'>+				&lt;1 RK_PD5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_sdi0: pdm0m2-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi0_m2 */</div><div class='add'>+				&lt;1 RK_PC6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_sdi1: pdm0m2-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi1_m2 */</div><div class='add'>+				&lt;1 RK_PC7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_sdi2: pdm0m2-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi2_m2 */</div><div class='add'>+				&lt;1 RK_PC0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m2_sdi3: pdm0m2-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi3_m2 */</div><div class='add'>+				&lt;1 RK_PD4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_clk0: pdm0m3-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk0_m3 */</div><div class='add'>+				&lt;2 RK_PB5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_clk1: pdm0m3-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_clk1_m3 */</div><div class='add'>+				&lt;2 RK_PB3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_sdi0: pdm0m3-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi0_m3 */</div><div class='add'>+				&lt;2 RK_PB4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_sdi1: pdm0m3-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi1_m3 */</div><div class='add'>+				&lt;2 RK_PB2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_sdi2: pdm0m3-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi2_m3 */</div><div class='add'>+				&lt;2 RK_PB1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm0m3_sdi3: pdm0m3-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm0_sdi3_m3 */</div><div class='add'>+				&lt;2 RK_PB0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pdm1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_clk0: pdm1m0-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk0_m0 */</div><div class='add'>+				&lt;2 RK_PC5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_clk1: pdm1m0-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk1_m0 */</div><div class='add'>+				&lt;2 RK_PC1 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_sdi0: pdm1m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi0_m0 */</div><div class='add'>+				&lt;2 RK_PC4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_sdi1: pdm1m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi1_m0 */</div><div class='add'>+				&lt;2 RK_PC0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_sdi2: pdm1m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi2_m0 */</div><div class='add'>+				&lt;2 RK_PC2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m0_sdi3: pdm1m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi3_m0 */</div><div class='add'>+				&lt;2 RK_PC3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_clk0: pdm1m1-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk0_m1 */</div><div class='add'>+				&lt;4 RK_PA6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_clk1: pdm1m1-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk1_m1 */</div><div class='add'>+				&lt;4 RK_PB0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_sdi0: pdm1m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi0_m1 */</div><div class='add'>+				&lt;4 RK_PB3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_sdi1: pdm1m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi1_m1 */</div><div class='add'>+				&lt;4 RK_PB2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_sdi2: pdm1m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi2_m1 */</div><div class='add'>+				&lt;4 RK_PB1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m1_sdi3: pdm1m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi3_m1 */</div><div class='add'>+				&lt;4 RK_PA4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_clk0: pdm1m2-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk0_m2 */</div><div class='add'>+				&lt;3 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_clk1: pdm1m2-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_clk1_m2 */</div><div class='add'>+				&lt;3 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_sdi0: pdm1m2-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi0_m2 */</div><div class='add'>+				&lt;3 RK_PB3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_sdi1: pdm1m2-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi1_m2 */</div><div class='add'>+				&lt;3 RK_PB2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_sdi2: pdm1m2-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi2_m2 */</div><div class='add'>+				&lt;3 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pdm1m2_sdi3: pdm1m2-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pdm1_sdi3_m2 */</div><div class='add'>+				&lt;3 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu_debug_test {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pmu_debug_test_pins: pmu_debug_test-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pmu_debug_test_out */</div><div class='add'>+				&lt;0 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m0_ch0: pwm0m0-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch0_m0 */</div><div class='add'>+				&lt;0 RK_PC4 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m0_ch1: pwm0m0-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch1_m0 */</div><div class='add'>+				&lt;0 RK_PC3 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m1_ch0: pwm0m1-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch0_m1 */</div><div class='add'>+				&lt;1 RK_PC0 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m1_ch1: pwm0m1-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch1_m1 */</div><div class='add'>+				&lt;4 RK_PC1 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m2_ch0: pwm0m2-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch0_m2 */</div><div class='add'>+				&lt;2 RK_PC3 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m2_ch1: pwm0m2-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch1_m2 */</div><div class='add'>+				&lt;2 RK_PC7 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m3_ch0: pwm0m3-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch0_m3 */</div><div class='add'>+				&lt;3 RK_PB0 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm0m3_ch1: pwm0m3-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm0_ch1_m3 */</div><div class='add'>+				&lt;3 RK_PB6 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch0: pwm1m0-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch0_m0 */</div><div class='add'>+				&lt;0 RK_PB4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch1: pwm1m0-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch1_m0 */</div><div class='add'>+				&lt;0 RK_PB5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch2: pwm1m0-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch2_m0 */</div><div class='add'>+				&lt;0 RK_PB6 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch3: pwm1m0-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch3_m0 */</div><div class='add'>+				&lt;0 RK_PC0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch4: pwm1m0-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch4_m0 */</div><div class='add'>+				&lt;0 RK_PB7 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m0_ch5: pwm1m0-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch5_m0 */</div><div class='add'>+				&lt;0 RK_PD2 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch0: pwm1m1-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch0_m1 */</div><div class='add'>+				&lt;1 RK_PB4 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch1: pwm1m1-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch1_m1 */</div><div class='add'>+				&lt;1 RK_PB5 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch2: pwm1m1-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch2_m1 */</div><div class='add'>+				&lt;1 RK_PC2 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch3: pwm1m1-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch3_m1 */</div><div class='add'>+				&lt;1 RK_PD2 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch4: pwm1m1-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch4_m1 */</div><div class='add'>+				&lt;1 RK_PD3 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m1_ch5: pwm1m1-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch5_m1 */</div><div class='add'>+				&lt;4 RK_PC0 14 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch0: pwm1m2-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch0_m2 */</div><div class='add'>+				&lt;2 RK_PC0 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch1: pwm1m2-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch1_m2 */</div><div class='add'>+				&lt;2 RK_PC1 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch2: pwm1m2-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch2_m2 */</div><div class='add'>+				&lt;2 RK_PC2 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch3: pwm1m2-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch3_m2 */</div><div class='add'>+				&lt;2 RK_PC4 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch4: pwm1m2-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch4_m2 */</div><div class='add'>+				&lt;2 RK_PC5 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m2_ch5: pwm1m2-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch5_m2 */</div><div class='add'>+				&lt;2 RK_PC6 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch0: pwm1m3-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch0_m3 */</div><div class='add'>+				&lt;3 RK_PA4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch1: pwm1m3-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch1_m3 */</div><div class='add'>+				&lt;3 RK_PA5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch2: pwm1m3-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch2_m3 */</div><div class='add'>+				&lt;3 RK_PA6 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch3: pwm1m3-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch3_m3 */</div><div class='add'>+				&lt;3 RK_PB1 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch4: pwm1m3-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch4_m3 */</div><div class='add'>+				&lt;3 RK_PB4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm1m3_ch5: pwm1m3-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm1_ch5_m3 */</div><div class='add'>+				&lt;3 RK_PB5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch0: pwm2m0-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch0_m0 */</div><div class='add'>+				&lt;0 RK_PD3 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch1: pwm2m0-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch1_m0 */</div><div class='add'>+				&lt;1 RK_PB3 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch2: pwm2m0-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch2_m0 */</div><div class='add'>+				&lt;2 RK_PA0 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch3: pwm2m0-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch3_m0 */</div><div class='add'>+				&lt;2 RK_PA1 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch4: pwm2m0-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch4_m0 */</div><div class='add'>+				&lt;2 RK_PA4 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch5: pwm2m0-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch5_m0 */</div><div class='add'>+				&lt;4 RK_PA2 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch6: pwm2m0-ch6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch6_m0 */</div><div class='add'>+				&lt;4 RK_PA7 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m0_ch7: pwm2m0-ch7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch7_m0 */</div><div class='add'>+				&lt;4 RK_PB3 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch0: pwm2m1-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch0_m1 */</div><div class='add'>+				&lt;4 RK_PC2 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch1: pwm2m1-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch1_m1 */</div><div class='add'>+				&lt;4 RK_PC3 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch2: pwm2m1-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch2_m1 */</div><div class='add'>+				&lt;4 RK_PC6 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch3: pwm2m1-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch3_m1 */</div><div class='add'>+				&lt;4 RK_PC7 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch4: pwm2m1-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch4_m1 */</div><div class='add'>+				&lt;4 RK_PA3 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch5: pwm2m1-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch5_m1 */</div><div class='add'>+				&lt;4 RK_PC5 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch6: pwm2m1-ch6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch6_m1 */</div><div class='add'>+				&lt;4 RK_PC4 14 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m1_ch7: pwm2m1-ch7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch7_m1 */</div><div class='add'>+				&lt;1 RK_PB1 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch0: pwm2m2-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch0_m2 */</div><div class='add'>+				&lt;2 RK_PD0 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch1: pwm2m2-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch1_m2 */</div><div class='add'>+				&lt;2 RK_PD1 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch2: pwm2m2-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch2_m2 */</div><div class='add'>+				&lt;2 RK_PD2 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch3: pwm2m2-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch3_m2 */</div><div class='add'>+				&lt;2 RK_PD3 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch4: pwm2m2-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch4_m2 */</div><div class='add'>+				&lt;2 RK_PD4 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch5: pwm2m2-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch5_m2 */</div><div class='add'>+				&lt;2 RK_PD5 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch6: pwm2m2-ch6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch6_m2 */</div><div class='add'>+				&lt;2 RK_PD6 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m2_ch7: pwm2m2-ch7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch7_m2 */</div><div class='add'>+				&lt;2 RK_PD7 13 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch0: pwm2m3-ch0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch0_m3 */</div><div class='add'>+				&lt;3 RK_PC2 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch1: pwm2m3-ch1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch1_m3 */</div><div class='add'>+				&lt;3 RK_PC3 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch2: pwm2m3-ch2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch2_m3 */</div><div class='add'>+				&lt;3 RK_PC5 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch3: pwm2m3-ch3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch3_m3 */</div><div class='add'>+				&lt;3 RK_PD0 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch4: pwm2m3-ch4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch4_m3 */</div><div class='add'>+				&lt;3 RK_PD2 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch5: pwm2m3-ch5 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch5_m3 */</div><div class='add'>+				&lt;3 RK_PD3 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch6: pwm2m3-ch6 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch6_m3 */</div><div class='add'>+				&lt;3 RK_PD6 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pwm2m3_ch7: pwm2m3-ch7 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pwm2_ch7_m3 */</div><div class='add'>+				&lt;3 RK_PD7 12 &amp;pcfg_pull_none_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ref_clk0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ref_clk0_clk0: ref_clk0-clk0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk0_out */</div><div class='add'>+				&lt;0 RK_PA0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ref_clk1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ref_clk1_clk1: ref_clk1-clk1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk1_out */</div><div class='add'>+				&lt;0 RK_PB4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ref_clk2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ref_clk2_clk2: ref_clk2-clk2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ref_clk2_out */</div><div class='add'>+				&lt;0 RK_PB5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_lrck: sai0m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_lrck_m0 */</div><div class='add'>+				&lt;2 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_mclk: sai0m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_mclk_m0 */</div><div class='add'>+				&lt;2 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sclk: sai0m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sclk_m0 */</div><div class='add'>+				&lt;2 RK_PB6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdi0: sai0m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi0_m0 */</div><div class='add'>+				&lt;2 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdi1: sai0m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi1_m0 */</div><div class='add'>+				&lt;2 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdi2: sai0m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi2_m0 */</div><div class='add'>+				&lt;2 RK_PB2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdi3: sai0m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi3_m0 */</div><div class='add'>+				&lt;2 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdo0: sai0m0-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo0_m0 */</div><div class='add'>+				&lt;2 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdo1: sai0m0-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo1_m0 */</div><div class='add'>+				&lt;2 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdo2: sai0m0-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo2_m0 */</div><div class='add'>+				&lt;2 RK_PB3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m0_sdo3: sai0m0-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo3_m0 */</div><div class='add'>+				&lt;2 RK_PD7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_lrck: sai0m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_lrck_m1 */</div><div class='add'>+				&lt;0 RK_PC7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_mclk: sai0m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_mclk_m1 */</div><div class='add'>+				&lt;0 RK_PC4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sclk: sai0m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sclk_m1 */</div><div class='add'>+				&lt;0 RK_PC6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdi0: sai0m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi0_m1 */</div><div class='add'>+				&lt;0 RK_PD0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdi1: sai0m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi1_m1 */</div><div class='add'>+				&lt;0 RK_PD1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdi2: sai0m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi2_m1 */</div><div class='add'>+				&lt;0 RK_PD2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdi3: sai0m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi3_m1 */</div><div class='add'>+				&lt;0 RK_PD3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdo0: sai0m1-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo0_m1 */</div><div class='add'>+				&lt;0 RK_PC5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdo1: sai0m1-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo1_m1 */</div><div class='add'>+				&lt;0 RK_PD3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdo2: sai0m1-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo2_m1 */</div><div class='add'>+				&lt;0 RK_PD2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m1_sdo3: sai0m1-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo3_m1 */</div><div class='add'>+				&lt;0 RK_PD1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_lrck: sai0m2-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_lrck_m2 */</div><div class='add'>+				&lt;1 RK_PA1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_mclk: sai0m2-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_mclk_m2 */</div><div class='add'>+				&lt;1 RK_PA4 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sclk: sai0m2-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sclk_m2 */</div><div class='add'>+				&lt;1 RK_PA0 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdi0: sai0m2-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi0_m2 */</div><div class='add'>+				&lt;1 RK_PB2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdi1: sai0m2-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi1_m2 */</div><div class='add'>+				&lt;1 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdi2: sai0m2-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi2_m2 */</div><div class='add'>+				&lt;1 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdi3: sai0m2-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdi3_m2 */</div><div class='add'>+				&lt;1 RK_PA2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdo0: sai0m2-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo0_m2 */</div><div class='add'>+				&lt;1 RK_PA7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdo1: sai0m2-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo1_m2 */</div><div class='add'>+				&lt;1 RK_PA2 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdo2: sai0m2-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo2_m2 */</div><div class='add'>+				&lt;1 RK_PA3 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai0m2_sdo3: sai0m2-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai0_sdo3_m2 */</div><div class='add'>+				&lt;1 RK_PB1 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_lrck: sai1m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_lrck_m0 */</div><div class='add'>+				&lt;4 RK_PA5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_mclk: sai1m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_mclk_m0 */</div><div class='add'>+				&lt;4 RK_PA2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sclk: sai1m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sclk_m0 */</div><div class='add'>+				&lt;4 RK_PA3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdi0: sai1m0-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi0_m0 */</div><div class='add'>+				&lt;4 RK_PB3 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdi1: sai1m0-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi1_m0 */</div><div class='add'>+				&lt;4 RK_PB2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdi2: sai1m0-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi2_m0 */</div><div class='add'>+				&lt;4 RK_PB1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdi3: sai1m0-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi3_m0 */</div><div class='add'>+				&lt;4 RK_PB0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdo0: sai1m0-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo0_m0 */</div><div class='add'>+				&lt;4 RK_PA7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdo1: sai1m0-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo1_m0 */</div><div class='add'>+				&lt;4 RK_PB0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdo2: sai1m0-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo2_m0 */</div><div class='add'>+				&lt;4 RK_PB1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m0_sdo3: sai1m0-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo3_m0 */</div><div class='add'>+				&lt;4 RK_PB2 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_lrck: sai1m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_lrck_m1 */</div><div class='add'>+				&lt;3 RK_PC6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_mclk: sai1m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_mclk_m1 */</div><div class='add'>+				&lt;3 RK_PD0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sclk: sai1m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sclk_m1 */</div><div class='add'>+				&lt;3 RK_PC7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdi0: sai1m1-sdi0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi0_m1 */</div><div class='add'>+				&lt;3 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdi1: sai1m1-sdi1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi1_m1 */</div><div class='add'>+				&lt;3 RK_PD4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdi2: sai1m1-sdi2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi2_m1 */</div><div class='add'>+				&lt;3 RK_PD5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdi3: sai1m1-sdi3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdi3_m1 */</div><div class='add'>+				&lt;3 RK_PD6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdo0: sai1m1-sdo0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo0_m1 */</div><div class='add'>+				&lt;3 RK_PC5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdo1: sai1m1-sdo1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo1_m1 */</div><div class='add'>+				&lt;3 RK_PC4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdo2: sai1m1-sdo2 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo2_m1 */</div><div class='add'>+				&lt;3 RK_PC1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai1m1_sdo3: sai1m1-sdo3 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai1_sdo3_m1 */</div><div class='add'>+				&lt;3 RK_PC0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m0_lrck: sai2m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_lrck_m0 */</div><div class='add'>+				&lt;1 RK_PD2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m0_mclk: sai2m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_mclk_m0 */</div><div class='add'>+				&lt;1 RK_PD4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m0_sclk: sai2m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_sclk_m0 */</div><div class='add'>+				&lt;1 RK_PD1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m0_sdi: sai2m0-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m0_sdi */</div><div class='add'>+				&lt;1 RK_PD3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m0_sdo: sai2m0-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m0_sdo */</div><div class='add'>+				&lt;1 RK_PD0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m1_lrck: sai2m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_lrck_m1 */</div><div class='add'>+				&lt;2 RK_PC3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m1_mclk: sai2m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_mclk_m1 */</div><div class='add'>+				&lt;2 RK_PC1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m1_sclk: sai2m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_sclk_m1 */</div><div class='add'>+				&lt;2 RK_PC2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m1_sdi: sai2m1-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m1_sdi */</div><div class='add'>+				&lt;2 RK_PC5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m1_sdo: sai2m1-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m1_sdo */</div><div class='add'>+				&lt;2 RK_PC4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m2_lrck: sai2m2-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_lrck_m2 */</div><div class='add'>+				&lt;3 RK_PC3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m2_mclk: sai2m2-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_mclk_m2 */</div><div class='add'>+				&lt;3 RK_PD1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m2_sclk: sai2m2-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2_sclk_m2 */</div><div class='add'>+				&lt;3 RK_PC2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m2_sdi: sai2m2-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m2_sdi */</div><div class='add'>+				&lt;3 RK_PD2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai2m2_sdo: sai2m2-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai2m2_sdo */</div><div class='add'>+				&lt;3 RK_PD3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m0_lrck: sai3m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_lrck_m0 */</div><div class='add'>+				&lt;1 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m0_mclk: sai3m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_mclk_m0 */</div><div class='add'>+				&lt;1 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m0_sclk: sai3m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_sclk_m0 */</div><div class='add'>+				&lt;1 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m0_sdi: sai3m0-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m0_sdi */</div><div class='add'>+				&lt;1 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m0_sdo: sai3m0-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m0_sdo */</div><div class='add'>+				&lt;1 RK_PB2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m1_lrck: sai3m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_lrck_m1 */</div><div class='add'>+				&lt;1 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m1_mclk: sai3m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_mclk_m1 */</div><div class='add'>+				&lt;1 RK_PC1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m1_sclk: sai3m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_sclk_m1 */</div><div class='add'>+				&lt;1 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m1_sdi: sai3m1-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m1_sdi */</div><div class='add'>+				&lt;1 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m1_sdo: sai3m1-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m1_sdo */</div><div class='add'>+				&lt;1 RK_PB6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m2_lrck: sai3m2-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_lrck_m2 */</div><div class='add'>+				&lt;3 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m2_mclk: sai3m2-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_mclk_m2 */</div><div class='add'>+				&lt;2 RK_PD6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m2_sclk: sai3m2-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_sclk_m2 */</div><div class='add'>+				&lt;3 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m2_sdi: sai3m2-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m2_sdi */</div><div class='add'>+				&lt;3 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m2_sdo: sai3m2-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m2_sdo */</div><div class='add'>+				&lt;3 RK_PA2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m3_lrck: sai3m3-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_lrck_m3 */</div><div class='add'>+				&lt;2 RK_PA2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m3_mclk: sai3m3-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_mclk_m3 */</div><div class='add'>+				&lt;2 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m3_sclk: sai3m3-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3_sclk_m3 */</div><div class='add'>+				&lt;2 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m3_sdi: sai3m3-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m3_sdi */</div><div class='add'>+				&lt;2 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai3m3_sdo: sai3m3-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai3m3_sdo */</div><div class='add'>+				&lt;2 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sai4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m0_lrck: sai4m0-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_lrck_m0 */</div><div class='add'>+				&lt;4 RK_PA6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m0_mclk: sai4m0-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_mclk_m0 */</div><div class='add'>+				&lt;4 RK_PA2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m0_sclk: sai4m0-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_sclk_m0 */</div><div class='add'>+				&lt;4 RK_PA4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m0_sdi: sai4m0-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m0_sdi */</div><div class='add'>+				&lt;4 RK_PA7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m0_sdo: sai4m0-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m0_sdo */</div><div class='add'>+				&lt;4 RK_PB3 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m1_lrck: sai4m1-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_lrck_m1 */</div><div class='add'>+				&lt;4 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m1_mclk: sai4m1-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_mclk_m1 */</div><div class='add'>+				&lt;3 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m1_sclk: sai4m1-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_sclk_m1 */</div><div class='add'>+				&lt;3 RK_PD7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m1_sdi: sai4m1-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m1_sdi */</div><div class='add'>+				&lt;3 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m1_sdo: sai4m1-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m1_sdo */</div><div class='add'>+				&lt;4 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m2_lrck: sai4m2-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_lrck_m2 */</div><div class='add'>+				&lt;4 RK_PC4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m2_mclk: sai4m2-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_mclk_m2 */</div><div class='add'>+				&lt;4 RK_PC0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m2_sclk: sai4m2-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_sclk_m2 */</div><div class='add'>+				&lt;4 RK_PC7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m2_sdi: sai4m2-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m2_sdi */</div><div class='add'>+				&lt;4 RK_PC6 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m2_sdo: sai4m2-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m2_sdo */</div><div class='add'>+				&lt;4 RK_PC5 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m3_lrck: sai4m3-lrck {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_lrck_m3 */</div><div class='add'>+				&lt;2 RK_PC7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m3_mclk: sai4m3-mclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_mclk_m3 */</div><div class='add'>+				&lt;2 RK_PD2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m3_sclk: sai4m3-sclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4_sclk_m3 */</div><div class='add'>+				&lt;2 RK_PC6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m3_sdi: sai4m3-sdi {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m3_sdi */</div><div class='add'>+				&lt;2 RK_PD0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sai4m3_sdo: sai4m3-sdo {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sai4m3_sdo */</div><div class='add'>+				&lt;2 RK_PD1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata30 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sata30_sata: sata30-sata {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sata30_cpdet */</div><div class='add'>+				&lt;1 RK_PC7 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* sata30_cppod */</div><div class='add'>+				&lt;1 RK_PC6 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* sata30_mpswit */</div><div class='add'>+				&lt;1 RK_PD5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata30_port0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sata30_port0m0_port0: sata30_port0m0-port0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sata30_port0_actled_m0 */</div><div class='add'>+				&lt;2 RK_PB4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sata30_port0m1_port0: sata30_port0m1-port0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sata30_port0_actled_m1 */</div><div class='add'>+				&lt;4 RK_PC6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sata30_port1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sata30_port1m0_port1: sata30_port1m0-port1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sata30_port1_actled_m0 */</div><div class='add'>+				&lt;2 RK_PB5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sata30_port1m1_port1: sata30_port1m1-port1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sata30_port1_actled_m1 */</div><div class='add'>+				&lt;4 RK_PC5 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_bus4: sdmmc0-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_d0 */</div><div class='add'>+				&lt;2 RK_PA0 1 &amp;pcfg_pull_up_drv_level_3&gt;,</div><div class='add'>+				/* sdmmc0_d1 */</div><div class='add'>+				&lt;2 RK_PA1 1 &amp;pcfg_pull_up_drv_level_3&gt;,</div><div class='add'>+				/* sdmmc0_d2 */</div><div class='add'>+				&lt;2 RK_PA2 1 &amp;pcfg_pull_up_drv_level_3&gt;,</div><div class='add'>+				/* sdmmc0_d3 */</div><div class='add'>+				&lt;2 RK_PA3 1 &amp;pcfg_pull_up_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_clk: sdmmc0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_clk */</div><div class='add'>+				&lt;2 RK_PA5 1 &amp;pcfg_pull_up_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_cmd: sdmmc0-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_cmd */</div><div class='add'>+				&lt;2 RK_PA4 1 &amp;pcfg_pull_up_drv_level_3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_det: sdmmc0-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_detn */</div><div class='add'>+				&lt;0 RK_PA7 1 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_pwren: sdmmc0-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_pwren */</div><div class='add'>+				&lt;0 RK_PB6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m0_bus4: sdmmc1m0-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_d0_m0 */</div><div class='add'>+				&lt;1 RK_PB4 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d1_m0 */</div><div class='add'>+				&lt;1 RK_PB5 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d2_m0 */</div><div class='add'>+				&lt;1 RK_PB6 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d3_m0 */</div><div class='add'>+				&lt;1 RK_PB7 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m0_clk: sdmmc1m0-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_clk_m0 */</div><div class='add'>+				&lt;1 RK_PC1 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m0_cmd: sdmmc1m0-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_cmd_m0 */</div><div class='add'>+				&lt;1 RK_PC0 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m0_det: sdmmc1m0-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_detn_m0 */</div><div class='add'>+				&lt;1 RK_PC3 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m0_pwren: sdmmc1m0-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1m0_pwren */</div><div class='add'>+				&lt;1 RK_PC2 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m1_bus4: sdmmc1m1-bus4 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_d0_m1 */</div><div class='add'>+				&lt;2 RK_PA6 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d1_m1 */</div><div class='add'>+				&lt;2 RK_PA7 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d2_m1 */</div><div class='add'>+				&lt;2 RK_PB0 2 &amp;pcfg_pull_up_drv_level_2&gt;,</div><div class='add'>+				/* sdmmc1_d3_m1 */</div><div class='add'>+				&lt;2 RK_PB1 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m1_clk: sdmmc1m1-clk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_clk_m1 */</div><div class='add'>+				&lt;2 RK_PB3 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m1_cmd: sdmmc1m1-cmd {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_cmd_m1 */</div><div class='add'>+				&lt;2 RK_PB2 2 &amp;pcfg_pull_up_drv_level_2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m1_det: sdmmc1m1-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_detn_m1 */</div><div class='add'>+				&lt;2 RK_PB5 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m1_pwren: sdmmc1m1-pwren {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1m1_pwren */</div><div class='add'>+				&lt;2 RK_PB4 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1m2_det: sdmmc1m2-det {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_detn_m2 */</div><div class='add'>+				&lt;0 RK_PB6 2 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_testclk_test: sdmmc0_testclk-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_testclk_out */</div><div class='add'>+				&lt;1 RK_PC4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc0_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc0_testdata_test: sdmmc0_testdata-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc0_testdata_out */</div><div class='add'>+				&lt;1 RK_PC5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1_testclk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_testclkm0_test: sdmmc1_testclkm0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_testclk_out_m0 */</div><div class='add'>+				&lt;1 RK_PC4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc1_testdata {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		sdmmc1_testdatam0_test: sdmmc1_testdatam0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* sdmmc1_testdata_out_m0 */</div><div class='add'>+				&lt;1 RK_PC5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_rx0: spdifm0-rx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx0_m0 */</div><div class='add'>+				&lt;4 RK_PB4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_rx1: spdifm0-rx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx1_m0 */</div><div class='add'>+				&lt;3 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_tx0: spdifm0-tx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx0_m0 */</div><div class='add'>+				&lt;4 RK_PB5 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm0_tx1: spdifm0-tx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx1_m0 */</div><div class='add'>+				&lt;3 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_rx0: spdifm1-rx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx0_m1 */</div><div class='add'>+				&lt;4 RK_PA0 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_rx1: spdifm1-rx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx1_m1 */</div><div class='add'>+				&lt;3 RK_PA2 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_tx0: spdifm1-tx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx0_m1 */</div><div class='add'>+				&lt;4 RK_PA1 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm1_tx1: spdifm1-tx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx1_m1 */</div><div class='add'>+				&lt;3 RK_PA3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_rx0: spdifm2-rx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx0_m2 */</div><div class='add'>+				&lt;2 RK_PD6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_rx1: spdifm2-rx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_rx1_m2 */</div><div class='add'>+				&lt;1 RK_PD4 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_tx0: spdifm2-tx0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx0_m2 */</div><div class='add'>+				&lt;2 RK_PD7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spdifm2_tx1: spdifm2-tx1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spdif_tx1_m2 */</div><div class='add'>+				&lt;1 RK_PD5 6 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_pins: spi0m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk_m0 */</div><div class='add'>+				&lt;0 RK_PC7 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_miso_m0 */</div><div class='add'>+				&lt;0 RK_PD1 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_mosi_m0 */</div><div class='add'>+				&lt;0 RK_PD0 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_csn0: spi0m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m0_csn0 */</div><div class='add'>+				&lt;0 RK_PC6 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m0_csn1: spi0m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m0_csn1 */</div><div class='add'>+				&lt;0 RK_PC3 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_pins: spi0m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk_m1 */</div><div class='add'>+				&lt;2 RK_PA5 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_miso_m1 */</div><div class='add'>+				&lt;2 RK_PA1 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_mosi_m1 */</div><div class='add'>+				&lt;2 RK_PA0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_csn0: spi0m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m1_csn0 */</div><div class='add'>+				&lt;2 RK_PA4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m1_csn1: spi0m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m1_csn1 */</div><div class='add'>+				&lt;2 RK_PA2 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m2_pins: spi0m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0_clk_m2 */</div><div class='add'>+				&lt;1 RK_PA7 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_miso_m2 */</div><div class='add'>+				&lt;1 RK_PA6 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi0_mosi_m2 */</div><div class='add'>+				&lt;1 RK_PA5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m2_csn0: spi0m2-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m2_csn0 */</div><div class='add'>+				&lt;1 RK_PA4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi0m2_csn1: spi0m2-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi0m2_csn1 */</div><div class='add'>+				&lt;1 RK_PB2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_pins: spi1m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk_m0 */</div><div class='add'>+				&lt;1 RK_PB4 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_miso_m0 */</div><div class='add'>+				&lt;1 RK_PB6 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_mosi_m0 */</div><div class='add'>+				&lt;1 RK_PB5 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_csn0: spi1m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m0_csn0 */</div><div class='add'>+				&lt;1 RK_PB7 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m0_csn1: spi1m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m0_csn1 */</div><div class='add'>+				&lt;1 RK_PC0 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_pins: spi1m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk_m1 */</div><div class='add'>+				&lt;2 RK_PC5 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_miso_m1 */</div><div class='add'>+				&lt;2 RK_PC3 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_mosi_m1 */</div><div class='add'>+				&lt;2 RK_PC2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_csn0: spi1m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m1_csn0 */</div><div class='add'>+				&lt;2 RK_PC4 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m1_csn1: spi1m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m1_csn1 */</div><div class='add'>+				&lt;2 RK_PC1 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m2_pins: spi1m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1_clk_m2 */</div><div class='add'>+				&lt;3 RK_PC7 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_miso_m2 */</div><div class='add'>+				&lt;3 RK_PC5 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi1_mosi_m2 */</div><div class='add'>+				&lt;3 RK_PC6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m2_csn0: spi1m2-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m2_csn0 */</div><div class='add'>+				&lt;3 RK_PD0 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi1m2_csn1: spi1m2-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi1m2_csn1 */</div><div class='add'>+				&lt;4 RK_PA0 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_pins: spi2m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2_clk_m0 */</div><div class='add'>+				&lt;0 RK_PB2 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_miso_m0 */</div><div class='add'>+				&lt;0 RK_PB1 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_mosi_m0 */</div><div class='add'>+				&lt;0 RK_PB3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_csn0: spi2m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m0_csn0 */</div><div class='add'>+				&lt;0 RK_PB0 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m0_csn1: spi2m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m0_csn1 */</div><div class='add'>+				&lt;0 RK_PA7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_pins: spi2m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2_clk_m1 */</div><div class='add'>+				&lt;1 RK_PD5 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_miso_m1 */</div><div class='add'>+				&lt;1 RK_PC5 11 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_mosi_m1 */</div><div class='add'>+				&lt;1 RK_PC4 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_csn0: spi2m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m1_csn0 */</div><div class='add'>+				&lt;1 RK_PC3 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m1_csn1: spi2m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m1_csn1 */</div><div class='add'>+				&lt;1 RK_PC2 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m2_pins: spi2m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2_clk_m2 */</div><div class='add'>+				&lt;3 RK_PA4 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_miso_m2 */</div><div class='add'>+				&lt;3 RK_PC1 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi2_mosi_m2 */</div><div class='add'>+				&lt;3 RK_PB0 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m2_csn0: spi2m2-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m2_csn0 */</div><div class='add'>+				&lt;3 RK_PC4 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi2m2_csn1: spi2m2-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi2m2_csn1 */</div><div class='add'>+				&lt;3 RK_PA5 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m0_pins: spi3m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3_clk_m0 */</div><div class='add'>+				&lt;3 RK_PA0 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_miso_m0 */</div><div class='add'>+				&lt;3 RK_PA2 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_mosi_m0 */</div><div class='add'>+				&lt;3 RK_PA1 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m0_csn0: spi3m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m0_csn0 */</div><div class='add'>+				&lt;3 RK_PA3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m0_csn1: spi3m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m0_csn1 */</div><div class='add'>+				&lt;2 RK_PD7 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m1_pins: spi3m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3_clk_m1 */</div><div class='add'>+				&lt;3 RK_PD4 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_miso_m1 */</div><div class='add'>+				&lt;3 RK_PD5 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_mosi_m1 */</div><div class='add'>+				&lt;3 RK_PD6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m1_csn0: spi3m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m1_csn0 */</div><div class='add'>+				&lt;3 RK_PB6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m1_csn1: spi3m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m1_csn1 */</div><div class='add'>+				&lt;3 RK_PD7 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m2_pins: spi3m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3_clk_m2 */</div><div class='add'>+				&lt;4 RK_PA7 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_miso_m2 */</div><div class='add'>+				&lt;4 RK_PA6 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi3_mosi_m2 */</div><div class='add'>+				&lt;4 RK_PA4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m2_csn0: spi3m2-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m2_csn0 */</div><div class='add'>+				&lt;4 RK_PA3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi3m2_csn1: spi3m2-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi3m2_csn1 */</div><div class='add'>+				&lt;4 RK_PB3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spi4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m0_pins: spi4m0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4_clk_m0 */</div><div class='add'>+				&lt;4 RK_PC7 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_miso_m0 */</div><div class='add'>+				&lt;4 RK_PC6 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_mosi_m0 */</div><div class='add'>+				&lt;4 RK_PC5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m0_csn0: spi4m0-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m0_csn0 */</div><div class='add'>+				&lt;4 RK_PC4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m0_csn1: spi4m0-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m0_csn1 */</div><div class='add'>+				&lt;4 RK_PC0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m1_pins: spi4m1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4_clk_m1 */</div><div class='add'>+				&lt;3 RK_PD1 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_miso_m1 */</div><div class='add'>+				&lt;3 RK_PC2 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_mosi_m1 */</div><div class='add'>+				&lt;3 RK_PC3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m1_csn0: spi4m1-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m1_csn0 */</div><div class='add'>+				&lt;3 RK_PB1 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m1_csn1: spi4m1-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m1_csn1 */</div><div class='add'>+				&lt;3 RK_PD2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m2_pins: spi4m2-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4_clk_m2 */</div><div class='add'>+				&lt;4 RK_PB0 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_miso_m2 */</div><div class='add'>+				&lt;4 RK_PB2 9 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_mosi_m2 */</div><div class='add'>+				&lt;4 RK_PB1 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m2_csn0: spi4m2-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m2_csn0 */</div><div class='add'>+				&lt;4 RK_PB3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m2_csn1: spi4m2-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m2_csn1 */</div><div class='add'>+				&lt;4 RK_PA5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m3_pins: spi4m3-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4_clk_m3 */</div><div class='add'>+				&lt;2 RK_PB3 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_miso_m3 */</div><div class='add'>+				&lt;2 RK_PB5 10 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* spi4_mosi_m3 */</div><div class='add'>+				&lt;2 RK_PB4 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m3_csn0: spi4m3-csn0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m3_csn0 */</div><div class='add'>+				&lt;2 RK_PB2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		spi4m3_csn1: spi4m3-csn1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* spi4m3_csn1 */</div><div class='add'>+				&lt;2 RK_PA6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	test_clk {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		test_clk_pins: test_clk-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* test_clk_out */</div><div class='add'>+				&lt;2 RK_PA5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsadc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadcm0_pins: tsadcm0-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_ctrl_m0 */</div><div class='add'>+				&lt;0 RK_PA1 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadcm1_pins: tsadcm1-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_ctrl_m1 */</div><div class='add'>+				&lt;0 RK_PA3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsadc_ctrl {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		tsadc_ctrl_pins: tsadc_ctrl-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* tsadc_ctrl_org */</div><div class='add'>+				&lt;0 RK_PA1 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m0_xfer: uart0m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m0 */</div><div class='add'>+				&lt;0 RK_PD5 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m0 */</div><div class='add'>+				&lt;0 RK_PD4 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart0m1_xfer: uart0m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart0_rx_m1 */</div><div class='add'>+				&lt;2 RK_PA0 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart0_tx_m1 */</div><div class='add'>+				&lt;2 RK_PA1 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_xfer: uart1m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m0 */</div><div class='add'>+				&lt;0 RK_PC0 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m0 */</div><div class='add'>+				&lt;0 RK_PB7 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_ctsn: uart1m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m0_ctsn */</div><div class='add'>+				&lt;0 RK_PD2 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m0_rtsn: uart1m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m0_rtsn */</div><div class='add'>+				&lt;0 RK_PD3 13 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_xfer: uart1m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m1 */</div><div class='add'>+				&lt;2 RK_PB1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m1 */</div><div class='add'>+				&lt;2 RK_PB0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_ctsn: uart1m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m1_ctsn */</div><div class='add'>+				&lt;2 RK_PB2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m1_rtsn: uart1m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m1_rtsn */</div><div class='add'>+				&lt;2 RK_PB3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m2_xfer: uart1m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1_rx_m2 */</div><div class='add'>+				&lt;3 RK_PA6 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart1_tx_m2 */</div><div class='add'>+				&lt;3 RK_PA7 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m2_ctsn: uart1m2-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m2_ctsn */</div><div class='add'>+				&lt;3 RK_PA4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart1m2_rtsn: uart1m2-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart1m2_rtsn */</div><div class='add'>+				&lt;3 RK_PA5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_xfer: uart2m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m0 */</div><div class='add'>+				&lt;1 RK_PC7 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m0 */</div><div class='add'>+				&lt;1 RK_PC6 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_ctsn: uart2m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_ctsn */</div><div class='add'>+				&lt;1 RK_PC5 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m0_rtsn: uart2m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m0_rtsn */</div><div class='add'>+				&lt;1 RK_PC4 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_xfer: uart2m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m1 */</div><div class='add'>+				&lt;4 RK_PB4 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m1 */</div><div class='add'>+				&lt;4 RK_PB5 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_ctsn: uart2m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_ctsn */</div><div class='add'>+				&lt;4 RK_PB1 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m1_rtsn: uart2m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m1_rtsn */</div><div class='add'>+				&lt;4 RK_PB0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m2_xfer: uart2m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2_rx_m2 */</div><div class='add'>+				&lt;3 RK_PB7 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart2_tx_m2 */</div><div class='add'>+				&lt;3 RK_PC0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m2_ctsn: uart2m2-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m2_ctsn */</div><div class='add'>+				&lt;3 RK_PD3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart2m2_rtsn: uart2m2-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart2m2_rtsn */</div><div class='add'>+				&lt;3 RK_PD2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_xfer: uart3m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m0 */</div><div class='add'>+				&lt;3 RK_PA1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m0 */</div><div class='add'>+				&lt;3 RK_PA0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_ctsn: uart3m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m0_ctsn */</div><div class='add'>+				&lt;3 RK_PA2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m0_rtsn: uart3m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m0_rtsn */</div><div class='add'>+				&lt;3 RK_PA3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_xfer: uart3m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m1 */</div><div class='add'>+				&lt;4 RK_PA1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m1 */</div><div class='add'>+				&lt;4 RK_PA0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_ctsn: uart3m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m1_ctsn */</div><div class='add'>+				&lt;3 RK_PB7 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m1_rtsn: uart3m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m1_rtsn */</div><div class='add'>+				&lt;3 RK_PC0 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m2_xfer: uart3m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3_rx_m2 */</div><div class='add'>+				&lt;1 RK_PC1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart3_tx_m2 */</div><div class='add'>+				&lt;1 RK_PC0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m2_ctsn: uart3m2-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m2_ctsn */</div><div class='add'>+				&lt;1 RK_PB6 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart3m2_rtsn: uart3m2-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart3m2_rtsn */</div><div class='add'>+				&lt;1 RK_PB7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart4 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_xfer: uart4m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx_m0 */</div><div class='add'>+				&lt;2 RK_PD1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx_m0 */</div><div class='add'>+				&lt;2 RK_PD0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_ctsn: uart4m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m0_ctsn */</div><div class='add'>+				&lt;2 RK_PC6 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m0_rtsn: uart4m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m0_rtsn */</div><div class='add'>+				&lt;2 RK_PC7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_xfer: uart4m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx_m1 */</div><div class='add'>+				&lt;1 RK_PC5 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx_m1 */</div><div class='add'>+				&lt;1 RK_PC4 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_ctsn: uart4m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m1_ctsn */</div><div class='add'>+				&lt;1 RK_PC3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m1_rtsn: uart4m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4m1_rtsn */</div><div class='add'>+				&lt;1 RK_PC2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart4m2_xfer: uart4m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart4_rx_m2 */</div><div class='add'>+				&lt;0 RK_PB5 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart4_tx_m2 */</div><div class='add'>+				&lt;0 RK_PB4 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart5 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_xfer: uart5m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m0 */</div><div class='add'>+				&lt;3 RK_PD4 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m0 */</div><div class='add'>+				&lt;3 RK_PD5 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_ctsn: uart5m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_ctsn */</div><div class='add'>+				&lt;3 RK_PD6 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m0_rtsn: uart5m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m0_rtsn */</div><div class='add'>+				&lt;3 RK_PD7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_xfer: uart5m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m1 */</div><div class='add'>+				&lt;4 RK_PB1 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m1 */</div><div class='add'>+				&lt;4 RK_PB0 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_ctsn: uart5m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_ctsn */</div><div class='add'>+				&lt;4 RK_PA5 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m1_rtsn: uart5m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m1_rtsn */</div><div class='add'>+				&lt;4 RK_PA3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m2_xfer: uart5m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5_rx_m2 */</div><div class='add'>+				&lt;2 RK_PA4 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart5_tx_m2 */</div><div class='add'>+				&lt;2 RK_PA5 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m2_ctsn: uart5m2-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m2_ctsn */</div><div class='add'>+				&lt;2 RK_PA3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart5m2_rtsn: uart5m2-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart5m2_rtsn */</div><div class='add'>+				&lt;2 RK_PA2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart6 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_xfer: uart6m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m0 */</div><div class='add'>+				&lt;4 RK_PA6 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m0 */</div><div class='add'>+				&lt;4 RK_PA4 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_ctsn: uart6m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m0_ctsn */</div><div class='add'>+				&lt;4 RK_PB1 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m0_rtsn: uart6m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m0_rtsn */</div><div class='add'>+				&lt;4 RK_PB0 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_xfer: uart6m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m1 */</div><div class='add'>+				&lt;2 RK_PD3 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m1 */</div><div class='add'>+				&lt;2 RK_PD2 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_ctsn: uart6m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m1_ctsn */</div><div class='add'>+				&lt;2 RK_PD5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m1_rtsn: uart6m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m1_rtsn */</div><div class='add'>+				&lt;2 RK_PD4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m2_xfer: uart6m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m2 */</div><div class='add'>+				&lt;1 RK_PB3 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m2 */</div><div class='add'>+				&lt;1 RK_PB0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m2_ctsn: uart6m2-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m2_ctsn */</div><div class='add'>+				&lt;1 RK_PA3 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m2_rtsn: uart6m2-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6m2_rtsn */</div><div class='add'>+				&lt;1 RK_PA2 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart6m3_xfer: uart6m3-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart6_rx_m3 */</div><div class='add'>+				&lt;4 RK_PC5 13 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart6_tx_m3 */</div><div class='add'>+				&lt;4 RK_PC4 13 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart7 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_xfer: uart7m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m0 */</div><div class='add'>+				&lt;2 RK_PB7 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m0 */</div><div class='add'>+				&lt;2 RK_PB6 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_ctsn: uart7m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_ctsn */</div><div class='add'>+				&lt;2 RK_PB4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m0_rtsn: uart7m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m0_rtsn */</div><div class='add'>+				&lt;2 RK_PB5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_xfer: uart7m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m1 */</div><div class='add'>+				&lt;1 RK_PA3 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m1 */</div><div class='add'>+				&lt;1 RK_PA2 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_ctsn: uart7m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m1_ctsn */</div><div class='add'>+				&lt;1 RK_PA1 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m1_rtsn: uart7m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7m1_rtsn */</div><div class='add'>+				&lt;1 RK_PA0 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart7m2_xfer: uart7m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart7_rx_m2 */</div><div class='add'>+				&lt;2 RK_PA0 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart7_tx_m2 */</div><div class='add'>+				&lt;2 RK_PA1 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart8 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_xfer: uart8m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8_rx_m0 */</div><div class='add'>+				&lt;3 RK_PC5 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart8_tx_m0 */</div><div class='add'>+				&lt;3 RK_PC6 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_ctsn: uart8m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m0_ctsn */</div><div class='add'>+				&lt;3 RK_PD0 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m0_rtsn: uart8m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m0_rtsn */</div><div class='add'>+				&lt;3 RK_PC7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_xfer: uart8m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8_rx_m1 */</div><div class='add'>+				&lt;2 RK_PA7 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart8_tx_m1 */</div><div class='add'>+				&lt;2 RK_PA6 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_ctsn: uart8m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m1_ctsn */</div><div class='add'>+				&lt;2 RK_PB7 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m1_rtsn: uart8m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8m1_rtsn */</div><div class='add'>+				&lt;2 RK_PB6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart8m2_xfer: uart8m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart8_rx_m2 */</div><div class='add'>+				&lt;0 RK_PC2 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart8_tx_m2 */</div><div class='add'>+				&lt;0 RK_PC1 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart9 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_xfer: uart9m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9_rx_m0 */</div><div class='add'>+				&lt;2 RK_PC0 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart9_tx_m0 */</div><div class='add'>+				&lt;2 RK_PC1 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_ctsn: uart9m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m0_ctsn */</div><div class='add'>+				&lt;2 RK_PD7 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m0_rtsn: uart9m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m0_rtsn */</div><div class='add'>+				&lt;2 RK_PD6 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m1_xfer: uart9m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9_rx_m1 */</div><div class='add'>+				&lt;3 RK_PB2 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart9_tx_m1 */</div><div class='add'>+				&lt;3 RK_PB3 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m1_ctsn: uart9m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m1_ctsn */</div><div class='add'>+				&lt;3 RK_PB5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m1_rtsn: uart9m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9m1_rtsn */</div><div class='add'>+				&lt;3 RK_PB4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart9m2_xfer: uart9m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart9_rx_m2 */</div><div class='add'>+				&lt;4 RK_PC3 13 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart9_tx_m2 */</div><div class='add'>+				&lt;4 RK_PC2 13 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart10 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m0_xfer: uart10m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10_rx_m0 */</div><div class='add'>+				&lt;3 RK_PB0 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart10_tx_m0 */</div><div class='add'>+				&lt;3 RK_PB1 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m0_ctsn: uart10m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10m0_ctsn */</div><div class='add'>+				&lt;3 RK_PA6 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m0_rtsn: uart10m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10m0_rtsn */</div><div class='add'>+				&lt;3 RK_PA7 10 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m1_xfer: uart10m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10_rx_m1 */</div><div class='add'>+				&lt;1 RK_PD1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart10_tx_m1 */</div><div class='add'>+				&lt;1 RK_PD0 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m1_ctsn: uart10m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10m1_ctsn */</div><div class='add'>+				&lt;1 RK_PD5 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m1_rtsn: uart10m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10m1_rtsn */</div><div class='add'>+				&lt;1 RK_PD4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart10m2_xfer: uart10m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart10_rx_m2 */</div><div class='add'>+				&lt;0 RK_PC5 10 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart10_tx_m2 */</div><div class='add'>+				&lt;0 RK_PC4 10 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart11 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m0_xfer: uart11m0-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11_rx_m0 */</div><div class='add'>+				&lt;3 RK_PC1 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart11_tx_m0 */</div><div class='add'>+				&lt;3 RK_PC4 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m0_ctsn: uart11m0-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11m0_ctsn */</div><div class='add'>+				&lt;3 RK_PC3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m0_rtsn: uart11m0-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11m0_rtsn */</div><div class='add'>+				&lt;3 RK_PC2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m1_xfer: uart11m1-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11_rx_m1 */</div><div class='add'>+				&lt;2 RK_PC5 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart11_tx_m1 */</div><div class='add'>+				&lt;2 RK_PC4 9 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m1_ctsn: uart11m1-ctsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11m1_ctsn */</div><div class='add'>+				&lt;2 RK_PC2 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m1_rtsn: uart11m1-rtsn {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11m1_rtsn */</div><div class='add'>+				&lt;2 RK_PC3 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		uart11m2_xfer: uart11m2-xfer {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* uart11_rx_m2 */</div><div class='add'>+				&lt;4 RK_PC1 13 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* uart11_tx_m2 */</div><div class='add'>+				&lt;4 RK_PC0 13 &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_refclk: ufs-refclk {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_refclk */</div><div class='add'>+				&lt;4 RK_PD1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_rst: ufs-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_rstn */</div><div class='add'>+				&lt;4 RK_PD0 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_testdata0 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_testdata0_test: ufs_testdata0-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_testdata0_out */</div><div class='add'>+				&lt;4 RK_PC4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_testdata1 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_testdata1_test: ufs_testdata1-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_testdata1_out */</div><div class='add'>+				&lt;4 RK_PC5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_testdata2 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_testdata2_test: ufs_testdata2-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_testdata2_out */</div><div class='add'>+				&lt;4 RK_PC6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_testdata3 {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		ufs_testdata3_test: ufs_testdata3-test {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* ufs_testdata3_out */</div><div class='add'>+				&lt;4 RK_PC7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vi_cif {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vi_cif_pins: vi_cif-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vi_cif_clki */</div><div class='add'>+				&lt;3 RK_PA3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_clko */</div><div class='add'>+				&lt;3 RK_PA2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d0 */</div><div class='add'>+				&lt;2 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d1 */</div><div class='add'>+				&lt;2 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d2 */</div><div class='add'>+				&lt;2 RK_PC3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d3 */</div><div class='add'>+				&lt;2 RK_PC2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d4 */</div><div class='add'>+				&lt;2 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d5 */</div><div class='add'>+				&lt;2 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d6 */</div><div class='add'>+				&lt;2 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d7 */</div><div class='add'>+				&lt;2 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d8 */</div><div class='add'>+				&lt;2 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d9 */</div><div class='add'>+				&lt;2 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d10 */</div><div class='add'>+				&lt;2 RK_PB3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d11 */</div><div class='add'>+				&lt;2 RK_PB2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d12 */</div><div class='add'>+				&lt;2 RK_PB1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d13 */</div><div class='add'>+				&lt;2 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d14 */</div><div class='add'>+				&lt;2 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_d15 */</div><div class='add'>+				&lt;2 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_href */</div><div class='add'>+				&lt;3 RK_PA0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vi_cif_vsync */</div><div class='add'>+				&lt;3 RK_PA1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vo_lcdc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vo_lcdc_pins: vo_lcdc-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d0 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d1 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d2 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d8 */</div><div class='add'>+				&lt;3 RK_PC3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d9 */</div><div class='add'>+				&lt;3 RK_PC2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d16 */</div><div class='add'>+				&lt;3 RK_PB3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d17 */</div><div class='add'>+				&lt;3 RK_PB2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d18 */</div><div class='add'>+				&lt;3 RK_PB1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vo_post {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vo_post_pins: vo_post-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_post_empty */</div><div class='add'>+				&lt;4 RK_PA1 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vp0_sync {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vp0_sync_pins: vp0_sync-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vp0_sync_out */</div><div class='add'>+				&lt;4 RK_PC5 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vp1_sync {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vp1_sync_pins: vp1_sync-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vp1_sync_out */</div><div class='add'>+				&lt;4 RK_PC6 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vp2_sync {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vp2_sync_pins: vp2_sync-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vp2_sync_out */</div><div class='add'>+				&lt;4 RK_PC7 3 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This part is edited handly.</div><div class='add'>+ */</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pmic {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pmic_pins: pmic-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* pmic_int */</div><div class='add'>+				&lt;0 RK_PA6 9 &amp;pcfg_pull_up&gt;,</div><div class='add'>+				/* pmic_sleep */</div><div class='add'>+				&lt;0 RK_PA4 9 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vo {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		bt1120_pins: bt1120-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		bt656_pins: bt656-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb3x8_pins_m0: rgb3x8-pins-m0 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb3x8_pins_m1: rgb3x8-pins-m1 {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb565_pins: rgb565-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb666_pins: rgb666-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d2 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d18 */</div><div class='add'>+				&lt;3 RK_PB1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		rgb888_pins: rgb888-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_lcdc_clk */</div><div class='add'>+				&lt;3 RK_PD7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d0 */</div><div class='add'>+				&lt;3 RK_PD3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d1 */</div><div class='add'>+				&lt;3 RK_PD2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d2 */</div><div class='add'>+				&lt;3 RK_PD1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d3 */</div><div class='add'>+				&lt;3 RK_PD0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d4 */</div><div class='add'>+				&lt;3 RK_PC7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d5 */</div><div class='add'>+				&lt;3 RK_PC6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d6 */</div><div class='add'>+				&lt;3 RK_PC5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d7 */</div><div class='add'>+				&lt;3 RK_PC4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d8 */</div><div class='add'>+				&lt;3 RK_PC3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d9 */</div><div class='add'>+				&lt;3 RK_PC2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d10 */</div><div class='add'>+				&lt;3 RK_PC1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d11 */</div><div class='add'>+				&lt;3 RK_PC0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d12 */</div><div class='add'>+				&lt;3 RK_PB7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d13 */</div><div class='add'>+				&lt;3 RK_PB6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d14 */</div><div class='add'>+				&lt;3 RK_PB5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d15 */</div><div class='add'>+				&lt;3 RK_PB4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d16 */</div><div class='add'>+				&lt;3 RK_PB3 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d17 */</div><div class='add'>+				&lt;3 RK_PB2 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d18 */</div><div class='add'>+				&lt;3 RK_PB1 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d19 */</div><div class='add'>+				&lt;3 RK_PB0 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d20 */</div><div class='add'>+				&lt;3 RK_PA7 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d21 */</div><div class='add'>+				&lt;3 RK_PA6 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d22 */</div><div class='add'>+				&lt;3 RK_PA5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_d23 */</div><div class='add'>+				&lt;3 RK_PA4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_den */</div><div class='add'>+				&lt;3 RK_PD4 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_hsync */</div><div class='add'>+				&lt;3 RK_PD5 1 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_lcdc_vsync */</div><div class='add'>+				&lt;3 RK_PD6 1 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vo_ebc {</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vo_ebc_pins: vo_ebc-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_ebc_gdclk */</div><div class='add'>+				&lt;3 RK_PD5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_gdoe */</div><div class='add'>+				&lt;3 RK_PA6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_gdsp */</div><div class='add'>+				&lt;3 RK_PA5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdce0 */</div><div class='add'>+				&lt;3 RK_PB3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdclk */</div><div class='add'>+				&lt;3 RK_PD6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo0 */</div><div class='add'>+				&lt;3 RK_PD3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo1 */</div><div class='add'>+				&lt;3 RK_PD2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo2 */</div><div class='add'>+				&lt;3 RK_PD1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo3 */</div><div class='add'>+				&lt;3 RK_PD0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo4 */</div><div class='add'>+				&lt;3 RK_PC7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo5 */</div><div class='add'>+				&lt;3 RK_PC6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo6 */</div><div class='add'>+				&lt;3 RK_PC5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo7 */</div><div class='add'>+				&lt;3 RK_PC4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo8 */</div><div class='add'>+				&lt;3 RK_PC3 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo9 */</div><div class='add'>+				&lt;3 RK_PC2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo10 */</div><div class='add'>+				&lt;3 RK_PC1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo11 */</div><div class='add'>+				&lt;3 RK_PC0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo12 */</div><div class='add'>+				&lt;3 RK_PB7 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo13 */</div><div class='add'>+				&lt;3 RK_PB6 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo14 */</div><div class='add'>+				&lt;3 RK_PB5 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sddo15 */</div><div class='add'>+				&lt;3 RK_PB4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdle */</div><div class='add'>+				&lt;3 RK_PD4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdoe */</div><div class='add'>+				&lt;3 RK_PD7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		vo_ebc_extern: vo_ebc-extern {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				/* vo_ebc_sdce1 */</div><div class='add'>+				&lt;3 RK_PB2 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdce2 */</div><div class='add'>+				&lt;3 RK_PB1 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdce3 */</div><div class='add'>+				&lt;3 RK_PB0 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_sdshr */</div><div class='add'>+				&lt;3 RK_PA4 2 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				/* vo_ebc_vcom */</div><div class='add'>+				&lt;3 RK_PA7 2 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts<br/>new file mode 100644<br/>index 000000000000..d0ab1d1e0e11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts</a></div><div class='hunk'>@@ -0,0 +1,799 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Firefly Technology Co. Ltd</div><div class='add'>+ * Copyright (c) 2024 Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Firefly ROC-RK3576-PC";</div><div class='add'>+	compatible = "firefly,roc-rk3576-pc", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "Maskrom";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-1 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg0_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_device_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v2_ufs_vccq_s0: regulator-vcc1v2-ufs-vccq-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v2_ufs_vccq_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8_ufs_vccq2_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_lcd_s0: regulator-vcc3v3-lcd-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc3v3-lcd-s0";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie: regulator-vcc3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_rtc_s5";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_device_s0: regulator-vcc5v0-device-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5vd_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_device";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb20_host1: regulator-vcc5v0-usb20-host1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb3_host_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host1";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_device_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_s0: regulator-vcc-1v8-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_ufs_s0: regulator-vcc-ufs-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_ufs_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0m0_miim</div><div class='add'>+		     &amp;eth0m0_tx_bus2</div><div class='add'>+		     &amp;eth0m0_rx_bus2</div><div class='add'>+		     &amp;eth0m0_rgmii_clk</div><div class='add'>+		     &amp;eth0m0_rgmii_bus</div><div class='add'>+		     &amp;ethm0_clk0_25m_out&gt;;</div><div class='add'>+	/* Use rgmii-rxid mode to disable rx delay inside Soc */</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	tx_delay = &lt;0x21&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rgmii_phy0: phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		/* Reset time is 20ms, 100ms for rtl8211f */</div><div class='add'>+		reset-delay-us = &lt;20000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys_s5&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* pc9202 watchdog@3c with enable-gpio gpio0-c3 */</div><div class='add'>+</div><div class='add'>+	/* hnyetek,husb311 typec-portc@4e */</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	full-pwr-cycle-in-suspend;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		rtc_int_l: rtc-int-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	power {</div><div class='add'>+		lcd_pwren_h: lcd-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5vd_en: vcc5vd-en {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie_pwren_h: pcie-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		hub_reset_h: hub-reset-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb3_host_pwren_h: usb3-host-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg0_pwren_h: usb-otg0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int_l: usbc0-int-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog {</div><div class='add'>+		wd_en: wd-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart4m1_xfer &amp;uart4m1_ctsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On the extension pin header */</div><div class='add'>+&amp;uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart6m3_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts<br/>new file mode 100644<br/>index 000000000000..9bc33422ced5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts</a></div><div class='hunk'>@@ -0,0 +1,847 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3576.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 4D";</div><div class='add'>+	compatible = "radxa,rock-4d", "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_en_h&gt;;</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio2 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds: leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_g &amp;led_rgb_r&gt;;</div><div class='add'>+</div><div class='add'>+		power-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_dcin: regulator-vcc-5v0-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_dcin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v2_ufs_vccq_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_s0: regulator-vcc-1v8-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v8_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v8_ufs_vccq2_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+		regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_pcie: regulator-vcc-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_pwren&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_pcie";</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_rtc_s5";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_ufs_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_wifi: regulator-vcc-3v3-wifi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_wifi_pwr&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_wifi";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_device: regulator-vcc-5v0-device {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_device";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_host: regulator-vcc-5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_otg: regulator-vcc-5v0-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_pwren&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_otg";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0_sys: regulator-vcc-5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0_sys";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth0m0_miim</div><div class='add'>+		     &amp;eth0m0_tx_bus2</div><div class='add'>+		     &amp;eth0m0_rx_bus2</div><div class='add'>+		     &amp;eth0m0_rgmii_clk</div><div class='add'>+		     &amp;eth0m0_rgmii_bus</div><div class='add'>+		     &amp;ethm0_clk0_25m_out&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_in {</div><div class='add'>+	hdmi_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_out {</div><div class='add'>+	hdmi_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@23 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x23&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins</div><div class='add'>+			     &amp;rk806_dvs1_null</div><div class='add'>+			     &amp;rk806_dvs2_null</div><div class='add'>+			     &amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc_5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_pwrdn: dvs1-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_rst: dvs1-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_slp: dvs1-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_dvs: dvs2-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_gpio: dvs2-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_pwrdn: dvs2-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_rst: dvs2-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_slp: dvs2-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_dvs: dvs3-dvs-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_gpio: dvs3-gpio-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_pwrdn: dvs3-pwrdn-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_rst: dvs3-rst-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_slp: dvs3-slp-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_s0: dcdc-reg5 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo2_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca1v8_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcca1v8_pldo6_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda0v75_hdmi_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;837500&gt;;</div><div class='add'>+				regulator-name = "vdda0v75_hdmi_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru REFCLKO25M_GMAC0_OUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;25000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_reset&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_g: led-green-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		led_rgb_r: led-red-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211f {</div><div class='add'>+		rtl8211f_rst: rtl8211f-rst {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie_pwren: pcie-pwren {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		pcie_reset: pcie-reset {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren: usb-host-pwren {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+		usb_otg_pwren: usb-otg-pwren {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		usb_wifi_pwr: usb-wifi-pwr {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+		wifi_en_h: wifi-en-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sai6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+&amp;sfc0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspi0_pins &amp;fspi0_csn0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc_5v0_otg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc_5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufshc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd0_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_drd1_dwc3 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi<br/>new file mode 100644<br/>index 000000000000..fc4e9e07f1cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3576.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3576.dtsi</a></div><div class='hunk'>@@ -0,0 +1,2707 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rockchip,rk3576-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/rockchip,rk3576-power.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/rockchip,rk3576-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,boot-mode.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "rockchip,rk3576";</div><div class='add'>+</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c2 = &amp;i2c2;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		i2c5 = &amp;i2c5;</div><div class='add'>+		i2c6 = &amp;i2c6;</div><div class='add'>+		i2c7 = &amp;i2c7;</div><div class='add'>+		i2c8 = &amp;i2c8;</div><div class='add'>+		i2c9 = &amp;i2c9;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+		serial4 = &amp;uart4;</div><div class='add'>+		serial5 = &amp;uart5;</div><div class='add'>+		serial6 = &amp;uart6;</div><div class='add'>+		serial7 = &amp;uart7;</div><div class='add'>+		serial8 = &amp;uart8;</div><div class='add'>+		serial9 = &amp;uart9;</div><div class='add'>+		serial10 = &amp;uart10;</div><div class='add'>+		serial11 = &amp;uart11;</div><div class='add'>+		spi0 = &amp;spi0;</div><div class='add'>+		spi1 = &amp;spi1;</div><div class='add'>+		spi2 = &amp;spi2;</div><div class='add'>+		spi3 = &amp;spi3;</div><div class='add'>+		spi4 = &amp;spi4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xin32k: clock-xin32k {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;32768&gt;;</div><div class='add'>+		clock-output-names = "xin32k";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xin24m: clock-xin24m {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		clock-output-names = "xin24m";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spll: clock-spll {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;702000000&gt;;</div><div class='add'>+		clock-output-names = "spll";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_l0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_l1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_l2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_l3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_b0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_b1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_b2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_b3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_l0: cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;485&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_L&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp_table&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;120&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_l1: cpu@1 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;485&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_L&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_l2: cpu@2 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;485&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_L&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_l3: cpu@3 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;485&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_L&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster0_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_b0: cpu@100 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_B&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp_table&gt;;</div><div class='add'>+			dynamic-power-coefficient = &lt;320&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_b1: cpu@101 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x101&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_B&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_b2: cpu@102 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x102&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_B&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_b3: cpu@103 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x103&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk SCMI_ARMCLK_B&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cluster1_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			CPU_SLEEP: cpu-sleep {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x0010000&gt;;</div><div class='add'>+				entry-latency-us = &lt;120&gt;;</div><div class='add'>+				exit-latency-us = &lt;250&gt;;</div><div class='add'>+				min-residency-us = &lt;900&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster0_opp_table: opp-table-cluster0 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1008000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;725000 725000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;900000 900000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2208000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2208000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cluster1_opp_table: opp-table-cluster1 {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-408000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;408000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-816000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;816000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1008000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1008000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1416000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;712500 712500 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1608000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;737500 737500 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;800000 800000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2016000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;862500 862500 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2208000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2208000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;925000 925000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-2304000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2304000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_opp_table: opp-table-gpu {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+		opp-300000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-500000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;700000 700000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-700000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;725000 725000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;775000 775000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-900000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;900000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;825000 825000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-950000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;950000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;850000 850000 850000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	display_subsystem: display-subsystem {</div><div class='add'>+		compatible = "rockchip,display-subsystem";</div><div class='add'>+		ports = &lt;&amp;vop_out&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		scmi: scmi {</div><div class='add'>+			compatible = "arm,scmi-smc";</div><div class='add'>+			arm,smc-id = &lt;0x82000010&gt;;</div><div class='add'>+			shmem = &lt;&amp;scmi_shmem&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_sound: hdmi-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "HDMI";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;hdmi&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;sai6&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl: pinctrl {</div><div class='add'>+		compatible = "rockchip,rk3576-pinctrl";</div><div class='add'>+		rockchip,grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@27320000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0x27320000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO0&gt;, &lt;&amp;cru DBCLK_GPIO0&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@2ae10000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0x2ae10000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO1&gt;, &lt;&amp;cru DBCLK_GPIO1&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 32 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@2ae20000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0x2ae20000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO2&gt;, &lt;&amp;cru DBCLK_GPIO2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 64 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@2ae30000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0x2ae30000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO3&gt;, &lt;&amp;cru DBCLK_GPIO3&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 96 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@2ae40000 {</div><div class='add'>+			compatible = "rockchip,gpio-bank";</div><div class='add'>+			reg = &lt;0x0 0x2ae40000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_GPIO4&gt;, &lt;&amp;cru DBCLK_GPIO4&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 128 32&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu_a53: pmu-a53 {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu_l0&gt;, &lt;&amp;cpu_l1&gt;, &lt;&amp;cpu_l2&gt;, &lt;&amp;cpu_l3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu_a72: pmu-a72 {</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu_b0&gt;, &lt;&amp;cpu_b1&gt;, &lt;&amp;cpu_b2&gt;, &lt;&amp;cpu_b3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_zones: thermal-zones {</div><div class='add'>+		/* sensor near the center of the SoC */</div><div class='add'>+		package_thermal: package-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				package_crit: package-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* sensor for cluster1 (big Cortex-A72 cores) */</div><div class='add'>+		bigcore_thermal: bigcore-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				bigcore_alert: bigcore-alert {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				bigcore_crit: bigcore-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;bigcore_alert&gt;;</div><div class='add'>+					cooling-device =</div><div class='add'>+						&lt;&amp;cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* sensor for cluster0 (little Cortex-A53 cores) */</div><div class='add'>+		littlecore_thermal: littlecore-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 2&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				littlecore_alert: littlecore-alert {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				littlecore_crit: littlecore-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;littlecore_alert&gt;;</div><div class='add'>+					cooling-device =</div><div class='add'>+						&lt;&amp;cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_thermal: gpu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;100&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 3&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				gpu_alert: gpu-alert {</div><div class='add'>+					temperature = &lt;85000&gt;;</div><div class='add'>+					hysteresis = &lt;2000&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpu_crit: gpu-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;gpu_alert&gt;;</div><div class='add'>+					cooling-device =</div><div class='add'>+						&lt;&amp;gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		npu_thermal: npu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 4&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				npu_crit: npu-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ddr_thermal: ddr-thermal {</div><div class='add'>+			polling-delay-passive = &lt;0&gt;;</div><div class='add'>+			polling-delay = &lt;0&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsadc 5&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				ddr_crit: ddr-crit {</div><div class='add'>+					temperature = &lt;115000&gt;;</div><div class='add'>+					hysteresis = &lt;0&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@22000000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";</div><div class='add'>+			reg = &lt;0x0 0x22000000 0x0 0x00400000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a200000 0x0 0x00010000&gt;,</div><div class='add'>+			      &lt;0x0 0x20000000 0x0 0x00100000&gt;;</div><div class='add'>+			reg-names = "dbi", "apb", "config";</div><div class='add'>+			bus-range = &lt;0x0 0xf&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_PCIE0_MST&gt;, &lt;&amp;cru ACLK_PCIE0_SLV&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_PCIE0_DBI&gt;, &lt;&amp;cru PCLK_PCIE0&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_PCIE0_AUX&gt;;</div><div class='add'>+			clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+				      "aclk_dbi", "pclk",</div><div class='add'>+				      "aux";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupts = &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie0_intc 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie0_intc 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie0_intc 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie0_intc 3&gt;;</div><div class='add'>+			linux,pci-domain = &lt;0&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-ib-windows = &lt;8&gt;;</div><div class='add'>+			num-viewport = &lt;8&gt;;</div><div class='add'>+			num-ob-windows = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			phys = &lt;&amp;combphy0_ps PHY_TYPE_PCIE&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_PHP&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x20100000 0x0 0x20100000 0x0 0x00100000</div><div class='add'>+				  0x02000000 0x0 0x20200000 0x0 0x20200000 0x0 0x00e00000</div><div class='add'>+				  0x03000000 0x9 0x00000000 0x9 0x00000000 0x0 0x80000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE0_POWER_UP&gt;, &lt;&amp;cru SRST_P_PCIE0&gt;;</div><div class='add'>+			reset-names = "pwr", "pipe";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie0_intc: legacy-interrupt-controller {</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 280 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@22400000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";</div><div class='add'>+			reg = &lt;0x0 0x22400000 0x0 0x00400000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a210000 0x0 0x00010000&gt;,</div><div class='add'>+			      &lt;0x0 0x21000000 0x0 0x00100000&gt;;</div><div class='add'>+			reg-names = "dbi", "apb", "config";</div><div class='add'>+			bus-range = &lt;0x20 0x2f&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_PCIE1_MST&gt;, &lt;&amp;cru ACLK_PCIE1_SLV&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_PCIE1_DBI&gt;, &lt;&amp;cru PCLK_PCIE1&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_PCIE1_AUX&gt;;</div><div class='add'>+			clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+				      "aclk_dbi", "pclk",</div><div class='add'>+				      "aux";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupts = &lt;GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie1_intc 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie1_intc 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie1_intc 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie1_intc 3&gt;;</div><div class='add'>+			linux,pci-domain = &lt;1&gt;;</div><div class='add'>+			max-link-speed = &lt;2&gt;;</div><div class='add'>+			num-ib-windows = &lt;8&gt;;</div><div class='add'>+			num-viewport = &lt;8&gt;;</div><div class='add'>+			num-ob-windows = &lt;2&gt;;</div><div class='add'>+			num-lanes = &lt;1&gt;;</div><div class='add'>+			phys = &lt;&amp;combphy1_psu PHY_TYPE_PCIE&gt;;</div><div class='add'>+			phy-names = "pcie-phy";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SUBPHP&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0 0x21100000 0x0 0x21100000 0x0 0x00100000</div><div class='add'>+				  0x02000000 0x0 0x21200000 0x0 0x21200000 0x0 0x00e00000</div><div class='add'>+				  0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE1_POWER_UP&gt;, &lt;&amp;cru SRST_P_PCIE1&gt;;</div><div class='add'>+			reset-names = "pwr", "pipe";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie1_intc: legacy-interrupt-controller {</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_drd0_dwc3: usb@23000000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dwc3", "snps,dwc3";</div><div class='add'>+			reg = &lt;0x0 0x23000000 0x0 0x400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_REF_USB3OTG0&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_SUSPEND_USB3OTG0&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_USB3OTG0&gt;;</div><div class='add'>+			clock-names = "ref_clk", "suspend_clk", "bus_clk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_USB&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_USB3OTG0&gt;;</div><div class='add'>+			dr_mode = "otg";</div><div class='add'>+			phys = &lt;&amp;u2phy0_otg&gt;, &lt;&amp;usbdp_phy PHY_TYPE_USB3&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+			snps,dis-del-phy-power-chg-quirk;</div><div class='add'>+			snps,dis-tx-ipgap-linecheck-quirk;</div><div class='add'>+			snps,parkmode-disable-hs-quirk;</div><div class='add'>+			snps,parkmode-disable-ss-quirk;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_drd1_dwc3: usb@23400000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dwc3", "snps,dwc3";</div><div class='add'>+			reg = &lt;0x0 0x23400000 0x0 0x400000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_REF_USB3OTG1&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_SUSPEND_USB3OTG1&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_USB3OTG1&gt;;</div><div class='add'>+			clock-names = "ref_clk", "suspend_clk", "bus_clk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_PHP&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_USB3OTG1&gt;;</div><div class='add'>+			dr_mode = "otg";</div><div class='add'>+			phys = &lt;&amp;u2phy1_otg&gt;, &lt;&amp;combphy1_psu PHY_TYPE_USB3&gt;;</div><div class='add'>+			phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+			phy_type = "utmi_wide";</div><div class='add'>+			snps,dis_enblslpm_quirk;</div><div class='add'>+			snps,dis-u1-entry-quirk;</div><div class='add'>+			snps,dis-u2-entry-quirk;</div><div class='add'>+			snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+			snps,dis-del-phy-power-chg-quirk;</div><div class='add'>+			snps,dis-tx-ipgap-linecheck-quirk;</div><div class='add'>+			snps,dis_rxdet_inp3_quirk;</div><div class='add'>+			snps,parkmode-disable-hs-quirk;</div><div class='add'>+			snps,parkmode-disable-ss-quirk;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sys_grf: syscon@2600a000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sys-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2600a000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bigcore_grf: syscon@2600c000 {</div><div class='add'>+			compatible = "rockchip,rk3576-bigcore-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2600c000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		litcore_grf: syscon@2600e000 {</div><div class='add'>+			compatible = "rockchip,rk3576-litcore-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2600e000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cci_grf: syscon@26010000 {</div><div class='add'>+			compatible = "rockchip,rk3576-cci-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26010000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu_grf: syscon@26016000 {</div><div class='add'>+			compatible = "rockchip,rk3576-gpu-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26016000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		npu_grf: syscon@26018000 {</div><div class='add'>+			compatible = "rockchip,rk3576-npu-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26018000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vo0_grf: syscon@2601a000 {</div><div class='add'>+			compatible = "rockchip,rk3576-vo0-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2601a000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_grf: syscon@2601e000 {</div><div class='add'>+			compatible = "rockchip,rk3576-usb-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2601e000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		php_grf: syscon@26020000 {</div><div class='add'>+			compatible = "rockchip,rk3576-php-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26020000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu0_grf: syscon@26024000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pmu0-grf", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x26024000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu1_grf: syscon@26026000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pmu1-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26026000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pipe_phy0_grf: syscon@26028000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pipe-phy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26028000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pipe_phy1_grf: syscon@2602a000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pipe-phy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2602a000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdpphy_grf: syscon@2602c000 {</div><div class='add'>+			compatible = "rockchip,rk3576-usbdpphy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x2602c000 0x0 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb2phy_grf: syscon@2602e000 {</div><div class='add'>+			compatible = "rockchip,rk3576-usb2phy-grf", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x2602e000 0x0 0x4000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			u2phy0: usb2-phy@0 {</div><div class='add'>+				compatible = "rockchip,rk3576-usb2phy";</div><div class='add'>+				reg = &lt;0x0 0x10&gt;;</div><div class='add'>+				resets = &lt;&amp;cru SRST_OTGPHY_0&gt;, &lt;&amp;cru SRST_P_USBPHY_GRF_0&gt;;</div><div class='add'>+				reset-names = "phy", "apb";</div><div class='add'>+				clocks = &lt;&amp;cru CLK_PHY_REF_SRC&gt;,</div><div class='add'>+					 &lt;&amp;cru ACLK_MMU2&gt;,</div><div class='add'>+					 &lt;&amp;cru ACLK_SLV_MMU2&gt;;</div><div class='add'>+				clock-names = "phyclk", "aclk", "aclk_slv";</div><div class='add'>+				clock-output-names = "usb480m_phy0";</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				u2phy0_otg: otg-port {</div><div class='add'>+					#phy-cells = &lt;0&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						     &lt;GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						     &lt;GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					interrupt-names = "otg-bvalid", "otg-id", "linestate";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			u2phy1: usb2-phy@2000 {</div><div class='add'>+				compatible = "rockchip,rk3576-usb2phy";</div><div class='add'>+				reg = &lt;0x2000 0x10&gt;;</div><div class='add'>+				resets = &lt;&amp;cru SRST_OTGPHY_1&gt;, &lt;&amp;cru SRST_P_USBPHY_GRF_1&gt;;</div><div class='add'>+				reset-names = "phy", "apb";</div><div class='add'>+				clocks = &lt;&amp;cru CLK_PHY_REF_SRC&gt;,</div><div class='add'>+					 &lt;&amp;cru ACLK_MMU1&gt;,</div><div class='add'>+					 &lt;&amp;cru ACLK_SLV_MMU1&gt;;</div><div class='add'>+				clock-names = "phyclk", "aclk", "aclk_slv";</div><div class='add'>+				clock-output-names = "usb480m_phy1";</div><div class='add'>+				#clock-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				u2phy1_otg: otg-port {</div><div class='add'>+					#phy-cells = &lt;0&gt;;</div><div class='add'>+					interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						     &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						     &lt;GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+					interrupt-names = "otg-bvalid", "otg-id", "linestate";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdptxphy_grf: syscon@26032000 {</div><div class='add'>+			compatible = "rockchip,rk3576-hdptxphy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26032000 0x0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mipidcphy_grf: syscon@26034000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dcphy-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26034000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_PMUPHY_ROOT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vo1_grf: syscon@26036000 {</div><div class='add'>+			compatible = "rockchip,rk3576-vo1-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26036000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_VO1_ROOT&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdgmac_grf: syscon@26038000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sdgmac-grf", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x26038000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ioc_grf: syscon@26040000 {</div><div class='add'>+			compatible = "rockchip,rk3576-ioc-grf", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x26040000 0x0 0xc000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cru: clock-controller@27200000 {</div><div class='add'>+			compatible = "rockchip,rk3576-cru";</div><div class='add'>+			reg = &lt;0x0 0x27200000 0x0 0x50000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			assigned-clocks =</div><div class='add'>+				&lt;&amp;cru CLK_AUDIO_FRAC_1_SRC&gt;,</div><div class='add'>+				&lt;&amp;cru PLL_GPLL&gt;, &lt;&amp;cru PLL_CPLL&gt;,</div><div class='add'>+				&lt;&amp;cru PLL_AUPLL&gt;, &lt;&amp;cru CLK_UART_FRAC_0&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_UART_FRAC_1&gt;, &lt;&amp;cru CLK_UART_FRAC_2&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_AUDIO_FRAC_0&gt;, &lt;&amp;cru CLK_AUDIO_FRAC_1&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_CPLL_DIV2&gt;, &lt;&amp;cru CLK_CPLL_DIV4&gt;,</div><div class='add'>+				&lt;&amp;cru CLK_CPLL_DIV10&gt;, &lt;&amp;cru FCLK_DDR_CM0_CORE&gt;,</div><div class='add'>+				&lt;&amp;cru ACLK_PHP_ROOT&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+			assigned-clock-rates =</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;1188000000&gt;, &lt;1000000000&gt;,</div><div class='add'>+				&lt;786432000&gt;, &lt;18432000&gt;,</div><div class='add'>+				&lt;96000000&gt;, &lt;128000000&gt;,</div><div class='add'>+				&lt;45158400&gt;, &lt;49152000&gt;,</div><div class='add'>+				&lt;500000000&gt;, &lt;250000000&gt;,</div><div class='add'>+				&lt;100000000&gt;, &lt;500000000&gt;,</div><div class='add'>+				&lt;250000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@27300000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x27300000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C0&gt;, &lt;&amp;cru PCLK_I2C0&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c0m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@27310000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x27310000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART1&gt;, &lt;&amp;cru PCLK_UART1&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 8&gt;, &lt;&amp;dmac0 9&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart1m0_xfer&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu: power-management@27380000 {</div><div class='add'>+			compatible = "rockchip,rk3576-pmu", "syscon", "simple-mfd";</div><div class='add'>+			reg = &lt;0x0 0x27380000 0x0 0x800&gt;;</div><div class='add'>+</div><div class='add'>+			power: power-controller {</div><div class='add'>+				compatible = "rockchip,rk3576-power-controller";</div><div class='add'>+				#power-domain-cells = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_NPU {</div><div class='add'>+					reg = &lt;RK3576_PD_NPU&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_NPUTOP {</div><div class='add'>+						reg = &lt;RK3576_PD_NPUTOP&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru ACLK_RKNN0&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_RKNN1&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_RKNN_CBUF&gt;,</div><div class='add'>+							 &lt;&amp;cru CLK_RKNN_DSU0&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_RKNN_CBUF&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_RKNN_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_NPU_CM0_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru PCLK_NPUTOP_ROOT&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_npu_mcu&gt;,</div><div class='add'>+							 &lt;&amp;qos_npu_nsp0&gt;,</div><div class='add'>+							 &lt;&amp;qos_npu_nsp1&gt;,</div><div class='add'>+							 &lt;&amp;qos_npu_m0ro&gt;,</div><div class='add'>+							 &lt;&amp;qos_npu_m1ro&gt;;</div><div class='add'>+						#power-domain-cells = &lt;1&gt;;</div><div class='add'>+						#address-cells = &lt;1&gt;;</div><div class='add'>+						#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+						power-domain@RK3576_PD_NPU0 {</div><div class='add'>+							reg = &lt;RK3576_PD_NPU0&gt;;</div><div class='add'>+							clocks = &lt;&amp;cru HCLK_RKNN_ROOT&gt;,</div><div class='add'>+								 &lt;&amp;cru ACLK_RKNN0&gt;;</div><div class='add'>+							pm_qos = &lt;&amp;qos_npu_m0&gt;;</div><div class='add'>+							#power-domain-cells = &lt;0&gt;;</div><div class='add'>+						};</div><div class='add'>+						power-domain@RK3576_PD_NPU1 {</div><div class='add'>+							reg = &lt;RK3576_PD_NPU1&gt;;</div><div class='add'>+							clocks = &lt;&amp;cru HCLK_RKNN_ROOT&gt;,</div><div class='add'>+								 &lt;&amp;cru ACLK_RKNN1&gt;;</div><div class='add'>+							pm_qos = &lt;&amp;qos_npu_m1&gt;;</div><div class='add'>+							#power-domain-cells = &lt;0&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_GPU {</div><div class='add'>+					reg = &lt;RK3576_PD_GPU&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru CLK_GPU&gt;, &lt;&amp;cru PCLK_GPU_ROOT&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_gpu&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_NVM {</div><div class='add'>+					reg = &lt;RK3576_PD_NVM&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_EMMC&gt;, &lt;&amp;cru HCLK_EMMC&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_emmc&gt;,</div><div class='add'>+						 &lt;&amp;qos_fspi0&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_SDGMAC {</div><div class='add'>+						reg = &lt;RK3576_PD_SDGMAC&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru ACLK_HSGPIO&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_GMAC0&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_GMAC1&gt;,</div><div class='add'>+							 &lt;&amp;cru CCLK_SRC_SDIO&gt;,</div><div class='add'>+							 &lt;&amp;cru CCLK_SRC_SDMMC0&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_HSGPIO&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_SDIO&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_SDMMC0&gt;,</div><div class='add'>+							 &lt;&amp;cru PCLK_SDGMAC_ROOT&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_fspi1&gt;,</div><div class='add'>+							 &lt;&amp;qos_gmac0&gt;,</div><div class='add'>+							 &lt;&amp;qos_gmac1&gt;,</div><div class='add'>+							 &lt;&amp;qos_sdio&gt;,</div><div class='add'>+							 &lt;&amp;qos_sdmmc&gt;,</div><div class='add'>+							 &lt;&amp;qos_flexbus&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_PHP {</div><div class='add'>+					reg = &lt;RK3576_PD_PHP&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_PHP_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru PCLK_PHP_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_MMU0&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_MMU1&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_mmu0&gt;,</div><div class='add'>+						 &lt;&amp;qos_mmu1&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_SUBPHP {</div><div class='add'>+						reg = &lt;RK3576_PD_SUBPHP&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_AUDIO {</div><div class='add'>+					reg = &lt;RK3576_PD_AUDIO&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_VEPU1 {</div><div class='add'>+					reg = &lt;RK3576_PD_VEPU1&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_VEPU1&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VEPU1&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_vepu1&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_VPU {</div><div class='add'>+					reg = &lt;RK3576_PD_VPU&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_EBC&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_EBC&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_JPEG&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_JPEG&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_RGA2E_0&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_RGA2E_0&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_RGA2E_1&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_RGA2E_1&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_VDPP&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VDPP&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_ebc&gt;,</div><div class='add'>+						 &lt;&amp;qos_jpeg&gt;,</div><div class='add'>+						 &lt;&amp;qos_rga0&gt;,</div><div class='add'>+						 &lt;&amp;qos_rga1&gt;,</div><div class='add'>+						 &lt;&amp;qos_vdpp&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_VDEC {</div><div class='add'>+					reg = &lt;RK3576_PD_VDEC&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_RKVDEC_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_RKVDEC&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_rkvdec&gt;;</div><div class='add'>+					#power-domain-cells = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_VI {</div><div class='add'>+					reg = &lt;RK3576_PD_VI&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_VICAP&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VICAP&gt;,</div><div class='add'>+						 &lt;&amp;cru DCLK_VICAP&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_VI_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VI_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru PCLK_VI_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru CLK_ISP_CORE&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_ISP&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_ISP&gt;,</div><div class='add'>+						 &lt;&amp;cru CLK_CORE_VPSS&gt;,</div><div class='add'>+						 &lt;&amp;cru ACLK_VPSS&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VPSS&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_isp_mro&gt;,</div><div class='add'>+						 &lt;&amp;qos_isp_mwo&gt;,</div><div class='add'>+						 &lt;&amp;qos_vicap_m0&gt;,</div><div class='add'>+						 &lt;&amp;qos_vpss_mro&gt;,</div><div class='add'>+						 &lt;&amp;qos_vpss_mwo&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_VEPU0 {</div><div class='add'>+						reg = &lt;RK3576_PD_VEPU0&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru ACLK_VEPU0&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_VEPU0&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_vepu0&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				power-domain@RK3576_PD_VOP {</div><div class='add'>+					reg = &lt;RK3576_PD_VOP&gt;;</div><div class='add'>+					clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VOP&gt;,</div><div class='add'>+						 &lt;&amp;cru HCLK_VOP_ROOT&gt;,</div><div class='add'>+						 &lt;&amp;cru PCLK_VOP_ROOT&gt;;</div><div class='add'>+					pm_qos = &lt;&amp;qos_vop_m0&gt;,</div><div class='add'>+						 &lt;&amp;qos_vop_m1ro&gt;;</div><div class='add'>+					#power-domain-cells = &lt;1&gt;;</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_USB {</div><div class='add'>+						reg = &lt;RK3576_PD_USB&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru PCLK_PHP_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_USB_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_MMU2&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_SLV_MMU2&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_UFS_SYS&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_mmu2&gt;,</div><div class='add'>+							 &lt;&amp;qos_ufshc&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_VO0 {</div><div class='add'>+						reg = &lt;RK3576_PD_VO0&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru ACLK_HDCP0&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_HDCP0&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_VO0_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru PCLK_VO0_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_VOP_ROOT&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_hdcp0&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					power-domain@RK3576_PD_VO1 {</div><div class='add'>+						reg = &lt;RK3576_PD_VO1&gt;;</div><div class='add'>+						clocks = &lt;&amp;cru ACLK_HDCP1&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_HDCP1&gt;,</div><div class='add'>+							 &lt;&amp;cru ACLK_VO1_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru PCLK_VO1_ROOT&gt;,</div><div class='add'>+							 &lt;&amp;cru HCLK_VOP_ROOT&gt;;</div><div class='add'>+						pm_qos = &lt;&amp;qos_hdcp1&gt;;</div><div class='add'>+						#power-domain-cells = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpu: gpu@27800000 {</div><div class='add'>+			compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";</div><div class='add'>+			reg = &lt;0x0 0x27800000 0x0 0x200000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_GPU&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;198000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GPU&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			dynamic-power-coefficient = &lt;1625&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "job", "mmu", "gpu";</div><div class='add'>+			operating-points-v2 = &lt;&amp;gpu_opp_table&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_GPU&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vop: vop@27d00000 {</div><div class='add'>+			compatible = "rockchip,rk3576-vop";</div><div class='add'>+			reg = &lt;0x0 0x27d00000 0x0 0x3000&gt;, &lt;0x0 0x27d05000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "vop", "gamma-lut";</div><div class='add'>+			interrupts = &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "sys",</div><div class='add'>+					  "vp0",</div><div class='add'>+					  "vp1",</div><div class='add'>+					  "vp2";</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='add'>+				 &lt;&amp;cru HCLK_VOP&gt;,</div><div class='add'>+				 &lt;&amp;cru DCLK_VP0&gt;,</div><div class='add'>+				 &lt;&amp;cru DCLK_VP1&gt;,</div><div class='add'>+				 &lt;&amp;cru DCLK_VP2&gt;,</div><div class='add'>+				 &lt;&amp;hdptxphy&gt;;</div><div class='add'>+			clock-names = "aclk",</div><div class='add'>+				      "hclk",</div><div class='add'>+				      "dclk_vp0",</div><div class='add'>+				      "dclk_vp1",</div><div class='add'>+				      "dclk_vp2",</div><div class='add'>+				      "pll_hdmiphy0";</div><div class='add'>+			iommus = &lt;&amp;vop_mmu&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VOP&gt;;</div><div class='add'>+			rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='add'>+			rockchip,pmu = &lt;&amp;pmu&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			vop_out: ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				vp0: port@0 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vp1: port@1 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				vp2: port@2 {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vop_mmu: iommu@27d07e00 {</div><div class='add'>+			compatible = "rockchip,rk3576-iommu", "rockchip,rk3568-iommu";</div><div class='add'>+			reg = &lt;0x0 0x27d07e00 0x0 0x100&gt;, &lt;0x0 0x27d07f00 0x0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_VOP&gt;, &lt;&amp;cru HCLK_VOP&gt;;</div><div class='add'>+			clock-names = "aclk", "iface";</div><div class='add'>+			#iommu-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VOP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai5: sai@27d40000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x27d40000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI5_8CH&gt;, &lt;&amp;cru HCLK_SAI5_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 3&gt;;</div><div class='add'>+			dma-names = "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI5_8CH&gt;, &lt;&amp;cru SRST_H_SAI5_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			rockchip,sai-rx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI5";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai6: sai@27d50000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x27d50000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI6_8CH&gt;, &lt;&amp;cru HCLK_SAI6_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 4&gt;, &lt;&amp;dmac2 5&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI6_8CH&gt;, &lt;&amp;cru SRST_H_SAI6_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			rockchip,sai-rx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			rockchip,sai-tx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI6";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dsi: dsi@27d80000 {</div><div class='add'>+			compatible = "rockchip,rk3576-mipi-dsi2";</div><div class='add'>+			reg = &lt;0x0 0x27d80000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_DSIHOST0&gt;, &lt;&amp;cru CLK_DSIHOST0&gt;;</div><div class='add'>+			clock-names = "pclk", "sys";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_DSIHOST0&gt;;</div><div class='add'>+			reset-names = "apb";</div><div class='add'>+			phys = &lt;&amp;mipidcphy PHY_TYPE_DPHY&gt;;</div><div class='add'>+			phy-names = "dcphy";</div><div class='add'>+			rockchip,grf = &lt;&amp;vo0_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dsi_in: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				dsi_out: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdmi: hdmi@27da0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dw-hdmi-qp";</div><div class='add'>+			reg = &lt;0x0 0x27da0000 0x0 0x20000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_HDMITX0&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_HDMITX0_EARC&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_HDMITX0_REF&gt;,</div><div class='add'>+				 &lt;&amp;cru MCLK_SAI6_8CH&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_HDMITXHDP&gt;,</div><div class='add'>+				 &lt;&amp;cru HCLK_VO0_ROOT&gt;;</div><div class='add'>+			clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1";</div><div class='add'>+			interrupts = &lt;GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "avp", "cec", "earc", "main", "hpd";</div><div class='add'>+			phys = &lt;&amp;hdptxphy&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;hdmi_txm0_pins &amp;hdmi_tx_scl &amp;hdmi_tx_sda&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_HDMITX0_REF&gt;, &lt;&amp;cru SRST_HDMITXHDP&gt;;</div><div class='add'>+			reset-names = "ref", "hdp";</div><div class='add'>+			rockchip,grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+			rockchip,vo-grf = &lt;&amp;vo0_grf&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_in: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				hdmi_out: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai7: sai@27ed0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x27ed0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI7_8CH&gt;, &lt;&amp;cru HCLK_SAI7_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 19&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO1&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI7_8CH&gt;, &lt;&amp;cru SRST_H_SAI7_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			rockchip,sai-tx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI7";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai8: sai@27ee0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x27ee0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI8_8CH&gt;, &lt;&amp;cru HCLK_SAI8_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 7&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO1&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI8_8CH&gt;, &lt;&amp;cru SRST_H_SAI8_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			rockchip,sai-tx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI8";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai9: sai@27ef0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x27ef0000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI9_8CH&gt;, &lt;&amp;cru HCLK_SAI9_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 26&gt;;</div><div class='add'>+			dma-names = "tx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_VO1&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI9_8CH&gt;, &lt;&amp;cru SRST_H_SAI9_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			rockchip,sai-tx-route = &lt;0 1 2 3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI9";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_hdcp1: qos@27f02000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f02000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_fspi1: qos@27f04000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gmac0: qos@27f04080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gmac1: qos@27f04100 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdio: qos@27f04180 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04180 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_sdmmc: qos@27f04200 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_flexbus: qos@27f04280 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f04280 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_gpu: qos@27f05000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f05000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vepu1: qos@27f06000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f06000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_mcu: qos@27f08000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f08000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_nsp0: qos@27f08080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f08080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_nsp1: qos@27f08100 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f08100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_emmc: qos@27f09000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f09000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_fspi0: qos@27f09080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f09080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_mmu0: qos@27f0a000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0a000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_mmu1: qos@27f0a080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0a080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rkvdec: qos@27f0c000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0c000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_crypto: qos@27f0d000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0d000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_mmu2: qos@27f0e000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0e000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_ufshc: qos@27f0e080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0e080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vepu0: qos@27f0f000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f0f000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_isp_mro: qos@27f10000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f10000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_isp_mwo: qos@27f10080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f10080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vicap_m0: qos@27f10100 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f10100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vpss_mro: qos@27f10180 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f10180 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vpss_mwo: qos@27f10200 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f10200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_hdcp0: qos@27f11000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f11000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vop_m0: qos@27f12800 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f12800 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vop_m1ro: qos@27f12880 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f12880 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_ebc: qos@27f13000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f13000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga0: qos@27f13080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f13080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_rga1: qos@27f13100 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f13100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_jpeg: qos@27f13180 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f13180 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_vdpp: qos@27f13200 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f13200 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_m0: qos@27f20000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f20000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_m1: qos@27f21000 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f21000 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_m0ro: qos@27f22080 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f22080 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qos_npu_m1ro: qos@27f22100 {</div><div class='add'>+			compatible = "rockchip,rk3576-qos", "syscon";</div><div class='add'>+			reg = &lt;0x0 0x27f22100 0x0 0x20&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@2a220000 {</div><div class='add'>+			compatible = "rockchip,rk3576-gmac", "snps,dwmac-4.20a";</div><div class='add'>+			reg = &lt;0x0 0x2a220000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GMAC0_125M_SRC&gt;, &lt;&amp;cru CLK_GMAC0_RMII_CRU&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_GMAC0&gt;, &lt;&amp;cru ACLK_GMAC0&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_GMAC0_PTP_REF&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "clk_mac_ref",</div><div class='add'>+				      "pclk_mac", "aclk_mac",</div><div class='add'>+				      "ptp_ref";</div><div class='add'>+			interrupts = &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SDGMAC&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_GMAC0&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			rockchip,grf = &lt;&amp;sdgmac_grf&gt;;</div><div class='add'>+			rockchip,php-grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac0_stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac0_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac0_mtl_tx_setup&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;0x1&gt;;</div><div class='add'>+				#size-cells = &lt;0x0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;8&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1: ethernet@2a230000 {</div><div class='add'>+			compatible = "rockchip,rk3576-gmac", "snps,dwmac-4.20a";</div><div class='add'>+			reg = &lt;0x0 0x2a230000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_GMAC1_125M_SRC&gt;, &lt;&amp;cru CLK_GMAC1_RMII_CRU&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_GMAC1&gt;, &lt;&amp;cru ACLK_GMAC1&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_GMAC1_PTP_REF&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "clk_mac_ref",</div><div class='add'>+				      "pclk_mac", "aclk_mac",</div><div class='add'>+				      "ptp_ref";</div><div class='add'>+			interrupts = &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SDGMAC&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_GMAC1&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			rockchip,grf = &lt;&amp;sdgmac_grf&gt;;</div><div class='add'>+			rockchip,php-grf = &lt;&amp;ioc_grf&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac1_stmmac_axi_setup&gt;;</div><div class='add'>+			snps,mixed-burst;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac1_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac1_mtl_tx_setup&gt;;</div><div class='add'>+			snps,tso;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;0x1&gt;;</div><div class='add'>+				#size-cells = &lt;0x0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;8&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac1_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata0: sata@2a240000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dwc-ahci", "snps,dwc-ahci";</div><div class='add'>+			reg = &lt;0x0 0x2a240000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_SATA0&gt;, &lt;&amp;cru CLK_PMALIVE0&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_RXOOB0&gt;;</div><div class='add'>+			clock-names = "sata", "pmalive", "rxoob";</div><div class='add'>+			interrupts = &lt;GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SUBPHP&gt;;</div><div class='add'>+			phys = &lt;&amp;combphy0_ps PHY_TYPE_SATA&gt;;</div><div class='add'>+			phy-names = "sata-phy";</div><div class='add'>+			ports-implemented = &lt;0x1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sata1: sata@2a250000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dwc-ahci", "snps,dwc-ahci";</div><div class='add'>+			reg = &lt;0x0 0x2a250000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_SATA1&gt;, &lt;&amp;cru CLK_PMALIVE1&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_RXOOB1&gt;;</div><div class='add'>+			clock-names = "sata", "pmalive", "rxoob";</div><div class='add'>+			interrupts = &lt;GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SUBPHP&gt;;</div><div class='add'>+			phys = &lt;&amp;combphy1_psu PHY_TYPE_SATA&gt;;</div><div class='add'>+			phy-names = "sata-phy";</div><div class='add'>+			ports-implemented = &lt;0x1&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ufshc: ufshc@2a2d0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-ufshc";</div><div class='add'>+			reg = &lt;0x0 0x2a2d0000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x2b040000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x2601f000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x2603c000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a2e0000 0x0 0x10000&gt;;</div><div class='add'>+			reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb";</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_UFS_SYS&gt;, &lt;&amp;cru PCLK_USB_ROOT&gt;, &lt;&amp;cru PCLK_MPHY&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_REF_UFS_CLKOUT&gt;;</div><div class='add'>+			clock-names = "core", "pclk", "pclk_mphy", "ref_out";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_REF_OSC_MPHY&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;cru CLK_REF_MPHY_26M&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_USB&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;ufs_refclk&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			resets = &lt;&amp;cru SRST_A_UFS_BIU&gt;, &lt;&amp;cru SRST_A_UFS_SYS&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_A_UFS&gt;, &lt;&amp;cru SRST_P_UFS_GRF&gt;;</div><div class='add'>+			reset-names = "biu", "sys", "ufs", "grf";</div><div class='add'>+			reset-gpios = &lt;&amp;gpio4 RK_PD0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sfc1: spi@2a300000 {</div><div class='add'>+			compatible = "rockchip,sfc";</div><div class='add'>+			reg = &lt;0x0 0x2a300000 0x0 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_FSPI1_X2&gt;, &lt;&amp;cru HCLK_FSPI1&gt;;</div><div class='add'>+			clock-names = "clk_sfc", "hclk_sfc";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SDGMAC&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdmmc: mmc@2a310000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0x2a310000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDMMC0&gt;, &lt;&amp;cru CCLK_SRC_SDMMC0&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdmmc0_clk &amp;sdmmc0_cmd &amp;sdmmc0_det &amp;sdmmc0_bus4 &amp;sdmmc0_pwren&gt;;</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SDGMAC&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDMMC0&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdio: mmc@2a320000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dw-mshc";</div><div class='add'>+			reg = &lt;0x0 0x2a320000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_SDIO&gt;, &lt;&amp;cru CCLK_SRC_SDIO&gt;;</div><div class='add'>+			clock-names = "biu", "ciu";</div><div class='add'>+			fifo-depth = &lt;0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;sdmmc1m0_clk &amp;sdmmc1m0_cmd &amp;sdmmc1m0_bus4&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_SDGMAC&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_SDIO&gt;;</div><div class='add'>+			reset-names = "reset";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci: mmc@2a330000 {</div><div class='add'>+			compatible = "rockchip,rk3576-dwcmshc", "rockchip,rk3588-dwcmshc";</div><div class='add'>+			reg = &lt;0x0 0x2a330000 0x0 0x10000&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;cru BCLK_EMMC&gt;, &lt;&amp;cru TCLK_EMMC&gt;, &lt;&amp;cru CCLK_SRC_EMMC&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;200000000&gt;, &lt;24000000&gt;, &lt;200000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CCLK_SRC_EMMC&gt;, &lt;&amp;cru HCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru ACLK_EMMC&gt;, &lt;&amp;cru BCLK_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru TCLK_EMMC&gt;;</div><div class='add'>+			clock-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			interrupts = &lt;GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;emmc_rstnout&gt;, &lt;&amp;emmc_bus8&gt;, &lt;&amp;emmc_clk&gt;,</div><div class='add'>+				    &lt;&amp;emmc_cmd&gt;, &lt;&amp;emmc_strb&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_NVM&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_C_EMMC&gt;, &lt;&amp;cru SRST_H_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_A_EMMC&gt;, &lt;&amp;cru SRST_B_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_T_EMMC&gt;;</div><div class='add'>+			reset-names = "core", "bus", "axi", "block", "timer";</div><div class='add'>+			supports-cqe;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sfc0: spi@2a340000 {</div><div class='add'>+			compatible = "rockchip,sfc";</div><div class='add'>+			reg = &lt;0x0 0x2a340000 0x0 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_FSPI_X2&gt;, &lt;&amp;cru HCLK_FSPI&gt;;</div><div class='add'>+			clock-names = "clk_sfc", "hclk_sfc";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_NVM&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rng: rng@2a410000 {</div><div class='add'>+			compatible = "rockchip,rk3576-rng";</div><div class='add'>+			reg = &lt;0x0 0x2a410000 0x0 0x200&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru HCLK_TRNG_NS&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_H_TRNG_NS&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		otp: otp@2a580000 {</div><div class='add'>+			compatible = "rockchip,rk3576-otp";</div><div class='add'>+			reg = &lt;0x0 0x2a580000 0x0 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_OTPC_NS&gt;, &lt;&amp;cru PCLK_OTPC_NS&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_OTP_PHY_G&gt;;</div><div class='add'>+			clock-names = "otp", "apb_pclk", "phy";</div><div class='add'>+			resets = &lt;&amp;cru SRST_OTPC_NS&gt;, &lt;&amp;cru SRST_P_OTPC_NS&gt;;</div><div class='add'>+			reset-names = "otp", "apb";</div><div class='add'>+</div><div class='add'>+			/* Data cells */</div><div class='add'>+			cpu_code: cpu-code@2 {</div><div class='add'>+				reg = &lt;0x02 0x2&gt;;</div><div class='add'>+			};</div><div class='add'>+			otp_cpu_version: cpu-version@5 {</div><div class='add'>+				reg = &lt;0x05 0x1&gt;;</div><div class='add'>+				bits = &lt;3 3&gt;;</div><div class='add'>+			};</div><div class='add'>+			otp_id: id@a {</div><div class='add'>+				reg = &lt;0x0a 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+			cpub_leakage: cpub-leakage@1e {</div><div class='add'>+				reg = &lt;0x1e 0x1&gt;;</div><div class='add'>+			};</div><div class='add'>+			cpul_leakage: cpul-leakage@1f {</div><div class='add'>+				reg = &lt;0x1f 0x1&gt;;</div><div class='add'>+			};</div><div class='add'>+			npu_leakage: npu-leakage@20 {</div><div class='add'>+				reg = &lt;0x20 0x1&gt;;</div><div class='add'>+			};</div><div class='add'>+			gpu_leakage: gpu-leakage@21 {</div><div class='add'>+				reg = &lt;0x21 0x1&gt;;</div><div class='add'>+			};</div><div class='add'>+			log_leakage: log-leakage@22 {</div><div class='add'>+				reg = &lt;0x22 0x1&gt;;</div><div class='add'>+			};</div><div class='add'>+			bigcore_tsadc_trim: bigcore-tsadc-trim@24 {</div><div class='add'>+				reg = &lt;0x24 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			litcore_tsadc_trim: litcore-tsadc-trim@26 {</div><div class='add'>+				reg = &lt;0x26 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			ddr_tsadc_trim: ddr-tsadc-trim@28 {</div><div class='add'>+				reg = &lt;0x28 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			npu_tsadc_trim: npu-tsadc-trim@2a {</div><div class='add'>+				reg = &lt;0x2a 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			gpu_tsadc_trim: gpu-tsadc-trim@2c {</div><div class='add'>+				reg = &lt;0x2c 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+			soc_tsadc_trim: soc-tsadc-trim@64 {</div><div class='add'>+				reg = &lt;0x64 0x2&gt;;</div><div class='add'>+				bits = &lt;0 10&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai0: sai@2a600000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x2a600000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI0_8CH&gt;, &lt;&amp;cru HCLK_SAI0_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 0&gt;, &lt;&amp;dmac0 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI0_8CH&gt;, &lt;&amp;cru SRST_H_SAI0_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sai0m0_lrck</div><div class='add'>+				&amp;sai0m0_sclk</div><div class='add'>+				&amp;sai0m0_sdi0</div><div class='add'>+				&amp;sai0m0_sdi1</div><div class='add'>+				&amp;sai0m0_sdi2</div><div class='add'>+				&amp;sai0m0_sdi3</div><div class='add'>+				&amp;sai0m0_sdo0</div><div class='add'>+				&amp;sai0m0_sdo1</div><div class='add'>+				&amp;sai0m0_sdo2</div><div class='add'>+				&amp;sai0m0_sdo3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai1: sai@2a610000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x2a610000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI1_8CH&gt;, &lt;&amp;cru HCLK_SAI1_8CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 2&gt;, &lt;&amp;dmac0 3&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI1_8CH&gt;, &lt;&amp;cru SRST_H_SAI1_8CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sai1m0_lrck</div><div class='add'>+				&amp;sai1m0_sclk</div><div class='add'>+				&amp;sai1m0_sdi0</div><div class='add'>+				&amp;sai1m0_sdo0</div><div class='add'>+				&amp;sai1m0_sdo1</div><div class='add'>+				&amp;sai1m0_sdo2</div><div class='add'>+				&amp;sai1m0_sdo3&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI1";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai2: sai@2a620000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x2a620000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI2_2CH&gt;, &lt;&amp;cru HCLK_SAI2_2CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 0&gt;, &lt;&amp;dmac1 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI2_2CH&gt;, &lt;&amp;cru SRST_H_SAI2_2CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sai2m0_lrck</div><div class='add'>+				&amp;sai2m0_sclk</div><div class='add'>+				&amp;sai2m0_sdi</div><div class='add'>+				&amp;sai2m0_sdo&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI2";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai3: sai@2a630000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x2a630000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI3_2CH&gt;, &lt;&amp;cru HCLK_SAI3_2CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 2&gt;, &lt;&amp;dmac1 3&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI3_2CH&gt;, &lt;&amp;cru SRST_H_SAI3_2CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sai3m0_lrck</div><div class='add'>+				&amp;sai3m0_sclk</div><div class='add'>+				&amp;sai3m0_sdi</div><div class='add'>+				&amp;sai3m0_sdo&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI3";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sai4: sai@2a640000 {</div><div class='add'>+			compatible = "rockchip,rk3576-sai";</div><div class='add'>+			reg = &lt;0x0 0x2a640000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru MCLK_SAI4_2CH&gt;, &lt;&amp;cru HCLK_SAI4_2CH&gt;;</div><div class='add'>+			clock-names = "mclk", "hclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 0&gt;, &lt;&amp;dmac2 1&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_SAI4_2CH&gt;, &lt;&amp;cru SRST_H_SAI4_2CH&gt;;</div><div class='add'>+			reset-names = "m", "h";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sai4m0_lrck</div><div class='add'>+				&amp;sai4m0_sclk</div><div class='add'>+				&amp;sai4m0_sdi</div><div class='add'>+				&amp;sai4m0_sdo&gt;;</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			sound-name-prefix = "SAI4";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@2a701000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x0 0x2a701000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a702000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a704000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x2a706000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac0: dma-controller@2ab90000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x2ab90000 0x0 0x4000&gt;;</div><div class='add'>+			arm,pl330-periph-burst;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_DMAC0&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac1: dma-controller@2abb0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x2abb0000 0x0 0x4000&gt;;</div><div class='add'>+			arm,pl330-periph-burst;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_DMAC1&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac2: dma-controller@2abd0000 {</div><div class='add'>+			compatible = "arm,pl330", "arm,primecell";</div><div class='add'>+			reg = &lt;0x0 0x2abd0000 0x0 0x4000&gt;;</div><div class='add'>+			arm,pl330-periph-burst;</div><div class='add'>+			clocks = &lt;&amp;cru ACLK_DMAC2&gt;;</div><div class='add'>+			clock-names = "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@2ac40000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac40000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C1&gt;, &lt;&amp;cru PCLK_I2C1&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@2ac50000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac50000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C2&gt;, &lt;&amp;cru PCLK_I2C2&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c2m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@2ac60000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac60000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C3&gt;, &lt;&amp;cru PCLK_I2C3&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@2ac70000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac70000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C4&gt;, &lt;&amp;cru PCLK_I2C4&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c4m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c5: i2c@2ac80000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac80000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C5&gt;, &lt;&amp;cru PCLK_I2C5&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c5m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c6: i2c@2ac90000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ac90000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C6&gt;, &lt;&amp;cru PCLK_I2C6&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c7: i2c@2aca0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2aca0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C7&gt;, &lt;&amp;cru PCLK_I2C7&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c7m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c8: i2c@2acb0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2acb0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C8&gt;, &lt;&amp;cru PCLK_I2C8&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c8m0_xfer&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer0: timer@2acc0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-timer", "rockchip,rk3288-timer";</div><div class='add'>+			reg = &lt;0x0 0x2acc0000 0x0 0x20&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_BUSTIMER0&gt;, &lt;&amp;cru CLK_TIMER0&gt;;</div><div class='add'>+			clock-names = "pclk", "timer";</div><div class='add'>+			interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wdt: watchdog@2ace0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-wdt", "snps,dw-wdt";</div><div class='add'>+			reg = &lt;0x0 0x2ace0000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru TCLK_WDT0&gt;, &lt;&amp;cru PCLK_WDT0&gt;;</div><div class='add'>+			clock-names = "tclk", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@2acf0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0x2acf0000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI0&gt;, &lt;&amp;cru PCLK_SPI0&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 14&gt;, &lt;&amp;dmac0 15&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi0m0_csn0 &amp;spi0m0_csn1 &amp;spi0m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@2ad00000 {</div><div class='add'>+			compatible = "rockchip,rk3576-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0x2ad00000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI1&gt;, &lt;&amp;cru PCLK_SPI1&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 16&gt;, &lt;&amp;dmac0 17&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi1m0_csn0 &amp;spi1m0_csn1 &amp;spi1m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@2ad10000 {</div><div class='add'>+			compatible = "rockchip,rk3576-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0x2ad10000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI2&gt;, &lt;&amp;cru PCLK_SPI2&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 15&gt;, &lt;&amp;dmac1 16&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi2m0_csn0 &amp;spi2m0_csn1 &amp;spi2m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi3: spi@2ad20000 {</div><div class='add'>+			compatible = "rockchip,rk3576-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0x2ad20000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI3&gt;, &lt;&amp;cru PCLK_SPI3&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 17&gt;, &lt;&amp;dmac1 18&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi3m0_csn0 &amp;spi3m0_csn1 &amp;spi3m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi4: spi@2ad30000 {</div><div class='add'>+			compatible = "rockchip,rk3576-spi", "rockchip,rk3066-spi";</div><div class='add'>+			reg = &lt;0x0 0x2ad30000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SPI4&gt;, &lt;&amp;cru PCLK_SPI4&gt;;</div><div class='add'>+			clock-names = "spiclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 12&gt;, &lt;&amp;dmac2 13&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;spi4m0_csn0 &amp;spi4m0_csn1 &amp;spi4m0_pins&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@2ad40000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad40000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART0&gt;, &lt;&amp;cru PCLK_UART0&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 6&gt;, &lt;&amp;dmac0 7&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart0m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@2ad50000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad50000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART2&gt;, &lt;&amp;cru PCLK_UART2&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 10&gt;, &lt;&amp;dmac0 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@2ad60000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad60000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART3&gt;, &lt;&amp;cru PCLK_UART3&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac0 12&gt;, &lt;&amp;dmac0 13&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart3m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@2ad70000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad70000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART4&gt;, &lt;&amp;cru PCLK_UART4&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 9&gt;, &lt;&amp;dmac1 10&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart4m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart5: serial@2ad80000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad80000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART5&gt;, &lt;&amp;cru PCLK_UART5&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 11&gt;, &lt;&amp;dmac1 12&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart5m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart6: serial@2ad90000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ad90000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART6&gt;, &lt;&amp;cru PCLK_UART6&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac1 13&gt;, &lt;&amp;dmac1 14&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart6m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart7: serial@2ada0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2ada0000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART7&gt;, &lt;&amp;cru PCLK_UART7&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 6&gt;, &lt;&amp;dmac2 7&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart7m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart8: serial@2adb0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2adb0000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART8&gt;, &lt;&amp;cru PCLK_UART8&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 8&gt;, &lt;&amp;dmac2 9&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart8m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart9: serial@2adc0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2adc0000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART9&gt;, &lt;&amp;cru PCLK_UART9&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 10&gt;, &lt;&amp;dmac2 11&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart9m0_xfer&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		saradc: adc@2ae00000 {</div><div class='add'>+			compatible = "rockchip,rk3576-saradc", "rockchip,rk3588-saradc";</div><div class='add'>+			reg = &lt;0x0 0x2ae00000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_SARADC&gt;, &lt;&amp;cru PCLK_SARADC&gt;;</div><div class='add'>+			clock-names = "saradc", "apb_pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_SARADC&gt;;</div><div class='add'>+			reset-names = "saradc-apb";</div><div class='add'>+			#io-channel-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tsadc: tsadc@2ae70000 {</div><div class='add'>+			compatible = "rockchip,rk3576-tsadc";</div><div class='add'>+			reg = &lt;0x0 0x2ae70000 0x0 0x400&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_TSADC&gt;, &lt;&amp;cru PCLK_TSADC&gt;;</div><div class='add'>+			clock-names = "tsadc", "apb_pclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_TSADC&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;2000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_TSADC&gt;, &lt;&amp;cru SRST_TSADC&gt;;</div><div class='add'>+			reset-names = "tsadc-apb", "tsadc";</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+			rockchip,hw-tshut-temp = &lt;120000&gt;;</div><div class='add'>+			rockchip,hw-tshut-mode = &lt;0&gt;; /* tshut mode 0:CRU 1:GPIO */</div><div class='add'>+			rockchip,hw-tshut-polarity = &lt;0&gt;; /* tshut polarity 0:LOW 1:HIGH */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			sensor@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;soc_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+			sensor@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;bigcore_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+			sensor@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;litcore_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+			sensor@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;ddr_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+			sensor@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;npu_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+			sensor@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				nvmem-cells = &lt;&amp;gpu_tsadc_trim&gt;;</div><div class='add'>+				nvmem-cell-names = "trim";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c9: i2c@2ae80000 {</div><div class='add'>+			compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";</div><div class='add'>+			reg = &lt;0x0 0x2ae80000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_I2C9&gt;, &lt;&amp;cru PCLK_I2C9&gt;;</div><div class='add'>+			clock-names = "i2c", "pclk";</div><div class='add'>+			interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;i2c9m0_xfer&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_I2C9&gt;, &lt;&amp;cru SRST_P_I2C9&gt;;</div><div class='add'>+			reset-names = "i2c", "apb";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart10: serial@2afc0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2afc0000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART10&gt;, &lt;&amp;cru PCLK_UART10&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 21&gt;, &lt;&amp;dmac2 22&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart10m0_xfer&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart11: serial@2afd0000 {</div><div class='add'>+			compatible = "rockchip,rk3576-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x2afd0000 0x0 0x100&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru SCLK_UART11&gt;, &lt;&amp;cru PCLK_UART11&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			dmas = &lt;&amp;dmac2 23&gt;, &lt;&amp;dmac2 24&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;uart11m0_xfer&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mipidcphy: phy@2b020000 {</div><div class='add'>+			compatible = "rockchip,rk3576-mipi-dcphy";</div><div class='add'>+			reg = &lt;0x0 0x2b020000 0x0 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru PCLK_MIPI_DCPHY&gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_PHY_REF_SRC&gt;;</div><div class='add'>+			clock-names = "pclk", "ref";</div><div class='add'>+			resets = &lt;&amp;cru SRST_M_MIPI_DCPHY&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_MIPI_DCPHY&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_DCPHY_GRF&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_S_MIPI_DCPHY&gt;;</div><div class='add'>+			reset-names = "m_phy", "apb", "grf", "s_phy";</div><div class='add'>+			rockchip,grf = &lt;&amp;mipidcphy_grf&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		combphy0_ps: phy@2b050000 {</div><div class='add'>+			compatible = "rockchip,rk3576-naneng-combphy";</div><div class='add'>+			reg = &lt;0x0 0x2b050000 0x0 0x100&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_REF_PCIE0_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PCIE2_COMBOPHY0&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PCIE0&gt;;</div><div class='add'>+			clock-names = "ref", "apb", "pipe";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_REF_PCIE0_PHY&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE0_PIPE_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_PCIE2_COMBOPHY0&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='add'>+			rockchip,pipe-grf = &lt;&amp;php_grf&gt;;</div><div class='add'>+			rockchip,pipe-phy-grf = &lt;&amp;pipe_phy0_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		combphy1_psu: phy@2b060000 {</div><div class='add'>+			compatible = "rockchip,rk3576-naneng-combphy";</div><div class='add'>+			reg = &lt;0x0 0x2b060000 0x0 0x100&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_REF_PCIE1_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PCIE2_COMBOPHY1&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_PCIE1&gt;;</div><div class='add'>+			clock-names = "ref", "apb", "pipe";</div><div class='add'>+			assigned-clocks = &lt;&amp;cru CLK_REF_PCIE1_PHY&gt;;</div><div class='add'>+			assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_PCIE1_PIPE_PHY&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_PCIE2_COMBOPHY1&gt;;</div><div class='add'>+			reset-names = "phy", "apb";</div><div class='add'>+			rockchip,pipe-grf = &lt;&amp;php_grf&gt;;</div><div class='add'>+			rockchip,pipe-phy-grf = &lt;&amp;pipe_phy1_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy: phy@2b010000 {</div><div class='add'>+			compatible = "rockchip,rk3576-usbdp-phy";</div><div class='add'>+			reg = &lt;0x0 0x2b010000 0x0 0x10000&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PHY_REF_SRC &gt;,</div><div class='add'>+				 &lt;&amp;cru CLK_USBDP_COMBO_PHY_IMMORTAL&gt;,</div><div class='add'>+				 &lt;&amp;cru PCLK_USBDPPHY&gt;,</div><div class='add'>+				 &lt;&amp;u2phy0&gt;;</div><div class='add'>+			clock-names = "refclk", "immortal", "pclk", "utmi";</div><div class='add'>+			resets = &lt;&amp;cru SRST_USBDP_COMBO_PHY_INIT&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_USBDP_COMBO_PHY_CMN&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_USBDP_COMBO_PHY_LANE&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_USBDP_COMBO_PHY_PCS&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_P_USBDPPHY&gt;;</div><div class='add'>+			reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";</div><div class='add'>+			rockchip,u2phy-grf = &lt;&amp;usb2phy_grf&gt;;</div><div class='add'>+			rockchip,usb-grf = &lt;&amp;usb_grf&gt;;</div><div class='add'>+			rockchip,usbdpphy-grf = &lt;&amp;usbdpphy_grf&gt;;</div><div class='add'>+			rockchip,vo-grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hdptxphy: hdmiphy@2b000000 {</div><div class='add'>+			compatible = "rockchip,rk3576-hdptx-phy", "rockchip,rk3588-hdptx-phy";</div><div class='add'>+			reg = &lt;0x0 0x2b000000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;cru CLK_PHY_REF_SRC&gt;, &lt;&amp;cru PCLK_HDPTX_APB&gt;;</div><div class='add'>+			clock-names = "ref", "apb";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;cru SRST_P_HDPTX_APB&gt;, &lt;&amp;cru SRST_HDPTX_INIT&gt;,</div><div class='add'>+				 &lt;&amp;cru SRST_HDPTX_CMN&gt;, &lt;&amp;cru SRST_HDPTX_LANE&gt;;</div><div class='add'>+			reset-names = "apb", "init", "cmn", "lane";</div><div class='add'>+			rockchip,grf = &lt;&amp;hdptxphy_grf&gt;;</div><div class='add'>+			#phy-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sram: sram@3ff88000 {</div><div class='add'>+			compatible = "mmio-sram";</div><div class='add'>+			reg = &lt;0x0 0x3ff88000 0x0 0x78000&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x0 0x3ff88000 0x78000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			/* start address and size should be 4k align */</div><div class='add'>+			rkvdec_sram: rkvdec-sram@0 {</div><div class='add'>+				reg = &lt;0x0 0x78000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scmi_shmem: scmi-shmem@4010f000 {</div><div class='add'>+			compatible = "arm,scmi-shmem";</div><div class='add'>+			reg = &lt;0x0 0x4010f000 0x0 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "rk3576-pinctrl.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts b/arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts<br/>new file mode 100644<br/>index 000000000000..854c118418eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts</a></div><div class='hunk'>@@ -0,0 +1,734 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa E52C";</div><div class='add'>+	compatible = "radxa,e52c", "rockchip,rk3582", "rockchip,rk3588s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;18000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-0 {</div><div class='add'>+			label = "Maskrom";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	keys-1 {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm15_ir_m1&gt;;</div><div class='add'>+</div><div class='add'>+		button-1 {</div><div class='add'>+			label = "User";</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,code = &lt;BTN_0&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds-0 {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;power_led&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds-1 {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_LAN;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			pwms = &lt;&amp;pwm14 0 1000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_WAN;</div><div class='add'>+			linux,default-trigger = "netdev";</div><div class='add'>+			pwms = &lt;&amp;pwm11 0 1000000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-1v1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-3v3-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcca: regulator-4v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg0: regulator-5v0-0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0: regulator-5v0-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc_5v0_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sysin: regulator-5v0-2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sysin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In the Rockchip RK3582 SoC, some CPU cores end up disabled</div><div class='add'>+ * and unused because they're marked in the efuses as defective.</div><div class='add'>+ * The disabling in the DT is performed by the boot loader.</div><div class='add'>+ */</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "belling,bl24c16a", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3_pmu&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "rtcic_32kout";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie20x1_1_perstn_m1&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie20x1_2_perstn_m0&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	keys {</div><div class='add'>+		pwm15_ir_m1: pwm15-ir-m1 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		power_led: power-led {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie20x1_1_perstn_m1: pcie-1 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie20x1_2_perstn_m0: pcie-2 {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		vcc_5v0_pwren_h: vcc-5v0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		rtc_int_l: rtc-int-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_otg_pwren_h: usb-otg-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm11 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm11m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm14 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm14m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcca&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vcc_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: vcc_3v3_pmu: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi<br/>new file mode 100644<br/>index 000000000000..e44125e9a8fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-armsom-lm7.dtsi</a></div><div class='hunk'>@@ -0,0 +1,459 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "armsom,lm7", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts<br/>index c667704ba985..39197ee19837 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -23,7 +24,7 @@</div><div class='ctx'> 		compatible = "audio-graph-card";</div><div class='ctx'> 		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='ctx'> 		label = "rk3588-es8316";</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='ctx'> 		routing = "MIC2", "Mic Jack",</div><div class='hunk'>@@ -33,6 +34,17 @@</div><div class='ctx'> 			  "Headphone", "Headphones";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -61,7 +73,7 @@</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {</div><div class='add'>+	vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -70,7 +82,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -81,7 +93,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -95,7 +107,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -104,7 +116,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -164,6 +176,30 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -258,6 +294,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* phy1 - right ethernet port */</div><div class='ctx'> &amp;pcie2x1l0 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -268,6 +308,22 @@</div><div class='ctx'> &amp;pcie2x1l1 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x300000 0 0 0 0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		bus-range = &lt;0x30 0x3f&gt;;</div><div class='add'>+</div><div class='add'>+		wifi: wifi@0,0 {</div><div class='add'>+			compatible = "pci14e4,449d";</div><div class='add'>+			reg = &lt;0x310000 0 0 0 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+			clock-names = "lpo";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* phy0 - left ethernet port */</div><div class='hunk'>@@ -286,6 +342,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='hunk'>@@ -313,6 +373,20 @@</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wireless-bluetooth {</div><div class='add'>+		bt_reset_pin: bt-reset-pin {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_pin: bt-wake-pin {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host_irq: bt-wake-host-irq {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm1 {</div><div class='hunk'>@@ -707,6 +781,28 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart6m1_xfer &amp;uart6m1_ctsn &amp;uart6m1_rtsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;1500000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_wake_host_irq &amp;bt_wake_pin &amp;bt_reset_pin&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbdp_phy1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -723,3 +819,18 @@</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts b/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts<br/>new file mode 100644<br/>index 000000000000..6ad2759ddcca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts</a></div><div class='hunk'>@@ -0,0 +1,509 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588-armsom-lm7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ArmSoM W3";</div><div class='add'>+	compatible = "armsom,w3", "armsom,lm7", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "rk3588-es8316";</div><div class='add'>+</div><div class='add'>+		widgets = "Microphone", "Mic Jack",</div><div class='add'>+			  "Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+		routing = "MIC2", "Mic Jack",</div><div class='add'>+			  "Headphones", "HPOL",</div><div class='add'>+			  "Headphones", "HPOR";</div><div class='add'>+</div><div class='add'>+		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='add'>+		hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_b&gt;;</div><div class='add'>+</div><div class='add'>+		led-rgb-b {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-rgb-r {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 120 150 180 210 240 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-pcie-wlan";</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill-bt {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-m2-bt";</div><div class='add'>+		radio-type = "bluetooth";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie2_0_vcc3v3_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie3_vcc3v3_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8316: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8316";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			es8316_p0_0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;i2s0_8ch_p0_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s0_8ch_p0: port {</div><div class='add'>+		i2s0_8ch_p0_0: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;es8316_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		package_fan0: package-fan0 {</div><div class='add'>+			temperature = &lt;55000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		package_fan1: package-fan1 {</div><div class='add'>+			temperature = &lt;65000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			trip = &lt;&amp;package_fan0&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map1 {</div><div class='add'>+			trip = &lt;&amp;package_fan1&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_b: led-rgb-b {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3_rst: pcie3-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_vcc3v3_en: pcie3-vcc3v3-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-mmc;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdiom0_pins&gt;;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_pcie2x1l0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	wakeup-source;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart6m1_xfer &amp;uart6m1_ctsn &amp;uart6m1_rtsn&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	/* connected to USB hub, which is powered by vcc5v0_sys */</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi<br/>index d1368418502a..6584d73660f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-base-pinctrl.dtsi</a></div><div class='hunk'>@@ -578,14 +578,14 @@</div><div class='ctx'> 		hdmim0_tx0_scl: hdmim0-tx0-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim0_tx0_scl */</div><div class='del'>-				&lt;4 RK_PB7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;4 RK_PB7 5 &amp;pcfg_pull_none_drv_level_5_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim0_tx0_sda: hdmim0-tx0-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim0_tx0_sda */</div><div class='del'>-				&lt;4 RK_PC0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;4 RK_PC0 5 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='hunk'>@@ -640,14 +640,14 @@</div><div class='ctx'> 		hdmim1_tx0_scl: hdmim1-tx0-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim1_tx0_scl */</div><div class='del'>-				&lt;0 RK_PD5 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;0 RK_PD5 11 &amp;pcfg_pull_none_drv_level_5_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim1_tx0_sda: hdmim1-tx0-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim1_tx0_sda */</div><div class='del'>-				&lt;0 RK_PD4 11 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;0 RK_PD4 11 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='hunk'>@@ -668,14 +668,14 @@</div><div class='ctx'> 		hdmim1_tx1_scl: hdmim1-tx1-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim1_tx1_scl */</div><div class='del'>-				&lt;3 RK_PC6 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;3 RK_PC6 5 &amp;pcfg_pull_none_drv_level_5_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim1_tx1_sda: hdmim1-tx1-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim1_tx1_sda */</div><div class='del'>-				&lt;3 RK_PC5 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;3 RK_PC5 5 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim2_rx_cec: hdmim2-rx-cec {</div><div class='hunk'>@@ -709,14 +709,14 @@</div><div class='ctx'> 		hdmim2_tx0_scl: hdmim2-tx0-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim2_tx0_scl */</div><div class='del'>-				&lt;3 RK_PC7 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;3 RK_PC7 5 &amp;pcfg_pull_none_drv_level_5_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim2_tx0_sda: hdmim2-tx0-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim2_tx0_sda */</div><div class='del'>-				&lt;3 RK_PD0 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;3 RK_PD0 5 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='hunk'>@@ -730,14 +730,14 @@</div><div class='ctx'> 		hdmim2_tx1_scl: hdmim2-tx1-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim2_tx1_scl */</div><div class='del'>-				&lt;1 RK_PA4 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;1 RK_PA4 5 &amp;pcfg_pull_none_drv_level_5_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim2_tx1_sda: hdmim2-tx1-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim2_tx1_sda */</div><div class='del'>-				&lt;1 RK_PA3 5 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;1 RK_PA3 5 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='hunk'>@@ -1612,23 +1612,43 @@</div><div class='ctx'> </div><div class='ctx'> 	pcie20x1 {</div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie20x1m0_pins: pcie20x1m0-pins {</div><div class='add'>+		pcie20x1m0_clkreqn: pcie20x1m0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_clkreqn_m0 */</div><div class='del'>-				&lt;3 RK_PC7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20x1m0_perstn: pcie20x1m0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_perstn_m0 */</div><div class='del'>-				&lt;3 RK_PD1 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PD1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20x1m0_waken: pcie20x1m0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_waken_m0 */</div><div class='ctx'> 				&lt;3 RK_PD0 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie20x1m1_pins: pcie20x1m1-pins {</div><div class='add'>+		pcie20x1m1_clkreqn: pcie20x1m1-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_clkreqn_m1 */</div><div class='del'>-				&lt;4 RK_PB7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20x1m1_perstn: pcie20x1m1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_perstn_m1 */</div><div class='del'>-				&lt;4 RK_PC1 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PC1 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie20x1m1_waken: pcie20x1m1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie20x1_2_waken_m1 */</div><div class='ctx'> 				&lt;4 RK_PC0 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1654,52 +1674,127 @@</div><div class='ctx'> </div><div class='ctx'> 	pcie30x1 {</div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x1m0_pins: pcie30x1m0-pins {</div><div class='add'>+		pcie30x1m0_0_clkreqn: pcie30x1m0-0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_clkreqn_m0 */</div><div class='del'>-				&lt;0 RK_PC0 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PC0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m0_0_perstn: pcie30x1m0-0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_perstn_m0 */</div><div class='del'>-				&lt;0 RK_PC5 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PC5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m0_0_waken: pcie30x1m0-0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_waken_m0 */</div><div class='del'>-				&lt;0 RK_PC4 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PC4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m0_1_clkreqn: pcie30x1m0-1-clkreqn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_clkreqn_m0 */</div><div class='del'>-				&lt;0 RK_PB5 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PB5 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m0_1_perstn: pcie30x1m0-1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_perstn_m0 */</div><div class='del'>-				&lt;0 RK_PB7 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PB7 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m0_1_waken: pcie30x1m0-1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_waken_m0 */</div><div class='ctx'> 				&lt;0 RK_PB6 12 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x1m1_pins: pcie30x1m1-pins {</div><div class='add'>+		pcie30x1m1_0_clkreqn: pcie30x1m1-0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_clkreqn_m1 */</div><div class='del'>-				&lt;4 RK_PA3 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m1_0_perstn: pcie30x1m1-0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_perstn_m1 */</div><div class='del'>-				&lt;4 RK_PA5 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m1_0_waken: pcie30x1m1-0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_waken_m1 */</div><div class='del'>-				&lt;4 RK_PA4 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m1_1_clkreqn: pcie30x1m1-1-clkreqn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_clkreqn_m1 */</div><div class='del'>-				&lt;4 RK_PA0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m1_1_perstn: pcie30x1m1-1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_perstn_m1 */</div><div class='del'>-				&lt;4 RK_PA2 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m1_1_waken: pcie30x1m1-1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_waken_m1 */</div><div class='ctx'> 				&lt;4 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x1m2_pins: pcie30x1m2-pins {</div><div class='add'>+		pcie30x1m2_0_clkreqn: pcie30x1m2-0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_clkreqn_m2 */</div><div class='del'>-				&lt;1 RK_PB5 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m2_0_perstn: pcie30x1m2-0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_perstn_m2 */</div><div class='del'>-				&lt;1 RK_PB4 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m2_0_waken: pcie30x1m2-0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_0_waken_m2 */</div><div class='del'>-				&lt;1 RK_PB3 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m2_1_clkreqn: pcie30x1m2-1-clkreqn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_clkreqn_m2 */</div><div class='del'>-				&lt;1 RK_PA0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PA0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m2_1_perstn: pcie30x1m2-1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_perstn_m2 */</div><div class='del'>-				&lt;1 RK_PA7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x1m2_1_waken: pcie30x1m2-1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x1_1_waken_m2 */</div><div class='ctx'> 				&lt;1 RK_PA1 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1721,45 +1816,85 @@</div><div class='ctx'> </div><div class='ctx'> 	pcie30x2 {</div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x2m0_pins: pcie30x2m0-pins {</div><div class='add'>+		pcie30x2m0_clkreqn: pcie30x2m0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_clkreqn_m0 */</div><div class='del'>-				&lt;0 RK_PD1 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PD1 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m0_perstn: pcie30x2m0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_perstn_m0 */</div><div class='del'>-				&lt;0 RK_PD4 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PD4 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m0_waken: pcie30x2m0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_waken_m0 */</div><div class='ctx'> 				&lt;0 RK_PD2 12 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x2m1_pins: pcie30x2m1-pins {</div><div class='add'>+		pcie30x2m1_clkreqn: pcie30x2m1-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_clkreqn_m1 */</div><div class='del'>-				&lt;4 RK_PA6 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m1_perstn: pcie30x2m1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_perstn_m1 */</div><div class='del'>-				&lt;4 RK_PB0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m1_waken: pcie30x2m1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_waken_m1 */</div><div class='ctx'> 				&lt;4 RK_PA7 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x2m2_pins: pcie30x2m2-pins {</div><div class='add'>+		pcie30x2m2_clkreqn: pcie30x2m2-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_clkreqn_m2 */</div><div class='del'>-				&lt;3 RK_PD2 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PD2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m2_perstn: pcie30x2m2-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_perstn_m2 */</div><div class='del'>-				&lt;3 RK_PD4 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PD4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m2_waken: pcie30x2m2-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_waken_m2 */</div><div class='ctx'> 				&lt;3 RK_PD3 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x2m3_pins: pcie30x2m3-pins {</div><div class='add'>+		pcie30x2m3_clkreqn: pcie30x2m3-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_clkreqn_m3 */</div><div class='del'>-				&lt;1 RK_PD7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PD7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m3_perstn: pcie30x2m3-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_perstn_m3 */</div><div class='del'>-				&lt;1 RK_PB7 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB7 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x2m3_waken: pcie30x2m3-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x2_waken_m3 */</div><div class='ctx'> 				&lt;1 RK_PB6 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1774,45 +1909,85 @@</div><div class='ctx'> </div><div class='ctx'> 	pcie30x4 {</div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x4m0_pins: pcie30x4m0-pins {</div><div class='add'>+		pcie30x4m0_clkreqn: pcie30x4m0-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_clkreqn_m0 */</div><div class='del'>-				&lt;0 RK_PC6 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PC6 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m0_perstn: pcie30x4m0-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_perstn_m0 */</div><div class='del'>-				&lt;0 RK_PD0 12 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;0 RK_PD0 12 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m0_waken: pcie30x4m0-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_waken_m0 */</div><div class='ctx'> 				&lt;0 RK_PC7 12 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x4m1_pins: pcie30x4m1-pins {</div><div class='add'>+		pcie30x4m1_clkreqn: pcie30x4m1-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_clkreqn_m1 */</div><div class='del'>-				&lt;4 RK_PB4 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m1_perstn: pcie30x4m1-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_perstn_m1 */</div><div class='del'>-				&lt;4 RK_PB6 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PB6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m1_waken: pcie30x4m1-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_waken_m1 */</div><div class='ctx'> 				&lt;4 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x4m2_pins: pcie30x4m2-pins {</div><div class='add'>+		pcie30x4m2_clkreqn: pcie30x4m2-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_clkreqn_m2 */</div><div class='del'>-				&lt;3 RK_PC4 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m2_perstn: pcie30x4m2-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_perstn_m2 */</div><div class='del'>-				&lt;3 RK_PC6 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;3 RK_PC6 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m2_waken: pcie30x4m2-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_waken_m2 */</div><div class='ctx'> 				&lt;3 RK_PC5 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='del'>-		pcie30x4m3_pins: pcie30x4m3-pins {</div><div class='add'>+		pcie30x4m3_clkreqn: pcie30x4m3-clkreqn {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_clkreqn_m3 */</div><div class='del'>-				&lt;1 RK_PB0 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB0 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m3_perstn: pcie30x4m3-perstn {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_perstn_m3 */</div><div class='del'>-				&lt;1 RK_PB2 4 &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PB2 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/omit-if-no-ref/</div><div class='add'>+		pcie30x4m3_waken: pcie30x4m3-waken {</div><div class='add'>+			rockchip,pins =</div><div class='ctx'> 				/* pcie30x4_waken_m3 */</div><div class='ctx'> 				&lt;1 RK_PB1 4 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi<br/>index d97d84b88837..e2500e31c434 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-base.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-base.dtsi</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/rockchip,rk3588-cru.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/rk3588-power.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/rockchip,rk3588-cru.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='hunk'>@@ -95,8 +96,6 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;530&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUL&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUL&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;816000000&gt;;</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			i-cache-size = &lt;32768&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -173,8 +172,6 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUB01&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUB01&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;816000000&gt;;</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -213,8 +210,6 @@</div><div class='ctx'> 			enable-method = "psci";</div><div class='ctx'> 			capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUB23&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_CPUB23&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;816000000&gt;;</div><div class='ctx'> 			cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='ctx'> 			i-cache-line-size = &lt;64&gt;;</div><div class='hunk'>@@ -337,15 +332,19 @@</div><div class='ctx'> 			cache-unified;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		l3_cache: l3-cache {</div><div class='del'>-			compatible = "cache";</div><div class='del'>-			cache-size = &lt;3145728&gt;;</div><div class='del'>-			cache-line-size = &lt;64&gt;;</div><div class='del'>-			cache-sets = &lt;4096&gt;;</div><div class='del'>-			cache-level = &lt;3&gt;;</div><div class='del'>-			cache-unified;</div><div class='del'>-		};</div><div class='add'>+	/*</div><div class='add'>+	 * The L3 cache belongs to the DynamIQ Shared Unit (DSU),</div><div class='add'>+	 * so it's represented here, outside the "cpus" node</div><div class='add'>+	 */</div><div class='add'>+	l3_cache: l3-cache {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-size = &lt;3145728&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;4096&gt;;</div><div class='add'>+		cache-level = &lt;3&gt;;</div><div class='add'>+		cache-unified;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	display_subsystem: display-subsystem {</div><div class='hunk'>@@ -354,11 +353,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	firmware {</div><div class='del'>-		optee: optee {</div><div class='del'>-			compatible = "linaro,optee-tz";</div><div class='del'>-			method = "smc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		scmi: scmi {</div><div class='ctx'> 			compatible = "arm,scmi-smc";</div><div class='ctx'> 			arm,smc-id = &lt;0x82000010&gt;;</div><div class='hunk'>@@ -378,6 +372,22 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0_sound: hdmi0-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;128&gt;;</div><div class='add'>+		simple-audio-card,name = "hdmi0";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;hdmi0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s5_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu-a55 {</div><div class='ctx'> 		compatible = "arm,cortex-a55-pmu";</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &amp;ppi_partition0&gt;;</div><div class='hunk'>@@ -424,16 +434,15 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu_sram: sram@10f000 {</div><div class='del'>-		compatible = "mmio-sram";</div><div class='del'>-		reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='del'>-		ranges = &lt;0 0x0 0x0010f000 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='ctx'> </div><div class='del'>-		scmi_shmem: sram@0 {</div><div class='add'>+		scmi_shmem: shmem@10f000 {</div><div class='ctx'> 			compatible = "arm,scmi-shmem";</div><div class='del'>-			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			reg = &lt;0x0 0x0010f000 0x0 0x100&gt;;</div><div class='add'>+			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -545,22 +554,21 @@</div><div class='ctx'> 	mmu600_pcie: iommu@fc900000 {</div><div class='ctx'> 		compatible = "arm,smmu-v3";</div><div class='ctx'> 		reg = &lt;0x0 0xfc900000 0x0 0x200000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 369 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 371 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 374 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 367 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='ctx'> 		#iommu-cells = &lt;1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mmu600_php: iommu@fcb00000 {</div><div class='ctx'> 		compatible = "arm,smmu-v3";</div><div class='ctx'> 		reg = &lt;0x0 0xfcb00000 0x0 0x200000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-			     &lt;GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 381 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 383 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 386 IRQ_TYPE_EDGE_RISING 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 379 IRQ_TYPE_EDGE_RISING 0&gt;;</div><div class='ctx'> 		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";</div><div class='ctx'> 		#iommu-cells = &lt;1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -576,6 +584,16 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfd58c000 0x0 0x1000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mipidcphy0_grf: syscon@fd5e8000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dcphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5e8000 0x0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipidcphy1_grf: syscon@fd5ec000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dcphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5ec000 0x0 0x4000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vop_grf: syscon@fd5a4000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-vop-grf", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5a4000 0x0 0x2000&gt;;</div><div class='hunk'>@@ -603,6 +621,16 @@</div><div class='ctx'> 		reg = &lt;0x0 0xfd5b0000 0x0 0x1000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	csidphy0_grf: syscon@fd5b4000 {</div><div class='add'>+		compatible = "rockchip,rk3588-csidphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5b4000 0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csidphy1_grf: syscon@fd5b5000 {</div><div class='add'>+		compatible = "rockchip,rk3588-csidphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5b5000 0x0 0x1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pipe_phy0_grf: syscon@fd5bc000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfd5bc000 0x0 0x100&gt;;</div><div class='hunk'>@@ -823,7 +851,7 @@</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> </div><div class='ctx'> 			/* These power domains are grouped by VD_NPU */</div><div class='del'>-			power-domain@RK3588_PD_NPU {</div><div class='add'>+			pd_npu: power-domain@RK3588_PD_NPU {</div><div class='ctx'> 				reg = &lt;RK3588_PD_NPU&gt;;</div><div class='ctx'> 				#power-domain-cells = &lt;0&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -861,7 +889,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 			/* These power domains are grouped by VD_GPU */</div><div class='del'>-			power-domain@RK3588_PD_GPU {</div><div class='add'>+			pd_gpu: power-domain@RK3588_PD_GPU {</div><div class='ctx'> 				reg = &lt;RK3588_PD_GPU&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;cru CLK_GPU&gt;,</div><div class='ctx'> 					 &lt;&amp;cru CLK_GPU_COREGROUP&gt;,</div><div class='hunk'>@@ -1122,6 +1150,97 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	rknn_core_0: npu@fdab0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-rknn-core";</div><div class='add'>+		reg = &lt;0x0 0xfdab0000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdab1000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdab3000 0x0 0x1000&gt;;</div><div class='add'>+		reg-names = "pc", "cna", "core";</div><div class='add'>+		interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU0&gt;, &lt;&amp;cru HCLK_NPU0&gt;,</div><div class='add'>+			 &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;, &lt;&amp;cru PCLK_NPU_ROOT&gt;;</div><div class='add'>+		clock-names = "aclk", "hclk", "npu", "pclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_RKNN0&gt;, &lt;&amp;cru SRST_H_RKNN0&gt;;</div><div class='add'>+		reset-names = "srst_a", "srst_h";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPUTOP&gt;;</div><div class='add'>+		iommus = &lt;&amp;rknn_mmu_0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rknn_mmu_0: iommu@fdab9000 {</div><div class='add'>+		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";</div><div class='add'>+		reg = &lt;0x0 0xfdab9000 0x0 0x100&gt;,</div><div class='add'>+		      &lt;0x0 0xfdaba000 0x0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU0&gt;, &lt;&amp;cru HCLK_NPU0&gt;;</div><div class='add'>+		clock-names = "aclk", "iface";</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPUTOP&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rknn_core_1: npu@fdac0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-rknn-core";</div><div class='add'>+		reg = &lt;0x0 0xfdac0000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdac1000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdac3000 0x0 0x1000&gt;;</div><div class='add'>+		reg-names = "pc", "cna", "core";</div><div class='add'>+		interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU1&gt;, &lt;&amp;cru HCLK_NPU1&gt;,</div><div class='add'>+			 &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;, &lt;&amp;cru PCLK_NPU_ROOT&gt;;</div><div class='add'>+		clock-names = "aclk", "hclk", "npu", "pclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_RKNN1&gt;, &lt;&amp;cru SRST_H_RKNN1&gt;;</div><div class='add'>+		reset-names = "srst_a", "srst_h";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPU1&gt;;</div><div class='add'>+		iommus = &lt;&amp;rknn_mmu_1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rknn_mmu_1: iommu@fdac9000 {</div><div class='add'>+		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";</div><div class='add'>+		reg = &lt;0x0 0xfdaca000 0x0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU1&gt;, &lt;&amp;cru HCLK_NPU1&gt;;</div><div class='add'>+		clock-names = "aclk", "iface";</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPU1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rknn_core_2: npu@fdad0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-rknn-core";</div><div class='add'>+		reg = &lt;0x0 0xfdad0000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdad1000 0x0 0x1000&gt;,</div><div class='add'>+		      &lt;0x0 0xfdad3000 0x0 0x1000&gt;;</div><div class='add'>+		reg-names = "pc", "cna", "core";</div><div class='add'>+		interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU2&gt;, &lt;&amp;cru HCLK_NPU2&gt;,</div><div class='add'>+			 &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;, &lt;&amp;cru PCLK_NPU_ROOT&gt;;</div><div class='add'>+		clock-names = "aclk", "hclk", "npu", "pclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;scmi_clk SCMI_CLK_NPU&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_RKNN2&gt;, &lt;&amp;cru SRST_H_RKNN2&gt;;</div><div class='add'>+		reset-names = "srst_a", "srst_h";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPU2&gt;;</div><div class='add'>+		iommus = &lt;&amp;rknn_mmu_2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rknn_mmu_2: iommu@fdad9000 {</div><div class='add'>+		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";</div><div class='add'>+		reg = &lt;0x0 0xfdada000 0x0 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_NPU2&gt;, &lt;&amp;cru HCLK_NPU2&gt;;</div><div class='add'>+		clock-names = "aclk", "iface";</div><div class='add'>+		#iommu-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_NPU2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vpu121: video-codec@fdb50000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-vpu121", "rockchip,rk3568-vpu";</div><div class='ctx'> 		reg = &lt;0x0 0xfdb50000 0x0 0x800&gt;;</div><div class='hunk'>@@ -1258,14 +1377,16 @@</div><div class='ctx'> 			 &lt;&amp;cru DCLK_VOP1&gt;,</div><div class='ctx'> 			 &lt;&amp;cru DCLK_VOP2&gt;,</div><div class='ctx'> 			 &lt;&amp;cru DCLK_VOP3&gt;,</div><div class='del'>-			 &lt;&amp;cru PCLK_VOP_ROOT&gt;;</div><div class='add'>+			 &lt;&amp;cru PCLK_VOP_ROOT&gt;,</div><div class='add'>+			 &lt;&amp;hdptxphy0&gt;;</div><div class='ctx'> 		clock-names = "aclk",</div><div class='ctx'> 			      "hclk",</div><div class='ctx'> 			      "dclk_vp0",</div><div class='ctx'> 			      "dclk_vp1",</div><div class='ctx'> 			      "dclk_vp2",</div><div class='ctx'> 			      "dclk_vp3",</div><div class='del'>-			      "pclk_vop";</div><div class='add'>+			      "pclk_vop",</div><div class='add'>+			      "pll_hdmiphy0";</div><div class='ctx'> 		iommus = &lt;&amp;vop_mmu&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='ctx'> 		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='hunk'>@@ -1315,6 +1436,21 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spdif_tx2: spdif-tx@fddb0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfddb0000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF2_DP0_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF2&gt;, &lt;&amp;cru HCLK_SPDIF2_DP0&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac1 6&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s4_8ch: i2s@fddc0000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddc0000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1332,6 +1468,21 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spdif_tx3: spdif-tx@fdde0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfdde0000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF3_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF3&gt;, &lt;&amp;cru HCLK_SPDIF3&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac1 7&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s5_8ch: i2s@fddf0000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddf0000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1366,6 +1517,162 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dsi0: dsi@fde20000 {</div><div class='add'>+		compatible = "rockchip,rk3588-mipi-dsi2";</div><div class='add'>+		reg = &lt;0x0 0xfde20000 0x0 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_DSIHOST0&gt;, &lt;&amp;cru CLK_DSIHOST0&gt;;</div><div class='add'>+		clock-names = "pclk", "sys";</div><div class='add'>+		resets = &lt;&amp;cru SRST_P_DSIHOST0&gt;;</div><div class='add'>+		reset-names = "apb";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='add'>+		phys = &lt;&amp;mipidcphy0 PHY_TYPE_DPHY&gt;;</div><div class='add'>+		phy-names = "dcphy";</div><div class='add'>+		rockchip,grf = &lt;&amp;vop_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dsi0_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dsi0_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi1: dsi@fde30000 {</div><div class='add'>+		compatible = "rockchip,rk3588-mipi-dsi2";</div><div class='add'>+		reg = &lt;0x0 0xfde30000 0x0 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_DSIHOST1&gt;, &lt;&amp;cru CLK_DSIHOST1&gt;;</div><div class='add'>+		clock-names = "pclk", "sys";</div><div class='add'>+		resets = &lt;&amp;cru SRST_P_DSIHOST1&gt;;</div><div class='add'>+		reset-names = "apb";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VOP&gt;;</div><div class='add'>+		phys = &lt;&amp;mipidcphy1 PHY_TYPE_DPHY&gt;;</div><div class='add'>+		phy-names = "dcphy";</div><div class='add'>+		rockchip,grf = &lt;&amp;vop_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dsi1_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dsi1_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0: dp@fde50000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dp";</div><div class='add'>+		reg = &lt;0x0 0xfde50000 0x0 0x4000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_AUX16M_0&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;16000000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_DP0&gt;, &lt;&amp;cru CLK_AUX16M_0&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_DP0&gt;, &lt;&amp;cru MCLK_I2S4_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru MCLK_SPDIF2_DP0&gt;;</div><div class='add'>+		clock-names = "apb", "aux", "hdcp", "i2s", "spdif";</div><div class='add'>+		phys = &lt;&amp;usbdp_phy0 PHY_TYPE_DP&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO0&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_DP0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dp0_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dp0_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0: hdmi@fde80000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dw-hdmi-qp";</div><div class='add'>+		reg = &lt;0x0 0xfde80000 0x0 0x20000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_HDMITX0&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMITX0_EARC&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMITX0_REF&gt;,</div><div class='add'>+			 &lt;&amp;cru MCLK_I2S5_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMIHDP0&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_VO1&gt;;</div><div class='add'>+		clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1";</div><div class='add'>+		interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "avp", "cec", "earc", "main", "hpd";</div><div class='add'>+		phys = &lt;&amp;hdptxphy0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hdmim0_tx0_cec &amp;hdmim0_tx0_hpd</div><div class='add'>+			     &amp;hdmim0_tx0_scl &amp;hdmim0_tx0_sda&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_HDMITX0_REF&gt;, &lt;&amp;cru SRST_HDMIHDP0&gt;;</div><div class='add'>+		reset-names = "ref", "hdp";</div><div class='add'>+		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='add'>+		rockchip,vo-grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			hdmi0_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi0_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp0: edp@fdec0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-edp";</div><div class='add'>+		reg = &lt;0x0 0xfdec0000 0x0 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_EDP0_24M&gt;, &lt;&amp;cru PCLK_EDP0&gt;;</div><div class='add'>+		clock-names = "dp", "pclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		phys = &lt;&amp;hdptxphy0&gt;;</div><div class='add'>+		phy-names = "dp";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_EDP0_24M&gt;, &lt;&amp;cru SRST_P_EDP0&gt;;</div><div class='add'>+		reset-names = "dp", "apb";</div><div class='add'>+		rockchip,grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			edp0_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edp0_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	qos_gpu_m0: qos@fdf35000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-qos", "syscon";</div><div class='ctx'> 		reg = &lt;0x0 0xfdf35000 0x0 0x20&gt;;</div><div class='hunk'>@@ -1641,6 +1948,7 @@</div><div class='ctx'> 		linux,pci-domain = &lt;3&gt;;</div><div class='ctx'> 		max-link-speed = &lt;2&gt;;</div><div class='ctx'> 		msi-map = &lt;0x3000 &amp;its0 0x3000 0x1000&gt;;</div><div class='add'>+		iommu-map = &lt;0x3000 &amp;mmu600_pcie 0x3000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		phys = &lt;&amp;combphy2_psu PHY_TYPE_PCIE&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -1692,6 +2000,7 @@</div><div class='ctx'> 		linux,pci-domain = &lt;4&gt;;</div><div class='ctx'> 		max-link-speed = &lt;2&gt;;</div><div class='ctx'> 		msi-map = &lt;0x4000 &amp;its0 0x4000 0x1000&gt;;</div><div class='add'>+		iommu-map = &lt;0x4000 &amp;mmu600_pcie 0x4000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		phys = &lt;&amp;combphy0_ps PHY_TYPE_PCIE&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -1875,6 +2184,14 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	rng@fe378000 {</div><div class='add'>+		compatible = "rockchip,rk3588-rng";</div><div class='add'>+		reg = &lt;0x0 0xfe378000 0x0 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;scmi_clk SCMI_HCLK_SECURE_NS&gt;;</div><div class='add'>+		resets = &lt;&amp;scmi_reset SCMI_SRST_H_TRNG_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s0_8ch: i2s@fe470000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfe470000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -1970,12 +2287,47 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spdif_tx0: spdif-tx@fe4e0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfe4e0000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF0_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF0&gt;, &lt;&amp;cru HCLK_SPDIF0&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac0 5&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spdif0m0_tx&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_AUDIO&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_tx1: spdif-tx@fe4f0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfe4f0000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF1_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF1&gt;, &lt;&amp;cru HCLK_SPDIF1&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac1 5&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;spdif1m0_tx&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_AUDIO&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gic: interrupt-controller@fe600000 {</div><div class='ctx'> 		compatible = "arm,gic-v3";</div><div class='ctx'> 		reg = &lt;0x0 0xfe600000 0 0x10000&gt;, /* GICD */</div><div class='ctx'> 		      &lt;0x0 0xfe680000 0 0x100000&gt;; /* GICR */</div><div class='ctx'> 		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='add'>+		dma-noncoherent;</div><div class='ctx'> 		mbi-alias = &lt;0x0 0xfe610000&gt;;</div><div class='ctx'> 		mbi-ranges = &lt;424 56&gt;;</div><div class='ctx'> 		msi-controller;</div><div class='hunk'>@@ -1987,6 +2339,7 @@</div><div class='ctx'> 		its0: msi-controller@fe640000 {</div><div class='ctx'> 			compatible = "arm,gic-v3-its";</div><div class='ctx'> 			reg = &lt;0x0 0xfe640000 0x0 0x20000&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='ctx'> 			msi-controller;</div><div class='ctx'> 			#msi-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -1994,6 +2347,7 @@</div><div class='ctx'> 		its1: msi-controller@fe660000 {</div><div class='ctx'> 			compatible = "arm,gic-v3-its";</div><div class='ctx'> 			reg = &lt;0x0 0xfe660000 0x0 0x20000&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='ctx'> 			msi-controller;</div><div class='ctx'> 			#msi-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -2622,9 +2976,9 @@</div><div class='ctx'> 		rockchip,hw-tshut-temp = &lt;120000&gt;;</div><div class='ctx'> 		rockchip,hw-tshut-mode = &lt;0&gt;; /* tshut mode 0:CRU 1:GPIO */</div><div class='ctx'> 		rockchip,hw-tshut-polarity = &lt;0&gt;; /* tshut polarity 0:LOW 1:HIGH */</div><div class='del'>-		pinctrl-0 = &lt;&amp;tsadc_gpio_func&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;tsadc_shut&gt;;</div><div class='del'>-		pinctrl-names = "gpio", "otpout";</div><div class='add'>+		pinctrl-0 = &lt;&amp;tsadc_shut_org&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;tsadc_gpio_func&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -2761,11 +3115,12 @@</div><div class='ctx'> 		#dma-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hdptxphy_hdmi0: phy@fed60000 {</div><div class='add'>+	hdptxphy0: phy@fed60000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-hdptx-phy";</div><div class='ctx'> 		reg = &lt;0x0 0xfed60000 0x0 0x2000&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;, &lt;&amp;cru PCLK_HDPTX0&gt;;</div><div class='ctx'> 		clock-names = "ref", "apb";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		resets = &lt;&amp;cru SRST_HDPTX0&gt;, &lt;&amp;cru SRST_P_HDPTX0&gt;,</div><div class='ctx'> 			 &lt;&amp;cru SRST_HDPTX0_INIT&gt;, &lt;&amp;cru SRST_HDPTX0_CMN&gt;,</div><div class='hunk'>@@ -2799,6 +3154,62 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mipidcphy0: phy@feda0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-mipi-dcphy";</div><div class='add'>+		reg = &lt;0x0 0xfeda0000 0x0 0x10000&gt;;</div><div class='add'>+		rockchip,grf = &lt;&amp;mipidcphy0_grf&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_MIPI_DCPHY0&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_USBDPPHY_MIPIDCPPHY_REF&gt;;</div><div class='add'>+		clock-names = "pclk", "ref";</div><div class='add'>+		resets = &lt;&amp;cru SRST_M_MIPI_DCPHY0&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_MIPI_DCPHY0&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_MIPI_DCPHY0_GRF&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_S_MIPI_DCPHY0&gt;;</div><div class='add'>+		reset-names = "m_phy", "apb", "grf", "s_phy";</div><div class='add'>+		#phy-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mipidcphy1: phy@fedb0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-mipi-dcphy";</div><div class='add'>+		reg = &lt;0x0 0xfedb0000 0x0 0x10000&gt;;</div><div class='add'>+		rockchip,grf = &lt;&amp;mipidcphy1_grf&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_MIPI_DCPHY1&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_USBDPPHY_MIPIDCPPHY_REF&gt;;</div><div class='add'>+		clock-names = "pclk", "ref";</div><div class='add'>+		resets = &lt;&amp;cru SRST_M_MIPI_DCPHY1&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_MIPI_DCPHY1&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_P_MIPI_DCPHY1_GRF&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_S_MIPI_DCPHY1&gt;;</div><div class='add'>+		reset-names = "m_phy", "apb", "grf", "s_phy";</div><div class='add'>+		#phy-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi_dphy0: phy@fedc0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-csi-dphy";</div><div class='add'>+		reg = &lt;0x0 0xfedc0000 0x0 0x8000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_CSIPHY0&gt;;</div><div class='add'>+		clock-names = "pclk";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_P_CSIPHY0&gt;, &lt;&amp;cru SRST_CSIPHY0&gt;;</div><div class='add'>+		reset-names = "apb", "phy";</div><div class='add'>+		rockchip,grf = &lt;&amp;csidphy0_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi_dphy1: phy@fedc8000 {</div><div class='add'>+		compatible = "rockchip,rk3588-csi-dphy";</div><div class='add'>+		reg = &lt;0x0 0xfedc8000 0x0 0x8000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_CSIPHY1&gt;;</div><div class='add'>+		clock-names = "pclk";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_P_CSIPHY1&gt;, &lt;&amp;cru SRST_CSIPHY1&gt;;</div><div class='add'>+		reset-names = "apb", "phy";</div><div class='add'>+		rockchip,grf = &lt;&amp;csidphy1_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	combphy0_ps: phy@fee00000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-naneng-combphy";</div><div class='ctx'> 		reg = &lt;0x0 0xfee00000 0x0 0x100&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts<br/>index a4946cdc3bb3..3d5c8b753208 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588-coolpi-cm5.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -22,6 +23,28 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds: leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +56,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -42,7 +65,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -52,7 +75,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -62,7 +85,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lcd: vcc3v3-lcd-regulator {</div><div class='add'>+	vcc3v3_lcd: regulator-vcc3v3-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lcd";</div><div class='ctx'> 		enable-active-high;</div><div class='hunk'>@@ -72,7 +95,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host1: vcc5v0_usb_host2: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -86,7 +109,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {</div><div class='add'>+	vcc5v0_usb30_otg: regulator-vcc5v0-usb30-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_otg";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -101,6 +124,64 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim2_tx1_cec &amp;hdmim0_tx1_hpd &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* M.2 E-Key */</div><div class='ctx'> &amp;pcie2x1l1 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -214,3 +295,25 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts<br/>index 6418286efe40..738637ecaf55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588-coolpi-cm5.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -35,6 +36,17 @@</div><div class='ctx'> 		gpios = &lt;&amp;gpio1 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds: leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +70,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -67,7 +79,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_sys: vcc-sys-regulator {</div><div class='add'>+	vcc_sys: regulator-vcc-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -77,7 +89,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -87,7 +99,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -97,17 +109,17 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lcd: vcc3v3-lcd-regulator {</div><div class='add'>+	vcc3v3_lcd: regulator-vcc3v3-lcd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_lcd";</div><div class='ctx'> 		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;lcdpwr_en&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -121,7 +133,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb_host0: vcc5v0_usb30_host: vcc5v0-usb-host-regulator {</div><div class='add'>+	vcc5v0_usb_host0: vcc5v0_usb30_host: regulator-vcc5v0-usb-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -136,6 +148,66 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;edp1 {</div><div class='add'>+	force-hpd;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			hpd-absent-delay-ms = &lt;200&gt;;</div><div class='add'>+			no-hpd;</div><div class='add'>+			backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vcc3v3_lcd&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				panel_in_edp: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;edp_out_panel&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edp1_in {</div><div class='add'>+	edp1_in_vp2: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp2_out_edp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edp1_out {</div><div class='add'>+	edp_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* HDMI CEC is not used */</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_hpd &amp;hdmim0_tx0_scl &amp;hdmim0_tx0_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -207,7 +279,7 @@</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	lcd {</div><div class='ctx'> 		lcdpwr_en: lcdpwr-en {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		bl_en: bl-en {</div><div class='hunk'>@@ -347,3 +419,27 @@</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP2_SRC&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru PLL_V0PLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp2 {</div><div class='add'>+	vp2_out_edp1: endpoint@ROCKCHIP_VOP2_EP_EDP1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_EDP1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;edp1_in_vp2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi<br/>index fde8b228f2c7..b07543315f87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd0v85_pcie20: avdd0v85-pcie20-regulator {</div><div class='add'>+	avdd0v85_pcie20: regulator-avdd0v85-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd0v85_pcie20";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd1v8_pcie20: avdd1v8-pcie20-regulator {</div><div class='add'>+	avdd1v8_pcie20: regulator-avdd1v8-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd1v8_pcie20";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd0v75_pcie30: avdd0v75-pcie30-regulator {</div><div class='add'>+	avdd0v75_pcie30: regulator-avdd0v75-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd0v75_pcie30";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: avdd1v8-pcie30-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-avdd1v8-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -277,6 +277,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='hunk'>@@ -317,6 +321,7 @@</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	max-frequency = &lt;150000000&gt;;</div><div class='ctx'> 	no-sdio;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi<br/>index 03fd193be253..8a783dc64c0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -126,6 +126,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	leds {</div><div class='ctx'> 		led_user_en: led_user_en {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi<br/>index 7b1317898358..08920344a4b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi</a></div><div class='hunk'>@@ -4,13 +4,34 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Unnamed gated oscillator: 100MHz,3.3V,3225 */</div><div class='add'>+	pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator {</div><div class='add'>+		compatible = "gated-fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		clock-output-names = "pcie30_refclk";</div><div class='add'>+		vdd-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -19,33 +40,33 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie3x2: vcc3v3-pcie3x2-regulator {</div><div class='add'>+	vcc3v3_bkey: regulator-vcc3v3-bkey {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio2 RK_PC4 GPIO_ACTIVE_HIGH&gt;; /* PCIE_4G_PWEN */</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie3x2_vcc3v3_en&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie3x2";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie_4g_pwen&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_bkey";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;5000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie3x4: vcc3v3-pcie3x4-regulator {</div><div class='add'>+	vcc3v3_pcie30: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio2 RK_PC5 GPIO_ACTIVE_HIGH&gt;; /* PCIE30x4_PWREN_H */</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie3x4_vcc3v3_en&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie3x4";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie30x4_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;5000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -72,6 +93,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c6 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -98,24 +139,52 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie30phy {</div><div class='add'>+	data-lanes = &lt;1 1 2 2&gt;;</div><div class='add'>+	/* separate clock lines from the clock generator to phy and devices */</div><div class='add'>+	rockchip,rx-common-refclk-mode = &lt;0 0 0 0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* B-Key and E-Key */</div><div class='add'>+/* M-Key */</div><div class='ctx'> &amp;pcie3x2 {</div><div class='add'>+	/*</div><div class='add'>+	 * The board has a "pcie_refclk" oscillator that needs enabling,</div><div class='add'>+	 * so add it to the list of clocks.</div><div class='add'>+	 */</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_PCIE_2L_MSTR&gt;, &lt;&amp;cru ACLK_PCIE_2L_SLV&gt;,</div><div class='add'>+		 &lt;&amp;cru ACLK_PCIE_2L_DBI&gt;, &lt;&amp;cru PCLK_PCIE_2L&gt;,</div><div class='add'>+		 &lt;&amp;cru CLK_PCIE_AUX1&gt;, &lt;&amp;cru CLK_PCIE2L_PIPE&gt;,</div><div class='add'>+		 &lt;&amp;pcie30_port1_refclk&gt;;</div><div class='add'>+	clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+		      "aclk_dbi", "pclk",</div><div class='add'>+		      "aux", "pipe",</div><div class='add'>+		      "ref";</div><div class='add'>+	num-lanes = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie3x2_rst&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X4_PERSTn_M1_L */</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie3x2&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x2_perstn_m1_l&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X2_PERSTn_M1_L */</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* M-Key */</div><div class='add'>+/* B-Key and E-Key */</div><div class='ctx'> &amp;pcie3x4 {</div><div class='add'>+	/*</div><div class='add'>+	 * The board has a "pcie_refclk" oscillator that needs enabling,</div><div class='add'>+	 * so add it to the list of clocks.</div><div class='add'>+	 */</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_PCIE_4L_MSTR&gt;, &lt;&amp;cru ACLK_PCIE_4L_SLV&gt;,</div><div class='add'>+		 &lt;&amp;cru ACLK_PCIE_4L_DBI&gt;, &lt;&amp;cru PCLK_PCIE_4L&gt;,</div><div class='add'>+		 &lt;&amp;cru CLK_PCIE_AUX0&gt;, &lt;&amp;cru CLK_PCIE4L_PIPE&gt;,</div><div class='add'>+		 &lt;&amp;pcie30_port0_refclk&gt;;</div><div class='add'>+	clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+		      "aclk_dbi", "pclk",</div><div class='add'>+		      "aux", "pipe",</div><div class='add'>+		      "ref";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie3x4_rst&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X2_PERSTn_M1_L */</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie3x4&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie30x4_perstn_m1_l&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X4_PERSTn_M1_L */</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_bkey&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -127,20 +196,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie3 {</div><div class='del'>-		pcie3x2_rst: pcie3x2-rst {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		pcie30x2_perstn_m1_l: pcie30x2-perstn-m1-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie3x2_vcc3v3_en: pcie3x2-vcc3v3-en {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		pcie_4g_pwen: pcie-4g-pwen {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie3x4_rst: pcie3x4-rst {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		pcie30x4_perstn_m1_l: pcie30x4-perstn-m1-l {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		pcie3x4_vcc3v3_en: pcie3x4-vcc3v3-en {</div><div class='del'>-			rockchip,pins = &lt;2 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		pcie30x4_pwren_h: pcie30x4-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -238,3 +307,18 @@</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso<br/>index e9a3855e8752..2128ffcc3616 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;{/} {</div><div class='del'>-	vcc3v3_pcie2x1l1: vcc3v3-pcie2x1l1-regulator {</div><div class='add'>+	vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;; /* WIFI_3V3_EN */</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts<br/>index 00f660d50127..ff1ba5ed56ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +67,7 @@</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='ctx'> 		simple-audio-card,routing =</div><div class='hunk'>@@ -120,7 +121,29 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd0v85: pcie20-avdd0v85-regulator {</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie20_avdd0v85: regulator-pcie20-avdd0v85 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd0v85";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -130,7 +153,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avdd_0v85_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd1v8: pcie20-avdd1v8-regulator {</div><div class='add'>+	pcie20_avdd1v8: regulator-pcie20-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -140,7 +163,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v75: pcie30-avdd0v75-regulator {</div><div class='add'>+	pcie30_avdd0v75: regulator-pcie30-avdd0v75 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v75";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -150,7 +173,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -160,7 +183,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus5v0_typec: vbus5v0-typec-regulator {</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PD0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -172,7 +195,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -181,7 +204,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie30";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -194,7 +217,29 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;vcc3v3_pcie30_en&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc3v3_pciewl_vbat: regulator-vcc3v3-pciewl-vbat {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "wlan-vbat";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_wlan: regulator-vcc3v3-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio3 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_pwren&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "wlan-en";</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_pciewl_vbat&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -208,7 +253,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -218,7 +263,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usbdcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -228,7 +273,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -237,12 +282,26 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vccio_wl: regulator-vccio-wl {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "wlan-vddio";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;combphy0_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;combphy2_psu {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -300,6 +359,57 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver_cma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_rx_cec &amp;hdmim1_rx_hpdin &amp;hdmim1_rx_scl &amp;hdmim1_rx_sda &amp;hdmirx_hpd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -373,7 +483,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	es8388: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='hunk'>@@ -408,6 +518,30 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;, &lt;&amp;pcie2_0_wake&gt;, &lt;&amp;pcie2_0_clkreq&gt;, &lt;&amp;wifi_host_wake_irq&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_wlan&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x200000 0 0 0 0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		bus-range = &lt;0x20 0x2f&gt;;</div><div class='add'>+</div><div class='add'>+		wifi: wifi@0,0 {</div><div class='add'>+			compatible = "pci14e4,449d";</div><div class='add'>+			reg = &lt;0x210000 0 0 0 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+			clock-names = "lpo";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie2x1l1 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -427,6 +561,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	audio {</div><div class='ctx'> 		hp_detect: headphone-detect {</div><div class='hunk'>@@ -455,6 +593,12 @@</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='hunk'>@@ -462,6 +606,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_wake: pcie2-0-wake {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_clkreq: pcie2-0-clkreq {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie2_1_rst: pcie2-1-rst {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -492,6 +648,16 @@</div><div class='ctx'> 			rockchip,pins = &lt;3 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wlan {</div><div class='add'>+		wifi_host_wake_irq: wifi-host-wake-irq {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_pwren: wifi-pwren {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='hunk'>@@ -1256,3 +1422,25 @@</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts<br/>new file mode 100644<br/>index 000000000000..91fe810d38d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts</a></div><div class='hunk'>@@ -0,0 +1,931 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rockchip,rk3588-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RK3588 EVB2 V10 Board";</div><div class='add'>+	compatible = "rockchip,rk3588-evb2-v10", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "ext_clock";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * On the module itself this is one of these (depending</div><div class='add'>+		 * on the actual card populated):</div><div class='add'>+		 * - SDIO_RESET_L_WL_REG_ON</div><div class='add'>+		 * - PDN (power down when low)</div><div class='add'>+		 */</div><div class='add'>+		post-power-on-delay-ms = &lt;200&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usbdcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi {</div><div class='add'>+		wifi_enable_h: wifi-enable-h {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wifi_host_wake_irq: wifi-host-wake-irq {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdio {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdiom0_pins&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	disable-wp;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	brcmf: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake_irq&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_mem_s0: dcdc-reg5 {</div><div class='add'>+				/* regulator coupling requires always-on */</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_mem_s0";</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_mem_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_npu_mem_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_mem_s0: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_mem_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v1_nldo_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1100000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd1_1v8_ddr_s3: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd1_1v8_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_codec_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_codec_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_1v8_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_1v8_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2l_0v9_ddr_s3: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-name = "vdd2l_0v9_ddr_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_hdmi_edp_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_hdmi_edp_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@1 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x01&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;rk806_slave_dvs1_null&gt;, &lt;&amp;rk806_slave_dvs2_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_slave_dvs3_null&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big1_s0: dcdc-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big1_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big0_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big0_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big1_mem_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big1_mem_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big0_mem_s0: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_big0_mem_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_mem_s0: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_mem_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_cam_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_cam_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd1v8_ddr_pll_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd1v8_ddr_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_1v8_pll_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_1v8_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_sd_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_sd_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v8_cam_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_2v8_cam_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_pll_s0: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v85_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd_0v85_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_cam_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_cam_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi<br/>index 244c66faa161..fb48ddc04bcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-extra-pinctrl.dtsi</a></div><div class='hunk'>@@ -160,14 +160,15 @@</div><div class='ctx'> 		hdmim0_tx1_scl: hdmim0-tx1-scl {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim0_tx1_scl */</div><div class='del'>-				&lt;2 RK_PB5 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;2 RK_PB5 4 &amp;pcfg_pull_none_drv_level_3_smt&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/omit-if-no-ref/</div><div class='ctx'> 		hdmim0_tx1_sda: hdmim0-tx1-sda {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				/* hdmim0_tx1_sda */</div><div class='del'>-				&lt;2 RK_PB4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+				&lt;2 RK_PB4 4 &amp;pcfg_pull_none_drv_level_1_smt&gt;;</div><div class='add'>+</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi<br/>index 0ce0934ec6b7..6e5a58428bba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi</a></div><div class='hunk'>@@ -7,6 +7,46 @@</div><div class='ctx'> #include "rk3588-extra-pinctrl.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	hdmi1_sound: hdmi1-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;128&gt;;</div><div class='add'>+		simple-audio-card,name = "hdmi1";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;hdmi1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s6_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The 4k HDMI capture controller works only with 32bit</div><div class='add'>+		 * phys addresses and doesn't support IOMMU. HDMI RX CMA</div><div class='add'>+		 * must be reserved below 4GB.</div><div class='add'>+		 * The size of 160MB was determined as follows:</div><div class='add'>+		 * (3840 * 2160 pixels) * (4 bytes/pixel) * (2 frames/buffer) / 10^6 = 66MB</div><div class='add'>+		 * To ensure sufficient support for practical use-cases,</div><div class='add'>+		 * we doubled the 66MB value.</div><div class='add'>+		 */</div><div class='add'>+		hdmi_receiver_cma: hdmi-receiver-cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			alloc-ranges = &lt;0x0 0x0 0x0 0xffffffff&gt;;</div><div class='add'>+			size = &lt;0x0 (160 * 0x100000)&gt;; /* 160MiB */</div><div class='add'>+			alignment = &lt;0x0 0x40000&gt;; /* 64K */</div><div class='add'>+			no-map;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usb_host1_xhci: usb@fc400000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-dwc3", "snps,dwc3";</div><div class='ctx'> 		reg = &lt;0x0 0xfc400000 0x0 0x400000&gt;;</div><div class='hunk'>@@ -67,6 +107,26 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdptxphy1_grf: syscon@fd5e4000 {</div><div class='add'>+		compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";</div><div class='add'>+		reg = &lt;0x0 0xfd5e4000 0x0 0x100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_tx5: spdif-tx@fddb8000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfddb8000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF5_DP1_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF5&gt;, &lt;&amp;cru HCLK_SPDIF5_DP1&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac1 22&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s8_8ch: i2s@fddc8000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddc8000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -84,6 +144,21 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	spdif_tx4: spdif-tx@fdde8000 {</div><div class='add'>+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";</div><div class='add'>+		reg = &lt;0x0 0xfdde8000 0x0 0x1000&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;cru PLL_AUPLL&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_SPDIF4_SRC&gt;;</div><div class='add'>+		clock-names = "mclk", "hclk";</div><div class='add'>+		clocks = &lt;&amp;cru MCLK_SPDIF4&gt;, &lt;&amp;cru HCLK_SPDIF4&gt;;</div><div class='add'>+		dma-names = "tx";</div><div class='add'>+		dmas = &lt;&amp;dmac1 8&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s6_8ch: i2s@fddf4000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-i2s-tdm";</div><div class='ctx'> 		reg = &lt;0x0 0xfddf4000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -135,6 +210,137 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dp1: dp@fde60000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dp";</div><div class='add'>+		reg = &lt;0x0 0xfde60000 0x0 0x4000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru CLK_AUX16M_1&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;16000000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_DP1&gt;, &lt;&amp;cru CLK_AUX16M_1&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_DP1&gt;, &lt;&amp;cru MCLK_I2S8_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru MCLK_SPDIF5_DP1&gt;;</div><div class='add'>+		clock-names = "apb", "aux", "hdcp", "i2s", "spdif";</div><div class='add'>+		phys = &lt;&amp;usbdp_phy1 PHY_TYPE_DP&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO0&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_DP1&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			dp1_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dp1_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1: hdmi@fdea0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-dw-hdmi-qp";</div><div class='add'>+		reg = &lt;0x0 0xfdea0000 0x0 0x20000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru PCLK_HDMITX1&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMITX1_EARC&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMITX1_REF&gt;,</div><div class='add'>+			 &lt;&amp;cru MCLK_I2S6_8CH_TX&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMIHDP1&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_VO1&gt;;</div><div class='add'>+		clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1";</div><div class='add'>+		interrupts = &lt;GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "avp", "cec", "earc", "main", "hpd";</div><div class='add'>+		phys = &lt;&amp;hdptxphy1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hdmim2_tx1_cec &amp;hdmim0_tx1_hpd</div><div class='add'>+			     &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_HDMITX1_REF&gt;, &lt;&amp;cru SRST_HDMIHDP1&gt;;</div><div class='add'>+		reset-names = "ref", "hdp";</div><div class='add'>+		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='add'>+		rockchip,vo-grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			hdmi1_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hdmi1_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp1: edp@fded0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-edp";</div><div class='add'>+		reg = &lt;0x0 0xfded0000 0x0 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_EDP1_24M&gt;, &lt;&amp;cru PCLK_EDP1&gt;;</div><div class='add'>+		clock-names = "dp", "pclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		phys = &lt;&amp;hdptxphy1&gt;;</div><div class='add'>+		phy-names = "dp";</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_EDP1_24M&gt;, &lt;&amp;cru SRST_P_EDP1&gt;;</div><div class='add'>+		reset-names = "dp", "apb";</div><div class='add'>+		rockchip,grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			edp1_in: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			edp1_out: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi_receiver: hdmi_receiver@fdee0000 {</div><div class='add'>+		compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";</div><div class='add'>+		reg = &lt;0x0 0xfdee0000 0x0 0x6000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+			     &lt;GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+		interrupt-names = "cec", "hdmi", "dma";</div><div class='add'>+		clocks = &lt;&amp;cru ACLK_HDMIRX&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMIRX_AUD&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_CR_PARA&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_HDMIRX&gt;,</div><div class='add'>+			 &lt;&amp;cru CLK_HDMIRX_REF&gt;,</div><div class='add'>+			 &lt;&amp;cru PCLK_S_HDMIRX&gt;,</div><div class='add'>+			 &lt;&amp;cru HCLK_VO1&gt;;</div><div class='add'>+		clock-names = "aclk",</div><div class='add'>+			      "audio",</div><div class='add'>+			      "cr_para",</div><div class='add'>+			      "pclk",</div><div class='add'>+			      "ref",</div><div class='add'>+			      "hclk_s_hdmirx",</div><div class='add'>+			      "hclk_vo1";</div><div class='add'>+		memory-region = &lt;&amp;hdmi_receiver_cma&gt;;</div><div class='add'>+		power-domains = &lt;&amp;power RK3588_PD_VO1&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_A_HDMIRX&gt;, &lt;&amp;cru SRST_P_HDMIRX&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_HDMIRX_REF&gt;, &lt;&amp;cru SRST_A_HDMIRX_BIU&gt;;</div><div class='add'>+		reset-names = "axi", "apb", "ref", "biu";</div><div class='add'>+		rockchip,grf = &lt;&amp;sys_grf&gt;;</div><div class='add'>+		rockchip,vo1-grf = &lt;&amp;vo1_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie3x4: pcie@fe150000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";</div><div class='ctx'> 		#address-cells = &lt;3&gt;;</div><div class='hunk'>@@ -162,6 +368,7 @@</div><div class='ctx'> 		linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0000 &amp;its1 0x0000 0x1000&gt;;</div><div class='add'>+		iommu-map = &lt;0x0000 &amp;mmu600_pcie 0x0000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;4&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie30phy&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -248,6 +455,7 @@</div><div class='ctx'> 		linux,pci-domain = &lt;1&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		msi-map = &lt;0x1000 &amp;its1 0x1000 0x1000&gt;;</div><div class='add'>+		iommu-map = &lt;0x1000 &amp;mmu600_pcie 0x1000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		phys = &lt;&amp;pcie30phy&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -297,6 +505,7 @@</div><div class='ctx'> 		linux,pci-domain = &lt;2&gt;;</div><div class='ctx'> 		max-link-speed = &lt;2&gt;;</div><div class='ctx'> 		msi-map = &lt;0x2000 &amp;its0 0x2000 0x1000&gt;;</div><div class='add'>+		iommu-map = &lt;0x2000 &amp;mmu600_pcie 0x2000 0x1000&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		phys = &lt;&amp;combphy1_ps PHY_TYPE_PCIE&gt;;</div><div class='ctx'> 		phy-names = "pcie-phy";</div><div class='hunk'>@@ -395,6 +604,23 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdptxphy1: phy@fed70000 {</div><div class='add'>+		compatible = "rockchip,rk3588-hdptx-phy";</div><div class='add'>+		reg = &lt;0x0 0xfed70000 0x0 0x2000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru CLK_USB2PHY_HDPTXRXPHY_REF&gt;, &lt;&amp;cru PCLK_HDPTX1&gt;;</div><div class='add'>+		clock-names = "ref", "apb";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		resets = &lt;&amp;cru SRST_HDPTX1&gt;, &lt;&amp;cru SRST_P_HDPTX1&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_HDPTX1_INIT&gt;, &lt;&amp;cru SRST_HDPTX1_CMN&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_HDPTX1_LANE&gt;, &lt;&amp;cru SRST_HDPTX1_ROPLL&gt;,</div><div class='add'>+			 &lt;&amp;cru SRST_HDPTX1_LCPLL&gt;;</div><div class='add'>+		reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",</div><div class='add'>+			      "lcpll";</div><div class='add'>+		rockchip,grf = &lt;&amp;hdptxphy1_grf&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usbdp_phy1: phy@fed90000 {</div><div class='ctx'> 		compatible = "rockchip,rk3588-usbdp-phy";</div><div class='ctx'> 		reg = &lt;0x0 0xfed90000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -446,3 +672,24 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='add'>+		 &lt;&amp;cru HCLK_VOP&gt;,</div><div class='add'>+		 &lt;&amp;cru DCLK_VOP0&gt;,</div><div class='add'>+		 &lt;&amp;cru DCLK_VOP1&gt;,</div><div class='add'>+		 &lt;&amp;cru DCLK_VOP2&gt;,</div><div class='add'>+		 &lt;&amp;cru DCLK_VOP3&gt;,</div><div class='add'>+		 &lt;&amp;cru PCLK_VOP_ROOT&gt;,</div><div class='add'>+		 &lt;&amp;hdptxphy0&gt;,</div><div class='add'>+		 &lt;&amp;hdptxphy1&gt;;</div><div class='add'>+	clock-names = "aclk",</div><div class='add'>+		      "hclk",</div><div class='add'>+		      "dclk_vp0",</div><div class='add'>+		      "dclk_vp1",</div><div class='add'>+		      "dclk_vp2",</div><div class='add'>+		      "dclk_vp3",</div><div class='add'>+		      "pclk_vop",</div><div class='add'>+		      "pll_hdmiphy0",</div><div class='add'>+		      "pll_hdmiphy1";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi<br/>index 47e64d547ea9..4331cdc70f97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd0v85: pcie20-avdd0v85-regulator {</div><div class='add'>+	pcie20_avdd0v85: regulator-pcie20-avdd0v85 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd0v85";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd1v8: pcie20-avdd1v8-regulator {</div><div class='add'>+	pcie20_avdd1v8: regulator-pcie20-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v75: pcie30-avdd0v75-regulator {</div><div class='add'>+	pcie30_avdd0v75: regulator-pcie30-avdd0v75 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v75";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -69,7 +69,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc4v0_sys: vcc4v0-sys-regulator {</div><div class='add'>+	vcc4v0_sys: regulator-vcc4v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc4v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -205,6 +205,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	leds {</div><div class='ctx'> 		led_rgb_b: led-rgb-b {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi<br/>new file mode 100644<br/>index 000000000000..80e16ea4154c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi</a></div><div class='hunk'>@@ -0,0 +1,447 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "firefly,core-3588j", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: vdd_npu_mem_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "avcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "avdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rk3588 preferred debug out */</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi<br/>new file mode 100644<br/>index 000000000000..6726eeb49255<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi</a></div><div class='hunk'>@@ -0,0 +1,443 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "firefly,icore-3588q", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: vdd_npu_mem_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts b/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts<br/>new file mode 100644<br/>index 000000000000..e086114c7634<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts</a></div><div class='hunk'>@@ -0,0 +1,702 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "dt-bindings/usb/pd.h"</div><div class='add'>+</div><div class='add'>+#include "rk3588-firefly-core-3588j.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Firefly ITX-3588J";</div><div class='add'>+	compatible = "firefly,itx-3588j", "firefly,core-3588j", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * there are also a "Reset" and "Mask ROM" button, but the needed</div><div class='add'>+	 * settings are unknown at this time</div><div class='add'>+	 */</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;2000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		simple-audio-card,aux-devs = &lt;&amp;amp_headphones&gt;, &lt;&amp;amp_speaker&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;384&gt;;</div><div class='add'>+		simple-audio-card,name = "rockchip_es8323";</div><div class='add'>+		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Speaker Amplifier INL", "LOUT2",</div><div class='add'>+			"Speaker Amplifier INR", "ROUT2",</div><div class='add'>+			"Speaker", "Speaker Amplifier OUTL",</div><div class='add'>+			"Speaker", "Speaker Amplifier OUTR",</div><div class='add'>+			"Headphones Amplifier INL", "LOUT1",</div><div class='add'>+			"Headphones Amplifier INR", "ROUT1",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTL",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTR",</div><div class='add'>+			"LINPUT1", "Microphone Jack",</div><div class='add'>+			"RINPUT1", "Microphone Jack",</div><div class='add'>+			"LINPUT2", "Onboard Microphone",</div><div class='add'>+			"RINPUT2", "Onboard Microphone";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Microphone", "Onboard Microphone",</div><div class='add'>+			"Headphone", "Headphones",</div><div class='add'>+			"Speaker", "Speaker";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8323&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * this does not seem to be a proper "amplifier" but is just</div><div class='add'>+	 * a way to control the GPIO pins to switch on or off the given</div><div class='add'>+	 * sound output device</div><div class='add'>+	 */</div><div class='add'>+	amp_headphones: headphones-audio-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;headphone_amplifier_en&gt;;</div><div class='add'>+		sound-name-prefix = "Headphones Amplifier";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amp_speaker: speaker-audio-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_amplifier_en&gt;;</div><div class='add'>+		sound-name-prefix = "Speaker Amplifier";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cooling-levels = &lt;0 120 150 180 210 240 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm15 0 50000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * There is also a Power LED control @ RK_PB3 on</div><div class='add'>+		 * GPIO1 but for some reason it doesn't seem to work right</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		user_led: led-1 {</div><div class='add'>+			gpios = &lt;&amp;pca9555 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "disk-activity";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie30_avdd0v75: regulator-pcie30-avdd0v75 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-name = "pcie30_avdd0v75";</div><div class='add'>+		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec_pwr_en: regulator-vbus5v0-typec-pwr-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie3_vcc3v3_en&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host3: regulator-vcc5v0-host3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host3";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_fan_pwr_en: regulator-vcc-fan-pwr-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "vcc_fan_pwr_en";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_hub_reset: regulator-vcc-hub-reset {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "vcc_hub_reset";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_hub3_reset: regulator-vcc-hub3-reset {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-name = "vcc_hub3_reset";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sata_pwr_en: regulator-vcc-sata-pwr-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;pca9555 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "vcc_sata_pwr_en";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;avcc_1v8_s0 {</div><div class='add'>+	regulator-state-mem {</div><div class='add'>+		regulator-on-in-suspend;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_tx_bus2</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_rgmii_clk</div><div class='add'>+		     &amp;gmac0_rgmii_bus&gt;;</div><div class='add'>+	tx_delay = &lt;0x45&gt;;</div><div class='add'>+	rx_delay = &lt;0x4a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	tx_delay = &lt;0x42&gt;;</div><div class='add'>+	rx_delay = &lt;0x4f&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * in the Firefly BSP source this was confusingly called an</div><div class='add'>+	 * "ES8388" - it actually seems to be an ES8323 and the drivers</div><div class='add'>+	 * for that work best</div><div class='add'>+	 */</div><div class='add'>+	es8323: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8323";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pca9555: gpio@21 {</div><div class='add'>+		compatible = "nxp,pca9555";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec_pwr_en&gt;;</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio1 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	dp {</div><div class='add'>+		dp1_hpd: dp1-hpd {</div><div class='add'>+			 rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3_rst: pcie3-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_vcc3v3_en: pcie3-vcc3v3-en {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		headphone_amplifier_en: headphone-amplifier-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		speaker_amplifier_en: speaker-amplifier-en {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm15 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm15m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sata0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sata1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sata2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart/232/485 */</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1m1_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb enable */</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dwc3_0_role_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc_1v8_s0 {</div><div class='add'>+	regulator-state-mem {</div><div class='add'>+		regulator-on-in-suspend;</div><div class='add'>+		regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* for fan when deep sleep */</div><div class='add'>+&amp;vdd_log_s0 {</div><div class='add'>+	regulator-state-mem {</div><div class='add'>+		regulator-on-in-suspend;</div><div class='add'>+		regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* display generator */</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts<br/>index 83103e4c7216..5fbbeb6f5a93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588-friendlyelec-cm3588.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +39,7 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;headphone_detect&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,name = "realtek,rt5616-codec";</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +90,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ir-receiver {</div><div class='ctx'> 		compatible = "gpio-ir-receiver";</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -307,6 +319,37 @@</div><div class='ctx'> 		"", "", "", "";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver_cma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_rx_cec &amp;hdmim1_rx_hpdin &amp;hdmim1_rx_scl &amp;hdmim1_rx_sda &amp;hdmirx_hpd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Connected to MIPI-DSI0 */</div><div class='ctx'> &amp;i2c5 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -446,6 +489,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie {</div><div class='ctx'> 		pcie2_0_rst: pcie2-0-rst {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -776,3 +825,18 @@</div><div class='ctx'> &amp;usbdp_phy1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi<br/>index e3a9598b99fc..af431fdcbea7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a></div><div class='hunk'>@@ -222,6 +222,10 @@</div><div class='ctx'> 		compatible = "realtek,rt5616";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -256,6 +260,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	gpio-leds {</div><div class='ctx'> 		led_sys_pin: led-sys-pin {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts<br/>new file mode 100644<br/>index 000000000000..73d8ce4fde2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts</a></div><div class='hunk'>@@ -0,0 +1,830 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "H96 Max V58 TV Box";</div><div class='add'>+	compatible = "haochuangyi,h96-max-v58", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-function {</div><div class='add'>+			label = "Reset";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1750&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		compatible = "gpio-ir-receiver";</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;ir_receiver_pin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-1v1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_3v3: regulator-3v3-pcie {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie2_0_pow&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		regulator-name = "pcie_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wl_en_3v3: regulator-3v3-wlen {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;wl_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		/*</div><div class='add'>+		 * Needs to be brought up before the PCIe driver is probed,</div><div class='add'>+		 * otherwise detecting the WLAN module requires rescanning</div><div class='add'>+		 * the bus, and even then it fails half of the time during</div><div class='add'>+		 * firmware load</div><div class='add'>+		 */</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "wl_en_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_otg: regulator-5v0-otg {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_otg_en&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_dit: spdif-dit {</div><div class='add'>+		compatible = "linux,spdif-dit";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	spdif_sound: spdif-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "SPDIF";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;spdif_tx0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;spdif_dit&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		/* RTL8211F */</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x200000 0 0 0 0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		bus-range = &lt;0x20 0x2f&gt;;</div><div class='add'>+</div><div class='add'>+		wifi: wifi@0,0 {</div><div class='add'>+			compatible = "pci14e4,449d";</div><div class='add'>+			reg = &lt;0x210000 0 0 0 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+			clock-names = "lpo";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ir-receiver {</div><div class='add'>+		ir_receiver_pin: ir-receiver-pin {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_pins: led-pins {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_pow: pcie2-0-pow {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211f {</div><div class='add'>+		rtl8211f_rst: rtl8211f-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_otg_en: vcc5v0-otg-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifibt {</div><div class='add'>+		wl_en: wl-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wl_wake_host: wl-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_en: bt-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake: bt-wake {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spdif_tx0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spdif0m1_tx&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_otg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart9 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart9m0_xfer &amp;uart9m0_ctsn &amp;uart9m0_rtsn&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_en&gt;, &lt;&amp;bt_wake_host&gt;, &lt;&amp;bt_wake&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio0 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso b/arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso<br/>new file mode 100644<br/>index 000000000000..7d9b1f080b3f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-jaguar-ethernet-switch.dtso</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * Device Tree Overlay for the Ethernet Switch adapter for the Mezzanine</div><div class='add'>+ * connector on RK3588 Jaguar</div><div class='add'>+ * (manual: https://embedded.cherry.de/jaguar-ethernet-switch-user-manual/)</div><div class='add'>+ *</div><div class='add'>+ * This adapter has a KSZ9896 Ethernet Switch with 4 1GbE Ethernet connectors,</div><div class='add'>+ * two user controllable LEDs, and an M12 12-pin connector which exposes the</div><div class='add'>+ * following signals:</div><div class='add'>+ *  - RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2)</div><div class='add'>+ *  - two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4)</div><div class='add'>+ *  - two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to GPIO3_D1)</div><div class='add'>+ *  - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2)</div><div class='add'>+ *</div><div class='add'>+ * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin</div><div class='add'>+ * connector (12-24V).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/rockchip,rk3588-cru.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = "/ethernet@fe1c0000";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mezzanine-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_usr1_pin &amp;led_usr2_pin&gt;;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "USR1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "USR2";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus</div><div class='add'>+		     &amp;eth1_pins&gt;;</div><div class='add'>+	rx_delay = &lt;0x0&gt;;</div><div class='add'>+	tx_delay = &lt;0x0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	fixed-link {</div><div class='add'>+		speed = &lt;1000&gt;;</div><div class='add'>+		full-duplex;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	/*</div><div class='add'>+	 * ADS1015 can handle high-speed (HS) mode (up to 3.4MHz) on I2C bus,</div><div class='add'>+	 * but SoC can handle only up to 400kHz.</div><div class='add'>+	 */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc@48 {</div><div class='add'>+		compatible = "ti,ads1015";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;adc_alert&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;5&gt;; /* Single-ended between AIN1 and GND */</div><div class='add'>+			ti,datarate = &lt;0&gt;;</div><div class='add'>+			ti,gain = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;6&gt;; /* Single-ended between AIN2 and GND */</div><div class='add'>+			ti,datarate = &lt;0&gt;;</div><div class='add'>+			ti,gain = &lt;5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch@5f {</div><div class='add'>+		compatible = "microchip,ksz9896";</div><div class='add'>+		reg = &lt;0x5f&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB7 IRQ_TYPE_EDGE_FALLING&gt;; /* ETH_INTRP_N */</div><div class='add'>+		pinctrl-0 = &lt;&amp;eth_reset_n &amp;eth_intrp_n&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB6 GPIO_ACTIVE_LOW&gt;; /* ETH_RESET */</div><div class='add'>+		microchip,synclko-disable; /* CLKO_25_125 only routed to TP1 */</div><div class='add'>+</div><div class='add'>+		ethernet-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			lan1: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				label = "ETH1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lan2: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "ETH2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lan3: port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				label = "ETH3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lan4: port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				label = "ETH4";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				ethernet = &lt;&amp;gmac1&gt;;</div><div class='add'>+				label = "CPU";</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+				tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+</div><div class='add'>+				fixed-link {</div><div class='add'>+					speed = &lt;1000&gt;;</div><div class='add'>+					full-duplex;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	adc {</div><div class='add'>+		adc_alert: adc-alert-irq {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ethernet {</div><div class='add'>+		eth_intrp_n: eth-intrp-n {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth_reset_n: eth-reset-n {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_usr1_pin: led-usr1-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_usr2_pin: led-usr2-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;3 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart9 {</div><div class='add'>+	/* GPIO3_D0/EN_RS485_MODE for switching between RS232 and RS485 */</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart9m2_xfer &amp;uart9m2_rtsn&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso b/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso<br/>new file mode 100644<br/>index 000000000000..9d44dfe2f30d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * Device Tree Overlay for the Pre-ICT tester adapter for the Mezzanine</div><div class='add'>+ * connector on RK3588 Jaguar.</div><div class='add'>+ *</div><div class='add'>+ * This adapter has a PCIe Gen2 x1 M.2 M-Key connector and two proprietary</div><div class='add'>+ * camera connectors (each their own I2C bus, clock, reset and PWM lines as well</div><div class='add'>+ * as 2-lane CSI).</div><div class='add'>+ *</div><div class='add'>+ * This adapter routes some GPIOs to power rails and loops together some other</div><div class='add'>+ * GPIOs.</div><div class='add'>+ *</div><div class='add'>+ * This adapter is used during manufacturing for validating proper soldering of</div><div class='add'>+ * the mezzanine connector.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	pre_ict_tester_vcc_1v2: regulator-pre-ict-tester-vcc-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pre_ict_tester_vcc_1v2";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pre_ict_tester_vcc_2v8: regulator-pre-ict-tester-vcc-2v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "pre_ict_tester_vcc_2v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pre_ict_pwr2gpio&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2x1l2_perstn_m0&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;; /* PCIE20X1_2_PERSTN_M0 */</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pcie2x1l2 {</div><div class='add'>+		pcie2x1l2_perstn_m0: pcie2x1l2-perstn-m0 {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pre-ict-tester {</div><div class='add'>+		pre_ict_pwr2gpio: pre-ict-pwr2gpio-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_A3 requires two power rails to be properly</div><div class='add'>+			 * routed to the mezzanine connector to report a proper</div><div class='add'>+			 * value: VCC_1V8_S0_1 and VCC_IN_2. It may report an</div><div class='add'>+			 * incorrect value if VCC_1V8_S0_1 isn't properly routed,</div><div class='add'>+			 * but GPIO3_C6 would catch this HW soldering issue.</div><div class='add'>+			 * If VCC_IN_2 is properly routed, GPIO3_A3 should be</div><div class='add'>+			 * LOW. The signal shall not read HIGH in the event</div><div class='add'>+			 * GPIO3_A3 isn't properly routed due to soldering</div><div class='add'>+			 * issue. Therefore, let's enforce a pull-up (which is</div><div class='add'>+			 * the SoC default for this pin).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_A4 is directly routed to VCC_1V8_S0_2 power</div><div class='add'>+			 * rail. It should be HIGH if all is properly soldered.</div><div class='add'>+			 * To guarantee that, a pull-down is enforced (which is</div><div class='add'>+			 * the SoC default for this pin) so that LOW is read if</div><div class='add'>+			 * the loop doesn't exist on HW (soldering issue on</div><div class='add'>+			 * either signals).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_B2 requires two power rails to be properly</div><div class='add'>+			 * routed to the mezzanine connector to report a proper</div><div class='add'>+			 * value: VCC_1V8_S0_1 and VCC_IN_1. It may report an</div><div class='add'>+			 * incorrect value if VCC_1V8_S0_1 isn't properly routed,</div><div class='add'>+			 * but GPIO3_C6 would catch this HW soldering issue.</div><div class='add'>+			 * If VCC_IN_1 is properly routed, GPIO3_B2 should be</div><div class='add'>+			 * LOW. This is an issue if GPIO3_B2 isn't properly</div><div class='add'>+			 * routed due to soldering issue, because GPIO3_B2</div><div class='add'>+			 * default bias is pull-down therefore being LOW. So</div><div class='add'>+			 * the worst case scenario and the pass scenario expect</div><div class='add'>+			 * the same value. Make GPIO3_B2 a pull-up so that a</div><div class='add'>+			 * soldering issue on GPIO3_B2 reports HIGH but proper</div><div class='add'>+			 * soldering reports LOW.</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_C6 is directly routed to VCC_1V8_S0_1 power</div><div class='add'>+			 * rail. It should be HIGH if all is properly soldered.</div><div class='add'>+			 * This is an issue if GPIO3_C6 or VCC_1V8_S0_1 isn't</div><div class='add'>+			 * properly routed due to soldering issue, because</div><div class='add'>+			 * GPIO3_C6 default bias is pull-up therefore being HIGH</div><div class='add'>+			 * in all cases:</div><div class='add'>+			 *  - GPIO3_C6 is floating (so HIGH) if GPIO3_C6 is not</div><div class='add'>+			 *    routed properly,</div><div class='add'>+			 *  - GPIO3_C6 is floating (so HIGH) if VCC_1V8_S0_1 is</div><div class='add'>+			 *    not routed properly,</div><div class='add'>+			 *  - GPIO3_C6 is HIGH if everything is proper,</div><div class='add'>+			 * Make GPIO3_C6 a pull-down so that a soldering issue</div><div class='add'>+			 * on GPIO3_C6 or VCC_1V8_S0_1 reports LOW but proper</div><div class='add'>+			 * soldering reports HIGH.</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_D2 is routed to VCC_5V0_1 power rail through a</div><div class='add'>+			 * voltage divider on the adapter.</div><div class='add'>+			 * It should be HIGH if all is properly soldered.</div><div class='add'>+			 * To guarantee that, a pull-down is enforced (which is</div><div class='add'>+			 * the SoC default for this pin) so that LOW is read if</div><div class='add'>+			 * the loop doesn't exist on HW (soldering issue on</div><div class='add'>+			 * either signals).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_D3 is routed to VCC_5V0_2 power rail through a</div><div class='add'>+			 * voltage divider on the adapter.</div><div class='add'>+			 * It should be HIGH if all is properly soldered.</div><div class='add'>+			 * To guarantee that, a pull-down is enforced (which is</div><div class='add'>+			 * the SoC default for this pin) so that LOW is read if</div><div class='add'>+			 * the loop doesn't exist on HW (soldering issue on</div><div class='add'>+			 * either signals).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_D4 is routed to VCC_3V3_S3_1 power rail through</div><div class='add'>+			 * a voltage divider on the adapter.</div><div class='add'>+			 * It should be HIGH if all is properly soldered.</div><div class='add'>+			 * To guarantee that, a pull-down is enforced (which is</div><div class='add'>+			 * the SoC default for this pin) so that LOW is read if</div><div class='add'>+			 * the loop doesn't exist on HW (soldering issue on</div><div class='add'>+			 * either signals).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+			/*</div><div class='add'>+			 * GPIO3_D5 is routed to VCC_3V3_S3_2 power rail through</div><div class='add'>+			 * a voltage divider on the adapter.</div><div class='add'>+			 * It should be HIGH if all is properly soldered.</div><div class='add'>+			 * To guarantee that, a pull-down is enforced (which is</div><div class='add'>+			 * the SoC default for this pin) so that LOW is read if</div><div class='add'>+			 * the loop doesn't exist on HW (soldering issue on</div><div class='add'>+			 * either signals).</div><div class='add'>+			 */</div><div class='add'>+				&lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts<br/>index 31d2f8994f85..176925d0a1a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts</a></div><div class='hunk'>@@ -8,7 +8,9 @@</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk8xx.h"</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -32,6 +34,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;gmac0;</div><div class='add'>+		i2c10 = &amp;i2c10;</div><div class='ctx'> 		mmc0 = &amp;sdhci;</div><div class='ctx'> 		mmc1 = &amp;sdmmc;</div><div class='ctx'> 		rtc0 = &amp;rtc_twi;</div><div class='hunk'>@@ -42,7 +45,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* DCIN is 12-24V but standard is 12V */</div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -58,6 +61,17 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio2 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -98,7 +112,7 @@</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -108,7 +122,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v2_s3: vcc-1v2-s3-regulator {</div><div class='add'>+	vcc_1v2_s3: regulator-vcc-1v2-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v2_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -119,7 +133,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Exposed on P14 and P15 */</div><div class='del'>-	vcc_2v8_s3: vcc-2v8-s3-regulator {</div><div class='add'>+	vcc_2v8_s3: regulator-vcc-2v8-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_2v8_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -129,7 +143,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v0_usb_a: vcc-5v0-usb-a-regulator {</div><div class='add'>+	vcc_5v0_usb_a: regulator-vcc-5v0-usb-a {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "usb_a_vcc";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -139,7 +153,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v0_usb_c1: vcc-5v0-usb-c1-regulator {</div><div class='add'>+	vcc_5v0_usb_c1: regulator-vcc-5v0-usb-c1 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "5v_usbc1";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -149,7 +163,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v0_usb_c2: vcc-5v0-usb-c2-regulator {</div><div class='add'>+	vcc_5v0_usb_c2: regulator-vcc-5v0-usb-c2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "5v_usbc2";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -159,7 +173,7 @@</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_mdot2: vcc3v3-mdot2-regulator {</div><div class='add'>+	vcc3v3_mdot2: regulator-vcc3v3-mdot2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_mdot2";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -169,7 +183,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -179,7 +193,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -271,13 +285,107 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	/* No CEC on Jaguar */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_hpd &amp;hdmim0_tx0_scl &amp;hdmim0_tx0_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	fan@18 {</div><div class='del'>-		compatible = "ti,amc6821";</div><div class='add'>+		compatible = "tsd,mule", "ti,amc6821";</div><div class='ctx'> 		reg = &lt;0x18&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-mux {</div><div class='add'>+			compatible = "tsd,mule-i2c-mux";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@0 {</div><div class='add'>+				reg = &lt;0x0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				rtc_twi: rtc@6f {</div><div class='add'>+					compatible = "isil,isl1208";</div><div class='add'>+					reg = &lt;0x6f&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	typec-portc@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cc_int1&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vcc_5v0_usb_c1&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USBC-1 P11";</div><div class='add'>+			power-role = "source";</div><div class='add'>+			self-powered;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			vbus-supply = &lt;&amp;vcc_5v0_usb_c1&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host0_xhci_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_npu_s0: regulator@42 {</div><div class='hunk'>@@ -313,11 +421,6 @@</div><div class='ctx'> 			regulator-off-in-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	rtc_twi: rtc@6f {</div><div class='del'>-		compatible = "isil,isl1208";</div><div class='del'>-		reg = &lt;0x6f&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='hunk'>@@ -346,6 +449,56 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c8m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	typec-portc@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;cc_int2&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vcc_5v0_usb_c2&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USBC-2 P12";</div><div class='add'>+			power-role = "source";</div><div class='add'>+			self-powered;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			vbus-supply = &lt;&amp;vcc_5v0_usb_c2&gt;;</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc1_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host1_xhci_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc1_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy1_typec_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usbc1_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy1_typec_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_cpu_big0_s0: regulator@42 {</div><div class='ctx'> 		compatible = "rockchip,rk8602";</div><div class='ctx'> 		reg = &lt;0x42&gt;;</div><div class='hunk'>@@ -364,6 +517,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdio0 {</div><div class='ctx'> 	rgmii_phy: ethernet-phy@6 {</div><div class='ctx'> 		/* KSZ9031 or KSZ9131 */</div><div class='hunk'>@@ -403,6 +560,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	emmc {</div><div class='ctx'> 		emmc_reset: emmc-reset {</div><div class='hunk'>@@ -435,6 +596,26 @@</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PC7 12 &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb3 {</div><div class='add'>+		cc_int1: cc-int1 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cc_int2: cc-int2 {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		typec0_sbu_dc_pins: typec0-sbu-dc-pins {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+					&lt;1 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		typec1_sbu_dc_pins: typec1-sbu-dc-pins {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;,</div><div class='add'>+					&lt;1 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;saradc {</div><div class='hunk'>@@ -455,7 +636,6 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_cmd &amp;emmc_clk &amp;emmc_data_strobe&gt;;</div><div class='del'>-	supports-cqe;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -514,6 +694,7 @@</div><div class='ctx'> 		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='ctx'> 		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		rockchip,reset-mode = &lt;RK806_RESTART&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='ctx'> 			pins = "gpio_pwrctrl1";</div><div class='hunk'>@@ -803,6 +984,24 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* USB-C P11 connector */</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB-C P12 connector */</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -845,6 +1044,56 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Type-C on P11 */</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;typec0_sbu_dc_pins&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;; /* Q7_USB_C0_SBU1_DC */</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;; /* Q7_USB_C0_SBU2_DC */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Type-C on P12 */</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	orientation-switch;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;typec1_sbu_dc_pins&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;; /* Q7_USB_C1_SBU1_DC */</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_HIGH&gt;; /* Q7_USB_C1_SBU2_DC */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy1_typec_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc1_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy1_typec_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc1_sbu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* host0 on P10 USB-A */</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -855,6 +1104,36 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* host0 on P11 USB-C */</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usb_host0_xhci_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* host1 on P12 USB-C */</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usb_host1_xhci_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc1_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* host1 on M.2 E-key */</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -864,3 +1143,18 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts<br/>new file mode 100644<br/>index 000000000000..78a4e896f665<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts</a></div><div class='hunk'>@@ -0,0 +1,336 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2024 MNT Research GmbH</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rk3588-firefly-icore-3588q.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "MNT Reform 2 with RCORE RK3588 Module";</div><div class='add'>+	compatible = "mntre,reform2-rcore", "firefly,icore-3588q", "rockchip,rk3588";</div><div class='add'>+	chassis-type = "laptop";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		brightness-levels = &lt;0 8 16 32 64 128 160 200 255&gt;;</div><div class='add'>+		default-brightness-level = &lt;128&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm8 0 10000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac0_clkin: external-gmac0-clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+		clock-output-names = "gmac0_clkin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "pcie30_avdd1v8";</div><div class='add'>+		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie30_avdd0v75: regulator-pcie30-avdd0v75 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-name = "pcie30_avdd0v75";</div><div class='add'>+		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_tx_bus2</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_rgmii_clk</div><div class='add'>+		     &amp;gmac0_rgmii_bus</div><div class='add'>+		     &amp;gmac0_clkinout</div><div class='add'>+		     &amp;eth_phy_reset&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp2: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp2_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "nxp,pcf8523";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy: ethernet-phy@0 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_reset&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio1 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	dp {</div><div class='add'>+		dp1_hpd: dp1-hpd {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3_reset: pcie3-reset {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth_phy {</div><div class='add'>+		eth_phy_reset: eth-phy-reset {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm8 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm8m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;40000000&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp2 {</div><div class='add'>+	vp2_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts<br/>index 2d92bbb4027d..ff855064be08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6-lts.dts</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> 	compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";</div><div class='ctx'> </div><div class='ctx'> 	/* provide power for on-board USB 2.0 hub */</div><div class='del'>-	vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {</div><div class='add'>+	vcc5v0_usb20_host: regulator-vcc5v0-usb20-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts<br/>index 92321c1d3ff1..40290a81bb9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> 	model = "FriendlyElec NanoPC-T6";</div><div class='ctx'> 	compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";</div><div class='ctx'> </div><div class='del'>-	vdd_4g_3v3: vdd-4g-3v3-regulator {</div><div class='add'>+	vdd_4g_3v3: regulator-vdd-4g-3v3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC6 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi<br/>index fc131789b4c3..fafeabe9adf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -40,6 +41,28 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ir-receiver {</div><div class='ctx'> 		compatible = "gpio-ir-receiver";</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_LOW&gt;;</div><div class='hunk'>@@ -75,7 +98,7 @@</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> </div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='ctx'> 			"Headphone", "Headphones",</div><div class='hunk'>@@ -94,7 +117,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -104,7 +127,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* vcc5v0_sys powers peripherals */</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -115,7 +138,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* vcc4v0_sys powers the RK806, RK860's */</div><div class='del'>-	vcc4v0_sys: vcc4v0-sys-regulator {</div><div class='add'>+	vcc4v0_sys: regulator-vcc4v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc4v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -125,7 +148,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc-1v1-nldo-s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -135,7 +158,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc4v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {</div><div class='add'>+	vcc_3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_3v3_pcie20";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -145,21 +168,31 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus5v0_typec: vbus5v0-typec-regulator {</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='ctx'> 		regulator-name = "vbus5v0_typec";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {</div><div class='add'>+	vbus5v0_usb: regulator-vbus5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_usb";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -171,7 +204,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio2 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -183,7 +216,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sd_s0: vcc3v3-sd-s0-regulator {</div><div class='add'>+	vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -318,6 +351,65 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver_cma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_rx_cec &amp;hdmim1_rx_hpdin &amp;hdmim1_rx_scl &amp;hdmim1_rx_sda &amp;hdmirx_hpd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -380,24 +472,30 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='del'>-	clock-frequency = &lt;200000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	fusb302: typec-portc@22 {</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='ctx'> 		compatible = "fcs,fusb302";</div><div class='ctx'> 		reg = &lt;0x22&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='ctx'> 		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='ctx'> 		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+		status = "okay";</div><div class='ctx'> </div><div class='ctx'> 		connector {</div><div class='ctx'> 			compatible = "usb-c-connector";</div><div class='ctx'> 			data-role = "dual";</div><div class='ctx'> 			label = "USB-C";</div><div class='del'>-			power-role = "source";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			/* fusb302 supports PD Rev 2.0 Ver 1.2 */</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x2&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='ctx'> 			source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+			typec-power-opmode = "1.5A";</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -485,6 +583,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie2x1l0 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie20&gt;;</div><div class='hunk'>@@ -519,6 +625,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	gpio-leds {</div><div class='ctx'> 		sys_led_pin: sys-led-pin {</div><div class='hunk'>@@ -530,6 +640,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	headphone {</div><div class='ctx'> 		hp_det: hp-det {</div><div class='ctx'> 			rockchip,pins = &lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -575,6 +691,10 @@</div><div class='ctx'> 			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		usb5v_pwren: usb5v_pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		usbc0_int: usbc0-int {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -628,6 +748,7 @@</div><div class='ctx'> 		spi-max-frequency = &lt;104000000&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -973,6 +1094,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2_host {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1012,6 +1141,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	phy-supply = &lt;&amp;vbus5v0_usb&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1021,9 +1155,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_host0_xhci {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='ctx'> 		usb_host0_xhci_drd_sw: endpoint {</div><div class='hunk'>@@ -1032,6 +1165,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1039,3 +1177,25 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts b/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts<br/>index c2a08bdf09e8..fbe1d5c06d90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -109,7 +109,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc1v8_sys: vcc1v8-sys-regulator {</div><div class='add'>+	vcc1v8_sys: regulator-vcc1v8-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc1v8_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {</div><div class='add'>+	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -128,7 +128,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {</div><div class='add'>+	vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -137,7 +137,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3_pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3_pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie30";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -147,7 +147,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_sys: vcc3v3-sys-regulator {</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -157,7 +157,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -312,6 +312,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	pcie2 {</div><div class='ctx'> 		pcie2_0_rst: pcie2-0-rst {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi<br/>new file mode 100644<br/>index 000000000000..9343dfc86941<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-compact.dtsi</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rk3588-orangepi-5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		/* USB_OTG_PWREN */</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb30_otg";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;headphone_amp {</div><div class='add'>+	/* PHONE_CTL */</div><div class='add'>+	enable-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;analog_sound {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+	simple-audio-card,aux-devs = &lt;&amp;headphone_amp&gt;;</div><div class='add'>+	simple-audio-card,hp-det-gpios = &lt;&amp;gpio3 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+	simple-audio-card,routing =</div><div class='add'>+		"Headphones", "LOUT1",</div><div class='add'>+		"Headphones", "ROUT1",</div><div class='add'>+		"LINPUT1", "Microphone Jack",</div><div class='add'>+		"RINPUT1", "Microphone Jack",</div><div class='add'>+		"LINPUT2", "Onboard Microphone",</div><div class='add'>+		"RINPUT2", "Onboard Microphone";</div><div class='add'>+	simple-audio-card,widgets =</div><div class='add'>+		"Microphone", "Microphone Jack",</div><div class='add'>+		"Microphone", "Onboard Microphone",</div><div class='add'>+		"Headphone", "Headphones";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fan {</div><div class='add'>+	/* FAN_CTL_H */</div><div class='add'>+	pwms = &lt;&amp;pwm9 0 50000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hym8563 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+	interrupts = &lt;RK_PC4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_blue_pwm {</div><div class='add'>+	/* PWM_LED1 */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* phy2 */</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie_eth&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		rtc_int_l: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren: usb-host-pwren {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wireless-bluetooth {</div><div class='add'>+		bt_reg_on: bt-reg-on {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bt_wake_host: bt-wake-host {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_down&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		host_wake_bt: host-wake-bt {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm4m0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm5m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm9 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm9m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspim2_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb30_otg&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb20&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7m0_xfer &amp;uart7m0_ctsn &amp;uart7m0_rtsn&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio4 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_reg_on&gt;, &lt;&amp;host_wake_bt&gt;, &lt;&amp;bt_wake_host&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pcie eth. not a real regulator. 33VAUX */</div><div class='add'>+&amp;vcc3v3_pcie_eth {</div><div class='add'>+	/* Ethernet_power_en */</div><div class='add'>+	gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Represents the vcc5v0_usb20 and vcc5v0_usb30 in the schematic,</div><div class='add'>+ * both regulators share the same enable gpio</div><div class='add'>+ */</div><div class='add'>+&amp;vcc5v0_usb20 {</div><div class='add'>+	/* USB_HOST_PWREN */</div><div class='add'>+	gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb_host_pwren&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts<br/>new file mode 100644<br/>index 000000000000..8b1d35760c3b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588-orangepi-5-compact.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Xunlong Orange Pi 5 Max";</div><div class='add'>+	compatible = "xunlong,orangepi-5-max", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx1_cec &amp;hdmim0_tx1_hpd</div><div class='add'>+			     &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_blue_pwm {</div><div class='add'>+	pwms = &lt;&amp;pwm4 0 25000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_green_pwm {</div><div class='add'>+	pwms = &lt;&amp;pwm5 0 25000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_otg_pwren: usb-otg-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts<br/>index c3a6812cc93a..9950d1147e12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts</a></div><div class='hunk'>@@ -6,63 +6,35 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='del'>-#include "rk3588.dtsi"</div><div class='add'>+#include "rk3588-orangepi-5.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Xunlong Orange Pi 5 Plus";</div><div class='ctx'> 	compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588";</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		mmc0 = &amp;sdhci;</div><div class='del'>-		mmc1 = &amp;sdmmc;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	adc-keys-0 {</div><div class='del'>-		compatible = "adc-keys";</div><div class='del'>-		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='del'>-		io-channel-names = "buttons";</div><div class='del'>-		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='del'>-		poll-interval = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		button-maskrom {</div><div class='del'>-			label = "Mask Rom";</div><div class='del'>-			linux,code = &lt;KEY_SETUP&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;2000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='ctx'> </div><div class='del'>-	adc-keys-1 {</div><div class='del'>-		compatible = "adc-keys";</div><div class='del'>-		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='del'>-		io-channel-names = "buttons";</div><div class='del'>-		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='del'>-		poll-interval = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		button-recovery {</div><div class='del'>-			label = "Recovery";</div><div class='del'>-			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;2000&gt;;</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	speaker_amp: speaker-audio-amplifier {</div><div class='del'>-		compatible = "simple-audio-amplifier";</div><div class='del'>-		enable-gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		sound-name-prefix = "Speaker Amp";</div><div class='del'>-	};</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='ctx'> </div><div class='del'>-	headphone_amp: headphones-audio-amplifier {</div><div class='del'>-		compatible = "simple-audio-amplifier";</div><div class='del'>-		enable-gpios = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		sound-name-prefix = "Headphones Amp";</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ir-receiver {</div><div class='hunk'>@@ -72,39 +44,6 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_receiver_pin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gpio-leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;blue_led_pin&gt;;</div><div class='del'>-</div><div class='del'>-		led {</div><div class='del'>-			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-			function = LED_FUNCTION_INDICATOR;</div><div class='del'>-			function-enumerator = &lt;1&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fan: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		cooling-levels = &lt;0 70 75 80 100&gt;;</div><div class='del'>-		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm3 0 50000 0&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwm-leds {</div><div class='del'>-		compatible = "pwm-leds";</div><div class='del'>-</div><div class='del'>-		led {</div><div class='del'>-			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-			function = LED_FUNCTION_INDICATOR;</div><div class='del'>-			function-enumerator = &lt;2&gt;;</div><div class='del'>-			max-brightness = &lt;255&gt;;</div><div class='del'>-			pwms = &lt;&amp;pwm2 0 25000 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	rfkill {</div><div class='ctx'> 		compatible = "rfkill-gpio";</div><div class='ctx'> 		label = "rfkill-pcie-wlan";</div><div class='hunk'>@@ -112,113 +51,63 @@</div><div class='ctx'> 		shutdown-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sound {</div><div class='del'>-		compatible = "simple-audio-card";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='del'>-		simple-audio-card,name = "Analog";</div><div class='del'>-		simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;, &lt;&amp;headphone_amp&gt;;</div><div class='del'>-		simple-audio-card,format = "i2s";</div><div class='del'>-		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PD3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		simple-audio-card,bitclock-master = &lt;&amp;daicpu&gt;;</div><div class='del'>-		simple-audio-card,frame-master = &lt;&amp;daicpu&gt;;</div><div class='del'>-		/*TODO: SARADC_IN3 is used as MIC detection / key input */</div><div class='del'>-</div><div class='del'>-		simple-audio-card,widgets =</div><div class='del'>-			"Microphone", "Onboard Microphone",</div><div class='del'>-			"Microphone", "Microphone Jack",</div><div class='del'>-			"Speaker", "Speaker",</div><div class='del'>-			"Headphone", "Headphones";</div><div class='del'>-</div><div class='del'>-		simple-audio-card,routing =</div><div class='del'>-			"Headphones", "LOUT1",</div><div class='del'>-			"Headphones", "ROUT1",</div><div class='del'>-			"Speaker", "LOUT2",</div><div class='del'>-			"Speaker", "ROUT2",</div><div class='del'>-</div><div class='del'>-			"Headphones", "Headphones Amp OUTL",</div><div class='del'>-			"Headphones", "Headphones Amp OUTR",</div><div class='del'>-			"Headphones Amp INL", "LOUT1",</div><div class='del'>-			"Headphones Amp INR", "ROUT1",</div><div class='del'>-</div><div class='del'>-			"Speaker", "Speaker Amp OUTL",</div><div class='del'>-			"Speaker", "Speaker Amp OUTR",</div><div class='del'>-			"Speaker Amp INL", "LOUT2",</div><div class='del'>-			"Speaker Amp INR", "ROUT2",</div><div class='del'>-</div><div class='del'>-			/* single ended signal to LINPUT1 */</div><div class='del'>-			"LINPUT1", "Microphone Jack",</div><div class='del'>-			"RINPUT1", "Microphone Jack",</div><div class='del'>-			/* differential signal */</div><div class='del'>-			"LINPUT2", "Onboard Microphone",</div><div class='del'>-			"RINPUT2", "Onboard Microphone";</div><div class='del'>-</div><div class='del'>-		daicpu: simple-audio-card,cpu {</div><div class='del'>-			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='del'>-			system-clock-frequency = &lt;12288000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		daicodec: simple-audio-card,codec {</div><div class='del'>-			sound-dai = &lt;&amp;es8388&gt;;</div><div class='del'>-			system-clock-frequency = &lt;12288000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie30";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;5000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie_eth: vcc3v3-pcie-eth-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		gpios = &lt;&amp;gpio3 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie_eth";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;50000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_wf: vcc3v3-wf-regulator {</div><div class='add'>+	vbus5v0_typec: regulator-vbus-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio2 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_wf";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;50000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_usb20: vcc5v0-usb20-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vcc5v0_usb20_en&gt;;</div><div class='del'>-		regulator-name = "vcc5v0_usb20";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;speaker_amp {</div><div class='add'>+	enable-gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;headphone_amp {</div><div class='add'>+	enable-gpios = &lt;&amp;gpio3 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;analog_sound {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+	simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;, &lt;&amp;headphone_amp&gt;;</div><div class='add'>+	simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	simple-audio-card,widgets =</div><div class='add'>+		"Microphone", "Onboard Microphone",</div><div class='add'>+		"Microphone", "Microphone Jack",</div><div class='add'>+		"Speaker", "Speaker",</div><div class='add'>+		"Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+	simple-audio-card,routing =</div><div class='add'>+		"Headphones", "LOUT1",</div><div class='add'>+		"Headphones", "ROUT1",</div><div class='add'>+		"Speaker", "LOUT2",</div><div class='add'>+		"Speaker", "ROUT2",</div><div class='add'>+</div><div class='add'>+		"Headphones", "Headphones Amp OUTL",</div><div class='add'>+		"Headphones", "Headphones Amp OUTR",</div><div class='add'>+		"Headphones Amp INL", "LOUT1",</div><div class='add'>+		"Headphones Amp INR", "ROUT1",</div><div class='add'>+</div><div class='add'>+		"Speaker", "Speaker Amp OUTL",</div><div class='add'>+		"Speaker", "Speaker Amp OUTR",</div><div class='add'>+		"Speaker Amp INL", "LOUT2",</div><div class='add'>+		"Speaker Amp INR", "ROUT2",</div><div class='add'>+</div><div class='add'>+		/* single ended signal to LINPUT1 */</div><div class='add'>+		"LINPUT1", "Microphone Jack",</div><div class='add'>+		"RINPUT1", "Microphone Jack",</div><div class='add'>+		/* differential signal */</div><div class='add'>+		"LINPUT2", "Onboard Microphone",</div><div class='add'>+		"RINPUT2", "Onboard Microphone";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;combphy0_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -227,137 +116,146 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;combphy2_psu {</div><div class='add'>+&amp;fan {</div><div class='add'>+	pwms = &lt;&amp;pwm3 0 50000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_b0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_b1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_b2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_b3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_l0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_l1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_l2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;cpu_l3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+&amp;hdmi_receiver_cma {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c0 {</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_rx_cec &amp;hdmim1_rx_hpdin &amp;hdmim1_rx_scl &amp;hdmim1_rx_sda &amp;hdmirx_hpd&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	vdd_cpu_big0_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big0_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	vdd_cpu_big1_s0: regulator@43 {</div><div class='del'>-		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x43&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big1_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='add'>+&amp;hym8563 {</div><div class='add'>+	interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+	interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	hym8563: rtc@51 {</div><div class='del'>-		compatible = "haoyu,hym8563";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-output-names = "hym8563";</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='del'>-		wakeup-source;</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;10&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 10, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host0_xhci_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2c7 {</div><div class='add'>+&amp;i2s5_8ch {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-</div><div class='del'>-	/* PLDO2 vcca 1.8V, BUCK8 gated by PLDO2 being enabled */</div><div class='del'>-	es8388: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='del'>-		reg = &lt;0x11&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-		AVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='del'>-		DVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='del'>-		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='del'>-		PVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;12288000&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2s0_8ch {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='del'>-		     &amp;i2s0_mclk</div><div class='del'>-		     &amp;i2s0_sclk</div><div class='del'>-		     &amp;i2s0_sdi0</div><div class='del'>-		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+&amp;i2s6_8ch {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;i2s2_2ch {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2s2m0_lrck</div><div class='del'>-		     &amp;i2s2m0_sclk</div><div class='del'>-		     &amp;i2s2m0_sdi</div><div class='del'>-		     &amp;i2s2m0_sdo&gt;;</div><div class='add'>+&amp;led_blue_gpio {</div><div class='add'>+	gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;led_green_pwm {</div><div class='add'>+	pwms = &lt;&amp;pwm2 0 25000 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* phy1 - M.KEY socket */</div><div class='ctx'> &amp;pcie2x1l0 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -379,16 +277,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pcie30phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie3x4 {</div><div class='del'>-	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='hunk'>@@ -402,6 +290,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ir-receiver {</div><div class='ctx'> 		ir_receiver_pin: ir-receiver-pin {</div><div class='ctx'> 			rockchip,pins = &lt;4 RK_PB3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='hunk'>@@ -419,6 +313,16 @@</div><div class='ctx'> 			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	usb-typec {</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm2 {</div><div class='hunk'>@@ -432,424 +336,80 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;saradc {</div><div class='del'>-	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci {</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-sd;</div><div class='del'>-	non-removable;</div><div class='del'>-	max-frequency = &lt;200000000&gt;;</div><div class='del'>-	mmc-hs400-1_8v;</div><div class='del'>-	mmc-hs400-enhanced-strobe;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	disable-wp;</div><div class='del'>-	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-mmc;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+&amp;recovery_button {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sfc {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;fspim1_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	spi_flash: flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;1&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;spi2 {</div><div class='del'>-	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;200000000&gt;;</div><div class='del'>-	num-cs = &lt;1&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+&amp;uart9 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart9m0_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	pmic@0 {</div><div class='del'>-		compatible = "rockchip,rk806";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='del'>-			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-		system-power-controller;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='del'>-		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc13-supply = &lt;&amp;vdd2_ddr_s3&gt;;</div><div class='del'>-		vcc14-supply = &lt;&amp;vdd2_ddr_s3&gt;;</div><div class='del'>-		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl1";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='del'>-		rk806_dvs2_null: dvs2-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		rk806_dvs3_null: dvs3-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl3";</div><div class='del'>-			function = "pin_fun0";</div><div class='add'>+		usbdp_phy0_typec_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		regulators {</div><div class='del'>-			vdd_gpu_s0: dcdc-reg1 {</div><div class='del'>-				regulator-name = "vdd_gpu_s0";</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='del'>-				regulator-name = "vdd_cpu_lit_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_log_s0: dcdc-reg3 {</div><div class='del'>-				regulator-name = "vdd_log_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;825000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_vdenc_s0: dcdc-reg4 {</div><div class='del'>-				regulator-name = "vdd_vdenc_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;825000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_s0: dcdc-reg5 {</div><div class='del'>-				regulator-name = "vdd_ddr_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;900000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd2_ddr_s3: dcdc-reg6 {</div><div class='del'>-				regulator-name = "vdd2_ddr_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='del'>-				regulator-name = "vdd_2v0_pldo_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s3: dcdc-reg8 {</div><div class='del'>-				regulator-name = "vcc_3v3_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vddq_ddr_s0: dcdc-reg9 {</div><div class='del'>-				regulator-name = "vddq_ddr_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s3: dcdc-reg10 {</div><div class='del'>-				regulator-name = "vcc_1v8_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avcc_1v8_s0: pldo-reg1 {</div><div class='del'>-				regulator-name = "avcc_1v8_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			/* shorted to avcc_1v8_s0 on the board */</div><div class='del'>-			vcc_1v8_s0: pldo-reg2 {</div><div class='del'>-				regulator-name = "vcc_1v8_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_1v2_s0: pldo-reg3 {</div><div class='del'>-				regulator-name = "avdd_1v2_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s0: pldo-reg4 {</div><div class='del'>-				regulator-name = "vcc_3v3_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd_s0: pldo-reg5 {</div><div class='del'>-				regulator-name = "vccio_sd_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pldo6_s3: pldo-reg6 {</div><div class='del'>-				regulator-name = "pldo6_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s3: nldo-reg1 {</div><div class='del'>-				regulator-name = "vdd_0v75_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='del'>-				regulator-name = "vdd_ddr_pll_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_0v75_s0: nldo-reg3 {</div><div class='del'>-				regulator-name = "avdd_0v75_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				/*</div><div class='del'>-				 * The schematic mentions that actual setting</div><div class='del'>-				 * should be 0.8375V. RK3588 datasheet specifies</div><div class='del'>-				 * maximum as 0.825V. So we set datasheet max</div><div class='del'>-				 * here.</div><div class='del'>-				 */</div><div class='del'>-				regulator-min-microvolt = &lt;825000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;825000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v85_s0: nldo-reg4 {</div><div class='del'>-				regulator-name = "vdd_0v85_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s0: nldo-reg5 {</div><div class='del'>-				regulator-name = "vdd_0v75_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+		usbdp_phy0_typec_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;tsadc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2_host {</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_usb20&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3_host {</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_usb20&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='ctx'> </div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='add'>+	port {</div><div class='add'>+		usb_host0_xhci_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;uart9 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart9m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vcc3v3_pcie_eth {</div><div class='add'>+	gpios = &lt;&amp;gpio3 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_ehci {</div><div class='add'>+&amp;vcc3v3_wf {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vcc5v0_usb20 {</div><div class='add'>+	gpio = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;vcc5v0_usb20_en&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host1_ehci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host1_ohci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts<br/>new file mode 100644<br/>index 000000000000..f8c6c080e418<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588-orangepi-5-compact.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Xunlong Orange Pi 5 Ultra";</div><div class='add'>+	compatible = "xunlong,orangepi-5-ultra", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx1_cec &amp;hdmim0_tx1_hpd</div><div class='add'>+			     &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_blue_pwm {</div><div class='add'>+	pwms = &lt;&amp;pwm4 0 25000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;led_green_pwm {</div><div class='add'>+	pwms = &lt;&amp;pwm5 0 25000 PWM_POLARITY_INVERTED&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	usb {</div><div class='add'>+		usb_otg_pwren: usb-otg-pwren {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc5v0_usb30_otg {</div><div class='add'>+	gpios = &lt;&amp;gpio4 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi<br/>new file mode 100644<br/>index 000000000000..3bceee948458<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi</a></div><div class='hunk'>@@ -0,0 +1,867 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023 Ondřej Jirman &lt;megi@xff.cz&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "Mask Rom";</div><div class='add'>+			linux,code = &lt;KEY_SETUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;2000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	recovery_button: adc-keys-1 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;2000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	speaker_amp: speaker-audio-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		sound-name-prefix = "Speaker Amp";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	headphone_amp: headphones-audio-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		sound-name-prefix = "Headphones Amp";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_blue_gpio: led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 70 75 80 100&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm-leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		led_blue_pwm: led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led_green_pwm: led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-pcie-wlan";</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog_sound: sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "Analog";</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;daicpu&gt;;</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;daicpu&gt;;</div><div class='add'>+		/*TODO: SARADC_IN3 is used as MIC detection / key input */</div><div class='add'>+</div><div class='add'>+		daicpu: simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		daicodec: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie_eth: regulator-vcc3v3-pcie-eth {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie_eth";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_wf: regulator-vcc3v3-wf {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_wf";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb20: regulator-vcc5v0-usb20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-name = "vcc5v0_usb20";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* PLDO2 vcca 1.8V, BUCK8 gated by PLDO2 being enabled */</div><div class='add'>+	es8388: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s2_2ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s2m0_lrck</div><div class='add'>+		     &amp;i2s2m0_sclk</div><div class='add'>+		     &amp;i2s2m0_sdi</div><div class='add'>+		     &amp;i2s2m0_sdo&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			trip = &lt;&amp;package_fan0&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map1 {</div><div class='add'>+			trip = &lt;&amp;package_fan1&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		package_fan0: package-fan0 {</div><div class='add'>+			temperature = &lt;55000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		package_fan1: package-fan1 {</div><div class='add'>+			temperature = &lt;65000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_npu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_0 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_1 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_2 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spi_flash: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vdd2_ddr_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vdd2_ddr_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;825000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;825000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* shorted to avcc_1v8_s0 on the board */</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				/*</div><div class='add'>+				 * The schematic mentions that actual setting</div><div class='add'>+				 * should be 0.8375V. RK3588 datasheet specifies</div><div class='add'>+				 * maximum as 0.825V. So we set datasheet max</div><div class='add'>+				 * here.</div><div class='add'>+				 */</div><div class='add'>+				regulator-min-microvolt = &lt;825000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;825000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts<br/>index e4a20cda65ed..b2336c36da01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts</a></div><div class='hunk'>@@ -104,7 +104,7 @@</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;, &lt;&amp;headphone_amp&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;daicpu&gt;;</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;daicpu&gt;;</div><div class='ctx'> 		/* SARADC_IN3 is used as MIC detection / key input */</div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -158,7 +158,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_bt: vcc3v3-bt-regulator {</div><div class='add'>+	vcc3v3_bt: regulator-vcc3v3-bt {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio3 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -180,7 +180,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_wf: vcc3v3-wf-regulator {</div><div class='add'>+	vcc3v3_wf: regulator-vcc3v3-wf {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio3 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -191,7 +191,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc4v0_sys: vcc4v0-sys-regulator {</div><div class='add'>+	vcc4v0_sys: regulator-vcc4v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc4v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -201,7 +201,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -215,7 +215,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -311,12 +311,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	es8388: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;12288000&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='ctx'> 		AVDD-supply = &lt;&amp;avcc_1v8_codec_s0&gt;;</div><div class='ctx'> 		DVDD-supply = &lt;&amp;avcc_1v8_codec_s0&gt;;</div><div class='ctx'> 		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='hunk'>@@ -348,6 +347,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='hunk'>@@ -412,6 +415,36 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;rknn_core_0 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_1 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_2 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;saradc {</div><div class='ctx'> 	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts b/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts<br/>new file mode 100644<br/>index 000000000000..2d6fed2a84a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts</a></div><div class='hunk'>@@ -0,0 +1,1132 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Firefly Technology Co. Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Firefly ROC-RK3588-RT";</div><div class='add'>+	compatible = "firefly,roc-rk3588-rt", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys-0 {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		simple-audio-card,aux-devs = &lt;&amp;amp_headphones&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;384&gt;;</div><div class='add'>+		simple-audio-card,name = "rockchip-es8388";</div><div class='add'>+		simple-audio-card,pin-switches = "Headphones";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Speaker", "LOUT2",</div><div class='add'>+			"Speaker", "ROUT2",</div><div class='add'>+			"Headphones Amplifier INL", "LOUT1",</div><div class='add'>+			"Headphones Amplifier INR", "ROUT1",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTL",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTR",</div><div class='add'>+			"LINPUT1", "Microphone Jack",</div><div class='add'>+			"RINPUT1", "Microphone Jack",</div><div class='add'>+			"LINPUT2", "Onboard Microphone",</div><div class='add'>+			"RINPUT2", "Onboard Microphone";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Microphone", "Onboard Microphone",</div><div class='add'>+			"Headphone", "Headphones",</div><div class='add'>+			"Speaker", "Speaker";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amp_headphones: headphones-amplifier {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;headphone_amplifier_en&gt;;</div><div class='add'>+		sound-name-prefix = "Headphones Amplifier";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 70 75 80 100&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm15 0 50000 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		power_led {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user_led {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "disk-activity";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sata2: vcc3v3-sata2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sata2";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_sd_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_sys: regulator-vcc3v3-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_wlan: regulator-vcc3v3-wlan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_wlan";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host3: regulator-vcc5v0-host3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host3_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_miim</div><div class='add'>+		     &amp;gmac0_tx_bus2</div><div class='add'>+		     &amp;gmac0_rx_bus2</div><div class='add'>+		     &amp;gmac0_rgmii_clk</div><div class='add'>+		     &amp;gmac0_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_gpu_mem_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	/* pc9202 watchdog@3c with enable-gpio gpio0-c3 */</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c3m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8388: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='add'>+</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	rgmii_phy0: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_0_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_1_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;, &lt;&amp;pcie2_0_wake&gt;, &lt;&amp;pcie2_0_clkreq&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_wlan&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	audio {</div><div class='add'>+		hp_detect: headphone-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		headphone_amplifier_en: headphone-amplifier-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		led_pins: led-pins {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_wake: pcie2-0-wake {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_0_clkreq: pcie2-0-clkreq {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 4 &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211f {</div><div class='add'>+		rtl8211f_0_rst: rtl8211f-0-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		rtl8211f_1_rst: rtl8211f-1-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_host3_en: vcc5v0-host3-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-typec {</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wlan {</div><div class='add'>+		wifi_pwren: wifi-pwren {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm15 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm15m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc3v3_sd_s0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "avdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "avdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sata2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dwc3_0_role_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts<br/>index d0b922b8d67e..bc8140883de4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "dt-bindings/usb/pd.h"</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -46,7 +47,7 @@</div><div class='ctx'> 		compatible = "audio-graph-card";</div><div class='ctx'> 		label = "rk3588-es8316";</div><div class='ctx'> 		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='ctx'> 		routing = "MIC2", "Mic Jack",</div><div class='hunk'>@@ -56,6 +57,31 @@</div><div class='ctx'> 			  "Headphone", "Headphones";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	bridge {</div><div class='add'>+		compatible = "radxa,ra620";</div><div class='add'>+</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_bridge_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dp1_out_con&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				hdmi_bridge_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio-leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -72,6 +98,37 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi_bridge_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Unnamed gated oscillator: 100MHz,3.3V,3225 */</div><div class='add'>+	pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator {</div><div class='add'>+		compatible = "gated-fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		clock-output-names = "pcie30_refclk";</div><div class='add'>+		vdd-supply = &lt;&amp;vcc3v3_pi6c_05&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	fan0: pwm-fan {</div><div class='ctx'> 		compatible = "pwm-fan";</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='hunk'>@@ -146,13 +203,14 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_mkey: regulator-vcc3v3-mkey {</div><div class='add'>+	/* The PCIE30x4_PWREN_H controls two regulators */</div><div class='add'>+	vcc3v3_mkey: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pcie30x4_pwren_h&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_mkey";</div><div class='add'>+		regulator-name = "vcc3v3_pi6c_05";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;5000&gt;;</div><div class='hunk'>@@ -246,11 +304,51 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dp1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp1m0_pins&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp1_in {</div><div class='add'>+	dp1_in_vp2: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp2_out_dp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp1_out {</div><div class='add'>+	dp1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_bridge_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx1_cec &amp;hdmim0_tx1_hpd</div><div class='add'>+		     &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -513,6 +611,18 @@</div><div class='ctx'> </div><div class='ctx'> /* ASMedia ASM1164 Sata controller */</div><div class='ctx'> &amp;pcie3x2 {</div><div class='add'>+	/*</div><div class='add'>+	 * The board has a "pcie_refclk" oscillator that needs enabling,</div><div class='add'>+	 * so add it to the list of clocks.</div><div class='add'>+	 */</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_PCIE_2L_MSTR&gt;, &lt;&amp;cru ACLK_PCIE_2L_SLV&gt;,</div><div class='add'>+		 &lt;&amp;cru ACLK_PCIE_2L_DBI&gt;, &lt;&amp;cru PCLK_PCIE_2L&gt;,</div><div class='add'>+		 &lt;&amp;cru CLK_PCIE_AUX1&gt;, &lt;&amp;cru CLK_PCIE2L_PIPE&gt;,</div><div class='add'>+		 &lt;&amp;pcie30_port1_refclk&gt;;</div><div class='add'>+	clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+		      "aclk_dbi", "pclk",</div><div class='add'>+		      "aux", "pipe",</div><div class='add'>+		      "ref";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie30x2_perstn_m1_l&gt;;</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -522,6 +632,18 @@</div><div class='ctx'> </div><div class='ctx'> /* M.2 M.key */</div><div class='ctx'> &amp;pcie3x4 {</div><div class='add'>+	/*</div><div class='add'>+	 * The board has a "pcie_refclk" oscillator that needs enabling,</div><div class='add'>+	 * so add it to the list of clocks.</div><div class='add'>+	 */</div><div class='add'>+	clocks = &lt;&amp;cru ACLK_PCIE_4L_MSTR&gt;, &lt;&amp;cru ACLK_PCIE_4L_SLV&gt;,</div><div class='add'>+		 &lt;&amp;cru ACLK_PCIE_4L_DBI&gt;, &lt;&amp;cru PCLK_PCIE_4L&gt;,</div><div class='add'>+		 &lt;&amp;cru CLK_PCIE_AUX0&gt;, &lt;&amp;cru CLK_PCIE4L_PIPE&gt;,</div><div class='add'>+		 &lt;&amp;pcie30_port0_refclk&gt;;</div><div class='add'>+	clock-names = "aclk_mst", "aclk_slv",</div><div class='add'>+		      "aclk_dbi", "pclk",</div><div class='add'>+		      "aux", "pipe",</div><div class='add'>+		      "ref";</div><div class='ctx'> 	num-lanes = &lt;2&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie30x4_perstn_m1_l&gt;;</div><div class='hunk'>@@ -530,6 +652,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		rtc_int: rtc-int {</div><div class='hunk'>@@ -656,10 +782,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci {</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='del'>-	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='ctx'> 	mmc-hs400-1_8v;</div><div class='ctx'> 	mmc-hs400-enhanced-strobe;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='ctx'> 	no-sdio;</div><div class='ctx'> 	no-sd;</div><div class='ctx'> 	non-removable;</div><div class='hunk'>@@ -1175,3 +1300,25 @@</div><div class='ctx'> 	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp2 {</div><div class='add'>+	vp2_out_dp1: endpoint@b {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_DP1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dp1_in_vp2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi<br/>new file mode 100644<br/>index 000000000000..3bbe78810ec6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1068 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+		mmc2 = &amp;sdio;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi1-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi1_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi1_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;0 120 150 180 210 240 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill-bt {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-m2-bt";</div><div class='add'>+		radio-type = "bluetooth";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio2 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vbus5v0_typec_en&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pcie3_vcc3v3_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie30";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy1_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx1_cec &amp;hdmim0_tx1_hpd</div><div class='add'>+		     &amp;hdmim1_tx1_scl &amp;hdmim1_tx1_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_in {</div><div class='add'>+	hdmi1_in_vp1: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp1_out_hdmi1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_out {</div><div class='add'>+	hdmi1_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi1_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver_cma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_rx_cec &amp;hdmim1_rx_hpdin &amp;hdmim1_rx_scl &amp;hdmim1_rx_sda &amp;hdmirx_hpd&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-enable-ramp-delay = &lt;500&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		 };</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c4m1_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * When the board is starting to send power-delivery messages</div><div class='add'>+		 * too late (5 seconds according to the specification), the</div><div class='add'>+		 * power-supply reacts with a hard-reset. That removes the</div><div class='add'>+		 * power from VBUS for some time, which resets te whole board.</div><div class='add'>+		 */</div><div class='add'>+		status = "fail";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			/* fusb302 supports PD Rev 2.0 Ver 1.2 */</div><div class='add'>+			pd-revision = /bits/ 8 &lt;0x2 0x0 0x1 0x2&gt;;</div><div class='add'>+			power-role = "sink";</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;,</div><div class='add'>+				&lt;PDO_VAR(5000, 20000, 5000)&gt;;</div><div class='add'>+</div><div class='add'>+			altmodes {</div><div class='add'>+				displayport {</div><div class='add'>+					svid = /bits/ 16 &lt;0xff01&gt;;</div><div class='add'>+					vdo = &lt;0xffffffff&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host0_xhci_to_usbc0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					usbc0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8316: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8316";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			es8316_p0_0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;i2s0_8ch_p0_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s0_8ch_p0: port {</div><div class='add'>+		i2s0_8ch_p0_0: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;es8316_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s6_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		package_fan0: package-fan0 {</div><div class='add'>+			temperature = &lt;55000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		package_fan1: package-fan1 {</div><div class='add'>+			temperature = &lt;65000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			trip = &lt;&amp;package_fan0&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map1 {</div><div class='add'>+			trip = &lt;&amp;package_fan1&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_npu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_rst: pcie2-0-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3_rst: pcie3-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_vcc3v3_en: pcie3-vcc3v3-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vbus5v0_typec_en: vbus5v0-typec-en {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_0 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_1 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_2 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspim2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;104000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	/* connected to USB hub, which is powered by vcc5v0_sys */</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb_host0_xhci_to_usbc0: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp1 {</div><div class='add'>+	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI1&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi1_in_vp1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso<br/>index 672d748fcc67..f229cb49da68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso</a></div><div class='hunk'>@@ -23,3 +23,7 @@</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mmu600_pcie {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts<br/>new file mode 100644<br/>index 000000000000..5e984a44120e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3588-rock-5b.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 5B+";</div><div class='add'>+	compatible = "radxa,rock-5b-plus", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	rfkill-wwan {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-m2-wwan";</div><div class='add'>+		radio-type = "wwan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_4g: regulator-vcc3v3-4g {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		/* pinctrl for the GPIO is requested by vcc3v3_pcie2x1l0 */</div><div class='add'>+		regulator-name = "vcc3v3_4g";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;50000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_wwan_pwr: regulator-vcc3v3-wwan {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wwan_power_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_wwan_pwr";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_4g&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	wwan-disable2-n-hog {</div><div class='add'>+		gpios = &lt;RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "M.2 B-key W_DISABLE2#";</div><div class='add'>+		gpio-hog;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	wwan-reset-n-hog {</div><div class='add'>+		gpios = &lt;RK_PB3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		output-low;</div><div class='add'>+		line-name = "M.2 B-key RESET#";</div><div class='add'>+		gpio-hog;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wwan-wake-n-hog {</div><div class='add'>+		gpios = &lt;RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		input;</div><div class='add'>+		line-name = "M.2 B-key WoWWAN#";</div><div class='add'>+		gpio-hog;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	data-lanes = &lt;1 1 2 2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3x2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	num-lanes = &lt;2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	wwan {</div><div class='add'>+		wwan_power_en: wwan-pwr-en {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3x2_rst: pcie3x2-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usbc_sbu_dc: usbc-sbu-dc {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usbc_sbu_dc&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc5v0_host {</div><div class='add'>+	enable-active-high;</div><div class='add'>+	gpio = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts<br/>index 966bbc582d89..8ef01010d985 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts</a></div><div class='hunk'>@@ -2,430 +2,11 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include "rk3588.dtsi"</div><div class='add'>+#include "rk3588-rock-5b.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Radxa ROCK 5B";</div><div class='ctx'> 	compatible = "radxa,rock-5b", "rockchip,rk3588";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		mmc0 = &amp;sdhci;</div><div class='del'>-		mmc1 = &amp;sdmmc;</div><div class='del'>-		mmc2 = &amp;sdio;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	analog-sound {</div><div class='del'>-		compatible = "audio-graph-card";</div><div class='del'>-		label = "rk3588-es8316";</div><div class='del'>-</div><div class='del'>-		widgets = "Microphone", "Mic Jack",</div><div class='del'>-			  "Headphone", "Headphones";</div><div class='del'>-</div><div class='del'>-		routing = "MIC2", "Mic Jack",</div><div class='del'>-			  "Headphones", "HPOL",</div><div class='del'>-			  "Headphones", "HPOR";</div><div class='del'>-</div><div class='del'>-		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;led_rgb_b&gt;;</div><div class='del'>-</div><div class='del'>-		led_rgb_b {</div><div class='del'>-			function = LED_FUNCTION_STATUS;</div><div class='del'>-			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	fan: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		cooling-levels = &lt;0 120 150 180 210 240 255&gt;;</div><div class='del'>-		fan-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 50000 0&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rfkill {</div><div class='del'>-		compatible = "rfkill-gpio";</div><div class='del'>-		label = "rfkill-pcie-wlan";</div><div class='del'>-		radio-type = "wlan";</div><div class='del'>-		shutdown-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rfkill-bt {</div><div class='del'>-		compatible = "rfkill-gpio";</div><div class='del'>-		label = "rfkill-m2-bt";</div><div class='del'>-		radio-type = "bluetooth";</div><div class='del'>-		shutdown-gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie2_0_vcc3v3_en&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie2x1l0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;50000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc3v3_pcie2x1l2";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;5000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie3_vcc3v3_en&gt;;</div><div class='del'>-		regulator-name = "vcc3v3_pcie30";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		startup-delay-us = &lt;5000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_host";</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_1v1_nldo_s3";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy0_ps {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy1_ps {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy2_psu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big0_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big0_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big1_s0: regulator@43 {</div><div class='del'>-		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x43&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big1_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	hym8563: rtc@51 {</div><div class='del'>-		compatible = "haoyu,hym8563";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-output-names = "hym8563";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c7 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	es8316: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8316";</div><div class='del'>-		reg = &lt;0x11&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;12288000&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			es8316_p0_0: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;i2s0_8ch_p0_0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2s0_8ch {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='del'>-		     &amp;i2s0_mclk</div><div class='del'>-		     &amp;i2s0_sclk</div><div class='del'>-		     &amp;i2s0_sdi0</div><div class='del'>-		     &amp;i2s0_sdo0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	i2s0_8ch_p0: port {</div><div class='del'>-		i2s0_8ch_p0_0: endpoint {</div><div class='del'>-			dai-format = "i2s";</div><div class='del'>-			mclk-fs = &lt;256&gt;;</div><div class='del'>-			remote-endpoint = &lt;&amp;es8316_p0_0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;package_thermal {</div><div class='del'>-	polling-delay = &lt;1000&gt;;</div><div class='del'>-</div><div class='del'>-	trips {</div><div class='del'>-		package_fan0: package-fan0 {</div><div class='del'>-			temperature = &lt;55000&gt;;</div><div class='del'>-			hysteresis = &lt;2000&gt;;</div><div class='del'>-			type = "active";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		package_fan1: package-fan1 {</div><div class='del'>-			temperature = &lt;65000&gt;;</div><div class='del'>-			hysteresis = &lt;2000&gt;;</div><div class='del'>-			type = "active";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cooling-maps {</div><div class='del'>-		map1 {</div><div class='del'>-			trip = &lt;&amp;package_fan0&gt;;</div><div class='del'>-			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		map2 {</div><div class='del'>-			trip = &lt;&amp;package_fan1&gt;;</div><div class='del'>-			cooling-device = &lt;&amp;fan 2 THERMAL_NO_LIMIT&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie2x1l0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie2_0_rst&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie2x1l2 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;gpio3 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l2&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie30phy {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie3x4 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie3_rst&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	hym8563 {</div><div class='del'>-		hym8563_int: hym8563-int {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		led_rgb_b: led-rgb-b {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		hp_detect: hp-detect {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie2 {</div><div class='del'>-		pcie2_0_rst: pcie2-0-rst {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie2_2_rst: pcie2-2-rst {</div><div class='del'>-			rockchip,pins = &lt;3 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie3 {</div><div class='del'>-		pcie3_rst: pcie3-rst {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie3_vcc3v3_en: pcie3-vcc3v3-en {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb {</div><div class='del'>-		vcc5v0_host_en: vcc5v0-host-en {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pwm1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;saradc {</div><div class='del'>-	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci {</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-sd;</div><div class='del'>-	non-removable;</div><div class='del'>-	mmc-hs400-1_8v;</div><div class='del'>-	mmc-hs400-enhanced-strobe;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	max-frequency = &lt;200000000&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-mmc;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	disable-wp;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdio {</div><div class='hunk'>@@ -449,412 +30,35 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;sfc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;fspim2_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;uart6 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart6m1_xfer &amp;uart6m1_ctsn &amp;uart6m1_rtsn&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;spi2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;200000000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='del'>-	num-cs = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	pmic@0 {</div><div class='del'>-		compatible = "rockchip,rk806";</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='del'>-			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='del'>-</div><div class='del'>-		system-power-controller;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='del'>-		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl1";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs2_null: dvs2-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs3_null: dvs3-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl3";</div><div class='del'>-			function = "pin_fun0";</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	usb {</div><div class='add'>+		usbc_sbu_dc: usbc-sbu-dc {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;4 RK_PA7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		regulators {</div><div class='del'>-			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_gpu_s0";</div><div class='del'>-				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_cpu_lit_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_log_s0: dcdc-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_log_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_vdenc_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_s0: dcdc-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;900000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_ddr_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd2_ddr_s3: dcdc-reg6 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vdd2_ddr_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_2v0_pldo_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s3: dcdc-reg8 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vcc_3v3_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vddq_ddr_s0: dcdc-reg9 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vddq_ddr_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s3: dcdc-reg10 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc_1v8_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avcc_1v8_s0: pldo-reg1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "avcc_1v8_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s0: pldo-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc_1v8_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_1v2_s0: pldo-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-name = "avdd_1v2_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s0: pldo-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vcc_3v3_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd_s0: pldo-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vccio_sd_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pldo6_s3: pldo-reg6 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "pldo6_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s3: nldo-reg1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "vdd_0v75_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-name = "vdd_ddr_pll_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_0v75_s0: nldo-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "avdd_0v75_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v85_s0: nldo-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-name = "vdd_0v85_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s0: nldo-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "vdd_0v75_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;tsadc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy1_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2_host {</div><div class='del'>-	/* connected to USB hub, which is powered by vcc5v0_sys */</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3_host {</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdp_phy1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host1_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host1_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host1_xhci {</div><div class='del'>-	dr_mode = "host";</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usbc_sbu_dc&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host2_xhci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;vcc5v0_host {</div><div class='add'>+	enable-active-high;</div><div class='add'>+	gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi<br/>new file mode 100644<br/>index 000000000000..e5c474e4d02a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3588-rock-5b-5bp-5t.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "rk3588-es8316";</div><div class='add'>+</div><div class='add'>+		widgets = "Microphone", "Mic Jack",</div><div class='add'>+			  "Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+		routing = "MIC2", "Mic Jack",</div><div class='add'>+			  "Headphones", "HPOL",</div><div class='add'>+			  "Headphones", "HPOR";</div><div class='add'>+</div><div class='add'>+		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_b&gt;;</div><div class='add'>+</div><div class='add'>+		led_rgb_b {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-m2-wlan";</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio1 RK_PC6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_b: led-rgb-b {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc3v3_pcie2x1l0 {</div><div class='add'>+	gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_vcc3v3_en&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts<br/>new file mode 100644<br/>index 000000000000..c1763835f53d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3588-rock-5b-5bp-5t.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 5T";</div><div class='add'>+	compatible = "radxa,rock-5t", "rockchip,rk3588";</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "rk3588-es8316";</div><div class='add'>+</div><div class='add'>+		widgets = "Microphone", "Mic Jack",</div><div class='add'>+		"Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+		routing = "MIC2", "Mic Jack",</div><div class='add'>+		"Headphones", "HPOL",</div><div class='add'>+		"Headphones", "HPOR";</div><div class='add'>+</div><div class='add'>+		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio4 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_rgb_b&gt;;</div><div class='add'>+</div><div class='add'>+		led_rgb_b {</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rfkill {</div><div class='add'>+		compatible = "rfkill-gpio";</div><div class='add'>+		label = "rfkill-m2-wlan";</div><div class='add'>+		radio-type = "wlan";</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio1 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc3v3_pcie2x1l1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi_receiver {</div><div class='add'>+	hpd-gpios = &lt;&amp;gpio2 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_1_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie2x1l1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie30phy {</div><div class='add'>+	data-lanes = &lt;1 1 2 2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3x2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3x4 {</div><div class='add'>+	num-lanes = &lt;2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hdmirx {</div><div class='add'>+		hdmirx_hpd: hdmirx-5v-detection {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_rgb_b: led-rgb-b {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_1_rst: pcie2-1-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {</div><div class='add'>+			rockchip,pins = &lt;2 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie3 {</div><div class='add'>+		pcie3x2_rst: pcie3x2-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc_sbu_dc: usbc-sbu-dc {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usbc_sbu_dc&gt;;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc3v3_pcie2x1l0 {</div><div class='add'>+	gpios = &lt;&amp;gpio2 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_0_vcc3v3_en&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vcc5v0_host {</div><div class='add'>+	enable-active-high;</div><div class='add'>+	gpio = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso<br/>new file mode 100644<br/>index 000000000000..b8636fcb4f39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou-video-demo.dtso</a></div><div class='hunk'>@@ -0,0 +1,153 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * DEVKIT ADDON CAM-TS-A01</div><div class='add'>+ * https://embedded.cherry.de/product/development-kit/</div><div class='add'>+ *</div><div class='add'>+ * DT-overlay for the camera / DSI demo appliance for Haikou boards.</div><div class='add'>+ * In the flavour for use with a Tiger system-on-module.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;dc_12v&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc1v8_video: regulator-vcc1v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc1v8-video";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc2v8_video: regulator-vcc2v8-video {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc2v8-video";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	video-adapter-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		video-adapter-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9670 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			label = "video-adapter-led";</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "leadtek,ltk050h3148w";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc1v8_video&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		vci-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_in {</div><div class='add'>+	dsi0_in_vp3: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp3_out_dsi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_out {</div><div class='add'>+	dsi0_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_panel_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	/* OV5675, GT911, DW9714 are limited to 400KHz */</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	touchscreen@14 {</div><div class='add'>+		compatible = "goodix,gt911";</div><div class='add'>+		reg = &lt;0x14&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		irq-gpios = &lt;&amp;gpio3 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;touch_int&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9670 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		AVDD28-supply = &lt;&amp;vcc2v8_video&gt;;</div><div class='add'>+		VDDIO-supply = &lt;&amp;vcc3v3_baseboard&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9670: gpio@27 {</div><div class='add'>+		compatible = "nxp,pca9670";</div><div class='add'>+		reg = &lt;0x27&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pca9670_resetn&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mipidcphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	pca9670 {</div><div class='add'>+		pca9670_resetn: pca9670-resetn {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	touch {</div><div class='add'>+		touch_int: touch-int {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	vp3_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_MIPI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dsi0_in_vp3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts<br/>index e4b7a0a4444b..caa43d1abf17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588-tiger.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -20,7 +21,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dc_12v: dc-12v-regulator {</div><div class='add'>+	dc_12v: regulator-dc-12v {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "dc_12v";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -61,6 +62,17 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2s3-sound {</div><div class='ctx'> 		compatible = "simple-audio-card";</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='hunk'>@@ -84,7 +96,7 @@</div><div class='ctx'> 		clock-frequency = &lt;24576000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_baseboard: vcc3v3-baseboard-regulator {</div><div class='add'>+	vcc3v3_baseboard: regulator-vcc3v3-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -94,7 +106,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_low_noise: vcc3v3-low-noise-regulator {</div><div class='add'>+	vcc3v3_low_noise: regulator-vcc3v3-low-noise {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_low_noise";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -103,7 +115,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_baseboard: vcc5v0-baseboard-regulator {</div><div class='add'>+	vcc5v0_baseboard: regulator-vcc5v0-baseboard {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_baseboard";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -113,7 +125,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -123,7 +135,7 @@</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -133,7 +145,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;dc_12v&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vddd_audio_1v6: vddd-audio-1v6-regulator {</div><div class='add'>+	vddd_audio_1v6: regulator-vddd-audio-1v6 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vddd_audio_1v6";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -155,6 +167,36 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	/*</div><div class='add'>+	 * While HDMI-CEC is present on the Q7 connector, it is not</div><div class='add'>+	 * connected on Haikou itself.</div><div class='add'>+	 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_hpd &amp;hdmim1_tx0_scl &amp;hdmim1_tx0_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='hunk'>@@ -190,6 +232,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie30phy {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -272,8 +318,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* DB9 RS232/RS485 when SW2 in "UART1" mode */</div><div class='ctx'> &amp;uart5 {</div><div class='ctx'> 	rts-gpios = &lt;&amp;gpio3 RK_PB3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbdp_phy0 {</div><div class='hunk'>@@ -321,3 +369,18 @@</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi<br/>index 615094bb8ba3..b44e89e1bb15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi</a></div><div class='hunk'>@@ -6,12 +6,14 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include "rk8xx.h"</div><div class='ctx'> #include "rk3588.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "tsd,rk3588-tiger", "rockchip,rk3588";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		i2c10 = &amp;i2c10;</div><div class='ctx'> 		mmc0 = &amp;sdhci;</div><div class='ctx'> 		rtc0 = &amp;rtc_twi;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -64,7 +66,7 @@</div><div class='ctx'> 		enable-gpios = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;; /* PCIE30X4_CLKREQN_M1_L */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -74,7 +76,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v2_s3: vcc-1v2-s3-regulator {</div><div class='add'>+	vcc_1v2_s3: regulator-vcc-1v2-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v2_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +86,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -152,6 +154,12 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim1_tx0_cec &amp;hdmim0_tx0_hpd &amp;hdmim1_tx0_scl</div><div class='add'>+		     &amp;hdmim1_tx0_sda&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c1 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c1m0_xfer&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -166,7 +174,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c2m3_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2m3_xfer {</div><div class='hunk'>@@ -224,13 +231,25 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	fan@18 {</div><div class='del'>-		compatible = "ti,amc6821";</div><div class='add'>+		compatible = "tsd,mule", "ti,amc6821";</div><div class='ctx'> 		reg = &lt;0x18&gt;;</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	rtc_twi: rtc@6f {</div><div class='del'>-		compatible = "isil,isl1208";</div><div class='del'>-		reg = &lt;0x6f&gt;;</div><div class='add'>+		i2c-mux {</div><div class='add'>+			compatible = "tsd,mule-i2c-mux";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			i2c10: i2c@0 {</div><div class='add'>+				reg = &lt;0x0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				rtc_twi: rtc@6f {</div><div class='add'>+					compatible = "isil,isl1208";</div><div class='add'>+					reg = &lt;0x6f&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -317,6 +336,10 @@</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	emmc {</div><div class='ctx'> 		emmc_reset: emmc-reset {</div><div class='hunk'>@@ -367,7 +390,6 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_cmd &amp;emmc_clk &amp;emmc_data_strobe&gt;;</div><div class='del'>-	supports-cqe;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -419,6 +441,7 @@</div><div class='ctx'> 		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='ctx'> 		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='ctx'> 		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		rockchip,reset-mode = &lt;RK806_RESTART&gt;;</div><div class='ctx'> </div><div class='ctx'> 		rk806_dvs1_null: dvs1-null-pins {</div><div class='ctx'> 			pins = "gpio_pwrctrl1";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts b/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts<br/>index d0021524e7f9..5a428e00ab93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> 		pwms = &lt;&amp;pwm2 0 25000 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd0v85: pcie20-avdd0v85-regulator {</div><div class='add'>+	pcie20_avdd0v85: regulator-pcie20-avdd0v85 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd0v85";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie20_avdd1v8: pcie20-avdd1v8-regulator {</div><div class='add'>+	pcie20_avdd1v8: regulator-pcie20-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie20_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd0v75: pcie30-avdd0v75-regulator {</div><div class='add'>+	pcie30_avdd0v75: regulator-pcie30-avdd0v75 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd0v75";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avdd_0v75_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pcie30_avdd1v8: pcie30-avdd1v8-regulator {</div><div class='add'>+	pcie30_avdd1v8: regulator-pcie30-avdd1v8 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "pcie30_avdd1v8";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -101,7 +101,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PB0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -134,7 +134,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usbdcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -154,7 +154,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -289,6 +289,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	rtl8211f {</div><div class='ctx'> 		rtl8211f_rst: rtl8211f-rst {</div><div class='hunk'>@@ -428,7 +432,6 @@</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;550000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-init-microvolt = &lt;750000&gt;;</div><div class='ctx'> 				regulator-ramp-delay = &lt;12500&gt;;</div><div class='ctx'> </div><div class='ctx'> 				regulator-state-mem {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi<br/>index dbaa94ca69f4..6daea8961fdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie30: vcc3v3-pcie30-regulator {</div><div class='add'>+	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_pcie30";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> 		startup-delay-us = &lt;5000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -116,6 +116,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -208,10 +213,65 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		package_active1: trip-active1 {</div><div class='add'>+			temperature = &lt;45000&gt;;</div><div class='add'>+			hysteresis = &lt;5000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+		package_active2: trip-active2 {</div><div class='add'>+			temperature = &lt;50000&gt;;</div><div class='add'>+			hysteresis = &lt;5000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+		package_active3: trip-active3 {</div><div class='add'>+			temperature = &lt;60000&gt;;</div><div class='add'>+			hysteresis = &lt;5000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+		package_active4: trip-active4 {</div><div class='add'>+			temperature = &lt;70000&gt;;</div><div class='add'>+			hysteresis = &lt;5000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+		package_active5: trip-active5 {</div><div class='add'>+			temperature = &lt;80000&gt;;</div><div class='add'>+			hysteresis = &lt;5000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map1 {</div><div class='add'>+			trip = &lt;&amp;package_active1&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 1 1&gt;;</div><div class='add'>+		};</div><div class='add'>+		map2 {</div><div class='add'>+			trip = &lt;&amp;package_active2&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 2&gt;;</div><div class='add'>+		};</div><div class='add'>+		map3 {</div><div class='add'>+			trip = &lt;&amp;package_active3&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 3 3&gt;;</div><div class='add'>+		};</div><div class='add'>+		map4 {</div><div class='add'>+			trip = &lt;&amp;package_active4&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 4 4&gt;;</div><div class='add'>+		};</div><div class='add'>+		map5 {</div><div class='add'>+			trip = &lt;&amp;package_active5&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 5 5&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie2x1l1 {</div><div class='ctx'> 	linux,pci-domain = &lt;1&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie2_reset&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_reset&gt;, &lt;&amp;pcie30x1m1_0_clkreqn&gt;, &lt;&amp;pcie30x1m1_0_waken&gt;;</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -223,12 +283,16 @@</div><div class='ctx'> &amp;pcie3x4 {</div><div class='ctx'> 	linux,pci-domain = &lt;0&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie3_reset&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie3_reset&gt;, &lt;&amp;pcie30x4m1_clkreqn&gt;, &lt;&amp;pcie30x4m1_waken&gt;;</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio4 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie30&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	fan {</div><div class='ctx'> 		fan_int: fan-int {</div><div class='hunk'>@@ -296,6 +360,7 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='ctx'> 			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		system-power-controller;</div><div class='ctx'> </div><div class='ctx'> 		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='hunk'>@@ -613,3 +678,68 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart9m0_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* USB 0: USB 2.0 only, OTG-capable */</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not</div><div class='add'>+	 * involved in this USB2-only bus. The bus controller (below) needs to</div><div class='add'>+	 * know that it doesn't have a USB3 port so it can ignore any</div><div class='add'>+	 * USB3-related signals. This is handled in hardware by updating the</div><div class='add'>+	 * GRFs corresponding to that bus controller. Alas, Linux currently</div><div class='add'>+	 * puts the code to do that in the USBDP driver, so USBDP0 must be</div><div class='add'>+	 * enabled for now.</div><div class='add'>+	 */</div><div class='add'>+	rockchip,dp-lane-mux = &lt;0 1 2 3&gt;; /* "No USB lanes" */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	extcon = &lt;&amp;u2phy0&gt;;</div><div class='add'>+	maximum-speed = "high-speed";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB 1: USB 3.0, host only */</div><div class='add'>+&amp;u2phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy1_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	extcon = &lt;&amp;u2phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB 2: USB 2.0, host only */</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588j.dtsi b/arch/arm64/boot/dts/rockchip/rk3588j.dtsi<br/>index bce72bac4503..9884a5df47df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a></div><div class='hunk'>@@ -11,20 +11,15 @@</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='del'>-		opp-1416000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1608000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;887500 887500 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-1704000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1704000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;937500 937500 950000&gt;;</div><div class='add'>+		opp-1296000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1296000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;775000 775000 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -33,9 +28,14 @@</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 		opp-1416000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			opp-microvolt = &lt;762500 762500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1608000000 {</div><div class='hunk'>@@ -43,25 +43,20 @@</div><div class='ctx'> 			opp-microvolt = &lt;787500 787500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;875000 875000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-2016000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cluster2_opp_table: opp-table-cluster2 {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 		opp-1416000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			opp-microvolt = &lt;762500 762500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1608000000 {</div><div class='hunk'>@@ -69,16 +64,6 @@</div><div class='ctx'> 			opp-microvolt = &lt;787500 787500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;875000 875000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-2016000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpu_opp_table: opp-table {</div><div class='hunk'>@@ -104,10 +89,6 @@</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;750000 750000 850000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-850000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;787500 787500 850000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts<br/>index 074c316a9a69..189444d20779 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -38,6 +39,29 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dp-con {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP OUT";</div><div class='add'>+		type = "mini";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds: leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -75,7 +99,7 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PC7 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -84,7 +108,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -94,7 +118,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usbdcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -104,7 +128,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_usb";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -114,7 +138,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd0v85_pcie20: avdd0v85-pcie20-regulator {</div><div class='add'>+	avdd0v85_pcie20: regulator-avdd0v85-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd0v85_pcie20";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -124,7 +148,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	avdd1v8_pcie20: avdd1v8-pcie20-regulator {</div><div class='add'>+	avdd1v8_pcie20: regulator-avdd1v8-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "avdd1v8_pcie20";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -134,7 +158,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_mipi: vcc3v3-mipi-regulator {</div><div class='add'>+	vcc3v3_mipi: regulator-vcc3v3-mipi {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -144,7 +168,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -158,7 +182,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_otg: vcc5v0-otg-regulator {</div><div class='add'>+	vcc5v0_otg: regulator-vcc5v0-otg {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio3 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -172,7 +196,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -203,11 +227,49 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dp0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp0m0_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp0_in {</div><div class='add'>+	dp0_in_vp2: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp2_out_dp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp0_out {</div><div class='add'>+	dp0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dp_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -329,6 +391,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	hym8563 {</div><div class='ctx'> 		hym8563_int: hym8563-int {</div><div class='hunk'>@@ -397,7 +463,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm13 {</div><div class='del'>-	pinctrl-names = "active";</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm13m2_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -438,6 +504,7 @@</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	max-frequency = &lt;150000000&gt;;</div><div class='ctx'> 	no-sdio;</div><div class='hunk'>@@ -771,6 +838,14 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;u2phy2 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -800,6 +875,16 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart9m2_xfer &amp;uart9m2_ctsn&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	/*</div><div class='add'>+	 * USBDP PHY0 is wired to a USB3 Type-A OTG connector. Additionally</div><div class='add'>+	 * the differential pairs 0+1 and the aux channel are wired to a</div><div class='add'>+	 * mini DP connector.</div><div class='add'>+	 */</div><div class='add'>+	rockchip,dp-lane-mux = &lt;0 1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host0_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -808,6 +893,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	extcon = &lt;&amp;u2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_host1_ehci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -815,3 +905,25 @@</div><div class='ctx'> &amp;usb_host1_ohci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp2 {</div><div class='add'>+	vp2_out_dp0: endpoint@a {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_DP0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dp0_in_vp2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts<br/>new file mode 100644<br/>index 000000000000..0df3e80f2dd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts</a></div><div class='hunk'>@@ -0,0 +1,1229 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Rockchip RK3588S EVB1 V10 Board";</div><div class='add'>+	compatible = "rockchip,rk3588s-evb1-v10", "rockchip,rk3588s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-escape {</div><div class='add'>+			label = "Escape";</div><div class='add'>+			linux,code = &lt;KEY_ESC&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1235000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			label = "Menu";</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;890000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-up {</div><div class='add'>+			label = "Volume Up";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;17000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-vol-down {</div><div class='add'>+			label = "Volume Down";</div><div class='add'>+			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;417000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amp_headphone: amplifier-headphone {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 RK_PA4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;headphone_amplifier_en&gt;;</div><div class='add'>+		sound-name-prefix = "Headphones Amplifier";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amp_speaker: amplifier-speaker {</div><div class='add'>+		compatible = "simple-audio-amplifier";</div><div class='add'>+		enable-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;speaker_amplifier_en&gt;;</div><div class='add'>+		sound-name-prefix = "Speaker Amplifier";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		simple-audio-card,name = "RK3588 EVB1 Audio";</div><div class='add'>+		simple-audio-card,aux-devs = &lt;&amp;amp_headphone&gt;, &lt;&amp;amp_speaker&gt;;</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpio = &lt;&amp;gpio1 RK_PD0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Speaker Amplifier INL", "LOUT2",</div><div class='add'>+			"Speaker Amplifier INR", "ROUT2",</div><div class='add'>+			"Speaker", "Speaker Amplifier OUTL",</div><div class='add'>+			"Speaker", "Speaker Amplifier OUTR",</div><div class='add'>+			"Headphones Amplifier INL", "LOUT1",</div><div class='add'>+			"Headphones Amplifier INR", "ROUT1",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTL",</div><div class='add'>+			"Headphones", "Headphones Amplifier OUTR",</div><div class='add'>+			"LINPUT1", "Onboard Microphone",</div><div class='add'>+			"RINPUT1", "Onboard Microphone",</div><div class='add'>+			"LINPUT2", "Microphone Jack",</div><div class='add'>+			"RINPUT2", "Microphone Jack";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Microphone", "Onboard Microphone",</div><div class='add'>+			"Headphone", "Headphones",</div><div class='add'>+			"Speaker", "Speaker";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		masterdai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	backlight: backlight {</div><div class='add'>+		compatible = "pwm-backlight";</div><div class='add'>+		power-supply = &lt;&amp;vcc3v3_lcd_edp&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm12 0 25000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	combophy_avdd0v85: regulator-combophy-avdd0v85 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "combophy_avdd0v85";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_0v85_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	combophy_avdd1v8: regulator-combophy-avdd1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "combophy_avdd1v8";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_lcd_edp: regulator-vcc3v3-lcd-edp {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc3v3_lcd_edp_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_lcd_edp";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc3v3_pcie20_en&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie20";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usbdcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edp0 {</div><div class='add'>+	force-hpd;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	aux-bus {</div><div class='add'>+		panel {</div><div class='add'>+			compatible = "edp-panel";</div><div class='add'>+			backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+			power-supply = &lt;&amp;vcc3v3_lcd_edp&gt;;</div><div class='add'>+			no-hpd;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				panel_in_edp: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;edp_out_panel&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edp0_in {</div><div class='add'>+	edp0_in_vp2: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp2_out_edp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;edp0_out {</div><div class='add'>+	edp_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8388: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c8 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c8m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus5v0_typec&gt;;</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_1_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_2_rst&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio4 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	audio {</div><div class='add'>+		hp_detect: headphone-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		headphone_amplifier_en: headphone-amplifier-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		speaker_amplifier_en: speaker-amplifier-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lcd-edp {</div><div class='add'>+		vcc3v3_lcd_edp_en: vcc3v3-lcd-edp-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2 {</div><div class='add'>+		pcie2_1_rst: pcie2-1-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_2_rst: pcie2-2-rst {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc3v3_pcie20_en: vcc3v3-pcie20-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-typec {</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm12 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm12m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_sd_s0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_npu_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_gpu_mem_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_gpu_mem_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_npu_mem_s0: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd_npu_mem_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_mem_s0: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vdd_vdenc_mem_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v1_nldo_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1100000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd1_1v8_ddr_s3: pldo-reg2 {</div><div class='add'>+				regulator-name = "vdd1_1v8_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: pldo-reg3 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			master_pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "master_pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2l_0v9_ddr_s3: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd2l_0v9_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;900000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			master_nldo3: nldo-reg3 {</div><div class='add'>+				regulator-name = "master_nldo3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@1 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x01&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rk806_slave_dvs1_null&gt;, &lt;&amp;rk806_slave_dvs2_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_slave_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_slave_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_cpu_big1_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big1_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big0_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big0_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_lit_mem_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big1_mem_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_cpu_big1_mem_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			vdd_cpu_big0_mem_s0: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd_cpu_big0_mem_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_mem_s0: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_mem_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-coupled-with = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+				regulator-coupled-max-spread = &lt;10000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_cam_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "vcc_1v8_cam_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd1v8_ddr_pll_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "avdd1v8_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_1v8_pll_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "vdd_1v8_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_sd_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v8_cam_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vcc_2v8_cam_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_pll_s0: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			slave_nldo3: nldo-reg3 {</div><div class='add'>+				regulator-name = "slave_nldo3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_cam_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_cam_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dwc3_0_role_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio1 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru DCLK_VOP2_SRC&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;cru PLL_V0PLL&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp2 {</div><div class='add'>+	vp2_out_edp0: endpoint@ROCKCHIP_VOP2_EP_EDP0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_EDP0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;edp0_in_vp2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts b/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts<br/>index 467f69594089..f5894672fcbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='hunk'>@@ -122,7 +123,7 @@</div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='ctx'> 		simple-audio-card,format = "i2s";</div><div class='ctx'> 		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio3 RK_PA6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='ctx'> 		simple-audio-card,name = "rockchip,es8388-codec";</div><div class='ctx'> 		simple-audio-card,pin-switches = "Headphones", "Speaker";</div><div class='hunk'>@@ -346,7 +347,7 @@</div><div class='ctx'> 		VCC-supply = &lt;&amp;vcc5v0_spk&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -356,7 +357,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_lcd0_n: vcc3v3-lcd0-n-regulator {</div><div class='add'>+	vcc3v3_lcd0_n: regulator-vcc3v3-lcd0-n {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -371,7 +372,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {</div><div class='add'>+	vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -383,7 +384,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_spk: vcc5v0-spk-regulator {</div><div class='add'>+	vcc5v0_spk: regulator-vcc5v0-spk {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -398,7 +399,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -456,6 +457,42 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	panel@0 {</div><div class='add'>+		compatible = "huiling,hl055fhav028c", "himax,hx8399c";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+		iovcc-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;lcd_rst&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		reset-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		rotation = &lt;90&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc3v3_lcd0_n&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			mipi_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dsi0_out_panel&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_in {</div><div class='add'>+	dsi0_in_vp3: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp3_out_dsi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_out {</div><div class='add'>+	dsi0_out_panel: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;mipi_panel_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpu {</div><div class='ctx'> 	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -575,6 +612,56 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c6m3_xfer&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='add'>+	fusb302: typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PC7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		vbus-supply = &lt;&amp;usb_otg_vbus&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			self-powered;</div><div class='add'>+			sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_FIXED(9000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+				     PDO_FIXED(12000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "sink";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_orien_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_orientation_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_role_sw: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;dwc3_0_role_switch&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					dp_altmode_mux: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_dp_altmode_mux&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	rtc_hym8563: rtc@51 {</div><div class='ctx'> 		compatible = "haoyu,hym8563";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='hunk'>@@ -603,15 +690,41 @@</div><div class='ctx'> 			 0x2F 0x00 0x64 0xA5 0xB5 0x1C 0xF0 0x49&gt;;</div><div class='ctx'> 		cellwise,monitor-interval-ms = &lt;5000&gt;;</div><div class='ctx'> 		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+		power-supplies = &lt;&amp;bq25703&gt;;</div><div class='ctx'> 		status = "okay";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	bq25703: charger@6b {</div><div class='add'>+		compatible = "ti,bq25703a";</div><div class='add'>+		reg = &lt;0x6b&gt;;</div><div class='add'>+		input-current-limit-microamp = &lt;5000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+		pinctrl-0 = &lt;&amp;charger_int_h&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		power-supplies = &lt;&amp;fusb302&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			usb_otg_vbus: vbus {</div><div class='add'>+				enable-gpios = &lt;&amp;gpio4 RK_PA6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+				pinctrl-0 = &lt;&amp;boost_enable_h&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				regulator-max-microamp = &lt;960000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;5088000&gt;;</div><div class='add'>+				regulator-min-microamp = &lt;512000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;4992000&gt;;</div><div class='add'>+				regulator-name = "usb_otg_vbus";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c7 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	es8388: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;12288000&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='hunk'>@@ -633,6 +746,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mipidcphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;package_thermal {</div><div class='ctx'> 	polling-delay = &lt;1000&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -675,6 +792,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	audio-amplifier {</div><div class='ctx'> 		headphone_amplifier_en: headphone-amplifier-en {</div><div class='hunk'>@@ -758,11 +879,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	lcd_bl_en {</div><div class='add'>+	lcd {</div><div class='ctx'> 		lcd_bl_en: lcd-bl-en {</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				&lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		lcd_rst: lcd-rst {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pcie-pins {</div><div class='hunk'>@@ -803,6 +929,12 @@</div><div class='ctx'> 			rockchip,pins =</div><div class='ctx'> 				&lt;0 RK_PC7 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		usbc_sbu_dc: usbc-sbu-dc {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;4 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+				&lt;4 RK_PA1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc3v3-lcd {</div><div class='hunk'>@@ -1235,3 +1367,61 @@</div><div class='ctx'> 		shutdown-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		dwc3_0_role_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_role_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	pinctrl-0 = &lt;&amp;usbc_sbu_dc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	rockchip,dp-lane-mux = &lt;2 3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_orientation_switch: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_orien_sw&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_dp_altmode_mux: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;dp_altmode_mux&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp3 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	vp3_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_MIPI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;dsi0_in_vp3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts<br/>index d8c50fdcca3b..4ec7bc4a9e96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +51,17 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdio_pwrseq: sdio-pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clock-names = "ext_clock";</div><div class='hunk'>@@ -62,7 +74,7 @@</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='ctx'> 		compatible = "audio-graph-card";</div><div class='del'>-		label = "rockchip,es8388-codec";</div><div class='add'>+		label = "rockchip,es8388";</div><div class='ctx'> 		widgets = "Microphone", "Mic Jack",</div><div class='ctx'> 			  "Headphone", "Headphones";</div><div class='ctx'> 		routing = "LINPUT2", "Mic Jack",</div><div class='hunk'>@@ -71,7 +83,7 @@</div><div class='ctx'> 		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vbus5v0_typec: vbus5v0-typec-regulator {</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -83,7 +95,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -94,7 +106,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Regulator is enabled whenever vcc_1v8_s0 is above 1.6v */</div><div class='del'>-	vcc_3v3_s0: vcc-3v3-s0-regulator {</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -108,7 +120,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -117,7 +129,7 @@</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -127,7 +139,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_usbdcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {</div><div class='add'>+	vcc5v0_usbdcin: regulator-vcc5v0-usbdcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -242,6 +254,38 @@</div><div class='ctx'> 			  "", "", "", "";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_scl&gt;, &lt;&amp;hdmim0_tx0_sda&gt;,</div><div class='add'>+		    &lt;&amp;hdmim0_tx0_hpd&gt;, &lt;&amp;hdmim0_tx0_cec&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -372,12 +416,11 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	es8388: audio-codec@11 {</div><div class='del'>-		compatible = "everest,es8388";</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='ctx'> 		reg = &lt;0x11&gt;;</div><div class='ctx'> 		assigned-clock-rates = &lt;12288000&gt;;</div><div class='ctx'> 		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='ctx'> 		AVDD-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='ctx'> 		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='ctx'> 		DVDD-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='ctx'> 		HPVDD-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='hunk'>@@ -410,12 +453,20 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie2x1l2 {</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;rtl8111_perstb&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	bluetooth-pins {</div><div class='ctx'> 		bt_reset: bt-reset {</div><div class='hunk'>@@ -919,3 +970,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts<br/>index dbddfc3bb464..2c22abaf40a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -42,6 +43,17 @@</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;ir_receiver_pin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "pwm-leds";</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +88,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator {</div><div class='add'>+	vcc3v3_pcie_wl: regulator-vcc3v3-pcie-wl {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -89,7 +101,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -103,7 +115,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -112,7 +124,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -122,7 +134,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vdd_3v3_sd: vdd-3v3-sd-regulator {</div><div class='add'>+	vdd_3v3_sd: regulator-vdd-3v3-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vdd_3v3_sd";</div><div class='ctx'> 		gpios = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -181,6 +193,34 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -233,6 +273,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	vdd_sd {</div><div class='ctx'> 		vdd_sd_en: vdd-sd-en {</div><div class='hunk'>@@ -283,6 +331,22 @@</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie_wl&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		reg = &lt;0x400000 0 0 0 0&gt;;</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		bus-range = &lt;0x40 0x4f&gt;;</div><div class='add'>+</div><div class='add'>+		wifi: wifi@0,0 {</div><div class='add'>+			compatible = "pci14e4,449d";</div><div class='add'>+			reg = &lt;0x410000 0 0 0 0&gt;;</div><div class='add'>+			clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+			clock-names = "lpo";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm11 {</div><div class='hunk'>@@ -677,8 +741,24 @@</div><div class='ctx'> </div><div class='ctx'> &amp;uart9 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart9m2_xfer &amp;uart9m2_ctsn&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart9m2_xfer &amp;uart9m2_ctsn &amp;uart9m2_rtsn&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "brcm,bcm43438-bt";</div><div class='add'>+		clocks = &lt;&amp;hym8563&gt;;</div><div class='add'>+		clock-names = "lpo";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wakeup";</div><div class='add'>+		device-wakeup-gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		shutdown-gpios = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		max-speed = &lt;1500000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;bt_wake_host_irq &amp;bt_wake_pin &amp;bt_reset_pin&gt;;</div><div class='add'>+		vbat-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+		vddio-supply = &lt;&amp;vcc_1v8_s3&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;u2phy2 {</div><div class='hunk'>@@ -718,3 +798,18 @@</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi<br/>new file mode 100644<br/>index 000000000000..1b6a59f7cabc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi</a></div><div class='hunk'>@@ -0,0 +1,877 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+		mmc1 = &amp;sdhci;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-maskrom {</div><div class='add'>+			label = "Maskrom";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;key1_pin&gt;;</div><div class='add'>+</div><div class='add'>+		button-user {</div><div class='add'>+			label = "User";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			debounce-interval = &lt;50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		sys_led: led-0 {</div><div class='add'>+			label = "sys_led";</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;sys_led_pin&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led: led-1 {</div><div class='add'>+			label = "wan_led";</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;wan_led_pin&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan1_led: led-2 {</div><div class='add'>+			label = "lan1_led";</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;lan1_led_pin&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan2_led: led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;lan2_led_pin&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sd_s0_pwr&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_sd_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_pcie20";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host_20: regulator-vcc5v0-host-20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host20_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host_20";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	tx_delay = &lt;0x42&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	clock-frequency = &lt;200000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio1 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_npu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gpio-key {</div><div class='add'>+		key1_pin: key1-pin {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		sys_led_pin: sys-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wan_led_pin: wan-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan1_led_pin: lan1-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lan2_led_pin: lan2-led-pin {</div><div class='add'>+			rockchip,pins =</div><div class='add'>+				&lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563 {</div><div class='add'>+		rtc_int: rtc-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdmmc {</div><div class='add'>+		sd_s0_pwr: sd-s0-pwr {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_host20_en: vcc5v0-host20-en {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211f {</div><div class='add'>+		rtl8211f_rst: rtl8211f-rst {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_0 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_1 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_2 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_sd_s0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "avcc_3v3_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "avdd_ddr_pll_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "avdd_0v85_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host_20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts<br/>index 497bbb57071f..ccc5e4627517 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "rk3588s-nanopi-r6s.dts"</div><div class='add'>+#include "rk3588s-nanopi-r6.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R6C";</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts<br/>index 4fa644ae510c..9c3e0b0daaac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts</a></div><div class='hunk'>@@ -2,763 +2,13 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include "rk3588s.dtsi"</div><div class='add'>+#include "rk3588s-nanopi-r6.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "FriendlyElec NanoPi R6S";</div><div class='ctx'> 	compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac1;</div><div class='del'>-		mmc0 = &amp;sdmmc;</div><div class='del'>-		mmc1 = &amp;sdhci;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	adc-keys {</div><div class='del'>-		compatible = "adc-keys";</div><div class='del'>-		io-channels = &lt;&amp;saradc 0&gt;;</div><div class='del'>-		io-channel-names = "buttons";</div><div class='del'>-		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='del'>-		poll-interval = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		button-maskrom {</div><div class='del'>-			label = "Maskrom";</div><div class='del'>-			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;1800&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;key1_pin&gt;;</div><div class='del'>-</div><div class='del'>-		button-user {</div><div class='del'>-			label = "User";</div><div class='del'>-			linux,code = &lt;BTN_1&gt;;</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			debounce-interval = &lt;50&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		sys_led: led-0 {</div><div class='del'>-			label = "sys_led";</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;sys_led_pin&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led: led-1 {</div><div class='del'>-			label = "wan_led";</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;wan_led_pin&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lan1_led: led-2 {</div><div class='del'>-			label = "lan1_led";</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;lan1_led_pin&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lan2_led: led-3 {</div><div class='del'>-			label = "lan2_led";</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;lan2_led_pin&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_1v1_nldo_s3";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_3v3_s0: vcc-3v3-s0-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-name = "vcc_3v3_s0";</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio4 RK_PB4 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd_s0_pwr&gt;;</div><div class='del'>-		regulator-name = "vcc_3v3_sd_s0";</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-		regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_3v3_pcie20: vcc3v3-pcie20-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_3v3_pcie20";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_usb: vcc5v0-usb-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_usb";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio1 RK_PD2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='del'>-		regulator-name = "vcc5v0_usb_otg0";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_host_20: vcc5v0-host-20-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vcc5v0_host20_en&gt;;</div><div class='del'>-		regulator-name = "vcc5v0_host_20";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_usb&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy0_ps {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy2_psu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmac1 {</div><div class='del'>-	clock_in_out = "output";</div><div class='del'>-	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='del'>-	phy-mode = "rgmii-rxid";</div><div class='del'>-	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='del'>-		     &amp;gmac1_tx_bus2</div><div class='del'>-		     &amp;gmac1_rx_bus2</div><div class='del'>-		     &amp;gmac1_rgmii_clk</div><div class='del'>-		     &amp;gmac1_rgmii_bus&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	tx_delay = &lt;0x42&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big0_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big0_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big1_s0: regulator@43 {</div><div class='del'>-		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x43&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big1_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd_npu_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_npu_s0";</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c6 {</div><div class='del'>-	clock-frequency = &lt;200000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c6m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	hym8563: rtc@51 {</div><div class='del'>-		compatible = "haoyu,hym8563";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-output-names = "hym8563";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;rtc_int&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdio1 {</div><div class='del'>-	rgmii_phy1: ethernet-phy@1 {</div><div class='del'>-		compatible = "ethernet-phy-id001c.c916";</div><div class='del'>-		reg = &lt;0x1&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;rtl8211f_rst&gt;;</div><div class='del'>-		reset-assert-us = &lt;20000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;100000&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie2x1l1 {</div><div class='del'>-	reset-gpios = &lt;&amp;gpio1 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie20&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie2x1l2 {</div><div class='del'>-	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	vpcie3v3-supply = &lt;&amp;vcc_3v3_pcie20&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	gpio-key {</div><div class='del'>-		key1_pin: key1-pin {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio-leds {</div><div class='del'>-		sys_led_pin: sys-led-pin {</div><div class='del'>-			rockchip,pins =</div><div class='del'>-				&lt;1 RK_PC1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wan_led_pin: wan-led-pin {</div><div class='del'>-			rockchip,pins =</div><div class='del'>-				&lt;1 RK_PC2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lan1_led_pin: lan1-led-pin {</div><div class='del'>-			rockchip,pins =</div><div class='del'>-				&lt;1 RK_PC3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		lan2_led_pin: lan2-led-pin {</div><div class='del'>-			rockchip,pins =</div><div class='del'>-				&lt;1 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hym8563 {</div><div class='del'>-		rtc_int: rtc-int {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdmmc {</div><div class='del'>-		sd_s0_pwr: sd-s0-pwr {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB4 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb {</div><div class='del'>-		typec5v_pwren: typec5v-pwren {</div><div class='del'>-			rockchip,pins = &lt;1 RK_PD2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vcc5v0_host20_en: vcc5v0-host20-en {</div><div class='del'>-			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtl8211f {</div><div class='del'>-		rtl8211f_rst: rtl8211f-rst {</div><div class='del'>-			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;saradc {</div><div class='del'>-	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci {</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-sd;</div><div class='del'>-	non-removable;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	disable-wp;</div><div class='del'>-	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	no-mmc;</div><div class='del'>-	no-sdio;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_3v3_sd_s0&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;200000000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='del'>-	num-cs = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	pmic@0 {</div><div class='del'>-		compatible = "rockchip,rk806";</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='del'>-			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='del'>-</div><div class='del'>-		system-power-controller;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='del'>-		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl1";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs2_null: dvs2-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs3_null: dvs3-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl3";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_gpu_s0";</div><div class='del'>-				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_cpu_lit_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_log_s0: dcdc-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_log_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_vdenc_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_s0: dcdc-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;900000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_ddr_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd2_ddr_s3: dcdc-reg6 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vdd2_ddr_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vdd_2v0_pldo_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s3: dcdc-reg8 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vcc_3v3_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vddq_ddr_s0: dcdc-reg9 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vddq_ddr_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s3: dcdc-reg10 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc_1v8_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avcc_1v8_s0: pldo-reg1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "avcc_1v8_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s0: pldo-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc_1v8_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_1v2_s0: pldo-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-name = "avdd_1v2_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avcc_3v3_s0: pldo-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "avcc_3v3_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd_s0: pldo-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-name = "vccio_sd_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pldo6_s3: pldo-reg6 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "pldo6_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s3: nldo-reg1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "vdd_0v75_s3";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_ddr_pll_s0: nldo-reg2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-name = "avdd_ddr_pll_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_0v75_s0: nldo-reg3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "avdd_0v75_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_0v85_s0: nldo-reg4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-name = "avdd_0v85_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s0: nldo-reg5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-name = "vdd_0v75_s0";</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsadc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2_host {</div><div class='del'>-	phy-supply = &lt;&amp;vcc5v0_host_20&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;lan2_led {</div><div class='add'>+	label = "lan2_led";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts<br/>index 63d91236ba9f..a72063c55140 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='hunk'>@@ -22,6 +23,17 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -236,6 +248,26 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -401,6 +433,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	lcd {</div><div class='ctx'> 		lcd_pwren: lcd-pwren {</div><div class='hunk'>@@ -901,3 +937,18 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts<br/>index feea6b20a6bf..ad6d04793b0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts</a></div><div class='hunk'>@@ -2,85 +2,13 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='del'>-#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='del'>-#include "rk3588s.dtsi"</div><div class='add'>+#include "rk3588s-orangepi-5.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Xunlong Orange Pi 5";</div><div class='ctx'> 	compatible = "xunlong,orangepi-5", "rockchip,rk3588s";</div><div class='ctx'> </div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;gmac1;</div><div class='del'>-		mmc0 = &amp;sdmmc;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:1500000n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	adc-keys {</div><div class='del'>-		compatible = "adc-keys";</div><div class='del'>-		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='del'>-		io-channel-names = "buttons";</div><div class='del'>-		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='del'>-		poll-interval = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-		button-recovery {</div><div class='del'>-			label = "Recovery";</div><div class='del'>-			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;1800&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;leds_gpio&gt;;</div><div class='del'>-</div><div class='del'>-		led-1 {</div><div class='del'>-			gpios = &lt;&amp;gpio1 RK_PA2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			label = "status_led";</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vbus_typec: vbus-typec-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-high;</div><div class='del'>-		gpio = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='del'>-		regulator-name = "vbus_typec";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc5v0_sys";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		enable-active-low;</div><div class='del'>-		gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		regulator-name = "vcc_3v3_sd_s0";</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc3v3_pcie20: vcc3v3-pcie20-regulator {</div><div class='add'>+	vcc3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpios = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='hunk'>@@ -93,674 +21,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;combphy0_ps {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;combphy2_psu {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_b3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l0 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l1 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l2 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpu_l3 {</div><div class='del'>-	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gmac1 {</div><div class='del'>-	clock_in_out = "output";</div><div class='del'>-	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='del'>-	phy-mode = "rgmii-rxid";</div><div class='del'>-	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='del'>-		     &amp;gmac1_tx_bus2</div><div class='del'>-		     &amp;gmac1_rx_bus2</div><div class='del'>-		     &amp;gmac1_rgmii_clk</div><div class='del'>-		     &amp;gmac1_rgmii_bus&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	tx_delay = &lt;0x42&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpu {</div><div class='del'>-	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big0_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big0_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_cpu_big1_s0: regulator@43 {</div><div class='del'>-		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x43&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_cpu_big1_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	vdd_npu_s0: regulator@42 {</div><div class='del'>-		compatible = "rockchip,rk8602";</div><div class='del'>-		reg = &lt;0x42&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-		regulator-name = "vdd_npu_s0";</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-		regulator-ramp-delay = &lt;2300&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		regulator-state-mem {</div><div class='del'>-			regulator-off-in-suspend;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c6 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;i2c6m3_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	usbc0: usb-typec@22 {</div><div class='del'>-		compatible = "fcs,fusb302";</div><div class='del'>-		reg = &lt;0x22&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='del'>-		vbus-supply = &lt;&amp;vbus_typec&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		usb_con: connector {</div><div class='del'>-			compatible = "usb-c-connector";</div><div class='del'>-			label = "USB-C";</div><div class='del'>-			data-role = "dual";</div><div class='del'>-			op-sink-microwatt = &lt;1000000&gt;;</div><div class='del'>-			power-role = "dual";</div><div class='del'>-			sink-pdos =</div><div class='del'>-				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='del'>-			source-pdos =</div><div class='del'>-				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='del'>-			try-power-role = "source";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					usbc0_hs: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usb_host0_xhci_drd_sw&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					usbc0_ss: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usbdp_phy0_typec_ss&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					usbc0_sbu: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;usbdp_phy0_typec_sbu&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hym8563: rtc@51 {</div><div class='del'>-		compatible = "haoyu,hym8563";</div><div class='del'>-		reg = &lt;0x51&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-output-names = "hym8563";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mdio1 {</div><div class='del'>-	rgmii_phy1: ethernet-phy@1 {</div><div class='del'>-		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='del'>-		reg = &lt;0x1&gt;;</div><div class='del'>-		reset-assert-us = &lt;20000&gt;;</div><div class='del'>-		reset-deassert-us = &lt;100000&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;pcie2x1l2 {</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie20&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;pinctrl {</div><div class='del'>-	gpio-func {</div><div class='del'>-		leds_gpio: leds-gpio {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PA2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hym8563 {</div><div class='del'>-		hym8563_int: hym8563-int {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb-typec {</div><div class='del'>-		usbc0_int: usbc0-int {</div><div class='del'>-			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		typec5v_pwren: typec5v-pwren {</div><div class='del'>-			rockchip,pins = &lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;saradc {</div><div class='del'>-	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdmmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	disable-wp;</div><div class='del'>-	max-frequency = &lt;150000000&gt;;</div><div class='del'>-	no-mmc;</div><div class='del'>-	no-sdio;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	vmmc-supply = &lt;&amp;vcc_3v3_sd_s0&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sfc {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;fspim0_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;200000000&gt;;</div><div class='del'>-	num-cs = &lt;1&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='del'>-</div><div class='del'>-	pmic@0 {</div><div class='del'>-		compatible = "rockchip,rk806";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='del'>-				&lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-		system-power-controller;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='del'>-		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='del'>-		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		rk806_dvs1_null: dvs1-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl1";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs2_null: dvs2-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl2";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk806_dvs3_null: dvs3-null-pins {</div><div class='del'>-			pins = "gpio_pwrctrl3";</div><div class='del'>-			function = "pin_fun0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_gpu_s0: dcdc-reg1 {</div><div class='del'>-				regulator-name = "vdd_gpu_s0";</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='del'>-				regulator-name = "vdd_cpu_lit_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_log_s0: dcdc-reg3 {</div><div class='del'>-				regulator-name = "vdd_log_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_vdenc_s0: dcdc-reg4 {</div><div class='del'>-				regulator-name = "vdd_vdenc_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;550000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_s0: dcdc-reg5 {</div><div class='del'>-				regulator-name = "vdd_ddr_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;675000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;900000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {</div><div class='del'>-				regulator-name = "vdd2_ddr_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='del'>-				regulator-name = "vdd_2v0_pldo_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s3: dcdc-reg8 {</div><div class='del'>-				regulator-name = "vcc_3v3_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vddq_ddr_s0: dcdc-reg9 {</div><div class='del'>-				regulator-name = "vddq_ddr_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s3: dcdc-reg10 {</div><div class='del'>-				regulator-name = "vcc_1v8_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avcc_1v8_s0: pldo-reg1 {</div><div class='del'>-				regulator-name = "avcc_1v8_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8_s0: pldo-reg2 {</div><div class='del'>-				regulator-name = "vcc_1v8_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_1v2_s0: pldo-reg3 {</div><div class='del'>-				regulator-name = "avdd_1v2_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3_s0: pldo-reg4 {</div><div class='del'>-				regulator-name = "vcc_3v3_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd_s0: pldo-reg5 {</div><div class='del'>-				regulator-name = "vccio_sd_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pldo6_s3: pldo-reg6 {</div><div class='del'>-				regulator-name = "pldo6_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s3: nldo-reg1 {</div><div class='del'>-				regulator-name = "vdd_0v75_s3";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='del'>-				regulator-name = "vdd_ddr_pll_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			avdd_0v75_s0: nldo-reg3 {</div><div class='del'>-				regulator-name = "avdd_0v75_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v85_s0: nldo-reg4 {</div><div class='del'>-				regulator-name = "vdd_0v85_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_0v75_s0: nldo-reg5 {</div><div class='del'>-				regulator-name = "vdd_0v75_s0";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tsadc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy0_otg {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy2_host {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;u2phy3_host {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;uart2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbdp_phy0 {</div><div class='del'>-	mode-switch;</div><div class='del'>-	orientation-switch;</div><div class='del'>-	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		usbdp_phy0_typec_ss: endpoint@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usbdp_phy0_typec_sbu: endpoint@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host0_xhci {</div><div class='del'>-	dr_mode = "otg";</div><div class='del'>-	usb-role-switch;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		usb_host0_xhci_drd_sw: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host1_ehci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host1_ohci {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi<br/>new file mode 100644<br/>index 000000000000..dafad29f9854<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi</a></div><div class='hunk'>@@ -0,0 +1,911 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc-keys {</div><div class='add'>+		compatible = "adc-keys";</div><div class='add'>+		io-channels = &lt;&amp;saradc 1&gt;;</div><div class='add'>+		io-channel-names = "buttons";</div><div class='add'>+		keyup-threshold-microvolt = &lt;1800000&gt;;</div><div class='add'>+		poll-interval = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+		button-recovery {</div><div class='add'>+			label = "Recovery";</div><div class='add'>+			linux,code = &lt;KEY_VENDOR&gt;;</div><div class='add'>+			press-threshold-microvolt = &lt;1800&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		simple-audio-card,name = "rockchip,es8388";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "LOUT1",</div><div class='add'>+			"Headphones", "ROUT1",</div><div class='add'>+			"LINPUT1", "Microphone Jack",</div><div class='add'>+			"RINPUT1", "Microphone Jack",</div><div class='add'>+			"LINPUT2", "Onboard Microphone",</div><div class='add'>+			"RINPUT2", "Onboard Microphone";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Microphone", "Onboard Microphone",</div><div class='add'>+			"Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s1_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		masterdai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm-leds {</div><div class='add'>+		compatible = "pwm-leds";</div><div class='add'>+</div><div class='add'>+		led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			max-brightness = &lt;255&gt;;</div><div class='add'>+			pwms = &lt;&amp;pwm0 0 25000 0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus_typec: regulator-vbus-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpios = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		regulator-name = "vcc_3v3_sd_s0";</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	tx_delay = &lt;0x42&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_sound {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c6m3_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8388: audio-codec@10 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S1_8CH_MCLKOUT&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S1_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbc0: usb-typec@22 {</div><div class='add'>+		compatible = "fcs,fusb302";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PD3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usbc0_int&gt;;</div><div class='add'>+		vbus-supply = &lt;&amp;vbus_typec&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		usb_con: connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			op-sink-microwatt = &lt;1000000&gt;;</div><div class='add'>+			power-role = "dual";</div><div class='add'>+			sink-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			source-pdos =</div><div class='add'>+				&lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+			try-power-role = "source";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					usbc0_hs: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usb_host0_xhci_drd_sw&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					usbc0_ss: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_ss&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					usbc0_sbu: endpoint {</div><div class='add'>+						remote-endpoint = &lt;&amp;usbdp_phy0_typec_sbu&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-source;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s1_8ch {</div><div class='add'>+	rockchip,i2s-tx-route = &lt;3 2 1 0&gt;;</div><div class='add'>+	rockchip,i2s-rx-route = &lt;1 3 2 0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s1m0_sclk</div><div class='add'>+	             &amp;i2s1m0_mclk</div><div class='add'>+	             &amp;i2s1m0_lrck</div><div class='add'>+	             &amp;i2s1m0_sdi1</div><div class='add'>+	             &amp;i2s1m0_sdo3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s5_8ch {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_npu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb-typec {</div><div class='add'>+		usbc0_int: usbc0-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm0m2_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_0 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_1 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_core_2 {</div><div class='add'>+	npu-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	sram-supply = &lt;&amp;vdd_npu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rknn_mmu_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;avcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_sd_s0&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspim0_pins&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+				&lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	mode-switch;</div><div class='add'>+	orientation-switch;</div><div class='add'>+	sbu1-dc-gpios = &lt;&amp;gpio4 RK_PA5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	sbu2-dc-gpios = &lt;&amp;gpio4 RK_PA7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_ss: endpoint@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_ss&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbdp_phy0_typec_sbu: endpoint@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_sbu&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb_host0_xhci_drd_sw: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usbc0_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts<br/>new file mode 100644<br/>index 000000000000..d21ec320d295<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5b.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "rk3588s-orangepi-5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Xunlong Orange Pi 5B";</div><div class='add'>+	compatible = "xunlong,orangepi-5b", "rockchip,rk3588s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts<br/>new file mode 100644<br/>index 000000000000..7e179862da6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts</a></div><div class='hunk'>@@ -0,0 +1,840 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Firefly Station M3";</div><div class='add'>+	compatible = "firefly,rk3588s-roc-pc", "rockchip,rk3588s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hp_detect&gt;;</div><div class='add'>+		simple-audio-card,name = "rockchip,es8388";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;masterdai&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpio1 RK_PA6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,pin-switches = "Headphones";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "LOUT1",</div><div class='add'>+			"Headphones", "ROUT1",</div><div class='add'>+			"LINPUT1", "Microphone Jack",</div><div class='add'>+			"RINPUT1", "Microphone Jack",</div><div class='add'>+			"LINPUT2", "Onboard Microphone",</div><div class='add'>+			"RINPUT2", "Onboard Microphone";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Microphone", "Onboard Microphone",</div><div class='add'>+			"Headphone", "Headphones";</div><div class='add'>+</div><div class='add'>+		masterdai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;es8388&gt;;</div><div class='add'>+			system-clock-frequency = &lt;12288000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;i2s0_8ch&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;60 100 140 160 185 220 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm11 0 50000 1&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio1 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PB2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc12v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vbus5v0_typec: regulator-vbus5v0-typec {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PB1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;typec5v_pwren&gt;;</div><div class='add'>+		regulator-name = "vbus5v0_typec";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc3v3_pcie20: regulator-vcc3v3-pcie20 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PD7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "vcc3v3_pcie20";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		startup-delay-us = &lt;5000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio1 RK_PB6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc5v0_host_en&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_host";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_sys";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb: regulator-vcc5v0-usb {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v0_usb";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	clock_in_out = "output";</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hym8563: rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "hym8563";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	es8388: audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8388", "everest,es8328";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S1_8CH_MCLKOUT&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+		HPVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		PVDD-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S1_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtl8211f_rst&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio0 RK_PD3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l1 {</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;vcc3v3_pcie20&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	hym8563 {</div><div class='add'>+		hym8563_int: hym8563-int {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	headphone {</div><div class='add'>+		hp_detect: hp-detect {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PA6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		led_pins: led-pins {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;3 RK_PB2 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;3 RK_PC0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl8211 {</div><div class='add'>+		rtl8211f_rst: rtl8211f-rst {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD3 RK_FUNC_GPIO &amp;pcfg_pull_up&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		typec5v_pwren: typec5v-pwren {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc5v0_host_en: vcc5v0-host-en {</div><div class='add'>+			rockchip,pins = &lt;1 RK_PB6 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm11 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm11m3_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	max-frequency = &lt;150000000&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_log_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_log_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc_1v8_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "avcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcc_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdd_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			avdd_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "avdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdd_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart7 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart7m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	extcon = &lt;&amp;u2phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts<br/>index 294b99dd50da..19a08f7794e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='ctx'> #include "rk3588s.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -35,6 +36,17 @@</div><div class='ctx'> 		stdout-path = "serial2:1500000n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "d";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -46,6 +58,13 @@</div><div class='ctx'> 			gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		power-led {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "default-on";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	fan: pwm-fan {</div><div class='hunk'>@@ -56,7 +75,7 @@</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc12v_dcin: vcc12v-dcin-regulator {</div><div class='add'>+	vcc12v_dcin: regulator-vcc12v-dcin {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc12v_dcin";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -65,7 +84,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc3v3_wf: vcc3v3-wf-regulator {</div><div class='add'>+	vcc3v3_wf: regulator-vcc3v3-wf {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc3v3_wf";</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='hunk'>@@ -77,7 +96,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_host: vcc5v0-host-regulator {</div><div class='add'>+	vcc5v0_host: regulator-vcc5v0-host {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_host";</div><div class='ctx'> 		regulator-boot-on;</div><div class='hunk'>@@ -91,7 +110,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc5v0_sys: vcc5v0-sys-regulator {</div><div class='add'>+	vcc5v0_sys: regulator-vcc5v0-sys {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc5v0_sys";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -101,7 +120,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc12v_dcin&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_5v0: vcc-5v0-regulator {</div><div class='add'>+	vcc_5v0: regulator-vcc-5v0 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_5v0";</div><div class='ctx'> 		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='hunk'>@@ -115,7 +134,7 @@</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc5v0_sys&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "vcc_1v1_nldo_s3";</div><div class='ctx'> 		regulator-always-on;</div><div class='hunk'>@@ -166,6 +185,11 @@</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='hunk'>@@ -296,6 +320,31 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_cec</div><div class='add'>+		     &amp;hdmim1_tx0_hpd</div><div class='add'>+		     &amp;hdmim0_tx0_scl</div><div class='add'>+		     &amp;hdmim0_tx0_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mdio1 {</div><div class='ctx'> 	rgmii_phy1: ethernet-phy@1 {</div><div class='ctx'> 		/* RTL8211F */</div><div class='hunk'>@@ -310,13 +359,17 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie2x1l2 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie20x1m0_pins&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie2_reset&gt;, &lt;&amp;pcie20x1m0_clkreqn&gt;, &lt;&amp;pcie20x1m0_waken&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	vpcie3v3-supply = &lt;&amp;vcc3v3_wf&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl {</div><div class='ctx'> 	leds {</div><div class='ctx'> 		io_led: io-led {</div><div class='hunk'>@@ -328,6 +381,10 @@</div><div class='ctx'> 		pow_en: pow-en {</div><div class='ctx'> 			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		pcie2_reset: pcie2-reset {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	power {</div><div class='hunk'>@@ -784,3 +841,18 @@</div><div class='ctx'> &amp;usb_host2_xhci {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts<br/>new file mode 100644<br/>index 000000000000..dd7317bab613<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts</a></div><div class='hunk'>@@ -0,0 +1,956 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/rockchip,vop2.h&gt;</div><div class='add'>+#include "rk3588s.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Radxa ROCK 5C";</div><div class='add'>+	compatible = "radxa,rock-5c", "rockchip,rk3588s";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac1;</div><div class='add'>+		mmc0 = &amp;sdhci;</div><div class='add'>+		mmc1 = &amp;sdmmc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:1500000n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	analog-sound {</div><div class='add'>+		compatible = "audio-graph-card";</div><div class='add'>+		label = "rk3588-es8316";</div><div class='add'>+		dais = &lt;&amp;i2s0_8ch_p0&gt;;</div><div class='add'>+		routing = "MIC2", "Mic Jack",</div><div class='add'>+			  "Headphones", "HPOL",</div><div class='add'>+			  "Headphones", "HPOR";</div><div class='add'>+		widgets = "Microphone", "Mic Jack",</div><div class='add'>+			  "Headphone", "Headphones";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdmi0-con {</div><div class='add'>+		compatible = "hdmi-connector";</div><div class='add'>+		type = "a";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			hdmi0_con_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;hdmi0_out_con&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_POWER;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PC4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			gpios = &lt;&amp;gpio3 RK_PD5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fan: fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+		cooling-levels = &lt;0 24 44 64 128 192 255&gt;;</div><div class='add'>+		fan-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm3 0 10000 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie2x1l2_3v3: regulator-pcie2x1l2-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PC5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pow_en&gt;;</div><div class='add'>+		regulator-name = "pcie2x1l2_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v_dcin: regulator-vcc5v-dcin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc5v_dcin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_host: regulator-vcc5v0-usb-host {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PB5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_host_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_host";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PD4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_otg_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc5v0_usb_otg0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v1_nldo_s3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_pmu: regulator-vcc-3v3-pmu {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_pmu";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_s0: regulator-vcc-3v3-s0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_1v8_s0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0: regulator-vcc-5v0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio4 RK_PA3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vcc_5v0_pwren_h&gt;;</div><div class='add'>+		regulator-name = "vcc_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_sysin: regulator-vcc-sysin {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_sysin";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc5v_dcin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcca: regulator-vcca {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcca";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3: regulator-vdd-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;gpio0 RK_PA0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usb_wifi_pwr&gt;;</div><div class='add'>+		regulator-name = "vdd_3v3";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy0_ps {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;combphy2_psu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big0_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_b3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_big1_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l0 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l1 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l2 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_l3 {</div><div class='add'>+	cpu-supply = &lt;&amp;vdd_cpu_lit_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-supply = &lt;&amp;vcc_3v3_s0&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_miim</div><div class='add'>+		     &amp;gmac1_tx_bus2</div><div class='add'>+		     &amp;gmac1_rx_bus2</div><div class='add'>+		     &amp;gmac1_rgmii_clk</div><div class='add'>+		     &amp;gmac1_rgmii_bus</div><div class='add'>+		     &amp;gmac1_clkinout&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu {</div><div class='add'>+	mali-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;hdmim0_tx0_cec</div><div class='add'>+		     &amp;hdmim1_tx0_hpd</div><div class='add'>+		     &amp;hdmim0_tx0_scl</div><div class='add'>+		     &amp;hdmim0_tx0_sda&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_in {</div><div class='add'>+	hdmi0_in_vp0: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;vp0_out_hdmi0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdmi0_out {</div><div class='add'>+	hdmi0_out_con: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_con_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;hdptxphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c0m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big0_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big0_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_cpu_big1_s0: regulator@43 {</div><div class='add'>+		compatible = "rockchip,rk8603", "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_cpu_big1_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "belling,bl24c16a", "atmel,24c16";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3_pmu&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_npu_s0: regulator@42 {</div><div class='add'>+		compatible = "rockchip,rk8602";</div><div class='add'>+		reg = &lt;0x42&gt;;</div><div class='add'>+		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+		regulator-name = "vdd_npu_s0";</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+		regulator-ramp-delay = &lt;2300&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+</div><div class='add'>+		regulator-state-mem {</div><div class='add'>+			regulator-off-in-suspend;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c5m2_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@51 {</div><div class='add'>+		compatible = "haoyu,hym8563";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "rtcic_32kout";</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;rtc_int_l&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c7 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	audio-codec@11 {</div><div class='add'>+		compatible = "everest,es8316";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			es8316_p0_0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;i2s0_8ch_p0_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2s0_8ch {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2s0_lrck</div><div class='add'>+		     &amp;i2s0_mclk</div><div class='add'>+		     &amp;i2s0_sclk</div><div class='add'>+		     &amp;i2s0_sdi0</div><div class='add'>+		     &amp;i2s0_sdo0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	i2s0_8ch_p0: port {</div><div class='add'>+		i2s0_8ch_p0_0: endpoint {</div><div class='add'>+			dai-format = "i2s";</div><div class='add'>+			mclk-fs = &lt;256&gt;;</div><div class='add'>+			remote-endpoint = &lt;&amp;es8316_p0_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	rgmii_phy1: ethernet-phy@1 {</div><div class='add'>+		compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;gmac1_rstn&gt;;</div><div class='add'>+		reset-assert-us = &lt;20000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 RK_PB7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='add'>+	trips {</div><div class='add'>+		package_fan0: package-fan0 {</div><div class='add'>+			temperature = &lt;55000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		package_fan1: package-fan1 {</div><div class='add'>+			temperature = &lt;65000&gt;;</div><div class='add'>+			hysteresis = &lt;2000&gt;;</div><div class='add'>+			type = "active";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			trip = &lt;&amp;package_fan0&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		map1 {</div><div class='add'>+			trip = &lt;&amp;package_fan1&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan 2 THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2x1l2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie20x1_2_perstn_m0&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpio3 RK_PD1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	vpcie3v3-supply = &lt;&amp;pcie2x1l2_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pd_gpu {</div><div class='add'>+	domain-supply = &lt;&amp;vdd_gpu_s0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	leds {</div><div class='add'>+		led_pins: led-pins {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PC4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;,</div><div class='add'>+					&lt;3 RK_PD5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		gmac1_rstn: gmac1-rstn {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PB7 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie {</div><div class='add'>+		pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 {</div><div class='add'>+			rockchip,pins = &lt;3 RK_PD1 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pow_en: pow-en {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PC5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		rtc_int_l: rtc-int-l {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PB0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb {</div><div class='add'>+		usb_host_pwren_h: usb-host-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PB5 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_otg_pwren_h: usb-otg-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PD4 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_wifi_pwr: usb-wifi-pwr {</div><div class='add'>+			rockchip,pins = &lt;0 RK_PA0 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vcc_5v0_pwren_h: vcc-5v0-pwren-h {</div><div class='add'>+			rockchip,pins = &lt;4 RK_PA3 RK_FUNC_GPIO &amp;pcfg_pull_none&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm3m1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;saradc {</div><div class='add'>+	vref-supply = &lt;&amp;vcca_1v8_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3_s3&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vccio_sd_s0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sfc {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;fspim0_pins&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;104000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;cru CLK_SPI2&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;200000000&gt;;</div><div class='add'>+	num-cs = &lt;1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;spi2m2_cs0 &amp;spi2m2_pins&gt;;</div><div class='add'>+</div><div class='add'>+	pmic@0 {</div><div class='add'>+		compatible = "rockchip,rk806";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+		interrupts = &lt;7 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_pins&gt;, &lt;&amp;rk806_dvs1_null&gt;,</div><div class='add'>+			    &lt;&amp;rk806_dvs2_null&gt;, &lt;&amp;rk806_dvs3_null&gt;;</div><div class='add'>+		spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+</div><div class='add'>+		vcc1-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc2-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc3-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc4-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc5-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc6-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc7-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc8-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc9-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc10-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc11-supply = &lt;&amp;vcc_2v0_pldo_s3&gt;;</div><div class='add'>+		vcc12-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+		vcc13-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcc14-supply = &lt;&amp;vcc_1v1_nldo_s3&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vcca&gt;;</div><div class='add'>+</div><div class='add'>+		rk806_dvs1_null: dvs1-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl1";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs2_null: dvs2-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl2";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rk806_dvs3_null: dvs3-null-pins {</div><div class='add'>+			pins = "gpio_pwrctrl3";</div><div class='add'>+			function = "pin_fun0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd_gpu_s0: dcdc-reg1 {</div><div class='add'>+				regulator-name = "vdd_gpu_s0";</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+				regulator-enable-ramp-delay = &lt;400&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_cpu_lit_s0: dcdc-reg2 {</div><div class='add'>+				regulator-name = "vdd_cpu_lit_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_logic_s0: dcdc-reg3 {</div><div class='add'>+				regulator-name = "vdd_logic_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_vdenc_s0: dcdc-reg4 {</div><div class='add'>+				regulator-name = "vdd_vdenc_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;550000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;950000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_ddr_s0: dcdc-reg5 {</div><div class='add'>+				regulator-name = "vdd_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;675000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd2_ddr_s3: dcdc-reg6 {</div><div class='add'>+				regulator-name = "vdd2_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_2v0_pldo_s3: dcdc-reg7 {</div><div class='add'>+				regulator-name = "vdd_2v0_pldo_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+				regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;2000000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_3v3_s3: dcdc-reg8 {</div><div class='add'>+				regulator-name = "vcc_3v3_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vddq_ddr_s0: dcdc-reg9 {</div><div class='add'>+				regulator-name = "vddq_ddr_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc1v8_pmu_ddr_s3: dcdc-reg10 {</div><div class='add'>+				regulator-name = "vcc1v8_pmu_ddr_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcc_1v8_s0: pldo-reg1 {</div><div class='add'>+				regulator-name = "vcc_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_1v8_s0: pldo-reg2 {</div><div class='add'>+				regulator-name = "vcca_1v8_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_1v2_s0: pldo-reg3 {</div><div class='add'>+				regulator-name = "vdda_1v2_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vcca_3v3_s0: pldo-reg4 {</div><div class='add'>+				regulator-name = "vcca_3v3_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vccio_sd_s0: pldo-reg5 {</div><div class='add'>+				regulator-name = "vccio_sd_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pldo6_s3: pldo-reg6 {</div><div class='add'>+				regulator-name = "pldo6_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s3: nldo-reg1 {</div><div class='add'>+				regulator-name = "vdd_0v75_s3";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;750000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_ddr_pll_s0: nldo-reg2 {</div><div class='add'>+				regulator-name = "vdda_ddr_pll_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-on-in-suspend;</div><div class='add'>+					regulator-suspend-microvolt = &lt;850000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v75_s0: nldo-reg3 {</div><div class='add'>+				regulator-name = "vdda_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdda_0v85_s0: nldo-reg4 {</div><div class='add'>+				regulator-name = "vdda_0v85_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			vdd_0v75_s0: nldo-reg5 {</div><div class='add'>+				regulator-name = "vdd_0v75_s0";</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-state-mem {</div><div class='add'>+					regulator-off-in-suspend;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tsadc {</div><div class='add'>+	rockchip,hw-tshut-mode = &lt;1&gt;; /* tshut mode 0:CRU 1:GPIO */</div><div class='add'>+	rockchip,hw-tshut-polarity = &lt;0&gt;; /* tshut polarity 0:LOW 1:HIGH */</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy0_otg {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_otg0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy2_host {</div><div class='add'>+	/* connected to USB hub, which is powered by vcc_5v0 */</div><div class='add'>+	phy-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;u2phy3_host {</div><div class='add'>+	phy-supply = &lt;&amp;vcc5v0_usb_host&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart2m0_xfer&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbdp_phy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host0_xhci {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host1_ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_host2_xhci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop_mmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vop {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;vp0 {</div><div class='add'>+	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {</div><div class='add'>+		reg = &lt;ROCKCHIP_VOP2_EP_HDMI0&gt;;</div><div class='add'>+		remote-endpoint = &lt;&amp;hdmi0_in_vp0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk8xx.h b/arch/arm64/boot/dts/rockchip/rk8xx.h<br/>new file mode 100644<br/>index 000000000000..a6fbef71c064<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rk8xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rk8xx.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Device Tree defines for Rockchip RK8xx PMICs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Cherry Embedded Solutions GmbH</div><div class='add'>+ *</div><div class='add'>+ * Author: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _DT_MFD_ROCKCHIP_RK8XX_H</div><div class='add'>+#define _DT_MFD_ROCKCHIP_RK8XX_H</div><div class='add'>+</div><div class='add'>+/* For use with rockchip,reset-mode property */</div><div class='add'>+#define RK806_RESTART		0</div><div class='add'>+#define RK806_RESET		1</div><div class='add'>+#define RK806_RESET_NOTIFY	2</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi b/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi<br/>index 5c645437b507..b0475b7c655a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/rockchip/rockchip-pinconf.dtsi</a></div><div class='hunk'>@@ -333,6 +333,41 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/omit-if-no-ref/</div><div class='add'>+	pcfg_pull_none_drv_level_1_smt: pcfg-pull-none-drv-level-1-smt {</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-strength = &lt;1&gt;;</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	pcfg_pull_none_drv_level_2_smt: pcfg-pull-none-drv-level-2-smt {</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-strength = &lt;2&gt;;</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	pcfg_pull_none_drv_level_3_smt: pcfg-pull-none-drv-level-3-smt {</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-strength = &lt;3&gt;;</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	pcfg_pull_none_drv_level_4_smt: pcfg-pull-none-drv-level-4-smt {</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-strength = &lt;4&gt;;</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='add'>+	pcfg_pull_none_drv_level_5_smt: pcfg-pull-none-drv-level-5-smt {</div><div class='add'>+		bias-disable;</div><div class='add'>+		drive-strength = &lt;5&gt;;</div><div class='add'>+		input-schmitt-enable;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/omit-if-no-ref/</div><div class='ctx'> 	pcfg_output_high: pcfg-output-high {</div><div class='ctx'> 		output-high;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts<br/>index a251c4343548..fc105d420db4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts</a></div><div class='hunk'>@@ -61,14 +61,14 @@</div><div class='ctx'> 			&amp;i2s_port4</div><div class='ctx'> 			&amp;spdif_port0</div><div class='ctx'> 			&amp;comp_spdif_port0&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	spdif-out {</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			comp_spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;comp_spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts<br/>index fba454adae7d..10efa747ed8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/socionext/uniphier-ld20-akebi96.dts</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			comp_spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;comp_spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts<br/>index 79f6db2455c1..3c4dcfb82ddf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts</a></div><div class='hunk'>@@ -61,14 +61,14 @@</div><div class='ctx'> 			&amp;i2s_port4</div><div class='ctx'> 			&amp;spdif_port0</div><div class='ctx'> 			&amp;comp_spdif_port0&gt;;</div><div class='del'>-		hp-det-gpio = &lt;&amp;gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		hp-det-gpios = &lt;&amp;gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	spdif-out {</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='add'>+		port {</div><div class='ctx'> 			comp_spdif_tx: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;comp_spdif_hiecout1&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi<br/>index 335093da6573..875b93856a64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi</a></div><div class='hunk'>@@ -947,6 +947,7 @@</div><div class='ctx'> </div><div class='ctx'> 			pcie_intc: legacy-interrupt-controller {</div><div class='ctx'> 				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi<br/>index d6e3cc6fdb25..4d6c3c2dbea6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi</a></div><div class='hunk'>@@ -921,6 +921,7 @@</div><div class='ctx'> </div><div class='ctx'> 			pcie_intc: legacy-interrupt-controller {</div><div class='ctx'> 				interrupt-controller;</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/sophgo/Makefile b/arch/arm64/boot/dts/sophgo/Makefile<br/>new file mode 100644<br/>index 000000000000..94f52cd7d994<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sophgo/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sophgo/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_SOPHGO) += sg2000-milkv-duo-module-01-evb.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts b/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts<br/>new file mode 100644<br/>index 000000000000..a281fee0d76e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sg2000-milkv-duo-module-01.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Milk-V Duo Module 01 Evaluation Board";</div><div class='add'>+	compatible = "milkv,duo-module-01-evb", "milkv,duo-module-01", "sophgo,sg2000";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	sdhci0_cfg: sdhci0-cfg {</div><div class='add'>+		sdhci0-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-clk-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CLK, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;16100&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-cmd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CMD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-data-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_D0, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D1, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D2, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D3, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	disable-wp;</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhci0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi b/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi<br/>new file mode 100644<br/>index 000000000000..32c988f3c58f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-sg2000.h&gt;</div><div class='add'>+#include "sg2000.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Milk-V Duo Module 01";</div><div class='add'>+	compatible = "milkv,duo-module-01", "sophgo,sg2000";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+		serial4 = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;osc {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Wi-Fi */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/sophgo/sg2000.dtsi b/arch/arm64/boot/dts/sophgo/sg2000.dtsi<br/>new file mode 100644<br/>index 000000000000..51177dfe9ed2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sophgo/sg2000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sophgo/sg2000.dtsi</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+</div><div class='add'>+#define SOC_PERIPHERAL_IRQ(nr)		GIC_SPI (nr)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;riscv/sophgo/cv180x.dtsi&gt;</div><div class='add'>+#include &lt;riscv/sophgo/cv181x.dtsi&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "sophgo,sg2000";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a53";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2: l2-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			cache-size = &lt;0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x20000000&gt;;	/* 512MiB */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a53-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-0.2";</div><div class='add'>+		method = "smc";</div><div class='add'>+		cpu_on = &lt;0xc4000003&gt;;</div><div class='add'>+		cpu_off = &lt;0x84000002&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		gic: interrupt-controller@1f01000 {</div><div class='add'>+			compatible = "arm,cortex-a15-gic";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			reg = &lt;0x01f01000 0x1000&gt;,</div><div class='add'>+			      &lt;0x01f02000 0x2000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@3001000 {</div><div class='add'>+			compatible = "sophgo,sg2000-pinctrl";</div><div class='add'>+			reg = &lt;0x03001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x05027000 0x1000&gt;;</div><div class='add'>+			reg-names = "sys", "rtc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk: clock-controller@3002000 {</div><div class='add'>+			compatible = "sophgo,sg2000-clk";</div><div class='add'>+			reg = &lt;0x03002000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		always-on;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi b/arch/arm64/boot/dts/sprd/sc2731.dtsi<br/>index 12136e68dada..458685b82462 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sc2731.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sc2731.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sc2731.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sprd/sc2731.dtsi</a></div><div class='hunk'>@@ -94,17 +94,17 @@</div><div class='ctx'> 			nvmem-cells = &lt;&amp;adc_big_scale&gt;, &lt;&amp;adc_small_scale&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		fuel-gauge@a00 {</div><div class='add'>+		pmic_fgu: fuel-gauge@a00 {</div><div class='ctx'> 			compatible = "sprd,sc2731-fgu";</div><div class='ctx'> 			reg = &lt;0xa00&gt;;</div><div class='del'>-			bat-detect-gpio = &lt;&amp;pmic_eic 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			battery-detect-gpios = &lt;&amp;pmic_eic 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 			io-channels = &lt;&amp;pmic_adc 3&gt;, &lt;&amp;pmic_adc 6&gt;;</div><div class='ctx'> 			io-channel-names = "bat-temp", "charge-vol";</div><div class='del'>-			monitored-battery = &lt;&amp;bat&gt;;</div><div class='ctx'> 			nvmem-cell-names = "fgu_calib";</div><div class='ctx'> 			nvmem-cells = &lt;&amp;fgu_calib&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;sc2731_pmic&gt;;</div><div class='ctx'> 			interrupts = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		vibrator@ec8 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sprd/sc9863a.dtsi<br/>index e5a2857721e2..e97000e560e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sc9863a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sprd/sc9863a.dtsi</a></div><div class='hunk'>@@ -163,18 +163,18 @@</div><div class='ctx'> 		ap_clk: clock-controller@21500000 {</div><div class='ctx'> 			compatible = "sprd,sc9863a-ap-clk";</div><div class='ctx'> 			reg = &lt;0 0x21500000 0 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ext_32k&gt;, &lt;&amp;ext_26m&gt;;</div><div class='del'>-			clock-names = "ext-32k", "ext-26m";</div><div class='add'>+			clocks = &lt;&amp;ext_26m&gt;, &lt;&amp;ext_32k&gt;;</div><div class='add'>+			clock-names = "ext-26m", "ext-32k";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		aon_clk: clock-controller@402d0000 {</div><div class='ctx'> 			compatible = "sprd,sc9863a-aon-clk";</div><div class='ctx'> 			reg = &lt;0 0x402d0000 0 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;ext_26m&gt;, &lt;&amp;rco_100m&gt;,</div><div class='del'>-				 &lt;&amp;ext_32k&gt;, &lt;&amp;ext_4m&gt;;</div><div class='del'>-			clock-names = "ext-26m", "rco-100m",</div><div class='del'>-				      "ext-32k", "ext-4m";</div><div class='add'>+			clocks = &lt;&amp;ext_26m&gt;, &lt;&amp;ext_32k&gt;,</div><div class='add'>+				 &lt;&amp;ext_4m&gt;, &lt;&amp;rco_100m&gt;;</div><div class='add'>+			clock-names = "ext-26m", "ext-32k",</div><div class='add'>+				      "ext-4m", "rco-100m";</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -288,7 +288,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			in-port {</div><div class='add'>+			in-ports {</div><div class='ctx'> 				port {</div><div class='ctx'> 					etf_little_in: endpoint {</div><div class='ctx'> 						remote-endpoint =</div><div class='head'>diff --git a/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts b/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts<br/>index 095b24a31313..b1fa817ece1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/sprd/sp9860g-1h10.dts</a></div><div class='hunk'>@@ -71,8 +71,8 @@</div><div class='ctx'> 		compatible = "simple-battery";</div><div class='ctx'> 		charge-full-design-microamp-hours = &lt;1900000&gt;;</div><div class='ctx'> 		charge-term-current-microamp = &lt;120000&gt;;</div><div class='del'>-		constant_charge_voltage_max_microvolt = &lt;4350000&gt;;</div><div class='del'>-		internal-resistance-micro-ohms = &lt;250000&gt;;</div><div class='add'>+		constant-charge-voltage-max-microvolt = &lt;4350000&gt;;</div><div class='add'>+		factory-internal-resistance-micro-ohms = &lt;250000&gt;;</div><div class='ctx'> 		ocv-capacity-celsius = &lt;20&gt;;</div><div class='ctx'> 		ocv-capacity-table-0 = &lt;4185000 100&gt;, &lt;4113000 95&gt;, &lt;4066000 90&gt;,</div><div class='ctx'> 			&lt;4022000 85&gt;, &lt;3983000 80&gt;, &lt;3949000 75&gt;,</div><div class='hunk'>@@ -84,6 +84,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pmic_fgu {</div><div class='add'>+	monitored-battery = &lt;&amp;bat&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makefile<br/>index 881fe1296c58..63908113ae36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/Makefile</a></div><div class='hunk'>@@ -1,2 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-dtb-$(CONFIG_ARCH_STM32) += stm32mp257f-ev1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_STM32) += \</div><div class='add'>+	stm32mp215f-dk.dtb \</div><div class='add'>+	stm32mp235f-dk.dtb \</div><div class='add'>+	stm32mp257f-dk.dtb \</div><div class='add'>+	stm32mp257f-ev1.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi<br/>new file mode 100644<br/>index 000000000000..bf888d60cd4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp211.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp211.dtsi</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a35";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm-pmu {</div><div class='add'>+		compatible = "arm,cortex-a35-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm_wdt: watchdog {</div><div class='add'>+		compatible = "arm,smc-wdt";</div><div class='add'>+		arm,smc-id = &lt;0xbc000000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ck_flexgen_08: clock-64000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;64000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ck_flexgen_51: clock-200000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		optee {</div><div class='add'>+			compatible = "linaro,optee-tz";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scmi: scmi {</div><div class='add'>+			compatible = "linaro,scmi-optee";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			linaro,optee-channel-id = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_reset: protocol@16 {</div><div class='add'>+				reg = &lt;0x16&gt;;</div><div class='add'>+				#reset-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x0 0x80000000&gt;;</div><div class='add'>+		dma-ranges = &lt;0x0 0x0 0x80000000 0x1 0x0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		rifsc: bus@42080000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0x42080000 0x0 0x1000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			dma-ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			usart2: serial@400e0000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x400e0000 0x0 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;ck_flexgen_08&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscfg: syscon@44230000 {</div><div class='add'>+			compatible = "st,stm32mp21-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0x44230000 0x0 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@4ac10000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x4ac10000 0x0 0x1000&gt;,</div><div class='add'>+			      &lt;0x4ac20000 0x0 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac40000 0x0 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac60000 0x0 0x20000&gt;;</div><div class='add'>+			      #interrupt-cells = &lt;3&gt;;</div><div class='add'>+			      interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp213.dtsi b/arch/arm64/boot/dts/st/stm32mp213.dtsi<br/>new file mode 100644<br/>index 000000000000..fdd2dc432edd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp213.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp213.dtsi</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include "stm32mp211.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp215.dtsi b/arch/arm64/boot/dts/st/stm32mp215.dtsi<br/>new file mode 100644<br/>index 000000000000..a7df77f928c5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp215.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp215.dtsi</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include "stm32mp213.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts<br/>new file mode 100644<br/>index 000000000000..7bdaeaa5ab0f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp215f-dk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp215f-dk.dts</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "stm32mp215.dtsi"</div><div class='add'>+#include "stm32mp21xf.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32MP215F-DK Discovery Board";</div><div class='add'>+	compatible = "st,stm32mp215f-dk", "st,stm32mp215";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;usart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		fw@80000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x4000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;arm_wdt {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp21xc.dtsi b/arch/arm64/boot/dts/st/stm32mp21xc.dtsi<br/>new file mode 100644<br/>index 000000000000..e33b00b424e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp21xc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp21xc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp21xf.dtsi b/arch/arm64/boot/dts/st/stm32mp21xf.dtsi<br/>new file mode 100644<br/>index 000000000000..e33b00b424e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp21xf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp21xf.dtsi</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi<br/>new file mode 100644<br/>index 000000000000..88e214d395ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp231.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp231.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1191 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include &lt;dt-bindings/clock/st,stm32mp25-rcc.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/regulator/st,stm32mp25-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/st,stm32mp25-rcc.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a35";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu0_pd&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm-pmu {</div><div class='add'>+		compatible = "arm,cortex-a35-pmu";</div><div class='add'>+		interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm_wdt: watchdog {</div><div class='add'>+		compatible = "arm,smc-wdt";</div><div class='add'>+		arm,smc-id = &lt;0xb200005a&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_dsi_txbyte: clock-0 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_rcbsec: clk-64000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;64000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		optee: optee {</div><div class='add'>+			compatible = "linaro,optee-tz";</div><div class='add'>+			method = "smc";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		scmi {</div><div class='add'>+			compatible = "linaro,scmi-optee";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			linaro,optee-channel-id = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			scmi_clk: protocol@14 {</div><div class='add'>+				reg = &lt;0x14&gt;;</div><div class='add'>+				#clock-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_reset: protocol@16 {</div><div class='add'>+				reg = &lt;0x16&gt;;</div><div class='add'>+				#reset-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			scmi_voltd: protocol@17 {</div><div class='add'>+				reg = &lt;0x17&gt;;</div><div class='add'>+</div><div class='add'>+				scmi_regu: regulators {</div><div class='add'>+					#address-cells = &lt;1&gt;;</div><div class='add'>+					#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+					scmi_vddio1: regulator@0 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_VDDIO1&gt;;</div><div class='add'>+						regulator-name = "vddio1";</div><div class='add'>+					};</div><div class='add'>+					scmi_vddio2: regulator@1 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_VDDIO2&gt;;</div><div class='add'>+						regulator-name = "vddio2";</div><div class='add'>+					};</div><div class='add'>+					scmi_vddio3: regulator@2 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_VDDIO3&gt;;</div><div class='add'>+						regulator-name = "vddio3";</div><div class='add'>+					};</div><div class='add'>+					scmi_vddio4: regulator@3 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_VDDIO4&gt;;</div><div class='add'>+						regulator-name = "vddio4";</div><div class='add'>+					};</div><div class='add'>+					scmi_vdd33ucpd: regulator@5 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_UCPD&gt;;</div><div class='add'>+						regulator-name = "vdd33ucpd";</div><div class='add'>+					};</div><div class='add'>+					scmi_vdda18adc: regulator@7 {</div><div class='add'>+						reg = &lt;VOLTD_SCMI_ADC&gt;;</div><div class='add'>+						regulator-name = "vdda18adc";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		compatible = "arm,psci-1.0";</div><div class='add'>+		method = "smc";</div><div class='add'>+</div><div class='add'>+		cpu0_pd: power-domain-cpu0 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster_pd: power-domain-cluster {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;ret_pd&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ret_pd: power-domain-retention {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+		always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@0 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		hpdma: dma-controller@40400000 {</div><div class='add'>+			compatible = "st,stm32mp25-dma3";</div><div class='add'>+			reg = &lt;0x40400000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_HPDMA1&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hpdma2: dma-controller@40410000 {</div><div class='add'>+			compatible = "st,stm32mp25-dma3";</div><div class='add'>+			reg = &lt;0x40410000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_HPDMA2&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hpdma3: dma-controller@40420000 {</div><div class='add'>+			compatible = "st,stm32mp25-dma3";</div><div class='add'>+			reg = &lt;0x40420000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_HPDMA3&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rifsc: bus@42080000 {</div><div class='add'>+			compatible = "st,stm32mp25-rifsc", "simple-bus";</div><div class='add'>+			reg = &lt;0x42080000 0x1000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			#access-controller-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			i2s2: audio-controller@400b0000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x400b0000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI2&gt;, &lt;&amp;rcc CK_KER_SPI2&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 51 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 52 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@400b0000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x400b0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI2&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 51 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 52 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s3: audio-controller@400c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x400c0000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI3&gt;, &lt;&amp;rcc CK_KER_SPI3&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 53 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 54 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi3: spi@400c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x400c0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI3&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 53 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 54 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spdifrx: audio-controller@400d0000 {</div><div class='add'>+				compatible = "st,stm32h7-spdifrx";</div><div class='add'>+				reg = &lt;0x400d0000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPDIFRX&gt;;</div><div class='add'>+				clock-names = "kclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 71 0x43 0x212&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 72 0x43 0x212&gt;;</div><div class='add'>+				dma-names = "rx", "rx-ctrl";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 30&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@400e0000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x400e0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_USART2&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 11 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 12 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 32&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart3: serial@400f0000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x400f0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_USART3&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 13 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 14 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 33&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@40100000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40100000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_UART4&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 15 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 16 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 34&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@40110000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40110000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_UART5&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 17 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 18 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 35&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@40120000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40120000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 27 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 28 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 41&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@40130000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40130000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C2&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 30 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 31 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 42&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@40180000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x40180000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C7&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C7_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 45 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 46 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 47&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart6: serial@40220000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40220000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_USART6&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 19 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 20 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 36&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s1: audio-controller@40230000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x40230000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI1&gt;, &lt;&amp;rcc CK_KER_SPI1&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 49 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 50 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@40230000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40230000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI1&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 49 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 50 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi4: spi@40240000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40240000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI4&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 55 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 56 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 25&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi5: spi@40280000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x40280000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI5&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 57 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 58 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 26&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai1: sai@40290000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x40290000 0x4&gt;, &lt;0x4029a3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x40290000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI1&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 49&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai1a: audio-controller@40290004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI1&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 73 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai1b: audio-controller@40290024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI1&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 74 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai2: sai@402a0000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x402a0000 0x4&gt;, &lt;0x402aa3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x402a0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI2&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI2_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 50&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai2a: audio-controller@402a0004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI2&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 75 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai2b: audio-controller@402a0024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI2&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 76 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai3: sai@402b0000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x402b0000 0x4&gt;, &lt;0x402ba3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x402b0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI3&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI3_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 51&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai3a: audio-controller@402b0004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI3&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 77 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai3b: audio-controller@502b0024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI3&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 78 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@40330000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40330000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_USART1&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 9 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 10 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 31&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai4: sai@40340000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x40340000 0x4&gt;, &lt;0x4034a3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x40340000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI4&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI4_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 52&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai4a: audio-controller@40340004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI4&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 79 0x63 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai4b: audio-controller@40340024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI4&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 80 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@40370000 {</div><div class='add'>+				compatible = "st,stm32h7-uart";</div><div class='add'>+				reg = &lt;0x40370000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_UART7&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 21 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 22 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 37&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rng: rng@42020000 {</div><div class='add'>+				compatible = "st,stm32mp25-rng";</div><div class='add'>+				reg = &lt;0x42020000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk_rcbsec&gt;, &lt;&amp;rcc CK_BUS_RNG&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;rcc RNG_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 92&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi8: spi@46020000 {</div><div class='add'>+				compatible = "st,stm32mp25-spi";</div><div class='add'>+				reg = &lt;0x46020000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPI8&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SPI8_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 171 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 172 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 29&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c8: i2c@46040000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2c";</div><div class='add'>+				reg = &lt;0x46040000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				interrupt-names = "event";</div><div class='add'>+				interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_I2C8&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc I2C8_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 168 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 169 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 48&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			csi: csi@48020000 {</div><div class='add'>+				compatible = "st,stm32mp25-csi";</div><div class='add'>+				reg = &lt;0x48020000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc CSI_R&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_CSI&gt;, &lt;&amp;rcc CK_KER_CSITXESC&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_KER_CSIPHY&gt;;</div><div class='add'>+				clock-names = "pclk", "txesc", "csi2phy";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 86&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcmipp: dcmipp@48030000 {</div><div class='add'>+				compatible = "st,stm32mp25-dcmipp";</div><div class='add'>+				reg = &lt;0x48030000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc DCMIPP_R&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_DCMIPP&gt;, &lt;&amp;rcc CK_KER_CSI&gt;;</div><div class='add'>+				clock-names = "kclk", "mclk";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 87&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sdmmc1: mmc@48220000 {</div><div class='add'>+				compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='add'>+				reg = &lt;0x48220000 0x400&gt;, &lt;0x44230400 0x8&gt;;</div><div class='add'>+				arm,primecell-periphid = &lt;0x00353180&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SDMMC1 &gt;;</div><div class='add'>+				clock-names = "apb_pclk";</div><div class='add'>+				resets = &lt;&amp;rcc SDMMC1_R&gt;;</div><div class='add'>+				cap-sd-highspeed;</div><div class='add'>+				cap-mmc-highspeed;</div><div class='add'>+				max-frequency = &lt;120000000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 76&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet1: ethernet@482c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";</div><div class='add'>+				reg = &lt;0x482c0000 0x4000&gt;;</div><div class='add'>+				reg-names = "stmmaceth";</div><div class='add'>+				interrupts-extended = &lt;&amp;intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "macirq";</div><div class='add'>+				clock-names = "stmmaceth",</div><div class='add'>+					      "mac-clk-tx",</div><div class='add'>+					      "mac-clk-rx",</div><div class='add'>+					      "ptp_ref",</div><div class='add'>+					      "ethstp",</div><div class='add'>+					      "eth-ck";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_ETH1_MAC&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_ETH1_TX&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_ETH1_RX&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_KER_ETH1PTP&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_ETH1_STP&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_KER_ETH1&gt;;</div><div class='add'>+				snps,axi-config = &lt;&amp;stmmac_axi_config_1&gt;;</div><div class='add'>+				snps,mixed-burst;</div><div class='add'>+				snps,mtl-rx-config = &lt;&amp;mtl_rx_setup_1&gt;;</div><div class='add'>+				snps,mtl-tx-config = &lt;&amp;mtl_tx_setup_1&gt;;</div><div class='add'>+				snps,pbl = &lt;2&gt;;</div><div class='add'>+				snps,tso;</div><div class='add'>+				st,syscon = &lt;&amp;syscfg 0x3000&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 60&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				mtl_rx_setup_1: rx-queues-config {</div><div class='add'>+					snps,rx-queues-to-use = &lt;2&gt;;</div><div class='add'>+					queue0 {};</div><div class='add'>+					queue1 {};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mtl_tx_setup_1: tx-queues-config {</div><div class='add'>+					snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+					queue0 {};</div><div class='add'>+					queue1 {};</div><div class='add'>+					queue2 {};</div><div class='add'>+					queue3 {};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				stmmac_axi_config_1: stmmac-axi-config {</div><div class='add'>+					snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+					snps,rd_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+					snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		bsec: efuse@44000000 {</div><div class='add'>+			compatible = "st,stm32mp25-bsec";</div><div class='add'>+			reg = &lt;0x44000000 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			part_number_otp@24 {</div><div class='add'>+				reg = &lt;0x24 0x4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			package_otp@1e8 {</div><div class='add'>+				reg = &lt;0x1e8 0x1&gt;;</div><div class='add'>+				bits = &lt;0 3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rcc: clock-controller@44200000 {</div><div class='add'>+			compatible = "st,stm32mp25-rcc";</div><div class='add'>+			reg = &lt;0x44200000 0x10000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_HSE&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_HSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_MSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_LSE&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_LSI&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_HSE_DIV2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_HS_MCU&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_LS_MCU&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_SDMMC&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_DDR&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_DISPLAY&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_HSL&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_NIC&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_VID&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_07&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_08&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_09&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_10&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_11&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_12&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_13&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_14&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_15&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_16&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_17&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_18&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_19&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_20&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_21&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_22&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_23&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_24&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_25&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_26&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_27&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_28&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_29&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_30&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_31&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_32&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_33&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_34&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_35&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_36&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_37&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_38&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_39&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_40&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_41&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_42&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_43&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_44&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_45&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_46&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_47&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_48&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_49&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_50&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_51&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_52&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_53&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_54&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_55&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_56&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_57&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_58&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_59&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_60&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_61&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_62&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_FLEXGEN_63&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB1&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB3&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APB4&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_ICN_APBDBG&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_TIMG1&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_TIMG2&gt;,</div><div class='add'>+				&lt;&amp;scmi_clk CK_SCMI_PLL3&gt;,</div><div class='add'>+				&lt;&amp;clk_dsi_txbyte&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 156&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		exti1: interrupt-controller@44220000 {</div><div class='add'>+			compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+			reg = &lt;0x44220000 0x400&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 0   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 1   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_40 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 10  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_70 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_80 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscfg: syscon@44230000 {</div><div class='add'>+			compatible = "st,stm32mp23-syscfg", "syscon";</div><div class='add'>+			reg = &lt;0x44230000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@44240000 {</div><div class='add'>+			compatible = "st,stm32mp257-pinctrl";</div><div class='add'>+			ranges = &lt;0 0x44240000 0xa0400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;exti1&gt;;</div><div class='add'>+			st,syscfg = &lt;&amp;exti1 0x60 0xff&gt;;</div><div class='add'>+			pins-are-numbered;</div><div class='add'>+</div><div class='add'>+			gpioa: gpio@44240000 {</div><div class='add'>+				reg = &lt;0x0 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOA&gt;;</div><div class='add'>+				st,bank-name = "GPIOA";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpiob: gpio@44250000 {</div><div class='add'>+				reg = &lt;0x10000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOB&gt;;</div><div class='add'>+				st,bank-name = "GPIOB";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioc: gpio@44260000 {</div><div class='add'>+				reg = &lt;0x20000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOC&gt;;</div><div class='add'>+				st,bank-name = "GPIOC";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpiod: gpio@44270000 {</div><div class='add'>+				reg = &lt;0x30000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOD&gt;;</div><div class='add'>+				st,bank-name = "GPIOD";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioe: gpio@44280000 {</div><div class='add'>+				reg = &lt;0x40000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOE&gt;;</div><div class='add'>+				st,bank-name = "GPIOE";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpiof: gpio@44290000 {</div><div class='add'>+				reg = &lt;0x50000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOF&gt;;</div><div class='add'>+				st,bank-name = "GPIOF";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpiog: gpio@442a0000 {</div><div class='add'>+				reg = &lt;0x60000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOG&gt;;</div><div class='add'>+				st,bank-name = "GPIOG";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioh: gpio@442b0000 {</div><div class='add'>+				reg = &lt;0x70000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOH&gt;;</div><div class='add'>+				st,bank-name = "GPIOH";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioi: gpio@442c0000 {</div><div class='add'>+				reg = &lt;0x80000 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOI&gt;;</div><div class='add'>+				st,bank-name = "GPIOI";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@46000000 {</div><div class='add'>+			compatible = "st,stm32mp25-rtc";</div><div class='add'>+			reg = &lt;0x46000000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_RTC&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CK_SCMI_RTCCK&gt;;</div><div class='add'>+			clock-names = "pclk", "rtc_ck";</div><div class='add'>+			interrupts-extended = &lt;&amp;exti2 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl_z: pinctrl@46200000 {</div><div class='add'>+			compatible = "st,stm32mp257-z-pinctrl";</div><div class='add'>+			ranges = &lt;0 0x46200000 0x400&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;exti1&gt;;</div><div class='add'>+			st,syscfg = &lt;&amp;exti1 0x60 0xff&gt;;</div><div class='add'>+			pins-are-numbered;</div><div class='add'>+</div><div class='add'>+			gpioz: gpio@46200000 {</div><div class='add'>+				reg = &lt;0 0x400&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_GPIOZ&gt;;</div><div class='add'>+				st,bank-name = "GPIOZ";</div><div class='add'>+				st,bank-ioport = &lt;11&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		exti2: interrupt-controller@46230000 {</div><div class='add'>+			compatible = "st,stm32mp1-exti", "syscon";</div><div class='add'>+			reg = &lt;0x46230000 0x400&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;intc GIC_SPI 17  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_0 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 18  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 19  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 20  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 21  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 22  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 23  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 24  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 25  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 26  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 27  IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_10 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 28  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 29  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 30  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 31  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 32  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 12  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 13  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_20 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 14  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 15  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_30 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_40 */</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 11  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 5   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 4   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 6   IRQ_TYPE_LEVEL_HIGH&gt;,	/* EXTI_50 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 7   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 2   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 3   IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,						/* EXTI_60 */</div><div class='add'>+				&lt;&amp;intc GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;0&gt;,</div><div class='add'>+				&lt;&amp;intc GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;;	/* EXTI_70 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@4ac10000 {</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='add'>+			reg = &lt;0x4ac10000 0x1000&gt;,</div><div class='add'>+			      &lt;0x4ac20000 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac40000 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac60000 0x20000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp233.dtsi b/arch/arm64/boot/dts/st/stm32mp233.dtsi<br/>new file mode 100644<br/>index 000000000000..78f4059fca5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp233.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp233.dtsi</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include "stm32mp231.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus {</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a35";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			power-domains = &lt;&amp;cpu1_pd&gt;;</div><div class='add'>+			power-domain-names = "psci";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	arm-pmu {</div><div class='add'>+		interrupts = &lt;GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-affinity = &lt;&amp;cpu0&gt;, &lt;&amp;cpu1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	psci {</div><div class='add'>+		cpu1_pd: power-domain-cpu1 {</div><div class='add'>+			#power-domain-cells = &lt;0&gt;;</div><div class='add'>+			power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='add'>+			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;optee {</div><div class='add'>+	interrupts = &lt;GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rifsc {</div><div class='add'>+	ethernet2: ethernet@482d0000 {</div><div class='add'>+		compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";</div><div class='add'>+		reg = &lt;0x482d0000 0x4000&gt;;</div><div class='add'>+		reg-names = "stmmaceth";</div><div class='add'>+		interrupts-extended = &lt;&amp;intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "macirq";</div><div class='add'>+		clock-names = "stmmaceth",</div><div class='add'>+			      "mac-clk-tx",</div><div class='add'>+			      "mac-clk-rx",</div><div class='add'>+			      "ptp_ref",</div><div class='add'>+			      "ethstp",</div><div class='add'>+			      "eth-ck";</div><div class='add'>+		clocks = &lt;&amp;rcc CK_ETH2_MAC&gt;,</div><div class='add'>+			 &lt;&amp;rcc CK_ETH2_TX&gt;,</div><div class='add'>+			 &lt;&amp;rcc CK_ETH2_RX&gt;,</div><div class='add'>+			 &lt;&amp;rcc CK_KER_ETH2PTP&gt;,</div><div class='add'>+			 &lt;&amp;rcc CK_ETH2_STP&gt;,</div><div class='add'>+			 &lt;&amp;rcc CK_KER_ETH2&gt;;</div><div class='add'>+		snps,axi-config = &lt;&amp;stmmac_axi_config_2&gt;;</div><div class='add'>+		snps,mixed-burst;</div><div class='add'>+		snps,mtl-rx-config = &lt;&amp;mtl_rx_setup_2&gt;;</div><div class='add'>+		snps,mtl-tx-config = &lt;&amp;mtl_tx_setup_2&gt;;</div><div class='add'>+		snps,pbl = &lt;2&gt;;</div><div class='add'>+		snps,tso;</div><div class='add'>+		st,syscon = &lt;&amp;syscfg 0x3400&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;rifsc 61&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		mtl_rx_setup_2: rx-queues-config {</div><div class='add'>+			snps,rx-queues-to-use = &lt;2&gt;;</div><div class='add'>+			queue0 {};</div><div class='add'>+			queue1 {};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mtl_tx_setup_2: tx-queues-config {</div><div class='add'>+			snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+			queue0 {};</div><div class='add'>+			queue1 {};</div><div class='add'>+			queue2 {};</div><div class='add'>+			queue3 {};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stmmac_axi_config_2: stmmac-axi-config {</div><div class='add'>+			snps,blen = &lt;0 0 0 0 16 8 4&gt;;</div><div class='add'>+			snps,rd_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+			snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp235.dtsi b/arch/arm64/boot/dts/st/stm32mp235.dtsi<br/>new file mode 100644<br/>index 000000000000..2719c088dd59<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp235.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp235.dtsi</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+#include "stm32mp233.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;rifsc {</div><div class='add'>+	vdec: vdec@480d0000 {</div><div class='add'>+		compatible = "st,stm32mp25-vdec";</div><div class='add'>+		reg = &lt;0x480d0000 0x3c8&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CK_BUS_VDEC&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;rifsc 89&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts<br/>new file mode 100644<br/>index 000000000000..c3e688068223<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp235f-dk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp235f-dk.dts</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "stm32mp235.dtsi"</div><div class='add'>+#include "stm32mp23xf.dtsi"</div><div class='add'>+#include "stm32mp25-pinctrl.dtsi"</div><div class='add'>+#include "stm32mp25xxak-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32MP235F-DK Discovery Board";</div><div class='add'>+	compatible = "st,stm32mp235f-dk", "st,stm32mp235";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet1;</div><div class='add'>+		serial0 = &amp;usart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-user-1 {</div><div class='add'>+			label = "User-1";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioc 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-user-2 {</div><div class='add'>+			label = "User-2";</div><div class='add'>+			linux,code = &lt;BTN_2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioc 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-blue {</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioh 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		fw@80000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x4000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;arm_wdt {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_rgmii_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;eth1_rgmii_sleep_pins_b&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	phy-handle = &lt;&amp;phy1_eth1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		phy1_eth1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			reset-gpios =  &lt;&amp;gpioa 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_regu {</div><div class='add'>+	scmi_vddio1: regulator@0 {</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+	scmi_vdd_sdcard: regulator@23 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC2_LDO7&gt;;</div><div class='add'>+		regulator-name = "vdd_sdcard";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_b4_sleep_pins_a&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpiod 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;scmi_vdd_sdcard&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;scmi_vddio1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart2 {</div><div class='add'>+	pinctrl-names = "default", "idle", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usart2_idle_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usart2_sleep_pins_a&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp23xc.dtsi b/arch/arm64/boot/dts/st/stm32mp23xc.dtsi<br/>new file mode 100644<br/>index 000000000000..e33b00b424e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp23xc.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp23xc.dtsi</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp23xf.dtsi b/arch/arm64/boot/dts/st/stm32mp23xf.dtsi<br/>new file mode 100644<br/>index 000000000000..e33b00b424e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp23xf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp23xf.dtsi</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi<br/>index 8fdd5f020425..e0d102eb6176 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi</a></div><div class='hunk'>@@ -6,6 +6,132 @@</div><div class='ctx'> #include &lt;dt-bindings/pinctrl/stm32-pinfunc.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl {</div><div class='add'>+	eth1_mdio_pins_a: eth1-mdio-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 0, AF10)&gt;; /* ETH_MDC */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 2, AF10)&gt;; /* ETH_MDIO */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_mdio_sleep_pins_a: eth1-mdio-sleep-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 0, ANALOG)&gt;, /* ETH_MDC */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 2, ANALOG)&gt;; /* ETH_MDIO */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rgmii_pins_a: eth1-rgmii-0 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 15, AF10)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, AF10)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 10, AF10)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 11, AF10)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 13, AF10)&gt;; /* ETH_RGMII_TX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 9, AF10)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 0, AF12)&gt;; /* ETH_RGMII_GTX_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 1, AF10)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, AF10)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 12, AF10)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, AF10)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 11, AF10)&gt;; /* ETH_RGMII_RX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins4 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 14, AF10)&gt;; /* ETH_RGMII_RX_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 15, ANALOG)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, ANALOG)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 10, ANALOG)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 11, ANALOG)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 13, ANALOG)&gt;, /* ETH_RGMII_TX_CTL */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 9, ANALOG)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 0, ANALOG)&gt;, /* ETH_RGMII_GTX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 1, ANALOG)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, ANALOG)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 12, ANALOG)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, ANALOG)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 11, ANALOG)&gt;, /* ETH_RGMII_RX_CTL */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 14, ANALOG)&gt;; /* ETH_RGMII_RX_CLK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rgmii_pins_b: eth1-rgmii-1 {</div><div class='add'>+		pins1 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 15, AF10)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, AF10)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 10, AF10)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 11, AF10)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 13, AF10)&gt;; /* ETH_RGMII_TX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins2 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('H', 9, AF10)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 0, AF12)&gt;, /* ETH_RGMII_GTX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 9, AF10)&gt;, /* ETH_MDC */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 10, AF10)&gt;; /* ETH_MDIO */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+		pins3 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('F', 1, AF10)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, AF10)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 12, AF10)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, AF10)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 11, AF10)&gt;; /* ETH_RGMII_RX_CTL */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+		pins4 {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 14, AF10)&gt;; /* ETH_RGMII_RX_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rgmii_sleep_pins_b: eth1-rgmii-sleep-1 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('A', 15, ANALOG)&gt;, /* ETH_RGMII_TXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 1, ANALOG)&gt;, /* ETH_RGMII_TXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 10, ANALOG)&gt;, /* ETH_RGMII_TXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 11, ANALOG)&gt;, /* ETH_RGMII_TXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 13, ANALOG)&gt;, /* ETH_RGMII_TX_CTL */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 9, ANALOG)&gt;, /* ETH_RGMII_CLK125 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 0, ANALOG)&gt;, /* ETH_RGMII_GTX_CLK */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 9, ANALOG)&gt;, /* ETH_MDC */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 10, ANALOG)&gt;, /* ETH_MDIO */</div><div class='add'>+				 &lt;STM32_PINMUX('F', 1, ANALOG)&gt;, /* ETH_RGMII_RXD0 */</div><div class='add'>+				 &lt;STM32_PINMUX('C', 2, ANALOG)&gt;, /* ETH_RGMII_RXD1 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 12, ANALOG)&gt;, /* ETH_RGMII_RXD2 */</div><div class='add'>+				 &lt;STM32_PINMUX('H', 13, ANALOG)&gt;, /* ETH_RGMII_RXD3 */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 11, ANALOG)&gt;, /* ETH_RGMII_RX_CTL */</div><div class='add'>+				 &lt;STM32_PINMUX('A', 14, AF10)&gt;; /* ETH_RGMII_RX_CLK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	eth2_rgmii_pins_a: eth2-rgmii-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('C', 7, AF10)&gt;, /* ETH_RGMII_TXD0 */</div><div class='hunk'>@@ -82,6 +208,124 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ospi_port1_clk_pins_a: ospi-port1-clk-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 0, AF10)&gt;; /* OSPI1_CLK */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi_port1_clk_sleep_pins_a: ospi-port1-clk-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 0, ANALOG)&gt;; /* OSPI1_CLK */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi_port1_cs0_pins_a: ospi-port1-cs0-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 3, AF10)&gt;; /* OSPI_NCS0 */</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi_port1_cs0_sleep_pins_a: ospi-port1-cs0-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 3, ANALOG)&gt;; /* OSPI_NCS0 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi_port1_io03_pins_a: ospi-port1-io03-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 4, AF10)&gt;, /* OSPI_IO0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 5, AF10)&gt;, /* OSPI_IO1 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 6, AF10)&gt;, /* OSPI_IO2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 7, AF10)&gt;; /* OSPI_IO3 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi_port1_io03_sleep_pins_a: ospi-port1-io03-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('D', 4, ANALOG)&gt;, /* OSPI_IO0 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 5, ANALOG)&gt;, /* OSPI_IO1 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 6, ANALOG)&gt;, /* OSPI_IO2 */</div><div class='add'>+				 &lt;STM32_PINMUX('D', 7, ANALOG)&gt;; /* OSPI_IO3 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_pins_a: pcie-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 0, AF4)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_init_pins_a: pcie-init-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 0, GPIO)&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie_sleep_pins_a: pcie-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 0, ANALOG)&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm3_pins_a: pwm3-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 15, AF7)&gt;; /* TIM3_CH2 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm3_sleep_pins_a: pwm3-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 15, ANALOG)&gt;; /* TIM3_CH2 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm8_pins_a: pwm8-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 5, AF8)&gt;, /* TIM8_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('J', 4, AF8)&gt;; /* TIM8_CH4 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm8_sleep_pins_a: pwm8-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('J', 5, ANALOG)&gt;, /* TIM8_CH1 */</div><div class='add'>+				 &lt;STM32_PINMUX('J', 4, ANALOG)&gt;; /* TIM8_CH4 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm12_pins_a: pwm12-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 11, AF9)&gt;; /* TIM12_CH2 */</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-push-pull;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm12_sleep_pins_a: pwm12-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 11, ANALOG)&gt;; /* TIM12_CH2 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('E', 4, AF10)&gt;, /* SDMMC1_D0 */</div><div class='hunk'>@@ -158,6 +402,20 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	tim10_counter_pins_a: tim10-counter-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 9, AF9)&gt;; /* TIM10_CH1 */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tim10_counter_sleep_pins_a: tim10-counter-sleep-0 {</div><div class='add'>+		pins {</div><div class='add'>+			pinmux = &lt;STM32_PINMUX('B', 9, ANALOG)&gt;; /* TIM10_CH1 */</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	usart2_pins_a: usart2-0 {</div><div class='ctx'> 		pins1 {</div><div class='ctx'> 			pinmux = &lt;STM32_PINMUX('A', 4, AF6)&gt;; /* USART2_TX */</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi<br/>index 1167cf63d7e8..a8e6e0f77b83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/st,stm32mp25-rcc.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/regulator/st,stm32mp25-regulator.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -51,6 +52,12 @@</div><div class='ctx'> 			compatible = "fixed-clock";</div><div class='ctx'> 			clock-frequency = &lt;64000000&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		clk_flexgen_27_fixed: clk-54000000 {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;54000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	firmware {</div><div class='hunk'>@@ -114,14 +121,22 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	intc: interrupt-controller@4ac00000 {</div><div class='del'>-		compatible = "arm,cortex-a7-gic";</div><div class='add'>+		compatible = "arm,gic-400";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x4ac10000 0x0 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac20000 0x0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac40000 0x0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac60000 0x0 0x2000&gt;;</div><div class='add'>+		      &lt;0x0 0x4ac20000 0x0 0x20000&gt;,</div><div class='add'>+		      &lt;0x0 0x4ac40000 0x0 0x20000&gt;,</div><div class='add'>+		      &lt;0x0 0x4ac60000 0x0 0x20000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		v2m0: v2m@48090000 {</div><div class='add'>+			compatible = "arm,gic-v2m-frame";</div><div class='add'>+			reg = &lt;0x0 0x48090000 0x0 0x1000&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='hunk'>@@ -150,7 +165,7 @@</div><div class='ctx'> 			     &lt;GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;,</div><div class='ctx'> 			     &lt;GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='del'>-		always-on;</div><div class='add'>+		arm,no-tick-in-suspend;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc@0 {</div><div class='hunk'>@@ -229,6 +244,60 @@</div><div class='ctx'> 			#dma-cells = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ommanager: ommanager@40500000 {</div><div class='add'>+			compatible = "st,stm32mp25-omm";</div><div class='add'>+			reg = &lt;0x40500000 0x400&gt;, &lt;0x60000000 0x10000000&gt;;</div><div class='add'>+			reg-names = "regs", "memory_map";</div><div class='add'>+			ranges = &lt;0 0 0x40430000 0x400&gt;,</div><div class='add'>+				 &lt;1 0 0x40440000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc CK_BUS_OSPIIOM&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CK_SCMI_OSPI1&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CK_SCMI_OSPI2&gt;;</div><div class='add'>+			clock-names = "omm", "ospi1", "ospi2";</div><div class='add'>+			resets = &lt;&amp;rcc OSPIIOM_R&gt;,</div><div class='add'>+				 &lt;&amp;scmi_reset RST_SCMI_OSPI1&gt;,</div><div class='add'>+				 &lt;&amp;scmi_reset RST_SCMI_OSPI2&gt;;</div><div class='add'>+			reset-names = "omm", "ospi1", "ospi2";</div><div class='add'>+			access-controllers = &lt;&amp;rifsc 111&gt;;</div><div class='add'>+			power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			st,syscfg-amcr = &lt;&amp;syscfg 0x2c00 0x7&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			ospi1: spi@0 {</div><div class='add'>+				compatible = "st,stm32mp25-ospi";</div><div class='add'>+				reg = &lt;0 0 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 2 0x62 0x3121&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 2 0x42 0x3112&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_OSPI1&gt;;</div><div class='add'>+				resets = &lt;&amp;scmi_reset RST_SCMI_OSPI1&gt;,</div><div class='add'>+					 &lt;&amp;scmi_reset RST_SCMI_OSPI1DLL&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 74&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				st,syscfg-dlyb = &lt;&amp;syscfg 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ospi2: spi@1 {</div><div class='add'>+				compatible = "st,stm32mp25-ospi";</div><div class='add'>+				reg = &lt;1 0 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 3 0x62 0x3121&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 3 0x42 0x3112&gt;;</div><div class='add'>+				dma-names = "tx", "rx";</div><div class='add'>+				clocks = &lt;&amp;scmi_clk CK_SCMI_OSPI2&gt;;</div><div class='add'>+				resets = &lt;&amp;scmi_reset RST_SCMI_OSPI2&gt;,</div><div class='add'>+					 &lt;&amp;scmi_reset RST_SCMI_OSPI2DLL&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 75&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				st,syscfg-dlyb = &lt;&amp;syscfg 0x1400&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rifsc: bus@42080000 {</div><div class='ctx'> 			compatible = "st,stm32mp25-rifsc", "simple-bus";</div><div class='ctx'> 			reg = &lt;0x42080000 0x1000&gt;;</div><div class='hunk'>@@ -237,6 +306,360 @@</div><div class='ctx'> 			#access-controller-cells = &lt;1&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			timers2: timer@40000000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM2&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 1&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@1 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers3: timer@40010000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40010000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM3&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 2&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@2 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers4: timer@40020000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40020000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM4&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 3&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@3 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers5: timer@40030000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40030000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM5&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 4&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@4 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers6: timer@40040000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40040000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM6&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 5&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@5 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;5&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers7: timer@40050000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40050000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM7&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 6&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@6 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;6&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers12: timer@40060000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40060000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM12&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 10&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@11 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;11&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers13: timer@40070000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40070000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM13&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 11&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@12 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers14: timer@40080000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40080000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM14&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 12&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@13 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;13&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer1: timer@40090000 {</div><div class='add'>+				compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x40090000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti1 47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LPTIM1&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 17&gt;;</div><div class='add'>+				power-domains = &lt;&amp;RET_PD&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@0 {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer2: timer@400a0000 {</div><div class='add'>+				compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x400a0000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti1 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LPTIM2&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 18&gt;;</div><div class='add'>+				power-domains = &lt;&amp;RET_PD&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@1 {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s2: audio-controller@400b0000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x400b0000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI2&gt;, &lt;&amp;rcc CK_KER_SPI2&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 51 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 52 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 23&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi2: spi@400b0000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -245,10 +668,28 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI2&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 51 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 52 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 23&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			i2s3: audio-controller@400c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x400c0000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI3&gt;, &lt;&amp;rcc CK_KER_SPI3&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 53 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 54 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi3: spi@400c0000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -257,15 +698,35 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI3&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI3_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 53 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 54 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 24&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			spdifrx: audio-controller@400d0000 {</div><div class='add'>+				compatible = "st,stm32h7-spdifrx";</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x400d0000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_SPDIFRX&gt;;</div><div class='add'>+				clock-names = "kclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 71 0x43 0x212&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 72 0x43 0x212&gt;;</div><div class='add'>+				dma-names = "rx", "rx-ctrl";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 30&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			usart2: serial@400e0000 {</div><div class='ctx'> 				compatible = "st,stm32h7-uart";</div><div class='ctx'> 				reg = &lt;0x400e0000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_USART2&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 11 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 12 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 32&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -275,6 +736,9 @@</div><div class='ctx'> 				reg = &lt;0x400f0000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_USART3&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 13 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 14 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 33&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -284,6 +748,9 @@</div><div class='ctx'> 				reg = &lt;0x40100000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_UART4&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 15 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 16 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 34&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -293,6 +760,9 @@</div><div class='ctx'> 				reg = &lt;0x40110000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_UART5&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 17 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 18 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 35&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -306,6 +776,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C1_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 27 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 28 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 41&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -319,6 +792,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C2_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 30 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 31 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 42&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -332,6 +808,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C3_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 33 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 34 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 43&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -345,6 +824,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C4_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 36 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 37 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 44&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -358,6 +840,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C5_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 39 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 40 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 45&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -371,6 +856,9 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C6_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 42 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 43 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 46&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -384,19 +872,170 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C7_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 45 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 46 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 47&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			timers10: timer@401c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x401c0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM10&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 8&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@9 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;9&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers11: timer@401d0000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x401d0000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM11&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 9&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@10 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;10&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers1: timer@40200000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40200000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM1&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 0&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@0 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers8: timer@40210000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40210000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM8&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 7&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@7 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;7&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			usart6: serial@40220000 {</div><div class='ctx'> 				compatible = "st,stm32h7-uart";</div><div class='ctx'> 				reg = &lt;0x40220000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_USART6&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 19 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 20 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 36&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			i2s1: audio-controller@40230000 {</div><div class='add'>+				compatible = "st,stm32mp25-i2s";</div><div class='add'>+				reg = &lt;0x40230000 0x400&gt;;</div><div class='add'>+				#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SPI1&gt;, &lt;&amp;rcc CK_KER_SPI1&gt;;</div><div class='add'>+				clock-names = "pclk", "i2sclk";</div><div class='add'>+				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 49 0x43 0x12&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 50 0x43 0x21&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 22&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi1: spi@40230000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -405,6 +1044,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI1&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI1_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 49 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 50 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 22&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -417,10 +1059,106 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI4&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI4_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 55 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 56 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 25&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			timers15: timer@40250000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40250000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM15&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 13&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@14 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;14&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers16: timer@40260000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40260000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM16&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 14&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@15 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;15&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timers17: timer@40270000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40270000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "global";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM17&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 15&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@16 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;16&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi5: spi@40280000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -429,28 +1167,207 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI5&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI5_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 57 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 58 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 26&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			sai1: sai@40290000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x40290000 0x4&gt;, &lt;0x4029a3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x40290000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI1&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI1_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 49&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai1a: audio-controller@40290004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI1&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 73 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai1b: audio-controller@40290024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI1&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 74 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai2: sai@402a0000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x402a0000 0x4&gt;, &lt;0x402aa3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x402a0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI2&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI2_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 50&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai2a: audio-controller@402a0004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI2&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 75 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai2b: audio-controller@402a0024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI2&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 76 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sai3: sai@402b0000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x402b0000 0x4&gt;, &lt;0x402ba3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x402b0000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI3&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI3_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 51&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai3a: audio-controller@402b0004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI3&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 77 0x43 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai3b: audio-controller@502b0024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI3&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 78 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart9: serial@402c0000 {</div><div class='ctx'> 				compatible = "st,stm32h7-uart";</div><div class='ctx'> 				reg = &lt;0x402c0000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_UART9&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 25 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 26 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 39&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			timers20: timer@40320000 {</div><div class='add'>+				compatible = "st,stm32mp25-timers";</div><div class='add'>+				reg = &lt;0x40320000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "brk", "up", "trg-com", "cc";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_TIM20&gt;;</div><div class='add'>+				clock-names = "int";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 16&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-timer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer@19 {</div><div class='add'>+					compatible = "st,stm32mp25-timer-trigger";</div><div class='add'>+					reg = &lt;19&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			usart1: serial@40330000 {</div><div class='ctx'> 				compatible = "st,stm32h7-uart";</div><div class='ctx'> 				reg = &lt;0x40330000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_USART1&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 9 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 10 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 31&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			sai4: sai@40340000 {</div><div class='add'>+				compatible = "st,stm32mp25-sai";</div><div class='add'>+				reg = &lt;0x40340000 0x4&gt;, &lt;0x4034a3f0 0x10&gt;;</div><div class='add'>+				ranges = &lt;0 0x40340000 0x400&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_SAI4&gt;;</div><div class='add'>+				clock-names = "pclk";</div><div class='add'>+				interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc SAI4_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 52&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				sai4a: audio-controller@40340004 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-a";</div><div class='add'>+					reg = &lt;0x4 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI4&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 79 0x63 0x21&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				sai4b: audio-controller@40340024 {</div><div class='add'>+					compatible = "st,stm32-sai-sub-b";</div><div class='add'>+					reg = &lt;0x24 0x20&gt;;</div><div class='add'>+					#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;rcc CK_KER_SAI4&gt;;</div><div class='add'>+					clock-names = "sai_ck";</div><div class='add'>+					dmas = &lt;&amp;hpdma 80 0x43 0x12&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi6: spi@40350000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -459,6 +1376,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI6&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI6_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 59 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 60 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 27&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -471,6 +1391,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI7&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI7_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 61 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 62 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 28&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -480,6 +1403,9 @@</div><div class='ctx'> 				reg = &lt;0x40370000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_UART7&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 21 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 22 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 37&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -489,10 +1415,23 @@</div><div class='ctx'> 				reg = &lt;0x40380000 0x400&gt;;</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_UART8&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 23 0x20 0x10012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 24 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 38&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			rng: rng@42020000 {</div><div class='add'>+				compatible = "st,stm32mp25-rng";</div><div class='add'>+				reg = &lt;0x42020000 0x400&gt;;</div><div class='add'>+				clocks = &lt;&amp;clk_rcbsec&gt;, &lt;&amp;rcc CK_BUS_RNG&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;rcc RNG_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 92&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			spi8: spi@46020000 {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -501,6 +1440,9 @@</div><div class='ctx'> 				interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;rcc CK_KER_SPI8&gt;;</div><div class='ctx'> 				resets = &lt;&amp;rcc SPI8_R&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 171 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 172 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 29&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -514,10 +1456,168 @@</div><div class='ctx'> 				resets = &lt;&amp;rcc I2C8_R&gt;;</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='add'>+				dmas = &lt;&amp;hpdma 168 0x20 0x3012&gt;,</div><div class='add'>+				       &lt;&amp;hpdma 169 0x20 0x3021&gt;;</div><div class='add'>+				dma-names = "rx", "tx";</div><div class='ctx'> 				access-controllers = &lt;&amp;rifsc 48&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='add'>+			lptimer3: timer@46050000 {</div><div class='add'>+				compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x46050000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti2 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LPTIM3&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 19&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer4: timer@46060000 {</div><div class='add'>+				compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x46060000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti2 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LPTIM4&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 20&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@3 {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lptimer5: timer@46070000 {</div><div class='add'>+				compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer";</div><div class='add'>+				reg = &lt;0x46070000 0x400&gt;;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti2 31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LPTIM5&gt;;</div><div class='add'>+				clock-names = "mux";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 21&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				counter {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pwm {</div><div class='add'>+					compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp";</div><div class='add'>+					#pwm-cells = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				timer {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer";</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@4 {</div><div class='add'>+					compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger";</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ltdc: display-controller@48010000 {</div><div class='add'>+				compatible = "st,stm32mp251-ltdc";</div><div class='add'>+				reg = &lt;0x48010000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					&lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_LTDC&gt;, &lt;&amp;rcc CK_BUS_LTDC&gt;;</div><div class='add'>+				clock-names = "lcd", "bus";</div><div class='add'>+				resets = &lt;&amp;rcc LTDC_R&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 80&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			csi: csi@48020000 {</div><div class='add'>+				compatible = "st,stm32mp25-csi";</div><div class='add'>+				reg = &lt;0x48020000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc CSI_R&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_KER_CSI&gt;, &lt;&amp;rcc CK_KER_CSITXESC&gt;,</div><div class='add'>+					 &lt;&amp;rcc CK_KER_CSIPHY&gt;;</div><div class='add'>+				clock-names = "pclk", "txesc", "csi2phy";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 86&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcmipp: dcmipp@48030000 {</div><div class='add'>+				compatible = "st,stm32mp25-dcmipp";</div><div class='add'>+				reg = &lt;0x48030000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc DCMIPP_R&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_DCMIPP&gt;, &lt;&amp;rcc CK_KER_CSI&gt;;</div><div class='add'>+				clock-names = "kclk", "mclk";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 87&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			combophy: phy@480c0000 {</div><div class='add'>+				compatible = "st,stm32mp25-combophy";</div><div class='add'>+				reg = &lt;0x480c0000 0x1000&gt;;</div><div class='add'>+				#phy-cells = &lt;1&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_USB3PCIEPHY&gt;, &lt;&amp;rcc CK_KER_USB3PCIEPHY&gt;;</div><div class='add'>+				clock-names = "apb", "ker";</div><div class='add'>+				resets = &lt;&amp;rcc USB3PCIEPHY_R&gt;;</div><div class='add'>+				reset-names = "phy";</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 67&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				wakeup-source;</div><div class='add'>+				interrupts-extended = &lt;&amp;exti1 45 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			sdmmc1: mmc@48220000 {</div><div class='ctx'> 				compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";</div><div class='ctx'> 				arm,primecell-periphid = &lt;0x00353180&gt;;</div><div class='hunk'>@@ -581,6 +1681,56 @@</div><div class='ctx'> 					snps,wr_osr_lmt = &lt;0x7&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			pcie_ep: pcie-ep@48400000 {</div><div class='add'>+				compatible = "st,stm32mp25-pcie-ep";</div><div class='add'>+				reg = &lt;0x48400000 0x100000&gt;,</div><div class='add'>+				      &lt;0x48500000 0x100000&gt;,</div><div class='add'>+				      &lt;0x48700000 0x80000&gt;,</div><div class='add'>+				      &lt;0x10000000 0x10000000&gt;;</div><div class='add'>+				reg-names = "dbi", "dbi2", "atu", "addr_space";</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_PCIE&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc PCIE_R&gt;;</div><div class='add'>+				phys = &lt;&amp;combophy PHY_TYPE_PCIE&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 68&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pcie_rc: pcie@48400000 {</div><div class='add'>+				compatible = "st,stm32mp25-pcie-rc";</div><div class='add'>+				device_type = "pci";</div><div class='add'>+				reg = &lt;0x48400000 0x400000&gt;,</div><div class='add'>+				      &lt;0x10000000 0x10000&gt;;</div><div class='add'>+				reg-names = "dbi", "config";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+				interrupt-map = &lt;0 0 0 1 &amp;intc 0 0 GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						&lt;0 0 0 2 &amp;intc 0 0 GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						&lt;0 0 0 3 &amp;intc 0 0 GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+						&lt;0 0 0 4 &amp;intc 0 0 GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				ranges = &lt;0x01000000 0x0 0x00000000 0x10010000 0x0 0x10000&gt;,</div><div class='add'>+					 &lt;0x02000000 0x0 0x10020000 0x10020000 0x0 0x7fe0000&gt;,</div><div class='add'>+					 &lt;0x42000000 0x0 0x18000000 0x18000000 0x0 0x8000000&gt;;</div><div class='add'>+				dma-ranges = &lt;0x42000000 0x0 0x80000000 0x80000000 0x0 0x80000000&gt;;</div><div class='add'>+				clocks = &lt;&amp;rcc CK_BUS_PCIE&gt;;</div><div class='add'>+				resets = &lt;&amp;rcc PCIE_R&gt;;</div><div class='add'>+				msi-parent = &lt;&amp;v2m0&gt;;</div><div class='add'>+				access-controllers = &lt;&amp;rifsc 68&gt;;</div><div class='add'>+				power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+</div><div class='add'>+				pcie@0,0 {</div><div class='add'>+					device_type = "pci";</div><div class='add'>+					reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+					phys = &lt;&amp;combophy PHY_TYPE_PCIE&gt;;</div><div class='add'>+					#address-cells = &lt;3&gt;;</div><div class='add'>+					#size-cells = &lt;2&gt;;</div><div class='add'>+					ranges;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		bsec: efuse@44000000 {</div><div class='hunk'>@@ -599,6 +1749,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		hdp: pinctrl@44090000 {</div><div class='add'>+			compatible = "st,stm32mp251-hdp";</div><div class='add'>+			reg = &lt;0x44090000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;rcc CK_BUS_HDP&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rcc: clock-controller@44200000 {</div><div class='ctx'> 			compatible = "st,stm32mp25-rcc";</div><div class='ctx'> 			reg = &lt;0x44200000 0x10000&gt;;</div><div class='hunk'>@@ -783,6 +1940,7 @@</div><div class='ctx'> 		syscfg: syscon@44230000 {</div><div class='ctx'> 			compatible = "st,stm32mp25-syscfg", "syscon";</div><div class='ctx'> 			reg = &lt;0x44230000 0x10000&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pinctrl: pinctrl@44240000 {</div><div class='hunk'>@@ -916,6 +2074,16 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rtc: rtc@46000000 {</div><div class='add'>+			compatible = "st,stm32mp25-rtc";</div><div class='add'>+			reg = &lt;0x46000000 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;scmi_clk CK_SCMI_RTC&gt;,</div><div class='add'>+				 &lt;&amp;scmi_clk CK_SCMI_RTCCK&gt;;</div><div class='add'>+			clock-names = "pclk", "rtc_ck";</div><div class='add'>+			interrupts-extended = &lt;&amp;exti2 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_z: pinctrl@46200000 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -936,7 +2104,6 @@</div><div class='ctx'> 				st,bank-ioport = &lt;11&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='del'>-</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		exti2: interrupt-controller@46230000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi<br/>index f689b47c5010..7a598f53a2a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp255.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp255.dtsi</a></div><div class='hunk'>@@ -5,7 +5,25 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "stm32mp253.dtsi"</div><div class='ctx'> </div><div class='add'>+&amp;ltdc {</div><div class='add'>+	compatible = "st,stm32mp255-ltdc";</div><div class='add'>+	clocks = &lt;&amp;clk_flexgen_27_fixed&gt;, &lt;&amp;rcc CK_BUS_LTDC&gt;, &lt;&amp;syscfg&gt;, &lt;&amp;lvds&gt;;</div><div class='add'>+	clock-names = "lcd", "bus", "ref", "lvds";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rifsc {</div><div class='add'>+	lvds: lvds@48060000 {</div><div class='add'>+		compatible = "st,stm32mp255-lvds", "st,stm32mp25-lvds";</div><div class='add'>+		reg = &lt;0x48060000 0x2000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;rcc CK_BUS_LVDS&gt;, &lt;&amp;rcc CK_KER_LVDSPHY&gt;;</div><div class='add'>+		clock-names = "pclk", "ref";</div><div class='add'>+		resets = &lt;&amp;rcc LVDS_R&gt;;</div><div class='add'>+		access-controllers = &lt;&amp;rifsc 84&gt;;</div><div class='add'>+		power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdec: vdec@480d0000 {</div><div class='ctx'> 		compatible = "st,stm32mp25-vdec";</div><div class='ctx'> 		reg = &lt;0x480d0000 0x3c8&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts<br/>new file mode 100644<br/>index 000000000000..e718d888ce21<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp257f-dk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp257f-dk.dts</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) STMicroelectronics 2025 - All Rights Reserved</div><div class='add'>+ * Author: Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt; for STMicroelectronics.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "stm32mp257.dtsi"</div><div class='add'>+#include "stm32mp25xf.dtsi"</div><div class='add'>+#include "stm32mp25-pinctrl.dtsi"</div><div class='add'>+#include "stm32mp25xxak-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "STMicroelectronics STM32MP257F-DK Discovery Board";</div><div class='add'>+	compatible = "st,stm32mp257f-dk", "st,stm32mp257";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;ethernet1;</div><div class='add'>+		serial0 = &amp;usart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-user-1 {</div><div class='add'>+			label = "User-1";</div><div class='add'>+			linux,code = &lt;BTN_1&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioc 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-user-2 {</div><div class='add'>+			label = "User-2";</div><div class='add'>+			linux,code = &lt;BTN_2&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioc 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-blue {</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpioh 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x1 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		fw@80000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x0 0x80000000 0x0 0x4000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;arm_wdt {</div><div class='add'>+	timeout-sec = &lt;32&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_rgmii_pins_b&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;eth1_rgmii_sleep_pins_b&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	phy-handle = &lt;&amp;phy1_eth1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		phy1_eth1: ethernet-phy@1 {</div><div class='add'>+			compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			reset-gpios =  &lt;&amp;gpioa 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;scmi_regu {</div><div class='add'>+	scmi_vddio1: regulator@0 {</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+	};</div><div class='add'>+	scmi_vdd_sdcard: regulator@23 {</div><div class='add'>+		reg = &lt;VOLTD_SCMI_STPMIC2_LDO7&gt;;</div><div class='add'>+		regulator-name = "vdd_sdcard";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdmmc1 {</div><div class='add'>+	pinctrl-names = "default", "opendrain", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdmmc1_b4_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;sdmmc1_b4_od_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;sdmmc1_b4_sleep_pins_a&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpiod 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	st,neg-edge;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	vmmc-supply = &lt;&amp;scmi_vdd_sdcard&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;scmi_vddio1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usart2 {</div><div class='add'>+	pinctrl-names = "default", "idle", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;usart2_idle_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;usart2_sleep_pins_a&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts<br/>index 214191a8322b..6e165073f732 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/st/stm32mp257f-ev1.dts</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		ethernet0 = &amp;ethernet2;</div><div class='add'>+		ethernet1 = &amp;ethernet1;</div><div class='ctx'> 		serial0 = &amp;usart2;</div><div class='ctx'> 		serial1 = &amp;usart6;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -27,11 +28,85 @@</div><div class='ctx'> 		stdout-path = "serial0:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	clocks {</div><div class='add'>+		clk_ext_camera: clk-ext-camera {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pad_clk: pad-clk {</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	imx335_2v9: regulator-2v9 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "imx335-avdd";</div><div class='add'>+		regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	imx335_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "imx335-ovdd";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	imx335_1v2: regulator-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "imx335-dvdd";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x80000000 0x1 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	panel_lvds: display {</div><div class='add'>+		compatible = "edt,etml0700z9ndha", "panel-lvds";</div><div class='add'>+		enable-gpios = &lt;&amp;gpiog 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		backlight = &lt;&amp;panel_lvds_backlight&gt;;</div><div class='add'>+		power-supply = &lt;&amp;scmi_v3v3&gt;;</div><div class='add'>+		width-mm = &lt;156&gt;;</div><div class='add'>+		height-mm = &lt;92&gt;;</div><div class='add'>+		data-mapping = "vesa-24";</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		panel-timing {</div><div class='add'>+			clock-frequency = &lt;54000000&gt;;</div><div class='add'>+			hactive = &lt;1024&gt;;</div><div class='add'>+			vactive = &lt;600&gt;;</div><div class='add'>+			hfront-porch = &lt;150&gt;;</div><div class='add'>+			hback-porch = &lt;150&gt;;</div><div class='add'>+			hsync-len = &lt;21&gt;;</div><div class='add'>+			vfront-porch = &lt;24&gt;;</div><div class='add'>+			vback-porch = &lt;24&gt;;</div><div class='add'>+			vsync-len = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			lvds_panel_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds_out0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	panel_lvds_backlight: backlight {</div><div class='add'>+		compatible = "gpio-backlight";</div><div class='add'>+		gpios = &lt;&amp;gpioi 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		default-on;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -42,6 +117,11 @@</div><div class='ctx'> 			reg = &lt;0x0 0x80000000 0x0 0x4000000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mm_ospi1: mm-ospi@60000000 {</div><div class='add'>+			reg = &lt;0x0 0x60000000 0x0 0x10000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +130,69 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;combophy {</div><div class='add'>+	clocks = &lt;&amp;rcc CK_BUS_USB3PCIEPHY&gt;, &lt;&amp;rcc CK_KER_USB3PCIEPHY&gt;, &lt;&amp;pad_clk&gt;;</div><div class='add'>+	clock-names = "apb", "ker", "pad";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi {</div><div class='add'>+	vdd-supply = &lt;&amp;scmi_vddcore&gt;;</div><div class='add'>+	vdda18-supply = &lt;&amp;scmi_v1v8&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			csi_sink: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;imx335_ep&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			csi_source: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dcmipp_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dcmipp {</div><div class='add'>+	status = "okay";</div><div class='add'>+	port {</div><div class='add'>+		dcmipp_0: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;csi_source&gt;;</div><div class='add'>+			bus-type = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;eth1_rgmii_pins_a &amp;eth1_mdio_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;eth1_rgmii_sleep_pins_a &amp;eth1_mdio_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	phy-handle = &lt;&amp;phy1_eth1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	st,ext-phyclk;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		phy1_eth1: ethernet-phy@4 {</div><div class='add'>+			compatible = "ethernet-phy-id001c.c916";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			reset-gpios =  &lt;&amp;gpioj 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;80000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ethernet2 {</div><div class='ctx'> 	pinctrl-names = "default", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;eth2_rgmii_pins_a&gt;;</div><div class='hunk'>@@ -68,7 +211,7 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			reset-assert-us = &lt;10000&gt;;</div><div class='ctx'> 			reset-deassert-us = &lt;300&gt;;</div><div class='del'>-			reset-gpios =  &lt;&amp;gpiog 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpiog 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -81,6 +224,34 @@</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;13&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+</div><div class='add'>+	imx335: camera@1a {</div><div class='add'>+		compatible = "sony,imx335";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_ext_camera&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;imx335_2v9&gt;;</div><div class='add'>+		ovdd-supply = &lt;&amp;imx335_1v8&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;imx335_1v2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			imx335_ep: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi_sink&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+				link-frequencies = /bits/ 64 &lt;594000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ili2511: ili2511@41 {</div><div class='add'>+		compatible = "ilitek,ili251x";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpioi&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpiog 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c8 {</div><div class='hunk'>@@ -93,6 +264,97 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ommanager {</div><div class='add'>+	memory-region = &lt;&amp;mm_ospi1&gt;;</div><div class='add'>+	pinctrl-0 = &lt;&amp;ospi_port1_clk_pins_a</div><div class='add'>+		     &amp;ospi_port1_io03_pins_a</div><div class='add'>+		     &amp;ospi_port1_cs0_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;ospi_port1_clk_sleep_pins_a</div><div class='add'>+		     &amp;ospi_port1_io03_sleep_pins_a</div><div class='add'>+		     &amp;ospi_port1_cs0_sleep_pins_a&gt;;</div><div class='add'>+	pinctrl-names = "default", "sleep";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	spi@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		memory-region = &lt;&amp;mm_ospi1&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		flash0: flash@0 {</div><div class='add'>+			compatible = "jedec,spi-nor";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+			spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+			spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* use LPTIMER with tick broadcast for suspend mode */</div><div class='add'>+&amp;lptimer3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	timer {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ltdc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	port {</div><div class='add'>+		ltdc_ep0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;lvds_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lvds {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			lvds_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;ltdc_ep0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			lvds_out0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;lvds_panel_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_ep {</div><div class='add'>+	pinctrl-names = "default", "init";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pcie_init_pins_a&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;gpioj 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie_rc {</div><div class='add'>+	pinctrl-names = "default", "init", "sleep";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie_pins_a&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pcie_init_pins_a&gt;;</div><div class='add'>+	pinctrl-2 = &lt;&amp;pcie_sleep_pins_a&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pcie@0,0 {</div><div class='add'>+		 reset-gpios = &lt;&amp;gpioj 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		 wake-gpios = &lt;&amp;gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;scmi_regu {</div><div class='ctx'> 	scmi_vddio1: regulator@0 {</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -152,11 +414,71 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;timers3 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm3_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm3_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	timer@2 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers8 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm8_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm8_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	timer@7 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers10 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		pinctrl-0 = &lt;&amp;tim10_counter_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;tim10_counter_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;timers12 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+	counter {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	pwm {</div><div class='add'>+		pinctrl-0 = &lt;&amp;pwm12_pins_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pwm12_sleep_pins_a&gt;;</div><div class='add'>+		pinctrl-names = "default", "sleep";</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+	timer@11 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usart2 {</div><div class='ctx'> 	pinctrl-names = "default", "idle", "sleep";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;usart2_pins_a&gt;;</div><div class='ctx'> 	pinctrl-1 = &lt;&amp;usart2_idle_pins_a&gt;;</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;usart2_sleep_pins_a&gt;;</div><div class='add'>+	/delete-property/dmas;</div><div class='add'>+	/delete-property/dma-names;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts<br/>index 8d7794642900..9ff22e1c8723 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd-evb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd-evb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd-evb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/tesla/fsd-evb.dts</a></div><div class='hunk'>@@ -64,6 +64,26 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;ethernet0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	fixed-link {</div><div class='add'>+		speed = &lt;1000&gt;;</div><div class='add'>+		full-duplex;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ethernet1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	fixed-link {</div><div class='add'>+		speed = &lt;1000&gt;;</div><div class='add'>+		full-duplex;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;fin_pll {</div><div class='ctx'> 	clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi<br/>index 3f898cf4874c..6f4658f57453 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi</a></div><div class='hunk'>@@ -64,6 +64,62 @@</div><div class='ctx'> 		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='ctx'> 		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	eth0_tx_clk: eth0-tx-clk-pins {</div><div class='add'>+		samsung,pins = "gpf0-0";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_tx_data: eth0-tx-data-pins {</div><div class='add'>+		samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_tx_ctrl: eth0-tx-ctrl-pins {</div><div class='add'>+		samsung,pins = "gpf0-5";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_phy_intr: eth0-phy-intr-pins {</div><div class='add'>+		samsung,pins = "gpf0-6";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_rx_clk: eth0-rx-clk-pins {</div><div class='add'>+		samsung,pins = "gpf1-0";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_rx_data: eth0-rx-data-pins {</div><div class='add'>+		samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_rx_ctrl: eth0-rx-ctrl-pins {</div><div class='add'>+		samsung,pins = "gpf1-5";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth0_mdio: eth0-mdio-pins {</div><div class='add'>+		samsung,pins = "gpf1-6", "gpf1-7";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_NONE&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl_peric {</div><div class='hunk'>@@ -381,6 +437,62 @@</div><div class='ctx'> 		samsung,pin-pud = &lt;FSD_PIN_PULL_DOWN&gt;;</div><div class='ctx'> 		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	eth1_tx_clk: eth1-tx-clk-pins {</div><div class='add'>+		samsung,pins = "gpf2-0";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_DOWN&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_tx_data: eth1-tx-data-pins {</div><div class='add'>+		samsung,pins = "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_tx_ctrl: eth1-tx-ctrl-pins {</div><div class='add'>+		samsung,pins = "gpf2-5";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_phy_intr: eth1-phy-intr-pins {</div><div class='add'>+		samsung,pins = "gpf2-6";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rx_clk: eth1-rx-clk-pins {</div><div class='add'>+		samsung,pins = "gpf3-0";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rx_data: eth1-rx-data-pins {</div><div class='add'>+		samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_rx_ctrl: eth1-rx-ctrl-pins {</div><div class='add'>+		samsung,pins = "gpf3-5";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV6&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eth1_mdio: eth1-mdio-pins {</div><div class='add'>+		samsung,pins = "gpf3-6", "gpf3-7";</div><div class='add'>+		samsung,pin-function = &lt;FSD_PIN_FUNC_2&gt;;</div><div class='add'>+		samsung,pin-pud = &lt;FSD_PIN_PULL_UP&gt;;</div><div class='add'>+		samsung,pin-drv = &lt;FSD_PIN_DRV_LV4&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pinctrl_pmu {</div><div class='head'>diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi<br/>index 690b4ed9c29b..5b06e2667b89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/tesla/fsd.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/tesla/fsd.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/tesla/fsd.dtsi</a></div><div class='hunk'>@@ -92,7 +92,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x000&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x001&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x002&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -139,7 +139,7 @@</div><div class='ctx'> 				compatible = "arm,cortex-a72";</div><div class='ctx'> 				reg = &lt;0x0 0x003&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x100&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -172,7 +172,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x101&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -188,7 +188,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x102&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -204,7 +204,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x103&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -221,7 +221,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x200&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -237,7 +237,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x201&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -253,7 +253,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x202&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -269,7 +269,7 @@</div><div class='ctx'> 				reg = &lt;0x0 0x203&gt;;</div><div class='ctx'> 				enable-method = "psci";</div><div class='ctx'> 				clock-frequency = &lt;2400000000&gt;;</div><div class='del'>-				cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;;</div><div class='add'>+				cpu-idle-states = &lt;&amp;cpu_sleep&gt;;</div><div class='ctx'> 				i-cache-size = &lt;0xc000&gt;;</div><div class='ctx'> 				i-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 				i-cache-sets = &lt;256&gt;;</div><div class='hunk'>@@ -291,7 +291,7 @@</div><div class='ctx'> 		idle-states {</div><div class='ctx'> 			entry-method = "psci";</div><div class='ctx'> </div><div class='del'>-			CPU_SLEEP: cpu-sleep {</div><div class='add'>+			cpu_sleep: cpu-sleep {</div><div class='ctx'> 				idle-state-name = "c2";</div><div class='ctx'> 				compatible = "arm,idle-state";</div><div class='ctx'> 				local-timer-stop;</div><div class='hunk'>@@ -363,6 +363,7 @@</div><div class='ctx'> </div><div class='ctx'> 		gic: interrupt-controller@10400000 {</div><div class='ctx'> 			compatible = "arm,gic-v3";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			reg = &lt;0x0 0x10400000 0x0 0x10000&gt;, /* GICD */</div><div class='hunk'>@@ -979,6 +980,36 @@</div><div class='ctx'> 			memory-region = &lt;&amp;mfc_left&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		ethernet1: ethernet@14300000 {</div><div class='add'>+			compatible = "tesla,fsd-ethqos";</div><div class='add'>+			reg = &lt;0x0 0x14300000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_PHYRXCLK_MUX&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_EQOS_PHYRXCLK&gt;,</div><div class='add'>+				 &lt;&amp;clock_peric PERIC_DOUT_RGMII_CLK&gt;;</div><div class='add'>+			clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx",</div><div class='add'>+				      "master2_bus", "slave2_bus", "eqos_rxclk_mux",</div><div class='add'>+				      "eqos_phyrxclk", "dout_peric_rgmii_clk";</div><div class='add'>+			assigned-clocks = &lt;&amp;clock_peric PERIC_EQOS_PHYRXCLK_MUX&gt;,</div><div class='add'>+					  &lt;&amp;clock_peric PERIC_EQOS_PHYRXCLK&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;clock_peric PERIC_EQOS_PHYRXCLK&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;eth1_tx_clk&gt;, &lt;&amp;eth1_tx_data&gt;, &lt;&amp;eth1_tx_ctrl&gt;,</div><div class='add'>+				    &lt;&amp;eth1_phy_intr&gt;, &lt;&amp;eth1_rx_clk&gt;, &lt;&amp;eth1_rx_data&gt;,</div><div class='add'>+				    &lt;&amp;eth1_rx_ctrl&gt;, &lt;&amp;eth1_mdio&gt;;</div><div class='add'>+			local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+			iommus = &lt;&amp;smmu_peric 0x0 0x1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		ufs: ufs@15120000 {</div><div class='ctx'> 			compatible = "tesla,fsd-ufs";</div><div class='ctx'> 			reg = &lt;0x0 0x15120000 0x0 0x200&gt;,  /* 0: HCI standard */</div><div class='hunk'>@@ -1007,6 +1038,26 @@</div><div class='ctx'> 			clocks = &lt;&amp;clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26&gt;;</div><div class='ctx'> 			clock-names = "ref_clk";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		ethernet0: ethernet@15300000 {</div><div class='add'>+			compatible = "tesla,fsd-ethqos";</div><div class='add'>+			reg = &lt;0x0 0x15300000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_PTP_REF_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_ACLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_HCLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I&gt;,</div><div class='add'>+				 &lt;&amp;clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I&gt;;</div><div class='add'>+			clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;eth0_tx_clk&gt;, &lt;&amp;eth0_tx_data&gt;, &lt;&amp;eth0_tx_ctrl&gt;,</div><div class='add'>+				    &lt;&amp;eth0_phy_intr&gt;, &lt;&amp;eth0_rx_clk&gt;, &lt;&amp;eth0_rx_data&gt;,</div><div class='add'>+				    &lt;&amp;eth0_rx_ctrl&gt;, &lt;&amp;eth0_mdio&gt;;</div><div class='add'>+			local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+			iommus = &lt;&amp;smmu_fsys0 0x0 0x1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile<br/>index bcd392c3206e..743115b849a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/Makefile</a></div><div class='hunk'>@@ -16,23 +16,40 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-ivy.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-mallow.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-yavia.dtb</div><div class='del'>-dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-1-4-ghz-opp.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am6254atl-sk.dtb</div><div class='ctx'> </div><div class='ctx'> # Boards with AM62Ax SoC</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb</div><div class='ctx'> </div><div class='add'>+# Boards with AM62Dx SoC</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb</div><div class='add'>+</div><div class='ctx'> # Boards with AM62Px SoC</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-var-som-symphony.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-ivy.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-mallow.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-yavia.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dahlia.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dev.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-ivy.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-mallow.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-yavia.dtb</div><div class='ctx'> </div><div class='ctx'> # Common overlays for SK-AM62* family of boards</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-ov5640.dtbo</div><div class='hunk'>@@ -41,13 +58,10 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-imx219.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo</div><div class='ctx'> </div><div class='ctx'> # Boards with AM64x SoC</div><div class='del'>-k3-am642-hummingboard-t-pcie-dtbs := \</div><div class='del'>-	k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-pcie.dtbo</div><div class='del'>-k3-am642-hummingboard-t-usb3-dtbs := \</div><div class='del'>-	k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-usb3.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-pcie0-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb</div><div class='hunk'>@@ -56,6 +70,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-nand.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-gpio-fan.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-pcie-usb2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-peb-c-010.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo</div><div class='hunk'>@@ -96,6 +112,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb3.dtbo</div><div class='ctx'> # Boards with J7200 SoC</div><div class='ctx'> k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j7200-evm-pcie1-ep.dtbo</div><div class='ctx'> </div><div class='ctx'> # Boards with J721e SoC</div><div class='ctx'> k3-j721e-evm-dtbs := k3-j721e-common-proc-board.dtb k3-j721e-evm-quad-port-eth-exp.dtbo</div><div class='hunk'>@@ -104,35 +121,44 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board-infotainment.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi-exp-board.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie1-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo</div><div class='ctx'> </div><div class='ctx'> # Boards with J721s2 SoC</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo</div><div class='ctx'> k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-board.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo</div><div class='ctx'> </div><div class='ctx'> # Boards with J722s SoC</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo</div><div class='ctx'> </div><div class='ctx'> # Boards with J784s4 SoC</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j784s4-j742s2-evm-usb0-type-a.dtbo</div><div class='add'>+</div><div class='add'>+# Boards with J742S2 SoC</div><div class='add'>+dtb-$(CONFIG_ARCH_K3) += k3-j742s2-evm.dtb</div><div class='ctx'> </div><div class='ctx'> # Build time test only, enabled by CONFIG_OF_ALL_DTBS</div><div class='ctx'> k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \</div><div class='ctx'> 	k3-am625-beagleplay-csi2-ov5640.dtbo</div><div class='ctx'> k3-am625-beagleplay-csi2-tevi-ov5640-dtbs := k3-am625-beagleplay.dtb \</div><div class='ctx'> 	k3-am625-beagleplay-csi2-tevi-ov5640.dtbo</div><div class='del'>-k3-am625-phyboard-lyra-1-4-ghz-opp.dtbs := k3-am625-phyboard-lyra-rdk.dtb \</div><div class='del'>-	k3-am625-phyboard-lyra-1-4-ghz-opp.dtbo</div><div class='ctx'> k3-am625-phyboard-lyra-disable-eth-phy-dtbs := k3-am625-phyboard-lyra-rdk.dtb \</div><div class='ctx'> 	k3-am6xx-phycore-disable-eth-phy.dtbo</div><div class='ctx'> k3-am625-phyboard-lyra-disable-rtc-dtbs := k3-am625-phyboard-lyra-rdk.dtb \</div><div class='hunk'>@@ -168,6 +194,8 @@ k3-am642-evm-icssg1-dualemac-dtbs := \</div><div class='ctx'> 	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac.dtbo</div><div class='ctx'> k3-am642-evm-icssg1-dualemac-mii-dtbs := \</div><div class='ctx'> 	k3-am642-evm.dtb k3-am642-evm-icssg1-dualemac-mii.dtbo</div><div class='add'>+k3-am642-evm-pcie0-ep-dtbs := \</div><div class='add'>+	k3-am642-evm.dtb k3-am642-evm-pcie0-ep.dtbo</div><div class='ctx'> k3-am642-phyboard-electra-disable-eth-phy-dtbs := \</div><div class='ctx'> 	k3-am642-phyboard-electra-rdk.dtb k3-am6xx-phycore-disable-eth-phy.dtbo</div><div class='ctx'> k3-am642-phyboard-electra-disable-rtc-dtbs := \</div><div class='hunk'>@@ -180,26 +208,48 @@ k3-am642-phyboard-electra-gpio-fan-dtbs := \</div><div class='ctx'> 	k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-gpio-fan.dtbo</div><div class='ctx'> k3-am642-phyboard-electra-pcie-usb2-dtbs := \</div><div class='ctx'> 	k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-pcie-usb2.dtbo</div><div class='add'>+k3-am642-phyboard-electra-x27-gpio1-spi1-uart3-dtbs := \</div><div class='add'>+	k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtbo</div><div class='add'>+k3-am642-phyboard-electra-peb-c-010-dtbs := \</div><div class='add'>+	k3-am642-phyboard-electra-rdk.dtb k3-am642-phyboard-electra-peb-c-010.dtbo</div><div class='ctx'> k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo</div><div class='ctx'> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo</div><div class='ctx'> k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \</div><div class='ctx'> 	k3-j721e-sk-csi2-dual-imx219.dtbo</div><div class='add'>+k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \</div><div class='add'>+	k3-am68-sk-base-board-pcie1-ep.dtbo</div><div class='ctx'> k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \</div><div class='ctx'> 	k3-j721e-sk-csi2-dual-imx219.dtbo</div><div class='add'>+k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \</div><div class='add'>+	k3-am69-sk-pcie0-ep.dtbo</div><div class='add'>+k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \</div><div class='add'>+	k3-j7200-evm-pcie1-ep.dtbo</div><div class='ctx'> k3-j721e-common-proc-board-infotainment-dtbs := k3-j721e-common-proc-board.dtb \</div><div class='ctx'> 	k3-j721e-common-proc-board-infotainment.dtbo</div><div class='ctx'> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \</div><div class='ctx'> 	k3-j721e-evm-pcie0-ep.dtbo</div><div class='add'>+k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \</div><div class='add'>+	k3-j721e-evm-pcie1-ep.dtbo</div><div class='ctx'> k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \</div><div class='ctx'> 	k3-j721e-sk-csi2-dual-imx219.dtbo</div><div class='ctx'> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \</div><div class='ctx'> 	k3-j721s2-evm-pcie1-ep.dtbo</div><div class='add'>+k3-j721s2-evm-usb0-type-a-dtbs := k3-j721s2-common-proc-board.dtb \</div><div class='add'>+	k3-j721s2-evm-usb0-type-a.dtbo</div><div class='add'>+k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \</div><div class='add'>+	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo</div><div class='add'>+k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \</div><div class='add'>+	k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo</div><div class='add'>+k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \</div><div class='add'>+	k3-j784s4-j742s2-evm-usb0-type-a.dtbo</div><div class='ctx'> k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \</div><div class='ctx'> 	k3-j784s4-evm-pcie0-pcie1-ep.dtbo</div><div class='ctx'> k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \</div><div class='ctx'> 	k3-j784s4-evm-quad-port-eth-exp1.dtbo</div><div class='add'>+k3-j784s4-evm-usb0-type-a-dtbs := k3-j784s4-evm.dtb \</div><div class='add'>+	k3-j784s4-j742s2-evm-usb0-type-a.dtbo</div><div class='ctx'> k3-j784s4-evm-usxgmii-exp1-exp2-dtbs := k3-j784s4-evm.dtb \</div><div class='ctx'> 	k3-j784s4-evm-usxgmii-exp1-exp2.dtbo</div><div class='ctx'> dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \</div><div class='hunk'>@@ -217,33 +267,27 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \</div><div class='ctx'> 	k3-am62p5-sk-csi2-tevi-ov5640.dtb \</div><div class='ctx'> 	k3-am642-evm-icssg1-dualemac.dtb \</div><div class='ctx'> 	k3-am642-evm-icssg1-dualemac-mii.dtb \</div><div class='add'>+	k3-am642-evm-pcie0-ep.dtb \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \</div><div class='ctx'> 	k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \</div><div class='ctx'> 	k3-am68-sk-base-board-csi2-dual-imx219.dtb \</div><div class='add'>+	k3-am68-sk-base-board-pcie1-ep.dtb \</div><div class='ctx'> 	k3-am69-sk-csi2-dual-imx219.dtb \</div><div class='add'>+	k3-am69-sk-pcie0-ep.dtb \</div><div class='add'>+	k3-j7200-evm-pcie1-ep.dtb \</div><div class='ctx'> 	k3-j721e-common-proc-board-infotainment.dtb \</div><div class='ctx'> 	k3-j721e-evm-pcie0-ep.dtb \</div><div class='add'>+	k3-j721e-evm-pcie1-ep.dtb \</div><div class='ctx'> 	k3-j721e-sk-csi2-dual-imx219.dtb \</div><div class='ctx'> 	k3-j721s2-evm-pcie1-ep.dtb \</div><div class='add'>+	k3-j721s2-evm-usb0-type-a.dtb \</div><div class='add'>+	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \</div><div class='add'>+	k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \</div><div class='add'>+	k3-j742s2-evm-usb0-type-a.dtb \</div><div class='ctx'> 	k3-j784s4-evm-pcie0-pcie1-ep.dtb \</div><div class='ctx'> 	k3-j784s4-evm-quad-port-eth-exp1.dtb \</div><div class='add'>+	k3-j784s4-evm-usb0-type-a.dtb \</div><div class='ctx'> 	k3-j784s4-evm-usxgmii-exp1-exp2.dtb</div><div class='ctx'> </div><div class='ctx'> # Enable support for device-tree overlays</div><div class='del'>-DTC_FLAGS_k3-am625-beagleplay += -@</div><div class='del'>-DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@</div><div class='del'>-DTC_FLAGS_k3-am62a7-phyboard-lyra-rdk += -@</div><div class='del'>-DTC_FLAGS_k3-am625-sk += -@</div><div class='del'>-DTC_FLAGS_k3-am62-lp-sk += -@</div><div class='del'>-DTC_FLAGS_k3-am62a7-sk += -@</div><div class='del'>-DTC_FLAGS_k3-am62p5-sk += -@</div><div class='del'>-DTC_FLAGS_k3-am642-evm += -@</div><div class='del'>-DTC_FLAGS_k3-am642-phyboard-electra-rdk += -@</div><div class='del'>-DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@</div><div class='del'>-DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@</div><div class='del'>-DTC_FLAGS_k3-am68-sk-base-board += -@</div><div class='del'>-DTC_FLAGS_k3-am69-sk += -@</div><div class='del'>-DTC_FLAGS_k3-j721e-common-proc-board += -@</div><div class='del'>-DTC_FLAGS_k3-j721e-sk += -@</div><div class='del'>-DTC_FLAGS_k3-j721s2-common-proc-board += -@</div><div class='del'>-DTC_FLAGS_k3-j784s4-evm += -@</div><div class='add'>+DTC_FLAGS := -@</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts<br/>index 8e9fc00a6b3c..ecfba05fe5c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts</a></div><div class='hunk'>@@ -7,12 +7,20 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "k3-am625.dtsi"</div><div class='ctx'> #include "k3-am62x-sk-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ti,am62-lp-sk", "ti,am625";</div><div class='ctx'> 	model = "Texas Instruments AM62x LP SK";</div><div class='ctx'> </div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 2G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vmain_pd: regulator-0 {</div><div class='ctx'> 		/* TPS65988 PD CONTROLLER OUTPUT */</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -69,20 +77,39 @@</div><div class='ctx'> 		gpios = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		states = &lt;1800000 0x0&gt;,</div><div class='ctx'> 			 &lt;3300000 0x1&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_pmx0 {</div><div class='add'>+	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */</div><div class='add'>+			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */</div><div class='add'>+			AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (V2) MMC0_DAT0 */</div><div class='add'>+			AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (V1) MMC0_DAT1 */</div><div class='add'>+			AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (W2) MMC0_DAT2 */</div><div class='add'>+			AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (W1) MMC0_DAT3 */</div><div class='add'>+			AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (Y2) MMC0_DAT4 */</div><div class='add'>+			AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (W3) MMC0_DAT5 */</div><div class='add'>+			AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (W4) MMC0_DAT6 */</div><div class='add'>+			AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (V4) MMC0_DAT7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vddshv_sdio_pins_default: vddshv-sdio-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (C13) UART0_RTSn.GPIO1_23 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='hunk'>@@ -118,6 +145,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;main_gpio1_ioexp_intr_pins_default&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	exp2: gpio@23 {</div><div class='hunk'>@@ -140,6 +168,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vddshv_sdio&gt;;</div><div class='hunk'>@@ -229,6 +265,14 @@</div><div class='ctx'> 	DVDD-supply = &lt;&amp;buck2_reg&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gpmc0 {</div><div class='ctx'> 	ranges = &lt;0 0 0x00 0x51000000 0x01000000&gt;; /* CS0 space. Min partition = 16MB */</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi<br/>index 5b92aef5b284..40fb3c9e674c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-main.dtsi</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x00 0x01800000 0x00 0x10000&gt;,	/* GICD */</div><div class='ctx'> 		      &lt;0x00 0x01880000 0x00 0xc0000&gt;,	/* GICR */</div><div class='del'>-		      &lt;0x00 0x01880000 0x00 0xc0000&gt;,   /* GICR */</div><div class='ctx'> 		      &lt;0x01 0x00000000 0x00 0x2000&gt;,    /* GICC */</div><div class='ctx'> 		      &lt;0x01 0x00010000 0x00 0x1000&gt;,    /* GICH */</div><div class='ctx'> 		      &lt;0x01 0x00020000 0x00 0x2000&gt;;    /* GICV */</div><div class='hunk'>@@ -553,18 +552,14 @@</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 57 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 57 5&gt;, &lt;&amp;k3_clks 57 6&gt;;</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 57 6&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 57 8&gt;;</div><div class='ctx'> 		bus-width = &lt;8&gt;;</div><div class='del'>-		mmc-ddr-1_8v;</div><div class='ctx'> 		mmc-hs200-1_8v;</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='ctx'> 		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr52 = &lt;0x5&gt;;</div><div class='del'>-		ti,otap-del-sel-hs200 = &lt;0x5&gt;;</div><div class='del'>-		ti,itap-del-sel-legacy = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-mmc-hs = &lt;0x1&gt;;</div><div class='add'>+		ti,otap-del-sel-hs200 = &lt;0x6&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -577,17 +572,17 @@</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='ctx'> 		bus-width = &lt;4&gt;;</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,otap-del-sel-legacy = &lt;0x8&gt;;</div><div class='add'>+		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr50 = &lt;0x8&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr104 = &lt;0x7&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr50 = &lt;0x4&gt;;</div><div class='del'>-		ti,itap-del-sel-legacy = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-sd-hs = &lt;0x1&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr12 = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr25 = &lt;0x1&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr12 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr25 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr50 = &lt;0xc&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr104 = &lt;0x6&gt;;</div><div class='add'>+		ti,otap-del-sel-ddr50 = &lt;0x9&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -600,17 +595,17 @@</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='ctx'> 		bus-width = &lt;4&gt;;</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,otap-del-sel-legacy = &lt;0x8&gt;;</div><div class='add'>+		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr50 = &lt;0x8&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr104 = &lt;0x7&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr50 = &lt;0x8&gt;;</div><div class='del'>-		ti,itap-del-sel-legacy = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-sd-hs = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr12 = &lt;0xa&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr25 = &lt;0x1&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr12 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr25 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr50 = &lt;0xc&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr104 = &lt;0x6&gt;;</div><div class='add'>+		ti,otap-del-sel-ddr50 = &lt;0x9&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -693,12 +688,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpu: gpu@fd00000 {</div><div class='del'>-		compatible = "ti,am62-gpu", "img,img-axe";</div><div class='add'>+		compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",</div><div class='add'>+			     "img,img-rogue";</div><div class='ctx'> 		reg = &lt;0x00 0x0fd00000 0x00 0x20000&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 187 0&gt;;</div><div class='ctx'> 		clock-names = "core";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 187 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		power-domain-names = "a";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g: ethernet@8000000 {</div><div class='hunk'>@@ -811,6 +808,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ecap0: pwm@23100000 {</div><div class='hunk'>@@ -843,6 +841,33 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eqep0: counter@23200000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23200000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 59 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 59 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep1: counter@23210000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23210000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 60 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 60 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep2: counter@23220000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23220000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 118 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_mcan0: can@20701000 {</div><div class='ctx'> 		compatible = "bosch,m_can";</div><div class='ctx'> 		reg = &lt;0x00 0x20701000 0x00 0x200&gt;,</div><div class='hunk'>@@ -1007,6 +1032,9 @@</div><div class='ctx'> 		cdns_csi2rx0: csi-bridge@30101000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x00 0x30101000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 3&gt;, &lt;&amp;k3_clks 182 0&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 4&gt;, &lt;&amp;k3_clks 182 4&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -1054,6 +1082,96 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pruss: pruss@30040000 {</div><div class='add'>+		compatible = "ti,am625-pruss";</div><div class='add'>+		reg = &lt;0x00 0x30040000 0x00 0x80000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 81 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x00 0x30040000 0x80000&gt;;</div><div class='add'>+</div><div class='add'>+		pruss_mem: memories@0 {</div><div class='add'>+			reg = &lt;0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0x2000 0x2000&gt;,</div><div class='add'>+			      &lt;0x10000 0x10000&gt;;</div><div class='add'>+			reg-names = "dram0", "dram1", "shrdram2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pruss_cfg: cfg@26000 {</div><div class='add'>+			compatible = "ti,pruss-cfg", "syscon";</div><div class='add'>+			reg = &lt;0x26000 0x200&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0x0 0x26000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+			clocks {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				pruss_coreclk_mux: coreclk-mux@3c {</div><div class='add'>+					reg = &lt;0x3c&gt;;</div><div class='add'>+					#clock-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;k3_clks 81 0&gt;,  /* pruss_core_clk */</div><div class='add'>+						 &lt;&amp;k3_clks 81 14&gt;; /* pruss_iclk */</div><div class='add'>+					assigned-clocks = &lt;&amp;pruss_coreclk_mux&gt;;</div><div class='add'>+					assigned-clock-parents = &lt;&amp;k3_clks 81 14&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				pruss_iepclk_mux: iepclk-mux@30 {</div><div class='add'>+					reg = &lt;0x30&gt;;</div><div class='add'>+					#clock-cells = &lt;0&gt;;</div><div class='add'>+					clocks = &lt;&amp;k3_clks 81 3&gt;,	/* pruss_iep_clk */</div><div class='add'>+						 &lt;&amp;pruss_coreclk_mux&gt;;	/* pruss_coreclk_mux */</div><div class='add'>+					assigned-clocks = &lt;&amp;pruss_iepclk_mux&gt;;</div><div class='add'>+					assigned-clock-parents = &lt;&amp;pruss_coreclk_mux&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pruss_intc: interrupt-controller@20000 {</div><div class='add'>+			compatible = "ti,pruss-intc";</div><div class='add'>+			reg = &lt;0x20000 0x2000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "host_intr0", "host_intr1",</div><div class='add'>+					  "host_intr2", "host_intr3",</div><div class='add'>+					  "host_intr4", "host_intr5",</div><div class='add'>+					  "host_intr6", "host_intr7";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pru0: pru@34000 {</div><div class='add'>+			compatible = "ti,am625-pru";</div><div class='add'>+			reg = &lt;0x34000 0x3000&gt;,</div><div class='add'>+			      &lt;0x22000 0x100&gt;,</div><div class='add'>+			      &lt;0x22400 0x100&gt;;</div><div class='add'>+			reg-names = "iram", "control", "debug";</div><div class='add'>+			firmware-name = "am62x-pru0-fw";</div><div class='add'>+			interrupt-parent = &lt;&amp;pruss_intc&gt;;</div><div class='add'>+			interrupts = &lt;16 2 2&gt;;</div><div class='add'>+			interrupt-names = "vring";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pru1: pru@38000 {</div><div class='add'>+			compatible = "ti,am625-pru";</div><div class='add'>+			reg = &lt;0x38000 0x3000&gt;,</div><div class='add'>+			      &lt;0x24000 0x100&gt;,</div><div class='add'>+			      &lt;0x24400 0x100&gt;;</div><div class='add'>+			reg-names = "iram", "control", "debug";</div><div class='add'>+			firmware-name = "am62x-pru1-fw";</div><div class='add'>+			interrupt-parent = &lt;&amp;pruss_intc&gt;;</div><div class='add'>+			interrupts = &lt;18 3 3&gt;;</div><div class='add'>+			interrupt-names = "vring";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpmc0: memory-controller@3b000000 {</div><div class='ctx'> 		compatible = "ti,am64-gpmc";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 80 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi<br/>index bb43a411f59b..68e906796aef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi</a></div><div class='hunk'>@@ -174,4 +174,17 @@</div><div class='ctx'> 		bosch,mram-cfg = &lt;0x0 128 64 64 64 64 32 32&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mcu_m4fss: m4fss@5000000 {</div><div class='add'>+		compatible = "ti,am64-m4fss";</div><div class='add'>+		reg = &lt;0x00 0x5000000 0x00 0x30000&gt;,</div><div class='add'>+		      &lt;0x00 0x5040000 0x00 0x10000&gt;;</div><div class='add'>+		reg-names = "iram", "dram";</div><div class='add'>+		resets = &lt;&amp;k3_reset 9 1&gt;;</div><div class='add'>+		firmware-name = "am62-mcu-m4f0_0-fw";</div><div class='add'>+		ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;9&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x18 0xff&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi<br/>index 43488cc8bcb1..eeca643fedbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved_memory: reserved-memory {</div><div class='hunk'>@@ -36,15 +37,33 @@</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		ramoops@9ca00000 {</div><div class='add'>+		ramoops@9c700000 {</div><div class='ctx'> 			compatible = "ramoops";</div><div class='del'>-			reg = &lt;0x00 0x9ca00000 0x00 0x00100000&gt;;</div><div class='add'>+			reg = &lt;0x00 0x9c700000 0x00 0x00100000&gt;;</div><div class='ctx'> 			record-size = &lt;0x8000&gt;;</div><div class='ctx'> 			console-size = &lt;0x8000&gt;;</div><div class='ctx'> 			ftrace-size = &lt;0x00&gt;;</div><div class='ctx'> 			pmsg-size = &lt;0x8000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		rtos_ipc_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x00300000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9da00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9da00000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9db00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='hunk'>@@ -56,12 +75,6 @@</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0x9db00000 0x00 0x00c00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc_5v0_som: regulator-vcc-5v0-som {</div><div class='hunk'>@@ -83,6 +96,16 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vddshv_3v3: regulator-vddshv-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDDSHV0";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -109,6 +132,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */</div><div class='ctx'> 			AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mdio1_pins_default: main-mdio1-default-pins {</div><div class='hunk'>@@ -116,6 +140,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */</div><div class='ctx'> 			AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='hunk'>@@ -131,6 +156,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */</div><div class='ctx'> 			AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_rgmii1_pins_default: main-rgmii1-default-pins {</div><div class='hunk'>@@ -148,6 +174,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */</div><div class='ctx'> 			AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ospi0_pins_default: ospi0-default-pins {</div><div class='hunk'>@@ -164,6 +191,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='ctx'> 			AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='hunk'>@@ -173,6 +201,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;a53_opp_table {</div><div class='add'>+	opp-1400000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+		opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpsw3g {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;;</div><div class='hunk'>@@ -181,6 +216,7 @@</div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw3g_mdio {</div><div class='hunk'>@@ -191,15 +227,21 @@</div><div class='ctx'> 	cpsw3g_phy1: ethernet-phy@1 {</div><div class='ctx'> 		compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_pktdma {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pmic@30 {</div><div class='hunk'>@@ -226,8 +268,8 @@</div><div class='ctx'> 		regulators {</div><div class='ctx'> 			vdd_core: buck1 {</div><div class='ctx'> 				regulator-name = "VDD_CORE";</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -287,6 +329,7 @@</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='ctx'> 		pagesize = &lt;32&gt;;</div><div class='ctx'> 		reg = &lt;0x50&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vddshv_3v3&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c_som_rtc: rtc@52 {</div><div class='hunk'>@@ -311,13 +354,16 @@</div><div class='ctx'> 		cdns,tchsh-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tslch-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,read-delay = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> 	non-removable;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am62-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts<br/>new file mode 100644<br/>index 000000000000..7a4cffc27bda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts</a></div><div class='hunk'>@@ -0,0 +1,503 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * https://www.beagleboard.org/boards/pocketbeagle-2</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ * Copyright (C) 2025 Robert Nelson, BeagleBoard.org Foundation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include "k3-am625.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "beagle,am62-pocketbeagle2", "ti,am625";</div><div class='add'>+	model = "BeagleBoard.org PocketBeagle2";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;main_uart1;</div><div class='add'>+		serial2 = &amp;main_uart6;</div><div class='add'>+		serial3 = &amp;main_uart0;</div><div class='add'>+		mmc1 = &amp;sdhci1;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='add'>+		i2c0 = &amp;main_i2c0;</div><div class='add'>+		i2c2 = &amp;main_i2c2;</div><div class='add'>+		i2c3 = &amp;wkup_i2c0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;main_uart6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 512MB RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x20000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* global cma region */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x00 0x8000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_tfa_ddr: tfa@9e780000 {</div><div class='add'>+			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='add'>+			alignment = &lt;0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;;</div><div class='add'>+			alignment = &lt;0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9da00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9da00000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9db00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_5v0: regulator-1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3: regulator-2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_mmc1: regulator-3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_mmc1";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_3v3_sd_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		gpio = &lt;&amp;main_gpio0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv: regulator-4 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "sd_hs200_switch";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio1 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adc_vref: regulator-5 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "default";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins_default&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			bootph-all;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			function = LED_FUNCTION_DISK_ACTIVITY;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			linux,default-trigger = "mmc1";</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "on";</div><div class='add'>+			bootph-all;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			bootph-all;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			function = LED_FUNCTION_INDICATOR;</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			bootph-all;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	led_pins_default: led-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x000c, PIN_OUTPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */</div><div class='add'>+			AM62X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */</div><div class='add'>+			AM62X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */</div><div class='add'>+			AM62X_IOPAD(0x0018, PIN_OUTPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */</div><div class='add'>+			AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */</div><div class='add'>+			AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart0_pins_default: main-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */</div><div class='add'>+			AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart1_pins_default: main-uart1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */</div><div class='add'>+			AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */</div><div class='add'>+			AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */</div><div class='add'>+			AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart6_pins_default: main-uart6-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x001c, PIN_INPUT, 3) /* (J23) OSPI0_D4.UART6_RXD */</div><div class='add'>+			AM62X_IOPAD(0x0020, PIN_OUTPUT, 3) /* (J25) OSPI0_D5.UART6_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */</div><div class='add'>+			AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */</div><div class='add'>+			AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */</div><div class='add'>+			AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */</div><div class='add'>+			AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */</div><div class='add'>+			AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */</div><div class='add'>+			AM62X_IOPAD(0x240, PIN_INPUT, 7) /* (D17/C15) MMC1_SDCD.GPIO1_48 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO1_49 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (D16) EXTINTn */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x0000, PIN_OUTPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb1_pins_default: usb1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x0258, PIN_INPUT, 0) /* (F18) USB1_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	epwm2_pins_default: epwm2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01e8, PIN_OUTPUT, 8) /* (B17) I2C1_SCL.EHRPWM2_A */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;epwm2_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart1_pins_default&gt;;</div><div class='add'>+	bootph-pre-ram;</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart6_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ad7291: adc@20 {</div><div class='add'>+		/* Emulated with MSPM0L1105 */</div><div class='add'>+		compatible = "adi,ad7291";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;adc_vref&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom: eeprom@50 {</div><div class='add'>+		/* Emulated with MSPM0L1105 */</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c2_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_pmx0 {</div><div class='add'>+	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0)	/* (C6/A7) WKUP_UART0_CTSn */</div><div class='add'>+			AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0)	/* (A4/B4) WKUP_UART0_RTSn */</div><div class='add'>+			AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0)	/* (B4/B5) WKUP_UART0_RXD */</div><div class='add'>+			AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0)	/* (C5/C6) WKUP_UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_MCU_IOPAD(0x004c, PIN_INPUT_PULLUP, 0)	/* (B9) WKUP_I2C0_SCL */</div><div class='add'>+			AM62X_MCU_IOPAD(0x0050, PIN_INPUT_PULLUP, 0)	/* (A9) WKUP_I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	/* SD/MMC */</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	cd-gpios = &lt;&amp;main_gpio1 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	cd-debounce-delay-ms = &lt;100&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	ti,fails-without-test-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	/* This is a Type-C socket, but wired as USB 2.0 */</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	/*</div><div class='add'>+	 * Default set here is compatible with original PocketBeagle,</div><div class='add'>+	 * Expansion boards assumed this was pre-setup as host.</div><div class='add'>+	 */</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb1_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	/* WKUP UART0 is used by Device Manager firmware */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tps65219: pmic@30 {</div><div class='add'>+		compatible = "ti,tps65219";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		buck1-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		buck2-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		ldo1-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;buck2_reg&gt;;</div><div class='add'>+		ldo3-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		ldo4-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		bootph-all;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		ti,power-button;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck1_reg: buck1 {</div><div class='add'>+				regulator-name = "VDD_CORE";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2_reg: buck2 {</div><div class='add'>+				regulator-name = "VDD_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3_reg: buck3 {</div><div class='add'>+				regulator-name = "VDD_1V2";</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1_reg: ldo1 {</div><div class='add'>+				/*</div><div class='add'>+				 * Regulator is left as is unused, vdd_sd</div><div class='add'>+				 * is controlled via GPIO with bypass config</div><div class='add'>+				 * as per the NVM configuration</div><div class='add'>+				 */</div><div class='add'>+				regulator-name = "VDD_SD_3V3";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-allow-bypass;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: ldo2 {</div><div class='add'>+				regulator-name = "VDDA_0V85";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: ldo3 {</div><div class='add'>+				regulator-name = "VDDA_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: ldo4 {</div><div class='add'>+				regulator-name = "VDD_2V5";</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..ea69fab9b52b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2021-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_m4fss_dma_memory_region: memory@9cb00000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9cb00000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_m4fss_memory_region: memory@9cc00000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9cc00000 0x00 0xe00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_m4_0: mbox-m4-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_r5_0: mbox-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_m4fss {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_m4_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_m4fss_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_m4fss_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi<br/>index 9202181fbd65..2b5f5e50b578 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -28,10 +28,10 @@</div><div class='ctx'> 			"Headphone Jack", "HPOUTR",</div><div class='ctx'> 			"IN2L", "Line In Jack",</div><div class='ctx'> 			"IN2R", "Line In Jack",</div><div class='del'>-			"Headphone Jack", "MICBIAS",</div><div class='del'>-			"IN1L", "Headphone Jack";</div><div class='add'>+			"Microphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Microphone Jack";</div><div class='ctx'> 		simple-audio-card,widgets =</div><div class='del'>-			"Microphone", "Headphone Jack",</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='ctx'> 			"Headphone", "Headphone Jack",</div><div class='ctx'> 			"Line", "Line In Jack";</div><div class='ctx'> </div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM */</div><div class='ctx'> 	eeprom@57 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi<br/>new file mode 100644<br/>index 000000000000..71c29eab0eee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi</a></div><div class='hunk'>@@ -0,0 +1,655 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62 SoM on Ivy carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	/* AIN1 Voltage w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_voltage_unmanaged: voltage-divider-ain1 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1 Current w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_current_unmanaged: current-sense-shunt-ain1 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1_MODE - SODIMM 216 */</div><div class='add'>+	ain1_mode_mux_ctrl: mux-controller-0 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_5&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;main_gpio0 40 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain1_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain1_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain1_current";</div><div class='add'>+		io-channels = &lt;&amp;ain1_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Voltage w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_voltage_unmanaged: voltage-divider-ain2 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Current w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_current_unmanaged: current-sense-shunt-ain2 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2_MODE - SODIMM 218 */</div><div class='add'>+	ain2_mode_mux_ctrl: mux-controller-1 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_6&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;main_gpio0 36 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain2_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain2_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain2_current";</div><div class='add'>+		io-channels = &lt;&amp;ain2_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ivy_leds&gt;;</div><div class='add'>+</div><div class='add'>+		/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Green - SODIMM 32 - LEDs.GPIO2 */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Red - SODIMM 34 - LEDs.GPIO3 */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Green - SODIMM 54 - LEDs.GPIO5 */</div><div class='add'>+		led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Red - SODIMM 44 - LEDs.GPIO6 */</div><div class='add'>+		led-5 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 37 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */</div><div class='add'>+		led-6 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 34 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Red - SODIMM 48 - LEDs.GPIO8 */</div><div class='add'>+		led-7 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 33 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain1: regulator-3v2-ain1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain2: regulator-3v2-ain2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Ivy Power Supply Input Voltage */</div><div class='add'>+	ivy-input-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_1 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 7&gt;;</div><div class='add'>+		full-ohms = &lt;204700&gt;; /* 200K + 4.7K */</div><div class='add'>+		output-ohms = &lt;4700&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-5v-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_2 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 6&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 27K + 12K */</div><div class='add'>+		output-ohms = &lt;12000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-3v3-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_3 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 5&gt;;</div><div class='add'>+		full-ohms = &lt;54000&gt;; /* 27K + 27K */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-1v8-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_4 */</div><div class='add'>+		io-channels = &lt;&amp;verdin_som_adc 4&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 12K + 27K */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	pinctrl_ivy_leds: ivy-leds-default-pins {</div><div class='add'>+		pinctrl-single,pins =</div><div class='add'>+			&lt;AM62X_IOPAD(0x019c, PIN_INPUT, 7)&gt;, /* (B18) MCASP0_AXR1.GPIO1_9    */ /* SODIMM 36 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x01a0, PIN_INPUT, 7)&gt;, /* (B20) MCASP0_AXR0.GPIO1_10   */ /* SODIMM 34 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x01a4, PIN_INPUT, 7)&gt;, /* (A19) MCASP0_ACLKX.GPIO1_11  */ /* SODIMM 30 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x01a8, PIN_INPUT, 7)&gt;, /* (A20) MCASP0_AFSX.GPIO1_12   */ /* SODIMM 32 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x0088, PIN_INPUT, 7)&gt;, /* (L17) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x0098, PIN_INPUT, 7)&gt;, /* (R18) GPMC0_WAIT0.GPIO0_37   */ /* SODIMM 44 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x008c, PIN_INPUT, 7)&gt;, /* (L25) GPMC0_WEn.GPIO0_34     */ /* SODIMM 46 */</div><div class='add'>+			&lt;AM62X_IOPAD(0x002c, PIN_INPUT, 7)&gt;; /* (F23) OSPI0_CSn0.GPIO0_11    */ /* SODIMM 54 */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cpsw3g_phy1: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_eth2_rgmii_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;38 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1*/</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ctrl_sleep_moci&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_cs2_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io0_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io1_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io2_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io3_gpio&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"DIGI_1", /* SODIMM 56 */</div><div class='add'>+		"DIGI_2", /* SODIMM 58 */</div><div class='add'>+		"REL1",   /* SODIMM 60 */</div><div class='add'>+		"REL2",   /* SODIMM 62 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"REL3", /* SODIMM 64 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 30 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 50 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 60 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 70 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 80 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_qspi1_dqs_gpio&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"REL4", /* SODIMM 66 */</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 30 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 50 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 60 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 70 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 80 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4 CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ivy_adc1: adc@40 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_7&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;41 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy_adc2: adc@41 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;42 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_spi1_cs0&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+	cs-gpios = &lt;0&gt;,</div><div class='add'>+		   &lt;&amp;mcu_gpio0 1 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;mcu_gpio0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@1 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fram@2 {</div><div class='add'>+		compatible = "fujitsu,mb85rs256", "atmel,at25";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		address-width = &lt;16&gt;;</div><div class='add'>+		size = &lt;32768&gt;;</div><div class='add'>+		spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+		pagesize = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3 */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_pcie_1_reset&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */</div><div class='add'>+		"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1*/</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rts-active-low;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi<br/>index 7372d392ec8a..9a2483cf5d70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi</a></div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* EEPROM */</div><div class='ctx'> 	eeprom@57 {</div><div class='del'>-		compatible = "st,24c02";</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='ctx'> 		reg = &lt;0x57&gt;;</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi<br/>index 5bef31b8577b..dc4b228a9fd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi</a></div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-name = "+V3.3_SD";</div><div class='del'>-		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+		startup-delay-us = &lt;20000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {</div><div class='hunk'>@@ -189,7 +189,7 @@</div><div class='ctx'> 		regulator-name = "USB_1_EN";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -206,7 +206,13 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9da00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9da00000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9db00000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -507,16 +513,16 @@</div><div class='ctx'> 	/* Verdin I2C_2_DSI */</div><div class='ctx'> 	pinctrl_i2c2: main-i2c2-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x00b0, PIN_INPUT, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */</div><div class='del'>-			AM62X_IOPAD(0x00b4, PIN_INPUT, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */</div><div class='add'>+			AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */</div><div class='add'>+			AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Verdin I2C_4_CSI */</div><div class='ctx'> 	pinctrl_i2c3: main-i2c3-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */</div><div class='del'>-			AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */</div><div class='add'>+			AM62X_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */</div><div class='add'>+			AM62X_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -786,8 +792,8 @@</div><div class='ctx'> 	/* Verdin I2C_3_HDMI */</div><div class='ctx'> 	pinctrl_mcu_i2c0: mcu-i2c0-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /*  (A8) MCU_I2C0_SCL */ /* SODIMM 59 */</div><div class='del'>-			AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */</div><div class='add'>+			AM62X_MCU_IOPAD(0x0044, PIN_INPUT_PULLUP, 0) /*  (A8) MCU_I2C0_SCL */ /* SODIMM 59 */</div><div class='add'>+			AM62X_MCU_IOPAD(0x0048, PIN_INPUT_PULLUP, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1131,6 +1137,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	tpm@2e {</div><div class='add'>+		compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";</div><div class='add'>+		reg = &lt;0x2e&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmic@30 {</div><div class='ctx'> 		compatible = "ti,tps65219";</div><div class='ctx'> 		reg = &lt;0x30&gt;;</div><div class='hunk'>@@ -1219,11 +1230,12 @@</div><div class='ctx'> 		reg = &lt;0x48&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	adc@49 {</div><div class='del'>-		compatible = "ti,ads1015";</div><div class='add'>+	verdin_som_adc: adc@49 {</div><div class='add'>+		compatible = "ti,tla2024";</div><div class='ctx'> 		reg = &lt;0x49&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		/* Verdin PMIC_I2C (ADC_4 - ADC_3) */</div><div class='ctx'> 		channel@0 {</div><div class='hunk'>@@ -1310,13 +1322,6 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Verdin CAN_1 */</div><div class='ctx'> &amp;main_mcan0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -1500,3 +1505,5 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_wkup_uart0&gt;;</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am62-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi<br/>index e0afafd532a5..75aed3a88284 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi</a></div><div class='hunk'>@@ -8,9 +8,9 @@</div><div class='ctx'> #include &lt;dt-bindings/bus/ti-sysc.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;cbass_wakeup {</div><div class='del'>-	wkup_conf: syscon@43000000 {</div><div class='add'>+	wkup_conf: bus@43000000 {</div><div class='ctx'> 		bootph-all;</div><div class='del'>-		compatible = "syscon", "simple-mfd";</div><div class='add'>+		compatible = "simple-bus";</div><div class='ctx'> 		reg = &lt;0x00 0x43000000 0x00 0x20000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -22,6 +22,11 @@</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		opp_efuse_table: syscon@18 {</div><div class='add'>+			compatible = "ti,am62-opp-efuse-table", "syscon";</div><div class='add'>+			reg = &lt;0x18 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpsw_mac_syscon: ethernet-mac-syscon@200 {</div><div class='ctx'> 			compatible = "ti,am62p-cpsw-mac-efuse", "syscon";</div><div class='ctx'> 			reg = &lt;0x200 0x8&gt;;</div><div class='hunk'>@@ -101,6 +106,32 @@</div><div class='ctx'> 		status = "reserved";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wkup_r5fss0: r5fss@78000000 {</div><div class='add'>+		compatible = "ti,am62-r5fss";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x78000000 0x00 0x78000000 0x8000&gt;,</div><div class='add'>+			 &lt;0x78100000 0x00 0x78100000 0x8000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 119 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0: r5f@78000000 {</div><div class='add'>+			compatible = "ti,am62-r5f";</div><div class='add'>+			reg = &lt;0x78000000 0x00008000&gt;,</div><div class='add'>+			      &lt;0x78100000 0x00008000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			resets = &lt;&amp;k3_reset 121 1&gt;;</div><div class='add'>+			firmware-name = "am62-wkup-r5f0_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;121&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x01 0xff&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wkup_vtm0: temperature-sensor@b00000 {</div><div class='ctx'> 		compatible = "ti,j7200-vtm";</div><div class='ctx'> 		reg = &lt;0x00 0xb00000 0x00 0x400&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi<br/>index bfb55ca11323..59f6dff552ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62.dtsi</a></div><div class='hunk'>@@ -86,7 +86,9 @@</div><div class='ctx'> 			 /* Wakeup Domain Range */</div><div class='ctx'> 			 &lt;0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400&gt;, /* VTM */</div><div class='ctx'> 			 &lt;0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400&gt;,</div><div class='del'>-			 &lt;0x00 0x43000000 0x00 0x43000000 0x00 0x00020000&gt;;</div><div class='add'>+			 &lt;0x00 0x43000000 0x00 0x43000000 0x00 0x00020000&gt;,</div><div class='add'>+			 &lt;0x00 0x78000000 0x00 0x78000000 0x00 0x00008000&gt;, /* DM R5 ATCM*/</div><div class='add'>+			 &lt;0x00 0x78100000 0x00 0x78100000 0x00 0x00008000&gt;; /* DM R5 BTCM*/</div><div class='ctx'> </div><div class='ctx'> 		cbass_mcu: bus@4000000 {</div><div class='ctx'> 			bootph-all;</div><div class='hunk'>@@ -103,7 +105,9 @@</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='ctx'> 			ranges = &lt;0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400&gt;, /* VTM */</div><div class='ctx'> 				 &lt;0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400&gt;, /* Peripheral Window */</div><div class='del'>-				 &lt;0x00 0x43000000 0x00 0x43000000 0x00 0x00020000&gt;;</div><div class='add'>+				 &lt;0x00 0x43000000 0x00 0x43000000 0x00 0x00020000&gt;,</div><div class='add'>+				 &lt;0x00 0x78000000 0x00 0x78000000 0x00 0x00008000&gt;, /* DM R5 ATCM*/</div><div class='add'>+				 &lt;0x00 0x78100000 0x00 0x78100000 0x00 0x00008000&gt;; /* DM R5 BTCM*/</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso<br/>index 3b4643b7d19c..000305c9e366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso</a></div><div class='hunk'>@@ -15,6 +15,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p5v: regulator-1p5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P5V";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio0 {</div><div class='hunk'>@@ -39,6 +66,10 @@</div><div class='ctx'> 		clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='ctx'> 		clock-names = "xclk";</div><div class='ctx'> </div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1p5v&gt;;</div><div class='add'>+</div><div class='ctx'> 		port {</div><div class='ctx'> 			csi2_cam0: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;csi2rx0_in_sensor&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso<br/>index 81a2763d43c6..8a7a9ece08af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso</a></div><div class='hunk'>@@ -15,6 +15,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3P3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio0 {</div><div class='hunk'>@@ -39,6 +66,10 @@</div><div class='ctx'> 		clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='ctx'> 		clock-names = "xclk";</div><div class='ctx'> </div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='ctx'> 		port {</div><div class='ctx'> 			csi2_cam0: endpoint {</div><div class='ctx'> 				remote-endpoint = &lt;&amp;csi2rx0_in_sensor&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts<br/>index a1cd47d7f5e3..7028d9835c4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts</a></div><div class='hunk'>@@ -65,6 +65,14 @@</div><div class='ctx'> 			pmsg-size = &lt;0x8000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		/* global cma region */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x00 0x8000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -75,7 +83,7 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9db00000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -419,6 +427,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	mikrobus_pwm_pins_default: mikrobus-pwm-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01a4, PIN_INPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_uart0_pins_default: main-uart0-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='hunk'>@@ -604,7 +618,7 @@</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;main_gpio1 5 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;25&gt;;</div><div class='del'>-		reset-deassert-us = &lt;60000&gt;; /* T2 */</div><div class='add'>+		reset-deassert-us = &lt;35&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -818,9 +832,9 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='ctx'> 	bootph-all;</div><div class='add'>+	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;emmc_pins_default&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -926,3 +940,9 @@</div><div class='ctx'> 	       0 0 0 0</div><div class='ctx'> 	&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ecap2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mikrobus_pwm_pins_default&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso<br/>deleted file mode 100644<br/>index 6ec6d57ec49c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-1-4-ghz-opp.dtso</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2024 PHYTEC America LLC</div><div class='del'>- * Author: Nathan Morrisson &lt;nmorrisson@phytec.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/dts-v1/;</div><div class='del'>-/plugin/;</div><div class='del'>-</div><div class='del'>-&amp;vdd_core {</div><div class='del'>-	regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-	regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;a53_opp_table {</div><div class='del'>-	opp-1400000000 {</div><div class='del'>-		opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='del'>-		opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi<br/>new file mode 100644<br/>index 000000000000..fe0b98e1d105<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,296 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Common dtsi for AM625 SK and derivatives</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "k3-am62x-sk-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	opp-table {</div><div class='add'>+		/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmain_pd: regulator-0 {</div><div class='add'>+		/* TPS65988 PD CONTROLLER OUTPUT */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmain_pd";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0: regulator-1 {</div><div class='add'>+		/* Output of LM34936 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sys: regulator-2 {</div><div class='add'>+		/* output of LM61460-Q1 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_mmc1: regulator-3 {</div><div class='add'>+		/* TPS22918DBVR */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_mmc1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv: regulator-4 {</div><div class='add'>+		/* Output of TLV71033 */</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "tlv71033";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-5 {</div><div class='add'>+		/* output of TPS6282518DMQ */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */</div><div class='add'>+			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */</div><div class='add'>+			AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */</div><div class='add'>+			AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */</div><div class='add'>+			AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */</div><div class='add'>+			AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */</div><div class='add'>+			AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */</div><div class='add'>+			AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */</div><div class='add'>+			AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */</div><div class='add'>+			AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_rgmii2_pins_default: main-rgmii2-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */</div><div class='add'>+			AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */</div><div class='add'>+			AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */</div><div class='add'>+			AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */</div><div class='add'>+			AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */</div><div class='add'>+			AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */</div><div class='add'>+			AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */</div><div class='add'>+			AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */</div><div class='add'>+			AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */</div><div class='add'>+			AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */</div><div class='add'>+			AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */</div><div class='add'>+			AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi0_pins_default: ospi0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */</div><div class='add'>+			AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */</div><div class='add'>+			AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */</div><div class='add'>+			AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */</div><div class='add'>+			AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */</div><div class='add'>+			AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */</div><div class='add'>+			AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */</div><div class='add'>+			AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */</div><div class='add'>+			AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */</div><div class='add'>+			AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='add'>+			AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	exp1: gpio@22 {</div><div class='add'>+		compatible = "ti,tca6424";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;main_gpio1_ioexp_intr_pins_default&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio1&gt;;</div><div class='add'>+		interrupts = &lt;23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",</div><div class='add'>+				   "PRU_DETECT", "MMC1_SD_EN",</div><div class='add'>+				   "VPP_LDO_EN", "EXP_PS_3V3_En",</div><div class='add'>+				   "EXP_PS_5V0_En", "EXP_HAT_DETECT",</div><div class='add'>+				   "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",</div><div class='add'>+				   "UART1_FET_BUF_EN", "WL_LT_EN",</div><div class='add'>+				   "GPIO_HDMI_RSTn", "CSI_GPIO1",</div><div class='add'>+				   "CSI_GPIO2", "PRU_3V3_EN",</div><div class='add'>+				   "HDMI_INTn", "PD_I2C_IRQ",</div><div class='add'>+				   "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",</div><div class='add'>+				   "MCASP1_FET_SEL", "UART1_FET_SEL",</div><div class='add'>+				   "TSINT#", "IO_EXP_TEST_LED";</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;, &lt;&amp;main_rgmii2_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	/* PCB provides an internal delay of 2ns */</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	cpsw3g_phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fss {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "ospi.tiboot3";</div><div class='add'>+				reg = &lt;0x0 0x80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@80000 {</div><div class='add'>+				label = "ospi.tispl";</div><div class='add'>+				reg = &lt;0x80000 0x200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@280000 {</div><div class='add'>+				label = "ospi.u-boot";</div><div class='add'>+				reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@680000 {</div><div class='add'>+				label = "ospi.env";</div><div class='add'>+				reg = &lt;0x680000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@6c0000 {</div><div class='add'>+				label = "ospi.env.backup";</div><div class='add'>+				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "ospi.rootfs";</div><div class='add'>+				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@3fc0000 {</div><div class='add'>+				bootph-pre-ram;</div><div class='add'>+				label = "ospi.phypattern";</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts<br/>index ae81ebb39d02..52954c77df80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-sk.dts</a></div><div class='hunk'>@@ -7,293 +7,17 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "k3-am62x-sk-common.dtsi"</div><div class='add'>+#include "k3-am625.dtsi"</div><div class='add'>+#include "k3-am625-sk-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ti,am625-sk", "ti,am625";</div><div class='ctx'> 	model = "Texas Instruments AM625 SK";</div><div class='ctx'> </div><div class='del'>-	opp-table {</div><div class='del'>-		/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */</div><div class='del'>-		opp-1400000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='del'>-			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='del'>-			clock-latency-ns = &lt;6000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='ctx'> 		/* 2G RAM */</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vmain_pd: regulator-0 {</div><div class='del'>-		/* TPS65988 PD CONTROLLER OUTPUT */</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vmain_pd";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_5v0: regulator-1 {</div><div class='del'>-		/* Output of LM34936 */</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_5v0";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_3v3_sys: regulator-2 {</div><div class='del'>-		/* output of LM61460-Q1 */</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_3v3_sys";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_mmc1: regulator-3 {</div><div class='del'>-		/* TPS22918DBVR */</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_mmc1";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='del'>-		gpio = &lt;&amp;exp1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_sd_dv: regulator-4 {</div><div class='del'>-		/* Output of TLV71033 */</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='del'>-		regulator-name = "tlv71033";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='del'>-		gpios = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		states = &lt;1800000 0x0&gt;,</div><div class='del'>-			 &lt;3300000 0x1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vcc_1v8: regulator-5 {</div><div class='del'>-		/* output of TPS6282518DMQ */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vcc_1v8";</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_pmx0 {</div><div class='del'>-	main_rgmii2_pins_default: main-rgmii2-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */</div><div class='del'>-			AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */</div><div class='del'>-			AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */</div><div class='del'>-			AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */</div><div class='del'>-			AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */</div><div class='del'>-			AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */</div><div class='del'>-			AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */</div><div class='del'>-			AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */</div><div class='del'>-			AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */</div><div class='del'>-			AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */</div><div class='del'>-			AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */</div><div class='del'>-			AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ospi0_pins_default: ospi0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */</div><div class='del'>-			AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */</div><div class='del'>-			AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */</div><div class='del'>-			AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */</div><div class='del'>-			AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */</div><div class='del'>-			AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */</div><div class='del'>-			AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */</div><div class='del'>-			AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */</div><div class='del'>-			AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */</div><div class='del'>-			AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='del'>-			AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_gpio0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_gpio1 {</div><div class='del'>-	bootph-all;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_i2c1 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	exp1: gpio@22 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "ti,tca6424";</div><div class='del'>-		reg = &lt;0x22&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",</div><div class='del'>-				   "PRU_DETECT", "MMC1_SD_EN",</div><div class='del'>-				   "VPP_LDO_EN", "EXP_PS_3V3_En",</div><div class='del'>-				   "EXP_PS_5V0_En", "EXP_HAT_DETECT",</div><div class='del'>-				   "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",</div><div class='del'>-				   "UART1_FET_BUF_EN", "WL_LT_EN",</div><div class='del'>-				   "GPIO_HDMI_RSTn", "CSI_GPIO1",</div><div class='del'>-				   "CSI_GPIO2", "PRU_3V3_EN",</div><div class='del'>-				   "HDMI_INTn", "PD_I2C_IRQ",</div><div class='del'>-				   "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",</div><div class='del'>-				   "MCASP1_FET_SEL", "UART1_FET_SEL",</div><div class='del'>-				   "TSINT#", "IO_EXP_TEST_LED";</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;main_gpio1&gt;;</div><div class='del'>-		interrupts = &lt;23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;main_gpio1_ioexp_intr_pins_default&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;sdhci1 {</div><div class='del'>-	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpsw3g {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;, &lt;&amp;main_rgmii2_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpsw_port2 {</div><div class='del'>-	phy-mode = "rgmii-rxid";</div><div class='del'>-	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpsw3g_mdio {</div><div class='del'>-	cpsw3g_phy1: ethernet-phy@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='del'>-		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,min-output-impedance;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;fss {</div><div class='del'>-	bootph-all;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ospi0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;8&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;8&gt;;</div><div class='del'>-		spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-		cdns,tshsl-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tchsh-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tslch-ns = &lt;60&gt;;</div><div class='del'>-		cdns,read-delay = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		partitions {</div><div class='del'>-			bootph-all;</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			partition@0 {</div><div class='del'>-				label = "ospi.tiboot3";</div><div class='del'>-				reg = &lt;0x0 0x80000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@80000 {</div><div class='del'>-				label = "ospi.tispl";</div><div class='del'>-				reg = &lt;0x80000 0x200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@280000 {</div><div class='del'>-				label = "ospi.u-boot";</div><div class='del'>-				reg = &lt;0x280000 0x400000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@680000 {</div><div class='del'>-				label = "ospi.env";</div><div class='del'>-				reg = &lt;0x680000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@6c0000 {</div><div class='del'>-				label = "ospi.env.backup";</div><div class='del'>-				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@800000 {</div><div class='del'>-				label = "ospi.rootfs";</div><div class='del'>-				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@3fc0000 {</div><div class='del'>-				bootph-pre-ram;</div><div class='del'>-				label = "ospi.phypattern";</div><div class='del'>-				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-&amp;tlv320aic3106 {</div><div class='del'>-	DVDD-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts b/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..48798bf3da4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am625.dtsi"</div><div class='add'>+#include "k3-am62-verdin.dtsi"</div><div class='add'>+#include "k3-am62-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62 on Ivy Board";</div><div class='add'>+	compatible = "toradex,verdin-am62-nonwifi-ivy",</div><div class='add'>+		     "toradex,verdin-am62-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62",</div><div class='add'>+		     "ti,am625";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts b/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..d96d8a0ebd86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am625.dtsi"</div><div class='add'>+#include "k3-am62-verdin.dtsi"</div><div class='add'>+#include "k3-am62-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62 WB on Ivy Board";</div><div class='add'>+	compatible = "toradex,verdin-am62-wifi-ivy",</div><div class='add'>+		     "toradex,verdin-am62-wifi",</div><div class='add'>+		     "toradex,verdin-am62",</div><div class='add'>+		     "ti,am625";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi<br/>index c3d1db47dc9f..c249883a8a8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am625.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am625.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am625.dtsi</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'> 	a53_opp_table: opp-table {</div><div class='ctx'> 		compatible = "operating-points-v2-ti-cpu";</div><div class='ctx'> 		opp-shared;</div><div class='del'>-		syscon = &lt;&amp;wkup_conf&gt;;</div><div class='add'>+		syscon = &lt;&amp;opp_efuse_table&gt;;</div><div class='ctx'> </div><div class='ctx'> 		opp-200000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts b/arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts<br/>new file mode 100644<br/>index 000000000000..055e63a3fbb1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * AM6254atl SiP SK: https://www.ti.com/lit/df/sprr482b/sprr482b.zip</div><div class='add'>+ * Webpage: https://www.ti.com/tool/SK-AM62-SIP</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "k3-am6254atl.dtsi"</div><div class='add'>+#include "k3-am625-sk-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Texas Instruments AM6254atl SK";</div><div class='add'>+	compatible = "ti,am6254atl-sk", "ti,am6254atl", "ti,am625";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am6254atl.dtsi b/arch/arm64/boot/dts/ti/k3-am6254atl.dtsi<br/>new file mode 100644<br/>index 000000000000..976ad7dc1e71<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6254atl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am6254atl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * DTS for AM625 SiP SoC family in Quad core configuration and 512MiB RAM.</div><div class='add'>+ *</div><div class='add'>+ * Webpage: https://www.ti.com/product/AM625SIP</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "k3-am625.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Texas Instruments AM6254atl SiP";</div><div class='add'>+	compatible = "ti,am6254atl", "ti,am625";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 512MiB of integrated RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x20000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi<br/>index 16a578ae2b41..829f00adea6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-main.dtsi</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> 		compatible = "arm,gic-v3";</div><div class='ctx'> 		reg = &lt;0x00 0x01800000 0x00 0x10000&gt;,	/* GICD */</div><div class='ctx'> 		      &lt;0x00 0x01880000 0x00 0xc0000&gt;,	/* GICR */</div><div class='del'>-		      &lt;0x00 0x01880000 0x00 0xc0000&gt;,   /* GICR */</div><div class='ctx'> 		      &lt;0x01 0x00000000 0x00 0x2000&gt;,    /* GICC */</div><div class='ctx'> 		      &lt;0x01 0x00010000 0x00 0x1000&gt;,    /* GICH */</div><div class='ctx'> 		      &lt;0x01 0x00020000 0x00 0x2000&gt;;    /* GICV */</div><div class='hunk'>@@ -52,6 +51,7 @@</div><div class='ctx'> 			compatible = "ti,am654-phy-gmii-sel";</div><div class='ctx'> 			reg = &lt;0x4044 0x8&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		epwm_tbclk: clock-controller@4130 {</div><div class='hunk'>@@ -97,6 +97,7 @@</div><div class='ctx'> 			#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-names = "rx_012";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		inta_main_dmss: interrupt-controller@48000000 {</div><div class='hunk'>@@ -132,6 +133,7 @@</div><div class='ctx'> 			ti,sci-rm-range-bchan = &lt;0x20&gt;; /* BLOCK_COPY_CHAN */</div><div class='ctx'> 			ti,sci-rm-range-rchan = &lt;0x21&gt;; /* SPLIT_TR_RX_CHAN */</div><div class='ctx'> 			ti,sci-rm-range-tchan = &lt;0x22&gt;; /* SPLIT_TR_TX_CHAN */</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_pktdma: dma-controller@485c0000 {</div><div class='hunk'>@@ -148,6 +150,8 @@</div><div class='ctx'> 				    "ring", "tchan", "rchan", "rflow";</div><div class='ctx'> 			msi-parent = &lt;&amp;inta_main_dmss&gt;;</div><div class='ctx'> 			#dma-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='add'>+</div><div class='ctx'> 			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='ctx'> 			ti,sci-dev-id = &lt;30&gt;;</div><div class='ctx'> 			ti,sci-rm-range-tchan = &lt;0x23&gt;, /* UNMAPPED_TX_CHAN */</div><div class='hunk'>@@ -221,16 +225,19 @@</div><div class='ctx'> 		k3_pds: power-controller {</div><div class='ctx'> 			compatible = "ti,sci-pm-domain";</div><div class='ctx'> 			#power-domain-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_clks: clock-controller {</div><div class='ctx'> 			compatible = "ti,k2g-sci-clk";</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_reset: reset-controller {</div><div class='ctx'> 			compatible = "ti,sci-reset";</div><div class='ctx'> 			#reset-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -255,11 +262,12 @@</div><div class='ctx'> 		 * firmware on non-MPU processors</div><div class='ctx'> 		 */</div><div class='ctx'> 		status = "disabled";</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_pmx0: pinctrl@f4000 {</div><div class='ctx'> 		compatible = "pinctrl-single";</div><div class='del'>-		reg = &lt;0x00 0xf4000 0x00 0x2ac&gt;;</div><div class='add'>+		reg = &lt;0x00 0xf4000 0x00 0x25c&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='hunk'>@@ -283,6 +291,7 @@</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 36 3&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 36 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		ti,timer-pwm;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_timer1: timer@2410000 {</div><div class='hunk'>@@ -576,8 +585,6 @@</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 57 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 57 5&gt;, &lt;&amp;k3_clks 57 6&gt;;</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 57 6&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 57 8&gt;;</div><div class='ctx'> 		bus-width = &lt;8&gt;;</div><div class='ctx'> 		mmc-hs200-1_8v;</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='hunk'>@@ -654,6 +661,7 @@</div><div class='ctx'> 			interrupt-names = "host", "peripheral";</div><div class='ctx'> 			maximum-speed = "high-speed";</div><div class='ctx'> 			dr_mode = "otg";</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			snps,usb2-gadget-lpm-disable;</div><div class='ctx'> 			snps,usb2-lpm-disable;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -748,6 +756,7 @@</div><div class='ctx'> 				phys = &lt;&amp;phy_gmii_sel 1&gt;;</div><div class='ctx'> 				mac-address = [00 00 00 00 00 00];</div><div class='ctx'> 				ti,syscon-efuse = &lt;&amp;cpsw_mac_syscon 0x0&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cpsw_port2: port@2 {</div><div class='hunk'>@@ -767,6 +776,7 @@</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 13 0&gt;;</div><div class='ctx'> 			clock-names = "fck";</div><div class='ctx'> 			bus_freq = &lt;1000000&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpts@3d000 {</div><div class='hunk'>@@ -794,6 +804,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster1: mailbox@29010000 {</div><div class='hunk'>@@ -803,6 +814,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster2: mailbox@29020000 {</div><div class='hunk'>@@ -812,6 +824,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster3: mailbox@29030000 {</div><div class='hunk'>@@ -821,6 +834,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mcan0: can@20701000 {</div><div class='hunk'>@@ -943,6 +957,33 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eqep0: counter@23200000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23200000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 59 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 59 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep1: counter@23210000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23210000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 60 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 60 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep2: counter@23220000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23220000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 118 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mcasp0: audio-controller@2b00000 {</div><div class='ctx'> 		compatible = "ti,am33xx-mcasp-audio";</div><div class='ctx'> 		reg = &lt;0x00 0x02b00000 0x00 0x2000&gt;,</div><div class='hunk'>@@ -1017,6 +1058,9 @@</div><div class='ctx'> 		cdns_csi2rx0: csi-bridge@30101000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x00 0x30101000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 3&gt;, &lt;&amp;k3_clks 182 0&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 4&gt;, &lt;&amp;k3_clks 182 4&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -1097,6 +1141,18 @@</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 204 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	c7x_0: dsp@7e000000 {</div><div class='add'>+		compatible = "ti,am62a-c7xv-dsp";</div><div class='add'>+		reg = &lt;0x00 0x7e000000 0x00 0x00100000&gt;;</div><div class='add'>+		reg-names = "l2sram";</div><div class='add'>+		resets = &lt;&amp;k3_reset 208 1&gt;;</div><div class='add'>+		firmware-name = "am62a-c71_0-fw";</div><div class='add'>+		ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;208&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x04 0xff&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	e5010: jpeg-encoder@fd20000 {</div><div class='ctx'> 		compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";</div><div class='ctx'> 		reg = &lt;0x00 0xfd20000 0x00 0x100&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi<br/>index 0469c766b769..d22caa7c346b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='del'>-		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_esm: esm@4100000 {</div><div class='hunk'>@@ -175,4 +174,30 @@</div><div class='ctx'> 		bosch,mram-cfg = &lt;0x0 128 64 64 64 64 32 32&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0: r5fss@79000000 {</div><div class='add'>+		compatible = "ti,am62-r5fss";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x79000000 0x00 0x79000000 0x8000&gt;,</div><div class='add'>+			 &lt;0x79020000 0x00 0x79020000 0x8000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 7 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0: r5f@79000000 {</div><div class='add'>+			compatible = "ti,am62-r5f";</div><div class='add'>+			reg = &lt;0x79000000 0x00008000&gt;,</div><div class='add'>+			      &lt;0x79020000 0x00008000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			resets = &lt;&amp;k3_reset 9 1&gt;;</div><div class='add'>+			firmware-name = "am62a-mcu-r5f0_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;0&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;0&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;9&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x03 0xff&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi<br/>index a5aceaa39670..b3d012a5a26a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi</a></div><div class='hunk'>@@ -42,9 +42,10 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		/* 2G RAM */</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -58,6 +59,18 @@</div><div class='ctx'> 			linux,cma-default;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='hunk'>@@ -69,12 +82,6 @@</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0x9c900000 0x00 0x01e00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc_5v0_som: regulator-vcc-5v0-som {</div><div class='hunk'>@@ -99,6 +106,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */</div><div class='ctx'> 			AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mdio1_pins_default: main-mdio1-default-pins {</div><div class='hunk'>@@ -106,6 +114,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */</div><div class='ctx'> 			AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='hunk'>@@ -121,6 +130,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */</div><div class='ctx'> 			AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_rgmii1_pins_default: main-rgmii1-default-pins {</div><div class='hunk'>@@ -138,6 +148,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */</div><div class='ctx'> 			AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ospi0_pins_default: ospi0-default-pins {</div><div class='hunk'>@@ -155,6 +166,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='ctx'> 			AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='hunk'>@@ -164,15 +176,25 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;a53_opp_table {</div><div class='add'>+	/* Requires VDD_CORE at 0v85 */</div><div class='add'>+	opp-1400000000 {</div><div class='add'>+		opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+		opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+		clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpsw3g {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw3g_mdio {</div><div class='hunk'>@@ -182,6 +204,7 @@</div><div class='ctx'> 	cpsw3g_phy1: ethernet-phy@1 {</div><div class='ctx'> 		compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='hunk'>@@ -196,6 +219,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	pmic@30 {</div><div class='hunk'>@@ -215,8 +239,8 @@</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		ti,power-button;</div><div class='ctx'> 		system-power-controller;</div><div class='add'>+		ti,power-button;</div><div class='ctx'> </div><div class='ctx'> 		regulators {</div><div class='ctx'> 			vdd_3v3: buck1 {</div><div class='hunk'>@@ -302,6 +326,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_pktdma {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ospi0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='hunk'>@@ -318,13 +346,16 @@</div><div class='ctx'> 		cdns,tchsh-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tslch-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,read-delay = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> 	non-removable;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am62a-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi<br/>index c7486fb2a5b4..3aa127157d24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi</a></div><div class='hunk'>@@ -12,12 +12,29 @@ thermal_zones: thermal-zones {</div><div class='ctx'> 		thermal-sensors = &lt;&amp;wkup_vtm0 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main0_alert: main0-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main0_crit: main0-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main0_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main1_thermal: main1-thermal {</div><div class='hunk'>@@ -26,25 +43,59 @@ thermal_zones: thermal-zones {</div><div class='ctx'> 		thermal-sensors = &lt;&amp;wkup_vtm0 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main1_alert: main1-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main1_crit: main1-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main1_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main2_thermal: main2-thermal {</div><div class='del'>-	       polling-delay-passive = &lt;250&gt;;	/* milliSeconds */</div><div class='del'>-	       polling-delay = &lt;500&gt;;		/* milliSeconds */</div><div class='del'>-	       thermal-sensors = &lt;&amp;wkup_vtm0 2&gt;;</div><div class='add'>+		polling-delay-passive = &lt;250&gt;;	/* milliSeconds */</div><div class='add'>+		polling-delay = &lt;500&gt;;		/* milliSeconds */</div><div class='add'>+		thermal-sensors = &lt;&amp;wkup_vtm0 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main2_alert: main2-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main2_crit: main2-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main2_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..950f4f37d477<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62A SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	c7x_0_dma_memory_region: memory@99800000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x99800000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c7x_0_memory_region: memory@99900000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x99900000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core0_dma_memory_region: memory@9b800000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9b800000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core0_memory_region: memory@9b900000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9b900000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_r5_0: mbox-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_c7x_0: mbox-c7x-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0&gt;, &lt;&amp;mbox_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2&gt;, &lt;&amp;mbox_mcu_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c7x_0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1&gt;, &lt;&amp;mbox_c7x_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c7x_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c7x_0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_rti4 is used by C7x DSP */</div><div class='add'>+&amp;main_rti4 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_timer2 is used by C7x DSP */</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi<br/>index f5ac101a04df..23877dadc98d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi</a></div><div class='hunk'>@@ -2,9 +2,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/bus/ti-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> &amp;cbass_wakeup {</div><div class='ctx'> 	wkup_conf: bus@43000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='hunk'>@@ -15,6 +17,12 @@</div><div class='ctx'> 		chipid: chipid@14 {</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='add'>+			bootph-all;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp_efuse_table: syscon@18 {</div><div class='add'>+			compatible = "ti,am62-opp-efuse-table", "syscon";</div><div class='add'>+			reg = &lt;0x18 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpsw_mac_syscon: ethernet-mac-syscon@200 {</div><div class='hunk'>@@ -33,14 +41,35 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wkup_uart0: serial@2b300000 {</div><div class='del'>-		compatible = "ti,am64-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x2b300000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	target-module@2b300050 {</div><div class='add'>+		compatible = "ti,sysc-omap2", "ti,sysc";</div><div class='add'>+		reg = &lt;0 0x2b300050 0 0x4&gt;,</div><div class='add'>+		      &lt;0 0x2b300054 0 0x4&gt;,</div><div class='add'>+		      &lt;0 0x2b300058 0 0x4&gt;;</div><div class='add'>+		reg-names = "rev", "sysc", "syss";</div><div class='add'>+		ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='add'>+				 SYSC_OMAP2_SOFTRESET |</div><div class='add'>+				 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+		ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_NO&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_SMART&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_SMART_WKUP&gt;;</div><div class='add'>+		ti,syss-mask = &lt;1&gt;;</div><div class='add'>+		ti,no-reset-on-init;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 114 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		status = "disabled";</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0 0x2b300000 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+		wkup_uart0: serial@0 {</div><div class='add'>+			compatible = "ti,am64-uart", "ti,am654-uart";</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+			bootph-pre-ram;</div><div class='add'>+	       };</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0: i2c@2b200000 {</div><div class='hunk'>@@ -76,6 +105,32 @@</div><div class='ctx'> 		status = "reserved";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	wkup_r5fss0: r5fss@78000000 {</div><div class='add'>+		compatible = "ti,am62-r5fss";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x78000000 0x00 0x78000000 0x8000&gt;,</div><div class='add'>+			 &lt;0x78100000 0x00 0x78100000 0x8000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 119 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0: r5f@78000000 {</div><div class='add'>+			compatible = "ti,am62-r5f";</div><div class='add'>+			reg = &lt;0x78000000 0x00008000&gt;,</div><div class='add'>+			      &lt;0x78100000 0x00008000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			resets = &lt;&amp;k3_reset 121 1&gt;;</div><div class='add'>+			firmware-name = "am62a-wkup-r5f0_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;121&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x01 0xff&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wkup_vtm0: temperature-sensor@b00000 {</div><div class='ctx'> 		compatible = "ti,j7200-vtm";</div><div class='ctx'> 		reg = &lt;0x00 0xb00000 0x00 0x400&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts<br/>index 3b93409b23e7..77e5fef618ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts</a></div><div class='hunk'>@@ -16,3 +16,7 @@</div><div class='ctx'> 		     "phytec,am62a-phycore-som", "ti,am62a7";</div><div class='ctx'> 	model = "PHYTEC phyBOARD-Lyra AM62A7";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g_phy3 {</div><div class='add'>+	ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_50_NS&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts<br/>index 67faf46d7a35..af591fe6ae4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a7-sk.dts</a></div><div class='hunk'>@@ -18,10 +18,13 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;mcu_uart0;</div><div class='ctx'> 		serial2 = &amp;main_uart0;</div><div class='ctx'> 		serial3 = &amp;main_uart1;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='ctx'> 		mmc1 = &amp;sdhci1;</div><div class='add'>+		rtc0 = &amp;wkup_rtc0;</div><div class='add'>+		rtc1 = &amp;tps659312;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='hunk'>@@ -33,9 +36,10 @@</div><div class='ctx'> 		/* 4G RAM */</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='ctx'> 		      &lt;0x00000008 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -49,6 +53,18 @@</div><div class='ctx'> 			linux,cma-default;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='hunk'>@@ -60,11 +76,14 @@</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0x9c900000 0x00 0x01e00000&gt;;</div><div class='del'>-			no-map;</div><div class='add'>+	opp-table {</div><div class='add'>+		/* Requires VDD_CORE at 0v85 */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -109,6 +128,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		gpio = &lt;&amp;exp1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc_3v3_sys: regulator-4 {</div><div class='hunk'>@@ -255,12 +275,13 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */</div><div class='ctx'> 			AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */</div><div class='del'>-			AM62AX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (E17) I2C1_SDA.UART1_TXD */</div><div class='add'>+			AM62AX_IOPAD(0x01ac, PIN_INPUT, 2) /* (B21) MCASP0_AFSR.UART1_RXD */</div><div class='add'>+			AM62AX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A21) MCASP0_ACLKR.UART1_TXD */</div><div class='ctx'> 			AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */</div><div class='ctx'> 			AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */</div><div class='ctx'> 		&gt;;</div><div class='hunk'>@@ -278,6 +299,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */</div><div class='ctx'> 			AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='hunk'>@@ -301,6 +323,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */</div><div class='ctx'> 			AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='hunk'>@@ -313,6 +336,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */</div><div class='ctx'> 			AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usr_led_pins_default: usr-led-default-pins {</div><div class='hunk'>@@ -332,6 +356,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */</div><div class='ctx'> 			AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_rgmii1_pins_default: main-rgmii1-default-pins {</div><div class='hunk'>@@ -349,6 +374,7 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */</div><div class='ctx'> 			AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mcasp1_pins_default: main-mcasp1-default-pins {</div><div class='hunk'>@@ -371,6 +397,25 @@</div><div class='ctx'> 			AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	main_ecap0_pins_default: main-ecap0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62AX_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C16) SPI0_CS1.ECAP0_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ecap2_pins_default: main-ecap2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62AX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (A19) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_epwm1_pins_default: main-epwm1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62AX_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */</div><div class='add'>+			AM62AX_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (B20) MCASP0_AXR0.EHRPWM1_B */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_pmx0 {</div><div class='hunk'>@@ -510,6 +555,7 @@</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;main_gpio1_ioexp_intr_pins_default&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",</div><div class='ctx'> 				   "BT_EN_SOC", "MMC1_SD_EN",</div><div class='hunk'>@@ -602,7 +648,7 @@</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='del'>-	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci1 {</div><div class='hunk'>@@ -613,10 +659,12 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio1 {</div><div class='hunk'>@@ -631,6 +679,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Main UART1 is used for TIFS firmware logs */</div><div class='hunk'>@@ -646,6 +695,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	usb-role-switch;</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='hunk'>@@ -655,6 +705,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb0_phy_ctrl {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbss1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -671,10 +725,15 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;phy_gmii_sel {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port2 {</div><div class='hunk'>@@ -691,6 +750,7 @@</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,min-output-impedance;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -728,3 +788,68 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ecap0 {</div><div class='add'>+	/* P26 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecap2 {</div><div class='add'>+	/* P11 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwm1 {</div><div class='add'>+	/* P36/P33 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_epwm1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "spi-nand";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	ospi0_pins_default: ospi0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */</div><div class='add'>+			AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */</div><div class='add'>+			AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */</div><div class='add'>+			AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */</div><div class='add'>+			AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */</div><div class='add'>+			AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */</div><div class='add'>+			AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */</div><div class='add'>+			AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */</div><div class='add'>+			AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */</div><div class='add'>+			AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='add'>+			AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62a-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi<br/>index f86a23404e6d..b6e5eee99370 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62a7.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62a7.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62a7.dtsi</a></div><div class='hunk'>@@ -48,6 +48,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 135 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -62,6 +65,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 136 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -76,6 +82,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 137 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -90,6 +99,52 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 138 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	a53_opp_table: opp-table {</div><div class='add'>+		compatible = "operating-points-v2-ti-cpu";</div><div class='add'>+		opp-shared;</div><div class='add'>+		syscon = &lt;&amp;opp_efuse_table&gt;;</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1000000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0006&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1250000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1250000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts b/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts<br/>new file mode 100644<br/>index 000000000000..83af889e790a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62d2-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62d2-evm.dts</a></div><div class='hunk'>@@ -0,0 +1,649 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * AM62D2 EVM: https://www.ti.com/lit/zip/sprcal5</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "k3-am62d2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "ti,am62d2-evm", "ti,am62d2";</div><div class='add'>+	model = "Texas Instruments AM62D2 EVM";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;mcu_uart0;</div><div class='add'>+		serial2 = &amp;main_uart0;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='add'>+		mmc1 = &amp;sdhci1;</div><div class='add'>+		rtc0 = &amp;wkup_rtc0;</div><div class='add'>+		ethernet0 = &amp;cpsw_port1;</div><div class='add'>+		ethernet1 = &amp;cpsw_port2;</div><div class='add'>+		spi0 = &amp;ospi0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;main_uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* 4G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='add'>+		      &lt;0x00000008 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* global cma region */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x00 0x2000000&gt;;</div><div class='add'>+			alloc-ranges = &lt;0x00 0xc0000000 0x00 0x2000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_tfa_ddr: tfa@80000000 {</div><div class='add'>+			reg = &lt;0x00 0x80000000 0x00 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+			bootph-pre-ram;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;; /* for OP-TEE */</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtos_ipc_memory_region: memory@a0000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0000000 0x00 0x01000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table {</div><div class='add'>+		/* Requires VDD_CORE at 0v85 */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vout_pd: regulator-0 {</div><div class='add'>+		/* TPS65988 PD CONTROLLER OUTPUT */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vout_pd";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmain_pd: regulator-1 {</div><div class='add'>+		/* Output of TPS22811 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vmain_pd";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vout_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0: regulator-2 {</div><div class='add'>+		/* Output of TPS630702RNMR */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_main: regulator-3 {</div><div class='add'>+		/* output of LM5141-Q1 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_main";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_mmc1: regulator-4 {</div><div class='add'>+		/* TPS22918DBVR */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_mmc1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;exp1 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sys: regulator-5 {</div><div class='add'>+		/* output of TPS222965DSGT */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_main&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddshv_sdio: regulator-6 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "vddshv_sdio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vddshv_sdio_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpios = &lt;&amp;main_gpio1 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;usr_led_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+		led-0 {</div><div class='add'>+			label = "am62d-evm:green:heartbeat";</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			function = LED_FUNCTION_HEARTBEAT;</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_pmx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */</div><div class='add'>+			AM62DX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */</div><div class='add'>+			AM62DX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */</div><div class='add'>+			AM62DX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* WKUP UART0 is used for DM firmware logs */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_uart0_pins_default: main-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x01c8, PIN_INPUT, 0) /* (E14) UART0_RXD */</div><div class='add'>+			AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */</div><div class='add'>+			AM62DX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c1_pins_default: main-i2c1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C17) I2C1_SCL */</div><div class='add'>+			AM62DX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (E17) I2C1_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (M22) GPMC0_CSn2.I2C2_SCL */</div><div class='add'>+			AM62DX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (M20) GPMC0_CSn3.I2C2_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */</div><div class='add'>+			AM62DX_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB7) MMC0_CLK */</div><div class='add'>+			AM62DX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */</div><div class='add'>+			AM62DX_IOPAD(0x0210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */</div><div class='add'>+			AM62DX_IOPAD(0x020c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */</div><div class='add'>+			AM62DX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */</div><div class='add'>+			AM62DX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */</div><div class='add'>+			AM62DX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */</div><div class='add'>+			AM62DX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */</div><div class='add'>+			AM62DX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x023c, PIN_INPUT, 0) /* (C21) MMC1_CMD */</div><div class='add'>+			AM62DX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (E22) MMC1_CLK */</div><div class='add'>+			AM62DX_IOPAD(0x0230, PIN_INPUT, 0) /* (B22) MMC1_DAT0 */</div><div class='add'>+			AM62DX_IOPAD(0x022c, PIN_INPUT, 0) /* (D21) MMC1_DAT1 */</div><div class='add'>+			AM62DX_IOPAD(0x0228, PIN_INPUT, 0) /* (C22) MMC1_DAT2 */</div><div class='add'>+			AM62DX_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */</div><div class='add'>+			AM62DX_IOPAD(0x0240, PIN_INPUT, 0) /* (E18) MMC1_SDCD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mdio0_pins_default: main-mdio0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */</div><div class='add'>+			AM62DX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_rgmii1_pins_default: main-rgmii1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */</div><div class='add'>+			AM62DX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */</div><div class='add'>+			AM62DX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */</div><div class='add'>+			AM62DX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */</div><div class='add'>+			AM62DX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */</div><div class='add'>+			AM62DX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */</div><div class='add'>+			AM62DX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */</div><div class='add'>+			AM62DX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */</div><div class='add'>+			AM62DX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */</div><div class='add'>+			AM62DX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */</div><div class='add'>+			AM62DX_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */</div><div class='add'>+			AM62DX_IOPAD(0x012c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_rgmii2_pins_default: main-rgmii2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */</div><div class='add'>+			AM62DX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */</div><div class='add'>+			AM62DX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */</div><div class='add'>+			AM62DX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */</div><div class='add'>+			AM62DX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */</div><div class='add'>+			AM62DX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */</div><div class='add'>+			AM62DX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */</div><div class='add'>+			AM62DX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */</div><div class='add'>+			AM62DX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */</div><div class='add'>+			AM62DX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */</div><div class='add'>+			AM62DX_IOPAD(0x0168, PIN_OUTPUT, 0) /* (AB19) RGMII2_TXC */</div><div class='add'>+			AM62DX_IOPAD(0x0164, PIN_OUTPUT, 0) /* (Y19) RGMII2_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vddshv_sdio_pins_default: vddshv-sdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usr_led_pins_default: usr-led-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x0244, PIN_INPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_usb1_pins_default: main-usb1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (D19) USB1_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ospi0_pins_default: ospi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62DX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */</div><div class='add'>+			AM62DX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */</div><div class='add'>+			AM62DX_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G19) OSPI0_CSn1 */</div><div class='add'>+			AM62DX_IOPAD(0x0034, PIN_OUTPUT, 0) /* (K20) OSPI0_CSn2 */</div><div class='add'>+			AM62DX_IOPAD(0x0038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */</div><div class='add'>+			AM62DX_IOPAD(0x000c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */</div><div class='add'>+			AM62DX_IOPAD(0x0010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */</div><div class='add'>+			AM62DX_IOPAD(0x0014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */</div><div class='add'>+			AM62DX_IOPAD(0x0018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */</div><div class='add'>+			AM62DX_IOPAD(0x001c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */</div><div class='add'>+			AM62DX_IOPAD(0x0020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */</div><div class='add'>+			AM62DX_IOPAD(0x0024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */</div><div class='add'>+			AM62DX_IOPAD(0x0028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */</div><div class='add'>+			AM62DX_IOPAD(0x0008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	typec_pd0: usb-power-controller@3f {</div><div class='add'>+		compatible = "ti,tps6598x";</div><div class='add'>+		reg = &lt;0x3f&gt;;</div><div class='add'>+</div><div class='add'>+		connector {</div><div class='add'>+			compatible = "usb-c-connector";</div><div class='add'>+			label = "USB-C";</div><div class='add'>+			self-powered;</div><div class='add'>+			data-role = "dual";</div><div class='add'>+			power-role = "sink";</div><div class='add'>+			port {</div><div class='add'>+				usb_con_hs: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;usb0_hs_ep&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	exp1: gpio@22 {</div><div class='add'>+		compatible = "ti,tca6424";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio1&gt;;</div><div class='add'>+		interrupts = &lt;23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;main_gpio1_ioexp_intr_pins_default&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+</div><div class='add'>+		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",</div><div class='add'>+				  "","MMC1_SD_EN",</div><div class='add'>+				  "VPP_EN", "GPIO_DIX_RST",</div><div class='add'>+				  "IO_EXP_OPT_EN", "DIX_INT",</div><div class='add'>+				  "GPIO_eMMC_RSTn", "CPLD2_DONE",</div><div class='add'>+				  "CPLD2_INTN", "CPLD1_DONE",</div><div class='add'>+				  "CPLD1_INTN", "USB_TYPEA_OC_INDICATION",</div><div class='add'>+				  "PCM1_INT", "PCM2_INT",</div><div class='add'>+				  "GPIO_PCM1_RST", "TEST_GPIO2",</div><div class='add'>+				  "GPIO_PCM2_RST", "",</div><div class='add'>+				  "IO_MCAN0_STB", "IO_MCAN1_STB",</div><div class='add'>+				  "PD_I2C_IRQ", "IO_EXP_TEST_LED";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	exp2: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		gpio-line-names = "PCM6240_BUF_IO_EN", "",</div><div class='add'>+				  "CPLD1_JTAGENB", "CPLD1_PROGRAMN",</div><div class='add'>+				  "CPLD2_JTAGENB", "CPLD2_PROGRAMN",</div><div class='add'>+				  "", "",</div><div class='add'>+				  "", "CPLD1_TCK",</div><div class='add'>+				  "CPLD1_TMS", "CPLD1_TDI",</div><div class='add'>+				  "CPLD1_TDO", "CPLD2_TCK",</div><div class='add'>+				  "CPLD2_TMS", "CPLD2_TDI",</div><div class='add'>+				  "CPLD2_TDO", "ADDR1_IO_EXP",</div><div class='add'>+				  "SoC_I2C0_SCL", "SoC_I2C0_SDA";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c1_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c2_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	/* eMMC */</div><div class='add'>+	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	/* SD/MMC */</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vddshv_sdio&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio_intr {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb0_hs_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_usb1_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_rgmii1_pins_default&gt;,</div><div class='add'>+		    &lt;&amp;main_rgmii2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cpts@3d000 {</div><div class='add'>+		/* MAP HW3_TS_PUSH to GENF1 */</div><div class='add'>+		ti,pps = &lt;2 1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mdio0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cpsw3g_phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpsw3g_phy1: ethernet-phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0{</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "ospi.tiboot3";</div><div class='add'>+				reg = &lt;0x0 0x80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@80000 {</div><div class='add'>+				label = "ospi.tispl";</div><div class='add'>+				reg = &lt;0x80000 0x200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@280000 {</div><div class='add'>+				label = "ospi.u-boot";</div><div class='add'>+				reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@680000 {</div><div class='add'>+				label = "ospi.env";</div><div class='add'>+				reg = &lt;0x680000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@6c0000 {</div><div class='add'>+				label = "ospi.env.backup";</div><div class='add'>+				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "ospi.rootfs";</div><div class='add'>+				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@3fc0000 {</div><div class='add'>+				label = "ospi.phypattern";</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	bootph-pre-ram;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	firmware-name = "am62d-mcu-r5f0_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c7x_0 {</div><div class='add'>+	firmware-name = "am62d-c71_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62a-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62d2.dtsi b/arch/arm64/boot/dts/ti/k3-am62d2.dtsi<br/>new file mode 100644<br/>index 000000000000..c7d8ab43c72f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62d2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62d2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for AM62D2 SoC family in Quad core configuration</div><div class='add'>+ *</div><div class='add'>+ * TRM: https://www.ti.com/lit/pdf/sprujd4</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62a7.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Texas Instruments K3 AM62D SoC";</div><div class='add'>+	compatible = "ti,am62d2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;vpu;   /* Video Codec is disabled in AM62D2 SoC */</div><div class='add'>+/delete-node/ &amp;e5010; /* JPEG Encoder is disabled in AM62D2 SoC */</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi<br/>index 9b6f51379108..0c05bcf1d776 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi</a></div><div class='hunk'>@@ -227,9 +227,18 @@</div><div class='ctx'> 		reg = &lt;0x00 0x40900000 0x00 0x1200&gt;;</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x40900000 0x00 0x40900000 0x00 0x30000&gt;;</div><div class='add'>+</div><div class='ctx'> 		dmas = &lt;&amp;main_pktdma 0xf501 0&gt;, &lt;&amp;main_pktdma 0x7506 0&gt;,</div><div class='ctx'> 		       &lt;&amp;main_pktdma 0x7507 0&gt;;</div><div class='ctx'> 		dma-names = "tx", "rx1", "rx2";</div><div class='add'>+</div><div class='add'>+		rng: rng@40910000 {</div><div class='add'>+			compatible = "inside-secure,safexcel-eip76";</div><div class='add'>+			reg = &lt;0x00 0x40910000 0x0 0x7d&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "reserved";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	secure_proxy_sa3: mailbox@43600000 {</div><div class='hunk'>@@ -250,7 +259,7 @@</div><div class='ctx'> </div><div class='ctx'> 	main_pmx0: pinctrl@f4000 {</div><div class='ctx'> 		compatible = "pinctrl-single";</div><div class='del'>-		reg = &lt;0x00 0xf4000 0x00 0x2ac&gt;;</div><div class='add'>+		reg = &lt;0x00 0xf4000 0x00 0x2b0&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='hunk'>@@ -564,20 +573,15 @@</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 57 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 57 1&gt;, &lt;&amp;k3_clks 57 2&gt;;</div><div class='ctx'> 		clock-names = "clk_ahb", "clk_xin";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 57 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 57 4&gt;;</div><div class='ctx'> 		bus-width = &lt;8&gt;;</div><div class='ctx'> 		mmc-ddr-1_8v;</div><div class='ctx'> 		mmc-hs200-1_8v;</div><div class='del'>-		mmc-hs400-1_8v;</div><div class='ctx'> 		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,strobe-sel = &lt;0x77&gt;;</div><div class='ctx'> 		ti,trm-icp = &lt;0x8&gt;;</div><div class='ctx'> 		ti,otap-del-sel-legacy = &lt;0x1&gt;;</div><div class='ctx'> 		ti,otap-del-sel-mmc-hs = &lt;0x1&gt;;</div><div class='ctx'> 		ti,otap-del-sel-ddr52 = &lt;0x6&gt;;</div><div class='ctx'> 		ti,otap-del-sel-hs200 = &lt;0x8&gt;;</div><div class='del'>-		ti,otap-del-sel-hs400 = &lt;0x5&gt;;</div><div class='ctx'> 		ti,itap-del-sel-legacy = &lt;0x10&gt;;</div><div class='ctx'> 		ti,itap-del-sel-mmc-hs = &lt;0xa&gt;;</div><div class='ctx'> 		ti,itap-del-sel-ddr52 = &lt;0x3&gt;;</div><div class='hunk'>@@ -651,6 +655,7 @@</div><div class='ctx'> 			interrupt-names = "host", "peripheral";</div><div class='ctx'> 			maximum-speed = "high-speed";</div><div class='ctx'> 			dr_mode = "otg";</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			snps,usb2-gadget-lpm-disable;</div><div class='ctx'> 			snps,usb2-lpm-disable;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -768,6 +773,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster1: mailbox@29010000 {</div><div class='hunk'>@@ -777,6 +783,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster2: mailbox@29020000 {</div><div class='hunk'>@@ -786,6 +793,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mailbox0_cluster3: mailbox@29030000 {</div><div class='hunk'>@@ -795,6 +803,7 @@</div><div class='ctx'> 		#mbox-cells = &lt;1&gt;;</div><div class='ctx'> 		ti,mbox-num-users = &lt;4&gt;;</div><div class='ctx'> 		ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ecap0: pwm@23100000 {</div><div class='hunk'>@@ -827,6 +836,33 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eqep0: counter@23200000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23200000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 59 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 59 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep1: counter@23210000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23210000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 60 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 60 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep2: counter@23220000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23220000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 118 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_mcan0: can@20701000 {</div><div class='ctx'> 		compatible = "bosch,m_can";</div><div class='ctx'> 		reg = &lt;0x00 0x20701000 0x00 0x200&gt;,</div><div class='hunk'>@@ -1006,6 +1042,9 @@</div><div class='ctx'> 		cdns_csi2rx0: csi-bridge@30101000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x00 0x30101000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 3&gt;, &lt;&amp;k3_clks 182 0&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 182 0&gt;, &lt;&amp;k3_clks 182 4&gt;, &lt;&amp;k3_clks 182 4&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi<br/>index b33aff0d65c9..5288c959f3c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi</a></div><div class='hunk'>@@ -12,15 +12,7 @@</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='del'>-		pinctrl-single,gpio-range =</div><div class='del'>-			&lt;&amp;mcu_pmx_range 0 21 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-			&lt;&amp;mcu_pmx_range 23 1 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-			&lt;&amp;mcu_pmx_range 32 2 PIN_GPIO_RANGE_IOPAD&gt;;</div><div class='ctx'> 		bootph-all;</div><div class='del'>-</div><div class='del'>-		mcu_pmx_range: gpio-range {</div><div class='del'>-			#pinctrl-single,gpio-range-cells = &lt;3&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_esm: esm@4100000 {</div><div class='hunk'>@@ -213,6 +205,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;0&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi<br/>index c7486fb2a5b4..138b9c395be4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi</a></div><div class='hunk'>@@ -12,12 +12,29 @@ thermal_zones: thermal-zones {</div><div class='ctx'> 		thermal-sensors = &lt;&amp;wkup_vtm0 0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main0_alert: main0-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main0_crit: main0-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main0_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main1_thermal: main1-thermal {</div><div class='hunk'>@@ -26,12 +43,29 @@ thermal_zones: thermal-zones {</div><div class='ctx'> 		thermal-sensors = &lt;&amp;wkup_vtm0 1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main1_alert: main1-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main1_crit: main1-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main1_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main2_thermal: main2-thermal {</div><div class='hunk'>@@ -40,11 +74,28 @@ thermal_zones: thermal-zones {</div><div class='ctx'> 	       thermal-sensors = &lt;&amp;wkup_vtm0 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		trips {</div><div class='add'>+			main2_alert: main2-alert {</div><div class='add'>+				temperature = &lt;115000&gt;;</div><div class='add'>+				hysteresis = &lt;2000&gt;;</div><div class='add'>+				type = "passive";</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			main2_crit: main2-crit {</div><div class='ctx'> 				temperature = &lt;125000&gt;;	/* milliCelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;	/* milliCelsius */</div><div class='ctx'> 				type = "critical";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		cooling-maps {</div><div class='add'>+			map0 {</div><div class='add'>+				trip = &lt;&amp;main2_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi<br/>index 315d0092e736..8612b45e665c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi</a></div><div class='hunk'>@@ -2,9 +2,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Device Tree file for the WAKEUP domain peripherals shared by AM62P and J722S</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ * Copyright (C) 2023-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/bus/ti-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> &amp;cbass_wakeup {</div><div class='ctx'> 	wkup_conf: bus@43000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='hunk'>@@ -20,6 +22,11 @@</div><div class='ctx'> 			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		opp_efuse_table: syscon@18 {</div><div class='add'>+			compatible = "ti,am62-opp-efuse-table", "syscon";</div><div class='add'>+			reg = &lt;0x18 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		cpsw_mac_syscon: ethernet-mac-syscon@200 {</div><div class='ctx'> 			compatible = "ti,am62p-cpsw-mac-efuse", "syscon";</div><div class='ctx'> 			reg = &lt;0x200 0x8&gt;;</div><div class='hunk'>@@ -36,14 +43,34 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	wkup_uart0: serial@2b300000 {</div><div class='del'>-		compatible = "ti,am64-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x2b300000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	target-module@2b300050 {</div><div class='add'>+		compatible = "ti,sysc-omap2", "ti,sysc";</div><div class='add'>+		reg = &lt;0 0x2b300050 0 0x4&gt;,</div><div class='add'>+		      &lt;0 0x2b300054 0 0x4&gt;,</div><div class='add'>+		      &lt;0 0x2b300058 0 0x4&gt;;</div><div class='add'>+		reg-names = "rev", "sysc", "syss";</div><div class='add'>+		ti,sysc-mask = &lt;(SYSC_OMAP2_ENAWAKEUP |</div><div class='add'>+				 SYSC_OMAP2_SOFTRESET |</div><div class='add'>+				 SYSC_OMAP2_AUTOIDLE)&gt;;</div><div class='add'>+		ti,sysc-sidle = &lt;SYSC_IDLE_FORCE&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_NO&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_SMART&gt;,</div><div class='add'>+				&lt;SYSC_IDLE_SMART_WKUP&gt;;</div><div class='add'>+		ti,syss-mask = &lt;1&gt;;</div><div class='add'>+		ti,no-reset-on-init;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 114 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		status = "disabled";</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0 0 0x2b300000 0x100000&gt;;</div><div class='add'>+</div><div class='add'>+		wkup_uart0: serial@0 {</div><div class='add'>+			compatible = "ti,am64-uart", "ti,am654-uart";</div><div class='add'>+			reg = &lt;0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0: i2c@2b200000 {</div><div class='hunk'>@@ -109,6 +136,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi<br/>index 420c77c8e9e5..908cc0760e7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-main.dtsi</a></div><div class='hunk'>@@ -42,17 +42,23 @@</div><div class='ctx'> 	ti,interrupt-ranges = &lt;5 69 35&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_pmx0 {</div><div class='del'>-	pinctrl-single,gpio-range =</div><div class='del'>-		&lt;&amp;main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 72 22 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 149 2 PIN_GPIO_RANGE_IOPAD&gt;;</div><div class='add'>+&amp;main_conf {</div><div class='add'>+	audio_refclk0: clock-controller@82e0 {</div><div class='add'>+		compatible = "ti,am62-audio-refclk";</div><div class='add'>+		reg = &lt;0x82e0 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 157 0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 157 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 157 16&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	main_pmx0_range: gpio-range {</div><div class='del'>-		#pinctrl-single,gpio-range-cells = &lt;3&gt;;</div><div class='add'>+	audio_refclk1: clock-controller@82e4 {</div><div class='add'>+		compatible = "ti,am62-audio-refclk";</div><div class='add'>+		reg = &lt;0x82e4 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 157 18&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 157 18&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 157 34&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -68,3 +74,9 @@</div><div class='ctx'> 	gpio-reserved-ranges = &lt;32 10&gt;;</div><div class='ctx'> 	ti,ngpio = &lt;52&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	ti,strobe-sel = &lt;0x66&gt;;</div><div class='add'>+	ti,otap-del-sel-hs400 = &lt;0x5&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..d29a5dbe13ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on AM62P SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core0_dma_memory_region: memory@9b800000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9b800000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core0_memory_region: memory@9b900000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0x9b900000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_r5_0: mbox-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi<br/>new file mode 100644<br/>index 000000000000..ee3feac6ea5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-dahlia.dtsi</a></div><div class='hunk'>@@ -0,0 +1,228 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM on Dahlia carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom1 = &amp;carrier_eeprom;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8_sw: regulator-1v8-sw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-name = "On-carrier +V1.8_SW";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "verdin-wm8904";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"IN2L", "Line In Jack",</div><div class='add'>+			"IN2R", "Line In Jack",</div><div class='add'>+			"Microphone Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Microphone Jack";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Microphone", "Microphone Jack",</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Line", "Line In Jack";</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;wm8904_1a&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;mcasp0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETHs */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_3_DSI */</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_1, PWM_2 */</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_1_reset&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_5&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_6&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	wm8904_1a: audio-codec@1a {</div><div class='add'>+		compatible = "wlf,wm8904";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_i2s1_mclk&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_refclk0&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_1v8_sw&gt;;</div><div class='add'>+		CPVDD-supply = &lt;&amp;reg_1v8_sw&gt;;</div><div class='add'>+		DBVDD-supply = &lt;&amp;reg_1v8_sw&gt;;</div><div class='add'>+		DCVDD-supply = &lt;&amp;reg_1v8_sw&gt;;</div><div class='add'>+		MICVDD-supply = &lt;&amp;reg_1v8_sw&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Current measurement into module VCC */</div><div class='add'>+	hwmon@40 {</div><div class='add'>+		compatible = "ti,ina219";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor = &lt;10000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp75c";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_eeprom: eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_2_DSI */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2S_1 */</div><div class='add'>+&amp;mcasp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_4 */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin QSPI_1 */</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* We support turning off sleep moci on Dahlia */</div><div class='add'>+&amp;reg_force_sleep_moci {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CTRL_WAKE1_MICO# */</div><div class='add'>+&amp;verdin_gpio_keys {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi<br/>new file mode 100644<br/>index 000000000000..0679d76f31bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM on Development carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom1 = &amp;carrier_eeprom;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,bitclock-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,format = "i2s";</div><div class='add'>+		simple-audio-card,frame-master = &lt;&amp;codec_dai&gt;;</div><div class='add'>+		simple-audio-card,mclk-fs = &lt;256&gt;;</div><div class='add'>+		simple-audio-card,name = "verdin-nau8822";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Headphones", "LHP",</div><div class='add'>+			"Headphones", "RHP",</div><div class='add'>+			"Speaker", "LSPK",</div><div class='add'>+			"Speaker", "RSPK",</div><div class='add'>+			"Line Out", "AUXOUT1",</div><div class='add'>+			"Line Out", "AUXOUT2",</div><div class='add'>+			"LAUX", "Line In",</div><div class='add'>+			"RAUX", "Line In",</div><div class='add'>+			"LMICP", "Mic In",</div><div class='add'>+			"RMICP", "Mic In";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Headphones", "Headphones",</div><div class='add'>+			"Line Out", "Line Out",</div><div class='add'>+			"Speaker", "Speaker",</div><div class='add'>+			"Microphone", "Mic In",</div><div class='add'>+			"Line", "Line In";</div><div class='add'>+</div><div class='add'>+		codec_dai: simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;nau8822_1a&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;mcasp0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETHs */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1&gt;, &lt;&amp;pinctrl_rgmii2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	carrier_eth_phy: ethernet-phy@7 {</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+		reg = &lt;7&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_eth2_rgmii_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;42 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		micrel,led-mode = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	phy-handle = &lt;&amp;carrier_eth_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_3_DSI */</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_1, PWM_2 */</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_1_reset&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_5&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_6&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nau8822_1a: audio-codec@1a {</div><div class='add'>+		compatible = "nuvoton,nau8822";</div><div class='add'>+		reg = &lt;0x1a&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_i2s1_mclk&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='add'>+		clocks = &lt;&amp;audio_refclk0&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_gpio_expander: gpio@21 {</div><div class='add'>+		compatible = "nxp,pcal6416";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Current measurement into module VCC */</div><div class='add'>+	hwmon@40 {</div><div class='add'>+		compatible = "ti,ina219";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		shunt-resistor = &lt;10000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp75c";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_eeprom: eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_2_DSI */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1, connector X50 through RS485 transceiver */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2S_1 */</div><div class='add'>+&amp;mcasp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_4 */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin QSPI_1 */</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CTRL_WAKE1_MICO# */</div><div class='add'>+&amp;verdin_gpio_keys {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi<br/>new file mode 100644<br/>index 000000000000..317c8818f9ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi</a></div><div class='hunk'>@@ -0,0 +1,629 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM on Ivy carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom1 = &amp;carrier_eeprom;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1 Voltage w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_voltage_unmanaged: voltage-divider-ain1 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1 Current w/o AIN1_MODE gpio control */</div><div class='add'>+	ain1_current_unmanaged: current-sense-shunt-ain1 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc1 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN1_MODE - SODIMM 216 */</div><div class='add'>+	ain1_mode_mux_ctrl: mux-controller-0 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_5&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;main_gpio0 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain1_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain1_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain1-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain1_current";</div><div class='add'>+		io-channels = &lt;&amp;ain1_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain1_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Voltage w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_voltage_unmanaged: voltage-divider-ain2 {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 0&gt;;</div><div class='add'>+		full-ohms = &lt;19&gt;;</div><div class='add'>+		output-ohms = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2 Current w/o AIN2_MODE gpio control */</div><div class='add'>+	ain2_current_unmanaged: current-sense-shunt-ain2 {</div><div class='add'>+		compatible = "current-sense-shunt";</div><div class='add'>+		#io-channel-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;ivy_adc2 1&gt;;</div><div class='add'>+		shunt-resistor-micro-ohms = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* AIN2_MODE - SODIMM 218 */</div><div class='add'>+	ain2_mode_mux_ctrl: mux-controller-1 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_6&gt;;</div><div class='add'>+		#mux-control-cells = &lt;0&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;main_gpio0 50 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-voltage {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "ain2_voltage", "";</div><div class='add'>+		io-channels = &lt;&amp;ain2_voltage_unmanaged 0&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ain2-current {</div><div class='add'>+		compatible = "io-channel-mux";</div><div class='add'>+		channels = "", "ain2_current";</div><div class='add'>+		io-channels = &lt;&amp;ain2_current_unmanaged&gt;;</div><div class='add'>+		io-channel-names = "parent";</div><div class='add'>+		mux-controls = &lt;&amp;ain2_mode_mux_ctrl&gt;;</div><div class='add'>+		settle-time-us = &lt;1000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ivy_leds&gt;;</div><div class='add'>+</div><div class='add'>+		/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Green - SODIMM 32 - LEDs.GPIO2 */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D7 Red - SODIMM 34 - LEDs.GPIO3 */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Green - SODIMM 54 - LEDs.GPIO5 */</div><div class='add'>+		led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D8 Red - SODIMM 44 - LEDs.GPIO6 */</div><div class='add'>+		led-5 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 37 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */</div><div class='add'>+		led-6 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 34 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* D9 Red - SODIMM 48 - LEDs.GPIO8 */</div><div class='add'>+		led-7 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			default-state = "off";</div><div class='add'>+			function = LED_FUNCTION_STATUS;</div><div class='add'>+			function-enumerator = &lt;3&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 33 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain1: regulator-3v2-ain1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v2_ain2: regulator-3v2-ain2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+		regulator-name = "+3V2_AIN2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Ivy Power Supply Input Voltage */</div><div class='add'>+	ivy-input-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_1 */</div><div class='add'>+		io-channels = &lt;&amp;som_adc 7&gt;;</div><div class='add'>+		full-ohms = &lt;204700&gt;; /* 200K + 4.7K */</div><div class='add'>+		output-ohms = &lt;4700&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-5v-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_2 */</div><div class='add'>+		io-channels = &lt;&amp;som_adc 6&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 27K + 12K */</div><div class='add'>+		output-ohms = &lt;12000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-3v3-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_3 */</div><div class='add'>+		io-channels = &lt;&amp;som_adc 5&gt;;</div><div class='add'>+		full-ohms = &lt;54000&gt;; /* 27K + 27K */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy-1v8-voltage {</div><div class='add'>+		compatible = "voltage-divider";</div><div class='add'>+		/* Verdin ADC_4 */</div><div class='add'>+		io-channels = &lt;&amp;som_adc 4&gt;;</div><div class='add'>+		full-ohms = &lt;39000&gt;; /* 12K + 27K */</div><div class='add'>+		output-ohms = &lt;27000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	pinctrl_ivy_leds: ivy-leds-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x019c, PIN_INPUT, 7) /* (E24)  MCASP0_AXR1.GPIO1_9    */ /* SODIMM 36 */</div><div class='add'>+			AM62PX_IOPAD(0x01a0, PIN_INPUT, 7) /* (F23)  MCASP0_AXR0.GPIO1_10   */ /* SODIMM 34 */</div><div class='add'>+			AM62PX_IOPAD(0x01a4, PIN_INPUT, 7) /* (F24)  MCASP0_ACLKX.GPIO1_11  */ /* SODIMM 30 */</div><div class='add'>+			AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25)  MCASP0_AFSX.GPIO1_12   */ /* SODIMM 32 */</div><div class='add'>+			AM62PX_IOPAD(0x0088, PIN_INPUT, 7) /* (R24)  GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */</div><div class='add'>+			AM62PX_IOPAD(0x0098, PIN_INPUT, 7) /* (AA24) GPMC0_WAIT0.GPIO0_37   */ /* SODIMM 44 */</div><div class='add'>+			AM62PX_IOPAD(0x008c, PIN_INPUT, 7) /* (T25)  GPMC0_WEn.GPIO0_34     */ /* SODIMM 46 */</div><div class='add'>+			AM62PX_IOPAD(0x002c, PIN_INPUT, 7) /* (M25)  OSPI0_CSn0.GPIO0_11    */ /* SODIMM 54 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETHs */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1&gt;, &lt;&amp;pinctrl_rgmii2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	carrier_eth_phy: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_eth2_rgmii_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;42 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	phy-handle = &lt;&amp;carrier_eth_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_1_reset&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_cs2_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_dqs_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io0_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io1_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io2_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_io3_gpio&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"REL4",   /* SODIMM 66 */</div><div class='add'>+		"DIGI_1", /* SODIMM 56 */</div><div class='add'>+		"DIGI_2", /* SODIMM 58 */</div><div class='add'>+		"REL1",   /* SODIMM 60 */</div><div class='add'>+		"REL2",   /* SODIMM 62 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"REL3", /* SODIMM 64 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 30 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 50 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 60 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 70 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 80 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 90 */</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"", /* 0 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 30 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 50 */</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_eeprom: eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ivy_adc1: adc@40 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_7&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;51 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN1 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ivy_adc2: adc@41 {</div><div class='add'>+		compatible = "ti,ads1119";</div><div class='add'>+		reg = &lt;0x41&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;52 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		avdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		dvdd-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		vref-supply = &lt;&amp;reg_3v2_ain2&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-33V Voltage Input */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			diff-channels = &lt;0 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* AIN2 0-20mA Current Input */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			diff-channels = &lt;2 3&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_spi1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_main_spi1_cs0&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+	cs-gpios = &lt;0&gt;,</div><div class='add'>+		   &lt;&amp;mcu_gpio0 1 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+		   &lt;&amp;mcu_gpio0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@1 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fram@2 {</div><div class='add'>+		compatible = "fujitsu,mb85rs256", "atmel,at25";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		address-width = &lt;16&gt;;</div><div class='add'>+		size = &lt;32768&gt;;</div><div class='add'>+		spi-max-frequency = &lt;33000000&gt;;</div><div class='add'>+		pagesize = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;;</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */</div><div class='add'>+		"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	rs485-rts-active-low;</div><div class='add'>+	rs485-rx-during-tx;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi<br/>new file mode 100644<br/>index 000000000000..37c0b9da82da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-mallow.dtsi</a></div><div class='hunk'>@@ -0,0 +1,213 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM on Mallow carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/mallow-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom1 = &amp;carrier_eeprom;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_qspi1_clk_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_cs_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io0_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io1_gpio&gt;;</div><div class='add'>+</div><div class='add'>+		/* SODIMM 52 - USER_LED_1_RED */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 54 - USER_LED_1_GREEN */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 56 - USER_LED_2_RED */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 58 - USER_LED_2_GREEN */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETHs */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_3_DSI */</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_1, PWM_2 */</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_1_reset&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_5&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_6&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_eeprom: eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_2_DSI */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_spi1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_main_spi1_cs0&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_cs2_gpio&gt;;</div><div class='add'>+	cs-gpios = &lt;0&gt;, &lt;&amp;main_gpio0 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@1 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_qspi1_dqs_gpio&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_4 */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CTRL_WAKE1_MICO# */</div><div class='add'>+&amp;verdin_gpio_keys {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi<br/>new file mode 100644<br/>index 000000000000..8e7019f00e65<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-nonwifi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM non-WB variant</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* SDIO on MSP 30, 31, 32, 33, 34, 35 */</div><div class='add'>+&amp;sdhci2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdhci2&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi<br/>new file mode 100644<br/>index 000000000000..04d3124b5e0f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-wifi.dtsi</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM WB variant</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* On-module Bluetooth */</div><div class='add'>+&amp;main_uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart6&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+		fw-init-baudrate = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module Wi-Fi */</div><div class='add'>+&amp;sdhci2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdhci2&gt;;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	non-removable;</div><div class='add'>+	ti,fails-without-test-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi<br/>new file mode 100644<br/>index 000000000000..b7423a774dc5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin-yavia.dtsi</a></div><div class='hunk'>@@ -0,0 +1,219 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM on Yavia carrier board</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/yavia</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		eeprom1 = &amp;carrier_eeprom;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_qspi1_clk_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_cs_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io0_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io1_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io2_gpio&gt;,</div><div class='add'>+			    &lt;&amp;pinctrl_qspi1_io3_gpio&gt;;</div><div class='add'>+</div><div class='add'>+		/* SODIMM 52 - LD1_RED */</div><div class='add'>+		led-0 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 54 - LD1_GREEN */</div><div class='add'>+		led-1 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 56 - LD1_BLUE */</div><div class='add'>+		led-2 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;1&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 58 - LD2_RED */</div><div class='add'>+		led-3 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 60 - LD2_GREEN */</div><div class='add'>+		led-4 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* SODIMM 62 - LD2_BLUE */</div><div class='add'>+		led-5 {</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			function = LED_FUNCTION_DEBUG;</div><div class='add'>+			function-enumerator = &lt;2&gt;;</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETHs */</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_3_DSI */</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_1, PWM_2 */</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_pcie_1_reset&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_cs2_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_qspi1_dqs_gpio&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_5&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_6&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_7&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	temperature-sensor@4f {</div><div class='add'>+		compatible = "ti,tmp75c";</div><div class='add'>+		reg = &lt;0x4f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	carrier_eeprom: eeprom@57 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_2_DSI */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gpio_1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_2&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_3&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_gpio_4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_4 */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CTRL_WAKE1_MICO# */</div><div class='add'>+&amp;verdin_gpio_keys {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PCIE_1_RESET# */</div><div class='add'>+&amp;verdin_pcie_1_reset_hog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi<br/>new file mode 100644<br/>index 000000000000..99810047614e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1418 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * Common dtsi for Verdin AM62P SoM</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		can0 = &amp;main_mcan0;</div><div class='add'>+		can1 = &amp;mcu_mcan0;</div><div class='add'>+		eeprom0 = &amp;som_eeprom;</div><div class='add'>+		ethernet0 = &amp;cpsw_port1;</div><div class='add'>+		ethernet1 = &amp;cpsw_port2;</div><div class='add'>+		i2c0 = &amp;wkup_i2c0;</div><div class='add'>+		i2c1 = &amp;main_i2c0;</div><div class='add'>+		i2c2 = &amp;main_i2c1;</div><div class='add'>+		i2c3 = &amp;mcu_i2c0;</div><div class='add'>+		i2c4 = &amp;main_i2c3;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='add'>+		mmc1 = &amp;sdhci1;</div><div class='add'>+		mmc2 = &amp;sdhci2;</div><div class='add'>+		rtc0 = &amp;som_rtc_i2c;</div><div class='add'>+		rtc1 = &amp;wkup_rtc0;</div><div class='add'>+		serial0 = &amp;main_uart1;</div><div class='add'>+		serial1 = &amp;wkup_uart0;</div><div class='add'>+		serial2 = &amp;main_uart0;</div><div class='add'>+		serial3 = &amp;mcu_uart0;</div><div class='add'>+		serial4 = &amp;main_uart6;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb0_id&gt;;</div><div class='add'>+		id-gpios = &lt;&amp;main_gpio0 31 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		label = "USB_1";</div><div class='add'>+		self-powered;</div><div class='add'>+		vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_dr_connector: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;usb0_ep&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	verdin_gpio_keys: gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ctrl_wake1_mico&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		key-wakeup {</div><div class='add'>+			debounce-interval = &lt;10&gt;;</div><div class='add'>+			/* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */</div><div class='add'>+			gpios = &lt;&amp;main_gpio0 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			label = "Wake-Up";</div><div class='add'>+			linux,code = &lt;KEY_WAKEUP&gt;;</div><div class='add'>+			wakeup-source;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 2G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table {</div><div class='add'>+		/* Add 1.4GHz OPP. Requires VDD_CORE to be at 0.85V */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_force_sleep_moci: regulator-force-sleep-moci {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		/* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */</div><div class='add'>+		gpios = &lt;&amp;som_gpio_expander 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-name = "CTRL_SLEEP_MOCI#";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SD_1 Power Supply */</div><div class='add'>+	reg_sd1_vmmc: regulator-sdhci1-vmmc {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sd1_pwr_en&gt;;</div><div class='add'>+		/* Verdin SD_1_PWR_EN (SODIMM 76) */</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 47 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		off-on-delay-us = &lt;100000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-name = "+V3.3_SD";</div><div class='add'>+		startup-delay-us = &lt;2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sd1_vqmmc: regulator-sdhci1-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sd_vsel&gt;;</div><div class='add'>+		/* PMIC_VSEL_SD */</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-name = "LDO1-VSEL-SD (PMIC)";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_sd_3v3_1v8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_usb0_vbus: regulator-usb0-vbus {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usb0_en&gt;;</div><div class='add'>+		/* Verdin USB_1_EN (SODIMM 155) */</div><div class='add'>+		gpios = &lt;&amp;main_gpio1 50 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-name = "USB_1_EN";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Module Power Supply */</div><div class='add'>+	reg_vsodimm: regulator-vsodimm {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "+V_SODIMM";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		secure_tfa_ddr: tfa@9e780000 {</div><div class='add'>+			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;; /* for OP-TEE */</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0x01e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	/* Verdin PWM_3_DSI */</div><div class='add'>+	pinctrl_epwm0_b: main-epwm0b-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (E20) SPI0_CS1.EHRPWM0_B */ /* SODIMM 19 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin PWM_2 */</div><div class='add'>+	pinctrl_epwm2_a: main-epwm2a-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0124, PIN_OUTPUT, 4) /* (J25) MMC2_SDCD.EHRPWM2_A */ /* SODIMM 16 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin PWM_1 */</div><div class='add'>+	pinctrl_epwm2_b: main-epwm2b-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0128, PIN_OUTPUT, 4) /* (K25) MMC2_SDWP.EHRPWM2_B */ /* SODIMM 15 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_CLK as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_clk_gpio: main-gpio0-0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0000, PIN_INPUT, 7) /* (P23) OSPI0_CLK.GPIO0_0 */ /* SODIMM 52 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin CTRL_WAKE1_MICO# */</div><div class='add'>+	pinctrl_ctrl_wake1_mico: main-gpio0-1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0004, PIN_INPUT, 7) /* (N23) OSPI0_LBCLKO.GPIO0_1 */ /* SODIMM 252 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_DQS as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_dqs_gpio: main-gpio0-2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0008, PIN_INPUT, 7) /* (P22) OSPI0_DQS.GPIO0_2 */ /* SODIMM 66 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_IO0 as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_io0_gpio: main-gpio0-3-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x000c, PIN_INPUT, 7) /* (L25) OSPI0_D0.GPIO0_3 */ /* SODIMM 56 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_IO1 as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_io1_gpio: main-gpio0-4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0010, PIN_INPUT, 7) /* (N24) OSPI0_D1.GPIO0_4 */ /* SODIMM 58 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_IO2 as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_io2_gpio: main-gpio0-5-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0014, PIN_INPUT, 7) /* (N25) OSPI0_D2.GPIO0_5 */ /* SODIMM 60 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_IO3 as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_io3_gpio: main-gpio0-6-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0018, PIN_INPUT, 7) /* (M24) OSPI0_D3.GPIO0_6 */ /* SODIMM 62 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x002c, PIN_INPUT, 7) /* (M25) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1_CS2# as GPIO (conflict with Verdin QSPI_1 interface) */</div><div class='add'>+	pinctrl_qspi1_cs2_gpio: main-gpio0-12-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0030, PIN_INPUT, 7) /* (L24) OSPI0_CSn1.GPIO0_12 */ /* SODIMM 64 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP_37 as GPIO */</div><div class='add'>+	pinctrl_msp37_gpio: main-gpio0-13-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0034, PIN_INPUT, 7) /* (L22) OSPI0_CSn2.GPIO0_13 */ /* SODIMM 174 - WiFi_W_WKUP_HOST# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin PCIE_1_RESET# */</div><div class='add'>+	pinctrl_pcie_1_reset: main-gpio0-14-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0038, PIN_INPUT, 7) /* (L23) OSPI0_CSn3.GPIO0_14 */ /* SODIMM 244 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sd_vsel: main-gpio0-21-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0054, PIN_INPUT, 7) /* (V24) GPMC0_AD6.GPIO0_21 */ /* PMIC_SD_VSEL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_tpm_extint: main-gpio0-25-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0064, PIN_INPUT, 7) /* (AA25) GPMC0_AD10.GPIO0_25 */ /* TPM_EXTINT# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_wkup_bt: main-gpio0-29-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0074, PIN_INPUT, 7) /* (AB24) GPMC0_AD14.GPIO0_29 */ /* WiFi_WKUP_BT# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_wkup_wlan: main-gpio0-30-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0078, PIN_INPUT, 7) /* (AC24) GPMC0_AD15.GPIO0_30 */ /* WiFi_WKUP_WLAN# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin USB_1_ID */</div><div class='add'>+	pinctrl_usb0_id: main-gpio0-31-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ /* SODIMM 161 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin USB_1_OC# */</div><div class='add'>+	pinctrl_usb1_oc: main-gpio0-32-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0084, PIN_INPUT, 7) /* (R25) GPMC0_ADVn_ALE.GPIO0_32 */ /* SODIMM 157 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_2_D_IN as GPIO (conflict with Verdin I2S_2 interface) */</div><div class='add'>+	pinctrl_i2s_2_d_in_gpio: main-gpio0-33-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0088, PIN_INPUT, 7) /* (R24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_2_D_OUT as GPIO (conflict with Verdin I2S_2 interface) */</div><div class='add'>+	pinctrl_i2s_2_d_out_gpio: main-gpio0-34-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x008c, PIN_INPUT, 7) /* (T25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_2_BCLK as GPIO (conflict with Verdin I2S_2 interface) */</div><div class='add'>+	pinctrl_i2s_2_bclk_gpio: main-gpio0-35-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0090, PIN_INPUT, 7) /* (U24) GPMC0_BE0n_CLE.GPIO0_35 */ /* SODIMM 42 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eth_int: main-gpio0-36-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0094, PIN_INPUT, 7) /* (T24) GPMC0_BE1n.GPIO0_36 */ /* ETH_INT# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_2_SYNC as GPIO (conflict with Verdin I2S_2 interface) */</div><div class='add'>+	pinctrl_i2s_2_sync_gpio: main-gpio0-37-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0098, PIN_INPUT, 7) /* (AA24) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin DSI_1_INT# */</div><div class='add'>+	pinctrl_dsi1_int: main-gpio0-38-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x009c, PIN_INPUT, 7) /* (AD24) GPMC0_WAIT1.GPIO0_38 */ /* SODIMM 17 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin DSI_1_BLK_EN# */</div><div class='add'>+	pinctrl_dsi1_bkl_en: main-gpio0-39-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00a0, PIN_INPUT, 7) /* (P24) GPMC0_WPn.GPIO0_39 */ /* SODIMM 21 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin USB_2_OC# */</div><div class='add'>+	pinctrl_usb2_oc: main-gpio0-41-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00a8, PIN_INPUT, 7) /* (T23) GPMC0_CSn0.GPIO0_41 */ /* SODIMM 187 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin ETH_2_RGMII_INT# */</div><div class='add'>+	pinctrl_eth2_rgmii_int: main-gpio0-42-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00ac, PIN_INPUT, 7) /* (U23) GPMC0_CSn1.GPIO0_42 */ /* SODIMM 189 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SD_1_PWR_EN */</div><div class='add'>+	pinctrl_sd1_pwr_en: main-gpio0-47-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00c0, PIN_INPUT, 7) /* (AA23) VOUT0_DATA2.GPIO0_47 */ /* SODIMM 76 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_5 */</div><div class='add'>+	pinctrl_gpio_5: main-gpio0-49-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00c8, PIN_INPUT, 7) /* (AB23) VOUT0_DATA4.GPIO0_49 */ /* SODIMM 216 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_6 */</div><div class='add'>+	pinctrl_gpio_6: main-gpio0-50-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00cc, PIN_INPUT, 7) /* (AD23) VOUT0_DATA5.GPIO0_50 */ /* SODIMM 218 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_7 */</div><div class='add'>+	pinctrl_gpio_7: main-gpio0-51-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00d0, PIN_INPUT, 7) /* (AC23) VOUT0_DATA6.GPIO0_51 */ /* SODIMM 220 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_8 */</div><div class='add'>+	pinctrl_gpio_8: main-gpio0-52-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00d4, PIN_INPUT, 7) /* (AE23) VOUT0_DATA7.GPIO0_52 */ /* SODIMM 222 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP_36 as GPIO */</div><div class='add'>+	pinctrl_msp36_gpio: main-gpio0-57-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00e8, PIN_INPUT, 7) /* (AD21) VOUT0_DATA12.GPIO0_57 */ /* SODIMM 172 - WiFi_BT_WKUP_HOST#  */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_sd_int: main-gpio0-59-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00f0, PIN_INPUT, 7) /* (AA20) VOUT0_DATA14.GPIO0_59 */ /* WIFI_SD_INT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi_spi_cs: main-gpio0-60-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00f4, PIN_INPUT, 7) /* (Y20) VOUT0_DATA15.GPIO0_60 */ /* WIFI_SPI_CS# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin PWM_3_DSI as GPIO */</div><div class='add'>+	pinctrl_pwm3_dsi_gpio: main-gpio1-16-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01b8, PIN_INPUT, 7) /* (E20) SPI0_CS1.GPIO1_16 */ /* SODIMM 19 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SD_1_CD# */</div><div class='add'>+	pinctrl_sd1_cd: main-gpio1-48-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0240, PIN_INPUT_PULLUP, 7) /* (D23) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP_29 as GPIO */</div><div class='add'>+	pinctl_msp29_gpio: main-gpio1-49-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */ /* SODIMM 154 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin USB_1_EN */</div><div class='add'>+	pinctrl_usb0_en: main-gpio1-50-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0254, PIN_INPUT, 7) /* (G22) USB0_DRVVBUS.GPIO1_50 */ /* SODIMM 155 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2C_1 */</div><div class='add'>+	pinctrl_main_i2c0: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ /* SODIMM 14 */</div><div class='add'>+			AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ /* SODIMM 12 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2C_2_DSI */</div><div class='add'>+	pinctrl_main_i2c1: main-i2c1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ /* SODIMM 55 */</div><div class='add'>+			AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ /* SODIMM 53 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2C_4_CSI */</div><div class='add'>+	pinctrl_main_i2c3: main-i2c3-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A23) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */</div><div class='add'>+			AM62PX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (C22) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin CAN_1 */</div><div class='add'>+	pinctrl_main_mcan0: main-mcan0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01dc, PIN_INPUT, 0)  /* (F20) MCAN0_RX */ /* SODIMM 22 */</div><div class='add'>+			AM62PX_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (B23) MCAN0_TX */ /* SODIMM 20 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP_3/MSP_8 as CAN */</div><div class='add'>+	pinctrl_main_mcan1: main-mcan1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00b4, PIN_INPUT, 5)  /* (U25) GPMC0_CSn3.MCAN1_RX */ /* SODIMM 92  */</div><div class='add'>+			AM62PX_IOPAD(0x00b0, PIN_OUTPUT, 5) /* (T22) GPMC0_CSn2.MCAN1_TX */ /* SODIMM 104 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SD_1 */</div><div class='add'>+	pinctrl_sdhci1: main-mmc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x023c, PIN_INPUT,  0) /* (H20) MMC1_CMD  */ /* SODIMM 74 */</div><div class='add'>+			AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK  */ /* SODIMM 78 */</div><div class='add'>+			AM62PX_IOPAD(0x0230, PIN_INPUT,  0) /* (H21) MMC1_DAT0 */ /* SODIMM 80 */</div><div class='add'>+			AM62PX_IOPAD(0x022c, PIN_INPUT,  0) /* (H23) MMC1_DAT1 */ /* SODIMM 82 */</div><div class='add'>+			AM62PX_IOPAD(0x0228, PIN_INPUT,  0) /* (H22) MMC1_DAT2 */ /* SODIMM 70 */</div><div class='add'>+			AM62PX_IOPAD(0x0224, PIN_INPUT,  0) /* (H25) MMC1_DAT3 */ /* SODIMM 72 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module Wi-Fi on WB SKUs, module-specific SDIO otherwise */</div><div class='add'>+	pinctrl_sdhci2: main-mmc2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0120, PIN_INPUT,  0) /* (K24) MMC2_CMD  */ /* SODIMM 160, WiFi_SDIO_CMD   */</div><div class='add'>+			AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK  */ /* SODIMM 156, WiFi_SDIO_CLK   */</div><div class='add'>+			AM62PX_IOPAD(0x011C, PIN_INPUT,  0) /* () MMC2_CLKLB   */</div><div class='add'>+			AM62PX_IOPAD(0x0114, PIN_INPUT,  0) /* (K23) MMC2_DAT0 */ /* SODIMM 162, WiFi_SDIO_DATA0 */</div><div class='add'>+			AM62PX_IOPAD(0x0110, PIN_INPUT,  0) /* (K22) MMC2_DAT1 */ /* SODIMM 164, WiFi_SDIO_DATA1 */</div><div class='add'>+			AM62PX_IOPAD(0x010c, PIN_INPUT,  0) /* (L20) MMC2_DAT2 */ /* SODIMM 166, WiFi_SDIO_DATA2 */</div><div class='add'>+			AM62PX_IOPAD(0x0108, PIN_INPUT,  0) /* (L21) MMC2_DAT3 */ /* SODIMM 168, WiFi_SDIO_DATA3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin QSPI_1 */</div><div class='add'>+	pinctrl_ospi0: main-ospi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK  */ /* SODIMM 52 */</div><div class='add'>+			AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ /* SODIMM 54 */</div><div class='add'>+			AM62PX_IOPAD(0x0030, PIN_OUTPUT, 0) /* (L24) OSPI0_CSn1 */ /* SODIMM 64 */</div><div class='add'>+			AM62PX_IOPAD(0x000c, PIN_INPUT,  0) /* (L25) OSPI0_D0   */ /* SODIMM 56 */</div><div class='add'>+			AM62PX_IOPAD(0x0010, PIN_INPUT,  0) /* (N24) OSPI0_D1   */ /* SODIMM 58 */</div><div class='add'>+			AM62PX_IOPAD(0x0014, PIN_INPUT,  0) /* (N25) OSPI0_D2   */ /* SODIMM 60 */</div><div class='add'>+			AM62PX_IOPAD(0x0018, PIN_INPUT,  0) /* (M24) OSPI0_D3   */ /* SODIMM 62 */</div><div class='add'>+			AM62PX_IOPAD(0x0008, PIN_INPUT,  0) /* (P22) OSPI0_DQS  */ /* SODIMM 66 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin ETH_1 RGMII (On-module PHY) */</div><div class='add'>+	pinctrl_rgmii1: main-rgmii1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0    */ /* RGMII_RXD0   */</div><div class='add'>+			AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1    */ /* RGMII_RXD1   */</div><div class='add'>+			AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2    */ /* RGMII_RXD2   */</div><div class='add'>+			AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3    */ /* RGMII_RXD3   */</div><div class='add'>+			AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC    */ /* RGMII_RXC    */</div><div class='add'>+			AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ /* RGMII_RX_CTL */</div><div class='add'>+			AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0    */ /* RGMII_TXD0   */</div><div class='add'>+			AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1    */ /* RGMII_TXD1   */</div><div class='add'>+			AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2    */ /* RGMII_TXD2   */</div><div class='add'>+			AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3    */ /* RGMII_TXD3   */</div><div class='add'>+			AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC    */ /* RGMII_TXC    */</div><div class='add'>+			AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ /* RGMII_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin ETH_2 RGMII */</div><div class='add'>+	pinctrl_rgmii2: main-rgmii2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0    */ /* SODIMM 201 */</div><div class='add'>+			AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1    */ /* SODIMM 203 */</div><div class='add'>+			AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2    */ /* SODIMM 205 */</div><div class='add'>+			AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3    */ /* SODIMM 207 */</div><div class='add'>+			AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC    */ /* SODIMM 197 */</div><div class='add'>+			AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ /* SODIMM 199 */</div><div class='add'>+			AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0    */ /* SODIMM 221 */</div><div class='add'>+			AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1    */ /* SODIMM 219 */</div><div class='add'>+			AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2    */ /* SODIMM 217 */</div><div class='add'>+			AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3    */ /* SODIMM 215 */</div><div class='add'>+			AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC    */ /* SODIMM 213 */</div><div class='add'>+			AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ /* SODIMM 211 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TPM SPI, Optional Module Specific SPI */</div><div class='add'>+	pinctrl_main_spi0: main-spi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01bc, PIN_INPUT,  0) /* (B21) SPI0_CLK */ /* TPM_SPI_CLK  - SODIMM 148 */</div><div class='add'>+			AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (B20) SPI0_D0  */ /* TPM_SPI_MOSI - SODIMM 150 */</div><div class='add'>+			AM62PX_IOPAD(0x01c4, PIN_INPUT,  0) /* (C21) SPI0_D1  */ /* TPM_SPI_MISO - SODIMM 152 */</div><div class='add'>+			AM62PX_IOPAD(0x01b4, PIN_INPUT,  0) /* (D20) SPI0_CS0 */ /* TPM_SPI_CS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SPI_1 */</div><div class='add'>+	pinctrl_main_spi1: main-spi1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0020, PIN_INPUT,  1) /* (N22) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */</div><div class='add'>+			AM62PX_IOPAD(0x0024, PIN_OUTPUT, 1) /* (P21) OSPI0_D6.SPI1_D0  */ /* SODIMM 200 */</div><div class='add'>+			AM62PX_IOPAD(0x0028, PIN_INPUT,  1) /* (N20) OSPI0_D7.SPI1_D1  */ /* SODIMM 198 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin SPI_1_CS */</div><div class='add'>+	pinctrl_main_spi1_cs0: main-spi1-cs0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x001c, PIN_OUTPUT, 1) /* (N21) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_1 MCLK */</div><div class='add'>+	pinctrl_i2s1_mclk: main-system-audio-ext-reflock0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00c4, PIN_OUTPUT, 5) /* (Y23) VOUT0_DATA3.AUDIO_EXT_REFCLK0 */ /* SODIMM 38 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_eth_clock: main-system-clkout0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (C25) EXT_REFCLK1.CLKOUT0 */ /* ETH_25MHz_CLK */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pmic_extint: main-system-extint-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01f4, PIN_INPUT, 0) /* (C23) EXTINTn */ /* PMIC_EXTINT# */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin UART_3, used as the Linux console */</div><div class='add'>+	pinctrl_uart0: main-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x1c8, PIN_INPUT,  0) /* (A22) UART0_RXD */ /* SODIMM 147 */</div><div class='add'>+			AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ /* SODIMM 149 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin UART_1 */</div><div class='add'>+	pinctrl_uart1: main-uart1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01ac, PIN_INPUT,  2) /* (G23) MCASP0_AFSR.UART1_RXD  */ /* SODIMM 129 */</div><div class='add'>+			AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ /* SODIMM 131 */</div><div class='add'>+			AM62PX_IOPAD(0x0194, PIN_INPUT,  2) /* (D25) MCASP0_AXR3.UART1_CTSn */ /* SODIMM 135 */</div><div class='add'>+			AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ /* SODIMM 133 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP 41, 42, 44 and 45 as UART */</div><div class='add'>+	pinctrl_uart2: main-uart2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00b8, PIN_INPUT,  4) /* (AE24) VOUT0_DATA0.UART2_RXD */ /* SODIMM 192 */</div><div class='add'>+			AM62PX_IOPAD(0x00bc, PIN_OUTPUT, 4) /* (W23) VOUT0_DATA1.UART2_TXD  */ /* SODIMM 190 */</div><div class='add'>+			AM62PX_IOPAD(0x0104, PIN_INPUT,  4) /* (Y21) VOUT0_PCLK.UART2_CTSn  */ /* SODIMM 184 */</div><div class='add'>+			AM62PX_IOPAD(0x0100, PIN_OUTPUT, 4) /* (W20) VOUT0_VSYNC.UART2_RTSn */ /* SODIMM 186 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Bluetooth on WB SKUs */</div><div class='add'>+	pinctrl_uart6: main-uart6-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00d8, PIN_INPUT,  4) /* (AE22) VOUT0_DATA8.UART6_RXD   */ /* WiFi_UART_RXD */</div><div class='add'>+			AM62PX_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (AC22) VOUT0_DATA9.UART6_TXD   */ /* WiFi_UART_TXD */</div><div class='add'>+			AM62PX_IOPAD(0x00e4, PIN_INPUT,  4) /* (AE21) VOUT0_DATA11.UART6_CTSn */ /* WiFi_UART_CTS */</div><div class='add'>+			AM62PX_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (W22)  VOUT0_DATA10.UART6_RTSn */ /* WiFi_UART_RTS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin USB_2_EN */</div><div class='add'>+	pinctrl_usb1: main-usb1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (G21) USB1_DRVVBUS */ /* SODIMM 185 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_1 */</div><div class='add'>+	pinctrl_mcasp0: mcasp0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01a4, PIN_INPUT, 0) /* (F24) MCASP0_ACLKX */ /* SODIMM 30 */</div><div class='add'>+			AM62PX_IOPAD(0x01a8, PIN_INPUT, 0) /* (F25) MCASP0_AFSX  */ /* SODIMM 32 */</div><div class='add'>+			AM62PX_IOPAD(0x01a0, PIN_INPUT, 0) /* (F23) MCASP0_AXR0  */ /* SODIMM 34 */</div><div class='add'>+			AM62PX_IOPAD(0x019c, PIN_INPUT, 0) /* (E24) MCASP0_AXR1  */ /* SODIMM 36 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2S_2 */</div><div class='add'>+	pinctrl_mcasp1: mcasp1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24)  GPMC0_BE0n_CLE.MCASP1_ACLKX */ /* SODIMM 42 */</div><div class='add'>+			AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX     */ /* SODIMM 44 */</div><div class='add'>+			AM62PX_IOPAD(0x008c, PIN_INPUT, 2) /* (T25)  GPMC0_WEn.MCASP1_AXR0       */ /* SODIMM 46 */</div><div class='add'>+			AM62PX_IOPAD(0x0088, PIN_INPUT, 2) /* (R24)  GPMC0_OEn_REn.MCASP1_AXR1   */ /* SODIMM 48 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+	pinctrl_mdio: mdio0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC  */ /* SODIMM 193 */</div><div class='add'>+			AM62PX_IOPAD(0x015c, PIN_INPUT,  0) /* (F16) MDIO0_MDIO */ /* SODIMM 191 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_pmx0 {</div><div class='add'>+	/* Verdin GPIO_1 */</div><div class='add'>+	pinctrl_gpio_1: mcu-gpio0-1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0004, PIN_INPUT, 7) /* (E10) MCU_SPI0_CS1.MCU_GPIO0_1 */ /* SODIMM 206 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_2 */</div><div class='add'>+	pinctrl_gpio_2: mcu-gpio0-2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0008, PIN_INPUT, 7) /* (C10) MCU_SPI0_CLK.MCU_GPIO0_2 */ /* SODIMM 208 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_3 */</div><div class='add'>+	pinctrl_gpio_3: mcu-gpio0-3-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x000c, PIN_INPUT, 7) /* (B11) MCU_SPI0_D0.MCU_GPIO0_3 */ /* SODIMM 210 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin GPIO_4 */</div><div class='add'>+	pinctrl_gpio_4: mcu-gpio0-4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (D10) MCU_SPI0_D1.MCU_GPIO0_4 */ /* SODIMM 212 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin I2C_3_HDMI */</div><div class='add'>+	pinctrl_mcu_i2c0: mcu-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0044, PIN_INPUT_PULLUP, 0) /* (E11) MCU_I2C0_SCL */ /* SODIMM 59 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0048, PIN_INPUT_PULLUP, 0) /* (D11) MCU_I2C0_SDA */ /* SODIMM 57 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin CAN_2 */</div><div class='add'>+	pinctrl_mcu_mcan0: mcu-mcan0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0038, PIN_INPUT,  0) /* (D6) MCU_MCAN0_RX */ /* SODIMM 22 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (E8) MCU_MCAN0_TX */ /* SODIMM 20 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin MSP_13/MSP_18 as CAN */</div><div class='add'>+	pinctrl_mcu_mcan1: mcu-mcan1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0040, PIN_INPUT,  0) /* (E7) MCU_MCAN1_RX */ /* SODIMM 116 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x003c, PIN_OUTPUT, 0) /* (F8) MCU_MCAN1_TX */ /* SODIMM 128 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin UART_4 */</div><div class='add'>+	pinctrl_mcu_uart0: mcu-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0014, PIN_INPUT,  0) /* (B6) MCU_UART0_RXD */ /* SODIMM 151 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0018, PIN_OUTPUT, 0) /* (C8) MCU_UART0_TXD */ /* SODIMM 153 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* On-module I2C - PMIC_I2C */</div><div class='add'>+	pinctrl_wkup_i2c0: wkup-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x004c, PIN_INPUT, 0) /* (A13) WKUP_I2C0_SCL */ /* PMIC_I2C_SCL */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0050, PIN_INPUT, 0) /* (C11) WKUP_I2C0_SDA */ /* PMIC_I2C_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin CSI_1_MCLK */</div><div class='add'>+	pinctrl_wkup_clkout0: wkup-system-clkout0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (F13) WKUP_CLKOUT0 */ /* SODIMM 91 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Verdin UART_2 */</div><div class='add'>+	pinctrl_wkup_uart0: wkup-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x002c, PIN_INPUT,  0) /* (C7) WKUP_UART0_CTSn */ /* SODIMM 143 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ /* SODIMM 141 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0024, PIN_INPUT,  0) /* (D8) WKUP_UART0_RXD  */ /* SODIMM 137 */</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD  */ /* SODIMM 139 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2S_1_MCLK */</div><div class='add'>+&amp;audio_refclk0 {</div><div class='add'>+	assigned-clock-rates = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mdio&gt;, &lt;&amp;pinctrl_eth_clock&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;k3_clks 157 36&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;k3_clks 157 38&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;25000000&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	som_eth_phy: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_eth_int&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;36 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_1 (On-module PHY) */</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	phy-handle = &lt;&amp;som_eth_phy&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin ETH_2_RGMII */</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_3_DSI */</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_epwm0_b&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin PWM_1, PWM_2 */</div><div class='add'>+&amp;epwm2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_epwm2_a&gt;, &lt;&amp;pinctrl_epwm2_b&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main0_alert {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main0_crit {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main1_alert {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main1_crit {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main2_alert {</div><div class='add'>+	temperature = &lt;95000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main2_crit {</div><div class='add'>+	temperature = &lt;105000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"SODIMM_52",</div><div class='add'>+		"SODIMM_252",</div><div class='add'>+		"SODIMM_66",</div><div class='add'>+		"SODIMM_56",</div><div class='add'>+		"SODIMM_58",</div><div class='add'>+		"SODIMM_60",</div><div class='add'>+		"SODIMM_62",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"SODIMM_54",</div><div class='add'>+		"SODIMM_64",</div><div class='add'>+		"SODIMM_174",</div><div class='add'>+		"SODIMM_244",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"PMIC_SD_VSEL",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"TPM_EXTINT#",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"WiFi_WKUP_BT#",</div><div class='add'>+		"WiFi_WKUP_WLAN#", /* 30 */</div><div class='add'>+		"SODIMM_161",</div><div class='add'>+		"SODIMM_157",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"ETH_INT#",</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_17",</div><div class='add'>+		"SODIMM_21",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"SODIMM_187",</div><div class='add'>+		"SODIMM_189",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_76",</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_216",</div><div class='add'>+		"SODIMM_218", /* 50 */</div><div class='add'>+		"SODIMM_220",</div><div class='add'>+		"SODIMM_222",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_172",</div><div class='add'>+		"",</div><div class='add'>+		"WIFI_SD_INT",</div><div class='add'>+		"WIFI_SPI_CS#", /* 60 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 70 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 80 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 90 */</div><div class='add'>+		"";</div><div class='add'>+</div><div class='add'>+	verdin_pcie_1_reset_hog: pcie-1-reset-hog {</div><div class='add'>+		gpio-hog;</div><div class='add'>+		/* Verdin PCIE_1_RESET# (SODIMM 244) */</div><div class='add'>+		gpios = &lt;14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		line-name = "PCIE_1_RESET#";</div><div class='add'>+		output-low;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 30 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 40 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_84",</div><div class='add'>+		"SODIMM_154",</div><div class='add'>+		"SODIMM_155", /* 50 */</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_1 */</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_i2c0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_2_DSI */</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_i2c1&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_4_CSI */</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_i2c3&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_1 */</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_mcan0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TPM SPI, optional SPI on module specific pins */</div><div class='add'>+&amp;main_spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_spi0&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@0 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_tpm_extint&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		spi-max-frequency = &lt;18500000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SPI_1 */</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_main_spi1&gt;, &lt;&amp;pinctrl_main_spi1_cs0&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_3, used as the Linux console */</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_1 */</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2S_1 */</div><div class='add'>+&amp;mcasp0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcasp0&gt;;</div><div class='add'>+	op-mode = &lt;0&gt;; /* I2S mode */</div><div class='add'>+	serial-dir = &lt;  /* 0: INACTIVE, 1: TX, 2: RX */</div><div class='add'>+	       1 2 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	&gt;;</div><div class='add'>+	tdm-slots = &lt;2&gt;;</div><div class='add'>+	rx-num-evt = &lt;0&gt;;</div><div class='add'>+	tx-num-evt = &lt;0&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2S_2 */</div><div class='add'>+&amp;mcasp1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcasp1&gt;;</div><div class='add'>+	op-mode = &lt;0&gt;; /* I2S mode */</div><div class='add'>+	serial-dir = &lt;  /* 0: INACTIVE, 1: TX, 2: RX */</div><div class='add'>+	       1 2 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	       0 0 0 0</div><div class='add'>+	&gt;;</div><div class='add'>+	tdm-slots = &lt;2&gt;;</div><div class='add'>+	rx-num-evt = &lt;0&gt;;</div><div class='add'>+	tx-num-evt = &lt;0&gt;;</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	gpio-line-names =</div><div class='add'>+		"",</div><div class='add'>+		"SODIMM_206",</div><div class='add'>+		"SODIMM_208",</div><div class='add'>+		"SODIMM_210",</div><div class='add'>+		"SODIMM_212",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 10 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"", /* 20 */</div><div class='add'>+		"",</div><div class='add'>+		"",</div><div class='add'>+		"";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin I2C_3_HDMI */</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcu_i2c0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin CAN_2 */</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcu_mcan0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_4 */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcu_uart0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin QSPI_1 */</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_ospi0&gt;;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module eMMC */</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	no-mmc-hs400;</div><div class='add'>+	non-removable;</div><div class='add'>+	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin SD_1 */</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_sdhci1&gt;, &lt;&amp;pinctrl_sd1_cd&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;main_gpio1 48 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_sd1_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_sd1_vqmmc&gt;;</div><div class='add'>+	ti,fails-without-test-cd;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_1 */</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	adp-disable;</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		usb0_ep: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_dr_connector&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin USB_2 */</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On-module I2C - PMIC_I2C */</div><div class='add'>+&amp;wkup_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wkup_i2c0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	som_gpio_expander: gpio@21 {</div><div class='add'>+		compatible = "nxp,pcal6408";</div><div class='add'>+		reg = &lt;0x21&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		gpio-line-names = "SODIMM_256";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@30 {</div><div class='add'>+		compatible = "ti,tps65219";</div><div class='add'>+		reg = &lt;0x30&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pmic_extint&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		buck1-supply = &lt;&amp;reg_vsodimm&gt;;</div><div class='add'>+		buck2-supply = &lt;&amp;reg_vsodimm&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;reg_vsodimm&gt;;</div><div class='add'>+		ldo1-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+		ldo3-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		ldo4-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		ti,power-button;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			reg_3v3: buck1 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "+V3.3 (PMIC BUCK1)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_1v8: buck2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "+V1.8 (PMIC BUCK2)"; /* On-module and SODIMM 214 */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-name = "+VDD_DDR (PMIC BUCK3)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			reg_sd_3v3_1v8: ldo1 {</div><div class='add'>+				regulator-allow-bypass;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-name = "+V3.3_1.8_SD (PMIC LDO1)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-name = "+V_PMIC_LDO2 (PMIC LDO4)"; // +VDDR_CORE</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-name = "+V1.8A (PMIC LDO3)";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4 {</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+				regulator-name = "+V2.5_ETH (PMIC LDO4)";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_rtc_i2c: rtc@32 {</div><div class='add'>+		compatible = "epson,rx8130";</div><div class='add'>+		reg = &lt;0x32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp1075";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_adc: adc@49 {</div><div class='add'>+		compatible = "ti,tla2024";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		/* Verdin (ADC_4 - ADC_3) */</div><div class='add'>+		channel@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin (ADC_4 - ADC_1) */</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin (ADC_3 - ADC_1) */</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin (ADC_2 - ADC_1) */</div><div class='add'>+		channel@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin ADC_4 */</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin ADC_3 */</div><div class='add'>+		channel@5 {</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin ADC_2 */</div><div class='add'>+		channel@6 {</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Verdin ADC_1 */</div><div class='add'>+		channel@7 {</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			ti,datarate = &lt;4&gt;;</div><div class='add'>+			ti,gain = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_eeprom: eeprom@50 {</div><div class='add'>+		compatible = "st,24c02", "atmel,24c02";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Verdin UART_2 */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_wkup_uart0&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62p-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts<br/>index 3efa12bb7254..a064a632680e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-sk.dts</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;mcu_uart0;</div><div class='ctx'> 		serial2 = &amp;main_uart0;</div><div class='ctx'> 		serial3 = &amp;main_uart1;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='hunk'>@@ -43,11 +44,23 @@</div><div class='ctx'> 		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -57,12 +70,6 @@</div><div class='ctx'> 			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;; /* for OP-TEE */</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0x9c900000 0x00 0x01e00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vmain_pd: regulator-0 {</div><div class='hunk'>@@ -114,6 +121,28 @@</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc_3v3_main: regulator-4 {</div><div class='add'>+		/* output of LM5141-Q1 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_main";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3_sys: regulator-5 {</div><div class='add'>+		/* output of TPS222965DSGT */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_3v3_sys";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_main&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -128,6 +157,15 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	opp-table {</div><div class='add'>+		/* Requires VDD_CORE at 0v85 */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	tlv320_mclk: clk-0 {</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='hunk'>@@ -164,6 +202,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpsw_mac_syscon {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy_gmii_sel {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_gpio0 {</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> };</div><div class='hunk'>@@ -217,6 +263,7 @@</div><div class='ctx'> 			AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */</div><div class='ctx'> 			AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='hunk'>@@ -346,6 +393,32 @@</div><div class='ctx'> 			AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	main_ecap1_pins_default: main-ecap1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x019c, PIN_OUTPUT, 2) /* (E24) MCASP0_AXR1.ECAP1_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ecap2_pins_default: main-ecap2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (F24) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_epwm0_pins_default: main-epwm0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (D20) SPI0_CS0.EHRPWM0_A */</div><div class='add'>+			AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (E20) SPI0_CS1.EHRPWM0_B */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_epwm1_pins_default: main-epwm1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (B21) SPI0_CLK.EHRPWM1_A */</div><div class='add'>+			AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (B20) SPI0_D0.EHRPWM1_B */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c0 {</div><div class='hunk'>@@ -444,8 +517,8 @@</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -471,6 +544,7 @@</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port2 {</div><div class='hunk'>@@ -486,6 +560,7 @@</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g_phy0: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,min-output-impedance;</div><div class='hunk'>@@ -510,6 +585,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb0 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	usb-role-switch;</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='hunk'>@@ -519,6 +595,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb0_phy_ctrl {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb1 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -611,20 +691,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	mbox_r5_0: mbox-r5-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;main_uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='hunk'>@@ -668,3 +734,33 @@</div><div class='ctx'> &amp;mcu_gpio_intr {</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ecap1 {</div><div class='add'>+	/* P36 of J4 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecap2 {</div><div class='add'>+	/* P11 of J4 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwm0 {</div><div class='add'>+	/* P24/P26 of J4 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_epwm0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwm1 {</div><div class='add'>+	/* P23/P19 of J4 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_epwm1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62p-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts<br/>new file mode 100644<br/>index 000000000000..4bb92fde6ab8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts</a></div><div class='hunk'>@@ -0,0 +1,500 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Variscite Symphony carrier board for VAR-SOM-AM62P</div><div class='add'>+ *</div><div class='add'>+ * Link: https://www.variscite.it/product/single-board-computers/symphony-board/</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5-var-som.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Variscite VAR-SOM-AM62P on Symphony-Board";</div><div class='add'>+	compatible = "variscite,var-som-am62p-symphony", "variscite,var-som-am62p", "ti,am62p5";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;cpsw_port1;</div><div class='add'>+		ethernet1 = &amp;cpsw_port2;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='add'>+		mmc1 = &amp;sdhci1;</div><div class='add'>+		mmc2 = &amp;sdhci2;</div><div class='add'>+		serial0 = &amp;main_uart0;</div><div class='add'>+		serial2 = &amp;main_uart2;</div><div class='add'>+		serial5 = &amp;main_uart5;</div><div class='add'>+		serial6 = &amp;main_uart6;</div><div class='add'>+		spi5 = &amp;main_spi2;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_ov5640_fixed: clock-24000000 {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		button-back {</div><div class='add'>+			label = "Back";</div><div class='add'>+			linux,code = &lt;KEY_BACK&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9534 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-home {</div><div class='add'>+			label = "Home";</div><div class='add'>+			linux,code = &lt;KEY_HOME&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9534 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		button-menu {</div><div class='add'>+			label = "Menu";</div><div class='add'>+			linux,code = &lt;KEY_MENU&gt;;</div><div class='add'>+			gpios = &lt;&amp;pca9534 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-heartbeat {</div><div class='add'>+			label = "Heartbeat";</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			gpios = &lt;&amp;pca9534 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p5v: regulator-1p5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P5V";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sdhc1_vmmc: regulator-sdhc1 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "+V3.3_SD";</div><div class='add'>+		vin-supply = &lt;&amp;reg_sdhc1_vmmc_int&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;main_gpio0 30 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sdhc1_vmmc_int: regulator-sdhc1-int {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "+V3.3_SD_INT";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sd1_vmmc&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		gpio = &lt;&amp;main_gpio0 53 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "+V3.3_SD_VQMMC";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_sd1_vqmmc&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 56 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_ov5640_buf_en: regulator-camera-buf-en {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "ov5640_buf_en";</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver1: can-phy {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	connector {</div><div class='add'>+		compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_extcon&gt;;</div><div class='add'>+		label = "USB-C";</div><div class='add'>+		id-gpios = &lt;&amp;main_gpio1 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			usb_con_hs: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;typec_hs&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi0_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx0_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam0&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY. */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1&gt;,</div><div class='add'>+		    &lt;&amp;pinctrl_rgmii2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mdio1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cpsw3g_phy1: ethernet-phy@5 {</div><div class='add'>+		compatible = "ethernet-phy-id0283.bc30";</div><div class='add'>+		reg = &lt;5&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;pca9534 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port2 {</div><div class='add'>+	/*</div><div class='add'>+	 * The required RGMII TX and RX 2ns delays are implemented directly</div><div class='add'>+	 * in hardware via passive delay elements on the Symphony PCB.</div><div class='add'>+	 * No delay configuration is needed in software via PHY driver.</div><div class='add'>+	 */</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c0{</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c0&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ov5640: camera@3c {</div><div class='add'>+		compatible = "ovti,ov5640";</div><div class='add'>+		reg = &lt;0x3c&gt;;</div><div class='add'>+		clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='add'>+		clock-names = "xclk";</div><div class='add'>+		AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+		DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		DVDD-supply = &lt;&amp;reg_1p5v&gt;;</div><div class='add'>+		powerdown-gpios = &lt;&amp;main_gpio0 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_ov5640&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			csi2_cam0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2rx0_in_sensor&gt;;</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* GPIO expander */</div><div class='add'>+	pca9534: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9534";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_pca9534&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio1&gt;;</div><div class='add'>+		interrupts = &lt;30 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		usb3-sel-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;4 0&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "usb3_sel";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth-som-vselect-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;6 0&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "eth-vselect";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		eth-mdio-enable-hog {</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;7 0&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "eth-mdio-enable";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	rtc@68 {</div><div class='add'>+		compatible = "dallas,ds1337";</div><div class='add'>+		reg = &lt;0x68&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mcan0&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	pinctrl_extcon: main-extcon-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c0: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */</div><div class='add'>+			AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1: main-i2c1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */</div><div class='add'>+			AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mcan0: main-mcan0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01dc, PIN_INPUT, 0) /* (F20) MCAN0_RX */</div><div class='add'>+			AM62PX_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (B23) MCAN0_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mmc1: main-mmc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */</div><div class='add'>+			AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */</div><div class='add'>+			AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */</div><div class='add'>+			AM62PX_IOPAD(0x022c, PIN_INPUT, 0) /* (H23) MMC1_DAT1 */</div><div class='add'>+			AM62PX_IOPAD(0x0228, PIN_INPUT, 0) /* (H22) MMC1_DAT2 */</div><div class='add'>+			AM62PX_IOPAD(0x0224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */</div><div class='add'>+			AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rgmii2: main-rgmii2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */</div><div class='add'>+			AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */</div><div class='add'>+			AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */</div><div class='add'>+			AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */</div><div class='add'>+			AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */</div><div class='add'>+			AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */</div><div class='add'>+			AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */</div><div class='add'>+			AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */</div><div class='add'>+			AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */</div><div class='add'>+			AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */</div><div class='add'>+			AM62PX_IOPAD(0x0168, PIN_INPUT_PULLDOWN, 0) /* (D16) RGMII2_TXC */</div><div class='add'>+			AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spi2: main-spi2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01b0, PIN_INPUT, 1) /* (G20) MCASP0_ACLKR.SPI2_CLK */</div><div class='add'>+			AM62PX_IOPAD(0x0194, PIN_OUTPUT, 1) /* (D25) MCASP0_AXR3.SPI2_D0 */</div><div class='add'>+			AM62PX_IOPAD(0x0198, PIN_INPUT, 1) /* (E25) MCASP0_AXR2.SPI2_D1 */</div><div class='add'>+			AM62PX_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (G23) MCASP0_AFSR.GPIO1_13 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart0: main-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x1c8, PIN_INPUT, 0)	/* (A22) UART0_RXD */</div><div class='add'>+			AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0)	/* (B22) UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart2: main-uart2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x005c, PIN_INPUT_PULLUP, 2) /* (AC25) GPMC0_AD8.UART2_RXD */</div><div class='add'>+			AM62PX_IOPAD(0x0060, PIN_OUTPUT, 2) /* (AB25) GPMC0_AD9.UART2_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart6: main-uart6-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x009c, PIN_INPUT_PULLUP, 3) /* (AD24) GPMC0_WAIT1.UART6_RXD */</div><div class='add'>+			AM62PX_IOPAD(0x0244, PIN_OUTPUT, 1) /* (D24) MMC1_SDWP.UART6_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1: main-usb1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (G21) USB1_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_ov5640: main-ov5640-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0028, PIN_OUTPUT, 7) /* (N20) OSPI0_D7.GPIO0_10 */</div><div class='add'>+			AM62PX_IOPAD(0x0054, PIN_OUTPUT, 7) /* (V24) GPMC0_AD6.GPIO0_21 */</div><div class='add'>+			AM62PX_IOPAD(0x0058, PIN_OUTPUT, 7) /* (W25) GPMC0_AD7.GPIO0_22 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_pca9534: main-pca9534-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01f0, PIN_INPUT, 7) /* (C25) EXT_REFCLK1.GPIO1_30 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sd1_vmmc: main-sd1-vmmc-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AC24) GPMC0_AD15.GPIO0_30 */</div><div class='add'>+			AM62PX_IOPAD(0x00d8, PIN_OUTPUT, 7) /* (AE22) VOUT0_DATA8.GPIO0_53 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_sd1_vqmmc: main-sd1-vqmmc-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (AE21) VOUT0_DATA11.GPIO0_56 */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_spi2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi2&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in;</div><div class='add'>+	cs-gpios = &lt;&amp;main_gpio1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart6&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	/* SD Card */</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_sdhc1_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_sdhc1_vqmmc&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mmc1&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status="okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	usb-role-switch;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	port {</div><div class='add'>+		typec_hs: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;usb_con_hs&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi<br/>new file mode 100644<br/>index 000000000000..edaa4f99295d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,387 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Common dtsi for Variscite VAR-SOM-AM62P</div><div class='add'>+ *</div><div class='add'>+ * Link: https://www.variscite.com/product/system-on-module-som/cortex-a53-krait/var-som-am62p-ti-sitara-am62px/</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pwm/pwm.h&gt;</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "variscite,var-som-am62p", "ti,am62p5";</div><div class='add'>+</div><div class='add'>+	wifi_pwrseq: wifi-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		post-power-on-delay-ms = &lt;100&gt;;</div><div class='add'>+		power-off-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 54 GPIO_ACTIVE_LOW&gt;,	/* WIFI_PWR_EN */</div><div class='add'>+			      &lt;&amp;main_gpio0 59 GPIO_ACTIVE_LOW&gt;;	/* WIFI_EN */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc_pwrseq: mmc-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-emmc";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_mmc_pwrseq&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 49 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 8G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='add'>+		      &lt;0x00000008 0x80000000 0x00000001 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	opp-table {</div><div class='add'>+		/* Add 1.4GHz OPP for am62p5-sk board. Requires VDD_CORE at 0v85 */</div><div class='add'>+		opp-1400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		rtos_ipc_memory_region: rtos-ipc-memory@9b500000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9b500000 0x00 0x00300000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9b800000 0x00 0x00100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9b900000 0x00 0x00f00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c800000 0x00 0x00100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9c900000 0x00 0x01e00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_tfa_ddr: tfa@9e780000 {</div><div class='add'>+			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;; /* for OP-TEE */</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3: regulator-3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "On-module +V3.3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1v8: regulator-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "On-module +V1.8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3v3_phy: regulator-3v3-phy {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "On-module +V3.3_PHY";</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 45 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_rgmii1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw3g_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mdio1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	cpsw3g_phy0: ethernet-phy@4 {</div><div class='add'>+		compatible = "ethernet-phy-id0283.bc30";</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;main_gpio0 46 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-assert-us = &lt;10000&gt;;</div><div class='add'>+		reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	/*</div><div class='add'>+	 * The required RGMII TX and RX 2ns delays are implemented directly</div><div class='add'>+	 * in hardware via passive delay elements on the SOM PCB.</div><div class='add'>+	 * No delay configuration is needed in software via PHY driver.</div><div class='add'>+	 */</div><div class='add'>+	phy-mode = "rgmii";</div><div class='add'>+	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c2&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c3&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	pinctrl_mmc_pwrseq: main-emmc-pwrseq-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AB23) VOUT0_DATA4.GPIO0_49 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c2: main-i2c2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */</div><div class='add'>+			AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c3: main-i2c3-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A23) UART0_CTSn.I2C3_SCL */</div><div class='add'>+			AM62PX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (C22) UART0_RTSn.I2C3_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mdio1: main-mdio1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */</div><div class='add'>+			AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_mmc2: main-mmc2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x0120, PIN_INPUT_PULLUP, 0) /* (K24) MMC2_CMD */</div><div class='add'>+			AM62PX_IOPAD(0x0118, PIN_INPUT_PULLDOWN, 0) /* (K21) MMC2_CLK */</div><div class='add'>+			AM62PX_IOPAD(0x011c, PIN_INPUT_PULLUP, 0) /* () MMC2_CLKLB */</div><div class='add'>+			AM62PX_IOPAD(0x0114, PIN_INPUT_PULLUP, 0) /* (K23) MMC2_DAT0 */</div><div class='add'>+			AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */</div><div class='add'>+			AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */</div><div class='add'>+			AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_rgmii1: main-rgmii1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */</div><div class='add'>+			AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */</div><div class='add'>+			AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */</div><div class='add'>+			AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */</div><div class='add'>+			AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */</div><div class='add'>+			AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */</div><div class='add'>+			AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */</div><div class='add'>+			AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */</div><div class='add'>+			AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */</div><div class='add'>+			AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */</div><div class='add'>+			AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */</div><div class='add'>+			AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_spi0: main-spi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (B21) SPI0_CLK */</div><div class='add'>+			AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 0) /* (D20) SPI0_CS0 */</div><div class='add'>+			AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (B20) SPI0_D0 */</div><div class='add'>+			AM62PX_IOPAD(0x01c4, PIN_INPUT, 0) /* (C21) SPI0_D1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart5: main-uart5-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00ec, PIN_INPUT, 4) /* (AC21) VOUT0_DATA13.UART5_CTSn */</div><div class='add'>+			AM62PX_IOPAD(0x00e8, PIN_OUTPUT, 4) /* (AD21) VOUT0_DATA12.UART5_RTSn */</div><div class='add'>+			AM62PX_IOPAD(0x00d0, PIN_INPUT, 4) /* (AC23) VOUT0_DATA6.UART5_RXD */</div><div class='add'>+			AM62PX_IOPAD(0x00d4, PIN_OUTPUT, 4) /* (AE23) VOUT0_DATA7.UART5_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_bt: main-btgrp-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00f4, PIN_OUTPUT, 7) /* (Y20) VOUT0_DATA15.GPIO0_60 (BT_EN) */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_restouch: main-restouch-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00c4, PIN_INPUT_PULLUP, 7) /* (Y23) VOUT0_DATA3.GPIO0_48 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_wifi: main-wifi-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_IOPAD(0x00dc, PIN_OUTPUT, 7) /* (AC22) VOUT0_DATA9.GPIO0_54 - WIFI_PWR_EN - */</div><div class='add'>+			AM62PX_IOPAD(0x00f0, PIN_OUTPUT, 7) /* (AA20) VOUT0_DATA14.GPIO0_59 - WIFI_EN - */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_pmx0 {</div><div class='add'>+	pinctrl_wkup_clkout0: wkup-clkout0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62PX_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (F13) WKUP_CLKOUT0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_spi0&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart5&gt;, &lt;&amp;pinctrl_bt&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bluetooth {</div><div class='add'>+		compatible = "nxp,88w8987-bt";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	/* On-module eMMC */</div><div class='add'>+	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;mmc_pwrseq&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci2 {</div><div class='add'>+	/* On-module WiFi */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_mmc2&gt;, &lt;&amp;pinctrl_wifi&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	keep-power-in-suspend;</div><div class='add'>+	mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+	ti,fails-without-test-cd;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss1 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_r5_0: mbox-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */</div><div class='add'>+&amp;mcu_gpio0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_gpio_intr {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_rtc0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_rti0 {</div><div class='add'>+	/* WKUP RTI0 is used by DM firmware */</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	/* WKUP UART0 is used by DM firmware */</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	/* Main UART1 is used by TIFS firmware */</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts<br/>new file mode 100644<br/>index 000000000000..1790e572eaa0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dahlia.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-dahlia.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P on Dahlia Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-nonwifi-dahlia",</div><div class='add'>+		     "toradex,verdin-am62p-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts<br/>new file mode 100644<br/>index 000000000000..5794f650f751<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-dev.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-dev.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P on Verdin Development Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-nonwifi-dev",</div><div class='add'>+		     "toradex,verdin-am62p-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..a777513f26ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P on Ivy Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-nonwifi-ivy",</div><div class='add'>+		     "toradex,verdin-am62p-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts<br/>new file mode 100644<br/>index 000000000000..52823874eadc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-mallow.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/mallow-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-mallow.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P on Mallow Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-nonwifi-mallow",</div><div class='add'>+		     "toradex,verdin-am62p-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts<br/>new file mode 100644<br/>index 000000000000..c27bda794b51<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-nonwifi-yavia.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/yavia</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-nonwifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-yavia.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P on Yavia Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-nonwifi-yavia",</div><div class='add'>+		     "toradex,verdin-am62p-nonwifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts<br/>new file mode 100644<br/>index 000000000000..12b57985f38e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dahlia.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-dahlia.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P WB on Dahlia Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-wifi-dahlia",</div><div class='add'>+		     "toradex,verdin-am62p-wifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts<br/>new file mode 100644<br/>index 000000000000..bbc2770d5f5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-dev.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/verdin-development-board-kit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-dev.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P WB on Verdin Development Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-wifi-dev",</div><div class='add'>+		     "toradex,verdin-am62p-wifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts<br/>new file mode 100644<br/>index 000000000000..27467281bc3a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-ivy.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/ivy-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-ivy.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P WB on Ivy Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-wifi-ivy",</div><div class='add'>+		     "toradex,verdin-am62p-wifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts<br/>new file mode 100644<br/>index 000000000000..e35851451cd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-mallow.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/mallow-carrier-board</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-mallow.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P WB on Mallow Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-wifi-mallow",</div><div class='add'>+		     "toradex,verdin-am62p-wifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts<br/>new file mode 100644<br/>index 000000000000..25e0842bc905<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5-verdin-wifi-yavia.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Toradex</div><div class='add'>+ *</div><div class='add'>+ * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p</div><div class='add'>+ * https://www.toradex.com/products/carrier-board/yavia</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k3-am62p5.dtsi"</div><div class='add'>+#include "k3-am62p-verdin.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-wifi.dtsi"</div><div class='add'>+#include "k3-am62p-verdin-yavia.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Toradex Verdin AM62P WB on Yavia Board";</div><div class='add'>+	compatible = "toradex,verdin-am62p-wifi-yavia",</div><div class='add'>+		     "toradex,verdin-am62p-wifi",</div><div class='add'>+		     "toradex,verdin-am62p",</div><div class='add'>+		     "ti,am62p5";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi<br/>index 41f479dca455..8982a7b9f1a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62p5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62p5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62p5.dtsi</a></div><div class='hunk'>@@ -47,7 +47,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 135 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -62,7 +64,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 136 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -77,7 +81,9 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 137 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -92,7 +98,52 @@</div><div class='ctx'> 			d-cache-line-size = &lt;64&gt;;</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;a53_opp_table&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 138 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	a53_opp_table: opp-table {</div><div class='add'>+		compatible = "operating-points-v2-ti-cpu";</div><div class='add'>+		opp-shared;</div><div class='add'>+		syscon = &lt;&amp;opp_efuse_table&gt;;</div><div class='add'>+</div><div class='add'>+		opp-200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-600000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-800000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1000000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0007&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		opp-1250000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1250000000&gt;;</div><div class='add'>+			opp-supported-hw = &lt;0x01 0x0004&gt;;</div><div class='add'>+			clock-latency-ns = &lt;6000000&gt;;</div><div class='add'>+			opp-suspend;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso<br/>index f0b2fd4165a7..1fd0aaff3193 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra-gpio-fan.dtso</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> &amp;thermal_zones {</div><div class='ctx'> 	main0_thermal: main0-thermal {</div><div class='ctx'> 		trips {</div><div class='del'>-			main0_thermal_trip0: main0-thermal-trip {</div><div class='add'>+			main0_fan: main0-fan {</div><div class='ctx'> 				temperature = &lt;65000&gt;;  /* millicelsius */</div><div class='ctx'> 				hysteresis = &lt;2000&gt;;    /* millicelsius */</div><div class='ctx'> 				type = "active";</div><div class='hunk'>@@ -42,7 +42,17 @@</div><div class='ctx'> </div><div class='ctx'> 		cooling-maps {</div><div class='ctx'> 			map0 {</div><div class='del'>-				trip = &lt;&amp;main0_thermal_trip0&gt;;</div><div class='add'>+				trip = &lt;&amp;main0_alert&gt;;</div><div class='add'>+				cooling-device =</div><div class='add'>+					&lt;&amp;fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+					&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			map1 {</div><div class='add'>+				trip = &lt;&amp;main0_fan&gt;;</div><div class='ctx'> 				cooling-device = &lt;&amp;fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi<br/>index e4633af87eb9..aab74d6019b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi</a></div><div class='hunk'>@@ -82,8 +82,8 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sound_master: simple-audio-card,codec {</div><div class='del'>-				sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='del'>-				clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='add'>+			sound-dai = &lt;&amp;audio_codec&gt;;</div><div class='add'>+			clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +112,25 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vcc_3v3_hdmi: regulator-vcc-3v3-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3_HDMI";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sw&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v2_hdmi: regulator-vcc-1v2-hdmi {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "HDMI_CVCC";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vcc_3v3_mmc: regulator-vcc-3v3-mmc {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		regulator-name = "VCC_3V3_MMC";</div><div class='hunk'>@@ -119,6 +138,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='ctx'> 		regulator-boot-on;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc_3v3_sw: regulator-vcc-3v3-sw {</div><div class='hunk'>@@ -214,6 +234,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (D22) MMC1_DAT3 */</div><div class='ctx'> 			AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_rgmii2_pins_default: main-rgmii2-default-pins {</div><div class='hunk'>@@ -238,6 +259,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */</div><div class='ctx'> 			AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='hunk'>@@ -247,6 +269,7 @@</div><div class='ctx'> 			AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */</div><div class='ctx'> 			AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_usb1_pins_default: main-usb1-default-pins {</div><div class='hunk'>@@ -367,6 +390,9 @@</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hdmi_int_pins_default&gt;;</div><div class='ctx'> </div><div class='add'>+		iovcc-supply = &lt;&amp;vcc_3v3_hdmi&gt;;</div><div class='add'>+		cvcc12-supply = &lt;&amp;vcc_1v2_hdmi&gt;;</div><div class='add'>+</div><div class='ctx'> 		ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -376,6 +402,7 @@</div><div class='ctx'> </div><div class='ctx'> 				sii9022_in: endpoint {</div><div class='ctx'> 					remote-endpoint = &lt;&amp;dpi1_out&gt;;</div><div class='add'>+					bus-width = &lt;16&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -393,6 +420,7 @@</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='ctx'> 		pagesize = &lt;16&gt;;</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vcc_3v3_mmc&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -406,12 +434,14 @@</div><div class='ctx'> &amp;main_uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart1_pins_default&gt;;</div><div class='add'>+	bootph-pre-ram;</div><div class='ctx'> 	/* Main UART1 may be used by TIFS firmware */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -433,8 +463,6 @@</div><div class='ctx'> 			0 0 0 0</div><div class='ctx'> 			0 0 0 0</div><div class='ctx'> 	&gt;;</div><div class='del'>-	tx-num-evt = &lt;32&gt;;</div><div class='del'>-	rx-num-evt = &lt;32&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -445,11 +473,13 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	no-1-8-v;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbss0 {</div><div class='ctx'> 	ti,vbus-divider;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -460,6 +490,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;usb0 {</div><div class='ctx'> 	usb-role-switch;</div><div class='add'>+	bootph-all;</div><div class='ctx'> </div><div class='ctx'> 	port {</div><div class='ctx'> 		typec_hs: endpoint {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi<br/>index 44ff67b6bf1e..58f78c0de292 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi</a></div><div class='hunk'>@@ -8,10 +8,11 @@</div><div class='ctx'> #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='del'>-#include "k3-am625.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='add'>+		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;mcu_uart0;</div><div class='ctx'> 		serial2 = &amp;main_uart0;</div><div class='ctx'> 		mmc0 = &amp;sdhci0;</div><div class='ctx'> 		mmc1 = &amp;sdhci1;</div><div class='hunk'>@@ -27,14 +28,7 @@</div><div class='ctx'> 		stdout-path = "serial2:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	memory@80000000 {</div><div class='del'>-		bootph-pre-ram;</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		/* 2G RAM */</div><div class='del'>-		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -56,6 +50,18 @@</div><div class='ctx'> 			linux,cma-default;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@9da00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9da00000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@9db00000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		secure_tfa_ddr: tfa@9e780000 {</div><div class='ctx'> 			reg = &lt;0x00 0x9e780000 0x00 0x80000&gt;;</div><div class='ctx'> 			alignment = &lt;0x1000&gt;;</div><div class='hunk'>@@ -68,11 +74,6 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0x9db00000 0x00 0xc00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -182,22 +183,6 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	main_mmc0_pins_default: main-mmc0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */</div><div class='del'>-			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */</div><div class='del'>-			AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */</div><div class='del'>-			AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */</div><div class='del'>-			AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */</div><div class='del'>-			AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */</div><div class='del'>-			AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */</div><div class='del'>-			AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */</div><div class='del'>-			AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */</div><div class='del'>-			AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='hunk'>@@ -289,6 +274,25 @@</div><div class='ctx'> 			AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	main_ecap0_pins_default: main-ecap0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C13) SPI0_CS1.ECAP0_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ecap2_pins_default: main-ecap2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_epwm1_pins_default: main-epwm1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */</div><div class='add'>+			AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (E18) MCASP0_AXR0.EHRPWM1_B */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_pmx0 {</div><div class='hunk'>@@ -303,6 +307,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpsw_mac_syscon {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;wkup_uart0 {</div><div class='ctx'> 	/* WKUP UART0 is used by DM firmware */</div><div class='ctx'> 	bootph-pre-ram;</div><div class='hunk'>@@ -413,14 +421,6 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;sdhci0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_mmc0_pins_default&gt;;</div><div class='del'>-	disable-wp;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;sdhci1 {</div><div class='ctx'> 	/* SD/MMC */</div><div class='ctx'> 	bootph-all;</div><div class='hunk'>@@ -457,13 +457,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;usbss0 {</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -486,6 +479,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb0_phy_ctrl {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb1 {</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -535,3 +532,26 @@</div><div class='ctx'> &amp;mcu_gpio_intr {</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;ecap0 {</div><div class='add'>+	/* P26 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ecap2 {</div><div class='add'>+	/* P11 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_ecap2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;epwm1 {</div><div class='add'>+	/* P36/P33 of J3 */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_epwm1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am62-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso<br/>index 76ca02127f95..149c59c07182 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso</a></div><div class='hunk'>@@ -15,6 +15,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p2v: regulator-1p2v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P2V";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c2 {</div><div class='hunk'>@@ -22,7 +49,7 @@</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	i2c-switch@71 {</div><div class='add'>+	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9543";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -39,7 +66,10 @@</div><div class='ctx'> 				reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='del'>-				clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+				VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+				VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='ctx'> </div><div class='ctx'> 				reset-gpios = &lt;&amp;exp1 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso<br/>index ccc7f5e43184..fc77fc77fe0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso</a></div><div class='hunk'>@@ -15,6 +15,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;12000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p5v: regulator-1p5v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P5V";</div><div class='add'>+		regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c2 {</div><div class='hunk'>@@ -22,7 +49,7 @@</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	i2c-switch@71 {</div><div class='add'>+	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9543";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -40,6 +67,11 @@</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='ctx'> 				clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+				DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				DVDD-supply = &lt;&amp;reg_1p5v&gt;;</div><div class='add'>+</div><div class='ctx'> 				powerdown-gpios = &lt;&amp;exp1 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 				port {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso<br/>index 4eaf9d757dd0..fe3bc29632fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso</a></div><div class='hunk'>@@ -15,6 +15,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3P3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c2 {</div><div class='hunk'>@@ -22,7 +49,7 @@</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	i2c-switch@71 {</div><div class='add'>+	i2c-mux@71 {</div><div class='ctx'> 		compatible = "nxp,pca9543";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -40,6 +67,11 @@</div><div class='ctx'> </div><div class='ctx'> 				clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='ctx'> 				clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+				AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+				DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+				DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='ctx'> 				powerdown-gpios = &lt;&amp;exp1 13 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'> 				port {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi<br/>index 7eae18399caa..d872cc671094 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am64-main.dtsi</a></div><div class='hunk'>@@ -51,6 +51,11 @@</div><div class='ctx'> 			reg = &lt;0x00000014 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie0_ctrl: pcie-ctrl@4070 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4070 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serdes_ln_ctrl: mux-controller@4080 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='ctx'> 			reg = &lt;0x4080 0x4&gt;;</div><div class='hunk'>@@ -916,6 +921,7 @@</div><div class='ctx'> 			 &lt;0x78200000 0x00 0x78200000 0x08000&gt;,</div><div class='ctx'> 			 &lt;0x78300000 0x00 0x78300000 0x08000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 119 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core0: r5f@78000000 {</div><div class='ctx'> 			compatible = "ti,am64-r5f";</div><div class='hunk'>@@ -930,6 +936,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core1: r5f@78200000 {</div><div class='hunk'>@@ -945,6 +952,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -958,6 +966,7 @@</div><div class='ctx'> 			 &lt;0x78600000 0x00 0x78600000 0x08000&gt;,</div><div class='ctx'> 			 &lt;0x78700000 0x00 0x78700000 0x08000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 120 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core0: r5f@78400000 {</div><div class='ctx'> 			compatible = "ti,am64-r5f";</div><div class='hunk'>@@ -972,6 +981,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core1: r5f@78600000 {</div><div class='hunk'>@@ -987,6 +997,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1031,12 +1042,12 @@</div><div class='ctx'> 		reg = &lt;0x00 0x0f102000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0f100000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x68000000 0x00 0x00001000&gt;;</div><div class='add'>+		      &lt;0x06 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 203 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;main_conf 0x4070&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;2&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1049,8 +1060,8 @@</div><div class='ctx'> 		vendor-id = &lt;0x104c&gt;;</div><div class='ctx'> 		device-id = &lt;0xb010&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='del'>-		ranges = &lt;0x01000000 0x00 0x68001000  0x00 0x68001000  0x00 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x00 0x68011000  0x00 0x68011000  0x00 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x06 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x06 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1175,6 +1186,33 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	eqep0: counter@23200000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23200000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 59 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 59 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 116 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep1: counter@23210000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23210000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 60 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 60 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 117 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eqep2: counter@23220000 {</div><div class='add'>+		compatible = "ti,am62-eqep";</div><div class='add'>+		reg = &lt;0x00 0x23220000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 118 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_rti0: watchdog@e000000 {</div><div class='ctx'> 		compatible = "ti,j7-rti-wdt";</div><div class='ctx'> 		reg = &lt;0x00 0xe000000 0x00 0x100&gt;;</div><div class='hunk'>@@ -1200,6 +1238,15 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x00 0x30000000 0x80000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 81 0&gt;,  /* icssg0_core_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 3&gt;,  /* icssg0_iep_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 16&gt;, /* icssg0_rgmii_mhz_250_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 17&gt;, /* icssg0_rgmii_mhz_50_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 18&gt;, /* icssg0_rgmii_mhz_5_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 19&gt;, /* icssg0_uart_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 81 20&gt;; /* icssg0_iclk */</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 81 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 81 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		icssg0_mem: memories@0 {</div><div class='ctx'> 			reg = &lt;0x0 0x2000&gt;,</div><div class='hunk'>@@ -1225,7 +1272,7 @@</div><div class='ctx'> 					clocks = &lt;&amp;k3_clks 81 0&gt;,  /* icssg0_core_clk */</div><div class='ctx'> 						 &lt;&amp;k3_clks 81 20&gt;; /* icssg0_iclk */</div><div class='ctx'> 					assigned-clocks = &lt;&amp;icssg0_coreclk_mux&gt;;</div><div class='del'>-					assigned-clock-parents = &lt;&amp;k3_clks 81 20&gt;;</div><div class='add'>+					assigned-clock-parents = &lt;&amp;k3_clks 81 0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				icssg0_iepclk_mux: iepclk-mux@30 {</div><div class='hunk'>@@ -1261,6 +1308,11 @@</div><div class='ctx'> 			reg = &lt;0x33000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		icssg0_pa_stats: pa-stats@2c000 {</div><div class='add'>+			compatible = "ti,pruss-pa-st", "syscon";</div><div class='add'>+			reg = &lt;0x2c000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icssg0_intc: interrupt-controller@20000 {</div><div class='ctx'> 			compatible = "ti,icssg-intc";</div><div class='ctx'> 			reg = &lt;0x20000 0x2000&gt;;</div><div class='hunk'>@@ -1365,6 +1417,15 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x00 0x30080000 0x80000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 82 0&gt;,  /* icssg1_core_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 3&gt;,  /* icssg1_iep_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 16&gt;, /* icssg1_rgmii_mhz_250_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 17&gt;, /* icssg1_rgmii_mhz_50_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 18&gt;, /* icssg1_rgmii_mhz_5_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 19&gt;, /* icssg1_uart_clk */</div><div class='add'>+			 &lt;&amp;k3_clks 82 20&gt;; /* icssg1_iclk */</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 82 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 82 2&gt;;</div><div class='ctx'> </div><div class='ctx'> 		icssg1_mem: memories@0 {</div><div class='ctx'> 			reg = &lt;0x0 0x2000&gt;,</div><div class='hunk'>@@ -1390,7 +1451,7 @@</div><div class='ctx'> 					clocks = &lt;&amp;k3_clks 82 0&gt;,   /* icssg1_core_clk */</div><div class='ctx'> 						 &lt;&amp;k3_clks 82 20&gt;;  /* icssg1_iclk */</div><div class='ctx'> 					assigned-clocks = &lt;&amp;icssg1_coreclk_mux&gt;;</div><div class='del'>-					assigned-clock-parents = &lt;&amp;k3_clks 82 20&gt;;</div><div class='add'>+					assigned-clock-parents = &lt;&amp;k3_clks 82 0&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				icssg1_iepclk_mux: iepclk-mux@30 {</div><div class='hunk'>@@ -1426,6 +1487,11 @@</div><div class='ctx'> 			reg = &lt;0x33000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		icssg1_pa_stats: pa-stats@2c000 {</div><div class='add'>+			compatible = "ti,pruss-pa-st", "syscon";</div><div class='add'>+			reg = &lt;0x2c000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icssg1_intc: interrupt-controller@20000 {</div><div class='ctx'> 			compatible = "ti,icssg-intc";</div><div class='ctx'> 			reg = &lt;0x20000 0x2000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi<br/>index ad4bed5d3f9e..a243c981e853 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi</a></div><div class='hunk'>@@ -161,4 +161,17 @@</div><div class='ctx'> 		/* Interrupt sources: esm0_cfg, esm0_hi, esm0_low, mrti0 */</div><div class='ctx'> 		ti,esm-pins = &lt;0&gt;, &lt;1&gt;, &lt;2&gt;, &lt;85&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	mcu_m4fss: m4fss@5000000 {</div><div class='add'>+		compatible = "ti,am64-m4fss";</div><div class='add'>+		reg = &lt;0x00 0x5000000 0x00 0x30000&gt;,</div><div class='add'>+		      &lt;0x00 0x5040000 0x00 0x10000&gt;;</div><div class='add'>+		reg-names = "iram", "dram";</div><div class='add'>+		resets = &lt;&amp;k3_reset 9 1&gt;;</div><div class='add'>+		firmware-name = "am64-mcu-m4f0_0-fw";</div><div class='add'>+		ti,sci = &lt;&amp;dmsc&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;9&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x18 0xff&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi<br/>index 6bece2fb4e95..02ef1dd92eaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> 	memory@80000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved_memory: reserved-memory {</div><div class='hunk'>@@ -40,53 +41,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		main_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		main_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='hunk'>@@ -120,6 +85,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4)	/* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */</div><div class='ctx'> 			AM64X_IOPAD(0x0100, PIN_OUTPUT, 7)	/* (V7) PRG1_PRU0_GPO18.GPIO0_63 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {</div><div class='hunk'>@@ -138,6 +104,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4)	/* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */</div><div class='ctx'> 			AM64X_IOPAD(0x0154, PIN_INPUT, 7)	/* (V12) PRG1_PRU1_GPO19.GPIO0_84 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	eeprom_wp_pins_default: eeprom-wp-default-pins {</div><div class='hunk'>@@ -157,6 +124,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x0260, PIN_INPUT, 0)	/* (A18) I2C0_SCL */</div><div class='ctx'> 			AM64X_IOPAD(0x0264, PIN_INPUT, 0)	/* (B18) I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ospi0_pins_default: ospi0-default-pins {</div><div class='hunk'>@@ -173,6 +141,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x0028, PIN_INPUT, 0)	/* (M17) OSPI0_D7 */</div><div class='ctx'> 			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0)	/* (L19) OSPI0_CSn0 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rtc_pins_default: rtc-defaults-pins {</div><div class='hunk'>@@ -189,62 +158,38 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw3g_mdio {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;cpsw_mdio_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g_phy1: ethernet-phy@1 {</div><div class='ctx'> 		compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='ctx'> 		interrupts = &lt;84 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='del'>-		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;main_gpio0 63 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 		reset-deassert-us = &lt;1000&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy1&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;main_i2c0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	eeprom@50 {</div><div class='ctx'> 		compatible = "atmel,24c32";</div><div class='hunk'>@@ -309,34 +254,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='add'>+&amp;main_pktdma {</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ospi0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	serial_flash: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='hunk'>@@ -349,16 +274,17 @@</div><div class='ctx'> 		cdns,tchsh-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tslch-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,read-delay = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	keep-power-in-suspend;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tscadc0 {</div><div class='hunk'>@@ -367,3 +293,5 @@</div><div class='ctx'> 		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am64-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..6b10646ae64a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am64-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on AM64 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	main_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_m4fss_dma_memory_region: memory@a4000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_m4fss_memory_region: memory@a4100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@a5000000 {</div><div class='add'>+		reg = &lt;0x00 0xa5000000 0x00 0x00800000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster6 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_m4_0: mbox-m4-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_timer8 is used by r5f0-0 */</div><div class='add'>+&amp;main_timer8 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_timer9 is used by r5f0-1 */</div><div class='add'>+&amp;main_timer9 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_timer10 is used by r5f1-0 */</div><div class='add'>+&amp;main_timer10 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* main_timer11 is used by r5f1-1 */</div><div class='add'>+&amp;main_timer11 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_m4fss {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster6 &amp;mbox_m4_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_m4fss_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_m4fss_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso<br/>new file mode 100644<br/>index 000000000000..a7e8d4ea98ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-evm-pcie0-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling PCIE0 instance in Endpoint Configuration with the</div><div class='add'>+ * AM642 EVM.</div><div class='add'>+ *</div><div class='add'>+ * AM642 EVM Product Link: https://www.ti.com/tool/TMDS64EVM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Since Root Complex and Endpoint modes are mutually exclusive</div><div class='add'>+ * disable Root Complex mode.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie0_rc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+	pcie0_ep: pcie-ep@f102000 {</div><div class='add'>+		compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x0f102000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x0f100000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x00 0x68000000 0x00 0x08000000&gt;;</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 203 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		max-link-speed = &lt;2&gt;;</div><div class='add'>+		num-lanes = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 114 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		max-functions = /bits/ 8 &lt;1&gt;;</div><div class='add'>+		phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+		phy-names = "pcie-phy";</div><div class='add'>+		bootph-all;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts<br/>index 97ca16f00cd2..85dcff104936 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-evm.dts</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -53,59 +53,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		main_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		main_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a5000000 {</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x00800000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	evm_12v0: regulator-0 {</div><div class='hunk'>@@ -253,6 +211,7 @@</div><div class='ctx'> 		ti,mii-g-rt = &lt;&amp;icssg1_mii_g_rt&gt;;</div><div class='ctx'> 		ti,mii-rt = &lt;&amp;icssg1_mii_rt&gt;;</div><div class='ctx'> 		ti,iep = &lt;&amp;icssg1_iep0&gt;,  &lt;&amp;icssg1_iep1&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg1_pa_stats&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;icssg1_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;24 0 2&gt;, &lt;25 1 3&gt;;</div><div class='ctx'> 		interrupt-names = "tx_ts0", "tx_ts1";</div><div class='hunk'>@@ -450,7 +409,7 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins{</div><div class='add'>+	icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */</div><div class='ctx'> 			AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */</div><div class='hunk'>@@ -584,7 +543,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -715,67 +673,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='ctx'> 	idle-states = &lt;AM64_SERDES0_LANE0_PCIE0&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -839,3 +736,5 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;icssg1_iep0_pins_default&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am64-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dts<br/>index bd9a5caf20da..023b2a6aaa56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dts</a></div><div class='hunk'>@@ -2,17 +2,19 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2023 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * Overlay for SolidRun AM642 HummingBoard-T to enable PCI-E.</div><div class='add'>+ * DTS for SolidRun AM642 HummingBoard-T,</div><div class='add'>+ * running on Cortex A53, with PCI-E.</div><div class='add'>+ *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/dts-v1/;</div><div class='del'>-/plugin/;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include "k3-am642-hummingboard-t.dts"</div><div class='ctx'> </div><div class='ctx'> #include "k3-serdes.h"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun AM642 HummingBoard-T with PCI-E";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie0_rc {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pcie0_default_pins&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts<br/>index ffcc3bd3c7bc..ee9bd618f370 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts</a></div><div class='hunk'>@@ -2,16 +2,19 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2023 Josua Mayer &lt;josua@solid-run.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1.</div><div class='add'>+ * DTS for SolidRun AM642 HummingBoard-T,</div><div class='add'>+ * running on Cortex A53, with USB-3.1 Gen 1.</div><div class='add'>+ *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/dts-v1/;</div><div class='del'>-/plugin/;</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include "k3-am642-hummingboard-t.dts"</div><div class='ctx'> </div><div class='ctx'> #include "k3-serdes.h"</div><div class='ctx'> </div><div class='add'>+/ {</div><div class='add'>+	model = "SolidRun AM642 HummingBoard-T with USB-3.1 Gen 1";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;serdes0 {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso<br/>new file mode 100644<br/>index 000000000000..7fc73cfacadb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC America LLC</div><div class='add'>+ * Author: Garrett Giordano &lt;ggiordano@phytec.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83869.h&gt;</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet3 = "/icssg1-ethernet/ethernet-ports/port@0";</div><div class='add'>+		ethernet4 = "/icssg1-ethernet/ethernet-ports/port@1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	icssg1-ethernet {</div><div class='add'>+		compatible = "ti,am642-icssg-prueth";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;icssg1_rgmii1_pins_default&gt;, &lt;&amp;icssg1_rgmii2_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+		dmas = &lt;&amp;main_pktdma 0xc200 15&gt;, /* egress slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc201 15&gt;, /* egress slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc202 15&gt;, /* egress slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc203 15&gt;, /* egress slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc204 15&gt;, /* egress slice 1 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc205 15&gt;, /* egress slice 1 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc206 15&gt;, /* egress slice 1 */</div><div class='add'>+				&lt;&amp;main_pktdma 0xc207 15&gt;, /* egress slice 1 */</div><div class='add'>+				&lt;&amp;main_pktdma 0x4200 15&gt;, /* ingress slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0x4201 15&gt;, /* ingress slice 1 */</div><div class='add'>+				&lt;&amp;main_pktdma 0x4202 0&gt;, /* mgmnt rsp slice 0 */</div><div class='add'>+				&lt;&amp;main_pktdma 0x4203 0&gt;; /* mgmnt rsp slice 1 */</div><div class='add'>+		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",</div><div class='add'>+					"tx1-0", "tx1-1", "tx1-2", "tx1-3",</div><div class='add'>+					"rx0", "rx1",</div><div class='add'>+					"rxmgm0", "rxmgm1";</div><div class='add'>+</div><div class='add'>+		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",</div><div class='add'>+				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",</div><div class='add'>+				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",</div><div class='add'>+				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",</div><div class='add'>+				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",</div><div class='add'>+				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;icssg1_intc&gt;;</div><div class='add'>+		interrupts = &lt;24 0 2&gt;, &lt;25 1 3&gt;;</div><div class='add'>+		interrupt-names = "tx_ts0", "tx_ts1";</div><div class='add'>+		sram = &lt;&amp;oc_sram&gt;;</div><div class='add'>+</div><div class='add'>+		ti,iep = &lt;&amp;icssg1_iep0&gt;, &lt;&amp;icssg1_iep1&gt;;</div><div class='add'>+		ti,mii-g-rt = &lt;&amp;icssg1_mii_g_rt&gt;;</div><div class='add'>+		ti,mii-rt = &lt;&amp;icssg1_mii_rt&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg1_pa_stats&gt;;</div><div class='add'>+		ti,prus = &lt;&amp;pru1_0&gt;, &lt;&amp;rtu1_0&gt;, &lt;&amp;tx_pru1_0&gt;, &lt;&amp;pru1_1&gt;, &lt;&amp;rtu1_1&gt;, &lt;&amp;tx_pru1_1&gt;;</div><div class='add'>+		ti,pruss-gp-mux-sel = &lt;2&gt;,	/* MII mode */</div><div class='add'>+				      &lt;2&gt;,</div><div class='add'>+				      &lt;2&gt;,</div><div class='add'>+				      &lt;2&gt;,	/* MII mode */</div><div class='add'>+				      &lt;2&gt;,</div><div class='add'>+				      &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		ethernet-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			icssg1_emac0: port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				phy-handle = &lt;&amp;icssg1_phy1&gt;;</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				/* Filled in by bootloader */</div><div class='add'>+				local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+				ti,syscon-rgmii-delay = &lt;&amp;main_conf 0x4110&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			icssg1_emac1: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				phy-handle = &lt;&amp;icssg1_phy2&gt;;</div><div class='add'>+				phy-mode = "rgmii-id";</div><div class='add'>+				/* Filled in by bootloader */</div><div class='add'>+				local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+				ti,syscon-rgmii-delay = &lt;&amp;main_conf 0x4114&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	icssg1_mdio_pins_default: icssg1-mdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* (Y6) PRG1_MDIO0_MDC */</div><div class='add'>+			AM64X_IOPAD(0x0158, PIN_INPUT, 0)  /* (AA6) PRG1_MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */</div><div class='add'>+			AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */</div><div class='add'>+			AM64X_IOPAD(0x00c0, PIN_INPUT, 2) /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */</div><div class='add'>+			AM64X_IOPAD(0x00c4, PIN_INPUT, 2) /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */</div><div class='add'>+			AM64X_IOPAD(0x00d0, PIN_INPUT, 2) /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */</div><div class='add'>+			AM64X_IOPAD(0x00c8, PIN_INPUT, 2) /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */</div><div class='add'>+			AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */</div><div class='add'>+			AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */</div><div class='add'>+			AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */</div><div class='add'>+			AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2) /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */</div><div class='add'>+			AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */</div><div class='add'>+			AM64X_IOPAD(0x00f8, PIN_INPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */</div><div class='add'>+			AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */</div><div class='add'>+			AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */</div><div class='add'>+			AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */</div><div class='add'>+			AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */</div><div class='add'>+			AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */</div><div class='add'>+			AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.PRG1_RGMII2_TD0 */</div><div class='add'>+			AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.PRG1_RGMII2_TD1 */</div><div class='add'>+			AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.PRG1_RGMII2_TD2 */</div><div class='add'>+			AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.PRG1_RGMII2_TD3 */</div><div class='add'>+			AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.PRG1_RGMII2_TX_CTL */</div><div class='add'>+			AM64X_IOPAD(0x0148, PIN_INPUT, 2) /* (Y10) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;icssg1_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;icssg1_mdio_pins_default&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	icssg1_phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;0x1&gt;;</div><div class='add'>+		rx-fifo-depth = &lt;DP83869_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		tx-fifo-depth = &lt;DP83869_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+		tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83869_CLK_O_SEL_REF_CLK&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	icssg1_phy2: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;0x2&gt;;</div><div class='add'>+		rx-fifo-depth = &lt;DP83869_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		tx-fifo-depth = &lt;DP83869_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+		tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83869_CLK_O_SEL_REF_CLK&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts<br/>index 60285d736e07..e4afa8c0a8ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts</a></div><div class='hunk'>@@ -100,6 +100,7 @@</div><div class='ctx'> 		ti,mii-g-rt = &lt;&amp;icssg0_mii_g_rt&gt;;</div><div class='ctx'> 		ti,mii-rt = &lt;&amp;icssg0_mii_rt&gt;;</div><div class='ctx'> 		ti,iep = &lt;&amp;icssg0_iep0&gt;, &lt;&amp;icssg0_iep1&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg0_pa_stats&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ethernet-ports {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -171,6 +172,7 @@</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		regulator-always-on;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -275,6 +277,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0)	/* (J19) MMC1_CMD */</div><div class='ctx'> 			AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0)	/* (D19) MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_spi0_pins_default: main-spi0-default-pins {</div><div class='hunk'>@@ -291,6 +294,7 @@</div><div class='ctx'> 			AM64X_IOPAD(0x0230, PIN_INPUT, 0)	/* (D15) UART0_RXD */</div><div class='ctx'> 			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0)	/* (C16) UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='hunk'>@@ -319,6 +323,8 @@</div><div class='ctx'> &amp;icssg0_mdio {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;icssg0_mdio_pins_default &amp;clkout0_pins_default&gt;;</div><div class='add'>+	assigned-clocks = &lt;&amp;k3_clks 157 123&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;k3_clks 157 125&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	icssg0_phy1: ethernet-phy@1 {</div><div class='hunk'>@@ -344,11 +350,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c_som_rtc {</div><div class='add'>+	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_i2c1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c1_pins_default&gt;;</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	eeprom@51 {</div><div class='ctx'> 		compatible = "atmel,24c02";</div><div class='hunk'>@@ -378,25 +388,25 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_mcan0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mcan0_pins_default&gt;;</div><div class='ctx'> 	phys = &lt;&amp;can_tc1&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_mcan1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mcan1_pins_default&gt;;</div><div class='ctx'> 	phys = &lt;&amp;can_tc2&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_spi0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_spi0_pins_default&gt;;</div><div class='ctx'> 	cs-gpios = &lt;0&gt;, &lt;&amp;main_gpio1 43 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	ti,pindir-d0-out-d1-in;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	tpm@1 {</div><div class='ctx'> 		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='hunk'>@@ -406,26 +416,27 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart0 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart1_pins_default&gt;;</div><div class='ctx'> 	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci1 {</div><div class='del'>-	status = "okay";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3_mmc&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	no-1-8-v;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso<br/>new file mode 100644<br/>index 000000000000..996c42ec4253<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Authors:</div><div class='add'>+ *   Wadim Egorov &lt;w.egorov@phytec.de&gt;</div><div class='add'>+ *   Daniel Schultz &lt;d.schultz@phytec.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * GPIO, SPI and UART examples for the X27 expansion connector.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	aliases {</div><div class='add'>+		serial5 = "/bus@f4000/serial@2830000";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-pins-default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x0220, PIN_INPUT, 7)	/* (D14) SPI1_CS1.GPIO1_48 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi1_pins_default: main-spi1-pins-default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x0224, PIN_INPUT, 0)	/* (C14) SPI1_CLK */</div><div class='add'>+			AM64X_IOPAD(0x021C, PIN_OUTPUT, 0)	/* (B14) SPI1_CS0 */</div><div class='add'>+			AM64X_IOPAD(0x0228, PIN_OUTPUT, 0)	/* (B15) SPI1_D0 */</div><div class='add'>+			AM64X_IOPAD(0x022C, PIN_INPUT, 0)	/* (A15) SPI1_D1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart3_pins_default: main-uart3-pins-default {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x0048, PIN_INPUT, 2)       /* (U20) GPMC0_AD3.UART3_RXD */</div><div class='add'>+			AM64X_IOPAD(0x004c, PIN_OUTPUT, 2)      /* (U18) GPMC0_AD4.UART3_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_gpio1_exp_header_gpio_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_spi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_spi1_pins_default&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart3 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart3_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts<br/>index 86369525259c..1fb1b91a1bad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-sk.dts</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -51,59 +51,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		main_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		main_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a5000000 {</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x00800000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vusb_main: regulator-0 {</div><div class='hunk'>@@ -357,6 +315,16 @@</div><div class='ctx'> 			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	main_eqep0_pins_default: main-eqep0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */</div><div class='add'>+			AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */</div><div class='add'>+			AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */</div><div class='add'>+			AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_wlan_en_pins_default: main-wlan-en-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */</div><div class='hunk'>@@ -620,70 +588,18 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ecap0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	/* PWM is available on Pin 1 of header J3 */</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_ecap0_pins_default&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;eqep0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* EQEP0 A &amp; B available on pins 18 &amp; 22 of J4 header */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_eqep0_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am64-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi<br/>index a5cec9a07510..fcbcc04521b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi</a></div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -115,53 +115,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		main_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		main_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_mmc0: regulator-vdd-mmc0 {</div><div class='hunk'>@@ -263,34 +227,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;main_i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c0_default_pins&gt;;</div><div class='hunk'>@@ -488,30 +424,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* SoC default UART console */</div><div class='ctx'> &amp;main_uart0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -590,3 +502,5 @@</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> 	ti,usb2-only;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am64-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts<br/>index e06a3b178b34..8f64d6272b1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts</a></div><div class='hunk'>@@ -201,8 +201,6 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;main_gpio0 44 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 		reset-deassert-us = &lt;1000&gt;;</div><div class='del'>-		ti,rx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,tx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -230,8 +228,6 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;main_gpio1 47 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 		reset-deassert-us = &lt;1000&gt;;</div><div class='del'>-		ti,rx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,tx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -242,8 +238,6 @@</div><div class='ctx'> 		reset-gpios = &lt;&amp;main_gpio1 51 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		reset-assert-us = &lt;1000&gt;;</div><div class='ctx'> 		reset-deassert-us = &lt;1000&gt;;</div><div class='del'>-		ti,rx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,tx-fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi<br/>index 828d815d6bdf..ff3b2e0b8dd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -31,59 +31,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		main_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		main_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a5000000 {</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x00800000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reg_1v8: regulator-1v8 {</div><div class='hunk'>@@ -130,67 +88,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster6 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_m4_0: mbox-m4-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 2&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ospi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -264,3 +161,5 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am64-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi<br/>index e5136ed94765..42ba3dab2fc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> 		stdout-path = "serial3:115200n8";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -47,36 +47,18 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0xa0000000 0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0xa0100000 0 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0xa1000000 0 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0xa1100000 0 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a2000000 {</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x00200000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 		/* To reserve the power-on(PON) reason for watchdog reset */</div><div class='ctx'> 		wdt_reset_memory_region: wdt-memory@a2200000 {</div><div class='ctx'> 			reg = &lt;0x00 0xa2200000 0x00 0x1000&gt;;</div><div class='hunk'>@@ -582,38 +564,6 @@</div><div class='ctx'> 	reset-gpios = &lt;&amp;wkup_gpio0 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;mcu_rti1 {</div><div class='ctx'> 	memory-region = &lt;&amp;wdt_reset_memory_region&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -686,3 +636,9 @@</div><div class='ctx'> 	/* lock-step mode not supported on iot2050 boards */</div><div class='ctx'> 	ti,cluster-mode = &lt;0&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-am65-ti-ipc-firmware.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;rtos_ipc_memory_region {</div><div class='add'>+	reg = &lt;0x00 0xa2000000 0x00 0x00200000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi<br/>index 1f1af7ea2330..61c11dc92d9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am65-main.dtsi</a></div><div class='hunk'>@@ -449,6 +449,8 @@</div><div class='ctx'> 		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='ctx'> 		ti,otap-del-sel-ddr52 = &lt;0x5&gt;;</div><div class='ctx'> 		ti,otap-del-sel-hs200 = &lt;0x5&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0xa&gt;;</div><div class='add'>+		ti,itap-del-sel-mmc-hs = &lt;0x1&gt;;</div><div class='ctx'> 		ti,itap-del-sel-ddr52 = &lt;0x0&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='ctx'> 		status = "disabled";</div><div class='hunk'>@@ -479,7 +481,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	scm_conf: scm-conf@100000 {</div><div class='del'>-		compatible = "syscon", "simple-mfd";</div><div class='add'>+		compatible = "ti,am654-system-controller", "syscon", "simple-mfd";</div><div class='ctx'> 		reg = &lt;0 0x00100000 0 0x1c000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -653,6 +655,7 @@</div><div class='ctx'> 			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='ctx'> 			interrupt-names = "rx_011";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hwspinlock: spinlock@30e00000 {</div><div class='hunk'>@@ -1167,6 +1170,11 @@</div><div class='ctx'> 			reg = &lt;0x33000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		icssg0_pa_stats: pa-stats@2c000 {</div><div class='add'>+			compatible = "ti,pruss-pa-st", "syscon";</div><div class='add'>+			reg = &lt;0x2c000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icssg0_intc: interrupt-controller@20000 {</div><div class='ctx'> 			compatible = "ti,icssg-intc";</div><div class='ctx'> 			reg = &lt;0x20000 0x2000&gt;;</div><div class='hunk'>@@ -1333,6 +1341,11 @@</div><div class='ctx'> 			reg = &lt;0x33000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		icssg1_pa_stats: pa-stats@2c000 {</div><div class='add'>+			compatible = "ti,pruss-pa-st", "syscon";</div><div class='add'>+			reg = &lt;0x2c000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icssg1_intc: interrupt-controller@20000 {</div><div class='ctx'> 			compatible = "ti,icssg-intc";</div><div class='ctx'> 			reg = &lt;0x20000 0x2000&gt;;</div><div class='hunk'>@@ -1499,6 +1512,11 @@</div><div class='ctx'> 			reg = &lt;0x33000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		icssg2_pa_stats: pa-stats@2c000 {</div><div class='add'>+			compatible = "ti,pruss-pa-st", "syscon";</div><div class='add'>+			reg = &lt;0x2c000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		icssg2_intc: interrupt-controller@20000 {</div><div class='ctx'> 			compatible = "ti,icssg-intc";</div><div class='ctx'> 			reg = &lt;0x20000 0x2000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi<br/>index 7cf1f646500a..f6d9a5779918 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi</a></div><div class='hunk'>@@ -408,6 +408,7 @@</div><div class='ctx'> 		ranges = &lt;0x41000000 0x00 0x41000000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x41400000 0x00 0x41400000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 129 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core0: r5f@41000000 {</div><div class='ctx'> 			compatible = "ti,am654-r5f";</div><div class='hunk'>@@ -422,6 +423,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core1: r5f@41400000 {</div><div class='hunk'>@@ -437,6 +439,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..61ab0357fc0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am65-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on AM65 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0 0xa1000000 0 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0 0xa1100000 0 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@a2000000 {</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x00100000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;436&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;432&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi<br/>index eee072e44a42..d62a0be767c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi</a></div><div class='hunk'>@@ -21,16 +21,19 @@</div><div class='ctx'> 		k3_pds: power-controller {</div><div class='ctx'> 			compatible = "ti,sci-pm-domain";</div><div class='ctx'> 			#power-domain-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_clks: clock-controller {</div><div class='ctx'> 			compatible = "ti,k2g-sci-clk";</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_reset: reset-controller {</div><div class='ctx'> 			compatible = "ti,sci-reset";</div><div class='ctx'> 			#reset-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +46,7 @@</div><div class='ctx'> 		chipid: chipid@14 {</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -107,5 +111,6 @@</div><div class='ctx'> 		reg = &lt;0x42050000 0x25c&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 80 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso b/arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso<br/>index 364c57b3b3a0..7a3953d64fd8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-base-board-rocktech-rk101-panel.dtso</a></div><div class='hunk'>@@ -15,8 +15,20 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> &amp;{/} {</div><div class='add'>+	vcc_5v0: lcd-regulator {</div><div class='add'>+		/* Output of LM5140 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vcc_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;evm_12v0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	display0 {</div><div class='ctx'> 		compatible = "rocktech,rk101ii01d-ct";</div><div class='add'>+		power-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='ctx'> 		backlight = &lt;&amp;lcd_bl&gt;;</div><div class='ctx'> 		enable-gpios = &lt;&amp;pca9555 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		port {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts<br/>index aa7139cc8a92..0c42c486d83a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-base-board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-base-board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-base-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-base-board.dts</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> 		      &lt;0x00000008 0x80000000 0x00000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	reserved-memory {</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='hunk'>@@ -50,35 +50,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0xa0000000 0 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0 0xa0100000 0 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0xa1000000 0 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0 0xa1100000 0 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a2000000 {</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x00100000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='hunk'>@@ -144,6 +126,7 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 		vin-supply = &lt;&amp;vcc3v3_io&gt;;</div><div class='ctx'> 		gpio = &lt;&amp;wkup_gpio0 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -155,12 +138,14 @@</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1)	/* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1)	/* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ddr_vtt_pins_default: ddr-vtt-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7)	/* WKUP_GPIO0_28 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='hunk'>@@ -168,6 +153,7 @@</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	push_button_pins_default: push-button-default-pins {</div><div class='hunk'>@@ -191,6 +177,7 @@</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_pca554_default: wkup-pca554-default-pins {</div><div class='hunk'>@@ -206,6 +193,7 @@</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4)	/* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */</div><div class='ctx'> 			AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4)	/* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='hunk'>@@ -248,6 +236,7 @@</div><div class='ctx'> 			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */</div><div class='ctx'> 			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='hunk'>@@ -281,6 +270,7 @@</div><div class='ctx'> 			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */</div><div class='ctx'> 			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='hunk'>@@ -294,6 +284,7 @@</div><div class='ctx'> 			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */</div><div class='ctx'> 			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb1_pins_default: usb1-default-pins {</div><div class='hunk'>@@ -343,6 +334,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_i2c0 {</div><div class='hunk'>@@ -368,6 +360,7 @@</div><div class='ctx'> 		ti,vsel0-state-high;</div><div class='ctx'> 		ti,vsel1-state-high;</div><div class='ctx'> 		ti,enable-vout-discharge;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio@38 {</div><div class='hunk'>@@ -456,7 +449,7 @@</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -471,6 +464,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb1 {</div><div class='hunk'>@@ -509,38 +503,6 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ospi0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -631,3 +593,9 @@</div><div class='ctx'> &amp;dss {</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wkup_gpio0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-am65-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso<br/>index 0a6e75265ba9..66bb0b913d49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> </div><div class='ctx'> 		ti,mii-g-rt = &lt;&amp;icssg2_mii_g_rt&gt;;</div><div class='ctx'> 		ti,mii-rt = &lt;&amp;icssg2_mii_rt&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg2_pa_stats&gt;;</div><div class='ctx'> 		ti,iep = &lt;&amp;icssg2_iep0&gt;, &lt;&amp;icssg2_iep1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupt-parent = &lt;&amp;icssg2_intc&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-idk.dtso b/arch/arm64/boot/dts/ti/k3-am654-idk.dtso<br/>index b0ce2cb2fdc8..6cb44dae9f90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-idk.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-idk.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-idk.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-idk.dtso</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> </div><div class='ctx'> 		ti,mii-g-rt = &lt;&amp;icssg0_mii_g_rt&gt;;</div><div class='ctx'> 		ti,mii-rt = &lt;&amp;icssg0_mii_rt&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg0_pa_stats&gt;;</div><div class='ctx'> 		ti,iep = &lt;&amp;icssg0_iep0&gt;,  &lt;&amp;icssg0_iep1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupt-parent = &lt;&amp;icssg0_intc&gt;;</div><div class='hunk'>@@ -109,6 +110,7 @@</div><div class='ctx'> </div><div class='ctx'> 		ti,mii-g-rt = &lt;&amp;icssg1_mii_g_rt&gt;;</div><div class='ctx'> 		ti,mii-rt = &lt;&amp;icssg1_mii_rt&gt;;</div><div class='add'>+		ti,pa-stats = &lt;&amp;icssg1_pa_stats&gt;;</div><div class='ctx'> 		ti,iep = &lt;&amp;icssg1_iep0&gt;,  &lt;&amp;icssg1_iep1&gt;;</div><div class='ctx'> </div><div class='ctx'> 		interrupt-parent = &lt;&amp;icssg1_intc&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso<br/>index c3cb752f8cd7..d04dd7a44008 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso</a></div><div class='hunk'>@@ -46,6 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;dwc3_0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb0_phy {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso<br/>index 333e423e8bb6..04393f21d712 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> 	&lt;&amp;k3_clks 151 8&gt;;      /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */</div><div class='ctx'> 	phys = &lt;&amp;serdes0 PHY_TYPE_USB3 0&gt;;</div><div class='ctx'> 	phy-names = "usb3-phy";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi<br/>index ae842b85b70d..12af6cb7f65c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi</a></div><div class='hunk'>@@ -50,5 +50,4 @@</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts<br/>index b829f4bcab69..adf4da7dfa2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts</a></div><div class='hunk'>@@ -145,7 +145,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_spi0_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells= &lt;0&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_spi0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts<br/>index 44dfbdf89277..b697035df04e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts</a></div><div class='hunk'>@@ -50,7 +50,13 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='hunk'>@@ -249,6 +255,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio1 {</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -391,3 +398,5 @@</div><div class='ctx'> 	ti,fails-without-test-cd;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-j722s-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts<br/>new file mode 100644<br/>index 000000000000..41c8f8526e15<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts</a></div><div class='hunk'>@@ -0,0 +1,575 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Dominik Haller &lt;d.haller@phytec.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-cadence.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include "k3-am68-phycore-som.dtsi"</div><div class='add'>+</div><div class='add'>+#include "k3-serdes.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "phytec,am68-phyboard-izar",</div><div class='add'>+		     "phytec,am68-phycore-som", "ti,j721s2";</div><div class='add'>+	model = "PHYTEC phyBOARD-Izar-AM68x";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;mcu_uart0;</div><div class='add'>+		serial1 = &amp;main_uart1;</div><div class='add'>+		serial2 = &amp;main_uart8;</div><div class='add'>+		serial3 = &amp;main_uart2;</div><div class='add'>+		mmc1 = &amp;main_sdhci1;</div><div class='add'>+		ethernet0 = &amp;cpsw_port1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = &amp;main_uart8;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver1: can-phy1 {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver2: can-phy2 {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver3: can-phy3 {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver4: can-phy4 {</div><div class='add'>+		compatible = "ti,tcan1043";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_12v0: regulator-12v0 {</div><div class='add'>+		/* main supply */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_IN";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_1v8: regulator-vcc-1v8 {</div><div class='add'>+		/* Output of TLV7158P */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_1V8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_3v3: regulator-vcc-3v3 {</div><div class='add'>+		/* Output of SiC431 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_3V3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_5v0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcc_5v0: regulator-vcc-5v0 {</div><div class='add'>+		/* Output of LM5116 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VCC_5V0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vcc_12v0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x04c, PIN_INPUT_PULLUP, 13) /* (V27) MCASP1_AXR1.I2C2_SCL */</div><div class='add'>+			J721S2_IOPAD(0x050, PIN_INPUT_PULLUP, 13) /* (W27) MCASP1_AXR2.I2C2_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c4_pins_default: main-i2c4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */</div><div class='add'>+			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c5_pins_default: main-i2c5-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 8) /* (Y24) MCAN15_TX.I2C5_SCL */</div><div class='add'>+			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 8) /* (W23) MCAN14_RX.I2C5_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan1_pins_default: main-mcan1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0c8, PIN_INPUT, 4) /* (AD28) EXT_REFCLK1.MCAN1_RX */</div><div class='add'>+			J721S2_IOPAD(0x06c, PIN_OUTPUT, 0) /* (V26) MCAN1_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan13_pins_default: main-mcan13-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0ec, PIN_INPUT, 9) /* (AG25) TIMER_IO1.MCAN13_RX */</div><div class='add'>+			J721S2_IOPAD(0x00c, PIN_OUTPUT, 0) /* (AE28) MCAN13_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan16_pins_default: main-mcan16-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */</div><div class='add'>+			J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */</div><div class='add'>+			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */</div><div class='add'>+			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */</div><div class='add'>+			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */</div><div class='add'>+			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */</div><div class='add'>+			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */</div><div class='add'>+			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */</div><div class='add'>+			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi6_pins_default: main-spi6-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x030, PIN_INPUT, 8) /* (T26) GPIO0_12.SPI6_CLK */</div><div class='add'>+			J721S2_IOPAD(0x080, PIN_INPUT, 8) /* (U26) MCASP0_AXR4.SPI6_CS2 */</div><div class='add'>+			J721S2_IOPAD(0x0c4, PIN_OUTPUT, 8) /* (AB26) ECAP0_IN_APWM_OUT.SPI6_D0 */</div><div class='add'>+			J721S2_IOPAD(0x074, PIN_INPUT, 8) /* (R28) MCAN2_TX.SPI6_D1 */</div><div class='add'>+			J721S2_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (AH26) SPI0_D1.GPIO0_55 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart1_pins_default: main-uart1-default-pins {</div><div class='add'>+			pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x05c, PIN_INPUT, 11) /* (AA26) MCASP2_AXR0.UART1_CTSn */</div><div class='add'>+			J721S2_IOPAD(0x060, PIN_OUTPUT, 11) /* (AC27) MCASP2_AXR1.UART1_RTSn */</div><div class='add'>+			J721S2_IOPAD(0x054, PIN_INPUT, 11) /* (Y27) MCASP2_ACLKX.UART1_RXD */</div><div class='add'>+			J721S2_IOPAD(0x058, PIN_OUTPUT, 11) /* (AA27) MCASP2_AFSX.UART1_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart2_pins_default: main-uart2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0d8, PIN_INPUT, 11) /* (AG26) SPI0_D0.UART2_RXD */</div><div class='add'>+			J721S2_IOPAD(0x068, PIN_OUTPUT, 11) /* (U28) MCAN0_RX.UART2_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart8_pins_default: main-uart8-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */</div><div class='add'>+			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx1 {</div><div class='add'>+	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx2 {</div><div class='add'>+	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_i2c1_pins_default: mcu-i2c1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mdio_pins_default: mcu-mdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_spi0_pins_default: mcu-spi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x038, PIN_INPUT, 0) /* (B27) MCU_SPI0_CLK */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B26) MCU_SPI0_CS0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x068, PIN_INPUT, 2) /* (C23) WKUP_GPIO0_4.MCU_SPI0_CS3 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x03c, PIN_INPUT, 0) /* (D24) MCU_SPI0_D0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 0) /* (B25) MCU_SPI0_D1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_uart0_pins_default: mcu-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_port1 {</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;davinci_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_mdio_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c_som_rtc {</div><div class='add'>+	trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	exp1: gpio@20 {</div><div class='add'>+		compatible = "nxp,pca9672";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "HALF/nFULL_EN", "RS485/nRS232_EN", "MCU_ETH_nRESET", "",</div><div class='add'>+				"PCIe_nRESET", "USB2.0-Hub_nRESET", "USB3.0-Hub_nRESET", "PEB_AV_BL_EN";</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	exp2: gpio@22 {</div><div class='add'>+		compatible = "ti,tca6424";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "RPI_GPIO4", "RPI_GPIO5", "RPI_GPIO6", "RPI_GPIO19",</div><div class='add'>+				"RPI_GPIO20", "RPI_GPIO21", "RPI_GPIO22", "RPI_GPIO23",</div><div class='add'>+				"RPI_GPIO24", "RPI_GPIO25", "RPI_GPIO26", "RPI_GPIO20",</div><div class='add'>+				"LVDS_BL_nEN", "LVDS_REG_nEN", "CSI_CAM0_nRESET", "CSI_CAM1_nRESET",</div><div class='add'>+				"CSI0_CTRL1", "CSI0_CTRL2", "CSI0_CTRL3", "CSI0_CTRL4",</div><div class='add'>+				"CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3", "CSI1_CTRL4";</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;main_gpio0_ioexp_intr_pins_default&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CSI0 + RPI */</div><div class='add'>+&amp;main_i2c4 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c4_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CSI1 + PCIe */</div><div class='add'>+&amp;main_i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c5_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcan1_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan13 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcan13_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan16 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcan16_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD-Card */</div><div class='add'>+&amp;main_sdhci1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	disable-wp;</div><div class='add'>+	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_spi6 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_spi6_pins_default&gt;;</div><div class='add'>+	cs-gpios = &lt;&amp;main_gpio0 55 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	ti,spi-num-cs = &lt;1&gt;;</div><div class='add'>+	ti,pindir-d0-out-d1-in;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	tpm@0 {</div><div class='add'>+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart1_pins_default&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart2 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart2_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart8 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart8_pins_default&gt;;</div><div class='add'>+	/* Shared with TFA on this platform */</div><div class='add'>+	power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_cpsw {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_cpsw_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_i2c1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_i2c1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_mcan0_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RPI-Header */</div><div class='add'>+&amp;mcu_spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_spi0_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RPI-Header */</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_fss0_ospi1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_rc {</div><div class='add'>+	num-lanes = &lt;1&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	reset-gpios = &lt;&amp;exp1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_ln_ctrl {</div><div class='add'>+	idle-states = &lt;J721S2_SERDES0_LANE0_PCIE1_LANE0&gt;, &lt;J721S2_SERDES0_LANE1_USB&gt;,</div><div class='add'>+		      &lt;J721S2_SERDES0_LANE2_EDP_LANE2&gt;, &lt;J721S2_SERDES0_LANE3_EDP_LANE3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_refclk {</div><div class='add'>+	clock-frequency = &lt;100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	serdes0_pcie_link: phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;1&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 1&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes0_usb_link: phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;1&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 2&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tscadc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc {</div><div class='add'>+		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tscadc1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	adc {</div><div class='add'>+		ti,adc-channels = &lt;3 4 5 6 7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	phys = &lt;&amp;serdes0_usb_link&gt;;</div><div class='add'>+	phy-names = "cdns3,usb3-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_serdes_mux {</div><div class='add'>+	idle-states = &lt;1&gt;; /* USB0 to SERDES lane 1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_i2c0 {</div><div class='add'>+	eeprom@57 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x57&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	led-controller@62 {</div><div class='add'>+		compatible = "nxp,pca9533";</div><div class='add'>+		reg = &lt;0x62&gt;;</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			label = "user-led1";</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			label = "user-led2";</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			label = "user-led3";</div><div class='add'>+			type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Shared with TIFS */</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi<br/>new file mode 100644<br/>index 000000000000..adef02bd8040<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi</a></div><div class='hunk'>@@ -0,0 +1,370 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH</div><div class='add'>+ * Author: Dominik Haller &lt;d.haller@phytec.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include "k3-j721s2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "phytec,am68-phycore-som", "ti,j721s2";</div><div class='add'>+	model = "PHYTEC phyCORE-AM68x";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet1 = &amp;main_cpsw_port1;</div><div class='add'>+		mmc0 = &amp;main_sdhci0;</div><div class='add'>+		rtc0 = &amp;i2c_som_rtc;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		/* 4GB RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='add'>+		      &lt;0x00000008 0x80000000 0x00000000 0x80000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		/* global cma region */</div><div class='add'>+		linux,cma {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reusable;</div><div class='add'>+			size = &lt;0x00 0x20000000&gt;;</div><div class='add'>+			linux,cma-default;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;;</div><div class='add'>+			alignment = &lt;0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv: regulator-sd {</div><div class='add'>+		/* Output of TLV71033 */</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "VDD_SD_DV";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;3300000 0x0&gt;,</div><div class='add'>+			 &lt;1800000 0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_cpsw_mdio_pins_default: main-cpsw-mdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */</div><div class='add'>+			J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */</div><div class='add'>+			J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rgmii1_pins_default: rgmii1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */</div><div class='add'>+			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */</div><div class='add'>+			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */</div><div class='add'>+			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */</div><div class='add'>+			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */</div><div class='add'>+			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */</div><div class='add'>+			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */</div><div class='add'>+			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */</div><div class='add'>+			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */</div><div class='add'>+			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */</div><div class='add'>+			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */</div><div class='add'>+			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x004, PIN_OUTPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx0 {</div><div class='add'>+	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx1 {</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx2 {</div><div class='add'>+	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SCL */</div><div class='add'>+			J721S2_WKUP_IOPAD(0x09c, PIN_INPUT_PULLUP, 0) /* (H27) WKUP_I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;rgmii1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_cpsw_mdio_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,clk-output-sel = &lt;DP83867_CLK_O_SEL_OFF&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw_port1 {</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	temperature-sensor@49 {</div><div class='add'>+		compatible = "ti,tmp102";</div><div class='add'>+		reg = &lt;0x49&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c_som_rtc: rtc@52 {</div><div class='add'>+		compatible = "microcrystal,rv3028";</div><div class='add'>+		reg = &lt;0x52&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* eMMC */</div><div class='add'>+&amp;main_sdhci0 {</div><div class='add'>+	non-removable;</div><div class='add'>+	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SD card */</div><div class='add'>+&amp;main_sdhci1 {</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_fss0_ospi0_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	serial_flash: flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	vdd_cpu_avs: regulator@40 {</div><div class='add'>+		compatible = "ti,tps62873";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		regulator-name = "VDD_CPU_AVS";</div><div class='add'>+		regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmic@48 {</div><div class='add'>+		compatible = "ti,tps6594-q1";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;wkup_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;39 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		buck12-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		buck4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		buck5-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		ldo1-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		ldo3-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		ldo4-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+		ti,primary-pmic;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			bucka12: buck12 {</div><div class='add'>+				regulator-name = "VDD_DDR_1V1";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka3: buck3 {</div><div class='add'>+				regulator-name = "VDD_RAM_0V85";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka4: buck4 {</div><div class='add'>+				regulator-name = "VDD_IO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka5: buck5 {</div><div class='add'>+				regulator-name = "VDD_MCU_0V85";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa1: ldo1 {</div><div class='add'>+				regulator-name = "VDD_MCUIO_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa2: ldo2 {</div><div class='add'>+				regulator-name = "VDD_MCUIO_3V3";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa3: ldo3 {</div><div class='add'>+				regulator-name = "VDDA_DLL_0V8";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa4: ldo4 {</div><div class='add'>+				regulator-name = "VDDA_MCU_1V8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	som_eeprom_opt: eeprom@51 {</div><div class='add'>+		compatible = "atmel,24c32";</div><div class='add'>+		reg = &lt;0x51&gt;;</div><div class='add'>+		pagesize = &lt;32&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-j721s2-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso<br/>new file mode 100644<br/>index 000000000000..ba521d661144<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am68-sk-base-board-pcie1-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling PCIE1 instance in Endpoint Configuration with the</div><div class='add'>+ * AM68-SK board.</div><div class='add'>+ *</div><div class='add'>+ * AM68-SK Board Product Link: https://www.ti.com/tool/SK-AM68</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Since Root Complex and Endpoint modes are mutually exclusive</div><div class='add'>+ * disable Root Complex mode.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie1_rc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+	pcie1_ep: pcie-ep@2910000 {</div><div class='add'>+		compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x00 0x18000000 0x00 0x08000000&gt;;</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 276 41&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		max-functions = /bits/ 8 &lt;6&gt;;</div><div class='add'>+		max-virtual-functions = /bits/ 8 &lt;4 4 4 4 0 0&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+		phy-names = "pcie-phy";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts<br/>index d5ceab79536c..75a107456ce1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts</a></div><div class='hunk'>@@ -44,6 +44,17 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vsys_5v0: regulator-vsys5v0 {</div><div class='add'>+		/* Output of LM61460 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vusb_main&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vsys_3v3: regulator-vsys3v3 {</div><div class='ctx'> 		/* Output of LM5141 */</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -76,7 +87,7 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='ctx'> 		gpios = &lt;&amp;main_gpio0 49 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		states = &lt;1800000 0x0&gt;,</div><div class='ctx'> 			 &lt;3300000 0x1&gt;;</div><div class='hunk'>@@ -124,6 +135,34 @@</div><div class='ctx'> 		max-bitrate = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	edp0_refclk: clock-edp0-refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0_pwr_3v3: regulator-dp0-pwr {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dp0-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp2 2 GPIO_ACTIVE_HIGH&gt;;     /*P0 - DP0_3V3 _EN */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0: dp0-connector {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP0";</div><div class='add'>+		type = "full-size";</div><div class='add'>+		dp-pwr-supply = &lt;&amp;dp0_pwr_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp0_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	connector-hdmi {</div><div class='ctx'> 		compatible = "hdmi-connector";</div><div class='ctx'> 		label = "hdmi";</div><div class='hunk'>@@ -184,6 +223,7 @@</div><div class='ctx'> 			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */</div><div class='ctx'> 			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='hunk'>@@ -211,6 +251,7 @@</div><div class='ctx'> 			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */</div><div class='ctx'> 			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='hunk'>@@ -313,6 +354,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='hunk'>@@ -330,6 +372,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_mdio_pins_default: mcu-mdio-default-pins {</div><div class='hunk'>@@ -337,6 +380,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='hunk'>@@ -372,6 +416,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {</div><div class='hunk'>@@ -397,6 +442,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;cpsw_mac_syscon {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy_gmii_sel {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_gpio0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='hunk'>@@ -413,6 +466,7 @@</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_i2c0 {</div><div class='hunk'>@@ -495,6 +549,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart8 {</div><div class='hunk'>@@ -503,6 +558,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart8_pins_default&gt;;</div><div class='ctx'> 	/* Shared with TFA on this platform */</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c0 {</div><div class='hunk'>@@ -587,6 +643,39 @@</div><div class='ctx'> 		gpio-line-names = "HDMI_PDn","HDMI_LS_OE",</div><div class='ctx'> 				  "DP0_3V3_EN","eDP_ENABLE";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	bridge_dsi_edp: bridge-dsi-edp@2c {</div><div class='add'>+		compatible = "ti,sn65dsi86";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		clock-names = "refclk";</div><div class='add'>+		clocks = &lt;&amp;edp0_refclk&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;exp2 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vpll-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+</div><div class='add'>+		dsi_edp_bridge_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dp0_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				dp0_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dp0_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_sdhci1 {</div><div class='hunk'>@@ -597,6 +686,7 @@</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_cpsw {</div><div class='hunk'>@@ -607,6 +697,7 @@</div><div class='ctx'> &amp;davinci_mdio {</div><div class='ctx'> 	phy0: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,min-output-impedance;</div><div class='hunk'>@@ -616,6 +707,7 @@</div><div class='ctx'> &amp;cpsw_port1 {</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_mcan0 {</div><div class='hunk'>@@ -680,6 +772,15 @@</div><div class='ctx'> 			remote-endpoint = &lt;&amp;tfp410_in&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	/* DSI */</div><div class='add'>+	port@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		dpi0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='hunk'>@@ -737,3 +838,30 @@</div><div class='ctx'> 	phys = &lt;&amp;serdes0_usb_link&gt;;</div><div class='ctx'> 	phy-names = "cdns3,usb3-phy";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dphy_tx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_ports {</div><div class='add'>+</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dpi0_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi<br/>index 5bc0d2fb4b8f..6a6dc816b658 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi</a></div><div class='hunk'>@@ -27,107 +27,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_dma_memory_region: c71-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_memory_region: c71-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a8000000 {</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x01c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -156,6 +66,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x09c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -169,6 +80,7 @@</div><div class='ctx'> 		/* AT24C512C-MAHM-T */</div><div class='ctx'> 		compatible = "atmel,24c512";</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -190,7 +102,6 @@</div><div class='ctx'> 		cdns,read-delay = &lt;4&gt;;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='del'>-			bootph-all;</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -226,149 +137,12 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			partition@3fc0000 {</div><div class='del'>-				bootph-pre-ram;</div><div class='ctx'> 				label = "ospi.phypattern";</div><div class='ctx'> 				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c71_1: mbox-c71-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer3 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer4 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer5 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_1_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j721s2-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso b/arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso<br/>new file mode 100644<br/>index 000000000000..9a5bcf282a9e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am69-sk-pcie0-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling PCIE0 instances of PCIe in Endpoint Configuration</div><div class='add'>+ * on AM69-SK.</div><div class='add'>+ *</div><div class='add'>+ * AM69-SK Product Link: https://www.ti.com/tool/SK-AM69</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Since Root Complex and Endpoint modes are mutually exclusive</div><div class='add'>+ * disable Root Complex mode.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie0_rc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+	pcie0_ep: pcie-ep@2900000 {</div><div class='add'>+		compatible = "ti,j784s4-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x02900000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02907000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x00 0x10000000 0x00 0x08000000&gt;;</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 332 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 332 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		max-functions = /bits/ 8 &lt;6&gt;;</div><div class='add'>+		max-virtual-functions = /bits/ 8 &lt;4 4 4 4 0 0&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		phys = &lt;&amp;serdes1_pcie_link&gt;;</div><div class='add'>+		phy-names = "pcie-phy";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts<br/>index 1e36965a1403..5896e57b5b9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-am69-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-am69-sk.dts</a></div><div class='hunk'>@@ -49,149 +49,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core0_memory_region: r5f-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core1_memory_region: r5f-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a8000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a8100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_dma_memory_region: c71-dma-memory@a9000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa9000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_memory_region: c71-memory@a9100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa9100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_2_dma_memory_region: c71-dma-memory@aa000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xaa000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_2_memory_region: c71-memory@aa100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xaa100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_3_dma_memory_region: c71-dma-memory@ab000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xab000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_3_memory_region: c71-memory@ab100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xab100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vusb_main: regulator-vusb-main5v0 {</div><div class='hunk'>@@ -484,6 +352,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	main_usbss0_pins_default: main-usbss0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_pmx0 {</div><div class='hunk'>@@ -562,6 +436,7 @@</div><div class='ctx'> 			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */</div><div class='ctx'> 			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_mdio_pins_default: mcu-mdio-default-pins {</div><div class='hunk'>@@ -569,6 +444,7 @@</div><div class='ctx'> 			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */</div><div class='ctx'> 			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_rpi_hdr1_gpio0_pins_default: mcu-rpi-hdr1-gpio0-default-pins {</div><div class='hunk'>@@ -624,88 +500,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;424&gt;;</div><div class='del'>-	mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c71_1: mbox-c71-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;cpsw_mac_syscon {</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster5 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;416&gt;;</div><div class='del'>-	mbox_c71_2: mbox-c71-2 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c71_3: mbox-c71-3 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+&amp;phy_gmii_sel {</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_uart0 {</div><div class='hunk'>@@ -755,6 +555,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			bucka3: buck3 {</div><div class='hunk'>@@ -763,6 +564,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;850000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			bucka4: buck4 {</div><div class='hunk'>@@ -771,6 +573,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			bucka5: buck5 {</div><div class='hunk'>@@ -779,6 +582,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;850000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ldoa1: ldo1 {</div><div class='hunk'>@@ -787,6 +591,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ldoa2: ldo2 {</div><div class='hunk'>@@ -795,6 +600,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ldoa3: ldo3 {</div><div class='hunk'>@@ -803,6 +609,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;800000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			ldoa4: ldo4 {</div><div class='hunk'>@@ -811,6 +618,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -926,7 +734,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_sdhci1 {</div><div class='hunk'>@@ -955,6 +762,7 @@</div><div class='ctx'> &amp;davinci_mdio {</div><div class='ctx'> 	mcu_phy0: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,min-output-impedance;</div><div class='hunk'>@@ -965,135 +773,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;mcu_phy0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer3 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer4 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer5 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer6 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer7 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer8 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer9 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss2_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss2_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss2_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss2_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_2&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_2_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_2_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_3&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_3_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_3_memory_region&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_gpio_intr {</div><div class='hunk'>@@ -1281,8 +961,12 @@</div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='ctx'> 	idle-states = &lt;J784S4_SERDES0_LANE0_PCIE1_LANE0&gt;, &lt;J784S4_SERDES0_LANE1_PCIE1_LANE1&gt;,</div><div class='ctx'> 		      &lt;J784S4_SERDES0_LANE2_PCIE3_LANE0&gt;, &lt;J784S4_SERDES0_LANE3_USB&gt;,</div><div class='del'>-			&lt;J784S4_SERDES1_LANE0_PCIE0_LANE0&gt;, &lt;J784S4_SERDES1_LANE1_PCIE0_LANE1&gt;,</div><div class='del'>-			&lt;J784S4_SERDES1_LANE2_PCIE0_LANE2&gt;, &lt;J784S4_SERDES1_LANE3_PCIE0_LANE3&gt;;</div><div class='add'>+		      &lt;J784S4_SERDES1_LANE0_PCIE0_LANE0&gt;, &lt;J784S4_SERDES1_LANE1_PCIE0_LANE1&gt;,</div><div class='add'>+		      &lt;J784S4_SERDES1_LANE2_PCIE0_LANE2&gt;, &lt;J784S4_SERDES1_LANE3_PCIE0_LANE3&gt;,</div><div class='add'>+		      &lt;J784S4_SERDES2_LANE0_IP2_UNUSED&gt;, &lt;J784S4_SERDES2_LANE1_IP2_UNUSED&gt;,</div><div class='add'>+		      &lt;J784S4_SERDES2_LANE2_QSGMII_LANE1&gt;, &lt;J784S4_SERDES2_LANE3_QSGMII_LANE2&gt;,</div><div class='add'>+		      &lt;J784S4_SERDES4_LANE0_EDP_LANE0&gt;, &lt;J784S4_SERDES4_LANE1_EDP_LANE1&gt;,</div><div class='add'>+		      &lt;J784S4_SERDES4_LANE2_EDP_LANE2&gt;, &lt;J784S4_SERDES4_LANE3_EDP_LANE3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_wiz0 {</div><div class='hunk'>@@ -1292,12 +976,28 @@</div><div class='ctx'> &amp;serdes0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	serdes0_pcie_link: phy@0 {</div><div class='add'>+	serdes0_pcie1_link: phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		cdns,num-lanes = &lt;3&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;2&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 1&gt;, &lt;&amp;serdes_wiz0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes0_pcie3_link: phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;1&gt;;</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='del'>-		resets = &lt;&amp;serdes_wiz0 1&gt;, &lt;&amp;serdes_wiz0 2&gt;, &lt;&amp;serdes_wiz0 3&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes0_usb_link: phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;1&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1327,7 +1027,7 @@</div><div class='ctx'> &amp;pcie1_rc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	reset-gpios = &lt;&amp;exp1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes0_pcie1_link&gt;;</div><div class='ctx'> 	phy-names = "pcie-phy";</div><div class='ctx'> 	num-lanes = &lt;2&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -1335,7 +1035,29 @@</div><div class='ctx'> &amp;pcie3_rc {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	reset-gpios = &lt;&amp;exp1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes0_pcie3_link&gt;;</div><div class='ctx'> 	phy-names = "pcie-phy";</div><div class='ctx'> 	num-lanes = &lt;1&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;usb_serdes_mux {</div><div class='add'>+	idle-states = &lt;0&gt;; /* USB0 to SERDES0 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	phys = &lt;&amp;serdes0_usb_link&gt;;</div><div class='add'>+	phy-names = "cdns3,usb3-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"</div><div class='add'>+#include "k3-j784s4-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts<br/>index 6593c5da82c0..f684ce6ad9ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts</a></div><div class='hunk'>@@ -129,6 +129,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='hunk'>@@ -136,6 +137,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='hunk'>@@ -204,6 +206,7 @@</div><div class='ctx'> 			J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */</div><div class='ctx'> 			J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='hunk'>@@ -238,6 +241,7 @@</div><div class='ctx'> 			J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */</div><div class='ctx'> 			J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='hunk'>@@ -254,11 +258,12 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_pmx1 {</div><div class='add'>+&amp;main_pmx2 {</div><div class='ctx'> 	main_usbss0_pins_default: main-usbss0-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -267,12 +272,14 @@</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart0 {</div><div class='hunk'>@@ -281,6 +288,7 @@</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_SHARED&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='hunk'>@@ -379,6 +387,7 @@</div><div class='ctx'> 	/* eMMC */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	non-removable;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='hunk'>@@ -390,6 +399,7 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='hunk'>@@ -399,13 +409,19 @@</div><div class='ctx'> 		      &lt;J7200_SERDES0_LANE2_QSGMII_LANE1&gt;, &lt;J7200_SERDES0_LANE3_IP4_UNUSED&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;mcu_spi1 {</div><div class='add'>+	mux-controls = &lt;&amp;spi1_linkdis 0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usb_serdes_mux {</div><div class='ctx'> 	idle-states = &lt;1&gt;; /* USB0 to SERDES lane 3 */</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbss0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> 	ti,usb2-only;</div><div class='ctx'> };</div><div class='hunk'>@@ -413,6 +429,7 @@</div><div class='ctx'> &amp;usb0 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	maximum-speed = "high-speed";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;tscadc0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso<br/>new file mode 100644<br/>index 000000000000..281076d905f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-evm-pcie1-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling PCIE1 instance in Endpoint Configuration with the</div><div class='add'>+ * J7 common processor board.</div><div class='add'>+ *</div><div class='add'>+ * J7 Common Processor Board Product Link: https://www.ti.com/tool/J721EXCPXEVM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Since Root Complex and Endpoint modes are mutually exclusive</div><div class='add'>+ * disable Root Complex mode.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie1_rc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+	pcie1_ep: pcie-ep@2910000 {</div><div class='add'>+		compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x00 0x18000000 0x00 0x08000000&gt;;</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 240 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 240 6&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		max-functions = /bits/ 8 &lt;6&gt;;</div><div class='add'>+		max-virtual-functions = /bits/ 8 &lt;4 4 4 4 0 0&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		phys = &lt;&amp;serdes0_pcie_link&gt;;</div><div class='add'>+		phy-names = "pcie-phy";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi<br/>index 9386bf3ef9f6..628ff89dd72f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-main.dtsi</a></div><div class='hunk'>@@ -32,6 +32,11 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x00 0x00 0x00100000 0x1c000&gt;;</div><div class='ctx'> </div><div class='add'>+		pcie1_ctrl: pcie-ctrl@4074 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4074 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serdes_ln_ctrl: mux-controller@4080 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='ctx'> 			reg = &lt;0x4080 0x20&gt;;</div><div class='hunk'>@@ -136,6 +141,7 @@</div><div class='ctx'> 			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='ctx'> 			interrupt-names = "rx_011";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hwspinlock: spinlock@30e00000 {</div><div class='hunk'>@@ -426,10 +432,28 @@</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	main_pmx1: pinctrl@11c11c {</div><div class='add'>+	main_pmx1: pinctrl@11c110 {</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='add'>+		/* Proxy 0 addressing */</div><div class='add'>+		reg = &lt;0x00 0x11c110 0x00 0x004&gt;;</div><div class='add'>+		#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_pmx2: pinctrl@11c11c {</div><div class='ctx'> 		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		/* Proxy 0 addressing */</div><div class='del'>-		reg = &lt;0x00 0x11c11c 0x00 0xc&gt;;</div><div class='add'>+		reg = &lt;0x00 0x11c11c 0x00 0x00c&gt;;</div><div class='add'>+		#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_pmx3: pinctrl@11c164 {</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='add'>+		/* Proxy 0 addressing */</div><div class='add'>+		reg = &lt;0x00 0x11c164 0x00 0x008&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='ctx'> 		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='hunk'>@@ -740,12 +764,12 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x18000000 0x00 0x00001000&gt;;</div><div class='add'>+		      &lt;0x41 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x4074&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;4&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 240 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -759,8 +783,8 @@</div><div class='ctx'> 		device-id = &lt;0xb00f&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x18011000  0x00 0x18011000  0x0 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1145,7 +1169,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 266 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 266 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 266 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1156,7 +1180,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 267 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 267 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 267 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1167,7 +1191,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 268 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 268 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 268 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1178,7 +1202,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 269 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 269 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 269 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1189,7 +1213,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 270 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 270 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 270 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1200,7 +1224,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 271 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 271 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 271 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1211,7 +1235,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 272 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 272 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 272 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1222,7 +1246,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 273 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 273 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 273 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1492,6 +1516,7 @@</div><div class='ctx'> 		ranges = &lt;0x5c00000 0x00 0x5c00000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x5d00000 0x00 0x5d00000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 243 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core0: r5f@5c00000 {</div><div class='ctx'> 			compatible = "ti,j7200-r5f";</div><div class='hunk'>@@ -1506,6 +1531,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core1: r5f@5d00000 {</div><div class='hunk'>@@ -1521,12 +1547,14 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_esm: esm@700000 {</div><div class='ctx'> 		compatible = "ti,j721e-esm";</div><div class='ctx'> 		reg = &lt;0x0 0x700000 0x0 0x1000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		ti,esm-pins = &lt;656&gt;, &lt;657&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi<br/>index 5097d192c2b2..692c4745040e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -21,16 +21,19 @@</div><div class='ctx'> 		k3_pds: power-controller {</div><div class='ctx'> 			compatible = "ti,sci-pm-domain";</div><div class='ctx'> 			#power-domain-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_clks: clock-controller {</div><div class='ctx'> 			compatible = "ti,k2g-sci-clk";</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_reset: reset-controller {</div><div class='ctx'> 			compatible = "ti,sci-reset";</div><div class='ctx'> 			#reset-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +47,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 35 1&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 35 2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 35 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		ti,timer-pwm;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -180,6 +184,13 @@</div><div class='ctx'> 			reg = &lt;0x4040 0x4&gt;;</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		spi1_linkdis: mux-controller@4060 {</div><div class='add'>+			compatible = "reg-mux";</div><div class='add'>+			reg = &lt;0x4060 0x4&gt;;</div><div class='add'>+			#mux-control-cells = &lt;1&gt;;</div><div class='add'>+			mux-reg-masks = &lt;0x0 0x1&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_conf: bus@43000000 {</div><div class='hunk'>@@ -191,6 +202,7 @@</div><div class='ctx'> 		chipid: chipid@14 {</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -344,6 +356,7 @@</div><div class='ctx'> 			      &lt;0x00 0x28440000 0x00 0x40000&gt;;</div><div class='ctx'> 			reg-names = "rt", "fifos", "proxy_gcfg",</div><div class='ctx'> 				    "proxy_target", "cfg";</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			ti,num-rings = &lt;286&gt;;</div><div class='ctx'> 			ti,sci-rm-range-gp-rings = &lt;0x1&gt;; /* GP ring range */</div><div class='ctx'> 			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='hunk'>@@ -363,6 +376,7 @@</div><div class='ctx'> 				    "tchan", "rchan", "rflow";</div><div class='ctx'> 			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> </div><div class='ctx'> 			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='ctx'> 			ti,sci-dev-id = &lt;236&gt;;</div><div class='hunk'>@@ -383,6 +397,8 @@</div><div class='ctx'> 		reg = &lt;0x0 0x2a480000 0x0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x2a380000 0x0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x2a400000 0x0 0x80000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -494,7 +510,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 274 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 274 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 274 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -505,7 +521,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 275 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 275 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 275 4&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -516,7 +532,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 276 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 276 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -534,6 +550,7 @@</div><div class='ctx'> 			reg = &lt;0x00 0x47000004 0x00 0x4&gt;;</div><div class='ctx'> 			#mux-control-cells = &lt;1&gt;;</div><div class='ctx'> 			mux-reg-masks = &lt;0x0 0x2&gt;; /* HBMC select */</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hbmc: hyperbus@47034000 {</div><div class='hunk'>@@ -595,6 +612,7 @@</div><div class='ctx'> 		ranges = &lt;0x41000000 0x00 0x41000000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x41400000 0x00 0x41400000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 249 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core0: r5f@41000000 {</div><div class='ctx'> 			compatible = "ti,j7200-r5f";</div><div class='hunk'>@@ -609,6 +627,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core1: r5f@41400000 {</div><div class='hunk'>@@ -624,6 +643,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -652,6 +672,7 @@</div><div class='ctx'> 		      &lt;0x00 0x42050000 0x00 0x350&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 154 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_esm: esm@40800000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi<br/>index e78b4622a7d1..5a8c2e707fde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi</a></div><div class='hunk'>@@ -29,59 +29,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a4000000 {</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x00800000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mux0: mux-controller-0 {</div><div class='hunk'>@@ -121,6 +79,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {</div><div class='hunk'>@@ -137,6 +96,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +106,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -186,6 +147,7 @@</div><div class='ctx'> 	flash@0,0 {</div><div class='ctx'> 		compatible = "cypress,hyperflash", "cfi-flash";</div><div class='ctx'> 		reg = &lt;0x00 0x00 0x4000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -220,77 +182,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;main_i2c0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='hunk'>@@ -347,6 +238,7 @@</div><div class='ctx'> 				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'> 				regulator-boot-on;</div><div class='ctx'> 				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			bucka2: buck2 {</div><div class='hunk'>@@ -520,6 +412,7 @@</div><div class='ctx'> 			partition@3fc0000 {</div><div class='ctx'> 				label = "ospi.phypattern";</div><div class='ctx'> 				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -531,3 +424,5 @@</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	phys = &lt;&amp;transceiver0&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#include "k3-j7200-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..9477f1efbbc6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j7200-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J7200 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2020-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@a4000000 {</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x00800000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;436&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;432&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Timers are used by Remoteproc firmware */</div><div class='add'>+&amp;main_timer0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer1 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts<br/>index fb899c99753e..352fb60e6ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts</a></div><div class='hunk'>@@ -51,119 +51,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_dma_memory_region: c66-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_memory_region: c66-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_dma_memory_region: c66-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_memory_region: c66-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a8000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a8100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@aa000000 {</div><div class='del'>-			reg = &lt;0x00 0xaa000000 0x00 0x01c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio_keys: gpio-keys {</div><div class='hunk'>@@ -865,129 +763,4 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;424&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c66_0: mbox-c66-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c66_1: mbox-c66-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j721e-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso<br/>index 65a7e54f0884..e4e5f941f20b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board-infotainment.dtso</a></div><div class='hunk'>@@ -15,12 +15,11 @@</div><div class='ctx'> #include "k3-pinctrl.h"</div><div class='ctx'> </div><div class='ctx'> &amp;{/} {</div><div class='del'>-	hdmi-connector {</div><div class='add'>+	connector-hdmi {</div><div class='ctx'> 		compatible = "hdmi-connector";</div><div class='ctx'> 		label = "hdmi";</div><div class='ctx'> 		type = "a";</div><div class='ctx'> 		ddc-i2c-bus = &lt;&amp;main_i2c1&gt;;</div><div class='del'>-		digital;</div><div class='ctx'> 		/* P12 - HDMI_HPD */</div><div class='ctx'> 		hpd-gpios = &lt;&amp;exp6 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -31,28 +30,32 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	dvi-bridge {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='add'>+	bridge-dvi {</div><div class='ctx'> 		compatible = "ti,tfp410";</div><div class='ctx'> 		/* P10 - HDMI_PDn */</div><div class='ctx'> 		powerdown-gpios = &lt;&amp;exp6 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		ti,deskew = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-		port@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='add'>+		ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			tfp410_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dpi_out0&gt;;</div><div class='del'>-				pclk-sample = &lt;1&gt;;</div><div class='add'>+				tfp410_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dpi_out0&gt;;</div><div class='add'>+					pclk-sample = &lt;1&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='del'>-		};</div><div class='ctx'> </div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			tfp410_out: endpoint {</div><div class='del'>-				remote-endpoint =</div><div class='del'>-					&lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				tfp410_out: endpoint {</div><div class='add'>+					remote-endpoint =</div><div class='add'>+						&lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -148,17 +151,23 @@</div><div class='ctx'> &amp;dss {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;dss_vout0_pins_default&gt;;</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;dss_ports {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-	port@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			dpi0_out: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp0_in&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-		dpi_out0: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;tfp410_in&gt;;</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			dpi_out0: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;tfp410_in&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts<br/>index 8230d53cd696..45311438315f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts</a></div><div class='hunk'>@@ -193,6 +193,7 @@</div><div class='ctx'> 			J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */</div><div class='ctx'> 			J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='hunk'>@@ -234,6 +235,7 @@</div><div class='ctx'> 			J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */</div><div class='ctx'> 			J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {</div><div class='hunk'>@@ -247,6 +249,7 @@</div><div class='ctx'> 			J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */</div><div class='ctx'> 			J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_usbss1_pins_default: main-usbss1-default-pins {</div><div class='hunk'>@@ -342,6 +345,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_uart0_pins_default: mcu-uart0-default-pins {</div><div class='hunk'>@@ -351,6 +355,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sw11_button_pins_default: sw11-button-default-pins {</div><div class='hunk'>@@ -370,6 +375,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='hunk'>@@ -435,12 +441,14 @@</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart0 {</div><div class='hunk'>@@ -449,6 +457,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='ctx'> 	/* Shared with ATF on this platform */</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='hunk'>@@ -487,6 +496,7 @@</div><div class='ctx'> 	/* eMMC */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	non-removable;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='hunk'>@@ -498,12 +508,14 @@</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vdd_sd_dv_alt&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usb_serdes_mux {</div><div class='ctx'> 	idle-states = &lt;1&gt;, &lt;0&gt;; /* USB0 to SERDES3, USB1 to SERDES1 */</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='hunk'>@@ -513,6 +525,7 @@</div><div class='ctx'> 		      &lt;J721E_SERDES3_LANE0_USB3_0_SWAP&gt;, &lt;J721E_SERDES3_LANE1_USB3_0&gt;,</div><div class='ctx'> 		      &lt;J721E_SERDES4_LANE0_EDP_LANE0&gt;, &lt;J721E_SERDES4_LANE1_EDP_LANE1&gt;,</div><div class='ctx'> 		      &lt;J721E_SERDES4_LANE2_EDP_LANE2&gt;, &lt;J721E_SERDES4_LANE3_EDP_LANE3&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_wiz3 {</div><div class='hunk'>@@ -527,12 +540,14 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='ctx'> 		resets = &lt;&amp;serdes_wiz3 1&gt;, &lt;&amp;serdes_wiz3 2&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbss0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -541,6 +556,7 @@</div><div class='ctx'> 	maximum-speed = "super-speed";</div><div class='ctx'> 	phys = &lt;&amp;serdes3_usb_link&gt;;</div><div class='ctx'> 	phy-names = "cdns3,usb3-phy";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;usbss1 {</div><div class='hunk'>@@ -557,6 +573,7 @@</div><div class='ctx'> &amp;ospi1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_fss0_ospi1_pins_default&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='hunk'>@@ -613,6 +630,7 @@</div><div class='ctx'> 			partition@3fe0000 {</div><div class='ctx'> 				label = "qspi.phypattern";</div><div class='ctx'> 				reg = &lt;0x3fe0000 0x20000&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -787,7 +805,11 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dss_ports {</div><div class='del'>-	port {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='ctx'> 		dpi0_out: endpoint {</div><div class='ctx'> 			remote-endpoint = &lt;&amp;dp0_in&gt;;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso<br/>index 4062709d6579..a8a502a6207f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x4070&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 239 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso<br/>new file mode 100644<br/>index 000000000000..436085157a69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling PCIE1 instance in Endpoint Configuration with the</div><div class='add'>+ * J7 common processor board.</div><div class='add'>+ *</div><div class='add'>+ * J7 Common Processor Board Product Link: https://www.ti.com/tool/J721EXCPXEVM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Since Root Complex and Endpoint modes are mutually exclusive</div><div class='add'>+ * disable Root Complex mode.</div><div class='add'>+ */</div><div class='add'>+&amp;pcie1_rc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+</div><div class='add'>+	pcie1_ep: pcie-ep@2910000 {</div><div class='add'>+		compatible = "ti,j721e-pcie-ep";</div><div class='add'>+		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x00 0x18000000 0x00 0x08000000&gt;;</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 240 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 240 1&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		max-functions = /bits/ 8 &lt;6&gt;;</div><div class='add'>+		max-virtual-functions = /bits/ 8 &lt;4 4 4 4 0 0&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		phys = &lt;&amp;serdes1_pcie_link&gt;;</div><div class='add'>+		phy-names = "pcie-phy";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi<br/>index 0da785be80ff..d5fd30a01032 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-main.dtsi</a></div><div class='hunk'>@@ -44,6 +44,26 @@</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		ranges = &lt;0x0 0x0 0x00100000 0x1c000&gt;;</div><div class='ctx'> </div><div class='add'>+		pcie0_ctrl: pcie-ctrl@4070 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4070 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_ctrl: pcie-ctrl@4074 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4074 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2_ctrl: pcie-ctrl@4078 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4078 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3_ctrl: pcie-ctrl@407c {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x407c 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serdes_ln_ctrl: mux-controller@4080 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='ctx'> 			reg = &lt;0x4080 0x50&gt;;</div><div class='hunk'>@@ -226,6 +246,7 @@</div><div class='ctx'> 			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='ctx'> 			interrupt-names = "rx_011";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		smmu0: iommu@36600000 {</div><div class='hunk'>@@ -587,6 +608,9 @@</div><div class='ctx'> 		cdns_csi2rx0: csi-bridge@4504000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x0 0x4504000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 26 2&gt;, &lt;&amp;k3_clks 26 0&gt;, &lt;&amp;k3_clks 26 2&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 26 2&gt;, &lt;&amp;k3_clks 26 3&gt;, &lt;&amp;k3_clks 26 3&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -640,6 +664,9 @@</div><div class='ctx'> 		cdns_csi2rx1: csi-bridge@4514000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x0 0x4514000 0x0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 27 2&gt;, &lt;&amp;k3_clks 27 0&gt;, &lt;&amp;k3_clks 27 2&gt;,</div><div class='ctx'> 				 &lt;&amp;k3_clks 27 2&gt;, &lt;&amp;k3_clks 27 3&gt;, &lt;&amp;k3_clks 27 3&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -940,12 +967,12 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02900000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x02907000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x10000000 0x00 0x00001000&gt;;</div><div class='add'>+		      &lt;0x40 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x4070&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 239 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -958,8 +985,8 @@</div><div class='ctx'> 		device-id = &lt;0xb00d&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x10001000 0x0 0x10001000 0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x10011000 0x0 0x10011000 0x0 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x40 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x40 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -969,12 +996,12 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x18000000 0x00 0x00001000&gt;;</div><div class='add'>+		      &lt;0x41 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x4074&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 240 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -987,8 +1014,8 @@</div><div class='ctx'> 		device-id = &lt;0xb00d&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x10000 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x18001000 0x0 0x18001000 0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x18011000 0x0 0x18011000 0x0 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1003,7 +1030,7 @@</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 342 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x4078&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie2_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 241 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1032,7 +1059,7 @@</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 354 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x407c&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie3_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 242 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1860,6 +1887,45 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dphy2: phy@4480000 {</div><div class='add'>+		compatible = "ti,j721e-dphy";</div><div class='add'>+		reg = &lt;0x00 0x04480000 0x00 0x1000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 296 1&gt;, &lt;&amp;k3_clks 296 3&gt;;</div><div class='add'>+		clock-names = "psm", "pll_ref";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 296 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 296 3&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 296 4&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi0: dsi@4800000 {</div><div class='add'>+		compatible = "ti,j721e-dsi";</div><div class='add'>+		reg = &lt;0x00 0x04800000 0x00 0x100000&gt;, &lt;0x00 0x04710000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 150 1&gt;, &lt;&amp;k3_clks 150 5&gt;;</div><div class='add'>+		clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 150 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		phys = &lt;&amp;dphy2&gt;;</div><div class='add'>+		phy-names = "dphy";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		dsi0_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	dss: dss@4a00000 {</div><div class='ctx'> 		compatible = "ti,j721e-dss";</div><div class='ctx'> 		reg =</div><div class='hunk'>@@ -2155,6 +2221,7 @@</div><div class='ctx'> 		ranges = &lt;0x5c00000 0x00 0x5c00000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x5d00000 0x00 0x5d00000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 243 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core0: r5f@5c00000 {</div><div class='ctx'> 			compatible = "ti,j721e-r5f";</div><div class='hunk'>@@ -2169,6 +2236,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core1: r5f@5d00000 {</div><div class='hunk'>@@ -2184,6 +2252,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2195,6 +2264,7 @@</div><div class='ctx'> 		ranges = &lt;0x5e00000 0x00 0x5e00000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x5f00000 0x00 0x5f00000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 244 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core0: r5f@5e00000 {</div><div class='ctx'> 			compatible = "ti,j721e-r5f";</div><div class='hunk'>@@ -2209,6 +2279,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core1: r5f@5f00000 {</div><div class='hunk'>@@ -2224,6 +2295,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2853,6 +2925,7 @@</div><div class='ctx'> 	main_esm: esm@700000 {</div><div class='ctx'> 		compatible = "ti,j721e-esm";</div><div class='ctx'> 		reg = &lt;0x0 0x700000 0x0 0x1000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		ti,esm-pins = &lt;344&gt;, &lt;345&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi<br/>index 3731ffb4a5c9..42a21398e389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -21,16 +21,19 @@</div><div class='ctx'> 		k3_pds: power-controller {</div><div class='ctx'> 			compatible = "ti,sci-pm-domain";</div><div class='ctx'> 			#power-domain-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_clks: clock-controller {</div><div class='ctx'> 			compatible = "ti,k2g-sci-clk";</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_reset: reset-controller {</div><div class='ctx'> 			compatible = "ti,sci-reset";</div><div class='ctx'> 			#reset-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -61,6 +64,7 @@</div><div class='ctx'> 		chipid: chipid@14 {</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +116,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 35 1&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 35 2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 35 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		ti,timer-pwm;</div><div class='ctx'> 		/* Non-MPU Firmware usage */</div><div class='ctx'> 		status = "reserved";</div><div class='hunk'>@@ -362,6 +367,7 @@</div><div class='ctx'> 			reg = &lt;0x00 0x47000004 0x00 0x4&gt;;</div><div class='ctx'> 			#mux-control-cells = &lt;1&gt;;</div><div class='ctx'> 			mux-reg-masks = &lt;0x0 0x2&gt;; /* HBMC select */</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hbmc: hyperbus@47034000 {</div><div class='hunk'>@@ -470,6 +476,7 @@</div><div class='ctx'> 			      &lt;0x0 0x2a500000 0x0 0x40000&gt;,</div><div class='ctx'> 			      &lt;0x0 0x28440000 0x0 0x40000&gt;;</div><div class='ctx'> 			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			ti,num-rings = &lt;286&gt;;</div><div class='ctx'> 			ti,sci-rm-range-gp-rings = &lt;0x1&gt;; /* GP ring range */</div><div class='ctx'> 			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='hunk'>@@ -489,6 +496,7 @@</div><div class='ctx'> 				    "tchan", "rchan", "rflow";</div><div class='ctx'> 			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> </div><div class='ctx'> 			ti,sci = &lt;&amp;dmsc&gt;;</div><div class='ctx'> 			ti,sci-dev-id = &lt;236&gt;;</div><div class='hunk'>@@ -509,6 +517,7 @@</div><div class='ctx'> 		reg = &lt;0x0 0x2a480000 0x0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x2a380000 0x0 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x0 0x2a400000 0x0 0x80000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -585,6 +594,7 @@</div><div class='ctx'> 		ranges = &lt;0x41000000 0x00 0x41000000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x41400000 0x00 0x41400000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 249 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core0: r5f@41000000 {</div><div class='ctx'> 			compatible = "ti,j721e-r5f";</div><div class='hunk'>@@ -599,6 +609,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core1: r5f@41400000 {</div><div class='hunk'>@@ -614,6 +625,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -654,7 +666,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 274 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 274 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 274 1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -665,7 +677,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 275 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 275 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 275 1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -676,7 +688,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 276 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 276 1&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -687,6 +699,7 @@</div><div class='ctx'> 		      &lt;0x00 0x43000300 0x00 0x10&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 154 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_esm: esm@40800000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso<br/>index 47bb5480b5b0..4eb3cffab032 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso</a></div><div class='hunk'>@@ -19,6 +19,33 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;24000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p2v: regulator-1p2v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P2V";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;csi_mux {</div><div class='hunk'>@@ -34,7 +61,9 @@</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='ctx'> 		clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='del'>-		clock-names = "xclk";</div><div class='add'>+		VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+		VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			csi2_cam0: endpoint {</div><div class='hunk'>@@ -56,7 +85,9 @@</div><div class='ctx'> 		reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='ctx'> 		clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='del'>-		clock-names = "xclk";</div><div class='add'>+		VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+		VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+		VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='ctx'> </div><div class='ctx'> 		port {</div><div class='ctx'> 			csi2_cam1: endpoint {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts<br/>index 6285e8d94dde..5e5784ef6f85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-sk.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-sk.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-sk.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-sk.dts</a></div><div class='hunk'>@@ -48,119 +48,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_dma_memory_region: c66-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_memory_region: c66-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_dma_memory_region: c66-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_memory_region: c66-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a8000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a8100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@aa000000 {</div><div class='del'>-			reg = &lt;0x00 0xaa000000 0x00 0x01c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vusb_main: fixedregulator-vusb-main5v0 {</div><div class='hunk'>@@ -184,6 +82,17 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vsys_5v0: fixedregulator-vsys5v0 {</div><div class='add'>+		/* Output of LM61460 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vusb_main&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_mmc1: fixedregulator-sd {</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='hunk'>@@ -211,6 +120,20 @@</div><div class='ctx'> 			 &lt;3300000 0x1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vdd_sd_dv: gpio-regulator-TLV71033 {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='add'>+		regulator-name = "tlv71033";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 118 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	transceiver1: can-phy1 {</div><div class='ctx'> 		compatible = "ti,tcan1042";</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='hunk'>@@ -346,6 +269,7 @@</div><div class='ctx'> 			J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */</div><div class='ctx'> 			J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart0_pins_default: main-uart0-default-pins {</div><div class='hunk'>@@ -355,6 +279,7 @@</div><div class='ctx'> 			J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */</div><div class='ctx'> 			J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_uart1_pins_default: main-uart1-default-pins {</div><div class='hunk'>@@ -390,12 +315,14 @@</div><div class='ctx'> 			J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */</div><div class='ctx'> 			J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_usbss1_pins_default: main-usbss1-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {</div><div class='hunk'>@@ -594,6 +521,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x28, PIN_INPUT, 0) /* (G21) MCU_OSPI0_D7 */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x8, PIN_INPUT, 0) /* (D21) MCU_OSPI0_DQS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins {</div><div class='hunk'>@@ -608,6 +536,12 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */</div><div class='hunk'>@@ -622,6 +556,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0)/* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='hunk'>@@ -629,6 +564,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='hunk'>@@ -657,6 +593,7 @@</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_i2c0 {</div><div class='hunk'>@@ -821,6 +758,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart0 {</div><div class='hunk'>@@ -829,6 +767,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart0_pins_default&gt;;</div><div class='ctx'> 	/* Shared with ATF on this platform */</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart1 {</div><div class='hunk'>@@ -844,6 +783,7 @@</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vdd_sd_dv_alt&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='hunk'>@@ -908,6 +848,7 @@</div><div class='ctx'> 			partition@3fc0000 {</div><div class='ctx'> 				label = "ospi.phypattern";</div><div class='ctx'> 				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1003,6 +944,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;usb_serdes_mux {</div><div class='ctx'> 	idle-states = &lt;1&gt;, &lt;1&gt;; /* USB0 to SERDES3, USB1 to SERDES2 */</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='hunk'>@@ -1012,6 +954,7 @@</div><div class='ctx'> 		      &lt;J721E_SERDES3_LANE0_USB3_0_SWAP&gt;, &lt;J721E_SERDES3_LANE1_USB3_0&gt;,</div><div class='ctx'> 		      &lt;J721E_SERDES4_LANE0_EDP_LANE0&gt;, &lt;J721E_SERDES4_LANE1_EDP_LANE1&gt;,</div><div class='ctx'> 		      &lt;J721E_SERDES4_LANE2_EDP_LANE2&gt;, &lt;J721E_SERDES4_LANE3_EDP_LANE3&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes_wiz3 {</div><div class='hunk'>@@ -1026,6 +969,7 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='ctx'> 		resets = &lt;&amp;serdes_wiz3 1&gt;, &lt;&amp;serdes_wiz3 2&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1050,6 +994,7 @@</div><div class='ctx'> &amp;usbss0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1058,6 +1003,7 @@</div><div class='ctx'> 	maximum-speed = "super-speed";</div><div class='ctx'> 	phys = &lt;&amp;serdes3_usb_link&gt;;</div><div class='ctx'> 	phy-names = "cdns3,usb3-phy";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;serdes2 {</div><div class='hunk'>@@ -1073,6 +1019,7 @@</div><div class='ctx'> &amp;usbss1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usbss1_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1081,6 +1028,7 @@</div><div class='ctx'> 	maximum-speed = "super-speed";</div><div class='ctx'> 	phys = &lt;&amp;serdes2_usb_link&gt;;</div><div class='ctx'> 	phy-names = "cdns3,usb3-phy";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_cpsw {</div><div class='hunk'>@@ -1229,166 +1177,4 @@</div><div class='ctx'> 	status = "disabled";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;424&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c66_0: mbox-c66-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c66_1: mbox-c66-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer12 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer13 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer14 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer15 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j721e-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi<br/>index cef47c67493f..c8073ee634b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi</a></div><div class='hunk'>@@ -29,119 +29,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_dma_memory_region: c66-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_memory_region: c66-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_0_dma_memory_region: c66-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c66_1_memory_region: c66-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a8000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a8100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@aa000000 {</div><div class='del'>-			reg = &lt;0x00 0xaa000000 0x00 0x01c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -151,6 +49,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='hunk'>@@ -173,6 +72,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {</div><div class='hunk'>@@ -192,6 +92,7 @@</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ6 */</div><div class='ctx'> 			J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ7 */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -422,6 +323,7 @@</div><div class='ctx'> 			partition@3fe0000 {</div><div class='ctx'> 				label = "ospi.phypattern";</div><div class='ctx'> 				reg = &lt;0x3fe0000 0x20000&gt;;</div><div class='add'>+				bootph-all;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -440,6 +342,7 @@</div><div class='ctx'> 	flash@0,0 {</div><div class='ctx'> 		compatible = "cypress,hyperflash", "cfi-flash";</div><div class='ctx'> 		reg = &lt;0x00 0x00 0x4000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> </div><div class='ctx'> 		partitions {</div><div class='ctx'> 			compatible = "fixed-partitions";</div><div class='hunk'>@@ -479,166 +382,4 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;424&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c66_0: mbox-c66-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c66_1: mbox-c66-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer12 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer13 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer14 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer15 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c66_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c66_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c66_1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j721e-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..40c6cc99c405<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,288 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J721E SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_dma_memory_region: memory@a4000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_memory_region: memory@a4100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_dma_memory_region: memory@a5000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_memory_region: memory@a5100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Carveout locations are flipped due to caching */</div><div class='add'>+	c66_1_dma_memory_region: memory@a6000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c66_0_memory_region: memory@a6100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Carveout locations are flipped due to caching */</div><div class='add'>+	c66_0_dma_memory_region: memory@a7000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c66_1_memory_region: memory@a7100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_dma_memory_region: memory@a8000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_memory_region: memory@a8100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@aa000000 {</div><div class='add'>+		reg = &lt;0x00 0xaa000000 0x00 0x01c00000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;436&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;432&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;428&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;424&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_c66_0: mbox-c66-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_c66_1: mbox-c66-1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;420&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_c71_0: mbox-c71-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Timers are used by Remoteproc firmware */</div><div class='add'>+&amp;main_timer0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer1 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer12 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer13 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer14 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer15 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c66_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c66_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c66_0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c66_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c66_1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c66_1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c66_1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_0_memory_region&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi<br/>index a7f2f52f42f7..b6e22c242951 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721e.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721e.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721e.dtsi</a></div><div class='hunk'>@@ -126,6 +126,8 @@</div><div class='ctx'> 			 &lt;0x00 0x10000000 0x00 0x10000000 0x00 0x10000000&gt;, /* PCIe DAT */</div><div class='ctx'> 			 &lt;0x00 0x64800000 0x00 0x64800000 0x00 0x00800000&gt;, /* C71 */</div><div class='ctx'> 			 &lt;0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000&gt;, /* A72 PERIPHBASE */</div><div class='add'>+			 &lt;0x40 0x00000000 0x40 0x00000000 0x01 0x00000000&gt;, /* PCIe0 DAT1 */</div><div class='add'>+			 &lt;0x41 0x00000000 0x41 0x00000000 0x01 0x00000000&gt;, /* PCIe1 DAT1 */</div><div class='ctx'> 			 &lt;0x44 0x00000000 0x44 0x00000000 0x00 0x08000000&gt;, /* PCIe2 DAT */</div><div class='ctx'> 			 &lt;0x44 0x10000000 0x44 0x10000000 0x00 0x08000000&gt;, /* PCIe3 DAT */</div><div class='ctx'> 			 &lt;0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000&gt;, /* C66_0 */</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts<br/>index c5a0b7cbb14f..9e43dcff8ef2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts</a></div><div class='hunk'>@@ -93,6 +93,28 @@</div><div class='ctx'> 			 &lt;3300000 0x1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dp1_pwr_3v3: regulator-dp1-prw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dp1-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp4 1 GPIO_ACTIVE_HIGH&gt;; /* P1 - DP1_PWR_SW_EN */</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp1: connector-dp1 {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP1";</div><div class='add'>+		type = "full-size";</div><div class='add'>+		dp-pwr-supply = &lt;&amp;dp1_pwr_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	transceiver1: can-phy1 {</div><div class='ctx'> 		compatible = "ti,tcan1043";</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='hunk'>@@ -138,6 +160,7 @@</div><div class='ctx'> 			J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */</div><div class='ctx'> 			J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_i2c3_pins_default: main-i2c3-default-pins {</div><div class='hunk'>@@ -147,6 +170,13 @@</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	main_i2c4_pins_default: main-i2c4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) I2C4_SCL */</div><div class='add'>+			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) I2C4_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_i2c5_pins_default: main-i2c5-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J721S2_IOPAD(0x01c, PIN_INPUT, 8) /* (Y24) MCAN15_TX.I2C5_SCL */</div><div class='hunk'>@@ -165,6 +195,7 @@</div><div class='ctx'> 			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */</div><div class='ctx'> 			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='hunk'>@@ -177,6 +208,7 @@</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_mcan3_pins_default: main-mcan3-default-pins {</div><div class='hunk'>@@ -200,6 +232,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_uart0_pins_default: mcu-uart0-default-pins {</div><div class='hunk'>@@ -209,6 +242,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='hunk'>@@ -301,6 +335,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -316,12 +351,14 @@</div><div class='ctx'> 	status = "reserved";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_uart8 {</div><div class='hunk'>@@ -330,6 +367,7 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_uart8_pins_default&gt;;</div><div class='ctx'> 	/* Shared with TFA on this platform */</div><div class='ctx'> 	power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_SHARED&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_i2c0 {</div><div class='hunk'>@@ -361,6 +399,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c4_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	exp4: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "DP0_PWR_SW_EN", "DP1_PWR_SW_EN", "UB981_PDB",</div><div class='add'>+				  "UB981_GPIO0", "UB981_GPIO1", "UB981_GPIO2",</div><div class='add'>+				  "UB981_GPIO3", "PWR_SW_CNTL_DSI0#";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;main_i2c5 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_i2c5_pins_default&gt;;</div><div class='hunk'>@@ -383,6 +438,7 @@</div><div class='ctx'> 	/* eMMC */</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	non-removable;</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='hunk'>@@ -395,6 +451,7 @@</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_cpsw {</div><div class='hunk'>@@ -444,6 +501,7 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='add'>+	bootph-all;</div><div class='ctx'> 	ti,vbus-divider;</div><div class='ctx'> 	ti,usb2-only;</div><div class='ctx'> };</div><div class='hunk'>@@ -451,6 +509,7 @@</div><div class='ctx'> &amp;usb0 {</div><div class='ctx'> 	dr_mode = "otg";</div><div class='ctx'> 	maximum-speed = "high-speed";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;ospi1 {</div><div class='hunk'>@@ -464,6 +523,7 @@</div><div class='ctx'> 		spi-tx-bus-width = &lt;1&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;4&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		cdns,tshsl-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tchsh-ns = &lt;60&gt;;</div><div class='hunk'>@@ -525,3 +585,74 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_mcan5_pins_default&gt;;</div><div class='ctx'> 	phys = &lt;&amp;transceiver4&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	/*</div><div class='add'>+	 * DSS on J721S2-EVM supports DP on VP0 and DSI on VP2.</div><div class='add'>+	 * These clock assignments are chosen to enable the following outputs:</div><div class='add'>+	 * VP0 - DisplayPort SST</div><div class='add'>+	 * VP2 - DSI</div><div class='add'>+	 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;k3_clks 158 2&gt;,</div><div class='add'>+			  &lt;&amp;k3_clks 158 14&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;k3_clks 158 3&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 158 16&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dss_ports {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	port@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		dpi2_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_ports {</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp1_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dpi2_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi_edp_bridge_ports {</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dp1_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		dp1_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp1_connector_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy_tx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso<br/>index 5ff390915b75..8c2cd99cf2b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "mem";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x074&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;1&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso<br/>new file mode 100644<br/>index 000000000000..fe4a23efe708<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling USB0 instance of USB in the Host Mode of operation</div><div class='add'>+ * with the Type-A Connector on the J7 common processor board.</div><div class='add'>+ *</div><div class='add'>+ * J7 Common Processor Board Product Link: https://www.ti.com/tool/J721EXCPXEVM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;exp_som {</div><div class='add'>+	p0-hog {</div><div class='add'>+		/* P0 - USB2.0_MUX_SEL */</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "USB2.0_MUX_SEL";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi<br/>index 9ed6949b40e9..80c51b11ac9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi</a></div><div class='hunk'>@@ -57,6 +57,11 @@</div><div class='ctx'> 			#phy-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pcie1_ctrl: pcie-ctrl@74 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x74 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		serdes_ln_ctrl: mux-controller@80 {</div><div class='ctx'> 			compatible = "reg-mux";</div><div class='ctx'> 			reg = &lt;0x80 0x10&gt;;</div><div class='hunk'>@@ -816,6 +821,7 @@</div><div class='ctx'> 			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='ctx'> 			interrupt-names = "rx_011";</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		hwspinlock: spinlock@30e00000 {</div><div class='hunk'>@@ -1242,6 +1248,9 @@</div><div class='ctx'> 		cdns_csi2rx0: csi-bridge@4504000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x00 0x04504000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 38 3&gt;, &lt;&amp;k3_clks 38 1&gt;, &lt;&amp;k3_clks 38 3&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 38 3&gt;, &lt;&amp;k3_clks 38 4&gt;, &lt;&amp;k3_clks 38 4&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -1295,6 +1304,9 @@</div><div class='ctx'> 		cdns_csi2rx1: csi-bridge@4514000 {</div><div class='ctx'> 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='ctx'> 			reg = &lt;0x00 0x04514000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 39 3&gt;, &lt;&amp;k3_clks 39 1&gt;, &lt;&amp;k3_clks 39 3&gt;,</div><div class='ctx'> 				&lt;&amp;k3_clks 39 3&gt;, &lt;&amp;k3_clks 39 4&gt;, &lt;&amp;k3_clks 39 4&gt;;</div><div class='ctx'> 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='hunk'>@@ -1393,12 +1405,12 @@</div><div class='ctx'> 		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d800000 0x00 0x800000&gt;,</div><div class='del'>-		      &lt;0x00 0x18000000 0x00 0x1000&gt;;</div><div class='add'>+		      &lt;0x41 0x00000000 0x00 0x1000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;scm_conf 0x074&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;4&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1411,8 +1423,8 @@</div><div class='ctx'> 		device-id = &lt;0xb013&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x18011000  0x00 0x18011000  0x0 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='hunk'>@@ -1425,6 +1437,7 @@</div><div class='ctx'> </div><div class='ctx'> 		pcie1_intc: interrupt-controller {</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 324 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='hunk'>@@ -1708,7 +1721,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 339 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 339 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 339 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1719,7 +1732,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 340 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 340 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 340 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1730,7 +1743,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 341 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 341 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 341 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1741,7 +1754,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 342 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 342 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 342 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1752,7 +1765,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 343 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 343 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 343 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1763,7 +1776,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 344 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 344 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 344 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1774,7 +1787,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 345 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 345 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 345 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1785,10 +1798,49 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 346 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 346 1&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 346 2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy_tx0: phy@4480000 {</div><div class='add'>+		compatible = "ti,j721e-dphy";</div><div class='add'>+		reg = &lt;0x00 0x04480000 0x00 0x00001000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 363 8&gt;, &lt;&amp;k3_clks 363 14&gt;;</div><div class='add'>+		clock-names = "psm", "pll_ref";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 363 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 363 14&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 363 15&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	dsi0: dsi@4800000 {</div><div class='add'>+		compatible = "ti,j721e-dsi";</div><div class='add'>+		reg = &lt;0x00 0x04800000 0x00 0x00100000&gt;,</div><div class='add'>+		      &lt;0x00 0x04710000 0x00 0x00000100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 154 4&gt;, &lt;&amp;k3_clks 154 1&gt;;</div><div class='add'>+		clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 154 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		phys = &lt;&amp;dphy_tx0&gt;;</div><div class='add'>+		phy-names = "dphy";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		dsi0_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	dss: dss@4a00000 {</div><div class='ctx'> 		compatible = "ti,j721e-dss";</div><div class='ctx'> 		reg = &lt;0x00 0x04a00000 0x00 0x10000&gt;, /* common_m */</div><div class='hunk'>@@ -1843,6 +1895,7 @@</div><div class='ctx'> 		ranges = &lt;0x5c00000 0x00 0x5c00000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x5d00000 0x00 0x5d00000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 277 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core0: r5f@5c00000 {</div><div class='ctx'> 			compatible = "ti,j721s2-r5f";</div><div class='hunk'>@@ -1857,6 +1910,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss0_core1: r5f@5d00000 {</div><div class='hunk'>@@ -1872,6 +1926,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1883,6 +1938,7 @@</div><div class='ctx'> 		ranges = &lt;0x5e00000 0x00 0x5e00000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x5f00000 0x00 0x5f00000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 278 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core0: r5f@5e00000 {</div><div class='ctx'> 			compatible = "ti,j721s2-r5f";</div><div class='hunk'>@@ -1897,6 +1953,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		main_r5fss1_core1: r5f@5f00000 {</div><div class='hunk'>@@ -1912,6 +1969,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -2047,4 +2105,108 @@</div><div class='ctx'> 		/* reserved for MAIN_R5F1_1 */</div><div class='ctx'> 		status = "reserved";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpu: gpu@4e20000000 {</div><div class='add'>+		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";</div><div class='add'>+		reg = &lt;0x4e 0x20000000 0x00 0x80000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 130 1&gt;;</div><div class='add'>+		clock-names = "core";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 130 1&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;800000000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 130 TI_SCI_PD_EXCLUSIVE&gt;,</div><div class='add'>+				&lt;&amp;k3_pds 373 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		power-domain-names = "a", "b";</div><div class='add'>+		dma-coherent;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp0: mcasp@2b00000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b00000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b08000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc400&gt;, &lt;&amp;main_udmap 0x4400&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 209 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 209 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 209 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 209 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp1: mcasp@2b10000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b10000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b18000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc401&gt;, &lt;&amp;main_udmap 0x4401&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 210 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 210 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 210 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 210 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp2: mcasp@2b20000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b20000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b28000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc402&gt;, &lt;&amp;main_udmap 0x4402&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 211 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 211 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 211 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 211 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp3: mcasp@2b30000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b30000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b38000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc403&gt;, &lt;&amp;main_udmap 0x4403&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 212 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 212 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 212 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 212 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp4: mcasp@2b40000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b40000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b48000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc404&gt;, &lt;&amp;main_udmap 0x4404&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 213 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 213 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 213 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 213 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi<br/>index 9d96b19d0e7c..837097751c18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -21,16 +21,19 @@</div><div class='ctx'> 		k3_pds: power-controller {</div><div class='ctx'> 			compatible = "ti,sci-pm-domain";</div><div class='ctx'> 			#power-domain-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_clks: clock-controller {</div><div class='ctx'> 			compatible = "ti,k2g-sci-clk";</div><div class='ctx'> 			#clock-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		k3_reset: reset-controller {</div><div class='ctx'> 			compatible = "ti,sci-reset";</div><div class='ctx'> 			#reset-cells = &lt;2&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +46,7 @@</div><div class='ctx'> 		chipid: chipid@14 {</div><div class='ctx'> 			compatible = "ti,am654-chipid";</div><div class='ctx'> 			reg = &lt;0x14 0x4&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -53,6 +57,8 @@</div><div class='ctx'> 		reg = &lt;0x00 0x43600000 0x00 0x10000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x44880000 0x00 0x20000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x44860000 0x00 0x20000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -167,6 +173,7 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 35 1&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 35 2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 35 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		ti,timer-pwm;</div><div class='ctx'> 		/* Non-MPU Firmware usage */</div><div class='ctx'> 		status = "reserved";</div><div class='hunk'>@@ -361,6 +368,7 @@</div><div class='ctx'> 		clocks = &lt;&amp;k3_clks 223 1&gt;;</div><div class='ctx'> 		clock-names = "fck";</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 223 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -425,7 +433,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 347 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 347 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 347 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -436,7 +444,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 348 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 348 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 348 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -447,7 +455,7 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 349 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 349 0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 349 2&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -469,6 +477,7 @@</div><div class='ctx'> 			      &lt;0x0 0x2a500000 0x0 0x40000&gt;,</div><div class='ctx'> 			      &lt;0x0 0x28440000 0x0 0x40000&gt;;</div><div class='ctx'> 			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";</div><div class='add'>+			bootph-all;</div><div class='ctx'> 			ti,num-rings = &lt;286&gt;;</div><div class='ctx'> 			ti,sci-rm-range-gp-rings = &lt;0x1&gt;;</div><div class='ctx'> 			ti,sci = &lt;&amp;sms&gt;;</div><div class='hunk'>@@ -488,6 +497,7 @@</div><div class='ctx'> 				    "tchan", "rchan", "rflow";</div><div class='ctx'> 			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='add'>+			bootph-all;</div><div class='ctx'> </div><div class='ctx'> 			ti,sci = &lt;&amp;sms&gt;;</div><div class='ctx'> 			ti,sci-dev-id = &lt;273&gt;;</div><div class='hunk'>@@ -507,6 +517,8 @@</div><div class='ctx'> 		reg = &lt;0x00 0x2a480000 0x00 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x2a380000 0x00 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x2a400000 0x00 0x80000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -667,6 +679,7 @@</div><div class='ctx'> 		      &lt;0x00 0x42050000 0x0 0x350&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 180 TI_SCI_PD_SHARED&gt;;</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_r5fss0: r5fss@41000000 {</div><div class='hunk'>@@ -677,6 +690,7 @@</div><div class='ctx'> 		ranges = &lt;0x41000000 0x00 0x41000000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x41400000 0x00 0x41400000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 283 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core0: r5f@41000000 {</div><div class='ctx'> 			compatible = "ti,j721s2-r5f";</div><div class='hunk'>@@ -691,6 +705,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core1: r5f@41400000 {</div><div class='hunk'>@@ -706,6 +721,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi<br/>index 89252e4a5f1b..12a38dd1514b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi</a></div><div class='hunk'>@@ -31,107 +31,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_dma_memory_region: c71-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_memory_region: c71-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a8000000 {</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x01c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mux0: mux-controller-0 {</div><div class='hunk'>@@ -152,6 +62,30 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		max-bitrate = &lt;5000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vsys_io_1v8: regulator-vsys-io-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_io_1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_io_1v2: regulator-vsys-io-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_io_1v2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp1_refclk: clock-edp1-refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wkup_pmx0 {</div><div class='hunk'>@@ -170,6 +104,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -188,6 +123,7 @@</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */</div><div class='ctx'> 			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -440,149 +376,81 @@</div><div class='ctx'> 		spi-tx-bus-width = &lt;8&gt;;</div><div class='ctx'> 		spi-rx-bus-width = &lt;8&gt;;</div><div class='ctx'> 		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		cdns,tshsl-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tchsh-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,tslch-ns = &lt;60&gt;;</div><div class='ctx'> 		cdns,read-delay = &lt;4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "ospi.tiboot3";</div><div class='add'>+				reg = &lt;0x0 0x80000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+			partition@80000 {</div><div class='add'>+				label = "ospi.tispl";</div><div class='add'>+				reg = &lt;0x80000 0x200000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='add'>+			partition@280000 {</div><div class='add'>+				label = "ospi.u-boot";</div><div class='add'>+				reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+			partition@680000 {</div><div class='add'>+				label = "ospi.env";</div><div class='add'>+				reg = &lt;0x680000 0x40000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='add'>+			partition@6c0000 {</div><div class='add'>+				label = "ospi.env.backup";</div><div class='add'>+				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "ospi.rootfs";</div><div class='add'>+				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-	mbox_c71_1: mbox-c71-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+			partition@3fc0000 {</div><div class='add'>+				label = "ospi.phypattern";</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer3 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer4 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer5 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+&amp;main_i2c4 {</div><div class='add'>+	bridge_dsi_edp: bridge-dsi-edp@2c {</div><div class='add'>+		compatible = "ti,sn65dsi86";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		clock-names = "refclk";</div><div class='add'>+		clocks = &lt;&amp;edp1_refclk&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;exp_som 5 0&gt;;</div><div class='add'>+		vpll-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+</div><div class='add'>+		dsi_edp_bridge_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='ctx'> </div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;c71_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_1_memory_region&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j721s2-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..ebab0cc580bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j721s2-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,253 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J721S2 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2021-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_dma_memory_region: memory@a4000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_memory_region: memory@a4100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_dma_memory_region: memory@a5000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_memory_region: memory@a5100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_dma_memory_region: memory@a6000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_memory_region: memory@a6100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_1_dma_memory_region: memory@a7000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_1_memory_region: memory@a7100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@a8000000 {</div><div class='add'>+		reg = &lt;0x00 0xa8000000 0x00 0x01c00000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;436&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;432&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;428&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;420&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_c71_0: mbox-c71-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_c71_1: mbox-c71-1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Timers are used by Remoteproc firmware */</div><div class='add'>+&amp;main_timer0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer1 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer3 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer4 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer5 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_1_memory_region&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso<br/>new file mode 100644<br/>index 000000000000..4107ef8c7b74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso</a></div><div class='hunk'>@@ -0,0 +1,329 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * DT Overlay for 4 x RPi Camera V2.1 on J722S-EVM board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * Schematics: https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	cam0_reset_pins_default: cam0-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x03c, PIN_OUTPUT, 7) /* (R22) GPIO0_15 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam1_reset_pins_default: cam1-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x044, PIN_OUTPUT, 7) /* (R26) GPIO0_17 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam2_reset_pins_default: cam2-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x04c, PIN_OUTPUT, 7) /* (T25) GPIO0_19 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam3_reset_pins_default: cam3-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x054, PIN_OUTPUT, 7) /* (T21) GPIO0_21 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_imx219_fixed: clock-24000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p2v: regulator-1p2v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P2V";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi01_mux {</div><div class='add'>+	idle-state = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi23_mux {</div><div class='add'>+	idle-state = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pca9543_0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* CAM0 I2C */</div><div class='add'>+	i2c@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imx219_0: sensor@10 {</div><div class='add'>+			compatible = "sony,imx219";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='add'>+</div><div class='add'>+			VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam0_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx0_in_sensor&gt;;</div><div class='add'>+					link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CAM1 I2C */</div><div class='add'>+	i2c@1 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		imx219_1: sensor@10 {</div><div class='add'>+			compatible = "sony,imx219";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='add'>+</div><div class='add'>+			VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam1_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx1_in_sensor&gt;;</div><div class='add'>+					link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pca9543_1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* CAM0 I2C */</div><div class='add'>+	i2c@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		imx219_2: sensor@10 {</div><div class='add'>+			compatible = "sony,imx219";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='add'>+</div><div class='add'>+			VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam2_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam2: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx2_in_sensor&gt;;</div><div class='add'>+					link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CAM1 I2C */</div><div class='add'>+	i2c@1 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		imx219_3: sensor@10 {</div><div class='add'>+			compatible = "sony,imx219";</div><div class='add'>+			reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;clk_imx219_fixed&gt;;</div><div class='add'>+</div><div class='add'>+			VANA-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			VDIG-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			VDDL-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam3_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam3: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx3_in_sensor&gt;;</div><div class='add'>+					link-frequencies = /bits/ 64 &lt;456000000&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi0_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx0_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam0&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx1 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi1_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx1_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam1&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx2 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi2_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx2_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam2&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx3 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi3_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx3_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam3&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso<br/>new file mode 100644<br/>index 000000000000..575113d7b481<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso</a></div><div class='hunk'>@@ -0,0 +1,323 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * DT Overlay for 4 x TEVI OV5640 MIPI Camera module on J722S-EVM board.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	cam0_reset_pins_default: cam0-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x03c, PIN_OUTPUT, 7) /* (R22) GPIO0_15 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam1_reset_pins_default: cam1-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x044, PIN_OUTPUT, 7) /* (R26) GPIO0_17 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam2_reset_pins_default: cam2-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x04c, PIN_OUTPUT, 7) /* (T25) GPIO0_19 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cam3_reset_pins_default: cam3-default-reset-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x054, PIN_OUTPUT, 7) /* (T21) GPIO0_21 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	clk_ov5640_fixed: clock-24000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;24000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_2p8v: regulator-2p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "2P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_1p8v: regulator-1p8v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "1P8V";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reg_3p3v: regulator-3p3v {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "3P3V";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3_exp&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi01_mux {</div><div class='add'>+	idle-state = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;csi23_mux {</div><div class='add'>+	idle-state = &lt;1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pca9543_0 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* CAM0 I2C */</div><div class='add'>+	i2c@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ov5640_0: camera@3c {</div><div class='add'>+			compatible = "ovti,ov5640";</div><div class='add'>+			reg = &lt;0x3c&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='add'>+			clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+			AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam0_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam0: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx0_in_sensor&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CAM1 I2C */</div><div class='add'>+	i2c@1 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ov5640_1: camera@3c {</div><div class='add'>+			compatible = "ovti,ov5640";</div><div class='add'>+			reg = &lt;0x3c&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='add'>+			clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+			AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam1_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam1: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx1_in_sensor&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pca9543_1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* CAM0 I2C */</div><div class='add'>+	i2c@0 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		ov5640_2: camera@3c {</div><div class='add'>+			compatible = "ovti,ov5640";</div><div class='add'>+			reg = &lt;0x3c&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='add'>+			clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+			AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam2_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam2: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx2_in_sensor&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* CAM1 I2C */</div><div class='add'>+	i2c@1 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		ov5640_3: camera@3c {</div><div class='add'>+			compatible = "ovti,ov5640";</div><div class='add'>+			reg = &lt;0x3c&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_ov5640_fixed&gt;;</div><div class='add'>+			clock-names = "xclk";</div><div class='add'>+</div><div class='add'>+			AVDD-supply = &lt;&amp;reg_2p8v&gt;;</div><div class='add'>+			DOVDD-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+			DVDD-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;cam3_reset_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+			reset-gpios = &lt;&amp;main_gpio0 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+			port {</div><div class='add'>+				csi2_cam3: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;csi2rx3_in_sensor&gt;;</div><div class='add'>+					clock-lanes = &lt;0&gt;;</div><div class='add'>+					data-lanes = &lt;1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx0 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi0_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx0_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam0&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx1 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi1_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx1_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam1&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx2 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi2_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx2_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam2&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cdns_csi2rx3 {</div><div class='add'>+	ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		csi3_port0: port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			csi2rx3_in_sensor: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;csi2_cam3&gt;;</div><div class='add'>+				bus-type = &lt;4&gt;; /* CSI2 DPHY */</div><div class='add'>+				clock-lanes = &lt;0&gt;;</div><div class='add'>+				data-lanes = &lt;1 2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ti_csi2rx3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts<br/>index a00f4a7d20d9..e0e303da7e15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s-evm.dts</a></div><div class='hunk'>@@ -52,71 +52,17 @@</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='add'>+		wkup_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='add'>+		wkup_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='ctx'> 			compatible = "shared-dma-pool";</div><div class='ctx'> 			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='ctx'> 			no-map;</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c7x_0_memory_region: c7x-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c7x_1_memory_region: c7x-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtos_ipc_memory_region: ipc-memories@a5000000 {</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x1c00000&gt;;</div><div class='del'>-			alignment = &lt;0x1000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vmain_pd: regulator-0 {</div><div class='hunk'>@@ -141,6 +87,17 @@</div><div class='ctx'> 		regulator-boot-on;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vsys_3v3: regulator-vsys3v3 {</div><div class='add'>+		/* output of LM5141-Q1 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vmain_pd&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_mmc1: regulator-mmc1 {</div><div class='ctx'> 		/* TPS22918DBVR */</div><div class='ctx'> 		compatible = "regulator-fixed";</div><div class='hunk'>@@ -153,6 +110,17 @@</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	vsys_3v3_exp: regulator-TPS22990 {</div><div class='add'>+		/* output of TPS22990 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_3v3_exp";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	vdd_sd_dv: regulator-TLV71033 {</div><div class='ctx'> 		compatible = "regulator-gpio";</div><div class='ctx'> 		regulator-name = "tlv71033";</div><div class='hunk'>@@ -244,6 +212,28 @@</div><div class='ctx'> 		max-bitrate = &lt;5000000&gt;;</div><div class='ctx'> 		standby-gpios = &lt;&amp;exp1 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	csi01_mux: mux-controller-0 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		#mux-state-cells = &lt;1&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;exp1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		idle-state = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	csi23_mux: mux-controller-1 {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		#mux-state-cells = &lt;1&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;exp1 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		idle-state = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpsw_mac_syscon {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy_gmii_sel {</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_pmx0 {</div><div class='hunk'>@@ -263,6 +253,13 @@</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	main_i2c2_pins_default: main-i2c2-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */</div><div class='add'>+			J722S_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_uart0_pins_default: main-uart0-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J722S_IOPAD(0x01c8, PIN_INPUT, 0)	/* (A22) UART0_RXD */</div><div class='hunk'>@@ -303,6 +300,7 @@</div><div class='ctx'> 			J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */</div><div class='ctx'> 			J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ospi0_pins_default: ospi0-default-pins {</div><div class='hunk'>@@ -337,6 +335,7 @@</div><div class='ctx'> 			J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */</div><div class='ctx'> 			J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */</div><div class='ctx'> 		&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	main_usb1_pins_default: main-usb1-default-pins {</div><div class='hunk'>@@ -359,6 +358,13 @@</div><div class='ctx'> 			J722S_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */</div><div class='ctx'> 		&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) GPIO0_12 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cpsw3g {</div><div class='hunk'>@@ -374,6 +380,7 @@</div><div class='ctx'> </div><div class='ctx'> 	cpsw3g_phy0: ethernet-phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='ctx'> 		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='ctx'> 		ti,min-output-impedance;</div><div class='hunk'>@@ -384,6 +391,7 @@</div><div class='ctx'> 	phy-mode = "rgmii-rxid";</div><div class='ctx'> 	phy-handle = &lt;&amp;cpsw3g_phy0&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='add'>+	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_gpio1 {</div><div class='hunk'>@@ -406,6 +414,13 @@</div><div class='ctx'> </div><div class='ctx'> &amp;mcu_pmx0 {</div><div class='ctx'> </div><div class='add'>+	mcu_i2c0_pins_default: mcu-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J722S_MCU_IOPAD(0x048, PIN_INPUT, 0) /* (E11) MCU_I2C0_SDA */</div><div class='add'>+			J722S_MCU_IOPAD(0x044, PIN_INPUT, 0) /* (B13) MCU_I2C0_SCL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='ctx'> 		pinctrl-single,pins = &lt;</div><div class='ctx'> 			J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */</div><div class='hunk'>@@ -459,6 +474,87 @@</div><div class='ctx'> 	clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bootph-all;</div><div class='add'>+</div><div class='add'>+	tps65224: pmic@48 {</div><div class='add'>+		compatible = "ti,tps65224-q1";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		ti,primary-pmic;</div><div class='add'>+</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		buck12-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+		buck4-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		ldo1-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+		ldo3-supply = &lt;&amp;vsys_io_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+</div><div class='add'>+			buck1: buck1 {</div><div class='add'>+				regulator-name = "vcc1v8_io_buck1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2: buck2 {</div><div class='add'>+				regulator-name = "vcc1v1_ddr_buck2";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3: buck3 {</div><div class='add'>+				regulator-name = "vcc0v85_ram_buck3";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck4: buck4 {</div><div class='add'>+				regulator-name = "vcc0v75_ioret_buck4";</div><div class='add'>+				regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1: ldo1 {</div><div class='add'>+				regulator-name = "vdda1v8_pll_ldo1";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2: ldo2 {</div><div class='add'>+				regulator-name = "dvdd3v3_ldo2";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3: ldo3 {</div><div class='add'>+				regulator-name = "vdd1v85_phy_ldo3";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+	       };</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;k3_clks {</div><div class='hunk'>@@ -495,8 +591,8 @@</div><div class='ctx'> 		p05-hog {</div><div class='ctx'> 			/* P05 - USB2.0_MUX_SEL */</div><div class='ctx'> 			gpio-hog;</div><div class='del'>-			gpios = &lt;5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			output-high;</div><div class='add'>+			gpios = &lt;5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			output-low;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		p01_hog: p01-hog {</div><div class='hunk'>@@ -536,6 +632,27 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;main_i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c2_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	pca9543_0: i2c-mux@70 {</div><div class='add'>+		compatible = "nxp,pca9543";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pca9543_1: i2c-mux@71 {</div><div class='add'>+		compatible = "nxp,pca9543";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x71&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;ospi0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;ospi0_pins_default&gt;;</div><div class='hunk'>@@ -617,111 +734,16 @@</div><div class='ctx'> 	bootph-all;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_wkup_r5_0: mbox-wkup-r5-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_c7x_0: mbox-c7x-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	mbox_main_r5_0: mbox-main-r5-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c7x_1: mbox-c7x-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_r5fss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_wkup_r5_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c7x_0 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_c7x_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c7x_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c7x_0_memory_region&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c7x_1 {</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c7x_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c7x_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c7x_1_memory_region&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;serdes_ln_ctrl {</div><div class='ctx'> 	idle-states = &lt;J722S_SERDES0_LANE0_USB&gt;,</div><div class='ctx'> 		      &lt;J722S_SERDES1_LANE0_PCIE0_LANE0&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;serdes0 {</div><div class='add'>+&amp;serdes_wiz0 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='ctx'> 	serdes0_usb_link: phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		cdns,num-lanes = &lt;1&gt;;</div><div class='hunk'>@@ -731,8 +753,11 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;serdes1 {</div><div class='add'>+&amp;serdes_wiz1 {</div><div class='ctx'> 	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes1 {</div><div class='ctx'> 	serdes1_pcie_link: phy@0 {</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 		cdns,num-lanes = &lt;1&gt;;</div><div class='hunk'>@@ -759,6 +784,10 @@</div><div class='ctx'> 	usb-role-switch;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;usb0_phy_ctrl {</div><div class='add'>+	bootph-all;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;usbss1 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;main_usb1_pins_default&gt;;</div><div class='hunk'>@@ -812,3 +841,12 @@</div><div class='ctx'> &amp;mcu_gpio0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mcu_i2c0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-j722s-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi<br/>index ed6f4ba08afc..d57fdd38bdce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s-main.dtsi</a></div><div class='hunk'>@@ -32,6 +32,8 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 279 1&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 279 5&gt;;</div><div class='ctx'> </div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='ctx'> 		serdes0: serdes@f000000 {</div><div class='ctx'> 			compatible = "ti,j721e-serdes-10g";</div><div class='ctx'> 			reg = &lt;0x0f000000 0x00010000&gt;;</div><div class='hunk'>@@ -50,8 +52,6 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled"; /* Needs lane config */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -70,6 +70,8 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 280 1&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 280 5&gt;;</div><div class='ctx'> </div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='ctx'> 		serdes1: serdes@f010000 {</div><div class='ctx'> 			compatible = "ti,j721e-serdes-10g";</div><div class='ctx'> 			reg = &lt;0x0f010000 0x00010000&gt;;</div><div class='hunk'>@@ -88,8 +90,6 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			status = "disabled"; /* Needs lane config */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -98,10 +98,10 @@</div><div class='ctx'> 		reg = &lt;0x00 0x0f102000 0x00 0x1000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0f100000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x68000000 0x00 0x00001000&gt;;</div><div class='add'>+		      &lt;0x06 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='del'>-		ranges = &lt;0x01000000 0x00 0x68001000  0x00 0x68001000  0x00 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x00 0x68011000  0x00 0x68011000  0x00 0x7fef000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x06 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x06 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 99 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='hunk'>@@ -135,7 +135,7 @@</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='del'>-		usb1: usb@31200000{</div><div class='add'>+		usb1: usb@31200000 {</div><div class='ctx'> 			compatible = "cdns,usb3";</div><div class='ctx'> 			reg = &lt;0x00 0x31200000 0x00 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x00 0x31210000 0x00 0x10000&gt;,</div><div class='hunk'>@@ -154,6 +154,198 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ti_csi2rx1: ticsi2rx@30122000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x30122000 0x00 0x1000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x5100 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 247 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx1: csi-bridge@30121000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x30121000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 247 0&gt;, &lt;&amp;k3_clks 247 3&gt;, &lt;&amp;k3_clks 247 0&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 247 0&gt;, &lt;&amp;k3_clks 247 4&gt;, &lt;&amp;k3_clks 247 4&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy1&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi1_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ti_csi2rx2: ticsi2rx@30142000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x30142000 0x00 0x1000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 248 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x5200 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx2: csi-bridge@30141000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x30141000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 248 0&gt;, &lt;&amp;k3_clks 248 3&gt;, &lt;&amp;k3_clks 248 0&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 248 0&gt;, &lt;&amp;k3_clks 248 4&gt;, &lt;&amp;k3_clks 248 4&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy2&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi2_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ti_csi2rx3: ticsi2rx@30162000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x30162000 0x00 0x1000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x5300 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 249 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx3: csi-bridge@30161000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x30161000 0x00 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 249 0&gt;, &lt;&amp;k3_clks 249 3&gt;, &lt;&amp;k3_clks 249 0&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 249 0&gt;, &lt;&amp;k3_clks 249 4&gt;, &lt;&amp;k3_clks 249 4&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy3&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi3_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi3_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi3_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi3_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi3_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy1: phy@30130000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x30130000 0x00 0x1100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 251 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy2: phy@30150000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x30150000 0x00 0x1100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 252 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy3: phy@30170000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x30170000 0x00 0x1100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 253 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	main_r5fss0: r5fss@78400000 {</div><div class='ctx'> 		compatible = "ti,am62-r5fss";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -176,6 +368,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -202,6 +395,26 @@</div><div class='ctx'> 		ti,sci-proc-ids = &lt;0x31 0xff&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	e5010: jpeg-encoder@fd20000 {</div><div class='add'>+		compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";</div><div class='add'>+		reg = &lt;0x00 0xfd20000 0x00 0x100&gt;,</div><div class='add'>+		      &lt;0x00 0xfd20200 0x00 0x200&gt;;</div><div class='add'>+		reg-names = "core", "mmu";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 201 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 201 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_bcdma_csi {</div><div class='add'>+	compatible = "ti,j722s-dmss-bcdma-csi";</div><div class='add'>+	reg = &lt;0x00 0x4e230000 0x00 0x100&gt;,</div><div class='add'>+	      &lt;0x00 0x4e180000 0x00 0x20000&gt;,</div><div class='add'>+	      &lt;0x00 0x4e300000 0x00 0x10000&gt;,</div><div class='add'>+	      &lt;0x00 0x4e100000 0x00 0x80000&gt;;</div><div class='add'>+	reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";</div><div class='add'>+	ti,sci-rm-range-tchan = &lt;0x22&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MCU domain overrides */</div><div class='hunk'>@@ -225,6 +438,15 @@</div><div class='ctx'> 				&lt;0x10 0x3&gt;; /* SERDES1 lane0 select */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	audio_refclk0: clock@82e0 {</div><div class='add'>+		compatible = "ti,am62-audio-refclk";</div><div class='add'>+		reg = &lt;0x82e0 0x4&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 157 0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 157 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 157 15&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	audio_refclk1: clock@82e4 {</div><div class='ctx'> 		compatible = "ti,am62-audio-refclk";</div><div class='ctx'> 		reg = &lt;0x82e4 0x4&gt;;</div><div class='hunk'>@@ -251,21 +473,6 @@</div><div class='ctx'> 	ti,interrupt-ranges = &lt;7 71 21&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_pmx0 {</div><div class='del'>-	pinctrl-single,gpio-range =</div><div class='del'>-		&lt;&amp;main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 72 17 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 101 25 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD&gt;,</div><div class='del'>-		&lt;&amp;main_pmx0_range 149 2 PIN_GPIO_RANGE_IOPAD&gt;;</div><div class='del'>-</div><div class='del'>-	main_pmx0_range: gpio-range {</div><div class='del'>-		#pinctrl-single,gpio-range-cells = &lt;3&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;main_gpio0 {</div><div class='ctx'> 	gpio-ranges = &lt;&amp;main_pmx0 0 0 32&gt;, &lt;&amp;main_pmx0 32 33 38&gt;,</div><div class='ctx'> 			&lt;&amp;main_pmx0 70 72 17&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..cb7cd385a165<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,163 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core0_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core0_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c7x_0_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c7x_0_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c7x_1_dma_memory_region: memory@a4000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c7x_1_memory_region: memory@a4100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtos_ipc_memory_region: memory@a5000000 {</div><div class='add'>+		reg = &lt;0x00 0xa5000000 0x00 0x1c00000&gt;;</div><div class='add'>+		alignment = &lt;0x1000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_wkup_r5_0: mbox-wkup-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5_0: mbox-mcu-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_c7x_0: mbox-c7x-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mbox_main_r5_0: mbox-main-r5-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_c7x_1: mbox-c7x-1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Timers are used by Remoteproc firmware */</div><div class='add'>+&amp;main_timer0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer1 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_wkup_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;wkup_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;wkup_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_mcu_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c7x_0 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_c7x_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c7x_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c7x_0_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c7x_1 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_c7x_1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c7x_1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c7x_1_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi<br/>index 14c6c6a332ef..cdc8570e54b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j722s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j722s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j722s.dtsi</a></div><div class='hunk'>@@ -56,6 +56,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 135 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='hunk'>@@ -71,6 +72,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 136 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='hunk'>@@ -86,6 +88,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 137 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='hunk'>@@ -101,6 +104,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;128&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;k3_clks 138 0&gt;;</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts<br/>new file mode 100644<br/>index 000000000000..fcb7f05d7faf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j742s2-evm.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * EVM Board Schematics: https://www.ti.com/lit/zip/SPAC001</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include "k3-j742s2.dtsi"</div><div class='add'>+#include "k3-j784s4-j742s2-evm-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Texas Instruments J742S2 EVM";</div><div class='add'>+	compatible = "ti,j742s2-evm", "ti,j742s2";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		/* 16G RAM */</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='add'>+		      &lt;0x00000008 0x80000000 0x00000003 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi<br/>new file mode 100644<br/>index 000000000000..b320c27f7afe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for J742S2 SoC Family</div><div class='add'>+ *</div><div class='add'>+ * TRM: https://www.ti.com/lit/pdf/spruje3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;c71_0 {</div><div class='add'>+	firmware-name = "j742s2-c71_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_1 {</div><div class='add'>+	firmware-name = "j742s2-c71_1-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_2 {</div><div class='add'>+	firmware-name = "j742s2-c71_2-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f0_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f0_1-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core0 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f1_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core1 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f1_1-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss2_core0 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f2_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss2_core1 {</div><div class='add'>+	firmware-name = "j742s2-main-r5f2_1-fw";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi<br/>new file mode 100644<br/>index 000000000000..61db2348d6a4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for J742S2 SoC Family</div><div class='add'>+ *</div><div class='add'>+ * TRM: https://www.ti.com/lit/pdf/spruje3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	firmware-name = "j742s2-mcu-r5f0_0-fw";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	firmware-name = "j742s2-mcu-r5f0_1-fw";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j742s2.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2.dtsi<br/>new file mode 100644<br/>index 000000000000..d265df1abade<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j742s2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j742s2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for J742S2 SoC Family</div><div class='add'>+ *</div><div class='add'>+ * TRM: https://www.ti.com/lit/pdf/spruje3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include "k3-j784s4-j742s2-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Texas Instruments K3 J742S2 SoC";</div><div class='add'>+	compatible = "ti,j742s2";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0: cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x000&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0xc000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x001&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0xc000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x002&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0xc000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "arm,cortex-a72";</div><div class='add'>+			reg = &lt;0x003&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			i-cache-size = &lt;0xc000&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-j742s2-main.dtsi"</div><div class='add'>+#include "k3-j742s2-mcu-wakeup.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso<br/>index dcd2c7c39ec3..c1f9573557d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso</a></div><div class='hunk'>@@ -102,13 +102,6 @@</div><div class='ctx'> 		gpios = &lt;16 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		output-low;</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	/* Toggle MUX2 for MDIO lines */</div><div class='del'>-	mux-sel-hog {</div><div class='del'>-		gpio-hog;</div><div class='del'>-		gpios = &lt;13 GPIO_ACTIVE_HIGH&gt;, &lt;14 GPIO_ACTIVE_HIGH&gt;, &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		output-high;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_pmx0 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso<br/>index d5f8c8531923..424628c63c2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;main_cpsw0 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts<br/>index 6695ebbcb4d0..6c7458c76f53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-evm.dts</a></div><div class='hunk'>@@ -10,1522 +10,24 @@</div><div class='ctx'> #include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include "k3-j784s4.dtsi"</div><div class='add'>+#include "k3-j784s4-j742s2-evm-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ti,j784s4-evm", "ti,j784s4";</div><div class='ctx'> 	model = "Texas Instruments J784S4 EVM";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial2:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;wkup_uart0;</div><div class='del'>-		serial1 = &amp;mcu_uart0;</div><div class='del'>-		serial2 = &amp;main_uart8;</div><div class='del'>-		mmc0 = &amp;main_sdhci0;</div><div class='del'>-		mmc1 = &amp;main_sdhci1;</div><div class='del'>-		i2c0 = &amp;wkup_i2c0;</div><div class='del'>-		i2c3 = &amp;main_i2c0;</div><div class='del'>-		ethernet0 = &amp;mcu_cpsw_port1;</div><div class='del'>-		ethernet1 = &amp;main_cpsw1_port1;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		bootph-all;</div><div class='ctx'> 		/* 32G RAM */</div><div class='ctx'> 		reg = &lt;0x00000000 0x80000000 0x00000000 0x80000000&gt;,</div><div class='ctx'> 		      &lt;0x00000008 0x80000000 0x00000007 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		bootph-all;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved_memory: reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		secure_ddr: optee@9e800000 {</div><div class='del'>-			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core0_memory_region: r5f-memory@a6100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core1_memory_region: r5f-memory@a7100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_dma_memory_region: c71-dma-memory@a8000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_0_memory_region: c71-memory@a8100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_dma_memory_region: c71-dma-memory@a9000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa9000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_1_memory_region: c71-memory@a9100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xa9100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_2_dma_memory_region: c71-dma-memory@aa000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xaa000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_2_memory_region: c71-memory@aa100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xaa100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_3_dma_memory_region: c71-dma-memory@ab000000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xab000000 0x00 0x100000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		c71_3_memory_region: c71-memory@ab100000 {</div><div class='del'>-			compatible = "shared-dma-pool";</div><div class='del'>-			reg = &lt;0x00 0xab100000 0x00 0xf00000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	evm_12v0: regulator-evm12v0 {</div><div class='del'>-		/* main supply */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "evm_12v0";</div><div class='del'>-		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vsys_3v3: regulator-vsys3v3 {</div><div class='del'>-		/* Output of LM5140 */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vsys_3v3";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;evm_12v0&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vsys_5v0: regulator-vsys5v0 {</div><div class='del'>-		/* Output of LM5140 */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vsys_5v0";</div><div class='del'>-		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;evm_12v0&gt;;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_mmc1: regulator-sd {</div><div class='del'>-		/* Output of TPS22918 */</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "vdd_mmc1";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		enable-active-high;</div><div class='del'>-		vin-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		gpio = &lt;&amp;exp2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_sd_dv: regulator-TLV71033 {</div><div class='del'>-		/* Output of TLV71033 */</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='del'>-		regulator-name = "tlv71033";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='del'>-		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='del'>-		gpios = &lt;&amp;main_gpio0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		states = &lt;1800000 0x0&gt;,</div><div class='del'>-			 &lt;3300000 0x1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dp0_pwr_3v3: regulator-dp0-prw {</div><div class='del'>-		compatible = "regulator-fixed";</div><div class='del'>-		regulator-name = "dp0-pwr";</div><div class='del'>-		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-		gpio = &lt;&amp;exp4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		enable-active-high;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dp0: connector-dp0 {</div><div class='del'>-		compatible = "dp-connector";</div><div class='del'>-		label = "DP0";</div><div class='del'>-		type = "full-size";</div><div class='del'>-		dp-pwr-supply = &lt;&amp;dp0_pwr_3v3&gt;;</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			dp0_connector_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dp0_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	transceiver0: can-phy0 {</div><div class='del'>-		compatible = "ti,tcan1042";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;mcu_mcan0_gpio_pins_default&gt;;</div><div class='del'>-		standby-gpios = &lt;&amp;wkup_gpio0 69 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	transceiver1: can-phy1 {</div><div class='del'>-		compatible = "ti,tcan1042";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;mcu_mcan1_gpio_pins_default&gt;;</div><div class='del'>-		standby-gpios = &lt;&amp;wkup_gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	transceiver2: can-phy2 {</div><div class='del'>-		/* standby pin has been grounded by default */</div><div class='del'>-		compatible = "ti,tcan1042";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	transceiver3: can-phy3 {</div><div class='del'>-		compatible = "ti,tcan1042";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		max-bitrate = &lt;5000000&gt;;</div><div class='del'>-		standby-gpios = &lt;&amp;exp2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		mux-states = &lt;&amp;mux1 1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mux1: mux-controller {</div><div class='del'>-		compatible = "gpio-mux";</div><div class='del'>-		#mux-state-cells = &lt;1&gt;;</div><div class='del'>-		mux-gpios = &lt;&amp;exp2 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		idle-state = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	codec_audio: sound {</div><div class='del'>-		compatible = "ti,j7200-cpb-audio";</div><div class='del'>-		model = "j784s4-cpb";</div><div class='del'>-</div><div class='del'>-		ti,cpb-mcasp = &lt;&amp;mcasp0&gt;;</div><div class='del'>-		ti,cpb-codec = &lt;&amp;pcm3168a_1&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;k3_clks 265 0&gt;, &lt;&amp;k3_clks 265 1&gt;,</div><div class='del'>-			 &lt;&amp;k3_clks 157 34&gt;, &lt;&amp;k3_clks 157 63&gt;;</div><div class='del'>-		clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000",</div><div class='del'>-			      "cpb-codec-scki", "cpb-codec-scki-48000";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_gpio0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_pmx0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	main_cpsw2g_default_pins: main-cpsw2g-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */</div><div class='del'>-			J784S4_IOPAD(0x0a0, PIN_INPUT, 6) /* (AD34) MCASP0_AXR12.RGMII1_RD1 */</div><div class='del'>-			J784S4_IOPAD(0x0a4, PIN_INPUT, 6) /* (AJ36) MCASP0_AXR13.RGMII1_RD2 */</div><div class='del'>-			J784S4_IOPAD(0x0a8, PIN_INPUT, 6) /* (AF34) MCASP0_AXR14.RGMII1_RD3 */</div><div class='del'>-			J784S4_IOPAD(0x0b0, PIN_INPUT, 6) /* (AL33) MCASP1_AXR3.RGMII1_RXC */</div><div class='del'>-			J784S4_IOPAD(0x0ac, PIN_INPUT, 6) /* (AE34) MCASP0_AXR15.RGMII1_RX_CTL */</div><div class='del'>-			J784S4_IOPAD(0x08c, PIN_INPUT, 6) /* (AE35) MCASP0_AXR7.RGMII1_TD0 */</div><div class='del'>-			J784S4_IOPAD(0x090, PIN_INPUT, 6) /* (AC35) MCASP0_AXR8.RGMII1_TD1 */</div><div class='del'>-			J784S4_IOPAD(0x094, PIN_INPUT, 6) /* (AG35) MCASP0_AXR9.RGMII1_TD2 */</div><div class='del'>-			J784S4_IOPAD(0x098, PIN_INPUT, 6) /* (AH36) MCASP0_AXR10.RGMII1_TD3 */</div><div class='del'>-			J784S4_IOPAD(0x0b4, PIN_INPUT, 6) /* (AL34) MCASP1_AXR4.RGMII1_TXC */</div><div class='del'>-			J784S4_IOPAD(0x09c, PIN_INPUT, 6) /* (AF35) MCASP0_AXR11.RGMII1_TX_CTL */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_cpsw2g_mdio_default_pins: main-cpsw2g-mdio-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x0c0, PIN_INPUT, 6) /* (AD38) MCASP1_AXR0.MDIO0_MDC */</div><div class='del'>-			J784S4_IOPAD(0x0bc, PIN_INPUT, 6) /* (AD33) MCASP1_AFSX.MDIO0_MDIO */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart8_pins_default: main-uart8-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */</div><div class='del'>-			J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */</div><div class='del'>-			J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */</div><div class='del'>-			J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */</div><div class='del'>-			J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c5_pins_default: main-i2c5-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */</div><div class='del'>-			J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */</div><div class='del'>-			J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */</div><div class='del'>-			J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */</div><div class='del'>-			J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */</div><div class='del'>-			J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */</div><div class='del'>-			J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */</div><div class='del'>-			J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */</div><div class='del'>-			J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dp0_pins_default: dp0-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c4_pins_default: main-i2c4-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */</div><div class='del'>-			J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan4_pins_default: main-mcan4-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x088, PIN_INPUT, 0) /* (AF36) MCAN4_RX */</div><div class='del'>-			J784S4_IOPAD(0x084, PIN_OUTPUT, 0) /* (AG38) MCAN4_TX */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan16_pins_default: main-mcan16-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x028, PIN_INPUT, 0) /* (AE33) MCAN16_RX */</div><div class='del'>-			J784S4_IOPAD(0x024, PIN_OUTPUT, 0) /* (AH34) MCAN16_TX */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_usbss0_pins_default: main-usbss0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c3_pins_default: main-i2c3-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x064, PIN_INPUT, 13) /* (AF38) MCAN0_TX.I2C3_SCL */</div><div class='del'>-			J784S4_IOPAD(0x060, PIN_INPUT, 13) /* (AE36) MCASP2_AXR1.I2C3_SDA */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcasp0_pins_default: main-mcasp0-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x038, PIN_OUTPUT_PULLDOWN, 1) /* (AK35) MCASP0_ACLKX */</div><div class='del'>-			J784S4_IOPAD(0x03c, PIN_OUTPUT_PULLDOWN, 1) /* (AK38) MCASP0_AFSX */</div><div class='del'>-			J784S4_IOPAD(0x07c, PIN_OUTPUT_PULLDOWN, 1) /* (AJ38) MCASP0_AXR3 */</div><div class='del'>-			J784S4_IOPAD(0x080, PIN_INPUT_PULLDOWN, 1) /* (AK34) MCASP0_AXR4 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_pmx2 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_uart0_pins_default: mcu-uart0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (K37) WKUP_GPIO0_15.MCU_UART0_RTSn */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_mdio_pins_default: mcu-mdio-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_adc0_pins_default: mcu-adc0-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_adc1_pins_default: mcu-adc1-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_mcan1_pins_default: mcu-mcan1-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (J38) MCU_SPI0_D1.WKUP_GPIO0_69 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_pmx1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			/* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_pmx0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_pmx1 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {</div><div class='del'>-		bootph-all;</div><div class='del'>-		pinctrl-single,pins = &lt;</div><div class='del'>-			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */</div><div class='del'>-			J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_uart0 {</div><div class='del'>-	/* Firmware usage */</div><div class='del'>-	status = "reserved";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;wkup_i2c0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;wkup_i2c0_pins_default&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	eeprom@50 {</div><div class='del'>-		/* CAV24C256WE-GT3 */</div><div class='del'>-		compatible = "atmel,24c256";</div><div class='del'>-		reg = &lt;0x50&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tps659413: pmic@48 {</div><div class='del'>-		compatible = "ti,tps6594-q1";</div><div class='del'>-		reg = &lt;0x48&gt;;</div><div class='del'>-		system-power-controller;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;wkup_gpio0&gt;;</div><div class='del'>-		interrupts = &lt;39 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		ti,primary-pmic;</div><div class='del'>-		buck12-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		buck3-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		buck4-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		buck5-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo1-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo2-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo3-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		ldo4-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			bucka12: buck12 {</div><div class='del'>-				regulator-name = "vdd_ddr_1v1";</div><div class='del'>-				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bucka3: buck3 {</div><div class='del'>-				regulator-name = "vdd_ram_0v85";</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bucka4: buck4 {</div><div class='del'>-				regulator-name = "vdd_io_1v8";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bucka5: buck5 {</div><div class='del'>-				regulator-name = "vdd_mcu_0v85";</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ldoa1: ldo1 {</div><div class='del'>-				regulator-name = "vdd_mcuio_1v8";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ldoa2: ldo2 {</div><div class='del'>-				regulator-name = "vdd_mcuio_3v3";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ldoa3: ldo3 {</div><div class='del'>-				regulator-name = "vds_dll_0v8";</div><div class='del'>-				regulator-min-microvolt = &lt;800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;800000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ldoa4: ldo4 {</div><div class='del'>-				regulator-name = "vda_mcu_1v8";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tps62873a: regulator@40 {</div><div class='del'>-		compatible = "ti,tps62873";</div><div class='del'>-		reg = &lt;0x40&gt;;</div><div class='del'>-		bootph-pre-ram;</div><div class='del'>-		regulator-name = "VDD_CPU_AVS";</div><div class='del'>-		regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1330000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tps62873b: regulator@43 {</div><div class='del'>-		compatible = "ti,tps62873";</div><div class='del'>-		reg = &lt;0x43&gt;;</div><div class='del'>-		regulator-name = "VDD_CORE_0V8";</div><div class='del'>-		regulator-min-microvolt = &lt;760000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;840000&gt;;</div><div class='del'>-		regulator-boot-on;</div><div class='del'>-		regulator-always-on;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_uart0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_uart8 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_uart8_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ufs_wrapper {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;fss {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ospi0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_fss0_ospi0_pins_default&gt;, &lt;&amp;mcu_fss0_ospi0_1_pins_default&gt;;</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;8&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;8&gt;;</div><div class='del'>-		spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-		cdns,tshsl-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tchsh-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tslch-ns = &lt;60&gt;;</div><div class='del'>-		cdns,read-delay = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		partitions {</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			partition@0 {</div><div class='del'>-				label = "ospi.tiboot3";</div><div class='del'>-				reg = &lt;0x0 0x80000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@80000 {</div><div class='del'>-				label = "ospi.tispl";</div><div class='del'>-				reg = &lt;0x80000 0x200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@280000 {</div><div class='del'>-				label = "ospi.u-boot";</div><div class='del'>-				reg = &lt;0x280000 0x400000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@680000 {</div><div class='del'>-				label = "ospi.env";</div><div class='del'>-				reg = &lt;0x680000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@6c0000 {</div><div class='del'>-				label = "ospi.env.backup";</div><div class='del'>-				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@800000 {</div><div class='del'>-				label = "ospi.rootfs";</div><div class='del'>-				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@3fc0000 {</div><div class='del'>-				bootph-all;</div><div class='del'>-				label = "ospi.phypattern";</div><div class='del'>-				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;ospi1 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_fss0_ospi1_pins_default&gt;;</div><div class='del'>-</div><div class='del'>-	flash@0 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-tx-bus-width = &lt;1&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;4&gt;;</div><div class='del'>-		spi-max-frequency = &lt;40000000&gt;;</div><div class='del'>-		cdns,tshsl-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tchsh-ns = &lt;60&gt;;</div><div class='del'>-		cdns,tslch-ns = &lt;60&gt;;</div><div class='del'>-		cdns,read-delay = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		partitions {</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			partition@0 {</div><div class='del'>-				label = "qspi.tiboot3";</div><div class='del'>-				reg = &lt;0x0 0x80000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@80000 {</div><div class='del'>-				label = "qspi.tispl";</div><div class='del'>-				reg = &lt;0x80000 0x200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@280000 {</div><div class='del'>-				label = "qspi.u-boot";</div><div class='del'>-				reg = &lt;0x280000 0x400000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@680000 {</div><div class='del'>-				label = "qspi.env";</div><div class='del'>-				reg = &lt;0x680000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@6c0000 {</div><div class='del'>-				label = "qspi.env.backup";</div><div class='del'>-				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@800000 {</div><div class='del'>-				label = "qspi.rootfs";</div><div class='del'>-				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			partition@3fc0000 {</div><div class='del'>-				bootph-all;</div><div class='del'>-				label = "qspi.phypattern";</div><div class='del'>-				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;main_i2c0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='del'>-</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	exp1: gpio@20 {</div><div class='del'>-		compatible = "ti,tca6416";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-line-names = "PCIE1_2L_MODE_SEL", "PCIE1_4L_PERSTZ", "PCIE1_2L_RC_RSTZ",</div><div class='del'>-				  "PCIE1_2L_EP_RST_EN", "PCIE0_4L_MODE_SEL", "PCIE0_4L_PERSTZ",</div><div class='del'>-				  "PCIE0_4L_RC_RSTZ", "PCIE0_4L_EP_RST_EN", "PCIE1_4L_PRSNT#",</div><div class='del'>-				  "PCIE0_4L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3",</div><div class='del'>-				  "AUDIO_MUX_SEL", "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTZ";</div><div class='del'>-</div><div class='del'>-		p12-hog {</div><div class='del'>-			/* P12 - AUDIO_MUX_SEL */</div><div class='del'>-			gpio-hog;</div><div class='del'>-			gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			output-low;</div><div class='del'>-			line-name = "AUDIO_MUX_SEL";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	exp2: gpio@22 {</div><div class='del'>-		compatible = "ti,tca6424";</div><div class='del'>-		reg = &lt;0x22&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-line-names = "R_GPIO_RGMII1_RST", "ENET2_I2CMUX_SEL", "GPIO_USD_PWR_EN",</div><div class='del'>-				  "USBC_PWR_EN", "USBC_MODE_SEL1", "USBC_MODE_SEL0",</div><div class='del'>-				  "GPIO_LIN_EN", "R_CAN_STB", "CTRL_PM_I2C_OE#",</div><div class='del'>-				  "ENET2_EXP_PWRDN", "ENET2_EXP_SPARE2", "CDCI2_RSTZ",</div><div class='del'>-				  "USB2.0_MUX_SEL", "CANUART_MUX_SEL0", "CANUART_MUX2_SEL1",</div><div class='del'>-				  "CANUART_MUX1_SEL1", "ENET1_EXP_PWRDN", "ENET1_EXP_RESETZ",</div><div class='del'>-				  "ENET1_I2CMUX_SEL", "ENET1_EXP_SPARE2", "ENET2_EXP_RESETZ",</div><div class='del'>-				  "USER_INPUT1", "USER_LED1", "USER_LED2";</div><div class='del'>-</div><div class='del'>-		p13-hog {</div><div class='del'>-			/* P13 - CANUART_MUX_SEL0 */</div><div class='del'>-			gpio-hog;</div><div class='del'>-			gpios = &lt;13 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-			line-name = "CANUART_MUX_SEL0";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		p15-hog {</div><div class='del'>-			/* P15 - CANUART_MUX1_SEL1 */</div><div class='del'>-			gpio-hog;</div><div class='del'>-			gpios = &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			output-high;</div><div class='del'>-			line-name = "CANUART_MUX1_SEL1";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_i2c5 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_i2c5_pins_default&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	exp5: gpio@20 {</div><div class='del'>-		compatible = "ti,tca6408";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0",</div><div class='del'>-				  "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO3",</div><div class='del'>-				  "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2",</div><div class='del'>-				  "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_sdhci0 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	/* eMMC */</div><div class='del'>-	status = "okay";</div><div class='del'>-	non-removable;</div><div class='del'>-	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='del'>-	disable-wp;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_sdhci1 {</div><div class='del'>-	bootph-all;</div><div class='del'>-	/* SD card */</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	disable-wp;</div><div class='del'>-	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='del'>-	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_gpio0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_cpsw {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_cpsw_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;davinci_mdio {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_mdio_pins_default&gt;;</div><div class='del'>-</div><div class='del'>-	mcu_phy0: ethernet-phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='del'>-		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,min-output-impedance;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_cpsw_port1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	phy-mode = "rgmii-rxid";</div><div class='del'>-	phy-handle = &lt;&amp;mcu_phy0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_cpsw1 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_cpsw2g_default_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_cpsw1_mdio {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_cpsw2g_mdio_default_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	main_cpsw1_phy0: ethernet-phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='del'>-		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='del'>-		ti,min-output-impedance;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_cpsw1_port1 {</div><div class='del'>-	phy-mode = "rgmii-rxid";</div><div class='del'>-	phy-handle = &lt;&amp;main_cpsw1_phy0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;436&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;432&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;428&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;424&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;420&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c71_0: mbox-c71-0 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c71_1: mbox-c71-1 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mailbox0_cluster5 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	interrupts = &lt;416&gt;;</div><div class='del'>-</div><div class='del'>-	mbox_c71_2: mbox-c71-2 {</div><div class='del'>-		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mbox_c71_3: mbox-c71-3 {</div><div class='del'>-		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='del'>-		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_r5fss0_core1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2 {</div><div class='del'>-	ti,cluster-mode = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Timers are used by Remoteproc firmware */</div><div class='del'>-&amp;main_timer0 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer1 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer2 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer3 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer4 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer5 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer6 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer7 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer8 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_timer9 {</div><div class='del'>-	status = "reserved";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss0_core1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss1_core1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2_core0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss2_core0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss2_core0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_r5fss2_core1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;main_r5fss2_core1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;main_r5fss2_core1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_0_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_1_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_2&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_2_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_2_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;c71_3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_3&gt;;</div><div class='del'>-	memory-region = &lt;&amp;c71_3_dma_memory_region&gt;,</div><div class='del'>-			&lt;&amp;c71_3_memory_region&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tscadc0 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_adc0_pins_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-	adc {</div><div class='del'>-		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;tscadc1 {</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_adc1_pins_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	status = "okay";</div><div class='del'>-	adc {</div><div class='del'>-		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes_refclk {</div><div class='del'>-	status = "okay";</div><div class='del'>-	clock-frequency = &lt;100000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;dss {</div><div class='del'>-	status = "okay";</div><div class='del'>-	assigned-clocks = &lt;&amp;k3_clks 218 2&gt;,</div><div class='del'>-			  &lt;&amp;k3_clks 218 5&gt;,</div><div class='del'>-			  &lt;&amp;k3_clks 218 14&gt;,</div><div class='del'>-			  &lt;&amp;k3_clks 218 18&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;k3_clks 218 3&gt;,</div><div class='del'>-				 &lt;&amp;k3_clks 218 7&gt;,</div><div class='del'>-				 &lt;&amp;k3_clks 218 16&gt;,</div><div class='del'>-				 &lt;&amp;k3_clks 218 22&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	serdes0_pcie1_link: phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		cdns,num-lanes = &lt;2&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='del'>-		resets = &lt;&amp;serdes_wiz0 1&gt;, &lt;&amp;serdes_wiz0 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serdes0_usb_link: phy@3 {</div><div class='del'>-		reg = &lt;3&gt;;</div><div class='del'>-		cdns,num-lanes = &lt;1&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='del'>-		resets = &lt;&amp;serdes_wiz0 4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes_wiz0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_serdes_mux {</div><div class='del'>-	idle-states = &lt;0&gt;; /* USB0 to SERDES lane 3 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbss0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	ti,vbus-divider;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb0 {</div><div class='del'>-	dr_mode = "otg";</div><div class='del'>-	maximum-speed = "super-speed";</div><div class='del'>-	phys = &lt;&amp;serdes0_usb_link&gt;;</div><div class='del'>-	phy-names = "cdns3,usb3-phy";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes_wiz4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	serdes4_dp_link: phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		cdns,num-lanes = &lt;4&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		cdns,phy-type = &lt;PHY_TYPE_DP&gt;;</div><div class='del'>-		resets = &lt;&amp;serdes_wiz4 1&gt;, &lt;&amp;serdes_wiz4 2&gt;,</div><div class='del'>-			 &lt;&amp;serdes_wiz4 3&gt;, &lt;&amp;serdes_wiz4 4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mhdp {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;dp0_pins_default&gt;;</div><div class='del'>-	phys = &lt;&amp;serdes4_dp_link&gt;;</div><div class='del'>-	phy-names = "dpphy";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;dss_ports {</div><div class='del'>-	/* DP */</div><div class='del'>-	port {</div><div class='del'>-		dpi0_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;dp0_in&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_i2c4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_i2c4_pins_default&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	exp4: gpio@20 {</div><div class='del'>-		compatible = "ti,tca6408";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;dp0_ports {</div><div class='del'>-	port@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		dp0_in: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;dpi0_out&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	port@4 {</div><div class='del'>-		reg = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		dp0_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;dp0_connector_in&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_mcan0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_mcan0_pins_default&gt;;</div><div class='del'>-	phys = &lt;&amp;transceiver0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcu_mcan1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;mcu_mcan1_pins_default&gt;;</div><div class='del'>-	phys = &lt;&amp;transceiver1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_mcan16 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_mcan16_pins_default&gt;;</div><div class='del'>-	phys = &lt;&amp;transceiver2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_mcan4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_mcan4_pins_default&gt;;</div><div class='del'>-	phys = &lt;&amp;transceiver3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie1_rc {</div><div class='del'>-	status = "okay";</div><div class='del'>-	num-lanes = &lt;2&gt;;</div><div class='del'>-	reset-gpios = &lt;&amp;exp1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	phys = &lt;&amp;serdes0_pcie1_link&gt;;</div><div class='del'>-	phy-names = "pcie-phy";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	serdes1_pcie0_link: phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		cdns,num-lanes = &lt;4&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='del'>-		resets = &lt;&amp;serdes_wiz1 1&gt;, &lt;&amp;serdes_wiz1 2&gt;,</div><div class='del'>-			 &lt;&amp;serdes_wiz1 3&gt;, &lt;&amp;serdes_wiz1 4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;serdes_wiz1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie0_rc {</div><div class='del'>-	status = "okay";</div><div class='del'>-	reset-gpios = &lt;&amp;exp1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	phys = &lt;&amp;serdes1_pcie0_link&gt;;</div><div class='del'>-	phy-names = "pcie-phy";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;k3_clks {</div><div class='del'>-	/* Confiure AUDIO_EXT_REFCLK1 pin as output */</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;audio_ext_refclk1_pins_default&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;main_i2c3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_i2c3_pins_default&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-</div><div class='del'>-	exp3: gpio@20 {</div><div class='del'>-		compatible = "ti,tca6408";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcm3168a_1: audio-codec@44 {</div><div class='del'>-		compatible = "ti,pcm3168a";</div><div class='del'>-		reg = &lt;0x44&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;exp3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='del'>-		clock-names = "scki";</div><div class='del'>-		VDD1-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		VDD2-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='del'>-		VCCAD1-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='del'>-		VCCAD2-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='del'>-		VCCDA1-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='del'>-		VCCDA2-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mcasp0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;main_mcasp0_pins_default&gt;;</div><div class='del'>-	op-mode = &lt;0&gt;;          /* MCASP_IIS_MODE */</div><div class='del'>-	tdm-slots = &lt;2&gt;;</div><div class='del'>-	auxclk-fs-ratio = &lt;256&gt;;</div><div class='del'>-	serial-dir = &lt;	/* 0: INACTIVE, 1: TX, 2: RX */</div><div class='del'>-		0 0 0 1</div><div class='del'>-		2 0 0 0</div><div class='del'>-		0 0 0 0</div><div class='del'>-		0 0 0 0</div><div class='del'>-	&gt;;</div><div class='del'>-};</div><div class='add'>+#include "k3-j784s4-ti-ipc-firmware.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi<br/>new file mode 100644<br/>index 000000000000..1dceff119a47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for J784S4 and J742S2 SoC Family</div><div class='add'>+ *</div><div class='add'>+ * TRM (j784s4) (SPRUJ43 JULY 2022): https://www.ti.com/lit/zip/spruj52</div><div class='add'>+ * TRM (j742s2): https://www.ti.com/lit/pdf/spruje3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-pinctrl.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	L2_0: l2-cache0 {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+		cache-size = &lt;0x200000&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;1024&gt;;</div><div class='add'>+		next-level-cache = &lt;&amp;msmc_l3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	L2_1: l2-cache1 {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-level = &lt;2&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+		cache-size = &lt;0x200000&gt;;</div><div class='add'>+		cache-line-size = &lt;64&gt;;</div><div class='add'>+		cache-sets = &lt;1024&gt;;</div><div class='add'>+		next-level-cache = &lt;&amp;msmc_l3&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	msmc_l3: l3-cache0 {</div><div class='add'>+		compatible = "cache";</div><div class='add'>+		cache-level = &lt;3&gt;;</div><div class='add'>+		cache-unified;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		optee {</div><div class='add'>+			compatible = "linaro,optee-tz";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		psci: psci {</div><div class='add'>+			compatible = "arm,psci-1.0";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	a72_timer0: timer-cl0-cpu0 {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;, /* cntpsirq */</div><div class='add'>+			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;, /* cntpnsirq */</div><div class='add'>+			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;, /* cntvirq */</div><div class='add'>+			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;; /* cnthpirq */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu: pmu {</div><div class='add'>+		compatible = "arm,cortex-a72-pmu";</div><div class='add'>+		/* Recommendation from GIC500 TRM Table A.3 */</div><div class='add'>+		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cbass_main: bus@100000 {</div><div class='add'>+		bootph-all;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x00100000 0x00 0x00100000 0x00 0x00020000&gt;, /* ctrl mmr */</div><div class='add'>+			 &lt;0x00 0x00600000 0x00 0x00600000 0x00 0x00031100&gt;, /* GPIO */</div><div class='add'>+			 &lt;0x00 0x00700000 0x00 0x00700000 0x00 0x00001000&gt;, /* ESM */</div><div class='add'>+			 &lt;0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000&gt;, /* Most peripherals */</div><div class='add'>+			 &lt;0x00 0x04210000 0x00 0x04210000 0x00 0x00010000&gt;, /* VPU0 */</div><div class='add'>+			 &lt;0x00 0x04220000 0x00 0x04220000 0x00 0x00010000&gt;, /* VPU1 */</div><div class='add'>+			 &lt;0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000&gt;, /* PCIe0 Core*/</div><div class='add'>+			 &lt;0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000&gt;, /* PCIe1 Core*/</div><div class='add'>+			 &lt;0x00 0x0e000000 0x00 0x0e000000 0x00 0x00800000&gt;, /* PCIe2 Core*/</div><div class='add'>+			 &lt;0x00 0x0e800000 0x00 0x0e800000 0x00 0x00800000&gt;, /* PCIe3 Core*/</div><div class='add'>+			 &lt;0x00 0x10000000 0x00 0x10000000 0x00 0x08000000&gt;, /* PCIe0 DAT0 */</div><div class='add'>+			 &lt;0x00 0x18000000 0x00 0x18000000 0x00 0x08000000&gt;, /* PCIe1 DAT0 */</div><div class='add'>+			 &lt;0x00 0x64800000 0x00 0x64800000 0x00 0x0070c000&gt;, /* C71_1 */</div><div class='add'>+			 &lt;0x00 0x65800000 0x00 0x65800000 0x00 0x0070c000&gt;, /* C71_2 */</div><div class='add'>+			 &lt;0x00 0x66800000 0x00 0x66800000 0x00 0x0070c000&gt;, /* C71_3 */</div><div class='add'>+			 &lt;0x00 0x67800000 0x00 0x67800000 0x00 0x0070c000&gt;, /* C71_4 */</div><div class='add'>+			 &lt;0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000&gt;, /* A72 PERIPHBASE */</div><div class='add'>+			 &lt;0x00 0x70000000 0x00 0x70000000 0x00 0x00400000&gt;, /* MSMC RAM */</div><div class='add'>+			 &lt;0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000&gt;, /* MAIN NAVSS */</div><div class='add'>+			 &lt;0x40 0x00000000 0x40 0x00000000 0x01 0x00000000&gt;, /* PCIe0 DAT1 */</div><div class='add'>+			 &lt;0x41 0x00000000 0x41 0x00000000 0x01 0x00000000&gt;, /* PCIe1 DAT1 */</div><div class='add'>+			 &lt;0x42 0x00000000 0x42 0x00000000 0x01 0x00000000&gt;, /* PCIe2 DAT1 */</div><div class='add'>+			 &lt;0x43 0x00000000 0x43 0x00000000 0x01 0x00000000&gt;, /* PCIe3 DAT1 */</div><div class='add'>+			 &lt;0x44 0x00000000 0x44 0x00000000 0x00 0x08000000&gt;, /* PCIe2 DAT0 */</div><div class='add'>+			 &lt;0x44 0x10000000 0x44 0x10000000 0x00 0x08000000&gt;, /* PCIe3 DAT0 */</div><div class='add'>+			 &lt;0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000&gt;, /* GPU */</div><div class='add'>+</div><div class='add'>+			 /* MCUSS_WKUP Range */</div><div class='add'>+			 &lt;0x00 0x28380000 0x00 0x28380000 0x00 0x03880000&gt;,</div><div class='add'>+			 &lt;0x00 0x40200000 0x00 0x40200000 0x00 0x00998400&gt;,</div><div class='add'>+			 &lt;0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000&gt;,</div><div class='add'>+			 &lt;0x00 0x41000000 0x00 0x41000000 0x00 0x00020000&gt;,</div><div class='add'>+			 &lt;0x00 0x41400000 0x00 0x41400000 0x00 0x00020000&gt;,</div><div class='add'>+			 &lt;0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000&gt;,</div><div class='add'>+			 &lt;0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400&gt;,</div><div class='add'>+			 &lt;0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000&gt;,</div><div class='add'>+			 &lt;0x00 0x46000000 0x00 0x46000000 0x00 0x00200000&gt;,</div><div class='add'>+			 &lt;0x00 0x47000000 0x00 0x47000000 0x00 0x00068400&gt;,</div><div class='add'>+			 &lt;0x00 0x50000000 0x00 0x50000000 0x00 0x10000000&gt;,</div><div class='add'>+			 &lt;0x04 0x00000000 0x04 0x00000000 0x04 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+		cbass_mcu_wakeup: bus@28380000 {</div><div class='add'>+			bootph-all;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges = &lt;0x00 0x28380000 0x00 0x28380000 0x00 0x03880000&gt;, /* MCU NAVSS*/</div><div class='add'>+				 &lt;0x00 0x40200000 0x00 0x40200000 0x00 0x00998400&gt;, /* First peripheral window */</div><div class='add'>+				 &lt;0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000&gt;, /* CTRL_MMR0 */</div><div class='add'>+				 &lt;0x00 0x41000000 0x00 0x41000000 0x00 0x00020000&gt;, /* MCU R5F Core0 */</div><div class='add'>+				 &lt;0x00 0x41400000 0x00 0x41400000 0x00 0x00020000&gt;, /* MCU R5F Core1 */</div><div class='add'>+				 &lt;0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000&gt;, /* MCU SRAM */</div><div class='add'>+				 &lt;0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400&gt;, /* WKUP peripheral window */</div><div class='add'>+				 &lt;0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000&gt;, /* MMRs, remaining NAVSS */</div><div class='add'>+				 &lt;0x00 0x46000000 0x00 0x46000000 0x00 0x00200000&gt;, /* CPSW */</div><div class='add'>+				 &lt;0x00 0x47000000 0x00 0x47000000 0x00 0x00068400&gt;, /* OSPI register space */</div><div class='add'>+				 &lt;0x00 0x50000000 0x00 0x50000000 0x00 0x10000000&gt;, /* FSS data region 1 */</div><div class='add'>+				 &lt;0x04 0x00000000 0x04 0x00000000 0x04 0x00000000&gt;; /* FSS data region 0/3 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal_zones: thermal-zones {</div><div class='add'>+		#include "k3-j784s4-j742s2-thermal-common.dtsi"</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Now include peripherals from each bus segment */</div><div class='add'>+#include "k3-j784s4-j742s2-main-common.dtsi"</div><div class='add'>+#include "k3-j784s4-j742s2-mcu-wakeup-common.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi<br/>new file mode 100644<br/>index 000000000000..419c1a70e028<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1281 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458</div><div class='add'>+ * EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/phy/phy-cadence.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial2:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;wkup_uart0;</div><div class='add'>+		serial1 = &amp;mcu_uart0;</div><div class='add'>+		serial2 = &amp;main_uart8;</div><div class='add'>+		mmc0 = &amp;main_sdhci0;</div><div class='add'>+		mmc1 = &amp;main_sdhci1;</div><div class='add'>+		i2c0 = &amp;wkup_i2c0;</div><div class='add'>+		i2c3 = &amp;main_i2c0;</div><div class='add'>+		ethernet0 = &amp;mcu_cpsw_port1;</div><div class='add'>+		ethernet1 = &amp;main_cpsw1_port1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved_memory: reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		secure_ddr: optee@9e800000 {</div><div class='add'>+			reg = &lt;0x00 0x9e800000 0x00 0x01800000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_dma_memory_region: memory@a0000000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0000000 0x00 0x100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcu_r5fss0_core0_memory_region: memory@a0100000 {</div><div class='add'>+			compatible = "shared-dma-pool";</div><div class='add'>+			reg = &lt;0x00 0xa0100000 0x00 0xf00000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	evm_12v0: regulator-evm12v0 {</div><div class='add'>+		/* main supply */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "evm_12v0";</div><div class='add'>+		regulator-min-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;12000000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_3v3: regulator-vsys3v3 {</div><div class='add'>+		/* Output of LM5140 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_3v3";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;evm_12v0&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_5v0: regulator-vsys5v0 {</div><div class='add'>+		/* Output of LM5140 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_5v0";</div><div class='add'>+		regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;evm_12v0&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_mmc1: regulator-sd {</div><div class='add'>+		/* Output of TPS22918 */</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vdd_mmc1";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		enable-active-high;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp2 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv: regulator-TLV71033 {</div><div class='add'>+		/* Output of TLV71033 */</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "tlv71033";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;vdd_sd_dv_pins_default&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		vin-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		gpios = &lt;&amp;main_gpio0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;1800000 0x0&gt;,</div><div class='add'>+			 &lt;3300000 0x1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0_pwr_3v3: regulator-dp0-prw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dp0-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp4 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0: connector-dp0 {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP0";</div><div class='add'>+		type = "full-size";</div><div class='add'>+		dp-pwr-supply = &lt;&amp;dp0_pwr_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp0_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp0_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver0: can-phy0 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mcu_mcan0_gpio_pins_default&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;wkup_gpio0 69 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver1: can-phy1 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;mcu_mcan1_gpio_pins_default&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;wkup_gpio0 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver2: can-phy2 {</div><div class='add'>+		/* standby pin has been grounded by default */</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	transceiver3: can-phy3 {</div><div class='add'>+		compatible = "ti,tcan1042";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		max-bitrate = &lt;5000000&gt;;</div><div class='add'>+		standby-gpios = &lt;&amp;exp2 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		mux-states = &lt;&amp;mux1 1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mux1: mux-controller {</div><div class='add'>+		compatible = "gpio-mux";</div><div class='add'>+		#mux-state-cells = &lt;1&gt;;</div><div class='add'>+		mux-gpios = &lt;&amp;exp2 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		idle-state = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	codec_audio: sound {</div><div class='add'>+		compatible = "ti,j7200-cpb-audio";</div><div class='add'>+		model = "j784s4-cpb";</div><div class='add'>+</div><div class='add'>+		ti,cpb-mcasp = &lt;&amp;mcasp0&gt;;</div><div class='add'>+		ti,cpb-codec = &lt;&amp;pcm3168a_1&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;k3_clks 265 0&gt;, &lt;&amp;k3_clks 265 1&gt;,</div><div class='add'>+			 &lt;&amp;k3_clks 157 34&gt;, &lt;&amp;k3_clks 157 63&gt;;</div><div class='add'>+		clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000",</div><div class='add'>+			      "cpb-codec-scki", "cpb-codec-scki-48000";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_io_1v8: regulator-vsys-io-1v8 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_io_1v8";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vsys_io_1v2: regulator-vsys-io-1v2 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "vsys_io_1v2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	edp1_refclk: clock-edp1-refclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;19200000&gt;;</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp1_pwr_3v3: regulator-dp1-prw {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "dp1-pwr";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;exp4 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp1: connector-dp1 {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "DP1";</div><div class='add'>+		type = "full-size";</div><div class='add'>+		dp-pwr-supply = &lt;&amp;dp1_pwr_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dp1_connector_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dp1_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_pmx0 {</div><div class='add'>+	main_cpsw2g_default_pins: main-cpsw2g-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */</div><div class='add'>+			J784S4_IOPAD(0x0a0, PIN_INPUT, 6) /* (AD34) MCASP0_AXR12.RGMII1_RD1 */</div><div class='add'>+			J784S4_IOPAD(0x0a4, PIN_INPUT, 6) /* (AJ36) MCASP0_AXR13.RGMII1_RD2 */</div><div class='add'>+			J784S4_IOPAD(0x0a8, PIN_INPUT, 6) /* (AF34) MCASP0_AXR14.RGMII1_RD3 */</div><div class='add'>+			J784S4_IOPAD(0x0b0, PIN_INPUT, 6) /* (AL33) MCASP1_AXR3.RGMII1_RXC */</div><div class='add'>+			J784S4_IOPAD(0x0ac, PIN_INPUT, 6) /* (AE34) MCASP0_AXR15.RGMII1_RX_CTL */</div><div class='add'>+			J784S4_IOPAD(0x08c, PIN_INPUT, 6) /* (AE35) MCASP0_AXR7.RGMII1_TD0 */</div><div class='add'>+			J784S4_IOPAD(0x090, PIN_INPUT, 6) /* (AC35) MCASP0_AXR8.RGMII1_TD1 */</div><div class='add'>+			J784S4_IOPAD(0x094, PIN_INPUT, 6) /* (AG35) MCASP0_AXR9.RGMII1_TD2 */</div><div class='add'>+			J784S4_IOPAD(0x098, PIN_INPUT, 6) /* (AH36) MCASP0_AXR10.RGMII1_TD3 */</div><div class='add'>+			J784S4_IOPAD(0x0b4, PIN_INPUT, 6) /* (AL34) MCASP1_AXR4.RGMII1_TXC */</div><div class='add'>+			J784S4_IOPAD(0x09c, PIN_INPUT, 6) /* (AF35) MCASP0_AXR11.RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_cpsw2g_mdio_default_pins: main-cpsw2g-mdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0c0, PIN_INPUT, 6) /* (AD38) MCASP1_AXR0.MDIO0_MDC */</div><div class='add'>+			J784S4_IOPAD(0x0bc, PIN_INPUT, 6) /* (AD33) MCASP1_AFSX.MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart8_pins_default: main-uart8-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */</div><div class='add'>+			J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */</div><div class='add'>+			J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */</div><div class='add'>+			J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c0_pins_default: main-i2c0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */</div><div class='add'>+			J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c5_pins_default: main-i2c5-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */</div><div class='add'>+			J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mmc1_pins_default: main-mmc1-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */</div><div class='add'>+			J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */</div><div class='add'>+			J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */</div><div class='add'>+			J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */</div><div class='add'>+			J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */</div><div class='add'>+			J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */</div><div class='add'>+			J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */</div><div class='add'>+			J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dp0_pins_default: dp0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0cc, PIN_INPUT, 12) /* (AM37) SPI0_CS0.DP0_HPD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c4_pins_default: main-i2c4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */</div><div class='add'>+			J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan4_pins_default: main-mcan4-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x088, PIN_INPUT, 0) /* (AF36) MCAN4_RX */</div><div class='add'>+			J784S4_IOPAD(0x084, PIN_OUTPUT, 0) /* (AG38) MCAN4_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan16_pins_default: main-mcan16-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x028, PIN_INPUT, 0) /* (AE33) MCAN16_RX */</div><div class='add'>+			J784S4_IOPAD(0x024, PIN_OUTPUT, 0) /* (AH34) MCAN16_TX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_usbss0_pins_default: main-usbss0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c3_pins_default: main-i2c3-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x064, PIN_INPUT, 13) /* (AF38) MCAN0_TX.I2C3_SCL */</div><div class='add'>+			J784S4_IOPAD(0x060, PIN_INPUT, 13) /* (AE36) MCASP2_AXR1.I2C3_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcasp0_pins_default: main-mcasp0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x038, PIN_OUTPUT_PULLDOWN, 1) /* (AK35) MCASP0_ACLKX */</div><div class='add'>+			J784S4_IOPAD(0x03c, PIN_OUTPUT_PULLDOWN, 1) /* (AK38) MCASP0_AFSX */</div><div class='add'>+			J784S4_IOPAD(0x07c, PIN_OUTPUT_PULLDOWN, 1) /* (AJ38) MCASP0_AXR3 */</div><div class='add'>+			J784S4_IOPAD(0x080, PIN_INPUT_PULLDOWN, 1) /* (AK34) MCASP0_AXR4 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx2 {</div><div class='add'>+	wkup_uart0_pins_default: wkup-uart0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wkup_i2c0_pins_default: wkup-i2c0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_uart0_pins_default: mcu-uart0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (K37) WKUP_GPIO0_15.MCU_UART0_RTSn */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_cpsw_pins_default: mcu-cpsw-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mdio_pins_default: mcu-mdio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_adc0_pins_default: mcu-adc0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_adc1_pins_default: mcu-adc1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mcan0_pins_default: mcu-mcan0-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mcan1_pins_default: mcu-mcan1-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (J38) MCU_SPI0_D1.WKUP_GPIO0_69 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic_irq_pins_default: pmic-irq-default-pins {</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			/* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx0 {</div><div class='add'>+	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_pmx1 {</div><div class='add'>+	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {</div><div class='add'>+		bootph-all;</div><div class='add'>+		pinctrl-single,pins = &lt;</div><div class='add'>+			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */</div><div class='add'>+			J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */</div><div class='add'>+		&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_uart0 {</div><div class='add'>+	/* Firmware usage */</div><div class='add'>+	status = "reserved";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_uart0_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wkup_i2c0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;wkup_i2c0_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		/* CAV24C256WE-GT3 */</div><div class='add'>+		compatible = "atmel,24c256";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tps659413: pmic@48 {</div><div class='add'>+		compatible = "ti,tps6594-q1";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		system-power-controller;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;wkup_gpio0&gt;;</div><div class='add'>+		interrupts = &lt;39 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		ti,primary-pmic;</div><div class='add'>+		buck12-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck3-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck4-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		buck5-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo1-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo2-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo3-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		ldo4-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			bucka12: buck12 {</div><div class='add'>+				regulator-name = "vdd_ddr_1v1";</div><div class='add'>+				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka3: buck3 {</div><div class='add'>+				regulator-name = "vdd_ram_0v85";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka4: buck4 {</div><div class='add'>+				regulator-name = "vdd_io_1v8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bucka5: buck5 {</div><div class='add'>+				regulator-name = "vdd_mcu_0v85";</div><div class='add'>+				regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa1: ldo1 {</div><div class='add'>+				regulator-name = "vdd_mcuio_1v8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa2: ldo2 {</div><div class='add'>+				regulator-name = "vdd_mcuio_3v3";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa3: ldo3 {</div><div class='add'>+				regulator-name = "vds_dll_0v8";</div><div class='add'>+				regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldoa4: ldo4 {</div><div class='add'>+				regulator-name = "vda_mcu_1v8";</div><div class='add'>+				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				bootph-all;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tps62873a: regulator@40 {</div><div class='add'>+		compatible = "ti,tps62873";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+		regulator-name = "VDD_CPU_AVS";</div><div class='add'>+		regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1330000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tps62873b: regulator@43 {</div><div class='add'>+		compatible = "ti,tps62873";</div><div class='add'>+		reg = &lt;0x43&gt;;</div><div class='add'>+		regulator-name = "VDD_CORE_0V8";</div><div class='add'>+		regulator-min-microvolt = &lt;760000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;840000&gt;;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		regulator-always-on;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_uart0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_uart0_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_uart8 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_uart8_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ufs_wrapper {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;fss {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_fss0_ospi0_pins_default&gt;, &lt;&amp;mcu_fss0_ospi0_1_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;8&gt;;</div><div class='add'>+		spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "ospi.tiboot3";</div><div class='add'>+				reg = &lt;0x0 0x80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@80000 {</div><div class='add'>+				label = "ospi.tispl";</div><div class='add'>+				reg = &lt;0x80000 0x200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@280000 {</div><div class='add'>+				label = "ospi.u-boot";</div><div class='add'>+				reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@680000 {</div><div class='add'>+				label = "ospi.env";</div><div class='add'>+				reg = &lt;0x680000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@6c0000 {</div><div class='add'>+				label = "ospi.env.backup";</div><div class='add'>+				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "ospi.rootfs";</div><div class='add'>+				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@3fc0000 {</div><div class='add'>+				bootph-all;</div><div class='add'>+				label = "ospi.phypattern";</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_fss0_ospi1_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	flash@0 {</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		reg = &lt;0x0&gt;;</div><div class='add'>+		spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+		spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+		cdns,tshsl-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tsd2d-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tchsh-ns = &lt;60&gt;;</div><div class='add'>+		cdns,tslch-ns = &lt;60&gt;;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "qspi.tiboot3";</div><div class='add'>+				reg = &lt;0x0 0x80000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@80000 {</div><div class='add'>+				label = "qspi.tispl";</div><div class='add'>+				reg = &lt;0x80000 0x200000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@280000 {</div><div class='add'>+				label = "qspi.u-boot";</div><div class='add'>+				reg = &lt;0x280000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@680000 {</div><div class='add'>+				label = "qspi.env";</div><div class='add'>+				reg = &lt;0x680000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@6c0000 {</div><div class='add'>+				label = "qspi.env.backup";</div><div class='add'>+				reg = &lt;0x6c0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@800000 {</div><div class='add'>+				label = "qspi.rootfs";</div><div class='add'>+				reg = &lt;0x800000 0x37c0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@3fc0000 {</div><div class='add'>+				bootph-all;</div><div class='add'>+				label = "qspi.phypattern";</div><div class='add'>+				reg = &lt;0x3fc0000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c0_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	exp1: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6416";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "PCIE1_2L_MODE_SEL", "PCIE1_4L_PERSTZ", "PCIE1_2L_RC_RSTZ",</div><div class='add'>+				  "PCIE1_2L_EP_RST_EN", "PCIE0_4L_MODE_SEL", "PCIE0_4L_PERSTZ",</div><div class='add'>+				  "PCIE0_4L_RC_RSTZ", "PCIE0_4L_EP_RST_EN", "PCIE1_4L_PRSNT#",</div><div class='add'>+				  "PCIE0_4L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3",</div><div class='add'>+				  "AUDIO_MUX_SEL", "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTZ";</div><div class='add'>+</div><div class='add'>+		p12-hog {</div><div class='add'>+			/* P12 - AUDIO_MUX_SEL */</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-low;</div><div class='add'>+			line-name = "AUDIO_MUX_SEL";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	exp2: gpio@22 {</div><div class='add'>+		compatible = "ti,tca6424";</div><div class='add'>+		reg = &lt;0x22&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "R_GPIO_RGMII1_RST", "ENET2_I2CMUX_SEL", "GPIO_USD_PWR_EN",</div><div class='add'>+				  "USBC_PWR_EN", "USBC_MODE_SEL1", "USBC_MODE_SEL0",</div><div class='add'>+				  "GPIO_LIN_EN", "R_CAN_STB", "CTRL_PM_I2C_OE#",</div><div class='add'>+				  "ENET2_EXP_PWRDN", "ENET2_EXP_SPARE2", "CDCI2_RSTZ",</div><div class='add'>+				  "USB2.0_MUX_SEL", "CANUART_MUX_SEL0", "CANUART_MUX2_SEL1",</div><div class='add'>+				  "CANUART_MUX1_SEL1", "ENET1_EXP_PWRDN", "ENET1_EXP_RESETZ",</div><div class='add'>+				  "ENET1_I2CMUX_SEL", "ENET1_EXP_SPARE2", "ENET2_EXP_RESETZ",</div><div class='add'>+				  "USER_INPUT1", "USER_LED1", "USER_LED2";</div><div class='add'>+</div><div class='add'>+		p13-hog {</div><div class='add'>+			/* P13 - CANUART_MUX_SEL0 */</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "CANUART_MUX_SEL0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		p15-hog {</div><div class='add'>+			/* P15 - CANUART_MUX1_SEL1 */</div><div class='add'>+			gpio-hog;</div><div class='add'>+			gpios = &lt;15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			output-high;</div><div class='add'>+			line-name = "CANUART_MUX1_SEL1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c5 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c5_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	exp5: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0",</div><div class='add'>+				  "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO3",</div><div class='add'>+				  "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2",</div><div class='add'>+				  "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_sdhci0 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	/* eMMC */</div><div class='add'>+	status = "okay";</div><div class='add'>+	non-removable;</div><div class='add'>+	ti,driver-strength-ohm = &lt;50&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_sdhci1 {</div><div class='add'>+	bootph-all;</div><div class='add'>+	/* SD card */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mmc1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	disable-wp;</div><div class='add'>+	vmmc-supply = &lt;&amp;vdd_mmc1&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;vdd_sd_dv&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_gpio0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_cpsw {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_cpsw_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;davinci_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_mdio_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+	mcu_phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_cpsw_port1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;mcu_phy0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_cpsw2g_default_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw1_mdio {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_cpsw2g_mdio_default_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	main_cpsw1_phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_00_NS&gt;;</div><div class='add'>+		ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+		ti,min-output-impedance;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_cpsw1_port1 {</div><div class='add'>+	phy-mode = "rgmii-rxid";</div><div class='add'>+	phy-handle = &lt;&amp;main_cpsw1_phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tscadc0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_adc0_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	adc {</div><div class='add'>+		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;tscadc1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_adc1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	adc {</div><div class='add'>+		ti,adc-channels = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_refclk {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clock-frequency = &lt;100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dss {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clocks = &lt;&amp;k3_clks 218 2&gt;,</div><div class='add'>+			  &lt;&amp;k3_clks 218 5&gt;,</div><div class='add'>+			  &lt;&amp;k3_clks 218 14&gt;,</div><div class='add'>+			  &lt;&amp;k3_clks 218 18&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;k3_clks 218 3&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 218 7&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 218 16&gt;,</div><div class='add'>+				 &lt;&amp;k3_clks 218 22&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	serdes0_pcie1_link: phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;2&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 1&gt;, &lt;&amp;serdes_wiz0 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes0_usb_link: phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;1&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_USB3&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz0 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_wiz0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_serdes_mux {</div><div class='add'>+	idle-states = &lt;0&gt;; /* USB0 to SERDES lane 3 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usbss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_usbss0_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	ti,vbus-divider;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "otg";</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	phys = &lt;&amp;serdes0_usb_link&gt;;</div><div class='add'>+	phy-names = "cdns3,usb3-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_wiz4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	serdes4_dp_link: phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;4&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_DP&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz4 1&gt;, &lt;&amp;serdes_wiz4 2&gt;,</div><div class='add'>+			 &lt;&amp;serdes_wiz4 3&gt;, &lt;&amp;serdes_wiz4 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mhdp {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;dp0_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes4_dp_link&gt;;</div><div class='add'>+	phy-names = "dpphy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dss_ports {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* DP */</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dpi0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* DSI */</div><div class='add'>+	port@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		dpi2_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c4_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	exp4: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bridge_dsi_edp: bridge-dsi-edp@2c {</div><div class='add'>+		compatible = "ti,sn65dsi86";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+		clock-names = "refclk";</div><div class='add'>+		clocks = &lt;&amp;edp1_refclk&gt;;</div><div class='add'>+		enable-gpios = &lt;&amp;exp4 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		vpll-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vccio-supply = &lt;&amp;vsys_io_1v8&gt;;</div><div class='add'>+		vcca-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+		vcc-supply = &lt;&amp;vsys_io_1v2&gt;;</div><div class='add'>+</div><div class='add'>+		dsi_edp_bridge_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				dp1_in: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				dp1_out: endpoint {</div><div class='add'>+					remote-endpoint = &lt;&amp;dp1_connector_in&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0_ports {</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp1_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		dsi0_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dpi2_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dphy_tx0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dsi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dp0_ports {</div><div class='add'>+	port@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		dp0_in: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dpi0_out&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	port@4 {</div><div class='add'>+		reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+		dp0_out: endpoint {</div><div class='add'>+			remote-endpoint = &lt;&amp;dp0_connector_in&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_mcan0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_mcan0_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_mcan1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;mcu_mcan1_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan16 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcan16_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver2&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_mcan4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcan4_pins_default&gt;;</div><div class='add'>+	phys = &lt;&amp;transceiver3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1_rc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	clocks = &lt;&amp;k3_clks 333 0&gt;, &lt;&amp;serdes0 CDNS_TORRENT_REFCLK_DRIVER&gt;;</div><div class='add'>+	clock-names = "fck", "pcie_refclk";</div><div class='add'>+	num-lanes = &lt;2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;exp1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes0_pcie1_link&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+	ti,syscon-acspcie-proxy-ctrl = &lt;&amp;acspcie0_proxy_ctrl 0x1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	serdes1_pcie0_link: phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		cdns,num-lanes = &lt;4&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		cdns,phy-type = &lt;PHY_TYPE_PCIE&gt;;</div><div class='add'>+		resets = &lt;&amp;serdes_wiz1 1&gt;, &lt;&amp;serdes_wiz1 2&gt;,</div><div class='add'>+			 &lt;&amp;serdes_wiz1 3&gt;, &lt;&amp;serdes_wiz1 4&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serdes_wiz1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0_rc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	reset-gpios = &lt;&amp;exp1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	phys = &lt;&amp;serdes1_pcie0_link&gt;;</div><div class='add'>+	phy-names = "pcie-phy";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;k3_clks {</div><div class='add'>+	/* Confiure AUDIO_EXT_REFCLK1 pin as output */</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;audio_ext_refclk1_pins_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_i2c3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_i2c3_pins_default&gt;;</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	exp3: gpio@20 {</div><div class='add'>+		compatible = "ti,tca6408";</div><div class='add'>+		reg = &lt;0x20&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcm3168a_1: audio-codec@44 {</div><div class='add'>+		compatible = "ti,pcm3168a";</div><div class='add'>+		reg = &lt;0x44&gt;;</div><div class='add'>+		#sound-dai-cells = &lt;1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;exp3 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		clocks = &lt;&amp;audio_refclk1&gt;;</div><div class='add'>+		clock-names = "scki";</div><div class='add'>+		VDD1-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		VDD2-supply = &lt;&amp;vsys_3v3&gt;;</div><div class='add'>+		VCCAD1-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		VCCAD2-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		VCCDA1-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+		VCCDA2-supply = &lt;&amp;vsys_5v0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcasp0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;main_mcasp0_pins_default&gt;;</div><div class='add'>+	op-mode = &lt;0&gt;;          /* MCASP_IIS_MODE */</div><div class='add'>+	tdm-slots = &lt;2&gt;;</div><div class='add'>+	auxclk-fs-ratio = &lt;256&gt;;</div><div class='add'>+	serial-dir = &lt;	/* 0: INACTIVE, 1: TX, 2: RX */</div><div class='add'>+		0 0 0 1</div><div class='add'>+		2 0 0 0</div><div class='add'>+		0 0 0 0</div><div class='add'>+		0 0 0 0</div><div class='add'>+	&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso<br/>new file mode 100644<br/>index 000000000000..ba15d72d86d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-usb0-type-a.dtso</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * DT Overlay for enabling USB0 instance of USB on J784S4 and J742S2 EVMs for</div><div class='add'>+ * Host Mode of operation with the Type-A Connector.</div><div class='add'>+ *</div><div class='add'>+ * J784S4 EVM Product Link: https://www.ti.com/tool/J784S4XEVM</div><div class='add'>+ * J742S2 EVM Product Link: https://www.ti.com/tool/J742S2XH01EVM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+&amp;exp2 {</div><div class='add'>+	p12-hog {</div><div class='add'>+		/* P12 - USB2.0_MUX_SEL */</div><div class='add'>+		gpio-hog;</div><div class='add'>+		gpios = &lt;12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		output-high;</div><div class='add'>+		line-name = "USB2.0_MUX_SEL";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi<br/>new file mode 100644<br/>index 000000000000..9cc0901d58fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,2751 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for J784S4 and J742S2 SoC Family Main Domain peripherals</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy-ti.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k3-serdes.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	serdes_refclk: clock-serdes {</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		/* To be enabled when serdes_wiz* is functional */</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cbass_main {</div><div class='add'>+	/*</div><div class='add'>+	 * MSMC is configured by bootloaders and a runtime fixup is done in the</div><div class='add'>+	 * DT for this node</div><div class='add'>+	 */</div><div class='add'>+	msmc_ram: sram@70000000 {</div><div class='add'>+		compatible = "mmio-sram";</div><div class='add'>+		reg = &lt;0x00 0x70000000 0x00 0x800000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x00 0x70000000 0x800000&gt;;</div><div class='add'>+</div><div class='add'>+		atf-sram@0 {</div><div class='add'>+			reg = &lt;0x00 0x20000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tifs-sram@1f0000 {</div><div class='add'>+			reg = &lt;0x1f0000 0x10000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3cache-sram@200000 {</div><div class='add'>+			reg = &lt;0x200000 0x200000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	scm_conf: bus@100000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		reg = &lt;0x00 0x00100000 0x00 0x1c000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x00 0x00100000 0x1c000&gt;;</div><div class='add'>+</div><div class='add'>+		cpsw1_phy_gmii_sel: phy@4034 {</div><div class='add'>+			compatible = "ti,am654-phy-gmii-sel";</div><div class='add'>+			reg = &lt;0x4034 0x4&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpsw0_phy_gmii_sel: phy@4044 {</div><div class='add'>+			compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";</div><div class='add'>+			reg = &lt;0x4044 0x20&gt;;</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			ti,qsgmii-main-ports = &lt;7&gt;, &lt;7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie0_ctrl: pcie0-ctrl@4070 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4070 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1_ctrl: pcie1-ctrl@4074 {</div><div class='add'>+			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x4074 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serdes_ln_ctrl: mux-controller@4080 {</div><div class='add'>+			compatible = "reg-mux";</div><div class='add'>+			reg = &lt;0x00004080 0x50&gt;;</div><div class='add'>+			#mux-control-cells = &lt;1&gt;;</div><div class='add'>+			mux-reg-masks = &lt;0x0 0x3&gt;, &lt;0x4 0x3&gt;, /* SERDES0 lane0/1 select */</div><div class='add'>+					&lt;0x8 0x3&gt;, &lt;0xc 0x3&gt;, /* SERDES0 lane2/3 select */</div><div class='add'>+					&lt;0x10 0x3&gt;, &lt;0x14 0x3&gt;, /* SERDES1 lane0/1 select */</div><div class='add'>+					&lt;0x18 0x3&gt;, &lt;0x1c 0x3&gt;, /* SERDES1 lane2/3 select */</div><div class='add'>+					&lt;0x20 0x3&gt;, &lt;0x24 0x3&gt;, /* SERDES2 lane0/1 select */</div><div class='add'>+					&lt;0x28 0x3&gt;, &lt;0x2c 0x3&gt;, /* SERDES2 lane2/3 select */</div><div class='add'>+					&lt;0x40 0x3&gt;, &lt;0x44 0x3&gt;, /* SERDES4 lane0/1 select */</div><div class='add'>+					&lt;0x48 0x3&gt;, &lt;0x4c 0x3&gt;; /* SERDES4 lane2/3 select */</div><div class='add'>+			idle-states = &lt;J784S4_SERDES0_LANE0_PCIE1_LANE0&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES0_LANE1_PCIE1_LANE1&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES0_LANE2_IP3_UNUSED&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES0_LANE3_USB&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES1_LANE0_PCIE0_LANE0&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES1_LANE1_PCIE0_LANE1&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES1_LANE2_PCIE0_LANE2&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES1_LANE3_PCIE0_LANE3&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES2_LANE0_IP2_UNUSED&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES2_LANE1_IP2_UNUSED&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES2_LANE2_QSGMII_LANE1&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES2_LANE3_QSGMII_LANE2&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES4_LANE0_EDP_LANE0&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES4_LANE1_EDP_LANE1&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES4_LANE2_EDP_LANE2&gt;,</div><div class='add'>+				      &lt;J784S4_SERDES4_LANE3_EDP_LANE3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb_serdes_mux: mux-controller@4000 {</div><div class='add'>+			compatible = "reg-mux";</div><div class='add'>+			reg = &lt;0x4000 0x4&gt;;</div><div class='add'>+			#mux-control-cells = &lt;1&gt;;</div><div class='add'>+			mux-reg-masks = &lt;0x0 0x8000000&gt;; /* USB0 to SERDES0 lane 3 mux */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehrpwm_tbclk: clock-controller@4140 {</div><div class='add'>+			compatible = "ti,am654-ehrpwm-tbclk";</div><div class='add'>+			reg = &lt;0x4140 0x18&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		audio_refclk1: clock@82e4 {</div><div class='add'>+			compatible = "ti,am62-audio-refclk";</div><div class='add'>+			reg = &lt;0x82e4 0x4&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 157 34&gt;;</div><div class='add'>+			assigned-clocks = &lt;&amp;k3_clks 157 34&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;k3_clks 157 63&gt;;</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		acspcie0_proxy_ctrl: clock-controller@1a090 {</div><div class='add'>+			compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x1a090 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		acspcie1_proxy_ctrl: clock-controller@1a094 {</div><div class='add'>+			compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";</div><div class='add'>+			reg = &lt;0x1a094 0x4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm0: pwm@3000000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3000000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 0&gt;, &lt;&amp;k3_clks 219 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 219 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm1: pwm@3010000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3010000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 1&gt;, &lt;&amp;k3_clks 220 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 220 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm2: pwm@3020000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3020000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 2&gt;, &lt;&amp;k3_clks 221 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 221 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm3: pwm@3030000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3030000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 3&gt;, &lt;&amp;k3_clks 222 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 222 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm4: pwm@3040000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3040000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 4&gt;, &lt;&amp;k3_clks 223 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 223 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_ehrpwm5: pwm@3050000 {</div><div class='add'>+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='add'>+		reg = &lt;0x00 0x3050000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;ehrpwm_tbclk 5&gt;, &lt;&amp;k3_clks 224 0&gt;;</div><div class='add'>+		clock-names = "tbclk", "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 224 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic500: interrupt-controller@1800000 {</div><div class='add'>+		compatible = "arm,gic-v3";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0x00 0x01800000 0x00 0x10000&gt;, /* GICD */</div><div class='add'>+		      &lt;0x00 0x01900000 0x00 0x100000&gt;, /* GICR */</div><div class='add'>+		      &lt;0x00 0x6f000000 0x00 0x2000&gt;,   /* GICC */</div><div class='add'>+		      &lt;0x00 0x6f010000 0x00 0x1000&gt;,   /* GICH */</div><div class='add'>+		      &lt;0x00 0x6f020000 0x00 0x2000&gt;;   /* GICV */</div><div class='add'>+</div><div class='add'>+		/* vcpumntirq: virtual CPU interface maintenance interrupt */</div><div class='add'>+		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+		gic_its: msi-controller@1820000 {</div><div class='add'>+			compatible = "arm,gic-v3-its";</div><div class='add'>+			reg = &lt;0x00 0x01820000 0x00 0x10000&gt;;</div><div class='add'>+			socionext,synquacer-pre-its = &lt;0x1000000 0x400000&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+			#msi-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio_intr: interrupt-controller@a00000 {</div><div class='add'>+		compatible = "ti,sci-intr";</div><div class='add'>+		reg = &lt;0x00 0x00a00000 0x00 0x800&gt;;</div><div class='add'>+		ti,intr-trigger-type = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;10&gt;;</div><div class='add'>+		ti,interrupt-ranges = &lt;8 392 56&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_pmx0: pinctrl@11c000 {</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='add'>+		/* Proxy 0 addressing */</div><div class='add'>+		reg = &lt;0x00 0x11c000 0x00 0x120&gt;;</div><div class='add'>+		#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */</div><div class='add'>+	main_timerio_input: pinctrl@104200 {</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='add'>+		reg = &lt;0x00 0x104200 0x00 0x50&gt;;</div><div class='add'>+		#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+		pinctrl-single,function-mask = &lt;0x00000007&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */</div><div class='add'>+	main_timerio_output: pinctrl@104280 {</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='add'>+		reg = &lt;0x00 0x104280 0x00 0x20&gt;;</div><div class='add'>+		#pinctrl-cells = &lt;1&gt;;</div><div class='add'>+		pinctrl-single,register-width = &lt;32&gt;;</div><div class='add'>+		pinctrl-single,function-mask = &lt;0x0000001f&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_crypto: crypto@4e00000 {</div><div class='add'>+		compatible = "ti,j721e-sa2ul";</div><div class='add'>+		reg = &lt;0x00 0x4e00000 0x00 0x1200&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 369 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000&gt;;</div><div class='add'>+</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xca40&gt;, &lt;&amp;main_udmap 0x4a40&gt;,</div><div class='add'>+				&lt;&amp;main_udmap 0x4a41&gt;;</div><div class='add'>+		dma-names = "tx", "rx1", "rx2";</div><div class='add'>+</div><div class='add'>+		rng: rng@4e10000 {</div><div class='add'>+			compatible = "inside-secure,safexcel-eip76";</div><div class='add'>+			reg = &lt;0x00 0x4e10000 0x00 0x7d&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer0: timer@2400000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2400000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 97 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 97 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 97 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 97 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer1: timer@2410000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2410000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 98 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 98 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 98 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 98 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer2: timer@2420000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2420000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 99 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 99 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 99 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 99 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer3: timer@2430000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2430000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 100 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 100 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 100 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 100 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer4: timer@2440000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2440000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 101 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 101 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 101 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 101 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer5: timer@2450000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2450000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 102 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 102 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 102 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 102 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer6: timer@2460000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2460000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 103 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 103 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 103 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 103 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer7: timer@2470000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2470000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 104 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 104 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 104 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 104 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer8: timer@2480000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2480000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 105 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 105 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 105 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 105 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer9: timer@2490000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2490000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 106 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 106 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 106 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 106 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer10: timer@24a0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24a0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 107 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 107 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 107 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 107 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer11: timer@24b0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24b0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 108 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 108 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 108 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 108 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer12: timer@24c0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24c0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 109 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 109 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 109 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 109 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer13: timer@24d0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24d0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 110 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 110 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 110 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 110 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer14: timer@24e0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24e0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 111 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 111 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 111 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 111 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer15: timer@24f0000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x24f0000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 112 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 112 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 112 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 112 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer16: timer@2500000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2500000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 113 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 113 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 113 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 113 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer17: timer@2510000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2510000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 114 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 114 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 114 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer18: timer@2520000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2520000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 115 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 115 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 115 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 115 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_timer19: timer@2530000 {</div><div class='add'>+		compatible = "ti,am654-timer";</div><div class='add'>+		reg = &lt;0x00 0x2530000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 116 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 116 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 116 3&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 116 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		ti,timer-pwm;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart0: serial@2800000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02800000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 146 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart1: serial@2810000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02810000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 388 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 388 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart2: serial@2820000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02820000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 389 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 389 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart3: serial@2830000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02830000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 390 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 390 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart4: serial@2840000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02840000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 391 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 391 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart5: serial@2850000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02850000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 392 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 392 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart6: serial@2860000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02860000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 393 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 393 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart7: serial@2870000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02870000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 394 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 394 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart8: serial@2880000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02880000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 395 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 395 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_uart9: serial@2890000 {</div><div class='add'>+		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='add'>+		reg = &lt;0x00 0x02890000 0x00 0x200&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 396 0&gt;;</div><div class='add'>+		clock-names = "fclk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 396 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio0: gpio@600000 {</div><div class='add'>+		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='add'>+		reg = &lt;0x00 0x00600000 0x00 0x100&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='add'>+		interrupts = &lt;145&gt;, &lt;146&gt;, &lt;147&gt;, &lt;148&gt;, &lt;149&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		ti,ngpio = &lt;66&gt;;</div><div class='add'>+		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 163 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 163 0&gt;;</div><div class='add'>+		clock-names = "gpio";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio2: gpio@610000 {</div><div class='add'>+		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='add'>+		reg = &lt;0x00 0x00610000 0x00 0x100&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='add'>+		interrupts = &lt;154&gt;, &lt;155&gt;, &lt;156&gt;, &lt;157&gt;, &lt;158&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		ti,ngpio = &lt;66&gt;;</div><div class='add'>+		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 164 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 164 0&gt;;</div><div class='add'>+		clock-names = "gpio";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio4: gpio@620000 {</div><div class='add'>+		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='add'>+		reg = &lt;0x00 0x00620000 0x00 0x100&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='add'>+		interrupts = &lt;163&gt;, &lt;164&gt;, &lt;165&gt;, &lt;166&gt;, &lt;167&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		ti,ngpio = &lt;66&gt;;</div><div class='add'>+		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 165 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 165 0&gt;;</div><div class='add'>+		clock-names = "gpio";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_gpio6: gpio@630000 {</div><div class='add'>+		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='add'>+		reg = &lt;0x00 0x00630000 0x00 0x100&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='add'>+		interrupts = &lt;172&gt;, &lt;173&gt;, &lt;174&gt;, &lt;175&gt;, &lt;176&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		ti,ngpio = &lt;66&gt;;</div><div class='add'>+		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 166 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 166 0&gt;;</div><div class='add'>+		clock-names = "gpio";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbss0: usb@4104000 {</div><div class='add'>+		bootph-all;</div><div class='add'>+		compatible = "ti,j721e-usb";</div><div class='add'>+		reg = &lt;0x00 0x4104000 0x00 0x100&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 398 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 398 21&gt;, &lt;&amp;k3_clks 398 2&gt;;</div><div class='add'>+		clock-names = "ref", "lpm";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 398 21&gt;;    /* USB2_REFCLK */</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 398 22&gt;; /* HFOSC0 */</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		status = "disabled"; /* Needs lane config */</div><div class='add'>+</div><div class='add'>+		usb0: usb@6000000 {</div><div class='add'>+			bootph-all;</div><div class='add'>+			compatible = "cdns,usb3";</div><div class='add'>+			reg = &lt;0x00 0x6000000 0x00 0x10000&gt;,</div><div class='add'>+			      &lt;0x00 0x6010000 0x00 0x10000&gt;,</div><div class='add'>+			      &lt;0x00 0x6020000 0x00 0x10000&gt;;</div><div class='add'>+			reg-names = "otg", "xhci", "dev";</div><div class='add'>+			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,  /* irq.0 */</div><div class='add'>+				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;, /* irq.6 */</div><div class='add'>+				     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;; /* otgirq.0 */</div><div class='add'>+			interrupt-names = "host",</div><div class='add'>+					  "peripheral",</div><div class='add'>+					  "otg";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c0: i2c@2000000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02000000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 270 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 270 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c1: i2c@2010000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02010000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 271 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 271 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c2: i2c@2020000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02020000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 272 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 272 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c3: i2c@2030000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02030000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 273 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 273 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c4: i2c@2040000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02040000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 274 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 274 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c5: i2c@2050000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02050000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 275 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 275 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_i2c6: i2c@2060000 {</div><div class='add'>+		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='add'>+		reg = &lt;0x00 0x02060000 0x00 0x100&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 276 2&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ti_csi2rx0: ticsi2rx@4500000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x04500000 0x00 0x00001000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x4940 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 72 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx0: csi-bridge@4504000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x04504000 0x00 0x00001000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 72 2&gt;, &lt;&amp;k3_clks 72 0&gt;, &lt;&amp;k3_clks 72 2&gt;,</div><div class='add'>+				&lt;&amp;k3_clks 72 2&gt;, &lt;&amp;k3_clks 72 3&gt;, &lt;&amp;k3_clks 72 3&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy0&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi0_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi0_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi0_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi0_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi0_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ti_csi2rx1: ticsi2rx@4510000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x04510000 0x00 0x1000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x4960 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 73 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx1: csi-bridge@4514000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x04514000 0x00 0x00001000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 73 2&gt;, &lt;&amp;k3_clks 73 0&gt;, &lt;&amp;k3_clks 73 2&gt;,</div><div class='add'>+				&lt;&amp;k3_clks 73 2&gt;, &lt;&amp;k3_clks 73 3&gt;, &lt;&amp;k3_clks 73 3&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy1&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi1_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi1_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ti_csi2rx2: ticsi2rx@4520000 {</div><div class='add'>+		compatible = "ti,j721e-csi2rx-shim";</div><div class='add'>+		reg = &lt;0x00 0x04520000 0x00 0x00001000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dmas = &lt;&amp;main_bcdma_csi 0 0x4980 0&gt;;</div><div class='add'>+		dma-names = "rx0";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 74 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		cdns_csi2rx2: csi-bridge@4524000 {</div><div class='add'>+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='add'>+			reg = &lt;0x00 0x04524000 0x00 0x00001000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "error_irq", "irq";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 74 2&gt;, &lt;&amp;k3_clks 74 0&gt;, &lt;&amp;k3_clks 74 2&gt;,</div><div class='add'>+				&lt;&amp;k3_clks 74 2&gt;, &lt;&amp;k3_clks 74 3&gt;, &lt;&amp;k3_clks 74 3&gt;;</div><div class='add'>+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='add'>+				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='add'>+			phys = &lt;&amp;dphy2&gt;;</div><div class='add'>+			phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+			ports {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				csi2_port0: port@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port1: port@1 {</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port2: port@2 {</div><div class='add'>+					reg = &lt;2&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port3: port@3 {</div><div class='add'>+					reg = &lt;3&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				csi2_port4: port@4 {</div><div class='add'>+					reg = &lt;4&gt;;</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy0: phy@4580000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x04580000 0x00 0x00001100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 212 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy1: phy@4590000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x04590000 0x00 0x00001100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 213 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy2: phy@45a0000 {</div><div class='add'>+		compatible = "cdns,dphy-rx";</div><div class='add'>+		reg = &lt;0x00 0x045a0000 0x00 0x00001100&gt;;</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 214 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vpu0: video-codec@4210000 {</div><div class='add'>+		compatible = "ti,j721s2-wave521c", "cnm,wave521c";</div><div class='add'>+		reg = &lt;0x00 0x4210000 0x00 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 241 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 241 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vpu1: video-codec@4220000 {</div><div class='add'>+		compatible = "ti,j721s2-wave521c", "cnm,wave521c";</div><div class='add'>+		reg = &lt;0x00 0x4220000 0x00 0x10000&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 242 2&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 242 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_sdhci0: mmc@4f80000 {</div><div class='add'>+		compatible = "ti,j721e-sdhci-8bit";</div><div class='add'>+		reg = &lt;0x00 0x04f80000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x04f88000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 140 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 140 1&gt;, &lt;&amp;k3_clks 140 2&gt;;</div><div class='add'>+		clock-names = "clk_ahb", "clk_xin";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 140 2&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 140 3&gt;;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='add'>+		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='add'>+		ti,otap-del-sel-ddr52 = &lt;0x6&gt;;</div><div class='add'>+		ti,otap-del-sel-hs200 = &lt;0x8&gt;;</div><div class='add'>+		ti,otap-del-sel-hs400 = &lt;0x5&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0x10&gt;;</div><div class='add'>+		ti,itap-del-sel-mmc-hs = &lt;0xa&gt;;</div><div class='add'>+		ti,strobe-sel = &lt;0x77&gt;;</div><div class='add'>+		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='add'>+		ti,trm-icp = &lt;0x8&gt;;</div><div class='add'>+		mmc-ddr-1_8v;</div><div class='add'>+		mmc-hs200-1_8v;</div><div class='add'>+		mmc-hs400-1_8v;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_sdhci1: mmc@4fb0000 {</div><div class='add'>+		compatible = "ti,j721e-sdhci-4bit";</div><div class='add'>+		reg = &lt;0x00 0x04fb0000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x04fb8000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 141 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 141 3&gt;, &lt;&amp;k3_clks 141 4&gt;;</div><div class='add'>+		clock-names = "clk_ahb", "clk_xin";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 141 4&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 141 5&gt;;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr12 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr25 = &lt;0xf&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr50 = &lt;0xc&gt;;</div><div class='add'>+		ti,otap-del-sel-sdr104 = &lt;0x5&gt;;</div><div class='add'>+		ti,otap-del-sel-ddr50 = &lt;0xc&gt;;</div><div class='add'>+		ti,itap-del-sel-legacy = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='add'>+		ti,itap-del-sel-ddr50 = &lt;0x2&gt;;</div><div class='add'>+		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='add'>+		ti,trm-icp = &lt;0x8&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie0_rc: pcie@2900000 {</div><div class='add'>+		compatible = "ti,j784s4-pcie-host";</div><div class='add'>+		reg = &lt;0x00 0x02900000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02907000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x40 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 332 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 332 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+		vendor-id = &lt;0x104c&gt;;</div><div class='add'>+		device-id = &lt;0xb012&gt;;</div><div class='add'>+		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x40 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x40 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='add'>+		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pcie1_rc: pcie@2910000 {</div><div class='add'>+		compatible = "ti,j784s4-pcie-host";</div><div class='add'>+		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='add'>+		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='add'>+		      &lt;0x41 0x00000000 0x00 0x00001000&gt;; /* ECAM (4 KB) */</div><div class='add'>+		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='add'>+		interrupt-names = "link_state";</div><div class='add'>+		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		device_type = "pci";</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='add'>+		max-link-speed = &lt;3&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 333 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 333 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		#address-cells = &lt;3&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+		vendor-id = &lt;0x104c&gt;;</div><div class='add'>+		device-id = &lt;0xb012&gt;;</div><div class='add'>+		msi-map = &lt;0x0 &amp;gic_its 0x10000 0x10000&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		ranges = &lt;0x01000000 0x00 0x00001000 0x41 0x00001000 0x00 0x00100000&gt;, /* IO (1 MB) */</div><div class='add'>+			 &lt;0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000&gt;; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */</div><div class='add'>+		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes_wiz0: wiz@5060000 {</div><div class='add'>+		compatible = "ti,j784s4-wiz-10g";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 404 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 404 2&gt;, &lt;&amp;k3_clks 404 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 404 5&gt;;</div><div class='add'>+		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 404 6&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 404 10&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x5060000 0x00 0x5060000 0x10000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		serdes0: serdes@5060000 {</div><div class='add'>+			compatible = "ti,j721e-serdes-10g";</div><div class='add'>+			reg = &lt;0x05060000 0x010000&gt;;</div><div class='add'>+			reg-names = "torrent_phy";</div><div class='add'>+			resets = &lt;&amp;serdes_wiz0 0&gt;;</div><div class='add'>+			reset-names = "torrent_reset";</div><div class='add'>+			clocks = &lt;&amp;serdes_wiz0 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+				 &lt;&amp;serdes_wiz0 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='add'>+			clock-names = "refclk", "phy_en_refclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;serdes_wiz0 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz0 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz0 TI_WIZ_REFCLK_DIG&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;k3_clks 404 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 404 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 404 6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes_wiz1: wiz@5070000 {</div><div class='add'>+		compatible = "ti,j784s4-wiz-10g";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 405 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 405 2&gt;, &lt;&amp;k3_clks 405 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 405 5&gt;;</div><div class='add'>+		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 405 6&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 405 10&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x05070000 0x00 0x05070000 0x10000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		serdes1: serdes@5070000 {</div><div class='add'>+			compatible = "ti,j721e-serdes-10g";</div><div class='add'>+			reg = &lt;0x05070000 0x010000&gt;;</div><div class='add'>+			reg-names = "torrent_phy";</div><div class='add'>+			resets = &lt;&amp;serdes_wiz1 0&gt;;</div><div class='add'>+			reset-names = "torrent_reset";</div><div class='add'>+			clocks = &lt;&amp;serdes_wiz1 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+				 &lt;&amp;serdes_wiz1 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='add'>+			clock-names = "refclk", "phy_en_refclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;serdes_wiz1 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz1 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz1 TI_WIZ_REFCLK_DIG&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;k3_clks 405 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 405 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 405 6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serdes_wiz4: wiz@5050000 {</div><div class='add'>+		compatible = "ti,j784s4-wiz-10g";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 407 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 407 2&gt;, &lt;&amp;k3_clks 407 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 407 5&gt;;</div><div class='add'>+		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 407 6&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 407 10&gt;;</div><div class='add'>+		num-lanes = &lt;4&gt;;</div><div class='add'>+		#reset-cells = &lt;1&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x05050000 0x00 0x05050000 0x10000&gt;,</div><div class='add'>+			 &lt;0xa030a00 0x00 0xa030a00 0x40&gt;; /* DPTX PHY */</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		serdes4: serdes@5050000 {</div><div class='add'>+			/*</div><div class='add'>+			 * Note: we also map DPTX PHY registers as the Torrent</div><div class='add'>+			 * needs to manage those.</div><div class='add'>+			 */</div><div class='add'>+			compatible = "ti,j721e-serdes-10g";</div><div class='add'>+			reg = &lt;0x05050000 0x010000&gt;,</div><div class='add'>+			      &lt;0x0a030a00 0x40&gt;; /* DPTX PHY */</div><div class='add'>+			reg-names = "torrent_phy";</div><div class='add'>+			resets = &lt;&amp;serdes_wiz4 0&gt;;</div><div class='add'>+			reset-names = "torrent_reset";</div><div class='add'>+			clocks = &lt;&amp;serdes_wiz4 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+				 &lt;&amp;serdes_wiz4 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='add'>+			clock-names = "refclk", "phy_en_refclk";</div><div class='add'>+			assigned-clocks = &lt;&amp;serdes_wiz4 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz4 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='add'>+					  &lt;&amp;serdes_wiz4 TI_WIZ_REFCLK_DIG&gt;;</div><div class='add'>+			assigned-clock-parents = &lt;&amp;k3_clks 407 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 407 6&gt;,</div><div class='add'>+						 &lt;&amp;k3_clks 407 6&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_navss: bus@30000000 {</div><div class='add'>+		bootph-all;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges = &lt;0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;280&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		dma-ranges;</div><div class='add'>+</div><div class='add'>+		main_navss_intr: interrupt-controller@310e0000 {</div><div class='add'>+			compatible = "ti,sci-intr";</div><div class='add'>+			reg = &lt;0x00 0x310e0000 0x00 0x4000&gt;;</div><div class='add'>+			ti,intr-trigger-type = &lt;4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;283&gt;;</div><div class='add'>+			ti,interrupt-ranges = &lt;0 64 64&gt;,</div><div class='add'>+					      &lt;64 448 64&gt;,</div><div class='add'>+					      &lt;128 672 64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_udmass_inta: msi-controller@33d00000 {</div><div class='add'>+			compatible = "ti,sci-inta";</div><div class='add'>+			reg = &lt;0x00 0x33d00000 0x00 0x100000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;321&gt;;</div><div class='add'>+			ti,interrupt-ranges = &lt;0 0 256&gt;;</div><div class='add'>+			ti,unmapped-event-sources = &lt;&amp;main_bcdma_csi&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		secure_proxy_main: mailbox@32c00000 {</div><div class='add'>+			bootph-all;</div><div class='add'>+			compatible = "ti,am654-secure-proxy";</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			reg-names = "target_data", "rt", "scfg";</div><div class='add'>+			reg = &lt;0x00 0x32c00000 0x00 0x100000&gt;,</div><div class='add'>+			      &lt;0x00 0x32400000 0x00 0x100000&gt;,</div><div class='add'>+			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='add'>+			interrupt-names = "rx_011";</div><div class='add'>+			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		hwspinlock: hwlock@30e00000 {</div><div class='add'>+			compatible = "ti,am654-hwspinlock";</div><div class='add'>+			reg = &lt;0x00 0x30e00000 0x00 0x1000&gt;;</div><div class='add'>+			#hwlock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster0: mailbox@31f80000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f80000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster1: mailbox@31f81000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f81000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster2: mailbox@31f82000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f82000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster3: mailbox@31f83000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f83000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster4: mailbox@31f84000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f84000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster5: mailbox@31f85000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f85000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster6: mailbox@31f86000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f86000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster7: mailbox@31f87000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f87000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster8: mailbox@31f88000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f88000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster9: mailbox@31f89000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f89000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster10: mailbox@31f8a000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f8a000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox0_cluster11: mailbox@31f8b000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f8b000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster0: mailbox@31f90000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f90000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster1: mailbox@31f91000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f91000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster2: mailbox@31f92000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f92000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster3: mailbox@31f93000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f93000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster4: mailbox@31f94000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f94000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster5: mailbox@31f95000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f95000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster6: mailbox@31f96000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f96000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster7: mailbox@31f97000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f97000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster8: mailbox@31f98000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f98000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster9: mailbox@31f99000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f99000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster10: mailbox@31f9a000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f9a000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mailbox1_cluster11: mailbox@31f9b000 {</div><div class='add'>+			compatible = "ti,am654-mailbox";</div><div class='add'>+			reg = &lt;0x00 0x31f9b000 0x00 0x200&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+			ti,mbox-num-users = &lt;4&gt;;</div><div class='add'>+			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_ringacc: ringacc@3c000000 {</div><div class='add'>+			compatible = "ti,am654-navss-ringacc";</div><div class='add'>+			reg = &lt;0x00 0x3c000000 0x00 0x400000&gt;,</div><div class='add'>+			      &lt;0x00 0x38000000 0x00 0x400000&gt;,</div><div class='add'>+			      &lt;0x00 0x31120000 0x00 0x100&gt;,</div><div class='add'>+			      &lt;0x00 0x33000000 0x00 0x40000&gt;,</div><div class='add'>+			      &lt;0x00 0x31080000 0x00 0x40000&gt;;</div><div class='add'>+			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";</div><div class='add'>+			ti,num-rings = &lt;1024&gt;;</div><div class='add'>+			ti,sci-rm-range-gp-rings = &lt;0x1&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;315&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_udmap: dma-controller@31150000 {</div><div class='add'>+			compatible = "ti,j721e-navss-main-udmap";</div><div class='add'>+			reg = &lt;0x00 0x31150000 0x00 0x100&gt;,</div><div class='add'>+			      &lt;0x00 0x34000000 0x00 0x80000&gt;,</div><div class='add'>+			      &lt;0x00 0x35000000 0x00 0x200000&gt;,</div><div class='add'>+			      &lt;0x00 0x30b00000 0x00 0x20000&gt;,</div><div class='add'>+			      &lt;0x00 0x30c00000 0x00 0x8000&gt;,</div><div class='add'>+			      &lt;0x00 0x30d00000 0x00 0x4000&gt;;</div><div class='add'>+			reg-names = "gcfg", "rchanrt", "tchanrt",</div><div class='add'>+				    "tchan", "rchan", "rflow";</div><div class='add'>+			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;319&gt;;</div><div class='add'>+			ti,ringacc = &lt;&amp;main_ringacc&gt;;</div><div class='add'>+</div><div class='add'>+			ti,sci-rm-range-tchan = &lt;0x0d&gt;, /* TX_CHAN */</div><div class='add'>+						&lt;0x0f&gt;, /* TX_HCHAN */</div><div class='add'>+						&lt;0x10&gt;; /* TX_UHCHAN */</div><div class='add'>+			ti,sci-rm-range-rchan = &lt;0x0a&gt;, /* RX_CHAN */</div><div class='add'>+						&lt;0x0b&gt;, /* RX_HCHAN */</div><div class='add'>+						&lt;0x0c&gt;; /* RX_UHCHAN */</div><div class='add'>+			ti,sci-rm-range-rflow = &lt;0x00&gt;; /* GP RFLOW */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_bcdma_csi: dma-controller@311a0000 {</div><div class='add'>+			compatible = "ti,j721s2-dmss-bcdma-csi";</div><div class='add'>+			reg = &lt;0x00 0x311a0000 0x00 0x100&gt;,</div><div class='add'>+			      &lt;0x00 0x35d00000 0x00 0x20000&gt;,</div><div class='add'>+			      &lt;0x00 0x35c00000 0x00 0x10000&gt;,</div><div class='add'>+			      &lt;0x00 0x35e00000 0x00 0x80000&gt;;</div><div class='add'>+			reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";</div><div class='add'>+			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='add'>+			#dma-cells = &lt;3&gt;;</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;281&gt;;</div><div class='add'>+			ti,sci-rm-range-rchan = &lt;0x21&gt;;</div><div class='add'>+			ti,sci-rm-range-tchan = &lt;0x22&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpts@310d0000 {</div><div class='add'>+			compatible = "ti,j721e-cpts";</div><div class='add'>+			reg = &lt;0x00 0x310d0000 0x00 0x400&gt;;</div><div class='add'>+			reg-names = "cpts";</div><div class='add'>+			clocks = &lt;&amp;k3_clks 282 0&gt;;</div><div class='add'>+			clock-names = "cpts";</div><div class='add'>+			assigned-clocks = &lt;&amp;k3_clks 62 3&gt;; /* CPTS_RFT_CLK */</div><div class='add'>+			assigned-clock-parents = &lt;&amp;k3_clks 62 5&gt;; /* MAIN_0_HSDIV6_CLK */</div><div class='add'>+			interrupts-extended = &lt;&amp;main_navss_intr 391&gt;;</div><div class='add'>+			interrupt-names = "cpts";</div><div class='add'>+			ti,cpts-periodic-outputs = &lt;6&gt;;</div><div class='add'>+			ti,cpts-ext-ts-inputs = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_cpsw0: ethernet@c000000 {</div><div class='add'>+		compatible = "ti,j784s4-cpswxg-nuss";</div><div class='add'>+		reg = &lt;0x00 0xc000000 0x00 0x200000&gt;;</div><div class='add'>+		reg-names = "cpsw_nuss";</div><div class='add'>+		ranges = &lt;0x00 0x00 0x00 0xc000000 0x00 0x200000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 64 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 64 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xca00&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca01&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca02&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca03&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca04&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca05&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca06&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0xca07&gt;,</div><div class='add'>+		       &lt;&amp;main_udmap 0x4a00&gt;;</div><div class='add'>+		dma-names = "tx0", "tx1", "tx2", "tx3",</div><div class='add'>+			    "tx4", "tx5", "tx6", "tx7",</div><div class='add'>+			    "rx";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ethernet-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port1: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "port1";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port2: port@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				label = "port2";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port3: port@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				label = "port3";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port4: port@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				label = "port4";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port5: port@5 {</div><div class='add'>+				reg = &lt;5&gt;;</div><div class='add'>+				label = "port5";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port6: port@6 {</div><div class='add'>+				reg = &lt;6&gt;;</div><div class='add'>+				label = "port6";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port7: port@7 {</div><div class='add'>+				reg = &lt;7&gt;;</div><div class='add'>+				label = "port7";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			main_cpsw0_port8: port@8 {</div><div class='add'>+				reg = &lt;8&gt;;</div><div class='add'>+				label = "port8";</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_cpsw0_mdio: mdio@f00 {</div><div class='add'>+			compatible = "ti,cpsw-mdio","ti,davinci_mdio";</div><div class='add'>+			reg = &lt;0x00 0xf00 0x00 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 64 0&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			bus_freq = &lt;1000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpts@3d000 {</div><div class='add'>+			compatible = "ti,am65-cpts";</div><div class='add'>+			reg = &lt;0x00 0x3d000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 64 3&gt;;</div><div class='add'>+			clock-names = "cpts";</div><div class='add'>+			interrupts-extended = &lt;&amp;gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cpts";</div><div class='add'>+			ti,cpts-ext-ts-inputs = &lt;4&gt;;</div><div class='add'>+			ti,cpts-periodic-outputs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_cpsw1: ethernet@c200000 {</div><div class='add'>+		compatible = "ti,j721e-cpsw-nuss";</div><div class='add'>+		reg = &lt;0x00 0xc200000 0x00 0x200000&gt;;</div><div class='add'>+		reg-names = "cpsw_nuss";</div><div class='add'>+		ranges = &lt;0x00 0x00 0x00 0xc200000 0x00 0x200000&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-coherent;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc640&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc641&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc642&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc643&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc644&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc645&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc646&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0xc647&gt;,</div><div class='add'>+			&lt;&amp;main_udmap 0x4640&gt;;</div><div class='add'>+		dma-names = "tx0", "tx1", "tx2", "tx3",</div><div class='add'>+				"tx4", "tx5", "tx6", "tx7",</div><div class='add'>+				"rx";</div><div class='add'>+</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ethernet-ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			main_cpsw1_port1: port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				label = "port1";</div><div class='add'>+				phys = &lt;&amp;cpsw1_phy_gmii_sel 1&gt;;</div><div class='add'>+				ti,mac-only;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_cpsw1_mdio: mdio@f00 {</div><div class='add'>+			compatible = "ti,cpsw-mdio", "ti,davinci_mdio";</div><div class='add'>+			reg = &lt;0x00 0xf00 0x00 0x100&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='add'>+			clock-names = "fck";</div><div class='add'>+			bus_freq = &lt;1000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpts@3d000 {</div><div class='add'>+			compatible = "ti,am65-cpts";</div><div class='add'>+			reg = &lt;0x00 0x3d000 0x00 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 62 3&gt;;</div><div class='add'>+			clock-names = "cpts";</div><div class='add'>+			interrupts-extended = &lt;&amp;gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "cpts";</div><div class='add'>+			ti,cpts-ext-ts-inputs = &lt;4&gt;;</div><div class='add'>+			ti,cpts-periodic-outputs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan0: can@2701000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02701000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02708000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 245 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 245 6&gt;, &lt;&amp;k3_clks 245 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan1: can@2711000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02711000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02718000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 246 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 246 6&gt;, &lt;&amp;k3_clks 246 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan2: can@2721000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02721000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02728000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 247 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 247 6&gt;, &lt;&amp;k3_clks 247 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan3: can@2731000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02731000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02738000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 248 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 248 6&gt;, &lt;&amp;k3_clks 248 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan4: can@2741000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02741000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02748000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 249 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 249 6&gt;, &lt;&amp;k3_clks 249 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan5: can@2751000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02751000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02758000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 250 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 250 6&gt;, &lt;&amp;k3_clks 250 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan6: can@2761000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02761000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02768000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 251 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 251 6&gt;, &lt;&amp;k3_clks 251 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan7: can@2771000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02771000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02778000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 252 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 252 6&gt;, &lt;&amp;k3_clks 252 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan8: can@2781000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02781000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02788000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 253 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 253 6&gt;, &lt;&amp;k3_clks 253 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan9: can@2791000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02791000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02798000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 254 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 254 6&gt;, &lt;&amp;k3_clks 254 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan10: can@27a1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x027a1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x027a8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 255 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 255 6&gt;, &lt;&amp;k3_clks 255 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan11: can@27b1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x027b1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x027b8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 256 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 256 6&gt;, &lt;&amp;k3_clks 256 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan12: can@27c1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x027c1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x027c8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 257 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 257 6&gt;, &lt;&amp;k3_clks 257 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan13: can@27d1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x027d1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x027d8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 258 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 258 6&gt;, &lt;&amp;k3_clks 258 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan14: can@2681000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02681000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02688000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 259 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 259 6&gt;, &lt;&amp;k3_clks 259 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan15: can@2691000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x02691000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x02698000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 260 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 260 6&gt;, &lt;&amp;k3_clks 260 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan16: can@26a1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x026a1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x026a8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 261 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 261 6&gt;, &lt;&amp;k3_clks 261 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_mcan17: can@26b1000 {</div><div class='add'>+		compatible = "bosch,m_can";</div><div class='add'>+		reg = &lt;0x00 0x026b1000 0x00 0x200&gt;,</div><div class='add'>+		      &lt;0x00 0x026b8000 0x00 0x8000&gt;;</div><div class='add'>+		reg-names = "m_can", "message_ram";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 262 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 262 6&gt;, &lt;&amp;k3_clks 262 1&gt;;</div><div class='add'>+		clock-names = "hclk", "cclk";</div><div class='add'>+		interrupts = &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "int0", "int1";</div><div class='add'>+		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi0: spi@2100000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02100000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 376 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 376 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi1: spi@2110000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02110000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 377 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 377 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi2: spi@2120000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02120000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 378 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 378 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi3: spi@2130000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02130000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 379 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 379 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi4: spi@2140000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02140000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 380 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 380 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi5: spi@2150000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02150000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 381 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 381 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi6: spi@2160000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02160000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 382 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 382 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_spi7: spi@2170000 {</div><div class='add'>+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='add'>+		reg = &lt;0x00 0x02170000 0x00 0x400&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 383 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 383 0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ufs_wrapper: ufs-wrapper@4e80000 {</div><div class='add'>+		compatible = "ti,j721e-ufs";</div><div class='add'>+		reg = &lt;0x00 0x4e80000 0x00 0x100&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 387 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 387 3&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 387 3&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 387 6&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		ufs@4e84000 {</div><div class='add'>+			compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";</div><div class='add'>+			reg = &lt;0x00 0x4e84000 0x00 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			freq-table-hz = &lt;250000000 250000000&gt;, &lt;19200000 19200000&gt;,</div><div class='add'>+					&lt;19200000 19200000&gt;;</div><div class='add'>+			clocks = &lt;&amp;k3_clks 387 1&gt;, &lt;&amp;k3_clks 387 3&gt;, &lt;&amp;k3_clks 387 3&gt;;</div><div class='add'>+			clock-names = "core_clk", "phy_clk", "ref_clk";</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0: r5fss@5c00000 {</div><div class='add'>+		compatible = "ti,j721s2-r5fss";</div><div class='add'>+		ti,cluster-mode = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x5c00000 0x00 0x5c00000 0x20000&gt;,</div><div class='add'>+			 &lt;0x5d00000 0x00 0x5d00000 0x20000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 336 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		main_r5fss0_core0: r5f@5c00000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5c00000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5c10000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;339&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x06 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 339 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f0_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_r5fss0_core1: r5f@5d00000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5d00000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5d10000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;340&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x07 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 340 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f0_1-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1: r5fss@5e00000 {</div><div class='add'>+		compatible = "ti,j721s2-r5fss";</div><div class='add'>+		ti,cluster-mode = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x5e00000 0x00 0x5e00000 0x20000&gt;,</div><div class='add'>+			 &lt;0x5f00000 0x00 0x5f00000 0x20000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 337 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		main_r5fss1_core0: r5f@5e00000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5e00000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5e10000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;341&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x08 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 341 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f1_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_r5fss1_core1: r5f@5f00000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5f00000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5f10000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;342&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x09 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 342 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f1_1-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss2: r5fss@5900000 {</div><div class='add'>+		compatible = "ti,j721s2-r5fss";</div><div class='add'>+		ti,cluster-mode = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x5900000 0x00 0x5900000 0x20000&gt;,</div><div class='add'>+			 &lt;0x5a00000 0x00 0x5a00000 0x20000&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 338 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		main_r5fss2_core0: r5f@5900000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5900000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5910000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;343&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x0a 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 343 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f2_0-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		main_r5fss2_core1: r5f@5a00000 {</div><div class='add'>+			compatible = "ti,j721s2-r5f";</div><div class='add'>+			reg = &lt;0x5a00000 0x00010000&gt;,</div><div class='add'>+			      &lt;0x5a10000 0x00010000&gt;;</div><div class='add'>+			reg-names = "atcm", "btcm";</div><div class='add'>+			ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+			ti,sci-dev-id = &lt;344&gt;;</div><div class='add'>+			ti,sci-proc-ids = &lt;0x0b 0xff&gt;;</div><div class='add'>+			resets = &lt;&amp;k3_reset 344 1&gt;;</div><div class='add'>+			firmware-name = "j784s4-main-r5f2_1-fw";</div><div class='add'>+			ti,atcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,btcm-enable = &lt;1&gt;;</div><div class='add'>+			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0: dsp@64800000 {</div><div class='add'>+		compatible = "ti,j721s2-c71-dsp";</div><div class='add'>+		reg = &lt;0x00 0x64800000 0x00 0x00080000&gt;,</div><div class='add'>+		      &lt;0x00 0x64e00000 0x00 0x0000c000&gt;;</div><div class='add'>+		reg-names = "l2sram", "l1dram";</div><div class='add'>+		ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;30&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x30 0xff&gt;;</div><div class='add'>+		resets = &lt;&amp;k3_reset 30 1&gt;;</div><div class='add'>+		firmware-name = "j784s4-c71_0-fw";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_1: dsp@65800000 {</div><div class='add'>+		compatible = "ti,j721s2-c71-dsp";</div><div class='add'>+		reg = &lt;0x00 0x65800000 0x00 0x00080000&gt;,</div><div class='add'>+		      &lt;0x00 0x65e00000 0x00 0x0000c000&gt;;</div><div class='add'>+		reg-names = "l2sram", "l1dram";</div><div class='add'>+		ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;33&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x31 0xff&gt;;</div><div class='add'>+		resets = &lt;&amp;k3_reset 33 1&gt;;</div><div class='add'>+		firmware-name = "j784s4-c71_1-fw";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_2: dsp@66800000 {</div><div class='add'>+		compatible = "ti,j721s2-c71-dsp";</div><div class='add'>+		reg = &lt;0x00 0x66800000 0x00 0x00080000&gt;,</div><div class='add'>+		      &lt;0x00 0x66e00000 0x00 0x0000c000&gt;;</div><div class='add'>+		reg-names = "l2sram", "l1dram";</div><div class='add'>+		ti,sci = &lt;&amp;sms&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;37&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x32 0xff&gt;;</div><div class='add'>+		resets = &lt;&amp;k3_reset 37 1&gt;;</div><div class='add'>+		firmware-name = "j784s4-c71_2-fw";</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_esm: esm@700000 {</div><div class='add'>+		compatible = "ti,j721e-esm";</div><div class='add'>+		reg = &lt;0x00 0x700000 0x00 0x1000&gt;;</div><div class='add'>+		ti,esm-pins = &lt;688&gt;, &lt;689&gt;, &lt;690&gt;, &lt;691&gt;, &lt;692&gt;, &lt;693&gt;, &lt;694&gt;,</div><div class='add'>+			      &lt;695&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog0: watchdog@2200000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2200000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 348 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 348 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 348 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 348 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog1: watchdog@2210000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2210000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 349 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 349 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 349 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 349 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog2: watchdog@2220000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2220000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 350 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 350 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 350 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 350 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog3: watchdog@2230000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2230000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 351 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 351 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 351 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 351 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog4: watchdog@2240000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2240000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 352 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 352 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 352 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 352 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog5: watchdog@2250000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2250000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 353 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 353 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 353 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 353 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog6: watchdog@2260000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2260000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 354 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 354 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 354 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 354 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog7: watchdog@2270000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2270000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 355 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 355 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 355 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 355 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The following RTI instances are coupled with MCU R5Fs, c7x and</div><div class='add'>+	 * GPU so keeping them reserved as these will be used by their</div><div class='add'>+	 * respective firmware</div><div class='add'>+	 */</div><div class='add'>+	watchdog8: watchdog@22f0000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x22f0000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 360 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 360 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 360 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 360 4&gt;;</div><div class='add'>+		/* reserved for GPU */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog9: watchdog@2300000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2300000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 356 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 356 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 356 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 356 4&gt;;</div><div class='add'>+		/* reserved for C7X_0 DSP */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog10: watchdog@2310000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2310000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 357 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 357 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 357 4&gt;;</div><div class='add'>+		/* reserved for C7X_1 DSP */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog11: watchdog@2320000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2320000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 358 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 358 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 358 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 358 4&gt;;</div><div class='add'>+		/* reserved for C7X_2 DSP */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog12: watchdog@2330000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2330000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 359 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 359 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 359 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 359 4&gt;;</div><div class='add'>+		/* reserved for C7X_3 DSP */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog13: watchdog@23c0000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x23c0000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 361 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 361 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 361 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 361 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F0_0 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog14: watchdog@23d0000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x23d0000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 362 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 362 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 362 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 362 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F0_1 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog15: watchdog@23e0000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x23e0000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 363 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 363 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 363 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 363 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F1_0 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog16: watchdog@23f0000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x23f0000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 364 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 364 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 364 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 364 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F1_1 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog17: watchdog@2540000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2540000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 365 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 365 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 365 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 366 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F2_0 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog18: watchdog@2550000 {</div><div class='add'>+		compatible = "ti,j7-rti-wdt";</div><div class='add'>+		reg = &lt;0x00 0x2550000 0x00 0x100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 366 0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 366 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 366 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 366 4&gt;;</div><div class='add'>+		/* reserved for MAIN_R5F2_1 */</div><div class='add'>+		status = "reserved";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dphy_tx0: phy@4480000 {</div><div class='add'>+		compatible = "ti,j721e-dphy";</div><div class='add'>+		reg = &lt;0x00 0x04480000 0x00 0x00001000&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 402 20&gt;, &lt;&amp;k3_clks 402 3&gt;;</div><div class='add'>+		clock-names = "psm", "pll_ref";</div><div class='add'>+		#phy-cells = &lt;0&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 402 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 402 3&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 402 4&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dsi0: dsi@4800000 {</div><div class='add'>+		compatible = "ti,j721e-dsi";</div><div class='add'>+		reg = &lt;0x00 0x04800000 0x00 0x00100000&gt;,</div><div class='add'>+		      &lt;0x00 0x04710000 0x00 0x00000100&gt;;</div><div class='add'>+		clocks = &lt;&amp;k3_clks 215 2&gt;, &lt;&amp;k3_clks 215 5&gt;;</div><div class='add'>+		clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 215 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		phys = &lt;&amp;dphy_tx0&gt;;</div><div class='add'>+		phy-names = "dphy";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		dsi0_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			port@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			port@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mhdp: bridge@a000000 {</div><div class='add'>+		compatible = "ti,j721e-mhdp8546";</div><div class='add'>+		reg = &lt;0x0 0xa000000 0x0 0x30a00&gt;,</div><div class='add'>+		      &lt;0x0 0x4f40000 0x0 0x20&gt;;</div><div class='add'>+		reg-names = "mhdptx", "j721e-intg";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 217 11&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 217 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		dp0_ports: ports {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			/* Remote-endpoints are on the boards so</div><div class='add'>+			 * ports are defined in the platform dt file.</div><div class='add'>+			 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dss: dss@4a00000 {</div><div class='add'>+		compatible = "ti,j721e-dss";</div><div class='add'>+		reg = &lt;0x00 0x04a00000 0x00 0x10000&gt;, /* common_m */</div><div class='add'>+		      &lt;0x00 0x04a10000 0x00 0x10000&gt;, /* common_s0*/</div><div class='add'>+		      &lt;0x00 0x04b00000 0x00 0x10000&gt;, /* common_s1*/</div><div class='add'>+		      &lt;0x00 0x04b10000 0x00 0x10000&gt;, /* common_s2*/</div><div class='add'>+		      &lt;0x00 0x04a20000 0x00 0x10000&gt;, /* vidl1 */</div><div class='add'>+		      &lt;0x00 0x04a30000 0x00 0x10000&gt;, /* vidl2 */</div><div class='add'>+		      &lt;0x00 0x04a50000 0x00 0x10000&gt;, /* vid1 */</div><div class='add'>+		      &lt;0x00 0x04a60000 0x00 0x10000&gt;, /* vid2 */</div><div class='add'>+		      &lt;0x00 0x04a70000 0x00 0x10000&gt;, /* ovr1 */</div><div class='add'>+		      &lt;0x00 0x04a90000 0x00 0x10000&gt;, /* ovr2 */</div><div class='add'>+		      &lt;0x00 0x04ab0000 0x00 0x10000&gt;, /* ovr3 */</div><div class='add'>+		      &lt;0x00 0x04ad0000 0x00 0x10000&gt;, /* ovr4 */</div><div class='add'>+		      &lt;0x00 0x04a80000 0x00 0x10000&gt;, /* vp1 */</div><div class='add'>+		      &lt;0x00 0x04aa0000 0x00 0x10000&gt;, /* vp1 */</div><div class='add'>+		      &lt;0x00 0x04ac0000 0x00 0x10000&gt;, /* vp1 */</div><div class='add'>+		      &lt;0x00 0x04ae0000 0x00 0x10000&gt;, /* vp4 */</div><div class='add'>+		      &lt;0x00 0x04af0000 0x00 0x10000&gt;; /* wb */</div><div class='add'>+		reg-names = "common_m", "common_s0",</div><div class='add'>+			    "common_s1", "common_s2",</div><div class='add'>+			    "vidl1", "vidl2","vid1","vid2",</div><div class='add'>+			    "ovr1", "ovr2", "ovr3", "ovr4",</div><div class='add'>+			    "vp1", "vp2", "vp3", "vp4",</div><div class='add'>+			    "wb";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 218 0&gt;,</div><div class='add'>+			 &lt;&amp;k3_clks 218 2&gt;,</div><div class='add'>+			 &lt;&amp;k3_clks 218 5&gt;,</div><div class='add'>+			 &lt;&amp;k3_clks 218 14&gt;,</div><div class='add'>+			 &lt;&amp;k3_clks 218 18&gt;;</div><div class='add'>+		clock-names = "fck", "vp1", "vp2", "vp3", "vp4";</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 218 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "common_m",</div><div class='add'>+				  "common_s0",</div><div class='add'>+				  "common_s1",</div><div class='add'>+				  "common_s2";</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		dss_ports: ports {</div><div class='add'>+			/* Ports that DSS drives are platform specific</div><div class='add'>+			 * so they are defined in platform dt file.</div><div class='add'>+			 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp0: mcasp@2b00000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b00000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b08000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc400&gt;, &lt;&amp;main_udmap 0x4400&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 265 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 265 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 265 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 265 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp1: mcasp@2b10000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b10000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b18000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc401&gt;, &lt;&amp;main_udmap 0x4401&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 266 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 266 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 266 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 266 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp2: mcasp@2b20000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b20000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b28000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc402&gt;, &lt;&amp;main_udmap 0x4402&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 267 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 267 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 267 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 267 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp3: mcasp@2b30000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b30000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b38000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc403&gt;, &lt;&amp;main_udmap 0x4403&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 268 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 268 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 268 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 268 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcasp4: mcasp@2b40000 {</div><div class='add'>+		compatible = "ti,am33xx-mcasp-audio";</div><div class='add'>+		reg = &lt;0x00 0x02b40000 0x00 0x2000&gt;,</div><div class='add'>+		      &lt;0x00 0x02b48000 0x00 0x1000&gt;;</div><div class='add'>+		reg-names = "mpu","dat";</div><div class='add'>+		interrupts = &lt;GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+			     &lt;GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "tx", "rx";</div><div class='add'>+		dmas = &lt;&amp;main_udmap 0xc404&gt;, &lt;&amp;main_udmap 0x4404&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 269 0&gt;;</div><div class='add'>+		clock-names = "fck";</div><div class='add'>+		assigned-clocks = &lt;&amp;k3_clks 269 0&gt;;</div><div class='add'>+		assigned-clock-parents = &lt;&amp;k3_clks 269 1&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 269 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bist_main14: bist@33c0000 {</div><div class='add'>+		compatible = "ti,j784s4-bist";</div><div class='add'>+		reg = &lt;0x00 0x033c0000 0x00 0x400&gt;,</div><div class='add'>+		      &lt;0x00 0x0010c1a0 0x00 0x01c&gt;;</div><div class='add'>+		reg-names = "cfg", "ctrl_mmr";</div><div class='add'>+		clocks = &lt;&amp;k3_clks 237 7&gt;;</div><div class='add'>+		power-domains = &lt;&amp;k3_pds 237 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+		ti,sci-dev-id = &lt;234&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi<br/>index f603380fc91c..cc22bfb5f599 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi</a></div><div class='hunk'>@@ -1,13 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='ctx'> /*</div><div class='del'>- * Device Tree Source for J784S4 SoC Family MCU/WAKEUP Domain peripherals</div><div class='add'>+ * Device Tree Source for J784S4 and J742S2 SoC Family MCU/WAKEUP Domain peripherals</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> &amp;cbass_mcu_wakeup {</div><div class='ctx'> 	sms: system-controller@44083000 {</div><div class='del'>-		bootph-all;</div><div class='ctx'> 		compatible = "ti,k2g-sci";</div><div class='ctx'> 		ti,host-id = &lt;12&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +38,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_conf: bus@43000000 {</div><div class='del'>-		bootph-all;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -59,6 +57,8 @@</div><div class='ctx'> 		reg = &lt;0x00 0x43600000 0x00 0x10000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x44880000 0x00 0x20000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x44860000 0x00 0x20000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -76,7 +76,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_pmx0: pinctrl@4301c000 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		/* Proxy 0 addressing */</div><div class='ctx'> 		reg = &lt;0x00 0x4301c000 0x00 0x034&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_pmx1: pinctrl@4301c038 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		/* Proxy 0 addressing */</div><div class='ctx'> 		reg = &lt;0x00 0x4301c038 0x00 0x02c&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='hunk'>@@ -94,7 +94,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_pmx2: pinctrl@4301c068 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		/* Proxy 0 addressing */</div><div class='ctx'> 		reg = &lt;0x00 0x4301c068 0x00 0x120&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	wkup_pmx3: pinctrl@4301c190 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		/* Proxy 0 addressing */</div><div class='ctx'> 		reg = &lt;0x00 0x4301c190 0x00 0x004&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='hunk'>@@ -125,7 +125,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */</div><div class='ctx'> 	mcu_timerio_input: pinctrl@40f04200 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		reg = &lt;0x00 0x40f04200 0x00 0x28&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'> </div><div class='ctx'> 	/* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */</div><div class='ctx'> 	mcu_timerio_output: pinctrl@40f04280 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='add'>+		compatible = "ti,j7200-padconf", "pinctrl-single";</div><div class='ctx'> 		reg = &lt;0x00 0x40f04280 0x00 0x28&gt;;</div><div class='ctx'> 		#pinctrl-cells = &lt;1&gt;;</div><div class='ctx'> 		pinctrl-single,register-width = &lt;32&gt;;</div><div class='hunk'>@@ -172,13 +172,13 @@</div><div class='ctx'> 		assigned-clocks = &lt;&amp;k3_clks 35 2&gt;;</div><div class='ctx'> 		assigned-clock-parents = &lt;&amp;k3_clks 35 3&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 35 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		bootph-all;</div><div class='ctx'> 		ti,timer-pwm;</div><div class='ctx'> 		/* Non-MPU Firmware usage */</div><div class='ctx'> 		status = "reserved";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_timer1: timer@40410000 {</div><div class='del'>-		bootph-all;</div><div class='ctx'> 		compatible = "ti,am654-timer";</div><div class='ctx'> 		reg = &lt;0x00 0x40410000 0x00 0x400&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='hunk'>@@ -458,7 +458,6 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	mcu_navss: bus@28380000 {</div><div class='del'>-		bootph-all;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -515,6 +514,8 @@</div><div class='ctx'> 		reg = &lt;0x00 0x2a480000 0x00 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x2a380000 0x00 0x80000&gt;,</div><div class='ctx'> 		      &lt;0x00 0x2a400000 0x00 0x80000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Marked Disabled:</div><div class='ctx'> 		 * Node is incomplete as it is meant for bootloaders and</div><div class='hunk'>@@ -594,6 +595,7 @@</div><div class='ctx'> 		ranges = &lt;0x41000000 0x00 0x41000000 0x20000&gt;,</div><div class='ctx'> 			 &lt;0x41400000 0x00 0x41400000 0x20000&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 345 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core0: r5f@41000000 {</div><div class='ctx'> 			compatible = "ti,j721s2-r5f";</div><div class='hunk'>@@ -608,6 +610,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mcu_r5fss0_core1: r5f@41400000 {</div><div class='hunk'>@@ -623,6 +626,7 @@</div><div class='ctx'> 			ti,atcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,btcm-enable = &lt;1&gt;;</div><div class='ctx'> 			ti,loczrama = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -632,6 +636,7 @@</div><div class='ctx'> 		      &lt;0x00 0x42050000 0x00 0x350&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 243 TI_SCI_PD_SHARED&gt;;</div><div class='ctx'> 		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tscadc0: tscadc@40200000 {</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-thermal-common.dtsi<br/>index e3ef61c1658f..e3ef61c1658f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-thermal-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-thermal-common.dtsi</a></div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi<br/>new file mode 100644<br/>index 000000000000..455397227d4a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,350 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4/J742S2 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcu_r5fss0_core1_memory_region: memory@a1100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa1100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_dma_memory_region: memory@a2000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core0_memory_region: memory@a2100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa2100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_dma_memory_region: memory@a3000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss0_core1_memory_region: memory@a3100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa3100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_dma_memory_region: memory@a4000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core0_memory_region: memory@a4100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa4100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_dma_memory_region: memory@a5000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss1_core1_memory_region: memory@a5100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa5100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss2_core0_dma_memory_region: memory@a6000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss2_core0_memory_region: memory@a6100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa6100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss2_core1_dma_memory_region: memory@a7000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	main_r5fss2_core1_memory_region: memory@a7100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa7100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_dma_memory_region: memory@a8000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa8000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_0_memory_region: memory@a8100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa8100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_1_dma_memory_region: memory@a9000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa9000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_1_memory_region: memory@a9100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xa9100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_2_dma_memory_region: memory@aa000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xaa000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_2_memory_region: memory@aa100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xaa100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;436&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;432&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;428&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;424&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;420&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_c71_0: mbox-c71-0 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mbox_c71_1: mbox-c71-1 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster5 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	interrupts = &lt;416&gt;;</div><div class='add'>+</div><div class='add'>+	mbox_c71_2: mbox-c71-2 {</div><div class='add'>+		ti,mbox-rx = &lt;0 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;1 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Timers are used by Remoteproc firmware */</div><div class='add'>+&amp;main_timer0 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer1 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer2 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer3 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer4 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer5 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer6 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer7 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer8 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_timer9 {</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcu_r5fss0_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster0 &amp;mbox_mcu_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;mcu_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;mcu_r5fss0_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss0_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster1 &amp;mbox_main_r5fss0_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss0_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss0_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss1_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster2 &amp;mbox_main_r5fss1_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss1_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss1_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss2 {</div><div class='add'>+	ti,cluster-mode = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss2_core0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss2_core0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss2_core0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;main_r5fss2_core1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster3 &amp;mbox_main_r5fss2_core1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;main_r5fss2_core1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;main_r5fss2_core1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_0&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_0_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_0_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster4 &amp;mbox_c71_1&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_1_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_1_memory_region&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_2&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_2_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_2_memory_region&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi<br/>index e73bb750b09a..0160fe0da983 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi</a></div><div class='hunk'>@@ -5,1110 +5,17 @@</div><div class='ctx'>  * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/mux/mux.h&gt;</div><div class='del'>-#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='del'>-#include &lt;dt-bindings/phy/phy-ti.h&gt;</div><div class='del'>-</div><div class='del'>-#include "k3-serdes.h"</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	serdes_refclk: clock-serdes {</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		/* To be enabled when serdes_wiz* is functional */</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;cbass_main {</div><div class='del'>-	msmc_ram: sram@70000000 {</div><div class='del'>-		compatible = "mmio-sram";</div><div class='del'>-		reg = &lt;0x00 0x70000000 0x00 0x800000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x00 0x70000000 0x800000&gt;;</div><div class='del'>-</div><div class='del'>-		atf-sram@0 {</div><div class='del'>-			reg = &lt;0x00 0x20000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		tifs-sram@1f0000 {</div><div class='del'>-			reg = &lt;0x1f0000 0x10000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		l3cache-sram@200000 {</div><div class='del'>-			reg = &lt;0x200000 0x200000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	scm_conf: bus@100000 {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		reg = &lt;0x00 0x00100000 0x00 0x1c000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x00 0x00100000 0x1c000&gt;;</div><div class='del'>-</div><div class='del'>-		cpsw1_phy_gmii_sel: phy@4034 {</div><div class='del'>-			compatible = "ti,am654-phy-gmii-sel";</div><div class='del'>-			reg = &lt;0x4034 0x4&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpsw0_phy_gmii_sel: phy@4044 {</div><div class='del'>-			compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";</div><div class='del'>-			reg = &lt;0x4044 0x20&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-			ti,qsgmii-main-ports = &lt;7&gt;, &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie0_ctrl: pcie0-ctrl@4070 {</div><div class='del'>-			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x4070 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie1_ctrl: pcie1-ctrl@4074 {</div><div class='del'>-			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x4074 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie2_ctrl: pcie2-ctrl@4078 {</div><div class='del'>-			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x4078 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pcie3_ctrl: pcie3-ctrl@407c {</div><div class='del'>-			compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='del'>-			reg = &lt;0x407c 0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		serdes_ln_ctrl: mux-controller@4080 {</div><div class='del'>-			compatible = "reg-mux";</div><div class='del'>-			reg = &lt;0x00004080 0x30&gt;;</div><div class='del'>-			#mux-control-cells = &lt;1&gt;;</div><div class='del'>-			mux-reg-masks = &lt;0x0 0x3&gt;, &lt;0x4 0x3&gt;, /* SERDES0 lane0/1 select */</div><div class='del'>-					&lt;0x8 0x3&gt;, &lt;0xc 0x3&gt;, /* SERDES0 lane2/3 select */</div><div class='del'>-					&lt;0x10 0x3&gt;, &lt;0x14 0x3&gt;, /* SERDES1 lane0/1 select */</div><div class='del'>-					&lt;0x18 0x3&gt;, &lt;0x1c 0x3&gt;, /* SERDES1 lane2/3 select */</div><div class='del'>-					&lt;0x20 0x3&gt;, &lt;0x24 0x3&gt;, /* SERDES2 lane0/1 select */</div><div class='del'>-					&lt;0x28 0x3&gt;, &lt;0x2c 0x3&gt;; /* SERDES2 lane2/3 select */</div><div class='del'>-			idle-states = &lt;J784S4_SERDES0_LANE0_PCIE1_LANE0&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES0_LANE1_PCIE1_LANE1&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES0_LANE2_IP3_UNUSED&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES0_LANE3_USB&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES1_LANE0_PCIE0_LANE0&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES1_LANE1_PCIE0_LANE1&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES1_LANE2_PCIE0_LANE2&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES1_LANE3_PCIE0_LANE3&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES2_LANE0_IP2_UNUSED&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES2_LANE1_IP2_UNUSED&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES2_LANE2_QSGMII_LANE1&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES2_LANE3_QSGMII_LANE2&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES4_LANE0_EDP_LANE0&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES4_LANE1_EDP_LANE1&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES4_LANE2_EDP_LANE2&gt;,</div><div class='del'>-				      &lt;J784S4_SERDES4_LANE3_EDP_LANE3&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb_serdes_mux: mux-controller@4000 {</div><div class='del'>-			compatible = "reg-mux";</div><div class='del'>-			reg = &lt;0x4000 0x4&gt;;</div><div class='del'>-			#mux-control-cells = &lt;1&gt;;</div><div class='del'>-			mux-reg-masks = &lt;0x0 0x8000000&gt;; /* USB0 to SERDES0 lane 3 mux */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ehrpwm_tbclk: clock-controller@4140 {</div><div class='del'>-			compatible = "ti,am654-ehrpwm-tbclk";</div><div class='del'>-			reg = &lt;0x4140 0x18&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		audio_refclk1: clock@82e4 {</div><div class='del'>-			compatible = "ti,am62-audio-refclk";</div><div class='del'>-			reg = &lt;0x82e4 0x4&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 157 34&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;k3_clks 157 34&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;k3_clks 157 63&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm0: pwm@3000000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3000000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 0&gt;, &lt;&amp;k3_clks 219 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 219 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm1: pwm@3010000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3010000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 1&gt;, &lt;&amp;k3_clks 220 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 220 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm2: pwm@3020000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3020000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 2&gt;, &lt;&amp;k3_clks 221 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 221 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm3: pwm@3030000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3030000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 3&gt;, &lt;&amp;k3_clks 222 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 222 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm4: pwm@3040000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3040000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 4&gt;, &lt;&amp;k3_clks 223 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 223 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_ehrpwm5: pwm@3050000 {</div><div class='del'>-		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";</div><div class='del'>-		reg = &lt;0x00 0x3050000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;ehrpwm_tbclk 5&gt;, &lt;&amp;k3_clks 224 0&gt;;</div><div class='del'>-		clock-names = "tbclk", "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 224 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gic500: interrupt-controller@1800000 {</div><div class='del'>-		compatible = "arm,gic-v3";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0x00 0x01800000 0x00 0x200000&gt;, /* GICD */</div><div class='del'>-		      &lt;0x00 0x01900000 0x00 0x100000&gt;, /* GICR */</div><div class='del'>-		      &lt;0x00 0x6f000000 0x00 0x2000&gt;,   /* GICC */</div><div class='del'>-		      &lt;0x00 0x6f010000 0x00 0x1000&gt;,   /* GICH */</div><div class='del'>-		      &lt;0x00 0x6f020000 0x00 0x2000&gt;;   /* GICV */</div><div class='del'>-</div><div class='del'>-		/* vcpumntirq: virtual CPU interface maintenance interrupt */</div><div class='del'>-		interrupts = &lt;GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		gic_its: msi-controller@1820000 {</div><div class='del'>-			compatible = "arm,gic-v3-its";</div><div class='del'>-			reg = &lt;0x00 0x01820000 0x00 0x10000&gt;;</div><div class='del'>-			socionext,synquacer-pre-its = &lt;0x1000000 0x400000&gt;;</div><div class='del'>-			msi-controller;</div><div class='del'>-			#msi-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio_intr: interrupt-controller@a00000 {</div><div class='del'>-		compatible = "ti,sci-intr";</div><div class='del'>-		reg = &lt;0x00 0x00a00000 0x00 0x800&gt;;</div><div class='del'>-		ti,intr-trigger-type = &lt;1&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	c71_3: dsp@67800000 {</div><div class='add'>+		compatible = "ti,j721s2-c71-dsp";</div><div class='add'>+		reg = &lt;0x00 0x67800000 0x00 0x00080000&gt;,</div><div class='add'>+		      &lt;0x00 0x67e00000 0x00 0x0000c000&gt;;</div><div class='add'>+		reg-names = "l2sram", "l1dram";</div><div class='add'>+		resets = &lt;&amp;k3_reset 40 1&gt;;</div><div class='add'>+		firmware-name = "j784s4-c71_3-fw";</div><div class='ctx'> 		ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;10&gt;;</div><div class='del'>-		ti,interrupt-ranges = &lt;8 392 56&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_pmx0: pinctrl@11c000 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='del'>-		/* Proxy 0 addressing */</div><div class='del'>-		reg = &lt;0x00 0x11c000 0x00 0x120&gt;;</div><div class='del'>-		#pinctrl-cells = &lt;1&gt;;</div><div class='del'>-		pinctrl-single,register-width = &lt;32&gt;;</div><div class='del'>-		pinctrl-single,function-mask = &lt;0xffffffff&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */</div><div class='del'>-	main_timerio_input: pinctrl@104200 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='del'>-		reg = &lt;0x00 0x104200 0x00 0x50&gt;;</div><div class='del'>-		#pinctrl-cells = &lt;1&gt;;</div><div class='del'>-		pinctrl-single,register-width = &lt;32&gt;;</div><div class='del'>-		pinctrl-single,function-mask = &lt;0x00000007&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */</div><div class='del'>-	main_timerio_output: pinctrl@104280 {</div><div class='del'>-		compatible = "pinctrl-single";</div><div class='del'>-		reg = &lt;0x00 0x104280 0x00 0x20&gt;;</div><div class='del'>-		#pinctrl-cells = &lt;1&gt;;</div><div class='del'>-		pinctrl-single,register-width = &lt;32&gt;;</div><div class='del'>-		pinctrl-single,function-mask = &lt;0x0000001f&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_crypto: crypto@4e00000 {</div><div class='del'>-		compatible = "ti,j721e-sa2ul";</div><div class='del'>-		reg = &lt;0x00 0x4e00000 0x00 0x1200&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 369 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000&gt;;</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xca40&gt;, &lt;&amp;main_udmap 0x4a40&gt;,</div><div class='del'>-				&lt;&amp;main_udmap 0x4a41&gt;;</div><div class='del'>-		dma-names = "tx", "rx1", "rx2";</div><div class='del'>-</div><div class='del'>-		rng: rng@4e10000 {</div><div class='del'>-			compatible = "inside-secure,safexcel-eip76";</div><div class='del'>-			reg = &lt;0x00 0x4e10000 0x00 0x7d&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer0: timer@2400000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2400000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 97 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 97 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 97 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 97 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer1: timer@2410000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2410000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 98 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 98 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 98 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 98 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer2: timer@2420000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2420000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 99 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 99 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 99 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 99 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer3: timer@2430000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2430000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 100 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 100 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 100 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 100 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer4: timer@2440000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2440000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 101 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 101 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 101 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 101 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer5: timer@2450000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2450000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 102 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 102 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 102 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 102 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer6: timer@2460000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2460000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 103 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 103 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 103 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 103 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer7: timer@2470000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2470000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 104 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 104 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 104 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 104 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer8: timer@2480000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2480000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 105 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 105 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 105 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 105 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer9: timer@2490000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2490000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 106 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 106 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 106 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 106 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer10: timer@24a0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24a0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 107 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 107 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 107 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 107 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer11: timer@24b0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24b0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 108 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 108 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 108 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 108 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer12: timer@24c0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24c0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 109 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 109 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 109 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 109 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer13: timer@24d0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24d0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 110 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 110 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 110 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 110 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer14: timer@24e0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24e0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 111 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 111 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 111 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 111 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer15: timer@24f0000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x24f0000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 112 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 112 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 112 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 112 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer16: timer@2500000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2500000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 113 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 113 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 113 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 113 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer17: timer@2510000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2510000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 114 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 114 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 114 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 114 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer18: timer@2520000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2520000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 115 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 115 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 115 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 115 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_timer19: timer@2530000 {</div><div class='del'>-		compatible = "ti,am654-timer";</div><div class='del'>-		reg = &lt;0x00 0x2530000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 116 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 116 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 116 3&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 116 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		ti,timer-pwm;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart0: serial@2800000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02800000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 146 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 146 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart1: serial@2810000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02810000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 388 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 388 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart2: serial@2820000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02820000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 389 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 389 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart3: serial@2830000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02830000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 390 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 390 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart4: serial@2840000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02840000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 391 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 391 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart5: serial@2850000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02850000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 392 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 392 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart6: serial@2860000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02860000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 393 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 393 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart7: serial@2870000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02870000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 394 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 394 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart8: serial@2880000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02880000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 395 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 395 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_uart9: serial@2890000 {</div><div class='del'>-		compatible = "ti,j721e-uart", "ti,am654-uart";</div><div class='del'>-		reg = &lt;0x00 0x02890000 0x00 0x200&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 396 0&gt;;</div><div class='del'>-		clock-names = "fclk";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 396 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio0: gpio@600000 {</div><div class='del'>-		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='del'>-		reg = &lt;0x00 0x00600000 0x00 0x100&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='del'>-		interrupts = &lt;145&gt;, &lt;146&gt;, &lt;147&gt;, &lt;148&gt;, &lt;149&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		ti,ngpio = &lt;66&gt;;</div><div class='del'>-		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 163 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 163 0&gt;;</div><div class='del'>-		clock-names = "gpio";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio2: gpio@610000 {</div><div class='del'>-		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='del'>-		reg = &lt;0x00 0x00610000 0x00 0x100&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='del'>-		interrupts = &lt;154&gt;, &lt;155&gt;, &lt;156&gt;, &lt;157&gt;, &lt;158&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		ti,ngpio = &lt;66&gt;;</div><div class='del'>-		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 164 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 164 0&gt;;</div><div class='del'>-		clock-names = "gpio";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio4: gpio@620000 {</div><div class='del'>-		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='del'>-		reg = &lt;0x00 0x00620000 0x00 0x100&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='del'>-		interrupts = &lt;163&gt;, &lt;164&gt;, &lt;165&gt;, &lt;166&gt;, &lt;167&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		ti,ngpio = &lt;66&gt;;</div><div class='del'>-		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 165 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 165 0&gt;;</div><div class='del'>-		clock-names = "gpio";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_gpio6: gpio@630000 {</div><div class='del'>-		compatible = "ti,j721e-gpio", "ti,keystone-gpio";</div><div class='del'>-		reg = &lt;0x00 0x00630000 0x00 0x100&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;main_gpio_intr&gt;;</div><div class='del'>-		interrupts = &lt;172&gt;, &lt;173&gt;, &lt;174&gt;, &lt;175&gt;, &lt;176&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		ti,ngpio = &lt;66&gt;;</div><div class='del'>-		ti,davinci-gpio-unbanked = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 166 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 166 0&gt;;</div><div class='del'>-		clock-names = "gpio";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usbss0: usb@4104000 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "ti,j721e-usb";</div><div class='del'>-		reg = &lt;0x00 0x4104000 0x00 0x100&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 398 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 398 21&gt;, &lt;&amp;k3_clks 398 2&gt;;</div><div class='del'>-		clock-names = "ref", "lpm";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 398 21&gt;;    /* USB2_REFCLK */</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 398 22&gt;; /* HFOSC0 */</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		status = "disabled"; /* Needs lane config */</div><div class='del'>-</div><div class='del'>-		usb0: usb@6000000 {</div><div class='del'>-			bootph-all;</div><div class='del'>-			compatible = "cdns,usb3";</div><div class='del'>-			reg = &lt;0x00 0x6000000 0x00 0x10000&gt;,</div><div class='del'>-			      &lt;0x00 0x6010000 0x00 0x10000&gt;,</div><div class='del'>-			      &lt;0x00 0x6020000 0x00 0x10000&gt;;</div><div class='del'>-			reg-names = "otg", "xhci", "dev";</div><div class='del'>-			interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,  /* irq.0 */</div><div class='del'>-				     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;, /* irq.6 */</div><div class='del'>-				     &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;; /* otgirq.0 */</div><div class='del'>-			interrupt-names = "host",</div><div class='del'>-					  "peripheral",</div><div class='del'>-					  "otg";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c0: i2c@2000000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02000000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 270 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 270 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c1: i2c@2010000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02010000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 271 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 271 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c2: i2c@2020000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02020000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 272 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 272 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c3: i2c@2030000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02030000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 273 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 273 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c4: i2c@2040000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02040000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 274 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 274 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c5: i2c@2050000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02050000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 275 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 275 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_i2c6: i2c@2060000 {</div><div class='del'>-		compatible = "ti,j721e-i2c", "ti,omap4-i2c";</div><div class='del'>-		reg = &lt;0x00 0x02060000 0x00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 276 2&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 276 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ti_csi2rx0: ticsi2rx@4500000 {</div><div class='del'>-		compatible = "ti,j721e-csi2rx-shim";</div><div class='del'>-		reg = &lt;0x00 0x04500000 0x00 0x00001000&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		dmas = &lt;&amp;main_bcdma_csi 0 0x4940 0&gt;;</div><div class='del'>-		dma-names = "rx0";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 72 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		cdns_csi2rx0: csi-bridge@4504000 {</div><div class='del'>-			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='del'>-			reg = &lt;0x00 0x04504000 0x00 0x00001000&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 72 2&gt;, &lt;&amp;k3_clks 72 0&gt;, &lt;&amp;k3_clks 72 2&gt;,</div><div class='del'>-				&lt;&amp;k3_clks 72 2&gt;, &lt;&amp;k3_clks 72 3&gt;, &lt;&amp;k3_clks 72 3&gt;;</div><div class='del'>-			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='del'>-				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='del'>-			phys = &lt;&amp;dphy0&gt;;</div><div class='del'>-			phy-names = "dphy";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				csi0_port0: port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi0_port1: port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi0_port2: port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi0_port3: port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi0_port4: port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ti_csi2rx1: ticsi2rx@4510000 {</div><div class='del'>-		compatible = "ti,j721e-csi2rx-shim";</div><div class='del'>-		reg = &lt;0x00 0x04510000 0x00 0x1000&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		dmas = &lt;&amp;main_bcdma_csi 0 0x4960 0&gt;;</div><div class='del'>-		dma-names = "rx0";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 73 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		cdns_csi2rx1: csi-bridge@4514000 {</div><div class='del'>-			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='del'>-			reg = &lt;0x00 0x04514000 0x00 0x00001000&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 73 2&gt;, &lt;&amp;k3_clks 73 0&gt;, &lt;&amp;k3_clks 73 2&gt;,</div><div class='del'>-				&lt;&amp;k3_clks 73 2&gt;, &lt;&amp;k3_clks 73 3&gt;, &lt;&amp;k3_clks 73 3&gt;;</div><div class='del'>-			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='del'>-				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='del'>-			phys = &lt;&amp;dphy1&gt;;</div><div class='del'>-			phy-names = "dphy";</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				csi1_port0: port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi1_port1: port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi1_port2: port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi1_port3: port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi1_port4: port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ti_csi2rx2: ticsi2rx@4520000 {</div><div class='del'>-		compatible = "ti,j721e-csi2rx-shim";</div><div class='del'>-		reg = &lt;0x00 0x04520000 0x00 0x00001000&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		dmas = &lt;&amp;main_bcdma_csi 0 0x4980 0&gt;;</div><div class='del'>-		dma-names = "rx0";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 74 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		cdns_csi2rx2: csi-bridge@4524000 {</div><div class='del'>-			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";</div><div class='del'>-			reg = &lt;0x00 0x04524000 0x00 0x00001000&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 74 2&gt;, &lt;&amp;k3_clks 74 0&gt;, &lt;&amp;k3_clks 74 2&gt;,</div><div class='del'>-				&lt;&amp;k3_clks 74 2&gt;, &lt;&amp;k3_clks 74 3&gt;, &lt;&amp;k3_clks 74 3&gt;;</div><div class='del'>-			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",</div><div class='del'>-				"pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";</div><div class='del'>-			phys = &lt;&amp;dphy2&gt;;</div><div class='del'>-			phy-names = "dphy";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				csi2_port0: port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi2_port1: port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi2_port2: port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi2_port3: port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				csi2_port4: port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					status = "disabled";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dphy0: phy@4580000 {</div><div class='del'>-		compatible = "cdns,dphy-rx";</div><div class='del'>-		reg = &lt;0x00 0x04580000 0x00 0x00001100&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 212 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dphy1: phy@4590000 {</div><div class='del'>-		compatible = "cdns,dphy-rx";</div><div class='del'>-		reg = &lt;0x00 0x04590000 0x00 0x00001100&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 213 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dphy2: phy@45a0000 {</div><div class='del'>-		compatible = "cdns,dphy-rx";</div><div class='del'>-		reg = &lt;0x00 0x045a0000 0x00 0x00001100&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 214 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vpu0: video-codec@4210000 {</div><div class='del'>-		compatible = "ti,j721s2-wave521c", "cnm,wave521c";</div><div class='del'>-		reg = &lt;0x00 0x4210000 0x00 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 241 2&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 241 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	vpu1: video-codec@4220000 {</div><div class='del'>-		compatible = "ti,j721s2-wave521c", "cnm,wave521c";</div><div class='del'>-		reg = &lt;0x00 0x4220000 0x00 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 242 2&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 242 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_sdhci0: mmc@4f80000 {</div><div class='del'>-		compatible = "ti,j721e-sdhci-8bit";</div><div class='del'>-		reg = &lt;0x00 0x04f80000 0x00 0x1000&gt;,</div><div class='del'>-		      &lt;0x00 0x04f88000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 140 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 140 1&gt;, &lt;&amp;k3_clks 140 2&gt;;</div><div class='del'>-		clock-names = "clk_ahb", "clk_xin";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 140 2&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 140 3&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-mmc-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr52 = &lt;0x6&gt;;</div><div class='del'>-		ti,otap-del-sel-hs200 = &lt;0x8&gt;;</div><div class='del'>-		ti,otap-del-sel-hs400 = &lt;0x5&gt;;</div><div class='del'>-		ti,itap-del-sel-legacy = &lt;0x10&gt;;</div><div class='del'>-		ti,itap-del-sel-mmc-hs = &lt;0xa&gt;;</div><div class='del'>-		ti,strobe-sel = &lt;0x77&gt;;</div><div class='del'>-		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,trm-icp = &lt;0x8&gt;;</div><div class='del'>-		mmc-ddr-1_8v;</div><div class='del'>-		mmc-hs200-1_8v;</div><div class='del'>-		mmc-hs400-1_8v;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_sdhci1: mmc@4fb0000 {</div><div class='del'>-		compatible = "ti,j721e-sdhci-4bit";</div><div class='del'>-		reg = &lt;0x00 0x04fb0000 0x00 0x1000&gt;,</div><div class='del'>-		      &lt;0x00 0x04fb8000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 141 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 141 3&gt;, &lt;&amp;k3_clks 141 4&gt;;</div><div class='del'>-		clock-names = "clk_ahb", "clk_xin";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 141 4&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 141 5&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		ti,otap-del-sel-legacy = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr12 = &lt;0xf&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr25 = &lt;0xf&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr50 = &lt;0xc&gt;;</div><div class='del'>-		ti,otap-del-sel-sdr104 = &lt;0x5&gt;;</div><div class='del'>-		ti,otap-del-sel-ddr50 = &lt;0xc&gt;;</div><div class='del'>-		ti,itap-del-sel-legacy = &lt;0x0&gt;;</div><div class='del'>-		ti,itap-del-sel-sd-hs = &lt;0x0&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr12 = &lt;0x0&gt;;</div><div class='del'>-		ti,itap-del-sel-sdr25 = &lt;0x0&gt;;</div><div class='del'>-		ti,itap-del-sel-ddr50 = &lt;0x2&gt;;</div><div class='del'>-		ti,clkbuf-sel = &lt;0x7&gt;;</div><div class='del'>-		ti,trm-icp = &lt;0x8&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie0_rc: pcie@2900000 {</div><div class='del'>-		compatible = "ti,j784s4-pcie-host";</div><div class='del'>-		reg = &lt;0x00 0x02900000 0x00 0x1000&gt;,</div><div class='del'>-		      &lt;0x00 0x02907000 0x00 0x400&gt;,</div><div class='del'>-		      &lt;0x00 0x0d000000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x10000000 0x00 0x00001000&gt;;</div><div class='del'>-		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='del'>-		interrupt-names = "link_state";</div><div class='del'>-		interrupts = &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;pcie0_ctrl 0x0&gt;;</div><div class='del'>-		max-link-speed = &lt;3&gt;;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 332 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 332 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-		vendor-id = &lt;0x104c&gt;;</div><div class='del'>-		device-id = &lt;0xb012&gt;;</div><div class='del'>-		msi-map = &lt;0x0 &amp;gic_its 0x0 0x10000&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x10001000 0x0 0x10001000 0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x10011000 0x0 0x10011000 0x0 0x7fef000&gt;;</div><div class='del'>-		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie1_rc: pcie@2910000 {</div><div class='del'>-		compatible = "ti,j784s4-pcie-host";</div><div class='del'>-		reg = &lt;0x00 0x02910000 0x00 0x1000&gt;,</div><div class='del'>-		      &lt;0x00 0x02917000 0x00 0x400&gt;,</div><div class='del'>-		      &lt;0x00 0x0d800000 0x00 0x00800000&gt;,</div><div class='del'>-		      &lt;0x00 0x18000000 0x00 0x00001000&gt;;</div><div class='del'>-		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='del'>-		interrupt-names = "link_state";</div><div class='del'>-		interrupts = &lt;GIC_SPI 330 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;pcie1_ctrl 0x0&gt;;</div><div class='del'>-		max-link-speed = &lt;3&gt;;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 333 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 333 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-		vendor-id = &lt;0x104c&gt;;</div><div class='del'>-		device-id = &lt;0xb012&gt;;</div><div class='del'>-		msi-map = &lt;0x0 &amp;gic_its 0x10000 0x10000&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x18001000  0x00 0x18001000  0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x18011000  0x00 0x18011000  0x0 0x7fef000&gt;;</div><div class='del'>-		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='add'>+		ti,sci-dev-id = &lt;40&gt;;</div><div class='add'>+		ti,sci-proc-ids = &lt;0x33 0xff&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1118,11 +25,12 @@</div><div class='ctx'> 		      &lt;0x00 0x02927000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0e000000 0x00 0x00800000&gt;,</div><div class='ctx'> 		      &lt;0x44 0x00000000 0x00 0x00001000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x0 0x00001000 0x44 0x00001000 0x0 0x0010000&gt;,</div><div class='add'>+			 &lt;0x02000000 0x0 0x00011000 0x44 0x00011000 0x0 0x7fef000&gt;;</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 342 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;pcie2_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 334 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1135,9 +43,8 @@</div><div class='ctx'> 		device-id = &lt;0xb012&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x20000 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x00001000 0x44 0x00001000 0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x00011000 0x44 0x00011000 0x0 0x7fef000&gt;;</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie2_ctrl 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1147,11 +54,12 @@</div><div class='ctx'> 		      &lt;0x00 0x02937000 0x00 0x400&gt;,</div><div class='ctx'> 		      &lt;0x00 0x0e800000 0x00 0x00800000&gt;,</div><div class='ctx'> 		      &lt;0x44 0x10000000 0x00 0x00001000&gt;;</div><div class='add'>+		ranges = &lt;0x01000000 0x0 0x00001000 0x44 0x10001000 0x0 0x0010000&gt;,</div><div class='add'>+			 &lt;0x02000000 0x0 0x00011000 0x44 0x10011000 0x0 0x7fef000&gt;;</div><div class='ctx'> 		reg-names = "intd_cfg", "user_cfg", "reg", "cfg";</div><div class='ctx'> 		interrupt-names = "link_state";</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 354 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		ti,syscon-pcie-ctrl = &lt;&amp;pcie3_ctrl 0x0&gt;;</div><div class='ctx'> 		max-link-speed = &lt;3&gt;;</div><div class='ctx'> 		num-lanes = &lt;2&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 335 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1164,88 +72,14 @@</div><div class='ctx'> 		device-id = &lt;0xb012&gt;;</div><div class='ctx'> 		msi-map = &lt;0x0 &amp;gic_its 0x30000 0x10000&gt;;</div><div class='ctx'> 		dma-coherent;</div><div class='del'>-		ranges = &lt;0x01000000 0x0 0x00001000 0x44 0x10001000 0x0 0x0010000&gt;,</div><div class='del'>-			 &lt;0x02000000 0x0 0x00011000 0x44 0x10011000 0x0 0x7fef000&gt;;</div><div class='ctx'> 		dma-ranges = &lt;0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0&gt;;</div><div class='add'>+		ti,syscon-pcie-ctrl = &lt;&amp;pcie3_ctrl 0x0&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serdes_wiz0: wiz@5060000 {</div><div class='del'>-		compatible = "ti,j784s4-wiz-10g";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 404 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 404 2&gt;, &lt;&amp;k3_clks 404 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 404 5&gt;;</div><div class='del'>-		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 404 6&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 404 10&gt;;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x5060000 0x00 0x5060000 0x10000&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		serdes0: serdes@5060000 {</div><div class='del'>-			compatible = "ti,j721e-serdes-10g";</div><div class='del'>-			reg = &lt;0x05060000 0x010000&gt;;</div><div class='del'>-			reg-names = "torrent_phy";</div><div class='del'>-			resets = &lt;&amp;serdes_wiz0 0&gt;;</div><div class='del'>-			reset-names = "torrent_reset";</div><div class='del'>-			clocks = &lt;&amp;serdes_wiz0 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-				 &lt;&amp;serdes_wiz0 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='del'>-			clock-names = "refclk", "phy_en_refclk";</div><div class='del'>-			assigned-clocks = &lt;&amp;serdes_wiz0 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz0 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz0 TI_WIZ_REFCLK_DIG&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;k3_clks 404 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 404 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 404 6&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serdes_wiz1: wiz@5070000 {</div><div class='del'>-		compatible = "ti,j784s4-wiz-10g";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 405 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 405 2&gt;, &lt;&amp;k3_clks 405 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 405 5&gt;;</div><div class='del'>-		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 405 6&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 405 10&gt;;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x05070000 0x00 0x05070000 0x10000&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		serdes1: serdes@5070000 {</div><div class='del'>-			compatible = "ti,j721e-serdes-10g";</div><div class='del'>-			reg = &lt;0x05070000 0x010000&gt;;</div><div class='del'>-			reg-names = "torrent_phy";</div><div class='del'>-			resets = &lt;&amp;serdes_wiz1 0&gt;;</div><div class='del'>-			reset-names = "torrent_reset";</div><div class='del'>-			clocks = &lt;&amp;serdes_wiz1 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-				 &lt;&amp;serdes_wiz1 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='del'>-			clock-names = "refclk", "phy_en_refclk";</div><div class='del'>-			assigned-clocks = &lt;&amp;serdes_wiz1 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz1 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz1 TI_WIZ_REFCLK_DIG&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;k3_clks 405 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 405 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 405 6&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	serdes_wiz2: wiz@5020000 {</div><div class='ctx'> 		compatible = "ti,j784s4-wiz-10g";</div><div class='add'>+		ranges = &lt;0x05020000 0x00 0x05020000 0x10000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		power-domains = &lt;&amp;k3_pds 406 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='hunk'>@@ -1256,7 +90,6 @@</div><div class='ctx'> 		num-lanes = &lt;4&gt;;</div><div class='ctx'> 		#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		#clock-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x05020000 0x00 0x05020000 0x10000&gt;;</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 		serdes2: serdes@5020000 {</div><div class='hunk'>@@ -1280,1506 +113,16 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	serdes_wiz4: wiz@5050000 {</div><div class='del'>-		compatible = "ti,j784s4-wiz-10g";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 407 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 407 2&gt;, &lt;&amp;k3_clks 407 6&gt;, &lt;&amp;serdes_refclk&gt;, &lt;&amp;k3_clks 407 5&gt;;</div><div class='del'>-		clock-names = "fck", "core_ref_clk", "ext_ref_clk", "core_ref1_clk";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 407 6&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 407 10&gt;;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x05050000 0x00 0x05050000 0x10000&gt;,</div><div class='del'>-			 &lt;0xa030a00 0x00 0xa030a00 0x40&gt;; /* DPTX PHY */</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		serdes4: serdes@5050000 {</div><div class='del'>-			/*</div><div class='del'>-			 * Note: we also map DPTX PHY registers as the Torrent</div><div class='del'>-			 * needs to manage those.</div><div class='del'>-			 */</div><div class='del'>-			compatible = "ti,j721e-serdes-10g";</div><div class='del'>-			reg = &lt;0x05050000 0x010000&gt;,</div><div class='del'>-			      &lt;0x0a030a00 0x40&gt;; /* DPTX PHY */</div><div class='del'>-			reg-names = "torrent_phy";</div><div class='del'>-			resets = &lt;&amp;serdes_wiz4 0&gt;;</div><div class='del'>-			reset-names = "torrent_reset";</div><div class='del'>-			clocks = &lt;&amp;serdes_wiz4 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-				 &lt;&amp;serdes_wiz4 TI_WIZ_PHY_EN_REFCLK&gt;;</div><div class='del'>-			clock-names = "refclk", "phy_en_refclk";</div><div class='del'>-			assigned-clocks = &lt;&amp;serdes_wiz4 TI_WIZ_PLL0_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz4 TI_WIZ_PLL1_REFCLK&gt;,</div><div class='del'>-					  &lt;&amp;serdes_wiz4 TI_WIZ_REFCLK_DIG&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;k3_clks 407 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 407 6&gt;,</div><div class='del'>-						 &lt;&amp;k3_clks 407 6&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_navss: bus@30000000 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;280&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		dma-ranges;</div><div class='del'>-</div><div class='del'>-		main_navss_intr: interrupt-controller@310e0000 {</div><div class='del'>-			compatible = "ti,sci-intr";</div><div class='del'>-			reg = &lt;0x00 0x310e0000 0x00 0x4000&gt;;</div><div class='del'>-			ti,intr-trigger-type = &lt;4&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;283&gt;;</div><div class='del'>-			ti,interrupt-ranges = &lt;0 64 64&gt;,</div><div class='del'>-					      &lt;64 448 64&gt;,</div><div class='del'>-					      &lt;128 672 64&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_udmass_inta: msi-controller@33d00000 {</div><div class='del'>-			compatible = "ti,sci-inta";</div><div class='del'>-			reg = &lt;0x00 0x33d00000 0x00 0x100000&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;0&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			msi-controller;</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;321&gt;;</div><div class='del'>-			ti,interrupt-ranges = &lt;0 0 256&gt;;</div><div class='del'>-			ti,unmapped-event-sources = &lt;&amp;main_bcdma_csi&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		secure_proxy_main: mailbox@32c00000 {</div><div class='del'>-			bootph-all;</div><div class='del'>-			compatible = "ti,am654-secure-proxy";</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			reg-names = "target_data", "rt", "scfg";</div><div class='del'>-			reg = &lt;0x00 0x32c00000 0x00 0x100000&gt;,</div><div class='del'>-			      &lt;0x00 0x32400000 0x00 0x100000&gt;,</div><div class='del'>-			      &lt;0x00 0x32800000 0x00 0x100000&gt;;</div><div class='del'>-			interrupt-names = "rx_011";</div><div class='del'>-			interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hwspinlock: hwlock@30e00000 {</div><div class='del'>-			compatible = "ti,am654-hwspinlock";</div><div class='del'>-			reg = &lt;0x00 0x30e00000 0x00 0x1000&gt;;</div><div class='del'>-			#hwlock-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster0: mailbox@31f80000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f80000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster1: mailbox@31f81000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f81000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster2: mailbox@31f82000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f82000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster3: mailbox@31f83000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f83000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster4: mailbox@31f84000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f84000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster5: mailbox@31f85000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f85000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster6: mailbox@31f86000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f86000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster7: mailbox@31f87000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f87000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster8: mailbox@31f88000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f88000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster9: mailbox@31f89000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f89000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster10: mailbox@31f8a000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f8a000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox0_cluster11: mailbox@31f8b000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f8b000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster0: mailbox@31f90000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f90000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster1: mailbox@31f91000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f91000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster2: mailbox@31f92000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f92000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster3: mailbox@31f93000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f93000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster4: mailbox@31f94000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f94000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster5: mailbox@31f95000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f95000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster6: mailbox@31f96000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f96000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster7: mailbox@31f97000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f97000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster8: mailbox@31f98000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f98000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster9: mailbox@31f99000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f99000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster10: mailbox@31f9a000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f9a000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mailbox1_cluster11: mailbox@31f9b000 {</div><div class='del'>-			compatible = "ti,am654-mailbox";</div><div class='del'>-			reg = &lt;0x00 0x31f9b000 0x00 0x200&gt;;</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			ti,mbox-num-users = &lt;4&gt;;</div><div class='del'>-			ti,mbox-num-fifos = &lt;16&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;main_navss_intr&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_ringacc: ringacc@3c000000 {</div><div class='del'>-			compatible = "ti,am654-navss-ringacc";</div><div class='del'>-			reg = &lt;0x00 0x3c000000 0x00 0x400000&gt;,</div><div class='del'>-			      &lt;0x00 0x38000000 0x00 0x400000&gt;,</div><div class='del'>-			      &lt;0x00 0x31120000 0x00 0x100&gt;,</div><div class='del'>-			      &lt;0x00 0x33000000 0x00 0x40000&gt;,</div><div class='del'>-			      &lt;0x00 0x31080000 0x00 0x40000&gt;;</div><div class='del'>-			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";</div><div class='del'>-			ti,num-rings = &lt;1024&gt;;</div><div class='del'>-			ti,sci-rm-range-gp-rings = &lt;0x1&gt;;</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;315&gt;;</div><div class='del'>-			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_udmap: dma-controller@31150000 {</div><div class='del'>-			compatible = "ti,j721e-navss-main-udmap";</div><div class='del'>-			reg = &lt;0x00 0x31150000 0x00 0x100&gt;,</div><div class='del'>-			      &lt;0x00 0x34000000 0x00 0x80000&gt;,</div><div class='del'>-			      &lt;0x00 0x35000000 0x00 0x200000&gt;,</div><div class='del'>-			      &lt;0x00 0x30b00000 0x00 0x20000&gt;,</div><div class='del'>-			      &lt;0x00 0x30c00000 0x00 0x8000&gt;,</div><div class='del'>-			      &lt;0x00 0x30d00000 0x00 0x4000&gt;;</div><div class='del'>-			reg-names = "gcfg", "rchanrt", "tchanrt",</div><div class='del'>-				    "tchan", "rchan", "rflow";</div><div class='del'>-			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='del'>-			#dma-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;319&gt;;</div><div class='del'>-			ti,ringacc = &lt;&amp;main_ringacc&gt;;</div><div class='del'>-</div><div class='del'>-			ti,sci-rm-range-tchan = &lt;0x0d&gt;, /* TX_CHAN */</div><div class='del'>-						&lt;0x0f&gt;, /* TX_HCHAN */</div><div class='del'>-						&lt;0x10&gt;; /* TX_UHCHAN */</div><div class='del'>-			ti,sci-rm-range-rchan = &lt;0x0a&gt;, /* RX_CHAN */</div><div class='del'>-						&lt;0x0b&gt;, /* RX_HCHAN */</div><div class='del'>-						&lt;0x0c&gt;; /* RX_UHCHAN */</div><div class='del'>-			ti,sci-rm-range-rflow = &lt;0x00&gt;; /* GP RFLOW */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_bcdma_csi: dma-controller@311a0000 {</div><div class='del'>-			compatible = "ti,j721s2-dmss-bcdma-csi";</div><div class='del'>-			reg = &lt;0x00 0x311a0000 0x00 0x100&gt;,</div><div class='del'>-			      &lt;0x00 0x35d00000 0x00 0x20000&gt;,</div><div class='del'>-			      &lt;0x00 0x35c00000 0x00 0x10000&gt;,</div><div class='del'>-			      &lt;0x00 0x35e00000 0x00 0x80000&gt;;</div><div class='del'>-			reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";</div><div class='del'>-			msi-parent = &lt;&amp;main_udmass_inta&gt;;</div><div class='del'>-			#dma-cells = &lt;3&gt;;</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;281&gt;;</div><div class='del'>-			ti,sci-rm-range-rchan = &lt;0x21&gt;;</div><div class='del'>-			ti,sci-rm-range-tchan = &lt;0x22&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpts@310d0000 {</div><div class='del'>-			compatible = "ti,j721e-cpts";</div><div class='del'>-			reg = &lt;0x00 0x310d0000 0x00 0x400&gt;;</div><div class='del'>-			reg-names = "cpts";</div><div class='del'>-			clocks = &lt;&amp;k3_clks 282 0&gt;;</div><div class='del'>-			clock-names = "cpts";</div><div class='del'>-			assigned-clocks = &lt;&amp;k3_clks 62 3&gt;; /* CPTS_RFT_CLK */</div><div class='del'>-			assigned-clock-parents = &lt;&amp;k3_clks 62 5&gt;; /* MAIN_0_HSDIV6_CLK */</div><div class='del'>-			interrupts-extended = &lt;&amp;main_navss_intr 391&gt;;</div><div class='del'>-			interrupt-names = "cpts";</div><div class='del'>-			ti,cpts-periodic-outputs = &lt;6&gt;;</div><div class='del'>-			ti,cpts-ext-ts-inputs = &lt;8&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_cpsw0: ethernet@c000000 {</div><div class='del'>-		compatible = "ti,j784s4-cpswxg-nuss";</div><div class='del'>-		reg = &lt;0x00 0xc000000 0x00 0x200000&gt;;</div><div class='del'>-		reg-names = "cpsw_nuss";</div><div class='del'>-		ranges = &lt;0x00 0x00 0x00 0xc000000 0x00 0x200000&gt;;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 64 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 64 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xca00&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca01&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca02&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca03&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca04&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca05&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca06&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0xca07&gt;,</div><div class='del'>-		       &lt;&amp;main_udmap 0x4a00&gt;;</div><div class='del'>-		dma-names = "tx0", "tx1", "tx2", "tx3",</div><div class='del'>-			    "tx4", "tx5", "tx6", "tx7",</div><div class='del'>-			    "rx";</div><div class='del'>-</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		ethernet-ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port1: port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				label = "port1";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port2: port@2 {</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				label = "port2";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port3: port@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				label = "port3";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port4: port@4 {</div><div class='del'>-				reg = &lt;4&gt;;</div><div class='del'>-				label = "port4";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port5: port@5 {</div><div class='del'>-				reg = &lt;5&gt;;</div><div class='del'>-				label = "port5";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port6: port@6 {</div><div class='del'>-				reg = &lt;6&gt;;</div><div class='del'>-				label = "port6";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port7: port@7 {</div><div class='del'>-				reg = &lt;7&gt;;</div><div class='del'>-				label = "port7";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			main_cpsw0_port8: port@8 {</div><div class='del'>-				reg = &lt;8&gt;;</div><div class='del'>-				label = "port8";</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_cpsw0_mdio: mdio@f00 {</div><div class='del'>-			compatible = "ti,cpsw-mdio","ti,davinci_mdio";</div><div class='del'>-			reg = &lt;0x00 0xf00 0x00 0x100&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 64 0&gt;;</div><div class='del'>-			clock-names = "fck";</div><div class='del'>-			bus_freq = &lt;1000000&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpts@3d000 {</div><div class='del'>-			compatible = "ti,am65-cpts";</div><div class='del'>-			reg = &lt;0x00 0x3d000 0x00 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 64 3&gt;;</div><div class='del'>-			clock-names = "cpts";</div><div class='del'>-			interrupts-extended = &lt;&amp;gic500 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "cpts";</div><div class='del'>-			ti,cpts-ext-ts-inputs = &lt;4&gt;;</div><div class='del'>-			ti,cpts-periodic-outputs = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_cpsw1: ethernet@c200000 {</div><div class='del'>-		compatible = "ti,j721e-cpsw-nuss";</div><div class='del'>-		reg = &lt;0x00 0xc200000 0x00 0x200000&gt;;</div><div class='del'>-		reg-names = "cpsw_nuss";</div><div class='del'>-		ranges = &lt;0x00 0x00 0x00 0xc200000 0x00 0x200000&gt;;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		dma-coherent;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 62 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc640&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc641&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc642&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc643&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc644&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc645&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc646&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0xc647&gt;,</div><div class='del'>-			&lt;&amp;main_udmap 0x4640&gt;;</div><div class='del'>-		dma-names = "tx0", "tx1", "tx2", "tx3",</div><div class='del'>-				"tx4", "tx5", "tx6", "tx7",</div><div class='del'>-				"rx";</div><div class='del'>-</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		ethernet-ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			main_cpsw1_port1: port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				label = "port1";</div><div class='del'>-				phys = &lt;&amp;cpsw1_phy_gmii_sel 1&gt;;</div><div class='del'>-				ti,mac-only;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_cpsw1_mdio: mdio@f00 {</div><div class='del'>-			compatible = "ti,cpsw-mdio", "ti,davinci_mdio";</div><div class='del'>-			reg = &lt;0x00 0xf00 0x00 0x100&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 62 0&gt;;</div><div class='del'>-			clock-names = "fck";</div><div class='del'>-			bus_freq = &lt;1000000&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cpts@3d000 {</div><div class='del'>-			compatible = "ti,am65-cpts";</div><div class='del'>-			reg = &lt;0x00 0x3d000 0x00 0x400&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 62 3&gt;;</div><div class='del'>-			clock-names = "cpts";</div><div class='del'>-			interrupts-extended = &lt;&amp;gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-names = "cpts";</div><div class='del'>-			ti,cpts-ext-ts-inputs = &lt;4&gt;;</div><div class='del'>-			ti,cpts-periodic-outputs = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan0: can@2701000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02701000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02708000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 245 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 245 6&gt;, &lt;&amp;k3_clks 245 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan1: can@2711000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02711000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02718000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 246 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 246 6&gt;, &lt;&amp;k3_clks 246 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan2: can@2721000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02721000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02728000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 247 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 247 6&gt;, &lt;&amp;k3_clks 247 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan3: can@2731000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02731000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02738000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 248 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 248 6&gt;, &lt;&amp;k3_clks 248 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan4: can@2741000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02741000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02748000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 249 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 249 6&gt;, &lt;&amp;k3_clks 249 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan5: can@2751000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02751000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02758000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 250 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 250 6&gt;, &lt;&amp;k3_clks 250 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan6: can@2761000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02761000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02768000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 251 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 251 6&gt;, &lt;&amp;k3_clks 251 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan7: can@2771000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02771000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02778000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 252 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 252 6&gt;, &lt;&amp;k3_clks 252 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan8: can@2781000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02781000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02788000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 253 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 253 6&gt;, &lt;&amp;k3_clks 253 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 577 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan9: can@2791000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02791000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02798000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 254 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 254 6&gt;, &lt;&amp;k3_clks 254 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan10: can@27a1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x027a1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x027a8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 255 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 255 6&gt;, &lt;&amp;k3_clks 255 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan11: can@27b1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x027b1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x027b8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 256 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 256 6&gt;, &lt;&amp;k3_clks 256 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan12: can@27c1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x027c1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x027c8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 257 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 257 6&gt;, &lt;&amp;k3_clks 257 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan13: can@27d1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x027d1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x027d8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 258 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 258 6&gt;, &lt;&amp;k3_clks 258 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan14: can@2681000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02681000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02688000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 259 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 259 6&gt;, &lt;&amp;k3_clks 259 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan15: can@2691000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x02691000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x02698000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 260 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 260 6&gt;, &lt;&amp;k3_clks 260 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan16: can@26a1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x026a1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x026a8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 261 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 261 6&gt;, &lt;&amp;k3_clks 261 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_mcan17: can@26b1000 {</div><div class='del'>-		compatible = "bosch,m_can";</div><div class='del'>-		reg = &lt;0x00 0x026b1000 0x00 0x200&gt;,</div><div class='del'>-		      &lt;0x00 0x026b8000 0x00 0x8000&gt;;</div><div class='del'>-		reg-names = "m_can", "message_ram";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 262 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 262 6&gt;, &lt;&amp;k3_clks 262 1&gt;;</div><div class='del'>-		clock-names = "hclk", "cclk";</div><div class='del'>-		interrupts = &lt;GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "int0", "int1";</div><div class='del'>-		bosch,mram-cfg = &lt;0x00 128 64 64 64 64 32 32&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi0: spi@2100000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02100000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 376 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 376 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi1: spi@2110000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02110000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 377 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 377 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi2: spi@2120000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02120000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 378 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 378 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi3: spi@2130000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02130000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 379 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 379 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi4: spi@2140000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02140000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 380 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 380 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi5: spi@2150000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02150000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 381 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 381 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi6: spi@2160000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02160000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 382 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 382 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_spi7: spi@2170000 {</div><div class='del'>-		compatible = "ti,am654-mcspi","ti,omap4-mcspi";</div><div class='del'>-		reg = &lt;0x00 0x02170000 0x00 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 383 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 383 1&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ufs_wrapper: ufs-wrapper@4e80000 {</div><div class='del'>-		compatible = "ti,j721e-ufs";</div><div class='del'>-		reg = &lt;0x00 0x4e80000 0x00 0x100&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 387 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 387 3&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 387 3&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 387 6&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		ufs@4e84000 {</div><div class='del'>-			compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";</div><div class='del'>-			reg = &lt;0x00 0x4e84000 0x00 0x10000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			freq-table-hz = &lt;250000000 250000000&gt;, &lt;19200000 19200000&gt;,</div><div class='del'>-					&lt;19200000 19200000&gt;;</div><div class='del'>-			clocks = &lt;&amp;k3_clks 387 1&gt;, &lt;&amp;k3_clks 387 3&gt;, &lt;&amp;k3_clks 387 3&gt;;</div><div class='del'>-			clock-names = "core_clk", "phy_clk", "ref_clk";</div><div class='del'>-			dma-coherent;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_r5fss0: r5fss@5c00000 {</div><div class='del'>-		compatible = "ti,j721s2-r5fss";</div><div class='del'>-		ti,cluster-mode = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x5c00000 0x00 0x5c00000 0x20000&gt;,</div><div class='del'>-			 &lt;0x5d00000 0x00 0x5d00000 0x20000&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 336 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core0: r5f@5c00000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5c00000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5c10000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;339&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x06 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 339 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f0_0-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss0_core1: r5f@5d00000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5d00000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5d10000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;340&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x07 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 340 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f0_1-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_r5fss1: r5fss@5e00000 {</div><div class='del'>-		compatible = "ti,j721s2-r5fss";</div><div class='del'>-		ti,cluster-mode = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x5e00000 0x00 0x5e00000 0x20000&gt;,</div><div class='del'>-			 &lt;0x5f00000 0x00 0x5f00000 0x20000&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 337 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core0: r5f@5e00000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5e00000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5e10000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;341&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x08 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 341 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f1_0-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss1_core1: r5f@5f00000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5f00000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5f10000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;342&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x09 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 342 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f1_1-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_r5fss2: r5fss@5900000 {</div><div class='del'>-		compatible = "ti,j721s2-r5fss";</div><div class='del'>-		ti,cluster-mode = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x5900000 0x00 0x5900000 0x20000&gt;,</div><div class='del'>-			 &lt;0x5a00000 0x00 0x5a00000 0x20000&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 338 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core0: r5f@5900000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5900000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5910000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;343&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x0a 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 343 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f2_0-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		main_r5fss2_core1: r5f@5a00000 {</div><div class='del'>-			compatible = "ti,j721s2-r5f";</div><div class='del'>-			reg = &lt;0x5a00000 0x00010000&gt;,</div><div class='del'>-			      &lt;0x5a10000 0x00010000&gt;;</div><div class='del'>-			reg-names = "atcm", "btcm";</div><div class='del'>-			ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-			ti,sci-dev-id = &lt;344&gt;;</div><div class='del'>-			ti,sci-proc-ids = &lt;0x0b 0xff&gt;;</div><div class='del'>-			resets = &lt;&amp;k3_reset 344 1&gt;;</div><div class='del'>-			firmware-name = "j784s4-main-r5f2_1-fw";</div><div class='del'>-			ti,atcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,btcm-enable = &lt;1&gt;;</div><div class='del'>-			ti,loczrama = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	c71_0: dsp@64800000 {</div><div class='del'>-		compatible = "ti,j721s2-c71-dsp";</div><div class='del'>-		reg = &lt;0x00 0x64800000 0x00 0x00080000&gt;,</div><div class='del'>-		      &lt;0x00 0x64e00000 0x00 0x0000c000&gt;;</div><div class='del'>-		reg-names = "l2sram", "l1dram";</div><div class='del'>-		ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;30&gt;;</div><div class='del'>-		ti,sci-proc-ids = &lt;0x30 0xff&gt;;</div><div class='del'>-		resets = &lt;&amp;k3_reset 30 1&gt;;</div><div class='del'>-		firmware-name = "j784s4-c71_0-fw";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	c71_1: dsp@65800000 {</div><div class='del'>-		compatible = "ti,j721s2-c71-dsp";</div><div class='del'>-		reg = &lt;0x00 0x65800000 0x00 0x00080000&gt;,</div><div class='del'>-		      &lt;0x00 0x65e00000 0x00 0x0000c000&gt;;</div><div class='del'>-		reg-names = "l2sram", "l1dram";</div><div class='del'>-		ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;33&gt;;</div><div class='del'>-		ti,sci-proc-ids = &lt;0x31 0xff&gt;;</div><div class='del'>-		resets = &lt;&amp;k3_reset 33 1&gt;;</div><div class='del'>-		firmware-name = "j784s4-c71_1-fw";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	c71_2: dsp@66800000 {</div><div class='del'>-		compatible = "ti,j721s2-c71-dsp";</div><div class='del'>-		reg = &lt;0x00 0x66800000 0x00 0x00080000&gt;,</div><div class='del'>-		      &lt;0x00 0x66e00000 0x00 0x0000c000&gt;;</div><div class='del'>-		reg-names = "l2sram", "l1dram";</div><div class='del'>-		ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;37&gt;;</div><div class='del'>-		ti,sci-proc-ids = &lt;0x32 0xff&gt;;</div><div class='del'>-		resets = &lt;&amp;k3_reset 37 1&gt;;</div><div class='del'>-		firmware-name = "j784s4-c71_2-fw";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	c71_3: dsp@67800000 {</div><div class='del'>-		compatible = "ti,j721s2-c71-dsp";</div><div class='del'>-		reg = &lt;0x00 0x67800000 0x00 0x00080000&gt;,</div><div class='del'>-		      &lt;0x00 0x67e00000 0x00 0x0000c000&gt;;</div><div class='del'>-		reg-names = "l2sram", "l1dram";</div><div class='del'>-		ti,sci = &lt;&amp;sms&gt;;</div><div class='del'>-		ti,sci-dev-id = &lt;40&gt;;</div><div class='del'>-		ti,sci-proc-ids = &lt;0x33 0xff&gt;;</div><div class='del'>-		resets = &lt;&amp;k3_reset 40 1&gt;;</div><div class='del'>-		firmware-name = "j784s4-c71_3-fw";</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	main_esm: esm@700000 {</div><div class='del'>-		compatible = "ti,j721e-esm";</div><div class='del'>-		reg = &lt;0x00 0x700000 0x00 0x1000&gt;;</div><div class='del'>-		ti,esm-pins = &lt;688&gt;, &lt;689&gt;, &lt;690&gt;, &lt;691&gt;, &lt;692&gt;, &lt;693&gt;, &lt;694&gt;,</div><div class='del'>-			      &lt;695&gt;;</div><div class='del'>-		bootph-pre-ram;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog0: watchdog@2200000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2200000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 348 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 348 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 348 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 348 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog1: watchdog@2210000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2210000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 349 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 349 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 349 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 349 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog2: watchdog@2220000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2220000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 350 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 350 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 350 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 350 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog3: watchdog@2230000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2230000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 351 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 351 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 351 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 351 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog4: watchdog@2240000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2240000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 352 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 352 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 352 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 352 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog5: watchdog@2250000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2250000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 353 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 353 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 353 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 353 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog6: watchdog@2260000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2260000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 354 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 354 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 354 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 354 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog7: watchdog@2270000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2270000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 355 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 355 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 355 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 355 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The following RTI instances are coupled with MCU R5Fs, c7x and</div><div class='del'>-	 * GPU so keeping them reserved as these will be used by their</div><div class='del'>-	 * respective firmware</div><div class='del'>-	 */</div><div class='del'>-	watchdog8: watchdog@22f0000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x22f0000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 360 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 360 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 360 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 360 4&gt;;</div><div class='del'>-		/* reserved for GPU */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog9: watchdog@2300000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2300000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 356 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 356 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 356 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 356 4&gt;;</div><div class='del'>-		/* reserved for C7X_0 DSP */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog10: watchdog@2310000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2310000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 357 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 357 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 357 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 357 4&gt;;</div><div class='del'>-		/* reserved for C7X_1 DSP */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog11: watchdog@2320000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2320000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 358 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 358 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 358 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 358 4&gt;;</div><div class='del'>-		/* reserved for C7X_2 DSP */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog12: watchdog@2330000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2330000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 359 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 359 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 359 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 359 4&gt;;</div><div class='del'>-		/* reserved for C7X_3 DSP */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog13: watchdog@23c0000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x23c0000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 361 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 361 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 361 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 361 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F0_0 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog14: watchdog@23d0000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x23d0000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 362 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 362 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 362 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 362 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F0_1 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog15: watchdog@23e0000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x23e0000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 363 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 363 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 363 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 363 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F1_0 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog16: watchdog@23f0000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x23f0000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 364 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 364 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 364 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 364 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F1_1 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog17: watchdog@2540000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2540000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 365 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 365 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 365 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 366 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F2_0 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	watchdog18: watchdog@2550000 {</div><div class='del'>-		compatible = "ti,j7-rti-wdt";</div><div class='del'>-		reg = &lt;0x00 0x2550000 0x00 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;k3_clks 366 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 366 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 366 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 366 4&gt;;</div><div class='del'>-		/* reserved for MAIN_R5F2_1 */</div><div class='del'>-		status = "reserved";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mhdp: bridge@a000000 {</div><div class='del'>-		compatible = "ti,j721e-mhdp8546";</div><div class='del'>-		reg = &lt;0x0 0xa000000 0x0 0x30a00&gt;,</div><div class='del'>-		      &lt;0x0 0x4f40000 0x0 0x20&gt;;</div><div class='del'>-		reg-names = "mhdptx", "j721e-intg";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 217 11&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 217 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		dp0_ports: ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			/* Remote-endpoints are on the boards so</div><div class='del'>-			 * ports are defined in the platform dt file.</div><div class='del'>-			 */</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dss: dss@4a00000 {</div><div class='del'>-		compatible = "ti,j721e-dss";</div><div class='del'>-		reg = &lt;0x00 0x04a00000 0x00 0x10000&gt;, /* common_m */</div><div class='del'>-		      &lt;0x00 0x04a10000 0x00 0x10000&gt;, /* common_s0*/</div><div class='del'>-		      &lt;0x00 0x04b00000 0x00 0x10000&gt;, /* common_s1*/</div><div class='del'>-		      &lt;0x00 0x04b10000 0x00 0x10000&gt;, /* common_s2*/</div><div class='del'>-		      &lt;0x00 0x04a20000 0x00 0x10000&gt;, /* vidl1 */</div><div class='del'>-		      &lt;0x00 0x04a30000 0x00 0x10000&gt;, /* vidl2 */</div><div class='del'>-		      &lt;0x00 0x04a50000 0x00 0x10000&gt;, /* vid1 */</div><div class='del'>-		      &lt;0x00 0x04a60000 0x00 0x10000&gt;, /* vid2 */</div><div class='del'>-		      &lt;0x00 0x04a70000 0x00 0x10000&gt;, /* ovr1 */</div><div class='del'>-		      &lt;0x00 0x04a90000 0x00 0x10000&gt;, /* ovr2 */</div><div class='del'>-		      &lt;0x00 0x04ab0000 0x00 0x10000&gt;, /* ovr3 */</div><div class='del'>-		      &lt;0x00 0x04ad0000 0x00 0x10000&gt;, /* ovr4 */</div><div class='del'>-		      &lt;0x00 0x04a80000 0x00 0x10000&gt;, /* vp1 */</div><div class='del'>-		      &lt;0x00 0x04aa0000 0x00 0x10000&gt;, /* vp1 */</div><div class='del'>-		      &lt;0x00 0x04ac0000 0x00 0x10000&gt;, /* vp1 */</div><div class='del'>-		      &lt;0x00 0x04ae0000 0x00 0x10000&gt;, /* vp4 */</div><div class='del'>-		      &lt;0x00 0x04af0000 0x00 0x10000&gt;; /* wb */</div><div class='del'>-		reg-names = "common_m", "common_s0",</div><div class='del'>-			    "common_s1", "common_s2",</div><div class='del'>-			    "vidl1", "vidl2","vid1","vid2",</div><div class='del'>-			    "ovr1", "ovr2", "ovr3", "ovr4",</div><div class='del'>-			    "vp1", "vp2", "vp3", "vp4",</div><div class='del'>-			    "wb";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 218 0&gt;,</div><div class='del'>-			 &lt;&amp;k3_clks 218 2&gt;,</div><div class='del'>-			 &lt;&amp;k3_clks 218 5&gt;,</div><div class='del'>-			 &lt;&amp;k3_clks 218 14&gt;,</div><div class='del'>-			 &lt;&amp;k3_clks 218 18&gt;;</div><div class='del'>-		clock-names = "fck", "vp1", "vp2", "vp3", "vp4";</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 218 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "common_m",</div><div class='del'>-				  "common_s0",</div><div class='del'>-				  "common_s1",</div><div class='del'>-				  "common_s2";</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		dss_ports: ports {</div><div class='del'>-			/* Ports that DSS drives are platform specific</div><div class='del'>-			 * so they are defined in platform dt file.</div><div class='del'>-			 */</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcasp0: mcasp@2b00000 {</div><div class='del'>-		compatible = "ti,am33xx-mcasp-audio";</div><div class='del'>-		reg = &lt;0x00 0x02b00000 0x00 0x2000&gt;,</div><div class='del'>-		      &lt;0x00 0x02b08000 0x00 0x1000&gt;;</div><div class='del'>-		reg-names = "mpu","dat";</div><div class='del'>-		interrupts = &lt;GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "tx", "rx";</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc400&gt;, &lt;&amp;main_udmap 0x4400&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 265 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 265 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 265 1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 265 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcasp1: mcasp@2b10000 {</div><div class='del'>-		compatible = "ti,am33xx-mcasp-audio";</div><div class='del'>-		reg = &lt;0x00 0x02b10000 0x00 0x2000&gt;,</div><div class='del'>-		      &lt;0x00 0x02b18000 0x00 0x1000&gt;;</div><div class='del'>-		reg-names = "mpu","dat";</div><div class='del'>-		interrupts = &lt;GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "tx", "rx";</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc401&gt;, &lt;&amp;main_udmap 0x4401&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 266 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 266 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 266 1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 266 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcasp2: mcasp@2b20000 {</div><div class='del'>-		compatible = "ti,am33xx-mcasp-audio";</div><div class='del'>-		reg = &lt;0x00 0x02b20000 0x00 0x2000&gt;,</div><div class='del'>-		      &lt;0x00 0x02b28000 0x00 0x1000&gt;;</div><div class='del'>-		reg-names = "mpu","dat";</div><div class='del'>-		interrupts = &lt;GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "tx", "rx";</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc402&gt;, &lt;&amp;main_udmap 0x4402&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 267 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 267 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 267 1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 267 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mcasp3: mcasp@2b30000 {</div><div class='del'>-		compatible = "ti,am33xx-mcasp-audio";</div><div class='del'>-		reg = &lt;0x00 0x02b30000 0x00 0x2000&gt;,</div><div class='del'>-		      &lt;0x00 0x02b38000 0x00 0x1000&gt;;</div><div class='del'>-		reg-names = "mpu","dat";</div><div class='del'>-		interrupts = &lt;GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "tx", "rx";</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc403&gt;, &lt;&amp;main_udmap 0x4403&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 268 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 268 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 268 1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 268 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='add'>+&amp;scm_conf {</div><div class='add'>+	pcie2_ctrl: pcie2-ctrl@4078 {</div><div class='add'>+		compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+		reg = &lt;0x4078 0x4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	mcasp4: mcasp@2b40000 {</div><div class='del'>-		compatible = "ti,am33xx-mcasp-audio";</div><div class='del'>-		reg = &lt;0x00 0x02b40000 0x00 0x2000&gt;,</div><div class='del'>-		      &lt;0x00 0x02b48000 0x00 0x1000&gt;;</div><div class='del'>-		reg-names = "mpu","dat";</div><div class='del'>-		interrupts = &lt;GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "tx", "rx";</div><div class='del'>-		dmas = &lt;&amp;main_udmap 0xc404&gt;, &lt;&amp;main_udmap 0x4404&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;k3_clks 269 0&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-		assigned-clocks = &lt;&amp;k3_clks 269 0&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;k3_clks 269 1&gt;;</div><div class='del'>-		power-domains = &lt;&amp;k3_pds 269 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='del'>-		status = "disabled";</div><div class='add'>+	pcie3_ctrl: pcie3-ctrl@407c {</div><div class='add'>+		compatible = "ti,j784s4-pcie-ctrl", "syscon";</div><div class='add'>+		reg = &lt;0x407c 0x4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi<br/>new file mode 100644<br/>index 000000000000..81b508b9b05e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4-ti-ipc-firmware.dtsi</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only OR MIT</div><div class='add'>+/**</div><div class='add'>+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+&amp;reserved_memory {</div><div class='add'>+	c71_3_dma_memory_region: memory@ab000000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xab000000 0x00 0x100000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	c71_3_memory_region: memory@ab100000 {</div><div class='add'>+		compatible = "shared-dma-pool";</div><div class='add'>+		reg = &lt;0x00 0xab100000 0x00 0xf00000&gt;;</div><div class='add'>+		no-map;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mailbox0_cluster5 {</div><div class='add'>+</div><div class='add'>+	mbox_c71_3: mbox-c71-3 {</div><div class='add'>+		ti,mbox-rx = &lt;2 0 0&gt;;</div><div class='add'>+		ti,mbox-tx = &lt;3 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;c71_3 {</div><div class='add'>+	mboxes = &lt;&amp;mailbox0_cluster5 &amp;mbox_c71_3&gt;;</div><div class='add'>+	memory-region = &lt;&amp;c71_3_dma_memory_region&gt;,</div><div class='add'>+			&lt;&amp;c71_3_memory_region&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi<br/>index 5e84c6b4f5ad..f5afa32157cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-j784s4.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-j784s4.dtsi</a></div><div class='hunk'>@@ -8,18 +8,11 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-#include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='del'>-</div><div class='del'>-#include "k3-pinctrl.h"</div><div class='add'>+#include "k3-j784s4-j742s2-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Texas Instruments K3 J784S4 SoC";</div><div class='ctx'> 	compatible = "ti,j784s4";</div><div class='del'>-	interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -174,130 +167,6 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	L2_0: l2-cache0 {</div><div class='del'>-		compatible = "cache";</div><div class='del'>-		cache-level = &lt;2&gt;;</div><div class='del'>-		cache-unified;</div><div class='del'>-		cache-size = &lt;0x200000&gt;;</div><div class='del'>-		cache-line-size = &lt;64&gt;;</div><div class='del'>-		cache-sets = &lt;1024&gt;;</div><div class='del'>-		next-level-cache = &lt;&amp;msmc_l3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	L2_1: l2-cache1 {</div><div class='del'>-		compatible = "cache";</div><div class='del'>-		cache-level = &lt;2&gt;;</div><div class='del'>-		cache-unified;</div><div class='del'>-		cache-size = &lt;0x200000&gt;;</div><div class='del'>-		cache-line-size = &lt;64&gt;;</div><div class='del'>-		cache-sets = &lt;1024&gt;;</div><div class='del'>-		next-level-cache = &lt;&amp;msmc_l3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	msmc_l3: l3-cache0 {</div><div class='del'>-		compatible = "cache";</div><div class='del'>-		cache-level = &lt;3&gt;;</div><div class='del'>-		cache-unified;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	firmware {</div><div class='del'>-		optee {</div><div class='del'>-			compatible = "linaro,optee-tz";</div><div class='del'>-			method = "smc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		psci: psci {</div><div class='del'>-			compatible = "arm,psci-1.0";</div><div class='del'>-			method = "smc";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	a72_timer0: timer-cl0-cpu0 {</div><div class='del'>-		compatible = "arm,armv8-timer";</div><div class='del'>-		interrupts = &lt;GIC_PPI 13 IRQ_TYPE_LEVEL_LOW&gt;, /* cntpsirq */</div><div class='del'>-			     &lt;GIC_PPI 14 IRQ_TYPE_LEVEL_LOW&gt;, /* cntpnsirq */</div><div class='del'>-			     &lt;GIC_PPI 11 IRQ_TYPE_LEVEL_LOW&gt;, /* cntvirq */</div><div class='del'>-			     &lt;GIC_PPI 10 IRQ_TYPE_LEVEL_LOW&gt;; /* cnthpirq */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmu: pmu {</div><div class='del'>-		compatible = "arm,cortex-a72-pmu";</div><div class='del'>-		/* Recommendation from GIC500 TRM Table A.3 */</div><div class='del'>-		interrupts = &lt;GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cbass_main: bus@100000 {</div><div class='del'>-		bootph-all;</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges = &lt;0x00 0x00100000 0x00 0x00100000 0x00 0x00020000&gt;, /* ctrl mmr */</div><div class='del'>-			 &lt;0x00 0x00600000 0x00 0x00600000 0x00 0x00031100&gt;, /* GPIO */</div><div class='del'>-			 &lt;0x00 0x00700000 0x00 0x00700000 0x00 0x00001000&gt;, /* ESM */</div><div class='del'>-			 &lt;0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000&gt;, /* Most peripherals */</div><div class='del'>-			 &lt;0x00 0x04210000 0x00 0x04210000 0x00 0x00010000&gt;, /* VPU0 */</div><div class='del'>-			 &lt;0x00 0x04220000 0x00 0x04220000 0x00 0x00010000&gt;, /* VPU1 */</div><div class='del'>-			 &lt;0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000&gt;, /* PCIe0 Core*/</div><div class='del'>-			 &lt;0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000&gt;, /* PCIe1 Core*/</div><div class='del'>-			 &lt;0x00 0x0e000000 0x00 0x0e000000 0x00 0x00800000&gt;, /* PCIe2 Core*/</div><div class='del'>-			 &lt;0x00 0x0e800000 0x00 0x0e800000 0x00 0x00800000&gt;, /* PCIe3 Core*/</div><div class='del'>-			 &lt;0x00 0x10000000 0x00 0x10000000 0x00 0x08000000&gt;, /* PCIe0 DAT0 */</div><div class='del'>-			 &lt;0x00 0x18000000 0x00 0x18000000 0x00 0x08000000&gt;, /* PCIe1 DAT0 */</div><div class='del'>-			 &lt;0x00 0x64800000 0x00 0x64800000 0x00 0x0070c000&gt;, /* C71_1 */</div><div class='del'>-			 &lt;0x00 0x65800000 0x00 0x65800000 0x00 0x0070c000&gt;, /* C71_2 */</div><div class='del'>-			 &lt;0x00 0x66800000 0x00 0x66800000 0x00 0x0070c000&gt;, /* C71_3 */</div><div class='del'>-			 &lt;0x00 0x67800000 0x00 0x67800000 0x00 0x0070c000&gt;, /* C71_4 */</div><div class='del'>-			 &lt;0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000&gt;, /* A72 PERIPHBASE */</div><div class='del'>-			 &lt;0x00 0x70000000 0x00 0x70000000 0x00 0x00400000&gt;, /* MSMC RAM */</div><div class='del'>-			 &lt;0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000&gt;, /* MAIN NAVSS */</div><div class='del'>-			 &lt;0x40 0x00000000 0x40 0x00000000 0x01 0x00000000&gt;, /* PCIe0 DAT1 */</div><div class='del'>-			 &lt;0x41 0x00000000 0x41 0x00000000 0x01 0x00000000&gt;, /* PCIe1 DAT1 */</div><div class='del'>-			 &lt;0x42 0x00000000 0x42 0x00000000 0x01 0x00000000&gt;, /* PCIe2 DAT1 */</div><div class='del'>-			 &lt;0x43 0x00000000 0x43 0x00000000 0x01 0x00000000&gt;, /* PCIe3 DAT1 */</div><div class='del'>-			 &lt;0x44 0x00000000 0x44 0x00000000 0x00 0x08000000&gt;, /* PCIe2 DAT0 */</div><div class='del'>-			 &lt;0x44 0x10000000 0x44 0x10000000 0x00 0x08000000&gt;, /* PCIe3 DAT0 */</div><div class='del'>-			 &lt;0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000&gt;, /* GPU */</div><div class='del'>-</div><div class='del'>-			 /* MCUSS_WKUP Range */</div><div class='del'>-			 &lt;0x00 0x28380000 0x00 0x28380000 0x00 0x03880000&gt;,</div><div class='del'>-			 &lt;0x00 0x40200000 0x00 0x40200000 0x00 0x00998400&gt;,</div><div class='del'>-			 &lt;0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000&gt;,</div><div class='del'>-			 &lt;0x00 0x41000000 0x00 0x41000000 0x00 0x00020000&gt;,</div><div class='del'>-			 &lt;0x00 0x41400000 0x00 0x41400000 0x00 0x00020000&gt;,</div><div class='del'>-			 &lt;0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000&gt;,</div><div class='del'>-			 &lt;0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400&gt;,</div><div class='del'>-			 &lt;0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000&gt;,</div><div class='del'>-			 &lt;0x00 0x46000000 0x00 0x46000000 0x00 0x00200000&gt;,</div><div class='del'>-			 &lt;0x00 0x47000000 0x00 0x47000000 0x00 0x00068400&gt;,</div><div class='del'>-			 &lt;0x00 0x50000000 0x00 0x50000000 0x00 0x10000000&gt;,</div><div class='del'>-			 &lt;0x04 0x00000000 0x04 0x00000000 0x04 0x00000000&gt;;</div><div class='del'>-</div><div class='del'>-		cbass_mcu_wakeup: bus@28380000 {</div><div class='del'>-			bootph-all;</div><div class='del'>-			compatible = "simple-bus";</div><div class='del'>-			#address-cells = &lt;2&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			ranges = &lt;0x00 0x28380000 0x00 0x28380000 0x00 0x03880000&gt;, /* MCU NAVSS*/</div><div class='del'>-				 &lt;0x00 0x40200000 0x00 0x40200000 0x00 0x00998400&gt;, /* First peripheral window */</div><div class='del'>-				 &lt;0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000&gt;, /* CTRL_MMR0 */</div><div class='del'>-				 &lt;0x00 0x41000000 0x00 0x41000000 0x00 0x00020000&gt;, /* MCU R5F Core0 */</div><div class='del'>-				 &lt;0x00 0x41400000 0x00 0x41400000 0x00 0x00020000&gt;, /* MCU R5F Core1 */</div><div class='del'>-				 &lt;0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000&gt;, /* MCU SRAM */</div><div class='del'>-				 &lt;0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400&gt;, /* WKUP peripheral window */</div><div class='del'>-				 &lt;0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000&gt;, /* MMRs, remaining NAVSS */</div><div class='del'>-				 &lt;0x00 0x46000000 0x00 0x46000000 0x00 0x00200000&gt;, /* CPSW */</div><div class='del'>-				 &lt;0x00 0x47000000 0x00 0x47000000 0x00 0x00068400&gt;, /* OSPI register space */</div><div class='del'>-				 &lt;0x00 0x50000000 0x00 0x50000000 0x00 0x10000000&gt;, /* FSS data region 1 */</div><div class='del'>-				 &lt;0x04 0x00000000 0x04 0x00000000 0x04 0x00000000&gt;; /* FSS data region 0/3 */</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	thermal_zones: thermal-zones {</div><div class='del'>-		#include "k3-j784s4-thermal.dtsi"</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Now include peripherals from each bus segment */</div><div class='ctx'> #include "k3-j784s4-main.dtsi"</div><div class='del'>-#include "k3-j784s4-mcu-wakeup.dtsi"</div><div class='head'>diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h<br/>index 22b8d73cfd32..e46f7bf52701 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-pinctrl.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/ti/k3-pinctrl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/ti/k3-pinctrl.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/ti/k3-pinctrl.h</a></div><div class='hunk'>@@ -3,15 +3,32 @@</div><div class='ctx'>  * This header provides constants for pinctrl bindings for TI's K3 SoC</div><div class='ctx'>  * family.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/</div><div class='ctx'>  */</div><div class='ctx'> #ifndef DTS_ARM64_TI_K3_PINCTRL_H</div><div class='ctx'> #define DTS_ARM64_TI_K3_PINCTRL_H</div><div class='ctx'> </div><div class='add'>+#define WKUP_LVL_EN_SHIFT       (7)</div><div class='add'>+#define WKUP_LVL_POL_SHIFT      (8)</div><div class='add'>+#define ST_EN_SHIFT		(14)</div><div class='ctx'> #define PULLUDEN_SHIFT		(16)</div><div class='ctx'> #define PULLTYPESEL_SHIFT	(17)</div><div class='ctx'> #define RXACTIVE_SHIFT		(18)</div><div class='add'>+#define DRV_STR_SHIFT           (19)</div><div class='add'>+#define ISO_OVERRIDE_EN_SHIFT   (22)</div><div class='add'>+#define ISO_BYPASS_EN_SHIFT     (23)</div><div class='ctx'> #define DEBOUNCE_SHIFT		(11)</div><div class='add'>+#define FORCE_DS_EN_SHIFT	(15)</div><div class='add'>+#define DS_EN_SHIFT		(24)</div><div class='add'>+#define DS_OUT_DIS_SHIFT	(25)</div><div class='add'>+#define DS_OUT_VAL_SHIFT	(26)</div><div class='add'>+#define DS_PULLUD_EN_SHIFT	(27)</div><div class='add'>+#define DS_PULLTYPE_SEL_SHIFT	(28)</div><div class='add'>+#define WKUP_EN_SHIFT           (29)</div><div class='add'>+</div><div class='add'>+/* Schmitt trigger configuration */</div><div class='add'>+#define ST_DISABLE		(0 &lt;&lt; ST_EN_SHIFT)</div><div class='add'>+#define ST_ENABLE		(1 &lt;&lt; ST_EN_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #define PULL_DISABLE		(1 &lt;&lt; PULLUDEN_SHIFT)</div><div class='ctx'> #define PULL_ENABLE		(0 &lt;&lt; PULLUDEN_SHIFT)</div><div class='hunk'>@@ -22,13 +39,40 @@</div><div class='ctx'> #define INPUT_EN		(1 &lt;&lt; RXACTIVE_SHIFT)</div><div class='ctx'> #define INPUT_DISABLE		(0 &lt;&lt; RXACTIVE_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define DS_PULL_DISABLE         (1 &lt;&lt; DS_PULLUD_EN_SHIFT)</div><div class='add'>+#define DS_PULL_ENABLE          (0 &lt;&lt; DS_PULLUD_EN_SHIFT)</div><div class='add'>+</div><div class='add'>+#define DS_PULL_UP              (1 &lt;&lt; DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)</div><div class='add'>+#define DS_PULL_DOWN            (0 &lt;&lt; DS_PULLTYPE_SEL_SHIFT | DS_PULL_ENABLE)</div><div class='add'>+</div><div class='add'>+#define DS_STATE_EN             (1 &lt;&lt; DS_EN_SHIFT)</div><div class='add'>+#define DS_STATE_DISABLE        (0 &lt;&lt; DS_EN_SHIFT)</div><div class='add'>+</div><div class='add'>+#define DS_INPUT_EN             (1 &lt;&lt; DS_OUT_DIS_SHIFT | DS_STATE_EN)</div><div class='add'>+#define DS_INPUT_DISABLE        (0 &lt;&lt; DS_OUT_DIS_SHIFT | DS_STATE_EN)</div><div class='add'>+</div><div class='add'>+#define DS_OUT_VALUE_ZERO       (0 &lt;&lt; DS_OUT_VAL_SHIFT)</div><div class='add'>+#define DS_OUT_VALUE_ONE        (1 &lt;&lt; DS_OUT_VAL_SHIFT)</div><div class='add'>+</div><div class='add'>+/* Configuration to enable wake-up on pin activity */</div><div class='add'>+#define WKUP_ENABLE             (1 &lt;&lt; WKUP_EN_SHIFT)</div><div class='add'>+#define WKUP_DISABLE            (0 &lt;&lt; WKUP_EN_SHIFT)</div><div class='add'>+#define WKUP_ON_LEVEL           (1 &lt;&lt; WKUP_LVL_EN_SHIFT)</div><div class='add'>+#define WKUP_ON_EDGE            (0 &lt;&lt; WKUP_LVL_EN_SHIFT)</div><div class='add'>+#define WKUP_LEVEL_LOW          (0 &lt;&lt; WKUP_LVL_POL_SHIFT)</div><div class='add'>+#define WKUP_LEVEL_HIGH         (1 &lt;&lt; WKUP_LVL_POL_SHIFT)</div><div class='add'>+</div><div class='ctx'> /* Only these macros are expected be used directly in device tree files */</div><div class='ctx'> #define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)</div><div class='ctx'> #define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)</div><div class='ctx'> #define PIN_OUTPUT_PULLDOWN	(INPUT_DISABLE | PULL_DOWN)</div><div class='del'>-#define PIN_INPUT		(INPUT_EN | PULL_DISABLE)</div><div class='del'>-#define PIN_INPUT_PULLUP	(INPUT_EN | PULL_UP)</div><div class='del'>-#define PIN_INPUT_PULLDOWN	(INPUT_EN | PULL_DOWN)</div><div class='add'>+#define PIN_INPUT		(INPUT_EN | ST_ENABLE | PULL_DISABLE)</div><div class='add'>+#define PIN_INPUT_PULLUP	(INPUT_EN | ST_ENABLE | PULL_UP)</div><div class='add'>+#define PIN_INPUT_PULLDOWN	(INPUT_EN | ST_ENABLE | PULL_DOWN)</div><div class='add'>+/* Input configurations with Schmitt Trigger disabled */</div><div class='add'>+#define PIN_INPUT_NOST		(INPUT_EN | PULL_DISABLE)</div><div class='add'>+#define PIN_INPUT_PULLUP_NOST	(INPUT_EN | PULL_UP)</div><div class='add'>+#define PIN_INPUT_PULLDOWN_NOST	(INPUT_EN | PULL_DOWN)</div><div class='ctx'> </div><div class='ctx'> #define PIN_DEBOUNCE_DISABLE	(0 &lt;&lt; DEBOUNCE_SHIFT)</div><div class='ctx'> #define PIN_DEBOUNCE_CONF1	(1 &lt;&lt; DEBOUNCE_SHIFT)</div><div class='hunk'>@@ -38,12 +82,44 @@</div><div class='ctx'> #define PIN_DEBOUNCE_CONF5	(5 &lt;&lt; DEBOUNCE_SHIFT)</div><div class='ctx'> #define PIN_DEBOUNCE_CONF6	(6 &lt;&lt; DEBOUNCE_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define PIN_DRIVE_STRENGTH_NOMINAL      (0 &lt;&lt; DRV_STR_SHIFT)</div><div class='add'>+#define PIN_DRIVE_STRENGTH_SLOW         (1 &lt;&lt; DRV_STR_SHIFT)</div><div class='add'>+#define PIN_DRIVE_STRENGTH_FAST         (2 &lt;&lt; DRV_STR_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PIN_DS_FORCE_DISABLE		(0 &lt;&lt; FORCE_DS_EN_SHIFT)</div><div class='add'>+#define PIN_DS_FORCE_ENABLE		(1 &lt;&lt; FORCE_DS_EN_SHIFT)</div><div class='add'>+#define PIN_DS_ISO_OVERRIDE_DISABLE     (0 &lt;&lt; ISO_OVERRIDE_EN_SHIFT)</div><div class='add'>+#define PIN_DS_ISO_OVERRIDE_ENABLE      (1 &lt;&lt; ISO_OVERRIDE_EN_SHIFT)</div><div class='add'>+#define PIN_DS_OUT_ENABLE		(0 &lt;&lt; DS_OUT_DIS_SHIFT)</div><div class='add'>+#define PIN_DS_OUT_DISABLE		(1 &lt;&lt; DS_OUT_DIS_SHIFT)</div><div class='add'>+#define PIN_DS_OUT_VALUE_ZERO		(0 &lt;&lt; DS_OUT_VAL_SHIFT)</div><div class='add'>+#define PIN_DS_OUT_VALUE_ONE		(1 &lt;&lt; DS_OUT_VAL_SHIFT)</div><div class='add'>+#define PIN_DS_PULLUD_ENABLE		(0 &lt;&lt; DS_PULLUD_EN_SHIFT)</div><div class='add'>+#define PIN_DS_PULLUD_DISABLE		(1 &lt;&lt; DS_PULLUD_EN_SHIFT)</div><div class='add'>+#define PIN_DS_PULL_DOWN		(0 &lt;&lt; DS_PULLTYPE_SEL_SHIFT)</div><div class='add'>+#define PIN_DS_PULL_UP			(1 &lt;&lt; DS_PULLTYPE_SEL_SHIFT)</div><div class='add'>+#define PIN_DS_ISO_BYPASS               (1 &lt;&lt; ISO_BYPASS_EN_SHIFT)</div><div class='add'>+#define PIN_DS_ISO_BYPASS_DISABLE       (0 &lt;&lt; ISO_BYPASS_EN_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PIN_DS_OUTPUT_LOW               (DS_INPUT_DISABLE | DS_OUT_VALUE_ZERO)</div><div class='add'>+#define PIN_DS_OUTPUT_HIGH              (DS_INPUT_DISABLE | DS_OUT_VALUE_ONE)</div><div class='add'>+#define PIN_DS_INPUT                    (DS_INPUT_EN | DS_PULL_DISABLE)</div><div class='add'>+#define PIN_DS_INPUT_PULLUP             (DS_INPUT_EN | DS_PULL_UP)</div><div class='add'>+#define PIN_DS_INPUT_PULLDOWN           (DS_INPUT_EN | DS_PULL_DOWN)</div><div class='add'>+</div><div class='add'>+#define PIN_WKUP_EN_LEVEL_LOW           (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_LOW)</div><div class='add'>+#define PIN_WKUP_EN_LEVEL_HIGH          (WKUP_ENABLE | WKUP_ON_LEVEL | WKUP_LEVEL_HIGH)</div><div class='add'>+#define PIN_WKUP_EN                     (WKUP_ENABLE | WKUP_ON_EDGE)</div><div class='add'>+</div><div class='ctx'> /* Default mux configuration for gpio-ranges to use with pinctrl */</div><div class='ctx'> #define PIN_GPIO_RANGE_IOPAD	(PIN_INPUT | 7)</div><div class='ctx'> </div><div class='ctx'> #define AM62AX_IOPAD(pa, val, muxmode)		(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='ctx'> #define AM62AX_MCU_IOPAD(pa, val, muxmode)	(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='ctx'> </div><div class='add'>+#define AM62DX_IOPAD(pa, val, muxmode)		(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='add'>+#define AM62DX_MCU_IOPAD(pa, val, muxmode)	(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='add'>+</div><div class='ctx'> #define AM62PX_IOPAD(pa, val, muxmode)		(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='ctx'> #define AM62PX_MCU_IOPAD(pa, val, muxmode)	(((pa) &amp; 0x1fff)) ((val) | (muxmode))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi<br/>index 39806f0ae513..9aa7b1872bd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/toshiba/tmpv7708.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/toshiba/tmpv7708.dtsi</a></div><div class='hunk'>@@ -152,6 +152,7 @@</div><div class='ctx'> 		gic: interrupt-controller@24001000 {</div><div class='ctx'> 			compatible = "arm,gic-400";</div><div class='ctx'> 			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)&gt;;</div><div class='ctx'> 			reg = &lt;0 0x24001000 0 0x1000&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile<br/>index 1068b0fa8e98..70fac0b276df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/Makefile</a></div><div class='hunk'>@@ -29,3 +29,29 @@ zynqmp-smk-k26-revA-sck-kv-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-</div><div class='ctx'> dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb</div><div class='ctx'> zynqmp-smk-k26-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo</div><div class='ctx'> dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb</div><div class='add'>+</div><div class='add'>+zynqmp-sm-k26-revA-sck-kr-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revA.dtb</div><div class='add'>+zynqmp-sm-k26-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revB.dtb</div><div class='add'>+zynqmp-smk-k26-revA-sck-kr-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revA.dtb</div><div class='add'>+zynqmp-smk-k26-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revB.dtb</div><div class='add'>+</div><div class='add'>+zynqmp-sm-k24-revA-sck-kd-g-revA-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kd-g-revA.dtb</div><div class='add'>+zynqmp-smk-k24-revA-sck-kd-g-revA-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kd-g-revA.dtb</div><div class='add'>+</div><div class='add'>+zynqmp-sm-k24-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb</div><div class='add'>+zynqmp-smk-k24-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb</div><div class='add'>+</div><div class='add'>+zynqmp-sm-k24-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb</div><div class='add'>+zynqmp-smk-k24-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-x-b2197-01-revA.dtb</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi b/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi<br/>new file mode 100644<br/>index 000000000000..b7a8a1a512cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi</a></div><div class='hunk'>@@ -0,0 +1,231 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for Xilinx Versal NET fixed clock</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2022, Xilinx, Inc.</div><div class='add'>+ * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	clk60: clk60 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;60000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk100: clk100 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk125: clk125 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk150: clk150 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;150000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk160: clk160 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;160000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk200: clk200 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk250: clk250 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;250000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk300: clk300 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;300000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk450: clk450 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;450000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk1200: clk1200 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;1200000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		versal_net_firmware: versal-net-firmware {</div><div class='add'>+			compatible = "xlnx,versal-net-firmware", "xlnx,versal-firmware";</div><div class='add'>+			bootph-all;</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma0 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma1 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma2 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma3 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma4 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma5 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma6 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;adma7 {</div><div class='add'>+	clocks = &lt;&amp;clk450&gt;, &lt;&amp;clk450&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	clocks = &lt;&amp;clk160&gt;, &lt;&amp;clk160&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can1 {</div><div class='add'>+	clocks = &lt;&amp;clk160&gt;, &lt;&amp;clk160&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem0 {</div><div class='add'>+	clocks = &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem1 {</div><div class='add'>+	clocks = &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk125&gt;, &lt;&amp;clk250&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c0 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i3c1 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi {</div><div class='add'>+	clocks = &lt;&amp;clk200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	clocks = &lt;&amp;clk300&gt;, &lt;&amp;clk300&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	/* Nothing */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	clocks = &lt;&amp;clk200&gt;, &lt;&amp;clk200&gt;, &lt;&amp;clk1200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	clocks = &lt;&amp;clk200&gt;, &lt;&amp;clk200&gt;, &lt;&amp;clk1200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial0 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;, &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial1 {</div><div class='add'>+	clocks = &lt;&amp;clk100&gt;, &lt;&amp;clk100&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	clocks = &lt;&amp;clk200&gt;, &lt;&amp;clk200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	clocks = &lt;&amp;clk200&gt;, &lt;&amp;clk200&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ttc0 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	clocks = &lt;&amp;clk60&gt;, &lt;&amp;clk60&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_0 {</div><div class='add'>+	clocks = &lt;&amp;clk60&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 {</div><div class='add'>+	clocks = &lt;&amp;clk60&gt;, &lt;&amp;clk60&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_1 {</div><div class='add'>+	clocks = &lt;&amp;clk60&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wwdt0 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wwdt1 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wwdt2 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;wwdt3 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpd_wwdt0 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;lpd_wwdt1 {</div><div class='add'>+	clocks = &lt;&amp;clk150&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts b/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts<br/>new file mode 100644<br/>index 000000000000..06b2301f48a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for Xilinx Versal Net VNX board revA</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2022, Xilinx, Inc.</div><div class='add'>+ * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "versal-net.dtsi"</div><div class='add'>+#include "versal-net-clk.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "xlnx,versal-net-vnx-revA", "xlnx,versal-net-vnx", "xlnx,versal-net";</div><div class='add'>+	model = "Xilinx Versal NET VNX revA";</div><div class='add'>+	dma-coherent;</div><div class='add'>+</div><div class='add'>+	memory: memory@0 {</div><div class='add'>+		reg = &lt;0 0 0 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory_hi: memory@800000000 {</div><div class='add'>+		reg = &lt;8 0 3 0x80000000&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory_hi2: memory@50000000000 {</div><div class='add'>+		reg = &lt;0x500 0 4 0&gt;;</div><div class='add'>+		device_type = "memory";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyAMA1,115200n8";</div><div class='add'>+		stdout-path = "serial1:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+		rsc_tbl_carveout: rproc@bbf14000 {</div><div class='add'>+			reg = &lt;0 0xbbf14000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		rpu0vdev0vring0: rpu0vdev0vring0@bbf15000 {</div><div class='add'>+			reg = &lt;0 0xbbf15000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		rpu0vdev0vring1: rpu0vdev0vring1@bbf16000 {</div><div class='add'>+			reg = &lt;0 0xbbf16000 0 0x1000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		rpu0vdev0buffer: rpu0vdev0buffer@bbf17000 {</div><div class='add'>+			reg = &lt;0 0xbbf17000 0 0xD000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		reserve_others: reserveothers@0 {</div><div class='add'>+			reg = &lt;0 0x0 0 0x1c200000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		pdi_update: pdiupdate@1c200000 {</div><div class='add'>+			reg = &lt;0 0x1c200000 0 0x6000000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+		reserve_optee_atf: reserveopteeatf@22200000 {</div><div class='add'>+			reg = &lt;0 0x22200000 0 0x4100000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	iommus = &lt;&amp;smmu 0x235&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		phy: ethernet-phy@4 {</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ospi {</div><div class='add'>+	num-cs = &lt;2&gt;;</div><div class='add'>+	iommus = &lt;&amp;smmu 0x245&gt;;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	iommus = &lt;&amp;smmu 0x243&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	disable-wp;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;serial1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;smmu {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/dts/xilinx/versal-net.dtsi<br/>new file mode 100644<br/>index 000000000000..412af9a394aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/versal-net.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/versal-net.dtsi</a></div><div class='hunk'>@@ -0,0 +1,1160 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for Xilinx Versal NET</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2022, Xilinx, Inc.</div><div class='add'>+ * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "xlnx,versal-net";</div><div class='add'>+	model = "Xilinx Versal NET";</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	options {</div><div class='add'>+		u-boot {</div><div class='add'>+			compatible = "u-boot,config";</div><div class='add'>+			bootscr-address = /bits/ 64 &lt;0x20000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu100&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu200&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu300&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu10000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu10100&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu10200&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu10300&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			cluster2 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu20000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu20100&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu20200&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu20300&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+			cluster3 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu30000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu30100&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu30200&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu30300&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_00&gt;;</div><div class='add'>+			l2_00: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu100: cpu@100 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x100&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_01&gt;;</div><div class='add'>+			l2_01: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu200: cpu@200 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x200&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_02&gt;;</div><div class='add'>+			l2_02: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu300: cpu@300 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x300&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_03&gt;;</div><div class='add'>+			l2_03: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu10000: cpu@10000 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x10000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_10&gt;;</div><div class='add'>+			l2_10: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu10100: cpu@10100 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x10100&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_11&gt;;</div><div class='add'>+			l2_11: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu10200: cpu@10200 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x10200&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_12&gt;;</div><div class='add'>+			l2_12: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu10300: cpu@10300 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x10300&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_13&gt;;</div><div class='add'>+			l2_13: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu20000: cpu@20000 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x20000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_20&gt;;</div><div class='add'>+			l2_20: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu20100: cpu@20100 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x20100&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_21&gt;;</div><div class='add'>+			l2_21: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu20200: cpu@20200 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x20200&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_22&gt;;</div><div class='add'>+			l2_22: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu20300: cpu@20300 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x20300&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_23&gt;;</div><div class='add'>+			l2_23: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu30000: cpu@30000 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x30000&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_30&gt;;</div><div class='add'>+			l2_30: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu30100: cpu@30100 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x30100&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_31&gt;;</div><div class='add'>+			l2_31: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu30200: cpu@30200 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x30200&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_32&gt;;</div><div class='add'>+			l2_32: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		cpu30300: cpu@30300 {</div><div class='add'>+			compatible = "arm,cortex-a78";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			enable-method = "psci";</div><div class='add'>+			reg = &lt;0x30300&gt;;</div><div class='add'>+			operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+			cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='add'>+			d-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			d-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-size = &lt;0x10000&gt;; /* 64kB */</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 4 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size / associativity) */</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_33&gt;;</div><div class='add'>+			l2_33: l2-cache {</div><div class='add'>+				compatible = "cache";</div><div class='add'>+				cache-level = &lt;2&gt;;</div><div class='add'>+				cache-size = &lt;0x80000&gt;; /* 512kB */</div><div class='add'>+				cache-line-size = &lt;64&gt;;</div><div class='add'>+				/* 8 ways set associativity */</div><div class='add'>+				/* cache_size / (line_size/associativity) */</div><div class='add'>+				cache-sets = &lt;1024&gt;;</div><div class='add'>+				cache-unified;</div><div class='add'>+				next-level-cache = &lt;&amp;l3_3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_0: l3-0-cache { /* cluster private */</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x200000&gt;; /* 2MB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 16 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size/associativity) */</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;llc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_1: l3-1-cache { /* cluster private */</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x200000&gt;; /* 2MB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 16 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size/associativity) */</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;llc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_2: l3-2-cache { /* cluster private */</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x200000&gt;; /* 2MB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 16 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size/associativity) */</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;llc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_3: l3-3-cache { /* cluster private */</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x200000&gt;; /* 2MB */</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			/* 16 ways set associativity */</div><div class='add'>+			/* cache_size / (line_size/associativity) */</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;llc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		llc: l4-cache { /* LLC inside CMN */</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;4&gt;;</div><div class='add'>+			cache-size = &lt;0x1000000&gt;; /* 16MB */</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		idle-states {</div><div class='add'>+			entry-method = "psci";</div><div class='add'>+</div><div class='add'>+			CPU_SLEEP_0: cpu-sleep-0 {</div><div class='add'>+				compatible = "arm,idle-state";</div><div class='add'>+				arm,psci-suspend-param = &lt;0x40000000&gt;;</div><div class='add'>+				local-timer-stop;</div><div class='add'>+				entry-latency-us = &lt;300&gt;;</div><div class='add'>+				exit-latency-us = &lt;600&gt;;</div><div class='add'>+				min-residency-us = &lt;10000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_opp_table: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-1066000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1066000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1866000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1866000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1900000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1900000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-1999000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1999000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-2050000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2050000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-2100000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2100000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-2200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-2400000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;2400000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;500000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;serial0;</div><div class='add'>+		serial1 = &amp;serial1;</div><div class='add'>+		serial2 = &amp;dcc;</div><div class='add'>+		mmc0 = &amp;sdhci0;</div><div class='add'>+		mmc1 = &amp;sdhci1;</div><div class='add'>+		i2c0 = &amp;i2c0;</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		rtc = &amp;rtc;</div><div class='add'>+		usb0 = &amp;usb0;</div><div class='add'>+		usb1 = &amp;usb1;</div><div class='add'>+		spi0 = &amp;ospi;</div><div class='add'>+		spi1 = &amp;qspi;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dcc: dcc {</div><div class='add'>+		compatible = "arm,dcc";</div><div class='add'>+		status = "disabled";</div><div class='add'>+		bootph-all;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	firmware {</div><div class='add'>+		psci {</div><div class='add'>+			compatible = "arm,psci-1.0";</div><div class='add'>+			method = "smc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpga: fpga-region {</div><div class='add'>+		compatible = "fpga-region";</div><div class='add'>+		fpga-mgr = &lt;&amp;versal_fpga&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer: timer {</div><div class='add'>+		compatible = "arm,armv8-timer";</div><div class='add'>+		interrupts = &lt;1 13 4&gt;, &lt;1 14 4&gt;, &lt;1 11 4&gt;, &lt;1 10 4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	versal_fpga: versal-fpga {</div><div class='add'>+		compatible = "xlnx,versal-fpga";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	amba: axi {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		bootph-all;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		adma0: dma-controller@ebd00000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd00000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 72 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma1: dma-controller@ebd10000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd10000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 73 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma2: dma-controller@ebd20000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd20000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 74 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma3: dma-controller@ebd30000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd30000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 75 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma4: dma-controller@ebd40000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd40000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 76 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma5: dma-controller@ebd50000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd50000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 77 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma6: dma-controller@ebd60000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd60000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 78 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		adma7: dma-controller@ebd70000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-dma-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xebd70000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 79 4&gt;;</div><div class='add'>+			clock-names = "clk_main", "clk_apb";</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			xlnx,bus-width = &lt;64&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can0: can@f1980000 {</div><div class='add'>+			compatible = "xlnx,canfd-2.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1980000 0 0x6000&gt;;</div><div class='add'>+			interrupts = &lt;0 27 4&gt;;</div><div class='add'>+			clock-names = "can_clk", "s_axi_aclk";</div><div class='add'>+			rx-fifo-depth = &lt;64&gt;;</div><div class='add'>+			tx-mailbox-count = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		can1: can@f1990000 {</div><div class='add'>+			compatible = "xlnx,canfd-2.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1990000 0 0x6000&gt;;</div><div class='add'>+			interrupts = &lt;0 28 4&gt;;</div><div class='add'>+			clock-names = "can_clk", "s_axi_aclk";</div><div class='add'>+			rx-fifo-depth = &lt;64&gt;;</div><div class='add'>+			tx-mailbox-count = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem0: ethernet@f19e0000 {</div><div class='add'>+			compatible = "xlnx,versal-gem", "cdns,gem";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf19e0000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 39 4&gt;, &lt;0 39 4&gt;;</div><div class='add'>+			clock-names = "pclk", "hclk", "tx_clk", "rx_clk",</div><div class='add'>+				      "tsu_clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gem1: ethernet@f19f0000 {</div><div class='add'>+			compatible = "xlnx,versal-gem", "cdns,gem";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf19f0000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 41 4&gt;, &lt;0 41 4&gt;;</div><div class='add'>+			clock-names = "pclk", "hclk", "tx_clk", "rx_clk",</div><div class='add'>+				      "tsu_clk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gic: interrupt-controller@e2000000 {</div><div class='add'>+			compatible = "arm,gic-v3";</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			reg = &lt;0 0xe2000000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0xe2060000 0 0x200000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts = &lt;1 9 4&gt;;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+			its: msi-controller@e2040000 {</div><div class='add'>+				compatible = "arm,gic-v3-its";</div><div class='add'>+				msi-controller;</div><div class='add'>+				#msi-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0 0xe2040000 0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@f19d0000 {</div><div class='add'>+			compatible = "xlnx,versal-gpio-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf19d0000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 20 4&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@f1020000 {</div><div class='add'>+			compatible = "xlnx,pmc-gpio-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1020000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 180 4&gt;;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@f1940000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1940000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 21 4&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@f1950000 {</div><div class='add'>+			compatible = "cdns,i2c-r1p14";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1950000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 22 4&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c0: i3c@f1948000 {</div><div class='add'>+			compatible = "snps,dw-i3c-master-1.00a";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1948000 0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;0 21 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i3c1: i3c@f1958000 {</div><div class='add'>+			compatible = "snps,dw-i3c-master-1.00a";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1958000 0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			interrupts = &lt;0 22 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ospi: spi@f1010000 {</div><div class='add'>+			compatible = "xlnx,versal-ospi-1.0", "cdns,qspi-nor";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1010000 0 0x10000&gt;,</div><div class='add'>+			      &lt;0 0xc0000000 0 0x20000000&gt;;</div><div class='add'>+			interrupts = &lt;0 182 4&gt;;</div><div class='add'>+			cdns,fifo-depth = &lt;256&gt;;</div><div class='add'>+			cdns,fifo-width = &lt;4&gt;;</div><div class='add'>+			cdns,is-dma = &lt;1&gt;; /* u-boot specific */</div><div class='add'>+			cdns,trigger-address = &lt;0xc0000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		qspi: spi@f1030000 {</div><div class='add'>+			compatible = "xlnx,versal-qspi-1.0";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1030000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 183 4&gt;;</div><div class='add'>+			clock-names = "ref_clk", "pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rtc: rtc@f12a0000 {</div><div class='add'>+			compatible = "xlnx,zynqmp-rtc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf12a0000 0 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 200 4&gt;, &lt;0 201 4&gt;;</div><div class='add'>+			interrupt-names = "alarm", "sec";</div><div class='add'>+			calibration = &lt;0x7FFF&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0: mmc@f1040000 {</div><div class='add'>+			compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1040000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 184 4&gt;;</div><div class='add'>+			clock-names = "clk_xin", "clk_ahb", "gate";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-output-names = "clk_out_sd0", "clk_in_sd0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci1: mmc@f1050000 {</div><div class='add'>+			compatible = "xlnx,versal-net-emmc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1050000 0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 186 4&gt;;</div><div class='add'>+			clock-names = "clk_xin", "clk_ahb", "gate";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clock-output-names = "clk_out_sd1", "clk_in_sd1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial0: serial@f1920000 {</div><div class='add'>+			bootph-all;</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1920000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 25 4&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial1: serial@f1930000 {</div><div class='add'>+			bootph-all;</div><div class='add'>+			compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1930000 0 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 26 4&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			clock-names = "uartclk", "apb_pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smmu: iommu@ec000000 {</div><div class='add'>+			compatible = "arm,smmu-v3";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xec000000 0 0x40000&gt;;</div><div class='add'>+			#iommu-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-names = "combined";</div><div class='add'>+			interrupts = &lt;0 169 4&gt;;</div><div class='add'>+			dma-coherent;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@f1960000 {</div><div class='add'>+			compatible = "cdns,spi-r1p6";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 23 4&gt;;</div><div class='add'>+			reg = &lt;0 0xf1960000 0 0x1000&gt;;</div><div class='add'>+			clock-names = "ref_clk", "pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@f1970000 {</div><div class='add'>+			compatible = "cdns,spi-r1p6";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 24 4&gt;;</div><div class='add'>+			reg = &lt;0 0xf1970000 0 0x1000&gt;;</div><div class='add'>+			clock-names = "ref_clk", "pclk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ttc0: timer@f1dc0000 {</div><div class='add'>+			compatible = "cdns,ttc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 43 4&gt;, &lt;0 44 4&gt;, &lt;0 45 4&gt;;</div><div class='add'>+			timer-width = &lt;32&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf1dc0000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ttc1: timer@f1dd0000 {</div><div class='add'>+			compatible = "cdns,ttc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 46 4&gt;, &lt;0 47 4&gt;, &lt;0 48 4&gt;;</div><div class='add'>+			timer-width = &lt;32&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf1dd0000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ttc2: timer@f1de0000 {</div><div class='add'>+			compatible = "cdns,ttc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 49 4&gt;, &lt;0 50 4&gt;, &lt;0 51 4&gt;;</div><div class='add'>+			timer-width = &lt;32&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf1de0000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ttc3: timer@f1df0000 {</div><div class='add'>+			compatible = "cdns,ttc";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			interrupts = &lt;0 52 4&gt;, &lt;0 53 4&gt;, &lt;0 54 4&gt;;</div><div class='add'>+			timer-width = &lt;32&gt;;</div><div class='add'>+			reg = &lt;0x0 0xf1df0000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: usb@f1e00000 {</div><div class='add'>+			compatible = "xlnx,versal-dwc3";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xf1e00000 0 0x100&gt;;</div><div class='add'>+			clock-names = "bus_clk", "ref_clk";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			dwc3_0: usb@f1b00000  {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				status = "disabled";</div><div class='add'>+				reg = &lt;0 0xf1b00000 0 0x10000&gt;;</div><div class='add'>+				interrupt-names = "host", "peripheral", "otg", "wakeup";</div><div class='add'>+				interrupts = &lt;0 29 4&gt;, &lt;0 29 4&gt;, &lt;0 33 4&gt;, &lt;0 98 4&gt;;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,quirk-frame-length-adjustment = &lt;0x20&gt;;</div><div class='add'>+				dr_mode = "peripheral";</div><div class='add'>+				maximum-speed = "high-speed";</div><div class='add'>+				snps,usb3_lpm_capable;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb1: usb@f1e10000 {</div><div class='add'>+			compatible = "xlnx,versal-dwc3";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0x0 0xf1e10000 0x0 0x100&gt;;</div><div class='add'>+			clock-names = "bus_clk", "ref_clk";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			dwc3_1: usb@f1c00000  {</div><div class='add'>+				compatible = "snps,dwc3";</div><div class='add'>+				status = "disabled";</div><div class='add'>+				reg = &lt;0x0 0xf1c00000 0x0 0x10000&gt;;</div><div class='add'>+				interrupt-names = "host", "peripheral", "otg", "wakeup";</div><div class='add'>+				interrupts = &lt;0 34 4&gt;, &lt;0 34 4&gt;, &lt;0 38 4&gt;, &lt;0 99 4&gt;;</div><div class='add'>+				snps,dis_u2_susphy_quirk;</div><div class='add'>+				snps,dis_u3_susphy_quirk;</div><div class='add'>+				snps,quirk-frame-length-adjustment = &lt;0x20&gt;;</div><div class='add'>+				dr_mode = "host";</div><div class='add'>+				maximum-speed = "high-speed";</div><div class='add'>+				snps,usb3_lpm_capable;</div><div class='add'>+				clock-names = "ref";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wwdt0: watchdog@ecc10000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xecc10000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wwdt1: watchdog@ecd10000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xecd10000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wwdt2: watchdog@ece10000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xece10000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wwdt3: watchdog@ecf10000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xecf10000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpd_wwdt0: watchdog@ea420000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xea420000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		lpd_wwdt1: watchdog@ea430000 {</div><div class='add'>+			compatible = "xlnx,versal-wwdt";</div><div class='add'>+			status = "disabled";</div><div class='add'>+			reg = &lt;0 0xea430000 0 0x10000&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h b/arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h<br/>new file mode 100644<br/>index 000000000000..0aa17f2a2818<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/xlnx-zynqmp-clk.h</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Xilinx Zynq MPSoC Firmware layer</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2014-2018 Xilinx, Inc.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _XLNX_ZYNQMP_CLK_H</div><div class='add'>+#define _XLNX_ZYNQMP_CLK_H</div><div class='add'>+</div><div class='add'>+#define IOPLL			0</div><div class='add'>+#define RPLL			1</div><div class='add'>+#define APLL			2</div><div class='add'>+#define DPLL			3</div><div class='add'>+#define VPLL			4</div><div class='add'>+#define IOPLL_TO_FPD		5</div><div class='add'>+#define RPLL_TO_FPD		6</div><div class='add'>+#define APLL_TO_LPD		7</div><div class='add'>+#define DPLL_TO_LPD		8</div><div class='add'>+#define VPLL_TO_LPD		9</div><div class='add'>+#define ACPU			10</div><div class='add'>+#define ACPU_HALF		11</div><div class='add'>+#define DBF_FPD			12</div><div class='add'>+#define DBF_LPD			13</div><div class='add'>+#define DBG_TRACE		14</div><div class='add'>+#define DBG_TSTMP		15</div><div class='add'>+#define DP_VIDEO_REF		16</div><div class='add'>+#define DP_AUDIO_REF		17</div><div class='add'>+#define DP_STC_REF		18</div><div class='add'>+#define GDMA_REF		19</div><div class='add'>+#define DPDMA_REF		20</div><div class='add'>+#define DDR_REF			21</div><div class='add'>+#define SATA_REF		22</div><div class='add'>+#define PCIE_REF		23</div><div class='add'>+#define GPU_REF			24</div><div class='add'>+#define GPU_PP0_REF		25</div><div class='add'>+#define GPU_PP1_REF		26</div><div class='add'>+#define TOPSW_MAIN		27</div><div class='add'>+#define TOPSW_LSBUS		28</div><div class='add'>+#define GTGREF0_REF		29</div><div class='add'>+#define LPD_SWITCH		30</div><div class='add'>+#define LPD_LSBUS		31</div><div class='add'>+#define USB0_BUS_REF		32</div><div class='add'>+#define USB1_BUS_REF		33</div><div class='add'>+#define USB3_DUAL_REF		34</div><div class='add'>+#define USB0			35</div><div class='add'>+#define USB1			36</div><div class='add'>+#define CPU_R5			37</div><div class='add'>+#define CPU_R5_CORE		38</div><div class='add'>+#define CSU_SPB			39</div><div class='add'>+#define CSU_PLL			40</div><div class='add'>+#define PCAP			41</div><div class='add'>+#define IOU_SWITCH		42</div><div class='add'>+#define GEM_TSU_REF		43</div><div class='add'>+#define GEM_TSU			44</div><div class='add'>+#define GEM0_TX			45</div><div class='add'>+#define GEM1_TX			46</div><div class='add'>+#define GEM2_TX			47</div><div class='add'>+#define GEM3_TX			48</div><div class='add'>+#define GEM0_RX			49</div><div class='add'>+#define GEM1_RX			50</div><div class='add'>+#define GEM2_RX			51</div><div class='add'>+#define GEM3_RX			52</div><div class='add'>+#define QSPI_REF		53</div><div class='add'>+#define SDIO0_REF		54</div><div class='add'>+#define SDIO1_REF		55</div><div class='add'>+#define UART0_REF		56</div><div class='add'>+#define UART1_REF		57</div><div class='add'>+#define SPI0_REF		58</div><div class='add'>+#define SPI1_REF		59</div><div class='add'>+#define NAND_REF		60</div><div class='add'>+#define I2C0_REF		61</div><div class='add'>+#define I2C1_REF		62</div><div class='add'>+#define CAN0_REF		63</div><div class='add'>+#define CAN1_REF		64</div><div class='add'>+#define CAN0			65</div><div class='add'>+#define CAN1			66</div><div class='add'>+#define DLL_REF			67</div><div class='add'>+#define ADMA_REF		68</div><div class='add'>+#define TIMESTAMP_REF		69</div><div class='add'>+#define AMS_REF			70</div><div class='add'>+#define PL0_REF			71</div><div class='add'>+#define PL1_REF			72</div><div class='add'>+#define PL2_REF			73</div><div class='add'>+#define PL3_REF			74</div><div class='add'>+#define WDT			75</div><div class='add'>+#define IOPLL_INT		76</div><div class='add'>+#define IOPLL_PRE_SRC		77</div><div class='add'>+#define IOPLL_HALF		78</div><div class='add'>+#define IOPLL_INT_MUX		79</div><div class='add'>+#define IOPLL_POST_SRC		80</div><div class='add'>+#define RPLL_INT		81</div><div class='add'>+#define RPLL_PRE_SRC		82</div><div class='add'>+#define RPLL_HALF		83</div><div class='add'>+#define RPLL_INT_MUX		84</div><div class='add'>+#define RPLL_POST_SRC		85</div><div class='add'>+#define APLL_INT		86</div><div class='add'>+#define APLL_PRE_SRC		87</div><div class='add'>+#define APLL_HALF		88</div><div class='add'>+#define APLL_INT_MUX		89</div><div class='add'>+#define APLL_POST_SRC		90</div><div class='add'>+#define DPLL_INT		91</div><div class='add'>+#define DPLL_PRE_SRC		92</div><div class='add'>+#define DPLL_HALF		93</div><div class='add'>+#define DPLL_INT_MUX		94</div><div class='add'>+#define DPLL_POST_SRC		95</div><div class='add'>+#define VPLL_INT		96</div><div class='add'>+#define VPLL_PRE_SRC		97</div><div class='add'>+#define VPLL_HALF		98</div><div class='add'>+#define VPLL_INT_MUX		99</div><div class='add'>+#define VPLL_POST_SRC		100</div><div class='add'>+#define CAN0_MIO		101</div><div class='add'>+#define CAN1_MIO		102</div><div class='add'>+#define ACPU_FULL		103</div><div class='add'>+#define GEM0_REF		104</div><div class='add'>+#define GEM1_REF		105</div><div class='add'>+#define GEM2_REF		106</div><div class='add'>+#define GEM3_REF		107</div><div class='add'>+#define GEM0_REF_UNG		108</div><div class='add'>+#define GEM1_REF_UNG		109</div><div class='add'>+#define GEM2_REF_UNG		110</div><div class='add'>+#define GEM3_REF_UNG		111</div><div class='add'>+#define LPD_WDT			112</div><div class='add'>+</div><div class='add'>+#endif /* _XLNX_ZYNQMP_CLK_H */</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi<br/>index 60d1b1acf9a0..52e122fc7c9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi</a></div><div class='hunk'>@@ -8,41 +8,46 @@</div><div class='ctx'>  * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;dt-bindings/clock/xlnx-zynqmp-clk.h&gt;</div><div class='add'>+#include "xlnx-zynqmp-clk.h"</div><div class='ctx'> / {</div><div class='del'>-	pss_ref_clk: pss_ref_clk {</div><div class='add'>+	pss_ref_clk: pss-ref-clk {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;33333333&gt;;</div><div class='add'>+		clock-output-names = "pss_ref_clk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	video_clk: video_clk {</div><div class='add'>+	video_clk: video-clk {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='add'>+		clock-output-names = "video_clk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pss_alt_ref_clk: pss_alt_ref_clk {</div><div class='add'>+	pss_alt_ref_clk: pss-alt-ref-clk {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "pss_alt_ref_clk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	gt_crx_ref_clk: gt_crx_ref_clk {</div><div class='add'>+	gt_crx_ref_clk: gt-crx-ref-clk {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;108000000&gt;;</div><div class='add'>+		clock-output-names = "gt_crx_ref_clk";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	aux_ref_clk: aux_ref_clk {</div><div class='add'>+	aux_ref_clk: aux-ref-clk {</div><div class='ctx'> 		bootph-all;</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='add'>+		clock-output-names = "aux_ref_clk";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso<br/>new file mode 100644<br/>index 000000000000..02be5e1e8686<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for KD240 revA Carrier Card</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2021 - 2022, Xilinx, Inc.</div><div class='add'>+ * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-zynqmp.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "xlnx,zynqmp-sk-kd240-rev1",</div><div class='add'>+		     "xlnx,zynqmp-sk-kd240-revB",</div><div class='add'>+		     "xlnx,zynqmp-sk-kd240-revA",</div><div class='add'>+		     "xlnx,zynqmp-sk-kd240", "xlnx,zynqmp";</div><div class='add'>+	model = "ZynqMP KD240 revA/B/1";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = "/axi/ethernet@ff0c0000"; /* &amp;gem1 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ina260-u3 {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;u3 0&gt;, &lt;&amp;u3 1&gt;, &lt;&amp;u3 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_26: clock2 { /* u17 - USB */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_0: clock4 { /* u92/u91 - GEM2 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_1: clock5 { /* u92/u91 - GEM3 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;can0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_can0_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+	u3: ina260@40 { /* u3 */</div><div class='add'>+		compatible = "ti,ina260";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		label = "ina260-u14";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slg7xl45106: gpio@11 { /* u13 - reset logic */</div><div class='add'>+		compatible = "dlg,slg7xl45106";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		label = "resetchip";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "USB0_PHY_RESET_B", "",</div><div class='add'>+				  "SD_RESET_B", "USB0_HUB_RESET_B",</div><div class='add'>+				  "", "PS_GEM0_RESET_B",</div><div class='add'>+				  "", "";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hub: usb-hub@2d { /* u36 */</div><div class='add'>+		compatible = "microchip,usb5744";</div><div class='add'>+		reg = &lt;0x2d&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB 3.0 */</div><div class='add'>+&amp;psgtr {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* usb */</div><div class='add'>+	clocks = &lt;&amp;clk_26&gt;;</div><div class='add'>+	clock-names = "ref2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 { /* mio52 - mio63 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb0_default&gt;;</div><div class='add'>+	phy-names = "usb3-phy";</div><div class='add'>+	phys = &lt;&amp;psgtr 2 PHY_TYPE_USB3 0 2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;slg7xl45106 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;, &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,usb3_lpm_capable;</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem1 { /* mdio mio50/51 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gem1_default&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;;</div><div class='add'>+</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	mdio: mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		phy0: ethernet-phy@8 { /* Adin u31 */</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "ethernet-phy-id0283.bc30";</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			adi,rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+			adi,tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+			adi,fifo-depth-bits = &lt;8&gt;;</div><div class='add'>+			reset-assert-us = &lt;10&gt;;</div><div class='add'>+			reset-deassert-us = &lt;5000&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;gpio 77 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 2 more ethernet phys u32@2 and u34@3 */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl0 { /* required by spec */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl_can0_default: can0-default {</div><div class='add'>+		mux {</div><div class='add'>+			function = "can0";</div><div class='add'>+			groups = "can0_16_grp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf {</div><div class='add'>+			groups = "can0_16_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO66";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO67";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart0_default: uart0-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "uart0_17_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO70";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO71";</div><div class='add'>+			bias-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "uart0_17_grp";</div><div class='add'>+			function = "uart0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1_default: uart1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO37";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO36";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			function = "uart1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_default: i2c1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			function = "i2c1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpio-grp {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			function = "gpio0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gem1_default: gem1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO45", "MIO46", "MIO47", "MIO48";</div><div class='add'>+			bias-disable;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-bootstrap {</div><div class='add'>+			pins = "MIO44", "MIO49";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO38", "MIO39", "MIO40",</div><div class='add'>+				"MIO41", "MIO42", "MIO43";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-mdio {</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux-mdio {</div><div class='add'>+			function = "mdio1";</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			function = "ethernet1";</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb0_default: usb0-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO52", "MIO53", "MIO55";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",</div><div class='add'>+			"MIO60", "MIO61", "MIO62", "MIO63";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			function = "usb0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_default: usb1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO64", "MIO65", "MIO67";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",</div><div class='add'>+			"MIO72", "MIO73", "MIO74", "MIO75";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			function = "usb1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	rts-gpios = &lt;&amp;gpio 72 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	linux,rs485-enabled-at-boot-time;</div><div class='add'>+	rs485-rts-delay = &lt;10 10&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart0_default&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1_default&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;zynqmp_dpsub {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso<br/>new file mode 100644<br/>index 000000000000..b92dcb86e87e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso</a></div><div class='hunk'>@@ -0,0 +1,455 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for KR260 revA Carrier Card</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2021, Xilinx, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-zynqmp.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "xlnx,zynqmp-sk-kr260-revA",</div><div class='add'>+		     "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp";</div><div class='add'>+	model = "ZynqMP KR260 revA";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = "/axi/ethernet@ff0b0000"; /* &amp;gem0 */</div><div class='add'>+		ethernet1 = "/axi/ethernet@ff0c0000"; /* &amp;gem1 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ina260-u14 {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;u14 0&gt;, &lt;&amp;u14 1&gt;, &lt;&amp;u14 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_27: clock0 { /* u86 - DP */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;27000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_125: si5332-0 { /* u17 - GEM0/1 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_74: si5332-5 { /* u17 - SLVC-EC */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;74250000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_26: si5332-2 { /* u17 - USB */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_156: si5332-3 { /* u17 - SFP+ */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;156250000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_0: si5332-1 { /* u17 - GEM2 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_1: si5332-4 { /* u17 - GEM3 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+	u14: ina260@40 { /* u14 */</div><div class='add'>+		compatible = "ti,ina260";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		label = "ina260-u14";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slg7xl45106: gpio@11 { /* u19 - reset logic */</div><div class='add'>+		compatible = "dlg,slg7xl45106";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		label = "resetchip";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",</div><div class='add'>+				  "SD_RESET_B", "USB0_HUB_RESET_B",</div><div class='add'>+				  "USB1_HUB_RESET_B", "PS_GEM0_RESET_B",</div><div class='add'>+				  "PS_GEM1_RESET_B", "";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@74 { /* u18 */</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		usbhub_i2c0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			hub_1: usb-hub@2d {</div><div class='add'>+				compatible = "microchip,usb5744";</div><div class='add'>+				reg = &lt;0x2d&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		usbhub_i2c1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			hub_2: usb-hub@2d {</div><div class='add'>+				compatible = "microchip,usb5744";</div><div class='add'>+				reg = &lt;0x2d&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/* Bus 2/3 are not connected */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* si5332@6a - u17 - clock-generator */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GEM SGMII/DP and USB 3.0 */</div><div class='add'>+&amp;psgtr {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* gem0/1, dp, usb */</div><div class='add'>+	clocks = &lt;&amp;clk_125&gt;, &lt;&amp;clk_27&gt;, &lt;&amp;clk_26&gt;;</div><div class='add'>+	clock-names = "ref0", "ref1", "ref2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;zynqmp_dpsub {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-names = "dp-phy0";</div><div class='add'>+	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;27000000&gt;, &lt;25000000&gt;, &lt;300000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;zynqmp_dpdma {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clock-rates = &lt;600000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 { /* mio52 - mio63 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb0_default&gt;;</div><div class='add'>+	phy-names = "usb3-phy";</div><div class='add'>+	phys = &lt;&amp;psgtr 2 PHY_TYPE_USB3 0 2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;slg7xl45106 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;, &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,usb3_lpm_capable;</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 { /* mio64 - mio75 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1_default&gt;;</div><div class='add'>+	phy-names = "usb3-phy";</div><div class='add'>+	phys = &lt;&amp;psgtr 3 PHY_TYPE_USB3 1 2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;slg7xl45106 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;, &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,usb3_lpm_capable;</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub1_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub1_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub1_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub1_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem0 { /* mdio mio50/51 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	phys = &lt;&amp;psgtr 0 PHY_TYPE_SGMII 0 0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem1 { /* mdio mio50/51, gem mio38 - mio49 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gem1_default&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;;</div><div class='add'>+</div><div class='add'>+	mdio: mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		phy0: ethernet-phy@4 { /* u81 */</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "ethernet-phy-id2000.a231";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			reset-assert-us = &lt;300&gt;;</div><div class='add'>+			reset-deassert-us = &lt;280&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;slg7xl45106 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		phy1: ethernet-phy@8 { /* u36 */</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "ethernet-phy-id2000.a231";</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			reset-assert-us = &lt;100&gt;;</div><div class='add'>+			reset-deassert-us = &lt;280&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;slg7xl45106 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gem2/gem3 via PL with phys u79@2 and u80@3 */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1_default: uart1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO37";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO36";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			function = "uart1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_default: i2c1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			function = "i2c1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpio-grp {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			function = "gpio0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gem1_default: gem1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO44", "MIO46", "MIO48";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-bootstrap {</div><div class='add'>+			pins = "MIO45", "MIO47", "MIO49";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO38", "MIO39", "MIO40",</div><div class='add'>+				"MIO41", "MIO42", "MIO43";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-mdio {</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux-mdio {</div><div class='add'>+			function = "mdio1";</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			function = "ethernet1";</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb0_default: usb0-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO52", "MIO53", "MIO55";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",</div><div class='add'>+			"MIO60", "MIO61", "MIO62", "MIO63";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			function = "usb0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_default: usb1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO64", "MIO65", "MIO67";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",</div><div class='add'>+			"MIO72", "MIO73", "MIO74", "MIO75";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			function = "usb1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1_default&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso<br/>new file mode 100644<br/>index 000000000000..99ad220d13d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso</a></div><div class='hunk'>@@ -0,0 +1,456 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for KR260 revB Carrier Card (A03 revision)</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2021 - 2022, Xilinx, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='add'>+#include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-zynqmp.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/plugin/;</div><div class='add'>+</div><div class='add'>+&amp;{/} {</div><div class='add'>+	compatible = "xlnx,zynqmp-sk-kr260-revB",</div><div class='add'>+		     "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp";</div><div class='add'>+	model = "ZynqMP KR260 revB";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = "/axi/ethernet@ff0b0000"; /* &amp;gem0 */</div><div class='add'>+		ethernet1 = "/axi/ethernet@ff0c0000"; /* &amp;gem1 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ina260-u14 {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;u14 0&gt;, &lt;&amp;u14 1&gt;, &lt;&amp;u14 2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_125: clock0 { /* u87 - GEM0/1 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_27: clock1 { /* u86 - DP */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;27000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_26: clock2 { /* u89 - USB */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;26000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_156: clock3 { /* u90 - SFP+ */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;156250000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_0: clock4 { /* u92/u91 - GEM2 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_25_1: clock5 { /* u92/u91 - GEM3 */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;25000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk_74: clock6 { /* u88 - SLVC-EC */</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;74250000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	pinctrl-names = "default", "gpio";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_i2c1_default&gt;;</div><div class='add'>+	pinctrl-1 = &lt;&amp;pinctrl_i2c1_gpio&gt;;</div><div class='add'>+	scl-gpios = &lt;&amp;gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+	sda-gpios = &lt;&amp;gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+</div><div class='add'>+	u14: ina260@40 { /* u14 */</div><div class='add'>+		compatible = "ti,ina260";</div><div class='add'>+		#io-channel-cells = &lt;1&gt;;</div><div class='add'>+		label = "ina260-u14";</div><div class='add'>+		reg = &lt;0x40&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	slg7xl45106: gpio@11 { /* u19 - reset logic */</div><div class='add'>+		compatible = "dlg,slg7xl45106";</div><div class='add'>+		reg = &lt;0x11&gt;;</div><div class='add'>+		label = "resetchip";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",</div><div class='add'>+				  "SD_RESET_B", "USB0_HUB_RESET_B",</div><div class='add'>+				  "USB1_HUB_RESET_B", "PS_GEM0_RESET_B",</div><div class='add'>+				  "PS_GEM1_RESET_B", "";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c-mux@74 { /* u18 */</div><div class='add'>+		compatible = "nxp,pca9546";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x74&gt;;</div><div class='add'>+		usbhub_i2c0: i2c@0 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			hub_1: usb-hub@2d {</div><div class='add'>+				compatible = "microchip,usb5744";</div><div class='add'>+				reg = &lt;0x2d&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		usbhub_i2c1: i2c@1 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			hub_2: usb-hub@2d {</div><div class='add'>+				compatible = "microchip,usb5744";</div><div class='add'>+				reg = &lt;0x2d&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		/* Bus 2/3 are not connected */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* si5332@6a - u17 - clock-generator */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GEM SGMII/DP and USB 3.0 */</div><div class='add'>+&amp;psgtr {</div><div class='add'>+	status = "okay";</div><div class='add'>+	/* gem0/1, dp, usb */</div><div class='add'>+	clocks = &lt;&amp;clk_125&gt;, &lt;&amp;clk_27&gt;, &lt;&amp;clk_26&gt;;</div><div class='add'>+	clock-names = "ref0", "ref1", "ref2";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;zynqmp_dpsub {</div><div class='add'>+	status = "okay";</div><div class='add'>+	phy-names = "dp-phy0";</div><div class='add'>+	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 1&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;27000000&gt;, &lt;25000000&gt;, &lt;300000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;zynqmp_dpdma {</div><div class='add'>+	status = "okay";</div><div class='add'>+	assigned-clock-rates = &lt;600000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 { /* mio52 - mio63 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb0_default&gt;;</div><div class='add'>+	phy-names = "usb3-phy";</div><div class='add'>+	phys = &lt;&amp;psgtr 2 PHY_TYPE_USB3 0 2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;slg7xl45106 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;, &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,usb3_lpm_capable;</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_1&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb1 { /* mio64 - mio75 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usb1_default&gt;;</div><div class='add'>+	phy-names = "usb3-phy";</div><div class='add'>+	phys = &lt;&amp;psgtr 3 PHY_TYPE_USB3 1 2&gt;;</div><div class='add'>+	reset-gpios = &lt;&amp;slg7xl45106 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;, &lt;20000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;dwc3_1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	snps,usb3_lpm_capable;</div><div class='add'>+	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub1_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub1_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub1_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub1_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub_2&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;slg7xl45106 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem0 { /* mdio mio50/51 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	phys = &lt;&amp;psgtr 0 PHY_TYPE_SGMII 0 0&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gem1 { /* mdio mio50/51, gem mio38 - mio49 */</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_gem1_default&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	assigned-clock-rates = &lt;250000000&gt;;</div><div class='add'>+</div><div class='add'>+	mdio: mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		phy0: ethernet-phy@4 { /* u81 */</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "ethernet-phy-id2000.a231";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			reset-assert-us = &lt;300&gt;;</div><div class='add'>+			reset-deassert-us = &lt;280&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;slg7xl45106 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+		phy1: ethernet-phy@8 { /* u36 */</div><div class='add'>+			#phy-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "ethernet-phy-id2000.a231";</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			ti,rx-internal-delay = &lt;DP83867_RGMIIDCTL_2_25_NS&gt;;</div><div class='add'>+			ti,tx-internal-delay = &lt;DP83867_RGMIIDCTL_2_75_NS&gt;;</div><div class='add'>+			ti,fifo-depth = &lt;DP83867_PHYCR_FIFO_DEPTH_4_B_NIB&gt;;</div><div class='add'>+			ti,dp83867-rxctrl-strap-quirk;</div><div class='add'>+			reset-assert-us = &lt;100&gt;;</div><div class='add'>+			reset-deassert-us = &lt;280&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;slg7xl45106 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gem2/gem3 via PL with phys u79@2 and u80@3 */</div><div class='add'>+</div><div class='add'>+&amp;pinctrl0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl_uart1_default: uart1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO37";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO36";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "uart1_9_grp";</div><div class='add'>+			function = "uart1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_default: i2c1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "i2c1_6_grp";</div><div class='add'>+			function = "i2c1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_i2c1_gpio: i2c1-gpio-grp {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "gpio0_24_grp", "gpio0_25_grp";</div><div class='add'>+			function = "gpio0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_gem1_default: gem1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO44", "MIO46", "MIO48";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-bootstrap {</div><div class='add'>+			pins = "MIO45", "MIO47", "MIO49";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO38", "MIO39", "MIO40",</div><div class='add'>+				"MIO41", "MIO42", "MIO43";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			low-power-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-mdio {</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux-mdio {</div><div class='add'>+			function = "mdio1";</div><div class='add'>+			groups = "mdio1_0_grp";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			function = "ethernet1";</div><div class='add'>+			groups = "ethernet1_0_grp";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb0_default: usb0-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO52", "MIO53", "MIO55";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",</div><div class='add'>+			"MIO60", "MIO61", "MIO62", "MIO63";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb0_0_grp";</div><div class='add'>+			function = "usb0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinctrl_usb1_default: usb1-default {</div><div class='add'>+		conf {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			power-source = &lt;IO_STANDARD_LVCMOS18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-rx {</div><div class='add'>+			pins = "MIO64", "MIO65", "MIO67";</div><div class='add'>+			bias-high-impedance;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		conf-tx {</div><div class='add'>+			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",</div><div class='add'>+			"MIO72", "MIO73", "MIO74", "MIO75";</div><div class='add'>+			bias-disable;</div><div class='add'>+			output-enable;</div><div class='add'>+			drive-strength = &lt;4&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mux {</div><div class='add'>+			groups = "usb1_0_grp";</div><div class='add'>+			function = "usb1";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_uart1_default&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso<br/>index 95d16904d765..d7351a17d3e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso</a></div><div class='hunk'>@@ -28,6 +28,10 @@</div><div class='ctx'> 		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";</div><div class='ctx'> 	model = "ZynqMP KV260 revA";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = "/axi/ethernet@ff0e0000"; /* &amp;gem3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ina260-u14 {</div><div class='ctx'> 		compatible = "iio-hwmon";</div><div class='ctx'> 		io-channels = &lt;&amp;u14 0&gt;, &lt;&amp;u14 1&gt;, &lt;&amp;u14 2&gt;;</div><div class='hunk'>@@ -68,6 +72,17 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */</div><div class='hunk'>@@ -118,6 +133,12 @@</div><div class='ctx'> 	assigned-clock-rates = &lt;27000000&gt;, &lt;25000000&gt;, &lt;300000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;zynqmp_dpdma {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	assigned-clock-rates = &lt;600000000&gt;;</div><div class='hunk'>@@ -129,7 +150,6 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_usb0_default&gt;;</div><div class='ctx'> 	phy-names = "usb3-phy";</div><div class='ctx'> 	phys = &lt;&amp;psgtr 2 PHY_TYPE_USB3 0 1&gt;;</div><div class='del'>-	/* missing usb5744 - u43 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dwc3_0 {</div><div class='hunk'>@@ -137,6 +157,24 @@</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	snps,usb3_lpm_capable;</div><div class='ctx'> 	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci1 { /* on CC with tuned parameters */</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso<br/>index a74d0ac7e07a..a4ae37ebaccf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso</a></div><div class='hunk'>@@ -23,6 +23,10 @@</div><div class='ctx'> 		     "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";</div><div class='ctx'> 	model = "ZynqMP KV260 revB";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = "/axi/ethernet@ff0e0000"; /* &amp;gem3 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	ina260-u14 {</div><div class='ctx'> 		compatible = "iio-hwmon";</div><div class='ctx'> 		io-channels = &lt;&amp;u14 0&gt;, &lt;&amp;u14 1&gt;, &lt;&amp;u14 2&gt;;</div><div class='hunk'>@@ -92,7 +96,10 @@</div><div class='ctx'> 		label = "ina260-u14";</div><div class='ctx'> 		reg = &lt;0x40&gt;;</div><div class='ctx'> 	};</div><div class='del'>-	/* u43 - 0x2d - USB hub */</div><div class='add'>+	hub: usb-hub@2d {</div><div class='add'>+		compatible = "microchip,usb5744";</div><div class='add'>+		reg = &lt;0x2d&gt;;</div><div class='add'>+	};</div><div class='ctx'> 	/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -109,13 +116,11 @@</div><div class='ctx'> 	phy-names = "dp-phy0", "dp-phy1";</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 0&gt;, &lt;&amp;psgtr 0 PHY_TYPE_DP 1 0&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;27000000&gt;, &lt;25000000&gt;, &lt;300000000&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@5 {</div><div class='del'>-			dpsub_dp_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -138,6 +143,26 @@</div><div class='ctx'> 	dr_mode = "host";</div><div class='ctx'> 	snps,usb3_lpm_capable;</div><div class='ctx'> 	maximum-speed = "super-speed";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	/* 2.0 hub on port 1 */</div><div class='add'>+	hub_2_0: hub@1 {</div><div class='add'>+		compatible = "usb424,2744";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* 3.0 hub on port 2 */</div><div class='add'>+	hub_3_0: hub@2 {</div><div class='add'>+		compatible = "usb424,5744";</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+		i2c-bus = &lt;&amp;hub&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio 44 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sdhci1 { /* on CC with tuned parameters */</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts<br/>new file mode 100644<br/>index 000000000000..653bd9362264<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for Xilinx ZynqMP SM-K24 RevA</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2020 - 2021, Xilinx, Inc.</div><div class='add'>+ * (C) Copyright 2022, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "zynqmp-sm-k26-revA.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ZynqMP SM-K24 RevA/B/1";</div><div class='add'>+	compatible = "xlnx,zynqmp-sm-k24-rev1", "xlnx,zynqmp-sm-k24-revB",</div><div class='add'>+		     "xlnx,zynqmp-sm-k24-revA", "xlnx,zynqmp-sm-k24",</div><div class='add'>+		     "xlnx,zynqmp";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory"; /* 2GB */</div><div class='add'>+		reg = &lt;0 0 0 0x80000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts<br/>index 86e6c4990560..500af1d2232f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts</a></div><div class='hunk'>@@ -90,24 +90,10 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ams {</div><div class='del'>-		compatible = "iio-hwmon";</div><div class='del'>-		io-channels = &lt;&amp;xilinx_ams 0&gt;, &lt;&amp;xilinx_ams 1&gt;, &lt;&amp;xilinx_ams 2&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 3&gt;, &lt;&amp;xilinx_ams 4&gt;, &lt;&amp;xilinx_ams 5&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 6&gt;, &lt;&amp;xilinx_ams 7&gt;, &lt;&amp;xilinx_ams 8&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 9&gt;, &lt;&amp;xilinx_ams 10&gt;, &lt;&amp;xilinx_ams 11&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 12&gt;, &lt;&amp;xilinx_ams 13&gt;, &lt;&amp;xilinx_ams 14&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 15&gt;, &lt;&amp;xilinx_ams 16&gt;, &lt;&amp;xilinx_ams 17&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 18&gt;, &lt;&amp;xilinx_ams 19&gt;, &lt;&amp;xilinx_ams 20&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 21&gt;, &lt;&amp;xilinx_ams 22&gt;, &lt;&amp;xilinx_ams 23&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 24&gt;, &lt;&amp;xilinx_ams 25&gt;, &lt;&amp;xilinx_ams 26&gt;,</div><div class='del'>-			&lt;&amp;xilinx_ams 27&gt;, &lt;&amp;xilinx_ams 28&gt;, &lt;&amp;xilinx_ams 29&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwm-fan {</div><div class='add'>+	pwm_fan: pwm-fan {</div><div class='ctx'> 		compatible = "pwm-fan";</div><div class='ctx'> 		status = "okay";</div><div class='del'>-		pwms = &lt;&amp;ttc0 2 40000 0&gt;;</div><div class='add'>+		pwms = &lt;&amp;ttc0 2 40000 1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +233,9 @@</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_sdhci0_default&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	xlnx,mio-bank = &lt;0&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;187498123&gt;;</div><div class='hunk'>@@ -366,10 +355,6 @@</div><div class='ctx'> 			  "", "", "", ""; /* 170 - 173 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xilinx_ams {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ams_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts<br/>new file mode 100644<br/>index 000000000000..7308983b15a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * dts file for Xilinx ZynqMP SMK-K24 RevA</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2020 - 2021, Xilinx, Inc.</div><div class='add'>+ * (C) Copyright 2022, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "zynqmp-sm-k24-revA.dts"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ZynqMP SMK-K24 RevA";</div><div class='add'>+	compatible = "xlnx,zynqmp-smk-k24-revA", "xlnx,zynqmp-smk-k24",</div><div class='add'>+		     "xlnx,zynqmp";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts<br/>index 1850325e1d6c..2ad7423c2f05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts</a></div><div class='hunk'>@@ -135,7 +135,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pinctrl_nand0_default&gt;;</div><div class='del'>-	arasan,has-mdma;</div><div class='ctx'> </div><div class='ctx'> 	nand@0 {</div><div class='ctx'> 		reg = &lt;0x0&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts<br/>index f553b317e6b2..8fbc33562bc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts</a></div><div class='hunk'>@@ -129,7 +129,6 @@</div><div class='ctx'> /* MT29F64G08AECDBJ4-6 */</div><div class='ctx'> &amp;nand0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	arasan,has-mdma;</div><div class='ctx'> 	num-cs = &lt;2&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts<br/>index c5945067cd57..4ec8a400494e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts</a></div><div class='hunk'>@@ -134,6 +134,18 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dcc {</div><div class='hunk'>@@ -509,6 +521,9 @@</div><div class='ctx'> 	xlnx,mio-bank = &lt;0&gt;;</div><div class='ctx'> 	non-removable;</div><div class='ctx'> 	disable-wp;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	cap-mmc-hw-reset;</div><div class='ctx'> 	cap-power-off-card;</div><div class='ctx'> 	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='ctx'> 	vqmmc-supply = &lt;&amp;wmmcsdio_fixed&gt;;</div><div class='hunk'>@@ -590,10 +605,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xilinx_ams {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ams_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -608,3 +619,9 @@</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 1&gt;,</div><div class='ctx'> 	       &lt;&amp;psgtr 0 PHY_TYPE_DP 1 1&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts<br/>index d2175f3dd099..e172a30e7b21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts</a></div><div class='hunk'>@@ -151,6 +151,18 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;114285000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='hunk'>@@ -1028,10 +1040,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xilinx_ams {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ams_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -1049,3 +1057,9 @@</div><div class='ctx'> 	phy-names = "dp-phy0";</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 3&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts<br/>index b1eca1bb6a63..fe8f151ed706 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts</a></div><div class='hunk'>@@ -60,6 +60,18 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='hunk'>@@ -511,10 +523,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xilinx_ams {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ams_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -533,3 +541,9 @@</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 3&gt;,</div><div class='ctx'> 	       &lt;&amp;psgtr 0 PHY_TYPE_DP 1 3&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts<br/>index ddc74d963a05..3ee8ab224722 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts</a></div><div class='hunk'>@@ -65,6 +65,18 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;27000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;can1 {</div><div class='hunk'>@@ -523,10 +535,6 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;xilinx_ams {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;ams_ps {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -545,3 +553,9 @@</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 3&gt;,</div><div class='ctx'> 	       &lt;&amp;psgtr 0 PHY_TYPE_DP 1 3&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts<br/>index 7beedd730f94..7f6c87d4d77e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts</a></div><div class='hunk'>@@ -808,8 +808,8 @@</div><div class='ctx'> 			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",</div><div class='ctx'> 			       "MIO60", "MIO61", "MIO62", "MIO63";</div><div class='ctx'> 			bias-disable;</div><div class='del'>-			drive-strength = &lt;4&gt;;</div><div class='del'>-			slew-rate = &lt;SLEW_RATE_SLOW&gt;;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			slew-rate = &lt;SLEW_RATE_FAST&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -1042,12 +1042,10 @@</div><div class='ctx'> 	phy-names = "dp-phy0", "dp-phy1";</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 3&gt;,</div><div class='ctx'> 	       &lt;&amp;psgtr 0 PHY_TYPE_DP 1 3&gt;;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ports {</div><div class='del'>-		port@5 {</div><div class='del'>-			dpsub_dp_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts<br/>index b67ff7ecf3c3..428b5558fbba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts</a></div><div class='hunk'>@@ -129,6 +129,18 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;48000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	dpcon {</div><div class='add'>+		compatible = "dp-connector";</div><div class='add'>+		label = "P11";</div><div class='add'>+		type = "full-size";</div><div class='add'>+</div><div class='add'>+		port {</div><div class='add'>+			dpcon_in: endpoint {</div><div class='add'>+				remote-endpoint = &lt;&amp;dpsub_dp_out&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;dcc {</div><div class='hunk'>@@ -494,7 +506,7 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			reg = &lt;5&gt;;</div><div class='del'>-				sc18is603@2f { /* sc18is602 - u93 */</div><div class='add'>+				sc18is603: spi@2f { /* sc18is602 - u93 */</div><div class='ctx'> 					compatible = "nxp,sc18is603";</div><div class='ctx'> 					reg = &lt;0x2f&gt;;</div><div class='ctx'> 					/* 4 gpios for CS not handled by driver */</div><div class='hunk'>@@ -864,3 +876,9 @@</div><div class='ctx'> 	phys = &lt;&amp;psgtr 1 PHY_TYPE_DP 0 1&gt;,</div><div class='ctx'> 	       &lt;&amp;psgtr 0 PHY_TYPE_DP 1 1&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;out_dp {</div><div class='add'>+	dpsub_dp_out: endpoint {</div><div class='add'>+		remote-endpoint = &lt;&amp;dpcon_in&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi<br/>index b1b31dcf6291..938b014ca923 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/boot/dts/xilinx/zynqmp.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/boot/dts/xilinx/zynqmp.dtsi</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/power/xlnx-zynqmp-power.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/xlnx-zynqmp-resets.h&gt;</div><div class='add'>+#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "xlnx,zynqmp";</div><div class='hunk'>@@ -36,6 +37,7 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		cpu0: cpu@0 {</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='hunk'>@@ -46,6 +48,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1: cpu@1 {</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='hunk'>@@ -56,6 +59,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2: cpu@2 {</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='hunk'>@@ -66,6 +70,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3: cpu@3 {</div><div class='add'>+			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 			compatible = "arm,cortex-a53";</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			enable-method = "psci";</div><div class='hunk'>@@ -182,7 +187,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='del'>-		compatible = "arm,psci-0.2";</div><div class='add'>+		compatible = "arm,psci-1.0", "arm,psci-0.2";</div><div class='ctx'> 		method = "smc";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -392,6 +397,101 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ams {</div><div class='add'>+		compatible = "iio-hwmon";</div><div class='add'>+		io-channels = &lt;&amp;xilinx_ams 0&gt;, &lt;&amp;xilinx_ams 1&gt;, &lt;&amp;xilinx_ams 2&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 3&gt;, &lt;&amp;xilinx_ams 4&gt;, &lt;&amp;xilinx_ams 5&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 6&gt;, &lt;&amp;xilinx_ams 7&gt;, &lt;&amp;xilinx_ams 8&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 9&gt;, &lt;&amp;xilinx_ams 10&gt;, &lt;&amp;xilinx_ams 11&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 12&gt;, &lt;&amp;xilinx_ams 13&gt;, &lt;&amp;xilinx_ams 14&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 15&gt;, &lt;&amp;xilinx_ams 16&gt;, &lt;&amp;xilinx_ams 17&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 18&gt;, &lt;&amp;xilinx_ams 19&gt;, &lt;&amp;xilinx_ams 20&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 21&gt;, &lt;&amp;xilinx_ams 22&gt;, &lt;&amp;xilinx_ams 23&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 24&gt;, &lt;&amp;xilinx_ams 25&gt;, &lt;&amp;xilinx_ams 26&gt;,</div><div class='add'>+			&lt;&amp;xilinx_ams 27&gt;, &lt;&amp;xilinx_ams 28&gt;, &lt;&amp;xilinx_ams 29&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	tsens_apu: thermal-sensor-apu {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;xilinx_ams 7&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsens_rpu: thermal-sensor-rpu {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;xilinx_ams 8&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsens_pl: thermal-sensor-pl {</div><div class='add'>+		compatible = "generic-adc-thermal";</div><div class='add'>+		#thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+		io-channels = &lt;&amp;xilinx_ams 20&gt;;</div><div class='add'>+		io-channel-names = "sensor-channel";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		apu-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;5000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens_apu&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				apu_passive: passive {</div><div class='add'>+					temperature = &lt;93000&gt;;</div><div class='add'>+					hysteresis = &lt;3500&gt;;</div><div class='add'>+					type = "passive";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				apu_critical: critical {</div><div class='add'>+					temperature = &lt;96500&gt;;</div><div class='add'>+					hysteresis = &lt;3500&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map {</div><div class='add'>+					trip = &lt;&amp;apu_passive&gt;;</div><div class='add'>+					cooling-device =</div><div class='add'>+						&lt;&amp;cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+						&lt;&amp;cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rpu-thermal {</div><div class='add'>+			polling-delay = &lt;10000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens_rpu&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				critical {</div><div class='add'>+					temperature = &lt;96500&gt;;</div><div class='add'>+					hysteresis = &lt;3500&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pl-thermal {</div><div class='add'>+			polling-delay = &lt;10000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;tsens_pl&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				critical {</div><div class='add'>+					temperature = &lt;96500&gt;;</div><div class='add'>+					hysteresis = &lt;3500&gt;;</div><div class='add'>+					type = "critical";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	amba: axi {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		bootph-all;</div><div class='hunk'>@@ -450,6 +550,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0xfec10000 0x0 0x1000&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu1_debug: debug@fed10000 {</div><div class='hunk'>@@ -457,6 +558,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0xfed10000 0x0 0x1000&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu2_debug: debug@fee10000 {</div><div class='hunk'>@@ -464,6 +566,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0xfee10000 0x0 0x1000&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		cpu3_debug: debug@fef10000 {</div><div class='hunk'>@@ -471,6 +574,7 @@</div><div class='ctx'> 			reg = &lt;0x0 0xfef10000 0x0 0x1000&gt;;</div><div class='ctx'> 			clock-names = "apb_pclk";</div><div class='ctx'> 			cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		/* GDMA */</div><div class='hunk'>@@ -1157,7 +1261,6 @@</div><div class='ctx'> </div><div class='ctx'> 		xilinx_ams: ams@ffa50000 {</div><div class='ctx'> 			compatible = "xlnx,zynqmp-ams";</div><div class='del'>-			status = "disabled";</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			reg = &lt;0x0 0xffa50000 0x0 0x800&gt;;</div><div class='hunk'>@@ -1207,32 +1310,35 @@</div><div class='ctx'> 				      "dp_vtc_pixel_clk_in";</div><div class='ctx'> 			power-domains = &lt;&amp;zynqmp_firmware PD_DP&gt;;</div><div class='ctx'> 			resets = &lt;&amp;zynqmp_reset ZYNQMP_RESET_DP&gt;;</div><div class='del'>-			dma-names = "vid0", "vid1", "vid2", "gfx0";</div><div class='add'>+			dma-names = "vid0", "vid1", "vid2", "gfx0",</div><div class='add'>+				    "aud0", "aud1";</div><div class='ctx'> 			dmas = &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_VIDEO0&gt;,</div><div class='ctx'> 			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_VIDEO1&gt;,</div><div class='ctx'> 			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2&gt;,</div><div class='del'>-			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS&gt;;</div><div class='add'>+			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS&gt;,</div><div class='add'>+			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_AUDIO0&gt;,</div><div class='add'>+			       &lt;&amp;zynqmp_dpdma ZYNQMP_DPDMA_AUDIO1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			ports {</div><div class='ctx'> 				#address-cells = &lt;1&gt;;</div><div class='ctx'> 				#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-				port@0 {</div><div class='add'>+				live_video: port@0 {</div><div class='ctx'> 					reg = &lt;0&gt;;</div><div class='ctx'> 				};</div><div class='del'>-				port@1 {</div><div class='add'>+				live_gfx: port@1 {</div><div class='ctx'> 					reg = &lt;1&gt;;</div><div class='ctx'> 				};</div><div class='del'>-				port@2 {</div><div class='add'>+				live_audio: port@2 {</div><div class='ctx'> 					reg = &lt;2&gt;;</div><div class='ctx'> 				};</div><div class='del'>-				port@3 {</div><div class='add'>+				out_video: port@3 {</div><div class='ctx'> 					reg = &lt;3&gt;;</div><div class='ctx'> 				};</div><div class='del'>-				port@4 {</div><div class='add'>+				out_audio: port@4 {</div><div class='ctx'> 					reg = &lt;4&gt;;</div><div class='ctx'> 				};</div><div class='del'>-				port@5 {</div><div class='add'>+				out_dp: port@5 {</div><div class='ctx'> 					reg = &lt;5&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig<br/>index 5fdbfea7a5b2..e3a2d37bd104 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/configs/defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/configs/defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/configs/defconfig</a></div><div class='hunk'>@@ -38,12 +38,16 @@ CONFIG_ARCH_AIROHA=y</div><div class='ctx'> CONFIG_ARCH_SUNXI=y</div><div class='ctx'> CONFIG_ARCH_ALPINE=y</div><div class='ctx'> CONFIG_ARCH_APPLE=y</div><div class='add'>+CONFIG_ARCH_ARTPEC=y</div><div class='add'>+CONFIG_ARCH_AXIADO=y</div><div class='ctx'> CONFIG_ARCH_BCM=y</div><div class='ctx'> CONFIG_ARCH_BCM2835=y</div><div class='ctx'> CONFIG_ARCH_BCM_IPROC=y</div><div class='ctx'> CONFIG_ARCH_BCMBCA=y</div><div class='ctx'> CONFIG_ARCH_BRCMSTB=y</div><div class='ctx'> CONFIG_ARCH_BERLIN=y</div><div class='add'>+CONFIG_ARCH_BLAIZE=y</div><div class='add'>+CONFIG_ARCH_CIX=y</div><div class='ctx'> CONFIG_ARCH_EXYNOS=y</div><div class='ctx'> CONFIG_ARCH_SPARX5=y</div><div class='ctx'> CONFIG_ARCH_K3=y</div><div class='hunk'>@@ -65,6 +69,7 @@ CONFIG_ARCH_RENESAS=y</div><div class='ctx'> CONFIG_ARCH_ROCKCHIP=y</div><div class='ctx'> CONFIG_ARCH_SEATTLE=y</div><div class='ctx'> CONFIG_ARCH_INTEL_SOCFPGA=y</div><div class='add'>+CONFIG_ARCH_SOPHGO=y</div><div class='ctx'> CONFIG_ARCH_STM32=y</div><div class='ctx'> CONFIG_ARCH_SYNQUACER=y</div><div class='ctx'> CONFIG_ARCH_TEGRA=y</div><div class='hunk'>@@ -176,6 +181,7 @@ CONFIG_NET_CLS_FLOWER=m</div><div class='ctx'> CONFIG_NET_CLS_ACT=y</div><div class='ctx'> CONFIG_NET_ACT_GACT=m</div><div class='ctx'> CONFIG_NET_ACT_MIRRED=m</div><div class='add'>+CONFIG_HSR=m</div><div class='ctx'> CONFIG_NET_ACT_GATE=m</div><div class='ctx'> CONFIG_QRTR_SMD=m</div><div class='ctx'> CONFIG_QRTR_TUN=m</div><div class='hunk'>@@ -200,6 +206,7 @@ CONFIG_CFG80211=m</div><div class='ctx'> CONFIG_MAC80211=m</div><div class='ctx'> CONFIG_MAC80211_LEDS=y</div><div class='ctx'> CONFIG_RFKILL=m</div><div class='add'>+CONFIG_RFKILL_GPIO=m</div><div class='ctx'> CONFIG_NET_9P=y</div><div class='ctx'> CONFIG_NET_9P_VIRTIO=y</div><div class='ctx'> CONFIG_NFC=m</div><div class='hunk'>@@ -262,6 +269,8 @@ CONFIG_IMX_SCU=y</div><div class='ctx'> CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE=y</div><div class='ctx'> CONFIG_QCOM_QSEECOM=y</div><div class='ctx'> CONFIG_QCOM_QSEECOM_UEFISECAPP=y</div><div class='add'>+CONFIG_EXYNOS_ACPM_PROTOCOL=m</div><div class='add'>+CONFIG_TEGRA_BPMP=y</div><div class='ctx'> CONFIG_GNSS=m</div><div class='ctx'> CONFIG_GNSS_MTK_SERIAL=m</div><div class='ctx'> CONFIG_MTD=y</div><div class='hunk'>@@ -282,6 +291,7 @@ CONFIG_MTD_NAND_BRCMNAND=m</div><div class='ctx'> CONFIG_MTD_NAND_FSL_IFC=y</div><div class='ctx'> CONFIG_MTD_NAND_QCOM=y</div><div class='ctx'> CONFIG_MTD_SPI_NOR=y</div><div class='add'>+CONFIG_MTD_SPI_NAND=m</div><div class='ctx'> CONFIG_MTD_UBI=m</div><div class='ctx'> CONFIG_MTD_HYPERBUS=m</div><div class='ctx'> CONFIG_HBMC_AM654=m</div><div class='hunk'>@@ -330,6 +340,7 @@ CONFIG_VIRTIO_NET=y</div><div class='ctx'> CONFIG_MHI_NET=m</div><div class='ctx'> CONFIG_NET_DSA_BCM_SF2=m</div><div class='ctx'> CONFIG_NET_DSA_MSCC_FELIX=m</div><div class='add'>+CONFIG_ENA_ETHERNET=m</div><div class='ctx'> CONFIG_AMD_XGBE=y</div><div class='ctx'> CONFIG_NET_XGENE=y</div><div class='ctx'> CONFIG_ATL1C=m</div><div class='hunk'>@@ -358,6 +369,8 @@ CONFIG_IGBVF=y</div><div class='ctx'> CONFIG_MVNETA=y</div><div class='ctx'> CONFIG_MVPP2=y</div><div class='ctx'> CONFIG_SKY2=y</div><div class='add'>+CONFIG_NET_VENDOR_MEDIATEK=y</div><div class='add'>+CONFIG_NET_MEDIATEK_STAR_EMAC=m</div><div class='ctx'> CONFIG_MLX4_EN=m</div><div class='ctx'> CONFIG_MLX5_CORE=m</div><div class='ctx'> CONFIG_MLX5_CORE_EN=y</div><div class='hunk'>@@ -373,6 +386,7 @@ CONFIG_SMSC911X=y</div><div class='ctx'> CONFIG_SNI_AVE=y</div><div class='ctx'> CONFIG_SNI_NETSEC=y</div><div class='ctx'> CONFIG_STMMAC_ETH=m</div><div class='add'>+CONFIG_DWMAC_MEDIATEK=m</div><div class='ctx'> CONFIG_DWMAC_TEGRA=m</div><div class='ctx'> CONFIG_TI_K3_AM65_CPSW_NUSS=y</div><div class='ctx'> CONFIG_TI_ICSSG_PRUETH=m</div><div class='hunk'>@@ -428,6 +442,7 @@ CONFIG_IWLMVM=m</div><div class='ctx'> CONFIG_MWIFIEX=m</div><div class='ctx'> CONFIG_MWIFIEX_SDIO=m</div><div class='ctx'> CONFIG_MWIFIEX_PCIE=m</div><div class='add'>+CONFIG_MWIFIEX_USB=m</div><div class='ctx'> CONFIG_MT7921E=m</div><div class='ctx'> CONFIG_RSI_91X=m</div><div class='ctx'> CONFIG_WL18XX=m</div><div class='hunk'>@@ -486,6 +501,7 @@ CONFIG_SERIAL_TEGRA_TCU=y</div><div class='ctx'> CONFIG_SERIAL_IMX=y</div><div class='ctx'> CONFIG_SERIAL_IMX_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_RSCI=y</div><div class='ctx'> CONFIG_SERIAL_MSM=y</div><div class='ctx'> CONFIG_SERIAL_MSM_CONSOLE=y</div><div class='ctx'> CONFIG_SERIAL_QCOM_GENI=y</div><div class='hunk'>@@ -516,6 +532,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_MUX=y</div><div class='ctx'> CONFIG_I2C_MUX_PCA954x=y</div><div class='add'>+CONFIG_I2C_MUX_PINCTRL=m</div><div class='ctx'> CONFIG_I2C_BCM2835=m</div><div class='ctx'> CONFIG_I2C_CADENCE=m</div><div class='ctx'> CONFIG_I2C_DESIGNWARE_CORE=y</div><div class='hunk'>@@ -565,18 +582,22 @@ CONFIG_SPI_ROCKCHIP=y</div><div class='ctx'> CONFIG_SPI_ROCKCHIP_SFC=m</div><div class='ctx'> CONFIG_SPI_RPCIF=m</div><div class='ctx'> CONFIG_SPI_RSPI=m</div><div class='add'>+CONFIG_SPI_RZV2H_RSPI=m</div><div class='ctx'> CONFIG_SPI_RZV2M_CSI=m</div><div class='ctx'> CONFIG_SPI_QCOM_QSPI=m</div><div class='ctx'> CONFIG_SPI_QUP=y</div><div class='ctx'> CONFIG_SPI_QCOM_GENI=m</div><div class='ctx'> CONFIG_SPI_S3C64XX=y</div><div class='ctx'> CONFIG_SPI_SH_MSIOF=m</div><div class='add'>+CONFIG_SPI_STM32_OSPI=m</div><div class='ctx'> CONFIG_SPI_SUN6I=y</div><div class='ctx'> CONFIG_SPI_TEGRA210_QUAD=m</div><div class='ctx'> CONFIG_SPI_TEGRA114=m</div><div class='ctx'> CONFIG_SPI_SPIDEV=m</div><div class='ctx'> CONFIG_SPMI=y</div><div class='ctx'> CONFIG_SPMI_MTK_PMIF=m</div><div class='add'>+CONFIG_PINCTRL_BRCMSTB=y</div><div class='add'>+CONFIG_PINCTRL_BCM2712=y</div><div class='ctx'> CONFIG_PINCTRL_DA9062=m</div><div class='ctx'> CONFIG_PINCTRL_MAX77620=y</div><div class='ctx'> CONFIG_PINCTRL_RK805=m</div><div class='hunk'>@@ -592,10 +613,12 @@ CONFIG_PINCTRL_IMX8QM=y</div><div class='ctx'> CONFIG_PINCTRL_IMX8QXP=y</div><div class='ctx'> CONFIG_PINCTRL_IMX8DXL=y</div><div class='ctx'> CONFIG_PINCTRL_IMX8ULP=y</div><div class='add'>+CONFIG_PINCTRL_IMX91=y</div><div class='ctx'> CONFIG_PINCTRL_IMX93=y</div><div class='ctx'> CONFIG_PINCTRL_MSM=y</div><div class='ctx'> CONFIG_PINCTRL_IPQ5018=y</div><div class='ctx'> CONFIG_PINCTRL_IPQ5332=y</div><div class='add'>+CONFIG_PINCTRL_IPQ5424=y</div><div class='ctx'> CONFIG_PINCTRL_IPQ8074=y</div><div class='ctx'> CONFIG_PINCTRL_IPQ6018=y</div><div class='ctx'> CONFIG_PINCTRL_IPQ9574=y</div><div class='hunk'>@@ -607,8 +630,11 @@ CONFIG_PINCTRL_MSM8996=y</div><div class='ctx'> CONFIG_PINCTRL_MSM8998=y</div><div class='ctx'> CONFIG_PINCTRL_QCM2290=y</div><div class='ctx'> CONFIG_PINCTRL_QCS404=y</div><div class='add'>+CONFIG_PINCTRL_QCS615=y</div><div class='add'>+CONFIG_PINCTRL_QCS8300=y</div><div class='ctx'> CONFIG_PINCTRL_QDF2XXX=y</div><div class='ctx'> CONFIG_PINCTRL_QDU1000=y</div><div class='add'>+CONFIG_PINCTRL_RP1=m</div><div class='ctx'> CONFIG_PINCTRL_SA8775P=y</div><div class='ctx'> CONFIG_PINCTRL_SC7180=y</div><div class='ctx'> CONFIG_PINCTRL_SC7280=y</div><div class='hunk'>@@ -629,6 +655,7 @@ CONFIG_PINCTRL_SM8350=y</div><div class='ctx'> CONFIG_PINCTRL_SM8450=y</div><div class='ctx'> CONFIG_PINCTRL_SM8550=y</div><div class='ctx'> CONFIG_PINCTRL_SM8650=y</div><div class='add'>+CONFIG_PINCTRL_SM8750=y</div><div class='ctx'> CONFIG_PINCTRL_X1E80100=y</div><div class='ctx'> CONFIG_PINCTRL_QCOM_SPMI_PMIC=y</div><div class='ctx'> CONFIG_PINCTRL_LPASS_LPI=m</div><div class='hunk'>@@ -640,6 +667,7 @@ CONFIG_PINCTRL_SM8450_LPASS_LPI=m</div><div class='ctx'> CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m</div><div class='ctx'> CONFIG_PINCTRL_SM8550_LPASS_LPI=m</div><div class='ctx'> CONFIG_PINCTRL_SM8650_LPASS_LPI=m</div><div class='add'>+CONFIG_PINCTRL_SOPHGO_SG2000=y</div><div class='ctx'> CONFIG_GPIO_ALTERA=m</div><div class='ctx'> CONFIG_GPIO_DAVINCI=y</div><div class='ctx'> CONFIG_GPIO_DWAPB=y</div><div class='hunk'>@@ -659,12 +687,15 @@ CONFIG_GPIO_MAX732X=y</div><div class='ctx'> CONFIG_GPIO_PCA953X=y</div><div class='ctx'> CONFIG_GPIO_PCA953X_IRQ=y</div><div class='ctx'> CONFIG_GPIO_ADP5585=m</div><div class='add'>+CONFIG_GPIO_PCF857X=m</div><div class='add'>+CONFIG_GPIO_TPIC2810=m</div><div class='ctx'> CONFIG_GPIO_BD9571MWV=m</div><div class='ctx'> CONFIG_GPIO_MAX77620=y</div><div class='ctx'> CONFIG_GPIO_SL28CPLD=m</div><div class='ctx'> CONFIG_GPIO_AGGREGATOR=m</div><div class='ctx'> CONFIG_POWER_RESET_MSM=y</div><div class='ctx'> CONFIG_POWER_RESET_QCOM_PON=m</div><div class='add'>+CONFIG_POWER_RESET_TORADEX_EC=m</div><div class='ctx'> CONFIG_POWER_RESET_XGENE=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON_POWEROFF=y</div><div class='hunk'>@@ -689,6 +720,8 @@ CONFIG_SENSORS_RASPBERRYPI_HWMON=m</div><div class='ctx'> CONFIG_SENSORS_SL28CPLD=m</div><div class='ctx'> CONFIG_SENSORS_INA2XX=m</div><div class='ctx'> CONFIG_SENSORS_INA3221=m</div><div class='add'>+CONFIG_SENSORS_TMP102=m</div><div class='add'>+CONFIG_MISC_RP1=m</div><div class='ctx'> CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_DEVFREQ_THERMAL=y</div><div class='hunk'>@@ -736,6 +769,7 @@ CONFIG_MESON_WATCHDOG=m</div><div class='ctx'> CONFIG_ARM_SMC_WATCHDOG=y</div><div class='ctx'> CONFIG_RENESAS_WDT=y</div><div class='ctx'> CONFIG_RENESAS_RZG2LWDT=y</div><div class='add'>+CONFIG_RENESAS_RZV2HWDT=y</div><div class='ctx'> CONFIG_UNIPHIER_WATCHDOG=y</div><div class='ctx'> CONFIG_PM8916_WATCHDOG=m</div><div class='ctx'> CONFIG_BCM2835_WDT=y</div><div class='hunk'>@@ -750,12 +784,14 @@ CONFIG_MFD_EXYNOS_LPASS=m</div><div class='ctx'> CONFIG_MFD_HI6421_PMIC=y</div><div class='ctx'> CONFIG_MFD_HI655X_PMIC=y</div><div class='ctx'> CONFIG_MFD_MAX77620=y</div><div class='add'>+CONFIG_MFD_MAX77759=m</div><div class='ctx'> CONFIG_MFD_MT6360=y</div><div class='ctx'> CONFIG_MFD_MT6397=y</div><div class='ctx'> CONFIG_MFD_SPMI_PMIC=y</div><div class='ctx'> CONFIG_MFD_RK8XX_I2C=y</div><div class='ctx'> CONFIG_MFD_RK8XX_SPI=y</div><div class='del'>-CONFIG_MFD_SEC_CORE=y</div><div class='add'>+CONFIG_MFD_SEC_ACPM=m</div><div class='add'>+CONFIG_MFD_SEC_I2C=y</div><div class='ctx'> CONFIG_MFD_SL28CPLD=y</div><div class='ctx'> CONFIG_RZ_MTU3=y</div><div class='ctx'> CONFIG_MFD_TI_AM335X_TSCADC=m</div><div class='hunk'>@@ -763,6 +799,8 @@ CONFIG_MFD_TI_LP873X=m</div><div class='ctx'> CONFIG_MFD_TPS65219=y</div><div class='ctx'> CONFIG_MFD_TPS6594_I2C=m</div><div class='ctx'> CONFIG_MFD_ROHM_BD718XX=y</div><div class='add'>+CONFIG_MFD_STM32_LPTIMER=m</div><div class='add'>+CONFIG_MFD_STM32_TIMERS=m</div><div class='ctx'> CONFIG_MFD_WCD934X=m</div><div class='ctx'> CONFIG_MFD_KHADAS_MCU=m</div><div class='ctx'> CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='hunk'>@@ -827,12 +865,14 @@ CONFIG_VIDEO_MEDIATEK_JPEG=m</div><div class='ctx'> CONFIG_VIDEO_MEDIATEK_VCODEC=m</div><div class='ctx'> CONFIG_VIDEO_WAVE_VPU=m</div><div class='ctx'> CONFIG_VIDEO_E5010_JPEG_ENC=m</div><div class='add'>+CONFIG_VIDEO_MEDIATEK_MDP3=m</div><div class='ctx'> CONFIG_VIDEO_IMX7_CSI=m</div><div class='ctx'> CONFIG_VIDEO_IMX_MIPI_CSIS=m</div><div class='ctx'> CONFIG_VIDEO_IMX8_ISI=m</div><div class='ctx'> CONFIG_VIDEO_IMX8_ISI_M2M=y</div><div class='ctx'> CONFIG_VIDEO_IMX8_JPEG=m</div><div class='ctx'> CONFIG_VIDEO_QCOM_CAMSS=m</div><div class='add'>+CONFIG_VIDEO_QCOM_IRIS=m</div><div class='ctx'> CONFIG_VIDEO_QCOM_VENUS=m</div><div class='ctx'> CONFIG_VIDEO_RCAR_ISP=m</div><div class='ctx'> CONFIG_VIDEO_RCAR_CSI2=m</div><div class='hunk'>@@ -843,10 +883,13 @@ CONFIG_VIDEO_RENESAS_FCP=m</div><div class='ctx'> CONFIG_VIDEO_RENESAS_FDP1=m</div><div class='ctx'> CONFIG_VIDEO_RENESAS_VSP1=m</div><div class='ctx'> CONFIG_VIDEO_RCAR_DRIF=m</div><div class='add'>+CONFIG_VIDEO_ROCKCHIP_RGA=m</div><div class='ctx'> CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m</div><div class='ctx'> CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m</div><div class='ctx'> CONFIG_VIDEO_SAMSUNG_S5P_MFC=m</div><div class='ctx'> CONFIG_VIDEO_SUN6I_CSI=m</div><div class='add'>+CONFIG_VIDEO_SYNOPSYS_HDMIRX=m</div><div class='add'>+CONFIG_VIDEO_SYNOPSYS_HDMIRX_LOAD_DEFAULT_EDID=y</div><div class='ctx'> CONFIG_VIDEO_TI_J721E_CSI2RX=m</div><div class='ctx'> CONFIG_VIDEO_HANTRO=m</div><div class='ctx'> CONFIG_VIDEO_IMX219=m</div><div class='hunk'>@@ -871,6 +914,7 @@ CONFIG_ROCKCHIP_VOP2=y</div><div class='ctx'> CONFIG_ROCKCHIP_ANALOGIX_DP=y</div><div class='ctx'> CONFIG_ROCKCHIP_CDN_DP=y</div><div class='ctx'> CONFIG_ROCKCHIP_DW_HDMI=y</div><div class='add'>+CONFIG_ROCKCHIP_DW_HDMI_QP=y</div><div class='ctx'> CONFIG_ROCKCHIP_DW_MIPI_DSI=y</div><div class='ctx'> CONFIG_ROCKCHIP_INNO_HDMI=y</div><div class='ctx'> CONFIG_ROCKCHIP_LVDS=y</div><div class='hunk'>@@ -889,6 +933,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m</div><div class='ctx'> CONFIG_DRM_PANEL_LVDS=m</div><div class='ctx'> CONFIG_DRM_PANEL_SIMPLE=m</div><div class='ctx'> CONFIG_DRM_PANEL_EDP=m</div><div class='add'>+CONFIG_DRM_PANEL_HIMAX_HX8279=m</div><div class='ctx'> CONFIG_DRM_PANEL_ILITEK_ILI9882T=m</div><div class='ctx'> CONFIG_DRM_PANEL_KHADAS_TS050=m</div><div class='ctx'> CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m</div><div class='hunk'>@@ -896,9 +941,12 @@ CONFIG_DRM_PANEL_NOVATEK_NT36672E=m</div><div class='ctx'> CONFIG_DRM_PANEL_RAYDIUM_RM67191=m</div><div class='ctx'> CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m</div><div class='ctx'> CONFIG_DRM_PANEL_SITRONIX_ST7703=m</div><div class='add'>+CONFIG_DRM_PANEL_STARTEK_KD070FHFID015=m</div><div class='ctx'> CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m</div><div class='ctx'> CONFIG_DRM_PANEL_VISIONOX_VTDR6130=m</div><div class='add'>+CONFIG_DRM_DISPLAY_CONNECTOR=m</div><div class='ctx'> CONFIG_DRM_FSL_LDB=m</div><div class='add'>+CONFIG_DRM_ITE_IT6263=m</div><div class='ctx'> CONFIG_DRM_LONTIUM_LT8912B=m</div><div class='ctx'> CONFIG_DRM_LONTIUM_LT9611=m</div><div class='ctx'> CONFIG_DRM_LONTIUM_LT9611UXC=m</div><div class='hunk'>@@ -917,6 +965,7 @@ CONFIG_DRM_TI_SN65DSI86=m</div><div class='ctx'> CONFIG_DRM_ANALOGIX_ANX7625=m</div><div class='ctx'> CONFIG_DRM_I2C_ADV7511=m</div><div class='ctx'> CONFIG_DRM_I2C_ADV7511_AUDIO=y</div><div class='add'>+CONFIG_DRM_CDNS_DSI=m</div><div class='ctx'> CONFIG_DRM_CDNS_MHDP8546=m</div><div class='ctx'> CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m</div><div class='ctx'> CONFIG_DRM_DW_HDMI_AHB_AUDIO=m</div><div class='hunk'>@@ -947,12 +996,12 @@ CONFIG_BACKLIGHT_LP855X=m</div><div class='ctx'> CONFIG_LOGO=y</div><div class='ctx'> # CONFIG_LOGO_LINUX_MONO is not set</div><div class='ctx'> # CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='del'>-CONFIG_SOUND=y</div><div class='del'>-CONFIG_SND=y</div><div class='add'>+CONFIG_SOUND=m</div><div class='add'>+CONFIG_SND=m</div><div class='ctx'> CONFIG_SND_ALOOP=m</div><div class='ctx'> CONFIG_SND_HDA_TEGRA=m</div><div class='ctx'> CONFIG_SND_HDA_CODEC_HDMI=m</div><div class='del'>-CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_SOC=m</div><div class='ctx'> CONFIG_SND_BCM2835_SOC_I2S=m</div><div class='ctx'> CONFIG_SND_SOC_FSL_ASRC=m</div><div class='ctx'> CONFIG_SND_SOC_FSL_MICFIL=m</div><div class='hunk'>@@ -964,6 +1013,8 @@ CONFIG_SND_SOC_IMX_AUDMIX=m</div><div class='ctx'> CONFIG_SND_SOC_MT8183=m</div><div class='ctx'> CONFIG_SND_SOC_MT8183_MT6358_TS3A227E_MAX98357A=m</div><div class='ctx'> CONFIG_SND_SOC_MT8183_DA7219_MAX98357A=m</div><div class='add'>+CONFIG_SND_SOC_MT8188=m</div><div class='add'>+CONFIG_SND_SOC_MT8188_MT6359=m</div><div class='ctx'> CONFIG_SND_SOC_MT8192=m</div><div class='ctx'> CONFIG_SND_SOC_MT8192_MT6359_RT1015_RT5682=m</div><div class='ctx'> CONFIG_SND_SOC_MT8195=m</div><div class='hunk'>@@ -983,15 +1034,18 @@ CONFIG_SND_SOC_SC7280=m</div><div class='ctx'> CONFIG_SND_SOC_X1E80100=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=m</div><div class='add'>+CONFIG_SND_SOC_ROCKCHIP_SAI=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP_SPDIF=m</div><div class='ctx'> CONFIG_SND_SOC_ROCKCHIP_RT5645=m</div><div class='ctx'> CONFIG_SND_SOC_RK3399_GRU_SOUND=m</div><div class='del'>-CONFIG_SND_SOC_SAMSUNG=y</div><div class='ctx'> CONFIG_SND_SOC_RCAR=m</div><div class='add'>+CONFIG_SND_SOC_MSIOF=m</div><div class='ctx'> CONFIG_SND_SOC_RZ=m</div><div class='add'>+CONFIG_SND_SOC_SAMSUNG=m</div><div class='ctx'> CONFIG_SND_SOC_SOF_TOPLEVEL=y</div><div class='del'>-CONFIG_SND_SOC_SOF_OF=y</div><div class='add'>+CONFIG_SND_SOC_SOF_OF=m</div><div class='ctx'> CONFIG_SND_SOC_SOF_MTK_TOPLEVEL=y</div><div class='add'>+CONFIG_SND_SOC_SOF_MT8186=m</div><div class='ctx'> CONFIG_SND_SOC_SOF_MT8195=m</div><div class='ctx'> CONFIG_SND_SUN8I_CODEC=m</div><div class='ctx'> CONFIG_SND_SUN8I_CODEC_ANALOG=m</div><div class='hunk'>@@ -1020,6 +1074,7 @@ CONFIG_SND_SOC_DA7213=m</div><div class='ctx'> CONFIG_SND_SOC_ES7134=m</div><div class='ctx'> CONFIG_SND_SOC_ES7241=m</div><div class='ctx'> CONFIG_SND_SOC_ES8316=m</div><div class='add'>+CONFIG_SND_SOC_ES8328_I2C=m</div><div class='ctx'> CONFIG_SND_SOC_GTM601=m</div><div class='ctx'> CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m</div><div class='ctx'> CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m</div><div class='hunk'>@@ -1036,7 +1091,6 @@ CONFIG_SND_SOC_TLV320AIC32X4_I2C=m</div><div class='ctx'> CONFIG_SND_SOC_TLV320AIC3X_I2C=m</div><div class='ctx'> CONFIG_SND_SOC_WCD9335=m</div><div class='ctx'> CONFIG_SND_SOC_WCD934X=m</div><div class='del'>-CONFIG_SND_SOC_WCD939X=m</div><div class='ctx'> CONFIG_SND_SOC_WCD939X_SDW=m</div><div class='ctx'> CONFIG_SND_SOC_WM8524=m</div><div class='ctx'> CONFIG_SND_SOC_WM8904=m</div><div class='hunk'>@@ -1119,6 +1173,9 @@ CONFIG_USB_MASS_STORAGE=m</div><div class='ctx'> CONFIG_TYPEC=m</div><div class='ctx'> CONFIG_TYPEC_TCPM=m</div><div class='ctx'> CONFIG_TYPEC_TCPCI=m</div><div class='add'>+CONFIG_TYPEC_RT1711H=m</div><div class='add'>+CONFIG_TYPEC_MT6360=m</div><div class='add'>+CONFIG_TYPEC_TCPCI_MAXIM=m</div><div class='ctx'> CONFIG_TYPEC_FUSB302=m</div><div class='ctx'> CONFIG_TYPEC_QCOM_PMIC=m</div><div class='ctx'> CONFIG_TYPEC_UCSI=m</div><div class='hunk'>@@ -1128,7 +1185,9 @@ CONFIG_TYPEC_TPS6598X=m</div><div class='ctx'> CONFIG_TYPEC_HD3SS3220=m</div><div class='ctx'> CONFIG_TYPEC_MUX_FSA4480=m</div><div class='ctx'> CONFIG_TYPEC_MUX_GPIO_SBU=m</div><div class='add'>+CONFIG_TYPEC_MUX_IT5205=m</div><div class='ctx'> CONFIG_TYPEC_MUX_NB7VPQ904M=m</div><div class='add'>+CONFIG_TYPEC_MUX_PS883X=m</div><div class='ctx'> CONFIG_TYPEC_MUX_WCD939X_USBSS=m</div><div class='ctx'> CONFIG_TYPEC_DP_ALTMODE=m</div><div class='ctx'> CONFIG_MMC=y</div><div class='hunk'>@@ -1170,6 +1229,7 @@ CONFIG_SCSI_UFS_HISI=y</div><div class='ctx'> CONFIG_SCSI_UFS_RENESAS=m</div><div class='ctx'> CONFIG_SCSI_UFS_TI_J721E=m</div><div class='ctx'> CONFIG_SCSI_UFS_EXYNOS=y</div><div class='add'>+CONFIG_SCSI_UFS_ROCKCHIP=y</div><div class='ctx'> CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_LEDS_CLASS_MULTICOLOR=m</div><div class='hunk'>@@ -1202,6 +1262,7 @@ CONFIG_RTC_DRV_BQ32K=m</div><div class='ctx'> CONFIG_RTC_DRV_RX8581=m</div><div class='ctx'> CONFIG_RTC_DRV_RV3028=m</div><div class='ctx'> CONFIG_RTC_DRV_RV8803=m</div><div class='add'>+CONFIG_RTC_DRV_S32G=m</div><div class='ctx'> CONFIG_RTC_DRV_S5M=y</div><div class='ctx'> CONFIG_RTC_DRV_DS3232=y</div><div class='ctx'> CONFIG_RTC_DRV_PCF2127=m</div><div class='hunk'>@@ -1221,6 +1282,7 @@ CONFIG_RTC_DRV_IMX_SC=m</div><div class='ctx'> CONFIG_RTC_DRV_MT6397=m</div><div class='ctx'> CONFIG_RTC_DRV_XGENE=y</div><div class='ctx'> CONFIG_RTC_DRV_TI_K3=m</div><div class='add'>+CONFIG_RTC_DRV_RENESAS_RTCA3=m</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_DMA_BCM2835=y</div><div class='ctx'> CONFIG_DMA_SUN6I=m</div><div class='hunk'>@@ -1234,6 +1296,7 @@ CONFIG_PL330_DMA=y</div><div class='ctx'> CONFIG_TEGRA186_GPC_DMA=y</div><div class='ctx'> CONFIG_TEGRA20_APB_DMA=y</div><div class='ctx'> CONFIG_TEGRA210_ADMA=m</div><div class='add'>+CONFIG_MTK_UART_APDMA=m</div><div class='ctx'> CONFIG_QCOM_BAM_DMA=y</div><div class='ctx'> CONFIG_QCOM_GPI_DMA=m</div><div class='ctx'> CONFIG_QCOM_HIDMA_MGMT=y</div><div class='hunk'>@@ -1244,6 +1307,7 @@ CONFIG_RENESAS_USB_DMAC=m</div><div class='ctx'> CONFIG_RZ_DMAC=y</div><div class='ctx'> CONFIG_TI_K3_UDMA=y</div><div class='ctx'> CONFIG_TI_K3_UDMA_GLUE_LAYER=y</div><div class='add'>+CONFIG_STM32_DMA3=m</div><div class='ctx'> CONFIG_VFIO=y</div><div class='ctx'> CONFIG_VFIO_PCI=y</div><div class='ctx'> CONFIG_VIRTIO_PCI=y</div><div class='hunk'>@@ -1251,6 +1315,8 @@ CONFIG_VIRTIO_BALLOON=y</div><div class='ctx'> CONFIG_VIRTIO_MMIO=y</div><div class='ctx'> CONFIG_XEN_GNTDEV=y</div><div class='ctx'> CONFIG_XEN_GRANT_DEV_ALLOC=y</div><div class='add'>+CONFIG_GREYBUS=m</div><div class='add'>+CONFIG_GREYBUS_BEAGLEPLAY=m</div><div class='ctx'> CONFIG_STAGING=y</div><div class='ctx'> CONFIG_STAGING_MEDIA=y</div><div class='ctx'> CONFIG_VIDEO_MAX96712=m</div><div class='hunk'>@@ -1270,6 +1336,7 @@ CONFIG_COMMON_CLK_CS2000_CP=y</div><div class='ctx'> CONFIG_COMMON_CLK_FSL_SAI=y</div><div class='ctx'> CONFIG_COMMON_CLK_S2MPS11=y</div><div class='ctx'> CONFIG_COMMON_CLK_PWM=y</div><div class='add'>+CONFIG_COMMON_CLK_RP1=m</div><div class='ctx'> CONFIG_COMMON_CLK_RS9_PCIE=y</div><div class='ctx'> CONFIG_COMMON_CLK_VC3=y</div><div class='ctx'> CONFIG_COMMON_CLK_VC5=y</div><div class='hunk'>@@ -1301,6 +1368,8 @@ CONFIG_CLK_X1E80100_DISPCC=m</div><div class='ctx'> CONFIG_CLK_X1E80100_GCC=y</div><div class='ctx'> CONFIG_CLK_X1E80100_GPUCC=m</div><div class='ctx'> CONFIG_CLK_X1E80100_TCSRCC=y</div><div class='add'>+CONFIG_CLK_X1P42100_GPUCC=m</div><div class='add'>+CONFIG_CLK_QCM2290_GPUCC=m</div><div class='ctx'> CONFIG_QCOM_A53PLL=y</div><div class='ctx'> CONFIG_QCOM_CLK_APCS_MSM8916=y</div><div class='ctx'> CONFIG_QCOM_CLK_APCC_MSM8996=y</div><div class='hunk'>@@ -1308,11 +1377,14 @@ CONFIG_QCOM_CLK_SMD_RPM=y</div><div class='ctx'> CONFIG_QCOM_CLK_RPMH=y</div><div class='ctx'> CONFIG_IPQ_APSS_6018=y</div><div class='ctx'> CONFIG_IPQ_APSS_5018=y</div><div class='add'>+CONFIG_IPQ_CMN_PLL=m</div><div class='ctx'> CONFIG_IPQ_GCC_5018=y</div><div class='ctx'> CONFIG_IPQ_GCC_5332=y</div><div class='add'>+CONFIG_IPQ_GCC_5424=y</div><div class='ctx'> CONFIG_IPQ_GCC_6018=y</div><div class='ctx'> CONFIG_IPQ_GCC_8074=y</div><div class='ctx'> CONFIG_IPQ_GCC_9574=y</div><div class='add'>+CONFIG_IPQ_NSSCC_9574=m</div><div class='ctx'> CONFIG_MSM_GCC_8916=y</div><div class='ctx'> CONFIG_MSM_MMCC_8994=m</div><div class='ctx'> CONFIG_MSM_GCC_8994=y</div><div class='hunk'>@@ -1322,11 +1394,20 @@ CONFIG_MSM_GCC_8998=y</div><div class='ctx'> CONFIG_MSM_MMCC_8998=m</div><div class='ctx'> CONFIG_QCM_GCC_2290=y</div><div class='ctx'> CONFIG_QCM_DISPCC_2290=m</div><div class='add'>+CONFIG_QCS_DISPCC_615=m</div><div class='add'>+CONFIG_QCS_CAMCC_615=m</div><div class='ctx'> CONFIG_QCS_GCC_404=y</div><div class='add'>+CONFIG_QCS_GCC_615=y</div><div class='add'>+CONFIG_QCS_GCC_8300=y</div><div class='add'>+CONFIG_SC_CAMCC_7280=m</div><div class='add'>+CONFIG_SA_CAMCC_8775P=m</div><div class='add'>+CONFIG_QCS_GPUCC_615=m</div><div class='add'>+CONFIG_QCS_VIDEOCC_615=m</div><div class='ctx'> CONFIG_QDU_GCC_1000=y</div><div class='ctx'> CONFIG_SC_CAMCC_8280XP=m</div><div class='ctx'> CONFIG_SC_DISPCC_7280=m</div><div class='ctx'> CONFIG_SC_DISPCC_8280XP=m</div><div class='add'>+CONFIG_SA_DISPCC_8775P=m</div><div class='ctx'> CONFIG_SA_GCC_8775P=y</div><div class='ctx'> CONFIG_SA_GPUCC_8775P=m</div><div class='ctx'> CONFIG_SC_GCC_7180=y</div><div class='hunk'>@@ -1336,6 +1417,8 @@ CONFIG_SC_GCC_8280XP=y</div><div class='ctx'> CONFIG_SC_GPUCC_7280=m</div><div class='ctx'> CONFIG_SC_GPUCC_8280XP=m</div><div class='ctx'> CONFIG_SC_LPASSCC_8280XP=m</div><div class='add'>+CONFIG_SC_LPASS_CORECC_7280=m</div><div class='add'>+CONFIG_SC_VIDEOCC_7280=m</div><div class='ctx'> CONFIG_SDM_CAMCC_845=m</div><div class='ctx'> CONFIG_SDM_GPUCC_845=y</div><div class='ctx'> CONFIG_SDM_VIDEOCC_845=y</div><div class='hunk'>@@ -1343,17 +1426,20 @@ CONFIG_SDM_DISPCC_845=y</div><div class='ctx'> CONFIG_SDM_LPASSCC_845=m</div><div class='ctx'> CONFIG_SDX_GCC_75=y</div><div class='ctx'> CONFIG_SM_CAMCC_8250=m</div><div class='add'>+CONFIG_SM_CAMCC_8550=m</div><div class='add'>+CONFIG_SM_CAMCC_8650=m</div><div class='ctx'> CONFIG_SM_DISPCC_6115=m</div><div class='ctx'> CONFIG_SM_DISPCC_8250=y</div><div class='ctx'> CONFIG_SM_DISPCC_8450=m</div><div class='ctx'> CONFIG_SM_DISPCC_8550=m</div><div class='del'>-CONFIG_SM_DISPCC_8650=m</div><div class='add'>+CONFIG_SM_DISPCC_8750=m</div><div class='ctx'> CONFIG_SM_GCC_4450=y</div><div class='ctx'> CONFIG_SM_GCC_6115=y</div><div class='ctx'> CONFIG_SM_GCC_8350=y</div><div class='ctx'> CONFIG_SM_GCC_8450=y</div><div class='ctx'> CONFIG_SM_GCC_8550=y</div><div class='ctx'> CONFIG_SM_GCC_8650=y</div><div class='add'>+CONFIG_SM_GCC_8750=y</div><div class='ctx'> CONFIG_SM_GPUCC_6115=m</div><div class='ctx'> CONFIG_SM_GPUCC_8150=y</div><div class='ctx'> CONFIG_SM_GPUCC_8250=y</div><div class='hunk'>@@ -1363,22 +1449,34 @@ CONFIG_SM_GPUCC_8550=m</div><div class='ctx'> CONFIG_SM_GPUCC_8650=m</div><div class='ctx'> CONFIG_SM_TCSRCC_8550=y</div><div class='ctx'> CONFIG_SM_TCSRCC_8650=y</div><div class='add'>+CONFIG_SM_TCSRCC_8750=m</div><div class='add'>+CONFIG_SA_VIDEOCC_8775P=m</div><div class='ctx'> CONFIG_SM_VIDEOCC_8250=y</div><div class='add'>+CONFIG_SM_VIDEOCC_8550=m</div><div class='ctx'> CONFIG_QCOM_HFPLL=y</div><div class='ctx'> CONFIG_CLK_GFM_LPASS_SM8250=m</div><div class='add'>+CONFIG_SM_VIDEOCC_8450=m</div><div class='ctx'> CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y</div><div class='add'>+CONFIG_CLK_RENESAS_VBATTB=m</div><div class='add'>+CONFIG_CLK_SOPHGO_CV1800=y</div><div class='ctx'> CONFIG_HWSPINLOCK=y</div><div class='add'>+CONFIG_HWSPINLOCK_OMAP=m</div><div class='ctx'> CONFIG_HWSPINLOCK_QCOM=y</div><div class='ctx'> CONFIG_TEGRA186_TIMER=y</div><div class='add'>+CONFIG_CLKSRC_STM32_LP=y</div><div class='ctx'> CONFIG_RENESAS_OSTM=y</div><div class='ctx'> CONFIG_ARM_MHU=y</div><div class='add'>+CONFIG_EXYNOS_MBOX=m</div><div class='ctx'> CONFIG_IMX_MBOX=y</div><div class='ctx'> CONFIG_OMAP2PLUS_MBOX=m</div><div class='ctx'> CONFIG_PLATFORM_MHU=y</div><div class='ctx'> CONFIG_BCM2835_MBOX=y</div><div class='ctx'> CONFIG_QCOM_APCS_IPC=y</div><div class='ctx'> CONFIG_MTK_ADSP_MBOX=m</div><div class='add'>+CONFIG_QCOM_CPUCP_MBOX=m</div><div class='add'>+CONFIG_TEGRA_HSP_MBOX=y</div><div class='ctx'> CONFIG_QCOM_IPCC=y</div><div class='add'>+CONFIG_CIX_MBOX=y</div><div class='ctx'> CONFIG_ROCKCHIP_IOMMU=y</div><div class='ctx'> CONFIG_TEGRA_IOMMU_SMMU=y</div><div class='ctx'> CONFIG_ARM_SMMU=y</div><div class='hunk'>@@ -1394,6 +1492,7 @@ CONFIG_QCOM_Q6V5_PAS=m</div><div class='ctx'> CONFIG_QCOM_SYSMON=m</div><div class='ctx'> CONFIG_QCOM_WCNSS_PIL=m</div><div class='ctx'> CONFIG_TI_K3_DSP_REMOTEPROC=m</div><div class='add'>+CONFIG_TI_K3_M4_REMOTEPROC=m</div><div class='ctx'> CONFIG_TI_K3_R5_REMOTEPROC=m</div><div class='ctx'> CONFIG_RPMSG_CHAR=m</div><div class='ctx'> CONFIG_RPMSG_CTRL=m</div><div class='hunk'>@@ -1429,34 +1528,14 @@ CONFIG_QCOM_WCNSS_CTRL=m</div><div class='ctx'> CONFIG_QCOM_APR=m</div><div class='ctx'> CONFIG_QCOM_ICC_BWMON=m</div><div class='ctx'> CONFIG_QCOM_PBS=m</div><div class='del'>-CONFIG_ARCH_R8A77995=y</div><div class='del'>-CONFIG_ARCH_R8A77990=y</div><div class='del'>-CONFIG_ARCH_R8A77951=y</div><div class='del'>-CONFIG_ARCH_R8A77965=y</div><div class='del'>-CONFIG_ARCH_R8A77960=y</div><div class='del'>-CONFIG_ARCH_R8A77961=y</div><div class='del'>-CONFIG_ARCH_R8A779F0=y</div><div class='del'>-CONFIG_ARCH_R8A77980=y</div><div class='del'>-CONFIG_ARCH_R8A77970=y</div><div class='del'>-CONFIG_ARCH_R8A779A0=y</div><div class='del'>-CONFIG_ARCH_R8A779G0=y</div><div class='del'>-CONFIG_ARCH_R8A779H0=y</div><div class='del'>-CONFIG_ARCH_R8A774C0=y</div><div class='del'>-CONFIG_ARCH_R8A774E1=y</div><div class='del'>-CONFIG_ARCH_R8A774A1=y</div><div class='del'>-CONFIG_ARCH_R8A774B1=y</div><div class='del'>-CONFIG_ARCH_R9A07G043=y</div><div class='del'>-CONFIG_ARCH_R9A07G044=y</div><div class='del'>-CONFIG_ARCH_R9A07G054=y</div><div class='del'>-CONFIG_ARCH_R9A08G045=y</div><div class='del'>-CONFIG_ARCH_R9A09G011=y</div><div class='del'>-CONFIG_ARCH_R9A09G057=y</div><div class='ctx'> CONFIG_ROCKCHIP_IODOMAIN=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_132_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_210_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_186_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_194_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_234_SOC=y</div><div class='add'>+CONFIG_ARCH_TEGRA_241_SOC=y</div><div class='add'>+CONFIG_ARCH_TEGRA_264_SOC=y</div><div class='ctx'> CONFIG_TI_PRUSS=m</div><div class='ctx'> CONFIG_OWL_PM_DOMAINS=y</div><div class='ctx'> CONFIG_RASPBERRYPI_POWER=y</div><div class='hunk'>@@ -1469,20 +1548,26 @@ CONFIG_TI_SCI_PM_DOMAINS=y</div><div class='ctx'> CONFIG_ARM_IMX_BUS_DEVFREQ=y</div><div class='ctx'> CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m</div><div class='ctx'> CONFIG_ARM_MEDIATEK_CCI_DEVFREQ=m</div><div class='add'>+CONFIG_PM_DEVFREQ_EVENT=y</div><div class='add'>+CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=m</div><div class='ctx'> CONFIG_EXTCON_PTN5150=m</div><div class='ctx'> CONFIG_EXTCON_USB_GPIO=y</div><div class='ctx'> CONFIG_EXTCON_USBC_CROS_EC=y</div><div class='add'>+CONFIG_FSL_IFC=y</div><div class='ctx'> CONFIG_RENESAS_RPCIF=m</div><div class='add'>+CONFIG_STM32_OMM=m</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_EXYNOS_ADC=y</div><div class='ctx'> CONFIG_IMX8QXP_ADC=m</div><div class='ctx'> CONFIG_IMX93_ADC=m</div><div class='ctx'> CONFIG_MAX9611=m</div><div class='add'>+CONFIG_MEDIATEK_MT6359_AUXADC=m</div><div class='ctx'> CONFIG_MEDIATEK_MT6577_AUXADC=m</div><div class='ctx'> CONFIG_QCOM_SPMI_VADC=m</div><div class='ctx'> CONFIG_QCOM_SPMI_ADC5=m</div><div class='ctx'> CONFIG_ROCKCHIP_SARADC=m</div><div class='ctx'> CONFIG_RZG2L_ADC=m</div><div class='add'>+CONFIG_SOPHGO_CV1800B_ADC=m</div><div class='ctx'> CONFIG_TI_ADS1015=m</div><div class='ctx'> CONFIG_TI_AM335X_ADC=m</div><div class='ctx'> CONFIG_IIO_CROS_EC_SENSORS_CORE=m</div><div class='hunk'>@@ -1492,6 +1577,7 @@ CONFIG_IIO_CROS_EC_LIGHT_PROX=m</div><div class='ctx'> CONFIG_SENSORS_ISL29018=m</div><div class='ctx'> CONFIG_VCNL4000=m</div><div class='ctx'> CONFIG_IIO_ST_MAGN_3AXIS=m</div><div class='add'>+CONFIG_IIO_STM32_TIMER_TRIGGER=m</div><div class='ctx'> CONFIG_IIO_CROS_EC_BARO=m</div><div class='ctx'> CONFIG_MPL3115=m</div><div class='ctx'> CONFIG_PWM=y</div><div class='hunk'>@@ -1503,12 +1589,14 @@ CONFIG_PWM_IMX27=m</div><div class='ctx'> CONFIG_PWM_MESON=m</div><div class='ctx'> CONFIG_PWM_MTK_DISP=m</div><div class='ctx'> CONFIG_PWM_MEDIATEK=m</div><div class='del'>-CONFIG_PWM_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RZG2L_GPT=m</div><div class='add'>+CONFIG_PWM_RENESAS_RZ_MTU3=m</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=m</div><div class='ctx'> CONFIG_PWM_ROCKCHIP=y</div><div class='del'>-CONFIG_PWM_RZ_MTU3=m</div><div class='ctx'> CONFIG_PWM_SAMSUNG=y</div><div class='ctx'> CONFIG_PWM_SL28CPLD=m</div><div class='add'>+CONFIG_PWM_STM32=m</div><div class='ctx'> CONFIG_PWM_SUN4I=m</div><div class='ctx'> CONFIG_PWM_TEGRA=m</div><div class='ctx'> CONFIG_PWM_TIECAP=m</div><div class='hunk'>@@ -1517,16 +1605,22 @@ CONFIG_PWM_VISCONTI=m</div><div class='ctx'> CONFIG_SL28CPLD_INTC=y</div><div class='ctx'> CONFIG_QCOM_PDC=y</div><div class='ctx'> CONFIG_QCOM_MPM=y</div><div class='add'>+CONFIG_TI_SCI_INTR_IRQCHIP=y</div><div class='add'>+CONFIG_TI_SCI_INTA_IRQCHIP=y</div><div class='ctx'> CONFIG_RESET_GPIO=m</div><div class='ctx'> CONFIG_RESET_IMX7=y</div><div class='ctx'> CONFIG_RESET_QCOM_AOSS=y</div><div class='ctx'> CONFIG_RESET_QCOM_PDC=m</div><div class='ctx'> CONFIG_RESET_RZG2L_USBPHY_CTRL=y</div><div class='add'>+CONFIG_RESET_RZV2H_USB2PHY=m</div><div class='ctx'> CONFIG_RESET_TI_SCI=y</div><div class='add'>+CONFIG_PHY_SNPS_EUSB2=m</div><div class='ctx'> CONFIG_PHY_XGENE=y</div><div class='ctx'> CONFIG_PHY_CAN_TRANSCEIVER=m</div><div class='add'>+CONFIG_PHY_NXP_PTN3222=m</div><div class='ctx'> CONFIG_PHY_SUN4I_USB=y</div><div class='ctx'> CONFIG_PHY_CADENCE_TORRENT=m</div><div class='add'>+CONFIG_PHY_CADENCE_DPHY=m</div><div class='ctx'> CONFIG_PHY_CADENCE_DPHY_RX=m</div><div class='ctx'> CONFIG_PHY_CADENCE_SIERRA=m</div><div class='ctx'> CONFIG_PHY_CADENCE_SALVO=m</div><div class='hunk'>@@ -1536,12 +1630,15 @@ CONFIG_PHY_HI6220_USB=y</div><div class='ctx'> CONFIG_PHY_HISTB_COMBPHY=y</div><div class='ctx'> CONFIG_PHY_HISI_INNO_USB2=y</div><div class='ctx'> CONFIG_PHY_MVEBU_CP110_COMPHY=y</div><div class='add'>+CONFIG_PHY_MTK_PCIE=m</div><div class='ctx'> CONFIG_PHY_MTK_TPHY=y</div><div class='add'>+CONFIG_PHY_MTK_HDMI=m</div><div class='add'>+CONFIG_PHY_MTK_MIPI_DSI=m</div><div class='add'>+CONFIG_PHY_MTK_DP=m</div><div class='ctx'> CONFIG_PHY_QCOM_EDP=m</div><div class='ctx'> CONFIG_PHY_QCOM_PCIE2=m</div><div class='ctx'> CONFIG_PHY_QCOM_QMP=m</div><div class='ctx'> CONFIG_PHY_QCOM_QUSB2=m</div><div class='del'>-CONFIG_PHY_QCOM_SNPS_EUSB2=m</div><div class='ctx'> CONFIG_PHY_QCOM_EUSB2_REPEATER=m</div><div class='ctx'> CONFIG_PHY_QCOM_M31_USB=m</div><div class='ctx'> CONFIG_PHY_QCOM_USB_HS=m</div><div class='hunk'>@@ -1606,6 +1703,7 @@ CONFIG_FPGA_BRIDGE=m</div><div class='ctx'> CONFIG_ALTERA_FREEZE_BRIDGE=m</div><div class='ctx'> CONFIG_FPGA_REGION=m</div><div class='ctx'> CONFIG_OF_FPGA_REGION=m</div><div class='add'>+CONFIG_OF_OVERLAY=y</div><div class='ctx'> CONFIG_TEE=y</div><div class='ctx'> CONFIG_OPTEE=y</div><div class='ctx'> CONFIG_MUX_GPIO=m</div><div class='hunk'>@@ -1625,6 +1723,8 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_OSM_L3=m</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_QCM2290=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_QCS404=m</div><div class='add'>+CONFIG_INTERCONNECT_QCOM_QCS615=y</div><div class='add'>+CONFIG_INTERCONNECT_QCOM_QCS8300=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_QDU1000=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SA8775P=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SC7180=y</div><div class='hunk'>@@ -1640,9 +1740,12 @@ CONFIG_INTERCONNECT_QCOM_SM8350=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8450=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8550=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_SM8650=y</div><div class='add'>+CONFIG_INTERCONNECT_QCOM_SM8750=y</div><div class='ctx'> CONFIG_INTERCONNECT_QCOM_X1E80100=y</div><div class='ctx'> CONFIG_COUNTER=m</div><div class='add'>+CONFIG_TI_EQEP=m</div><div class='ctx'> CONFIG_RZ_MTU3_CNT=m</div><div class='add'>+CONFIG_STM32_TIMER_CNT=m</div><div class='ctx'> CONFIG_HTE=y</div><div class='ctx'> CONFIG_HTE_TEGRA194=y</div><div class='ctx'> CONFIG_HTE_TEGRA194_TEST=m</div><div class='hunk'>@@ -1676,22 +1779,18 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_CHACHA20=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_ECHAINIV=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM64_CE=y</div><div class='del'>-CONFIG_CRYPTO_SHA1_ARM64_CE=y</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM64_CE=y</div><div class='del'>-CONFIG_CRYPTO_SHA512_ARM64_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_ARM64=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_ARM64_CE=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM64_CE_BLK=y</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM64_BS=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM64_CE_CCM=y</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_SUN8I_CE=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_CAAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m</div><div class='head'>diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig<br/>index e7d9bd8e4709..91f3093eee6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/Kconfig</a></div><div class='hunk'>@@ -25,66 +25,6 @@ config CRYPTO_NHPOLY1305_NEON</div><div class='ctx'> 	  Architecture: arm64 using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_NEON</div><div class='del'>-	tristate "Hash functions: Poly1305 (NEON)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_ARM64_CE</div><div class='del'>-	tristate "Hash functions: SHA-1 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SHA1</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA256_ARM64</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA2_ARM64_CE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SHA256_ARM64</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA512_ARM64</div><div class='del'>-	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-384 and SHA-512 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA512_ARM64_CE</div><div class='del'>-	tristate "Hash functions: SHA-384 and SHA-512 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SHA512_ARM64</div><div class='del'>-	help</div><div class='del'>-	  SHA-384 and SHA-512 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA3_ARM64</div><div class='ctx'> 	tristate "Hash functions: SHA-3 (ARMv8.2 Crypto Extensions)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -100,7 +40,7 @@ config CRYPTO_SM3_NEON</div><div class='ctx'> 	tristate "Hash functions: SM3 (NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='hunk'>@@ -111,7 +51,7 @@ config CRYPTO_SM3_ARM64_CE</div><div class='ctx'> 	tristate "Hash functions: SM3 (ARMv8.2 Crypto Extensions)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +71,7 @@ config CRYPTO_POLYVAL_ARM64_CE</div><div class='ctx'> config CRYPTO_AES_ARM64</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB, CBC, CTR, CTS, XCTR, XTS"</div><div class='ctx'> 	select CRYPTO_AES</div><div class='add'>+	select CRYPTO_LIB_SHA256</div><div class='ctx'> 	help</div><div class='ctx'> 	  Block ciphers: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	  Length-preserving ciphers: AES with ECB, CBC, CTR, CTS,</div><div class='hunk'>@@ -142,7 +83,7 @@ config CRYPTO_AES_ARM64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_ARM64_CE</div><div class='ctx'> 	tristate "Ciphers: AES (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on ARM64 &amp;&amp; KERNEL_MODE_NEON</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='ctx'> 	help</div><div class='hunk'>@@ -185,19 +126,6 @@ config CRYPTO_AES_ARM64_NEON_BLK</div><div class='ctx'> 	  Architecture: arm64 using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_NEON</div><div class='del'>-	tristate "Ciphers: ChaCha (NEON)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AES_ARM64_BS</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB/CBC/CTR/XCTR/XTS modes (bit-sliced NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -265,7 +193,7 @@ config CRYPTO_SM4_ARM64_NEON_BLK</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_ARM64_CE_CCM</div><div class='ctx'> 	tristate "AEAD cipher: AES in CCM mode (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on ARM64 &amp;&amp; KERNEL_MODE_NEON</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_AES_ARM64_CE</div><div class='ctx'> 	select CRYPTO_AES_ARM64_CE_BLK</div><div class='hunk'>@@ -312,15 +240,5 @@ config CRYPTO_SM4_ARM64_CE_GCM</div><div class='ctx'> 	  - PMULL (Polynomial Multiply Long) instructions</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CRCT10DIF_ARM64_CE</div><div class='del'>-	tristate "CRCT10DIF (PMULL)"</div><div class='del'>-	depends on KERNEL_MODE_NEON &amp;&amp; CRC_T10DIF</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using</div><div class='del'>-	  - PMULL (Polynomial Multiply Long) instructions</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile<br/>index fbe64dce66e0..a8b2cdbe202c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/Makefile</a></div><div class='hunk'>@@ -5,15 +5,6 @@</div><div class='ctx'> # Copyright (C) 2014 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_ARM64_CE) += sha1-ce.o</div><div class='del'>-sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o</div><div class='del'>-sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_ARM64_CE) += sha512-ce.o</div><div class='del'>-sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA3_ARM64) += sha3-ce.o</div><div class='ctx'> sha3-ce-y := sha3-ce-glue.o sha3-ce-core.o</div><div class='ctx'> </div><div class='hunk'>@@ -44,9 +35,6 @@ ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_POLYVAL_ARM64_CE) += polyval-ce.o</div><div class='ctx'> polyval-ce-y := polyval-ce-glue.o polyval-ce-core.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CRCT10DIF_ARM64_CE) += crct10dif-ce.o</div><div class='del'>-crct10dif-ce-y := crct10dif-ce-core.o crct10dif-ce-glue.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o</div><div class='ctx'> aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o</div><div class='ctx'> </div><div class='hunk'>@@ -59,19 +47,6 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o</div><div class='ctx'> aes-neon-blk-y := aes-glue-neon.o aes-neon.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_ARM64) += sha256-arm64.o</div><div class='del'>-sha256-arm64-y := sha256-glue.o sha256-core.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_ARM64) += sha512-arm64.o</div><div class='del'>-sha512-arm64-y := sha512-glue.o sha512-core.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='del'>-chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_NEON) += poly1305-neon.o</div><div class='del'>-poly1305-neon-y := poly1305-core.o poly1305-glue.o</div><div class='del'>-AFLAGS_poly1305-core.o += -Dpoly1305_init=poly1305_init_arm64</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o</div><div class='ctx'> nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o</div><div class='ctx'> </div><div class='hunk'>@@ -80,14 +55,3 @@ aes-arm64-y := aes-cipher-core.o aes-cipher-glue.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM64_BS) += aes-neon-bs.o</div><div class='ctx'> aes-neon-bs-y := aes-neonbs-core.o aes-neonbs-glue.o</div><div class='del'>-</div><div class='del'>-quiet_cmd_perlasm = PERLASM $@</div><div class='del'>-      cmd_perlasm = $(PERL) $(&lt;) void $(@)</div><div class='del'>-</div><div class='del'>-$(obj)/%-core.S: $(src)/%-armv8.pl</div><div class='del'>-	$(call cmd,perlasm)</div><div class='del'>-</div><div class='del'>-$(obj)/sha256-core.S: $(src)/sha512-armv8.pl</div><div class='del'>-	$(call cmd,perlasm)</div><div class='del'>-</div><div class='del'>-clean-files += poly1305-core.S sha256-core.S sha512-core.S</div><div class='head'>diff --git a/arch/arm64/crypto/aes-ce-ccm-glue.c b/arch/arm64/crypto/aes-ce-ccm-glue.c<br/>index a523b519700f..2d791d51891b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-ce-ccm-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-ce-ccm-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-ce-ccm-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/aes-ce-ccm-glue.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "aes-ce-setkey.h"</div><div class='ctx'> </div><div class='del'>-MODULE_IMPORT_NS(CRYPTO_INTERNAL);</div><div class='add'>+MODULE_IMPORT_NS("CRYPTO_INTERNAL");</div><div class='ctx'> </div><div class='ctx'> static int num_rounds(struct crypto_aes_ctx *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -156,23 +156,13 @@ static void ccm_calculate_auth_mac(struct aead_request *req, u8 mac[])</div><div class='ctx'> 	scatterwalk_start(&amp;walk, req-&gt;src);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		u32 n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		u8 *p;</div><div class='del'>-</div><div class='del'>-		if (!n) {</div><div class='del'>-			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='del'>-			n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		}</div><div class='del'>-		p = scatterwalk_map(&amp;walk);</div><div class='del'>-</div><div class='del'>-		macp = ce_aes_ccm_auth_data(mac, p, n, macp, ctx-&gt;key_enc,</div><div class='del'>-					    num_rounds(ctx));</div><div class='add'>+		unsigned int n;</div><div class='ctx'> </div><div class='add'>+		n = scatterwalk_next(&amp;walk, len);</div><div class='add'>+		macp = ce_aes_ccm_auth_data(mac, walk.addr, n, macp,</div><div class='add'>+					    ctx-&gt;key_enc, num_rounds(ctx));</div><div class='add'>+		scatterwalk_done_src(&amp;walk, n);</div><div class='ctx'> 		len -= n;</div><div class='del'>-</div><div class='del'>-		scatterwalk_unmap(p);</div><div class='del'>-		scatterwalk_advance(&amp;walk, n);</div><div class='del'>-		scatterwalk_done(&amp;walk, 0, len);</div><div class='ctx'> 	} while (len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c<br/>index a147e847a5a1..5e207ff34482 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/aes-glue.c</a></div><div class='hunk'>@@ -5,19 +5,20 @@</div><div class='ctx'>  * Copyright (C) 2013 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aes-ce-setkey.h"</div><div class='ctx'> </div><div class='hunk'>@@ -121,7 +122,6 @@ struct crypto_aes_xts_ctx {</div><div class='ctx'> struct crypto_aes_essiv_cbc_ctx {</div><div class='ctx'> 	struct crypto_aes_ctx key1;</div><div class='ctx'> 	struct crypto_aes_ctx __aligned(8) key2;</div><div class='del'>-	struct crypto_shash *hash;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mac_tfm_ctx {</div><div class='hunk'>@@ -130,7 +130,6 @@ struct mac_tfm_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	u8 dg[AES_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +170,7 @@ static int __maybe_unused essiv_cbc_set_key(struct crypto_skcipher *tfm,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	crypto_shash_tfm_digest(ctx-&gt;hash, in_key, key_len, digest);</div><div class='add'>+	sha256(in_key, key_len, digest);</div><div class='ctx'> </div><div class='ctx'> 	return aes_expandkey(&amp;ctx-&gt;key2, digest, sizeof(digest));</div><div class='ctx'> }</div><div class='hunk'>@@ -388,22 +387,6 @@ static int cts_cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> 	return skcipher_walk_done(&amp;walk, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused essiv_cbc_init_tfm(struct crypto_skcipher *tfm)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aes_essiv_cbc_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;hash = crypto_alloc_shash("sha256", 0, 0);</div><div class='del'>-</div><div class='del'>-	return PTR_ERR_OR_ZERO(ctx-&gt;hash);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __maybe_unused essiv_cbc_exit_tfm(struct crypto_skcipher *tfm)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aes_essiv_cbc_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	crypto_free_shash(ctx-&gt;hash);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __maybe_unused essiv_cbc_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -793,8 +776,6 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.setkey		= essiv_cbc_set_key,</div><div class='ctx'> 	.encrypt	= essiv_cbc_encrypt,</div><div class='ctx'> 	.decrypt	= essiv_cbc_decrypt,</div><div class='del'>-	.init		= essiv_cbc_init_tfm,</div><div class='del'>-	.exit		= essiv_cbc_exit_tfm,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> static int cbcmac_setkey(struct crypto_shash *tfm, const u8 *in_key,</div><div class='hunk'>@@ -869,109 +850,64 @@ static int mac_init(struct shash_desc *desc)</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	memset(ctx-&gt;dg, 0, AES_BLOCK_SIZE);</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mac_do_update(struct crypto_aes_ctx *ctx, u8 const in[], int blocks,</div><div class='del'>-			  u8 dg[], int enc_before, int enc_after)</div><div class='add'>+			  u8 dg[], int enc_before)</div><div class='ctx'> {</div><div class='ctx'> 	int rounds = 6 + ctx-&gt;key_length / 4;</div><div class='add'>+	int rem;</div><div class='ctx'> </div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			rem = aes_mac_update(in, ctx-&gt;key_enc, rounds, blocks,</div><div class='del'>-					     dg, enc_before, enc_after);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			in += (blocks - rem) * AES_BLOCK_SIZE;</div><div class='del'>-			blocks = rem;</div><div class='del'>-			enc_before = 0;</div><div class='del'>-		} while (blocks);</div><div class='del'>-	} else {</div><div class='del'>-		if (enc_before)</div><div class='del'>-			aes_encrypt(ctx, dg, dg);</div><div class='del'>-</div><div class='del'>-		while (blocks--) {</div><div class='del'>-			crypto_xor(dg, in, AES_BLOCK_SIZE);</div><div class='del'>-			in += AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (blocks || enc_after)</div><div class='del'>-				aes_encrypt(ctx, dg, dg);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	do {</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		rem = aes_mac_update(in, ctx-&gt;key_enc, rounds, blocks,</div><div class='add'>+				     dg, enc_before, !enc_before);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+		in += (blocks - rem) * AES_BLOCK_SIZE;</div><div class='add'>+		blocks = rem;</div><div class='add'>+	} while (blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mac_update(struct shash_desc *desc, const u8 *p, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	int blocks = len / AES_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned int l;</div><div class='del'>-</div><div class='del'>-		if ((ctx-&gt;len % AES_BLOCK_SIZE) == 0 &amp;&amp;</div><div class='del'>-		    (ctx-&gt;len + len) &gt; AES_BLOCK_SIZE) {</div><div class='del'>-</div><div class='del'>-			int blocks = len / AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			len %= AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			mac_do_update(&amp;tctx-&gt;key, p, blocks, ctx-&gt;dg,</div><div class='del'>-				      (ctx-&gt;len != 0), (len != 0));</div><div class='del'>-</div><div class='del'>-			p += blocks * AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (!len) {</div><div class='del'>-				ctx-&gt;len = AES_BLOCK_SIZE;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			ctx-&gt;len = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		l = min(len, AES_BLOCK_SIZE - ctx-&gt;len);</div><div class='del'>-</div><div class='del'>-		if (l &lt;= AES_BLOCK_SIZE) {</div><div class='del'>-			crypto_xor(ctx-&gt;dg + ctx-&gt;len, p, l);</div><div class='del'>-			ctx-&gt;len += l;</div><div class='del'>-			len -= l;</div><div class='del'>-			p += l;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	len %= AES_BLOCK_SIZE;</div><div class='add'>+	mac_do_update(&amp;tctx-&gt;key, p, blocks, ctx-&gt;dg, 0);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cbcmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int cbcmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mac_do_update(&amp;tctx-&gt;key, NULL, 0, ctx-&gt;dg, (ctx-&gt;len != 0), 0);</div><div class='del'>-</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(ctx-&gt;dg, src, len);</div><div class='add'>+		mac_do_update(&amp;tctx-&gt;key, NULL, 0, ctx-&gt;dg, 1);</div><div class='add'>+	}</div><div class='ctx'> 	memcpy(out, ctx-&gt;dg, AES_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int cmac_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		      u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	u8 *consts = tctx-&gt;consts;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != AES_BLOCK_SIZE) {</div><div class='del'>-		ctx-&gt;dg[ctx-&gt;len] ^= 0x80;</div><div class='add'>+	crypto_xor(ctx-&gt;dg, src, len);</div><div class='add'>+	if (len != AES_BLOCK_SIZE) {</div><div class='add'>+		ctx-&gt;dg[len] ^= 0x80;</div><div class='ctx'> 		consts += AES_BLOCK_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mac_do_update(&amp;tctx-&gt;key, consts, 1, ctx-&gt;dg, 0, 1);</div><div class='del'>-</div><div class='add'>+	mac_do_update(&amp;tctx-&gt;key, consts, 1, ctx-&gt;dg, 0);</div><div class='ctx'> 	memcpy(out, ctx-&gt;dg, AES_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -979,6 +915,8 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.base.cra_name		= "cmac(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "cmac-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx) +</div><div class='ctx'> 				  2 * AES_BLOCK_SIZE,</div><div class='hunk'>@@ -987,13 +925,15 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cmac_final,</div><div class='add'>+	.finup			= cmac_finup,</div><div class='ctx'> 	.setkey			= cmac_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> }, {</div><div class='ctx'> 	.base.cra_name		= "xcbc(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "xcbc-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx) +</div><div class='ctx'> 				  2 * AES_BLOCK_SIZE,</div><div class='hunk'>@@ -1002,21 +942,22 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cmac_final,</div><div class='add'>+	.finup			= cmac_finup,</div><div class='ctx'> 	.setkey			= xcbc_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> }, {</div><div class='ctx'> 	.base.cra_name		= "cbcmac(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "cbcmac-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='add'>+	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> </div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cbcmac_final,</div><div class='add'>+	.finup			= cbcmac_finup,</div><div class='ctx'> 	.setkey			= cbcmac_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> } };</div><div class='hunk'>@@ -1048,7 +989,7 @@ unregister_ciphers:</div><div class='ctx'> </div><div class='ctx'> #ifdef USE_V8_CRYPTO_EXTENSIONS</div><div class='ctx'> module_cpu_feature_match(AES, aes_init);</div><div class='del'>-EXPORT_SYMBOL_NS(ce_aes_mac_update, CRYPTO_INTERNAL);</div><div class='add'>+EXPORT_SYMBOL_NS(ce_aes_mac_update, "CRYPTO_INTERNAL");</div><div class='ctx'> #else</div><div class='ctx'> module_init(aes_init);</div><div class='ctx'> EXPORT_SYMBOL(neon_aes_ecb_encrypt);</div><div class='head'>diff --git a/arch/arm64/crypto/aes-neonbs-glue.c b/arch/arm64/crypto/aes-neonbs-glue.c<br/>index 46425e7b9755..c4a623e86593 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-neonbs-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/aes-neonbs-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/aes-neonbs-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/aes-neonbs-glue.c</a></div><div class='hunk'>@@ -287,7 +287,8 @@ static int __xts_crypt(struct skcipher_request *req, bool encrypt,</div><div class='ctx'> 	struct skcipher_walk walk;</div><div class='ctx'> 	int nbytes, err;</div><div class='ctx'> 	int first = 1;</div><div class='del'>-	u8 *out, *in;</div><div class='add'>+	const u8 *in;</div><div class='add'>+	u8 *out;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;cryptlen &lt; AES_BLOCK_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/arch/arm64/crypto/chacha-neon-core.S b/arch/arm64/crypto/chacha-neon-core.S<br/>deleted file mode 100644<br/>index b70ac76f2610..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/chacha-neon-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/chacha-neon-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,805 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ChaCha/XChaCha NEON helper functions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016-2018 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Originally based on:</div><div class='del'>- * ChaCha20 256-bit cipher algorithm, RFC7539, x64 SSSE3 functions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-#include &lt;asm/cache.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.align		6</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * chacha_permute - permute one block</div><div class='del'>- *</div><div class='del'>- * Permute one 64-byte block where the state matrix is stored in the four NEON</div><div class='del'>- * registers v0-v3.  It performs matrix operations on four words in parallel,</div><div class='del'>- * but requires shuffling to rearrange the words after each round.</div><div class='del'>- *</div><div class='del'>- * The round count is given in w3.</div><div class='del'>- *</div><div class='del'>- * Clobbers: w3, x10, v4, v12</div><div class='del'>- */</div><div class='del'>-SYM_FUNC_START_LOCAL(chacha_permute)</div><div class='del'>-</div><div class='del'>-	adr_l		x10, ROT8</div><div class='del'>-	ld1		{v12.4s}, [x10]</div><div class='del'>-</div><div class='del'>-.Ldoubleround:</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 16)</div><div class='del'>-	add		v0.4s, v0.4s, v1.4s</div><div class='del'>-	eor		v3.16b, v3.16b, v0.16b</div><div class='del'>-	rev32		v3.8h, v3.8h</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 12)</div><div class='del'>-	add		v2.4s, v2.4s, v3.4s</div><div class='del'>-	eor		v4.16b, v1.16b, v2.16b</div><div class='del'>-	shl		v1.4s, v4.4s, #12</div><div class='del'>-	sri		v1.4s, v4.4s, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)</div><div class='del'>-	add		v0.4s, v0.4s, v1.4s</div><div class='del'>-	eor		v3.16b, v3.16b, v0.16b</div><div class='del'>-	tbl		v3.16b, {v3.16b}, v12.16b</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)</div><div class='del'>-	add		v2.4s, v2.4s, v3.4s</div><div class='del'>-	eor		v4.16b, v1.16b, v2.16b</div><div class='del'>-	shl		v1.4s, v4.4s, #7</div><div class='del'>-	sri		v1.4s, v4.4s, #25</div><div class='del'>-</div><div class='del'>-	// x1 = shuffle32(x1, MASK(0, 3, 2, 1))</div><div class='del'>-	ext		v1.16b, v1.16b, v1.16b, #4</div><div class='del'>-	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))</div><div class='del'>-	ext		v2.16b, v2.16b, v2.16b, #8</div><div class='del'>-	// x3 = shuffle32(x3, MASK(2, 1, 0, 3))</div><div class='del'>-	ext		v3.16b, v3.16b, v3.16b, #12</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 16)</div><div class='del'>-	add		v0.4s, v0.4s, v1.4s</div><div class='del'>-	eor		v3.16b, v3.16b, v0.16b</div><div class='del'>-	rev32		v3.8h, v3.8h</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 12)</div><div class='del'>-	add		v2.4s, v2.4s, v3.4s</div><div class='del'>-	eor		v4.16b, v1.16b, v2.16b</div><div class='del'>-	shl		v1.4s, v4.4s, #12</div><div class='del'>-	sri		v1.4s, v4.4s, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)</div><div class='del'>-	add		v0.4s, v0.4s, v1.4s</div><div class='del'>-	eor		v3.16b, v3.16b, v0.16b</div><div class='del'>-	tbl		v3.16b, {v3.16b}, v12.16b</div><div class='del'>-</div><div class='del'>-	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)</div><div class='del'>-	add		v2.4s, v2.4s, v3.4s</div><div class='del'>-	eor		v4.16b, v1.16b, v2.16b</div><div class='del'>-	shl		v1.4s, v4.4s, #7</div><div class='del'>-	sri		v1.4s, v4.4s, #25</div><div class='del'>-</div><div class='del'>-	// x1 = shuffle32(x1, MASK(2, 1, 0, 3))</div><div class='del'>-	ext		v1.16b, v1.16b, v1.16b, #12</div><div class='del'>-	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))</div><div class='del'>-	ext		v2.16b, v2.16b, v2.16b, #8</div><div class='del'>-	// x3 = shuffle32(x3, MASK(0, 3, 2, 1))</div><div class='del'>-	ext		v3.16b, v3.16b, v3.16b, #4</div><div class='del'>-</div><div class='del'>-	subs		w3, w3, #2</div><div class='del'>-	b.ne		.Ldoubleround</div><div class='del'>-</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(chacha_permute)</div><div class='del'>-</div><div class='del'>-SYM_FUNC_START(chacha_block_xor_neon)</div><div class='del'>-	// x0: Input state matrix, s</div><div class='del'>-	// x1: 1 data block output, o</div><div class='del'>-	// x2: 1 data block input, i</div><div class='del'>-	// w3: nrounds</div><div class='del'>-</div><div class='del'>-	stp		x29, x30, [sp, #-16]!</div><div class='del'>-	mov		x29, sp</div><div class='del'>-</div><div class='del'>-	// x0..3 = s0..3</div><div class='del'>-	ld1		{v0.4s-v3.4s}, [x0]</div><div class='del'>-	ld1		{v8.4s-v11.4s}, [x0]</div><div class='del'>-</div><div class='del'>-	bl		chacha_permute</div><div class='del'>-</div><div class='del'>-	ld1		{v4.16b-v7.16b}, [x2]</div><div class='del'>-</div><div class='del'>-	// o0 = i0 ^ (x0 + s0)</div><div class='del'>-	add		v0.4s, v0.4s, v8.4s</div><div class='del'>-	eor		v0.16b, v0.16b, v4.16b</div><div class='del'>-</div><div class='del'>-	// o1 = i1 ^ (x1 + s1)</div><div class='del'>-	add		v1.4s, v1.4s, v9.4s</div><div class='del'>-	eor		v1.16b, v1.16b, v5.16b</div><div class='del'>-</div><div class='del'>-	// o2 = i2 ^ (x2 + s2)</div><div class='del'>-	add		v2.4s, v2.4s, v10.4s</div><div class='del'>-	eor		v2.16b, v2.16b, v6.16b</div><div class='del'>-</div><div class='del'>-	// o3 = i3 ^ (x3 + s3)</div><div class='del'>-	add		v3.4s, v3.4s, v11.4s</div><div class='del'>-	eor		v3.16b, v3.16b, v7.16b</div><div class='del'>-</div><div class='del'>-	st1		{v0.16b-v3.16b}, [x1]</div><div class='del'>-</div><div class='del'>-	ldp		x29, x30, [sp], #16</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(chacha_block_xor_neon)</div><div class='del'>-</div><div class='del'>-SYM_FUNC_START(hchacha_block_neon)</div><div class='del'>-	// x0: Input state matrix, s</div><div class='del'>-	// x1: output (8 32-bit words)</div><div class='del'>-	// w2: nrounds</div><div class='del'>-</div><div class='del'>-	stp		x29, x30, [sp, #-16]!</div><div class='del'>-	mov		x29, sp</div><div class='del'>-</div><div class='del'>-	ld1		{v0.4s-v3.4s}, [x0]</div><div class='del'>-</div><div class='del'>-	mov		w3, w2</div><div class='del'>-	bl		chacha_permute</div><div class='del'>-</div><div class='del'>-	st1		{v0.4s}, [x1], #16</div><div class='del'>-	st1		{v3.4s}, [x1]</div><div class='del'>-</div><div class='del'>-	ldp		x29, x30, [sp], #16</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(hchacha_block_neon)</div><div class='del'>-</div><div class='del'>-	a0		.req	w12</div><div class='del'>-	a1		.req	w13</div><div class='del'>-	a2		.req	w14</div><div class='del'>-	a3		.req	w15</div><div class='del'>-	a4		.req	w16</div><div class='del'>-	a5		.req	w17</div><div class='del'>-	a6		.req	w19</div><div class='del'>-	a7		.req	w20</div><div class='del'>-	a8		.req	w21</div><div class='del'>-	a9		.req	w22</div><div class='del'>-	a10		.req	w23</div><div class='del'>-	a11		.req	w24</div><div class='del'>-	a12		.req	w25</div><div class='del'>-	a13		.req	w26</div><div class='del'>-	a14		.req	w27</div><div class='del'>-	a15		.req	w28</div><div class='del'>-</div><div class='del'>-	.align		6</div><div class='del'>-SYM_FUNC_START(chacha_4block_xor_neon)</div><div class='del'>-	frame_push	10</div><div class='del'>-</div><div class='del'>-	// x0: Input state matrix, s</div><div class='del'>-	// x1: 4 data blocks output, o</div><div class='del'>-	// x2: 4 data blocks input, i</div><div class='del'>-	// w3: nrounds</div><div class='del'>-	// x4: byte count</div><div class='del'>-</div><div class='del'>-	adr_l		x10, .Lpermute</div><div class='del'>-	and		x5, x4, #63</div><div class='del'>-	add		x10, x10, x5</div><div class='del'>-</div><div class='del'>-	//</div><div class='del'>-	// This function encrypts four consecutive ChaCha blocks by loading</div><div class='del'>-	// the state matrix in NEON registers four times. The algorithm performs</div><div class='del'>-	// each operation on the corresponding word of each state matrix, hence</div><div class='del'>-	// requires no word shuffling. For final XORing step we transpose the</div><div class='del'>-	// matrix by interleaving 32- and then 64-bit words, which allows us to</div><div class='del'>-	// do XOR in NEON registers.</div><div class='del'>-	//</div><div class='del'>-	// At the same time, a fifth block is encrypted in parallel using</div><div class='del'>-	// scalar registers</div><div class='del'>-	//</div><div class='del'>-	adr_l		x9, CTRINC		// ... and ROT8</div><div class='del'>-	ld1		{v30.4s-v31.4s}, [x9]</div><div class='del'>-</div><div class='del'>-	// x0..15[0-3] = s0..3[0..3]</div><div class='del'>-	add		x8, x0, #16</div><div class='del'>-	ld4r		{ v0.4s- v3.4s}, [x0]</div><div class='del'>-	ld4r		{ v4.4s- v7.4s}, [x8], #16</div><div class='del'>-	ld4r		{ v8.4s-v11.4s}, [x8], #16</div><div class='del'>-	ld4r		{v12.4s-v15.4s}, [x8]</div><div class='del'>-</div><div class='del'>-	mov		a0, v0.s[0]</div><div class='del'>-	mov		a1, v1.s[0]</div><div class='del'>-	mov		a2, v2.s[0]</div><div class='del'>-	mov		a3, v3.s[0]</div><div class='del'>-	mov		a4, v4.s[0]</div><div class='del'>-	mov		a5, v5.s[0]</div><div class='del'>-	mov		a6, v6.s[0]</div><div class='del'>-	mov		a7, v7.s[0]</div><div class='del'>-	mov		a8, v8.s[0]</div><div class='del'>-	mov		a9, v9.s[0]</div><div class='del'>-	mov		a10, v10.s[0]</div><div class='del'>-	mov		a11, v11.s[0]</div><div class='del'>-	mov		a12, v12.s[0]</div><div class='del'>-	mov		a13, v13.s[0]</div><div class='del'>-	mov		a14, v14.s[0]</div><div class='del'>-	mov		a15, v15.s[0]</div><div class='del'>-</div><div class='del'>-	// x12 += counter values 1-4</div><div class='del'>-	add		v12.4s, v12.4s, v30.4s</div><div class='del'>-</div><div class='del'>-.Ldoubleround4:</div><div class='del'>-	// x0 += x4, x12 = rotl32(x12 ^ x0, 16)</div><div class='del'>-	// x1 += x5, x13 = rotl32(x13 ^ x1, 16)</div><div class='del'>-	// x2 += x6, x14 = rotl32(x14 ^ x2, 16)</div><div class='del'>-	// x3 += x7, x15 = rotl32(x15 ^ x3, 16)</div><div class='del'>-	add		v0.4s, v0.4s, v4.4s</div><div class='del'>-	  add		a0, a0, a4</div><div class='del'>-	add		v1.4s, v1.4s, v5.4s</div><div class='del'>-	  add		a1, a1, a5</div><div class='del'>-	add		v2.4s, v2.4s, v6.4s</div><div class='del'>-	  add		a2, a2, a6</div><div class='del'>-	add		v3.4s, v3.4s, v7.4s</div><div class='del'>-	  add		a3, a3, a7</div><div class='del'>-</div><div class='del'>-	eor		v12.16b, v12.16b, v0.16b</div><div class='del'>-	  eor		a12, a12, a0</div><div class='del'>-	eor		v13.16b, v13.16b, v1.16b</div><div class='del'>-	  eor		a13, a13, a1</div><div class='del'>-	eor		v14.16b, v14.16b, v2.16b</div><div class='del'>-	  eor		a14, a14, a2</div><div class='del'>-	eor		v15.16b, v15.16b, v3.16b</div><div class='del'>-	  eor		a15, a15, a3</div><div class='del'>-</div><div class='del'>-	rev32		v12.8h, v12.8h</div><div class='del'>-	  ror		a12, a12, #16</div><div class='del'>-	rev32		v13.8h, v13.8h</div><div class='del'>-	  ror		a13, a13, #16</div><div class='del'>-	rev32		v14.8h, v14.8h</div><div class='del'>-	  ror		a14, a14, #16</div><div class='del'>-	rev32		v15.8h, v15.8h</div><div class='del'>-	  ror		a15, a15, #16</div><div class='del'>-</div><div class='del'>-	// x8 += x12, x4 = rotl32(x4 ^ x8, 12)</div><div class='del'>-	// x9 += x13, x5 = rotl32(x5 ^ x9, 12)</div><div class='del'>-	// x10 += x14, x6 = rotl32(x6 ^ x10, 12)</div><div class='del'>-	// x11 += x15, x7 = rotl32(x7 ^ x11, 12)</div><div class='del'>-	add		v8.4s, v8.4s, v12.4s</div><div class='del'>-	  add		a8, a8, a12</div><div class='del'>-	add		v9.4s, v9.4s, v13.4s</div><div class='del'>-	  add		a9, a9, a13</div><div class='del'>-	add		v10.4s, v10.4s, v14.4s</div><div class='del'>-	  add		a10, a10, a14</div><div class='del'>-	add		v11.4s, v11.4s, v15.4s</div><div class='del'>-	  add		a11, a11, a15</div><div class='del'>-</div><div class='del'>-	eor		v16.16b, v4.16b, v8.16b</div><div class='del'>-	  eor		a4, a4, a8</div><div class='del'>-	eor		v17.16b, v5.16b, v9.16b</div><div class='del'>-	  eor		a5, a5, a9</div><div class='del'>-	eor		v18.16b, v6.16b, v10.16b</div><div class='del'>-	  eor		a6, a6, a10</div><div class='del'>-	eor		v19.16b, v7.16b, v11.16b</div><div class='del'>-	  eor		a7, a7, a11</div><div class='del'>-</div><div class='del'>-	shl		v4.4s, v16.4s, #12</div><div class='del'>-	shl		v5.4s, v17.4s, #12</div><div class='del'>-	shl		v6.4s, v18.4s, #12</div><div class='del'>-	shl		v7.4s, v19.4s, #12</div><div class='del'>-</div><div class='del'>-	sri		v4.4s, v16.4s, #20</div><div class='del'>-	  ror		a4, a4, #20</div><div class='del'>-	sri		v5.4s, v17.4s, #20</div><div class='del'>-	  ror		a5, a5, #20</div><div class='del'>-	sri		v6.4s, v18.4s, #20</div><div class='del'>-	  ror		a6, a6, #20</div><div class='del'>-	sri		v7.4s, v19.4s, #20</div><div class='del'>-	  ror		a7, a7, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x4, x12 = rotl32(x12 ^ x0, 8)</div><div class='del'>-	// x1 += x5, x13 = rotl32(x13 ^ x1, 8)</div><div class='del'>-	// x2 += x6, x14 = rotl32(x14 ^ x2, 8)</div><div class='del'>-	// x3 += x7, x15 = rotl32(x15 ^ x3, 8)</div><div class='del'>-	add		v0.4s, v0.4s, v4.4s</div><div class='del'>-	  add		a0, a0, a4</div><div class='del'>-	add		v1.4s, v1.4s, v5.4s</div><div class='del'>-	  add		a1, a1, a5</div><div class='del'>-	add		v2.4s, v2.4s, v6.4s</div><div class='del'>-	  add		a2, a2, a6</div><div class='del'>-	add		v3.4s, v3.4s, v7.4s</div><div class='del'>-	  add		a3, a3, a7</div><div class='del'>-</div><div class='del'>-	eor		v12.16b, v12.16b, v0.16b</div><div class='del'>-	  eor		a12, a12, a0</div><div class='del'>-	eor		v13.16b, v13.16b, v1.16b</div><div class='del'>-	  eor		a13, a13, a1</div><div class='del'>-	eor		v14.16b, v14.16b, v2.16b</div><div class='del'>-	  eor		a14, a14, a2</div><div class='del'>-	eor		v15.16b, v15.16b, v3.16b</div><div class='del'>-	  eor		a15, a15, a3</div><div class='del'>-</div><div class='del'>-	tbl		v12.16b, {v12.16b}, v31.16b</div><div class='del'>-	  ror		a12, a12, #24</div><div class='del'>-	tbl		v13.16b, {v13.16b}, v31.16b</div><div class='del'>-	  ror		a13, a13, #24</div><div class='del'>-	tbl		v14.16b, {v14.16b}, v31.16b</div><div class='del'>-	  ror		a14, a14, #24</div><div class='del'>-	tbl		v15.16b, {v15.16b}, v31.16b</div><div class='del'>-	  ror		a15, a15, #24</div><div class='del'>-</div><div class='del'>-	// x8 += x12, x4 = rotl32(x4 ^ x8, 7)</div><div class='del'>-	// x9 += x13, x5 = rotl32(x5 ^ x9, 7)</div><div class='del'>-	// x10 += x14, x6 = rotl32(x6 ^ x10, 7)</div><div class='del'>-	// x11 += x15, x7 = rotl32(x7 ^ x11, 7)</div><div class='del'>-	add		v8.4s, v8.4s, v12.4s</div><div class='del'>-	  add		a8, a8, a12</div><div class='del'>-	add		v9.4s, v9.4s, v13.4s</div><div class='del'>-	  add		a9, a9, a13</div><div class='del'>-	add		v10.4s, v10.4s, v14.4s</div><div class='del'>-	  add		a10, a10, a14</div><div class='del'>-	add		v11.4s, v11.4s, v15.4s</div><div class='del'>-	  add		a11, a11, a15</div><div class='del'>-</div><div class='del'>-	eor		v16.16b, v4.16b, v8.16b</div><div class='del'>-	  eor		a4, a4, a8</div><div class='del'>-	eor		v17.16b, v5.16b, v9.16b</div><div class='del'>-	  eor		a5, a5, a9</div><div class='del'>-	eor		v18.16b, v6.16b, v10.16b</div><div class='del'>-	  eor		a6, a6, a10</div><div class='del'>-	eor		v19.16b, v7.16b, v11.16b</div><div class='del'>-	  eor		a7, a7, a11</div><div class='del'>-</div><div class='del'>-	shl		v4.4s, v16.4s, #7</div><div class='del'>-	shl		v5.4s, v17.4s, #7</div><div class='del'>-	shl		v6.4s, v18.4s, #7</div><div class='del'>-	shl		v7.4s, v19.4s, #7</div><div class='del'>-</div><div class='del'>-	sri		v4.4s, v16.4s, #25</div><div class='del'>-	  ror		a4, a4, #25</div><div class='del'>-	sri		v5.4s, v17.4s, #25</div><div class='del'>-	  ror		a5, a5, #25</div><div class='del'>-	sri		v6.4s, v18.4s, #25</div><div class='del'>-	 ror		a6, a6, #25</div><div class='del'>-	sri		v7.4s, v19.4s, #25</div><div class='del'>-	  ror		a7, a7, #25</div><div class='del'>-</div><div class='del'>-	// x0 += x5, x15 = rotl32(x15 ^ x0, 16)</div><div class='del'>-	// x1 += x6, x12 = rotl32(x12 ^ x1, 16)</div><div class='del'>-	// x2 += x7, x13 = rotl32(x13 ^ x2, 16)</div><div class='del'>-	// x3 += x4, x14 = rotl32(x14 ^ x3, 16)</div><div class='del'>-	add		v0.4s, v0.4s, v5.4s</div><div class='del'>-	  add		a0, a0, a5</div><div class='del'>-	add		v1.4s, v1.4s, v6.4s</div><div class='del'>-	  add		a1, a1, a6</div><div class='del'>-	add		v2.4s, v2.4s, v7.4s</div><div class='del'>-	  add		a2, a2, a7</div><div class='del'>-	add		v3.4s, v3.4s, v4.4s</div><div class='del'>-	  add		a3, a3, a4</div><div class='del'>-</div><div class='del'>-	eor		v15.16b, v15.16b, v0.16b</div><div class='del'>-	  eor		a15, a15, a0</div><div class='del'>-	eor		v12.16b, v12.16b, v1.16b</div><div class='del'>-	  eor		a12, a12, a1</div><div class='del'>-	eor		v13.16b, v13.16b, v2.16b</div><div class='del'>-	  eor		a13, a13, a2</div><div class='del'>-	eor		v14.16b, v14.16b, v3.16b</div><div class='del'>-	  eor		a14, a14, a3</div><div class='del'>-</div><div class='del'>-	rev32		v15.8h, v15.8h</div><div class='del'>-	  ror		a15, a15, #16</div><div class='del'>-	rev32		v12.8h, v12.8h</div><div class='del'>-	  ror		a12, a12, #16</div><div class='del'>-	rev32		v13.8h, v13.8h</div><div class='del'>-	  ror		a13, a13, #16</div><div class='del'>-	rev32		v14.8h, v14.8h</div><div class='del'>-	  ror		a14, a14, #16</div><div class='del'>-</div><div class='del'>-	// x10 += x15, x5 = rotl32(x5 ^ x10, 12)</div><div class='del'>-	// x11 += x12, x6 = rotl32(x6 ^ x11, 12)</div><div class='del'>-	// x8 += x13, x7 = rotl32(x7 ^ x8, 12)</div><div class='del'>-	// x9 += x14, x4 = rotl32(x4 ^ x9, 12)</div><div class='del'>-	add		v10.4s, v10.4s, v15.4s</div><div class='del'>-	  add		a10, a10, a15</div><div class='del'>-	add		v11.4s, v11.4s, v12.4s</div><div class='del'>-	  add		a11, a11, a12</div><div class='del'>-	add		v8.4s, v8.4s, v13.4s</div><div class='del'>-	  add		a8, a8, a13</div><div class='del'>-	add		v9.4s, v9.4s, v14.4s</div><div class='del'>-	  add		a9, a9, a14</div><div class='del'>-</div><div class='del'>-	eor		v16.16b, v5.16b, v10.16b</div><div class='del'>-	  eor		a5, a5, a10</div><div class='del'>-	eor		v17.16b, v6.16b, v11.16b</div><div class='del'>-	  eor		a6, a6, a11</div><div class='del'>-	eor		v18.16b, v7.16b, v8.16b</div><div class='del'>-	  eor		a7, a7, a8</div><div class='del'>-	eor		v19.16b, v4.16b, v9.16b</div><div class='del'>-	  eor		a4, a4, a9</div><div class='del'>-</div><div class='del'>-	shl		v5.4s, v16.4s, #12</div><div class='del'>-	shl		v6.4s, v17.4s, #12</div><div class='del'>-	shl		v7.4s, v18.4s, #12</div><div class='del'>-	shl		v4.4s, v19.4s, #12</div><div class='del'>-</div><div class='del'>-	sri		v5.4s, v16.4s, #20</div><div class='del'>-	  ror		a5, a5, #20</div><div class='del'>-	sri		v6.4s, v17.4s, #20</div><div class='del'>-	  ror		a6, a6, #20</div><div class='del'>-	sri		v7.4s, v18.4s, #20</div><div class='del'>-	  ror		a7, a7, #20</div><div class='del'>-	sri		v4.4s, v19.4s, #20</div><div class='del'>-	  ror		a4, a4, #20</div><div class='del'>-</div><div class='del'>-	// x0 += x5, x15 = rotl32(x15 ^ x0, 8)</div><div class='del'>-	// x1 += x6, x12 = rotl32(x12 ^ x1, 8)</div><div class='del'>-	// x2 += x7, x13 = rotl32(x13 ^ x2, 8)</div><div class='del'>-	// x3 += x4, x14 = rotl32(x14 ^ x3, 8)</div><div class='del'>-	add		v0.4s, v0.4s, v5.4s</div><div class='del'>-	  add		a0, a0, a5</div><div class='del'>-	add		v1.4s, v1.4s, v6.4s</div><div class='del'>-	  add		a1, a1, a6</div><div class='del'>-	add		v2.4s, v2.4s, v7.4s</div><div class='del'>-	  add		a2, a2, a7</div><div class='del'>-	add		v3.4s, v3.4s, v4.4s</div><div class='del'>-	  add		a3, a3, a4</div><div class='del'>-</div><div class='del'>-	eor		v15.16b, v15.16b, v0.16b</div><div class='del'>-	  eor		a15, a15, a0</div><div class='del'>-	eor		v12.16b, v12.16b, v1.16b</div><div class='del'>-	  eor		a12, a12, a1</div><div class='del'>-	eor		v13.16b, v13.16b, v2.16b</div><div class='del'>-	  eor		a13, a13, a2</div><div class='del'>-	eor		v14.16b, v14.16b, v3.16b</div><div class='del'>-	  eor		a14, a14, a3</div><div class='del'>-</div><div class='del'>-	tbl		v15.16b, {v15.16b}, v31.16b</div><div class='del'>-	  ror		a15, a15, #24</div><div class='del'>-	tbl		v12.16b, {v12.16b}, v31.16b</div><div class='del'>-	  ror		a12, a12, #24</div><div class='del'>-	tbl		v13.16b, {v13.16b}, v31.16b</div><div class='del'>-	  ror		a13, a13, #24</div><div class='del'>-	tbl		v14.16b, {v14.16b}, v31.16b</div><div class='del'>-	  ror		a14, a14, #24</div><div class='del'>-</div><div class='del'>-	// x10 += x15, x5 = rotl32(x5 ^ x10, 7)</div><div class='del'>-	// x11 += x12, x6 = rotl32(x6 ^ x11, 7)</div><div class='del'>-	// x8 += x13, x7 = rotl32(x7 ^ x8, 7)</div><div class='del'>-	// x9 += x14, x4 = rotl32(x4 ^ x9, 7)</div><div class='del'>-	add		v10.4s, v10.4s, v15.4s</div><div class='del'>-	  add		a10, a10, a15</div><div class='del'>-	add		v11.4s, v11.4s, v12.4s</div><div class='del'>-	  add		a11, a11, a12</div><div class='del'>-	add		v8.4s, v8.4s, v13.4s</div><div class='del'>-	  add		a8, a8, a13</div><div class='del'>-	add		v9.4s, v9.4s, v14.4s</div><div class='del'>-	  add		a9, a9, a14</div><div class='del'>-</div><div class='del'>-	eor		v16.16b, v5.16b, v10.16b</div><div class='del'>-	  eor		a5, a5, a10</div><div class='del'>-	eor		v17.16b, v6.16b, v11.16b</div><div class='del'>-	  eor		a6, a6, a11</div><div class='del'>-	eor		v18.16b, v7.16b, v8.16b</div><div class='del'>-	  eor		a7, a7, a8</div><div class='del'>-	eor		v19.16b, v4.16b, v9.16b</div><div class='del'>-	  eor		a4, a4, a9</div><div class='del'>-</div><div class='del'>-	shl		v5.4s, v16.4s, #7</div><div class='del'>-	shl		v6.4s, v17.4s, #7</div><div class='del'>-	shl		v7.4s, v18.4s, #7</div><div class='del'>-	shl		v4.4s, v19.4s, #7</div><div class='del'>-</div><div class='del'>-	sri		v5.4s, v16.4s, #25</div><div class='del'>-	  ror		a5, a5, #25</div><div class='del'>-	sri		v6.4s, v17.4s, #25</div><div class='del'>-	  ror		a6, a6, #25</div><div class='del'>-	sri		v7.4s, v18.4s, #25</div><div class='del'>-	  ror		a7, a7, #25</div><div class='del'>-	sri		v4.4s, v19.4s, #25</div><div class='del'>-	  ror		a4, a4, #25</div><div class='del'>-</div><div class='del'>-	subs		w3, w3, #2</div><div class='del'>-	b.ne		.Ldoubleround4</div><div class='del'>-</div><div class='del'>-	ld4r		{v16.4s-v19.4s}, [x0], #16</div><div class='del'>-	ld4r		{v20.4s-v23.4s}, [x0], #16</div><div class='del'>-</div><div class='del'>-	// x12 += counter values 0-3</div><div class='del'>-	add		v12.4s, v12.4s, v30.4s</div><div class='del'>-</div><div class='del'>-	// x0[0-3] += s0[0]</div><div class='del'>-	// x1[0-3] += s0[1]</div><div class='del'>-	// x2[0-3] += s0[2]</div><div class='del'>-	// x3[0-3] += s0[3]</div><div class='del'>-	add		v0.4s, v0.4s, v16.4s</div><div class='del'>-	  mov		w6, v16.s[0]</div><div class='del'>-	  mov		w7, v17.s[0]</div><div class='del'>-	add		v1.4s, v1.4s, v17.4s</div><div class='del'>-	  mov		w8, v18.s[0]</div><div class='del'>-	  mov		w9, v19.s[0]</div><div class='del'>-	add		v2.4s, v2.4s, v18.4s</div><div class='del'>-	  add		a0, a0, w6</div><div class='del'>-	  add		a1, a1, w7</div><div class='del'>-	add		v3.4s, v3.4s, v19.4s</div><div class='del'>-	  add		a2, a2, w8</div><div class='del'>-	  add		a3, a3, w9</div><div class='del'>-CPU_BE(	  rev		a0, a0		)</div><div class='del'>-CPU_BE(	  rev		a1, a1		)</div><div class='del'>-CPU_BE(	  rev		a2, a2		)</div><div class='del'>-CPU_BE(	  rev		a3, a3		)</div><div class='del'>-</div><div class='del'>-	ld4r		{v24.4s-v27.4s}, [x0], #16</div><div class='del'>-	ld4r		{v28.4s-v31.4s}, [x0]</div><div class='del'>-</div><div class='del'>-	// x4[0-3] += s1[0]</div><div class='del'>-	// x5[0-3] += s1[1]</div><div class='del'>-	// x6[0-3] += s1[2]</div><div class='del'>-	// x7[0-3] += s1[3]</div><div class='del'>-	add		v4.4s, v4.4s, v20.4s</div><div class='del'>-	  mov		w6, v20.s[0]</div><div class='del'>-	  mov		w7, v21.s[0]</div><div class='del'>-	add		v5.4s, v5.4s, v21.4s</div><div class='del'>-	  mov		w8, v22.s[0]</div><div class='del'>-	  mov		w9, v23.s[0]</div><div class='del'>-	add		v6.4s, v6.4s, v22.4s</div><div class='del'>-	  add		a4, a4, w6</div><div class='del'>-	  add		a5, a5, w7</div><div class='del'>-	add		v7.4s, v7.4s, v23.4s</div><div class='del'>-	  add		a6, a6, w8</div><div class='del'>-	  add		a7, a7, w9</div><div class='del'>-CPU_BE(	  rev		a4, a4		)</div><div class='del'>-CPU_BE(	  rev		a5, a5		)</div><div class='del'>-CPU_BE(	  rev		a6, a6		)</div><div class='del'>-CPU_BE(	  rev		a7, a7		)</div><div class='del'>-</div><div class='del'>-	// x8[0-3] += s2[0]</div><div class='del'>-	// x9[0-3] += s2[1]</div><div class='del'>-	// x10[0-3] += s2[2]</div><div class='del'>-	// x11[0-3] += s2[3]</div><div class='del'>-	add		v8.4s, v8.4s, v24.4s</div><div class='del'>-	  mov		w6, v24.s[0]</div><div class='del'>-	  mov		w7, v25.s[0]</div><div class='del'>-	add		v9.4s, v9.4s, v25.4s</div><div class='del'>-	  mov		w8, v26.s[0]</div><div class='del'>-	  mov		w9, v27.s[0]</div><div class='del'>-	add		v10.4s, v10.4s, v26.4s</div><div class='del'>-	  add		a8, a8, w6</div><div class='del'>-	  add		a9, a9, w7</div><div class='del'>-	add		v11.4s, v11.4s, v27.4s</div><div class='del'>-	  add		a10, a10, w8</div><div class='del'>-	  add		a11, a11, w9</div><div class='del'>-CPU_BE(	  rev		a8, a8		)</div><div class='del'>-CPU_BE(	  rev		a9, a9		)</div><div class='del'>-CPU_BE(	  rev		a10, a10	)</div><div class='del'>-CPU_BE(	  rev		a11, a11	)</div><div class='del'>-</div><div class='del'>-	// x12[0-3] += s3[0]</div><div class='del'>-	// x13[0-3] += s3[1]</div><div class='del'>-	// x14[0-3] += s3[2]</div><div class='del'>-	// x15[0-3] += s3[3]</div><div class='del'>-	add		v12.4s, v12.4s, v28.4s</div><div class='del'>-	  mov		w6, v28.s[0]</div><div class='del'>-	  mov		w7, v29.s[0]</div><div class='del'>-	add		v13.4s, v13.4s, v29.4s</div><div class='del'>-	  mov		w8, v30.s[0]</div><div class='del'>-	  mov		w9, v31.s[0]</div><div class='del'>-	add		v14.4s, v14.4s, v30.4s</div><div class='del'>-	  add		a12, a12, w6</div><div class='del'>-	  add		a13, a13, w7</div><div class='del'>-	add		v15.4s, v15.4s, v31.4s</div><div class='del'>-	  add		a14, a14, w8</div><div class='del'>-	  add		a15, a15, w9</div><div class='del'>-CPU_BE(	  rev		a12, a12	)</div><div class='del'>-CPU_BE(	  rev		a13, a13	)</div><div class='del'>-CPU_BE(	  rev		a14, a14	)</div><div class='del'>-CPU_BE(	  rev		a15, a15	)</div><div class='del'>-</div><div class='del'>-	// interleave 32-bit words in state n, n+1</div><div class='del'>-	  ldp		w6, w7, [x2], #64</div><div class='del'>-	zip1		v16.4s, v0.4s, v1.4s</div><div class='del'>-	  ldp		w8, w9, [x2, #-56]</div><div class='del'>-	  eor		a0, a0, w6</div><div class='del'>-	zip2		v17.4s, v0.4s, v1.4s</div><div class='del'>-	  eor		a1, a1, w7</div><div class='del'>-	zip1		v18.4s, v2.4s, v3.4s</div><div class='del'>-	  eor		a2, a2, w8</div><div class='del'>-	zip2		v19.4s, v2.4s, v3.4s</div><div class='del'>-	  eor		a3, a3, w9</div><div class='del'>-	  ldp		w6, w7, [x2, #-48]</div><div class='del'>-	zip1		v20.4s, v4.4s, v5.4s</div><div class='del'>-	  ldp		w8, w9, [x2, #-40]</div><div class='del'>-	  eor		a4, a4, w6</div><div class='del'>-	zip2		v21.4s, v4.4s, v5.4s</div><div class='del'>-	  eor		a5, a5, w7</div><div class='del'>-	zip1		v22.4s, v6.4s, v7.4s</div><div class='del'>-	  eor		a6, a6, w8</div><div class='del'>-	zip2		v23.4s, v6.4s, v7.4s</div><div class='del'>-	  eor		a7, a7, w9</div><div class='del'>-	  ldp		w6, w7, [x2, #-32]</div><div class='del'>-	zip1		v24.4s, v8.4s, v9.4s</div><div class='del'>-	  ldp		w8, w9, [x2, #-24]</div><div class='del'>-	  eor		a8, a8, w6</div><div class='del'>-	zip2		v25.4s, v8.4s, v9.4s</div><div class='del'>-	  eor		a9, a9, w7</div><div class='del'>-	zip1		v26.4s, v10.4s, v11.4s</div><div class='del'>-	  eor		a10, a10, w8</div><div class='del'>-	zip2		v27.4s, v10.4s, v11.4s</div><div class='del'>-	  eor		a11, a11, w9</div><div class='del'>-	  ldp		w6, w7, [x2, #-16]</div><div class='del'>-	zip1		v28.4s, v12.4s, v13.4s</div><div class='del'>-	  ldp		w8, w9, [x2, #-8]</div><div class='del'>-	  eor		a12, a12, w6</div><div class='del'>-	zip2		v29.4s, v12.4s, v13.4s</div><div class='del'>-	  eor		a13, a13, w7</div><div class='del'>-	zip1		v30.4s, v14.4s, v15.4s</div><div class='del'>-	  eor		a14, a14, w8</div><div class='del'>-	zip2		v31.4s, v14.4s, v15.4s</div><div class='del'>-	  eor		a15, a15, w9</div><div class='del'>-</div><div class='del'>-	add		x3, x2, x4</div><div class='del'>-	sub		x3, x3, #128		// start of last block</div><div class='del'>-</div><div class='del'>-	subs		x5, x4, #128</div><div class='del'>-	csel		x2, x2, x3, ge</div><div class='del'>-</div><div class='del'>-	// interleave 64-bit words in state n, n+2</div><div class='del'>-	zip1		v0.2d, v16.2d, v18.2d</div><div class='del'>-	zip2		v4.2d, v16.2d, v18.2d</div><div class='del'>-	  stp		a0, a1, [x1], #64</div><div class='del'>-	zip1		v8.2d, v17.2d, v19.2d</div><div class='del'>-	zip2		v12.2d, v17.2d, v19.2d</div><div class='del'>-	  stp		a2, a3, [x1, #-56]</div><div class='del'>-</div><div class='del'>-	subs		x6, x4, #192</div><div class='del'>-	ld1		{v16.16b-v19.16b}, [x2], #64</div><div class='del'>-	csel		x2, x2, x3, ge</div><div class='del'>-</div><div class='del'>-	zip1		v1.2d, v20.2d, v22.2d</div><div class='del'>-	zip2		v5.2d, v20.2d, v22.2d</div><div class='del'>-	  stp		a4, a5, [x1, #-48]</div><div class='del'>-	zip1		v9.2d, v21.2d, v23.2d</div><div class='del'>-	zip2		v13.2d, v21.2d, v23.2d</div><div class='del'>-	  stp		a6, a7, [x1, #-40]</div><div class='del'>-</div><div class='del'>-	subs		x7, x4, #256</div><div class='del'>-	ld1		{v20.16b-v23.16b}, [x2], #64</div><div class='del'>-	csel		x2, x2, x3, ge</div><div class='del'>-</div><div class='del'>-	zip1		v2.2d, v24.2d, v26.2d</div><div class='del'>-	zip2		v6.2d, v24.2d, v26.2d</div><div class='del'>-	  stp		a8, a9, [x1, #-32]</div><div class='del'>-	zip1		v10.2d, v25.2d, v27.2d</div><div class='del'>-	zip2		v14.2d, v25.2d, v27.2d</div><div class='del'>-	  stp		a10, a11, [x1, #-24]</div><div class='del'>-</div><div class='del'>-	subs		x8, x4, #320</div><div class='del'>-	ld1		{v24.16b-v27.16b}, [x2], #64</div><div class='del'>-	csel		x2, x2, x3, ge</div><div class='del'>-</div><div class='del'>-	zip1		v3.2d, v28.2d, v30.2d</div><div class='del'>-	zip2		v7.2d, v28.2d, v30.2d</div><div class='del'>-	  stp		a12, a13, [x1, #-16]</div><div class='del'>-	zip1		v11.2d, v29.2d, v31.2d</div><div class='del'>-	zip2		v15.2d, v29.2d, v31.2d</div><div class='del'>-	  stp		a14, a15, [x1, #-8]</div><div class='del'>-</div><div class='del'>-	tbnz		x5, #63, .Lt128</div><div class='del'>-	ld1		{v28.16b-v31.16b}, [x2]</div><div class='del'>-</div><div class='del'>-	// xor with corresponding input, write to output</div><div class='del'>-	eor		v16.16b, v16.16b, v0.16b</div><div class='del'>-	eor		v17.16b, v17.16b, v1.16b</div><div class='del'>-	eor		v18.16b, v18.16b, v2.16b</div><div class='del'>-	eor		v19.16b, v19.16b, v3.16b</div><div class='del'>-</div><div class='del'>-	tbnz		x6, #63, .Lt192</div><div class='del'>-</div><div class='del'>-	eor		v20.16b, v20.16b, v4.16b</div><div class='del'>-	eor		v21.16b, v21.16b, v5.16b</div><div class='del'>-	eor		v22.16b, v22.16b, v6.16b</div><div class='del'>-	eor		v23.16b, v23.16b, v7.16b</div><div class='del'>-</div><div class='del'>-	st1		{v16.16b-v19.16b}, [x1], #64</div><div class='del'>-	tbnz		x7, #63, .Lt256</div><div class='del'>-</div><div class='del'>-	eor		v24.16b, v24.16b, v8.16b</div><div class='del'>-	eor		v25.16b, v25.16b, v9.16b</div><div class='del'>-	eor		v26.16b, v26.16b, v10.16b</div><div class='del'>-	eor		v27.16b, v27.16b, v11.16b</div><div class='del'>-</div><div class='del'>-	st1		{v20.16b-v23.16b}, [x1], #64</div><div class='del'>-	tbnz		x8, #63, .Lt320</div><div class='del'>-</div><div class='del'>-	eor		v28.16b, v28.16b, v12.16b</div><div class='del'>-	eor		v29.16b, v29.16b, v13.16b</div><div class='del'>-	eor		v30.16b, v30.16b, v14.16b</div><div class='del'>-	eor		v31.16b, v31.16b, v15.16b</div><div class='del'>-</div><div class='del'>-	st1		{v24.16b-v27.16b}, [x1], #64</div><div class='del'>-	st1		{v28.16b-v31.16b}, [x1]</div><div class='del'>-</div><div class='del'>-.Lout:	frame_pop</div><div class='del'>-	ret</div><div class='del'>-</div><div class='del'>-	// fewer than 192 bytes of in/output</div><div class='del'>-.Lt192:	cbz		x5, 1f				// exactly 128 bytes?</div><div class='del'>-	ld1		{v28.16b-v31.16b}, [x10]</div><div class='del'>-	add		x5, x5, x1</div><div class='del'>-	tbl		v28.16b, {v4.16b-v7.16b}, v28.16b</div><div class='del'>-	tbl		v29.16b, {v4.16b-v7.16b}, v29.16b</div><div class='del'>-	tbl		v30.16b, {v4.16b-v7.16b}, v30.16b</div><div class='del'>-	tbl		v31.16b, {v4.16b-v7.16b}, v31.16b</div><div class='del'>-</div><div class='del'>-0:	eor		v20.16b, v20.16b, v28.16b</div><div class='del'>-	eor		v21.16b, v21.16b, v29.16b</div><div class='del'>-	eor		v22.16b, v22.16b, v30.16b</div><div class='del'>-	eor		v23.16b, v23.16b, v31.16b</div><div class='del'>-	st1		{v20.16b-v23.16b}, [x5]		// overlapping stores</div><div class='del'>-1:	st1		{v16.16b-v19.16b}, [x1]</div><div class='del'>-	b		.Lout</div><div class='del'>-</div><div class='del'>-	// fewer than 128 bytes of in/output</div><div class='del'>-.Lt128:	ld1		{v28.16b-v31.16b}, [x10]</div><div class='del'>-	add		x5, x5, x1</div><div class='del'>-	sub		x1, x1, #64</div><div class='del'>-	tbl		v28.16b, {v0.16b-v3.16b}, v28.16b</div><div class='del'>-	tbl		v29.16b, {v0.16b-v3.16b}, v29.16b</div><div class='del'>-	tbl		v30.16b, {v0.16b-v3.16b}, v30.16b</div><div class='del'>-	tbl		v31.16b, {v0.16b-v3.16b}, v31.16b</div><div class='del'>-	ld1		{v16.16b-v19.16b}, [x1]		// reload first output block</div><div class='del'>-	b		0b</div><div class='del'>-</div><div class='del'>-	// fewer than 256 bytes of in/output</div><div class='del'>-.Lt256:	cbz		x6, 2f				// exactly 192 bytes?</div><div class='del'>-	ld1		{v4.16b-v7.16b}, [x10]</div><div class='del'>-	add		x6, x6, x1</div><div class='del'>-	tbl		v0.16b, {v8.16b-v11.16b}, v4.16b</div><div class='del'>-	tbl		v1.16b, {v8.16b-v11.16b}, v5.16b</div><div class='del'>-	tbl		v2.16b, {v8.16b-v11.16b}, v6.16b</div><div class='del'>-	tbl		v3.16b, {v8.16b-v11.16b}, v7.16b</div><div class='del'>-</div><div class='del'>-	eor		v28.16b, v28.16b, v0.16b</div><div class='del'>-	eor		v29.16b, v29.16b, v1.16b</div><div class='del'>-	eor		v30.16b, v30.16b, v2.16b</div><div class='del'>-	eor		v31.16b, v31.16b, v3.16b</div><div class='del'>-	st1		{v28.16b-v31.16b}, [x6]		// overlapping stores</div><div class='del'>-2:	st1		{v20.16b-v23.16b}, [x1]</div><div class='del'>-	b		.Lout</div><div class='del'>-</div><div class='del'>-	// fewer than 320 bytes of in/output</div><div class='del'>-.Lt320:	cbz		x7, 3f				// exactly 256 bytes?</div><div class='del'>-	ld1		{v4.16b-v7.16b}, [x10]</div><div class='del'>-	add		x7, x7, x1</div><div class='del'>-	tbl		v0.16b, {v12.16b-v15.16b}, v4.16b</div><div class='del'>-	tbl		v1.16b, {v12.16b-v15.16b}, v5.16b</div><div class='del'>-	tbl		v2.16b, {v12.16b-v15.16b}, v6.16b</div><div class='del'>-	tbl		v3.16b, {v12.16b-v15.16b}, v7.16b</div><div class='del'>-</div><div class='del'>-	eor		v28.16b, v28.16b, v0.16b</div><div class='del'>-	eor		v29.16b, v29.16b, v1.16b</div><div class='del'>-	eor		v30.16b, v30.16b, v2.16b</div><div class='del'>-	eor		v31.16b, v31.16b, v3.16b</div><div class='del'>-	st1		{v28.16b-v31.16b}, [x7]		// overlapping stores</div><div class='del'>-3:	st1		{v24.16b-v27.16b}, [x1]</div><div class='del'>-	b		.Lout</div><div class='del'>-SYM_FUNC_END(chacha_4block_xor_neon)</div><div class='del'>-</div><div class='del'>-	.section	".rodata", "a", %progbits</div><div class='del'>-	.align		L1_CACHE_SHIFT</div><div class='del'>-.Lpermute:</div><div class='del'>-	.set		.Li, 0</div><div class='del'>-	.rept		128</div><div class='del'>-	.byte		(.Li - 64)</div><div class='del'>-	.set		.Li, .Li + 1</div><div class='del'>-	.endr</div><div class='del'>-</div><div class='del'>-CTRINC:	.word		1, 2, 3, 4</div><div class='del'>-ROT8:	.word		0x02010003, 0x06050407, 0x0a09080b, 0x0e0d0c0f</div><div class='head'>diff --git a/arch/arm64/crypto/chacha-neon-glue.c b/arch/arm64/crypto/chacha-neon-glue.c<br/>deleted file mode 100644<br/>index af2bbca38e70..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/chacha-neon-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/chacha-neon-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,243 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ARM NEON and scalar accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 - 2017 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Based on:</div><div class='del'>- * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_block_xor_neon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				      int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_neon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       int nrounds, int bytes);</div><div class='del'>-asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			  int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	while (bytes &gt; 0) {</div><div class='del'>-		int l = min(bytes, CHACHA_BLOCK_SIZE * 5);</div><div class='del'>-</div><div class='del'>-		if (l &lt;= CHACHA_BLOCK_SIZE) {</div><div class='del'>-			u8 buf[CHACHA_BLOCK_SIZE];</div><div class='del'>-</div><div class='del'>-			memcpy(buf, src, l);</div><div class='del'>-			chacha_block_xor_neon(state, buf, buf, nrounds);</div><div class='del'>-			memcpy(dst, buf, l);</div><div class='del'>-			state[12] += 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon) || !crypto_simd_usable()) {</div><div class='del'>-		hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, stream, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	chacha_init_generic(state, key, iv);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_init_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='del'>-	    !crypto_simd_usable())</div><div class='del'>-		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_neon_stream_xor(struct skcipher_request *req,</div><div class='del'>-				  const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = rounddown(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!static_branch_likely(&amp;have_neon) ||</div><div class='del'>-		    !crypto_simd_usable()) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			chacha_doneon(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_neon_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-	hchacha_block_arch(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_neon_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_neon,</div><div class='del'>-		.decrypt		= chacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_have_named_feature(ASIMD))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_neon);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) &amp;&amp; cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (NEON accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-neon");</div><div class='head'>diff --git a/arch/arm64/crypto/crct10dif-ce-core.S b/arch/arm64/crypto/crct10dif-ce-core.S<br/>deleted file mode 100644<br/>index 5604de61d06d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/crct10dif-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/crct10dif-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,514 +0,0 @@</div><div class='del'>-//</div><div class='del'>-// Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions</div><div class='del'>-//</div><div class='del'>-// Copyright (C) 2016 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>-// Copyright (C) 2019 Google LLC &lt;ebiggers@google.com&gt;</div><div class='del'>-//</div><div class='del'>-// This program is free software; you can redistribute it and/or modify</div><div class='del'>-// it under the terms of the GNU General Public License version 2 as</div><div class='del'>-// published by the Free Software Foundation.</div><div class='del'>-//</div><div class='del'>-</div><div class='del'>-// Derived from the x86 version:</div><div class='del'>-//</div><div class='del'>-// Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions</div><div class='del'>-//</div><div class='del'>-// Copyright (c) 2013, Intel Corporation</div><div class='del'>-//</div><div class='del'>-// Authors:</div><div class='del'>-//     Erdinc Ozturk &lt;erdinc.ozturk@intel.com&gt;</div><div class='del'>-//     Vinodh Gopal &lt;vinodh.gopal@intel.com&gt;</div><div class='del'>-//     James Guilford &lt;james.guilford@intel.com&gt;</div><div class='del'>-//     Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>-//</div><div class='del'>-// This software is available to you under a choice of one of two</div><div class='del'>-// licenses.  You may choose to be licensed under the terms of the GNU</div><div class='del'>-// General Public License (GPL) Version 2, available from the file</div><div class='del'>-// COPYING in the main directory of this source tree, or the</div><div class='del'>-// OpenIB.org BSD license below:</div><div class='del'>-//</div><div class='del'>-// Redistribution and use in source and binary forms, with or without</div><div class='del'>-// modification, are permitted provided that the following conditions are</div><div class='del'>-// met:</div><div class='del'>-//</div><div class='del'>-// * Redistributions of source code must retain the above copyright</div><div class='del'>-//   notice, this list of conditions and the following disclaimer.</div><div class='del'>-//</div><div class='del'>-// * Redistributions in binary form must reproduce the above copyright</div><div class='del'>-//   notice, this list of conditions and the following disclaimer in the</div><div class='del'>-//   documentation and/or other materials provided with the</div><div class='del'>-//   distribution.</div><div class='del'>-//</div><div class='del'>-// * Neither the name of the Intel Corporation nor the names of its</div><div class='del'>-//   contributors may be used to endorse or promote products derived from</div><div class='del'>-//   this software without specific prior written permission.</div><div class='del'>-//</div><div class='del'>-//</div><div class='del'>-// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY</div><div class='del'>-// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR</div><div class='del'>-// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR</div><div class='del'>-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,</div><div class='del'>-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,</div><div class='del'>-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR</div><div class='del'>-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF</div><div class='del'>-// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING</div><div class='del'>-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</div><div class='del'>-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-//</div><div class='del'>-//       Reference paper titled "Fast CRC Computation for Generic</div><div class='del'>-//	Polynomials Using PCLMULQDQ Instruction"</div><div class='del'>-//       URL: http://www.intel.com/content/dam/www/public/us/en/documents</div><div class='del'>-//  /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf</div><div class='del'>-//</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a+crypto</div><div class='del'>-</div><div class='del'>-	init_crc	.req	w0</div><div class='del'>-	buf		.req	x1</div><div class='del'>-	len		.req	x2</div><div class='del'>-	fold_consts_ptr	.req	x3</div><div class='del'>-</div><div class='del'>-	fold_consts	.req	v10</div><div class='del'>-</div><div class='del'>-	ad		.req	v14</div><div class='del'>-</div><div class='del'>-	k00_16		.req	v15</div><div class='del'>-	k32_48		.req	v16</div><div class='del'>-</div><div class='del'>-	t3		.req	v17</div><div class='del'>-	t4		.req	v18</div><div class='del'>-	t5		.req	v19</div><div class='del'>-	t6		.req	v20</div><div class='del'>-	t7		.req	v21</div><div class='del'>-	t8		.req	v22</div><div class='del'>-	t9		.req	v23</div><div class='del'>-</div><div class='del'>-	perm1		.req	v24</div><div class='del'>-	perm2		.req	v25</div><div class='del'>-	perm3		.req	v26</div><div class='del'>-	perm4		.req	v27</div><div class='del'>-</div><div class='del'>-	bd1		.req	v28</div><div class='del'>-	bd2		.req	v29</div><div class='del'>-	bd3		.req	v30</div><div class='del'>-	bd4		.req	v31</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_init_p64</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_pre_p64, bd</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_init_p8</div><div class='del'>-	// k00_16 := 0x0000000000000000_000000000000ffff</div><div class='del'>-	// k32_48 := 0x00000000ffffffff_0000ffffffffffff</div><div class='del'>-	movi		k32_48.2d, #0xffffffff</div><div class='del'>-	mov		k32_48.h[2], k32_48.h[0]</div><div class='del'>-	ushr		k00_16.2d, k32_48.2d, #32</div><div class='del'>-</div><div class='del'>-	// prepare the permutation vectors</div><div class='del'>-	mov_q		x5, 0x080f0e0d0c0b0a09</div><div class='del'>-	movi		perm4.8b, #8</div><div class='del'>-	dup		perm1.2d, x5</div><div class='del'>-	eor		perm1.16b, perm1.16b, perm4.16b</div><div class='del'>-	ushr		perm2.2d, perm1.2d, #8</div><div class='del'>-	ushr		perm3.2d, perm1.2d, #16</div><div class='del'>-	ushr		perm4.2d, perm1.2d, #24</div><div class='del'>-	sli		perm2.2d, perm1.2d, #56</div><div class='del'>-	sli		perm3.2d, perm1.2d, #48</div><div class='del'>-	sli		perm4.2d, perm1.2d, #40</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_pre_p8, bd</div><div class='del'>-	tbl		bd1.16b, {\bd\().16b}, perm1.16b</div><div class='del'>-	tbl		bd2.16b, {\bd\().16b}, perm2.16b</div><div class='del'>-	tbl		bd3.16b, {\bd\().16b}, perm3.16b</div><div class='del'>-	tbl		bd4.16b, {\bd\().16b}, perm4.16b</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-SYM_FUNC_START_LOCAL(__pmull_p8_core)</div><div class='del'>-.L__pmull_p8_core:</div><div class='del'>-	ext		t4.8b, ad.8b, ad.8b, #1			// A1</div><div class='del'>-	ext		t5.8b, ad.8b, ad.8b, #2			// A2</div><div class='del'>-	ext		t6.8b, ad.8b, ad.8b, #3			// A3</div><div class='del'>-</div><div class='del'>-	pmull		t4.8h, t4.8b, fold_consts.8b		// F = A1*B</div><div class='del'>-	pmull		t8.8h, ad.8b, bd1.8b			// E = A*B1</div><div class='del'>-	pmull		t5.8h, t5.8b, fold_consts.8b		// H = A2*B</div><div class='del'>-	pmull		t7.8h, ad.8b, bd2.8b			// G = A*B2</div><div class='del'>-	pmull		t6.8h, t6.8b, fold_consts.8b		// J = A3*B</div><div class='del'>-	pmull		t9.8h, ad.8b, bd3.8b			// I = A*B3</div><div class='del'>-	pmull		t3.8h, ad.8b, bd4.8b			// K = A*B4</div><div class='del'>-	b		0f</div><div class='del'>-</div><div class='del'>-.L__pmull_p8_core2:</div><div class='del'>-	tbl		t4.16b, {ad.16b}, perm1.16b		// A1</div><div class='del'>-	tbl		t5.16b, {ad.16b}, perm2.16b		// A2</div><div class='del'>-	tbl		t6.16b, {ad.16b}, perm3.16b		// A3</div><div class='del'>-</div><div class='del'>-	pmull2		t4.8h, t4.16b, fold_consts.16b		// F = A1*B</div><div class='del'>-	pmull2		t8.8h, ad.16b, bd1.16b			// E = A*B1</div><div class='del'>-	pmull2		t5.8h, t5.16b, fold_consts.16b		// H = A2*B</div><div class='del'>-	pmull2		t7.8h, ad.16b, bd2.16b			// G = A*B2</div><div class='del'>-	pmull2		t6.8h, t6.16b, fold_consts.16b		// J = A3*B</div><div class='del'>-	pmull2		t9.8h, ad.16b, bd3.16b			// I = A*B3</div><div class='del'>-	pmull2		t3.8h, ad.16b, bd4.16b			// K = A*B4</div><div class='del'>-</div><div class='del'>-0:	eor		t4.16b, t4.16b, t8.16b			// L = E + F</div><div class='del'>-	eor		t5.16b, t5.16b, t7.16b			// M = G + H</div><div class='del'>-	eor		t6.16b, t6.16b, t9.16b			// N = I + J</div><div class='del'>-</div><div class='del'>-	uzp1		t8.2d, t4.2d, t5.2d</div><div class='del'>-	uzp2		t4.2d, t4.2d, t5.2d</div><div class='del'>-	uzp1		t7.2d, t6.2d, t3.2d</div><div class='del'>-	uzp2		t6.2d, t6.2d, t3.2d</div><div class='del'>-</div><div class='del'>-	// t4 = (L) (P0 + P1) &lt;&lt; 8</div><div class='del'>-	// t5 = (M) (P2 + P3) &lt;&lt; 16</div><div class='del'>-	eor		t8.16b, t8.16b, t4.16b</div><div class='del'>-	and		t4.16b, t4.16b, k32_48.16b</div><div class='del'>-</div><div class='del'>-	// t6 = (N) (P4 + P5) &lt;&lt; 24</div><div class='del'>-	// t7 = (K) (P6 + P7) &lt;&lt; 32</div><div class='del'>-	eor		t7.16b, t7.16b, t6.16b</div><div class='del'>-	and		t6.16b, t6.16b, k00_16.16b</div><div class='del'>-</div><div class='del'>-	eor		t8.16b, t8.16b, t4.16b</div><div class='del'>-	eor		t7.16b, t7.16b, t6.16b</div><div class='del'>-</div><div class='del'>-	zip2		t5.2d, t8.2d, t4.2d</div><div class='del'>-	zip1		t4.2d, t8.2d, t4.2d</div><div class='del'>-	zip2		t3.2d, t7.2d, t6.2d</div><div class='del'>-	zip1		t6.2d, t7.2d, t6.2d</div><div class='del'>-</div><div class='del'>-	ext		t4.16b, t4.16b, t4.16b, #15</div><div class='del'>-	ext		t5.16b, t5.16b, t5.16b, #14</div><div class='del'>-	ext		t6.16b, t6.16b, t6.16b, #13</div><div class='del'>-	ext		t3.16b, t3.16b, t3.16b, #12</div><div class='del'>-</div><div class='del'>-	eor		t4.16b, t4.16b, t5.16b</div><div class='del'>-	eor		t6.16b, t6.16b, t3.16b</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(__pmull_p8_core)</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_p8, rq, ad, bd, i</div><div class='del'>-	.ifnc		\bd, fold_consts</div><div class='del'>-	.err</div><div class='del'>-	.endif</div><div class='del'>-	mov		ad.16b, \ad\().16b</div><div class='del'>-	.ifb		\i</div><div class='del'>-	pmull		\rq\().8h, \ad\().8b, \bd\().8b		// D = A*B</div><div class='del'>-	.else</div><div class='del'>-	pmull2		\rq\().8h, \ad\().16b, \bd\().16b	// D = A*B</div><div class='del'>-	.endif</div><div class='del'>-</div><div class='del'>-	bl		.L__pmull_p8_core\i</div><div class='del'>-</div><div class='del'>-	eor		\rq\().16b, \rq\().16b, t4.16b</div><div class='del'>-	eor		\rq\().16b, \rq\().16b, t6.16b</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	// Fold reg1, reg2 into the next 32 data bytes, storing the result back</div><div class='del'>-	// into reg1, reg2.</div><div class='del'>-	.macro		fold_32_bytes, p, reg1, reg2</div><div class='del'>-	ldp		q11, q12, [buf], #0x20</div><div class='del'>-</div><div class='del'>-	__pmull_\p	v8, \reg1, fold_consts, 2</div><div class='del'>-	__pmull_\p	\reg1, \reg1, fold_consts</div><div class='del'>-</div><div class='del'>-CPU_LE(	rev64		v11.16b, v11.16b		)</div><div class='del'>-CPU_LE(	rev64		v12.16b, v12.16b		)</div><div class='del'>-</div><div class='del'>-	__pmull_\p	v9, \reg2, fold_consts, 2</div><div class='del'>-	__pmull_\p	\reg2, \reg2, fold_consts</div><div class='del'>-</div><div class='del'>-CPU_LE(	ext		v11.16b, v11.16b, v11.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v12.16b, v12.16b, v12.16b, #8	)</div><div class='del'>-</div><div class='del'>-	eor		\reg1\().16b, \reg1\().16b, v8.16b</div><div class='del'>-	eor		\reg2\().16b, \reg2\().16b, v9.16b</div><div class='del'>-	eor		\reg1\().16b, \reg1\().16b, v11.16b</div><div class='del'>-	eor		\reg2\().16b, \reg2\().16b, v12.16b</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	// Fold src_reg into dst_reg, optionally loading the next fold constants</div><div class='del'>-	.macro		fold_16_bytes, p, src_reg, dst_reg, load_next_consts</div><div class='del'>-	__pmull_\p	v8, \src_reg, fold_consts</div><div class='del'>-	__pmull_\p	\src_reg, \src_reg, fold_consts, 2</div><div class='del'>-	.ifnb		\load_next_consts</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr], #16</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-	.endif</div><div class='del'>-	eor		\dst_reg\().16b, \dst_reg\().16b, v8.16b</div><div class='del'>-	eor		\dst_reg\().16b, \dst_reg\().16b, \src_reg\().16b</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__pmull_p64, rd, rn, rm, n</div><div class='del'>-	.ifb		\n</div><div class='del'>-	pmull		\rd\().1q, \rn\().1d, \rm\().1d</div><div class='del'>-	.else</div><div class='del'>-	pmull2		\rd\().1q, \rn\().2d, \rm\().2d</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		crc_t10dif_pmull, p</div><div class='del'>-	__pmull_init_\p</div><div class='del'>-</div><div class='del'>-	// For sizes less than 256 bytes, we can't fold 128 bytes at a time.</div><div class='del'>-	cmp		len, #256</div><div class='del'>-	b.lt		.Lless_than_256_bytes_\@</div><div class='del'>-</div><div class='del'>-	adr_l		fold_consts_ptr, .Lfold_across_128_bytes_consts</div><div class='del'>-</div><div class='del'>-	// Load the first 128 data bytes.  Byte swapping is necessary to make</div><div class='del'>-	// the bit order match the polynomial coefficient order.</div><div class='del'>-	ldp		q0, q1, [buf]</div><div class='del'>-	ldp		q2, q3, [buf, #0x20]</div><div class='del'>-	ldp		q4, q5, [buf, #0x40]</div><div class='del'>-	ldp		q6, q7, [buf, #0x60]</div><div class='del'>-	add		buf, buf, #0x80</div><div class='del'>-CPU_LE(	rev64		v0.16b, v0.16b			)</div><div class='del'>-CPU_LE(	rev64		v1.16b, v1.16b			)</div><div class='del'>-CPU_LE(	rev64		v2.16b, v2.16b			)</div><div class='del'>-CPU_LE(	rev64		v3.16b, v3.16b			)</div><div class='del'>-CPU_LE(	rev64		v4.16b, v4.16b			)</div><div class='del'>-CPU_LE(	rev64		v5.16b, v5.16b			)</div><div class='del'>-CPU_LE(	rev64		v6.16b, v6.16b			)</div><div class='del'>-CPU_LE(	rev64		v7.16b, v7.16b			)</div><div class='del'>-CPU_LE(	ext		v0.16b, v0.16b, v0.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v1.16b, v1.16b, v1.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v2.16b, v2.16b, v2.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v3.16b, v3.16b, v3.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v4.16b, v4.16b, v4.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v5.16b, v5.16b, v5.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v6.16b, v6.16b, v6.16b, #8	)</div><div class='del'>-CPU_LE(	ext		v7.16b, v7.16b, v7.16b, #8	)</div><div class='del'>-</div><div class='del'>-	// XOR the first 16 data *bits* with the initial CRC value.</div><div class='del'>-	movi		v8.16b, #0</div><div class='del'>-	mov		v8.h[7], init_crc</div><div class='del'>-	eor		v0.16b, v0.16b, v8.16b</div><div class='del'>-</div><div class='del'>-	// Load the constants for folding across 128 bytes.</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr]</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-</div><div class='del'>-	// Subtract 128 for the 128 data bytes just consumed.  Subtract another</div><div class='del'>-	// 128 to simplify the termination condition of the following loop.</div><div class='del'>-	sub		len, len, #256</div><div class='del'>-</div><div class='del'>-	// While &gt;= 128 data bytes remain (not counting v0-v7), fold the 128</div><div class='del'>-	// bytes v0-v7 into them, storing the result back into v0-v7.</div><div class='del'>-.Lfold_128_bytes_loop_\@:</div><div class='del'>-	fold_32_bytes	\p, v0, v1</div><div class='del'>-	fold_32_bytes	\p, v2, v3</div><div class='del'>-	fold_32_bytes	\p, v4, v5</div><div class='del'>-	fold_32_bytes	\p, v6, v7</div><div class='del'>-</div><div class='del'>-	subs		len, len, #128</div><div class='del'>-	b.ge		.Lfold_128_bytes_loop_\@</div><div class='del'>-</div><div class='del'>-	// Now fold the 112 bytes in v0-v6 into the 16 bytes in v7.</div><div class='del'>-</div><div class='del'>-	// Fold across 64 bytes.</div><div class='del'>-	add		fold_consts_ptr, fold_consts_ptr, #16</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr], #16</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-	fold_16_bytes	\p, v0, v4</div><div class='del'>-	fold_16_bytes	\p, v1, v5</div><div class='del'>-	fold_16_bytes	\p, v2, v6</div><div class='del'>-	fold_16_bytes	\p, v3, v7, 1</div><div class='del'>-	// Fold across 32 bytes.</div><div class='del'>-	fold_16_bytes	\p, v4, v6</div><div class='del'>-	fold_16_bytes	\p, v5, v7, 1</div><div class='del'>-	// Fold across 16 bytes.</div><div class='del'>-	fold_16_bytes	\p, v6, v7</div><div class='del'>-</div><div class='del'>-	// Add 128 to get the correct number of data bytes remaining in 0...127</div><div class='del'>-	// (not counting v7), following the previous extra subtraction by 128.</div><div class='del'>-	// Then subtract 16 to simplify the termination condition of the</div><div class='del'>-	// following loop.</div><div class='del'>-	adds		len, len, #(128-16)</div><div class='del'>-</div><div class='del'>-	// While &gt;= 16 data bytes remain (not counting v7), fold the 16 bytes v7</div><div class='del'>-	// into them, storing the result back into v7.</div><div class='del'>-	b.lt		.Lfold_16_bytes_loop_done_\@</div><div class='del'>-.Lfold_16_bytes_loop_\@:</div><div class='del'>-	__pmull_\p	v8, v7, fold_consts</div><div class='del'>-	__pmull_\p	v7, v7, fold_consts, 2</div><div class='del'>-	eor		v7.16b, v7.16b, v8.16b</div><div class='del'>-	ldr		q0, [buf], #16</div><div class='del'>-CPU_LE(	rev64		v0.16b, v0.16b			)</div><div class='del'>-CPU_LE(	ext		v0.16b, v0.16b, v0.16b, #8	)</div><div class='del'>-	eor		v7.16b, v7.16b, v0.16b</div><div class='del'>-	subs		len, len, #16</div><div class='del'>-	b.ge		.Lfold_16_bytes_loop_\@</div><div class='del'>-</div><div class='del'>-.Lfold_16_bytes_loop_done_\@:</div><div class='del'>-	// Add 16 to get the correct number of data bytes remaining in 0...15</div><div class='del'>-	// (not counting v7), following the previous extra subtraction by 16.</div><div class='del'>-	adds		len, len, #16</div><div class='del'>-	b.eq		.Lreduce_final_16_bytes_\@</div><div class='del'>-</div><div class='del'>-.Lhandle_partial_segment_\@:</div><div class='del'>-	// Reduce the last '16 + len' bytes where 1 &lt;= len &lt;= 15 and the first</div><div class='del'>-	// 16 bytes are in v7 and the rest are the remaining data in 'buf'.  To</div><div class='del'>-	// do this without needing a fold constant for each possible 'len',</div><div class='del'>-	// redivide the bytes into a first chunk of 'len' bytes and a second</div><div class='del'>-	// chunk of 16 bytes, then fold the first chunk into the second.</div><div class='del'>-</div><div class='del'>-	// v0 = last 16 original data bytes</div><div class='del'>-	add		buf, buf, len</div><div class='del'>-	ldr		q0, [buf, #-16]</div><div class='del'>-CPU_LE(	rev64		v0.16b, v0.16b			)</div><div class='del'>-CPU_LE(	ext		v0.16b, v0.16b, v0.16b, #8	)</div><div class='del'>-</div><div class='del'>-	// v1 = high order part of second chunk: v7 left-shifted by 'len' bytes.</div><div class='del'>-	adr_l		x4, .Lbyteshift_table + 16</div><div class='del'>-	sub		x4, x4, len</div><div class='del'>-	ld1		{v2.16b}, [x4]</div><div class='del'>-	tbl		v1.16b, {v7.16b}, v2.16b</div><div class='del'>-</div><div class='del'>-	// v3 = first chunk: v7 right-shifted by '16-len' bytes.</div><div class='del'>-	movi		v3.16b, #0x80</div><div class='del'>-	eor		v2.16b, v2.16b, v3.16b</div><div class='del'>-	tbl		v3.16b, {v7.16b}, v2.16b</div><div class='del'>-</div><div class='del'>-	// Convert to 8-bit masks: 'len' 0x00 bytes, then '16-len' 0xff bytes.</div><div class='del'>-	sshr		v2.16b, v2.16b, #7</div><div class='del'>-</div><div class='del'>-	// v2 = second chunk: 'len' bytes from v0 (low-order bytes),</div><div class='del'>-	// then '16-len' bytes from v1 (high-order bytes).</div><div class='del'>-	bsl		v2.16b, v1.16b, v0.16b</div><div class='del'>-</div><div class='del'>-	// Fold the first chunk into the second chunk, storing the result in v7.</div><div class='del'>-	__pmull_\p	v0, v3, fold_consts</div><div class='del'>-	__pmull_\p	v7, v3, fold_consts, 2</div><div class='del'>-	eor		v7.16b, v7.16b, v0.16b</div><div class='del'>-	eor		v7.16b, v7.16b, v2.16b</div><div class='del'>-</div><div class='del'>-.Lreduce_final_16_bytes_\@:</div><div class='del'>-	// Reduce the 128-bit value M(x), stored in v7, to the final 16-bit CRC.</div><div class='del'>-</div><div class='del'>-	movi		v2.16b, #0		// init zero register</div><div class='del'>-</div><div class='del'>-	// Load 'x^48 * (x^48 mod G(x))' and 'x^48 * (x^80 mod G(x))'.</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr], #16</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-</div><div class='del'>-	// Fold the high 64 bits into the low 64 bits, while also multiplying by</div><div class='del'>-	// x^64.  This produces a 128-bit value congruent to x^64 * M(x) and</div><div class='del'>-	// whose low 48 bits are 0.</div><div class='del'>-	ext		v0.16b, v2.16b, v7.16b, #8</div><div class='del'>-	__pmull_\p	v7, v7, fold_consts, 2	// high bits * x^48 * (x^80 mod G(x))</div><div class='del'>-	eor		v0.16b, v0.16b, v7.16b	// + low bits * x^64</div><div class='del'>-</div><div class='del'>-	// Fold the high 32 bits into the low 96 bits.  This produces a 96-bit</div><div class='del'>-	// value congruent to x^64 * M(x) and whose low 48 bits are 0.</div><div class='del'>-	ext		v1.16b, v0.16b, v2.16b, #12	// extract high 32 bits</div><div class='del'>-	mov		v0.s[3], v2.s[0]	// zero high 32 bits</div><div class='del'>-	__pmull_\p	v1, v1, fold_consts	// high 32 bits * x^48 * (x^48 mod G(x))</div><div class='del'>-	eor		v0.16b, v0.16b, v1.16b	// + low bits</div><div class='del'>-</div><div class='del'>-	// Load G(x) and floor(x^48 / G(x)).</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr]</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-</div><div class='del'>-	// Use Barrett reduction to compute the final CRC value.</div><div class='del'>-	__pmull_\p	v1, v0, fold_consts, 2	// high 32 bits * floor(x^48 / G(x))</div><div class='del'>-	ushr		v1.2d, v1.2d, #32	// /= x^32</div><div class='del'>-	__pmull_\p	v1, v1, fold_consts	// *= G(x)</div><div class='del'>-	ushr		v0.2d, v0.2d, #48</div><div class='del'>-	eor		v0.16b, v0.16b, v1.16b	// + low 16 nonzero bits</div><div class='del'>-	// Final CRC value (x^16 * M(x)) mod G(x) is in low 16 bits of v0.</div><div class='del'>-</div><div class='del'>-	umov		w0, v0.h[0]</div><div class='del'>-	.ifc		\p, p8</div><div class='del'>-	frame_pop</div><div class='del'>-	.endif</div><div class='del'>-	ret</div><div class='del'>-</div><div class='del'>-.Lless_than_256_bytes_\@:</div><div class='del'>-	// Checksumming a buffer of length 16...255 bytes</div><div class='del'>-</div><div class='del'>-	adr_l		fold_consts_ptr, .Lfold_across_16_bytes_consts</div><div class='del'>-</div><div class='del'>-	// Load the first 16 data bytes.</div><div class='del'>-	ldr		q7, [buf], #0x10</div><div class='del'>-CPU_LE(	rev64		v7.16b, v7.16b			)</div><div class='del'>-CPU_LE(	ext		v7.16b, v7.16b, v7.16b, #8	)</div><div class='del'>-</div><div class='del'>-	// XOR the first 16 data *bits* with the initial CRC value.</div><div class='del'>-	movi		v0.16b, #0</div><div class='del'>-	mov		v0.h[7], init_crc</div><div class='del'>-	eor		v7.16b, v7.16b, v0.16b</div><div class='del'>-</div><div class='del'>-	// Load the fold-across-16-bytes constants.</div><div class='del'>-	ld1		{fold_consts.2d}, [fold_consts_ptr], #16</div><div class='del'>-	__pmull_pre_\p	fold_consts</div><div class='del'>-</div><div class='del'>-	cmp		len, #16</div><div class='del'>-	b.eq		.Lreduce_final_16_bytes_\@	// len == 16</div><div class='del'>-	subs		len, len, #32</div><div class='del'>-	b.ge		.Lfold_16_bytes_loop_\@		// 32 &lt;= len &lt;= 255</div><div class='del'>-	add		len, len, #16</div><div class='del'>-	b		.Lhandle_partial_segment_\@	// 17 &lt;= len &lt;= 31</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-//</div><div class='del'>-// u16 crc_t10dif_pmull_p8(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-//</div><div class='del'>-// Assumes len &gt;= 16.</div><div class='del'>-//</div><div class='del'>-SYM_FUNC_START(crc_t10dif_pmull_p8)</div><div class='del'>-	frame_push	1</div><div class='del'>-	crc_t10dif_pmull p8</div><div class='del'>-SYM_FUNC_END(crc_t10dif_pmull_p8)</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-//</div><div class='del'>-// u16 crc_t10dif_pmull_p64(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-//</div><div class='del'>-// Assumes len &gt;= 16.</div><div class='del'>-//</div><div class='del'>-SYM_FUNC_START(crc_t10dif_pmull_p64)</div><div class='del'>-	crc_t10dif_pmull	p64</div><div class='del'>-SYM_FUNC_END(crc_t10dif_pmull_p64)</div><div class='del'>-</div><div class='del'>-	.section	".rodata", "a"</div><div class='del'>-	.align		4</div><div class='del'>-</div><div class='del'>-// Fold constants precomputed from the polynomial 0x18bb7</div><div class='del'>-// G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0</div><div class='del'>-.Lfold_across_128_bytes_consts:</div><div class='del'>-	.quad		0x0000000000006123	// x^(8*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000002295	// x^(8*128+64)	mod G(x)</div><div class='del'>-// .Lfold_across_64_bytes_consts:</div><div class='del'>-	.quad		0x0000000000001069	// x^(4*128)	mod G(x)</div><div class='del'>-	.quad		0x000000000000dd31	// x^(4*128+64)	mod G(x)</div><div class='del'>-// .Lfold_across_32_bytes_consts:</div><div class='del'>-	.quad		0x000000000000857d	// x^(2*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000007acc	// x^(2*128+64)	mod G(x)</div><div class='del'>-.Lfold_across_16_bytes_consts:</div><div class='del'>-	.quad		0x000000000000a010	// x^(1*128)	mod G(x)</div><div class='del'>-	.quad		0x0000000000001faa	// x^(1*128+64)	mod G(x)</div><div class='del'>-// .Lfinal_fold_consts:</div><div class='del'>-	.quad		0x1368000000000000	// x^48 * (x^48 mod G(x))</div><div class='del'>-	.quad		0x2d56000000000000	// x^48 * (x^80 mod G(x))</div><div class='del'>-// .Lbarrett_reduction_consts:</div><div class='del'>-	.quad		0x0000000000018bb7	// G(x)</div><div class='del'>-	.quad		0x00000001f65a57f8	// floor(x^48 / G(x))</div><div class='del'>-</div><div class='del'>-// For 1 &lt;= len &lt;= 15, the 16-byte vector beginning at &amp;byteshift_table[16 -</div><div class='del'>-// len] is the index vector to shift left by 'len' bytes, and is also {0x80,</div><div class='del'>-// ..., 0x80} XOR the index vector to shift right by '16 - len' bytes.</div><div class='del'>-.Lbyteshift_table:</div><div class='del'>-	.byte		 0x0, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87</div><div class='del'>-	.byte		0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f</div><div class='del'>-	.byte		 0x0,  0x1,  0x2,  0x3,  0x4,  0x5,  0x6,  0x7</div><div class='del'>-	.byte		 0x8,  0x9,  0xa,  0xb,  0xc,  0xd,  0xe , 0x0</div><div class='head'>diff --git a/arch/arm64/crypto/crct10dif-ce-glue.c b/arch/arm64/crypto/crct10dif-ce-glue.c<br/>deleted file mode 100644<br/>index 606d25c559ed..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/crct10dif-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/crct10dif-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,144 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crc-t10dif.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#define CRC_T10DIF_PMULL_CHUNK_SIZE	16U</div><div class='del'>-</div><div class='del'>-asmlinkage u16 crc_t10dif_pmull_p8(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-asmlinkage u16 crc_t10dif_pmull_p64(u16 init_crc, const u8 *buf, size_t len);</div><div class='del'>-</div><div class='del'>-static int crct10dif_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_update_pmull_p8(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (length &gt;= CRC_T10DIF_PMULL_CHUNK_SIZE &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-		do {</div><div class='del'>-			unsigned int chunk = length;</div><div class='del'>-</div><div class='del'>-			if (chunk &gt; SZ_4K + CRC_T10DIF_PMULL_CHUNK_SIZE)</div><div class='del'>-				chunk = SZ_4K;</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			*crc = crc_t10dif_pmull_p8(*crc, data, chunk);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			data += chunk;</div><div class='del'>-			length -= chunk;</div><div class='del'>-		} while (length);</div><div class='del'>-	} else {</div><div class='del'>-		*crc = crc_t10dif_generic(*crc, data, length);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_update_pmull_p64(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (length &gt;= CRC_T10DIF_PMULL_CHUNK_SIZE &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-		do {</div><div class='del'>-			unsigned int chunk = length;</div><div class='del'>-</div><div class='del'>-			if (chunk &gt; SZ_4K + CRC_T10DIF_PMULL_CHUNK_SIZE)</div><div class='del'>-				chunk = SZ_4K;</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			*crc = crc_t10dif_pmull_p64(*crc, data, chunk);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			data += chunk;</div><div class='del'>-			length -= chunk;</div><div class='del'>-		} while (length);</div><div class='del'>-	} else {</div><div class='del'>-		*crc = crc_t10dif_generic(*crc, data, length);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*(u16 *)out = *crc;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc_t10dif_alg[] = {{</div><div class='del'>-	.digestsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-	.init			= crct10dif_init,</div><div class='del'>-	.update			= crct10dif_update_pmull_p8,</div><div class='del'>-	.final			= crct10dif_final,</div><div class='del'>-	.descsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "crct10dif",</div><div class='del'>-	.base.cra_driver_name	= "crct10dif-arm64-neon",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= CRC_T10DIF_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-	.init			= crct10dif_init,</div><div class='del'>-	.update			= crct10dif_update_pmull_p64,</div><div class='del'>-	.final			= crct10dif_final,</div><div class='del'>-	.descsize		= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "crct10dif",</div><div class='del'>-	.base.cra_driver_name	= "crct10dif-arm64-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= CRC_T10DIF_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}};</div><div class='del'>-</div><div class='del'>-static int __init crc_t10dif_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_have_named_feature(PMULL))</div><div class='del'>-		return crypto_register_shashes(crc_t10dif_alg,</div><div class='del'>-					       ARRAY_SIZE(crc_t10dif_alg));</div><div class='del'>-	else</div><div class='del'>-		/* only register the first array element */</div><div class='del'>-		return crypto_register_shash(crc_t10dif_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc_t10dif_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_have_named_feature(PMULL))</div><div class='del'>-		crypto_unregister_shashes(crc_t10dif_alg,</div><div class='del'>-					  ARRAY_SIZE(crc_t10dif_alg));</div><div class='del'>-	else</div><div class='del'>-		crypto_unregister_shash(crc_t10dif_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(ASIMD, crc_t10dif_mod_init);</div><div class='del'>-module_exit(crc_t10dif_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CRC-T10DIF using arm64 NEON and Crypto Extensions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crct10dif");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crct10dif-arm64-ce");</div><div class='head'>diff --git a/arch/arm64/crypto/ghash-ce-glue.c b/arch/arm64/crypto/ghash-ce-glue.c<br/>index da7b7ec1a664..4995b6e22335 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/ghash-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/ghash-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/ghash-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/ghash-ce-glue.c</a></div><div class='hunk'>@@ -6,30 +6,27 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/gcm.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("GHASH and AES-GCM using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ghash");</div><div class='ctx'> </div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='del'>-</div><div class='ctx'> #define RFC4106_NONCE_SIZE	4</div><div class='ctx'> </div><div class='ctx'> struct ghash_key {</div><div class='hunk'>@@ -37,10 +34,8 @@ struct ghash_key {</div><div class='ctx'> 	u64			h[][2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='add'>+struct arm_ghash_desc_ctx {</div><div class='ctx'> 	u64 digest[GHASH_DIGEST_SIZE/sizeof(u64)];</div><div class='del'>-	u8 buf[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gcm_aes_ctx {</div><div class='hunk'>@@ -65,36 +60,12 @@ asmlinkage int pmull_gcm_decrypt(int bytes, u8 dst[], const u8 src[],</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='add'>+	*ctx = (struct arm_ghash_desc_ctx){};</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ghash_do_update(int blocks, u64 dg[], const char *src,</div><div class='del'>-			    struct ghash_key *key, const char *head)</div><div class='del'>-{</div><div class='del'>-	be128 dst = { cpu_to_be64(dg[1]), cpu_to_be64(dg[0]) };</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		const u8 *in = src;</div><div class='del'>-</div><div class='del'>-		if (head) {</div><div class='del'>-			in = head;</div><div class='del'>-			blocks++;</div><div class='del'>-			head = NULL;</div><div class='del'>-		} else {</div><div class='del'>-			src += GHASH_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		crypto_xor((u8 *)&amp;dst, in, GHASH_BLOCK_SIZE);</div><div class='del'>-		gf128mul_lle(&amp;dst, &amp;key-&gt;k);</div><div class='del'>-	} while (--blocks);</div><div class='del'>-</div><div class='del'>-	dg[0] = be64_to_cpu(dst.b);</div><div class='del'>-	dg[1] = be64_to_cpu(dst.a);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static __always_inline</div><div class='ctx'> void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 			  struct ghash_key *key, const char *head,</div><div class='hunk'>@@ -103,13 +74,9 @@ void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 					      u64 const h[][2],</div><div class='ctx'> 					      const char *head))</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		simd_update(blocks, dg, src, key-&gt;h, head);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		ghash_do_update(blocks, dg, src, key, head);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	simd_update(blocks, dg, src, key-&gt;h, head);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* avoid hogging the CPU for too long */</div><div class='hunk'>@@ -118,61 +85,59 @@ void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> static int ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	int blocks;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;count += len;</div><div class='add'>+	blocks = len / GHASH_BLOCK_SIZE;</div><div class='add'>+	len -= blocks * GHASH_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-	if ((partial + len) &gt;= GHASH_BLOCK_SIZE) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-		int blocks;</div><div class='del'>-</div><div class='del'>-		if (partial) {</div><div class='del'>-			int p = GHASH_BLOCK_SIZE - partial;</div><div class='add'>+	do {</div><div class='add'>+		int chunk = min(blocks, MAX_BLOCKS);</div><div class='ctx'> </div><div class='del'>-			memcpy(ctx-&gt;buf + partial, src, p);</div><div class='del'>-			src += p;</div><div class='del'>-			len -= p;</div><div class='del'>-		}</div><div class='add'>+		ghash_do_simd_update(chunk, ctx-&gt;digest, src, key, NULL,</div><div class='add'>+				     pmull_ghash_update_p8);</div><div class='add'>+		blocks -= chunk;</div><div class='add'>+		src += chunk * GHASH_BLOCK_SIZE;</div><div class='add'>+	} while (unlikely(blocks &gt; 0));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		blocks = len / GHASH_BLOCK_SIZE;</div><div class='del'>-		len %= GHASH_BLOCK_SIZE;</div><div class='add'>+static int ghash_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	u8 *dst = out;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			int chunk = min(blocks, MAX_BLOCKS);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			ghash_do_simd_update(chunk, ctx-&gt;digest, src, key,</div><div class='del'>-					     partial ? ctx-&gt;buf : NULL,</div><div class='del'>-					     pmull_ghash_update_p8);</div><div class='add'>+static int ghash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	const u8 *src = in;</div><div class='ctx'> </div><div class='del'>-			blocks -= chunk;</div><div class='del'>-			src += chunk * GHASH_BLOCK_SIZE;</div><div class='del'>-			partial = 0;</div><div class='del'>-		} while (unlikely(blocks &gt; 0));</div><div class='del'>-	}</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + partial, src, len);</div><div class='add'>+	ctx-&gt;digest[1] = get_unaligned_be64(src);</div><div class='add'>+	ctx-&gt;digest[0] = get_unaligned_be64(src + 8);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	if (partial) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-		memset(ctx-&gt;buf + partial, 0, GHASH_BLOCK_SIZE - partial);</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		ghash_do_simd_update(1, ctx-&gt;digest, ctx-&gt;buf, key, NULL,</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		ghash_do_simd_update(1, ctx-&gt;digest, src, key, NULL,</div><div class='ctx'> 				     pmull_ghash_update_p8);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='del'>-</div><div class='del'>-	memzero_explicit(ctx, sizeof(*ctx));</div><div class='del'>-	return 0;</div><div class='add'>+	return ghash_export(desc, dst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ghash_reflect(u64 h[], const be128 *k)</div><div class='hunk'>@@ -205,6 +170,7 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.base.cra_name		= "ghash",</div><div class='ctx'> 	.base.cra_driver_name	= "ghash-neon",</div><div class='ctx'> 	.base.cra_priority	= 150,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= GHASH_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct ghash_key) + sizeof(u64[2]),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -212,9 +178,12 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize		= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init			= ghash_init,</div><div class='ctx'> 	.update			= ghash_update,</div><div class='del'>-	.final			= ghash_final,</div><div class='add'>+	.finup			= ghash_finup,</div><div class='ctx'> 	.setkey			= ghash_setkey,</div><div class='del'>-	.descsize		= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.export			= ghash_export,</div><div class='add'>+	.import			= ghash_import,</div><div class='add'>+	.descsize		= sizeof(struct arm_ghash_desc_ctx),</div><div class='add'>+	.statesize		= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int num_rounds(struct crypto_aes_ctx *ctx)</div><div class='hunk'>@@ -308,21 +277,12 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u64 dg[], u32 len)</div><div class='ctx'> 	scatterwalk_start(&amp;walk, req-&gt;src);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		u32 n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		u8 *p;</div><div class='del'>-</div><div class='del'>-		if (!n) {</div><div class='del'>-			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='del'>-			n = scatterwalk_clamp(&amp;walk, len);</div><div class='del'>-		}</div><div class='del'>-		p = scatterwalk_map(&amp;walk);</div><div class='add'>+		unsigned int n;</div><div class='ctx'> </div><div class='del'>-		gcm_update_mac(dg, p, n, buf, &amp;buf_count, ctx);</div><div class='add'>+		n = scatterwalk_next(&amp;walk, len);</div><div class='add'>+		gcm_update_mac(dg, walk.addr, n, buf, &amp;buf_count, ctx);</div><div class='add'>+		scatterwalk_done_src(&amp;walk, n);</div><div class='ctx'> 		len -= n;</div><div class='del'>-</div><div class='del'>-		scatterwalk_unmap(p);</div><div class='del'>-		scatterwalk_advance(&amp;walk, n);</div><div class='del'>-		scatterwalk_done(&amp;walk, 0, len);</div><div class='ctx'> 	} while (len);</div><div class='ctx'> </div><div class='ctx'> 	if (buf_count) {</div><div class='head'>diff --git a/arch/arm64/crypto/poly1305-armv8.pl b/arch/arm64/crypto/poly1305-armv8.pl<br/>deleted file mode 100644<br/>index 22c9069c0650..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/poly1305-armv8.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/poly1305-armv8.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,917 +0,0 @@</div><div class='del'>-#!/usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause</div><div class='del'>-#</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov, @dot-asm, initially for the OpenSSL</div><div class='del'>-# project.</div><div class='del'>-# ====================================================================</div><div class='del'>-#</div><div class='del'>-# This module implements Poly1305 hash for ARMv8.</div><div class='del'>-#</div><div class='del'>-# June 2015</div><div class='del'>-#</div><div class='del'>-# Numbers are cycles per processed byte with poly1305_blocks alone.</div><div class='del'>-#</div><div class='del'>-#		IALU/gcc-4.9	NEON</div><div class='del'>-#</div><div class='del'>-# Apple A7	1.86/+5%	0.72</div><div class='del'>-# Cortex-A53	2.69/+58%	1.47</div><div class='del'>-# Cortex-A57	2.70/+7%	1.14</div><div class='del'>-# Denver	1.64/+50%	1.18(*)</div><div class='del'>-# X-Gene	2.13/+68%	2.27</div><div class='del'>-# Mongoose	1.77/+75%	1.12</div><div class='del'>-# Kryo		2.70/+55%	1.13</div><div class='del'>-# ThunderX2	1.17/+95%	1.36</div><div class='del'>-#</div><div class='del'>-# (*)	estimate based on resources availability is less than 1.0,</div><div class='del'>-#	i.e. measured result is worse than expected, presumably binary</div><div class='del'>-#	translator is not almighty;</div><div class='del'>-</div><div class='del'>-$flavour=shift;</div><div class='del'>-$output=shift;</div><div class='del'>-</div><div class='del'>-if ($flavour &amp;&amp; $flavour ne "void") {</div><div class='del'>-    $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;</div><div class='del'>-    ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or</div><div class='del'>-    ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or</div><div class='del'>-    die "can't locate arm-xlate.pl";</div><div class='del'>-</div><div class='del'>-    open STDOUT,"| \"$^X\" $xlate $flavour $output";</div><div class='del'>-} else {</div><div class='del'>-    open STDOUT,"&gt;$output";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-my ($ctx,$inp,$len,$padbit) = map("x$_",(0..3));</div><div class='del'>-my ($mac,$nonce)=($inp,$len);</div><div class='del'>-</div><div class='del'>-my ($h0,$h1,$h2,$r0,$r1,$s1,$t0,$t1,$d0,$d1,$d2) = map("x$_",(4..14));</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-# include "arm_arch.h"</div><div class='del'>-.extern	OPENSSL_armcap_P</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-// forward "declarations" are required for Apple</div><div class='del'>-.globl	poly1305_blocks</div><div class='del'>-.globl	poly1305_emit</div><div class='del'>-</div><div class='del'>-.globl	poly1305_init</div><div class='del'>-.type	poly1305_init,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_init:</div><div class='del'>-	cmp	$inp,xzr</div><div class='del'>-	stp	xzr,xzr,[$ctx]		// zero hash value</div><div class='del'>-	stp	xzr,xzr,[$ctx,#16]	// [along with is_base2_26]</div><div class='del'>-</div><div class='del'>-	csel	x0,xzr,x0,eq</div><div class='del'>-	b.eq	.Lno_key</div><div class='del'>-</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-	adrp	x17,OPENSSL_armcap_P</div><div class='del'>-	ldr	w17,[x17,#:lo12:OPENSSL_armcap_P]</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ldp	$r0,$r1,[$inp]		// load key</div><div class='del'>-	mov	$s1,#0xfffffffc0fffffff</div><div class='del'>-	movk	$s1,#0x0fff,lsl#48</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	$r0,$r0			// flip bytes</div><div class='del'>-	rev	$r1,$r1</div><div class='del'>-#endif</div><div class='del'>-	and	$r0,$r0,$s1		// &amp;=0ffffffc0fffffff</div><div class='del'>-	and	$s1,$s1,#-4</div><div class='del'>-	and	$r1,$r1,$s1		// &amp;=0ffffffc0ffffffc</div><div class='del'>-	mov	w#$s1,#-1</div><div class='del'>-	stp	$r0,$r1,[$ctx,#32]	// save key value</div><div class='del'>-	str	w#$s1,[$ctx,#48]	// impossible key power value</div><div class='del'>-</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-	tst	w17,#ARMV7_NEON</div><div class='del'>-</div><div class='del'>-	adr	$d0,.Lpoly1305_blocks</div><div class='del'>-	adr	$r0,.Lpoly1305_blocks_neon</div><div class='del'>-	adr	$d1,.Lpoly1305_emit</div><div class='del'>-</div><div class='del'>-	csel	$d0,$d0,$r0,eq</div><div class='del'>-</div><div class='del'>-# ifdef	__ILP32__</div><div class='del'>-	stp	w#$d0,w#$d1,[$len]</div><div class='del'>-# else</div><div class='del'>-	stp	$d0,$d1,[$len]</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	mov	x0,#1</div><div class='del'>-.Lno_key:</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_init,.-poly1305_init</div><div class='del'>-</div><div class='del'>-.type	poly1305_blocks,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_blocks:</div><div class='del'>-.Lpoly1305_blocks:</div><div class='del'>-	ands	$len,$len,#-16</div><div class='del'>-	b.eq	.Lno_data</div><div class='del'>-</div><div class='del'>-	ldp	$h0,$h1,[$ctx]		// load hash value</div><div class='del'>-	ldp	$h2,x17,[$ctx,#16]	// [along with is_base2_26]</div><div class='del'>-	ldp	$r0,$r1,[$ctx,#32]	// load key value</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	lsr	$d0,$h0,#32</div><div class='del'>-	mov	w#$d1,w#$h0</div><div class='del'>-	lsr	$d2,$h1,#32</div><div class='del'>-	mov	w15,w#$h1</div><div class='del'>-	lsr	x16,$h2,#32</div><div class='del'>-#else</div><div class='del'>-	mov	w#$d0,w#$h0</div><div class='del'>-	lsr	$d1,$h0,#32</div><div class='del'>-	mov	w#$d2,w#$h1</div><div class='del'>-	lsr	x15,$h1,#32</div><div class='del'>-	mov	w16,w#$h2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	add	$d0,$d0,$d1,lsl#26	// base 2^26 -&gt; base 2^64</div><div class='del'>-	lsr	$d1,$d2,#12</div><div class='del'>-	adds	$d0,$d0,$d2,lsl#52</div><div class='del'>-	add	$d1,$d1,x15,lsl#14</div><div class='del'>-	adc	$d1,$d1,xzr</div><div class='del'>-	lsr	$d2,x16,#24</div><div class='del'>-	adds	$d1,$d1,x16,lsl#40</div><div class='del'>-	adc	$d2,$d2,xzr</div><div class='del'>-</div><div class='del'>-	cmp	x17,#0			// is_base2_26?</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-	csel	$h0,$h0,$d0,eq		// choose between radixes</div><div class='del'>-	csel	$h1,$h1,$d1,eq</div><div class='del'>-	csel	$h2,$h2,$d2,eq</div><div class='del'>-</div><div class='del'>-.Loop:</div><div class='del'>-	ldp	$t0,$t1,[$inp],#16	// load input</div><div class='del'>-	sub	$len,$len,#16</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	$t0,$t0</div><div class='del'>-	rev	$t1,$t1</div><div class='del'>-#endif</div><div class='del'>-	adds	$h0,$h0,$t0		// accumulate input</div><div class='del'>-	adcs	$h1,$h1,$t1</div><div class='del'>-</div><div class='del'>-	mul	$d0,$h0,$r0		// h0*r0</div><div class='del'>-	adc	$h2,$h2,$padbit</div><div class='del'>-	umulh	$d1,$h0,$r0</div><div class='del'>-</div><div class='del'>-	mul	$t0,$h1,$s1		// h1*5*r1</div><div class='del'>-	umulh	$t1,$h1,$s1</div><div class='del'>-</div><div class='del'>-	adds	$d0,$d0,$t0</div><div class='del'>-	mul	$t0,$h0,$r1		// h0*r1</div><div class='del'>-	adc	$d1,$d1,$t1</div><div class='del'>-	umulh	$d2,$h0,$r1</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	mul	$t0,$h1,$r0		// h1*r0</div><div class='del'>-	adc	$d2,$d2,xzr</div><div class='del'>-	umulh	$t1,$h1,$r0</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	mul	$t0,$h2,$s1		// h2*5*r1</div><div class='del'>-	adc	$d2,$d2,$t1</div><div class='del'>-	mul	$t1,$h2,$r0		// h2*r0</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	adc	$d2,$d2,$t1</div><div class='del'>-</div><div class='del'>-	and	$t0,$d2,#-4		// final reduction</div><div class='del'>-	and	$h2,$d2,#3</div><div class='del'>-	add	$t0,$t0,$d2,lsr#2</div><div class='del'>-	adds	$h0,$d0,$t0</div><div class='del'>-	adcs	$h1,$d1,xzr</div><div class='del'>-	adc	$h2,$h2,xzr</div><div class='del'>-</div><div class='del'>-	cbnz	$len,.Loop</div><div class='del'>-</div><div class='del'>-	stp	$h0,$h1,[$ctx]		// store hash value</div><div class='del'>-	stp	$h2,xzr,[$ctx,#16]	// [and clear is_base2_26]</div><div class='del'>-</div><div class='del'>-.Lno_data:</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_blocks,.-poly1305_blocks</div><div class='del'>-</div><div class='del'>-.type	poly1305_emit,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_emit:</div><div class='del'>-.Lpoly1305_emit:</div><div class='del'>-	ldp	$h0,$h1,[$ctx]		// load hash base 2^64</div><div class='del'>-	ldp	$h2,$r0,[$ctx,#16]	// [along with is_base2_26]</div><div class='del'>-	ldp	$t0,$t1,[$nonce]	// load nonce</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	lsr	$d0,$h0,#32</div><div class='del'>-	mov	w#$d1,w#$h0</div><div class='del'>-	lsr	$d2,$h1,#32</div><div class='del'>-	mov	w15,w#$h1</div><div class='del'>-	lsr	x16,$h2,#32</div><div class='del'>-#else</div><div class='del'>-	mov	w#$d0,w#$h0</div><div class='del'>-	lsr	$d1,$h0,#32</div><div class='del'>-	mov	w#$d2,w#$h1</div><div class='del'>-	lsr	x15,$h1,#32</div><div class='del'>-	mov	w16,w#$h2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	add	$d0,$d0,$d1,lsl#26	// base 2^26 -&gt; base 2^64</div><div class='del'>-	lsr	$d1,$d2,#12</div><div class='del'>-	adds	$d0,$d0,$d2,lsl#52</div><div class='del'>-	add	$d1,$d1,x15,lsl#14</div><div class='del'>-	adc	$d1,$d1,xzr</div><div class='del'>-	lsr	$d2,x16,#24</div><div class='del'>-	adds	$d1,$d1,x16,lsl#40</div><div class='del'>-	adc	$d2,$d2,xzr</div><div class='del'>-</div><div class='del'>-	cmp	$r0,#0			// is_base2_26?</div><div class='del'>-	csel	$h0,$h0,$d0,eq		// choose between radixes</div><div class='del'>-	csel	$h1,$h1,$d1,eq</div><div class='del'>-	csel	$h2,$h2,$d2,eq</div><div class='del'>-</div><div class='del'>-	adds	$d0,$h0,#5		// compare to modulus</div><div class='del'>-	adcs	$d1,$h1,xzr</div><div class='del'>-	adc	$d2,$h2,xzr</div><div class='del'>-</div><div class='del'>-	tst	$d2,#-4			// see if it's carried/borrowed</div><div class='del'>-</div><div class='del'>-	csel	$h0,$h0,$d0,eq</div><div class='del'>-	csel	$h1,$h1,$d1,eq</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	ror	$t0,$t0,#32		// flip nonce words</div><div class='del'>-	ror	$t1,$t1,#32</div><div class='del'>-#endif</div><div class='del'>-	adds	$h0,$h0,$t0		// accumulate nonce</div><div class='del'>-	adc	$h1,$h1,$t1</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	$h0,$h0			// flip output bytes</div><div class='del'>-	rev	$h1,$h1</div><div class='del'>-#endif</div><div class='del'>-	stp	$h0,$h1,[$mac]		// write result</div><div class='del'>-</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_emit,.-poly1305_emit</div><div class='del'>-___</div><div class='del'>-my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));</div><div class='del'>-my ($IN01_0,$IN01_1,$IN01_2,$IN01_3,$IN01_4) = map("v$_.2s",(9..13));</div><div class='del'>-my ($IN23_0,$IN23_1,$IN23_2,$IN23_3,$IN23_4) = map("v$_.2s",(14..18));</div><div class='del'>-my ($ACC0,$ACC1,$ACC2,$ACC3,$ACC4) = map("v$_.2d",(19..23));</div><div class='del'>-my ($H0,$H1,$H2,$H3,$H4) = map("v$_.2s",(24..28));</div><div class='del'>-my ($T0,$T1,$MASK) = map("v$_",(29..31));</div><div class='del'>-</div><div class='del'>-my ($in2,$zeros)=("x16","x17");</div><div class='del'>-my $is_base2_26 = $zeros;		# borrow</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.type	poly1305_mult,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_mult:</div><div class='del'>-	mul	$d0,$h0,$r0		// h0*r0</div><div class='del'>-	umulh	$d1,$h0,$r0</div><div class='del'>-</div><div class='del'>-	mul	$t0,$h1,$s1		// h1*5*r1</div><div class='del'>-	umulh	$t1,$h1,$s1</div><div class='del'>-</div><div class='del'>-	adds	$d0,$d0,$t0</div><div class='del'>-	mul	$t0,$h0,$r1		// h0*r1</div><div class='del'>-	adc	$d1,$d1,$t1</div><div class='del'>-	umulh	$d2,$h0,$r1</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	mul	$t0,$h1,$r0		// h1*r0</div><div class='del'>-	adc	$d2,$d2,xzr</div><div class='del'>-	umulh	$t1,$h1,$r0</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	mul	$t0,$h2,$s1		// h2*5*r1</div><div class='del'>-	adc	$d2,$d2,$t1</div><div class='del'>-	mul	$t1,$h2,$r0		// h2*r0</div><div class='del'>-</div><div class='del'>-	adds	$d1,$d1,$t0</div><div class='del'>-	adc	$d2,$d2,$t1</div><div class='del'>-</div><div class='del'>-	and	$t0,$d2,#-4		// final reduction</div><div class='del'>-	and	$h2,$d2,#3</div><div class='del'>-	add	$t0,$t0,$d2,lsr#2</div><div class='del'>-	adds	$h0,$d0,$t0</div><div class='del'>-	adcs	$h1,$d1,xzr</div><div class='del'>-	adc	$h2,$h2,xzr</div><div class='del'>-</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_mult,.-poly1305_mult</div><div class='del'>-</div><div class='del'>-.type	poly1305_splat,%function</div><div class='del'>-.align	4</div><div class='del'>-poly1305_splat:</div><div class='del'>-	and	x12,$h0,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	ubfx	x13,$h0,#26,#26</div><div class='del'>-	extr	x14,$h1,$h0,#52</div><div class='del'>-	and	x14,x14,#0x03ffffff</div><div class='del'>-	ubfx	x15,$h1,#14,#26</div><div class='del'>-	extr	x16,$h2,$h1,#40</div><div class='del'>-</div><div class='del'>-	str	w12,[$ctx,#16*0]	// r0</div><div class='del'>-	add	w12,w13,w13,lsl#2	// r1*5</div><div class='del'>-	str	w13,[$ctx,#16*1]	// r1</div><div class='del'>-	add	w13,w14,w14,lsl#2	// r2*5</div><div class='del'>-	str	w12,[$ctx,#16*2]	// s1</div><div class='del'>-	str	w14,[$ctx,#16*3]	// r2</div><div class='del'>-	add	w14,w15,w15,lsl#2	// r3*5</div><div class='del'>-	str	w13,[$ctx,#16*4]	// s2</div><div class='del'>-	str	w15,[$ctx,#16*5]	// r3</div><div class='del'>-	add	w15,w16,w16,lsl#2	// r4*5</div><div class='del'>-	str	w14,[$ctx,#16*6]	// s3</div><div class='del'>-	str	w16,[$ctx,#16*7]	// r4</div><div class='del'>-	str	w15,[$ctx,#16*8]	// s4</div><div class='del'>-</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_splat,.-poly1305_splat</div><div class='del'>-</div><div class='del'>-#ifdef	__KERNEL__</div><div class='del'>-.globl	poly1305_blocks_neon</div><div class='del'>-#endif</div><div class='del'>-.type	poly1305_blocks_neon,%function</div><div class='del'>-.align	5</div><div class='del'>-poly1305_blocks_neon:</div><div class='del'>-.Lpoly1305_blocks_neon:</div><div class='del'>-	ldr	$is_base2_26,[$ctx,#24]</div><div class='del'>-	cmp	$len,#128</div><div class='del'>-	b.lo	.Lpoly1305_blocks</div><div class='del'>-</div><div class='del'>-	.inst	0xd503233f		// paciasp</div><div class='del'>-	stp	x29,x30,[sp,#-80]!</div><div class='del'>-	add	x29,sp,#0</div><div class='del'>-</div><div class='del'>-	stp	d8,d9,[sp,#16]		// meet ABI requirements</div><div class='del'>-	stp	d10,d11,[sp,#32]</div><div class='del'>-	stp	d12,d13,[sp,#48]</div><div class='del'>-	stp	d14,d15,[sp,#64]</div><div class='del'>-</div><div class='del'>-	cbz	$is_base2_26,.Lbase2_64_neon</div><div class='del'>-</div><div class='del'>-	ldp	w10,w11,[$ctx]		// load hash value base 2^26</div><div class='del'>-	ldp	w12,w13,[$ctx,#8]</div><div class='del'>-	ldr	w14,[$ctx,#16]</div><div class='del'>-</div><div class='del'>-	tst	$len,#31</div><div class='del'>-	b.eq	.Leven_neon</div><div class='del'>-</div><div class='del'>-	ldp	$r0,$r1,[$ctx,#32]	// load key value</div><div class='del'>-</div><div class='del'>-	add	$h0,x10,x11,lsl#26	// base 2^26 -&gt; base 2^64</div><div class='del'>-	lsr	$h1,x12,#12</div><div class='del'>-	adds	$h0,$h0,x12,lsl#52</div><div class='del'>-	add	$h1,$h1,x13,lsl#14</div><div class='del'>-	adc	$h1,$h1,xzr</div><div class='del'>-	lsr	$h2,x14,#24</div><div class='del'>-	adds	$h1,$h1,x14,lsl#40</div><div class='del'>-	adc	$d2,$h2,xzr		// can be partially reduced...</div><div class='del'>-</div><div class='del'>-	ldp	$d0,$d1,[$inp],#16	// load input</div><div class='del'>-	sub	$len,$len,#16</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	$d0,$d0</div><div class='del'>-	rev	$d1,$d1</div><div class='del'>-#endif</div><div class='del'>-	adds	$h0,$h0,$d0		// accumulate input</div><div class='del'>-	adcs	$h1,$h1,$d1</div><div class='del'>-	adc	$h2,$h2,$padbit</div><div class='del'>-</div><div class='del'>-	bl	poly1305_mult</div><div class='del'>-</div><div class='del'>-	and	x10,$h0,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	ubfx	x11,$h0,#26,#26</div><div class='del'>-	extr	x12,$h1,$h0,#52</div><div class='del'>-	and	x12,x12,#0x03ffffff</div><div class='del'>-	ubfx	x13,$h1,#14,#26</div><div class='del'>-	extr	x14,$h2,$h1,#40</div><div class='del'>-</div><div class='del'>-	b	.Leven_neon</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Lbase2_64_neon:</div><div class='del'>-	ldp	$r0,$r1,[$ctx,#32]	// load key value</div><div class='del'>-</div><div class='del'>-	ldp	$h0,$h1,[$ctx]		// load hash value base 2^64</div><div class='del'>-	ldr	$h2,[$ctx,#16]</div><div class='del'>-</div><div class='del'>-	tst	$len,#31</div><div class='del'>-	b.eq	.Linit_neon</div><div class='del'>-</div><div class='del'>-	ldp	$d0,$d1,[$inp],#16	// load input</div><div class='del'>-	sub	$len,$len,#16</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	$d0,$d0</div><div class='del'>-	rev	$d1,$d1</div><div class='del'>-#endif</div><div class='del'>-	adds	$h0,$h0,$d0		// accumulate input</div><div class='del'>-	adcs	$h1,$h1,$d1</div><div class='del'>-	adc	$h2,$h2,$padbit</div><div class='del'>-</div><div class='del'>-	bl	poly1305_mult</div><div class='del'>-</div><div class='del'>-.Linit_neon:</div><div class='del'>-	ldr	w17,[$ctx,#48]		// first table element</div><div class='del'>-	and	x10,$h0,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	ubfx	x11,$h0,#26,#26</div><div class='del'>-	extr	x12,$h1,$h0,#52</div><div class='del'>-	and	x12,x12,#0x03ffffff</div><div class='del'>-	ubfx	x13,$h1,#14,#26</div><div class='del'>-	extr	x14,$h2,$h1,#40</div><div class='del'>-</div><div class='del'>-	cmp	w17,#-1			// is value impossible?</div><div class='del'>-	b.ne	.Leven_neon</div><div class='del'>-</div><div class='del'>-	fmov	${H0},x10</div><div class='del'>-	fmov	${H1},x11</div><div class='del'>-	fmov	${H2},x12</div><div class='del'>-	fmov	${H3},x13</div><div class='del'>-	fmov	${H4},x14</div><div class='del'>-</div><div class='del'>-	////////////////////////////////// initialize r^n table</div><div class='del'>-	mov	$h0,$r0			// r^1</div><div class='del'>-	add	$s1,$r1,$r1,lsr#2	// s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-	mov	$h1,$r1</div><div class='del'>-	mov	$h2,xzr</div><div class='del'>-	add	$ctx,$ctx,#48+12</div><div class='del'>-	bl	poly1305_splat</div><div class='del'>-</div><div class='del'>-	bl	poly1305_mult		// r^2</div><div class='del'>-	sub	$ctx,$ctx,#4</div><div class='del'>-	bl	poly1305_splat</div><div class='del'>-</div><div class='del'>-	bl	poly1305_mult		// r^3</div><div class='del'>-	sub	$ctx,$ctx,#4</div><div class='del'>-	bl	poly1305_splat</div><div class='del'>-</div><div class='del'>-	bl	poly1305_mult		// r^4</div><div class='del'>-	sub	$ctx,$ctx,#4</div><div class='del'>-	bl	poly1305_splat</div><div class='del'>-	sub	$ctx,$ctx,#48		// restore original $ctx</div><div class='del'>-	b	.Ldo_neon</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Leven_neon:</div><div class='del'>-	fmov	${H0},x10</div><div class='del'>-	fmov	${H1},x11</div><div class='del'>-	fmov	${H2},x12</div><div class='del'>-	fmov	${H3},x13</div><div class='del'>-	fmov	${H4},x14</div><div class='del'>-</div><div class='del'>-.Ldo_neon:</div><div class='del'>-	ldp	x8,x12,[$inp,#32]	// inp[2:3]</div><div class='del'>-	subs	$len,$len,#64</div><div class='del'>-	ldp	x9,x13,[$inp,#48]</div><div class='del'>-	add	$in2,$inp,#96</div><div class='del'>-	adrp	$zeros,.Lzeros</div><div class='del'>-	add	$zeros,$zeros,#:lo12:.Lzeros</div><div class='del'>-</div><div class='del'>-	lsl	$padbit,$padbit,#24</div><div class='del'>-	add	x15,$ctx,#48</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	x8,x8</div><div class='del'>-	rev	x12,x12</div><div class='del'>-	rev	x9,x9</div><div class='del'>-	rev	x13,x13</div><div class='del'>-#endif</div><div class='del'>-	and	x4,x8,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	and	x5,x9,#0x03ffffff</div><div class='del'>-	ubfx	x6,x8,#26,#26</div><div class='del'>-	ubfx	x7,x9,#26,#26</div><div class='del'>-	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32</div><div class='del'>-	extr	x8,x12,x8,#52</div><div class='del'>-	extr	x9,x13,x9,#52</div><div class='del'>-	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32</div><div class='del'>-	fmov	$IN23_0,x4</div><div class='del'>-	and	x8,x8,#0x03ffffff</div><div class='del'>-	and	x9,x9,#0x03ffffff</div><div class='del'>-	ubfx	x10,x12,#14,#26</div><div class='del'>-	ubfx	x11,x13,#14,#26</div><div class='del'>-	add	x12,$padbit,x12,lsr#40</div><div class='del'>-	add	x13,$padbit,x13,lsr#40</div><div class='del'>-	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32</div><div class='del'>-	fmov	$IN23_1,x6</div><div class='del'>-	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32</div><div class='del'>-	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32</div><div class='del'>-	fmov	$IN23_2,x8</div><div class='del'>-	fmov	$IN23_3,x10</div><div class='del'>-	fmov	$IN23_4,x12</div><div class='del'>-</div><div class='del'>-	ldp	x8,x12,[$inp],#16	// inp[0:1]</div><div class='del'>-	ldp	x9,x13,[$inp],#48</div><div class='del'>-</div><div class='del'>-	ld1	{$R0,$R1,$S1,$R2},[x15],#64</div><div class='del'>-	ld1	{$S2,$R3,$S3,$R4},[x15],#64</div><div class='del'>-	ld1	{$S4},[x15]</div><div class='del'>-</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	rev	x8,x8</div><div class='del'>-	rev	x12,x12</div><div class='del'>-	rev	x9,x9</div><div class='del'>-	rev	x13,x13</div><div class='del'>-#endif</div><div class='del'>-	and	x4,x8,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	and	x5,x9,#0x03ffffff</div><div class='del'>-	ubfx	x6,x8,#26,#26</div><div class='del'>-	ubfx	x7,x9,#26,#26</div><div class='del'>-	add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32</div><div class='del'>-	extr	x8,x12,x8,#52</div><div class='del'>-	extr	x9,x13,x9,#52</div><div class='del'>-	add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32</div><div class='del'>-	fmov	$IN01_0,x4</div><div class='del'>-	and	x8,x8,#0x03ffffff</div><div class='del'>-	and	x9,x9,#0x03ffffff</div><div class='del'>-	ubfx	x10,x12,#14,#26</div><div class='del'>-	ubfx	x11,x13,#14,#26</div><div class='del'>-	add	x12,$padbit,x12,lsr#40</div><div class='del'>-	add	x13,$padbit,x13,lsr#40</div><div class='del'>-	add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32</div><div class='del'>-	fmov	$IN01_1,x6</div><div class='del'>-	add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32</div><div class='del'>-	add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32</div><div class='del'>-	movi	$MASK.2d,#-1</div><div class='del'>-	fmov	$IN01_2,x8</div><div class='del'>-	fmov	$IN01_3,x10</div><div class='del'>-	fmov	$IN01_4,x12</div><div class='del'>-	ushr	$MASK.2d,$MASK.2d,#38</div><div class='del'>-</div><div class='del'>-	b.ls	.Lskip_loop</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Loop_neon:</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2</div><div class='del'>-	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^3+inp[7]*r</div><div class='del'>-	//   \___________________/</div><div class='del'>-	// ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2</div><div class='del'>-	// ((inp[1]*r^4+inp[3]*r^2+inp[5])*r^4+inp[7]*r^2+inp[9])*r</div><div class='del'>-	//   \___________________/ \____________________/</div><div class='del'>-	//</div><div class='del'>-	// Note that we start with inp[2:3]*r^2. This is because it</div><div class='del'>-	// doesn't depend on reduction in previous iteration.</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// d4 = h0*r4 + h1*r3   + h2*r2   + h3*r1   + h4*r0</div><div class='del'>-	// d3 = h0*r3 + h1*r2   + h2*r1   + h3*r0   + h4*5*r4</div><div class='del'>-	// d2 = h0*r2 + h1*r1   + h2*r0   + h3*5*r4 + h4*5*r3</div><div class='del'>-	// d1 = h0*r1 + h1*r0   + h2*5*r4 + h3*5*r3 + h4*5*r2</div><div class='del'>-	// d0 = h0*r0 + h1*5*r4 + h2*5*r3 + h3*5*r2 + h4*5*r1</div><div class='del'>-</div><div class='del'>-	subs	$len,$len,#64</div><div class='del'>-	umull	$ACC4,$IN23_0,${R4}[2]</div><div class='del'>-	csel	$in2,$zeros,$in2,lo</div><div class='del'>-	umull	$ACC3,$IN23_0,${R3}[2]</div><div class='del'>-	umull	$ACC2,$IN23_0,${R2}[2]</div><div class='del'>-	 ldp	x8,x12,[$in2],#16	// inp[2:3] (or zero)</div><div class='del'>-	umull	$ACC1,$IN23_0,${R1}[2]</div><div class='del'>-	 ldp	x9,x13,[$in2],#48</div><div class='del'>-	umull	$ACC0,$IN23_0,${R0}[2]</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	 rev	x8,x8</div><div class='del'>-	 rev	x12,x12</div><div class='del'>-	 rev	x9,x9</div><div class='del'>-	 rev	x13,x13</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	umlal	$ACC4,$IN23_1,${R3}[2]</div><div class='del'>-	 and	x4,x8,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	umlal	$ACC3,$IN23_1,${R2}[2]</div><div class='del'>-	 and	x5,x9,#0x03ffffff</div><div class='del'>-	umlal	$ACC2,$IN23_1,${R1}[2]</div><div class='del'>-	 ubfx	x6,x8,#26,#26</div><div class='del'>-	umlal	$ACC1,$IN23_1,${R0}[2]</div><div class='del'>-	 ubfx	x7,x9,#26,#26</div><div class='del'>-	umlal	$ACC0,$IN23_1,${S4}[2]</div><div class='del'>-	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32</div><div class='del'>-</div><div class='del'>-	umlal	$ACC4,$IN23_2,${R2}[2]</div><div class='del'>-	 extr	x8,x12,x8,#52</div><div class='del'>-	umlal	$ACC3,$IN23_2,${R1}[2]</div><div class='del'>-	 extr	x9,x13,x9,#52</div><div class='del'>-	umlal	$ACC2,$IN23_2,${R0}[2]</div><div class='del'>-	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32</div><div class='del'>-	umlal	$ACC1,$IN23_2,${S4}[2]</div><div class='del'>-	 fmov	$IN23_0,x4</div><div class='del'>-	umlal	$ACC0,$IN23_2,${S3}[2]</div><div class='del'>-	 and	x8,x8,#0x03ffffff</div><div class='del'>-</div><div class='del'>-	umlal	$ACC4,$IN23_3,${R1}[2]</div><div class='del'>-	 and	x9,x9,#0x03ffffff</div><div class='del'>-	umlal	$ACC3,$IN23_3,${R0}[2]</div><div class='del'>-	 ubfx	x10,x12,#14,#26</div><div class='del'>-	umlal	$ACC2,$IN23_3,${S4}[2]</div><div class='del'>-	 ubfx	x11,x13,#14,#26</div><div class='del'>-	umlal	$ACC1,$IN23_3,${S3}[2]</div><div class='del'>-	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32</div><div class='del'>-	umlal	$ACC0,$IN23_3,${S2}[2]</div><div class='del'>-	 fmov	$IN23_1,x6</div><div class='del'>-</div><div class='del'>-	add	$IN01_2,$IN01_2,$H2</div><div class='del'>-	 add	x12,$padbit,x12,lsr#40</div><div class='del'>-	umlal	$ACC4,$IN23_4,${R0}[2]</div><div class='del'>-	 add	x13,$padbit,x13,lsr#40</div><div class='del'>-	umlal	$ACC3,$IN23_4,${S4}[2]</div><div class='del'>-	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32</div><div class='del'>-	umlal	$ACC2,$IN23_4,${S3}[2]</div><div class='del'>-	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32</div><div class='del'>-	umlal	$ACC1,$IN23_4,${S2}[2]</div><div class='del'>-	 fmov	$IN23_2,x8</div><div class='del'>-	umlal	$ACC0,$IN23_4,${S1}[2]</div><div class='del'>-	 fmov	$IN23_3,x10</div><div class='del'>-</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// (hash+inp[0:1])*r^4 and accumulate</div><div class='del'>-</div><div class='del'>-	add	$IN01_0,$IN01_0,$H0</div><div class='del'>-	 fmov	$IN23_4,x12</div><div class='del'>-	umlal	$ACC3,$IN01_2,${R1}[0]</div><div class='del'>-	 ldp	x8,x12,[$inp],#16	// inp[0:1]</div><div class='del'>-	umlal	$ACC0,$IN01_2,${S3}[0]</div><div class='del'>-	 ldp	x9,x13,[$inp],#48</div><div class='del'>-	umlal	$ACC4,$IN01_2,${R2}[0]</div><div class='del'>-	umlal	$ACC1,$IN01_2,${S4}[0]</div><div class='del'>-	umlal	$ACC2,$IN01_2,${R0}[0]</div><div class='del'>-#ifdef	__AARCH64EB__</div><div class='del'>-	 rev	x8,x8</div><div class='del'>-	 rev	x12,x12</div><div class='del'>-	 rev	x9,x9</div><div class='del'>-	 rev	x13,x13</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	add	$IN01_1,$IN01_1,$H1</div><div class='del'>-	umlal	$ACC3,$IN01_0,${R3}[0]</div><div class='del'>-	umlal	$ACC4,$IN01_0,${R4}[0]</div><div class='del'>-	 and	x4,x8,#0x03ffffff	// base 2^64 -&gt; base 2^26</div><div class='del'>-	umlal	$ACC2,$IN01_0,${R2}[0]</div><div class='del'>-	 and	x5,x9,#0x03ffffff</div><div class='del'>-	umlal	$ACC0,$IN01_0,${R0}[0]</div><div class='del'>-	 ubfx	x6,x8,#26,#26</div><div class='del'>-	umlal	$ACC1,$IN01_0,${R1}[0]</div><div class='del'>-	 ubfx	x7,x9,#26,#26</div><div class='del'>-</div><div class='del'>-	add	$IN01_3,$IN01_3,$H3</div><div class='del'>-	 add	x4,x4,x5,lsl#32		// bfi	x4,x5,#32,#32</div><div class='del'>-	umlal	$ACC3,$IN01_1,${R2}[0]</div><div class='del'>-	 extr	x8,x12,x8,#52</div><div class='del'>-	umlal	$ACC4,$IN01_1,${R3}[0]</div><div class='del'>-	 extr	x9,x13,x9,#52</div><div class='del'>-	umlal	$ACC0,$IN01_1,${S4}[0]</div><div class='del'>-	 add	x6,x6,x7,lsl#32		// bfi	x6,x7,#32,#32</div><div class='del'>-	umlal	$ACC2,$IN01_1,${R1}[0]</div><div class='del'>-	 fmov	$IN01_0,x4</div><div class='del'>-	umlal	$ACC1,$IN01_1,${R0}[0]</div><div class='del'>-	 and	x8,x8,#0x03ffffff</div><div class='del'>-</div><div class='del'>-	add	$IN01_4,$IN01_4,$H4</div><div class='del'>-	 and	x9,x9,#0x03ffffff</div><div class='del'>-	umlal	$ACC3,$IN01_3,${R0}[0]</div><div class='del'>-	 ubfx	x10,x12,#14,#26</div><div class='del'>-	umlal	$ACC0,$IN01_3,${S2}[0]</div><div class='del'>-	 ubfx	x11,x13,#14,#26</div><div class='del'>-	umlal	$ACC4,$IN01_3,${R1}[0]</div><div class='del'>-	 add	x8,x8,x9,lsl#32		// bfi	x8,x9,#32,#32</div><div class='del'>-	umlal	$ACC1,$IN01_3,${S3}[0]</div><div class='del'>-	 fmov	$IN01_1,x6</div><div class='del'>-	umlal	$ACC2,$IN01_3,${S4}[0]</div><div class='del'>-	 add	x12,$padbit,x12,lsr#40</div><div class='del'>-</div><div class='del'>-	umlal	$ACC3,$IN01_4,${S4}[0]</div><div class='del'>-	 add	x13,$padbit,x13,lsr#40</div><div class='del'>-	umlal	$ACC0,$IN01_4,${S1}[0]</div><div class='del'>-	 add	x10,x10,x11,lsl#32	// bfi	x10,x11,#32,#32</div><div class='del'>-	umlal	$ACC4,$IN01_4,${R0}[0]</div><div class='del'>-	 add	x12,x12,x13,lsl#32	// bfi	x12,x13,#32,#32</div><div class='del'>-	umlal	$ACC1,$IN01_4,${S2}[0]</div><div class='del'>-	 fmov	$IN01_2,x8</div><div class='del'>-	umlal	$ACC2,$IN01_4,${S3}[0]</div><div class='del'>-	 fmov	$IN01_3,x10</div><div class='del'>-	 fmov	$IN01_4,x12</div><div class='del'>-</div><div class='del'>-	/////////////////////////////////////////////////////////////////</div><div class='del'>-	// lazy reduction as discussed in "NEON crypto" by D.J. Bernstein</div><div class='del'>-	// and P. Schwabe</div><div class='del'>-	//</div><div class='del'>-	// [see discussion in poly1305-armv4 module]</div><div class='del'>-</div><div class='del'>-	ushr	$T0.2d,$ACC3,#26</div><div class='del'>-	xtn	$H3,$ACC3</div><div class='del'>-	 ushr	$T1.2d,$ACC0,#26</div><div class='del'>-	 and	$ACC0,$ACC0,$MASK.2d</div><div class='del'>-	add	$ACC4,$ACC4,$T0.2d	// h3 -&gt; h4</div><div class='del'>-	bic	$H3,#0xfc,lsl#24	// &amp;=0x03ffffff</div><div class='del'>-	 add	$ACC1,$ACC1,$T1.2d	// h0 -&gt; h1</div><div class='del'>-</div><div class='del'>-	ushr	$T0.2d,$ACC4,#26</div><div class='del'>-	xtn	$H4,$ACC4</div><div class='del'>-	 ushr	$T1.2d,$ACC1,#26</div><div class='del'>-	 xtn	$H1,$ACC1</div><div class='del'>-	bic	$H4,#0xfc,lsl#24</div><div class='del'>-	 add	$ACC2,$ACC2,$T1.2d	// h1 -&gt; h2</div><div class='del'>-</div><div class='del'>-	add	$ACC0,$ACC0,$T0.2d</div><div class='del'>-	shl	$T0.2d,$T0.2d,#2</div><div class='del'>-	 shrn	$T1.2s,$ACC2,#26</div><div class='del'>-	 xtn	$H2,$ACC2</div><div class='del'>-	add	$ACC0,$ACC0,$T0.2d	// h4 -&gt; h0</div><div class='del'>-	 bic	$H1,#0xfc,lsl#24</div><div class='del'>-	 add	$H3,$H3,$T1.2s		// h2 -&gt; h3</div><div class='del'>-	 bic	$H2,#0xfc,lsl#24</div><div class='del'>-</div><div class='del'>-	shrn	$T0.2s,$ACC0,#26</div><div class='del'>-	xtn	$H0,$ACC0</div><div class='del'>-	 ushr	$T1.2s,$H3,#26</div><div class='del'>-	 bic	$H3,#0xfc,lsl#24</div><div class='del'>-	 bic	$H0,#0xfc,lsl#24</div><div class='del'>-	add	$H1,$H1,$T0.2s		// h0 -&gt; h1</div><div class='del'>-	 add	$H4,$H4,$T1.2s		// h3 -&gt; h4</div><div class='del'>-</div><div class='del'>-	b.hi	.Loop_neon</div><div class='del'>-</div><div class='del'>-.Lskip_loop:</div><div class='del'>-	dup	$IN23_2,${IN23_2}[0]</div><div class='del'>-	add	$IN01_2,$IN01_2,$H2</div><div class='del'>-</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1</div><div class='del'>-</div><div class='del'>-	adds	$len,$len,#32</div><div class='del'>-	b.ne	.Long_tail</div><div class='del'>-</div><div class='del'>-	dup	$IN23_2,${IN01_2}[0]</div><div class='del'>-	add	$IN23_0,$IN01_0,$H0</div><div class='del'>-	add	$IN23_3,$IN01_3,$H3</div><div class='del'>-	add	$IN23_1,$IN01_1,$H1</div><div class='del'>-	add	$IN23_4,$IN01_4,$H4</div><div class='del'>-</div><div class='del'>-.Long_tail:</div><div class='del'>-	dup	$IN23_0,${IN23_0}[0]</div><div class='del'>-	umull2	$ACC0,$IN23_2,${S3}</div><div class='del'>-	umull2	$ACC3,$IN23_2,${R1}</div><div class='del'>-	umull2	$ACC4,$IN23_2,${R2}</div><div class='del'>-	umull2	$ACC2,$IN23_2,${R0}</div><div class='del'>-	umull2	$ACC1,$IN23_2,${S4}</div><div class='del'>-</div><div class='del'>-	dup	$IN23_1,${IN23_1}[0]</div><div class='del'>-	umlal2	$ACC0,$IN23_0,${R0}</div><div class='del'>-	umlal2	$ACC2,$IN23_0,${R2}</div><div class='del'>-	umlal2	$ACC3,$IN23_0,${R3}</div><div class='del'>-	umlal2	$ACC4,$IN23_0,${R4}</div><div class='del'>-	umlal2	$ACC1,$IN23_0,${R1}</div><div class='del'>-</div><div class='del'>-	dup	$IN23_3,${IN23_3}[0]</div><div class='del'>-	umlal2	$ACC0,$IN23_1,${S4}</div><div class='del'>-	umlal2	$ACC3,$IN23_1,${R2}</div><div class='del'>-	umlal2	$ACC2,$IN23_1,${R1}</div><div class='del'>-	umlal2	$ACC4,$IN23_1,${R3}</div><div class='del'>-	umlal2	$ACC1,$IN23_1,${R0}</div><div class='del'>-</div><div class='del'>-	dup	$IN23_4,${IN23_4}[0]</div><div class='del'>-	umlal2	$ACC3,$IN23_3,${R0}</div><div class='del'>-	umlal2	$ACC4,$IN23_3,${R1}</div><div class='del'>-	umlal2	$ACC0,$IN23_3,${S2}</div><div class='del'>-	umlal2	$ACC1,$IN23_3,${S3}</div><div class='del'>-	umlal2	$ACC2,$IN23_3,${S4}</div><div class='del'>-</div><div class='del'>-	umlal2	$ACC3,$IN23_4,${S4}</div><div class='del'>-	umlal2	$ACC0,$IN23_4,${S1}</div><div class='del'>-	umlal2	$ACC4,$IN23_4,${R0}</div><div class='del'>-	umlal2	$ACC1,$IN23_4,${S2}</div><div class='del'>-	umlal2	$ACC2,$IN23_4,${S3}</div><div class='del'>-</div><div class='del'>-	b.eq	.Lshort_tail</div><div class='del'>-</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// (hash+inp[0:1])*r^4:r^3 and accumulate</div><div class='del'>-</div><div class='del'>-	add	$IN01_0,$IN01_0,$H0</div><div class='del'>-	umlal	$ACC3,$IN01_2,${R1}</div><div class='del'>-	umlal	$ACC0,$IN01_2,${S3}</div><div class='del'>-	umlal	$ACC4,$IN01_2,${R2}</div><div class='del'>-	umlal	$ACC1,$IN01_2,${S4}</div><div class='del'>-	umlal	$ACC2,$IN01_2,${R0}</div><div class='del'>-</div><div class='del'>-	add	$IN01_1,$IN01_1,$H1</div><div class='del'>-	umlal	$ACC3,$IN01_0,${R3}</div><div class='del'>-	umlal	$ACC0,$IN01_0,${R0}</div><div class='del'>-	umlal	$ACC4,$IN01_0,${R4}</div><div class='del'>-	umlal	$ACC1,$IN01_0,${R1}</div><div class='del'>-	umlal	$ACC2,$IN01_0,${R2}</div><div class='del'>-</div><div class='del'>-	add	$IN01_3,$IN01_3,$H3</div><div class='del'>-	umlal	$ACC3,$IN01_1,${R2}</div><div class='del'>-	umlal	$ACC0,$IN01_1,${S4}</div><div class='del'>-	umlal	$ACC4,$IN01_1,${R3}</div><div class='del'>-	umlal	$ACC1,$IN01_1,${R0}</div><div class='del'>-	umlal	$ACC2,$IN01_1,${R1}</div><div class='del'>-</div><div class='del'>-	add	$IN01_4,$IN01_4,$H4</div><div class='del'>-	umlal	$ACC3,$IN01_3,${R0}</div><div class='del'>-	umlal	$ACC0,$IN01_3,${S2}</div><div class='del'>-	umlal	$ACC4,$IN01_3,${R1}</div><div class='del'>-	umlal	$ACC1,$IN01_3,${S3}</div><div class='del'>-	umlal	$ACC2,$IN01_3,${S4}</div><div class='del'>-</div><div class='del'>-	umlal	$ACC3,$IN01_4,${S4}</div><div class='del'>-	umlal	$ACC0,$IN01_4,${S1}</div><div class='del'>-	umlal	$ACC4,$IN01_4,${R0}</div><div class='del'>-	umlal	$ACC1,$IN01_4,${S2}</div><div class='del'>-	umlal	$ACC2,$IN01_4,${S3}</div><div class='del'>-</div><div class='del'>-.Lshort_tail:</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// horizontal add</div><div class='del'>-</div><div class='del'>-	addp	$ACC3,$ACC3,$ACC3</div><div class='del'>-	 ldp	d8,d9,[sp,#16]		// meet ABI requirements</div><div class='del'>-	addp	$ACC0,$ACC0,$ACC0</div><div class='del'>-	 ldp	d10,d11,[sp,#32]</div><div class='del'>-	addp	$ACC4,$ACC4,$ACC4</div><div class='del'>-	 ldp	d12,d13,[sp,#48]</div><div class='del'>-	addp	$ACC1,$ACC1,$ACC1</div><div class='del'>-	 ldp	d14,d15,[sp,#64]</div><div class='del'>-	addp	$ACC2,$ACC2,$ACC2</div><div class='del'>-	 ldr	x30,[sp,#8]</div><div class='del'>-</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// lazy reduction, but without narrowing</div><div class='del'>-</div><div class='del'>-	ushr	$T0.2d,$ACC3,#26</div><div class='del'>-	and	$ACC3,$ACC3,$MASK.2d</div><div class='del'>-	 ushr	$T1.2d,$ACC0,#26</div><div class='del'>-	 and	$ACC0,$ACC0,$MASK.2d</div><div class='del'>-</div><div class='del'>-	add	$ACC4,$ACC4,$T0.2d	// h3 -&gt; h4</div><div class='del'>-	 add	$ACC1,$ACC1,$T1.2d	// h0 -&gt; h1</div><div class='del'>-</div><div class='del'>-	ushr	$T0.2d,$ACC4,#26</div><div class='del'>-	and	$ACC4,$ACC4,$MASK.2d</div><div class='del'>-	 ushr	$T1.2d,$ACC1,#26</div><div class='del'>-	 and	$ACC1,$ACC1,$MASK.2d</div><div class='del'>-	 add	$ACC2,$ACC2,$T1.2d	// h1 -&gt; h2</div><div class='del'>-</div><div class='del'>-	add	$ACC0,$ACC0,$T0.2d</div><div class='del'>-	shl	$T0.2d,$T0.2d,#2</div><div class='del'>-	 ushr	$T1.2d,$ACC2,#26</div><div class='del'>-	 and	$ACC2,$ACC2,$MASK.2d</div><div class='del'>-	add	$ACC0,$ACC0,$T0.2d	// h4 -&gt; h0</div><div class='del'>-	 add	$ACC3,$ACC3,$T1.2d	// h2 -&gt; h3</div><div class='del'>-</div><div class='del'>-	ushr	$T0.2d,$ACC0,#26</div><div class='del'>-	and	$ACC0,$ACC0,$MASK.2d</div><div class='del'>-	 ushr	$T1.2d,$ACC3,#26</div><div class='del'>-	 and	$ACC3,$ACC3,$MASK.2d</div><div class='del'>-	add	$ACC1,$ACC1,$T0.2d	// h0 -&gt; h1</div><div class='del'>-	 add	$ACC4,$ACC4,$T1.2d	// h3 -&gt; h4</div><div class='del'>-</div><div class='del'>-	////////////////////////////////////////////////////////////////</div><div class='del'>-	// write the result, can be partially reduced</div><div class='del'>-</div><div class='del'>-	st4	{$ACC0,$ACC1,$ACC2,$ACC3}[0],[$ctx],#16</div><div class='del'>-	mov	x4,#1</div><div class='del'>-	st1	{$ACC4}[0],[$ctx]</div><div class='del'>-	str	x4,[$ctx,#8]		// set is_base2_26</div><div class='del'>-</div><div class='del'>-	ldr	x29,[sp],#80</div><div class='del'>-	 .inst	0xd50323bf		// autiasp</div><div class='del'>-	ret</div><div class='del'>-.size	poly1305_blocks_neon,.-poly1305_blocks_neon</div><div class='del'>-</div><div class='del'>-.pushsection .rodata</div><div class='del'>-.align	5</div><div class='del'>-.Lzeros:</div><div class='del'>-.long	0,0,0,0,0,0,0,0</div><div class='del'>-.asciz	"Poly1305 for ARMv8, CRYPTOGAMS by \@dot-asm"</div><div class='del'>-.popsection</div><div class='del'>-</div><div class='del'>-.align	2</div><div class='del'>-#if !defined(__KERNEL__) &amp;&amp; !defined(_WIN64)</div><div class='del'>-.comm	OPENSSL_armcap_P,4,4</div><div class='del'>-.hidden	OPENSSL_armcap_P</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-foreach (split("\n",$code)) {</div><div class='del'>-	s/\b(shrn\s+v[0-9]+)\.[24]d/$1.2s/			or</div><div class='del'>-	s/\b(fmov\s+)v([0-9]+)[^,]*,\s*x([0-9]+)/$1d$2,x$3/	or</div><div class='del'>-	(m/\bdup\b/ and (s/\.[24]s/.2d/g or 1))			or</div><div class='del'>-	(m/\b(eor|and)/ and (s/\.[248][sdh]/.16b/g or 1))	or</div><div class='del'>-	(m/\bum(ul|la)l\b/ and (s/\.4s/.2s/g or 1))		or</div><div class='del'>-	(m/\bum(ul|la)l2\b/ and (s/\.2s/.4s/g or 1))		or</div><div class='del'>-	(m/\bst[1-4]\s+{[^}]+}\[/ and (s/\.[24]d/.s/g or 1));</div><div class='del'>-</div><div class='del'>-	s/\.[124]([sd])\[/.$1\[/;</div><div class='del'>-	s/w#x([0-9]+)/w$1/g;</div><div class='del'>-</div><div class='del'>-	print $_,"\n";</div><div class='del'>-}</div><div class='del'>-close STDOUT;</div><div class='head'>diff --git a/arch/arm64/crypto/poly1305-glue.c b/arch/arm64/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index 18883ea438f3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/poly1305-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,232 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for arm64</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_init_arm64(void *state, const u8 *key);</div><div class='del'>-asmlinkage void poly1305_blocks(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_emit(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_arm64(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void neon_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_arm64(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; likely(do_neon))</div><div class='del'>-		poly1305_blocks_neon(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-	else</div><div class='del'>-		poly1305_blocks(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void neon_poly1305_do_update(struct poly1305_desc_ctx *dctx,</div><div class='del'>-				    const u8 *src, u32 len, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			neon_poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='del'>-					     POLY1305_BLOCK_SIZE, 1, false);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		neon_poly1305_blocks(dctx, src, len, 1, do_neon);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_update(struct shash_desc *desc,</div><div class='del'>-				const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	bool do_neon = crypto_simd_usable() &amp;&amp; srclen &gt; 128;</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-	neon_poly1305_do_update(dctx, src, srclen, do_neon);</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		if (static_branch_likely(&amp;have_neon) &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-			do {</div><div class='del'>-				unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='del'>-</div><div class='del'>-				kernel_neon_begin();</div><div class='del'>-				poly1305_blocks_neon(&amp;dctx-&gt;h, src, todo, 1);</div><div class='del'>-				kernel_neon_end();</div><div class='del'>-</div><div class='del'>-				len -= todo;</div><div class='del'>-				src += todo;</div><div class='del'>-			} while (len);</div><div class='del'>-		} else {</div><div class='del'>-			poly1305_blocks(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-			src += len;</div><div class='del'>-		}</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	memzero_explicit(dctx, sizeof(*dctx));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg neon_poly1305_alg = {</div><div class='del'>-	.init			= neon_poly1305_init,</div><div class='del'>-	.update			= neon_poly1305_update,</div><div class='del'>-	.final			= neon_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-neon",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init neon_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_have_named_feature(ASIMD))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_neon);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shash(&amp;neon_poly1305_alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit neon_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_HASH) &amp;&amp; cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_shash(&amp;neon_poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(neon_poly1305_mod_init);</div><div class='del'>-module_exit(neon_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 transform using NEON instructions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-neon");</div><div class='head'>diff --git a/arch/arm64/crypto/polyval-ce-glue.c b/arch/arm64/crypto/polyval-ce-glue.c<br/>index 0a3b5718df85..c4e653688ea0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/polyval-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/polyval-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/polyval-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/polyval-ce-glue.c</a></div><div class='hunk'>@@ -15,17 +15,15 @@</div><div class='ctx'>  * ARMv8 Crypto Extensions instructions to implement the finite field operations.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/polyval.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define NUM_KEY_POWERS	8</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +36,6 @@ struct polyval_tfm_ctx {</div><div class='ctx'> </div><div class='ctx'> struct polyval_desc_ctx {</div><div class='ctx'> 	u8 buffer[POLYVAL_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> asmlinkage void pmull_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='hunk'>@@ -48,25 +45,16 @@ asmlinkage void pmull_polyval_mul(u8 *op1, const u8 *op2);</div><div class='ctx'> static void internal_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='ctx'> 	const u8 *in, size_t nblocks, u8 *accumulator)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		pmull_polyval_update(keys, in, nblocks, accumulator);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_update_non4k(keys-&gt;key_powers[NUM_KEY_POWERS-1], in,</div><div class='del'>-			nblocks, accumulator);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	pmull_polyval_update(keys, in, nblocks, accumulator);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void internal_polyval_mul(u8 *op1, const u8 *op2)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		pmull_polyval_mul(op1, op2);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_mul_non4k(op1, op2);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	pmull_polyval_mul(op1, op2);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int polyval_arm64_setkey(struct crypto_shash *tfm,</div><div class='hunk'>@@ -103,49 +91,27 @@ static int polyval_arm64_update(struct shash_desc *desc,</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	u8 *pos;</div><div class='ctx'> 	unsigned int nblocks;</div><div class='del'>-	unsigned int n;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		pos = dctx-&gt;buffer + POLYVAL_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='ctx'> </div><div class='del'>-		while (n--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-</div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			internal_polyval_mul(dctx-&gt;buffer,</div><div class='del'>-					    tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (srclen &gt;= POLYVAL_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		/* allow rescheduling every 4K bytes */</div><div class='ctx'> 		nblocks = min(srclen, 4096U) / POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		internal_polyval_update(tctx, src, nblocks, dctx-&gt;buffer);</div><div class='ctx'> 		srclen -= nblocks * POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		src += nblocks * POLYVAL_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (srclen &gt;= POLYVAL_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = POLYVAL_BLOCK_SIZE - srclen;</div><div class='del'>-		pos = dctx-&gt;buffer;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return srclen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int polyval_arm64_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int polyval_arm64_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dctx-&gt;buffer, src, len);</div><div class='ctx'> 		internal_polyval_mul(dctx-&gt;buffer,</div><div class='ctx'> 				     tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -159,13 +125,14 @@ static struct shash_alg polyval_alg = {</div><div class='ctx'> 	.digestsize	= POLYVAL_DIGEST_SIZE,</div><div class='ctx'> 	.init		= polyval_arm64_init,</div><div class='ctx'> 	.update		= polyval_arm64_update,</div><div class='del'>-	.final		= polyval_arm64_final,</div><div class='add'>+	.finup		= polyval_arm64_finup,</div><div class='ctx'> 	.setkey		= polyval_arm64_setkey,</div><div class='ctx'> 	.descsize	= sizeof(struct polyval_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "polyval",</div><div class='ctx'> 		.cra_driver_name	= "polyval-ce",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= POLYVAL_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct polyval_tfm_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='head'>diff --git a/arch/arm64/crypto/sha1-ce-core.S b/arch/arm64/crypto/sha1-ce-core.S<br/>deleted file mode 100644<br/>index 9b1f2d82a6fe..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha1-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha1-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,150 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a+crypto</div><div class='del'>-</div><div class='del'>-	k0		.req	v0</div><div class='del'>-	k1		.req	v1</div><div class='del'>-	k2		.req	v2</div><div class='del'>-	k3		.req	v3</div><div class='del'>-</div><div class='del'>-	t0		.req	v4</div><div class='del'>-	t1		.req	v5</div><div class='del'>-</div><div class='del'>-	dga		.req	q6</div><div class='del'>-	dgav		.req	v6</div><div class='del'>-	dgb		.req	s7</div><div class='del'>-	dgbv		.req	v7</div><div class='del'>-</div><div class='del'>-	dg0q		.req	q12</div><div class='del'>-	dg0s		.req	s12</div><div class='del'>-	dg0v		.req	v12</div><div class='del'>-	dg1s		.req	s13</div><div class='del'>-	dg1v		.req	v13</div><div class='del'>-	dg2s		.req	s14</div><div class='del'>-</div><div class='del'>-	.macro		add_only, op, ev, rc, s0, dg1</div><div class='del'>-	.ifc		\ev, ev</div><div class='del'>-	add		t1.4s, v\s0\().4s, \rc\().4s</div><div class='del'>-	sha1h		dg2s, dg0s</div><div class='del'>-	.ifnb		\dg1</div><div class='del'>-	sha1\op		dg0q, \dg1, t0.4s</div><div class='del'>-	.else</div><div class='del'>-	sha1\op		dg0q, dg1s, t0.4s</div><div class='del'>-	.endif</div><div class='del'>-	.else</div><div class='del'>-	.ifnb		\s0</div><div class='del'>-	add		t0.4s, v\s0\().4s, \rc\().4s</div><div class='del'>-	.endif</div><div class='del'>-	sha1h		dg1s, dg0s</div><div class='del'>-	sha1\op		dg0q, dg2s, t1.4s</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		add_update, op, ev, rc, s0, s1, s2, s3, dg1</div><div class='del'>-	sha1su0		v\s0\().4s, v\s1\().4s, v\s2\().4s</div><div class='del'>-	add_only	\op, \ev, \rc, \s1, \dg1</div><div class='del'>-	sha1su1		v\s0\().4s, v\s3\().4s</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		loadrc, k, val, tmp</div><div class='del'>-	movz		\tmp, :abs_g0_nc:\val</div><div class='del'>-	movk		\tmp, :abs_g1:\val</div><div class='del'>-	dup		\k, \tmp</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * int __sha1_ce_transform(struct sha1_ce_state *sst, u8 const *src,</div><div class='del'>-	 *			   int blocks)</div><div class='del'>-	 */</div><div class='del'>-SYM_FUNC_START(__sha1_ce_transform)</div><div class='del'>-	/* load round constants */</div><div class='del'>-	loadrc		k0.4s, 0x5a827999, w6</div><div class='del'>-	loadrc		k1.4s, 0x6ed9eba1, w6</div><div class='del'>-	loadrc		k2.4s, 0x8f1bbcdc, w6</div><div class='del'>-	loadrc		k3.4s, 0xca62c1d6, w6</div><div class='del'>-</div><div class='del'>-	/* load state */</div><div class='del'>-	ld1		{dgav.4s}, [x0]</div><div class='del'>-	ldr		dgb, [x0, #16]</div><div class='del'>-</div><div class='del'>-	/* load sha1_ce_state::finalize */</div><div class='del'>-	ldr_l		w4, sha1_ce_offsetof_finalize, x4</div><div class='del'>-	ldr		w4, [x0, x4]</div><div class='del'>-</div><div class='del'>-	/* load input */</div><div class='del'>-0:	ld1		{v8.4s-v11.4s}, [x1], #64</div><div class='del'>-	sub		w2, w2, #1</div><div class='del'>-</div><div class='del'>-CPU_LE(	rev32		v8.16b, v8.16b		)</div><div class='del'>-CPU_LE(	rev32		v9.16b, v9.16b		)</div><div class='del'>-CPU_LE(	rev32		v10.16b, v10.16b	)</div><div class='del'>-CPU_LE(	rev32		v11.16b, v11.16b	)</div><div class='del'>-</div><div class='del'>-1:	add		t0.4s, v8.4s, k0.4s</div><div class='del'>-	mov		dg0v.16b, dgav.16b</div><div class='del'>-</div><div class='del'>-	add_update	c, ev, k0,  8,  9, 10, 11, dgb</div><div class='del'>-	add_update	c, od, k0,  9, 10, 11,  8</div><div class='del'>-	add_update	c, ev, k0, 10, 11,  8,  9</div><div class='del'>-	add_update	c, od, k0, 11,  8,  9, 10</div><div class='del'>-	add_update	c, ev, k1,  8,  9, 10, 11</div><div class='del'>-</div><div class='del'>-	add_update	p, od, k1,  9, 10, 11,  8</div><div class='del'>-	add_update	p, ev, k1, 10, 11,  8,  9</div><div class='del'>-	add_update	p, od, k1, 11,  8,  9, 10</div><div class='del'>-	add_update	p, ev, k1,  8,  9, 10, 11</div><div class='del'>-	add_update	p, od, k2,  9, 10, 11,  8</div><div class='del'>-</div><div class='del'>-	add_update	m, ev, k2, 10, 11,  8,  9</div><div class='del'>-	add_update	m, od, k2, 11,  8,  9, 10</div><div class='del'>-	add_update	m, ev, k2,  8,  9, 10, 11</div><div class='del'>-	add_update	m, od, k2,  9, 10, 11,  8</div><div class='del'>-	add_update	m, ev, k3, 10, 11,  8,  9</div><div class='del'>-</div><div class='del'>-	add_update	p, od, k3, 11,  8,  9, 10</div><div class='del'>-	add_only	p, ev, k3,  9</div><div class='del'>-	add_only	p, od, k3, 10</div><div class='del'>-	add_only	p, ev, k3, 11</div><div class='del'>-	add_only	p, od</div><div class='del'>-</div><div class='del'>-	/* update state */</div><div class='del'>-	add		dgbv.2s, dgbv.2s, dg1v.2s</div><div class='del'>-	add		dgav.4s, dgav.4s, dg0v.4s</div><div class='del'>-</div><div class='del'>-	cbz		w2, 2f</div><div class='del'>-	cond_yield	3f, x5, x6</div><div class='del'>-	b		0b</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Final block: add padding and total bit count.</div><div class='del'>-	 * Skip if the input size was not a round multiple of the block size,</div><div class='del'>-	 * the padding is handled by the C code in that case.</div><div class='del'>-	 */</div><div class='del'>-2:	cbz		x4, 3f</div><div class='del'>-	ldr_l		w4, sha1_ce_offsetof_count, x4</div><div class='del'>-	ldr		x4, [x0, x4]</div><div class='del'>-	movi		v9.2d, #0</div><div class='del'>-	mov		x8, #0x80000000</div><div class='del'>-	movi		v10.2d, #0</div><div class='del'>-	ror		x7, x4, #29		// ror(lsl(x4, 3), 32)</div><div class='del'>-	fmov		d8, x8</div><div class='del'>-	mov		x4, #0</div><div class='del'>-	mov		v11.d[0], xzr</div><div class='del'>-	mov		v11.d[1], x7</div><div class='del'>-	b		1b</div><div class='del'>-</div><div class='del'>-	/* store new state */</div><div class='del'>-3:	st1		{dgav.4s}, [x0]</div><div class='del'>-	str		dgb, [x0, #16]</div><div class='del'>-	mov		w0, w2</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(__sha1_ce_transform)</div><div class='head'>diff --git a/arch/arm64/crypto/sha1-ce-glue.c b/arch/arm64/crypto/sha1-ce-glue.c<br/>deleted file mode 100644<br/>index cbd14f208f83..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha1-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha1-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,148 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha1-ce-glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA1 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1");</div><div class='del'>-</div><div class='del'>-struct sha1_ce_state {</div><div class='del'>-	struct sha1_state	sst;</div><div class='del'>-	u32			finalize;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern const u32 sha1_ce_offsetof_count;</div><div class='del'>-extern const u32 sha1_ce_offsetof_finalize;</div><div class='del'>-</div><div class='del'>-asmlinkage int __sha1_ce_transform(struct sha1_ce_state *sst, u8 const *src,</div><div class='del'>-				   int blocks);</div><div class='del'>-</div><div class='del'>-static void sha1_ce_transform(struct sha1_state *sst, u8 const *src,</div><div class='del'>-			      int blocks)</div><div class='del'>-{</div><div class='del'>-	while (blocks) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		rem = __sha1_ce_transform(container_of(sst,</div><div class='del'>-						       struct sha1_ce_state,</div><div class='del'>-						       sst), src, blocks);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		src += (blocks - rem) * SHA1_BLOCK_SIZE;</div><div class='del'>-		blocks = rem;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const u32 sha1_ce_offsetof_count = offsetof(struct sha1_ce_state, sst.count);</div><div class='del'>-const u32 sha1_ce_offsetof_finalize = offsetof(struct sha1_ce_state, finalize);</div><div class='del'>-</div><div class='del'>-static int sha1_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	bool finalize = !sctx-&gt;sst.count &amp;&amp; !(len % SHA1_BLOCK_SIZE) &amp;&amp; len;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allow the asm code to perform the finalization if there is no</div><div class='del'>-	 * partial data and the input is a round multiple of the block size.</div><div class='del'>-	 */</div><div class='del'>-	sctx-&gt;finalize = finalize;</div><div class='del'>-</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-	if (!finalize)</div><div class='del'>-		sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_finup(desc, NULL, 0, out);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, &amp;sctx-&gt;sst, sizeof(struct sha1_state));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;sctx-&gt;sst, in, sizeof(struct sha1_state));</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.init			= sha1_base_init,</div><div class='del'>-	.update			= sha1_ce_update,</div><div class='del'>-	.final			= sha1_ce_final,</div><div class='del'>-	.finup			= sha1_ce_finup,</div><div class='del'>-	.import			= sha1_ce_import,</div><div class='del'>-	.export			= sha1_ce_export,</div><div class='del'>-	.descsize		= sizeof(struct sha1_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha1_state),</div><div class='del'>-	.digestsize		= SHA1_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha1",</div><div class='del'>-		.cra_driver_name	= "sha1-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sha1_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha1_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA1, sha1_ce_mod_init);</div><div class='del'>-module_exit(sha1_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha2-ce-core.S b/arch/arm64/crypto/sha2-ce-core.S<br/>deleted file mode 100644<br/>index fce84d88ddb2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha2-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha2-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,157 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.arch		armv8-a+crypto</div><div class='del'>-</div><div class='del'>-	dga		.req	q20</div><div class='del'>-	dgav		.req	v20</div><div class='del'>-	dgb		.req	q21</div><div class='del'>-	dgbv		.req	v21</div><div class='del'>-</div><div class='del'>-	t0		.req	v22</div><div class='del'>-	t1		.req	v23</div><div class='del'>-</div><div class='del'>-	dg0q		.req	q24</div><div class='del'>-	dg0v		.req	v24</div><div class='del'>-	dg1q		.req	q25</div><div class='del'>-	dg1v		.req	v25</div><div class='del'>-	dg2q		.req	q26</div><div class='del'>-	dg2v		.req	v26</div><div class='del'>-</div><div class='del'>-	.macro		add_only, ev, rc, s0</div><div class='del'>-	mov		dg2v.16b, dg0v.16b</div><div class='del'>-	.ifeq		\ev</div><div class='del'>-	add		t1.4s, v\s0\().4s, \rc\().4s</div><div class='del'>-	sha256h		dg0q, dg1q, t0.4s</div><div class='del'>-	sha256h2	dg1q, dg2q, t0.4s</div><div class='del'>-	.else</div><div class='del'>-	.ifnb		\s0</div><div class='del'>-	add		t0.4s, v\s0\().4s, \rc\().4s</div><div class='del'>-	.endif</div><div class='del'>-	sha256h		dg0q, dg1q, t1.4s</div><div class='del'>-	sha256h2	dg1q, dg2q, t1.4s</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		add_update, ev, rc, s0, s1, s2, s3</div><div class='del'>-	sha256su0	v\s0\().4s, v\s1\().4s</div><div class='del'>-	add_only	\ev, \rc, \s1</div><div class='del'>-	sha256su1	v\s0\().4s, v\s2\().4s, v\s3\().4s</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The SHA-256 round constants</div><div class='del'>-	 */</div><div class='del'>-	.section	".rodata", "a"</div><div class='del'>-	.align		4</div><div class='del'>-.Lsha2_rcon:</div><div class='del'>-	.word		0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5</div><div class='del'>-	.word		0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5</div><div class='del'>-	.word		0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3</div><div class='del'>-	.word		0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174</div><div class='del'>-	.word		0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc</div><div class='del'>-	.word		0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da</div><div class='del'>-	.word		0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7</div><div class='del'>-	.word		0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967</div><div class='del'>-	.word		0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13</div><div class='del'>-	.word		0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85</div><div class='del'>-	.word		0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3</div><div class='del'>-	.word		0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070</div><div class='del'>-	.word		0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5</div><div class='del'>-	.word		0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3</div><div class='del'>-	.word		0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208</div><div class='del'>-	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * int __sha256_ce_transform(struct sha256_ce_state *sst, u8 const *src,</div><div class='del'>-	 *			     int blocks)</div><div class='del'>-	 */</div><div class='del'>-	.text</div><div class='del'>-SYM_FUNC_START(__sha256_ce_transform)</div><div class='del'>-	/* load round constants */</div><div class='del'>-	adr_l		x8, .Lsha2_rcon</div><div class='del'>-	ld1		{ v0.4s- v3.4s}, [x8], #64</div><div class='del'>-	ld1		{ v4.4s- v7.4s}, [x8], #64</div><div class='del'>-	ld1		{ v8.4s-v11.4s}, [x8], #64</div><div class='del'>-	ld1		{v12.4s-v15.4s}, [x8]</div><div class='del'>-</div><div class='del'>-	/* load state */</div><div class='del'>-	ld1		{dgav.4s, dgbv.4s}, [x0]</div><div class='del'>-</div><div class='del'>-	/* load sha256_ce_state::finalize */</div><div class='del'>-	ldr_l		w4, sha256_ce_offsetof_finalize, x4</div><div class='del'>-	ldr		w4, [x0, x4]</div><div class='del'>-</div><div class='del'>-	/* load input */</div><div class='del'>-0:	ld1		{v16.4s-v19.4s}, [x1], #64</div><div class='del'>-	sub		w2, w2, #1</div><div class='del'>-</div><div class='del'>-CPU_LE(	rev32		v16.16b, v16.16b	)</div><div class='del'>-CPU_LE(	rev32		v17.16b, v17.16b	)</div><div class='del'>-CPU_LE(	rev32		v18.16b, v18.16b	)</div><div class='del'>-CPU_LE(	rev32		v19.16b, v19.16b	)</div><div class='del'>-</div><div class='del'>-1:	add		t0.4s, v16.4s, v0.4s</div><div class='del'>-	mov		dg0v.16b, dgav.16b</div><div class='del'>-	mov		dg1v.16b, dgbv.16b</div><div class='del'>-</div><div class='del'>-	add_update	0,  v1, 16, 17, 18, 19</div><div class='del'>-	add_update	1,  v2, 17, 18, 19, 16</div><div class='del'>-	add_update	0,  v3, 18, 19, 16, 17</div><div class='del'>-	add_update	1,  v4, 19, 16, 17, 18</div><div class='del'>-</div><div class='del'>-	add_update	0,  v5, 16, 17, 18, 19</div><div class='del'>-	add_update	1,  v6, 17, 18, 19, 16</div><div class='del'>-	add_update	0,  v7, 18, 19, 16, 17</div><div class='del'>-	add_update	1,  v8, 19, 16, 17, 18</div><div class='del'>-</div><div class='del'>-	add_update	0,  v9, 16, 17, 18, 19</div><div class='del'>-	add_update	1, v10, 17, 18, 19, 16</div><div class='del'>-	add_update	0, v11, 18, 19, 16, 17</div><div class='del'>-	add_update	1, v12, 19, 16, 17, 18</div><div class='del'>-</div><div class='del'>-	add_only	0, v13, 17</div><div class='del'>-	add_only	1, v14, 18</div><div class='del'>-	add_only	0, v15, 19</div><div class='del'>-	add_only	1</div><div class='del'>-</div><div class='del'>-	/* update state */</div><div class='del'>-	add		dgav.4s, dgav.4s, dg0v.4s</div><div class='del'>-	add		dgbv.4s, dgbv.4s, dg1v.4s</div><div class='del'>-</div><div class='del'>-	/* handled all input blocks? */</div><div class='del'>-	cbz		w2, 2f</div><div class='del'>-	cond_yield	3f, x5, x6</div><div class='del'>-	b		0b</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Final block: add padding and total bit count.</div><div class='del'>-	 * Skip if the input size was not a round multiple of the block size,</div><div class='del'>-	 * the padding is handled by the C code in that case.</div><div class='del'>-	 */</div><div class='del'>-2:	cbz		x4, 3f</div><div class='del'>-	ldr_l		w4, sha256_ce_offsetof_count, x4</div><div class='del'>-	ldr		x4, [x0, x4]</div><div class='del'>-	movi		v17.2d, #0</div><div class='del'>-	mov		x8, #0x80000000</div><div class='del'>-	movi		v18.2d, #0</div><div class='del'>-	ror		x7, x4, #29		// ror(lsl(x4, 3), 32)</div><div class='del'>-	fmov		d16, x8</div><div class='del'>-	mov		x4, #0</div><div class='del'>-	mov		v19.d[0], xzr</div><div class='del'>-	mov		v19.d[1], x7</div><div class='del'>-	b		1b</div><div class='del'>-</div><div class='del'>-	/* store new state */</div><div class='del'>-3:	st1		{dgav.4s, dgbv.4s}, [x0]</div><div class='del'>-	mov		w0, w2</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(__sha256_ce_transform)</div><div class='head'>diff --git a/arch/arm64/crypto/sha2-ce-glue.c b/arch/arm64/crypto/sha2-ce-glue.c<br/>deleted file mode 100644<br/>index 6b4866a88ded..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha2-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha2-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,192 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-glue.c - SHA-224/SHA-256 using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-</div><div class='del'>-struct sha256_ce_state {</div><div class='del'>-	struct sha256_state	sst;</div><div class='del'>-	u32			finalize;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern const u32 sha256_ce_offsetof_count;</div><div class='del'>-extern const u32 sha256_ce_offsetof_finalize;</div><div class='del'>-</div><div class='del'>-asmlinkage int __sha256_ce_transform(struct sha256_ce_state *sst, u8 const *src,</div><div class='del'>-				     int blocks);</div><div class='del'>-</div><div class='del'>-static void sha256_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				int blocks)</div><div class='del'>-{</div><div class='del'>-	while (blocks) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		rem = __sha256_ce_transform(container_of(sst,</div><div class='del'>-							 struct sha256_ce_state,</div><div class='del'>-							 sst), src, blocks);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		src += (blocks - rem) * SHA256_BLOCK_SIZE;</div><div class='del'>-		blocks = rem;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const u32 sha256_ce_offsetof_count = offsetof(struct sha256_ce_state,</div><div class='del'>-					      sst.count);</div><div class='del'>-const u32 sha256_ce_offsetof_finalize = offsetof(struct sha256_ce_state,</div><div class='del'>-						 finalize);</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(u32 *digest, u8 const *src, int blocks);</div><div class='del'>-</div><div class='del'>-static void sha256_arm64_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha256_base_do_update(desc, data, len,</div><div class='del'>-					     sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_ce_transform);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	bool finalize = !sctx-&gt;sst.count &amp;&amp; !(len % SHA256_BLOCK_SIZE) &amp;&amp; len;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(desc, data, len,</div><div class='del'>-					      sha256_arm64_transform);</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allow the asm code to perform the finalization if there is no</div><div class='del'>-	 * partial data and the input is a round multiple of the block size.</div><div class='del'>-	 */</div><div class='del'>-	sctx-&gt;finalize = finalize;</div><div class='del'>-</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_ce_transform);</div><div class='del'>-	if (!finalize)</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_ce_transform);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_ce_transform);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_init(desc);</div><div class='del'>-	return sha256_ce_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, &amp;sctx-&gt;sst, sizeof(struct sha256_state));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;sctx-&gt;sst, in, sizeof(struct sha256_state));</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha256_ce_update,</div><div class='del'>-	.final			= sha256_ce_final,</div><div class='del'>-	.finup			= sha256_ce_finup,</div><div class='del'>-	.export			= sha256_ce_export,</div><div class='del'>-	.import			= sha256_ce_import,</div><div class='del'>-	.descsize		= sizeof(struct sha256_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha224",</div><div class='del'>-		.cra_driver_name	= "sha224-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha256_ce_update,</div><div class='del'>-	.final			= sha256_ce_final,</div><div class='del'>-	.finup			= sha256_ce_finup,</div><div class='del'>-	.digest			= sha256_ce_digest,</div><div class='del'>-	.export			= sha256_ce_export,</div><div class='del'>-	.import			= sha256_ce_import,</div><div class='del'>-	.descsize		= sizeof(struct sha256_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha256",</div><div class='del'>-		.cra_driver_name	= "sha256-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha2_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha2_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA2, sha2_ce_mod_init);</div><div class='del'>-module_exit(sha2_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha256-glue.c b/arch/arm64/crypto/sha256-glue.c<br/>deleted file mode 100644<br/>index 35356987cc1e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha256-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha256-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,194 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Linux/arm64 port of the OpenSSL SHA256 implementation for AArch64</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash for arm64");</div><div class='del'>-MODULE_AUTHOR("Andy Polyakov &lt;appro@openssl.org&gt;");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(u32 *digest, const void *data,</div><div class='del'>-					unsigned int num_blks);</div><div class='del'>-EXPORT_SYMBOL(sha256_block_data_order);</div><div class='del'>-</div><div class='del'>-static void sha256_arm64_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_neon(u32 *digest, const void *data,</div><div class='del'>-				  unsigned int num_blks);</div><div class='del'>-</div><div class='del'>-static void sha256_neon_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_neon(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_do_update(desc, data, len, sha256_arm64_transform);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len, sha256_arm64_transform);</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return crypto_sha256_arm64_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= crypto_sha256_arm64_update,</div><div class='del'>-	.final			= crypto_sha256_arm64_final,</div><div class='del'>-	.finup			= crypto_sha256_arm64_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha256",</div><div class='del'>-	.base.cra_driver_name	= "sha256-arm64",</div><div class='del'>-	.base.cra_priority	= 125,</div><div class='del'>-	.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= crypto_sha256_arm64_update,</div><div class='del'>-	.final			= crypto_sha256_arm64_final,</div><div class='del'>-	.finup			= crypto_sha256_arm64_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha224",</div><div class='del'>-	.base.cra_driver_name	= "sha224-arm64",</div><div class='del'>-	.base.cra_priority	= 125,</div><div class='del'>-	.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int sha256_update_neon(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha256_base_do_update(desc, data, len,</div><div class='del'>-				sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned int chunk = len;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Don't hog the CPU for the entire time it takes to process all</div><div class='del'>-		 * input when running on a preemptible kernel, but process the</div><div class='del'>-		 * data block by block instead.</div><div class='del'>-		 */</div><div class='del'>-		if (IS_ENABLED(CONFIG_PREEMPTION) &amp;&amp;</div><div class='del'>-		    chunk + sctx-&gt;count % SHA256_BLOCK_SIZE &gt; SHA256_BLOCK_SIZE)</div><div class='del'>-			chunk = SHA256_BLOCK_SIZE -</div><div class='del'>-				sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		sha256_base_do_update(desc, data, chunk, sha256_neon_transform);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		data += chunk;</div><div class='del'>-		len -= chunk;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_finup_neon(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(desc, data, len,</div><div class='del'>-				sha256_arm64_transform);</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-	} else {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_update_neon(desc, data, len);</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_neon_transform);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_final_neon(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup_neon(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg neon_algs[] = { {</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha256_update_neon,</div><div class='del'>-	.final			= sha256_final_neon,</div><div class='del'>-	.finup			= sha256_finup_neon,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha256",</div><div class='del'>-	.base.cra_driver_name	= "sha256-arm64-neon",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha256_update_neon,</div><div class='del'>-	.final			= sha256_final_neon,</div><div class='del'>-	.finup			= sha256_finup_neon,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha224",</div><div class='del'>-	.base.cra_driver_name	= "sha224-arm64-neon",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (cpu_have_named_feature(ASIMD)) {</div><div class='del'>-		ret = crypto_register_shashes(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-		if (ret)</div><div class='del'>-			crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_shashes(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_mod_init);</div><div class='del'>-module_exit(sha256_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha3-ce-glue.c b/arch/arm64/crypto/sha3-ce-glue.c<br/>index 5662c3ac49e9..b4f1001046c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha3-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha3-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha3-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sha3-ce-glue.c</a></div><div class='hunk'>@@ -12,13 +12,13 @@</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SHA3 secure hash using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='hunk'>@@ -35,74 +35,55 @@ static int sha3_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		       unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha3_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	if ((sctx-&gt;partial + len) &gt;= sctx-&gt;rsiz) {</div><div class='del'>-		int blocks;</div><div class='del'>-</div><div class='del'>-		if (sctx-&gt;partial) {</div><div class='del'>-			int p = sctx-&gt;rsiz - sctx-&gt;partial;</div><div class='del'>-</div><div class='del'>-			memcpy(sctx-&gt;buf + sctx-&gt;partial, data, p);</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			sha3_ce_transform(sctx-&gt;st, sctx-&gt;buf, 1, digest_size);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-</div><div class='del'>-			data += p;</div><div class='del'>-			len -= p;</div><div class='del'>-			sctx-&gt;partial = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		blocks = len / sctx-&gt;rsiz;</div><div class='del'>-		len %= sctx-&gt;rsiz;</div><div class='del'>-</div><div class='del'>-		while (blocks) {</div><div class='del'>-			int rem;</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			rem = sha3_ce_transform(sctx-&gt;st, data, blocks,</div><div class='del'>-						digest_size);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			data += (blocks - rem) * sctx-&gt;rsiz;</div><div class='del'>-			blocks = rem;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len) {</div><div class='del'>-		memcpy(sctx-&gt;buf + sctx-&gt;partial, data, len);</div><div class='del'>-		sctx-&gt;partial += len;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	unsigned int bs, ds;</div><div class='add'>+	int blocks;</div><div class='add'>+</div><div class='add'>+	ds = crypto_shash_digestsize(tfm);</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	blocks = len / bs;</div><div class='add'>+	len -= blocks * bs;</div><div class='add'>+	do {</div><div class='add'>+		int rem;</div><div class='add'>+</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		rem = sha3_ce_transform(sctx-&gt;st, data, blocks, ds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+		data += (blocks - rem) * bs;</div><div class='add'>+		blocks = rem;</div><div class='add'>+	} while (blocks);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha3_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sha3_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		      u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='ctx'> 	__le64 *digest = (__le64 *)out;</div><div class='add'>+	u8 block[SHA3_224_BLOCK_SIZE];</div><div class='add'>+	unsigned int bs, ds;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha3_final(desc, out);</div><div class='add'>+	ds = crypto_shash_digestsize(tfm);</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	memcpy(block, src, len);</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;buf[sctx-&gt;partial++] = 0x06;</div><div class='del'>-	memset(sctx-&gt;buf + sctx-&gt;partial, 0, sctx-&gt;rsiz - sctx-&gt;partial);</div><div class='del'>-	sctx-&gt;buf[sctx-&gt;rsiz - 1] |= 0x80;</div><div class='add'>+	block[len++] = 0x06;</div><div class='add'>+	memset(block + len, 0, bs - len);</div><div class='add'>+	block[bs - 1] |= 0x80;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sha3_ce_transform(sctx-&gt;st, sctx-&gt;buf, 1, digest_size);</div><div class='add'>+	sha3_ce_transform(sctx-&gt;st, block, 1, ds);</div><div class='ctx'> 	kernel_neon_end();</div><div class='add'>+	memzero_explicit(block , sizeof(block));</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; digest_size / 8; i++)</div><div class='add'>+	for (i = 0; i &lt; ds / 8; i++)</div><div class='ctx'> 		put_unaligned_le64(sctx-&gt;st[i], digest++);</div><div class='ctx'> </div><div class='del'>-	if (digest_size &amp; 4)</div><div class='add'>+	if (ds &amp; 4)</div><div class='ctx'> 		put_unaligned_le32(sctx-&gt;st[i], (__le32 *)digest);</div><div class='ctx'> </div><div class='del'>-	memzero_explicit(sctx, sizeof(*sctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -110,10 +91,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_224_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-224",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-224-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_224_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -121,10 +103,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_256_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-256",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-256-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_256_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -132,10 +115,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_384_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-384",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-384-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_384_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -143,10 +127,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_512_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-512",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-512-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-armv8.pl b/arch/arm64/crypto/sha512-armv8.pl<br/>deleted file mode 100644<br/>index 35ec9ae99fe1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha512-armv8.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-armv8.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,786 +0,0 @@</div><div class='del'>-#! /usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-# This code is taken from the OpenSSL project but the author (Andy Polyakov)</div><div class='del'>-# has relicensed it under the GPLv2. Therefore this program is free software;</div><div class='del'>-# you can redistribute it and/or modify it under the terms of the GNU General</div><div class='del'>-# Public License version 2 as published by the Free Software Foundation.</div><div class='del'>-#</div><div class='del'>-# The original headers, including the original license headers, are</div><div class='del'>-# included below for completeness.</div><div class='del'>-</div><div class='del'>-# Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.</div><div class='del'>-#</div><div class='del'>-# Licensed under the OpenSSL license (the "License").  You may not use</div><div class='del'>-# this file except in compliance with the License.  You can obtain a copy</div><div class='del'>-# in the file LICENSE in the source distribution or at</div><div class='del'>-# https://www.openssl.org/source/license.html</div><div class='del'>-</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='del'>-# project. The module is, however, dual licensed under OpenSSL and</div><div class='del'>-# CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='del'>-# details see http://www.openssl.org/~appro/cryptogams/.</div><div class='del'>-# ====================================================================</div><div class='del'>-#</div><div class='del'>-# SHA256/512 for ARMv8.</div><div class='del'>-#</div><div class='del'>-# Performance in cycles per processed byte and improvement coefficient</div><div class='del'>-# over code generated with "default" compiler:</div><div class='del'>-#</div><div class='del'>-#		SHA256-hw	SHA256(*)	SHA512</div><div class='del'>-# Apple A7	1.97		10.5 (+33%)	6.73 (-1%(**))</div><div class='del'>-# Cortex-A53	2.38		15.5 (+115%)	10.0 (+150%(***))</div><div class='del'>-# Cortex-A57	2.31		11.6 (+86%)	7.51 (+260%(***))</div><div class='del'>-# Denver	2.01		10.5 (+26%)	6.70 (+8%)</div><div class='del'>-# X-Gene			20.0 (+100%)	12.8 (+300%(***))</div><div class='del'>-# Mongoose	2.36		13.0 (+50%)	8.36 (+33%)</div><div class='del'>-#</div><div class='del'>-# (*)	Software SHA256 results are of lesser relevance, presented</div><div class='del'>-#	mostly for informational purposes.</div><div class='del'>-# (**)	The result is a trade-off: it's possible to improve it by</div><div class='del'>-#	10% (or by 1 cycle per round), but at the cost of 20% loss</div><div class='del'>-#	on Cortex-A53 (or by 4 cycles per round).</div><div class='del'>-# (***)	Super-impressive coefficients over gcc-generated code are</div><div class='del'>-#	indication of some compiler "pathology", most notably code</div><div class='del'>-#	generated with -mgeneral-regs-only is significantly faster</div><div class='del'>-#	and the gap is only 40-90%.</div><div class='del'>-#</div><div class='del'>-# October 2016.</div><div class='del'>-#</div><div class='del'>-# Originally it was reckoned that it makes no sense to implement NEON</div><div class='del'>-# version of SHA256 for 64-bit processors. This is because performance</div><div class='del'>-# improvement on most wide-spread Cortex-A5x processors was observed</div><div class='del'>-# to be marginal, same on Cortex-A53 and ~10% on A57. But then it was</div><div class='del'>-# observed that 32-bit NEON SHA256 performs significantly better than</div><div class='del'>-# 64-bit scalar version on *some* of the more recent processors. As</div><div class='del'>-# result 64-bit NEON version of SHA256 was added to provide best</div><div class='del'>-# all-round performance. For example it executes ~30% faster on X-Gene</div><div class='del'>-# and Mongoose. [For reference, NEON version of SHA512 is bound to</div><div class='del'>-# deliver much less improvement, likely *negative* on Cortex-A5x.</div><div class='del'>-# Which is why NEON support is limited to SHA256.]</div><div class='del'>-</div><div class='del'>-$output=pop;</div><div class='del'>-$flavour=pop;</div><div class='del'>-</div><div class='del'>-if ($flavour &amp;&amp; $flavour ne "void") {</div><div class='del'>-    $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;</div><div class='del'>-    ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or</div><div class='del'>-    ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or</div><div class='del'>-    die "can't locate arm-xlate.pl";</div><div class='del'>-</div><div class='del'>-    open OUT,"| \"$^X\" $xlate $flavour $output";</div><div class='del'>-    *STDOUT=*OUT;</div><div class='del'>-} else {</div><div class='del'>-    open STDOUT,"&gt;$output";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-if ($output =~ /512/) {</div><div class='del'>-	$BITS=512;</div><div class='del'>-	$SZ=8;</div><div class='del'>-	@Sigma0=(28,34,39);</div><div class='del'>-	@Sigma1=(14,18,41);</div><div class='del'>-	@sigma0=(1,  8, 7);</div><div class='del'>-	@sigma1=(19,61, 6);</div><div class='del'>-	$rounds=80;</div><div class='del'>-	$reg_t="x";</div><div class='del'>-} else {</div><div class='del'>-	$BITS=256;</div><div class='del'>-	$SZ=4;</div><div class='del'>-	@Sigma0=( 2,13,22);</div><div class='del'>-	@Sigma1=( 6,11,25);</div><div class='del'>-	@sigma0=( 7,18, 3);</div><div class='del'>-	@sigma1=(17,19,10);</div><div class='del'>-	$rounds=64;</div><div class='del'>-	$reg_t="w";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$func="sha${BITS}_block_data_order";</div><div class='del'>-</div><div class='del'>-($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));</div><div class='del'>-</div><div class='del'>-@X=map("$reg_t$_",(3..15,0..2));</div><div class='del'>-@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));</div><div class='del'>-($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));</div><div class='del'>-</div><div class='del'>-sub BODY_00_xx {</div><div class='del'>-my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;</div><div class='del'>-my $j=($i+1)&amp;15;</div><div class='del'>-my ($T0,$T1,$T2)=(@X[($i-8)&amp;15],@X[($i-9)&amp;15],@X[($i-10)&amp;15]);</div><div class='del'>-   $T0=@X[$i+3] if ($i&lt;11);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___	if ($i&lt;16);</div><div class='del'>-#ifndef	__AARCH64EB__</div><div class='del'>-	rev	@X[$i],@X[$i]			// $i</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i&lt;13 &amp;&amp; ($i&amp;1));</div><div class='del'>-	ldp	@X[$i+1],@X[$i+2],[$inp],#2*$SZ</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i==13);</div><div class='del'>-	ldp	@X[14],@X[15],[$inp]</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i&gt;=14);</div><div class='del'>-	ldr	@X[($i-11)&amp;15],[sp,#`$SZ*(($i-11)%4)`]</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i&gt;0 &amp;&amp; $i&lt;16);</div><div class='del'>-	add	$a,$a,$t1			// h+=Sigma0(a)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i&gt;=11);</div><div class='del'>-	str	@X[($i-8)&amp;15],[sp,#`$SZ*(($i-8)%4)`]</div><div class='del'>-___</div><div class='del'>-# While ARMv8 specifies merged rotate-n-logical operation such as</div><div class='del'>-# 'eor x,y,z,ror#n', it was found to negatively affect performance</div><div class='del'>-# on Apple A7. The reason seems to be that it requires even 'y' to</div><div class='del'>-# be available earlier. This means that such merged instruction is</div><div class='del'>-# not necessarily best choice on critical path... On the other hand</div><div class='del'>-# Cortex-A5x handles merged instructions much better than disjoint</div><div class='del'>-# rotate and logical... See (**) footnote above.</div><div class='del'>-$code.=&lt;&lt;___	if ($i&lt;15);</div><div class='del'>-	ror	$t0,$e,#$Sigma1[0]</div><div class='del'>-	add	$h,$h,$t2			// h+=K[i]</div><div class='del'>-	eor	$T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]`</div><div class='del'>-	and	$t1,$f,$e</div><div class='del'>-	bic	$t2,$g,$e</div><div class='del'>-	add	$h,$h,@X[$i&amp;15]			// h+=X[i]</div><div class='del'>-	orr	$t1,$t1,$t2			// Ch(e,f,g)</div><div class='del'>-	eor	$t2,$a,$b			// a^b, b^c in next round</div><div class='del'>-	eor	$t0,$t0,$T0,ror#$Sigma1[1]	// Sigma1(e)</div><div class='del'>-	ror	$T0,$a,#$Sigma0[0]</div><div class='del'>-	add	$h,$h,$t1			// h+=Ch(e,f,g)</div><div class='del'>-	eor	$t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]`</div><div class='del'>-	add	$h,$h,$t0			// h+=Sigma1(e)</div><div class='del'>-	and	$t3,$t3,$t2			// (b^c)&amp;=(a^b)</div><div class='del'>-	add	$d,$d,$h			// d+=h</div><div class='del'>-	eor	$t3,$t3,$b			// Maj(a,b,c)</div><div class='del'>-	eor	$t1,$T0,$t1,ror#$Sigma0[1]	// Sigma0(a)</div><div class='del'>-	add	$h,$h,$t3			// h+=Maj(a,b,c)</div><div class='del'>-	ldr	$t3,[$Ktbl],#$SZ		// *K++, $t2 in next round</div><div class='del'>-	//add	$h,$h,$t1			// h+=Sigma0(a)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($i&gt;=15);</div><div class='del'>-	ror	$t0,$e,#$Sigma1[0]</div><div class='del'>-	add	$h,$h,$t2			// h+=K[i]</div><div class='del'>-	ror	$T1,@X[($j+1)&amp;15],#$sigma0[0]</div><div class='del'>-	and	$t1,$f,$e</div><div class='del'>-	ror	$T2,@X[($j+14)&amp;15],#$sigma1[0]</div><div class='del'>-	bic	$t2,$g,$e</div><div class='del'>-	ror	$T0,$a,#$Sigma0[0]</div><div class='del'>-	add	$h,$h,@X[$i&amp;15]			// h+=X[i]</div><div class='del'>-	eor	$t0,$t0,$e,ror#$Sigma1[1]</div><div class='del'>-	eor	$T1,$T1,@X[($j+1)&amp;15],ror#$sigma0[1]</div><div class='del'>-	orr	$t1,$t1,$t2			// Ch(e,f,g)</div><div class='del'>-	eor	$t2,$a,$b			// a^b, b^c in next round</div><div class='del'>-	eor	$t0,$t0,$e,ror#$Sigma1[2]	// Sigma1(e)</div><div class='del'>-	eor	$T0,$T0,$a,ror#$Sigma0[1]</div><div class='del'>-	add	$h,$h,$t1			// h+=Ch(e,f,g)</div><div class='del'>-	and	$t3,$t3,$t2			// (b^c)&amp;=(a^b)</div><div class='del'>-	eor	$T2,$T2,@X[($j+14)&amp;15],ror#$sigma1[1]</div><div class='del'>-	eor	$T1,$T1,@X[($j+1)&amp;15],lsr#$sigma0[2]	// sigma0(X[i+1])</div><div class='del'>-	add	$h,$h,$t0			// h+=Sigma1(e)</div><div class='del'>-	eor	$t3,$t3,$b			// Maj(a,b,c)</div><div class='del'>-	eor	$t1,$T0,$a,ror#$Sigma0[2]	// Sigma0(a)</div><div class='del'>-	eor	$T2,$T2,@X[($j+14)&amp;15],lsr#$sigma1[2]	// sigma1(X[i+14])</div><div class='del'>-	add	@X[$j],@X[$j],@X[($j+9)&amp;15]</div><div class='del'>-	add	$d,$d,$h			// d+=h</div><div class='del'>-	add	$h,$h,$t3			// h+=Maj(a,b,c)</div><div class='del'>-	ldr	$t3,[$Ktbl],#$SZ		// *K++, $t2 in next round</div><div class='del'>-	add	@X[$j],@X[$j],$T1</div><div class='del'>-	add	$h,$h,$t1			// h+=Sigma0(a)</div><div class='del'>-	add	@X[$j],@X[$j],$T2</div><div class='del'>-___</div><div class='del'>-	($t2,$t3)=($t3,$t2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-# include "arm_arch.h"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.extern	OPENSSL_armcap_P</div><div class='del'>-.globl	$func</div><div class='del'>-.type	$func,%function</div><div class='del'>-.align	6</div><div class='del'>-$func:</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___	if ($SZ==4);</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-# ifdef	__ILP32__</div><div class='del'>-	ldrsw	x16,.LOPENSSL_armcap_P</div><div class='del'>-# else</div><div class='del'>-	ldr	x16,.LOPENSSL_armcap_P</div><div class='del'>-# endif</div><div class='del'>-	adr	x17,.LOPENSSL_armcap_P</div><div class='del'>-	add	x16,x16,x17</div><div class='del'>-	ldr	w16,[x16]</div><div class='del'>-	tst	w16,#ARMV8_SHA256</div><div class='del'>-	b.ne	.Lv8_entry</div><div class='del'>-	tst	w16,#ARMV7_NEON</div><div class='del'>-	b.ne	.Lneon_entry</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	stp	x29,x30,[sp,#-128]!</div><div class='del'>-	add	x29,sp,#0</div><div class='del'>-</div><div class='del'>-	stp	x19,x20,[sp,#16]</div><div class='del'>-	stp	x21,x22,[sp,#32]</div><div class='del'>-	stp	x23,x24,[sp,#48]</div><div class='del'>-	stp	x25,x26,[sp,#64]</div><div class='del'>-	stp	x27,x28,[sp,#80]</div><div class='del'>-	sub	sp,sp,#4*$SZ</div><div class='del'>-</div><div class='del'>-	ldp	$A,$B,[$ctx]				// load context</div><div class='del'>-	ldp	$C,$D,[$ctx,#2*$SZ]</div><div class='del'>-	ldp	$E,$F,[$ctx,#4*$SZ]</div><div class='del'>-	add	$num,$inp,$num,lsl#`log(16*$SZ)/log(2)`	// end of input</div><div class='del'>-	ldp	$G,$H,[$ctx,#6*$SZ]</div><div class='del'>-	adr	$Ktbl,.LK$BITS</div><div class='del'>-	stp	$ctx,$num,[x29,#96]</div><div class='del'>-</div><div class='del'>-.Loop:</div><div class='del'>-	ldp	@X[0],@X[1],[$inp],#2*$SZ</div><div class='del'>-	ldr	$t2,[$Ktbl],#$SZ			// *K++</div><div class='del'>-	eor	$t3,$B,$C				// magic seed</div><div class='del'>-	str	$inp,[x29,#112]</div><div class='del'>-___</div><div class='del'>-for ($i=0;$i&lt;16;$i++)	{ &amp;BODY_00_xx($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=".Loop_16_xx:\n";</div><div class='del'>-for (;$i&lt;32;$i++)	{ &amp;BODY_00_xx($i,@V); unshift(@V,pop(@V)); }</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	cbnz	$t2,.Loop_16_xx</div><div class='del'>-</div><div class='del'>-	ldp	$ctx,$num,[x29,#96]</div><div class='del'>-	ldr	$inp,[x29,#112]</div><div class='del'>-	sub	$Ktbl,$Ktbl,#`$SZ*($rounds+1)`		// rewind</div><div class='del'>-</div><div class='del'>-	ldp	@X[0],@X[1],[$ctx]</div><div class='del'>-	ldp	@X[2],@X[3],[$ctx,#2*$SZ]</div><div class='del'>-	add	$inp,$inp,#14*$SZ			// advance input pointer</div><div class='del'>-	ldp	@X[4],@X[5],[$ctx,#4*$SZ]</div><div class='del'>-	add	$A,$A,@X[0]</div><div class='del'>-	ldp	@X[6],@X[7],[$ctx,#6*$SZ]</div><div class='del'>-	add	$B,$B,@X[1]</div><div class='del'>-	add	$C,$C,@X[2]</div><div class='del'>-	add	$D,$D,@X[3]</div><div class='del'>-	stp	$A,$B,[$ctx]</div><div class='del'>-	add	$E,$E,@X[4]</div><div class='del'>-	add	$F,$F,@X[5]</div><div class='del'>-	stp	$C,$D,[$ctx,#2*$SZ]</div><div class='del'>-	add	$G,$G,@X[6]</div><div class='del'>-	add	$H,$H,@X[7]</div><div class='del'>-	cmp	$inp,$num</div><div class='del'>-	stp	$E,$F,[$ctx,#4*$SZ]</div><div class='del'>-	stp	$G,$H,[$ctx,#6*$SZ]</div><div class='del'>-	b.ne	.Loop</div><div class='del'>-</div><div class='del'>-	ldp	x19,x20,[x29,#16]</div><div class='del'>-	add	sp,sp,#4*$SZ</div><div class='del'>-	ldp	x21,x22,[x29,#32]</div><div class='del'>-	ldp	x23,x24,[x29,#48]</div><div class='del'>-	ldp	x25,x26,[x29,#64]</div><div class='del'>-	ldp	x27,x28,[x29,#80]</div><div class='del'>-	ldp	x29,x30,[sp],#128</div><div class='del'>-	ret</div><div class='del'>-.size	$func,.-$func</div><div class='del'>-</div><div class='del'>-.align	6</div><div class='del'>-.type	.LK$BITS,%object</div><div class='del'>-.LK$BITS:</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($SZ==8);</div><div class='del'>-	.quad	0x428a2f98d728ae22,0x7137449123ef65cd</div><div class='del'>-	.quad	0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc</div><div class='del'>-	.quad	0x3956c25bf348b538,0x59f111f1b605d019</div><div class='del'>-	.quad	0x923f82a4af194f9b,0xab1c5ed5da6d8118</div><div class='del'>-	.quad	0xd807aa98a3030242,0x12835b0145706fbe</div><div class='del'>-	.quad	0x243185be4ee4b28c,0x550c7dc3d5ffb4e2</div><div class='del'>-	.quad	0x72be5d74f27b896f,0x80deb1fe3b1696b1</div><div class='del'>-	.quad	0x9bdc06a725c71235,0xc19bf174cf692694</div><div class='del'>-	.quad	0xe49b69c19ef14ad2,0xefbe4786384f25e3</div><div class='del'>-	.quad	0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65</div><div class='del'>-	.quad	0x2de92c6f592b0275,0x4a7484aa6ea6e483</div><div class='del'>-	.quad	0x5cb0a9dcbd41fbd4,0x76f988da831153b5</div><div class='del'>-	.quad	0x983e5152ee66dfab,0xa831c66d2db43210</div><div class='del'>-	.quad	0xb00327c898fb213f,0xbf597fc7beef0ee4</div><div class='del'>-	.quad	0xc6e00bf33da88fc2,0xd5a79147930aa725</div><div class='del'>-	.quad	0x06ca6351e003826f,0x142929670a0e6e70</div><div class='del'>-	.quad	0x27b70a8546d22ffc,0x2e1b21385c26c926</div><div class='del'>-	.quad	0x4d2c6dfc5ac42aed,0x53380d139d95b3df</div><div class='del'>-	.quad	0x650a73548baf63de,0x766a0abb3c77b2a8</div><div class='del'>-	.quad	0x81c2c92e47edaee6,0x92722c851482353b</div><div class='del'>-	.quad	0xa2bfe8a14cf10364,0xa81a664bbc423001</div><div class='del'>-	.quad	0xc24b8b70d0f89791,0xc76c51a30654be30</div><div class='del'>-	.quad	0xd192e819d6ef5218,0xd69906245565a910</div><div class='del'>-	.quad	0xf40e35855771202a,0x106aa07032bbd1b8</div><div class='del'>-	.quad	0x19a4c116b8d2d0c8,0x1e376c085141ab53</div><div class='del'>-	.quad	0x2748774cdf8eeb99,0x34b0bcb5e19b48a8</div><div class='del'>-	.quad	0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb</div><div class='del'>-	.quad	0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3</div><div class='del'>-	.quad	0x748f82ee5defb2fc,0x78a5636f43172f60</div><div class='del'>-	.quad	0x84c87814a1f0ab72,0x8cc702081a6439ec</div><div class='del'>-	.quad	0x90befffa23631e28,0xa4506cebde82bde9</div><div class='del'>-	.quad	0xbef9a3f7b2c67915,0xc67178f2e372532b</div><div class='del'>-	.quad	0xca273eceea26619c,0xd186b8c721c0c207</div><div class='del'>-	.quad	0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178</div><div class='del'>-	.quad	0x06f067aa72176fba,0x0a637dc5a2c898a6</div><div class='del'>-	.quad	0x113f9804bef90dae,0x1b710b35131c471b</div><div class='del'>-	.quad	0x28db77f523047d84,0x32caab7b40c72493</div><div class='del'>-	.quad	0x3c9ebe0a15c9bebc,0x431d67c49c100d4c</div><div class='del'>-	.quad	0x4cc5d4becb3e42b6,0x597f299cfc657e2a</div><div class='del'>-	.quad	0x5fcb6fab3ad6faec,0x6c44198c4a475817</div><div class='del'>-	.quad	0	// terminator</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($SZ==4);</div><div class='del'>-	.long	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5</div><div class='del'>-	.long	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5</div><div class='del'>-	.long	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3</div><div class='del'>-	.long	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174</div><div class='del'>-	.long	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc</div><div class='del'>-	.long	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da</div><div class='del'>-	.long	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7</div><div class='del'>-	.long	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967</div><div class='del'>-	.long	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13</div><div class='del'>-	.long	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85</div><div class='del'>-	.long	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3</div><div class='del'>-	.long	0xd192e819,0xd6990624,0xf40e3585,0x106aa070</div><div class='del'>-	.long	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5</div><div class='del'>-	.long	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3</div><div class='del'>-	.long	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208</div><div class='del'>-	.long	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2</div><div class='del'>-	.long	0	//terminator</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.size	.LK$BITS,.-.LK$BITS</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-.align	3</div><div class='del'>-.LOPENSSL_armcap_P:</div><div class='del'>-# ifdef	__ILP32__</div><div class='del'>-	.long	OPENSSL_armcap_P-.</div><div class='del'>-# else</div><div class='del'>-	.quad	OPENSSL_armcap_P-.</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-.asciz	"SHA$BITS block transform for ARMv8, CRYPTOGAMS by &lt;appro\@openssl.org&gt;"</div><div class='del'>-.align	2</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-if ($SZ==4) {</div><div class='del'>-my $Ktbl="x3";</div><div class='del'>-</div><div class='del'>-my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));</div><div class='del'>-my @MSG=map("v$_.16b",(4..7));</div><div class='del'>-my ($W0,$W1)=("v16.4s","v17.4s");</div><div class='del'>-my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-.type	sha256_block_armv8,%function</div><div class='del'>-.align	6</div><div class='del'>-sha256_block_armv8:</div><div class='del'>-.Lv8_entry:</div><div class='del'>-	stp		x29,x30,[sp,#-16]!</div><div class='del'>-	add		x29,sp,#0</div><div class='del'>-</div><div class='del'>-	ld1.32		{$ABCD,$EFGH},[$ctx]</div><div class='del'>-	adr		$Ktbl,.LK256</div><div class='del'>-</div><div class='del'>-.Loop_hw:</div><div class='del'>-	ld1		{@MSG[0]-@MSG[3]},[$inp],#64</div><div class='del'>-	sub		$num,$num,#1</div><div class='del'>-	ld1.32		{$W0},[$Ktbl],#16</div><div class='del'>-	rev32		@MSG[0],@MSG[0]</div><div class='del'>-	rev32		@MSG[1],@MSG[1]</div><div class='del'>-	rev32		@MSG[2],@MSG[2]</div><div class='del'>-	rev32		@MSG[3],@MSG[3]</div><div class='del'>-	orr		$ABCD_SAVE,$ABCD,$ABCD		// offload</div><div class='del'>-	orr		$EFGH_SAVE,$EFGH,$EFGH</div><div class='del'>-___</div><div class='del'>-for($i=0;$i&lt;12;$i++) {</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	ld1.32		{$W1},[$Ktbl],#16</div><div class='del'>-	add.i32		$W0,$W0,@MSG[0]</div><div class='del'>-	sha256su0	@MSG[0],@MSG[1]</div><div class='del'>-	orr		$abcd,$ABCD,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-	sha256su1	@MSG[0],@MSG[2],@MSG[3]</div><div class='del'>-___</div><div class='del'>-	($W0,$W1)=($W1,$W0);	push(@MSG,shift(@MSG));</div><div class='del'>-}</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	ld1.32		{$W1},[$Ktbl],#16</div><div class='del'>-	add.i32		$W0,$W0,@MSG[0]</div><div class='del'>-	orr		$abcd,$ABCD,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-</div><div class='del'>-	ld1.32		{$W0},[$Ktbl],#16</div><div class='del'>-	add.i32		$W1,$W1,@MSG[1]</div><div class='del'>-	orr		$abcd,$ABCD,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W1</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W1</div><div class='del'>-</div><div class='del'>-	ld1.32		{$W1},[$Ktbl]</div><div class='del'>-	add.i32		$W0,$W0,@MSG[2]</div><div class='del'>-	sub		$Ktbl,$Ktbl,#$rounds*$SZ-16	// rewind</div><div class='del'>-	orr		$abcd,$ABCD,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W0</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W0</div><div class='del'>-</div><div class='del'>-	add.i32		$W1,$W1,@MSG[3]</div><div class='del'>-	orr		$abcd,$ABCD,$ABCD</div><div class='del'>-	sha256h		$ABCD,$EFGH,$W1</div><div class='del'>-	sha256h2	$EFGH,$abcd,$W1</div><div class='del'>-</div><div class='del'>-	add.i32		$ABCD,$ABCD,$ABCD_SAVE</div><div class='del'>-	add.i32		$EFGH,$EFGH,$EFGH_SAVE</div><div class='del'>-</div><div class='del'>-	cbnz		$num,.Loop_hw</div><div class='del'>-</div><div class='del'>-	st1.32		{$ABCD,$EFGH},[$ctx]</div><div class='del'>-</div><div class='del'>-	ldr		x29,[sp],#16</div><div class='del'>-	ret</div><div class='del'>-.size	sha256_block_armv8,.-sha256_block_armv8</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-if ($SZ==4) {	######################################### NEON stuff #</div><div class='del'>-# You'll surely note a lot of similarities with sha256-armv4 module,</div><div class='del'>-# and of course it's not a coincidence. sha256-armv4 was used as</div><div class='del'>-# initial template, but was adapted for ARMv8 instruction set and</div><div class='del'>-# extensively re-tuned for all-round performance.</div><div class='del'>-</div><div class='del'>-my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));</div><div class='del'>-my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15));</div><div class='del'>-my $Ktbl="x16";</div><div class='del'>-my $Xfer="x17";</div><div class='del'>-my @X = map("q$_",(0..3));</div><div class='del'>-my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));</div><div class='del'>-my $j=0;</div><div class='del'>-</div><div class='del'>-sub AUTOLOAD()          # thunk [simplified] x86-style perlasm</div><div class='del'>-{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;</div><div class='del'>-  my $arg = pop;</div><div class='del'>-    $arg = "#$arg" if ($arg*1 eq $arg);</div><div class='del'>-    $code .= "\t$opcode\t".join(',',@_,$arg)."\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; }</div><div class='del'>-sub Dlo     { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; }</div><div class='del'>-sub Dhi     { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; }</div><div class='del'>-</div><div class='del'>-sub Xupdate()</div><div class='del'>-{ use integer;</div><div class='del'>-  my $body = shift;</div><div class='del'>-  my @insns = (&amp;$body,&amp;$body,&amp;$body,&amp;$body);</div><div class='del'>-  my ($a,$b,$c,$d,$e,$f,$g,$h);</div><div class='del'>-</div><div class='del'>-	&amp;ext_8		($T0,@X[0],@X[1],4);	# X[1..4]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ext_8		($T3,@X[2],@X[3],4);	# X[9..12]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;mov		(&amp;Dscalar($T7),&amp;Dhi(@X[3]));	# X[14..15]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ushr_32	($T2,$T0,$sigma0[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ushr_32	($T1,$T0,$sigma0[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32 	(@X[0],@X[0],$T3);	# X[0..3] += X[9..12]</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;sli_32		($T2,$T0,32-$sigma0[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ushr_32	($T3,$T0,$sigma0[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;eor_8		($T1,$T1,$T2);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;sli_32		($T3,$T0,32-$sigma0[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T4,$T7,$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;eor_8		($T1,$T1,$T3);		# sigma0(X[1..4])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;sli_32	($T4,$T7,32-$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T5,$T7,$sigma1[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T3,$T7,$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32		(@X[0],@X[0],$T1);	# X[0..3] += sigma0(X[1..4])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;sli_u32	($T3,$T7,32-$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;eor_8	($T5,$T5,$T4);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;eor_8	($T5,$T5,$T3);		# sigma1(X[14..15])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32		(@X[0],@X[0],$T5);	# X[0..1] += sigma1(X[14..15])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T6,@X[0],$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T7,@X[0],$sigma1[2]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;sli_32	($T6,@X[0],32-$sigma1[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;ushr_32	($T5,@X[0],$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;eor_8	($T7,$T7,$T6);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;sli_32	($T5,@X[0],32-$sigma1[1]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ld1_32		("{$T0}","[$Ktbl], #16");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	  &amp;eor_8	($T7,$T7,$T5);		# sigma1(X[16..17])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;eor_8		($T5,$T5,$T5);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;mov		(&amp;Dhi($T5), &amp;Dlo($T7));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32		(@X[0],@X[0],$T5);	# X[2..3] += sigma1(X[16..17])</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32		($T0,$T0,@X[0]);</div><div class='del'>-	 while($#insns&gt;=1) { eval(shift(@insns)); }</div><div class='del'>-	&amp;st1_32		("{$T0}","[$Xfer], #16");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-</div><div class='del'>-	push(@X,shift(@X));		# "rotate" X[]</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub Xpreload()</div><div class='del'>-{ use integer;</div><div class='del'>-  my $body = shift;</div><div class='del'>-  my @insns = (&amp;$body,&amp;$body,&amp;$body,&amp;$body);</div><div class='del'>-  my ($a,$b,$c,$d,$e,$f,$g,$h);</div><div class='del'>-</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ld1_8		("{@X[0]}","[$inp],#16");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;ld1_32		("{$T0}","[$Ktbl],#16");</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;rev32		(@X[0],@X[0]);</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	 eval(shift(@insns));</div><div class='del'>-	&amp;add_32		($T0,$T0,@X[0]);</div><div class='del'>-	 foreach (@insns) { eval; }	# remaining instructions</div><div class='del'>-	&amp;st1_32		("{$T0}","[$Xfer], #16");</div><div class='del'>-</div><div class='del'>-	push(@X,shift(@X));		# "rotate" X[]</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-sub body_00_15 () {</div><div class='del'>-	(</div><div class='del'>-	'($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.</div><div class='del'>-	'&amp;add	($h,$h,$t1)',			# h+=X[i]+K[i]</div><div class='del'>-	'&amp;add	($a,$a,$t4);'.			# h+=Sigma0(a) from the past</div><div class='del'>-	'&amp;and	($t1,$f,$e)',</div><div class='del'>-	'&amp;bic	($t4,$g,$e)',</div><div class='del'>-	'&amp;eor	($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',</div><div class='del'>-	'&amp;add	($a,$a,$t2)',			# h+=Maj(a,b,c) from the past</div><div class='del'>-	'&amp;orr	($t1,$t1,$t4)',			# Ch(e,f,g)</div><div class='del'>-	'&amp;eor	($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))',	# Sigma1(e)</div><div class='del'>-	'&amp;eor	($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',</div><div class='del'>-	'&amp;add	($h,$h,$t1)',			# h+=Ch(e,f,g)</div><div class='del'>-	'&amp;ror	($t0,$t0,"#$Sigma1[0]")',</div><div class='del'>-	'&amp;eor	($t2,$a,$b)',			# a^b, b^c in next round</div><div class='del'>-	'&amp;eor	($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))',	# Sigma0(a)</div><div class='del'>-	'&amp;add	($h,$h,$t0)',			# h+=Sigma1(e)</div><div class='del'>-	'&amp;ldr	($t1,sprintf "[sp,#%d]",4*(($j+1)&amp;15))	if (($j&amp;15)!=15);'.</div><div class='del'>-	'&amp;ldr	($t1,"[$Ktbl]")				if ($j==15);'.</div><div class='del'>-	'&amp;and	($t3,$t3,$t2)',			# (b^c)&amp;=(a^b)</div><div class='del'>-	'&amp;ror	($t4,$t4,"#$Sigma0[0]")',</div><div class='del'>-	'&amp;add	($d,$d,$h)',			# d+=h</div><div class='del'>-	'&amp;eor	($t3,$t3,$b)',			# Maj(a,b,c)</div><div class='del'>-	'$j++;	unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'</div><div class='del'>-	)</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifdef	__KERNEL__</div><div class='del'>-.globl	sha256_block_neon</div><div class='del'>-#endif</div><div class='del'>-.type	sha256_block_neon,%function</div><div class='del'>-.align	4</div><div class='del'>-sha256_block_neon:</div><div class='del'>-.Lneon_entry:</div><div class='del'>-	stp	x29, x30, [sp, #-16]!</div><div class='del'>-	mov	x29, sp</div><div class='del'>-	sub	sp,sp,#16*4</div><div class='del'>-</div><div class='del'>-	adr	$Ktbl,.LK256</div><div class='del'>-	add	$num,$inp,$num,lsl#6	// len to point at the end of inp</div><div class='del'>-</div><div class='del'>-	ld1.8	{@X[0]},[$inp], #16</div><div class='del'>-	ld1.8	{@X[1]},[$inp], #16</div><div class='del'>-	ld1.8	{@X[2]},[$inp], #16</div><div class='del'>-	ld1.8	{@X[3]},[$inp], #16</div><div class='del'>-	ld1.32	{$T0},[$Ktbl], #16</div><div class='del'>-	ld1.32	{$T1},[$Ktbl], #16</div><div class='del'>-	ld1.32	{$T2},[$Ktbl], #16</div><div class='del'>-	ld1.32	{$T3},[$Ktbl], #16</div><div class='del'>-	rev32	@X[0],@X[0]		// yes, even on</div><div class='del'>-	rev32	@X[1],@X[1]		// big-endian</div><div class='del'>-	rev32	@X[2],@X[2]</div><div class='del'>-	rev32	@X[3],@X[3]</div><div class='del'>-	mov	$Xfer,sp</div><div class='del'>-	add.32	$T0,$T0,@X[0]</div><div class='del'>-	add.32	$T1,$T1,@X[1]</div><div class='del'>-	add.32	$T2,$T2,@X[2]</div><div class='del'>-	st1.32	{$T0-$T1},[$Xfer], #32</div><div class='del'>-	add.32	$T3,$T3,@X[3]</div><div class='del'>-	st1.32	{$T2-$T3},[$Xfer]</div><div class='del'>-	sub	$Xfer,$Xfer,#32</div><div class='del'>-</div><div class='del'>-	ldp	$A,$B,[$ctx]</div><div class='del'>-	ldp	$C,$D,[$ctx,#8]</div><div class='del'>-	ldp	$E,$F,[$ctx,#16]</div><div class='del'>-	ldp	$G,$H,[$ctx,#24]</div><div class='del'>-	ldr	$t1,[sp,#0]</div><div class='del'>-	mov	$t2,wzr</div><div class='del'>-	eor	$t3,$B,$C</div><div class='del'>-	mov	$t4,wzr</div><div class='del'>-	b	.L_00_48</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.L_00_48:</div><div class='del'>-___</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-	&amp;Xupdate(\&amp;body_00_15);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	cmp	$t1,#0				// check for K256 terminator</div><div class='del'>-	ldr	$t1,[sp,#0]</div><div class='del'>-	sub	$Xfer,$Xfer,#64</div><div class='del'>-	bne	.L_00_48</div><div class='del'>-</div><div class='del'>-	sub	$Ktbl,$Ktbl,#256		// rewind $Ktbl</div><div class='del'>-	cmp	$inp,$num</div><div class='del'>-	mov	$Xfer, #64</div><div class='del'>-	csel	$Xfer, $Xfer, xzr, eq</div><div class='del'>-	sub	$inp,$inp,$Xfer			// avoid SEGV</div><div class='del'>-	mov	$Xfer,sp</div><div class='del'>-___</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-	&amp;Xpreload(\&amp;body_00_15);</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	add	$A,$A,$t4			// h+=Sigma0(a) from the past</div><div class='del'>-	ldp	$t0,$t1,[$ctx,#0]</div><div class='del'>-	add	$A,$A,$t2			// h+=Maj(a,b,c) from the past</div><div class='del'>-	ldp	$t2,$t3,[$ctx,#8]</div><div class='del'>-	add	$A,$A,$t0			// accumulate</div><div class='del'>-	add	$B,$B,$t1</div><div class='del'>-	ldp	$t0,$t1,[$ctx,#16]</div><div class='del'>-	add	$C,$C,$t2</div><div class='del'>-	add	$D,$D,$t3</div><div class='del'>-	ldp	$t2,$t3,[$ctx,#24]</div><div class='del'>-	add	$E,$E,$t0</div><div class='del'>-	add	$F,$F,$t1</div><div class='del'>-	 ldr	$t1,[sp,#0]</div><div class='del'>-	stp	$A,$B,[$ctx,#0]</div><div class='del'>-	add	$G,$G,$t2</div><div class='del'>-	 mov	$t2,wzr</div><div class='del'>-	stp	$C,$D,[$ctx,#8]</div><div class='del'>-	add	$H,$H,$t3</div><div class='del'>-	stp	$E,$F,[$ctx,#16]</div><div class='del'>-	 eor	$t3,$B,$C</div><div class='del'>-	stp	$G,$H,[$ctx,#24]</div><div class='del'>-	 mov	$t4,wzr</div><div class='del'>-	 mov	$Xfer,sp</div><div class='del'>-	b.ne	.L_00_48</div><div class='del'>-</div><div class='del'>-	ldr	x29,[x29]</div><div class='del'>-	add	sp,sp,#16*4+16</div><div class='del'>-	ret</div><div class='del'>-.size	sha256_block_neon,.-sha256_block_neon</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#ifndef	__KERNEL__</div><div class='del'>-.comm	OPENSSL_armcap_P,4,4</div><div class='del'>-#endif</div><div class='del'>-___</div><div class='del'>-</div><div class='del'>-{   my  %opcode = (</div><div class='del'>-	"sha256h"	=&gt; 0x5e004000,	"sha256h2"	=&gt; 0x5e005000,</div><div class='del'>-	"sha256su0"	=&gt; 0x5e282800,	"sha256su1"	=&gt; 0x5e006000	);</div><div class='del'>-</div><div class='del'>-    sub unsha256 {</div><div class='del'>-	my ($mnemonic,$arg)=@_;</div><div class='del'>-</div><div class='del'>-	$arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o</div><div class='del'>-	&amp;&amp;</div><div class='del'>-	sprintf ".inst\t0x%08x\t//%s %s",</div><div class='del'>-			$opcode{$mnemonic}|$1|($2&lt;&lt;5)|($3&lt;&lt;16),</div><div class='del'>-			$mnemonic,$arg;</div><div class='del'>-    }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-open SELF,$0;</div><div class='del'>-while(&lt;SELF&gt;) {</div><div class='del'>-        next if (/^#!/);</div><div class='del'>-        last if (!s/^#/\/\// and !/^$/);</div><div class='del'>-        print;</div><div class='del'>-}</div><div class='del'>-close SELF;</div><div class='del'>-</div><div class='del'>-foreach(split("\n",$code)) {</div><div class='del'>-</div><div class='del'>-	s/\`([^\`]*)\`/eval($1)/ge;</div><div class='del'>-</div><div class='del'>-	s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge;</div><div class='del'>-</div><div class='del'>-	s/\bq([0-9]+)\b/v$1.16b/g;		# old-&gt;new registers</div><div class='del'>-</div><div class='del'>-	s/\.[ui]?8(\s)/$1/;</div><div class='del'>-	s/\.\w?32\b//		and s/\.16b/\.4s/g;</div><div class='del'>-	m/(ld|st)1[^\[]+\[0\]/	and s/\.4s/\.s/g;</div><div class='del'>-</div><div class='del'>-	print $_,"\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-close STDOUT;</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-ce-core.S b/arch/arm64/crypto/sha512-ce-core.S<br/>deleted file mode 100644<br/>index 91ef68b15fcc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha512-ce-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-ce-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,206 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/*</div><div class='del'>- * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2018 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.irp		b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19</div><div class='del'>-	.set		.Lq\b, \b</div><div class='del'>-	.set		.Lv\b\().2d, \b</div><div class='del'>-	.endr</div><div class='del'>-</div><div class='del'>-	.macro		sha512h, rd, rn, rm</div><div class='del'>-	.inst		0xce608000 | .L\rd | (.L\rn &lt;&lt; 5) | (.L\rm &lt;&lt; 16)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		sha512h2, rd, rn, rm</div><div class='del'>-	.inst		0xce608400 | .L\rd | (.L\rn &lt;&lt; 5) | (.L\rm &lt;&lt; 16)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		sha512su0, rd, rn</div><div class='del'>-	.inst		0xcec08000 | .L\rd | (.L\rn &lt;&lt; 5)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		sha512su1, rd, rn, rm</div><div class='del'>-	.inst		0xce608800 | .L\rd | (.L\rn &lt;&lt; 5) | (.L\rm &lt;&lt; 16)</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The SHA-512 round constants</div><div class='del'>-	 */</div><div class='del'>-	.section	".rodata", "a"</div><div class='del'>-	.align		4</div><div class='del'>-.Lsha512_rcon:</div><div class='del'>-	.quad		0x428a2f98d728ae22, 0x7137449123ef65cd</div><div class='del'>-	.quad		0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc</div><div class='del'>-	.quad		0x3956c25bf348b538, 0x59f111f1b605d019</div><div class='del'>-	.quad		0x923f82a4af194f9b, 0xab1c5ed5da6d8118</div><div class='del'>-	.quad		0xd807aa98a3030242, 0x12835b0145706fbe</div><div class='del'>-	.quad		0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2</div><div class='del'>-	.quad		0x72be5d74f27b896f, 0x80deb1fe3b1696b1</div><div class='del'>-	.quad		0x9bdc06a725c71235, 0xc19bf174cf692694</div><div class='del'>-	.quad		0xe49b69c19ef14ad2, 0xefbe4786384f25e3</div><div class='del'>-	.quad		0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65</div><div class='del'>-	.quad		0x2de92c6f592b0275, 0x4a7484aa6ea6e483</div><div class='del'>-	.quad		0x5cb0a9dcbd41fbd4, 0x76f988da831153b5</div><div class='del'>-	.quad		0x983e5152ee66dfab, 0xa831c66d2db43210</div><div class='del'>-	.quad		0xb00327c898fb213f, 0xbf597fc7beef0ee4</div><div class='del'>-	.quad		0xc6e00bf33da88fc2, 0xd5a79147930aa725</div><div class='del'>-	.quad		0x06ca6351e003826f, 0x142929670a0e6e70</div><div class='del'>-	.quad		0x27b70a8546d22ffc, 0x2e1b21385c26c926</div><div class='del'>-	.quad		0x4d2c6dfc5ac42aed, 0x53380d139d95b3df</div><div class='del'>-	.quad		0x650a73548baf63de, 0x766a0abb3c77b2a8</div><div class='del'>-	.quad		0x81c2c92e47edaee6, 0x92722c851482353b</div><div class='del'>-	.quad		0xa2bfe8a14cf10364, 0xa81a664bbc423001</div><div class='del'>-	.quad		0xc24b8b70d0f89791, 0xc76c51a30654be30</div><div class='del'>-	.quad		0xd192e819d6ef5218, 0xd69906245565a910</div><div class='del'>-	.quad		0xf40e35855771202a, 0x106aa07032bbd1b8</div><div class='del'>-	.quad		0x19a4c116b8d2d0c8, 0x1e376c085141ab53</div><div class='del'>-	.quad		0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8</div><div class='del'>-	.quad		0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb</div><div class='del'>-	.quad		0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3</div><div class='del'>-	.quad		0x748f82ee5defb2fc, 0x78a5636f43172f60</div><div class='del'>-	.quad		0x84c87814a1f0ab72, 0x8cc702081a6439ec</div><div class='del'>-	.quad		0x90befffa23631e28, 0xa4506cebde82bde9</div><div class='del'>-	.quad		0xbef9a3f7b2c67915, 0xc67178f2e372532b</div><div class='del'>-	.quad		0xca273eceea26619c, 0xd186b8c721c0c207</div><div class='del'>-	.quad		0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178</div><div class='del'>-	.quad		0x06f067aa72176fba, 0x0a637dc5a2c898a6</div><div class='del'>-	.quad		0x113f9804bef90dae, 0x1b710b35131c471b</div><div class='del'>-	.quad		0x28db77f523047d84, 0x32caab7b40c72493</div><div class='del'>-	.quad		0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c</div><div class='del'>-	.quad		0x4cc5d4becb3e42b6, 0x597f299cfc657e2a</div><div class='del'>-	.quad		0x5fcb6fab3ad6faec, 0x6c44198c4a475817</div><div class='del'>-</div><div class='del'>-	.macro		dround, i0, i1, i2, i3, i4, rc0, rc1, in0, in1, in2, in3, in4</div><div class='del'>-	.ifnb		\rc1</div><div class='del'>-	ld1		{v\rc1\().2d}, [x4], #16</div><div class='del'>-	.endif</div><div class='del'>-	add		v5.2d, v\rc0\().2d, v\in0\().2d</div><div class='del'>-	ext		v6.16b, v\i2\().16b, v\i3\().16b, #8</div><div class='del'>-	ext		v5.16b, v5.16b, v5.16b, #8</div><div class='del'>-	ext		v7.16b, v\i1\().16b, v\i2\().16b, #8</div><div class='del'>-	add		v\i3\().2d, v\i3\().2d, v5.2d</div><div class='del'>-	.ifnb		\in1</div><div class='del'>-	ext		v5.16b, v\in3\().16b, v\in4\().16b, #8</div><div class='del'>-	sha512su0	v\in0\().2d, v\in1\().2d</div><div class='del'>-	.endif</div><div class='del'>-	sha512h		q\i3, q6, v7.2d</div><div class='del'>-	.ifnb		\in1</div><div class='del'>-	sha512su1	v\in0\().2d, v\in2\().2d, v5.2d</div><div class='del'>-	.endif</div><div class='del'>-	add		v\i4\().2d, v\i1\().2d, v\i3\().2d</div><div class='del'>-	sha512h2	q\i3, q\i1, v\i0\().2d</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * int __sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-	 *			     int blocks)</div><div class='del'>-	 */</div><div class='del'>-	.text</div><div class='del'>-SYM_FUNC_START(__sha512_ce_transform)</div><div class='del'>-	/* load state */</div><div class='del'>-	ld1		{v8.2d-v11.2d}, [x0]</div><div class='del'>-</div><div class='del'>-	/* load first 4 round constants */</div><div class='del'>-	adr_l		x3, .Lsha512_rcon</div><div class='del'>-	ld1		{v20.2d-v23.2d}, [x3], #64</div><div class='del'>-</div><div class='del'>-	/* load input */</div><div class='del'>-0:	ld1		{v12.2d-v15.2d}, [x1], #64</div><div class='del'>-	ld1		{v16.2d-v19.2d}, [x1], #64</div><div class='del'>-	sub		w2, w2, #1</div><div class='del'>-</div><div class='del'>-CPU_LE(	rev64		v12.16b, v12.16b	)</div><div class='del'>-CPU_LE(	rev64		v13.16b, v13.16b	)</div><div class='del'>-CPU_LE(	rev64		v14.16b, v14.16b	)</div><div class='del'>-CPU_LE(	rev64		v15.16b, v15.16b	)</div><div class='del'>-CPU_LE(	rev64		v16.16b, v16.16b	)</div><div class='del'>-CPU_LE(	rev64		v17.16b, v17.16b	)</div><div class='del'>-CPU_LE(	rev64		v18.16b, v18.16b	)</div><div class='del'>-CPU_LE(	rev64		v19.16b, v19.16b	)</div><div class='del'>-</div><div class='del'>-	mov		x4, x3				// rc pointer</div><div class='del'>-</div><div class='del'>-	mov		v0.16b, v8.16b</div><div class='del'>-	mov		v1.16b, v9.16b</div><div class='del'>-	mov		v2.16b, v10.16b</div><div class='del'>-	mov		v3.16b, v11.16b</div><div class='del'>-</div><div class='del'>-	// v0  ab  cd  --  ef  gh  ab</div><div class='del'>-	// v1  cd  --  ef  gh  ab  cd</div><div class='del'>-	// v2  ef  gh  ab  cd  --  ef</div><div class='del'>-	// v3  gh  ab  cd  --  ef  gh</div><div class='del'>-	// v4  --  ef  gh  ab  cd  --</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 20, 24, 12, 13, 19, 16, 17</div><div class='del'>-	dround		3, 0, 4, 2, 1, 21, 25, 13, 14, 12, 17, 18</div><div class='del'>-	dround		2, 3, 1, 4, 0, 22, 26, 14, 15, 13, 18, 19</div><div class='del'>-	dround		4, 2, 0, 1, 3, 23, 27, 15, 16, 14, 19, 12</div><div class='del'>-	dround		1, 4, 3, 0, 2, 24, 28, 16, 17, 15, 12, 13</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 25, 29, 17, 18, 16, 13, 14</div><div class='del'>-	dround		3, 0, 4, 2, 1, 26, 30, 18, 19, 17, 14, 15</div><div class='del'>-	dround		2, 3, 1, 4, 0, 27, 31, 19, 12, 18, 15, 16</div><div class='del'>-	dround		4, 2, 0, 1, 3, 28, 24, 12, 13, 19, 16, 17</div><div class='del'>-	dround		1, 4, 3, 0, 2, 29, 25, 13, 14, 12, 17, 18</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 30, 26, 14, 15, 13, 18, 19</div><div class='del'>-	dround		3, 0, 4, 2, 1, 31, 27, 15, 16, 14, 19, 12</div><div class='del'>-	dround		2, 3, 1, 4, 0, 24, 28, 16, 17, 15, 12, 13</div><div class='del'>-	dround		4, 2, 0, 1, 3, 25, 29, 17, 18, 16, 13, 14</div><div class='del'>-	dround		1, 4, 3, 0, 2, 26, 30, 18, 19, 17, 14, 15</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 27, 31, 19, 12, 18, 15, 16</div><div class='del'>-	dround		3, 0, 4, 2, 1, 28, 24, 12, 13, 19, 16, 17</div><div class='del'>-	dround		2, 3, 1, 4, 0, 29, 25, 13, 14, 12, 17, 18</div><div class='del'>-	dround		4, 2, 0, 1, 3, 30, 26, 14, 15, 13, 18, 19</div><div class='del'>-	dround		1, 4, 3, 0, 2, 31, 27, 15, 16, 14, 19, 12</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 24, 28, 16, 17, 15, 12, 13</div><div class='del'>-	dround		3, 0, 4, 2, 1, 25, 29, 17, 18, 16, 13, 14</div><div class='del'>-	dround		2, 3, 1, 4, 0, 26, 30, 18, 19, 17, 14, 15</div><div class='del'>-	dround		4, 2, 0, 1, 3, 27, 31, 19, 12, 18, 15, 16</div><div class='del'>-	dround		1, 4, 3, 0, 2, 28, 24, 12, 13, 19, 16, 17</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 29, 25, 13, 14, 12, 17, 18</div><div class='del'>-	dround		3, 0, 4, 2, 1, 30, 26, 14, 15, 13, 18, 19</div><div class='del'>-	dround		2, 3, 1, 4, 0, 31, 27, 15, 16, 14, 19, 12</div><div class='del'>-	dround		4, 2, 0, 1, 3, 24, 28, 16, 17, 15, 12, 13</div><div class='del'>-	dround		1, 4, 3, 0, 2, 25, 29, 17, 18, 16, 13, 14</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 26, 30, 18, 19, 17, 14, 15</div><div class='del'>-	dround		3, 0, 4, 2, 1, 27, 31, 19, 12, 18, 15, 16</div><div class='del'>-	dround		2, 3, 1, 4, 0, 28, 24, 12</div><div class='del'>-	dround		4, 2, 0, 1, 3, 29, 25, 13</div><div class='del'>-	dround		1, 4, 3, 0, 2, 30, 26, 14</div><div class='del'>-</div><div class='del'>-	dround		0, 1, 2, 3, 4, 31, 27, 15</div><div class='del'>-	dround		3, 0, 4, 2, 1, 24,   , 16</div><div class='del'>-	dround		2, 3, 1, 4, 0, 25,   , 17</div><div class='del'>-	dround		4, 2, 0, 1, 3, 26,   , 18</div><div class='del'>-	dround		1, 4, 3, 0, 2, 27,   , 19</div><div class='del'>-</div><div class='del'>-	/* update state */</div><div class='del'>-	add		v8.2d, v8.2d, v0.2d</div><div class='del'>-	add		v9.2d, v9.2d, v1.2d</div><div class='del'>-	add		v10.2d, v10.2d, v2.2d</div><div class='del'>-	add		v11.2d, v11.2d, v3.2d</div><div class='del'>-</div><div class='del'>-	cond_yield	3f, x4, x5</div><div class='del'>-	/* handled all input blocks? */</div><div class='del'>-	cbnz		w2, 0b</div><div class='del'>-</div><div class='del'>-	/* store new state */</div><div class='del'>-3:	st1		{v8.2d-v11.2d}, [x0]</div><div class='del'>-	mov		w0, w2</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(__sha512_ce_transform)</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-ce-glue.c b/arch/arm64/crypto/sha512-ce-glue.c<br/>deleted file mode 100644<br/>index 071f64293227..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha512-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * sha512-ce-glue.c - SHA-384/SHA-512 using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2018 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-384/SHA-512 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512");</div><div class='del'>-</div><div class='del'>-asmlinkage int __sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				     int blocks);</div><div class='del'>-</div><div class='del'>-asmlinkage void sha512_block_data_order(u64 *digest, u8 const *src, int blocks);</div><div class='del'>-</div><div class='del'>-static void sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				int blocks)</div><div class='del'>-{</div><div class='del'>-	while (blocks) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		rem = __sha512_ce_transform(sst, src, blocks);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		src += (blocks - rem) * SHA512_BLOCK_SIZE;</div><div class='del'>-		blocks = rem;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sha512_arm64_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha512_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len)</div><div class='del'>-{</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_update(desc, data, len, fn);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_update(desc, data, len, fn);</div><div class='del'>-	sha512_base_do_finalize(desc, fn);</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_finalize(desc, fn);</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.init			= sha384_base_init,</div><div class='del'>-	.update			= sha512_ce_update,</div><div class='del'>-	.final			= sha512_ce_final,</div><div class='del'>-	.finup			= sha512_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='del'>-	.base.cra_name		= "sha384",</div><div class='del'>-	.base.cra_driver_name	= "sha384-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.init			= sha512_base_init,</div><div class='del'>-	.update			= sha512_ce_update,</div><div class='del'>-	.final			= sha512_ce_final,</div><div class='del'>-	.finup			= sha512_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='del'>-	.base.cra_name		= "sha512",</div><div class='del'>-	.base.cra_driver_name	= "sha512-ce",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha512_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha512_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA512, sha512_ce_mod_init);</div><div class='del'>-module_exit(sha512_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-glue.c b/arch/arm64/crypto/sha512-glue.c<br/>deleted file mode 100644<br/>index 62f129dea83d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sha512-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sha512-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,90 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Linux/arm64 port of the OpenSSL SHA512 implementation for AArch64</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-384/SHA-512 secure hash for arm64");</div><div class='del'>-MODULE_AUTHOR("Andy Polyakov &lt;appro@openssl.org&gt;");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha512_block_data_order(u64 *digest, const void *data,</div><div class='del'>-					unsigned int num_blks);</div><div class='del'>-EXPORT_SYMBOL(sha512_block_data_order);</div><div class='del'>-</div><div class='del'>-static void sha512_arm64_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha512_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return sha512_base_do_update(desc, data, len, sha512_arm64_transform);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (len)</div><div class='del'>-		sha512_base_do_update(desc, data, len, sha512_arm64_transform);</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_arm64_transform);</div><div class='del'>-</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='del'>-	.init			= sha512_base_init,</div><div class='del'>-	.update			= sha512_update,</div><div class='del'>-	.final			= sha512_final,</div><div class='del'>-	.finup			= sha512_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.base.cra_name		= "sha512",</div><div class='del'>-	.base.cra_driver_name	= "sha512-arm64",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='del'>-	.init			= sha384_base_init,</div><div class='del'>-	.update			= sha512_update,</div><div class='del'>-	.final			= sha512_final,</div><div class='del'>-	.finup			= sha512_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='del'>-	.base.cra_name		= "sha384",</div><div class='del'>-	.base.cra_driver_name	= "sha384-arm64",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA384_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha512_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha512_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha512_mod_init);</div><div class='del'>-module_exit(sha512_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sm3-ce-glue.c b/arch/arm64/crypto/sm3-ce-glue.c<br/>index 1a71788c4cda..eac6f5fa0abe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm3-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm3-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm3-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sm3-ce-glue.c</a></div><div class='hunk'>@@ -6,14 +6,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SM3 secure hash using ARMv8 Crypto Extensions");</div><div class='hunk'>@@ -26,50 +23,20 @@ asmlinkage void sm3_ce_transform(struct sm3_state *sst, u8 const *src,</div><div class='ctx'> static int sm3_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_update(desc, data, len, sm3_ce_transform);</div><div class='add'>+	remain = sm3_base_do_update_blocks(desc, data, len, sm3_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sm3_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sm3_base_finish(desc, out);</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sm3_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_update(sctx, data, len);</div><div class='del'>-		sm3_final(sctx, out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_ce_transform);</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_ce_transform);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -77,11 +44,12 @@ static struct shash_alg sm3_alg = {</div><div class='ctx'> 	.digestsize		= SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sm3_base_init,</div><div class='ctx'> 	.update			= sm3_ce_update,</div><div class='del'>-	.final			= sm3_ce_final,</div><div class='ctx'> 	.finup			= sm3_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sm3_state),</div><div class='add'>+	.descsize		= SM3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sm3",</div><div class='ctx'> 	.base.cra_driver_name	= "sm3-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SM3_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 400,</div><div class='head'>diff --git a/arch/arm64/crypto/sm3-neon-glue.c b/arch/arm64/crypto/sm3-neon-glue.c<br/>index 8dd71ce79b69..6c4611a503a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm3-neon-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm3-neon-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm3-neon-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sm3-neon-glue.c</a></div><div class='hunk'>@@ -6,14 +6,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -23,50 +20,20 @@ asmlinkage void sm3_neon_transform(struct sm3_state *sst, u8 const *src,</div><div class='ctx'> static int sm3_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			   unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_update(desc, data, len, sm3_neon_transform);</div><div class='add'>+	remain = sm3_base_do_update_blocks(desc, data, len, sm3_neon_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sm3_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_neon_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sm3_base_finish(desc, out);</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sm3_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_update(sctx, data, len);</div><div class='del'>-		sm3_final(sctx, out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_neon_transform);</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_neon_transform);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_neon_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,11 +41,12 @@ static struct shash_alg sm3_alg = {</div><div class='ctx'> 	.digestsize		= SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sm3_base_init,</div><div class='ctx'> 	.update			= sm3_neon_update,</div><div class='del'>-	.final			= sm3_neon_final,</div><div class='ctx'> 	.finup			= sm3_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sm3_state),</div><div class='add'>+	.descsize		= SM3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sm3",</div><div class='ctx'> 	.base.cra_driver_name	= "sm3-neon",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SM3_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='head'>diff --git a/arch/arm64/crypto/sm4-ce-ccm-glue.c b/arch/arm64/crypto/sm4-ce-ccm-glue.c<br/>index 5e7e17bbec81..e9cc1c1364ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-ccm-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-ccm-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-ccm-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sm4-ce-ccm-glue.c</a></div><div class='hunk'>@@ -112,17 +112,12 @@ static void ccm_calculate_auth_mac(struct aead_request *req, u8 mac[])</div><div class='ctx'> 	scatterwalk_start(&amp;walk, req-&gt;src);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		u32 n = scatterwalk_clamp(&amp;walk, assoclen);</div><div class='del'>-		u8 *p, *ptr;</div><div class='add'>+		unsigned int n, orig_n;</div><div class='add'>+		const u8 *p;</div><div class='ctx'> </div><div class='del'>-		if (!n) {</div><div class='del'>-			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='del'>-			n = scatterwalk_clamp(&amp;walk, assoclen);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		p = ptr = scatterwalk_map(&amp;walk);</div><div class='del'>-		assoclen -= n;</div><div class='del'>-		scatterwalk_advance(&amp;walk, n);</div><div class='add'>+		orig_n = scatterwalk_next(&amp;walk, assoclen);</div><div class='add'>+		p = walk.addr;</div><div class='add'>+		n = orig_n;</div><div class='ctx'> </div><div class='ctx'> 		while (n &gt; 0) {</div><div class='ctx'> 			unsigned int l, nblocks;</div><div class='hunk'>@@ -136,9 +131,9 @@ static void ccm_calculate_auth_mac(struct aead_request *req, u8 mac[])</div><div class='ctx'> 				} else {</div><div class='ctx'> 					nblocks = n / SM4_BLOCK_SIZE;</div><div class='ctx'> 					sm4_ce_cbcmac_update(ctx-&gt;rkey_enc,</div><div class='del'>-							     mac, ptr, nblocks);</div><div class='add'>+							     mac, p, nblocks);</div><div class='ctx'> </div><div class='del'>-					ptr += nblocks * SM4_BLOCK_SIZE;</div><div class='add'>+					p += nblocks * SM4_BLOCK_SIZE;</div><div class='ctx'> 					n %= SM4_BLOCK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 					continue;</div><div class='hunk'>@@ -147,15 +142,15 @@ static void ccm_calculate_auth_mac(struct aead_request *req, u8 mac[])</div><div class='ctx'> </div><div class='ctx'> 			l = min(n, SM4_BLOCK_SIZE - len);</div><div class='ctx'> 			if (l) {</div><div class='del'>-				crypto_xor(mac + len, ptr, l);</div><div class='add'>+				crypto_xor(mac + len, p, l);</div><div class='ctx'> 				len += l;</div><div class='del'>-				ptr += l;</div><div class='add'>+				p += l;</div><div class='ctx'> 				n -= l;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		scatterwalk_unmap(p);</div><div class='del'>-		scatterwalk_done(&amp;walk, 0, assoclen);</div><div class='add'>+		scatterwalk_done_src(&amp;walk, orig_n);</div><div class='add'>+		assoclen -= orig_n;</div><div class='ctx'> 	} while (assoclen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/crypto/sm4-ce-gcm-glue.c b/arch/arm64/crypto/sm4-ce-gcm-glue.c<br/>index 73bfb6972d3a..c2ea3d5f690b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-gcm-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-gcm-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-gcm-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sm4-ce-gcm-glue.c</a></div><div class='hunk'>@@ -82,20 +82,15 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u8 ghash[])</div><div class='ctx'> 	scatterwalk_start(&amp;walk, req-&gt;src);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		u32 n = scatterwalk_clamp(&amp;walk, assoclen);</div><div class='del'>-		u8 *p, *ptr;</div><div class='add'>+		unsigned int n, orig_n;</div><div class='add'>+		const u8 *p;</div><div class='ctx'> </div><div class='del'>-		if (!n) {</div><div class='del'>-			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='del'>-			n = scatterwalk_clamp(&amp;walk, assoclen);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		p = ptr = scatterwalk_map(&amp;walk);</div><div class='del'>-		assoclen -= n;</div><div class='del'>-		scatterwalk_advance(&amp;walk, n);</div><div class='add'>+		orig_n = scatterwalk_next(&amp;walk, assoclen);</div><div class='add'>+		p = walk.addr;</div><div class='add'>+		n = orig_n;</div><div class='ctx'> </div><div class='ctx'> 		if (n + buflen &lt; GHASH_BLOCK_SIZE) {</div><div class='del'>-			memcpy(&amp;buffer[buflen], ptr, n);</div><div class='add'>+			memcpy(&amp;buffer[buflen], p, n);</div><div class='ctx'> 			buflen += n;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			unsigned int nblocks;</div><div class='hunk'>@@ -103,8 +98,8 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u8 ghash[])</div><div class='ctx'> 			if (buflen) {</div><div class='ctx'> 				unsigned int l = GHASH_BLOCK_SIZE - buflen;</div><div class='ctx'> </div><div class='del'>-				memcpy(&amp;buffer[buflen], ptr, l);</div><div class='del'>-				ptr += l;</div><div class='add'>+				memcpy(&amp;buffer[buflen], p, l);</div><div class='add'>+				p += l;</div><div class='ctx'> 				n -= l;</div><div class='ctx'> </div><div class='ctx'> 				pmull_ghash_update(ctx-&gt;ghash_table, ghash,</div><div class='hunk'>@@ -114,17 +109,17 @@ static void gcm_calculate_auth_mac(struct aead_request *req, u8 ghash[])</div><div class='ctx'> 			nblocks = n / GHASH_BLOCK_SIZE;</div><div class='ctx'> 			if (nblocks) {</div><div class='ctx'> 				pmull_ghash_update(ctx-&gt;ghash_table, ghash,</div><div class='del'>-						   ptr, nblocks);</div><div class='del'>-				ptr += nblocks * GHASH_BLOCK_SIZE;</div><div class='add'>+						   p, nblocks);</div><div class='add'>+				p += nblocks * GHASH_BLOCK_SIZE;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			buflen = n % GHASH_BLOCK_SIZE;</div><div class='ctx'> 			if (buflen)</div><div class='del'>-				memcpy(&amp;buffer[0], ptr, buflen);</div><div class='add'>+				memcpy(&amp;buffer[0], p, buflen);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		scatterwalk_unmap(p);</div><div class='del'>-		scatterwalk_done(&amp;walk, 0, assoclen);</div><div class='add'>+		scatterwalk_done_src(&amp;walk, orig_n);</div><div class='add'>+		assoclen -= orig_n;</div><div class='ctx'> 	} while (assoclen);</div><div class='ctx'> </div><div class='ctx'> 	/* padding with '0' */</div><div class='head'>diff --git a/arch/arm64/crypto/sm4-ce-glue.c b/arch/arm64/crypto/sm4-ce-glue.c<br/>index 43741bed874e..7a60e7b559dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/crypto/sm4-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/crypto/sm4-ce-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/crypto/sm4-ce-glue.c</a></div><div class='hunk'>@@ -8,19 +8,18 @@</div><div class='ctx'>  * Copyright (C) 2022 Tianjia Zhang &lt;tianjia.zhang@linux.alibaba.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;crypto/xts.h&gt;</div><div class='ctx'> #include &lt;crypto/sm4.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define BYTES2BLKS(nbytes)	((nbytes) &gt;&gt; 4)</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +63,6 @@ struct sm4_mac_tfm_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sm4_mac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	u8 digest[SM4_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -591,8 +589,6 @@ static int sm4_mac_init(struct shash_desc *desc)</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	memset(ctx-&gt;digest, 0, SM4_BLOCK_SIZE);</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -601,87 +597,50 @@ static int sm4_mac_update(struct shash_desc *desc, const u8 *p,</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int l, nblocks;</div><div class='del'>-</div><div class='del'>-	if (len == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;len || ctx-&gt;len + len &lt; SM4_BLOCK_SIZE) {</div><div class='del'>-		l = min(len, SM4_BLOCK_SIZE - ctx-&gt;len);</div><div class='del'>-</div><div class='del'>-		crypto_xor(ctx-&gt;digest + ctx-&gt;len, p, l);</div><div class='del'>-		ctx-&gt;len += l;</div><div class='del'>-		len -= l;</div><div class='del'>-		p += l;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp;&amp; (ctx-&gt;len % SM4_BLOCK_SIZE) == 0) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-</div><div class='del'>-		if (len &lt; SM4_BLOCK_SIZE &amp;&amp; ctx-&gt;len == SM4_BLOCK_SIZE) {</div><div class='del'>-			sm4_ce_crypt_block(tctx-&gt;key.rkey_enc,</div><div class='del'>-					   ctx-&gt;digest, ctx-&gt;digest);</div><div class='del'>-			ctx-&gt;len = 0;</div><div class='del'>-		} else {</div><div class='del'>-			nblocks = len / SM4_BLOCK_SIZE;</div><div class='del'>-			len %= SM4_BLOCK_SIZE;</div><div class='add'>+	unsigned int nblocks = len / SM4_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-			sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, p,</div><div class='del'>-					  nblocks, (ctx-&gt;len == SM4_BLOCK_SIZE),</div><div class='del'>-					  (len != 0));</div><div class='del'>-</div><div class='del'>-			p += nblocks * SM4_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (len == 0)</div><div class='del'>-				ctx-&gt;len = SM4_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		if (len) {</div><div class='del'>-			crypto_xor(ctx-&gt;digest, p, len);</div><div class='del'>-			ctx-&gt;len = len;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	len %= SM4_BLOCK_SIZE;</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, p,</div><div class='add'>+			  nblocks, false, true);</div><div class='add'>+	kernel_neon_end();</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sm4_cmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sm4_cmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const u8 *consts = tctx-&gt;consts;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != SM4_BLOCK_SIZE) {</div><div class='del'>-		ctx-&gt;digest[ctx-&gt;len] ^= 0x80;</div><div class='add'>+	crypto_xor(ctx-&gt;digest, src, len);</div><div class='add'>+	if (len != SM4_BLOCK_SIZE) {</div><div class='add'>+		ctx-&gt;digest[len] ^= 0x80;</div><div class='ctx'> 		consts += SM4_BLOCK_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='ctx'> 	sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, consts, 1,</div><div class='ctx'> 			  false, true);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	memcpy(out, ctx-&gt;digest, SM4_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sm4_cbcmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sm4_cbcmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len) {</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(ctx-&gt;digest, src, len);</div><div class='ctx'> 		kernel_neon_begin();</div><div class='ctx'> 		sm4_ce_crypt_block(tctx-&gt;key.rkey_enc, ctx-&gt;digest,</div><div class='ctx'> 				   ctx-&gt;digest);</div><div class='ctx'> 		kernel_neon_end();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	memcpy(out, ctx-&gt;digest, SM4_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -691,6 +650,8 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "cmac(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "cmac-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx)</div><div class='ctx'> 							+ SM4_BLOCK_SIZE * 2,</div><div class='hunk'>@@ -699,7 +660,7 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cmac_final,</div><div class='add'>+		.finup		= sm4_cmac_finup,</div><div class='ctx'> 		.setkey		= sm4_cmac_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -707,6 +668,8 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "xcbc(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "xcbc-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx)</div><div class='ctx'> 							+ SM4_BLOCK_SIZE * 2,</div><div class='hunk'>@@ -715,7 +678,7 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cmac_final,</div><div class='add'>+		.finup		= sm4_cmac_finup,</div><div class='ctx'> 		.setkey		= sm4_xcbc_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -723,14 +686,15 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "cbcmac(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "cbcmac-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_blocksize		= 1,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='add'>+			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='ctx'> 		},</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cbcmac_final,</div><div class='add'>+		.finup		= sm4_cbcmac_finup,</div><div class='ctx'> 		.setkey		= sm4_cbcmac_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/hyperv/hv_core.c b/arch/arm64/hyperv/hv_core.c<br/>index f1ebc025e1df..e33a9e3c366a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/hyperv/hv_core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/hyperv/hv_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/hyperv/hv_core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/hyperv/hv_core.c</a></div><div class='hunk'>@@ -11,11 +11,10 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/hyperv.h&gt;</div><div class='ctx'> #include &lt;linux/arm-smccc.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm-generic/bug.h&gt;</div><div class='del'>-#include &lt;asm/hyperv-tlfs.h&gt;</div><div class='add'>+#include &lt;hyperv/hvhdk.h&gt;</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -55,6 +54,23 @@ u64 hv_do_fast_hypercall8(u16 code, u64 input)</div><div class='ctx'> EXPORT_SYMBOL_GPL(hv_do_fast_hypercall8);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * hv_do_fast_hypercall16 -- Invoke the specified hypercall</div><div class='add'>+ * with arguments in registers instead of physical memory.</div><div class='add'>+ * Avoids the overhead of virt_to_phys for simple hypercalls.</div><div class='add'>+ */</div><div class='add'>+u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res	res;</div><div class='add'>+	u64			control;</div><div class='add'>+</div><div class='add'>+	control = (u64)code | HV_HYPERCALL_FAST_BIT;</div><div class='add'>+</div><div class='add'>+	arm_smccc_1_1_hvc(HV_FUNC_ID, control, input1, input2, &amp;res);</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(hv_do_fast_hypercall16);</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Set a single VP register to a 64-bit value.</div><div class='ctx'>  */</div><div class='ctx'> void hv_set_vpreg(u32 msr, u64 value)</div><div class='head'>diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c<br/>index b1a4de4eee29..4fdc26ade1d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/hyperv/mshyperv.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/hyperv/mshyperv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/hyperv/mshyperv.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/hyperv/mshyperv.c</a></div><div class='hunk'>@@ -26,6 +26,49 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+</div><div class='add'>+static bool __init hyperv_detect_via_acpi(void)</div><div class='add'>+{</div><div class='add'>+	if (acpi_disabled)</div><div class='add'>+		return false;</div><div class='add'>+	/*</div><div class='add'>+	 * Hypervisor ID is only available in ACPI v6+, and the</div><div class='add'>+	 * structure layout was extended in v6 to accommodate that</div><div class='add'>+	 * new field.</div><div class='add'>+	 *</div><div class='add'>+	 * At the very minimum, this check makes sure not to read</div><div class='add'>+	 * past the FADT structure.</div><div class='add'>+	 *</div><div class='add'>+	 * It is also needed to catch running in some unknown</div><div class='add'>+	 * non-Hyper-V environment that has ACPI 5.x or less.</div><div class='add'>+	 * In such a case, it can't be Hyper-V.</div><div class='add'>+	 */</div><div class='add'>+	if (acpi_gbl_FADT.header.revision &lt; 6)</div><div class='add'>+		return false;</div><div class='add'>+	return strncmp((char *)&amp;acpi_gbl_FADT.hypervisor_id, "MsHyperV", 8) == 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static bool __init hyperv_detect_via_acpi(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static bool __init hyperv_detect_via_smccc(void)</div><div class='add'>+{</div><div class='add'>+	uuid_t hyperv_uuid = UUID_INIT(</div><div class='add'>+		0x58ba324d, 0x6447, 0x24cd,</div><div class='add'>+		0x75, 0x6c, 0xef, 0x8e,</div><div class='add'>+		0x24, 0x70, 0x59, 0x16);</div><div class='add'>+</div><div class='add'>+	return arm_smccc_hypervisor_has_uuid(&amp;hyperv_uuid);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int __init hyperv_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -35,13 +78,11 @@ static int __init hyperv_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allow for a kernel built with CONFIG_HYPERV to be running in</div><div class='del'>-	 * a non-Hyper-V environment, including on DT instead of ACPI.</div><div class='add'>+	 * a non-Hyper-V environment.</div><div class='add'>+	 *</div><div class='ctx'> 	 * In such cases, do nothing and return success.</div><div class='ctx'> 	 */</div><div class='del'>-	if (acpi_disabled)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (strncmp((char *)&amp;acpi_gbl_FADT.hypervisor_id, "MsHyperV", 8))</div><div class='add'>+	if (!hyperv_detect_via_acpi() &amp;&amp; !hyperv_detect_via_smccc())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the guest ID */</div><div class='hunk'>@@ -49,18 +90,20 @@ static int __init hyperv_init(void)</div><div class='ctx'> 	hv_set_vpreg(HV_REGISTER_GUEST_OS_ID, guest_id);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the features and hints from Hyper-V */</div><div class='del'>-	hv_get_vpreg_128(HV_REGISTER_FEATURES, &amp;result);</div><div class='add'>+	hv_get_vpreg_128(HV_REGISTER_PRIVILEGES_AND_FEATURES_INFO, &amp;result);</div><div class='ctx'> 	ms_hyperv.features = result.as32.a;</div><div class='ctx'> 	ms_hyperv.priv_high = result.as32.b;</div><div class='ctx'> 	ms_hyperv.misc_features = result.as32.c;</div><div class='ctx'> </div><div class='del'>-	hv_get_vpreg_128(HV_REGISTER_ENLIGHTENMENTS, &amp;result);</div><div class='add'>+	hv_get_vpreg_128(HV_REGISTER_FEATURES_INFO, &amp;result);</div><div class='ctx'> 	ms_hyperv.hints = result.as32.a;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",</div><div class='ctx'> 		ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints,</div><div class='ctx'> 		ms_hyperv.misc_features);</div><div class='ctx'> </div><div class='add'>+	hv_identify_partition_type();</div><div class='add'>+</div><div class='ctx'> 	ret = hv_common_init();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -72,6 +115,12 @@ static int __init hyperv_init(void)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ms_hyperv.priv_high &amp; HV_ACCESS_PARTITION_ID)</div><div class='add'>+		hv_get_partition_id();</div><div class='add'>+	ms_hyperv.vtl = get_vtl();</div><div class='add'>+	if (ms_hyperv.vtl &gt; 0) /* non default VTL */</div><div class='add'>+		pr_info("Linux runs in Hyper-V Virtual Trust Level %d\n", ms_hyperv.vtl);</div><div class='add'>+</div><div class='ctx'> 	ms_hyperv_late_init();</div><div class='ctx'> </div><div class='ctx'> 	hyperv_initialized = true;</div><div class='head'>diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild<br/>index 4e350df9a02d..d2ff8f6c3231 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/Kbuild</a></div><div class='hunk'>@@ -8,6 +8,7 @@ syscall-y += unistd_32.h</div><div class='ctx'> syscall-y += unistd_compat_32.h</div><div class='ctx'> </div><div class='ctx'> generic-y += early_ioremap.h</div><div class='add'>+generic-y += fprobe.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += mmzone.h</div><div class='ctx'> generic-y += qrwlock.h</div><div class='head'>diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h<br/>index a407f9cd549e..c07a58b96329 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/acpi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/acpi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/acpi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/acpi.h</a></div><div class='hunk'>@@ -150,7 +150,7 @@ acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)</div><div class='ctx'> {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline const char *acpi_get_enable_method(int cpu)</div><div class='add'>+static __always_inline const char *acpi_get_enable_method(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (acpi_psci_present())</div><div class='ctx'> 		return "psci";</div><div class='head'>diff --git a/arch/arm64/include/asm/apple_m1_pmu.h b/arch/arm64/include/asm/apple_m1_pmu.h<br/>index 99483b19b99f..02e05d05851f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/apple_m1_pmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/apple_m1_pmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/apple_m1_pmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/apple_m1_pmu.h</a></div><div class='hunk'>@@ -37,6 +37,7 @@</div><div class='ctx'> #define PMCR0_PMI_ENABLE_8_9	GENMASK(45, 44)</div><div class='ctx'> </div><div class='ctx'> #define SYS_IMP_APL_PMCR1_EL1	sys_reg(3, 1, 15, 1, 0)</div><div class='add'>+#define SYS_IMP_APL_PMCR1_EL12	sys_reg(3, 1, 15, 7, 2)</div><div class='ctx'> #define PMCR1_COUNT_A64_EL0_0_7	GENMASK(15, 8)</div><div class='ctx'> #define PMCR1_COUNT_A64_EL1_0_7	GENMASK(23, 16)</div><div class='ctx'> #define PMCR1_COUNT_A64_EL0_8_9	GENMASK(41, 40)</div><div class='head'>diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h<br/>index 468a049bc63b..8a777dec8d88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/arm_pmuv3.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/arm_pmuv3.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/arm_pmuv3.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/arm_pmuv3.h</a></div><div class='hunk'>@@ -152,6 +152,11 @@ static inline void write_pmuserenr(u32 val)</div><div class='ctx'> 	write_sysreg(val, pmuserenr_el0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void write_pmuacr(u64 val)</div><div class='add'>+{</div><div class='add'>+	write_sysreg_s(val, SYS_PMUACR_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u64 read_pmceid0(void)</div><div class='ctx'> {</div><div class='ctx'> 	return read_sysreg(pmceid0_el0);</div><div class='hunk'>@@ -178,4 +183,9 @@ static inline bool is_pmuv3p5(int pmuver)</div><div class='ctx'> 	return pmuver &gt;= ID_AA64DFR0_EL1_PMUVer_V3P5;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_pmuv3p9(int pmuver)</div><div class='add'>+{</div><div class='add'>+	return pmuver &gt;= ID_AA64DFR0_EL1_PMUVer_V3P9;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/asm-bug.h b/arch/arm64/include/asm/asm-bug.h<br/>index 6e73809f6492..a5f13801b784 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-bug.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-bug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-bug.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/asm-bug.h</a></div><div class='hunk'>@@ -21,16 +21,21 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GENERIC_BUG</div><div class='del'>-</div><div class='del'>-#define __BUG_ENTRY(flags) 				\</div><div class='add'>+#define __BUG_ENTRY_START				\</div><div class='ctx'> 		.pushsection __bug_table,"aw";		\</div><div class='ctx'> 		.align 2;				\</div><div class='ctx'> 	14470:	.long 14471f - .;			\</div><div class='del'>-_BUGVERBOSE_LOCATION(__FILE__, __LINE__)		\</div><div class='del'>-		.short flags; 				\</div><div class='add'>+</div><div class='add'>+#define __BUG_ENTRY_END					\</div><div class='ctx'> 		.align 2;				\</div><div class='ctx'> 		.popsection;				\</div><div class='ctx'> 	14471:</div><div class='add'>+</div><div class='add'>+#define __BUG_ENTRY(flags)				\</div><div class='add'>+		__BUG_ENTRY_START			\</div><div class='add'>+_BUGVERBOSE_LOCATION(__FILE__, __LINE__)		\</div><div class='add'>+		.short flags;				\</div><div class='add'>+		__BUG_ENTRY_END</div><div class='ctx'> #else</div><div class='ctx'> #define __BUG_ENTRY(flags)</div><div class='ctx'> #endif</div><div class='hunk'>@@ -41,4 +46,24 @@ _BUGVERBOSE_LOCATION(__FILE__, __LINE__)		\</div><div class='ctx'> </div><div class='ctx'> #define ASM_BUG()	ASM_BUG_FLAGS(0)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEBUG_BUGVERBOSE</div><div class='add'>+#define __BUG_LOCATION_STRING(file, line)		\</div><div class='add'>+		".long " file "- .;"			\</div><div class='add'>+		".short " line ";"</div><div class='add'>+#else</div><div class='add'>+#define __BUG_LOCATION_STRING(file, line)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define __BUG_ENTRY_STRING(file, line, flags)		\</div><div class='add'>+		__stringify(__BUG_ENTRY_START)		\</div><div class='add'>+		__BUG_LOCATION_STRING(file, line)	\</div><div class='add'>+		".short " flags ";"			\</div><div class='add'>+		__stringify(__BUG_ENTRY_END)</div><div class='add'>+</div><div class='add'>+#define ARCH_WARN_ASM(file, line, flags, size)		\</div><div class='add'>+	__BUG_ENTRY_STRING(file, line, flags)		\</div><div class='add'>+	__stringify(brk BUG_BRK_IMM)</div><div class='add'>+</div><div class='add'>+#define ARCH_WARN_REACHABLE</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_ASM_BUG_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/asm-extable.h b/arch/arm64/include/asm/asm-extable.h<br/>index b8a5861dc7b7..292f2687a12e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-extable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-extable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-extable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/asm-extable.h</a></div><div class='hunk'>@@ -9,7 +9,8 @@</div><div class='ctx'> #define EX_TYPE_BPF			1</div><div class='ctx'> #define EX_TYPE_UACCESS_ERR_ZERO	2</div><div class='ctx'> #define EX_TYPE_KACCESS_ERR_ZERO	3</div><div class='del'>-#define EX_TYPE_LOAD_UNALIGNED_ZEROPAD	4</div><div class='add'>+#define EX_TYPE_UACCESS_CPY		4</div><div class='add'>+#define EX_TYPE_LOAD_UNALIGNED_ZEROPAD	5</div><div class='ctx'> </div><div class='ctx'> /* Data fields for EX_TYPE_UACCESS_ERR_ZERO */</div><div class='ctx'> #define EX_DATA_REG_ERR_SHIFT	0</div><div class='hunk'>@@ -23,6 +24,9 @@</div><div class='ctx'> #define EX_DATA_REG_ADDR_SHIFT	5</div><div class='ctx'> #define EX_DATA_REG_ADDR	GENMASK(9, 5)</div><div class='ctx'> </div><div class='add'>+/* Data fields for EX_TYPE_UACCESS_CPY */</div><div class='add'>+#define EX_DATA_UACCESS_WRITE	BIT(0)</div><div class='add'>+</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\</div><div class='hunk'>@@ -69,6 +73,10 @@</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro		_asm_extable_uaccess_cpy, insn, fixup, uaccess_is_write</div><div class='add'>+	__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_UACCESS_CPY, \uaccess_is_write)</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> #else /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='head'>diff --git a/arch/arm64/include/asm/asm-uaccess.h b/arch/arm64/include/asm/asm-uaccess.h<br/>index 5b6efe8abeeb..9148f5a31968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-uaccess.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/asm-uaccess.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/asm-uaccess.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/asm-uaccess.h</a></div><div class='hunk'>@@ -61,6 +61,10 @@ alternative_else_nop_endif</div><div class='ctx'> 9999:	x;					\</div><div class='ctx'> 	_asm_extable_uaccess	9999b, l</div><div class='ctx'> </div><div class='add'>+#define USER_CPY(l, uaccess_is_write, x...)	\</div><div class='add'>+9999:	x;					\</div><div class='add'>+	_asm_extable_uaccess_cpy 9999b, l, uaccess_is_write</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Generate the assembly for LDTR/STTR with exception table entries.</div><div class='ctx'>  * This is complicated as there is no post-increment or pair versions of the</div><div class='head'>diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h<br/>index bc0b0d75acef..23be85d93348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/assembler.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/assembler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/assembler.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/assembler.h</a></div><div class='hunk'>@@ -41,6 +41,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Save/restore interrupts.</div><div class='ctx'>  */</div><div class='add'>+	.macro save_and_disable_daif, flags</div><div class='add'>+	mrs	\flags, daif</div><div class='add'>+	msr	daifset, #0xf</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> 	.macro	save_and_disable_irq, flags</div><div class='ctx'> 	mrs	\flags, daif</div><div class='ctx'> 	msr	daifset, #3</div><div class='hunk'>@@ -53,7 +58,7 @@</div><div class='ctx'> 	.macro	disable_step_tsk, flgs, tmp</div><div class='ctx'> 	tbz	\flgs, #TIF_SINGLESTEP, 9990f</div><div class='ctx'> 	mrs	\tmp, mdscr_el1</div><div class='del'>-	bic	\tmp, \tmp, #DBG_MDSCR_SS</div><div class='add'>+	bic	\tmp, \tmp, #MDSCR_EL1_SS</div><div class='ctx'> 	msr	mdscr_el1, \tmp</div><div class='ctx'> 	isb	// Take effect before a subsequent clear of DAIF.D</div><div class='ctx'> 9990:</div><div class='hunk'>@@ -63,7 +68,7 @@</div><div class='ctx'> 	.macro	enable_step_tsk, flgs, tmp</div><div class='ctx'> 	tbz	\flgs, #TIF_SINGLESTEP, 9990f</div><div class='ctx'> 	mrs	\tmp, mdscr_el1</div><div class='del'>-	orr	\tmp, \tmp, #DBG_MDSCR_SS</div><div class='add'>+	orr	\tmp, \tmp, #MDSCR_EL1_SS</div><div class='ctx'> 	msr	mdscr_el1, \tmp</div><div class='ctx'> 9990:</div><div class='ctx'> 	.endm</div><div class='hunk'>@@ -249,13 +254,6 @@ alternative_endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * vma_vm_mm - get mm pointer from vma pointer (vma-&gt;vm_mm)</div><div class='del'>- */</div><div class='del'>-	.macro	vma_vm_mm, rd, rn</div><div class='del'>-	ldr	\rd, [\rn, #VMA_VM_MM]</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * read_ctr - read CTR_EL0. If the system has mismatched register fields,</div><div class='ctx'>  * provide the system wide safe value from arm64_ftr_reg_ctrel0.sys_val</div><div class='ctx'>  */</div><div class='hunk'>@@ -350,6 +348,11 @@ alternative_cb_end</div><div class='ctx'> 	// Narrow PARange to fit the PS field in TCR_ELx</div><div class='ctx'> 	ubfx	\tmp0, \tmp0, #ID_AA64MMFR0_EL1_PARANGE_SHIFT, #3</div><div class='ctx'> 	mov	\tmp1, #ID_AA64MMFR0_EL1_PARANGE_MAX</div><div class='add'>+#ifdef CONFIG_ARM64_LPA2</div><div class='add'>+alternative_if_not ARM64_HAS_VA52</div><div class='add'>+	mov	\tmp1, #ID_AA64MMFR0_EL1_PARANGE_48</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+#endif</div><div class='ctx'> 	cmp	\tmp0, \tmp1</div><div class='ctx'> 	csel	\tmp0, \tmp1, \tmp0, hi</div><div class='ctx'> 	bfi	\tcr, \tmp0, \pos, #3</div><div class='head'>diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h<br/>index 1ca947d5c939..f5801b0ba9e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/barrier.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/barrier.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/barrier.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/barrier.h</a></div><div class='hunk'>@@ -44,6 +44,9 @@</div><div class='ctx'> 						 SB_BARRIER_INSN"nop\n",	\</div><div class='ctx'> 						 ARM64_HAS_SB))</div><div class='ctx'> </div><div class='add'>+#define gsb_ack()	asm volatile(GSB_ACK_BARRIER_INSN : : : "memory")</div><div class='add'>+#define gsb_sys()	asm volatile(GSB_SYS_BARRIER_INSN : : : "memory")</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARM64_PSEUDO_NMI</div><div class='ctx'> #define pmr_sync()						\</div><div class='ctx'> 	do {							\</div><div class='head'>diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h<br/>index 06a4670bdb0b..09963004ceea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cache.h</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> #define ARCH_DMA_MINALIGN	(128)</div><div class='ctx'> #define ARCH_KMALLOC_MINALIGN	(8)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#if !defined(__ASSEMBLY__) &amp;&amp; !defined(BUILD_VDSO)</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/kasan-enabled.h&gt;</div><div class='hunk'>@@ -87,6 +87,23 @@ int cache_line_size(void);</div><div class='ctx'> </div><div class='ctx'> #define dma_get_cache_alignment	cache_line_size</div><div class='ctx'> </div><div class='add'>+/* Compress a u64 MPIDR value into 32 bits. */</div><div class='add'>+static inline u64 arch_compact_of_hwid(u64 id)</div><div class='add'>+{</div><div class='add'>+	u64 aff3 = MPIDR_AFFINITY_LEVEL(id, 3);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * These bits are expected to be RES0. If not, return a value with</div><div class='add'>+	 * the upper 32 bits set to force the caller to give up on 32 bit</div><div class='add'>+	 * cache ids.</div><div class='add'>+	 */</div><div class='add'>+	if (FIELD_GET(GENMASK_ULL(63, 40), id))</div><div class='add'>+		return id;</div><div class='add'>+</div><div class='add'>+	return (aff3 &lt;&lt; 24) | FIELD_GET(GENMASK_ULL(23, 0), id);</div><div class='add'>+}</div><div class='add'>+#define arch_compact_of_hwid	arch_compact_of_hwid</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Read the effective value of CTR_EL0.</div><div class='ctx'>  *</div><div class='hunk'>@@ -118,6 +135,6 @@ static inline u32 __attribute_const__ read_cpuid_effective_cachetype(void)</div><div class='ctx'> 	return ctr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif /* !defined(__ASSEMBLY__) &amp;&amp; !defined(BUILD_VDSO) */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/cfi.h b/arch/arm64/include/asm/cfi.h<br/>new file mode 100644<br/>index 000000000000..ab90f0351b7a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cfi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cfi.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_ARM64_CFI_H</div><div class='add'>+#define _ASM_ARM64_CFI_H</div><div class='add'>+</div><div class='add'>+#define __bpfcall</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_ARM64_CFI_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h<br/>index 9b73fd0cd721..71493b760b83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cpu.h</a></div><div class='hunk'>@@ -44,8 +44,10 @@ struct cpuinfo_arm64 {</div><div class='ctx'> 	u64		reg_dczid;</div><div class='ctx'> 	u64		reg_midr;</div><div class='ctx'> 	u64		reg_revidr;</div><div class='add'>+	u64		reg_aidr;</div><div class='ctx'> 	u64		reg_gmid;</div><div class='ctx'> 	u64		reg_smidr;</div><div class='add'>+	u64		reg_mpamidr;</div><div class='ctx'> </div><div class='ctx'> 	u64		reg_id_aa64dfr0;</div><div class='ctx'> 	u64		reg_id_aa64dfr1;</div><div class='head'>diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h<br/>index a6e5b07b64fd..9d769291a306 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpucaps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpucaps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpucaps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cpucaps.h</a></div><div class='hunk'>@@ -42,6 +42,12 @@ cpucap_is_possible(const unsigned int cap)</div><div class='ctx'> 		return IS_ENABLED(CONFIG_ARM64_BTI);</div><div class='ctx'> 	case ARM64_HAS_TLB_RANGE:</div><div class='ctx'> 		return IS_ENABLED(CONFIG_ARM64_TLB_RANGE);</div><div class='add'>+	case ARM64_HAS_S1POE:</div><div class='add'>+		return IS_ENABLED(CONFIG_ARM64_POE);</div><div class='add'>+	case ARM64_HAS_GCS:</div><div class='add'>+		return IS_ENABLED(CONFIG_ARM64_GCS);</div><div class='add'>+	case ARM64_HAFT:</div><div class='add'>+		return IS_ENABLED(CONFIG_ARM64_HAFT);</div><div class='ctx'> 	case ARM64_UNMAP_KERNEL_AT_EL0:</div><div class='ctx'> 		return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0);</div><div class='ctx'> 	case ARM64_WORKAROUND_843419:</div><div class='hunk'>@@ -60,6 +66,13 @@ cpucap_is_possible(const unsigned int cap)</div><div class='ctx'> 		return IS_ENABLED(CONFIG_ARM64_WORKAROUND_REPEAT_TLBI);</div><div class='ctx'> 	case ARM64_WORKAROUND_SPECULATIVE_SSBS:</div><div class='ctx'> 		return IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386);</div><div class='add'>+	case ARM64_MPAM:</div><div class='add'>+		/*</div><div class='add'>+		 * KVM MPAM support doesn't rely on the host kernel supporting MPAM.</div><div class='add'>+		*/</div><div class='add'>+		return true;</div><div class='add'>+	case ARM64_HAS_PMUV3:</div><div class='add'>+		return IS_ENABLED(CONFIG_HW_PERF_EVENTS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='head'>diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h<br/>index 3d261cc123c1..e223cbf350e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpufeature.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cpufeature.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cpufeature.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> </div><div class='del'>-#define MAX_CPU_FEATURES	128</div><div class='add'>+#define MAX_CPU_FEATURES	192</div><div class='ctx'> #define cpu_feature(x)		KERNEL_HWCAP_ ## x</div><div class='ctx'> </div><div class='ctx'> #define ARM64_SW_FEATURE_OVERRIDE_NOKASLR	0</div><div class='hunk'>@@ -275,6 +275,14 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;</div><div class='ctx'> #define ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU	((u16)BIT(5))</div><div class='ctx'> /* Panic when a conflict is detected */</div><div class='ctx'> #define ARM64_CPUCAP_PANIC_ON_CONFLICT		((u16)BIT(6))</div><div class='add'>+/*</div><div class='add'>+ * When paired with SCOPE_LOCAL_CPU, all early CPUs must satisfy the</div><div class='add'>+ * condition. This is different from SCOPE_SYSTEM where the check is performed</div><div class='add'>+ * only once at the end of the SMP boot on the sanitised ID registers.</div><div class='add'>+ * SCOPE_SYSTEM is not suitable for cases where the capability depends on</div><div class='add'>+ * properties local to a CPU like MIDR_EL1.</div><div class='add'>+ */</div><div class='add'>+#define ARM64_CPUCAP_MATCH_ALL_EARLY_CPUS	((u16)BIT(7))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CPU errata workarounds that need to be enabled at boot time if one or</div><div class='hunk'>@@ -304,6 +312,16 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;</div><div class='ctx'> 	(ARM64_CPUCAP_SCOPE_LOCAL_CPU		|	\</div><div class='ctx'> 	 ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU	|	\</div><div class='ctx'> 	 ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU)</div><div class='add'>+/*</div><div class='add'>+ * CPU feature detected at boot time and present on all early CPUs. Late CPUs</div><div class='add'>+ * are permitted to have the feature even if it hasn't been enabled, although</div><div class='add'>+ * the feature will not be used by Linux in this case. If all early CPUs have</div><div class='add'>+ * the feature, then every late CPU must have it.</div><div class='add'>+ */</div><div class='add'>+#define ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE		\</div><div class='add'>+	 (ARM64_CPUCAP_SCOPE_LOCAL_CPU		|	\</div><div class='add'>+	  ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU	|	\</div><div class='add'>+	  ARM64_CPUCAP_MATCH_ALL_EARLY_CPUS)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CPU feature detected at boot time, on one or more CPUs. A late CPU</div><div class='hunk'>@@ -391,6 +409,11 @@ static inline int cpucap_default_scope(const struct arm64_cpu_capabilities *cap)</div><div class='ctx'> 	return cap-&gt;type &amp; ARM64_CPUCAP_SCOPE_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool cpucap_match_all_early_cpus(const struct arm64_cpu_capabilities *cap)</div><div class='add'>+{</div><div class='add'>+	return cap-&gt;type &amp; ARM64_CPUCAP_MATCH_ALL_EARLY_CPUS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Generic helper for handling capabilities with multiple (match,enable) pairs</div><div class='ctx'>  * of call backs, sharing the same capability bit.</div><div class='hunk'>@@ -438,6 +461,7 @@ void cpu_set_feature(unsigned int num);</div><div class='ctx'> bool cpu_have_feature(unsigned int num);</div><div class='ctx'> unsigned long cpu_get_elf_hwcap(void);</div><div class='ctx'> unsigned long cpu_get_elf_hwcap2(void);</div><div class='add'>+unsigned long cpu_get_elf_hwcap3(void);</div><div class='ctx'> </div><div class='ctx'> #define cpu_set_named_feature(name) cpu_set_feature(cpu_feature(name))</div><div class='ctx'> #define cpu_have_named_feature(name) cpu_have_feature(cpu_feature(name))</div><div class='hunk'>@@ -524,29 +548,6 @@ cpuid_feature_extract_unsigned_field(u64 features, int field)</div><div class='ctx'> 	return cpuid_feature_extract_unsigned_field_width(features, field, 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Fields that identify the version of the Performance Monitors Extension do</div><div class='del'>- * not follow the standard ID scheme. See ARM DDI 0487E.a page D13-2825,</div><div class='del'>- * "Alternative ID scheme used for the Performance Monitors Extension version".</div><div class='del'>- */</div><div class='del'>-static inline u64 __attribute_const__</div><div class='del'>-cpuid_feature_cap_perfmon_field(u64 features, int field, u64 cap)</div><div class='del'>-{</div><div class='del'>-	u64 val = cpuid_feature_extract_unsigned_field(features, field);</div><div class='del'>-	u64 mask = GENMASK_ULL(field + 3, field);</div><div class='del'>-</div><div class='del'>-	/* Treat IMPLEMENTATION DEFINED functionality as unimplemented */</div><div class='del'>-	if (val == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)</div><div class='del'>-		val = 0;</div><div class='del'>-</div><div class='del'>-	if (val &gt; cap) {</div><div class='del'>-		features &amp;= ~mask;</div><div class='del'>-		features |= (cap &lt;&lt; field) &amp; mask;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return features;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)</div><div class='ctx'> {</div><div class='ctx'> 	return (u64)GENMASK(ftrp-&gt;shift + ftrp-&gt;width - 1, ftrp-&gt;shift);</div><div class='hunk'>@@ -612,6 +613,13 @@ static inline bool id_aa64pfr1_sme(u64 pfr1)</div><div class='ctx'> 	return val &gt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool id_aa64pfr0_mpam(u64 pfr0)</div><div class='add'>+{</div><div class='add'>+	u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT);</div><div class='add'>+</div><div class='add'>+	return val &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool id_aa64pfr1_mte(u64 pfr1)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MTE_SHIFT);</div><div class='hunk'>@@ -663,6 +671,7 @@ static inline bool supports_clearbhb(int scope)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct cpumask *system_32bit_el0_cpumask(void);</div><div class='add'>+const struct cpumask *fallback_32bit_el0_cpumask(void);</div><div class='ctx'> DECLARE_STATIC_KEY_FALSE(arm64_mismatched_32bit_el0);</div><div class='ctx'> </div><div class='ctx'> static inline bool system_supports_32bit_el0(void)</div><div class='hunk'>@@ -834,8 +843,39 @@ static inline bool system_supports_lpa2(void)</div><div class='ctx'> </div><div class='ctx'> static inline bool system_supports_poe(void)</div><div class='ctx'> {</div><div class='del'>-	return IS_ENABLED(CONFIG_ARM64_POE) &amp;&amp;</div><div class='del'>-		alternative_has_cap_unlikely(ARM64_HAS_S1POE);</div><div class='add'>+	return alternative_has_cap_unlikely(ARM64_HAS_S1POE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool system_supports_gcs(void)</div><div class='add'>+{</div><div class='add'>+	return alternative_has_cap_unlikely(ARM64_HAS_GCS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool system_supports_haft(void)</div><div class='add'>+{</div><div class='add'>+	return cpus_have_final_cap(ARM64_HAFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool system_supports_mpam(void)</div><div class='add'>+{</div><div class='add'>+	return alternative_has_cap_unlikely(ARM64_MPAM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool system_supports_mpam_hcr(void)</div><div class='add'>+{</div><div class='add'>+	return alternative_has_cap_unlikely(ARM64_MPAM_HCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool system_supports_pmuv3(void)</div><div class='add'>+{</div><div class='add'>+	return cpus_have_final_cap(ARM64_HAS_PMUV3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cpu_supports_bbml2_noabort(void);</div><div class='add'>+</div><div class='add'>+static inline bool system_supports_bbml2_noabort(void)</div><div class='add'>+{</div><div class='add'>+	return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt);</div><div class='head'>diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h<br/>index 488f8e751349..9b00b75acbf2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cputype.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/cputype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/cputype.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/cputype.h</a></div><div class='hunk'>@@ -75,6 +75,7 @@</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A76		0xD0B</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_N1	0xD0C</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A77		0xD0D</div><div class='add'>+#define ARM_CPU_PART_CORTEX_A76AE	0xD0E</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_V1	0xD40</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78		0xD41</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78AE	0xD42</div><div class='hunk'>@@ -91,9 +92,11 @@</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_V2	0xD4F</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A720	0xD81</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X4		0xD82</div><div class='add'>+#define ARM_CPU_PART_NEOVERSE_V3AE	0xD83</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_V3	0xD84</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X925	0xD85</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A725	0xD87</div><div class='add'>+#define ARM_CPU_PART_CORTEX_A720AE	0xD89</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_N3	0xD8E</div><div class='ctx'> </div><div class='ctx'> #define APM_CPU_PART_XGENE		0x000</div><div class='hunk'>@@ -119,16 +122,21 @@</div><div class='ctx'> #define QCOM_CPU_PART_KRYO		0x200</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_2XX_GOLD	0x800</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_2XX_SILVER	0x801</div><div class='add'>+#define QCOM_CPU_PART_KRYO_3XX_GOLD	0x802</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_3XX_SILVER	0x803</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_4XX_GOLD	0x804</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_4XX_SILVER	0x805</div><div class='add'>+#define QCOM_CPU_PART_ORYON_X1		0x001</div><div class='ctx'> </div><div class='ctx'> #define NVIDIA_CPU_PART_DENVER		0x003</div><div class='ctx'> #define NVIDIA_CPU_PART_CARMEL		0x004</div><div class='add'>+#define NVIDIA_CPU_PART_OLYMPUS		0x010</div><div class='ctx'> </div><div class='ctx'> #define FUJITSU_CPU_PART_A64FX		0x001</div><div class='ctx'> </div><div class='ctx'> #define HISI_CPU_PART_TSV110		0xD01</div><div class='add'>+#define HISI_CPU_PART_HIP09			0xD02</div><div class='add'>+#define HISI_CPU_PART_HIP12		0xD06</div><div class='ctx'> </div><div class='ctx'> #define APPLE_CPU_PART_M1_ICESTORM	0x022</div><div class='ctx'> #define APPLE_CPU_PART_M1_FIRESTORM	0x023</div><div class='hunk'>@@ -158,6 +166,7 @@</div><div class='ctx'> #define MIDR_CORTEX_A76	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)</div><div class='ctx'> #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)</div><div class='ctx'> #define MIDR_CORTEX_A77	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)</div><div class='add'>+#define MIDR_CORTEX_A76AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76AE)</div><div class='ctx'> #define MIDR_NEOVERSE_V1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)</div><div class='ctx'> #define MIDR_CORTEX_A78	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)</div><div class='ctx'> #define MIDR_CORTEX_A78AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)</div><div class='hunk'>@@ -174,9 +183,11 @@</div><div class='ctx'> #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)</div><div class='ctx'> #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720)</div><div class='ctx'> #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)</div><div class='add'>+#define MIDR_NEOVERSE_V3AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3AE)</div><div class='ctx'> #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)</div><div class='ctx'> #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)</div><div class='ctx'> #define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)</div><div class='add'>+#define MIDR_CORTEX_A720AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720AE)</div><div class='ctx'> #define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)</div><div class='ctx'> #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)</div><div class='ctx'> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)</div><div class='hunk'>@@ -195,13 +206,28 @@</div><div class='ctx'> #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)</div><div class='ctx'> #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER)</div><div class='add'>+#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)</div><div class='ctx'> #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)</div><div class='add'>+#define MIDR_QCOM_ORYON_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_ORYON_X1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * NOTES:</div><div class='add'>+ * - Qualcomm Kryo 5XX Prime / Gold ID themselves as MIDR_CORTEX_A77</div><div class='add'>+ * - Qualcomm Kryo 5XX Silver IDs itself as MIDR_QCOM_KRYO_4XX_SILVER</div><div class='add'>+ * - Qualcomm Kryo 6XX Prime IDs itself as MIDR_CORTEX_X1</div><div class='add'>+ * - Qualcomm Kryo 6XX Gold IDs itself as ARM_CPU_PART_CORTEX_A78</div><div class='add'>+ * - Qualcomm Kryo 6XX Silver IDs itself as MIDR_CORTEX_A55</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> #define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)</div><div class='ctx'> #define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)</div><div class='add'>+#define MIDR_NVIDIA_OLYMPUS MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_OLYMPUS)</div><div class='ctx'> #define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)</div><div class='ctx'> #define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)</div><div class='add'>+#define MIDR_HISI_HIP09 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP09)</div><div class='add'>+#define MIDR_HISI_HIP12 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP12)</div><div class='ctx'> #define MIDR_APPLE_M1_ICESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM)</div><div class='ctx'> #define MIDR_APPLE_M1_FIRESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM)</div><div class='ctx'> #define MIDR_APPLE_M1_ICESTORM_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_PRO)</div><div class='hunk'>@@ -230,6 +256,16 @@</div><div class='ctx'> #define read_cpuid(reg)			read_sysreg_s(SYS_ ## reg)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * The CPU ID never changes at run time, so we might as well tell the</div><div class='add'>+ * compiler that it's constant.  Use this function to read the CPU ID</div><div class='add'>+ * rather than directly reading processor_id or read_cpuid() directly.</div><div class='add'>+ */</div><div class='add'>+static inline u32 __attribute_const__ read_cpuid_id(void)</div><div class='add'>+{</div><div class='add'>+	return read_cpuid(MIDR_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Represent a range of MIDR values for a given CPU model and a</div><div class='ctx'>  * range of variant/revision values.</div><div class='ctx'>  *</div><div class='hunk'>@@ -264,30 +300,14 @@ static inline bool midr_is_cpu_model_range(u32 midr, u32 model, u32 rv_min,</div><div class='ctx'> 	return _model == model &amp;&amp; rv &gt;= rv_min &amp;&amp; rv &lt;= rv_max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool is_midr_in_range(u32 midr, struct midr_range const *range)</div><div class='del'>-{</div><div class='del'>-	return midr_is_cpu_model_range(midr, range-&gt;model,</div><div class='del'>-				       range-&gt;rv_min, range-&gt;rv_max);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool</div><div class='del'>-is_midr_in_range_list(u32 midr, struct midr_range const *ranges)</div><div class='del'>-{</div><div class='del'>-	while (ranges-&gt;model)</div><div class='del'>-		if (is_midr_in_range(midr, ranges++))</div><div class='del'>-			return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='add'>+struct target_impl_cpu {</div><div class='add'>+	u64 midr;</div><div class='add'>+	u64 revidr;</div><div class='add'>+	u64 aidr;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The CPU ID never changes at run time, so we might as well tell the</div><div class='del'>- * compiler that it's constant.  Use this function to read the CPU ID</div><div class='del'>- * rather than directly reading processor_id or read_cpuid() directly.</div><div class='del'>- */</div><div class='del'>-static inline u32 __attribute_const__ read_cpuid_id(void)</div><div class='del'>-{</div><div class='del'>-	return read_cpuid(MIDR_EL1);</div><div class='del'>-}</div><div class='add'>+bool cpu_errata_set_target_impl(u64 num, void *impl_cpus);</div><div class='add'>+bool is_midr_in_range_list(struct midr_range const *ranges);</div><div class='ctx'> </div><div class='ctx'> static inline u64 __attribute_const__ read_cpuid_mpidr(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h<br/>index 55f57dfa8e2f..5fca48009043 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/daifflags.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/daifflags.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/daifflags.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/daifflags.h</a></div><div class='hunk'>@@ -128,11 +128,11 @@ static inline void local_daif_inherit(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = regs-&gt;pstate &amp; DAIF_MASK;</div><div class='ctx'> </div><div class='del'>-	if (interrupts_enabled(regs))</div><div class='add'>+	if (!regs_irqs_disabled(regs))</div><div class='ctx'> 		trace_hardirqs_on();</div><div class='ctx'> </div><div class='ctx'> 	if (system_uses_irq_prio_masking())</div><div class='del'>-		gic_write_pmr(regs-&gt;pmr_save);</div><div class='add'>+		gic_write_pmr(regs-&gt;pmr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can't use local_daif_restore(regs-&gt;pstate) here as</div><div class='head'>diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h<br/>index 13d437bcbf58..f5e3ed2420ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/debug-monitors.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/debug-monitors.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/debug-monitors.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/debug-monitors.h</a></div><div class='hunk'>@@ -13,14 +13,8 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Low-level stepping controls. */</div><div class='del'>-#define DBG_MDSCR_SS		(1 &lt;&lt; 0)</div><div class='ctx'> #define DBG_SPSR_SS		(1 &lt;&lt; 21)</div><div class='ctx'> </div><div class='del'>-/* MDSCR_EL1 enabling bits */</div><div class='del'>-#define DBG_MDSCR_KDE		(1 &lt;&lt; 13)</div><div class='del'>-#define DBG_MDSCR_MDE		(1 &lt;&lt; 15)</div><div class='del'>-#define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)</div><div class='del'>-</div><div class='ctx'> #define	DBG_ESR_EVT(x)		(((x) &gt;&gt; 27) &amp; 0x7)</div><div class='ctx'> </div><div class='ctx'> /* AArch64 */</div><div class='hunk'>@@ -62,30 +56,6 @@ struct task_struct;</div><div class='ctx'> #define DBG_HOOK_HANDLED	0</div><div class='ctx'> #define DBG_HOOK_ERROR		1</div><div class='ctx'> </div><div class='del'>-struct step_hook {</div><div class='del'>-	struct list_head node;</div><div class='del'>-	int (*fn)(struct pt_regs *regs, unsigned long esr);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void register_user_step_hook(struct step_hook *hook);</div><div class='del'>-void unregister_user_step_hook(struct step_hook *hook);</div><div class='del'>-</div><div class='del'>-void register_kernel_step_hook(struct step_hook *hook);</div><div class='del'>-void unregister_kernel_step_hook(struct step_hook *hook);</div><div class='del'>-</div><div class='del'>-struct break_hook {</div><div class='del'>-	struct list_head node;</div><div class='del'>-	int (*fn)(struct pt_regs *regs, unsigned long esr);</div><div class='del'>-	u16 imm;</div><div class='del'>-	u16 mask; /* These bits are ignored when comparing with imm */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void register_user_break_hook(struct break_hook *hook);</div><div class='del'>-void unregister_user_break_hook(struct break_hook *hook);</div><div class='del'>-</div><div class='del'>-void register_kernel_break_hook(struct break_hook *hook);</div><div class='del'>-void unregister_kernel_break_hook(struct break_hook *hook);</div><div class='del'>-</div><div class='ctx'> u8 debug_monitors_arch(void);</div><div class='ctx'> </div><div class='ctx'> enum dbg_active_el {</div><div class='hunk'>@@ -105,19 +75,18 @@ void kernel_enable_single_step(struct pt_regs *regs);</div><div class='ctx'> void kernel_disable_single_step(void);</div><div class='ctx'> int kernel_active_single_step(void);</div><div class='ctx'> void kernel_rewind_single_step(struct pt_regs *regs);</div><div class='add'>+void kernel_fastforward_single_step(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='del'>-int reinstall_suspended_bps(struct pt_regs *regs);</div><div class='add'>+bool try_step_suspended_breakpoints(struct pt_regs *regs);</div><div class='ctx'> #else</div><div class='del'>-static inline int reinstall_suspended_bps(struct pt_regs *regs)</div><div class='add'>+static inline bool try_step_suspended_breakpoints(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-int aarch32_break_handler(struct pt_regs *regs);</div><div class='del'>-</div><div class='del'>-void debug_traps_init(void);</div><div class='add'>+bool try_handle_aarch32_break(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #endif	/* __ASSEMBLY */</div><div class='ctx'> #endif	/* __ASM_DEBUG_MONITORS_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h<br/>index e0ffdf13a18b..b37da3ee8529 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/el2_setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/el2_setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/el2_setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/el2_setup.h</a></div><div class='hunk'>@@ -16,6 +16,32 @@</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip/arm-gic-v3.h&gt;</div><div class='ctx'> </div><div class='add'>+.macro init_el2_hcr	val</div><div class='add'>+	mov_q	x0, \val</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Compliant CPUs advertise their VHE-onlyness with</div><div class='add'>+	 * ID_AA64MMFR4_EL1.E2H0 &lt; 0. On such CPUs HCR_EL2.E2H is RES1, but it</div><div class='add'>+	 * can reset into an UNKNOWN state and might not read as 1 until it has</div><div class='add'>+	 * been initialized explicitly.</div><div class='add'>+	 *</div><div class='add'>+	 * Fruity CPUs seem to have HCR_EL2.E2H set to RAO/WI, but</div><div class='add'>+	 * don't advertise it (they predate this relaxation).</div><div class='add'>+	 *</div><div class='add'>+	 * Initalize HCR_EL2.E2H so that later code can rely upon HCR_EL2.E2H</div><div class='add'>+	 * indicating whether the CPU is running in E2H mode.</div><div class='add'>+	 */</div><div class='add'>+	mrs_s	x1, SYS_ID_AA64MMFR4_EL1</div><div class='add'>+	sbfx	x1, x1, #ID_AA64MMFR4_EL1_E2H0_SHIFT, #ID_AA64MMFR4_EL1_E2H0_WIDTH</div><div class='add'>+	cmp	x1, #0</div><div class='add'>+	b.ge	.LnVHE_\@</div><div class='add'>+</div><div class='add'>+	orr	x0, x0, #HCR_E2H</div><div class='add'>+.LnVHE_\@:</div><div class='add'>+	msr_hcr_el2 x0</div><div class='add'>+	isb</div><div class='add'>+.endm</div><div class='add'>+</div><div class='ctx'> .macro __init_el2_sctlr</div><div class='ctx'> 	mov_q	x0, INIT_SCTLR_EL2_MMU_OFF</div><div class='ctx'> 	msr	sctlr_el2, x0</div><div class='hunk'>@@ -26,7 +52,15 @@</div><div class='ctx'> 	mrs	x0, id_aa64mmfr1_el1</div><div class='ctx'> 	ubfx	x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4</div><div class='ctx'> 	cbz	x0, .Lskip_hcrx_\@</div><div class='del'>-	mov_q	x0, HCRX_HOST_FLAGS</div><div class='add'>+	mov_q	x0, (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM)</div><div class='add'>+</div><div class='add'>+        /* Enable GCS if supported */</div><div class='add'>+	mrs_s	x1, SYS_ID_AA64PFR1_EL1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4</div><div class='add'>+	cbz	x1, .Lset_hcrx_\@</div><div class='add'>+	orr	x0, x0, #HCRX_EL2_GCSEn</div><div class='add'>+</div><div class='add'>+.Lset_hcrx_\@:</div><div class='ctx'> 	msr_s	SYS_HCRX_EL2, x0</div><div class='ctx'> .Lskip_hcrx_\@:</div><div class='ctx'> .endm</div><div class='hunk'>@@ -57,6 +91,14 @@</div><div class='ctx'> 	msr	cntvoff_el2, xzr		// Clear virtual offset</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+/* Branch to skip_label if SPE version is less than given version */</div><div class='add'>+.macro __spe_vers_imp skip_label, version, tmp</div><div class='add'>+    mrs    \tmp, id_aa64dfr0_el1</div><div class='add'>+    ubfx   \tmp, \tmp, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4</div><div class='add'>+    cmp    \tmp, \version</div><div class='add'>+    b.lt   \skip_label</div><div class='add'>+.endm</div><div class='add'>+</div><div class='ctx'> .macro __init_el2_debug</div><div class='ctx'> 	mrs	x1, id_aa64dfr0_el1</div><div class='ctx'> 	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='hunk'>@@ -69,8 +111,7 @@</div><div class='ctx'> 	csel	x2, xzr, x0, eq			// all PMU counters from EL1</div><div class='ctx'> </div><div class='ctx'> 	/* Statistical profiling */</div><div class='del'>-	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4</div><div class='del'>-	cbz	x0, .Lskip_spe_\@		// Skip if SPE not present</div><div class='add'>+	__spe_vers_imp .Lskip_spe_\@, ID_AA64DFR0_EL1_PMSVer_IMP, x0 // Skip if SPE not present</div><div class='ctx'> </div><div class='ctx'> 	mrs_s	x0, SYS_PMBIDR_EL1              // If SPE available at EL2,</div><div class='ctx'> 	and	x0, x0, #(1 &lt;&lt; PMBIDR_EL1_P_SHIFT)</div><div class='hunk'>@@ -79,7 +120,7 @@</div><div class='ctx'> 		      1 &lt;&lt; PMSCR_EL2_PA_SHIFT)</div><div class='ctx'> 	msr_s	SYS_PMSCR_EL2, x0		// addresses and physical counter</div><div class='ctx'> .Lskip_spe_el2_\@:</div><div class='del'>-	mov	x0, #(MDCR_EL2_E2PB_MASK &lt;&lt; MDCR_EL2_E2PB_SHIFT)</div><div class='add'>+	mov	x0, #MDCR_EL2_E2PB_MASK</div><div class='ctx'> 	orr	x2, x2, x0			// If we don't have VHE, then</div><div class='ctx'> 						// use EL1&amp;0 translation.</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +133,7 @@</div><div class='ctx'> 	and	x0, x0, TRBIDR_EL1_P</div><div class='ctx'> 	cbnz	x0, .Lskip_trace_\@		// If TRBE is available at EL2</div><div class='ctx'> </div><div class='del'>-	mov	x0, #(MDCR_EL2_E2TB_MASK &lt;&lt; MDCR_EL2_E2TB_SHIFT)</div><div class='add'>+	mov	x0, #MDCR_EL2_E2TB_MASK</div><div class='ctx'> 	orr	x2, x2, x0			// allow the EL1&amp;0 translation</div><div class='ctx'> 						// to own it.</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +172,50 @@</div><div class='ctx'> .Lskip_gicv3_\@:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+/* GICv5 system register access */</div><div class='add'>+.macro __init_el2_gicv5</div><div class='add'>+	mrs_s	x0, SYS_ID_AA64PFR2_EL1</div><div class='add'>+	ubfx	x0, x0, #ID_AA64PFR2_EL1_GCIE_SHIFT, #4</div><div class='add'>+	cbz	x0, .Lskip_gicv5_\@</div><div class='add'>+</div><div class='add'>+	mov	x0, #(ICH_HFGITR_EL2_GICRCDNMIA		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICRCDIA		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDDI		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDEOI		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDHM		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDRCFG		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDPEND		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDAFF		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDPRI		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDDIS		| \</div><div class='add'>+		      ICH_HFGITR_EL2_GICCDEN)</div><div class='add'>+	msr_s	SYS_ICH_HFGITR_EL2, x0		// Disable instruction traps</div><div class='add'>+	mov_q	x0, (ICH_HFGRTR_EL2_ICC_PPI_ACTIVERn_EL1	| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_PPI_PRIORITYRn_EL1	| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_PPI_PENDRn_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_PPI_ENABLERn_EL1	| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_PPI_HMRn_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_IAFFIDR_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_ICSR_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_PCR_EL1			| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_HPPIR_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_HAPR_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_CR0_EL1			| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_IDRn_EL1		| \</div><div class='add'>+		     ICH_HFGRTR_EL2_ICC_APR_EL1)</div><div class='add'>+	msr_s	SYS_ICH_HFGRTR_EL2, x0		// Disable reg read traps</div><div class='add'>+	mov_q	x0, (ICH_HFGWTR_EL2_ICC_PPI_ACTIVERn_EL1	| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_PPI_PRIORITYRn_EL1	| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_PPI_PENDRn_EL1		| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_PPI_ENABLERn_EL1	| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_ICSR_EL1		| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_PCR_EL1			| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_CR0_EL1			| \</div><div class='add'>+		     ICH_HFGWTR_EL2_ICC_APR_EL1)</div><div class='add'>+	msr_s	SYS_ICH_HFGWTR_EL2, x0		// Disable reg write traps</div><div class='add'>+.Lskip_gicv5_\@:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='ctx'> .macro __init_el2_hstr</div><div class='ctx'> 	msr	hstr_el2, xzr			// Disable CP15 traps to EL2</div><div class='ctx'> .endm</div><div class='hunk'>@@ -146,7 +231,7 @@</div><div class='ctx'> /* Coprocessor traps */</div><div class='ctx'> .macro __init_el2_cptr</div><div class='ctx'> 	__check_hvhe .LnVHE_\@, x1</div><div class='del'>-	mov	x0, #CPACR_ELx_FPEN</div><div class='add'>+	mov	x0, #CPACR_EL1_FPEN</div><div class='ctx'> 	msr	cpacr_el1, x0</div><div class='ctx'> 	b	.Lskip_set_cptr_\@</div><div class='ctx'> .LnVHE_\@:</div><div class='hunk'>@@ -155,6 +240,28 @@</div><div class='ctx'> .Lskip_set_cptr_\@:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Configure BRBE to permit recording cycle counts and branch mispredicts.</div><div class='add'>+ *</div><div class='add'>+ * At any EL, to record cycle counts BRBE requires that both BRBCR_EL2.CC=1 and</div><div class='add'>+ * BRBCR_EL1.CC=1.</div><div class='add'>+ *</div><div class='add'>+ * At any EL, to record branch mispredicts BRBE requires that both</div><div class='add'>+ * BRBCR_EL2.MPRED=1 and BRBCR_EL1.MPRED=1.</div><div class='add'>+ *</div><div class='add'>+ * Set {CC,MPRED} in BRBCR_EL2 in case nVHE mode is used and we are</div><div class='add'>+ * executing in EL1.</div><div class='add'>+ */</div><div class='add'>+.macro __init_el2_brbe</div><div class='add'>+	mrs	x1, id_aa64dfr0_el1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4</div><div class='add'>+	cbz	x1, .Lskip_brbe_\@</div><div class='add'>+</div><div class='add'>+	mov_q	x0, BRBCR_ELx_CC | BRBCR_ELx_MPRED</div><div class='add'>+	msr_s	SYS_BRBCR_EL2, x0</div><div class='add'>+.Lskip_brbe_\@:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='ctx'> /* Disable any fine grained traps */</div><div class='ctx'> .macro __init_el2_fgt</div><div class='ctx'> 	mrs	x1, id_aa64mmfr0_el1</div><div class='hunk'>@@ -162,34 +269,76 @@</div><div class='ctx'> 	cbz	x1, .Lskip_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	mov	x0, xzr</div><div class='del'>-	mrs	x1, id_aa64dfr0_el1</div><div class='del'>-	ubfx	x1, x1, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4</div><div class='del'>-	cmp	x1, #3</div><div class='del'>-	b.lt	.Lskip_spe_fgt_\@</div><div class='add'>+	mov	x2, xzr</div><div class='add'>+	/* If SPEv1p2 is implemented, */</div><div class='add'>+	__spe_vers_imp .Lskip_spe_fgt_\@, #ID_AA64DFR0_EL1_PMSVer_V1P2, x1</div><div class='ctx'> 	/* Disable PMSNEVFR_EL1 read and write traps */</div><div class='del'>-	orr	x0, x0, #(1 &lt;&lt; 62)</div><div class='add'>+	orr	x0, x0, #HDFGRTR_EL2_nPMSNEVFR_EL1_MASK</div><div class='add'>+	orr	x2, x2, #HDFGWTR_EL2_nPMSNEVFR_EL1_MASK</div><div class='ctx'> </div><div class='ctx'> .Lskip_spe_fgt_\@:</div><div class='add'>+	mrs	x1, id_aa64dfr0_el1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4</div><div class='add'>+	cbz	x1, .Lskip_brbe_fgt_\@</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable read traps for the following registers</div><div class='add'>+	 *</div><div class='add'>+	 * [BRBSRC|BRBTGT|RBINF]_EL1</div><div class='add'>+	 * [BRBSRCINJ|BRBTGTINJ|BRBINFINJ|BRBTS]_EL1</div><div class='add'>+	 */</div><div class='add'>+	orr	x0, x0, #HDFGRTR_EL2_nBRBDATA_MASK</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable write traps for the following registers</div><div class='add'>+	 *</div><div class='add'>+	 * [BRBSRCINJ|BRBTGTINJ|BRBINFINJ|BRBTS]_EL1</div><div class='add'>+	 */</div><div class='add'>+	orr	x2, x2, #HDFGWTR_EL2_nBRBDATA_MASK</div><div class='add'>+</div><div class='add'>+	/* Disable read and write traps for [BRBCR|BRBFCR]_EL1 */</div><div class='add'>+	orr	x0, x0, #HDFGRTR_EL2_nBRBCTL_MASK</div><div class='add'>+	orr	x2, x2, #HDFGWTR_EL2_nBRBCTL_MASK</div><div class='add'>+</div><div class='add'>+	/* Disable read traps for BRBIDR_EL1 */</div><div class='add'>+	orr	x0, x0, #HDFGRTR_EL2_nBRBIDR_MASK</div><div class='add'>+</div><div class='add'>+.Lskip_brbe_fgt_\@:</div><div class='add'>+</div><div class='add'>+.Lset_debug_fgt_\@:</div><div class='ctx'> 	msr_s	SYS_HDFGRTR_EL2, x0</div><div class='del'>-	msr_s	SYS_HDFGWTR_EL2, x0</div><div class='add'>+	msr_s	SYS_HDFGWTR_EL2, x2</div><div class='ctx'> </div><div class='ctx'> 	mov	x0, xzr</div><div class='add'>+	mov	x2, xzr</div><div class='add'>+</div><div class='add'>+	mrs	x1, id_aa64dfr0_el1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64DFR0_EL1_BRBE_SHIFT, #4</div><div class='add'>+	cbz	x1, .Lskip_brbe_insn_fgt_\@</div><div class='add'>+</div><div class='add'>+	/* Disable traps for BRBIALL instruction */</div><div class='add'>+	orr	x2, x2, #HFGITR_EL2_nBRBIALL_MASK</div><div class='add'>+</div><div class='add'>+	/* Disable traps for BRBINJ instruction */</div><div class='add'>+	orr	x2, x2, #HFGITR_EL2_nBRBINJ_MASK</div><div class='add'>+</div><div class='add'>+.Lskip_brbe_insn_fgt_\@:</div><div class='ctx'> 	mrs	x1, id_aa64pfr1_el1</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64PFR1_EL1_SME_SHIFT, #4</div><div class='del'>-	cbz	x1, .Lskip_debug_fgt_\@</div><div class='add'>+	cbz	x1, .Lskip_sme_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable nVHE traps of TPIDR2 and SMPRI */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nSMPRI_EL1_MASK</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nTPIDR2_EL0_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nSMPRI_EL1_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nTPIDR2_EL0_MASK</div><div class='ctx'> </div><div class='del'>-.Lskip_debug_fgt_\@:</div><div class='add'>+.Lskip_sme_fgt_\@:</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64MMFR3_EL1</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4</div><div class='ctx'> 	cbz	x1, .Lskip_pie_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable trapping of PIR_EL1 / PIRE0_EL1 */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPIR_EL1</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPIRE0_EL1</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPIR_EL1</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPIRE0_EL1</div><div class='ctx'> </div><div class='ctx'> .Lskip_pie_fgt_\@:</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64MMFR3_EL1</div><div class='hunk'>@@ -197,12 +346,24 @@</div><div class='ctx'> 	cbz	x1, .Lskip_poe_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable trapping of POR_EL0 */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPOR_EL0</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPOR_EL0</div><div class='ctx'> </div><div class='ctx'> .Lskip_poe_fgt_\@:</div><div class='add'>+	/* GCS depends on PIE so we don't check it if PIE is absent */</div><div class='add'>+	mrs_s	x1, SYS_ID_AA64PFR1_EL1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4</div><div class='add'>+	cbz	x1, .Lskip_gce_fgt_\@</div><div class='add'>+</div><div class='add'>+	/* Disable traps of access to GCS registers at EL0 and EL1 */</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nGCS_EL1_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nGCS_EL0_MASK</div><div class='add'>+</div><div class='add'>+.Lskip_gce_fgt_\@:</div><div class='add'>+</div><div class='add'>+.Lset_fgt_\@:</div><div class='ctx'> 	msr_s	SYS_HFGRTR_EL2, x0</div><div class='ctx'> 	msr_s	SYS_HFGWTR_EL2, x0</div><div class='del'>-	msr_s	SYS_HFGITR_EL2, xzr</div><div class='add'>+	msr_s	SYS_HFGITR_EL2, x2</div><div class='ctx'> </div><div class='ctx'> 	mrs	x1, id_aa64pfr0_el1		// AMU traps UNDEF without AMU</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64PFR0_EL1_AMU_SHIFT, #4</div><div class='hunk'>@@ -215,9 +376,39 @@</div><div class='ctx'> .Lskip_fgt_\@:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-.macro __init_el2_nvhe_prepare_eret</div><div class='del'>-	mov	x0, #INIT_PSTATE_EL1</div><div class='del'>-	msr	spsr_el2, x0</div><div class='add'>+.macro __init_el2_fgt2</div><div class='add'>+	mrs	x1, id_aa64mmfr0_el1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64MMFR0_EL1_FGT_SHIFT, #4</div><div class='add'>+	cmp	x1, #ID_AA64MMFR0_EL1_FGT_FGT2</div><div class='add'>+	b.lt	.Lskip_fgt2_\@</div><div class='add'>+</div><div class='add'>+	mov	x0, xzr</div><div class='add'>+	mrs	x1, id_aa64dfr0_el1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4</div><div class='add'>+	cmp	x1, #ID_AA64DFR0_EL1_PMUVer_V3P9</div><div class='add'>+	b.lt	.Lskip_pmuv3p9_\@</div><div class='add'>+</div><div class='add'>+	orr	x0, x0, #HDFGRTR2_EL2_nPMICNTR_EL0</div><div class='add'>+	orr	x0, x0, #HDFGRTR2_EL2_nPMICFILTR_EL0</div><div class='add'>+	orr	x0, x0, #HDFGRTR2_EL2_nPMUACR_EL1</div><div class='add'>+.Lskip_pmuv3p9_\@:</div><div class='add'>+	/* If SPE is implemented, */</div><div class='add'>+	__spe_vers_imp .Lskip_spefds_\@, ID_AA64DFR0_EL1_PMSVer_IMP, x1</div><div class='add'>+	/* we can read PMSIDR and */</div><div class='add'>+	mrs_s	x1, SYS_PMSIDR_EL1</div><div class='add'>+	and	x1, x1,  #PMSIDR_EL1_FDS</div><div class='add'>+	/* if FEAT_SPE_FDS is implemented, */</div><div class='add'>+	cbz	x1, .Lskip_spefds_\@</div><div class='add'>+	/* disable traps of PMSDSFR to EL2. */</div><div class='add'>+	orr	x0, x0, #HDFGRTR2_EL2_nPMSDSFR_EL1</div><div class='add'>+</div><div class='add'>+.Lskip_spefds_\@:</div><div class='add'>+	msr_s   SYS_HDFGRTR2_EL2, x0</div><div class='add'>+	msr_s   SYS_HDFGWTR2_EL2, x0</div><div class='add'>+	msr_s   SYS_HFGRTR2_EL2, xzr</div><div class='add'>+	msr_s   SYS_HFGWTR2_EL2, xzr</div><div class='add'>+	msr_s   SYS_HFGITR2_EL2, xzr</div><div class='add'>+.Lskip_fgt2_\@:</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -233,13 +424,16 @@</div><div class='ctx'> 	__init_el2_hcrx</div><div class='ctx'> 	__init_el2_timers</div><div class='ctx'> 	__init_el2_debug</div><div class='add'>+	__init_el2_brbe</div><div class='ctx'> 	__init_el2_lor</div><div class='ctx'> 	__init_el2_stage2</div><div class='ctx'> 	__init_el2_gicv3</div><div class='add'>+	__init_el2_gicv5</div><div class='ctx'> 	__init_el2_hstr</div><div class='ctx'> 	__init_el2_nvhe_idregs</div><div class='ctx'> 	__init_el2_cptr</div><div class='ctx'> 	__init_el2_fgt</div><div class='add'>+	__init_el2_fgt2</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #ifndef __KVM_NVHE_HYPERVISOR__</div><div class='hunk'>@@ -281,6 +475,23 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> .macro finalise_el2_state</div><div class='add'>+	check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .Lskip_mpam_\@, x1, x2</div><div class='add'>+</div><div class='add'>+.Linit_mpam_\@:</div><div class='add'>+	msr_s	SYS_MPAM2_EL2, xzr		// use the default partition</div><div class='add'>+						// and disable lower traps</div><div class='add'>+	mrs_s	x0, SYS_MPAMIDR_EL1</div><div class='add'>+	tbz	x0, #MPAMIDR_EL1_HAS_HCR_SHIFT, .Lskip_mpam_\@  // skip if no MPAMHCR reg</div><div class='add'>+	msr_s   SYS_MPAMHCR_EL2, xzr		// clear TRAP_MPAMIDR_EL1 -&gt; EL2</div><div class='add'>+</div><div class='add'>+.Lskip_mpam_\@:</div><div class='add'>+	check_override id_aa64pfr1, ID_AA64PFR1_EL1_GCS_SHIFT, .Linit_gcs_\@, .Lskip_gcs_\@, x1, x2</div><div class='add'>+</div><div class='add'>+.Linit_gcs_\@:</div><div class='add'>+	msr_s	SYS_GCSCR_EL1, xzr</div><div class='add'>+	msr_s	SYS_GCSCRE0_EL1, xzr</div><div class='add'>+</div><div class='add'>+.Lskip_gcs_\@:</div><div class='ctx'> 	check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2</div><div class='ctx'> </div><div class='ctx'> .Linit_sve_\@:	/* SVE register access */</div><div class='hunk'>@@ -288,7 +499,7 @@</div><div class='ctx'> </div><div class='ctx'> 	// (h)VHE case</div><div class='ctx'> 	mrs	x0, cpacr_el1			// Disable SVE traps</div><div class='del'>-	orr	x0, x0, #CPACR_ELx_ZEN</div><div class='add'>+	orr	x0, x0, #CPACR_EL1_ZEN</div><div class='ctx'> 	msr	cpacr_el1, x0</div><div class='ctx'> 	b	.Lskip_set_cptr_\@</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +520,7 @@</div><div class='ctx'> </div><div class='ctx'> 	// (h)VHE case</div><div class='ctx'> 	mrs	x0, cpacr_el1			// Disable SME traps</div><div class='del'>-	orr	x0, x0, #CPACR_ELx_SMEN</div><div class='add'>+	orr	x0, x0, #CPACR_EL1_SMEN</div><div class='ctx'> 	msr	cpacr_el1, x0</div><div class='ctx'> 	b	.Lskip_set_cptr_sme_\@</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm/entry-common.h<br/>new file mode 100644<br/>index 000000000000..cab8cd78f693<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/entry-common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/entry-common.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_ARM64_ENTRY_COMMON_H</div><div class='add'>+#define _ASM_ARM64_ENTRY_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/thread_info.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/daifflags.h&gt;</div><div class='add'>+#include &lt;asm/fpsimd.h&gt;</div><div class='add'>+#include &lt;asm/mte.h&gt;</div><div class='add'>+#include &lt;asm/stacktrace.h&gt;</div><div class='add'>+</div><div class='add'>+#define ARCH_EXIT_TO_USER_MODE_WORK (_TIF_MTE_ASYNC_FAULT | _TIF_FOREIGN_FPSTATE)</div><div class='add'>+</div><div class='add'>+static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *regs,</div><div class='add'>+							unsigned long ti_work)</div><div class='add'>+{</div><div class='add'>+	if (ti_work &amp; _TIF_MTE_ASYNC_FAULT) {</div><div class='add'>+		clear_thread_flag(TIF_MTE_ASYNC_FAULT);</div><div class='add'>+		send_sig_fault(SIGSEGV, SEGV_MTEAERR, (void __user *)NULL, current);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ti_work &amp; _TIF_FOREIGN_FPSTATE)</div><div class='add'>+		fpsimd_restore_current_state();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_exit_to_user_mode_work arch_exit_to_user_mode_work</div><div class='add'>+</div><div class='add'>+static inline bool arch_irqentry_exit_need_resched(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC</div><div class='add'>+	 * priority masking is used the GIC irqchip driver will clear DAIF.IF</div><div class='add'>+	 * using gic_arch_enable_irqs() for normal IRQs. If anything is set in</div><div class='add'>+	 * DAIF we must have handled an NMI, so skip preemption.</div><div class='add'>+	 */</div><div class='add'>+	if (system_uses_irq_prio_masking() &amp;&amp; read_sysreg(daif))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Preempting a task from an IRQ means we leave copies of PSTATE</div><div class='add'>+	 * on the stack. cpufeature's enable calls may modify PSTATE, but</div><div class='add'>+	 * resuming one of these preempted tasks would undo those changes.</div><div class='add'>+	 *</div><div class='add'>+	 * Only allow a task to be preempted once cpufeatures have been</div><div class='add'>+	 * enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!system_capabilities_finalized())</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_irqentry_exit_need_resched arch_irqentry_exit_need_resched</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_ARM64_ENTRY_COMMON_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h<br/>index da6d2c1c0b03..e1deed824464 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/esr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/esr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/esr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/esr.h</a></div><div class='hunk'>@@ -20,7 +20,8 @@</div><div class='ctx'> #define ESR_ELx_EC_FP_ASIMD	UL(0x07)</div><div class='ctx'> #define ESR_ELx_EC_CP10_ID	UL(0x08)	/* EL2 only */</div><div class='ctx'> #define ESR_ELx_EC_PAC		UL(0x09)	/* EL2 and above */</div><div class='del'>-/* Unallocated EC: 0x0A - 0x0B */</div><div class='add'>+#define ESR_ELx_EC_OTHER	UL(0x0A)</div><div class='add'>+/* Unallocated EC: 0x0B */</div><div class='ctx'> #define ESR_ELx_EC_CP14_64	UL(0x0C)</div><div class='ctx'> #define ESR_ELx_EC_BTI		UL(0x0D)</div><div class='ctx'> #define ESR_ELx_EC_ILL		UL(0x0E)</div><div class='hunk'>@@ -51,7 +52,8 @@</div><div class='ctx'> #define ESR_ELx_EC_FP_EXC32	UL(0x28)</div><div class='ctx'> /* Unallocated EC: 0x29 - 0x2B */</div><div class='ctx'> #define ESR_ELx_EC_FP_EXC64	UL(0x2C)</div><div class='del'>-/* Unallocated EC: 0x2D - 0x2E */</div><div class='add'>+#define ESR_ELx_EC_GCS		UL(0x2D)</div><div class='add'>+/* Unallocated EC:  0x2E */</div><div class='ctx'> #define ESR_ELx_EC_SERROR	UL(0x2F)</div><div class='ctx'> #define ESR_ELx_EC_BREAKPT_LOW	UL(0x30)</div><div class='ctx'> #define ESR_ELx_EC_BREAKPT_CUR	UL(0x31)</div><div class='hunk'>@@ -98,6 +100,8 @@</div><div class='ctx'> #define ESR_ELx_AET_CE		(UL(6) &lt;&lt; ESR_ELx_AET_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /* Shared ISS field definitions for Data/Instruction aborts */</div><div class='add'>+#define ESR_ELx_VNCR_SHIFT	(13)</div><div class='add'>+#define ESR_ELx_VNCR		(UL(1) &lt;&lt; ESR_ELx_VNCR_SHIFT)</div><div class='ctx'> #define ESR_ELx_SET_SHIFT	(11)</div><div class='ctx'> #define ESR_ELx_SET_MASK	(UL(3) &lt;&lt; ESR_ELx_SET_SHIFT)</div><div class='ctx'> #define ESR_ELx_FnV_SHIFT	(10)</div><div class='hunk'>@@ -120,6 +124,15 @@</div><div class='ctx'> #define ESR_ELx_FSC_SEA_TTW(n)	(0x14 + (n))</div><div class='ctx'> #define ESR_ELx_FSC_SECC	(0x18)</div><div class='ctx'> #define ESR_ELx_FSC_SECC_TTW(n)	(0x1c + (n))</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ	(0x00)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Annoyingly, the negative levels for Address size faults aren't laid out</div><div class='add'>+ * contiguously (or in the desired order)</div><div class='add'>+ */</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ_nL(n)	((n) == -1 ? 0x25 : 0x2C)</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ_L(n)		((n) &lt; 0 ? ESR_ELx_FSC_ADDRSZ_nL(n) : \</div><div class='add'>+						   (ESR_ELx_FSC_ADDRSZ + (n)))</div><div class='ctx'> </div><div class='ctx'> /* Status codes for individual page table levels */</div><div class='ctx'> #define ESR_ELx_FSC_ACCESS_L(n)	(ESR_ELx_FSC_ACCESS + (n))</div><div class='hunk'>@@ -160,8 +173,6 @@</div><div class='ctx'> #define ESR_ELx_Xs_MASK		(GENMASK_ULL(4, 0))</div><div class='ctx'> </div><div class='ctx'> /* ISS field definitions for exceptions taken in to Hyp */</div><div class='del'>-#define ESR_ELx_FSC_ADDRSZ	(0x00)</div><div class='del'>-#define ESR_ELx_FSC_ADDRSZ_L(n)	(ESR_ELx_FSC_ADDRSZ + (n))</div><div class='ctx'> #define ESR_ELx_CV		(UL(1) &lt;&lt; 24)</div><div class='ctx'> #define ESR_ELx_COND_SHIFT	(20)</div><div class='ctx'> #define ESR_ELx_COND_MASK	(UL(0xF) &lt;&lt; ESR_ELx_COND_SHIFT)</div><div class='hunk'>@@ -173,6 +184,13 @@</div><div class='ctx'> #define ESR_ELx_WFx_ISS_WFE	(UL(1) &lt;&lt; 0)</div><div class='ctx'> #define ESR_ELx_xVC_IMM_MASK	((UL(1) &lt;&lt; 16) - 1)</div><div class='ctx'> </div><div class='add'>+/* ISS definitions for LD64B/ST64B/{T,P}SBCSYNC instructions */</div><div class='add'>+#define ESR_ELx_ISS_OTHER_ST64BV	(0)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_ST64BV0	(1)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_LDST64B	(2)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_TSBCSYNC	(3)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_PSBCSYNC	(4)</div><div class='add'>+</div><div class='ctx'> #define DISR_EL1_IDS		(UL(1) &lt;&lt; 24)</div><div class='ctx'> /*</div><div class='ctx'>  * DISR_EL1 and ESR_ELx share the bottom 13 bits, but the RES0 bits may mean</div><div class='hunk'>@@ -370,12 +388,14 @@</div><div class='ctx'> /*</div><div class='ctx'>  * ISS values for SME traps</div><div class='ctx'>  */</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_MASK		GENMASK(2, 0)</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC(esr)		((esr) &amp; ESR_ELx_SME_ISS_SMTC_MASK)</div><div class='ctx'> </div><div class='del'>-#define ESR_ELx_SME_ISS_SME_DISABLED	0</div><div class='del'>-#define ESR_ELx_SME_ISS_ILL		1</div><div class='del'>-#define ESR_ELx_SME_ISS_SM_DISABLED	2</div><div class='del'>-#define ESR_ELx_SME_ISS_ZA_DISABLED	3</div><div class='del'>-#define ESR_ELx_SME_ISS_ZT_DISABLED	4</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_SME_DISABLED	0</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ILL		1</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_SM_DISABLED	2</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ZA_DISABLED	3</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ZT_DISABLED	4</div><div class='ctx'> </div><div class='ctx'> /* ISS field definitions for MOPS exceptions */</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_MEM_INST	(UL(1) &lt;&lt; 24)</div><div class='hunk'>@@ -386,6 +406,31 @@</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_SRCREG(esr)	(((esr) &amp; (UL(0x1f) &lt;&lt; 5)) &gt;&gt; 5)</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_SIZEREG(esr)	(((esr) &amp; (UL(0x1f) &lt;&lt; 0)) &gt;&gt; 0)</div><div class='ctx'> </div><div class='add'>+/* ISS field definitions for GCS */</div><div class='add'>+#define ESR_ELx_ExType_SHIFT	(20)</div><div class='add'>+#define ESR_ELx_ExType_MASK		GENMASK(23, 20)</div><div class='add'>+#define ESR_ELx_Raddr_SHIFT		(10)</div><div class='add'>+#define ESR_ELx_Raddr_MASK		GENMASK(14, 10)</div><div class='add'>+#define ESR_ELx_Rn_SHIFT		(5)</div><div class='add'>+#define ESR_ELx_Rn_MASK			GENMASK(9, 5)</div><div class='add'>+#define ESR_ELx_Rvalue_SHIFT		5</div><div class='add'>+#define ESR_ELx_Rvalue_MASK		GENMASK(9, 5)</div><div class='add'>+#define ESR_ELx_IT_SHIFT		(0)</div><div class='add'>+#define ESR_ELx_IT_MASK			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define ESR_ELx_ExType_DATA_CHECK	0</div><div class='add'>+#define ESR_ELx_ExType_EXLOCK		1</div><div class='add'>+#define ESR_ELx_ExType_STR		2</div><div class='add'>+</div><div class='add'>+#define ESR_ELx_IT_RET			0</div><div class='add'>+#define ESR_ELx_IT_GCSPOPM		1</div><div class='add'>+#define ESR_ELx_IT_RET_KEYA		2</div><div class='add'>+#define ESR_ELx_IT_RET_KEYB		3</div><div class='add'>+#define ESR_ELx_IT_GCSSS1		4</div><div class='add'>+#define ESR_ELx_IT_GCSSS2		5</div><div class='add'>+#define ESR_ELx_IT_GCSPOPCX		6</div><div class='add'>+#define ESR_ELx_IT_GCSPOPX		7</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -407,6 +452,11 @@ static inline bool esr_is_cfi_brk(unsigned long esr)</div><div class='ctx'> 	       (esr_brk_comment(esr) &amp; ~CFI_BRK_IMM_MASK) == CFI_BRK_IMM_BASE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool esr_is_ubsan_brk(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	return (esr_brk_comment(esr) &amp; ~UBSAN_BRK_MASK) == UBSAN_BRK_IMM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool esr_fsc_is_translation_fault(unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	esr = esr &amp; ESR_ELx_FSC;</div><div class='hunk'>@@ -438,6 +488,39 @@ static inline bool esr_fsc_is_access_flag_fault(unsigned long esr)</div><div class='ctx'> 	       (esr == ESR_ELx_FSC_ACCESS_L(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool esr_fsc_is_addr_sz_fault(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr &amp;= ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_ADDRSZ_L(3))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(2))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(0))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool esr_fsc_is_sea_ttw(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_SEA_TTW(3)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(2)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(0)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool esr_fsc_is_secc_ttw(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_SECC_TTW(3)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(2)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(0)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */</div><div class='ctx'> static inline bool esr_iss_is_eretax(unsigned long esr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h<br/>index f296662590c7..a2da3cb21c24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/exception.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/exception.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/exception.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/exception.h</a></div><div class='hunk'>@@ -57,8 +57,22 @@ void do_el0_undef(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> void do_el1_undef(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> void do_el0_bti(struct pt_regs *regs);</div><div class='ctx'> void do_el1_bti(struct pt_regs *regs, unsigned long esr);</div><div class='del'>-void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,</div><div class='add'>+void do_el0_gcs(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+void do_el1_gcs(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+#ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='add'>+void do_breakpoint(unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void do_watchpoint(unsigned long addr, unsigned long esr,</div><div class='ctx'> 			struct pt_regs *regs);</div><div class='add'>+#else</div><div class='add'>+static inline void do_breakpoint(unsigned long esr, struct pt_regs *regs) {}</div><div class='add'>+static inline void do_watchpoint(unsigned long addr, unsigned long esr,</div><div class='add'>+			struct pt_regs *regs) {}</div><div class='add'>+#endif /* CONFIG_HAVE_HW_BREAKPOINT */</div><div class='add'>+void do_el0_softstep(unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void do_el1_softstep(unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void do_el0_brk64(unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void do_el1_brk64(unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void do_bkpt32(unsigned long esr, struct pt_regs *regs);</div><div class='ctx'> void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs);</div><div class='ctx'> void do_sve_acc(unsigned long esr, struct pt_regs *regs);</div><div class='ctx'> void do_sme_acc(unsigned long esr, struct pt_regs *regs);</div><div class='hunk'>@@ -73,8 +87,8 @@ void do_el0_svc_compat(struct pt_regs *regs);</div><div class='ctx'> void do_el0_fpac(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> void do_el1_fpac(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> void do_el0_mops(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+void do_el1_mops(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> void do_serror(struct pt_regs *regs, unsigned long esr);</div><div class='del'>-void do_signal(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> void __noreturn panic_bad_stack(struct pt_regs *regs, unsigned long esr, unsigned long far);</div><div class='ctx'> #endif	/* __ASM_EXCEPTION_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/extable.h b/arch/arm64/include/asm/extable.h<br/>index 72b0e71cc3de..9dc39612bdf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/extable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/extable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/extable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/extable.h</a></div><div class='hunk'>@@ -33,6 +33,8 @@ do {							\</div><div class='ctx'> 	(b)-&gt;data = (tmp).data;				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+bool insn_may_access_user(unsigned long addr, unsigned long esr);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_BPF_JIT</div><div class='ctx'> bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 		    struct pt_regs *regs);</div><div class='hunk'>@@ -45,5 +47,5 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> }</div><div class='ctx'> #endif /* !CONFIG_BPF_JIT */</div><div class='ctx'> </div><div class='del'>-bool fixup_exception(struct pt_regs *regs);</div><div class='add'>+bool fixup_exception(struct pt_regs *regs, unsigned long esr);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h<br/>index 87e307804b99..635a43c4ec85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/fixmap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/fixmap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/fixmap.h</a></div><div class='hunk'>@@ -48,6 +48,12 @@ enum fixed_addresses {</div><div class='ctx'> 	FIX_EARLYCON_MEM_BASE,</div><div class='ctx'> 	FIX_TEXT_POKE0,</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM</div><div class='add'>+	/* One slot per CPU, mapping the guest's VNCR page at EL2. */</div><div class='add'>+	FIX_VNCR_END,</div><div class='add'>+	FIX_VNCR = FIX_VNCR_END + NR_CPUS,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ACPI_APEI_GHES</div><div class='ctx'> 	/* Used for GHES mapping from assorted contexts */</div><div class='ctx'> 	FIX_APEI_GHES_IRQ,</div><div class='head'>diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h<br/>index f2a84efc3618..b8cf0ea43cc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/fpsimd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/fpsimd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/fpsimd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/fpsimd.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #define __ASM_FP_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/percpu.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='hunk'>@@ -76,11 +77,9 @@ extern void fpsimd_load_state(struct user_fpsimd_state *state);</div><div class='ctx'> extern void fpsimd_thread_switch(struct task_struct *next);</div><div class='ctx'> extern void fpsimd_flush_thread(void);</div><div class='ctx'> </div><div class='del'>-extern void fpsimd_signal_preserve_current_state(void);</div><div class='ctx'> extern void fpsimd_preserve_current_state(void);</div><div class='ctx'> extern void fpsimd_restore_current_state(void);</div><div class='ctx'> extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);</div><div class='del'>-extern void fpsimd_kvm_prepare(void);</div><div class='ctx'> </div><div class='ctx'> struct cpu_fp_state {</div><div class='ctx'> 	struct user_fpsimd_state *st;</div><div class='hunk'>@@ -94,9 +93,12 @@ struct cpu_fp_state {</div><div class='ctx'> 	enum fp_type to_save;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+DECLARE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='add'>+</div><div class='ctx'> extern void fpsimd_bind_state_to_cpu(struct cpu_fp_state *fp_state);</div><div class='ctx'> </div><div class='ctx'> extern void fpsimd_flush_task_state(struct task_struct *target);</div><div class='add'>+extern void fpsimd_save_and_flush_current_state(void);</div><div class='ctx'> extern void fpsimd_save_and_flush_cpu_state(void);</div><div class='ctx'> </div><div class='ctx'> static inline bool thread_sm_enabled(struct thread_struct *thread)</div><div class='hunk'>@@ -109,6 +111,8 @@ static inline bool thread_za_enabled(struct thread_struct *thread)</div><div class='ctx'> 	return system_supports_sme() &amp;&amp; (thread-&gt;svcr &amp; SVCR_ZA_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern void task_smstop_sm(struct task_struct *task);</div><div class='add'>+</div><div class='ctx'> /* Maximum VL that SVE/SME VL-agnostic software can transparently support */</div><div class='ctx'> #define VL_ARCH_MAX 0x100</div><div class='ctx'> </div><div class='hunk'>@@ -196,10 +200,8 @@ struct vl_info {</div><div class='ctx'> </div><div class='ctx'> extern void sve_alloc(struct task_struct *task, bool flush);</div><div class='ctx'> extern void fpsimd_release_task(struct task_struct *task);</div><div class='del'>-extern void fpsimd_sync_to_sve(struct task_struct *task);</div><div class='del'>-extern void fpsimd_force_sync_to_sve(struct task_struct *task);</div><div class='del'>-extern void sve_sync_to_fpsimd(struct task_struct *task);</div><div class='del'>-extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);</div><div class='add'>+extern void fpsimd_sync_from_effective_state(struct task_struct *task);</div><div class='add'>+extern void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task);</div><div class='ctx'> </div><div class='ctx'> extern int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> 				 unsigned long vl, unsigned long flags);</div><div class='hunk'>@@ -293,14 +295,29 @@ static inline bool sve_vq_available(unsigned int vq)</div><div class='ctx'> 	return vq_available(ARM64_VEC_SVE, vq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-size_t sve_state_size(struct task_struct const *task);</div><div class='add'>+static inline size_t __sve_state_size(unsigned int sve_vl, unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	unsigned int vl = max(sve_vl, sme_vl);</div><div class='add'>+	return SVE_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return how many bytes of memory are required to store the full SVE</div><div class='add'>+ * state for task, given task's currently configured vector length.</div><div class='add'>+ */</div><div class='add'>+static inline size_t sve_state_size(struct task_struct const *task)</div><div class='add'>+{</div><div class='add'>+	unsigned int sve_vl = task_get_sve_vl(task);</div><div class='add'>+	unsigned int sme_vl = task_get_sme_vl(task);</div><div class='add'>+	return __sve_state_size(sve_vl, sme_vl);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='ctx'> static inline void sve_alloc(struct task_struct *task, bool flush) { }</div><div class='ctx'> static inline void fpsimd_release_task(struct task_struct *task) { }</div><div class='del'>-static inline void sve_sync_to_fpsimd(struct task_struct *task) { }</div><div class='del'>-static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }</div><div class='add'>+static inline void fpsimd_sync_from_effective_state(struct task_struct *task) { }</div><div class='add'>+static inline void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task) { }</div><div class='ctx'> </div><div class='ctx'> static inline int sve_max_virtualisable_vl(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -334,6 +351,11 @@ static inline void vec_update_vq_map(enum vec_type t) { }</div><div class='ctx'> static inline int vec_verify_vq_map(enum vec_type t) { return 0; }</div><div class='ctx'> static inline void sve_setup(void) { }</div><div class='ctx'> </div><div class='add'>+static inline size_t __sve_state_size(unsigned int sve_vl, unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline size_t sve_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -386,6 +408,16 @@ extern int sme_set_current_vl(unsigned long arg);</div><div class='ctx'> extern int sme_get_current_vl(void);</div><div class='ctx'> extern void sme_suspend_exit(void);</div><div class='ctx'> </div><div class='add'>+static inline size_t __sme_state_size(unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	size_t size = ZA_SIG_REGS_SIZE(sve_vq_from_vl(sme_vl));</div><div class='add'>+</div><div class='add'>+	if (system_supports_sme2())</div><div class='add'>+		size += ZT_SIG_REG_SIZE;</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Return how many bytes of memory are required to store the full SME</div><div class='ctx'>  * specific state for task, given task's currently configured vector</div><div class='hunk'>@@ -393,15 +425,7 @@ extern void sme_suspend_exit(void);</div><div class='ctx'>  */</div><div class='ctx'> static inline size_t sme_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='del'>-	unsigned int vl = task_get_sme_vl(task);</div><div class='del'>-	size_t size;</div><div class='del'>-</div><div class='del'>-	size = ZA_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='del'>-</div><div class='del'>-	if (system_supports_sme2())</div><div class='del'>-		size += ZT_SIG_REG_SIZE;</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='add'>+	return __sme_state_size(task_get_sme_vl(task));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -422,6 +446,11 @@ static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; }</div><div class='ctx'> static inline int sme_get_current_vl(void) { return -EINVAL; }</div><div class='ctx'> static inline void sme_suspend_exit(void) { }</div><div class='ctx'> </div><div class='add'>+static inline size_t __sme_state_size(unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline size_t sme_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h<br/>index dc9cf0bd2a4c..ba7cf7fec5e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/ftrace.h</a></div><div class='hunk'>@@ -52,10 +52,15 @@ extern unsigned long ftrace_graph_call;</div><div class='ctx'> extern void return_to_handler(void);</div><div class='ctx'> </div><div class='ctx'> unsigned long ftrace_call_adjust(unsigned long addr);</div><div class='add'>+unsigned long arch_ftrace_get_symaddr(unsigned long fentry_ip);</div><div class='add'>+#define ftrace_get_symaddr(fentry_ip) arch_ftrace_get_symaddr(fentry_ip)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS</div><div class='add'>+#define HAVE_ARCH_FTRACE_REGS</div><div class='ctx'> struct dyn_ftrace;</div><div class='ctx'> struct ftrace_ops;</div><div class='add'>+struct ftrace_regs;</div><div class='add'>+#define arch_ftrace_regs(fregs) ((struct __arch_ftrace_regs *)(fregs))</div><div class='ctx'> </div><div class='ctx'> #define arch_ftrace_get_regs(regs) NULL</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +68,7 @@ struct ftrace_ops;</div><div class='ctx'>  * Note: sizeof(struct ftrace_regs) must be a multiple of 16 to ensure correct</div><div class='ctx'>  * stack alignment</div><div class='ctx'>  */</div><div class='del'>-struct ftrace_regs {</div><div class='add'>+struct __arch_ftrace_regs {</div><div class='ctx'> 	/* x0 - x8 */</div><div class='ctx'> 	unsigned long regs[9];</div><div class='ctx'> </div><div class='hunk'>@@ -83,49 +88,82 @@ struct ftrace_regs {</div><div class='ctx'> static __always_inline unsigned long</div><div class='ctx'> ftrace_regs_get_instruction_pointer(const struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	return fregs-&gt;pc;</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;pc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='ctx'> ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs,</div><div class='ctx'> 				    unsigned long pc)</div><div class='ctx'> {</div><div class='del'>-	fregs-&gt;pc = pc;</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;pc = pc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long</div><div class='ctx'> ftrace_regs_get_stack_pointer(const struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	return fregs-&gt;sp;</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;sp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long</div><div class='ctx'> ftrace_regs_get_argument(struct ftrace_regs *fregs, unsigned int n)</div><div class='ctx'> {</div><div class='ctx'> 	if (n &lt; 8)</div><div class='del'>-		return fregs-&gt;regs[n];</div><div class='add'>+		return arch_ftrace_regs(fregs)-&gt;regs[n];</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long</div><div class='ctx'> ftrace_regs_get_return_value(const struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	return fregs-&gt;regs[0];</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;regs[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='ctx'> ftrace_regs_set_return_value(struct ftrace_regs *fregs,</div><div class='ctx'> 			     unsigned long ret)</div><div class='ctx'> {</div><div class='del'>-	fregs-&gt;regs[0] = ret;</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;regs[0] = ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='ctx'> ftrace_override_function_with_return(struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	fregs-&gt;pc = fregs-&gt;lr;</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;pc = arch_ftrace_regs(fregs)-&gt;lr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline unsigned long</div><div class='add'>+ftrace_regs_get_frame_pointer(const struct ftrace_regs *fregs)</div><div class='add'>+{</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;fp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long</div><div class='add'>+ftrace_regs_get_return_address(const struct ftrace_regs *fregs)</div><div class='add'>+{</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;lr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline struct pt_regs *</div><div class='add'>+ftrace_partial_regs(const struct ftrace_regs *fregs, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct __arch_ftrace_regs *afregs = arch_ftrace_regs(fregs);</div><div class='add'>+</div><div class='add'>+	memcpy(regs-&gt;regs, afregs-&gt;regs, sizeof(afregs-&gt;regs));</div><div class='add'>+	regs-&gt;sp = afregs-&gt;sp;</div><div class='add'>+	regs-&gt;pc = afregs-&gt;pc;</div><div class='add'>+	regs-&gt;regs[29] = afregs-&gt;fp;</div><div class='add'>+	regs-&gt;regs[30] = afregs-&gt;lr;</div><div class='add'>+	regs-&gt;pstate = PSR_MODE_EL1h;</div><div class='add'>+	return regs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_ftrace_fill_perf_regs(fregs, _regs) do {		\</div><div class='add'>+		(_regs)-&gt;pc = arch_ftrace_regs(fregs)-&gt;pc;			\</div><div class='add'>+		(_regs)-&gt;regs[29] = arch_ftrace_regs(fregs)-&gt;fp;		\</div><div class='add'>+		(_regs)-&gt;sp = arch_ftrace_regs(fregs)-&gt;sp;			\</div><div class='add'>+		(_regs)-&gt;pstate = PSR_MODE_EL1h;		\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='ctx'> int ftrace_regs_query_register_offset(const char *name);</div><div class='ctx'> </div><div class='ctx'> int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);</div><div class='hunk'>@@ -143,7 +181,7 @@ static inline void arch_ftrace_set_direct_caller(struct ftrace_regs *fregs,</div><div class='ctx'> 	 * The ftrace trampoline will return to this address instead of the</div><div class='ctx'> 	 * instrumented function.</div><div class='ctx'> 	 */</div><div class='del'>-	fregs-&gt;direct_tramp = addr;</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;direct_tramp = addr;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */</div><div class='ctx'> </div><div class='hunk'>@@ -183,23 +221,6 @@ static inline bool arch_syscall_match_sym_name(const char *sym,</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-struct fgraph_ret_regs {</div><div class='del'>-	/* x0 - x7 */</div><div class='del'>-	unsigned long regs[8];</div><div class='del'>-</div><div class='del'>-	unsigned long fp;</div><div class='del'>-	unsigned long __unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline unsigned long fgraph_ret_regs_return_value(struct fgraph_ret_regs *ret_regs)</div><div class='del'>-{</div><div class='del'>-	return ret_regs-&gt;regs[0];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long fgraph_ret_regs_frame_pointer(struct fgraph_ret_regs *ret_regs)</div><div class='del'>-{</div><div class='del'>-	return ret_regs-&gt;fp;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent,</div><div class='ctx'> 			   unsigned long frame_pointer);</div><div class='head'>diff --git a/arch/arm64/include/asm/gcs.h b/arch/arm64/include/asm/gcs.h<br/>new file mode 100644<br/>index 000000000000..8fa0707069e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/gcs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/gcs.h</a></div><div class='hunk'>@@ -0,0 +1,196 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 ARM Ltd.</div><div class='add'>+ */</div><div class='add'>+#ifndef __ASM_GCS_H</div><div class='add'>+#define __ASM_GCS_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+struct kernel_clone_args;</div><div class='add'>+struct ksignal;</div><div class='add'>+</div><div class='add'>+static inline void gcsb_dsync(void)</div><div class='add'>+{</div><div class='add'>+	asm volatile(".inst 0xd503227f" : : : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gcsstr(u64 *addr, u64 val)</div><div class='add'>+{</div><div class='add'>+	register u64 *_addr __asm__ ("x0") = addr;</div><div class='add'>+	register long _val __asm__ ("x1") = val;</div><div class='add'>+</div><div class='add'>+	/* GCSSTTR x1, [x0] */</div><div class='add'>+	asm volatile(</div><div class='add'>+		".inst 0xd91f1c01\n"</div><div class='add'>+		:</div><div class='add'>+		: "rZ" (_val), "r" (_addr)</div><div class='add'>+		: "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gcsss1(u64 Xt)</div><div class='add'>+{</div><div class='add'>+	asm volatile (</div><div class='add'>+		"sys #3, C7, C7, #2, %0\n"</div><div class='add'>+		:</div><div class='add'>+		: "rZ" (Xt)</div><div class='add'>+		: "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 gcsss2(void)</div><div class='add'>+{</div><div class='add'>+	u64 Xt;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+		"SYSL %0, #3, C7, C7, #3\n"</div><div class='add'>+		: "=r" (Xt)</div><div class='add'>+		:</div><div class='add'>+		: "memory");</div><div class='add'>+</div><div class='add'>+	return Xt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK \</div><div class='add'>+	(PR_SHADOW_STACK_ENABLE | PR_SHADOW_STACK_WRITE | PR_SHADOW_STACK_PUSH)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+</div><div class='add'>+static inline bool task_gcs_el0_enabled(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	return task-&gt;thread.gcs_el0_mode &amp; PR_SHADOW_STACK_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gcs_set_el0_mode(struct task_struct *task);</div><div class='add'>+void gcs_free(struct task_struct *task);</div><div class='add'>+void gcs_preserve_current_state(void);</div><div class='add'>+unsigned long gcs_alloc_thread_stack(struct task_struct *tsk,</div><div class='add'>+				     const struct kernel_clone_args *args);</div><div class='add'>+</div><div class='add'>+static inline int gcs_check_locked(struct task_struct *task,</div><div class='add'>+				   unsigned long new_val)</div><div class='add'>+{</div><div class='add'>+	unsigned long cur_val = task-&gt;thread.gcs_el0_mode;</div><div class='add'>+</div><div class='add'>+	cur_val &amp;= task-&gt;thread.gcs_el0_locked;</div><div class='add'>+	new_val &amp;= task-&gt;thread.gcs_el0_locked;</div><div class='add'>+</div><div class='add'>+	if (cur_val != new_val)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int gcssttr(unsigned long __user *addr, unsigned long val)</div><div class='add'>+{</div><div class='add'>+	register unsigned long __user *_addr __asm__ ("x0") = addr;</div><div class='add'>+	register unsigned long _val __asm__ ("x1") = val;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* GCSSTTR x1, [x0] */</div><div class='add'>+	asm volatile(</div><div class='add'>+		"1: .inst 0xd91f1c01\n"</div><div class='add'>+		"2: \n"</div><div class='add'>+		_ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0)</div><div class='add'>+		: "+r" (err)</div><div class='add'>+		: "rZ" (_val), "r" (_addr)</div><div class='add'>+		: "memory");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void put_user_gcs(unsigned long val, unsigned long __user *addr,</div><div class='add'>+				int *err)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!access_ok((char __user *)addr, sizeof(u64))) {</div><div class='add'>+		*err = -EFAULT;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	uaccess_ttbr0_enable();</div><div class='add'>+	ret = gcssttr(addr, val);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		*err = ret;</div><div class='add'>+	uaccess_ttbr0_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void push_user_gcs(unsigned long val, int *err)</div><div class='add'>+{</div><div class='add'>+	u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	gcspr -= sizeof(u64);</div><div class='add'>+	put_user_gcs(val, (unsigned long __user *)gcspr, err);</div><div class='add'>+	if (!*err)</div><div class='add'>+		write_sysreg_s(gcspr, SYS_GCSPR_EL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Unlike put/push_user_gcs() above, get/pop_user_gsc() doesn't</div><div class='add'>+ * validate the GCS permission is set on the page being read.  This</div><div class='add'>+ * differs from how the hardware works when it consumes data stored at</div><div class='add'>+ * GCSPR. Callers should ensure this is acceptable.</div><div class='add'>+ */</div><div class='add'>+static inline u64 get_user_gcs(unsigned long __user *addr, int *err)</div><div class='add'>+{</div><div class='add'>+	unsigned long ret;</div><div class='add'>+	u64 load = 0;</div><div class='add'>+</div><div class='add'>+	/* Ensure previous GCS operation are visible before we read the page */</div><div class='add'>+	gcsb_dsync();</div><div class='add'>+	ret = copy_from_user(&amp;load, addr, sizeof(load));</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		*err = ret;</div><div class='add'>+	return load;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 pop_user_gcs(int *err)</div><div class='add'>+{</div><div class='add'>+	u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+	u64 read_val;</div><div class='add'>+</div><div class='add'>+	read_val = get_user_gcs((__force unsigned long __user *)gcspr, err);</div><div class='add'>+	if (!*err)</div><div class='add'>+		write_sysreg_s(gcspr + sizeof(u64), SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	return read_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline bool task_gcs_el0_enabled(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gcs_set_el0_mode(struct task_struct *task) { }</div><div class='add'>+static inline void gcs_free(struct task_struct *task) { }</div><div class='add'>+static inline void gcs_preserve_current_state(void) { }</div><div class='add'>+static inline void put_user_gcs(unsigned long val, unsigned long __user *addr,</div><div class='add'>+				int *err) { }</div><div class='add'>+static inline void push_user_gcs(unsigned long val, int *err) { }</div><div class='add'>+</div><div class='add'>+static inline unsigned long gcs_alloc_thread_stack(struct task_struct *tsk,</div><div class='add'>+						   const struct kernel_clone_args *args)</div><div class='add'>+{</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+static inline int gcs_check_locked(struct task_struct *task,</div><div class='add'>+				   unsigned long new_val)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static inline u64 get_user_gcs(unsigned long __user *addr, int *err)</div><div class='add'>+{</div><div class='add'>+	*err = -EFAULT;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static inline u64 pop_user_gcs(int *err)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h<br/>index cbfa7b6f2e09..77d6b8c63d4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hardirq.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hardirq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hardirq.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/hardirq.h</a></div><div class='hunk'>@@ -41,7 +41,7 @@ do {									\</div><div class='ctx'> 									\</div><div class='ctx'> 	___hcr = read_sysreg(hcr_el2);					\</div><div class='ctx'> 	if (!(___hcr &amp; HCR_TGE)) {					\</div><div class='del'>-		write_sysreg(___hcr | HCR_TGE, hcr_el2);		\</div><div class='add'>+		write_sysreg_hcr(___hcr | HCR_TGE);			\</div><div class='ctx'> 		isb();							\</div><div class='ctx'> 	}								\</div><div class='ctx'> 	/*								\</div><div class='hunk'>@@ -82,7 +82,7 @@ do {									\</div><div class='ctx'> 	 */								\</div><div class='ctx'> 	barrier();							\</div><div class='ctx'> 	if (!___ctx-&gt;cnt &amp;&amp; !(___hcr &amp; HCR_TGE))			\</div><div class='del'>-		write_sysreg(___hcr, hcr_el2);				\</div><div class='add'>+		write_sysreg_hcr(___hcr);				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> static inline void ack_bad_irq(unsigned int irq)</div><div class='head'>diff --git a/arch/arm64/include/asm/hugetlb.h b/arch/arm64/include/asm/hugetlb.h<br/>index 293f880865e8..44c1f757bfcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #define __ASM_HUGETLB_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/mte.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION</div><div class='hunk'>@@ -20,7 +21,14 @@ extern bool arch_hugetlb_migration_supported(struct hstate *h);</div><div class='ctx'> </div><div class='ctx'> static inline void arch_clear_hugetlb_flags(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM64_MTE</div><div class='add'>+	if (system_supports_mte()) {</div><div class='add'>+		clear_bit(PG_mte_tagged, &amp;folio-&gt;flags.f);</div><div class='add'>+		clear_bit(PG_mte_lock, &amp;folio-&gt;flags.f);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags</div><div class='ctx'> </div><div class='hunk'>@@ -34,8 +42,8 @@ extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 				      unsigned long addr, pte_t *ptep,</div><div class='ctx'> 				      pte_t pte, int dirty);</div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR</div><div class='del'>-extern pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				     unsigned long addr, pte_t *ptep);</div><div class='add'>+extern pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='add'>+				     pte_t *ptep, unsigned long sz);</div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT</div><div class='ctx'> extern void huge_ptep_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> 				    unsigned long addr, pte_t *ptep);</div><div class='hunk'>@@ -61,6 +69,30 @@ extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/hugetlb.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline void __flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='add'>+					     unsigned long start,</div><div class='add'>+					     unsigned long end,</div><div class='add'>+					     unsigned long stride,</div><div class='add'>+					     bool last_level)</div><div class='add'>+{</div><div class='add'>+	switch (stride) {</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		__flush_tlb_range(vma, start, end, PUD_SIZE, last_level, 1);</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	case CONT_PMD_SIZE:</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		__flush_tlb_range(vma, start, end, PMD_SIZE, last_level, 2);</div><div class='add'>+		break;</div><div class='add'>+	case CONT_PTE_SIZE:</div><div class='add'>+		__flush_tlb_range(vma, start, end, PAGE_SIZE, last_level, 3);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		__flush_tlb_range(vma, start, end, PAGE_SIZE, last_level, TLBI_TTL_UNKNOWN);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define __HAVE_ARCH_FLUSH_HUGETLB_TLB_RANGE</div><div class='ctx'> static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='ctx'> 					   unsigned long start,</div><div class='hunk'>@@ -68,12 +100,7 @@ static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long stride = huge_page_size(hstate_vma(vma));</div><div class='ctx'> </div><div class='del'>-	if (stride == PMD_SIZE)</div><div class='del'>-		__flush_tlb_range(vma, start, end, stride, false, 2);</div><div class='del'>-	else if (stride == PUD_SIZE)</div><div class='del'>-		__flush_tlb_range(vma, start, end, stride, false, 1);</div><div class='del'>-	else</div><div class='del'>-		__flush_tlb_range(vma, start, end, PAGE_SIZE, false, 0);</div><div class='add'>+	__flush_hugetlb_tlb_range(vma, start, end, stride, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_HUGETLB_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h<br/>index a775adddecf2..6d567265467c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hwcap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hwcap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hwcap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/hwcap.h</a></div><div class='hunk'>@@ -92,6 +92,22 @@</div><div class='ctx'> #define KERNEL_HWCAP_SB			__khwcap_feature(SB)</div><div class='ctx'> #define KERNEL_HWCAP_PACA		__khwcap_feature(PACA)</div><div class='ctx'> #define KERNEL_HWCAP_PACG		__khwcap_feature(PACG)</div><div class='add'>+#define KERNEL_HWCAP_GCS		__khwcap_feature(GCS)</div><div class='add'>+#define KERNEL_HWCAP_CMPBR		__khwcap_feature(CMPBR)</div><div class='add'>+#define KERNEL_HWCAP_FPRCVT		__khwcap_feature(FPRCVT)</div><div class='add'>+#define KERNEL_HWCAP_F8MM8		__khwcap_feature(F8MM8)</div><div class='add'>+#define KERNEL_HWCAP_F8MM4		__khwcap_feature(F8MM4)</div><div class='add'>+#define KERNEL_HWCAP_SVE_F16MM		__khwcap_feature(SVE_F16MM)</div><div class='add'>+#define KERNEL_HWCAP_SVE_ELTPERM	__khwcap_feature(SVE_ELTPERM)</div><div class='add'>+#define KERNEL_HWCAP_SVE_AES2		__khwcap_feature(SVE_AES2)</div><div class='add'>+#define KERNEL_HWCAP_SVE_BFSCALE	__khwcap_feature(SVE_BFSCALE)</div><div class='add'>+#define KERNEL_HWCAP_SVE2P2		__khwcap_feature(SVE2P2)</div><div class='add'>+#define KERNEL_HWCAP_SME2P2		__khwcap_feature(SME2P2)</div><div class='add'>+#define KERNEL_HWCAP_SME_SBITPERM	__khwcap_feature(SME_SBITPERM)</div><div class='add'>+#define KERNEL_HWCAP_SME_AES		__khwcap_feature(SME_AES)</div><div class='add'>+#define KERNEL_HWCAP_SME_SFEXPA		__khwcap_feature(SME_SFEXPA)</div><div class='add'>+#define KERNEL_HWCAP_SME_STMOP		__khwcap_feature(SME_STMOP)</div><div class='add'>+#define KERNEL_HWCAP_SME_SMOP4		__khwcap_feature(SME_SMOP4)</div><div class='ctx'> </div><div class='ctx'> #define __khwcap2_feature(x)		(const_ilog2(HWCAP2_ ## x) + 64)</div><div class='ctx'> #define KERNEL_HWCAP_DCPODP		__khwcap2_feature(DCPODP)</div><div class='hunk'>@@ -159,17 +175,24 @@</div><div class='ctx'> #define KERNEL_HWCAP_SME_SF8DP2		__khwcap2_feature(SME_SF8DP2)</div><div class='ctx'> #define KERNEL_HWCAP_POE		__khwcap2_feature(POE)</div><div class='ctx'> </div><div class='add'>+#define __khwcap3_feature(x)		(const_ilog2(HWCAP3_ ## x) + 128)</div><div class='add'>+#define KERNEL_HWCAP_MTE_FAR		__khwcap3_feature(MTE_FAR)</div><div class='add'>+#define KERNEL_HWCAP_MTE_STORE_ONLY	__khwcap3_feature(MTE_STORE_ONLY)</div><div class='add'>+#define KERNEL_HWCAP_LSFE		__khwcap3_feature(LSFE)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This yields a mask that user programs can use to figure out what</div><div class='ctx'>  * instruction set this cpu supports.</div><div class='ctx'>  */</div><div class='ctx'> #define ELF_HWCAP		cpu_get_elf_hwcap()</div><div class='ctx'> #define ELF_HWCAP2		cpu_get_elf_hwcap2()</div><div class='add'>+#define ELF_HWCAP3		cpu_get_elf_hwcap3()</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> #define COMPAT_ELF_HWCAP	(compat_elf_hwcap)</div><div class='ctx'> #define COMPAT_ELF_HWCAP2	(compat_elf_hwcap2)</div><div class='del'>-extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;</div><div class='add'>+#define COMPAT_ELF_HWCAP3	(compat_elf_hwcap3)</div><div class='add'>+extern unsigned int compat_elf_hwcap, compat_elf_hwcap2, compat_elf_hwcap3;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='head'>diff --git a/arch/arm64/include/asm/hyperv-tlfs.h b/arch/arm64/include/asm/hyperv-tlfs.h<br/>deleted file mode 100644<br/>index bc30aadedfe9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hyperv-tlfs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hyperv-tlfs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,71 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This file contains definitions from the Hyper-V Hypervisor Top-Level</div><div class='del'>- * Functional Specification (TLFS):</div><div class='del'>- * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2021, Microsoft, Inc.</div><div class='del'>- *</div><div class='del'>- * Author : Michael Kelley &lt;mikelley@microsoft.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_HYPERV_TLFS_H</div><div class='del'>-#define _ASM_HYPERV_TLFS_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * All data structures defined in the TLFS that are shared between Hyper-V</div><div class='del'>- * and a guest VM use Little Endian byte ordering.  This matches the default</div><div class='del'>- * byte ordering of Linux running on ARM64, so no special handling is required.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Group C Features. See the asm-generic version of hyperv-tlfs.h</div><div class='del'>- * for a description of Feature Groups.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Crash MSRs available */</div><div class='del'>-#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE	BIT(8)</div><div class='del'>-</div><div class='del'>-/* STIMER direct mode is available */</div><div class='del'>-#define HV_STIMER_DIRECT_MODE_AVAILABLE		BIT(13)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * To support arch-generic code calling hv_set/get_register:</div><div class='del'>- * - On x86, HV_MSR_ indicates an MSR accessed via rdmsrl/wrmsrl</div><div class='del'>- * - On ARM, HV_MSR_ indicates a VP register accessed via hypercall</div><div class='del'>- */</div><div class='del'>-#define HV_MSR_CRASH_P0		(HV_REGISTER_GUEST_CRASH_P0)</div><div class='del'>-#define HV_MSR_CRASH_P1		(HV_REGISTER_GUEST_CRASH_P1)</div><div class='del'>-#define HV_MSR_CRASH_P2		(HV_REGISTER_GUEST_CRASH_P2)</div><div class='del'>-#define HV_MSR_CRASH_P3		(HV_REGISTER_GUEST_CRASH_P3)</div><div class='del'>-#define HV_MSR_CRASH_P4		(HV_REGISTER_GUEST_CRASH_P4)</div><div class='del'>-#define HV_MSR_CRASH_CTL	(HV_REGISTER_GUEST_CRASH_CTL)</div><div class='del'>-</div><div class='del'>-#define HV_MSR_VP_INDEX		(HV_REGISTER_VP_INDEX)</div><div class='del'>-#define HV_MSR_TIME_REF_COUNT	(HV_REGISTER_TIME_REF_COUNT)</div><div class='del'>-#define HV_MSR_REFERENCE_TSC	(HV_REGISTER_REFERENCE_TSC)</div><div class='del'>-</div><div class='del'>-#define HV_MSR_SINT0		(HV_REGISTER_SINT0)</div><div class='del'>-#define HV_MSR_SCONTROL		(HV_REGISTER_SCONTROL)</div><div class='del'>-#define HV_MSR_SIEFP		(HV_REGISTER_SIEFP)</div><div class='del'>-#define HV_MSR_SIMP		(HV_REGISTER_SIMP)</div><div class='del'>-#define HV_MSR_EOM		(HV_REGISTER_EOM)</div><div class='del'>-</div><div class='del'>-#define HV_MSR_STIMER0_CONFIG	(HV_REGISTER_STIMER0_CONFIG)</div><div class='del'>-#define HV_MSR_STIMER0_COUNT	(HV_REGISTER_STIMER0_COUNT)</div><div class='del'>-</div><div class='del'>-union hv_msi_entry {</div><div class='del'>-	u64 as_uint64[2];</div><div class='del'>-	struct {</div><div class='del'>-		u64 address;</div><div class='del'>-		u32 data;</div><div class='del'>-		u32 reserved;</div><div class='del'>-	} __packed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#include &lt;asm-generic/hyperv-tlfs.h&gt;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm64/include/asm/hypervisor.h b/arch/arm64/include/asm/hypervisor.h<br/>index 409e239834d1..a12fd897c877 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hypervisor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/hypervisor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/hypervisor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/hypervisor.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> void kvm_init_hyp_services(void);</div><div class='ctx'> bool kvm_arm_hyp_service_available(u32 func_id);</div><div class='add'>+void kvm_arm_target_impl_cpu_init(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM_PKVM_GUEST</div><div class='ctx'> void pkvm_init_hyp_services(void);</div><div class='head'>diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h<br/>index 8c0a36f72d6f..18c7811774d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/insn.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/insn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/insn.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/insn.h</a></div><div class='hunk'>@@ -188,8 +188,10 @@ enum aarch64_insn_ldst_type {</div><div class='ctx'> 	AARCH64_INSN_LDST_STORE_PAIR_PRE_INDEX,</div><div class='ctx'> 	AARCH64_INSN_LDST_LOAD_PAIR_POST_INDEX,</div><div class='ctx'> 	AARCH64_INSN_LDST_STORE_PAIR_POST_INDEX,</div><div class='add'>+	AARCH64_INSN_LDST_LOAD_ACQ,</div><div class='ctx'> 	AARCH64_INSN_LDST_LOAD_EX,</div><div class='ctx'> 	AARCH64_INSN_LDST_LOAD_ACQ_EX,</div><div class='add'>+	AARCH64_INSN_LDST_STORE_REL,</div><div class='ctx'> 	AARCH64_INSN_LDST_STORE_EX,</div><div class='ctx'> 	AARCH64_INSN_LDST_STORE_REL_EX,</div><div class='ctx'> 	AARCH64_INSN_LDST_SIGNED_LOAD_IMM_OFFSET,</div><div class='hunk'>@@ -351,8 +353,11 @@ __AARCH64_INSN_FUNCS(ldr_imm,	0x3FC00000, 0x39400000)</div><div class='ctx'> __AARCH64_INSN_FUNCS(ldr_lit,	0xBF000000, 0x18000000)</div><div class='ctx'> __AARCH64_INSN_FUNCS(ldrsw_lit,	0xFF000000, 0x98000000)</div><div class='ctx'> __AARCH64_INSN_FUNCS(exclusive,	0x3F800000, 0x08000000)</div><div class='del'>-__AARCH64_INSN_FUNCS(load_ex,	0x3F400000, 0x08400000)</div><div class='del'>-__AARCH64_INSN_FUNCS(store_ex,	0x3F400000, 0x08000000)</div><div class='add'>+__AARCH64_INSN_FUNCS(load_acq,  0x3FDFFC00, 0x08DFFC00)</div><div class='add'>+__AARCH64_INSN_FUNCS(store_rel, 0x3FDFFC00, 0x089FFC00)</div><div class='add'>+__AARCH64_INSN_FUNCS(load_ex,	0x3FC00000, 0x08400000)</div><div class='add'>+__AARCH64_INSN_FUNCS(store_ex,	0x3FC00000, 0x08000000)</div><div class='add'>+__AARCH64_INSN_FUNCS(mops,	0x3B200C00, 0x19000400)</div><div class='ctx'> __AARCH64_INSN_FUNCS(stp,	0x7FC00000, 0x29000000)</div><div class='ctx'> __AARCH64_INSN_FUNCS(ldp,	0x7FC00000, 0x29400000)</div><div class='ctx'> __AARCH64_INSN_FUNCS(stp_post,	0x7FC00000, 0x28800000)</div><div class='hunk'>@@ -575,6 +580,11 @@ static __always_inline u32 aarch64_insn_gen_nop(void)</div><div class='ctx'> 	return aarch64_insn_gen_hint(AARCH64_INSN_HINT_NOP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline bool aarch64_insn_is_nop(u32 insn)</div><div class='add'>+{</div><div class='add'>+	return insn == aarch64_insn_gen_nop();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,</div><div class='ctx'> 				enum aarch64_insn_branch_type type);</div><div class='ctx'> u32 aarch64_insn_gen_load_store_reg(enum aarch64_insn_register reg,</div><div class='hunk'>@@ -596,6 +606,10 @@ u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,</div><div class='ctx'> 				     int offset,</div><div class='ctx'> 				     enum aarch64_insn_variant variant,</div><div class='ctx'> 				     enum aarch64_insn_ldst_type type);</div><div class='add'>+u32 aarch64_insn_gen_load_acq_store_rel(enum aarch64_insn_register reg,</div><div class='add'>+					enum aarch64_insn_register base,</div><div class='add'>+					enum aarch64_insn_size_type size,</div><div class='add'>+					enum aarch64_insn_ldst_type type);</div><div class='ctx'> u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,</div><div class='ctx'> 				   enum aarch64_insn_register base,</div><div class='ctx'> 				   enum aarch64_insn_register state,</div><div class='hunk'>@@ -692,6 +706,7 @@ u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type);</div><div class='add'>+u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type);</div><div class='ctx'> u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='ctx'> 			 enum aarch64_insn_system_register sysreg);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h<br/>index 1ada23a6ec19..83e03abbb2ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/io.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;asm/early_ioremap.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Generic IO read/write.  These perform native-endian accesses.</div><div class='hunk'>@@ -129,17 +130,6 @@ static __always_inline u64 __raw_readq(const volatile void __iomem *addr)</div><div class='ctx'> #define PCI_IOBASE		((void __iomem *)PCI_IO_START)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * String version of I/O memory access operations.</div><div class='del'>- */</div><div class='del'>-extern void __memcpy_fromio(void *, const volatile void __iomem *, size_t);</div><div class='del'>-extern void __memcpy_toio(volatile void __iomem *, const void *, size_t);</div><div class='del'>-extern void __memset_io(volatile void __iomem *, int, size_t);</div><div class='del'>-</div><div class='del'>-#define memset_io(c,v,l)	__memset_io((c),(v),(l))</div><div class='del'>-#define memcpy_fromio(a,c,l)	__memcpy_fromio((a),(c),(l))</div><div class='del'>-#define memcpy_toio(c,a,l)	__memcpy_toio((c),(a),(l))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * The ARM64 iowrite implementation is intended to support drivers that want to</div><div class='ctx'>  * use write combining. For instance PCI drivers using write combining with a 64</div><div class='ctx'>  * byte __iowrite64_copy() expect to get a 64 byte MemWr TLP on the PCIe bus.</div><div class='hunk'>@@ -280,9 +270,13 @@ int arm64_ioremap_prot_hook_register(const ioremap_prot_hook_t hook);</div><div class='ctx'> #define _PAGE_IOREMAP PROT_DEVICE_nGnRE</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc(addr, size)	\</div><div class='del'>-	ioremap_prot((addr), (size), PROT_NORMAL_NC)</div><div class='add'>+	ioremap_prot((addr), (size), __pgprot(PROT_NORMAL_NC))</div><div class='ctx'> #define ioremap_np(addr, size)	\</div><div class='del'>-	ioremap_prot((addr), (size), PROT_DEVICE_nGnRnE)</div><div class='add'>+	ioremap_prot((addr), (size), __pgprot(PROT_DEVICE_nGnRnE))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define ioremap_encrypted(addr, size)	\</div><div class='add'>+	ioremap_prot((addr), (size), PAGE_KERNEL)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * io{read,write}{16,32,64}be() macros</div><div class='hunk'>@@ -303,7 +297,7 @@ static inline void __iomem *ioremap_cache(phys_addr_t addr, size_t size)</div><div class='ctx'> 	if (pfn_is_map_memory(__phys_to_pfn(addr)))</div><div class='ctx'> 		return (void __iomem *)__phys_to_virt(addr);</div><div class='ctx'> </div><div class='del'>-	return ioremap_prot(addr, size, PROT_NORMAL);</div><div class='add'>+	return ioremap_prot(addr, size, __pgprot(PROT_NORMAL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -318,4 +312,11 @@ extern bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,</div><div class='ctx'> 					unsigned long flags);</div><div class='ctx'> #define arch_memremap_can_ram_remap arch_memremap_can_ram_remap</div><div class='ctx'> </div><div class='add'>+static inline bool arm64_is_protected_mmio(phys_addr_t phys_addr, size_t size)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(is_realm_world()))</div><div class='add'>+		return arm64_rsi_is_protected(phys_addr, size);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif	/* __ASM_IO_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/jump_label.h b/arch/arm64/include/asm/jump_label.h<br/>index a0a5bbae7229..424ed421cd97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/jump_label.h</a></div><div class='hunk'>@@ -19,10 +19,14 @@</div><div class='ctx'> #define JUMP_TABLE_ENTRY(key, label)			\</div><div class='ctx'> 	".pushsection	__jump_table, \"aw\"\n\t"	\</div><div class='ctx'> 	".align		3\n\t"				\</div><div class='del'>-	".long		1b - ., %l["#label"] - .\n\t"	\</div><div class='del'>-	".quad		%c0 - .\n\t"			\</div><div class='del'>-	".popsection\n\t"				\</div><div class='del'>-	:  :  "i"(key) :  : label</div><div class='add'>+	".long		1b - ., " label " - .\n\t"	\</div><div class='add'>+	".quad		" key " - .\n\t"		\</div><div class='add'>+	".popsection\n\t"</div><div class='add'>+</div><div class='add'>+/* This macro is also expanded on the Rust side. */</div><div class='add'>+#define ARCH_STATIC_BRANCH_ASM(key, label)		\</div><div class='add'>+	"1:	nop\n\t"				\</div><div class='add'>+	JUMP_TABLE_ENTRY(key, label)</div><div class='ctx'> </div><div class='ctx'> static __always_inline bool arch_static_branch(struct static_key * const key,</div><div class='ctx'> 					       const bool branch)</div><div class='hunk'>@@ -30,8 +34,8 @@ static __always_inline bool arch_static_branch(struct static_key * const key,</div><div class='ctx'> 	char *k = &amp;((char *)key)[branch];</div><div class='ctx'> </div><div class='ctx'> 	asm goto(</div><div class='del'>-		"1:	nop					\n\t"</div><div class='del'>-		JUMP_TABLE_ENTRY(k, l_yes)</div><div class='add'>+		ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]")</div><div class='add'>+		:  :  "i"(k) :  : l_yes</div><div class='ctx'> 		);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -43,9 +47,11 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke</div><div class='ctx'> 						    const bool branch)</div><div class='ctx'> {</div><div class='ctx'> 	char *k = &amp;((char *)key)[branch];</div><div class='add'>+</div><div class='ctx'> 	asm goto(</div><div class='ctx'> 		"1:	b		%l[l_yes]		\n\t"</div><div class='del'>-		JUMP_TABLE_ENTRY(k, l_yes)</div><div class='add'>+		JUMP_TABLE_ENTRY("%c0", "%l[l_yes]")</div><div class='add'>+		:  :  "i"(k) :  : l_yes</div><div class='ctx'> 		);</div><div class='ctx'> 	return false;</div><div class='ctx'> l_yes:</div><div class='head'>diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h<br/>index bf05a77873a4..74a4f738c5f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kernel-pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kernel-pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kernel-pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kernel-pgtable.h</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #define SWAPPER_SKIP_LEVEL	0</div><div class='ctx'> #endif</div><div class='ctx'> #define SWAPPER_BLOCK_SIZE	(UL(1) &lt;&lt; SWAPPER_BLOCK_SHIFT)</div><div class='del'>-#define SWAPPER_TABLE_SHIFT	(SWAPPER_BLOCK_SHIFT + PAGE_SHIFT - 3)</div><div class='ctx'> </div><div class='ctx'> #define SWAPPER_PGTABLE_LEVELS		(CONFIG_PGTABLE_LEVELS - SWAPPER_SKIP_LEVEL)</div><div class='ctx'> #define INIT_IDMAP_PGTABLE_LEVELS	(IDMAP_LEVELS - SWAPPER_SKIP_LEVEL)</div><div class='hunk'>@@ -46,11 +45,11 @@</div><div class='ctx'> #define SPAN_NR_ENTRIES(vstart, vend, shift) \</div><div class='ctx'> 	((((vend) - 1) &gt;&gt; (shift)) - ((vstart) &gt;&gt; (shift)) + 1)</div><div class='ctx'> </div><div class='del'>-#define EARLY_ENTRIES(vstart, vend, shift, add) \</div><div class='del'>-	(SPAN_NR_ENTRIES(vstart, vend, shift) + (add))</div><div class='add'>+#define EARLY_ENTRIES(lvl, vstart, vend) \</div><div class='add'>+	SPAN_NR_ENTRIES(vstart, vend, SWAPPER_BLOCK_SHIFT + lvl * PTDESC_TABLE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#define EARLY_LEVEL(lvl, lvls, vstart, vend, add)	\</div><div class='del'>-	(lvls &gt; lvl ? EARLY_ENTRIES(vstart, vend, SWAPPER_BLOCK_SHIFT + lvl * (PAGE_SHIFT - 3), add) : 0)</div><div class='add'>+#define EARLY_LEVEL(lvl, lvls, vstart, vend, add) \</div><div class='add'>+	((lvls) &gt; (lvl) ? EARLY_ENTRIES(lvl, vstart, vend) + (add) : 0)</div><div class='ctx'> </div><div class='ctx'> #define EARLY_PAGES(lvls, vstart, vend, add) (1 	/* PGDIR page */				\</div><div class='ctx'> 	+ EARLY_LEVEL(3, (lvls), (vstart), (vend), add) /* each entry needs a next level page table */	\</div><div class='hunk'>@@ -59,7 +58,7 @@</div><div class='ctx'> #define INIT_DIR_SIZE (PAGE_SIZE * (EARLY_PAGES(SWAPPER_PGTABLE_LEVELS, KIMAGE_VADDR, _end, EXTRA_PAGE) \</div><div class='ctx'> 				    + EARLY_SEGMENT_EXTRA_PAGES))</div><div class='ctx'> </div><div class='del'>-#define INIT_IDMAP_DIR_PAGES	(EARLY_PAGES(INIT_IDMAP_PGTABLE_LEVELS, KIMAGE_VADDR, _end, 1))</div><div class='add'>+#define INIT_IDMAP_DIR_PAGES	(EARLY_PAGES(INIT_IDMAP_PGTABLE_LEVELS, KIMAGE_VADDR, kimage_limit, 1))</div><div class='ctx'> #define INIT_IDMAP_DIR_SIZE	((INIT_IDMAP_DIR_PAGES + EARLY_IDMAP_EXTRA_PAGES) * PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> #define INIT_IDMAP_FDT_PAGES	(EARLY_PAGES(INIT_IDMAP_PGTABLE_LEVELS, 0UL, UL(MAX_FDT_SIZE), 1) - 1)</div><div class='head'>diff --git a/arch/arm64/include/asm/kgdb.h b/arch/arm64/include/asm/kgdb.h<br/>index 21fc85e9d2be..3184f5d1e3ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kgdb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kgdb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kgdb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kgdb.h</a></div><div class='hunk'>@@ -24,6 +24,18 @@ static inline void arch_kgdb_breakpoint(void)</div><div class='ctx'> extern void kgdb_handle_bus_error(void);</div><div class='ctx'> extern int kgdb_fault_expected;</div><div class='ctx'> </div><div class='add'>+int kgdb_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+int kgdb_compiled_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+#ifdef CONFIG_KGDB</div><div class='add'>+int kgdb_single_step_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+#else</div><div class='add'>+static inline int kgdb_single_step_handler(struct pt_regs *regs,</div><div class='add'>+	unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	return DBG_HOOK_ERROR;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h<br/>index be7a3680dadf..f2782560647b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kprobes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kprobes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kprobes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kprobes.h</a></div><div class='hunk'>@@ -41,4 +41,12 @@ void __kretprobe_trampoline(void);</div><div class='ctx'> void __kprobes *trampoline_probe_handler(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KPROBES */</div><div class='add'>+</div><div class='add'>+int __kprobes kprobe_brk_handler(struct pt_regs *regs,</div><div class='add'>+				 unsigned long esr);</div><div class='add'>+int __kprobes kprobe_ss_brk_handler(struct pt_regs *regs,</div><div class='add'>+				 unsigned long esr);</div><div class='add'>+int __kprobes kretprobe_brk_handler(struct pt_regs *regs,</div><div class='add'>+				 unsigned long esr);</div><div class='add'>+</div><div class='ctx'> #endif /* _ARM_KPROBES_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h<br/>index 109a85ee6910..1da290aeedce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_arm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_arm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_arm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_arm.h</a></div><div class='hunk'>@@ -12,67 +12,70 @@</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Hyp Configuration Register (HCR) bits */</div><div class='del'>-</div><div class='del'>-#define HCR_TID5	(UL(1) &lt;&lt; 58)</div><div class='del'>-#define HCR_DCT		(UL(1) &lt;&lt; 57)</div><div class='del'>-#define HCR_ATA_SHIFT	56</div><div class='del'>-#define HCR_ATA		(UL(1) &lt;&lt; HCR_ATA_SHIFT)</div><div class='del'>-#define HCR_TTLBOS	(UL(1) &lt;&lt; 55)</div><div class='del'>-#define HCR_TTLBIS	(UL(1) &lt;&lt; 54)</div><div class='del'>-#define HCR_ENSCXT	(UL(1) &lt;&lt; 53)</div><div class='del'>-#define HCR_TOCU	(UL(1) &lt;&lt; 52)</div><div class='del'>-#define HCR_AMVOFFEN	(UL(1) &lt;&lt; 51)</div><div class='del'>-#define HCR_TICAB	(UL(1) &lt;&lt; 50)</div><div class='del'>-#define HCR_TID4	(UL(1) &lt;&lt; 49)</div><div class='del'>-#define HCR_FIEN	(UL(1) &lt;&lt; 47)</div><div class='del'>-#define HCR_FWB		(UL(1) &lt;&lt; 46)</div><div class='del'>-#define HCR_NV2		(UL(1) &lt;&lt; 45)</div><div class='del'>-#define HCR_AT		(UL(1) &lt;&lt; 44)</div><div class='del'>-#define HCR_NV1		(UL(1) &lt;&lt; 43)</div><div class='del'>-#define HCR_NV		(UL(1) &lt;&lt; 42)</div><div class='del'>-#define HCR_API		(UL(1) &lt;&lt; 41)</div><div class='del'>-#define HCR_APK		(UL(1) &lt;&lt; 40)</div><div class='del'>-#define HCR_TEA		(UL(1) &lt;&lt; 37)</div><div class='del'>-#define HCR_TERR	(UL(1) &lt;&lt; 36)</div><div class='del'>-#define HCR_TLOR	(UL(1) &lt;&lt; 35)</div><div class='del'>-#define HCR_E2H		(UL(1) &lt;&lt; 34)</div><div class='del'>-#define HCR_ID		(UL(1) &lt;&lt; 33)</div><div class='del'>-#define HCR_CD		(UL(1) &lt;&lt; 32)</div><div class='del'>-#define HCR_RW_SHIFT	31</div><div class='del'>-#define HCR_RW		(UL(1) &lt;&lt; HCR_RW_SHIFT)</div><div class='del'>-#define HCR_TRVM	(UL(1) &lt;&lt; 30)</div><div class='del'>-#define HCR_HCD		(UL(1) &lt;&lt; 29)</div><div class='del'>-#define HCR_TDZ		(UL(1) &lt;&lt; 28)</div><div class='del'>-#define HCR_TGE		(UL(1) &lt;&lt; 27)</div><div class='del'>-#define HCR_TVM		(UL(1) &lt;&lt; 26)</div><div class='del'>-#define HCR_TTLB	(UL(1) &lt;&lt; 25)</div><div class='del'>-#define HCR_TPU		(UL(1) &lt;&lt; 24)</div><div class='del'>-#define HCR_TPC		(UL(1) &lt;&lt; 23) /* HCR_TPCP if FEAT_DPB */</div><div class='del'>-#define HCR_TSW		(UL(1) &lt;&lt; 22)</div><div class='del'>-#define HCR_TACR	(UL(1) &lt;&lt; 21)</div><div class='del'>-#define HCR_TIDCP	(UL(1) &lt;&lt; 20)</div><div class='del'>-#define HCR_TSC		(UL(1) &lt;&lt; 19)</div><div class='del'>-#define HCR_TID3	(UL(1) &lt;&lt; 18)</div><div class='del'>-#define HCR_TID2	(UL(1) &lt;&lt; 17)</div><div class='del'>-#define HCR_TID1	(UL(1) &lt;&lt; 16)</div><div class='del'>-#define HCR_TID0	(UL(1) &lt;&lt; 15)</div><div class='del'>-#define HCR_TWE		(UL(1) &lt;&lt; 14)</div><div class='del'>-#define HCR_TWI		(UL(1) &lt;&lt; 13)</div><div class='del'>-#define HCR_DC		(UL(1) &lt;&lt; 12)</div><div class='del'>-#define HCR_BSU		(3 &lt;&lt; 10)</div><div class='del'>-#define HCR_BSU_IS	(UL(1) &lt;&lt; 10)</div><div class='del'>-#define HCR_FB		(UL(1) &lt;&lt; 9)</div><div class='del'>-#define HCR_VSE		(UL(1) &lt;&lt; 8)</div><div class='del'>-#define HCR_VI		(UL(1) &lt;&lt; 7)</div><div class='del'>-#define HCR_VF		(UL(1) &lt;&lt; 6)</div><div class='del'>-#define HCR_AMO		(UL(1) &lt;&lt; 5)</div><div class='del'>-#define HCR_IMO		(UL(1) &lt;&lt; 4)</div><div class='del'>-#define HCR_FMO		(UL(1) &lt;&lt; 3)</div><div class='del'>-#define HCR_PTW		(UL(1) &lt;&lt; 2)</div><div class='del'>-#define HCR_SWIO	(UL(1) &lt;&lt; 1)</div><div class='del'>-#define HCR_VM		(UL(1) &lt;&lt; 0)</div><div class='del'>-#define HCR_RES0	((UL(1) &lt;&lt; 48) | (UL(1) &lt;&lt; 39))</div><div class='add'>+/*</div><div class='add'>+ * Because I'm terribly lazy and that repainting the whole of the KVM</div><div class='add'>+ * code with the proper names is a pain, use a helper to map the names</div><div class='add'>+ * inherited from AArch32 with the new fancy nomenclature. One day...</div><div class='add'>+ */</div><div class='add'>+#define	__HCR(x)	HCR_EL2_##x</div><div class='add'>+</div><div class='add'>+#define HCR_TID5	__HCR(TID5)</div><div class='add'>+#define HCR_DCT		__HCR(DCT)</div><div class='add'>+#define HCR_ATA_SHIFT	__HCR(ATA_SHIFT)</div><div class='add'>+#define HCR_ATA		__HCR(ATA)</div><div class='add'>+#define HCR_TTLBOS	__HCR(TTLBOS)</div><div class='add'>+#define HCR_TTLBIS	__HCR(TTLBIS)</div><div class='add'>+#define HCR_ENSCXT	__HCR(EnSCXT)</div><div class='add'>+#define HCR_TOCU	__HCR(TOCU)</div><div class='add'>+#define HCR_AMVOFFEN	__HCR(AMVOFFEN)</div><div class='add'>+#define HCR_TICAB	__HCR(TICAB)</div><div class='add'>+#define HCR_TID4	__HCR(TID4)</div><div class='add'>+#define HCR_FIEN	__HCR(FIEN)</div><div class='add'>+#define HCR_FWB		__HCR(FWB)</div><div class='add'>+#define HCR_NV2		__HCR(NV2)</div><div class='add'>+#define HCR_AT		__HCR(AT)</div><div class='add'>+#define HCR_NV1		__HCR(NV1)</div><div class='add'>+#define HCR_NV		__HCR(NV)</div><div class='add'>+#define HCR_API		__HCR(API)</div><div class='add'>+#define HCR_APK		__HCR(APK)</div><div class='add'>+#define HCR_TEA		__HCR(TEA)</div><div class='add'>+#define HCR_TERR	__HCR(TERR)</div><div class='add'>+#define HCR_TLOR	__HCR(TLOR)</div><div class='add'>+#define HCR_E2H		__HCR(E2H)</div><div class='add'>+#define HCR_ID		__HCR(ID)</div><div class='add'>+#define HCR_CD		__HCR(CD)</div><div class='add'>+#define HCR_RW		__HCR(RW)</div><div class='add'>+#define HCR_TRVM	__HCR(TRVM)</div><div class='add'>+#define HCR_HCD		__HCR(HCD)</div><div class='add'>+#define HCR_TDZ		__HCR(TDZ)</div><div class='add'>+#define HCR_TGE		__HCR(TGE)</div><div class='add'>+#define HCR_TVM		__HCR(TVM)</div><div class='add'>+#define HCR_TTLB	__HCR(TTLB)</div><div class='add'>+#define HCR_TPU		__HCR(TPU)</div><div class='add'>+#define HCR_TPC		__HCR(TPCP)</div><div class='add'>+#define HCR_TSW		__HCR(TSW)</div><div class='add'>+#define HCR_TACR	__HCR(TACR)</div><div class='add'>+#define HCR_TIDCP	__HCR(TIDCP)</div><div class='add'>+#define HCR_TSC		__HCR(TSC)</div><div class='add'>+#define HCR_TID3	__HCR(TID3)</div><div class='add'>+#define HCR_TID2	__HCR(TID2)</div><div class='add'>+#define HCR_TID1	__HCR(TID1)</div><div class='add'>+#define HCR_TID0	__HCR(TID0)</div><div class='add'>+#define HCR_TWE		__HCR(TWE)</div><div class='add'>+#define HCR_TWI		__HCR(TWI)</div><div class='add'>+#define HCR_DC		__HCR(DC)</div><div class='add'>+#define HCR_BSU		__HCR(BSU)</div><div class='add'>+#define HCR_BSU_IS	__HCR(BSU_IS)</div><div class='add'>+#define HCR_FB		__HCR(FB)</div><div class='add'>+#define HCR_VSE		__HCR(VSE)</div><div class='add'>+#define HCR_VI		__HCR(VI)</div><div class='add'>+#define HCR_VF		__HCR(VF)</div><div class='add'>+#define HCR_AMO		__HCR(AMO)</div><div class='add'>+#define HCR_IMO		__HCR(IMO)</div><div class='add'>+#define HCR_FMO		__HCR(FMO)</div><div class='add'>+#define HCR_PTW		__HCR(PTW)</div><div class='add'>+#define HCR_SWIO	__HCR(SWIO)</div><div class='add'>+#define HCR_VM		__HCR(VM)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The bits we set in HCR:</div><div class='hunk'>@@ -92,17 +95,17 @@</div><div class='ctx'>  * SWIO:	Turn set/way invalidates into set/way clean+invalidate</div><div class='ctx'>  * PTW:		Take a stage2 fault if a stage1 walk steps in device memory</div><div class='ctx'>  * TID3:	Trap EL1 reads of group 3 ID registers</div><div class='del'>- * TID2:	Trap CTR_EL0, CCSIDR2_EL1, CLIDR_EL1, and CSSELR_EL1</div><div class='add'>+ * TID1:	Trap REVIDR_EL1, AIDR_EL1, and SMIDR_EL1</div><div class='ctx'>  */</div><div class='ctx'> #define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \</div><div class='ctx'> 			 HCR_BSU_IS | HCR_FB | HCR_TACR | \</div><div class='ctx'> 			 HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \</div><div class='del'>-			 HCR_FMO | HCR_IMO | HCR_PTW | HCR_TID3)</div><div class='add'>+			 HCR_FMO | HCR_IMO | HCR_PTW | HCR_TID3 | HCR_TID1)</div><div class='ctx'> #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)</div><div class='ctx'> #define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)</div><div class='del'>-#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)</div><div class='add'>+#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H | HCR_AMO | HCR_IMO | HCR_FMO)</div><div class='ctx'> </div><div class='del'>-#define HCRX_HOST_FLAGS (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM)</div><div class='add'>+#define MPAMHCR_HOST_FLAGS	0</div><div class='ctx'> </div><div class='ctx'> /* TCR_EL2 Registers bits */</div><div class='ctx'> #define TCR_EL2_DS		(1UL &lt;&lt; 32)</div><div class='hunk'>@@ -118,7 +121,7 @@</div><div class='ctx'> #define TCR_EL2_IRGN0_MASK	TCR_IRGN0_MASK</div><div class='ctx'> #define TCR_EL2_T0SZ_MASK	0x3f</div><div class='ctx'> #define TCR_EL2_MASK	(TCR_EL2_TG0_MASK | TCR_EL2_SH0_MASK | \</div><div class='del'>-			 TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK)</div><div class='add'>+			 TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK)</div><div class='ctx'> </div><div class='ctx'> /* VTCR_EL2 Registers bits */</div><div class='ctx'> #define VTCR_EL2_DS		TCR_EL2_DS</div><div class='hunk'>@@ -299,7 +302,7 @@</div><div class='ctx'> #define CPTR_EL2_TSM	(1 &lt;&lt; 12)</div><div class='ctx'> #define CPTR_EL2_TFP	(1 &lt;&lt; CPTR_EL2_TFP_SHIFT)</div><div class='ctx'> #define CPTR_EL2_TZ	(1 &lt;&lt; 8)</div><div class='del'>-#define CPTR_NVHE_EL2_RES1	0x000032ff /* known RES1 bits in CPTR_EL2 (nVHE) */</div><div class='add'>+#define CPTR_NVHE_EL2_RES1	(BIT(13) | BIT(9) | GENMASK(7, 0))</div><div class='ctx'> #define CPTR_NVHE_EL2_RES0	(GENMASK(63, 32) |	\</div><div class='ctx'> 				 GENMASK(29, 21) |	\</div><div class='ctx'> 				 GENMASK(19, 14) |	\</div><div class='hunk'>@@ -311,86 +314,20 @@</div><div class='ctx'> 				 GENMASK(19, 18) |	\</div><div class='ctx'> 				 GENMASK(15, 0))</div><div class='ctx'> </div><div class='del'>-/* Hyp Debug Configuration Register bits */</div><div class='del'>-#define MDCR_EL2_E2TB_MASK	(UL(0x3))</div><div class='del'>-#define MDCR_EL2_E2TB_SHIFT	(UL(24))</div><div class='del'>-#define MDCR_EL2_HPMFZS		(UL(1) &lt;&lt; 36)</div><div class='del'>-#define MDCR_EL2_HPMFZO		(UL(1) &lt;&lt; 29)</div><div class='del'>-#define MDCR_EL2_MTPME		(UL(1) &lt;&lt; 28)</div><div class='del'>-#define MDCR_EL2_TDCC		(UL(1) &lt;&lt; 27)</div><div class='del'>-#define MDCR_EL2_HLP		(UL(1) &lt;&lt; 26)</div><div class='del'>-#define MDCR_EL2_HCCD		(UL(1) &lt;&lt; 23)</div><div class='del'>-#define MDCR_EL2_TTRF		(UL(1) &lt;&lt; 19)</div><div class='del'>-#define MDCR_EL2_HPMD		(UL(1) &lt;&lt; 17)</div><div class='del'>-#define MDCR_EL2_TPMS		(UL(1) &lt;&lt; 14)</div><div class='del'>-#define MDCR_EL2_E2PB_MASK	(UL(0x3))</div><div class='del'>-#define MDCR_EL2_E2PB_SHIFT	(UL(12))</div><div class='del'>-#define MDCR_EL2_TDRA		(UL(1) &lt;&lt; 11)</div><div class='del'>-#define MDCR_EL2_TDOSA		(UL(1) &lt;&lt; 10)</div><div class='del'>-#define MDCR_EL2_TDA		(UL(1) &lt;&lt; 9)</div><div class='del'>-#define MDCR_EL2_TDE		(UL(1) &lt;&lt; 8)</div><div class='del'>-#define MDCR_EL2_HPME		(UL(1) &lt;&lt; 7)</div><div class='del'>-#define MDCR_EL2_TPM		(UL(1) &lt;&lt; 6)</div><div class='del'>-#define MDCR_EL2_TPMCR		(UL(1) &lt;&lt; 5)</div><div class='del'>-#define MDCR_EL2_HPMN_MASK	(UL(0x1F))</div><div class='del'>-#define MDCR_EL2_RES0		(GENMASK(63, 37) |	\</div><div class='del'>-				 GENMASK(35, 30) |	\</div><div class='del'>-				 GENMASK(25, 24) |	\</div><div class='del'>-				 GENMASK(22, 20) |	\</div><div class='del'>-				 BIT(18) |		\</div><div class='del'>-				 GENMASK(16, 15))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * FGT register definitions</div><div class='del'>- *</div><div class='del'>- * RES0 and polarity masks as of DDI0487J.a, to be updated as needed.</div><div class='del'>- * We're not using the generated masks as they are usually ahead of</div><div class='del'>- * the published ARM ARM, which we use as a reference.</div><div class='del'>- *</div><div class='del'>- * Once we get to a point where the two describe the same thing, we'll</div><div class='del'>- * merge the definitions. One day.</div><div class='add'>+ * Polarity masks for HCRX_EL2, limited to the bits that we know about</div><div class='add'>+ * at this point in time. It doesn't mean that we actually *handle*</div><div class='add'>+ * them, but that at least those that are not advertised to a guest</div><div class='add'>+ * will be RES0 for that guest.</div><div class='ctx'>  */</div><div class='del'>-#define __HFGRTR_EL2_RES0	HFGxTR_EL2_RES0</div><div class='del'>-#define __HFGRTR_EL2_MASK	GENMASK(49, 0)</div><div class='del'>-#define __HFGRTR_EL2_nMASK	~(__HFGRTR_EL2_RES0 | __HFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any</div><div class='del'>- * future additions, define __HFGWTR* macros relative to __HFGRTR* ones.</div><div class='del'>- */</div><div class='del'>-#define __HFGRTR_ONLY_MASK	(BIT(46) | BIT(42) | BIT(40) | BIT(28) | \</div><div class='del'>-				 GENMASK(26, 25) | BIT(21) | BIT(18) | \</div><div class='del'>-				 GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))</div><div class='del'>-#define __HFGWTR_EL2_RES0	(__HFGRTR_EL2_RES0 | __HFGRTR_ONLY_MASK)</div><div class='del'>-#define __HFGWTR_EL2_MASK	(__HFGRTR_EL2_MASK &amp; ~__HFGRTR_ONLY_MASK)</div><div class='del'>-#define __HFGWTR_EL2_nMASK	~(__HFGWTR_EL2_RES0 | __HFGWTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HFGITR_EL2_RES0	HFGITR_EL2_RES0</div><div class='del'>-#define __HFGITR_EL2_MASK	(BIT(62) | BIT(60) | GENMASK(54, 0))</div><div class='del'>-#define __HFGITR_EL2_nMASK	~(__HFGITR_EL2_RES0 | __HFGITR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HDFGRTR_EL2_RES0	HDFGRTR_EL2_RES0</div><div class='del'>-#define __HDFGRTR_EL2_MASK	(BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \</div><div class='del'>-				 GENMASK(41, 40) | GENMASK(37, 22) | \</div><div class='del'>-				 GENMASK(19, 9) | GENMASK(7, 0))</div><div class='del'>-#define __HDFGRTR_EL2_nMASK	~(__HDFGRTR_EL2_RES0 | __HDFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HDFGWTR_EL2_RES0	HDFGWTR_EL2_RES0</div><div class='del'>-#define __HDFGWTR_EL2_MASK	(GENMASK(57, 52) | GENMASK(50, 48) | \</div><div class='del'>-				 GENMASK(46, 44) | GENMASK(42, 41) | \</div><div class='del'>-				 GENMASK(37, 35) | GENMASK(33, 31) | \</div><div class='del'>-				 GENMASK(29, 23) | GENMASK(21, 10) | \</div><div class='del'>-				 GENMASK(8, 7) | GENMASK(5, 0))</div><div class='del'>-#define __HDFGWTR_EL2_nMASK	~(__HDFGWTR_EL2_RES0 | __HDFGWTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HAFGRTR_EL2_RES0	HAFGRTR_EL2_RES0</div><div class='del'>-#define __HAFGRTR_EL2_MASK	(GENMASK(49, 17) | GENMASK(4, 0))</div><div class='del'>-#define __HAFGRTR_EL2_nMASK	~(__HAFGRTR_EL2_RES0 | __HAFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-/* Similar definitions for HCRX_EL2 */</div><div class='del'>-#define __HCRX_EL2_RES0         HCRX_EL2_RES0</div><div class='del'>-#define __HCRX_EL2_MASK		(BIT(6))</div><div class='del'>-#define __HCRX_EL2_nMASK	~(__HCRX_EL2_RES0 | __HCRX_EL2_MASK)</div><div class='add'>+#define __HCRX_EL2_MASK		(BIT_ULL(6))</div><div class='add'>+#define __HCRX_EL2_nMASK	(GENMASK_ULL(24, 14) | \</div><div class='add'>+				 GENMASK_ULL(11, 7)  | \</div><div class='add'>+				 GENMASK_ULL(5, 0))</div><div class='add'>+#define __HCRX_EL2_RES0		~(__HCRX_EL2_nMASK | __HCRX_EL2_MASK)</div><div class='add'>+#define __HCRX_EL2_RES1		~(__HCRX_EL2_nMASK | \</div><div class='add'>+				  __HCRX_EL2_MASK  | \</div><div class='add'>+				  __HCRX_EL2_RES0)</div><div class='ctx'> </div><div class='ctx'> /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */</div><div class='ctx'> #define HPFAR_MASK	(~UL(0xf))</div><div class='hunk'>@@ -419,8 +356,6 @@</div><div class='ctx'> 	ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \</div><div class='ctx'> 	ECN(BKPT32), ECN(VECTOR32), ECN(BRK64), ECN(ERET)</div><div class='ctx'> </div><div class='del'>-#define CPACR_EL1_TTA		(1 &lt;&lt; 28)</div><div class='del'>-</div><div class='ctx'> #define kvm_mode_names				\</div><div class='ctx'> 	{ PSR_MODE_EL0t,	"EL0t" },	\</div><div class='ctx'> 	{ PSR_MODE_EL1t,	"EL1t" },	\</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h<br/>index b36a3b6cc011..9da54d4ee49e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_asm.h</a></div><div class='hunk'>@@ -53,8 +53,7 @@</div><div class='ctx'> enum __kvm_host_smccc_func {</div><div class='ctx'> 	/* Hypercalls available only prior to pKVM finalisation */</div><div class='ctx'> 	/* __KVM_HOST_SMCCC_FUNC___kvm_hyp_init */</div><div class='del'>-	__KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1,</div><div class='del'>-	__KVM_HOST_SMCCC_FUNC___pkvm_init,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_init = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs,</div><div class='hunk'>@@ -65,6 +64,12 @@ enum __kvm_host_smccc_func {</div><div class='ctx'> 	/* Hypercalls available after pKVM finalisation */</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_hyp,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_share_guest,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_guest,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_relax_perms_guest,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_wrprotect_guest,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_test_clear_young_guest,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_host_mkyoung_guest,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___kvm_adjust_pc,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___kvm_vcpu_run,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context,</div><div class='hunk'>@@ -76,10 +81,14 @@ enum __kvm_host_smccc_func {</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___vgic_v3_save_vmcr_aprs,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___vgic_v3_restore_vmcr_aprs,</div><div class='del'>-	__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_init_traps,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_reserve_vm,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_unreserve_vm,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_init_vm,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_init_vcpu,</div><div class='ctx'> 	__KVM_HOST_SMCCC_FUNC___pkvm_teardown_vm,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_load,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_put,</div><div class='add'>+	__KVM_HOST_SMCCC_FUNC___pkvm_tlb_flush_vmid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DECLARE_KVM_VHE_SYM(sym)	extern char sym[]</div><div class='hunk'>@@ -178,6 +187,7 @@ struct kvm_nvhe_init_params {</div><div class='ctx'> 	unsigned long hcr_el2;</div><div class='ctx'> 	unsigned long vttbr;</div><div class='ctx'> 	unsigned long vtcr;</div><div class='add'>+	unsigned long tmp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -247,8 +257,6 @@ extern void __kvm_adjust_pc(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern u64 __vgic_v3_get_gic_config(void);</div><div class='ctx'> extern void __vgic_v3_init_lrs(void);</div><div class='ctx'> </div><div class='del'>-extern u64 __kvm_get_mdcr_el2(void);</div><div class='del'>-</div><div class='ctx'> #define __KVM_EXTABLE(from, to)						\</div><div class='ctx'> 	"	.pushsection	__kvm_ex_table, \"a\"\n"		\</div><div class='ctx'> 	"	.align		3\n"					\</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h<br/>index a601a9305b10..c9eab316398e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_emulate.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_emulate.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_emulate.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_emulate.h</a></div><div class='hunk'>@@ -45,16 +45,39 @@ bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_skip_instr32(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> void kvm_inject_undefined(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_inject_vabt(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);</div><div class='del'>-void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);</div><div class='add'>+int kvm_inject_serror_esr(struct kvm_vcpu *vcpu, u64 esr);</div><div class='add'>+int kvm_inject_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr);</div><div class='ctx'> void kvm_inject_size_fault(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+static inline int kvm_inject_sea_dabt(struct kvm_vcpu *vcpu, u64 addr)</div><div class='add'>+{</div><div class='add'>+	return kvm_inject_sea(vcpu, false, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int kvm_inject_sea_iabt(struct kvm_vcpu *vcpu, u64 addr)</div><div class='add'>+{</div><div class='add'>+	return kvm_inject_sea(vcpu, true, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int kvm_inject_serror(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * ESR_ELx.ISV (later renamed to IDS) indicates whether or not</div><div class='add'>+	 * ESR_ELx.ISS contains IMPLEMENTATION DEFINED syndrome information.</div><div class='add'>+	 *</div><div class='add'>+	 * Set the bit when injecting an SError w/o an ESR to indicate ISS</div><div class='add'>+	 * does not follow the architected format.</div><div class='add'>+	 */</div><div class='add'>+	return kvm_inject_serror_esr(vcpu, ESR_ELx_ISV);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kvm_vcpu_wfi(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_inject_nested_sync(struct kvm_vcpu *vcpu, u64 esr_el2);</div><div class='ctx'> int kvm_inject_nested_irq(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_inject_nested_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr);</div><div class='add'>+int kvm_inject_nested_serror(struct kvm_vcpu *vcpu, u64 esr);</div><div class='ctx'> </div><div class='ctx'> static inline void kvm_inject_nested_sve_trap(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -184,29 +207,49 @@ static inline bool vcpu_is_el2(const struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return vcpu_is_el2_ctxt(&amp;vcpu-&gt;arch.ctxt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __vcpu_el2_e2h_is_set(const struct kvm_cpu_context *ctxt)</div><div class='add'>+static inline bool vcpu_el2_e2h_is_set(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	return (!cpus_have_final_cap(ARM64_HAS_HCR_NV1) ||</div><div class='del'>-		(ctxt_sys_reg(ctxt, HCR_EL2) &amp; HCR_E2H));</div><div class='add'>+		(__vcpu_sys_reg(vcpu, HCR_EL2) &amp; HCR_E2H));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool vcpu_el2_e2h_is_set(const struct kvm_vcpu *vcpu)</div><div class='add'>+static inline bool vcpu_el2_tge_is_set(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return __vcpu_el2_e2h_is_set(&amp;vcpu-&gt;arch.ctxt);</div><div class='add'>+	return ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, HCR_EL2) &amp; HCR_TGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __vcpu_el2_tge_is_set(const struct kvm_cpu_context *ctxt)</div><div class='add'>+static inline bool vcpu_el2_amo_is_set(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return ctxt_sys_reg(ctxt, HCR_EL2) &amp; HCR_TGE;</div><div class='del'>-}</div><div class='add'>+	/*</div><div class='add'>+	 * DDI0487L.b Known Issue D22105</div><div class='add'>+	 *</div><div class='add'>+	 * When executing at EL2 and HCR_EL2.{E2H,TGE} = {1, 0} it is</div><div class='add'>+	 * IMPLEMENTATION DEFINED whether the effective value of HCR_EL2.AMO</div><div class='add'>+	 * is the value programmed or 1.</div><div class='add'>+	 *</div><div class='add'>+	 * Make the implementation choice of treating the effective value as 1 as</div><div class='add'>+	 * we cannot subsequently catch changes to TGE or AMO that would</div><div class='add'>+	 * otherwise lead to the SError becoming deliverable.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_is_el2(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu) &amp;&amp; !vcpu_el2_tge_is_set(vcpu))</div><div class='add'>+		return true;</div><div class='ctx'> </div><div class='del'>-static inline bool vcpu_el2_tge_is_set(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return __vcpu_el2_tge_is_set(&amp;vcpu-&gt;arch.ctxt);</div><div class='add'>+	return ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, HCR_EL2) &amp; HCR_AMO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __is_hyp_ctxt(const struct kvm_cpu_context *ctxt)</div><div class='add'>+static inline bool is_hyp_ctxt(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	bool e2h, tge;</div><div class='add'>+	u64 hcr;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='add'>+</div><div class='add'>+	e2h = (hcr &amp; HCR_E2H);</div><div class='add'>+	tge = (hcr &amp; HCR_TGE);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We are in a hypervisor context if the vcpu mode is EL2 or</div><div class='ctx'> 	 * E2H and TGE bits are set. The latter means we are in the user space</div><div class='hunk'>@@ -215,14 +258,26 @@ static inline bool __is_hyp_ctxt(const struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	 * Note that the HCR_EL2.{E2H,TGE}={0,1} isn't really handled in the</div><div class='ctx'> 	 * rest of the KVM code, and will result in a misbehaving guest.</div><div class='ctx'> 	 */</div><div class='del'>-	return vcpu_is_el2_ctxt(ctxt) ||</div><div class='del'>-		(__vcpu_el2_e2h_is_set(ctxt) &amp;&amp; __vcpu_el2_tge_is_set(ctxt)) ||</div><div class='del'>-		__vcpu_el2_tge_is_set(ctxt);</div><div class='add'>+	return vcpu_is_el2(vcpu) || (e2h &amp;&amp; tge) || tge;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool is_hyp_ctxt(const struct kvm_vcpu *vcpu)</div><div class='add'>+static inline bool vcpu_is_host_el0(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return is_hyp_ctxt(vcpu) &amp;&amp; !vcpu_is_el2(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_nested_ctxt(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool vserror_state_is_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return vcpu_has_nv(vcpu) &amp;&amp; __is_hyp_ctxt(&amp;vcpu-&gt;arch.ctxt);</div><div class='add'>+	if (!is_nested_ctxt(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return vcpu_el2_amo_is_set(vcpu) ||</div><div class='add'>+	       (__vcpu_sys_reg(vcpu, HCRX_EL2) &amp; HCRX_EL2_TMEA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -276,6 +331,19 @@ static __always_inline u64 kvm_vcpu_get_esr(const struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return vcpu-&gt;arch.fault.esr_el2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool guest_hyp_wfx_traps_enabled(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+	bool is_wfe = !!(esr &amp; ESR_ELx_WFx_ISS_WFE);</div><div class='add'>+	u64 hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu) || vcpu_is_el2(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return ((is_wfe &amp;&amp; (hcr_el2 &amp; HCR_TWE)) ||</div><div class='add'>+		(!is_wfe &amp;&amp; (hcr_el2 &amp; HCR_TWI)));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __always_inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='hunk'>@@ -293,7 +361,12 @@ static __always_inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vc</div><div class='ctx'> </div><div class='ctx'> static __always_inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return ((phys_addr_t)vcpu-&gt;arch.fault.hpfar_el2 &amp; HPFAR_MASK) &lt;&lt; 8;</div><div class='add'>+	u64 hpfar = vcpu-&gt;arch.fault.hpfar_el2;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!(hpfar &amp; HPFAR_EL2_NS)))</div><div class='add'>+		return INVALID_GPA;</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(HPFAR_EL2_FIPA, hpfar) &lt;&lt; 12;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -452,21 +525,29 @@ static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vcpu_mode_is_32bit(vcpu)) {</div><div class='ctx'> 		*vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT;</div><div class='ctx'> 	} else {</div><div class='del'>-		u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);</div><div class='add'>+		enum vcpu_sysreg r;</div><div class='add'>+		u64 sctlr;</div><div class='add'>+</div><div class='add'>+		r = vcpu_has_nv(vcpu) ? SCTLR_EL2 : SCTLR_EL1;</div><div class='add'>+</div><div class='add'>+		sctlr = vcpu_read_sys_reg(vcpu, r);</div><div class='ctx'> 		sctlr |= SCTLR_ELx_EE;</div><div class='del'>-		vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1);</div><div class='add'>+		vcpu_write_sys_reg(vcpu, sctlr, r);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	enum vcpu_sysreg r;</div><div class='add'>+	u64 bit;</div><div class='add'>+</div><div class='ctx'> 	if (vcpu_mode_is_32bit(vcpu))</div><div class='ctx'> 		return !!(*vcpu_cpsr(vcpu) &amp; PSR_AA32_E_BIT);</div><div class='ctx'> </div><div class='del'>-	if (vcpu_mode_priv(vcpu))</div><div class='del'>-		return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) &amp; SCTLR_ELx_EE);</div><div class='del'>-	else</div><div class='del'>-		return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) &amp; SCTLR_EL1_E0E);</div><div class='add'>+	r = is_hyp_ctxt(vcpu) ? SCTLR_EL2 : SCTLR_EL1;</div><div class='add'>+	bit = vcpu_mode_priv(vcpu) ? SCTLR_ELx_EE : SCTLR_EL1_E0E;</div><div class='add'>+</div><div class='add'>+	return vcpu_read_sys_reg(vcpu, r) &amp; bit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -544,110 +625,6 @@ static __always_inline void kvm_incr_pc(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu_set_flag((v), e);					\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-#define __build_check_all_or_none(r, bits)				\</div><div class='del'>-	BUILD_BUG_ON(((r) &amp; (bits)) &amp;&amp; ((r) &amp; (bits)) != (bits))</div><div class='del'>-</div><div class='del'>-#define __cpacr_to_cptr_clr(clr, set)					\</div><div class='del'>-	({								\</div><div class='del'>-		u64 cptr = 0;						\</div><div class='del'>-									\</div><div class='del'>-		if ((set) &amp; CPACR_ELx_FPEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TFP;				\</div><div class='del'>-		if ((set) &amp; CPACR_ELx_ZEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TZ;				\</div><div class='del'>-		if ((set) &amp; CPACR_ELx_SMEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TSM;				\</div><div class='del'>-		if ((clr) &amp; CPACR_ELx_TTA)				\</div><div class='del'>-			cptr |= CPTR_EL2_TTA;				\</div><div class='del'>-		if ((clr) &amp; CPTR_EL2_TAM)				\</div><div class='del'>-			cptr |= CPTR_EL2_TAM;				\</div><div class='del'>-		if ((clr) &amp; CPTR_EL2_TCPAC)				\</div><div class='del'>-			cptr |= CPTR_EL2_TCPAC;				\</div><div class='del'>-									\</div><div class='del'>-		cptr;							\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define __cpacr_to_cptr_set(clr, set)					\</div><div class='del'>-	({								\</div><div class='del'>-		u64 cptr = 0;						\</div><div class='del'>-									\</div><div class='del'>-		if ((clr) &amp; CPACR_ELx_FPEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TFP;				\</div><div class='del'>-		if ((clr) &amp; CPACR_ELx_ZEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TZ;				\</div><div class='del'>-		if ((clr) &amp; CPACR_ELx_SMEN)				\</div><div class='del'>-			cptr |= CPTR_EL2_TSM;				\</div><div class='del'>-		if ((set) &amp; CPACR_ELx_TTA)				\</div><div class='del'>-			cptr |= CPTR_EL2_TTA;				\</div><div class='del'>-		if ((set) &amp; CPTR_EL2_TAM)				\</div><div class='del'>-			cptr |= CPTR_EL2_TAM;				\</div><div class='del'>-		if ((set) &amp; CPTR_EL2_TCPAC)				\</div><div class='del'>-			cptr |= CPTR_EL2_TCPAC;				\</div><div class='del'>-									\</div><div class='del'>-		cptr;							\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define cpacr_clear_set(clr, set)					\</div><div class='del'>-	do {								\</div><div class='del'>-		BUILD_BUG_ON((set) &amp; CPTR_VHE_EL2_RES0);		\</div><div class='del'>-		BUILD_BUG_ON((clr) &amp; CPACR_ELx_E0POE);			\</div><div class='del'>-		__build_check_all_or_none((clr), CPACR_ELx_FPEN);	\</div><div class='del'>-		__build_check_all_or_none((set), CPACR_ELx_FPEN);	\</div><div class='del'>-		__build_check_all_or_none((clr), CPACR_ELx_ZEN);	\</div><div class='del'>-		__build_check_all_or_none((set), CPACR_ELx_ZEN);	\</div><div class='del'>-		__build_check_all_or_none((clr), CPACR_ELx_SMEN);	\</div><div class='del'>-		__build_check_all_or_none((set), CPACR_ELx_SMEN);	\</div><div class='del'>-									\</div><div class='del'>-		if (has_vhe() || has_hvhe())				\</div><div class='del'>-			sysreg_clear_set(cpacr_el1, clr, set);		\</div><div class='del'>-		else							\</div><div class='del'>-			sysreg_clear_set(cptr_el2,			\</div><div class='del'>-					 __cpacr_to_cptr_clr(clr, set),	\</div><div class='del'>-					 __cpacr_to_cptr_set(clr, set));\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-static __always_inline void kvm_write_cptr_el2(u64 val)</div><div class='del'>-{</div><div class='del'>-	if (has_vhe() || has_hvhe())</div><div class='del'>-		write_sysreg(val, cpacr_el1);</div><div class='del'>-	else</div><div class='del'>-		write_sysreg(val, cptr_el2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline u64 kvm_get_reset_cptr_el2(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 val;</div><div class='del'>-</div><div class='del'>-	if (has_vhe()) {</div><div class='del'>-		val = (CPACR_ELx_FPEN | CPACR_EL1_ZEN_EL1EN);</div><div class='del'>-		if (cpus_have_final_cap(ARM64_SME))</div><div class='del'>-			val |= CPACR_EL1_SMEN_EL1EN;</div><div class='del'>-	} else if (has_hvhe()) {</div><div class='del'>-		val = CPACR_ELx_FPEN;</div><div class='del'>-</div><div class='del'>-		if (!vcpu_has_sve(vcpu) || !guest_owns_fp_regs())</div><div class='del'>-			val |= CPACR_ELx_ZEN;</div><div class='del'>-		if (cpus_have_final_cap(ARM64_SME))</div><div class='del'>-			val |= CPACR_ELx_SMEN;</div><div class='del'>-	} else {</div><div class='del'>-		val = CPTR_NVHE_EL2_RES1;</div><div class='del'>-</div><div class='del'>-		if (vcpu_has_sve(vcpu) &amp;&amp; guest_owns_fp_regs())</div><div class='del'>-			val |= CPTR_EL2_TZ;</div><div class='del'>-		if (cpus_have_final_cap(ARM64_SME))</div><div class='del'>-			val &amp;= ~CPTR_EL2_TSM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 val = kvm_get_reset_cptr_el2(vcpu);</div><div class='del'>-</div><div class='del'>-	kvm_write_cptr_el2(val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Returns a 'sanitised' view of CPTR_EL2, translating from nVHE to the VHE</div><div class='ctx'>  * format if E2H isn't set.</div><div class='hunk'>@@ -680,7 +657,7 @@ static inline bool ____cptr_xen_trap_enabled(const struct kvm_vcpu *vcpu,</div><div class='ctx'> #define __guest_hyp_cptr_xen_trap_enabled(vcpu, xen)				\</div><div class='ctx'> 	(!vcpu_has_nv(vcpu) ? false :						\</div><div class='ctx'> 	 ____cptr_xen_trap_enabled(vcpu,					\</div><div class='del'>-				   SYS_FIELD_GET(CPACR_ELx, xen,		\</div><div class='add'>+				   SYS_FIELD_GET(CPACR_EL1, xen,		\</div><div class='ctx'> 						 vcpu_sanitised_cptr_el2(vcpu))))</div><div class='ctx'> </div><div class='ctx'> static inline bool guest_hyp_fpsimd_traps_enabled(const struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -693,4 +670,30 @@ static inline bool guest_hyp_sve_traps_enabled(const struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return __guest_hyp_cptr_xen_trap_enabled(vcpu, ZEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void vcpu_set_hcrx(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_HCX)) {</div><div class='add'>+		/*</div><div class='add'>+		 * In general, all HCRX_EL2 bits are gated by a feature.</div><div class='add'>+		 * The only reason we can set SMPME without checking any</div><div class='add'>+		 * feature is that its effects are not directly observable</div><div class='add'>+		 * from the guest.</div><div class='add'>+		 */</div><div class='add'>+		vcpu-&gt;arch.hcrx_el2 = HCRX_EL2_SMPME;</div><div class='add'>+</div><div class='add'>+		if (kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))</div><div class='add'>+			vcpu-&gt;arch.hcrx_el2 |= (HCRX_EL2_MSCEn | HCRX_EL2_MCE2);</div><div class='add'>+</div><div class='add'>+		if (kvm_has_tcr2(kvm))</div><div class='add'>+			vcpu-&gt;arch.hcrx_el2 |= HCRX_EL2_TCR2En;</div><div class='add'>+</div><div class='add'>+		if (kvm_has_fpmr(kvm))</div><div class='add'>+			vcpu-&gt;arch.hcrx_el2 |= HCRX_EL2_EnFPM;</div><div class='add'>+</div><div class='add'>+		if (kvm_has_sctlr2(kvm))</div><div class='add'>+			vcpu-&gt;arch.hcrx_el2 |= HCRX_EL2_SCTLR2En;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> #endif /* __ARM64_KVM_EMULATE_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h<br/>index 94cff508874b..b763293281c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_host.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_host.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -39,18 +39,21 @@</div><div class='ctx'> </div><div class='ctx'> #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS</div><div class='ctx'> </div><div class='del'>-#define KVM_VCPU_MAX_FEATURES 7</div><div class='add'>+#define KVM_VCPU_MAX_FEATURES 9</div><div class='ctx'> #define KVM_VCPU_VALID_FEATURES	(BIT(KVM_VCPU_MAX_FEATURES) - 1)</div><div class='ctx'> </div><div class='ctx'> #define KVM_REQ_SLEEP \</div><div class='ctx'> 	KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)</div><div class='del'>-#define KVM_REQ_IRQ_PENDING	KVM_ARCH_REQ(1)</div><div class='del'>-#define KVM_REQ_VCPU_RESET	KVM_ARCH_REQ(2)</div><div class='del'>-#define KVM_REQ_RECORD_STEAL	KVM_ARCH_REQ(3)</div><div class='del'>-#define KVM_REQ_RELOAD_GICv4	KVM_ARCH_REQ(4)</div><div class='del'>-#define KVM_REQ_RELOAD_PMU	KVM_ARCH_REQ(5)</div><div class='del'>-#define KVM_REQ_SUSPEND		KVM_ARCH_REQ(6)</div><div class='del'>-#define KVM_REQ_RESYNC_PMU_EL0	KVM_ARCH_REQ(7)</div><div class='add'>+#define KVM_REQ_IRQ_PENDING		KVM_ARCH_REQ(1)</div><div class='add'>+#define KVM_REQ_VCPU_RESET		KVM_ARCH_REQ(2)</div><div class='add'>+#define KVM_REQ_RECORD_STEAL		KVM_ARCH_REQ(3)</div><div class='add'>+#define KVM_REQ_RELOAD_GICv4		KVM_ARCH_REQ(4)</div><div class='add'>+#define KVM_REQ_RELOAD_PMU		KVM_ARCH_REQ(5)</div><div class='add'>+#define KVM_REQ_SUSPEND			KVM_ARCH_REQ(6)</div><div class='add'>+#define KVM_REQ_RESYNC_PMU_EL0		KVM_ARCH_REQ(7)</div><div class='add'>+#define KVM_REQ_NESTED_S2_UNMAP		KVM_ARCH_REQ(8)</div><div class='add'>+#define KVM_REQ_GUEST_HYP_IRQ_PENDING	KVM_ARCH_REQ(9)</div><div class='add'>+#define KVM_REQ_MAP_L1_VNCR_EL2		KVM_ARCH_REQ(10)</div><div class='ctx'> </div><div class='ctx'> #define KVM_DIRTY_LOG_MANUAL_CAPS   (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \</div><div class='ctx'> 				     KVM_DIRTY_LOG_INITIALLY_SET)</div><div class='hunk'>@@ -73,8 +76,6 @@ enum kvm_mode kvm_get_mode(void);</div><div class='ctx'> static inline enum kvm_mode kvm_get_mode(void) { return KVM_MODE_NONE; };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);</div><div class='del'>-</div><div class='ctx'> extern unsigned int __ro_after_init kvm_sve_max_vl;</div><div class='ctx'> extern unsigned int __ro_after_init kvm_host_sve_max_vl;</div><div class='ctx'> int __init kvm_arm_init_sve(void);</div><div class='hunk'>@@ -86,6 +87,10 @@ void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu);</div><div class='ctx'> struct kvm_hyp_memcache {</div><div class='ctx'> 	phys_addr_t head;</div><div class='ctx'> 	unsigned long nr_pages;</div><div class='add'>+	struct pkvm_mapping *mapping; /* only used from EL1 */</div><div class='add'>+</div><div class='add'>+#define	HYP_MEMCACHE_ACCOUNT_STAGE2	BIT(1)</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc,</div><div class='hunk'>@@ -100,7 +105,7 @@ static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc,</div><div class='ctx'> static inline void *pop_hyp_memcache(struct kvm_hyp_memcache *mc,</div><div class='ctx'> 				     void *(*to_va)(phys_addr_t phys))</div><div class='ctx'> {</div><div class='del'>-	phys_addr_t *p = to_va(mc-&gt;head);</div><div class='add'>+	phys_addr_t *p = to_va(mc-&gt;head &amp; PAGE_MASK);</div><div class='ctx'> </div><div class='ctx'> 	if (!mc-&gt;nr_pages)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -212,6 +217,12 @@ struct kvm_s2_mmu {</div><div class='ctx'> 	bool	nested_stage2_enabled;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * true when this MMU needs to be unmapped before being used for a new</div><div class='add'>+	 * purpose.</div><div class='add'>+	 */</div><div class='add'>+	bool	pending_unmap;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 *  0: Nobody is currently using this, check vttbr for validity</div><div class='ctx'> 	 * &gt;0: Somebody is actively using this.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -231,7 +242,8 @@ struct kvm_arch_memory_slot {</div><div class='ctx'> struct kvm_smccc_features {</div><div class='ctx'> 	unsigned long std_bmap;</div><div class='ctx'> 	unsigned long std_hyp_bmap;</div><div class='del'>-	unsigned long vendor_hyp_bmap;</div><div class='add'>+	unsigned long vendor_hyp_bmap; /* Function numbers 0-63 */</div><div class='add'>+	unsigned long vendor_hyp_bmap_2; /* Function numbers 64-127 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> typedef unsigned int pkvm_handle_t;</div><div class='hunk'>@@ -239,7 +251,9 @@ typedef unsigned int pkvm_handle_t;</div><div class='ctx'> struct kvm_protected_vm {</div><div class='ctx'> 	pkvm_handle_t handle;</div><div class='ctx'> 	struct kvm_hyp_memcache teardown_mc;</div><div class='del'>-	bool enabled;</div><div class='add'>+	struct kvm_hyp_memcache stage2_teardown_mc;</div><div class='add'>+	bool is_protected;</div><div class='add'>+	bool is_created;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_mpidr_data {</div><div class='hunk'>@@ -261,11 +275,17 @@ struct kvm_sysreg_masks;</div><div class='ctx'> </div><div class='ctx'> enum fgt_group_id {</div><div class='ctx'> 	__NO_FGT_GROUP__,</div><div class='del'>-	HFGxTR_GROUP,</div><div class='add'>+	HFGRTR_GROUP,</div><div class='add'>+	HFGWTR_GROUP = HFGRTR_GROUP,</div><div class='ctx'> 	HDFGRTR_GROUP,</div><div class='ctx'> 	HDFGWTR_GROUP = HDFGRTR_GROUP,</div><div class='ctx'> 	HFGITR_GROUP,</div><div class='ctx'> 	HAFGRTR_GROUP,</div><div class='add'>+	HFGRTR2_GROUP,</div><div class='add'>+	HFGWTR2_GROUP = HFGRTR2_GROUP,</div><div class='add'>+	HDFGRTR2_GROUP,</div><div class='add'>+	HDFGWTR2_GROUP = HDFGRTR2_GROUP,</div><div class='add'>+	HFGITR2_GROUP,</div><div class='ctx'> </div><div class='ctx'> 	/* Must be last */</div><div class='ctx'> 	__NR_FGT_GROUP_IDS__</div><div class='hunk'>@@ -326,6 +346,10 @@ struct kvm_arch {</div><div class='ctx'> #define KVM_ARCH_FLAG_ID_REGS_INITIALIZED		7</div><div class='ctx'> 	/* Fine-Grained UNDEF initialised */</div><div class='ctx'> #define KVM_ARCH_FLAG_FGU_INITIALIZED			8</div><div class='add'>+	/* SVE exposed to guest */</div><div class='add'>+#define KVM_ARCH_FLAG_GUEST_HAS_SVE			9</div><div class='add'>+	/* MIDR_EL1, REVIDR_EL1, and AIDR_EL1 are writable from userspace */</div><div class='add'>+#define KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS		10</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* VM-wide vCPU feature set */</div><div class='hunk'>@@ -343,8 +367,8 @@ struct kvm_arch {</div><div class='ctx'> </div><div class='ctx'> 	cpumask_var_t supported_cpus;</div><div class='ctx'> </div><div class='del'>-	/* PMCR_EL0.N value for the guest */</div><div class='del'>-	u8 pmcr_n;</div><div class='add'>+	/* Maximum number of counters for the guest */</div><div class='add'>+	u8 nr_pmu_counters;</div><div class='ctx'> </div><div class='ctx'> 	/* Iterator for idreg debugfs */</div><div class='ctx'> 	u8	idreg_debugfs_iter;</div><div class='hunk'>@@ -365,11 +389,17 @@ struct kvm_arch {</div><div class='ctx'> #define KVM_ARM_ID_REG_NUM	(IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1)</div><div class='ctx'> 	u64 id_regs[KVM_ARM_ID_REG_NUM];</div><div class='ctx'> </div><div class='add'>+	u64 midr_el1;</div><div class='add'>+	u64 revidr_el1;</div><div class='add'>+	u64 aidr_el1;</div><div class='ctx'> 	u64 ctr_el0;</div><div class='ctx'> </div><div class='del'>-	/* Masks for VNCR-baked sysregs */</div><div class='add'>+	/* Masks for VNCR-backed and general EL2 sysregs */</div><div class='ctx'> 	struct kvm_sysreg_masks	*sysreg_masks;</div><div class='ctx'> </div><div class='add'>+	/* Count the number of VNCR_EL2 currently mapped */</div><div class='add'>+	atomic_t vncr_map_count;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For an untrusted host VM, 'pkvm.handle' is used to lookup</div><div class='ctx'> 	 * the associated pKVM instance in the hypervisor.</div><div class='hunk'>@@ -401,6 +431,9 @@ struct kvm_vcpu_fault_info {</div><div class='ctx'> 	r = __VNCR_START__ + ((VNCR_ ## r) / 8),	\</div><div class='ctx'> 	__after_##r = __MAX__(__before_##r - 1, r)</div><div class='ctx'> </div><div class='add'>+#define MARKER(m)				\</div><div class='add'>+	m, __after_##m = m - 1</div><div class='add'>+</div><div class='ctx'> enum vcpu_sysreg {</div><div class='ctx'> 	__INVALID_SYSREG__,   /* 0 is reserved as an invalid value */</div><div class='ctx'> 	MPIDR_EL1,	/* MultiProcessor Affinity Register */</div><div class='hunk'>@@ -461,13 +494,15 @@ enum vcpu_sysreg {</div><div class='ctx'> 	/* EL2 registers */</div><div class='ctx'> 	SCTLR_EL2,	/* System Control Register (EL2) */</div><div class='ctx'> 	ACTLR_EL2,	/* Auxiliary Control Register (EL2) */</div><div class='del'>-	MDCR_EL2,	/* Monitor Debug Configuration Register (EL2) */</div><div class='ctx'> 	CPTR_EL2,	/* Architectural Feature Trap Register (EL2) */</div><div class='ctx'> 	HACR_EL2,	/* Hypervisor Auxiliary Control Register */</div><div class='ctx'> 	ZCR_EL2,	/* SVE Control Register (EL2) */</div><div class='ctx'> 	TTBR0_EL2,	/* Translation Table Base Register 0 (EL2) */</div><div class='ctx'> 	TTBR1_EL2,	/* Translation Table Base Register 1 (EL2) */</div><div class='ctx'> 	TCR_EL2,	/* Translation Control Register (EL2) */</div><div class='add'>+	PIRE0_EL2,	/* Permission Indirection Register 0 (EL2) */</div><div class='add'>+	PIR_EL2,	/* Permission Indirection Register 1 (EL2) */</div><div class='add'>+	POR_EL2,	/* Permission Overlay Register 2 (EL2) */</div><div class='ctx'> 	SPSR_EL2,	/* EL2 saved program status register */</div><div class='ctx'> 	ELR_EL2,	/* EL2 exception link register */</div><div class='ctx'> 	AFSR0_EL2,	/* Auxiliary Fault Status Register 0 (EL2) */</div><div class='hunk'>@@ -480,14 +515,21 @@ enum vcpu_sysreg {</div><div class='ctx'> 	VBAR_EL2,	/* Vector Base Address Register (EL2) */</div><div class='ctx'> 	RVBAR_EL2,	/* Reset Vector Base Address Register */</div><div class='ctx'> 	CONTEXTIDR_EL2,	/* Context ID Register (EL2) */</div><div class='del'>-	CNTHCTL_EL2,	/* Counter-timer Hypervisor Control register */</div><div class='ctx'> 	SP_EL2,		/* EL2 Stack Pointer */</div><div class='ctx'> 	CNTHP_CTL_EL2,</div><div class='ctx'> 	CNTHP_CVAL_EL2,</div><div class='ctx'> 	CNTHV_CTL_EL2,</div><div class='ctx'> 	CNTHV_CVAL_EL2,</div><div class='ctx'> </div><div class='del'>-	__VNCR_START__,	/* Any VNCR-capable reg goes after this point */</div><div class='add'>+	/* Anything from this can be RES0/RES1 sanitised */</div><div class='add'>+	MARKER(__SANITISED_REG_START__),</div><div class='add'>+	TCR2_EL2,	/* Extended Translation Control Register (EL2) */</div><div class='add'>+	SCTLR2_EL2,	/* System Control Register 2 (EL2) */</div><div class='add'>+	MDCR_EL2,	/* Monitor Debug Configuration Register (EL2) */</div><div class='add'>+	CNTHCTL_EL2,	/* Counter-timer Hypervisor Control register */</div><div class='add'>+</div><div class='add'>+	/* Any VNCR-capable reg goes after this point */</div><div class='add'>+	MARKER(__VNCR_START__),</div><div class='ctx'> </div><div class='ctx'> 	VNCR(SCTLR_EL1),/* System Control Register */</div><div class='ctx'> 	VNCR(ACTLR_EL1),/* Auxiliary Control Register */</div><div class='hunk'>@@ -497,6 +539,7 @@ enum vcpu_sysreg {</div><div class='ctx'> 	VNCR(TTBR1_EL1),/* Translation Table Base Register 1 */</div><div class='ctx'> 	VNCR(TCR_EL1),	/* Translation Control Register */</div><div class='ctx'> 	VNCR(TCR2_EL1),	/* Extended Translation Control Register */</div><div class='add'>+	VNCR(SCTLR2_EL1), /* System Control Register 2 */</div><div class='ctx'> 	VNCR(ESR_EL1),	/* Exception Syndrome Register */</div><div class='ctx'> 	VNCR(AFSR0_EL1),/* Auxiliary Fault Status Register 0 */</div><div class='ctx'> 	VNCR(AFSR1_EL1),/* Auxiliary Fault Status Register 1 */</div><div class='hunk'>@@ -525,12 +568,23 @@ enum vcpu_sysreg {</div><div class='ctx'> </div><div class='ctx'> 	VNCR(POR_EL1),	/* Permission Overlay Register 1 (EL1) */</div><div class='ctx'> </div><div class='add'>+	/* FEAT_RAS registers */</div><div class='add'>+	VNCR(VDISR_EL2),</div><div class='add'>+	VNCR(VSESR_EL2),</div><div class='add'>+</div><div class='ctx'> 	VNCR(HFGRTR_EL2),</div><div class='ctx'> 	VNCR(HFGWTR_EL2),</div><div class='ctx'> 	VNCR(HFGITR_EL2),</div><div class='ctx'> 	VNCR(HDFGRTR_EL2),</div><div class='ctx'> 	VNCR(HDFGWTR_EL2),</div><div class='ctx'> 	VNCR(HAFGRTR_EL2),</div><div class='add'>+	VNCR(HFGRTR2_EL2),</div><div class='add'>+	VNCR(HFGWTR2_EL2),</div><div class='add'>+	VNCR(HFGITR2_EL2),</div><div class='add'>+	VNCR(HDFGRTR2_EL2),</div><div class='add'>+	VNCR(HDFGWTR2_EL2),</div><div class='add'>+</div><div class='add'>+	VNCR(VNCR_EL2),</div><div class='ctx'> </div><div class='ctx'> 	VNCR(CNTVOFF_EL2),</div><div class='ctx'> 	VNCR(CNTV_CVAL_EL0),</div><div class='hunk'>@@ -538,7 +592,33 @@ enum vcpu_sysreg {</div><div class='ctx'> 	VNCR(CNTP_CVAL_EL0),</div><div class='ctx'> 	VNCR(CNTP_CTL_EL0),</div><div class='ctx'> </div><div class='add'>+	VNCR(ICH_LR0_EL2),</div><div class='add'>+	VNCR(ICH_LR1_EL2),</div><div class='add'>+	VNCR(ICH_LR2_EL2),</div><div class='add'>+	VNCR(ICH_LR3_EL2),</div><div class='add'>+	VNCR(ICH_LR4_EL2),</div><div class='add'>+	VNCR(ICH_LR5_EL2),</div><div class='add'>+	VNCR(ICH_LR6_EL2),</div><div class='add'>+	VNCR(ICH_LR7_EL2),</div><div class='add'>+	VNCR(ICH_LR8_EL2),</div><div class='add'>+	VNCR(ICH_LR9_EL2),</div><div class='add'>+	VNCR(ICH_LR10_EL2),</div><div class='add'>+	VNCR(ICH_LR11_EL2),</div><div class='add'>+	VNCR(ICH_LR12_EL2),</div><div class='add'>+	VNCR(ICH_LR13_EL2),</div><div class='add'>+	VNCR(ICH_LR14_EL2),</div><div class='add'>+	VNCR(ICH_LR15_EL2),</div><div class='add'>+</div><div class='add'>+	VNCR(ICH_AP0R0_EL2),</div><div class='add'>+	VNCR(ICH_AP0R1_EL2),</div><div class='add'>+	VNCR(ICH_AP0R2_EL2),</div><div class='add'>+	VNCR(ICH_AP0R3_EL2),</div><div class='add'>+	VNCR(ICH_AP1R0_EL2),</div><div class='add'>+	VNCR(ICH_AP1R1_EL2),</div><div class='add'>+	VNCR(ICH_AP1R2_EL2),</div><div class='add'>+	VNCR(ICH_AP1R3_EL2),</div><div class='ctx'> 	VNCR(ICH_HCR_EL2),</div><div class='add'>+	VNCR(ICH_VMCR_EL2),</div><div class='ctx'> </div><div class='ctx'> 	NR_SYS_REGS	/* Nothing after this line! */</div><div class='ctx'> };</div><div class='hunk'>@@ -547,9 +627,40 @@ struct kvm_sysreg_masks {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u64	res0;</div><div class='ctx'> 		u64	res1;</div><div class='del'>-	} mask[NR_SYS_REGS - __VNCR_START__];</div><div class='add'>+	} mask[NR_SYS_REGS - __SANITISED_REG_START__];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fgt_masks {</div><div class='add'>+	const char	*str;</div><div class='add'>+	u64		mask;</div><div class='add'>+	u64		nmask;</div><div class='add'>+	u64		res0;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern struct fgt_masks hfgrtr_masks;</div><div class='add'>+extern struct fgt_masks hfgwtr_masks;</div><div class='add'>+extern struct fgt_masks hfgitr_masks;</div><div class='add'>+extern struct fgt_masks hdfgrtr_masks;</div><div class='add'>+extern struct fgt_masks hdfgwtr_masks;</div><div class='add'>+extern struct fgt_masks hafgrtr_masks;</div><div class='add'>+extern struct fgt_masks hfgrtr2_masks;</div><div class='add'>+extern struct fgt_masks hfgwtr2_masks;</div><div class='add'>+extern struct fgt_masks hfgitr2_masks;</div><div class='add'>+extern struct fgt_masks hdfgrtr2_masks;</div><div class='add'>+extern struct fgt_masks hdfgwtr2_masks;</div><div class='add'>+</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgwtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgitr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgwtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hafgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgrtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgwtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgitr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgrtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgwtr2_masks);</div><div class='add'>+</div><div class='ctx'> struct kvm_cpu_context {</div><div class='ctx'> 	struct user_pt_regs regs;	/* sp = sp_el0 */</div><div class='ctx'> </div><div class='hunk'>@@ -594,26 +705,25 @@ struct cpu_sve_state {</div><div class='ctx'>  * field.</div><div class='ctx'>  */</div><div class='ctx'> struct kvm_host_data {</div><div class='add'>+#define KVM_HOST_DATA_FLAG_HAS_SPE			0</div><div class='add'>+#define KVM_HOST_DATA_FLAG_HAS_TRBE			1</div><div class='add'>+#define KVM_HOST_DATA_FLAG_TRBE_ENABLED			4</div><div class='add'>+#define KVM_HOST_DATA_FLAG_EL1_TRACING_CONFIGURED	5</div><div class='add'>+#define KVM_HOST_DATA_FLAG_VCPU_IN_HYP_CONTEXT		6</div><div class='add'>+#define KVM_HOST_DATA_FLAG_L1_VNCR_MAPPED		7</div><div class='add'>+#define KVM_HOST_DATA_FLAG_HAS_BRBE			8</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='ctx'> 	struct kvm_cpu_context host_ctxt;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * All pointers in this union are hyp VA.</div><div class='add'>+	 * Hyp VA.</div><div class='ctx'> 	 * sve_state is only used in pKVM and if system_supports_sve().</div><div class='ctx'> 	 */</div><div class='del'>-	union {</div><div class='del'>-		struct user_fpsimd_state *fpsimd_state;</div><div class='del'>-		struct cpu_sve_state *sve_state;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	union {</div><div class='del'>-		/* HYP VA pointer to the host storage for FPMR */</div><div class='del'>-		u64	*fpmr_ptr;</div><div class='del'>-		/*</div><div class='del'>-		 * Used by pKVM only, as it needs to provide storage</div><div class='del'>-		 * for the host</div><div class='del'>-		 */</div><div class='del'>-		u64	fpmr;</div><div class='del'>-	};</div><div class='add'>+	struct cpu_sve_state *sve_state;</div><div class='add'>+</div><div class='add'>+	/* Used by pKVM only. */</div><div class='add'>+	u64	fpmr;</div><div class='ctx'> </div><div class='ctx'> 	/* Ownership of the FP regs */</div><div class='ctx'> 	enum {</div><div class='hunk'>@@ -626,7 +736,7 @@ struct kvm_host_data {</div><div class='ctx'> 	 * host_debug_state contains the host registers which are</div><div class='ctx'> 	 * saved and restored during world switches.</div><div class='ctx'> 	 */</div><div class='del'>-	 struct {</div><div class='add'>+	struct {</div><div class='ctx'> 		/* {Break,watch}point registers */</div><div class='ctx'> 		struct kvm_guest_debug_arch regs;</div><div class='ctx'> 		/* Statistical profiling extension */</div><div class='hunk'>@@ -635,7 +745,18 @@ struct kvm_host_data {</div><div class='ctx'> 		u64 trfcr_el1;</div><div class='ctx'> 		/* Values of trap registers for the host before guest entry. */</div><div class='ctx'> 		u64 mdcr_el2;</div><div class='add'>+		u64 brbcr_el1;</div><div class='ctx'> 	} host_debug_state;</div><div class='add'>+</div><div class='add'>+	/* Guest trace filter value */</div><div class='add'>+	u64 trfcr_while_in_guest;</div><div class='add'>+</div><div class='add'>+	/* Number of programmable event counters (PMCR_EL0.N) for this CPU */</div><div class='add'>+	unsigned int nr_event_counters;</div><div class='add'>+</div><div class='add'>+	/* Number of debug breakpoints/watchpoints for this CPU (minus 1) */</div><div class='add'>+	unsigned int debug_brps;</div><div class='add'>+	unsigned int debug_wrps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_host_psci_config {</div><div class='hunk'>@@ -668,6 +789,8 @@ struct vcpu_reset_state {</div><div class='ctx'> 	bool		reset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct vncr_tlb;</div><div class='add'>+</div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='ctx'> 	struct kvm_cpu_context ctxt;</div><div class='ctx'> </div><div class='hunk'>@@ -692,7 +815,6 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	u64 hcr_el2;</div><div class='ctx'> 	u64 hcrx_el2;</div><div class='ctx'> 	u64 mdcr_el2;</div><div class='del'>-	u64 cptr_el2;</div><div class='ctx'> </div><div class='ctx'> 	/* Exception Information */</div><div class='ctx'> 	struct kvm_vcpu_fault_info fault;</div><div class='hunk'>@@ -704,7 +826,7 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	u8 iflags;</div><div class='ctx'> </div><div class='ctx'> 	/* State flags for kernel bookkeeping, unused by the hypervisor code */</div><div class='del'>-	u8 sflags;</div><div class='add'>+	u16 sflags;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Don't run the guest (internal implementation need).</div><div class='hunk'>@@ -723,31 +845,22 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * external_debug_state contains the debug values we want to debug the</div><div class='ctx'> 	 * guest. This is set via the KVM_SET_GUEST_DEBUG ioctl.</div><div class='del'>-	 *</div><div class='del'>-	 * debug_ptr points to the set of debug registers that should be loaded</div><div class='del'>-	 * onto the hardware when running the guest.</div><div class='ctx'> 	 */</div><div class='del'>-	struct kvm_guest_debug_arch *debug_ptr;</div><div class='ctx'> 	struct kvm_guest_debug_arch vcpu_debug_state;</div><div class='ctx'> 	struct kvm_guest_debug_arch external_debug_state;</div><div class='add'>+	u64 external_mdscr_el1;</div><div class='add'>+</div><div class='add'>+	enum {</div><div class='add'>+		VCPU_DEBUG_FREE,</div><div class='add'>+		VCPU_DEBUG_HOST_OWNED,</div><div class='add'>+		VCPU_DEBUG_GUEST_OWNED,</div><div class='add'>+	} debug_owner;</div><div class='ctx'> </div><div class='ctx'> 	/* VGIC state */</div><div class='ctx'> 	struct vgic_cpu vgic_cpu;</div><div class='ctx'> 	struct arch_timer_cpu timer_cpu;</div><div class='ctx'> 	struct kvm_pmu pmu;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Guest registers we preserve during guest debugging.</div><div class='del'>-	 *</div><div class='del'>-	 * These shadow registers are updated by the kvm_handle_sys_reg</div><div class='del'>-	 * trap handler if the guest accesses or updates them while we</div><div class='del'>-	 * are using guest debug.</div><div class='del'>-	 */</div><div class='del'>-	struct {</div><div class='del'>-		u32	mdscr_el1;</div><div class='del'>-		bool	pstate_ss;</div><div class='del'>-	} guest_debug_preserved;</div><div class='del'>-</div><div class='ctx'> 	/* vcpu power state */</div><div class='ctx'> 	struct kvm_mp_state mp_state;</div><div class='ctx'> 	spinlock_t mp_state_lock;</div><div class='hunk'>@@ -755,6 +868,9 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	/* Cache some mmu pages needed inside spinlock regions */</div><div class='ctx'> 	struct kvm_mmu_memory_cache mmu_page_cache;</div><div class='ctx'> </div><div class='add'>+	/* Pages to top-up the pKVM/EL2 guest pool */</div><div class='add'>+	struct kvm_hyp_memcache pkvm_memcache;</div><div class='add'>+</div><div class='ctx'> 	/* Virtual SError ESR to restore when HCR_EL2.VSE is set */</div><div class='ctx'> 	u64 vsesr_el2;</div><div class='ctx'> </div><div class='hunk'>@@ -769,6 +885,9 @@ struct kvm_vcpu_arch {</div><div class='ctx'> </div><div class='ctx'> 	/* Per-vcpu CCSIDR override or NULL */</div><div class='ctx'> 	u32 *ccsidr;</div><div class='add'>+</div><div class='add'>+	/* Per-vcpu TLB for VNCR_EL2 -- NULL when !NV */</div><div class='add'>+	struct vncr_tlb	*vncr_tlb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -843,18 +962,28 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 		__vcpu_flags_preempt_enable();			\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='add'>+#define __vcpu_test_and_clear_flag(v, flagset, f, m)		\</div><div class='add'>+	({							\</div><div class='add'>+		typeof(v-&gt;arch.flagset) set;			\</div><div class='add'>+								\</div><div class='add'>+		set = __vcpu_get_flag(v, flagset, f, m);	\</div><div class='add'>+		__vcpu_clear_flag(v, flagset, f, m);		\</div><div class='add'>+								\</div><div class='add'>+		set;						\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> #define vcpu_get_flag(v, ...)	__vcpu_get_flag((v), __VA_ARGS__)</div><div class='ctx'> #define vcpu_set_flag(v, ...)	__vcpu_set_flag((v), __VA_ARGS__)</div><div class='ctx'> #define vcpu_clear_flag(v, ...)	__vcpu_clear_flag((v), __VA_ARGS__)</div><div class='add'>+#define vcpu_test_and_clear_flag(v, ...)			\</div><div class='add'>+	__vcpu_test_and_clear_flag((v), __VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-/* SVE exposed to guest */</div><div class='del'>-#define GUEST_HAS_SVE		__vcpu_single_flag(cflags, BIT(0))</div><div class='add'>+/* KVM_ARM_VCPU_INIT completed */</div><div class='add'>+#define VCPU_INITIALIZED	__vcpu_single_flag(cflags, BIT(0))</div><div class='ctx'> /* SVE config completed */</div><div class='ctx'> #define VCPU_SVE_FINALIZED	__vcpu_single_flag(cflags, BIT(1))</div><div class='del'>-/* PTRAUTH exposed to guest */</div><div class='del'>-#define GUEST_HAS_PTRAUTH	__vcpu_single_flag(cflags, BIT(2))</div><div class='del'>-/* KVM_ARM_VCPU_INIT completed */</div><div class='del'>-#define VCPU_INITIALIZED	__vcpu_single_flag(cflags, BIT(3))</div><div class='add'>+/* pKVM VCPU setup completed */</div><div class='add'>+#define VCPU_PKVM_FINALIZED	__vcpu_single_flag(cflags, BIT(2))</div><div class='ctx'> </div><div class='ctx'> /* Exception pending */</div><div class='ctx'> #define PENDING_EXCEPTION	__vcpu_single_flag(iflags, BIT(0))</div><div class='hunk'>@@ -890,29 +1019,25 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #define EXCEPT_AA64_EL2_IRQ	__vcpu_except_flags(5)</div><div class='ctx'> #define EXCEPT_AA64_EL2_FIQ	__vcpu_except_flags(6)</div><div class='ctx'> #define EXCEPT_AA64_EL2_SERR	__vcpu_except_flags(7)</div><div class='del'>-/* Guest debug is live */</div><div class='del'>-#define DEBUG_DIRTY		__vcpu_single_flag(iflags, BIT(4))</div><div class='del'>-/* Save SPE context if active  */</div><div class='del'>-#define DEBUG_STATE_SAVE_SPE	__vcpu_single_flag(iflags, BIT(5))</div><div class='del'>-/* Save TRBE context if active  */</div><div class='del'>-#define DEBUG_STATE_SAVE_TRBE	__vcpu_single_flag(iflags, BIT(6))</div><div class='del'>-</div><div class='del'>-/* SVE enabled for host EL0 */</div><div class='del'>-#define HOST_SVE_ENABLED	__vcpu_single_flag(sflags, BIT(0))</div><div class='del'>-/* SME enabled for EL0 */</div><div class='del'>-#define HOST_SME_ENABLED	__vcpu_single_flag(sflags, BIT(1))</div><div class='add'>+</div><div class='ctx'> /* Physical CPU not in supported_cpus */</div><div class='del'>-#define ON_UNSUPPORTED_CPU	__vcpu_single_flag(sflags, BIT(2))</div><div class='add'>+#define ON_UNSUPPORTED_CPU	__vcpu_single_flag(sflags, BIT(0))</div><div class='ctx'> /* WFIT instruction trapped */</div><div class='del'>-#define IN_WFIT			__vcpu_single_flag(sflags, BIT(3))</div><div class='add'>+#define IN_WFIT			__vcpu_single_flag(sflags, BIT(1))</div><div class='ctx'> /* vcpu system registers loaded on physical CPU */</div><div class='del'>-#define SYSREGS_ON_CPU		__vcpu_single_flag(sflags, BIT(4))</div><div class='del'>-/* Software step state is Active-pending */</div><div class='del'>-#define DBG_SS_ACTIVE_PENDING	__vcpu_single_flag(sflags, BIT(5))</div><div class='add'>+#define SYSREGS_ON_CPU		__vcpu_single_flag(sflags, BIT(2))</div><div class='add'>+/* Software step state is Active-pending for external debug */</div><div class='add'>+#define HOST_SS_ACTIVE_PENDING	__vcpu_single_flag(sflags, BIT(3))</div><div class='add'>+/* Software step state is Active pending for guest debug */</div><div class='add'>+#define GUEST_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(4))</div><div class='ctx'> /* PMUSERENR for the guest EL0 is on physical CPU */</div><div class='del'>-#define PMUSERENR_ON_CPU	__vcpu_single_flag(sflags, BIT(6))</div><div class='add'>+#define PMUSERENR_ON_CPU	__vcpu_single_flag(sflags, BIT(5))</div><div class='ctx'> /* WFI instruction trapped */</div><div class='del'>-#define IN_WFI			__vcpu_single_flag(sflags, BIT(7))</div><div class='add'>+#define IN_WFI			__vcpu_single_flag(sflags, BIT(6))</div><div class='add'>+/* KVM is currently emulating a nested ERET */</div><div class='add'>+#define IN_NESTED_ERET		__vcpu_single_flag(sflags, BIT(7))</div><div class='add'>+/* SError pending for nested guest */</div><div class='add'>+#define NESTED_SERROR_PENDING	__vcpu_single_flag(sflags, BIT(8))</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */</div><div class='hunk'>@@ -924,33 +1049,42 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #define vcpu_sve_zcr_elx(vcpu)						\</div><div class='ctx'> 	(unlikely(is_hyp_ctxt(vcpu)) ? ZCR_EL2 : ZCR_EL1)</div><div class='ctx'> </div><div class='del'>-#define vcpu_sve_state_size(vcpu) ({					\</div><div class='add'>+#define sve_state_size_from_vl(sve_max_vl) ({				\</div><div class='ctx'> 	size_t __size_ret;						\</div><div class='del'>-	unsigned int __vcpu_vq;						\</div><div class='add'>+	unsigned int __vq;						\</div><div class='ctx'> 									\</div><div class='del'>-	if (WARN_ON(!sve_vl_valid((vcpu)-&gt;arch.sve_max_vl))) {		\</div><div class='add'>+	if (WARN_ON(!sve_vl_valid(sve_max_vl))) {			\</div><div class='ctx'> 		__size_ret = 0;						\</div><div class='ctx'> 	} else {							\</div><div class='del'>-		__vcpu_vq = vcpu_sve_max_vq(vcpu);			\</div><div class='del'>-		__size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq);		\</div><div class='add'>+		__vq = sve_vq_from_vl(sve_max_vl);			\</div><div class='add'>+		__size_ret = SVE_SIG_REGS_SIZE(__vq);			\</div><div class='ctx'> 	}								\</div><div class='ctx'> 									\</div><div class='ctx'> 	__size_ret;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#define vcpu_sve_state_size(vcpu) sve_state_size_from_vl((vcpu)-&gt;arch.sve_max_vl)</div><div class='add'>+</div><div class='ctx'> #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \</div><div class='ctx'> 				 KVM_GUESTDBG_USE_SW_BP | \</div><div class='ctx'> 				 KVM_GUESTDBG_USE_HW | \</div><div class='ctx'> 				 KVM_GUESTDBG_SINGLESTEP)</div><div class='ctx'> </div><div class='del'>-#define vcpu_has_sve(vcpu) (system_supports_sve() &amp;&amp;			\</div><div class='del'>-			    vcpu_get_flag(vcpu, GUEST_HAS_SVE))</div><div class='add'>+#define kvm_has_sve(kvm)	(system_supports_sve() &amp;&amp;		\</div><div class='add'>+				 test_bit(KVM_ARCH_FLAG_GUEST_HAS_SVE, &amp;(kvm)-&gt;arch.flags))</div><div class='add'>+</div><div class='add'>+#ifdef __KVM_NVHE_HYPERVISOR__</div><div class='add'>+#define vcpu_has_sve(vcpu)	kvm_has_sve(kern_hyp_va((vcpu)-&gt;kvm))</div><div class='add'>+#else</div><div class='add'>+#define vcpu_has_sve(vcpu)	kvm_has_sve((vcpu)-&gt;kvm)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_PTR_AUTH</div><div class='ctx'> #define vcpu_has_ptrauth(vcpu)						\</div><div class='ctx'> 	((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) ||		\</div><div class='ctx'> 	  cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) &amp;&amp;		\</div><div class='del'>-	  vcpu_get_flag(vcpu, GUEST_HAS_PTRAUTH))</div><div class='add'>+	 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PTRAUTH_ADDRESS) ||       \</div><div class='add'>+	  vcpu_has_feature(vcpu, KVM_ARM_VCPU_PTRAUTH_GENERIC)))</div><div class='ctx'> #else</div><div class='ctx'> #define vcpu_has_ptrauth(vcpu)		false</div><div class='ctx'> #endif</div><div class='hunk'>@@ -995,111 +1129,40 @@ static inline u64 *___ctxt_sys_reg(const struct kvm_cpu_context *ctxt, int r)</div><div class='ctx'> </div><div class='ctx'> #define ctxt_sys_reg(c,r)	(*__ctxt_sys_reg(c,r))</div><div class='ctx'> </div><div class='del'>-u64 kvm_vcpu_sanitise_vncr_reg(const struct kvm_vcpu *, enum vcpu_sysreg);</div><div class='del'>-#define __vcpu_sys_reg(v,r)						\</div><div class='del'>-	(*({								\</div><div class='del'>-		const struct kvm_cpu_context *ctxt = &amp;(v)-&gt;arch.ctxt;	\</div><div class='del'>-		u64 *__r = __ctxt_sys_reg(ctxt, (r));			\</div><div class='del'>-		if (vcpu_has_nv((v)) &amp;&amp; (r) &gt;= __VNCR_START__)		\</div><div class='del'>-			*__r = kvm_vcpu_sanitise_vncr_reg((v), (r));	\</div><div class='del'>-		__r;							\</div><div class='del'>-	}))</div><div class='del'>-</div><div class='del'>-u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg);</div><div class='del'>-void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg);</div><div class='add'>+u64 kvm_vcpu_apply_reg_masks(const struct kvm_vcpu *, enum vcpu_sysreg, u64);</div><div class='ctx'> </div><div class='del'>-static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * *** VHE ONLY ***</div><div class='del'>-	 *</div><div class='del'>-	 * System registers listed in the switch are not saved on every</div><div class='del'>-	 * exit from the guest but are only saved on vcpu_put.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but</div><div class='del'>-	 * should never be listed below, because the guest cannot modify its</div><div class='del'>-	 * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's</div><div class='del'>-	 * thread when emulating cross-VCPU communication.</div><div class='del'>-	 */</div><div class='del'>-	if (!has_vhe())</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	switch (reg) {</div><div class='del'>-	case SCTLR_EL1:		*val = read_sysreg_s(SYS_SCTLR_EL12);	break;</div><div class='del'>-	case CPACR_EL1:		*val = read_sysreg_s(SYS_CPACR_EL12);	break;</div><div class='del'>-	case TTBR0_EL1:		*val = read_sysreg_s(SYS_TTBR0_EL12);	break;</div><div class='del'>-	case TTBR1_EL1:		*val = read_sysreg_s(SYS_TTBR1_EL12);	break;</div><div class='del'>-	case TCR_EL1:		*val = read_sysreg_s(SYS_TCR_EL12);	break;</div><div class='del'>-	case ESR_EL1:		*val = read_sysreg_s(SYS_ESR_EL12);	break;</div><div class='del'>-	case AFSR0_EL1:		*val = read_sysreg_s(SYS_AFSR0_EL12);	break;</div><div class='del'>-	case AFSR1_EL1:		*val = read_sysreg_s(SYS_AFSR1_EL12);	break;</div><div class='del'>-	case FAR_EL1:		*val = read_sysreg_s(SYS_FAR_EL12);	break;</div><div class='del'>-	case MAIR_EL1:		*val = read_sysreg_s(SYS_MAIR_EL12);	break;</div><div class='del'>-	case VBAR_EL1:		*val = read_sysreg_s(SYS_VBAR_EL12);	break;</div><div class='del'>-	case CONTEXTIDR_EL1:	*val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;</div><div class='del'>-	case TPIDR_EL0:		*val = read_sysreg_s(SYS_TPIDR_EL0);	break;</div><div class='del'>-	case TPIDRRO_EL0:	*val = read_sysreg_s(SYS_TPIDRRO_EL0);	break;</div><div class='del'>-	case TPIDR_EL1:		*val = read_sysreg_s(SYS_TPIDR_EL1);	break;</div><div class='del'>-	case AMAIR_EL1:		*val = read_sysreg_s(SYS_AMAIR_EL12);	break;</div><div class='del'>-	case CNTKCTL_EL1:	*val = read_sysreg_s(SYS_CNTKCTL_EL12);	break;</div><div class='del'>-	case ELR_EL1:		*val = read_sysreg_s(SYS_ELR_EL12);	break;</div><div class='del'>-	case SPSR_EL1:		*val = read_sysreg_s(SYS_SPSR_EL12);	break;</div><div class='del'>-	case PAR_EL1:		*val = read_sysreg_par();		break;</div><div class='del'>-	case DACR32_EL2:	*val = read_sysreg_s(SYS_DACR32_EL2);	break;</div><div class='del'>-	case IFSR32_EL2:	*val = read_sysreg_s(SYS_IFSR32_EL2);	break;</div><div class='del'>-	case DBGVCR32_EL2:	*val = read_sysreg_s(SYS_DBGVCR32_EL2);	break;</div><div class='del'>-	case ZCR_EL1:		*val = read_sysreg_s(SYS_ZCR_EL12);	break;</div><div class='del'>-	default:		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='add'>+#define __vcpu_assign_sys_reg(v, r, val)				\</div><div class='add'>+	do {								\</div><div class='add'>+		const struct kvm_cpu_context *ctxt = &amp;(v)-&gt;arch.ctxt;	\</div><div class='add'>+		u64 __v = (val);					\</div><div class='add'>+		if (vcpu_has_nv((v)) &amp;&amp; (r) &gt;= __SANITISED_REG_START__)	\</div><div class='add'>+			__v = kvm_vcpu_apply_reg_masks((v), (r), __v);	\</div><div class='add'>+									\</div><div class='add'>+		ctxt_sys_reg(ctxt, (r)) = __v;				\</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='del'>-static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * *** VHE ONLY ***</div><div class='del'>-	 *</div><div class='del'>-	 * System registers listed in the switch are not restored on every</div><div class='del'>-	 * entry to the guest but are only restored on vcpu_load.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but</div><div class='del'>-	 * should never be listed below, because the MPIDR should only be set</div><div class='del'>-	 * once, before running the VCPU, and never changed later.</div><div class='del'>-	 */</div><div class='del'>-	if (!has_vhe())</div><div class='del'>-		return false;</div><div class='add'>+#define __vcpu_rmw_sys_reg(v, r, op, val)				\</div><div class='add'>+	do {								\</div><div class='add'>+		const struct kvm_cpu_context *ctxt = &amp;(v)-&gt;arch.ctxt;	\</div><div class='add'>+		u64 __v = ctxt_sys_reg(ctxt, (r));			\</div><div class='add'>+		__v op (val);						\</div><div class='add'>+		if (vcpu_has_nv((v)) &amp;&amp; (r) &gt;= __SANITISED_REG_START__)	\</div><div class='add'>+			__v = kvm_vcpu_apply_reg_masks((v), (r), __v);	\</div><div class='add'>+									\</div><div class='add'>+		ctxt_sys_reg(ctxt, (r)) = __v;				\</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='del'>-	switch (reg) {</div><div class='del'>-	case SCTLR_EL1:		write_sysreg_s(val, SYS_SCTLR_EL12);	break;</div><div class='del'>-	case CPACR_EL1:		write_sysreg_s(val, SYS_CPACR_EL12);	break;</div><div class='del'>-	case TTBR0_EL1:		write_sysreg_s(val, SYS_TTBR0_EL12);	break;</div><div class='del'>-	case TTBR1_EL1:		write_sysreg_s(val, SYS_TTBR1_EL12);	break;</div><div class='del'>-	case TCR_EL1:		write_sysreg_s(val, SYS_TCR_EL12);	break;</div><div class='del'>-	case ESR_EL1:		write_sysreg_s(val, SYS_ESR_EL12);	break;</div><div class='del'>-	case AFSR0_EL1:		write_sysreg_s(val, SYS_AFSR0_EL12);	break;</div><div class='del'>-	case AFSR1_EL1:		write_sysreg_s(val, SYS_AFSR1_EL12);	break;</div><div class='del'>-	case FAR_EL1:		write_sysreg_s(val, SYS_FAR_EL12);	break;</div><div class='del'>-	case MAIR_EL1:		write_sysreg_s(val, SYS_MAIR_EL12);	break;</div><div class='del'>-	case VBAR_EL1:		write_sysreg_s(val, SYS_VBAR_EL12);	break;</div><div class='del'>-	case CONTEXTIDR_EL1:	write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;</div><div class='del'>-	case TPIDR_EL0:		write_sysreg_s(val, SYS_TPIDR_EL0);	break;</div><div class='del'>-	case TPIDRRO_EL0:	write_sysreg_s(val, SYS_TPIDRRO_EL0);	break;</div><div class='del'>-	case TPIDR_EL1:		write_sysreg_s(val, SYS_TPIDR_EL1);	break;</div><div class='del'>-	case AMAIR_EL1:		write_sysreg_s(val, SYS_AMAIR_EL12);	break;</div><div class='del'>-	case CNTKCTL_EL1:	write_sysreg_s(val, SYS_CNTKCTL_EL12);	break;</div><div class='del'>-	case ELR_EL1:		write_sysreg_s(val, SYS_ELR_EL12);	break;</div><div class='del'>-	case SPSR_EL1:		write_sysreg_s(val, SYS_SPSR_EL12);	break;</div><div class='del'>-	case PAR_EL1:		write_sysreg_s(val, SYS_PAR_EL1);	break;</div><div class='del'>-	case DACR32_EL2:	write_sysreg_s(val, SYS_DACR32_EL2);	break;</div><div class='del'>-	case IFSR32_EL2:	write_sysreg_s(val, SYS_IFSR32_EL2);	break;</div><div class='del'>-	case DBGVCR32_EL2:	write_sysreg_s(val, SYS_DBGVCR32_EL2);	break;</div><div class='del'>-	case ZCR_EL1:		write_sysreg_s(val, SYS_ZCR_EL12);	break;</div><div class='del'>-	default:		return false;</div><div class='del'>-	}</div><div class='add'>+#define __vcpu_sys_reg(v,r)						\</div><div class='add'>+	({								\</div><div class='add'>+		const struct kvm_cpu_context *ctxt = &amp;(v)-&gt;arch.ctxt;	\</div><div class='add'>+		u64 __v = ctxt_sys_reg(ctxt, (r));			\</div><div class='add'>+		if (vcpu_has_nv((v)) &amp;&amp; (r) &gt;= __SANITISED_REG_START__)	\</div><div class='add'>+			__v = kvm_vcpu_apply_reg_masks((v), (r), __v);	\</div><div class='add'>+		__v;							\</div><div class='add'>+	})</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='add'>+u64 vcpu_read_sys_reg(const struct kvm_vcpu *, enum vcpu_sysreg);</div><div class='add'>+void vcpu_write_sys_reg(struct kvm_vcpu *, u64, enum vcpu_sysreg);</div><div class='ctx'> </div><div class='ctx'> struct kvm_vm_stat {</div><div class='ctx'> 	struct kvm_vm_stat_generic generic;</div><div class='hunk'>@@ -1133,7 +1196,7 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> void kvm_arm_halt_guest(struct kvm *kvm);</div><div class='ctx'> void kvm_arm_resume_guest(struct kvm *kvm);</div><div class='ctx'> </div><div class='del'>-#define vcpu_has_run_once(vcpu)	!!rcu_access_pointer((vcpu)-&gt;pid)</div><div class='add'>+#define vcpu_has_run_once(vcpu)	(!!READ_ONCE((vcpu)-&gt;pid))</div><div class='ctx'> </div><div class='ctx'> #ifndef __KVM_NVHE_HYPERVISOR__</div><div class='ctx'> #define kvm_call_hyp_nvhe(f, ...)						\</div><div class='hunk'>@@ -1148,9 +1211,8 @@ void kvm_arm_resume_guest(struct kvm *kvm);</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The couple of isb() below are there to guarantee the same behaviour</div><div class='del'>- * on VHE as on !VHE, where the eret to EL1 acts as a context</div><div class='del'>- * synchronization event.</div><div class='add'>+ * The isb() below is there to guarantee the same behaviour on VHE as on !VHE,</div><div class='add'>+ * where the eret to EL1 acts as a context synchronization event.</div><div class='ctx'>  */</div><div class='ctx'> #define kvm_call_hyp(f, ...)						\</div><div class='ctx'> 	do {								\</div><div class='hunk'>@@ -1168,7 +1230,6 @@ void kvm_arm_resume_guest(struct kvm *kvm);</div><div class='ctx'> 									\</div><div class='ctx'> 		if (has_vhe()) {					\</div><div class='ctx'> 			ret = f(__VA_ARGS__);				\</div><div class='del'>-			isb();						\</div><div class='ctx'> 		} else {						\</div><div class='ctx'> 			ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__);	\</div><div class='ctx'> 		}							\</div><div class='hunk'>@@ -1201,9 +1262,6 @@ int __init populate_sysreg_config(const struct sys_reg_desc *sr,</div><div class='ctx'> 				  unsigned int idx);</div><div class='ctx'> int __init populate_nv_trap_config(void);</div><div class='ctx'> </div><div class='del'>-bool lock_all_vcpus(struct kvm *kvm);</div><div class='del'>-void unlock_all_vcpus(struct kvm *kvm);</div><div class='del'>-</div><div class='ctx'> void kvm_calculate_traps(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> /* MMIO helpers */</div><div class='hunk'>@@ -1238,7 +1296,7 @@ int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,</div><div class='ctx'> extern unsigned int __ro_after_init kvm_arm_vmid_bits;</div><div class='ctx'> int __init kvm_arm_vmid_alloc_init(void);</div><div class='ctx'> void __init kvm_arm_vmid_alloc_free(void);</div><div class='del'>-bool kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid);</div><div class='add'>+void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid);</div><div class='ctx'> void kvm_arm_vmid_clear_active(void);</div><div class='ctx'> </div><div class='ctx'> static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch)</div><div class='hunk'>@@ -1251,8 +1309,6 @@ static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch)</div><div class='ctx'> 	return (vcpu_arch-&gt;steal.base != INVALID_GPA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome);</div><div class='del'>-</div><div class='ctx'> struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);</div><div class='ctx'> </div><div class='ctx'> DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data);</div><div class='hunk'>@@ -1283,6 +1339,13 @@ DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data);</div><div class='ctx'> 	 &amp;this_cpu_ptr_hyp_sym(kvm_host_data)-&gt;f)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define host_data_test_flag(flag)					\</div><div class='add'>+	(test_bit(KVM_HOST_DATA_FLAG_##flag, host_data_ptr(flags)))</div><div class='add'>+#define host_data_set_flag(flag)					\</div><div class='add'>+	set_bit(KVM_HOST_DATA_FLAG_##flag, host_data_ptr(flags))</div><div class='add'>+#define host_data_clear_flag(flag)					\</div><div class='add'>+	clear_bit(KVM_HOST_DATA_FLAG_##flag, host_data_ptr(flags))</div><div class='add'>+</div><div class='ctx'> /* Check whether the FP regs are owned by the guest */</div><div class='ctx'> static inline bool guest_owns_fp_regs(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1306,17 +1369,23 @@ static inline bool kvm_system_needs_idmapped_vectors(void)</div><div class='ctx'> 	return cpus_have_final_cap(ARM64_SPECTRE_V3A);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='del'>-</div><div class='del'>-void kvm_arm_init_debug(void);</div><div class='del'>-void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_arm_setup_debug(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_init_host_debug_data(void);</div><div class='add'>+void kvm_debug_init_vhe(void);</div><div class='add'>+void kvm_vcpu_load_debug(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_vcpu_put_debug(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_debug_set_guest_ownership(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_debug_handle_oslar(struct kvm_vcpu *vcpu, u64 val);</div><div class='ctx'> </div><div class='ctx'> #define kvm_vcpu_os_lock_enabled(vcpu)		\</div><div class='ctx'> 	(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) &amp; OSLSR_EL1_OSLK))</div><div class='ctx'> </div><div class='add'>+#define kvm_debug_regs_in_use(vcpu)		\</div><div class='add'>+	((vcpu)-&gt;arch.debug_owner != VCPU_DEBUG_FREE)</div><div class='add'>+#define kvm_host_owns_debug_regs(vcpu)		\</div><div class='add'>+	((vcpu)-&gt;arch.debug_owner == VCPU_DEBUG_HOST_OWNED)</div><div class='add'>+#define kvm_guest_owns_debug_regs(vcpu)		\</div><div class='add'>+	((vcpu)-&gt;arch.debug_owner == VCPU_DEBUG_GUEST_OWNED)</div><div class='add'>+</div><div class='ctx'> int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			       struct kvm_device_attr *attr);</div><div class='ctx'> int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -1332,7 +1401,6 @@ int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm,</div><div class='ctx'> 					struct reg_mask_range *range);</div><div class='ctx'> </div><div class='ctx'> /* Guest/host FPSIMD coordination helpers */</div><div class='del'>-int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -1343,14 +1411,13 @@ static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)</div><div class='ctx'> 	return (!has_vhe() &amp;&amp; attr-&gt;exclude_host);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Flags for host debug state */</div><div class='del'>-void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu);</div><div class='del'>-void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_KVM</div><div class='ctx'> void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr);</div><div class='ctx'> void kvm_clr_pmu_events(u64 clr);</div><div class='ctx'> bool kvm_set_pmuserenr(u64 val);</div><div class='add'>+void kvm_enable_trbe(void);</div><div class='add'>+void kvm_disable_trbe(void);</div><div class='add'>+void kvm_tracing_set_el1_configuration(u64 trfcr_while_in_guest);</div><div class='ctx'> #else</div><div class='ctx'> static inline void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr) {}</div><div class='ctx'> static inline void kvm_clr_pmu_events(u64 clr) {}</div><div class='hunk'>@@ -1358,6 +1425,9 @@ static inline bool kvm_set_pmuserenr(u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+static inline void kvm_enable_trbe(void) {}</div><div class='add'>+static inline void kvm_disable_trbe(void) {}</div><div class='add'>+static inline void kvm_tracing_set_el1_configuration(u64 trfcr_while_in_guest) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -1373,7 +1443,7 @@ struct kvm *kvm_arch_alloc_vm(void);</div><div class='ctx'> </div><div class='ctx'> #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE</div><div class='ctx'> </div><div class='del'>-#define kvm_vm_is_protected(kvm)	(is_protected_kvm_enabled() &amp;&amp; (kvm)-&gt;arch.pkvm.enabled)</div><div class='add'>+#define kvm_vm_is_protected(kvm)	(is_protected_kvm_enabled() &amp;&amp; (kvm)-&gt;arch.pkvm.is_protected)</div><div class='ctx'> </div><div class='ctx'> #define vcpu_is_protected(vcpu)		kvm_vm_is_protected((vcpu)-&gt;kvm)</div><div class='ctx'> </div><div class='hunk'>@@ -1398,6 +1468,7 @@ static inline bool __vcpu_has_feature(const struct kvm_arch *ka, int feature)</div><div class='ctx'> 	return test_bit(feature, ka-&gt;vcpu_features);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define kvm_vcpu_has_feature(k, f)	__vcpu_has_feature(&amp;(k)-&gt;arch, (f))</div><div class='ctx'> #define vcpu_has_feature(v, f)	__vcpu_has_feature(&amp;(v)-&gt;kvm-&gt;arch, (f))</div><div class='ctx'> </div><div class='ctx'> #define kvm_vcpu_initialized(v) vcpu_get_flag(vcpu, VCPU_INITIALIZED)</div><div class='hunk'>@@ -1421,6 +1492,12 @@ static inline u64 *__vm_id_reg(struct kvm_arch *ka, u32 reg)</div><div class='ctx'> 		return &amp;ka-&gt;id_regs[IDREG_IDX(reg)];</div><div class='ctx'> 	case SYS_CTR_EL0:</div><div class='ctx'> 		return &amp;ka-&gt;ctr_el0;</div><div class='add'>+	case SYS_MIDR_EL1:</div><div class='add'>+		return &amp;ka-&gt;midr_el1;</div><div class='add'>+	case SYS_REVIDR_EL1:</div><div class='add'>+		return &amp;ka-&gt;revidr_el1;</div><div class='add'>+	case SYS_AIDR_EL1:</div><div class='add'>+		return &amp;ka-&gt;aidr_el1;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -1467,12 +1544,16 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);</div><div class='ctx'> 	 kvm_cmp_feat_signed(kvm, id, fld, op, limit) :			\</div><div class='ctx'> 	 kvm_cmp_feat_unsigned(kvm, id, fld, op, limit))</div><div class='ctx'> </div><div class='del'>-#define kvm_has_feat(kvm, id, fld, limit)				\</div><div class='add'>+#define __kvm_has_feat(kvm, id, fld, limit)				\</div><div class='ctx'> 	kvm_cmp_feat(kvm, id, fld, &gt;=, limit)</div><div class='ctx'> </div><div class='del'>-#define kvm_has_feat_enum(kvm, id, fld, val)				\</div><div class='add'>+#define kvm_has_feat(kvm, ...) __kvm_has_feat(kvm, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define __kvm_has_feat_enum(kvm, id, fld, val)				\</div><div class='ctx'> 	kvm_cmp_feat_unsigned(kvm, id, fld, ==, val)</div><div class='ctx'> </div><div class='add'>+#define kvm_has_feat_enum(kvm, ...) __kvm_has_feat_enum(kvm, __VA_ARGS__)</div><div class='add'>+</div><div class='ctx'> #define kvm_has_feat_range(kvm, id, fld, min, max)			\</div><div class='ctx'> 	(kvm_cmp_feat(kvm, id, fld, &gt;=, min) &amp;&amp;				\</div><div class='ctx'> 	kvm_cmp_feat(kvm, id, fld, &lt;=, max))</div><div class='hunk'>@@ -1496,4 +1577,29 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);</div><div class='ctx'> 	(system_supports_fpmr() &amp;&amp;			\</div><div class='ctx'> 	 kvm_has_feat((k), ID_AA64PFR2_EL1, FPMR, IMP))</div><div class='ctx'> </div><div class='add'>+#define kvm_has_tcr2(k)				\</div><div class='add'>+	(kvm_has_feat((k), ID_AA64MMFR3_EL1, TCRX, IMP))</div><div class='add'>+</div><div class='add'>+#define kvm_has_s1pie(k)				\</div><div class='add'>+	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP))</div><div class='add'>+</div><div class='add'>+#define kvm_has_s1poe(k)				\</div><div class='add'>+	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))</div><div class='add'>+</div><div class='add'>+#define kvm_has_ras(k)					\</div><div class='add'>+	(kvm_has_feat((k), ID_AA64PFR0_EL1, RAS, IMP))</div><div class='add'>+</div><div class='add'>+#define kvm_has_sctlr2(k)				\</div><div class='add'>+	(kvm_has_feat((k), ID_AA64MMFR3_EL1, SCTLRX, IMP))</div><div class='add'>+</div><div class='add'>+static inline bool kvm_arch_has_irq_bypass(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void compute_fgu(struct kvm *kvm, enum fgt_group_id fgt);</div><div class='add'>+void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *res1);</div><div class='add'>+void check_feature_map(void);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KVM_HOST_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h<br/>index c838309e4ec4..e6be1f5d0967 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_hyp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_hyp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_hyp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_hyp.h</a></div><div class='hunk'>@@ -76,6 +76,8 @@ DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);</div><div class='ctx'> </div><div class='ctx'> int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+u64 __gic_v3_get_lr(unsigned int lr);</div><div class='add'>+</div><div class='ctx'> void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);</div><div class='ctx'> void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);</div><div class='ctx'> void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h<br/>index cd4087fbda9a..e4069f2ce642 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_mmu.h</a></div><div class='hunk'>@@ -139,6 +139,8 @@ static __always_inline unsigned long __kern_hyp_va(unsigned long v)</div><div class='ctx'> </div><div class='ctx'> #define kern_hyp_va(v) 	((typeof(v))(__kern_hyp_va((unsigned long)(v))))</div><div class='ctx'> </div><div class='add'>+extern u32 __hyp_va_bits;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We currently support using a VM-specified IPA size. For backward</div><div class='ctx'>  * compatibility, the default IPA size is fixed to 40bits.</div><div class='hunk'>@@ -166,7 +168,8 @@ int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,</div><div class='ctx'> int create_hyp_stack(phys_addr_t phys_addr, unsigned long *haddr);</div><div class='ctx'> void __init free_hyp_pgds(void);</div><div class='ctx'> </div><div class='del'>-void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size);</div><div class='add'>+void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start,</div><div class='add'>+			    u64 size, bool may_block);</div><div class='ctx'> void kvm_stage2_flush_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end);</div><div class='ctx'> void kvm_stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end);</div><div class='ctx'> </div><div class='hunk'>@@ -177,6 +180,7 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu);</div><div class='ctx'> int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,</div><div class='ctx'> 			  phys_addr_t pa, unsigned long size, bool writable);</div><div class='ctx'> </div><div class='add'>+int kvm_handle_guest_sea(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_handle_guest_abort(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> phys_addr_t kvm_mmu_get_httbr(void);</div><div class='hunk'>@@ -352,6 +356,40 @@ static inline bool kvm_is_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu)</div><div class='ctx'> 	return &amp;kvm-&gt;arch.mmu != mmu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void kvm_fault_lock(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		write_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	else</div><div class='add'>+		read_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvm_fault_unlock(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		write_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	else</div><div class='add'>+		read_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ARM64 KVM relies on a simple conversion from physaddr to a kernel</div><div class='add'>+ * virtual address (KVA) when it does cache maintenance as the CMO</div><div class='add'>+ * instructions work on virtual addresses. This is incompatible with</div><div class='add'>+ * VM_PFNMAP VMAs which may not have a kernel direct mapping to a</div><div class='add'>+ * virtual address.</div><div class='add'>+ *</div><div class='add'>+ * With S2FWB and CACHE DIC features, KVM need not do cache flushing</div><div class='add'>+ * and CMOs are NOP'd. This has the effect of no longer requiring a</div><div class='add'>+ * KVA for addresses mapped into the S2. The presence of these features</div><div class='add'>+ * are thus necessary to support cacheable S2 mapping of VM_PFNMAP.</div><div class='add'>+ */</div><div class='add'>+static inline bool kvm_supports_cacheable_pfnmap(void)</div><div class='add'>+{</div><div class='add'>+	return cpus_have_final_cap(ARM64_HAS_STAGE2_FWB) &amp;&amp;</div><div class='add'>+	       cpus_have_final_cap(ARM64_HAS_CACHE_DIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS</div><div class='ctx'> void kvm_s2_ptdump_create_debugfs(struct kvm *kvm);</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h<br/>index e8bc6d67aba2..f7c06a840963 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_nested.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_nested.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_nested.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_nested.h</a></div><div class='hunk'>@@ -33,14 +33,14 @@ static inline u64 translate_tcr_el2_to_tcr_el1(u64 tcr)</div><div class='ctx'> </div><div class='ctx'> static inline u64 translate_cptr_el2_to_cpacr_el1(u64 cptr_el2)</div><div class='ctx'> {</div><div class='del'>-	u64 cpacr_el1 = CPACR_ELx_RES1;</div><div class='add'>+	u64 cpacr_el1 = CPACR_EL1_RES1;</div><div class='ctx'> </div><div class='ctx'> 	if (cptr_el2 &amp; CPTR_EL2_TTA)</div><div class='del'>-		cpacr_el1 |= CPACR_ELx_TTA;</div><div class='add'>+		cpacr_el1 |= CPACR_EL1_TTA;</div><div class='ctx'> 	if (!(cptr_el2 &amp; CPTR_EL2_TFP))</div><div class='del'>-		cpacr_el1 |= CPACR_ELx_FPEN;</div><div class='add'>+		cpacr_el1 |= CPACR_EL1_FPEN;</div><div class='ctx'> 	if (!(cptr_el2 &amp; CPTR_EL2_TZ))</div><div class='del'>-		cpacr_el1 |= CPACR_ELx_ZEN;</div><div class='add'>+		cpacr_el1 |= CPACR_EL1_ZEN;</div><div class='ctx'> </div><div class='ctx'> 	cpacr_el1 |= cptr_el2 &amp; (CPTR_EL2_TCPAC | CPTR_EL2_TAM);</div><div class='ctx'> </div><div class='hunk'>@@ -64,6 +64,7 @@ static inline u64 translate_ttbr0_el2_to_ttbr0_el1(u64 ttbr0)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern bool forward_smc_trap(struct kvm_vcpu *vcpu);</div><div class='add'>+extern bool forward_debug_exception(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern void kvm_init_nested(struct kvm *kvm);</div><div class='ctx'> extern int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu);</div><div class='hunk'>@@ -78,6 +79,12 @@ extern void kvm_s2_mmu_iterate_by_vmid(struct kvm *kvm, u16 vmid,</div><div class='ctx'> extern void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+extern void check_nested_vcpu_requests(struct kvm_vcpu *vcpu);</div><div class='add'>+extern void kvm_nested_flush_hwstate(struct kvm_vcpu *vcpu);</div><div class='add'>+extern void kvm_nested_sync_hwstate(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+extern void kvm_nested_setup_mdcr_el2(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='ctx'> struct kvm_s2_trans {</div><div class='ctx'> 	phys_addr_t output;</div><div class='ctx'> 	unsigned long block_size;</div><div class='hunk'>@@ -124,7 +131,7 @@ extern int kvm_s2_handle_perm_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				    struct kvm_s2_trans *trans);</div><div class='ctx'> extern int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2);</div><div class='ctx'> extern void kvm_nested_s2_wp(struct kvm *kvm);</div><div class='del'>-extern void kvm_nested_s2_unmap(struct kvm *kvm);</div><div class='add'>+extern void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block);</div><div class='ctx'> extern void kvm_nested_s2_flush(struct kvm *kvm);</div><div class='ctx'> </div><div class='ctx'> unsigned long compute_tlb_inval_range(struct kvm_s2_mmu *mmu, u64 val);</div><div class='hunk'>@@ -184,7 +191,8 @@ static inline bool kvm_supported_tlbi_s1e2_op(struct kvm_vcpu *vpcu, u32 instr)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_init_nv_sysregs(struct kvm *kvm);</div><div class='add'>+int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu);</div><div class='add'>+u64 limit_nv_id_reg(struct kvm *kvm, u32 reg, u64 val);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_PTR_AUTH</div><div class='ctx'> bool kvm_auth_eretax(struct kvm_vcpu *vcpu, u64 *elr);</div><div class='hunk'>@@ -227,7 +235,39 @@ static inline u64 kvm_encode_nested_level(struct kvm_s2_trans *trans)</div><div class='ctx'> 		shift;							\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='del'>-static inline unsigned int ps_to_output_size(unsigned int ps)</div><div class='add'>+static inline u64 decode_range_tlbi(u64 val, u64 *range, u16 *asid)</div><div class='add'>+{</div><div class='add'>+	u64 base, tg, num, scale;</div><div class='add'>+	int shift;</div><div class='add'>+</div><div class='add'>+	tg	= FIELD_GET(GENMASK(47, 46), val);</div><div class='add'>+</div><div class='add'>+	switch(tg) {</div><div class='add'>+	case 1:</div><div class='add'>+		shift = 12;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		shift = 14;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+	default:		/* IMPDEF: handle tg==0 as 64k */</div><div class='add'>+		shift = 16;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	base	= (val &amp; GENMASK(36, 0)) &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	if (asid)</div><div class='add'>+		*asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+</div><div class='add'>+	scale	= FIELD_GET(GENMASK(45, 44), val);</div><div class='add'>+	num	= FIELD_GET(GENMASK(43, 39), val);</div><div class='add'>+	*range	= __TLBI_RANGE_PAGES(num, scale) &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	return base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int ps_to_output_size(unsigned int ps, bool pa52bit)</div><div class='ctx'> {</div><div class='ctx'> 	switch (ps) {</div><div class='ctx'> 	case 0: return 32;</div><div class='hunk'>@@ -235,10 +275,99 @@ static inline unsigned int ps_to_output_size(unsigned int ps)</div><div class='ctx'> 	case 2: return 40;</div><div class='ctx'> 	case 3: return 42;</div><div class='ctx'> 	case 4: return 44;</div><div class='del'>-	case 5:</div><div class='add'>+	case 5: return 48;</div><div class='add'>+	case 6: if (pa52bit)</div><div class='add'>+			return 52;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 48;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum trans_regime {</div><div class='add'>+	TR_EL10,</div><div class='add'>+	TR_EL20,</div><div class='add'>+	TR_EL2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_info;</div><div class='add'>+</div><div class='add'>+struct s1_walk_context {</div><div class='add'>+	struct s1_walk_info	*wi;</div><div class='add'>+	u64			table_ipa;</div><div class='add'>+	int			level;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_filter {</div><div class='add'>+	int	(*fn)(struct s1_walk_context *, void *);</div><div class='add'>+	void	*priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_info {</div><div class='add'>+	struct s1_walk_filter	*filter;</div><div class='add'>+	u64	     		baddr;</div><div class='add'>+	enum trans_regime	regime;</div><div class='add'>+	unsigned int		max_oa_bits;</div><div class='add'>+	unsigned int		pgshift;</div><div class='add'>+	unsigned int		txsz;</div><div class='add'>+	int 	     		sl;</div><div class='add'>+	u8			sh;</div><div class='add'>+	bool			as_el0;</div><div class='add'>+	bool	     		hpd;</div><div class='add'>+	bool			e0poe;</div><div class='add'>+	bool			poe;</div><div class='add'>+	bool			pan;</div><div class='add'>+	bool	     		be;</div><div class='add'>+	bool	     		s2;</div><div class='add'>+	bool			pa52bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_result {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u64	desc;</div><div class='add'>+			u64	pa;</div><div class='add'>+			s8	level;</div><div class='add'>+			u8	APTable;</div><div class='add'>+			bool	nG;</div><div class='add'>+			u16	asid;</div><div class='add'>+			bool	UXNTable;</div><div class='add'>+			bool	PXNTable;</div><div class='add'>+			bool	uwxn;</div><div class='add'>+			bool	uov;</div><div class='add'>+			bool	ur;</div><div class='add'>+			bool	uw;</div><div class='add'>+			bool	ux;</div><div class='add'>+			bool	pwxn;</div><div class='add'>+			bool	pov;</div><div class='add'>+			bool	pr;</div><div class='add'>+			bool	pw;</div><div class='add'>+			bool	px;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8	fst;</div><div class='add'>+			bool	ptw;</div><div class='add'>+			bool	s2;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	bool	failed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __kvm_translate_va(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='add'>+		       struct s1_walk_result *wr, u64 va);</div><div class='add'>+int __kvm_find_s1_desc_level(struct kvm_vcpu *vcpu, u64 va, u64 ipa,</div><div class='add'>+			     int *level);</div><div class='add'>+</div><div class='add'>+/* VNCR management */</div><div class='add'>+int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val);</div><div class='add'>+</div><div class='add'>+#define vncr_fixmap(c)						\</div><div class='add'>+	({							\</div><div class='add'>+		u32 __c = (c);					\</div><div class='add'>+		BUG_ON(__c &gt;= NR_CPUS);				\</div><div class='add'>+		(FIX_VNCR - __c);				\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KVM_NESTED_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h<br/>index 03f4c3d7839c..2888b5d03757 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_pgtable.h</a></div><div class='hunk'>@@ -59,6 +59,11 @@ typedef u64 kvm_pte_t;</div><div class='ctx'> </div><div class='ctx'> #define KVM_PHYS_INVALID		(-1ULL)</div><div class='ctx'> </div><div class='add'>+#define KVM_PTE_TYPE			BIT(1)</div><div class='add'>+#define KVM_PTE_TYPE_BLOCK		0</div><div class='add'>+#define KVM_PTE_TYPE_PAGE		1</div><div class='add'>+#define KVM_PTE_TYPE_TABLE		1</div><div class='add'>+</div><div class='ctx'> #define KVM_PTE_LEAF_ATTR_LO		GENMASK(11, 2)</div><div class='ctx'> </div><div class='ctx'> #define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX	GENMASK(4, 2)</div><div class='hunk'>@@ -412,15 +417,20 @@ static inline bool kvm_pgtable_walk_lock_held(void)</div><div class='ctx'>  *			be used instead of block mappings.</div><div class='ctx'>  */</div><div class='ctx'> struct kvm_pgtable {</div><div class='del'>-	u32					ia_bits;</div><div class='del'>-	s8					start_level;</div><div class='del'>-	kvm_pteref_t				pgd;</div><div class='del'>-	struct kvm_pgtable_mm_ops		*mm_ops;</div><div class='del'>-</div><div class='del'>-	/* Stage-2 only */</div><div class='del'>-	struct kvm_s2_mmu			*mmu;</div><div class='del'>-	enum kvm_pgtable_stage2_flags		flags;</div><div class='del'>-	kvm_pgtable_force_pte_cb_t		force_pte_cb;</div><div class='add'>+	union {</div><div class='add'>+		struct rb_root_cached				pkvm_mappings;</div><div class='add'>+		struct {</div><div class='add'>+			u32					ia_bits;</div><div class='add'>+			s8					start_level;</div><div class='add'>+			kvm_pteref_t				pgd;</div><div class='add'>+			struct kvm_pgtable_mm_ops		*mm_ops;</div><div class='add'>+</div><div class='add'>+			/* Stage-2 only */</div><div class='add'>+			enum kvm_pgtable_stage2_flags		flags;</div><div class='add'>+			kvm_pgtable_force_pte_cb_t		force_pte_cb;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	struct kvm_s2_mmu					*mmu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -526,8 +536,11 @@ int __kvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='ctx'> 			      enum kvm_pgtable_stage2_flags flags,</div><div class='ctx'> 			      kvm_pgtable_force_pte_cb_t force_pte_cb);</div><div class='ctx'> </div><div class='del'>-#define kvm_pgtable_stage2_init(pgt, mmu, mm_ops) \</div><div class='del'>-	__kvm_pgtable_stage2_init(pgt, mmu, mm_ops, 0, NULL)</div><div class='add'>+static inline int kvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='add'>+					  struct kvm_pgtable_mm_ops *mm_ops)</div><div class='add'>+{</div><div class='add'>+	return __kvm_pgtable_stage2_init(pgt, mmu, mm_ops, 0, NULL);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * kvm_pgtable_stage2_destroy() - Destroy an unused guest stage-2 page-table.</div><div class='hunk'>@@ -669,15 +682,15 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size);</div><div class='ctx'>  * kvm_pgtable_stage2_mkyoung() - Set the access flag in a page-table entry.</div><div class='ctx'>  * @pgt:	Page-table structure initialised by kvm_pgtable_stage2_init*().</div><div class='ctx'>  * @addr:	Intermediate physical address to identify the page-table entry.</div><div class='add'>+ * @flags:	Flags to control the page-table walk (ex. a shared walk)</div><div class='ctx'>  *</div><div class='ctx'>  * The offset of @addr within a page is ignored.</div><div class='ctx'>  *</div><div class='ctx'>  * If there is a valid, leaf page-table entry used to translate @addr, then</div><div class='ctx'>  * set the access flag in that entry.</div><div class='del'>- *</div><div class='del'>- * Return: The old page-table entry prior to setting the flag, 0 on failure.</div><div class='ctx'>  */</div><div class='del'>-kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr);</div><div class='add'>+void kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,</div><div class='add'>+				enum kvm_pgtable_walk_flags flags);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * kvm_pgtable_stage2_test_clear_young() - Test and optionally clear the access</div><div class='hunk'>@@ -707,6 +720,7 @@ bool kvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr,</div><div class='ctx'>  * @pgt:	Page-table structure initialised by kvm_pgtable_stage2_init*().</div><div class='ctx'>  * @addr:	Intermediate physical address to identify the page-table entry.</div><div class='ctx'>  * @prot:	Additional permissions to grant for the mapping.</div><div class='add'>+ * @flags:	Flags to control the page-table walk (ex. a shared walk)</div><div class='ctx'>  *</div><div class='ctx'>  * The offset of @addr within a page is ignored.</div><div class='ctx'>  *</div><div class='hunk'>@@ -719,7 +733,8 @@ bool kvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr,</div><div class='ctx'>  * Return: 0 on success, negative error code on failure.</div><div class='ctx'>  */</div><div class='ctx'> int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,</div><div class='del'>-				   enum kvm_pgtable_prot prot);</div><div class='add'>+				   enum kvm_pgtable_prot prot,</div><div class='add'>+				   enum kvm_pgtable_walk_flags flags);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * kvm_pgtable_stage2_flush_range() - Clean and invalidate data cache to Point</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_pkvm.h b/arch/arm64/include/asm/kvm_pkvm.h<br/>index cd56acd9a842..08be89c95466 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_pkvm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_pkvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_pkvm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/kvm_pkvm.h</a></div><div class='hunk'>@@ -18,7 +18,34 @@</div><div class='ctx'> </div><div class='ctx'> int pkvm_init_host_vm(struct kvm *kvm);</div><div class='ctx'> int pkvm_create_hyp_vm(struct kvm *kvm);</div><div class='add'>+bool pkvm_hyp_vm_is_created(struct kvm *kvm);</div><div class='ctx'> void pkvm_destroy_hyp_vm(struct kvm *kvm);</div><div class='add'>+int pkvm_create_hyp_vcpu(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This functions as an allow-list of protected VM capabilities.</div><div class='add'>+ * Features not explicitly allowed by this function are denied.</div><div class='add'>+ */</div><div class='add'>+static inline bool kvm_pvm_ext_allowed(long ext)</div><div class='add'>+{</div><div class='add'>+	switch (ext) {</div><div class='add'>+	case KVM_CAP_IRQCHIP:</div><div class='add'>+	case KVM_CAP_ARM_PSCI:</div><div class='add'>+	case KVM_CAP_ARM_PSCI_0_2:</div><div class='add'>+	case KVM_CAP_NR_VCPUS:</div><div class='add'>+	case KVM_CAP_MAX_VCPUS:</div><div class='add'>+	case KVM_CAP_MAX_VCPU_ID:</div><div class='add'>+	case KVM_CAP_MSI_DEVID:</div><div class='add'>+	case KVM_CAP_ARM_VM_IPA_SIZE:</div><div class='add'>+	case KVM_CAP_ARM_PMU_V3:</div><div class='add'>+	case KVM_CAP_ARM_SVE:</div><div class='add'>+	case KVM_CAP_ARM_PTRAUTH_ADDRESS:</div><div class='add'>+	case KVM_CAP_ARM_PTRAUTH_GENERIC:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> extern struct memblock_region kvm_nvhe_sym(hyp_memory)[];</div><div class='ctx'> extern unsigned int kvm_nvhe_sym(hyp_memblock_nr);</div><div class='hunk'>@@ -109,6 +136,12 @@ static inline unsigned long host_s2_pgtable_pages(void)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+static inline unsigned long pkvm_selftest_pages(void) { return 32; }</div><div class='add'>+#else</div><div class='add'>+static inline unsigned long pkvm_selftest_pages(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define KVM_FFA_MBOX_NR_PAGES	1</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long hyp_ffa_proxy_pages(void)</div><div class='hunk'>@@ -137,4 +170,32 @@ static inline size_t pkvm_host_sve_state_size(void)</div><div class='ctx'> 			SVE_SIG_REGS_SIZE(sve_vq_from_vl(kvm_host_sve_max_vl)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct pkvm_mapping {</div><div class='add'>+	struct rb_node node;</div><div class='add'>+	u64 gfn;</div><div class='add'>+	u64 pfn;</div><div class='add'>+	u64 nr_pages;</div><div class='add'>+	u64 __subtree_last;	/* Internal member for interval tree */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='add'>+			     struct kvm_pgtable_mm_ops *mm_ops);</div><div class='add'>+void pkvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt);</div><div class='add'>+int pkvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size, u64 phys,</div><div class='add'>+			    enum kvm_pgtable_prot prot, void *mc,</div><div class='add'>+			    enum kvm_pgtable_walk_flags flags);</div><div class='add'>+int pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size);</div><div class='add'>+int pkvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size);</div><div class='add'>+int pkvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size);</div><div class='add'>+bool pkvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr, u64 size, bool mkold);</div><div class='add'>+int pkvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, enum kvm_pgtable_prot prot,</div><div class='add'>+				    enum kvm_pgtable_walk_flags flags);</div><div class='add'>+void pkvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,</div><div class='add'>+				 enum kvm_pgtable_walk_flags flags);</div><div class='add'>+int pkvm_pgtable_stage2_split(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='add'>+			      struct kvm_mmu_memory_cache *mc);</div><div class='add'>+void pkvm_pgtable_stage2_free_unlinked(struct kvm_pgtable_mm_ops *mm_ops, void *pgtable, s8 level);</div><div class='add'>+kvm_pte_t *pkvm_pgtable_stage2_create_unlinked(struct kvm_pgtable *pgt, u64 phys, s8 level,</div><div class='add'>+					       enum kvm_pgtable_prot prot, void *mc,</div><div class='add'>+					       bool force_pte);</div><div class='ctx'> #endif	/* __ARM64_KVM_PKVM_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_ras.h b/arch/arm64/include/asm/kvm_ras.h<br/>deleted file mode 100644<br/>index 87e10d9a635b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/kvm_ras.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/kvm_ras.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright (C) 2018 - Arm Ltd */</div><div class='del'>-</div><div class='del'>-#ifndef __ARM64_KVM_RAS_H__</div><div class='del'>-#define __ARM64_KVM_RAS_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/acpi.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/acpi.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Was this synchronous external abort a RAS notification?</div><div class='del'>- * Returns '0' for errors handled by some RAS subsystem, or -ENOENT.</div><div class='del'>- */</div><div class='del'>-static inline int kvm_handle_guest_sea(phys_addr_t addr, u64 esr)</div><div class='del'>-{</div><div class='del'>-	/* apei_claim_sea(NULL) expects to mask interrupts itself */</div><div class='del'>-	lockdep_assert_irqs_enabled();</div><div class='del'>-</div><div class='del'>-	return apei_claim_sea(NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __ARM64_KVM_RAS_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/mem_encrypt.h b/arch/arm64/include/asm/mem_encrypt.h<br/>index b0c9a86b13a4..314b2b52025f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mem_encrypt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mem_encrypt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mem_encrypt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mem_encrypt.h</a></div><div class='hunk'>@@ -2,6 +2,10 @@</div><div class='ctx'> #ifndef __ASM_MEM_ENCRYPT_H</div><div class='ctx'> #define __ASM_MEM_ENCRYPT_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='add'>+</div><div class='add'>+struct device;</div><div class='add'>+</div><div class='ctx'> struct arm64_mem_crypt_ops {</div><div class='ctx'> 	int (*encrypt)(unsigned long addr, int numpages);</div><div class='ctx'> 	int (*decrypt)(unsigned long addr, int numpages);</div><div class='hunk'>@@ -12,4 +16,22 @@ int arm64_mem_crypt_ops_register(const struct arm64_mem_crypt_ops *ops);</div><div class='ctx'> int set_memory_encrypted(unsigned long addr, int numpages);</div><div class='ctx'> int set_memory_decrypted(unsigned long addr, int numpages);</div><div class='ctx'> </div><div class='add'>+int realm_register_memory_enc_ops(void);</div><div class='add'>+</div><div class='add'>+static inline bool force_dma_unencrypted(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return is_realm_world();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For Arm CCA guests, canonical addresses are "encrypted", so no changes</div><div class='add'>+ * required for dma_addr_encrypted().</div><div class='add'>+ * The unencrypted DMA buffers must be accessed via the unprotected IPA,</div><div class='add'>+ * "top IPA bit" set.</div><div class='add'>+ */</div><div class='add'>+#define dma_addr_unencrypted(x)		((x) | PROT_NS_SHARED)</div><div class='add'>+</div><div class='add'>+/* Clear the "top" IPA bit while converting back */</div><div class='add'>+#define dma_addr_canonical(x)		((x) &amp; ~PROT_NS_SHARED)</div><div class='add'>+</div><div class='ctx'> #endif	/* __ASM_MEM_ENCRYPT_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h<br/>index 0480c61dbb4f..f1505c4acb38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/memory.h</a></div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> #define PAGE_END		(_PAGE_END(VA_BITS_MIN))</div><div class='ctx'> #endif /* CONFIG_KASAN */</div><div class='ctx'> </div><div class='del'>-#define PHYSMEM_END		__pa(PAGE_END - 1)</div><div class='add'>+#define DIRECT_MAP_PHYSMEM_END	__pa(PAGE_END - 1)</div><div class='ctx'> </div><div class='ctx'> #define MIN_THREAD_SHIFT	(14 + KASAN_THREAD_SHIFT)</div><div class='ctx'> </div><div class='hunk'>@@ -118,7 +118,7 @@</div><div class='ctx'>  * VMAP'd stacks are allocated at page granularity, so we must ensure that such</div><div class='ctx'>  * stacks are a multiple of page size.</div><div class='ctx'>  */</div><div class='del'>-#if defined(CONFIG_VMAP_STACK) &amp;&amp; (MIN_THREAD_SHIFT &lt; PAGE_SHIFT)</div><div class='add'>+#if (MIN_THREAD_SHIFT &lt; PAGE_SHIFT)</div><div class='ctx'> #define THREAD_SHIFT		PAGE_SHIFT</div><div class='ctx'> #else</div><div class='ctx'> #define THREAD_SHIFT		MIN_THREAD_SHIFT</div><div class='hunk'>@@ -135,23 +135,22 @@</div><div class='ctx'>  * checking sp &amp; (1 &lt;&lt; THREAD_SHIFT), which we can do cheaply in the entry</div><div class='ctx'>  * assembly.</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> #define THREAD_ALIGN		(2 * THREAD_SIZE)</div><div class='del'>-#else</div><div class='del'>-#define THREAD_ALIGN		THREAD_SIZE</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define IRQ_STACK_SIZE		THREAD_SIZE</div><div class='ctx'> </div><div class='ctx'> #define OVERFLOW_STACK_SIZE	SZ_4K</div><div class='ctx'> </div><div class='add'>+#define NVHE_STACK_SHIFT       PAGE_SHIFT</div><div class='add'>+#define NVHE_STACK_SIZE        (UL(1) &lt;&lt; NVHE_STACK_SHIFT)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * With the minimum frame size of [x29, x30], exactly half the combined</div><div class='ctx'>  * sizes of the hyp and overflow stacks is the maximum size needed to</div><div class='ctx'>  * save the unwinded stacktrace; plus an additional entry to delimit the</div><div class='ctx'>  * end.</div><div class='ctx'>  */</div><div class='del'>-#define NVHE_STACKTRACE_SIZE	((OVERFLOW_STACK_SIZE + PAGE_SIZE) / 2 + sizeof(long))</div><div class='add'>+#define NVHE_STACKTRACE_SIZE	((OVERFLOW_STACK_SIZE + NVHE_STACK_SIZE) / 2 + sizeof(long))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Alignment of kernel segments (e.g. .text, .data).</div><div class='hunk'>@@ -309,6 +308,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)</div><div class='ctx'> #define arch_enable_tag_checks_sync()		mte_enable_kernel_sync()</div><div class='ctx'> #define arch_enable_tag_checks_async()		mte_enable_kernel_async()</div><div class='ctx'> #define arch_enable_tag_checks_asymm()		mte_enable_kernel_asymm()</div><div class='add'>+#define arch_enable_tag_checks_write_only()	mte_enable_kernel_store_only()</div><div class='ctx'> #define arch_suppress_tag_checks_start()	mte_enable_tco()</div><div class='ctx'> #define arch_suppress_tag_checks_stop()		mte_disable_tco()</div><div class='ctx'> #define arch_force_async_tag_fault()		mte_check_tfsr_exit()</div><div class='hunk'>@@ -354,12 +354,6 @@ extern phys_addr_t __phys_addr_symbol(unsigned long x);</div><div class='ctx'> #define __phys_to_kimg(x)	((unsigned long)((x) + kimage_voffset))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Convert a page to/from a physical address</div><div class='del'>- */</div><div class='del'>-#define page_to_phys(page)	(__pfn_to_phys(page_to_pfn(page)))</div><div class='del'>-#define phys_to_page(phys)	(pfn_to_page(__phys_to_pfn(phys)))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Note: Drivers should NOT use these.  They are the wrong</div><div class='ctx'>  * translation for translating DMA addresses.  Use the driver</div><div class='ctx'>  * DMA support - see dma-mapping.h.</div><div class='head'>diff --git a/arch/arm64/include/asm/mman.h b/arch/arm64/include/asm/mman.h<br/>index 9e39217b4afb..8770c7ee759f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mman.h</a></div><div class='hunk'>@@ -6,12 +6,15 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef BUILD_VDSO</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='add'>+#include &lt;linux/shmem_fs.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,</div><div class='add'>+static inline vm_flags_t arch_calc_vm_prot_bits(unsigned long prot,</div><div class='ctx'> 	unsigned long pkey)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ret = 0;</div><div class='add'>+	vm_flags_t ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (system_supports_bti() &amp;&amp; (prot &amp; PROT_BTI))</div><div class='ctx'> 		ret |= VM_ARM64_BTI;</div><div class='hunk'>@@ -31,19 +34,24 @@ static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,</div><div class='ctx'> }</div><div class='ctx'> #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)</div><div class='ctx'> </div><div class='del'>-static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)</div><div class='add'>+static inline vm_flags_t arch_calc_vm_flag_bits(struct file *file,</div><div class='add'>+						unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only allow MTE on anonymous mappings as these are guaranteed to be</div><div class='ctx'> 	 * backed by tags-capable memory. The vm_flags may be overridden by a</div><div class='ctx'> 	 * filesystem supporting MTE (RAM-based).</div><div class='ctx'> 	 */</div><div class='del'>-	if (system_supports_mte() &amp;&amp; (flags &amp; MAP_ANONYMOUS))</div><div class='del'>-		return VM_MTE_ALLOWED;</div><div class='add'>+	if (system_supports_mte()) {</div><div class='add'>+		if (flags &amp; (MAP_ANONYMOUS | MAP_HUGETLB))</div><div class='add'>+			return VM_MTE_ALLOWED;</div><div class='add'>+		if (shmem_file(file) || is_file_hugepages(file))</div><div class='add'>+			return VM_MTE_ALLOWED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)</div><div class='add'>+#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags)</div><div class='ctx'> </div><div class='ctx'> static inline bool arch_validate_prot(unsigned long prot,</div><div class='ctx'> 	unsigned long addr __always_unused)</div><div class='hunk'>@@ -60,13 +68,28 @@ static inline bool arch_validate_prot(unsigned long prot,</div><div class='ctx'> }</div><div class='ctx'> #define arch_validate_prot(prot, addr) arch_validate_prot(prot, addr)</div><div class='ctx'> </div><div class='del'>-static inline bool arch_validate_flags(unsigned long vm_flags)</div><div class='add'>+static inline bool arch_validate_flags(vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='del'>-	if (!system_supports_mte())</div><div class='del'>-		return true;</div><div class='add'>+	if (system_supports_mte()) {</div><div class='add'>+		/*</div><div class='add'>+		 * only allow VM_MTE if VM_MTE_ALLOWED has been set</div><div class='add'>+		 * previously</div><div class='add'>+		 */</div><div class='add'>+		if ((vm_flags &amp; VM_MTE) &amp;&amp; !(vm_flags &amp; VM_MTE_ALLOWED))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (system_supports_gcs() &amp;&amp; (vm_flags &amp; VM_SHADOW_STACK)) {</div><div class='add'>+		/* An executable GCS isn't a good idea. */</div><div class='add'>+		if (vm_flags &amp; VM_EXEC)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		/* The memory management core should prevent this */</div><div class='add'>+		VM_WARN_ON(vm_flags &amp; VM_SHARED);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> </div><div class='del'>-	/* only allow VM_MTE if VM_MTE_ALLOWED has been set previously */</div><div class='del'>-	return !(vm_flags &amp; VM_MTE) || (vm_flags &amp; VM_MTE_ALLOWED);</div><div class='ctx'> }</div><div class='ctx'> #define arch_validate_flags(vm_flags) arch_validate_flags(vm_flags)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h<br/>index 2ec96d91acc6..78a4dbf75e60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mmu.h</a></div><div class='hunk'>@@ -17,6 +17,13 @@</div><div class='ctx'> #include &lt;linux/refcount.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> </div><div class='add'>+enum pgtable_type {</div><div class='add'>+	TABLE_PTE,</div><div class='add'>+	TABLE_PMD,</div><div class='add'>+	TABLE_PUD,</div><div class='add'>+	TABLE_P4D,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> typedef struct {</div><div class='ctx'> 	atomic64_t	id;</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='hunk'>@@ -71,6 +78,8 @@ extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,</div><div class='ctx'> 			       pgprot_t prot, bool page_mappings_only);</div><div class='ctx'> extern void *fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot);</div><div class='ctx'> extern void mark_linear_text_alias_ro(void);</div><div class='add'>+extern int split_kernel_leaf_mapping(unsigned long start, unsigned long end);</div><div class='add'>+extern void linear_map_maybe_split_to_ptes(void);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This check is triggered during the early boot before the cpufeature</div><div class='hunk'>@@ -94,23 +103,14 @@ static inline bool kaslr_requires_kpti(void)</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Systems affected by Cavium erratum 24756 are incompatible</div><div class='del'>-	 * with KPTI.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {</div><div class='del'>-		extern const struct midr_range cavium_erratum_27456_cpus[];</div><div class='del'>-</div><div class='del'>-		if (is_midr_in_range_list(read_cpuid_id(),</div><div class='del'>-					  cavium_erratum_27456_cpus))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define INIT_MM_CONTEXT(name)	\</div><div class='del'>-	.pgd = swapper_pg_dir,</div><div class='add'>+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0</div><div class='add'>+void kpti_install_ng_mappings(void);</div><div class='add'>+#else</div><div class='add'>+static inline void kpti_install_ng_mappings(void) {}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif	/* !__ASSEMBLY__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h<br/>index 7c09d47e09cb..0dbe3b29049b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mmu_context.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mmu_context.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/daifflags.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='ctx'> #include &lt;asm/proc-fns.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='hunk'>@@ -270,18 +271,26 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline const struct cpumask *</div><div class='del'>-task_cpu_possible_mask(struct task_struct *p)</div><div class='add'>+__task_cpu_possible_mask(struct task_struct *p, const struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	if (!static_branch_unlikely(&amp;arm64_mismatched_32bit_el0))</div><div class='del'>-		return cpu_possible_mask;</div><div class='add'>+		return mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_compat_thread(task_thread_info(p)))</div><div class='del'>-		return cpu_possible_mask;</div><div class='add'>+		return mask;</div><div class='ctx'> </div><div class='ctx'> 	return system_32bit_el0_cpumask();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline const struct cpumask *</div><div class='add'>+task_cpu_possible_mask(struct task_struct *p)</div><div class='add'>+{</div><div class='add'>+	return __task_cpu_possible_mask(p, cpu_possible_mask);</div><div class='add'>+}</div><div class='ctx'> #define task_cpu_possible_mask	task_cpu_possible_mask</div><div class='ctx'> </div><div class='add'>+const struct cpumask *task_cpu_fallback_mask(struct task_struct *p);</div><div class='add'>+</div><div class='ctx'> void verify_cpu_asid_bits(void);</div><div class='ctx'> void post_ttbr_update_workaround(void);</div><div class='ctx'> </div><div class='hunk'>@@ -311,6 +320,14 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,</div><div class='ctx'> 	return por_el0_allows_pkey(vma_pkey(vma), write, execute);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define deactivate_mm deactivate_mm</div><div class='add'>+static inline void deactivate_mm(struct task_struct *tsk,</div><div class='add'>+			struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	gcs_free(tsk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #include &lt;asm-generic/mmu_context.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/module.h b/arch/arm64/include/asm/module.h<br/>index 79550b22ba19..fb9b88eebeb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/module.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/module.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/module.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/module.h</a></div><div class='hunk'>@@ -19,6 +19,7 @@ struct mod_arch_specific {</div><div class='ctx'> </div><div class='ctx'> 	/* for CONFIG_DYNAMIC_FTRACE */</div><div class='ctx'> 	struct plt_entry	*ftrace_trampolines;</div><div class='add'>+	struct plt_entry	*init_ftrace_trampolines;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> u64 module_emit_plt_entry(struct module *mod, Elf64_Shdr *sechdrs,</div><div class='head'>diff --git a/arch/arm64/include/asm/module.lds.h b/arch/arm64/include/asm/module.lds.h<br/>index b9ae8349e35d..fb944b46846d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/module.lds.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/module.lds.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/module.lds.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/module.lds.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@ SECTIONS {</div><div class='ctx'> 	.plt 0 : { BYTE(0) }</div><div class='ctx'> 	.init.plt 0 : { BYTE(0) }</div><div class='ctx'> 	.text.ftrace_trampoline 0 : { BYTE(0) }</div><div class='add'>+	.init.text.ftrace_trampoline 0 : { BYTE(0) }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KASAN_SW_TAGS</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/mshyperv.h<br/>index a975e1a689dd..b721d3134ab6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mshyperv.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mshyperv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mshyperv.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mshyperv.h</a></div><div class='hunk'>@@ -6,9 +6,8 @@</div><div class='ctx'>  * the ARM64 architecture.  See include/asm-generic/mshyperv.h for</div><div class='ctx'>  * definitions are that architecture independent.</div><div class='ctx'>  *</div><div class='del'>- * Definitions that are specified in the Hyper-V Top Level Functional</div><div class='del'>- * Spec (TLFS) should not go in this file, but should instead go in</div><div class='del'>- * hyperv-tlfs.h.</div><div class='add'>+ * Definitions that are derived from Hyper-V code or headers should not go in</div><div class='add'>+ * this file, but should instead go in the relevant files in include/hyperv.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2021, Microsoft, Inc.</div><div class='ctx'>  *</div><div class='hunk'>@@ -20,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/arm-smccc.h&gt;</div><div class='del'>-#include &lt;asm/hyperv-tlfs.h&gt;</div><div class='add'>+#include &lt;hyperv/hvhdk.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Declare calls to get and set Hyper-V VP register values on ARM64, which</div><div class='hunk'>@@ -41,6 +40,19 @@ static inline u64 hv_get_msr(unsigned int reg)</div><div class='ctx'> 	return hv_get_vpreg(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Nested is not supported on arm64</div><div class='add'>+ */</div><div class='add'>+static inline void hv_set_non_nested_msr(unsigned int reg, u64 value)</div><div class='add'>+{</div><div class='add'>+	hv_set_msr(reg, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 hv_get_non_nested_msr(unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	return hv_get_msr(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* SMCCC hypercall parameters */</div><div class='ctx'> #define HV_SMCCC_FUNC_NUMBER	1</div><div class='ctx'> #define HV_FUNC_ID	ARM_SMCCC_CALL_VAL(			\</div><div class='head'>diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h<br/>index 2e98028c1965..0f9b08e8fb8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mte-kasan.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mte-kasan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mte-kasan.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mte-kasan.h</a></div><div class='hunk'>@@ -200,6 +200,7 @@ static inline void mte_set_mem_tag_range(void *addr, size_t size, u8 tag,</div><div class='ctx'> void mte_enable_kernel_sync(void);</div><div class='ctx'> void mte_enable_kernel_async(void);</div><div class='ctx'> void mte_enable_kernel_asymm(void);</div><div class='add'>+int mte_enable_kernel_store_only(void);</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_ARM64_MTE */</div><div class='ctx'> </div><div class='hunk'>@@ -251,6 +252,11 @@ static inline void mte_enable_kernel_asymm(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int mte_enable_kernel_store_only(void)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_ARM64_MTE */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h<br/>index 0f84518632b4..3b5069f4683d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mte.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/mte.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/mte.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/mte.h</a></div><div class='hunk'>@@ -41,17 +41,21 @@ void mte_free_tag_storage(char *storage);</div><div class='ctx'> </div><div class='ctx'> static inline void set_page_mte_tagged(struct page *page)</div><div class='ctx'> {</div><div class='add'>+	VM_WARN_ON_ONCE(folio_test_hugetlb(page_folio(page)));</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure that the tags written prior to this function are visible</div><div class='ctx'> 	 * before the page flags update.</div><div class='ctx'> 	 */</div><div class='ctx'> 	smp_wmb();</div><div class='del'>-	set_bit(PG_mte_tagged, &amp;page-&gt;flags);</div><div class='add'>+	set_bit(PG_mte_tagged, &amp;page-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool page_mte_tagged(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	bool ret = test_bit(PG_mte_tagged, &amp;page-&gt;flags);</div><div class='add'>+	bool ret = test_bit(PG_mte_tagged, &amp;page-&gt;flags.f);</div><div class='add'>+</div><div class='add'>+	VM_WARN_ON_ONCE(folio_test_hugetlb(page_folio(page)));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the page is tagged, ensure ordering with a likely subsequent</div><div class='hunk'>@@ -76,7 +80,9 @@ static inline bool page_mte_tagged(struct page *page)</div><div class='ctx'>  */</div><div class='ctx'> static inline bool try_page_mte_tagging(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	if (!test_and_set_bit(PG_mte_lock, &amp;page-&gt;flags))</div><div class='add'>+	VM_WARN_ON_ONCE(folio_test_hugetlb(page_folio(page)));</div><div class='add'>+</div><div class='add'>+	if (!test_and_set_bit(PG_mte_lock, &amp;page-&gt;flags.f))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -84,7 +90,7 @@ static inline bool try_page_mte_tagging(struct page *page)</div><div class='ctx'> 	 * already. Check if the PG_mte_tagged flag has been set or wait</div><div class='ctx'> 	 * otherwise.</div><div class='ctx'> 	 */</div><div class='del'>-	smp_cond_load_acquire(&amp;page-&gt;flags, VAL &amp; (1UL &lt;&lt; PG_mte_tagged));</div><div class='add'>+	smp_cond_load_acquire(&amp;page-&gt;flags.f, VAL &amp; (1UL &lt;&lt; PG_mte_tagged));</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -157,6 +163,67 @@ static inline int mte_ptrace_copy_tags(struct task_struct *child,</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_ARM64_MTE */</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_HUGETLB_PAGE) &amp;&amp; defined(CONFIG_ARM64_MTE)</div><div class='add'>+static inline void folio_set_hugetlb_mte_tagged(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+	VM_WARN_ON_ONCE(!folio_test_hugetlb(folio));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that the tags written prior to this function are visible</div><div class='add'>+	 * before the folio flags update.</div><div class='add'>+	 */</div><div class='add'>+	smp_wmb();</div><div class='add'>+	set_bit(PG_mte_tagged, &amp;folio-&gt;flags.f);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool folio_test_hugetlb_mte_tagged(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+	bool ret = test_bit(PG_mte_tagged, &amp;folio-&gt;flags.f);</div><div class='add'>+</div><div class='add'>+	VM_WARN_ON_ONCE(!folio_test_hugetlb(folio));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the folio is tagged, ensure ordering with a likely subsequent</div><div class='add'>+	 * read of the tags.</div><div class='add'>+	 */</div><div class='add'>+	if (ret)</div><div class='add'>+		smp_rmb();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool folio_try_hugetlb_mte_tagging(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+	VM_WARN_ON_ONCE(!folio_test_hugetlb(folio));</div><div class='add'>+</div><div class='add'>+	if (!test_and_set_bit(PG_mte_lock, &amp;folio-&gt;flags.f))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The tags are either being initialised or may have been initialised</div><div class='add'>+	 * already. Check if the PG_mte_tagged flag has been set or wait</div><div class='add'>+	 * otherwise.</div><div class='add'>+	 */</div><div class='add'>+	smp_cond_load_acquire(&amp;folio-&gt;flags.f, VAL &amp; (1UL &lt;&lt; PG_mte_tagged));</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void folio_set_hugetlb_mte_tagged(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool folio_test_hugetlb_mte_tagged(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool folio_try_hugetlb_mte_tagging(struct folio *folio)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static inline void mte_disable_tco_entry(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	if (!system_supports_mte())</div><div class='head'>diff --git a/arch/arm64/include/asm/page-def.h b/arch/arm64/include/asm/page-def.h<br/>index 792e9fe881dc..d402e08442ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/page-def.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/page-def.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/page-def.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/page-def.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-#define PAGE_SHIFT		CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE		(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK		(~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PAGE_DEF_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/perf_event.h<br/>index eb7071c9eb34..ee45b4e77347 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/perf_event.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/perf_event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/perf_event.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/perf_event.h</a></div><div class='hunk'>@@ -10,10 +10,6 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PERF_EVENTS</div><div class='del'>-struct pt_regs;</div><div class='del'>-extern unsigned long perf_instruction_pointer(struct pt_regs *regs);</div><div class='del'>-extern unsigned long perf_misc_flags(struct pt_regs *regs);</div><div class='del'>-#define perf_misc_flags(regs)	perf_misc_flags(regs)</div><div class='ctx'> #define perf_arch_bpf_user_pt_regs(regs) &amp;regs-&gt;user_regs</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h<br/>index 8ff5f2a2579e..1b4509d3382c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ static inline void __pud_populate(pud_t *pudp, phys_addr_t pmdp, pudval_t prot)</div><div class='ctx'> </div><div class='ctx'> static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='del'>-	pudval_t pudval = PUD_TYPE_TABLE;</div><div class='add'>+	pudval_t pudval = PUD_TYPE_TABLE | PUD_TABLE_AF;</div><div class='ctx'> </div><div class='ctx'> 	pudval |= (mm == &amp;init_mm) ? PUD_TABLE_UXN : PUD_TABLE_PXN;</div><div class='ctx'> 	__pud_populate(pudp, __pa(pmdp), pudval);</div><div class='hunk'>@@ -50,7 +50,7 @@ static inline void __p4d_populate(p4d_t *p4dp, phys_addr_t pudp, p4dval_t prot)</div><div class='ctx'> </div><div class='ctx'> static inline void p4d_populate(struct mm_struct *mm, p4d_t *p4dp, pud_t *pudp)</div><div class='ctx'> {</div><div class='del'>-	p4dval_t p4dval = P4D_TYPE_TABLE;</div><div class='add'>+	p4dval_t p4dval = P4D_TYPE_TABLE | P4D_TABLE_AF;</div><div class='ctx'> </div><div class='ctx'> 	p4dval |= (mm == &amp;init_mm) ? P4D_TABLE_UXN : P4D_TABLE_PXN;</div><div class='ctx'> 	__p4d_populate(p4dp, __pa(pudp), p4dval);</div><div class='hunk'>@@ -79,30 +79,12 @@ static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t p4dp, pgdval_t prot)</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgdp, p4d_t *p4dp)</div><div class='ctx'> {</div><div class='del'>-	pgdval_t pgdval = PGD_TYPE_TABLE;</div><div class='add'>+	pgdval_t pgdval = PGD_TYPE_TABLE | PGD_TABLE_AF;</div><div class='ctx'> </div><div class='ctx'> 	pgdval |= (mm == &amp;init_mm) ? PGD_TABLE_UXN : PGD_TABLE_PXN;</div><div class='ctx'> 	__pgd_populate(pgdp, __pa(p4dp), pgdval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline p4d_t *p4d_alloc_one(struct mm_struct *mm, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	gfp_t gfp = GFP_PGTABLE_USER;</div><div class='del'>-</div><div class='del'>-	if (mm == &amp;init_mm)</div><div class='del'>-		gfp = GFP_PGTABLE_KERNEL;</div><div class='del'>-	return (p4d_t *)get_zeroed_page(gfp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void p4d_free(struct mm_struct *mm, p4d_t *p4d)</div><div class='del'>-{</div><div class='del'>-	if (!pgtable_l5_enabled())</div><div class='del'>-		return;</div><div class='del'>-	BUG_ON((unsigned long)p4d &amp; (PAGE_SIZE-1));</div><div class='del'>-	free_page((unsigned long)p4d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __p4d_free_tlb(tlb, p4d, addr)  p4d_free((tlb)-&gt;mm, p4d)</div><div class='ctx'> #else</div><div class='ctx'> static inline void __pgd_populate(pgd_t *pgdp, phys_addr_t p4dp, pgdval_t prot)</div><div class='ctx'> {</div><div class='hunk'>@@ -127,14 +109,16 @@ static inline void</div><div class='ctx'> pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	VM_BUG_ON(mm &amp;&amp; mm != &amp;init_mm);</div><div class='del'>-	__pmd_populate(pmdp, __pa(ptep), PMD_TYPE_TABLE | PMD_TABLE_UXN);</div><div class='add'>+	__pmd_populate(pmdp, __pa(ptep),</div><div class='add'>+		       PMD_TYPE_TABLE | PMD_TABLE_AF | PMD_TABLE_UXN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)</div><div class='ctx'> {</div><div class='ctx'> 	VM_BUG_ON(mm == &amp;init_mm);</div><div class='del'>-	__pmd_populate(pmdp, page_to_phys(ptep), PMD_TYPE_TABLE | PMD_TABLE_PXN);</div><div class='add'>+	__pmd_populate(pmdp, page_to_phys(ptep),</div><div class='add'>+		       PMD_TYPE_TABLE | PMD_TABLE_AF | PMD_TABLE_PXN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h<br/>index fd330c1db289..f3b77deedfa2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-hwdef.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-hwdef.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-hwdef.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/pgtable-hwdef.h</a></div><div class='hunk'>@@ -7,40 +7,46 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='add'>+#define PTDESC_ORDER 3</div><div class='add'>+</div><div class='add'>+/* Number of VA bits resolved by a single translation table level */</div><div class='add'>+#define PTDESC_TABLE_SHIFT	(PAGE_SHIFT - PTDESC_ORDER)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Number of page-table levels required to address 'va_bits' wide</div><div class='ctx'>  * address, without section mapping. We resolve the top (va_bits - PAGE_SHIFT)</div><div class='del'>- * bits with (PAGE_SHIFT - 3) bits at each page table level. Hence:</div><div class='add'>+ * bits with PTDESC_TABLE_SHIFT bits at each page table level. Hence:</div><div class='ctx'>  *</div><div class='del'>- *  levels = DIV_ROUND_UP((va_bits - PAGE_SHIFT), (PAGE_SHIFT - 3))</div><div class='add'>+ *  levels = DIV_ROUND_UP((va_bits - PAGE_SHIFT), PTDESC_TABLE_SHIFT)</div><div class='ctx'>  *</div><div class='ctx'>  * where DIV_ROUND_UP(n, d) =&gt; (((n) + (d) - 1) / (d))</div><div class='ctx'>  *</div><div class='ctx'>  * We cannot include linux/kernel.h which defines DIV_ROUND_UP here</div><div class='ctx'>  * due to build issues. So we open code DIV_ROUND_UP here:</div><div class='ctx'>  *</div><div class='del'>- *	((((va_bits) - PAGE_SHIFT) + (PAGE_SHIFT - 3) - 1) / (PAGE_SHIFT - 3))</div><div class='add'>+ *	((((va_bits) - PAGE_SHIFT) + PTDESC_TABLE_SHIFT - 1) / PTDESC_TABLE_SHIFT)</div><div class='ctx'>  *</div><div class='ctx'>  * which gets simplified as :</div><div class='ctx'>  */</div><div class='del'>-#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3))</div><div class='add'>+#define ARM64_HW_PGTABLE_LEVELS(va_bits) \</div><div class='add'>+	(((va_bits) - PTDESC_ORDER - 1) / PTDESC_TABLE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Size mapped by an entry at level n ( -1 &lt;= n &lt;= 3)</div><div class='del'>- * We map (PAGE_SHIFT - 3) at all translation levels and PAGE_SHIFT bits</div><div class='add'>+ * We map PTDESC_TABLE_SHIFT at all translation levels and PAGE_SHIFT bits</div><div class='ctx'>  * in the final page. The maximum number of translation levels supported by</div><div class='ctx'>  * the architecture is 5. Hence, starting at level n, we have further</div><div class='ctx'>  * ((4 - n) - 1) levels of translation excluding the offset within the page.</div><div class='ctx'>  * So, the total number of bits mapped by an entry at level n is :</div><div class='ctx'>  *</div><div class='del'>- *  ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT</div><div class='add'>+ *  ((4 - n) - 1) * PTDESC_TABLE_SHIFT + PAGE_SHIFT</div><div class='ctx'>  *</div><div class='ctx'>  * Rearranging it a bit we get :</div><div class='del'>- *   (4 - n) * (PAGE_SHIFT - 3) + 3</div><div class='add'>+ *   (4 - n) * PTDESC_TABLE_SHIFT + PTDESC_ORDER</div><div class='ctx'>  */</div><div class='del'>-#define ARM64_HW_PGTABLE_LEVEL_SHIFT(n)	((PAGE_SHIFT - 3) * (4 - (n)) + 3)</div><div class='add'>+#define ARM64_HW_PGTABLE_LEVEL_SHIFT(n)	(PTDESC_TABLE_SHIFT * (4 - (n)) + PTDESC_ORDER)</div><div class='ctx'> </div><div class='del'>-#define PTRS_PER_PTE		(1 &lt;&lt; (PAGE_SHIFT - 3))</div><div class='add'>+#define PTRS_PER_PTE		(1 &lt;&lt; PTDESC_TABLE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PMD_SHIFT determines the size a level 2 page table entry can map.</div><div class='hunk'>@@ -49,7 +55,7 @@</div><div class='ctx'> #define PMD_SHIFT		ARM64_HW_PGTABLE_LEVEL_SHIFT(2)</div><div class='ctx'> #define PMD_SIZE		(_AC(1, UL) &lt;&lt; PMD_SHIFT)</div><div class='ctx'> #define PMD_MASK		(~(PMD_SIZE-1))</div><div class='del'>-#define PTRS_PER_PMD		(1 &lt;&lt; (PAGE_SHIFT - 3))</div><div class='add'>+#define PTRS_PER_PMD		(1 &lt;&lt; PTDESC_TABLE_SHIFT)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -59,14 +65,14 @@</div><div class='ctx'> #define PUD_SHIFT		ARM64_HW_PGTABLE_LEVEL_SHIFT(1)</div><div class='ctx'> #define PUD_SIZE		(_AC(1, UL) &lt;&lt; PUD_SHIFT)</div><div class='ctx'> #define PUD_MASK		(~(PUD_SIZE-1))</div><div class='del'>-#define PTRS_PER_PUD		(1 &lt;&lt; (PAGE_SHIFT - 3))</div><div class='add'>+#define PTRS_PER_PUD		(1 &lt;&lt; PTDESC_TABLE_SHIFT)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS &gt; 4</div><div class='ctx'> #define P4D_SHIFT		ARM64_HW_PGTABLE_LEVEL_SHIFT(0)</div><div class='ctx'> #define P4D_SIZE		(_AC(1, UL) &lt;&lt; P4D_SHIFT)</div><div class='ctx'> #define P4D_MASK		(~(P4D_SIZE-1))</div><div class='del'>-#define PTRS_PER_P4D		(1 &lt;&lt; (PAGE_SHIFT - 3))</div><div class='add'>+#define PTRS_PER_P4D		(1 &lt;&lt; PTDESC_TABLE_SHIFT)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -97,8 +103,8 @@</div><div class='ctx'>  * Level -1 descriptor (PGD).</div><div class='ctx'>  */</div><div class='ctx'> #define PGD_TYPE_TABLE		(_AT(pgdval_t, 3) &lt;&lt; 0)</div><div class='del'>-#define PGD_TABLE_BIT		(_AT(pgdval_t, 1) &lt;&lt; 1)</div><div class='ctx'> #define PGD_TYPE_MASK		(_AT(pgdval_t, 3) &lt;&lt; 0)</div><div class='add'>+#define PGD_TABLE_AF		(_AT(pgdval_t, 1) &lt;&lt; 10)	/* Ignored if no FEAT_HAFT */</div><div class='ctx'> #define PGD_TABLE_PXN		(_AT(pgdval_t, 1) &lt;&lt; 59)</div><div class='ctx'> #define PGD_TABLE_UXN		(_AT(pgdval_t, 1) &lt;&lt; 60)</div><div class='ctx'> </div><div class='hunk'>@@ -106,10 +112,10 @@</div><div class='ctx'>  * Level 0 descriptor (P4D).</div><div class='ctx'>  */</div><div class='ctx'> #define P4D_TYPE_TABLE		(_AT(p4dval_t, 3) &lt;&lt; 0)</div><div class='del'>-#define P4D_TABLE_BIT		(_AT(p4dval_t, 1) &lt;&lt; 1)</div><div class='ctx'> #define P4D_TYPE_MASK		(_AT(p4dval_t, 3) &lt;&lt; 0)</div><div class='ctx'> #define P4D_TYPE_SECT		(_AT(p4dval_t, 1) &lt;&lt; 0)</div><div class='ctx'> #define P4D_SECT_RDONLY		(_AT(p4dval_t, 1) &lt;&lt; 7)		/* AP[2] */</div><div class='add'>+#define P4D_TABLE_AF		(_AT(p4dval_t, 1) &lt;&lt; 10)	/* Ignored if no FEAT_HAFT */</div><div class='ctx'> #define P4D_TABLE_PXN		(_AT(p4dval_t, 1) &lt;&lt; 59)</div><div class='ctx'> #define P4D_TABLE_UXN		(_AT(p4dval_t, 1) &lt;&lt; 60)</div><div class='ctx'> </div><div class='hunk'>@@ -117,10 +123,10 @@</div><div class='ctx'>  * Level 1 descriptor (PUD).</div><div class='ctx'>  */</div><div class='ctx'> #define PUD_TYPE_TABLE		(_AT(pudval_t, 3) &lt;&lt; 0)</div><div class='del'>-#define PUD_TABLE_BIT		(_AT(pudval_t, 1) &lt;&lt; 1)</div><div class='ctx'> #define PUD_TYPE_MASK		(_AT(pudval_t, 3) &lt;&lt; 0)</div><div class='ctx'> #define PUD_TYPE_SECT		(_AT(pudval_t, 1) &lt;&lt; 0)</div><div class='ctx'> #define PUD_SECT_RDONLY		(_AT(pudval_t, 1) &lt;&lt; 7)		/* AP[2] */</div><div class='add'>+#define PUD_TABLE_AF		(_AT(pudval_t, 1) &lt;&lt; 10)	/* Ignored if no FEAT_HAFT */</div><div class='ctx'> #define PUD_TABLE_PXN		(_AT(pudval_t, 1) &lt;&lt; 59)</div><div class='ctx'> #define PUD_TABLE_UXN		(_AT(pudval_t, 1) &lt;&lt; 60)</div><div class='ctx'> </div><div class='hunk'>@@ -130,7 +136,7 @@</div><div class='ctx'> #define PMD_TYPE_MASK		(_AT(pmdval_t, 3) &lt;&lt; 0)</div><div class='ctx'> #define PMD_TYPE_TABLE		(_AT(pmdval_t, 3) &lt;&lt; 0)</div><div class='ctx'> #define PMD_TYPE_SECT		(_AT(pmdval_t, 1) &lt;&lt; 0)</div><div class='del'>-#define PMD_TABLE_BIT		(_AT(pmdval_t, 1) &lt;&lt; 1)</div><div class='add'>+#define PMD_TABLE_AF		(_AT(pmdval_t, 1) &lt;&lt; 10)	/* Ignored if no FEAT_HAFT */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Section</div><div class='hunk'>@@ -158,7 +164,6 @@</div><div class='ctx'> #define PTE_VALID		(_AT(pteval_t, 1) &lt;&lt; 0)</div><div class='ctx'> #define PTE_TYPE_MASK		(_AT(pteval_t, 3) &lt;&lt; 0)</div><div class='ctx'> #define PTE_TYPE_PAGE		(_AT(pteval_t, 3) &lt;&lt; 0)</div><div class='del'>-#define PTE_TABLE_BIT		(_AT(pteval_t, 1) &lt;&lt; 1)</div><div class='ctx'> #define PTE_USER		(_AT(pteval_t, 1) &lt;&lt; 6)		/* AP[1] */</div><div class='ctx'> #define PTE_RDONLY		(_AT(pteval_t, 1) &lt;&lt; 7)		/* AP[2] */</div><div class='ctx'> #define PTE_SHARED		(_AT(pteval_t, 3) &lt;&lt; 8)		/* SH[1:0], inner shareable */</div><div class='hunk'>@@ -218,12 +223,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define S1_TABLE_AP		(_AT(pmdval_t, 3) &lt;&lt; 61)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Highest possible physical address supported.</div><div class='del'>- */</div><div class='del'>-#define PHYS_MASK_SHIFT		(CONFIG_ARM64_PA_BITS)</div><div class='del'>-#define PHYS_MASK		((UL(1) &lt;&lt; PHYS_MASK_SHIFT) - 1)</div><div class='del'>-</div><div class='ctx'> #define TTBR_CNP_BIT		(UL(1) &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h<br/>index 2a11d0c10760..85dceb1c66f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-prot.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-prot.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-prot.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/pgtable-prot.h</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #define PTE_SWP_EXCLUSIVE	(_AT(pteval_t, 1) &lt;&lt; 2)	 /* only for swp ptes */</div><div class='ctx'> #define PTE_DIRTY		(_AT(pteval_t, 1) &lt;&lt; 55)</div><div class='ctx'> #define PTE_SPECIAL		(_AT(pteval_t, 1) &lt;&lt; 56)</div><div class='del'>-#define PTE_DEVMAP		(_AT(pteval_t, 1) &lt;&lt; 57)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PTE_PRESENT_INVALID=1 &amp; PTE_VALID=0 indicates that the pte's fields should be</div><div class='hunk'>@@ -35,7 +34,6 @@</div><div class='ctx'> #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */</div><div class='ctx'> </div><div class='ctx'> #define _PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)</div><div class='del'>-#define _PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)</div><div class='ctx'> </div><div class='ctx'> #define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_MAYBE_NG | PTE_MAYBE_SHARED | PTE_AF)</div><div class='ctx'> #define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_MAYBE_NG | PMD_MAYBE_SHARED | PMD_SECT_AF)</div><div class='hunk'>@@ -68,8 +66,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable-types.h&gt;</div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern bool arm64_use_ng_mappings;</div><div class='add'>+extern unsigned long prot_ns_shared;</div><div class='add'>+</div><div class='add'>+#define PROT_NS_SHARED		(is_realm_world() ? prot_ns_shared : 0)</div><div class='ctx'> </div><div class='ctx'> #define PTE_MAYBE_NG		(arm64_use_ng_mappings ? PTE_NG : 0)</div><div class='ctx'> #define PMD_MAYBE_NG		(arm64_use_ng_mappings ? PMD_SECT_NG : 0)</div><div class='hunk'>@@ -78,6 +80,7 @@ extern bool arm64_use_ng_mappings;</div><div class='ctx'> #define lpa2_is_enabled()	false</div><div class='ctx'> #define PTE_MAYBE_SHARED	PTE_SHARED</div><div class='ctx'> #define PMD_MAYBE_SHARED	PMD_SECT_S</div><div class='add'>+#define PHYS_MASK_SHIFT		(CONFIG_ARM64_PA_BITS)</div><div class='ctx'> #else</div><div class='ctx'> static inline bool __pure lpa2_is_enabled(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -86,9 +89,15 @@ static inline bool __pure lpa2_is_enabled(void)</div><div class='ctx'> </div><div class='ctx'> #define PTE_MAYBE_SHARED	(lpa2_is_enabled() ? 0 : PTE_SHARED)</div><div class='ctx'> #define PMD_MAYBE_SHARED	(lpa2_is_enabled() ? 0 : PMD_SECT_S)</div><div class='add'>+#define PHYS_MASK_SHIFT		(lpa2_is_enabled() ? CONFIG_ARM64_PA_BITS : 48)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Highest possible physical address supported.</div><div class='add'>+ */</div><div class='add'>+#define PHYS_MASK		((UL(1) &lt;&lt; PHYS_MASK_SHIFT) - 1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * If we have userspace only BTI we don't want to mark kernel pages</div><div class='ctx'>  * guarded even if the system does support BTI.</div><div class='ctx'>  */</div><div class='hunk'>@@ -144,30 +153,40 @@ static inline bool __pure lpa2_is_enabled(void)</div><div class='ctx'> /* 6:                                PTE_PXN | PTE_WRITE            */</div><div class='ctx'> /* 7: PAGE_SHARED_EXEC               PTE_PXN | PTE_WRITE | PTE_USER */</div><div class='ctx'> /* 8: PAGE_KERNEL_ROX      PTE_UXN                                  */</div><div class='del'>-/* 9:                      PTE_UXN |                       PTE_USER */</div><div class='add'>+/* 9: PAGE_GCS_RO          PTE_UXN |                       PTE_USER */</div><div class='ctx'> /* a: PAGE_KERNEL_EXEC     PTE_UXN |           PTE_WRITE            */</div><div class='del'>-/* b:                      PTE_UXN |           PTE_WRITE | PTE_USER */</div><div class='add'>+/* b: PAGE_GCS             PTE_UXN |           PTE_WRITE | PTE_USER */</div><div class='ctx'> /* c: PAGE_KERNEL_RO       PTE_UXN | PTE_PXN                        */</div><div class='ctx'> /* d: PAGE_READONLY        PTE_UXN | PTE_PXN |             PTE_USER */</div><div class='ctx'> /* e: PAGE_KERNEL          PTE_UXN | PTE_PXN | PTE_WRITE            */</div><div class='ctx'> /* f: PAGE_SHARED          PTE_UXN | PTE_PXN | PTE_WRITE | PTE_USER */</div><div class='ctx'> </div><div class='add'>+#define _PAGE_GCS	(_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_WRITE | PTE_USER)</div><div class='add'>+#define _PAGE_GCS_RO	(_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_USER)</div><div class='add'>+</div><div class='add'>+#define PAGE_GCS	__pgprot(_PAGE_GCS)</div><div class='add'>+#define PAGE_GCS_RO	__pgprot(_PAGE_GCS_RO)</div><div class='add'>+</div><div class='ctx'> #define PIE_E0	( \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY),      PIE_X_O) | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O)  | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RWX_O) | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY),      PIE_R_O)   | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED),        PIE_RW_O))</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS),           PIE_GCS)  | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS_RO),        PIE_R)   | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_EXECONLY),      PIE_X_O) | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O)  | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RWX_O) | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY),      PIE_R_O)   | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED),        PIE_RW_O))</div><div class='ctx'> </div><div class='ctx'> #define PIE_E1	( \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY),      PIE_NONE_O) | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R)      | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RW)     | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY),      PIE_R)      | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED),        PIE_RW)     | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX),    PIE_RX)     | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC),   PIE_RWX)    | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO),     PIE_R)      | \</div><div class='del'>-	PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL),        PIE_RW))</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS),           PIE_NONE_O) | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS_RO),        PIE_NONE_O) | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_EXECONLY),      PIE_NONE_O) | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R)      | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED_EXEC),   PIE_RW)     | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY),      PIE_R)      | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED),        PIE_RW)     | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_ROX),    PIE_RX)     | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_EXEC),   PIE_RWX)    | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_RO),     PIE_R)      | \</div><div class='add'>+	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL),        PIE_RW))</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PGTABLE_PROT_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable-types.h b/arch/arm64/include/asm/pgtable-types.h<br/>index 6d6d4065b0cb..265e8301d7ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable-types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable-types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/pgtable-types.h</a></div><div class='hunk'>@@ -11,11 +11,19 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-typedef u64 pteval_t;</div><div class='del'>-typedef u64 pmdval_t;</div><div class='del'>-typedef u64 pudval_t;</div><div class='del'>-typedef u64 p4dval_t;</div><div class='del'>-typedef u64 pgdval_t;</div><div class='add'>+/*</div><div class='add'>+ * Page Table Descriptor</div><div class='add'>+ *</div><div class='add'>+ * Generic page table descriptor format from which</div><div class='add'>+ * all level specific descriptors can be derived.</div><div class='add'>+ */</div><div class='add'>+typedef u64 ptdesc_t;</div><div class='add'>+</div><div class='add'>+typedef ptdesc_t pteval_t;</div><div class='add'>+typedef ptdesc_t pmdval_t;</div><div class='add'>+typedef ptdesc_t pudval_t;</div><div class='add'>+typedef ptdesc_t p4dval_t;</div><div class='add'>+typedef ptdesc_t pgdval_t;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are used to make use of C type-checking..</div><div class='hunk'>@@ -46,7 +54,7 @@ typedef struct { pgdval_t pgd; } pgd_t;</div><div class='ctx'> #define pgd_val(x)	((x).pgd)</div><div class='ctx'> #define __pgd(x)	((pgd_t) { (x) } )</div><div class='ctx'> </div><div class='del'>-typedef struct { pteval_t pgprot; } pgprot_t;</div><div class='add'>+typedef struct { ptdesc_t pgprot; } pgprot_t;</div><div class='ctx'> #define pgprot_val(x)	((x).pgprot)</div><div class='ctx'> #define __pgprot(x)	((pgprot_t) { (x) } )</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h<br/>index c329ea061dc9..aa89c2e67ebc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/pgtable.h</a></div><div class='hunk'>@@ -40,6 +40,85 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/page_table_check.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline void emit_pte_barriers(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * These barriers are emitted under certain conditions after a pte entry</div><div class='add'>+	 * was modified (see e.g. __set_pte_complete()). The dsb makes the store</div><div class='add'>+	 * visible to the table walker. The isb ensures that any previous</div><div class='add'>+	 * speculative "invalid translation" marker that is in the CPU's</div><div class='add'>+	 * pipeline gets cleared, so that any access to that address after</div><div class='add'>+	 * setting the pte to valid won't cause a spurious fault. If the thread</div><div class='add'>+	 * gets preempted after storing to the pgtable but before emitting these</div><div class='add'>+	 * barriers, __switch_to() emits a dsb which ensure the walker gets to</div><div class='add'>+	 * see the store. There is no guarantee of an isb being issued though.</div><div class='add'>+	 * This is safe because it will still get issued (albeit on a</div><div class='add'>+	 * potentially different CPU) when the thread starts running again,</div><div class='add'>+	 * before any access to the address.</div><div class='add'>+	 */</div><div class='add'>+	dsb(ishst);</div><div class='add'>+	isb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void queue_pte_barriers(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (in_interrupt()) {</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flags = read_thread_flags();</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BIT(TIF_LAZY_MMU)) {</div><div class='add'>+		/* Avoid the atomic op if already set. */</div><div class='add'>+		if (!(flags &amp; BIT(TIF_LAZY_MMU_PENDING)))</div><div class='add'>+			set_thread_flag(TIF_LAZY_MMU_PENDING);</div><div class='add'>+	} else {</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE</div><div class='add'>+static inline void arch_enter_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * lazy_mmu_mode is not supposed to permit nesting. But in practice this</div><div class='add'>+	 * does happen with CONFIG_DEBUG_PAGEALLOC, where a page allocation</div><div class='add'>+	 * inside a lazy_mmu_mode section (such as zap_pte_range()) will change</div><div class='add'>+	 * permissions on the linear map with apply_to_page_range(), which</div><div class='add'>+	 * re-enters lazy_mmu_mode. So we tolerate nesting in our</div><div class='add'>+	 * implementation. The first call to arch_leave_lazy_mmu_mode() will</div><div class='add'>+	 * flush and clear the flag such that the remainder of the work in the</div><div class='add'>+	 * outer nest behaves as if outside of lazy mmu mode. This is safe and</div><div class='add'>+	 * keeps tracking simple.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	set_thread_flag(TIF_LAZY_MMU);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_flush_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING))</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_leave_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	arch_flush_lazy_mmu_mode();</div><div class='add'>+	clear_thread_flag(TIF_LAZY_MMU);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='ctx'> #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE</div><div class='ctx'> </div><div class='hunk'>@@ -68,10 +147,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];</div><div class='ctx'> #define pte_ERROR(e)	\</div><div class='ctx'> 	pr_err("%s:%d: bad pte %016llx.\n", __FILE__, __LINE__, pte_val(e))</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Macros to convert between a physical address and its placement in a</div><div class='del'>- * page table entry, taking care of 52-bit addresses.</div><div class='del'>- */</div><div class='ctx'> #ifdef CONFIG_ARM64_PA_BITS_52</div><div class='ctx'> static inline phys_addr_t __pte_to_phys(pte_t pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -84,8 +159,15 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)</div><div class='ctx'> 	return (phys | (phys &gt;&gt; PTE_ADDR_HIGH_SHIFT)) &amp; PHYS_TO_PTE_ADDR_MASK;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-#define __pte_to_phys(pte)	(pte_val(pte) &amp; PTE_ADDR_LOW)</div><div class='del'>-#define __phys_to_pte_val(phys)	(phys)</div><div class='add'>+static inline phys_addr_t __pte_to_phys(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return pte_val(pte) &amp; PTE_ADDR_LOW;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pteval_t __phys_to_pte_val(phys_addr_t phys)</div><div class='add'>+{</div><div class='add'>+	return phys;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define pte_pfn(pte)		(__pte_to_phys(pte) &gt;&gt; PAGE_SHIFT)</div><div class='hunk'>@@ -108,7 +190,6 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys)</div><div class='ctx'> #define pte_user(pte)		(!!(pte_val(pte) &amp; PTE_USER))</div><div class='ctx'> #define pte_user_exec(pte)	(!(pte_val(pte) &amp; PTE_UXN))</div><div class='ctx'> #define pte_cont(pte)		(!!(pte_val(pte) &amp; PTE_CONT))</div><div class='del'>-#define pte_devmap(pte)		(!!(pte_val(pte) &amp; PTE_DEVMAP))</div><div class='ctx'> #define pte_tagged(pte)		((pte_val(pte) &amp; PTE_ATTRINDX_MASK) == \</div><div class='ctx'> 				 PTE_ATTRINDX(MT_NORMAL_TAGGED))</div><div class='ctx'> </div><div class='hunk'>@@ -265,8 +346,7 @@ static inline pte_t pte_mkspecial(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> static inline pte_t pte_mkcont(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	pte = set_pte_bit(pte, __pgprot(PTE_CONT));</div><div class='del'>-	return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));</div><div class='add'>+	return set_pte_bit(pte, __pgprot(PTE_CONT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pte_t pte_mknoncont(pte_t pte)</div><div class='hunk'>@@ -274,7 +354,7 @@ static inline pte_t pte_mknoncont(pte_t pte)</div><div class='ctx'> 	return clear_pte_bit(pte, __pgprot(PTE_CONT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline pte_t pte_mkpresent(pte_t pte)</div><div class='add'>+static inline pte_t pte_mkvalid(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return set_pte_bit(pte, __pgprot(PTE_VALID));</div><div class='ctx'> }</div><div class='hunk'>@@ -291,9 +371,9 @@ static inline pmd_t pmd_mkcont(pmd_t pmd)</div><div class='ctx'> 	return __pmd(pmd_val(pmd) | PMD_SECT_CONT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline pte_t pte_mkdevmap(pte_t pte)</div><div class='add'>+static inline pmd_t pmd_mknoncont(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL));</div><div class='add'>+	return __pmd(pmd_val(pmd) &amp; ~PMD_SECT_CONT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP</div><div class='hunk'>@@ -318,18 +398,20 @@ static inline void __set_pte_nosync(pte_t *ptep, pte_t pte)</div><div class='ctx'> 	WRITE_ONCE(*ptep, pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+static inline void __set_pte_complete(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	__set_pte_nosync(ptep, pte);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only if the new pte is valid and kernel, otherwise TLB maintenance</div><div class='del'>-	 * or update_mmu_cache() have the necessary barriers.</div><div class='add'>+	 * has the necessary barriers.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pte_valid_not_user(pte)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pte_valid_not_user(pte))</div><div class='add'>+		queue_pte_barriers();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	__set_pte_nosync(ptep, pte);</div><div class='add'>+	__set_pte_complete(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pte_t __ptep_get(pte_t *ptep)</div><div class='hunk'>@@ -338,7 +420,7 @@ static inline pte_t __ptep_get(pte_t *ptep)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void __sync_icache_dcache(pte_t pteval);</div><div class='del'>-bool pgattr_change_is_safe(u64 old, u64 new);</div><div class='add'>+bool pgattr_change_is_safe(pteval_t old, pteval_t new);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PTE bits configuration in the presence of hardware Dirty Bit Management</div><div class='hunk'>@@ -421,28 +503,6 @@ static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr)</div><div class='ctx'> 	return pfn_pte(pte_pfn(pte) + nr, pte_pgprot(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_ptes(struct mm_struct *mm,</div><div class='del'>-			      unsigned long __always_unused addr,</div><div class='del'>-			      pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='del'>-{</div><div class='del'>-	page_table_check_ptes_set(mm, ptep, pte, nr);</div><div class='del'>-	__sync_cache_and_tags(pte, nr);</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		__check_safe_pte_update(mm, ptep, pte);</div><div class='del'>-		__set_pte(ptep, pte);</div><div class='del'>-		if (--nr == 0)</div><div class='del'>-			break;</div><div class='del'>-		ptep++;</div><div class='del'>-		pte = pte_advance_pfn(pte, 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Huge pte definitions.</div><div class='del'>- */</div><div class='del'>-#define pte_mkhuge(pte)		(__pte(pte_val(pte) &amp; ~PTE_TABLE_BIT))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Hugetlb definitions.</div><div class='ctx'>  */</div><div class='hunk'>@@ -489,12 +549,12 @@ static inline pmd_t pte_pmd(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> static inline pgprot_t mk_pud_sect_prot(pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	return __pgprot((pgprot_val(prot) &amp; ~PUD_TABLE_BIT) | PUD_TYPE_SECT);</div><div class='add'>+	return __pgprot((pgprot_val(prot) &amp; ~PUD_TYPE_MASK) | PUD_TYPE_SECT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pgprot_t mk_pmd_sect_prot(pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	return __pgprot((pgprot_val(prot) &amp; ~PMD_TABLE_BIT) | PMD_TYPE_SECT);</div><div class='add'>+	return __pgprot((pgprot_val(prot) &amp; ~PMD_TYPE_MASK) | PMD_TYPE_SECT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pte_t pte_swp_mkexclusive(pte_t pte)</div><div class='hunk'>@@ -502,7 +562,7 @@ static inline pte_t pte_swp_mkexclusive(pte_t pte)</div><div class='ctx'> 	return set_pte_bit(pte, __pgprot(PTE_SWP_EXCLUSIVE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; PTE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -554,18 +614,6 @@ static inline int pmd_protnone(pmd_t pmd)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define pmd_present(pmd)	pte_present(pmd_pte(pmd))</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * THP definitions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='del'>-static inline int pmd_trans_huge(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return pmd_val(pmd) &amp;&amp; pmd_present(pmd) &amp;&amp; !(pmd_val(pmd) &amp; PMD_TABLE_BIT);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='del'>-</div><div class='ctx'> #define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))</div><div class='ctx'> #define pmd_young(pmd)		pte_young(pmd_pte(pmd))</div><div class='ctx'> #define pmd_valid(pmd)		pte_valid(pmd_pte(pmd))</div><div class='hunk'>@@ -591,14 +639,17 @@ static inline int pmd_trans_huge(pmd_t pmd)</div><div class='ctx'> </div><div class='ctx'> #define pmd_write(pmd)		pte_write(pmd_pte(pmd))</div><div class='ctx'> </div><div class='del'>-#define pmd_mkhuge(pmd)		(__pmd(pmd_val(pmd) &amp; ~PMD_TABLE_BIT))</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='del'>-#define pmd_devmap(pmd)		pte_devmap(pmd_pte(pmd))</div><div class='del'>-#endif</div><div class='del'>-static inline pmd_t pmd_mkdevmap(pmd_t pmd)</div><div class='add'>+static inline pmd_t pmd_mkhuge(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return pte_pmd(set_pte_bit(pmd_pte(pmd), __pgprot(PTE_DEVMAP)));</div><div class='add'>+	/*</div><div class='add'>+	 * It's possible that the pmd is present-invalid on entry</div><div class='add'>+	 * and in that case it needs to remain present-invalid on</div><div class='add'>+	 * exit. So ensure the VALID bit does not get modified.</div><div class='add'>+	 */</div><div class='add'>+	pmdval_t mask = PMD_TYPE_MASK &amp; ~PTE_VALID;</div><div class='add'>+	pmdval_t val = PMD_TYPE_SECT &amp; ~PTE_VALID;</div><div class='add'>+</div><div class='add'>+	return __pmd((pmd_val(pmd) &amp; ~mask) | val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP</div><div class='hunk'>@@ -613,24 +664,29 @@ static inline pmd_t pmd_mkspecial(pmd_t pmd)</div><div class='ctx'> #define __phys_to_pmd_val(phys)	__phys_to_pte_val(phys)</div><div class='ctx'> #define pmd_pfn(pmd)		((__pmd_to_phys(pmd) &amp; PMD_MASK) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pfn_pmd(pfn,prot)	__pmd(__phys_to_pmd_val((phys_addr_t)(pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot))</div><div class='del'>-#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)</div><div class='ctx'> </div><div class='ctx'> #define pud_young(pud)		pte_young(pud_pte(pud))</div><div class='ctx'> #define pud_mkyoung(pud)	pte_pud(pte_mkyoung(pud_pte(pud)))</div><div class='ctx'> #define pud_write(pud)		pte_write(pud_pte(pud))</div><div class='ctx'> </div><div class='del'>-#define pud_mkhuge(pud)		(__pud(pud_val(pud) &amp; ~PUD_TABLE_BIT))</div><div class='add'>+static inline pud_t pud_mkhuge(pud_t pud)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * It's possible that the pud is present-invalid on entry</div><div class='add'>+	 * and in that case it needs to remain present-invalid on</div><div class='add'>+	 * exit. So ensure the VALID bit does not get modified.</div><div class='add'>+	 */</div><div class='add'>+	pudval_t mask = PUD_TYPE_MASK &amp; ~PTE_VALID;</div><div class='add'>+	pudval_t val = PUD_TYPE_SECT &amp; ~PTE_VALID;</div><div class='add'>+</div><div class='add'>+	return __pud((pud_val(pud) &amp; ~mask) | val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define __pud_to_phys(pud)	__pte_to_phys(pud_pte(pud))</div><div class='ctx'> #define __phys_to_pud_val(phys)	__phys_to_pte_val(phys)</div><div class='ctx'> #define pud_pfn(pud)		((__pud_to_phys(pud) &amp; PUD_MASK) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pfn_pud(pfn,prot)	__pud(__phys_to_pud_val((phys_addr_t)(pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot))</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_SUPPORTS_PUD_PFNMAP</div><div class='del'>-#define pud_special(pte)	pte_special(pud_pte(pud))</div><div class='del'>-#define pud_mkspecial(pte)	pte_pud(pte_mkspecial(pud_pte(pud)))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define pmd_pgprot pmd_pgprot</div><div class='ctx'> static inline pgprot_t pmd_pgprot(pmd_t pmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -647,30 +703,64 @@ static inline pgprot_t pud_pgprot(pud_t pud)</div><div class='ctx'> 	return __pgprot(pud_val(pfn_pud(pfn, __pgprot(0))) ^ pud_val(pud));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pte_at(struct mm_struct *mm,</div><div class='del'>-				unsigned long __always_unused addr,</div><div class='del'>-				pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='add'>+static inline void __set_ptes_anysz(struct mm_struct *mm, pte_t *ptep,</div><div class='add'>+				    pte_t pte, unsigned int nr,</div><div class='add'>+				    unsigned long pgsize)</div><div class='ctx'> {</div><div class='del'>-	__sync_cache_and_tags(pte, nr);</div><div class='del'>-	__check_safe_pte_update(mm, ptep, pte);</div><div class='del'>-	__set_pte(ptep, pte);</div><div class='add'>+	unsigned long stride = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (pgsize) {</div><div class='add'>+	case PAGE_SIZE:</div><div class='add'>+		page_table_check_ptes_set(mm, ptep, pte, nr);</div><div class='add'>+		break;</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		page_table_check_pmds_set(mm, (pmd_t *)ptep, pte_pmd(pte), nr);</div><div class='add'>+		break;</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		page_table_check_puds_set(mm, (pud_t *)ptep, pte_pud(pte), nr);</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		VM_WARN_ON(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__sync_cache_and_tags(pte, nr * stride);</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		__check_safe_pte_update(mm, ptep, pte);</div><div class='add'>+		__set_pte_nosync(ptep, pte);</div><div class='add'>+		if (--nr == 0)</div><div class='add'>+			break;</div><div class='add'>+		ptep++;</div><div class='add'>+		pte = pte_advance_pfn(pte, stride);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__set_pte_complete(pte);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __set_ptes(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, nr, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pmd_t *pmdp, pmd_t pmd)</div><div class='add'>+static inline void __set_pmds(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pmd_t *pmdp, pmd_t pmd, unsigned int nr)</div><div class='ctx'> {</div><div class='del'>-	page_table_check_pmd_set(mm, pmdp, pmd);</div><div class='del'>-	return __set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd),</div><div class='del'>-						PMD_SIZE &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	__set_ptes_anysz(mm, (pte_t *)pmdp, pmd_pte(pmd), nr, PMD_SIZE);</div><div class='ctx'> }</div><div class='add'>+#define set_pmd_at(mm, addr, pmdp, pmd) __set_pmds(mm, addr, pmdp, pmd, 1)</div><div class='ctx'> </div><div class='del'>-static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pud_t *pudp, pud_t pud)</div><div class='add'>+static inline void __set_puds(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pud_t *pudp, pud_t pud, unsigned int nr)</div><div class='ctx'> {</div><div class='del'>-	page_table_check_pud_set(mm, pudp, pud);</div><div class='del'>-	return __set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud),</div><div class='del'>-						PUD_SIZE &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	__set_ptes_anysz(mm, (pte_t *)pudp, pud_pte(pud), nr, PUD_SIZE);</div><div class='ctx'> }</div><div class='add'>+#define set_pud_at(mm, addr, pudp, pud) __set_puds(mm, addr, pudp, pud, 1)</div><div class='ctx'> </div><div class='ctx'> #define __p4d_to_phys(p4d)	__pte_to_phys(p4d_pte(p4d))</div><div class='ctx'> #define __phys_to_p4d_val(phys)	__phys_to_pte_val(phys)</div><div class='hunk'>@@ -684,6 +774,11 @@ static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> #define pgprot_nx(prot) \</div><div class='ctx'> 	__pgprot_modify(prot, PTE_MAYBE_GP, PTE_PXN)</div><div class='ctx'> </div><div class='add'>+#define pgprot_decrypted(prot) \</div><div class='add'>+	__pgprot_modify(prot, PROT_NS_SHARED, PROT_NS_SHARED)</div><div class='add'>+#define pgprot_encrypted(prot) \</div><div class='add'>+	__pgprot_modify(prot, PROT_NS_SHARED, 0)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Mark the prot value as uncacheable and unbufferable.</div><div class='ctx'>  */</div><div class='hunk'>@@ -725,6 +820,17 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,</div><div class='ctx'> #define pmd_leaf_size(pmd)	(pmd_cont(pmd) ? CONT_PMD_SIZE : PMD_SIZE)</div><div class='ctx'> #define pte_leaf_size(pte)	(pte_cont(pte) ? CONT_PTE_SIZE : PAGE_SIZE)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='add'>+static inline int pmd_trans_huge(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If pmd is present-invalid, pmd_table() won't detect it</div><div class='add'>+	 * as a table, so force the valid bit for the comparison.</div><div class='add'>+	 */</div><div class='add'>+	return pmd_present(pmd) &amp;&amp; !pmd_table(__pmd(pmd_val(pmd) | PTE_VALID));</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS &lt; 3</div><div class='ctx'> static inline bool pud_sect(pud_t pud) { return false; }</div><div class='ctx'> static inline bool pud_table(pud_t pud) { return true; }</div><div class='hunk'>@@ -735,8 +841,6 @@ static inline bool pud_table(pud_t pud) { return true; }</div><div class='ctx'> 				 PUD_TYPE_TABLE)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern pgd_t init_pg_dir[];</div><div class='del'>-extern pgd_t init_pg_end[];</div><div class='ctx'> extern pgd_t swapper_pg_dir[];</div><div class='ctx'> extern pgd_t idmap_pg_dir[];</div><div class='ctx'> extern pgd_t tramp_pg_dir[];</div><div class='hunk'>@@ -761,10 +865,8 @@ static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pmdp, pmd);</div><div class='ctx'> </div><div class='del'>-	if (pmd_valid(pmd)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pmd_valid(pmd))</div><div class='add'>+		queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_clear(pmd_t *pmdp)</div><div class='hunk'>@@ -794,19 +896,14 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)</div><div class='ctx'> /* use ONLY for statically allocated translation tables */</div><div class='ctx'> #define pte_offset_kimg(dir,addr)	((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page),prot)</div><div class='del'>-</div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS &gt; 2</div><div class='ctx'> </div><div class='ctx'> #define pmd_ERROR(e)	\</div><div class='ctx'> 	pr_err("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))</div><div class='ctx'> </div><div class='ctx'> #define pud_none(pud)		(!pud_val(pud))</div><div class='del'>-#define pud_bad(pud)		(!pud_table(pud))</div><div class='add'>+#define pud_bad(pud)		((pud_val(pud) &amp; PUD_TYPE_MASK) != \</div><div class='add'>+				 PUD_TYPE_TABLE)</div><div class='ctx'> #define pud_present(pud)	pte_present(pud_pte(pud))</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> #define pud_leaf(pud)		(pud_present(pud) &amp;&amp; !pud_table(pud))</div><div class='hunk'>@@ -828,10 +925,8 @@ static inline void set_pud(pud_t *pudp, pud_t pud)</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pudp, pud);</div><div class='ctx'> </div><div class='del'>-	if (pud_valid(pud)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pud_valid(pud))</div><div class='add'>+		queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pud_clear(pud_t *pudp)</div><div class='hunk'>@@ -897,7 +992,9 @@ static inline bool mm_pud_folded(const struct mm_struct *mm)</div><div class='ctx'> 	pr_err("%s:%d: bad pud %016llx.\n", __FILE__, __LINE__, pud_val(e))</div><div class='ctx'> </div><div class='ctx'> #define p4d_none(p4d)		(pgtable_l4_enabled() &amp;&amp; !p4d_val(p4d))</div><div class='del'>-#define p4d_bad(p4d)		(pgtable_l4_enabled() &amp;&amp; !(p4d_val(p4d) &amp; 2))</div><div class='add'>+#define p4d_bad(p4d)		(pgtable_l4_enabled() &amp;&amp; \</div><div class='add'>+				((p4d_val(p4d) &amp; P4D_TYPE_MASK) != \</div><div class='add'>+				 P4D_TYPE_TABLE))</div><div class='ctx'> #define p4d_present(p4d)	(!p4d_none(p4d))</div><div class='ctx'> </div><div class='ctx'> static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)</div><div class='hunk'>@@ -908,8 +1005,7 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*p4dp, p4d);</div><div class='del'>-	dsb(ishst);</div><div class='del'>-	isb();</div><div class='add'>+	queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void p4d_clear(p4d_t *p4dp)</div><div class='hunk'>@@ -927,6 +1023,9 @@ static inline phys_addr_t p4d_page_paddr(p4d_t p4d)</div><div class='ctx'> </div><div class='ctx'> static inline pud_t *p4d_to_folded_pud(p4d_t *p4dp, unsigned long addr)</div><div class='ctx'> {</div><div class='add'>+	/* Ensure that 'p4dp' indexes a page table according to 'addr' */</div><div class='add'>+	VM_BUG_ON(((addr &gt;&gt; P4D_SHIFT) ^ ((u64)p4dp &gt;&gt; 3)) % PTRS_PER_P4D);</div><div class='add'>+</div><div class='ctx'> 	return (pud_t *)PTR_ALIGN_DOWN(p4dp, PAGE_SIZE) + pud_index(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1021,7 +1120,9 @@ static inline bool mm_p4d_folded(const struct mm_struct *mm)</div><div class='ctx'> 	pr_err("%s:%d: bad p4d %016llx.\n", __FILE__, __LINE__, p4d_val(e))</div><div class='ctx'> </div><div class='ctx'> #define pgd_none(pgd)		(pgtable_l5_enabled() &amp;&amp; !pgd_val(pgd))</div><div class='del'>-#define pgd_bad(pgd)		(pgtable_l5_enabled() &amp;&amp; !(pgd_val(pgd) &amp; 2))</div><div class='add'>+#define pgd_bad(pgd)		(pgtable_l5_enabled() &amp;&amp; \</div><div class='add'>+				((pgd_val(pgd) &amp; PGD_TYPE_MASK) != \</div><div class='add'>+				 PGD_TYPE_TABLE))</div><div class='ctx'> #define pgd_present(pgd)	(!pgd_none(pgd))</div><div class='ctx'> </div><div class='ctx'> static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)</div><div class='hunk'>@@ -1032,8 +1133,7 @@ static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pgdp, pgd);</div><div class='del'>-	dsb(ishst);</div><div class='del'>-	isb();</div><div class='add'>+	queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_clear(pgd_t *pgdp)</div><div class='hunk'>@@ -1051,6 +1151,9 @@ static inline phys_addr_t pgd_page_paddr(pgd_t pgd)</div><div class='ctx'> </div><div class='ctx'> static inline p4d_t *pgd_to_folded_p4d(pgd_t *pgdp, unsigned long addr)</div><div class='ctx'> {</div><div class='add'>+	/* Ensure that 'pgdp' indexes a page table according to 'addr' */</div><div class='add'>+	VM_BUG_ON(((addr &gt;&gt; PGDIR_SHIFT) ^ ((u64)pgdp &gt;&gt; 3)) % PTRS_PER_PGD);</div><div class='add'>+</div><div class='ctx'> 	return (p4d_t *)PTR_ALIGN_DOWN(pgdp, PAGE_SIZE) + p4d_index(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1190,16 +1293,6 @@ static inline int pmdp_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 	return __ptep_set_access_flags(vma, address, (pte_t *)pmdp,</div><div class='ctx'> 							pmd_pte(entry), dirty);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline int pud_devmap(pud_t pud)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pgd_devmap(pgd_t pgd)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PAGE_TABLE_CHECK</div><div class='hunk'>@@ -1259,26 +1352,49 @@ static inline int __ptep_clear_flush_young(struct vm_area_struct *vma,</div><div class='ctx'> 	return young;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='add'>+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)</div><div class='ctx'> #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG</div><div class='ctx'> static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,</div><div class='ctx'> 					    unsigned long address,</div><div class='ctx'> 					    pmd_t *pmdp)</div><div class='ctx'> {</div><div class='add'>+	/* Operation applies to PMD table entry only if FEAT_HAFT is enabled */</div><div class='add'>+	VM_WARN_ON(pmd_table(READ_ONCE(*pmdp)) &amp;&amp; !system_supports_haft());</div><div class='ctx'> 	return __ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='add'>+#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */</div><div class='ctx'> </div><div class='del'>-static inline pte_t __ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long address, pte_t *ptep)</div><div class='add'>+static inline pte_t __ptep_get_and_clear_anysz(struct mm_struct *mm,</div><div class='add'>+					       pte_t *ptep,</div><div class='add'>+					       unsigned long pgsize)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte = __pte(xchg_relaxed(&amp;pte_val(*ptep), 0));</div><div class='ctx'> </div><div class='del'>-	page_table_check_pte_clear(mm, pte);</div><div class='add'>+	switch (pgsize) {</div><div class='add'>+	case PAGE_SIZE:</div><div class='add'>+		page_table_check_pte_clear(mm, pte);</div><div class='add'>+		break;</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		page_table_check_pmd_clear(mm, pte_pmd(pte));</div><div class='add'>+		break;</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		page_table_check_pud_clear(mm, pte_pud(pte));</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		VM_WARN_ON(1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline pte_t __ptep_get_and_clear(struct mm_struct *mm,</div><div class='add'>+				       unsigned long address, pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	return __ptep_get_and_clear_anysz(mm, ptep, PAGE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void __clear_full_ptes(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				pte_t *ptep, unsigned int nr, int full)</div><div class='ctx'> {</div><div class='hunk'>@@ -1315,11 +1431,7 @@ static inline pte_t __get_and_clear_full_ptes(struct mm_struct *mm,</div><div class='ctx'> static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 					    unsigned long address, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='del'>-	pmd_t pmd = __pmd(xchg_relaxed(&amp;pmd_val(*pmdp), 0));</div><div class='del'>-</div><div class='del'>-	page_table_check_pmd_clear(mm, pmd);</div><div class='del'>-</div><div class='del'>-	return pmd;</div><div class='add'>+	return pte_pmd(__ptep_get_and_clear_anysz(mm, (pte_t *)pmdp, PMD_SIZE));</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='hunk'>@@ -1338,7 +1450,7 @@ static inline void ___ptep_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * __ptep_set_wrprotect - mark read-only while trasferring potential hardware</div><div class='add'>+ * __ptep_set_wrprotect - mark read-only while transferring potential hardware</div><div class='ctx'>  * dirty status (PTE_DBM &amp;&amp; !PTE_RDONLY) to the software PTE_DIRTY bit.</div><div class='ctx'>  */</div><div class='ctx'> static inline void __ptep_set_wrprotect(struct mm_struct *mm,</div><div class='hunk'>@@ -1502,12 +1614,24 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,</div><div class='ctx'>  */</div><div class='ctx'> #define arch_has_hw_pte_young		cpu_has_hw_af</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG</div><div class='add'>+#define arch_has_hw_nonleaf_pmd_young	system_supports_haft</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Experimentally, it's cheap to set the access flag in hardware and we</div><div class='ctx'>  * benefit from prefaulting mappings as 'old' to start with.</div><div class='ctx'>  */</div><div class='ctx'> #define arch_wants_old_prefaulted_pte	cpu_has_hw_af</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Request exec memory is read into pagecache in at least 64K folios. This size</div><div class='add'>+ * can be contpte-mapped when 4K base pages are in use (16 pages into 1 iTLB</div><div class='add'>+ * entry), and HPA can coalesce it (4 pages into 1 TLB entry) when 16K base</div><div class='add'>+ * pages are in use.</div><div class='add'>+ */</div><div class='add'>+#define exec_folio_order() ilog2(SZ_64K &gt;&gt; PAGE_SHIFT)</div><div class='add'>+</div><div class='ctx'> static inline bool pud_sect_supported(void)</div><div class='ctx'> {</div><div class='ctx'> 	return PAGE_SIZE == SZ_4K;</div><div class='hunk'>@@ -1524,6 +1648,16 @@ extern void ptep_modify_prot_commit(struct vm_area_struct *vma,</div><div class='ctx'> 				    unsigned long addr, pte_t *ptep,</div><div class='ctx'> 				    pte_t old_pte, pte_t new_pte);</div><div class='ctx'> </div><div class='add'>+#define modify_prot_start_ptes modify_prot_start_ptes</div><div class='add'>+extern pte_t modify_prot_start_ptes(struct vm_area_struct *vma,</div><div class='add'>+				    unsigned long addr, pte_t *ptep,</div><div class='add'>+				    unsigned int nr);</div><div class='add'>+</div><div class='add'>+#define modify_prot_commit_ptes modify_prot_commit_ptes</div><div class='add'>+extern void modify_prot_commit_ptes(struct vm_area_struct *vma, unsigned long addr,</div><div class='add'>+				    pte_t *ptep, pte_t old_pte, pte_t pte,</div><div class='add'>+				    unsigned int nr);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARM64_CONTPTE</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/include/asm/por.h b/arch/arm64/include/asm/por.h<br/>index e06e9f473675..d913d5b529e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/por.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/por.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/por.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/por.h</a></div><div class='hunk'>@@ -6,26 +6,27 @@</div><div class='ctx'> #ifndef _ASM_ARM64_POR_H</div><div class='ctx'> #define _ASM_ARM64_POR_H</div><div class='ctx'> </div><div class='del'>-#define POR_BITS_PER_PKEY		4</div><div class='del'>-#define POR_ELx_IDX(por_elx, idx)	(((por_elx) &gt;&gt; ((idx) * POR_BITS_PER_PKEY)) &amp; 0xf)</div><div class='add'>+#include &lt;asm/sysreg.h&gt;</div><div class='add'>+</div><div class='add'>+#define POR_EL0_INIT	POR_ELx_PERM_PREP(0, POE_RWX)</div><div class='ctx'> </div><div class='ctx'> static inline bool por_elx_allows_read(u64 por, u8 pkey)</div><div class='ctx'> {</div><div class='del'>-	u8 perm = POR_ELx_IDX(por, pkey);</div><div class='add'>+	u8 perm = POR_ELx_PERM_GET(pkey, por);</div><div class='ctx'> </div><div class='ctx'> 	return perm &amp; POE_R;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool por_elx_allows_write(u64 por, u8 pkey)</div><div class='ctx'> {</div><div class='del'>-	u8 perm = POR_ELx_IDX(por, pkey);</div><div class='add'>+	u8 perm = POR_ELx_PERM_GET(pkey, por);</div><div class='ctx'> </div><div class='ctx'> 	return perm &amp; POE_W;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool por_elx_allows_exec(u64 por, u8 pkey)</div><div class='ctx'> {</div><div class='del'>-	u8 perm = POR_ELx_IDX(por, pkey);</div><div class='add'>+	u8 perm = POR_ELx_PERM_GET(pkey, por);</div><div class='ctx'> </div><div class='ctx'> 	return perm &amp; POE_X;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/include/asm/preempt.h b/arch/arm64/include/asm/preempt.h<br/>index 0159b625cc7f..932ea4b62042 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/preempt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/preempt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/preempt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/preempt.h</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> #ifndef __ASM_PREEMPT_H</div><div class='ctx'> #define __ASM_PREEMPT_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='ctx'> #include &lt;linux/thread_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PREEMPT_NEED_RESCHED	BIT(32)</div><div class='hunk'>@@ -87,7 +86,6 @@ void preempt_schedule_notrace(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PREEMPT_DYNAMIC</div><div class='ctx'> </div><div class='del'>-DECLARE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='ctx'> void dynamic_preempt_schedule(void);</div><div class='ctx'> #define __preempt_schedule()		dynamic_preempt_schedule()</div><div class='ctx'> void dynamic_preempt_schedule_notrace(void);</div><div class='head'>diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h<br/>index 006946745352..d49368886309 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/probes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/probes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/probes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/probes.h</a></div><div class='hunk'>@@ -9,21 +9,18 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> </div><div class='del'>-typedef u32 probe_opcode_t;</div><div class='ctx'> typedef void (probes_handler_t) (u32 opcode, long addr, struct pt_regs *);</div><div class='ctx'> </div><div class='del'>-/* architecture specific copy of original instruction */</div><div class='ctx'> struct arch_probe_insn {</div><div class='del'>-	probe_opcode_t *insn;</div><div class='del'>-	pstate_check_t *pstate_cc;</div><div class='ctx'> 	probes_handler_t *handler;</div><div class='del'>-	/* restore address after step xol */</div><div class='del'>-	unsigned long restore;</div><div class='ctx'> };</div><div class='ctx'> #ifdef CONFIG_KPROBES</div><div class='del'>-typedef u32 kprobe_opcode_t;</div><div class='add'>+typedef __le32 kprobe_opcode_t;</div><div class='ctx'> struct arch_specific_insn {</div><div class='ctx'> 	struct arch_probe_insn api;</div><div class='add'>+	kprobe_opcode_t *xol_insn;</div><div class='add'>+	/* restore address after step xol */</div><div class='add'>+	unsigned long xol_restore;</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h<br/>index 1438424f0064..61d62bfd5a7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/processor.h</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'> #define MTE_CTRL_TCF_ASYNC		(1UL &lt;&lt; 17)</div><div class='ctx'> #define MTE_CTRL_TCF_ASYMM		(1UL &lt;&lt; 18)</div><div class='ctx'> </div><div class='add'>+#define MTE_CTRL_STORE_ONLY		(1UL &lt;&lt; 19)</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/build_bug.h&gt;</div><div class='hunk'>@@ -185,6 +187,13 @@ struct thread_struct {</div><div class='ctx'> 	u64			svcr;</div><div class='ctx'> 	u64			tpidr2_el0;</div><div class='ctx'> 	u64			por_el0;</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	unsigned int		gcs_el0_mode;</div><div class='add'>+	unsigned int		gcs_el0_locked;</div><div class='add'>+	u64			gcspr_el0;</div><div class='add'>+	u64			gcs_base;</div><div class='add'>+	u64			gcs_size;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int thread_get_vl(struct thread_struct *thread,</div><div class='hunk'>@@ -285,22 +294,44 @@ void tls_preserve_current_state(void);</div><div class='ctx'> 	.fpsimd_cpu = NR_CPUS,			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)</div><div class='add'>+static inline void start_thread_common(struct pt_regs *regs, unsigned long pc,</div><div class='add'>+				       unsigned long pstate)</div><div class='ctx'> {</div><div class='del'>-	s32 previous_syscall = regs-&gt;syscallno;</div><div class='del'>-	memset(regs, 0, sizeof(*regs));</div><div class='del'>-	regs-&gt;syscallno = previous_syscall;</div><div class='del'>-	regs-&gt;pc = pc;</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure all GPRs are zeroed, and initialize PC + PSTATE.</div><div class='add'>+	 * The SP (or compat SP) will be initialized later.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;user_regs = (struct user_pt_regs) {</div><div class='add'>+		.pc = pc,</div><div class='add'>+		.pstate = pstate,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To allow the syscalls:sys_exit_execve tracepoint we need to preserve</div><div class='add'>+	 * syscallno, but do not need orig_x0 or the original GPRs.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;orig_x0 = 0;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * An exec from a kernel thread won't have an existing PMR value.</div><div class='add'>+	 */</div><div class='ctx'> 	if (system_uses_irq_prio_masking())</div><div class='del'>-		regs-&gt;pmr_save = GIC_PRIO_IRQON;</div><div class='add'>+		regs-&gt;pmr = GIC_PRIO_IRQON;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The pt_regs::stackframe field must remain valid throughout this</div><div class='add'>+	 * function as a stacktrace can be taken at any time. Any user or</div><div class='add'>+	 * kernel task should have a valid final frame.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_ONCE(regs-&gt;stackframe.record.fp != 0);</div><div class='add'>+	WARN_ON_ONCE(regs-&gt;stackframe.record.lr != 0);</div><div class='add'>+	WARN_ON_ONCE(regs-&gt;stackframe.type != FRAME_META_TYPE_FINAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void start_thread(struct pt_regs *regs, unsigned long pc,</div><div class='ctx'> 				unsigned long sp)</div><div class='ctx'> {</div><div class='del'>-	start_thread_common(regs, pc);</div><div class='del'>-	regs-&gt;pstate = PSR_MODE_EL0t;</div><div class='add'>+	start_thread_common(regs, pc, PSR_MODE_EL0t);</div><div class='ctx'> 	spectre_v4_enable_task_mitigation(current);</div><div class='ctx'> 	regs-&gt;sp = sp;</div><div class='ctx'> }</div><div class='hunk'>@@ -309,15 +340,13 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc,</div><div class='ctx'> static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,</div><div class='ctx'> 				       unsigned long sp)</div><div class='ctx'> {</div><div class='del'>-	start_thread_common(regs, pc);</div><div class='del'>-	regs-&gt;pstate = PSR_AA32_MODE_USR;</div><div class='add'>+	unsigned long pstate = PSR_AA32_MODE_USR;</div><div class='ctx'> 	if (pc &amp; 1)</div><div class='del'>-		regs-&gt;pstate |= PSR_AA32_T_BIT;</div><div class='del'>-</div><div class='del'>-#ifdef __AARCH64EB__</div><div class='del'>-	regs-&gt;pstate |= PSR_AA32_E_BIT;</div><div class='del'>-#endif</div><div class='add'>+		pstate |= PSR_AA32_T_BIT;</div><div class='add'>+	if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))</div><div class='add'>+		pstate |= PSR_AA32_E_BIT;</div><div class='ctx'> </div><div class='add'>+	start_thread_common(regs, pc, pstate);</div><div class='ctx'> 	spectre_v4_enable_task_mitigation(current);</div><div class='ctx'> 	regs-&gt;compat_sp = sp;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/include/asm/ptdump.h b/arch/arm64/include/asm/ptdump.h<br/>index 6cf4aae05219..baff24004459 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ptdump.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ptdump.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ptdump.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/ptdump.h</a></div><div class='hunk'>@@ -7,7 +7,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ptdump.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PTDUMP_CORE</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(arm64_ptdump_lock_key);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PTDUMP</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm_types.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='hunk'>@@ -24,8 +26,8 @@ struct ptdump_info {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ptdump_prot_bits {</div><div class='del'>-	u64		mask;</div><div class='del'>-	u64		val;</div><div class='add'>+	ptdesc_t	mask;</div><div class='add'>+	ptdesc_t	val;</div><div class='ctx'> 	const char	*set;</div><div class='ctx'> 	const char	*clear;</div><div class='ctx'> };</div><div class='hunk'>@@ -34,7 +36,7 @@ struct ptdump_pg_level {</div><div class='ctx'> 	const struct ptdump_prot_bits *bits;</div><div class='ctx'> 	char name[4];</div><div class='ctx'> 	int num;</div><div class='del'>-	u64 mask;</div><div class='add'>+	ptdesc_t mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -51,7 +53,7 @@ struct ptdump_pg_state {</div><div class='ctx'> 	const struct mm_struct *mm;</div><div class='ctx'> 	unsigned long start_address;</div><div class='ctx'> 	int level;</div><div class='del'>-	u64 current_prot;</div><div class='add'>+	ptdesc_t current_prot;</div><div class='ctx'> 	bool check_wx;</div><div class='ctx'> 	unsigned long wx_pages;</div><div class='ctx'> 	unsigned long uxn_pages;</div><div class='hunk'>@@ -59,7 +61,13 @@ struct ptdump_pg_state {</div><div class='ctx'> </div><div class='ctx'> void ptdump_walk(struct seq_file *s, struct ptdump_info *info);</div><div class='ctx'> void note_page(struct ptdump_state *pt_st, unsigned long addr, int level,</div><div class='del'>-	       u64 val);</div><div class='add'>+	       pteval_t val);</div><div class='add'>+void note_page_pte(struct ptdump_state *st, unsigned long addr, pte_t pte);</div><div class='add'>+void note_page_pmd(struct ptdump_state *st, unsigned long addr, pmd_t pmd);</div><div class='add'>+void note_page_pud(struct ptdump_state *st, unsigned long addr, pud_t pud);</div><div class='add'>+void note_page_p4d(struct ptdump_state *st, unsigned long addr, p4d_t p4d);</div><div class='add'>+void note_page_pgd(struct ptdump_state *st, unsigned long addr, pgd_t pgd);</div><div class='add'>+void note_page_flush(struct ptdump_state *st);</div><div class='ctx'> #ifdef CONFIG_PTDUMP_DEBUGFS</div><div class='ctx'> #define EFI_RUNTIME_MAP_END	DEFAULT_MAP_WINDOW_64</div><div class='ctx'> void __init ptdump_debugfs_register(struct ptdump_info *info, const char *name);</div><div class='hunk'>@@ -69,7 +77,13 @@ static inline void ptdump_debugfs_register(struct ptdump_info *info,</div><div class='ctx'> #endif /* CONFIG_PTDUMP_DEBUGFS */</div><div class='ctx'> #else</div><div class='ctx'> static inline void note_page(struct ptdump_state *pt_st, unsigned long addr,</div><div class='del'>-			     int level, u64 val) { }</div><div class='del'>-#endif /* CONFIG_PTDUMP_CORE */</div><div class='add'>+			     int level, pteval_t val) { }</div><div class='add'>+static inline void note_page_pte(struct ptdump_state *st, unsigned long addr, pte_t pte) { }</div><div class='add'>+static inline void note_page_pmd(struct ptdump_state *st, unsigned long addr, pmd_t pmd) { }</div><div class='add'>+static inline void note_page_pud(struct ptdump_state *st, unsigned long addr, pud_t pud) { }</div><div class='add'>+static inline void note_page_p4d(struct ptdump_state *st, unsigned long addr, p4d_t p4d) { }</div><div class='add'>+static inline void note_page_pgd(struct ptdump_state *st, unsigned long addr, pgd_t pgd) { }</div><div class='add'>+static inline void note_page_flush(struct ptdump_state *st) { }</div><div class='add'>+#endif /* CONFIG_PTDUMP */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PTDUMP_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h<br/>index 0abe975d68a8..65b053a24d82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/ptrace.h</a></div><div class='hunk'>@@ -98,6 +98,8 @@</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/stacktrace/frame.h&gt;</div><div class='add'>+</div><div class='ctx'> /* sizeof(struct user) for AArch32 */</div><div class='ctx'> #define COMPAT_USER_SZ	296</div><div class='ctx'> </div><div class='hunk'>@@ -149,8 +151,7 @@ static inline unsigned long pstate_to_compat_psr(const unsigned long pstate)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This struct defines the way the registers are stored on the stack during an</div><div class='del'>- * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for</div><div class='del'>- * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs.</div><div class='add'>+ * exception. struct user_pt_regs must form a prefix of struct pt_regs.</div><div class='ctx'>  */</div><div class='ctx'> struct pt_regs {</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -163,23 +164,16 @@ struct pt_regs {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> 	u64 orig_x0;</div><div class='del'>-#ifdef __AARCH64EB__</div><div class='del'>-	u32 unused2;</div><div class='del'>-	s32 syscallno;</div><div class='del'>-#else</div><div class='ctx'> 	s32 syscallno;</div><div class='del'>-	u32 unused2;</div><div class='del'>-#endif</div><div class='del'>-	u64 sdei_ttbr1;</div><div class='del'>-	/* Only valid when ARM64_HAS_GIC_PRIO_MASKING is enabled. */</div><div class='del'>-	u64 pmr_save;</div><div class='del'>-	u64 stackframe[2];</div><div class='add'>+	u32 pmr;</div><div class='ctx'> </div><div class='del'>-	/* Only valid for some EL1 exceptions. */</div><div class='del'>-	u64 lockdep_hardirqs;</div><div class='del'>-	u64 exit_rcu;</div><div class='add'>+	u64 sdei_ttbr1;</div><div class='add'>+	struct frame_record_meta stackframe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* For correct stack alignment, pt_regs has to be a multiple of 16 bytes. */</div><div class='add'>+static_assert(IS_ALIGNED(sizeof(struct pt_regs), 16));</div><div class='add'>+</div><div class='ctx'> static inline bool in_syscall(struct pt_regs const *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return regs-&gt;syscallno != NO_SYSCALL;</div><div class='hunk'>@@ -213,14 +207,15 @@ static inline void forget_syscall(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> #define irqs_priority_unmasked(regs)					\</div><div class='ctx'> 	(system_uses_irq_prio_masking() ?				\</div><div class='del'>-		(regs)-&gt;pmr_save == GIC_PRIO_IRQON :			\</div><div class='add'>+		(regs)-&gt;pmr == GIC_PRIO_IRQON :				\</div><div class='ctx'> 		true)</div><div class='ctx'> </div><div class='del'>-#define interrupts_enabled(regs)			\</div><div class='del'>-	(!((regs)-&gt;pstate &amp; PSR_I_BIT) &amp;&amp; irqs_priority_unmasked(regs))</div><div class='add'>+static __always_inline bool regs_irqs_disabled(const struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return (regs-&gt;pstate &amp; PSR_I_BIT) || !irqs_priority_unmasked(regs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define fast_interrupts_enabled(regs) \</div><div class='del'>-	(!((regs)-&gt;pstate &amp; PSR_F_BIT))</div><div class='add'>+#define interrupts_enabled(regs)	(!regs_irqs_disabled(regs))</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long user_stack_pointer(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/include/asm/rqspinlock.h b/arch/arm64/include/asm/rqspinlock.h<br/>new file mode 100644<br/>index 000000000000..9ea0a74e5892<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rqspinlock.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/rqspinlock.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_RQSPINLOCK_H</div><div class='add'>+#define _ASM_RQSPINLOCK_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Hardcode res_smp_cond_load_acquire implementations for arm64 to a custom</div><div class='add'>+ * version based on [0]. In rqspinlock code, our conditional expression involves</div><div class='add'>+ * checking the value _and_ additionally a timeout. However, on arm64, the</div><div class='add'>+ * WFE-based implementation may never spin again if no stores occur to the</div><div class='add'>+ * locked byte in the lock word. As such, we may be stuck forever if</div><div class='add'>+ * event-stream based unblocking is not available on the platform for WFE spin</div><div class='add'>+ * loops (arch_timer_evtstrm_available).</div><div class='add'>+ *</div><div class='add'>+ * Once support for smp_cond_load_acquire_timewait [0] lands, we can drop this</div><div class='add'>+ * copy-paste.</div><div class='add'>+ *</div><div class='add'>+ * While we rely on the implementation to amortize the cost of sampling</div><div class='add'>+ * cond_expr for us, it will not happen when event stream support is</div><div class='add'>+ * unavailable, time_expr check is amortized. This is not the common case, and</div><div class='add'>+ * it would be difficult to fit our logic in the time_expr_ns &gt;= time_limit_ns</div><div class='add'>+ * comparison, hence just let it be. In case of event-stream, the loop is woken</div><div class='add'>+ * up at microsecond granularity.</div><div class='add'>+ *</div><div class='add'>+ * [0]: https://lore.kernel.org/lkml/20250203214911.898276-1-ankur.a.arora@oracle.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef smp_cond_load_acquire_timewait</div><div class='add'>+</div><div class='add'>+#define smp_cond_time_check_count	200</div><div class='add'>+</div><div class='add'>+#define __smp_cond_load_relaxed_spinwait(ptr, cond_expr, time_expr_ns,	\</div><div class='add'>+					 time_limit_ns) ({		\</div><div class='add'>+	typeof(ptr) __PTR = (ptr);					\</div><div class='add'>+	__unqual_scalar_typeof(*ptr) VAL;				\</div><div class='add'>+	unsigned int __count = 0;					\</div><div class='add'>+	for (;;) {							\</div><div class='add'>+		VAL = READ_ONCE(*__PTR);				\</div><div class='add'>+		if (cond_expr)						\</div><div class='add'>+			break;						\</div><div class='add'>+		cpu_relax();						\</div><div class='add'>+		if (__count++ &lt; smp_cond_time_check_count)		\</div><div class='add'>+			continue;					\</div><div class='add'>+		if ((time_expr_ns) &gt;= (time_limit_ns))			\</div><div class='add'>+			break;						\</div><div class='add'>+		__count = 0;						\</div><div class='add'>+	}								\</div><div class='add'>+	(typeof(*ptr))VAL;						\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define __smp_cond_load_acquire_timewait(ptr, cond_expr,		\</div><div class='add'>+					 time_expr_ns, time_limit_ns)	\</div><div class='add'>+({									\</div><div class='add'>+	typeof(ptr) __PTR = (ptr);					\</div><div class='add'>+	__unqual_scalar_typeof(*ptr) VAL;				\</div><div class='add'>+	for (;;) {							\</div><div class='add'>+		VAL = smp_load_acquire(__PTR);				\</div><div class='add'>+		if (cond_expr)						\</div><div class='add'>+			break;						\</div><div class='add'>+		__cmpwait_relaxed(__PTR, VAL);				\</div><div class='add'>+		if ((time_expr_ns) &gt;= (time_limit_ns))			\</div><div class='add'>+			break;						\</div><div class='add'>+	}								\</div><div class='add'>+	(typeof(*ptr))VAL;						\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define smp_cond_load_acquire_timewait(ptr, cond_expr,			\</div><div class='add'>+				      time_expr_ns, time_limit_ns)	\</div><div class='add'>+({									\</div><div class='add'>+	__unqual_scalar_typeof(*ptr) _val;				\</div><div class='add'>+	int __wfe = arch_timer_evtstrm_available();			\</div><div class='add'>+									\</div><div class='add'>+	if (likely(__wfe)) {						\</div><div class='add'>+		_val = __smp_cond_load_acquire_timewait(ptr, cond_expr,	\</div><div class='add'>+							time_expr_ns,	\</div><div class='add'>+							time_limit_ns);	\</div><div class='add'>+	} else {							\</div><div class='add'>+		_val = __smp_cond_load_relaxed_spinwait(ptr, cond_expr,	\</div><div class='add'>+							time_expr_ns,	\</div><div class='add'>+							time_limit_ns);	\</div><div class='add'>+		smp_acquire__after_ctrl_dep();				\</div><div class='add'>+	}								\</div><div class='add'>+	(typeof(*ptr))_val;						\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define res_smp_cond_load_acquire(v, c) smp_cond_load_acquire_timewait(v, c, 0, 1)</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/rqspinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_RQSPINLOCK_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/rsi.h b/arch/arm64/include/asm/rsi.h<br/>new file mode 100644<br/>index 000000000000..88b50d660e85<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rsi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/rsi.h</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 ARM Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_RSI_H_</div><div class='add'>+#define __ASM_RSI_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;asm/rsi_cmds.h&gt;</div><div class='add'>+</div><div class='add'>+#define RSI_PDEV_NAME "arm-cca-dev"</div><div class='add'>+</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(rsi_present);</div><div class='add'>+</div><div class='add'>+void __init arm64_rsi_init(void);</div><div class='add'>+</div><div class='add'>+bool arm64_rsi_is_protected(phys_addr_t base, size_t size);</div><div class='add'>+</div><div class='add'>+static inline bool is_realm_world(void)</div><div class='add'>+{</div><div class='add'>+	return static_branch_unlikely(&amp;rsi_present);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rsi_set_memory_range(phys_addr_t start, phys_addr_t end,</div><div class='add'>+				       enum ripas state, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	unsigned long ret;</div><div class='add'>+	phys_addr_t top;</div><div class='add'>+</div><div class='add'>+	while (start != end) {</div><div class='add'>+		ret = rsi_set_addr_range_state(start, end, state, flags, &amp;top);</div><div class='add'>+		if (ret || top &lt; start || top &gt; end)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		start = top;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Convert the specified range to RAM. Do not use this if you rely on the</div><div class='add'>+ * contents of a page that may already be in RAM state.</div><div class='add'>+ */</div><div class='add'>+static inline int rsi_set_memory_range_protected(phys_addr_t start,</div><div class='add'>+						 phys_addr_t end)</div><div class='add'>+{</div><div class='add'>+	return rsi_set_memory_range(start, end, RSI_RIPAS_RAM,</div><div class='add'>+				    RSI_CHANGE_DESTROYED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Convert the specified range to RAM. Do not convert any pages that may have</div><div class='add'>+ * been DESTROYED, without our permission.</div><div class='add'>+ */</div><div class='add'>+static inline int rsi_set_memory_range_protected_safe(phys_addr_t start,</div><div class='add'>+						      phys_addr_t end)</div><div class='add'>+{</div><div class='add'>+	return rsi_set_memory_range(start, end, RSI_RIPAS_RAM,</div><div class='add'>+				    RSI_NO_CHANGE_DESTROYED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rsi_set_memory_range_shared(phys_addr_t start,</div><div class='add'>+					      phys_addr_t end)</div><div class='add'>+{</div><div class='add'>+	return rsi_set_memory_range(start, end, RSI_RIPAS_EMPTY,</div><div class='add'>+				    RSI_CHANGE_DESTROYED);</div><div class='add'>+}</div><div class='add'>+#endif /* __ASM_RSI_H_ */</div><div class='head'>diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi_cmds.h<br/>new file mode 100644<br/>index 000000000000..2c8763876dfb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rsi_cmds.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/rsi_cmds.h</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 ARM Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_RSI_CMDS_H</div><div class='add'>+#define __ASM_RSI_CMDS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/arm-smccc.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;asm/memory.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/rsi_smc.h&gt;</div><div class='add'>+</div><div class='add'>+#define RSI_GRANULE_SHIFT		12</div><div class='add'>+#define RSI_GRANULE_SIZE		(_AC(1, UL) &lt;&lt; RSI_GRANULE_SHIFT)</div><div class='add'>+</div><div class='add'>+enum ripas {</div><div class='add'>+	RSI_RIPAS_EMPTY = 0,</div><div class='add'>+	RSI_RIPAS_RAM = 1,</div><div class='add'>+	RSI_RIPAS_DESTROYED = 2,</div><div class='add'>+	RSI_RIPAS_DEV = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned long rsi_request_version(unsigned long req,</div><div class='add'>+						unsigned long *out_lower,</div><div class='add'>+						unsigned long *out_higher)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res res;</div><div class='add'>+</div><div class='add'>+	arm_smccc_smc(SMC_RSI_ABI_VERSION, req, 0, 0, 0, 0, 0, 0, &amp;res);</div><div class='add'>+</div><div class='add'>+	if (out_lower)</div><div class='add'>+		*out_lower = res.a1;</div><div class='add'>+	if (out_higher)</div><div class='add'>+		*out_higher = res.a2;</div><div class='add'>+</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long rsi_get_realm_config(struct realm_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res res;</div><div class='add'>+</div><div class='add'>+	arm_smccc_smc(SMC_RSI_REALM_CONFIG, virt_to_phys(cfg),</div><div class='add'>+		      0, 0, 0, 0, 0, 0, &amp;res);</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long rsi_ipa_state_get(phys_addr_t start,</div><div class='add'>+					      phys_addr_t end,</div><div class='add'>+					      enum ripas *state,</div><div class='add'>+					      phys_addr_t *top)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res res;</div><div class='add'>+</div><div class='add'>+	arm_smccc_smc(SMC_RSI_IPA_STATE_GET,</div><div class='add'>+		      start, end, 0, 0, 0, 0, 0,</div><div class='add'>+		      &amp;res);</div><div class='add'>+</div><div class='add'>+	if (res.a0 == RSI_SUCCESS) {</div><div class='add'>+		if (top)</div><div class='add'>+			*top = res.a1;</div><div class='add'>+		if (state)</div><div class='add'>+			*state = res.a2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long rsi_set_addr_range_state(phys_addr_t start,</div><div class='add'>+					    phys_addr_t end,</div><div class='add'>+					    enum ripas state,</div><div class='add'>+					    unsigned long flags,</div><div class='add'>+					    phys_addr_t *top)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res res;</div><div class='add'>+</div><div class='add'>+	arm_smccc_smc(SMC_RSI_IPA_STATE_SET, start, end, state,</div><div class='add'>+		      flags, 0, 0, 0, &amp;res);</div><div class='add'>+</div><div class='add'>+	if (top)</div><div class='add'>+		*top = res.a1;</div><div class='add'>+</div><div class='add'>+	if (res.a2 != RSI_ACCEPT)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rsi_attestation_token_init - Initialise the operation to retrieve an</div><div class='add'>+ * attestation token.</div><div class='add'>+ *</div><div class='add'>+ * @challenge:	The challenge data to be used in the attestation token</div><div class='add'>+ *		generation.</div><div class='add'>+ * @size:	Size of the challenge data in bytes.</div><div class='add'>+ *</div><div class='add'>+ * Initialises the attestation token generation and returns an upper bound</div><div class='add'>+ * on the attestation token size that can be used to allocate an adequate</div><div class='add'>+ * buffer. The caller is expected to subsequently call</div><div class='add'>+ * rsi_attestation_token_continue() to retrieve the attestation token data on</div><div class='add'>+ * the same CPU.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *  On success, returns the upper limit of the attestation report size.</div><div class='add'>+ *  Otherwise, -EINVAL</div><div class='add'>+ */</div><div class='add'>+static inline long</div><div class='add'>+rsi_attestation_token_init(const u8 *challenge, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_1_2_regs regs = { 0 };</div><div class='add'>+</div><div class='add'>+	/* The challenge must be at least 32bytes and at most 64bytes */</div><div class='add'>+	if (!challenge || size &lt; 32 || size &gt; 64)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	regs.a0 = SMC_RSI_ATTESTATION_TOKEN_INIT;</div><div class='add'>+	memcpy(&amp;regs.a1, challenge, size);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;regs, &amp;regs);</div><div class='add'>+</div><div class='add'>+	if (regs.a0 == RSI_SUCCESS)</div><div class='add'>+		return regs.a1;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rsi_attestation_token_continue - Continue the operation to retrieve an</div><div class='add'>+ * attestation token.</div><div class='add'>+ *</div><div class='add'>+ * @granule: {I}PA of the Granule to which the token will be written.</div><div class='add'>+ * @offset:  Offset within Granule to start of buffer in bytes.</div><div class='add'>+ * @size:    The size of the buffer.</div><div class='add'>+ * @len:     The number of bytes written to the buffer.</div><div class='add'>+ *</div><div class='add'>+ * Retrieves up to a RSI_GRANULE_SIZE worth of token data per call. The caller</div><div class='add'>+ * is expected to call rsi_attestation_token_init() before calling this</div><div class='add'>+ * function to retrieve the attestation token.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %RSI_SUCCESS     - Attestation token retrieved successfully.</div><div class='add'>+ * * %RSI_INCOMPLETE  - Token generation is not complete.</div><div class='add'>+ * * %RSI_ERROR_INPUT - A parameter was not valid.</div><div class='add'>+ * * %RSI_ERROR_STATE - Attestation not in progress.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long rsi_attestation_token_continue(phys_addr_t granule,</div><div class='add'>+							   unsigned long offset,</div><div class='add'>+							   unsigned long size,</div><div class='add'>+							   unsigned long *len)</div><div class='add'>+{</div><div class='add'>+	struct arm_smccc_res res;</div><div class='add'>+</div><div class='add'>+	arm_smccc_1_1_invoke(SMC_RSI_ATTESTATION_TOKEN_CONTINUE,</div><div class='add'>+			     granule, offset, size, 0, &amp;res);</div><div class='add'>+</div><div class='add'>+	if (len)</div><div class='add'>+		*len = res.a1;</div><div class='add'>+	return res.a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_RSI_CMDS_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/rsi_smc.h b/arch/arm64/include/asm/rsi_smc.h<br/>new file mode 100644<br/>index 000000000000..6cb070eca9e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rsi_smc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/rsi_smc.h</a></div><div class='hunk'>@@ -0,0 +1,193 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 ARM Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_RSI_SMC_H_</div><div class='add'>+#define __ASM_RSI_SMC_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/arm-smccc.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file describes the Realm Services Interface (RSI) Application Binary</div><div class='add'>+ * Interface (ABI) for SMC calls made from within the Realm to the RMM and</div><div class='add'>+ * serviced by the RMM.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The major version number of the RSI implementation.  This is increased when</div><div class='add'>+ * the binary format or semantics of the SMC calls change.</div><div class='add'>+ */</div><div class='add'>+#define RSI_ABI_VERSION_MAJOR		UL(1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The minor version number of the RSI implementation.  This is increased when</div><div class='add'>+ * a bug is fixed, or a feature is added without breaking binary compatibility.</div><div class='add'>+ */</div><div class='add'>+#define RSI_ABI_VERSION_MINOR		UL(0)</div><div class='add'>+</div><div class='add'>+#define RSI_ABI_VERSION			((RSI_ABI_VERSION_MAJOR &lt;&lt; 16) | \</div><div class='add'>+					 RSI_ABI_VERSION_MINOR)</div><div class='add'>+</div><div class='add'>+#define RSI_ABI_VERSION_GET_MAJOR(_version) ((_version) &gt;&gt; 16)</div><div class='add'>+#define RSI_ABI_VERSION_GET_MINOR(_version) ((_version) &amp; 0xFFFF)</div><div class='add'>+</div><div class='add'>+#define RSI_SUCCESS		UL(0)</div><div class='add'>+#define RSI_ERROR_INPUT		UL(1)</div><div class='add'>+#define RSI_ERROR_STATE		UL(2)</div><div class='add'>+#define RSI_INCOMPLETE		UL(3)</div><div class='add'>+#define RSI_ERROR_UNKNOWN	UL(4)</div><div class='add'>+</div><div class='add'>+#define SMC_RSI_FID(n)		ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,      \</div><div class='add'>+						   ARM_SMCCC_SMC_64,         \</div><div class='add'>+						   ARM_SMCCC_OWNER_STANDARD, \</div><div class='add'>+						   n)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Returns RSI version.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Requested interface revision</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Lower implemented interface revision</div><div class='add'>+ * ret2 == Higher implemented interface revision</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_ABI_VERSION	SMC_RSI_FID(0x190)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read feature register.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Feature register index</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Feature register value</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_FEATURES			SMC_RSI_FID(0x191)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read measurement for the current Realm.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Index, which measurements slot to read</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Measurement value, bytes:  0 -  7</div><div class='add'>+ * ret2 == Measurement value, bytes:  8 - 15</div><div class='add'>+ * ret3 == Measurement value, bytes: 16 - 23</div><div class='add'>+ * ret4 == Measurement value, bytes: 24 - 31</div><div class='add'>+ * ret5 == Measurement value, bytes: 32 - 39</div><div class='add'>+ * ret6 == Measurement value, bytes: 40 - 47</div><div class='add'>+ * ret7 == Measurement value, bytes: 48 - 55</div><div class='add'>+ * ret8 == Measurement value, bytes: 56 - 63</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_MEASUREMENT_READ		SMC_RSI_FID(0x192)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Extend Realm Extensible Measurement (REM) value.</div><div class='add'>+ *</div><div class='add'>+ * arg1  == Index, which measurements slot to extend</div><div class='add'>+ * arg2  == Size of realm measurement in bytes, max 64 bytes</div><div class='add'>+ * arg3  == Measurement value, bytes:  0 -  7</div><div class='add'>+ * arg4  == Measurement value, bytes:  8 - 15</div><div class='add'>+ * arg5  == Measurement value, bytes: 16 - 23</div><div class='add'>+ * arg6  == Measurement value, bytes: 24 - 31</div><div class='add'>+ * arg7  == Measurement value, bytes: 32 - 39</div><div class='add'>+ * arg8  == Measurement value, bytes: 40 - 47</div><div class='add'>+ * arg9  == Measurement value, bytes: 48 - 55</div><div class='add'>+ * arg10 == Measurement value, bytes: 56 - 63</div><div class='add'>+ * ret0  == Status / error</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_MEASUREMENT_EXTEND		SMC_RSI_FID(0x193)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the operation to retrieve an attestation token.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Challenge value, bytes:  0 -  7</div><div class='add'>+ * arg2 == Challenge value, bytes:  8 - 15</div><div class='add'>+ * arg3 == Challenge value, bytes: 16 - 23</div><div class='add'>+ * arg4 == Challenge value, bytes: 24 - 31</div><div class='add'>+ * arg5 == Challenge value, bytes: 32 - 39</div><div class='add'>+ * arg6 == Challenge value, bytes: 40 - 47</div><div class='add'>+ * arg7 == Challenge value, bytes: 48 - 55</div><div class='add'>+ * arg8 == Challenge value, bytes: 56 - 63</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Upper bound of token size in bytes</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_ATTESTATION_TOKEN_INIT		SMC_RSI_FID(0x194)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Continue the operation to retrieve an attestation token.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == The IPA of token buffer</div><div class='add'>+ * arg2 == Offset within the granule of the token buffer</div><div class='add'>+ * arg3 == Size of the granule buffer</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Length of token bytes copied to the granule buffer</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_ATTESTATION_TOKEN_CONTINUE	SMC_RSI_FID(0x195)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+struct realm_config {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			unsigned long ipa_bits; /* Width of IPA in bits */</div><div class='add'>+			unsigned long hash_algo; /* Hash algorithm */</div><div class='add'>+		};</div><div class='add'>+		u8 pad[0x200];</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		u8 rpv[64]; /* Realm Personalization Value */</div><div class='add'>+		u8 pad2[0xe00];</div><div class='add'>+	};</div><div class='add'>+	/*</div><div class='add'>+	 * The RMM requires the configuration structure to be aligned to a 4k</div><div class='add'>+	 * boundary, ensure this happens by aligning this structure.</div><div class='add'>+	 */</div><div class='add'>+} __aligned(0x1000);</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read configuration for the current Realm.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == struct realm_config addr</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_REALM_CONFIG			SMC_RSI_FID(0x196)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Request RIPAS of a target IPA range to be changed to a specified value.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Base IPA address of target region</div><div class='add'>+ * arg2 == Top of the region</div><div class='add'>+ * arg3 == RIPAS value</div><div class='add'>+ * arg4 == flags</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Top of modified IPA range</div><div class='add'>+ * ret2 == Whether the Host accepted or rejected the request</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_IPA_STATE_SET			SMC_RSI_FID(0x197)</div><div class='add'>+</div><div class='add'>+#define RSI_NO_CHANGE_DESTROYED			UL(0)</div><div class='add'>+#define RSI_CHANGE_DESTROYED			UL(1)</div><div class='add'>+</div><div class='add'>+#define RSI_ACCEPT				UL(0)</div><div class='add'>+#define RSI_REJECT				UL(1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get RIPAS of a target IPA range.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == Base IPA of target region</div><div class='add'>+ * arg2 == End of target IPA region</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ * ret1 == Top of IPA region which has the reported RIPAS value</div><div class='add'>+ * ret2 == RIPAS value</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_IPA_STATE_GET			SMC_RSI_FID(0x198)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Make a Host call.</div><div class='add'>+ *</div><div class='add'>+ * arg1 == IPA of host call structure</div><div class='add'>+ * ret0 == Status / error</div><div class='add'>+ */</div><div class='add'>+#define SMC_RSI_HOST_CALL			SMC_RSI_FID(0x199)</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_RSI_SMC_H_ */</div><div class='head'>diff --git a/arch/arm64/include/asm/rwonce.h b/arch/arm64/include/asm/rwonce.h<br/>index 56f7b1d4d54b..97d9256d33c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rwonce.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/rwonce.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/rwonce.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/rwonce.h</a></div><div class='hunk'>@@ -12,16 +12,12 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef BUILD_VDSO</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_AS_HAS_LDAPR</div><div class='ctx'> #define __LOAD_RCPC(sfx, regs...)					\</div><div class='ctx'> 	ALTERNATIVE(							\</div><div class='ctx'> 		"ldar"	#sfx "\t" #regs,				\</div><div class='ctx'> 		".arch_extension rcpc\n"				\</div><div class='ctx'> 		"ldapr"	#sfx "\t" #regs,				\</div><div class='ctx'> 	ARM64_HAS_LDAPR)</div><div class='del'>-#else</div><div class='del'>-#define __LOAD_RCPC(sfx, regs...)	"ldar" #sfx "\t" #regs</div><div class='del'>-#endif /* CONFIG_AS_HAS_LDAPR */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * When building with LTO, there is an increased risk of the compiler</div><div class='head'>diff --git a/arch/arm64/include/asm/scs.h b/arch/arm64/include/asm/scs.h<br/>index 2e010ea76be2..a76f9b387a26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/scs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/scs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/scs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/scs.h</a></div><div class='hunk'>@@ -46,8 +46,14 @@ static inline void dynamic_scs_init(void)</div><div class='ctx'> static inline void dynamic_scs_init(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	EDYNSCS_INVALID_CIE_HEADER		= 1,</div><div class='add'>+	EDYNSCS_INVALID_CIE_SDATA_SIZE		= 2,</div><div class='add'>+	EDYNSCS_INVALID_FDE_AUGM_DATA_SIZE	= 3,</div><div class='add'>+	EDYNSCS_INVALID_CFA_OPCODE		= 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int __pi_scs_patch(const u8 eh_frame[], int size);</div><div class='del'>-asmlinkage void __pi_scs_patch_vmlinux(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY __ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/seccomp.h b/arch/arm64/include/asm/seccomp.h<br/>index b83975555314..bf6bf40bc5ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/seccomp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/seccomp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/seccomp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/seccomp.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #define SECCOMP_ARCH_NATIVE_NR		NR_syscalls</div><div class='ctx'> #define SECCOMP_ARCH_NATIVE_NAME	"aarch64"</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='del'>-#include &lt;asm/unistd_compat_32.h&gt;</div><div class='ctx'> # define SECCOMP_ARCH_COMPAT		AUDIT_ARCH_ARM</div><div class='ctx'> # define SECCOMP_ARCH_COMPAT_NR		__NR_compat32_syscalls</div><div class='ctx'> # define SECCOMP_ARCH_COMPAT_NAME	"arm"</div><div class='head'>diff --git a/arch/arm64/include/asm/sections.h b/arch/arm64/include/asm/sections.h<br/>index 40971ac1303f..51b0d594239e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sections.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sections.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sections.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/sections.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@ extern char __alt_instructions[], __alt_instructions_end[];</div><div class='ctx'> extern char __hibernate_exit_text_start[], __hibernate_exit_text_end[];</div><div class='ctx'> extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];</div><div class='ctx'> extern char __hyp_text_start[], __hyp_text_end[];</div><div class='add'>+extern char __hyp_data_start[], __hyp_data_end[];</div><div class='ctx'> extern char __hyp_rodata_start[], __hyp_rodata_end[];</div><div class='ctx'> extern char __hyp_reloc_begin[], __hyp_reloc_end[];</div><div class='ctx'> extern char __hyp_bss_start[], __hyp_bss_end[];</div><div class='head'>diff --git a/arch/arm64/include/asm/set_memory.h b/arch/arm64/include/asm/set_memory.h<br/>index 917761feeffd..90f61b17275e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/set_memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/set_memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/set_memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/set_memory.h</a></div><div class='hunk'>@@ -13,6 +13,10 @@ int set_memory_valid(unsigned long addr, int numpages, int enable);</div><div class='ctx'> </div><div class='ctx'> int set_direct_map_invalid_noflush(struct page *page);</div><div class='ctx'> int set_direct_map_default_noflush(struct page *page);</div><div class='add'>+int set_direct_map_valid_noflush(struct page *page, unsigned nr, bool valid);</div><div class='ctx'> bool kernel_page_present(struct page *page);</div><div class='ctx'> </div><div class='add'>+int set_memory_encrypted(unsigned long addr, int numpages);</div><div class='add'>+int set_memory_decrypted(unsigned long addr, int numpages);</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_ARM64_SET_MEMORY_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/setup.h b/arch/arm64/include/asm/setup.h<br/>index ba269a7a3201..3d96dde4d214 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/setup.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@ static inline bool arch_parse_debug_rodata(char *arg)</div><div class='ctx'> 	if (!arg)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!strcmp(arg, "full")) {</div><div class='add'>+	if (!strcmp(arg, "on")) {</div><div class='ctx'> 		rodata_enabled = rodata_full = true;</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -31,7 +31,7 @@ static inline bool arch_parse_debug_rodata(char *arg)</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!strcmp(arg, "on")) {</div><div class='add'>+	if (!strcmp(arg, "noalias")) {</div><div class='ctx'> 		rodata_enabled = true;</div><div class='ctx'> 		rodata_full = false;</div><div class='ctx'> 		return true;</div><div class='head'>diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h<br/>index 2510eec026f7..d48ef6d5abcc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/smp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/smp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/smp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/smp.h</a></div><div class='hunk'>@@ -50,10 +50,32 @@ struct seq_file;</div><div class='ctx'>  */</div><div class='ctx'> extern void smp_init_cpus(void);</div><div class='ctx'> </div><div class='add'>+enum ipi_msg_type {</div><div class='add'>+	IPI_RESCHEDULE,</div><div class='add'>+	IPI_CALL_FUNC,</div><div class='add'>+	IPI_CPU_STOP,</div><div class='add'>+	IPI_CPU_STOP_NMI,</div><div class='add'>+	IPI_TIMER,</div><div class='add'>+	IPI_IRQ_WORK,</div><div class='add'>+	NR_IPI,</div><div class='add'>+	/*</div><div class='add'>+	 * Any enum &gt;= NR_IPI and &lt; MAX_IPI is special and not tracable</div><div class='add'>+	 * with trace_ipi_*</div><div class='add'>+	 */</div><div class='add'>+	IPI_CPU_BACKTRACE = NR_IPI,</div><div class='add'>+	IPI_KGDB_ROUNDUP,</div><div class='add'>+	MAX_IPI</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Register IPI interrupts with the arch SMP code</div><div class='ctx'>  */</div><div class='del'>-extern void set_smp_ipi_range(int ipi_base, int nr_ipi);</div><div class='add'>+extern void set_smp_ipi_range_percpu(int ipi_base, int nr_ipi, int ncpus);</div><div class='add'>+</div><div class='add'>+static inline void set_smp_ipi_range(int ipi_base, int n)</div><div class='add'>+{</div><div class='add'>+	set_smp_ipi_range_percpu(ipi_base, n, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Called from the secondary holding pen, this is the secondary CPU entry point.</div><div class='head'>diff --git a/arch/arm64/include/asm/sparsemem.h b/arch/arm64/include/asm/sparsemem.h<br/>index 8a8acc220371..84783efdc9d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sparsemem.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sparsemem.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sparsemem.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/sparsemem.h</a></div><div class='hunk'>@@ -5,7 +5,10 @@</div><div class='ctx'> #ifndef __ASM_SPARSEMEM_H</div><div class='ctx'> #define __ASM_SPARSEMEM_H</div><div class='ctx'> </div><div class='del'>-#define MAX_PHYSMEM_BITS	CONFIG_ARM64_PA_BITS</div><div class='add'>+#include &lt;asm/pgtable-prot.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX_PHYSMEM_BITS		PHYS_MASK_SHIFT</div><div class='add'>+#define MAX_POSSIBLE_PHYSMEM_BITS	(52)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Section size must be at least 512MB for 64K base</div><div class='head'>diff --git a/arch/arm64/include/asm/spectre.h b/arch/arm64/include/asm/spectre.h<br/>index 0c4d9045c31f..8fef12626090 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/spectre.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/spectre.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/spectre.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/spectre.h</a></div><div class='hunk'>@@ -97,7 +97,9 @@ enum mitigation_state arm64_get_meltdown_state(void);</div><div class='ctx'> </div><div class='ctx'> enum mitigation_state arm64_get_spectre_bhb_state(void);</div><div class='ctx'> bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);</div><div class='del'>-u8 spectre_bhb_loop_affected(int scope);</div><div class='add'>+extern bool __nospectre_bhb;</div><div class='add'>+u8 get_spectre_bhb_loop_value(void);</div><div class='add'>+bool is_spectre_bhb_fw_mitigated(void);</div><div class='ctx'> void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);</div><div class='ctx'> bool try_emulate_el1_ssbs(struct pt_regs *regs, u32 instr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/spinlock_types.h b/arch/arm64/include/asm/spinlock_types.h<br/>index 11ab1c077697..7cde3d8bd0ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #define __ASM_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #if !defined(__LINUX_SPINLOCK_TYPES_RAW_H) &amp;&amp; !defined(__ASM_SPINLOCK_H)</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/qspinlock_types.h&gt;</div><div class='head'>diff --git a/arch/arm64/include/asm/stacktrace.h b/arch/arm64/include/asm/stacktrace.h<br/>index 66ec8caa6ac0..6d3280932bf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/stacktrace.h</a></div><div class='hunk'>@@ -59,7 +59,6 @@ static inline bool on_task_stack(const struct task_struct *tsk,</div><div class='ctx'> </div><div class='ctx'> #define on_thread_stack()	(on_task_stack(current, current_stack_pointer, 1))</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> DECLARE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack);</div><div class='ctx'> </div><div class='ctx'> static inline struct stack_info stackinfo_get_overflow(void)</div><div class='hunk'>@@ -72,11 +71,8 @@ static inline struct stack_info stackinfo_get_overflow(void)</div><div class='ctx'> 		.high = high,</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define stackinfo_get_overflow()	stackinfo_get_unknown()</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ARM_SDE_INTERFACE) &amp;&amp; defined(CONFIG_VMAP_STACK)</div><div class='add'>+#if defined(CONFIG_ARM_SDE_INTERFACE)</div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);</div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/stacktrace/common.h b/arch/arm64/include/asm/stacktrace/common.h<br/>index f63dc654e545..821a8fdd31af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace/common.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace/common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/stacktrace/common.h</a></div><div class='hunk'>@@ -60,13 +60,27 @@ static inline void unwind_init_common(struct unwind_state *state)</div><div class='ctx'> 	state-&gt;stack = stackinfo_get_unknown();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct stack_info *unwind_find_next_stack(const struct unwind_state *state,</div><div class='del'>-						 unsigned long sp,</div><div class='del'>-						 unsigned long size)</div><div class='add'>+/**</div><div class='add'>+ * unwind_find_stack() - Find the accessible stack which entirely contains an</div><div class='add'>+ * object.</div><div class='add'>+ *</div><div class='add'>+ * @state: the current unwind state.</div><div class='add'>+ * @sp:    the base address of the object.</div><div class='add'>+ * @size:  the size of the object.</div><div class='add'>+ *</div><div class='add'>+ * Return: a pointer to the relevant stack_info if found; NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+static struct stack_info *unwind_find_stack(struct unwind_state *state,</div><div class='add'>+					    unsigned long sp,</div><div class='add'>+					    unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	for (int i = 0; i &lt; state-&gt;nr_stacks; i++) {</div><div class='del'>-		struct stack_info *info = &amp;state-&gt;stacks[i];</div><div class='add'>+	struct stack_info *info = &amp;state-&gt;stack;</div><div class='ctx'> </div><div class='add'>+	if (stackinfo_on_stack(info, sp, size))</div><div class='add'>+		return info;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; state-&gt;nr_stacks; i++) {</div><div class='add'>+		info = &amp;state-&gt;stacks[i];</div><div class='ctx'> 		if (stackinfo_on_stack(info, sp, size))</div><div class='ctx'> 			return info;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -75,36 +89,31 @@ static struct stack_info *unwind_find_next_stack(const struct unwind_state *stat</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * unwind_consume_stack() - Check if an object is on an accessible stack,</div><div class='del'>- * updating stack boundaries so that future unwind steps cannot consume this</div><div class='del'>- * object again.</div><div class='add'>+ * unwind_consume_stack() - Update stack boundaries so that future unwind steps</div><div class='add'>+ * cannot consume this object again.</div><div class='ctx'>  *</div><div class='ctx'>  * @state: the current unwind state.</div><div class='add'>+ * @info:  the stack_info of the stack containing the object.</div><div class='ctx'>  * @sp:    the base address of the object.</div><div class='ctx'>  * @size:  the size of the object.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 upon success, an error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-static inline int unwind_consume_stack(struct unwind_state *state,</div><div class='del'>-				       unsigned long sp,</div><div class='del'>-				       unsigned long size)</div><div class='add'>+static inline void unwind_consume_stack(struct unwind_state *state,</div><div class='add'>+					struct stack_info *info,</div><div class='add'>+					unsigned long sp,</div><div class='add'>+					unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	struct stack_info *next;</div><div class='del'>-</div><div class='del'>-	if (stackinfo_on_stack(&amp;state-&gt;stack, sp, size))</div><div class='del'>-		goto found;</div><div class='del'>-</div><div class='del'>-	next = unwind_find_next_stack(state, sp, size);</div><div class='del'>-	if (!next)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	struct stack_info tmp;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Stack transitions are strictly one-way, and once we've</div><div class='ctx'> 	 * transitioned from one stack to another, it's never valid to</div><div class='ctx'> 	 * unwind back to the old stack.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Remove the current stack from the list of stacks so that it cannot</div><div class='del'>-	 * be found on a subsequent transition.</div><div class='add'>+	 * Destroy the old stack info so that it cannot be found upon a</div><div class='add'>+	 * subsequent transition. If the stack has not changed, we'll</div><div class='add'>+	 * immediately restore the current stack info.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Note that stacks can nest in several valid orders, e.g.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -115,16 +124,15 @@ static inline int unwind_consume_stack(struct unwind_state *state,</div><div class='ctx'> 	 * ... so we do not check the specific order of stack</div><div class='ctx'> 	 * transitions.</div><div class='ctx'> 	 */</div><div class='del'>-	state-&gt;stack = *next;</div><div class='del'>-	*next = stackinfo_get_unknown();</div><div class='add'>+	tmp = *info;</div><div class='add'>+	*info = stackinfo_get_unknown();</div><div class='add'>+	state-&gt;stack = tmp;</div><div class='ctx'> </div><div class='del'>-found:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Future unwind steps can only consume stack above this frame record.</div><div class='ctx'> 	 * Update the current stack to start immediately above it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	state-&gt;stack.low = sp + size;</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -137,21 +145,25 @@ found:</div><div class='ctx'> static inline int</div><div class='ctx'> unwind_next_frame_record(struct unwind_state *state)</div><div class='ctx'> {</div><div class='add'>+	struct stack_info *info;</div><div class='add'>+	struct frame_record *record;</div><div class='ctx'> 	unsigned long fp = state-&gt;fp;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (fp &amp; 0x7)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	err = unwind_consume_stack(state, fp, 16);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	info = unwind_find_stack(state, fp, sizeof(*record));</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unwind_consume_stack(state, info, fp, sizeof(*record));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Record this frame record's values.</div><div class='ctx'> 	 */</div><div class='del'>-	state-&gt;fp = READ_ONCE(*(unsigned long *)(fp));</div><div class='del'>-	state-&gt;pc = READ_ONCE(*(unsigned long *)(fp + 8));</div><div class='add'>+	record = (struct frame_record *)fp;</div><div class='add'>+	state-&gt;fp = READ_ONCE(record-&gt;fp);</div><div class='add'>+	state-&gt;pc = READ_ONCE(record-&gt;lr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/include/asm/stacktrace/frame.h b/arch/arm64/include/asm/stacktrace/frame.h<br/>new file mode 100644<br/>index 000000000000..0ee0f6ba0fd8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace/frame.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/stacktrace/frame.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+#ifndef __ASM_STACKTRACE_FRAME_H</div><div class='add'>+#define __ASM_STACKTRACE_FRAME_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * - FRAME_META_TYPE_NONE</div><div class='add'>+ *</div><div class='add'>+ *   This value is reserved.</div><div class='add'>+ *</div><div class='add'>+ * - FRAME_META_TYPE_FINAL</div><div class='add'>+ *</div><div class='add'>+ *   The record is the last entry on the stack.</div><div class='add'>+ *   Unwinding should terminate successfully.</div><div class='add'>+ *</div><div class='add'>+ * - FRAME_META_TYPE_PT_REGS</div><div class='add'>+ *</div><div class='add'>+ *   The record is embedded within a struct pt_regs, recording the registers at</div><div class='add'>+ *   an arbitrary point in time.</div><div class='add'>+ *   Unwinding should consume pt_regs::pc, followed by pt_regs::lr.</div><div class='add'>+ *</div><div class='add'>+ * Note: all other values are reserved and should result in unwinding</div><div class='add'>+ * terminating with an error.</div><div class='add'>+ */</div><div class='add'>+#define FRAME_META_TYPE_NONE		0</div><div class='add'>+#define FRAME_META_TYPE_FINAL		1</div><div class='add'>+#define FRAME_META_TYPE_PT_REGS		2</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+/* </div><div class='add'>+ * A standard AAPCS64 frame record.</div><div class='add'>+ */</div><div class='add'>+struct frame_record {</div><div class='add'>+	u64 fp;</div><div class='add'>+	u64 lr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A metadata frame record indicating a special unwind.</div><div class='add'>+ * The record::{fp,lr} fields must be zero to indicate the presence of</div><div class='add'>+ * metadata.</div><div class='add'>+ */</div><div class='add'>+struct frame_record_meta {</div><div class='add'>+	struct frame_record record;</div><div class='add'>+	u64 type;</div><div class='add'>+};</div><div class='add'>+#endif /* __ASSEMBLY */</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_STACKTRACE_FRAME_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/stacktrace/nvhe.h b/arch/arm64/include/asm/stacktrace/nvhe.h<br/>index 44759281d0d4..171f9edef49f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace/nvhe.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/stacktrace/nvhe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/stacktrace/nvhe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/stacktrace/nvhe.h</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static inline void kvm_nvhe_unwind_init(struct unwind_state *state,</div><div class='ctx'> </div><div class='ctx'> DECLARE_KVM_NVHE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack);</div><div class='ctx'> DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_stacktrace_info, kvm_stacktrace_info);</div><div class='del'>-DECLARE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page);</div><div class='add'>+DECLARE_PER_CPU(unsigned long, kvm_arm_hyp_stack_base);</div><div class='ctx'> </div><div class='ctx'> void kvm_nvhe_dump_backtrace(unsigned long hyp_offset);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h<br/>index ab8e14b96f68..712daa90e643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/syscall.h</a></div><div class='hunk'>@@ -61,6 +61,22 @@ static inline void syscall_set_return_value(struct task_struct *task,</div><div class='ctx'> 	regs-&gt;regs[0] = val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;syscallno = nr;</div><div class='add'>+	if (nr == -1) {</div><div class='add'>+		/*</div><div class='add'>+		 * When the syscall number is set to -1, the syscall will be</div><div class='add'>+		 * skipped.  In this case the syscall return value has to be</div><div class='add'>+		 * set explicitly, otherwise the first syscall argument is</div><div class='add'>+		 * returned as the syscall return value.</div><div class='add'>+		 */</div><div class='add'>+		syscall_set_return_value(task, regs, -ENOSYS, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define SYSCALL_MAX_ARGS 6</div><div class='ctx'> </div><div class='ctx'> static inline void syscall_get_arguments(struct task_struct *task,</div><div class='hunk'>@@ -73,6 +89,19 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	memcpy(args, &amp;regs-&gt;regs[1], 5 * sizeof(args[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;regs-&gt;regs[0], args, 6 * sizeof(args[0]));</div><div class='add'>+	/*</div><div class='add'>+	 * Also copy the first argument into orig_x0</div><div class='add'>+	 * so that syscall_get_arguments() would return it</div><div class='add'>+	 * instead of the previous value.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;orig_x0 = regs-&gt;regs[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We don't care about endianness (__AUDIT_ARCH_LE bit) here because</div><div class='ctx'>  * AArch64 has the same system calls both on little- and big- endian.</div><div class='head'>diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h<br/>index 9ea97dddefc4..6455db1b54fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sysreg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/sysreg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/sysreg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/sysreg.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> #include &lt;linux/kasan-tags.h&gt;</div><div class='add'>+#include &lt;linux/kconfig.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/gpr-num.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -112,11 +113,16 @@</div><div class='ctx'> /* Register-based PAN access, for save/restore purposes */</div><div class='ctx'> #define SYS_PSTATE_PAN			sys_reg(3, 0, 4, 2, 3)</div><div class='ctx'> </div><div class='del'>-#define __SYS_BARRIER_INSN(CRm, op2, Rt) \</div><div class='del'>-	__emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) &amp; 0x1f))</div><div class='add'>+#define __SYS_BARRIER_INSN(op0, op1, CRn, CRm, op2, Rt)			\</div><div class='add'>+	__emit_inst(0xd5000000					|	\</div><div class='add'>+		    sys_insn((op0), (op1), (CRn), (CRm), (op2))	|	\</div><div class='add'>+		    ((Rt) &amp; 0x1f))</div><div class='ctx'> </div><div class='del'>-#define SB_BARRIER_INSN			__SYS_BARRIER_INSN(0, 7, 31)</div><div class='add'>+#define SB_BARRIER_INSN			__SYS_BARRIER_INSN(0, 3, 3, 0, 7, 31)</div><div class='add'>+#define GSB_SYS_BARRIER_INSN		__SYS_BARRIER_INSN(1, 0, 12, 0, 0, 31)</div><div class='add'>+#define GSB_ACK_BARRIER_INSN		__SYS_BARRIER_INSN(1, 0, 12, 0, 1, 31)</div><div class='ctx'> </div><div class='add'>+/* Data cache zero operations */</div><div class='ctx'> #define SYS_DC_ISW			sys_insn(1, 0, 7, 6, 2)</div><div class='ctx'> #define SYS_DC_IGSW			sys_insn(1, 0, 7, 6, 4)</div><div class='ctx'> #define SYS_DC_IGDSW			sys_insn(1, 0, 7, 6, 6)</div><div class='hunk'>@@ -153,11 +159,13 @@</div><div class='ctx'> #define SYS_DC_CIGVAC			sys_insn(1, 3, 7, 14, 3)</div><div class='ctx'> #define SYS_DC_CIGDVAC			sys_insn(1, 3, 7, 14, 5)</div><div class='ctx'> </div><div class='del'>-/* Data cache zero operations */</div><div class='ctx'> #define SYS_DC_ZVA			sys_insn(1, 3, 7, 4, 1)</div><div class='ctx'> #define SYS_DC_GVA			sys_insn(1, 3, 7, 4, 3)</div><div class='ctx'> #define SYS_DC_GZVA			sys_insn(1, 3, 7, 4, 4)</div><div class='ctx'> </div><div class='add'>+#define SYS_DC_CIVAPS			sys_insn(1, 0, 7, 15, 1)</div><div class='add'>+#define SYS_DC_CIGDVAPS			sys_insn(1, 0, 7, 15, 5)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Automatically generated definitions for system registers, the</div><div class='ctx'>  * manual encodings below are in the process of being converted to</div><div class='hunk'>@@ -198,16 +206,8 @@</div><div class='ctx'> #define SYS_DBGVCR32_EL2		sys_reg(2, 4, 0, 7, 0)</div><div class='ctx'> </div><div class='ctx'> #define SYS_BRBINF_EL1(n)		sys_reg(2, 1, 8, (n &amp; 15), (((n &amp; 16) &gt;&gt; 2) | 0))</div><div class='del'>-#define SYS_BRBINFINJ_EL1		sys_reg(2, 1, 9, 1, 0)</div><div class='ctx'> #define SYS_BRBSRC_EL1(n)		sys_reg(2, 1, 8, (n &amp; 15), (((n &amp; 16) &gt;&gt; 2) | 1))</div><div class='del'>-#define SYS_BRBSRCINJ_EL1		sys_reg(2, 1, 9, 1, 1)</div><div class='ctx'> #define SYS_BRBTGT_EL1(n)		sys_reg(2, 1, 8, (n &amp; 15), (((n &amp; 16) &gt;&gt; 2) | 2))</div><div class='del'>-#define SYS_BRBTGTINJ_EL1		sys_reg(2, 1, 9, 1, 2)</div><div class='del'>-#define SYS_BRBTS_EL1			sys_reg(2, 1, 9, 0, 2)</div><div class='del'>-</div><div class='del'>-#define SYS_BRBCR_EL1			sys_reg(2, 1, 9, 0, 0)</div><div class='del'>-#define SYS_BRBFCR_EL1			sys_reg(2, 1, 9, 0, 1)</div><div class='del'>-#define SYS_BRBIDR0_EL1			sys_reg(2, 1, 9, 2, 0)</div><div class='ctx'> </div><div class='ctx'> #define SYS_TRCITECR_EL1		sys_reg(3, 0, 1, 2, 3)</div><div class='ctx'> #define SYS_TRCACATR(m)			sys_reg(2, 1, 2, ((m &amp; 7) &lt;&lt; 1), (2 | (m &gt;&gt; 3)))</div><div class='hunk'>@@ -273,8 +273,6 @@</div><div class='ctx'> /* ETM */</div><div class='ctx'> #define SYS_TRCOSLAR			sys_reg(2, 1, 1, 0, 4)</div><div class='ctx'> </div><div class='del'>-#define SYS_BRBCR_EL2			sys_reg(2, 4, 9, 0, 0)</div><div class='del'>-</div><div class='ctx'> #define SYS_MIDR_EL1			sys_reg(3, 0, 0, 0, 0)</div><div class='ctx'> #define SYS_MPIDR_EL1			sys_reg(3, 0, 0, 0, 5)</div><div class='ctx'> #define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)</div><div class='hunk'>@@ -283,10 +281,6 @@</div><div class='ctx'> #define SYS_RGSR_EL1			sys_reg(3, 0, 1, 0, 5)</div><div class='ctx'> #define SYS_GCR_EL1			sys_reg(3, 0, 1, 0, 6)</div><div class='ctx'> </div><div class='del'>-#define SYS_TRFCR_EL1			sys_reg(3, 0, 1, 2, 1)</div><div class='del'>-</div><div class='del'>-#define SYS_TCR_EL1			sys_reg(3, 0, 2, 0, 2)</div><div class='del'>-</div><div class='ctx'> #define SYS_APIAKEYLO_EL1		sys_reg(3, 0, 2, 1, 0)</div><div class='ctx'> #define SYS_APIAKEYHI_EL1		sys_reg(3, 0, 2, 1, 1)</div><div class='ctx'> #define SYS_APIBKEYLO_EL1		sys_reg(3, 0, 2, 1, 2)</div><div class='hunk'>@@ -348,15 +342,6 @@</div><div class='ctx'> #define SYS_PAR_EL1_ATTR		GENMASK_ULL(63, 56)</div><div class='ctx'> #define SYS_PAR_EL1_F0_RES0		(GENMASK_ULL(6, 1) | GENMASK_ULL(55, 52))</div><div class='ctx'> </div><div class='del'>-/*** Statistical Profiling Extension ***/</div><div class='del'>-#define PMSEVFR_EL1_RES0_IMP	\</div><div class='del'>-	(GENMASK_ULL(47, 32) | GENMASK_ULL(23, 16) | GENMASK_ULL(11, 8) |\</div><div class='del'>-	 BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0))</div><div class='del'>-#define PMSEVFR_EL1_RES0_V1P1	\</div><div class='del'>-	(PMSEVFR_EL1_RES0_IMP &amp; ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11)))</div><div class='del'>-#define PMSEVFR_EL1_RES0_V1P2	\</div><div class='del'>-	(PMSEVFR_EL1_RES0_V1P1 &amp; ~BIT_ULL(6))</div><div class='del'>-</div><div class='ctx'> /* Buffer error reporting */</div><div class='ctx'> #define PMBSR_EL1_FAULT_FSC_SHIFT	PMBSR_EL1_MSS_SHIFT</div><div class='ctx'> #define PMBSR_EL1_FAULT_FSC_MASK	PMBSR_EL1_MSS_MASK</div><div class='hunk'>@@ -477,6 +462,7 @@</div><div class='ctx'> #define SYS_CNTFRQ_EL0			sys_reg(3, 3, 14, 0, 0)</div><div class='ctx'> </div><div class='ctx'> #define SYS_CNTPCT_EL0			sys_reg(3, 3, 14, 0, 1)</div><div class='add'>+#define SYS_CNTVCT_EL0			sys_reg(3, 3, 14, 0, 2)</div><div class='ctx'> #define SYS_CNTPCTSS_EL0		sys_reg(3, 3, 14, 0, 5)</div><div class='ctx'> #define SYS_CNTVCTSS_EL0		sys_reg(3, 3, 14, 0, 6)</div><div class='ctx'> </div><div class='hunk'>@@ -484,23 +470,36 @@</div><div class='ctx'> #define SYS_CNTP_CTL_EL0		sys_reg(3, 3, 14, 2, 1)</div><div class='ctx'> #define SYS_CNTP_CVAL_EL0		sys_reg(3, 3, 14, 2, 2)</div><div class='ctx'> </div><div class='add'>+#define SYS_CNTV_TVAL_EL0		sys_reg(3, 3, 14, 3, 0)</div><div class='ctx'> #define SYS_CNTV_CTL_EL0		sys_reg(3, 3, 14, 3, 1)</div><div class='ctx'> #define SYS_CNTV_CVAL_EL0		sys_reg(3, 3, 14, 3, 2)</div><div class='ctx'> </div><div class='ctx'> #define SYS_AARCH32_CNTP_TVAL		sys_reg(0, 0, 14, 2, 0)</div><div class='ctx'> #define SYS_AARCH32_CNTP_CTL		sys_reg(0, 0, 14, 2, 1)</div><div class='ctx'> #define SYS_AARCH32_CNTPCT		sys_reg(0, 0, 0, 14, 0)</div><div class='add'>+#define SYS_AARCH32_CNTVCT		sys_reg(0, 1, 0, 14, 0)</div><div class='ctx'> #define SYS_AARCH32_CNTP_CVAL		sys_reg(0, 2, 0, 14, 0)</div><div class='ctx'> #define SYS_AARCH32_CNTPCTSS		sys_reg(0, 8, 0, 14, 0)</div><div class='add'>+#define SYS_AARCH32_CNTVCTSS		sys_reg(0, 9, 0, 14, 0)</div><div class='ctx'> </div><div class='ctx'> #define __PMEV_op2(n)			((n) &amp; 0x7)</div><div class='ctx'> #define __CNTR_CRm(n)			(0x8 | (((n) &gt;&gt; 3) &amp; 0x3))</div><div class='add'>+#define SYS_PMEVCNTSVRn_EL1(n)		sys_reg(2, 0, 14, __CNTR_CRm(n), __PMEV_op2(n))</div><div class='ctx'> #define SYS_PMEVCNTRn_EL0(n)		sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))</div><div class='ctx'> #define __TYPER_CRm(n)			(0xc | (((n) &gt;&gt; 3) &amp; 0x3))</div><div class='ctx'> #define SYS_PMEVTYPERn_EL0(n)		sys_reg(3, 3, 14, __TYPER_CRm(n), __PMEV_op2(n))</div><div class='ctx'> </div><div class='ctx'> #define SYS_PMCCFILTR_EL0		sys_reg(3, 3, 14, 15, 7)</div><div class='ctx'> </div><div class='add'>+#define	SYS_SPMCGCRn_EL1(n)		sys_reg(2, 0, 9, 13, ((n) &amp; 1))</div><div class='add'>+</div><div class='add'>+#define __SPMEV_op2(n)			((n) &amp; 0x7)</div><div class='add'>+#define __SPMEV_crm(p, n)		((((p) &amp; 7) &lt;&lt; 1) | (((n) &gt;&gt; 3) &amp; 1))</div><div class='add'>+#define SYS_SPMEVCNTRn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b000, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVFILT2Rn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b011, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVFILTRn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b010, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVTYPERn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b001, n), __SPMEV_op2(n))</div><div class='add'>+</div><div class='ctx'> #define SYS_VPIDR_EL2			sys_reg(3, 4, 0, 0, 0)</div><div class='ctx'> #define SYS_VMPIDR_EL2			sys_reg(3, 4, 0, 0, 5)</div><div class='ctx'> </div><div class='hunk'>@@ -519,8 +518,6 @@</div><div class='ctx'> #define SYS_VTTBR_EL2			sys_reg(3, 4, 2, 1, 0)</div><div class='ctx'> #define SYS_VTCR_EL2			sys_reg(3, 4, 2, 1, 2)</div><div class='ctx'> </div><div class='del'>-#define SYS_TRFCR_EL2			sys_reg(3, 4, 1, 2, 1)</div><div class='del'>-#define SYS_VNCR_EL2			sys_reg(3, 4, 2, 2, 0)</div><div class='ctx'> #define SYS_HAFGRTR_EL2			sys_reg(3, 4, 3, 1, 6)</div><div class='ctx'> #define SYS_SPSR_EL2			sys_reg(3, 4, 4, 0, 0)</div><div class='ctx'> #define SYS_ELR_EL2			sys_reg(3, 4, 4, 0, 1)</div><div class='hunk'>@@ -542,18 +539,6 @@</div><div class='ctx'> </div><div class='ctx'> #define SYS_MAIR_EL2			sys_reg(3, 4, 10, 2, 0)</div><div class='ctx'> #define SYS_AMAIR_EL2			sys_reg(3, 4, 10, 3, 0)</div><div class='del'>-#define SYS_MPAMHCR_EL2			sys_reg(3, 4, 10, 4, 0)</div><div class='del'>-#define SYS_MPAMVPMV_EL2		sys_reg(3, 4, 10, 4, 1)</div><div class='del'>-#define SYS_MPAM2_EL2			sys_reg(3, 4, 10, 5, 0)</div><div class='del'>-#define __SYS__MPAMVPMx_EL2(x)		sys_reg(3, 4, 10, 6, x)</div><div class='del'>-#define SYS_MPAMVPM0_EL2		__SYS__MPAMVPMx_EL2(0)</div><div class='del'>-#define SYS_MPAMVPM1_EL2		__SYS__MPAMVPMx_EL2(1)</div><div class='del'>-#define SYS_MPAMVPM2_EL2		__SYS__MPAMVPMx_EL2(2)</div><div class='del'>-#define SYS_MPAMVPM3_EL2		__SYS__MPAMVPMx_EL2(3)</div><div class='del'>-#define SYS_MPAMVPM4_EL2		__SYS__MPAMVPMx_EL2(4)</div><div class='del'>-#define SYS_MPAMVPM5_EL2		__SYS__MPAMVPMx_EL2(5)</div><div class='del'>-#define SYS_MPAMVPM6_EL2		__SYS__MPAMVPMx_EL2(6)</div><div class='del'>-#define SYS_MPAMVPM7_EL2		__SYS__MPAMVPMx_EL2(7)</div><div class='ctx'> </div><div class='ctx'> #define SYS_VBAR_EL2			sys_reg(3, 4, 12, 0, 0)</div><div class='ctx'> #define SYS_RVBAR_EL2			sys_reg(3, 4, 12, 0, 1)</div><div class='hunk'>@@ -573,9 +558,6 @@</div><div class='ctx'> </div><div class='ctx'> #define SYS_ICH_VSEIR_EL2		sys_reg(3, 4, 12, 9, 4)</div><div class='ctx'> #define SYS_ICC_SRE_EL2			sys_reg(3, 4, 12, 9, 5)</div><div class='del'>-#define SYS_ICH_HCR_EL2			sys_reg(3, 4, 12, 11, 0)</div><div class='del'>-#define SYS_ICH_VTR_EL2			sys_reg(3, 4, 12, 11, 1)</div><div class='del'>-#define SYS_ICH_MISR_EL2		sys_reg(3, 4, 12, 11, 2)</div><div class='ctx'> #define SYS_ICH_EISR_EL2		sys_reg(3, 4, 12, 11, 3)</div><div class='ctx'> #define SYS_ICH_ELRSR_EL2		sys_reg(3, 4, 12, 11, 5)</div><div class='ctx'> #define SYS_ICH_VMCR_EL2		sys_reg(3, 4, 12, 11, 7)</div><div class='hunk'>@@ -622,28 +604,18 @@</div><div class='ctx'> </div><div class='ctx'> /* VHE encodings for architectural EL0/1 system registers */</div><div class='ctx'> #define SYS_BRBCR_EL12			sys_reg(2, 5, 9, 0, 0)</div><div class='del'>-#define SYS_SCTLR_EL12			sys_reg(3, 5, 1, 0, 0)</div><div class='del'>-#define SYS_CPACR_EL12			sys_reg(3, 5, 1, 0, 2)</div><div class='del'>-#define SYS_SCTLR2_EL12			sys_reg(3, 5, 1, 0, 3)</div><div class='del'>-#define SYS_ZCR_EL12			sys_reg(3, 5, 1, 2, 0)</div><div class='del'>-#define SYS_TRFCR_EL12			sys_reg(3, 5, 1, 2, 1)</div><div class='del'>-#define SYS_SMCR_EL12			sys_reg(3, 5, 1, 2, 6)</div><div class='ctx'> #define SYS_TTBR0_EL12			sys_reg(3, 5, 2, 0, 0)</div><div class='ctx'> #define SYS_TTBR1_EL12			sys_reg(3, 5, 2, 0, 1)</div><div class='del'>-#define SYS_TCR_EL12			sys_reg(3, 5, 2, 0, 2)</div><div class='del'>-#define SYS_TCR2_EL12			sys_reg(3, 5, 2, 0, 3)</div><div class='ctx'> #define SYS_SPSR_EL12			sys_reg(3, 5, 4, 0, 0)</div><div class='ctx'> #define SYS_ELR_EL12			sys_reg(3, 5, 4, 0, 1)</div><div class='ctx'> #define SYS_AFSR0_EL12			sys_reg(3, 5, 5, 1, 0)</div><div class='ctx'> #define SYS_AFSR1_EL12			sys_reg(3, 5, 5, 1, 1)</div><div class='ctx'> #define SYS_ESR_EL12			sys_reg(3, 5, 5, 2, 0)</div><div class='ctx'> #define SYS_TFSR_EL12			sys_reg(3, 5, 5, 6, 0)</div><div class='del'>-#define SYS_FAR_EL12			sys_reg(3, 5, 6, 0, 0)</div><div class='ctx'> #define SYS_PMSCR_EL12			sys_reg(3, 5, 9, 9, 0)</div><div class='ctx'> #define SYS_MAIR_EL12			sys_reg(3, 5, 10, 2, 0)</div><div class='ctx'> #define SYS_AMAIR_EL12			sys_reg(3, 5, 10, 3, 0)</div><div class='ctx'> #define SYS_VBAR_EL12			sys_reg(3, 5, 12, 0, 0)</div><div class='del'>-#define SYS_CONTEXTIDR_EL12		sys_reg(3, 5, 13, 0, 1)</div><div class='ctx'> #define SYS_SCXTNUM_EL12		sys_reg(3, 5, 13, 0, 7)</div><div class='ctx'> #define SYS_CNTKCTL_EL12		sys_reg(3, 5, 14, 1, 0)</div><div class='ctx'> #define SYS_CNTP_TVAL_EL02		sys_reg(3, 5, 14, 2, 0)</div><div class='hunk'>@@ -832,6 +804,12 @@</div><div class='ctx'> #define OP_COSP_RCTX			sys_insn(1, 3, 7, 3, 6)</div><div class='ctx'> #define OP_CPP_RCTX			sys_insn(1, 3, 7, 3, 7)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * BRBE Instructions</div><div class='add'>+ */</div><div class='add'>+#define BRB_IALL_INSN	__emit_inst(0xd5000000 | OP_BRB_IALL | (0x1f))</div><div class='add'>+#define BRB_INJ_INSN	__emit_inst(0xd5000000 | OP_BRB_INJ  | (0x1f))</div><div class='add'>+</div><div class='ctx'> /* Common SCTLR_ELx flags. */</div><div class='ctx'> #define SCTLR_ELx_ENTP2	(BIT(60))</div><div class='ctx'> #define SCTLR_ELx_DSSBS	(BIT(44))</div><div class='hunk'>@@ -995,20 +973,7 @@</div><div class='ctx'> /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */</div><div class='ctx'> #define SYS_MPIDR_SAFE_VAL	(BIT(31))</div><div class='ctx'> </div><div class='del'>-#define TRFCR_ELx_TS_SHIFT		5</div><div class='del'>-#define TRFCR_ELx_TS_MASK		((0x3UL) &lt;&lt; TRFCR_ELx_TS_SHIFT)</div><div class='del'>-#define TRFCR_ELx_TS_VIRTUAL		((0x1UL) &lt;&lt; TRFCR_ELx_TS_SHIFT)</div><div class='del'>-#define TRFCR_ELx_TS_GUEST_PHYSICAL	((0x2UL) &lt;&lt; TRFCR_ELx_TS_SHIFT)</div><div class='del'>-#define TRFCR_ELx_TS_PHYSICAL		((0x3UL) &lt;&lt; TRFCR_ELx_TS_SHIFT)</div><div class='del'>-#define TRFCR_EL2_CX			BIT(3)</div><div class='del'>-#define TRFCR_ELx_ExTRE			BIT(1)</div><div class='del'>-#define TRFCR_ELx_E0TRE			BIT(0)</div><div class='del'>-</div><div class='ctx'> /* GIC Hypervisor interface registers */</div><div class='del'>-/* ICH_MISR_EL2 bit definitions */</div><div class='del'>-#define ICH_MISR_EOI		(1 &lt;&lt; 0)</div><div class='del'>-#define ICH_MISR_U		(1 &lt;&lt; 1)</div><div class='del'>-</div><div class='ctx'> /* ICH_LR*_EL2 bit definitions */</div><div class='ctx'> #define ICH_LR_VIRTUAL_ID_MASK	((1ULL &lt;&lt; 32) - 1)</div><div class='ctx'> </div><div class='hunk'>@@ -1023,17 +988,6 @@</div><div class='ctx'> #define ICH_LR_PRIORITY_SHIFT	48</div><div class='ctx'> #define ICH_LR_PRIORITY_MASK	(0xffULL &lt;&lt; ICH_LR_PRIORITY_SHIFT)</div><div class='ctx'> </div><div class='del'>-/* ICH_HCR_EL2 bit definitions */</div><div class='del'>-#define ICH_HCR_EN		(1 &lt;&lt; 0)</div><div class='del'>-#define ICH_HCR_UIE		(1 &lt;&lt; 1)</div><div class='del'>-#define ICH_HCR_NPIE		(1 &lt;&lt; 3)</div><div class='del'>-#define ICH_HCR_TC		(1 &lt;&lt; 10)</div><div class='del'>-#define ICH_HCR_TALL0		(1 &lt;&lt; 11)</div><div class='del'>-#define ICH_HCR_TALL1		(1 &lt;&lt; 12)</div><div class='del'>-#define ICH_HCR_TDIR		(1 &lt;&lt; 14)</div><div class='del'>-#define ICH_HCR_EOIcount_SHIFT	27</div><div class='del'>-#define ICH_HCR_EOIcount_MASK	(0x1f &lt;&lt; ICH_HCR_EOIcount_SHIFT)</div><div class='del'>-</div><div class='ctx'> /* ICH_VMCR_EL2 bit definitions */</div><div class='ctx'> #define ICH_VMCR_ACK_CTL_SHIFT	2</div><div class='ctx'> #define ICH_VMCR_ACK_CTL_MASK	(1 &lt;&lt; ICH_VMCR_ACK_CTL_SHIFT)</div><div class='hunk'>@@ -1054,18 +1008,6 @@</div><div class='ctx'> #define ICH_VMCR_ENG1_SHIFT	1</div><div class='ctx'> #define ICH_VMCR_ENG1_MASK	(1 &lt;&lt; ICH_VMCR_ENG1_SHIFT)</div><div class='ctx'> </div><div class='del'>-/* ICH_VTR_EL2 bit definitions */</div><div class='del'>-#define ICH_VTR_PRI_BITS_SHIFT	29</div><div class='del'>-#define ICH_VTR_PRI_BITS_MASK	(7 &lt;&lt; ICH_VTR_PRI_BITS_SHIFT)</div><div class='del'>-#define ICH_VTR_ID_BITS_SHIFT	23</div><div class='del'>-#define ICH_VTR_ID_BITS_MASK	(7 &lt;&lt; ICH_VTR_ID_BITS_SHIFT)</div><div class='del'>-#define ICH_VTR_SEIS_SHIFT	22</div><div class='del'>-#define ICH_VTR_SEIS_MASK	(1 &lt;&lt; ICH_VTR_SEIS_SHIFT)</div><div class='del'>-#define ICH_VTR_A3V_SHIFT	21</div><div class='del'>-#define ICH_VTR_A3V_MASK	(1 &lt;&lt; ICH_VTR_A3V_SHIFT)</div><div class='del'>-#define ICH_VTR_TDS_SHIFT	19</div><div class='del'>-#define ICH_VTR_TDS_MASK	(1 &lt;&lt; ICH_VTR_TDS_SHIFT)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Permission Indirection Extension (PIE) permission encodings.</div><div class='ctx'>  * Encodings with the _O suffix, have overlays applied (Permission Overlay Extension).</div><div class='hunk'>@@ -1082,8 +1024,11 @@</div><div class='ctx'> #define PIE_RX		UL(0xa)</div><div class='ctx'> #define PIE_RW		UL(0xc)</div><div class='ctx'> #define PIE_RWX		UL(0xe)</div><div class='add'>+#define PIE_MASK	UL(0xf)</div><div class='ctx'> </div><div class='del'>-#define PIRx_ELx_PERM(idx, perm)	((perm) &lt;&lt; ((idx) * 4))</div><div class='add'>+#define PIRx_ELx_BITS_PER_IDX		4</div><div class='add'>+#define PIRx_ELx_PERM_SHIFT(idx)	((idx) * PIRx_ELx_BITS_PER_IDX)</div><div class='add'>+#define PIRx_ELx_PERM_PREP(idx, perm)	(((perm) &amp; PIE_MASK) &lt;&lt; PIRx_ELx_PERM_SHIFT(idx))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Permission Overlay Extension (POE) permission encodings.</div><div class='hunk'>@@ -1094,17 +1039,97 @@</div><div class='ctx'> #define POE_RX		UL(0x3)</div><div class='ctx'> #define POE_W		UL(0x4)</div><div class='ctx'> #define POE_RW		UL(0x5)</div><div class='del'>-#define POE_XW		UL(0x6)</div><div class='del'>-#define POE_RXW		UL(0x7)</div><div class='add'>+#define POE_WX		UL(0x6)</div><div class='add'>+#define POE_RWX		UL(0x7)</div><div class='ctx'> #define POE_MASK	UL(0xf)</div><div class='ctx'> </div><div class='del'>-/* Initial value for Permission Overlay Extension for EL0 */</div><div class='del'>-#define POR_EL0_INIT	POE_RXW</div><div class='add'>+#define POR_ELx_BITS_PER_IDX		4</div><div class='add'>+#define POR_ELx_PERM_SHIFT(idx)		((idx) * POR_ELx_BITS_PER_IDX)</div><div class='add'>+#define POR_ELx_PERM_GET(idx, reg)	(((reg) &gt;&gt; POR_ELx_PERM_SHIFT(idx)) &amp; POE_MASK)</div><div class='add'>+#define POR_ELx_PERM_PREP(idx, perm)	(((perm) &amp; POE_MASK) &lt;&lt; POR_ELx_PERM_SHIFT(idx))</div><div class='ctx'> </div><div class='del'>-#define ARM64_FEATURE_FIELD_BITS	4</div><div class='add'>+/*</div><div class='add'>+ * Definitions for Guarded Control Stack</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define GCS_CAP_ADDR_MASK		GENMASK(63, 12)</div><div class='add'>+#define GCS_CAP_ADDR_SHIFT		12</div><div class='add'>+#define GCS_CAP_ADDR_WIDTH		52</div><div class='add'>+#define GCS_CAP_ADDR(x)			FIELD_GET(GCS_CAP_ADDR_MASK, x)</div><div class='add'>+</div><div class='add'>+#define GCS_CAP_TOKEN_MASK		GENMASK(11, 0)</div><div class='add'>+#define GCS_CAP_TOKEN_SHIFT		0</div><div class='add'>+#define GCS_CAP_TOKEN_WIDTH		12</div><div class='add'>+#define GCS_CAP_TOKEN(x)		FIELD_GET(GCS_CAP_TOKEN_MASK, x)</div><div class='add'>+</div><div class='add'>+#define GCS_CAP_VALID_TOKEN		0x1</div><div class='add'>+#define GCS_CAP_IN_PROGRESS_TOKEN	0x5</div><div class='ctx'> </div><div class='del'>-/* Defined for compatibility only, do not add new users. */</div><div class='del'>-#define ARM64_FEATURE_MASK(x)	(x##_MASK)</div><div class='add'>+#define GCS_CAP(x)	((((unsigned long)x) &amp; GCS_CAP_ADDR_MASK) | \</div><div class='add'>+					       GCS_CAP_VALID_TOKEN)</div><div class='add'>+/*</div><div class='add'>+ * Definitions for GICv5 instructions</div><div class='add'>+ */</div><div class='add'>+#define GICV5_OP_GIC_CDAFF		sys_insn(1, 0, 12, 1, 3)</div><div class='add'>+#define GICV5_OP_GIC_CDDI		sys_insn(1, 0, 12, 2, 0)</div><div class='add'>+#define GICV5_OP_GIC_CDDIS		sys_insn(1, 0, 12, 1, 0)</div><div class='add'>+#define GICV5_OP_GIC_CDHM		sys_insn(1, 0, 12, 2, 1)</div><div class='add'>+#define GICV5_OP_GIC_CDEN		sys_insn(1, 0, 12, 1, 1)</div><div class='add'>+#define GICV5_OP_GIC_CDEOI		sys_insn(1, 0, 12, 1, 7)</div><div class='add'>+#define GICV5_OP_GIC_CDPEND		sys_insn(1, 0, 12, 1, 4)</div><div class='add'>+#define GICV5_OP_GIC_CDPRI		sys_insn(1, 0, 12, 1, 2)</div><div class='add'>+#define GICV5_OP_GIC_CDRCFG		sys_insn(1, 0, 12, 1, 5)</div><div class='add'>+#define GICV5_OP_GICR_CDIA		sys_insn(1, 0, 12, 3, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDAFF */</div><div class='add'>+#define GICV5_GIC_CDAFF_IAFFID_MASK	GENMASK_ULL(47, 32)</div><div class='add'>+#define GICV5_GIC_CDAFF_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDAFF_IRM_MASK	BIT_ULL(28)</div><div class='add'>+#define GICV5_GIC_CDAFF_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDDI */</div><div class='add'>+#define GICV5_GIC_CDDI_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDDI_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDDIS */</div><div class='add'>+#define GICV5_GIC_CDDIS_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDDIS_TYPE(r)		FIELD_GET(GICV5_GIC_CDDIS_TYPE_MASK, r)</div><div class='add'>+#define GICV5_GIC_CDDIS_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+#define GICV5_GIC_CDDIS_ID(r)		FIELD_GET(GICV5_GIC_CDDIS_ID_MASK, r)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDEN */</div><div class='add'>+#define GICV5_GIC_CDEN_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDEN_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDHM */</div><div class='add'>+#define GICV5_GIC_CDHM_HM_MASK		BIT_ULL(32)</div><div class='add'>+#define GICV5_GIC_CDHM_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDHM_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDPEND */</div><div class='add'>+#define GICV5_GIC_CDPEND_PENDING_MASK	BIT_ULL(32)</div><div class='add'>+#define GICV5_GIC_CDPEND_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDPEND_ID_MASK	GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDPRI */</div><div class='add'>+#define GICV5_GIC_CDPRI_PRIORITY_MASK	GENMASK_ULL(39, 35)</div><div class='add'>+#define GICV5_GIC_CDPRI_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDPRI_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GIC CDRCFG */</div><div class='add'>+#define GICV5_GIC_CDRCFG_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDRCFG_ID_MASK	GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+/* Definitions for GICR CDIA */</div><div class='add'>+#define GICV5_GIC_CDIA_VALID_MASK	BIT_ULL(32)</div><div class='add'>+#define GICV5_GICR_CDIA_VALID(r)	FIELD_GET(GICV5_GIC_CDIA_VALID_MASK, r)</div><div class='add'>+#define GICV5_GIC_CDIA_TYPE_MASK	GENMASK_ULL(31, 29)</div><div class='add'>+#define GICV5_GIC_CDIA_ID_MASK		GENMASK_ULL(23, 0)</div><div class='add'>+</div><div class='add'>+#define gicr_insn(insn)			read_sysreg_s(GICV5_OP_GICR_##insn)</div><div class='add'>+#define gic_insn(v, insn)		write_sysreg_s(v, GICV5_OP_GIC_##insn)</div><div class='add'>+</div><div class='add'>+#define ARM64_FEATURE_FIELD_BITS	4</div><div class='ctx'> </div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -1116,6 +1141,15 @@</div><div class='ctx'> 	__emit_inst(0xd5000000|(\sreg)|(.L__gpr_num_\rt))</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro	msr_hcr_el2, reg</div><div class='add'>+#if IS_ENABLED(CONFIG_AMPERE_ERRATUM_AC04_CPU_23)</div><div class='add'>+	dsb	nsh</div><div class='add'>+	msr	hcr_el2, \reg</div><div class='add'>+	isb</div><div class='add'>+#else</div><div class='add'>+	msr	hcr_el2, \reg</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='hunk'>@@ -1203,6 +1237,13 @@</div><div class='ctx'> 		write_sysreg(__scs_new, sysreg);			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+#define sysreg_clear_set_hcr(clear, set) do {				\</div><div class='add'>+	u64 __scs_val = read_sysreg(hcr_el2);				\</div><div class='add'>+	u64 __scs_new = (__scs_val &amp; ~(u64)(clear)) | (set);		\</div><div class='add'>+	if (__scs_new != __scs_val)					\</div><div class='add'>+		write_sysreg_hcr(__scs_new);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #define sysreg_clear_set_s(sysreg, clear, set) do {			\</div><div class='ctx'> 	u64 __scs_val = read_sysreg_s(sysreg);				\</div><div class='ctx'> 	u64 __scs_new = (__scs_val &amp; ~(u64)(clear)) | (set);		\</div><div class='hunk'>@@ -1210,6 +1251,17 @@</div><div class='ctx'> 		write_sysreg_s(__scs_new, sysreg);			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+#define write_sysreg_hcr(__val) do {					\</div><div class='add'>+	if (IS_ENABLED(CONFIG_AMPERE_ERRATUM_AC04_CPU_23) &amp;&amp;		\</div><div class='add'>+	   (!system_capabilities_finalized() ||				\</div><div class='add'>+	    alternative_has_cap_unlikely(ARM64_WORKAROUND_AMPERE_AC04_CPU_23))) \</div><div class='add'>+		asm volatile("dsb nsh; msr hcr_el2, %x0; isb"		\</div><div class='add'>+			     : : "rZ" (__val));				\</div><div class='add'>+	else								\</div><div class='add'>+		asm volatile("msr hcr_el2, %x0"				\</div><div class='add'>+			     : : "rZ" (__val));				\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #define read_sysreg_par() ({						\</div><div class='ctx'> 	u64 par;							\</div><div class='ctx'> 	asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));	\</div><div class='head'>diff --git a/arch/arm64/include/asm/system_misc.h b/arch/arm64/include/asm/system_misc.h<br/>index c34344256762..344b1c1a4bbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/system_misc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/system_misc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/system_misc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/system_misc.h</a></div><div class='hunk'>@@ -25,10 +25,6 @@ void arm64_notify_die(const char *str, struct pt_regs *regs,</div><div class='ctx'> 		      int signo, int sicode, unsigned long far,</div><div class='ctx'> 		      unsigned long err);</div><div class='ctx'> </div><div class='del'>-void hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned long,</div><div class='del'>-					     struct pt_regs *),</div><div class='del'>-			   int sig, int code, const char *name);</div><div class='del'>-</div><div class='ctx'> struct mm_struct;</div><div class='ctx'> extern void __show_regs(struct pt_regs *);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/patching.h b/arch/arm64/include/asm/text-patching.h<br/>index 587bdb91ab7a..587bdb91ab7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/patching.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/patching.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/text-patching.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/text-patching.h</a></div><div class='head'>diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h<br/>index 1114c1c3300a..f241b8601ebd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/thread_info.h</a></div><div class='hunk'>@@ -59,16 +59,18 @@ void arch_setup_new_exec(void);</div><div class='ctx'> </div><div class='ctx'> #define TIF_SIGPENDING		0	/* signal pending */</div><div class='ctx'> #define TIF_NEED_RESCHED	1	/* rescheduling necessary */</div><div class='del'>-#define TIF_NOTIFY_RESUME	2	/* callback before returning to user */</div><div class='del'>-#define TIF_FOREIGN_FPSTATE	3	/* CPU's FP state is not current's */</div><div class='del'>-#define TIF_UPROBE		4	/* uprobe breakpoint or singlestep */</div><div class='del'>-#define TIF_MTE_ASYNC_FAULT	5	/* MTE Asynchronous Tag Check Fault */</div><div class='del'>-#define TIF_NOTIFY_SIGNAL	6	/* signal notifications exist */</div><div class='add'>+#define TIF_NEED_RESCHED_LAZY	2	/* Lazy rescheduling needed */</div><div class='add'>+#define TIF_NOTIFY_RESUME	3	/* callback before returning to user */</div><div class='add'>+#define TIF_FOREIGN_FPSTATE	4	/* CPU's FP state is not current's */</div><div class='add'>+#define TIF_UPROBE		5	/* uprobe breakpoint or singlestep */</div><div class='add'>+#define TIF_MTE_ASYNC_FAULT	6	/* MTE Asynchronous Tag Check Fault */</div><div class='add'>+#define TIF_NOTIFY_SIGNAL	7	/* signal notifications exist */</div><div class='ctx'> #define TIF_SYSCALL_TRACE	8	/* syscall trace active */</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	9	/* syscall auditing */</div><div class='ctx'> #define TIF_SYSCALL_TRACEPOINT	10	/* syscall tracepoint for ftrace */</div><div class='ctx'> #define TIF_SECCOMP		11	/* syscall secure computing */</div><div class='ctx'> #define TIF_SYSCALL_EMU		12	/* syscall emulation active */</div><div class='add'>+#define TIF_PATCH_PENDING	13	/* pending live patching update */</div><div class='ctx'> #define TIF_MEMDIE		18	/* is terminating due to OOM killer */</div><div class='ctx'> #define TIF_FREEZE		19</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	20</div><div class='hunk'>@@ -82,9 +84,12 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define TIF_SME_VL_INHERIT	28	/* Inherit SME vl_onexec across exec */</div><div class='ctx'> #define TIF_KERNEL_FPSTATE	29	/* Task is in a kernel mode FPSIMD section */</div><div class='ctx'> #define TIF_TSC_SIGSEGV		30	/* SIGSEGV on counter-timer access */</div><div class='add'>+#define TIF_LAZY_MMU		31	/* Task in lazy mmu mode */</div><div class='add'>+#define TIF_LAZY_MMU_PENDING	32	/* Ops pending for lazy mmu mode exit */</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SIGPENDING		(1 &lt;&lt; TIF_SIGPENDING)</div><div class='ctx'> #define _TIF_NEED_RESCHED	(1 &lt;&lt; TIF_NEED_RESCHED)</div><div class='add'>+#define _TIF_NEED_RESCHED_LAZY	(1 &lt;&lt; TIF_NEED_RESCHED_LAZY)</div><div class='ctx'> #define _TIF_NOTIFY_RESUME	(1 &lt;&lt; TIF_NOTIFY_RESUME)</div><div class='ctx'> #define _TIF_FOREIGN_FPSTATE	(1 &lt;&lt; TIF_FOREIGN_FPSTATE)</div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1 &lt;&lt; TIF_SYSCALL_TRACE)</div><div class='hunk'>@@ -92,6 +97,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TIF_SYSCALL_TRACEPOINT	(1 &lt;&lt; TIF_SYSCALL_TRACEPOINT)</div><div class='ctx'> #define _TIF_SECCOMP		(1 &lt;&lt; TIF_SECCOMP)</div><div class='ctx'> #define _TIF_SYSCALL_EMU	(1 &lt;&lt; TIF_SYSCALL_EMU)</div><div class='add'>+#define _TIF_PATCH_PENDING	(1 &lt;&lt; TIF_PATCH_PENDING)</div><div class='ctx'> #define _TIF_UPROBE		(1 &lt;&lt; TIF_UPROBE)</div><div class='ctx'> #define _TIF_SINGLESTEP		(1 &lt;&lt; TIF_SINGLESTEP)</div><div class='ctx'> #define _TIF_32BIT		(1 &lt;&lt; TIF_32BIT)</div><div class='hunk'>@@ -100,10 +106,11 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TIF_NOTIFY_SIGNAL	(1 &lt;&lt; TIF_NOTIFY_SIGNAL)</div><div class='ctx'> #define _TIF_TSC_SIGSEGV	(1 &lt;&lt; TIF_TSC_SIGSEGV)</div><div class='ctx'> </div><div class='del'>-#define _TIF_WORK_MASK		(_TIF_NEED_RESCHED | _TIF_SIGPENDING | \</div><div class='add'>+#define _TIF_WORK_MASK		(_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY | \</div><div class='ctx'> 				 _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \</div><div class='ctx'> 				 _TIF_UPROBE | _TIF_MTE_ASYNC_FAULT | \</div><div class='del'>-				 _TIF_NOTIFY_SIGNAL)</div><div class='add'>+				 _TIF_NOTIFY_SIGNAL | _TIF_SIGPENDING | \</div><div class='add'>+				 _TIF_PATCH_PENDING)</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SYSCALL_WORK	(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \</div><div class='ctx'> 				 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \</div><div class='head'>diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h<br/>index a947c6e784ed..8d762607285c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/tlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/tlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/tlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/tlb.h</a></div><div class='hunk'>@@ -9,12 +9,7 @@</div><div class='ctx'> #define __ASM_TLB_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='del'>-#include &lt;linux/swap.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline void __tlb_remove_table(void *_table)</div><div class='del'>-{</div><div class='del'>-	free_page_and_swap_cache((struct page *)_table);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> #define tlb_flush tlb_flush</div><div class='ctx'> static void tlb_flush(struct mmu_gather *tlb);</div><div class='hunk'>@@ -82,7 +77,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdesc *ptdesc = page_ptdesc(pte);</div><div class='ctx'> </div><div class='del'>-	pagetable_pte_dtor(ptdesc);</div><div class='ctx'> 	tlb_remove_ptdesc(tlb, ptdesc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +86,6 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdesc *ptdesc = virt_to_ptdesc(pmdp);</div><div class='ctx'> </div><div class='del'>-	pagetable_pmd_dtor(ptdesc);</div><div class='ctx'> 	tlb_remove_ptdesc(tlb, ptdesc);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -106,7 +99,19 @@ static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,</div><div class='ctx'> 	if (!pgtable_l4_enabled())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pagetable_pud_dtor(ptdesc);</div><div class='add'>+	tlb_remove_ptdesc(tlb, ptdesc);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if CONFIG_PGTABLE_LEVELS &gt; 4</div><div class='add'>+static inline void __p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4dp,</div><div class='add'>+				  unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	struct ptdesc *ptdesc = virt_to_ptdesc(p4dp);</div><div class='add'>+</div><div class='add'>+	if (!pgtable_l5_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	tlb_remove_ptdesc(tlb, ptdesc);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h<br/>index 95fbc8c05607..18a5dc0c9a54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/tlbflush.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/tlbflush.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/tlbflush.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -322,23 +322,6 @@ static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch,</div><div class='del'>-					     struct mm_struct *mm,</div><div class='del'>-					     unsigned long uaddr)</div><div class='del'>-{</div><div class='del'>-	__flush_tlb_page_nosync(mm, uaddr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If mprotect/munmap/etc occurs during TLB batched flushing, we need to</div><div class='del'>- * synchronise all the TLBI issued with a DSB to avoid the race mentioned in</div><div class='del'>- * flush_tlb_batched_pending().</div><div class='del'>- */</div><div class='del'>-static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	dsb(ish);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * To support TLB batched flush for multiple pages unmapping, we only send</div><div class='ctx'>  * the TLBI for each page in arch_tlbbatch_add_pending() and wait for the</div><div class='hunk'>@@ -396,33 +379,35 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)</div><div class='ctx'> #define __flush_tlb_range_op(op, start, pages, stride,			\</div><div class='ctx'> 				asid, tlb_level, tlbi_user, lpa2)	\</div><div class='ctx'> do {									\</div><div class='add'>+	typeof(start) __flush_start = start;				\</div><div class='add'>+	typeof(pages) __flush_pages = pages;				\</div><div class='ctx'> 	int num = 0;							\</div><div class='ctx'> 	int scale = 3;							\</div><div class='ctx'> 	int shift = lpa2 ? 16 : PAGE_SHIFT;				\</div><div class='ctx'> 	unsigned long addr;						\</div><div class='ctx'> 									\</div><div class='del'>-	while (pages &gt; 0) {						\</div><div class='add'>+	while (__flush_pages &gt; 0) {					\</div><div class='ctx'> 		if (!system_supports_tlb_range() ||			\</div><div class='del'>-		    pages == 1 ||					\</div><div class='del'>-		    (lpa2 &amp;&amp; start != ALIGN(start, SZ_64K))) {		\</div><div class='del'>-			addr = __TLBI_VADDR(start, asid);		\</div><div class='add'>+		    __flush_pages == 1 ||				\</div><div class='add'>+		    (lpa2 &amp;&amp; __flush_start != ALIGN(__flush_start, SZ_64K))) {	\</div><div class='add'>+			addr = __TLBI_VADDR(__flush_start, asid);	\</div><div class='ctx'> 			__tlbi_level(op, addr, tlb_level);		\</div><div class='ctx'> 			if (tlbi_user)					\</div><div class='ctx'> 				__tlbi_user_level(op, addr, tlb_level);	\</div><div class='del'>-			start += stride;				\</div><div class='del'>-			pages -= stride &gt;&gt; PAGE_SHIFT;			\</div><div class='add'>+			__flush_start += stride;			\</div><div class='add'>+			__flush_pages -= stride &gt;&gt; PAGE_SHIFT;		\</div><div class='ctx'> 			continue;					\</div><div class='ctx'> 		}							\</div><div class='ctx'> 									\</div><div class='del'>-		num = __TLBI_RANGE_NUM(pages, scale);			\</div><div class='add'>+		num = __TLBI_RANGE_NUM(__flush_pages, scale);		\</div><div class='ctx'> 		if (num &gt;= 0) {						\</div><div class='del'>-			addr = __TLBI_VADDR_RANGE(start &gt;&gt; shift, asid, \</div><div class='add'>+			addr = __TLBI_VADDR_RANGE(__flush_start &gt;&gt; shift, asid, \</div><div class='ctx'> 						scale, num, tlb_level);	\</div><div class='ctx'> 			__tlbi(r##op, addr);				\</div><div class='ctx'> 			if (tlbi_user)					\</div><div class='ctx'> 				__tlbi_user(r##op, addr);		\</div><div class='del'>-			start += __TLBI_RANGE_PAGES(num, scale) &lt;&lt; PAGE_SHIFT; \</div><div class='del'>-			pages -= __TLBI_RANGE_PAGES(num, scale);	\</div><div class='add'>+			__flush_start += __TLBI_RANGE_PAGES(num, scale) &lt;&lt; PAGE_SHIFT; \</div><div class='add'>+			__flush_pages -= __TLBI_RANGE_PAGES(num, scale);\</div><div class='ctx'> 		}							\</div><div class='ctx'> 		scale--;						\</div><div class='ctx'> 	}								\</div><div class='hunk'>@@ -431,7 +416,24 @@ do {									\</div><div class='ctx'> #define __flush_s2_tlb_range_op(op, start, pages, stride, tlb_level) \</div><div class='ctx'> 	__flush_tlb_range_op(op, start, pages, stride, 0, tlb_level, false, kvm_lpa2_is_enabled());</div><div class='ctx'> </div><div class='del'>-static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma,</div><div class='add'>+static inline bool __flush_tlb_range_limit_excess(unsigned long start,</div><div class='add'>+		unsigned long end, unsigned long pages, unsigned long stride)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * When the system does not support TLB range based flush</div><div class='add'>+	 * operation, (MAX_DVM_OPS - 1) pages can be handled. But</div><div class='add'>+	 * with TLB range based operation, MAX_TLBI_RANGE_PAGES</div><div class='add'>+	 * pages can be handled.</div><div class='add'>+	 */</div><div class='add'>+	if ((!system_supports_tlb_range() &amp;&amp;</div><div class='add'>+	     (end - start) &gt;= (MAX_DVM_OPS * stride)) ||</div><div class='add'>+	    pages &gt; MAX_TLBI_RANGE_PAGES)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __flush_tlb_range_nosync(struct mm_struct *mm,</div><div class='ctx'> 				     unsigned long start, unsigned long end,</div><div class='ctx'> 				     unsigned long stride, bool last_level,</div><div class='ctx'> 				     int tlb_level)</div><div class='hunk'>@@ -442,21 +444,13 @@ static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma,</div><div class='ctx'> 	end = round_up(end, stride);</div><div class='ctx'> 	pages = (end - start) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * When not uses TLB range ops, we can handle up to</div><div class='del'>-	 * (MAX_DVM_OPS - 1) pages;</div><div class='del'>-	 * When uses TLB range ops, we can handle up to</div><div class='del'>-	 * MAX_TLBI_RANGE_PAGES pages.</div><div class='del'>-	 */</div><div class='del'>-	if ((!system_supports_tlb_range() &amp;&amp;</div><div class='del'>-	     (end - start) &gt;= (MAX_DVM_OPS * stride)) ||</div><div class='del'>-	    pages &gt; MAX_TLBI_RANGE_PAGES) {</div><div class='del'>-		flush_tlb_mm(vma-&gt;vm_mm);</div><div class='add'>+	if (__flush_tlb_range_limit_excess(start, end, pages, stride)) {</div><div class='add'>+		flush_tlb_mm(mm);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	asid = ASID(vma-&gt;vm_mm);</div><div class='add'>+	asid = ASID(mm);</div><div class='ctx'> </div><div class='ctx'> 	if (last_level)</div><div class='ctx'> 		__flush_tlb_range_op(vale1is, start, pages, stride, asid,</div><div class='hunk'>@@ -465,7 +459,7 @@ static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma,</div><div class='ctx'> 		__flush_tlb_range_op(vae1is, start, pages, stride, asid,</div><div class='ctx'> 				     tlb_level, true, lpa2_is_enabled());</div><div class='ctx'> </div><div class='del'>-	mmu_notifier_arch_invalidate_secondary_tlbs(vma-&gt;vm_mm, start, end);</div><div class='add'>+	mmu_notifier_arch_invalidate_secondary_tlbs(mm, start, end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __flush_tlb_range(struct vm_area_struct *vma,</div><div class='hunk'>@@ -473,7 +467,7 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,</div><div class='ctx'> 				     unsigned long stride, bool last_level,</div><div class='ctx'> 				     int tlb_level)</div><div class='ctx'> {</div><div class='del'>-	__flush_tlb_range_nosync(vma, start, end, stride,</div><div class='add'>+	__flush_tlb_range_nosync(vma-&gt;vm_mm, start, end, stride,</div><div class='ctx'> 				 last_level, tlb_level);</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> }</div><div class='hunk'>@@ -492,19 +486,21 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	unsigned long addr;</div><div class='add'>+	const unsigned long stride = PAGE_SIZE;</div><div class='add'>+	unsigned long pages;</div><div class='add'>+</div><div class='add'>+	start = round_down(start, stride);</div><div class='add'>+	end = round_up(end, stride);</div><div class='add'>+	pages = (end - start) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	if ((end - start) &gt; (MAX_DVM_OPS * PAGE_SIZE)) {</div><div class='add'>+	if (__flush_tlb_range_limit_excess(start, end, pages, stride)) {</div><div class='ctx'> 		flush_tlb_all();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	start = __TLBI_VADDR(start, 0);</div><div class='del'>-	end = __TLBI_VADDR(end, 0);</div><div class='del'>-</div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	for (addr = start; addr &lt; end; addr += 1 &lt;&lt; (PAGE_SHIFT - 12))</div><div class='del'>-		__tlbi(vaale1is, addr);</div><div class='add'>+	__flush_tlb_range_op(vaale1is, start, pages, stride, 0,</div><div class='add'>+			     TLBI_TTL_UNKNOWN, false, lpa2_is_enabled());</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='hunk'>@@ -522,6 +518,12 @@ static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr)</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch,</div><div class='add'>+		struct mm_struct *mm, unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	__flush_tlb_range_nosync(mm, start, end, PAGE_SIZE, true, 3);</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h<br/>index 5fc3af9f8f29..341174bf9106 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/topology.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/topology.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/topology.h</a></div><div class='hunk'>@@ -26,10 +26,6 @@ void update_freq_counters_refs(void);</div><div class='ctx'> #define arch_scale_freq_invariant topology_scale_freq_invariant</div><div class='ctx'> #define arch_scale_freq_ref topology_get_freq_ref</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ACPI_CPPC_LIB</div><div class='del'>-#define arch_init_invariance_cppc topology_init_cpu_capacity_cppc</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Replace task scheduler's default cpu-invariant accounting */</div><div class='ctx'> #define arch_scale_cpu_capacity topology_get_cpu_scale</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/traps.h b/arch/arm64/include/asm/traps.h<br/>index d780d1bd2eac..e92e4a0e48fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/traps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/traps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/traps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/traps.h</a></div><div class='hunk'>@@ -29,7 +29,14 @@ void arm64_force_sig_fault_pkey(unsigned long far, const char *str, int pkey);</div><div class='ctx'> void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str);</div><div class='ctx'> void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far, const char *str);</div><div class='ctx'> </div><div class='add'>+int bug_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+int cfi_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+int reserved_fault_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+int kasan_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+int ubsan_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+</div><div class='ctx'> int early_brk64(unsigned long addr, unsigned long esr, struct pt_regs *regs);</div><div class='add'>+void dump_kernel_instr(unsigned long kaddr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Move regs-&gt;pc to next instruction and do necessary setup before it</div><div class='hunk'>@@ -109,10 +116,9 @@ static inline void arm64_mops_reset_regs(struct user_pt_regs *regs, unsigned lon</div><div class='ctx'> 	int dstreg = ESR_ELx_MOPS_ISS_DESTREG(esr);</div><div class='ctx'> 	int srcreg = ESR_ELx_MOPS_ISS_SRCREG(esr);</div><div class='ctx'> 	int sizereg = ESR_ELx_MOPS_ISS_SIZEREG(esr);</div><div class='del'>-	unsigned long dst, src, size;</div><div class='add'>+	unsigned long dst, size;</div><div class='ctx'> </div><div class='ctx'> 	dst = regs-&gt;regs[dstreg];</div><div class='del'>-	src = regs-&gt;regs[srcreg];</div><div class='ctx'> 	size = regs-&gt;regs[sizereg];</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -129,6 +135,7 @@ static inline void arm64_mops_reset_regs(struct user_pt_regs *regs, unsigned lon</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* CPY* instruction */</div><div class='add'>+		unsigned long src = regs-&gt;regs[srcreg];</div><div class='ctx'> 		if (!(option_a ^ wrong_option)) {</div><div class='ctx'> 			/* Format is from Option B */</div><div class='ctx'> 			if (regs-&gt;pstate &amp; PSR_N_BIT) {</div><div class='head'>diff --git a/arch/arm64/include/asm/uprobes.h b/arch/arm64/include/asm/uprobes.h<br/>index 2b09495499c6..89bfb0213a50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/uprobes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/uprobes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/uprobes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/uprobes.h</a></div><div class='hunk'>@@ -10,11 +10,9 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/probes.h&gt;</div><div class='ctx'> </div><div class='del'>-#define MAX_UINSN_BYTES		AARCH64_INSN_SIZE</div><div class='del'>-</div><div class='ctx'> #define UPROBE_SWBP_INSN	cpu_to_le32(BRK64_OPCODE_UPROBES)</div><div class='ctx'> #define UPROBE_SWBP_INSN_SIZE	AARCH64_INSN_SIZE</div><div class='del'>-#define UPROBE_XOL_SLOT_BYTES	MAX_UINSN_BYTES</div><div class='add'>+#define UPROBE_XOL_SLOT_BYTES	AARCH64_INSN_SIZE</div><div class='ctx'> </div><div class='ctx'> typedef __le32 uprobe_opcode_t;</div><div class='ctx'> </div><div class='hunk'>@@ -23,11 +21,22 @@ struct arch_uprobe_task {</div><div class='ctx'> </div><div class='ctx'> struct arch_uprobe {</div><div class='ctx'> 	union {</div><div class='del'>-		u8 insn[MAX_UINSN_BYTES];</div><div class='del'>-		u8 ixol[MAX_UINSN_BYTES];</div><div class='add'>+		__le32 insn;</div><div class='add'>+		__le32 ixol;</div><div class='ctx'> 	};</div><div class='ctx'> 	struct arch_probe_insn api;</div><div class='ctx'> 	bool simulate;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+int uprobe_brk_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+#ifdef CONFIG_UPROBES</div><div class='add'>+int uprobe_single_step_handler(struct pt_regs *regs, unsigned long esr);</div><div class='add'>+#else</div><div class='add'>+static inline int uprobe_single_step_handler(struct pt_regs *regs,</div><div class='add'>+	unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	return DBG_HOOK_ERROR;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso.h b/arch/arm64/include/asm/vdso.h<br/>index 4305995c8f82..61679070f595 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso.h</a></div><div class='hunk'>@@ -5,14 +5,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_H</div><div class='ctx'> #define __ASM_VDSO_H</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Default link address for the vDSO.</div><div class='del'>- * Since we randomise the VDSO mapping, there's little point in trying</div><div class='del'>- * to prelink this.</div><div class='del'>- */</div><div class='del'>-#define VDSO_LBASE	0x0</div><div class='del'>-</div><div class='del'>-#define __VVAR_PAGES    2</div><div class='add'>+#define __VDSO_PAGES    4</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VDSO_SYMBOL(base, name)						   \</div><div class='ctx'> ({									   \</div><div class='del'>-	(void *)(vdso_offset_##name - VDSO_LBASE + (unsigned long)(base)); \</div><div class='add'>+	(void *)(vdso_offset_##name + (unsigned long)(base)); \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> extern char vdso_start[], vdso_end[];</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/compat_barrier.h b/arch/arm64/include/asm/vdso/compat_barrier.h<br/>index 3ac35f4a667c..6d75e03d3827 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/compat_barrier.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/compat_barrier.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/compat_barrier.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso/compat_barrier.h</a></div><div class='hunk'>@@ -7,11 +7,10 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> /*</div><div class='del'>- * Warning: This code is meant to be used with</div><div class='del'>- * ENABLE_COMPAT_VDSO only.</div><div class='add'>+ * Warning: This code is meant to be used from the compat vDSO only.</div><div class='ctx'>  */</div><div class='del'>-#ifndef ENABLE_COMPAT_VDSO</div><div class='del'>-#error This header is meant to be used with ENABLE_COMPAT_VDSO only</div><div class='add'>+#ifdef __arch64__</div><div class='add'>+#error This header is meant to be used with from the compat vDSO only</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef dmb</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/compat_gettimeofday.h b/arch/arm64/include/asm/vdso/compat_gettimeofday.h<br/>index 778c1202bbbf..7d1a116549b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/compat_gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/compat_gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/compat_gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso/compat_gettimeofday.h</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2018 ARM Limited</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_VDSO_GETTIMEOFDAY_H</div><div class='del'>-#define __ASM_VDSO_GETTIMEOFDAY_H</div><div class='add'>+#ifndef __ASM_VDSO_COMPAT_GETTIMEOFDAY_H</div><div class='add'>+#define __ASM_VDSO_COMPAT_GETTIMEOFDAY_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -104,7 +104,7 @@ int clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	u64 res;</div><div class='ctx'> </div><div class='hunk'>@@ -131,48 +131,36 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='add'>+static __always_inline const struct vdso_time_data *__arch_get_vdso_u_time_data(void)</div><div class='ctx'> {</div><div class='del'>-	const struct vdso_data *ret;</div><div class='add'>+	const struct vdso_time_data *ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * This simply puts &amp;_vdso_data into ret. The reason why we don't use</div><div class='del'>-	 * `ret = _vdso_data` is that the compiler tends to optimise this in a</div><div class='del'>-	 * very suboptimal way: instead of keeping &amp;_vdso_data in a register,</div><div class='del'>-	 * it goes through a relocation almost every time _vdso_data must be</div><div class='add'>+	 * This simply puts &amp;_vdso_time_data into ret. The reason why we don't use</div><div class='add'>+	 * `ret = _vdso_time_data` is that the compiler tends to optimise this in a</div><div class='add'>+	 * very suboptimal way: instead of keeping &amp;_vdso_time_data in a register,</div><div class='add'>+	 * it goes through a relocation almost every time _vdso_time_data must be</div><div class='ctx'> 	 * accessed (even in subfunctions). This is both time and space</div><div class='ctx'> 	 * consuming: each relocation uses a word in the code section, and it</div><div class='ctx'> 	 * has to be loaded at runtime.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This trick hides the assignment from the compiler. Since it cannot</div><div class='ctx'> 	 * track where the pointer comes from, it will only use one relocation</div><div class='del'>-	 * where __arch_get_vdso_data() is called, and then keep the result in</div><div class='del'>-	 * a register.</div><div class='add'>+	 * where __aarch64_get_vdso_u_time_data() is called, and then keep the</div><div class='add'>+	 * result in a register.</div><div class='ctx'> 	 */</div><div class='del'>-	asm volatile("mov %0, %1" : "=r"(ret) : "r"(_vdso_data));</div><div class='add'>+	asm volatile("mov %0, %1" : "=r"(ret) : "r"(&amp;vdso_u_time_data));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+#define __arch_get_vdso_u_time_data __arch_get_vdso_u_time_data</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-static __always_inline</div><div class='del'>-const struct vdso_data *__arch_get_timens_vdso_data(const struct vdso_data *vd)</div><div class='del'>-{</div><div class='del'>-	const struct vdso_data *ret;</div><div class='del'>-</div><div class='del'>-	/* See __arch_get_vdso_data(). */</div><div class='del'>-	asm volatile("mov %0, %1" : "=r"(ret) : "r"(_timens_data));</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline bool vdso_clocksource_ok(const struct vdso_data *vd)</div><div class='add'>+static inline bool vdso_clocksource_ok(const struct vdso_clock *vc)</div><div class='ctx'> {</div><div class='del'>-	return vd-&gt;clock_mode == VDSO_CLOCKMODE_ARCHTIMER;</div><div class='add'>+	return vc-&gt;clock_mode == VDSO_CLOCKMODE_ARCHTIMER;</div><div class='ctx'> }</div><div class='ctx'> #define vdso_clocksource_ok	vdso_clocksource_ok</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_VDSO_GETTIMEOFDAY_H */</div><div class='add'>+#endif /* __ASM_VDSO_COMPAT_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/getrandom.h b/arch/arm64/include/asm/vdso/getrandom.h<br/>index 342f807e2044..a2197da1951b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/getrandom.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/getrandom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/getrandom.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso/getrandom.h</a></div><div class='hunk'>@@ -33,18 +33,6 @@ static __always_inline ssize_t getrandom_syscall(void *_buffer, size_t _len, uns</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_rng_data *__arch_get_vdso_rng_data(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * The RNG data is in the real VVAR data page, but if a task belongs to a time namespace</div><div class='del'>-	 * then VVAR_DATA_PAGE_OFFSET points to the namespace-specific VVAR page and VVAR_TIMENS_</div><div class='del'>-	 * PAGE_OFFSET points to the real VVAR page.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_TIME_NS) &amp;&amp; _vdso_data-&gt;clock_mode == VDSO_CLOCKMODE_TIMENS)</div><div class='del'>-		return (void *)&amp;_vdso_rng_data + VVAR_TIMENS_PAGE_OFFSET * (1UL &lt;&lt; CONFIG_PAGE_SHIFT);</div><div class='del'>-	return &amp;_vdso_rng_data;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_GETRANDOM_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/gettimeofday.h b/arch/arm64/include/asm/vdso/gettimeofday.h<br/>index 764d13e2916c..c59e84105b43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -5,9 +5,12 @@</div><div class='ctx'> #ifndef __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> #define __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> </div><div class='add'>+#ifdef __aarch64__</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='add'>+#include &lt;asm/arch_timer.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='hunk'>@@ -67,10 +70,8 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='del'>-	u64 res;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Core checks for mode already, so this raced against a concurrent</div><div class='ctx'> 	 * update. Return something. Core will do another round and then</div><div class='hunk'>@@ -79,40 +80,28 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='ctx'> 	if (clock_mode == VDSO_CLOCKMODE_NONE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If FEAT_ECV is available, use the self-synchronizing counter.</div><div class='del'>-	 * Otherwise the isb is required to prevent that the counter value</div><div class='del'>-	 * is speculated.</div><div class='del'>-	*/</div><div class='del'>-	asm volatile(</div><div class='del'>-	ALTERNATIVE("isb\n"</div><div class='del'>-		    "mrs %0, cntvct_el0",</div><div class='del'>-		    "nop\n"</div><div class='del'>-		    __mrs_s("%0", SYS_CNTVCTSS_EL0),</div><div class='del'>-		    ARM64_HAS_ECV)</div><div class='del'>-	: "=r" (res)</div><div class='del'>-	:</div><div class='del'>-	: "memory");</div><div class='del'>-</div><div class='del'>-	arch_counter_enforce_ordering(res);</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='add'>+	return __arch_counter_get_cntvct();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline</div><div class='del'>-const struct vdso_data *__arch_get_vdso_data(void)</div><div class='add'>+#if IS_ENABLED(CONFIG_CC_IS_GCC) &amp;&amp; IS_ENABLED(CONFIG_PAGE_SIZE_64KB)</div><div class='add'>+static __always_inline const struct vdso_time_data *__arch_get_vdso_u_time_data(void)</div><div class='ctx'> {</div><div class='del'>-	return _vdso_data;</div><div class='del'>-}</div><div class='add'>+	const struct vdso_time_data *ret = &amp;vdso_u_time_data;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-static __always_inline</div><div class='del'>-const struct vdso_data *__arch_get_timens_vdso_data(const struct vdso_data *vd)</div><div class='del'>-{</div><div class='del'>-	return _timens_data;</div><div class='add'>+	/* Work around invalid absolute relocations */</div><div class='add'>+	OPTIMIZER_HIDE_VAR(ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='add'>+#define __arch_get_vdso_u_time_data __arch_get_vdso_u_time_data</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_CC_IS_GCC) &amp;&amp; IS_ENABLED(CONFIG_PAGE_SIZE_64KB) */</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='add'>+#else /* !__aarch64__ */</div><div class='add'>+</div><div class='add'>+#include "compat_gettimeofday.h"</div><div class='add'>+</div><div class='add'>+#endif /* __aarch64__ */</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_VDSO_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/vsyscall.h b/arch/arm64/include/asm/vdso/vsyscall.h<br/>index 5b6d0dd3cef5..417aae5763a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vdso/vsyscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vdso/vsyscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vdso/vsyscall.h</a></div><div class='hunk'>@@ -2,47 +2,22 @@</div><div class='ctx'> #ifndef __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> #define __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> </div><div class='del'>-#define __VDSO_RND_DATA_OFFSET  480</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='del'>-enum vvar_pages {</div><div class='del'>-	VVAR_DATA_PAGE_OFFSET,</div><div class='del'>-	VVAR_TIMENS_PAGE_OFFSET,</div><div class='del'>-	VVAR_NR_PAGES,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define VDSO_PRECISION_MASK	~(0xFF00ULL&lt;&lt;48)</div><div class='ctx'> </div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Update the vDSO data page to keep in sync with kernel timekeeping.</div><div class='ctx'>  */</div><div class='ctx'> static __always_inline</div><div class='del'>-struct vdso_data *__arm64_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __arm64_get_k_vdso_data</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_rng_data *__arm64_get_k_vdso_rnd_data(void)</div><div class='del'>-{</div><div class='del'>-	return (void *)vdso_data + __VDSO_RND_DATA_OFFSET;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_rng_data __arm64_get_k_vdso_rnd_data</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-void __arm64_update_vsyscall(struct vdso_data *vdata, struct timekeeper *tk)</div><div class='add'>+void __arch_update_vdso_clock(struct vdso_clock *vc)</div><div class='ctx'> {</div><div class='del'>-	vdata[CS_HRES_COARSE].mask	= VDSO_PRECISION_MASK;</div><div class='del'>-	vdata[CS_RAW].mask		= VDSO_PRECISION_MASK;</div><div class='add'>+	vc-&gt;mask	= VDSO_PRECISION_MASK;</div><div class='ctx'> }</div><div class='del'>-#define __arch_update_vsyscall __arm64_update_vsyscall</div><div class='add'>+#define __arch_update_vdso_clock __arch_update_vdso_clock</div><div class='ctx'> </div><div class='ctx'> /* The asm-generic header needs to be included after the definitions above */</div><div class='ctx'> #include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='head'>diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h<br/>index ebf4a9f943ed..aa280f356b96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/virt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/virt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/virt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/virt.h</a></div><div class='hunk'>@@ -67,7 +67,8 @@</div><div class='ctx'>  * __boot_cpu_mode records what mode CPUs were booted in.</div><div class='ctx'>  * A correctly-implemented bootloader must start all CPUs in the same mode:</div><div class='ctx'>  * In this case, both 32bit halves of __boot_cpu_mode will contain the</div><div class='del'>- * same value (either 0 if booted in EL1, BOOT_CPU_MODE_EL2 if booted in EL2).</div><div class='add'>+ * same value (either BOOT_CPU_MODE_EL1 if booted in EL1, BOOT_CPU_MODE_EL2 if</div><div class='add'>+ * booted in EL2).</div><div class='ctx'>  *</div><div class='ctx'>  * Should the bootloader fail to do this, the two values will be different.</div><div class='ctx'>  * This allows the kernel to flag an error when the secondaries have come up.</div><div class='head'>diff --git a/arch/arm64/include/asm/vmalloc.h b/arch/arm64/include/asm/vmalloc.h<br/>index 38fafffe699f..4ec1acd3c1b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vmalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vmalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vmalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vmalloc.h</a></div><div class='hunk'>@@ -9,18 +9,58 @@</div><div class='ctx'> #define arch_vmap_pud_supported arch_vmap_pud_supported</div><div class='ctx'> static inline bool arch_vmap_pud_supported(pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * SW table walks can't handle removal of intermediate entries.</div><div class='del'>-	 */</div><div class='del'>-	return pud_sect_supported() &amp;&amp;</div><div class='del'>-	       !IS_ENABLED(CONFIG_PTDUMP_DEBUGFS);</div><div class='add'>+	return pud_sect_supported();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define arch_vmap_pmd_supported arch_vmap_pmd_supported</div><div class='ctx'> static inline bool arch_vmap_pmd_supported(pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	/* See arch_vmap_pud_supported() */</div><div class='del'>-	return !IS_ENABLED(CONFIG_PTDUMP_DEBUGFS);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_vmap_pte_range_map_size arch_vmap_pte_range_map_size</div><div class='add'>+static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,</div><div class='add'>+						unsigned long end, u64 pfn,</div><div class='add'>+						unsigned int max_page_shift)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If the block is at least CONT_PTE_SIZE in size, and is naturally</div><div class='add'>+	 * aligned in both virtual and physical space, then we can pte-map the</div><div class='add'>+	 * block using the PTE_CONT bit for more efficient use of the TLB.</div><div class='add'>+	 */</div><div class='add'>+	if (max_page_shift &lt; CONT_PTE_SHIFT)</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (end - addr &lt; CONT_PTE_SIZE)</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(addr, CONT_PTE_SIZE))</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(PFN_PHYS(pfn), CONT_PTE_SIZE))</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	return CONT_PTE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_vmap_pte_range_unmap_size arch_vmap_pte_range_unmap_size</div><div class='add'>+static inline unsigned long arch_vmap_pte_range_unmap_size(unsigned long addr,</div><div class='add'>+							   pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The caller handles alignment so it's sufficient just to check</div><div class='add'>+	 * PTE_CONT.</div><div class='add'>+	 */</div><div class='add'>+	return pte_valid_cont(__ptep_get(ptep)) ? CONT_PTE_SIZE : PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_vmap_pte_supported_shift arch_vmap_pte_supported_shift</div><div class='add'>+static inline int arch_vmap_pte_supported_shift(unsigned long size)</div><div class='add'>+{</div><div class='add'>+	if (size &gt;= CONT_PTE_SIZE)</div><div class='add'>+		return CONT_PTE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return PAGE_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm/vncr_mapping.h<br/>index 06f8ec0906a6..c2485a862e69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vncr_mapping.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/vncr_mapping.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/vncr_mapping.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/vncr_mapping.h</a></div><div class='hunk'>@@ -35,6 +35,8 @@</div><div class='ctx'> #define VNCR_CNTP_CTL_EL0       0x180</div><div class='ctx'> #define VNCR_SCXTNUM_EL1        0x188</div><div class='ctx'> #define VNCR_TFSR_EL1		0x190</div><div class='add'>+#define VNCR_HDFGRTR2_EL2	0x1A0</div><div class='add'>+#define VNCR_HDFGWTR2_EL2	0x1B0</div><div class='ctx'> #define VNCR_HFGRTR_EL2		0x1B8</div><div class='ctx'> #define VNCR_HFGWTR_EL2		0x1C0</div><div class='ctx'> #define VNCR_HFGITR_EL2		0x1C8</div><div class='hunk'>@@ -49,10 +51,13 @@</div><div class='ctx'> #define VNCR_SP_EL1             0x240</div><div class='ctx'> #define VNCR_VBAR_EL1           0x250</div><div class='ctx'> #define VNCR_TCR2_EL1		0x270</div><div class='add'>+#define VNCR_SCTLR2_EL1		0x278</div><div class='ctx'> #define VNCR_PIRE0_EL1		0x290</div><div class='del'>-#define VNCR_PIRE0_EL2		0x298</div><div class='ctx'> #define VNCR_PIR_EL1		0x2A0</div><div class='ctx'> #define VNCR_POR_EL1		0x2A8</div><div class='add'>+#define VNCR_HFGRTR2_EL2	0x2C0</div><div class='add'>+#define VNCR_HFGWTR2_EL2	0x2C8</div><div class='add'>+#define VNCR_HFGITR2_EL2	0x310</div><div class='ctx'> #define VNCR_ICH_LR0_EL2        0x400</div><div class='ctx'> #define VNCR_ICH_LR1_EL2        0x408</div><div class='ctx'> #define VNCR_ICH_LR2_EL2        0x410</div><div class='hunk'>@@ -80,6 +85,7 @@</div><div class='ctx'> #define VNCR_ICH_HCR_EL2        0x4C0</div><div class='ctx'> #define VNCR_ICH_VMCR_EL2       0x4C8</div><div class='ctx'> #define VNCR_VDISR_EL2          0x500</div><div class='add'>+#define VNCR_VSESR_EL2		0x508</div><div class='ctx'> #define VNCR_PMBLIMITR_EL1      0x800</div><div class='ctx'> #define VNCR_PMBPTR_EL1         0x810</div><div class='ctx'> #define VNCR_PMBSR_EL1          0x820</div><div class='hunk'>@@ -88,6 +94,8 @@</div><div class='ctx'> #define VNCR_PMSICR_EL1         0x838</div><div class='ctx'> #define VNCR_PMSIRR_EL1         0x840</div><div class='ctx'> #define VNCR_PMSLATFR_EL1       0x848</div><div class='add'>+#define VNCR_PMSNEVFR_EL1       0x850</div><div class='add'>+#define VNCR_PMSDSFR_EL1        0x858</div><div class='ctx'> #define VNCR_TRFCR_EL1          0x880</div><div class='ctx'> #define VNCR_MPAM1_EL1          0x900</div><div class='ctx'> #define VNCR_MPAMHCR_EL2        0x930</div><div class='head'>diff --git a/arch/arm64/include/asm/xen/events.h b/arch/arm64/include/asm/xen/events.h<br/>index 2788e95d0ff0..2977b5fe068d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/xen/events.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/asm/xen/events.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/asm/xen/events.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/asm/xen/events.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@ enum ipi_vector {</div><div class='ctx'> </div><div class='ctx'> static inline int xen_irqs_disabled(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	return !interrupts_enabled(regs);</div><div class='add'>+	return regs_irqs_disabled(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define xchg_xen_ulong(ptr, val) xchg((ptr), (val))</div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/bitsperlong.h b/arch/arm64/include/uapi/asm/bitsperlong.h<br/>index 485d60bee26c..d59730975f30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/bitsperlong.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/bitsperlong.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/bitsperlong.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/uapi/asm/bitsperlong.h</a></div><div class='hunk'>@@ -17,7 +17,12 @@</div><div class='ctx'> #ifndef __ASM_BITSPERLONG_H</div><div class='ctx'> #define __ASM_BITSPERLONG_H</div><div class='ctx'> </div><div class='add'>+#if defined(__KERNEL__) &amp;&amp; !defined(__aarch64__)</div><div class='add'>+/* Used by the compat vDSO */</div><div class='add'>+#define __BITS_PER_LONG 32</div><div class='add'>+#else</div><div class='ctx'> #define __BITS_PER_LONG 64</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bitsperlong.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h<br/>index 055381b2c615..575564ecdb0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/hwcap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/hwcap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/hwcap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/uapi/asm/hwcap.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'>  * HWCAP flags - for AT_HWCAP</div><div class='ctx'>  *</div><div class='ctx'>  * Bits 62 and 63 are reserved for use by libc.</div><div class='del'>- * Bits 32-61 are unallocated for potential use by libc.</div><div class='add'>+ * Bits 33-61 are unallocated for potential use by libc.</div><div class='ctx'>  */</div><div class='ctx'> #define HWCAP_FP		(1 &lt;&lt; 0)</div><div class='ctx'> #define HWCAP_ASIMD		(1 &lt;&lt; 1)</div><div class='hunk'>@@ -55,6 +55,22 @@</div><div class='ctx'> #define HWCAP_SB		(1 &lt;&lt; 29)</div><div class='ctx'> #define HWCAP_PACA		(1 &lt;&lt; 30)</div><div class='ctx'> #define HWCAP_PACG		(1UL &lt;&lt; 31)</div><div class='add'>+#define HWCAP_GCS		(1UL &lt;&lt; 32)</div><div class='add'>+#define HWCAP_CMPBR		(1UL &lt;&lt; 33)</div><div class='add'>+#define HWCAP_FPRCVT		(1UL &lt;&lt; 34)</div><div class='add'>+#define HWCAP_F8MM8		(1UL &lt;&lt; 35)</div><div class='add'>+#define HWCAP_F8MM4		(1UL &lt;&lt; 36)</div><div class='add'>+#define HWCAP_SVE_F16MM		(1UL &lt;&lt; 37)</div><div class='add'>+#define HWCAP_SVE_ELTPERM	(1UL &lt;&lt; 38)</div><div class='add'>+#define HWCAP_SVE_AES2		(1UL &lt;&lt; 39)</div><div class='add'>+#define HWCAP_SVE_BFSCALE	(1UL &lt;&lt; 40)</div><div class='add'>+#define HWCAP_SVE2P2		(1UL &lt;&lt; 41)</div><div class='add'>+#define HWCAP_SME2P2		(1UL &lt;&lt; 42)</div><div class='add'>+#define HWCAP_SME_SBITPERM	(1UL &lt;&lt; 43)</div><div class='add'>+#define HWCAP_SME_AES		(1UL &lt;&lt; 44)</div><div class='add'>+#define HWCAP_SME_SFEXPA	(1UL &lt;&lt; 45)</div><div class='add'>+#define HWCAP_SME_STMOP		(1UL &lt;&lt; 46)</div><div class='add'>+#define HWCAP_SME_SMOP4		(1UL &lt;&lt; 47)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * HWCAP2 flags - for AT_HWCAP2</div><div class='hunk'>@@ -124,4 +140,11 @@</div><div class='ctx'> #define HWCAP2_SME_SF8DP2	(1UL &lt;&lt; 62)</div><div class='ctx'> #define HWCAP2_POE		(1UL &lt;&lt; 63)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * HWCAP3 flags - for AT_HWCAP3</div><div class='add'>+ */</div><div class='add'>+#define HWCAP3_MTE_FAR		(1UL &lt;&lt; 0)</div><div class='add'>+#define HWCAP3_MTE_STORE_ONLY		(1UL &lt;&lt; 1)</div><div class='add'>+#define HWCAP3_LSFE		(1UL &lt;&lt; 2)</div><div class='add'>+</div><div class='ctx'> #endif /* _UAPI__ASM_HWCAP_H */</div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h<br/>index 964df31da975..ed5f3892674c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/kvm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/kvm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -43,9 +43,6 @@</div><div class='ctx'> #define KVM_COALESCED_MMIO_PAGE_OFFSET 1</div><div class='ctx'> #define KVM_DIRTY_LOG_PAGE_OFFSET 64</div><div class='ctx'> </div><div class='del'>-#define KVM_REG_SIZE(id)						\</div><div class='del'>-	(1U &lt;&lt; (((id) &amp; KVM_REG_SIZE_MASK) &gt;&gt; KVM_REG_SIZE_SHIFT))</div><div class='del'>-</div><div class='ctx'> struct kvm_regs {</div><div class='ctx'> 	struct user_pt_regs regs;	/* sp = sp_el0 */</div><div class='ctx'> </div><div class='hunk'>@@ -108,6 +105,7 @@ struct kvm_regs {</div><div class='ctx'> #define KVM_ARM_VCPU_PTRAUTH_ADDRESS	5 /* VCPU uses address authentication */</div><div class='ctx'> #define KVM_ARM_VCPU_PTRAUTH_GENERIC	6 /* VCPU uses generic authentication */</div><div class='ctx'> #define KVM_ARM_VCPU_HAS_EL2		7 /* Support nested virtualization */</div><div class='add'>+#define KVM_ARM_VCPU_HAS_EL2_E2H0	8 /* Limit NV support to E2H RES0 */</div><div class='ctx'> </div><div class='ctx'> struct kvm_vcpu_init {</div><div class='ctx'> 	__u32 target;</div><div class='hunk'>@@ -374,6 +372,7 @@ enum {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Vendor hyper call function numbers 0-63 */</div><div class='ctx'> #define KVM_REG_ARM_VENDOR_HYP_BMAP		KVM_REG_ARM_FW_FEAT_BMAP_REG(2)</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -384,6 +383,17 @@ enum {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Vendor hyper call function numbers 64-127 */</div><div class='add'>+#define KVM_REG_ARM_VENDOR_HYP_BMAP_2		KVM_REG_ARM_FW_FEAT_BMAP_REG(3)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_VER	= 0,</div><div class='add'>+	KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_CPUS	= 1,</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+	KVM_REG_ARM_VENDOR_HYP_BMAP_2_BIT_COUNT,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Device Control API on vm fd */</div><div class='ctx'> #define KVM_ARM_VM_SMCCC_CTRL		0</div><div class='ctx'> #define   KVM_ARM_VM_SMCCC_FILTER	0</div><div class='hunk'>@@ -406,6 +416,7 @@ enum {</div><div class='ctx'> #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6</div><div class='ctx'> #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO  7</div><div class='ctx'> #define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8</div><div class='add'>+#define KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ  9</div><div class='ctx'> #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT	10</div><div class='ctx'> #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \</div><div class='ctx'> 			(0x3fffffULL &lt;&lt; KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)</div><div class='hunk'>@@ -420,10 +431,11 @@ enum {</div><div class='ctx'> </div><div class='ctx'> /* Device Control API on vcpu fd */</div><div class='ctx'> #define KVM_ARM_VCPU_PMU_V3_CTRL	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_IRQ	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_INIT	1</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_FILTER	2</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_SET_PMU	3</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_IRQ		0</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_INIT		1</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_FILTER		2</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_SET_PMU		3</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS	4</div><div class='ctx'> #define KVM_ARM_VCPU_TIMER_CTRL		1</div><div class='ctx'> #define   KVM_ARM_VCPU_TIMER_IRQ_VTIMER		0</div><div class='ctx'> #define   KVM_ARM_VCPU_TIMER_IRQ_PTIMER		1</div><div class='hunk'>@@ -484,6 +496,12 @@ enum {</div><div class='ctx'>  */</div><div class='ctx'> #define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2	(1ULL &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Shutdown caused by a PSCI v1.3 SYSTEM_OFF2 call.</div><div class='add'>+ * Valid only when the system event has a type of KVM_SYSTEM_EVENT_SHUTDOWN.</div><div class='add'>+ */</div><div class='add'>+#define KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2	(1ULL &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> /* run-&gt;fail_entry.hardware_entry_failure_reason codes. */</div><div class='ctx'> #define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED	(1ULL &lt;&lt; 0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h<br/>index 7fa2f7036aa7..0f39ba4f3efd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -324,6 +324,14 @@ struct user_za_header {</div><div class='ctx'> #define ZA_PT_SIZE(vq)						\</div><div class='ctx'> 	(ZA_PT_ZA_OFFSET + ZA_PT_ZA_SIZE(vq))</div><div class='ctx'> </div><div class='add'>+/* GCS state (NT_ARM_GCS) */</div><div class='add'>+</div><div class='add'>+struct user_gcs {</div><div class='add'>+	__u64 features_enabled;</div><div class='add'>+	__u64 features_locked;</div><div class='add'>+	__u64 gcspr_el0;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI__ASM_PTRACE_H */</div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h<br/>index bb7af77a30a7..d42f7a92238b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/sigcontext.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/include/uapi/asm/sigcontext.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/include/uapi/asm/sigcontext.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/include/uapi/asm/sigcontext.h</a></div><div class='hunk'>@@ -183,6 +183,15 @@ struct zt_context {</div><div class='ctx'> 	__u16 __reserved[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define GCS_MAGIC	0x47435300</div><div class='add'>+</div><div class='add'>+struct gcs_context {</div><div class='add'>+	struct _aarch64_ctx head;</div><div class='add'>+	__u64 gcspr;</div><div class='add'>+	__u64 features_enabled;</div><div class='add'>+	__u64 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sve_context.h&gt;</div><div class='head'>diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile<br/>index 2b112f3b7510..76f32e424065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/Makefile</a></div><div class='hunk'>@@ -33,7 +33,8 @@ obj-y			:= debug-monitors.o entry.o irq.o fpsimd.o		\</div><div class='ctx'> 			   return_address.o cpuinfo.o cpu_errata.o		\</div><div class='ctx'> 			   cpufeature.o alternative.o cacheinfo.o		\</div><div class='ctx'> 			   smp.o smp_spin_table.o topology.o smccc-call.o	\</div><div class='del'>-			   syscall.o proton-pack.o idle.o patching.o pi/</div><div class='add'>+			   syscall.o proton-pack.o idle.o patching.o pi/	\</div><div class='add'>+			   rsi.o jump_label.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_COMPAT)			+= sys32.o signal32.o			\</div><div class='ctx'> 					   sys_compat.o</div><div class='hunk'>@@ -46,7 +47,6 @@ obj-$(CONFIG_PERF_EVENTS)		+= perf_regs.o perf_callchain.o</div><div class='ctx'> obj-$(CONFIG_HARDLOCKUP_DETECTOR_PERF)	+= watchdog_hld.o</div><div class='ctx'> obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o</div><div class='ctx'> obj-$(CONFIG_CPU_PM)			+= sleep.o suspend.o</div><div class='del'>-obj-$(CONFIG_JUMP_LABEL)		+= jump_label.o</div><div class='ctx'> obj-$(CONFIG_KGDB)			+= kgdb.o</div><div class='ctx'> obj-$(CONFIG_EFI)			+= efi.o efi-rt-wrapper.o</div><div class='ctx'> obj-$(CONFIG_PCI)			+= pci.o</div><div class='hunk'>@@ -77,10 +77,10 @@ $(obj)/vdso32-wrap.o: $(obj)/vdso32/vdso.so</div><div class='ctx'> </div><div class='ctx'> obj-y					+= probes/</div><div class='ctx'> obj-y					+= head.o</div><div class='del'>-extra-y					+= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)		+= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_DEBUG_EFI),y)</div><div class='del'>-AFLAGS_head.o += -DVMLINUX_PATH="\"$(realpath $(objtree)/vmlinux)\""</div><div class='add'>+AFLAGS_head.o += -DVMLINUX_PATH="\"$(abspath vmlinux)\""</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='head'>diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c<br/>index e6f66491fbe9..7aca29e1d30b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/acpi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/acpi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/acpi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/acpi.c</a></div><div class='hunk'>@@ -197,6 +197,8 @@ out:</div><div class='ctx'>  */</div><div class='ctx'> void __init acpi_boot_table_init(void)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable ACPI instead of device tree unless</div><div class='ctx'> 	 * - ACPI has been disabled explicitly (acpi=off), or</div><div class='hunk'>@@ -250,10 +252,12 @@ done:</div><div class='ctx'> 		 * behaviour, use acpi=nospcr to disable console in ACPI SPCR</div><div class='ctx'> 		 * table as default serial console.</div><div class='ctx'> 		 */</div><div class='del'>-		acpi_parse_spcr(earlycon_acpi_spcr_enable,</div><div class='add'>+		ret = acpi_parse_spcr(earlycon_acpi_spcr_enable,</div><div class='ctx'> 			!param_acpi_nospcr);</div><div class='del'>-		pr_info("Use ACPI SPCR as default console: %s\n",</div><div class='del'>-				param_acpi_nospcr ? "No" : "Yes");</div><div class='add'>+		if (!ret || param_acpi_nospcr || !IS_ENABLED(CONFIG_ACPI_SPCR_TABLE))</div><div class='add'>+			pr_info("Use ACPI SPCR as default console: No\n");</div><div class='add'>+		else</div><div class='add'>+			pr_info("Use ACPI SPCR as default console: Yes\n");</div><div class='ctx'> </div><div class='ctx'> 		if (IS_ENABLED(CONFIG_ACPI_BGRT))</div><div class='ctx'> 			acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt);</div><div class='hunk'>@@ -353,6 +357,16 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)</div><div class='ctx'> 			 * as long as we take care not to create a writable</div><div class='ctx'> 			 * mapping for executable code.</div><div class='ctx'> 			 */</div><div class='add'>+			fallthrough;</div><div class='add'>+</div><div class='add'>+		case EFI_ACPI_MEMORY_NVS:</div><div class='add'>+			/*</div><div class='add'>+			 * ACPI NVS marks an area reserved for use by the</div><div class='add'>+			 * firmware, even after exiting the boot service.</div><div class='add'>+			 * This may be used by the firmware for sharing dynamic</div><div class='add'>+			 * tables/data (e.g., ACPI CCEL) with the OS. Map it</div><div class='add'>+			 * as read-only.</div><div class='add'>+			 */</div><div class='ctx'> 			prot = PAGE_KERNEL_RO;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -379,7 +393,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)</div><div class='ctx'> 				prot = __acpi_get_writethrough_mem_attribute();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return ioremap_prot(phys, size, pgprot_val(prot));</div><div class='add'>+	return ioremap_prot(phys, size, prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -403,7 +417,7 @@ int apei_claim_sea(struct pt_regs *regs)</div><div class='ctx'> 	return_to_irqs_enabled = !irqs_disabled_flags(arch_local_save_flags());</div><div class='ctx'> </div><div class='ctx'> 	if (regs)</div><div class='del'>-		return_to_irqs_enabled = interrupts_enabled(regs);</div><div class='add'>+		return_to_irqs_enabled = !regs_irqs_disabled(regs);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * SEA can interrupt SError, mask it and describe this as an NMI so</div><div class='head'>diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c<br/>index 27de1dddb0ab..b6367ff3a49c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -6,21 +6,19 @@</div><div class='ctx'>  *               2001-2002 Keith Owens</div><div class='ctx'>  * Copyright (C) 2012 ARM Ltd.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/arm_sdei.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='del'>-#include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;asm/signal32.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/kbuild.h&gt;</div><div class='hunk'>@@ -28,8 +26,6 @@</div><div class='ctx'> </div><div class='ctx'> int main(void)</div><div class='ctx'> {</div><div class='del'>-  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));</div><div class='del'>-  BLANK();</div><div class='ctx'>   DEFINE(TSK_TI_CPU,		offsetof(struct task_struct, thread_info.cpu));</div><div class='ctx'>   DEFINE(TSK_TI_FLAGS,		offsetof(struct task_struct, thread_info.flags));</div><div class='ctx'>   DEFINE(TSK_TI_PREEMPT,	offsetof(struct task_struct, thread_info.preempt_count));</div><div class='hunk'>@@ -79,45 +75,27 @@ int main(void)</div><div class='ctx'>   DEFINE(S_PSTATE,		offsetof(struct pt_regs, pstate));</div><div class='ctx'>   DEFINE(S_SYSCALLNO,		offsetof(struct pt_regs, syscallno));</div><div class='ctx'>   DEFINE(S_SDEI_TTBR1,		offsetof(struct pt_regs, sdei_ttbr1));</div><div class='del'>-  DEFINE(S_PMR_SAVE,		offsetof(struct pt_regs, pmr_save));</div><div class='add'>+  DEFINE(S_PMR,			offsetof(struct pt_regs, pmr));</div><div class='ctx'>   DEFINE(S_STACKFRAME,		offsetof(struct pt_regs, stackframe));</div><div class='add'>+  DEFINE(S_STACKFRAME_TYPE,	offsetof(struct pt_regs, stackframe.type));</div><div class='ctx'>   DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));</div><div class='ctx'>   BLANK();</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS</div><div class='del'>-  DEFINE(FREGS_X0,		offsetof(struct ftrace_regs, regs[0]));</div><div class='del'>-  DEFINE(FREGS_X2,		offsetof(struct ftrace_regs, regs[2]));</div><div class='del'>-  DEFINE(FREGS_X4,		offsetof(struct ftrace_regs, regs[4]));</div><div class='del'>-  DEFINE(FREGS_X6,		offsetof(struct ftrace_regs, regs[6]));</div><div class='del'>-  DEFINE(FREGS_X8,		offsetof(struct ftrace_regs, regs[8]));</div><div class='del'>-  DEFINE(FREGS_FP,		offsetof(struct ftrace_regs, fp));</div><div class='del'>-  DEFINE(FREGS_LR,		offsetof(struct ftrace_regs, lr));</div><div class='del'>-  DEFINE(FREGS_SP,		offsetof(struct ftrace_regs, sp));</div><div class='del'>-  DEFINE(FREGS_PC,		offsetof(struct ftrace_regs, pc));</div><div class='add'>+  DEFINE(FREGS_X0,		offsetof(struct __arch_ftrace_regs, regs[0]));</div><div class='add'>+  DEFINE(FREGS_X2,		offsetof(struct __arch_ftrace_regs, regs[2]));</div><div class='add'>+  DEFINE(FREGS_X4,		offsetof(struct __arch_ftrace_regs, regs[4]));</div><div class='add'>+  DEFINE(FREGS_X6,		offsetof(struct __arch_ftrace_regs, regs[6]));</div><div class='add'>+  DEFINE(FREGS_X8,		offsetof(struct __arch_ftrace_regs, regs[8]));</div><div class='add'>+  DEFINE(FREGS_FP,		offsetof(struct __arch_ftrace_regs, fp));</div><div class='add'>+  DEFINE(FREGS_LR,		offsetof(struct __arch_ftrace_regs, lr));</div><div class='add'>+  DEFINE(FREGS_SP,		offsetof(struct __arch_ftrace_regs, sp));</div><div class='add'>+  DEFINE(FREGS_PC,		offsetof(struct __arch_ftrace_regs, pc));</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='del'>-  DEFINE(FREGS_DIRECT_TRAMP,	offsetof(struct ftrace_regs, direct_tramp));</div><div class='del'>-#endif</div><div class='del'>-  DEFINE(FREGS_SIZE,		sizeof(struct ftrace_regs));</div><div class='del'>-  BLANK();</div><div class='add'>+  DEFINE(FREGS_DIRECT_TRAMP,	offsetof(struct __arch_ftrace_regs, direct_tramp));</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_COMPAT</div><div class='del'>-  DEFINE(COMPAT_SIGFRAME_REGS_OFFSET,		offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0));</div><div class='del'>-  DEFINE(COMPAT_RT_SIGFRAME_REGS_OFFSET,	offsetof(struct compat_rt_sigframe, sig.uc.uc_mcontext.arm_r0));</div><div class='add'>+  DEFINE(FREGS_SIZE,		sizeof(struct __arch_ftrace_regs));</div><div class='ctx'>   BLANK();</div><div class='ctx'> #endif</div><div class='del'>-  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));</div><div class='del'>-  BLANK();</div><div class='del'>-  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));</div><div class='del'>-  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));</div><div class='del'>-  BLANK();</div><div class='del'>-  DEFINE(VM_EXEC,	       	VM_EXEC);</div><div class='del'>-  BLANK();</div><div class='del'>-  DEFINE(PAGE_SZ,	       	PAGE_SIZE);</div><div class='del'>-  BLANK();</div><div class='del'>-  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);</div><div class='del'>-  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);</div><div class='del'>-  BLANK();</div><div class='del'>-  DEFINE(PREEMPT_DISABLE_OFFSET, PREEMPT_DISABLE_OFFSET);</div><div class='del'>-  BLANK();</div><div class='ctx'>   DEFINE(CPU_BOOT_TASK,		offsetof(struct secondary_data, task));</div><div class='ctx'>   BLANK();</div><div class='ctx'>   DEFINE(FTR_OVR_VAL_OFFSET,	offsetof(struct arm64_ftr_override, val));</div><div class='hunk'>@@ -146,6 +124,7 @@ int main(void)</div><div class='ctx'>   DEFINE(NVHE_INIT_HCR_EL2,	offsetof(struct kvm_nvhe_init_params, hcr_el2));</div><div class='ctx'>   DEFINE(NVHE_INIT_VTTBR,	offsetof(struct kvm_nvhe_init_params, vttbr));</div><div class='ctx'>   DEFINE(NVHE_INIT_VTCR,	offsetof(struct kvm_nvhe_init_params, vtcr));</div><div class='add'>+  DEFINE(NVHE_INIT_TMP,		offsetof(struct kvm_nvhe_init_params, tmp));</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_PM</div><div class='ctx'>   DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));</div><div class='hunk'>@@ -201,20 +180,10 @@ int main(void)</div><div class='ctx'>   DEFINE(FTRACE_OPS_FUNC,		offsetof(struct ftrace_ops, func));</div><div class='ctx'> #endif</div><div class='ctx'>   BLANK();</div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-  DEFINE(FGRET_REGS_X0,			offsetof(struct fgraph_ret_regs, regs[0]));</div><div class='del'>-  DEFINE(FGRET_REGS_X1,			offsetof(struct fgraph_ret_regs, regs[1]));</div><div class='del'>-  DEFINE(FGRET_REGS_X2,			offsetof(struct fgraph_ret_regs, regs[2]));</div><div class='del'>-  DEFINE(FGRET_REGS_X3,			offsetof(struct fgraph_ret_regs, regs[3]));</div><div class='del'>-  DEFINE(FGRET_REGS_X4,			offsetof(struct fgraph_ret_regs, regs[4]));</div><div class='del'>-  DEFINE(FGRET_REGS_X5,			offsetof(struct fgraph_ret_regs, regs[5]));</div><div class='del'>-  DEFINE(FGRET_REGS_X6,			offsetof(struct fgraph_ret_regs, regs[6]));</div><div class='del'>-  DEFINE(FGRET_REGS_X7,			offsetof(struct fgraph_ret_regs, regs[7]));</div><div class='del'>-  DEFINE(FGRET_REGS_FP,			offsetof(struct fgraph_ret_regs, fp));</div><div class='del'>-  DEFINE(FGRET_REGS_SIZE,		sizeof(struct fgraph_ret_regs));</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='ctx'>   DEFINE(FTRACE_OPS_DIRECT_CALL,	offsetof(struct ftrace_ops, direct_call));</div><div class='ctx'> #endif</div><div class='add'>+  DEFINE(PIE_E0_ASM, PIE_E0);</div><div class='add'>+  DEFINE(PIE_E1_ASM, PIE_E1);</div><div class='ctx'>   return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c<br/>index d9c9218fa1fd..309942b06c5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cacheinfo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cacheinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cacheinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/cacheinfo.c</a></div><div class='hunk'>@@ -101,16 +101,18 @@ int populate_cache_leaves(unsigned int cpu)</div><div class='ctx'> 	unsigned int level, idx;</div><div class='ctx'> 	enum cache_type type;</div><div class='ctx'> 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='del'>-	struct cacheinfo *this_leaf = this_cpu_ci-&gt;info_list;</div><div class='add'>+	struct cacheinfo *infos = this_cpu_ci-&gt;info_list;</div><div class='ctx'> </div><div class='ctx'> 	for (idx = 0, level = 1; level &lt;= this_cpu_ci-&gt;num_levels &amp;&amp;</div><div class='del'>-	     idx &lt; this_cpu_ci-&gt;num_leaves; idx++, level++) {</div><div class='add'>+	     idx &lt; this_cpu_ci-&gt;num_leaves; level++) {</div><div class='ctx'> 		type = get_cache_type(level);</div><div class='ctx'> 		if (type == CACHE_TYPE_SEPARATE) {</div><div class='del'>-			ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);</div><div class='del'>-			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);</div><div class='add'>+			if (idx + 1 &gt;= this_cpu_ci-&gt;num_leaves)</div><div class='add'>+				break;</div><div class='add'>+			ci_leaf_init(&amp;infos[idx++], CACHE_TYPE_DATA, level);</div><div class='add'>+			ci_leaf_init(&amp;infos[idx++], CACHE_TYPE_INST, level);</div><div class='ctx'> 		} else {</div><div class='del'>-			ci_leaf_init(this_leaf++, type, level);</div><div class='add'>+			ci_leaf_init(&amp;infos[idx++], type, level);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm64/kernel/compat_alignment.c b/arch/arm64/kernel/compat_alignment.c<br/>index deff21bfa680..b68e1d328d4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/compat_alignment.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/compat_alignment.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/compat_alignment.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/compat_alignment.c</a></div><div class='hunk'>@@ -368,6 +368,8 @@ int do_compat_alignment_fixup(unsigned long addr, struct pt_regs *regs)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!handler)</div><div class='add'>+		return 1;</div><div class='ctx'> 	type = handler(addr, instr, regs);</div><div class='ctx'> </div><div class='ctx'> 	if (type == TYPE_ERROR || type == TYPE_FAULT)</div><div class='head'>diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c<br/>index a78f247029ae..8cb3b575a031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpu_errata.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpu_errata.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpu_errata.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/cpu_errata.c</a></div><div class='hunk'>@@ -14,31 +14,85 @@</div><div class='ctx'> #include &lt;asm/kvm_asm.h&gt;</div><div class='ctx'> #include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> </div><div class='add'>+static u64 target_impl_cpu_num;</div><div class='add'>+static struct target_impl_cpu *target_impl_cpus;</div><div class='add'>+</div><div class='add'>+bool cpu_errata_set_target_impl(u64 num, void *impl_cpus)</div><div class='add'>+{</div><div class='add'>+	if (target_impl_cpu_num || !num || !impl_cpus)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	target_impl_cpu_num = num;</div><div class='add'>+	target_impl_cpus = impl_cpus;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_midr_in_range(struct midr_range const *range)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!target_impl_cpu_num)</div><div class='add'>+		return midr_is_cpu_model_range(read_cpuid_id(), range-&gt;model,</div><div class='add'>+					       range-&gt;rv_min, range-&gt;rv_max);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; target_impl_cpu_num; i++) {</div><div class='add'>+		if (midr_is_cpu_model_range(target_impl_cpus[i].midr,</div><div class='add'>+					    range-&gt;model,</div><div class='add'>+					    range-&gt;rv_min, range-&gt;rv_max))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool is_midr_in_range_list(struct midr_range const *ranges)</div><div class='add'>+{</div><div class='add'>+	while (ranges-&gt;model)</div><div class='add'>+		if (is_midr_in_range(ranges++))</div><div class='add'>+			return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(is_midr_in_range_list);</div><div class='add'>+</div><div class='ctx'> static bool __maybe_unused</div><div class='del'>-is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+__is_affected_midr_range(const struct arm64_cpu_capabilities *entry,</div><div class='add'>+			 u32 midr, u32 revidr)</div><div class='ctx'> {</div><div class='ctx'> 	const struct arm64_midr_revidr *fix;</div><div class='del'>-	u32 midr = read_cpuid_id(), revidr;</div><div class='del'>-</div><div class='del'>-	WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());</div><div class='del'>-	if (!is_midr_in_range(midr, &amp;entry-&gt;midr_range))</div><div class='add'>+	if (!is_midr_in_range(&amp;entry-&gt;midr_range))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	midr &amp;= MIDR_REVISION_MASK | MIDR_VARIANT_MASK;</div><div class='del'>-	revidr = read_cpuid(REVIDR_EL1);</div><div class='ctx'> 	for (fix = entry-&gt;fixed_revs; fix &amp;&amp; fix-&gt;revidr_mask; fix++)</div><div class='ctx'> 		if (midr == fix-&gt;midr_rv &amp;&amp; (revidr &amp; fix-&gt;revidr_mask))</div><div class='ctx'> 			return false;</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __maybe_unused</div><div class='add'>+is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!target_impl_cpu_num) {</div><div class='add'>+		WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());</div><div class='add'>+		return __is_affected_midr_range(entry, read_cpuid_id(),</div><div class='add'>+						read_cpuid(REVIDR_EL1));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; target_impl_cpu_num; i++) {</div><div class='add'>+		if (__is_affected_midr_range(entry, target_impl_cpus[i].midr,</div><div class='add'>+					     target_impl_cpus[i].midr))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __maybe_unused</div><div class='ctx'> is_affected_midr_range_list(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 			    int scope)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());</div><div class='del'>-	return is_midr_in_range_list(read_cpuid_id(), entry-&gt;midr_range_list);</div><div class='add'>+	return is_midr_in_range_list(entry-&gt;midr_range_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __maybe_unused</div><div class='hunk'>@@ -186,12 +240,48 @@ static bool __maybe_unused</div><div class='ctx'> has_neoverse_n1_erratum_1542419(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 				int scope)</div><div class='ctx'> {</div><div class='del'>-	u32 midr = read_cpuid_id();</div><div class='ctx'> 	bool has_dic = read_cpuid_cachetype() &amp; BIT(CTR_EL0_DIC_SHIFT);</div><div class='ctx'> 	const struct midr_range range = MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());</div><div class='del'>-	return is_midr_in_range(midr, &amp;range) &amp;&amp; has_dic;</div><div class='add'>+	return is_midr_in_range(&amp;range) &amp;&amp; has_dic;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct midr_range impdef_pmuv3_cpus[] = {</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_PRO),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_PRO),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_MAX),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_MAX),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_PRO),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_PRO),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_MAX),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_MAX),</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool has_impdef_pmuv3(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+{</div><div class='add'>+	u64 dfr0 = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);</div><div class='add'>+	unsigned int pmuver;</div><div class='add'>+</div><div class='add'>+	if (!is_kernel_in_hyp_mode())</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	pmuver = cpuid_feature_extract_unsigned_field(dfr0,</div><div class='add'>+						      ID_AA64DFR0_EL1_PMUVer_SHIFT);</div><div class='add'>+	if (pmuver != ID_AA64DFR0_EL1_PMUVer_IMP_DEF)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return is_midr_in_range_list(impdef_pmuv3_cpus);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_enable_impdef_pmuv3_traps(const struct arm64_cpu_capabilities *__unused)</div><div class='add'>+{</div><div class='add'>+	sysreg_clear_set_s(SYS_HACR_EL2, 0, BIT(56));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI</div><div class='hunk'>@@ -245,7 +335,7 @@ static const struct midr_range cavium_erratum_23154_cpus[] = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CAVIUM_ERRATUM_27456</div><div class='del'>-const struct midr_range cavium_erratum_27456_cpus[] = {</div><div class='add'>+static const struct midr_range cavium_erratum_27456_cpus[] = {</div><div class='ctx'> 	/* Cavium ThunderX, T88 pass 1.x - 2.1 */</div><div class='ctx'> 	MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),</div><div class='ctx'> 	/* Cavium ThunderX, T81 pass 1.0 */</div><div class='hunk'>@@ -441,6 +531,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = {</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_A720AE),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),</div><div class='hunk'>@@ -455,6 +546,7 @@ static const struct midr_range erratum_spec_ssbs_list[] = {</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='hunk'>@@ -467,6 +559,13 @@ static const struct midr_range erratum_ac03_cpu_38_list[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+static const struct midr_range erratum_ac04_cpu_23_list[] = {</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_AMPERE1A),</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> const struct arm64_cpu_capabilities arm64_errata[] = {</div><div class='ctx'> #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE</div><div class='ctx'> 	{</div><div class='hunk'>@@ -786,6 +885,28 @@ const struct arm64_cpu_capabilities arm64_errata[] = {</div><div class='ctx'> 		ERRATA_MIDR_RANGE_LIST(erratum_ac03_cpu_38_list),</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+	{</div><div class='add'>+		.desc = "AmpereOne erratum AC04_CPU_23",</div><div class='add'>+		.capability = ARM64_WORKAROUND_AMPERE_AC04_CPU_23,</div><div class='add'>+		ERRATA_MIDR_RANGE_LIST(erratum_ac04_cpu_23_list),</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+	{</div><div class='add'>+		.desc = "Broken CNTVOFF_EL2",</div><div class='add'>+		.capability = ARM64_WORKAROUND_QCOM_ORYON_CNTVOFF,</div><div class='add'>+		ERRATA_MIDR_RANGE_LIST(((const struct midr_range[]) {</div><div class='add'>+					MIDR_ALL_VERSIONS(MIDR_QCOM_ORYON_X1),</div><div class='add'>+					{}</div><div class='add'>+				})),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "Apple IMPDEF PMUv3 Traps",</div><div class='add'>+		.capability = ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS,</div><div class='add'>+		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,</div><div class='add'>+		.matches = has_impdef_pmuv3,</div><div class='add'>+		.cpu_enable = cpu_enable_impdef_pmuv3_traps,</div><div class='add'>+	},</div><div class='ctx'> 	{</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c<br/>index 718728a85430..5ed401ff79e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpufeature.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpufeature.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpufeature.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/cpufeature.c</a></div><div class='hunk'>@@ -75,6 +75,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/sched/isolation.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='hunk'>@@ -83,8 +84,10 @@</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/mte.h&gt;</div><div class='add'>+#include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='hunk'>@@ -103,6 +106,7 @@ static DECLARE_BITMAP(elf_hwcap, MAX_CPU_FEATURES) __read_mostly;</div><div class='ctx'> 				 COMPAT_HWCAP_LPAE)</div><div class='ctx'> unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;</div><div class='ctx'> unsigned int compat_elf_hwcap2 __read_mostly;</div><div class='add'>+unsigned int compat_elf_hwcap3 __read_mostly;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> DECLARE_BITMAP(system_cpucaps, ARM64_NCAPS);</div><div class='hunk'>@@ -111,7 +115,14 @@ static struct arm64_cpu_capabilities const __ro_after_init *cpucap_ptrs[ARM64_NC</div><div class='ctx'> </div><div class='ctx'> DECLARE_BITMAP(boot_cpucaps, ARM64_NCAPS);</div><div class='ctx'> </div><div class='del'>-bool arm64_use_ng_mappings = false;</div><div class='add'>+/*</div><div class='add'>+ * arm64_use_ng_mappings must be placed in the .data section, otherwise it</div><div class='add'>+ * ends up in the .bss section where it is initialized in early_map_kernel()</div><div class='add'>+ * after the MMU (with the idmap) was enabled. create_init_idmap() - which</div><div class='add'>+ * runs before early_map_kernel() and reads the variable via PTE_MAYBE_NG -</div><div class='add'>+ * may end up generating an incorrect idmap page table attributes.</div><div class='add'>+ */</div><div class='add'>+bool arm64_use_ng_mappings __read_mostly = false;</div><div class='ctx'> EXPORT_SYMBOL(arm64_use_ng_mappings);</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU_READ_MOSTLY(const char *, this_cpu_vector) = vectors;</div><div class='hunk'>@@ -228,6 +239,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_XS_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_I8MM_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_DGH_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_BF16_SHIFT, 4, 0),</div><div class='hunk'>@@ -266,6 +278,8 @@ static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64isar3[] = {</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR3_EL1_FPRCVT_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR3_EL1_LSFE_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR3_EL1_FAMINMAX_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='hunk'>@@ -291,6 +305,10 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_DF2_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_GCS),</div><div class='add'>+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_GCS_SHIFT, 4, 0),</div><div class='add'>+	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MTE_frac_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_SME_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, 4, 0),</div><div class='hunk'>@@ -305,6 +323,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64pfr2[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_FPMR_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_MTESTOREONLY_SHIFT, 4, ID_AA64PFR2_EL1_MTESTOREONLY_NI),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -314,6 +334,8 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_F32MM_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='add'>+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_F16MM_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_I8MM_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_SM4_SHIFT, 4, 0),</div><div class='hunk'>@@ -326,6 +348,8 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_BitPerm_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='add'>+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_EltPerm_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_AES_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_EL1_SVEver_SHIFT, 4, 0),</div><div class='hunk'>@@ -369,6 +393,16 @@ static const struct arm64_ftr_bits ftr_id_aa64smfr0[] = {</div><div class='ctx'> 		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SF8DP4_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='ctx'> 		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SF8DP2_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='add'>+		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SBitPerm_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='add'>+		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_AES_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='add'>+		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SFEXPA_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='add'>+		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_STMOP_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='add'>+		       FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SMOP4_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -377,6 +411,8 @@ static const struct arm64_ftr_bits ftr_id_aa64fpfr0[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8FMA_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8DP4_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8DP2_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8MM8_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8MM4_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8E4M3_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64FPFR0_EL1_F8E5M2_SHIFT, 1, 0),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='hunk'>@@ -469,12 +505,14 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_POE),</div><div class='ctx'> 		       FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1POE_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1PIE_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_SCTLRX_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_TCRX_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = {</div><div class='ctx'> 	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_NV_frac_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -684,6 +722,14 @@ static const struct arm64_ftr_bits ftr_id_dfr1[] = {</div><div class='ctx'> 	ARM64_FTR_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct arm64_ftr_bits ftr_mpamidr[] = {</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, MPAMIDR_EL1_PMG_MAX_SHIFT, MPAMIDR_EL1_PMG_MAX_WIDTH, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, MPAMIDR_EL1_VPMR_MAX_SHIFT, MPAMIDR_EL1_VPMR_MAX_WIDTH, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, MPAMIDR_EL1_HAS_HCR_SHIFT, 1, 0),</div><div class='add'>+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, MPAMIDR_EL1_PARTID_MAX_SHIFT, MPAMIDR_EL1_PARTID_MAX_WIDTH, 0),</div><div class='add'>+	ARM64_FTR_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Common ftr bits for a 32bit register with all hidden, strict</div><div class='ctx'>  * attributes, with 4bit feature fields and a default safe value of</div><div class='hunk'>@@ -726,17 +772,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {</div><div class='ctx'> #define ARM64_FTR_REG(id, table)		\</div><div class='ctx'> 	__ARM64_FTR_REG_OVERRIDE(#id, id, table, &amp;no_override)</div><div class='ctx'> </div><div class='del'>-struct arm64_ftr_override id_aa64mmfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64mmfr1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64mmfr2_override;</div><div class='del'>-struct arm64_ftr_override id_aa64pfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64pfr1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64zfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64smfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64isar1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64isar2_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr2_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64pfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64pfr1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64zfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64smfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64isar1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64isar2_override;</div><div class='ctx'> </div><div class='del'>-struct arm64_ftr_override arm64_sw_feature_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly arm64_sw_feature_override;</div><div class='ctx'> </div><div class='ctx'> static const struct __ftr_reg_entry {</div><div class='ctx'> 	u32			sys_id;</div><div class='hunk'>@@ -804,6 +850,9 @@ static const struct __ftr_reg_entry {</div><div class='ctx'> 	ARM64_FTR_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3),</div><div class='ctx'> 	ARM64_FTR_REG(SYS_ID_AA64MMFR4_EL1, ftr_id_aa64mmfr4),</div><div class='ctx'> </div><div class='add'>+	/* Op1 = 0, CRn = 10, CRm = 4 */</div><div class='add'>+	ARM64_FTR_REG(SYS_MPAMIDR_EL1, ftr_mpamidr),</div><div class='add'>+</div><div class='ctx'> 	/* Op1 = 1, CRn = 0, CRm = 0 */</div><div class='ctx'> 	ARM64_FTR_REG(SYS_GMID_EL1, ftr_gmid),</div><div class='ctx'> </div><div class='hunk'>@@ -989,17 +1038,16 @@ static void init_cpu_ftr_reg(u32 sys_reg, u64 new)</div><div class='ctx'> 				/* Override was valid */</div><div class='ctx'> 				ftr_new = tmp;</div><div class='ctx'> 				str = "forced";</div><div class='del'>-			} else if (ftr_ovr == tmp) {</div><div class='add'>+			} else {</div><div class='ctx'> 				/* Override was the safe value */</div><div class='ctx'> 				str = "already set";</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (str)</div><div class='del'>-				pr_warn("%s[%d:%d]: %s to %llx\n",</div><div class='del'>-					reg-&gt;name,</div><div class='del'>-					ftrp-&gt;shift + ftrp-&gt;width - 1,</div><div class='del'>-					ftrp-&gt;shift, str,</div><div class='del'>-					tmp &amp; (BIT(ftrp-&gt;width) - 1));</div><div class='add'>+			pr_warn("%s[%d:%d]: %s to %llx\n",</div><div class='add'>+				reg-&gt;name,</div><div class='add'>+				ftrp-&gt;shift + ftrp-&gt;width - 1,</div><div class='add'>+				ftrp-&gt;shift, str,</div><div class='add'>+				tmp &amp; (BIT(ftrp-&gt;width) - 1));</div><div class='ctx'> 		} else if ((ftr_mask &amp; reg-&gt;override-&gt;val) == ftr_mask) {</div><div class='ctx'> 			reg-&gt;override-&gt;val &amp;= ~ftr_mask;</div><div class='ctx'> 			pr_warn("%s[%d:%d]: impossible override, ignored\n",</div><div class='hunk'>@@ -1152,17 +1200,16 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info)</div><div class='ctx'> 	    id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {</div><div class='ctx'> 		unsigned long cpacr = cpacr_save_enable_kernel_sme();</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * We mask out SMPS since even if the hardware</div><div class='del'>-		 * supports priorities the kernel does not at present</div><div class='del'>-		 * and we block access to them.</div><div class='del'>-		 */</div><div class='del'>-		info-&gt;reg_smidr = read_cpuid(SMIDR_EL1) &amp; ~SMIDR_EL1_SMPS;</div><div class='ctx'> 		vec_init_vq_map(ARM64_VEC_SME);</div><div class='ctx'> </div><div class='ctx'> 		cpacr_restore(cpacr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {</div><div class='add'>+		info-&gt;reg_mpamidr = read_cpuid(MPAMIDR_EL1);</div><div class='add'>+		init_cpu_ftr_reg(SYS_MPAMIDR_EL1, info-&gt;reg_mpamidr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (id_aa64pfr1_mte(info-&gt;reg_id_aa64pfr1))</div><div class='ctx'> 		init_cpu_ftr_reg(SYS_GMID_EL1, info-&gt;reg_gmid);</div><div class='ctx'> }</div><div class='hunk'>@@ -1372,6 +1419,8 @@ void update_cpu_features(int cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64mmfr2, boot-&gt;reg_id_aa64mmfr2);</div><div class='ctx'> 	taint |= check_update_ftr_reg(SYS_ID_AA64MMFR3_EL1, cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64mmfr3, boot-&gt;reg_id_aa64mmfr3);</div><div class='add'>+	taint |= check_update_ftr_reg(SYS_ID_AA64MMFR4_EL1, cpu,</div><div class='add'>+				      info-&gt;reg_id_aa64mmfr4, boot-&gt;reg_id_aa64mmfr4);</div><div class='ctx'> </div><div class='ctx'> 	taint |= check_update_ftr_reg(SYS_ID_AA64PFR0_EL1, cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64pfr0, boot-&gt;reg_id_aa64pfr0);</div><div class='hunk'>@@ -1405,13 +1454,6 @@ void update_cpu_features(int cpu,</div><div class='ctx'> 	    id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {</div><div class='ctx'> 		unsigned long cpacr = cpacr_save_enable_kernel_sme();</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * We mask out SMPS since even if the hardware</div><div class='del'>-		 * supports priorities the kernel does not at present</div><div class='del'>-		 * and we block access to them.</div><div class='del'>-		 */</div><div class='del'>-		info-&gt;reg_smidr = read_cpuid(SMIDR_EL1) &amp; ~SMIDR_EL1_SMPS;</div><div class='del'>-</div><div class='ctx'> 		/* Probe vector lengths */</div><div class='ctx'> 		if (!system_capabilities_finalized())</div><div class='ctx'> 			vec_update_vq_map(ARM64_VEC_SME);</div><div class='hunk'>@@ -1419,6 +1461,12 @@ void update_cpu_features(int cpu,</div><div class='ctx'> 		cpacr_restore(cpacr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {</div><div class='add'>+		info-&gt;reg_mpamidr = read_cpuid(MPAMIDR_EL1);</div><div class='add'>+		taint |= check_update_ftr_reg(SYS_MPAMIDR_EL1, cpu,</div><div class='add'>+					info-&gt;reg_mpamidr, boot-&gt;reg_mpamidr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The kernel uses the LDGM/STGM instructions and the number of tags</div><div class='ctx'> 	 * they read/write depends on the GMID_EL1.BS field. Check that the</div><div class='hunk'>@@ -1618,6 +1666,11 @@ const struct cpumask *system_32bit_el0_cpumask(void)</div><div class='ctx'> 	return cpu_possible_mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct cpumask *task_cpu_fallback_mask(struct task_struct *p)</div><div class='add'>+{</div><div class='add'>+	return __task_cpu_possible_mask(p, housekeeping_cpumask(HK_TYPE_TICK));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init parse_32bit_el0_param(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	allow_mismatched_32bit_el0 = true;</div><div class='hunk'>@@ -1760,7 +1813,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 	char const *str = "kpti command line option";</div><div class='ctx'> 	bool meltdown_safe;</div><div class='ctx'> </div><div class='del'>-	meltdown_safe = is_midr_in_range_list(read_cpuid_id(), kpti_safe_list);</div><div class='add'>+	meltdown_safe = is_midr_in_range_list(kpti_safe_list);</div><div class='ctx'> </div><div class='ctx'> 	/* Defer to CPU feature registers */</div><div class='ctx'> 	if (has_cpuid_feature(entry, scope))</div><div class='hunk'>@@ -1830,7 +1883,7 @@ static bool has_nv1(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='ctx'> </div><div class='ctx'> 	return (__system_matches_cap(ARM64_HAS_NESTED_VIRT) &amp;&amp;</div><div class='ctx'> 		!(has_cpuid_feature(entry, scope) ||</div><div class='del'>-		  is_midr_in_range_list(read_cpuid_id(), nv1_ni_list)));</div><div class='add'>+		  is_midr_in_range_list(nv1_ni_list)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(ID_AA64MMFR0_EL1_TGRAN_LPA2) &amp;&amp; defined(ID_AA64MMFR0_EL1_TGRAN_2_SUPPORTED_LPA2)</div><div class='hunk'>@@ -1866,102 +1919,27 @@ static bool has_lpa2(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_UNMAP_KERNEL_AT_EL0</div><div class='del'>-#define KPTI_NG_TEMP_VA		(-(1UL &lt;&lt; PMD_SHIFT))</div><div class='del'>-</div><div class='del'>-extern</div><div class='del'>-void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys, unsigned long virt,</div><div class='del'>-			     phys_addr_t size, pgprot_t prot,</div><div class='del'>-			     phys_addr_t (*pgtable_alloc)(int), int flags);</div><div class='del'>-</div><div class='del'>-static phys_addr_t __initdata kpti_ng_temp_alloc;</div><div class='del'>-</div><div class='del'>-static phys_addr_t __init kpti_ng_pgd_alloc(int shift)</div><div class='del'>-{</div><div class='del'>-	kpti_ng_temp_alloc -= PAGE_SIZE;</div><div class='del'>-	return kpti_ng_temp_alloc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init __kpti_install_ng_mappings(void *__unused)</div><div class='del'>-{</div><div class='del'>-	typedef void (kpti_remap_fn)(int, int, phys_addr_t, unsigned long);</div><div class='del'>-	extern kpti_remap_fn idmap_kpti_install_ng_mappings;</div><div class='del'>-	kpti_remap_fn *remap_fn;</div><div class='del'>-</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-	int levels = CONFIG_PGTABLE_LEVELS;</div><div class='del'>-	int order = order_base_2(levels);</div><div class='del'>-	u64 kpti_ng_temp_pgd_pa = 0;</div><div class='del'>-	pgd_t *kpti_ng_temp_pgd;</div><div class='del'>-	u64 alloc = 0;</div><div class='del'>-</div><div class='del'>-	if (levels == 5 &amp;&amp; !pgtable_l5_enabled())</div><div class='del'>-		levels = 4;</div><div class='del'>-	else if (levels == 4 &amp;&amp; !pgtable_l4_enabled())</div><div class='del'>-		levels = 3;</div><div class='del'>-</div><div class='del'>-	remap_fn = (void *)__pa_symbol(idmap_kpti_install_ng_mappings);</div><div class='del'>-</div><div class='del'>-	if (!cpu) {</div><div class='del'>-		alloc = __get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);</div><div class='del'>-		kpti_ng_temp_pgd = (pgd_t *)(alloc + (levels - 1) * PAGE_SIZE);</div><div class='del'>-		kpti_ng_temp_alloc = kpti_ng_temp_pgd_pa = __pa(kpti_ng_temp_pgd);</div><div class='del'>-</div><div class='del'>-		//</div><div class='del'>-		// Create a minimal page table hierarchy that permits us to map</div><div class='del'>-		// the swapper page tables temporarily as we traverse them.</div><div class='del'>-		//</div><div class='del'>-		// The physical pages are laid out as follows:</div><div class='del'>-		//</div><div class='del'>-		// +--------+-/-------+-/------ +-/------ +-\\\--------+</div><div class='del'>-		// :  PTE[] : | PMD[] : | PUD[] : | P4D[] : ||| PGD[]  :</div><div class='del'>-		// +--------+-\-------+-\------ +-\------ +-///--------+</div><div class='del'>-		//      ^</div><div class='del'>-		// The first page is mapped into this hierarchy at a PMD_SHIFT</div><div class='del'>-		// aligned virtual address, so that we can manipulate the PTE</div><div class='del'>-		// level entries while the mapping is active. The first entry</div><div class='del'>-		// covers the PTE[] page itself, the remaining entries are free</div><div class='del'>-		// to be used as a ad-hoc fixmap.</div><div class='del'>-		//</div><div class='del'>-		create_kpti_ng_temp_pgd(kpti_ng_temp_pgd, __pa(alloc),</div><div class='del'>-					KPTI_NG_TEMP_VA, PAGE_SIZE, PAGE_KERNEL,</div><div class='del'>-					kpti_ng_pgd_alloc, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cpu_install_idmap();</div><div class='del'>-	remap_fn(cpu, num_online_cpus(), kpti_ng_temp_pgd_pa, KPTI_NG_TEMP_VA);</div><div class='del'>-	cpu_uninstall_idmap();</div><div class='del'>-</div><div class='del'>-	if (!cpu) {</div><div class='del'>-		free_pages(alloc, order);</div><div class='del'>-		arm64_use_ng_mappings = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init kpti_install_ng_mappings(void)</div><div class='add'>+#ifdef CONFIG_HW_PERF_EVENTS</div><div class='add'>+static bool has_pmuv3(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='ctx'> {</div><div class='del'>-	/* Check whether KPTI is going to be used */</div><div class='del'>-	if (!arm64_kernel_unmapped_at_el0())</div><div class='del'>-		return;</div><div class='add'>+	u64 dfr0 = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);</div><div class='add'>+	unsigned int pmuver;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We don't need to rewrite the page-tables if either we've done</div><div class='del'>-	 * it already or we have KASLR enabled and therefore have not</div><div class='del'>-	 * created any global mappings at all.</div><div class='add'>+	 * PMUVer follows the standard ID scheme for an unsigned field with the</div><div class='add'>+	 * exception of 0xF (IMP_DEF) which is treated specially and implies</div><div class='add'>+	 * FEAT_PMUv3 is not implemented.</div><div class='add'>+	 *</div><div class='add'>+	 * See DDI0487L.a D24.1.3.2 for more details.</div><div class='ctx'> 	 */</div><div class='del'>-	if (arm64_use_ng_mappings)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	stop_machine(__kpti_install_ng_mappings, NULL, cpu_online_mask);</div><div class='del'>-}</div><div class='add'>+	pmuver = cpuid_feature_extract_unsigned_field(dfr0,</div><div class='add'>+						      ID_AA64DFR0_EL1_PMUVer_SHIFT);</div><div class='add'>+	if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-static inline void kpti_install_ng_mappings(void)</div><div class='del'>-{</div><div class='add'>+	return pmuver &gt;= ID_AA64DFR0_EL1_PMUVer_IMP;</div><div class='ctx'> }</div><div class='del'>-#endif	/* CONFIG_UNMAP_KERNEL_AT_EL0 */</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static void cpu_enable_kpti(struct arm64_cpu_capabilities const *cap)</div><div class='ctx'> {</div><div class='hunk'>@@ -2013,7 +1991,7 @@ static bool cpu_has_broken_dbm(void)</div><div class='ctx'> 		{},</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return is_midr_in_range_list(read_cpuid_id(), cpus);</div><div class='add'>+	return is_midr_in_range_list(cpus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool cpu_can_use_dbm(const struct arm64_cpu_capabilities *cap)</div><div class='hunk'>@@ -2130,7 +2108,7 @@ static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap,</div><div class='ctx'> 	if (kvm_get_mode() != KVM_MODE_NV)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!has_cpuid_feature(cap, scope)) {</div><div class='add'>+	if (!cpucap_multi_entry_cap_matches(cap, scope)) {</div><div class='ctx'> 		pr_warn("unavailable: %s\n", cap-&gt;desc);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2144,6 +2122,47 @@ static bool hvhe_possible(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 	return arm64_test_sw_feature_override(ARM64_SW_FEATURE_OVERRIDE_HVHE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool cpu_supports_bbml2_noabort(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We want to allow usage of BBML2 in as wide a range of kernel contexts</div><div class='add'>+	 * as possible. This list is therefore an allow-list of known-good</div><div class='add'>+	 * implementations that both support BBML2 and additionally, fulfill the</div><div class='add'>+	 * extra constraint of never generating TLB conflict aborts when using</div><div class='add'>+	 * the relaxed BBML2 semantics (such aborts make use of BBML2 in certain</div><div class='add'>+	 * kernel contexts difficult to prove safe against recursive aborts).</div><div class='add'>+	 *</div><div class='add'>+	 * Note that implementations can only be considered "known-good" if their</div><div class='add'>+	 * implementors attest to the fact that the implementation never raises</div><div class='add'>+	 * TLB conflict aborts for BBML2 mapping granularity changes.</div><div class='add'>+	 */</div><div class='add'>+	static const struct midr_range supports_bbml2_noabort_list[] = {</div><div class='add'>+		MIDR_REV_RANGE(MIDR_CORTEX_X4, 0, 3, 0xf),</div><div class='add'>+		MIDR_REV_RANGE(MIDR_NEOVERSE_V3, 0, 2, 0xf),</div><div class='add'>+		MIDR_REV_RANGE(MIDR_NEOVERSE_V3AE, 0, 2, 0xf),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_AMPERE1),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_AMPERE1A),</div><div class='add'>+		{}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Does our cpu guarantee to never raise TLB conflict aborts? */</div><div class='add'>+	if (!is_midr_in_range_list(supports_bbml2_noabort_list))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We currently ignore the ID_AA64MMFR2_EL1 register, and only care</div><div class='add'>+	 * about whether the MIDR check passes.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool has_bbml2_noabort(const struct arm64_cpu_capabilities *caps, int scope)</div><div class='add'>+{</div><div class='add'>+	return cpu_supports_bbml2_noabort();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARM64_PAN</div><div class='ctx'> static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused)</div><div class='ctx'> {</div><div class='hunk'>@@ -2164,6 +2183,24 @@ static void cpu_clear_disr(const struct arm64_cpu_capabilities *__unused)</div><div class='ctx'> 	/* Firmware may have left a deferred SError in this register. */</div><div class='ctx'> 	write_sysreg_s(0, SYS_DISR_EL1);</div><div class='ctx'> }</div><div class='add'>+static bool has_rasv1p1(const struct arm64_cpu_capabilities *__unused, int scope)</div><div class='add'>+{</div><div class='add'>+	const struct arm64_cpu_capabilities rasv1p1_caps[] = {</div><div class='add'>+		{</div><div class='add'>+			ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, V1P1)</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP)</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, RAS_frac, RASv1p1)</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return (has_cpuid_feature(&amp;rasv1p1_caps[0], scope) ||</div><div class='add'>+		(has_cpuid_feature(&amp;rasv1p1_caps[1], scope) &amp;&amp;</div><div class='add'>+		 has_cpuid_feature(&amp;rasv1p1_caps[2], scope)));</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_ARM64_RAS_EXTN */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_PTR_AUTH</div><div class='hunk'>@@ -2227,11 +2264,11 @@ static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 				   int scope)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * ARM64_HAS_GIC_CPUIF_SYSREGS has a lower index, and is a boot CPU</div><div class='add'>+	 * ARM64_HAS_GICV3_CPUIF has a lower index, and is a boot CPU</div><div class='ctx'> 	 * feature, so will be detected earlier.</div><div class='ctx'> 	 */</div><div class='del'>-	BUILD_BUG_ON(ARM64_HAS_GIC_PRIO_MASKING &lt;= ARM64_HAS_GIC_CPUIF_SYSREGS);</div><div class='del'>-	if (!cpus_have_cap(ARM64_HAS_GIC_CPUIF_SYSREGS))</div><div class='add'>+	BUILD_BUG_ON(ARM64_HAS_GIC_PRIO_MASKING &lt;= ARM64_HAS_GICV3_CPUIF);</div><div class='add'>+	if (!cpus_have_cap(ARM64_HAS_GICV3_CPUIF))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return enable_pseudo_nmi;</div><div class='hunk'>@@ -2284,17 +2321,21 @@ static void bti_enable(const struct arm64_cpu_capabilities *__unused)</div><div class='ctx'> #ifdef CONFIG_ARM64_MTE</div><div class='ctx'> static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap)</div><div class='ctx'> {</div><div class='add'>+	static bool cleared_zero_page = false;</div><div class='add'>+</div><div class='ctx'> 	sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_ATA | SCTLR_EL1_ATA0);</div><div class='ctx'> </div><div class='ctx'> 	mte_cpu_setup();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear the tags in the zero page. This needs to be done via the</div><div class='del'>-	 * linear map which has the Tagged attribute.</div><div class='add'>+	 * linear map which has the Tagged attribute. Since this page is</div><div class='add'>+	 * always mapped as pte_special(), set_pte_at() will not attempt to</div><div class='add'>+	 * clear the tags or set PG_mte_tagged.</div><div class='ctx'> 	 */</div><div class='del'>-	if (try_page_mte_tagging(ZERO_PAGE(0))) {</div><div class='add'>+	if (!cleared_zero_page) {</div><div class='add'>+		cleared_zero_page = true;</div><div class='ctx'> 		mte_clear_page_tags(lm_alias(empty_zero_page));</div><div class='del'>-		set_page_mte_tagged(ZERO_PAGE(0));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kasan_init_hw_tags_cpu();</div><div class='hunk'>@@ -2353,8 +2394,16 @@ static void cpu_enable_mops(const struct arm64_cpu_capabilities *__unused)</div><div class='ctx'> #ifdef CONFIG_ARM64_POE</div><div class='ctx'> static void cpu_enable_poe(const struct arm64_cpu_capabilities *__unused)</div><div class='ctx'> {</div><div class='del'>-	sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1x_E0POE);</div><div class='del'>-	sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_E0POE);</div><div class='add'>+	sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1_E0POE);</div><div class='add'>+	sysreg_clear_set(CPACR_EL1, 0, CPACR_EL1_E0POE);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+static void cpu_enable_gcs(const struct arm64_cpu_capabilities *__unused)</div><div class='add'>+{</div><div class='add'>+	/* GCSPR_EL0 is always readable */</div><div class='add'>+	write_sysreg_s(GCSCRE0_EL1_nTR, SYS_GCSCRE0_EL1);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2377,6 +2426,45 @@ cpucap_panic_on_conflict(const struct arm64_cpu_capabilities *cap)</div><div class='ctx'> 	return !!(cap-&gt;type &amp; ARM64_CPUCAP_PANIC_ON_CONFLICT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+{</div><div class='add'>+	if (!has_cpuid_feature(entry, scope))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Check firmware actually enabled MPAM on this cpu. */</div><div class='add'>+	return (read_sysreg_s(SYS_MPAM1_EL1) &amp; MPAM1_EL1_MPAMEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+cpu_enable_mpam(const struct arm64_cpu_capabilities *entry)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Access by the kernel (at EL1) should use the reserved PARTID</div><div class='add'>+	 * which is configured unrestricted. This avoids priority-inversion</div><div class='add'>+	 * where latency sensitive tasks have to wait for a task that has</div><div class='add'>+	 * been throttled to release the lock.</div><div class='add'>+	 */</div><div class='add'>+	write_sysreg_s(0, SYS_MPAM1_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+test_has_mpam_hcr(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+{</div><div class='add'>+	u64 idr = read_sanitised_ftr_reg(SYS_MPAMIDR_EL1);</div><div class='add'>+</div><div class='add'>+	return idr &amp; MPAMIDR_EL1_HAS_HCR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+test_has_gicv5_legacy(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='add'>+{</div><div class='add'>+	if (!this_cpu_has_cap(ARM64_HAS_GICV5_CPUIF))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!(read_sysreg_s(SYS_ICC_IDR0_EL1) &amp; ICC_IDR0_EL1_GCIE_LEGACY);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.capability = ARM64_ALWAYS_BOOT,</div><div class='hunk'>@@ -2389,8 +2477,8 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.matches = has_always,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.desc = "GIC system register CPU interface",</div><div class='del'>-		.capability = ARM64_HAS_GIC_CPUIF_SYSREGS,</div><div class='add'>+		.desc = "GICv3 CPU interface",</div><div class='add'>+		.capability = ARM64_HAS_GICV3_CPUIF,</div><div class='ctx'> 		.type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,</div><div class='ctx'> 		.matches = has_useable_gicv3_cpuif,</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, GIC, IMP)</div><div class='hunk'>@@ -2449,7 +2537,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.capability = ARM64_HAS_NESTED_VIRT,</div><div class='ctx'> 		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='ctx'> 		.matches = has_nested_virt_support,</div><div class='del'>-		ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, NV, NV2)</div><div class='add'>+		.match_list = (const struct arm64_cpu_capabilities []){</div><div class='add'>+			{</div><div class='add'>+				.matches = has_cpuid_feature,</div><div class='add'>+				ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, NV, NV2)</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				.matches = has_cpuid_feature,</div><div class='add'>+				ARM64_CPUID_FIELDS(ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY)</div><div class='add'>+			},</div><div class='add'>+			{ /* Sentinel */ }</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.capability = ARM64_HAS_32BIT_EL0_DO_NOT_USE,</div><div class='hunk'>@@ -2534,6 +2632,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.cpu_enable = cpu_clear_disr,</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP)</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "RASv1p1 Extension Support",</div><div class='add'>+		.capability = ARM64_HAS_RASV1P1_EXTN,</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.matches = has_rasv1p1,</div><div class='add'>+	},</div><div class='ctx'> #endif /* CONFIG_ARM64_RAS_EXTN */</div><div class='ctx'> #ifdef CONFIG_ARM64_AMU_EXTN</div><div class='ctx'> 	{</div><div class='hunk'>@@ -2591,6 +2695,21 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64MMFR1_EL1, HAFDBS, DBM)</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_ARM64_HAFT</div><div class='add'>+	{</div><div class='add'>+		.desc = "Hardware managed Access Flag for Table Descriptors",</div><div class='add'>+		/*</div><div class='add'>+		 * Contrary to the page/block access flag, the table access flag</div><div class='add'>+		 * cannot be emulated in software (no access fault will occur).</div><div class='add'>+		 * Therefore this should be used only if it's supported system</div><div class='add'>+		 * wide.</div><div class='add'>+		 */</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.capability = ARM64_HAFT,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64MMFR1_EL1, HAFDBS, HAFT)</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='ctx'> 	{</div><div class='ctx'> 		.desc = "CRC32 instructions",</div><div class='ctx'> 		.capability = ARM64_HAS_CRC32,</div><div class='hunk'>@@ -2742,6 +2861,20 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.matches = has_cpuid_feature,</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, MTE, MTE3)</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "FAR on MTE Tag Check Fault",</div><div class='add'>+		.capability = ARM64_MTE_FAR,</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTEFAR, IMP)</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "Store Only MTE Tag Check",</div><div class='add'>+		.capability = ARM64_MTE_STORE_ONLY,</div><div class='add'>+		.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTESTOREONLY, IMP)</div><div class='add'>+	},</div><div class='ctx'> #endif /* CONFIG_ARM64_MTE */</div><div class='ctx'> 	{</div><div class='ctx'> 		.desc = "RCpc load-acquire (LDAPR)",</div><div class='hunk'>@@ -2757,6 +2890,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.matches = has_cpuid_feature,</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, IMP)</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "Fine Grained Traps 2",</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.capability = ARM64_HAS_FGT2,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, FGT2)</div><div class='add'>+	},</div><div class='ctx'> #ifdef CONFIG_ARM64_SME</div><div class='ctx'> 	{</div><div class='ctx'> 		.desc = "Scalable Matrix Extension",</div><div class='hunk'>@@ -2842,6 +2982,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP)</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.desc = "BBM Level 2 without TLB conflict abort",</div><div class='add'>+		.capability = ARM64_HAS_BBML2_NOABORT,</div><div class='add'>+		.type = ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE,</div><div class='add'>+		.matches = has_bbml2_noabort,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.desc = "52-bit Virtual Addressing for KVM (LPA2)",</div><div class='ctx'> 		.capability = ARM64_HAS_LPA2,</div><div class='ctx'> 		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='hunk'>@@ -2874,6 +3020,20 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> 	{</div><div class='add'>+		.desc = "Memory Partitioning And Monitoring",</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.capability = ARM64_MPAM,</div><div class='add'>+		.matches = test_has_mpam,</div><div class='add'>+		.cpu_enable = cpu_enable_mpam,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, MPAM, 1)</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "Memory Partitioning And Monitoring Virtualisation",</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.capability = ARM64_MPAM_HCR,</div><div class='add'>+		.matches = test_has_mpam_hcr,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.desc = "NV1",</div><div class='ctx'> 		.capability = ARM64_HAS_HCR_NV1,</div><div class='ctx'> 		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='hunk'>@@ -2890,6 +3050,44 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP)</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	{</div><div class='add'>+		.desc = "Guarded Control Stack (GCS)",</div><div class='add'>+		.capability = ARM64_HAS_GCS,</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.cpu_enable = cpu_enable_gcs,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, GCS, IMP)</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_HW_PERF_EVENTS</div><div class='add'>+	{</div><div class='add'>+		.desc = "PMUv3",</div><div class='add'>+		.capability = ARM64_HAS_PMUV3,</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.matches = has_pmuv3,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+	{</div><div class='add'>+		.desc = "SCTLR2",</div><div class='add'>+		.capability = ARM64_HAS_SCTLR2,</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, SCTLRX, IMP)</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "GICv5 CPU interface",</div><div class='add'>+		.type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,</div><div class='add'>+		.capability = ARM64_HAS_GICV5_CPUIF,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP)</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "GICv5 Legacy vCPU interface",</div><div class='add'>+		.type = ARM64_CPUCAP_EARLY_LOCAL_CPU_FEATURE,</div><div class='add'>+		.capability = ARM64_HAS_GICV5_LEGACY,</div><div class='add'>+		.matches = test_has_gicv5_legacy,</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2922,6 +3120,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.matches = match,						\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define HWCAP_CAP_MATCH_ID(match, reg, field, min_value, cap_type, cap)		\</div><div class='add'>+	{									\</div><div class='add'>+		__HWCAP_CAP(#cap, cap_type, cap)				\</div><div class='add'>+		HWCAP_CPUID_MATCH(reg, field, min_value) 			\</div><div class='add'>+		.matches = match,						\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARM64_PTR_AUTH</div><div class='ctx'> static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -2950,6 +3155,20 @@ static const struct arm64_cpu_capabilities ptr_auth_hwcap_gen_matches[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_SVE</div><div class='add'>+static bool has_sve_feature(const struct arm64_cpu_capabilities *cap, int scope)</div><div class='add'>+{</div><div class='add'>+	return system_supports_sve() &amp;&amp; has_user_cpuid_feature(cap, scope);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM64_SME</div><div class='add'>+static bool has_sme_feature(const struct arm64_cpu_capabilities *cap, int scope)</div><div class='add'>+{</div><div class='add'>+	return system_supports_sme() &amp;&amp; has_user_cpuid_feature(cap, scope);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES),</div><div class='hunk'>@@ -2968,6 +3187,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR0_EL1, TS, FLAGM, CAP_HWCAP, KERNEL_HWCAP_FLAGM),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR0_EL1, TS, FLAGM2, CAP_HWCAP, KERNEL_HWCAP_FLAGM2),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR0_EL1, RNDR, IMP, CAP_HWCAP, KERNEL_HWCAP_RNG),</div><div class='add'>+	HWCAP_CAP(ID_AA64ISAR3_EL1, FPRCVT, IMP, CAP_HWCAP, KERNEL_HWCAP_FPRCVT),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR0_EL1, FP, IMP, CAP_HWCAP, KERNEL_HWCAP_FP),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR0_EL1, FP, FP16, CAP_HWCAP, KERNEL_HWCAP_FPHP),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR0_EL1, AdvSIMD, IMP, CAP_HWCAP, KERNEL_HWCAP_ASIMD),</div><div class='hunk'>@@ -2989,22 +3209,31 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR1_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_I8MM),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, LUT, IMP, CAP_HWCAP, KERNEL_HWCAP_LUT),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR3_EL1, FAMINMAX, IMP, CAP_HWCAP, KERNEL_HWCAP_FAMINMAX),</div><div class='add'>+	HWCAP_CAP(ID_AA64ISAR3_EL1, LSFE, IMP, CAP_HWCAP, KERNEL_HWCAP_LSFE),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64MMFR2_EL1, AT, IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT),</div><div class='ctx'> #ifdef CONFIG_ARM64_SVE</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR0_EL1, SVE, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),</div><div class='del'>-	HWCAP_CAP(ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2p2, CAP_HWCAP, KERNEL_HWCAP_SVE2P2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, AES2, CAP_HWCAP, KERNEL_HWCAP_SVE_AES2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, B16B16, BFSCALE, CAP_HWCAP, KERNEL_HWCAP_SVE_BFSCALE),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F16MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_F16MM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, EltPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_ELTPERM),</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	HWCAP_CAP(ID_AA64PFR1_EL1, GCS, IMP, CAP_HWCAP, KERNEL_HWCAP_GCS),</div><div class='ctx'> #endif</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR1_EL1, SSBS, SSBS2, CAP_HWCAP, KERNEL_HWCAP_SSBS),</div><div class='ctx'> #ifdef CONFIG_ARM64_BTI</div><div class='hunk'>@@ -3017,10 +3246,13 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {</div><div class='ctx'> #ifdef CONFIG_ARM64_MTE</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3),</div><div class='add'>+	HWCAP_CAP(ID_AA64PFR2_EL1, MTEFAR, IMP, CAP_HWCAP, KERNEL_HWCAP_MTE_FAR),</div><div class='add'>+	HWCAP_CAP(ID_AA64PFR2_EL1, MTESTOREONLY, IMP, CAP_HWCAP , KERNEL_HWCAP_MTE_STORE_ONLY),</div><div class='ctx'> #endif /* CONFIG_ARM64_MTE */</div><div class='ctx'> 	HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, CSSC, IMP, CAP_HWCAP, KERNEL_HWCAP_CSSC),</div><div class='add'>+	HWCAP_CAP(ID_AA64ISAR2_EL1, CSSC, CMPBR, CAP_HWCAP, KERNEL_HWCAP_CMPBR),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, RPRFM, IMP, CAP_HWCAP, KERNEL_HWCAP_RPRFM),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, RPRES, IMP, CAP_HWCAP, KERNEL_HWCAP_RPRES),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, WFxT, IMP, CAP_HWCAP, KERNEL_HWCAP_WFXT),</div><div class='hunk'>@@ -3028,30 +3260,38 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {</div><div class='ctx'> 	HWCAP_CAP(ID_AA64ISAR2_EL1, BC, IMP, CAP_HWCAP, KERNEL_HWCAP_HBC),</div><div class='ctx'> #ifdef CONFIG_ARM64_SME</div><div class='ctx'> 	HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, LUTv2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_LUTV2),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, SMEver, SME2p1, CAP_HWCAP, KERNEL_HWCAP_SME2P1),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, SMEver, SME2, CAP_HWCAP, KERNEL_HWCAP_SME2),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, I16I64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F64F64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, I16I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16B16),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F16F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F16),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F8F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F16),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F8F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, I8I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, B16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, SF8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8FMA),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, SF8DP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP4),</div><div class='del'>-	HWCAP_CAP(ID_AA64SMFR0_EL1, SF8DP2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, LUTv2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_LUTV2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2p2, CAP_HWCAP, KERNEL_HWCAP_SME2P2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2p1, CAP_HWCAP, KERNEL_HWCAP_SME2P1),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2, CAP_HWCAP, KERNEL_HWCAP_SME2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I16I64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F64F64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I16I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16B16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F16F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F8F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F16),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F8F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I8I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, B16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8FMA),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8DP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP4),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8DP2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP2),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SBitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SBITPERM),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_AES),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SFEXPA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SFEXPA),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, STMOP, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_STMOP),</div><div class='add'>+	HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMOP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SMOP4),</div><div class='ctx'> #endif /* CONFIG_ARM64_SME */</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8CVT, IMP, CAP_HWCAP, KERNEL_HWCAP_F8CVT),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_F8FMA),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8DP4, IMP, CAP_HWCAP, KERNEL_HWCAP_F8DP4),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8DP2, IMP, CAP_HWCAP, KERNEL_HWCAP_F8DP2),</div><div class='add'>+	HWCAP_CAP(ID_AA64FPFR0_EL1, F8MM8, IMP, CAP_HWCAP, KERNEL_HWCAP_F8MM8),</div><div class='add'>+	HWCAP_CAP(ID_AA64FPFR0_EL1, F8MM4, IMP, CAP_HWCAP, KERNEL_HWCAP_F8MM4),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8E4M3, IMP, CAP_HWCAP, KERNEL_HWCAP_F8E4M3),</div><div class='ctx'> 	HWCAP_CAP(ID_AA64FPFR0_EL1, F8E5M2, IMP, CAP_HWCAP, KERNEL_HWCAP_F8E5M2),</div><div class='ctx'> #ifdef CONFIG_ARM64_POE</div><div class='hunk'>@@ -3167,18 +3407,49 @@ static void update_cpu_capabilities(u16 scope_mask)</div><div class='ctx'> </div><div class='ctx'> 	scope_mask &amp;= ARM64_CPUCAP_SCOPE_MASK;</div><div class='ctx'> 	for (i = 0; i &lt; ARM64_NCAPS; i++) {</div><div class='add'>+		bool match_all = false;</div><div class='add'>+		bool caps_set = false;</div><div class='add'>+		bool boot_cpu = false;</div><div class='add'>+</div><div class='ctx'> 		caps = cpucap_ptrs[i];</div><div class='del'>-		if (!caps || !(caps-&gt;type &amp; scope_mask) ||</div><div class='del'>-		    cpus_have_cap(caps-&gt;capability) ||</div><div class='del'>-		    !caps-&gt;matches(caps, cpucap_default_scope(caps)))</div><div class='add'>+		if (!caps || !(caps-&gt;type &amp; scope_mask))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		match_all = cpucap_match_all_early_cpus(caps);</div><div class='add'>+		caps_set = cpus_have_cap(caps-&gt;capability);</div><div class='add'>+		boot_cpu = scope_mask &amp; SCOPE_BOOT_CPU;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Unless it's a match-all CPUs feature, avoid probing if</div><div class='add'>+		 * already detected.</div><div class='add'>+		 */</div><div class='add'>+		if (!match_all &amp;&amp; caps_set)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (caps-&gt;desc &amp;&amp; !caps-&gt;cpus)</div><div class='add'>+		/*</div><div class='add'>+		 * A match-all CPUs capability is only set when probing the</div><div class='add'>+		 * boot CPU. It may be cleared subsequently if not detected on</div><div class='add'>+		 * secondary ones.</div><div class='add'>+		 */</div><div class='add'>+		if (match_all &amp;&amp; !caps_set &amp;&amp; !boot_cpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!caps-&gt;matches(caps, cpucap_default_scope(caps))) {</div><div class='add'>+			if (match_all)</div><div class='add'>+				__clear_bit(caps-&gt;capability, system_cpucaps);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Match-all CPUs capabilities are logged later when the</div><div class='add'>+		 * system capabilities are finalised.</div><div class='add'>+		 */</div><div class='add'>+		if (!match_all &amp;&amp; caps-&gt;desc &amp;&amp; !caps-&gt;cpus)</div><div class='ctx'> 			pr_info("detected: %s\n", caps-&gt;desc);</div><div class='ctx'> </div><div class='ctx'> 		__set_bit(caps-&gt;capability, system_cpucaps);</div><div class='ctx'> </div><div class='del'>-		if ((scope_mask &amp; SCOPE_BOOT_CPU) &amp;&amp; (caps-&gt;type &amp; SCOPE_BOOT_CPU))</div><div class='add'>+		if (boot_cpu &amp;&amp; (caps-&gt;type &amp; SCOPE_BOOT_CPU))</div><div class='ctx'> 			set_bit(caps-&gt;capability, boot_cpucaps);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3375,7 +3646,7 @@ static void verify_hyp_capabilities(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	safe_mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);</div><div class='del'>-	mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);</div><div class='add'>+	mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);</div><div class='ctx'> 	mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);</div><div class='ctx'> </div><div class='ctx'> 	/* Verify VMID bits */</div><div class='hunk'>@@ -3396,6 +3667,36 @@ static void verify_hyp_capabilities(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void verify_mpam_capabilities(void)</div><div class='add'>+{</div><div class='add'>+	u64 cpu_idr = read_cpuid(ID_AA64PFR0_EL1);</div><div class='add'>+	u64 sys_idr = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);</div><div class='add'>+	u16 cpu_partid_max, cpu_pmg_max, sys_partid_max, sys_pmg_max;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(ID_AA64PFR0_EL1_MPAM_MASK, cpu_idr) !=</div><div class='add'>+	    FIELD_GET(ID_AA64PFR0_EL1_MPAM_MASK, sys_idr)) {</div><div class='add'>+		pr_crit("CPU%d: MPAM version mismatch\n", smp_processor_id());</div><div class='add'>+		cpu_die_early();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_idr = read_cpuid(MPAMIDR_EL1);</div><div class='add'>+	sys_idr = read_sanitised_ftr_reg(SYS_MPAMIDR_EL1);</div><div class='add'>+	if (FIELD_GET(MPAMIDR_EL1_HAS_HCR, cpu_idr) !=</div><div class='add'>+	    FIELD_GET(MPAMIDR_EL1_HAS_HCR, sys_idr)) {</div><div class='add'>+		pr_crit("CPU%d: Missing MPAM HCR\n", smp_processor_id());</div><div class='add'>+		cpu_die_early();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_partid_max = FIELD_GET(MPAMIDR_EL1_PARTID_MAX, cpu_idr);</div><div class='add'>+	cpu_pmg_max = FIELD_GET(MPAMIDR_EL1_PMG_MAX, cpu_idr);</div><div class='add'>+	sys_partid_max = FIELD_GET(MPAMIDR_EL1_PARTID_MAX, sys_idr);</div><div class='add'>+	sys_pmg_max = FIELD_GET(MPAMIDR_EL1_PMG_MAX, sys_idr);</div><div class='add'>+	if (cpu_partid_max &lt; sys_partid_max || cpu_pmg_max &lt; sys_pmg_max) {</div><div class='add'>+		pr_crit("CPU%d: MPAM PARTID/PMG max values are mismatched\n", smp_processor_id());</div><div class='add'>+		cpu_die_early();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Run through the enabled system capabilities and enable() it on this CPU.</div><div class='ctx'>  * The capabilities were decided based on the available CPUs at the boot time.</div><div class='hunk'>@@ -3422,6 +3723,9 @@ static void verify_local_cpu_capabilities(void)</div><div class='ctx'> </div><div class='ctx'> 	if (is_hyp_mode_available())</div><div class='ctx'> 		verify_hyp_capabilities();</div><div class='add'>+</div><div class='add'>+	if (system_supports_mpam())</div><div class='add'>+		verify_mpam_capabilities();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void check_local_cpu_capabilities(void)</div><div class='hunk'>@@ -3499,8 +3803,14 @@ unsigned long cpu_get_elf_hwcap2(void)</div><div class='ctx'> 	return elf_hwcap[1];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned long cpu_get_elf_hwcap3(void)</div><div class='add'>+{</div><div class='add'>+	return elf_hwcap[2];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init setup_boot_cpu_capabilities(void)</div><div class='ctx'> {</div><div class='add'>+	kvm_arm_target_impl_cpu_init();</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The boot CPU's feature register values have been recorded. Detect</div><div class='ctx'> 	 * boot cpucaps and local cpucaps for the boot CPU, then enable and</div><div class='hunk'>@@ -3540,17 +3850,24 @@ static void __init setup_system_capabilities(void)</div><div class='ctx'> 	enable_cpu_capabilities(SCOPE_ALL &amp; ~SCOPE_BOOT_CPU);</div><div class='ctx'> 	apply_alternatives_all();</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Log any cpucaps with a cpumask as these aren't logged by</div><div class='del'>-	 * update_cpu_capabilities().</div><div class='del'>-	 */</div><div class='ctx'> 	for (int i = 0; i &lt; ARM64_NCAPS; i++) {</div><div class='ctx'> 		const struct arm64_cpu_capabilities *caps = cpucap_ptrs[i];</div><div class='ctx'> </div><div class='del'>-		if (caps &amp;&amp; caps-&gt;cpus &amp;&amp; caps-&gt;desc &amp;&amp;</div><div class='del'>-			cpumask_any(caps-&gt;cpus) &lt; nr_cpu_ids)</div><div class='add'>+		if (!caps || !caps-&gt;desc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Log any cpucaps with a cpumask as these aren't logged by</div><div class='add'>+		 * update_cpu_capabilities().</div><div class='add'>+		 */</div><div class='add'>+		if (caps-&gt;cpus &amp;&amp; cpumask_any(caps-&gt;cpus) &lt; nr_cpu_ids)</div><div class='ctx'> 			pr_info("detected: %s on CPU%*pbl\n",</div><div class='ctx'> 				caps-&gt;desc, cpumask_pr_args(caps-&gt;cpus));</div><div class='add'>+</div><div class='add'>+		/* Log match-all CPUs capabilities */</div><div class='add'>+		if (cpucap_match_all_early_cpus(caps) &amp;&amp;</div><div class='add'>+		    cpus_have_cap(caps-&gt;capability))</div><div class='add'>+			pr_info("detected: %s\n", caps-&gt;desc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3564,6 +3881,7 @@ void __init setup_system_features(void)</div><div class='ctx'> {</div><div class='ctx'> 	setup_system_capabilities();</div><div class='ctx'> </div><div class='add'>+	linear_map_maybe_split_to_ptes();</div><div class='ctx'> 	kpti_install_ng_mappings();</div><div class='ctx'> </div><div class='ctx'> 	sve_setup();</div><div class='hunk'>@@ -3601,7 +3919,14 @@ static int enable_mismatched_32bit_el0(unsigned int cpu)</div><div class='ctx'> 	static int lucky_winner = -1;</div><div class='ctx'> </div><div class='ctx'> 	struct cpuinfo_arm64 *info = &amp;per_cpu(cpu_data, cpu);</div><div class='del'>-	bool cpu_32bit = id_aa64pfr0_32bit_el0(info-&gt;reg_id_aa64pfr0);</div><div class='add'>+	bool cpu_32bit = false;</div><div class='add'>+</div><div class='add'>+	if (id_aa64pfr0_32bit_el0(info-&gt;reg_id_aa64pfr0)) {</div><div class='add'>+		if (!housekeeping_cpu(cpu, HK_TYPE_TICK))</div><div class='add'>+			pr_info("Treating adaptive-ticks CPU %u as 64-bit only\n", cpu);</div><div class='add'>+		else</div><div class='add'>+			cpu_32bit = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_32bit) {</div><div class='ctx'> 		cpumask_set_cpu(cpu, cpu_32bit_el0_mask);</div><div class='head'>diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c<br/>index 44718d0482b3..c44e6d94f5de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpuinfo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/cpuinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/cpuinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/cpuinfo.c</a></div><div class='hunk'>@@ -80,6 +80,7 @@ static const char *const hwcap_str[] = {</div><div class='ctx'> 	[KERNEL_HWCAP_SB]		= "sb",</div><div class='ctx'> 	[KERNEL_HWCAP_PACA]		= "paca",</div><div class='ctx'> 	[KERNEL_HWCAP_PACG]		= "pacg",</div><div class='add'>+	[KERNEL_HWCAP_GCS]		= "gcs",</div><div class='ctx'> 	[KERNEL_HWCAP_DCPODP]		= "dcpodp",</div><div class='ctx'> 	[KERNEL_HWCAP_SVE2]		= "sve2",</div><div class='ctx'> 	[KERNEL_HWCAP_SVEAES]		= "sveaes",</div><div class='hunk'>@@ -144,6 +145,24 @@ static const char *const hwcap_str[] = {</div><div class='ctx'> 	[KERNEL_HWCAP_SME_SF8DP4]	= "smesf8dp4",</div><div class='ctx'> 	[KERNEL_HWCAP_SME_SF8DP2]	= "smesf8dp2",</div><div class='ctx'> 	[KERNEL_HWCAP_POE]		= "poe",</div><div class='add'>+	[KERNEL_HWCAP_CMPBR]		= "cmpbr",</div><div class='add'>+	[KERNEL_HWCAP_FPRCVT]		= "fprcvt",</div><div class='add'>+	[KERNEL_HWCAP_F8MM8]		= "f8mm8",</div><div class='add'>+	[KERNEL_HWCAP_F8MM4]		= "f8mm4",</div><div class='add'>+	[KERNEL_HWCAP_SVE_F16MM]	= "svef16mm",</div><div class='add'>+	[KERNEL_HWCAP_SVE_ELTPERM]	= "sveeltperm",</div><div class='add'>+	[KERNEL_HWCAP_SVE_AES2]		= "sveaes2",</div><div class='add'>+	[KERNEL_HWCAP_SVE_BFSCALE]	= "svebfscale",</div><div class='add'>+	[KERNEL_HWCAP_SVE2P2]		= "sve2p2",</div><div class='add'>+	[KERNEL_HWCAP_SME2P2]		= "sme2p2",</div><div class='add'>+	[KERNEL_HWCAP_SME_SBITPERM]	= "smesbitperm",</div><div class='add'>+	[KERNEL_HWCAP_SME_AES]		= "smeaes",</div><div class='add'>+	[KERNEL_HWCAP_SME_SFEXPA]	= "smesfexpa",</div><div class='add'>+	[KERNEL_HWCAP_SME_STMOP]	= "smestmop",</div><div class='add'>+	[KERNEL_HWCAP_SME_SMOP4]	= "smesmop4",</div><div class='add'>+	[KERNEL_HWCAP_MTE_FAR]		= "mtefar",</div><div class='add'>+	[KERNEL_HWCAP_MTE_STORE_ONLY]	= "mtestoreonly",</div><div class='add'>+	[KERNEL_HWCAP_LSFE]		= "lsfe",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='hunk'>@@ -193,80 +212,79 @@ static const char *const compat_hwcap2_str[] = {</div><div class='ctx'> </div><div class='ctx'> static int c_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	int j;</div><div class='add'>+	int cpu = m-&gt;index;</div><div class='ctx'> 	bool compat = personality(current-&gt;personality) == PER_LINUX32;</div><div class='add'>+	struct cpuinfo_arm64 *cpuinfo = v;</div><div class='add'>+	u32 midr = cpuinfo-&gt;reg_midr;</div><div class='ctx'> </div><div class='del'>-	for_each_online_cpu(i) {</div><div class='del'>-		struct cpuinfo_arm64 *cpuinfo = &amp;per_cpu(cpu_data, i);</div><div class='del'>-		u32 midr = cpuinfo-&gt;reg_midr;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * glibc reads /proc/cpuinfo to determine the number of</div><div class='del'>-		 * online processors, looking for lines beginning with</div><div class='del'>-		 * "processor".  Give glibc what it expects.</div><div class='del'>-		 */</div><div class='del'>-		seq_printf(m, "processor\t: %d\n", i);</div><div class='del'>-		if (compat)</div><div class='del'>-			seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",</div><div class='del'>-				   MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);</div><div class='add'>+	/*</div><div class='add'>+	 * glibc reads /proc/cpuinfo to determine the number of</div><div class='add'>+	 * online processors, looking for lines beginning with</div><div class='add'>+	 * "processor".  Give glibc what it expects.</div><div class='add'>+	 */</div><div class='add'>+	seq_printf(m, "processor\t: %d\n", cpu);</div><div class='add'>+	if (compat)</div><div class='add'>+		seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",</div><div class='add'>+			   MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);</div><div class='ctx'> </div><div class='del'>-		seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",</div><div class='del'>-			   loops_per_jiffy / (500000UL/HZ),</div><div class='del'>-			   loops_per_jiffy / (5000UL/HZ) % 100);</div><div class='add'>+	seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",</div><div class='add'>+		   loops_per_jiffy / (500000UL/HZ),</div><div class='add'>+		   loops_per_jiffy / (5000UL/HZ) % 100);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Dump out the common processor features in a single line.</div><div class='del'>-		 * Userspace should read the hwcaps with getauxval(AT_HWCAP)</div><div class='del'>-		 * rather than attempting to parse this, but there's a body of</div><div class='del'>-		 * software which does already (at least for 32-bit).</div><div class='del'>-		 */</div><div class='del'>-		seq_puts(m, "Features\t:");</div><div class='del'>-		if (compat) {</div><div class='add'>+	/*</div><div class='add'>+	 * Dump out the common processor features in a single line.</div><div class='add'>+	 * Userspace should read the hwcaps with getauxval(AT_HWCAP)</div><div class='add'>+	 * rather than attempting to parse this, but there's a body of</div><div class='add'>+	 * software which does already (at least for 32-bit).</div><div class='add'>+	 */</div><div class='add'>+	seq_puts(m, "Features\t:");</div><div class='add'>+	if (compat) {</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap_str); j++) {</div><div class='del'>-				if (compat_elf_hwcap &amp; (1 &lt;&lt; j)) {</div><div class='del'>-					/*</div><div class='del'>-					 * Warn once if any feature should not</div><div class='del'>-					 * have been present on arm64 platform.</div><div class='del'>-					 */</div><div class='del'>-					if (WARN_ON_ONCE(!compat_hwcap_str[j]))</div><div class='del'>-						continue;</div><div class='del'>-</div><div class='del'>-					seq_printf(m, " %s", compat_hwcap_str[j]);</div><div class='del'>-				}</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap_str); j++) {</div><div class='add'>+			if (compat_elf_hwcap &amp; (1 &lt;&lt; j)) {</div><div class='add'>+				/*</div><div class='add'>+				 * Warn once if any feature should not</div><div class='add'>+				 * have been present on arm64 platform.</div><div class='add'>+				 */</div><div class='add'>+				if (WARN_ON_ONCE(!compat_hwcap_str[j]))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				seq_printf(m, " %s", compat_hwcap_str[j]);</div><div class='ctx'> 			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap2_str); j++)</div><div class='del'>-				if (compat_elf_hwcap2 &amp; (1 &lt;&lt; j))</div><div class='del'>-					seq_printf(m, " %s", compat_hwcap2_str[j]);</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap2_str); j++)</div><div class='add'>+			if (compat_elf_hwcap2 &amp; (1 &lt;&lt; j))</div><div class='add'>+				seq_printf(m, " %s", compat_hwcap2_str[j]);</div><div class='ctx'> #endif /* CONFIG_COMPAT */</div><div class='del'>-		} else {</div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(hwcap_str); j++)</div><div class='del'>-				if (cpu_have_feature(j))</div><div class='del'>-					seq_printf(m, " %s", hwcap_str[j]);</div><div class='del'>-		}</div><div class='del'>-		seq_puts(m, "\n");</div><div class='del'>-</div><div class='del'>-		seq_printf(m, "CPU implementer\t: 0x%02x\n",</div><div class='del'>-			   MIDR_IMPLEMENTOR(midr));</div><div class='del'>-		seq_printf(m, "CPU architecture: 8\n");</div><div class='del'>-		seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));</div><div class='del'>-		seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));</div><div class='del'>-		seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));</div><div class='add'>+	} else {</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(hwcap_str); j++)</div><div class='add'>+			if (cpu_have_feature(j))</div><div class='add'>+				seq_printf(m, " %s", hwcap_str[j]);</div><div class='ctx'> 	}</div><div class='add'>+	seq_puts(m, "\n");</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "CPU implementer\t: 0x%02x\n",</div><div class='add'>+		   MIDR_IMPLEMENTOR(midr));</div><div class='add'>+	seq_puts(m, "CPU architecture: 8\n");</div><div class='add'>+	seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));</div><div class='add'>+	seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));</div><div class='add'>+	seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *c_start(struct seq_file *m, loff_t *pos)</div><div class='ctx'> {</div><div class='del'>-	return *pos &lt; 1 ? (void *)1 : NULL;</div><div class='add'>+	*pos = cpumask_next(*pos - 1, cpu_online_mask);</div><div class='add'>+	return *pos &lt; nr_cpu_ids ? &amp;per_cpu(cpu_data, *pos) : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *c_next(struct seq_file *m, void *v, loff_t *pos)</div><div class='ctx'> {</div><div class='ctx'> 	++*pos;</div><div class='del'>-	return NULL;</div><div class='add'>+	return c_start(m, pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_stop(struct seq_file *m, void *v)</div><div class='hunk'>@@ -312,11 +330,13 @@ static const struct kobj_type cpuregs_kobj_type = {</div><div class='ctx'> </div><div class='ctx'> CPUREGS_ATTR_RO(midr_el1, midr);</div><div class='ctx'> CPUREGS_ATTR_RO(revidr_el1, revidr);</div><div class='add'>+CPUREGS_ATTR_RO(aidr_el1, aidr);</div><div class='ctx'> CPUREGS_ATTR_RO(smidr_el1, smidr);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *cpuregs_id_attrs[] = {</div><div class='ctx'> 	&amp;cpuregs_attr_midr_el1.attr,</div><div class='ctx'> 	&amp;cpuregs_attr_revidr_el1.attr,</div><div class='add'>+	&amp;cpuregs_attr_aidr_el1.attr,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -453,6 +473,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)</div><div class='ctx'> 	info-&gt;reg_dczid = read_cpuid(DCZID_EL0);</div><div class='ctx'> 	info-&gt;reg_midr = read_cpuid_id();</div><div class='ctx'> 	info-&gt;reg_revidr = read_cpuid(REVIDR_EL1);</div><div class='add'>+	info-&gt;reg_aidr = read_cpuid(AIDR_EL1);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1);</div><div class='ctx'> 	info-&gt;reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);</div><div class='hunk'>@@ -478,6 +499,22 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)</div><div class='ctx'> 	if (id_aa64pfr0_32bit_el0(info-&gt;reg_id_aa64pfr0))</div><div class='ctx'> 		__cpuinfo_store_cpu_32bit(&amp;info-&gt;aarch32);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * info-&gt;reg_mpamidr deferred to {init,update}_cpu_features because we</div><div class='add'>+	 * don't want to read it (and trigger a trap on buggy firmware) if</div><div class='add'>+	 * using an aa64pfr0_el1 override to unconditionally disable MPAM.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARM64_SME) &amp;&amp;</div><div class='add'>+	    id_aa64pfr1_sme(info-&gt;reg_id_aa64pfr1)) {</div><div class='add'>+		/*</div><div class='add'>+		 * We mask out SMPS since even if the hardware</div><div class='add'>+		 * supports priorities the kernel does not at present</div><div class='add'>+		 * and we block access to them.</div><div class='add'>+		 */</div><div class='add'>+		info-&gt;reg_smidr = read_cpuid(SMIDR_EL1) &amp; ~SMIDR_EL1_SMPS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	cpuinfo_detect_icache_policy(info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c<br/>index 024a7b245056..29307642f4c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/debug-monitors.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/debug-monitors.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/debug-monitors.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/debug-monitors.c</a></div><div class='hunk'>@@ -21,8 +21,12 @@</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/daifflags.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='add'>+#include &lt;asm/exception.h&gt;</div><div class='add'>+#include &lt;asm/kgdb.h&gt;</div><div class='add'>+#include &lt;asm/kprobes.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/uprobes.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Determine debug architecture. */</div><div class='ctx'> u8 debug_monitors_arch(void)</div><div class='hunk'>@@ -34,7 +38,7 @@ u8 debug_monitors_arch(void)</div><div class='ctx'> /*</div><div class='ctx'>  * MDSCR access routines.</div><div class='ctx'>  */</div><div class='del'>-static void mdscr_write(u32 mdscr)</div><div class='add'>+static void mdscr_write(u64 mdscr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	flags = local_daif_save();</div><div class='hunk'>@@ -43,7 +47,7 @@ static void mdscr_write(u32 mdscr)</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(mdscr_write);</div><div class='ctx'> </div><div class='del'>-static u32 mdscr_read(void)</div><div class='add'>+static u64 mdscr_read(void)</div><div class='ctx'> {</div><div class='ctx'> 	return read_sysreg(mdscr_el1);</div><div class='ctx'> }</div><div class='hunk'>@@ -79,16 +83,16 @@ static DEFINE_PER_CPU(int, kde_ref_count);</div><div class='ctx'> </div><div class='ctx'> void enable_debug_monitors(enum dbg_active_el el)</div><div class='ctx'> {</div><div class='del'>-	u32 mdscr, enable = 0;</div><div class='add'>+	u64 mdscr, enable = 0;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(preemptible());</div><div class='ctx'> </div><div class='ctx'> 	if (this_cpu_inc_return(mde_ref_count) == 1)</div><div class='del'>-		enable = DBG_MDSCR_MDE;</div><div class='add'>+		enable = MDSCR_EL1_MDE;</div><div class='ctx'> </div><div class='ctx'> 	if (el == DBG_ACTIVE_EL1 &amp;&amp;</div><div class='ctx'> 	    this_cpu_inc_return(kde_ref_count) == 1)</div><div class='del'>-		enable |= DBG_MDSCR_KDE;</div><div class='add'>+		enable |= MDSCR_EL1_KDE;</div><div class='ctx'> </div><div class='ctx'> 	if (enable &amp;&amp; debug_enabled) {</div><div class='ctx'> 		mdscr = mdscr_read();</div><div class='hunk'>@@ -100,16 +104,16 @@ NOKPROBE_SYMBOL(enable_debug_monitors);</div><div class='ctx'> </div><div class='ctx'> void disable_debug_monitors(enum dbg_active_el el)</div><div class='ctx'> {</div><div class='del'>-	u32 mdscr, disable = 0;</div><div class='add'>+	u64 mdscr, disable = 0;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(preemptible());</div><div class='ctx'> </div><div class='ctx'> 	if (this_cpu_dec_return(mde_ref_count) == 0)</div><div class='del'>-		disable = ~DBG_MDSCR_MDE;</div><div class='add'>+		disable = ~MDSCR_EL1_MDE;</div><div class='ctx'> </div><div class='ctx'> 	if (el == DBG_ACTIVE_EL1 &amp;&amp;</div><div class='ctx'> 	    this_cpu_dec_return(kde_ref_count) == 0)</div><div class='del'>-		disable &amp;= ~DBG_MDSCR_KDE;</div><div class='add'>+		disable &amp;= ~MDSCR_EL1_KDE;</div><div class='ctx'> </div><div class='ctx'> 	if (disable) {</div><div class='ctx'> 		mdscr = mdscr_read();</div><div class='hunk'>@@ -156,188 +160,124 @@ NOKPROBE_SYMBOL(clear_user_regs_spsr_ss);</div><div class='ctx'> #define set_regs_spsr_ss(r)	set_user_regs_spsr_ss(&amp;(r)-&gt;user_regs)</div><div class='ctx'> #define clear_regs_spsr_ss(r)	clear_user_regs_spsr_ss(&amp;(r)-&gt;user_regs)</div><div class='ctx'> </div><div class='del'>-static DEFINE_SPINLOCK(debug_hook_lock);</div><div class='del'>-static LIST_HEAD(user_step_hook);</div><div class='del'>-static LIST_HEAD(kernel_step_hook);</div><div class='del'>-</div><div class='del'>-static void register_debug_hook(struct list_head *node, struct list_head *list)</div><div class='add'>+static void send_user_sigtrap(int si_code)</div><div class='ctx'> {</div><div class='del'>-	spin_lock(&amp;debug_hook_lock);</div><div class='del'>-	list_add_rcu(node, list);</div><div class='del'>-	spin_unlock(&amp;debug_hook_lock);</div><div class='del'>-</div><div class='del'>-}</div><div class='add'>+	struct pt_regs *regs = current_pt_regs();</div><div class='ctx'> </div><div class='del'>-static void unregister_debug_hook(struct list_head *node)</div><div class='del'>-{</div><div class='del'>-	spin_lock(&amp;debug_hook_lock);</div><div class='del'>-	list_del_rcu(node);</div><div class='del'>-	spin_unlock(&amp;debug_hook_lock);</div><div class='del'>-	synchronize_rcu();</div><div class='del'>-}</div><div class='add'>+	if (WARN_ON(!user_mode(regs)))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-void register_user_step_hook(struct step_hook *hook)</div><div class='del'>-{</div><div class='del'>-	register_debug_hook(&amp;hook-&gt;node, &amp;user_step_hook);</div><div class='del'>-}</div><div class='add'>+	if (!regs_irqs_disabled(regs))</div><div class='add'>+		local_irq_enable();</div><div class='ctx'> </div><div class='del'>-void unregister_user_step_hook(struct step_hook *hook)</div><div class='del'>-{</div><div class='del'>-	unregister_debug_hook(&amp;hook-&gt;node);</div><div class='add'>+	arm64_force_sig_fault(SIGTRAP, si_code, instruction_pointer(regs),</div><div class='add'>+			      "User debug trap");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void register_kernel_step_hook(struct step_hook *hook)</div><div class='add'>+/*</div><div class='add'>+ * We have already unmasked interrupts and enabled preemption</div><div class='add'>+ * when calling do_el0_softstep() from entry-common.c.</div><div class='add'>+ */</div><div class='add'>+void do_el0_softstep(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	register_debug_hook(&amp;hook-&gt;node, &amp;kernel_step_hook);</div><div class='del'>-}</div><div class='add'>+	if (uprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-void unregister_kernel_step_hook(struct step_hook *hook)</div><div class='del'>-{</div><div class='del'>-	unregister_debug_hook(&amp;hook-&gt;node);</div><div class='add'>+	send_user_sigtrap(TRAP_TRACE);</div><div class='add'>+	/*</div><div class='add'>+	 * ptrace will disable single step unless explicitly</div><div class='add'>+	 * asked to re-enable it. For other clients, it makes</div><div class='add'>+	 * sense to leave it enabled (i.e. rewind the controls</div><div class='add'>+	 * to the active-not-pending state).</div><div class='add'>+	 */</div><div class='add'>+	user_rewind_single_step(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Call registered single step handlers</div><div class='del'>- * There is no Syndrome info to check for determining the handler.</div><div class='del'>- * So we call all the registered handlers, until the right handler is</div><div class='del'>- * found which returns zero.</div><div class='del'>- */</div><div class='del'>-static int call_step_hook(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+void do_el1_softstep(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct step_hook *hook;</div><div class='del'>-	struct list_head *list;</div><div class='del'>-	int retval = DBG_HOOK_ERROR;</div><div class='del'>-</div><div class='del'>-	list = user_mode(regs) ? &amp;user_step_hook : &amp;kernel_step_hook;</div><div class='add'>+	if (kgdb_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	pr_warn("Unexpected kernel single-step exception at EL1\n");</div><div class='ctx'> 	/*</div><div class='del'>-	 * Since single-step exception disables interrupt, this function is</div><div class='del'>-	 * entirely not preemptible, and we can use rcu list safely here.</div><div class='add'>+	 * Re-enable stepping since we know that we will be</div><div class='add'>+	 * returning to regs.</div><div class='ctx'> 	 */</div><div class='del'>-	list_for_each_entry_rcu(hook, list, node)	{</div><div class='del'>-		retval = hook-&gt;fn(regs, esr);</div><div class='del'>-		if (retval == DBG_HOOK_HANDLED)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+	set_regs_spsr_ss(regs);</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(call_step_hook);</div><div class='add'>+NOKPROBE_SYMBOL(do_el1_softstep);</div><div class='ctx'> </div><div class='del'>-static void send_user_sigtrap(int si_code)</div><div class='add'>+static int call_el1_break_hook(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	struct pt_regs *regs = current_pt_regs();</div><div class='add'>+	if (esr_brk_comment(esr) == BUG_BRK_IMM)</div><div class='add'>+		return bug_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!user_mode(regs)))</div><div class='del'>-		return;</div><div class='add'>+	if (IS_ENABLED(CONFIG_CFI) &amp;&amp; esr_is_cfi_brk(esr))</div><div class='add'>+		return cfi_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-	if (interrupts_enabled(regs))</div><div class='del'>-		local_irq_enable();</div><div class='add'>+	if (esr_brk_comment(esr) == FAULT_BRK_IMM)</div><div class='add'>+		return reserved_fault_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-	arm64_force_sig_fault(SIGTRAP, si_code, instruction_pointer(regs),</div><div class='del'>-			      "User debug trap");</div><div class='del'>-}</div><div class='add'>+	if (IS_ENABLED(CONFIG_KASAN_SW_TAGS) &amp;&amp;</div><div class='add'>+		(esr_brk_comment(esr) &amp; ~KASAN_BRK_MASK) == KASAN_BRK_IMM)</div><div class='add'>+		return kasan_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-static int single_step_handler(unsigned long unused, unsigned long esr,</div><div class='del'>-			       struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	bool handler_found = false;</div><div class='add'>+	if (IS_ENABLED(CONFIG_UBSAN_TRAP) &amp;&amp; esr_is_ubsan_brk(esr))</div><div class='add'>+		return ubsan_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If we are stepping a pending breakpoint, call the hw_breakpoint</div><div class='del'>-	 * handler first.</div><div class='del'>-	 */</div><div class='del'>-	if (!reinstall_suspended_bps(regs))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!handler_found &amp;&amp; call_step_hook(regs, esr) == DBG_HOOK_HANDLED)</div><div class='del'>-		handler_found = true;</div><div class='del'>-</div><div class='del'>-	if (!handler_found &amp;&amp; user_mode(regs)) {</div><div class='del'>-		send_user_sigtrap(TRAP_TRACE);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * ptrace will disable single step unless explicitly</div><div class='del'>-		 * asked to re-enable it. For other clients, it makes</div><div class='del'>-		 * sense to leave it enabled (i.e. rewind the controls</div><div class='del'>-		 * to the active-not-pending state).</div><div class='del'>-		 */</div><div class='del'>-		user_rewind_single_step(current);</div><div class='del'>-	} else if (!handler_found) {</div><div class='del'>-		pr_warn("Unexpected kernel single-step exception at EL1\n");</div><div class='del'>-		/*</div><div class='del'>-		 * Re-enable stepping since we know that we will be</div><div class='del'>-		 * returning to regs.</div><div class='del'>-		 */</div><div class='del'>-		set_regs_spsr_ss(regs);</div><div class='add'>+	if (IS_ENABLED(CONFIG_KGDB)) {</div><div class='add'>+		if (esr_brk_comment(esr) == KGDB_DYN_DBG_BRK_IMM)</div><div class='add'>+			return kgdb_brk_handler(regs, esr);</div><div class='add'>+		if (esr_brk_comment(esr) == KGDB_COMPILED_DBG_BRK_IMM)</div><div class='add'>+			return kgdb_compiled_brk_handler(regs, esr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-NOKPROBE_SYMBOL(single_step_handler);</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(user_break_hook);</div><div class='del'>-static LIST_HEAD(kernel_break_hook);</div><div class='add'>+	if (IS_ENABLED(CONFIG_KPROBES)) {</div><div class='add'>+		if (esr_brk_comment(esr) == KPROBES_BRK_IMM)</div><div class='add'>+			return kprobe_brk_handler(regs, esr);</div><div class='add'>+		if (esr_brk_comment(esr) == KPROBES_BRK_SS_IMM)</div><div class='add'>+			return kprobe_ss_brk_handler(regs, esr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-void register_user_break_hook(struct break_hook *hook)</div><div class='del'>-{</div><div class='del'>-	register_debug_hook(&amp;hook-&gt;node, &amp;user_break_hook);</div><div class='del'>-}</div><div class='add'>+	if (IS_ENABLED(CONFIG_KRETPROBES) &amp;&amp;</div><div class='add'>+		esr_brk_comment(esr) == KRETPROBES_BRK_IMM)</div><div class='add'>+		return kretprobe_brk_handler(regs, esr);</div><div class='ctx'> </div><div class='del'>-void unregister_user_break_hook(struct break_hook *hook)</div><div class='del'>-{</div><div class='del'>-	unregister_debug_hook(&amp;hook-&gt;node);</div><div class='add'>+	return DBG_HOOK_ERROR;</div><div class='ctx'> }</div><div class='add'>+NOKPROBE_SYMBOL(call_el1_break_hook);</div><div class='ctx'> </div><div class='del'>-void register_kernel_break_hook(struct break_hook *hook)</div><div class='add'>+/*</div><div class='add'>+ * We have already unmasked interrupts and enabled preemption</div><div class='add'>+ * when calling do_el0_brk64() from entry-common.c.</div><div class='add'>+ */</div><div class='add'>+void do_el0_brk64(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	register_debug_hook(&amp;hook-&gt;node, &amp;kernel_break_hook);</div><div class='del'>-}</div><div class='add'>+	if (IS_ENABLED(CONFIG_UPROBES) &amp;&amp;</div><div class='add'>+		esr_brk_comment(esr) == UPROBES_BRK_IMM &amp;&amp;</div><div class='add'>+		uprobe_brk_handler(regs, esr) == DBG_HOOK_HANDLED)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-void unregister_kernel_break_hook(struct break_hook *hook)</div><div class='del'>-{</div><div class='del'>-	unregister_debug_hook(&amp;hook-&gt;node);</div><div class='add'>+	send_user_sigtrap(TRAP_BRKPT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int call_break_hook(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+void do_el1_brk64(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct break_hook *hook;</div><div class='del'>-	struct list_head *list;</div><div class='del'>-	int (*fn)(struct pt_regs *regs, unsigned long esr) = NULL;</div><div class='del'>-</div><div class='del'>-	list = user_mode(regs) ? &amp;user_break_hook : &amp;kernel_break_hook;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Since brk exception disables interrupt, this function is</div><div class='del'>-	 * entirely not preemptible, and we can use rcu list safely here.</div><div class='del'>-	 */</div><div class='del'>-	list_for_each_entry_rcu(hook, list, node) {</div><div class='del'>-		if ((esr_brk_comment(esr) &amp; ~hook-&gt;mask) == hook-&gt;imm)</div><div class='del'>-			fn = hook-&gt;fn;</div><div class='del'>-	}</div><div class='add'>+	if (call_el1_break_hook(regs, esr) == DBG_HOOK_HANDLED)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;</div><div class='add'>+	die("Oops - BRK", regs, esr);</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(call_break_hook);</div><div class='add'>+NOKPROBE_SYMBOL(do_el1_brk64);</div><div class='ctx'> </div><div class='del'>-static int brk_handler(unsigned long unused, unsigned long esr,</div><div class='del'>-		       struct pt_regs *regs)</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+void do_bkpt32(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (user_mode(regs)) {</div><div class='del'>-		send_user_sigtrap(TRAP_BRKPT);</div><div class='del'>-	} else {</div><div class='del'>-		pr_warn("Unexpected kernel BRK exception at EL1\n");</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	arm64_notify_die("aarch32 BKPT", regs, SIGTRAP, TRAP_BRKPT, regs-&gt;pc, esr);</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(brk_handler);</div><div class='add'>+#endif /* CONFIG_COMPAT */</div><div class='ctx'> </div><div class='del'>-int aarch32_break_handler(struct pt_regs *regs)</div><div class='add'>+bool try_handle_aarch32_break(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u32 arm_instr;</div><div class='ctx'> 	u16 thumb_instr;</div><div class='hunk'>@@ -345,7 +285,7 @@ int aarch32_break_handler(struct pt_regs *regs)</div><div class='ctx'> 	void __user *pc = (void __user *)instruction_pointer(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (!compat_user_mode(regs))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (compat_thumb_mode(regs)) {</div><div class='ctx'> 		/* get 16-bit Thumb instruction */</div><div class='hunk'>@@ -369,20 +309,12 @@ int aarch32_break_handler(struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!bp)</div><div class='del'>-		return -EFAULT;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	send_user_sigtrap(TRAP_BRKPT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-NOKPROBE_SYMBOL(aarch32_break_handler);</div><div class='del'>-</div><div class='del'>-void __init debug_traps_init(void)</div><div class='del'>-{</div><div class='del'>-	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,</div><div class='del'>-			      TRAP_TRACE, "single-step handler");</div><div class='del'>-	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,</div><div class='del'>-			      TRAP_BRKPT, "BRK handler");</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='add'>+NOKPROBE_SYMBOL(try_handle_aarch32_break);</div><div class='ctx'> </div><div class='ctx'> /* Re-enable single step for syscall restarting. */</div><div class='ctx'> void user_rewind_single_step(struct task_struct *task)</div><div class='hunk'>@@ -416,7 +348,7 @@ void kernel_enable_single_step(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON(!irqs_disabled());</div><div class='ctx'> 	set_regs_spsr_ss(regs);</div><div class='del'>-	mdscr_write(mdscr_read() | DBG_MDSCR_SS);</div><div class='add'>+	mdscr_write(mdscr_read() | MDSCR_EL1_SS);</div><div class='ctx'> 	enable_debug_monitors(DBG_ACTIVE_EL1);</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(kernel_enable_single_step);</div><div class='hunk'>@@ -424,7 +356,7 @@ NOKPROBE_SYMBOL(kernel_enable_single_step);</div><div class='ctx'> void kernel_disable_single_step(void)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON(!irqs_disabled());</div><div class='del'>-	mdscr_write(mdscr_read() &amp; ~DBG_MDSCR_SS);</div><div class='add'>+	mdscr_write(mdscr_read() &amp; ~MDSCR_EL1_SS);</div><div class='ctx'> 	disable_debug_monitors(DBG_ACTIVE_EL1);</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(kernel_disable_single_step);</div><div class='hunk'>@@ -432,7 +364,7 @@ NOKPROBE_SYMBOL(kernel_disable_single_step);</div><div class='ctx'> int kernel_active_single_step(void)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON(!irqs_disabled());</div><div class='del'>-	return mdscr_read() &amp; DBG_MDSCR_SS;</div><div class='add'>+	return mdscr_read() &amp; MDSCR_EL1_SS;</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(kernel_active_single_step);</div><div class='ctx'> </div><div class='hunk'>@@ -441,6 +373,11 @@ void kernel_rewind_single_step(struct pt_regs *regs)</div><div class='ctx'> 	set_regs_spsr_ss(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kernel_fastforward_single_step(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	clear_regs_spsr_ss(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* ptrace API */</div><div class='ctx'> void user_enable_single_step(struct task_struct *task)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/kernel/efi-header.S b/arch/arm64/kernel/efi-header.S<br/>index 11d7f7de202d..329e8df9215f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/efi-header.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/efi-header.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/efi-header.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/efi-header.S</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> 	.macro	__EFI_PE_HEADER</div><div class='ctx'> #ifdef CONFIG_EFI</div><div class='ctx'> 	.set	.Lpe_header_offset, . - .L_head</div><div class='del'>-	.long	PE_MAGIC</div><div class='add'>+	.long	IMAGE_NT_SIGNATURE</div><div class='ctx'> 	.short	IMAGE_FILE_MACHINE_ARM64		// Machine</div><div class='ctx'> 	.short	.Lsection_count				// NumberOfSections</div><div class='ctx'> 	.long	0 					// TimeDateStamp</div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> 		IMAGE_FILE_LINE_NUMS_STRIPPED		// Characteristics</div><div class='ctx'> </div><div class='ctx'> .Loptional_header:</div><div class='del'>-	.short	PE_OPT_MAGIC_PE32PLUS			// PE32+ format</div><div class='add'>+	.short	IMAGE_NT_OPTIONAL_HDR64_MAGIC		// PE32+ format</div><div class='ctx'> 	.byte	0x02					// MajorLinkerVersion</div><div class='ctx'> 	.byte	0x14					// MinorLinkerVersion</div><div class='ctx'> 	.long	__initdata_begin - .Lefi_header_end	// SizeOfCode</div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> 	.long	.Lefi_header_end - .L_head		// SizeOfHeaders</div><div class='ctx'> 	.long	0					// CheckSum</div><div class='ctx'> 	.short	IMAGE_SUBSYSTEM_EFI_APPLICATION		// Subsystem</div><div class='del'>-	.short	IMAGE_DLL_CHARACTERISTICS_NX_COMPAT	// DllCharacteristics</div><div class='add'>+	.short	IMAGE_DLLCHARACTERISTICS_NX_COMPAT	// DllCharacteristics</div><div class='ctx'> 	.quad	0					// SizeOfStackReserve</div><div class='ctx'> 	.quad	0					// SizeOfStackCommit</div><div class='ctx'> 	.quad	0					// SizeOfHeapReserve</div><div class='head'>diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c<br/>index 712718aed5dd..6c371b158b99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/efi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/efi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/efi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/efi.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/efi.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='add'>+#include &lt;asm/vmap_stack.h&gt;</div><div class='ctx'> </div><div class='ctx'> static bool region_is_misaligned(const efi_memory_desc_t *md)</div><div class='ctx'> {</div><div class='hunk'>@@ -29,13 +30,21 @@ static bool region_is_misaligned(const efi_memory_desc_t *md)</div><div class='ctx'>  * executable, everything else can be mapped with the XN bits</div><div class='ctx'>  * set. Also take the new (optional) RO/XP bits into account.</div><div class='ctx'>  */</div><div class='del'>-static __init pteval_t create_mapping_protection(efi_memory_desc_t *md)</div><div class='add'>+static __init ptdesc_t create_mapping_protection(efi_memory_desc_t *md)</div><div class='ctx'> {</div><div class='ctx'> 	u64 attr = md-&gt;attribute;</div><div class='ctx'> 	u32 type = md-&gt;type;</div><div class='ctx'> </div><div class='del'>-	if (type == EFI_MEMORY_MAPPED_IO)</div><div class='del'>-		return PROT_DEVICE_nGnRE;</div><div class='add'>+	if (type == EFI_MEMORY_MAPPED_IO) {</div><div class='add'>+		pgprot_t prot = __pgprot(PROT_DEVICE_nGnRE);</div><div class='add'>+</div><div class='add'>+		if (arm64_is_protected_mmio(md-&gt;phys_addr,</div><div class='add'>+					    md-&gt;num_pages &lt;&lt; EFI_PAGE_SHIFT))</div><div class='add'>+			prot = pgprot_encrypted(prot);</div><div class='add'>+		else</div><div class='add'>+			prot = pgprot_decrypted(prot);</div><div class='add'>+		return pgprot_val(prot);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (region_is_misaligned(md)) {</div><div class='ctx'> 		static bool __initdata code_is_misaligned;</div><div class='hunk'>@@ -75,7 +84,7 @@ static __init pteval_t create_mapping_protection(efi_memory_desc_t *md)</div><div class='ctx'> </div><div class='ctx'> int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md)</div><div class='ctx'> {</div><div class='del'>-	pteval_t prot_val = create_mapping_protection(md);</div><div class='add'>+	ptdesc_t prot_val = create_mapping_protection(md);</div><div class='ctx'> 	bool page_mappings_only = (md-&gt;type == EFI_RUNTIME_SERVICES_CODE ||</div><div class='ctx'> 				   md-&gt;type == EFI_RUNTIME_SERVICES_DATA);</div><div class='ctx'> </div><div class='hunk'>@@ -161,14 +170,14 @@ static DEFINE_RAW_SPINLOCK(efi_rt_lock);</div><div class='ctx'> void arch_efi_call_virt_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	efi_virtmap_load();</div><div class='del'>-	__efi_fpsimd_begin();</div><div class='ctx'> 	raw_spin_lock(&amp;efi_rt_lock);</div><div class='add'>+	__efi_fpsimd_begin();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_efi_call_virt_teardown(void)</div><div class='ctx'> {</div><div class='del'>-	raw_spin_unlock(&amp;efi_rt_lock);</div><div class='ctx'> 	__efi_fpsimd_end();</div><div class='add'>+	raw_spin_unlock(&amp;efi_rt_lock);</div><div class='ctx'> 	efi_virtmap_unload();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -206,9 +215,8 @@ static int __init arm64_efi_rt_init(void)</div><div class='ctx'> 	if (!efi_enabled(EFI_RUNTIME_SERVICES))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	p = __vmalloc_node(THREAD_SIZE, THREAD_ALIGN, GFP_KERNEL,</div><div class='del'>-			   NUMA_NO_NODE, &amp;&amp;l);</div><div class='del'>-l:	if (!p) {</div><div class='add'>+	p = arch_alloc_vmap_stack(THREAD_SIZE, NUMA_NO_NODE);</div><div class='add'>+	if (!p) {</div><div class='ctx'> 		pr_warn("Failed to allocate EFI runtime stack\n");</div><div class='ctx'> 		clear_bit(EFI_RUNTIME_SERVICES, &amp;efi.flags);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm64/kernel/elfcore.c b/arch/arm64/kernel/elfcore.c<br/>index 2e94d20c4ac7..b735f4c2fe5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/elfcore.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/elfcore.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/elfcore.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/elfcore.c</a></div><div class='hunk'>@@ -27,9 +27,10 @@ static int mte_dump_tag_range(struct coredump_params *cprm,</div><div class='ctx'> 	int ret = 1;</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> 	void *tags = NULL;</div><div class='add'>+	int locked = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (addr = start; addr &lt; start + len; addr += PAGE_SIZE) {</div><div class='del'>-		struct page *page = get_dump_page(addr);</div><div class='add'>+		struct page *page = get_dump_page(addr, &amp;locked);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * get_dump_page() returns NULL when encountering an empty</div><div class='head'>diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c<br/>index 3fcd9d080bf2..f546a914f041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry-common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/entry-common.c</a></div><div class='hunk'>@@ -6,8 +6,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;</div><div class='add'>+#include &lt;linux/irq-entry-common.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/livepatch.h&gt;</div><div class='ctx'> #include &lt;linux/lockdep.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/resume_user_mode.h&gt;</div><div class='hunk'>@@ -36,29 +38,20 @@</div><div class='ctx'>  * This is intended to match the logic in irqentry_enter(), handling the kernel</div><div class='ctx'>  * mode transitions only.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __enter_from_kernel_mode(struct pt_regs *regs)</div><div class='add'>+static __always_inline irqentry_state_t __enter_from_kernel_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	regs-&gt;exit_rcu = false;</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_TINY_RCU) &amp;&amp; is_idle_task(current)) {</div><div class='del'>-		lockdep_hardirqs_off(CALLER_ADDR0);</div><div class='del'>-		ct_irq_enter();</div><div class='del'>-		trace_hardirqs_off_finish();</div><div class='del'>-</div><div class='del'>-		regs-&gt;exit_rcu = true;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lockdep_hardirqs_off(CALLER_ADDR0);</div><div class='del'>-	rcu_irq_enter_check_tick();</div><div class='del'>-	trace_hardirqs_off_finish();</div><div class='add'>+	return irqentry_enter(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void noinstr enter_from_kernel_mode(struct pt_regs *regs)</div><div class='add'>+static noinstr irqentry_state_t enter_from_kernel_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	__enter_from_kernel_mode(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = __enter_from_kernel_mode(regs);</div><div class='ctx'> 	mte_check_tfsr_entry();</div><div class='ctx'> 	mte_disable_tco_entry(current);</div><div class='add'>+</div><div class='add'>+	return state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -69,30 +62,17 @@ static void noinstr enter_from_kernel_mode(struct pt_regs *regs)</div><div class='ctx'>  * This is intended to match the logic in irqentry_exit(), handling the kernel</div><div class='ctx'>  * mode transitions only, and with preemption handled elsewhere.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __exit_to_kernel_mode(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_irqs_disabled();</div><div class='del'>-</div><div class='del'>-	if (interrupts_enabled(regs)) {</div><div class='del'>-		if (regs-&gt;exit_rcu) {</div><div class='del'>-			trace_hardirqs_on_prepare();</div><div class='del'>-			lockdep_hardirqs_on_prepare();</div><div class='del'>-			ct_irq_exit();</div><div class='del'>-			lockdep_hardirqs_on(CALLER_ADDR0);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		trace_hardirqs_on();</div><div class='del'>-	} else {</div><div class='del'>-		if (regs-&gt;exit_rcu)</div><div class='del'>-			ct_irq_exit();</div><div class='del'>-	}</div><div class='add'>+static __always_inline void __exit_to_kernel_mode(struct pt_regs *regs,</div><div class='add'>+						  irqentry_state_t state)</div><div class='add'>+{</div><div class='add'>+	irqentry_exit(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void noinstr exit_to_kernel_mode(struct pt_regs *regs)</div><div class='add'>+static void noinstr exit_to_kernel_mode(struct pt_regs *regs,</div><div class='add'>+					irqentry_state_t state)</div><div class='ctx'> {</div><div class='ctx'> 	mte_check_tfsr_exit();</div><div class='del'>-	__exit_to_kernel_mode(regs);</div><div class='add'>+	__exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -100,18 +80,15 @@ static void noinstr exit_to_kernel_mode(struct pt_regs *regs)</div><div class='ctx'>  * Before this function is called it is not safe to call regular kernel code,</div><div class='ctx'>  * instrumentable code, or any code which may trigger an exception.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __enter_from_user_mode(void)</div><div class='add'>+static __always_inline void __enter_from_user_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	lockdep_hardirqs_off(CALLER_ADDR0);</div><div class='del'>-	CT_WARN_ON(ct_state() != CT_STATE_USER);</div><div class='del'>-	user_exit_irqoff();</div><div class='del'>-	trace_hardirqs_off_finish();</div><div class='add'>+	enter_from_user_mode(regs);</div><div class='ctx'> 	mte_disable_tco_entry(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void enter_from_user_mode(struct pt_regs *regs)</div><div class='add'>+static __always_inline void arm64_enter_from_user_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	__enter_from_user_mode();</div><div class='add'>+	__enter_from_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -119,110 +96,19 @@ static __always_inline void enter_from_user_mode(struct pt_regs *regs)</div><div class='ctx'>  * After this function returns it is not safe to call regular kernel code,</div><div class='ctx'>  * instrumentable code, or any code which may trigger an exception.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __exit_to_user_mode(void)</div><div class='del'>-{</div><div class='del'>-	trace_hardirqs_on_prepare();</div><div class='del'>-	lockdep_hardirqs_on_prepare();</div><div class='del'>-	user_enter_irqoff();</div><div class='del'>-	lockdep_hardirqs_on(CALLER_ADDR0);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void do_notify_resume(struct pt_regs *regs, unsigned long thread_flags)</div><div class='add'>+static __always_inline void arm64_exit_to_user_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	do {</div><div class='del'>-		local_irq_enable();</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; _TIF_NEED_RESCHED)</div><div class='del'>-			schedule();</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; _TIF_UPROBE)</div><div class='del'>-			uprobe_notify_resume(regs);</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; _TIF_MTE_ASYNC_FAULT) {</div><div class='del'>-			clear_thread_flag(TIF_MTE_ASYNC_FAULT);</div><div class='del'>-			send_sig_fault(SIGSEGV, SEGV_MTEAERR,</div><div class='del'>-				       (void __user *)NULL, current);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; (_TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL))</div><div class='del'>-			do_signal(regs);</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; _TIF_NOTIFY_RESUME)</div><div class='del'>-			resume_user_mode_work(regs);</div><div class='del'>-</div><div class='del'>-		if (thread_flags &amp; _TIF_FOREIGN_FPSTATE)</div><div class='del'>-			fpsimd_restore_current_state();</div><div class='del'>-</div><div class='del'>-		local_irq_disable();</div><div class='del'>-		thread_flags = read_thread_flags();</div><div class='del'>-	} while (thread_flags &amp; _TIF_WORK_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline void exit_to_user_mode_prepare(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='ctx'> 	local_irq_disable();</div><div class='del'>-</div><div class='del'>-	flags = read_thread_flags();</div><div class='del'>-	if (unlikely(flags &amp; _TIF_WORK_MASK))</div><div class='del'>-		do_notify_resume(regs, flags);</div><div class='del'>-</div><div class='del'>-	local_daif_mask();</div><div class='del'>-</div><div class='del'>-	lockdep_sys_exit();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline void exit_to_user_mode(struct pt_regs *regs)</div><div class='del'>-{</div><div class='ctx'> 	exit_to_user_mode_prepare(regs);</div><div class='add'>+	local_daif_mask();</div><div class='ctx'> 	mte_check_tfsr_exit();</div><div class='del'>-	__exit_to_user_mode();</div><div class='add'>+	exit_to_user_mode();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr asm_exit_to_user_mode(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle IRQ/context state management when entering an NMI from user/kernel</div><div class='del'>- * mode. Before this function is called it is not safe to call regular kernel</div><div class='del'>- * code, instrumentable code, or any code which may trigger an exception.</div><div class='del'>- */</div><div class='del'>-static void noinstr arm64_enter_nmi(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	regs-&gt;lockdep_hardirqs = lockdep_hardirqs_enabled();</div><div class='del'>-</div><div class='del'>-	__nmi_enter();</div><div class='del'>-	lockdep_hardirqs_off(CALLER_ADDR0);</div><div class='del'>-	lockdep_hardirq_enter();</div><div class='del'>-	ct_nmi_enter();</div><div class='del'>-</div><div class='del'>-	trace_hardirqs_off_finish();</div><div class='del'>-	ftrace_nmi_enter();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle IRQ/context state management when exiting an NMI from user/kernel</div><div class='del'>- * mode. After this function returns it is not safe to call regular kernel</div><div class='del'>- * code, instrumentable code, or any code which may trigger an exception.</div><div class='del'>- */</div><div class='del'>-static void noinstr arm64_exit_nmi(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	bool restore = regs-&gt;lockdep_hardirqs;</div><div class='del'>-</div><div class='del'>-	ftrace_nmi_exit();</div><div class='del'>-	if (restore) {</div><div class='del'>-		trace_hardirqs_on_prepare();</div><div class='del'>-		lockdep_hardirqs_on_prepare();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ct_nmi_exit();</div><div class='del'>-	lockdep_hardirq_exit();</div><div class='del'>-	if (restore)</div><div class='del'>-		lockdep_hardirqs_on(CALLER_ADDR0);</div><div class='del'>-	__nmi_exit();</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -230,14 +116,18 @@ static void noinstr arm64_exit_nmi(struct pt_regs *regs)</div><div class='ctx'>  * kernel mode. Before this function is called it is not safe to call regular</div><div class='ctx'>  * kernel code, instrumentable code, or any code which may trigger an exception.</div><div class='ctx'>  */</div><div class='del'>-static void noinstr arm64_enter_el1_dbg(struct pt_regs *regs)</div><div class='add'>+static noinstr irqentry_state_t arm64_enter_el1_dbg(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	regs-&gt;lockdep_hardirqs = lockdep_hardirqs_enabled();</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state.lockdep = lockdep_hardirqs_enabled();</div><div class='ctx'> </div><div class='ctx'> 	lockdep_hardirqs_off(CALLER_ADDR0);</div><div class='ctx'> 	ct_nmi_enter();</div><div class='ctx'> </div><div class='ctx'> 	trace_hardirqs_off_finish();</div><div class='add'>+</div><div class='add'>+	return state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -245,62 +135,19 @@ static void noinstr arm64_enter_el1_dbg(struct pt_regs *regs)</div><div class='ctx'>  * kernel mode. After this function returns it is not safe to call regular</div><div class='ctx'>  * kernel code, instrumentable code, or any code which may trigger an exception.</div><div class='ctx'>  */</div><div class='del'>-static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs)</div><div class='add'>+static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs,</div><div class='add'>+				       irqentry_state_t state)</div><div class='ctx'> {</div><div class='del'>-	bool restore = regs-&gt;lockdep_hardirqs;</div><div class='del'>-</div><div class='del'>-	if (restore) {</div><div class='add'>+	if (state.lockdep) {</div><div class='ctx'> 		trace_hardirqs_on_prepare();</div><div class='ctx'> 		lockdep_hardirqs_on_prepare();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ct_nmi_exit();</div><div class='del'>-	if (restore)</div><div class='add'>+	if (state.lockdep)</div><div class='ctx'> 		lockdep_hardirqs_on(CALLER_ADDR0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PREEMPT_DYNAMIC</div><div class='del'>-DEFINE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='del'>-#define need_irq_preemption() \</div><div class='del'>-	(static_branch_unlikely(&amp;sk_dynamic_irqentry_exit_cond_resched))</div><div class='del'>-#else</div><div class='del'>-#define need_irq_preemption()	(IS_ENABLED(CONFIG_PREEMPTION))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void __sched arm64_preempt_schedule_irq(void)</div><div class='del'>-{</div><div class='del'>-	if (!need_irq_preemption())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Note: thread_info::preempt_count includes both thread_info::count</div><div class='del'>-	 * and thread_info::need_resched, and is not equivalent to</div><div class='del'>-	 * preempt_count().</div><div class='del'>-	 */</div><div class='del'>-	if (READ_ONCE(current_thread_info()-&gt;preempt_count) != 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC</div><div class='del'>-	 * priority masking is used the GIC irqchip driver will clear DAIF.IF</div><div class='del'>-	 * using gic_arch_enable_irqs() for normal IRQs. If anything is set in</div><div class='del'>-	 * DAIF we must have handled an NMI, so skip preemption.</div><div class='del'>-	 */</div><div class='del'>-	if (system_uses_irq_prio_masking() &amp;&amp; read_sysreg(daif))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Preempting a task from an IRQ means we leave copies of PSTATE</div><div class='del'>-	 * on the stack. cpufeature's enable calls may modify PSTATE, but</div><div class='del'>-	 * resuming one of these preempted tasks would undo those changes.</div><div class='del'>-	 *</div><div class='del'>-	 * Only allow a task to be preempted once cpufeatures have been</div><div class='del'>-	 * enabled.</div><div class='del'>-	 */</div><div class='del'>-	if (system_capabilities_finalized())</div><div class='del'>-		preempt_schedule_irq();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void do_interrupt_handler(struct pt_regs *regs,</div><div class='ctx'> 				 void (*handler)(struct pt_regs *))</div><div class='ctx'> {</div><div class='hunk'>@@ -320,7 +167,7 @@ extern void (*handle_arch_fiq)(struct pt_regs *);</div><div class='ctx'> static void noinstr __panic_unhandled(struct pt_regs *regs, const char *vector,</div><div class='ctx'> 				      unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	irqentry_nmi_enter(regs);</div><div class='ctx'> </div><div class='ctx'> 	console_verbose();</div><div class='ctx'> </div><div class='hunk'>@@ -344,7 +191,7 @@ static DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);</div><div class='ctx'> </div><div class='ctx'> static void cortex_a76_erratum_1463225_svc_handler(void)</div><div class='ctx'> {</div><div class='del'>-	u32 reg, val;</div><div class='add'>+	u64 reg, val;</div><div class='ctx'> </div><div class='ctx'> 	if (!unlikely(test_thread_flag(TIF_SINGLESTEP)))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -354,7 +201,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)</div><div class='ctx'> </div><div class='ctx'> 	__this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);</div><div class='ctx'> 	reg = read_sysreg(mdscr_el1);</div><div class='del'>-	val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;</div><div class='add'>+	val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;</div><div class='ctx'> 	write_sysreg(val, mdscr_el1);</div><div class='ctx'> 	asm volatile("msr daifclr, #8");</div><div class='ctx'> 	isb();</div><div class='hunk'>@@ -393,20 +240,16 @@ static bool cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)</div><div class='ctx'>  * As per the ABI exit SME streaming mode and clear the SVE state not</div><div class='ctx'>  * shared with FPSIMD on syscall entry.</div><div class='ctx'>  */</div><div class='del'>-static inline void fp_user_discard(void)</div><div class='add'>+static inline void fpsimd_syscall_enter(void)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * If SME is active then exit streaming mode.  If ZA is active</div><div class='del'>-	 * then flush the SVE registers but leave userspace access to</div><div class='del'>-	 * both SVE and SME enabled, otherwise disable SME for the</div><div class='del'>-	 * task and fall through to disabling SVE too.  This means</div><div class='del'>-	 * that after a syscall we never have any streaming mode</div><div class='del'>-	 * register state to track, if this changes the KVM code will</div><div class='del'>-	 * need updating.</div><div class='del'>-	 */</div><div class='add'>+	/* Ensure PSTATE.SM is clear, but leave PSTATE.ZA as-is. */</div><div class='ctx'> 	if (system_supports_sme())</div><div class='ctx'> 		sme_smstop_sm();</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The CPU is not in streaming mode. If non-streaming SVE is not</div><div class='add'>+	 * supported, there is no SVE state that needs to be discarded.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!system_supports_sve())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -416,7 +259,56 @@ static inline void fp_user_discard(void)</div><div class='ctx'> 		sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1;</div><div class='ctx'> 		sve_flush_live(true, sve_vq_minus_one);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Any live non-FPSIMD SVE state has been zeroed. Allow</div><div class='add'>+	 * fpsimd_save_user_state() to lazily discard SVE state until either</div><div class='add'>+	 * the live state is unbound or fpsimd_syscall_exit() is called.</div><div class='add'>+	 */</div><div class='add'>+	__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_FPSIMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void fpsimd_syscall_exit(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_sve())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The current task's user FPSIMD/SVE/SME state is now bound to this</div><div class='add'>+	 * CPU. The fpsimd_last_state.to_save value is either:</div><div class='add'>+	 *</div><div class='add'>+	 * - FP_STATE_FPSIMD, if the state has not been reloaded on this CPU</div><div class='add'>+	 *   since fpsimd_syscall_enter().</div><div class='add'>+	 *</div><div class='add'>+	 * - FP_STATE_CURRENT, if the state has been reloaded on this CPU at</div><div class='add'>+	 *   any point.</div><div class='add'>+	 *</div><div class='add'>+	 * Reset this to FP_STATE_CURRENT to stop lazy discarding.</div><div class='add'>+	 */</div><div class='add'>+	__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_CURRENT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In debug exception context, we explicitly disable preemption despite</div><div class='add'>+ * having interrupts disabled.</div><div class='add'>+ * This serves two purposes: it makes it much less likely that we would</div><div class='add'>+ * accidentally schedule in exception context and it will force a warning</div><div class='add'>+ * if we somehow manage to schedule by accident.</div><div class='add'>+ */</div><div class='add'>+static void debug_exception_enter(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+</div><div class='add'>+	/* This code is a bit fragile.  Test it. */</div><div class='add'>+	RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");</div><div class='add'>+}</div><div class='add'>+NOKPROBE_SYMBOL(debug_exception_enter);</div><div class='add'>+</div><div class='add'>+static void debug_exception_exit(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	preempt_enable_no_resched();</div><div class='ctx'> }</div><div class='add'>+NOKPROBE_SYMBOL(debug_exception_exit);</div><div class='ctx'> </div><div class='ctx'> UNHANDLED(el1t, 64, sync)</div><div class='ctx'> UNHANDLED(el1t, 64, irq)</div><div class='hunk'>@@ -426,60 +318,135 @@ UNHANDLED(el1t, 64, error)</div><div class='ctx'> static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> </div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> 	local_daif_inherit(regs);</div><div class='ctx'> 	do_mem_abort(far, esr, regs);</div><div class='ctx'> 	local_daif_mask();</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> </div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> 	local_daif_inherit(regs);</div><div class='ctx'> 	do_sp_pc_abort(far, esr, regs);</div><div class='ctx'> 	local_daif_mask();</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el1_undef(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> 	local_daif_inherit(regs);</div><div class='ctx'> 	do_el1_undef(regs, esr);</div><div class='ctx'> 	local_daif_mask();</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el1_bti(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> 	local_daif_inherit(regs);</div><div class='ctx'> 	do_el1_bti(regs, esr);</div><div class='ctx'> 	local_daif_mask();</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el1_gcs(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='add'>+	local_daif_inherit(regs);</div><div class='add'>+	do_el1_gcs(regs, esr);</div><div class='add'>+	local_daif_mask();</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el1_mops(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='add'>+	local_daif_inherit(regs);</div><div class='add'>+	do_el1_mops(regs, esr);</div><div class='add'>+	local_daif_mask();</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el1_breakpt(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = arm64_enter_el1_dbg(regs);</div><div class='add'>+	debug_exception_enter(regs);</div><div class='add'>+	do_breakpoint(esr, regs);</div><div class='add'>+	debug_exception_exit(regs);</div><div class='add'>+	arm64_exit_el1_dbg(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void noinstr el1_dbg(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+static void noinstr el1_softstp(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = arm64_enter_el1_dbg(regs);</div><div class='add'>+	if (!cortex_a76_erratum_1463225_debug_handler(regs)) {</div><div class='add'>+		debug_exception_enter(regs);</div><div class='add'>+		/*</div><div class='add'>+		 * After handling a breakpoint, we suspend the breakpoint</div><div class='add'>+		 * and use single-step to move to the next instruction.</div><div class='add'>+		 * If we are stepping a suspended breakpoint there's nothing more to do:</div><div class='add'>+		 * the single-step is complete.</div><div class='add'>+		 */</div><div class='add'>+		if (!try_step_suspended_breakpoints(regs))</div><div class='add'>+			do_el1_softstep(esr, regs);</div><div class='add'>+		debug_exception_exit(regs);</div><div class='add'>+	}</div><div class='add'>+	arm64_exit_el1_dbg(regs, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el1_watchpt(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	/* Watchpoints are the only debug exception to write FAR_EL1 */</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = arm64_enter_el1_dbg(regs);</div><div class='add'>+	debug_exception_enter(regs);</div><div class='add'>+	do_watchpoint(far, esr, regs);</div><div class='add'>+	debug_exception_exit(regs);</div><div class='add'>+	arm64_exit_el1_dbg(regs, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el1_brk64(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> </div><div class='del'>-	arm64_enter_el1_dbg(regs);</div><div class='del'>-	if (!cortex_a76_erratum_1463225_debug_handler(regs))</div><div class='del'>-		do_debug_exception(far, esr, regs);</div><div class='del'>-	arm64_exit_el1_dbg(regs);</div><div class='add'>+	state = arm64_enter_el1_dbg(regs);</div><div class='add'>+	debug_exception_enter(regs);</div><div class='add'>+	do_el1_brk64(esr, regs);</div><div class='add'>+	debug_exception_exit(regs);</div><div class='add'>+	arm64_exit_el1_dbg(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el1_fpac(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> 	local_daif_inherit(regs);</div><div class='ctx'> 	do_el1_fpac(regs, esr);</div><div class='ctx'> 	local_daif_mask();</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs)</div><div class='hunk'>@@ -505,11 +472,23 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs)</div><div class='ctx'> 	case ESR_ELx_EC_BTI:</div><div class='ctx'> 		el1_bti(regs, esr);</div><div class='ctx'> 		break;</div><div class='add'>+	case ESR_ELx_EC_GCS:</div><div class='add'>+		el1_gcs(regs, esr);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_EC_MOPS:</div><div class='add'>+		el1_mops(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_BREAKPT_CUR:</div><div class='add'>+		el1_breakpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_SOFTSTP_CUR:</div><div class='add'>+		el1_softstp(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_WATCHPT_CUR:</div><div class='add'>+		el1_watchpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_BRK64:</div><div class='del'>-		el1_dbg(regs, esr);</div><div class='add'>+		el1_brk64(regs, esr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ESR_ELx_EC_FPAC:</div><div class='ctx'> 		el1_fpac(regs, esr);</div><div class='hunk'>@@ -522,30 +501,32 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs)</div><div class='ctx'> static __always_inline void __el1_pnmi(struct pt_regs *regs,</div><div class='ctx'> 				       void (*handler)(struct pt_regs *))</div><div class='ctx'> {</div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = irqentry_nmi_enter(regs);</div><div class='ctx'> 	do_interrupt_handler(regs, handler);</div><div class='del'>-	arm64_exit_nmi(regs);</div><div class='add'>+	irqentry_nmi_exit(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void __el1_irq(struct pt_regs *regs,</div><div class='ctx'> 				      void (*handler)(struct pt_regs *))</div><div class='ctx'> {</div><div class='del'>-	enter_from_kernel_mode(regs);</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='add'>+	state = enter_from_kernel_mode(regs);</div><div class='ctx'> </div><div class='ctx'> 	irq_enter_rcu();</div><div class='ctx'> 	do_interrupt_handler(regs, handler);</div><div class='ctx'> 	irq_exit_rcu();</div><div class='ctx'> </div><div class='del'>-	arm64_preempt_schedule_irq();</div><div class='del'>-</div><div class='del'>-	exit_to_kernel_mode(regs);</div><div class='add'>+	exit_to_kernel_mode(regs, state);</div><div class='ctx'> }</div><div class='ctx'> static void noinstr el1_interrupt(struct pt_regs *regs,</div><div class='ctx'> 				  void (*handler)(struct pt_regs *))</div><div class='ctx'> {</div><div class='ctx'> 	write_sysreg(DAIF_PROCCTX_NOIRQ, daif);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) &amp;&amp; !interrupts_enabled(regs))</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) &amp;&amp; regs_irqs_disabled(regs))</div><div class='ctx'> 		__el1_pnmi(regs, handler);</div><div class='ctx'> 	else</div><div class='ctx'> 		__el1_irq(regs, handler);</div><div class='hunk'>@@ -564,21 +545,22 @@ asmlinkage void noinstr el1h_64_fiq_handler(struct pt_regs *regs)</div><div class='ctx'> asmlinkage void noinstr el1h_64_error_handler(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long esr = read_sysreg(esr_el1);</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> </div><div class='ctx'> 	local_daif_restore(DAIF_ERRCTX);</div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	state = irqentry_nmi_enter(regs);</div><div class='ctx'> 	do_serror(regs, esr);</div><div class='del'>-	arm64_exit_nmi(regs);</div><div class='add'>+	irqentry_nmi_exit(regs, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_da(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='ctx'> </div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_mem_abort(far, esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_ia(struct pt_regs *regs, unsigned long esr)</div><div class='hunk'>@@ -593,50 +575,50 @@ static void noinstr el0_ia(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	if (!is_ttbr0_addr(far))</div><div class='ctx'> 		arm64_apply_bp_hardening();</div><div class='ctx'> </div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_mem_abort(far, esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_fpsimd_acc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_fpsimd_acc(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_sve_acc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_sve_acc(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_sme_acc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_sme_acc(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_fpsimd_exc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_fpsimd_exc(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_sys(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_sys(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_pc(struct pt_regs *regs, unsigned long esr)</div><div class='hunk'>@@ -646,79 +628,130 @@ static void noinstr el0_pc(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	if (!is_ttbr0_addr(instruction_pointer(regs)))</div><div class='ctx'> 		arm64_apply_bp_hardening();</div><div class='ctx'> </div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_sp_pc_abort(far, esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_sp(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_sp_pc_abort(regs-&gt;sp, esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_undef(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_undef(regs, esr);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_bti(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_bti(regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_mops(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_mops(regs, esr);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el0_gcs(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='add'>+	local_daif_restore(DAIF_PROCCTX);</div><div class='add'>+	do_el0_gcs(regs, esr);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_inv(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	bad_el0_sync(regs, 0, esr);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el0_breakpt(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	if (!is_ttbr0_addr(regs-&gt;pc))</div><div class='add'>+		arm64_apply_bp_hardening();</div><div class='add'>+</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='add'>+	debug_exception_enter(regs);</div><div class='add'>+	do_breakpoint(esr, regs);</div><div class='add'>+	debug_exception_exit(regs);</div><div class='add'>+	local_daif_restore(DAIF_PROCCTX);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el0_softstp(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	if (!is_ttbr0_addr(regs-&gt;pc))</div><div class='add'>+		arm64_apply_bp_hardening();</div><div class='add'>+</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='add'>+	/*</div><div class='add'>+	 * After handling a breakpoint, we suspend the breakpoint</div><div class='add'>+	 * and use single-step to move to the next instruction.</div><div class='add'>+	 * If we are stepping a suspended breakpoint there's nothing more to do:</div><div class='add'>+	 * the single-step is complete.</div><div class='add'>+	 */</div><div class='add'>+	if (!try_step_suspended_breakpoints(regs)) {</div><div class='add'>+		local_daif_restore(DAIF_PROCCTX);</div><div class='add'>+		do_el0_softstep(esr, regs);</div><div class='add'>+	}</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void noinstr el0_dbg(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+static void noinstr el0_watchpt(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	/* Only watchpoints write FAR_EL1, otherwise its UNKNOWN */</div><div class='add'>+	/* Watchpoints are the only debug exception to write FAR_EL1 */</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='ctx'> </div><div class='del'>-	enter_from_user_mode(regs);</div><div class='del'>-	do_debug_exception(far, esr, regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='add'>+	debug_exception_enter(regs);</div><div class='add'>+	do_watchpoint(far, esr, regs);</div><div class='add'>+	debug_exception_exit(regs);</div><div class='add'>+	local_daif_restore(DAIF_PROCCTX);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el0_brk64(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	do_el0_brk64(esr, regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_svc(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	cortex_a76_erratum_1463225_svc_handler();</div><div class='del'>-	fp_user_discard();</div><div class='add'>+	fpsimd_syscall_enter();</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_svc(regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+	fpsimd_syscall_exit();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_fpac(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_fpac(regs, esr);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs)</div><div class='hunk'>@@ -766,11 +799,20 @@ asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs)</div><div class='ctx'> 	case ESR_ELx_EC_MOPS:</div><div class='ctx'> 		el0_mops(regs, esr);</div><div class='ctx'> 		break;</div><div class='add'>+	case ESR_ELx_EC_GCS:</div><div class='add'>+		el0_gcs(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_BREAKPT_LOW:</div><div class='add'>+		el0_breakpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_SOFTSTP_LOW:</div><div class='add'>+		el0_softstp(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_WATCHPT_LOW:</div><div class='add'>+		el0_watchpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_BRK64:</div><div class='del'>-		el0_dbg(regs, esr);</div><div class='add'>+		el0_brk64(regs, esr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ESR_ELx_EC_FPAC:</div><div class='ctx'> 		el0_fpac(regs, esr);</div><div class='hunk'>@@ -783,7 +825,7 @@ asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs)</div><div class='ctx'> static void noinstr el0_interrupt(struct pt_regs *regs,</div><div class='ctx'> 				  void (*handler)(struct pt_regs *))</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> </div><div class='ctx'> 	write_sysreg(DAIF_PROCCTX_NOIRQ, daif);</div><div class='ctx'> </div><div class='hunk'>@@ -794,7 +836,7 @@ static void noinstr el0_interrupt(struct pt_regs *regs,</div><div class='ctx'> 	do_interrupt_handler(regs, handler);</div><div class='ctx'> 	irq_exit_rcu();</div><div class='ctx'> </div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr __el0_irq_handler_common(struct pt_regs *regs)</div><div class='hunk'>@@ -820,14 +862,15 @@ asmlinkage void noinstr el0t_64_fiq_handler(struct pt_regs *regs)</div><div class='ctx'> static void noinstr __el0_error_handler_common(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long esr = read_sysreg(esr_el1);</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> </div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_ERRCTX);</div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	state = irqentry_nmi_enter(regs);</div><div class='ctx'> 	do_serror(regs, esr);</div><div class='del'>-	arm64_exit_nmi(regs);</div><div class='add'>+	irqentry_nmi_exit(regs, state);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr el0t_64_error_handler(struct pt_regs *regs)</div><div class='hunk'>@@ -838,19 +881,27 @@ asmlinkage void noinstr el0t_64_error_handler(struct pt_regs *regs)</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> static void noinstr el0_cp15(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_cp15(esr, regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_svc_compat(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	enter_from_user_mode(regs);</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='ctx'> 	cortex_a76_erratum_1463225_svc_handler();</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_svc_compat(regs);</div><div class='del'>-	exit_to_user_mode(regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void noinstr el0_bkpt32(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	arm64_enter_from_user_mode(regs);</div><div class='add'>+	local_daif_restore(DAIF_PROCCTX);</div><div class='add'>+	do_bkpt32(esr, regs);</div><div class='add'>+	arm64_exit_to_user_mode(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr el0t_32_sync_handler(struct pt_regs *regs)</div><div class='hunk'>@@ -887,10 +938,16 @@ asmlinkage void noinstr el0t_32_sync_handler(struct pt_regs *regs)</div><div class='ctx'> 		el0_cp15(regs, esr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ESR_ELx_EC_BREAKPT_LOW:</div><div class='add'>+		el0_breakpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_SOFTSTP_LOW:</div><div class='add'>+		el0_softstp(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_WATCHPT_LOW:</div><div class='add'>+		el0_watchpt(regs, esr);</div><div class='add'>+		break;</div><div class='ctx'> 	case ESR_ELx_EC_BKPT32:</div><div class='del'>-		el0_dbg(regs, esr);</div><div class='add'>+		el0_bkpt32(regs, esr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		el0_inv(regs, esr);</div><div class='hunk'>@@ -918,21 +975,20 @@ UNHANDLED(el0t, 32, fiq)</div><div class='ctx'> UNHANDLED(el0t, 32, error)</div><div class='ctx'> #endif /* CONFIG_COMPAT */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> asmlinkage void noinstr __noreturn handle_bad_stack(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long esr = read_sysreg(esr_el1);</div><div class='ctx'> 	unsigned long far = read_sysreg(far_el1);</div><div class='ctx'> </div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	irqentry_nmi_enter(regs);</div><div class='ctx'> 	panic_bad_stack(regs, esr, far);</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_VMAP_STACK */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM_SDE_INTERFACE</div><div class='ctx'> asmlinkage noinstr unsigned long</div><div class='ctx'> __sdei_handler(struct pt_regs *regs, struct sdei_registered_event *arg)</div><div class='ctx'> {</div><div class='add'>+	irqentry_state_t state;</div><div class='ctx'> 	unsigned long ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -957,9 +1013,9 @@ __sdei_handler(struct pt_regs *regs, struct sdei_registered_event *arg)</div><div class='ctx'> 	else if (cpu_has_pan())</div><div class='ctx'> 		set_pstate_pan(0);</div><div class='ctx'> </div><div class='del'>-	arm64_enter_nmi(regs);</div><div class='add'>+	state = irqentry_nmi_enter(regs);</div><div class='ctx'> 	ret = do_sdei_event(regs, arg);</div><div class='del'>-	arm64_exit_nmi(regs);</div><div class='add'>+	irqentry_nmi_exit(regs, state);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/entry-ftrace.S b/arch/arm64/kernel/entry-ftrace.S<br/>index f0c16640ef21..169ccf600066 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry-ftrace.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry-ftrace.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry-ftrace.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/entry-ftrace.S</a></div><div class='hunk'>@@ -329,24 +329,28 @@ SYM_FUNC_END(ftrace_stub_graph)</div><div class='ctx'>  * @fp is checked against the value passed by ftrace_graph_caller().</div><div class='ctx'>  */</div><div class='ctx'> SYM_CODE_START(return_to_handler)</div><div class='del'>-	/* save return value regs */</div><div class='del'>-	sub sp, sp, #FGRET_REGS_SIZE</div><div class='del'>-	stp x0, x1, [sp, #FGRET_REGS_X0]</div><div class='del'>-	stp x2, x3, [sp, #FGRET_REGS_X2]</div><div class='del'>-	stp x4, x5, [sp, #FGRET_REGS_X4]</div><div class='del'>-	stp x6, x7, [sp, #FGRET_REGS_X6]</div><div class='del'>-	str x29,    [sp, #FGRET_REGS_FP]	// parent's fp</div><div class='add'>+	/* Make room for ftrace_regs */</div><div class='add'>+	sub	sp, sp, #FREGS_SIZE</div><div class='add'>+</div><div class='add'>+	/* Save return value regs */</div><div class='add'>+	stp	x0, x1, [sp, #FREGS_X0]</div><div class='add'>+	stp	x2, x3, [sp, #FREGS_X2]</div><div class='add'>+	stp	x4, x5, [sp, #FREGS_X4]</div><div class='add'>+	stp	x6, x7, [sp, #FREGS_X6]</div><div class='add'>+</div><div class='add'>+	/* Save the callsite's FP */</div><div class='add'>+	str	x29, [sp, #FREGS_FP]</div><div class='ctx'> </div><div class='ctx'> 	mov	x0, sp</div><div class='del'>-	bl	ftrace_return_to_handler	// addr = ftrace_return_to_hander(regs);</div><div class='add'>+	bl	ftrace_return_to_handler	// addr = ftrace_return_to_hander(fregs);</div><div class='ctx'> 	mov	x30, x0				// restore the original return address</div><div class='ctx'> </div><div class='del'>-	/* restore return value regs */</div><div class='del'>-	ldp x0, x1, [sp, #FGRET_REGS_X0]</div><div class='del'>-	ldp x2, x3, [sp, #FGRET_REGS_X2]</div><div class='del'>-	ldp x4, x5, [sp, #FGRET_REGS_X4]</div><div class='del'>-	ldp x6, x7, [sp, #FGRET_REGS_X6]</div><div class='del'>-	add sp, sp, #FGRET_REGS_SIZE</div><div class='add'>+	/* Restore return value regs */</div><div class='add'>+	ldp	x0, x1, [sp, #FREGS_X0]</div><div class='add'>+	ldp	x2, x3, [sp, #FREGS_X2]</div><div class='add'>+	ldp	x4, x5, [sp, #FREGS_X4]</div><div class='add'>+	ldp	x6, x7, [sp, #FREGS_X6]</div><div class='add'>+	add	sp, sp, #FREGS_SIZE</div><div class='ctx'> </div><div class='ctx'> 	ret</div><div class='ctx'> SYM_CODE_END(return_to_handler)</div><div class='head'>diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S<br/>index 7ef0e127b149..f8018b5c1f9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/entry.S</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/scs.h&gt;</div><div class='add'>+#include &lt;asm/stacktrace/frame.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/asm-uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='hunk'>@@ -54,7 +55,6 @@</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='ctx'> 	sub	sp, sp, #PT_REGS_SIZE</div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Test whether the SP has overflowed, without corrupting a GPR.</div><div class='ctx'> 	 * Task and IRQ stacks are aligned so that SP &amp; (1 &lt;&lt; THREAD_SHIFT)</div><div class='hunk'>@@ -96,7 +96,6 @@</div><div class='ctx'> 	/* We were already on the overflow stack. Restore sp/x0 and carry on. */</div><div class='ctx'> 	sub	sp, sp, x0</div><div class='ctx'> 	mrs	x0, tpidrro_el0</div><div class='del'>-#endif</div><div class='ctx'> 	b	el\el\ht\()_\regsize\()_\label</div><div class='ctx'> .org .Lventry_start\@ + 128	// Did we overflow the ventry slot?</div><div class='ctx'> 	.endm</div><div class='hunk'>@@ -284,15 +283,16 @@ alternative_else_nop_endif</div><div class='ctx'> 	stp	lr, x21, [sp, #S_LR]</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * For exceptions from EL0, create a final frame record.</div><div class='del'>-	 * For exceptions from EL1, create a synthetic frame record so the</div><div class='del'>-	 * interrupted code shows up in the backtrace.</div><div class='add'>+	 * Create a metadata frame record. The unwinder will use this to</div><div class='add'>+	 * identify and unwind exception boundaries.</div><div class='ctx'> 	 */</div><div class='del'>-	.if \el == 0</div><div class='ctx'> 	stp	xzr, xzr, [sp, #S_STACKFRAME]</div><div class='add'>+	.if \el == 0</div><div class='add'>+	mov	x0, #FRAME_META_TYPE_FINAL</div><div class='ctx'> 	.else</div><div class='del'>-	stp	x29, x22, [sp, #S_STACKFRAME]</div><div class='add'>+	mov	x0, #FRAME_META_TYPE_PT_REGS</div><div class='ctx'> 	.endif</div><div class='add'>+	str	x0, [sp, #S_STACKFRAME_TYPE]</div><div class='ctx'> 	add	x29, sp, #S_STACKFRAME</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM64_SW_TTBR0_PAN</div><div class='hunk'>@@ -315,7 +315,7 @@ alternative_if_not ARM64_HAS_GIC_PRIO_MASKING</div><div class='ctx'> alternative_else_nop_endif</div><div class='ctx'> </div><div class='ctx'> 	mrs_s	x20, SYS_ICC_PMR_EL1</div><div class='del'>-	str	x20, [sp, #S_PMR_SAVE]</div><div class='add'>+	str	w20, [sp, #S_PMR]</div><div class='ctx'> 	mov	x20, #GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET</div><div class='ctx'> 	msr_s	SYS_ICC_PMR_EL1, x20</div><div class='ctx'> </div><div class='hunk'>@@ -342,7 +342,7 @@ alternative_if_not ARM64_HAS_GIC_PRIO_MASKING</div><div class='ctx'> 	b	.Lskip_pmr_restore\@</div><div class='ctx'> alternative_else_nop_endif</div><div class='ctx'> </div><div class='del'>-	ldr	x20, [sp, #S_PMR_SAVE]</div><div class='add'>+	ldr	w20, [sp, #S_PMR]</div><div class='ctx'> 	msr_s	SYS_ICC_PMR_EL1, x20</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure priority change is seen by redistributor */</div><div class='hunk'>@@ -538,7 +538,6 @@ SYM_CODE_START(vectors)</div><div class='ctx'> 	kernel_ventry	0, t, 32, error		// Error 32-bit EL0</div><div class='ctx'> SYM_CODE_END(vectors)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> SYM_CODE_START_LOCAL(__bad_stack)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We detected an overflow in kernel_ventry, which switched to the</div><div class='hunk'>@@ -566,7 +565,6 @@ SYM_CODE_START_LOCAL(__bad_stack)</div><div class='ctx'> 	bl	handle_bad_stack</div><div class='ctx'> 	ASM_BUG()</div><div class='ctx'> SYM_CODE_END(__bad_stack)</div><div class='del'>-#endif /* CONFIG_VMAP_STACK */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	.macro entry_handler el:req, ht:req, regsize:req, label:req</div><div class='hunk'>@@ -612,7 +610,7 @@ SYM_CODE_END(ret_to_kernel)</div><div class='ctx'> SYM_CODE_START_LOCAL(ret_to_user)</div><div class='ctx'> 	ldr	x19, [tsk, #TSK_TI_FLAGS]	// re-check for single-step</div><div class='ctx'> 	enable_step_tsk x19, x2</div><div class='del'>-#ifdef CONFIG_GCC_PLUGIN_STACKLEAK</div><div class='add'>+#ifdef CONFIG_KSTACK_ERASE</div><div class='ctx'> 	bl	stackleak_erase_on_task_stack</div><div class='ctx'> #endif</div><div class='ctx'> 	kernel_exit 0</div><div class='hunk'>@@ -823,6 +821,7 @@ SYM_CODE_END(__bp_harden_el1_vectors)</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(cpu_switch_to)</div><div class='add'>+	save_and_disable_daif x11</div><div class='ctx'> 	mov	x10, #THREAD_CPU_CONTEXT</div><div class='ctx'> 	add	x8, x0, x10</div><div class='ctx'> 	mov	x9, sp</div><div class='hunk'>@@ -846,6 +845,7 @@ SYM_FUNC_START(cpu_switch_to)</div><div class='ctx'> 	ptrauth_keys_install_kernel x1, x8, x9, x10</div><div class='ctx'> 	scs_save x0</div><div class='ctx'> 	scs_load_current</div><div class='add'>+	restore_irq x11</div><div class='ctx'> 	ret</div><div class='ctx'> SYM_FUNC_END(cpu_switch_to)</div><div class='ctx'> NOKPROBE(cpu_switch_to)</div><div class='hunk'>@@ -872,6 +872,7 @@ NOKPROBE(ret_from_fork)</div><div class='ctx'>  * Calls func(regs) using this CPU's irq stack and shadow irq stack.</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(call_on_irq_stack)</div><div class='add'>+	save_and_disable_daif x9</div><div class='ctx'> #ifdef CONFIG_SHADOW_CALL_STACK</div><div class='ctx'> 	get_current_task x16</div><div class='ctx'> 	scs_save x16</div><div class='hunk'>@@ -886,8 +887,10 @@ SYM_FUNC_START(call_on_irq_stack)</div><div class='ctx'> </div><div class='ctx'> 	/* Move to the new stack and call the function there */</div><div class='ctx'> 	add	sp, x16, #IRQ_STACK_SIZE</div><div class='add'>+	restore_irq x9</div><div class='ctx'> 	blr	x1</div><div class='ctx'> </div><div class='add'>+	save_and_disable_daif x9</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Restore the SP from the FP, and restore the FP and LR from the frame</div><div class='ctx'> 	 * record.</div><div class='hunk'>@@ -895,6 +898,7 @@ SYM_FUNC_START(call_on_irq_stack)</div><div class='ctx'> 	mov	sp, x29</div><div class='ctx'> 	ldp	x29, x30, [sp], #16</div><div class='ctx'> 	scs_load_current</div><div class='add'>+	restore_irq x9</div><div class='ctx'> 	ret</div><div class='ctx'> SYM_FUNC_END(call_on_irq_stack)</div><div class='ctx'> NOKPROBE(call_on_irq_stack)</div><div class='hunk'>@@ -1001,7 +1005,6 @@ SYM_CODE_START(__sdei_asm_handler)</div><div class='ctx'> 1:	adr_this_cpu dst=x5, sym=sdei_active_critical_event, tmp=x6</div><div class='ctx'> 2:	str	x19, [x5]</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * entry.S may have been using sp as a scratch register, find whether</div><div class='ctx'> 	 * this is a normal or critical event and switch to the appropriate</div><div class='hunk'>@@ -1014,7 +1017,6 @@ SYM_CODE_START(__sdei_asm_handler)</div><div class='ctx'> 2:	mov	x6, #SDEI_STACK_SIZE</div><div class='ctx'> 	add	x5, x5, x6</div><div class='ctx'> 	mov	sp, x5</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SHADOW_CALL_STACK</div><div class='ctx'> 	/* Use a separate shadow call stack for normal and critical events */</div><div class='head'>diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c<br/>index 77006df20a75..e3f8f51748bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/fpsimd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/fpsimd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/fpsimd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/fpsimd.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'>  *   whatever is in the FPSIMD registers is not saved to memory, but discarded.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='add'>+DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='ctx'> </div><div class='ctx'> __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = {</div><div class='ctx'> #ifdef CONFIG_ARM64_SVE</div><div class='hunk'>@@ -180,12 +180,12 @@ static inline void set_sve_default_vl(int val)</div><div class='ctx'> 	set_default_vl(ARM64_VEC_SVE, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __percpu *efi_sve_state;</div><div class='add'>+static u8 *efi_sve_state;</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='ctx'> /* Dummy declaration for code that will be optimised out: */</div><div class='del'>-extern void __percpu *efi_sve_state;</div><div class='add'>+extern u8 *efi_sve_state;</div><div class='ctx'> </div><div class='ctx'> #endif /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='hunk'>@@ -359,20 +359,15 @@ static void task_fpsimd_load(void)</div><div class='ctx'> 	WARN_ON(preemptible());</div><div class='ctx'> 	WARN_ON(test_thread_flag(TIF_KERNEL_FPSTATE));</div><div class='ctx'> </div><div class='del'>-	if (system_supports_fpmr())</div><div class='del'>-		write_sysreg_s(current-&gt;thread.uw.fpmr, SYS_FPMR);</div><div class='del'>-</div><div class='ctx'> 	if (system_supports_sve() || system_supports_sme()) {</div><div class='ctx'> 		switch (current-&gt;thread.fp_type) {</div><div class='ctx'> 		case FP_STATE_FPSIMD:</div><div class='ctx'> 			/* Stop tracking SVE for this task until next use. */</div><div class='del'>-			if (test_and_clear_thread_flag(TIF_SVE))</div><div class='del'>-				sve_user_disable();</div><div class='add'>+			clear_thread_flag(TIF_SVE);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FP_STATE_SVE:</div><div class='del'>-			if (!thread_sm_enabled(&amp;current-&gt;thread) &amp;&amp;</div><div class='del'>-			    !WARN_ON_ONCE(!test_and_set_thread_flag(TIF_SVE)))</div><div class='del'>-				sve_user_enable();</div><div class='add'>+			if (!thread_sm_enabled(&amp;current-&gt;thread))</div><div class='add'>+				WARN_ON_ONCE(!test_and_set_thread_flag(TIF_SVE));</div><div class='ctx'> </div><div class='ctx'> 			if (test_thread_flag(TIF_SVE))</div><div class='ctx'> 				sve_set_vq(sve_vq_from_vl(task_get_sve_vl(current)) - 1);</div><div class='hunk'>@@ -386,7 +381,7 @@ static void task_fpsimd_load(void)</div><div class='ctx'> 			 * fpsimd_save_user_state() or memory corruption, we</div><div class='ctx'> 			 * should always record an explicit format</div><div class='ctx'> 			 * when we save. We always at least have the</div><div class='del'>-			 * memory allocated for FPSMID registers so</div><div class='add'>+			 * memory allocated for FPSIMD registers so</div><div class='ctx'> 			 * try that and hope for the best.</div><div class='ctx'> 			 */</div><div class='ctx'> 			WARN_ON_ONCE(1);</div><div class='hunk'>@@ -413,6 +408,9 @@ static void task_fpsimd_load(void)</div><div class='ctx'> 			restore_ffr = system_supports_fa64();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		write_sysreg_s(current-&gt;thread.uw.fpmr, SYS_FPMR);</div><div class='add'>+</div><div class='ctx'> 	if (restore_sve_regs) {</div><div class='ctx'> 		WARN_ON_ONCE(current-&gt;thread.fp_type != FP_STATE_SVE);</div><div class='ctx'> 		sve_load_state(sve_pffr(&amp;current-&gt;thread),</div><div class='hunk'>@@ -453,12 +451,15 @@ static void fpsimd_save_user_state(void)</div><div class='ctx'> 		*(last-&gt;fpmr) = read_sysreg_s(SYS_FPMR);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If a task is in a syscall the ABI allows us to only</div><div class='del'>-	 * preserve the state shared with FPSIMD so don't bother</div><div class='del'>-	 * saving the full SVE state in that case.</div><div class='add'>+	 * Save SVE state if it is live.</div><div class='add'>+	 *</div><div class='add'>+	 * The syscall ABI discards live SVE state at syscall entry. When</div><div class='add'>+	 * entering a syscall, fpsimd_syscall_enter() sets to_save to</div><div class='add'>+	 * FP_STATE_FPSIMD to allow the SVE state to be lazily discarded until</div><div class='add'>+	 * either new SVE state is loaded+bound or fpsimd_syscall_exit() is</div><div class='add'>+	 * called prior to a return to userspace.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((last-&gt;to_save == FP_STATE_CURRENT &amp;&amp; test_thread_flag(TIF_SVE) &amp;&amp;</div><div class='del'>-	     !in_syscall(current_pt_regs())) ||</div><div class='add'>+	if ((last-&gt;to_save == FP_STATE_CURRENT &amp;&amp; test_thread_flag(TIF_SVE)) ||</div><div class='ctx'> 	    last-&gt;to_save == FP_STATE_SVE) {</div><div class='ctx'> 		save_sve_regs = true;</div><div class='ctx'> 		save_ffr = true;</div><div class='hunk'>@@ -562,7 +563,7 @@ static int vec_proc_do_default_vl(const struct ctl_table *table, int write,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ctl_table sve_default_vl_table[] = {</div><div class='add'>+static const struct ctl_table sve_default_vl_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "sve_default_vector_length",</div><div class='ctx'> 		.mode		= 0644,</div><div class='hunk'>@@ -585,7 +586,7 @@ static int __init sve_sysctl_init(void) { return 0; }</div><div class='ctx'> #endif /* ! (CONFIG_ARM64_SVE &amp;&amp; CONFIG_SYSCTL) */</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ARM64_SME) &amp;&amp; defined(CONFIG_SYSCTL)</div><div class='del'>-static struct ctl_table sme_default_vl_table[] = {</div><div class='add'>+static const struct ctl_table sme_default_vl_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "sme_default_vector_length",</div><div class='ctx'> 		.mode		= 0644,</div><div class='hunk'>@@ -651,7 +652,7 @@ static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst,</div><div class='ctx'>  * task-&gt;thread.uw.fpsimd_state must be up to date before calling this</div><div class='ctx'>  * function.</div><div class='ctx'>  */</div><div class='del'>-static void fpsimd_to_sve(struct task_struct *task)</div><div class='add'>+static inline void fpsimd_to_sve(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	void *sst = task-&gt;thread.sve_state;</div><div class='hunk'>@@ -675,7 +676,7 @@ static void fpsimd_to_sve(struct task_struct *task)</div><div class='ctx'>  * bytes of allocated kernel memory.</div><div class='ctx'>  * task-&gt;thread.sve_state must be up to date before calling this function.</div><div class='ctx'>  */</div><div class='del'>-static void sve_to_fpsimd(struct task_struct *task)</div><div class='add'>+static inline void sve_to_fpsimd(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq, vl;</div><div class='ctx'> 	void const *sst = task-&gt;thread.sve_state;</div><div class='hunk'>@@ -694,44 +695,39 @@ static void sve_to_fpsimd(struct task_struct *task)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void cpu_enable_fpmr(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='add'>+static inline void __fpsimd_zero_vregs(struct user_fpsimd_state *fpsimd)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK,</div><div class='del'>-		       SYS_SCTLR_EL1);</div><div class='add'>+	memset(&amp;fpsimd-&gt;vregs, 0, sizeof(fpsimd-&gt;vregs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM64_SVE</div><div class='ctx'> /*</div><div class='del'>- * Call __sve_free() directly only if you know task can't be scheduled</div><div class='del'>- * or preempted.</div><div class='add'>+ * Simulate the effects of an SMSTOP SM instruction.</div><div class='ctx'>  */</div><div class='del'>-static void __sve_free(struct task_struct *task)</div><div class='add'>+void task_smstop_sm(struct task_struct *task)</div><div class='ctx'> {</div><div class='del'>-	kfree(task-&gt;thread.sve_state);</div><div class='del'>-	task-&gt;thread.sve_state = NULL;</div><div class='del'>-}</div><div class='add'>+	if (!thread_sm_enabled(&amp;task-&gt;thread))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-static void sve_free(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(test_tsk_thread_flag(task, TIF_SVE));</div><div class='add'>+	__fpsimd_zero_vregs(&amp;task-&gt;thread.uw.fpsimd_state);</div><div class='add'>+	task-&gt;thread.uw.fpsimd_state.fpsr = 0x0800009f;</div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		task-&gt;thread.uw.fpmr = 0;</div><div class='ctx'> </div><div class='del'>-	__sve_free(task);</div><div class='add'>+	task-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='add'>+	task-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Return how many bytes of memory are required to store the full SVE</div><div class='del'>- * state for task, given task's currently configured vector length.</div><div class='del'>- */</div><div class='del'>-size_t sve_state_size(struct task_struct const *task)</div><div class='add'>+void cpu_enable_fpmr(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='ctx'> {</div><div class='del'>-	unsigned int vl = 0;</div><div class='del'>-</div><div class='del'>-	if (system_supports_sve())</div><div class='del'>-		vl = task_get_sve_vl(task);</div><div class='del'>-	if (system_supports_sme())</div><div class='del'>-		vl = max(vl, task_get_sme_vl(task));</div><div class='add'>+	write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK,</div><div class='add'>+		       SYS_SCTLR_EL1);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return SVE_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='add'>+#ifdef CONFIG_ARM64_SVE</div><div class='add'>+static void sve_free(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	kfree(task-&gt;thread.sve_state);</div><div class='add'>+	task-&gt;thread.sve_state = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -758,69 +754,34 @@ void sve_alloc(struct task_struct *task, bool flush)</div><div class='ctx'> 		kzalloc(sve_state_size(task), GFP_KERNEL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Force the FPSIMD state shared with SVE to be updated in the SVE state</div><div class='del'>- * even if the SVE state is the current active state.</div><div class='del'>- *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- */</div><div class='del'>-void fpsimd_force_sync_to_sve(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	fpsimd_to_sve(task);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Ensure that task-&gt;thread.sve_state is up to date with respect to</div><div class='del'>- * the user task, irrespective of when SVE is in use or not.</div><div class='del'>- *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- */</div><div class='del'>-void fpsimd_sync_to_sve(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	if (!test_tsk_thread_flag(task, TIF_SVE) &amp;&amp;</div><div class='del'>-	    !thread_sm_enabled(&amp;task-&gt;thread))</div><div class='del'>-		fpsimd_to_sve(task);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * Ensure that task-&gt;thread.uw.fpsimd_state is up to date with respect to</div><div class='del'>- * the user task, irrespective of whether SVE is in use or not.</div><div class='add'>+ * Ensure that task-&gt;thread.uw.fpsimd_state is up to date with respect to the</div><div class='add'>+ * task's currently effective FPSIMD/SVE state.</div><div class='ctx'>  *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='add'>+ * The task's FPSIMD/SVE/SME state must not be subject to concurrent</div><div class='add'>+ * manipulation.</div><div class='ctx'>  */</div><div class='del'>-void sve_sync_to_fpsimd(struct task_struct *task)</div><div class='add'>+void fpsimd_sync_from_effective_state(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	if (task-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='ctx'> 		sve_to_fpsimd(task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Ensure that task-&gt;thread.sve_state is up to date with respect to</div><div class='del'>- * the task-&gt;thread.uw.fpsimd_state.</div><div class='add'>+ * Ensure that the task's currently effective FPSIMD/SVE state is up to date</div><div class='add'>+ * with respect to task-&gt;thread.uw.fpsimd_state, zeroing any effective</div><div class='add'>+ * non-FPSIMD (S)SVE state.</div><div class='ctx'>  *</div><div class='del'>- * This should only be called by ptrace to merge new FPSIMD register</div><div class='del'>- * values into a task for which SVE is currently active.</div><div class='del'>- * task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- * task-&gt;thread.uw.fpsimd_state must already have been initialised with</div><div class='del'>- * the new FPSIMD register values to be merged in.</div><div class='add'>+ * The task's FPSIMD/SVE/SME state must not be subject to concurrent</div><div class='add'>+ * manipulation.</div><div class='ctx'>  */</div><div class='del'>-void sve_sync_from_fpsimd_zeropad(struct task_struct *task)</div><div class='add'>+void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	void *sst = task-&gt;thread.sve_state;</div><div class='ctx'> 	struct user_fpsimd_state const *fst = &amp;task-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='del'>-	if (!test_tsk_thread_flag(task, TIF_SVE) &amp;&amp;</div><div class='del'>-	    !thread_sm_enabled(&amp;task-&gt;thread))</div><div class='add'>+	if (task-&gt;thread.fp_type != FP_STATE_SVE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vq = sve_vq_from_vl(thread_get_cur_vl(&amp;task-&gt;thread));</div><div class='hunk'>@@ -829,10 +790,73 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)</div><div class='ctx'> 	__fpsimd_to_sve(sst, fst, vq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int change_live_vector_length(struct task_struct *task,</div><div class='add'>+				     enum vec_type type,</div><div class='add'>+				     unsigned long vl)</div><div class='add'>+{</div><div class='add'>+	unsigned int sve_vl = task_get_sve_vl(task);</div><div class='add'>+	unsigned int sme_vl = task_get_sme_vl(task);</div><div class='add'>+	void *sve_state = NULL, *sme_state = NULL;</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME)</div><div class='add'>+		sme_vl = vl;</div><div class='add'>+	else</div><div class='add'>+		sve_vl = vl;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Allocate the new sve_state and sme_state before freeing the old</div><div class='add'>+	 * copies so that allocation failure can be handled without needing to</div><div class='add'>+	 * mutate the task's state in any way.</div><div class='add'>+	 *</div><div class='add'>+	 * Changes to the SVE vector length must not discard live ZA state or</div><div class='add'>+	 * clear PSTATE.ZA, as userspace code which is unaware of the AAPCS64</div><div class='add'>+	 * ZA lazy saving scheme may attempt to change the SVE vector length</div><div class='add'>+	 * while unsaved/dormant ZA state exists.</div><div class='add'>+	 */</div><div class='add'>+	sve_state = kzalloc(__sve_state_size(sve_vl, sme_vl), GFP_KERNEL);</div><div class='add'>+	if (!sve_state)</div><div class='add'>+		goto out_mem;</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		sme_state = kzalloc(__sme_state_size(sme_vl), GFP_KERNEL);</div><div class='add'>+		if (!sme_state)</div><div class='add'>+			goto out_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (task == current)</div><div class='add'>+		fpsimd_save_and_flush_current_state();</div><div class='add'>+	else</div><div class='add'>+		fpsimd_flush_task_state(task);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Always preserve PSTATE.SM and the effective FPSIMD state, zeroing</div><div class='add'>+	 * other SVE state.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd_sync_from_effective_state(task);</div><div class='add'>+	task_set_vl(task, type, vl);</div><div class='add'>+	kfree(task-&gt;thread.sve_state);</div><div class='add'>+	task-&gt;thread.sve_state = sve_state;</div><div class='add'>+	fpsimd_sync_to_effective_state_zeropad(task);</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		task-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='add'>+		kfree(task-&gt;thread.sme_state);</div><div class='add'>+		task-&gt;thread.sme_state = sme_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_mem:</div><div class='add'>+	kfree(sve_state);</div><div class='add'>+	kfree(sme_state);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> 			  unsigned long vl, unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	bool free_sme = false;</div><div class='add'>+	bool onexec = flags &amp; PR_SVE_SET_VL_ONEXEC;</div><div class='add'>+	bool inherit = flags &amp; PR_SVE_VL_INHERIT;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; ~(unsigned long)(PR_SVE_VL_INHERIT |</div><div class='ctx'> 				     PR_SVE_SET_VL_ONEXEC))</div><div class='hunk'>@@ -852,71 +876,17 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> </div><div class='ctx'> 	vl = find_supported_vector_length(type, vl);</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; (PR_SVE_VL_INHERIT |</div><div class='del'>-		     PR_SVE_SET_VL_ONEXEC))</div><div class='add'>+	if (!onexec &amp;&amp; vl != task_get_vl(task, type)) {</div><div class='add'>+		if (change_live_vector_length(task, type, vl))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (onexec || inherit)</div><div class='ctx'> 		task_set_vl_onexec(task, type, vl);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* Reset VL to system default on next exec: */</div><div class='ctx'> 		task_set_vl_onexec(task, type, 0);</div><div class='ctx'> </div><div class='del'>-	/* Only actually set the VL if not deferred: */</div><div class='del'>-	if (flags &amp; PR_SVE_SET_VL_ONEXEC)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (vl == task_get_vl(task, type))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * To ensure the FPSIMD bits of the SVE vector registers are preserved,</div><div class='del'>-	 * write any live register state back to task_struct, and convert to a</div><div class='del'>-	 * regular FPSIMD thread.</div><div class='del'>-	 */</div><div class='del'>-	if (task == current) {</div><div class='del'>-		get_cpu_fpsimd_context();</div><div class='del'>-</div><div class='del'>-		fpsimd_save_user_state();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(task);</div><div class='del'>-	if (test_and_clear_tsk_thread_flag(task, TIF_SVE) ||</div><div class='del'>-	    thread_sm_enabled(&amp;task-&gt;thread)) {</div><div class='del'>-		sve_to_fpsimd(task);</div><div class='del'>-		task-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (system_supports_sme()) {</div><div class='del'>-		if (type == ARM64_VEC_SME ||</div><div class='del'>-		    !(task-&gt;thread.svcr &amp; (SVCR_SM_MASK | SVCR_ZA_MASK))) {</div><div class='del'>-			/*</div><div class='del'>-			 * We are changing the SME VL or weren't using</div><div class='del'>-			 * SME anyway, discard the state and force a</div><div class='del'>-			 * reallocation.</div><div class='del'>-			 */</div><div class='del'>-			task-&gt;thread.svcr &amp;= ~(SVCR_SM_MASK |</div><div class='del'>-					       SVCR_ZA_MASK);</div><div class='del'>-			clear_tsk_thread_flag(task, TIF_SME);</div><div class='del'>-			free_sme = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (task == current)</div><div class='del'>-		put_cpu_fpsimd_context();</div><div class='del'>-</div><div class='del'>-	task_set_vl(task, type, vl);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Free the changed states if they are not in use, SME will be</div><div class='del'>-	 * reallocated to the correct size on next use and we just</div><div class='del'>-	 * allocate SVE now in case it is needed for use in streaming</div><div class='del'>-	 * mode.</div><div class='del'>-	 */</div><div class='del'>-	sve_free(task);</div><div class='del'>-	sve_alloc(task, true);</div><div class='del'>-</div><div class='del'>-	if (free_sme)</div><div class='del'>-		sme_free(task);</div><div class='del'>-</div><div class='del'>-out:</div><div class='ctx'> 	update_tsk_thread_flag(task, vec_vl_inherit_flag(type),</div><div class='ctx'> 			       flags &amp; PR_SVE_VL_INHERIT);</div><div class='ctx'> </div><div class='hunk'>@@ -1131,15 +1101,15 @@ static void __init sve_efi_setup(void)</div><div class='ctx'> 	if (!sve_vl_valid(max_vl))</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	efi_sve_state = __alloc_percpu(</div><div class='del'>-		SVE_SIG_REGS_SIZE(sve_vq_from_vl(max_vl)), SVE_VQ_BYTES);</div><div class='add'>+	efi_sve_state = kmalloc(SVE_SIG_REGS_SIZE(sve_vq_from_vl(max_vl)),</div><div class='add'>+				GFP_KERNEL);</div><div class='ctx'> 	if (!efi_sve_state)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	panic("Cannot allocate percpu memory for EFI SVE save/restore");</div><div class='add'>+	panic("Cannot allocate memory for EFI SVE save/restore");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpu_enable_sve(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='hunk'>@@ -1212,7 +1182,7 @@ void __init sve_setup(void)</div><div class='ctx'>  */</div><div class='ctx'> void fpsimd_release_task(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='del'>-	__sve_free(dead_task);</div><div class='add'>+	sve_free(dead_task);</div><div class='ctx'> 	sme_free(dead_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1295,6 +1265,8 @@ void __init sme_setup(void)</div><div class='ctx'> 	if (!system_supports_sme())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	min_bit = find_last_bit(info-&gt;vq_map, SVE_VQ_MAX);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * SME doesn't require any particular vector length be</div><div class='ctx'> 	 * supported but it does require at least one.  We should have</div><div class='hunk'>@@ -1302,9 +1274,8 @@ void __init sme_setup(void)</div><div class='ctx'> 	 * let's double check here.  The bitmap is SVE_VQ_MAP sized for</div><div class='ctx'> 	 * sharing with SVE.</div><div class='ctx'> 	 */</div><div class='del'>-	WARN_ON(bitmap_empty(info-&gt;vq_map, SVE_VQ_MAX));</div><div class='add'>+	WARN_ON(min_bit &gt;= SVE_VQ_MAX);</div><div class='ctx'> </div><div class='del'>-	min_bit = find_last_bit(info-&gt;vq_map, SVE_VQ_MAX);</div><div class='ctx'> 	info-&gt;min_vl = sve_vl_from_vq(__bit_to_vq(min_bit));</div><div class='ctx'> </div><div class='ctx'> 	max_bit = find_first_bit(info-&gt;vq_map, SVE_VQ_MAX);</div><div class='hunk'>@@ -1367,6 +1338,7 @@ static void sve_init_regs(void)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		fpsimd_to_sve(current);</div><div class='ctx'> 		current-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='add'>+		fpsimd_flush_task_state(current);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1435,7 +1407,7 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> 	 * If this not a trap due to SME being disabled then something</div><div class='ctx'> 	 * is being used in the wrong mode, report as SIGILL.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ESR_ELx_ISS(esr) != ESR_ELx_SME_ISS_SME_DISABLED) {</div><div class='add'>+	if (ESR_ELx_SME_ISS_SMTC(esr) != ESR_ELx_SME_ISS_SMTC_SME_DISABLED) {</div><div class='ctx'> 		force_signal_inject(SIGILL, ILL_ILLOPC, regs-&gt;pc, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1459,6 +1431,8 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> 		sme_set_vq(vq_minus_one);</div><div class='ctx'> </div><div class='ctx'> 		fpsimd_bind_task_to_cpu();</div><div class='add'>+	} else {</div><div class='add'>+		fpsimd_flush_task_state(current);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='hunk'>@@ -1572,8 +1546,8 @@ void fpsimd_thread_switch(struct task_struct *next)</div><div class='ctx'> 		fpsimd_save_user_state();</div><div class='ctx'> </div><div class='ctx'> 	if (test_tsk_thread_flag(next, TIF_KERNEL_FPSTATE)) {</div><div class='del'>-		fpsimd_load_kernel_state(next);</div><div class='ctx'> 		fpsimd_flush_cpu_state();</div><div class='add'>+		fpsimd_load_kernel_state(next);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's</div><div class='hunk'>@@ -1660,6 +1634,9 @@ void fpsimd_flush_thread(void)</div><div class='ctx'> 		current-&gt;thread.svcr = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		current-&gt;thread.uw.fpmr = 0;</div><div class='add'>+</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> </div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='hunk'>@@ -1682,43 +1659,6 @@ void fpsimd_preserve_current_state(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Like fpsimd_preserve_current_state(), but ensure that</div><div class='del'>- * current-&gt;thread.uw.fpsimd_state is updated so that it can be copied to</div><div class='del'>- * the signal frame.</div><div class='del'>- */</div><div class='del'>-void fpsimd_signal_preserve_current_state(void)</div><div class='del'>-{</div><div class='del'>-	fpsimd_preserve_current_state();</div><div class='del'>-	if (current-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='del'>-		sve_to_fpsimd(current);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called by KVM when entering the guest.</div><div class='del'>- */</div><div class='del'>-void fpsimd_kvm_prepare(void)</div><div class='del'>-{</div><div class='del'>-	if (!system_supports_sve())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * KVM does not save host SVE state since we can only enter</div><div class='del'>-	 * the guest from a syscall so the ABI means that only the</div><div class='del'>-	 * non-saved SVE state needs to be saved.  If we have left</div><div class='del'>-	 * SVE enabled for performance reasons then update the task</div><div class='del'>-	 * state to be FPSIMD only.</div><div class='del'>-	 */</div><div class='del'>-	get_cpu_fpsimd_context();</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_thread_flag(TIF_SVE)) {</div><div class='del'>-		sve_to_fpsimd(current);</div><div class='del'>-		current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	put_cpu_fpsimd_context();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Associate current's FPSIMD context with this cpu</div><div class='ctx'>  * The caller must have ownership of the cpu FPSIMD context before calling</div><div class='ctx'>  * this function.</div><div class='hunk'>@@ -1810,30 +1750,14 @@ void fpsimd_restore_current_state(void)</div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Load an updated userland FPSIMD state for 'current' from memory and set the</div><div class='del'>- * flag that indicates that the FPSIMD register contents are the most recent</div><div class='del'>- * FPSIMD state of 'current'. This is used by the signal code to restore the</div><div class='del'>- * register state when returning from a signal handler in FPSIMD only cases,</div><div class='del'>- * any SVE context will be discarded.</div><div class='del'>- */</div><div class='ctx'> void fpsimd_update_current_state(struct user_fpsimd_state const *state)</div><div class='ctx'> {</div><div class='ctx'> 	if (WARN_ON(!system_supports_fpsimd()))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	get_cpu_fpsimd_context();</div><div class='del'>-</div><div class='ctx'> 	current-&gt;thread.uw.fpsimd_state = *state;</div><div class='del'>-	if (test_thread_flag(TIF_SVE))</div><div class='add'>+	if (current-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='ctx'> 		fpsimd_to_sve(current);</div><div class='del'>-</div><div class='del'>-	task_fpsimd_load();</div><div class='del'>-	fpsimd_bind_task_to_cpu();</div><div class='del'>-</div><div class='del'>-	clear_thread_flag(TIF_FOREIGN_FPSTATE);</div><div class='del'>-</div><div class='del'>-	put_cpu_fpsimd_context();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1863,6 +1787,17 @@ void fpsimd_flush_task_state(struct task_struct *t)</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fpsimd_save_and_flush_current_state(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_fpsimd())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	get_cpu_fpsimd_context();</div><div class='add'>+	fpsimd_save_user_state();</div><div class='add'>+	fpsimd_flush_task_state(current);</div><div class='add'>+	put_cpu_fpsimd_context();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Save the FPSIMD state to memory and invalidate cpu view.</div><div class='ctx'>  * This function must be called with preemption disabled.</div><div class='hunk'>@@ -1972,10 +1907,10 @@ EXPORT_SYMBOL_GPL(kernel_neon_end);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EFI</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_sve_state_used);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_sm_state);</div><div class='add'>+static struct user_fpsimd_state efi_fpsimd_state;</div><div class='add'>+static bool efi_fpsimd_state_used;</div><div class='add'>+static bool efi_sve_state_used;</div><div class='add'>+static bool efi_sm_state;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * EFI runtime services support functions</div><div class='hunk'>@@ -2008,18 +1943,16 @@ void __efi_fpsimd_begin(void)</div><div class='ctx'> 		 * If !efi_sve_state, SVE can't be in use yet and doesn't need</div><div class='ctx'> 		 * preserving:</div><div class='ctx'> 		 */</div><div class='del'>-		if (system_supports_sve() &amp;&amp; likely(efi_sve_state)) {</div><div class='del'>-			char *sve_state = this_cpu_ptr(efi_sve_state);</div><div class='add'>+		if (system_supports_sve() &amp;&amp; efi_sve_state != NULL) {</div><div class='ctx'> 			bool ffr = true;</div><div class='ctx'> 			u64 svcr;</div><div class='ctx'> </div><div class='del'>-			__this_cpu_write(efi_sve_state_used, true);</div><div class='add'>+			efi_sve_state_used = true;</div><div class='ctx'> </div><div class='ctx'> 			if (system_supports_sme()) {</div><div class='ctx'> 				svcr = read_sysreg_s(SYS_SVCR);</div><div class='ctx'> </div><div class='del'>-				__this_cpu_write(efi_sm_state,</div><div class='del'>-						 svcr &amp; SVCR_SM_MASK);</div><div class='add'>+				efi_sm_state = svcr &amp; SVCR_SM_MASK;</div><div class='ctx'> </div><div class='ctx'> 				/*</div><div class='ctx'> 				 * Unless we have FA64 FFR does not</div><div class='hunk'>@@ -2029,19 +1962,18 @@ void __efi_fpsimd_begin(void)</div><div class='ctx'> 					ffr = !(svcr &amp; SVCR_SM_MASK);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sve_save_state(sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='del'>-				       &amp;this_cpu_ptr(&amp;efi_fpsimd_state)-&gt;fpsr,</div><div class='del'>-				       ffr);</div><div class='add'>+			sve_save_state(efi_sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='add'>+				       &amp;efi_fpsimd_state.fpsr, ffr);</div><div class='ctx'> </div><div class='ctx'> 			if (system_supports_sme())</div><div class='ctx'> 				sysreg_clear_set_s(SYS_SVCR,</div><div class='ctx'> 						   SVCR_SM_MASK, 0);</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='del'>-			fpsimd_save_state(this_cpu_ptr(&amp;efi_fpsimd_state));</div><div class='add'>+			fpsimd_save_state(&amp;efi_fpsimd_state);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		__this_cpu_write(efi_fpsimd_state_used, true);</div><div class='add'>+		efi_fpsimd_state_used = true;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2053,12 +1985,10 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 	if (!system_supports_fpsimd())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) {</div><div class='add'>+	if (!efi_fpsimd_state_used) {</div><div class='ctx'> 		kernel_neon_end();</div><div class='ctx'> 	} else {</div><div class='del'>-		if (system_supports_sve() &amp;&amp;</div><div class='del'>-		    likely(__this_cpu_read(efi_sve_state_used))) {</div><div class='del'>-			char const *sve_state = this_cpu_ptr(efi_sve_state);</div><div class='add'>+		if (system_supports_sve() &amp;&amp; efi_sve_state_used) {</div><div class='ctx'> 			bool ffr = true;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -2067,7 +1997,7 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 			 * streaming mode.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (system_supports_sme()) {</div><div class='del'>-				if (__this_cpu_read(efi_sm_state)) {</div><div class='add'>+				if (efi_sm_state) {</div><div class='ctx'> 					sysreg_clear_set_s(SYS_SVCR,</div><div class='ctx'> 							   0,</div><div class='ctx'> 							   SVCR_SM_MASK);</div><div class='hunk'>@@ -2081,14 +2011,15 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sve_load_state(sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='del'>-				       &amp;this_cpu_ptr(&amp;efi_fpsimd_state)-&gt;fpsr,</div><div class='del'>-				       ffr);</div><div class='add'>+			sve_load_state(efi_sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='add'>+				       &amp;efi_fpsimd_state.fpsr, ffr);</div><div class='ctx'> </div><div class='del'>-			__this_cpu_write(efi_sve_state_used, false);</div><div class='add'>+			efi_sve_state_used = false;</div><div class='ctx'> 		} else {</div><div class='del'>-			fpsimd_load_state(this_cpu_ptr(&amp;efi_fpsimd_state));</div><div class='add'>+			fpsimd_load_state(&amp;efi_fpsimd_state);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		efi_fpsimd_state_used = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/ftrace.c b/arch/arm64/kernel/ftrace.c<br/>index a650f5e11fc5..5adad37ab4fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/ftrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/ftrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/ftrace.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS</div><div class='ctx'> struct fregs_offset {</div><div class='hunk'>@@ -23,10 +23,10 @@ struct fregs_offset {</div><div class='ctx'> 	int offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define FREGS_OFFSET(n, field)				\</div><div class='del'>-{							\</div><div class='del'>-	.name = n,					\</div><div class='del'>-	.offset = offsetof(struct ftrace_regs, field),	\</div><div class='add'>+#define FREGS_OFFSET(n, field)					\</div><div class='add'>+{								\</div><div class='add'>+	.name = n,						\</div><div class='add'>+	.offset = offsetof(struct __arch_ftrace_regs, field),	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct fregs_offset fregs_offsets[] = {</div><div class='hunk'>@@ -143,6 +143,69 @@ unsigned long ftrace_call_adjust(unsigned long addr)</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Convert fentry_ip to the symbol address without kallsyms */</div><div class='add'>+unsigned long arch_ftrace_get_symaddr(unsigned long fentry_ip)</div><div class='add'>+{</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When using patchable-function-entry without pre-function NOPS, ftrace</div><div class='add'>+	 * entry is the address of the first NOP after the function entry point.</div><div class='add'>+	 *</div><div class='add'>+	 * The compiler has either generated:</div><div class='add'>+	 *</div><div class='add'>+	 * func+00:	func:	NOP		// To be patched to MOV X9, LR</div><div class='add'>+	 * func+04:		NOP		// To be patched to BL &lt;caller&gt;</div><div class='add'>+	 *</div><div class='add'>+	 * Or:</div><div class='add'>+	 *</div><div class='add'>+	 * func-04:		BTI	C</div><div class='add'>+	 * func+00:	func:	NOP		// To be patched to MOV X9, LR</div><div class='add'>+	 * func+04:		NOP		// To be patched to BL &lt;caller&gt;</div><div class='add'>+	 *</div><div class='add'>+	 * The fentry_ip is the address of `BL &lt;caller&gt;` which is at `func + 4`</div><div class='add'>+	 * bytes in either case.</div><div class='add'>+	 */</div><div class='add'>+	if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))</div><div class='add'>+		return fentry_ip - AARCH64_INSN_SIZE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When using patchable-function-entry with pre-function NOPs, BTI is</div><div class='add'>+	 * a bit different.</div><div class='add'>+	 *</div><div class='add'>+	 * func+00:	func:	NOP		// To be patched to MOV X9, LR</div><div class='add'>+	 * func+04:		NOP		// To be patched to BL &lt;caller&gt;</div><div class='add'>+	 *</div><div class='add'>+	 * Or:</div><div class='add'>+	 *</div><div class='add'>+	 * func+00:	func:	BTI	C</div><div class='add'>+	 * func+04:		NOP		// To be patched to MOV X9, LR</div><div class='add'>+	 * func+08:		NOP		// To be patched to BL &lt;caller&gt;</div><div class='add'>+	 *</div><div class='add'>+	 * The fentry_ip is the address of `BL &lt;caller&gt;` which is at either</div><div class='add'>+	 * `func + 4` or `func + 8` depends on whether there is a BTI.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* If there is no BTI, the func address should be one instruction before. */</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ARM64_BTI_KERNEL))</div><div class='add'>+		return fentry_ip - AARCH64_INSN_SIZE;</div><div class='add'>+</div><div class='add'>+	/* We want to be extra safe in case entry ip is on the page edge,</div><div class='add'>+	 * but otherwise we need to avoid get_kernel_nofault()'s overhead.</div><div class='add'>+	 */</div><div class='add'>+	if ((fentry_ip &amp; ~PAGE_MASK) &lt; AARCH64_INSN_SIZE * 2) {</div><div class='add'>+		if (get_kernel_nofault(insn, (u32 *)(fentry_ip - AARCH64_INSN_SIZE * 2)))</div><div class='add'>+			return 0;</div><div class='add'>+	} else {</div><div class='add'>+		insn = *(u32 *)(fentry_ip - AARCH64_INSN_SIZE * 2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_bti(le32_to_cpu((__le32)insn)))</div><div class='add'>+		return fentry_ip - AARCH64_INSN_SIZE * 2;</div><div class='add'>+</div><div class='add'>+	return fentry_ip - AARCH64_INSN_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Replace a single instruction, which may be a branch or NOP.</div><div class='ctx'>  * If @validate == true, a replaced instruction is checked against 'old'.</div><div class='hunk'>@@ -195,10 +258,17 @@ int ftrace_update_ftrace_func(ftrace_func_t func)</div><div class='ctx'> 	return ftrace_modify_code(pc, 0, new, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct plt_entry *get_ftrace_plt(struct module *mod)</div><div class='add'>+static struct plt_entry *get_ftrace_plt(struct module *mod, unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_MODULES</div><div class='del'>-	struct plt_entry *plt = mod-&gt;arch.ftrace_trampolines;</div><div class='add'>+	struct plt_entry *plt = NULL;</div><div class='add'>+</div><div class='add'>+	if (within_module_mem_type(addr, mod, MOD_INIT_TEXT))</div><div class='add'>+		plt = mod-&gt;arch.init_ftrace_trampolines;</div><div class='add'>+	else if (within_module_mem_type(addr, mod, MOD_TEXT))</div><div class='add'>+		plt = mod-&gt;arch.ftrace_trampolines;</div><div class='add'>+	else</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	return &amp;plt[FTRACE_PLT_IDX];</div><div class='ctx'> #else</div><div class='hunk'>@@ -257,20 +327,19 @@ static bool ftrace_find_callable_addr(struct dyn_ftrace *rec,</div><div class='ctx'> 	 * dealing with an out-of-range condition, we can assume it</div><div class='ctx'> 	 * is due to a module being loaded far away from the kernel.</div><div class='ctx'> 	 *</div><div class='del'>-	 * NOTE: __module_text_address() must be called with preemption</div><div class='del'>-	 * disabled, but we can rely on ftrace_lock to ensure that 'mod'</div><div class='add'>+	 * NOTE: __module_text_address() must be called within a RCU read</div><div class='add'>+	 * section, but we can rely on ftrace_lock to ensure that 'mod'</div><div class='ctx'> 	 * retains its validity throughout the remainder of this code.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!mod) {</div><div class='del'>-		preempt_disable();</div><div class='add'>+		guard(rcu)();</div><div class='ctx'> 		mod = __module_text_address(pc);</div><div class='del'>-		preempt_enable();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!mod))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	plt = get_ftrace_plt(mod);</div><div class='add'>+	plt = get_ftrace_plt(mod, pc);</div><div class='ctx'> 	if (!plt) {</div><div class='ctx'> 		pr_err("ftrace: no module PLT for %ps\n", (void *)*addr);</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -481,7 +550,20 @@ void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent,</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 		       struct ftrace_ops *op, struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	prepare_ftrace_return(ip, &amp;fregs-&gt;lr, fregs-&gt;fp);</div><div class='add'>+	unsigned long return_hooker = (unsigned long)&amp;return_to_handler;</div><div class='add'>+	unsigned long frame_pointer = arch_ftrace_regs(fregs)-&gt;fp;</div><div class='add'>+	unsigned long *parent = &amp;arch_ftrace_regs(fregs)-&gt;lr;</div><div class='add'>+	unsigned long old;</div><div class='add'>+</div><div class='add'>+	if (unlikely(atomic_read(&amp;current-&gt;tracing_graph_pause)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old = *parent;</div><div class='add'>+</div><div class='add'>+	if (!function_graph_enter_regs(old, ip, frame_pointer,</div><div class='add'>+				       (void *)frame_pointer, fregs)) {</div><div class='add'>+		*parent = return_hooker;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S<br/>index cb68adcabe07..ca04b338cb0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/head.S</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;asm/scs.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='add'>+#include &lt;asm/stacktrace/frame.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/virt.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +89,7 @@ SYM_CODE_START(primary_entry)</div><div class='ctx'> 	adrp	x1, early_init_stack</div><div class='ctx'> 	mov	sp, x1</div><div class='ctx'> 	mov	x29, xzr</div><div class='del'>-	adrp	x0, init_idmap_pg_dir</div><div class='add'>+	adrp	x0, __pi_init_idmap_pg_dir</div><div class='ctx'> 	mov	x1, xzr</div><div class='ctx'> 	bl	__pi_create_init_idmap</div><div class='ctx'> </div><div class='hunk'>@@ -100,7 +101,7 @@ SYM_CODE_START(primary_entry)</div><div class='ctx'> 	cbnz	x19, 0f</div><div class='ctx'> 	dmb     sy</div><div class='ctx'> 	mov	x1, x0				// end of used region</div><div class='del'>-	adrp    x0, init_idmap_pg_dir</div><div class='add'>+	adrp    x0, __pi_init_idmap_pg_dir</div><div class='ctx'> 	adr_l	x2, dcache_inval_poc</div><div class='ctx'> 	blr	x2</div><div class='ctx'> 	b	1f</div><div class='hunk'>@@ -199,6 +200,8 @@ SYM_CODE_END(preserve_boot_args)</div><div class='ctx'> 	sub	sp, sp, #PT_REGS_SIZE</div><div class='ctx'> </div><div class='ctx'> 	stp	xzr, xzr, [sp, #S_STACKFRAME]</div><div class='add'>+	mov	\tmp1, #FRAME_META_TYPE_FINAL</div><div class='add'>+	str	\tmp1, [sp, #S_STACKFRAME_TYPE]</div><div class='ctx'> 	add	x29, sp, #S_STACKFRAME</div><div class='ctx'> </div><div class='ctx'> 	scs_load_current</div><div class='hunk'>@@ -295,25 +298,8 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)</div><div class='ctx'> 	msr	sctlr_el2, x0</div><div class='ctx'> 	isb</div><div class='ctx'> 0:</div><div class='del'>-	mov_q	x0, HCR_HOST_NVHE_FLAGS</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Compliant CPUs advertise their VHE-onlyness with</div><div class='del'>-	 * ID_AA64MMFR4_EL1.E2H0 &lt; 0. HCR_EL2.E2H can be</div><div class='del'>-	 * RES1 in that case. Publish the E2H bit early so that</div><div class='del'>-	 * it can be picked up by the init_el2_state macro.</div><div class='del'>-	 *</div><div class='del'>-	 * Fruity CPUs seem to have HCR_EL2.E2H set to RAO/WI, but</div><div class='del'>-	 * don't advertise it (they predate this relaxation).</div><div class='del'>-	 */</div><div class='del'>-	mrs_s	x1, SYS_ID_AA64MMFR4_EL1</div><div class='del'>-	tbz	x1, #(ID_AA64MMFR4_EL1_E2H0_SHIFT + ID_AA64MMFR4_EL1_E2H0_WIDTH - 1), 1f</div><div class='del'>-</div><div class='del'>-	orr	x0, x0, #HCR_E2H</div><div class='del'>-1:</div><div class='del'>-	msr	hcr_el2, x0</div><div class='del'>-	isb</div><div class='ctx'> </div><div class='add'>+	init_el2_hcr	HCR_HOST_NVHE_FLAGS</div><div class='ctx'> 	init_el2_state</div><div class='ctx'> </div><div class='ctx'> 	/* Hypervisor stub */</div><div class='hunk'>@@ -336,7 +322,8 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)</div><div class='ctx'> 	msr	sctlr_el1, x1</div><div class='ctx'> 	mov	x2, xzr</div><div class='ctx'> 3:</div><div class='del'>-	__init_el2_nvhe_prepare_eret</div><div class='add'>+	mov	x0, #INIT_PSTATE_EL1</div><div class='add'>+	msr	spsr_el2, x0</div><div class='ctx'> </div><div class='ctx'> 	mov	w0, #BOOT_CPU_MODE_EL2</div><div class='ctx'> 	orr	x0, x0, x2</div><div class='hunk'>@@ -520,7 +507,7 @@ SYM_FUNC_END(__no_granule_support)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START_LOCAL(__primary_switch)</div><div class='ctx'> 	adrp	x1, reserved_pg_dir</div><div class='del'>-	adrp	x2, init_idmap_pg_dir</div><div class='add'>+	adrp	x2, __pi_init_idmap_pg_dir</div><div class='ctx'> 	bl	__enable_mmu</div><div class='ctx'> </div><div class='ctx'> 	adrp	x1, early_init_stack</div><div class='head'>diff --git a/arch/arm64/kernel/hibernate.c b/arch/arm64/kernel/hibernate.c<br/>index 7b11d84f533c..18749e9a6c2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hibernate.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hibernate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hibernate.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/hibernate.c</a></div><div class='hunk'>@@ -266,9 +266,15 @@ static int swsusp_mte_save_tags(void)</div><div class='ctx'> 		max_zone_pfn = zone_end_pfn(zone);</div><div class='ctx'> 		for (pfn = zone-&gt;zone_start_pfn; pfn &lt; max_zone_pfn; pfn++) {</div><div class='ctx'> 			struct page *page = pfn_to_online_page(pfn);</div><div class='add'>+			struct folio *folio;</div><div class='ctx'> </div><div class='ctx'> 			if (!page)</div><div class='ctx'> 				continue;</div><div class='add'>+			folio = page_folio(page);</div><div class='add'>+</div><div class='add'>+			if (folio_test_hugetlb(folio) &amp;&amp;</div><div class='add'>+			    !folio_test_hugetlb_mte_tagged(folio))</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='ctx'> 			if (!page_mte_tagged(page))</div><div class='ctx'> 				continue;</div><div class='head'>diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c<br/>index 722ac45f9f7b..ab76b36dce82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hw_breakpoint.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hw_breakpoint.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/esr.h&gt;</div><div class='add'>+#include &lt;asm/exception.h&gt;</div><div class='ctx'> #include &lt;asm/hw_breakpoint.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='hunk'>@@ -618,8 +619,7 @@ NOKPROBE_SYMBOL(toggle_bp_registers);</div><div class='ctx'> /*</div><div class='ctx'>  * Debug exception handlers.</div><div class='ctx'>  */</div><div class='del'>-static int breakpoint_handler(unsigned long unused, unsigned long esr,</div><div class='del'>-			      struct pt_regs *regs)</div><div class='add'>+void do_breakpoint(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int i, step = 0, *kernel_step;</div><div class='ctx'> 	u32 ctrl_reg;</div><div class='hunk'>@@ -662,7 +662,7 @@ unlock:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!step)</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs)) {</div><div class='ctx'> 		debug_info-&gt;bps_disabled = 1;</div><div class='hunk'>@@ -670,7 +670,7 @@ unlock:</div><div class='ctx'> </div><div class='ctx'> 		/* If we're already stepping a watchpoint, just return. */</div><div class='ctx'> 		if (debug_info-&gt;wps_disabled)</div><div class='del'>-			return 0;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		if (test_thread_flag(TIF_SINGLESTEP))</div><div class='ctx'> 			debug_info-&gt;suspended_step = 1;</div><div class='hunk'>@@ -681,7 +681,7 @@ unlock:</div><div class='ctx'> 		kernel_step = this_cpu_ptr(&amp;stepping_kernel_bp);</div><div class='ctx'> </div><div class='ctx'> 		if (*kernel_step != ARM_KERNEL_STEP_NONE)</div><div class='del'>-			return 0;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		if (kernel_active_single_step()) {</div><div class='ctx'> 			*kernel_step = ARM_KERNEL_STEP_SUSPEND;</div><div class='hunk'>@@ -690,10 +690,8 @@ unlock:</div><div class='ctx'> 			kernel_enable_single_step(regs);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(breakpoint_handler);</div><div class='add'>+NOKPROBE_SYMBOL(do_breakpoint);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Arm64 hardware does not always report a watchpoint hit address that matches</div><div class='hunk'>@@ -752,8 +750,7 @@ static int watchpoint_report(struct perf_event *wp, unsigned long addr,</div><div class='ctx'> 	return step;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchpoint_handler(unsigned long addr, unsigned long esr,</div><div class='del'>-			      struct pt_regs *regs)</div><div class='add'>+void do_watchpoint(unsigned long addr, unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int i, step = 0, *kernel_step, access, closest_match = 0;</div><div class='ctx'> 	u64 min_dist = -1, dist;</div><div class='hunk'>@@ -808,7 +805,7 @@ static int watchpoint_handler(unsigned long addr, unsigned long esr,</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (!step)</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We always disable EL0 watchpoints because the kernel can</div><div class='hunk'>@@ -821,7 +818,7 @@ static int watchpoint_handler(unsigned long addr, unsigned long esr,</div><div class='ctx'> </div><div class='ctx'> 		/* If we're already stepping a breakpoint, just return. */</div><div class='ctx'> 		if (debug_info-&gt;bps_disabled)</div><div class='del'>-			return 0;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		if (test_thread_flag(TIF_SINGLESTEP))</div><div class='ctx'> 			debug_info-&gt;suspended_step = 1;</div><div class='hunk'>@@ -832,7 +829,7 @@ static int watchpoint_handler(unsigned long addr, unsigned long esr,</div><div class='ctx'> 		kernel_step = this_cpu_ptr(&amp;stepping_kernel_bp);</div><div class='ctx'> </div><div class='ctx'> 		if (*kernel_step != ARM_KERNEL_STEP_NONE)</div><div class='del'>-			return 0;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		if (kernel_active_single_step()) {</div><div class='ctx'> 			*kernel_step = ARM_KERNEL_STEP_SUSPEND;</div><div class='hunk'>@@ -841,44 +838,41 @@ static int watchpoint_handler(unsigned long addr, unsigned long esr,</div><div class='ctx'> 			kernel_enable_single_step(regs);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(watchpoint_handler);</div><div class='add'>+NOKPROBE_SYMBOL(do_watchpoint);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Handle single-step exception.</div><div class='ctx'>  */</div><div class='del'>-int reinstall_suspended_bps(struct pt_regs *regs)</div><div class='add'>+bool try_step_suspended_breakpoints(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct debug_info *debug_info = &amp;current-&gt;thread.debug;</div><div class='del'>-	int handled_exception = 0, *kernel_step;</div><div class='del'>-</div><div class='del'>-	kernel_step = this_cpu_ptr(&amp;stepping_kernel_bp);</div><div class='add'>+	int *kernel_step = this_cpu_ptr(&amp;stepping_kernel_bp);</div><div class='add'>+	bool handled_exception = false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Called from single-step exception handler.</div><div class='del'>-	 * Return 0 if execution can resume, 1 if a SIGTRAP should be</div><div class='del'>-	 * reported.</div><div class='add'>+	 * Called from single-step exception entry.</div><div class='add'>+	 * Return true if we stepped a breakpoint and can resume execution,</div><div class='add'>+	 * false if we need to handle a single-step.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (user_mode(regs)) {</div><div class='ctx'> 		if (debug_info-&gt;bps_disabled) {</div><div class='ctx'> 			debug_info-&gt;bps_disabled = 0;</div><div class='ctx'> 			toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL0, 1);</div><div class='del'>-			handled_exception = 1;</div><div class='add'>+			handled_exception = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (debug_info-&gt;wps_disabled) {</div><div class='ctx'> 			debug_info-&gt;wps_disabled = 0;</div><div class='ctx'> 			toggle_bp_registers(AARCH64_DBG_REG_WCR, DBG_ACTIVE_EL0, 1);</div><div class='del'>-			handled_exception = 1;</div><div class='add'>+			handled_exception = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (handled_exception) {</div><div class='ctx'> 			if (debug_info-&gt;suspended_step) {</div><div class='ctx'> 				debug_info-&gt;suspended_step = 0;</div><div class='ctx'> 				/* Allow exception handling to fall-through. */</div><div class='del'>-				handled_exception = 0;</div><div class='add'>+				handled_exception = false;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				user_disable_single_step(current);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -892,17 +886,17 @@ int reinstall_suspended_bps(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 		if (*kernel_step != ARM_KERNEL_STEP_SUSPEND) {</div><div class='ctx'> 			kernel_disable_single_step();</div><div class='del'>-			handled_exception = 1;</div><div class='add'>+			handled_exception = true;</div><div class='ctx'> 		} else {</div><div class='del'>-			handled_exception = 0;</div><div class='add'>+			handled_exception = false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		*kernel_step = ARM_KERNEL_STEP_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return !handled_exception;</div><div class='add'>+	return handled_exception;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(reinstall_suspended_bps);</div><div class='add'>+NOKPROBE_SYMBOL(try_step_suspended_breakpoints);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Context-switcher for restoring suspended breakpoints.</div><div class='hunk'>@@ -987,12 +981,6 @@ static int __init arch_hw_breakpoint_init(void)</div><div class='ctx'> 	pr_info("found %d breakpoint and %d watchpoint registers.\n",</div><div class='ctx'> 		core_num_brps, core_num_wrps);</div><div class='ctx'> </div><div class='del'>-	/* Register debug fault handlers. */</div><div class='del'>-	hook_debug_fault_code(DBG_ESR_EVT_HWBP, breakpoint_handler, SIGTRAP,</div><div class='del'>-			      TRAP_HWBKPT, "hw-breakpoint handler");</div><div class='del'>-	hook_debug_fault_code(DBG_ESR_EVT_HWWP, watchpoint_handler, SIGTRAP,</div><div class='del'>-			      TRAP_HWBKPT, "hw-watchpoint handler");</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reset the breakpoint resources. We assume that a halting</div><div class='ctx'> 	 * debugger will leave the world in a nice state for us.</div><div class='head'>diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S<br/>index 65f76064c86b..36e2d26b54f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hyp-stub.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/hyp-stub.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/hyp-stub.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/hyp-stub.S</a></div><div class='hunk'>@@ -97,7 +97,7 @@ SYM_CODE_START_LOCAL(__finalise_el2)</div><div class='ctx'> 2:</div><div class='ctx'> 	// Engage the VHE magic!</div><div class='ctx'> 	mov_q	x0, HCR_HOST_VHE_FLAGS</div><div class='del'>-	msr	hcr_el2, x0</div><div class='add'>+	msr_hcr_el2 x0</div><div class='ctx'> 	isb</div><div class='ctx'> </div><div class='ctx'> 	// Use the EL1 allocated stack, per-cpu offset</div><div class='hunk'>@@ -114,8 +114,8 @@ SYM_CODE_START_LOCAL(__finalise_el2)</div><div class='ctx'> </div><div class='ctx'> 	// Use EL2 translations for SPE &amp; TRBE and disable access from EL1</div><div class='ctx'> 	mrs	x0, mdcr_el2</div><div class='del'>-	bic	x0, x0, #(MDCR_EL2_E2PB_MASK &lt;&lt; MDCR_EL2_E2PB_SHIFT)</div><div class='del'>-	bic	x0, x0, #(MDCR_EL2_E2TB_MASK &lt;&lt; MDCR_EL2_E2TB_SHIFT)</div><div class='add'>+	bic	x0, x0, #MDCR_EL2_E2PB_MASK</div><div class='add'>+	bic	x0, x0, #MDCR_EL2_E2TB_MASK</div><div class='ctx'> 	msr	mdcr_el2, x0</div><div class='ctx'> </div><div class='ctx'> 	// Transfer the MM state from EL1 to EL2</div><div class='head'>diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h<br/>index 8f5422ed1b75..5369763606e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/image-vars.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/image-vars.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/image-vars.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/image-vars.h</a></div><div class='hunk'>@@ -10,6 +10,16 @@</div><div class='ctx'> #error This file should only be included in vmlinux.lds.S</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_LD_IS_LLD) &amp;&amp; CONFIG_LLD_VERSION &lt; 210000</div><div class='add'>+#define ASSERT(...)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define PI_EXPORT_SYM(sym)		\</div><div class='add'>+	__PI_EXPORT_SYM(sym, __pi_ ## sym, Cannot export BSS symbol sym to startup code)</div><div class='add'>+#define __PI_EXPORT_SYM(sym, pisym, msg)\</div><div class='add'>+	PROVIDE(pisym = sym);		\</div><div class='add'>+	ASSERT((sym - KIMAGE_VADDR) &lt; (__bss_start - KIMAGE_VADDR), #msg)</div><div class='add'>+</div><div class='ctx'> PROVIDE(__efistub_primary_entry		= primary_entry);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -36,40 +46,30 @@ PROVIDE(__pi___memcpy			= __pi_memcpy);</div><div class='ctx'> PROVIDE(__pi___memmove			= __pi_memmove);</div><div class='ctx'> PROVIDE(__pi___memset			= __pi_memset);</div><div class='ctx'> </div><div class='del'>-PROVIDE(__pi_id_aa64isar1_override	= id_aa64isar1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64isar2_override	= id_aa64isar2_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr0_override	= id_aa64mmfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr1_override	= id_aa64mmfr1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr2_override	= id_aa64mmfr2_override);</div><div class='del'>-PROVIDE(__pi_id_aa64pfr0_override	= id_aa64pfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64pfr1_override	= id_aa64pfr1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64smfr0_override	= id_aa64smfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64zfr0_override	= id_aa64zfr0_override);</div><div class='del'>-PROVIDE(__pi_arm64_sw_feature_override	= arm64_sw_feature_override);</div><div class='del'>-PROVIDE(__pi_arm64_use_ng_mappings	= arm64_use_ng_mappings);</div><div class='del'>-#ifdef CONFIG_CAVIUM_ERRATUM_27456</div><div class='del'>-PROVIDE(__pi_cavium_erratum_27456_cpus	= cavium_erratum_27456_cpus);</div><div class='del'>-#endif</div><div class='del'>-PROVIDE(__pi__ctype			= _ctype);</div><div class='del'>-PROVIDE(__pi_memstart_offset_seed	= memstart_offset_seed);</div><div class='del'>-</div><div class='del'>-PROVIDE(__pi_init_idmap_pg_dir		= init_idmap_pg_dir);</div><div class='del'>-PROVIDE(__pi_init_idmap_pg_end		= init_idmap_pg_end);</div><div class='del'>-PROVIDE(__pi_init_pg_dir		= init_pg_dir);</div><div class='del'>-PROVIDE(__pi_init_pg_end		= init_pg_end);</div><div class='del'>-PROVIDE(__pi_swapper_pg_dir		= swapper_pg_dir);</div><div class='del'>-</div><div class='del'>-PROVIDE(__pi__text			= _text);</div><div class='del'>-PROVIDE(__pi__stext               	= _stext);</div><div class='del'>-PROVIDE(__pi__etext               	= _etext);</div><div class='del'>-PROVIDE(__pi___start_rodata       	= __start_rodata);</div><div class='del'>-PROVIDE(__pi___inittext_begin     	= __inittext_begin);</div><div class='del'>-PROVIDE(__pi___inittext_end       	= __inittext_end);</div><div class='del'>-PROVIDE(__pi___initdata_begin     	= __initdata_begin);</div><div class='del'>-PROVIDE(__pi___initdata_end       	= __initdata_end);</div><div class='del'>-PROVIDE(__pi__data                	= _data);</div><div class='del'>-PROVIDE(__pi___bss_start		= __bss_start);</div><div class='del'>-PROVIDE(__pi__end			= _end);</div><div class='add'>+PI_EXPORT_SYM(id_aa64isar1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64isar2_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr2_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64pfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64pfr1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64smfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64zfr0_override);</div><div class='add'>+PI_EXPORT_SYM(arm64_sw_feature_override);</div><div class='add'>+PI_EXPORT_SYM(arm64_use_ng_mappings);</div><div class='add'>+PI_EXPORT_SYM(_ctype);</div><div class='add'>+</div><div class='add'>+PI_EXPORT_SYM(swapper_pg_dir);</div><div class='add'>+</div><div class='add'>+PI_EXPORT_SYM(_text);</div><div class='add'>+PI_EXPORT_SYM(_stext);</div><div class='add'>+PI_EXPORT_SYM(_etext);</div><div class='add'>+PI_EXPORT_SYM(__start_rodata);</div><div class='add'>+PI_EXPORT_SYM(__inittext_begin);</div><div class='add'>+PI_EXPORT_SYM(__inittext_end);</div><div class='add'>+PI_EXPORT_SYM(__initdata_begin);</div><div class='add'>+PI_EXPORT_SYM(__initdata_end);</div><div class='add'>+PI_EXPORT_SYM(_data);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM</div><div class='ctx'> </div><div class='hunk'>@@ -105,15 +105,16 @@ KVM_NVHE_ALIAS(__hyp_stub_vectors);</div><div class='ctx'> KVM_NVHE_ALIAS(vgic_v2_cpuif_trap);</div><div class='ctx'> KVM_NVHE_ALIAS(vgic_v3_cpuif_trap);</div><div class='ctx'> </div><div class='add'>+/* Static key indicating whether GICv3 has GICv2 compatibility */</div><div class='add'>+KVM_NVHE_ALIAS(vgic_v3_has_v2_compat);</div><div class='add'>+</div><div class='add'>+/* Static key which is set if CNTVOFF_EL2 is unusable */</div><div class='add'>+KVM_NVHE_ALIAS(broken_cntvoff_key);</div><div class='add'>+</div><div class='ctx'> /* EL2 exception handling */</div><div class='ctx'> KVM_NVHE_ALIAS(__start___kvm_ex_table);</div><div class='ctx'> KVM_NVHE_ALIAS(__stop___kvm_ex_table);</div><div class='ctx'> </div><div class='del'>-/* PMU available static key */</div><div class='del'>-#ifdef CONFIG_HW_PERF_EVENTS</div><div class='del'>-KVM_NVHE_ALIAS(kvm_arm_pmu_available);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Position-independent library routines */</div><div class='ctx'> KVM_NVHE_ALIAS_HYP(clear_page, __pi_clear_page);</div><div class='ctx'> KVM_NVHE_ALIAS_HYP(copy_page, __pi_copy_page);</div><div class='hunk'>@@ -132,6 +133,8 @@ KVM_NVHE_ALIAS(__hyp_text_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_text_end);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_bss_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_bss_end);</div><div class='add'>+KVM_NVHE_ALIAS(__hyp_data_start);</div><div class='add'>+KVM_NVHE_ALIAS(__hyp_data_end);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_rodata_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_rodata_end);</div><div class='ctx'> </div><div class='hunk'>@@ -144,4 +147,17 @@ KVM_NVHE_ALIAS(kvm_protected_mode_initialized);</div><div class='ctx'> _kernel_codesize = ABSOLUTE(__inittext_end - _text);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * LLD will occasionally error out with a '__init_end does not converge' error</div><div class='add'>+ * if INIT_IDMAP_DIR_SIZE is defined in terms of _end, as this results in a</div><div class='add'>+ * circular dependency. Counter this by dimensioning the initial IDMAP page</div><div class='add'>+ * tables based on kimage_limit, which is defined such that its value should</div><div class='add'>+ * not change as a result of the initdata segment being pushed over a 64k</div><div class='add'>+ * segment boundary due to changes in INIT_IDMAP_DIR_SIZE, provided that its</div><div class='add'>+ * value doesn't change by more than 2M between linker passes.</div><div class='add'>+ */</div><div class='add'>+kimage_limit = ALIGN(ABSOLUTE(_end + SZ_64K), SZ_2M);</div><div class='add'>+</div><div class='add'>+#undef ASSERT</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KERNEL_IMAGE_VARS_H */</div><div class='head'>diff --git a/arch/arm64/kernel/io.c b/arch/arm64/kernel/io.c<br/>index ef48089fbfe1..fe86ada23c7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/io.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/io.c</a></div><div class='hunk'>@@ -10,34 +10,6 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Copy data from IO memory space to "real" memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)from, 8)) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		*(u64 *)to = __raw_readq(from);</div><div class='del'>-		from += 8;</div><div class='del'>-		to += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_fromio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * This generates a memcpy that works on a from/to address which is aligned to</div><div class='ctx'>  * bits. Count is in terms of the number of bits sized quantities to copy. It</div><div class='ctx'>  * optimizes to use the STR groupings when possible so that it is WC friendly.</div><div class='hunk'>@@ -78,62 +50,3 @@ void __iowrite32_copy_full(void __iomem *to, const void *from, size_t count)</div><div class='ctx'> 	dgh();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__iowrite32_copy_full);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy data from "real" memory space to IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)to, 8)) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		__raw_writeq(*(u64 *)from, to);</div><div class='del'>-		from += 8;</div><div class='del'>-		to += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_toio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "memset" on IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memset_io(volatile void __iomem *dst, int c, size_t count)</div><div class='del'>-{</div><div class='del'>-	u64 qc = (u8)c;</div><div class='del'>-</div><div class='del'>-	qc |= qc &lt;&lt; 8;</div><div class='del'>-	qc |= qc &lt;&lt; 16;</div><div class='del'>-	qc |= qc &lt;&lt; 32;</div><div class='del'>-</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)dst, 8)) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		__raw_writeq(qc, dst);</div><div class='del'>-		dst += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memset_io);</div><div class='head'>diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c<br/>index 85087e2df564..c0065a1d77cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/irq.c</a></div><div class='hunk'>@@ -51,7 +51,6 @@ static void init_irq_scs(void)</div><div class='ctx'> 			scs_alloc(early_cpu_to_node(cpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> static void __init init_irq_stacks(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='hunk'>@@ -62,18 +61,6 @@ static void __init init_irq_stacks(void)</div><div class='ctx'> 		per_cpu(irq_stack_ptr, cpu) = p;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */</div><div class='del'>-DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);</div><div class='del'>-</div><div class='del'>-static void init_irq_stacks(void)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(cpu)</div><div class='del'>-		per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_PREEMPT_RT</div><div class='ctx'> static void ____do_softirq(struct pt_regs *regs)</div><div class='head'>diff --git a/arch/arm64/kernel/jump_label.c b/arch/arm64/kernel/jump_label.c<br/>index f63ea915d6ad..b345425193d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/jump_label.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/jump_label.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/jump_label.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/jump_label.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> bool arch_jump_label_transform_queue(struct jump_entry *entry,</div><div class='ctx'> 				     enum jump_label_type type)</div><div class='head'>diff --git a/arch/arm64/kernel/kaslr.c b/arch/arm64/kernel/kaslr.c<br/>index 1da3e25f9d9e..c9503ed45a6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/kaslr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/kaslr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/kaslr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/kaslr.c</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='del'>-u16 __initdata memstart_offset_seed;</div><div class='del'>-</div><div class='ctx'> bool __ro_after_init __kaslr_is_enabled = false;</div><div class='ctx'> </div><div class='ctx'> void __init kaslr_init(void)</div><div class='head'>diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c<br/>index 4e1f983df3d1..968324a79a89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/kgdb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/kgdb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/kgdb.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {</div><div class='hunk'>@@ -234,23 +234,23 @@ int kgdb_arch_handle_exception(int exception_vector, int signo,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kgdb_brk_fn(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int kgdb_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	kgdb_handle_exception(1, SIGTRAP, 0, regs);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(kgdb_brk_fn)</div><div class='add'>+NOKPROBE_SYMBOL(kgdb_brk_handler)</div><div class='ctx'> </div><div class='del'>-static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int kgdb_compiled_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	compiled_break = 1;</div><div class='ctx'> 	kgdb_handle_exception(1, SIGTRAP, 0, regs);</div><div class='ctx'> </div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(kgdb_compiled_brk_fn);</div><div class='add'>+NOKPROBE_SYMBOL(kgdb_compiled_brk_handler);</div><div class='ctx'> </div><div class='del'>-static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int kgdb_single_step_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	if (!kgdb_single_step)</div><div class='ctx'> 		return DBG_HOOK_ERROR;</div><div class='hunk'>@@ -258,21 +258,7 @@ static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	kgdb_handle_exception(0, SIGTRAP, 0, regs);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='del'>-NOKPROBE_SYMBOL(kgdb_step_brk_fn);</div><div class='del'>-</div><div class='del'>-static struct break_hook kgdb_brkpt_hook = {</div><div class='del'>-	.fn		= kgdb_brk_fn,</div><div class='del'>-	.imm		= KGDB_DYN_DBG_BRK_IMM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct break_hook kgdb_compiled_brkpt_hook = {</div><div class='del'>-	.fn		= kgdb_compiled_brk_fn,</div><div class='del'>-	.imm		= KGDB_COMPILED_DBG_BRK_IMM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct step_hook kgdb_step_hook = {</div><div class='del'>-	.fn		= kgdb_step_brk_fn</div><div class='del'>-};</div><div class='add'>+NOKPROBE_SYMBOL(kgdb_single_step_handler);</div><div class='ctx'> </div><div class='ctx'> static int __kgdb_notify(struct die_args *args, unsigned long cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -311,15 +297,7 @@ static struct notifier_block kgdb_notifier = {</div><div class='ctx'>  */</div><div class='ctx'> int kgdb_arch_init(void)</div><div class='ctx'> {</div><div class='del'>-	int ret = register_die_notifier(&amp;kgdb_notifier);</div><div class='del'>-</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	register_kernel_break_hook(&amp;kgdb_brkpt_hook);</div><div class='del'>-	register_kernel_break_hook(&amp;kgdb_compiled_brkpt_hook);</div><div class='del'>-	register_kernel_step_hook(&amp;kgdb_step_hook);</div><div class='del'>-	return 0;</div><div class='add'>+	return register_die_notifier(&amp;kgdb_notifier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -329,9 +307,6 @@ int kgdb_arch_init(void)</div><div class='ctx'>  */</div><div class='ctx'> void kgdb_arch_exit(void)</div><div class='ctx'> {</div><div class='del'>-	unregister_kernel_break_hook(&amp;kgdb_brkpt_hook);</div><div class='del'>-	unregister_kernel_break_hook(&amp;kgdb_compiled_brkpt_hook);</div><div class='del'>-	unregister_kernel_step_hook(&amp;kgdb_step_hook);</div><div class='ctx'> 	unregister_die_notifier(&amp;kgdb_notifier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c<br/>index 82e2203d86a3..6f121a0164a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/machine_kexec.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/machine_kexec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/machine_kexec.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -207,37 +207,6 @@ void machine_kexec(struct kimage *kimage)</div><div class='ctx'> 	BUG(); /* Should never get here. */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void machine_kexec_mask_interrupts(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-	struct irq_desc *desc;</div><div class='del'>-</div><div class='del'>-	for_each_irq_desc(i, desc) {</div><div class='del'>-		struct irq_chip *chip;</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		chip = irq_desc_get_chip(desc);</div><div class='del'>-		if (!chip)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * First try to remove the active state. If this</div><div class='del'>-		 * fails, try to EOI the interrupt.</div><div class='del'>-		 */</div><div class='del'>-		ret = irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false);</div><div class='del'>-</div><div class='del'>-		if (ret &amp;&amp; irqd_irq_inprogress(&amp;desc-&gt;irq_data) &amp;&amp;</div><div class='del'>-		    chip-&gt;irq_eoi)</div><div class='del'>-			chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_mask)</div><div class='del'>-			chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_disable &amp;&amp; !irqd_irq_disabled(&amp;desc-&gt;irq_data))</div><div class='del'>-			chip-&gt;irq_disable(&amp;desc-&gt;irq_data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * machine_crash_shutdown - shutdown non-crashing cpus and save registers</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm64/kernel/machine_kexec_file.c b/arch/arm64/kernel/machine_kexec_file.c<br/>index af1ca875c52c..410060ebd86d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/machine_kexec_file.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/machine_kexec_file.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/machine_kexec_file.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/machine_kexec_file.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ int load_other_segments(struct kimage *image,</div><div class='ctx'> 			char *initrd, unsigned long initrd_len,</div><div class='ctx'> 			char *cmdline)</div><div class='ctx'> {</div><div class='del'>-	struct kexec_buf kbuf;</div><div class='add'>+	struct kexec_buf kbuf = {};</div><div class='ctx'> 	void *dtb = NULL;</div><div class='ctx'> 	unsigned long initrd_load_addr = 0, dtb_len,</div><div class='ctx'> 		      orig_segments = image-&gt;nr_segments;</div><div class='head'>diff --git a/arch/arm64/kernel/module-plts.c b/arch/arm64/kernel/module-plts.c<br/>index bde32979c06a..7afd370da9f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/module-plts.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/module-plts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/module-plts.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/module-plts.c</a></div><div class='hunk'>@@ -283,7 +283,7 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,</div><div class='ctx'> 	unsigned long core_plts = 0;</div><div class='ctx'> 	unsigned long init_plts = 0;</div><div class='ctx'> 	Elf64_Sym *syms = NULL;</div><div class='del'>-	Elf_Shdr *pltsec, *tramp = NULL;</div><div class='add'>+	Elf_Shdr *pltsec, *tramp = NULL, *init_tramp = NULL;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -298,6 +298,9 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,</div><div class='ctx'> 		else if (!strcmp(secstrings + sechdrs[i].sh_name,</div><div class='ctx'> 				 ".text.ftrace_trampoline"))</div><div class='ctx'> 			tramp = sechdrs + i;</div><div class='add'>+		else if (!strcmp(secstrings + sechdrs[i].sh_name,</div><div class='add'>+				 ".init.text.ftrace_trampoline"))</div><div class='add'>+			init_tramp = sechdrs + i;</div><div class='ctx'> 		else if (sechdrs[i].sh_type == SHT_SYMTAB)</div><div class='ctx'> 			syms = (Elf64_Sym *)sechdrs[i].sh_addr;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -363,5 +366,12 @@ int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs,</div><div class='ctx'> 		tramp-&gt;sh_size = NR_FTRACE_PLTS * sizeof(struct plt_entry);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (init_tramp) {</div><div class='add'>+		init_tramp-&gt;sh_type = SHT_NOBITS;</div><div class='add'>+		init_tramp-&gt;sh_flags = SHF_EXECINSTR | SHF_ALLOC;</div><div class='add'>+		init_tramp-&gt;sh_addralign = __alignof__(struct plt_entry);</div><div class='add'>+		init_tramp-&gt;sh_size = NR_FTRACE_PLTS * sizeof(struct plt_entry);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/module.c b/arch/arm64/kernel/module.c<br/>index 36b25af56324..d6d443c4a01a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/module.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/module.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/module.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/scs.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum aarch64_reloc_op {</div><div class='ctx'> 	RELOC_OP_NONE,</div><div class='hunk'>@@ -48,7 +49,17 @@ static u64 do_reloc(enum aarch64_reloc_op reloc_op, __le32 *place, u64 val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int reloc_data(enum aarch64_reloc_op op, void *place, u64 val, int len)</div><div class='add'>+#define WRITE_PLACE(place, val, mod) do {				\</div><div class='add'>+	__typeof__(val) __val = (val);					\</div><div class='add'>+									\</div><div class='add'>+	if (mod-&gt;state == MODULE_STATE_UNFORMED)			\</div><div class='add'>+		*(place) = __val;					\</div><div class='add'>+	else								\</div><div class='add'>+		aarch64_insn_copy(place, &amp;(__val), sizeof(*place));	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+static int reloc_data(enum aarch64_reloc_op op, void *place, u64 val, int len,</div><div class='add'>+		      struct module *me)</div><div class='ctx'> {</div><div class='ctx'> 	s64 sval = do_reloc(op, place, val);</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +77,7 @@ static int reloc_data(enum aarch64_reloc_op op, void *place, u64 val, int len)</div><div class='ctx'> </div><div class='ctx'> 	switch (len) {</div><div class='ctx'> 	case 16:</div><div class='del'>-		*(s16 *)place = sval;</div><div class='add'>+		WRITE_PLACE((s16 *)place, sval, me);</div><div class='ctx'> 		switch (op) {</div><div class='ctx'> 		case RELOC_OP_ABS:</div><div class='ctx'> 			if (sval &lt; 0 || sval &gt; U16_MAX)</div><div class='hunk'>@@ -82,7 +93,7 @@ static int reloc_data(enum aarch64_reloc_op op, void *place, u64 val, int len)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 32:</div><div class='del'>-		*(s32 *)place = sval;</div><div class='add'>+		WRITE_PLACE((s32 *)place, sval, me);</div><div class='ctx'> 		switch (op) {</div><div class='ctx'> 		case RELOC_OP_ABS:</div><div class='ctx'> 			if (sval &lt; 0 || sval &gt; U32_MAX)</div><div class='hunk'>@@ -98,7 +109,7 @@ static int reloc_data(enum aarch64_reloc_op op, void *place, u64 val, int len)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 64:</div><div class='del'>-		*(s64 *)place = sval;</div><div class='add'>+		WRITE_PLACE((s64 *)place, sval, me);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_err("Invalid length (%d) for data relocation\n", len);</div><div class='hunk'>@@ -113,7 +124,8 @@ enum aarch64_insn_movw_imm_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int reloc_insn_movw(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='del'>-			   int lsb, enum aarch64_insn_movw_imm_type imm_type)</div><div class='add'>+			   int lsb, enum aarch64_insn_movw_imm_type imm_type,</div><div class='add'>+			   struct module *me)</div><div class='ctx'> {</div><div class='ctx'> 	u64 imm;</div><div class='ctx'> 	s64 sval;</div><div class='hunk'>@@ -145,7 +157,7 @@ static int reloc_insn_movw(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='ctx'> </div><div class='ctx'> 	/* Update the instruction with the new encoding. */</div><div class='ctx'> 	insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_16, insn, imm);</div><div class='del'>-	*place = cpu_to_le32(insn);</div><div class='add'>+	WRITE_PLACE(place, cpu_to_le32(insn), me);</div><div class='ctx'> </div><div class='ctx'> 	if (imm &gt; U16_MAX)</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -154,7 +166,8 @@ static int reloc_insn_movw(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int reloc_insn_imm(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='del'>-			  int lsb, int len, enum aarch64_insn_imm_type imm_type)</div><div class='add'>+			  int lsb, int len, enum aarch64_insn_imm_type imm_type,</div><div class='add'>+			  struct module *me)</div><div class='ctx'> {</div><div class='ctx'> 	u64 imm, imm_mask;</div><div class='ctx'> 	s64 sval;</div><div class='hunk'>@@ -170,7 +183,7 @@ static int reloc_insn_imm(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='ctx'> </div><div class='ctx'> 	/* Update the instruction's immediate field. */</div><div class='ctx'> 	insn = aarch64_insn_encode_immediate(imm_type, insn, imm);</div><div class='del'>-	*place = cpu_to_le32(insn);</div><div class='add'>+	WRITE_PLACE(place, cpu_to_le32(insn), me);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Extract the upper value bits (including the sign bit) and</div><div class='hunk'>@@ -189,17 +202,17 @@ static int reloc_insn_imm(enum aarch64_reloc_op op, __le32 *place, u64 val,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int reloc_insn_adrp(struct module *mod, Elf64_Shdr *sechdrs,</div><div class='del'>-			   __le32 *place, u64 val)</div><div class='add'>+			   __le32 *place, u64 val, struct module *me)</div><div class='ctx'> {</div><div class='ctx'> 	u32 insn;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_forbidden_offset_for_adrp(place))</div><div class='ctx'> 		return reloc_insn_imm(RELOC_OP_PAGE, place, val, 12, 21,</div><div class='del'>-				      AARCH64_INSN_IMM_ADR);</div><div class='add'>+				      AARCH64_INSN_IMM_ADR, me);</div><div class='ctx'> </div><div class='ctx'> 	/* patch ADRP to ADR if it is in range */</div><div class='ctx'> 	if (!reloc_insn_imm(RELOC_OP_PREL, place, val &amp; ~0xfff, 0, 21,</div><div class='del'>-			    AARCH64_INSN_IMM_ADR)) {</div><div class='add'>+			    AARCH64_INSN_IMM_ADR, me)) {</div><div class='ctx'> 		insn = le32_to_cpu(*place);</div><div class='ctx'> 		insn &amp;= ~BIT(31);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -211,7 +224,7 @@ static int reloc_insn_adrp(struct module *mod, Elf64_Shdr *sechdrs,</div><div class='ctx'> 						   AARCH64_INSN_BRANCH_NOLINK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*place = cpu_to_le32(insn);</div><div class='add'>+	WRITE_PLACE(place, cpu_to_le32(insn), me);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -255,23 +268,23 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,</div><div class='ctx'> 		/* Data relocations. */</div><div class='ctx'> 		case R_AARCH64_ABS64:</div><div class='ctx'> 			overflow_check = false;</div><div class='del'>-			ovf = reloc_data(RELOC_OP_ABS, loc, val, 64);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_ABS, loc, val, 64, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_ABS32:</div><div class='del'>-			ovf = reloc_data(RELOC_OP_ABS, loc, val, 32);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_ABS, loc, val, 32, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_ABS16:</div><div class='del'>-			ovf = reloc_data(RELOC_OP_ABS, loc, val, 16);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_ABS, loc, val, 16, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_PREL64:</div><div class='ctx'> 			overflow_check = false;</div><div class='del'>-			ovf = reloc_data(RELOC_OP_PREL, loc, val, 64);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_PREL, loc, val, 64, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_PREL32:</div><div class='del'>-			ovf = reloc_data(RELOC_OP_PREL, loc, val, 32);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_PREL, loc, val, 32, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_PREL16:</div><div class='del'>-			ovf = reloc_data(RELOC_OP_PREL, loc, val, 16);</div><div class='add'>+			ovf = reloc_data(RELOC_OP_PREL, loc, val, 16, me);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* MOVW instruction relocations. */</div><div class='hunk'>@@ -280,88 +293,88 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G0:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G1_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G1:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G2_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G2:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_UABS_G3:</div><div class='ctx'> 			/* We're using the top bits so we can't overflow. */</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 48,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_SABS_G0:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_SABS_G1:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_SABS_G2:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G0_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 0,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G0:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 0,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G1_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 16,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G1:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 16,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G2_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 32,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVKZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVKZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G2:</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 32,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_MOVW_PREL_G3:</div><div class='ctx'> 			/* We're using the top bits so we can't overflow. */</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_movw(RELOC_OP_PREL, loc, val, 48,</div><div class='del'>-					      AARCH64_INSN_IMM_MOVNZ);</div><div class='add'>+					      AARCH64_INSN_IMM_MOVNZ, me);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* Immediate instruction relocations. */</div><div class='ctx'> 		case R_AARCH64_LD_PREL_LO19:</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 2, 19,</div><div class='del'>-					     AARCH64_INSN_IMM_19);</div><div class='add'>+					     AARCH64_INSN_IMM_19, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_ADR_PREL_LO21:</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21,</div><div class='del'>-					     AARCH64_INSN_IMM_ADR);</div><div class='add'>+					     AARCH64_INSN_IMM_ADR, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_ADR_PREL_PG_HI21_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case R_AARCH64_ADR_PREL_PG_HI21:</div><div class='del'>-			ovf = reloc_insn_adrp(me, sechdrs, loc, val);</div><div class='add'>+			ovf = reloc_insn_adrp(me, sechdrs, loc, val, me);</div><div class='ctx'> 			if (ovf &amp;&amp; ovf != -ERANGE)</div><div class='ctx'> 				return ovf;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -369,46 +382,46 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,</div><div class='ctx'> 		case R_AARCH64_LDST8_ABS_LO12_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_ABS, loc, val, 0, 12,</div><div class='del'>-					     AARCH64_INSN_IMM_12);</div><div class='add'>+					     AARCH64_INSN_IMM_12, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_LDST16_ABS_LO12_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_ABS, loc, val, 1, 11,</div><div class='del'>-					     AARCH64_INSN_IMM_12);</div><div class='add'>+					     AARCH64_INSN_IMM_12, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_LDST32_ABS_LO12_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_ABS, loc, val, 2, 10,</div><div class='del'>-					     AARCH64_INSN_IMM_12);</div><div class='add'>+					     AARCH64_INSN_IMM_12, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_LDST64_ABS_LO12_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_ABS, loc, val, 3, 9,</div><div class='del'>-					     AARCH64_INSN_IMM_12);</div><div class='add'>+					     AARCH64_INSN_IMM_12, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_LDST128_ABS_LO12_NC:</div><div class='ctx'> 			overflow_check = false;</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_ABS, loc, val, 4, 8,</div><div class='del'>-					     AARCH64_INSN_IMM_12);</div><div class='add'>+					     AARCH64_INSN_IMM_12, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_TSTBR14:</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 2, 14,</div><div class='del'>-					     AARCH64_INSN_IMM_14);</div><div class='add'>+					     AARCH64_INSN_IMM_14, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_CONDBR19:</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 2, 19,</div><div class='del'>-					     AARCH64_INSN_IMM_19);</div><div class='add'>+					     AARCH64_INSN_IMM_19, me);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_AARCH64_JUMP26:</div><div class='ctx'> 		case R_AARCH64_CALL26:</div><div class='ctx'> 			ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 2, 26,</div><div class='del'>-					     AARCH64_INSN_IMM_26);</div><div class='add'>+					     AARCH64_INSN_IMM_26, me);</div><div class='ctx'> 			if (ovf == -ERANGE) {</div><div class='ctx'> 				val = module_emit_plt_entry(me, sechdrs, loc, &amp;rel[i], sym);</div><div class='ctx'> 				if (!val)</div><div class='ctx'> 					return -ENOEXEC;</div><div class='ctx'> 				ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 2,</div><div class='del'>-						     26, AARCH64_INSN_IMM_26);</div><div class='add'>+						     26, AARCH64_INSN_IMM_26, me);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -453,6 +466,17 @@ static int module_init_ftrace_plt(const Elf_Ehdr *hdr,</div><div class='ctx'> 	__init_plt(&amp;plts[FTRACE_PLT_IDX], FTRACE_ADDR);</div><div class='ctx'> </div><div class='ctx'> 	mod-&gt;arch.ftrace_trampolines = plts;</div><div class='add'>+</div><div class='add'>+	s = find_section(hdr, sechdrs, ".init.text.ftrace_trampoline");</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOEXEC;</div><div class='add'>+</div><div class='add'>+	plts = (void *)s-&gt;sh_addr;</div><div class='add'>+</div><div class='add'>+	__init_plt(&amp;plts[FTRACE_PLT_IDX], FTRACE_ADDR);</div><div class='add'>+</div><div class='add'>+	mod-&gt;arch.init_ftrace_trampolines = plts;</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -462,14 +486,20 @@ int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> 		    struct module *me)</div><div class='ctx'> {</div><div class='ctx'> 	const Elf_Shdr *s;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	s = find_section(hdr, sechdrs, ".altinstructions");</div><div class='ctx'> 	if (s)</div><div class='ctx'> 		apply_alternatives_module((void *)s-&gt;sh_addr, s-&gt;sh_size);</div><div class='ctx'> </div><div class='ctx'> 	if (scs_is_dynamic()) {</div><div class='ctx'> 		s = find_section(hdr, sechdrs, ".init.eh_frame");</div><div class='del'>-		if (s)</div><div class='del'>-			__pi_scs_patch((void *)s-&gt;sh_addr, s-&gt;sh_size);</div><div class='add'>+		if (s) {</div><div class='add'>+			ret = __pi_scs_patch((void *)s-&gt;sh_addr, s-&gt;sh_size);</div><div class='add'>+			if (ret)</div><div class='add'>+				pr_err("module %s: error occurred during dynamic SCS patching (%d)\n",</div><div class='add'>+				       me-&gt;name, ret);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return module_init_ftrace_plt(hdr, sechdrs, me);</div><div class='head'>diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c<br/>index 6174671be7c1..43f7a2f39403 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/mte.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/mte.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/mte.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/mte.c</a></div><div class='hunk'>@@ -38,7 +38,24 @@ EXPORT_SYMBOL_GPL(mte_async_or_asymm_mode);</div><div class='ctx'> void mte_sync_tags(pte_t pte, unsigned int nr_pages)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *page = pte_page(pte);</div><div class='del'>-	unsigned int i;</div><div class='add'>+	struct folio *folio = page_folio(page);</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	if (folio_test_hugetlb(folio)) {</div><div class='add'>+		unsigned long nr = folio_nr_pages(folio);</div><div class='add'>+</div><div class='add'>+		/* Hugetlb MTE flags are set for head page only */</div><div class='add'>+		if (folio_try_hugetlb_mte_tagging(folio)) {</div><div class='add'>+			for (i = 0; i &lt; nr; i++, page++)</div><div class='add'>+				mte_clear_page_tags(page_address(page));</div><div class='add'>+			folio_set_hugetlb_mte_tagged(folio);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* ensure the tags are visible before the PTE is set */</div><div class='add'>+		smp_wmb();</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* if PG_mte_tagged is set, tags have already been initialised */</div><div class='ctx'> 	for (i = 0; i &lt; nr_pages; i++, page++) {</div><div class='hunk'>@@ -140,6 +157,24 @@ void mte_enable_kernel_asymm(void)</div><div class='ctx'> 		mte_enable_kernel_sync();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mte_enable_kernel_store_only(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If the CPU does not support MTE store only,</div><div class='add'>+	 * the kernel checks all operations.</div><div class='add'>+	 */</div><div class='add'>+	if (!cpus_have_cap(ARM64_MTE_STORE_ONLY))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCSO_MASK,</div><div class='add'>+			 SYS_FIELD_PREP(SCTLR_EL1, TCSO, 1));</div><div class='add'>+	isb();</div><div class='add'>+</div><div class='add'>+	pr_info_once("MTE: enabled store only mode at EL1\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KASAN_HW_TAGS</div><div class='hunk'>@@ -183,7 +218,7 @@ static void mte_update_sctlr_user(struct task_struct *task)</div><div class='ctx'> 	 * program requested values go with what was requested.</div><div class='ctx'> 	 */</div><div class='ctx'> 	resolved_mte_tcf = (mte_ctrl &amp; pref) ? pref : mte_ctrl;</div><div class='del'>-	sctlr &amp;= ~SCTLR_EL1_TCF0_MASK;</div><div class='add'>+	sctlr &amp;= ~(SCTLR_EL1_TCF0_MASK | SCTLR_EL1_TCSO0_MASK);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Pick an actual setting. The order in which we check for</div><div class='ctx'> 	 * set bits and map into register values determines our</div><div class='hunk'>@@ -195,6 +230,10 @@ static void mte_update_sctlr_user(struct task_struct *task)</div><div class='ctx'> 		sctlr |= SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, ASYNC);</div><div class='ctx'> 	else if (resolved_mte_tcf &amp; MTE_CTRL_TCF_SYNC)</div><div class='ctx'> 		sctlr |= SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF0, SYNC);</div><div class='add'>+</div><div class='add'>+	if (mte_ctrl &amp; MTE_CTRL_STORE_ONLY)</div><div class='add'>+		sctlr |= SYS_FIELD_PREP(SCTLR_EL1, TCSO0, 1);</div><div class='add'>+</div><div class='ctx'> 	task-&gt;thread.sctlr_user = sctlr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -354,6 +393,9 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg)</div><div class='ctx'> 	    (arg &amp; PR_MTE_TCF_SYNC))</div><div class='ctx'> 		mte_ctrl |= MTE_CTRL_TCF_ASYMM;</div><div class='ctx'> </div><div class='add'>+	if (arg &amp; PR_MTE_STORE_ONLY)</div><div class='add'>+		mte_ctrl |= MTE_CTRL_STORE_ONLY;</div><div class='add'>+</div><div class='ctx'> 	task-&gt;thread.mte_ctrl = mte_ctrl;</div><div class='ctx'> 	if (task == current) {</div><div class='ctx'> 		preempt_disable();</div><div class='hunk'>@@ -381,6 +423,8 @@ long get_mte_ctrl(struct task_struct *task)</div><div class='ctx'> 		ret |= PR_MTE_TCF_ASYNC;</div><div class='ctx'> 	if (mte_ctrl &amp; MTE_CTRL_TCF_SYNC)</div><div class='ctx'> 		ret |= PR_MTE_TCF_SYNC;</div><div class='add'>+	if (mte_ctrl &amp; MTE_CTRL_STORE_ONLY)</div><div class='add'>+		ret |= PR_MTE_STORE_ONLY;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -410,6 +454,7 @@ static int __access_remote_tags(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		void *maddr;</div><div class='ctx'> 		struct page *page = get_user_page_vma_remote(mm, addr,</div><div class='ctx'> 							     gup_flags, &amp;vma);</div><div class='add'>+		struct folio *folio;</div><div class='ctx'> </div><div class='ctx'> 		if (IS_ERR(page)) {</div><div class='ctx'> 			err = PTR_ERR(page);</div><div class='hunk'>@@ -428,7 +473,12 @@ static int __access_remote_tags(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 			put_page(page);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		WARN_ON_ONCE(!page_mte_tagged(page));</div><div class='add'>+</div><div class='add'>+		folio = page_folio(page);</div><div class='add'>+		if (folio_test_hugetlb(folio))</div><div class='add'>+			WARN_ON_ONCE(!folio_test_hugetlb_mte_tagged(folio));</div><div class='add'>+		else</div><div class='add'>+			WARN_ON_ONCE(!page_mte_tagged(page) &amp;&amp; !is_zero_page(page));</div><div class='ctx'> </div><div class='ctx'> 		/* limit access to the end of the page */</div><div class='ctx'> 		offset = offset_in_page(addr);</div><div class='head'>diff --git a/arch/arm64/kernel/patching.c b/arch/arm64/kernel/patching.c<br/>index 945df74005c7..1041bc67a3ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/patching.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/patching.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/patching.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/patching.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/kprobes.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_RAW_SPINLOCK(patch_lock);</div><div class='hunk'>@@ -30,20 +30,17 @@ static bool is_image_text(unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> static void __kprobes *patch_map(void *addr, int fixmap)</div><div class='ctx'> {</div><div class='del'>-	unsigned long uintaddr = (uintptr_t) addr;</div><div class='del'>-	bool image = is_image_text(uintaddr);</div><div class='del'>-	struct page *page;</div><div class='add'>+	phys_addr_t phys;</div><div class='ctx'> </div><div class='del'>-	if (image)</div><div class='del'>-		page = phys_to_page(__pa_symbol(addr));</div><div class='del'>-	else if (IS_ENABLED(CONFIG_EXECMEM))</div><div class='del'>-		page = vmalloc_to_page(addr);</div><div class='del'>-	else</div><div class='del'>-		return addr;</div><div class='add'>+	if (is_image_text((unsigned long)addr)) {</div><div class='add'>+		phys = __pa_symbol(addr);</div><div class='add'>+	} else {</div><div class='add'>+		struct page *page = vmalloc_to_page(addr);</div><div class='add'>+		BUG_ON(!page);</div><div class='add'>+		phys = page_to_phys(page) + offset_in_page(addr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!page);</div><div class='del'>-	return (void *)set_fixmap_offset(fixmap, page_to_phys(page) +</div><div class='del'>-			(uintaddr &amp; ~PAGE_MASK));</div><div class='add'>+	return (void *)set_fixmap_offset(fixmap, phys);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __kprobes patch_unmap(int fixmap)</div><div class='head'>diff --git a/arch/arm64/kernel/perf_callchain.c b/arch/arm64/kernel/perf_callchain.c<br/>index e8ed5673f481..9b7f26b128b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/perf_callchain.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/perf_callchain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/perf_callchain.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/perf_callchain.c</a></div><div class='hunk'>@@ -38,31 +38,3 @@ void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,</div><div class='ctx'> </div><div class='ctx'> 	arch_stack_walk(callchain_trace, entry, current, regs);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-unsigned long perf_instruction_pointer(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	if (perf_guest_state())</div><div class='del'>-		return perf_guest_get_ip();</div><div class='del'>-</div><div class='del'>-	return instruction_pointer(regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long perf_misc_flags(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned int guest_state = perf_guest_state();</div><div class='del'>-	int misc = 0;</div><div class='del'>-</div><div class='del'>-	if (guest_state) {</div><div class='del'>-		if (guest_state &amp; PERF_GUEST_USER)</div><div class='del'>-			misc |= PERF_RECORD_MISC_GUEST_USER;</div><div class='del'>-		else</div><div class='del'>-			misc |= PERF_RECORD_MISC_GUEST_KERNEL;</div><div class='del'>-	} else {</div><div class='del'>-		if (user_mode(regs))</div><div class='del'>-			misc |= PERF_RECORD_MISC_USER;</div><div class='del'>-		else</div><div class='del'>-			misc |= PERF_RECORD_MISC_KERNEL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return misc;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm64/kernel/pi/Makefile b/arch/arm64/kernel/pi/Makefile<br/>index 4d11a8c29181..be92d73c25b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright 2022 Google LLC</div><div class='ctx'> </div><div class='ctx'> KBUILD_CFLAGS	:= $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS)) -fpie \</div><div class='del'>-		   -Os -DDISABLE_BRANCH_PROFILING $(DISABLE_STACKLEAK_PLUGIN) \</div><div class='add'>+		   -Os -DDISABLE_BRANCH_PROFILING $(DISABLE_KSTACK_ERASE) \</div><div class='ctx'> 		   $(DISABLE_LATENT_ENTROPY_PLUGIN) \</div><div class='ctx'> 		   $(call cc-option,-mbranch-protection=none) \</div><div class='ctx'> 		   -I$(srctree)/scripts/dtc/libfdt -fno-stack-protector \</div><div class='hunk'>@@ -41,4 +41,4 @@ obj-y					:= idreg-override.pi.o \</div><div class='ctx'> obj-$(CONFIG_RELOCATABLE)		+= relocate.pi.o</div><div class='ctx'> obj-$(CONFIG_RANDOMIZE_BASE)		+= kaslr_early.pi.o</div><div class='ctx'> obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS)	+= patch-scs.pi.o</div><div class='del'>-extra-y					:= $(patsubst %.pi.o,%.o,$(obj-y))</div><div class='add'>+targets					:= $(patsubst %.pi.o,%.o,$(obj-y))</div><div class='head'>diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c<br/>index 29d4b6244a6f..bc57b290e5e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/idreg-override.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/idreg-override.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/idreg-override.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/idreg-override.c</a></div><div class='hunk'>@@ -38,6 +38,15 @@ struct ftr_set_desc {</div><div class='ctx'> </div><div class='ctx'> #define FIELD(n, s, f)	{ .name = n, .shift = s, .width = 4, .filter = f }</div><div class='ctx'> </div><div class='add'>+static const struct ftr_set_desc mmfr0 __prel64_initconst = {</div><div class='add'>+	.name		= "id_aa64mmfr0",</div><div class='add'>+	.override	= &amp;id_aa64mmfr0_override,</div><div class='add'>+	.fields		= {</div><div class='add'>+		FIELD("ecv", ID_AA64MMFR0_EL1_ECV_SHIFT, NULL),</div><div class='add'>+		{}</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static bool __init mmfr1_vh_filter(u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -74,6 +83,15 @@ static bool __init mmfr2_varange_filter(u64 val)</div><div class='ctx'> 		id_aa64mmfr0_override.val |=</div><div class='ctx'> 			(ID_AA64MMFR0_EL1_TGRAN_LPA2 - 1) &lt;&lt; ID_AA64MMFR0_EL1_TGRAN_SHIFT;</div><div class='ctx'> 		id_aa64mmfr0_override.mask |= 0xfU &lt;&lt; ID_AA64MMFR0_EL1_TGRAN_SHIFT;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Override PARange to 48 bits - the override will just be</div><div class='add'>+		 * ignored if the actual PARange is smaller, but this is</div><div class='add'>+		 * unlikely to be the case for LPA2 capable silicon.</div><div class='add'>+		 */</div><div class='add'>+		id_aa64mmfr0_override.val |=</div><div class='add'>+			ID_AA64MMFR0_EL1_PARANGE_48 &lt;&lt; ID_AA64MMFR0_EL1_PARANGE_SHIFT;</div><div class='add'>+		id_aa64mmfr0_override.mask |= 0xfU &lt;&lt; ID_AA64MMFR0_EL1_PARANGE_SHIFT;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -109,6 +127,7 @@ static const struct ftr_set_desc pfr0 __prel64_initconst = {</div><div class='ctx'> 	.fields		= {</div><div class='ctx'> 	        FIELD("sve", ID_AA64PFR0_EL1_SVE_SHIFT, pfr0_sve_filter),</div><div class='ctx'> 		FIELD("el0", ID_AA64PFR0_EL1_EL0_SHIFT, NULL),</div><div class='add'>+		FIELD("mpam", ID_AA64PFR0_EL1_MPAM_SHIFT, NULL),</div><div class='ctx'> 		{}</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -133,8 +152,10 @@ static const struct ftr_set_desc pfr1 __prel64_initconst = {</div><div class='ctx'> 	.override	= &amp;id_aa64pfr1_override,</div><div class='ctx'> 	.fields		= {</div><div class='ctx'> 		FIELD("bt", ID_AA64PFR1_EL1_BT_SHIFT, NULL ),</div><div class='add'>+		FIELD("gcs", ID_AA64PFR1_EL1_GCS_SHIFT, NULL),</div><div class='ctx'> 		FIELD("mte", ID_AA64PFR1_EL1_MTE_SHIFT, NULL),</div><div class='ctx'> 		FIELD("sme", ID_AA64PFR1_EL1_SME_SHIFT, pfr1_sme_filter),</div><div class='add'>+		FIELD("mpam_frac", ID_AA64PFR1_EL1_MPAM_frac_SHIFT, NULL),</div><div class='ctx'> 		{}</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -196,6 +217,7 @@ static const struct ftr_set_desc sw_features __prel64_initconst = {</div><div class='ctx'> </div><div class='ctx'> static const</div><div class='ctx'> PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {</div><div class='add'>+	{ &amp;mmfr0	},</div><div class='ctx'> 	{ &amp;mmfr1	},</div><div class='ctx'> 	{ &amp;mmfr2	},</div><div class='ctx'> 	{ &amp;pfr0 	},</div><div class='hunk'>@@ -215,6 +237,7 @@ static const struct {</div><div class='ctx'> 	{ "arm64.nosve",		"id_aa64pfr0.sve=0" },</div><div class='ctx'> 	{ "arm64.nosme",		"id_aa64pfr1.sme=0" },</div><div class='ctx'> 	{ "arm64.nobti",		"id_aa64pfr1.bt=0" },</div><div class='add'>+	{ "arm64.nogcs",		"id_aa64pfr1.gcs=0" },</div><div class='ctx'> 	{ "arm64.nopauth",</div><div class='ctx'> 	  "id_aa64isar1.gpi=0 id_aa64isar1.gpa=0 "</div><div class='ctx'> 	  "id_aa64isar1.api=0 id_aa64isar1.apa=0 "</div><div class='hunk'>@@ -225,6 +248,7 @@ static const struct {</div><div class='ctx'> 	{ "rodata=off",			"arm64_sw.rodataoff=1" },</div><div class='ctx'> 	{ "arm64.nolva",		"id_aa64mmfr2.varange=0" },</div><div class='ctx'> 	{ "arm64.no32bit_el0",		"id_aa64pfr0.el0=1" },</div><div class='add'>+	{ "arm64.nompam",		"id_aa64pfr0.mpam=0 id_aa64pfr1.mpam_frac=0" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init parse_hexdigit(const char *p, u64 *v)</div><div class='head'>diff --git a/arch/arm64/kernel/pi/kaslr_early.c b/arch/arm64/kernel/pi/kaslr_early.c<br/>index 0257b43819db..e0e018046a46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/kaslr_early.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/kaslr_early.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/kaslr_early.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/kaslr_early.c</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "pi.h"</div><div class='ctx'> </div><div class='del'>-extern u16 memstart_offset_seed;</div><div class='del'>-</div><div class='ctx'> static u64 __init get_kaslr_seed(void *fdt, int node)</div><div class='ctx'> {</div><div class='ctx'> 	static char const seed_str[] __initconst = "kaslr-seed";</div><div class='hunk'>@@ -53,8 +51,6 @@ u64 __init kaslr_early_init(void *fdt, int chosen)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memstart_offset_seed = seed &amp; U16_MAX;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * OK, so we are proceeding with KASLR enabled. Calculate a suitable</div><div class='ctx'> 	 * kernel image offset from the seed. Let's place the kernel in the</div><div class='head'>diff --git a/arch/arm64/kernel/pi/map_kernel.c b/arch/arm64/kernel/pi/map_kernel.c<br/>index f374a3e5a5fe..e8ddbde31a83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/map_kernel.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/map_kernel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/map_kernel.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/map_kernel.c</a></div><div class='hunk'>@@ -18,9 +18,9 @@</div><div class='ctx'> </div><div class='ctx'> extern const u8 __eh_frame_start[], __eh_frame_end[];</div><div class='ctx'> </div><div class='del'>-extern void idmap_cpu_replace_ttbr1(void *pgdir);</div><div class='add'>+extern void idmap_cpu_replace_ttbr1(phys_addr_t pgdir);</div><div class='ctx'> </div><div class='del'>-static void __init map_segment(pgd_t *pg_dir, u64 *pgd, u64 va_offset,</div><div class='add'>+static void __init map_segment(pgd_t *pg_dir, phys_addr_t *pgd, u64 va_offset,</div><div class='ctx'> 			       void *start, void *end, pgprot_t prot,</div><div class='ctx'> 			       bool may_use_cont, int root_level)</div><div class='ctx'> {</div><div class='hunk'>@@ -40,7 +40,7 @@ static void __init map_kernel(u64 kaslr_offset, u64 va_offset, int root_level)</div><div class='ctx'> {</div><div class='ctx'> 	bool enable_scs = IS_ENABLED(CONFIG_UNWIND_PATCH_PAC_INTO_SCS);</div><div class='ctx'> 	bool twopass = IS_ENABLED(CONFIG_RELOCATABLE);</div><div class='del'>-	u64 pgdp = (u64)init_pg_dir + PAGE_SIZE;</div><div class='add'>+	phys_addr_t pgdp = (phys_addr_t)init_pg_dir + PAGE_SIZE;</div><div class='ctx'> 	pgprot_t text_prot = PAGE_KERNEL_ROX;</div><div class='ctx'> 	pgprot_t data_prot = PAGE_KERNEL;</div><div class='ctx'> 	pgprot_t prot;</div><div class='hunk'>@@ -78,6 +78,12 @@ static void __init map_kernel(u64 kaslr_offset, u64 va_offset, int root_level)</div><div class='ctx'> 	twopass |= enable_scs;</div><div class='ctx'> 	prot = twopass ? data_prot : text_prot;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * [_stext, _text) isn't executed after boot and contains some</div><div class='add'>+	 * non-executable, unpredictable data, so map it non-executable.</div><div class='add'>+	 */</div><div class='add'>+	map_segment(init_pg_dir, &amp;pgdp, va_offset, _text, _stext, data_prot,</div><div class='add'>+		    false, root_level);</div><div class='ctx'> 	map_segment(init_pg_dir, &amp;pgdp, va_offset, _stext, _etext, prot,</div><div class='ctx'> 		    !twopass, root_level);</div><div class='ctx'> 	map_segment(init_pg_dir, &amp;pgdp, va_offset, __start_rodata,</div><div class='hunk'>@@ -90,7 +96,7 @@ static void __init map_kernel(u64 kaslr_offset, u64 va_offset, int root_level)</div><div class='ctx'> 		    true, root_level);</div><div class='ctx'> 	dsb(ishst);</div><div class='ctx'> </div><div class='del'>-	idmap_cpu_replace_ttbr1(init_pg_dir);</div><div class='add'>+	idmap_cpu_replace_ttbr1((phys_addr_t)init_pg_dir);</div><div class='ctx'> </div><div class='ctx'> 	if (twopass) {</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_RELOCATABLE))</div><div class='hunk'>@@ -129,13 +135,19 @@ static void __init map_kernel(u64 kaslr_offset, u64 va_offset, int root_level)</div><div class='ctx'> 	/* Copy the root page table to its final location */</div><div class='ctx'> 	memcpy((void *)swapper_pg_dir + va_offset, init_pg_dir, PAGE_SIZE);</div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	idmap_cpu_replace_ttbr1(swapper_pg_dir);</div><div class='add'>+	idmap_cpu_replace_ttbr1((phys_addr_t)swapper_pg_dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void noinline __section(".idmap.text") set_ttbr0_for_lpa2(u64 ttbr)</div><div class='add'>+static void noinline __section(".idmap.text") set_ttbr0_for_lpa2(phys_addr_t ttbr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 sctlr = read_sysreg(sctlr_el1);</div><div class='ctx'> 	u64 tcr = read_sysreg(tcr_el1) | TCR_DS;</div><div class='add'>+	u64 mmfr0 = read_sysreg(id_aa64mmfr0_el1);</div><div class='add'>+	u64 parange = cpuid_feature_extract_unsigned_field(mmfr0,</div><div class='add'>+							   ID_AA64MMFR0_EL1_PARANGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	tcr &amp;= ~TCR_IPS_MASK;</div><div class='add'>+	tcr |= parange &lt;&lt; TCR_IPS_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	asm("	msr	sctlr_el1, %0		;"</div><div class='ctx'> 	    "	isb				;"</div><div class='hunk'>@@ -153,7 +165,7 @@ static void noinline __section(".idmap.text") set_ttbr0_for_lpa2(u64 ttbr)</div><div class='ctx'> static void __init remap_idmap_for_lpa2(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* clear the bits that change meaning once LPA2 is turned on */</div><div class='del'>-	pteval_t mask = PTE_SHARED;</div><div class='add'>+	ptdesc_t mask = PTE_SHARED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We have to clear bits [9:8] in all block or page descriptors in the</div><div class='hunk'>@@ -166,30 +178,30 @@ static void __init remap_idmap_for_lpa2(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	create_init_idmap(init_pg_dir, mask);</div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	set_ttbr0_for_lpa2((u64)init_pg_dir);</div><div class='add'>+	set_ttbr0_for_lpa2((phys_addr_t)init_pg_dir);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Recreate the initial ID map with the same granularity as before.</div><div class='ctx'> 	 * Don't bother with the FDT, we no longer need it after this.</div><div class='ctx'> 	 */</div><div class='ctx'> 	memset(init_idmap_pg_dir, 0,</div><div class='del'>-	       (u64)init_idmap_pg_end - (u64)init_idmap_pg_dir);</div><div class='add'>+	       (char *)init_idmap_pg_end - (char *)init_idmap_pg_dir);</div><div class='ctx'> </div><div class='ctx'> 	create_init_idmap(init_idmap_pg_dir, mask);</div><div class='ctx'> 	dsb(ishst);</div><div class='ctx'> </div><div class='ctx'> 	/* switch back to the updated initial ID map */</div><div class='del'>-	set_ttbr0_for_lpa2((u64)init_idmap_pg_dir);</div><div class='add'>+	set_ttbr0_for_lpa2((phys_addr_t)init_idmap_pg_dir);</div><div class='ctx'> </div><div class='ctx'> 	/* wipe the temporary ID map from memory */</div><div class='del'>-	memset(init_pg_dir, 0, (u64)init_pg_end - (u64)init_pg_dir);</div><div class='add'>+	memset(init_pg_dir, 0, (char *)init_pg_end - (char *)init_pg_dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init map_fdt(u64 fdt)</div><div class='add'>+static void *__init map_fdt(phys_addr_t fdt)</div><div class='ctx'> {</div><div class='ctx'> 	static u8 ptes[INIT_IDMAP_FDT_SIZE] __initdata __aligned(PAGE_SIZE);</div><div class='del'>-	u64 efdt = fdt + MAX_FDT_SIZE;</div><div class='del'>-	u64 ptep = (u64)ptes;</div><div class='add'>+	phys_addr_t efdt = fdt + MAX_FDT_SIZE;</div><div class='add'>+	phys_addr_t ptep = (phys_addr_t)ptes; /* We're idmapped when called */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Map up to MAX_FDT_SIZE bytes, but avoid overlap with</div><div class='hunk'>@@ -199,9 +211,34 @@ static void __init map_fdt(u64 fdt)</div><div class='ctx'> 		  fdt, PAGE_KERNEL, IDMAP_ROOT_LEVEL,</div><div class='ctx'> 		  (pte_t *)init_idmap_pg_dir, false, 0);</div><div class='ctx'> 	dsb(ishst);</div><div class='add'>+</div><div class='add'>+	return (void *)fdt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)</div><div class='add'>+/*</div><div class='add'>+ * PI version of the Cavium Eratum 27456 detection, which makes it</div><div class='add'>+ * impossible to use non-global mappings.</div><div class='add'>+ */</div><div class='add'>+static bool __init ng_mappings_allowed(void)</div><div class='add'>+{</div><div class='add'>+	static const struct midr_range cavium_erratum_27456_cpus[] __initconst = {</div><div class='add'>+		/* Cavium ThunderX, T88 pass 1.x - 2.1 */</div><div class='add'>+		MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),</div><div class='add'>+		/* Cavium ThunderX, T81 pass 1.0 */</div><div class='add'>+		MIDR_REV(MIDR_THUNDERX_81XX, 0, 0),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (const struct midr_range *r = cavium_erratum_27456_cpus; r-&gt;model; r++) {</div><div class='add'>+		if (midr_is_cpu_model_range(read_cpuid_id(), r-&gt;model,</div><div class='add'>+					    r-&gt;rv_min, r-&gt;rv_max))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void __init early_map_kernel(u64 boot_status, phys_addr_t fdt)</div><div class='ctx'> {</div><div class='ctx'> 	static char const chosen_str[] __initconst = "/chosen";</div><div class='ctx'> 	u64 va_base, pa_base = (u64)&amp;_text;</div><div class='hunk'>@@ -209,15 +246,14 @@ asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)</div><div class='ctx'> 	int root_level = 4 - CONFIG_PGTABLE_LEVELS;</div><div class='ctx'> 	int va_bits = VA_BITS;</div><div class='ctx'> 	int chosen;</div><div class='del'>-</div><div class='del'>-	map_fdt((u64)fdt);</div><div class='add'>+	void *fdt_mapped = map_fdt(fdt);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear BSS and the initial page tables */</div><div class='del'>-	memset(__bss_start, 0, (u64)init_pg_end - (u64)__bss_start);</div><div class='add'>+	memset(__bss_start, 0, (char *)init_pg_end - (char *)__bss_start);</div><div class='ctx'> </div><div class='ctx'> 	/* Parse the command line for CPU feature overrides */</div><div class='del'>-	chosen = fdt_path_offset(fdt, chosen_str);</div><div class='del'>-	init_feature_override(boot_status, fdt, chosen);</div><div class='add'>+	chosen = fdt_path_offset(fdt_mapped, chosen_str);</div><div class='add'>+	init_feature_override(boot_status, fdt_mapped, chosen);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) &amp;&amp; !cpu_has_lva()) {</div><div class='ctx'> 		va_bits = VA_BITS_MIN;</div><div class='hunk'>@@ -237,10 +273,10 @@ asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)</div><div class='ctx'> 	 * fill in the high bits from the seed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {</div><div class='del'>-		u64 kaslr_seed = kaslr_early_init(fdt, chosen);</div><div class='add'>+		u64 kaslr_seed = kaslr_early_init(fdt_mapped, chosen);</div><div class='ctx'> </div><div class='ctx'> 		if (kaslr_seed &amp;&amp; kaslr_requires_kpti())</div><div class='del'>-			arm64_use_ng_mappings = true;</div><div class='add'>+			arm64_use_ng_mappings = ng_mappings_allowed();</div><div class='ctx'> </div><div class='ctx'> 		kaslr_offset |= kaslr_seed &amp; ~(MIN_KIMG_ALIGN - 1);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kernel/pi/map_range.c b/arch/arm64/kernel/pi/map_range.c<br/>index 5410b2cac590..de52cd85c691 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/map_range.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/map_range.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/map_range.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/map_range.c</a></div><div class='hunk'>@@ -26,12 +26,13 @@</div><div class='ctx'>  * @va_offset:		Offset between a physical page and its current mapping</div><div class='ctx'>  * 			in the VA space</div><div class='ctx'>  */</div><div class='del'>-void __init map_range(u64 *pte, u64 start, u64 end, u64 pa, pgprot_t prot,</div><div class='del'>-		      int level, pte_t *tbl, bool may_use_cont, u64 va_offset)</div><div class='add'>+void __init map_range(phys_addr_t *pte, u64 start, u64 end, phys_addr_t pa,</div><div class='add'>+		      pgprot_t prot, int level, pte_t *tbl, bool may_use_cont,</div><div class='add'>+		      u64 va_offset)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cmask = (level == 3) ? CONT_PTE_SIZE - 1 : U64_MAX;</div><div class='del'>-	u64 protval = pgprot_val(prot) &amp; ~PTE_TYPE_MASK;</div><div class='del'>-	int lshift = (3 - level) * (PAGE_SHIFT - 3);</div><div class='add'>+	ptdesc_t protval = pgprot_val(prot) &amp; ~PTE_TYPE_MASK;</div><div class='add'>+	int lshift = (3 - level) * PTDESC_TABLE_SHIFT;</div><div class='ctx'> 	u64 lmask = (PAGE_SIZE &lt;&lt; lshift) - 1;</div><div class='ctx'> </div><div class='ctx'> 	start	&amp;= PAGE_MASK;</div><div class='hunk'>@@ -45,12 +46,12 @@ void __init map_range(u64 *pte, u64 start, u64 end, u64 pa, pgprot_t prot,</div><div class='ctx'> 	 * clearing the mapping</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (protval)</div><div class='del'>-		protval |= (level &lt; 3) ? PMD_TYPE_SECT : PTE_TYPE_PAGE;</div><div class='add'>+		protval |= (level == 2) ? PMD_TYPE_SECT : PTE_TYPE_PAGE;</div><div class='ctx'> </div><div class='ctx'> 	while (start &lt; end) {</div><div class='ctx'> 		u64 next = min((start | lmask) + 1, PAGE_ALIGN(end));</div><div class='ctx'> </div><div class='del'>-		if (level &lt; 3 &amp;&amp; (start | next | pa) &amp; lmask) {</div><div class='add'>+		if (level &lt; 2 || (level == 2 &amp;&amp; (start | next | pa) &amp; lmask)) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * This chunk needs a finer grained mapping. Create a</div><div class='ctx'> 			 * table mapping if necessary and recurse.</div><div class='hunk'>@@ -87,19 +88,22 @@ void __init map_range(u64 *pte, u64 start, u64 end, u64 pa, pgprot_t prot,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage u64 __init create_init_idmap(pgd_t *pg_dir, pteval_t clrmask)</div><div class='add'>+asmlinkage phys_addr_t __init create_init_idmap(pgd_t *pg_dir, ptdesc_t clrmask)</div><div class='ctx'> {</div><div class='del'>-	u64 ptep = (u64)pg_dir + PAGE_SIZE;</div><div class='add'>+	phys_addr_t ptep = (phys_addr_t)pg_dir + PAGE_SIZE; /* MMU is off */</div><div class='ctx'> 	pgprot_t text_prot = PAGE_KERNEL_ROX;</div><div class='ctx'> 	pgprot_t data_prot = PAGE_KERNEL;</div><div class='ctx'> </div><div class='ctx'> 	pgprot_val(text_prot) &amp;= ~clrmask;</div><div class='ctx'> 	pgprot_val(data_prot) &amp;= ~clrmask;</div><div class='ctx'> </div><div class='del'>-	map_range(&amp;ptep, (u64)_stext, (u64)__initdata_begin, (u64)_stext,</div><div class='del'>-		  text_prot, IDMAP_ROOT_LEVEL, (pte_t *)pg_dir, false, 0);</div><div class='del'>-	map_range(&amp;ptep, (u64)__initdata_begin, (u64)_end, (u64)__initdata_begin,</div><div class='del'>-		  data_prot, IDMAP_ROOT_LEVEL, (pte_t *)pg_dir, false, 0);</div><div class='add'>+	/* MMU is off; pointer casts to phys_addr_t are safe */</div><div class='add'>+	map_range(&amp;ptep, (u64)_stext, (u64)__initdata_begin,</div><div class='add'>+		  (phys_addr_t)_stext, text_prot, IDMAP_ROOT_LEVEL,</div><div class='add'>+		  (pte_t *)pg_dir, false, 0);</div><div class='add'>+	map_range(&amp;ptep, (u64)__initdata_begin, (u64)_end,</div><div class='add'>+		  (phys_addr_t)__initdata_begin, data_prot, IDMAP_ROOT_LEVEL,</div><div class='add'>+		  (pte_t *)pg_dir, false, 0);</div><div class='ctx'> </div><div class='ctx'> 	return ptep;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/pi/patch-scs.c b/arch/arm64/kernel/pi/patch-scs.c<br/>index 49d8b40e61bc..55d0cd64ef71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/patch-scs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/patch-scs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/patch-scs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/patch-scs.c</a></div><div class='hunk'>@@ -50,6 +50,10 @@ bool dynamic_scs_is_enabled;</div><div class='ctx'> #define DW_CFA_GNU_negative_offset_extended 0x2f</div><div class='ctx'> #define DW_CFA_hi_user                      0x3f</div><div class='ctx'> </div><div class='add'>+#define DW_EH_PE_sdata4                     0x0b</div><div class='add'>+#define DW_EH_PE_sdata8                     0x0c</div><div class='add'>+#define DW_EH_PE_pcrel                      0x10</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	PACIASP		= 0xd503233f,</div><div class='ctx'> 	AUTIASP		= 0xd50323bf,</div><div class='hunk'>@@ -120,7 +124,12 @@ struct eh_frame {</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct { // CIE</div><div class='ctx'> 			u8	version;</div><div class='del'>-			u8	augmentation_string[];</div><div class='add'>+			u8	augmentation_string[3];</div><div class='add'>+			u8	code_alignment_factor;</div><div class='add'>+			u8	data_alignment_factor;</div><div class='add'>+			u8	return_address_register;</div><div class='add'>+			u8	augmentation_data_size;</div><div class='add'>+			u8	fde_pointer_format;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		struct { // FDE</div><div class='hunk'>@@ -128,29 +137,38 @@ struct eh_frame {</div><div class='ctx'> 			s32	range;</div><div class='ctx'> 			u8	opcodes[];</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		struct { // FDE</div><div class='add'>+			s64	initial_loc64;</div><div class='add'>+			s64	range64;</div><div class='add'>+			u8	opcodes64[];</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int scs_handle_fde_frame(const struct eh_frame *frame,</div><div class='del'>-				bool fde_has_augmentation_data,</div><div class='ctx'> 				int code_alignment_factor,</div><div class='add'>+				bool use_sdata8,</div><div class='ctx'> 				bool dry_run)</div><div class='ctx'> {</div><div class='ctx'> 	int size = frame-&gt;size - offsetof(struct eh_frame, opcodes) + 4;</div><div class='ctx'> 	u64 loc = (u64)offset_to_ptr(&amp;frame-&gt;initial_loc);</div><div class='ctx'> 	const u8 *opcode = frame-&gt;opcodes;</div><div class='add'>+	int l;</div><div class='ctx'> </div><div class='del'>-	if (fde_has_augmentation_data) {</div><div class='del'>-		int l;</div><div class='add'>+	if (use_sdata8) {</div><div class='add'>+		loc = (u64)&amp;frame-&gt;initial_loc64 + frame-&gt;initial_loc64;</div><div class='add'>+		opcode = frame-&gt;opcodes64;</div><div class='add'>+		size -= 8;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		// assume single byte uleb128_t</div><div class='del'>-		if (WARN_ON(*opcode &amp; BIT(7)))</div><div class='del'>-			return -ENOEXEC;</div><div class='add'>+	// assume single byte uleb128_t for augmentation data size</div><div class='add'>+	if (*opcode &amp; BIT(7))</div><div class='add'>+		return EDYNSCS_INVALID_FDE_AUGM_DATA_SIZE;</div><div class='ctx'> </div><div class='del'>-		l = *opcode++;</div><div class='del'>-		opcode += l;</div><div class='del'>-		size -= l + 1;</div><div class='del'>-	}</div><div class='add'>+	l = *opcode++;</div><div class='add'>+	opcode += l;</div><div class='add'>+	size -= l + 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Starting from 'loc', apply the CFA opcodes that advance the location</div><div class='hunk'>@@ -201,7 +219,7 @@ static int scs_handle_fde_frame(const struct eh_frame *frame,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='del'>-			return -ENOEXEC;</div><div class='add'>+			return EDYNSCS_INVALID_CFA_OPCODE;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -209,12 +227,12 @@ static int scs_handle_fde_frame(const struct eh_frame *frame,</div><div class='ctx'> </div><div class='ctx'> int scs_patch(const u8 eh_frame[], int size)</div><div class='ctx'> {</div><div class='add'>+	int code_alignment_factor = 1;</div><div class='add'>+	bool fde_use_sdata8 = false;</div><div class='ctx'> 	const u8 *p = eh_frame;</div><div class='ctx'> </div><div class='ctx'> 	while (size &gt; 4) {</div><div class='ctx'> 		const struct eh_frame *frame = (const void *)p;</div><div class='del'>-		bool fde_has_augmentation_data = true;</div><div class='del'>-		int code_alignment_factor = 1;</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='ctx'> 		if (frame-&gt;size == 0 ||</div><div class='hunk'>@@ -223,28 +241,47 @@ int scs_patch(const u8 eh_frame[], int size)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		if (frame-&gt;cie_id_or_pointer == 0) {</div><div class='del'>-			const u8 *p = frame-&gt;augmentation_string;</div><div class='del'>-</div><div class='del'>-			/* a 'z' in the augmentation string must come first */</div><div class='del'>-			fde_has_augmentation_data = *p == 'z';</div><div class='add'>+			/*</div><div class='add'>+			 * Require presence of augmentation data (z) with a</div><div class='add'>+			 * specifier for the size of the FDE initial_loc and</div><div class='add'>+			 * range fields (R), and nothing else.</div><div class='add'>+			 */</div><div class='add'>+			if (strcmp(frame-&gt;augmentation_string, "zR"))</div><div class='add'>+				return EDYNSCS_INVALID_CIE_HEADER;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * The code alignment factor is a uleb128 encoded field</div><div class='ctx'> 			 * but given that the only sensible values are 1 or 4,</div><div class='del'>-			 * there is no point in decoding the whole thing.</div><div class='add'>+			 * there is no point in decoding the whole thing.  Also</div><div class='add'>+			 * sanity check the size of the data alignment factor</div><div class='add'>+			 * field, and the values of the return address register</div><div class='add'>+			 * and augmentation data size fields.</div><div class='ctx'> 			 */</div><div class='del'>-			p += strlen(p) + 1;</div><div class='del'>-			if (!WARN_ON(*p &amp; BIT(7)))</div><div class='del'>-				code_alignment_factor = *p;</div><div class='add'>+			if ((frame-&gt;code_alignment_factor &amp; BIT(7)) ||</div><div class='add'>+			    (frame-&gt;data_alignment_factor &amp; BIT(7)) ||</div><div class='add'>+			    frame-&gt;return_address_register != 30 ||</div><div class='add'>+			    frame-&gt;augmentation_data_size != 1)</div><div class='add'>+				return EDYNSCS_INVALID_CIE_HEADER;</div><div class='add'>+</div><div class='add'>+			code_alignment_factor = frame-&gt;code_alignment_factor;</div><div class='add'>+</div><div class='add'>+			switch (frame-&gt;fde_pointer_format) {</div><div class='add'>+			case DW_EH_PE_pcrel | DW_EH_PE_sdata4:</div><div class='add'>+				fde_use_sdata8 = false;</div><div class='add'>+				break;</div><div class='add'>+			case DW_EH_PE_pcrel | DW_EH_PE_sdata8:</div><div class='add'>+				fde_use_sdata8 = true;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				return EDYNSCS_INVALID_CIE_SDATA_SIZE;</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='del'>-			ret = scs_handle_fde_frame(frame,</div><div class='del'>-						   fde_has_augmentation_data,</div><div class='del'>-						   code_alignment_factor,</div><div class='del'>-						   true);</div><div class='add'>+			ret = scs_handle_fde_frame(frame, code_alignment_factor,</div><div class='add'>+						   fde_use_sdata8, true);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='del'>-			scs_handle_fde_frame(frame, fde_has_augmentation_data,</div><div class='del'>-					     code_alignment_factor, false);</div><div class='add'>+			scs_handle_fde_frame(frame, code_alignment_factor,</div><div class='add'>+					     fde_use_sdata8, false);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		p += sizeof(frame-&gt;size) + frame-&gt;size;</div><div class='head'>diff --git a/arch/arm64/kernel/pi/pi.h b/arch/arm64/kernel/pi/pi.h<br/>index c91e5e965cd3..08ef9f80456b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/pi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/pi/pi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/pi/pi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/pi/pi.h</a></div><div class='hunk'>@@ -22,15 +22,17 @@ static inline void *prel64_to_pointer(const prel64_t *offset)</div><div class='ctx'> extern bool dynamic_scs_is_enabled;</div><div class='ctx'> </div><div class='ctx'> extern pgd_t init_idmap_pg_dir[], init_idmap_pg_end[];</div><div class='add'>+extern pgd_t init_pg_dir[], init_pg_end[];</div><div class='ctx'> </div><div class='ctx'> void init_feature_override(u64 boot_status, const void *fdt, int chosen);</div><div class='ctx'> u64 kaslr_early_init(void *fdt, int chosen);</div><div class='ctx'> void relocate_kernel(u64 offset);</div><div class='ctx'> int scs_patch(const u8 eh_frame[], int size);</div><div class='ctx'> </div><div class='del'>-void map_range(u64 *pgd, u64 start, u64 end, u64 pa, pgprot_t prot,</div><div class='del'>-	       int level, pte_t *tbl, bool may_use_cont, u64 va_offset);</div><div class='add'>+void map_range(phys_addr_t *pte, u64 start, u64 end, phys_addr_t pa,</div><div class='add'>+	       pgprot_t prot, int level, pte_t *tbl, bool may_use_cont,</div><div class='add'>+	       u64 va_offset);</div><div class='ctx'> </div><div class='del'>-asmlinkage void early_map_kernel(u64 boot_status, void *fdt);</div><div class='add'>+asmlinkage void early_map_kernel(u64 boot_status, phys_addr_t fdt);</div><div class='ctx'> </div><div class='del'>-asmlinkage u64 create_init_idmap(pgd_t *pgd, pteval_t clrmask);</div><div class='add'>+asmlinkage phys_addr_t create_init_idmap(pgd_t *pgd, ptdesc_t clrmask);</div><div class='head'>diff --git a/arch/arm64/kernel/probes/decode-insn.c b/arch/arm64/kernel/probes/decode-insn.c<br/>index 968d5fffe233..4137cc5ef031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/decode-insn.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/decode-insn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/decode-insn.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/decode-insn.c</a></div><div class='hunk'>@@ -58,10 +58,13 @@ static bool __kprobes aarch64_insn_is_steppable(u32 insn)</div><div class='ctx'> 	 * Instructions which load PC relative literals are not going to work</div><div class='ctx'> 	 * when executed from an XOL slot. Instructions doing an exclusive</div><div class='ctx'> 	 * load/store are not going to complete successfully when single-step</div><div class='del'>-	 * exception handling happens in the middle of the sequence.</div><div class='add'>+	 * exception handling happens in the middle of the sequence. Memory</div><div class='add'>+	 * copy/set instructions require that all three instructions be placed</div><div class='add'>+	 * consecutively in memory.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (aarch64_insn_uses_literal(insn) ||</div><div class='del'>-	    aarch64_insn_is_exclusive(insn))</div><div class='add'>+	    aarch64_insn_is_exclusive(insn) ||</div><div class='add'>+	    aarch64_insn_is_mops(insn))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -73,9 +76,18 @@ static bool __kprobes aarch64_insn_is_steppable(u32 insn)</div><div class='ctx'>  *   INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.</div><div class='ctx'>  */</div><div class='ctx'> enum probe_insn __kprobes</div><div class='del'>-arm_probe_decode_insn(probe_opcode_t insn, struct arch_probe_insn *api)</div><div class='add'>+arm_probe_decode_insn(u32 insn, struct arch_probe_insn *api)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='add'>+	 * While 'nop' instruction can execute in the out-of-line slot,</div><div class='add'>+	 * simulating them in breakpoint handling offers better performance.</div><div class='add'>+	 */</div><div class='add'>+	if (aarch64_insn_is_nop(insn)) {</div><div class='add'>+		api-&gt;handler = simulate_nop;</div><div class='add'>+		return INSN_GOOD_NO_SLOT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Instructions reading or modifying the PC won't work from the XOL</div><div class='ctx'> 	 * slot.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -96,13 +108,10 @@ arm_probe_decode_insn(probe_opcode_t insn, struct arch_probe_insn *api)</div><div class='ctx'> 	    aarch64_insn_is_bl(insn)) {</div><div class='ctx'> 		api-&gt;handler = simulate_b_bl;</div><div class='ctx'> 	} else if (aarch64_insn_is_br(insn) ||</div><div class='del'>-	    aarch64_insn_is_blr(insn) ||</div><div class='del'>-	    aarch64_insn_is_ret(insn)) {</div><div class='del'>-		api-&gt;handler = simulate_br_blr_ret;</div><div class='del'>-	} else if (aarch64_insn_is_ldr_lit(insn)) {</div><div class='del'>-		api-&gt;handler = simulate_ldr_literal;</div><div class='del'>-	} else if (aarch64_insn_is_ldrsw_lit(insn)) {</div><div class='del'>-		api-&gt;handler = simulate_ldrsw_literal;</div><div class='add'>+		aarch64_insn_is_blr(insn)) {</div><div class='add'>+		api-&gt;handler = simulate_br_blr;</div><div class='add'>+	} else if (aarch64_insn_is_ret(insn)) {</div><div class='add'>+		api-&gt;handler = simulate_ret;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Instruction cannot be stepped out-of-line and we don't</div><div class='hunk'>@@ -137,9 +146,20 @@ enum probe_insn __kprobes</div><div class='ctx'> arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi)</div><div class='ctx'> {</div><div class='ctx'> 	enum probe_insn decoded;</div><div class='del'>-	probe_opcode_t insn = le32_to_cpu(*addr);</div><div class='del'>-	probe_opcode_t *scan_end = NULL;</div><div class='add'>+	u32 insn = le32_to_cpu(*addr);</div><div class='add'>+	kprobe_opcode_t *scan_end = NULL;</div><div class='ctx'> 	unsigned long size = 0, offset = 0;</div><div class='add'>+	struct arch_probe_insn *api = &amp;asi-&gt;api;</div><div class='add'>+</div><div class='add'>+	if (aarch64_insn_is_ldr_lit(insn)) {</div><div class='add'>+		api-&gt;handler = simulate_ldr_literal;</div><div class='add'>+		decoded = INSN_GOOD_NO_SLOT;</div><div class='add'>+	} else if (aarch64_insn_is_ldrsw_lit(insn)) {</div><div class='add'>+		api-&gt;handler = simulate_ldrsw_literal;</div><div class='add'>+		decoded = INSN_GOOD_NO_SLOT;</div><div class='add'>+	} else {</div><div class='add'>+		decoded = arm_probe_decode_insn(insn, &amp;asi-&gt;api);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there's a symbol defined in front of and near enough to</div><div class='hunk'>@@ -157,7 +177,6 @@ arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi)</div><div class='ctx'> 		else</div><div class='ctx'> 			scan_end = addr - MAX_ATOMIC_CONTEXT_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-	decoded = arm_probe_decode_insn(insn, &amp;asi-&gt;api);</div><div class='ctx'> </div><div class='ctx'> 	if (decoded != INSN_REJECTED &amp;&amp; scan_end)</div><div class='ctx'> 		if (is_probed_address_atomic(addr - 1, scan_end))</div><div class='head'>diff --git a/arch/arm64/kernel/probes/decode-insn.h b/arch/arm64/kernel/probes/decode-insn.h<br/>index 8b758c5a2062..0e4195de8206 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/decode-insn.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/decode-insn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/decode-insn.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/decode-insn.h</a></div><div class='hunk'>@@ -28,6 +28,6 @@ enum probe_insn __kprobes</div><div class='ctx'> arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi);</div><div class='ctx'> #endif</div><div class='ctx'> enum probe_insn __kprobes</div><div class='del'>-arm_probe_decode_insn(probe_opcode_t insn, struct arch_probe_insn *asi);</div><div class='add'>+arm_probe_decode_insn(u32 insn, struct arch_probe_insn *asi);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */</div><div class='head'>diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c<br/>index 4268678d0e86..8ab6104a4883 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/kprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/kprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/kprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/kprobes.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "kprobes: " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> #include &lt;linux/extable.h&gt;</div><div class='ctx'> #include &lt;linux/kasan.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -27,7 +28,7 @@</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='hunk'>@@ -41,9 +42,20 @@ DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);</div><div class='ctx'> static void __kprobes</div><div class='ctx'> post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);</div><div class='ctx'> </div><div class='add'>+void *alloc_insn_page(void)</div><div class='add'>+{</div><div class='add'>+	void *addr;</div><div class='add'>+</div><div class='add'>+	addr = execmem_alloc(EXECMEM_KPROBES, PAGE_SIZE);</div><div class='add'>+	if (!addr)</div><div class='add'>+		return NULL;</div><div class='add'>+	set_memory_rox((unsigned long)addr, 1);</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)</div><div class='ctx'> {</div><div class='del'>-	kprobe_opcode_t *addr = p-&gt;ainsn.api.insn;</div><div class='add'>+	kprobe_opcode_t *addr = p-&gt;ainsn.xol_insn;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Prepare insn slot, Mark Rutland points out it depends on a coupe of</div><div class='hunk'>@@ -64,20 +76,20 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe *p)</div><div class='ctx'> 	 * the BRK exception handler, so it is unnecessary to generate</div><div class='ctx'> 	 * Contex-Synchronization-Event via ISB again.</div><div class='ctx'> 	 */</div><div class='del'>-	aarch64_insn_patch_text_nosync(addr, p-&gt;opcode);</div><div class='add'>+	aarch64_insn_patch_text_nosync(addr, le32_to_cpu(p-&gt;opcode));</div><div class='ctx'> 	aarch64_insn_patch_text_nosync(addr + 1, BRK64_OPCODE_KPROBES_SS);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Needs restoring of return address after stepping xol.</div><div class='ctx'> 	 */</div><div class='del'>-	p-&gt;ainsn.api.restore = (unsigned long) p-&gt;addr +</div><div class='add'>+	p-&gt;ainsn.xol_restore = (unsigned long) p-&gt;addr +</div><div class='ctx'> 	  sizeof(kprobe_opcode_t);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __kprobes arch_prepare_simulate(struct kprobe *p)</div><div class='ctx'> {</div><div class='ctx'> 	/* This instructions is not executed xol. No need to adjust the PC */</div><div class='del'>-	p-&gt;ainsn.api.restore = 0;</div><div class='add'>+	p-&gt;ainsn.xol_restore = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)</div><div class='hunk'>@@ -85,7 +97,7 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)</div><div class='ctx'> 	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;ainsn.api.handler)</div><div class='del'>-		p-&gt;ainsn.api.handler((u32)p-&gt;opcode, (long)p-&gt;addr, regs);</div><div class='add'>+		p-&gt;ainsn.api.handler(le32_to_cpu(p-&gt;opcode), (long)p-&gt;addr, regs);</div><div class='ctx'> </div><div class='ctx'> 	/* single step simulated, now go for post processing */</div><div class='ctx'> 	post_kprobe_handler(p, kcb, regs);</div><div class='hunk'>@@ -99,7 +111,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* copy instruction */</div><div class='del'>-	p-&gt;opcode = le32_to_cpu(*p-&gt;addr);</div><div class='add'>+	p-&gt;opcode = *p-&gt;addr;</div><div class='ctx'> </div><div class='ctx'> 	if (search_exception_tables(probe_addr))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -110,18 +122,18 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	case INSN_GOOD_NO_SLOT:	/* insn need simulation */</div><div class='del'>-		p-&gt;ainsn.api.insn = NULL;</div><div class='add'>+		p-&gt;ainsn.xol_insn = NULL;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case INSN_GOOD:	/* instruction uses slot */</div><div class='del'>-		p-&gt;ainsn.api.insn = get_insn_slot();</div><div class='del'>-		if (!p-&gt;ainsn.api.insn)</div><div class='add'>+		p-&gt;ainsn.xol_insn = get_insn_slot();</div><div class='add'>+		if (!p-&gt;ainsn.xol_insn)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* prepare the instruction */</div><div class='del'>-	if (p-&gt;ainsn.api.insn)</div><div class='add'>+	if (p-&gt;ainsn.xol_insn)</div><div class='ctx'> 		arch_prepare_ss_slot(p);</div><div class='ctx'> 	else</div><div class='ctx'> 		arch_prepare_simulate(p);</div><div class='hunk'>@@ -142,15 +154,16 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)</div><div class='ctx'> void __kprobes arch_disarm_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='ctx'> 	void *addr = p-&gt;addr;</div><div class='add'>+	u32 insn = le32_to_cpu(p-&gt;opcode);</div><div class='ctx'> </div><div class='del'>-	aarch64_insn_patch_text(&amp;addr, &amp;p-&gt;opcode, 1);</div><div class='add'>+	aarch64_insn_patch_text(&amp;addr, &amp;insn, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __kprobes arch_remove_kprobe(struct kprobe *p)</div><div class='ctx'> {</div><div class='del'>-	if (p-&gt;ainsn.api.insn) {</div><div class='del'>-		free_insn_slot(p-&gt;ainsn.api.insn, 0);</div><div class='del'>-		p-&gt;ainsn.api.insn = NULL;</div><div class='add'>+	if (p-&gt;ainsn.xol_insn) {</div><div class='add'>+		free_insn_slot(p-&gt;ainsn.xol_insn, 0);</div><div class='add'>+		p-&gt;ainsn.xol_insn = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -205,9 +218,9 @@ static void __kprobes setup_singlestep(struct kprobe *p,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	if (p-&gt;ainsn.api.insn) {</div><div class='add'>+	if (p-&gt;ainsn.xol_insn) {</div><div class='ctx'> 		/* prepare for single stepping */</div><div class='del'>-		slot = (unsigned long)p-&gt;ainsn.api.insn;</div><div class='add'>+		slot = (unsigned long)p-&gt;ainsn.xol_insn;</div><div class='ctx'> </div><div class='ctx'> 		kprobes_save_local_irqflag(kcb, regs);</div><div class='ctx'> 		instruction_pointer_set(regs, slot);</div><div class='hunk'>@@ -245,8 +258,8 @@ static void __kprobes</div><div class='ctx'> post_kprobe_handler(struct kprobe *cur, struct kprobe_ctlblk *kcb, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	/* return addr restore if non-branching insn */</div><div class='del'>-	if (cur-&gt;ainsn.api.restore != 0)</div><div class='del'>-		instruction_pointer_set(regs, cur-&gt;ainsn.api.restore);</div><div class='add'>+	if (cur-&gt;ainsn.xol_restore != 0)</div><div class='add'>+		instruction_pointer_set(regs, cur-&gt;ainsn.xol_restore);</div><div class='ctx'> </div><div class='ctx'> 	/* restore back original saved kprobe variables and continue */</div><div class='ctx'> 	if (kcb-&gt;kprobe_status == KPROBE_REENTER) {</div><div class='hunk'>@@ -291,8 +304,8 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __kprobes</div><div class='del'>-kprobe_breakpoint_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int __kprobes</div><div class='add'>+kprobe_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kprobe *p, *cur_kprobe;</div><div class='ctx'> 	struct kprobe_ctlblk *kcb;</div><div class='hunk'>@@ -335,20 +348,15 @@ kprobe_breakpoint_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct break_hook kprobes_break_hook = {</div><div class='del'>-	.imm = KPROBES_BRK_IMM,</div><div class='del'>-	.fn = kprobe_breakpoint_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __kprobes</div><div class='del'>-kprobe_breakpoint_ss_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int __kprobes</div><div class='add'>+kprobe_ss_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();</div><div class='ctx'> 	unsigned long addr = instruction_pointer(regs);</div><div class='ctx'> 	struct kprobe *cur = kprobe_running();</div><div class='ctx'> </div><div class='ctx'> 	if (cur &amp;&amp; (kcb-&gt;kprobe_status &amp; (KPROBE_HIT_SS | KPROBE_REENTER)) &amp;&amp;</div><div class='del'>-	    ((unsigned long)&amp;cur-&gt;ainsn.api.insn[1] == addr)) {</div><div class='add'>+	    ((unsigned long)&amp;cur-&gt;ainsn.xol_insn[1] == addr)) {</div><div class='ctx'> 		kprobes_restore_local_irqflag(kcb, regs);</div><div class='ctx'> 		post_kprobe_handler(cur, kcb, regs);</div><div class='ctx'> </div><div class='hunk'>@@ -359,13 +367,8 @@ kprobe_breakpoint_ss_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	return DBG_HOOK_ERROR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct break_hook kprobes_break_ss_hook = {</div><div class='del'>-	.imm = KPROBES_BRK_SS_IMM,</div><div class='del'>-	.fn = kprobe_breakpoint_ss_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __kprobes</div><div class='del'>-kretprobe_breakpoint_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int __kprobes</div><div class='add'>+kretprobe_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	if (regs-&gt;pc != (unsigned long)__kretprobe_trampoline)</div><div class='ctx'> 		return DBG_HOOK_ERROR;</div><div class='hunk'>@@ -374,11 +377,6 @@ kretprobe_breakpoint_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct break_hook kretprobes_break_hook = {</div><div class='del'>-	.imm = KRETPROBES_BRK_IMM,</div><div class='del'>-	.fn = kretprobe_breakpoint_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Provide a blacklist of symbols identifying ranges which cannot be kprobed.</div><div class='ctx'>  * This blacklist is exposed to userspace via debugfs (kprobes/blacklist).</div><div class='hunk'>@@ -421,9 +419,5 @@ int __kprobes arch_trampoline_kprobe(struct kprobe *p)</div><div class='ctx'> </div><div class='ctx'> int __init arch_init_kprobes(void)</div><div class='ctx'> {</div><div class='del'>-	register_kernel_break_hook(&amp;kprobes_break_hook);</div><div class='del'>-	register_kernel_break_hook(&amp;kprobes_break_ss_hook);</div><div class='del'>-	register_kernel_break_hook(&amp;kretprobes_break_hook);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/probes/kprobes_trampoline.S b/arch/arm64/kernel/probes/kprobes_trampoline.S<br/>index a362f3dbb3d1..b60739d3983f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/kprobes_trampoline.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/kprobes_trampoline.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/kprobes_trampoline.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/kprobes_trampoline.S</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> SYM_CODE_START(__kretprobe_trampoline)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Trigger a breakpoint exception. The PC will be adjusted by</div><div class='del'>-	 * kretprobe_breakpoint_handler(), and no subsequent instructions will</div><div class='add'>+	 * kretprobe_brk_handler(), and no subsequent instructions will</div><div class='ctx'> 	 * be executed from the trampoline.</div><div class='ctx'> 	 */</div><div class='ctx'> 	brk #KRETPROBES_BRK_IMM</div><div class='head'>diff --git a/arch/arm64/kernel/probes/simulate-insn.c b/arch/arm64/kernel/probes/simulate-insn.c<br/>index 22d0b3252476..89fbeb32107e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/simulate-insn.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/simulate-insn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/simulate-insn.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/simulate-insn.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "simulate-insn.h"</div><div class='add'>+#include "asm/gcs.h"</div><div class='ctx'> </div><div class='ctx'> #define bbl_displacement(insn)		\</div><div class='ctx'> 	sign_extend32(((insn) &amp; 0x3ffffff) &lt;&lt; 2, 27)</div><div class='hunk'>@@ -49,6 +50,21 @@ static inline u32 get_w_reg(struct pt_regs *regs, int reg)</div><div class='ctx'> 	return lower_32_bits(pt_regs_read_reg(regs, reg));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int update_lr(struct pt_regs *regs, long addr)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (user_mode(regs) &amp;&amp; task_gcs_el0_enabled(current)) {</div><div class='add'>+		push_user_gcs(addr, &amp;err);</div><div class='add'>+		if (err) {</div><div class='add'>+			force_sig(SIGSEGV);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	procedure_link_pointer_set(regs, addr);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool __kprobes check_cbz(u32 opcode, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int xn = opcode &amp; 0x1f;</div><div class='hunk'>@@ -107,9 +123,9 @@ simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int disp = bbl_displacement(opcode);</div><div class='ctx'> </div><div class='del'>-	/* Link register is x30 */</div><div class='ctx'> 	if (opcode &amp; (1 &lt;&lt; 31))</div><div class='del'>-		set_x_reg(regs, 30, addr + 4);</div><div class='add'>+		if (update_lr(regs, addr + 4))</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 	instruction_pointer_set(regs, addr + disp);</div><div class='ctx'> }</div><div class='hunk'>@@ -126,16 +142,34 @@ simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __kprobes</div><div class='del'>-simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)</div><div class='add'>+simulate_br_blr(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int xn = (opcode &gt;&gt; 5) &amp; 0x1f;</div><div class='add'>+	u64 b_target = get_x_reg(regs, xn);</div><div class='ctx'> </div><div class='del'>-	/* update pc first in case we're doing a "blr lr" */</div><div class='del'>-	instruction_pointer_set(regs, get_x_reg(regs, xn));</div><div class='del'>-</div><div class='del'>-	/* Link register is x30 */</div><div class='ctx'> 	if (((opcode &gt;&gt; 21) &amp; 0x3) == 1)</div><div class='del'>-		set_x_reg(regs, 30, addr + 4);</div><div class='add'>+		if (update_lr(regs, addr + 4))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+	instruction_pointer_set(regs, b_target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __kprobes</div><div class='add'>+simulate_ret(u32 opcode, long addr, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	u64 ret_addr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int xn = (opcode &gt;&gt; 5) &amp; 0x1f;</div><div class='add'>+	u64 r_target = get_x_reg(regs, xn);</div><div class='add'>+</div><div class='add'>+	if (user_mode(regs) &amp;&amp; task_gcs_el0_enabled(current)) {</div><div class='add'>+		ret_addr = pop_user_gcs(&amp;err);</div><div class='add'>+		if (err || ret_addr != r_target) {</div><div class='add'>+			force_sig(SIGSEGV);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	instruction_pointer_set(regs, r_target);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __kprobes</div><div class='hunk'>@@ -171,17 +205,15 @@ simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> void __kprobes</div><div class='ctx'> simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	u64 *load_addr;</div><div class='add'>+	unsigned long load_addr;</div><div class='ctx'> 	int xn = opcode &amp; 0x1f;</div><div class='del'>-	int disp;</div><div class='ctx'> </div><div class='del'>-	disp = ldr_displacement(opcode);</div><div class='del'>-	load_addr = (u64 *) (addr + disp);</div><div class='add'>+	load_addr = addr + ldr_displacement(opcode);</div><div class='ctx'> </div><div class='ctx'> 	if (opcode &amp; (1 &lt;&lt; 30))	/* x0-x30 */</div><div class='del'>-		set_x_reg(regs, xn, *load_addr);</div><div class='add'>+		set_x_reg(regs, xn, READ_ONCE(*(u64 *)load_addr));</div><div class='ctx'> 	else			/* w0-w30 */</div><div class='del'>-		set_w_reg(regs, xn, *load_addr);</div><div class='add'>+		set_w_reg(regs, xn, READ_ONCE(*(u32 *)load_addr));</div><div class='ctx'> </div><div class='ctx'> 	instruction_pointer_set(regs, instruction_pointer(regs) + 4);</div><div class='ctx'> }</div><div class='hunk'>@@ -189,14 +221,18 @@ simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> void __kprobes</div><div class='ctx'> simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	s32 *load_addr;</div><div class='add'>+	unsigned long load_addr;</div><div class='ctx'> 	int xn = opcode &amp; 0x1f;</div><div class='del'>-	int disp;</div><div class='ctx'> </div><div class='del'>-	disp = ldr_displacement(opcode);</div><div class='del'>-	load_addr = (s32 *) (addr + disp);</div><div class='add'>+	load_addr = addr + ldr_displacement(opcode);</div><div class='ctx'> </div><div class='del'>-	set_x_reg(regs, xn, *load_addr);</div><div class='add'>+	set_x_reg(regs, xn, READ_ONCE(*(s32 *)load_addr));</div><div class='ctx'> </div><div class='ctx'> 	instruction_pointer_set(regs, instruction_pointer(regs) + 4);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __kprobes</div><div class='add'>+simulate_nop(u32 opcode, long addr, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kernel/probes/simulate-insn.h b/arch/arm64/kernel/probes/simulate-insn.h<br/>index e065dc92218e..9e772a292d56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/simulate-insn.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/simulate-insn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/simulate-insn.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/simulate-insn.h</a></div><div class='hunk'>@@ -11,10 +11,12 @@</div><div class='ctx'> void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);</div><div class='del'>-void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);</div><div class='add'>+void simulate_br_blr(u32 opcode, long addr, struct pt_regs *regs);</div><div class='add'>+void simulate_ret(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);</div><div class='add'>+void simulate_nop(u32 opcode, long addr, struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ARM_KERNEL_KPROBES_SIMULATE_INSN_H */</div><div class='head'>diff --git a/arch/arm64/kernel/probes/uprobes.c b/arch/arm64/kernel/probes/uprobes.c<br/>index d49aef2657cd..2799bdb2fb82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/uprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/probes/uprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/probes/uprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/probes/uprobes.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/uprobes.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "decode-insn.h"</div><div class='ctx'> </div><div class='hunk'>@@ -17,12 +18,20 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,</div><div class='ctx'> 	void *xol_page_kaddr = kmap_atomic(page);</div><div class='ctx'> 	void *dst = xol_page_kaddr + (vaddr &amp; ~PAGE_MASK);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Initial cache maintenance of the xol page done via set_pte_at().</div><div class='add'>+	 * Subsequent CMOs only needed if the xol slot changes.</div><div class='add'>+	 */</div><div class='add'>+	if (!memcmp(dst, src, len))</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='ctx'> 	/* Initialize the slot */</div><div class='ctx'> 	memcpy(dst, src, len);</div><div class='ctx'> </div><div class='ctx'> 	/* flush caches (dcache/icache) */</div><div class='ctx'> 	sync_icache_aliases((unsigned long)dst, (unsigned long)dst + len);</div><div class='ctx'> </div><div class='add'>+done:</div><div class='ctx'> 	kunmap_atomic(xol_page_kaddr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -34,7 +43,7 @@ unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)</div><div class='ctx'> int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,</div><div class='ctx'> 		unsigned long addr)</div><div class='ctx'> {</div><div class='del'>-	probe_opcode_t insn;</div><div class='add'>+	u32 insn;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Currently we do not support AARCH32 instruction probing */</div><div class='ctx'> 	if (mm-&gt;context.flags &amp; MMCF_AARCH32)</div><div class='hunk'>@@ -42,7 +51,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,</div><div class='ctx'> 	else if (!IS_ALIGNED(addr, AARCH64_INSN_SIZE))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	insn = *(probe_opcode_t *)(&amp;auprobe-&gt;insn[0]);</div><div class='add'>+	insn = le32_to_cpu(auprobe-&gt;insn);</div><div class='ctx'> </div><div class='ctx'> 	switch (arm_probe_decode_insn(insn, &amp;auprobe-&gt;api)) {</div><div class='ctx'> 	case INSN_REJECTED:</div><div class='hunk'>@@ -102,13 +111,13 @@ bool arch_uprobe_xol_was_trapped(struct task_struct *t)</div><div class='ctx'> </div><div class='ctx'> bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	probe_opcode_t insn;</div><div class='add'>+	u32 insn;</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> </div><div class='ctx'> 	if (!auprobe-&gt;simulate)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	insn = *(probe_opcode_t *)(&amp;auprobe-&gt;insn[0]);</div><div class='add'>+	insn = le32_to_cpu(auprobe-&gt;insn);</div><div class='ctx'> 	addr = instruction_pointer(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (auprobe-&gt;api.handler)</div><div class='hunk'>@@ -151,11 +160,43 @@ arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,</div><div class='ctx'> 				  struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long orig_ret_vaddr;</div><div class='add'>+	unsigned long gcs_ret_vaddr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u64 gcspr;</div><div class='ctx'> </div><div class='ctx'> 	orig_ret_vaddr = procedure_link_pointer(regs);</div><div class='add'>+</div><div class='add'>+	if (task_gcs_el0_enabled(current)) {</div><div class='add'>+		gcspr = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+		gcs_ret_vaddr = get_user_gcs((__force unsigned long __user *)gcspr, &amp;err);</div><div class='add'>+		if (err) {</div><div class='add'>+			force_sig(SIGSEGV);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the LR and GCS return addr don't match, then some kind of PAC</div><div class='add'>+		 * signing or control flow occurred since entering the probed function.</div><div class='add'>+		 * Likely because the user is attempting to retprobe on an instruction</div><div class='add'>+		 * that isn't a function boundary or inside a leaf function. Explicitly</div><div class='add'>+		 * abort this retprobe because it will generate a GCS exception.</div><div class='add'>+		 */</div><div class='add'>+		if (gcs_ret_vaddr != orig_ret_vaddr) {</div><div class='add'>+			orig_ret_vaddr = -1;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		put_user_gcs(trampoline_vaddr, (__force unsigned long __user *)gcspr, &amp;err);</div><div class='add'>+		if (err) {</div><div class='add'>+			force_sig(SIGSEGV);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Replace the return addr with trampoline addr */</div><div class='ctx'> 	procedure_link_pointer_set(regs, trampoline_vaddr);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	return orig_ret_vaddr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -165,7 +206,7 @@ int arch_uprobe_exception_notify(struct notifier_block *self,</div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int uprobe_breakpoint_handler(struct pt_regs *regs,</div><div class='add'>+int uprobe_brk_handler(struct pt_regs *regs,</div><div class='ctx'> 				     unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	if (uprobe_pre_sstep_notifier(regs))</div><div class='hunk'>@@ -174,7 +215,7 @@ static int uprobe_breakpoint_handler(struct pt_regs *regs,</div><div class='ctx'> 	return DBG_HOOK_ERROR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int uprobe_single_step_handler(struct pt_regs *regs,</div><div class='add'>+int uprobe_single_step_handler(struct pt_regs *regs,</div><div class='ctx'> 				      unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	struct uprobe_task *utask = current-&gt;utask;</div><div class='hunk'>@@ -186,23 +227,3 @@ static int uprobe_single_step_handler(struct pt_regs *regs,</div><div class='ctx'> 	return DBG_HOOK_ERROR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* uprobe breakpoint handler hook */</div><div class='del'>-static struct break_hook uprobes_break_hook = {</div><div class='del'>-	.imm = UPROBES_BRK_IMM,</div><div class='del'>-	.fn = uprobe_breakpoint_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uprobe single step handler hook */</div><div class='del'>-static struct step_hook uprobes_step_hook = {</div><div class='del'>-	.fn = uprobe_single_step_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init arch_init_uprobes(void)</div><div class='del'>-{</div><div class='del'>-	register_user_break_hook(&amp;uprobes_break_hook);</div><div class='del'>-	register_user_step_hook(&amp;uprobes_step_hook);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-device_initcall(arch_init_uprobes);</div><div class='head'>diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c<br/>index 0540653fbf38..fba7ca102a8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/process.c</a></div><div class='hunk'>@@ -49,6 +49,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/exec.h&gt;</div><div class='ctx'> #include &lt;asm/fpsimd.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/mte.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -227,7 +228,7 @@ void __show_regs(struct pt_regs *regs)</div><div class='ctx'> 	printk("sp : %016llx\n", sp);</div><div class='ctx'> </div><div class='ctx'> 	if (system_uses_irq_prio_masking())</div><div class='del'>-		printk("pmr_save: %08llx\n", regs-&gt;pmr_save);</div><div class='add'>+		printk("pmr: %08x\n", regs-&gt;pmr);</div><div class='ctx'> </div><div class='ctx'> 	i = top_reg;</div><div class='ctx'> </div><div class='hunk'>@@ -280,6 +281,53 @@ static void flush_poe(void)</div><div class='ctx'> 	write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+</div><div class='add'>+static void flush_gcs(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	current-&gt;thread.gcspr_el0 = 0;</div><div class='add'>+	current-&gt;thread.gcs_base = 0;</div><div class='add'>+	current-&gt;thread.gcs_size = 0;</div><div class='add'>+	current-&gt;thread.gcs_el0_mode = 0;</div><div class='add'>+	write_sysreg_s(GCSCRE0_EL1_nTR, SYS_GCSCRE0_EL1);</div><div class='add'>+	write_sysreg_s(0, SYS_GCSPR_EL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int copy_thread_gcs(struct task_struct *p,</div><div class='add'>+			   const struct kernel_clone_args *args)</div><div class='add'>+{</div><div class='add'>+	unsigned long gcs;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	p-&gt;thread.gcs_base = 0;</div><div class='add'>+	p-&gt;thread.gcs_size = 0;</div><div class='add'>+</div><div class='add'>+	p-&gt;thread.gcs_el0_mode = current-&gt;thread.gcs_el0_mode;</div><div class='add'>+	p-&gt;thread.gcs_el0_locked = current-&gt;thread.gcs_el0_locked;</div><div class='add'>+</div><div class='add'>+	gcs = gcs_alloc_thread_stack(p, args);</div><div class='add'>+	if (IS_ERR_VALUE(gcs))</div><div class='add'>+		return PTR_ERR((void *)gcs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static void flush_gcs(void) { }</div><div class='add'>+static int copy_thread_gcs(struct task_struct *p,</div><div class='add'>+			   const struct kernel_clone_args *args)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void flush_thread(void)</div><div class='ctx'> {</div><div class='ctx'> 	fpsimd_flush_thread();</div><div class='hunk'>@@ -287,6 +335,7 @@ void flush_thread(void)</div><div class='ctx'> 	flush_ptrace_hw_breakpoint(current);</div><div class='ctx'> 	flush_tagged_addr_state();</div><div class='ctx'> 	flush_poe();</div><div class='add'>+	flush_gcs();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_release_task_struct(struct task_struct *tsk)</div><div class='hunk'>@@ -296,50 +345,34 @@ void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	if (current-&gt;mm)</div><div class='del'>-		fpsimd_preserve_current_state();</div><div class='add'>+	/*</div><div class='add'>+	 * The current/src task's FPSIMD state may or may not be live, and may</div><div class='add'>+	 * have been altered by ptrace after entry to the kernel. Save the</div><div class='add'>+	 * effective FPSIMD state so that this will be copied into dst.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+	fpsimd_sync_from_effective_state(src);</div><div class='add'>+</div><div class='ctx'> 	*dst = *src;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Detach src's sve_state (if any) from dst so that it does not</div><div class='del'>-	 * get erroneously used or freed prematurely.  dst's copies</div><div class='del'>-	 * will be allocated on demand later on if dst uses SVE.</div><div class='del'>-	 * For consistency, also clear TIF_SVE here: this could be done</div><div class='del'>-	 * later in copy_process(), but to avoid tripping up future</div><div class='del'>-	 * maintainers it is best not to leave TIF flags and buffers in</div><div class='del'>-	 * an inconsistent state, even temporarily.</div><div class='add'>+	 * Drop stale reference to src's sve_state and convert dst to</div><div class='add'>+	 * non-streaming FPSIMD mode.</div><div class='ctx'> 	 */</div><div class='add'>+	dst-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> 	dst-&gt;thread.sve_state = NULL;</div><div class='ctx'> 	clear_tsk_thread_flag(dst, TIF_SVE);</div><div class='add'>+	task_smstop_sm(dst);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * In the unlikely event that we create a new thread with ZA</div><div class='del'>-	 * enabled we should retain the ZA and ZT state so duplicate</div><div class='del'>-	 * it here.  This may be shortly freed if we exec() or if</div><div class='del'>-	 * CLONE_SETTLS but it's simpler to do it here. To avoid</div><div class='del'>-	 * confusing the rest of the code ensure that we have a</div><div class='del'>-	 * sve_state allocated whenever sme_state is allocated.</div><div class='add'>+	 * Drop stale reference to src's sme_state and ensure dst has ZA</div><div class='add'>+	 * disabled.</div><div class='add'>+	 *</div><div class='add'>+	 * When necessary, ZA will be inherited later in copy_thread_za().</div><div class='ctx'> 	 */</div><div class='del'>-	if (thread_za_enabled(&amp;src-&gt;thread)) {</div><div class='del'>-		dst-&gt;thread.sve_state = kzalloc(sve_state_size(src),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!dst-&gt;thread.sve_state)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		dst-&gt;thread.sme_state = kmemdup(src-&gt;thread.sme_state,</div><div class='del'>-						sme_state_size(src),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!dst-&gt;thread.sme_state) {</div><div class='del'>-			kfree(dst-&gt;thread.sve_state);</div><div class='del'>-			dst-&gt;thread.sve_state = NULL;</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		dst-&gt;thread.sme_state = NULL;</div><div class='del'>-		clear_tsk_thread_flag(dst, TIF_SME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dst-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='add'>+	dst-&gt;thread.sme_state = NULL;</div><div class='add'>+	clear_tsk_thread_flag(dst, TIF_SME);</div><div class='add'>+	dst-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* clear any pending asynchronous tag fault raised by the parent */</div><div class='ctx'> 	clear_tsk_thread_flag(dst, TIF_MTE_ASYNC_FAULT);</div><div class='hunk'>@@ -347,14 +380,40 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int copy_thread_za(struct task_struct *dst, struct task_struct *src)</div><div class='add'>+{</div><div class='add'>+	if (!thread_za_enabled(&amp;src-&gt;thread))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dst-&gt;thread.sve_state = kzalloc(sve_state_size(src),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!dst-&gt;thread.sve_state)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dst-&gt;thread.sme_state = kmemdup(src-&gt;thread.sme_state,</div><div class='add'>+					sme_state_size(src),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!dst-&gt;thread.sme_state) {</div><div class='add'>+		kfree(dst-&gt;thread.sve_state);</div><div class='add'>+		dst-&gt;thread.sve_state = NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_tsk_thread_flag(dst, TIF_SME);</div><div class='add'>+	dst-&gt;thread.svcr |= SVCR_ZA_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> asmlinkage void ret_from_fork(void) asm("ret_from_fork");</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long stack_start = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *childregs = task_pt_regs(p);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;p-&gt;thread.cpu_context, 0, sizeof(struct cpu_context));</div><div class='ctx'> </div><div class='hunk'>@@ -378,8 +437,6 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		 * out-of-sync with the saved value.</div><div class='ctx'> 		 */</div><div class='ctx'> 		*task_user_tls(p) = read_sysreg(tpidr_el0);</div><div class='del'>-		if (system_supports_tpidr2())</div><div class='del'>-			p-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='ctx'> </div><div class='ctx'> 		if (system_supports_poe())</div><div class='ctx'> 			p-&gt;thread.por_el0 = read_sysreg_s(SYS_POR_EL0);</div><div class='hunk'>@@ -392,13 +449,43 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='add'>+		 * Due to the AAPCS64 "ZA lazy saving scheme", PSTATE.ZA and</div><div class='add'>+		 * TPIDR2 need to be manipulated as a pair, and either both</div><div class='add'>+		 * need to be inherited or both need to be reset.</div><div class='add'>+		 *</div><div class='add'>+		 * Within a process, child threads must not inherit their</div><div class='add'>+		 * parent's TPIDR2 value or they may clobber their parent's</div><div class='add'>+		 * stack at some later point.</div><div class='add'>+		 *</div><div class='add'>+		 * When a process is fork()'d, the child must inherit ZA and</div><div class='add'>+		 * TPIDR2 from its parent in case there was dormant ZA state.</div><div class='add'>+		 *</div><div class='add'>+		 * Use CLONE_VM to determine when the child will share the</div><div class='add'>+		 * address space with the parent, and cannot safely inherit the</div><div class='add'>+		 * state.</div><div class='add'>+		 */</div><div class='add'>+		if (system_supports_sme()) {</div><div class='add'>+			if (!(clone_flags &amp; CLONE_VM)) {</div><div class='add'>+				p-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='add'>+				ret = copy_thread_za(p, current);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			} else {</div><div class='add'>+				p-&gt;thread.tpidr2_el0 = 0;</div><div class='add'>+				WARN_ON_ONCE(p-&gt;thread.svcr &amp; SVCR_ZA_MASK);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='ctx'> 		 * If a TLS pointer was passed to clone, use it for the new</div><div class='del'>-		 * thread.  We also reset TPIDR2 if it's in use.</div><div class='add'>+		 * thread.</div><div class='ctx'> 		 */</div><div class='del'>-		if (clone_flags &amp; CLONE_SETTLS) {</div><div class='add'>+		if (clone_flags &amp; CLONE_SETTLS)</div><div class='ctx'> 			p-&gt;thread.uw.tp_value = tls;</div><div class='del'>-			p-&gt;thread.tpidr2_el0 = 0;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		ret = copy_thread_gcs(p, args);</div><div class='add'>+		if (ret != 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * A kthread has no context to ERET to, so ensure any buggy</div><div class='hunk'>@@ -409,9 +496,13 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		 */</div><div class='ctx'> 		memset(childregs, 0, sizeof(struct pt_regs));</div><div class='ctx'> 		childregs-&gt;pstate = PSR_MODE_EL1h | PSR_IL_BIT;</div><div class='add'>+		childregs-&gt;stackframe.type = FRAME_META_TYPE_FINAL;</div><div class='ctx'> </div><div class='ctx'> 		p-&gt;thread.cpu_context.x19 = (unsigned long)args-&gt;fn;</div><div class='ctx'> 		p-&gt;thread.cpu_context.x20 = (unsigned long)args-&gt;fn_arg;</div><div class='add'>+</div><div class='add'>+		if (system_supports_poe())</div><div class='add'>+			p-&gt;thread.por_el0 = POR_EL0_INIT;</div><div class='ctx'> 	}</div><div class='ctx'> 	p-&gt;thread.cpu_context.pc = (unsigned long)ret_from_fork;</div><div class='ctx'> 	p-&gt;thread.cpu_context.sp = (unsigned long)childregs;</div><div class='hunk'>@@ -419,7 +510,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 	 * For the benefit of the unwinder, set up childregs-&gt;stackframe</div><div class='ctx'> 	 * as the final frame for the new task.</div><div class='ctx'> 	 */</div><div class='del'>-	p-&gt;thread.cpu_context.fp = (unsigned long)childregs-&gt;stackframe;</div><div class='add'>+	p-&gt;thread.cpu_context.fp = (unsigned long)&amp;childregs-&gt;stackframe;</div><div class='ctx'> </div><div class='ctx'> 	ptrace_hw_copy_thread(p);</div><div class='ctx'> </div><div class='hunk'>@@ -439,7 +530,7 @@ static void tls_thread_switch(struct task_struct *next)</div><div class='ctx'> </div><div class='ctx'> 	if (is_compat_thread(task_thread_info(next)))</div><div class='ctx'> 		write_sysreg(next-&gt;thread.uw.tp_value, tpidrro_el0);</div><div class='del'>-	else if (!arm64_kernel_unmapped_at_el0())</div><div class='add'>+	else</div><div class='ctx'> 		write_sysreg(0, tpidrro_el0);</div><div class='ctx'> </div><div class='ctx'> 	write_sysreg(*task_user_tls(next), tpidr_el0);</div><div class='hunk'>@@ -484,6 +575,46 @@ static void entry_task_switch(struct task_struct *next)</div><div class='ctx'> 	__this_cpu_write(__entry_task, next);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+</div><div class='add'>+void gcs_preserve_current_state(void)</div><div class='add'>+{</div><div class='add'>+	current-&gt;thread.gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gcs_thread_switch(struct task_struct *next)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* GCSPR_EL0 is always readable */</div><div class='add'>+	gcs_preserve_current_state();</div><div class='add'>+	write_sysreg_s(next-&gt;thread.gcspr_el0, SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	if (current-&gt;thread.gcs_el0_mode != next-&gt;thread.gcs_el0_mode)</div><div class='add'>+		gcs_set_el0_mode(next);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that GCS memory effects of the 'prev' thread are</div><div class='add'>+	 * ordered before other memory accesses with release semantics</div><div class='add'>+	 * (or preceded by a DMB) on the current PE. In addition, any</div><div class='add'>+	 * memory accesses with acquire semantics (or succeeded by a</div><div class='add'>+	 * DMB) are ordered before GCS memory effects of the 'next'</div><div class='add'>+	 * thread. This will ensure that the GCS memory effects are</div><div class='add'>+	 * visible to other PEs in case of migration.</div><div class='add'>+	 */</div><div class='add'>+	if (task_gcs_el0_enabled(current) || task_gcs_el0_enabled(next))</div><div class='add'>+		gcsb_dsync();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static void gcs_thread_switch(struct task_struct *next)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Handle sysreg updates for ARM erratum 1418040 which affects the 32bit view of</div><div class='ctx'>  * CNTVCT, various other errata which require trapping all CNTVCT{,_EL0}</div><div class='hunk'>@@ -541,6 +672,11 @@ static void permission_overlay_switch(struct task_struct *next)</div><div class='ctx'> 	current-&gt;thread.por_el0 = read_sysreg_s(SYS_POR_EL0);</div><div class='ctx'> 	if (current-&gt;thread.por_el0 != next-&gt;thread.por_el0) {</div><div class='ctx'> 		write_sysreg_s(next-&gt;thread.por_el0, SYS_POR_EL0);</div><div class='add'>+		/*</div><div class='add'>+		 * No ISB required as we can tolerate spurious Overlay faults -</div><div class='add'>+		 * the fault handler will check again based on the new value</div><div class='add'>+		 * of POR_EL0.</div><div class='add'>+		 */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -580,12 +716,14 @@ struct task_struct *__switch_to(struct task_struct *prev,</div><div class='ctx'> 	cntkctl_thread_switch(prev, next);</div><div class='ctx'> 	ptrauth_thread_switch_user(next);</div><div class='ctx'> 	permission_overlay_switch(next);</div><div class='add'>+	gcs_thread_switch(next);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Complete any pending TLB or cache maintenance on this CPU in case</div><div class='del'>-	 * the thread migrates to a different CPU.</div><div class='del'>-	 * This full barrier is also required by the membarrier system</div><div class='del'>-	 * call.</div><div class='add'>+	 * Complete any pending TLB or cache maintenance on this CPU in case the</div><div class='add'>+	 * thread migrates to a different CPU. This full barrier is also</div><div class='add'>+	 * required by the membarrier system call. Additionally it makes any</div><div class='add'>+	 * in-progress pgtable writes visible to the table walker; See</div><div class='add'>+	 * emit_pte_barriers().</div><div class='ctx'> 	 */</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> </div><div class='hunk'>@@ -717,10 +855,14 @@ long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg)</div><div class='ctx'> 	if (is_compat_thread(ti))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (system_supports_mte())</div><div class='add'>+	if (system_supports_mte()) {</div><div class='ctx'> 		valid_mask |= PR_MTE_TCF_SYNC | PR_MTE_TCF_ASYNC \</div><div class='ctx'> 			| PR_MTE_TAG_MASK;</div><div class='ctx'> </div><div class='add'>+		if (cpus_have_cap(ARM64_MTE_STORE_ONLY))</div><div class='add'>+			valid_mask |= PR_MTE_STORE_ONLY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (arg &amp; ~valid_mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -761,7 +903,7 @@ long get_tagged_addr_ctrl(struct task_struct *task)</div><div class='ctx'>  * disable it for tasks that already opted in to the relaxed ABI.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct ctl_table tagged_addr_sysctl_table[] = {</div><div class='add'>+static const struct ctl_table tagged_addr_sysctl_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "tagged_addr_disabled",</div><div class='ctx'> 		.mode		= 0644,</div><div class='head'>diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c<br/>index da53722f95d4..f9a32dfde006 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/proton-pack.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/proton-pack.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/proton-pack.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/proton-pack.c</a></div><div class='hunk'>@@ -172,7 +172,7 @@ static enum mitigation_state spectre_v2_get_cpu_hw_mitigation_state(void)</div><div class='ctx'> 		return SPECTRE_UNAFFECTED;</div><div class='ctx'> </div><div class='ctx'> 	/* Alternatively, we have a list of unaffected CPUs */</div><div class='del'>-	if (is_midr_in_range_list(read_cpuid_id(), spectre_v2_safe_list))</div><div class='add'>+	if (is_midr_in_range_list(spectre_v2_safe_list))</div><div class='ctx'> 		return SPECTRE_UNAFFECTED;</div><div class='ctx'> </div><div class='ctx'> 	return SPECTRE_VULNERABLE;</div><div class='hunk'>@@ -331,7 +331,7 @@ bool has_spectre_v3a(const struct arm64_cpu_capabilities *entry, int scope)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());</div><div class='del'>-	return is_midr_in_range_list(read_cpuid_id(), spectre_v3a_unsafe_list);</div><div class='add'>+	return is_midr_in_range_list(spectre_v3a_unsafe_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void spectre_v3a_enable_mitigation(const struct arm64_cpu_capabilities *__unused)</div><div class='hunk'>@@ -475,7 +475,7 @@ static enum mitigation_state spectre_v4_get_cpu_hw_mitigation_state(void)</div><div class='ctx'> 		{ /* sentinel */ },</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	if (is_midr_in_range_list(read_cpuid_id(), spectre_v4_safe_list))</div><div class='add'>+	if (is_midr_in_range_list(spectre_v4_safe_list))</div><div class='ctx'> 		return SPECTRE_UNAFFECTED;</div><div class='ctx'> </div><div class='ctx'> 	/* CPU features are detected first */</div><div class='hunk'>@@ -845,52 +845,91 @@ static unsigned long system_bhb_mitigations;</div><div class='ctx'>  * This must be called with SCOPE_LOCAL_CPU for each type of CPU, before any</div><div class='ctx'>  * SCOPE_SYSTEM call will give the right answer.</div><div class='ctx'>  */</div><div class='del'>-u8 spectre_bhb_loop_affected(int scope)</div><div class='add'>+static bool is_spectre_bhb_safe(int scope)</div><div class='add'>+{</div><div class='add'>+	static const struct midr_range spectre_bhb_safe_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A510),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A520),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static bool all_safe = true;</div><div class='add'>+</div><div class='add'>+	if (scope != SCOPE_LOCAL_CPU)</div><div class='add'>+		return all_safe;</div><div class='add'>+</div><div class='add'>+	if (is_midr_in_range_list(spectre_bhb_safe_list))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	all_safe = false;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 spectre_bhb_loop_affected(void)</div><div class='ctx'> {</div><div class='ctx'> 	u8 k = 0;</div><div class='del'>-	static u8 max_bhb_k;</div><div class='del'>-</div><div class='del'>-	if (scope == SCOPE_LOCAL_CPU) {</div><div class='del'>-		static const struct midr_range spectre_bhb_k32_list[] = {</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),</div><div class='del'>-			{},</div><div class='del'>-		};</div><div class='del'>-		static const struct midr_range spectre_bhb_k24_list[] = {</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),</div><div class='del'>-			{},</div><div class='del'>-		};</div><div class='del'>-		static const struct midr_range spectre_bhb_k11_list[] = {</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_AMPERE1),</div><div class='del'>-			{},</div><div class='del'>-		};</div><div class='del'>-		static const struct midr_range spectre_bhb_k8_list[] = {</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),</div><div class='del'>-			MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),</div><div class='del'>-			{},</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))</div><div class='del'>-			k = 32;</div><div class='del'>-		else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list))</div><div class='del'>-			k = 24;</div><div class='del'>-		else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k11_list))</div><div class='del'>-			k = 11;</div><div class='del'>-		else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k8_list))</div><div class='del'>-			k =  8;</div><div class='del'>-</div><div class='del'>-		max_bhb_k = max(max_bhb_k, k);</div><div class='del'>-	} else {</div><div class='del'>-		k = max_bhb_k;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	static const struct midr_range spectre_bhb_k132_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static const struct midr_range spectre_bhb_k38_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A720AE),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static const struct midr_range spectre_bhb_k32_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static const struct midr_range spectre_bhb_k24_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_HISI_HIP09),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static const struct midr_range spectre_bhb_k11_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_AMPERE1),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+	static const struct midr_range spectre_bhb_k8_list[] = {</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (is_midr_in_range_list(spectre_bhb_k132_list))</div><div class='add'>+		k = 132;</div><div class='add'>+	else if (is_midr_in_range_list(spectre_bhb_k38_list))</div><div class='add'>+		k = 38;</div><div class='add'>+	else if (is_midr_in_range_list(spectre_bhb_k32_list))</div><div class='add'>+		k = 32;</div><div class='add'>+	else if (is_midr_in_range_list(spectre_bhb_k24_list))</div><div class='add'>+		k = 24;</div><div class='add'>+	else if (is_midr_in_range_list(spectre_bhb_k11_list))</div><div class='add'>+		k = 11;</div><div class='add'>+	else if (is_midr_in_range_list(spectre_bhb_k8_list))</div><div class='add'>+		k =  8;</div><div class='ctx'> </div><div class='ctx'> 	return k;</div><div class='ctx'> }</div><div class='hunk'>@@ -916,29 +955,13 @@ static enum mitigation_state spectre_bhb_get_cpu_fw_mitigation_state(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool is_spectre_bhb_fw_affected(int scope)</div><div class='add'>+static bool has_spectre_bhb_fw_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	static bool system_affected;</div><div class='ctx'> 	enum mitigation_state fw_state;</div><div class='ctx'> 	bool has_smccc = arm_smccc_1_1_get_conduit() != SMCCC_CONDUIT_NONE;</div><div class='del'>-	static const struct midr_range spectre_bhb_firmware_mitigated_list[] = {</div><div class='del'>-		MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),</div><div class='del'>-		MIDR_ALL_VERSIONS(MIDR_CORTEX_A75),</div><div class='del'>-		{},</div><div class='del'>-	};</div><div class='del'>-	bool cpu_in_list = is_midr_in_range_list(read_cpuid_id(),</div><div class='del'>-					 spectre_bhb_firmware_mitigated_list);</div><div class='del'>-</div><div class='del'>-	if (scope != SCOPE_LOCAL_CPU)</div><div class='del'>-		return system_affected;</div><div class='ctx'> </div><div class='ctx'> 	fw_state = spectre_bhb_get_cpu_fw_mitigation_state();</div><div class='del'>-	if (cpu_in_list || (has_smccc &amp;&amp; fw_state == SPECTRE_MITIGATED)) {</div><div class='del'>-		system_affected = true;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return has_smccc &amp;&amp; fw_state == SPECTRE_MITIGATED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool supports_ecbhb(int scope)</div><div class='hunk'>@@ -954,6 +977,8 @@ static bool supports_ecbhb(int scope)</div><div class='ctx'> 						    ID_AA64MMFR1_EL1_ECBHB_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 max_bhb_k;</div><div class='add'>+</div><div class='ctx'> bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 			     int scope)</div><div class='ctx'> {</div><div class='hunk'>@@ -962,16 +987,23 @@ bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 	if (supports_csv2p3(scope))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (supports_clearbhb(scope))</div><div class='del'>-		return true;</div><div class='add'>+	if (is_spectre_bhb_safe(scope))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	if (spectre_bhb_loop_affected(scope))</div><div class='del'>-		return true;</div><div class='add'>+	/*</div><div class='add'>+	 * At this point the core isn't known to be "safe" so we're going to</div><div class='add'>+	 * assume it's vulnerable. We still need to update `max_bhb_k` though,</div><div class='add'>+	 * but only if we aren't mitigating with clearbhb though.</div><div class='add'>+	 */</div><div class='add'>+	if (scope == SCOPE_LOCAL_CPU &amp;&amp; !supports_clearbhb(SCOPE_LOCAL_CPU))</div><div class='add'>+		max_bhb_k = max(max_bhb_k, spectre_bhb_loop_affected());</div><div class='ctx'> </div><div class='del'>-	if (is_spectre_bhb_fw_affected(scope))</div><div class='del'>-		return true;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+u8 get_spectre_bhb_loop_value(void)</div><div class='add'>+{</div><div class='add'>+	return max_bhb_k;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)</div><div class='hunk'>@@ -991,7 +1023,7 @@ static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __read_mostly __nospectre_bhb;</div><div class='add'>+bool __read_mostly __nospectre_bhb;</div><div class='ctx'> static int __init parse_spectre_bhb_param(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	__nospectre_bhb = true;</div><div class='hunk'>@@ -1002,7 +1034,7 @@ early_param("nospectre_bhb", parse_spectre_bhb_param);</div><div class='ctx'> void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)</div><div class='ctx'> {</div><div class='ctx'> 	bp_hardening_cb_t cpu_cb;</div><div class='del'>-	enum mitigation_state fw_state, state = SPECTRE_VULNERABLE;</div><div class='add'>+	enum mitigation_state state = SPECTRE_VULNERABLE;</div><div class='ctx'> 	struct bp_hardening_data *data = this_cpu_ptr(&amp;bp_hardening_data);</div><div class='ctx'> </div><div class='ctx'> 	if (!is_spectre_bhb_affected(entry, SCOPE_LOCAL_CPU))</div><div class='hunk'>@@ -1028,7 +1060,7 @@ void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)</div><div class='ctx'> 		this_cpu_set_vectors(EL1_VECTOR_BHB_CLEAR_INSN);</div><div class='ctx'> 		state = SPECTRE_MITIGATED;</div><div class='ctx'> 		set_bit(BHB_INSN, &amp;system_bhb_mitigations);</div><div class='del'>-	} else if (spectre_bhb_loop_affected(SCOPE_LOCAL_CPU)) {</div><div class='add'>+	} else if (spectre_bhb_loop_affected()) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Ensure KVM uses the indirect vector which will have the</div><div class='ctx'> 		 * branchy-loop added. A57/A72-r0 will already have selected</div><div class='hunk'>@@ -1041,37 +1073,39 @@ void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)</div><div class='ctx'> 		this_cpu_set_vectors(EL1_VECTOR_BHB_LOOP);</div><div class='ctx'> 		state = SPECTRE_MITIGATED;</div><div class='ctx'> 		set_bit(BHB_LOOP, &amp;system_bhb_mitigations);</div><div class='del'>-	} else if (is_spectre_bhb_fw_affected(SCOPE_LOCAL_CPU)) {</div><div class='del'>-		fw_state = spectre_bhb_get_cpu_fw_mitigation_state();</div><div class='del'>-		if (fw_state == SPECTRE_MITIGATED) {</div><div class='del'>-			/*</div><div class='del'>-			 * Ensure KVM uses one of the spectre bp_hardening</div><div class='del'>-			 * vectors. The indirect vector doesn't include the EL3</div><div class='del'>-			 * call, so needs upgrading to</div><div class='del'>-			 * HYP_VECTOR_SPECTRE_INDIRECT.</div><div class='del'>-			 */</div><div class='del'>-			if (!data-&gt;slot || data-&gt;slot == HYP_VECTOR_INDIRECT)</div><div class='del'>-				data-&gt;slot += 1;</div><div class='del'>-</div><div class='del'>-			this_cpu_set_vectors(EL1_VECTOR_BHB_FW);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * The WA3 call in the vectors supersedes the WA1 call</div><div class='del'>-			 * made during context-switch. Uninstall any firmware</div><div class='del'>-			 * bp_hardening callback.</div><div class='del'>-			 */</div><div class='del'>-			cpu_cb = spectre_v2_get_sw_mitigation_cb();</div><div class='del'>-			if (__this_cpu_read(bp_hardening_data.fn) != cpu_cb)</div><div class='del'>-				__this_cpu_write(bp_hardening_data.fn, NULL);</div><div class='del'>-</div><div class='del'>-			state = SPECTRE_MITIGATED;</div><div class='del'>-			set_bit(BHB_FW, &amp;system_bhb_mitigations);</div><div class='del'>-		}</div><div class='add'>+	} else if (has_spectre_bhb_fw_mitigation()) {</div><div class='add'>+		/*</div><div class='add'>+		 * Ensure KVM uses one of the spectre bp_hardening</div><div class='add'>+		 * vectors. The indirect vector doesn't include the EL3</div><div class='add'>+		 * call, so needs upgrading to</div><div class='add'>+		 * HYP_VECTOR_SPECTRE_INDIRECT.</div><div class='add'>+		 */</div><div class='add'>+		if (!data-&gt;slot || data-&gt;slot == HYP_VECTOR_INDIRECT)</div><div class='add'>+			data-&gt;slot += 1;</div><div class='add'>+</div><div class='add'>+		this_cpu_set_vectors(EL1_VECTOR_BHB_FW);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The WA3 call in the vectors supersedes the WA1 call</div><div class='add'>+		 * made during context-switch. Uninstall any firmware</div><div class='add'>+		 * bp_hardening callback.</div><div class='add'>+		 */</div><div class='add'>+		cpu_cb = spectre_v2_get_sw_mitigation_cb();</div><div class='add'>+		if (__this_cpu_read(bp_hardening_data.fn) != cpu_cb)</div><div class='add'>+			__this_cpu_write(bp_hardening_data.fn, NULL);</div><div class='add'>+</div><div class='add'>+		state = SPECTRE_MITIGATED;</div><div class='add'>+		set_bit(BHB_FW, &amp;system_bhb_mitigations);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	update_mitigation_state(&amp;spectre_bhb_state, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool is_spectre_bhb_fw_mitigated(void)</div><div class='add'>+{</div><div class='add'>+	return test_bit(BHB_FW, &amp;system_bhb_mitigations);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Patched to NOP when enabled */</div><div class='ctx'> void noinstr spectre_bhb_patch_loop_mitigation_enable(struct alt_instr *alt,</div><div class='ctx'> 						     __le32 *origptr,</div><div class='hunk'>@@ -1100,7 +1134,6 @@ void noinstr spectre_bhb_patch_loop_iter(struct alt_instr *alt,</div><div class='ctx'> {</div><div class='ctx'> 	u8 rd;</div><div class='ctx'> 	u32 insn;</div><div class='del'>-	u16 loop_count = spectre_bhb_loop_affected(SCOPE_SYSTEM);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(nr_inst != 1); /* MOV -&gt; MOV */</div><div class='ctx'> </div><div class='hunk'>@@ -1109,7 +1142,7 @@ void noinstr spectre_bhb_patch_loop_iter(struct alt_instr *alt,</div><div class='ctx'> </div><div class='ctx'> 	insn = le32_to_cpu(*origptr);</div><div class='ctx'> 	rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, insn);</div><div class='del'>-	insn = aarch64_insn_gen_movewide(rd, loop_count, 0,</div><div class='add'>+	insn = aarch64_insn_gen_movewide(rd, max_bhb_k, 0,</div><div class='ctx'> 					 AARCH64_INSN_VARIANT_64BIT,</div><div class='ctx'> 					 AARCH64_INSN_MOVEWIDE_ZERO);</div><div class='ctx'> 	*updptr++ = cpu_to_le32(insn);</div><div class='head'>diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c<br/>index b756578aeaee..4b001121c72d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/ptrace.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/fpsimd.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='ctx'> #include &lt;asm/mte.h&gt;</div><div class='ctx'> #include &lt;asm/pointer_auth.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='hunk'>@@ -140,7 +141,7 @@ unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)</div><div class='ctx'> </div><div class='ctx'> 	addr += n;</div><div class='ctx'> 	if (regs_within_kernel_stack(regs, (unsigned long)addr))</div><div class='del'>-		return *addr;</div><div class='add'>+		return READ_ONCE_NOCHECK(*addr);</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -593,7 +594,7 @@ static int __fpr_get(struct task_struct *target,</div><div class='ctx'> {</div><div class='ctx'> 	struct user_fpsimd_state *uregs;</div><div class='ctx'> </div><div class='del'>-	sve_sync_to_fpsimd(target);</div><div class='add'>+	fpsimd_sync_from_effective_state(target);</div><div class='ctx'> </div><div class='ctx'> 	uregs = &amp;target-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='hunk'>@@ -625,7 +626,7 @@ static int __fpr_set(struct task_struct *target,</div><div class='ctx'> 	 * Ensure target-&gt;thread.uw.fpsimd_state is up to date, so that a</div><div class='ctx'> 	 * short copyin can't resurrect stale data.</div><div class='ctx'> 	 */</div><div class='del'>-	sve_sync_to_fpsimd(target);</div><div class='add'>+	fpsimd_sync_from_effective_state(target);</div><div class='ctx'> </div><div class='ctx'> 	newstate = target-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='hunk'>@@ -652,7 +653,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	sve_sync_from_fpsimd_zeropad(target);</div><div class='add'>+	fpsimd_sync_to_effective_state_zeropad(target);</div><div class='ctx'> 	fpsimd_flush_task_state(target);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -719,6 +720,8 @@ static int fpmr_set(struct task_struct *target, const struct user_regset *regset</div><div class='ctx'> 	if (!system_supports_fpmr())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	fpmr = target-&gt;thread.uw.fpmr;</div><div class='add'>+</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;fpmr, 0, count);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -772,6 +775,11 @@ static void sve_init_header_from_task(struct user_sve_header *header,</div><div class='ctx'> 		task_type = ARM64_VEC_SVE;</div><div class='ctx'> 	active = (task_type == type);</div><div class='ctx'> </div><div class='add'>+	if (active &amp;&amp; target-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='add'>+		header-&gt;flags = SVE_PT_REGS_SVE;</div><div class='add'>+	else</div><div class='add'>+		header-&gt;flags = SVE_PT_REGS_FPSIMD;</div><div class='add'>+</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case ARM64_VEC_SVE:</div><div class='ctx'> 		if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))</div><div class='hunk'>@@ -786,19 +794,14 @@ static void sve_init_header_from_task(struct user_sve_header *header,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (active) {</div><div class='del'>-		if (target-&gt;thread.fp_type == FP_STATE_FPSIMD) {</div><div class='del'>-			header-&gt;flags |= SVE_PT_REGS_FPSIMD;</div><div class='del'>-		} else {</div><div class='del'>-			header-&gt;flags |= SVE_PT_REGS_SVE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	header-&gt;vl = task_get_vl(target, type);</div><div class='ctx'> 	vq = sve_vq_from_vl(header-&gt;vl);</div><div class='ctx'> </div><div class='ctx'> 	header-&gt;max_vl = vec_max_vl(type);</div><div class='del'>-	header-&gt;size = SVE_PT_SIZE(vq, header-&gt;flags);</div><div class='add'>+	if (active)</div><div class='add'>+		header-&gt;size = SVE_PT_SIZE(vq, header-&gt;flags);</div><div class='add'>+	else</div><div class='add'>+		header-&gt;size = sizeof(header);</div><div class='ctx'> 	header-&gt;max_size = SVE_PT_SIZE(sve_vq_from_vl(header-&gt;max_vl),</div><div class='ctx'> 				      SVE_PT_REGS_SVE);</div><div class='ctx'> }</div><div class='hunk'>@@ -817,18 +820,25 @@ static int sve_get_common(struct task_struct *target,</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	unsigned long start, end;</div><div class='ctx'> </div><div class='add'>+	if (target == current)</div><div class='add'>+		fpsimd_preserve_current_state();</div><div class='add'>+</div><div class='ctx'> 	/* Header */</div><div class='ctx'> 	sve_init_header_from_task(&amp;header, target, type);</div><div class='ctx'> 	vq = sve_vq_from_vl(header.vl);</div><div class='ctx'> </div><div class='ctx'> 	membuf_write(&amp;to, &amp;header, sizeof(header));</div><div class='ctx'> </div><div class='del'>-	if (target == current)</div><div class='del'>-		fpsimd_preserve_current_state();</div><div class='del'>-</div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));</div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * When the requested vector type is not active, do not present data</div><div class='add'>+	 * from the other mode to userspace.</div><div class='add'>+	 */</div><div class='add'>+	if (header.size == sizeof(header))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	switch ((header.flags &amp; SVE_PT_REGS_MASK)) {</div><div class='ctx'> 	case SVE_PT_REGS_FPSIMD:</div><div class='ctx'> 		return __fpr_get(target, regset, to);</div><div class='hunk'>@@ -856,7 +866,7 @@ static int sve_get_common(struct task_struct *target,</div><div class='ctx'> 		return membuf_zero(&amp;to, end - start);</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return 0;</div><div class='add'>+		BUILD_BUG();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -880,6 +890,9 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	struct user_sve_header header;</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	unsigned long start, end;</div><div class='add'>+	bool fpsimd;</div><div class='add'>+</div><div class='add'>+	fpsimd_flush_task_state(target);</div><div class='ctx'> </div><div class='ctx'> 	/* Header */</div><div class='ctx'> 	if (count &lt; sizeof(header))</div><div class='hunk'>@@ -887,7 +900,16 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;header,</div><div class='ctx'> 				 0, sizeof(header));</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Streaming SVE data is always stored and presented in SVE format.</div><div class='add'>+	 * Require the user to provide SVE formatted data for consistency, and</div><div class='add'>+	 * to avoid the risk that we configure the task into an invalid state.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd = (header.flags &amp; SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD;</div><div class='add'>+	if (fpsimd &amp;&amp; type == ARM64_VEC_SME)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by</div><div class='hunk'>@@ -896,88 +918,72 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	ret = vec_set_vector_length(target, type, header.vl,</div><div class='ctx'> 		((unsigned long)header.flags &amp; ~SVE_PT_REGS_MASK) &lt;&lt; 16);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate SME storage if necessary, preserving any existing ZA/ZT state */</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		sme_alloc(target, false);</div><div class='add'>+		if (!target-&gt;thread.sme_state)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate SVE storage if necessary, zeroing any existing SVE state */</div><div class='add'>+	if (!fpsimd) {</div><div class='add'>+		sve_alloc(target, true);</div><div class='add'>+		if (!target-&gt;thread.sve_state)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Actual VL set may be less than the user asked for: */</div><div class='add'>+	/*</div><div class='add'>+	 * Actual VL set may be different from what the user asked</div><div class='add'>+	 * for, or we may have configured the _ONEXEC VL not the</div><div class='add'>+	 * current VL:</div><div class='add'>+	 */</div><div class='ctx'> 	vq = sve_vq_from_vl(task_get_vl(target, type));</div><div class='ctx'> </div><div class='ctx'> 	/* Enter/exit streaming mode */</div><div class='ctx'> 	if (system_supports_sme()) {</div><div class='del'>-		u64 old_svcr = target-&gt;thread.svcr;</div><div class='del'>-</div><div class='ctx'> 		switch (type) {</div><div class='ctx'> 		case ARM64_VEC_SVE:</div><div class='ctx'> 			target-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='add'>+			set_tsk_thread_flag(target, TIF_SVE);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ARM64_VEC_SME:</div><div class='ctx'> 			target-&gt;thread.svcr |= SVCR_SM_MASK;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Disable traps and ensure there is SME storage but</div><div class='del'>-			 * preserve any currently set values in ZA/ZT.</div><div class='del'>-			 */</div><div class='del'>-			sme_alloc(target, false);</div><div class='ctx'> 			set_tsk_thread_flag(target, TIF_SME);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			WARN_ON_ONCE(1);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out;</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If we switched then invalidate any existing SVE</div><div class='del'>-		 * state and ensure there's storage.</div><div class='del'>-		 */</div><div class='del'>-		if (target-&gt;thread.svcr != old_svcr)</div><div class='del'>-			sve_alloc(target, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Always zero V regs, FPSR, and FPCR */</div><div class='add'>+	memset(&amp;current-&gt;thread.uw.fpsimd_state, 0,</div><div class='add'>+	       sizeof(current-&gt;thread.uw.fpsimd_state));</div><div class='add'>+</div><div class='ctx'> 	/* Registers: FPSIMD-only case */</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));</div><div class='del'>-	if ((header.flags &amp; SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {</div><div class='del'>-		ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,</div><div class='del'>-				SVE_PT_FPSIMD_OFFSET);</div><div class='add'>+	if (fpsimd) {</div><div class='ctx'> 		clear_tsk_thread_flag(target, TIF_SVE);</div><div class='ctx'> 		target-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto out;</div><div class='add'>+		ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,</div><div class='add'>+				SVE_PT_FPSIMD_OFFSET);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Otherwise: no registers or full SVE case.  For backwards</div><div class='del'>-	 * compatibility reasons we treat empty flags as SVE registers.</div><div class='del'>-	 */</div><div class='add'>+	/* Otherwise: no registers or full SVE case. */</div><div class='add'>+</div><div class='add'>+	target-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If setting a different VL from the requested VL and there is</div><div class='ctx'> 	 * register data, the data layout will be wrong: don't even</div><div class='ctx'> 	 * try to set the registers in this case.</div><div class='ctx'> 	 */</div><div class='del'>-	if (count &amp;&amp; vq != sve_vq_from_vl(header.vl)) {</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sve_alloc(target, true);</div><div class='del'>-	if (!target-&gt;thread.sve_state) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		clear_tsk_thread_flag(target, TIF_SVE);</div><div class='del'>-		target-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure target-&gt;thread.sve_state is up to date with target's</div><div class='del'>-	 * FPSIMD regs, so that a short copyin leaves trailing</div><div class='del'>-	 * registers unmodified.  Only enable SVE if we are</div><div class='del'>-	 * configuring normal SVE, a system with streaming SVE may not</div><div class='del'>-	 * have normal SVE.</div><div class='del'>-	 */</div><div class='del'>-	fpsimd_sync_to_sve(target);</div><div class='del'>-	if (type == ARM64_VEC_SVE)</div><div class='del'>-		set_tsk_thread_flag(target, TIF_SVE);</div><div class='del'>-	target-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='add'>+	if (count &amp;&amp; vq != sve_vq_from_vl(header.vl))</div><div class='add'>+		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));</div><div class='ctx'> 	start = SVE_PT_SVE_OFFSET;</div><div class='hunk'>@@ -986,7 +992,7 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 				 target-&gt;thread.sve_state,</div><div class='ctx'> 				 start, end);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	start = end;</div><div class='ctx'> 	end = SVE_PT_SVE_FPSR_OFFSET(vq);</div><div class='hunk'>@@ -1002,8 +1008,6 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 				 &amp;target-&gt;thread.uw.fpsimd_state.fpsr,</div><div class='ctx'> 				 start, end);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	fpsimd_flush_task_state(target);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1125,7 +1129,11 @@ static int za_set(struct task_struct *target,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Actual VL set may be less than the user asked for: */</div><div class='add'>+	/*</div><div class='add'>+	 * Actual VL set may be different from what the user asked</div><div class='add'>+	 * for, or we may have configured the _ONEXEC rather than</div><div class='add'>+	 * current VL:</div><div class='add'>+	 */</div><div class='ctx'> 	vq = sve_vq_from_vl(task_get_sme_vl(target));</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure there is some SVE storage for streaming mode */</div><div class='hunk'>@@ -1418,7 +1426,7 @@ static int tagged_addr_ctrl_get(struct task_struct *target,</div><div class='ctx'> {</div><div class='ctx'> 	long ctrl = get_tagged_addr_ctrl(target);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_VALUE(ctrl))</div><div class='add'>+	if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl)))</div><div class='ctx'> 		return ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return membuf_write(&amp;to, &amp;ctrl, sizeof(ctrl));</div><div class='hunk'>@@ -1432,6 +1440,10 @@ static int tagged_addr_ctrl_set(struct task_struct *target, const struct</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	long ctrl;</div><div class='ctx'> </div><div class='add'>+	ctrl = get_tagged_addr_ctrl(target);</div><div class='add'>+	if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl)))</div><div class='add'>+		return ctrl;</div><div class='add'>+</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;ctrl, 0, -1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1463,6 +1475,8 @@ static int poe_set(struct task_struct *target, const struct</div><div class='ctx'> 	if (!system_supports_poe())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ctrl = target-&gt;thread.por_el0;</div><div class='add'>+</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;ctrl, 0, -1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1473,6 +1487,66 @@ static int poe_set(struct task_struct *target, const struct</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+static void task_gcs_to_user(struct user_gcs *user_gcs,</div><div class='add'>+			     const struct task_struct *target)</div><div class='add'>+{</div><div class='add'>+	user_gcs-&gt;features_enabled = target-&gt;thread.gcs_el0_mode;</div><div class='add'>+	user_gcs-&gt;features_locked = target-&gt;thread.gcs_el0_locked;</div><div class='add'>+	user_gcs-&gt;gcspr_el0 = target-&gt;thread.gcspr_el0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void task_gcs_from_user(struct task_struct *target,</div><div class='add'>+			       const struct user_gcs *user_gcs)</div><div class='add'>+{</div><div class='add'>+	target-&gt;thread.gcs_el0_mode = user_gcs-&gt;features_enabled;</div><div class='add'>+	target-&gt;thread.gcs_el0_locked = user_gcs-&gt;features_locked;</div><div class='add'>+	target-&gt;thread.gcspr_el0 = user_gcs-&gt;gcspr_el0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcs_get(struct task_struct *target,</div><div class='add'>+		   const struct user_regset *regset,</div><div class='add'>+		   struct membuf to)</div><div class='add'>+{</div><div class='add'>+	struct user_gcs user_gcs;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (target == current)</div><div class='add'>+		gcs_preserve_current_state();</div><div class='add'>+</div><div class='add'>+	task_gcs_to_user(&amp;user_gcs, target);</div><div class='add'>+</div><div class='add'>+	return membuf_write(&amp;to, &amp;user_gcs, sizeof(user_gcs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcs_set(struct task_struct *target, const struct</div><div class='add'>+		   user_regset *regset, unsigned int pos,</div><div class='add'>+		   unsigned int count, const void *kbuf, const</div><div class='add'>+		   void __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct user_gcs user_gcs;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	task_gcs_to_user(&amp;user_gcs, target);</div><div class='add'>+</div><div class='add'>+	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;user_gcs, 0, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (user_gcs.features_enabled &amp; ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	task_gcs_from_user(target, &amp;user_gcs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> enum aarch64_regset {</div><div class='ctx'> 	REGSET_GPR,</div><div class='ctx'> 	REGSET_FPR,</div><div class='hunk'>@@ -1503,13 +1577,16 @@ enum aarch64_regset {</div><div class='ctx'> 	REGSET_TAGGED_ADDR_CTRL,</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM64_POE</div><div class='del'>-	REGSET_POE</div><div class='add'>+	REGSET_POE,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	REGSET_GCS,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = sizeof(struct user_pt_regs) / sizeof(u64),</div><div class='ctx'> 		.size = sizeof(u64),</div><div class='ctx'> 		.align = sizeof(u64),</div><div class='hunk'>@@ -1517,7 +1594,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = gpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n = sizeof(struct user_fpsimd_state) / sizeof(u32),</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We pretend we have 32-bit registers because the fpsr and</div><div class='hunk'>@@ -1530,7 +1607,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = fpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TLS] = {</div><div class='del'>-		.core_note_type = NT_ARM_TLS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_TLS),</div><div class='ctx'> 		.n = 2,</div><div class='ctx'> 		.size = sizeof(void *),</div><div class='ctx'> 		.align = sizeof(void *),</div><div class='hunk'>@@ -1539,7 +1616,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='ctx'> 	[REGSET_HW_BREAK] = {</div><div class='del'>-		.core_note_type = NT_ARM_HW_BREAK,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_HW_BREAK),</div><div class='ctx'> 		.n = sizeof(struct user_hwdebug_state) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -1547,7 +1624,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = hw_break_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_HW_WATCH] = {</div><div class='del'>-		.core_note_type = NT_ARM_HW_WATCH,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_HW_WATCH),</div><div class='ctx'> 		.n = sizeof(struct user_hwdebug_state) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -1556,7 +1633,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> 	[REGSET_SYSTEM_CALL] = {</div><div class='del'>-		.core_note_type = NT_ARM_SYSTEM_CALL,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_SYSTEM_CALL),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(int),</div><div class='ctx'> 		.align = sizeof(int),</div><div class='hunk'>@@ -1564,7 +1641,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = system_call_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPMR] = {</div><div class='del'>-		.core_note_type = NT_ARM_FPMR,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_FPMR),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(u64),</div><div class='ctx'> 		.align = sizeof(u64),</div><div class='hunk'>@@ -1573,7 +1650,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_ARM64_SVE</div><div class='ctx'> 	[REGSET_SVE] = { /* Scalable Vector Extension */</div><div class='del'>-		.core_note_type = NT_ARM_SVE,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_SVE),</div><div class='ctx'> 		.n = DIV_ROUND_UP(SVE_PT_SIZE(ARCH_SVE_VQ_MAX,</div><div class='ctx'> 					      SVE_PT_REGS_SVE),</div><div class='ctx'> 				  SVE_VQ_BYTES),</div><div class='hunk'>@@ -1585,7 +1662,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM64_SME</div><div class='ctx'> 	[REGSET_SSVE] = { /* Streaming mode SVE */</div><div class='del'>-		.core_note_type = NT_ARM_SSVE,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_SSVE),</div><div class='ctx'> 		.n = DIV_ROUND_UP(SVE_PT_SIZE(SME_VQ_MAX, SVE_PT_REGS_SVE),</div><div class='ctx'> 				  SVE_VQ_BYTES),</div><div class='ctx'> 		.size = SVE_VQ_BYTES,</div><div class='hunk'>@@ -1594,7 +1671,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = ssve_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_ZA] = { /* SME ZA */</div><div class='del'>-		.core_note_type = NT_ARM_ZA,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_ZA),</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * ZA is a single register but it's variably sized and</div><div class='ctx'> 		 * the ptrace core requires that the size of any data</div><div class='hunk'>@@ -1610,7 +1687,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = za_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_ZT] = { /* SME ZT */</div><div class='del'>-		.core_note_type = NT_ARM_ZT,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_ZT),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = ZT_SIG_REG_BYTES,</div><div class='ctx'> 		.align = sizeof(u64),</div><div class='hunk'>@@ -1620,7 +1697,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM64_PTR_AUTH</div><div class='ctx'> 	[REGSET_PAC_MASK] = {</div><div class='del'>-		.core_note_type = NT_ARM_PAC_MASK,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_PAC_MASK),</div><div class='ctx'> 		.n = sizeof(struct user_pac_mask) / sizeof(u64),</div><div class='ctx'> 		.size = sizeof(u64),</div><div class='ctx'> 		.align = sizeof(u64),</div><div class='hunk'>@@ -1628,7 +1705,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		/* this cannot be set dynamically */</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_PAC_ENABLED_KEYS] = {</div><div class='del'>-		.core_note_type = NT_ARM_PAC_ENABLED_KEYS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_PAC_ENABLED_KEYS),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(long),</div><div class='ctx'> 		.align = sizeof(long),</div><div class='hunk'>@@ -1637,7 +1714,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_CHECKPOINT_RESTORE</div><div class='ctx'> 	[REGSET_PACA_KEYS] = {</div><div class='del'>-		.core_note_type = NT_ARM_PACA_KEYS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_PACA_KEYS),</div><div class='ctx'> 		.n = sizeof(struct user_pac_address_keys) / sizeof(__uint128_t),</div><div class='ctx'> 		.size = sizeof(__uint128_t),</div><div class='ctx'> 		.align = sizeof(__uint128_t),</div><div class='hunk'>@@ -1645,7 +1722,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = pac_address_keys_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_PACG_KEYS] = {</div><div class='del'>-		.core_note_type = NT_ARM_PACG_KEYS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_PACG_KEYS),</div><div class='ctx'> 		.n = sizeof(struct user_pac_generic_keys) / sizeof(__uint128_t),</div><div class='ctx'> 		.size = sizeof(__uint128_t),</div><div class='ctx'> 		.align = sizeof(__uint128_t),</div><div class='hunk'>@@ -1656,7 +1733,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI</div><div class='ctx'> 	[REGSET_TAGGED_ADDR_CTRL] = {</div><div class='del'>-		.core_note_type = NT_ARM_TAGGED_ADDR_CTRL,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_TAGGED_ADDR_CTRL),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(long),</div><div class='ctx'> 		.align = sizeof(long),</div><div class='hunk'>@@ -1666,7 +1743,7 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_ARM64_POE</div><div class='ctx'> 	[REGSET_POE] = {</div><div class='del'>-		.core_note_type = NT_ARM_POE,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_POE),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(long),</div><div class='ctx'> 		.align = sizeof(long),</div><div class='hunk'>@@ -1674,6 +1751,16 @@ static const struct user_regset aarch64_regsets[] = {</div><div class='ctx'> 		.set = poe_set,</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	[REGSET_GCS] = {</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_GCS),</div><div class='add'>+		.n = sizeof(struct user_gcs) / sizeof(u64),</div><div class='add'>+		.size = sizeof(u64),</div><div class='add'>+		.align = sizeof(u64),</div><div class='add'>+		.regset_get = gcs_get,</div><div class='add'>+		.set = gcs_set,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset_view user_aarch64_view = {</div><div class='hunk'>@@ -1856,7 +1943,7 @@ static int compat_tls_set(struct task_struct *target,</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset aarch32_regsets[] = {</div><div class='ctx'> 	[REGSET_COMPAT_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = COMPAT_ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(compat_elf_greg_t),</div><div class='ctx'> 		.align = sizeof(compat_elf_greg_t),</div><div class='hunk'>@@ -1864,7 +1951,7 @@ static const struct user_regset aarch32_regsets[] = {</div><div class='ctx'> 		.set = compat_gpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_COMPAT_VFP] = {</div><div class='del'>-		.core_note_type = NT_ARM_VFP,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_VFP),</div><div class='ctx'> 		.n = VFP_STATE_SIZE / sizeof(compat_ulong_t),</div><div class='ctx'> 		.size = sizeof(compat_ulong_t),</div><div class='ctx'> 		.align = sizeof(compat_ulong_t),</div><div class='hunk'>@@ -1881,7 +1968,7 @@ static const struct user_regset_view user_aarch32_view = {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = COMPAT_ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(compat_elf_greg_t),</div><div class='ctx'> 		.align = sizeof(compat_elf_greg_t),</div><div class='hunk'>@@ -1889,7 +1976,7 @@ static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 		.set = compat_gpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type = NT_ARM_VFP,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_VFP),</div><div class='ctx'> 		.n = VFP_STATE_SIZE / sizeof(compat_ulong_t),</div><div class='ctx'> 		.size = sizeof(compat_ulong_t),</div><div class='ctx'> 		.align = sizeof(compat_ulong_t),</div><div class='hunk'>@@ -1897,7 +1984,7 @@ static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 		.set = compat_vfp_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TLS] = {</div><div class='del'>-		.core_note_type = NT_ARM_TLS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_TLS),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(compat_ulong_t),</div><div class='ctx'> 		.align = sizeof(compat_ulong_t),</div><div class='hunk'>@@ -1906,7 +1993,7 @@ static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='ctx'> 	[REGSET_HW_BREAK] = {</div><div class='del'>-		.core_note_type = NT_ARM_HW_BREAK,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_HW_BREAK),</div><div class='ctx'> 		.n = sizeof(struct user_hwdebug_state) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -1914,7 +2001,7 @@ static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 		.set = hw_break_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_HW_WATCH] = {</div><div class='del'>-		.core_note_type = NT_ARM_HW_WATCH,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_HW_WATCH),</div><div class='ctx'> 		.n = sizeof(struct user_hwdebug_state) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -1923,7 +2010,7 @@ static const struct user_regset aarch32_ptrace_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> 	[REGSET_SYSTEM_CALL] = {</div><div class='del'>-		.core_note_type = NT_ARM_SYSTEM_CALL,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(ARM_SYSTEM_CALL),</div><div class='ctx'> 		.n = 1,</div><div class='ctx'> 		.size = sizeof(int),</div><div class='ctx'> 		.align = sizeof(int),</div><div class='head'>diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c<br/>new file mode 100644<br/>index 000000000000..c64a06f58c0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/rsi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/rsi.c</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 ARM Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/psci.h&gt;</div><div class='add'>+#include &lt;linux/swiotlb.h&gt;</div><div class='add'>+#include &lt;linux/cc_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/mem_encrypt.h&gt;</div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='add'>+</div><div class='add'>+static struct realm_config config;</div><div class='add'>+</div><div class='add'>+unsigned long prot_ns_shared;</div><div class='add'>+EXPORT_SYMBOL(prot_ns_shared);</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_KEY_FALSE_RO(rsi_present);</div><div class='add'>+EXPORT_SYMBOL(rsi_present);</div><div class='add'>+</div><div class='add'>+bool cc_platform_has(enum cc_attr attr)</div><div class='add'>+{</div><div class='add'>+	switch (attr) {</div><div class='add'>+	case CC_ATTR_MEM_ENCRYPT:</div><div class='add'>+		return is_realm_world();</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cc_platform_has);</div><div class='add'>+</div><div class='add'>+static bool rsi_version_matches(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ver_lower, ver_higher;</div><div class='add'>+	unsigned long ret = rsi_request_version(RSI_ABI_VERSION,</div><div class='add'>+						&amp;ver_lower,</div><div class='add'>+						&amp;ver_higher);</div><div class='add'>+</div><div class='add'>+	if (ret == SMCCC_RET_NOT_SUPPORTED)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (ret != RSI_SUCCESS) {</div><div class='add'>+		pr_err("RME: RMM doesn't support RSI version %lu.%lu. Supported range: %lu.%lu-%lu.%lu\n",</div><div class='add'>+		       RSI_ABI_VERSION_MAJOR, RSI_ABI_VERSION_MINOR,</div><div class='add'>+		       RSI_ABI_VERSION_GET_MAJOR(ver_lower),</div><div class='add'>+		       RSI_ABI_VERSION_GET_MINOR(ver_lower),</div><div class='add'>+		       RSI_ABI_VERSION_GET_MAJOR(ver_higher),</div><div class='add'>+		       RSI_ABI_VERSION_GET_MINOR(ver_higher));</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("RME: Using RSI version %lu.%lu\n",</div><div class='add'>+		RSI_ABI_VERSION_GET_MAJOR(ver_lower),</div><div class='add'>+		RSI_ABI_VERSION_GET_MINOR(ver_lower));</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init arm64_rsi_setup_memory(void)</div><div class='add'>+{</div><div class='add'>+	u64 i;</div><div class='add'>+	phys_addr_t start, end;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Iterate over the available memory ranges and convert the state to</div><div class='add'>+	 * protected memory. We should take extra care to ensure that we DO NOT</div><div class='add'>+	 * permit any "DESTROYED" pages to be converted to "RAM".</div><div class='add'>+	 *</div><div class='add'>+	 * panic() is used because if the attempt to switch the memory to</div><div class='add'>+	 * protected has failed here, then future accesses to the memory are</div><div class='add'>+	 * simply going to be reflected as a SEA (Synchronous External Abort)</div><div class='add'>+	 * which we can't handle.  Bailing out early prevents the guest limping</div><div class='add'>+	 * on and dying later.</div><div class='add'>+	 */</div><div class='add'>+	for_each_mem_range(i, &amp;start, &amp;end) {</div><div class='add'>+		if (rsi_set_memory_range_protected_safe(start, end)) {</div><div class='add'>+			panic("Failed to set memory range to protected: %pa-%pa",</div><div class='add'>+			      &amp;start, &amp;end);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check if a given PA range is Trusted (e.g., Protected memory, a Trusted Device</div><div class='add'>+ * mapping, or an MMIO emulated in the Realm world).</div><div class='add'>+ *</div><div class='add'>+ * We can rely on the RIPAS value of the region to detect if a given region is</div><div class='add'>+ * protected.</div><div class='add'>+ *</div><div class='add'>+ *  RIPAS_DEV - A trusted device memory or a trusted emulated MMIO (in the Realm</div><div class='add'>+ *		world</div><div class='add'>+ *  RIPAS_RAM - Memory (RAM), protected by the RMM guarantees. (e.g., Firmware</div><div class='add'>+ *		reserved regions for data sharing).</div><div class='add'>+ *</div><div class='add'>+ *  RIPAS_DESTROYED is a special case of one of the above, where the host did</div><div class='add'>+ *  something without our permission and as such we can't do anything about it.</div><div class='add'>+ *</div><div class='add'>+ * The only case where something is emulated by the untrusted hypervisor or is</div><div class='add'>+ * backed by shared memory is indicated by RSI_RIPAS_EMPTY.</div><div class='add'>+ */</div><div class='add'>+bool arm64_rsi_is_protected(phys_addr_t base, size_t size)</div><div class='add'>+{</div><div class='add'>+	enum ripas ripas;</div><div class='add'>+	phys_addr_t end, top;</div><div class='add'>+</div><div class='add'>+	/* Overflow ? */</div><div class='add'>+	if (WARN_ON(base + size &lt;= base))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	end = ALIGN(base + size, RSI_GRANULE_SIZE);</div><div class='add'>+	base = ALIGN_DOWN(base, RSI_GRANULE_SIZE);</div><div class='add'>+</div><div class='add'>+	while (base &lt; end) {</div><div class='add'>+		if (WARN_ON(rsi_ipa_state_get(base, end, &amp;ripas, &amp;top)))</div><div class='add'>+			break;</div><div class='add'>+		if (WARN_ON(top &lt;= base))</div><div class='add'>+			break;</div><div class='add'>+		if (ripas == RSI_RIPAS_EMPTY)</div><div class='add'>+			break;</div><div class='add'>+		base = top;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return base &gt;= end;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(arm64_rsi_is_protected);</div><div class='add'>+</div><div class='add'>+static int realm_ioremap_hook(phys_addr_t phys, size_t size, pgprot_t *prot)</div><div class='add'>+{</div><div class='add'>+	if (arm64_rsi_is_protected(phys, size))</div><div class='add'>+		*prot = pgprot_encrypted(*prot);</div><div class='add'>+	else</div><div class='add'>+		*prot = pgprot_decrypted(*prot);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init arm64_rsi_init(void)</div><div class='add'>+{</div><div class='add'>+	if (arm_smccc_1_1_get_conduit() != SMCCC_CONDUIT_SMC)</div><div class='add'>+		return;</div><div class='add'>+	if (!rsi_version_matches())</div><div class='add'>+		return;</div><div class='add'>+	if (WARN_ON(rsi_get_realm_config(&amp;config)))</div><div class='add'>+		return;</div><div class='add'>+	prot_ns_shared = BIT(config.ipa_bits - 1);</div><div class='add'>+</div><div class='add'>+	if (arm64_ioremap_prot_hook_register(realm_ioremap_hook))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (realm_register_memory_enc_ops())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	arm64_rsi_setup_memory();</div><div class='add'>+</div><div class='add'>+	static_branch_enable(&amp;rsi_present);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device rsi_dev = {</div><div class='add'>+	.name = RSI_PDEV_NAME,</div><div class='add'>+	.id = PLATFORM_DEVID_NONE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init arm64_create_dummy_rsi_dev(void)</div><div class='add'>+{</div><div class='add'>+	if (is_realm_world() &amp;&amp;</div><div class='add'>+	    platform_device_register(&amp;rsi_dev))</div><div class='add'>+		pr_err("failed to register rsi platform device\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(arm64_create_dummy_rsi_dev)</div><div class='head'>diff --git a/arch/arm64/kernel/sdei.c b/arch/arm64/kernel/sdei.c<br/>index 255d12f881c2..95169f7b6531 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/sdei.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/sdei.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/sdei.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/sdei.c</a></div><div class='hunk'>@@ -34,10 +34,8 @@ unsigned long sdei_exit_mode;</div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);</div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='ctx'> DEFINE_PER_CPU(unsigned long *, sdei_stack_normal_ptr);</div><div class='ctx'> DEFINE_PER_CPU(unsigned long *, sdei_stack_critical_ptr);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_shadow_call_stack_normal_ptr);</div><div class='ctx'> DECLARE_PER_CPU(unsigned long *, sdei_shadow_call_stack_critical_ptr);</div><div class='hunk'>@@ -65,8 +63,7 @@ static void free_sdei_stacks(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_VMAP_STACK))</div><div class='del'>-		return;</div><div class='add'>+	BUILD_BUG_ON(!IS_ENABLED(CONFIG_VMAP_STACK));</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		_free_sdei_stack(&amp;sdei_stack_normal_ptr, cpu);</div><div class='hunk'>@@ -91,8 +88,7 @@ static int init_sdei_stacks(void)</div><div class='ctx'> 	int cpu;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_VMAP_STACK))</div><div class='del'>-		return 0;</div><div class='add'>+	BUILD_BUG_ON(!IS_ENABLED(CONFIG_VMAP_STACK));</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		err = _init_sdei_stack(&amp;sdei_stack_normal_ptr, cpu);</div><div class='hunk'>@@ -247,7 +243,7 @@ unsigned long __kprobes do_sdei_event(struct pt_regs *regs,</div><div class='ctx'> 	 * If we interrupted the kernel with interrupts masked, we always go</div><div class='ctx'> 	 * back to wherever we came from.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mode == kernel_mode &amp;&amp; !interrupts_enabled(regs))</div><div class='add'>+	if (mode == kernel_mode &amp;&amp; regs_irqs_disabled(regs))</div><div class='ctx'> 		return SDEI_EV_HANDLED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c<br/>index b22d28ec8028..23c05dc7a8f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/setup.c</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #include &lt;asm/cpu_ops.h&gt;</div><div class='ctx'> #include &lt;asm/kasan.h&gt;</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='ctx'> #include &lt;asm/scs.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -168,19 +169,23 @@ static void __init smp_build_mpidr_hash(void)</div><div class='ctx'> </div><div class='ctx'> static void __init setup_machine_fdt(phys_addr_t dt_phys)</div><div class='ctx'> {</div><div class='del'>-	int size;</div><div class='add'>+	int size = 0;</div><div class='ctx'> 	void *dt_virt = fixmap_remap_fdt(dt_phys, &amp;size, PAGE_KERNEL);</div><div class='ctx'> 	const char *name;</div><div class='ctx'> </div><div class='ctx'> 	if (dt_virt)</div><div class='ctx'> 		memblock_reserve(dt_phys, size);</div><div class='ctx'> </div><div class='del'>-	if (!dt_virt || !early_init_dt_scan(dt_virt)) {</div><div class='add'>+	/*</div><div class='add'>+	 * dt_virt is a fixmap address, hence __pa(dt_virt) can't be used.</div><div class='add'>+	 * Pass dt_phys directly.</div><div class='add'>+	 */</div><div class='add'>+	if (!early_init_dt_scan(dt_virt, dt_phys)) {</div><div class='ctx'> 		pr_crit("\n"</div><div class='del'>-			"Error: invalid device tree blob at physical address %pa (virtual address 0x%px)\n"</div><div class='del'>-			"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"</div><div class='del'>-			"\nPlease check your bootloader.",</div><div class='del'>-			&amp;dt_phys, dt_virt);</div><div class='add'>+			"Error: invalid device tree blob: PA=%pa, VA=%px, size=%d bytes\n"</div><div class='add'>+			"The dtb must be 8-byte aligned and must not exceed 2 MB in size.\n"</div><div class='add'>+			"\nPlease check your bootloader.\n",</div><div class='add'>+			&amp;dt_phys, dt_virt, size);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Note that in this _really_ early stage we cannot even BUG()</div><div class='hunk'>@@ -209,7 +214,7 @@ static void __init request_standard_resources(void)</div><div class='ctx'> 	unsigned long i = 0;</div><div class='ctx'> 	size_t res_size;</div><div class='ctx'> </div><div class='del'>-	kernel_code.start   = __pa_symbol(_stext);</div><div class='add'>+	kernel_code.start   = __pa_symbol(_text);</div><div class='ctx'> 	kernel_code.end     = __pa_symbol(__init_begin - 1);</div><div class='ctx'> 	kernel_data.start   = __pa_symbol(_sdata);</div><div class='ctx'> 	kernel_data.end     = __pa_symbol(_end - 1);</div><div class='hunk'>@@ -218,9 +223,7 @@ static void __init request_standard_resources(void)</div><div class='ctx'> </div><div class='ctx'> 	num_standard_resources = memblock.memory.cnt;</div><div class='ctx'> 	res_size = num_standard_resources * sizeof(*standard_resources);</div><div class='del'>-	standard_resources = memblock_alloc(res_size, SMP_CACHE_BYTES);</div><div class='del'>-	if (!standard_resources)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__, res_size);</div><div class='add'>+	standard_resources = memblock_alloc_or_panic(res_size, SMP_CACHE_BYTES);</div><div class='ctx'> </div><div class='ctx'> 	for_each_mem_region(region) {</div><div class='ctx'> 		res = &amp;standard_resources[i++];</div><div class='hunk'>@@ -277,7 +280,7 @@ u64 cpu_logical_map(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> void __init __no_sanitize_address setup_arch(char **cmdline_p)</div><div class='ctx'> {</div><div class='del'>-	setup_initial_init_mm(_stext, _etext, _edata, _end);</div><div class='add'>+	setup_initial_init_mm(_text, _etext, _edata, _end);</div><div class='ctx'> </div><div class='ctx'> 	*cmdline_p = boot_command_line;</div><div class='ctx'> </div><div class='hunk'>@@ -351,6 +354,8 @@ void __init __no_sanitize_address setup_arch(char **cmdline_p)</div><div class='ctx'> 	else</div><div class='ctx'> 		psci_acpi_init();</div><div class='ctx'> </div><div class='add'>+	arm64_rsi_init();</div><div class='add'>+</div><div class='ctx'> 	init_bootcpu_ops();</div><div class='ctx'> 	smp_init_cpus();</div><div class='ctx'> 	smp_build_mpidr_hash();</div><div class='head'>diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c<br/>index 561986947530..1110eeb21f57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/signal.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/signal.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/signal.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/irq-entry-common.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/freezer.h&gt;</div><div class='hunk'>@@ -19,12 +20,14 @@</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/rseq.h&gt;</div><div class='ctx'> #include &lt;linux/syscalls.h&gt;</div><div class='add'>+#include &lt;linux/pkeys.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/daifflags.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> #include &lt;asm/exception.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/fpsimd.h&gt;</div><div class='hunk'>@@ -34,6 +37,8 @@</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='add'>+#define GCS_SIGNAL_CAP(addr) (((unsigned long)addr) &amp; GCS_CAP_ADDR_MASK)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Do a signal return; undo the signal stack. These are aligned to 128-bit.</div><div class='ctx'>  */</div><div class='hunk'>@@ -42,11 +47,6 @@ struct rt_sigframe {</div><div class='ctx'> 	struct ucontext uc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct frame_record {</div><div class='del'>-	u64 fp;</div><div class='del'>-	u64 lr;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct rt_sigframe_user_layout {</div><div class='ctx'> 	struct rt_sigframe __user *sigframe;</div><div class='ctx'> 	struct frame_record __user *next_frame;</div><div class='hunk'>@@ -56,6 +56,7 @@ struct rt_sigframe_user_layout {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long fpsimd_offset;</div><div class='ctx'> 	unsigned long esr_offset;</div><div class='add'>+	unsigned long gcs_offset;</div><div class='ctx'> 	unsigned long sve_offset;</div><div class='ctx'> 	unsigned long tpidr2_offset;</div><div class='ctx'> 	unsigned long za_offset;</div><div class='hunk'>@@ -66,10 +67,65 @@ struct rt_sigframe_user_layout {</div><div class='ctx'> 	unsigned long end_offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define BASE_SIGFRAME_SIZE round_up(sizeof(struct rt_sigframe), 16)</div><div class='add'>+/*</div><div class='add'>+ * Holds any EL0-controlled state that influences unprivileged memory accesses.</div><div class='add'>+ * This includes both accesses done in userspace and uaccess done in the kernel.</div><div class='add'>+ *</div><div class='add'>+ * This state needs to be carefully managed to ensure that it doesn't cause</div><div class='add'>+ * uaccess to fail when setting up the signal frame, and the signal handler</div><div class='add'>+ * itself also expects a well-defined state when entered.</div><div class='add'>+ */</div><div class='add'>+struct user_access_state {</div><div class='add'>+	u64 por_el0;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define TERMINATOR_SIZE round_up(sizeof(struct _aarch64_ctx), 16)</div><div class='ctx'> #define EXTRA_CONTEXT_SIZE round_up(sizeof(struct extra_context), 16)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Save the user access state into ua_state and reset it to disable any</div><div class='add'>+ * restrictions.</div><div class='add'>+ */</div><div class='add'>+static void save_reset_user_access_state(struct user_access_state *ua_state)</div><div class='add'>+{</div><div class='add'>+	if (system_supports_poe()) {</div><div class='add'>+		u64 por_enable_all = 0;</div><div class='add'>+</div><div class='add'>+		for (int pkey = 0; pkey &lt; arch_max_pkey(); pkey++)</div><div class='add'>+			por_enable_all |= POR_ELx_PERM_PREP(pkey, POE_RWX);</div><div class='add'>+</div><div class='add'>+		ua_state-&gt;por_el0 = read_sysreg_s(SYS_POR_EL0);</div><div class='add'>+		write_sysreg_s(por_enable_all, SYS_POR_EL0);</div><div class='add'>+		/*</div><div class='add'>+		 * No ISB required as we can tolerate spurious Overlay faults -</div><div class='add'>+		 * the fault handler will check again based on the new value</div><div class='add'>+		 * of POR_EL0.</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set the user access state for invoking the signal handler.</div><div class='add'>+ *</div><div class='add'>+ * No uaccess should be done after that function is called.</div><div class='add'>+ */</div><div class='add'>+static void set_handler_user_access_state(void)</div><div class='add'>+{</div><div class='add'>+	if (system_supports_poe())</div><div class='add'>+		write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Restore the user access state to the values saved in ua_state.</div><div class='add'>+ *</div><div class='add'>+ * No uaccess should be done after that function is called.</div><div class='add'>+ */</div><div class='add'>+static void restore_user_access_state(const struct user_access_state *ua_state)</div><div class='add'>+{</div><div class='add'>+	if (system_supports_poe())</div><div class='add'>+		write_sysreg_s(ua_state-&gt;por_el0, SYS_POR_EL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void init_user_layout(struct rt_sigframe_user_layout *user)</div><div class='ctx'> {</div><div class='ctx'> 	const size_t reserved_size =</div><div class='hunk'>@@ -188,6 +244,8 @@ struct user_ctxs {</div><div class='ctx'> 	u32 fpmr_size;</div><div class='ctx'> 	struct poe_context __user *poe;</div><div class='ctx'> 	u32 poe_size;</div><div class='add'>+	struct gcs_context __user *gcs;</div><div class='add'>+	u32 gcs_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)</div><div class='hunk'>@@ -196,6 +254,8 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)</div><div class='ctx'> 		&amp;current-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	fpsimd_sync_from_effective_state(current);</div><div class='add'>+</div><div class='ctx'> 	/* copy the FP and status/control registers */</div><div class='ctx'> 	err = __copy_to_user(ctx-&gt;vregs, fpsimd-&gt;vregs, sizeof(fpsimd-&gt;vregs));</div><div class='ctx'> 	__put_user_error(fpsimd-&gt;fpsr, &amp;ctx-&gt;fpsr, err);</div><div class='hunk'>@@ -208,37 +268,46 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)</div><div class='ctx'> 	return err ? -EFAULT : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int restore_fpsimd_context(struct user_ctxs *user)</div><div class='add'>+static int read_fpsimd_context(struct user_fpsimd_state *fpsimd,</div><div class='add'>+			       struct user_ctxs *user)</div><div class='ctx'> {</div><div class='del'>-	struct user_fpsimd_state fpsimd;</div><div class='del'>-	int err = 0;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* check the size information */</div><div class='ctx'> 	if (user-&gt;fpsimd_size != sizeof(struct fpsimd_context))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* copy the FP and status/control registers */</div><div class='del'>-	err = __copy_from_user(fpsimd.vregs, &amp;(user-&gt;fpsimd-&gt;vregs),</div><div class='del'>-			       sizeof(fpsimd.vregs));</div><div class='del'>-	__get_user_error(fpsimd.fpsr, &amp;(user-&gt;fpsimd-&gt;fpsr), err);</div><div class='del'>-	__get_user_error(fpsimd.fpcr, &amp;(user-&gt;fpsimd-&gt;fpcr), err);</div><div class='add'>+	err = __copy_from_user(fpsimd-&gt;vregs, &amp;(user-&gt;fpsimd-&gt;vregs),</div><div class='add'>+			       sizeof(fpsimd-&gt;vregs));</div><div class='add'>+	__get_user_error(fpsimd-&gt;fpsr, &amp;(user-&gt;fpsimd-&gt;fpsr), err);</div><div class='add'>+	__get_user_error(fpsimd-&gt;fpcr, &amp;(user-&gt;fpsimd-&gt;fpcr), err);</div><div class='add'>+</div><div class='add'>+	return err ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int restore_fpsimd_context(struct user_ctxs *user)</div><div class='add'>+{</div><div class='add'>+	struct user_fpsimd_state fpsimd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = read_fpsimd_context(&amp;fpsimd, user);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	clear_thread_flag(TIF_SVE);</div><div class='add'>+	current-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> </div><div class='ctx'> 	/* load the hardware registers from the fpsimd_state structure */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='del'>-</div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int preserve_fpmr_context(struct fpmr_context __user *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	current-&gt;thread.uw.fpmr = read_sysreg_s(SYS_FPMR);</div><div class='del'>-</div><div class='ctx'> 	__put_user_error(FPMR_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='ctx'> 	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='ctx'> 	__put_user_error(current-&gt;thread.uw.fpmr, &amp;ctx-&gt;fpmr, err);</div><div class='hunk'>@@ -256,23 +325,25 @@ static int restore_fpmr_context(struct user_ctxs *user)</div><div class='ctx'> </div><div class='ctx'> 	__get_user_error(fpmr, &amp;user-&gt;fpmr-&gt;fpmr, err);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		write_sysreg_s(fpmr, SYS_FPMR);</div><div class='add'>+		current-&gt;thread.uw.fpmr = fpmr;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int preserve_poe_context(struct poe_context __user *ctx)</div><div class='add'>+static int preserve_poe_context(struct poe_context __user *ctx,</div><div class='add'>+				const struct user_access_state *ua_state)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	__put_user_error(POE_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='ctx'> 	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='del'>-	__put_user_error(read_sysreg_s(SYS_POR_EL0), &amp;ctx-&gt;por_el0, err);</div><div class='add'>+	__put_user_error(ua_state-&gt;por_el0, &amp;ctx-&gt;por_el0, err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int restore_poe_context(struct user_ctxs *user)</div><div class='add'>+static int restore_poe_context(struct user_ctxs *user,</div><div class='add'>+			       struct user_access_state *ua_state)</div><div class='ctx'> {</div><div class='ctx'> 	u64 por_el0;</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -282,7 +353,7 @@ static int restore_poe_context(struct user_ctxs *user)</div><div class='ctx'> </div><div class='ctx'> 	__get_user_error(por_el0, &amp;(user-&gt;poe-&gt;por_el0), err);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		write_sysreg_s(por_el0, SYS_POR_EL0);</div><div class='add'>+		ua_state-&gt;por_el0 = por_el0;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -316,11 +387,6 @@ static int preserve_sve_context(struct sve_context __user *ctx)</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='ctx'> 	if (vq) {</div><div class='del'>-		/*</div><div class='del'>-		 * This assumes that the SVE state has already been saved to</div><div class='del'>-		 * the task struct by calling the function</div><div class='del'>-		 * fpsimd_signal_preserve_current_state().</div><div class='del'>-		 */</div><div class='ctx'> 		err |= __copy_to_user((char __user *)ctx + SVE_SIG_REGS_OFFSET,</div><div class='ctx'> 				      current-&gt;thread.sve_state,</div><div class='ctx'> 				      SVE_SIG_REGS_SIZE(vq));</div><div class='hunk'>@@ -335,6 +401,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	unsigned int vl, vq;</div><div class='ctx'> 	struct user_fpsimd_state fpsimd;</div><div class='ctx'> 	u16 user_vl, flags;</div><div class='add'>+	bool sm;</div><div class='ctx'> </div><div class='ctx'> 	if (user-&gt;sve_size &lt; sizeof(*user-&gt;sve))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -344,7 +411,8 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; SVE_SIG_FLAG_SM) {</div><div class='add'>+	sm = flags &amp; SVE_SIG_FLAG_SM;</div><div class='add'>+	if (sm) {</div><div class='ctx'> 		if (!system_supports_sme())</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -364,28 +432,23 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	if (user_vl != vl)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (user-&gt;sve_size == sizeof(*user-&gt;sve)) {</div><div class='del'>-		clear_thread_flag(TIF_SVE);</div><div class='del'>-		current-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='del'>-		current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto fpsimd_only;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Non-streaming SVE state may be preserved without an SVE payload, in</div><div class='add'>+	 * which case the SVE context only has a header with VL==0, and all</div><div class='add'>+	 * state can be restored from the FPSIMD context.</div><div class='add'>+	 *</div><div class='add'>+	 * Streaming SVE state is always preserved with an SVE payload. For</div><div class='add'>+	 * consistency and robustness, reject restoring streaming SVE state</div><div class='add'>+	 * without an SVE payload.</div><div class='add'>+	 */</div><div class='add'>+	if (!sm &amp;&amp; user-&gt;sve_size == sizeof(*user-&gt;sve))</div><div class='add'>+		return restore_fpsimd_context(user);</div><div class='ctx'> </div><div class='ctx'> 	vq = sve_vq_from_vl(vl);</div><div class='ctx'> </div><div class='ctx'> 	if (user-&gt;sve_size &lt; SVE_SIG_CONTEXT_SIZE(vq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.sve_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch thread.sve_state */</div><div class='del'>-</div><div class='ctx'> 	sve_alloc(current, true);</div><div class='ctx'> 	if (!current-&gt;thread.sve_state) {</div><div class='ctx'> 		clear_thread_flag(TIF_SVE);</div><div class='hunk'>@@ -405,19 +468,14 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 		set_thread_flag(TIF_SVE);</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='ctx'> </div><div class='del'>-fpsimd_only:</div><div class='del'>-	/* copy the FP and status/control registers */</div><div class='del'>-	/* restore_sigframe() already checked that user-&gt;fpsimd != NULL. */</div><div class='del'>-	err = __copy_from_user(fpsimd.vregs, user-&gt;fpsimd-&gt;vregs,</div><div class='del'>-			       sizeof(fpsimd.vregs));</div><div class='del'>-	__get_user_error(fpsimd.fpsr, &amp;user-&gt;fpsimd-&gt;fpsr, err);</div><div class='del'>-	__get_user_error(fpsimd.fpcr, &amp;user-&gt;fpsimd-&gt;fpcr, err);</div><div class='add'>+	err = read_fpsimd_context(&amp;fpsimd, user);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	/* load the hardware registers from the fpsimd_state structure */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	/* Merge the FPSIMD registers into the SVE state */</div><div class='add'>+	fpsimd_update_current_state(&amp;fpsimd);</div><div class='ctx'> </div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='hunk'>@@ -437,13 +495,12 @@ extern int preserve_sve_context(void __user *ctx);</div><div class='ctx'> </div><div class='ctx'> static int preserve_tpidr2_context(struct tpidr2_context __user *ctx)</div><div class='ctx'> {</div><div class='add'>+	u64 tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	current-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='del'>-</div><div class='ctx'> 	__put_user_error(TPIDR2_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='ctx'> 	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='del'>-	__put_user_error(current-&gt;thread.tpidr2_el0, &amp;ctx-&gt;tpidr2, err);</div><div class='add'>+	__put_user_error(tpidr2_el0, &amp;ctx-&gt;tpidr2, err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -485,11 +542,6 @@ static int preserve_za_context(struct za_context __user *ctx)</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='ctx'> 	if (vq) {</div><div class='del'>-		/*</div><div class='del'>-		 * This assumes that the ZA state has already been saved to</div><div class='del'>-		 * the task struct by calling the function</div><div class='del'>-		 * fpsimd_signal_preserve_current_state().</div><div class='del'>-		 */</div><div class='ctx'> 		err |= __copy_to_user((char __user *)ctx + ZA_SIG_REGS_OFFSET,</div><div class='ctx'> 				      current-&gt;thread.sme_state,</div><div class='ctx'> 				      ZA_SIG_REGS_SIZE(vq));</div><div class='hunk'>@@ -524,16 +576,6 @@ static int restore_za_context(struct user_ctxs *user)</div><div class='ctx'> 	if (user-&gt;za_size &lt; ZA_SIG_CONTEXT_SIZE(vq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.sme_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch thread.sve_state */</div><div class='del'>-</div><div class='ctx'> 	sme_alloc(current, true);</div><div class='ctx'> 	if (!current-&gt;thread.sme_state) {</div><div class='ctx'> 		current-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='hunk'>@@ -571,11 +613,6 @@ static int preserve_zt_context(struct zt_context __user *ctx)</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(ctx-&gt;__reserved) != sizeof(reserved));</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This assumes that the ZT state has already been saved to</div><div class='del'>-	 * the task struct by calling the function</div><div class='del'>-	 * fpsimd_signal_preserve_current_state().</div><div class='del'>-	 */</div><div class='ctx'> 	err |= __copy_to_user((char __user *)ctx + ZT_SIG_REGS_OFFSET,</div><div class='ctx'> 			      thread_zt_state(&amp;current-&gt;thread),</div><div class='ctx'> 			      ZT_SIG_REGS_SIZE(1));</div><div class='hunk'>@@ -601,16 +638,6 @@ static int restore_zt_context(struct user_ctxs *user)</div><div class='ctx'> 	if (nregs != 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.zt_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch ZT in thread state */</div><div class='del'>-</div><div class='ctx'> 	err = __copy_from_user(thread_zt_state(&amp;current-&gt;thread),</div><div class='ctx'> 			       (char __user const *)user-&gt;zt +</div><div class='ctx'> 					ZT_SIG_REGS_OFFSET,</div><div class='hunk'>@@ -633,6 +660,82 @@ extern int restore_zt_context(struct user_ctxs *user);</div><div class='ctx'> </div><div class='ctx'> #endif /* ! CONFIG_ARM64_SME */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+</div><div class='add'>+static int preserve_gcs_context(struct gcs_context __user *ctx)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If GCS is enabled we will add a cap token to the frame,</div><div class='add'>+	 * include it in the GCSPR_EL0 we report to support stack</div><div class='add'>+	 * switching via sigreturn if GCS is enabled.  We do not allow</div><div class='add'>+	 * enabling via sigreturn so the token is only relevant for</div><div class='add'>+	 * threads with GCS enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (task_gcs_el0_enabled(current))</div><div class='add'>+		gcspr -= 8;</div><div class='add'>+</div><div class='add'>+	__put_user_error(GCS_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='add'>+	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='add'>+	__put_user_error(gcspr, &amp;ctx-&gt;gcspr, err);</div><div class='add'>+	__put_user_error(0, &amp;ctx-&gt;reserved, err);</div><div class='add'>+	__put_user_error(current-&gt;thread.gcs_el0_mode,</div><div class='add'>+			 &amp;ctx-&gt;features_enabled, err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int restore_gcs_context(struct user_ctxs *user)</div><div class='add'>+{</div><div class='add'>+	u64 gcspr, enabled;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (user-&gt;gcs_size != sizeof(*user-&gt;gcs))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	__get_user_error(gcspr, &amp;user-&gt;gcs-&gt;gcspr, err);</div><div class='add'>+	__get_user_error(enabled, &amp;user-&gt;gcs-&gt;features_enabled, err);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Don't allow unknown modes */</div><div class='add'>+	if (enabled &amp; ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = gcs_check_locked(current, enabled);</div><div class='add'>+	if (err != 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Don't allow enabling */</div><div class='add'>+	if (!task_gcs_el0_enabled(current) &amp;&amp;</div><div class='add'>+	    (enabled &amp; PR_SHADOW_STACK_ENABLE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* If we are disabling disable everything */</div><div class='add'>+	if (!(enabled &amp; PR_SHADOW_STACK_ENABLE))</div><div class='add'>+		enabled = 0;</div><div class='add'>+</div><div class='add'>+	current-&gt;thread.gcs_el0_mode = enabled;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We let userspace set GCSPR_EL0 to anything here, we will</div><div class='add'>+	 * validate later in gcs_restore_signal().</div><div class='add'>+	 */</div><div class='add'>+	write_sysreg_s(gcspr, SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* ! CONFIG_ARM64_GCS */</div><div class='add'>+</div><div class='add'>+/* Turn any non-optimised out attempts to use these into a link error: */</div><div class='add'>+extern int preserve_gcs_context(void __user *ctx);</div><div class='add'>+extern int restore_gcs_context(struct user_ctxs *user);</div><div class='add'>+</div><div class='add'>+#endif /* ! CONFIG_ARM64_GCS */</div><div class='add'>+</div><div class='ctx'> static int parse_user_sigframe(struct user_ctxs *user,</div><div class='ctx'> 			       struct rt_sigframe __user *sf)</div><div class='ctx'> {</div><div class='hunk'>@@ -651,6 +754,7 @@ static int parse_user_sigframe(struct user_ctxs *user,</div><div class='ctx'> 	user-&gt;zt = NULL;</div><div class='ctx'> 	user-&gt;fpmr = NULL;</div><div class='ctx'> 	user-&gt;poe = NULL;</div><div class='add'>+	user-&gt;gcs = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ALIGNED((unsigned long)base, 16))</div><div class='ctx'> 		goto invalid;</div><div class='hunk'>@@ -767,6 +871,17 @@ static int parse_user_sigframe(struct user_ctxs *user,</div><div class='ctx'> 			user-&gt;fpmr_size = size;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case GCS_MAGIC:</div><div class='add'>+			if (!system_supports_gcs())</div><div class='add'>+				goto invalid;</div><div class='add'>+</div><div class='add'>+			if (user-&gt;gcs)</div><div class='add'>+				goto invalid;</div><div class='add'>+</div><div class='add'>+			user-&gt;gcs = (struct gcs_context __user *)head;</div><div class='add'>+			user-&gt;gcs_size = size;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case EXTRA_MAGIC:</div><div class='ctx'> 			if (have_extra_context)</div><div class='ctx'> 				goto invalid;</div><div class='hunk'>@@ -850,7 +965,8 @@ invalid:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int restore_sigframe(struct pt_regs *regs,</div><div class='del'>-			    struct rt_sigframe __user *sf)</div><div class='add'>+			    struct rt_sigframe __user *sf,</div><div class='add'>+			    struct user_access_state *ua_state)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> 	int i, err;</div><div class='hunk'>@@ -872,6 +988,8 @@ static int restore_sigframe(struct pt_regs *regs,</div><div class='ctx'> 	 */</div><div class='ctx'> 	forget_syscall(regs);</div><div class='ctx'> </div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+</div><div class='ctx'> 	err |= !valid_user_regs(&amp;regs-&gt;user_regs, current);</div><div class='ctx'> 	if (err == 0)</div><div class='ctx'> 		err = parse_user_sigframe(&amp;user, sf);</div><div class='hunk'>@@ -886,6 +1004,9 @@ static int restore_sigframe(struct pt_regs *regs,</div><div class='ctx'> 			err = restore_fpsimd_context(&amp;user);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (err == 0 &amp;&amp; system_supports_gcs() &amp;&amp; user.gcs)</div><div class='add'>+		err = restore_gcs_context(&amp;user);</div><div class='add'>+</div><div class='ctx'> 	if (err == 0 &amp;&amp; system_supports_tpidr2() &amp;&amp; user.tpidr2)</div><div class='ctx'> 		err = restore_tpidr2_context(&amp;user);</div><div class='ctx'> </div><div class='hunk'>@@ -899,15 +1020,68 @@ static int restore_sigframe(struct pt_regs *regs,</div><div class='ctx'> 		err = restore_zt_context(&amp;user);</div><div class='ctx'> </div><div class='ctx'> 	if (err == 0 &amp;&amp; system_supports_poe() &amp;&amp; user.poe)</div><div class='del'>-		err = restore_poe_context(&amp;user);</div><div class='add'>+		err = restore_poe_context(&amp;user, ua_state);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+static int gcs_restore_signal(void)</div><div class='add'>+{</div><div class='add'>+	u64 gcspr_el0, cap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(current-&gt;thread.gcs_el0_mode &amp; PR_SHADOW_STACK_ENABLE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that any changes to the GCS done via GCS operations</div><div class='add'>+	 * are visible to the normal reads we do to validate the</div><div class='add'>+	 * token.</div><div class='add'>+	 */</div><div class='add'>+	gcsb_dsync();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GCSPR_EL0 should be pointing at a capped GCS, read the cap.</div><div class='add'>+	 * We don't enforce that this is in a GCS page, if it is not</div><div class='add'>+	 * then faults will be generated on GCS operations - the main</div><div class='add'>+	 * concern is to protect GCS pages.</div><div class='add'>+	 */</div><div class='add'>+	ret = copy_from_user(&amp;cap, (unsigned long __user *)gcspr_el0,</div><div class='add'>+			     sizeof(cap));</div><div class='add'>+	if (ret)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check that the cap is the actual GCS before replacing it.</div><div class='add'>+	 */</div><div class='add'>+	if (cap != GCS_SIGNAL_CAP(gcspr_el0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Invalidate the token to prevent reuse */</div><div class='add'>+	put_user_gcs(0, (unsigned long __user *)gcspr_el0, &amp;ret);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	write_sysreg_s(gcspr_el0 + 8, SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static int gcs_restore_signal(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> SYSCALL_DEFINE0(rt_sigreturn)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *regs = current_pt_regs();</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='add'>+	struct user_access_state ua_state;</div><div class='ctx'> </div><div class='ctx'> 	/* Always make any pending restarted system calls return -EINTR */</div><div class='ctx'> 	current-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='hunk'>@@ -924,12 +1098,17 @@ SYSCALL_DEFINE0(rt_sigreturn)</div><div class='ctx'> 	if (!access_ok(frame, sizeof (*frame)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	if (restore_sigframe(regs, frame))</div><div class='add'>+	if (restore_sigframe(regs, frame, &amp;ua_state))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	if (gcs_restore_signal())</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='ctx'> 	if (restore_altstack(&amp;frame-&gt;uc.uc_stack))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='add'>+	restore_user_access_state(&amp;ua_state);</div><div class='add'>+</div><div class='ctx'> 	return regs-&gt;regs[0];</div><div class='ctx'> </div><div class='ctx'> badframe:</div><div class='hunk'>@@ -964,6 +1143,15 @@ static int setup_sigframe_layout(struct rt_sigframe_user_layout *user,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+	if (system_supports_gcs() &amp;&amp; (add_all || current-&gt;thread.gcspr_el0)) {</div><div class='add'>+		err = sigframe_alloc(user, &amp;user-&gt;gcs_offset,</div><div class='add'>+				     sizeof(struct gcs_context));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	if (system_supports_sve() || system_supports_sme()) {</div><div class='ctx'> 		unsigned int vq = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1035,7 +1223,8 @@ static int setup_sigframe_layout(struct rt_sigframe_user_layout *user,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int setup_sigframe(struct rt_sigframe_user_layout *user,</div><div class='del'>-			  struct pt_regs *regs, sigset_t *set)</div><div class='add'>+			  struct pt_regs *regs, sigset_t *set,</div><div class='add'>+			  const struct user_access_state *ua_state)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> 	struct rt_sigframe __user *sf = user-&gt;sigframe;</div><div class='hunk'>@@ -1071,6 +1260,12 @@ static int setup_sigframe(struct rt_sigframe_user_layout *user,</div><div class='ctx'> 		__put_user_error(current-&gt;thread.fault_code, &amp;esr_ctx-&gt;esr, err);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (system_supports_gcs() &amp;&amp; err == 0 &amp;&amp; user-&gt;gcs_offset) {</div><div class='add'>+		struct gcs_context __user *gcs_ctx =</div><div class='add'>+			apply_user_offset(user, user-&gt;gcs_offset);</div><div class='add'>+		err |= preserve_gcs_context(gcs_ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Scalable Vector Extension state (including streaming), if present */</div><div class='ctx'> 	if ((system_supports_sve() || system_supports_sme()) &amp;&amp;</div><div class='ctx'> 	    err == 0 &amp;&amp; user-&gt;sve_offset) {</div><div class='hunk'>@@ -1093,14 +1288,13 @@ static int setup_sigframe(struct rt_sigframe_user_layout *user,</div><div class='ctx'> 		err |= preserve_fpmr_context(fpmr_ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (system_supports_poe() &amp;&amp; err == 0 &amp;&amp; user-&gt;poe_offset) {</div><div class='add'>+	if (system_supports_poe() &amp;&amp; err == 0) {</div><div class='ctx'> 		struct poe_context __user *poe_ctx =</div><div class='ctx'> 			apply_user_offset(user, user-&gt;poe_offset);</div><div class='ctx'> </div><div class='del'>-		err |= preserve_poe_context(poe_ctx);</div><div class='add'>+		err |= preserve_poe_context(poe_ctx, ua_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	/* ZA state if present */</div><div class='ctx'> 	if (system_supports_sme() &amp;&amp; err == 0 &amp;&amp; user-&gt;za_offset) {</div><div class='ctx'> 		struct za_context __user *za_ctx =</div><div class='hunk'>@@ -1189,15 +1383,81 @@ static int get_sigframe(struct rt_sigframe_user_layout *user,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,</div><div class='add'>+#ifdef CONFIG_ARM64_GCS</div><div class='add'>+</div><div class='add'>+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)</div><div class='add'>+{</div><div class='add'>+	u64 gcspr_el0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!task_gcs_el0_enabled(current))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We are entering a signal handler, current register state is</div><div class='add'>+	 * active.</div><div class='add'>+	 */</div><div class='add'>+	gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Push a cap and the GCS entry for the trampoline onto the GCS.</div><div class='add'>+	 */</div><div class='add'>+	put_user_gcs((unsigned long)sigtramp,</div><div class='add'>+		     (unsigned long __user *)(gcspr_el0 - 16), &amp;ret);</div><div class='add'>+	put_user_gcs(GCS_SIGNAL_CAP(gcspr_el0 - 8),</div><div class='add'>+		     (unsigned long __user *)(gcspr_el0 - 8), &amp;ret);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	gcspr_el0 -= 16;</div><div class='add'>+	write_sysreg_s(gcspr_el0, SYS_GCSPR_EL0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static int gcs_signal_entry(__sigrestore_t sigtramp, struct ksignal *ksig)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int setup_return(struct pt_regs *regs, struct ksignal *ksig,</div><div class='ctx'> 			 struct rt_sigframe_user_layout *user, int usig)</div><div class='ctx'> {</div><div class='ctx'> 	__sigrestore_t sigtramp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (ksig-&gt;ka.sa.sa_flags &amp; SA_RESTORER)</div><div class='add'>+		sigtramp = ksig-&gt;ka.sa.sa_restorer;</div><div class='add'>+	else</div><div class='add'>+		sigtramp = VDSO_SYMBOL(current-&gt;mm-&gt;context.vdso, sigtramp);</div><div class='add'>+</div><div class='add'>+	err = gcs_signal_entry(sigtramp, ksig);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We must not fail from this point onwards. We are going to update</div><div class='add'>+	 * registers, including SP, in order to invoke the signal handler. If</div><div class='add'>+	 * we failed and attempted to deliver a nested SIGSEGV to a handler</div><div class='add'>+	 * after that point, the subsequent sigreturn would end up restoring</div><div class='add'>+	 * the (partial) state for the original signal handler.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;regs[0] = usig;</div><div class='add'>+	if (ksig-&gt;ka.sa.sa_flags &amp; SA_SIGINFO) {</div><div class='add'>+		regs-&gt;regs[1] = (unsigned long)&amp;user-&gt;sigframe-&gt;info;</div><div class='add'>+		regs-&gt;regs[2] = (unsigned long)&amp;user-&gt;sigframe-&gt;uc;</div><div class='add'>+	}</div><div class='ctx'> 	regs-&gt;sp = (unsigned long)user-&gt;sigframe;</div><div class='ctx'> 	regs-&gt;regs[29] = (unsigned long)&amp;user-&gt;next_frame-&gt;fp;</div><div class='del'>-	regs-&gt;pc = (unsigned long)ka-&gt;sa.sa_handler;</div><div class='add'>+	regs-&gt;regs[30] = (unsigned long)sigtramp;</div><div class='add'>+	regs-&gt;pc = (unsigned long)ksig-&gt;ka.sa.sa_handler;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Signal delivery is a (wacky) indirect function call in</div><div class='hunk'>@@ -1220,32 +1480,12 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,</div><div class='ctx'> </div><div class='ctx'> 	/* Signal handlers are invoked with ZA and streaming mode disabled */</div><div class='ctx'> 	if (system_supports_sme()) {</div><div class='del'>-		/*</div><div class='del'>-		 * If we were in streaming mode the saved register</div><div class='del'>-		 * state was SVE but we will exit SM and use the</div><div class='del'>-		 * FPSIMD register state - flush the saved FPSIMD</div><div class='del'>-		 * register state in case it gets loaded.</div><div class='del'>-		 */</div><div class='del'>-		if (current-&gt;thread.svcr &amp; SVCR_SM_MASK) {</div><div class='del'>-			memset(&amp;current-&gt;thread.uw.fpsimd_state, 0,</div><div class='del'>-			       sizeof(current-&gt;thread.uw.fpsimd_state));</div><div class='del'>-			current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		current-&gt;thread.svcr &amp;= ~(SVCR_ZA_MASK |</div><div class='del'>-					  SVCR_SM_MASK);</div><div class='del'>-		sme_smstop();</div><div class='add'>+		task_smstop_sm(current);</div><div class='add'>+		current-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='add'>+		write_sysreg_s(0, SYS_TPIDR2_EL0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (system_supports_poe())</div><div class='del'>-		write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0);</div><div class='del'>-</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_RESTORER)</div><div class='del'>-		sigtramp = ka-&gt;sa.sa_restorer;</div><div class='del'>-	else</div><div class='del'>-		sigtramp = VDSO_SYMBOL(current-&gt;mm-&gt;context.vdso, sigtramp);</div><div class='del'>-</div><div class='del'>-	regs-&gt;regs[30] = (unsigned long)sigtramp;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,</div><div class='hunk'>@@ -1253,28 +1493,37 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,</div><div class='ctx'> {</div><div class='ctx'> 	struct rt_sigframe_user_layout user;</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='add'>+	struct user_access_state ua_state;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	fpsimd_signal_preserve_current_state();</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='ctx'> </div><div class='ctx'> 	if (get_sigframe(&amp;user, ksig, regs))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	save_reset_user_access_state(&amp;ua_state);</div><div class='ctx'> 	frame = user.sigframe;</div><div class='ctx'> </div><div class='ctx'> 	__put_user_error(0, &amp;frame-&gt;uc.uc_flags, err);</div><div class='ctx'> 	__put_user_error(NULL, &amp;frame-&gt;uc.uc_link, err);</div><div class='ctx'> </div><div class='ctx'> 	err |= __save_altstack(&amp;frame-&gt;uc.uc_stack, regs-&gt;sp);</div><div class='del'>-	err |= setup_sigframe(&amp;user, regs, set);</div><div class='del'>-	if (err == 0) {</div><div class='del'>-		setup_return(regs, &amp;ksig-&gt;ka, &amp;user, usig);</div><div class='del'>-		if (ksig-&gt;ka.sa.sa_flags &amp; SA_SIGINFO) {</div><div class='del'>-			err |= copy_siginfo_to_user(&amp;frame-&gt;info, &amp;ksig-&gt;info);</div><div class='del'>-			regs-&gt;regs[1] = (unsigned long)&amp;frame-&gt;info;</div><div class='del'>-			regs-&gt;regs[2] = (unsigned long)&amp;frame-&gt;uc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	err |= setup_sigframe(&amp;user, regs, set, &amp;ua_state);</div><div class='add'>+	if (ksig-&gt;ka.sa.sa_flags &amp; SA_SIGINFO)</div><div class='add'>+		err |= copy_siginfo_to_user(&amp;frame-&gt;info, &amp;ksig-&gt;info);</div><div class='add'>+</div><div class='add'>+	if (err == 0)</div><div class='add'>+		err = setup_return(regs, ksig, &amp;user, usig);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We must not fail if setup_return() succeeded - see comment at the</div><div class='add'>+	 * beginning of setup_return().</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (err == 0)</div><div class='add'>+		set_handler_user_access_state();</div><div class='add'>+	else</div><div class='add'>+		restore_user_access_state(&amp;ua_state);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1328,7 +1577,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'>  * the kernel can handle, and then we build all the user-level signal handling</div><div class='ctx'>  * stack-frames in one go after that.</div><div class='ctx'>  */</div><div class='del'>-void do_signal(struct pt_regs *regs)</div><div class='add'>+void arch_do_signal_or_restart(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long continue_addr = 0, restart_addr = 0;</div><div class='ctx'> 	int retval = 0;</div><div class='head'>diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c<br/>index 81e798b6dada..bb3b526ff43f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/signal32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/signal32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/signal32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/signal32.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)</div><div class='ctx'> 	 * Note that this also saves V16-31, which aren't visible</div><div class='ctx'> 	 * in AArch32.</div><div class='ctx'> 	 */</div><div class='del'>-	fpsimd_signal_preserve_current_state();</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='ctx'> </div><div class='ctx'> 	/* Place structure header on the stack */</div><div class='ctx'> 	__put_user_error(magic, &amp;frame-&gt;magic, err);</div><div class='hunk'>@@ -169,14 +169,17 @@ static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame)</div><div class='ctx'> 	fpsimd.fpsr = fpscr &amp; VFP_FPSCR_STAT_MASK;</div><div class='ctx'> 	fpsimd.fpcr = fpscr &amp; VFP_FPSCR_CTRL_MASK;</div><div class='ctx'> </div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We don't need to touch the exception register, so</div><div class='ctx'> 	 * reload the hardware state.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+	current-&gt;thread.uw.fpsimd_state = fpsimd;</div><div class='ctx'> </div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int compat_restore_sigframe(struct pt_regs *regs,</div><div class='head'>diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S<br/>index 487381164ff6..2def9d0dd3dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/smccc-call.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/smccc-call.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/smccc-call.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/smccc-call.S</a></div><div class='hunk'>@@ -7,48 +7,19 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='del'>-#include &lt;asm/thread_info.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If we have SMCCC v1.3 and (as is likely) no SVE state in</div><div class='del'>- * the registers then set the SMCCC hint bit to say there's no</div><div class='del'>- * need to preserve it.  Do this by directly adjusting the SMCCC</div><div class='del'>- * function value which is already stored in x0 ready to be called.</div><div class='del'>- */</div><div class='del'>-SYM_FUNC_START(__arm_smccc_sve_check)</div><div class='del'>-</div><div class='del'>-	ldr_l	x16, smccc_has_sve_hint</div><div class='del'>-	cbz	x16, 2f</div><div class='del'>-</div><div class='del'>-	get_current_task x16</div><div class='del'>-	ldr	x16, [x16, #TSK_TI_FLAGS]</div><div class='del'>-	tbnz	x16, #TIF_FOREIGN_FPSTATE, 1f	// Any live FP state?</div><div class='del'>-	tbnz	x16, #TIF_SVE, 2f		// Does that state include SVE?</div><div class='del'>-</div><div class='del'>-1:	orr	x0, x0, ARM_SMCCC_1_3_SVE_HINT</div><div class='del'>-</div><div class='del'>-2:	ret</div><div class='del'>-SYM_FUNC_END(__arm_smccc_sve_check)</div><div class='del'>-EXPORT_SYMBOL(__arm_smccc_sve_check)</div><div class='ctx'> </div><div class='ctx'> 	.macro SMCCC instr</div><div class='del'>-	stp     x29, x30, [sp, #-16]!</div><div class='del'>-	mov	x29, sp</div><div class='del'>-alternative_if ARM64_SVE</div><div class='del'>-	bl	__arm_smccc_sve_check</div><div class='del'>-alternative_else_nop_endif</div><div class='ctx'> 	\instr	#0</div><div class='del'>-	ldr	x4, [sp, #16]</div><div class='add'>+	ldr	x4, [sp]</div><div class='ctx'> 	stp	x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]</div><div class='ctx'> 	stp	x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]</div><div class='del'>-	ldr	x4, [sp, #24]</div><div class='add'>+	ldr	x4, [sp, #8]</div><div class='ctx'> 	cbz	x4, 1f /* no quirk structure */</div><div class='ctx'> 	ldr	x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]</div><div class='ctx'> 	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6</div><div class='ctx'> 	b.ne	1f</div><div class='ctx'> 	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]</div><div class='del'>-1:	ldp     x29, x30, [sp], #16</div><div class='del'>-	ret</div><div class='add'>+1:	ret</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c<br/>index 3b3f6b56e733..68cea3a4a35c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/smp.c</a></div><div class='hunk'>@@ -64,26 +64,18 @@ struct secondary_data secondary_data;</div><div class='ctx'> /* Number of CPUs which aren't online, but looping in kernel text. */</div><div class='ctx'> static int cpus_stuck_in_kernel;</div><div class='ctx'> </div><div class='del'>-enum ipi_msg_type {</div><div class='del'>-	IPI_RESCHEDULE,</div><div class='del'>-	IPI_CALL_FUNC,</div><div class='del'>-	IPI_CPU_STOP,</div><div class='del'>-	IPI_CPU_STOP_NMI,</div><div class='del'>-	IPI_TIMER,</div><div class='del'>-	IPI_IRQ_WORK,</div><div class='del'>-	NR_IPI,</div><div class='del'>-	/*</div><div class='del'>-	 * Any enum &gt;= NR_IPI and &lt; MAX_IPI is special and not tracable</div><div class='del'>-	 * with trace_ipi_*</div><div class='del'>-	 */</div><div class='del'>-	IPI_CPU_BACKTRACE = NR_IPI,</div><div class='del'>-	IPI_KGDB_ROUNDUP,</div><div class='del'>-	MAX_IPI</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int ipi_irq_base __ro_after_init;</div><div class='ctx'> static int nr_ipi __ro_after_init = NR_IPI;</div><div class='del'>-static struct irq_desc *ipi_desc[MAX_IPI] __ro_after_init;</div><div class='add'>+</div><div class='add'>+struct ipi_descs {</div><div class='add'>+	struct irq_desc *descs[MAX_IPI];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU_READ_MOSTLY(struct ipi_descs, pcpu_ipi_desc);</div><div class='add'>+</div><div class='add'>+#define get_ipi_desc(__cpu, __ipi) (per_cpu_ptr(&amp;pcpu_ipi_desc, __cpu)-&gt;descs[__ipi])</div><div class='add'>+</div><div class='add'>+static bool percpu_ipi_descs __ro_after_init;</div><div class='ctx'> </div><div class='ctx'> static bool crash_stop;</div><div class='ctx'> </div><div class='hunk'>@@ -844,7 +836,7 @@ int arch_show_interrupts(struct seq_file *p, int prec)</div><div class='ctx'> 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,</div><div class='ctx'> 			   prec &gt;= 4 ? " " : "");</div><div class='ctx'> 		for_each_online_cpu(cpu)</div><div class='del'>-			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));</div><div class='add'>+			seq_printf(p, "%10u ", irq_desc_kstat_cpu(get_ipi_desc(cpu, i), cpu));</div><div class='ctx'> 		seq_printf(p, "      %s\n", ipi_types[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -917,9 +909,20 @@ static void __noreturn ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void arm64_send_ipi(const cpumask_t *mask, unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+</div><div class='add'>+	if (!percpu_ipi_descs)</div><div class='add'>+		__ipi_send_mask(get_ipi_desc(0, nr), mask);</div><div class='add'>+	else</div><div class='add'>+		for_each_cpu(cpu, mask)</div><div class='add'>+			__ipi_send_single(get_ipi_desc(cpu, nr), cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void arm64_backtrace_ipi(cpumask_t *mask)</div><div class='ctx'> {</div><div class='del'>-	__ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);</div><div class='add'>+	arm64_send_ipi(mask, IPI_CPU_BACKTRACE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)</div><div class='hunk'>@@ -944,7 +947,7 @@ void kgdb_roundup_cpus(void)</div><div class='ctx'> 		if (cpu == this_cpu)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		__ipi_send_single(ipi_desc[IPI_KGDB_ROUNDUP], cpu);</div><div class='add'>+		__ipi_send_single(get_ipi_desc(cpu, IPI_KGDB_ROUNDUP), cpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1013,14 +1016,16 @@ static void do_handle_IPI(int ipinr)</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t ipi_handler(int irq, void *data)</div><div class='ctx'> {</div><div class='del'>-	do_handle_IPI(irq - ipi_irq_base);</div><div class='add'>+	unsigned int ipi = (irq - ipi_irq_base) % nr_ipi;</div><div class='add'>+</div><div class='add'>+	do_handle_IPI(ipi);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)</div><div class='ctx'> {</div><div class='ctx'> 	trace_ipi_raise(target, ipi_types[ipinr]);</div><div class='del'>-	__ipi_send_mask(ipi_desc[ipinr], target);</div><div class='add'>+	arm64_send_ipi(target, ipinr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool ipi_should_be_nmi(enum ipi_msg_type ipi)</div><div class='hunk'>@@ -1046,11 +1051,15 @@ static void ipi_setup(int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_ipi; i++) {</div><div class='del'>-		if (ipi_should_be_nmi(i)) {</div><div class='del'>-			prepare_percpu_nmi(ipi_irq_base + i);</div><div class='del'>-			enable_percpu_nmi(ipi_irq_base + i, 0);</div><div class='add'>+		if (!percpu_ipi_descs) {</div><div class='add'>+			if (ipi_should_be_nmi(i)) {</div><div class='add'>+				prepare_percpu_nmi(ipi_irq_base + i);</div><div class='add'>+				enable_percpu_nmi(ipi_irq_base + i, 0);</div><div class='add'>+			} else {</div><div class='add'>+				enable_percpu_irq(ipi_irq_base + i, 0);</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='del'>-			enable_percpu_irq(ipi_irq_base + i, 0);</div><div class='add'>+			enable_irq(irq_desc_get_irq(get_ipi_desc(cpu, i)));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1064,44 +1073,77 @@ static void ipi_teardown(int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_ipi; i++) {</div><div class='del'>-		if (ipi_should_be_nmi(i)) {</div><div class='del'>-			disable_percpu_nmi(ipi_irq_base + i);</div><div class='del'>-			teardown_percpu_nmi(ipi_irq_base + i);</div><div class='add'>+		if (!percpu_ipi_descs) {</div><div class='add'>+			if (ipi_should_be_nmi(i)) {</div><div class='add'>+				disable_percpu_nmi(ipi_irq_base + i);</div><div class='add'>+				teardown_percpu_nmi(ipi_irq_base + i);</div><div class='add'>+			} else {</div><div class='add'>+				disable_percpu_irq(ipi_irq_base + i);</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='del'>-			disable_percpu_irq(ipi_irq_base + i);</div><div class='add'>+			disable_irq(irq_desc_get_irq(get_ipi_desc(cpu, i)));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __init set_smp_ipi_range(int ipi_base, int n)</div><div class='add'>+static void ipi_setup_sgi(int ipi)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int err, irq, cpu;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(n &lt; MAX_IPI);</div><div class='del'>-	nr_ipi = min(n, MAX_IPI);</div><div class='add'>+	irq = ipi_irq_base + ipi;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nr_ipi; i++) {</div><div class='del'>-		int err;</div><div class='add'>+	if (ipi_should_be_nmi(ipi)) {</div><div class='add'>+		err = request_percpu_nmi(irq, ipi_handler, "IPI", &amp;irq_stat);</div><div class='add'>+		WARN(err, "Could not request IRQ %d as NMI, err=%d\n", irq, err);</div><div class='add'>+	} else {</div><div class='add'>+		err = request_percpu_irq(irq, ipi_handler, "IPI", &amp;irq_stat);</div><div class='add'>+		WARN(err, "Could not request IRQ %d as IRQ, err=%d\n", irq, err);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (ipi_should_be_nmi(i)) {</div><div class='del'>-			err = request_percpu_nmi(ipi_base + i, ipi_handler,</div><div class='del'>-						 "IPI", &amp;irq_stat);</div><div class='del'>-			WARN(err, "Could not request IPI %d as NMI, err=%d\n",</div><div class='del'>-			     i, err);</div><div class='del'>-		} else {</div><div class='del'>-			err = request_percpu_irq(ipi_base + i, ipi_handler,</div><div class='del'>-						 "IPI", &amp;irq_stat);</div><div class='del'>-			WARN(err, "Could not request IPI %d as IRQ, err=%d\n",</div><div class='del'>-			     i, err);</div><div class='del'>-		}</div><div class='add'>+	for_each_possible_cpu(cpu)</div><div class='add'>+		get_ipi_desc(cpu, ipi) = irq_to_desc(irq);</div><div class='add'>+</div><div class='add'>+	irq_set_status_flags(irq, IRQ_HIDDEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipi_setup_lpi(int ipi, int ncpus)</div><div class='add'>+{</div><div class='add'>+	for (int cpu = 0; cpu &lt; ncpus; cpu++) {</div><div class='add'>+		int err, irq;</div><div class='add'>+</div><div class='add'>+		irq = ipi_irq_base + (cpu * nr_ipi) + ipi;</div><div class='add'>+</div><div class='add'>+		err = irq_force_affinity(irq, cpumask_of(cpu));</div><div class='add'>+		WARN(err, "Could not force affinity IRQ %d, err=%d\n", irq, err);</div><div class='add'>+</div><div class='add'>+		err = request_irq(irq, ipi_handler, IRQF_NO_AUTOEN, "IPI",</div><div class='add'>+				  NULL);</div><div class='add'>+		WARN(err, "Could not request IRQ %d, err=%d\n", irq, err);</div><div class='add'>+</div><div class='add'>+		irq_set_status_flags(irq, (IRQ_HIDDEN | IRQ_NO_BALANCING_MASK));</div><div class='ctx'> </div><div class='del'>-		ipi_desc[i] = irq_to_desc(ipi_base + i);</div><div class='del'>-		irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);</div><div class='add'>+		get_ipi_desc(cpu, ipi) = irq_to_desc(irq);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init set_smp_ipi_range_percpu(int ipi_base, int n, int ncpus)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	WARN_ON(n &lt; MAX_IPI);</div><div class='add'>+	nr_ipi = min(n, MAX_IPI);</div><div class='ctx'> </div><div class='add'>+	percpu_ipi_descs = !!ncpus;</div><div class='ctx'> 	ipi_irq_base = ipi_base;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; nr_ipi; i++) {</div><div class='add'>+		if (!percpu_ipi_descs)</div><div class='add'>+			ipi_setup_sgi(i);</div><div class='add'>+		else</div><div class='add'>+			ipi_setup_lpi(i, ncpus);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Setup the boot CPU immediately */</div><div class='ctx'> 	ipi_setup(smp_processor_id());</div><div class='ctx'> }</div><div class='hunk'>@@ -1143,7 +1185,7 @@ static inline unsigned int num_other_online_cpus(void)</div><div class='ctx'> void smp_send_stop(void)</div><div class='ctx'> {</div><div class='ctx'> 	static unsigned long stop_in_progress;</div><div class='del'>-	cpumask_t mask;</div><div class='add'>+	static cpumask_t mask;</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c<br/>index 2729faaee4b4..3ebcf8c53fb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/stacktrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/stacktrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/stacktrace.c</a></div><div class='hunk'>@@ -20,6 +20,22 @@</div><div class='ctx'> #include &lt;asm/stack_pointer.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> </div><div class='add'>+enum kunwind_source {</div><div class='add'>+	KUNWIND_SOURCE_UNKNOWN,</div><div class='add'>+	KUNWIND_SOURCE_FRAME,</div><div class='add'>+	KUNWIND_SOURCE_CALLER,</div><div class='add'>+	KUNWIND_SOURCE_TASK,</div><div class='add'>+	KUNWIND_SOURCE_REGS_PC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union unwind_flags {</div><div class='add'>+	unsigned long	all;</div><div class='add'>+	struct {</div><div class='add'>+		unsigned long	fgraph : 1,</div><div class='add'>+				kretprobe : 1;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Kernel unwind state</div><div class='ctx'>  *</div><div class='hunk'>@@ -37,6 +53,9 @@ struct kunwind_state {</div><div class='ctx'> #ifdef CONFIG_KRETPROBES</div><div class='ctx'> 	struct llist_node *kr_cur;</div><div class='ctx'> #endif</div><div class='add'>+	enum kunwind_source source;</div><div class='add'>+	union unwind_flags flags;</div><div class='add'>+	struct pt_regs *regs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='hunk'>@@ -45,6 +64,9 @@ kunwind_init(struct kunwind_state *state,</div><div class='ctx'> {</div><div class='ctx'> 	unwind_init_common(&amp;state-&gt;common);</div><div class='ctx'> 	state-&gt;task = task;</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_UNKNOWN;</div><div class='add'>+	state-&gt;flags.all = 0;</div><div class='add'>+	state-&gt;regs = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -60,8 +82,10 @@ kunwind_init_from_regs(struct kunwind_state *state,</div><div class='ctx'> {</div><div class='ctx'> 	kunwind_init(state, current);</div><div class='ctx'> </div><div class='add'>+	state-&gt;regs = regs;</div><div class='ctx'> 	state-&gt;common.fp = regs-&gt;regs[29];</div><div class='ctx'> 	state-&gt;common.pc = regs-&gt;pc;</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_REGS_PC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -79,6 +103,7 @@ kunwind_init_from_caller(struct kunwind_state *state)</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;common.fp = (unsigned long)__builtin_frame_address(1);</div><div class='ctx'> 	state-&gt;common.pc = (unsigned long)__builtin_return_address(0);</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_CALLER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -99,6 +124,7 @@ kunwind_init_from_task(struct kunwind_state *state,</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;common.fp = thread_saved_fp(task);</div><div class='ctx'> 	state-&gt;common.pc = thread_saved_pc(task);</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_TASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline int</div><div class='hunk'>@@ -111,9 +137,12 @@ kunwind_recover_return_address(struct kunwind_state *state)</div><div class='ctx'> 		orig_pc = ftrace_graph_ret_addr(state-&gt;task, &amp;state-&gt;graph_idx,</div><div class='ctx'> 						state-&gt;common.pc,</div><div class='ctx'> 						(void *)state-&gt;common.fp);</div><div class='del'>-		if (WARN_ON_ONCE(state-&gt;common.pc == orig_pc))</div><div class='add'>+		if (state-&gt;common.pc == orig_pc) {</div><div class='add'>+			WARN_ON_ONCE(state-&gt;task == current);</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 		state-&gt;common.pc = orig_pc;</div><div class='add'>+		state-&gt;flags.fgraph = 1;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='ctx'> </div><div class='hunk'>@@ -123,13 +152,98 @@ kunwind_recover_return_address(struct kunwind_state *state)</div><div class='ctx'> 		orig_pc = kretprobe_find_ret_addr(state-&gt;task,</div><div class='ctx'> 						  (void *)state-&gt;common.fp,</div><div class='ctx'> 						  &amp;state-&gt;kr_cur);</div><div class='add'>+		if (!orig_pc)</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		state-&gt;common.pc = orig_pc;</div><div class='add'>+		state-&gt;flags.kretprobe = 1;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_KRETPROBES */</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline</div><div class='add'>+int kunwind_next_regs_pc(struct kunwind_state *state)</div><div class='add'>+{</div><div class='add'>+	struct stack_info *info;</div><div class='add'>+	unsigned long fp = state-&gt;common.fp;</div><div class='add'>+	struct pt_regs *regs;</div><div class='add'>+</div><div class='add'>+	regs = container_of((u64 *)fp, struct pt_regs, stackframe.record.fp);</div><div class='add'>+</div><div class='add'>+	info = unwind_find_stack(&amp;state-&gt;common, (unsigned long)regs, sizeof(*regs));</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unwind_consume_stack(&amp;state-&gt;common, info, (unsigned long)regs,</div><div class='add'>+			     sizeof(*regs));</div><div class='add'>+</div><div class='add'>+	state-&gt;regs = regs;</div><div class='add'>+	state-&gt;common.pc = regs-&gt;pc;</div><div class='add'>+	state-&gt;common.fp = regs-&gt;regs[29];</div><div class='add'>+	state-&gt;regs = NULL;</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_REGS_PC;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline int</div><div class='add'>+kunwind_next_frame_record_meta(struct kunwind_state *state)</div><div class='add'>+{</div><div class='add'>+	struct task_struct *tsk = state-&gt;task;</div><div class='add'>+	unsigned long fp = state-&gt;common.fp;</div><div class='add'>+	struct frame_record_meta *meta;</div><div class='add'>+	struct stack_info *info;</div><div class='add'>+</div><div class='add'>+	info = unwind_find_stack(&amp;state-&gt;common, fp, sizeof(*meta));</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	meta = (struct frame_record_meta *)fp;</div><div class='add'>+	switch (READ_ONCE(meta-&gt;type)) {</div><div class='add'>+	case FRAME_META_TYPE_FINAL:</div><div class='add'>+		if (meta == &amp;task_pt_regs(tsk)-&gt;stackframe)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+		WARN_ON_ONCE(tsk == current);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case FRAME_META_TYPE_PT_REGS:</div><div class='add'>+		return kunwind_next_regs_pc(state);</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(tsk == current);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline int</div><div class='add'>+kunwind_next_frame_record(struct kunwind_state *state)</div><div class='add'>+{</div><div class='add'>+	unsigned long fp = state-&gt;common.fp;</div><div class='add'>+	struct frame_record *record;</div><div class='add'>+	struct stack_info *info;</div><div class='add'>+	unsigned long new_fp, new_pc;</div><div class='add'>+</div><div class='add'>+	if (fp &amp; 0x7)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	info = unwind_find_stack(&amp;state-&gt;common, fp, sizeof(*record));</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	record = (struct frame_record *)fp;</div><div class='add'>+	new_fp = READ_ONCE(record-&gt;fp);</div><div class='add'>+	new_pc = READ_ONCE(record-&gt;lr);</div><div class='add'>+</div><div class='add'>+	if (!new_fp &amp;&amp; !new_pc)</div><div class='add'>+		return kunwind_next_frame_record_meta(state);</div><div class='add'>+</div><div class='add'>+	unwind_consume_stack(&amp;state-&gt;common, info, fp, sizeof(*record));</div><div class='add'>+</div><div class='add'>+	state-&gt;common.fp = new_fp;</div><div class='add'>+	state-&gt;common.pc = new_pc;</div><div class='add'>+	state-&gt;source = KUNWIND_SOURCE_FRAME;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Unwind from one frame record (A) to the next frame record (B).</div><div class='ctx'>  *</div><div class='hunk'>@@ -140,15 +254,21 @@ kunwind_recover_return_address(struct kunwind_state *state)</div><div class='ctx'> static __always_inline int</div><div class='ctx'> kunwind_next(struct kunwind_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *tsk = state-&gt;task;</div><div class='del'>-	unsigned long fp = state-&gt;common.fp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Final frame; nothing to unwind */</div><div class='del'>-	if (fp == (unsigned long)task_pt_regs(tsk)-&gt;stackframe)</div><div class='del'>-		return -ENOENT;</div><div class='add'>+	state-&gt;flags.all = 0;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;source) {</div><div class='add'>+	case KUNWIND_SOURCE_FRAME:</div><div class='add'>+	case KUNWIND_SOURCE_CALLER:</div><div class='add'>+	case KUNWIND_SOURCE_TASK:</div><div class='add'>+	case KUNWIND_SOURCE_REGS_PC:</div><div class='add'>+		err = kunwind_next_frame_record(state);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = unwind_next_frame_record(&amp;state-&gt;common);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -159,21 +279,24 @@ kunwind_next(struct kunwind_state *state)</div><div class='ctx'> </div><div class='ctx'> typedef bool (*kunwind_consume_fn)(const struct kunwind_state *state, void *cookie);</div><div class='ctx'> </div><div class='del'>-static __always_inline void</div><div class='add'>+static __always_inline int</div><div class='ctx'> do_kunwind(struct kunwind_state *state, kunwind_consume_fn consume_state,</div><div class='ctx'> 	   void *cookie)</div><div class='ctx'> {</div><div class='del'>-	if (kunwind_recover_return_address(state))</div><div class='del'>-		return;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	while (1) {</div><div class='del'>-		int ret;</div><div class='add'>+	ret = kunwind_recover_return_address(state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='add'>+	while (1) {</div><div class='ctx'> 		if (!consume_state(state, cookie))</div><div class='del'>-			break;</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		ret = kunwind_next(state);</div><div class='add'>+		if (ret == -ENOENT)</div><div class='add'>+			return 0;</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			break;</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +329,7 @@ do_kunwind(struct kunwind_state *state, kunwind_consume_fn consume_state,</div><div class='ctx'> 			: stackinfo_get_unknown();		\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='del'>-static __always_inline void</div><div class='add'>+static __always_inline int</div><div class='ctx'> kunwind_stack_walk(kunwind_consume_fn consume_state,</div><div class='ctx'> 		   void *cookie, struct task_struct *task,</div><div class='ctx'> 		   struct pt_regs *regs)</div><div class='hunk'>@@ -214,10 +337,8 @@ kunwind_stack_walk(kunwind_consume_fn consume_state,</div><div class='ctx'> 	struct stack_info stacks[] = {</div><div class='ctx'> 		stackinfo_get_task(task),</div><div class='ctx'> 		STACKINFO_CPU(irq),</div><div class='del'>-#if defined(CONFIG_VMAP_STACK)</div><div class='ctx'> 		STACKINFO_CPU(overflow),</div><div class='del'>-#endif</div><div class='del'>-#if defined(CONFIG_VMAP_STACK) &amp;&amp; defined(CONFIG_ARM_SDE_INTERFACE)</div><div class='add'>+#if defined(CONFIG_ARM_SDE_INTERFACE)</div><div class='ctx'> 		STACKINFO_SDEI(normal),</div><div class='ctx'> 		STACKINFO_SDEI(critical),</div><div class='ctx'> #endif</div><div class='hunk'>@@ -234,7 +355,7 @@ kunwind_stack_walk(kunwind_consume_fn consume_state,</div><div class='ctx'> </div><div class='ctx'> 	if (regs) {</div><div class='ctx'> 		if (task != current)</div><div class='del'>-			return;</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		kunwind_init_from_regs(&amp;state, regs);</div><div class='ctx'> 	} else if (task == current) {</div><div class='ctx'> 		kunwind_init_from_caller(&amp;state);</div><div class='hunk'>@@ -242,7 +363,7 @@ kunwind_stack_walk(kunwind_consume_fn consume_state,</div><div class='ctx'> 		kunwind_init_from_task(&amp;state, task);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	do_kunwind(&amp;state, consume_state, cookie);</div><div class='add'>+	return do_kunwind(&amp;state, consume_state, cookie);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct kunwind_consume_entry_data {</div><div class='hunk'>@@ -269,6 +390,36 @@ noinline noinstr void arch_stack_walk(stack_trace_consume_fn consume_entry,</div><div class='ctx'> 	kunwind_stack_walk(arch_kunwind_consume_entry, &amp;data, task, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline bool</div><div class='add'>+arch_reliable_kunwind_consume_entry(const struct kunwind_state *state, void *cookie)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * At an exception boundary we can reliably consume the saved PC. We do</div><div class='add'>+	 * not know whether the LR was live when the exception was taken, and</div><div class='add'>+	 * so we cannot perform the next unwind step reliably.</div><div class='add'>+	 *</div><div class='add'>+	 * All that matters is whether the *entire* unwind is reliable, so give</div><div class='add'>+	 * up as soon as we hit an exception boundary.</div><div class='add'>+	 */</div><div class='add'>+	if (state-&gt;source == KUNWIND_SOURCE_REGS_PC)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return arch_kunwind_consume_entry(state, cookie);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+noinline noinstr int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry,</div><div class='add'>+					      void *cookie,</div><div class='add'>+					      struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	struct kunwind_consume_entry_data data = {</div><div class='add'>+		.consume_entry = consume_entry,</div><div class='add'>+		.cookie = cookie,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return kunwind_stack_walk(arch_reliable_kunwind_consume_entry, &amp;data,</div><div class='add'>+				  task, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct bpf_unwind_consume_entry_data {</div><div class='ctx'> 	bool (*consume_entry)(void *cookie, u64 ip, u64 sp, u64 fp);</div><div class='ctx'> 	void *cookie;</div><div class='hunk'>@@ -294,10 +445,32 @@ noinline noinstr void arch_bpf_stack_walk(bool (*consume_entry)(void *cookie, u6</div><div class='ctx'> 	kunwind_stack_walk(arch_bpf_unwind_consume_entry, &amp;data, current, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dump_backtrace_entry(void *arg, unsigned long where)</div><div class='add'>+static const char *state_source_string(const struct kunwind_state *state)</div><div class='add'>+{</div><div class='add'>+	switch (state-&gt;source) {</div><div class='add'>+	case KUNWIND_SOURCE_FRAME:	return NULL;</div><div class='add'>+	case KUNWIND_SOURCE_CALLER:	return "C";</div><div class='add'>+	case KUNWIND_SOURCE_TASK:	return "T";</div><div class='add'>+	case KUNWIND_SOURCE_REGS_PC:	return "P";</div><div class='add'>+	default:			return "U";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dump_backtrace_entry(const struct kunwind_state *state, void *arg)</div><div class='ctx'> {</div><div class='add'>+	const char *source = state_source_string(state);</div><div class='add'>+	union unwind_flags flags = state-&gt;flags;</div><div class='add'>+	bool has_info = source || flags.all;</div><div class='ctx'> 	char *loglvl = arg;</div><div class='del'>-	printk("%s %pSb\n", loglvl, (void *)where);</div><div class='add'>+</div><div class='add'>+	printk("%s %pSb%s%s%s%s%s\n", loglvl,</div><div class='add'>+		(void *)state-&gt;common.pc,</div><div class='add'>+		has_info ? " (" : "",</div><div class='add'>+		source ? source : "",</div><div class='add'>+		flags.fgraph ? "F" : "",</div><div class='add'>+		flags.kretprobe ? "K" : "",</div><div class='add'>+		has_info ? ")" : "");</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -316,7 +489,7 @@ void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	printk("%sCall trace:\n", loglvl);</div><div class='del'>-	arch_stack_walk(dump_backtrace_entry, (void *)loglvl, tsk, regs);</div><div class='add'>+	kunwind_stack_walk(dump_backtrace_entry, (void *)loglvl, tsk, regs);</div><div class='ctx'> </div><div class='ctx'> 	put_task_stack(tsk);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c<br/>index c442fcec6b9e..aba7ca6bca2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/syscall.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/syscall.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/syscall.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/syscall.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ static void invoke_syscall(struct pt_regs *regs, unsigned int scno,</div><div class='ctx'> </div><div class='ctx'> 	add_random_kstack_offset();</div><div class='ctx'> </div><div class='del'>-	if (scno &lt; sc_nr) {</div><div class='add'>+	if (likely(scno &lt; sc_nr)) {</div><div class='ctx'> 		syscall_fn_t syscall_fn;</div><div class='ctx'> 		syscall_fn = syscall_table[array_index_nospec(scno, sc_nr)];</div><div class='ctx'> 		ret = __invoke_syscall(regs, syscall_fn);</div><div class='head'>diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c<br/>index 1a2c72f3e7f8..5d07ee85bdae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/topology.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/topology.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/topology.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/topology.c</a></div><div class='hunk'>@@ -15,8 +15,11 @@</div><div class='ctx'> #include &lt;linux/arch_topology.h&gt;</div><div class='ctx'> #include &lt;linux/cacheinfo.h&gt;</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='add'>+#include &lt;linux/cpu_smt.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/sched/isolation.h&gt;</div><div class='add'>+#include &lt;linux/xarray.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='hunk'>@@ -37,17 +40,28 @@ static bool __init acpi_cpu_is_threaded(int cpu)</div><div class='ctx'> 	return !!is_threaded;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct cpu_smt_info {</div><div class='add'>+	unsigned int thread_num;</div><div class='add'>+	int core_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Propagate the topology information of the processor_topology_node tree to the</div><div class='ctx'>  * cpu_topology array.</div><div class='ctx'>  */</div><div class='ctx'> int __init parse_acpi_topology(void)</div><div class='ctx'> {</div><div class='add'>+	unsigned int max_smt_thread_num = 1;</div><div class='add'>+	struct cpu_smt_info *entry;</div><div class='add'>+	struct xarray hetero_cpu;</div><div class='add'>+	unsigned long hetero_id;</div><div class='ctx'> 	int cpu, topology_id;</div><div class='ctx'> </div><div class='ctx'> 	if (acpi_disabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	xa_init(&amp;hetero_cpu);</div><div class='add'>+</div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		topology_id = find_acpi_cpu_topology(cpu, 0);</div><div class='ctx'> 		if (topology_id &lt; 0)</div><div class='hunk'>@@ -57,6 +71,34 @@ int __init parse_acpi_topology(void)</div><div class='ctx'> 			cpu_topology[cpu].thread_id = topology_id;</div><div class='ctx'> 			topology_id = find_acpi_cpu_topology(cpu, 1);</div><div class='ctx'> 			cpu_topology[cpu].core_id   = topology_id;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * In the PPTT, CPUs below a node with the 'identical</div><div class='add'>+			 * implementation' flag have the same number of threads.</div><div class='add'>+			 * Count the number of threads for only one CPU (i.e.</div><div class='add'>+			 * one core_id) among those with the same hetero_id.</div><div class='add'>+			 * See the comment of find_acpi_cpu_topology_hetero_id()</div><div class='add'>+			 * for more details.</div><div class='add'>+			 *</div><div class='add'>+			 * One entry is created for each node having:</div><div class='add'>+			 * - the 'identical implementation' flag</div><div class='add'>+			 * - its parent not having the flag</div><div class='add'>+			 */</div><div class='add'>+			hetero_id = find_acpi_cpu_topology_hetero_id(cpu);</div><div class='add'>+			entry = xa_load(&amp;hetero_cpu, hetero_id);</div><div class='add'>+			if (!entry) {</div><div class='add'>+				entry = kzalloc(sizeof(*entry), GFP_KERNEL);</div><div class='add'>+				WARN_ON_ONCE(!entry);</div><div class='add'>+</div><div class='add'>+				if (entry) {</div><div class='add'>+					entry-&gt;core_id = topology_id;</div><div class='add'>+					entry-&gt;thread_num = 1;</div><div class='add'>+					xa_store(&amp;hetero_cpu, hetero_id,</div><div class='add'>+						 entry, GFP_KERNEL);</div><div class='add'>+				}</div><div class='add'>+			} else if (entry-&gt;core_id == topology_id) {</div><div class='add'>+				entry-&gt;thread_num++;</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			cpu_topology[cpu].thread_id  = -1;</div><div class='ctx'> 			cpu_topology[cpu].core_id    = topology_id;</div><div class='hunk'>@@ -67,6 +109,19 @@ int __init parse_acpi_topology(void)</div><div class='ctx'> 		cpu_topology[cpu].package_id = topology_id;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This is a short loop since the number of XArray elements is the</div><div class='add'>+	 * number of heterogeneous CPU clusters. On a homogeneous system</div><div class='add'>+	 * there's only one entry in the XArray.</div><div class='add'>+	 */</div><div class='add'>+	xa_for_each(&amp;hetero_cpu, hetero_id, entry) {</div><div class='add'>+		max_smt_thread_num = max(max_smt_thread_num, entry-&gt;thread_num);</div><div class='add'>+		xa_erase(&amp;hetero_cpu, hetero_id);</div><div class='add'>+		kfree(entry);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num);</div><div class='add'>+	xa_destroy(&amp;hetero_cpu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -88,18 +143,28 @@ int __init parse_acpi_topology(void)</div><div class='ctx'>  * initialized.</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale) =  1UL &lt;&lt; (2 * SCHED_CAPACITY_SHIFT);</div><div class='del'>-static DEFINE_PER_CPU(u64, arch_const_cycles_prev);</div><div class='del'>-static DEFINE_PER_CPU(u64, arch_core_cycles_prev);</div><div class='ctx'> static cpumask_var_t amu_fie_cpus;</div><div class='ctx'> </div><div class='add'>+struct amu_cntr_sample {</div><div class='add'>+	u64		arch_const_cycles_prev;</div><div class='add'>+	u64		arch_core_cycles_prev;</div><div class='add'>+	unsigned long	last_scale_update;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU_SHARED_ALIGNED(struct amu_cntr_sample, cpu_amu_samples);</div><div class='add'>+</div><div class='ctx'> void update_freq_counters_refs(void)</div><div class='ctx'> {</div><div class='del'>-	this_cpu_write(arch_core_cycles_prev, read_corecnt());</div><div class='del'>-	this_cpu_write(arch_const_cycles_prev, read_constcnt());</div><div class='add'>+	struct amu_cntr_sample *amu_sample = this_cpu_ptr(&amp;cpu_amu_samples);</div><div class='add'>+</div><div class='add'>+	amu_sample-&gt;arch_core_cycles_prev = read_corecnt();</div><div class='add'>+	amu_sample-&gt;arch_const_cycles_prev = read_constcnt();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool freq_counters_valid(int cpu)</div><div class='ctx'> {</div><div class='add'>+	struct amu_cntr_sample *amu_sample = per_cpu_ptr(&amp;cpu_amu_samples, cpu);</div><div class='add'>+</div><div class='ctx'> 	if ((cpu &gt;= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -108,8 +173,8 @@ static inline bool freq_counters_valid(int cpu)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!per_cpu(arch_const_cycles_prev, cpu) ||</div><div class='del'>-		     !per_cpu(arch_core_cycles_prev, cpu))) {</div><div class='add'>+	if (unlikely(!amu_sample-&gt;arch_const_cycles_prev ||</div><div class='add'>+		     !amu_sample-&gt;arch_core_cycles_prev)) {</div><div class='ctx'> 		pr_debug("CPU%d: cycle counters are not enabled.\n", cpu);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -152,17 +217,22 @@ void freq_inv_set_max_ratio(int cpu, u64 max_rate)</div><div class='ctx'> </div><div class='ctx'> static void amu_scale_freq_tick(void)</div><div class='ctx'> {</div><div class='add'>+	struct amu_cntr_sample *amu_sample = this_cpu_ptr(&amp;cpu_amu_samples);</div><div class='ctx'> 	u64 prev_core_cnt, prev_const_cnt;</div><div class='ctx'> 	u64 core_cnt, const_cnt, scale;</div><div class='ctx'> </div><div class='del'>-	prev_const_cnt = this_cpu_read(arch_const_cycles_prev);</div><div class='del'>-	prev_core_cnt = this_cpu_read(arch_core_cycles_prev);</div><div class='add'>+	prev_const_cnt = amu_sample-&gt;arch_const_cycles_prev;</div><div class='add'>+	prev_core_cnt = amu_sample-&gt;arch_core_cycles_prev;</div><div class='ctx'> </div><div class='ctx'> 	update_freq_counters_refs();</div><div class='ctx'> </div><div class='del'>-	const_cnt = this_cpu_read(arch_const_cycles_prev);</div><div class='del'>-	core_cnt = this_cpu_read(arch_core_cycles_prev);</div><div class='add'>+	const_cnt = amu_sample-&gt;arch_const_cycles_prev;</div><div class='add'>+	core_cnt = amu_sample-&gt;arch_core_cycles_prev;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This should not happen unless the AMUs have been reset and the</div><div class='add'>+	 * counter values have not been restored - unlikely</div><div class='add'>+	 */</div><div class='ctx'> 	if (unlikely(core_cnt &lt;= prev_core_cnt ||</div><div class='ctx'> 		     const_cnt &lt;= prev_const_cnt))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -182,6 +252,8 @@ static void amu_scale_freq_tick(void)</div><div class='ctx'> </div><div class='ctx'> 	scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE);</div><div class='ctx'> 	this_cpu_write(arch_freq_scale, (unsigned long)scale);</div><div class='add'>+</div><div class='add'>+	amu_sample-&gt;last_scale_update = jiffies;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct scale_freq_data amu_sfd = {</div><div class='hunk'>@@ -189,17 +261,114 @@ static struct scale_freq_data amu_sfd = {</div><div class='ctx'> 	.set_freq_scale = amu_scale_freq_tick,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static __always_inline bool amu_fie_cpu_supported(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	return cpumask_available(amu_fie_cpus) &amp;&amp;</div><div class='add'>+		cpumask_test_cpu(cpu, amu_fie_cpus);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_cpu_idle_enter(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	if (!amu_fie_cpu_supported(cpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Kick in AMU update but only if one has not happened already */</div><div class='add'>+	if (housekeeping_cpu(cpu, HK_TYPE_TICK) &amp;&amp;</div><div class='add'>+	    time_is_before_jiffies(per_cpu(cpu_amu_samples.last_scale_update, cpu)))</div><div class='add'>+		amu_scale_freq_tick();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define AMU_SAMPLE_EXP_MS	20</div><div class='add'>+</div><div class='add'>+int arch_freq_get_on_cpu(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct amu_cntr_sample *amu_sample;</div><div class='add'>+	unsigned int start_cpu = cpu;</div><div class='add'>+	unsigned long last_update;</div><div class='add'>+	unsigned int freq = 0;</div><div class='add'>+	u64 scale;</div><div class='add'>+</div><div class='add'>+	if (!amu_fie_cpu_supported(cpu) || !arch_scale_freq_ref(cpu))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+</div><div class='add'>+		amu_sample = per_cpu_ptr(&amp;cpu_amu_samples, cpu);</div><div class='add'>+</div><div class='add'>+		last_update = amu_sample-&gt;last_scale_update;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For those CPUs that are in full dynticks mode, or those that have</div><div class='add'>+		 * not seen tick for a while, try an alternative source for the counters</div><div class='add'>+		 * (and thus freq scale), if available, for given policy: this boils</div><div class='add'>+		 * down to identifying an active cpu within the same freq domain, if any.</div><div class='add'>+		 */</div><div class='add'>+		if (!housekeeping_cpu(cpu, HK_TYPE_TICK) ||</div><div class='add'>+		    time_is_before_jiffies(last_update + msecs_to_jiffies(AMU_SAMPLE_EXP_MS))) {</div><div class='add'>+			struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='add'>+			int ref_cpu;</div><div class='add'>+</div><div class='add'>+			if (!policy)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			if (!cpumask_intersects(policy-&gt;related_cpus,</div><div class='add'>+						housekeeping_cpumask(HK_TYPE_TICK))) {</div><div class='add'>+				cpufreq_cpu_put(policy);</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			for_each_cpu_wrap(ref_cpu, policy-&gt;cpus, cpu + 1) {</div><div class='add'>+				if (ref_cpu == start_cpu) {</div><div class='add'>+					/* Prevent verifying same CPU twice */</div><div class='add'>+					ref_cpu = nr_cpu_ids;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+				if (!idle_cpu(ref_cpu))</div><div class='add'>+					break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			cpufreq_cpu_put(policy);</div><div class='add'>+</div><div class='add'>+			if (ref_cpu &gt;= nr_cpu_ids)</div><div class='add'>+				/* No alternative to pull info from */</div><div class='add'>+				return -EAGAIN;</div><div class='add'>+</div><div class='add'>+			cpu = ref_cpu;</div><div class='add'>+		} else {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Reversed computation to the one used to determine</div><div class='add'>+	 * the arch_freq_scale value</div><div class='add'>+	 * (see amu_scale_freq_tick for details)</div><div class='add'>+	 */</div><div class='add'>+	scale = arch_scale_freq_capacity(cpu);</div><div class='add'>+	freq = scale * arch_scale_freq_ref(cpu);</div><div class='add'>+	freq &gt;&gt;= SCHED_CAPACITY_SHIFT;</div><div class='add'>+	return freq;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void amu_fie_setup(const struct cpumask *cpus)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	/* We are already set since the last insmod of cpufreq driver */</div><div class='del'>-	if (unlikely(cpumask_subset(cpus, amu_fie_cpus)))</div><div class='add'>+	if (cpumask_available(amu_fie_cpus) &amp;&amp;</div><div class='add'>+	    unlikely(cpumask_subset(cpus, amu_fie_cpus)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for_each_cpu(cpu, cpus) {</div><div class='add'>+	for_each_cpu(cpu, cpus)</div><div class='ctx'> 		if (!freq_counters_valid(cpu))</div><div class='ctx'> 			return;</div><div class='add'>+</div><div class='add'>+	if (!cpumask_available(amu_fie_cpus) &amp;&amp;</div><div class='add'>+	    !zalloc_cpumask_var(&amp;amu_fie_cpus, GFP_KERNEL)) {</div><div class='add'>+		WARN_ONCE(1, "Failed to allocate FIE cpumask for CPUs[%*pbl]\n",</div><div class='add'>+			  cpumask_pr_args(cpus));</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cpumask_or(amu_fie_cpus, amu_fie_cpus, cpus);</div><div class='hunk'>@@ -237,17 +406,8 @@ static struct notifier_block init_amu_fie_notifier = {</div><div class='ctx'> </div><div class='ctx'> static int __init init_amu_fie(void)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;amu_fie_cpus, GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = cpufreq_register_notifier(&amp;init_amu_fie_notifier,</div><div class='add'>+	return cpufreq_register_notifier(&amp;init_amu_fie_notifier,</div><div class='ctx'> 					CPUFREQ_POLICY_NOTIFIER);</div><div class='del'>-	if (ret)</div><div class='del'>-		free_cpumask_var(amu_fie_cpus);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> core_initcall(init_amu_fie);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c<br/>index 563cbce11126..681939ef5d16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/traps.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> #include &lt;asm/extable.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/kprobes.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/stack_pointer.h&gt;</div><div class='hunk'>@@ -149,19 +149,18 @@ pstate_check_t * const aarch32_opcode_cond_checks[16] = {</div><div class='ctx'> </div><div class='ctx'> int show_unhandled_signals = 0;</div><div class='ctx'> </div><div class='del'>-static void dump_kernel_instr(const char *lvl, struct pt_regs *regs)</div><div class='add'>+void dump_kernel_instr(unsigned long kaddr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long addr = instruction_pointer(regs);</div><div class='ctx'> 	char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (user_mode(regs))</div><div class='add'>+	if (!is_ttbr1_addr(kaddr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = -4; i &lt; 1; i++) {</div><div class='ctx'> 		unsigned int val, bad;</div><div class='ctx'> </div><div class='del'>-		bad = aarch64_insn_read(&amp;((u32 *)addr)[i], &amp;val);</div><div class='add'>+		bad = aarch64_insn_read(&amp;((u32 *)kaddr)[i], &amp;val);</div><div class='ctx'> </div><div class='ctx'> 		if (!bad)</div><div class='ctx'> 			p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);</div><div class='hunk'>@@ -169,25 +168,18 @@ static void dump_kernel_instr(const char *lvl, struct pt_regs *regs)</div><div class='ctx'> 			p += sprintf(p, i == 0 ? "(????????) " : "???????? ");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk("%sCode: %s\n", lvl, str);</div><div class='add'>+	printk(KERN_EMERG "Code: %s\n", str);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PREEMPT</div><div class='del'>-#define S_PREEMPT " PREEMPT"</div><div class='del'>-#elif defined(CONFIG_PREEMPT_RT)</div><div class='del'>-#define S_PREEMPT " PREEMPT_RT"</div><div class='del'>-#else</div><div class='del'>-#define S_PREEMPT ""</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define S_SMP " SMP"</div><div class='ctx'> </div><div class='ctx'> static int __die(const char *str, long err, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	static int die_counter;</div><div class='ctx'> 	int ret;</div><div class='add'>+	unsigned long addr = instruction_pointer(regs);</div><div class='ctx'> </div><div class='del'>-	pr_emerg("Internal error: %s: %016lx [#%d]" S_PREEMPT S_SMP "\n",</div><div class='add'>+	pr_emerg("Internal error: %s: %016lx [#%d] " S_SMP "\n",</div><div class='ctx'> 		 str, err, ++die_counter);</div><div class='ctx'> </div><div class='ctx'> 	/* trap and error numbers are mostly meaningless on ARM */</div><div class='hunk'>@@ -198,7 +190,10 @@ static int __die(const char *str, long err, struct pt_regs *regs)</div><div class='ctx'> 	print_modules();</div><div class='ctx'> 	show_regs(regs);</div><div class='ctx'> </div><div class='del'>-	dump_kernel_instr(KERN_EMERG, regs);</div><div class='add'>+	if (user_mode(regs))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dump_kernel_instr(addr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -462,7 +457,7 @@ void do_el0_undef(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	u32 insn;</div><div class='ctx'> </div><div class='ctx'> 	/* check for AArch32 breakpoint instructions */</div><div class='del'>-	if (!aarch32_break_handler(regs))</div><div class='add'>+	if (try_handle_aarch32_break(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (user_insn_read(regs, &amp;insn))</div><div class='hunk'>@@ -506,6 +501,16 @@ void do_el1_bti(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	die("Oops - BTI", regs, esr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void do_el0_gcs(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	force_signal_inject(SIGSEGV, SEGV_CPERR, regs-&gt;pc, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void do_el1_gcs(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	die("Oops - GCS", regs, esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void do_el0_fpac(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	force_signal_inject(SIGILL, ILL_ILLOPN, regs-&gt;pc, esr);</div><div class='hunk'>@@ -531,6 +536,13 @@ void do_el0_mops(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	user_fastforward_single_step(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void do_el1_mops(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	arm64_mops_reset_regs(&amp;regs-&gt;user_regs, esr);</div><div class='add'>+</div><div class='add'>+	kernel_fastforward_single_step(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define __user_cache_maint(insn, address, res)			\</div><div class='ctx'> 	if (address &gt;= TASK_SIZE_MAX) {				\</div><div class='ctx'> 		res = -EFAULT;					\</div><div class='hunk'>@@ -852,6 +864,7 @@ static const char *esr_class_str[] = {</div><div class='ctx'> 	[ESR_ELx_EC_MOPS]		= "MOPS",</div><div class='ctx'> 	[ESR_ELx_EC_FP_EXC32]		= "FP (AArch32)",</div><div class='ctx'> 	[ESR_ELx_EC_FP_EXC64]		= "FP (AArch64)",</div><div class='add'>+	[ESR_ELx_EC_GCS]		= "Guarded Control Stack",</div><div class='ctx'> 	[ESR_ELx_EC_SERROR]		= "SError",</div><div class='ctx'> 	[ESR_ELx_EC_BREAKPT_LOW]	= "Breakpoint (lower EL)",</div><div class='ctx'> 	[ESR_ELx_EC_BREAKPT_CUR]	= "Breakpoint (current EL)",</div><div class='hunk'>@@ -884,8 +897,6 @@ void bad_el0_sync(struct pt_regs *regs, int reason, unsigned long esr)</div><div class='ctx'> 			      "Bad EL0 synchronous exception");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_VMAP_STACK</div><div class='del'>-</div><div class='ctx'> DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)</div><div class='ctx'> 	__aligned(16);</div><div class='ctx'> </div><div class='hunk'>@@ -917,10 +928,10 @@ void __noreturn panic_bad_stack(struct pt_regs *regs, unsigned long esr, unsigne</div><div class='ctx'> 	nmi_panic(NULL, "kernel stack overflow");</div><div class='ctx'> 	cpu_park_loop();</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> void __noreturn arm64_serror_panic(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='add'>+	add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK);</div><div class='ctx'> 	console_verbose();</div><div class='ctx'> </div><div class='ctx'> 	pr_crit("SError Interrupt on CPU%d, code 0x%016lx -- %s\n",</div><div class='hunk'>@@ -977,7 +988,7 @@ void do_serror(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> int is_valid_bugaddr(unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * bug_handler() only called for BRK #BUG_BRK_IMM.</div><div class='add'>+	 * bug_brk_handler() only called for BRK #BUG_BRK_IMM.</div><div class='ctx'> 	 * So the answer is trivial -- any spurious instances with no</div><div class='ctx'> 	 * bug table entry will be rejected by report_bug() and passed</div><div class='ctx'> 	 * back to the debug-monitors code and handled as a fatal</div><div class='hunk'>@@ -987,7 +998,7 @@ int is_valid_bugaddr(unsigned long addr)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int bug_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int bug_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	switch (report_bug(regs-&gt;pc, regs)) {</div><div class='ctx'> 	case BUG_TRAP_TYPE_BUG:</div><div class='hunk'>@@ -1007,13 +1018,8 @@ static int bug_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct break_hook bug_break_hook = {</div><div class='del'>-	.fn = bug_handler,</div><div class='del'>-	.imm = BUG_BRK_IMM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='del'>-static int cfi_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='add'>+int cfi_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long target;</div><div class='ctx'> 	u32 type;</div><div class='hunk'>@@ -1036,15 +1042,9 @@ static int cfi_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_CFI */</div><div class='ctx'> </div><div class='del'>-static struct break_hook cfi_break_hook = {</div><div class='del'>-	.fn = cfi_handler,</div><div class='del'>-	.imm = CFI_BRK_IMM_BASE,</div><div class='del'>-	.mask = CFI_BRK_IMM_MASK,</div><div class='del'>-};</div><div class='del'>-#endif /* CONFIG_CFI_CLANG */</div><div class='del'>-</div><div class='del'>-static int reserved_fault_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int reserved_fault_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	pr_err("%s generated an invalid instruction at %pS!\n",</div><div class='ctx'> 		"Kernel text patching",</div><div class='hunk'>@@ -1054,11 +1054,6 @@ static int reserved_fault_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	return DBG_HOOK_ERROR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct break_hook fault_break_hook = {</div><div class='del'>-	.fn = reserved_fault_handler,</div><div class='del'>-	.imm = FAULT_BRK_IMM,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_KASAN_SW_TAGS</div><div class='ctx'> </div><div class='ctx'> #define KASAN_ESR_RECOVER	0x20</div><div class='hunk'>@@ -1066,7 +1061,7 @@ static struct break_hook fault_break_hook = {</div><div class='ctx'> #define KASAN_ESR_SIZE_MASK	0x0f</div><div class='ctx'> #define KASAN_ESR_SIZE(esr)	(1 &lt;&lt; ((esr) &amp; KASAN_ESR_SIZE_MASK))</div><div class='ctx'> </div><div class='del'>-static int kasan_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int kasan_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	bool recover = esr &amp; KASAN_ESR_RECOVER;</div><div class='ctx'> 	bool write = esr &amp; KASAN_ESR_WRITE;</div><div class='hunk'>@@ -1097,62 +1092,12 @@ static int kasan_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> 	arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct break_hook kasan_break_hook = {</div><div class='del'>-	.fn	= kasan_handler,</div><div class='del'>-	.imm	= KASAN_BRK_IMM,</div><div class='del'>-	.mask	= KASAN_BRK_MASK,</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_UBSAN_TRAP</div><div class='del'>-static int ubsan_handler(struct pt_regs *regs, unsigned long esr)</div><div class='add'>+int ubsan_brk_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	die(report_ubsan_failure(regs, esr &amp; UBSAN_BRK_MASK), regs, esr);</div><div class='add'>+	die(report_ubsan_failure(esr &amp; UBSAN_BRK_MASK), regs, esr);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct break_hook ubsan_break_hook = {</div><div class='del'>-	.fn	= ubsan_handler,</div><div class='del'>-	.imm	= UBSAN_BRK_IMM,</div><div class='del'>-	.mask	= UBSAN_BRK_MASK,</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial handler for AArch64 BRK exceptions</div><div class='del'>- * This handler only used until debug_traps_init().</div><div class='del'>- */</div><div class='del'>-int __init early_brk64(unsigned long addr, unsigned long esr,</div><div class='del'>-		struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='del'>-	if (esr_is_cfi_brk(esr))</div><div class='del'>-		return cfi_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_KASAN_SW_TAGS</div><div class='del'>-	if ((esr_brk_comment(esr) &amp; ~KASAN_BRK_MASK) == KASAN_BRK_IMM)</div><div class='del'>-		return kasan_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_UBSAN_TRAP</div><div class='del'>-	if ((esr_brk_comment(esr) &amp; ~UBSAN_BRK_MASK) == UBSAN_BRK_IMM)</div><div class='del'>-		return ubsan_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='del'>-#endif</div><div class='del'>-	return bug_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init trap_init(void)</div><div class='del'>-{</div><div class='del'>-	register_kernel_break_hook(&amp;bug_break_hook);</div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='del'>-	register_kernel_break_hook(&amp;cfi_break_hook);</div><div class='del'>-#endif</div><div class='del'>-	register_kernel_break_hook(&amp;fault_break_hook);</div><div class='del'>-#ifdef CONFIG_KASAN_SW_TAGS</div><div class='del'>-	register_kernel_break_hook(&amp;kasan_break_hook);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_UBSAN_TRAP</div><div class='del'>-	register_kernel_break_hook(&amp;ubsan_break_hook);</div><div class='del'>-#endif</div><div class='del'>-	debug_traps_init();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c<br/>index 706c9c3a7a50..78ddf6bdecad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vdso.c</a></div><div class='hunk'>@@ -18,8 +18,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/time_namespace.h&gt;</div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='add'>+#include &lt;linux/vdso_datastore.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> #include &lt;vdso/helpers.h&gt;</div><div class='hunk'>@@ -39,8 +38,6 @@ struct vdso_abi_info {</div><div class='ctx'> 	const char *vdso_code_start;</div><div class='ctx'> 	const char *vdso_code_end;</div><div class='ctx'> 	unsigned long vdso_pages;</div><div class='del'>-	/* Data Mapping */</div><div class='del'>-	struct vm_special_mapping *dm;</div><div class='ctx'> 	/* Code Mapping */</div><div class='ctx'> 	struct vm_special_mapping *cm;</div><div class='ctx'> };</div><div class='hunk'>@@ -60,12 +57,6 @@ static struct vdso_abi_info vdso_info[] __ro_after_init = {</div><div class='ctx'> #endif /* CONFIG_COMPAT_VDSO */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The vDSO data page.</div><div class='del'>- */</div><div class='del'>-static union vdso_data_store vdso_data_store __page_aligned_data;</div><div class='del'>-struct vdso_data *vdso_data = vdso_data_store.data;</div><div class='del'>-</div><div class='ctx'> static int vdso_mremap(const struct vm_special_mapping *sm,</div><div class='ctx'> 		struct vm_area_struct *new_vma)</div><div class='ctx'> {</div><div class='hunk'>@@ -107,75 +98,6 @@ static int __init __vdso_init(enum vdso_abi abi)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-struct vdso_data *arch_get_vdso_data(void *vvar_page)</div><div class='del'>-{</div><div class='del'>-	return (struct vdso_data *)(vvar_page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The vvar mapping contains data for a specific time namespace, so when a task</div><div class='del'>- * changes namespace we must unmap its vvar data for the old namespace.</div><div class='del'>- * Subsequent faults will map in data for the new namespace.</div><div class='del'>- *</div><div class='del'>- * For more details see timens_setup_vdso_data().</div><div class='del'>- */</div><div class='del'>-int vdso_join_timens(struct task_struct *task, struct time_namespace *ns)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = task-&gt;mm;</div><div class='del'>-	struct vm_area_struct *vma;</div><div class='del'>-	VMA_ITERATOR(vmi, mm, 0);</div><div class='del'>-</div><div class='del'>-	mmap_read_lock(mm);</div><div class='del'>-</div><div class='del'>-	for_each_vma(vmi, vma) {</div><div class='del'>-		if (vma_is_special_mapping(vma, vdso_info[VDSO_ABI_AA64].dm))</div><div class='del'>-			zap_vma_pages(vma);</div><div class='del'>-#ifdef CONFIG_COMPAT_VDSO</div><div class='del'>-		if (vma_is_special_mapping(vma, vdso_info[VDSO_ABI_AA32].dm))</div><div class='del'>-			zap_vma_pages(vma);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mmap_read_unlock(mm);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static vm_fault_t vvar_fault(const struct vm_special_mapping *sm,</div><div class='del'>-			     struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='del'>-{</div><div class='del'>-	struct page *timens_page = find_timens_vvar_page(vma);</div><div class='del'>-	unsigned long pfn;</div><div class='del'>-</div><div class='del'>-	switch (vmf-&gt;pgoff) {</div><div class='del'>-	case VVAR_DATA_PAGE_OFFSET:</div><div class='del'>-		if (timens_page)</div><div class='del'>-			pfn = page_to_pfn(timens_page);</div><div class='del'>-		else</div><div class='del'>-			pfn = sym_to_pfn(vdso_data);</div><div class='del'>-		break;</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	case VVAR_TIMENS_PAGE_OFFSET:</div><div class='del'>-		/*</div><div class='del'>-		 * If a task belongs to a time namespace then a namespace</div><div class='del'>-		 * specific VVAR is mapped with the VVAR_DATA_PAGE_OFFSET and</div><div class='del'>-		 * the real VVAR page is mapped with the VVAR_TIMENS_PAGE_OFFSET</div><div class='del'>-		 * offset.</div><div class='del'>-		 * See also the comment near timens_setup_vdso_data().</div><div class='del'>-		 */</div><div class='del'>-		if (!timens_page)</div><div class='del'>-			return VM_FAULT_SIGBUS;</div><div class='del'>-		pfn = sym_to_pfn(vdso_data);</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_TIME_NS */</div><div class='del'>-	default:</div><div class='del'>-		return VM_FAULT_SIGBUS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return vmf_insert_pfn(vma, vmf-&gt;address, pfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __setup_additional_pages(enum vdso_abi abi,</div><div class='ctx'> 				    struct mm_struct *mm,</div><div class='ctx'> 				    struct linux_binprm *bprm,</div><div class='hunk'>@@ -185,11 +107,11 @@ static int __setup_additional_pages(enum vdso_abi abi,</div><div class='ctx'> 	unsigned long gp_flags = 0;</div><div class='ctx'> 	void *ret;</div><div class='ctx'> </div><div class='del'>-	BUILD_BUG_ON(VVAR_NR_PAGES != __VVAR_PAGES);</div><div class='add'>+	BUILD_BUG_ON(VDSO_NR_PAGES != __VDSO_PAGES);</div><div class='ctx'> </div><div class='ctx'> 	vdso_text_len = vdso_info[abi].vdso_pages &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	/* Be sure to map the data page */</div><div class='del'>-	vdso_mapping_len = vdso_text_len + VVAR_NR_PAGES * PAGE_SIZE;</div><div class='add'>+	vdso_mapping_len = vdso_text_len + VDSO_NR_PAGES * PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	vdso_base = get_unmapped_area(NULL, 0, vdso_mapping_len, 0, 0);</div><div class='ctx'> 	if (IS_ERR_VALUE(vdso_base)) {</div><div class='hunk'>@@ -197,20 +119,19 @@ static int __setup_additional_pages(enum vdso_abi abi,</div><div class='ctx'> 		goto up_fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = _install_special_mapping(mm, vdso_base, VVAR_NR_PAGES * PAGE_SIZE,</div><div class='del'>-				       VM_READ|VM_MAYREAD|VM_PFNMAP,</div><div class='del'>-				       vdso_info[abi].dm);</div><div class='add'>+	ret = vdso_install_vvar_mapping(mm, vdso_base);</div><div class='ctx'> 	if (IS_ERR(ret))</div><div class='ctx'> 		goto up_fail;</div><div class='ctx'> </div><div class='ctx'> 	if (system_supports_bti_kernel())</div><div class='ctx'> 		gp_flags = VM_ARM64_BTI;</div><div class='ctx'> </div><div class='del'>-	vdso_base += VVAR_NR_PAGES * PAGE_SIZE;</div><div class='add'>+	vdso_base += VDSO_NR_PAGES * PAGE_SIZE;</div><div class='ctx'> 	mm-&gt;context.vdso = (void *)vdso_base;</div><div class='ctx'> 	ret = _install_special_mapping(mm, vdso_base, vdso_text_len,</div><div class='ctx'> 				       VM_READ|VM_EXEC|gp_flags|</div><div class='del'>-				       VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC,</div><div class='add'>+				       VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|</div><div class='add'>+				       VM_SEALED_SYSMAP,</div><div class='ctx'> 				       vdso_info[abi].cm);</div><div class='ctx'> 	if (IS_ERR(ret))</div><div class='ctx'> 		goto up_fail;</div><div class='hunk'>@@ -229,7 +150,6 @@ up_fail:</div><div class='ctx'> enum aarch32_map {</div><div class='ctx'> 	AA32_MAP_VECTORS, /* kuser helpers */</div><div class='ctx'> 	AA32_MAP_SIGPAGE,</div><div class='del'>-	AA32_MAP_VVAR,</div><div class='ctx'> 	AA32_MAP_VDSO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -254,10 +174,6 @@ static struct vm_special_mapping aarch32_vdso_maps[] = {</div><div class='ctx'> 		.pages	= &amp;aarch32_sig_page,</div><div class='ctx'> 		.mremap	= aarch32_sigpage_mremap,</div><div class='ctx'> 	},</div><div class='del'>-	[AA32_MAP_VVAR] = {</div><div class='del'>-		.name = "[vvar]",</div><div class='del'>-		.fault = vvar_fault,</div><div class='del'>-	},</div><div class='ctx'> 	[AA32_MAP_VDSO] = {</div><div class='ctx'> 		.name = "[vdso]",</div><div class='ctx'> 		.mremap = vdso_mremap,</div><div class='hunk'>@@ -307,7 +223,6 @@ static int __init __aarch32_alloc_vdso_pages(void)</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_COMPAT_VDSO))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	vdso_info[VDSO_ABI_AA32].dm = &amp;aarch32_vdso_maps[AA32_MAP_VVAR];</div><div class='ctx'> 	vdso_info[VDSO_ABI_AA32].cm = &amp;aarch32_vdso_maps[AA32_MAP_VDSO];</div><div class='ctx'> </div><div class='ctx'> 	return __vdso_init(VDSO_ABI_AA32);</div><div class='hunk'>@@ -342,7 +257,8 @@ static int aarch32_kuser_helpers_setup(struct mm_struct *mm)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = _install_special_mapping(mm, AARCH32_VECTORS_BASE, PAGE_SIZE,</div><div class='ctx'> 				       VM_READ | VM_EXEC |</div><div class='del'>-				       VM_MAYREAD | VM_MAYEXEC,</div><div class='add'>+				       VM_MAYREAD | VM_MAYEXEC |</div><div class='add'>+				       VM_SEALED_SYSMAP,</div><div class='ctx'> 				       &amp;aarch32_vdso_maps[AA32_MAP_VECTORS]);</div><div class='ctx'> </div><div class='ctx'> 	return PTR_ERR_OR_ZERO(ret);</div><div class='hunk'>@@ -365,7 +281,8 @@ static int aarch32_sigreturn_setup(struct mm_struct *mm)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = _install_special_mapping(mm, addr, PAGE_SIZE,</div><div class='ctx'> 				       VM_READ | VM_EXEC | VM_MAYREAD |</div><div class='del'>-				       VM_MAYWRITE | VM_MAYEXEC,</div><div class='add'>+				       VM_MAYWRITE | VM_MAYEXEC |</div><div class='add'>+				       VM_SEALED_SYSMAP,</div><div class='ctx'> 				       &amp;aarch32_vdso_maps[AA32_MAP_SIGPAGE]);</div><div class='ctx'> 	if (IS_ERR(ret))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -402,26 +319,14 @@ out:</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_COMPAT */</div><div class='ctx'> </div><div class='del'>-enum aarch64_map {</div><div class='del'>-	AA64_MAP_VVAR,</div><div class='del'>-	AA64_MAP_VDSO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct vm_special_mapping aarch64_vdso_maps[] __ro_after_init = {</div><div class='del'>-	[AA64_MAP_VVAR] = {</div><div class='del'>-		.name	= "[vvar]",</div><div class='del'>-		.fault = vvar_fault,</div><div class='del'>-	},</div><div class='del'>-	[AA64_MAP_VDSO] = {</div><div class='del'>-		.name	= "[vdso]",</div><div class='del'>-		.mremap = vdso_mremap,</div><div class='del'>-	},</div><div class='add'>+static struct vm_special_mapping aarch64_vdso_map __ro_after_init = {</div><div class='add'>+	.name	= "[vdso]",</div><div class='add'>+	.mremap = vdso_mremap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init vdso_init(void)</div><div class='ctx'> {</div><div class='del'>-	vdso_info[VDSO_ABI_AA64].dm = &amp;aarch64_vdso_maps[AA64_MAP_VVAR];</div><div class='del'>-	vdso_info[VDSO_ABI_AA64].cm = &amp;aarch64_vdso_maps[AA64_MAP_VDSO];</div><div class='add'>+	vdso_info[VDSO_ABI_AA64].cm = &amp;aarch64_vdso_map;</div><div class='ctx'> </div><div class='ctx'> 	return __vdso_init(VDSO_ABI_AA64);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/vdso/Makefile b/arch/arm64/kernel/vdso/Makefile<br/>index 35685c036044..7dec05dd33b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vdso/Makefile</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> obj-vdso := vgettimeofday.o note.o sigreturn.o vgetrandom.o vgetrandom-chacha.o</div><div class='ctx'> </div><div class='hunk'>@@ -36,7 +36,8 @@ ccflags-y += -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO</div><div class='ctx'> # -Wmissing-prototypes and -Wmissing-declarations are removed from</div><div class='ctx'> # the CFLAGS to make possible to build the kernel with CONFIG_WERROR enabled.</div><div class='ctx'> CC_FLAGS_REMOVE_VDSO := $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) \</div><div class='del'>-			$(RANDSTRUCT_CFLAGS) $(GCC_PLUGINS_CFLAGS) \</div><div class='add'>+			$(RANDSTRUCT_CFLAGS) $(KSTACK_ERASE_CFLAGS) \</div><div class='add'>+			$(GCC_PLUGINS_CFLAGS) \</div><div class='ctx'> 			$(CC_FLAGS_LTO) $(CC_FLAGS_CFI) \</div><div class='ctx'> 			-Wmissing-prototypes -Wmissing-declarations</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/vdso/vdso.lds.S b/arch/arm64/kernel/vdso/vdso.lds.S<br/>index f204a9ddc833..52314be29191 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vdso/vdso.lds.S</a></div><div class='hunk'>@@ -20,12 +20,9 @@ OUTPUT_ARCH(aarch64)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_vdso_data = . - __VVAR_PAGES * PAGE_SIZE);</div><div class='del'>-	PROVIDE(_vdso_rng_data = _vdso_data + __VDSO_RND_DATA_OFFSET);</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	PROVIDE(_timens_data = _vdso_data + PAGE_SIZE);</div><div class='del'>-#endif</div><div class='del'>-	. = VDSO_LBASE + SIZEOF_HEADERS;</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='add'>+	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	.hash		: { *(.hash) }			:text</div><div class='ctx'> 	.gnu.hash	: { *(.gnu.hash) }</div><div class='hunk'>@@ -41,6 +38,7 @@ SECTIONS</div><div class='ctx'> 	 */</div><div class='ctx'> 	/DISCARD/	: {</div><div class='ctx'> 		*(.note.GNU-stack .note.gnu.property)</div><div class='add'>+		*(.ARM.attributes)</div><div class='ctx'> 	}</div><div class='ctx'> 	.note		: { *(.note.*) }		:text	:note</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/vdso32/Makefile b/arch/arm64/kernel/vdso32/Makefile<br/>index 25a2cb6317f3..ffa3536581f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso32/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso32/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso32/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vdso32/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for vdso32</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> # Same as cc-*option, but using CC_COMPAT instead of CC</div><div class='ctx'> ifeq ($(CONFIG_CC_IS_CLANG), y)</div><div class='hunk'>@@ -21,8 +21,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> cc32-option = $(call try-run,\</div><div class='ctx'>         $(CC_COMPAT) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))</div><div class='del'>-cc32-disable-warning = $(call try-run,\</div><div class='del'>-	$(CC_COMPAT) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))</div><div class='ctx'> </div><div class='ctx'> # We cannot use the global flags to compile the vDSO files, the main reason</div><div class='ctx'> # being that the 32-bit compiler may be older than the main (64-bit) compiler</div><div class='hunk'>@@ -59,10 +57,10 @@ VDSO_CAFLAGS += -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> VDSO_CAFLAGS += -march=armv8-a</div><div class='ctx'> </div><div class='ctx'> VDSO_CFLAGS := $(VDSO_CAFLAGS)</div><div class='del'>-VDSO_CFLAGS += -DENABLE_COMPAT_VDSO=1</div><div class='ctx'> # KBUILD_CFLAGS from top-level Makefile</div><div class='ctx'> VDSO_CFLAGS += -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \</div><div class='ctx'>                -fno-strict-aliasing -fno-common \</div><div class='add'>+               $(filter -Werror,$(KBUILD_CPPFLAGS)) \</div><div class='ctx'>                -Werror-implicit-function-declaration \</div><div class='ctx'>                -Wno-format-security \</div><div class='ctx'>                -std=gnu11</div><div class='hunk'>@@ -74,16 +72,6 @@ VDSO_CFLAGS += $(call cc32-option,-Werror=strict-prototypes)</div><div class='ctx'> VDSO_CFLAGS += -Werror=date-time</div><div class='ctx'> VDSO_CFLAGS += $(call cc32-option,-Werror=incompatible-pointer-types)</div><div class='ctx'> </div><div class='del'>-# The 32-bit compiler does not provide 128-bit integers, which are used in</div><div class='del'>-# some headers that are indirectly included from the vDSO code.</div><div class='del'>-# This hack makes the compiler happy and should trigger a warning/error if</div><div class='del'>-# variables of such type are referenced.</div><div class='del'>-VDSO_CFLAGS += -D__uint128_t='void*'</div><div class='del'>-# Silence some warnings coming from headers that operate on long's</div><div class='del'>-# (on GCC 4.8 or older, there is unfortunately no way to silence this warning)</div><div class='del'>-VDSO_CFLAGS += $(call cc32-disable-warning,shift-count-overflow)</div><div class='del'>-VDSO_CFLAGS += -Wno-int-to-pointer-cast</div><div class='del'>-</div><div class='ctx'> # Compile as THUMB2 or ARM. Unwinding via frame-pointers in THUMB2 is</div><div class='ctx'> # unreliable.</div><div class='ctx'> ifeq ($(CONFIG_THUMB2_COMPAT_VDSO), y)</div><div class='head'>diff --git a/arch/arm64/kernel/vdso32/vdso.lds.S b/arch/arm64/kernel/vdso32/vdso.lds.S<br/>index 8d95d7d35057..e02b27487ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso32/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vdso32/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vdso32/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vdso32/vdso.lds.S</a></div><div class='hunk'>@@ -12,17 +12,16 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> #include &lt;asm-generic/vmlinux.lds.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")</div><div class='ctx'> OUTPUT_ARCH(arm)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE_HIDDEN(_vdso_data = . - __VVAR_PAGES * PAGE_SIZE);</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	PROVIDE_HIDDEN(_timens_data = _vdso_data + PAGE_SIZE);</div><div class='del'>-#endif</div><div class='del'>-	. = VDSO_LBASE + SIZEOF_HEADERS;</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='add'>+	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	.hash		: { *(.hash) }			:text</div><div class='ctx'> 	.gnu.hash	: { *(.gnu.hash) }</div><div class='head'>diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S<br/>index 58d89d997d05..ad6133b89e7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vmlinux.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/vmlinux.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	*(__kvm_ex_table)					\</div><div class='ctx'> 	__stop___kvm_ex_table = .;</div><div class='ctx'> </div><div class='del'>-#define HYPERVISOR_DATA_SECTIONS				\</div><div class='add'>+#define HYPERVISOR_RODATA_SECTIONS				\</div><div class='ctx'> 	HYP_SECTION_NAME(.rodata) : {				\</div><div class='ctx'> 		. = ALIGN(PAGE_SIZE);				\</div><div class='ctx'> 		__hyp_rodata_start = .;				\</div><div class='hunk'>@@ -23,6 +23,15 @@</div><div class='ctx'> 		__hyp_rodata_end = .;				\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define HYPERVISOR_DATA_SECTION					\</div><div class='add'>+	HYP_SECTION_NAME(.data) : {				\</div><div class='add'>+		. = ALIGN(PAGE_SIZE);				\</div><div class='add'>+		__hyp_data_start = .;				\</div><div class='add'>+		*(HYP_SECTION_NAME(.data))			\</div><div class='add'>+		. = ALIGN(PAGE_SIZE);				\</div><div class='add'>+		__hyp_data_end = .;				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #define HYPERVISOR_PERCPU_SECTION				\</div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);					\</div><div class='ctx'> 	HYP_SECTION_NAME(.data..percpu) : {			\</div><div class='hunk'>@@ -51,7 +60,8 @@</div><div class='ctx'> #define SBSS_ALIGN			PAGE_SIZE</div><div class='ctx'> #else /* CONFIG_KVM */</div><div class='ctx'> #define HYPERVISOR_EXTABLE</div><div class='del'>-#define HYPERVISOR_DATA_SECTIONS</div><div class='add'>+#define HYPERVISOR_RODATA_SECTIONS</div><div class='add'>+#define HYPERVISOR_DATA_SECTION</div><div class='ctx'> #define HYPERVISOR_PERCPU_SECTION</div><div class='ctx'> #define HYPERVISOR_RELOC_SECTION</div><div class='ctx'> #define SBSS_ALIGN			0</div><div class='hunk'>@@ -162,6 +172,7 @@ SECTIONS</div><div class='ctx'> 	/DISCARD/ : {</div><div class='ctx'> 		*(.interp .dynamic)</div><div class='ctx'> 		*(.dynsym .dynstr .hash .gnu.hash)</div><div class='add'>+		*(.ARM.attributes)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	. = KIMAGE_VADDR;</div><div class='hunk'>@@ -189,7 +200,7 @@ SECTIONS</div><div class='ctx'> 	/* everything from this point to __init_begin will be marked RO NX */</div><div class='ctx'> 	RO_DATA(PAGE_SIZE)</div><div class='ctx'> </div><div class='del'>-	HYPERVISOR_DATA_SECTIONS</div><div class='add'>+	HYPERVISOR_RODATA_SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	.got : { *(.got) }</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -248,9 +259,9 @@ SECTIONS</div><div class='ctx'> 	__inittext_end = .;</div><div class='ctx'> 	__initdata_begin = .;</div><div class='ctx'> </div><div class='del'>-	init_idmap_pg_dir = .;</div><div class='add'>+	__pi_init_idmap_pg_dir = .;</div><div class='ctx'> 	. += INIT_IDMAP_DIR_SIZE;</div><div class='del'>-	init_idmap_pg_end = .;</div><div class='add'>+	__pi_init_idmap_pg_end = .;</div><div class='ctx'> </div><div class='ctx'> 	.init.data : {</div><div class='ctx'> 		INIT_DATA</div><div class='hunk'>@@ -287,10 +298,15 @@ SECTIONS</div><div class='ctx'> 	__initdata_end = .;</div><div class='ctx'> 	__init_end = .;</div><div class='ctx'> </div><div class='add'>+	.data.rel.ro : { *(.data.rel.ro) }</div><div class='add'>+	ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!")</div><div class='add'>+</div><div class='ctx'> 	_data = .;</div><div class='ctx'> 	_sdata = .;</div><div class='ctx'> 	RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN)</div><div class='ctx'> </div><div class='add'>+	HYPERVISOR_DATA_SECTION</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Data written with the MMU off but read with the MMU on requires</div><div class='ctx'> 	 * cache lines to be invalidated, discarding up to a Cache Writeback</div><div class='hunk'>@@ -315,11 +331,12 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	/* start of zero-init region */</div><div class='ctx'> 	BSS_SECTION(SBSS_ALIGN, 0, 0)</div><div class='add'>+	__pi___bss_start = __bss_start;</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='del'>-	init_pg_dir = .;</div><div class='add'>+	__pi_init_pg_dir = .;</div><div class='ctx'> 	. += INIT_DIR_SIZE;</div><div class='del'>-	init_pg_end = .;</div><div class='add'>+	__pi_init_pg_end = .;</div><div class='ctx'> 	/* end of zero-init region */</div><div class='ctx'> </div><div class='ctx'> 	. += SZ_4K;		/* stack for the early C runtime */</div><div class='hunk'>@@ -328,6 +345,7 @@ SECTIONS</div><div class='ctx'> 	. = ALIGN(SEGMENT_ALIGN);</div><div class='ctx'> 	__pecoff_data_size = ABSOLUTE(. - __initdata_begin);</div><div class='ctx'> 	_end = .;</div><div class='add'>+	__pi__end = .;</div><div class='ctx'> </div><div class='ctx'> 	STABS_DEBUG</div><div class='ctx'> 	DWARF_DEBUG</div><div class='hunk'>@@ -343,9 +361,6 @@ SECTIONS</div><div class='ctx'> 		*(.plt) *(.plt.*) *(.iplt) *(.igot .igot.plt)</div><div class='ctx'> 	}</div><div class='ctx'> 	ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")</div><div class='del'>-</div><div class='del'>-	.data.rel.ro : { *(.data.rel.ro) }</div><div class='del'>-	ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!")</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #include "image-vars.h"</div><div class='head'>diff --git a/arch/arm64/kernel/watchdog_hld.c b/arch/arm64/kernel/watchdog_hld.c<br/>index dcd25322127c..3093037dcb7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/watchdog_hld.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kernel/watchdog_hld.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kernel/watchdog_hld.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kernel/watchdog_hld.c</a></div><div class='hunk'>@@ -34,3 +34,61 @@ bool __init arch_perf_nmi_is_available(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	return arm_pmu_irq_is_nmi();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int watchdog_perf_update_period(void *data)</div><div class='add'>+{</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	u64 max_cpu_freq, new_period;</div><div class='add'>+</div><div class='add'>+	max_cpu_freq = cpufreq_get_hw_max_freq(cpu) * 1000UL;</div><div class='add'>+	if (!max_cpu_freq)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	new_period = watchdog_thresh * max_cpu_freq;</div><div class='add'>+	hardlockup_detector_perf_adjust_period(new_period);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int watchdog_freq_notifier_callback(struct notifier_block *nb,</div><div class='add'>+					   unsigned long val, void *data)</div><div class='add'>+{</div><div class='add'>+	struct cpufreq_policy *policy = data;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	if (val != CPUFREQ_CREATE_POLICY)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Let each online CPU related to the policy update the period by their</div><div class='add'>+	 * own. This will serialize with the framework on start/stop the lockup</div><div class='add'>+	 * detector (softlockup_{start,stop}_all) and avoid potential race</div><div class='add'>+	 * condition. Otherwise we may have below theoretical race condition:</div><div class='add'>+	 * (core 0/1 share the same policy)</div><div class='add'>+	 * [core 0]                      [core 1]</div><div class='add'>+	 *                               hardlockup_detector_event_create()</div><div class='add'>+	 *                                 hw_nmi_get_sample_period()</div><div class='add'>+	 * (cpufreq registered, notifier callback invoked)</div><div class='add'>+	 * watchdog_freq_notifier_callback()</div><div class='add'>+	 *   watchdog_perf_update_period()</div><div class='add'>+	 *   (since core 1's event's not yet created,</div><div class='add'>+	 *    the period is not set)</div><div class='add'>+	 *                                 perf_event_create_kernel_counter()</div><div class='add'>+	 *                                 (event's period is SAFE_MAX_CPU_FREQ)</div><div class='add'>+	 */</div><div class='add'>+	for_each_cpu(cpu, policy-&gt;cpus)</div><div class='add'>+		smp_call_on_cpu(cpu, watchdog_perf_update_period, NULL, false);</div><div class='add'>+</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block watchdog_freq_notifier = {</div><div class='add'>+	.notifier_call = watchdog_freq_notifier_callback,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init init_watchdog_freq_notifier(void)</div><div class='add'>+{</div><div class='add'>+	return cpufreq_register_notifier(&amp;watchdog_freq_notifier,</div><div class='add'>+					 CPUFREQ_POLICY_NOTIFIER);</div><div class='add'>+}</div><div class='add'>+core_initcall(init_watchdog_freq_notifier);</div><div class='head'>diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig<br/>index ead632ad01b4..4f803fd1c99a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/Kconfig</a></div><div class='hunk'>@@ -19,14 +19,13 @@ if VIRTUALIZATION</div><div class='ctx'> </div><div class='ctx'> menuconfig KVM</div><div class='ctx'> 	bool "Kernel-based Virtual Machine (KVM) support"</div><div class='del'>-	depends on AS_HAS_ARMV8_4</div><div class='ctx'> 	select KVM_COMMON</div><div class='ctx'> 	select KVM_GENERIC_HARDWARE_ENABLING</div><div class='ctx'> 	select KVM_GENERIC_MMU_NOTIFIER</div><div class='ctx'> 	select HAVE_KVM_CPU_RELAX_INTERCEPT</div><div class='ctx'> 	select KVM_MMIO</div><div class='ctx'> 	select KVM_GENERIC_DIRTYLOG_READ_PROTECT</div><div class='del'>-	select KVM_XFER_TO_GUEST_WORK</div><div class='add'>+	select VIRT_XFER_TO_GUEST_WORK</div><div class='ctx'> 	select KVM_VFIO</div><div class='ctx'> 	select HAVE_KVM_DIRTY_RING_ACQ_REL</div><div class='ctx'> 	select NEED_KVM_DIRTY_RING_WITH_BITMAP</div><div class='hunk'>@@ -38,6 +37,7 @@ menuconfig KVM</div><div class='ctx'> 	select HAVE_KVM_VCPU_RUN_PID_CHANGE</div><div class='ctx'> 	select SCHED_INFO</div><div class='ctx'> 	select GUEST_PERF_EVENTS if PERF_EVENTS</div><div class='add'>+	select KVM_GUEST_MEMFD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support hosting virtualized guest machines.</div><div class='ctx'> </div><div class='hunk'>@@ -71,8 +71,8 @@ config PTDUMP_STAGE2_DEBUGFS</div><div class='ctx'> 	depends on KVM</div><div class='ctx'> 	depends on DEBUG_KERNEL</div><div class='ctx'> 	depends on DEBUG_FS</div><div class='del'>-	depends on GENERIC_PTDUMP</div><div class='del'>-	select PTDUMP_CORE</div><div class='add'>+	depends on ARCH_HAS_PTDUMP</div><div class='add'>+	select PTDUMP</div><div class='ctx'> 	default n</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to show the stage-2 kernel pagetables</div><div class='head'>diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile<br/>index 3cf7adb2b503..3ebc0570345c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/Makefile</a></div><div class='hunk'>@@ -14,7 +14,7 @@ CFLAGS_sys_regs.o += -Wno-override-init</div><div class='ctx'> CFLAGS_handle_exit.o += -Wno-override-init</div><div class='ctx'> </div><div class='ctx'> kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \</div><div class='del'>-	 inject_fault.o va_layout.o handle_exit.o \</div><div class='add'>+	 inject_fault.o va_layout.o handle_exit.o config.o \</div><div class='ctx'> 	 guest.o debug.o reset.o sys_regs.o stacktrace.o \</div><div class='ctx'> 	 vgic-sys-reg-v3.o fpsimd.o pkvm.o \</div><div class='ctx'> 	 arch_timer.o trng.o vmid.o emulate-nested.o nested.o at.o \</div><div class='hunk'>@@ -23,7 +23,8 @@ kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \</div><div class='ctx'> 	 vgic/vgic-v3.o vgic/vgic-v4.o \</div><div class='ctx'> 	 vgic/vgic-mmio.o vgic/vgic-mmio-v2.o \</div><div class='ctx'> 	 vgic/vgic-mmio-v3.o vgic/vgic-kvm-device.o \</div><div class='del'>-	 vgic/vgic-its.o vgic/vgic-debug.o</div><div class='add'>+	 vgic/vgic-its.o vgic/vgic-debug.o vgic/vgic-v3-nested.o \</div><div class='add'>+	 vgic/vgic-v5.o</div><div class='ctx'> </div><div class='ctx'> kvm-$(CONFIG_HW_PERF_EVENTS)  += pmu-emul.o pmu.o</div><div class='ctx'> kvm-$(CONFIG_ARM64_PTR_AUTH)  += pauth.o</div><div class='head'>diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c<br/>index 879982b1cc73..dbd74e4885e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/arch_timer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/arch_timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/arch_timer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/arch_timer.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@ static u32 host_vtimer_irq_flags;</div><div class='ctx'> static u32 host_ptimer_irq_flags;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_STATIC_KEY_FALSE(has_gic_active_state);</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(broken_cntvoff_key);</div><div class='ctx'> </div><div class='ctx'> static const u8 default_ppi[] = {</div><div class='ctx'> 	[TIMER_PTIMER]  = 30,</div><div class='hunk'>@@ -101,37 +102,22 @@ u64 timer_get_cval(struct arch_timer_context *ctxt)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 timer_get_offset(struct arch_timer_context *ctxt)</div><div class='del'>-{</div><div class='del'>-	u64 offset = 0;</div><div class='del'>-</div><div class='del'>-	if (!ctxt)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (ctxt-&gt;offset.vm_offset)</div><div class='del'>-		offset += *ctxt-&gt;offset.vm_offset;</div><div class='del'>-	if (ctxt-&gt;offset.vcpu_offset)</div><div class='del'>-		offset += *ctxt-&gt;offset.vcpu_offset;</div><div class='del'>-</div><div class='del'>-	return offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void timer_set_ctl(struct arch_timer_context *ctxt, u32 ctl)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = ctxt-&gt;vcpu;</div><div class='ctx'> </div><div class='ctx'> 	switch(arch_timer_ctx_index(ctxt)) {</div><div class='ctx'> 	case TIMER_VTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTV_CTL_EL0) = ctl;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTV_CTL_EL0, ctl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_PTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTP_CTL_EL0) = ctl;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTP_CTL_EL0, ctl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_HVTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTHV_CTL_EL2) = ctl;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTHV_CTL_EL2, ctl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_HPTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTHP_CTL_EL2) = ctl;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTHP_CTL_EL2, ctl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON(1);</div><div class='hunk'>@@ -144,16 +130,16 @@ static void timer_set_cval(struct arch_timer_context *ctxt, u64 cval)</div><div class='ctx'> </div><div class='ctx'> 	switch(arch_timer_ctx_index(ctxt)) {</div><div class='ctx'> 	case TIMER_VTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTV_CVAL_EL0) = cval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTV_CVAL_EL0, cval);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_PTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = cval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, cval);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_HVTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTHV_CVAL_EL2) = cval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTHV_CVAL_EL2, cval);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TIMER_HPTIMER:</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2) = cval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, cval);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON(1);</div><div class='hunk'>@@ -206,8 +192,7 @@ void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> </div><div class='ctx'> static inline bool userspace_irqchip(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	return static_branch_unlikely(&amp;userspace_irqchip_in_use) &amp;&amp;</div><div class='del'>-		unlikely(!irqchip_in_kernel(kvm));</div><div class='add'>+	return unlikely(!irqchip_in_kernel(kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void soft_timer_start(struct hrtimer *hrt, u64 ns)</div><div class='hunk'>@@ -442,22 +427,39 @@ void kvm_timer_update_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		regs-&gt;device_irq_level |= KVM_ARM_DEV_EL1_PTIMER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_timer_update_status(struct arch_timer_context *ctx, bool level)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Paper over NV2 brokenness by publishing the interrupt status</div><div class='add'>+	 * bit. This still results in a poor quality of emulation (guest</div><div class='add'>+	 * writes will have no effect until the next exit).</div><div class='add'>+	 *</div><div class='add'>+	 * But hey, it's fast, right?</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(ctx-&gt;vcpu) &amp;&amp;</div><div class='add'>+	    (ctx == vcpu_vtimer(ctx-&gt;vcpu) || ctx == vcpu_ptimer(ctx-&gt;vcpu))) {</div><div class='add'>+		unsigned long val = timer_get_ctl(ctx);</div><div class='add'>+		__assign_bit(__ffs(ARCH_TIMER_CTRL_IT_STAT), &amp;val, level);</div><div class='add'>+		timer_set_ctl(ctx, val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,</div><div class='ctx'> 				 struct arch_timer_context *timer_ctx)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	kvm_timer_update_status(timer_ctx, new_level);</div><div class='ctx'> </div><div class='ctx'> 	timer_ctx-&gt;irq.level = new_level;</div><div class='ctx'> 	trace_kvm_timer_update_irq(vcpu-&gt;vcpu_id, timer_irq(timer_ctx),</div><div class='ctx'> 				   timer_ctx-&gt;irq.level);</div><div class='ctx'> </div><div class='del'>-	if (!userspace_irqchip(vcpu-&gt;kvm)) {</div><div class='del'>-		ret = kvm_vgic_inject_irq(vcpu-&gt;kvm, vcpu,</div><div class='del'>-					  timer_irq(timer_ctx),</div><div class='del'>-					  timer_ctx-&gt;irq.level,</div><div class='del'>-					  timer_ctx);</div><div class='del'>-		WARN_ON(ret);</div><div class='del'>-	}</div><div class='add'>+	if (userspace_irqchip(vcpu-&gt;kvm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm_vgic_inject_irq(vcpu-&gt;kvm, vcpu,</div><div class='add'>+			    timer_irq(timer_ctx),</div><div class='add'>+			    timer_ctx-&gt;irq.level,</div><div class='add'>+			    timer_ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Only called for a fully emulated timer */</div><div class='hunk'>@@ -467,10 +469,10 @@ static void timer_emulate(struct arch_timer_context *ctx)</div><div class='ctx'> </div><div class='ctx'> 	trace_kvm_timer_emulate(ctx, should_fire);</div><div class='ctx'> </div><div class='del'>-	if (should_fire != ctx-&gt;irq.level) {</div><div class='add'>+	if (should_fire != ctx-&gt;irq.level)</div><div class='ctx'> 		kvm_timer_update_irq(ctx-&gt;vcpu, should_fire, ctx);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	kvm_timer_update_status(ctx, should_fire);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the timer can fire now, we don't need to have a soft timer</div><div class='hunk'>@@ -514,7 +516,12 @@ static void timer_save_state(struct arch_timer_context *ctx)</div><div class='ctx'> 	case TIMER_VTIMER:</div><div class='ctx'> 	case TIMER_HVTIMER:</div><div class='ctx'> 		timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTV_CTL));</div><div class='del'>-		timer_set_cval(ctx, read_sysreg_el0(SYS_CNTV_CVAL));</div><div class='add'>+		cval = read_sysreg_el0(SYS_CNTV_CVAL);</div><div class='add'>+</div><div class='add'>+		if (has_broken_cntvoff())</div><div class='add'>+			cval -= timer_get_offset(ctx);</div><div class='add'>+</div><div class='add'>+		timer_set_cval(ctx, cval);</div><div class='ctx'> </div><div class='ctx'> 		/* Disable the timer */</div><div class='ctx'> 		write_sysreg_el0(0, SYS_CNTV_CTL);</div><div class='hunk'>@@ -619,8 +626,15 @@ static void timer_restore_state(struct arch_timer_context *ctx)</div><div class='ctx'> </div><div class='ctx'> 	case TIMER_VTIMER:</div><div class='ctx'> 	case TIMER_HVTIMER:</div><div class='del'>-		set_cntvoff(timer_get_offset(ctx));</div><div class='del'>-		write_sysreg_el0(timer_get_cval(ctx), SYS_CNTV_CVAL);</div><div class='add'>+		cval = timer_get_cval(ctx);</div><div class='add'>+		offset = timer_get_offset(ctx);</div><div class='add'>+		if (has_broken_cntvoff()) {</div><div class='add'>+			set_cntvoff(0);</div><div class='add'>+			cval += offset;</div><div class='add'>+		} else {</div><div class='add'>+			set_cntvoff(offset);</div><div class='add'>+		}</div><div class='add'>+		write_sysreg_el0(cval, SYS_CNTV_CVAL);</div><div class='ctx'> 		isb();</div><div class='ctx'> 		write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTV_CTL);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -743,27 +757,12 @@ static void kvm_timer_vcpu_load_nested_switch(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					    timer_irq(map-&gt;direct_ptimer),</div><div class='ctx'> 					    &amp;arch_timer_irq_ops);</div><div class='ctx'> 		WARN_ON_ONCE(ret);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The virtual offset behaviour is "interesting", as it</div><div class='del'>-		 * always applies when HCR_EL2.E2H==0, but only when</div><div class='del'>-		 * accessed from EL1 when HCR_EL2.E2H==1. So make sure we</div><div class='del'>-		 * track E2H when putting the HV timer in "direct" mode.</div><div class='del'>-		 */</div><div class='del'>-		if (map-&gt;direct_vtimer == vcpu_hvtimer(vcpu)) {</div><div class='del'>-			struct arch_timer_offset *offs = &amp;map-&gt;direct_vtimer-&gt;offset;</div><div class='del'>-</div><div class='del'>-			if (vcpu_el2_e2h_is_set(vcpu))</div><div class='del'>-				offs-&gt;vcpu_offset = NULL;</div><div class='del'>-			else</div><div class='del'>-				offs-&gt;vcpu_offset = &amp;__vcpu_sys_reg(vcpu, CNTVOFF_EL2);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> {</div><div class='del'>-	bool tpt, tpc;</div><div class='add'>+	bool tvt, tpt, tvc, tpc, tvt02, tpt02;</div><div class='ctx'> 	u64 clr, set;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -778,7 +777,29 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> 	 * within this function, reality kicks in and we start adding</div><div class='ctx'> 	 * traps based on emulation requirements.</div><div class='ctx'> 	 */</div><div class='del'>-	tpt = tpc = false;</div><div class='add'>+	tvt = tpt = tvc = tpc = false;</div><div class='add'>+	tvt02 = tpt02 = false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NV2 badly breaks the timer semantics by redirecting accesses to</div><div class='add'>+	 * the EL1 timer state to memory, so let's call ECV to the rescue if</div><div class='add'>+	 * available: we trap all CNT{P,V}_{CTL,CVAL,TVAL}_EL0 accesses.</div><div class='add'>+	 *</div><div class='add'>+	 * The treatment slightly varies depending whether we run a nVHE or</div><div class='add'>+	 * VHE guest: nVHE will use the _EL0 registers directly, while VHE</div><div class='add'>+	 * will use the _EL02 accessors. This translates in different trap</div><div class='add'>+	 * bits.</div><div class='add'>+	 *</div><div class='add'>+	 * None of the trapping is required when running in non-HYP context,</div><div class='add'>+	 * unless required by the L1 hypervisor settings once we advertise</div><div class='add'>+	 * ECV+NV in the guest, or that we need trapping for other reasons.</div><div class='add'>+	 */</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_ECV) &amp;&amp; is_hyp_ctxt(vcpu)) {</div><div class='add'>+		if (vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tvt02 = tpt02 = true;</div><div class='add'>+		else</div><div class='add'>+			tvt = tpt = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We have two possibility to deal with a physical offset:</div><div class='hunk'>@@ -794,11 +815,22 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> 		tpt = tpc = true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * For the poor sods that could not correctly substract one value</div><div class='add'>+	 * from another, trap the full virtual timer and counter.</div><div class='add'>+	 */</div><div class='add'>+	if (has_broken_cntvoff() &amp;&amp; timer_get_offset(map-&gt;direct_vtimer))</div><div class='add'>+		tvt = tvc = true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Apply the enable bits that the guest hypervisor has requested for</div><div class='ctx'> 	 * its own guest. We can only add traps that wouldn't have been set</div><div class='ctx'> 	 * above.</div><div class='add'>+	 * Implementation choices: we do not support NV when E2H=0 in the</div><div class='add'>+	 * guest, and we don't support configuration where E2H is writable</div><div class='add'>+	 * by the guest (either FEAT_VHE or FEAT_E2H0 is implemented, but</div><div class='add'>+	 * not both). This simplifies the handling of the EL1NV* bits.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) {</div><div class='add'>+	if (is_nested_ctxt(vcpu)) {</div><div class='ctx'> 		u64 val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);</div><div class='ctx'> </div><div class='ctx'> 		/* Use the VHE format for mental sanity */</div><div class='hunk'>@@ -807,6 +839,9 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> </div><div class='ctx'> 		tpt |= !(val &amp; (CNTHCTL_EL1PCEN &lt;&lt; 10));</div><div class='ctx'> 		tpc |= !(val &amp; (CNTHCTL_EL1PCTEN &lt;&lt; 10));</div><div class='add'>+</div><div class='add'>+		tpt02 |= (val &amp; CNTHCTL_EL1NVPCT);</div><div class='add'>+		tvt02 |= (val &amp; CNTHCTL_EL1NVVCT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -818,6 +853,10 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)</div><div class='ctx'> </div><div class='ctx'> 	assign_clear_set_bit(tpt, CNTHCTL_EL1PCEN &lt;&lt; 10, set, clr);</div><div class='ctx'> 	assign_clear_set_bit(tpc, CNTHCTL_EL1PCTEN &lt;&lt; 10, set, clr);</div><div class='add'>+	assign_clear_set_bit(tvt, CNTHCTL_EL1TVT, clr, set);</div><div class='add'>+	assign_clear_set_bit(tvc, CNTHCTL_EL1TVCT, clr, set);</div><div class='add'>+	assign_clear_set_bit(tvt02, CNTHCTL_EL1NVVCT, clr, set);</div><div class='add'>+	assign_clear_set_bit(tpt02, CNTHCTL_EL1NVPCT, clr, set);</div><div class='ctx'> </div><div class='ctx'> 	/* This only happens on VHE, so use the CNTHCTL_EL2 accessor. */</div><div class='ctx'> 	sysreg_clear_set(cnthctl_el2, clr, set);</div><div class='hunk'>@@ -906,6 +945,44 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		kvm_timer_blocking(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kvm_timer_sync_nested(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * When NV2 is on, guest hypervisors have their EL1 timer register</div><div class='add'>+	 * accesses redirected to the VNCR page. Any guest action taken on</div><div class='add'>+	 * the timer is postponed until the next exit, leading to a very</div><div class='add'>+	 * poor quality of emulation.</div><div class='add'>+	 *</div><div class='add'>+	 * This is an unmitigated disaster, only papered over by FEAT_ECV,</div><div class='add'>+	 * which allows trapping of the timer registers even with NV2.</div><div class='add'>+	 * Still, this is still worse than FEAT_NV on its own. Meh.</div><div class='add'>+	 */</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_ECV)) {</div><div class='add'>+		/*</div><div class='add'>+		 * For a VHE guest hypervisor, the EL2 state is directly</div><div class='add'>+		 * stored in the host EL1 timers, while the emulated EL1</div><div class='add'>+		 * state is stored in the VNCR page. The latter could have</div><div class='add'>+		 * been updated behind our back, and we must reset the</div><div class='add'>+		 * emulation of the timers.</div><div class='add'>+		 *</div><div class='add'>+		 * A non-VHE guest hypervisor doesn't have any direct access</div><div class='add'>+		 * to its timers: the EL2 registers trap despite being</div><div class='add'>+		 * notionally direct (we use the EL1 HW, as for VHE), while</div><div class='add'>+		 * the EL1 registers access memory.</div><div class='add'>+		 *</div><div class='add'>+		 * In both cases, process the emulated timers on each guest</div><div class='add'>+		 * exit. Boo.</div><div class='add'>+		 */</div><div class='add'>+		struct timer_map map;</div><div class='add'>+		get_timer_map(vcpu, &amp;map);</div><div class='add'>+</div><div class='add'>+		soft_timer_cancel(&amp;map.emul_vtimer-&gt;hrtimer);</div><div class='add'>+		soft_timer_cancel(&amp;map.emul_ptimer-&gt;hrtimer);</div><div class='add'>+		timer_emulate(map.emul_vtimer);</div><div class='add'>+		timer_emulate(map.emul_ptimer);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * With a userspace irqchip we have to check if the guest de-asserted the</div><div class='ctx'>  * timer and if so, unmask the timer irq signal on the host interrupt</div><div class='hunk'>@@ -959,7 +1036,7 @@ void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vcpu_has_nv(vcpu)) {</div><div class='ctx'> 		struct arch_timer_offset *offs = &amp;vcpu_vtimer(vcpu)-&gt;offset;</div><div class='ctx'> </div><div class='del'>-		offs-&gt;vcpu_offset = &amp;__vcpu_sys_reg(vcpu, CNTVOFF_EL2);</div><div class='add'>+		offs-&gt;vcpu_offset = __ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, CNTVOFF_EL2);</div><div class='ctx'> 		offs-&gt;vm_offset = &amp;vcpu-&gt;kvm-&gt;arch.timer_data.poffset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -993,8 +1070,7 @@ static void timer_context_init(struct kvm_vcpu *vcpu, int timerid)</div><div class='ctx'> 	else</div><div class='ctx'> 		ctxt-&gt;offset.vm_offset = &amp;kvm-&gt;arch.timer_data.poffset;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;ctxt-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);</div><div class='del'>-	ctxt-&gt;hrtimer.function = kvm_hrtimer_expire;</div><div class='add'>+	hrtimer_setup(&amp;ctxt-&gt;hrtimer, kvm_hrtimer_expire, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);</div><div class='ctx'> </div><div class='ctx'> 	switch (timerid) {</div><div class='ctx'> 	case TIMER_PTIMER:</div><div class='hunk'>@@ -1021,8 +1097,8 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		timer_set_offset(vcpu_ptimer(vcpu), 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;timer-&gt;bg_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);</div><div class='del'>-	timer-&gt;bg_timer.function = kvm_bg_timer_expire;</div><div class='add'>+	hrtimer_setup(&amp;timer-&gt;bg_timer, kvm_bg_timer_expire, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_ABS_HARD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_timer_init_vm(struct kvm *kvm)</div><div class='hunk'>@@ -1364,6 +1440,37 @@ static int kvm_irq_init(struct arch_timer_kvm_info *info)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_timer_handle_errata(void)</div><div class='add'>+{</div><div class='add'>+	u64 mmfr0, mmfr1, mmfr4;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CNTVOFF_EL2 is broken on some implementations. For those, we trap</div><div class='add'>+	 * all virtual timer/counter accesses, requiring FEAT_ECV.</div><div class='add'>+	 *</div><div class='add'>+	 * However, a hypervisor supporting nesting is likely to mitigate the</div><div class='add'>+	 * erratum at L0, and not require other levels to mitigate it (which</div><div class='add'>+	 * would otherwise be a terrible performance sink due to trap</div><div class='add'>+	 * amplification).</div><div class='add'>+	 *</div><div class='add'>+	 * Given that the affected HW implements both FEAT_VHE and FEAT_E2H0,</div><div class='add'>+	 * and that NV is likely not to (because of limitations of the</div><div class='add'>+	 * architecture), only enable the workaround when FEAT_VHE and</div><div class='add'>+	 * FEAT_E2H0 are both detected. Time will tell if this actually holds.</div><div class='add'>+	 */</div><div class='add'>+	mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);</div><div class='add'>+	mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);</div><div class='add'>+	mmfr4 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR4_EL1);</div><div class='add'>+	if (SYS_FIELD_GET(ID_AA64MMFR1_EL1, VH, mmfr1)		&amp;&amp;</div><div class='add'>+	    !SYS_FIELD_GET(ID_AA64MMFR4_EL1, E2H0, mmfr4)	&amp;&amp;</div><div class='add'>+	    SYS_FIELD_GET(ID_AA64MMFR0_EL1, ECV, mmfr0)		&amp;&amp;</div><div class='add'>+	    (has_vhe() || has_hvhe())				&amp;&amp;</div><div class='add'>+	    cpus_have_final_cap(ARM64_WORKAROUND_QCOM_ORYON_CNTVOFF)) {</div><div class='add'>+		static_branch_enable(&amp;broken_cntvoff_key);</div><div class='add'>+		kvm_info("Broken CNTVOFF_EL2, trapping virtual timer\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int __init kvm_timer_hyp_init(bool has_gic)</div><div class='ctx'> {</div><div class='ctx'> 	struct arch_timer_kvm_info *info;</div><div class='hunk'>@@ -1432,6 +1539,7 @@ int __init kvm_timer_hyp_init(bool has_gic)</div><div class='ctx'> 		goto out_free_vtimer_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvm_timer_handle_errata();</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_free_ptimer_irq:</div><div class='hunk'>@@ -1658,7 +1766,7 @@ int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (lock_all_vcpus(kvm)) {</div><div class='add'>+	if (!kvm_trylock_all_vcpus(kvm)) {</div><div class='ctx'> 		set_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &amp;kvm-&gt;arch.flags);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1670,7 +1778,7 @@ int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm,</div><div class='ctx'> 		kvm-&gt;arch.timer_data.voffset = offset-&gt;counter_offset;</div><div class='ctx'> 		kvm-&gt;arch.timer_data.poffset = offset-&gt;counter_offset;</div><div class='ctx'> </div><div class='del'>-		unlock_all_vcpus(kvm);</div><div class='add'>+		kvm_unlock_all_vcpus(kvm);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c<br/>index a0d01c46e408..f21d1b7f20f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/arm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/arm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/arm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/arm.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/cpu_pm.h&gt;</div><div class='del'>-#include &lt;linux/entry-kvm.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='hunk'>@@ -61,7 +60,7 @@ static enum kvm_wfx_trap_policy kvm_wfe_trap_policy __read_mostly = KVM_WFX_NOTR</div><div class='ctx'> </div><div class='ctx'> DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector);</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page);</div><div class='add'>+DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_base);</div><div class='ctx'> DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);</div><div class='ctx'> </div><div class='ctx'> DECLARE_KVM_NVHE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);</div><div class='hunk'>@@ -69,7 +68,6 @@ DECLARE_KVM_NVHE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);</div><div class='ctx'> static bool vgic_present, kvm_arm_initialised;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized);</div><div class='del'>-DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use);</div><div class='ctx'> </div><div class='ctx'> bool is_kvm_arm_initialised(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -81,31 +79,6 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This functions as an allow-list of protected VM capabilities.</div><div class='del'>- * Features not explicitly allowed by this function are denied.</div><div class='del'>- */</div><div class='del'>-static bool pkvm_ext_allowed(struct kvm *kvm, long ext)</div><div class='del'>-{</div><div class='del'>-	switch (ext) {</div><div class='del'>-	case KVM_CAP_IRQCHIP:</div><div class='del'>-	case KVM_CAP_ARM_PSCI:</div><div class='del'>-	case KVM_CAP_ARM_PSCI_0_2:</div><div class='del'>-	case KVM_CAP_NR_VCPUS:</div><div class='del'>-	case KVM_CAP_MAX_VCPUS:</div><div class='del'>-	case KVM_CAP_MAX_VCPU_ID:</div><div class='del'>-	case KVM_CAP_MSI_DEVID:</div><div class='del'>-	case KVM_CAP_ARM_VM_IPA_SIZE:</div><div class='del'>-	case KVM_CAP_ARM_PMU_V3:</div><div class='del'>-	case KVM_CAP_ARM_SVE:</div><div class='del'>-	case KVM_CAP_ARM_PTRAUTH_ADDRESS:</div><div class='del'>-	case KVM_CAP_ARM_PTRAUTH_GENERIC:</div><div class='del'>-		return true;</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_vm_ioctl_enable_cap(struct kvm *kvm,</div><div class='ctx'> 			    struct kvm_enable_cap *cap)</div><div class='ctx'> {</div><div class='hunk'>@@ -114,7 +87,7 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,</div><div class='ctx'> 	if (cap-&gt;flags)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (kvm_vm_is_protected(kvm) &amp;&amp; !pkvm_ext_allowed(kvm, cap-&gt;cap))</div><div class='add'>+	if (kvm_vm_is_protected(kvm) &amp;&amp; !kvm_pvm_ext_allowed(cap-&gt;cap))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (cap-&gt;cap) {</div><div class='hunk'>@@ -151,6 +124,14 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,</div><div class='ctx'> 		}</div><div class='ctx'> 		mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_ARM_WRITABLE_IMP_ID_REGS:</div><div class='add'>+		mutex_lock(&amp;kvm-&gt;lock);</div><div class='add'>+		if (!kvm-&gt;created_vcpus) {</div><div class='add'>+			r = 0;</div><div class='add'>+			set_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &amp;kvm-&gt;arch.flags);</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;kvm-&gt;lock);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -188,10 +169,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = pkvm_init_host_vm(kvm);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_unshare_kvm;</div><div class='del'>-</div><div class='ctx'> 	if (!zalloc_cpumask_var(&amp;kvm-&gt;arch.supported_cpus, GFP_KERNEL_ACCOUNT)) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err_unshare_kvm;</div><div class='hunk'>@@ -202,6 +179,16 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_cpumask;</div><div class='ctx'> </div><div class='add'>+	if (is_protected_kvm_enabled()) {</div><div class='add'>+		/*</div><div class='add'>+		 * If any failures occur after this is successful, make sure to</div><div class='add'>+		 * call __pkvm_unreserve_vm to unreserve the VM in hyp.</div><div class='add'>+		 */</div><div class='add'>+		ret = pkvm_init_host_vm(kvm);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_free_cpumask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	kvm_vgic_early_init(kvm);</div><div class='ctx'> </div><div class='ctx'> 	kvm_timer_init_vm(kvm);</div><div class='hunk'>@@ -312,7 +299,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	if (kvm &amp;&amp; kvm_vm_is_protected(kvm) &amp;&amp; !pkvm_ext_allowed(kvm, ext))</div><div class='add'>+	if (kvm &amp;&amp; kvm_vm_is_protected(kvm) &amp;&amp; !kvm_pvm_ext_allowed(ext))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (ext) {</div><div class='hunk'>@@ -339,6 +326,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	case KVM_CAP_ARM_SYSTEM_SUSPEND:</div><div class='ctx'> 	case KVM_CAP_IRQFD_RESAMPLE:</div><div class='ctx'> 	case KVM_CAP_COUNTER_OFFSET:</div><div class='add'>+	case KVM_CAP_ARM_WRITABLE_IMP_ID_REGS:</div><div class='ctx'> 		r = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_SET_GUEST_DEBUG2:</div><div class='hunk'>@@ -385,6 +373,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	case KVM_CAP_ARM_EL1_32BIT:</div><div class='ctx'> 		r = cpus_have_final_cap(ARM64_HAS_32BIT_EL1);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_ARM_EL2:</div><div class='add'>+		r = cpus_have_final_cap(ARM64_HAS_NESTED_VIRT);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_CAP_ARM_EL2_E2H0:</div><div class='add'>+		r = cpus_have_final_cap(ARM64_HAS_HCR_NV1);</div><div class='add'>+		break;</div><div class='ctx'> 	case KVM_CAP_GUEST_DEBUG_HW_BPS:</div><div class='ctx'> 		r = get_num_brps();</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -392,7 +386,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 		r = get_num_wrps();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_ARM_PMU_V3:</div><div class='del'>-		r = kvm_arm_support_pmu_v3();</div><div class='add'>+		r = kvm_supports_guest_pmuv3();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_ARM_INJECT_SERROR_ESR:</div><div class='ctx'> 		r = cpus_have_final_cap(ARM64_HAS_RAS_EXTN);</div><div class='hunk'>@@ -419,6 +413,13 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	case KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES:</div><div class='ctx'> 		r = BIT(0);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED:</div><div class='add'>+		if (!kvm)</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+		else</div><div class='add'>+			r = kvm_supports_cacheable_pfnmap();</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -477,8 +478,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	kvm_pmu_vcpu_init(vcpu);</div><div class='ctx'> </div><div class='del'>-	kvm_arm_reset_debug_ptr(vcpu);</div><div class='del'>-</div><div class='ctx'> 	kvm_arm_pvtime_vcpu_init(&amp;vcpu-&gt;arch);</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.hw_mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='hunk'>@@ -494,7 +493,11 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return kvm_share_hyp(vcpu, vcpu + 1);</div><div class='add'>+	err = kvm_share_hyp(vcpu, vcpu + 1);</div><div class='add'>+	if (err)</div><div class='add'>+		kvm_vgic_vcpu_destroy(vcpu);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -503,10 +506,10 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (vcpu_has_run_once(vcpu) &amp;&amp; unlikely(!irqchip_in_kernel(vcpu-&gt;kvm)))</div><div class='del'>-		static_branch_dec(&amp;userspace_irqchip_in_use);</div><div class='del'>-</div><div class='del'>-	kvm_mmu_free_memory_cache(&amp;vcpu-&gt;arch.mmu_page_cache);</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		kvm_mmu_free_memory_cache(&amp;vcpu-&gt;arch.mmu_page_cache);</div><div class='add'>+	else</div><div class='add'>+		free_hyp_memcache(&amp;vcpu-&gt;arch.pkvm_memcache);</div><div class='ctx'> 	kvm_timer_vcpu_terminate(vcpu);</div><div class='ctx'> 	kvm_pmu_vcpu_destroy(vcpu);</div><div class='ctx'> 	kvm_vgic_vcpu_destroy(vcpu);</div><div class='hunk'>@@ -530,7 +533,7 @@ static void vcpu_set_pauth_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * Either we're running an L2 guest, and the API/APK bits come</div><div class='ctx'> 		 * from L1's HCR_EL2, or API/APK are both set.</div><div class='ctx'> 		 */</div><div class='del'>-		if (unlikely(vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu))) {</div><div class='add'>+		if (unlikely(is_nested_ctxt(vcpu))) {</div><div class='ctx'> 			u64 val;</div><div class='ctx'> </div><div class='ctx'> 			val = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='hunk'>@@ -578,6 +581,9 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> 	struct kvm_s2_mmu *mmu;</div><div class='ctx'> 	int *last_ran;</div><div class='ctx'> </div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		goto nommu;</div><div class='add'>+</div><div class='ctx'> 	if (vcpu_has_nv(vcpu))</div><div class='ctx'> 		kvm_vcpu_load_hw_mmu(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -585,6 +591,16 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> 	last_ran = this_cpu_ptr(mmu-&gt;last_vcpu_ran);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Ensure a VMID is allocated for the MMU before programming VTTBR_EL2,</div><div class='add'>+	 * which happens eagerly in VHE.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, the VMID allocator only preserves VMIDs that are active at the</div><div class='add'>+	 * time of rollover, so KVM might need to grab a new VMID for the MMU if</div><div class='add'>+	 * this is called from kvm_sched_in().</div><div class='add'>+	 */</div><div class='add'>+	kvm_arm_vmid_update(&amp;mmu-&gt;vmid);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * We guarantee that both TLBs and I-cache are private to each</div><div class='ctx'> 	 * vcpu. If detecting that a vcpu from the same VM has</div><div class='ctx'> 	 * previously run on the same physical CPU, call into the</div><div class='hunk'>@@ -598,10 +614,16 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> 		*last_ran = vcpu-&gt;vcpu_idx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+nommu:</div><div class='ctx'> 	vcpu-&gt;cpu = cpu;</div><div class='ctx'> </div><div class='del'>-	kvm_vgic_load(vcpu);</div><div class='add'>+	/*</div><div class='add'>+	 * The timer must be loaded before the vgic to correctly set up physical</div><div class='add'>+	 * interrupt deactivation in nested state (e.g. timer interrupt).</div><div class='add'>+	 */</div><div class='ctx'> 	kvm_timer_vcpu_load(vcpu);</div><div class='add'>+	kvm_vgic_load(vcpu);</div><div class='add'>+	kvm_vcpu_load_debug(vcpu);</div><div class='ctx'> 	if (has_vhe())</div><div class='ctx'> 		kvm_vcpu_load_vhe(vcpu);</div><div class='ctx'> 	kvm_arch_vcpu_load_fp(vcpu);</div><div class='hunk'>@@ -621,7 +643,13 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> </div><div class='ctx'> 	vcpu_set_pauth_traps(vcpu);</div><div class='ctx'> </div><div class='del'>-	kvm_arch_vcpu_load_debug_state_flags(vcpu);</div><div class='add'>+	if (is_protected_kvm_enabled()) {</div><div class='add'>+		kvm_call_hyp_nvhe(__pkvm_vcpu_load,</div><div class='add'>+				  vcpu-&gt;kvm-&gt;arch.pkvm.handle,</div><div class='add'>+				  vcpu-&gt;vcpu_idx, vcpu-&gt;arch.hcr_el2);</div><div class='add'>+		kvm_call_hyp(__vgic_v3_restore_vmcr_aprs,</div><div class='add'>+			     &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cpumask_test_cpu(cpu, vcpu-&gt;kvm-&gt;arch.supported_cpus))</div><div class='ctx'> 		vcpu_set_on_unsupported_cpu(vcpu);</div><div class='hunk'>@@ -629,7 +657,13 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	kvm_arch_vcpu_put_debug_state_flags(vcpu);</div><div class='add'>+	if (is_protected_kvm_enabled()) {</div><div class='add'>+		kvm_call_hyp(__vgic_v3_save_vmcr_aprs,</div><div class='add'>+			     &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3);</div><div class='add'>+		kvm_call_hyp_nvhe(__pkvm_vcpu_put);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_vcpu_put_debug(vcpu);</div><div class='ctx'> 	kvm_arch_vcpu_put_fp(vcpu);</div><div class='ctx'> 	if (has_vhe())</div><div class='ctx'> 		kvm_vcpu_put_vhe(vcpu);</div><div class='hunk'>@@ -718,7 +752,8 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,</div><div class='ctx'>  */</div><div class='ctx'> int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)</div><div class='ctx'> {</div><div class='del'>-	bool irq_lines = *vcpu_hcr(v) &amp; (HCR_VI | HCR_VF);</div><div class='add'>+	bool irq_lines = *vcpu_hcr(v) &amp; (HCR_VI | HCR_VF | HCR_VSE);</div><div class='add'>+</div><div class='ctx'> 	return ((irq_lines || kvm_vgic_vcpu_pending_irq(v))</div><div class='ctx'> 		&amp;&amp; !kvm_arm_vcpu_stopped(v) &amp;&amp; !v-&gt;arch.pause);</div><div class='ctx'> }</div><div class='hunk'>@@ -803,17 +838,11 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!kvm_arm_vcpu_is_finalized(vcpu))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_arch_vcpu_run_map_fp(vcpu);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	if (likely(vcpu_has_run_once(vcpu)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	kvm_init_mpidr_data(kvm);</div><div class='ctx'> </div><div class='del'>-	kvm_arm_vcpu_init_debug(vcpu);</div><div class='del'>-</div><div class='ctx'> 	if (likely(irqchip_in_kernel(kvm))) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Map the VGIC hardware resources before running a vcpu the</div><div class='hunk'>@@ -828,6 +857,16 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	if (vcpu_has_nv(vcpu)) {</div><div class='add'>+		ret = kvm_vcpu_allocate_vncr_tlb(vcpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = kvm_vgic_vcpu_nv_init(vcpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This needs to happen after any restriction has been applied</div><div class='ctx'> 	 * to the feature set.</div><div class='hunk'>@@ -838,32 +877,22 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_arm_pmu_v3_enable(vcpu);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (kvm_vcpu_has_pmu(vcpu)) {</div><div class='add'>+		ret = kvm_arm_pmu_v3_enable(vcpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (is_protected_kvm_enabled()) {</div><div class='ctx'> 		ret = pkvm_create_hyp_vm(kvm);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!irqchip_in_kernel(kvm)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Tell the rest of the code that there are userspace irqchip</div><div class='del'>-		 * VMs in the wild.</div><div class='del'>-		 */</div><div class='del'>-		static_branch_inc(&amp;userspace_irqchip_in_use);</div><div class='add'>+		ret = pkvm_create_hyp_vcpu(vcpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initialize traps for protected VMs.</div><div class='del'>-	 * NOTE: Move to run in EL2 directly, rather than via a hypercall, once</div><div class='del'>-	 * the code is in place for first run initialization at EL2.</div><div class='del'>-	 */</div><div class='del'>-	if (kvm_vm_is_protected(kvm))</div><div class='del'>-		kvm_call_hyp_nvhe(__pkvm_vcpu_init_traps, vcpu);</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> 	set_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &amp;kvm-&gt;arch.flags);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='hunk'>@@ -997,6 +1026,9 @@ static int kvm_vcpu_suspend(struct kvm_vcpu *vcpu)</div><div class='ctx'> static int check_vcpu_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_request_pending(vcpu)) {</div><div class='add'>+		if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu))</div><div class='add'>+			return -EIO;</div><div class='add'>+</div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_SLEEP, vcpu))</div><div class='ctx'> 			kvm_vcpu_sleep(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -1031,6 +1063,8 @@ static int check_vcpu_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_dirty_ring_check_request(vcpu))</div><div class='ctx'> 			return 0;</div><div class='add'>+</div><div class='add'>+		check_nested_vcpu_requests(vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -1072,7 +1106,7 @@ static bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu, int *ret)</div><div class='ctx'> 	 * state gets updated in kvm_timer_update_run and</div><div class='ctx'> 	 * kvm_pmu_update_run below).</div><div class='ctx'> 	 */</div><div class='del'>-	if (static_branch_unlikely(&amp;userspace_irqchip_in_use)) {</div><div class='add'>+	if (unlikely(!irqchip_in_kernel(vcpu-&gt;kvm))) {</div><div class='ctx'> 		if (kvm_timer_should_notify_user(vcpu) ||</div><div class='ctx'> 		    kvm_pmu_should_notify_user(vcpu)) {</div><div class='ctx'> 			*ret = -EINTR;</div><div class='hunk'>@@ -1148,7 +1182,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Check conditions before entering the guest</div><div class='ctx'> 		 */</div><div class='del'>-		ret = xfer_to_guest_mode_handle_work(vcpu);</div><div class='add'>+		ret = kvm_xfer_to_guest_mode_handle_work(vcpu);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -1162,19 +1196,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 */</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The VMID allocator only tracks active VMIDs per</div><div class='del'>-		 * physical CPU, and therefore the VMID allocated may not be</div><div class='del'>-		 * preserved on VMID roll-over if the task was preempted,</div><div class='del'>-		 * making a thread's VMID inactive. So we need to call</div><div class='del'>-		 * kvm_arm_vmid_update() in non-premptible context.</div><div class='del'>-		 */</div><div class='del'>-		if (kvm_arm_vmid_update(&amp;vcpu-&gt;arch.hw_mmu-&gt;vmid) &amp;&amp;</div><div class='del'>-		    has_vhe())</div><div class='del'>-			__load_stage2(vcpu-&gt;arch.hw_mmu,</div><div class='del'>-				      vcpu-&gt;arch.hw_mmu-&gt;arch);</div><div class='add'>+		kvm_nested_flush_hwstate(vcpu);</div><div class='ctx'> </div><div class='del'>-		kvm_pmu_flush_hwstate(vcpu);</div><div class='add'>+		if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+			kvm_pmu_flush_hwstate(vcpu);</div><div class='ctx'> </div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='hunk'>@@ -1193,8 +1218,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		if (ret &lt;= 0 || kvm_vcpu_exit_request(vcpu, &amp;ret)) {</div><div class='ctx'> 			vcpu-&gt;mode = OUTSIDE_GUEST_MODE;</div><div class='ctx'> 			isb(); /* Ensure work in x_flush_hwstate is committed */</div><div class='del'>-			kvm_pmu_sync_hwstate(vcpu);</div><div class='del'>-			if (static_branch_unlikely(&amp;userspace_irqchip_in_use))</div><div class='add'>+			if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+				kvm_pmu_sync_hwstate(vcpu);</div><div class='add'>+			if (unlikely(!irqchip_in_kernel(vcpu-&gt;kvm)))</div><div class='ctx'> 				kvm_timer_sync_user(vcpu);</div><div class='ctx'> 			kvm_vgic_sync_hwstate(vcpu);</div><div class='ctx'> 			local_irq_enable();</div><div class='hunk'>@@ -1202,7 +1228,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		kvm_arm_setup_debug(vcpu);</div><div class='ctx'> 		kvm_arch_vcpu_ctxflush_fp(vcpu);</div><div class='ctx'> </div><div class='ctx'> 		/**************************************************************</div><div class='hunk'>@@ -1219,14 +1244,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * Back from guest</div><div class='ctx'> 		 *************************************************************/</div><div class='ctx'> </div><div class='del'>-		kvm_arm_clear_debug(vcpu);</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We must sync the PMU state before the vgic state so</div><div class='ctx'> 		 * that the vgic can properly sample the updated state of the</div><div class='ctx'> 		 * interrupt line.</div><div class='ctx'> 		 */</div><div class='del'>-		kvm_pmu_sync_hwstate(vcpu);</div><div class='add'>+		if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+			kvm_pmu_sync_hwstate(vcpu);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Sync the vgic state before syncing the timer state because</div><div class='hunk'>@@ -1240,9 +1264,12 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * we don't want vtimer interrupts to race with syncing the</div><div class='ctx'> 		 * timer virtual interrupt state.</div><div class='ctx'> 		 */</div><div class='del'>-		if (static_branch_unlikely(&amp;userspace_irqchip_in_use))</div><div class='add'>+		if (unlikely(!irqchip_in_kernel(vcpu-&gt;kvm)))</div><div class='ctx'> 			kvm_timer_sync_user(vcpu);</div><div class='ctx'> </div><div class='add'>+		if (is_hyp_ctxt(vcpu))</div><div class='add'>+			kvm_timer_sync_nested(vcpu);</div><div class='add'>+</div><div class='ctx'> 		kvm_arch_vcpu_ctxsync_fp(vcpu);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1270,6 +1297,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		/* Exit types that need handling before we can be preempted */</div><div class='ctx'> 		handle_exit_early(vcpu, ret);</div><div class='ctx'> </div><div class='add'>+		kvm_nested_sync_hwstate(vcpu);</div><div class='add'>+</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1412,7 +1441,7 @@ static unsigned long system_supported_vcpu_features(void)</div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_32BIT_EL1))</div><div class='ctx'> 		clear_bit(KVM_ARM_VCPU_EL1_32BIT, &amp;features);</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3())</div><div class='add'>+	if (!kvm_supports_guest_pmuv3())</div><div class='ctx'> 		clear_bit(KVM_ARM_VCPU_PMU_V3, &amp;features);</div><div class='ctx'> </div><div class='ctx'> 	if (!system_supports_sve())</div><div class='hunk'>@@ -1586,7 +1615,6 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vcpu_reset_hcr(vcpu);</div><div class='del'>-	vcpu-&gt;arch.cptr_el2 = kvm_get_reset_cptr_el2(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Handle the "start in power-off" case.</div><div class='hunk'>@@ -1909,49 +1937,6 @@ int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* unlocks vcpus from @vcpu_lock_idx and smaller */</div><div class='del'>-static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)</div><div class='del'>-{</div><div class='del'>-	struct kvm_vcpu *tmp_vcpu;</div><div class='del'>-</div><div class='del'>-	for (; vcpu_lock_idx &gt;= 0; vcpu_lock_idx--) {</div><div class='del'>-		tmp_vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx);</div><div class='del'>-		mutex_unlock(&amp;tmp_vcpu-&gt;mutex);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void unlock_all_vcpus(struct kvm *kvm)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;kvm-&gt;lock);</div><div class='del'>-</div><div class='del'>-	unlock_vcpus(kvm, atomic_read(&amp;kvm-&gt;online_vcpus) - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Returns true if all vcpus were locked, false otherwise */</div><div class='del'>-bool lock_all_vcpus(struct kvm *kvm)</div><div class='del'>-{</div><div class='del'>-	struct kvm_vcpu *tmp_vcpu;</div><div class='del'>-	unsigned long c;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;kvm-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Any time a vcpu is in an ioctl (including running), the</div><div class='del'>-	 * core KVM code tries to grab the vcpu-&gt;mutex.</div><div class='del'>-	 *</div><div class='del'>-	 * By grabbing the vcpu-&gt;mutex of all VCPUs we ensure that no</div><div class='del'>-	 * other VCPUs can fiddle with the state while we access it.</div><div class='del'>-	 */</div><div class='del'>-	kvm_for_each_vcpu(c, tmp_vcpu, kvm) {</div><div class='del'>-		if (!mutex_trylock(&amp;tmp_vcpu-&gt;mutex)) {</div><div class='del'>-			unlock_vcpus(kvm, c - 1);</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned long nvhe_percpu_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) -</div><div class='hunk'>@@ -2005,7 +1990,6 @@ static int kvm_init_vector_slots(void)</div><div class='ctx'> static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu);</div><div class='del'>-	u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);</div><div class='ctx'> 	unsigned long tcr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2021,17 +2005,17 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)</div><div class='ctx'> </div><div class='ctx'> 	tcr = read_sysreg(tcr_el1);</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_KVM_HVHE)) {</div><div class='add'>+		tcr &amp;= ~(TCR_HD | TCR_HA | TCR_A1 | TCR_T0SZ_MASK);</div><div class='ctx'> 		tcr |= TCR_EPD1_MASK;</div><div class='ctx'> 	} else {</div><div class='add'>+		unsigned long ips = FIELD_GET(TCR_IPS_MASK, tcr);</div><div class='add'>+</div><div class='ctx'> 		tcr &amp;= TCR_EL2_MASK;</div><div class='del'>-		tcr |= TCR_EL2_RES1;</div><div class='add'>+		tcr |= TCR_EL2_RES1 | FIELD_PREP(TCR_EL2_PS_MASK, ips);</div><div class='add'>+		if (lpa2_is_enabled())</div><div class='add'>+			tcr |= TCR_EL2_DS;</div><div class='ctx'> 	}</div><div class='del'>-	tcr &amp;= ~TCR_T0SZ_MASK;</div><div class='ctx'> 	tcr |= TCR_T0SZ(hyp_va_bits);</div><div class='del'>-	tcr &amp;= ~TCR_EL2_PS_MASK;</div><div class='del'>-	tcr |= FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0));</div><div class='del'>-	if (kvm_lpa2_is_enabled())</div><div class='del'>-		tcr |= TCR_EL2_DS;</div><div class='ctx'> 	params-&gt;tcr_el2 = tcr;</div><div class='ctx'> </div><div class='ctx'> 	params-&gt;pgd_pa = kvm_mmu_get_httbr();</div><div class='hunk'>@@ -2124,6 +2108,7 @@ static void cpu_set_hyp_vector(void)</div><div class='ctx'> static void cpu_hyp_init_context(void)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_init_host_cpu_context(host_data_ptr(host_ctxt));</div><div class='add'>+	kvm_init_host_debug_data();</div><div class='ctx'> </div><div class='ctx'> 	if (!is_kernel_in_hyp_mode())</div><div class='ctx'> 		cpu_init_hyp_mode();</div><div class='hunk'>@@ -2132,10 +2117,11 @@ static void cpu_hyp_init_context(void)</div><div class='ctx'> static void cpu_hyp_init_features(void)</div><div class='ctx'> {</div><div class='ctx'> 	cpu_set_hyp_vector();</div><div class='del'>-	kvm_arm_init_debug();</div><div class='ctx'> </div><div class='del'>-	if (is_kernel_in_hyp_mode())</div><div class='add'>+	if (is_kernel_in_hyp_mode()) {</div><div class='ctx'> 		kvm_timer_init_vhe();</div><div class='add'>+		kvm_debug_init_vhe();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (vgic_present)</div><div class='ctx'> 		kvm_vgic_init_cpu_hardware();</div><div class='hunk'>@@ -2158,7 +2144,7 @@ static void cpu_hyp_init(void *discard)</div><div class='ctx'> </div><div class='ctx'> static void cpu_hyp_uninit(void *discard)</div><div class='ctx'> {</div><div class='del'>-	if (__this_cpu_read(kvm_hyp_initialized)) {</div><div class='add'>+	if (!is_protected_kvm_enabled() &amp;&amp; __this_cpu_read(kvm_hyp_initialized)) {</div><div class='ctx'> 		cpu_hyp_reset();</div><div class='ctx'> 		__this_cpu_write(kvm_hyp_initialized, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2315,6 +2301,19 @@ static int __init init_subsystems(void)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -ENODEV:</div><div class='ctx'> 	case -ENXIO:</div><div class='add'>+		/*</div><div class='add'>+		 * No VGIC? No pKVM for you.</div><div class='add'>+		 *</div><div class='add'>+		 * Protected mode assumes that VGICv3 is present, so no point</div><div class='add'>+		 * in trying to hobble along if vgic initialization fails.</div><div class='add'>+		 */</div><div class='add'>+		if (is_protected_kvm_enabled())</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Otherwise, userspace could choose to implement a GIC for its</div><div class='add'>+		 * guest on non-cooperative hardware.</div><div class='add'>+		 */</div><div class='ctx'> 		vgic_present = false;</div><div class='ctx'> 		err = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2322,6 +2321,14 @@ static int __init init_subsystems(void)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (kvm_mode == KVM_MODE_NV &amp;&amp;</div><div class='add'>+		!(vgic_present &amp;&amp; (kvm_vgic_global_state.type == VGIC_V3 ||</div><div class='add'>+				   kvm_vgic_global_state.has_gcie_v3_compat))) {</div><div class='add'>+		kvm_err("NV support requires GICv3 or GICv5 with legacy support, giving up\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Init HYP architected timer support</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2354,8 +2361,13 @@ static void __init teardown_hyp_mode(void)</div><div class='ctx'> </div><div class='ctx'> 	free_hyp_pgds();</div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='del'>-		free_page(per_cpu(kvm_arm_hyp_stack_page, cpu));</div><div class='del'>-		free_pages(kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu], nvhe_percpu_order());</div><div class='add'>+		if (per_cpu(kvm_hyp_initialized, cpu))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		free_pages(per_cpu(kvm_arm_hyp_stack_base, cpu), NVHE_STACK_SHIFT - PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+		if (!kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu])</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (free_sve) {</div><div class='ctx'> 			struct cpu_sve_state *sve_state;</div><div class='hunk'>@@ -2363,6 +2375,9 @@ static void __init teardown_hyp_mode(void)</div><div class='ctx'> 			sve_state = per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)-&gt;sve_state;</div><div class='ctx'> 			free_pages((unsigned long) sve_state, pkvm_host_sve_state_order());</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		free_pages(kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu], nvhe_percpu_order());</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2401,12 +2416,12 @@ static u64 get_hyp_id_aa64pfr0_el1(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	u64 val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);</div><div class='ctx'> </div><div class='del'>-	val &amp;= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) |</div><div class='del'>-		 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3));</div><div class='add'>+	val &amp;= ~(ID_AA64PFR0_EL1_CSV2 |</div><div class='add'>+		 ID_AA64PFR0_EL1_CSV3);</div><div class='ctx'> </div><div class='del'>-	val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2),</div><div class='add'>+	val |= FIELD_PREP(ID_AA64PFR0_EL1_CSV2,</div><div class='ctx'> 			  arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED);</div><div class='del'>-	val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3),</div><div class='add'>+	val |= FIELD_PREP(ID_AA64PFR0_EL1_CSV3,</div><div class='ctx'> 			  arm64_get_meltdown_state() == SPECTRE_UNAFFECTED);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -2425,6 +2440,26 @@ static void kvm_hyp_init_symbols(void)</div><div class='ctx'> 	kvm_nvhe_sym(id_aa64smfr0_el1_sys_val) = read_sanitised_ftr_reg(SYS_ID_AA64SMFR0_EL1);</div><div class='ctx'> 	kvm_nvhe_sym(__icache_flags) = __icache_flags;</div><div class='ctx'> 	kvm_nvhe_sym(kvm_arm_vmid_bits) = kvm_arm_vmid_bits;</div><div class='add'>+</div><div class='add'>+	/* Propagate the FGT state to the the nVHE side */</div><div class='add'>+	kvm_nvhe_sym(hfgrtr_masks)  = hfgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgwtr_masks)  = hfgwtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgitr_masks)  = hfgitr_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgrtr_masks) = hdfgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgwtr_masks) = hdfgwtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hafgrtr_masks) = hafgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgrtr2_masks) = hfgrtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgwtr2_masks) = hfgwtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgitr2_masks) = hfgitr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgrtr2_masks)= hdfgrtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgwtr2_masks)= hdfgwtr2_masks;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Flush entire BSS since part of its data containing init symbols is read</div><div class='add'>+	 * while the MMU is off.</div><div class='add'>+	 */</div><div class='add'>+	kvm_flush_dcache_to_poc(kvm_ksym_ref(__hyp_bss_start),</div><div class='add'>+				kvm_ksym_ref(__hyp_bss_end) - kvm_ksym_ref(__hyp_bss_start));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init kvm_hyp_init_protection(u32 hyp_va_bits)</div><div class='hunk'>@@ -2486,14 +2521,6 @@ static void finalize_init_hyp_mode(void)</div><div class='ctx'> 			per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)-&gt;sve_state =</div><div class='ctx'> 				kern_hyp_va(sve_state);</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		for_each_possible_cpu(cpu) {</div><div class='del'>-			struct user_fpsimd_state *fpsimd_state;</div><div class='del'>-</div><div class='del'>-			fpsimd_state = &amp;per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)-&gt;host_ctxt.fp_regs;</div><div class='del'>-			per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)-&gt;fpsimd_state =</div><div class='del'>-				kern_hyp_va(fpsimd_state);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2542,15 +2569,15 @@ static int __init init_hyp_mode(void)</div><div class='ctx'> 	 * Allocate stack pages for Hypervisor-mode</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='del'>-		unsigned long stack_page;</div><div class='add'>+		unsigned long stack_base;</div><div class='ctx'> </div><div class='del'>-		stack_page = __get_free_page(GFP_KERNEL);</div><div class='del'>-		if (!stack_page) {</div><div class='add'>+		stack_base = __get_free_pages(GFP_KERNEL, NVHE_STACK_SHIFT - PAGE_SHIFT);</div><div class='add'>+		if (!stack_base) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto out_err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		per_cpu(kvm_arm_hyp_stack_page, cpu) = stack_page;</div><div class='add'>+		per_cpu(kvm_arm_hyp_stack_base, cpu) = stack_base;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2581,6 +2608,13 @@ static int __init init_hyp_mode(void)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = create_hyp_mappings(kvm_ksym_ref(__hyp_data_start),</div><div class='add'>+				  kvm_ksym_ref(__hyp_data_end), PAGE_HYP);</div><div class='add'>+	if (err) {</div><div class='add'>+		kvm_err("Cannot map .hyp.data section\n");</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start),</div><div class='ctx'> 				  kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2619,9 +2653,9 @@ static int __init init_hyp_mode(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu);</div><div class='del'>-		char *stack_page = (char *)per_cpu(kvm_arm_hyp_stack_page, cpu);</div><div class='add'>+		char *stack_base = (char *)per_cpu(kvm_arm_hyp_stack_base, cpu);</div><div class='ctx'> </div><div class='del'>-		err = create_hyp_stack(__pa(stack_page), &amp;params-&gt;stack_hyp_va);</div><div class='add'>+		err = create_hyp_stack(__pa(stack_base), &amp;params-&gt;stack_hyp_va);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			kvm_err("Cannot map hyp stack\n");</div><div class='ctx'> 			goto out_err;</div><div class='hunk'>@@ -2633,7 +2667,7 @@ static int __init init_hyp_mode(void)</div><div class='ctx'> 		 * __hyp_pa() won't do the right thing there, since the stack</div><div class='ctx'> 		 * has been mapped in the flexible private VA space.</div><div class='ctx'> 		 */</div><div class='del'>-		params-&gt;stack_pa = __pa(stack_page);</div><div class='add'>+		params-&gt;stack_pa = __pa(stack_base);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='hunk'>@@ -2720,28 +2754,54 @@ bool kvm_arch_irqchip_in_kernel(struct kvm *kvm)</div><div class='ctx'> 	return irqchip_in_kernel(kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool kvm_arch_has_irq_bypass(void)</div><div class='del'>-{</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 				      struct irq_bypass_producer *prod)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_kernel_irqfd *irqfd =</div><div class='ctx'> 		container_of(cons, struct kvm_kernel_irqfd, consumer);</div><div class='add'>+	struct kvm_kernel_irq_routing_entry *irq_entry = &amp;irqfd-&gt;irq_entry;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The only thing we have a chance of directly-injecting is LPIs. Maybe</div><div class='add'>+	 * one day...</div><div class='add'>+	 */</div><div class='add'>+	if (irq_entry-&gt;type != KVM_IRQ_ROUTING_MSI)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return kvm_vgic_v4_set_forwarding(irqfd-&gt;kvm, prod-&gt;irq,</div><div class='ctx'> 					  &amp;irqfd-&gt;irq_entry);</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 				      struct irq_bypass_producer *prod)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_kernel_irqfd *irqfd =</div><div class='ctx'> 		container_of(cons, struct kvm_kernel_irqfd, consumer);</div><div class='add'>+	struct kvm_kernel_irq_routing_entry *irq_entry = &amp;irqfd-&gt;irq_entry;</div><div class='add'>+</div><div class='add'>+	if (irq_entry-&gt;type != KVM_IRQ_ROUTING_MSI)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm_vgic_v4_unset_forwarding(irqfd-&gt;kvm, prod-&gt;irq);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	kvm_vgic_v4_unset_forwarding(irqfd-&gt;kvm, prod-&gt;irq,</div><div class='del'>-				     &amp;irqfd-&gt;irq_entry);</div><div class='add'>+void kvm_arch_update_irqfd_routing(struct kvm_kernel_irqfd *irqfd,</div><div class='add'>+				   struct kvm_kernel_irq_routing_entry *old,</div><div class='add'>+				   struct kvm_kernel_irq_routing_entry *new)</div><div class='add'>+{</div><div class='add'>+	if (old-&gt;type == KVM_IRQ_ROUTING_MSI &amp;&amp;</div><div class='add'>+	    new-&gt;type == KVM_IRQ_ROUTING_MSI &amp;&amp;</div><div class='add'>+	    !memcmp(&amp;old-&gt;msi, &amp;new-&gt;msi, sizeof(new-&gt;msi)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Remapping the vLPI requires taking the its_lock mutex to resolve</div><div class='add'>+	 * the new translation. We're in spinlock land at this point, so no</div><div class='add'>+	 * chance of resolving the translation.</div><div class='add'>+	 *</div><div class='add'>+	 * Unmap the vLPI and fall back to software LPI injection.</div><div class='add'>+	 */</div><div class='add'>+	return kvm_vgic_v4_unset_forwarding(irqfd-&gt;kvm, irqfd-&gt;producer-&gt;irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_irq_bypass_stop(struct irq_bypass_consumer *cons)</div><div class='hunk'>@@ -2819,11 +2879,12 @@ static __init int kvm_arm_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_hyp;</div><div class='ctx'> </div><div class='del'>-	kvm_info("%s%sVHE mode initialized successfully\n",</div><div class='add'>+	kvm_info("%s%sVHE%s mode initialized successfully\n",</div><div class='ctx'> 		 in_hyp_mode ? "" : (is_protected_kvm_enabled() ?</div><div class='ctx'> 				     "Protected " : "Hyp "),</div><div class='ctx'> 		 in_hyp_mode ? "" : (cpus_have_final_cap(ARM64_KVM_HVHE) ?</div><div class='del'>-				     "h" : "n"));</div><div class='add'>+				     "h" : "n"),</div><div class='add'>+		 cpus_have_final_cap(ARM64_HAS_NESTED_VIRT) ? "+NV2": "");</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: Do something reasonable if kvm_init() fails after pKVM</div><div class='head'>diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c<br/>index 39f0e87a340e..20bb9af125b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/at.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/at.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/at.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/at.c</a></div><div class='hunk'>@@ -10,48 +10,11 @@</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> </div><div class='del'>-enum trans_regime {</div><div class='del'>-	TR_EL10,</div><div class='del'>-	TR_EL20,</div><div class='del'>-	TR_EL2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct s1_walk_info {</div><div class='del'>-	u64	     		baddr;</div><div class='del'>-	enum trans_regime	regime;</div><div class='del'>-	unsigned int		max_oa_bits;</div><div class='del'>-	unsigned int		pgshift;</div><div class='del'>-	unsigned int		txsz;</div><div class='del'>-	int 	     		sl;</div><div class='del'>-	bool	     		hpd;</div><div class='del'>-	bool	     		be;</div><div class='del'>-	bool	     		s2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct s1_walk_result {</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u64	desc;</div><div class='del'>-			u64	pa;</div><div class='del'>-			s8	level;</div><div class='del'>-			u8	APTable;</div><div class='del'>-			bool	UXNTable;</div><div class='del'>-			bool	PXNTable;</div><div class='del'>-		};</div><div class='del'>-		struct {</div><div class='del'>-			u8	fst;</div><div class='del'>-			bool	ptw;</div><div class='del'>-			bool	s2;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-	bool	failed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool ptw, bool s2)</div><div class='add'>+static void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool s1ptw)</div><div class='ctx'> {</div><div class='ctx'> 	wr-&gt;fst		= fst;</div><div class='del'>-	wr-&gt;ptw		= ptw;</div><div class='del'>-	wr-&gt;s2		= s2;</div><div class='add'>+	wr-&gt;ptw		= s1ptw;</div><div class='add'>+	wr-&gt;s2		= s1ptw;</div><div class='ctx'> 	wr-&gt;failed	= true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -65,9 +28,57 @@ static int get_ia_size(struct s1_walk_info *wi)</div><div class='ctx'> /* Return true if the IPA is out of the OA range */</div><div class='ctx'> static bool check_output_size(u64 ipa, struct s1_walk_info *wi)</div><div class='ctx'> {</div><div class='add'>+	if (wi-&gt;pa52bit)</div><div class='add'>+		return wi-&gt;max_oa_bits &lt; 52 &amp;&amp; (ipa &amp; GENMASK_ULL(51, wi-&gt;max_oa_bits));</div><div class='ctx'> 	return wi-&gt;max_oa_bits &lt; 48 &amp;&amp; (ipa &amp; GENMASK_ULL(47, wi-&gt;max_oa_bits));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool has_52bit_pa(struct kvm_vcpu *vcpu, struct s1_walk_info *wi, u64 tcr)</div><div class='add'>+{</div><div class='add'>+	switch (BIT(wi-&gt;pgshift)) {</div><div class='add'>+	case SZ_64K:</div><div class='add'>+	default:		/* IMPDEF: treat any other value as 64k */</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, PARANGE, 52))</div><div class='add'>+			return false;</div><div class='add'>+		return ((wi-&gt;regime == TR_EL2 ?</div><div class='add'>+			 FIELD_GET(TCR_EL2_PS_MASK, tcr) :</div><div class='add'>+			 FIELD_GET(TCR_IPS_MASK, tcr)) == 0b0110);</div><div class='add'>+	case SZ_16K:</div><div class='add'>+		if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case SZ_4K:</div><div class='add'>+		if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (tcr &amp; (wi-&gt;regime == TR_EL2 ? TCR_EL2_DS : TCR_DS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 desc_to_oa(struct s1_walk_info *wi, u64 desc)</div><div class='add'>+{</div><div class='add'>+	u64 addr;</div><div class='add'>+</div><div class='add'>+	if (!wi-&gt;pa52bit)</div><div class='add'>+		return desc &amp; GENMASK_ULL(47, wi-&gt;pgshift);</div><div class='add'>+</div><div class='add'>+	switch (BIT(wi-&gt;pgshift)) {</div><div class='add'>+	case SZ_4K:</div><div class='add'>+	case SZ_16K:</div><div class='add'>+		addr = desc &amp; GENMASK_ULL(49, wi-&gt;pgshift);</div><div class='add'>+		addr |= FIELD_GET(KVM_PTE_ADDR_51_50_LPA2, desc) &lt;&lt; 50;</div><div class='add'>+		break;</div><div class='add'>+	case SZ_64K:</div><div class='add'>+	default:	    /* IMPDEF: treat any other value as 64k */</div><div class='add'>+		addr = desc &amp; GENMASK_ULL(47, wi-&gt;pgshift);</div><div class='add'>+		addr |= FIELD_GET(KVM_PTE_ADDR_51_48, desc) &lt;&lt; 48;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Return the translation regime that applies to an AT instruction */</div><div class='ctx'> static enum trans_regime compute_translation_regime(struct kvm_vcpu *vcpu, u32 op)</div><div class='ctx'> {</div><div class='hunk'>@@ -87,24 +98,61 @@ static enum trans_regime compute_translation_regime(struct kvm_vcpu *vcpu, u32 o</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='add'>+static u64 effective_tcr2(struct kvm_vcpu *vcpu, enum trans_regime regime)</div><div class='add'>+{</div><div class='add'>+	if (regime == TR_EL10) {</div><div class='add'>+		if (vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+		    !(__vcpu_sys_reg(vcpu, HCRX_EL2) &amp; HCRX_EL2_TCR2En))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return vcpu_read_sys_reg(vcpu, TCR2_EL1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vcpu_read_sys_reg(vcpu, TCR2_EL2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool s1pie_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime)</div><div class='add'>+{</div><div class='add'>+	if (!kvm_has_s1pie(vcpu-&gt;kvm))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Abuse TCR2_EL1_PIE and use it for EL2 as well */</div><div class='add'>+	return effective_tcr2(vcpu, regime) &amp; TCR2_EL1_PIE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_s1poe(struct kvm_vcpu *vcpu, struct s1_walk_info *wi)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_s1poe(vcpu-&gt;kvm)) {</div><div class='add'>+		wi-&gt;poe = wi-&gt;e0poe = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = effective_tcr2(vcpu, wi-&gt;regime);</div><div class='add'>+</div><div class='add'>+	/* Abuse TCR2_EL1_* for EL2 */</div><div class='add'>+	wi-&gt;poe = val &amp; TCR2_EL1_POE;</div><div class='add'>+	wi-&gt;e0poe = (wi-&gt;regime != TR_EL2) &amp;&amp; (val &amp; TCR2_EL1_E0POE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			 struct s1_walk_result *wr, u64 va)</div><div class='ctx'> {</div><div class='ctx'> 	u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr;</div><div class='ctx'> 	unsigned int stride, x;</div><div class='del'>-	bool va55, tbi, lva, as_el0;</div><div class='del'>-</div><div class='del'>-	hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='del'>-</div><div class='del'>-	wi-&gt;regime = compute_translation_regime(vcpu, op);</div><div class='del'>-	as_el0 = (op == OP_AT_S1E0R || op == OP_AT_S1E0W);</div><div class='add'>+	bool va55, tbi, lva;</div><div class='ctx'> </div><div class='ctx'> 	va55 = va &amp; BIT(55);</div><div class='ctx'> </div><div class='del'>-	if (wi-&gt;regime == TR_EL2 &amp;&amp; va55)</div><div class='del'>-		goto addrsz;</div><div class='del'>-</div><div class='del'>-	wi-&gt;s2 = wi-&gt;regime == TR_EL10 &amp;&amp; (hcr &amp; (HCR_VM | HCR_DC));</div><div class='add'>+	if (vcpu_has_nv(vcpu)) {</div><div class='add'>+		hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='add'>+		wi-&gt;s2 = wi-&gt;regime == TR_EL10 &amp;&amp; (hcr &amp; (HCR_VM | HCR_DC));</div><div class='add'>+	} else {</div><div class='add'>+		WARN_ON_ONCE(wi-&gt;regime != TR_EL10);</div><div class='add'>+		wi-&gt;s2 = false;</div><div class='add'>+		hcr = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (wi-&gt;regime) {</div><div class='ctx'> 	case TR_EL10:</div><div class='hunk'>@@ -126,6 +174,46 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Someone was silly enough to encode TG0/TG1 differently */</div><div class='add'>+	if (va55 &amp;&amp; wi-&gt;regime != TR_EL2) {</div><div class='add'>+		wi-&gt;txsz = FIELD_GET(TCR_T1SZ_MASK, tcr);</div><div class='add'>+		tg = FIELD_GET(TCR_TG1_MASK, tcr);</div><div class='add'>+</div><div class='add'>+		switch (tg &lt;&lt; TCR_TG1_SHIFT) {</div><div class='add'>+		case TCR_TG1_4K:</div><div class='add'>+			wi-&gt;pgshift = 12;	 break;</div><div class='add'>+		case TCR_TG1_16K:</div><div class='add'>+			wi-&gt;pgshift = 14;	 break;</div><div class='add'>+		case TCR_TG1_64K:</div><div class='add'>+		default:	    /* IMPDEF: treat any other value as 64k */</div><div class='add'>+			wi-&gt;pgshift = 16;	 break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		wi-&gt;txsz = FIELD_GET(TCR_T0SZ_MASK, tcr);</div><div class='add'>+		tg = FIELD_GET(TCR_TG0_MASK, tcr);</div><div class='add'>+</div><div class='add'>+		switch (tg &lt;&lt; TCR_TG0_SHIFT) {</div><div class='add'>+		case TCR_TG0_4K:</div><div class='add'>+			wi-&gt;pgshift = 12;	 break;</div><div class='add'>+		case TCR_TG0_16K:</div><div class='add'>+			wi-&gt;pgshift = 14;	 break;</div><div class='add'>+		case TCR_TG0_64K:</div><div class='add'>+		default:	    /* IMPDEF: treat any other value as 64k */</div><div class='add'>+			wi-&gt;pgshift = 16;	 break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wi-&gt;pa52bit = has_52bit_pa(vcpu, wi, tcr);</div><div class='add'>+</div><div class='add'>+	ia_bits = get_ia_size(wi);</div><div class='add'>+</div><div class='add'>+	/* AArch64.S1StartLevel() */</div><div class='add'>+	stride = wi-&gt;pgshift - 3;</div><div class='add'>+	wi-&gt;sl = 3 - (((ia_bits - 1) - wi-&gt;pgshift) / stride);</div><div class='add'>+</div><div class='add'>+	if (wi-&gt;regime == TR_EL2 &amp;&amp; va55)</div><div class='add'>+		goto addrsz;</div><div class='add'>+</div><div class='ctx'> 	tbi = (wi-&gt;regime == TR_EL2 ?</div><div class='ctx'> 	       FIELD_GET(TCR_EL2_TBI, tcr) :</div><div class='ctx'> 	       (va55 ?</div><div class='hunk'>@@ -135,6 +223,12 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> 	if (!tbi &amp;&amp; (u64)sign_extend64(va, 55) != va)</div><div class='ctx'> 		goto addrsz;</div><div class='ctx'> </div><div class='add'>+	wi-&gt;sh = (wi-&gt;regime == TR_EL2 ?</div><div class='add'>+		  FIELD_GET(TCR_EL2_SH0_MASK, tcr) :</div><div class='add'>+		  (va55 ?</div><div class='add'>+		   FIELD_GET(TCR_SH1_MASK, tcr) :</div><div class='add'>+		   FIELD_GET(TCR_SH0_MASK, tcr)));</div><div class='add'>+</div><div class='ctx'> 	va = (u64)sign_extend64(va, 55);</div><div class='ctx'> </div><div class='ctx'> 	/* Let's put the MMU disabled case aside immediately */</div><div class='hunk'>@@ -180,54 +274,29 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> 		    (va55 ?</div><div class='ctx'> 		     FIELD_GET(TCR_HPD1, tcr) :</div><div class='ctx'> 		     FIELD_GET(TCR_HPD0, tcr)));</div><div class='add'>+	/* R_JHSVW */</div><div class='add'>+	wi-&gt;hpd |= s1pie_enabled(vcpu, wi-&gt;regime);</div><div class='ctx'> </div><div class='del'>-	/* Someone was silly enough to encode TG0/TG1 differently */</div><div class='del'>-	if (va55) {</div><div class='del'>-		wi-&gt;txsz = FIELD_GET(TCR_T1SZ_MASK, tcr);</div><div class='del'>-		tg = FIELD_GET(TCR_TG1_MASK, tcr);</div><div class='add'>+	/* Do we have POE? */</div><div class='add'>+	compute_s1poe(vcpu, wi);</div><div class='ctx'> </div><div class='del'>-		switch (tg &lt;&lt; TCR_TG1_SHIFT) {</div><div class='del'>-		case TCR_TG1_4K:</div><div class='del'>-			wi-&gt;pgshift = 12;	 break;</div><div class='del'>-		case TCR_TG1_16K:</div><div class='del'>-			wi-&gt;pgshift = 14;	 break;</div><div class='del'>-		case TCR_TG1_64K:</div><div class='del'>-		default:	    /* IMPDEF: treat any other value as 64k */</div><div class='del'>-			wi-&gt;pgshift = 16;	 break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		wi-&gt;txsz = FIELD_GET(TCR_T0SZ_MASK, tcr);</div><div class='del'>-		tg = FIELD_GET(TCR_TG0_MASK, tcr);</div><div class='del'>-</div><div class='del'>-		switch (tg &lt;&lt; TCR_TG0_SHIFT) {</div><div class='del'>-		case TCR_TG0_4K:</div><div class='del'>-			wi-&gt;pgshift = 12;	 break;</div><div class='del'>-		case TCR_TG0_16K:</div><div class='del'>-			wi-&gt;pgshift = 14;	 break;</div><div class='del'>-		case TCR_TG0_64K:</div><div class='del'>-		default:	    /* IMPDEF: treat any other value as 64k */</div><div class='del'>-			wi-&gt;pgshift = 16;	 break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* R_BVXDG */</div><div class='add'>+	wi-&gt;hpd |= (wi-&gt;poe || wi-&gt;e0poe);</div><div class='ctx'> </div><div class='ctx'> 	/* R_PLCGL, R_YXNYW */</div><div class='ctx'> 	if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR2_EL1, ST, 48_47)) {</div><div class='ctx'> 		if (wi-&gt;txsz &gt; 39)</div><div class='del'>-			goto transfault_l0;</div><div class='add'>+			goto transfault;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (wi-&gt;txsz &gt; 48 || (BIT(wi-&gt;pgshift) == SZ_64K &amp;&amp; wi-&gt;txsz &gt; 47))</div><div class='del'>-			goto transfault_l0;</div><div class='add'>+			goto transfault;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* R_GTJBY, R_SXWGM */</div><div class='ctx'> 	switch (BIT(wi-&gt;pgshift)) {</div><div class='ctx'> 	case SZ_4K:</div><div class='del'>-		lva = kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT);</div><div class='del'>-		lva &amp;= tcr &amp; (wi-&gt;regime == TR_EL2 ? TCR_EL2_DS : TCR_DS);</div><div class='del'>-		break;</div><div class='ctx'> 	case SZ_16K:</div><div class='del'>-		lva = kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT);</div><div class='del'>-		lva &amp;= tcr &amp; (wi-&gt;regime == TR_EL2 ? TCR_EL2_DS : TCR_DS);</div><div class='add'>+		lva = wi-&gt;pa52bit;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SZ_64K:</div><div class='ctx'> 		lva = kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR2_EL1, VARange, 52);</div><div class='hunk'>@@ -235,38 +304,42 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((lva &amp;&amp; wi-&gt;txsz &lt; 12) || (!lva &amp;&amp; wi-&gt;txsz &lt; 16))</div><div class='del'>-		goto transfault_l0;</div><div class='del'>-</div><div class='del'>-	ia_bits = get_ia_size(wi);</div><div class='add'>+		goto transfault;</div><div class='ctx'> </div><div class='ctx'> 	/* R_YYVYV, I_THCZK */</div><div class='ctx'> 	if ((!va55 &amp;&amp; va &gt; GENMASK(ia_bits - 1, 0)) ||</div><div class='ctx'> 	    (va55 &amp;&amp; va &lt; GENMASK(63, ia_bits)))</div><div class='del'>-		goto transfault_l0;</div><div class='add'>+		goto transfault;</div><div class='ctx'> </div><div class='ctx'> 	/* I_ZFSYQ */</div><div class='ctx'> 	if (wi-&gt;regime != TR_EL2 &amp;&amp;</div><div class='ctx'> 	    (tcr &amp; (va55 ? TCR_EPD1_MASK : TCR_EPD0_MASK)))</div><div class='del'>-		goto transfault_l0;</div><div class='add'>+		goto transfault;</div><div class='ctx'> </div><div class='ctx'> 	/* R_BNDVG and following statements */</div><div class='ctx'> 	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR2_EL1, E0PD, IMP) &amp;&amp;</div><div class='del'>-	    as_el0 &amp;&amp; (tcr &amp; (va55 ? TCR_E0PD1 : TCR_E0PD0)))</div><div class='del'>-		goto transfault_l0;</div><div class='del'>-</div><div class='del'>-	/* AArch64.S1StartLevel() */</div><div class='del'>-	stride = wi-&gt;pgshift - 3;</div><div class='del'>-	wi-&gt;sl = 3 - (((ia_bits - 1) - wi-&gt;pgshift) / stride);</div><div class='add'>+	    wi-&gt;as_el0 &amp;&amp; (tcr &amp; (va55 ? TCR_E0PD1 : TCR_E0PD0)))</div><div class='add'>+		goto transfault;</div><div class='ctx'> </div><div class='ctx'> 	ps = (wi-&gt;regime == TR_EL2 ?</div><div class='ctx'> 	      FIELD_GET(TCR_EL2_PS_MASK, tcr) : FIELD_GET(TCR_IPS_MASK, tcr));</div><div class='ctx'> </div><div class='del'>-	wi-&gt;max_oa_bits = min(get_kvm_ipa_limit(), ps_to_output_size(ps));</div><div class='add'>+	wi-&gt;max_oa_bits = min(get_kvm_ipa_limit(), ps_to_output_size(ps, wi-&gt;pa52bit));</div><div class='ctx'> </div><div class='ctx'> 	/* Compute minimal alignment */</div><div class='ctx'> 	x = 3 + ia_bits - ((3 - wi-&gt;sl) * stride + wi-&gt;pgshift);</div><div class='ctx'> </div><div class='ctx'> 	wi-&gt;baddr = ttbr &amp; TTBRx_EL1_BADDR;</div><div class='add'>+	if (wi-&gt;pa52bit) {</div><div class='add'>+		/*</div><div class='add'>+		 * Force the alignment on 64 bytes for top-level tables</div><div class='add'>+		 * smaller than 8 entries, since TTBR.BADDR[5:2] are used to</div><div class='add'>+		 * store bits [51:48] of the first level of lookup.</div><div class='add'>+		 */</div><div class='add'>+		x = max(x, 6);</div><div class='add'>+</div><div class='add'>+		wi-&gt;baddr |= FIELD_GET(GENMASK_ULL(5, 2), ttbr) &lt;&lt; 48;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* R_VPBBF */</div><div class='ctx'> 	if (check_output_size(wi-&gt;baddr, wi))</div><div class='hunk'>@@ -276,12 +349,17 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-addrsz:				/* Address Size Fault level 0 */</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(0), false, false);</div><div class='add'>+addrsz:</div><div class='add'>+	/*</div><div class='add'>+	 * Address Size Fault level 0 to indicate it comes from TTBR.</div><div class='add'>+	 * yes, this is an oddity.</div><div class='add'>+	 */</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(0), false);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> </div><div class='del'>-transfault_l0:			/* Translation Fault level 0 */</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(0), false, false);</div><div class='add'>+transfault:</div><div class='add'>+	/* Translation Fault on start level */</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(wi-&gt;sl), false);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -312,13 +390,13 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				fail_s1_walk(wr,</div><div class='ctx'> 					     (s2_trans.esr &amp; ~ESR_ELx_FSC_LEVEL) | level,</div><div class='del'>-					     true, true);</div><div class='add'>+					     true);</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (!kvm_s2_trans_readable(&amp;s2_trans)) {</div><div class='ctx'> 				fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level),</div><div class='del'>-					     true, true);</div><div class='add'>+					     true);</div><div class='ctx'> </div><div class='ctx'> 				return -EPERM;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -326,10 +404,20 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			ipa = kvm_s2_trans_output(&amp;s2_trans);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (wi-&gt;filter) {</div><div class='add'>+			ret = wi-&gt;filter-&gt;fn(&amp;(struct s1_walk_context)</div><div class='add'>+					     {</div><div class='add'>+						     .wi	= wi,</div><div class='add'>+						     .table_ipa	= baddr,</div><div class='add'>+						     .level	= level,</div><div class='add'>+					     }, wi-&gt;filter-&gt;priv);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		ret = kvm_read_guest(vcpu-&gt;kvm, ipa, &amp;desc, sizeof(desc));</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level),</div><div class='del'>-				     true, false);</div><div class='add'>+			fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level), false);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -357,7 +445,7 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			wr-&gt;PXNTable |= FIELD_GET(PMD_TABLE_PXN, desc);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		baddr = desc &amp; GENMASK_ULL(47, wi-&gt;pgshift);</div><div class='add'>+		baddr = desc_to_oa(wi, desc);</div><div class='ctx'> </div><div class='ctx'> 		/* Check for out-of-range OA */</div><div class='ctx'> 		if (check_output_size(baddr, wi))</div><div class='hunk'>@@ -374,11 +462,11 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> </div><div class='ctx'> 		switch (BIT(wi-&gt;pgshift)) {</div><div class='ctx'> 		case SZ_4K:</div><div class='del'>-			valid_block = level == 1 || level == 2;</div><div class='add'>+			valid_block = level == 1 || level == 2 || (wi-&gt;pa52bit &amp;&amp; level == 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SZ_16K:</div><div class='ctx'> 		case SZ_64K:</div><div class='del'>-			valid_block = level == 2;</div><div class='add'>+			valid_block = level == 2 || (wi-&gt;pa52bit &amp;&amp; level == 1);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -386,24 +474,57 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			goto transfault;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (check_output_size(desc &amp; GENMASK(47, va_bottom), wi))</div><div class='add'>+	baddr = desc_to_oa(wi, desc);</div><div class='add'>+	if (check_output_size(baddr &amp; GENMASK(52, va_bottom), wi))</div><div class='ctx'> 		goto addrsz;</div><div class='ctx'> </div><div class='add'>+	if (!(desc &amp; PTE_AF)) {</div><div class='add'>+		fail_s1_walk(wr, ESR_ELx_FSC_ACCESS_L(level), false);</div><div class='add'>+		return -EACCES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	va_bottom += contiguous_bit_shift(desc, wi, level);</div><div class='ctx'> </div><div class='ctx'> 	wr-&gt;failed = false;</div><div class='ctx'> 	wr-&gt;level = level;</div><div class='ctx'> 	wr-&gt;desc = desc;</div><div class='del'>-	wr-&gt;pa = desc &amp; GENMASK(47, va_bottom);</div><div class='add'>+	wr-&gt;pa = baddr &amp; GENMASK(52, va_bottom);</div><div class='ctx'> 	wr-&gt;pa |= va &amp; GENMASK_ULL(va_bottom - 1, 0);</div><div class='ctx'> </div><div class='add'>+	wr-&gt;nG = (wi-&gt;regime != TR_EL2) &amp;&amp; (desc &amp; PTE_NG);</div><div class='add'>+	if (wr-&gt;nG) {</div><div class='add'>+		u64 asid_ttbr, tcr;</div><div class='add'>+</div><div class='add'>+		switch (wi-&gt;regime) {</div><div class='add'>+		case TR_EL10:</div><div class='add'>+			tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);</div><div class='add'>+			asid_ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR1_EL1) :</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR0_EL1));</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL20:</div><div class='add'>+			tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+			asid_ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wr-&gt;asid = FIELD_GET(TTBR_ASID_MASK, asid_ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			wr-&gt;asid &amp;= GENMASK(7, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> addrsz:</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(level), true, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(level), false);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> transfault:</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(level), true, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(level), false);</div><div class='ctx'> 	return -ENOENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -412,10 +533,14 @@ struct mmu_config {</div><div class='ctx'> 	u64	ttbr1;</div><div class='ctx'> 	u64	tcr;</div><div class='ctx'> 	u64	mair;</div><div class='add'>+	u64	tcr2;</div><div class='add'>+	u64	pir;</div><div class='add'>+	u64	pire0;</div><div class='add'>+	u64	por_el0;</div><div class='add'>+	u64	por_el1;</div><div class='ctx'> 	u64	sctlr;</div><div class='ctx'> 	u64	vttbr;</div><div class='ctx'> 	u64	vtcr;</div><div class='del'>-	u64	hcr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __mmu_config_save(struct mmu_config *config)</div><div class='hunk'>@@ -424,16 +549,24 @@ static void __mmu_config_save(struct mmu_config *config)</div><div class='ctx'> 	config-&gt;ttbr1	= read_sysreg_el1(SYS_TTBR1);</div><div class='ctx'> 	config-&gt;tcr	= read_sysreg_el1(SYS_TCR);</div><div class='ctx'> 	config-&gt;mair	= read_sysreg_el1(SYS_MAIR);</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_TCR2)) {</div><div class='add'>+		config-&gt;tcr2	= read_sysreg_el1(SYS_TCR2);</div><div class='add'>+		if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {</div><div class='add'>+			config-&gt;pir	= read_sysreg_el1(SYS_PIR);</div><div class='add'>+			config-&gt;pire0	= read_sysreg_el1(SYS_PIRE0);</div><div class='add'>+		}</div><div class='add'>+		if (system_supports_poe()) {</div><div class='add'>+			config-&gt;por_el1	= read_sysreg_el1(SYS_POR);</div><div class='add'>+			config-&gt;por_el0	= read_sysreg_s(SYS_POR_EL0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	config-&gt;sctlr	= read_sysreg_el1(SYS_SCTLR);</div><div class='ctx'> 	config-&gt;vttbr	= read_sysreg(vttbr_el2);</div><div class='ctx'> 	config-&gt;vtcr	= read_sysreg(vtcr_el2);</div><div class='del'>-	config-&gt;hcr	= read_sysreg(hcr_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __mmu_config_restore(struct mmu_config *config)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg(config-&gt;hcr,	hcr_el2);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ARM errata 1165522 and 1530923 require TGE to be 1 before</div><div class='ctx'> 	 * we update the guest state.</div><div class='hunk'>@@ -444,6 +577,17 @@ static void __mmu_config_restore(struct mmu_config *config)</div><div class='ctx'> 	write_sysreg_el1(config-&gt;ttbr1,	SYS_TTBR1);</div><div class='ctx'> 	write_sysreg_el1(config-&gt;tcr,	SYS_TCR);</div><div class='ctx'> 	write_sysreg_el1(config-&gt;mair,	SYS_MAIR);</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_TCR2)) {</div><div class='add'>+		write_sysreg_el1(config-&gt;tcr2, SYS_TCR2);</div><div class='add'>+		if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {</div><div class='add'>+			write_sysreg_el1(config-&gt;pir, SYS_PIR);</div><div class='add'>+			write_sysreg_el1(config-&gt;pire0, SYS_PIRE0);</div><div class='add'>+		}</div><div class='add'>+		if (system_supports_poe()) {</div><div class='add'>+			write_sysreg_el1(config-&gt;por_el1, SYS_POR);</div><div class='add'>+			write_sysreg_s(config-&gt;por_el0, SYS_POR_EL0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	write_sysreg_el1(config-&gt;sctlr,	SYS_SCTLR);</div><div class='ctx'> 	write_sysreg(config-&gt;vttbr,	vttbr_el2);</div><div class='ctx'> 	write_sysreg(config-&gt;vtcr,	vtcr_el2);</div><div class='hunk'>@@ -573,21 +717,36 @@ static u8 combine_s1_s2_attr(u8 s1, u8 s2)</div><div class='ctx'> #define ATTR_OSH	0b10</div><div class='ctx'> #define ATTR_ISH	0b11</div><div class='ctx'> </div><div class='del'>-static u8 compute_sh(u8 attr, u64 desc)</div><div class='add'>+static u8 compute_final_sh(u8 attr, u8 sh)</div><div class='ctx'> {</div><div class='del'>-	u8 sh;</div><div class='del'>-</div><div class='ctx'> 	/* Any form of device, as well as NC has SH[1:0]=0b10 */</div><div class='ctx'> 	if (MEMATTR_IS_DEVICE(attr) || attr == MEMATTR(NC, NC))</div><div class='ctx'> 		return ATTR_OSH;</div><div class='ctx'> </div><div class='del'>-	sh = FIELD_GET(PTE_SHARED, desc);</div><div class='ctx'> 	if (sh == ATTR_RSV)		/* Reserved, mapped to NSH */</div><div class='ctx'> 		sh = ATTR_NSH;</div><div class='ctx'> </div><div class='ctx'> 	return sh;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 compute_s1_sh(struct s1_walk_info *wi, struct s1_walk_result *wr,</div><div class='add'>+			u8 attr)</div><div class='add'>+{</div><div class='add'>+	u8 sh;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * non-52bit and LPA have their basic shareability described in the</div><div class='add'>+	 * descriptor. LPA2 gets it from the corresponding field in TCR,</div><div class='add'>+	 * conveniently recorded in the walk info.</div><div class='add'>+	 */</div><div class='add'>+	if (!wi-&gt;pa52bit || BIT(wi-&gt;pgshift) == SZ_64K)</div><div class='add'>+		sh = FIELD_GET(KVM_PTE_LEAF_ATTR_LO_S1_SH, wr-&gt;desc);</div><div class='add'>+	else</div><div class='add'>+		sh = wi-&gt;sh;</div><div class='add'>+</div><div class='add'>+	return compute_final_sh(attr, sh);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u8 combine_sh(u8 s1_sh, u8 s2_sh)</div><div class='ctx'> {</div><div class='ctx'> 	if (s1_sh == ATTR_OSH || s2_sh == ATTR_OSH)</div><div class='hunk'>@@ -601,7 +760,7 @@ static u8 combine_sh(u8 s1_sh, u8 s2_sh)</div><div class='ctx'> static u64 compute_par_s12(struct kvm_vcpu *vcpu, u64 s1_par,</div><div class='ctx'> 			   struct kvm_s2_trans *tr)</div><div class='ctx'> {</div><div class='del'>-	u8 s1_parattr, s2_memattr, final_attr;</div><div class='add'>+	u8 s1_parattr, s2_memattr, final_attr, s2_sh;</div><div class='ctx'> 	u64 par;</div><div class='ctx'> </div><div class='ctx'> 	/* If S2 has failed to translate, report the damage */</div><div class='hunk'>@@ -644,8 +803,15 @@ static u64 compute_par_s12(struct kvm_vcpu *vcpu, u64 s1_par,</div><div class='ctx'> 			final_attr = s1_parattr;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			/* MemAttr[2]=0, Device from S2 */</div><div class='del'>-			final_attr = s2_memattr &amp; GENMASK(1,0) &lt;&lt; 2;</div><div class='add'>+			/*</div><div class='add'>+			 * MemAttr[2]=0, Device from S2.</div><div class='add'>+			 *</div><div class='add'>+			 * FWB does not influence the way that stage 1</div><div class='add'>+			 * memory types and attributes are combined</div><div class='add'>+			 * with stage 2 Device type and attributes.</div><div class='add'>+			 */</div><div class='add'>+			final_attr = min(s2_memattr_to_attr(s2_memattr),</div><div class='add'>+					 s1_parattr);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Combination of R_HMNDG, R_TNHFM and R_GQFSF */</div><div class='hunk'>@@ -667,17 +833,19 @@ static u64 compute_par_s12(struct kvm_vcpu *vcpu, u64 s1_par,</div><div class='ctx'> 	    !MEMATTR_IS_DEVICE(final_attr))</div><div class='ctx'> 		final_attr = MEMATTR(NC, NC);</div><div class='ctx'> </div><div class='add'>+	s2_sh = FIELD_GET(KVM_PTE_LEAF_ATTR_LO_S2_SH, tr-&gt;desc);</div><div class='add'>+</div><div class='ctx'> 	par  = FIELD_PREP(SYS_PAR_EL1_ATTR, final_attr);</div><div class='ctx'> 	par |= tr-&gt;output &amp; GENMASK(47, 12);</div><div class='ctx'> 	par |= FIELD_PREP(SYS_PAR_EL1_SH,</div><div class='ctx'> 			  combine_sh(FIELD_GET(SYS_PAR_EL1_SH, s1_par),</div><div class='del'>-				     compute_sh(final_attr, tr-&gt;desc)));</div><div class='add'>+				     compute_final_sh(final_attr, s2_sh)));</div><div class='ctx'> </div><div class='ctx'> 	return par;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_result *wr,</div><div class='del'>-			  enum trans_regime regime)</div><div class='add'>+static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='add'>+			  struct s1_walk_result *wr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 par;</div><div class='ctx'> </div><div class='hunk'>@@ -690,9 +858,9 @@ static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_result *wr,</div><div class='ctx'> 	} else if (wr-&gt;level == S1_MMU_DISABLED) {</div><div class='ctx'> 		/* MMU off or HCR_EL2.DC == 1 */</div><div class='ctx'> 		par  = SYS_PAR_EL1_NSE;</div><div class='del'>-		par |= wr-&gt;pa &amp; GENMASK_ULL(47, 12);</div><div class='add'>+		par |= wr-&gt;pa &amp; SYS_PAR_EL1_PA;</div><div class='ctx'> </div><div class='del'>-		if (regime == TR_EL10 &amp;&amp;</div><div class='add'>+		if (wi-&gt;regime == TR_EL10 &amp;&amp; vcpu_has_nv(vcpu) &amp;&amp;</div><div class='ctx'> 		    (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; HCR_DC)) {</div><div class='ctx'> 			par |= FIELD_PREP(SYS_PAR_EL1_ATTR,</div><div class='ctx'> 					  MEMATTR(WbRaWa, WbRaWa));</div><div class='hunk'>@@ -707,14 +875,14 @@ static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_result *wr,</div><div class='ctx'> </div><div class='ctx'> 		par  = SYS_PAR_EL1_NSE;</div><div class='ctx'> </div><div class='del'>-		mair = (regime == TR_EL10 ?</div><div class='add'>+		mair = (wi-&gt;regime == TR_EL10 ?</div><div class='ctx'> 			vcpu_read_sys_reg(vcpu, MAIR_EL1) :</div><div class='ctx'> 			vcpu_read_sys_reg(vcpu, MAIR_EL2));</div><div class='ctx'> </div><div class='ctx'> 		mair &gt;&gt;= FIELD_GET(PTE_ATTRINDX_MASK, wr-&gt;desc) * 8;</div><div class='ctx'> 		mair &amp;= 0xff;</div><div class='ctx'> </div><div class='del'>-		sctlr = (regime == TR_EL10 ?</div><div class='add'>+		sctlr = (wi-&gt;regime == TR_EL10 ?</div><div class='ctx'> 			 vcpu_read_sys_reg(vcpu, SCTLR_EL1) :</div><div class='ctx'> 			 vcpu_read_sys_reg(vcpu, SCTLR_EL2));</div><div class='ctx'> </div><div class='hunk'>@@ -723,9 +891,9 @@ static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_result *wr,</div><div class='ctx'> 			mair = MEMATTR(NC, NC);</div><div class='ctx'> </div><div class='ctx'> 		par |= FIELD_PREP(SYS_PAR_EL1_ATTR, mair);</div><div class='del'>-		par |= wr-&gt;pa &amp; GENMASK_ULL(47, 12);</div><div class='add'>+		par |= wr-&gt;pa &amp; SYS_PAR_EL1_PA;</div><div class='ctx'> </div><div class='del'>-		sh = compute_sh(mair, wr-&gt;desc);</div><div class='add'>+		sh = compute_s1_sh(wi, wr, mair);</div><div class='ctx'> 		par |= FIELD_PREP(SYS_PAR_EL1_SH, sh);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -739,6 +907,9 @@ static bool pan3_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime)</div><div class='ctx'> 	if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR1_EL1, PAN, PAN3))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	if (s1pie_enabled(vcpu, regime))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	if (regime == TR_EL10)</div><div class='ctx'> 		sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -747,111 +918,356 @@ static bool pan3_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime)</div><div class='ctx'> 	return sctlr &amp; SCTLR_EL1_EPAN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 handle_at_slow(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='add'>+static void compute_s1_direct_permissions(struct kvm_vcpu *vcpu,</div><div class='add'>+					  struct s1_walk_info *wi,</div><div class='add'>+					  struct s1_walk_result *wr)</div><div class='ctx'> {</div><div class='del'>-	bool perm_fail, ur, uw, ux, pr, pw, px;</div><div class='del'>-	struct s1_walk_result wr = {};</div><div class='del'>-	struct s1_walk_info wi = {};</div><div class='del'>-	int ret, idx;</div><div class='del'>-</div><div class='del'>-	ret = setup_s1_walk(vcpu, op, &amp;wi, &amp;wr, vaddr);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto compute_par;</div><div class='del'>-</div><div class='del'>-	if (wr.level == S1_MMU_DISABLED)</div><div class='del'>-		goto compute_par;</div><div class='del'>-</div><div class='del'>-	idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+	bool wxn;</div><div class='ctx'> </div><div class='del'>-	ret = walk_s1(vcpu, &amp;wi, &amp;wr, vaddr);</div><div class='del'>-</div><div class='del'>-	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		goto compute_par;</div><div class='del'>-</div><div class='del'>-	/* FIXME: revisit when adding indirect permission support */</div><div class='del'>-	/* AArch64.S1DirectBasePermissions() */</div><div class='del'>-	if (wi.regime != TR_EL2) {</div><div class='del'>-		switch (FIELD_GET(PTE_USER | PTE_RDONLY, wr.desc)) {</div><div class='add'>+	/* Non-hierarchical part of AArch64.S1DirectBasePermissions() */</div><div class='add'>+	if (wi-&gt;regime != TR_EL2) {</div><div class='add'>+		switch (FIELD_GET(PTE_USER | PTE_RDONLY, wr-&gt;desc)) {</div><div class='ctx'> 		case 0b00:</div><div class='del'>-			pr = pw = true;</div><div class='del'>-			ur = uw = false;</div><div class='add'>+			wr-&gt;pr = wr-&gt;pw = true;</div><div class='add'>+			wr-&gt;ur = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b01:</div><div class='del'>-			pr = pw = ur = uw = true;</div><div class='add'>+			wr-&gt;pr = wr-&gt;pw = wr-&gt;ur = wr-&gt;uw = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b10:</div><div class='del'>-			pr = true;</div><div class='del'>-			pw = ur = uw = false;</div><div class='add'>+			wr-&gt;pr = true;</div><div class='add'>+			wr-&gt;pw = wr-&gt;ur = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b11:</div><div class='del'>-			pr = ur = true;</div><div class='del'>-			pw = uw = false;</div><div class='add'>+			wr-&gt;pr = wr-&gt;ur = true;</div><div class='add'>+			wr-&gt;pw = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		switch (wr.APTable) {</div><div class='add'>+		/* We don't use px for anything yet, but hey... */</div><div class='add'>+		wr-&gt;px = !((wr-&gt;desc &amp; PTE_PXN) || wr-&gt;uw);</div><div class='add'>+		wr-&gt;ux = !(wr-&gt;desc &amp; PTE_UXN);</div><div class='add'>+	} else {</div><div class='add'>+		wr-&gt;ur = wr-&gt;uw = wr-&gt;ux = false;</div><div class='add'>+</div><div class='add'>+		if (!(wr-&gt;desc &amp; PTE_RDONLY)) {</div><div class='add'>+			wr-&gt;pr = wr-&gt;pw = true;</div><div class='add'>+		} else {</div><div class='add'>+			wr-&gt;pr = true;</div><div class='add'>+			wr-&gt;pw = false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* XN maps to UXN */</div><div class='add'>+		wr-&gt;px = !(wr-&gt;desc &amp; PTE_UXN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (wi-&gt;regime) {</div><div class='add'>+	case TR_EL2:</div><div class='add'>+	case TR_EL20:</div><div class='add'>+		wxn = (vcpu_read_sys_reg(vcpu, SCTLR_EL2) &amp; SCTLR_ELx_WXN);</div><div class='add'>+		break;</div><div class='add'>+	case TR_EL10:</div><div class='add'>+		wxn = (vcpu_read_sys_reg(vcpu, SCTLR_EL1) &amp; SCTLR_ELx_WXN);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr-&gt;pwxn = wr-&gt;uwxn = wxn;</div><div class='add'>+	wr-&gt;pov = wi-&gt;poe;</div><div class='add'>+	wr-&gt;uov = wi-&gt;e0poe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_s1_hierarchical_permissions(struct kvm_vcpu *vcpu,</div><div class='add'>+						struct s1_walk_info *wi,</div><div class='add'>+						struct s1_walk_result *wr)</div><div class='add'>+{</div><div class='add'>+	/* Hierarchical part of AArch64.S1DirectBasePermissions() */</div><div class='add'>+	if (wi-&gt;regime != TR_EL2) {</div><div class='add'>+		switch (wr-&gt;APTable) {</div><div class='ctx'> 		case 0b00:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b01:</div><div class='del'>-			ur = uw = false;</div><div class='add'>+			wr-&gt;ur = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b10:</div><div class='del'>-			pw = uw = false;</div><div class='add'>+			wr-&gt;pw = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0b11:</div><div class='del'>-			pw = ur = uw = false;</div><div class='add'>+			wr-&gt;pw = wr-&gt;ur = wr-&gt;uw = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* We don't use px for anything yet, but hey... */</div><div class='del'>-		px = !((wr.desc &amp; PTE_PXN) || wr.PXNTable || uw);</div><div class='del'>-		ux = !((wr.desc &amp; PTE_UXN) || wr.UXNTable);</div><div class='add'>+		wr-&gt;px &amp;= !wr-&gt;PXNTable;</div><div class='add'>+		wr-&gt;ux &amp;= !wr-&gt;UXNTable;</div><div class='add'>+	} else {</div><div class='add'>+		if (wr-&gt;APTable &amp; BIT(1))</div><div class='add'>+			wr-&gt;pw = false;</div><div class='ctx'> </div><div class='del'>-		if (op == OP_AT_S1E1RP || op == OP_AT_S1E1WP) {</div><div class='del'>-			bool pan;</div><div class='add'>+		/* XN maps to UXN */</div><div class='add'>+		wr-&gt;px &amp;= !wr-&gt;UXNTable;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define perm_idx(v, r, i)	((vcpu_read_sys_reg((v), (r)) &gt;&gt; ((i) * 4)) &amp; 0xf)</div><div class='add'>+</div><div class='add'>+#define set_priv_perms(wr, r, w, x)	\</div><div class='add'>+	do {				\</div><div class='add'>+		(wr)-&gt;pr = (r);		\</div><div class='add'>+		(wr)-&gt;pw = (w);		\</div><div class='add'>+		(wr)-&gt;px = (x);		\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define set_unpriv_perms(wr, r, w, x)	\</div><div class='add'>+	do {				\</div><div class='add'>+		(wr)-&gt;ur = (r);		\</div><div class='add'>+		(wr)-&gt;uw = (w);		\</div><div class='add'>+		(wr)-&gt;ux = (x);		\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define set_priv_wxn(wr, v)		\</div><div class='add'>+	do {				\</div><div class='add'>+		(wr)-&gt;pwxn = (v);	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define set_unpriv_wxn(wr, v)		\</div><div class='add'>+	do {				\</div><div class='add'>+		(wr)-&gt;uwxn = (v);	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+/* Similar to AArch64.S1IndirectBasePermissions(), without GCS  */</div><div class='add'>+#define set_perms(w, wr, ip)						\</div><div class='add'>+	do {								\</div><div class='add'>+		/* R_LLZDZ */						\</div><div class='add'>+		switch ((ip)) {						\</div><div class='add'>+		case 0b0000:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0001:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0010:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0011:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , false, true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0100:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0101:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , true , false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0110:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , true , true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b0111:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , true , true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1000:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1001:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1010:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , false, true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1011:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1100:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , true , false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1101:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1110:						\</div><div class='add'>+			set_ ## w ## _perms((wr), true , true , true );	\</div><div class='add'>+			break;						\</div><div class='add'>+		case 0b1111:						\</div><div class='add'>+			set_ ## w ## _perms((wr), false, false, false);	\</div><div class='add'>+			break;						\</div><div class='add'>+		}							\</div><div class='add'>+									\</div><div class='add'>+		/* R_HJYGR */						\</div><div class='add'>+		set_ ## w ## _wxn((wr), ((ip) == 0b0110));		\</div><div class='add'>+									\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+static void compute_s1_indirect_permissions(struct kvm_vcpu *vcpu,</div><div class='add'>+					    struct s1_walk_info *wi,</div><div class='add'>+					    struct s1_walk_result *wr)</div><div class='add'>+{</div><div class='add'>+	u8 up, pp, idx;</div><div class='add'>+</div><div class='add'>+	idx = pte_pi_index(wr-&gt;desc);</div><div class='add'>+</div><div class='add'>+	switch (wi-&gt;regime) {</div><div class='add'>+	case TR_EL10:</div><div class='add'>+		pp = perm_idx(vcpu, PIR_EL1, idx);</div><div class='add'>+		up = perm_idx(vcpu, PIRE0_EL1, idx);</div><div class='add'>+		break;</div><div class='add'>+	case TR_EL20:</div><div class='add'>+		pp = perm_idx(vcpu, PIR_EL2, idx);</div><div class='add'>+		up = perm_idx(vcpu, PIRE0_EL2, idx);</div><div class='add'>+		break;</div><div class='add'>+	case TR_EL2:</div><div class='add'>+		pp = perm_idx(vcpu, PIR_EL2, idx);</div><div class='add'>+		up = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_perms(priv, wr, pp);</div><div class='add'>+</div><div class='add'>+	if (wi-&gt;regime != TR_EL2)</div><div class='add'>+		set_perms(unpriv, wr, up);</div><div class='add'>+	else</div><div class='add'>+		set_unpriv_perms(wr, false, false, false);</div><div class='add'>+</div><div class='add'>+	wr-&gt;pov = wi-&gt;poe &amp;&amp; !(pp &amp; BIT(3));</div><div class='add'>+	wr-&gt;uov = wi-&gt;e0poe &amp;&amp; !(up &amp; BIT(3));</div><div class='add'>+</div><div class='add'>+	/* R_VFPJF */</div><div class='add'>+	if (wr-&gt;px &amp;&amp; wr-&gt;uw) {</div><div class='add'>+		set_priv_perms(wr, false, false, false);</div><div class='add'>+		set_unpriv_perms(wr, false, false, false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_s1_overlay_permissions(struct kvm_vcpu *vcpu,</div><div class='add'>+					   struct s1_walk_info *wi,</div><div class='add'>+					   struct s1_walk_result *wr)</div><div class='add'>+{</div><div class='add'>+	u8 idx, pov_perms, uov_perms;</div><div class='ctx'> </div><div class='del'>-			pan = *vcpu_cpsr(vcpu) &amp; PSR_PAN_BIT;</div><div class='del'>-			pan &amp;= ur || uw || (pan3_enabled(vcpu, wi.regime) &amp;&amp; ux);</div><div class='del'>-			pw &amp;= !pan;</div><div class='del'>-			pr &amp;= !pan;</div><div class='add'>+	idx = FIELD_GET(PTE_PO_IDX_MASK, wr-&gt;desc);</div><div class='add'>+</div><div class='add'>+	if (wr-&gt;pov) {</div><div class='add'>+		switch (wi-&gt;regime) {</div><div class='add'>+		case TR_EL10:</div><div class='add'>+			pov_perms = perm_idx(vcpu, POR_EL1, idx);</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL20:</div><div class='add'>+			pov_perms = perm_idx(vcpu, POR_EL2, idx);</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL2:</div><div class='add'>+			pov_perms = perm_idx(vcpu, POR_EL2, idx);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		ur = uw = ux = false;</div><div class='ctx'> </div><div class='del'>-		if (!(wr.desc &amp; PTE_RDONLY)) {</div><div class='del'>-			pr = pw = true;</div><div class='del'>-		} else {</div><div class='del'>-			pr = true;</div><div class='del'>-			pw = false;</div><div class='add'>+		if (pov_perms &amp; ~POE_RWX)</div><div class='add'>+			pov_perms = POE_NONE;</div><div class='add'>+</div><div class='add'>+		/* R_QXXPC, S1PrivOverflow enabled */</div><div class='add'>+		if (wr-&gt;pwxn &amp;&amp; (pov_perms &amp; POE_X))</div><div class='add'>+			pov_perms &amp;= ~POE_W;</div><div class='add'>+</div><div class='add'>+		wr-&gt;pr &amp;= pov_perms &amp; POE_R;</div><div class='add'>+		wr-&gt;pw &amp;= pov_perms &amp; POE_W;</div><div class='add'>+		wr-&gt;px &amp;= pov_perms &amp; POE_X;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wr-&gt;uov) {</div><div class='add'>+		switch (wi-&gt;regime) {</div><div class='add'>+		case TR_EL10:</div><div class='add'>+			uov_perms = perm_idx(vcpu, POR_EL0, idx);</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL20:</div><div class='add'>+			uov_perms = perm_idx(vcpu, POR_EL0, idx);</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL2:</div><div class='add'>+			uov_perms = 0;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (wr.APTable &amp; BIT(1))</div><div class='del'>-			pw = false;</div><div class='add'>+		if (uov_perms &amp; ~POE_RWX)</div><div class='add'>+			uov_perms = POE_NONE;</div><div class='ctx'> </div><div class='del'>-		/* XN maps to UXN */</div><div class='del'>-		px = !((wr.desc &amp; PTE_UXN) || wr.UXNTable);</div><div class='add'>+		/* R_NPBXC, S1UnprivOverlay enabled */</div><div class='add'>+		if (wr-&gt;uwxn &amp;&amp; (uov_perms &amp; POE_X))</div><div class='add'>+			uov_perms &amp;= ~POE_W;</div><div class='add'>+</div><div class='add'>+		wr-&gt;ur &amp;= uov_perms &amp; POE_R;</div><div class='add'>+		wr-&gt;uw &amp;= uov_perms &amp; POE_W;</div><div class='add'>+		wr-&gt;ux &amp;= uov_perms &amp; POE_X;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_s1_permissions(struct kvm_vcpu *vcpu,</div><div class='add'>+				   struct s1_walk_info *wi,</div><div class='add'>+				   struct s1_walk_result *wr)</div><div class='add'>+{</div><div class='add'>+	bool pan;</div><div class='ctx'> </div><div class='del'>-	perm_fail = false;</div><div class='add'>+	if (!s1pie_enabled(vcpu, wi-&gt;regime))</div><div class='add'>+		compute_s1_direct_permissions(vcpu, wi, wr);</div><div class='add'>+	else</div><div class='add'>+		compute_s1_indirect_permissions(vcpu, wi, wr);</div><div class='add'>+</div><div class='add'>+	if (!wi-&gt;hpd)</div><div class='add'>+		compute_s1_hierarchical_permissions(vcpu, wi, wr);</div><div class='add'>+</div><div class='add'>+	compute_s1_overlay_permissions(vcpu, wi, wr);</div><div class='add'>+</div><div class='add'>+	/* R_QXXPC, S1PrivOverlay disabled */</div><div class='add'>+	if (!wr-&gt;pov)</div><div class='add'>+		wr-&gt;px &amp;= !(wr-&gt;pwxn &amp;&amp; wr-&gt;pw);</div><div class='add'>+</div><div class='add'>+	/* R_NPBXC, S1UnprivOverlay disabled */</div><div class='add'>+	if (!wr-&gt;uov)</div><div class='add'>+		wr-&gt;ux &amp;= !(wr-&gt;uwxn &amp;&amp; wr-&gt;uw);</div><div class='add'>+</div><div class='add'>+	pan = wi-&gt;pan &amp;&amp; (wr-&gt;ur || wr-&gt;uw ||</div><div class='add'>+			  (pan3_enabled(vcpu, wi-&gt;regime) &amp;&amp; wr-&gt;ux));</div><div class='add'>+	wr-&gt;pw &amp;= !pan;</div><div class='add'>+	wr-&gt;pr &amp;= !pan;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 handle_at_slow(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='add'>+{</div><div class='add'>+	struct s1_walk_result wr = {};</div><div class='add'>+	struct s1_walk_info wi = {};</div><div class='add'>+	bool perm_fail = false;</div><div class='add'>+	int ret, idx;</div><div class='add'>+</div><div class='add'>+	wi.regime = compute_translation_regime(vcpu, op);</div><div class='add'>+	wi.as_el0 = (op == OP_AT_S1E0R || op == OP_AT_S1E0W);</div><div class='add'>+	wi.pan = (op == OP_AT_S1E1RP || op == OP_AT_S1E1WP) &amp;&amp;</div><div class='add'>+		 (*vcpu_cpsr(vcpu) &amp; PSR_PAN_BIT);</div><div class='add'>+</div><div class='add'>+	ret = setup_s1_walk(vcpu, &amp;wi, &amp;wr, vaddr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto compute_par;</div><div class='add'>+</div><div class='add'>+	if (wr.level == S1_MMU_DISABLED)</div><div class='add'>+		goto compute_par;</div><div class='add'>+</div><div class='add'>+	idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+</div><div class='add'>+	ret = walk_s1(vcpu, &amp;wi, &amp;wr, vaddr);</div><div class='add'>+</div><div class='add'>+	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto compute_par;</div><div class='add'>+</div><div class='add'>+	compute_s1_permissions(vcpu, &amp;wi, &amp;wr);</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case OP_AT_S1E1RP:</div><div class='ctx'> 	case OP_AT_S1E1R:</div><div class='ctx'> 	case OP_AT_S1E2R:</div><div class='del'>-		perm_fail = !pr;</div><div class='add'>+		perm_fail = !wr.pr;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case OP_AT_S1E1WP:</div><div class='ctx'> 	case OP_AT_S1E1W:</div><div class='ctx'> 	case OP_AT_S1E2W:</div><div class='del'>-		perm_fail = !pw;</div><div class='add'>+		perm_fail = !wr.pw;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case OP_AT_S1E0R:</div><div class='del'>-		perm_fail = !ur;</div><div class='add'>+		perm_fail = !wr.ur;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case OP_AT_S1E0W:</div><div class='del'>-		perm_fail = !uw;</div><div class='add'>+		perm_fail = !wr.uw;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case OP_AT_S1E1A:</div><div class='ctx'> 	case OP_AT_S1E2A:</div><div class='hunk'>@@ -861,10 +1277,10 @@ static u64 handle_at_slow(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (perm_fail)</div><div class='del'>-		fail_s1_walk(&amp;wr, ESR_ELx_FSC_PERM_L(wr.level), false, false);</div><div class='add'>+		fail_s1_walk(&amp;wr, ESR_ELx_FSC_PERM_L(wr.level), false);</div><div class='ctx'> </div><div class='ctx'> compute_par:</div><div class='del'>-	return compute_par_s1(vcpu, &amp;wr, wi.regime);</div><div class='add'>+	return compute_par_s1(vcpu, &amp;wi, &amp;wr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -873,13 +1289,14 @@ compute_par:</div><div class='ctx'>  * If the translation is unsuccessful, the value may only contain</div><div class='ctx'>  * PAR_EL1.F, and cannot be taken at face value. It isn't an</div><div class='ctx'>  * indication of the translation having failed, only that the fast</div><div class='del'>- * path did not succeed, *unless* it indicates a S1 permission fault.</div><div class='add'>+ * path did not succeed, *unless* it indicates a S1 permission or</div><div class='add'>+ * access fault.</div><div class='ctx'>  */</div><div class='ctx'> static u64 __kvm_at_s1e01_fast(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmu_config config;</div><div class='ctx'> 	struct kvm_s2_mmu *mmu;</div><div class='del'>-	bool fail;</div><div class='add'>+	bool fail, mmu_cs;</div><div class='ctx'> 	u64 par;</div><div class='ctx'> </div><div class='ctx'> 	par = SYS_PAR_EL1_F;</div><div class='hunk'>@@ -895,8 +1312,13 @@ static u64 __kvm_at_s1e01_fast(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	 * If HCR_EL2.{E2H,TGE} == {1,1}, the MMU context is already</div><div class='ctx'> 	 * the right one (as we trapped from vEL2). If not, save the</div><div class='ctx'> 	 * full MMU context.</div><div class='add'>+	 *</div><div class='add'>+	 * We are also guaranteed to be in the correct context if</div><div class='add'>+	 * we're not in a nested VM.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu))</div><div class='add'>+	mmu_cs = (vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+		  !(vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu)));</div><div class='add'>+	if (!mmu_cs)</div><div class='ctx'> 		goto skip_mmu_switch;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -914,12 +1336,23 @@ static u64 __kvm_at_s1e01_fast(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	write_sysreg_el1(vcpu_read_sys_reg(vcpu, TTBR1_EL1),	SYS_TTBR1);</div><div class='ctx'> 	write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR_EL1),	SYS_TCR);</div><div class='ctx'> 	write_sysreg_el1(vcpu_read_sys_reg(vcpu, MAIR_EL1),	SYS_MAIR);</div><div class='add'>+	if (kvm_has_tcr2(vcpu-&gt;kvm)) {</div><div class='add'>+		write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR2_EL1), SYS_TCR2);</div><div class='add'>+		if (kvm_has_s1pie(vcpu-&gt;kvm)) {</div><div class='add'>+			write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIR_EL1), SYS_PIR);</div><div class='add'>+			write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIRE0_EL1), SYS_PIRE0);</div><div class='add'>+		}</div><div class='add'>+		if (kvm_has_s1poe(vcpu-&gt;kvm)) {</div><div class='add'>+			write_sysreg_el1(vcpu_read_sys_reg(vcpu, POR_EL1), SYS_POR);</div><div class='add'>+			write_sysreg_s(vcpu_read_sys_reg(vcpu, POR_EL0), SYS_POR_EL0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	write_sysreg_el1(vcpu_read_sys_reg(vcpu, SCTLR_EL1),	SYS_SCTLR);</div><div class='ctx'> 	__load_stage2(mmu, mmu-&gt;arch);</div><div class='ctx'> </div><div class='ctx'> skip_mmu_switch:</div><div class='del'>-	/* Clear TGE, enable S2 translation, we're rolling */</div><div class='del'>-	write_sysreg((config.hcr &amp; ~HCR_TGE) | HCR_VM,	hcr_el2);</div><div class='add'>+	/* Temporarily switch back to guest context */</div><div class='add'>+	write_sysreg_hcr(vcpu-&gt;arch.hcr_el2);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='hunk'>@@ -951,7 +1384,9 @@ skip_mmu_switch:</div><div class='ctx'> 	if (!fail)</div><div class='ctx'> 		par = read_sysreg_par();</div><div class='ctx'> </div><div class='del'>-	if (!(vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu)))</div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='add'>+</div><div class='add'>+	if (mmu_cs)</div><div class='ctx'> 		__mmu_config_restore(&amp;config);</div><div class='ctx'> </div><div class='ctx'> 	return par;</div><div class='hunk'>@@ -965,19 +1400,29 @@ static bool par_check_s1_perm_fault(u64 par)</div><div class='ctx'> 		 !(par &amp; SYS_PAR_EL1_S));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool par_check_s1_access_fault(u64 par)</div><div class='add'>+{</div><div class='add'>+	u8 fst = FIELD_GET(SYS_PAR_EL1_FST, par);</div><div class='add'>+</div><div class='add'>+	return  ((fst &amp; ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_ACCESS &amp;&amp;</div><div class='add'>+		 !(par &amp; SYS_PAR_EL1_S));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __kvm_at_s1e01(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 par = __kvm_at_s1e01_fast(vcpu, op, vaddr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If PAR_EL1 reports that AT failed on a S1 permission fault, we</div><div class='del'>-	 * know for sure that the PTW was able to walk the S1 tables and</div><div class='del'>-	 * there's nothing else to do.</div><div class='add'>+	 * If PAR_EL1 reports that AT failed on a S1 permission or access</div><div class='add'>+	 * fault, we know for sure that the PTW was able to walk the S1</div><div class='add'>+	 * tables and there's nothing else to do.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * If AT failed for any other reason, then we must walk the guest S1</div><div class='ctx'> 	 * to emulate the instruction.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((par &amp; SYS_PAR_EL1_F) &amp;&amp; !par_check_s1_perm_fault(par))</div><div class='add'>+	if ((par &amp; SYS_PAR_EL1_F) &amp;&amp;</div><div class='add'>+	    !par_check_s1_perm_fault(par) &amp;&amp;</div><div class='add'>+	    !par_check_s1_access_fault(par))</div><div class='ctx'> 		par = handle_at_slow(vcpu, op, vaddr);</div><div class='ctx'> </div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, par, PAR_EL1);</div><div class='hunk'>@@ -992,12 +1437,9 @@ void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	 * switching context behind everybody's back, disable interrupts...</div><div class='ctx'> 	 */</div><div class='ctx'> 	scoped_guard(write_lock_irqsave, &amp;vcpu-&gt;kvm-&gt;mmu_lock) {</div><div class='del'>-		struct kvm_s2_mmu *mmu;</div><div class='ctx'> 		u64 val, hcr;</div><div class='ctx'> 		bool fail;</div><div class='ctx'> </div><div class='del'>-		mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='del'>-</div><div class='ctx'> 		val = hcr = read_sysreg(hcr_el2);</div><div class='ctx'> 		val &amp;= ~HCR_TGE;</div><div class='ctx'> 		val |= HCR_VM;</div><div class='hunk'>@@ -1005,7 +1447,7 @@ void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 		if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='ctx'> 			val |= HCR_NV | HCR_NV1;</div><div class='ctx'> </div><div class='del'>-		write_sysreg(val, hcr_el2);</div><div class='add'>+		write_sysreg_hcr(val);</div><div class='ctx'> 		isb();</div><div class='ctx'> </div><div class='ctx'> 		par = SYS_PAR_EL1_F;</div><div class='hunk'>@@ -1030,7 +1472,7 @@ void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 		if (!fail)</div><div class='ctx'> 			par = read_sysreg_par();</div><div class='ctx'> </div><div class='del'>-		write_sysreg(hcr, hcr_el2);</div><div class='add'>+		write_sysreg_hcr(hcr);</div><div class='ctx'> 		isb();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1077,10 +1519,10 @@ void __kvm_at_s12(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If we only have a single stage of translation (E2H=0 or</div><div class='del'>-	 * TGE=1), exit early. Same thing if {VM,DC}=={0,0}.</div><div class='add'>+	 * If we only have a single stage of translation (EL2&amp;0), exit</div><div class='add'>+	 * early. Same thing if {VM,DC}=={0,0}.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!vcpu_el2_e2h_is_set(vcpu) || vcpu_el2_tge_is_set(vcpu) ||</div><div class='add'>+	if (compute_translation_regime(vcpu, op) == TR_EL20 ||</div><div class='ctx'> 	    !(vcpu_read_sys_reg(vcpu, HCR_EL2) &amp; (HCR_VM | HCR_DC)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1099,3 +1541,96 @@ void __kvm_at_s12(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	par = compute_par_s12(vcpu, par, &amp;out);</div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, par, PAR_EL1);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Translate a VA for a given EL in a given translation regime, with</div><div class='add'>+ * or without PAN. This requires wi-&gt;{regime, as_el0, pan} to be</div><div class='add'>+ * set. The rest of the wi and wr should be 0-initialised.</div><div class='add'>+ */</div><div class='add'>+int __kvm_translate_va(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='add'>+		       struct s1_walk_result *wr, u64 va)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = setup_s1_walk(vcpu, wi, wr, va);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (wr-&gt;level == S1_MMU_DISABLED) {</div><div class='add'>+		wr-&gt;ur = wr-&gt;uw = wr-&gt;ux = true;</div><div class='add'>+		wr-&gt;pr = wr-&gt;pw = wr-&gt;px = true;</div><div class='add'>+	} else {</div><div class='add'>+		ret = walk_s1(vcpu, wi, wr, va);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		compute_s1_permissions(vcpu, wi, wr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct desc_match {</div><div class='add'>+	u64	ipa;</div><div class='add'>+	int	level;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int match_s1_desc(struct s1_walk_context *ctxt, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct desc_match *dm = priv;</div><div class='add'>+	u64 ipa = dm-&gt;ipa;</div><div class='add'>+</div><div class='add'>+	/* Use S1 granule alignment */</div><div class='add'>+	ipa &amp;= GENMASK(51, ctxt-&gt;wi-&gt;pgshift);</div><div class='add'>+</div><div class='add'>+	/* Not the IPA we're looking for? Continue. */</div><div class='add'>+	if (ipa != ctxt-&gt;table_ipa)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Note the level and interrupt the walk */</div><div class='add'>+	dm-&gt;level = ctxt-&gt;level;</div><div class='add'>+	return -EINTR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __kvm_find_s1_desc_level(struct kvm_vcpu *vcpu, u64 va, u64 ipa, int *level)</div><div class='add'>+{</div><div class='add'>+	struct desc_match dm = {</div><div class='add'>+		.ipa	= ipa,</div><div class='add'>+	};</div><div class='add'>+	struct s1_walk_info wi = {</div><div class='add'>+		.filter	= &amp;(struct s1_walk_filter){</div><div class='add'>+			.fn	= match_s1_desc,</div><div class='add'>+			.priv	= &amp;dm,</div><div class='add'>+		},</div><div class='add'>+		.regime	= TR_EL10,</div><div class='add'>+		.as_el0	= false,</div><div class='add'>+		.pan	= false,</div><div class='add'>+	};</div><div class='add'>+	struct s1_walk_result wr = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = setup_s1_walk(vcpu, &amp;wi, &amp;wr, va);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* We really expect the S1 MMU to be on here... */</div><div class='add'>+	if (WARN_ON_ONCE(wr.level == S1_MMU_DISABLED)) {</div><div class='add'>+		*level = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Walk the guest's PT, looking for a match along the way */</div><div class='add'>+	ret = walk_s1(vcpu, &amp;wi, &amp;wr, va);</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case -EINTR:</div><div class='add'>+		/* We interrupted the walk on a match, return the level */</div><div class='add'>+		*level = dm.level;</div><div class='add'>+		return 0;</div><div class='add'>+	case 0:</div><div class='add'>+		/* The walk completed, we failed to find the entry */</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	default:</div><div class='add'>+		/* Any other error... */</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c<br/>new file mode 100644<br/>index 000000000000..fbd8944a3dea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/config.c</a></div><div class='hunk'>@@ -0,0 +1,1430 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Google LLC</div><div class='add'>+ * Author: Marc Zyngier &lt;maz@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/sysreg.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Describes the dependencies between a set of bits (or the negation</div><div class='add'>+ * of a set of RES0 bits) and a feature. The flags indicate how the</div><div class='add'>+ * data is interpreted.</div><div class='add'>+ */</div><div class='add'>+struct reg_bits_to_feat_map {</div><div class='add'>+	union {</div><div class='add'>+		u64	bits;</div><div class='add'>+		u64	*res0p;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+#define	NEVER_FGU	BIT(0)	/* Can trap, but never UNDEF */</div><div class='add'>+#define	CALL_FUNC	BIT(1)	/* Needs to evaluate tons of crap */</div><div class='add'>+#define	FIXED_VALUE	BIT(2)	/* RAZ/WI or RAO/WI in KVM */</div><div class='add'>+#define	RES0_POINTER	BIT(3)	/* Pointer to RES0 value instead of bits */</div><div class='add'>+</div><div class='add'>+	unsigned long	flags;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8	regidx;</div><div class='add'>+			u8	shift;</div><div class='add'>+			u8	width;</div><div class='add'>+			bool	sign;</div><div class='add'>+			s8	lo_lim;</div><div class='add'>+		};</div><div class='add'>+		bool	(*match)(struct kvm *);</div><div class='add'>+		bool	(*fval)(struct kvm *, u64 *);</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Describes the dependencies for a given register:</div><div class='add'>+ *</div><div class='add'>+ * @feat_map describes the dependency for the whole register. If the</div><div class='add'>+ * features the register depends on are not present, the whole</div><div class='add'>+ * register is effectively RES0.</div><div class='add'>+ *</div><div class='add'>+ * @bit_feat_map describes the dependencies for a set of bits in that</div><div class='add'>+ * register. If the features these bits depend on are not present, the</div><div class='add'>+ * bits are effectively RES0.</div><div class='add'>+ */</div><div class='add'>+struct reg_feat_map_desc {</div><div class='add'>+	const char			  *name;</div><div class='add'>+	const struct reg_bits_to_feat_map feat_map;</div><div class='add'>+	const struct reg_bits_to_feat_map *bit_feat_map;</div><div class='add'>+	const unsigned int		  bit_feat_map_sz;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_3(m, f, w, id, fld, lim)		\</div><div class='add'>+	{						\</div><div class='add'>+		.w	= (m),				\</div><div class='add'>+		.flags = (f),				\</div><div class='add'>+		.regidx	= IDREG_IDX(SYS_ ## id),	\</div><div class='add'>+		.shift	= id ##_## fld ## _SHIFT,	\</div><div class='add'>+		.width	= id ##_## fld ## _WIDTH,	\</div><div class='add'>+		.sign	= id ##_## fld ## _SIGNED,	\</div><div class='add'>+		.lo_lim	= id ##_## fld ##_## lim	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_2(m, f, w, fun, dummy)		\</div><div class='add'>+	{						\</div><div class='add'>+		.w	= (m),				\</div><div class='add'>+		.flags = (f) | CALL_FUNC,		\</div><div class='add'>+		.fval = (fun),				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_1(m, f, w, fun)			\</div><div class='add'>+	{						\</div><div class='add'>+		.w	= (m),				\</div><div class='add'>+		.flags = (f) | CALL_FUNC,		\</div><div class='add'>+		.match = (fun),				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_FLAG(m, f, w, ...)			\</div><div class='add'>+	CONCATENATE(__NEEDS_FEAT_, COUNT_ARGS(__VA_ARGS__))(m, f, w, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT_FLAG(m, f, ...)			\</div><div class='add'>+	__NEEDS_FEAT_FLAG(m, f, bits, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT_FIXED(m, ...)			\</div><div class='add'>+	__NEEDS_FEAT_FLAG(m, FIXED_VALUE, bits, __VA_ARGS__, 0)</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT_RES0(p, ...)				\</div><div class='add'>+	__NEEDS_FEAT_FLAG(p, RES0_POINTER, res0p, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Declare the dependency between a set of bits and a set of features,</div><div class='add'>+ * generating a struct reg_bit_to_feat_map.</div><div class='add'>+ */</div><div class='add'>+#define NEEDS_FEAT(m, ...)	NEEDS_FEAT_FLAG(m, 0, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Declare the dependency between a non-FGT register, a set of</div><div class='add'>+ * feature, and the set of individual bits it contains. This generates</div><div class='add'>+ * a struct reg_feat_map_desc.</div><div class='add'>+ */</div><div class='add'>+#define DECLARE_FEAT_MAP(n, r, m, f)					\</div><div class='add'>+	struct reg_feat_map_desc n = {					\</div><div class='add'>+		.name			= #r,				\</div><div class='add'>+		.feat_map		= NEEDS_FEAT(~r##_RES0, f), 	\</div><div class='add'>+		.bit_feat_map		= m,				\</div><div class='add'>+		.bit_feat_map_sz	= ARRAY_SIZE(m),		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Specialised version of the above for FGT registers that have their</div><div class='add'>+ * RES0 masks described as struct fgt_masks.</div><div class='add'>+ */</div><div class='add'>+#define DECLARE_FEAT_MAP_FGT(n, msk, m, f)				\</div><div class='add'>+	struct reg_feat_map_desc n = {					\</div><div class='add'>+		.name			= #msk,				\</div><div class='add'>+		.feat_map		= NEEDS_FEAT_RES0(&amp;msk.res0, f),\</div><div class='add'>+		.bit_feat_map		= m,				\</div><div class='add'>+		.bit_feat_map_sz	= ARRAY_SIZE(m),		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define FEAT_SPE		ID_AA64DFR0_EL1, PMSVer, IMP</div><div class='add'>+#define FEAT_SPE_FnE		ID_AA64DFR0_EL1, PMSVer, V1P2</div><div class='add'>+#define FEAT_BRBE		ID_AA64DFR0_EL1, BRBE, IMP</div><div class='add'>+#define FEAT_TRC_SR		ID_AA64DFR0_EL1, TraceVer, IMP</div><div class='add'>+#define FEAT_PMUv3		ID_AA64DFR0_EL1, PMUVer, IMP</div><div class='add'>+#define FEAT_TRBE		ID_AA64DFR0_EL1, TraceBuffer, IMP</div><div class='add'>+#define FEAT_TRBEv1p1		ID_AA64DFR0_EL1, TraceBuffer, TRBE_V1P1</div><div class='add'>+#define FEAT_DoubleLock		ID_AA64DFR0_EL1, DoubleLock, IMP</div><div class='add'>+#define FEAT_TRF		ID_AA64DFR0_EL1, TraceFilt, IMP</div><div class='add'>+#define FEAT_AA32EL0		ID_AA64PFR0_EL1, EL0, AARCH32</div><div class='add'>+#define FEAT_AA32EL1		ID_AA64PFR0_EL1, EL1, AARCH32</div><div class='add'>+#define FEAT_AA64EL1		ID_AA64PFR0_EL1, EL1, IMP</div><div class='add'>+#define FEAT_AA64EL2		ID_AA64PFR0_EL1, EL2, IMP</div><div class='add'>+#define FEAT_AA64EL3		ID_AA64PFR0_EL1, EL3, IMP</div><div class='add'>+#define FEAT_AIE		ID_AA64MMFR3_EL1, AIE, IMP</div><div class='add'>+#define FEAT_S2POE		ID_AA64MMFR3_EL1, S2POE, IMP</div><div class='add'>+#define FEAT_S1POE		ID_AA64MMFR3_EL1, S1POE, IMP</div><div class='add'>+#define FEAT_S1PIE		ID_AA64MMFR3_EL1, S1PIE, IMP</div><div class='add'>+#define FEAT_THE		ID_AA64PFR1_EL1, THE, IMP</div><div class='add'>+#define FEAT_SME		ID_AA64PFR1_EL1, SME, IMP</div><div class='add'>+#define FEAT_GCS		ID_AA64PFR1_EL1, GCS, IMP</div><div class='add'>+#define FEAT_LS64		ID_AA64ISAR1_EL1, LS64, LS64</div><div class='add'>+#define FEAT_LS64_V		ID_AA64ISAR1_EL1, LS64, LS64_V</div><div class='add'>+#define FEAT_LS64_ACCDATA	ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA</div><div class='add'>+#define FEAT_RAS		ID_AA64PFR0_EL1, RAS, IMP</div><div class='add'>+#define FEAT_RASv2		ID_AA64PFR0_EL1, RAS, V2</div><div class='add'>+#define FEAT_GICv3		ID_AA64PFR0_EL1, GIC, IMP</div><div class='add'>+#define FEAT_LOR		ID_AA64MMFR1_EL1, LO, IMP</div><div class='add'>+#define FEAT_SPEv1p2		ID_AA64DFR0_EL1, PMSVer, V1P2</div><div class='add'>+#define FEAT_SPEv1p4		ID_AA64DFR0_EL1, PMSVer, V1P4</div><div class='add'>+#define FEAT_SPEv1p5		ID_AA64DFR0_EL1, PMSVer, V1P5</div><div class='add'>+#define FEAT_ATS1A		ID_AA64ISAR2_EL1, ATS1A, IMP</div><div class='add'>+#define FEAT_SPECRES2		ID_AA64ISAR1_EL1, SPECRES, COSP_RCTX</div><div class='add'>+#define FEAT_SPECRES		ID_AA64ISAR1_EL1, SPECRES, IMP</div><div class='add'>+#define FEAT_TLBIRANGE		ID_AA64ISAR0_EL1, TLB, RANGE</div><div class='add'>+#define FEAT_TLBIOS		ID_AA64ISAR0_EL1, TLB, OS</div><div class='add'>+#define FEAT_PAN2		ID_AA64MMFR1_EL1, PAN, PAN2</div><div class='add'>+#define FEAT_DPB2		ID_AA64ISAR1_EL1, DPB, DPB2</div><div class='add'>+#define FEAT_AMUv1		ID_AA64PFR0_EL1, AMU, IMP</div><div class='add'>+#define FEAT_AMUv1p1		ID_AA64PFR0_EL1, AMU, V1P1</div><div class='add'>+#define FEAT_CMOW		ID_AA64MMFR1_EL1, CMOW, IMP</div><div class='add'>+#define FEAT_D128		ID_AA64MMFR3_EL1, D128, IMP</div><div class='add'>+#define FEAT_DoubleFault2	ID_AA64PFR1_EL1, DF2, IMP</div><div class='add'>+#define FEAT_FPMR		ID_AA64PFR2_EL1, FPMR, IMP</div><div class='add'>+#define FEAT_MOPS		ID_AA64ISAR2_EL1, MOPS, IMP</div><div class='add'>+#define FEAT_NMI		ID_AA64PFR1_EL1, NMI, IMP</div><div class='add'>+#define FEAT_SCTLR2		ID_AA64MMFR3_EL1, SCTLRX, IMP</div><div class='add'>+#define FEAT_SYSREG128		ID_AA64ISAR2_EL1, SYSREG_128, IMP</div><div class='add'>+#define FEAT_TCR2		ID_AA64MMFR3_EL1, TCRX, IMP</div><div class='add'>+#define FEAT_XS			ID_AA64ISAR1_EL1, XS, IMP</div><div class='add'>+#define FEAT_EVT		ID_AA64MMFR2_EL1, EVT, IMP</div><div class='add'>+#define FEAT_EVT_TTLBxS		ID_AA64MMFR2_EL1, EVT, TTLBxS</div><div class='add'>+#define FEAT_MTE2		ID_AA64PFR1_EL1, MTE, MTE2</div><div class='add'>+#define FEAT_RME		ID_AA64PFR0_EL1, RME, IMP</div><div class='add'>+#define FEAT_MPAM		ID_AA64PFR0_EL1, MPAM, 1</div><div class='add'>+#define FEAT_S2FWB		ID_AA64MMFR2_EL1, FWB, IMP</div><div class='add'>+#define FEAT_TME		ID_AA64ISAR0_EL1, TME, IMP</div><div class='add'>+#define FEAT_TWED		ID_AA64MMFR1_EL1, TWED, IMP</div><div class='add'>+#define FEAT_E2H0		ID_AA64MMFR4_EL1, E2H0, IMP</div><div class='add'>+#define FEAT_SRMASK		ID_AA64MMFR4_EL1, SRMASK, IMP</div><div class='add'>+#define FEAT_PoPS		ID_AA64MMFR4_EL1, PoPS, IMP</div><div class='add'>+#define FEAT_PFAR		ID_AA64PFR1_EL1, PFAR, IMP</div><div class='add'>+#define FEAT_Debugv8p9		ID_AA64DFR0_EL1, PMUVer, V3P9</div><div class='add'>+#define FEAT_PMUv3_SS		ID_AA64DFR0_EL1, PMSS, IMP</div><div class='add'>+#define FEAT_SEBEP		ID_AA64DFR0_EL1, SEBEP, IMP</div><div class='add'>+#define FEAT_EBEP		ID_AA64DFR1_EL1, EBEP, IMP</div><div class='add'>+#define FEAT_ITE		ID_AA64DFR1_EL1, ITE, IMP</div><div class='add'>+#define FEAT_PMUv3_ICNTR	ID_AA64DFR1_EL1, PMICNTR, IMP</div><div class='add'>+#define FEAT_SPMU		ID_AA64DFR1_EL1, SPMU, IMP</div><div class='add'>+#define FEAT_SPE_nVM		ID_AA64DFR2_EL1, SPE_nVM, IMP</div><div class='add'>+#define FEAT_STEP2		ID_AA64DFR2_EL1, STEP, IMP</div><div class='add'>+#define FEAT_CPA2		ID_AA64ISAR3_EL1, CPA, CPA2</div><div class='add'>+#define FEAT_ASID2		ID_AA64MMFR4_EL1, ASID2, IMP</div><div class='add'>+#define FEAT_MEC		ID_AA64MMFR3_EL1, MEC, IMP</div><div class='add'>+#define FEAT_HAFT		ID_AA64MMFR1_EL1, HAFDBS, HAFT</div><div class='add'>+#define FEAT_BTI		ID_AA64PFR1_EL1, BT, IMP</div><div class='add'>+#define FEAT_ExS		ID_AA64MMFR0_EL1, EXS, IMP</div><div class='add'>+#define FEAT_IESB		ID_AA64MMFR2_EL1, IESB, IMP</div><div class='add'>+#define FEAT_LSE2		ID_AA64MMFR2_EL1, AT, IMP</div><div class='add'>+#define FEAT_LSMAOC		ID_AA64MMFR2_EL1, LSM, IMP</div><div class='add'>+#define FEAT_MixedEnd		ID_AA64MMFR0_EL1, BIGEND, IMP</div><div class='add'>+#define FEAT_MixedEndEL0	ID_AA64MMFR0_EL1, BIGENDEL0, IMP</div><div class='add'>+#define FEAT_MTE_ASYNC		ID_AA64PFR1_EL1, MTE_frac, ASYNC</div><div class='add'>+#define FEAT_MTE_STORE_ONLY	ID_AA64PFR2_EL1, MTESTOREONLY, IMP</div><div class='add'>+#define FEAT_PAN		ID_AA64MMFR1_EL1, PAN, IMP</div><div class='add'>+#define FEAT_PAN3		ID_AA64MMFR1_EL1, PAN, PAN3</div><div class='add'>+#define FEAT_SSBS		ID_AA64PFR1_EL1, SSBS, IMP</div><div class='add'>+#define FEAT_TIDCP1		ID_AA64MMFR1_EL1, TIDCP1, IMP</div><div class='add'>+#define FEAT_FGT		ID_AA64MMFR0_EL1, FGT, IMP</div><div class='add'>+#define FEAT_FGT2		ID_AA64MMFR0_EL1, FGT, FGT2</div><div class='add'>+#define FEAT_MTPMU		ID_AA64DFR0_EL1, MTPMU, IMP</div><div class='add'>+#define FEAT_HCX		ID_AA64MMFR1_EL1, HCX, IMP</div><div class='add'>+</div><div class='add'>+static bool not_feat_aa64el3(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return !kvm_has_feat(kvm, FEAT_AA64EL3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_nv2(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return ((kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY) &amp;&amp;</div><div class='add'>+		 kvm_has_feat_enum(kvm, ID_AA64MMFR2_EL1, NV, NI)) ||</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, NV2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_nv2_e2h0_ni(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return feat_nv2(kvm) &amp;&amp; !kvm_has_feat(kvm, FEAT_E2H0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_rasv1p1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||</div><div class='add'>+		(kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) &amp;&amp;</div><div class='add'>+		 kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_csv2_2_csv2_1p2(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm,  ID_AA64PFR0_EL1, CSV2, CSV2_2) ||</div><div class='add'>+		(kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2) &amp;&amp;</div><div class='add'>+		 kvm_has_feat_enum(kvm,  ID_AA64PFR0_EL1, CSV2, IMP)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pauth(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_pauth(kvm, PAuth);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pauth_lr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_pauth(kvm, PAuth_LR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_aderr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ADERR, FEAT_ADERR) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SDERR, FEAT_ADERR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_anerr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ANERR, FEAT_ANERR) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SNERR, FEAT_ANERR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_sme_smps(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports SME -- this really should</div><div class='add'>+	 * look at the guest's view of SMIDR_EL1. Funnily enough, this</div><div class='add'>+	 * is not captured in the JSON file, but only as a note in the</div><div class='add'>+	 * ARM ARM.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_SME) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_SMIDR_EL1) &amp; SMIDR_EL1_SMPS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_spe_fds(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports SPE -- this really should</div><div class='add'>+	 * look at the guest's view of PMSIDR_EL1.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_SPEv1p4) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_PMSIDR_EL1) &amp; PMSIDR_EL1_FDS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_trbe_mpam(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports both MPAM and TRBE --</div><div class='add'>+	 * this really should look at the guest's view of TRBIDR_EL1.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_TRBE) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, FEAT_MPAM) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_TRBIDR_EL1) &amp; TRBIDR_EL1_MPAM));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_asid2_e2h1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_ASID2) &amp;&amp; !kvm_has_feat(kvm, FEAT_E2H0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_d128_e2h1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_D128) &amp;&amp; !kvm_has_feat(kvm, FEAT_E2H0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_mec_e2h1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_MEC) &amp;&amp; !kvm_has_feat(kvm, FEAT_E2H0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_ebep_pmuv3_ss(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_EBEP) || kvm_has_feat(kvm, FEAT_PMUv3_SS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_mixedendel0(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_MixedEnd) || kvm_has_feat(kvm, FEAT_MixedEndEL0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_mte_async(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_MTE2) &amp;&amp; kvm_has_feat_enum(kvm, FEAT_MTE_ASYNC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define check_pmu_revision(k, r)					\</div><div class='add'>+	({								\</div><div class='add'>+		(kvm_has_feat((k), ID_AA64DFR0_EL1, PMUVer, r) &amp;&amp;	\</div><div class='add'>+		 !kvm_has_feat((k), ID_AA64DFR0_EL1, PMUVer, IMP_DEF));	\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+static bool feat_pmuv3p1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return check_pmu_revision(kvm, V3P1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pmuv3p5(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return check_pmu_revision(kvm, V3P5);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pmuv3p7(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return check_pmu_revision(kvm, V3P7);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pmuv3p9(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return check_pmu_revision(kvm, V3P9);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool compute_hcr_rw(struct kvm *kvm, u64 *bits)</div><div class='add'>+{</div><div class='add'>+	/* This is purely academic: AArch32 and NV are mutually exclusive */</div><div class='add'>+	if (bits) {</div><div class='add'>+		if (kvm_has_feat(kvm, FEAT_AA32EL1))</div><div class='add'>+			*bits &amp;= ~HCR_EL2_RW;</div><div class='add'>+		else</div><div class='add'>+			*bits |= HCR_EL2_RW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool compute_hcr_e2h(struct kvm *kvm, u64 *bits)</div><div class='add'>+{</div><div class='add'>+	if (bits) {</div><div class='add'>+		if (kvm_has_feat(kvm, FEAT_E2H0))</div><div class='add'>+			*bits &amp;= ~HCR_EL2_E2H;</div><div class='add'>+		else</div><div class='add'>+			*bits |= HCR_EL2_E2H;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nAMAIR2_EL1	|</div><div class='add'>+		   HFGRTR_EL2_nMAIR2_EL1,</div><div class='add'>+		   FEAT_AIE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nS2POR_EL1, FEAT_S2POE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nPOR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nPOR_EL0,</div><div class='add'>+		   FEAT_S1POE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nPIR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nPIRE0_EL1,</div><div class='add'>+		   FEAT_S1PIE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nRCWMASK_EL1, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nTPIDR2_EL0	|</div><div class='add'>+		   HFGRTR_EL2_nSMPRI_EL1,</div><div class='add'>+		   FEAT_SME),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nGCS_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nGCS_EL0,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nACCDATA_EL1, FEAT_LS64_ACCDATA),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ERXADDR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXMISCn_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXSTATUS_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXCTLR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXFR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_ERRSELR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERRIDR_EL1,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ERXPFGCDN_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXPFGCTL_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXPFGF_EL1,</div><div class='add'>+		   feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ICC_IGRPENn_EL1, FEAT_GICv3),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_SCXTNUM_EL0	|</div><div class='add'>+		   HFGRTR_EL2_SCXTNUM_EL1,</div><div class='add'>+		   feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_LORSA_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORN_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORID_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LOREA_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORC_EL1,</div><div class='add'>+		   FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_APIBKey		|</div><div class='add'>+		   HFGRTR_EL2_APIAKey		|</div><div class='add'>+		   HFGRTR_EL2_APGAKey		|</div><div class='add'>+		   HFGRTR_EL2_APDBKey		|</div><div class='add'>+		   HFGRTR_EL2_APDAKey,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGRTR_EL2_VBAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_TTBR1_EL1	|</div><div class='add'>+			HFGRTR_EL2_TTBR0_EL1	|</div><div class='add'>+			HFGRTR_EL2_TPIDR_EL0	|</div><div class='add'>+			HFGRTR_EL2_TPIDRRO_EL0	|</div><div class='add'>+			HFGRTR_EL2_TPIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_TCR_EL1	|</div><div class='add'>+			HFGRTR_EL2_SCTLR_EL1	|</div><div class='add'>+			HFGRTR_EL2_REVIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_PAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MPIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MAIR_EL1	|</div><div class='add'>+			HFGRTR_EL2_ISR_EL1	|</div><div class='add'>+			HFGRTR_EL2_FAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_ESR_EL1	|</div><div class='add'>+			HFGRTR_EL2_DCZID_EL0	|</div><div class='add'>+			HFGRTR_EL2_CTR_EL0	|</div><div class='add'>+			HFGRTR_EL2_CSSELR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CPACR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CONTEXTIDR_EL1|</div><div class='add'>+			HFGRTR_EL2_CLIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CCSIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AMAIR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AFSR1_EL1	|</div><div class='add'>+			HFGRTR_EL2_AFSR0_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgrtr_desc, hfgrtr_masks,</div><div class='add'>+				  hfgrtr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgwtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nAMAIR2_EL1	|</div><div class='add'>+		   HFGWTR_EL2_nMAIR2_EL1,</div><div class='add'>+		   FEAT_AIE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nS2POR_EL1, FEAT_S2POE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nPOR_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nPOR_EL0,</div><div class='add'>+		   FEAT_S1POE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nPIR_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nPIRE0_EL1,</div><div class='add'>+		   FEAT_S1PIE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nRCWMASK_EL1, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nTPIDR2_EL0	|</div><div class='add'>+		   HFGWTR_EL2_nSMPRI_EL1,</div><div class='add'>+		   FEAT_SME),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nGCS_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nGCS_EL0,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nACCDATA_EL1, FEAT_LS64_ACCDATA),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ERXADDR_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXMISCn_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXSTATUS_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXCTLR_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERRSELR_EL1,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ERXPFGCDN_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXPFGCTL_EL1,</div><div class='add'>+		   feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ICC_IGRPENn_EL1, FEAT_GICv3),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_SCXTNUM_EL0	|</div><div class='add'>+		   HFGWTR_EL2_SCXTNUM_EL1,</div><div class='add'>+		   feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_LORSA_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LORN_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LOREA_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LORC_EL1,</div><div class='add'>+		   FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_APIBKey		|</div><div class='add'>+		   HFGWTR_EL2_APIAKey		|</div><div class='add'>+		   HFGWTR_EL2_APGAKey		|</div><div class='add'>+		   HFGWTR_EL2_APDBKey		|</div><div class='add'>+		   HFGWTR_EL2_APDAKey,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGWTR_EL2_VBAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_TTBR1_EL1	|</div><div class='add'>+			HFGWTR_EL2_TTBR0_EL1	|</div><div class='add'>+			HFGWTR_EL2_TPIDR_EL0	|</div><div class='add'>+			HFGWTR_EL2_TPIDRRO_EL0	|</div><div class='add'>+			HFGWTR_EL2_TPIDR_EL1	|</div><div class='add'>+			HFGWTR_EL2_TCR_EL1	|</div><div class='add'>+			HFGWTR_EL2_SCTLR_EL1	|</div><div class='add'>+			HFGWTR_EL2_PAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_MAIR_EL1	|</div><div class='add'>+			HFGWTR_EL2_FAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_ESR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CSSELR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CPACR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CONTEXTIDR_EL1|</div><div class='add'>+			HFGWTR_EL2_AMAIR_EL1	|</div><div class='add'>+			HFGWTR_EL2_AFSR1_EL1	|</div><div class='add'>+			HFGWTR_EL2_AFSR0_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgwtr_desc, hfgwtr_masks,</div><div class='add'>+				  hfgwtr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_PMBIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSLATFR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSIRR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSICR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSFCR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSEVFR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSCR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBSR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBPTR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBLIMITR_EL1,</div><div class='add'>+		   FEAT_SPE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_nBRBDATA		|</div><div class='add'>+		   HDFGRTR_EL2_nBRBCTL		|</div><div class='add'>+		   HDFGRTR_EL2_nBRBIDR,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_TRCVICTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCSTATR		|</div><div class='add'>+		   HDFGRTR_EL2_TRCSSCSRn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCSEQSTR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCPRGCTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCOSLSR		|</div><div class='add'>+		   HDFGRTR_EL2_TRCIMSPECn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCID		|</div><div class='add'>+		   HDFGRTR_EL2_TRCCNTVRn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCCLAIM		|</div><div class='add'>+		   HDFGRTR_EL2_TRCAUXCTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCAUTHSTATUS	|</div><div class='add'>+		   HDFGRTR_EL2_TRC,</div><div class='add'>+		   FEAT_TRC_SR),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_PMCEIDn_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMUSERENR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMMIR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSELR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMOVS		|</div><div class='add'>+		   HDFGRTR_EL2_PMINTEN		|</div><div class='add'>+		   HDFGRTR_EL2_PMCNTEN		|</div><div class='add'>+		   HDFGRTR_EL2_PMCCNTR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMCCFILTR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMEVTYPERn_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMEVCNTRn_EL0,</div><div class='add'>+		   FEAT_PMUv3),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_TRBTRG_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBSR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBPTR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBMAR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBLIMITR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBBASER_EL1,</div><div class='add'>+		   FEAT_TRBE),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGRTR_EL2_OSDLR_EL1, NEVER_FGU,</div><div class='add'>+			FEAT_DoubleLock),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGRTR_EL2_OSECCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_OSLSR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGPRCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGAUTHSTATUS_EL1|</div><div class='add'>+			HDFGRTR_EL2_DBGCLAIM	|</div><div class='add'>+			HDFGRTR_EL2_MDSCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGWVRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGWCRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGBVRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGBCRn_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hdfgrtr_desc, hdfgrtr_masks,</div><div class='add'>+				  hdfgrtr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgwtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_PMSLATFR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSIRR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSICR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSFCR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSEVFR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSCR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBSR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBPTR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBLIMITR_EL1,</div><div class='add'>+		   FEAT_SPE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_nBRBDATA		|</div><div class='add'>+		   HDFGWTR_EL2_nBRBCTL,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRCVICTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCSSCSRn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCSEQSTR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCPRGCTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCOSLAR		|</div><div class='add'>+		   HDFGWTR_EL2_TRCIMSPECn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCCNTVRn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCCLAIM		|</div><div class='add'>+		   HDFGWTR_EL2_TRCAUXCTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRC,</div><div class='add'>+		   FEAT_TRC_SR),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_PMUSERENR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMCR_EL0		|</div><div class='add'>+		   HDFGWTR_EL2_PMSWINC_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMSELR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMOVS		|</div><div class='add'>+		   HDFGWTR_EL2_PMINTEN		|</div><div class='add'>+		   HDFGWTR_EL2_PMCNTEN		|</div><div class='add'>+		   HDFGWTR_EL2_PMCCNTR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMCCFILTR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMEVTYPERn_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMEVCNTRn_EL0,</div><div class='add'>+		   FEAT_PMUv3),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRBTRG_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBSR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBPTR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBMAR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBLIMITR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBBASER_EL1,</div><div class='add'>+		   FEAT_TRBE),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGWTR_EL2_OSDLR_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_DoubleLock),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGWTR_EL2_OSECCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_OSLAR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGPRCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGCLAIM	|</div><div class='add'>+			HDFGWTR_EL2_MDSCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGWVRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGWCRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGBVRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGBCRn_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRFCR_EL1, FEAT_TRF),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hdfgwtr_desc, hdfgwtr_masks,</div><div class='add'>+				  hdfgwtr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgitr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_PSBCSYNC, FEAT_SPEv1p5),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_ATS1E1A, FEAT_ATS1A),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_COSPRCTX, FEAT_SPECRES2),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_nGCSEPP		|</div><div class='add'>+		   HFGITR_EL2_nGCSSTR_EL1	|</div><div class='add'>+		   HFGITR_EL2_nGCSPUSHM_EL1,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_nBRBIALL		|</div><div class='add'>+		   HFGITR_EL2_nBRBINJ,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_CPPRCTX		|</div><div class='add'>+		   HFGITR_EL2_DVPRCTX		|</div><div class='add'>+		   HFGITR_EL2_CFPRCTX,</div><div class='add'>+		   FEAT_SPECRES),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_TLBIRVAALE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1		|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAALE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1OS,</div><div class='add'>+		   FEAT_TLBIRANGE),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_TLBIVAALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVAAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIASIDE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVMALLE1OS,</div><div class='add'>+		   FEAT_TLBIOS),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_ATS1E1WP		|</div><div class='add'>+		   HFGITR_EL2_ATS1E1RP,</div><div class='add'>+		   FEAT_PAN2),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_DCCVADP, FEAT_DPB2),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGITR_EL2_DCCVAC	|</div><div class='add'>+			HFGITR_EL2_SVC_EL1	|</div><div class='add'>+			HFGITR_EL2_SVC_EL0	|</div><div class='add'>+			HFGITR_EL2_ERET		|</div><div class='add'>+			HFGITR_EL2_TLBIVAALE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVALE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAAE1	|</div><div class='add'>+			HFGITR_EL2_TLBIASIDE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVMALLE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAALE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVALE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVAAE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIASIDE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVAE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVMALLE1IS|</div><div class='add'>+			HFGITR_EL2_ATS1E0W	|</div><div class='add'>+			HFGITR_EL2_ATS1E0R	|</div><div class='add'>+			HFGITR_EL2_ATS1E1W	|</div><div class='add'>+			HFGITR_EL2_ATS1E1R	|</div><div class='add'>+			HFGITR_EL2_DCZVA	|</div><div class='add'>+			HFGITR_EL2_DCCIVAC	|</div><div class='add'>+			HFGITR_EL2_DCCVAP	|</div><div class='add'>+			HFGITR_EL2_DCCVAU	|</div><div class='add'>+			HFGITR_EL2_DCCISW	|</div><div class='add'>+			HFGITR_EL2_DCCSW	|</div><div class='add'>+			HFGITR_EL2_DCISW	|</div><div class='add'>+			HFGITR_EL2_DCIVAC	|</div><div class='add'>+			HFGITR_EL2_ICIVAU	|</div><div class='add'>+			HFGITR_EL2_ICIALLU	|</div><div class='add'>+			HFGITR_EL2_ICIALLUIS,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgitr_desc, hfgitr_masks,</div><div class='add'>+				  hfgitr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hafgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HAFGRTR_EL2_AMEVTYPER115_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER114_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER113_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER112_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER111_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER110_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER19_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER18_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER17_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER16_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER15_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER14_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER13_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER12_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER11_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER10_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR115_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR114_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR113_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR112_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR111_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR110_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR19_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR18_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR17_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR16_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR15_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR14_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR13_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR12_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR11_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR10_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMCNTEN1		|</div><div class='add'>+		   HAFGRTR_EL2_AMCNTEN0		|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR03_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR02_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR01_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR00_EL0,</div><div class='add'>+		   FEAT_AMUv1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hafgrtr_desc, hafgrtr_masks,</div><div class='add'>+				  hafgrtr_feat_map, FEAT_FGT);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgitr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGITR2_EL2_nDCCIVAPS, FEAT_PoPS),</div><div class='add'>+	NEEDS_FEAT(HFGITR2_EL2_TSBCSYNC, FEAT_TRBEv1p1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgitr2_desc, hfgitr2_masks,</div><div class='add'>+				  hfgitr2_feat_map, FEAT_FGT2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgrtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nPFAR_EL1, FEAT_PFAR),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nERXGSR_EL1, FEAT_RASv2),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nACTLRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nACTLRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nCPACRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nCPACRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLR2MASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRALIAS2_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCR2ALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCR2MASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCRMASK_EL1,</div><div class='add'>+		   FEAT_SRMASK),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nRCWSMASK_EL1, FEAT_THE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgrtr2_desc, hfgrtr2_masks,</div><div class='add'>+				  hfgrtr2_feat_map, FEAT_FGT2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgwtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nPFAR_EL1, FEAT_PFAR),</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nACTLRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nACTLRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nCPACRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nCPACRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLR2MASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRALIAS2_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCR2ALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCR2MASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCRMASK_EL1,</div><div class='add'>+		   FEAT_SRMASK),</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nRCWSMASK_EL1, FEAT_THE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hfgwtr2_desc, hfgwtr2_masks,</div><div class='add'>+				  hfgwtr2_feat_map, FEAT_FGT2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgrtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nMDSELR_EL1, FEAT_Debugv8p9),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMECR_EL1, feat_ebep_pmuv3_ss),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nTRCITECR_EL1, FEAT_ITE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMICFILTR_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nPMICNTR_EL0,</div><div class='add'>+		   FEAT_PMUv3_ICNTR),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMUACR_EL1, feat_pmuv3p9),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMSSCR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nPMSSDATA,</div><div class='add'>+		   FEAT_PMUv3_SS),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMIAR_EL1, FEAT_SEBEP),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMSDSFR_EL1, feat_spe_fds),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMBMAR_EL1, FEAT_SPE_nVM),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nSPMACCESSR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMCNTEN	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMCR_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMDEVAFF_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMEVCNTRn_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMEVTYPERn_EL0|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMID		|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMINTEN	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMOVS		|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMSCR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMSELR_EL0,</div><div class='add'>+		   FEAT_SPMU),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nMDSTEPOP_EL1, FEAT_STEP2),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nTRBMPAM_EL1, feat_trbe_mpam),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hdfgrtr2_desc, hdfgrtr2_masks,</div><div class='add'>+				  hdfgrtr2_feat_map, FEAT_FGT2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgwtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nMDSELR_EL1, FEAT_Debugv8p9),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMECR_EL1, feat_ebep_pmuv3_ss),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nTRCITECR_EL1, FEAT_ITE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMICFILTR_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nPMICNTR_EL0,</div><div class='add'>+		   FEAT_PMUv3_ICNTR),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMUACR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nPMZR_EL0,</div><div class='add'>+		   feat_pmuv3p9),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMSSCR_EL1, FEAT_PMUv3_SS),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMIAR_EL1, FEAT_SEBEP),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMSDSFR_EL1, feat_spe_fds),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMBMAR_EL1, FEAT_SPE_nVM),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nSPMACCESSR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMCNTEN	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMCR_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMEVCNTRn_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMEVTYPERn_EL0|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMINTEN	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMOVS		|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMSCR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMSELR_EL0,</div><div class='add'>+		   FEAT_SPMU),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nMDSTEPOP_EL1, FEAT_STEP2),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nTRBMPAM_EL1, feat_trbe_mpam),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP_FGT(hdfgwtr2_desc, hdfgwtr2_masks,</div><div class='add'>+				  hdfgwtr2_feat_map, FEAT_FGT2);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hcrx_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_PACMEn, feat_pauth_lr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnFPM, FEAT_FPMR),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_GCSEn, FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnIDCP128, FEAT_SYSREG128),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnSDERR, feat_aderr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_TMEA, FEAT_DoubleFault2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnSNERR, feat_anerr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_D128En, FEAT_D128),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_PTTWI, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_SCTLR2En, FEAT_SCTLR2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_TCR2En, FEAT_TCR2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_MSCEn		|</div><div class='add'>+		   HCRX_EL2_MCE2,</div><div class='add'>+		   FEAT_MOPS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_CMOW, FEAT_CMOW),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_VFNMI		|</div><div class='add'>+		   HCRX_EL2_VINMI		|</div><div class='add'>+		   HCRX_EL2_TALLINT,</div><div class='add'>+		   FEAT_NMI),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_SMPME, feat_sme_smps),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_FGTnXS		|</div><div class='add'>+		   HCRX_EL2_FnXS,</div><div class='add'>+		   FEAT_XS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnASR, FEAT_LS64_V),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnALS, FEAT_LS64),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnAS0, FEAT_LS64_ACCDATA),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(hcrx_desc, __HCRX_EL2,</div><div class='add'>+			      hcrx_feat_map, FEAT_HCX);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hcr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TID0, FEAT_AA32EL0),</div><div class='add'>+	NEEDS_FEAT_FIXED(HCR_EL2_RW, compute_hcr_rw),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_HCD, not_feat_aa64el3),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AMO		|</div><div class='add'>+		   HCR_EL2_BSU		|</div><div class='add'>+		   HCR_EL2_CD		|</div><div class='add'>+		   HCR_EL2_DC		|</div><div class='add'>+		   HCR_EL2_FB		|</div><div class='add'>+		   HCR_EL2_FMO		|</div><div class='add'>+		   HCR_EL2_ID		|</div><div class='add'>+		   HCR_EL2_IMO		|</div><div class='add'>+		   HCR_EL2_MIOCNCE	|</div><div class='add'>+		   HCR_EL2_PTW		|</div><div class='add'>+		   HCR_EL2_SWIO		|</div><div class='add'>+		   HCR_EL2_TACR		|</div><div class='add'>+		   HCR_EL2_TDZ		|</div><div class='add'>+		   HCR_EL2_TGE		|</div><div class='add'>+		   HCR_EL2_TID1		|</div><div class='add'>+		   HCR_EL2_TID2		|</div><div class='add'>+		   HCR_EL2_TID3		|</div><div class='add'>+		   HCR_EL2_TIDCP	|</div><div class='add'>+		   HCR_EL2_TPCP		|</div><div class='add'>+		   HCR_EL2_TPU		|</div><div class='add'>+		   HCR_EL2_TRVM		|</div><div class='add'>+		   HCR_EL2_TSC		|</div><div class='add'>+		   HCR_EL2_TSW		|</div><div class='add'>+		   HCR_EL2_TTLB		|</div><div class='add'>+		   HCR_EL2_TVM		|</div><div class='add'>+		   HCR_EL2_TWE		|</div><div class='add'>+		   HCR_EL2_TWI		|</div><div class='add'>+		   HCR_EL2_VF		|</div><div class='add'>+		   HCR_EL2_VI		|</div><div class='add'>+		   HCR_EL2_VM		|</div><div class='add'>+		   HCR_EL2_VSE,</div><div class='add'>+		   FEAT_AA64EL1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AMVOFFEN, FEAT_AMUv1p1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_EnSCXT, feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TICAB	|</div><div class='add'>+		   HCR_EL2_TID4		|</div><div class='add'>+		   HCR_EL2_TOCU,</div><div class='add'>+		   FEAT_EVT),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TTLBIS	|</div><div class='add'>+		   HCR_EL2_TTLBOS,</div><div class='add'>+		   FEAT_EVT_TTLBxS),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TLOR, FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_ATA		|</div><div class='add'>+		   HCR_EL2_DCT		|</div><div class='add'>+		   HCR_EL2_TID5,</div><div class='add'>+		   FEAT_MTE2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AT		| /* Ignore the original FEAT_NV */</div><div class='add'>+		   HCR_EL2_NV2		|</div><div class='add'>+		   HCR_EL2_NV,</div><div class='add'>+		   feat_nv2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_NV1, feat_nv2_e2h0_ni), /* Missing from JSON */</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_API		|</div><div class='add'>+		   HCR_EL2_APK,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TEA		|</div><div class='add'>+		   HCR_EL2_TERR,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_FIEN, feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_GPF, FEAT_RME),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_FWB, FEAT_S2FWB),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TME, FEAT_TME),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TWEDEL	|</div><div class='add'>+		   HCR_EL2_TWEDEn,</div><div class='add'>+		   FEAT_TWED),</div><div class='add'>+	NEEDS_FEAT_FIXED(HCR_EL2_E2H, compute_hcr_e2h),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(hcr_desc, HCR_EL2,</div><div class='add'>+			      hcr_feat_map, FEAT_AA64EL2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map sctlr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_NMEA	|</div><div class='add'>+		   SCTLR2_EL1_EASE,</div><div class='add'>+		   FEAT_DoubleFault2),</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_EnADERR, feat_aderr),</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_EnANERR, feat_anerr),</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_EnIDCP128, FEAT_SYSREG128),</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_EnPACM	|</div><div class='add'>+		   SCTLR2_EL1_EnPACM0,</div><div class='add'>+		   feat_pauth_lr),</div><div class='add'>+	NEEDS_FEAT(SCTLR2_EL1_CPTA	|</div><div class='add'>+		   SCTLR2_EL1_CPTA0	|</div><div class='add'>+		   SCTLR2_EL1_CPTM	|</div><div class='add'>+		   SCTLR2_EL1_CPTM0,</div><div class='add'>+		   FEAT_CPA2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(sctlr2_desc, SCTLR2_EL1,</div><div class='add'>+			      sctlr2_feat_map, FEAT_SCTLR2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map tcr2_el2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_FNG1	|</div><div class='add'>+		   TCR2_EL2_FNG0	|</div><div class='add'>+		   TCR2_EL2_A2,</div><div class='add'>+		   feat_asid2_e2h1),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_DisCH1	|</div><div class='add'>+		   TCR2_EL2_DisCH0	|</div><div class='add'>+		   TCR2_EL2_D128,</div><div class='add'>+		   feat_d128_e2h1),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_AMEC1, feat_mec_e2h1),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_AMEC0, FEAT_MEC),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_HAFT, FEAT_HAFT),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_PTTWI	|</div><div class='add'>+		   TCR2_EL2_PnCH,</div><div class='add'>+		   FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_AIE, FEAT_AIE),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_POE		|</div><div class='add'>+		   TCR2_EL2_E0POE,</div><div class='add'>+		   FEAT_S1POE),</div><div class='add'>+	NEEDS_FEAT(TCR2_EL2_PIE, FEAT_S1PIE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(tcr2_el2_desc, TCR2_EL2,</div><div class='add'>+			      tcr2_el2_feat_map, FEAT_TCR2);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map sctlr_el1_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_CP15BEN	|</div><div class='add'>+		   SCTLR_EL1_ITD	|</div><div class='add'>+		   SCTLR_EL1_SED,</div><div class='add'>+		   FEAT_AA32EL0),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_BT0	|</div><div class='add'>+		   SCTLR_EL1_BT1,</div><div class='add'>+		   FEAT_BTI),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_CMOW, FEAT_CMOW),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_TSCXT, feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EIS	|</div><div class='add'>+		   SCTLR_EL1_EOS,</div><div class='add'>+		   FEAT_ExS),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnFPM, FEAT_FPMR),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_IESB, FEAT_IESB),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnALS, FEAT_LS64),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnAS0, FEAT_LS64_ACCDATA),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnASR, FEAT_LS64_V),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_nAA, FEAT_LSE2),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_LSMAOE	|</div><div class='add'>+		   SCTLR_EL1_nTLSMD,</div><div class='add'>+		   FEAT_LSMAOC),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EE, FEAT_MixedEnd),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_E0E, feat_mixedendel0),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_MSCEn, FEAT_MOPS),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_ATA0	|</div><div class='add'>+		   SCTLR_EL1_ATA	|</div><div class='add'>+		   SCTLR_EL1_TCF0	|</div><div class='add'>+		   SCTLR_EL1_TCF,</div><div class='add'>+		   FEAT_MTE2),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_ITFSB, feat_mte_async),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_TCSO0	|</div><div class='add'>+		   SCTLR_EL1_TCSO,</div><div class='add'>+		   FEAT_MTE_STORE_ONLY),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_NMI	|</div><div class='add'>+		   SCTLR_EL1_SPINTMASK,</div><div class='add'>+		   FEAT_NMI),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_SPAN, FEAT_PAN),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EPAN, FEAT_PAN3),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnDA	|</div><div class='add'>+		   SCTLR_EL1_EnDB	|</div><div class='add'>+		   SCTLR_EL1_EnIA	|</div><div class='add'>+		   SCTLR_EL1_EnIB,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnTP2, FEAT_SME),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_EnRCTX, FEAT_SPECRES),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_DSSBS, FEAT_SSBS),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_TIDCP, FEAT_TIDCP1),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_TME0	|</div><div class='add'>+		   SCTLR_EL1_TME	|</div><div class='add'>+		   SCTLR_EL1_TMT0	|</div><div class='add'>+		   SCTLR_EL1_TMT,</div><div class='add'>+		   FEAT_TME),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_TWEDEL	|</div><div class='add'>+		   SCTLR_EL1_TWEDEn,</div><div class='add'>+		   FEAT_TWED),</div><div class='add'>+	NEEDS_FEAT(SCTLR_EL1_UCI	|</div><div class='add'>+		   SCTLR_EL1_EE		|</div><div class='add'>+		   SCTLR_EL1_E0E	|</div><div class='add'>+		   SCTLR_EL1_WXN	|</div><div class='add'>+		   SCTLR_EL1_nTWE	|</div><div class='add'>+		   SCTLR_EL1_nTWI	|</div><div class='add'>+		   SCTLR_EL1_UCT	|</div><div class='add'>+		   SCTLR_EL1_DZE	|</div><div class='add'>+		   SCTLR_EL1_I		|</div><div class='add'>+		   SCTLR_EL1_UMA	|</div><div class='add'>+		   SCTLR_EL1_SA0	|</div><div class='add'>+		   SCTLR_EL1_SA		|</div><div class='add'>+		   SCTLR_EL1_C		|</div><div class='add'>+		   SCTLR_EL1_A		|</div><div class='add'>+		   SCTLR_EL1_M,</div><div class='add'>+		   FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(sctlr_el1_desc, SCTLR_EL1,</div><div class='add'>+			      sctlr_el1_feat_map, FEAT_AA64EL1);</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map mdcr_el2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_EBWE, FEAT_Debugv8p9),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_TDOSA, FEAT_DoubleLock),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_PMEE, FEAT_EBEP),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_TDCC, FEAT_FGT),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_MTPME, FEAT_MTPMU),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_HPME	|</div><div class='add'>+		   MDCR_EL2_HPMN	|</div><div class='add'>+		   MDCR_EL2_TPMCR	|</div><div class='add'>+		   MDCR_EL2_TPM,</div><div class='add'>+		   FEAT_PMUv3),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_HPMD, feat_pmuv3p1),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_HCCD	|</div><div class='add'>+		   MDCR_EL2_HLP,</div><div class='add'>+		   feat_pmuv3p5),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_HPMFZO, feat_pmuv3p7),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_PMSSE, FEAT_PMUv3_SS),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_E2PB	|</div><div class='add'>+		   MDCR_EL2_TPMS,</div><div class='add'>+		   FEAT_SPE),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_HPMFZS, FEAT_SPEv1p2),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_EnSPM, FEAT_SPMU),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_EnSTEPOP, FEAT_STEP2),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_E2TB, FEAT_TRBE),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_TTRF, FEAT_TRF),</div><div class='add'>+	NEEDS_FEAT(MDCR_EL2_TDA		|</div><div class='add'>+		   MDCR_EL2_TDE		|</div><div class='add'>+		   MDCR_EL2_TDRA,</div><div class='add'>+		   FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const DECLARE_FEAT_MAP(mdcr_el2_desc, MDCR_EL2,</div><div class='add'>+			      mdcr_el2_feat_map, FEAT_AA64EL2);</div><div class='add'>+</div><div class='add'>+static void __init check_feat_map(const struct reg_bits_to_feat_map *map,</div><div class='add'>+				  int map_size, u64 res0, const char *str)</div><div class='add'>+{</div><div class='add'>+	u64 mask = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; map_size; i++)</div><div class='add'>+		mask |= map[i].bits;</div><div class='add'>+</div><div class='add'>+	if (mask != ~res0)</div><div class='add'>+		kvm_err("Undefined %s behaviour, bits %016llx\n",</div><div class='add'>+			str, mask ^ ~res0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 reg_feat_map_bits(const struct reg_bits_to_feat_map *map)</div><div class='add'>+{</div><div class='add'>+	return map-&gt;flags &amp; RES0_POINTER ? ~(*map-&gt;res0p) : map-&gt;bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init check_reg_desc(const struct reg_feat_map_desc *r)</div><div class='add'>+{</div><div class='add'>+	check_feat_map(r-&gt;bit_feat_map, r-&gt;bit_feat_map_sz,</div><div class='add'>+		       ~reg_feat_map_bits(&amp;r-&gt;feat_map), r-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init check_feature_map(void)</div><div class='add'>+{</div><div class='add'>+	check_reg_desc(&amp;hfgrtr_desc);</div><div class='add'>+	check_reg_desc(&amp;hfgwtr_desc);</div><div class='add'>+	check_reg_desc(&amp;hfgitr_desc);</div><div class='add'>+	check_reg_desc(&amp;hdfgrtr_desc);</div><div class='add'>+	check_reg_desc(&amp;hdfgwtr_desc);</div><div class='add'>+	check_reg_desc(&amp;hafgrtr_desc);</div><div class='add'>+	check_reg_desc(&amp;hfgrtr2_desc);</div><div class='add'>+	check_reg_desc(&amp;hfgwtr2_desc);</div><div class='add'>+	check_reg_desc(&amp;hfgitr2_desc);</div><div class='add'>+	check_reg_desc(&amp;hdfgrtr2_desc);</div><div class='add'>+	check_reg_desc(&amp;hdfgwtr2_desc);</div><div class='add'>+	check_reg_desc(&amp;hcrx_desc);</div><div class='add'>+	check_reg_desc(&amp;hcr_desc);</div><div class='add'>+	check_reg_desc(&amp;sctlr2_desc);</div><div class='add'>+	check_reg_desc(&amp;tcr2_el2_desc);</div><div class='add'>+	check_reg_desc(&amp;sctlr_el1_desc);</div><div class='add'>+	check_reg_desc(&amp;mdcr_el2_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool idreg_feat_match(struct kvm *kvm, const struct reg_bits_to_feat_map *map)</div><div class='add'>+{</div><div class='add'>+	u64 regval = kvm-&gt;arch.id_regs[map-&gt;regidx];</div><div class='add'>+	u64 regfld = (regval &gt;&gt; map-&gt;shift) &amp; GENMASK(map-&gt;width - 1, 0);</div><div class='add'>+</div><div class='add'>+	if (map-&gt;sign) {</div><div class='add'>+		s64 sfld = sign_extend64(regfld, map-&gt;width - 1);</div><div class='add'>+		s64 slim = sign_extend64(map-&gt;lo_lim, map-&gt;width - 1);</div><div class='add'>+		return sfld &gt;= slim;</div><div class='add'>+	} else {</div><div class='add'>+		return regfld &gt;= map-&gt;lo_lim;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 __compute_fixed_bits(struct kvm *kvm,</div><div class='add'>+				const struct reg_bits_to_feat_map *map,</div><div class='add'>+				int map_size,</div><div class='add'>+				u64 *fixed_bits,</div><div class='add'>+				unsigned long require,</div><div class='add'>+				unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	u64 val = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; map_size; i++) {</div><div class='add'>+		bool match;</div><div class='add'>+</div><div class='add'>+		if ((map[i].flags &amp; require) != require)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (map[i].flags &amp; exclude)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (map[i].flags &amp; CALL_FUNC)</div><div class='add'>+			match = (map[i].flags &amp; FIXED_VALUE) ?</div><div class='add'>+				map[i].fval(kvm, fixed_bits) :</div><div class='add'>+				map[i].match(kvm);</div><div class='add'>+		else</div><div class='add'>+			match = idreg_feat_match(kvm, &amp;map[i]);</div><div class='add'>+</div><div class='add'>+		if (!match || (map[i].flags &amp; FIXED_VALUE))</div><div class='add'>+			val |= reg_feat_map_bits(&amp;map[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_res0_bits(struct kvm *kvm,</div><div class='add'>+			     const struct reg_bits_to_feat_map *map,</div><div class='add'>+			     int map_size,</div><div class='add'>+			     unsigned long require,</div><div class='add'>+			     unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	return __compute_fixed_bits(kvm, map, map_size, NULL,</div><div class='add'>+				    require, exclude | FIXED_VALUE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_reg_res0_bits(struct kvm *kvm,</div><div class='add'>+				 const struct reg_feat_map_desc *r,</div><div class='add'>+				 unsigned long require, unsigned long exclude)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	u64 res0;</div><div class='add'>+</div><div class='add'>+	res0 = compute_res0_bits(kvm, r-&gt;bit_feat_map, r-&gt;bit_feat_map_sz,</div><div class='add'>+				 require, exclude);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If computing FGUs, don't take RES0 or register existence</div><div class='add'>+	 * into account -- we're not computing bits for the register</div><div class='add'>+	 * itself.</div><div class='add'>+	 */</div><div class='add'>+	if (!(exclude &amp; NEVER_FGU)) {</div><div class='add'>+		res0 |= compute_res0_bits(kvm, &amp;r-&gt;feat_map, 1, require, exclude);</div><div class='add'>+		res0 |= ~reg_feat_map_bits(&amp;r-&gt;feat_map);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_reg_fixed_bits(struct kvm *kvm,</div><div class='add'>+				  const struct reg_feat_map_desc *r,</div><div class='add'>+				  u64 *fixed_bits, unsigned long require,</div><div class='add'>+				  unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	return __compute_fixed_bits(kvm, r-&gt;bit_feat_map, r-&gt;bit_feat_map_sz,</div><div class='add'>+				    fixed_bits, require | FIXED_VALUE, exclude);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void compute_fgu(struct kvm *kvm, enum fgt_group_id fgt)</div><div class='add'>+{</div><div class='add'>+	u64 val = 0;</div><div class='add'>+</div><div class='add'>+	switch (fgt) {</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgrtr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgwtr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgitr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hdfgrtr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hdfgwtr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hafgrtr_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgrtr2_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgwtr2_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hfgitr2_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hdfgrtr2_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		val |= compute_reg_res0_bits(kvm, &amp;hdfgwtr2_desc,</div><div class='add'>+					     0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.fgu[fgt] = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *res1)</div><div class='add'>+{</div><div class='add'>+	u64 fixed = 0, mask;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case HFGRTR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgrtr_desc, 0, 0);</div><div class='add'>+		*res1 = HFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGWTR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgwtr_desc, 0, 0);</div><div class='add'>+		*res1 = HFGWTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgitr_desc, 0, 0);</div><div class='add'>+		*res1 = HFGITR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hdfgrtr_desc, 0, 0);</div><div class='add'>+		*res1 = HDFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGWTR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hdfgwtr_desc, 0, 0);</div><div class='add'>+		*res1 = HDFGWTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hafgrtr_desc, 0, 0);</div><div class='add'>+		*res1 = HAFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgrtr2_desc, 0, 0);</div><div class='add'>+		*res1 = HFGRTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGWTR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgwtr2_desc, 0, 0);</div><div class='add'>+		*res1 = HFGWTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hfgitr2_desc, 0, 0);</div><div class='add'>+		*res1 = HFGITR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hdfgrtr2_desc, 0, 0);</div><div class='add'>+		*res1 = HDFGRTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGWTR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hdfgwtr2_desc, 0, 0);</div><div class='add'>+		*res1 = HDFGWTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HCRX_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hcrx_desc, 0, 0);</div><div class='add'>+		*res1 = __HCRX_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HCR_EL2:</div><div class='add'>+		mask = compute_reg_fixed_bits(kvm, &amp;hcr_desc, &amp;fixed, 0, 0);</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;hcr_desc, 0, 0);</div><div class='add'>+		*res0 |= (mask &amp; ~fixed);</div><div class='add'>+		*res1 = HCR_EL2_RES1 | (mask &amp; fixed);</div><div class='add'>+		break;</div><div class='add'>+	case SCTLR2_EL1:</div><div class='add'>+	case SCTLR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;sctlr2_desc, 0, 0);</div><div class='add'>+		*res1 = SCTLR2_EL1_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case TCR2_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;tcr2_el2_desc, 0, 0);</div><div class='add'>+		*res1 = TCR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case SCTLR_EL1:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;sctlr_el1_desc, 0, 0);</div><div class='add'>+		*res1 = SCTLR_EL1_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case MDCR_EL2:</div><div class='add'>+		*res0 = compute_reg_res0_bits(kvm, &amp;mdcr_el2_desc, 0, 0);</div><div class='add'>+		*res1 = MDCR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		*res0 = *res1 = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c<br/>index ce8886122ed3..3515a273eaa2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/debug.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/debug.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/debug.c</a></div><div class='hunk'>@@ -3,7 +3,8 @@</div><div class='ctx'>  * Debug and Guest Debug support</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2015 - Linaro Ltd</div><div class='del'>- * Author: Alex Bennée &lt;alex.bennee@linaro.org&gt;</div><div class='add'>+ * Authors: Alex Bennée &lt;alex.bennee@linaro.org&gt;</div><div class='add'>+ * 	    Oliver Upton &lt;oliver.upton@linux.dev&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='hunk'>@@ -14,72 +15,6 @@</div><div class='ctx'> #include &lt;asm/kvm_arm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_emulate.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "trace.h"</div><div class='del'>-</div><div class='del'>-/* These are the bits of MDSCR_EL1 we may manipulate */</div><div class='del'>-#define MDSCR_EL1_DEBUG_MASK	(DBG_MDSCR_SS | \</div><div class='del'>-				DBG_MDSCR_KDE | \</div><div class='del'>-				DBG_MDSCR_MDE)</div><div class='del'>-</div><div class='del'>-static DEFINE_PER_CPU(u64, mdcr_el2);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * save/restore_guest_debug_regs</div><div class='del'>- *</div><div class='del'>- * For some debug operations we need to tweak some guest registers. As</div><div class='del'>- * a result we need to save the state of those registers before we</div><div class='del'>- * make those modifications.</div><div class='del'>- *</div><div class='del'>- * Guest access to MDSCR_EL1 is trapped by the hypervisor and handled</div><div class='del'>- * after we have restored the preserved value to the main context.</div><div class='del'>- *</div><div class='del'>- * When single-step is enabled by userspace, we tweak PSTATE.SS on every</div><div class='del'>- * guest entry. Preserve PSTATE.SS so we can restore the original value</div><div class='del'>- * for the vcpu after the single-step is disabled.</div><div class='del'>- */</div><div class='del'>-static void save_guest_debug_regs(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='del'>-</div><div class='del'>-	vcpu-&gt;arch.guest_debug_preserved.mdscr_el1 = val;</div><div class='del'>-</div><div class='del'>-	trace_kvm_arm_set_dreg32("Saved MDSCR_EL1",</div><div class='del'>-				vcpu-&gt;arch.guest_debug_preserved.mdscr_el1);</div><div class='del'>-</div><div class='del'>-	vcpu-&gt;arch.guest_debug_preserved.pstate_ss =</div><div class='del'>-					(*vcpu_cpsr(vcpu) &amp; DBG_SPSR_SS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void restore_guest_debug_regs(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 val = vcpu-&gt;arch.guest_debug_preserved.mdscr_el1;</div><div class='del'>-</div><div class='del'>-	vcpu_write_sys_reg(vcpu, val, MDSCR_EL1);</div><div class='del'>-</div><div class='del'>-	trace_kvm_arm_set_dreg32("Restored MDSCR_EL1",</div><div class='del'>-				vcpu_read_sys_reg(vcpu, MDSCR_EL1));</div><div class='del'>-</div><div class='del'>-	if (vcpu-&gt;arch.guest_debug_preserved.pstate_ss)</div><div class='del'>-		*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;</div><div class='del'>-	else</div><div class='del'>-		*vcpu_cpsr(vcpu) &amp;= ~DBG_SPSR_SS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * kvm_arm_init_debug - grab what we need for debug</div><div class='del'>- *</div><div class='del'>- * Currently the sole task of this function is to retrieve the initial</div><div class='del'>- * value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has</div><div class='del'>- * presumably been set-up by some knowledgeable bootcode.</div><div class='del'>- *</div><div class='del'>- * It is called once per-cpu during CPU hyp initialisation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void kvm_arm_init_debug(void)</div><div class='del'>-{</div><div class='del'>-	__this_cpu_write(mdcr_el2, kvm_call_hyp_ret(__kvm_get_mdcr_el2));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_arm_setup_mdcr_el2 - configure vcpu mdcr_el2 value</div><div class='ctx'>  *</div><div class='hunk'>@@ -95,11 +30,14 @@ void kvm_arm_init_debug(void)</div><div class='ctx'>  */</div><div class='ctx'> static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	preempt_disable();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This also clears MDCR_EL2_E2PB_MASK and MDCR_EL2_E2TB_MASK</div><div class='ctx'> 	 * to disable guest access to the profiling and trace buffers</div><div class='ctx'> 	 */</div><div class='del'>-	vcpu-&gt;arch.mdcr_el2 = __this_cpu_read(mdcr_el2) &amp; MDCR_EL2_HPMN_MASK;</div><div class='add'>+	vcpu-&gt;arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN,</div><div class='add'>+					 *host_data_ptr(nr_event_counters));</div><div class='ctx'> 	vcpu-&gt;arch.mdcr_el2 |= (MDCR_EL2_TPM |</div><div class='ctx'> 				MDCR_EL2_TPMS |</div><div class='ctx'> 				MDCR_EL2_TTRF |</div><div class='hunk'>@@ -113,233 +51,235 @@ static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu-&gt;arch.mdcr_el2 |= MDCR_EL2_TDE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Trap debug register access when one of the following is true:</div><div class='del'>-	 *  - Userspace is using the hardware to debug the guest</div><div class='del'>-	 *  (KVM_GUESTDBG_USE_HW is set).</div><div class='del'>-	 *  - The guest is not using debug (DEBUG_DIRTY clear).</div><div class='del'>-	 *  - The guest has enabled the OS Lock (debug exceptions are blocked).</div><div class='add'>+	 * Trap debug registers if the guest doesn't have ownership of them.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW) ||</div><div class='del'>-	    !vcpu_get_flag(vcpu, DEBUG_DIRTY) ||</div><div class='del'>-	    kvm_vcpu_os_lock_enabled(vcpu))</div><div class='add'>+	if (!kvm_guest_owns_debug_regs(vcpu))</div><div class='ctx'> 		vcpu-&gt;arch.mdcr_el2 |= MDCR_EL2_TDA;</div><div class='ctx'> </div><div class='del'>-	trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu-&gt;arch.mdcr_el2);</div><div class='del'>-}</div><div class='add'>+	if (vcpu_has_nv(vcpu))</div><div class='add'>+		kvm_nested_setup_mdcr_el2(vcpu);</div><div class='add'>+</div><div class='add'>+	/* Write MDCR_EL2 directly if we're already at EL2 */</div><div class='add'>+	if (has_vhe())</div><div class='add'>+		write_sysreg(vcpu-&gt;arch.mdcr_el2, mdcr_el2);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_arm_vcpu_init_debug - setup vcpu debug traps</div><div class='del'>- *</div><div class='del'>- * @vcpu:	the vcpu pointer</div><div class='del'>- *</div><div class='del'>- * Set vcpu initial mdcr_el2 value.</div><div class='del'>- */</div><div class='del'>-void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	kvm_arm_setup_mdcr_el2(vcpu);</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_arm_reset_debug_ptr - reset the debug ptr to point to the vcpu state</div><div class='del'>- * @vcpu:	the vcpu pointer</div><div class='del'>- */</div><div class='add'>+void kvm_init_host_debug_data(void)</div><div class='add'>+{</div><div class='add'>+	u64 dfr0 = read_sysreg(id_aa64dfr0_el1);</div><div class='add'>+</div><div class='add'>+	if (cpuid_feature_extract_signed_field(dfr0, ID_AA64DFR0_EL1_PMUVer_SHIFT) &gt; 0)</div><div class='add'>+		*host_data_ptr(nr_event_counters) = FIELD_GET(ARMV8_PMU_PMCR_N,</div><div class='add'>+							      read_sysreg(pmcr_el0));</div><div class='add'>+</div><div class='add'>+	*host_data_ptr(debug_brps) = SYS_FIELD_GET(ID_AA64DFR0_EL1, BRPs, dfr0);</div><div class='add'>+	*host_data_ptr(debug_wrps) = SYS_FIELD_GET(ID_AA64DFR0_EL1, WRPs, dfr0);</div><div class='ctx'> </div><div class='del'>-void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu)</div><div class='add'>+	if (has_vhe())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHIFT) &amp;&amp;</div><div class='add'>+	    !(read_sysreg_s(SYS_PMBIDR_EL1) &amp; PMBIDR_EL1_P))</div><div class='add'>+		host_data_set_flag(HAS_SPE);</div><div class='add'>+</div><div class='add'>+	/* Check if we have BRBE implemented and available at the host */</div><div class='add'>+	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_BRBE_SHIFT))</div><div class='add'>+		host_data_set_flag(HAS_BRBE);</div><div class='add'>+</div><div class='add'>+	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT)) {</div><div class='add'>+		/* Force disable trace in protected mode in case of no TRBE */</div><div class='add'>+		if (is_protected_kvm_enabled())</div><div class='add'>+			host_data_set_flag(EL1_TRACING_CONFIGURED);</div><div class='add'>+</div><div class='add'>+		if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &amp;&amp;</div><div class='add'>+		    !(read_sysreg_s(SYS_TRBIDR_EL1) &amp; TRBIDR_EL1_P))</div><div class='add'>+			host_data_set_flag(HAS_TRBE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_debug_init_vhe(void)</div><div class='ctx'> {</div><div class='del'>-	vcpu-&gt;arch.debug_ptr = &amp;vcpu-&gt;arch.vcpu_debug_state;</div><div class='add'>+	/* Clear PMSCR_EL1.E{0,1}SPE which reset to UNKNOWN values. */</div><div class='add'>+	if (SYS_FIELD_GET(ID_AA64DFR0_EL1, PMSVer, read_sysreg(id_aa64dfr0_el1)))</div><div class='add'>+		write_sysreg_el1(0, SYS_PMSCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_arm_setup_debug - set up debug related stuff</div><div class='add'>+/*</div><div class='add'>+ * Configures the 'external' MDSCR_EL1 value for the guest, i.e. when the host</div><div class='add'>+ * has taken over MDSCR_EL1.</div><div class='ctx'>  *</div><div class='del'>- * @vcpu:	the vcpu pointer</div><div class='add'>+ *  - Userspace is single-stepping the guest, and MDSCR_EL1.SS is forced to 1.</div><div class='ctx'>  *</div><div class='del'>- * This is called before each entry into the hypervisor to setup any</div><div class='del'>- * debug related registers.</div><div class='add'>+ *  - Userspace is using the breakpoint/watchpoint registers to debug the</div><div class='add'>+ *    guest, and MDSCR_EL1.MDE is forced to 1.</div><div class='ctx'>  *</div><div class='del'>- * Additionally, KVM only traps guest accesses to the debug registers if</div><div class='del'>- * the guest is not actively using them (see the DEBUG_DIRTY</div><div class='del'>- * flag on vcpu-&gt;arch.iflags).  Since the guest must not interfere</div><div class='del'>- * with the hardware state when debugging the guest, we must ensure that</div><div class='del'>- * trapping is enabled whenever we are debugging the guest using the</div><div class='del'>- * debug registers.</div><div class='add'>+ *  - The guest has enabled the OS Lock, and KVM is forcing MDSCR_EL1.MDE to 0,</div><div class='add'>+ *    masking all debug exceptions affected by the OS Lock.</div><div class='ctx'>  */</div><div class='add'>+static void setup_external_mdscr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Use the guest's MDSCR_EL1 as a starting point, since there are</div><div class='add'>+	 * several other features controlled by MDSCR_EL1 that are not relevant</div><div class='add'>+	 * to the host.</div><div class='add'>+	 *</div><div class='add'>+	 * Clear the bits that KVM may use which also satisfies emulation of</div><div class='add'>+	 * the OS Lock as MDSCR_EL1.MDE is cleared.</div><div class='add'>+	 */</div><div class='add'>+	u64 mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1) &amp; ~(MDSCR_EL1_SS |</div><div class='add'>+							   MDSCR_EL1_MDE |</div><div class='add'>+							   MDSCR_EL1_KDE);</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_SINGLESTEP)</div><div class='add'>+		mdscr |= MDSCR_EL1_SS;</div><div class='ctx'> </div><div class='del'>-void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)</div><div class='add'>+	if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW)</div><div class='add'>+		mdscr |= MDSCR_EL1_MDE | MDSCR_EL1_KDE;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.external_mdscr_el1 = mdscr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_vcpu_load_debug(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned long mdscr, orig_mdcr_el2 = vcpu-&gt;arch.mdcr_el2;</div><div class='add'>+	u64 mdscr;</div><div class='ctx'> </div><div class='del'>-	trace_kvm_arm_setup_debug(vcpu, vcpu-&gt;guest_debug);</div><div class='add'>+	/* Must be called before kvm_vcpu_load_vhe() */</div><div class='add'>+	KVM_BUG_ON(vcpu_get_flag(vcpu, SYSREGS_ON_CPU), vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='del'>-	kvm_arm_setup_mdcr_el2(vcpu);</div><div class='add'>+	if (has_vhe())</div><div class='add'>+		*host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2);</div><div class='ctx'> </div><div class='del'>-	/* Check if we need to use the debug registers. */</div><div class='add'>+	/*</div><div class='add'>+	 * Determine which of the possible debug states we're in:</div><div class='add'>+	 *</div><div class='add'>+	 *  - VCPU_DEBUG_HOST_OWNED: KVM has taken ownership of the guest's</div><div class='add'>+	 *    breakpoint/watchpoint registers, or needs to use MDSCR_EL1 to do</div><div class='add'>+	 *    software step or emulate the effects of the OS Lock being enabled.</div><div class='add'>+	 *</div><div class='add'>+	 *  - VCPU_DEBUG_GUEST_OWNED: The guest has debug exceptions enabled, and</div><div class='add'>+	 *    the breakpoint/watchpoint registers need to be loaded eagerly.</div><div class='add'>+	 *</div><div class='add'>+	 *  - VCPU_DEBUG_FREE: Neither of the above apply, no breakpoint/watchpoint</div><div class='add'>+	 *    context needs to be loaded on the CPU.</div><div class='add'>+	 */</div><div class='ctx'> 	if (vcpu-&gt;guest_debug || kvm_vcpu_os_lock_enabled(vcpu)) {</div><div class='del'>-		/* Save guest debug state */</div><div class='del'>-		save_guest_debug_regs(vcpu);</div><div class='add'>+		vcpu-&gt;arch.debug_owner = VCPU_DEBUG_HOST_OWNED;</div><div class='add'>+		setup_external_mdscr(vcpu);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Single Step (ARM ARM D2.12.3 The software step state</div><div class='del'>-		 * machine)</div><div class='del'>-		 *</div><div class='del'>-		 * If we are doing Single Step we need to manipulate</div><div class='del'>-		 * the guest's MDSCR_EL1.SS and PSTATE.SS. Once the</div><div class='del'>-		 * step has occurred the hypervisor will trap the</div><div class='del'>-		 * debug exception and we return to userspace.</div><div class='del'>-		 *</div><div class='del'>-		 * If the guest attempts to single step its userspace</div><div class='del'>-		 * we would have to deal with a trapped exception</div><div class='del'>-		 * while in the guest kernel. Because this would be</div><div class='del'>-		 * hard to unwind we suppress the guest's ability to</div><div class='del'>-		 * do so by masking MDSCR_EL.SS.</div><div class='del'>-		 *</div><div class='del'>-		 * This confuses guest debuggers which use</div><div class='del'>-		 * single-step behind the scenes but everything</div><div class='del'>-		 * returns to normal once the host is no longer</div><div class='del'>-		 * debugging the system.</div><div class='add'>+		 * Steal the guest's single-step state machine if userspace wants</div><div class='add'>+		 * single-step the guest.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_SINGLESTEP) {</div><div class='del'>-			/*</div><div class='del'>-			 * If the software step state at the last guest exit</div><div class='del'>-			 * was Active-pending, we don't set DBG_SPSR_SS so</div><div class='del'>-			 * that the state is maintained (to not run another</div><div class='del'>-			 * single-step until the pending Software Step</div><div class='del'>-			 * exception is taken).</div><div class='del'>-			 */</div><div class='del'>-			if (!vcpu_get_flag(vcpu, DBG_SS_ACTIVE_PENDING))</div><div class='add'>+			if (*vcpu_cpsr(vcpu) &amp; DBG_SPSR_SS)</div><div class='add'>+				vcpu_clear_flag(vcpu, GUEST_SS_ACTIVE_PENDING);</div><div class='add'>+			else</div><div class='add'>+				vcpu_set_flag(vcpu, GUEST_SS_ACTIVE_PENDING);</div><div class='add'>+</div><div class='add'>+			if (!vcpu_get_flag(vcpu, HOST_SS_ACTIVE_PENDING))</div><div class='ctx'> 				*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;</div><div class='ctx'> 			else</div><div class='ctx'> 				*vcpu_cpsr(vcpu) &amp;= ~DBG_SPSR_SS;</div><div class='del'>-</div><div class='del'>-			mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='del'>-			mdscr |= DBG_MDSCR_SS;</div><div class='del'>-			vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);</div><div class='del'>-		} else {</div><div class='del'>-			mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='del'>-			mdscr &amp;= ~DBG_MDSCR_SS;</div><div class='del'>-			vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='ctx'> </div><div class='del'>-		trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu));</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * HW Breakpoints and watchpoints</div><div class='del'>-		 *</div><div class='del'>-		 * We simply switch the debug_ptr to point to our new</div><div class='del'>-		 * external_debug_state which has been populated by the</div><div class='del'>-		 * debug ioctl. The existing DEBUG_DIRTY mechanism ensures</div><div class='del'>-		 * the registers are updated on the world switch.</div><div class='del'>-		 */</div><div class='del'>-		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW) {</div><div class='del'>-			/* Enable breakpoints/watchpoints */</div><div class='del'>-			mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='del'>-			mdscr |= DBG_MDSCR_MDE;</div><div class='del'>-			vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);</div><div class='del'>-</div><div class='del'>-			vcpu-&gt;arch.debug_ptr = &amp;vcpu-&gt;arch.external_debug_state;</div><div class='del'>-			vcpu_set_flag(vcpu, DEBUG_DIRTY);</div><div class='del'>-</div><div class='del'>-			trace_kvm_arm_set_regset("BKPTS", get_num_brps(),</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_bcr[0],</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_bvr[0]);</div><div class='del'>-</div><div class='del'>-			trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_wcr[0],</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_wvr[0]);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The OS Lock blocks debug exceptions in all ELs when it is</div><div class='del'>-		 * enabled. If the guest has enabled the OS Lock, constrain its</div><div class='del'>-		 * effects to the guest. Emulate the behavior by clearing</div><div class='del'>-		 * MDSCR_EL1.MDE. In so doing, we ensure that host debug</div><div class='del'>-		 * exceptions are unaffected by guest configuration of the OS</div><div class='del'>-		 * Lock.</div><div class='del'>-		 */</div><div class='del'>-		} else if (kvm_vcpu_os_lock_enabled(vcpu)) {</div><div class='del'>-			mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);</div><div class='del'>-			mdscr &amp;= ~DBG_MDSCR_MDE;</div><div class='del'>-			vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);</div><div class='del'>-		}</div><div class='add'>+		if (mdscr &amp; (MDSCR_EL1_KDE | MDSCR_EL1_MDE))</div><div class='add'>+			vcpu-&gt;arch.debug_owner = VCPU_DEBUG_GUEST_OWNED;</div><div class='add'>+		else</div><div class='add'>+			vcpu-&gt;arch.debug_owner = VCPU_DEBUG_FREE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!vcpu-&gt;guest_debug &amp;&amp;</div><div class='del'>-		vcpu-&gt;arch.debug_ptr != &amp;vcpu-&gt;arch.vcpu_debug_state);</div><div class='del'>-</div><div class='del'>-	/* If KDE or MDE are set, perform a full save/restore cycle. */</div><div class='del'>-	if (vcpu_read_sys_reg(vcpu, MDSCR_EL1) &amp; (DBG_MDSCR_KDE | DBG_MDSCR_MDE))</div><div class='del'>-		vcpu_set_flag(vcpu, DEBUG_DIRTY);</div><div class='del'>-</div><div class='del'>-	/* Write mdcr_el2 changes since vcpu_load on VHE systems */</div><div class='del'>-	if (has_vhe() &amp;&amp; orig_mdcr_el2 != vcpu-&gt;arch.mdcr_el2)</div><div class='del'>-		write_sysreg(vcpu-&gt;arch.mdcr_el2, mdcr_el2);</div><div class='del'>-</div><div class='del'>-	trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_read_sys_reg(vcpu, MDSCR_EL1));</div><div class='add'>+	kvm_arm_setup_mdcr_el2(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_arm_clear_debug(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_vcpu_put_debug(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	trace_kvm_arm_clear_debug(vcpu-&gt;guest_debug);</div><div class='add'>+	if (has_vhe())</div><div class='add'>+		write_sysreg(*host_data_ptr(host_debug_state.mdcr_el2), mdcr_el2);</div><div class='add'>+</div><div class='add'>+	if (likely(!(vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_SINGLESTEP)))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Restore the guest's debug registers if we were using them.</div><div class='add'>+	 * Save the host's software step state and restore the guest's before</div><div class='add'>+	 * potentially returning to userspace.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu-&gt;guest_debug || kvm_vcpu_os_lock_enabled(vcpu)) {</div><div class='del'>-		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_SINGLESTEP) {</div><div class='del'>-			if (!(*vcpu_cpsr(vcpu) &amp; DBG_SPSR_SS))</div><div class='del'>-				/*</div><div class='del'>-				 * Mark the vcpu as ACTIVE_PENDING</div><div class='del'>-				 * until Software Step exception is taken.</div><div class='del'>-				 */</div><div class='del'>-				vcpu_set_flag(vcpu, DBG_SS_ACTIVE_PENDING);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		restore_guest_debug_regs(vcpu);</div><div class='add'>+	if (!(*vcpu_cpsr(vcpu) &amp; DBG_SPSR_SS))</div><div class='add'>+		vcpu_set_flag(vcpu, HOST_SS_ACTIVE_PENDING);</div><div class='add'>+	else</div><div class='add'>+		vcpu_clear_flag(vcpu, HOST_SS_ACTIVE_PENDING);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * If we were using HW debug we need to restore the</div><div class='del'>-		 * debug_ptr to the guest debug state.</div><div class='del'>-		 */</div><div class='del'>-		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW) {</div><div class='del'>-			kvm_arm_reset_debug_ptr(vcpu);</div><div class='add'>+	if (vcpu_get_flag(vcpu, GUEST_SS_ACTIVE_PENDING))</div><div class='add'>+		*vcpu_cpsr(vcpu) &amp;= ~DBG_SPSR_SS;</div><div class='add'>+	else</div><div class='add'>+		*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			trace_kvm_arm_set_regset("BKPTS", get_num_brps(),</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_bcr[0],</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_bvr[0]);</div><div class='add'>+/*</div><div class='add'>+ * Updates ownership of the debug registers after a trapped guest access to a</div><div class='add'>+ * breakpoint/watchpoint register. Host ownership of the debug registers is of</div><div class='add'>+ * strictly higher priority, and it is the responsibility of the VMM to emulate</div><div class='add'>+ * guest debug exceptions in this configuration.</div><div class='add'>+ */</div><div class='add'>+void kvm_debug_set_guest_ownership(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (kvm_host_owns_debug_regs(vcpu))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-			trace_kvm_arm_set_regset("WAPTS", get_num_wrps(),</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_wcr[0],</div><div class='del'>-						&amp;vcpu-&gt;arch.debug_ptr-&gt;dbg_wvr[0]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	vcpu-&gt;arch.debug_owner = VCPU_DEBUG_GUEST_OWNED;</div><div class='add'>+	kvm_arm_setup_mdcr_el2(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_debug_handle_oslar(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='del'>-	u64 dfr0;</div><div class='add'>+	if (val &amp; OSLAR_EL1_OSLK)</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, OSLSR_EL1, |=, OSLSR_EL1_OSLK);</div><div class='add'>+	else</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, OSLSR_EL1, &amp;=, ~OSLSR_EL1_OSLK);</div><div class='ctx'> </div><div class='del'>-	/* For VHE, there is nothing to do */</div><div class='del'>-	if (has_vhe())</div><div class='del'>-		return;</div><div class='add'>+	preempt_disable();</div><div class='add'>+	kvm_arch_vcpu_put(vcpu);</div><div class='add'>+	kvm_arch_vcpu_load(vcpu, smp_processor_id());</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dfr0 = read_sysreg(id_aa64dfr0_el1);</div><div class='del'>-	/*</div><div class='del'>-	 * If SPE is present on this CPU and is available at current EL,</div><div class='del'>-	 * we may need to check if the host state needs to be saved.</div><div class='del'>-	 */</div><div class='del'>-	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHIFT) &amp;&amp;</div><div class='del'>-	    !(read_sysreg_s(SYS_PMBIDR_EL1) &amp; BIT(PMBIDR_EL1_P_SHIFT)))</div><div class='del'>-		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_SPE);</div><div class='add'>+static bool skip_trbe_access(bool skip_condition)</div><div class='add'>+{</div><div class='add'>+	return (WARN_ON_ONCE(preemptible()) || skip_condition ||</div><div class='add'>+		is_protected_kvm_enabled() || !is_kvm_arm_initialised());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_enable_trbe(void)</div><div class='add'>+{</div><div class='add'>+	if (!skip_trbe_access(has_vhe()))</div><div class='add'>+		host_data_set_flag(TRBE_ENABLED);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_enable_trbe);</div><div class='ctx'> </div><div class='del'>-	/* Check if we have TRBE implemented and available at the host */</div><div class='del'>-	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &amp;&amp;</div><div class='del'>-	    !(read_sysreg_s(SYS_TRBIDR_EL1) &amp; TRBIDR_EL1_P))</div><div class='del'>-		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE);</div><div class='add'>+void kvm_disable_trbe(void)</div><div class='add'>+{</div><div class='add'>+	if (!skip_trbe_access(has_vhe()))</div><div class='add'>+		host_data_clear_flag(TRBE_ENABLED);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_disable_trbe);</div><div class='ctx'> </div><div class='del'>-void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu)</div><div class='add'>+void kvm_tracing_set_el1_configuration(u64 trfcr_while_in_guest)</div><div class='ctx'> {</div><div class='del'>-	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE);</div><div class='del'>-	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);</div><div class='add'>+	if (skip_trbe_access(false))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (has_vhe()) {</div><div class='add'>+		write_sysreg_s(trfcr_while_in_guest, SYS_TRFCR_EL12);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*host_data_ptr(trfcr_while_in_guest) = trfcr_while_in_guest;</div><div class='add'>+	if (read_sysreg_s(SYS_TRFCR_EL1) != trfcr_while_in_guest)</div><div class='add'>+		host_data_set_flag(EL1_TRACING_CONFIGURED);</div><div class='add'>+	else</div><div class='add'>+		host_data_clear_flag(EL1_TRACING_CONFIGURED);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_tracing_set_el1_configuration);</div><div class='head'>diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c<br/>index 05b6435d02a9..834f13fb1fb7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/emulate-nested.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/emulate-nested.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/emulate-nested.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/emulate-nested.c</a></div><div class='hunk'>@@ -16,9 +16,13 @@</div><div class='ctx'> </div><div class='ctx'> enum trap_behaviour {</div><div class='ctx'> 	BEHAVE_HANDLE_LOCALLY	= 0,</div><div class='add'>+</div><div class='ctx'> 	BEHAVE_FORWARD_READ	= BIT(0),</div><div class='ctx'> 	BEHAVE_FORWARD_WRITE	= BIT(1),</div><div class='del'>-	BEHAVE_FORWARD_ANY	= BEHAVE_FORWARD_READ | BEHAVE_FORWARD_WRITE,</div><div class='add'>+	BEHAVE_FORWARD_RW	= BEHAVE_FORWARD_READ | BEHAVE_FORWARD_WRITE,</div><div class='add'>+</div><div class='add'>+	/* Traps that take effect in Host EL0, this is rare! */</div><div class='add'>+	BEHAVE_FORWARD_IN_HOST_EL0	= BIT(2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct trap_bits {</div><div class='hunk'>@@ -79,12 +83,15 @@ enum cgt_group_id {</div><div class='ctx'> 	CGT_MDCR_E2TB,</div><div class='ctx'> 	CGT_MDCR_TDCC,</div><div class='ctx'> </div><div class='del'>-	CGT_CPACR_E0POE,</div><div class='ctx'> 	CGT_CPTR_TAM,</div><div class='ctx'> 	CGT_CPTR_TCPAC,</div><div class='ctx'> </div><div class='ctx'> 	CGT_HCRX_EnFPM,</div><div class='ctx'> 	CGT_HCRX_TCR2En,</div><div class='add'>+	CGT_HCRX_SCTLR2En,</div><div class='add'>+</div><div class='add'>+	CGT_CNTHCTL_EL1TVT,</div><div class='add'>+	CGT_CNTHCTL_EL1TVCT,</div><div class='ctx'> </div><div class='ctx'> 	CGT_ICH_HCR_TC,</div><div class='ctx'> 	CGT_ICH_HCR_TALL0,</div><div class='hunk'>@@ -102,10 +109,12 @@ enum cgt_group_id {</div><div class='ctx'> 	CGT_HCR_TTLB_TTLBOS,</div><div class='ctx'> 	CGT_HCR_TVM_TRVM,</div><div class='ctx'> 	CGT_HCR_TVM_TRVM_HCRX_TCR2En,</div><div class='add'>+	CGT_HCR_TVM_TRVM_HCRX_SCTLR2En,</div><div class='ctx'> 	CGT_HCR_TPU_TICAB,</div><div class='ctx'> 	CGT_HCR_TPU_TOCU,</div><div class='ctx'> 	CGT_HCR_NV1_nNV2_ENSCXT,</div><div class='ctx'> 	CGT_MDCR_TPM_TPMCR,</div><div class='add'>+	CGT_MDCR_TPM_HPMN,</div><div class='ctx'> 	CGT_MDCR_TDE_TDA,</div><div class='ctx'> 	CGT_MDCR_TDE_TDOSA,</div><div class='ctx'> 	CGT_MDCR_TDE_TDRA,</div><div class='hunk'>@@ -120,8 +129,11 @@ enum cgt_group_id {</div><div class='ctx'> 	__COMPLEX_CONDITIONS__,</div><div class='ctx'> 	CGT_CNTHCTL_EL1PCTEN = __COMPLEX_CONDITIONS__,</div><div class='ctx'> 	CGT_CNTHCTL_EL1PTEN,</div><div class='add'>+	CGT_CNTHCTL_EL1NVPCT,</div><div class='add'>+	CGT_CNTHCTL_EL1NVVCT,</div><div class='ctx'> </div><div class='ctx'> 	CGT_CPTR_TTA,</div><div class='add'>+	CGT_MDCR_HPMN,</div><div class='ctx'> </div><div class='ctx'> 	/* Must be last */</div><div class='ctx'> 	__NR_CGT_GROUP_IDS__</div><div class='hunk'>@@ -138,7 +150,7 @@ static const struct trap_bits coarse_trap_bits[] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value 		= HCR_TID2,</div><div class='ctx'> 		.mask		= HCR_TID2,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TID3] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='hunk'>@@ -162,37 +174,37 @@ static const struct trap_bits coarse_trap_bits[] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TIDCP,</div><div class='ctx'> 		.mask		= HCR_TIDCP,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TACR] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TACR,</div><div class='ctx'> 		.mask		= HCR_TACR,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TSW] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TSW,</div><div class='ctx'> 		.mask		= HCR_TSW,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TPC] = { /* Also called TCPC when FEAT_DPB is implemented */</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TPC,</div><div class='ctx'> 		.mask		= HCR_TPC,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TPU] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TPU,</div><div class='ctx'> 		.mask		= HCR_TPU,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TTLB] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TTLB,</div><div class='ctx'> 		.mask		= HCR_TTLB,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TVM] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='hunk'>@@ -204,7 +216,7 @@ static const struct trap_bits coarse_trap_bits[] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TDZ,</div><div class='ctx'> 		.mask		= HCR_TDZ,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TRVM] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='hunk'>@@ -216,205 +228,219 @@ static const struct trap_bits coarse_trap_bits[] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TLOR,</div><div class='ctx'> 		.mask		= HCR_TLOR,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TERR] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TERR,</div><div class='ctx'> 		.mask		= HCR_TERR,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_APK] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= 0,</div><div class='ctx'> 		.mask		= HCR_APK,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_NV] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_NV,</div><div class='ctx'> 		.mask		= HCR_NV,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_NV_nNV2] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_NV,</div><div class='ctx'> 		.mask		= HCR_NV | HCR_NV2,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_NV1_nNV2] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_NV | HCR_NV1,</div><div class='ctx'> 		.mask		= HCR_NV | HCR_NV1 | HCR_NV2,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_AT] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_AT,</div><div class='ctx'> 		.mask		= HCR_AT,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_nFIEN] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= 0,</div><div class='ctx'> 		.mask		= HCR_FIEN,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TID4] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value 		= HCR_TID4,</div><div class='ctx'> 		.mask		= HCR_TID4,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TICAB] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value 		= HCR_TICAB,</div><div class='ctx'> 		.mask		= HCR_TICAB,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TOCU] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value 		= HCR_TOCU,</div><div class='ctx'> 		.mask		= HCR_TOCU,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_ENSCXT] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value 		= 0,</div><div class='ctx'> 		.mask		= HCR_ENSCXT,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TTLBIS] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TTLBIS,</div><div class='ctx'> 		.mask		= HCR_TTLBIS,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCR_TTLBOS] = {</div><div class='ctx'> 		.index		= HCR_EL2,</div><div class='ctx'> 		.value		= HCR_TTLBOS,</div><div class='ctx'> 		.mask		= HCR_TTLBOS,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TPMCR] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TPMCR,</div><div class='ctx'> 		.mask		= MDCR_EL2_TPMCR,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW |</div><div class='add'>+				  BEHAVE_FORWARD_IN_HOST_EL0,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TPM] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TPM,</div><div class='ctx'> 		.mask		= MDCR_EL2_TPM,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW |</div><div class='add'>+				  BEHAVE_FORWARD_IN_HOST_EL0,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TDE] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TDE,</div><div class='ctx'> 		.mask		= MDCR_EL2_TDE,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TDA] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TDA,</div><div class='ctx'> 		.mask		= MDCR_EL2_TDA,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TDOSA] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TDOSA,</div><div class='ctx'> 		.mask		= MDCR_EL2_TDOSA,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TDRA] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TDRA,</div><div class='ctx'> 		.mask		= MDCR_EL2_TDRA,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_E2PB] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= 0,</div><div class='ctx'> 		.mask		= BIT(MDCR_EL2_E2PB_SHIFT),</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TPMS] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TPMS,</div><div class='ctx'> 		.mask		= MDCR_EL2_TPMS,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TTRF] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TTRF,</div><div class='ctx'> 		.mask		= MDCR_EL2_TTRF,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_E2TB] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= 0,</div><div class='ctx'> 		.mask		= BIT(MDCR_EL2_E2TB_SHIFT),</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_MDCR_TDCC] = {</div><div class='ctx'> 		.index		= MDCR_EL2,</div><div class='ctx'> 		.value		= MDCR_EL2_TDCC,</div><div class='ctx'> 		.mask		= MDCR_EL2_TDCC,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='del'>-	},</div><div class='del'>-	[CGT_CPACR_E0POE] = {</div><div class='del'>-		.index		= CPTR_EL2,</div><div class='del'>-		.value		= CPACR_ELx_E0POE,</div><div class='del'>-		.mask		= CPACR_ELx_E0POE,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_CPTR_TAM] = {</div><div class='ctx'> 		.index		= CPTR_EL2,</div><div class='ctx'> 		.value		= CPTR_EL2_TAM,</div><div class='ctx'> 		.mask		= CPTR_EL2_TAM,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_CPTR_TCPAC] = {</div><div class='ctx'> 		.index		= CPTR_EL2,</div><div class='ctx'> 		.value		= CPTR_EL2_TCPAC,</div><div class='ctx'> 		.mask		= CPTR_EL2_TCPAC,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCRX_EnFPM] = {</div><div class='ctx'> 		.index		= HCRX_EL2,</div><div class='ctx'> 		.value 		= 0,</div><div class='ctx'> 		.mask		= HCRX_EL2_EnFPM,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_HCRX_TCR2En] = {</div><div class='ctx'> 		.index		= HCRX_EL2,</div><div class='ctx'> 		.value 		= 0,</div><div class='ctx'> 		.mask		= HCRX_EL2_TCR2En,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='add'>+	},</div><div class='add'>+	[CGT_HCRX_SCTLR2En] = {</div><div class='add'>+		.index		= HCRX_EL2,</div><div class='add'>+		.value		= 0,</div><div class='add'>+		.mask		= HCRX_EL2_SCTLR2En,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='add'>+	},</div><div class='add'>+	[CGT_CNTHCTL_EL1TVT] = {</div><div class='add'>+		.index		= CNTHCTL_EL2,</div><div class='add'>+		.value		= CNTHCTL_EL1TVT,</div><div class='add'>+		.mask		= CNTHCTL_EL1TVT,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='add'>+	},</div><div class='add'>+	[CGT_CNTHCTL_EL1TVCT] = {</div><div class='add'>+		.index		= CNTHCTL_EL2,</div><div class='add'>+		.value		= CNTHCTL_EL1TVCT,</div><div class='add'>+		.mask		= CNTHCTL_EL1TVCT,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_READ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_ICH_HCR_TC] = {</div><div class='ctx'> 		.index		= ICH_HCR_EL2,</div><div class='del'>-		.value		= ICH_HCR_TC,</div><div class='del'>-		.mask		= ICH_HCR_TC,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.value		= ICH_HCR_EL2_TC,</div><div class='add'>+		.mask		= ICH_HCR_EL2_TC,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_ICH_HCR_TALL0] = {</div><div class='ctx'> 		.index		= ICH_HCR_EL2,</div><div class='del'>-		.value		= ICH_HCR_TALL0,</div><div class='del'>-		.mask		= ICH_HCR_TALL0,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.value		= ICH_HCR_EL2_TALL0,</div><div class='add'>+		.mask		= ICH_HCR_EL2_TALL0,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_ICH_HCR_TALL1] = {</div><div class='ctx'> 		.index		= ICH_HCR_EL2,</div><div class='del'>-		.value		= ICH_HCR_TALL1,</div><div class='del'>-		.mask		= ICH_HCR_TALL1,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.value		= ICH_HCR_EL2_TALL1,</div><div class='add'>+		.mask		= ICH_HCR_EL2_TALL1,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> 	[CGT_ICH_HCR_TDIR] = {</div><div class='ctx'> 		.index		= ICH_HCR_EL2,</div><div class='del'>-		.value		= ICH_HCR_TDIR,</div><div class='del'>-		.mask		= ICH_HCR_TDIR,</div><div class='del'>-		.behaviour	= BEHAVE_FORWARD_ANY,</div><div class='add'>+		.value		= ICH_HCR_EL2_TDIR,</div><div class='add'>+		.mask		= ICH_HCR_EL2_TDIR,</div><div class='add'>+		.behaviour	= BEHAVE_FORWARD_RW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -431,10 +457,13 @@ static const enum cgt_group_id *coarse_control_combo[] = {</div><div class='ctx'> 	MCB(CGT_HCR_TVM_TRVM,		CGT_HCR_TVM, CGT_HCR_TRVM),</div><div class='ctx'> 	MCB(CGT_HCR_TVM_TRVM_HCRX_TCR2En,</div><div class='ctx'> 					CGT_HCR_TVM, CGT_HCR_TRVM, CGT_HCRX_TCR2En),</div><div class='add'>+	MCB(CGT_HCR_TVM_TRVM_HCRX_SCTLR2En,</div><div class='add'>+					CGT_HCR_TVM, CGT_HCR_TRVM, CGT_HCRX_SCTLR2En),</div><div class='ctx'> 	MCB(CGT_HCR_TPU_TICAB,		CGT_HCR_TPU, CGT_HCR_TICAB),</div><div class='ctx'> 	MCB(CGT_HCR_TPU_TOCU,		CGT_HCR_TPU, CGT_HCR_TOCU),</div><div class='ctx'> 	MCB(CGT_HCR_NV1_nNV2_ENSCXT,	CGT_HCR_NV1_nNV2, CGT_HCR_ENSCXT),</div><div class='ctx'> 	MCB(CGT_MDCR_TPM_TPMCR,		CGT_MDCR_TPM, CGT_MDCR_TPMCR),</div><div class='add'>+	MCB(CGT_MDCR_TPM_HPMN,		CGT_MDCR_TPM, CGT_MDCR_HPMN),</div><div class='ctx'> 	MCB(CGT_MDCR_TDE_TDA,		CGT_MDCR_TDE, CGT_MDCR_TDA),</div><div class='ctx'> 	MCB(CGT_MDCR_TDE_TDOSA,		CGT_MDCR_TDE, CGT_MDCR_TDOSA),</div><div class='ctx'> 	MCB(CGT_MDCR_TDE_TDRA,		CGT_MDCR_TDE, CGT_MDCR_TDRA),</div><div class='hunk'>@@ -474,7 +503,7 @@ static enum trap_behaviour check_cnthctl_el1pcten(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (get_sanitized_cnthctl(vcpu) &amp; (CNTHCTL_EL1PCTEN &lt;&lt; 10))</div><div class='ctx'> 		return BEHAVE_HANDLE_LOCALLY;</div><div class='ctx'> </div><div class='del'>-	return BEHAVE_FORWARD_ANY;</div><div class='add'>+	return BEHAVE_FORWARD_RW;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum trap_behaviour check_cnthctl_el1pten(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -482,7 +511,33 @@ static enum trap_behaviour check_cnthctl_el1pten(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (get_sanitized_cnthctl(vcpu) &amp; (CNTHCTL_EL1PCEN &lt;&lt; 10))</div><div class='ctx'> 		return BEHAVE_HANDLE_LOCALLY;</div><div class='ctx'> </div><div class='del'>-	return BEHAVE_FORWARD_ANY;</div><div class='add'>+	return BEHAVE_FORWARD_RW;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_nested_nv2_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	val = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='add'>+	return ((val &amp; (HCR_E2H | HCR_TGE | HCR_NV2 | HCR_NV1 | HCR_NV)) == (HCR_E2H | HCR_NV2 | HCR_NV));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum trap_behaviour check_cnthctl_el1nvpct(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!is_nested_nv2_guest(vcpu) ||</div><div class='add'>+	    !(__vcpu_sys_reg(vcpu, CNTHCTL_EL2) &amp; CNTHCTL_EL1NVPCT))</div><div class='add'>+		return BEHAVE_HANDLE_LOCALLY;</div><div class='add'>+</div><div class='add'>+	return BEHAVE_FORWARD_RW;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum trap_behaviour check_cnthctl_el1nvvct(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!is_nested_nv2_guest(vcpu) ||</div><div class='add'>+	    !(__vcpu_sys_reg(vcpu, CNTHCTL_EL2) &amp; CNTHCTL_EL1NVVCT))</div><div class='add'>+		return BEHAVE_HANDLE_LOCALLY;</div><div class='add'>+</div><div class='add'>+	return BEHAVE_FORWARD_RW;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum trap_behaviour check_cptr_tta(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -492,8 +547,36 @@ static enum trap_behaviour check_cptr_tta(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='ctx'> 		val = translate_cptr_el2_to_cpacr_el1(val);</div><div class='ctx'> </div><div class='del'>-	if (val &amp; CPACR_ELx_TTA)</div><div class='del'>-		return BEHAVE_FORWARD_ANY;</div><div class='add'>+	if (val &amp; CPACR_EL1_TTA)</div><div class='add'>+		return BEHAVE_FORWARD_RW;</div><div class='add'>+</div><div class='add'>+	return BEHAVE_HANDLE_LOCALLY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum trap_behaviour check_mdcr_hpmn(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u32 sysreg = esr_sys64_to_sysreg(kvm_vcpu_get_esr(vcpu));</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	switch (sysreg) {</div><div class='add'>+	case SYS_PMEVTYPERn_EL0(0) ... SYS_PMEVTYPERn_EL0(30):</div><div class='add'>+	case SYS_PMEVCNTRn_EL0(0) ... SYS_PMEVCNTRn_EL0(30):</div><div class='add'>+		idx = (sys_reg_CRm(sysreg) &amp; 0x3) &lt;&lt; 3 | sys_reg_Op2(sysreg);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_PMXEVTYPER_EL0:</div><div class='add'>+	case SYS_PMXEVCNTR_EL0:</div><div class='add'>+		idx = SYS_FIELD_GET(PMSELR_EL0, SEL,</div><div class='add'>+				    __vcpu_sys_reg(vcpu, PMSELR_EL0));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Someone used this trap helper for something else... */</div><div class='add'>+		KVM_BUG_ON(1, vcpu-&gt;kvm);</div><div class='add'>+		return BEHAVE_HANDLE_LOCALLY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kvm_pmu_counter_is_hyp(vcpu, idx))</div><div class='add'>+		return BEHAVE_FORWARD_RW | BEHAVE_FORWARD_IN_HOST_EL0;</div><div class='ctx'> </div><div class='ctx'> 	return BEHAVE_HANDLE_LOCALLY;</div><div class='ctx'> }</div><div class='hunk'>@@ -504,7 +587,10 @@ static enum trap_behaviour check_cptr_tta(struct kvm_vcpu *vcpu)</div><div class='ctx'> static const complex_condition_check ccc[] = {</div><div class='ctx'> 	CCC(CGT_CNTHCTL_EL1PCTEN, check_cnthctl_el1pcten),</div><div class='ctx'> 	CCC(CGT_CNTHCTL_EL1PTEN, check_cnthctl_el1pten),</div><div class='add'>+	CCC(CGT_CNTHCTL_EL1NVPCT, check_cnthctl_el1nvpct),</div><div class='add'>+	CCC(CGT_CNTHCTL_EL1NVVCT, check_cnthctl_el1nvvct),</div><div class='ctx'> 	CCC(CGT_CPTR_TTA, check_cptr_tta),</div><div class='add'>+	CCC(CGT_MDCR_HPMN, check_mdcr_hpmn),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -546,6 +632,11 @@ struct encoding_to_trap_config {</div><div class='ctx'> 	const unsigned int		line;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * WARNING: using ranges is a treacherous endeavour, as sysregs that</div><div class='add'>+ * are part of an architectural range are not necessarily contiguous</div><div class='add'>+ * in the [Op0,Op1,CRn,CRm,Ops] space. Tread carefully.</div><div class='add'>+ */</div><div class='ctx'> #define SR_RANGE_TRAP(sr_start, sr_end, trap_id)			\</div><div class='ctx'> 	{								\</div><div class='ctx'> 		.encoding	= sr_start,				\</div><div class='hunk'>@@ -701,6 +792,7 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(OP_TLBI_RVALE1OSNXS,	CGT_HCR_TTLB_TTLBOS),</div><div class='ctx'> 	SR_TRAP(OP_TLBI_RVAALE1OSNXS,	CGT_HCR_TTLB_TTLBOS),</div><div class='ctx'> 	SR_TRAP(SYS_SCTLR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='add'>+	SR_TRAP(SYS_SCTLR2_EL1,		CGT_HCR_TVM_TRVM_HCRX_SCTLR2En),</div><div class='ctx'> 	SR_TRAP(SYS_TTBR0_EL1,		CGT_HCR_TVM_TRVM),</div><div class='ctx'> 	SR_TRAP(SYS_TTBR1_EL1,		CGT_HCR_TVM_TRVM),</div><div class='ctx'> 	SR_TRAP(SYS_TCR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='hunk'>@@ -711,6 +803,10 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(SYS_MAIR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='ctx'> 	SR_TRAP(SYS_AMAIR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='ctx'> 	SR_TRAP(SYS_CONTEXTIDR_EL1,	CGT_HCR_TVM_TRVM),</div><div class='add'>+	SR_TRAP(SYS_PIR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='add'>+	SR_TRAP(SYS_PIRE0_EL1,		CGT_HCR_TVM_TRVM),</div><div class='add'>+	SR_TRAP(SYS_POR_EL0,		CGT_HCR_TVM_TRVM),</div><div class='add'>+	SR_TRAP(SYS_POR_EL1,		CGT_HCR_TVM_TRVM),</div><div class='ctx'> 	SR_TRAP(SYS_TCR2_EL1,		CGT_HCR_TVM_TRVM_HCRX_TCR2En),</div><div class='ctx'> 	SR_TRAP(SYS_DC_ZVA,		CGT_HCR_TDZ),</div><div class='ctx'> 	SR_TRAP(SYS_DC_GVA,		CGT_HCR_TDZ),</div><div class='hunk'>@@ -815,11 +911,15 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 		      SYS_CNTHP_CVAL_EL2, CGT_HCR_NV),</div><div class='ctx'> 	SR_RANGE_TRAP(SYS_CNTHV_TVAL_EL2,</div><div class='ctx'> 		      SYS_CNTHV_CVAL_EL2, CGT_HCR_NV),</div><div class='del'>-	/* All _EL02, _EL12 registers */</div><div class='add'>+	/* All _EL02, _EL12 registers up to CNTKCTL_EL12*/</div><div class='ctx'> 	SR_RANGE_TRAP(sys_reg(3, 5, 0, 0, 0),</div><div class='ctx'> 		      sys_reg(3, 5, 10, 15, 7), CGT_HCR_NV),</div><div class='ctx'> 	SR_RANGE_TRAP(sys_reg(3, 5, 12, 0, 0),</div><div class='del'>-		      sys_reg(3, 5, 14, 15, 7), CGT_HCR_NV),</div><div class='add'>+		      sys_reg(3, 5, 14, 1, 0), CGT_HCR_NV),</div><div class='add'>+	SR_TRAP(SYS_CNTP_CTL_EL02,	CGT_CNTHCTL_EL1NVPCT),</div><div class='add'>+	SR_TRAP(SYS_CNTP_CVAL_EL02,	CGT_CNTHCTL_EL1NVPCT),</div><div class='add'>+	SR_TRAP(SYS_CNTV_CTL_EL02,	CGT_CNTHCTL_EL1NVVCT),</div><div class='add'>+	SR_TRAP(SYS_CNTV_CVAL_EL02,	CGT_CNTHCTL_EL1NVVCT),</div><div class='ctx'> 	SR_TRAP(OP_AT_S1E2R,		CGT_HCR_NV),</div><div class='ctx'> 	SR_TRAP(OP_AT_S1E2W,		CGT_HCR_NV),</div><div class='ctx'> 	SR_TRAP(OP_AT_S12E1R,		CGT_HCR_NV),</div><div class='hunk'>@@ -919,77 +1019,77 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(SYS_PMOVSCLR_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMCEID0_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMCEID1_EL0,	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMXEVTYPER_EL0,	CGT_MDCR_TPM),</div><div class='add'>+	SR_TRAP(SYS_PMXEVTYPER_EL0,	CGT_MDCR_TPM_HPMN),</div><div class='ctx'> 	SR_TRAP(SYS_PMSWINC_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMSELR_EL0,		CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMXEVCNTR_EL0,	CGT_MDCR_TPM),</div><div class='add'>+	SR_TRAP(SYS_PMXEVCNTR_EL0,	CGT_MDCR_TPM_HPMN),</div><div class='ctx'> 	SR_TRAP(SYS_PMCCNTR_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMUSERENR_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMINTENSET_EL1,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMINTENCLR_EL1,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_PMMIR_EL1,		CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(0),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(1),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(2),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(3),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(4),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(5),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(6),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(7),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(8),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(9),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(10),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(11),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(12),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(13),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(14),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(15),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(16),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(17),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(18),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(19),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(20),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(21),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(22),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(23),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(24),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(25),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(26),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(27),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(28),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(29),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVCNTRn_EL0(30),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(0),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(1),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(2),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(3),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(4),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(5),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(6),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(7),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(8),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(9),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(10),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(11),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(12),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(13),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(14),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(15),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(16),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(17),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(18),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(19),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(20),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(21),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(22),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(23),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(24),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(25),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(26),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(27),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(28),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(29),	CGT_MDCR_TPM),</div><div class='del'>-	SR_TRAP(SYS_PMEVTYPERn_EL0(30),	CGT_MDCR_TPM),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(0),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(1),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(2),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(3),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(4),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(5),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(6),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(7),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(8),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(9),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(10),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(11),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(12),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(13),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(14),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(15),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(16),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(17),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(18),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(19),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(20),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(21),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(22),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(23),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(24),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(25),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(26),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(27),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(28),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(29),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVCNTRn_EL0(30),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(0),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(1),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(2),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(3),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(4),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(5),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(6),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(7),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(8),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(9),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(10),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(11),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(12),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(13),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(14),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(15),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(16),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(17),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(18),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(19),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(20),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(21),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(22),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(23),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(24),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(25),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(26),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(27),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(28),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(29),	CGT_MDCR_TPM_HPMN),</div><div class='add'>+	SR_TRAP(SYS_PMEVTYPERn_EL0(30),	CGT_MDCR_TPM_HPMN),</div><div class='ctx'> 	SR_TRAP(SYS_PMCCFILTR_EL0,	CGT_MDCR_TPM),</div><div class='ctx'> 	SR_TRAP(SYS_MDCCSR_EL0,		CGT_MDCR_TDCC_TDE_TDA),</div><div class='ctx'> 	SR_TRAP(SYS_MDCCINT_EL1,	CGT_MDCR_TDCC_TDE_TDA),</div><div class='hunk'>@@ -1085,6 +1185,7 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(SYS_PMSIRR_EL1,		CGT_MDCR_TPMS),</div><div class='ctx'> 	SR_TRAP(SYS_PMSLATFR_EL1,	CGT_MDCR_TPMS),</div><div class='ctx'> 	SR_TRAP(SYS_PMSNEVFR_EL1,	CGT_MDCR_TPMS),</div><div class='add'>+	SR_TRAP(SYS_PMSDSFR_EL1,	CGT_MDCR_TPMS),</div><div class='ctx'> 	SR_TRAP(SYS_TRFCR_EL1,		CGT_MDCR_TTRF),</div><div class='ctx'> 	SR_TRAP(SYS_TRBBASER_EL1,	CGT_MDCR_E2TB),</div><div class='ctx'> 	SR_TRAP(SYS_TRBLIMITR_EL1,	CGT_MDCR_E2TB),</div><div class='hunk'>@@ -1141,7 +1242,6 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(SYS_AMEVTYPER1_EL0(13),	CGT_CPTR_TAM),</div><div class='ctx'> 	SR_TRAP(SYS_AMEVTYPER1_EL0(14),	CGT_CPTR_TAM),</div><div class='ctx'> 	SR_TRAP(SYS_AMEVTYPER1_EL0(15),	CGT_CPTR_TAM),</div><div class='del'>-	SR_TRAP(SYS_POR_EL0,		CGT_CPACR_E0POE),</div><div class='ctx'> 	/* op0=2, op1=1, and CRn&lt;0b1000 */</div><div class='ctx'> 	SR_RANGE_TRAP(sys_reg(2, 1, 0, 0, 0),</div><div class='ctx'> 		      sys_reg(2, 1, 7, 15, 7), CGT_CPTR_TTA),</div><div class='hunk'>@@ -1150,6 +1250,11 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {</div><div class='ctx'> 	SR_TRAP(SYS_CNTP_CTL_EL0,	CGT_CNTHCTL_EL1PTEN),</div><div class='ctx'> 	SR_TRAP(SYS_CNTPCT_EL0,		CGT_CNTHCTL_EL1PCTEN),</div><div class='ctx'> 	SR_TRAP(SYS_CNTPCTSS_EL0,	CGT_CNTHCTL_EL1PCTEN),</div><div class='add'>+	SR_TRAP(SYS_CNTV_TVAL_EL0,	CGT_CNTHCTL_EL1TVT),</div><div class='add'>+	SR_TRAP(SYS_CNTV_CVAL_EL0,	CGT_CNTHCTL_EL1TVT),</div><div class='add'>+	SR_TRAP(SYS_CNTV_CTL_EL0,	CGT_CNTHCTL_EL1TVT),</div><div class='add'>+	SR_TRAP(SYS_CNTVCT_EL0,		CGT_CNTHCTL_EL1TVCT),</div><div class='add'>+	SR_TRAP(SYS_CNTVCTSS_EL0,	CGT_CNTHCTL_EL1TVCT),</div><div class='ctx'> 	SR_TRAP(SYS_FPMR,		CGT_HCRX_EnFPM),</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * IMPDEF choice:</div><div class='hunk'>@@ -1191,98 +1296,129 @@ enum fg_filter_id {</div><div class='ctx'> 	__NR_FG_FILTER_IDS__</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define SR_FGF(sr, g, b, p, f)					\</div><div class='del'>-	{							\</div><div class='del'>-		.encoding	= sr,				\</div><div class='del'>-		.end		= sr,				\</div><div class='del'>-		.tc		= {				\</div><div class='add'>+#define __FGT(g, b, p, f)					\</div><div class='add'>+		{						\</div><div class='ctx'> 			.fgt = g ## _GROUP,			\</div><div class='ctx'> 			.bit = g ## _EL2_ ## b ## _SHIFT,	\</div><div class='ctx'> 			.pol = p,				\</div><div class='ctx'> 			.fgf = f,				\</div><div class='del'>-		},						\</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+#define FGT(g, b, p)		__FGT(g, b, p, __NO_FGF__)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * See the warning next to SR_RANGE_TRAP(), and apply the same</div><div class='add'>+ * level of caution.</div><div class='add'>+ */</div><div class='add'>+#define SR_FGF_RANGE(sr, e, g, b, p, f)				\</div><div class='add'>+	{							\</div><div class='add'>+		.encoding	= sr,				\</div><div class='add'>+		.end		= e,				\</div><div class='add'>+		.tc		= __FGT(g, b, p, f),		\</div><div class='ctx'> 		.line = __LINE__,				\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define SR_FGT(sr, g, b, p)	SR_FGF(sr, g, b, p, __NO_FGF__)</div><div class='add'>+#define SR_FGF(sr, g, b, p, f) 	SR_FGF_RANGE(sr, sr, g, b, p, f)</div><div class='add'>+#define SR_FGT(sr, g, b, p)	SR_FGF_RANGE(sr, sr, g, b, p, __NO_FGF__)</div><div class='add'>+#define SR_FGT_RANGE(sr, end, g, b, p)	\</div><div class='add'>+				SR_FGF_RANGE(sr, end, g, b, p, __NO_FGF__)</div><div class='ctx'> </div><div class='ctx'> static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	/* HFGRTR_EL2, HFGWTR_EL2 */</div><div class='del'>-	SR_FGT(SYS_AMAIR2_EL1,		HFGxTR, nAMAIR2_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_MAIR2_EL1,		HFGxTR, nMAIR2_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_S2POR_EL1,		HFGxTR, nS2POR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_POR_EL1,		HFGxTR, nPOR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_POR_EL0,		HFGxTR, nPOR_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_PIR_EL1,		HFGxTR, nPIR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_PIRE0_EL1,		HFGxTR, nPIRE0_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_RCWMASK_EL1,		HFGxTR, nRCWMASK_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_TPIDR2_EL0,		HFGxTR, nTPIDR2_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_SMPRI_EL1,		HFGxTR, nSMPRI_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSCR_EL1,		HFGxTR, nGCS_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSPR_EL1,		HFGxTR, nGCS_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSCRE0_EL1,		HFGxTR, nGCS_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_GCSPR_EL0,		HFGxTR, nGCS_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_ACCDATA_EL1,		HFGxTR, nACCDATA_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_ERXADDR_EL1,		HFGxTR, ERXADDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGCDN_EL1,	HFGxTR, ERXPFGCDN_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGCTL_EL1,	HFGxTR, ERXPFGCTL_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGF_EL1,		HFGxTR, ERXPFGF_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC0_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC1_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC2_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC3_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXSTATUS_EL1,	HFGxTR, ERXSTATUS_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXCTLR_EL1,		HFGxTR, ERXCTLR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXFR_EL1,		HFGxTR, ERXFR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERRSELR_EL1,		HFGxTR, ERRSELR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERRIDR_EL1,		HFGxTR, ERRIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ICC_IGRPEN0_EL1,	HFGxTR, ICC_IGRPENn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ICC_IGRPEN1_EL1,	HFGxTR, ICC_IGRPENn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_VBAR_EL1,		HFGxTR, VBAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TTBR1_EL1,		HFGxTR, TTBR1_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TTBR0_EL1,		HFGxTR, TTBR0_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDR_EL0,		HFGxTR, TPIDR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDRRO_EL0,		HFGxTR, TPIDRRO_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDR_EL1,		HFGxTR, TPIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TCR_EL1,		HFGxTR, TCR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TCR2_EL1,		HFGxTR, TCR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_SCXTNUM_EL0,		HFGxTR, SCXTNUM_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_SCXTNUM_EL1, 	HFGxTR, SCXTNUM_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_SCTLR_EL1, 		HFGxTR, SCTLR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_REVIDR_EL1, 		HFGxTR, REVIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_PAR_EL1, 		HFGxTR, PAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MPIDR_EL1, 		HFGxTR, MPIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MIDR_EL1, 		HFGxTR, MIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MAIR_EL1, 		HFGxTR, MAIR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORSA_EL1, 		HFGxTR, LORSA_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORN_EL1, 		HFGxTR, LORN_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORID_EL1, 		HFGxTR, LORID_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LOREA_EL1, 		HFGxTR, LOREA_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORC_EL1, 		HFGxTR, LORC_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ISR_EL1, 		HFGxTR, ISR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_FAR_EL1, 		HFGxTR, FAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ESR_EL1, 		HFGxTR, ESR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_DCZID_EL0, 		HFGxTR, DCZID_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_CTR_EL0, 		HFGxTR, CTR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_CSSELR_EL1, 		HFGxTR, CSSELR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CPACR_EL1, 		HFGxTR, CPACR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CONTEXTIDR_EL1, 	HFGxTR, CONTEXTIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CLIDR_EL1, 		HFGxTR, CLIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CCSIDR_EL1, 		HFGxTR, CCSIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_APIBKEYLO_EL1, 	HFGxTR, APIBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIBKEYHI_EL1, 	HFGxTR, APIBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIAKEYLO_EL1, 	HFGxTR, APIAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIAKEYHI_EL1, 	HFGxTR, APIAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APGAKEYLO_EL1, 	HFGxTR, APGAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APGAKEYHI_EL1, 	HFGxTR, APGAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDBKEYLO_EL1, 	HFGxTR, APDBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDBKEYHI_EL1, 	HFGxTR, APDBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDAKEYLO_EL1, 	HFGxTR, APDAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDAKEYHI_EL1, 	HFGxTR, APDAKey, 1),</div><div class='del'>-	SR_FGT(SYS_AMAIR_EL1, 		HFGxTR, AMAIR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AIDR_EL1, 		HFGxTR, AIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AFSR1_EL1, 		HFGxTR, AFSR1_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AFSR0_EL1, 		HFGxTR, AFSR0_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AMAIR2_EL1,		HFGRTR, nAMAIR2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_MAIR2_EL1,		HFGRTR, nMAIR2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_S2POR_EL1,		HFGRTR, nS2POR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_POR_EL1,		HFGRTR, nPOR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_POR_EL0,		HFGRTR, nPOR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PIR_EL1,		HFGRTR, nPIR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PIRE0_EL1,		HFGRTR, nPIRE0_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_RCWMASK_EL1,		HFGRTR, nRCWMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TPIDR2_EL0,		HFGRTR, nTPIDR2_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SMPRI_EL1,		HFGRTR, nSMPRI_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSCR_EL1,		HFGRTR, nGCS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSPR_EL1,		HFGRTR, nGCS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSCRE0_EL1,		HFGRTR, nGCS_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_GCSPR_EL0,		HFGRTR, nGCS_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_ACCDATA_EL1,		HFGRTR, nACCDATA_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ERXADDR_EL1,		HFGRTR, ERXADDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGCDN_EL1,	HFGRTR, ERXPFGCDN_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGCTL_EL1,	HFGRTR, ERXPFGCTL_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGF_EL1,		HFGRTR, ERXPFGF_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC0_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC1_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC2_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC3_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXSTATUS_EL1,	HFGRTR, ERXSTATUS_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXCTLR_EL1,		HFGRTR, ERXCTLR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXFR_EL1,		HFGRTR, ERXFR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERRSELR_EL1,		HFGRTR, ERRSELR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERRIDR_EL1,		HFGRTR, ERRIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ICC_IGRPEN0_EL1,	HFGRTR, ICC_IGRPENn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ICC_IGRPEN1_EL1,	HFGRTR, ICC_IGRPENn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_VBAR_EL1,		HFGRTR, VBAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TTBR1_EL1,		HFGRTR, TTBR1_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TTBR0_EL1,		HFGRTR, TTBR0_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDR_EL0,		HFGRTR, TPIDR_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDRRO_EL0,		HFGRTR, TPIDRRO_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDR_EL1,		HFGRTR, TPIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TCR_EL1,		HFGRTR, TCR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TCR2_EL1,		HFGRTR, TCR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_SCXTNUM_EL0,		HFGRTR, SCXTNUM_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_SCXTNUM_EL1, 	HFGRTR, SCXTNUM_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_SCTLR_EL1, 		HFGRTR, SCTLR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_SCTLR2_EL1,		HFGRTR, SCTLR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_REVIDR_EL1, 		HFGRTR, REVIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_PAR_EL1, 		HFGRTR, PAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MPIDR_EL1, 		HFGRTR, MPIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MIDR_EL1, 		HFGRTR, MIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MAIR_EL1, 		HFGRTR, MAIR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORSA_EL1, 		HFGRTR, LORSA_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORN_EL1, 		HFGRTR, LORN_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORID_EL1, 		HFGRTR, LORID_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LOREA_EL1, 		HFGRTR, LOREA_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORC_EL1, 		HFGRTR, LORC_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ISR_EL1, 		HFGRTR, ISR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_FAR_EL1, 		HFGRTR, FAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ESR_EL1, 		HFGRTR, ESR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_DCZID_EL0, 		HFGRTR, DCZID_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_CTR_EL0, 		HFGRTR, CTR_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_CSSELR_EL1, 		HFGRTR, CSSELR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CPACR_EL1, 		HFGRTR, CPACR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CONTEXTIDR_EL1, 	HFGRTR, CONTEXTIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CLIDR_EL1, 		HFGRTR, CLIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CCSIDR_EL1, 		HFGRTR, CCSIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_APIBKEYLO_EL1, 	HFGRTR, APIBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIBKEYHI_EL1, 	HFGRTR, APIBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIAKEYLO_EL1, 	HFGRTR, APIAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIAKEYHI_EL1, 	HFGRTR, APIAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APGAKEYLO_EL1, 	HFGRTR, APGAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APGAKEYHI_EL1, 	HFGRTR, APGAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDBKEYLO_EL1, 	HFGRTR, APDBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDBKEYHI_EL1, 	HFGRTR, APDBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDAKEYLO_EL1, 	HFGRTR, APDAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDAKEYHI_EL1, 	HFGRTR, APDAKey, 1),</div><div class='add'>+	SR_FGT(SYS_AMAIR_EL1, 		HFGRTR, AMAIR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AIDR_EL1, 		HFGRTR, AIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AFSR1_EL1, 		HFGRTR, AFSR1_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AFSR0_EL1, 		HFGRTR, AFSR0_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HFGRTR2_EL2, HFGWTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_ACTLRALIAS_EL1,	HFGRTR2, nACTLRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ACTLRMASK_EL1,	HFGRTR2, nACTLRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_CPACRALIAS_EL1,	HFGRTR2, nCPACRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_CPACRMASK_EL1,	HFGRTR2, nCPACRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PFAR_EL1,		HFGRTR2, nPFAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_RCWSMASK_EL1,	HFGRTR2, nRCWSMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLR2ALIAS_EL1,	HFGRTR2, nSCTLRALIAS2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLR2MASK_EL1,	HFGRTR2, nSCTLR2MASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLRALIAS_EL1,	HFGRTR2, nSCTLRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLRMASK_EL1,	HFGRTR2, nSCTLRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCR2ALIAS_EL1,	HFGRTR2, nTCR2ALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCR2MASK_EL1,	HFGRTR2, nTCR2MASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCRALIAS_EL1,	HFGRTR2, nTCRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCRMASK_EL1,		HFGRTR2, nTCRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ERXGSR_EL1,		HFGRTR2, nERXGSR_EL1, 0),</div><div class='add'>+</div><div class='ctx'> 	/* HFGITR_EL2 */</div><div class='ctx'> 	SR_FGT(OP_AT_S1E1A, 		HFGITR, ATS1E1A, 1),</div><div class='ctx'> 	SR_FGT(OP_COSP_RCTX, 		HFGITR, COSPRCTX, 1),</div><div class='hunk'>@@ -1392,6 +1528,11 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_IC_IVAU, 		HFGITR, ICIVAU, 1),</div><div class='ctx'> 	SR_FGT(SYS_IC_IALLU, 		HFGITR, ICIALLU, 1),</div><div class='ctx'> 	SR_FGT(SYS_IC_IALLUIS, 		HFGITR, ICIALLUIS, 1),</div><div class='add'>+</div><div class='add'>+	/* HFGITR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_DC_CIGDVAPS,		HFGITR2, nDCCIVAPS, 0),</div><div class='add'>+	SR_FGT(SYS_DC_CIVAPS,		HFGITR2, nDCCIVAPS, 0),</div><div class='add'>+</div><div class='ctx'> 	/* HDFGRTR_EL2 */</div><div class='ctx'> 	SR_FGT(SYS_PMBIDR_EL1, 		HDFGRTR, PMBIDR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMSNEVFR_EL1, 	HDFGRTR, nPMSNEVFR_EL1, 0),</div><div class='hunk'>@@ -1701,68 +1842,12 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_PMCNTENSET_EL0, 	HDFGRTR, PMCNTEN, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCCNTR_EL0, 	HDFGRTR, PMCCNTR_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCCFILTR_EL0, 	HDFGRTR, PMCCFILTR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(0), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(1), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(2), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(3), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(4), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(5), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(6), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(7), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(8), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(9), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(10), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(11), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(12), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(13), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(14), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(15), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(16), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(17), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(18), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(19), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(20), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(21), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(22), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(23), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(24), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(25), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(26), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(27), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(28), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(29), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(30), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(0), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(1), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(2), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(3), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(4), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(5), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(6), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(7), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(8), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(9), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(10), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(11), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(12), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(13), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(14), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(15), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(16), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(17), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(18), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(19), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(20), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(21), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(22), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(23), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(24), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(25), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(26), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(27), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(28), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(29), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(30), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVTYPERn_EL0(0),</div><div class='add'>+		     SYS_PMEVTYPERn_EL0(30),</div><div class='add'>+		     HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVCNTRn_EL0(0),</div><div class='add'>+		     SYS_PMEVCNTRn_EL0(30),</div><div class='add'>+		     HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSDLR_EL1, 		HDFGRTR, OSDLR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSECCR_EL1, 		HDFGRTR, OSECCR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSLSR_EL1, 		HDFGRTR, OSLSR_EL1, 1),</div><div class='hunk'>@@ -1840,6 +1925,59 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(13), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(14), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(15), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HDFGRTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_MDSELR_EL1,		HDFGRTR2, nMDSELR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_MDSTEPOP_EL1,	HDFGRTR2, nMDSTEPOP_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMCCNTSVR_EL1,	HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVCNTSVRn_EL1(0),</div><div class='add'>+		     SYS_PMEVCNTSVRn_EL1(30),</div><div class='add'>+		     HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT(SYS_PMICNTSVR_EL1,	HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT(SYS_PMECR_EL1,		HDFGRTR2, nPMECR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMIAR_EL1,		HDFGRTR2, nPMIAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMICFILTR_EL0,	HDFGRTR2, nPMICFILTR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PMICNTR_EL0,		HDFGRTR2, nPMICNTR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PMSSCR_EL1,		HDFGRTR2, nPMSSCR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMUACR_EL1,		HDFGRTR2, nPMUACR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMACCESSR_EL1,	HDFGRTR2, nSPMACCESSR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCFGR_EL1,		HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMDEVARCH_EL1,	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCGCRn_EL1(0),	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCGCRn_EL1(1),	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMIIDR_EL1,		HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCNTENCLR_EL0,	HDFGRTR2, nSPMCNTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCNTENSET_EL0,	HDFGRTR2, nSPMCNTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCR_EL0,		HDFGRTR2, nSPMCR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMDEVAFF_EL1,	HDFGRTR2, nSPMDEVAFF_EL1, 0),</div><div class='add'>+	/*</div><div class='add'>+	 * We have up to 64 of these registers in ranges of 16, banked via</div><div class='add'>+	 * SPMSELR_EL0.BANK. We're only concerned with the accessors here,</div><div class='add'>+	 * not the architectural registers.</div><div class='add'>+	 */</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVCNTRn_EL0(0),</div><div class='add'>+		     SYS_SPMEVCNTRn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVCNTRn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVFILT2Rn_EL0(0),</div><div class='add'>+		     SYS_SPMEVFILT2Rn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVFILTRn_EL0(0),</div><div class='add'>+		     SYS_SPMEVFILTRn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVTYPERn_EL0(0),</div><div class='add'>+		     SYS_SPMEVTYPERn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMINTENCLR_EL1,	HDFGRTR2, nSPMINTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMINTENSET_EL1,	HDFGRTR2, nSPMINTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMOVSCLR_EL0,	HDFGRTR2, nSPMOVS, 0),</div><div class='add'>+	SR_FGT(SYS_SPMOVSSET_EL0,	HDFGRTR2, nSPMOVS, 0),</div><div class='add'>+	SR_FGT(SYS_SPMSCR_EL1,		HDFGRTR2, nSPMSCR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMSELR_EL0,		HDFGRTR2, nSPMSELR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_TRCITECR_EL1,	HDFGRTR2, nTRCITECR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMBMAR_EL1,		HDFGRTR2, nPMBMAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMSDSFR_EL1,		HDFGRTR2, nPMSDSFR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TRBMPAM_EL1,		HDFGRTR2, nTRBMPAM_EL1, 0),</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * HDFGWTR_EL2</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1850,12 +1988,19 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	 * read-side mappings, and only the write-side mappings that</div><div class='ctx'> 	 * differ from the read side, and the trap handler will pick</div><div class='ctx'> 	 * the correct shadow register based on the access type.</div><div class='add'>+	 *</div><div class='add'>+	 * Same model applies to the FEAT_FGT2 registers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	SR_FGT(SYS_TRFCR_EL1,		HDFGWTR, TRFCR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_TRCOSLAR,		HDFGWTR, TRCOSLAR, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCR_EL0,		HDFGWTR, PMCR_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMSWINC_EL0,		HDFGWTR, PMSWINC_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSLAR_EL1,		HDFGWTR, OSLAR_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HDFGWTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_PMZR_EL0,		HDFGWTR2, nPMZR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMZR_EL0,		HDFGWTR2, nSPMEVCNTRn_EL0, 0),</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * HAFGRTR_EL2</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1901,6 +2046,20 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_AMEVCNTR0_EL0(0),	HAFGRTR, AMEVCNTR00_EL0, 1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Additional FGTs that do not fire with ESR_EL2.EC==0x18. This table</div><div class='add'>+ * isn't used for exception routing, but only as a promise that the</div><div class='add'>+ * trap is handled somewhere else.</div><div class='add'>+ */</div><div class='add'>+static const union trap_config non_0x18_fgt[] __initconst = {</div><div class='add'>+	FGT(HFGITR, PSBCSYNC, 1),</div><div class='add'>+	FGT(HFGITR, nGCSSTR_EL1, 0),</div><div class='add'>+	FGT(HFGITR, SVC_EL1, 1),</div><div class='add'>+	FGT(HFGITR, SVC_EL0, 1),</div><div class='add'>+	FGT(HFGITR, ERET, 1),</div><div class='add'>+	FGT(HFGITR2, TSBCSYNC, 1),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static union trap_config get_trap_config(u32 sysreg)</div><div class='ctx'> {</div><div class='ctx'> 	return (union trap_config) {</div><div class='hunk'>@@ -1945,6 +2104,130 @@ static u32 encoding_next(u32 encoding)</div><div class='ctx'> 	return sys_reg(op0 + 1, 0, 0, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define FGT_MASKS(__n, __m)						\</div><div class='add'>+	struct fgt_masks __n = { .str = #__m, .res0 = __m, }</div><div class='add'>+</div><div class='add'>+FGT_MASKS(hfgrtr_masks, HFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgwtr_masks, HFGWTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgitr_masks, HFGITR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgrtr_masks, HDFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgwtr_masks, HDFGWTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hafgrtr_masks, HAFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgrtr2_masks, HFGRTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgwtr2_masks, HFGWTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgitr2_masks, HFGITR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgrtr2_masks, HDFGRTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgwtr2_masks, HDFGWTR2_EL2_RES0);</div><div class='add'>+</div><div class='add'>+static __init bool aggregate_fgt(union trap_config tc)</div><div class='add'>+{</div><div class='add'>+	struct fgt_masks *rmasks, *wmasks;</div><div class='add'>+</div><div class='add'>+	switch (tc.fgt) {</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hfgrtr_masks;</div><div class='add'>+		wmasks = &amp;hfgwtr_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hdfgrtr_masks;</div><div class='add'>+		wmasks = &amp;hdfgwtr_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hafgrtr_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_GROUP:</div><div class='add'>+		rmasks = &amp;hfgitr_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		rmasks = &amp;hfgrtr2_masks;</div><div class='add'>+		wmasks = &amp;hfgwtr2_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		rmasks = &amp;hdfgrtr2_masks;</div><div class='add'>+		wmasks = &amp;hdfgwtr2_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		rmasks = &amp;hfgitr2_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A bit can be reserved in either the R or W register, but</div><div class='add'>+	 * not both.</div><div class='add'>+	 */</div><div class='add'>+	if ((BIT(tc.bit) &amp; rmasks-&gt;res0) &amp;&amp;</div><div class='add'>+	    (!wmasks || (BIT(tc.bit) &amp; wmasks-&gt;res0)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (tc.pol)</div><div class='add'>+		rmasks-&gt;mask |= BIT(tc.bit) &amp; ~rmasks-&gt;res0;</div><div class='add'>+	else</div><div class='add'>+		rmasks-&gt;nmask |= BIT(tc.bit) &amp; ~rmasks-&gt;res0;</div><div class='add'>+</div><div class='add'>+	if (wmasks) {</div><div class='add'>+		if (tc.pol)</div><div class='add'>+			wmasks-&gt;mask |= BIT(tc.bit) &amp; ~wmasks-&gt;res0;</div><div class='add'>+		else</div><div class='add'>+			wmasks-&gt;nmask |= BIT(tc.bit) &amp; ~wmasks-&gt;res0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int check_fgt_masks(struct fgt_masks *masks)</div><div class='add'>+{</div><div class='add'>+	unsigned long duplicate = masks-&gt;mask &amp; masks-&gt;nmask;</div><div class='add'>+	u64 res0 = masks-&gt;res0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (duplicate) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(i, &amp;duplicate, 64) {</div><div class='add'>+			kvm_err("%s[%d] bit has both polarities\n",</div><div class='add'>+				masks-&gt;str, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	masks-&gt;res0 = ~(masks-&gt;mask | masks-&gt;nmask);</div><div class='add'>+	if (masks-&gt;res0 != res0)</div><div class='add'>+		kvm_info("Implicit %s = %016llx, expecting %016llx\n",</div><div class='add'>+			 masks-&gt;str, masks-&gt;res0, res0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int check_all_fgt_masks(int ret)</div><div class='add'>+{</div><div class='add'>+	static struct fgt_masks * const masks[] __initconst = {</div><div class='add'>+		&amp;hfgrtr_masks,</div><div class='add'>+		&amp;hfgwtr_masks,</div><div class='add'>+		&amp;hfgitr_masks,</div><div class='add'>+		&amp;hdfgrtr_masks,</div><div class='add'>+		&amp;hdfgwtr_masks,</div><div class='add'>+		&amp;hafgrtr_masks,</div><div class='add'>+		&amp;hfgrtr2_masks,</div><div class='add'>+		&amp;hfgwtr2_masks,</div><div class='add'>+		&amp;hfgitr2_masks,</div><div class='add'>+		&amp;hdfgrtr2_masks,</div><div class='add'>+		&amp;hdfgwtr2_masks,</div><div class='add'>+	};</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(masks); i++)</div><div class='add'>+		err |= check_fgt_masks(masks[i]);</div><div class='add'>+</div><div class='add'>+	return ret ?: err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define for_each_encoding_in(__x, __s, __e)	\</div><div class='add'>+	for (u32 __x = __s; __x &lt;= __e; __x = encoding_next(__x))</div><div class='add'>+</div><div class='ctx'> int __init populate_nv_trap_config(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -1953,6 +2236,7 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 	BUILD_BUG_ON(__NR_CGT_GROUP_IDS__ &gt; BIT(TC_CGT_BITS));</div><div class='ctx'> 	BUILD_BUG_ON(__NR_FGT_GROUP_IDS__ &gt; BIT(TC_FGT_BITS));</div><div class='ctx'> 	BUILD_BUG_ON(__NR_FG_FILTER_IDS__ &gt; BIT(TC_FGF_BITS));</div><div class='add'>+	BUILD_BUG_ON(__HCRX_EL2_MASK &amp; __HCRX_EL2_nMASK);</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 0; i &lt; ARRAY_SIZE(encoding_to_cgt); i++) {</div><div class='ctx'> 		const struct encoding_to_trap_config *cgt = &amp;encoding_to_cgt[i];</div><div class='hunk'>@@ -1963,7 +2247,7 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		for (u32 enc = cgt-&gt;encoding; enc &lt;= cgt-&gt;end; enc = encoding_next(enc)) {</div><div class='add'>+		for_each_encoding_in(enc, cgt-&gt;encoding, cgt-&gt;end) {</div><div class='ctx'> 			prev = xa_store(&amp;sr_forward_xa, enc,</div><div class='ctx'> 					xa_mk_value(cgt-&gt;tc.val), GFP_KERNEL);</div><div class='ctx'> 			if (prev &amp;&amp; !xa_is_err(prev)) {</div><div class='hunk'>@@ -1978,6 +2262,10 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (__HCRX_EL2_RES0 != HCRX_EL2_RES0)</div><div class='add'>+		kvm_info("Sanitised HCR_EL2_RES0 = %016llx, expecting %016llx\n",</div><div class='add'>+			 __HCRX_EL2_RES0, HCRX_EL2_RES0);</div><div class='add'>+</div><div class='ctx'> 	kvm_info("nv: %ld coarse grained trap handlers\n",</div><div class='ctx'> 		 ARRAY_SIZE(encoding_to_cgt));</div><div class='ctx'> </div><div class='hunk'>@@ -1994,23 +2282,39 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 			print_nv_trap_error(fgt, "Invalid FGT", ret);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		tc = get_trap_config(fgt-&gt;encoding);</div><div class='add'>+		for_each_encoding_in(enc, fgt-&gt;encoding, fgt-&gt;end) {</div><div class='add'>+			tc = get_trap_config(enc);</div><div class='ctx'> </div><div class='del'>-		if (tc.fgt) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			print_nv_trap_error(fgt, "Duplicate FGT", ret);</div><div class='del'>-		}</div><div class='add'>+			if (tc.fgt) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				print_nv_trap_error(fgt, "Duplicate FGT", ret);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tc.val |= fgt-&gt;tc.val;</div><div class='add'>+			prev = xa_store(&amp;sr_forward_xa, enc,</div><div class='add'>+					xa_mk_value(tc.val), GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-		tc.val |= fgt-&gt;tc.val;</div><div class='del'>-		prev = xa_store(&amp;sr_forward_xa, fgt-&gt;encoding,</div><div class='del'>-				xa_mk_value(tc.val), GFP_KERNEL);</div><div class='add'>+			if (xa_is_err(prev)) {</div><div class='add'>+				ret = xa_err(prev);</div><div class='add'>+				print_nv_trap_error(fgt, "Failed FGT insertion", ret);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		if (xa_is_err(prev)) {</div><div class='del'>-			ret = xa_err(prev);</div><div class='del'>-			print_nv_trap_error(fgt, "Failed FGT insertion", ret);</div><div class='add'>+			if (!aggregate_fgt(tc)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				print_nv_trap_error(fgt, "FGT bit is reserved", ret);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(non_0x18_fgt); i++) {</div><div class='add'>+		if (!aggregate_fgt(non_0x18_fgt[i])) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			kvm_err("non_0x18_fgt[%d] is reserved\n", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = check_all_fgt_masks(ret);</div><div class='add'>+</div><div class='ctx'> 	kvm_info("nv: %ld fine grained trap handlers\n",</div><div class='ctx'> 		 ARRAY_SIZE(encoding_to_fgt));</div><div class='ctx'> </div><div class='hunk'>@@ -2021,7 +2325,8 @@ check_mcb:</div><div class='ctx'> 		cgids = coarse_control_combo[id - __MULTIPLE_CONTROL_BITS__];</div><div class='ctx'> </div><div class='ctx'> 		for (int i = 0; cgids[i] != __RESERVED__; i++) {</div><div class='del'>-			if (cgids[i] &gt;= __MULTIPLE_CONTROL_BITS__) {</div><div class='add'>+			if (cgids[i] &gt;= __MULTIPLE_CONTROL_BITS__ &amp;&amp;</div><div class='add'>+			    cgids[i] &lt; __COMPLEX_CONDITIONS__) {</div><div class='ctx'> 				kvm_err("Recursive MCB %d/%d\n", id, cgids[i]);</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2126,10 +2431,20 @@ static u64 kvm_get_sysreg_res0(struct kvm *kvm, enum vcpu_sysreg sr)</div><div class='ctx'> 	return masks-&gt;mask[sr - __VNCR_START__].res0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool check_fgt_bit(struct kvm *kvm, bool is_read,</div><div class='del'>-			  u64 val, const union trap_config tc)</div><div class='add'>+static bool check_fgt_bit(struct kvm_vcpu *vcpu, enum vcpu_sysreg sr,</div><div class='add'>+			  const union trap_config tc)</div><div class='ctx'> {</div><div class='del'>-	enum vcpu_sysreg sr;</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * KVM doesn't know about any FGTs that apply to the host, and hopefully</div><div class='add'>+	 * that'll remain the case.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	val = __vcpu_sys_reg(vcpu, sr);</div><div class='ctx'> </div><div class='ctx'> 	if (tc.pol)</div><div class='ctx'> 		return (val &amp; BIT(tc.bit));</div><div class='hunk'>@@ -2145,38 +2460,17 @@ static bool check_fgt_bit(struct kvm *kvm, bool is_read,</div><div class='ctx'> 	if (val &amp; BIT(tc.bit))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	switch ((enum fgt_group_id)tc.fgt) {</div><div class='del'>-	case HFGxTR_GROUP:</div><div class='del'>-		sr = is_read ? HFGRTR_EL2 : HFGWTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HDFGRTR_GROUP:</div><div class='del'>-		sr = is_read ? HDFGRTR_EL2 : HDFGWTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HAFGRTR_GROUP:</div><div class='del'>-		sr = HAFGRTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HFGITR_GROUP:</div><div class='del'>-		sr = HFGITR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		WARN_ONCE(1, "Unhandled FGT group");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return !(kvm_get_sysreg_res0(kvm, sr) &amp; BIT(tc.bit));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> {</div><div class='add'>+	enum vcpu_sysreg fgtreg;</div><div class='ctx'> 	union trap_config tc;</div><div class='ctx'> 	enum trap_behaviour b;</div><div class='ctx'> 	bool is_read;</div><div class='ctx'> 	u32 sysreg;</div><div class='del'>-	u64 esr, val;</div><div class='add'>+	u64 esr;</div><div class='ctx'> </div><div class='ctx'> 	esr = kvm_vcpu_get_esr(vcpu);</div><div class='ctx'> 	sysreg = esr_sys64_to_sysreg(esr);</div><div class='hunk'>@@ -2207,33 +2501,35 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> 	 * If we're not nesting, immediately return to the caller, with the</div><div class='ctx'> 	 * sysreg index, should we have it.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		goto local;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There are a few traps that take effect InHost, but are constrained</div><div class='add'>+	 * to EL0. Don't bother with computing the trap behaviour if the vCPU</div><div class='add'>+	 * isn't in EL0.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu) &amp;&amp; !vcpu_is_host_el0(vcpu))</div><div class='ctx'> 		goto local;</div><div class='ctx'> </div><div class='ctx'> 	switch ((enum fgt_group_id)tc.fgt) {</div><div class='ctx'> 	case __NO_FGT_GROUP__:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case HFGxTR_GROUP:</div><div class='del'>-		if (is_read)</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HFGRTR_EL2);</div><div class='del'>-		else</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HFGWTR_EL2);</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		fgtreg = is_read ? HFGRTR_EL2 : HFGWTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HDFGRTR_GROUP:</div><div class='del'>-		if (is_read)</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HDFGRTR_EL2);</div><div class='del'>-		else</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HDFGWTR_EL2);</div><div class='add'>+		fgtreg = is_read ? HDFGRTR_EL2 : HDFGWTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HAFGRTR_GROUP:</div><div class='del'>-		val = __vcpu_sys_reg(vcpu, HAFGRTR_EL2);</div><div class='add'>+		fgtreg = HAFGRTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HFGITR_GROUP:</div><div class='del'>-		val = __vcpu_sys_reg(vcpu, HFGITR_EL2);</div><div class='add'>+		fgtreg = HFGITR_EL2;</div><div class='ctx'> 		switch (tc.fgf) {</div><div class='ctx'> 			u64 tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -2247,18 +2543,33 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case __NR_FGT_GROUP_IDS__:</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		fgtreg = is_read ? HFGRTR2_EL2 : HFGWTR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		fgtreg = is_read ? HDFGRTR2_EL2 : HDFGWTR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		fgtreg = HFGITR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='ctx'> 		/* Something is really wrong, bail out */</div><div class='del'>-		WARN_ONCE(1, "__NR_FGT_GROUP_IDS__");</div><div class='add'>+		WARN_ONCE(1, "Bad FGT group (encoding %08x, config %016llx)\n",</div><div class='add'>+			  sysreg, tc.val);</div><div class='ctx'> 		goto local;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (tc.fgt != __NO_FGT_GROUP__ &amp;&amp; check_fgt_bit(vcpu-&gt;kvm, is_read,</div><div class='del'>-							val, tc))</div><div class='add'>+	if (tc.fgt != __NO_FGT_GROUP__ &amp;&amp; check_fgt_bit(vcpu, fgtreg, tc))</div><div class='ctx'> 		goto inject;</div><div class='ctx'> </div><div class='ctx'> 	b = compute_trap_behaviour(vcpu, tc);</div><div class='ctx'> </div><div class='add'>+	if (!(b &amp; BEHAVE_FORWARD_IN_HOST_EL0) &amp;&amp; vcpu_is_host_el0(vcpu))</div><div class='add'>+		goto local;</div><div class='add'>+</div><div class='ctx'> 	if (((b &amp; BEHAVE_FORWARD_READ) &amp;&amp; is_read) ||</div><div class='ctx'> 	    ((b &amp; BEHAVE_FORWARD_WRITE) &amp;&amp; !is_read))</div><div class='ctx'> 		goto inject;</div><div class='hunk'>@@ -2292,24 +2603,34 @@ inject:</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool forward_traps(struct kvm_vcpu *vcpu, u64 control_bit)</div><div class='add'>+static bool __forward_traps(struct kvm_vcpu *vcpu, unsigned int reg, u64 control_bit)</div><div class='ctx'> {</div><div class='del'>-	bool control_bit_set;</div><div class='del'>-</div><div class='del'>-	if (!vcpu_has_nv(vcpu))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	control_bit_set = __vcpu_sys_reg(vcpu, HCR_EL2) &amp; control_bit;</div><div class='del'>-	if (!is_hyp_ctxt(vcpu) &amp;&amp; control_bit_set) {</div><div class='add'>+	if (is_nested_ctxt(vcpu) &amp;&amp;</div><div class='add'>+	    (__vcpu_sys_reg(vcpu, reg) &amp; control_bit)) {</div><div class='ctx'> 		kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool forward_hcr_traps(struct kvm_vcpu *vcpu, u64 control_bit)</div><div class='add'>+{</div><div class='add'>+	return __forward_traps(vcpu, HCR_EL2, control_bit);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool forward_smc_trap(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return forward_traps(vcpu, HCR_TSC);</div><div class='add'>+	return forward_hcr_traps(vcpu, HCR_TSC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool forward_mdcr_traps(struct kvm_vcpu *vcpu, u64 control_bit)</div><div class='add'>+{</div><div class='add'>+	return __forward_traps(vcpu, MDCR_EL2, control_bit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool forward_debug_exception(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return forward_mdcr_traps(vcpu, MDCR_EL2_TDE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 kvm_check_illegal_exception_return(struct kvm_vcpu *vcpu, u64 spsr)</div><div class='hunk'>@@ -2349,13 +2670,6 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 spsr, elr, esr;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Forward this trap to the virtual EL2 if the virtual</div><div class='del'>-	 * HCR_EL2.NV bit is set and this is coming from !EL2.</div><div class='del'>-	 */</div><div class='del'>-	if (forward_traps(vcpu, HCR_NV))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	spsr = vcpu_read_sys_reg(vcpu, SPSR_EL2);</div><div class='ctx'> 	spsr = kvm_check_illegal_exception_return(vcpu, spsr);</div><div class='ctx'> </div><div class='hunk'>@@ -2381,6 +2695,7 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='add'>+	vcpu_set_flag(vcpu, IN_NESTED_ERET);</div><div class='ctx'> 	kvm_arch_vcpu_put(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (!esr_iss_is_eretax(esr))</div><div class='hunk'>@@ -2392,7 +2707,11 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	*vcpu_cpsr(vcpu) = spsr;</div><div class='ctx'> </div><div class='ctx'> 	kvm_arch_vcpu_load(vcpu, smp_processor_id());</div><div class='add'>+	vcpu_clear_flag(vcpu, IN_NESTED_ERET);</div><div class='ctx'> 	preempt_enable();</div><div class='add'>+</div><div class='add'>+	if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+		kvm_pmu_nested_transition(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_inject_el2_exception(struct kvm_vcpu *vcpu, u64 esr_el2,</div><div class='hunk'>@@ -2408,6 +2727,9 @@ static void kvm_inject_el2_exception(struct kvm_vcpu *vcpu, u64 esr_el2,</div><div class='ctx'> 	case except_type_irq:</div><div class='ctx'> 		kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_IRQ);</div><div class='ctx'> 		break;</div><div class='add'>+	case except_type_serror:</div><div class='add'>+		kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_SERR);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ONCE(1, "Unsupported EL2 exception injection %d\n", type);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2475,6 +2797,9 @@ static int kvm_inject_nested(struct kvm_vcpu *vcpu, u64 esr_el2,</div><div class='ctx'> 	kvm_arch_vcpu_load(vcpu, smp_processor_id());</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> </div><div class='add'>+	if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+		kvm_pmu_nested_transition(vcpu);</div><div class='add'>+</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2502,3 +2827,28 @@ int kvm_inject_nested_irq(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* esr_el2 value doesn't matter for exits due to irqs. */</div><div class='ctx'> 	return kvm_inject_nested(vcpu, 0, except_type_irq);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int kvm_inject_nested_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr)</div><div class='add'>+{</div><div class='add'>+	u64 esr = FIELD_PREP(ESR_ELx_EC_MASK,</div><div class='add'>+			     iabt ? ESR_ELx_EC_IABT_LOW : ESR_ELx_EC_DABT_LOW);</div><div class='add'>+	esr |= ESR_ELx_FSC_EXTABT | ESR_ELx_IL;</div><div class='add'>+</div><div class='add'>+	vcpu_write_sys_reg(vcpu, addr, FAR_EL2);</div><div class='add'>+</div><div class='add'>+	if (__vcpu_sys_reg(vcpu, SCTLR2_EL2) &amp; SCTLR2_EL1_EASE)</div><div class='add'>+		return kvm_inject_nested(vcpu, esr, except_type_serror);</div><div class='add'>+</div><div class='add'>+	return kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_inject_nested_serror(struct kvm_vcpu *vcpu, u64 esr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware sets up the EC field when propagating ESR as a result of</div><div class='add'>+	 * vSError injection. Manually populate EC for an emulated SError</div><div class='add'>+	 * exception.</div><div class='add'>+	 */</div><div class='add'>+	esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);</div><div class='add'>+	return kvm_inject_nested(vcpu, esr, except_type_serror);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c<br/>index ea5484ce1f3b..15e17aca1dec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/fpsimd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/fpsimd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/fpsimd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/fpsimd.c</a></div><div class='hunk'>@@ -15,32 +15,6 @@</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Called on entry to KVM_RUN unless this vcpu previously ran at least</div><div class='del'>- * once and the most recent prior KVM_RUN for this vcpu was called from</div><div class='del'>- * the same task as current (highly likely).</div><div class='del'>- *</div><div class='del'>- * This is guaranteed to execute before kvm_arch_vcpu_load_fp(vcpu),</div><div class='del'>- * such that on entering hyp the relevant parts of current are already</div><div class='del'>- * mapped.</div><div class='del'>- */</div><div class='del'>-int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	struct user_fpsimd_state *fpsimd = &amp;current-&gt;thread.uw.fpsimd_state;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* pKVM has its own tracking of the host fpsimd state. */</div><div class='del'>-	if (is_protected_kvm_enabled())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Make sure the host task fpsimd state is visible to hyp: */</div><div class='del'>-	ret = kvm_share_hyp(fpsimd, fpsimd + 1);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Prepare vcpu for saving the host's FPSIMD state and loading the guest's.</div><div class='ctx'>  * The actual loading is done by the FPSIMD access trap taken to hyp.</div><div class='ctx'>  *</div><div class='hunk'>@@ -54,50 +28,18 @@ void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!system_supports_fpsimd())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	fpsimd_kvm_prepare();</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * We will check TIF_FOREIGN_FPSTATE just before entering the</div><div class='del'>-	 * guest in kvm_arch_vcpu_ctxflush_fp() and override this to</div><div class='del'>-	 * FP_STATE_FREE if the flag set.</div><div class='add'>+	 * Ensure that any host FPSIMD/SVE/SME state is saved and unbound such</div><div class='add'>+	 * that the host kernel is responsible for restoring this state upon</div><div class='add'>+	 * return to userspace, and the hyp code doesn't need to save anything.</div><div class='add'>+	 *</div><div class='add'>+	 * When the host may use SME, fpsimd_save_and_flush_cpu_state() ensures</div><div class='add'>+	 * that PSTATE.{SM,ZA} == {0,0}.</div><div class='ctx'> 	 */</div><div class='del'>-	*host_data_ptr(fp_owner) = FP_STATE_HOST_OWNED;</div><div class='del'>-	*host_data_ptr(fpsimd_state) = kern_hyp_va(&amp;current-&gt;thread.uw.fpsimd_state);</div><div class='del'>-	*host_data_ptr(fpmr_ptr) = kern_hyp_va(&amp;current-&gt;thread.uw.fpmr);</div><div class='del'>-</div><div class='del'>-	vcpu_clear_flag(vcpu, HOST_SVE_ENABLED);</div><div class='del'>-	if (read_sysreg(cpacr_el1) &amp; CPACR_EL1_ZEN_EL0EN)</div><div class='del'>-		vcpu_set_flag(vcpu, HOST_SVE_ENABLED);</div><div class='del'>-</div><div class='del'>-	if (system_supports_sme()) {</div><div class='del'>-		vcpu_clear_flag(vcpu, HOST_SME_ENABLED);</div><div class='del'>-		if (read_sysreg(cpacr_el1) &amp; CPACR_EL1_SMEN_EL0EN)</div><div class='del'>-			vcpu_set_flag(vcpu, HOST_SME_ENABLED);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If PSTATE.SM is enabled then save any pending FP</div><div class='del'>-		 * state and disable PSTATE.SM. If we leave PSTATE.SM</div><div class='del'>-		 * enabled and the guest does not enable SME via</div><div class='del'>-		 * CPACR_EL1.SMEN then operations that should be valid</div><div class='del'>-		 * may generate SME traps from EL1 to EL1 which we</div><div class='del'>-		 * can't intercept and which would confuse the guest.</div><div class='del'>-		 *</div><div class='del'>-		 * Do the same for PSTATE.ZA in the case where there</div><div class='del'>-		 * is state in the registers which has not already</div><div class='del'>-		 * been saved, this is very unlikely to happen.</div><div class='del'>-		 */</div><div class='del'>-		if (read_sysreg_s(SYS_SVCR) &amp; (SVCR_SM_MASK | SVCR_ZA_MASK)) {</div><div class='del'>-			*host_data_ptr(fp_owner) = FP_STATE_FREE;</div><div class='del'>-			fpsimd_save_and_flush_cpu_state();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	fpsimd_save_and_flush_cpu_state();</div><div class='add'>+	*host_data_ptr(fp_owner) = FP_STATE_FREE;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If normal guests gain SME support, maintain this behavior for pKVM</div><div class='del'>-	 * guests, which don't support SME.</div><div class='del'>-	 */</div><div class='del'>-	WARN_ON(is_protected_kvm_enabled() &amp;&amp; system_supports_sme() &amp;&amp;</div><div class='del'>-		read_sysreg_s(SYS_SVCR));</div><div class='add'>+	WARN_ON_ONCE(system_supports_sme() &amp;&amp; read_sysreg_s(SYS_SVCR));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -135,8 +77,8 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		fp_state.sve_state = vcpu-&gt;arch.sve_state;</div><div class='ctx'> 		fp_state.sve_vl = vcpu-&gt;arch.sve_max_vl;</div><div class='ctx'> 		fp_state.sme_state = NULL;</div><div class='del'>-		fp_state.svcr = &amp;__vcpu_sys_reg(vcpu, SVCR);</div><div class='del'>-		fp_state.fpmr = &amp;__vcpu_sys_reg(vcpu, FPMR);</div><div class='add'>+		fp_state.svcr = __ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, SVCR);</div><div class='add'>+		fp_state.fpmr = __ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, FPMR);</div><div class='ctx'> 		fp_state.fp_type = &amp;vcpu-&gt;arch.fp_type;</div><div class='ctx'> </div><div class='ctx'> 		if (vcpu_has_sve(vcpu))</div><div class='hunk'>@@ -162,52 +104,7 @@ void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If we have VHE then the Hyp code will reset CPACR_EL1 to</div><div class='del'>-	 * the default value and we need to reenable SME.</div><div class='del'>-	 */</div><div class='del'>-	if (has_vhe() &amp;&amp; system_supports_sme()) {</div><div class='del'>-		/* Also restore EL0 state seen on entry */</div><div class='del'>-		if (vcpu_get_flag(vcpu, HOST_SME_ENABLED))</div><div class='del'>-			sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_SMEN);</div><div class='del'>-		else</div><div class='del'>-			sysreg_clear_set(CPACR_EL1,</div><div class='del'>-					 CPACR_EL1_SMEN_EL0EN,</div><div class='del'>-					 CPACR_EL1_SMEN_EL1EN);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (guest_owns_fp_regs()) {</div><div class='del'>-		if (vcpu_has_sve(vcpu)) {</div><div class='del'>-			u64 zcr = read_sysreg_el1(SYS_ZCR);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * If the vCPU is in the hyp context then ZCR_EL1 is</div><div class='del'>-			 * loaded with its vEL2 counterpart.</div><div class='del'>-			 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)) = zcr;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Restore the VL that was saved when bound to the CPU,</div><div class='del'>-			 * which is the maximum VL for the guest. Because the</div><div class='del'>-			 * layout of the data when saving the sve state depends</div><div class='del'>-			 * on the VL, we need to use a consistent (i.e., the</div><div class='del'>-			 * maximum) VL.</div><div class='del'>-			 * Note that this means that at guest exit ZCR_EL1 is</div><div class='del'>-			 * not necessarily the same as on guest entry.</div><div class='del'>-			 *</div><div class='del'>-			 * ZCR_EL2 holds the guest hypervisor's VL when running</div><div class='del'>-			 * a nested guest, which could be smaller than the</div><div class='del'>-			 * max for the vCPU. Similar to above, we first need to</div><div class='del'>-			 * switch to a VL consistent with the layout of the</div><div class='del'>-			 * vCPU's SVE state. KVM support for NV implies VHE, so</div><div class='del'>-			 * using the ZCR_EL1 alias is safe.</div><div class='del'>-			 */</div><div class='del'>-			if (!has_vhe() || (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)))</div><div class='del'>-				sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1,</div><div class='del'>-						       SYS_ZCR_EL1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Flush (save and invalidate) the fpsimd/sve state so that if</div><div class='ctx'> 		 * the host tries to use fpsimd/sve, it's not using stale data</div><div class='hunk'>@@ -219,18 +116,6 @@ void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * when needed.</div><div class='ctx'> 		 */</div><div class='ctx'> 		fpsimd_save_and_flush_cpu_state();</div><div class='del'>-	} else if (has_vhe() &amp;&amp; system_supports_sve()) {</div><div class='del'>-		/*</div><div class='del'>-		 * The FPSIMD/SVE state in the CPU has not been touched, and we</div><div class='del'>-		 * have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been</div><div class='del'>-		 * reset by kvm_reset_cptr_el2() in the Hyp code, disabling SVE</div><div class='del'>-		 * for EL0.  To avoid spurious traps, restore the trap state</div><div class='del'>-		 * seen by kvm_arch_vcpu_load_fp():</div><div class='del'>-		 */</div><div class='del'>-		if (vcpu_get_flag(vcpu, HOST_SVE_ENABLED))</div><div class='del'>-			sysreg_clear_set(CPACR_EL1, 0, CPACR_EL1_ZEN_EL0EN);</div><div class='del'>-		else</div><div class='del'>-			sysreg_clear_set(CPACR_EL1, CPACR_EL1_ZEN_EL0EN, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='head'>diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c<br/>index 962f985977c2..16ba5e9ac86c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/guest.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/guest.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/guest.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/guest.c</a></div><div class='hunk'>@@ -818,8 +818,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,</div><div class='ctx'> int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			      struct kvm_vcpu_events *events)</div><div class='ctx'> {</div><div class='del'>-	events-&gt;exception.serror_pending = !!(vcpu-&gt;arch.hcr_el2 &amp; HCR_VSE);</div><div class='ctx'> 	events-&gt;exception.serror_has_esr = cpus_have_final_cap(ARM64_HAS_RAS_EXTN);</div><div class='add'>+	events-&gt;exception.serror_pending = (vcpu-&gt;arch.hcr_el2 &amp; HCR_VSE) ||</div><div class='add'>+					   vcpu_get_flag(vcpu, NESTED_SERROR_PENDING);</div><div class='ctx'> </div><div class='ctx'> 	if (events-&gt;exception.serror_pending &amp;&amp; events-&gt;exception.serror_has_esr)</div><div class='ctx'> 		events-&gt;exception.serror_esr = vcpu_get_vsesr(vcpu);</div><div class='hunk'>@@ -833,29 +834,62 @@ int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void commit_pending_events(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!vcpu_get_flag(vcpu, PENDING_EXCEPTION))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reset the MMIO emulation state to avoid stepping PC after emulating</div><div class='add'>+	 * the exception entry.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;mmio_needed = false;</div><div class='add'>+	kvm_call_hyp(__kvm_adjust_pc, vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			      struct kvm_vcpu_events *events)</div><div class='ctx'> {</div><div class='ctx'> 	bool serror_pending = events-&gt;exception.serror_pending;</div><div class='ctx'> 	bool has_esr = events-&gt;exception.serror_has_esr;</div><div class='ctx'> 	bool ext_dabt_pending = events-&gt;exception.ext_dabt_pending;</div><div class='add'>+	u64 esr = events-&gt;exception.serror_esr;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (serror_pending &amp;&amp; has_esr) {</div><div class='del'>-		if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if (!((events-&gt;exception.serror_esr) &amp; ~ESR_ELx_ISS_MASK))</div><div class='del'>-			kvm_set_sei_esr(vcpu, events-&gt;exception.serror_esr);</div><div class='del'>-		else</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	} else if (serror_pending) {</div><div class='del'>-		kvm_inject_vabt(vcpu);</div><div class='add'>+	/*</div><div class='add'>+	 * Immediately commit the pending SEA to the vCPU's architectural</div><div class='add'>+	 * state which is necessary since we do not return a pending SEA</div><div class='add'>+	 * to userspace via KVM_GET_VCPU_EVENTS.</div><div class='add'>+	 */</div><div class='add'>+	if (ext_dabt_pending) {</div><div class='add'>+		ret = kvm_inject_sea_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='add'>+		commit_pending_events(vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ext_dabt_pending)</div><div class='del'>-		kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!serror_pending)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN) &amp;&amp; has_esr)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (has_esr &amp;&amp; (esr &amp; ~ESR_ELx_ISS_MASK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (has_esr)</div><div class='add'>+		ret = kvm_inject_serror_esr(vcpu, esr);</div><div class='add'>+	else</div><div class='add'>+		ret = kvm_inject_serror(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We could've decided that the SError is due for immediate software</div><div class='add'>+	 * injection; commit the exception in case userspace decides it wants</div><div class='add'>+	 * to inject more exceptions for some strange reason.</div><div class='add'>+	 */</div><div class='add'>+	commit_pending_events(vcpu);</div><div class='add'>+	return (ret &lt; 0) ? ret : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 __attribute_const__ kvm_target_cpu(void)</div><div class='hunk'>@@ -917,31 +951,24 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,</div><div class='ctx'> int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					struct kvm_guest_debug *dbg)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='ctx'> 	trace_kvm_set_guest_debug(vcpu, dbg-&gt;control);</div><div class='ctx'> </div><div class='del'>-	if (dbg-&gt;control &amp; ~KVM_GUESTDBG_VALID_MASK) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dbg-&gt;control &amp; KVM_GUESTDBG_ENABLE) {</div><div class='del'>-		vcpu-&gt;guest_debug = dbg-&gt;control;</div><div class='del'>-</div><div class='del'>-		/* Hardware assisted Break and Watch points */</div><div class='del'>-		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW) {</div><div class='del'>-			vcpu-&gt;arch.external_debug_state = dbg-&gt;arch;</div><div class='del'>-		}</div><div class='add'>+	if (dbg-&gt;control &amp; ~KVM_GUESTDBG_VALID_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	} else {</div><div class='del'>-		/* If not enabled clear all flags */</div><div class='add'>+	if (!(dbg-&gt;control &amp; KVM_GUESTDBG_ENABLE)) {</div><div class='ctx'> 		vcpu-&gt;guest_debug = 0;</div><div class='del'>-		vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);</div><div class='add'>+		vcpu_clear_flag(vcpu, HOST_SS_ACTIVE_PENDING);</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='add'>+	vcpu-&gt;guest_debug = dbg-&gt;control;</div><div class='add'>+</div><div class='add'>+	/* Hardware assisted Break and Watch points */</div><div class='add'>+	if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW)</div><div class='add'>+		vcpu-&gt;arch.external_debug_state = dbg-&gt;arch;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -1051,50 +1078,58 @@ int kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while (length &gt; 0) {</div><div class='del'>-		kvm_pfn_t pfn = gfn_to_pfn_prot(kvm, gfn, write, NULL);</div><div class='add'>+		struct page *page = __gfn_to_page(kvm, gfn, write);</div><div class='ctx'> 		void *maddr;</div><div class='ctx'> 		unsigned long num_tags;</div><div class='del'>-		struct page *page;</div><div class='add'>+		struct folio *folio;</div><div class='ctx'> </div><div class='del'>-		if (is_error_noslot_pfn(pfn)) {</div><div class='add'>+		if (!page) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		page = pfn_to_online_page(pfn);</div><div class='del'>-		if (!page) {</div><div class='add'>+		if (!pfn_to_online_page(page_to_pfn(page))) {</div><div class='ctx'> 			/* Reject ZONE_DEVICE memory */</div><div class='del'>-			kvm_release_pfn_clean(pfn);</div><div class='add'>+			kvm_release_page_unused(page);</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		folio = page_folio(page);</div><div class='ctx'> 		maddr = page_address(page);</div><div class='ctx'> </div><div class='ctx'> 		if (!write) {</div><div class='del'>-			if (page_mte_tagged(page))</div><div class='add'>+			if ((folio_test_hugetlb(folio) &amp;&amp;</div><div class='add'>+			     folio_test_hugetlb_mte_tagged(folio)) ||</div><div class='add'>+			     page_mte_tagged(page))</div><div class='ctx'> 				num_tags = mte_copy_tags_to_user(tags, maddr,</div><div class='ctx'> 							MTE_GRANULES_PER_PAGE);</div><div class='ctx'> 			else</div><div class='ctx'> 				/* No tags in memory, so write zeros */</div><div class='ctx'> 				num_tags = MTE_GRANULES_PER_PAGE -</div><div class='ctx'> 					clear_user(tags, MTE_GRANULES_PER_PAGE);</div><div class='del'>-			kvm_release_pfn_clean(pfn);</div><div class='add'>+			kvm_release_page_clean(page);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Only locking to serialise with a concurrent</div><div class='ctx'> 			 * __set_ptes() in the VMM but still overriding the</div><div class='ctx'> 			 * tags, hence ignoring the return value.</div><div class='ctx'> 			 */</div><div class='del'>-			try_page_mte_tagging(page);</div><div class='add'>+			if (folio_test_hugetlb(folio))</div><div class='add'>+				folio_try_hugetlb_mte_tagging(folio);</div><div class='add'>+			else</div><div class='add'>+				try_page_mte_tagging(page);</div><div class='ctx'> 			num_tags = mte_copy_tags_from_user(maddr, tags,</div><div class='ctx'> 							MTE_GRANULES_PER_PAGE);</div><div class='ctx'> </div><div class='ctx'> 			/* uaccess failed, don't leave stale tags */</div><div class='ctx'> 			if (num_tags != MTE_GRANULES_PER_PAGE)</div><div class='ctx'> 				mte_clear_page_tags(maddr);</div><div class='del'>-			set_page_mte_tagged(page);</div><div class='add'>+			if (folio_test_hugetlb(folio))</div><div class='add'>+				folio_set_hugetlb_mte_tagged(folio);</div><div class='add'>+			else</div><div class='add'>+				set_page_mte_tagged(page);</div><div class='ctx'> </div><div class='del'>-			kvm_release_pfn_dirty(pfn);</div><div class='add'>+			kvm_release_page_dirty(page);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (num_tags != MTE_GRANULES_PER_PAGE) {</div><div class='head'>diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c<br/>index d7c2990e7c9e..bca8c80e11da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/handle_exit.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/handle_exit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/handle_exit.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/handle_exit.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/ubsan.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/esr.h&gt;</div><div class='ctx'> #include &lt;asm/exception.h&gt;</div><div class='hunk'>@@ -31,7 +32,7 @@ typedef int (*exit_handle_fn)(struct kvm_vcpu *);</div><div class='ctx'> static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u64 esr)</div><div class='ctx'> {</div><div class='ctx'> 	if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))</div><div class='del'>-		kvm_inject_vabt(vcpu);</div><div class='add'>+		kvm_inject_serror(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int handle_hvc(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -129,8 +130,12 @@ static int kvm_handle_fpasimd(struct kvm_vcpu *vcpu)</div><div class='ctx'> static int kvm_handle_wfx(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+	bool is_wfe = !!(esr &amp; ESR_ELx_WFx_ISS_WFE);</div><div class='ctx'> </div><div class='del'>-	if (esr &amp; ESR_ELx_WFx_ISS_WFE) {</div><div class='add'>+	if (guest_hyp_wfx_traps_enabled(vcpu))</div><div class='add'>+		return kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));</div><div class='add'>+</div><div class='add'>+	if (is_wfe) {</div><div class='ctx'> 		trace_kvm_wfx_arm64(*vcpu_pc(vcpu), true);</div><div class='ctx'> 		vcpu-&gt;stat.wfe_exit_stat++;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -183,6 +188,9 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='ctx'> 	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='ctx'> </div><div class='add'>+	if (!vcpu-&gt;guest_debug &amp;&amp; forward_debug_exception(vcpu))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='ctx'> 	run-&gt;exit_reason = KVM_EXIT_DEBUG;</div><div class='ctx'> 	run-&gt;debug.arch.hsr = lower_32_bits(esr);</div><div class='ctx'> 	run-&gt;debug.arch.hsr_high = upper_32_bits(esr);</div><div class='hunk'>@@ -193,7 +201,7 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		run-&gt;debug.arch.far = vcpu-&gt;arch.fault.far_el2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ESR_ELx_EC_SOFTSTP_LOW:</div><div class='del'>-		vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);</div><div class='add'>+		*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -244,7 +252,7 @@ static int kvm_handle_ptrauth(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) {</div><div class='add'>+	if (is_nested_ctxt(vcpu)) {</div><div class='ctx'> 		kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -291,6 +299,75 @@ static int handle_svc(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_handle_gcs(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* We don't expect GCS, so treat it with contempt */</div><div class='add'>+	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+</div><div class='add'>+	kvm_inject_undefined(vcpu);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int handle_other(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool allowed, fwd = is_nested_ctxt(vcpu);</div><div class='add'>+	u64 hcrx = __vcpu_sys_reg(vcpu, HCRX_EL2);</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+	u64 iss = ESR_ELx_ISS(esr);</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We only trap for two reasons:</div><div class='add'>+	 *</div><div class='add'>+	 * - the feature is disabled, and the only outcome is to</div><div class='add'>+	 *   generate an UNDEF.</div><div class='add'>+	 *</div><div class='add'>+	 * - the feature is enabled, but a NV guest wants to trap the</div><div class='add'>+	 *   feature used by its L2 guest. We forward the exception in</div><div class='add'>+	 *   this case.</div><div class='add'>+	 *</div><div class='add'>+	 * What we don't expect is to end-up here if the guest is</div><div class='add'>+	 * expected be be able to directly use the feature, hence the</div><div class='add'>+	 * WARN_ON below.</div><div class='add'>+	 */</div><div class='add'>+	switch (iss) {</div><div class='add'>+	case ESR_ELx_ISS_OTHER_ST64BV:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V);</div><div class='add'>+		fwd &amp;= !(hcrx &amp; HCRX_EL2_EnASR);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_ST64BV0:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);</div><div class='add'>+		fwd &amp;= !(hcrx &amp; HCRX_EL2_EnAS0);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_LDST64B:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64);</div><div class='add'>+		fwd &amp;= !(hcrx &amp; HCRX_EL2_EnALS);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_TSBCSYNC:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, TRBE_V1P1);</div><div class='add'>+		fwd &amp;= (__vcpu_sys_reg(vcpu, HFGITR2_EL2) &amp; HFGITR2_EL2_TSBCSYNC);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_PSBCSYNC:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P5);</div><div class='add'>+		fwd &amp;= (__vcpu_sys_reg(vcpu, HFGITR_EL2) &amp; HFGITR_EL2_PSBCSYNC);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Clearly, we're missing something. */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		allowed = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(allowed &amp;&amp; !fwd);</div><div class='add'>+</div><div class='add'>+	if (allowed &amp;&amp; fwd)</div><div class='add'>+		kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+	else</div><div class='add'>+		kvm_inject_undefined(vcpu);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[0 ... ESR_ELx_EC_MAX]	= kvm_handle_unknown_ec,</div><div class='ctx'> 	[ESR_ELx_EC_WFx]	= kvm_handle_wfx,</div><div class='hunk'>@@ -300,6 +377,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_CP14_LS]	= kvm_handle_cp14_load_store,</div><div class='ctx'> 	[ESR_ELx_EC_CP10_ID]	= kvm_handle_cp10_id,</div><div class='ctx'> 	[ESR_ELx_EC_CP14_64]	= kvm_handle_cp14_64,</div><div class='add'>+	[ESR_ELx_EC_OTHER]	= handle_other,</div><div class='ctx'> 	[ESR_ELx_EC_HVC32]	= handle_hvc,</div><div class='ctx'> 	[ESR_ELx_EC_SMC32]	= handle_smc,</div><div class='ctx'> 	[ESR_ELx_EC_HVC64]	= handle_hvc,</div><div class='hunk'>@@ -310,6 +388,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_ERET]	= kvm_handle_eret,</div><div class='ctx'> 	[ESR_ELx_EC_IABT_LOW]	= kvm_handle_guest_abort,</div><div class='ctx'> 	[ESR_ELx_EC_DABT_LOW]	= kvm_handle_guest_abort,</div><div class='add'>+	[ESR_ELx_EC_DABT_CUR]	= kvm_handle_vncr_abort,</div><div class='ctx'> 	[ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,</div><div class='hunk'>@@ -317,6 +396,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_BRK64]	= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_FP_ASIMD]	= kvm_handle_fpasimd,</div><div class='ctx'> 	[ESR_ELx_EC_PAC]	= kvm_handle_ptrauth,</div><div class='add'>+	[ESR_ELx_EC_GCS]	= kvm_handle_gcs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -410,7 +490,7 @@ void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index)</div><div class='ctx'> </div><div class='ctx'> 			kvm_handle_guest_serror(vcpu, disr_to_esr(disr));</div><div class='ctx'> 		} else {</div><div class='del'>-			kvm_inject_vabt(vcpu);</div><div class='add'>+			kvm_inject_serror(vcpu);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='hunk'>@@ -465,8 +545,13 @@ void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,</div><div class='ctx'> 			kvm_err("nVHE hyp BUG at: %s:%u!\n", file, line);</div><div class='ctx'> 		else</div><div class='ctx'> 			print_nvhe_hyp_panic("BUG", panic_addr);</div><div class='del'>-	} else if (IS_ENABLED(CONFIG_CFI_CLANG) &amp;&amp; esr_is_cfi_brk(esr)) {</div><div class='add'>+	} else if (IS_ENABLED(CONFIG_CFI) &amp;&amp; esr_is_cfi_brk(esr)) {</div><div class='ctx'> 		kvm_nvhe_report_cfi_failure(panic_addr);</div><div class='add'>+	} else if (IS_ENABLED(CONFIG_UBSAN_KVM_EL2) &amp;&amp;</div><div class='add'>+		   ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &amp;&amp;</div><div class='add'>+		   esr_is_ubsan_brk(esr)) {</div><div class='add'>+		print_nvhe_hyp_panic(report_ubsan_failure(esr &amp; UBSAN_BRK_MASK),</div><div class='add'>+				     panic_addr);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		print_nvhe_hyp_panic("panic", panic_addr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -474,6 +559,9 @@ void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,</div><div class='ctx'> 	/* Dump the nVHE hypervisor backtrace */</div><div class='ctx'> 	kvm_nvhe_dump_backtrace(hyp_offset);</div><div class='ctx'> </div><div class='add'>+	/* Dump the faulting instruction */</div><div class='add'>+	dump_kernel_instr(panic_addr + kaslr_offset());</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Hyp has panicked and we're going to handle that by panicking the</div><div class='ctx'> 	 * kernel. The kernel offset will be revealed in the panic so we're</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S<br/>index 4433a234aa9b..9f4e8d68ab50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/entry.S</a></div><div class='hunk'>@@ -44,6 +44,11 @@ alternative_if ARM64_HAS_RAS_EXTN</div><div class='ctx'> alternative_else_nop_endif</div><div class='ctx'> 	mrs	x1, isr_el1</div><div class='ctx'> 	cbz	x1,  1f</div><div class='add'>+</div><div class='add'>+	// Ensure that __guest_enter() always provides a context</div><div class='add'>+	// synchronization event so that callers don't need ISBs for anything</div><div class='add'>+	// that would usually be synchonized by the ERET.</div><div class='add'>+	isb</div><div class='ctx'> 	mov	x0, #ARM_EXCEPTION_IRQ</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c<br/>index 424a5107cddb..bef40ddb16db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/exception.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/exception.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/exception.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/exception.c</a></div><div class='hunk'>@@ -22,42 +22,36 @@</div><div class='ctx'> </div><div class='ctx'> static inline u64 __vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)</div><div class='ctx'> {</div><div class='del'>-	u64 val;</div><div class='del'>-</div><div class='del'>-	if (unlikely(vcpu_has_nv(vcpu)))</div><div class='add'>+	if (has_vhe())</div><div class='ctx'> 		return vcpu_read_sys_reg(vcpu, reg);</div><div class='del'>-	else if (__vcpu_read_sys_reg_from_cpu(reg, &amp;val))</div><div class='del'>-		return val;</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(vcpu_has_nv(vcpu)))</div><div class='add'>+	if (has_vhe())</div><div class='ctx'> 		vcpu_write_sys_reg(vcpu, val, reg);</div><div class='del'>-	else if (!__vcpu_write_sys_reg_to_cpu(val, reg))</div><div class='del'>-		__vcpu_sys_reg(vcpu, reg) = val;</div><div class='add'>+	else</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long target_mode,</div><div class='ctx'> 			      u64 val)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(vcpu_has_nv(vcpu))) {</div><div class='add'>+	if (has_vhe()) {</div><div class='ctx'> 		if (target_mode == PSR_MODE_EL1h)</div><div class='ctx'> 			vcpu_write_sys_reg(vcpu, val, SPSR_EL1);</div><div class='ctx'> 		else</div><div class='ctx'> 			vcpu_write_sys_reg(vcpu, val, SPSR_EL2);</div><div class='del'>-	} else if (has_vhe()) {</div><div class='del'>-		write_sysreg_el1(val, SYS_SPSR);</div><div class='ctx'> 	} else {</div><div class='del'>-		__vcpu_sys_reg(vcpu, SPSR_EL1) = val;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, SPSR_EL1, val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __vcpu_write_spsr_abt(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='del'>-	if (has_vhe())</div><div class='add'>+	if (has_vhe() &amp;&amp; vcpu_get_flag(vcpu, SYSREGS_ON_CPU))</div><div class='ctx'> 		write_sysreg(val, spsr_abt);</div><div class='ctx'> 	else</div><div class='ctx'> 		vcpu-&gt;arch.ctxt.spsr_abt = val;</div><div class='hunk'>@@ -65,7 +59,7 @@ static void __vcpu_write_spsr_abt(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> </div><div class='ctx'> static void __vcpu_write_spsr_und(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='del'>-	if (has_vhe())</div><div class='add'>+	if (has_vhe() &amp;&amp; vcpu_get_flag(vcpu, SYSREGS_ON_CPU))</div><div class='ctx'> 		write_sysreg(val, spsr_und);</div><div class='ctx'> 	else</div><div class='ctx'> 		vcpu-&gt;arch.ctxt.spsr_und = val;</div><div class='hunk'>@@ -339,6 +333,10 @@ static void kvm_inject_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL1_SERR):</div><div class='add'>+			enter_exception64(vcpu, PSR_MODE_EL1h, except_type_serror);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case unpack_vcpu_flag(EXCEPT_AA64_EL2_SYNC):</div><div class='ctx'> 			enter_exception64(vcpu, PSR_MODE_EL2h, except_type_sync);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -347,9 +345,13 @@ static void kvm_inject_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			enter_exception64(vcpu, PSR_MODE_EL2h, except_type_irq);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL2_SERR):</div><div class='add'>+			enter_exception64(vcpu, PSR_MODE_EL2h, except_type_serror);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			/*</div><div class='del'>-			 * Only EL1_SYNC and EL2_{SYNC,IRQ} makes</div><div class='add'>+			 * Only EL1_{SYNC,SERR} and EL2_{SYNC,IRQ,SERR} makes</div><div class='ctx'> 			 * sense so far. Everything else gets silently</div><div class='ctx'> 			 * ignored.</div><div class='ctx'> 			 */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/debug-sr.h b/arch/arm64/kvm/hyp/include/hyp/debug-sr.h<br/>index d00093699aaf..502a5b73ee70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/debug-sr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/debug-sr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/debug-sr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/hyp/debug-sr.h</a></div><div class='hunk'>@@ -88,15 +88,26 @@</div><div class='ctx'> 	default:	write_debug(ptr[0], reg, 0);			\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+static struct kvm_guest_debug_arch *__vcpu_debug_regs(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	switch (vcpu-&gt;arch.debug_owner) {</div><div class='add'>+	case VCPU_DEBUG_FREE:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case VCPU_DEBUG_GUEST_OWNED:</div><div class='add'>+		return &amp;vcpu-&gt;arch.vcpu_debug_state;</div><div class='add'>+	case VCPU_DEBUG_HOST_OWNED:</div><div class='add'>+		return &amp;vcpu-&gt;arch.external_debug_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __debug_save_state(struct kvm_guest_debug_arch *dbg,</div><div class='ctx'> 			       struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='del'>-	u64 aa64dfr0;</div><div class='del'>-	int brps, wrps;</div><div class='del'>-</div><div class='del'>-	aa64dfr0 = read_sysreg(id_aa64dfr0_el1);</div><div class='del'>-	brps = (aa64dfr0 &gt;&gt; 12) &amp; 0xf;</div><div class='del'>-	wrps = (aa64dfr0 &gt;&gt; 20) &amp; 0xf;</div><div class='add'>+	int brps = *host_data_ptr(debug_brps);</div><div class='add'>+	int wrps = *host_data_ptr(debug_wrps);</div><div class='ctx'> </div><div class='ctx'> 	save_debug(dbg-&gt;dbg_bcr, dbgbcr, brps);</div><div class='ctx'> 	save_debug(dbg-&gt;dbg_bvr, dbgbvr, brps);</div><div class='hunk'>@@ -109,13 +120,8 @@ static void __debug_save_state(struct kvm_guest_debug_arch *dbg,</div><div class='ctx'> static void __debug_restore_state(struct kvm_guest_debug_arch *dbg,</div><div class='ctx'> 				  struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='del'>-	u64 aa64dfr0;</div><div class='del'>-	int brps, wrps;</div><div class='del'>-</div><div class='del'>-	aa64dfr0 = read_sysreg(id_aa64dfr0_el1);</div><div class='del'>-</div><div class='del'>-	brps = (aa64dfr0 &gt;&gt; 12) &amp; 0xf;</div><div class='del'>-	wrps = (aa64dfr0 &gt;&gt; 20) &amp; 0xf;</div><div class='add'>+	int brps = *host_data_ptr(debug_brps);</div><div class='add'>+	int wrps = *host_data_ptr(debug_wrps);</div><div class='ctx'> </div><div class='ctx'> 	restore_debug(dbg-&gt;dbg_bcr, dbgbcr, brps);</div><div class='ctx'> 	restore_debug(dbg-&gt;dbg_bvr, dbgbvr, brps);</div><div class='hunk'>@@ -132,13 +138,13 @@ static inline void __debug_switch_to_guest_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_guest_debug_arch *host_dbg;</div><div class='ctx'> 	struct kvm_guest_debug_arch *guest_dbg;</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_get_flag(vcpu, DEBUG_DIRTY))</div><div class='add'>+	if (!kvm_debug_regs_in_use(vcpu))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	host_ctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	guest_ctxt = &amp;vcpu-&gt;arch.ctxt;</div><div class='ctx'> 	host_dbg = host_data_ptr(host_debug_state.regs);</div><div class='del'>-	guest_dbg = kern_hyp_va(vcpu-&gt;arch.debug_ptr);</div><div class='add'>+	guest_dbg = __vcpu_debug_regs(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	__debug_save_state(host_dbg, host_ctxt);</div><div class='ctx'> 	__debug_restore_state(guest_dbg, guest_ctxt);</div><div class='hunk'>@@ -151,18 +157,16 @@ static inline void __debug_switch_to_host_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_guest_debug_arch *host_dbg;</div><div class='ctx'> 	struct kvm_guest_debug_arch *guest_dbg;</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_get_flag(vcpu, DEBUG_DIRTY))</div><div class='add'>+	if (!kvm_debug_regs_in_use(vcpu))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	host_ctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	guest_ctxt = &amp;vcpu-&gt;arch.ctxt;</div><div class='ctx'> 	host_dbg = host_data_ptr(host_debug_state.regs);</div><div class='del'>-	guest_dbg = kern_hyp_va(vcpu-&gt;arch.debug_ptr);</div><div class='add'>+	guest_dbg = __vcpu_debug_regs(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	__debug_save_state(guest_dbg, guest_ctxt);</div><div class='ctx'> 	__debug_restore_state(host_dbg, host_ctxt);</div><div class='del'>-</div><div class='del'>-	vcpu_clear_flag(vcpu, DEBUG_DIRTY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARM64_KVM_HYP_DEBUG_SR_H__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/fault.h b/arch/arm64/kvm/hyp/include/hyp/fault.h<br/>index 17df94570f03..fc573fc767b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/fault.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/fault.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/fault.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/hyp/fault.h</a></div><div class='hunk'>@@ -12,6 +12,16 @@</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline bool __fault_safe_to_translate(u64 esr)</div><div class='add'>+{</div><div class='add'>+	u64 fsc = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_sea_ttw(esr) || esr_fsc_is_secc_ttw(esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !(fsc == ESR_ELx_FSC_EXTABT &amp;&amp; (esr &amp; ESR_ELx_FnV));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -44,34 +54,50 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault)</div><div class='add'>+/*</div><div class='add'>+ * Checks for the conditions when HPFAR_EL2 is written, per ARM ARM R_FKLWR.</div><div class='add'>+ */</div><div class='add'>+static inline bool __hpfar_valid(u64 esr)</div><div class='ctx'> {</div><div class='del'>-	u64 hpfar, far;</div><div class='del'>-</div><div class='del'>-	far = read_sysreg_el2(SYS_FAR);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * The HPFAR can be invalid if the stage 2 fault did not</div><div class='del'>-	 * happen during a stage 1 page table walk (the ESR_EL2.S1PTW</div><div class='del'>-	 * bit is clear) and one of the two following cases are true:</div><div class='del'>-	 *   1. The fault was due to a permission fault</div><div class='del'>-	 *   2. The processor carries errata 834220</div><div class='add'>+	 * CPUs affected by ARM erratum #834220 may incorrectly report a</div><div class='add'>+	 * stage-2 translation fault when a stage-1 permission fault occurs.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Therefore, for all non S1PTW faults where we either have a</div><div class='del'>-	 * permission fault or the errata workaround is enabled, we</div><div class='del'>-	 * resolve the IPA using the AT instruction.</div><div class='add'>+	 * Re-walk the page tables to determine if a stage-1 fault actually</div><div class='add'>+	 * occurred.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(esr &amp; ESR_ELx_S1PTW) &amp;&amp;</div><div class='del'>-	    (cpus_have_final_cap(ARM64_WORKAROUND_834220) ||</div><div class='del'>-	     esr_fsc_is_permission_fault(esr))) {</div><div class='del'>-		if (!__translate_far_to_hpfar(far, &amp;hpfar))</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='add'>+	if (cpus_have_final_cap(ARM64_WORKAROUND_834220) &amp;&amp;</div><div class='add'>+	    esr_fsc_is_translation_fault(esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_translation_fault(esr) || esr_fsc_is_access_flag_fault(esr))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if ((esr &amp; ESR_ELx_S1PTW) &amp;&amp; esr_fsc_is_permission_fault(esr))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return esr_fsc_is_addr_sz_fault(esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault)</div><div class='add'>+{</div><div class='add'>+	u64 hpfar;</div><div class='add'>+</div><div class='add'>+	fault-&gt;far_el2		= read_sysreg_el2(SYS_FAR);</div><div class='add'>+	fault-&gt;hpfar_el2	= 0;</div><div class='add'>+</div><div class='add'>+	if (__hpfar_valid(esr))</div><div class='ctx'> 		hpfar = read_sysreg(hpfar_el2);</div><div class='del'>-	}</div><div class='add'>+	else if (unlikely(!__fault_safe_to_translate(esr)))</div><div class='add'>+		return true;</div><div class='add'>+	else if (!__translate_far_to_hpfar(fault-&gt;far_el2, &amp;hpfar))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	fault-&gt;far_el2 = far;</div><div class='del'>-	fault-&gt;hpfar_el2 = hpfar;</div><div class='add'>+	/*</div><div class='add'>+	 * Hijack HPFAR_EL2.NS (RES0 in Non-secure) to indicate a valid</div><div class='add'>+	 * HPFAR value.</div><div class='add'>+	 */</div><div class='add'>+	fault-&gt;hpfar_el2 = hpfar | HPFAR_EL2_NS;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h<br/>index 5310fe1da616..b6682202edf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/switch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/switch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/switch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/hyp/switch.h</a></div><div class='hunk'>@@ -45,7 +45,7 @@ static inline void __fpsimd_save_fpexc32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!vcpu_el1_is_32bit(vcpu))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, FPEXC32_EL2) = read_sysreg(fpexc32_el2);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, FPEXC32_EL2, read_sysreg(fpexc32_el2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -65,12 +65,186 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void __activate_cptr_traps_nvhe(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 val = CPTR_NVHE_EL2_RES1 | CPTR_EL2_TAM | CPTR_EL2_TTA;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Always trap SME since it's not supported in KVM.</div><div class='add'>+	 * TSM is RES1 if SME isn't implemented.</div><div class='add'>+	 */</div><div class='add'>+	val |= CPTR_EL2_TSM;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_sve(vcpu) || !guest_owns_fp_regs())</div><div class='add'>+		val |= CPTR_EL2_TZ;</div><div class='add'>+</div><div class='add'>+	if (!guest_owns_fp_regs())</div><div class='add'>+		val |= CPTR_EL2_TFP;</div><div class='add'>+</div><div class='add'>+	write_sysreg(val, cptr_el2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __activate_cptr_traps_vhe(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to</div><div class='add'>+	 * CPTR_EL2. In general, CPACR_EL1 has the same layout as CPTR_EL2,</div><div class='add'>+	 * except for some missing controls, such as TAM.</div><div class='add'>+	 * In this case, CPTR_EL2.TAM has the same position with or without</div><div class='add'>+	 * VHE (HCR.E2H == 1) which allows us to use here the CPTR_EL2.TAM</div><div class='add'>+	 * shift value for trapping the AMU accesses.</div><div class='add'>+	 */</div><div class='add'>+	u64 val = CPTR_EL2_TAM | CPACR_EL1_TTA;</div><div class='add'>+	u64 cptr;</div><div class='add'>+</div><div class='add'>+	if (guest_owns_fp_regs()) {</div><div class='add'>+		val |= CPACR_EL1_FPEN;</div><div class='add'>+		if (vcpu_has_sve(vcpu))</div><div class='add'>+			val |= CPACR_EL1_ZEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		goto write;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The architecture is a bit crap (what a surprise): an EL2 guest</div><div class='add'>+	 * writing to CPTR_EL2 via CPACR_EL1 can't set any of TCPAC or TTA,</div><div class='add'>+	 * as they are RES0 in the guest's view. To work around it, trap the</div><div class='add'>+	 * sucker using the very same bit it can't set...</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; is_hyp_ctxt(vcpu))</div><div class='add'>+		val |= CPTR_EL2_TCPAC;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Layer the guest hypervisor's trap configuration on top of our own if</div><div class='add'>+	 * we're in a nested context.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		goto write;</div><div class='add'>+</div><div class='add'>+	cptr = vcpu_sanitised_cptr_el2(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Pay attention, there's some interesting detail here.</div><div class='add'>+	 *</div><div class='add'>+	 * The CPTR_EL2.xEN fields are 2 bits wide, although there are only two</div><div class='add'>+	 * meaningful trap states when HCR_EL2.TGE = 0 (running a nested guest):</div><div class='add'>+	 *</div><div class='add'>+	 *  - CPTR_EL2.xEN = x0, traps are enabled</div><div class='add'>+	 *  - CPTR_EL2.xEN = x1, traps are disabled</div><div class='add'>+	 *</div><div class='add'>+	 * In other words, bit[0] determines if guest accesses trap or not. In</div><div class='add'>+	 * the interest of simplicity, clear the entire field if the guest</div><div class='add'>+	 * hypervisor has traps enabled to dispel any illusion of something more</div><div class='add'>+	 * complicated taking place.</div><div class='add'>+	 */</div><div class='add'>+	if (!(SYS_FIELD_GET(CPACR_EL1, FPEN, cptr) &amp; BIT(0)))</div><div class='add'>+		val &amp;= ~CPACR_EL1_FPEN;</div><div class='add'>+	if (!(SYS_FIELD_GET(CPACR_EL1, ZEN, cptr) &amp; BIT(0)))</div><div class='add'>+		val &amp;= ~CPACR_EL1_ZEN;</div><div class='add'>+</div><div class='add'>+	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR3_EL1, S2POE, IMP))</div><div class='add'>+		val |= cptr &amp; CPACR_EL1_E0POE;</div><div class='add'>+</div><div class='add'>+	val |= cptr &amp; CPTR_EL2_TCPAC;</div><div class='add'>+</div><div class='add'>+write:</div><div class='add'>+	write_sysreg(val, cpacr_el1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __activate_cptr_traps(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!guest_owns_fp_regs())</div><div class='add'>+		__activate_traps_fpsimd32(vcpu);</div><div class='add'>+</div><div class='add'>+	if (has_vhe() || has_hvhe())</div><div class='add'>+		__activate_cptr_traps_vhe(vcpu);</div><div class='add'>+	else</div><div class='add'>+		__activate_cptr_traps_nvhe(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __deactivate_cptr_traps_nvhe(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 val = CPTR_NVHE_EL2_RES1;</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_SVE))</div><div class='add'>+		val |= CPTR_EL2_TZ;</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_SME))</div><div class='add'>+		val |= CPTR_EL2_TSM;</div><div class='add'>+</div><div class='add'>+	write_sysreg(val, cptr_el2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __deactivate_cptr_traps_vhe(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 val = CPACR_EL1_FPEN;</div><div class='add'>+</div><div class='add'>+	if (cpus_have_final_cap(ARM64_SVE))</div><div class='add'>+		val |= CPACR_EL1_ZEN;</div><div class='add'>+	if (cpus_have_final_cap(ARM64_SME))</div><div class='add'>+		val |= CPACR_EL1_SMEN;</div><div class='add'>+</div><div class='add'>+	write_sysreg(val, cpacr_el1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __deactivate_cptr_traps(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (has_vhe() || has_hvhe())</div><div class='add'>+		__deactivate_cptr_traps_vhe(vcpu);</div><div class='add'>+	else</div><div class='add'>+		__deactivate_cptr_traps_nvhe(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define reg_to_fgt_masks(reg)						\</div><div class='add'>+	({								\</div><div class='add'>+		struct fgt_masks *m;					\</div><div class='add'>+		switch(reg) {						\</div><div class='add'>+		case HFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hfgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGWTR_EL2:					\</div><div class='add'>+			m = &amp;hfgwtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR_EL2:					\</div><div class='add'>+			m = &amp;hfgitr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hdfgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGWTR_EL2:					\</div><div class='add'>+			m = &amp;hdfgwtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HAFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hafgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGRTR2_EL2:					\</div><div class='add'>+			m = &amp;hfgrtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGWTR2_EL2:					\</div><div class='add'>+			m = &amp;hfgwtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR2_EL2:					\</div><div class='add'>+			m = &amp;hfgitr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR2_EL2:					\</div><div class='add'>+			m = &amp;hdfgrtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGWTR2_EL2:					\</div><div class='add'>+			m = &amp;hdfgwtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		default:						\</div><div class='add'>+			BUILD_BUG_ON(1);				\</div><div class='add'>+		}							\</div><div class='add'>+									\</div><div class='add'>+		m;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> #define compute_clr_set(vcpu, reg, clr, set)				\</div><div class='ctx'> 	do {								\</div><div class='del'>-		u64 hfg;						\</div><div class='del'>-		hfg = __vcpu_sys_reg(vcpu, reg) &amp; ~__ ## reg ## _RES0;	\</div><div class='del'>-		set |= hfg &amp; __ ## reg ## _MASK; 			\</div><div class='del'>-		clr |= ~hfg &amp; __ ## reg ## _nMASK; 			\</div><div class='add'>+		u64 hfg = __vcpu_sys_reg(vcpu, reg);			\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		set |= hfg &amp; m-&gt;mask;					\</div><div class='add'>+		clr |= ~hfg &amp; m-&gt;nmask;					\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define reg_to_fgt_group_id(reg)					\</div><div class='hunk'>@@ -79,7 +253,7 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		switch(reg) {						\</div><div class='ctx'> 		case HFGRTR_EL2:					\</div><div class='ctx'> 		case HFGWTR_EL2:					\</div><div class='del'>-			id = HFGxTR_GROUP;				\</div><div class='add'>+			id = HFGRTR_GROUP;				\</div><div class='ctx'> 			break;						\</div><div class='ctx'> 		case HFGITR_EL2:					\</div><div class='ctx'> 			id = HFGITR_GROUP;				\</div><div class='hunk'>@@ -91,6 +265,17 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		case HAFGRTR_EL2:					\</div><div class='ctx'> 			id = HAFGRTR_GROUP;				\</div><div class='ctx'> 			break;						\</div><div class='add'>+		case HFGRTR2_EL2:					\</div><div class='add'>+		case HFGWTR2_EL2:					\</div><div class='add'>+			id = HFGRTR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR2_EL2:					\</div><div class='add'>+			id = HFGITR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR2_EL2:					\</div><div class='add'>+		case HDFGWTR2_EL2:					\</div><div class='add'>+			id = HDFGRTR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='ctx'> 		default:						\</div><div class='ctx'> 			BUILD_BUG_ON(1);				\</div><div class='ctx'> 		}							\</div><div class='hunk'>@@ -101,44 +286,32 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> #define compute_undef_clr_set(vcpu, kvm, reg, clr, set)			\</div><div class='ctx'> 	do {								\</div><div class='ctx'> 		u64 hfg = kvm-&gt;arch.fgu[reg_to_fgt_group_id(reg)];	\</div><div class='del'>-		set |= hfg &amp; __ ## reg ## _MASK;			\</div><div class='del'>-		clr |= hfg &amp; __ ## reg ## _nMASK; 			\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		set |= hfg &amp; m-&gt;mask;					\</div><div class='add'>+		clr |= hfg &amp; m-&gt;nmask;					\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define update_fgt_traps_cs(hctxt, vcpu, kvm, reg, clr, set)		\</div><div class='ctx'> 	do {								\</div><div class='del'>-		u64 c = 0, s = 0;					\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		u64 c = clr, s = set;					\</div><div class='add'>+		u64 val;						\</div><div class='ctx'> 									\</div><div class='ctx'> 		ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg);	\</div><div class='del'>-		if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu))		\</div><div class='add'>+		if (is_nested_ctxt(vcpu))				\</div><div class='ctx'> 			compute_clr_set(vcpu, reg, c, s);		\</div><div class='ctx'> 									\</div><div class='ctx'> 		compute_undef_clr_set(vcpu, kvm, reg, c, s);		\</div><div class='ctx'> 									\</div><div class='del'>-		s |= set;						\</div><div class='del'>-		c |= clr;						\</div><div class='del'>-		if (c || s) {						\</div><div class='del'>-			u64 val = __ ## reg ## _nMASK;			\</div><div class='del'>-			val |= s;					\</div><div class='del'>-			val &amp;= ~c;					\</div><div class='del'>-			write_sysreg_s(val, SYS_ ## reg);		\</div><div class='del'>-		}							\</div><div class='add'>+		val = m-&gt;nmask;						\</div><div class='add'>+		val |= s;						\</div><div class='add'>+		val &amp;= ~c;						\</div><div class='add'>+		write_sysreg_s(val, SYS_ ## reg);			\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define update_fgt_traps(hctxt, vcpu, kvm, reg)		\</div><div class='ctx'> 	update_fgt_traps_cs(hctxt, vcpu, kvm, reg, 0, 0)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Validate the fine grain trap masks.</div><div class='del'>- * Check that the masks do not overlap and that all bits are accounted for.</div><div class='del'>- */</div><div class='del'>-#define CHECK_FGT_MASKS(reg)							\</div><div class='del'>-	do {									\</div><div class='del'>-		BUILD_BUG_ON((__ ## reg ## _MASK) &amp; (__ ## reg ## _nMASK));	\</div><div class='del'>-		BUILD_BUG_ON(~((__ ## reg ## _RES0) ^ (__ ## reg ## _MASK) ^	\</div><div class='del'>-			       (__ ## reg ## _nMASK)));				\</div><div class='del'>-	} while(0)</div><div class='del'>-</div><div class='ctx'> static inline bool cpu_has_amu(void)</div><div class='ctx'> {</div><div class='ctx'>        u64 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1);</div><div class='hunk'>@@ -152,60 +325,95 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	struct kvm *kvm = kern_hyp_va(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='del'>-	CHECK_FGT_MASKS(HFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HFGWTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HFGITR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HDFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HDFGWTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HAFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HCRX_EL2);</div><div class='del'>-</div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_FGT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HFGRTR_EL2);</div><div class='ctx'> 	update_fgt_traps_cs(hctxt, vcpu, kvm, HFGWTR_EL2, 0,</div><div class='ctx'> 			    cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38) ?</div><div class='del'>-			    HFGxTR_EL2_TCR_EL1_MASK : 0);</div><div class='add'>+			    HFGWTR_EL2_TCR_EL1_MASK : 0);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HFGITR_EL2);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HDFGRTR_EL2);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HDFGWTR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_amu())</div><div class='ctx'> 		update_fgt_traps(hctxt, vcpu, kvm, HAFGRTR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_FGT2))</div><div class='add'>+	    return;</div><div class='add'>+</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGRTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGWTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGITR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HDFGRTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HDFGWTR2_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __deactivate_fgt(htcxt, vcpu, kvm, reg)				\</div><div class='add'>+#define __deactivate_fgt(htcxt, vcpu, reg)				\</div><div class='ctx'> 	do {								\</div><div class='del'>-		if ((vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) ||	\</div><div class='del'>-		    kvm-&gt;arch.fgu[reg_to_fgt_group_id(reg)])		\</div><div class='del'>-			write_sysreg_s(ctxt_sys_reg(hctxt, reg),	\</div><div class='del'>-				       SYS_ ## reg);			\</div><div class='add'>+		write_sysreg_s(ctxt_sys_reg(hctxt, reg),		\</div><div class='add'>+			       SYS_ ## reg);				\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='del'>-	struct kvm *kvm = kern_hyp_va(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_FGT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HFGRTR_EL2);</div><div class='del'>-	if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))</div><div class='del'>-		write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2);</div><div class='del'>-	else</div><div class='del'>-		__deactivate_fgt(hctxt, vcpu, kvm, HFGWTR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HFGITR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HDFGRTR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HDFGWTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGRTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGWTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGITR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGRTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGWTR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_amu())</div><div class='del'>-		__deactivate_fgt(hctxt, vcpu, kvm, HAFGRTR_EL2);</div><div class='add'>+		__deactivate_fgt(hctxt, vcpu, HAFGRTR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_FGT2))</div><div class='add'>+	    return;</div><div class='add'>+</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGRTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGWTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGITR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGRTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGWTR2_EL2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void  __activate_traps_mpam(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 r = MPAM2_EL2_TRAPMPAM0EL1 | MPAM2_EL2_TRAPMPAM1EL1;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_mpam())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* trap guest access to MPAMIDR_EL1 */</div><div class='add'>+	if (system_supports_mpam_hcr()) {</div><div class='add'>+		write_sysreg_s(MPAMHCR_EL2_TRAP_MPAMIDR_EL1, SYS_MPAMHCR_EL2);</div><div class='add'>+	} else {</div><div class='add'>+		/* From v1.1 TIDR can trap MPAMIDR, set it unconditionally */</div><div class='add'>+		r |= MPAM2_EL2_TIDR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	write_sysreg_s(r, SYS_MPAM2_EL2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __deactivate_traps_mpam(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_mpam())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	write_sysreg_s(0, SYS_MPAM2_EL2);</div><div class='add'>+</div><div class='add'>+	if (system_supports_mpam_hcr())</div><div class='add'>+		write_sysreg_s(MPAMHCR_HOST_FLAGS, SYS_MPAMHCR_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='add'>+</div><div class='ctx'> 	/* Trap on AArch32 cp15 c15 (impdef sysregs) accesses (EL1 or EL0) */</div><div class='ctx'> 	write_sysreg(1 &lt;&lt; 15, hstr_el2);</div><div class='ctx'> </div><div class='hunk'>@@ -215,54 +423,45 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * counter, which could make a PMXEVCNTR_EL0 access UNDEF at</div><div class='ctx'> 	 * EL1 instead of being trapped to EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	if (kvm_arm_support_pmu_v3()) {</div><div class='del'>-		struct kvm_cpu_context *hctxt;</div><div class='del'>-</div><div class='add'>+	if (system_supports_pmuv3()) {</div><div class='ctx'> 		write_sysreg(0, pmselr_el0);</div><div class='ctx'> </div><div class='del'>-		hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 		ctxt_sys_reg(hctxt, PMUSERENR_EL0) = read_sysreg(pmuserenr_el0);</div><div class='ctx'> 		write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);</div><div class='ctx'> 		vcpu_set_flag(vcpu, PMUSERENR_ON_CPU);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2);</div><div class='del'>-	write_sysreg(vcpu-&gt;arch.mdcr_el2, mdcr_el2);</div><div class='del'>-</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_HAS_HCX)) {</div><div class='ctx'> 		u64 hcrx = vcpu-&gt;arch.hcrx_el2;</div><div class='del'>-		if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) {</div><div class='del'>-			u64 clr = 0, set = 0;</div><div class='del'>-</div><div class='del'>-			compute_clr_set(vcpu, HCRX_EL2, clr, set);</div><div class='del'>-</div><div class='del'>-			hcrx |= set;</div><div class='del'>-			hcrx &amp;= ~clr;</div><div class='add'>+		if (is_nested_ctxt(vcpu)) {</div><div class='add'>+			u64 val = __vcpu_sys_reg(vcpu, HCRX_EL2);</div><div class='add'>+			hcrx |= val &amp; __HCRX_EL2_MASK;</div><div class='add'>+			hcrx &amp;= ~(~val &amp; __HCRX_EL2_nMASK);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		ctxt_sys_reg(hctxt, HCRX_EL2) = read_sysreg_s(SYS_HCRX_EL2);</div><div class='ctx'> 		write_sysreg_s(hcrx, SYS_HCRX_EL2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	__activate_traps_hfgxtr(vcpu);</div><div class='add'>+	__activate_traps_mpam(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg(*host_data_ptr(host_debug_state.mdcr_el2), mdcr_el2);</div><div class='add'>+	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> </div><div class='ctx'> 	write_sysreg(0, hstr_el2);</div><div class='del'>-	if (kvm_arm_support_pmu_v3()) {</div><div class='del'>-		struct kvm_cpu_context *hctxt;</div><div class='del'>-</div><div class='del'>-		hctxt = host_data_ptr(host_ctxt);</div><div class='add'>+	if (system_supports_pmuv3()) {</div><div class='ctx'> 		write_sysreg(ctxt_sys_reg(hctxt, PMUSERENR_EL0), pmuserenr_el0);</div><div class='ctx'> 		vcpu_clear_flag(vcpu, PMUSERENR_ON_CPU);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_HAS_HCX))</div><div class='del'>-		write_sysreg_s(HCRX_HOST_FLAGS, SYS_HCRX_EL2);</div><div class='add'>+		write_sysreg_s(ctxt_sys_reg(hctxt, HCRX_EL2), SYS_HCRX_EL2);</div><div class='ctx'> </div><div class='ctx'> 	__deactivate_traps_hfgxtr(vcpu);</div><div class='add'>+	__deactivate_traps_mpam();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void ___activate_traps(struct kvm_vcpu *vcpu, u64 hcr)</div><div class='hunk'>@@ -270,23 +469,58 @@ static inline void ___activate_traps(struct kvm_vcpu *vcpu, u64 hcr)</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM))</div><div class='ctx'> 		hcr |= HCR_TVM;</div><div class='ctx'> </div><div class='del'>-	write_sysreg(hcr, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(hcr);</div><div class='add'>+</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) &amp;&amp; (hcr &amp; HCR_VSE)) {</div><div class='add'>+		u64 vsesr;</div><div class='ctx'> </div><div class='del'>-	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) &amp;&amp; (hcr &amp; HCR_VSE))</div><div class='del'>-		write_sysreg_s(vcpu-&gt;arch.vsesr_el2, SYS_VSESR_EL2);</div><div class='add'>+		/*</div><div class='add'>+		 * When HCR_EL2.AMO is set, physical SErrors are taken to EL2</div><div class='add'>+		 * and vSError injection is enabled for EL1. Conveniently, for</div><div class='add'>+		 * NV this means that it is never the case where a 'physical'</div><div class='add'>+		 * SError (injected by KVM or userspace) and vSError are</div><div class='add'>+		 * deliverable to the same context.</div><div class='add'>+		 *</div><div class='add'>+		 * As such, we can trivially select between the host or guest's</div><div class='add'>+		 * VSESR_EL2. Except for the case that FEAT_RAS hasn't been</div><div class='add'>+		 * exposed to the guest, where ESR propagation in hardware</div><div class='add'>+		 * occurs unconditionally.</div><div class='add'>+		 *</div><div class='add'>+		 * Paper over the architectural wart and use an IMPLEMENTATION</div><div class='add'>+		 * DEFINED ESR value in case FEAT_RAS is hidden from the guest.</div><div class='add'>+		 */</div><div class='add'>+		if (!vserror_state_is_nested(vcpu))</div><div class='add'>+			vsesr = vcpu-&gt;arch.vsesr_el2;</div><div class='add'>+		else if (kvm_has_ras(kern_hyp_va(vcpu-&gt;kvm)))</div><div class='add'>+			vsesr = __vcpu_sys_reg(vcpu, VSESR_EL2);</div><div class='add'>+		else</div><div class='add'>+			vsesr = ESR_ELx_ISV;</div><div class='add'>+</div><div class='add'>+		write_sysreg_s(vsesr, SYS_VSESR_EL2);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void ___deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	u64 *hcr;</div><div class='add'>+</div><div class='add'>+	if (vserror_state_is_nested(vcpu))</div><div class='add'>+		hcr = __ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, HCR_EL2);</div><div class='add'>+	else</div><div class='add'>+		hcr = &amp;vcpu-&gt;arch.hcr_el2;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we pended a virtual abort, preserve it until it gets</div><div class='ctx'> 	 * cleared. See D1.14.3 (Virtual Interrupts) for details, but</div><div class='ctx'> 	 * the crucial bit is "On taking a vSError interrupt,</div><div class='ctx'> 	 * HCR_EL2.VSE is cleared to 0."</div><div class='add'>+	 *</div><div class='add'>+	 * Additionally, when in a nested context we need to propagate the</div><div class='add'>+	 * updated state to the guest hypervisor's HCR_EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu-&gt;arch.hcr_el2 &amp; HCR_VSE) {</div><div class='del'>-		vcpu-&gt;arch.hcr_el2 &amp;= ~HCR_VSE;</div><div class='del'>-		vcpu-&gt;arch.hcr_el2 |= read_sysreg(hcr_el2) &amp; HCR_VSE;</div><div class='add'>+	if (*hcr &amp; HCR_VSE) {</div><div class='add'>+		*hcr &amp;= ~HCR_VSE;</div><div class='add'>+		*hcr |= read_sysreg(hcr_el2) &amp; HCR_VSE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -295,7 +529,7 @@ static inline bool __populate_fault_info(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return __get_fault_info(vcpu-&gt;arch.fault.esr_el2, &amp;vcpu-&gt;arch.fault);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_mops(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_mops(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	*vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);</div><div class='ctx'> 	arm64_mops_reset_regs(vcpu_gp_regs(vcpu), vcpu-&gt;arch.fault.esr_el2);</div><div class='hunk'>@@ -327,7 +561,7 @@ static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * nested guest, as the guest hypervisor could select a smaller VL. Slap</div><div class='ctx'> 	 * that into hardware before wrapping up.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu))</div><div class='add'>+	if (is_nested_ctxt(vcpu))</div><div class='ctx'> 		sve_cond_update_zcr_vq(__vcpu_sys_reg(vcpu, ZCR_EL2), SYS_ZCR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	write_sysreg_el1(__vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)), SYS_ZCR);</div><div class='hunk'>@@ -344,7 +578,82 @@ static inline void __hyp_sve_save_host(void)</div><div class='ctx'> 			 true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kvm_hyp_save_fpsimd_host(struct kvm_vcpu *vcpu);</div><div class='add'>+static inline void fpsimd_lazy_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 zcr_el1, zcr_el2;</div><div class='add'>+</div><div class='add'>+	if (!guest_owns_fp_regs())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (vcpu_has_sve(vcpu)) {</div><div class='add'>+		/* A guest hypervisor may restrict the effective max VL. */</div><div class='add'>+		if (is_nested_ctxt(vcpu))</div><div class='add'>+			zcr_el2 = __vcpu_sys_reg(vcpu, ZCR_EL2);</div><div class='add'>+		else</div><div class='add'>+			zcr_el2 = vcpu_sve_max_vq(vcpu) - 1;</div><div class='add'>+</div><div class='add'>+		write_sysreg_el2(zcr_el2, SYS_ZCR);</div><div class='add'>+</div><div class='add'>+		zcr_el1 = __vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu));</div><div class='add'>+		write_sysreg_el1(zcr_el1, SYS_ZCR);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fpsimd_lazy_switch_to_host(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 zcr_el1, zcr_el2;</div><div class='add'>+</div><div class='add'>+	if (!guest_owns_fp_regs())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When the guest owns the FP regs, we know that guest+hyp traps for</div><div class='add'>+	 * any FPSIMD/SVE/SME features exposed to the guest have been disabled</div><div class='add'>+	 * by either fpsimd_lazy_switch_to_guest() or kvm_hyp_handle_fpsimd()</div><div class='add'>+	 * prior to __guest_entry(). As __guest_entry() guarantees a context</div><div class='add'>+	 * synchronization event, we don't need an ISB here to avoid taking</div><div class='add'>+	 * traps for anything that was exposed to the guest.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_has_sve(vcpu)) {</div><div class='add'>+		zcr_el1 = read_sysreg_el1(SYS_ZCR);</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu), zcr_el1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The guest's state is always saved using the guest's max VL.</div><div class='add'>+		 * Ensure that the host has the guest's max VL active such that</div><div class='add'>+		 * the host can save the guest's state lazily, but don't</div><div class='add'>+		 * artificially restrict the host to the guest's max VL.</div><div class='add'>+		 */</div><div class='add'>+		if (has_vhe()) {</div><div class='add'>+			zcr_el2 = vcpu_sve_max_vq(vcpu) - 1;</div><div class='add'>+			write_sysreg_el2(zcr_el2, SYS_ZCR);</div><div class='add'>+		} else {</div><div class='add'>+			zcr_el2 = sve_vq_from_vl(kvm_host_sve_max_vl) - 1;</div><div class='add'>+			write_sysreg_el2(zcr_el2, SYS_ZCR);</div><div class='add'>+</div><div class='add'>+			zcr_el1 = vcpu_sve_max_vq(vcpu) - 1;</div><div class='add'>+			write_sysreg_el1(zcr_el1, SYS_ZCR);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_hyp_save_fpsimd_host(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Non-protected kvm relies on the host restoring its sve state.</div><div class='add'>+	 * Protected kvm restores the host's sve state as not to reveal that</div><div class='add'>+	 * fpsimd was used by a guest nor leak upper sve bits.</div><div class='add'>+	 */</div><div class='add'>+	if (system_supports_sve()) {</div><div class='add'>+		__hyp_sve_save_host();</div><div class='add'>+	} else {</div><div class='add'>+		__fpsimd_save_state(host_data_ptr(host_ctxt.fp_regs));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kvm_has_fpmr(kern_hyp_va(vcpu-&gt;kvm)))</div><div class='add'>+		*host_data_ptr(fpmr) = read_sysreg_s(SYS_FPMR);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We trap the first access to the FP/SIMD to save the host context and</div><div class='hunk'>@@ -352,7 +661,7 @@ static void kvm_hyp_save_fpsimd_host(struct kvm_vcpu *vcpu);</div><div class='ctx'>  * If FP/SIMD is not implemented, handle the trap and inject an undefined</div><div class='ctx'>  * instruction exception to the guest. Similarly for trapped SVE accesses.</div><div class='ctx'>  */</div><div class='del'>-static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	bool sve_guest;</div><div class='ctx'> 	u8 esr_ec;</div><div class='hunk'>@@ -387,14 +696,11 @@ static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	/* Valid trap.  Switch the context: */</div><div class='ctx'> </div><div class='ctx'> 	/* First disable enough traps to allow us to update the registers */</div><div class='del'>-	if (sve_guest || (is_protected_kvm_enabled() &amp;&amp; system_supports_sve()))</div><div class='del'>-		cpacr_clear_set(0, CPACR_ELx_FPEN | CPACR_ELx_ZEN);</div><div class='del'>-	else</div><div class='del'>-		cpacr_clear_set(0, CPACR_ELx_FPEN);</div><div class='add'>+	__deactivate_cptr_traps(vcpu);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	/* Write out the host state if it's in the registers */</div><div class='del'>-	if (host_owns_fp_regs())</div><div class='add'>+	if (is_protected_kvm_enabled() &amp;&amp; host_owns_fp_regs())</div><div class='ctx'> 		kvm_hyp_save_fpsimd_host(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore the guest state */</div><div class='hunk'>@@ -412,6 +718,13 @@ static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> </div><div class='ctx'> 	*host_data_ptr(fp_owner) = FP_STATE_GUEST_OWNED;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Re-enable traps necessary for the current state of the guest, e.g.</div><div class='add'>+	 * those enabled by a guest hypervisor. The ERET to the guest will</div><div class='add'>+	 * provide the necessary context synchronization.</div><div class='add'>+	 */</div><div class='add'>+	__activate_cptr_traps(vcpu);</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -470,7 +783,25 @@ static inline bool handle_tx2_tvm(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_cntpct(struct kvm_vcpu *vcpu)</div><div class='add'>+/* Open-coded version of timer_get_offset() to allow for kern_hyp_va() */</div><div class='add'>+static inline u64 hyp_timer_get_offset(struct arch_timer_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	u64 offset = 0;</div><div class='add'>+</div><div class='add'>+	if (ctxt-&gt;offset.vm_offset)</div><div class='add'>+		offset += *kern_hyp_va(ctxt-&gt;offset.vm_offset);</div><div class='add'>+	if (ctxt-&gt;offset.vcpu_offset)</div><div class='add'>+		offset += *kern_hyp_va(ctxt-&gt;offset.vcpu_offset);</div><div class='add'>+</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 compute_counter_value(struct arch_timer_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	return arch_timer_read_cntpct_el0() - hyp_timer_get_offset(ctxt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_handle_cntxct(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct arch_timer_context *ctxt;</div><div class='ctx'> 	u32 sysreg;</div><div class='hunk'>@@ -480,18 +811,19 @@ static bool kvm_hyp_handle_cntpct(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * We only get here for 64bit guests, 32bit guests will hit</div><div class='ctx'> 	 * the long and winding road all the way to the standard</div><div class='ctx'> 	 * handling. Yes, it sucks to be irrelevant.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, we only deal with non-hypervisor context here (either</div><div class='add'>+	 * an EL1 guest, or a non-HYP context of an EL2 guest).</div><div class='ctx'> 	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	sysreg = esr_sys64_to_sysreg(kvm_vcpu_get_esr(vcpu));</div><div class='ctx'> </div><div class='ctx'> 	switch (sysreg) {</div><div class='ctx'> 	case SYS_CNTPCT_EL0:</div><div class='ctx'> 	case SYS_CNTPCTSS_EL0:</div><div class='ctx'> 		if (vcpu_has_nv(vcpu)) {</div><div class='del'>-			if (is_hyp_ctxt(vcpu)) {</div><div class='del'>-				ctxt = vcpu_hptimer(vcpu);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='ctx'> 			/* Check for guest hypervisor trapping */</div><div class='ctx'> 			val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);</div><div class='ctx'> 			if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='hunk'>@@ -503,16 +835,23 @@ static bool kvm_hyp_handle_cntpct(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 		ctxt = vcpu_ptimer(vcpu);</div><div class='ctx'> 		break;</div><div class='add'>+	case SYS_CNTVCT_EL0:</div><div class='add'>+	case SYS_CNTVCTSS_EL0:</div><div class='add'>+		if (vcpu_has_nv(vcpu)) {</div><div class='add'>+			/* Check for guest hypervisor trapping */</div><div class='add'>+			val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);</div><div class='add'>+</div><div class='add'>+			if (val &amp; CNTHCTL_EL1TVCT)</div><div class='add'>+				return false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ctxt = vcpu_vtimer(vcpu);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	val = arch_timer_read_cntpct_el0();</div><div class='del'>-</div><div class='del'>-	if (ctxt-&gt;offset.vm_offset)</div><div class='del'>-		val -= *kern_hyp_va(ctxt-&gt;offset.vm_offset);</div><div class='del'>-	if (ctxt-&gt;offset.vcpu_offset)</div><div class='del'>-		val -= *kern_hyp_va(ctxt-&gt;offset.vcpu_offset);</div><div class='add'>+	val = compute_counter_value(ctxt);</div><div class='ctx'> </div><div class='ctx'> 	vcpu_set_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu), val);</div><div class='ctx'> 	__kvm_skip_instr(vcpu);</div><div class='hunk'>@@ -543,7 +882,7 @@ static bool handle_ampere1_tcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM) &amp;&amp;</div><div class='ctx'> 	    handle_tx2_tvm(vcpu))</div><div class='hunk'>@@ -557,13 +896,13 @@ static bool kvm_hyp_handle_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	    __vgic_v3_perform_cpuif_access(vcpu) == 1)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	if (kvm_hyp_handle_cntpct(vcpu))</div><div class='add'>+	if (kvm_handle_cntxct(vcpu))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_cp15_32(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_cp15_32(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	if (static_branch_unlikely(&amp;vgic_v3_cpuif_trap) &amp;&amp;</div><div class='ctx'> 	    __vgic_v3_perform_cpuif_access(vcpu) == 1)</div><div class='hunk'>@@ -572,19 +911,18 @@ static bool kvm_hyp_handle_cp15_32(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_memory_fault(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_memory_fault(struct kvm_vcpu *vcpu,</div><div class='add'>+					       u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	if (!__populate_fault_info(vcpu))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='del'>-static bool kvm_hyp_handle_iabt_low(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='del'>-	__alias(kvm_hyp_handle_memory_fault);</div><div class='del'>-static bool kvm_hyp_handle_watchpt_low(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='del'>-	__alias(kvm_hyp_handle_memory_fault);</div><div class='add'>+#define kvm_hyp_handle_iabt_low		kvm_hyp_handle_memory_fault</div><div class='add'>+#define kvm_hyp_handle_watchpt_low	kvm_hyp_handle_memory_fault</div><div class='ctx'> </div><div class='del'>-static bool kvm_hyp_handle_dabt_low(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_dabt_low(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_hyp_handle_memory_fault(vcpu, exit_code))</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -614,23 +952,16 @@ static bool kvm_hyp_handle_dabt_low(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> </div><div class='ctx'> typedef bool (*exit_handler_fn)(struct kvm_vcpu *, u64 *);</div><div class='ctx'> </div><div class='del'>-static const exit_handler_fn *kvm_get_exit_handler_array(struct kvm_vcpu *vcpu);</div><div class='del'>-</div><div class='del'>-static void early_exit_filter(struct kvm_vcpu *vcpu, u64 *exit_code);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Allow the hypervisor to handle the exit with an exit handler if it has one.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns true if the hypervisor handled the exit, and control should go back</div><div class='ctx'>  * to the guest, or false if it hasn't.</div><div class='ctx'>  */</div><div class='del'>-static inline bool kvm_hyp_handle_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool kvm_hyp_handle_exit(struct kvm_vcpu *vcpu, u64 *exit_code,</div><div class='add'>+				       const exit_handler_fn *handlers)</div><div class='ctx'> {</div><div class='del'>-	const exit_handler_fn *handlers = kvm_get_exit_handler_array(vcpu);</div><div class='del'>-	exit_handler_fn fn;</div><div class='del'>-</div><div class='del'>-	fn = handlers[kvm_vcpu_trap_get_class(vcpu)];</div><div class='del'>-</div><div class='add'>+	exit_handler_fn fn = handlers[kvm_vcpu_trap_get_class(vcpu)];</div><div class='ctx'> 	if (fn)</div><div class='ctx'> 		return fn(vcpu, exit_code);</div><div class='ctx'> </div><div class='hunk'>@@ -660,20 +991,9 @@ static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu, u64 *exit_code</div><div class='ctx'>  * the guest, false when we should restore the host state and return to the</div><div class='ctx'>  * main run loop.</div><div class='ctx'>  */</div><div class='del'>-static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool __fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code,</div><div class='add'>+				      const exit_handler_fn *handlers)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Save PSTATE early so that we can evaluate the vcpu mode</div><div class='del'>-	 * early on.</div><div class='del'>-	 */</div><div class='del'>-	synchronize_vcpu_pstate(vcpu, exit_code);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check whether we want to repaint the state one way or</div><div class='del'>-	 * another.</div><div class='del'>-	 */</div><div class='del'>-	early_exit_filter(vcpu, exit_code);</div><div class='del'>-</div><div class='ctx'> 	if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)</div><div class='ctx'> 		vcpu-&gt;arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR);</div><div class='ctx'> </div><div class='hunk'>@@ -703,7 +1023,7 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if there's an exit handler and allow it to handle the exit. */</div><div class='del'>-	if (kvm_hyp_handle_exit(vcpu, exit_code))</div><div class='add'>+	if (kvm_hyp_handle_exit(vcpu, exit_code, handlers))</div><div class='ctx'> 		goto guest;</div><div class='ctx'> exit:</div><div class='ctx'> 	/* Return to the host kernel and handle the exit */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h<br/>index 1579a3c08a36..a17cbe7582de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h</a></div><div class='hunk'>@@ -18,9 +18,45 @@</div><div class='ctx'> </div><div class='ctx'> static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt);</div><div class='ctx'> </div><div class='add'>+static inline struct kvm_vcpu *ctxt_to_vcpu(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = ctxt-&gt;__hyp_running_vcpu;</div><div class='add'>+</div><div class='add'>+	if (!vcpu)</div><div class='add'>+		vcpu = container_of(ctxt, struct kvm_vcpu, arch.ctxt);</div><div class='add'>+</div><div class='add'>+	return vcpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ctxt_is_guest(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	return host_data_ptr(host_ctxt) != ctxt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 *ctxt_mdscr_el1(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = ctxt_to_vcpu(ctxt);</div><div class='add'>+</div><div class='add'>+	if (ctxt_is_guest(ctxt) &amp;&amp; kvm_host_owns_debug_regs(vcpu))</div><div class='add'>+		return &amp;vcpu-&gt;arch.external_mdscr_el1;</div><div class='add'>+</div><div class='add'>+	return &amp;ctxt_sys_reg(ctxt, MDSCR_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 ctxt_midr_el1(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kern_hyp_va(ctxt_to_vcpu(ctxt)-&gt;kvm);</div><div class='add'>+</div><div class='add'>+	if (!(ctxt_is_guest(ctxt) &amp;&amp;</div><div class='add'>+	      test_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &amp;kvm-&gt;arch.flags)))</div><div class='add'>+		return read_cpuid_id();</div><div class='add'>+</div><div class='add'>+	return kvm_read_vm_id_reg(kvm, SYS_MIDR_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void __sysreg_save_common_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='del'>-	ctxt_sys_reg(ctxt, MDSCR_EL1)	= read_sysreg(mdscr_el1);</div><div class='add'>+	*ctxt_mdscr_el1(ctxt)	= read_sysreg(mdscr_el1);</div><div class='ctx'> </div><div class='ctx'> 	// POR_EL0 can affect uaccess, so must be saved/restored early.</div><div class='ctx'> 	if (ctxt_has_s1poe(ctxt))</div><div class='hunk'>@@ -33,16 +69,6 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	ctxt_sys_reg(ctxt, TPIDRRO_EL0)	= read_sysreg(tpidrro_el0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct kvm_vcpu *ctxt_to_vcpu(struct kvm_cpu_context *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct kvm_vcpu *vcpu = ctxt-&gt;__hyp_running_vcpu;</div><div class='del'>-</div><div class='del'>-	if (!vcpu)</div><div class='del'>-		vcpu = container_of(ctxt, struct kvm_vcpu, arch.ctxt);</div><div class='del'>-</div><div class='del'>-	return vcpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = ctxt_to_vcpu(ctxt);</div><div class='hunk'>@@ -58,7 +84,7 @@ static inline bool ctxt_has_s1pie(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	vcpu = ctxt_to_vcpu(ctxt);</div><div class='del'>-	return kvm_has_feat(kern_hyp_va(vcpu-&gt;kvm), ID_AA64MMFR3_EL1, S1PIE, IMP);</div><div class='add'>+	return kvm_has_s1pie(kern_hyp_va(vcpu-&gt;kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ctxt_has_tcrx(struct kvm_cpu_context *ctxt)</div><div class='hunk'>@@ -69,7 +95,7 @@ static inline bool ctxt_has_tcrx(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	vcpu = ctxt_to_vcpu(ctxt);</div><div class='del'>-	return kvm_has_feat(kern_hyp_va(vcpu-&gt;kvm), ID_AA64MMFR3_EL1, TCRX, IMP);</div><div class='add'>+	return kvm_has_tcr2(kern_hyp_va(vcpu-&gt;kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt)</div><div class='hunk'>@@ -80,7 +106,29 @@ static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	vcpu = ctxt_to_vcpu(ctxt);</div><div class='del'>-	return kvm_has_feat(kern_hyp_va(vcpu-&gt;kvm), ID_AA64MMFR3_EL1, S1POE, IMP);</div><div class='add'>+	return kvm_has_s1poe(kern_hyp_va(vcpu-&gt;kvm));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ctxt_has_ras(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	vcpu = ctxt_to_vcpu(ctxt);</div><div class='add'>+	return kvm_has_ras(kern_hyp_va(vcpu-&gt;kvm));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ctxt_has_sctlr2(struct kvm_cpu_context *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_SCTLR2))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	vcpu = ctxt_to_vcpu(ctxt);</div><div class='add'>+	return kvm_has_sctlr2(kern_hyp_va(vcpu-&gt;kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)</div><div class='hunk'>@@ -121,6 +169,9 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	ctxt_sys_reg(ctxt, SP_EL1)	= read_sysreg(sp_el1);</div><div class='ctx'> 	ctxt_sys_reg(ctxt, ELR_EL1)	= read_sysreg_el1(SYS_ELR);</div><div class='ctx'> 	ctxt_sys_reg(ctxt, SPSR_EL1)	= read_sysreg_el1(SYS_SPSR);</div><div class='add'>+</div><div class='add'>+	if (ctxt_has_sctlr2(ctxt))</div><div class='add'>+		ctxt_sys_reg(ctxt, SCTLR2_EL1) = read_sysreg_el1(SYS_SCTLR2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)</div><div class='hunk'>@@ -133,13 +184,18 @@ static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	if (!has_vhe() &amp;&amp; ctxt-&gt;__hyp_running_vcpu)</div><div class='ctx'> 		ctxt-&gt;regs.pstate	= read_sysreg_el2(SYS_SPSR);</div><div class='ctx'> </div><div class='del'>-	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!vserror_state_is_nested(ctxt_to_vcpu(ctxt)))</div><div class='ctx'> 		ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2);</div><div class='add'>+	else if (ctxt_has_ras(ctxt))</div><div class='add'>+		ctxt_sys_reg(ctxt, VDISR_EL2) = read_sysreg_s(SYS_VDISR_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1),  mdscr_el1);</div><div class='add'>+	write_sysreg(*ctxt_mdscr_el1(ctxt),  mdscr_el1);</div><div class='ctx'> </div><div class='ctx'> 	// POR_EL0 can affect uaccess, so must be saved/restored early.</div><div class='ctx'> 	if (ctxt_has_s1poe(ctxt))</div><div class='hunk'>@@ -152,9 +208,11 @@ static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0),	tpidrro_el0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)</div><div class='add'>+static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt,</div><div class='add'>+					      u64 midr, u64 mpidr)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg(ctxt_sys_reg(ctxt, MPIDR_EL1),	vmpidr_el2);</div><div class='add'>+	write_sysreg(midr,				vpidr_el2);</div><div class='add'>+	write_sysreg(mpidr,				vmpidr_el2);</div><div class='ctx'> </div><div class='ctx'> 	if (has_vhe() ||</div><div class='ctx'> 	    !cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {</div><div class='hunk'>@@ -224,6 +282,9 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)</div><div class='ctx'> 	write_sysreg(ctxt_sys_reg(ctxt, SP_EL1),	sp_el1);</div><div class='ctx'> 	write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1),	SYS_ELR);</div><div class='ctx'> 	write_sysreg_el1(ctxt_sys_reg(ctxt, SPSR_EL1),	SYS_SPSR);</div><div class='add'>+</div><div class='add'>+	if (ctxt_has_sctlr2(ctxt))</div><div class='add'>+		write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR2_EL1), SYS_SCTLR2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read the VCPU state's PSTATE, but translate (v)EL2 to EL1. */</div><div class='hunk'>@@ -247,6 +308,7 @@ static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctx</div><div class='ctx'> {</div><div class='ctx'> 	u64 pstate = to_hw_pstate(ctxt);</div><div class='ctx'> 	u64 mode = pstate &amp; PSR_AA32_MODE_MASK;</div><div class='add'>+	u64 vdisr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Safety check to ensure we're setting the CPU up to enter the guest</div><div class='hunk'>@@ -265,8 +327,17 @@ static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctx</div><div class='ctx'> 	write_sysreg_el2(ctxt-&gt;regs.pc,			SYS_ELR);</div><div class='ctx'> 	write_sysreg_el2(pstate,			SYS_SPSR);</div><div class='ctx'> </div><div class='del'>-	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='del'>-		write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2);</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!vserror_state_is_nested(ctxt_to_vcpu(ctxt)))</div><div class='add'>+		vdisr = ctxt_sys_reg(ctxt, DISR_EL1);</div><div class='add'>+	else if (ctxt_has_ras(ctxt))</div><div class='add'>+		vdisr = ctxt_sys_reg(ctxt, VDISR_EL2);</div><div class='add'>+	else</div><div class='add'>+		vdisr = 0;</div><div class='add'>+</div><div class='add'>+	write_sysreg_s(vdisr, SYS_VDISR_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -279,11 +350,11 @@ static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vcpu-&gt;arch.ctxt.spsr_irq = read_sysreg(spsr_irq);</div><div class='ctx'> 	vcpu-&gt;arch.ctxt.spsr_fiq = read_sysreg(spsr_fiq);</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2);</div><div class='del'>-	__vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, DACR32_EL2, read_sysreg(dacr32_el2));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, IFSR32_EL2, read_sysreg(ifsr32_el2));</div><div class='ctx'> </div><div class='del'>-	if (has_vhe() || vcpu_get_flag(vcpu, DEBUG_DIRTY))</div><div class='del'>-		__vcpu_sys_reg(vcpu, DBGVCR32_EL2) = read_sysreg(dbgvcr32_el2);</div><div class='add'>+	if (has_vhe() || kvm_debug_regs_in_use(vcpu))</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, DBGVCR32_EL2, read_sysreg(dbgvcr32_el2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __sysreg32_restore_state(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -299,7 +370,7 @@ static inline void __sysreg32_restore_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2);</div><div class='ctx'> 	write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2);</div><div class='ctx'> </div><div class='del'>-	if (has_vhe() || vcpu_get_flag(vcpu, DEBUG_DIRTY))</div><div class='add'>+	if (has_vhe() || kvm_debug_regs_in_use(vcpu))</div><div class='ctx'> 		write_sysreg(__vcpu_sys_reg(vcpu, DBGVCR32_EL2), dbgvcr32_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h b/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h<br/>deleted file mode 100644<br/>index f957890c7e38..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/fixed_config.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2021 Google LLC</div><div class='del'>- * Author: Fuad Tabba &lt;tabba@google.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ARM64_KVM_FIXED_CONFIG_H__</div><div class='del'>-#define __ARM64_KVM_FIXED_CONFIG_H__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sysreg.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This file contains definitions for features to be allowed or restricted for</div><div class='del'>- * guest virtual machines, depending on the mode KVM is running in and on the</div><div class='del'>- * type of guest that is running.</div><div class='del'>- *</div><div class='del'>- * The ALLOW masks represent a bitmask of feature fields that are allowed</div><div class='del'>- * without any restrictions as long as they are supported by the system.</div><div class='del'>- *</div><div class='del'>- * The RESTRICT_UNSIGNED masks, if present, represent unsigned fields for</div><div class='del'>- * features that are restricted to support at most the specified feature.</div><div class='del'>- *</div><div class='del'>- * If a feature field is not present in either, than it is not supported.</div><div class='del'>- *</div><div class='del'>- * The approach taken for protected VMs is to allow features that are:</div><div class='del'>- * - Needed by common Linux distributions (e.g., floating point)</div><div class='del'>- * - Trivial to support, e.g., supporting the feature does not introduce or</div><div class='del'>- * require tracking of additional state in KVM</div><div class='del'>- * - Cannot be trapped or prevent the guest from using anyway</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allow for protected VMs:</div><div class='del'>- * - Floating-point and Advanced SIMD</div><div class='del'>- * - Data Independent Timing</div><div class='del'>- * - Spectre/Meltdown Mitigation</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64PFR0_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_FP) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AdvSIMD) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_DIT) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restrict to the following *unsigned* features for protected VMs:</div><div class='del'>- * - AArch64 guests only (no support for AArch32 guests):</div><div class='del'>- *	AArch32 adds complexity in trap handling, emulation, condition codes,</div><div class='del'>- *	etc...</div><div class='del'>- * - RAS (v1)</div><div class='del'>- *	Supported by KVM</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64PFR0_RESTRICT_UNSIGNED (\</div><div class='del'>-	SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL0, IMP) | \</div><div class='del'>-	SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL1, IMP) | \</div><div class='del'>-	SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL2, IMP) | \</div><div class='del'>-	SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL3, IMP) | \</div><div class='del'>-	SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, RAS, IMP) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allow for protected VMs:</div><div class='del'>- * - Branch Target Identification</div><div class='del'>- * - Speculative Store Bypassing</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64PFR1_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_BT) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SSBS) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-#define PVM_ID_AA64PFR2_ALLOW 0ULL</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allow for protected VMs:</div><div class='del'>- * - Mixed-endian</div><div class='del'>- * - Distinction between Secure and Non-secure Memory</div><div class='del'>- * - Mixed-endian at EL0 only</div><div class='del'>- * - Non-context synchronizing exception entry and exit</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64MMFR0_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_BIGEND) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_SNSMEM) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_BIGENDEL0) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_EXS) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restrict to the following *unsigned* features for protected VMs:</div><div class='del'>- * - 40-bit IPA</div><div class='del'>- * - 16-bit ASID</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64MMFR0_RESTRICT_UNSIGNED (\</div><div class='del'>-	FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_PARANGE), ID_AA64MMFR0_EL1_PARANGE_40) | \</div><div class='del'>-	FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_ASIDBITS), ID_AA64MMFR0_EL1_ASIDBITS_16) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allow for protected VMs:</div><div class='del'>- * - Hardware translation table updates to Access flag and Dirty state</div><div class='del'>- * - Number of VMID bits from CPU</div><div class='del'>- * - Hierarchical Permission Disables</div><div class='del'>- * - Privileged Access Never</div><div class='del'>- * - SError interrupt exceptions from speculative reads</div><div class='del'>- * - Enhanced Translation Synchronization</div><div class='del'>- * - Control for cache maintenance permission</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64MMFR1_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_HAFDBS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_VMIDBits) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_HPDS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_PAN) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_SpecSEI) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_ETS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_CMOW) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allow for protected VMs:</div><div class='del'>- * - Common not Private translations</div><div class='del'>- * - User Access Override</div><div class='del'>- * - IESB bit in the SCTLR_ELx registers</div><div class='del'>- * - Unaligned single-copy atomicity and atomic functions</div><div class='del'>- * - ESR_ELx.EC value on an exception by read access to feature ID space</div><div class='del'>- * - TTL field in address operations.</div><div class='del'>- * - Break-before-make sequences when changing translation block size</div><div class='del'>- * - E0PDx mechanism</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64MMFR2_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_CnP) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_UAO) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_IESB) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_AT) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_IDS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_TTL) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_BBM) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64MMFR2_EL1_E0PD) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-#define PVM_ID_AA64MMFR3_ALLOW (0ULL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * No support for Scalable Vectors for protected VMs:</div><div class='del'>- *	Requires additional support from KVM, e.g., context-switching and</div><div class='del'>- *	trapping at EL2</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64ZFR0_ALLOW (0ULL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * No support for debug, including breakpoints, and watchpoints for protected</div><div class='del'>- * VMs:</div><div class='del'>- *	The Arm architecture mandates support for at least the Armv8 debug</div><div class='del'>- *	architecture, which would include at least 2 hardware breakpoints and</div><div class='del'>- *	watchpoints. Providing that support to protected guests adds</div><div class='del'>- *	considerable state and complexity. Therefore, the reserved value of 0 is</div><div class='del'>- *	used for debug-related fields.</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64DFR0_ALLOW (0ULL)</div><div class='del'>-#define PVM_ID_AA64DFR1_ALLOW (0ULL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * No support for implementation defined features.</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64AFR0_ALLOW (0ULL)</div><div class='del'>-#define PVM_ID_AA64AFR1_ALLOW (0ULL)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * No restrictions on instructions implemented in AArch64.</div><div class='del'>- */</div><div class='del'>-#define PVM_ID_AA64ISAR0_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_AES) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_SHA1) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_SHA2) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_CRC32) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_ATOMIC) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_RDM) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_SHA3) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_SM3) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_SM4) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_DP) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_FHM) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_TS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_TLB) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_RNDR) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-/* Restrict pointer authentication to the basic version. */</div><div class='del'>-#define PVM_ID_AA64ISAR1_RESTRICT_UNSIGNED (\</div><div class='del'>-	FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA), ID_AA64ISAR1_EL1_APA_PAuth) | \</div><div class='del'>-	FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API), ID_AA64ISAR1_EL1_API_PAuth) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-#define PVM_ID_AA64ISAR2_RESTRICT_UNSIGNED (\</div><div class='del'>-	FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3), ID_AA64ISAR2_EL1_APA3_PAuth) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-#define PVM_ID_AA64ISAR1_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_DPB) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_JSCVT) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_FCMA) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_LRCPC) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_FRINTTS) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_SB) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_SPECRES) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_BF16) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_DGH) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_I8MM) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-#define PVM_ID_AA64ISAR2_ALLOW (\</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_ATS1A)| \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3) | \</div><div class='del'>-	ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_MOPS) \</div><div class='del'>-	)</div><div class='del'>-</div><div class='del'>-u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id);</div><div class='del'>-bool kvm_handle_pvm_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code);</div><div class='del'>-bool kvm_handle_pvm_restricted(struct kvm_vcpu *vcpu, u64 *exit_code);</div><div class='del'>-int kvm_check_pvm_sysreg_table(void);</div><div class='del'>-</div><div class='del'>-#endif /* __ARM64_KVM_FIXED_CONFIG_H__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/gfp.h b/arch/arm64/kvm/hyp/include/nvhe/gfp.h<br/>index 97c527ef53c2..3766333bace9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/gfp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/gfp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/gfp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/gfp.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;nvhe/memory.h&gt;</div><div class='ctx'> #include &lt;nvhe/spinlock.h&gt;</div><div class='ctx'> </div><div class='del'>-#define HYP_NO_ORDER	USHRT_MAX</div><div class='add'>+#define HYP_NO_ORDER	((u8)(~0))</div><div class='ctx'> </div><div class='ctx'> struct hyp_pool {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -19,11 +19,11 @@ struct hyp_pool {</div><div class='ctx'> 	struct list_head free_area[NR_PAGE_ORDERS];</div><div class='ctx'> 	phys_addr_t range_start;</div><div class='ctx'> 	phys_addr_t range_end;</div><div class='del'>-	unsigned short max_order;</div><div class='add'>+	u8 max_order;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Allocation */</div><div class='del'>-void *hyp_alloc_pages(struct hyp_pool *pool, unsigned short order);</div><div class='add'>+void *hyp_alloc_pages(struct hyp_pool *pool, u8 order);</div><div class='ctx'> void hyp_split_page(struct hyp_page *page);</div><div class='ctx'> void hyp_get_page(struct hyp_pool *pool, void *addr);</div><div class='ctx'> void hyp_put_page(struct hyp_pool *pool, void *addr);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h<br/>index 0972faccc2af..5f9d56754e39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a></div><div class='hunk'>@@ -11,40 +11,10 @@</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/virt.h&gt;</div><div class='add'>+#include &lt;nvhe/memory.h&gt;</div><div class='ctx'> #include &lt;nvhe/pkvm.h&gt;</div><div class='ctx'> #include &lt;nvhe/spinlock.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * SW bits 0-1 are reserved to track the memory ownership state of each page:</div><div class='del'>- *   00: The page is owned exclusively by the page-table owner.</div><div class='del'>- *   01: The page is owned by the page-table owner, but is shared</div><div class='del'>- *       with another entity.</div><div class='del'>- *   10: The page is shared with, but not owned by the page-table owner.</div><div class='del'>- *   11: Reserved for future use (lending).</div><div class='del'>- */</div><div class='del'>-enum pkvm_page_state {</div><div class='del'>-	PKVM_PAGE_OWNED			= 0ULL,</div><div class='del'>-	PKVM_PAGE_SHARED_OWNED		= KVM_PGTABLE_PROT_SW0,</div><div class='del'>-	PKVM_PAGE_SHARED_BORROWED	= KVM_PGTABLE_PROT_SW1,</div><div class='del'>-	__PKVM_PAGE_RESERVED		= KVM_PGTABLE_PROT_SW0 |</div><div class='del'>-					  KVM_PGTABLE_PROT_SW1,</div><div class='del'>-</div><div class='del'>-	/* Meta-states which aren't encoded directly in the PTE's SW bits */</div><div class='del'>-	PKVM_NOPAGE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PKVM_PAGE_STATE_PROT_MASK	(KVM_PGTABLE_PROT_SW0 | KVM_PGTABLE_PROT_SW1)</div><div class='del'>-static inline enum kvm_pgtable_prot pkvm_mkstate(enum kvm_pgtable_prot prot,</div><div class='del'>-						 enum pkvm_page_state state)</div><div class='del'>-{</div><div class='del'>-	return (prot &amp; ~PKVM_PAGE_STATE_PROT_MASK) | state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline enum pkvm_page_state pkvm_getstate(enum kvm_pgtable_prot prot)</div><div class='del'>-{</div><div class='del'>-	return prot &amp; PKVM_PAGE_STATE_PROT_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct host_mmu {</div><div class='ctx'> 	struct kvm_arch arch;</div><div class='ctx'> 	struct kvm_pgtable pgt;</div><div class='hunk'>@@ -69,6 +39,13 @@ int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_hyp_donate_host(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_host_share_ffa(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_host_unshare_ffa(u64 pfn, u64 nr_pages);</div><div class='add'>+int __pkvm_host_share_guest(u64 pfn, u64 gfn, u64 nr_pages, struct pkvm_hyp_vcpu *vcpu,</div><div class='add'>+			    enum kvm_pgtable_prot prot);</div><div class='add'>+int __pkvm_host_unshare_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *hyp_vm);</div><div class='add'>+int __pkvm_host_relax_perms_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu, enum kvm_pgtable_prot prot);</div><div class='add'>+int __pkvm_host_wrprotect_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *hyp_vm);</div><div class='add'>+int __pkvm_host_test_clear_young_guest(u64 gfn, u64 nr_pages, bool mkold, struct pkvm_hyp_vm *vm);</div><div class='add'>+int __pkvm_host_mkyoung_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> bool addr_is_memory(phys_addr_t phys);</div><div class='ctx'> int host_stage2_idmap_locked(phys_addr_t addr, u64 size, enum kvm_pgtable_prot prot);</div><div class='hunk'>@@ -79,7 +56,7 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt);</div><div class='ctx'> </div><div class='ctx'> int hyp_pin_shared_mem(void *from, void *to);</div><div class='ctx'> void hyp_unpin_shared_mem(void *from, void *to);</div><div class='del'>-void reclaim_guest_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc);</div><div class='add'>+void reclaim_pgtable_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc);</div><div class='ctx'> int refill_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages,</div><div class='ctx'> 		    struct kvm_hyp_memcache *host_mc);</div><div class='ctx'> </div><div class='hunk'>@@ -90,4 +67,10 @@ static __always_inline void __load_host_stage2(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		write_sysreg(0, vttbr_el2);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+void pkvm_ownership_selftest(void *base);</div><div class='add'>+#else</div><div class='add'>+static inline void pkvm_ownership_selftest(void *base) { }</div><div class='add'>+#endif</div><div class='ctx'> #endif /* __KVM_NVHE_MEM_PROTECT__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/memory.h b/arch/arm64/kvm/hyp/include/nvhe/memory.h<br/>index ab205c4d6774..dee1a406b0c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a></div><div class='hunk'>@@ -7,9 +7,61 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Bits 0-1 are used to encode the memory ownership state of each page from the</div><div class='add'>+ * point of view of a pKVM "component" (host, hyp, guest, ... see enum</div><div class='add'>+ * pkvm_component_id):</div><div class='add'>+ *   00: The page is owned and exclusively accessible by the component;</div><div class='add'>+ *   01: The page is owned and accessible by the component, but is also</div><div class='add'>+ *       accessible by another component;</div><div class='add'>+ *   10: The page is accessible but not owned by the component;</div><div class='add'>+ * The storage of this state depends on the component: either in the</div><div class='add'>+ * hyp_vmemmap for the host and hyp states or in PTE software bits for guests.</div><div class='add'>+ */</div><div class='add'>+enum pkvm_page_state {</div><div class='add'>+	PKVM_PAGE_OWNED			= 0ULL,</div><div class='add'>+	PKVM_PAGE_SHARED_OWNED		= BIT(0),</div><div class='add'>+	PKVM_PAGE_SHARED_BORROWED	= BIT(1),</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 'Meta-states' are not stored directly in PTE SW bits for guest</div><div class='add'>+	 * states, but inferred from the context (e.g. invalid PTE entries).</div><div class='add'>+	 * For the host and hyp, meta-states are stored directly in the</div><div class='add'>+	 * struct hyp_page.</div><div class='add'>+	 */</div><div class='add'>+	PKVM_NOPAGE			= BIT(0) | BIT(1),</div><div class='add'>+};</div><div class='add'>+#define PKVM_PAGE_STATE_MASK		(BIT(0) | BIT(1))</div><div class='add'>+</div><div class='add'>+#define PKVM_PAGE_STATE_PROT_MASK	(KVM_PGTABLE_PROT_SW0 | KVM_PGTABLE_PROT_SW1)</div><div class='add'>+static inline enum kvm_pgtable_prot pkvm_mkstate(enum kvm_pgtable_prot prot,</div><div class='add'>+						 enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	prot &amp;= ~PKVM_PAGE_STATE_PROT_MASK;</div><div class='add'>+	prot |= FIELD_PREP(PKVM_PAGE_STATE_PROT_MASK, state);</div><div class='add'>+	return prot;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline enum pkvm_page_state pkvm_getstate(enum kvm_pgtable_prot prot)</div><div class='add'>+{</div><div class='add'>+	return FIELD_GET(PKVM_PAGE_STATE_PROT_MASK, prot);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct hyp_page {</div><div class='del'>-	unsigned short refcount;</div><div class='del'>-	unsigned short order;</div><div class='add'>+	u16 refcount;</div><div class='add'>+	u8 order;</div><div class='add'>+</div><div class='add'>+	/* Host state. Guarded by the host stage-2 lock. */</div><div class='add'>+	unsigned __host_state : 4;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Complement of the hyp state. Guarded by the hyp stage-1 lock. We use</div><div class='add'>+	 * the complement so that the initial 0 in __hyp_state_comp (due to the</div><div class='add'>+	 * entire vmemmap starting off zeroed) encodes PKVM_NOPAGE.</div><div class='add'>+	 */</div><div class='add'>+	unsigned __hyp_state_comp : 4;</div><div class='add'>+</div><div class='add'>+	u32 host_share_guest_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern u64 __hyp_vmemmap;</div><div class='hunk'>@@ -29,7 +81,13 @@ static inline phys_addr_t hyp_virt_to_phys(void *addr)</div><div class='ctx'> </div><div class='ctx'> #define hyp_phys_to_pfn(phys)	((phys) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define hyp_pfn_to_phys(pfn)	((phys_addr_t)((pfn) &lt;&lt; PAGE_SHIFT))</div><div class='del'>-#define hyp_phys_to_page(phys)	(&amp;hyp_vmemmap[hyp_phys_to_pfn(phys)])</div><div class='add'>+</div><div class='add'>+static inline struct hyp_page *hyp_phys_to_page(phys_addr_t phys)</div><div class='add'>+{</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct hyp_page) != sizeof(u64));</div><div class='add'>+	return &amp;hyp_vmemmap[hyp_phys_to_pfn(phys)];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define hyp_virt_to_page(virt)	hyp_phys_to_page(__hyp_pa(virt))</div><div class='ctx'> #define hyp_virt_to_pfn(virt)	hyp_phys_to_pfn(__hyp_pa(virt))</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +96,26 @@ static inline phys_addr_t hyp_virt_to_phys(void *addr)</div><div class='ctx'> #define hyp_page_to_virt(page)	__hyp_va(hyp_page_to_phys(page))</div><div class='ctx'> #define hyp_page_to_pool(page)	(((struct hyp_page *)page)-&gt;pool)</div><div class='ctx'> </div><div class='add'>+static inline enum pkvm_page_state get_host_state(struct hyp_page *p)</div><div class='add'>+{</div><div class='add'>+	return p-&gt;__host_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_host_state(struct hyp_page *p, enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	p-&gt;__host_state = state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline enum pkvm_page_state get_hyp_state(struct hyp_page *p)</div><div class='add'>+{</div><div class='add'>+	return p-&gt;__hyp_state_comp ^ PKVM_PAGE_STATE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_hyp_state(struct hyp_page *p, enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	p-&gt;__hyp_state_comp = state ^ PKVM_PAGE_STATE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Refcounting for 'struct hyp_page'.</div><div class='ctx'>  * hyp_pool::lock must be held if atomic access to the refcount is required.</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/mm.h b/arch/arm64/kvm/hyp/include/nvhe/mm.h<br/>index 230e4f2527de..6e83ce35c2f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/mm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/mm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a></div><div class='hunk'>@@ -13,9 +13,11 @@</div><div class='ctx'> extern struct kvm_pgtable pkvm_pgtable;</div><div class='ctx'> extern hyp_spinlock_t pkvm_pgd_lock;</div><div class='ctx'> </div><div class='del'>-int hyp_create_pcpu_fixmap(void);</div><div class='add'>+int hyp_create_fixmap(void);</div><div class='ctx'> void *hyp_fixmap_map(phys_addr_t phys);</div><div class='ctx'> void hyp_fixmap_unmap(void);</div><div class='add'>+void *hyp_fixblock_map(phys_addr_t phys, size_t *size);</div><div class='add'>+void hyp_fixblock_unmap(void);</div><div class='ctx'> </div><div class='ctx'> int hyp_create_idmap(u32 hyp_va_bits);</div><div class='ctx'> int hyp_map_vectors(void);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h<br/>index 24a9a8330d19..184ad7a39950 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/pkvm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/pkvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/pkvm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/pkvm.h</a></div><div class='hunk'>@@ -20,10 +20,16 @@ struct pkvm_hyp_vcpu {</div><div class='ctx'> </div><div class='ctx'> 	/* Backpointer to the host's (untrusted) vCPU instance. */</div><div class='ctx'> 	struct kvm_vcpu *host_vcpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this hyp vCPU is loaded, then this is a backpointer to the</div><div class='add'>+	 * per-cpu pointer tracking us. Otherwise, NULL if not loaded.</div><div class='add'>+	 */</div><div class='add'>+	struct pkvm_hyp_vcpu **loaded_hyp_vcpu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Holds the relevant data for running a protected vm.</div><div class='add'>+ * Holds the relevant data for running a vm in protected mode.</div><div class='ctx'>  */</div><div class='ctx'> struct pkvm_hyp_vm {</div><div class='ctx'> 	struct kvm kvm;</div><div class='hunk'>@@ -37,16 +43,12 @@ struct pkvm_hyp_vm {</div><div class='ctx'> 	struct hyp_pool pool;</div><div class='ctx'> 	hyp_spinlock_t lock;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The number of vcpus initialized and ready to run.</div><div class='del'>-	 * Modifying this is protected by 'vm_table_lock'.</div><div class='del'>-	 */</div><div class='del'>-	unsigned int nr_vcpus;</div><div class='del'>-</div><div class='ctx'> 	/* Array of the hyp vCPU structures for this VM. */</div><div class='ctx'> 	struct pkvm_hyp_vcpu *vcpus[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern hyp_spinlock_t vm_table_lock;</div><div class='add'>+</div><div class='ctx'> static inline struct pkvm_hyp_vm *</div><div class='ctx'> pkvm_hyp_vcpu_to_hyp_vm(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -58,8 +60,15 @@ static inline bool pkvm_hyp_vcpu_is_protected(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> 	return vcpu_is_protected(&amp;hyp_vcpu-&gt;vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool pkvm_hyp_vm_is_protected(struct pkvm_hyp_vm *hyp_vm)</div><div class='add'>+{</div><div class='add'>+	return kvm_vm_is_protected(&amp;hyp_vm-&gt;kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void pkvm_hyp_vm_table_init(void *tbl);</div><div class='ctx'> </div><div class='add'>+int __pkvm_reserve_vm(void);</div><div class='add'>+void __pkvm_unreserve_vm(pkvm_handle_t handle);</div><div class='ctx'> int __pkvm_init_vm(struct kvm *host_kvm, unsigned long vm_hva,</div><div class='ctx'> 		   unsigned long pgd_hva);</div><div class='ctx'> int __pkvm_init_vcpu(pkvm_handle_t handle, struct kvm_vcpu *host_vcpu,</div><div class='hunk'>@@ -69,5 +78,15 @@ int __pkvm_teardown_vm(pkvm_handle_t handle);</div><div class='ctx'> struct pkvm_hyp_vcpu *pkvm_load_hyp_vcpu(pkvm_handle_t handle,</div><div class='ctx'> 					 unsigned int vcpu_idx);</div><div class='ctx'> void pkvm_put_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu);</div><div class='add'>+struct pkvm_hyp_vcpu *pkvm_get_loaded_hyp_vcpu(void);</div><div class='add'>+</div><div class='add'>+struct pkvm_hyp_vm *get_pkvm_hyp_vm(pkvm_handle_t handle);</div><div class='add'>+struct pkvm_hyp_vm *get_np_pkvm_hyp_vm(pkvm_handle_t handle);</div><div class='add'>+void put_pkvm_hyp_vm(struct pkvm_hyp_vm *hyp_vm);</div><div class='add'>+</div><div class='add'>+bool kvm_handle_pvm_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code);</div><div class='add'>+bool kvm_handle_pvm_restricted(struct kvm_vcpu *vcpu, u64 *exit_code);</div><div class='add'>+void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_check_pvm_sysreg_table(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARM64_KVM_NVHE_PKVM_H__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h b/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h<br/>index 45a84f0ade04..ba5382c12787 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/include/nvhe/trap_handler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/include/nvhe/trap_handler.h</a></div><div class='hunk'>@@ -12,9 +12,8 @@</div><div class='ctx'> #include &lt;asm/kvm_host.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define cpu_reg(ctxt, r)	(ctxt)-&gt;regs.regs[r]</div><div class='del'>-#define DECLARE_REG(type, name, ctxt, reg)	\</div><div class='add'>+#define DECLARE_REG(type, name, ctxt, reg)					\</div><div class='add'>+				__always_unused int ___check_reg_ ## reg;	\</div><div class='ctx'> 				type name = (type)cpu_reg(ctxt, (reg))</div><div class='ctx'> </div><div class='del'>-void __pkvm_vcpu_init_traps(struct kvm_vcpu *vcpu);</div><div class='del'>-</div><div class='ctx'> #endif /* __ARM64_KVM_NVHE_TRAP_HANDLER_H__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/Makefile b/arch/arm64/kvm/hyp/nvhe/Makefile<br/>index b43426a493df..a244ec25f8c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/Makefile</a></div><div class='hunk'>@@ -12,7 +12,7 @@ asflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS</div><div class='ctx'> ccflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS -D__DISABLE_TRACE_MMIO__</div><div class='ctx'> ccflags-y += -fno-stack-protector	\</div><div class='ctx'> 	     -DDISABLE_BRANCH_PROFILING	\</div><div class='del'>-	     $(DISABLE_STACKLEAK_PLUGIN)</div><div class='add'>+	     $(DISABLE_KSTACK_ERASE)</div><div class='ctx'> </div><div class='ctx'> hostprogs := gen-hyprel</div><div class='ctx'> HOST_EXTRACFLAGS += -I$(objtree)/include</div><div class='hunk'>@@ -27,6 +27,7 @@ hyp-obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o hyp-init.o host.o</div><div class='ctx'> 	 cache.o setup.o mm.o mem_protect.o sys_regs.o pkvm.o stacktrace.o ffa.o</div><div class='ctx'> hyp-obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \</div><div class='ctx'> 	 ../fpsimd.o ../hyp-entry.o ../exception.o ../pgtable.o</div><div class='add'>+hyp-obj-y += ../../../kernel/smccc-call.o</div><div class='ctx'> hyp-obj-$(CONFIG_LIST_HARDENED) += list_debug.o</div><div class='ctx'> hyp-obj-y += $(lib-objs)</div><div class='ctx'> </div><div class='hunk'>@@ -99,3 +100,9 @@ KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS), $(KBUILD_CFLAG</div><div class='ctx'> # causes a build failure. Remove profile optimization flags.</div><div class='ctx'> KBUILD_CFLAGS := $(filter-out -fprofile-sample-use=% -fprofile-use=%, $(KBUILD_CFLAGS))</div><div class='ctx'> KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables</div><div class='add'>+</div><div class='add'>+ifeq ($(CONFIG_UBSAN_KVM_EL2),y)</div><div class='add'>+UBSAN_SANITIZE := y</div><div class='add'>+# Always use brk and not hooks</div><div class='add'>+ccflags-y += $(CFLAGS_UBSAN_TRAP)</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c<br/>index 53efda0235cf..2a1c0f49792b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/debug-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/debug-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/debug-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/debug-sr.c</a></div><div class='hunk'>@@ -51,42 +51,85 @@ static void __debug_restore_spe(u64 pmscr_el1)</div><div class='ctx'> 	write_sysreg_el1(pmscr_el1, SYS_PMSCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __debug_save_trace(u64 *trfcr_el1)</div><div class='add'>+static void __trace_do_switch(u64 *saved_trfcr, u64 new_trfcr)</div><div class='ctx'> {</div><div class='del'>-	*trfcr_el1 = 0;</div><div class='add'>+	*saved_trfcr = read_sysreg_el1(SYS_TRFCR);</div><div class='add'>+	write_sysreg_el1(new_trfcr, SYS_TRFCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __trace_needs_drain(void)</div><div class='add'>+{</div><div class='add'>+	if (is_protected_kvm_enabled() &amp;&amp; host_data_test_flag(HAS_TRBE))</div><div class='add'>+		return read_sysreg_s(SYS_TRBLIMITR_EL1) &amp; TRBLIMITR_EL1_E;</div><div class='add'>+</div><div class='add'>+	return host_data_test_flag(TRBE_ENABLED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __trace_needs_switch(void)</div><div class='add'>+{</div><div class='add'>+	return host_data_test_flag(TRBE_ENABLED) ||</div><div class='add'>+	       host_data_test_flag(EL1_TRACING_CONFIGURED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __trace_switch_to_guest(void)</div><div class='add'>+{</div><div class='add'>+	/* Unsupported with TRBE so disable */</div><div class='add'>+	if (host_data_test_flag(TRBE_ENABLED))</div><div class='add'>+		*host_data_ptr(trfcr_while_in_guest) = 0;</div><div class='add'>+</div><div class='add'>+	__trace_do_switch(host_data_ptr(host_debug_state.trfcr_el1),</div><div class='add'>+			  *host_data_ptr(trfcr_while_in_guest));</div><div class='add'>+</div><div class='add'>+	if (__trace_needs_drain()) {</div><div class='add'>+		isb();</div><div class='add'>+		tsb_csync();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Check if the TRBE is enabled */</div><div class='del'>-	if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) &amp; TRBLIMITR_EL1_E))</div><div class='add'>+static void __trace_switch_to_host(void)</div><div class='add'>+{</div><div class='add'>+	__trace_do_switch(host_data_ptr(trfcr_while_in_guest),</div><div class='add'>+			  *host_data_ptr(host_debug_state.trfcr_el1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __debug_save_brbe(u64 *brbcr_el1)</div><div class='add'>+{</div><div class='add'>+	*brbcr_el1 = 0;</div><div class='add'>+</div><div class='add'>+	/* Check if the BRBE is enabled */</div><div class='add'>+	if (!(read_sysreg_el1(SYS_BRBCR) &amp; (BRBCR_ELx_E0BRE | BRBCR_ELx_ExBRE)))</div><div class='ctx'> 		return;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='del'>-	 * Prohibit trace generation while we are in guest.</div><div class='del'>-	 * Since access to TRFCR_EL1 is trapped, the guest can't</div><div class='add'>+	 * Prohibit branch record generation while we are in guest.</div><div class='add'>+	 * Since access to BRBCR_EL1 is trapped, the guest can't</div><div class='ctx'> 	 * modify the filtering set by the host.</div><div class='ctx'> 	 */</div><div class='del'>-	*trfcr_el1 = read_sysreg_el1(SYS_TRFCR);</div><div class='del'>-	write_sysreg_el1(0, SYS_TRFCR);</div><div class='del'>-	isb();</div><div class='del'>-	/* Drain the trace buffer to memory */</div><div class='del'>-	tsb_csync();</div><div class='add'>+	*brbcr_el1 = read_sysreg_el1(SYS_BRBCR);</div><div class='add'>+	write_sysreg_el1(0, SYS_BRBCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __debug_restore_trace(u64 trfcr_el1)</div><div class='add'>+static void __debug_restore_brbe(u64 brbcr_el1)</div><div class='ctx'> {</div><div class='del'>-	if (!trfcr_el1)</div><div class='add'>+	if (!brbcr_el1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* Restore trace filter controls */</div><div class='del'>-	write_sysreg_el1(trfcr_el1, SYS_TRFCR);</div><div class='add'>+	/* Restore BRBE controls */</div><div class='add'>+	write_sysreg_el1(brbcr_el1, SYS_BRBCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	/* Disable and flush SPE data generation */</div><div class='del'>-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))</div><div class='add'>+	if (host_data_test_flag(HAS_SPE))</div><div class='ctx'> 		__debug_save_spe(host_data_ptr(host_debug_state.pmscr_el1));</div><div class='del'>-	/* Disable and flush Self-Hosted Trace generation */</div><div class='del'>-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))</div><div class='del'>-		__debug_save_trace(host_data_ptr(host_debug_state.trfcr_el1));</div><div class='add'>+</div><div class='add'>+	/* Disable BRBE branch records */</div><div class='add'>+	if (host_data_test_flag(HAS_BRBE))</div><div class='add'>+		__debug_save_brbe(host_data_ptr(host_debug_state.brbcr_el1));</div><div class='add'>+</div><div class='add'>+	if (__trace_needs_switch())</div><div class='add'>+		__trace_switch_to_guest();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __debug_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -96,18 +139,15 @@ void __debug_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))</div><div class='add'>+	if (host_data_test_flag(HAS_SPE))</div><div class='ctx'> 		__debug_restore_spe(*host_data_ptr(host_debug_state.pmscr_el1));</div><div class='del'>-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))</div><div class='del'>-		__debug_restore_trace(*host_data_ptr(host_debug_state.trfcr_el1));</div><div class='add'>+	if (host_data_test_flag(HAS_BRBE))</div><div class='add'>+		__debug_restore_brbe(*host_data_ptr(host_debug_state.brbcr_el1));</div><div class='add'>+	if (__trace_needs_switch())</div><div class='add'>+		__trace_switch_to_host();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __debug_switch_to_host(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	__debug_switch_to_host_common(vcpu);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-u64 __kvm_get_mdcr_el2(void)</div><div class='del'>-{</div><div class='del'>-	return read_sysreg(mdcr_el2);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/ffa.c b/arch/arm64/kvm/hyp/nvhe/ffa.c<br/>index e433dfab882a..4e16f9b96f63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/ffa.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/ffa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/ffa.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/ffa.c</a></div><div class='hunk'>@@ -71,36 +71,68 @@ static u32 hyp_ffa_version;</div><div class='ctx'> static bool has_version_negotiated;</div><div class='ctx'> static hyp_spinlock_t version_lock;</div><div class='ctx'> </div><div class='del'>-static void ffa_to_smccc_error(struct arm_smccc_res *res, u64 ffa_errno)</div><div class='add'>+static void ffa_to_smccc_error(struct arm_smccc_1_2_regs *res, u64 ffa_errno)</div><div class='ctx'> {</div><div class='del'>-	*res = (struct arm_smccc_res) {</div><div class='add'>+	*res = (struct arm_smccc_1_2_regs) {</div><div class='ctx'> 		.a0	= FFA_ERROR,</div><div class='ctx'> 		.a2	= ffa_errno,</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_to_smccc_res_prop(struct arm_smccc_res *res, int ret, u64 prop)</div><div class='add'>+static void ffa_to_smccc_res_prop(struct arm_smccc_1_2_regs *res, int ret, u64 prop)</div><div class='ctx'> {</div><div class='ctx'> 	if (ret == FFA_RET_SUCCESS) {</div><div class='del'>-		*res = (struct arm_smccc_res) { .a0 = FFA_SUCCESS,</div><div class='del'>-						.a2 = prop };</div><div class='add'>+		*res = (struct arm_smccc_1_2_regs) { .a0 = FFA_SUCCESS,</div><div class='add'>+						      .a2 = prop };</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ffa_to_smccc_error(res, ret);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_to_smccc_res(struct arm_smccc_res *res, int ret)</div><div class='add'>+static void ffa_to_smccc_res(struct arm_smccc_1_2_regs *res, int ret)</div><div class='ctx'> {</div><div class='ctx'> 	ffa_to_smccc_res_prop(res, ret, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ffa_set_retval(struct kvm_cpu_context *ctxt,</div><div class='del'>-			   struct arm_smccc_res *res)</div><div class='add'>+			   struct arm_smccc_1_2_regs *res)</div><div class='ctx'> {</div><div class='ctx'> 	cpu_reg(ctxt, 0) = res-&gt;a0;</div><div class='ctx'> 	cpu_reg(ctxt, 1) = res-&gt;a1;</div><div class='ctx'> 	cpu_reg(ctxt, 2) = res-&gt;a2;</div><div class='ctx'> 	cpu_reg(ctxt, 3) = res-&gt;a3;</div><div class='add'>+	cpu_reg(ctxt, 4) = res-&gt;a4;</div><div class='add'>+	cpu_reg(ctxt, 5) = res-&gt;a5;</div><div class='add'>+	cpu_reg(ctxt, 6) = res-&gt;a6;</div><div class='add'>+	cpu_reg(ctxt, 7) = res-&gt;a7;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DEN0028C 2.6: SMC32/HVC32 call from aarch64 must preserve x8-x30.</div><div class='add'>+	 *</div><div class='add'>+	 * In FF-A 1.2, we cannot rely on the function ID sent by the caller to</div><div class='add'>+	 * detect 32-bit calls because the CPU cycle management interfaces (e.g.</div><div class='add'>+	 * FFA_MSG_WAIT, FFA_RUN) are 32-bit only but can have 64-bit responses.</div><div class='add'>+	 *</div><div class='add'>+	 * FFA-1.3 introduces 64-bit variants of the CPU cycle management</div><div class='add'>+	 * interfaces. Moreover, FF-A 1.3 clarifies that SMC32 direct requests</div><div class='add'>+	 * complete with SMC32 direct reponses which *should* allow us use the</div><div class='add'>+	 * function ID sent by the caller to determine whether to return x8-x17.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that we also cannot rely on function IDs in the response.</div><div class='add'>+	 *</div><div class='add'>+	 * Given the above, assume SMC64 and send back x0-x17 unconditionally</div><div class='add'>+	 * as the passthrough code (__kvm_hyp_host_forward_smc) does the same.</div><div class='add'>+	 */</div><div class='add'>+	cpu_reg(ctxt, 8) = res-&gt;a8;</div><div class='add'>+	cpu_reg(ctxt, 9) = res-&gt;a9;</div><div class='add'>+	cpu_reg(ctxt, 10) = res-&gt;a10;</div><div class='add'>+	cpu_reg(ctxt, 11) = res-&gt;a11;</div><div class='add'>+	cpu_reg(ctxt, 12) = res-&gt;a12;</div><div class='add'>+	cpu_reg(ctxt, 13) = res-&gt;a13;</div><div class='add'>+	cpu_reg(ctxt, 14) = res-&gt;a14;</div><div class='add'>+	cpu_reg(ctxt, 15) = res-&gt;a15;</div><div class='add'>+	cpu_reg(ctxt, 16) = res-&gt;a16;</div><div class='add'>+	cpu_reg(ctxt, 17) = res-&gt;a17;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_ffa_call(u64 func_id)</div><div class='hunk'>@@ -113,82 +145,92 @@ static bool is_ffa_call(u64 func_id)</div><div class='ctx'> </div><div class='ctx'> static int ffa_map_hyp_buffers(u64 ffa_page_count)</div><div class='ctx'> {</div><div class='del'>-	struct arm_smccc_res res;</div><div class='add'>+	struct arm_smccc_1_2_regs res;</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_FN64_RXTX_MAP,</div><div class='del'>-			  hyp_virt_to_phys(hyp_buffers.tx),</div><div class='del'>-			  hyp_virt_to_phys(hyp_buffers.rx),</div><div class='del'>-			  ffa_page_count,</div><div class='del'>-			  0, 0, 0, 0,</div><div class='del'>-			  &amp;res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_FN64_RXTX_MAP,</div><div class='add'>+		.a1 = hyp_virt_to_phys(hyp_buffers.tx),</div><div class='add'>+		.a2 = hyp_virt_to_phys(hyp_buffers.rx),</div><div class='add'>+		.a3 = ffa_page_count,</div><div class='add'>+	}, &amp;res);</div><div class='ctx'> </div><div class='ctx'> 	return res.a0 == FFA_SUCCESS ? FFA_RET_SUCCESS : res.a2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ffa_unmap_hyp_buffers(void)</div><div class='ctx'> {</div><div class='del'>-	struct arm_smccc_res res;</div><div class='add'>+	struct arm_smccc_1_2_regs res;</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_RXTX_UNMAP,</div><div class='del'>-			  HOST_FFA_ID,</div><div class='del'>-			  0, 0, 0, 0, 0, 0,</div><div class='del'>-			  &amp;res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_RXTX_UNMAP,</div><div class='add'>+		.a1 = HOST_FFA_ID,</div><div class='add'>+	}, &amp;res);</div><div class='ctx'> </div><div class='ctx'> 	return res.a0 == FFA_SUCCESS ? FFA_RET_SUCCESS : res.a2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_mem_frag_tx(struct arm_smccc_res *res, u32 handle_lo,</div><div class='add'>+static void ffa_mem_frag_tx(struct arm_smccc_1_2_regs *res, u32 handle_lo,</div><div class='ctx'> 			     u32 handle_hi, u32 fraglen, u32 endpoint_id)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(FFA_MEM_FRAG_TX,</div><div class='del'>-			  handle_lo, handle_hi, fraglen, endpoint_id,</div><div class='del'>-			  0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_MEM_FRAG_TX,</div><div class='add'>+		.a1 = handle_lo,</div><div class='add'>+		.a2 = handle_hi,</div><div class='add'>+		.a3 = fraglen,</div><div class='add'>+		.a4 = endpoint_id,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_mem_frag_rx(struct arm_smccc_res *res, u32 handle_lo,</div><div class='add'>+static void ffa_mem_frag_rx(struct arm_smccc_1_2_regs *res, u32 handle_lo,</div><div class='ctx'> 			     u32 handle_hi, u32 fragoff)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(FFA_MEM_FRAG_RX,</div><div class='del'>-			  handle_lo, handle_hi, fragoff, HOST_FFA_ID,</div><div class='del'>-			  0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_MEM_FRAG_RX,</div><div class='add'>+		.a1 = handle_lo,</div><div class='add'>+		.a2 = handle_hi,</div><div class='add'>+		.a3 = fragoff,</div><div class='add'>+		.a4 = HOST_FFA_ID,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_mem_xfer(struct arm_smccc_res *res, u64 func_id, u32 len,</div><div class='add'>+static void ffa_mem_xfer(struct arm_smccc_1_2_regs *res, u64 func_id, u32 len,</div><div class='ctx'> 			  u32 fraglen)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(func_id, len, fraglen,</div><div class='del'>-			  0, 0, 0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = func_id,</div><div class='add'>+		.a1 = len,</div><div class='add'>+		.a2 = fraglen,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_mem_reclaim(struct arm_smccc_res *res, u32 handle_lo,</div><div class='add'>+static void ffa_mem_reclaim(struct arm_smccc_1_2_regs *res, u32 handle_lo,</div><div class='ctx'> 			     u32 handle_hi, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(FFA_MEM_RECLAIM,</div><div class='del'>-			  handle_lo, handle_hi, flags,</div><div class='del'>-			  0, 0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_MEM_RECLAIM,</div><div class='add'>+		.a1 = handle_lo,</div><div class='add'>+		.a2 = handle_hi,</div><div class='add'>+		.a3 = flags,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_retrieve_req(struct arm_smccc_res *res, u32 len)</div><div class='add'>+static void ffa_retrieve_req(struct arm_smccc_1_2_regs *res, u32 len)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(FFA_FN64_MEM_RETRIEVE_REQ,</div><div class='del'>-			  len, len,</div><div class='del'>-			  0, 0, 0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_FN64_MEM_RETRIEVE_REQ,</div><div class='add'>+		.a1 = len,</div><div class='add'>+		.a2 = len,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ffa_rx_release(struct arm_smccc_res *res)</div><div class='add'>+static void ffa_rx_release(struct arm_smccc_1_2_regs *res)</div><div class='ctx'> {</div><div class='del'>-	arm_smccc_1_1_smc(FFA_RX_RELEASE,</div><div class='del'>-			  0, 0,</div><div class='del'>-			  0, 0, 0, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_RX_RELEASE,</div><div class='add'>+	}, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_ffa_rxtx_map(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_rxtx_map(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			    struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(phys_addr_t, tx, ctxt, 1);</div><div class='hunk'>@@ -267,7 +309,7 @@ err_unmap:</div><div class='ctx'> 	goto out_unlock;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_ffa_rxtx_unmap(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_rxtx_unmap(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			      struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, id, ctxt, 1);</div><div class='hunk'>@@ -368,7 +410,7 @@ static int ffa_host_unshare_ranges(struct ffa_mem_region_addr_range *ranges,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_ffa_mem_frag_tx(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_mem_frag_tx(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			       struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, handle_lo, ctxt, 1);</div><div class='hunk'>@@ -427,7 +469,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __do_ffa_mem_xfer(const u64 func_id,</div><div class='del'>-			      struct arm_smccc_res *res,</div><div class='add'>+			      struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			      struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, len, ctxt, 1);</div><div class='hunk'>@@ -521,7 +563,7 @@ err_unshare:</div><div class='ctx'> 		__do_ffa_mem_xfer((fid), (res), (ctxt));	\</div><div class='ctx'> 	} while (0);</div><div class='ctx'> </div><div class='del'>-static void do_ffa_mem_reclaim(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_mem_reclaim(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			       struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, handle_lo, ctxt, 1);</div><div class='hunk'>@@ -628,13 +670,26 @@ static bool ffa_call_supported(u64 func_id)</div><div class='ctx'> 	case FFA_RXTX_MAP:</div><div class='ctx'> 	case FFA_MEM_DONATE:</div><div class='ctx'> 	case FFA_MEM_RETRIEVE_REQ:</div><div class='add'>+       /* Optional notification interfaces added in FF-A 1.1 */</div><div class='add'>+	case FFA_NOTIFICATION_BITMAP_CREATE:</div><div class='add'>+	case FFA_NOTIFICATION_BITMAP_DESTROY:</div><div class='add'>+	case FFA_NOTIFICATION_BIND:</div><div class='add'>+	case FFA_NOTIFICATION_UNBIND:</div><div class='add'>+	case FFA_NOTIFICATION_SET:</div><div class='add'>+	case FFA_NOTIFICATION_GET:</div><div class='add'>+	case FFA_NOTIFICATION_INFO_GET:</div><div class='add'>+	/* Optional interfaces added in FF-A 1.2 */</div><div class='add'>+	case FFA_MSG_SEND_DIRECT_REQ2:		/* Optional per 7.5.1 */</div><div class='add'>+	case FFA_MSG_SEND_DIRECT_RESP2:		/* Optional per 7.5.1 */</div><div class='add'>+	case FFA_CONSOLE_LOG:			/* Optional per 13.1: not in Table 13.1 */</div><div class='add'>+	case FFA_PARTITION_INFO_GET_REGS:	/* Optional for virtual instances per 13.1 */</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool do_ffa_features(struct arm_smccc_res *res,</div><div class='add'>+static bool do_ffa_features(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			    struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, id, ctxt, 1);</div><div class='hunk'>@@ -666,21 +721,25 @@ out_handled:</div><div class='ctx'> static int hyp_ffa_post_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	size_t min_rxtx_sz;</div><div class='del'>-	struct arm_smccc_res res;</div><div class='add'>+	struct arm_smccc_1_2_regs res;</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_ID_GET, 0, 0, 0, 0, 0, 0, 0, &amp;res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs){</div><div class='add'>+		.a0 = FFA_ID_GET,</div><div class='add'>+	}, &amp;res);</div><div class='ctx'> 	if (res.a0 != FFA_SUCCESS)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (res.a2 != HOST_FFA_ID)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_FEATURES, FFA_FN64_RXTX_MAP,</div><div class='del'>-			  0, 0, 0, 0, 0, 0, &amp;res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs){</div><div class='add'>+		.a0 = FFA_FEATURES,</div><div class='add'>+		.a1 = FFA_FN64_RXTX_MAP,</div><div class='add'>+	}, &amp;res);</div><div class='ctx'> 	if (res.a0 != FFA_SUCCESS)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	switch (res.a2) {</div><div class='add'>+	switch (res.a2 &amp; FFA_FEAT_RXTX_MIN_SZ_MASK) {</div><div class='ctx'> 	case FFA_FEAT_RXTX_MIN_SZ_4K:</div><div class='ctx'> 		min_rxtx_sz = SZ_4K;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -700,7 +759,7 @@ static int hyp_ffa_post_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_ffa_version(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_version(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			   struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, ffa_req_version, ctxt, 1);</div><div class='hunk'>@@ -712,7 +771,10 @@ static void do_ffa_version(struct arm_smccc_res *res,</div><div class='ctx'> </div><div class='ctx'> 	hyp_spin_lock(&amp;version_lock);</div><div class='ctx'> 	if (has_version_negotiated) {</div><div class='del'>-		res-&gt;a0 = hyp_ffa_version;</div><div class='add'>+		if (FFA_MINOR_VERSION(ffa_req_version) &lt; FFA_MINOR_VERSION(hyp_ffa_version))</div><div class='add'>+			res-&gt;a0 = FFA_RET_NOT_SUPPORTED;</div><div class='add'>+		else</div><div class='add'>+			res-&gt;a0 = hyp_ffa_version;</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -721,26 +783,27 @@ static void do_ffa_version(struct arm_smccc_res *res,</div><div class='ctx'> 	 * first if TEE supports it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (FFA_MINOR_VERSION(ffa_req_version) &lt; FFA_MINOR_VERSION(hyp_ffa_version)) {</div><div class='del'>-		arm_smccc_1_1_smc(FFA_VERSION, ffa_req_version, 0,</div><div class='del'>-				  0, 0, 0, 0, 0,</div><div class='del'>-				  res);</div><div class='add'>+		arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+			.a0 = FFA_VERSION,</div><div class='add'>+			.a1 = ffa_req_version,</div><div class='add'>+		}, res);</div><div class='ctx'> 		if (res-&gt;a0 == FFA_RET_NOT_SUPPORTED)</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> </div><div class='ctx'> 		hyp_ffa_version = ffa_req_version;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hyp_ffa_post_init())</div><div class='add'>+	if (hyp_ffa_post_init()) {</div><div class='ctx'> 		res-&gt;a0 = FFA_RET_NOT_SUPPORTED;</div><div class='del'>-	else {</div><div class='del'>-		has_version_negotiated = true;</div><div class='add'>+	} else {</div><div class='add'>+		smp_store_release(&amp;has_version_negotiated, true);</div><div class='ctx'> 		res-&gt;a0 = hyp_ffa_version;</div><div class='ctx'> 	}</div><div class='ctx'> unlock:</div><div class='ctx'> 	hyp_spin_unlock(&amp;version_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_ffa_part_get(struct arm_smccc_res *res,</div><div class='add'>+static void do_ffa_part_get(struct arm_smccc_1_2_regs *res,</div><div class='ctx'> 			    struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u32, uuid0, ctxt, 1);</div><div class='hunk'>@@ -756,9 +819,14 @@ static void do_ffa_part_get(struct arm_smccc_res *res,</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_PARTITION_INFO_GET, uuid0, uuid1,</div><div class='del'>-			  uuid2, uuid3, flags, 0, 0,</div><div class='del'>-			  res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_PARTITION_INFO_GET,</div><div class='add'>+		.a1 = uuid0,</div><div class='add'>+		.a2 = uuid1,</div><div class='add'>+		.a3 = uuid2,</div><div class='add'>+		.a4 = uuid3,</div><div class='add'>+		.a5 = flags,</div><div class='add'>+	}, res);</div><div class='ctx'> </div><div class='ctx'> 	if (res-&gt;a0 != FFA_SUCCESS)</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -791,7 +859,7 @@ out_unlock:</div><div class='ctx'> </div><div class='ctx'> bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)</div><div class='ctx'> {</div><div class='del'>-	struct arm_smccc_res res;</div><div class='add'>+	struct arm_smccc_1_2_regs res;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * There's no way we can tell what a non-standard SMC call might</div><div class='hunk'>@@ -809,7 +877,8 @@ bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)</div><div class='ctx'> 	if (!is_ffa_call(func_id))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!has_version_negotiated &amp;&amp; func_id != FFA_VERSION) {</div><div class='add'>+	if (func_id != FFA_VERSION &amp;&amp;</div><div class='add'>+	    !smp_load_acquire(&amp;has_version_negotiated)) {</div><div class='ctx'> 		ffa_to_smccc_error(&amp;res, FFA_RET_INVALID_PARAMETERS);</div><div class='ctx'> 		goto out_handled;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -859,13 +928,16 @@ out_handled:</div><div class='ctx'> </div><div class='ctx'> int hyp_ffa_init(void *pages)</div><div class='ctx'> {</div><div class='del'>-	struct arm_smccc_res res;</div><div class='add'>+	struct arm_smccc_1_2_regs res;</div><div class='ctx'> 	void *tx, *rx;</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_host_psci_config.smccc_version &lt; ARM_SMCCC_VERSION_1_2)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	arm_smccc_1_1_smc(FFA_VERSION, FFA_VERSION_1_1, 0, 0, 0, 0, 0, 0, &amp;res);</div><div class='add'>+	arm_smccc_1_2_smc(&amp;(struct arm_smccc_1_2_regs) {</div><div class='add'>+		.a0 = FFA_VERSION,</div><div class='add'>+		.a1 = FFA_VERSION_1_2,</div><div class='add'>+	}, &amp;res);</div><div class='ctx'> 	if (res.a0 == FFA_RET_NOT_SUPPORTED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -885,10 +957,10 @@ int hyp_ffa_init(void *pages)</div><div class='ctx'> 	if (FFA_MAJOR_VERSION(res.a0) != 1)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (FFA_MINOR_VERSION(res.a0) &lt; FFA_MINOR_VERSION(FFA_VERSION_1_1))</div><div class='add'>+	if (FFA_MINOR_VERSION(res.a0) &lt; FFA_MINOR_VERSION(FFA_VERSION_1_2))</div><div class='ctx'> 		hyp_ffa_version = res.a0;</div><div class='ctx'> 	else</div><div class='del'>-		hyp_ffa_version = FFA_VERSION_1_1;</div><div class='add'>+		hyp_ffa_version = FFA_VERSION_1_2;</div><div class='ctx'> </div><div class='ctx'> 	tx = pages;</div><div class='ctx'> 	pages += KVM_FFA_MBOX_NR_PAGES * PAGE_SIZE;</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/host.S b/arch/arm64/kvm/hyp/nvhe/host.S<br/>index 3d610fc51f4d..eef15b374abb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/host.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/host.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/host.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/host.S</a></div><div class='hunk'>@@ -124,7 +124,7 @@ SYM_FUNC_START(__hyp_do_panic)</div><div class='ctx'> 	/* Ensure host stage-2 is disabled */</div><div class='ctx'> 	mrs	x0, hcr_el2</div><div class='ctx'> 	bic	x0, x0, #HCR_VM</div><div class='del'>-	msr	hcr_el2, x0</div><div class='add'>+	msr_hcr_el2 x0</div><div class='ctx'> 	isb</div><div class='ctx'> 	tlbi	vmalls12e1</div><div class='ctx'> 	dsb	nsh</div><div class='hunk'>@@ -188,12 +188,12 @@ SYM_FUNC_END(__host_hvc)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Test whether the SP has overflowed, without corrupting a GPR.</div><div class='del'>-	 * nVHE hypervisor stacks are aligned so that the PAGE_SHIFT bit</div><div class='add'>+	 * nVHE hypervisor stacks are aligned so that the NVHE_STACK_SHIFT bit</div><div class='ctx'> 	 * of SP should always be 1.</div><div class='ctx'> 	 */</div><div class='ctx'> 	add	sp, sp, x0			// sp' = sp + x0</div><div class='ctx'> 	sub	x0, sp, x0			// x0' = sp' - x0 = (sp + x0) - x0 = sp</div><div class='del'>-	tbz	x0, #PAGE_SHIFT, .L__hyp_sp_overflow\@</div><div class='add'>+	tbz	x0, #NVHE_STACK_SHIFT, .L__hyp_sp_overflow\@</div><div class='ctx'> 	sub	x0, sp, x0			// x0'' = sp' - x0' = (sp + x0) - sp = x0</div><div class='ctx'> 	sub	sp, sp, x0			// sp'' = sp' - x0 = (sp + x0) - x0 = sp</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S<br/>index 401af1835be6..aada42522e7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-init.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-init.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a></div><div class='hunk'>@@ -24,28 +24,25 @@</div><div class='ctx'> 	.align	11</div><div class='ctx'> </div><div class='ctx'> SYM_CODE_START(__kvm_hyp_init)</div><div class='del'>-	ventry	__invalid		// Synchronous EL2t</div><div class='del'>-	ventry	__invalid		// IRQ EL2t</div><div class='del'>-	ventry	__invalid		// FIQ EL2t</div><div class='del'>-	ventry	__invalid		// Error EL2t</div><div class='add'>+	ventry	.			// Synchronous EL2t</div><div class='add'>+	ventry	.			// IRQ EL2t</div><div class='add'>+	ventry	.			// FIQ EL2t</div><div class='add'>+	ventry	.			// Error EL2t</div><div class='ctx'> </div><div class='del'>-	ventry	__invalid		// Synchronous EL2h</div><div class='del'>-	ventry	__invalid		// IRQ EL2h</div><div class='del'>-	ventry	__invalid		// FIQ EL2h</div><div class='del'>-	ventry	__invalid		// Error EL2h</div><div class='add'>+	ventry	.			// Synchronous EL2h</div><div class='add'>+	ventry	.			// IRQ EL2h</div><div class='add'>+	ventry	.			// FIQ EL2h</div><div class='add'>+	ventry	.			// Error EL2h</div><div class='ctx'> </div><div class='ctx'> 	ventry	__do_hyp_init		// Synchronous 64-bit EL1</div><div class='del'>-	ventry	__invalid		// IRQ 64-bit EL1</div><div class='del'>-	ventry	__invalid		// FIQ 64-bit EL1</div><div class='del'>-	ventry	__invalid		// Error 64-bit EL1</div><div class='add'>+	ventry	.			// IRQ 64-bit EL1</div><div class='add'>+	ventry	.			// FIQ 64-bit EL1</div><div class='add'>+	ventry	.			// Error 64-bit EL1</div><div class='ctx'> </div><div class='del'>-	ventry	__invalid		// Synchronous 32-bit EL1</div><div class='del'>-	ventry	__invalid		// IRQ 32-bit EL1</div><div class='del'>-	ventry	__invalid		// FIQ 32-bit EL1</div><div class='del'>-	ventry	__invalid		// Error 32-bit EL1</div><div class='del'>-</div><div class='del'>-__invalid:</div><div class='del'>-	b	.</div><div class='add'>+	ventry	.			// Synchronous 32-bit EL1</div><div class='add'>+	ventry	.			// IRQ 32-bit EL1</div><div class='add'>+	ventry	.			// FIQ 32-bit EL1</div><div class='add'>+	ventry	.			// Error 32-bit EL1</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only uses x0..x3 so as to not clobber callee-saved SMCCC registers.</div><div class='hunk'>@@ -77,6 +74,17 @@ __do_hyp_init:</div><div class='ctx'> SYM_CODE_END(__kvm_hyp_init)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Initialize EL2 CPU state to sane values.</div><div class='add'>+ *</div><div class='add'>+ * HCR_EL2.E2H must have been initialized already.</div><div class='add'>+ */</div><div class='add'>+SYM_CODE_START_LOCAL(__kvm_init_el2_state)</div><div class='add'>+	init_el2_state				// Clobbers x0..x2</div><div class='add'>+	finalise_el2_state</div><div class='add'>+	ret</div><div class='add'>+SYM_CODE_END(__kvm_init_el2_state)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Initialize the hypervisor in EL2.</div><div class='ctx'>  *</div><div class='ctx'>  * Only uses x0..x2 so as to not clobber callee-saved SMCCC registers</div><div class='hunk'>@@ -92,7 +100,7 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init)</div><div class='ctx'> 	msr	mair_el2, x1</div><div class='ctx'> </div><div class='ctx'> 	ldr	x1, [x0, #NVHE_INIT_HCR_EL2]</div><div class='del'>-	msr	hcr_el2, x1</div><div class='add'>+	msr_hcr_el2 x1</div><div class='ctx'> </div><div class='ctx'> 	mov	x2, #HCR_E2H</div><div class='ctx'> 	and	x2, x1, x2</div><div class='hunk'>@@ -102,9 +110,12 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init)</div><div class='ctx'> 	// TPIDR_EL2 is used to preserve x0 across the macro maze...</div><div class='ctx'> 	isb</div><div class='ctx'> 	msr	tpidr_el2, x0</div><div class='del'>-	init_el2_state</div><div class='del'>-	finalise_el2_state</div><div class='add'>+	str	lr, [x0, #NVHE_INIT_TMP]</div><div class='add'>+</div><div class='add'>+	bl	__kvm_init_el2_state</div><div class='add'>+</div><div class='ctx'> 	mrs	x0, tpidr_el2</div><div class='add'>+	ldr	lr, [x0, #NVHE_INIT_TMP]</div><div class='ctx'> </div><div class='ctx'> 1:</div><div class='ctx'> 	ldr	x1, [x0, #NVHE_INIT_TPIDR_EL2]</div><div class='hunk'>@@ -199,10 +210,9 @@ SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu)</div><div class='ctx'> </div><div class='ctx'> 2:	msr	SPsel, #1			// We want to use SP_EL{1,2}</div><div class='ctx'> </div><div class='del'>-	/* Initialize EL2 CPU state to sane values. */</div><div class='del'>-	init_el2_state				// Clobbers x0..x2</div><div class='del'>-	finalise_el2_state</div><div class='del'>-	__init_el2_nvhe_prepare_eret</div><div class='add'>+	init_el2_hcr	0</div><div class='add'>+</div><div class='add'>+	bl	__kvm_init_el2_state</div><div class='ctx'> </div><div class='ctx'> 	/* Enable MMU, set vectors and stack. */</div><div class='ctx'> 	mov	x0, x28</div><div class='hunk'>@@ -252,7 +262,7 @@ reset:</div><div class='ctx'> </div><div class='ctx'> alternative_if ARM64_KVM_PROTECTED_MODE</div><div class='ctx'> 	mov_q	x5, HCR_HOST_NVHE_FLAGS</div><div class='del'>-	msr	hcr_el2, x5</div><div class='add'>+	msr_hcr_el2 x5</div><div class='ctx'> alternative_else_nop_endif</div><div class='ctx'> </div><div class='ctx'> 	/* Install stub vectors */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c<br/>index fefc89209f9e..29430c031095 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-main.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-main.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;hyp/adjust_pc.h&gt;</div><div class='add'>+#include &lt;hyp/switch.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable-types.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_asm.h&gt;</div><div class='hunk'>@@ -25,7 +26,7 @@ void __kvm_hyp_host_forward_smc(struct kvm_cpu_context *host_ctxt);</div><div class='ctx'> </div><div class='ctx'> static void __hyp_sve_save_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	__vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, ZCR_EL1, read_sysreg_el1(SYS_ZCR));</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On saving/restoring guest sve state, always use the maximum VL for</div><div class='ctx'> 	 * the guest. The layout of the data when saving the sve state depends</div><div class='hunk'>@@ -68,7 +69,10 @@ static void fpsimd_sve_sync(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!guest_owns_fp_regs())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cpacr_clear_set(0, CPACR_ELx_FPEN | CPACR_ELx_ZEN);</div><div class='add'>+	/*</div><div class='add'>+	 * Traps have been disabled by __deactivate_cptr_traps(), but there</div><div class='add'>+	 * hasn't necessarily been a context synchronization event yet.</div><div class='add'>+	 */</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu_has_sve(vcpu))</div><div class='hunk'>@@ -78,12 +82,12 @@ static void fpsimd_sve_sync(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	has_fpmr = kvm_has_fpmr(kern_hyp_va(vcpu-&gt;kvm));</div><div class='ctx'> 	if (has_fpmr)</div><div class='del'>-		__vcpu_sys_reg(vcpu, FPMR) = read_sysreg_s(SYS_FPMR);</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, FPMR, read_sysreg_s(SYS_FPMR));</div><div class='ctx'> </div><div class='ctx'> 	if (system_supports_sve())</div><div class='ctx'> 		__hyp_sve_restore_host();</div><div class='ctx'> 	else</div><div class='del'>-		__fpsimd_restore_state(*host_data_ptr(fpsimd_state));</div><div class='add'>+		__fpsimd_restore_state(host_data_ptr(host_ctxt.fp_regs));</div><div class='ctx'> </div><div class='ctx'> 	if (has_fpmr)</div><div class='ctx'> 		write_sysreg_s(*host_data_ptr(fpmr), SYS_FPMR);</div><div class='hunk'>@@ -91,27 +95,44 @@ static void fpsimd_sve_sync(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	*host_data_ptr(fp_owner) = FP_STATE_HOST_OWNED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void flush_debug_state(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *host_vcpu = hyp_vcpu-&gt;host_vcpu;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu-&gt;vcpu.arch.debug_owner = host_vcpu-&gt;arch.debug_owner;</div><div class='add'>+</div><div class='add'>+	if (kvm_guest_owns_debug_regs(&amp;hyp_vcpu-&gt;vcpu))</div><div class='add'>+		hyp_vcpu-&gt;vcpu.arch.vcpu_debug_state = host_vcpu-&gt;arch.vcpu_debug_state;</div><div class='add'>+	else if (kvm_host_owns_debug_regs(&amp;hyp_vcpu-&gt;vcpu))</div><div class='add'>+		hyp_vcpu-&gt;vcpu.arch.external_debug_state = host_vcpu-&gt;arch.external_debug_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sync_debug_state(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *host_vcpu = hyp_vcpu-&gt;host_vcpu;</div><div class='add'>+</div><div class='add'>+	if (kvm_guest_owns_debug_regs(&amp;hyp_vcpu-&gt;vcpu))</div><div class='add'>+		host_vcpu-&gt;arch.vcpu_debug_state = hyp_vcpu-&gt;vcpu.arch.vcpu_debug_state;</div><div class='add'>+	else if (kvm_host_owns_debug_regs(&amp;hyp_vcpu-&gt;vcpu))</div><div class='add'>+		host_vcpu-&gt;arch.external_debug_state = hyp_vcpu-&gt;vcpu.arch.external_debug_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *host_vcpu = hyp_vcpu-&gt;host_vcpu;</div><div class='ctx'> </div><div class='ctx'> 	fpsimd_sve_flush();</div><div class='add'>+	flush_debug_state(hyp_vcpu);</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.ctxt	= host_vcpu-&gt;arch.ctxt;</div><div class='ctx'> </div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.sve_state	= kern_hyp_va(host_vcpu-&gt;arch.sve_state);</div><div class='del'>-	/* Limit guest vector length to the maximum supported by the host.  */</div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.sve_max_vl	= min(host_vcpu-&gt;arch.sve_max_vl, kvm_host_sve_max_vl);</div><div class='del'>-</div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.hw_mmu	= host_vcpu-&gt;arch.hw_mmu;</div><div class='del'>-</div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.hcr_el2	= host_vcpu-&gt;arch.hcr_el2;</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.mdcr_el2	= host_vcpu-&gt;arch.mdcr_el2;</div><div class='add'>+	hyp_vcpu-&gt;vcpu.arch.hcr_el2 &amp;= ~(HCR_TWI | HCR_TWE);</div><div class='add'>+	hyp_vcpu-&gt;vcpu.arch.hcr_el2 |= READ_ONCE(host_vcpu-&gt;arch.hcr_el2) &amp;</div><div class='add'>+						 (HCR_TWI | HCR_TWE);</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.iflags	= host_vcpu-&gt;arch.iflags;</div><div class='ctx'> </div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.debug_ptr	= kern_hyp_va(host_vcpu-&gt;arch.debug_ptr);</div><div class='del'>-</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.vsesr_el2	= host_vcpu-&gt;arch.vsesr_el2;</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.vgic_cpu.vgic_v3 = host_vcpu-&gt;arch.vgic_cpu.vgic_v3;</div><div class='hunk'>@@ -125,6 +146,7 @@ static void sync_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	fpsimd_sve_sync(&amp;hyp_vcpu-&gt;vcpu);</div><div class='add'>+	sync_debug_state(hyp_vcpu);</div><div class='ctx'> </div><div class='ctx'> 	host_vcpu-&gt;arch.ctxt		= hyp_vcpu-&gt;vcpu.arch.ctxt;</div><div class='ctx'> </div><div class='hunk'>@@ -139,16 +161,46 @@ static void sync_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> 		host_cpu_if-&gt;vgic_lr[i] = hyp_cpu_if-&gt;vgic_lr[i];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void handle___pkvm_vcpu_load(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(unsigned int, vcpu_idx, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, hcr_el2, host_ctxt, 3);</div><div class='add'>+	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = pkvm_load_hyp_vcpu(handle, vcpu_idx);</div><div class='add'>+	if (!hyp_vcpu)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu)) {</div><div class='add'>+		/* Propagate WFx trapping flags */</div><div class='add'>+		hyp_vcpu-&gt;vcpu.arch.hcr_el2 &amp;= ~(HCR_TWE | HCR_TWI);</div><div class='add'>+		hyp_vcpu-&gt;vcpu.arch.hcr_el2 |= hcr_el2 &amp; (HCR_TWE | HCR_TWI);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_vcpu_put(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = pkvm_get_loaded_hyp_vcpu();</div><div class='add'>+	if (hyp_vcpu)</div><div class='add'>+		pkvm_put_hyp_vcpu(hyp_vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(struct kvm_vcpu *, host_vcpu, host_ctxt, 1);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	host_vcpu = kern_hyp_va(host_vcpu);</div><div class='del'>-</div><div class='ctx'> 	if (unlikely(is_protected_kvm_enabled())) {</div><div class='del'>-		struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='del'>-		struct kvm *host_kvm;</div><div class='add'>+		struct pkvm_hyp_vcpu *hyp_vcpu = pkvm_get_loaded_hyp_vcpu();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * KVM (and pKVM) doesn't support SME guests for now, and</div><div class='hunk'>@@ -161,9 +213,6 @@ static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		host_kvm = kern_hyp_va(host_vcpu-&gt;kvm);</div><div class='del'>-		hyp_vcpu = pkvm_load_hyp_vcpu(host_kvm-&gt;arch.pkvm.handle,</div><div class='del'>-					      host_vcpu-&gt;vcpu_idx);</div><div class='ctx'> 		if (!hyp_vcpu) {</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -174,12 +223,149 @@ static void handle___kvm_vcpu_run(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 		ret = __kvm_vcpu_run(&amp;hyp_vcpu-&gt;vcpu);</div><div class='ctx'> </div><div class='ctx'> 		sync_hyp_vcpu(hyp_vcpu);</div><div class='del'>-		pkvm_put_hyp_vcpu(hyp_vcpu);</div><div class='ctx'> 	} else {</div><div class='add'>+		struct kvm_vcpu *vcpu = kern_hyp_va(host_vcpu);</div><div class='add'>+</div><div class='ctx'> 		/* The host is fully trusted, run its vCPU directly. */</div><div class='del'>-		ret = __kvm_vcpu_run(host_vcpu);</div><div class='add'>+		fpsimd_lazy_switch_to_guest(vcpu);</div><div class='add'>+		ret = __kvm_vcpu_run(vcpu);</div><div class='add'>+		fpsimd_lazy_switch_to_host(vcpu);</div><div class='ctx'> 	}</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) =  ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static int pkvm_refill_memcache(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *host_vcpu = hyp_vcpu-&gt;host_vcpu;</div><div class='add'>+</div><div class='add'>+	return refill_memcache(&amp;hyp_vcpu-&gt;vcpu.arch.pkvm_memcache,</div><div class='add'>+			       host_vcpu-&gt;arch.pkvm_memcache.nr_pages,</div><div class='add'>+			       &amp;host_vcpu-&gt;arch.pkvm_memcache);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_share_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(u64, pfn, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 4);</div><div class='add'>+	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = pkvm_get_loaded_hyp_vcpu();</div><div class='add'>+	if (!hyp_vcpu || pkvm_hyp_vcpu_is_protected(hyp_vcpu))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = pkvm_refill_memcache(hyp_vcpu);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_share_guest(pfn, gfn, nr_pages, hyp_vcpu, prot);</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) =  ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_unshare_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vm = get_np_pkvm_hyp_vm(handle);</div><div class='add'>+	if (!hyp_vm)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_unshare_guest(gfn, nr_pages, hyp_vm);</div><div class='add'>+	put_pkvm_hyp_vm(hyp_vm);</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) =  ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_relax_perms_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 2);</div><div class='add'>+	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = pkvm_get_loaded_hyp_vcpu();</div><div class='add'>+	if (!hyp_vcpu || pkvm_hyp_vcpu_is_protected(hyp_vcpu))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_relax_perms_guest(gfn, hyp_vcpu, prot);</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) = ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_wrprotect_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vm = get_np_pkvm_hyp_vm(handle);</div><div class='add'>+	if (!hyp_vm)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_wrprotect_guest(gfn, nr_pages, hyp_vm);</div><div class='add'>+	put_pkvm_hyp_vm(hyp_vm);</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) = ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_test_clear_young_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(bool, mkold, host_ctxt, 4);</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vm = get_np_pkvm_hyp_vm(handle);</div><div class='add'>+	if (!hyp_vm)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_test_clear_young_guest(gfn, nr_pages, mkold, hyp_vm);</div><div class='add'>+	put_pkvm_hyp_vm(hyp_vm);</div><div class='add'>+out:</div><div class='add'>+	cpu_reg(host_ctxt, 1) = ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_host_mkyoung_guest(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(u64, gfn, host_ctxt, 1);</div><div class='add'>+	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = pkvm_get_loaded_hyp_vcpu();</div><div class='add'>+	if (!hyp_vcpu || pkvm_hyp_vcpu_is_protected(hyp_vcpu))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __pkvm_host_mkyoung_guest(gfn, hyp_vcpu);</div><div class='ctx'> out:</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) =  ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -231,6 +417,22 @@ static void handle___kvm_tlb_flush_vmid(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	__kvm_tlb_flush_vmid(kern_hyp_va(mmu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void handle___pkvm_tlb_flush_vmid(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hyp_vm = get_np_pkvm_hyp_vm(handle);</div><div class='add'>+	if (!hyp_vm)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	__kvm_tlb_flush_vmid(&amp;hyp_vm-&gt;kvm.arch.mmu);</div><div class='add'>+	put_pkvm_hyp_vm(hyp_vm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void handle___kvm_flush_cpu_context(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(struct kvm_s2_mmu *, mmu, host_ctxt, 1);</div><div class='hunk'>@@ -262,11 +464,6 @@ static void handle___vgic_v3_init_lrs(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	__vgic_v3_init_lrs();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void handle___kvm_get_mdcr_el2(struct kvm_cpu_context *host_ctxt)</div><div class='del'>-{</div><div class='del'>-	cpu_reg(host_ctxt, 1) = __kvm_get_mdcr_el2();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void handle___vgic_v3_save_vmcr_aprs(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(struct vgic_v3_cpu_if *, cpu_if, host_ctxt, 1);</div><div class='hunk'>@@ -349,11 +546,16 @@ static void handle___pkvm_prot_finalize(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void handle___pkvm_vcpu_init_traps(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+static void handle___pkvm_reserve_vm(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_REG(struct kvm_vcpu *, vcpu, host_ctxt, 1);</div><div class='add'>+	cpu_reg(host_ctxt, 1) = __pkvm_reserve_vm();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle___pkvm_unreserve_vm(struct kvm_cpu_context *host_ctxt)</div><div class='add'>+{</div><div class='add'>+	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='ctx'> </div><div class='del'>-	__pkvm_vcpu_init_traps(kern_hyp_va(vcpu));</div><div class='add'>+	__pkvm_unreserve_vm(handle);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void handle___pkvm_init_vm(struct kvm_cpu_context *host_ctxt)</div><div class='hunk'>@@ -389,7 +591,6 @@ typedef void (*hcall_t)(struct kvm_cpu_context *);</div><div class='ctx'> </div><div class='ctx'> static const hcall_t host_hcall[] = {</div><div class='ctx'> 	/* ___kvm_hyp_init */</div><div class='del'>-	HANDLE_FUNC(__kvm_get_mdcr_el2),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_init),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_create_private_mapping),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_cpu_set_vector),</div><div class='hunk'>@@ -400,6 +601,12 @@ static const hcall_t host_hcall[] = {</div><div class='ctx'> </div><div class='ctx'> 	HANDLE_FUNC(__pkvm_host_share_hyp),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_host_unshare_hyp),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_share_guest),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_unshare_guest),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_relax_perms_guest),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_wrprotect_guest),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_test_clear_young_guest),</div><div class='add'>+	HANDLE_FUNC(__pkvm_host_mkyoung_guest),</div><div class='ctx'> 	HANDLE_FUNC(__kvm_adjust_pc),</div><div class='ctx'> 	HANDLE_FUNC(__kvm_vcpu_run),</div><div class='ctx'> 	HANDLE_FUNC(__kvm_flush_vm_context),</div><div class='hunk'>@@ -411,10 +618,14 @@ static const hcall_t host_hcall[] = {</div><div class='ctx'> 	HANDLE_FUNC(__kvm_timer_set_cntvoff),</div><div class='ctx'> 	HANDLE_FUNC(__vgic_v3_save_vmcr_aprs),</div><div class='ctx'> 	HANDLE_FUNC(__vgic_v3_restore_vmcr_aprs),</div><div class='del'>-	HANDLE_FUNC(__pkvm_vcpu_init_traps),</div><div class='add'>+	HANDLE_FUNC(__pkvm_reserve_vm),</div><div class='add'>+	HANDLE_FUNC(__pkvm_unreserve_vm),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_init_vm),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_init_vcpu),</div><div class='ctx'> 	HANDLE_FUNC(__pkvm_teardown_vm),</div><div class='add'>+	HANDLE_FUNC(__pkvm_vcpu_load),</div><div class='add'>+	HANDLE_FUNC(__pkvm_vcpu_put),</div><div class='add'>+	HANDLE_FUNC(__pkvm_tlb_flush_vmid),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void handle_host_hcall(struct kvm_cpu_context *host_ctxt)</div><div class='hunk'>@@ -486,12 +697,6 @@ void handle_trap(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	case ESR_ELx_EC_SMC64:</div><div class='ctx'> 		handle_host_smc(host_ctxt);</div><div class='ctx'> 		break;</div><div class='del'>-	case ESR_ELx_EC_SVE:</div><div class='del'>-		cpacr_clear_set(0, CPACR_ELx_ZEN);</div><div class='del'>-		isb();</div><div class='del'>-		sve_cond_update_zcr_vq(sve_vq_from_vl(kvm_host_sve_max_vl) - 1,</div><div class='del'>-				       SYS_ZCR_EL2);</div><div class='del'>-		break;</div><div class='ctx'> 	case ESR_ELx_EC_IABT_LOW:</div><div class='ctx'> 	case ESR_ELx_EC_DABT_LOW:</div><div class='ctx'> 		handle_host_mem_abort(host_ctxt);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp.lds.S b/arch/arm64/kvm/hyp/nvhe/hyp.lds.S<br/>index f4562f417d3f..d724f6d69302 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a></div><div class='hunk'>@@ -25,5 +25,7 @@ SECTIONS {</div><div class='ctx'> 	BEGIN_HYP_SECTION(.data..percpu)</div><div class='ctx'> 		PERCPU_INPUT(L1_CACHE_BYTES)</div><div class='ctx'> 	END_HYP_SECTION</div><div class='add'>+</div><div class='ctx'> 	HYP_SECTION(.bss)</div><div class='add'>+	HYP_SECTION(.data)</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/list_debug.c b/arch/arm64/kvm/hyp/nvhe/list_debug.c<br/>index 46a2d4f2b3c6..baa6260f88dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/list_debug.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/list_debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/list_debug.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/list_debug.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@ static inline __must_check bool nvhe_check_data_corruption(bool v)</div><div class='ctx'> 		bool corruption = unlikely(condition);			 \</div><div class='ctx'> 		if (corruption) {					 \</div><div class='ctx'> 			if (IS_ENABLED(CONFIG_BUG_ON_DATA_CORRUPTION)) { \</div><div class='del'>-				BUG_ON(1);				 \</div><div class='add'>+				BUG();				 	 \</div><div class='ctx'> 			} else						 \</div><div class='ctx'> 				WARN_ON(1);				 \</div><div class='ctx'> 		}							 \</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c<br/>index caba3e4bd09e..ddc8beb55eee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/mem_protect.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/mem_protect.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a></div><div class='hunk'>@@ -60,6 +60,11 @@ static void hyp_unlock_component(void)</div><div class='ctx'> 	hyp_spin_unlock(&amp;pkvm_pgd_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define for_each_hyp_page(__p, __st, __sz)				\</div><div class='add'>+	for (struct hyp_page *__p = hyp_phys_to_page(__st),		\</div><div class='add'>+			     *__e = __p + ((__sz) &gt;&gt; PAGE_SHIFT);	\</div><div class='add'>+	     __p &lt; __e; __p++)</div><div class='add'>+</div><div class='ctx'> static void *host_s2_zalloc_pages_exact(size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	void *addr = hyp_alloc_pages(&amp;host_s2_pool, get_order(size));</div><div class='hunk'>@@ -161,12 +166,6 @@ int kvm_host_prepare_stage2(void *pgt_pool_base)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool guest_stage2_force_pte_cb(u64 addr, u64 end,</div><div class='del'>-				      enum kvm_pgtable_prot prot)</div><div class='del'>-{</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void *guest_s2_zalloc_pages_exact(size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	void *addr = hyp_alloc_pages(&amp;current_vm-&gt;pool, get_order(size));</div><div class='hunk'>@@ -201,8 +200,8 @@ static void *guest_s2_zalloc_page(void *mc)</div><div class='ctx'> </div><div class='ctx'> 	memset(addr, 0, PAGE_SIZE);</div><div class='ctx'> 	p = hyp_virt_to_page(addr);</div><div class='del'>-	memset(p, 0, sizeof(*p));</div><div class='ctx'> 	p-&gt;refcount = 1;</div><div class='add'>+	p-&gt;order = 0;</div><div class='ctx'> </div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -217,16 +216,42 @@ static void guest_s2_put_page(void *addr)</div><div class='ctx'> 	hyp_put_page(&amp;current_vm-&gt;pool, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __apply_guest_page(void *va, size_t size,</div><div class='add'>+			       void (*func)(void *addr, size_t size))</div><div class='add'>+{</div><div class='add'>+	size += va - PTR_ALIGN_DOWN(va, PAGE_SIZE);</div><div class='add'>+	va = PTR_ALIGN_DOWN(va, PAGE_SIZE);</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+</div><div class='add'>+	while (size) {</div><div class='add'>+		size_t map_size = PAGE_SIZE;</div><div class='add'>+		void *map;</div><div class='add'>+</div><div class='add'>+		if (IS_ALIGNED((unsigned long)va, PMD_SIZE) &amp;&amp; size &gt;= PMD_SIZE)</div><div class='add'>+			map = hyp_fixblock_map(__hyp_pa(va), &amp;map_size);</div><div class='add'>+		else</div><div class='add'>+			map = hyp_fixmap_map(__hyp_pa(va));</div><div class='add'>+</div><div class='add'>+		func(map, map_size);</div><div class='add'>+</div><div class='add'>+		if (map_size == PMD_SIZE)</div><div class='add'>+			hyp_fixblock_unmap();</div><div class='add'>+		else</div><div class='add'>+			hyp_fixmap_unmap();</div><div class='add'>+</div><div class='add'>+		size -= map_size;</div><div class='add'>+		va += map_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void clean_dcache_guest_page(void *va, size_t size)</div><div class='ctx'> {</div><div class='del'>-	__clean_dcache_guest_page(hyp_fixmap_map(__hyp_pa(va)), size);</div><div class='del'>-	hyp_fixmap_unmap();</div><div class='add'>+	__apply_guest_page(va, size, __clean_dcache_guest_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invalidate_icache_guest_page(void *va, size_t size)</div><div class='ctx'> {</div><div class='del'>-	__invalidate_icache_guest_page(hyp_fixmap_map(__hyp_pa(va)), size);</div><div class='del'>-	hyp_fixmap_unmap();</div><div class='add'>+	__apply_guest_page(va, size, __invalidate_icache_guest_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_guest_prepare_stage2(struct pkvm_hyp_vm *vm, void *pgd)</div><div class='hunk'>@@ -255,8 +280,7 @@ int kvm_guest_prepare_stage2(struct pkvm_hyp_vm *vm, void *pgd)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	guest_lock_component(vm);</div><div class='del'>-	ret = __kvm_pgtable_stage2_init(mmu-&gt;pgt, mmu, &amp;vm-&gt;mm_ops, 0,</div><div class='del'>-					guest_stage2_force_pte_cb);</div><div class='add'>+	ret = __kvm_pgtable_stage2_init(mmu-&gt;pgt, mmu, &amp;vm-&gt;mm_ops, 0, NULL);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -266,8 +290,9 @@ int kvm_guest_prepare_stage2(struct pkvm_hyp_vm *vm, void *pgd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void reclaim_guest_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc)</div><div class='add'>+void reclaim_pgtable_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc)</div><div class='ctx'> {</div><div class='add'>+	struct hyp_page *page;</div><div class='ctx'> 	void *addr;</div><div class='ctx'> </div><div class='ctx'> 	/* Dump all pgtable pages in the hyp_pool */</div><div class='hunk'>@@ -279,7 +304,9 @@ void reclaim_guest_pages(struct pkvm_hyp_vm *vm, struct kvm_hyp_memcache *mc)</div><div class='ctx'> 	/* Drain the hyp_pool into the memcache */</div><div class='ctx'> 	addr = hyp_alloc_pages(&amp;vm-&gt;pool, 0);</div><div class='ctx'> 	while (addr) {</div><div class='del'>-		memset(hyp_virt_to_page(addr), 0, sizeof(struct hyp_page));</div><div class='add'>+		page = hyp_virt_to_page(addr);</div><div class='add'>+		page-&gt;refcount = 0;</div><div class='add'>+		page-&gt;order = 0;</div><div class='ctx'> 		push_hyp_memcache(mc, addr, hyp_virt_to_phys);</div><div class='ctx'> 		WARN_ON(__pkvm_hyp_donate_host(hyp_virt_to_pfn(addr), 1));</div><div class='ctx'> 		addr = hyp_alloc_pages(&amp;vm-&gt;pool, 0);</div><div class='hunk'>@@ -306,7 +333,7 @@ int __pkvm_prot_finalize(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	kvm_flush_dcache_to_poc(params, sizeof(*params));</div><div class='ctx'> </div><div class='del'>-	write_sysreg(params-&gt;hcr_el2, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(params-&gt;hcr_el2);</div><div class='ctx'> 	__load_stage2(&amp;host_mmu.arch.mmu, &amp;host_mmu.arch);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -382,19 +409,28 @@ bool addr_is_memory(phys_addr_t phys)</div><div class='ctx'> 	return !!find_mem_range(phys, &amp;range);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool addr_is_allowed_memory(phys_addr_t phys)</div><div class='add'>+static bool is_in_mem_range(u64 addr, struct kvm_mem_range *range)</div><div class='add'>+{</div><div class='add'>+	return range-&gt;start &lt;= addr &amp;&amp; addr &lt; range-&gt;end;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int check_range_allowed_memory(u64 start, u64 end)</div><div class='ctx'> {</div><div class='ctx'> 	struct memblock_region *reg;</div><div class='ctx'> 	struct kvm_mem_range range;</div><div class='ctx'> </div><div class='del'>-	reg = find_mem_range(phys, &amp;range);</div><div class='add'>+	/*</div><div class='add'>+	 * Callers can't check the state of a range that overlaps memory and</div><div class='add'>+	 * MMIO regions, so ensure [start, end[ is in the same kvm_mem_range.</div><div class='add'>+	 */</div><div class='add'>+	reg = find_mem_range(start, &amp;range);</div><div class='add'>+	if (!is_in_mem_range(end - 1, &amp;range))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return reg &amp;&amp; !(reg-&gt;flags &amp; MEMBLOCK_NOMAP);</div><div class='del'>-}</div><div class='add'>+	if (!reg || reg-&gt;flags &amp; MEMBLOCK_NOMAP)</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='del'>-static bool is_in_mem_range(u64 addr, struct kvm_mem_range *range)</div><div class='del'>-{</div><div class='del'>-	return range-&gt;start &lt;= addr &amp;&amp; addr &lt; range-&gt;end;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool range_is_memory(u64 start, u64 end)</div><div class='hunk'>@@ -443,6 +479,7 @@ static int host_stage2_adjust_range(u64 addr, struct kvm_mem_range *range)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_mem_range cur;</div><div class='ctx'> 	kvm_pte_t pte;</div><div class='add'>+	u64 granule;</div><div class='ctx'> 	s8 level;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -454,21 +491,27 @@ static int host_stage2_adjust_range(u64 addr, struct kvm_mem_range *range)</div><div class='ctx'> 	if (kvm_pte_valid(pte))</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	if (pte)</div><div class='add'>+	if (pte) {</div><div class='add'>+		WARN_ON(addr_is_memory(addr) &amp;&amp;</div><div class='add'>+			get_host_state(hyp_phys_to_page(addr)) != PKVM_NOPAGE);</div><div class='ctx'> 		return -EPERM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		u64 granule = kvm_granule_size(level);</div><div class='add'>+	for (; level &lt;= KVM_PGTABLE_LAST_LEVEL; level++) {</div><div class='add'>+		if (!kvm_level_supports_block_mapping(level))</div><div class='add'>+			continue;</div><div class='add'>+		granule = kvm_granule_size(level);</div><div class='ctx'> 		cur.start = ALIGN_DOWN(addr, granule);</div><div class='ctx'> 		cur.end = cur.start + granule;</div><div class='del'>-		level++;</div><div class='del'>-	} while ((level &lt;= KVM_PGTABLE_LAST_LEVEL) &amp;&amp;</div><div class='del'>-			!(kvm_level_supports_block_mapping(level) &amp;&amp;</div><div class='del'>-			  range_included(&amp;cur, range)));</div><div class='add'>+		if (!range_included(&amp;cur, range))</div><div class='add'>+			continue;</div><div class='add'>+		*range = cur;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	*range = cur;</div><div class='add'>+	WARN_ON(1);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int host_stage2_idmap_locked(phys_addr_t addr, u64 size,</div><div class='hunk'>@@ -477,10 +520,31 @@ int host_stage2_idmap_locked(phys_addr_t addr, u64 size,</div><div class='ctx'> 	return host_stage2_try(__host_stage2_idmap, addr, addr + size, prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __host_update_page_state(phys_addr_t addr, u64 size, enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	for_each_hyp_page(page, addr, size)</div><div class='add'>+		set_host_state(page, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int host_stage2_set_owner_locked(phys_addr_t addr, u64 size, u8 owner_id)</div><div class='ctx'> {</div><div class='del'>-	return host_stage2_try(kvm_pgtable_stage2_set_owner, &amp;host_mmu.pgt,</div><div class='del'>-			       addr, size, &amp;host_s2_pool, owner_id);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!range_is_memory(addr, addr + size))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	ret = host_stage2_try(kvm_pgtable_stage2_set_owner, &amp;host_mmu.pgt,</div><div class='add'>+			      addr, size, &amp;host_s2_pool, owner_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Don't forget to update the vmemmap tracking for the host */</div><div class='add'>+	if (owner_id == PKVM_ID_HOST)</div><div class='add'>+		__host_update_page_state(addr, size, PKVM_PAGE_OWNED);</div><div class='add'>+	else</div><div class='add'>+		__host_update_page_state(addr, size, PKVM_NOPAGE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool host_stage2_force_pte_cb(u64 addr, u64 end, enum kvm_pgtable_prot prot)</div><div class='hunk'>@@ -541,44 +605,18 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	addr = (fault.hpfar_el2 &amp; HPFAR_MASK) &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Yikes, we couldn't resolve the fault IPA. This should reinject an</div><div class='add'>+	 * abort into the host when we figure out how to do that.</div><div class='add'>+	 */</div><div class='add'>+	BUG_ON(!(fault.hpfar_el2 &amp; HPFAR_EL2_NS));</div><div class='add'>+	addr = FIELD_GET(HPFAR_EL2_FIPA, fault.hpfar_el2) &lt;&lt; 12;</div><div class='add'>+</div><div class='ctx'> 	ret = host_stage2_idmap(addr);</div><div class='ctx'> 	BUG_ON(ret &amp;&amp; ret != -EAGAIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pkvm_mem_transition {</div><div class='del'>-	u64				nr_pages;</div><div class='del'>-</div><div class='del'>-	struct {</div><div class='del'>-		enum pkvm_component_id	id;</div><div class='del'>-		/* Address in the initiator's address space */</div><div class='del'>-		u64			addr;</div><div class='del'>-</div><div class='del'>-		union {</div><div class='del'>-			struct {</div><div class='del'>-				/* Address in the completer's address space */</div><div class='del'>-				u64	completer_addr;</div><div class='del'>-			} host;</div><div class='del'>-			struct {</div><div class='del'>-				u64	completer_addr;</div><div class='del'>-			} hyp;</div><div class='del'>-		};</div><div class='del'>-	} initiator;</div><div class='del'>-</div><div class='del'>-	struct {</div><div class='del'>-		enum pkvm_component_id	id;</div><div class='del'>-	} completer;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pkvm_mem_share {</div><div class='del'>-	const struct pkvm_mem_transition	tx;</div><div class='del'>-	const enum kvm_pgtable_prot		completer_prot;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pkvm_mem_donation {</div><div class='del'>-	const struct pkvm_mem_transition	tx;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct check_walk_data {</div><div class='ctx'> 	enum pkvm_page_state	desired;</div><div class='ctx'> 	enum pkvm_page_state	(*get_page_state)(kvm_pte_t pte, u64 addr);</div><div class='hunk'>@@ -604,708 +642,727 @@ static int check_page_state_range(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='ctx'> 	return kvm_pgtable_walk(pgt, addr, size, &amp;walker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum pkvm_page_state host_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='del'>-{</div><div class='del'>-	if (!addr_is_allowed_memory(addr))</div><div class='del'>-		return PKVM_NOPAGE;</div><div class='del'>-</div><div class='del'>-	if (!kvm_pte_valid(pte) &amp;&amp; pte)</div><div class='del'>-		return PKVM_NOPAGE;</div><div class='del'>-</div><div class='del'>-	return pkvm_getstate(kvm_pgtable_stage2_pte_prot(pte));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __host_check_page_state_range(u64 addr, u64 size,</div><div class='ctx'> 					 enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	struct check_walk_data d = {</div><div class='del'>-		.desired	= state,</div><div class='del'>-		.get_page_state	= host_get_page_state,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hyp_assert_lock_held(&amp;host_mmu.lock);</div><div class='del'>-	return check_page_state_range(&amp;host_mmu.pgt, addr, size, &amp;d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __host_set_page_state_range(u64 addr, u64 size,</div><div class='del'>-				       enum pkvm_page_state state)</div><div class='del'>-{</div><div class='del'>-	enum kvm_pgtable_prot prot = pkvm_mkstate(PKVM_HOST_MEM_PROT, state);</div><div class='del'>-</div><div class='del'>-	return host_stage2_idmap_locked(addr, size, prot);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int host_request_owned_transition(u64 *completer_addr,</div><div class='del'>-					 const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u64 addr = tx-&gt;initiator.addr;</div><div class='del'>-</div><div class='del'>-	*completer_addr = tx-&gt;initiator.host.completer_addr;</div><div class='del'>-	return __host_check_page_state_range(addr, size, PKVM_PAGE_OWNED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int host_request_unshare(u64 *completer_addr,</div><div class='del'>-				const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u64 addr = tx-&gt;initiator.addr;</div><div class='del'>-</div><div class='del'>-	*completer_addr = tx-&gt;initiator.host.completer_addr;</div><div class='del'>-	return __host_check_page_state_range(addr, size, PKVM_PAGE_SHARED_OWNED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int host_initiate_share(u64 *completer_addr,</div><div class='del'>-			       const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u64 addr = tx-&gt;initiator.addr;</div><div class='del'>-</div><div class='del'>-	*completer_addr = tx-&gt;initiator.host.completer_addr;</div><div class='del'>-	return __host_set_page_state_range(addr, size, PKVM_PAGE_SHARED_OWNED);</div><div class='del'>-}</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-static int host_initiate_unshare(u64 *completer_addr,</div><div class='del'>-				 const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u64 addr = tx-&gt;initiator.addr;</div><div class='add'>+	ret = check_range_allowed_memory(addr, addr + size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	*completer_addr = tx-&gt;initiator.host.completer_addr;</div><div class='del'>-	return __host_set_page_state_range(addr, size, PKVM_PAGE_OWNED);</div><div class='del'>-}</div><div class='add'>+	hyp_assert_lock_held(&amp;host_mmu.lock);</div><div class='ctx'> </div><div class='del'>-static int host_initiate_donation(u64 *completer_addr,</div><div class='del'>-				  const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u8 owner_id = tx-&gt;completer.id;</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='add'>+	for_each_hyp_page(page, addr, size) {</div><div class='add'>+		if (get_host_state(page) != state)</div><div class='add'>+			return -EPERM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	*completer_addr = tx-&gt;initiator.host.completer_addr;</div><div class='del'>-	return host_stage2_set_owner_locked(tx-&gt;initiator.addr, size, owner_id);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __host_ack_skip_pgtable_check(const struct pkvm_mem_transition *tx)</div><div class='add'>+static int __host_set_page_state_range(u64 addr, u64 size,</div><div class='add'>+				       enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	return !(IS_ENABLED(CONFIG_NVHE_EL2_DEBUG) ||</div><div class='del'>-		 tx-&gt;initiator.id != PKVM_ID_HYP);</div><div class='del'>-}</div><div class='add'>+	if (get_host_state(hyp_phys_to_page(addr)) == PKVM_NOPAGE) {</div><div class='add'>+		int ret = host_stage2_idmap_locked(addr, size, PKVM_HOST_MEM_PROT);</div><div class='ctx'> </div><div class='del'>-static int __host_ack_transition(u64 addr, const struct pkvm_mem_transition *tx,</div><div class='del'>-				 enum pkvm_page_state state)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (__host_ack_skip_pgtable_check(tx))</div><div class='del'>-		return 0;</div><div class='add'>+	__host_update_page_state(addr, size, state);</div><div class='ctx'> </div><div class='del'>-	return __host_check_page_state_range(addr, size, state);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int host_ack_donation(u64 addr, const struct pkvm_mem_transition *tx)</div><div class='add'>+static void __hyp_set_page_state_range(phys_addr_t phys, u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	return __host_ack_transition(addr, tx, PKVM_NOPAGE);</div><div class='add'>+	for_each_hyp_page(page, phys, size)</div><div class='add'>+		set_hyp_state(page, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int host_complete_donation(u64 addr, const struct pkvm_mem_transition *tx)</div><div class='add'>+static int __hyp_check_page_state_range(phys_addr_t phys, u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u8 host_id = tx-&gt;completer.id;</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		if (get_hyp_state(page) != state)</div><div class='add'>+			return -EPERM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return host_stage2_set_owner_locked(addr, size, host_id);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum pkvm_page_state hyp_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='add'>+static enum pkvm_page_state guest_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='ctx'> {</div><div class='ctx'> 	if (!kvm_pte_valid(pte))</div><div class='ctx'> 		return PKVM_NOPAGE;</div><div class='ctx'> </div><div class='del'>-	return pkvm_getstate(kvm_pgtable_hyp_pte_prot(pte));</div><div class='add'>+	return pkvm_getstate(kvm_pgtable_stage2_pte_prot(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __hyp_check_page_state_range(u64 addr, u64 size,</div><div class='del'>-					enum pkvm_page_state state)</div><div class='add'>+static int __guest_check_page_state_range(struct pkvm_hyp_vm *vm, u64 addr,</div><div class='add'>+					  u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='ctx'> 	struct check_walk_data d = {</div><div class='ctx'> 		.desired	= state,</div><div class='del'>-		.get_page_state	= hyp_get_page_state,</div><div class='add'>+		.get_page_state	= guest_get_page_state,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	hyp_assert_lock_held(&amp;pkvm_pgd_lock);</div><div class='del'>-	return check_page_state_range(&amp;pkvm_pgtable, addr, size, &amp;d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hyp_request_donation(u64 *completer_addr,</div><div class='del'>-				const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	u64 addr = tx-&gt;initiator.addr;</div><div class='del'>-</div><div class='del'>-	*completer_addr = tx-&gt;initiator.hyp.completer_addr;</div><div class='del'>-	return __hyp_check_page_state_range(addr, size, PKVM_PAGE_OWNED);</div><div class='add'>+	hyp_assert_lock_held(&amp;vm-&gt;lock);</div><div class='add'>+	return check_page_state_range(&amp;vm-&gt;pgt, addr, size, &amp;d);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hyp_initiate_donation(u64 *completer_addr,</div><div class='del'>-				 const struct pkvm_mem_transition *tx)</div><div class='add'>+int __pkvm_host_share_hyp(u64 pfn)</div><div class='ctx'> {</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 size = PAGE_SIZE;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	*completer_addr = tx-&gt;initiator.hyp.completer_addr;</div><div class='del'>-	ret = kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, tx-&gt;initiator.addr, size);</div><div class='del'>-	return (ret != size) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool __hyp_ack_skip_pgtable_check(const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	return !(IS_ENABLED(CONFIG_NVHE_EL2_DEBUG) ||</div><div class='del'>-		 tx-&gt;initiator.id != PKVM_ID_HOST);</div><div class='del'>-}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-static int hyp_ack_share(u64 addr, const struct pkvm_mem_transition *tx,</div><div class='del'>-			 enum kvm_pgtable_prot perms)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	if (perms != PAGE_HYP)</div><div class='del'>-		return -EPERM;</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	WARN_ON(__host_set_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED));</div><div class='ctx'> </div><div class='del'>-	if (__hyp_ack_skip_pgtable_check(tx))</div><div class='del'>-		return 0;</div><div class='add'>+unlock:</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	return __hyp_check_page_state_range(addr, size, PKVM_NOPAGE);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hyp_ack_unshare(u64 addr, const struct pkvm_mem_transition *tx)</div><div class='add'>+int __pkvm_host_unshare_hyp(u64 pfn)</div><div class='ctx'> {</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-</div><div class='del'>-	if (tx-&gt;initiator.id == PKVM_ID_HOST &amp;&amp; hyp_page_count((void *)addr))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 virt = (u64)__hyp_va(phys);</div><div class='add'>+	u64 size = PAGE_SIZE;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (__hyp_ack_skip_pgtable_check(tx))</div><div class='del'>-		return 0;</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-	return __hyp_check_page_state_range(addr, size,</div><div class='del'>-					    PKVM_PAGE_SHARED_BORROWED);</div><div class='del'>-}</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	if (hyp_page_count((void *)virt)) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static int hyp_ack_donation(u64 addr, const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	WARN_ON(__host_set_page_state_range(phys, size, PKVM_PAGE_OWNED));</div><div class='ctx'> </div><div class='del'>-	if (__hyp_ack_skip_pgtable_check(tx))</div><div class='del'>-		return 0;</div><div class='add'>+unlock:</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	return __hyp_check_page_state_range(addr, size, PKVM_NOPAGE);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hyp_complete_share(u64 addr, const struct pkvm_mem_transition *tx,</div><div class='del'>-			      enum kvm_pgtable_prot perms)</div><div class='add'>+int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages)</div><div class='ctx'> {</div><div class='del'>-	void *start = (void *)addr, *end = start + (tx-&gt;nr_pages * PAGE_SIZE);</div><div class='del'>-	enum kvm_pgtable_prot prot;</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 size = PAGE_SIZE * nr_pages;</div><div class='add'>+	void *virt = __hyp_va(phys);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	prot = pkvm_mkstate(perms, PKVM_PAGE_SHARED_BORROWED);</div><div class='del'>-	return pkvm_create_mappings_locked(start, end, prot);</div><div class='del'>-}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-static int hyp_complete_unshare(u64 addr, const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	u64 size = tx-&gt;nr_pages * PAGE_SIZE;</div><div class='del'>-	int ret = kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, addr, size);</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	return (ret != size) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	WARN_ON(pkvm_create_mappings_locked(virt, virt + size, PAGE_HYP));</div><div class='add'>+	WARN_ON(host_stage2_set_owner_locked(phys, size, PKVM_ID_HYP));</div><div class='ctx'> </div><div class='del'>-static int hyp_complete_donation(u64 addr,</div><div class='del'>-				 const struct pkvm_mem_transition *tx)</div><div class='del'>-{</div><div class='del'>-	void *start = (void *)addr, *end = start + (tx-&gt;nr_pages * PAGE_SIZE);</div><div class='del'>-	enum kvm_pgtable_prot prot = pkvm_mkstate(PAGE_HYP, PKVM_PAGE_OWNED);</div><div class='add'>+unlock:</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	return pkvm_create_mappings_locked(start, end, prot);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int check_share(struct pkvm_mem_share *share)</div><div class='add'>+int __pkvm_hyp_donate_host(u64 pfn, u64 nr_pages)</div><div class='ctx'> {</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;share-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 size = PAGE_SIZE * nr_pages;</div><div class='add'>+	u64 virt = (u64)__hyp_va(phys);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_request_owned_transition(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_ack_share(completer_addr, tx, share-&gt;completer_prot);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_FFA:</div><div class='del'>-		/*</div><div class='del'>-		 * We only check the host; the secure side will check the other</div><div class='del'>-		 * end when we forward the FFA call.</div><div class='del'>-		 */</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	WARN_ON(kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, virt, size) != size);</div><div class='add'>+	WARN_ON(host_stage2_set_owner_locked(phys, size, PKVM_ID_HOST));</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __do_share(struct pkvm_mem_share *share)</div><div class='add'>+int hyp_pin_shared_mem(void *from, void *to)</div><div class='ctx'> {</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;share-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='add'>+	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='add'>+	u64 end = PAGE_ALIGN((u64)to);</div><div class='add'>+	u64 phys = __hyp_pa(start);</div><div class='add'>+	u64 size = end - start;</div><div class='add'>+	struct hyp_page *p;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_initiate_share(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_complete_share(completer_addr, tx, share-&gt;completer_prot);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_FFA:</div><div class='del'>-		/*</div><div class='del'>-		 * We're not responsible for any secure page-tables, so there's</div><div class='del'>-		 * nothing to do here.</div><div class='del'>-		 */</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	for (cur = start; cur &lt; end; cur += PAGE_SIZE) {</div><div class='add'>+		p = hyp_virt_to_page(cur);</div><div class='add'>+		hyp_page_ref_inc(p);</div><div class='add'>+		if (p-&gt;refcount == 1)</div><div class='add'>+			WARN_ON(pkvm_create_mappings_locked((void *)cur,</div><div class='add'>+							    (void *)cur + PAGE_SIZE,</div><div class='add'>+							    PAGE_HYP));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+unlock:</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * do_share():</div><div class='del'>- *</div><div class='del'>- * The page owner grants access to another component with a given set</div><div class='del'>- * of permissions.</div><div class='del'>- *</div><div class='del'>- * Initiator: OWNED	=&gt; SHARED_OWNED</div><div class='del'>- * Completer: NOPAGE	=&gt; SHARED_BORROWED</div><div class='del'>- */</div><div class='del'>-static int do_share(struct pkvm_mem_share *share)</div><div class='add'>+void hyp_unpin_shared_mem(void *from, void *to)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='add'>+	u64 end = PAGE_ALIGN((u64)to);</div><div class='add'>+	struct hyp_page *p;</div><div class='ctx'> </div><div class='del'>-	ret = check_share(share);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	host_lock_component();</div><div class='add'>+	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-	return WARN_ON(__do_share(share));</div><div class='add'>+	for (cur = start; cur &lt; end; cur += PAGE_SIZE) {</div><div class='add'>+		p = hyp_virt_to_page(cur);</div><div class='add'>+		if (p-&gt;refcount == 1)</div><div class='add'>+			WARN_ON(kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, cur, PAGE_SIZE) != PAGE_SIZE);</div><div class='add'>+		hyp_page_ref_dec(p);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int check_unshare(struct pkvm_mem_share *share)</div><div class='add'>+int __pkvm_host_share_ffa(u64 pfn, u64 nr_pages)</div><div class='ctx'> {</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;share-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 size = PAGE_SIZE * nr_pages;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_request_unshare(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = __host_set_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_ack_unshare(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_FFA:</div><div class='del'>-		/* See check_share() */</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+int __pkvm_host_unshare_ffa(u64 pfn, u64 nr_pages)</div><div class='add'>+{</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 size = PAGE_SIZE * nr_pages;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	host_lock_component();</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = __host_set_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	host_unlock_component();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __do_unshare(struct pkvm_mem_share *share)</div><div class='add'>+static int __guest_check_transition_size(u64 phys, u64 ipa, u64 nr_pages, u64 *size)</div><div class='ctx'> {</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;share-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='del'>-	int ret;</div><div class='add'>+	size_t block_size;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_initiate_unshare(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	if (nr_pages == 1) {</div><div class='add'>+		*size = PAGE_SIZE;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	/* We solely support second to last level huge mapping */</div><div class='add'>+	block_size = kvm_granule_size(KVM_PGTABLE_LAST_LEVEL - 1);</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_complete_unshare(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_FFA:</div><div class='del'>-		/* See __do_share() */</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (nr_pages != block_size &gt;&gt; PAGE_SHIFT)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	if (!IS_ALIGNED(phys | ipa, block_size))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*size = block_size;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * do_unshare():</div><div class='del'>- *</div><div class='del'>- * The page owner revokes access from another component for a range of</div><div class='del'>- * pages which were previously shared using do_share().</div><div class='del'>- *</div><div class='del'>- * Initiator: SHARED_OWNED	=&gt; OWNED</div><div class='del'>- * Completer: SHARED_BORROWED	=&gt; NOPAGE</div><div class='del'>- */</div><div class='del'>-static int do_unshare(struct pkvm_mem_share *share)</div><div class='add'>+int __pkvm_host_share_guest(u64 pfn, u64 gfn, u64 nr_pages, struct pkvm_hyp_vcpu *vcpu,</div><div class='add'>+			    enum kvm_pgtable_prot prot)</div><div class='ctx'> {</div><div class='add'>+	struct pkvm_hyp_vm *vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='add'>+	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='add'>+	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='add'>+	u64 size;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = check_unshare(share);</div><div class='add'>+	if (prot &amp; ~KVM_PGTABLE_PROT_RWX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = __guest_check_transition_size(phys, ipa, nr_pages, &amp;size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return WARN_ON(__do_unshare(share));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int check_donation(struct pkvm_mem_donation *donation)</div><div class='del'>-{</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;donation-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='del'>-	int ret;</div><div class='add'>+	ret = check_range_allowed_memory(phys, phys + size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_request_owned_transition(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_request_donation(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	guest_lock_component(vm);</div><div class='ctx'> </div><div class='add'>+	ret = __guest_check_page_state_range(vm, ipa, size, PKVM_NOPAGE);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		switch (get_host_state(page)) {</div><div class='add'>+		case PKVM_PAGE_OWNED:</div><div class='add'>+			continue;</div><div class='add'>+		case PKVM_PAGE_SHARED_OWNED:</div><div class='add'>+			if (page-&gt;host_share_guest_count == U32_MAX) {</div><div class='add'>+				ret = -EBUSY;</div><div class='add'>+				goto unlock;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Only host to np-guest multi-sharing is tolerated */</div><div class='add'>+			if (page-&gt;host_share_guest_count)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			fallthrough;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_ack_donation(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_ack_donation(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+		page-&gt;host_share_guest_count++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	WARN_ON(kvm_pgtable_stage2_map(&amp;vm-&gt;pgt, ipa, size, phys,</div><div class='add'>+				       pkvm_mkstate(prot, PKVM_PAGE_SHARED_BORROWED),</div><div class='add'>+				       &amp;vcpu-&gt;vcpu.arch.pkvm_memcache, 0));</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	guest_unlock_component(vm);</div><div class='add'>+	host_unlock_component();</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __do_donate(struct pkvm_mem_donation *donation)</div><div class='add'>+static int __check_host_shared_guest(struct pkvm_hyp_vm *vm, u64 *__phys, u64 ipa, u64 size)</div><div class='ctx'> {</div><div class='del'>-	const struct pkvm_mem_transition *tx = &amp;donation-&gt;tx;</div><div class='del'>-	u64 completer_addr;</div><div class='add'>+	enum pkvm_page_state state;</div><div class='add'>+	kvm_pte_t pte;</div><div class='add'>+	u64 phys;</div><div class='add'>+	s8 level;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;initiator.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_initiate_donation(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_initiate_donation(&amp;completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	ret = kvm_pgtable_get_leaf(&amp;vm-&gt;pgt, ipa, &amp;pte, &amp;level);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	if (!kvm_pte_valid(pte))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	if (size &amp;&amp; kvm_granule_size(level) != size)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	if (!size)</div><div class='add'>+		size = kvm_granule_size(level);</div><div class='add'>+</div><div class='add'>+	state = guest_get_page_state(pte, ipa);</div><div class='add'>+	if (state != PKVM_PAGE_SHARED_BORROWED)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	phys = kvm_pte_to_phys(pte);</div><div class='add'>+	ret = check_range_allowed_memory(phys, phys + size);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	switch (tx-&gt;completer.id) {</div><div class='del'>-	case PKVM_ID_HOST:</div><div class='del'>-		ret = host_complete_donation(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_ID_HYP:</div><div class='del'>-		ret = hyp_complete_donation(completer_addr, tx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		if (get_host_state(page) != PKVM_PAGE_SHARED_OWNED)</div><div class='add'>+			return -EPERM;</div><div class='add'>+		if (WARN_ON(!page-&gt;host_share_guest_count))</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	*__phys = phys;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * do_donate():</div><div class='del'>- *</div><div class='del'>- * The page owner transfers ownership to another component, losing access</div><div class='del'>- * as a consequence.</div><div class='del'>- *</div><div class='del'>- * Initiator: OWNED	=&gt; NOPAGE</div><div class='del'>- * Completer: NOPAGE	=&gt; OWNED</div><div class='del'>- */</div><div class='del'>-static int do_donate(struct pkvm_mem_donation *donation)</div><div class='add'>+int __pkvm_host_unshare_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='add'>+	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='add'>+	u64 size, phys;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = check_donation(donation);</div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return WARN_ON(__do_donate(donation));</div><div class='del'>-}</div><div class='add'>+	host_lock_component();</div><div class='add'>+	guest_lock_component(vm);</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_share_hyp(u64 pfn)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u64 host_addr = hyp_pfn_to_phys(pfn);</div><div class='del'>-	u64 hyp_addr = (u64)__hyp_va(host_addr);</div><div class='del'>-	struct pkvm_mem_share share = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= 1,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-				.addr	= host_addr,</div><div class='del'>-				.host	= {</div><div class='del'>-					.completer_addr = hyp_addr,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_HYP,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-		.completer_prot	= PAGE_HYP,</div><div class='del'>-	};</div><div class='add'>+	ret = __check_host_shared_guest(vm, &amp;phys, ipa, size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='add'>+	ret = kvm_pgtable_stage2_unmap(&amp;vm-&gt;pgt, ipa, size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	ret = do_share(&amp;share);</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		/* __check_host_shared_guest() protects against underflow */</div><div class='add'>+		page-&gt;host_share_guest_count--;</div><div class='add'>+		if (!page-&gt;host_share_guest_count)</div><div class='add'>+			set_host_state(page, PKVM_PAGE_OWNED);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	hyp_unlock_component();</div><div class='add'>+unlock:</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> 	host_unlock_component();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_unshare_hyp(u64 pfn)</div><div class='add'>+static void assert_host_shared_guest(struct pkvm_hyp_vm *vm, u64 ipa, u64 size)</div><div class='ctx'> {</div><div class='add'>+	u64 phys;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u64 host_addr = hyp_pfn_to_phys(pfn);</div><div class='del'>-	u64 hyp_addr = (u64)__hyp_va(host_addr);</div><div class='del'>-	struct pkvm_mem_share share = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= 1,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-				.addr	= host_addr,</div><div class='del'>-				.host	= {</div><div class='del'>-					.completer_addr = hyp_addr,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_HYP,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-		.completer_prot	= PAGE_HYP,</div><div class='del'>-	};</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_NVHE_EL2_DEBUG))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='add'>+	guest_lock_component(vm);</div><div class='ctx'> </div><div class='del'>-	ret = do_unshare(&amp;share);</div><div class='add'>+	ret = __check_host_shared_guest(vm, &amp;phys, ipa, size);</div><div class='ctx'> </div><div class='del'>-	hyp_unlock_component();</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> 	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	WARN_ON(ret &amp;&amp; ret != -ENOENT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages)</div><div class='add'>+int __pkvm_host_relax_perms_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu, enum kvm_pgtable_prot prot)</div><div class='ctx'> {</div><div class='add'>+	struct pkvm_hyp_vm *vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='add'>+	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> 	int ret;</div><div class='del'>-	u64 host_addr = hyp_pfn_to_phys(pfn);</div><div class='del'>-	u64 hyp_addr = (u64)__hyp_va(host_addr);</div><div class='del'>-	struct pkvm_mem_donation donation = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= nr_pages,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-				.addr	= host_addr,</div><div class='del'>-				.host	= {</div><div class='del'>-					.completer_addr = hyp_addr,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_HYP,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='add'>+	if (pkvm_hyp_vm_is_protected(vm))</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	ret = do_donate(&amp;donation);</div><div class='add'>+	if (prot &amp; ~KVM_PGTABLE_PROT_RWX)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	hyp_unlock_component();</div><div class='del'>-	host_unlock_component();</div><div class='add'>+	assert_host_shared_guest(vm, ipa, 0);</div><div class='add'>+	guest_lock_component(vm);</div><div class='add'>+	ret = kvm_pgtable_stage2_relax_perms(&amp;vm-&gt;pgt, ipa, prot, 0);</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_hyp_donate_host(u64 pfn, u64 nr_pages)</div><div class='add'>+int __pkvm_host_wrprotect_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='add'>+	u64 size, ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> 	int ret;</div><div class='del'>-	u64 host_addr = hyp_pfn_to_phys(pfn);</div><div class='del'>-	u64 hyp_addr = (u64)__hyp_va(host_addr);</div><div class='del'>-	struct pkvm_mem_donation donation = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= nr_pages,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HYP,</div><div class='del'>-				.addr	= hyp_addr,</div><div class='del'>-				.hyp	= {</div><div class='del'>-					.completer_addr = host_addr,</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='add'>+	if (pkvm_hyp_vm_is_protected(vm))</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	ret = do_donate(&amp;donation);</div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	hyp_unlock_component();</div><div class='del'>-	host_unlock_component();</div><div class='add'>+	assert_host_shared_guest(vm, ipa, size);</div><div class='add'>+	guest_lock_component(vm);</div><div class='add'>+	ret = kvm_pgtable_stage2_wrprotect(&amp;vm-&gt;pgt, ipa, size);</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hyp_pin_shared_mem(void *from, void *to)</div><div class='add'>+int __pkvm_host_test_clear_young_guest(u64 gfn, u64 nr_pages, bool mkold, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='del'>-	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='del'>-	u64 end = PAGE_ALIGN((u64)to);</div><div class='del'>-	u64 size = end - start;</div><div class='add'>+	u64 size, ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='del'>-</div><div class='del'>-	ret = __host_check_page_state_range(__hyp_pa(start), size,</div><div class='del'>-					    PKVM_PAGE_SHARED_OWNED);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto unlock;</div><div class='add'>+	if (pkvm_hyp_vm_is_protected(vm))</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	ret = __hyp_check_page_state_range(start, size,</div><div class='del'>-					   PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	for (cur = start; cur &lt; end; cur += PAGE_SIZE)</div><div class='del'>-		hyp_page_ref_inc(hyp_virt_to_page(cur));</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	hyp_unlock_component();</div><div class='del'>-	host_unlock_component();</div><div class='add'>+	assert_host_shared_guest(vm, ipa, size);</div><div class='add'>+	guest_lock_component(vm);</div><div class='add'>+	ret = kvm_pgtable_stage2_test_clear_young(&amp;vm-&gt;pgt, ipa, size, mkold);</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void hyp_unpin_shared_mem(void *from, void *to)</div><div class='add'>+int __pkvm_host_mkyoung_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='del'>-	u64 end = PAGE_ALIGN((u64)to);</div><div class='add'>+	struct pkvm_hyp_vm *vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='add'>+	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	hyp_lock_component();</div><div class='add'>+	if (pkvm_hyp_vm_is_protected(vm))</div><div class='add'>+		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	for (cur = start; cur &lt; end; cur += PAGE_SIZE)</div><div class='del'>-		hyp_page_ref_dec(hyp_virt_to_page(cur));</div><div class='add'>+	assert_host_shared_guest(vm, ipa, 0);</div><div class='add'>+	guest_lock_component(vm);</div><div class='add'>+	kvm_pgtable_stage2_mkyoung(&amp;vm-&gt;pgt, ipa, 0);</div><div class='add'>+	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='del'>-	hyp_unlock_component();</div><div class='del'>-	host_unlock_component();</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_share_ffa(u64 pfn, u64 nr_pages)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct pkvm_mem_share share = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= nr_pages,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-				.addr	= hyp_pfn_to_phys(pfn),</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_FFA,</div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+struct pkvm_expected_state {</div><div class='add'>+	enum pkvm_page_state host;</div><div class='add'>+	enum pkvm_page_state hyp;</div><div class='add'>+	enum pkvm_page_state guest[2]; /* [ gfn, gfn + 1 ] */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pkvm_expected_state selftest_state;</div><div class='add'>+static struct hyp_page *selftest_page;</div><div class='add'>+</div><div class='add'>+static struct pkvm_hyp_vm selftest_vm = {</div><div class='add'>+	.kvm = {</div><div class='add'>+		.arch = {</div><div class='add'>+			.mmu = {</div><div class='add'>+				.arch = &amp;selftest_vm.kvm.arch,</div><div class='add'>+				.pgt = &amp;selftest_vm.pgt,</div><div class='ctx'> 			},</div><div class='ctx'> 		},</div><div class='del'>-	};</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	host_lock_component();</div><div class='del'>-	ret = do_share(&amp;share);</div><div class='del'>-	host_unlock_component();</div><div class='add'>+static struct pkvm_hyp_vcpu selftest_vcpu = {</div><div class='add'>+	.vcpu = {</div><div class='add'>+		.arch = {</div><div class='add'>+			.hw_mmu = &amp;selftest_vm.kvm.arch.mmu,</div><div class='add'>+		},</div><div class='add'>+		.kvm = &amp;selftest_vm.kvm,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+static void init_selftest_vm(void *virt)</div><div class='add'>+{</div><div class='add'>+	struct hyp_page *p = hyp_virt_to_page(virt);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	selftest_vm.kvm.arch.mmu.vtcr = host_mmu.arch.mmu.vtcr;</div><div class='add'>+	WARN_ON(kvm_guest_prepare_stage2(&amp;selftest_vm, virt));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pkvm_selftest_pages(); i++) {</div><div class='add'>+		if (p[i].refcount)</div><div class='add'>+			continue;</div><div class='add'>+		p[i].refcount = 1;</div><div class='add'>+		hyp_put_page(&amp;selftest_vm.pool, hyp_page_to_virt(&amp;p[i]));</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_unshare_ffa(u64 pfn, u64 nr_pages)</div><div class='add'>+static u64 selftest_ipa(void)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct pkvm_mem_share share = {</div><div class='del'>-		.tx	= {</div><div class='del'>-			.nr_pages	= nr_pages,</div><div class='del'>-			.initiator	= {</div><div class='del'>-				.id	= PKVM_ID_HOST,</div><div class='del'>-				.addr	= hyp_pfn_to_phys(pfn),</div><div class='del'>-			},</div><div class='del'>-			.completer	= {</div><div class='del'>-				.id	= PKVM_ID_FFA,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='add'>+	return BIT(selftest_vm.pgt.ia_bits - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void assert_page_state(void)</div><div class='add'>+{</div><div class='add'>+	void *virt = hyp_page_to_virt(selftest_page);</div><div class='add'>+	u64 size = PAGE_SIZE &lt;&lt; selftest_page-&gt;order;</div><div class='add'>+	struct pkvm_hyp_vcpu *vcpu = &amp;selftest_vcpu;</div><div class='add'>+	u64 phys = hyp_virt_to_phys(virt);</div><div class='add'>+	u64 ipa[2] = { selftest_ipa(), selftest_ipa() + PAGE_SIZE };</div><div class='add'>+	struct pkvm_hyp_vm *vm;</div><div class='add'>+</div><div class='add'>+	vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='del'>-	ret = do_unshare(&amp;share);</div><div class='add'>+	WARN_ON(__host_check_page_state_range(phys, size, selftest_state.host));</div><div class='ctx'> 	host_unlock_component();</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+	hyp_lock_component();</div><div class='add'>+	WARN_ON(__hyp_check_page_state_range(phys, size, selftest_state.hyp));</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+</div><div class='add'>+	guest_lock_component(&amp;selftest_vm);</div><div class='add'>+	WARN_ON(__guest_check_page_state_range(vm, ipa[0], size, selftest_state.guest[0]));</div><div class='add'>+	WARN_ON(__guest_check_page_state_range(vm, ipa[1], size, selftest_state.guest[1]));</div><div class='add'>+	guest_unlock_component(&amp;selftest_vm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define assert_transition_res(res, fn, ...)		\</div><div class='add'>+	do {						\</div><div class='add'>+		WARN_ON(fn(__VA_ARGS__) != res);	\</div><div class='add'>+		assert_page_state();			\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+void pkvm_ownership_selftest(void *base)</div><div class='add'>+{</div><div class='add'>+	enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_RWX;</div><div class='add'>+	void *virt = hyp_alloc_pages(&amp;host_s2_pool, 0);</div><div class='add'>+	struct pkvm_hyp_vcpu *vcpu = &amp;selftest_vcpu;</div><div class='add'>+	struct pkvm_hyp_vm *vm = &amp;selftest_vm;</div><div class='add'>+	u64 phys, size, pfn, gfn;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!virt);</div><div class='add'>+	selftest_page = hyp_virt_to_page(virt);</div><div class='add'>+	selftest_page-&gt;refcount = 0;</div><div class='add'>+	init_selftest_vm(base);</div><div class='add'>+</div><div class='add'>+	size = PAGE_SIZE &lt;&lt; selftest_page-&gt;order;</div><div class='add'>+	phys = hyp_virt_to_phys(virt);</div><div class='add'>+	pfn = hyp_phys_to_pfn(phys);</div><div class='add'>+	gfn = hyp_phys_to_pfn(selftest_ipa());</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.guest[0] = selftest_state.guest[1] = PKVM_NOPAGE;</div><div class='add'>+	assert_page_state();</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	assert_transition_res(0,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	assert_transition_res(0,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	hyp_unpin_shared_mem(virt, virt + size);</div><div class='add'>+	WARN_ON(hyp_page_count(virt) != 1);</div><div class='add'>+	assert_transition_res(-EBUSY,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	hyp_unpin_shared_mem(virt, virt + size);</div><div class='add'>+	assert_page_state();</div><div class='add'>+	WARN_ON(hyp_page_count(virt));</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.guest[0] = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[1] = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_guest, pfn, gfn + 1, 1, vcpu, prot);</div><div class='add'>+	WARN_ON(hyp_virt_to_page(virt)-&gt;host_share_guest_count != 2);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[0] = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[1] = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_guest, gfn + 1, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_OWNED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+</div><div class='add'>+	selftest_page-&gt;refcount = 1;</div><div class='add'>+	hyp_put_page(&amp;host_s2_pool, virt);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/mm.c b/arch/arm64/kvm/hyp/nvhe/mm.c<br/>index 8850b591d775..ae8391baebc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/mm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/mm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/mm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/mm.c</a></div><div class='hunk'>@@ -229,9 +229,8 @@ int hyp_map_vectors(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *hyp_fixmap_map(phys_addr_t phys)</div><div class='add'>+static void *fixmap_map_slot(struct hyp_fixmap_slot *slot, phys_addr_t phys)</div><div class='ctx'> {</div><div class='del'>-	struct hyp_fixmap_slot *slot = this_cpu_ptr(&amp;fixmap_slots);</div><div class='ctx'> 	kvm_pte_t pte, *ptep = slot-&gt;ptep;</div><div class='ctx'> </div><div class='ctx'> 	pte = *ptep;</div><div class='hunk'>@@ -243,10 +242,21 @@ void *hyp_fixmap_map(phys_addr_t phys)</div><div class='ctx'> 	return (void *)slot-&gt;addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void *hyp_fixmap_map(phys_addr_t phys)</div><div class='add'>+{</div><div class='add'>+	return fixmap_map_slot(this_cpu_ptr(&amp;fixmap_slots), phys);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fixmap_clear_slot(struct hyp_fixmap_slot *slot)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_pte_t *ptep = slot-&gt;ptep;</div><div class='ctx'> 	u64 addr = slot-&gt;addr;</div><div class='add'>+	u32 level;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(KVM_PTE_TYPE, *ptep) == KVM_PTE_TYPE_PAGE)</div><div class='add'>+		level = KVM_PGTABLE_LAST_LEVEL;</div><div class='add'>+	else</div><div class='add'>+		level = KVM_PGTABLE_LAST_LEVEL - 1; /* create_fixblock() guarantees PMD level */</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*ptep, *ptep &amp; ~KVM_PTE_VALID);</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +270,7 @@ static void fixmap_clear_slot(struct hyp_fixmap_slot *slot)</div><div class='ctx'> 	 * https://lore.kernel.org/kvm/20221017115209.2099-1-will@kernel.org/T/#mf10dfbaf1eaef9274c581b81c53758918c1d0f03</div><div class='ctx'> 	 */</div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), KVM_PGTABLE_LAST_LEVEL);</div><div class='add'>+	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), level);</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='hunk'>@@ -273,9 +283,9 @@ void hyp_fixmap_unmap(void)</div><div class='ctx'> static int __create_fixmap_slot_cb(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 				   enum kvm_pgtable_walk_flags visit)</div><div class='ctx'> {</div><div class='del'>-	struct hyp_fixmap_slot *slot = per_cpu_ptr(&amp;fixmap_slots, (u64)ctx-&gt;arg);</div><div class='add'>+	struct hyp_fixmap_slot *slot = (struct hyp_fixmap_slot *)ctx-&gt;arg;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_pte_valid(ctx-&gt;old) || ctx-&gt;level != KVM_PGTABLE_LAST_LEVEL)</div><div class='add'>+	if (!kvm_pte_valid(ctx-&gt;old) || (ctx-&gt;end - ctx-&gt;start) != kvm_granule_size(ctx-&gt;level))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	slot-&gt;addr = ctx-&gt;addr;</div><div class='hunk'>@@ -296,13 +306,84 @@ static int create_fixmap_slot(u64 addr, u64 cpu)</div><div class='ctx'> 	struct kvm_pgtable_walker walker = {</div><div class='ctx'> 		.cb	= __create_fixmap_slot_cb,</div><div class='ctx'> 		.flags	= KVM_PGTABLE_WALK_LEAF,</div><div class='del'>-		.arg = (void *)cpu,</div><div class='add'>+		.arg	= per_cpu_ptr(&amp;fixmap_slots, cpu),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return kvm_pgtable_walk(&amp;pkvm_pgtable, addr, PAGE_SIZE, &amp;walker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hyp_create_pcpu_fixmap(void)</div><div class='add'>+#if PAGE_SHIFT &lt; 16</div><div class='add'>+#define HAS_FIXBLOCK</div><div class='add'>+static struct hyp_fixmap_slot hyp_fixblock_slot;</div><div class='add'>+static DEFINE_HYP_SPINLOCK(hyp_fixblock_lock);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int create_fixblock(void)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	struct kvm_pgtable_walker walker = {</div><div class='add'>+		.cb	= __create_fixmap_slot_cb,</div><div class='add'>+		.flags	= KVM_PGTABLE_WALK_LEAF,</div><div class='add'>+		.arg	= &amp;hyp_fixblock_slot,</div><div class='add'>+	};</div><div class='add'>+	unsigned long addr;</div><div class='add'>+	phys_addr_t phys;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Find a RAM phys address, PMD aligned */</div><div class='add'>+	for (i = 0; i &lt; hyp_memblock_nr; i++) {</div><div class='add'>+		phys = ALIGN(hyp_memory[i].base, PMD_SIZE);</div><div class='add'>+		if (phys + PMD_SIZE &lt; (hyp_memory[i].base + hyp_memory[i].size))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &gt;= hyp_memblock_nr)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;pkvm_pgd_lock);</div><div class='add'>+	addr = ALIGN(__io_map_base, PMD_SIZE);</div><div class='add'>+	ret = __pkvm_alloc_private_va_range(addr, PMD_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = kvm_pgtable_hyp_map(&amp;pkvm_pgtable, addr, PMD_SIZE, phys, PAGE_HYP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = kvm_pgtable_walk(&amp;pkvm_pgtable, addr, PMD_SIZE, &amp;walker);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	hyp_spin_unlock(&amp;pkvm_pgd_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *hyp_fixblock_map(phys_addr_t phys, size_t *size)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	*size = PMD_SIZE;</div><div class='add'>+	hyp_spin_lock(&amp;hyp_fixblock_lock);</div><div class='add'>+	return fixmap_map_slot(&amp;hyp_fixblock_slot, phys);</div><div class='add'>+#else</div><div class='add'>+	*size = PAGE_SIZE;</div><div class='add'>+	return hyp_fixmap_map(phys);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hyp_fixblock_unmap(void)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	fixmap_clear_slot(&amp;hyp_fixblock_slot);</div><div class='add'>+	hyp_spin_unlock(&amp;hyp_fixblock_lock);</div><div class='add'>+#else</div><div class='add'>+	hyp_fixmap_unmap();</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hyp_create_fixmap(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr, i;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -322,7 +403,7 @@ int hyp_create_pcpu_fixmap(void)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return create_fixblock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hyp_create_idmap(u32 hyp_va_bits)</div><div class='hunk'>@@ -360,10 +441,10 @@ int pkvm_create_stack(phys_addr_t phys, unsigned long *haddr)</div><div class='ctx'> </div><div class='ctx'> 	prev_base = __io_map_base;</div><div class='ctx'> 	/*</div><div class='del'>-	 * Efficient stack verification using the PAGE_SHIFT bit implies</div><div class='add'>+	 * Efficient stack verification using the NVHE_STACK_SHIFT bit implies</div><div class='ctx'> 	 * an alignment of our allocation on the order of the size.</div><div class='ctx'> 	 */</div><div class='del'>-	size = PAGE_SIZE * 2;</div><div class='add'>+	size = NVHE_STACK_SIZE * 2;</div><div class='ctx'> 	addr = ALIGN(__io_map_base, size);</div><div class='ctx'> </div><div class='ctx'> 	ret = __pkvm_alloc_private_va_range(addr, size);</div><div class='hunk'>@@ -373,12 +454,12 @@ int pkvm_create_stack(phys_addr_t phys, unsigned long *haddr)</div><div class='ctx'> 		 * at the higher address and leave the lower guard page</div><div class='ctx'> 		 * unbacked.</div><div class='ctx'> 		 *</div><div class='del'>-		 * Any valid stack address now has the PAGE_SHIFT bit as 1</div><div class='add'>+		 * Any valid stack address now has the NVHE_STACK_SHIFT bit as 1</div><div class='ctx'> 		 * and addresses corresponding to the guard page have the</div><div class='del'>-		 * PAGE_SHIFT bit as 0 - this is used for overflow detection.</div><div class='add'>+		 * NVHE_STACK_SHIFT bit as 0 - this is used for overflow detection.</div><div class='ctx'> 		 */</div><div class='del'>-		ret = kvm_pgtable_hyp_map(&amp;pkvm_pgtable, addr + PAGE_SIZE,</div><div class='del'>-					  PAGE_SIZE, phys, PAGE_HYP);</div><div class='add'>+		ret = kvm_pgtable_hyp_map(&amp;pkvm_pgtable, addr + NVHE_STACK_SIZE,</div><div class='add'>+					  NVHE_STACK_SIZE, phys, PAGE_HYP);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			__io_map_base = prev_base;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/page_alloc.c b/arch/arm64/kvm/hyp/nvhe/page_alloc.c<br/>index e691290d3765..a1eb27a1a747 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/page_alloc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/page_alloc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/page_alloc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/page_alloc.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ u64 __hyp_vmemmap;</div><div class='ctx'>  */</div><div class='ctx'> static struct hyp_page *__find_buddy_nocheck(struct hyp_pool *pool,</div><div class='ctx'> 					     struct hyp_page *p,</div><div class='del'>-					     unsigned short order)</div><div class='add'>+					     u8 order)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t addr = hyp_page_to_phys(p);</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +51,7 @@ static struct hyp_page *__find_buddy_nocheck(struct hyp_pool *pool,</div><div class='ctx'> /* Find a buddy page currently available for allocation */</div><div class='ctx'> static struct hyp_page *__find_buddy_avail(struct hyp_pool *pool,</div><div class='ctx'> 					   struct hyp_page *p,</div><div class='del'>-					   unsigned short order)</div><div class='add'>+					   u8 order)</div><div class='ctx'> {</div><div class='ctx'> 	struct hyp_page *buddy = __find_buddy_nocheck(pool, p, order);</div><div class='ctx'> </div><div class='hunk'>@@ -94,7 +94,7 @@ static void __hyp_attach_page(struct hyp_pool *pool,</div><div class='ctx'> 			      struct hyp_page *p)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t phys = hyp_page_to_phys(p);</div><div class='del'>-	unsigned short order = p-&gt;order;</div><div class='add'>+	u8 order = p-&gt;order;</div><div class='ctx'> 	struct hyp_page *buddy;</div><div class='ctx'> </div><div class='ctx'> 	memset(hyp_page_to_virt(p), 0, PAGE_SIZE &lt;&lt; p-&gt;order);</div><div class='hunk'>@@ -129,7 +129,7 @@ insert:</div><div class='ctx'> </div><div class='ctx'> static struct hyp_page *__hyp_extract_page(struct hyp_pool *pool,</div><div class='ctx'> 					   struct hyp_page *p,</div><div class='del'>-					   unsigned short order)</div><div class='add'>+					   u8 order)</div><div class='ctx'> {</div><div class='ctx'> 	struct hyp_page *buddy;</div><div class='ctx'> </div><div class='hunk'>@@ -183,7 +183,7 @@ void hyp_get_page(struct hyp_pool *pool, void *addr)</div><div class='ctx'> </div><div class='ctx'> void hyp_split_page(struct hyp_page *p)</div><div class='ctx'> {</div><div class='del'>-	unsigned short order = p-&gt;order;</div><div class='add'>+	u8 order = p-&gt;order;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;order = 0;</div><div class='hunk'>@@ -195,10 +195,10 @@ void hyp_split_page(struct hyp_page *p)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *hyp_alloc_pages(struct hyp_pool *pool, unsigned short order)</div><div class='add'>+void *hyp_alloc_pages(struct hyp_pool *pool, u8 order)</div><div class='ctx'> {</div><div class='del'>-	unsigned short i = order;</div><div class='ctx'> 	struct hyp_page *p;</div><div class='add'>+	u8 i = order;</div><div class='ctx'> </div><div class='ctx'> 	hyp_spin_lock(&amp;pool-&gt;lock);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c<br/>index 077d4098548d..05774aed09cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/pkvm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/pkvm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a></div><div class='hunk'>@@ -6,7 +6,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;nvhe/fixed_config.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/kvm_emulate.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;nvhe/mem_protect.h&gt;</div><div class='ctx'> #include &lt;nvhe/memory.h&gt;</div><div class='ctx'> #include &lt;nvhe/pkvm.h&gt;</div><div class='hunk'>@@ -21,197 +23,167 @@ unsigned int kvm_arm_vmid_bits;</div><div class='ctx'> unsigned int kvm_host_sve_max_vl;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Set trap register values based on features in ID_AA64PFR0.</div><div class='add'>+ * The currently loaded hyp vCPU for each physical CPU. Used in protected mode</div><div class='add'>+ * for both protected and non-protected VMs.</div><div class='ctx'>  */</div><div class='del'>-static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR0_EL1);</div><div class='del'>-	u64 hcr_set = HCR_RW;</div><div class='del'>-	u64 hcr_clear = 0;</div><div class='del'>-	u64 cptr_set = 0;</div><div class='del'>-	u64 cptr_clear = 0;</div><div class='add'>+static DEFINE_PER_CPU(struct pkvm_hyp_vcpu *, loaded_hyp_vcpu);</div><div class='ctx'> </div><div class='del'>-	/* Protected KVM does not support AArch32 guests. */</div><div class='del'>-	BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0),</div><div class='del'>-		PVM_ID_AA64PFR0_RESTRICT_UNSIGNED) != ID_AA64PFR0_EL1_EL0_IMP);</div><div class='del'>-	BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1),</div><div class='del'>-		PVM_ID_AA64PFR0_RESTRICT_UNSIGNED) != ID_AA64PFR0_EL1_EL1_IMP);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Linux guests assume support for floating-point and Advanced SIMD. Do</div><div class='del'>-	 * not change the trapping behavior for these from the KVM default.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_FP),</div><div class='del'>-				PVM_ID_AA64PFR0_ALLOW));</div><div class='del'>-	BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AdvSIMD),</div><div class='del'>-				PVM_ID_AA64PFR0_ALLOW));</div><div class='add'>+static void pkvm_vcpu_reset_hcr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.hcr_el2 = HCR_GUEST_FLAGS;</div><div class='ctx'> </div><div class='ctx'> 	if (has_hvhe())</div><div class='del'>-		hcr_set |= HCR_E2H;</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_E2H;</div><div class='ctx'> </div><div class='del'>-	/* Trap RAS unless all current versions are supported */</div><div class='del'>-	if (FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_RAS), feature_ids) &lt;</div><div class='del'>-	    ID_AA64PFR0_EL1_RAS_V1P1) {</div><div class='del'>-		hcr_set |= HCR_TERR | HCR_TEA;</div><div class='del'>-		hcr_clear |= HCR_FIEN;</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) {</div><div class='add'>+		/* route synchronous external abort exceptions to EL2 */</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_TEA;</div><div class='add'>+		/* trap error record accesses */</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_TERR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Trap AMU */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AMU), feature_ids)) {</div><div class='del'>-		hcr_clear |= HCR_AMVOFFEN;</div><div class='del'>-		cptr_set |= CPTR_EL2_TAM;</div><div class='del'>-	}</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_FWB;</div><div class='ctx'> </div><div class='del'>-	/* Trap SVE */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE), feature_ids)) {</div><div class='del'>-		if (has_hvhe())</div><div class='del'>-			cptr_clear |= CPACR_ELx_ZEN;</div><div class='del'>-		else</div><div class='del'>-			cptr_set |= CPTR_EL2_TZ;</div><div class='del'>-	}</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_EVT) &amp;&amp;</div><div class='add'>+	    !cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE) &amp;&amp;</div><div class='add'>+	    kvm_read_vm_id_reg(vcpu-&gt;kvm, SYS_CTR_EL0) == read_cpuid(CTR_EL0))</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_TID4;</div><div class='add'>+	else</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_TID2;</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.hcr_el2 |= hcr_set;</div><div class='del'>-	vcpu-&gt;arch.hcr_el2 &amp;= ~hcr_clear;</div><div class='del'>-	vcpu-&gt;arch.cptr_el2 |= cptr_set;</div><div class='del'>-	vcpu-&gt;arch.cptr_el2 &amp;= ~cptr_clear;</div><div class='add'>+	if (vcpu_has_ptrauth(vcpu))</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= (HCR_API | HCR_APK);</div><div class='add'>+</div><div class='add'>+	if (kvm_has_mte(vcpu-&gt;kvm))</div><div class='add'>+		vcpu-&gt;arch.hcr_el2 |= HCR_ATA;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set trap register values based on features in ID_AA64PFR1.</div><div class='del'>- */</div><div class='del'>-static void pvm_init_traps_aa64pfr1(struct kvm_vcpu *vcpu)</div><div class='add'>+static void pvm_init_traps_hcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR1_EL1);</div><div class='del'>-	u64 hcr_set = 0;</div><div class='del'>-	u64 hcr_clear = 0;</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	u64 val = vcpu-&gt;arch.hcr_el2;</div><div class='add'>+</div><div class='add'>+	/* No support for AArch32. */</div><div class='add'>+	val |= HCR_RW;</div><div class='ctx'> </div><div class='del'>-	/* Memory Tagging: Trap and Treat as Untagged if not supported. */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE), feature_ids)) {</div><div class='del'>-		hcr_set |= HCR_TID5;</div><div class='del'>-		hcr_clear |= HCR_DCT | HCR_ATA;</div><div class='add'>+	/*</div><div class='add'>+	 * Always trap:</div><div class='add'>+	 * - Feature id registers: to control features exposed to guests</div><div class='add'>+	 * - Implementation-defined features</div><div class='add'>+	 */</div><div class='add'>+	val |= HCR_TACR | HCR_TIDCP | HCR_TID3 | HCR_TID1;</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {</div><div class='add'>+		val |= HCR_TERR | HCR_TEA;</div><div class='add'>+		val &amp;= ~(HCR_FIEN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.hcr_el2 |= hcr_set;</div><div class='del'>-	vcpu-&gt;arch.hcr_el2 &amp;= ~hcr_clear;</div><div class='del'>-}</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, IMP))</div><div class='add'>+		val &amp;= ~(HCR_AMVOFFEN);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set trap register values based on features in ID_AA64DFR0.</div><div class='del'>- */</div><div class='del'>-static void pvm_init_traps_aa64dfr0(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64DFR0_EL1);</div><div class='del'>-	u64 mdcr_set = 0;</div><div class='del'>-	u64 mdcr_clear = 0;</div><div class='del'>-	u64 cptr_set = 0;</div><div class='del'>-</div><div class='del'>-	/* Trap/constrain PMU */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), feature_ids)) {</div><div class='del'>-		mdcr_set |= MDCR_EL2_TPM | MDCR_EL2_TPMCR;</div><div class='del'>-		mdcr_clear |= MDCR_EL2_HPME | MDCR_EL2_MTPME |</div><div class='del'>-			      MDCR_EL2_HPMN_MASK;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, MTE, IMP)) {</div><div class='add'>+		val |= HCR_TID5;</div><div class='add'>+		val &amp;= ~(HCR_DCT | HCR_ATA);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Trap Debug */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVer), feature_ids))</div><div class='del'>-		mdcr_set |= MDCR_EL2_TDRA | MDCR_EL2_TDA | MDCR_EL2_TDE;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))</div><div class='add'>+		val |= HCR_TLOR;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.hcr_el2 = val;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Trap OS Double Lock */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DoubleLock), feature_ids))</div><div class='del'>-		mdcr_set |= MDCR_EL2_TDOSA;</div><div class='add'>+static void pvm_init_traps_mdcr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	u64 val = vcpu-&gt;arch.mdcr_el2;</div><div class='ctx'> </div><div class='del'>-	/* Trap SPE */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMSVer), feature_ids)) {</div><div class='del'>-		mdcr_set |= MDCR_EL2_TPMS;</div><div class='del'>-		mdcr_clear |= MDCR_EL2_E2PB_MASK &lt;&lt; MDCR_EL2_E2PB_SHIFT;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP)) {</div><div class='add'>+		val |= MDCR_EL2_TPM | MDCR_EL2_TPMCR;</div><div class='add'>+		val &amp;= ~(MDCR_EL2_HPME | MDCR_EL2_MTPME | MDCR_EL2_HPMN_MASK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Trap Trace Filter */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_TraceFilt), feature_ids))</div><div class='del'>-		mdcr_set |= MDCR_EL2_TTRF;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DebugVer, IMP))</div><div class='add'>+		val |= MDCR_EL2_TDRA | MDCR_EL2_TDA;</div><div class='ctx'> </div><div class='del'>-	/* Trap Trace */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_TraceVer), feature_ids)) {</div><div class='del'>-		if (has_hvhe())</div><div class='del'>-			cptr_set |= CPACR_EL1_TTA;</div><div class='del'>-		else</div><div class='del'>-			cptr_set |= CPTR_EL2_TTA;</div><div class='del'>-	}</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DoubleLock, IMP))</div><div class='add'>+		val |= MDCR_EL2_TDOSA;</div><div class='ctx'> </div><div class='del'>-	/* Trap External Trace */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_ExtTrcBuff), feature_ids))</div><div class='del'>-		mdcr_clear |= MDCR_EL2_E2TB_MASK &lt;&lt; MDCR_EL2_E2TB_SHIFT;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, IMP)) {</div><div class='add'>+		val |= MDCR_EL2_TPMS;</div><div class='add'>+		val &amp;= ~MDCR_EL2_E2PB_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.mdcr_el2 |= mdcr_set;</div><div class='del'>-	vcpu-&gt;arch.mdcr_el2 &amp;= ~mdcr_clear;</div><div class='del'>-	vcpu-&gt;arch.cptr_el2 |= cptr_set;</div><div class='del'>-}</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceFilt, IMP))</div><div class='add'>+		val |= MDCR_EL2_TTRF;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set trap register values based on features in ID_AA64MMFR0.</div><div class='del'>- */</div><div class='del'>-static void pvm_init_traps_aa64mmfr0(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR0_EL1);</div><div class='del'>-	u64 mdcr_set = 0;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, ExtTrcBuff, IMP))</div><div class='add'>+		val |= MDCR_EL2_E2TB_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* Trap Debug Communications Channel registers */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_FGT), feature_ids))</div><div class='del'>-		mdcr_set |= MDCR_EL2_TDCC;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, FGT, IMP))</div><div class='add'>+		val |= MDCR_EL2_TDCC;</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.mdcr_el2 |= mdcr_set;</div><div class='add'>+	vcpu-&gt;arch.mdcr_el2 = val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Set trap register values based on features in ID_AA64MMFR1.</div><div class='add'>+ * Check that cpu features that are neither trapped nor supported are not</div><div class='add'>+ * enabled for protected VMs.</div><div class='ctx'>  */</div><div class='del'>-static void pvm_init_traps_aa64mmfr1(struct kvm_vcpu *vcpu)</div><div class='add'>+static int pkvm_check_pvm_cpu_features(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1);</div><div class='del'>-	u64 hcr_set = 0;</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='ctx'> </div><div class='del'>-	/* Trap LOR */</div><div class='del'>-	if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_LO), feature_ids))</div><div class='del'>-		hcr_set |= HCR_TLOR;</div><div class='del'>-</div><div class='del'>-	vcpu-&gt;arch.hcr_el2 |= hcr_set;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set baseline trap register values.</div><div class='del'>- */</div><div class='del'>-static void pvm_init_trap_regs(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	const u64 hcr_trap_feat_regs = HCR_TID3;</div><div class='del'>-	const u64 hcr_trap_impdef = HCR_TACR | HCR_TIDCP | HCR_TID1;</div><div class='add'>+	/* No AArch32 support for protected guests. */</div><div class='add'>+	if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL0, AARCH32) ||</div><div class='add'>+	    kvm_has_feat(kvm, ID_AA64PFR0_EL1, EL1, AARCH32))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Always trap:</div><div class='del'>-	 * - Feature id registers: to control features exposed to guests</div><div class='del'>-	 * - Implementation-defined features</div><div class='add'>+	 * Linux guests assume support for floating-point and Advanced SIMD. Do</div><div class='add'>+	 * not change the trapping behavior for these from the KVM default.</div><div class='ctx'> 	 */</div><div class='del'>-	vcpu-&gt;arch.hcr_el2 |= hcr_trap_feat_regs | hcr_trap_impdef;</div><div class='del'>-</div><div class='del'>-	/* Clear res0 and set res1 bits to trap potential new features. */</div><div class='del'>-	vcpu-&gt;arch.hcr_el2 &amp;= ~(HCR_RES0);</div><div class='del'>-	vcpu-&gt;arch.mdcr_el2 &amp;= ~(MDCR_EL2_RES0);</div><div class='del'>-	if (!has_hvhe()) {</div><div class='del'>-		vcpu-&gt;arch.cptr_el2 |= CPTR_NVHE_EL2_RES1;</div><div class='del'>-		vcpu-&gt;arch.cptr_el2 &amp;= ~(CPTR_NVHE_EL2_RES0);</div><div class='del'>-	}</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, FP, IMP) ||</div><div class='add'>+	    !kvm_has_feat(kvm, ID_AA64PFR0_EL1, AdvSIMD, IMP))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* No SME support in KVM right now. Check to catch if it changes. */</div><div class='add'>+	if (kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Initialize trap register values in protected mode.</div><div class='ctx'>  */</div><div class='del'>-void __pkvm_vcpu_init_traps(struct kvm_vcpu *vcpu)</div><div class='add'>+static int pkvm_vcpu_init_traps(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> {</div><div class='del'>-	pvm_init_trap_regs(vcpu);</div><div class='del'>-	pvm_init_traps_aa64pfr0(vcpu);</div><div class='del'>-	pvm_init_traps_aa64pfr1(vcpu);</div><div class='del'>-	pvm_init_traps_aa64dfr0(vcpu);</div><div class='del'>-	pvm_init_traps_aa64mmfr0(vcpu);</div><div class='del'>-	pvm_init_traps_aa64mmfr1(vcpu);</div><div class='add'>+	struct kvm_vcpu *vcpu = &amp;hyp_vcpu-&gt;vcpu;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.mdcr_el2 = 0;</div><div class='add'>+</div><div class='add'>+	pkvm_vcpu_reset_hcr(vcpu);</div><div class='add'>+</div><div class='add'>+	if ((!pkvm_hyp_vcpu_is_protected(hyp_vcpu))) {</div><div class='add'>+		struct kvm_vcpu *host_vcpu = hyp_vcpu-&gt;host_vcpu;</div><div class='add'>+</div><div class='add'>+		/* Trust the host for non-protected vcpu features. */</div><div class='add'>+		vcpu-&gt;arch.hcrx_el2 = host_vcpu-&gt;arch.hcrx_el2;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pkvm_check_pvm_cpu_features(vcpu);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pvm_init_traps_hcr(vcpu);</div><div class='add'>+	pvm_init_traps_mdcr(vcpu);</div><div class='add'>+	vcpu_set_hcrx(vcpu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -220,6 +192,11 @@ void __pkvm_vcpu_init_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'>  */</div><div class='ctx'> #define HANDLE_OFFSET 0x1000</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Marks a reserved but not yet used entry in the VM table.</div><div class='add'>+ */</div><div class='add'>+#define RESERVED_ENTRY ((void *)0xa110ca7ed)</div><div class='add'>+</div><div class='ctx'> static unsigned int vm_handle_to_idx(pkvm_handle_t handle)</div><div class='ctx'> {</div><div class='ctx'> 	return handle - HANDLE_OFFSET;</div><div class='hunk'>@@ -232,14 +209,14 @@ static pkvm_handle_t idx_to_vm_handle(unsigned int idx)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Spinlock for protecting state related to the VM table. Protects writes</div><div class='del'>- * to 'vm_table' and 'nr_table_entries' as well as reads and writes to</div><div class='del'>- * 'last_hyp_vcpu_lookup'.</div><div class='add'>+ * to 'vm_table', 'nr_table_entries', and other per-vm state on initialization.</div><div class='add'>+ * Also protects reads and writes to 'last_hyp_vcpu_lookup'.</div><div class='ctx'>  */</div><div class='del'>-static DEFINE_HYP_SPINLOCK(vm_table_lock);</div><div class='add'>+DEFINE_HYP_SPINLOCK(vm_table_lock);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The table of VM entries for protected VMs in hyp.</div><div class='del'>- * Allocated at hyp initialization and setup.</div><div class='add'>+ * A table that tracks all VMs in protected mode.</div><div class='add'>+ * Allocated during hyp initialization and setup.</div><div class='ctx'>  */</div><div class='ctx'> static struct pkvm_hyp_vm **vm_table;</div><div class='ctx'> </div><div class='hunk'>@@ -259,6 +236,10 @@ static struct pkvm_hyp_vm *get_vm_by_handle(pkvm_handle_t handle)</div><div class='ctx'> 	if (unlikely(idx &gt;= KVM_MAX_PVMS))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	/* A reserved entry doesn't represent an initialized VM. */</div><div class='add'>+	if (unlikely(vm_table[idx] == RESERVED_ENTRY))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='ctx'> 	return vm_table[idx];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -268,15 +249,32 @@ struct pkvm_hyp_vcpu *pkvm_load_hyp_vcpu(pkvm_handle_t handle,</div><div class='ctx'> 	struct pkvm_hyp_vcpu *hyp_vcpu = NULL;</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm;</div><div class='ctx'> </div><div class='add'>+	/* Cannot load a new vcpu without putting the old one first. */</div><div class='add'>+	if (__this_cpu_read(loaded_hyp_vcpu))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='ctx'> 	hyp_spin_lock(&amp;vm_table_lock);</div><div class='ctx'> 	hyp_vm = get_vm_by_handle(handle);</div><div class='del'>-	if (!hyp_vm || hyp_vm-&gt;nr_vcpus &lt;= vcpu_idx)</div><div class='add'>+	if (!hyp_vm || hyp_vm-&gt;kvm.created_vcpus &lt;= vcpu_idx)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu = hyp_vm-&gt;vcpus[vcpu_idx];</div><div class='add'>+	if (!hyp_vcpu)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/* Ensure vcpu isn't loaded on more than one cpu simultaneously. */</div><div class='add'>+	if (unlikely(hyp_vcpu-&gt;loaded_hyp_vcpu)) {</div><div class='add'>+		hyp_vcpu = NULL;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hyp_vcpu-&gt;loaded_hyp_vcpu = this_cpu_ptr(&amp;loaded_hyp_vcpu);</div><div class='ctx'> 	hyp_page_ref_inc(hyp_virt_to_page(hyp_vm));</div><div class='ctx'> unlock:</div><div class='ctx'> 	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	if (hyp_vcpu)</div><div class='add'>+		__this_cpu_write(loaded_hyp_vcpu, hyp_vcpu);</div><div class='ctx'> 	return hyp_vcpu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -285,63 +283,225 @@ void pkvm_put_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm = pkvm_hyp_vcpu_to_hyp_vm(hyp_vcpu);</div><div class='ctx'> </div><div class='ctx'> 	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	hyp_vcpu-&gt;loaded_hyp_vcpu = NULL;</div><div class='add'>+	__this_cpu_write(loaded_hyp_vcpu, NULL);</div><div class='ctx'> 	hyp_page_ref_dec(hyp_virt_to_page(hyp_vm));</div><div class='ctx'> 	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct pkvm_hyp_vcpu *pkvm_get_loaded_hyp_vcpu(void)</div><div class='add'>+{</div><div class='add'>+	return __this_cpu_read(loaded_hyp_vcpu);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct pkvm_hyp_vm *get_pkvm_hyp_vm(pkvm_handle_t handle)</div><div class='add'>+{</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	hyp_vm = get_vm_by_handle(handle);</div><div class='add'>+	if (hyp_vm)</div><div class='add'>+		hyp_page_ref_inc(hyp_virt_to_page(hyp_vm));</div><div class='add'>+	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	return hyp_vm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void put_pkvm_hyp_vm(struct pkvm_hyp_vm *hyp_vm)</div><div class='add'>+{</div><div class='add'>+	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	hyp_page_ref_dec(hyp_virt_to_page(hyp_vm));</div><div class='add'>+	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct pkvm_hyp_vm *get_np_pkvm_hyp_vm(pkvm_handle_t handle)</div><div class='add'>+{</div><div class='add'>+	struct pkvm_hyp_vm *hyp_vm = get_pkvm_hyp_vm(handle);</div><div class='add'>+</div><div class='add'>+	if (hyp_vm &amp;&amp; pkvm_hyp_vm_is_protected(hyp_vm)) {</div><div class='add'>+		put_pkvm_hyp_vm(hyp_vm);</div><div class='add'>+		hyp_vm = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hyp_vm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struct kvm *host_kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = &amp;hyp_vm-&gt;kvm;</div><div class='add'>+	unsigned long host_arch_flags = READ_ONCE(host_kvm-&gt;arch.flags);</div><div class='add'>+	DECLARE_BITMAP(allowed_features, KVM_VCPU_MAX_FEATURES);</div><div class='add'>+</div><div class='add'>+	/* CTR_EL0 is always under host control, even for protected VMs. */</div><div class='add'>+	hyp_vm-&gt;kvm.arch.ctr_el0 = host_kvm-&gt;arch.ctr_el0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &amp;host_kvm-&gt;arch.flags))</div><div class='add'>+		set_bit(KVM_ARCH_FLAG_MTE_ENABLED, &amp;kvm-&gt;arch.flags);</div><div class='add'>+</div><div class='add'>+	/* No restrictions for non-protected VMs. */</div><div class='add'>+	if (!kvm_vm_is_protected(kvm)) {</div><div class='add'>+		hyp_vm-&gt;kvm.arch.flags = host_arch_flags;</div><div class='add'>+</div><div class='add'>+		bitmap_copy(kvm-&gt;arch.vcpu_features,</div><div class='add'>+			    host_kvm-&gt;arch.vcpu_features,</div><div class='add'>+			    KVM_VCPU_MAX_FEATURES);</div><div class='add'>+</div><div class='add'>+		if (test_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &amp;host_arch_flags))</div><div class='add'>+			hyp_vm-&gt;kvm.arch.midr_el1 = host_kvm-&gt;arch.midr_el1;</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap_zero(allowed_features, KVM_VCPU_MAX_FEATURES);</div><div class='add'>+</div><div class='add'>+	set_bit(KVM_ARM_VCPU_PSCI_0_2, allowed_features);</div><div class='add'>+</div><div class='add'>+	if (kvm_pvm_ext_allowed(KVM_CAP_ARM_PMU_V3))</div><div class='add'>+		set_bit(KVM_ARM_VCPU_PMU_V3, allowed_features);</div><div class='add'>+</div><div class='add'>+	if (kvm_pvm_ext_allowed(KVM_CAP_ARM_PTRAUTH_ADDRESS))</div><div class='add'>+		set_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, allowed_features);</div><div class='add'>+</div><div class='add'>+	if (kvm_pvm_ext_allowed(KVM_CAP_ARM_PTRAUTH_GENERIC))</div><div class='add'>+		set_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, allowed_features);</div><div class='add'>+</div><div class='add'>+	if (kvm_pvm_ext_allowed(KVM_CAP_ARM_SVE)) {</div><div class='add'>+		set_bit(KVM_ARM_VCPU_SVE, allowed_features);</div><div class='add'>+		kvm-&gt;arch.flags |= host_arch_flags &amp; BIT(KVM_ARCH_FLAG_GUEST_HAS_SVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap_and(kvm-&gt;arch.vcpu_features, host_kvm-&gt;arch.vcpu_features,</div><div class='add'>+		   allowed_features, KVM_VCPU_MAX_FEATURES);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void unpin_host_vcpu(struct kvm_vcpu *host_vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (host_vcpu)</div><div class='ctx'> 		hyp_unpin_shared_mem(host_vcpu, host_vcpu + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void unpin_host_sve_state(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='add'>+{</div><div class='add'>+	void *sve_state;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_feature(&amp;hyp_vcpu-&gt;vcpu, KVM_ARM_VCPU_SVE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sve_state = kern_hyp_va(hyp_vcpu-&gt;vcpu.arch.sve_state);</div><div class='add'>+	hyp_unpin_shared_mem(sve_state,</div><div class='add'>+			     sve_state + vcpu_sve_state_size(&amp;hyp_vcpu-&gt;vcpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void unpin_host_vcpus(struct pkvm_hyp_vcpu *hyp_vcpus[],</div><div class='ctx'> 			     unsigned int nr_vcpus)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nr_vcpus; i++)</div><div class='del'>-		unpin_host_vcpu(hyp_vcpus[i]-&gt;host_vcpu);</div><div class='add'>+	for (i = 0; i &lt; nr_vcpus; i++) {</div><div class='add'>+		struct pkvm_hyp_vcpu *hyp_vcpu = hyp_vcpus[i];</div><div class='add'>+</div><div class='add'>+		if (!hyp_vcpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		unpin_host_vcpu(hyp_vcpu-&gt;host_vcpu);</div><div class='add'>+		unpin_host_sve_state(hyp_vcpu);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void init_pkvm_hyp_vm(struct kvm *host_kvm, struct pkvm_hyp_vm *hyp_vm,</div><div class='del'>-			     unsigned int nr_vcpus)</div><div class='add'>+			     unsigned int nr_vcpus, pkvm_handle_t handle)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_s2_mmu *mmu = &amp;hyp_vm-&gt;kvm.arch.mmu;</div><div class='add'>+	int idx = vm_handle_to_idx(handle);</div><div class='add'>+</div><div class='add'>+	hyp_vm-&gt;kvm.arch.pkvm.handle = handle;</div><div class='add'>+</div><div class='ctx'> 	hyp_vm-&gt;host_kvm = host_kvm;</div><div class='ctx'> 	hyp_vm-&gt;kvm.created_vcpus = nr_vcpus;</div><div class='del'>-	hyp_vm-&gt;kvm.arch.mmu.vtcr = host_mmu.arch.mmu.vtcr;</div><div class='add'>+	hyp_vm-&gt;kvm.arch.pkvm.is_protected = READ_ONCE(host_kvm-&gt;arch.pkvm.is_protected);</div><div class='add'>+	hyp_vm-&gt;kvm.arch.pkvm.is_created = true;</div><div class='add'>+	hyp_vm-&gt;kvm.arch.flags = 0;</div><div class='add'>+	pkvm_init_features_from_host(hyp_vm, host_kvm);</div><div class='add'>+</div><div class='add'>+	/* VMID 0 is reserved for the host */</div><div class='add'>+	atomic64_set(&amp;mmu-&gt;vmid.id, idx + 1);</div><div class='add'>+</div><div class='add'>+	mmu-&gt;vtcr = host_mmu.arch.mmu.vtcr;</div><div class='add'>+	mmu-&gt;arch = &amp;hyp_vm-&gt;kvm.arch;</div><div class='add'>+	mmu-&gt;pgt = &amp;hyp_vm-&gt;pgt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pkvm_vcpu_init_sve(struct pkvm_hyp_vcpu *hyp_vcpu, struct kvm_vcpu *host_vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = &amp;hyp_vcpu-&gt;vcpu;</div><div class='add'>+	unsigned int sve_max_vl;</div><div class='add'>+	size_t sve_state_size;</div><div class='add'>+	void *sve_state;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE)) {</div><div class='add'>+		vcpu_clear_flag(vcpu, VCPU_SVE_FINALIZED);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Limit guest vector length to the maximum supported by the host. */</div><div class='add'>+	sve_max_vl = min(READ_ONCE(host_vcpu-&gt;arch.sve_max_vl), kvm_host_sve_max_vl);</div><div class='add'>+	sve_state_size = sve_state_size_from_vl(sve_max_vl);</div><div class='add'>+	sve_state = kern_hyp_va(READ_ONCE(host_vcpu-&gt;arch.sve_state));</div><div class='add'>+</div><div class='add'>+	if (!sve_state || !sve_state_size) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hyp_pin_shared_mem(sve_state, sve_state + sve_state_size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.sve_state = sve_state;</div><div class='add'>+	vcpu-&gt;arch.sve_max_vl = sve_max_vl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	clear_bit(KVM_ARM_VCPU_SVE, vcpu-&gt;kvm-&gt;arch.vcpu_features);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,</div><div class='ctx'> 			      struct pkvm_hyp_vm *hyp_vm,</div><div class='del'>-			      struct kvm_vcpu *host_vcpu,</div><div class='del'>-			      unsigned int vcpu_idx)</div><div class='add'>+			      struct kvm_vcpu *host_vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (hyp_pin_shared_mem(host_vcpu, host_vcpu + 1))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	if (host_vcpu-&gt;vcpu_idx != vcpu_idx) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	hyp_vcpu-&gt;host_vcpu = host_vcpu;</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.kvm = &amp;hyp_vm-&gt;kvm;</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.vcpu_id = READ_ONCE(host_vcpu-&gt;vcpu_id);</div><div class='del'>-	hyp_vcpu-&gt;vcpu.vcpu_idx = vcpu_idx;</div><div class='add'>+	hyp_vcpu-&gt;vcpu.vcpu_idx = READ_ONCE(host_vcpu-&gt;vcpu_idx);</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.hw_mmu = &amp;hyp_vm-&gt;kvm.arch.mmu;</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.cflags = READ_ONCE(host_vcpu-&gt;arch.cflags);</div><div class='add'>+	hyp_vcpu-&gt;vcpu.arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu))</div><div class='add'>+		kvm_init_pvm_id_regs(&amp;hyp_vcpu-&gt;vcpu);</div><div class='add'>+</div><div class='add'>+	ret = pkvm_vcpu_init_traps(hyp_vcpu);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	ret = pkvm_vcpu_init_sve(hyp_vcpu, host_vcpu);</div><div class='ctx'> done:</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		unpin_host_vcpu(host_vcpu);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int find_free_vm_table_entry(struct kvm *host_kvm)</div><div class='add'>+static int find_free_vm_table_entry(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -354,15 +514,13 @@ static int find_free_vm_table_entry(struct kvm *host_kvm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Allocate a VM table entry and insert a pointer to the new vm.</div><div class='add'>+ * Reserve a VM table entry.</div><div class='ctx'>  *</div><div class='del'>- * Return a unique handle to the protected VM on success,</div><div class='add'>+ * Return a unique handle to the VM on success,</div><div class='ctx'>  * negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-static pkvm_handle_t insert_vm_table_entry(struct kvm *host_kvm,</div><div class='del'>-					   struct pkvm_hyp_vm *hyp_vm)</div><div class='add'>+static int allocate_vm_table_entry(void)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_s2_mmu *mmu = &amp;hyp_vm-&gt;kvm.arch.mmu;</div><div class='ctx'> 	int idx;</div><div class='ctx'> </div><div class='ctx'> 	hyp_assert_lock_held(&amp;vm_table_lock);</div><div class='hunk'>@@ -375,20 +533,57 @@ static pkvm_handle_t insert_vm_table_entry(struct kvm *host_kvm,</div><div class='ctx'> 	if (unlikely(!vm_table))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	idx = find_free_vm_table_entry(host_kvm);</div><div class='del'>-	if (idx &lt; 0)</div><div class='add'>+	idx = find_free_vm_table_entry();</div><div class='add'>+	if (unlikely(idx &lt; 0))</div><div class='ctx'> 		return idx;</div><div class='ctx'> </div><div class='del'>-	hyp_vm-&gt;kvm.arch.pkvm.handle = idx_to_vm_handle(idx);</div><div class='add'>+	vm_table[idx] = RESERVED_ENTRY;</div><div class='ctx'> </div><div class='del'>-	/* VMID 0 is reserved for the host */</div><div class='del'>-	atomic64_set(&amp;mmu-&gt;vmid.id, idx + 1);</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	mmu-&gt;arch = &amp;hyp_vm-&gt;kvm.arch;</div><div class='del'>-	mmu-&gt;pgt = &amp;hyp_vm-&gt;pgt;</div><div class='add'>+static int __insert_vm_table_entry(pkvm_handle_t handle,</div><div class='add'>+				   struct pkvm_hyp_vm *hyp_vm)</div><div class='add'>+{</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	hyp_assert_lock_held(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initializing protected state might have failed, yet a malicious</div><div class='add'>+	 * host could trigger this function. Thus, ensure that 'vm_table'</div><div class='add'>+	 * exists.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!vm_table))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	idx = vm_handle_to_idx(handle);</div><div class='add'>+	if (unlikely(idx &gt;= KVM_MAX_PVMS))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vm_table[idx] != RESERVED_ENTRY))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	vm_table[idx] = hyp_vm;</div><div class='del'>-	return hyp_vm-&gt;kvm.arch.pkvm.handle;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Insert a pointer to the initialized VM into the VM table.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success, or negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int insert_vm_table_entry(pkvm_handle_t handle,</div><div class='add'>+				 struct pkvm_hyp_vm *hyp_vm)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	ret = __insert_vm_table_entry(handle, hyp_vm);</div><div class='add'>+	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -455,10 +650,45 @@ static void unmap_donated_memory_noclear(void *va, size_t size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Initialize the hypervisor copy of the protected VM state using the</div><div class='del'>- * memory donated by the host.</div><div class='add'>+ * Reserves an entry in the hypervisor for a new VM in protected mode.</div><div class='ctx'>  *</div><div class='del'>- * Unmaps the donated memory from the host at stage 2.</div><div class='add'>+ * Return a unique handle to the VM on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int __pkvm_reserve_vm(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	ret = allocate_vm_table_entry();</div><div class='add'>+	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return idx_to_vm_handle(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Removes a reserved entry, but only if is hasn't been used yet.</div><div class='add'>+ * Otherwise, the VM needs to be destroyed.</div><div class='add'>+ */</div><div class='add'>+void __pkvm_unreserve_vm(pkvm_handle_t handle)</div><div class='add'>+{</div><div class='add'>+	unsigned int idx = vm_handle_to_idx(handle);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!vm_table))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;vm_table_lock);</div><div class='add'>+	if (likely(idx &lt; KVM_MAX_PVMS &amp;&amp; vm_table[idx] == RESERVED_ENTRY))</div><div class='add'>+		remove_vm_table_entry(handle);</div><div class='add'>+	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the hypervisor copy of the VM state using host-donated memory.</div><div class='add'>+ *</div><div class='add'>+ * Unmap the donated memory from the host at stage 2.</div><div class='ctx'>  *</div><div class='ctx'>  * host_kvm: A pointer to the host's struct kvm.</div><div class='ctx'>  * vm_hva: The host va of the area being donated for the VM state.</div><div class='hunk'>@@ -467,8 +697,7 @@ static void unmap_donated_memory_noclear(void *va, size_t size)</div><div class='ctx'>  *	    the VM. Must be page aligned. Its size is implied by the VM's</div><div class='ctx'>  *	    VTCR.</div><div class='ctx'>  *</div><div class='del'>- * Return a unique handle to the protected VM on success,</div><div class='del'>- * negative error code on failure.</div><div class='add'>+ * Return 0 success, negative error code on failure.</div><div class='ctx'>  */</div><div class='ctx'> int __pkvm_init_vm(struct kvm *host_kvm, unsigned long vm_hva,</div><div class='ctx'> 		   unsigned long pgd_hva)</div><div class='hunk'>@@ -476,6 +705,7 @@ int __pkvm_init_vm(struct kvm *host_kvm, unsigned long vm_hva,</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm = NULL;</div><div class='ctx'> 	size_t vm_size, pgd_size;</div><div class='ctx'> 	unsigned int nr_vcpus;</div><div class='add'>+	pkvm_handle_t handle;</div><div class='ctx'> 	void *pgd = NULL;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -489,6 +719,12 @@ int __pkvm_init_vm(struct kvm *host_kvm, unsigned long vm_hva,</div><div class='ctx'> 		goto err_unpin_kvm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	handle = READ_ONCE(host_kvm-&gt;arch.pkvm.handle);</div><div class='add'>+	if (unlikely(handle &lt; HANDLE_OFFSET)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_unpin_kvm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	vm_size = pkvm_get_hyp_vm_size(nr_vcpus);</div><div class='ctx'> 	pgd_size = kvm_pgtable_stage2_pgd_size(host_mmu.arch.mmu.vtcr);</div><div class='ctx'> </div><div class='hunk'>@@ -502,24 +738,19 @@ int __pkvm_init_vm(struct kvm *host_kvm, unsigned long vm_hva,</div><div class='ctx'> 	if (!pgd)</div><div class='ctx'> 		goto err_remove_mappings;</div><div class='ctx'> </div><div class='del'>-	init_pkvm_hyp_vm(host_kvm, hyp_vm, nr_vcpus);</div><div class='del'>-</div><div class='del'>-	hyp_spin_lock(&amp;vm_table_lock);</div><div class='del'>-	ret = insert_vm_table_entry(host_kvm, hyp_vm);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err_unlock;</div><div class='add'>+	init_pkvm_hyp_vm(host_kvm, hyp_vm, nr_vcpus, handle);</div><div class='ctx'> </div><div class='ctx'> 	ret = kvm_guest_prepare_stage2(hyp_vm, pgd);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_remove_vm_table_entry;</div><div class='del'>-	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='add'>+		goto err_remove_mappings;</div><div class='ctx'> </div><div class='del'>-	return hyp_vm-&gt;kvm.arch.pkvm.handle;</div><div class='add'>+	/* Must be called last since this publishes the VM. */</div><div class='add'>+	ret = insert_vm_table_entry(handle, hyp_vm);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_remove_mappings;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-err_remove_vm_table_entry:</div><div class='del'>-	remove_vm_table_entry(hyp_vm-&gt;kvm.arch.pkvm.handle);</div><div class='del'>-err_unlock:</div><div class='del'>-	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='ctx'> err_remove_mappings:</div><div class='ctx'> 	unmap_donated_memory(hyp_vm, vm_size);</div><div class='ctx'> 	unmap_donated_memory(pgd, pgd_size);</div><div class='hunk'>@@ -529,10 +760,9 @@ err_unpin_kvm:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Initialize the hypervisor copy of the protected vCPU state using the</div><div class='del'>- * memory donated by the host.</div><div class='add'>+ * Initialize the hypervisor copy of the vCPU state using host-donated memory.</div><div class='ctx'>  *</div><div class='del'>- * handle: The handle for the protected vm.</div><div class='add'>+ * handle: The hypervisor handle for the vm.</div><div class='ctx'>  * host_vcpu: A pointer to the corresponding host vcpu.</div><div class='ctx'>  * vcpu_hva: The host va of the area being donated for the vcpu state.</div><div class='ctx'>  *	     Must be page aligned. The size of the area must be equal to</div><div class='hunk'>@@ -559,29 +789,28 @@ int __pkvm_init_vcpu(pkvm_handle_t handle, struct kvm_vcpu *host_vcpu,</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idx = hyp_vm-&gt;nr_vcpus;</div><div class='add'>+	ret = init_pkvm_hyp_vcpu(hyp_vcpu, hyp_vm, host_vcpu);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	idx = hyp_vcpu-&gt;vcpu.vcpu_idx;</div><div class='ctx'> 	if (idx &gt;= hyp_vm-&gt;kvm.created_vcpus) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = init_pkvm_hyp_vcpu(hyp_vcpu, hyp_vm, host_vcpu, idx);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (hyp_vm-&gt;vcpus[idx]) {</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	hyp_vm-&gt;vcpus[idx] = hyp_vcpu;</div><div class='del'>-	hyp_vm-&gt;nr_vcpus++;</div><div class='ctx'> unlock:</div><div class='ctx'> 	hyp_spin_unlock(&amp;vm_table_lock);</div><div class='ctx'> </div><div class='del'>-	if (ret) {</div><div class='add'>+	if (ret)</div><div class='ctx'> 		unmap_donated_memory(hyp_vcpu, sizeof(*hyp_vcpu));</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.cptr_el2 = kvm_get_reset_cptr_el2(&amp;hyp_vcpu-&gt;vcpu);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -598,7 +827,7 @@ teardown_donated_memory(struct kvm_hyp_memcache *mc, void *addr, size_t size)</div><div class='ctx'> </div><div class='ctx'> int __pkvm_teardown_vm(pkvm_handle_t handle)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_hyp_memcache *mc;</div><div class='add'>+	struct kvm_hyp_memcache *mc, *stage2_mc;</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm;</div><div class='ctx'> 	struct kvm *host_kvm;</div><div class='ctx'> 	unsigned int idx;</div><div class='hunk'>@@ -626,12 +855,26 @@ int __pkvm_teardown_vm(pkvm_handle_t handle)</div><div class='ctx'> </div><div class='ctx'> 	/* Reclaim guest pages (including page-table pages) */</div><div class='ctx'> 	mc = &amp;host_kvm-&gt;arch.pkvm.teardown_mc;</div><div class='del'>-	reclaim_guest_pages(hyp_vm, mc);</div><div class='del'>-	unpin_host_vcpus(hyp_vm-&gt;vcpus, hyp_vm-&gt;nr_vcpus);</div><div class='add'>+	stage2_mc = &amp;host_kvm-&gt;arch.pkvm.stage2_teardown_mc;</div><div class='add'>+	reclaim_pgtable_pages(hyp_vm, stage2_mc);</div><div class='add'>+	unpin_host_vcpus(hyp_vm-&gt;vcpus, hyp_vm-&gt;kvm.created_vcpus);</div><div class='ctx'> </div><div class='ctx'> 	/* Push the metadata pages to the teardown memcache */</div><div class='del'>-	for (idx = 0; idx &lt; hyp_vm-&gt;nr_vcpus; ++idx) {</div><div class='add'>+	for (idx = 0; idx &lt; hyp_vm-&gt;kvm.created_vcpus; ++idx) {</div><div class='ctx'> 		struct pkvm_hyp_vcpu *hyp_vcpu = hyp_vm-&gt;vcpus[idx];</div><div class='add'>+		struct kvm_hyp_memcache *vcpu_mc;</div><div class='add'>+</div><div class='add'>+		if (!hyp_vcpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		vcpu_mc = &amp;hyp_vcpu-&gt;vcpu.arch.pkvm_memcache;</div><div class='add'>+</div><div class='add'>+		while (vcpu_mc-&gt;nr_pages) {</div><div class='add'>+			void *addr = pop_hyp_memcache(vcpu_mc, hyp_phys_to_virt);</div><div class='add'>+</div><div class='add'>+			push_hyp_memcache(stage2_mc, addr, hyp_virt_to_phys);</div><div class='add'>+			unmap_donated_memory_noclear(addr, PAGE_SIZE);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		teardown_donated_memory(mc, hyp_vcpu, sizeof(*hyp_vcpu));</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe/psci-relay.c<br/>index dfe8fe0f7eaf..c3e196fb8b18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/psci-relay.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/psci-relay.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/psci-relay.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/psci-relay.c</a></div><div class='hunk'>@@ -218,6 +218,9 @@ asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bool is_cpu_on)</div><div class='ctx'> 	if (is_cpu_on)</div><div class='ctx'> 		release_boot_args(boot_args);</div><div class='ctx'> </div><div class='add'>+	write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR);</div><div class='add'>+	write_sysreg(INIT_PSTATE_EL1, SPSR_EL2);</div><div class='add'>+</div><div class='ctx'> 	__host_enter(host_ctxt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -265,6 +268,8 @@ static unsigned long psci_1_0_handler(u64 func_id, struct kvm_cpu_context *host_</div><div class='ctx'> 	case PSCI_1_0_FN_PSCI_FEATURES:</div><div class='ctx'> 	case PSCI_1_0_FN_SET_SUSPEND_MODE:</div><div class='ctx'> 	case PSCI_1_1_FN64_SYSTEM_RESET2:</div><div class='add'>+	case PSCI_1_3_FN_SYSTEM_OFF2:</div><div class='add'>+	case PSCI_1_3_FN64_SYSTEM_OFF2:</div><div class='ctx'> 		return psci_forward(host_ctxt);</div><div class='ctx'> 	case PSCI_1_0_FN64_SYSTEM_SUSPEND:</div><div class='ctx'> 		return psci_system_suspend(func_id, host_ctxt);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/setup.c b/arch/arm64/kvm/hyp/nvhe/setup.c<br/>index 174007f3fadd..90bd014e952f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/setup.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;nvhe/early_alloc.h&gt;</div><div class='ctx'> #include &lt;nvhe/ffa.h&gt;</div><div class='del'>-#include &lt;nvhe/fixed_config.h&gt;</div><div class='ctx'> #include &lt;nvhe/gfp.h&gt;</div><div class='ctx'> #include &lt;nvhe/memory.h&gt;</div><div class='ctx'> #include &lt;nvhe/mem_protect.h&gt;</div><div class='hunk'>@@ -29,6 +28,7 @@ static void *vmemmap_base;</div><div class='ctx'> static void *vm_table_base;</div><div class='ctx'> static void *hyp_pgt_base;</div><div class='ctx'> static void *host_s2_pgt_base;</div><div class='add'>+static void *selftest_base;</div><div class='ctx'> static void *ffa_proxy_pages;</div><div class='ctx'> static struct kvm_pgtable_mm_ops pkvm_pgtable_mm_ops;</div><div class='ctx'> static struct hyp_pool hpool;</div><div class='hunk'>@@ -39,6 +39,11 @@ static int divide_memory_pool(void *virt, unsigned long size)</div><div class='ctx'> </div><div class='ctx'> 	hyp_early_alloc_init(virt, size);</div><div class='ctx'> </div><div class='add'>+	nr_pages = pkvm_selftest_pages();</div><div class='add'>+	selftest_base = hyp_early_alloc_contig(nr_pages);</div><div class='add'>+	if (nr_pages &amp;&amp; !selftest_base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	nr_pages = hyp_vmemmap_pages(sizeof(struct hyp_page));</div><div class='ctx'> 	vmemmap_base = hyp_early_alloc_contig(nr_pages);</div><div class='ctx'> 	if (!vmemmap_base)</div><div class='hunk'>@@ -95,7 +100,6 @@ static int recreate_hyp_mappings(phys_addr_t phys, unsigned long size,</div><div class='ctx'> {</div><div class='ctx'> 	void *start, *end, *virt = hyp_phys_to_virt(phys);</div><div class='ctx'> 	unsigned long pgt_size = hyp_s1_pgtable_pages() &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	enum kvm_pgtable_prot prot;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Recreate the hyp page-table using the early page allocator */</div><div class='hunk'>@@ -121,6 +125,10 @@ static int recreate_hyp_mappings(phys_addr_t phys, unsigned long size,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = pkvm_create_mappings(__hyp_data_start, __hyp_data_end, PAGE_HYP);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	ret = pkvm_create_mappings(__hyp_rodata_start, __hyp_rodata_end, PAGE_HYP_RO);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -147,24 +155,7 @@ static int recreate_hyp_mappings(phys_addr_t phys, unsigned long size,</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pkvm_create_host_sve_mappings();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Map the host sections RO in the hypervisor, but transfer the</div><div class='del'>-	 * ownership from the host to the hypervisor itself to make sure they</div><div class='del'>-	 * can't be donated or shared with another entity.</div><div class='del'>-	 *</div><div class='del'>-	 * The ownership transition requires matching changes in the host</div><div class='del'>-	 * stage-2. This will be done later (see finalize_host_mappings()) once</div><div class='del'>-	 * the hyp_vmemmap is addressable.</div><div class='del'>-	 */</div><div class='del'>-	prot = pkvm_mkstate(PAGE_HYP_RO, PKVM_PAGE_SHARED_OWNED);</div><div class='del'>-	ret = pkvm_create_mappings(&amp;kvm_vgic_global_state,</div><div class='del'>-				   &amp;kvm_vgic_global_state + 1, prot);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return pkvm_create_host_sve_mappings();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_nvhe_init_params(void)</div><div class='hunk'>@@ -198,9 +189,10 @@ static void hpool_put_page(void *addr)</div><div class='ctx'> static int fix_host_ownership_walker(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 				     enum kvm_pgtable_walk_flags visit)</div><div class='ctx'> {</div><div class='del'>-	enum kvm_pgtable_prot prot;</div><div class='ctx'> 	enum pkvm_page_state state;</div><div class='add'>+	struct hyp_page *page;</div><div class='ctx'> 	phys_addr_t phys;</div><div class='add'>+	enum kvm_pgtable_prot prot;</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_pte_valid(ctx-&gt;old))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -212,25 +204,38 @@ static int fix_host_ownership_walker(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 	if (!addr_is_memory(phys))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	page = hyp_phys_to_page(phys);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Adjust the host stage-2 mappings to match the ownership attributes</div><div class='del'>-	 * configured in the hypervisor stage-1.</div><div class='add'>+	 * configured in the hypervisor stage-1, and make sure to propagate them</div><div class='add'>+	 * to the hyp_vmemmap state.</div><div class='ctx'> 	 */</div><div class='del'>-	state = pkvm_getstate(kvm_pgtable_hyp_pte_prot(ctx-&gt;old));</div><div class='add'>+	prot = kvm_pgtable_hyp_pte_prot(ctx-&gt;old);</div><div class='add'>+	state = pkvm_getstate(prot);</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case PKVM_PAGE_OWNED:</div><div class='del'>-		return host_stage2_set_owner_locked(phys, PAGE_SIZE, PKVM_ID_HYP);</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_OWNED);</div><div class='add'>+		/* hyp text is RO in the host stage-2 to be inspected on panic. */</div><div class='add'>+		if (prot == PAGE_HYP_EXEC) {</div><div class='add'>+			set_host_state(page, PKVM_NOPAGE);</div><div class='add'>+			return host_stage2_idmap_locked(phys, PAGE_SIZE, KVM_PGTABLE_PROT_R);</div><div class='add'>+		} else {</div><div class='add'>+			return host_stage2_set_owner_locked(phys, PAGE_SIZE, PKVM_ID_HYP);</div><div class='add'>+		}</div><div class='ctx'> 	case PKVM_PAGE_SHARED_OWNED:</div><div class='del'>-		prot = pkvm_mkstate(PKVM_HOST_MEM_PROT, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_BORROWED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PKVM_PAGE_SHARED_BORROWED:</div><div class='del'>-		prot = pkvm_mkstate(PKVM_HOST_MEM_PROT, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return host_stage2_idmap_locked(phys, PAGE_SIZE, prot);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fix_hyp_pgtable_refcnt_walker(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='hunk'>@@ -315,7 +320,7 @@ void __noreturn __pkvm_init_finalise(void)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = hyp_create_pcpu_fixmap();</div><div class='add'>+	ret = hyp_create_fixmap();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -324,6 +329,8 @@ void __noreturn __pkvm_init_finalise(void)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	pkvm_hyp_vm_table_init(vm_table_base);</div><div class='add'>+</div><div class='add'>+	pkvm_ownership_selftest(selftest_base);</div><div class='ctx'> out:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We tail-called to here from handle___pkvm_init() and will not return,</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/stacktrace.c b/arch/arm64/kvm/hyp/nvhe/stacktrace.c<br/>index ed6b58b19cfa..5b6eeab1a774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/stacktrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/stacktrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/stacktrace.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@ static void hyp_prepare_backtrace(unsigned long fp, unsigned long pc)</div><div class='ctx'> 	struct kvm_nvhe_stacktrace_info *stacktrace_info = this_cpu_ptr(&amp;kvm_stacktrace_info);</div><div class='ctx'> 	struct kvm_nvhe_init_params *params = this_cpu_ptr(&amp;kvm_init_params);</div><div class='ctx'> </div><div class='del'>-	stacktrace_info-&gt;stack_base = (unsigned long)(params-&gt;stack_hyp_va - PAGE_SIZE);</div><div class='add'>+	stacktrace_info-&gt;stack_base = (unsigned long)(params-&gt;stack_hyp_va - NVHE_STACK_SIZE);</div><div class='ctx'> 	stacktrace_info-&gt;overflow_stack_base = (unsigned long)this_cpu_ptr(overflow_stack);</div><div class='ctx'> 	stacktrace_info-&gt;fp = fp;</div><div class='ctx'> 	stacktrace_info-&gt;pc = pc;</div><div class='hunk'>@@ -54,7 +54,7 @@ static struct stack_info stackinfo_get_hyp(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_nvhe_init_params *params = this_cpu_ptr(&amp;kvm_init_params);</div><div class='ctx'> 	unsigned long high = params-&gt;stack_hyp_va;</div><div class='del'>-	unsigned long low = high - PAGE_SIZE;</div><div class='add'>+	unsigned long low = high - NVHE_STACK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	return (struct stack_info) {</div><div class='ctx'> 		.low = low,</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c<br/>index cc69106734ca..d3b9ec8a7c28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/switch.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/switch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/switch.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/switch.c</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;nvhe/fixed_config.h&gt;</div><div class='ctx'> #include &lt;nvhe/mem_protect.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Non-VHE specific context */</div><div class='hunk'>@@ -34,35 +33,30 @@ DEFINE_PER_CPU(struct kvm_host_data, kvm_host_data);</div><div class='ctx'> DEFINE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);</div><div class='ctx'> </div><div class='add'>+struct fgt_masks hfgrtr_masks;</div><div class='add'>+struct fgt_masks hfgwtr_masks;</div><div class='add'>+struct fgt_masks hfgitr_masks;</div><div class='add'>+struct fgt_masks hdfgrtr_masks;</div><div class='add'>+struct fgt_masks hdfgwtr_masks;</div><div class='add'>+struct fgt_masks hafgrtr_masks;</div><div class='add'>+struct fgt_masks hfgrtr2_masks;</div><div class='add'>+struct fgt_masks hfgwtr2_masks;</div><div class='add'>+struct fgt_masks hfgitr2_masks;</div><div class='add'>+struct fgt_masks hdfgrtr2_masks;</div><div class='add'>+struct fgt_masks hdfgwtr2_masks;</div><div class='add'>+</div><div class='ctx'> extern void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc);</div><div class='ctx'> </div><div class='ctx'> static void __activate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 val;</div><div class='del'>-</div><div class='ctx'> 	___activate_traps(vcpu, vcpu-&gt;arch.hcr_el2);</div><div class='del'>-	__activate_traps_common(vcpu);</div><div class='ctx'> </div><div class='del'>-	val = vcpu-&gt;arch.cptr_el2;</div><div class='del'>-	val |= CPTR_EL2_TAM;	/* Same bit irrespective of E2H */</div><div class='del'>-	val |= has_hvhe() ? CPACR_EL1_TTA : CPTR_EL2_TTA;</div><div class='del'>-	if (cpus_have_final_cap(ARM64_SME)) {</div><div class='del'>-		if (has_hvhe())</div><div class='del'>-			val &amp;= ~CPACR_ELx_SMEN;</div><div class='del'>-		else</div><div class='del'>-			val |= CPTR_EL2_TSM;</div><div class='del'>-	}</div><div class='add'>+	*host_data_ptr(host_debug_state.mdcr_el2) = read_sysreg(mdcr_el2);</div><div class='add'>+	write_sysreg(vcpu-&gt;arch.mdcr_el2, mdcr_el2);</div><div class='ctx'> </div><div class='del'>-	if (!guest_owns_fp_regs()) {</div><div class='del'>-		if (has_hvhe())</div><div class='del'>-			val &amp;= ~(CPACR_ELx_FPEN | CPACR_ELx_ZEN);</div><div class='del'>-		else</div><div class='del'>-			val |= CPTR_EL2_TFP | CPTR_EL2_TZ;</div><div class='del'>-</div><div class='del'>-		__activate_traps_fpsimd32(vcpu);</div><div class='del'>-	}</div><div class='add'>+	__activate_traps_common(vcpu);</div><div class='add'>+	__activate_cptr_traps(vcpu);</div><div class='ctx'> </div><div class='del'>-	kvm_write_cptr_el2(val);</div><div class='ctx'> 	write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el2);</div><div class='ctx'> </div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {</div><div class='hunk'>@@ -103,11 +97,13 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		isb();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	write_sysreg(*host_data_ptr(host_debug_state.mdcr_el2), mdcr_el2);</div><div class='add'>+</div><div class='ctx'> 	__deactivate_traps_common(vcpu);</div><div class='ctx'> </div><div class='del'>-	write_sysreg(this_cpu_ptr(&amp;kvm_init_params)-&gt;hcr_el2, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(this_cpu_ptr(&amp;kvm_init_params)-&gt;hcr_el2);</div><div class='ctx'> </div><div class='del'>-	kvm_reset_cptr_el2(vcpu);</div><div class='add'>+	__deactivate_cptr_traps(vcpu);</div><div class='ctx'> 	write_sysreg(__kvm_hyp_host_vector, vbar_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -180,34 +176,6 @@ static bool kvm_handle_pvm_sys64(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 		kvm_handle_pvm_sysreg(vcpu, exit_code));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kvm_hyp_save_fpsimd_host(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Non-protected kvm relies on the host restoring its sve state.</div><div class='del'>-	 * Protected kvm restores the host's sve state as not to reveal that</div><div class='del'>-	 * fpsimd was used by a guest nor leak upper sve bits.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(is_protected_kvm_enabled() &amp;&amp; system_supports_sve())) {</div><div class='del'>-		__hyp_sve_save_host();</div><div class='del'>-</div><div class='del'>-		/* Re-enable SVE traps if not supported for the guest vcpu. */</div><div class='del'>-		if (!vcpu_has_sve(vcpu))</div><div class='del'>-			cpacr_clear_set(CPACR_ELx_ZEN, 0);</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		__fpsimd_save_state(*host_data_ptr(fpsimd_state));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (kvm_has_fpmr(kern_hyp_va(vcpu-&gt;kvm))) {</div><div class='del'>-		u64 val = read_sysreg_s(SYS_FPMR);</div><div class='del'>-</div><div class='del'>-		if (unlikely(is_protected_kvm_enabled()))</div><div class='del'>-			*host_data_ptr(fpmr) = val;</div><div class='del'>-		else</div><div class='del'>-			**host_data_ptr(fpmr_ptr) = val;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const exit_handler_fn hyp_exit_handlers[] = {</div><div class='ctx'> 	[0 ... ESR_ELx_EC_MAX]		= NULL,</div><div class='ctx'> 	[ESR_ELx_EC_CP15_32]		= kvm_hyp_handle_cp15_32,</div><div class='hunk'>@@ -239,19 +207,21 @@ static const exit_handler_fn *kvm_get_exit_handler_array(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return hyp_exit_handlers;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Some guests (e.g., protected VMs) are not be allowed to run in AArch32.</div><div class='del'>- * The ARMv8 architecture does not give the hypervisor a mechanism to prevent a</div><div class='del'>- * guest from dropping to AArch32 EL0 if implemented by the CPU. If the</div><div class='del'>- * hypervisor spots a guest in such a state ensure it is handled, and don't</div><div class='del'>- * trust the host to spot or fix it.  The check below is based on the one in</div><div class='del'>- * kvm_arch_vcpu_ioctl_run().</div><div class='del'>- *</div><div class='del'>- * Returns false if the guest ran in AArch32 when it shouldn't have, and</div><div class='del'>- * thus should exit to the host, or true if a the guest run loop can continue.</div><div class='del'>- */</div><div class='del'>-static void early_exit_filter(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='add'>+	const exit_handler_fn *handlers = kvm_get_exit_handler_array(vcpu);</div><div class='add'>+</div><div class='add'>+	synchronize_vcpu_pstate(vcpu, exit_code);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Some guests (e.g., protected VMs) are not be allowed to run in</div><div class='add'>+	 * AArch32.  The ARMv8 architecture does not give the hypervisor a</div><div class='add'>+	 * mechanism to prevent a guest from dropping to AArch32 EL0 if</div><div class='add'>+	 * implemented by the CPU. If the hypervisor spots a guest in such a</div><div class='add'>+	 * state ensure it is handled, and don't trust the host to spot or fix</div><div class='add'>+	 * it.  The check below is based on the one in</div><div class='add'>+	 * kvm_arch_vcpu_ioctl_run().</div><div class='add'>+	 */</div><div class='ctx'> 	if (unlikely(vcpu_is_protected(vcpu) &amp;&amp; vcpu_mode_is_32bit(vcpu))) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * As we have caught the guest red-handed, decide that it isn't</div><div class='hunk'>@@ -264,6 +234,8 @@ static void early_exit_filter(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 		*exit_code &amp;= BIT(ARM_EXIT_WITH_SERROR_BIT);</div><div class='ctx'> 		*exit_code |= ARM_EXCEPTION_IL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return __fixup_guest_exit(vcpu, exit_code, handlers);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Switch to the guest for legacy non-VHE systems */</div><div class='hunk'>@@ -306,7 +278,7 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * We're about to restore some new MMU state. Make sure</div><div class='ctx'> 	 * ongoing page-table walks that have started before we</div><div class='ctx'> 	 * trapped to EL2 have completed. This also synchronises the</div><div class='del'>-	 * above disabling of SPE and TRBE.</div><div class='add'>+	 * above disabling of BRBE, SPE and TRBE.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * See DDI0487I.a D8.1.5 "Out-of-context translation regimes",</div><div class='ctx'> 	 * rule R_LFHQG and subsequent information statements.</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c<br/>index 2860548d4250..82da9b03692d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/sys_regs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/sys_regs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/sys_regs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/sys_regs.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;hyp/adjust_pc.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;nvhe/fixed_config.h&gt;</div><div class='add'>+#include &lt;nvhe/pkvm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../../sys_regs.h"</div><div class='ctx'> </div><div class='hunk'>@@ -28,222 +28,256 @@ u64 id_aa64mmfr1_el1_sys_val;</div><div class='ctx'> u64 id_aa64mmfr2_el1_sys_val;</div><div class='ctx'> u64 id_aa64smfr0_el1_sys_val;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Inject an unknown/undefined exception to an AArch64 guest while most of its</div><div class='del'>- * sysregs are live.</div><div class='del'>- */</div><div class='del'>-static void inject_undef64(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 esr = (ESR_ELx_EC_UNKNOWN &lt;&lt; ESR_ELx_EC_SHIFT);</div><div class='del'>-</div><div class='del'>-	*vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);</div><div class='del'>-	*vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR);</div><div class='del'>-</div><div class='del'>-	kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='del'>-</div><div class='del'>-	__kvm_adjust_pc(vcpu);</div><div class='del'>-</div><div class='del'>-	write_sysreg_el1(esr, SYS_ESR);</div><div class='del'>-	write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);</div><div class='del'>-	write_sysreg_el2(*vcpu_pc(vcpu), SYS_ELR);</div><div class='del'>-	write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Returns the restricted features values of the feature register based on the</div><div class='del'>- * limitations in restrict_fields.</div><div class='del'>- * A feature id field value of 0b0000 does not impose any restrictions.</div><div class='del'>- * Note: Use only for unsigned feature field values.</div><div class='del'>- */</div><div class='del'>-static u64 get_restricted_features_unsigned(u64 sys_reg_val,</div><div class='del'>-					    u64 restrict_fields)</div><div class='del'>-{</div><div class='del'>-	u64 value = 0UL;</div><div class='del'>-	u64 mask = GENMASK_ULL(ARM64_FEATURE_FIELD_BITS - 1, 0);</div><div class='add'>+struct pvm_ftr_bits {</div><div class='add'>+	bool		sign;</div><div class='add'>+	u8		shift;</div><div class='add'>+	u8		width;</div><div class='add'>+	u8		max_val;</div><div class='add'>+	bool (*vm_supported)(const struct kvm *kvm);</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * According to the Arm Architecture Reference Manual, feature fields</div><div class='del'>-	 * use increasing values to indicate increases in functionality.</div><div class='del'>-	 * Iterate over the restricted feature fields and calculate the minimum</div><div class='del'>-	 * unsigned value between the one supported by the system, and what the</div><div class='del'>-	 * value is being restricted to.</div><div class='del'>-	 */</div><div class='del'>-	while (sys_reg_val &amp;&amp; restrict_fields) {</div><div class='del'>-		value |= min(sys_reg_val &amp; mask, restrict_fields &amp; mask);</div><div class='del'>-		sys_reg_val &amp;= ~mask;</div><div class='del'>-		restrict_fields &amp;= ~mask;</div><div class='del'>-		mask &lt;&lt;= ARM64_FEATURE_FIELD_BITS;</div><div class='add'>+#define __MAX_FEAT_FUNC(id, fld, max, func, sgn)				\</div><div class='add'>+	{									\</div><div class='add'>+		.sign = sgn,							\</div><div class='add'>+		.shift = id##_##fld##_SHIFT,					\</div><div class='add'>+		.width = id##_##fld##_WIDTH,					\</div><div class='add'>+		.max_val = id##_##fld##_##max,					\</div><div class='add'>+		.vm_supported = func,						\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Functions that return the value of feature id registers for protected VMs</div><div class='del'>- * based on allowed features, system features, and KVM support.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 set_mask = 0;</div><div class='del'>-	u64 allow_mask = PVM_ID_AA64PFR0_ALLOW;</div><div class='del'>-</div><div class='del'>-	set_mask |= get_restricted_features_unsigned(id_aa64pfr0_el1_sys_val,</div><div class='del'>-		PVM_ID_AA64PFR0_RESTRICT_UNSIGNED);</div><div class='add'>+#define MAX_FEAT_FUNC(id, fld, max, func)					\</div><div class='add'>+	__MAX_FEAT_FUNC(id, fld, max, func, id##_##fld##_SIGNED)</div><div class='ctx'> </div><div class='del'>-	return (id_aa64pfr0_el1_sys_val &amp; allow_mask) | set_mask;</div><div class='del'>-}</div><div class='add'>+#define MAX_FEAT(id, fld, max)							\</div><div class='add'>+	MAX_FEAT_FUNC(id, fld, max, NULL)</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu-&gt;kvm);</div><div class='del'>-	u64 allow_mask = PVM_ID_AA64PFR1_ALLOW;</div><div class='add'>+#define MAX_FEAT_ENUM(id, fld, max)						\</div><div class='add'>+	__MAX_FEAT_FUNC(id, fld, max, NULL, false)</div><div class='ctx'> </div><div class='del'>-	if (!kvm_has_mte(kvm))</div><div class='del'>-		allow_mask &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);</div><div class='del'>-</div><div class='del'>-	return id_aa64pfr1_el1_sys_val &amp; allow_mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * No support for Scalable Vectors, therefore, hyp has no sanitized</div><div class='del'>-	 * copy of the feature id register.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(PVM_ID_AA64ZFR0_ALLOW != 0ULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * No support for debug, including breakpoints, and watchpoints,</div><div class='del'>-	 * therefore, pKVM has no sanitized copy of the feature id register.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(PVM_ID_AA64DFR0_ALLOW != 0ULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+#define FEAT_END {	.width = 0,	}</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu)</div><div class='add'>+static bool vm_has_ptrauth(const struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * No support for debug, therefore, hyp has no sanitized copy of the</div><div class='del'>-	 * feature id register.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(PVM_ID_AA64DFR1_ALLOW != 0ULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ARM64_PTR_AUTH))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * No support for implementation defined features, therefore, hyp has no</div><div class='del'>-	 * sanitized copy of the feature id register.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(PVM_ID_AA64AFR0_ALLOW != 0ULL);</div><div class='del'>-	return 0;</div><div class='add'>+	return (cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) ||</div><div class='add'>+		cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) &amp;&amp;</div><div class='add'>+		kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_PTRAUTH_GENERIC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu)</div><div class='add'>+static bool vm_has_sve(const struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * No support for implementation defined features, therefore, hyp has no</div><div class='del'>-	 * sanitized copy of the feature id register.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(PVM_ID_AA64AFR1_ALLOW != 0ULL);</div><div class='del'>-	return 0;</div><div class='add'>+	return system_supports_sve() &amp;&amp; kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_SVE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return id_aa64isar0_el1_sys_val &amp; PVM_ID_AA64ISAR0_ALLOW;</div><div class='del'>-}</div><div class='add'>+/*</div><div class='add'>+ * Definitions for features to be allowed or restricted for protected guests.</div><div class='add'>+ *</div><div class='add'>+ * Each field in the masks represents the highest supported value for the</div><div class='add'>+ * feature. If a feature field is not present, it is not supported. Moreover,</div><div class='add'>+ * these are used to generate the guest's view of the feature registers.</div><div class='add'>+ *</div><div class='add'>+ * The approach for protected VMs is to at least support features that are:</div><div class='add'>+ * - Needed by common Linux distributions (e.g., floating point)</div><div class='add'>+ * - Trivial to support, e.g., supporting the feature does not introduce or</div><div class='add'>+ * require tracking of additional state in KVM</div><div class='add'>+ * - Cannot be trapped or prevent the guest from using anyway</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 allow_mask = PVM_ID_AA64ISAR1_ALLOW;</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64pfr0[] = {</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, EL0, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, EL1, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, EL2, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, EL3, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, FP, FP16),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, AdvSIMD, FP16),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, GIC, IMP),</div><div class='add'>+	MAX_FEAT_FUNC(ID_AA64PFR0_EL1, SVE, IMP, vm_has_sve),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, RAS, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, DIT, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, CSV2, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR0_EL1, CSV3, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_has_ptrauth(vcpu))</div><div class='del'>-		allow_mask &amp;= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |</div><div class='del'>-				ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |</div><div class='del'>-				ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |</div><div class='del'>-				ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64pfr1[] = {</div><div class='add'>+	MAX_FEAT(ID_AA64PFR1_EL1, BT, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64PFR1_EL1, SSBS, SSBS2),</div><div class='add'>+	MAX_FEAT_ENUM(ID_AA64PFR1_EL1, MTE_frac, NI),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return id_aa64isar1_el1_sys_val &amp; allow_mask;</div><div class='del'>-}</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64mmfr0[] = {</div><div class='add'>+	MAX_FEAT_ENUM(ID_AA64MMFR0_EL1, PARANGE, 40),</div><div class='add'>+	MAX_FEAT_ENUM(ID_AA64MMFR0_EL1, ASIDBITS, 16),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR0_EL1, BIGEND, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR0_EL1, SNSMEM, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR0_EL1, BIGENDEL0, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR0_EL1, EXS, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64isar2(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 allow_mask = PVM_ID_AA64ISAR2_ALLOW;</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64mmfr1[] = {</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, HAFDBS, DBM),</div><div class='add'>+	MAX_FEAT_ENUM(ID_AA64MMFR1_EL1, VMIDBits, 16),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, HPDS, HPDS2),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, PAN, PAN3),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, SpecSEI, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, ETS, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR1_EL1, CMOW, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_has_ptrauth(vcpu))</div><div class='del'>-		allow_mask &amp;= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |</div><div class='del'>-				ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64mmfr2[] = {</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, CnP, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, UAO, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, IESB, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, AT, IMP),</div><div class='add'>+	MAX_FEAT_ENUM(ID_AA64MMFR2_EL1, IDS, 0x18),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, TTL, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, BBM, 2),</div><div class='add'>+	MAX_FEAT(ID_AA64MMFR2_EL1, E0PD, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return id_aa64isar2_el1_sys_val &amp; allow_mask;</div><div class='del'>-}</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64isar1[] = {</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, DPB, DPB2),</div><div class='add'>+	MAX_FEAT_FUNC(ID_AA64ISAR1_EL1, APA, PAuth, vm_has_ptrauth),</div><div class='add'>+	MAX_FEAT_FUNC(ID_AA64ISAR1_EL1, API, PAuth, vm_has_ptrauth),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, JSCVT, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, FCMA, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, LRCPC, LRCPC3),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, GPA, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, GPI, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, FRINTTS, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, SB, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, SPECRES, COSP_RCTX),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, BF16, EBF16),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, DGH, IMP),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR1_EL1, I8MM, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 set_mask;</div><div class='add'>+static const struct pvm_ftr_bits pvmid_aa64isar2[] = {</div><div class='add'>+	MAX_FEAT_FUNC(ID_AA64ISAR2_EL1, GPA3, IMP, vm_has_ptrauth),</div><div class='add'>+	MAX_FEAT_FUNC(ID_AA64ISAR2_EL1, APA3, PAuth, vm_has_ptrauth),</div><div class='add'>+	MAX_FEAT(ID_AA64ISAR2_EL1, ATS1A, IMP),</div><div class='add'>+	FEAT_END</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	set_mask = get_restricted_features_unsigned(id_aa64mmfr0_el1_sys_val,</div><div class='del'>-		PVM_ID_AA64MMFR0_RESTRICT_UNSIGNED);</div><div class='add'>+/*</div><div class='add'>+ * None of the features in ID_AA64DFR0_EL1 nor ID_AA64MMFR4_EL1 are supported.</div><div class='add'>+ * However, both have Not-Implemented values that are non-zero. Define them</div><div class='add'>+ * so they can be used when getting the value of these registers.</div><div class='add'>+ */</div><div class='add'>+#define ID_AA64DFR0_EL1_NONZERO_NI					\</div><div class='add'>+(									\</div><div class='add'>+	SYS_FIELD_PREP_ENUM(ID_AA64DFR0_EL1, DoubleLock, NI)	|	\</div><div class='add'>+	SYS_FIELD_PREP_ENUM(ID_AA64DFR0_EL1, MTPMU, NI)			\</div><div class='add'>+)</div><div class='ctx'> </div><div class='del'>-	return (id_aa64mmfr0_el1_sys_val &amp; PVM_ID_AA64MMFR0_ALLOW) | set_mask;</div><div class='del'>-}</div><div class='add'>+#define ID_AA64MMFR4_EL1_NONZERO_NI					\</div><div class='add'>+	SYS_FIELD_PREP_ENUM(ID_AA64MMFR4_EL1, E2H0, NI)</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu)</div><div class='add'>+/*</div><div class='add'>+ * Returns the value of the feature registers based on the system register</div><div class='add'>+ * value, the vcpu support for the revelant features, and the additional</div><div class='add'>+ * restrictions for protected VMs.</div><div class='add'>+ */</div><div class='add'>+static u64 get_restricted_features(const struct kvm_vcpu *vcpu,</div><div class='add'>+				   u64 sys_reg_val,</div><div class='add'>+				   const struct pvm_ftr_bits restrictions[])</div><div class='ctx'> {</div><div class='del'>-	return id_aa64mmfr1_el1_sys_val &amp; PVM_ID_AA64MMFR1_ALLOW;</div><div class='del'>-}</div><div class='add'>+	u64 val = 0UL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; restrictions[i].width != 0; i++) {</div><div class='add'>+		bool (*vm_supported)(const struct kvm *) = restrictions[i].vm_supported;</div><div class='add'>+		bool sign = restrictions[i].sign;</div><div class='add'>+		int shift = restrictions[i].shift;</div><div class='add'>+		int width = restrictions[i].width;</div><div class='add'>+		u64 min_signed = (1UL &lt;&lt; width) - 1UL;</div><div class='add'>+		u64 sign_bit = 1UL &lt;&lt; (width - 1);</div><div class='add'>+		u64 mask = GENMASK_ULL(width + shift - 1, shift);</div><div class='add'>+		u64 sys_val = (sys_reg_val &amp; mask) &gt;&gt; shift;</div><div class='add'>+		u64 pvm_max = restrictions[i].max_val;</div><div class='add'>+</div><div class='add'>+		if (vm_supported &amp;&amp; !vm_supported(vcpu-&gt;kvm))</div><div class='add'>+			val |= (sign ? min_signed : 0) &lt;&lt; shift;</div><div class='add'>+		else if (sign &amp;&amp; (sys_val &gt;= sign_bit || pvm_max &gt;= sign_bit))</div><div class='add'>+			val |= max(sys_val, pvm_max) &lt;&lt; shift;</div><div class='add'>+		else</div><div class='add'>+			val |= min(sys_val, pvm_max) &lt;&lt; shift;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return id_aa64mmfr2_el1_sys_val &amp; PVM_ID_AA64MMFR2_ALLOW;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Read a sanitized cpufeature ID register by its encoding */</div><div class='del'>-u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)</div><div class='add'>+static u64 pvm_calc_id_reg(const struct kvm_vcpu *vcpu, u32 id)</div><div class='ctx'> {</div><div class='ctx'> 	switch (id) {</div><div class='ctx'> 	case SYS_ID_AA64PFR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64pfr0(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64pfr0_el1_sys_val, pvmid_aa64pfr0);</div><div class='ctx'> 	case SYS_ID_AA64PFR1_EL1:</div><div class='del'>-		return get_pvm_id_aa64pfr1(vcpu);</div><div class='del'>-	case SYS_ID_AA64ZFR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64zfr0(vcpu);</div><div class='del'>-	case SYS_ID_AA64DFR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64dfr0(vcpu);</div><div class='del'>-	case SYS_ID_AA64DFR1_EL1:</div><div class='del'>-		return get_pvm_id_aa64dfr1(vcpu);</div><div class='del'>-	case SYS_ID_AA64AFR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64afr0(vcpu);</div><div class='del'>-	case SYS_ID_AA64AFR1_EL1:</div><div class='del'>-		return get_pvm_id_aa64afr1(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64pfr1_el1_sys_val, pvmid_aa64pfr1);</div><div class='ctx'> 	case SYS_ID_AA64ISAR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64isar0(vcpu);</div><div class='add'>+		return id_aa64isar0_el1_sys_val;</div><div class='ctx'> 	case SYS_ID_AA64ISAR1_EL1:</div><div class='del'>-		return get_pvm_id_aa64isar1(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64isar1_el1_sys_val, pvmid_aa64isar1);</div><div class='ctx'> 	case SYS_ID_AA64ISAR2_EL1:</div><div class='del'>-		return get_pvm_id_aa64isar2(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64isar2_el1_sys_val, pvmid_aa64isar2);</div><div class='ctx'> 	case SYS_ID_AA64MMFR0_EL1:</div><div class='del'>-		return get_pvm_id_aa64mmfr0(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64mmfr0_el1_sys_val, pvmid_aa64mmfr0);</div><div class='ctx'> 	case SYS_ID_AA64MMFR1_EL1:</div><div class='del'>-		return get_pvm_id_aa64mmfr1(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64mmfr1_el1_sys_val, pvmid_aa64mmfr1);</div><div class='ctx'> 	case SYS_ID_AA64MMFR2_EL1:</div><div class='del'>-		return get_pvm_id_aa64mmfr2(vcpu);</div><div class='add'>+		return get_restricted_features(vcpu, id_aa64mmfr2_el1_sys_val, pvmid_aa64mmfr2);</div><div class='add'>+	case SYS_ID_AA64DFR0_EL1:</div><div class='add'>+		return ID_AA64DFR0_EL1_NONZERO_NI;</div><div class='add'>+	case SYS_ID_AA64MMFR4_EL1:</div><div class='add'>+		return ID_AA64MMFR4_EL1_NONZERO_NI;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* Unhandled ID register, RAZ */</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Inject an unknown/undefined exception to an AArch64 guest while most of its</div><div class='add'>+ * sysregs are live.</div><div class='add'>+ */</div><div class='add'>+static void inject_undef64(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 esr = (ESR_ELx_EC_UNKNOWN &lt;&lt; ESR_ELx_EC_SHIFT);</div><div class='add'>+</div><div class='add'>+	*vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);</div><div class='add'>+	*vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, VBAR_EL1, read_sysreg_el1(SYS_VBAR));</div><div class='add'>+</div><div class='add'>+	kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='add'>+</div><div class='add'>+	__kvm_adjust_pc(vcpu);</div><div class='add'>+</div><div class='add'>+	write_sysreg_el1(esr, SYS_ESR);</div><div class='add'>+	write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);</div><div class='add'>+	write_sysreg_el2(*vcpu_pc(vcpu), SYS_ELR);</div><div class='add'>+	write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u64 read_id_reg(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 		       struct sys_reg_desc const *r)</div><div class='ctx'> {</div><div class='del'>-	return pvm_read_id_reg(vcpu, reg_to_encoding(r));</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	u32 reg = reg_to_encoding(r);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &amp;kvm-&gt;arch.flags)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (reg &gt;= sys_reg(3, 0, 0, 1, 0) &amp;&amp; reg &lt;= sys_reg(3, 0, 0, 7, 7))</div><div class='add'>+		return kvm-&gt;arch.id_regs[IDREG_IDX(reg)];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Handler to RAZ/WI sysregs */</div><div class='hunk'>@@ -271,13 +305,6 @@ static bool pvm_access_id_aarch32(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * No support for AArch32 guests, therefore, pKVM has no sanitized copy</div><div class='del'>-	 * of AArch32 feature id registers.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1),</div><div class='del'>-		     PVM_ID_AA64PFR0_RESTRICT_UNSIGNED) &gt; ID_AA64PFR0_EL1_EL1_IMP);</div><div class='del'>-</div><div class='ctx'> 	return pvm_access_raz_wi(vcpu, p, r);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -346,6 +373,9 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* Debug and Trace Registers are restricted. */</div><div class='ctx'> </div><div class='add'>+	/* Group 1 ID registers */</div><div class='add'>+	HOST_HANDLED(SYS_REVIDR_EL1),</div><div class='add'>+</div><div class='ctx'> 	/* AArch64 mappings of the AArch32 ID registers */</div><div class='ctx'> 	/* CRm=1 */</div><div class='ctx'> 	AARCH32(SYS_ID_PFR0_EL1),</div><div class='hunk'>@@ -434,6 +464,7 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {</div><div class='ctx'> </div><div class='ctx'> 	HOST_HANDLED(SYS_CCSIDR_EL1),</div><div class='ctx'> 	HOST_HANDLED(SYS_CLIDR_EL1),</div><div class='add'>+	HOST_HANDLED(SYS_AIDR_EL1),</div><div class='ctx'> 	HOST_HANDLED(SYS_CSSELR_EL1),</div><div class='ctx'> 	HOST_HANDLED(SYS_CTR_EL0),</div><div class='ctx'> </div><div class='hunk'>@@ -449,6 +480,30 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Initializes feature registers for protected vms.</div><div class='add'>+ */</div><div class='add'>+void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	struct kvm_arch *ka = &amp;kvm-&gt;arch;</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	hyp_assert_lock_held(&amp;vm_table_lock);</div><div class='add'>+</div><div class='add'>+	if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &amp;kvm-&gt;arch.flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize only AArch64 id registers since AArch32 isn't supported</div><div class='add'>+	 * for protected VMs.</div><div class='add'>+	 */</div><div class='add'>+	for (r = sys_reg(3, 0, 0, 4, 0); r &lt;= sys_reg(3, 0, 0, 7, 7); r += sys_reg(0, 0, 0, 0, 1))</div><div class='add'>+		ka-&gt;id_regs[IDREG_IDX(r)] = pvm_calc_id_reg(vcpu, r);</div><div class='add'>+</div><div class='add'>+	set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &amp;kvm-&gt;arch.flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Checks that the sysreg table is unique and in-order.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns 0 if the table is consistent, or 1 otherwise.</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/sysreg-sr.c b/arch/arm64/kvm/hyp/nvhe/sysreg-sr.c<br/>index 29305022bc04..3cc613cce5f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/sysreg-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/sysreg-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/sysreg-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/sysreg-sr.c</a></div><div class='hunk'>@@ -28,7 +28,9 @@ void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt)</div><div class='ctx'> </div><div class='ctx'> void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt)</div><div class='ctx'> {</div><div class='del'>-	__sysreg_restore_el1_state(ctxt);</div><div class='add'>+	u64 midr = ctxt_midr_el1(ctxt);</div><div class='add'>+</div><div class='add'>+	__sysreg_restore_el1_state(ctxt, midr, ctxt_sys_reg(ctxt, MPIDR_EL1));</div><div class='ctx'> 	__sysreg_restore_common_state(ctxt);</div><div class='ctx'> 	__sysreg_restore_user_state(ctxt);</div><div class='ctx'> 	__sysreg_restore_el2_return_state(ctxt);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/timer-sr.c b/arch/arm64/kvm/hyp/nvhe/timer-sr.c<br/>index 3aaab20ae5b4..ff176f4ce7de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/timer-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/nvhe/timer-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/nvhe/timer-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/nvhe/timer-sr.c</a></div><div class='hunk'>@@ -22,15 +22,16 @@ void __kvm_timer_set_cntvoff(u64 cntvoff)</div><div class='ctx'>  */</div><div class='ctx'> void __timer_disable_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 val, shift = 0;</div><div class='add'>+	u64 set, clr, shift = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (has_hvhe())</div><div class='ctx'> 		shift = 10;</div><div class='ctx'> </div><div class='ctx'> 	/* Allow physical timer/counter access for the host */</div><div class='del'>-	val = read_sysreg(cnthctl_el2);</div><div class='del'>-	val |= (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) &lt;&lt; shift;</div><div class='del'>-	write_sysreg(val, cnthctl_el2);</div><div class='add'>+	set = (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) &lt;&lt; shift;</div><div class='add'>+	clr = CNTHCTL_EL1TVT | CNTHCTL_EL1TVCT;</div><div class='add'>+</div><div class='add'>+	sysreg_clear_set(cnthctl_el2, clr, set);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -58,5 +59,12 @@ void __timer_enable_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		set &lt;&lt;= 10;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Trap the virtual counter/timer if we have a broken cntvoff</div><div class='add'>+	 * implementation.</div><div class='add'>+	 */</div><div class='add'>+	if (has_broken_cntvoff())</div><div class='add'>+		set |= CNTHCTL_EL1TVT | CNTHCTL_EL1TVCT;</div><div class='add'>+</div><div class='ctx'> 	sysreg_clear_set(cnthctl_el2, clr, set);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c<br/>index b11bcebac908..c351b4abd5db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/pgtable.c</a></div><div class='hunk'>@@ -11,12 +11,6 @@</div><div class='ctx'> #include &lt;asm/kvm_pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/stage2_pgtable.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define KVM_PTE_TYPE			BIT(1)</div><div class='del'>-#define KVM_PTE_TYPE_BLOCK		0</div><div class='del'>-#define KVM_PTE_TYPE_PAGE		1</div><div class='del'>-#define KVM_PTE_TYPE_TABLE		1</div><div class='del'>-</div><div class='ctx'> struct kvm_pgtable_walk_data {</div><div class='ctx'> 	struct kvm_pgtable_walker	*walker;</div><div class='ctx'> </div><div class='hunk'>@@ -35,14 +29,6 @@ static bool kvm_pgtable_walk_skip_cmo(const struct kvm_pgtable_visit_ctx *ctx)</div><div class='ctx'> 	return unlikely(ctx-&gt;flags &amp; KVM_PGTABLE_WALK_SKIP_CMO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_phys_is_valid(u64 phys)</div><div class='del'>-{</div><div class='del'>-	u64 parange_max = kvm_get_parange_max();</div><div class='del'>-	u8 shift = id_aa64mmfr0_parange_to_phys_shift(parange_max);</div><div class='del'>-</div><div class='del'>-	return phys &lt; BIT(shift);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool kvm_block_mapping_supported(const struct kvm_pgtable_visit_ctx *ctx, u64 phys)</div><div class='ctx'> {</div><div class='ctx'> 	u64 granule = kvm_granule_size(ctx-&gt;level);</div><div class='hunk'>@@ -53,7 +39,7 @@ static bool kvm_block_mapping_supported(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 	if (granule &gt; (ctx-&gt;end - ctx-&gt;addr))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (kvm_phys_is_valid(phys) &amp;&amp; !IS_ALIGNED(phys, granule))</div><div class='add'>+	if (!IS_ALIGNED(phys, granule))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return IS_ALIGNED(ctx-&gt;addr, granule);</div><div class='hunk'>@@ -587,6 +573,9 @@ struct stage2_map_data {</div><div class='ctx'> </div><div class='ctx'> 	/* Force mappings to page granularity */</div><div class='ctx'> 	bool				force_pte;</div><div class='add'>+</div><div class='add'>+	/* Walk should update owner_id only */</div><div class='add'>+	bool				annotation;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift)</div><div class='hunk'>@@ -885,18 +874,7 @@ static u64 stage2_map_walker_phys_addr(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> {</div><div class='ctx'> 	u64 phys = data-&gt;phys;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Stage-2 walks to update ownership data are communicated to the map</div><div class='del'>-	 * walker using an invalid PA. Avoid offsetting an already invalid PA,</div><div class='del'>-	 * which could overflow and make the address valid again.</div><div class='del'>-	 */</div><div class='del'>-	if (!kvm_phys_is_valid(phys))</div><div class='del'>-		return phys;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Otherwise, work out the correct PA based on how far the walk has</div><div class='del'>-	 * gotten.</div><div class='del'>-	 */</div><div class='add'>+	/* Work out the correct PA based on how far the walk has gotten */</div><div class='ctx'> 	return phys + (ctx-&gt;addr - ctx-&gt;start);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -908,6 +886,9 @@ static bool stage2_leaf_mapping_allowed(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 	if (data-&gt;force_pte &amp;&amp; ctx-&gt;level &lt; KVM_PGTABLE_LAST_LEVEL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	if (data-&gt;annotation)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	return kvm_block_mapping_supported(ctx, phys);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -923,7 +904,7 @@ static int stage2_map_walker_try_leaf(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 	if (!stage2_leaf_mapping_allowed(ctx, data))</div><div class='ctx'> 		return -E2BIG;</div><div class='ctx'> </div><div class='del'>-	if (kvm_phys_is_valid(phys))</div><div class='add'>+	if (!data-&gt;annotation)</div><div class='ctx'> 		new = kvm_init_valid_leaf_pte(phys, data-&gt;attr, ctx-&gt;level);</div><div class='ctx'> 	else</div><div class='ctx'> 		new = kvm_init_invalid_leaf_owner(data-&gt;owner_id);</div><div class='hunk'>@@ -1085,11 +1066,11 @@ int kvm_pgtable_stage2_set_owner(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct stage2_map_data map_data = {</div><div class='del'>-		.phys		= KVM_PHYS_INVALID,</div><div class='ctx'> 		.mmu		= pgt-&gt;mmu,</div><div class='ctx'> 		.memcache	= mc,</div><div class='ctx'> 		.owner_id	= owner_id,</div><div class='ctx'> 		.force_pte	= true,</div><div class='add'>+		.annotation	= true,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct kvm_pgtable_walker walker = {</div><div class='ctx'> 		.cb		= stage2_map_walker,</div><div class='hunk'>@@ -1245,19 +1226,15 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='ctx'> 					NULL, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)</div><div class='add'>+void kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,</div><div class='add'>+				enum kvm_pgtable_walk_flags flags)</div><div class='ctx'> {</div><div class='del'>-	kvm_pte_t pte = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0,</div><div class='del'>-				       &amp;pte, NULL,</div><div class='del'>-				       KVM_PGTABLE_WALK_HANDLE_FAULT |</div><div class='del'>-				       KVM_PGTABLE_WALK_SHARED);</div><div class='add'>+				       NULL, NULL, flags);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		dsb(ishst);</div><div class='del'>-</div><div class='del'>-	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct stage2_age_data {</div><div class='hunk'>@@ -1311,7 +1288,7 @@ bool kvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,</div><div class='del'>-				   enum kvm_pgtable_prot prot)</div><div class='add'>+				   enum kvm_pgtable_prot prot, enum kvm_pgtable_walk_flags flags)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	s8 level;</div><div class='hunk'>@@ -1329,9 +1306,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,</div><div class='ctx'> 	if (prot &amp; KVM_PGTABLE_PROT_X)</div><div class='ctx'> 		clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;</div><div class='ctx'> </div><div class='del'>-	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &amp;level,</div><div class='del'>-				       KVM_PGTABLE_WALK_HANDLE_FAULT |</div><div class='del'>-				       KVM_PGTABLE_WALK_SHARED);</div><div class='add'>+	ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &amp;level, flags);</div><div class='ctx'> 	if (!ret || ret == -EAGAIN)</div><div class='ctx'> 		kvm_call_hyp(__kvm_tlb_flush_vmid_ipa_nsh, pgt-&gt;mmu, addr, level);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c<br/>index 87a54375bd6e..78579b31a420 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@ static bool __is_be(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vcpu_mode_is_32bit(vcpu))</div><div class='ctx'> 		return !!(read_sysreg_el2(SYS_SPSR) &amp; PSR_AA32_E_BIT);</div><div class='ctx'> </div><div class='del'>-	return !!(read_sysreg(SCTLR_EL1) &amp; SCTLR_ELx_EE);</div><div class='add'>+	return !!(read_sysreg_el1(SYS_SCTLR) &amp; SCTLR_ELx_EE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c<br/>index 18d4677002b1..acd909b7f225 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vgic-v3-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vgic-v3-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #define vtr_to_nr_pre_bits(v)		((((u32)(v) &gt;&gt; 26) &amp; 7) + 1)</div><div class='ctx'> #define vtr_to_nr_apr_regs(v)		(1 &lt;&lt; (vtr_to_nr_pre_bits(v) - 5))</div><div class='ctx'> </div><div class='del'>-static u64 __gic_v3_get_lr(unsigned int lr)</div><div class='add'>+u64 __gic_v3_get_lr(unsigned int lr)</div><div class='ctx'> {</div><div class='ctx'> 	switch (lr &amp; 0xf) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -218,7 +218,7 @@ void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> </div><div class='ctx'> 		elrsr = read_gicreg(ICH_ELRSR_EL2);</div><div class='ctx'> </div><div class='del'>-		write_gicreg(cpu_if-&gt;vgic_hcr &amp; ~ICH_HCR_EN, ICH_HCR_EL2);</div><div class='add'>+		write_gicreg(cpu_if-&gt;vgic_hcr &amp; ~ICH_HCR_EL2_En, ICH_HCR_EL2);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; used_lrs; i++) {</div><div class='ctx'> 			if (elrsr &amp; (1 &lt;&lt; i))</div><div class='hunk'>@@ -274,7 +274,7 @@ void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> 	 * system registers to trap to EL1 (duh), force ICC_SRE_EL1.SRE to 1</div><div class='ctx'> 	 * so that the trap bits can take effect. Yes, we *loves* the GIC.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(cpu_if-&gt;vgic_hcr &amp; ICH_HCR_EN)) {</div><div class='add'>+	if (!(cpu_if-&gt;vgic_hcr &amp; ICH_HCR_EL2_En)) {</div><div class='ctx'> 		write_gicreg(ICC_SRE_EL1_SRE, ICC_SRE_EL1);</div><div class='ctx'> 		isb();</div><div class='ctx'> 	} else if (!cpu_if-&gt;vgic_sre) {</div><div class='hunk'>@@ -295,13 +295,16 @@ void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Prevent the guest from touching the ICC_SRE_EL1 system</div><div class='del'>-	 * register. Note that this may not have any effect, as</div><div class='del'>-	 * ICC_SRE_EL2.Enable being RAO/WI is a valid implementation.</div><div class='del'>-	 */</div><div class='del'>-	write_gicreg(read_gicreg(ICC_SRE_EL2) &amp; ~ICC_SRE_EL2_ENABLE,</div><div class='del'>-		     ICC_SRE_EL2);</div><div class='add'>+	/* Only disable SRE if the host implements the GICv2 interface */</div><div class='add'>+	if (static_branch_unlikely(&amp;vgic_v3_has_v2_compat)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Prevent the guest from touching the ICC_SRE_EL1 system</div><div class='add'>+		 * register. Note that this may not have any effect, as</div><div class='add'>+		 * ICC_SRE_EL2.Enable being RAO/WI is a valid implementation.</div><div class='add'>+		 */</div><div class='add'>+		write_gicreg(read_gicreg(ICC_SRE_EL2) &amp; ~ICC_SRE_EL2_ENABLE,</div><div class='add'>+			     ICC_SRE_EL2);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we need to trap system registers, we must write</div><div class='hunk'>@@ -322,13 +325,16 @@ void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> 		cpu_if-&gt;vgic_vmcr = read_gicreg(ICH_VMCR_EL2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	val = read_gicreg(ICC_SRE_EL2);</div><div class='del'>-	write_gicreg(val | ICC_SRE_EL2_ENABLE, ICC_SRE_EL2);</div><div class='add'>+	/* Only restore SRE if the host implements the GICv2 interface */</div><div class='add'>+	if (static_branch_unlikely(&amp;vgic_v3_has_v2_compat)) {</div><div class='add'>+		val = read_gicreg(ICC_SRE_EL2);</div><div class='add'>+		write_gicreg(val | ICC_SRE_EL2_ENABLE, ICC_SRE_EL2);</div><div class='ctx'> </div><div class='del'>-	if (!cpu_if-&gt;vgic_sre) {</div><div class='del'>-		/* Make sure ENABLE is set at EL2 before setting SRE at EL1 */</div><div class='del'>-		isb();</div><div class='del'>-		write_gicreg(1, ICC_SRE_EL1);</div><div class='add'>+		if (!cpu_if-&gt;vgic_sre) {</div><div class='add'>+			/* Make sure ENABLE is set at EL2 before setting SRE at EL1 */</div><div class='add'>+			isb();</div><div class='add'>+			write_gicreg(1, ICC_SRE_EL1);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -423,29 +429,43 @@ void __vgic_v3_init_lrs(void)</div><div class='ctx'>  */</div><div class='ctx'> u64 __vgic_v3_get_gic_config(void)</div><div class='ctx'> {</div><div class='del'>-	u64 val, sre = read_gicreg(ICC_SRE_EL1);</div><div class='add'>+	u64 val, sre;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * To check whether we have a MMIO-based (GICv2 compatible)</div><div class='del'>-	 * CPU interface, we need to disable the system register</div><div class='del'>-	 * view. To do that safely, we have to prevent any interrupt</div><div class='del'>-	 * from firing (which would be deadly).</div><div class='del'>-	 *</div><div class='del'>-	 * Note that this only makes sense on VHE, as interrupts are</div><div class='del'>-	 * already masked for nVHE as part of the exception entry to</div><div class='del'>-	 * EL2.</div><div class='add'>+	 * In compat mode, we cannot access ICC_SRE_EL1 at any EL</div><div class='add'>+	 * other than EL1 itself; just return the</div><div class='add'>+	 * ICH_VTR_EL2. ICC_IDR0_EL1 is only implemented on a GICv5</div><div class='add'>+	 * system, so we first check if we have GICv5 support.</div><div class='ctx'> 	 */</div><div class='del'>-	if (has_vhe())</div><div class='del'>-		flags = local_daif_save();</div><div class='add'>+	if (cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF))</div><div class='add'>+		return read_gicreg(ICH_VTR_EL2);</div><div class='ctx'> </div><div class='add'>+	sre = read_gicreg(ICC_SRE_EL1);</div><div class='ctx'> 	/*</div><div class='add'>+	 * To check whether we have a MMIO-based (GICv2 compatible)</div><div class='add'>+	 * CPU interface, we need to disable the system register</div><div class='add'>+	 * view.</div><div class='add'>+	 *</div><div class='ctx'> 	 * Table 11-2 "Permitted ICC_SRE_ELx.SRE settings" indicates</div><div class='ctx'> 	 * that to be able to set ICC_SRE_EL1.SRE to 0, all the</div><div class='ctx'> 	 * interrupt overrides must be set. You've got to love this.</div><div class='add'>+	 *</div><div class='add'>+	 * As we always run VHE with HCR_xMO set, no extra xMO</div><div class='add'>+	 * manipulation is required in that case.</div><div class='add'>+	 *</div><div class='add'>+	 * To safely disable SRE, we have to prevent any interrupt</div><div class='add'>+	 * from firing (which would be deadly). This only makes sense</div><div class='add'>+	 * on VHE, as interrupts are already masked for nVHE as part</div><div class='add'>+	 * of the exception entry to EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	sysreg_clear_set(hcr_el2, 0, HCR_AMO | HCR_FMO | HCR_IMO);</div><div class='del'>-	isb();</div><div class='add'>+	if (has_vhe()) {</div><div class='add'>+		flags = local_daif_save();</div><div class='add'>+	} else {</div><div class='add'>+		sysreg_clear_set_hcr(0, HCR_AMO | HCR_FMO | HCR_IMO);</div><div class='add'>+		isb();</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	write_gicreg(0, ICC_SRE_EL1);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='hunk'>@@ -453,11 +473,13 @@ u64 __vgic_v3_get_gic_config(void)</div><div class='ctx'> </div><div class='ctx'> 	write_gicreg(sre, ICC_SRE_EL1);</div><div class='ctx'> 	isb();</div><div class='del'>-	sysreg_clear_set(hcr_el2, HCR_AMO | HCR_FMO | HCR_IMO, 0);</div><div class='del'>-	isb();</div><div class='ctx'> </div><div class='del'>-	if (has_vhe())</div><div class='add'>+	if (has_vhe()) {</div><div class='ctx'> 		local_daif_restore(flags);</div><div class='add'>+	} else {</div><div class='add'>+		sysreg_clear_set_hcr(HCR_AMO | HCR_FMO | HCR_IMO, 0);</div><div class='add'>+		isb();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	val  = (val &amp; ICC_SRE_EL1_SRE) ? 0 : (1ULL &lt;&lt; 63);</div><div class='ctx'> 	val |= read_gicreg(ICH_VTR_EL2);</div><div class='hunk'>@@ -465,6 +487,16 @@ u64 __vgic_v3_get_gic_config(void)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __vgic_v3_compat_mode_enable(void)</div><div class='add'>+{</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sysreg_clear_set_s(SYS_ICH_VCTLR_EL2, 0, ICH_VCTLR_EL2_V3);</div><div class='add'>+	/* Wait for V3 to become enabled */</div><div class='add'>+	isb();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u64 __vgic_v3_read_vmcr(void)</div><div class='ctx'> {</div><div class='ctx'> 	return read_gicreg(ICH_VMCR_EL2);</div><div class='hunk'>@@ -484,6 +516,8 @@ void __vgic_v3_save_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> </div><div class='ctx'> void __vgic_v3_restore_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if)</div><div class='ctx'> {</div><div class='add'>+	__vgic_v3_compat_mode_enable();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If dealing with a GICv2 emulation on GICv3, VMCR_EL2.VFIQen</div><div class='ctx'> 	 * is dependent on ICC_SRE_EL1.SRE, and we have to perform the</div><div class='hunk'>@@ -752,7 +786,7 @@ static void __vgic_v3_bump_eoicount(void)</div><div class='ctx'> 	u32 hcr;</div><div class='ctx'> </div><div class='ctx'> 	hcr = read_gicreg(ICH_HCR_EL2);</div><div class='del'>-	hcr += 1 &lt;&lt; ICH_HCR_EOIcount_SHIFT;</div><div class='add'>+	hcr += 1 &lt;&lt; ICH_HCR_EL2_EOIcount_SHIFT;</div><div class='ctx'> 	write_gicreg(hcr, ICH_HCR_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1012,9 +1046,6 @@ static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)</div><div class='ctx'> 	val = ((vtr &gt;&gt; 29) &amp; 7) &lt;&lt; ICC_CTLR_EL1_PRI_BITS_SHIFT;</div><div class='ctx'> 	/* IDbits */</div><div class='ctx'> 	val |= ((vtr &gt;&gt; 23) &amp; 7) &lt;&lt; ICC_CTLR_EL1_ID_BITS_SHIFT;</div><div class='del'>-	/* SEIS */</div><div class='del'>-	if (kvm_vgic_global_state.ich_vtr_el2 &amp; ICH_VTR_SEIS_MASK)</div><div class='del'>-		val |= BIT(ICC_CTLR_EL1_SEIS_SHIFT);</div><div class='ctx'> 	/* A3V */</div><div class='ctx'> 	val |= ((vtr &gt;&gt; 21) &amp; 1) &lt;&lt; ICC_CTLR_EL1_A3V_SHIFT;</div><div class='ctx'> 	/* EOImode */</div><div class='hunk'>@@ -1047,7 +1078,7 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	u64 ich_hcr;</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))</div><div class='add'>+	if (!is_nested_ctxt(vcpu))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	ich_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);</div><div class='hunk'>@@ -1055,11 +1086,11 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	switch (sysreg) {</div><div class='ctx'> 	case SYS_ICC_IGRPEN0_EL1:</div><div class='ctx'> 		if (is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGRTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		if (!is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGWTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -1072,15 +1103,15 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case SYS_ICC_EOIR0_EL1:</div><div class='ctx'> 	case SYS_ICC_HPPIR0_EL1:</div><div class='ctx'> 	case SYS_ICC_IAR0_EL1:</div><div class='del'>-		return ich_hcr &amp; ICH_HCR_TALL0;</div><div class='add'>+		return ich_hcr &amp; ICH_HCR_EL2_TALL0;</div><div class='ctx'> </div><div class='ctx'> 	case SYS_ICC_IGRPEN1_EL1:</div><div class='ctx'> 		if (is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGRTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		if (!is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGWTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -1093,10 +1124,10 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case SYS_ICC_EOIR1_EL1:</div><div class='ctx'> 	case SYS_ICC_HPPIR1_EL1:</div><div class='ctx'> 	case SYS_ICC_IAR1_EL1:</div><div class='del'>-		return ich_hcr &amp; ICH_HCR_TALL1;</div><div class='add'>+		return ich_hcr &amp; ICH_HCR_EL2_TALL1;</div><div class='ctx'> </div><div class='ctx'> 	case SYS_ICC_DIR_EL1:</div><div class='del'>-		if (ich_hcr &amp; ICH_HCR_TDIR)</div><div class='add'>+		if (ich_hcr &amp; ICH_HCR_EL2_TDIR)</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -1104,7 +1135,7 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case SYS_ICC_RPR_EL1:</div><div class='ctx'> 	case SYS_ICC_CTLR_EL1:</div><div class='ctx'> 	case SYS_ICC_PMR_EL1:</div><div class='del'>-		return ich_hcr &amp; ICH_HCR_TC;</div><div class='add'>+		return ich_hcr &amp; ICH_HCR_EL2_TC;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/debug-sr.c b/arch/arm64/kvm/hyp/vhe/debug-sr.c<br/>index 289689b2682d..0100339b09e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/debug-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/debug-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/debug-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vhe/debug-sr.c</a></div><div class='hunk'>@@ -19,8 +19,3 @@ void __debug_switch_to_host(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	__debug_switch_to_host_common(vcpu);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-u64 __kvm_get_mdcr_el2(void)</div><div class='del'>-{</div><div class='del'>-	return read_sysreg(mdcr_el2);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c<br/>index 80581b1c3995..9984c492305a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/switch.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/switch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/switch.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vhe/switch.c</a></div><div class='hunk'>@@ -43,97 +43,71 @@ DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);</div><div class='ctx'>  *</div><div class='ctx'>  * - API/APK: they are already accounted for by vcpu_load(), and can</div><div class='ctx'>  *   only take effect across a load/put cycle (such as ERET)</div><div class='add'>+ *</div><div class='add'>+ * - FIEN: no way we let a guest have access to the RAS "Common Fault</div><div class='add'>+ *   Injection" thing, whatever that does</div><div class='ctx'>  */</div><div class='del'>-#define NV_HCR_GUEST_EXCLUDE	(HCR_TGE | HCR_API | HCR_APK)</div><div class='add'>+#define NV_HCR_GUEST_EXCLUDE	(HCR_TGE | HCR_API | HCR_APK | HCR_FIEN)</div><div class='ctx'> </div><div class='ctx'> static u64 __compute_hcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 hcr = vcpu-&gt;arch.hcr_el2;</div><div class='add'>+	u64 guest_hcr, hcr = vcpu-&gt;arch.hcr_el2;</div><div class='ctx'> </div><div class='ctx'> 	if (!vcpu_has_nv(vcpu))</div><div class='ctx'> 		return hcr;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * We rely on the invariant that a vcpu entered from HYP</div><div class='add'>+	 * context must also exit in the same context, as only an ERET</div><div class='add'>+	 * instruction can kick us out of it, and we obviously trap</div><div class='add'>+	 * that sucker. PSTATE.M will get fixed-up on exit.</div><div class='add'>+	 */</div><div class='ctx'> 	if (is_hyp_ctxt(vcpu)) {</div><div class='add'>+		host_data_set_flag(VCPU_IN_HYP_CONTEXT);</div><div class='add'>+</div><div class='ctx'> 		hcr |= HCR_NV | HCR_NV2 | HCR_AT | HCR_TTLB;</div><div class='ctx'> </div><div class='ctx'> 		if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='ctx'> 			hcr |= HCR_NV1;</div><div class='ctx'> </div><div class='del'>-		write_sysreg_s(vcpu-&gt;arch.ctxt.vncr_array, SYS_VNCR_EL2);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return hcr | (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; ~NV_HCR_GUEST_EXCLUDE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __activate_cptr_traps(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	u64 cptr;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to</div><div class='del'>-	 * CPTR_EL2. In general, CPACR_EL1 has the same layout as CPTR_EL2,</div><div class='del'>-	 * except for some missing controls, such as TAM.</div><div class='del'>-	 * In this case, CPTR_EL2.TAM has the same position with or without</div><div class='del'>-	 * VHE (HCR.E2H == 1) which allows us to use here the CPTR_EL2.TAM</div><div class='del'>-	 * shift value for trapping the AMU accesses.</div><div class='del'>-	 */</div><div class='del'>-	u64 val = CPACR_ELx_TTA | CPTR_EL2_TAM;</div><div class='add'>+		/*</div><div class='add'>+		 * Nothing in HCR_EL2 should impact running in hypervisor</div><div class='add'>+		 * context, apart from bits we have defined as RESx (E2H,</div><div class='add'>+		 * HCD and co), or that cannot be set directly (the EXCLUDE</div><div class='add'>+		 * bits). Given that we OR the guest's view with the host's,</div><div class='add'>+		 * we can use the 0 value as the starting point, and only</div><div class='add'>+		 * use the config-driven RES1 bits.</div><div class='add'>+		 */</div><div class='add'>+		guest_hcr = kvm_vcpu_apply_reg_masks(vcpu, HCR_EL2, 0);</div><div class='ctx'> </div><div class='del'>-	if (guest_owns_fp_regs()) {</div><div class='del'>-		val |= CPACR_ELx_FPEN;</div><div class='del'>-		if (vcpu_has_sve(vcpu))</div><div class='del'>-			val |= CPACR_ELx_ZEN;</div><div class='add'>+		write_sysreg_s(vcpu-&gt;arch.ctxt.vncr_array, SYS_VNCR_EL2);</div><div class='ctx'> 	} else {</div><div class='del'>-		__activate_traps_fpsimd32(vcpu);</div><div class='del'>-	}</div><div class='add'>+		host_data_clear_flag(VCPU_IN_HYP_CONTEXT);</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_has_nv(vcpu))</div><div class='del'>-		goto write;</div><div class='add'>+		guest_hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='add'>+		if (guest_hcr &amp; HCR_NV) {</div><div class='add'>+			u64 va = __fix_to_virt(vncr_fixmap(smp_processor_id()));</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The architecture is a bit crap (what a surprise): an EL2 guest</div><div class='del'>-	 * writing to CPTR_EL2 via CPACR_EL1 can't set any of TCPAC or TTA,</div><div class='del'>-	 * as they are RES0 in the guest's view. To work around it, trap the</div><div class='del'>-	 * sucker using the very same bit it can't set...</div><div class='del'>-	 */</div><div class='del'>-	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; is_hyp_ctxt(vcpu))</div><div class='del'>-		val |= CPTR_EL2_TCPAC;</div><div class='add'>+			/* Inherit the low bits from the actual register */</div><div class='add'>+			va |= __vcpu_sys_reg(vcpu, VNCR_EL2) &amp; GENMASK(PAGE_SHIFT - 1, 0);</div><div class='add'>+			write_sysreg_s(va, SYS_VNCR_EL2);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Layer the guest hypervisor's trap configuration on top of our own if</div><div class='del'>-	 * we're in a nested context.</div><div class='del'>-	 */</div><div class='del'>-	if (is_hyp_ctxt(vcpu))</div><div class='del'>-		goto write;</div><div class='del'>-</div><div class='del'>-	cptr = vcpu_sanitised_cptr_el2(vcpu);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Pay attention, there's some interesting detail here.</div><div class='del'>-	 *</div><div class='del'>-	 * The CPTR_EL2.xEN fields are 2 bits wide, although there are only two</div><div class='del'>-	 * meaningful trap states when HCR_EL2.TGE = 0 (running a nested guest):</div><div class='del'>-	 *</div><div class='del'>-	 *  - CPTR_EL2.xEN = x0, traps are enabled</div><div class='del'>-	 *  - CPTR_EL2.xEN = x1, traps are disabled</div><div class='del'>-	 *</div><div class='del'>-	 * In other words, bit[0] determines if guest accesses trap or not. In</div><div class='del'>-	 * the interest of simplicity, clear the entire field if the guest</div><div class='del'>-	 * hypervisor has traps enabled to dispel any illusion of something more</div><div class='del'>-	 * complicated taking place.</div><div class='del'>-	 */</div><div class='del'>-	if (!(SYS_FIELD_GET(CPACR_ELx, FPEN, cptr) &amp; BIT(0)))</div><div class='del'>-		val &amp;= ~CPACR_ELx_FPEN;</div><div class='del'>-	if (!(SYS_FIELD_GET(CPACR_ELx, ZEN, cptr) &amp; BIT(0)))</div><div class='del'>-		val &amp;= ~CPACR_ELx_ZEN;</div><div class='add'>+			/* Force NV2 in case the guest is forgetful... */</div><div class='add'>+			guest_hcr |= HCR_NV2;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR3_EL1, S2POE, IMP))</div><div class='del'>-		val |= cptr &amp; CPACR_ELx_E0POE;</div><div class='add'>+		/*</div><div class='add'>+		 * Exclude the guest's TWED configuration if it hasn't set TWE</div><div class='add'>+		 * to avoid potentially delaying traps for the host.</div><div class='add'>+		 */</div><div class='add'>+		if (!(guest_hcr &amp; HCR_TWE))</div><div class='add'>+			guest_hcr &amp;= ~(HCR_EL2_TWEDEn | HCR_EL2_TWEDEL);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	val |= cptr &amp; CPTR_EL2_TCPAC;</div><div class='add'>+	BUG_ON(host_data_test_flag(VCPU_IN_HYP_CONTEXT) &amp;&amp;</div><div class='add'>+	       host_data_test_flag(L1_VNCR_MAPPED));</div><div class='ctx'> </div><div class='del'>-write:</div><div class='del'>-	write_sysreg(val, cpacr_el1);</div><div class='add'>+	return hcr | (guest_hcr &amp; ~NV_HCR_GUEST_EXCLUDE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __activate_traps(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -174,7 +148,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	___deactivate_traps(vcpu);</div><div class='ctx'> </div><div class='del'>-	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='ctx'> </div><div class='ctx'> 	if (has_cntpoff()) {</div><div class='ctx'> 		struct timer_map map;</div><div class='hunk'>@@ -188,9 +162,9 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 */</div><div class='ctx'> 		val = read_sysreg_el0(SYS_CNTP_CVAL);</div><div class='ctx'> 		if (map.direct_ptimer == vcpu_ptimer(vcpu))</div><div class='del'>-			__vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = val;</div><div class='add'>+			__vcpu_assign_sys_reg(vcpu, CNTP_CVAL_EL0, val);</div><div class='ctx'> 		if (map.direct_ptimer == vcpu_hptimer(vcpu))</div><div class='del'>-			__vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2) = val;</div><div class='add'>+			__vcpu_assign_sys_reg(vcpu, CNTHP_CVAL_EL2, val);</div><div class='ctx'> </div><div class='ctx'> 		offset = read_sysreg_s(SYS_CNTPOFF_EL2);</div><div class='ctx'> </div><div class='hunk'>@@ -207,7 +181,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));</div><div class='ctx'> </div><div class='del'>-	kvm_reset_cptr_el2(vcpu);</div><div class='add'>+	__deactivate_cptr_traps(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (!arm64_kernel_unmapped_at_el0())</div><div class='ctx'> 		host_vectors = __this_cpu_read(this_cpu_vector);</div><div class='hunk'>@@ -256,6 +230,110 @@ void kvm_vcpu_put_vhe(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	host_data_ptr(host_ctxt)-&gt;__hyp_running_vcpu = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 compute_emulated_cntx_ctl_el0(struct kvm_vcpu *vcpu,</div><div class='add'>+					 enum vcpu_sysreg reg)</div><div class='add'>+{</div><div class='add'>+	unsigned long ctl;</div><div class='add'>+	u64 cval, cnt;</div><div class='add'>+	bool stat;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case CNTP_CTL_EL0:</div><div class='add'>+		cval = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);</div><div class='add'>+		ctl  = __vcpu_sys_reg(vcpu, CNTP_CTL_EL0);</div><div class='add'>+		cnt  = compute_counter_value(vcpu_ptimer(vcpu));</div><div class='add'>+		break;</div><div class='add'>+	case CNTV_CTL_EL0:</div><div class='add'>+		cval = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);</div><div class='add'>+		ctl  = __vcpu_sys_reg(vcpu, CNTV_CTL_EL0);</div><div class='add'>+		cnt  = compute_counter_value(vcpu_vtimer(vcpu));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stat = cval &lt;= cnt;</div><div class='add'>+	__assign_bit(__ffs(ARCH_TIMER_CTRL_IT_STAT), &amp;ctl, stat);</div><div class='add'>+</div><div class='add'>+	return ctl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_hyp_handle_timer(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+{</div><div class='add'>+	u64 esr, val;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Having FEAT_ECV allows for a better quality of timer emulation.</div><div class='add'>+	 * However, this comes at a huge cost in terms of traps. Try and</div><div class='add'>+	 * satisfy the reads from guest's hypervisor context without</div><div class='add'>+	 * returning to the kernel if we can.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_hyp_ctxt(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+	if ((esr &amp; ESR_ELx_SYS64_ISS_DIR_MASK) != ESR_ELx_SYS64_ISS_DIR_READ)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (esr_sys64_to_sysreg(esr)) {</div><div class='add'>+	case SYS_CNTP_CTL_EL02:</div><div class='add'>+		val = compute_emulated_cntx_ctl_el0(vcpu, CNTP_CTL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTP_CTL_EL0:</div><div class='add'>+		if (vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			val = read_sysreg_el0(SYS_CNTP_CTL);</div><div class='add'>+		else</div><div class='add'>+			val = compute_emulated_cntx_ctl_el0(vcpu, CNTP_CTL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTP_CVAL_EL02:</div><div class='add'>+		val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTP_CVAL_EL0:</div><div class='add'>+		if (vcpu_el2_e2h_is_set(vcpu)) {</div><div class='add'>+			val = read_sysreg_el0(SYS_CNTP_CVAL);</div><div class='add'>+</div><div class='add'>+			if (!has_cntpoff())</div><div class='add'>+				val -= timer_get_offset(vcpu_hptimer(vcpu));</div><div class='add'>+		} else {</div><div class='add'>+			val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTPCT_EL0:</div><div class='add'>+	case SYS_CNTPCTSS_EL0:</div><div class='add'>+		val = compute_counter_value(vcpu_hptimer(vcpu));</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTV_CTL_EL02:</div><div class='add'>+		val = compute_emulated_cntx_ctl_el0(vcpu, CNTV_CTL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTV_CTL_EL0:</div><div class='add'>+		if (vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			val = read_sysreg_el0(SYS_CNTV_CTL);</div><div class='add'>+		else</div><div class='add'>+			val = compute_emulated_cntx_ctl_el0(vcpu, CNTV_CTL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTV_CVAL_EL02:</div><div class='add'>+		val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTV_CVAL_EL0:</div><div class='add'>+		if (vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			val = read_sysreg_el0(SYS_CNTV_CVAL);</div><div class='add'>+		else</div><div class='add'>+			val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_CNTVCT_EL0:</div><div class='add'>+	case SYS_CNTVCTSS_EL0:</div><div class='add'>+		val = compute_counter_value(vcpu_hvtimer(vcpu));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vcpu_set_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu), val);</div><div class='add'>+	__kvm_skip_instr(vcpu);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='hunk'>@@ -309,14 +387,6 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kvm_hyp_save_fpsimd_host(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	__fpsimd_save_state(*host_data_ptr(fpsimd_state));</div><div class='del'>-</div><div class='del'>-	if (kvm_has_fpmr(vcpu-&gt;kvm))</div><div class='del'>-		**host_data_ptr(fpmr_ptr) = read_sysreg_s(SYS_FPMR);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool kvm_hyp_handle_tlbi_el2(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='hunk'>@@ -353,6 +423,14 @@ static bool kvm_hyp_handle_tlbi_el2(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If we have to check for any VNCR mapping being invalidated,</div><div class='add'>+	 * go back to the slow path for further processing.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu) &amp;&amp;</div><div class='add'>+	    atomic_read(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	__kvm_skip_instr(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -409,6 +487,9 @@ static bool kvm_hyp_handle_sysreg_vhe(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	if (kvm_hyp_handle_tlbi_el2(vcpu, exit_code))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	if (kvm_hyp_handle_timer(vcpu, exit_code))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	if (kvm_hyp_handle_cpacr_el1(vcpu, exit_code))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='hunk'>@@ -418,6 +499,25 @@ static bool kvm_hyp_handle_sysreg_vhe(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	return kvm_hyp_handle_sysreg(vcpu, exit_code);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool kvm_hyp_handle_impdef(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='add'>+{</div><div class='add'>+	u64 iss;</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Compute a synthetic ESR for a sysreg trap. Conveniently, AFSR1_EL2</div><div class='add'>+	 * is populated with a correct ISS for a sysreg trap. These fruity</div><div class='add'>+	 * parts are 64bit only, so unconditionally set IL.</div><div class='add'>+	 */</div><div class='add'>+	iss = ESR_ELx_ISS(read_sysreg_s(SYS_AFSR1_EL2));</div><div class='add'>+	vcpu-&gt;arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) |</div><div class='add'>+				   FIELD_PREP(ESR_ELx_ISS_MASK, iss) |</div><div class='add'>+				   ESR_ELx_IL;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const exit_handler_fn hyp_exit_handlers[] = {</div><div class='ctx'> 	[0 ... ESR_ELx_EC_MAX]		= NULL,</div><div class='ctx'> 	[ESR_ELx_EC_CP15_32]		= kvm_hyp_handle_cp15_32,</div><div class='hunk'>@@ -429,20 +529,23 @@ static const exit_handler_fn hyp_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_WATCHPT_LOW]	= kvm_hyp_handle_watchpt_low,</div><div class='ctx'> 	[ESR_ELx_EC_ERET]		= kvm_hyp_handle_eret,</div><div class='ctx'> 	[ESR_ELx_EC_MOPS]		= kvm_hyp_handle_mops,</div><div class='add'>+</div><div class='add'>+	/* Apple shenanigans */</div><div class='add'>+	[0x3F]				= kvm_hyp_handle_impdef,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const exit_handler_fn *kvm_get_exit_handler_array(struct kvm_vcpu *vcpu)</div><div class='add'>+static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> {</div><div class='del'>-	return hyp_exit_handlers;</div><div class='del'>-}</div><div class='add'>+	synchronize_vcpu_pstate(vcpu, exit_code);</div><div class='ctx'> </div><div class='del'>-static void early_exit_filter(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='del'>-{</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we were in HYP context on entry, adjust the PSTATE view</div><div class='del'>-	 * so that the usual helpers work correctly.</div><div class='add'>+	 * so that the usual helpers work correctly. This enforces our</div><div class='add'>+	 * invariant that the guest's HYP context status is preserved</div><div class='add'>+	 * across a run.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu_has_nv(vcpu) &amp;&amp; (read_sysreg(hcr_el2) &amp; HCR_NV)) {</div><div class='add'>+	if (vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+	    unlikely(host_data_test_flag(VCPU_IN_HYP_CONTEXT))) {</div><div class='ctx'> 		u64 mode = *vcpu_cpsr(vcpu) &amp; (PSR_MODE_MASK | PSR_MODE32_BIT);</div><div class='ctx'> </div><div class='ctx'> 		switch (mode) {</div><div class='hunk'>@@ -457,6 +560,12 @@ static void early_exit_filter(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 		*vcpu_cpsr(vcpu) &amp;= ~(PSR_MODE_MASK | PSR_MODE32_BIT);</div><div class='ctx'> 		*vcpu_cpsr(vcpu) |= mode;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Apply extreme paranoia! */</div><div class='add'>+	BUG_ON(vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+	       !!host_data_test_flag(VCPU_IN_HYP_CONTEXT) != is_hyp_ctxt(vcpu));</div><div class='add'>+</div><div class='add'>+	return __fixup_guest_exit(vcpu, exit_code, hyp_exit_handlers);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Switch to the guest for VHE systems running in EL2 */</div><div class='hunk'>@@ -469,6 +578,8 @@ static int __kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	host_ctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	guest_ctxt = &amp;vcpu-&gt;arch.ctxt;</div><div class='ctx'> </div><div class='add'>+	fpsimd_lazy_switch_to_guest(vcpu);</div><div class='add'>+</div><div class='ctx'> 	sysreg_save_host_state_vhe(host_ctxt);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -497,11 +608,21 @@ static int __kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	sysreg_restore_host_state_vhe(host_ctxt);</div><div class='ctx'> </div><div class='add'>+	__debug_switch_to_host(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that all system register writes above have taken effect</div><div class='add'>+	 * before returning to the host. In VHE mode, CPTR traps for</div><div class='add'>+	 * FPSIMD/SVE/SME also apply to EL2, so FPSIMD/SVE/SME state must be</div><div class='add'>+	 * manipulated after the ISB.</div><div class='add'>+	 */</div><div class='add'>+	isb();</div><div class='add'>+</div><div class='add'>+	fpsimd_lazy_switch_to_host(vcpu);</div><div class='add'>+</div><div class='ctx'> 	if (guest_owns_fp_regs())</div><div class='ctx'> 		__fpsimd_save_fpexc32(vcpu);</div><div class='ctx'> </div><div class='del'>-	__debug_switch_to_host(vcpu);</div><div class='del'>-</div><div class='ctx'> 	return exit_code;</div><div class='ctx'> }</div><div class='ctx'> NOKPROBE_SYMBOL(__kvm_vcpu_run_vhe);</div><div class='hunk'>@@ -531,12 +652,6 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX_NOIRQ);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * When we exit from the guest we change a number of CPU configuration</div><div class='del'>-	 * parameters, such as traps.  We rely on the isb() in kvm_call_hyp*()</div><div class='del'>-	 * to make sure these changes take effect before running the host or</div><div class='del'>-	 * additional guests.</div><div class='del'>-	 */</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c<br/>index e12bd7d6d2dc..f28c6cf4fe1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/sysreg-sr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/sysreg-sr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/sysreg-sr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vhe/sysreg-sr.c</a></div><div class='hunk'>@@ -15,6 +15,138 @@</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_nested.h&gt;</div><div class='ctx'> </div><div class='add'>+static void __sysreg_save_vel2_state(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* These registers are common with EL1 */</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, PAR_EL1,	 read_sysreg(par_el1));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, TPIDR_EL1,	 read_sysreg(tpidr_el1));</div><div class='add'>+</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, ESR_EL2,	 read_sysreg_el1(SYS_ESR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, AFSR0_EL2,	 read_sysreg_el1(SYS_AFSR0));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, AFSR1_EL2,	 read_sysreg_el1(SYS_AFSR1));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, FAR_EL2,	 read_sysreg_el1(SYS_FAR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, MAIR_EL2,	 read_sysreg_el1(SYS_MAIR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, VBAR_EL2,	 read_sysreg_el1(SYS_VBAR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, CONTEXTIDR_EL2, read_sysreg_el1(SYS_CONTEXTIDR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, AMAIR_EL2,	 read_sysreg_el1(SYS_AMAIR));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In VHE mode those registers are compatible between EL1 and EL2,</div><div class='add'>+	 * and the guest uses the _EL1 versions on the CPU naturally.</div><div class='add'>+	 * So we save them into their _EL2 versions here.</div><div class='add'>+	 * For nVHE mode we trap accesses to those registers, so our</div><div class='add'>+	 * _EL2 copy in sys_regs[] is always up-to-date and we don't need</div><div class='add'>+	 * to save anything here.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu)) {</div><div class='add'>+		u64 val;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We don't save CPTR_EL2, as accesses to CPACR_EL1</div><div class='add'>+		 * are always trapped, ensuring that the in-memory</div><div class='add'>+		 * copy is always up-to-date. A small blessing...</div><div class='add'>+		 */</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, SCTLR_EL2,	 read_sysreg_el1(SYS_SCTLR));</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, TTBR0_EL2,	 read_sysreg_el1(SYS_TTBR0));</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, TTBR1_EL2,	 read_sysreg_el1(SYS_TTBR1));</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, TCR_EL2,	 read_sysreg_el1(SYS_TCR));</div><div class='add'>+</div><div class='add'>+		if (ctxt_has_tcrx(&amp;vcpu-&gt;arch.ctxt)) {</div><div class='add'>+			__vcpu_assign_sys_reg(vcpu, TCR2_EL2, read_sysreg_el1(SYS_TCR2));</div><div class='add'>+</div><div class='add'>+			if (ctxt_has_s1pie(&amp;vcpu-&gt;arch.ctxt)) {</div><div class='add'>+				__vcpu_assign_sys_reg(vcpu, PIRE0_EL2, read_sysreg_el1(SYS_PIRE0));</div><div class='add'>+				__vcpu_assign_sys_reg(vcpu, PIR_EL2, read_sysreg_el1(SYS_PIR));</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ctxt_has_s1poe(&amp;vcpu-&gt;arch.ctxt))</div><div class='add'>+				__vcpu_assign_sys_reg(vcpu, POR_EL2, read_sysreg_el1(SYS_POR));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The EL1 view of CNTKCTL_EL1 has a bunch of RES0 bits where</div><div class='add'>+		 * the interesting CNTHCTL_EL2 bits live. So preserve these</div><div class='add'>+		 * bits when reading back the guest-visible value.</div><div class='add'>+		 */</div><div class='add'>+		val = read_sysreg_el1(SYS_CNTKCTL);</div><div class='add'>+		val &amp;= CNTKCTL_VALID_BITS;</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, &amp;=, ~CNTKCTL_VALID_BITS);</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, |=, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, SP_EL2,	 read_sysreg(sp_el1));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, ELR_EL2,	 read_sysreg_el1(SYS_ELR));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, SPSR_EL2,	 read_sysreg_el1(SYS_SPSR));</div><div class='add'>+</div><div class='add'>+	if (ctxt_has_sctlr2(&amp;vcpu-&gt;arch.ctxt))</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, SCTLR2_EL2, read_sysreg_el1(SYS_SCTLR2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __sysreg_restore_vel2_state(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	/* These registers are common with EL1 */</div><div class='add'>+	write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1),	par_el1);</div><div class='add'>+	write_sysreg(__vcpu_sys_reg(vcpu, TPIDR_EL1),	tpidr_el1);</div><div class='add'>+</div><div class='add'>+	write_sysreg(ctxt_midr_el1(&amp;vcpu-&gt;arch.ctxt),			vpidr_el2);</div><div class='add'>+	write_sysreg(__vcpu_sys_reg(vcpu, MPIDR_EL1),			vmpidr_el2);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2),		SYS_MAIR);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2),		SYS_VBAR);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, CONTEXTIDR_EL2),		SYS_CONTEXTIDR);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, AMAIR_EL2),		SYS_AMAIR);</div><div class='add'>+</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu)) {</div><div class='add'>+		/*</div><div class='add'>+		 * In VHE mode those registers are compatible between</div><div class='add'>+		 * EL1 and EL2.</div><div class='add'>+		 */</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2),   SYS_SCTLR);</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, CPTR_EL2),    SYS_CPACR);</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2),   SYS_TTBR0);</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR1_EL2),   SYS_TTBR1);</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR_EL2),	    SYS_TCR);</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, CNTHCTL_EL2), SYS_CNTKCTL);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * CNTHCTL_EL2 only affects EL1 when running nVHE, so</div><div class='add'>+		 * no need to restore it.</div><div class='add'>+		 */</div><div class='add'>+		val = translate_sctlr_el2_to_sctlr_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2));</div><div class='add'>+		write_sysreg_el1(val, SYS_SCTLR);</div><div class='add'>+		val = translate_cptr_el2_to_cpacr_el1(__vcpu_sys_reg(vcpu, CPTR_EL2));</div><div class='add'>+		write_sysreg_el1(val, SYS_CPACR);</div><div class='add'>+		val = translate_ttbr0_el2_to_ttbr0_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+		write_sysreg_el1(val, SYS_TTBR0);</div><div class='add'>+		val = translate_tcr_el2_to_tcr_el1(__vcpu_sys_reg(vcpu, TCR_EL2));</div><div class='add'>+		write_sysreg_el1(val, SYS_TCR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctxt_has_tcrx(&amp;vcpu-&gt;arch.ctxt)) {</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2);</div><div class='add'>+</div><div class='add'>+		if (ctxt_has_s1pie(&amp;vcpu-&gt;arch.ctxt)) {</div><div class='add'>+			write_sysreg_el1(__vcpu_sys_reg(vcpu, PIR_EL2), SYS_PIR);</div><div class='add'>+			write_sysreg_el1(__vcpu_sys_reg(vcpu, PIRE0_EL2), SYS_PIRE0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ctxt_has_s1poe(&amp;vcpu-&gt;arch.ctxt))</div><div class='add'>+			write_sysreg_el1(__vcpu_sys_reg(vcpu, POR_EL2), SYS_POR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2),		SYS_ESR);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2),	SYS_AFSR0);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2),	SYS_AFSR1);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2),		SYS_FAR);</div><div class='add'>+	write_sysreg(__vcpu_sys_reg(vcpu, SP_EL2),		sp_el1);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, ELR_EL2),		SYS_ELR);</div><div class='add'>+	write_sysreg_el1(__vcpu_sys_reg(vcpu, SPSR_EL2),	SYS_SPSR);</div><div class='add'>+</div><div class='add'>+	if (ctxt_has_sctlr2(&amp;vcpu-&gt;arch.ctxt))</div><div class='add'>+		write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR2_EL2), SYS_SCTLR2);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and</div><div class='ctx'>  * pstate, which are handled as part of the el2 return state) on every</div><div class='hunk'>@@ -66,6 +198,7 @@ void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpu_context *guest_ctxt = &amp;vcpu-&gt;arch.ctxt;</div><div class='ctx'> 	struct kvm_cpu_context *host_ctxt;</div><div class='add'>+	u64 midr, mpidr;</div><div class='ctx'> </div><div class='ctx'> 	host_ctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	__sysreg_save_user_state(host_ctxt);</div><div class='hunk'>@@ -89,7 +222,24 @@ void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	__sysreg32_restore_state(vcpu);</div><div class='ctx'> 	__sysreg_restore_user_state(guest_ctxt);</div><div class='del'>-	__sysreg_restore_el1_state(guest_ctxt);</div><div class='add'>+</div><div class='add'>+	if (unlikely(is_hyp_ctxt(vcpu))) {</div><div class='add'>+		__sysreg_restore_vel2_state(vcpu);</div><div class='add'>+	} else {</div><div class='add'>+		if (vcpu_has_nv(vcpu)) {</div><div class='add'>+			/*</div><div class='add'>+			 * As we're restoring a nested guest, set the value</div><div class='add'>+			 * provided by the guest hypervisor.</div><div class='add'>+			 */</div><div class='add'>+			midr = ctxt_sys_reg(guest_ctxt, VPIDR_EL2);</div><div class='add'>+			mpidr = ctxt_sys_reg(guest_ctxt, VMPIDR_EL2);</div><div class='add'>+		} else {</div><div class='add'>+			midr = ctxt_midr_el1(guest_ctxt);</div><div class='add'>+			mpidr = ctxt_sys_reg(guest_ctxt, MPIDR_EL1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		__sysreg_restore_el1_state(guest_ctxt, midr, mpidr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vcpu_set_flag(vcpu, SYSREGS_ON_CPU);</div><div class='ctx'> }</div><div class='hunk'>@@ -112,7 +262,11 @@ void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	host_ctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> </div><div class='del'>-	__sysreg_save_el1_state(guest_ctxt);</div><div class='add'>+	if (unlikely(is_hyp_ctxt(vcpu)))</div><div class='add'>+		__sysreg_save_vel2_state(vcpu);</div><div class='add'>+	else</div><div class='add'>+		__sysreg_save_el1_state(guest_ctxt);</div><div class='add'>+</div><div class='ctx'> 	__sysreg_save_user_state(guest_ctxt);</div><div class='ctx'> 	__sysreg32_save_state(vcpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/tlb.c b/arch/arm64/kvm/hyp/vhe/tlb.c<br/>index 3d50a1bd2bdb..ec2569818629 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/tlb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hyp/vhe/tlb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hyp/vhe/tlb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hyp/vhe/tlb.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static void enter_vmid_context(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 	__load_stage2(mmu, mmu-&gt;arch);</div><div class='ctx'> 	val = read_sysreg(hcr_el2);</div><div class='ctx'> 	val &amp;= ~HCR_TGE;</div><div class='del'>-	write_sysreg(val, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(val);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +73,7 @@ static void exit_vmid_context(struct tlb_inv_context *cxt)</div><div class='ctx'> 	 * We're done with the TLB operation, let's restore the host's</div><div class='ctx'> 	 * view of HCR_EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	/* ... and the stage-2 MMU context that we switched away from */</div><div class='head'>diff --git a/arch/arm64/kvm/hypercalls.c b/arch/arm64/kvm/hypercalls.c<br/>index 5763d979d8ca..58c5fe7d7572 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hypercalls.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/hypercalls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/hypercalls.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/hypercalls.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> 	GENMASK(KVM_REG_ARM_STD_HYP_BMAP_BIT_COUNT - 1, 0)</div><div class='ctx'> #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES			\</div><div class='ctx'> 	GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT - 1, 0)</div><div class='add'>+#define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2			\</div><div class='add'>+	GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_2_BIT_COUNT - 1, 0)</div><div class='ctx'> </div><div class='ctx'> static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val)</div><div class='ctx'> {</div><div class='hunk'>@@ -268,6 +270,7 @@ int kvm_smccc_call_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	u32 feature;</div><div class='ctx'> 	u8 action;</div><div class='ctx'> 	gpa_t gpa;</div><div class='add'>+	uuid_t uuid;</div><div class='ctx'> </div><div class='ctx'> 	action = kvm_smccc_get_action(vcpu, func_id);</div><div class='ctx'> 	switch (action) {</div><div class='hunk'>@@ -317,7 +320,7 @@ int kvm_smccc_call_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> 				 * to the guest, and hide SSBS so that the</div><div class='ctx'> 				 * guest stays protected.</div><div class='ctx'> 				 */</div><div class='del'>-				if (cpus_have_final_cap(ARM64_SSBS))</div><div class='add'>+				if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64PFR1_EL1, SSBS, IMP))</div><div class='ctx'> 					break;</div><div class='ctx'> 				fallthrough;</div><div class='ctx'> 			case SPECTRE_UNAFFECTED:</div><div class='hunk'>@@ -353,13 +356,16 @@ int kvm_smccc_call_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			val[0] = gpa;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID:</div><div class='del'>-		val[0] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0;</div><div class='del'>-		val[1] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1;</div><div class='del'>-		val[2] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2;</div><div class='del'>-		val[3] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3;</div><div class='add'>+		uuid = ARM_SMCCC_VENDOR_HYP_UID_KVM;</div><div class='add'>+		val[0] = smccc_uuid_to_reg(&amp;uuid, 0);</div><div class='add'>+		val[1] = smccc_uuid_to_reg(&amp;uuid, 1);</div><div class='add'>+		val[2] = smccc_uuid_to_reg(&amp;uuid, 2);</div><div class='add'>+		val[3] = smccc_uuid_to_reg(&amp;uuid, 3);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID:</div><div class='ctx'> 		val[0] = smccc_feat-&gt;vendor_hyp_bmap;</div><div class='add'>+		/* Function numbers 2-63 are reserved for pKVM for now */</div><div class='add'>+		val[2] = smccc_feat-&gt;vendor_hyp_bmap_2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID:</div><div class='ctx'> 		kvm_ptp_get_time(vcpu, val);</div><div class='hunk'>@@ -387,6 +393,7 @@ static const u64 kvm_arm_fw_reg_ids[] = {</div><div class='ctx'> 	KVM_REG_ARM_STD_BMAP,</div><div class='ctx'> 	KVM_REG_ARM_STD_HYP_BMAP,</div><div class='ctx'> 	KVM_REG_ARM_VENDOR_HYP_BMAP,</div><div class='add'>+	KVM_REG_ARM_VENDOR_HYP_BMAP_2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void kvm_arm_init_hypercalls(struct kvm *kvm)</div><div class='hunk'>@@ -428,7 +435,7 @@ int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)</div><div class='ctx'>  * Convert the workaround level into an easy-to-compare number, where higher</div><div class='ctx'>  * values mean better protection.</div><div class='ctx'>  */</div><div class='del'>-static int get_kernel_wa_level(u64 regid)</div><div class='add'>+static int get_kernel_wa_level(struct kvm_vcpu *vcpu, u64 regid)</div><div class='ctx'> {</div><div class='ctx'> 	switch (regid) {</div><div class='ctx'> 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:</div><div class='hunk'>@@ -449,7 +456,7 @@ static int get_kernel_wa_level(u64 regid)</div><div class='ctx'> 			 * don't have any FW mitigation if SSBS is there at</div><div class='ctx'> 			 * all times.</div><div class='ctx'> 			 */</div><div class='del'>-			if (cpus_have_final_cap(ARM64_SSBS))</div><div class='add'>+			if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64PFR1_EL1, SSBS, IMP))</div><div class='ctx'> 				return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case SPECTRE_UNAFFECTED:</div><div class='hunk'>@@ -486,7 +493,7 @@ int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:</div><div class='ctx'> 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:</div><div class='ctx'> 	case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:</div><div class='del'>-		val = get_kernel_wa_level(reg-&gt;id) &amp; KVM_REG_FEATURE_LEVEL_MASK;</div><div class='add'>+		val = get_kernel_wa_level(vcpu, reg-&gt;id) &amp; KVM_REG_FEATURE_LEVEL_MASK;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_REG_ARM_STD_BMAP:</div><div class='ctx'> 		val = READ_ONCE(smccc_feat-&gt;std_bmap);</div><div class='hunk'>@@ -497,6 +504,9 @@ int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> 	case KVM_REG_ARM_VENDOR_HYP_BMAP:</div><div class='ctx'> 		val = READ_ONCE(smccc_feat-&gt;vendor_hyp_bmap);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_REG_ARM_VENDOR_HYP_BMAP_2:</div><div class='add'>+		val = READ_ONCE(smccc_feat-&gt;vendor_hyp_bmap_2);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -527,6 +537,10 @@ static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val)</div><div class='ctx'> 		fw_reg_bmap = &amp;smccc_feat-&gt;vendor_hyp_bmap;</div><div class='ctx'> 		fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES;</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_REG_ARM_VENDOR_HYP_BMAP_2:</div><div class='add'>+		fw_reg_bmap = &amp;smccc_feat-&gt;vendor_hyp_bmap_2;</div><div class='add'>+		fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -575,6 +589,8 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> 		case KVM_ARM_PSCI_0_2:</div><div class='ctx'> 		case KVM_ARM_PSCI_1_0:</div><div class='ctx'> 		case KVM_ARM_PSCI_1_1:</div><div class='add'>+		case KVM_ARM_PSCI_1_2:</div><div class='add'>+		case KVM_ARM_PSCI_1_3:</div><div class='ctx'> 			if (!wants_02)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			vcpu-&gt;kvm-&gt;arch.psci_version = val;</div><div class='hunk'>@@ -588,7 +604,7 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> 		if (val &amp; ~KVM_REG_FEATURE_LEVEL_MASK)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		if (get_kernel_wa_level(reg-&gt;id) &lt; val)</div><div class='add'>+		if (get_kernel_wa_level(vcpu, reg-&gt;id) &lt; val)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -624,13 +640,14 @@ int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> 		 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the</div><div class='ctx'> 		 * other way around.</div><div class='ctx'> 		 */</div><div class='del'>-		if (get_kernel_wa_level(reg-&gt;id) &lt; wa_level)</div><div class='add'>+		if (get_kernel_wa_level(vcpu, reg-&gt;id) &lt; wa_level)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case KVM_REG_ARM_STD_BMAP:</div><div class='ctx'> 	case KVM_REG_ARM_STD_HYP_BMAP:</div><div class='ctx'> 	case KVM_REG_ARM_VENDOR_HYP_BMAP:</div><div class='add'>+	case KVM_REG_ARM_VENDOR_HYP_BMAP_2:</div><div class='ctx'> 		return kvm_arm_set_fw_reg_bmap(vcpu, reg-&gt;id, val);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ENOENT;</div><div class='head'>diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c<br/>index a640e839848e..dfcd66c65517 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/inject_fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/inject_fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/inject_fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/inject_fault.c</a></div><div class='hunk'>@@ -15,13 +15,11 @@</div><div class='ctx'> #include &lt;asm/kvm_nested.h&gt;</div><div class='ctx'> #include &lt;asm/esr.h&gt;</div><div class='ctx'> </div><div class='del'>-static void pend_sync_exception(struct kvm_vcpu *vcpu)</div><div class='add'>+static unsigned int exception_target_el(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	/* If not nesting, EL1 is the only possible exception target */</div><div class='del'>-	if (likely(!vcpu_has_nv(vcpu))) {</div><div class='del'>-		kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (likely(!vcpu_has_nv(vcpu)))</div><div class='add'>+		return PSR_MODE_EL1h;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * With NV, we need to pick between EL1 and EL2. Note that we</div><div class='hunk'>@@ -32,35 +30,112 @@ static void pend_sync_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	switch(*vcpu_cpsr(vcpu) &amp; PSR_MODE_MASK) {</div><div class='ctx'> 	case PSR_MODE_EL2h:</div><div class='ctx'> 	case PSR_MODE_EL2t:</div><div class='del'>-		kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_SYNC);</div><div class='del'>-		break;</div><div class='add'>+		return PSR_MODE_EL2h;</div><div class='ctx'> 	case PSR_MODE_EL1h:</div><div class='ctx'> 	case PSR_MODE_EL1t:</div><div class='del'>-		kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='del'>-		break;</div><div class='add'>+		return PSR_MODE_EL1h;</div><div class='ctx'> 	case PSR_MODE_EL0t:</div><div class='del'>-		if (vcpu_el2_tge_is_set(vcpu))</div><div class='del'>-			kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_SYNC);</div><div class='del'>-		else</div><div class='del'>-			kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='del'>-		break;</div><div class='add'>+		return vcpu_el2_tge_is_set(vcpu) ? PSR_MODE_EL2h : PSR_MODE_EL1h;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool match_target_el(struct kvm_vcpu *vcpu, unsigned long target)</div><div class='add'>+static enum vcpu_sysreg exception_esr_elx(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (exception_target_el(vcpu) == PSR_MODE_EL2h)</div><div class='add'>+		return ESR_EL2;</div><div class='add'>+</div><div class='add'>+	return ESR_EL1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum vcpu_sysreg exception_far_elx(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (exception_target_el(vcpu) == PSR_MODE_EL2h)</div><div class='add'>+		return FAR_EL2;</div><div class='add'>+</div><div class='add'>+	return FAR_EL1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pend_sync_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return (vcpu_get_flag(vcpu, EXCEPT_MASK) == target);</div><div class='add'>+	if (exception_target_el(vcpu) == PSR_MODE_EL1h)</div><div class='add'>+		kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);</div><div class='add'>+	else</div><div class='add'>+		kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_SYNC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pend_serror_exception(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (exception_target_el(vcpu) == PSR_MODE_EL1h)</div><div class='add'>+		kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SERR);</div><div class='add'>+	else</div><div class='add'>+		kvm_pend_exception(vcpu, EXCEPT_AA64_EL2_SERR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __effective_sctlr2_bit(struct kvm_vcpu *vcpu, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	u64 sctlr2;</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_sctlr2(vcpu-&gt;kvm))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (is_nested_ctxt(vcpu) &amp;&amp;</div><div class='add'>+	    !(__vcpu_sys_reg(vcpu, HCRX_EL2) &amp; HCRX_EL2_SCTLR2En))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (exception_target_el(vcpu) == PSR_MODE_EL1h)</div><div class='add'>+		sctlr2 = vcpu_read_sys_reg(vcpu, SCTLR2_EL1);</div><div class='add'>+	else</div><div class='add'>+		sctlr2 = vcpu_read_sys_reg(vcpu, SCTLR2_EL2);</div><div class='add'>+</div><div class='add'>+	return sctlr2 &amp; BIT(idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool effective_sctlr2_ease(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return __effective_sctlr2_bit(vcpu, SCTLR2_EL1_EASE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool effective_sctlr2_nmea(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return __effective_sctlr2_bit(vcpu, SCTLR2_EL1_NMEA_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cpsr = *vcpu_cpsr(vcpu);</div><div class='ctx'> 	bool is_aarch32 = vcpu_mode_is_32bit(vcpu);</div><div class='del'>-	u64 esr = 0;</div><div class='add'>+	u64 esr = 0, fsc;</div><div class='add'>+	int level;</div><div class='ctx'> </div><div class='del'>-	pend_sync_exception(vcpu);</div><div class='add'>+	/*</div><div class='add'>+	 * If injecting an abort from a failed S1PTW, rewalk the S1 PTs to</div><div class='add'>+	 * find the failing level. If we can't find it, assume the error was</div><div class='add'>+	 * transient and restart without changing the state.</div><div class='add'>+	 */</div><div class='add'>+	if (kvm_vcpu_abt_iss1tw(vcpu)) {</div><div class='add'>+		u64 hpfar = kvm_vcpu_get_fault_ipa(vcpu);</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		if (hpfar == INVALID_GPA)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		ret = __kvm_find_s1_desc_level(vcpu, addr, hpfar, &amp;level);</div><div class='add'>+		if (ret)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		WARN_ON_ONCE(level &lt; -1 || level &gt; 3);</div><div class='add'>+		fsc = ESR_ELx_FSC_SEA_TTW(level);</div><div class='add'>+	} else {</div><div class='add'>+		fsc = ESR_ELx_FSC_EXTABT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This delight is brought to you by FEAT_DoubleFault2. */</div><div class='add'>+	if (effective_sctlr2_ease(vcpu))</div><div class='add'>+		pend_serror_exception(vcpu);</div><div class='add'>+	else</div><div class='add'>+		pend_sync_exception(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Build an {i,d}abort, depending on the level and the</div><div class='hunk'>@@ -81,15 +156,10 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr</div><div class='ctx'> 	if (!is_iabt)</div><div class='ctx'> 		esr |= ESR_ELx_EC_DABT_LOW &lt;&lt; ESR_ELx_EC_SHIFT;</div><div class='ctx'> </div><div class='del'>-	esr |= ESR_ELx_FSC_EXTABT;</div><div class='add'>+	esr |= fsc;</div><div class='ctx'> </div><div class='del'>-	if (match_target_el(vcpu, unpack_vcpu_flag(EXCEPT_AA64_EL1_SYNC))) {</div><div class='del'>-		vcpu_write_sys_reg(vcpu, addr, FAR_EL1);</div><div class='del'>-		vcpu_write_sys_reg(vcpu, esr, ESR_EL1);</div><div class='del'>-	} else {</div><div class='del'>-		vcpu_write_sys_reg(vcpu, addr, FAR_EL2);</div><div class='del'>-		vcpu_write_sys_reg(vcpu, esr, ESR_EL2);</div><div class='del'>-	}</div><div class='add'>+	vcpu_write_sys_reg(vcpu, addr, exception_far_elx(vcpu));</div><div class='add'>+	vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void inject_undef64(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -105,10 +175,7 @@ static void inject_undef64(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (kvm_vcpu_trap_il_is32bit(vcpu))</div><div class='ctx'> 		esr |= ESR_ELx_IL;</div><div class='ctx'> </div><div class='del'>-	if (match_target_el(vcpu, unpack_vcpu_flag(EXCEPT_AA64_EL1_SYNC)))</div><div class='del'>-		vcpu_write_sys_reg(vcpu, esr, ESR_EL1);</div><div class='del'>-	else</div><div class='del'>-		vcpu_write_sys_reg(vcpu, esr, ESR_EL2);</div><div class='add'>+	vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define DFSR_FSC_EXTABT_LPAE	0x10</div><div class='hunk'>@@ -155,36 +222,35 @@ static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt, u32 addr)</div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, far, FAR_EL1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_inject_dabt - inject a data abort into the guest</div><div class='del'>- * @vcpu: The VCPU to receive the data abort</div><div class='del'>- * @addr: The address to report in the DFAR</div><div class='del'>- *</div><div class='del'>- * It is assumed that this code is called from the VCPU thread and that the</div><div class='del'>- * VCPU therefore is not currently executing guest code.</div><div class='del'>- */</div><div class='del'>-void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)</div><div class='add'>+static void __kvm_inject_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr)</div><div class='ctx'> {</div><div class='ctx'> 	if (vcpu_el1_is_32bit(vcpu))</div><div class='del'>-		inject_abt32(vcpu, false, addr);</div><div class='add'>+		inject_abt32(vcpu, iabt, addr);</div><div class='ctx'> 	else</div><div class='del'>-		inject_abt64(vcpu, false, addr);</div><div class='add'>+		inject_abt64(vcpu, iabt, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_inject_pabt - inject a prefetch abort into the guest</div><div class='del'>- * @vcpu: The VCPU to receive the prefetch abort</div><div class='del'>- * @addr: The address to report in the DFAR</div><div class='del'>- *</div><div class='del'>- * It is assumed that this code is called from the VCPU thread and that the</div><div class='del'>- * VCPU therefore is not currently executing guest code.</div><div class='del'>- */</div><div class='del'>-void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)</div><div class='add'>+static bool kvm_sea_target_is_el2(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (vcpu_el1_is_32bit(vcpu))</div><div class='del'>-		inject_abt32(vcpu, true, addr);</div><div class='del'>-	else</div><div class='del'>-		inject_abt64(vcpu, true, addr);</div><div class='add'>+	if (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; (HCR_TGE | HCR_TEA))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_mode_priv(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return (*vcpu_cpsr(vcpu) &amp; PSR_A_BIT) &amp;&amp;</div><div class='add'>+	       (__vcpu_sys_reg(vcpu, HCRX_EL2) &amp; HCRX_EL2_TMEA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_inject_sea(struct kvm_vcpu *vcpu, bool iabt, u64 addr)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;vcpu-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (is_nested_ctxt(vcpu) &amp;&amp; kvm_sea_target_is_el2(vcpu))</div><div class='add'>+		return kvm_inject_nested_sea(vcpu, iabt, addr);</div><div class='add'>+</div><div class='add'>+	__kvm_inject_sea(vcpu, iabt, addr);</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_inject_size_fault(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -194,10 +260,7 @@ void kvm_inject_size_fault(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	addr  = kvm_vcpu_get_fault_ipa(vcpu);</div><div class='ctx'> 	addr |= kvm_vcpu_get_hfar(vcpu) &amp; GENMASK(11, 0);</div><div class='ctx'> </div><div class='del'>-	if (kvm_vcpu_trap_is_iabt(vcpu))</div><div class='del'>-		kvm_inject_pabt(vcpu, addr);</div><div class='del'>-	else</div><div class='del'>-		kvm_inject_dabt(vcpu, addr);</div><div class='add'>+	__kvm_inject_sea(vcpu, kvm_vcpu_trap_is_iabt(vcpu), addr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If AArch64 or LPAE, set FSC to 0 to indicate an Address</div><div class='hunk'>@@ -210,9 +273,9 @@ void kvm_inject_size_fault(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	    !(vcpu_read_sys_reg(vcpu, TCR_EL1) &amp; TTBCR_EAE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	esr = vcpu_read_sys_reg(vcpu, ESR_EL1);</div><div class='add'>+	esr = vcpu_read_sys_reg(vcpu, exception_esr_elx(vcpu));</div><div class='ctx'> 	esr &amp;= ~GENMASK_ULL(5, 0);</div><div class='del'>-	vcpu_write_sys_reg(vcpu, esr, ESR_EL1);</div><div class='add'>+	vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -230,25 +293,70 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		inject_undef64(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 esr)</div><div class='add'>+static bool serror_is_masked(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	vcpu_set_vsesr(vcpu, esr &amp; ESR_ELx_ISS_MASK);</div><div class='del'>-	*vcpu_hcr(vcpu) |= HCR_VSE;</div><div class='add'>+	return (*vcpu_cpsr(vcpu) &amp; PSR_A_BIT) &amp;&amp; !effective_sctlr2_nmea(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_inject_vabt - inject an async abort / SError into the guest</div><div class='del'>- * @vcpu: The VCPU to receive the exception</div><div class='del'>- *</div><div class='del'>- * It is assumed that this code is called from the VCPU thread and that the</div><div class='del'>- * VCPU therefore is not currently executing guest code.</div><div class='del'>- *</div><div class='del'>- * Systems with the RAS Extensions specify an imp-def ESR (ISV/IDS = 1) with</div><div class='del'>- * the remaining ISS all-zeros so that this error is not interpreted as an</div><div class='del'>- * uncategorized RAS error. Without the RAS Extensions we can't specify an ESR</div><div class='del'>- * value, so the CPU generates an imp-def value.</div><div class='del'>- */</div><div class='del'>-void kvm_inject_vabt(struct kvm_vcpu *vcpu)</div><div class='add'>+static bool kvm_serror_target_is_el2(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	kvm_set_sei_esr(vcpu, ESR_ELx_ISV);</div><div class='add'>+	if (is_hyp_ctxt(vcpu) || vcpu_el2_amo_is_set(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!(__vcpu_sys_reg(vcpu, HCRX_EL2) &amp; HCRX_EL2_TMEA))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In another example where FEAT_DoubleFault2 is entirely backwards,</div><div class='add'>+	 * "masked" as it relates to the routing effects of HCRX_EL2.TMEA</div><div class='add'>+	 * doesn't consider SCTLR2_EL1.NMEA. That is to say, even if EL1 asked</div><div class='add'>+	 * for non-maskable SErrors, the EL2 bit takes priority if A is set.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_mode_priv(vcpu))</div><div class='add'>+		return *vcpu_cpsr(vcpu) &amp; PSR_A_BIT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Otherwise SErrors are considered unmasked when taken from EL0 and</div><div class='add'>+	 * NMEA is set.</div><div class='add'>+	 */</div><div class='add'>+	return serror_is_masked(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_serror_undeliverable_at_el2(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return !(vcpu_el2_tge_is_set(vcpu) || vcpu_el2_amo_is_set(vcpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_inject_serror_esr(struct kvm_vcpu *vcpu, u64 esr)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;vcpu-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (is_nested_ctxt(vcpu) &amp;&amp; kvm_serror_target_is_el2(vcpu))</div><div class='add'>+		return kvm_inject_nested_serror(vcpu, esr);</div><div class='add'>+</div><div class='add'>+	if (vcpu_is_el2(vcpu) &amp;&amp; kvm_serror_undeliverable_at_el2(vcpu)) {</div><div class='add'>+		vcpu_set_vsesr(vcpu, esr);</div><div class='add'>+		vcpu_set_flag(vcpu, NESTED_SERROR_PENDING);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Emulate the exception entry if SErrors are unmasked. This is useful if</div><div class='add'>+	 * the vCPU is in a nested context w/ vSErrors enabled then we've already</div><div class='add'>+	 * delegated he hardware vSError context (i.e. HCR_EL2.VSE, VSESR_EL2,</div><div class='add'>+	 * VDISR_EL2) to the guest hypervisor.</div><div class='add'>+	 *</div><div class='add'>+	 * As we're emulating the SError injection we need to explicitly populate</div><div class='add'>+	 * ESR_ELx.EC because hardware will not do it on our behalf.</div><div class='add'>+	 */</div><div class='add'>+	if (!serror_is_masked(vcpu)) {</div><div class='add'>+		pend_serror_exception(vcpu);</div><div class='add'>+		esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);</div><div class='add'>+		vcpu_write_sys_reg(vcpu, esr, exception_esr_elx(vcpu));</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vcpu_set_vsesr(vcpu, esr &amp; ESR_ELx_ISS_MASK);</div><div class='add'>+	*vcpu_hcr(vcpu) |= HCR_VSE;</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/mmio.c b/arch/arm64/kvm/mmio.c<br/>index cd6b7b83e2c3..54f9358c9e0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/mmio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/mmio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/mmio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/mmio.c</a></div><div class='hunk'>@@ -72,6 +72,33 @@ unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool kvm_pending_external_abort(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!vcpu_get_flag(vcpu, PENDING_EXCEPTION))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (vcpu_el1_is_32bit(vcpu)) {</div><div class='add'>+		switch (vcpu_get_flag(vcpu, EXCEPT_MASK)) {</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA32_UND):</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA32_IABT):</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA32_DABT):</div><div class='add'>+			return true;</div><div class='add'>+		default:</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (vcpu_get_flag(vcpu, EXCEPT_MASK)) {</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL1_SYNC):</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL2_SYNC):</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL1_SERR):</div><div class='add'>+		case unpack_vcpu_flag(EXCEPT_AA64_EL2_SERR):</div><div class='add'>+			return true;</div><div class='add'>+		default:</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_handle_mmio_return -- Handle MMIO loads after user space emulation</div><div class='ctx'>  *			     or in-kernel IO emulation</div><div class='hunk'>@@ -84,8 +111,11 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	int mask;</div><div class='ctx'> </div><div class='del'>-	/* Detect an already handled MMIO return */</div><div class='del'>-	if (unlikely(!vcpu-&gt;mmio_needed))</div><div class='add'>+	/*</div><div class='add'>+	 * Detect if the MMIO return was already handled or if userspace aborted</div><div class='add'>+	 * the MMIO access.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!vcpu-&gt;mmio_needed || kvm_pending_external_abort(vcpu)))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;mmio_needed = 0;</div><div class='hunk'>@@ -141,10 +171,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)</div><div class='ctx'> 		trace_kvm_mmio_nisv(*vcpu_pc(vcpu), kvm_vcpu_get_esr(vcpu),</div><div class='ctx'> 				    kvm_vcpu_get_hfar(vcpu), fault_ipa);</div><div class='ctx'> </div><div class='del'>-		if (vcpu_is_protected(vcpu)) {</div><div class='del'>-			kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='add'>+		if (vcpu_is_protected(vcpu))</div><div class='add'>+			return kvm_inject_sea_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER,</div><div class='ctx'> 			     &amp;vcpu-&gt;kvm-&gt;arch.flags)) {</div><div class='head'>diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c<br/>index a509b63bd4dd..7cc964af8d30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/mmu.c</a></div><div class='hunk'>@@ -4,18 +4,20 @@</div><div class='ctx'>  * Author: Christoffer Dall &lt;c.dall@virtualopensystems.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/sched/signal.h&gt;</div><div class='ctx'> #include &lt;trace/events/kvm.h&gt;</div><div class='add'>+#include &lt;asm/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_arm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_pgtable.h&gt;</div><div class='del'>-#include &lt;asm/kvm_ras.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pkvm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_asm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_emulate.h&gt;</div><div class='ctx'> #include &lt;asm/virt.h&gt;</div><div class='hunk'>@@ -29,8 +31,12 @@ static unsigned long __ro_after_init hyp_idmap_start;</div><div class='ctx'> static unsigned long __ro_after_init hyp_idmap_end;</div><div class='ctx'> static phys_addr_t __ro_after_init hyp_idmap_vector;</div><div class='ctx'> </div><div class='add'>+u32 __ro_after_init __hyp_va_bits;</div><div class='add'>+</div><div class='ctx'> static unsigned long __ro_after_init io_map_base;</div><div class='ctx'> </div><div class='add'>+#define KVM_PGT_FN(fn)		(!is_protected_kvm_enabled() ? fn : p ## fn)</div><div class='add'>+</div><div class='ctx'> static phys_addr_t __stage2_range_addr_end(phys_addr_t addr, phys_addr_t end,</div><div class='ctx'> 					   phys_addr_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -147,7 +153,7 @@ static int kvm_mmu_split_huge_pages(struct kvm *kvm, phys_addr_t addr,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		next = __stage2_range_addr_end(addr, end, chunk_size);</div><div class='del'>-		ret = kvm_pgtable_stage2_split(pgt, addr, next - addr, cache);</div><div class='add'>+		ret = KVM_PGT_FN(kvm_pgtable_stage2_split)(pgt, addr, next - addr, cache);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> 	} while (addr = next, addr != end);</div><div class='hunk'>@@ -168,21 +174,24 @@ static bool memslot_is_logging(struct kvm_memory_slot *memslot)</div><div class='ctx'>  */</div><div class='ctx'> int kvm_arch_flush_remote_tlbs(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	kvm_call_hyp(__kvm_tlb_flush_vmid, &amp;kvm-&gt;arch.mmu);</div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		kvm_call_hyp_nvhe(__pkvm_tlb_flush_vmid, kvm-&gt;arch.pkvm.handle);</div><div class='add'>+	else</div><div class='add'>+		kvm_call_hyp(__kvm_tlb_flush_vmid, &amp;kvm-&gt;arch.mmu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm,</div><div class='ctx'> 				      gfn_t gfn, u64 nr_pages)</div><div class='ctx'> {</div><div class='del'>-	kvm_tlb_flush_vmid_range(&amp;kvm-&gt;arch.mmu,</div><div class='del'>-				gfn &lt;&lt; PAGE_SHIFT, nr_pages &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	u64 size = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	u64 addr = gfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='del'>-static bool kvm_is_device_pfn(unsigned long pfn)</div><div class='del'>-{</div><div class='del'>-	return !pfn_is_map_memory(pfn);</div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		kvm_call_hyp_nvhe(__pkvm_tlb_flush_vmid, kvm-&gt;arch.pkvm.handle);</div><div class='add'>+	else</div><div class='add'>+		kvm_tlb_flush_vmid_range(&amp;kvm-&gt;arch.mmu, addr, size);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *stage2_memcache_zalloc_page(void *arg)</div><div class='hunk'>@@ -225,7 +234,7 @@ static void stage2_free_unlinked_table_rcu_cb(struct rcu_head *head)</div><div class='ctx'> 	void *pgtable = page_to_virt(page);</div><div class='ctx'> 	s8 level = page_private(page);</div><div class='ctx'> </div><div class='del'>-	kvm_pgtable_stage2_free_unlinked(&amp;kvm_s2_mm_ops, pgtable, level);</div><div class='add'>+	KVM_PGT_FN(kvm_pgtable_stage2_free_unlinked)(&amp;kvm_s2_mm_ops, pgtable, level);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void stage2_free_unlinked_table(void *addr, s8 level)</div><div class='hunk'>@@ -324,18 +333,19 @@ static void __unmap_stage2_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 	WARN_ON(size &amp; ~PAGE_MASK);</div><div class='del'>-	WARN_ON(stage2_apply_range(mmu, start, end, kvm_pgtable_stage2_unmap,</div><div class='add'>+	WARN_ON(stage2_apply_range(mmu, start, end, KVM_PGT_FN(kvm_pgtable_stage2_unmap),</div><div class='ctx'> 				   may_block));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start, u64 size)</div><div class='add'>+void kvm_stage2_unmap_range(struct kvm_s2_mmu *mmu, phys_addr_t start,</div><div class='add'>+			    u64 size, bool may_block)</div><div class='ctx'> {</div><div class='del'>-	__unmap_stage2_range(mmu, start, size, true);</div><div class='add'>+	__unmap_stage2_range(mmu, start, size, may_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_stage2_flush_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end)</div><div class='ctx'> {</div><div class='del'>-	stage2_apply_range_resched(mmu, addr, end, kvm_pgtable_stage2_flush);</div><div class='add'>+	stage2_apply_range_resched(mmu, addr, end, KVM_PGT_FN(kvm_pgtable_stage2_flush));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void stage2_flush_memslot(struct kvm *kvm,</div><div class='hunk'>@@ -703,10 +713,10 @@ int create_hyp_stack(phys_addr_t phys_addr, unsigned long *haddr)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm_hyp_pgd_mutex);</div><div class='ctx'> 	/*</div><div class='del'>-	 * Efficient stack verification using the PAGE_SHIFT bit implies</div><div class='add'>+	 * Efficient stack verification using the NVHE_STACK_SHIFT bit implies</div><div class='ctx'> 	 * an alignment of our allocation on the order of the size.</div><div class='ctx'> 	 */</div><div class='del'>-	size = PAGE_SIZE * 2;</div><div class='add'>+	size = NVHE_STACK_SIZE * 2;</div><div class='ctx'> 	base = ALIGN_DOWN(io_map_base - size, size);</div><div class='ctx'> </div><div class='ctx'> 	ret = __hyp_alloc_private_va_range(base);</div><div class='hunk'>@@ -723,12 +733,12 @@ int create_hyp_stack(phys_addr_t phys_addr, unsigned long *haddr)</div><div class='ctx'> 	 * at the higher address and leave the lower guard page</div><div class='ctx'> 	 * unbacked.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Any valid stack address now has the PAGE_SHIFT bit as 1</div><div class='add'>+	 * Any valid stack address now has the NVHE_STACK_SHIFT bit as 1</div><div class='ctx'> 	 * and addresses corresponding to the guard page have the</div><div class='del'>-	 * PAGE_SHIFT bit as 0 - this is used for overflow detection.</div><div class='add'>+	 * NVHE_STACK_SHIFT bit as 0 - this is used for overflow detection.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = __create_hyp_mappings(base + PAGE_SIZE, PAGE_SIZE, phys_addr,</div><div class='del'>-				    PAGE_HYP);</div><div class='add'>+	ret = __create_hyp_mappings(base + NVHE_STACK_SIZE, NVHE_STACK_SIZE,</div><div class='add'>+				    phys_addr, PAGE_HYP);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		kvm_err("Cannot map hyp stack\n");</div><div class='ctx'> </div><div class='hunk'>@@ -941,10 +951,14 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mmu-&gt;arch = &amp;kvm-&gt;arch;</div><div class='del'>-	err = kvm_pgtable_stage2_init(pgt, mmu, &amp;kvm_s2_mm_ops);</div><div class='add'>+	err = KVM_PGT_FN(kvm_pgtable_stage2_init)(pgt, mmu, &amp;kvm_s2_mm_ops);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_pgtable;</div><div class='ctx'> </div><div class='add'>+	mmu-&gt;pgt = pgt;</div><div class='add'>+	if (is_protected_kvm_enabled())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mmu-&gt;last_vcpu_ran = alloc_percpu(typeof(*mmu-&gt;last_vcpu_ran));</div><div class='ctx'> 	if (!mmu-&gt;last_vcpu_ran) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -958,7 +972,6 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t</div><div class='ctx'> 	mmu-&gt;split_page_chunk_size = KVM_ARM_EAGER_SPLIT_CHUNK_SIZE_DEFAULT;</div><div class='ctx'> 	mmu-&gt;split_page_cache.gfp_zero = __GFP_ZERO;</div><div class='ctx'> </div><div class='del'>-	mmu-&gt;pgt = pgt;</div><div class='ctx'> 	mmu-&gt;pgd_phys = __pa(pgt-&gt;pgd);</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_is_nested_s2_mmu(kvm, mmu))</div><div class='hunk'>@@ -967,7 +980,7 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_destroy_pgtable:</div><div class='del'>-	kvm_pgtable_stage2_destroy(pgt);</div><div class='add'>+	KVM_PGT_FN(kvm_pgtable_stage2_destroy)(pgt);</div><div class='ctx'> out_free_pgtable:</div><div class='ctx'> 	kfree(pgt);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1015,7 +1028,7 @@ static void stage2_unmap_memslot(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> 		if (!(vma-&gt;vm_flags &amp; VM_PFNMAP)) {</div><div class='ctx'> 			gpa_t gpa = addr + (vm_start - memslot-&gt;userspace_addr);</div><div class='del'>-			kvm_stage2_unmap_range(&amp;kvm-&gt;arch.mmu, gpa, vm_end - vm_start);</div><div class='add'>+			kvm_stage2_unmap_range(&amp;kvm-&gt;arch.mmu, gpa, vm_end - vm_start, true);</div><div class='ctx'> 		}</div><div class='ctx'> 		hva = vm_end;</div><div class='ctx'> 	} while (hva &lt; reg_end);</div><div class='hunk'>@@ -1042,7 +1055,7 @@ void stage2_unmap_vm(struct kvm *kvm)</div><div class='ctx'> 	kvm_for_each_memslot(memslot, bkt, slots)</div><div class='ctx'> 		stage2_unmap_memslot(kvm, memslot);</div><div class='ctx'> </div><div class='del'>-	kvm_nested_s2_unmap(kvm);</div><div class='add'>+	kvm_nested_s2_unmap(kvm, true);</div><div class='ctx'> </div><div class='ctx'> 	write_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 	mmap_read_unlock(current-&gt;mm);</div><div class='hunk'>@@ -1061,29 +1074,47 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu)</div><div class='ctx'> 		mmu-&gt;pgt = NULL;</div><div class='ctx'> 		free_percpu(mmu-&gt;last_vcpu_ran);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (kvm_is_nested_s2_mmu(kvm, mmu))</div><div class='add'>+		kvm_init_nested_s2_mmu(mmu);</div><div class='add'>+</div><div class='ctx'> 	write_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (pgt) {</div><div class='del'>-		kvm_pgtable_stage2_destroy(pgt);</div><div class='add'>+		KVM_PGT_FN(kvm_pgtable_stage2_destroy)(pgt);</div><div class='ctx'> 		kfree(pgt);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hyp_mc_free_fn(void *addr, void *unused)</div><div class='add'>+static void hyp_mc_free_fn(void *addr, void *mc)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_hyp_memcache *memcache = mc;</div><div class='add'>+</div><div class='add'>+	if (memcache-&gt;flags &amp; HYP_MEMCACHE_ACCOUNT_STAGE2)</div><div class='add'>+		kvm_account_pgtable_pages(addr, -1);</div><div class='add'>+</div><div class='ctx'> 	free_page((unsigned long)addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *hyp_mc_alloc_fn(void *unused)</div><div class='add'>+static void *hyp_mc_alloc_fn(void *mc)</div><div class='ctx'> {</div><div class='del'>-	return (void *)__get_free_page(GFP_KERNEL_ACCOUNT);</div><div class='add'>+	struct kvm_hyp_memcache *memcache = mc;</div><div class='add'>+	void *addr;</div><div class='add'>+</div><div class='add'>+	addr = (void *)__get_free_page(GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (addr &amp;&amp; memcache-&gt;flags &amp; HYP_MEMCACHE_ACCOUNT_STAGE2)</div><div class='add'>+		kvm_account_pgtable_pages(addr, 1);</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void free_hyp_memcache(struct kvm_hyp_memcache *mc)</div><div class='ctx'> {</div><div class='del'>-	if (is_protected_kvm_enabled())</div><div class='del'>-		__free_hyp_memcache(mc, hyp_mc_free_fn,</div><div class='del'>-				    kvm_host_va, NULL);</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kfree(mc-&gt;mapping);</div><div class='add'>+	__free_hyp_memcache(mc, hyp_mc_free_fn, kvm_host_va, mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int topup_hyp_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages)</div><div class='hunk'>@@ -1091,8 +1122,14 @@ int topup_hyp_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages)</div><div class='ctx'> 	if (!is_protected_kvm_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (!mc-&gt;mapping) {</div><div class='add'>+		mc-&gt;mapping = kzalloc(sizeof(struct pkvm_mapping), GFP_KERNEL_ACCOUNT);</div><div class='add'>+		if (!mc-&gt;mapping)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return __topup_hyp_memcache(mc, min_pages, hyp_mc_alloc_fn,</div><div class='del'>-				    kvm_host_pa, NULL);</div><div class='add'>+				    kvm_host_pa, mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1129,8 +1166,8 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		write_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		ret = kvm_pgtable_stage2_map(pgt, addr, PAGE_SIZE, pa, prot,</div><div class='del'>-					     &amp;cache, 0);</div><div class='add'>+		ret = KVM_PGT_FN(kvm_pgtable_stage2_map)(pgt, addr, PAGE_SIZE,</div><div class='add'>+				 pa, prot, &amp;cache, 0);</div><div class='ctx'> 		write_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1150,7 +1187,7 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,</div><div class='ctx'>  */</div><div class='ctx'> void kvm_stage2_wp_range(struct kvm_s2_mmu *mmu, phys_addr_t addr, phys_addr_t end)</div><div class='ctx'> {</div><div class='del'>-	stage2_apply_range_resched(mmu, addr, end, kvm_pgtable_stage2_wrprotect);</div><div class='add'>+	stage2_apply_range_resched(mmu, addr, end, KVM_PGT_FN(kvm_pgtable_stage2_wrprotect));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1267,6 +1304,10 @@ static bool fault_supports_stage2_huge_mapping(struct kvm_memory_slot *memslot,</div><div class='ctx'> 	if (map_size == PAGE_SIZE)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	/* pKVM only supports PMD_SIZE huge-mappings */</div><div class='add'>+	if (is_protected_kvm_enabled() &amp;&amp; map_size != PMD_SIZE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	size = memslot-&gt;npages * PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	gpa_start = memslot-&gt;base_gfn &lt;&lt; PAGE_SHIFT;</div><div class='hunk'>@@ -1390,21 +1431,29 @@ static int get_vma_page_shift(struct vm_area_struct *vma, unsigned long hva)</div><div class='ctx'>  * able to see the page's tags and therefore they must be initialised first. If</div><div class='ctx'>  * PG_mte_tagged is set, tags have already been initialised.</div><div class='ctx'>  *</div><div class='del'>- * The race in the test/set of the PG_mte_tagged flag is handled by:</div><div class='del'>- * - preventing VM_SHARED mappings in a memslot with MTE preventing two VMs</div><div class='del'>- *   racing to santise the same page</div><div class='del'>- * - mmap_lock protects between a VM faulting a page in and the VMM performing</div><div class='del'>- *   an mprotect() to add VM_MTE</div><div class='add'>+ * Must be called with kvm-&gt;mmu_lock held to ensure the memory remains mapped</div><div class='add'>+ * while the tags are zeroed.</div><div class='ctx'>  */</div><div class='ctx'> static void sanitise_mte_tags(struct kvm *kvm, kvm_pfn_t pfn,</div><div class='ctx'> 			      unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long i, nr_pages = size &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	struct page *page = pfn_to_page(pfn);</div><div class='add'>+	struct folio *folio = page_folio(page);</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_has_mte(kvm))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (folio_test_hugetlb(folio)) {</div><div class='add'>+		/* Hugetlb has MTE flags set on head page only */</div><div class='add'>+		if (folio_try_hugetlb_mte_tagging(folio)) {</div><div class='add'>+			for (i = 0; i &lt; nr_pages; i++, page++)</div><div class='add'>+				mte_clear_page_tags(page_address(page));</div><div class='add'>+			folio_set_hugetlb_mte_tagged(folio);</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; nr_pages; i++, page++) {</div><div class='ctx'> 		if (try_page_mte_tagging(page)) {</div><div class='ctx'> 			mte_clear_page_tags(page_address(page));</div><div class='hunk'>@@ -1418,38 +1467,168 @@ static bool kvm_vma_mte_allowed(struct vm_area_struct *vma)</div><div class='ctx'> 	return vma-&gt;vm_flags &amp; VM_MTE_ALLOWED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool kvm_vma_is_cacheable(struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	switch (FIELD_GET(PTE_ATTRINDX_MASK, pgprot_val(vma-&gt;vm_page_prot))) {</div><div class='add'>+	case MT_NORMAL_NC:</div><div class='add'>+	case MT_DEVICE_nGnRnE:</div><div class='add'>+	case MT_DEVICE_nGnRE:</div><div class='add'>+		return false;</div><div class='add'>+	default:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prepare_mmu_memcache(struct kvm_vcpu *vcpu, bool topup_memcache,</div><div class='add'>+				void **memcache)</div><div class='add'>+{</div><div class='add'>+	int min_pages;</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		*memcache = &amp;vcpu-&gt;arch.mmu_page_cache;</div><div class='add'>+	else</div><div class='add'>+		*memcache = &amp;vcpu-&gt;arch.pkvm_memcache;</div><div class='add'>+</div><div class='add'>+	if (!topup_memcache)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	min_pages = kvm_mmu_cache_min_pages(vcpu-&gt;arch.hw_mmu);</div><div class='add'>+</div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		return kvm_mmu_topup_memory_cache(*memcache, min_pages);</div><div class='add'>+</div><div class='add'>+	return topup_hyp_memcache(*memcache, min_pages);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Potentially reduce shadow S2 permissions to match the guest's own S2. For</div><div class='add'>+ * exec faults, we'd only reach this point if the guest actually allowed it (see</div><div class='add'>+ * kvm_s2_handle_perm_fault).</div><div class='add'>+ *</div><div class='add'>+ * Also encode the level of the original translation in the SW bits of the leaf</div><div class='add'>+ * entry as a proxy for the span of that translation. This will be retrieved on</div><div class='add'>+ * TLB invalidation from the guest and used to limit the invalidation scope if a</div><div class='add'>+ * TTL hint or a range isn't provided.</div><div class='add'>+ */</div><div class='add'>+static void adjust_nested_fault_perms(struct kvm_s2_trans *nested,</div><div class='add'>+				      enum kvm_pgtable_prot *prot,</div><div class='add'>+				      bool *writable)</div><div class='add'>+{</div><div class='add'>+	*writable &amp;= kvm_s2_trans_writable(nested);</div><div class='add'>+	if (!kvm_s2_trans_readable(nested))</div><div class='add'>+		*prot &amp;= ~KVM_PGTABLE_PROT_R;</div><div class='add'>+</div><div class='add'>+	*prot |= kvm_encode_nested_level(nested);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define KVM_PGTABLE_WALK_MEMABORT_FLAGS (KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED)</div><div class='add'>+</div><div class='add'>+static int gmem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='add'>+		      struct kvm_s2_trans *nested,</div><div class='add'>+		      struct kvm_memory_slot *memslot, bool is_perm)</div><div class='add'>+{</div><div class='add'>+	bool write_fault, exec_fault, writable;</div><div class='add'>+	enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;</div><div class='add'>+	enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R;</div><div class='add'>+	struct kvm_pgtable *pgt = vcpu-&gt;arch.hw_mmu-&gt;pgt;</div><div class='add'>+	unsigned long mmu_seq;</div><div class='add'>+	struct page *page;</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	void *memcache;</div><div class='add'>+	kvm_pfn_t pfn;</div><div class='add'>+	gfn_t gfn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = prepare_mmu_memcache(vcpu, true, &amp;memcache);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (nested)</div><div class='add'>+		gfn = kvm_s2_trans_output(nested) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		gfn = fault_ipa &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	write_fault = kvm_is_write_fault(vcpu);</div><div class='add'>+	exec_fault = kvm_vcpu_trap_is_exec_fault(vcpu);</div><div class='add'>+</div><div class='add'>+	VM_WARN_ON_ONCE(write_fault &amp;&amp; exec_fault);</div><div class='add'>+</div><div class='add'>+	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='add'>+	/* Pairs with the smp_wmb() in kvm_mmu_invalidate_end(). */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	ret = kvm_gmem_get_pfn(kvm, memslot, gfn, &amp;pfn, &amp;page, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kvm_prepare_memory_fault_exit(vcpu, fault_ipa, PAGE_SIZE,</div><div class='add'>+					      write_fault, exec_fault, false);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writable = !(memslot-&gt;flags &amp; KVM_MEM_READONLY);</div><div class='add'>+</div><div class='add'>+	if (nested)</div><div class='add'>+		adjust_nested_fault_perms(nested, &amp;prot, &amp;writable);</div><div class='add'>+</div><div class='add'>+	if (writable)</div><div class='add'>+		prot |= KVM_PGTABLE_PROT_W;</div><div class='add'>+</div><div class='add'>+	if (exec_fault ||</div><div class='add'>+	    (cpus_have_final_cap(ARM64_HAS_CACHE_DIC) &amp;&amp;</div><div class='add'>+	     (!nested || kvm_s2_trans_executable(nested))))</div><div class='add'>+		prot |= KVM_PGTABLE_PROT_X;</div><div class='add'>+</div><div class='add'>+	kvm_fault_lock(kvm);</div><div class='add'>+	if (mmu_invalidate_retry(kvm, mmu_seq)) {</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = KVM_PGT_FN(kvm_pgtable_stage2_map)(pgt, fault_ipa, PAGE_SIZE,</div><div class='add'>+						 __pfn_to_phys(pfn), prot,</div><div class='add'>+						 memcache, flags);</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	kvm_release_faultin_page(kvm, page, !!ret, writable);</div><div class='add'>+	kvm_fault_unlock(kvm);</div><div class='add'>+</div><div class='add'>+	if (writable &amp;&amp; !ret)</div><div class='add'>+		mark_page_dirty_in_slot(kvm, memslot, gfn);</div><div class='add'>+</div><div class='add'>+	return ret != -EAGAIN ? ret : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 			  struct kvm_s2_trans *nested,</div><div class='ctx'> 			  struct kvm_memory_slot *memslot, unsigned long hva,</div><div class='ctx'> 			  bool fault_is_perm)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	bool write_fault, writable, force_pte = false;</div><div class='del'>-	bool exec_fault, mte_allowed;</div><div class='del'>-	bool device = false, vfio_allow_any_uc = false;</div><div class='add'>+	bool topup_memcache;</div><div class='add'>+	bool write_fault, writable;</div><div class='add'>+	bool exec_fault, mte_allowed, is_vma_cacheable;</div><div class='add'>+	bool s2_force_noncacheable = false, vfio_allow_any_uc = false;</div><div class='ctx'> 	unsigned long mmu_seq;</div><div class='ctx'> 	phys_addr_t ipa = fault_ipa;</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='del'>-	struct kvm_mmu_memory_cache *memcache = &amp;vcpu-&gt;arch.mmu_page_cache;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> 	short vma_shift;</div><div class='add'>+	void *memcache;</div><div class='ctx'> 	gfn_t gfn;</div><div class='ctx'> 	kvm_pfn_t pfn;</div><div class='ctx'> 	bool logging_active = memslot_is_logging(memslot);</div><div class='add'>+	bool force_pte = logging_active;</div><div class='ctx'> 	long vma_pagesize, fault_granule;</div><div class='ctx'> 	enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R;</div><div class='ctx'> 	struct kvm_pgtable *pgt;</div><div class='add'>+	struct page *page;</div><div class='add'>+	vm_flags_t vm_flags;</div><div class='add'>+	enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;</div><div class='ctx'> </div><div class='ctx'> 	if (fault_is_perm)</div><div class='ctx'> 		fault_granule = kvm_vcpu_trap_get_perm_fault_granule(vcpu);</div><div class='ctx'> 	write_fault = kvm_is_write_fault(vcpu);</div><div class='ctx'> 	exec_fault = kvm_vcpu_trap_is_exec_fault(vcpu);</div><div class='del'>-	VM_BUG_ON(write_fault &amp;&amp; exec_fault);</div><div class='del'>-</div><div class='del'>-	if (fault_is_perm &amp;&amp; !write_fault &amp;&amp; !exec_fault) {</div><div class='del'>-		kvm_err("Unexpected L2 read permission error\n");</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='add'>+	VM_WARN_ON_ONCE(write_fault &amp;&amp; exec_fault);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Permission faults just need to update the existing leaf entry,</div><div class='hunk'>@@ -1457,12 +1636,10 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	 * only exception to this is when dirty logging is enabled at runtime</div><div class='ctx'> 	 * and a write fault needs to collapse a block entry into a table.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!fault_is_perm || (logging_active &amp;&amp; write_fault)) {</div><div class='del'>-		ret = kvm_mmu_topup_memory_cache(memcache,</div><div class='del'>-						 kvm_mmu_cache_min_pages(vcpu-&gt;arch.hw_mmu));</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+	topup_memcache = !fault_is_perm || (logging_active &amp;&amp; write_fault);</div><div class='add'>+	ret = prepare_mmu_memcache(vcpu, topup_memcache, &amp;memcache);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Let's check if we will get back a huge page backed by hugetlbfs, or</div><div class='hunk'>@@ -1476,16 +1653,10 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * logging_active is guaranteed to never be true for VM_PFNMAP</div><div class='del'>-	 * memslots.</div><div class='del'>-	 */</div><div class='del'>-	if (logging_active) {</div><div class='del'>-		force_pte = true;</div><div class='add'>+	if (force_pte)</div><div class='ctx'> 		vma_shift = PAGE_SHIFT;</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		vma_shift = get_vma_page_shift(vma, hva);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	switch (vma_shift) {</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='hunk'>@@ -1537,7 +1708,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 			max_map_size = PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 		force_pte = (max_map_size == PAGE_SIZE);</div><div class='del'>-		vma_pagesize = min(vma_pagesize, (long)max_map_size);</div><div class='add'>+		vma_pagesize = min_t(long, vma_pagesize, max_map_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1555,22 +1726,26 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> </div><div class='ctx'> 	vfio_allow_any_uc = vma-&gt;vm_flags &amp; VM_ALLOW_ANY_UNCACHED;</div><div class='ctx'> </div><div class='add'>+	vm_flags = vma-&gt;vm_flags;</div><div class='add'>+</div><div class='add'>+	is_vma_cacheable = kvm_vma_is_cacheable(vma);</div><div class='add'>+</div><div class='ctx'> 	/* Don't use the VMA after the unlock -- it may have vanished */</div><div class='ctx'> 	vma = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read mmu_invalidate_seq so that KVM can detect if the results of</div><div class='del'>-	 * vma_lookup() or __gfn_to_pfn_memslot() become stale prior to</div><div class='add'>+	 * vma_lookup() or __kvm_faultin_pfn() become stale prior to</div><div class='ctx'> 	 * acquiring kvm-&gt;mmu_lock.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Rely on mmap_read_unlock() for an implicit smp_rmb(), which pairs</div><div class='ctx'> 	 * with the smp_wmb() in kvm_mmu_invalidate_end().</div><div class='ctx'> 	 */</div><div class='del'>-	mmu_seq = vcpu-&gt;kvm-&gt;mmu_invalidate_seq;</div><div class='add'>+	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='ctx'> 	mmap_read_unlock(current-&gt;mm);</div><div class='ctx'> </div><div class='del'>-	pfn = __gfn_to_pfn_memslot(memslot, gfn, false, false, NULL,</div><div class='del'>-				   write_fault, &amp;writable, NULL);</div><div class='add'>+	pfn = __kvm_faultin_pfn(memslot, gfn, write_fault ? FOLL_WRITE : 0,</div><div class='add'>+				&amp;writable, &amp;page);</div><div class='ctx'> 	if (pfn == KVM_PFN_ERR_HWPOISON) {</div><div class='ctx'> 		kvm_send_hwpoison_signal(hva, vma_shift);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1578,18 +1753,39 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	if (is_error_noslot_pfn(pfn))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	if (kvm_is_device_pfn(pfn)) {</div><div class='del'>-		/*</div><div class='del'>-		 * If the page was identified as device early by looking at</div><div class='del'>-		 * the VMA flags, vma_pagesize is already representing the</div><div class='del'>-		 * largest quantity we can map.  If instead it was mapped</div><div class='del'>-		 * via gfn_to_pfn_prot(), vma_pagesize is set to PAGE_SIZE</div><div class='del'>-		 * and must not be upgraded.</div><div class='del'>-		 *</div><div class='del'>-		 * In both cases, we don't let transparent_hugepage_adjust()</div><div class='del'>-		 * change things at the last minute.</div><div class='del'>-		 */</div><div class='del'>-		device = true;</div><div class='add'>+	/*</div><div class='add'>+	 * Check if this is non-struct page memory PFN, and cannot support</div><div class='add'>+	 * CMOs. It could potentially be unsafe to access as cachable.</div><div class='add'>+	 */</div><div class='add'>+	if (vm_flags &amp; (VM_PFNMAP | VM_MIXEDMAP) &amp;&amp; !pfn_is_map_memory(pfn)) {</div><div class='add'>+		if (is_vma_cacheable) {</div><div class='add'>+			/*</div><div class='add'>+			 * Whilst the VMA owner expects cacheable mapping to this</div><div class='add'>+			 * PFN, hardware also has to support the FWB and CACHE DIC</div><div class='add'>+			 * features.</div><div class='add'>+			 *</div><div class='add'>+			 * ARM64 KVM relies on kernel VA mapping to the PFN to</div><div class='add'>+			 * perform cache maintenance as the CMO instructions work on</div><div class='add'>+			 * virtual addresses. VM_PFNMAP region are not necessarily</div><div class='add'>+			 * mapped to a KVA and hence the presence of hardware features</div><div class='add'>+			 * S2FWB and CACHE DIC are mandatory to avoid the need for</div><div class='add'>+			 * cache maintenance.</div><div class='add'>+			 */</div><div class='add'>+			if (!kvm_supports_cacheable_pfnmap())</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * If the page was identified as device early by looking at</div><div class='add'>+			 * the VMA flags, vma_pagesize is already representing the</div><div class='add'>+			 * largest quantity we can map.  If instead it was mapped</div><div class='add'>+			 * via __kvm_faultin_pfn(), vma_pagesize is set to PAGE_SIZE</div><div class='add'>+			 * and must not be upgraded.</div><div class='add'>+			 *</div><div class='add'>+			 * In both cases, we don't let transparent_hugepage_adjust()</div><div class='add'>+			 * change things at the last minute.</div><div class='add'>+			 */</div><div class='add'>+			s2_force_noncacheable = true;</div><div class='add'>+		}</div><div class='ctx'> 	} else if (logging_active &amp;&amp; !write_fault) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Only actually map the page as writable if this was a write</div><div class='hunk'>@@ -1598,29 +1794,18 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 		writable = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (exec_fault &amp;&amp; device)</div><div class='del'>-		return -ENOEXEC;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Potentially reduce shadow S2 permissions to match the guest's own</div><div class='del'>-	 * S2. For exec faults, we'd only reach this point if the guest</div><div class='del'>-	 * actually allowed it (see kvm_s2_handle_perm_fault).</div><div class='del'>-	 *</div><div class='del'>-	 * Also encode the level of the original translation in the SW bits</div><div class='del'>-	 * of the leaf entry as a proxy for the span of that translation.</div><div class='del'>-	 * This will be retrieved on TLB invalidation from the guest and</div><div class='del'>-	 * used to limit the invalidation scope if a TTL hint or a range</div><div class='del'>-	 * isn't provided.</div><div class='del'>-	 */</div><div class='del'>-	if (nested) {</div><div class='del'>-		writable &amp;= kvm_s2_trans_writable(nested);</div><div class='del'>-		if (!kvm_s2_trans_readable(nested))</div><div class='del'>-			prot &amp;= ~KVM_PGTABLE_PROT_R;</div><div class='add'>+	if (exec_fault &amp;&amp; s2_force_noncacheable)</div><div class='add'>+		ret = -ENOEXEC;</div><div class='ctx'> </div><div class='del'>-		prot |= kvm_encode_nested_level(nested);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kvm_release_page_unused(page);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	read_lock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	if (nested)</div><div class='add'>+		adjust_nested_fault_perms(nested, &amp;prot, &amp;writable);</div><div class='add'>+</div><div class='add'>+	kvm_fault_lock(kvm);</div><div class='ctx'> 	pgt = vcpu-&gt;arch.hw_mmu-&gt;pgt;</div><div class='ctx'> 	if (mmu_invalidate_retry(kvm, mmu_seq)) {</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='hunk'>@@ -1631,7 +1816,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	 * If we are not forced to use page mapping, check if we are</div><div class='ctx'> 	 * backed by a THP and thus use block mapping if possible.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vma_pagesize == PAGE_SIZE &amp;&amp; !(force_pte || device)) {</div><div class='add'>+	if (vma_pagesize == PAGE_SIZE &amp;&amp; !(force_pte || s2_force_noncacheable)) {</div><div class='ctx'> 		if (fault_is_perm &amp;&amp; fault_granule &gt; PAGE_SIZE)</div><div class='ctx'> 			vma_pagesize = fault_granule;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1645,7 +1830,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!fault_is_perm &amp;&amp; !device &amp;&amp; kvm_has_mte(kvm)) {</div><div class='add'>+	if (!fault_is_perm &amp;&amp; !s2_force_noncacheable &amp;&amp; kvm_has_mte(kvm)) {</div><div class='ctx'> 		/* Check the VMM hasn't introduced a new disallowed VMA */</div><div class='ctx'> 		if (mte_allowed) {</div><div class='ctx'> 			sanitise_mte_tags(kvm, pfn, vma_pagesize);</div><div class='hunk'>@@ -1661,7 +1846,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	if (exec_fault)</div><div class='ctx'> 		prot |= KVM_PGTABLE_PROT_X;</div><div class='ctx'> </div><div class='del'>-	if (device) {</div><div class='add'>+	if (s2_force_noncacheable) {</div><div class='ctx'> 		if (vfio_allow_any_uc)</div><div class='ctx'> 			prot |= KVM_PGTABLE_PROT_NORMAL_NC;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1682,43 +1867,49 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 		 * PTE, which will be preserved.</div><div class='ctx'> 		 */</div><div class='ctx'> 		prot &amp;= ~KVM_NV_GUEST_MAP_SZ;</div><div class='del'>-		ret = kvm_pgtable_stage2_relax_perms(pgt, fault_ipa, prot);</div><div class='add'>+		ret = KVM_PGT_FN(kvm_pgtable_stage2_relax_perms)(pgt, fault_ipa, prot, flags);</div><div class='ctx'> 	} else {</div><div class='del'>-		ret = kvm_pgtable_stage2_map(pgt, fault_ipa, vma_pagesize,</div><div class='add'>+		ret = KVM_PGT_FN(kvm_pgtable_stage2_map)(pgt, fault_ipa, vma_pagesize,</div><div class='ctx'> 					     __pfn_to_phys(pfn), prot,</div><div class='del'>-					     memcache,</div><div class='del'>-					     KVM_PGTABLE_WALK_HANDLE_FAULT |</div><div class='del'>-					     KVM_PGTABLE_WALK_SHARED);</div><div class='add'>+					     memcache, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='del'>-	read_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	kvm_release_faultin_page(kvm, page, !!ret, writable);</div><div class='add'>+	kvm_fault_unlock(kvm);</div><div class='ctx'> </div><div class='ctx'> 	/* Mark the page dirty only if the fault is handled successfully */</div><div class='del'>-	if (writable &amp;&amp; !ret) {</div><div class='del'>-		kvm_set_pfn_dirty(pfn);</div><div class='add'>+	if (writable &amp;&amp; !ret)</div><div class='ctx'> 		mark_page_dirty_in_slot(kvm, memslot, gfn);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='ctx'> 	return ret != -EAGAIN ? ret : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Resolve the access fault by making the page young again. */</div><div class='ctx'> static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)</div><div class='ctx'> {</div><div class='del'>-	kvm_pte_t pte;</div><div class='add'>+	enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED;</div><div class='ctx'> 	struct kvm_s2_mmu *mmu;</div><div class='ctx'> </div><div class='ctx'> 	trace_kvm_access_fault(fault_ipa);</div><div class='ctx'> </div><div class='ctx'> 	read_lock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='ctx'> 	mmu = vcpu-&gt;arch.hw_mmu;</div><div class='del'>-	pte = kvm_pgtable_stage2_mkyoung(mmu-&gt;pgt, fault_ipa);</div><div class='add'>+	KVM_PGT_FN(kvm_pgtable_stage2_mkyoung)(mmu-&gt;pgt, fault_ipa, flags);</div><div class='ctx'> 	read_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_handle_guest_sea(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Give APEI the opportunity to claim the abort before handling it</div><div class='add'>+	 * within KVM. apei_claim_sea() expects to be called with IRQs enabled.</div><div class='add'>+	 */</div><div class='add'>+	lockdep_assert_irqs_enabled();</div><div class='add'>+	if (apei_claim_sea(NULL) == 0)</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-	if (kvm_pte_valid(pte))</div><div class='del'>-		kvm_set_pfn_accessed(kvm_pte_to_pfn(pte));</div><div class='add'>+	return kvm_inject_serror(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1744,9 +1935,19 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	gfn_t gfn;</div><div class='ctx'> 	int ret, idx;</div><div class='ctx'> </div><div class='add'>+	if (kvm_vcpu_abt_issea(vcpu))</div><div class='add'>+		return kvm_handle_guest_sea(vcpu);</div><div class='add'>+</div><div class='ctx'> 	esr = kvm_vcpu_get_esr(vcpu);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The fault IPA should be reliable at this point as we're not dealing</div><div class='add'>+	 * with an SEA.</div><div class='add'>+	 */</div><div class='ctx'> 	ipa = fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);</div><div class='add'>+	if (KVM_BUG_ON(ipa == INVALID_GPA, vcpu-&gt;kvm))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	is_iabt = kvm_vcpu_trap_is_iabt(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (esr_fsc_is_translation_fault(esr)) {</div><div class='hunk'>@@ -1757,29 +1958,13 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Falls between the IPA range and the PARange? */</div><div class='del'>-		if (fault_ipa &gt;= BIT_ULL(vcpu-&gt;arch.hw_mmu-&gt;pgt-&gt;ia_bits)) {</div><div class='add'>+		if (fault_ipa &gt;= BIT_ULL(VTCR_EL2_IPA(vcpu-&gt;arch.hw_mmu-&gt;vtcr))) {</div><div class='ctx'> 			fault_ipa |= kvm_vcpu_get_hfar(vcpu) &amp; GENMASK(11, 0);</div><div class='ctx'> </div><div class='del'>-			if (is_iabt)</div><div class='del'>-				kvm_inject_pabt(vcpu, fault_ipa);</div><div class='del'>-			else</div><div class='del'>-				kvm_inject_dabt(vcpu, fault_ipa);</div><div class='del'>-			return 1;</div><div class='add'>+			return kvm_inject_sea(vcpu, is_iabt, fault_ipa);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Synchronous External Abort? */</div><div class='del'>-	if (kvm_vcpu_abt_issea(vcpu)) {</div><div class='del'>-		/*</div><div class='del'>-		 * For RAS the host kernel may handle this abort.</div><div class='del'>-		 * There is no need to pass the error into the guest.</div><div class='del'>-		 */</div><div class='del'>-		if (kvm_handle_guest_sea(fault_ipa, kvm_vcpu_get_esr(vcpu)))</div><div class='del'>-			kvm_inject_vabt(vcpu);</div><div class='del'>-</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_esr(vcpu),</div><div class='ctx'> 			      kvm_vcpu_get_hfar(vcpu), fault_ipa);</div><div class='ctx'> </div><div class='hunk'>@@ -1848,8 +2033,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_vcpu_abt_iss1tw(vcpu)) {</div><div class='del'>-			kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='del'>-			ret = 1;</div><div class='add'>+			ret = kvm_inject_sea_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='ctx'> 			goto out_unlock;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1889,15 +2073,20 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = user_mem_abort(vcpu, fault_ipa, nested, memslot, hva,</div><div class='del'>-			     esr_fsc_is_permission_fault(esr));</div><div class='add'>+	VM_WARN_ON_ONCE(kvm_vcpu_trap_is_permission_fault(vcpu) &amp;&amp;</div><div class='add'>+			!write_fault &amp;&amp; !kvm_vcpu_trap_is_exec_fault(vcpu));</div><div class='add'>+</div><div class='add'>+	if (kvm_slot_has_gmem(memslot))</div><div class='add'>+		ret = gmem_abort(vcpu, fault_ipa, nested, memslot,</div><div class='add'>+				 esr_fsc_is_permission_fault(esr));</div><div class='add'>+	else</div><div class='add'>+		ret = user_mem_abort(vcpu, fault_ipa, nested, memslot, hva,</div><div class='add'>+				     esr_fsc_is_permission_fault(esr));</div><div class='ctx'> 	if (ret == 0)</div><div class='ctx'> 		ret = 1;</div><div class='ctx'> out:</div><div class='del'>-	if (ret == -ENOEXEC) {</div><div class='del'>-		kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='del'>-		ret = 1;</div><div class='del'>-	}</div><div class='add'>+	if (ret == -ENOEXEC)</div><div class='add'>+		ret = kvm_inject_sea_iabt(vcpu, kvm_vcpu_get_hfar(vcpu));</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1912,7 +2101,7 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)</div><div class='ctx'> 			     (range-&gt;end - range-&gt;start) &lt;&lt; PAGE_SHIFT,</div><div class='ctx'> 			     range-&gt;may_block);</div><div class='ctx'> </div><div class='del'>-	kvm_nested_s2_unmap(kvm);</div><div class='add'>+	kvm_nested_s2_unmap(kvm, range-&gt;may_block);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1923,7 +2112,7 @@ bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)</div><div class='ctx'> 	if (!kvm-&gt;arch.mmu.pgt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return kvm_pgtable_stage2_test_clear_young(kvm-&gt;arch.mmu.pgt,</div><div class='add'>+	return KVM_PGT_FN(kvm_pgtable_stage2_test_clear_young)(kvm-&gt;arch.mmu.pgt,</div><div class='ctx'> 						   range-&gt;start &lt;&lt; PAGE_SHIFT,</div><div class='ctx'> 						   size, true);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1939,7 +2128,7 @@ bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)</div><div class='ctx'> 	if (!kvm-&gt;arch.mmu.pgt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return kvm_pgtable_stage2_test_clear_young(kvm-&gt;arch.mmu.pgt,</div><div class='add'>+	return KVM_PGT_FN(kvm_pgtable_stage2_test_clear_young)(kvm-&gt;arch.mmu.pgt,</div><div class='ctx'> 						   range-&gt;start &lt;&lt; PAGE_SHIFT,</div><div class='ctx'> 						   size, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -2049,6 +2238,7 @@ int __init kvm_mmu_init(u32 *hyp_va_bits)</div><div class='ctx'> 		goto out_destroy_pgtable;</div><div class='ctx'> </div><div class='ctx'> 	io_map_base = hyp_idmap_start;</div><div class='add'>+	__hyp_va_bits = *hyp_va_bits;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_destroy_pgtable:</div><div class='hunk'>@@ -2123,6 +2313,13 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 	if ((new-&gt;base_gfn + new-&gt;npages) &gt; (kvm_phys_size(&amp;kvm-&gt;arch.mmu) &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Only support guest_memfd backed memslots with mappable memory, since</div><div class='add'>+	 * there aren't any CoCo VMs that support only private memory on arm64.</div><div class='add'>+	 */</div><div class='add'>+	if (kvm_slot_has_gmem(new) &amp;&amp; !kvm_memslot_is_gmem_only(new))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	hva = new-&gt;userspace_addr;</div><div class='ctx'> 	reg_end = hva + (new-&gt;npages &lt;&lt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -2156,6 +2353,15 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Cacheable PFNMAP is allowed only if the hardware</div><div class='add'>+			 * supports it.</div><div class='add'>+			 */</div><div class='add'>+			if (kvm_vma_is_cacheable(vma) &amp;&amp; !kvm_supports_cacheable_pfnmap()) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		hva = min(reg_end, vma-&gt;vm_end);</div><div class='ctx'> 	} while (hva &lt; reg_end);</div><div class='hunk'>@@ -2179,8 +2385,8 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,</div><div class='ctx'> 	phys_addr_t size = slot-&gt;npages &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	write_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	kvm_stage2_unmap_range(&amp;kvm-&gt;arch.mmu, gpa, size);</div><div class='del'>-	kvm_nested_s2_unmap(kvm);</div><div class='add'>+	kvm_stage2_unmap_range(&amp;kvm-&gt;arch.mmu, gpa, size, true);</div><div class='add'>+	kvm_nested_s2_unmap(kvm, true);</div><div class='ctx'> 	write_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c<br/>index f9e30dd34c7a..7a045cad6bdf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/nested.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/nested.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/nested.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/nested.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_arm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_emulate.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='hunk'>@@ -16,8 +17,23 @@</div><div class='ctx'> </div><div class='ctx'> #include "sys_regs.h"</div><div class='ctx'> </div><div class='del'>-/* Protection against the sysreg repainting madness... */</div><div class='del'>-#define NV_FTR(r, f)		ID_AA64##r##_EL1_##f</div><div class='add'>+struct vncr_tlb {</div><div class='add'>+	/* The guest's VNCR_EL2 */</div><div class='add'>+	u64			gva;</div><div class='add'>+	struct s1_walk_info	wi;</div><div class='add'>+	struct s1_walk_result	wr;</div><div class='add'>+</div><div class='add'>+	u64			hpa;</div><div class='add'>+</div><div class='add'>+	/* -1 when not mapped on a CPU */</div><div class='add'>+	int			cpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * true if the TLB is valid. Can only be changed with the</div><div class='add'>+	 * mmu_lock held.</div><div class='add'>+	 */</div><div class='add'>+	bool			valid;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Ratio of live shadow S2 MMU per vcpu. This is a trade-off between</div><div class='hunk'>@@ -31,6 +47,7 @@ void kvm_init_nested(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	kvm-&gt;arch.nested_mmus = NULL;</div><div class='ctx'> 	kvm-&gt;arch.nested_mmus_size = 0;</div><div class='add'>+	atomic_set(&amp;kvm-&gt;arch.vncr_map_count, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu)</div><div class='hunk'>@@ -54,6 +71,17 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_s2_mmu *tmp;</div><div class='ctx'> 	int num_mmus, ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(KVM_ARM_VCPU_HAS_EL2_E2H0, kvm-&gt;arch.vcpu_features) &amp;&amp;</div><div class='add'>+	    !cpus_have_final_cap(ARM64_HAS_HCR_NV1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!vcpu-&gt;arch.ctxt.vncr_array)</div><div class='add'>+		vcpu-&gt;arch.ctxt.vncr_array = (u64 *)__get_free_page(GFP_KERNEL_ACCOUNT |</div><div class='add'>+								    __GFP_ZERO);</div><div class='add'>+</div><div class='add'>+	if (!vcpu-&gt;arch.ctxt.vncr_array)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Let's treat memory allocation failures as benign: If we fail to</div><div class='ctx'> 	 * allocate anything, return an error and keep the allocated array</div><div class='hunk'>@@ -67,26 +95,30 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!tmp)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	swap(kvm-&gt;arch.nested_mmus, tmp);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we went through a realocation, adjust the MMU back-pointers in</div><div class='ctx'> 	 * the previously initialised kvm_pgtable structures.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (kvm-&gt;arch.nested_mmus != tmp)</div><div class='ctx'> 		for (int i = 0; i &lt; kvm-&gt;arch.nested_mmus_size; i++)</div><div class='del'>-			tmp[i].pgt-&gt;mmu = &amp;tmp[i];</div><div class='add'>+			kvm-&gt;arch.nested_mmus[i].pgt-&gt;mmu = &amp;kvm-&gt;arch.nested_mmus[i];</div><div class='ctx'> </div><div class='ctx'> 	for (int i = kvm-&gt;arch.nested_mmus_size; !ret &amp;&amp; i &lt; num_mmus; i++)</div><div class='del'>-		ret = init_nested_s2_mmu(kvm, &amp;tmp[i]);</div><div class='add'>+		ret = init_nested_s2_mmu(kvm, &amp;kvm-&gt;arch.nested_mmus[i]);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		for (int i = kvm-&gt;arch.nested_mmus_size; i &lt; num_mmus; i++)</div><div class='del'>-			kvm_free_stage2_pgd(&amp;tmp[i]);</div><div class='add'>+			kvm_free_stage2_pgd(&amp;kvm-&gt;arch.nested_mmus[i]);</div><div class='add'>+</div><div class='add'>+		free_page((unsigned long)vcpu-&gt;arch.ctxt.vncr_array);</div><div class='add'>+		vcpu-&gt;arch.ctxt.vncr_array = NULL;</div><div class='ctx'> </div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.nested_mmus_size = num_mmus;</div><div class='del'>-	kvm-&gt;arch.nested_mmus = tmp;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -317,7 +349,7 @@ static void vtcr_to_walk_info(u64 vtcr, struct s2_walk_info *wi)</div><div class='ctx'> 	wi-&gt;sl = FIELD_GET(VTCR_EL2_SL0_MASK, vtcr);</div><div class='ctx'> 	/* Global limit for now, should eventually be per-VM */</div><div class='ctx'> 	wi-&gt;max_oa_bits = min(get_kvm_ipa_limit(),</div><div class='del'>-			      ps_to_output_size(FIELD_GET(VTCR_EL2_PS_MASK, vtcr)));</div><div class='add'>+			      ps_to_output_size(FIELD_GET(VTCR_EL2_PS_MASK, vtcr), false));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_walk_nested_s2(struct kvm_vcpu *vcpu, phys_addr_t gipa,</div><div class='hunk'>@@ -403,6 +435,30 @@ static unsigned int ttl_to_size(u8 ttl)</div><div class='ctx'> 	return max_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 pgshift_level_to_ttl(u16 shift, u8 level)</div><div class='add'>+{</div><div class='add'>+	u8 ttl;</div><div class='add'>+</div><div class='add'>+	switch(shift) {</div><div class='add'>+	case 12:</div><div class='add'>+		ttl = TLBI_TTL_TG_4K;</div><div class='add'>+		break;</div><div class='add'>+	case 14:</div><div class='add'>+		ttl = TLBI_TTL_TG_16K;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		ttl = TLBI_TTL_TG_64K;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ttl &lt;&lt;= 2;</div><div class='add'>+	ttl |= level &amp; 3;</div><div class='add'>+</div><div class='add'>+	return ttl;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Compute the equivalent of the TTL field by parsing the shadow PT.  The</div><div class='ctx'>  * granule size is extracted from the cached VTCR_EL2.TG0 while the level is</div><div class='hunk'>@@ -632,9 +688,9 @@ static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* Set the scene for the next search */</div><div class='ctx'> 	kvm-&gt;arch.nested_mmus_next = (i + 1) % kvm-&gt;arch.nested_mmus_size;</div><div class='ctx'> </div><div class='del'>-	/* Clear the old state */</div><div class='add'>+	/* Make sure we don't forget to do the laundry */</div><div class='ctx'> 	if (kvm_s2_mmu_valid(s2_mmu))</div><div class='del'>-		kvm_stage2_unmap_range(s2_mmu, 0, kvm_phys_size(s2_mmu));</div><div class='add'>+		s2_mmu-&gt;pending_unmap = true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The virtual VMID (modulo CnP) will be used as a key when matching</div><div class='hunk'>@@ -650,6 +706,16 @@ static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	atomic_inc(&amp;s2_mmu-&gt;refcnt);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set the vCPU request to perform an unmap, even if the pending unmap</div><div class='add'>+	 * originates from another vCPU. This guarantees that the MMU has been</div><div class='add'>+	 * completely unmapped before any vCPU actually uses it, and allows</div><div class='add'>+	 * multiple vCPUs to lend a hand with completing the unmap.</div><div class='add'>+	 */</div><div class='add'>+	if (s2_mmu-&gt;pending_unmap)</div><div class='add'>+		kvm_make_request(KVM_REQ_NESTED_S2_UNMAP, vcpu);</div><div class='add'>+</div><div class='ctx'> 	return s2_mmu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -663,21 +729,49 @@ void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu)</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * If the vCPU kept its reference on the MMU after the last put,</div><div class='add'>+	 * keep rolling with it.</div><div class='add'>+	 */</div><div class='ctx'> 	if (is_hyp_ctxt(vcpu)) {</div><div class='del'>-		vcpu-&gt;arch.hw_mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='add'>+		if (!vcpu-&gt;arch.hw_mmu)</div><div class='add'>+			vcpu-&gt;arch.hw_mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='ctx'> 	} else {</div><div class='del'>-		write_lock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='del'>-		vcpu-&gt;arch.hw_mmu = get_s2_mmu_nested(vcpu);</div><div class='del'>-		write_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+		if (!vcpu-&gt;arch.hw_mmu) {</div><div class='add'>+			scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock)</div><div class='add'>+				vcpu-&gt;arch.hw_mmu = get_s2_mmu_nested(vcpu);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; HCR_NV)</div><div class='add'>+			kvm_make_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (kvm_is_nested_s2_mmu(vcpu-&gt;kvm, vcpu-&gt;arch.hw_mmu)) {</div><div class='del'>-		atomic_dec(&amp;vcpu-&gt;arch.hw_mmu-&gt;refcnt);</div><div class='del'>-		vcpu-&gt;arch.hw_mmu = NULL;</div><div class='add'>+	/* Unconditionally drop the VNCR mapping if we have one */</div><div class='add'>+	if (host_data_test_flag(L1_VNCR_MAPPED)) {</div><div class='add'>+		BUG_ON(vcpu-&gt;arch.vncr_tlb-&gt;cpu != smp_processor_id());</div><div class='add'>+		BUG_ON(is_hyp_ctxt(vcpu));</div><div class='add'>+</div><div class='add'>+		clear_fixmap(vncr_fixmap(vcpu-&gt;arch.vncr_tlb-&gt;cpu));</div><div class='add'>+		vcpu-&gt;arch.vncr_tlb-&gt;cpu = -1;</div><div class='add'>+		host_data_clear_flag(L1_VNCR_MAPPED);</div><div class='add'>+		atomic_dec(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Keep a reference on the associated stage-2 MMU if the vCPU is</div><div class='add'>+	 * scheduling out and not in WFI emulation, suggesting it is likely to</div><div class='add'>+	 * reuse the MMU sometime soon.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu-&gt;scheduled_out &amp;&amp; !vcpu_get_flag(vcpu, IN_WFI))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (kvm_is_nested_s2_mmu(vcpu-&gt;kvm, vcpu-&gt;arch.hw_mmu))</div><div class='add'>+		atomic_dec(&amp;vcpu-&gt;arch.hw_mmu-&gt;refcnt);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.hw_mmu = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -716,6 +810,247 @@ int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2)</div><div class='ctx'> 	return kvm_inject_nested_sync(vcpu, esr_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void invalidate_vncr(struct vncr_tlb *vt)</div><div class='add'>+{</div><div class='add'>+	vt-&gt;valid = false;</div><div class='add'>+	if (vt-&gt;cpu != -1)</div><div class='add'>+		clear_fixmap(vncr_fixmap(vt-&gt;cpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_invalidate_vncr_ipa(struct kvm *kvm, u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+		struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+		u64 ipa_start, ipa_end, ipa_size;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Careful here: We end-up here from an MMU notifier,</div><div class='add'>+		 * and this can race against a vcpu not being onlined</div><div class='add'>+		 * yet, without the pseudo-TLB being allocated.</div><div class='add'>+		 *</div><div class='add'>+		 * Skip those, as they obviously don't participate in</div><div class='add'>+		 * the invalidation at this stage.</div><div class='add'>+		 */</div><div class='add'>+		if (!vt)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!vt-&gt;valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ipa_size = ttl_to_size(pgshift_level_to_ttl(vt-&gt;wi.pgshift,</div><div class='add'>+							    vt-&gt;wr.level));</div><div class='add'>+		ipa_start = vt-&gt;wr.pa &amp; ~(ipa_size - 1);</div><div class='add'>+		ipa_end = ipa_start + ipa_size;</div><div class='add'>+</div><div class='add'>+		if (ipa_end &lt;= start || ipa_start &gt;= end)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct s1e2_tlbi_scope {</div><div class='add'>+	enum {</div><div class='add'>+		TLBI_ALL,</div><div class='add'>+		TLBI_VA,</div><div class='add'>+		TLBI_VAA,</div><div class='add'>+		TLBI_ASID,</div><div class='add'>+	} type;</div><div class='add'>+</div><div class='add'>+	u16 asid;</div><div class='add'>+	u64 va;</div><div class='add'>+	u64 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void invalidate_vncr_va(struct kvm *kvm,</div><div class='add'>+			       struct s1e2_tlbi_scope *scope)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+		struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+		u64 va_start, va_end, va_size;</div><div class='add'>+</div><div class='add'>+		if (!vt-&gt;valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		va_size = ttl_to_size(pgshift_level_to_ttl(vt-&gt;wi.pgshift,</div><div class='add'>+							   vt-&gt;wr.level));</div><div class='add'>+		va_start = vt-&gt;gva &amp; ~(va_size - 1);</div><div class='add'>+		va_end = va_start + va_size;</div><div class='add'>+</div><div class='add'>+		switch (scope-&gt;type) {</div><div class='add'>+		case TLBI_ALL:</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_VA:</div><div class='add'>+			if (va_end &lt;= scope-&gt;va ||</div><div class='add'>+			    va_start &gt;= (scope-&gt;va + scope-&gt;size))</div><div class='add'>+				continue;</div><div class='add'>+			if (vt-&gt;wr.nG &amp;&amp; vt-&gt;wr.asid != scope-&gt;asid)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_VAA:</div><div class='add'>+			if (va_end &lt;= scope-&gt;va ||</div><div class='add'>+			    va_start &gt;= (scope-&gt;va + scope-&gt;size))</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_ASID:</div><div class='add'>+			if (!vt-&gt;wr.nG || vt-&gt;wr.asid != scope-&gt;asid)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define tlbi_va_s1_to_va(v)	(u64)sign_extend64((v) &lt;&lt; 12, 48)</div><div class='add'>+</div><div class='add'>+static void compute_s1_tlbi_range(struct kvm_vcpu *vcpu, u32 inst, u64 val,</div><div class='add'>+				  struct s1e2_tlbi_scope *scope)</div><div class='add'>+{</div><div class='add'>+	switch (inst) {</div><div class='add'>+	case OP_TLBI_ALLE2:</div><div class='add'>+	case OP_TLBI_ALLE2IS:</div><div class='add'>+	case OP_TLBI_ALLE2OS:</div><div class='add'>+	case OP_TLBI_VMALLE1:</div><div class='add'>+	case OP_TLBI_VMALLE1IS:</div><div class='add'>+	case OP_TLBI_VMALLE1OS:</div><div class='add'>+	case OP_TLBI_ALLE2NXS:</div><div class='add'>+	case OP_TLBI_ALLE2ISNXS:</div><div class='add'>+	case OP_TLBI_ALLE2OSNXS:</div><div class='add'>+	case OP_TLBI_VMALLE1NXS:</div><div class='add'>+	case OP_TLBI_VMALLE1ISNXS:</div><div class='add'>+	case OP_TLBI_VMALLE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_ALL;</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_VAE2:</div><div class='add'>+	case OP_TLBI_VAE2IS:</div><div class='add'>+	case OP_TLBI_VAE2OS:</div><div class='add'>+	case OP_TLBI_VAE1:</div><div class='add'>+	case OP_TLBI_VAE1IS:</div><div class='add'>+	case OP_TLBI_VAE1OS:</div><div class='add'>+	case OP_TLBI_VAE2NXS:</div><div class='add'>+	case OP_TLBI_VAE2ISNXS:</div><div class='add'>+	case OP_TLBI_VAE2OSNXS:</div><div class='add'>+	case OP_TLBI_VAE1NXS:</div><div class='add'>+	case OP_TLBI_VAE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAE1OSNXS:</div><div class='add'>+	case OP_TLBI_VALE2:</div><div class='add'>+	case OP_TLBI_VALE2IS:</div><div class='add'>+	case OP_TLBI_VALE2OS:</div><div class='add'>+	case OP_TLBI_VALE1:</div><div class='add'>+	case OP_TLBI_VALE1IS:</div><div class='add'>+	case OP_TLBI_VALE1OS:</div><div class='add'>+	case OP_TLBI_VALE2NXS:</div><div class='add'>+	case OP_TLBI_VALE2ISNXS:</div><div class='add'>+	case OP_TLBI_VALE2OSNXS:</div><div class='add'>+	case OP_TLBI_VALE1NXS:</div><div class='add'>+	case OP_TLBI_VALE1ISNXS:</div><div class='add'>+	case OP_TLBI_VALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VA;</div><div class='add'>+		scope-&gt;size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));</div><div class='add'>+		if (!scope-&gt;size)</div><div class='add'>+			scope-&gt;size = SZ_1G;</div><div class='add'>+		scope-&gt;va = tlbi_va_s1_to_va(val) &amp; ~(scope-&gt;size - 1);</div><div class='add'>+		scope-&gt;asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_ASIDE1:</div><div class='add'>+	case OP_TLBI_ASIDE1IS:</div><div class='add'>+	case OP_TLBI_ASIDE1OS:</div><div class='add'>+	case OP_TLBI_ASIDE1NXS:</div><div class='add'>+	case OP_TLBI_ASIDE1ISNXS:</div><div class='add'>+	case OP_TLBI_ASIDE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_ASID;</div><div class='add'>+		scope-&gt;asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_VAAE1:</div><div class='add'>+	case OP_TLBI_VAAE1IS:</div><div class='add'>+	case OP_TLBI_VAAE1OS:</div><div class='add'>+	case OP_TLBI_VAAE1NXS:</div><div class='add'>+	case OP_TLBI_VAAE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAAE1OSNXS:</div><div class='add'>+	case OP_TLBI_VAALE1:</div><div class='add'>+	case OP_TLBI_VAALE1IS:</div><div class='add'>+	case OP_TLBI_VAALE1OS:</div><div class='add'>+	case OP_TLBI_VAALE1NXS:</div><div class='add'>+	case OP_TLBI_VAALE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VAA;</div><div class='add'>+		scope-&gt;size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));</div><div class='add'>+		if (!scope-&gt;size)</div><div class='add'>+			scope-&gt;size = SZ_1G;</div><div class='add'>+		scope-&gt;va = tlbi_va_s1_to_va(val) &amp; ~(scope-&gt;size - 1);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_RVAE2:</div><div class='add'>+	case OP_TLBI_RVAE2IS:</div><div class='add'>+	case OP_TLBI_RVAE2OS:</div><div class='add'>+	case OP_TLBI_RVAE1:</div><div class='add'>+	case OP_TLBI_RVAE1IS:</div><div class='add'>+	case OP_TLBI_RVAE1OS:</div><div class='add'>+	case OP_TLBI_RVAE2NXS:</div><div class='add'>+	case OP_TLBI_RVAE2ISNXS:</div><div class='add'>+	case OP_TLBI_RVAE2OSNXS:</div><div class='add'>+	case OP_TLBI_RVAE1NXS:</div><div class='add'>+	case OP_TLBI_RVAE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAE1OSNXS:</div><div class='add'>+	case OP_TLBI_RVALE2:</div><div class='add'>+	case OP_TLBI_RVALE2IS:</div><div class='add'>+	case OP_TLBI_RVALE2OS:</div><div class='add'>+	case OP_TLBI_RVALE1:</div><div class='add'>+	case OP_TLBI_RVALE1IS:</div><div class='add'>+	case OP_TLBI_RVALE1OS:</div><div class='add'>+	case OP_TLBI_RVALE2NXS:</div><div class='add'>+	case OP_TLBI_RVALE2ISNXS:</div><div class='add'>+	case OP_TLBI_RVALE2OSNXS:</div><div class='add'>+	case OP_TLBI_RVALE1NXS:</div><div class='add'>+	case OP_TLBI_RVALE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VA;</div><div class='add'>+		scope-&gt;va = decode_range_tlbi(val, &amp;scope-&gt;size, &amp;scope-&gt;asid);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_RVAAE1:</div><div class='add'>+	case OP_TLBI_RVAAE1IS:</div><div class='add'>+	case OP_TLBI_RVAAE1OS:</div><div class='add'>+	case OP_TLBI_RVAAE1NXS:</div><div class='add'>+	case OP_TLBI_RVAAE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAAE1OSNXS:</div><div class='add'>+	case OP_TLBI_RVAALE1:</div><div class='add'>+	case OP_TLBI_RVAALE1IS:</div><div class='add'>+	case OP_TLBI_RVAALE1OS:</div><div class='add'>+	case OP_TLBI_RVAALE1NXS:</div><div class='add'>+	case OP_TLBI_RVAALE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VAA;</div><div class='add'>+		scope-&gt;va = decode_range_tlbi(val, &amp;scope-&gt;size, NULL);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val)</div><div class='add'>+{</div><div class='add'>+	struct s1e2_tlbi_scope scope = {};</div><div class='add'>+</div><div class='add'>+	compute_s1_tlbi_range(vcpu, inst, val, &amp;scope);</div><div class='add'>+</div><div class='add'>+	guard(write_lock)(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+	invalidate_vncr_va(vcpu-&gt;kvm, &amp;scope);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kvm_nested_s2_wp(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -728,9 +1063,11 @@ void kvm_nested_s2_wp(struct kvm *kvm)</div><div class='ctx'> 		if (kvm_s2_mmu_valid(mmu))</div><div class='ctx'> 			kvm_stage2_wp_range(mmu, 0, kvm_phys_size(mmu));</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm-&gt;arch.mmu.pgt-&gt;ia_bits));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_nested_s2_unmap(struct kvm *kvm)</div><div class='add'>+void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -740,8 +1077,10 @@ void kvm_nested_s2_unmap(struct kvm *kvm)</div><div class='ctx'> 		struct kvm_s2_mmu *mmu = &amp;kvm-&gt;arch.nested_mmus[i];</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_s2_mmu_valid(mmu))</div><div class='del'>-			kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu));</div><div class='add'>+			kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), may_block);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm-&gt;arch.mmu.pgt-&gt;ia_bits));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_nested_s2_flush(struct kvm *kvm)</div><div class='hunk'>@@ -775,148 +1114,522 @@ void kvm_arch_flush_shadow_all(struct kvm *kvm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Dealing with VNCR_EL2 exposed by the *guest* is a complicated matter:</div><div class='add'>+ *</div><div class='add'>+ * - We introduce an internal representation of a vcpu-private TLB,</div><div class='add'>+ *   representing the mapping between the guest VA contained in VNCR_EL2,</div><div class='add'>+ *   the IPA the guest's EL2 PTs point to, and the actual PA this lives at.</div><div class='add'>+ *</div><div class='add'>+ * - On translation fault from a nested VNCR access, we create such a TLB.</div><div class='add'>+ *   If there is no mapping to describe, the guest inherits the fault.</div><div class='add'>+ *   Crucially, no actual mapping is done at this stage.</div><div class='add'>+ *</div><div class='add'>+ * - On vcpu_load() in a non-HYP context with HCR_EL2.NV==1, if the above</div><div class='add'>+ *   TLB exists, we map it in the fixmap for this CPU, and run with it. We</div><div class='add'>+ *   have to respect the permissions dictated by the guest, but not the</div><div class='add'>+ *   memory type (FWB is a must).</div><div class='add'>+ *</div><div class='add'>+ * - Note that we usually don't do a vcpu_load() on the back of a fault</div><div class='add'>+ *   (unless we are preempted), so the resolution of a translation fault</div><div class='add'>+ *   must go via a request that will map the VNCR page in the fixmap.</div><div class='add'>+ *   vcpu_load() might as well use the same mechanism.</div><div class='add'>+ *</div><div class='add'>+ * - On vcpu_put() in a non-HYP context with HCR_EL2.NV==1, if the TLB was</div><div class='add'>+ *   mapped, we unmap it. Yes it is that simple. The TLB still exists</div><div class='add'>+ *   though, and may be reused at a later load.</div><div class='add'>+ *</div><div class='add'>+ * - On permission fault, we simply forward the fault to the guest's EL2.</div><div class='add'>+ *   Get out of my way.</div><div class='add'>+ *</div><div class='add'>+ * - On any TLBI for the EL2&amp;0 translation regime, we must find any TLB that</div><div class='add'>+ *   intersects with the TLBI request, invalidate it, and unmap the page</div><div class='add'>+ *   from the fixmap. Because we need to look at all the vcpu-private TLBs,</div><div class='add'>+ *   this requires some wide-ranging locking to ensure that nothing races</div><div class='add'>+ *   against it. This may require some refcounting to avoid the search when</div><div class='add'>+ *   no such TLB is present.</div><div class='add'>+ *</div><div class='add'>+ * - On MMU notifiers, we must invalidate our TLB in a similar way, but</div><div class='add'>+ *   looking at the IPA instead. The funny part is that there may not be a</div><div class='add'>+ *   stage-2 mapping for this page if L1 hasn't accessed it using LD/ST</div><div class='add'>+ *   instructions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.vncr_tlb = kzalloc(sizeof(*vcpu-&gt;arch.vncr_tlb),</div><div class='add'>+				      GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!vcpu-&gt;arch.vncr_tlb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 read_vncr_el2(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 48);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_translate_vncr(struct kvm_vcpu *vcpu, bool *is_gmem)</div><div class='add'>+{</div><div class='add'>+	struct kvm_memory_slot *memslot;</div><div class='add'>+	bool write_fault, writable;</div><div class='add'>+	unsigned long mmu_seq;</div><div class='add'>+	struct vncr_tlb *vt;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u64 va, pfn, gfn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're about to walk the EL2 S1 PTs, we must invalidate the</div><div class='add'>+	 * current TLB, as it could be sampled from another vcpu doing a</div><div class='add'>+	 * TLBI *IS. A real CPU wouldn't do that, but we only keep a single</div><div class='add'>+	 * translation, so not much of a choice.</div><div class='add'>+	 *</div><div class='add'>+	 * We also prepare the next walk wilst we're at it.</div><div class='add'>+	 */</div><div class='add'>+	scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock) {</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+</div><div class='add'>+		vt-&gt;wi = (struct s1_walk_info) {</div><div class='add'>+			.regime	= TR_EL20,</div><div class='add'>+			.as_el0	= false,</div><div class='add'>+			.pan	= false,</div><div class='add'>+		};</div><div class='add'>+		vt-&gt;wr = (struct s1_walk_result){};</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	guard(srcu)(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+</div><div class='add'>+	va =  read_vncr_el2(vcpu);</div><div class='add'>+</div><div class='add'>+	ret = __kvm_translate_va(vcpu, &amp;vt-&gt;wi, &amp;vt-&gt;wr, va);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	write_fault = kvm_is_write_fault(vcpu);</div><div class='add'>+</div><div class='add'>+	mmu_seq = vcpu-&gt;kvm-&gt;mmu_invalidate_seq;</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	gfn = vt-&gt;wr.pa &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	memslot = gfn_to_memslot(vcpu-&gt;kvm, gfn);</div><div class='add'>+	if (!memslot)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	*is_gmem = kvm_slot_has_gmem(memslot);</div><div class='add'>+	if (!*is_gmem) {</div><div class='add'>+		pfn = __kvm_faultin_pfn(memslot, gfn, write_fault ? FOLL_WRITE : 0,</div><div class='add'>+					&amp;writable, &amp;page);</div><div class='add'>+		if (is_error_noslot_pfn(pfn) || (write_fault &amp;&amp; !writable))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+	} else {</div><div class='add'>+		ret = kvm_gmem_get_pfn(vcpu-&gt;kvm, memslot, gfn, &amp;pfn, &amp;page, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			kvm_prepare_memory_fault_exit(vcpu, vt-&gt;wr.pa, PAGE_SIZE,</div><div class='add'>+					      write_fault, false, false);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock) {</div><div class='add'>+		if (mmu_invalidate_retry(vcpu-&gt;kvm, mmu_seq))</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+</div><div class='add'>+		vt-&gt;gva = va;</div><div class='add'>+		vt-&gt;hpa = pfn &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		vt-&gt;valid = true;</div><div class='add'>+		vt-&gt;cpu = -1;</div><div class='add'>+</div><div class='add'>+		kvm_make_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu);</div><div class='add'>+		kvm_release_faultin_page(vcpu-&gt;kvm, page, false, vt-&gt;wr.pw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.pw)</div><div class='add'>+		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void inject_vncr_perm(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+</div><div class='add'>+	/* Adjust the fault level to reflect that of the guest's */</div><div class='add'>+	esr &amp;= ~ESR_ELx_FSC;</div><div class='add'>+	esr |= FIELD_PREP(ESR_ELx_FSC,</div><div class='add'>+			  ESR_ELx_FSC_PERM_L(vt-&gt;wr.level));</div><div class='add'>+</div><div class='add'>+	kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_vncr_tlb_lookup(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_read(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	if (!vt-&gt;valid)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (read_vncr_el2(vcpu) != vt-&gt;gva)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.nG) {</div><div class='add'>+		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+		u64 ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+		u16 asid;</div><div class='add'>+</div><div class='add'>+		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			asid &amp;= GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+		return asid == vt-&gt;wr.asid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!(esr &amp; ESR_ELx_VNCR));</div><div class='add'>+</div><div class='add'>+	if (kvm_vcpu_abt_issea(vcpu))</div><div class='add'>+		return kvm_handle_guest_sea(vcpu);</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_permission_fault(esr)) {</div><div class='add'>+		inject_vncr_perm(vcpu);</div><div class='add'>+	} else if (esr_fsc_is_translation_fault(esr)) {</div><div class='add'>+		bool valid, is_gmem = false;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		scoped_guard(read_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock)</div><div class='add'>+			valid = kvm_vncr_tlb_lookup(vcpu);</div><div class='add'>+</div><div class='add'>+		if (!valid)</div><div class='add'>+			ret = kvm_translate_vncr(vcpu, &amp;is_gmem);</div><div class='add'>+		else</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+</div><div class='add'>+		switch (ret) {</div><div class='add'>+		case -EAGAIN:</div><div class='add'>+			/* Let's try again... */</div><div class='add'>+			break;</div><div class='add'>+		case -ENOMEM:</div><div class='add'>+			/*</div><div class='add'>+			 * For guest_memfd, this indicates that it failed to</div><div class='add'>+			 * create a folio to back the memory. Inform userspace.</div><div class='add'>+			 */</div><div class='add'>+			if (is_gmem)</div><div class='add'>+				return 0;</div><div class='add'>+			/* Otherwise, let's try again... */</div><div class='add'>+			break;</div><div class='add'>+		case -EFAULT:</div><div class='add'>+		case -EIO:</div><div class='add'>+		case -EHWPOISON:</div><div class='add'>+			if (is_gmem)</div><div class='add'>+				return 0;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case -EINVAL:</div><div class='add'>+		case -ENOENT:</div><div class='add'>+		case -EACCES:</div><div class='add'>+			/*</div><div class='add'>+			 * Translation failed, inject the corresponding</div><div class='add'>+			 * exception back to EL2.</div><div class='add'>+			 */</div><div class='add'>+			BUG_ON(!vt-&gt;wr.failed);</div><div class='add'>+</div><div class='add'>+			esr &amp;= ~ESR_ELx_FSC;</div><div class='add'>+			esr |= FIELD_PREP(ESR_ELx_FSC, vt-&gt;wr.fst);</div><div class='add'>+</div><div class='add'>+			kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+			break;</div><div class='add'>+		case -EPERM:</div><div class='add'>+			/* Hack to deal with POE until we get kernel support */</div><div class='add'>+			inject_vncr_perm(vcpu);</div><div class='add'>+			break;</div><div class='add'>+		case 0:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		WARN_ONCE(1, "Unhandled VNCR abort, ESR=%llx\n", esr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_map_l1_vncr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	pgprot_t prot;</div><div class='add'>+</div><div class='add'>+	guard(preempt)();</div><div class='add'>+	guard(read_lock)(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The request to map VNCR may have raced against some other</div><div class='add'>+	 * event, such as an interrupt, and may not be valid anymore.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check that the pseudo-TLB is valid and that VNCR_EL2 still</div><div class='add'>+	 * contains the expected value. If it doesn't, we simply bail out</div><div class='add'>+	 * without a mapping -- a transformed MSR/MRS will generate the</div><div class='add'>+	 * fault and allows us to populate the pseudo-TLB.</div><div class='add'>+	 */</div><div class='add'>+	if (!vt-&gt;valid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (read_vncr_el2(vcpu) != vt-&gt;gva)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.nG) {</div><div class='add'>+		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+		u64 ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+		u16 asid;</div><div class='add'>+</div><div class='add'>+		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			asid &amp;= GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+		if (asid != vt-&gt;wr.asid)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vt-&gt;cpu = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.pw &amp;&amp; vt-&gt;wr.pr)</div><div class='add'>+		prot = PAGE_KERNEL;</div><div class='add'>+	else if (vt-&gt;wr.pr)</div><div class='add'>+		prot = PAGE_KERNEL_RO;</div><div class='add'>+	else</div><div class='add'>+		prot = PAGE_NONE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We can't map write-only (or no permission at all) in the kernel,</div><div class='add'>+	 * but the guest can do it if using POE, so we'll have to turn a</div><div class='add'>+	 * translation fault into a permission fault at runtime.</div><div class='add'>+	 * FIXME: WO doesn't work at all, need POE support in the kernel.</div><div class='add'>+	 */</div><div class='add'>+	if (pgprot_val(prot) != pgprot_val(PAGE_NONE)) {</div><div class='add'>+		__set_fixmap(vncr_fixmap(vt-&gt;cpu), vt-&gt;hpa, prot);</div><div class='add'>+		host_data_set_flag(L1_VNCR_MAPPED);</div><div class='add'>+		atomic_inc(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define has_tgran_2(__r, __sz)						\</div><div class='add'>+	({								\</div><div class='add'>+		u64 _s1, _s2, _mmfr0 = __r;				\</div><div class='add'>+									\</div><div class='add'>+		_s2 = SYS_FIELD_GET(ID_AA64MMFR0_EL1,			\</div><div class='add'>+				    TGRAN##__sz##_2, _mmfr0);		\</div><div class='add'>+									\</div><div class='add'>+		_s1 = SYS_FIELD_GET(ID_AA64MMFR0_EL1,			\</div><div class='add'>+				    TGRAN##__sz, _mmfr0);		\</div><div class='add'>+									\</div><div class='add'>+		((_s2 != ID_AA64MMFR0_EL1_TGRAN##__sz##_2_NI &amp;&amp;		\</div><div class='add'>+		  _s2 != ID_AA64MMFR0_EL1_TGRAN##__sz##_2_TGRAN##__sz) || \</div><div class='add'>+		 (_s2 == ID_AA64MMFR0_EL1_TGRAN##__sz##_2_TGRAN##__sz &amp;&amp; \</div><div class='add'>+		  _s1 != ID_AA64MMFR0_EL1_TGRAN##__sz##_NI));		\</div><div class='add'>+	})</div><div class='add'>+/*</div><div class='ctx'>  * Our emulated CPU doesn't support all the possible features. For the</div><div class='ctx'>  * sake of simplicity (and probably mental sanity), wipe out a number</div><div class='ctx'>  * of feature bits we don't intend to support for the time being.</div><div class='ctx'>  * This list should get updated as new features get added to the NV</div><div class='ctx'>  * support, and new extension to the architecture.</div><div class='ctx'>  */</div><div class='del'>-static void limit_nv_id_regs(struct kvm *kvm)</div><div class='add'>+u64 limit_nv_id_reg(struct kvm *kvm, u32 reg, u64 val)</div><div class='ctx'> {</div><div class='del'>-	u64 val, tmp;</div><div class='del'>-</div><div class='del'>-	/* Support everything but TME */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64ISAR0_EL1);</div><div class='del'>-	val &amp;= ~NV_FTR(ISAR0, TME);</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64ISAR0_EL1, val);</div><div class='del'>-</div><div class='del'>-	/* Support everything but Spec Invalidation and LS64 */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64ISAR1_EL1);</div><div class='del'>-	val &amp;= ~(NV_FTR(ISAR1, LS64)	|</div><div class='del'>-		 NV_FTR(ISAR1, SPECRES));</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64ISAR1_EL1, val);</div><div class='del'>-</div><div class='del'>-	/* No AMU, MPAM, S-EL2, or RAS */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1);</div><div class='del'>-	val &amp;= ~(GENMASK_ULL(55, 52)	|</div><div class='del'>-		 NV_FTR(PFR0, AMU)	|</div><div class='del'>-		 NV_FTR(PFR0, MPAM)	|</div><div class='del'>-		 NV_FTR(PFR0, SEL2)	|</div><div class='del'>-		 NV_FTR(PFR0, RAS)	|</div><div class='del'>-		 NV_FTR(PFR0, EL3)	|</div><div class='del'>-		 NV_FTR(PFR0, EL2)	|</div><div class='del'>-		 NV_FTR(PFR0, EL1));</div><div class='del'>-	/* 64bit EL1/EL2/EL3 only */</div><div class='del'>-	val |= FIELD_PREP(NV_FTR(PFR0, EL1), 0b0001);</div><div class='del'>-	val |= FIELD_PREP(NV_FTR(PFR0, EL2), 0b0001);</div><div class='del'>-	val |= FIELD_PREP(NV_FTR(PFR0, EL3), 0b0001);</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1, val);</div><div class='del'>-</div><div class='del'>-	/* Only support BTI, SSBS, CSV2_frac */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR1_EL1);</div><div class='del'>-	val &amp;= (NV_FTR(PFR1, BT)	|</div><div class='del'>-		NV_FTR(PFR1, SSBS)	|</div><div class='del'>-		NV_FTR(PFR1, CSV2_frac));</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR1_EL1, val);</div><div class='del'>-</div><div class='del'>-	/* Hide ECV, ExS, Secure Memory */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64MMFR0_EL1);</div><div class='del'>-	val &amp;= ~(NV_FTR(MMFR0, ECV)		|</div><div class='del'>-		 NV_FTR(MMFR0, EXS)		|</div><div class='del'>-		 NV_FTR(MMFR0, TGRAN4_2)	|</div><div class='del'>-		 NV_FTR(MMFR0, TGRAN16_2)	|</div><div class='del'>-		 NV_FTR(MMFR0, TGRAN64_2)	|</div><div class='del'>-		 NV_FTR(MMFR0, SNSMEM));</div><div class='del'>-</div><div class='del'>-	/* Disallow unsupported S2 page sizes */</div><div class='del'>-	switch (PAGE_SIZE) {</div><div class='del'>-	case SZ_64K:</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, TGRAN16_2), 0b0001);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SZ_16K:</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, TGRAN4_2), 0b0001);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SZ_4K:</div><div class='del'>-		/* Support everything */</div><div class='add'>+	u64 orig_val = val;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case SYS_ID_AA64ISAR0_EL1:</div><div class='add'>+		/* Support everything but TME */</div><div class='add'>+		val &amp;= ~ID_AA64ISAR0_EL1_TME;</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * Since we can't support a guest S2 page size smaller than</div><div class='del'>-	 * the host's own page size (due to KVM only populating its</div><div class='del'>-	 * own S2 using the kernel's page size), advertise the</div><div class='del'>-	 * limitation using FEAT_GTG.</div><div class='del'>-	 */</div><div class='del'>-	switch (PAGE_SIZE) {</div><div class='del'>-	case SZ_4K:</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, TGRAN4_2), 0b0010);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SZ_16K:</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, TGRAN16_2), 0b0010);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SZ_64K:</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, TGRAN64_2), 0b0010);</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64ISAR1_EL1:</div><div class='add'>+		/* Support everything but LS64 and Spec Invalidation */</div><div class='add'>+		val &amp;= ~(ID_AA64ISAR1_EL1_LS64	|</div><div class='add'>+			 ID_AA64ISAR1_EL1_SPECRES);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64PFR0_EL1:</div><div class='add'>+		/* No RME, AMU, MPAM, or S-EL2 */</div><div class='add'>+		val &amp;= ~(ID_AA64PFR0_EL1_RME	|</div><div class='add'>+			 ID_AA64PFR0_EL1_AMU	|</div><div class='add'>+			 ID_AA64PFR0_EL1_MPAM	|</div><div class='add'>+			 ID_AA64PFR0_EL1_SEL2	|</div><div class='add'>+			 ID_AA64PFR0_EL1_EL3	|</div><div class='add'>+			 ID_AA64PFR0_EL1_EL2	|</div><div class='add'>+			 ID_AA64PFR0_EL1_EL1	|</div><div class='add'>+			 ID_AA64PFR0_EL1_EL0);</div><div class='add'>+		/* 64bit only at any EL */</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL0, IMP);</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL1, IMP);</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL2, IMP);</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, EL3, IMP);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64PFR1_EL1:</div><div class='add'>+		/* Only support BTI, SSBS, CSV2_frac */</div><div class='add'>+		val &amp;= ~(ID_AA64PFR1_EL1_PFAR		|</div><div class='add'>+			 ID_AA64PFR1_EL1_MTEX		|</div><div class='add'>+			 ID_AA64PFR1_EL1_THE		|</div><div class='add'>+			 ID_AA64PFR1_EL1_GCS		|</div><div class='add'>+			 ID_AA64PFR1_EL1_MTE_frac	|</div><div class='add'>+			 ID_AA64PFR1_EL1_NMI		|</div><div class='add'>+			 ID_AA64PFR1_EL1_SME		|</div><div class='add'>+			 ID_AA64PFR1_EL1_RES0		|</div><div class='add'>+			 ID_AA64PFR1_EL1_MPAM_frac	|</div><div class='add'>+			 ID_AA64PFR1_EL1_MTE);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64MMFR0_EL1:</div><div class='add'>+		/* Hide ExS, Secure Memory */</div><div class='add'>+		val &amp;= ~(ID_AA64MMFR0_EL1_EXS		|</div><div class='add'>+			 ID_AA64MMFR0_EL1_TGRAN4_2	|</div><div class='add'>+			 ID_AA64MMFR0_EL1_TGRAN16_2	|</div><div class='add'>+			 ID_AA64MMFR0_EL1_TGRAN64_2	|</div><div class='add'>+			 ID_AA64MMFR0_EL1_SNSMEM);</div><div class='add'>+</div><div class='add'>+		/* Hide CNTPOFF if present */</div><div class='add'>+		val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64MMFR0_EL1, ECV, IMP);</div><div class='add'>+</div><div class='add'>+		/* Disallow unsupported S2 page sizes */</div><div class='add'>+		switch (PAGE_SIZE) {</div><div class='add'>+		case SZ_64K:</div><div class='add'>+			val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR0_EL1, TGRAN16_2, NI);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case SZ_16K:</div><div class='add'>+			val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR0_EL1, TGRAN4_2, NI);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case SZ_4K:</div><div class='add'>+			/* Support everything */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Since we can't support a guest S2 page size smaller</div><div class='add'>+		 * than the host's own page size (due to KVM only</div><div class='add'>+		 * populating its own S2 using the kernel's page</div><div class='add'>+		 * size), advertise the limitation using FEAT_GTG.</div><div class='add'>+		 */</div><div class='add'>+		switch (PAGE_SIZE) {</div><div class='add'>+		case SZ_4K:</div><div class='add'>+			if (has_tgran_2(orig_val, 4))</div><div class='add'>+				val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR0_EL1, TGRAN4_2, IMP);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case SZ_16K:</div><div class='add'>+			if (has_tgran_2(orig_val, 16))</div><div class='add'>+				val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR0_EL1, TGRAN16_2, IMP);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case SZ_64K:</div><div class='add'>+			if (has_tgran_2(orig_val, 64))</div><div class='add'>+				val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR0_EL1, TGRAN64_2, IMP);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Cap PARange to 48bits */</div><div class='add'>+		val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64MMFR0_EL1, PARANGE, 48);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64MMFR1_EL1:</div><div class='add'>+		val &amp;= ~(ID_AA64MMFR1_EL1_CMOW		|</div><div class='add'>+			 ID_AA64MMFR1_EL1_nTLBPA	|</div><div class='add'>+			 ID_AA64MMFR1_EL1_ETS		|</div><div class='add'>+			 ID_AA64MMFR1_EL1_XNX		|</div><div class='add'>+			 ID_AA64MMFR1_EL1_HAFDBS);</div><div class='add'>+		/* FEAT_E2H0 implies no VHE */</div><div class='add'>+		if (test_bit(KVM_ARM_VCPU_HAS_EL2_E2H0, kvm-&gt;arch.vcpu_features))</div><div class='add'>+			val &amp;= ~ID_AA64MMFR1_EL1_VH;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64MMFR2_EL1:</div><div class='add'>+		val &amp;= ~(ID_AA64MMFR2_EL1_BBM	|</div><div class='add'>+			 ID_AA64MMFR2_EL1_TTL	|</div><div class='add'>+			 GENMASK_ULL(47, 44)	|</div><div class='add'>+			 ID_AA64MMFR2_EL1_ST	|</div><div class='add'>+			 ID_AA64MMFR2_EL1_CCIDX	|</div><div class='add'>+			 ID_AA64MMFR2_EL1_VARange);</div><div class='add'>+</div><div class='add'>+		/* Force TTL support */</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR2_EL1, TTL, IMP);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64MMFR4_EL1:</div><div class='add'>+		/*</div><div class='add'>+		 * You get EITHER</div><div class='add'>+		 *</div><div class='add'>+		 * - FEAT_VHE without FEAT_E2H0</div><div class='add'>+		 * - FEAT_NV limited to FEAT_NV2</div><div class='add'>+		 * - HCR_EL2.NV1 being RES0</div><div class='add'>+		 *</div><div class='add'>+		 * OR</div><div class='add'>+		 *</div><div class='add'>+		 * - FEAT_E2H0 without FEAT_VHE nor FEAT_NV</div><div class='add'>+		 *</div><div class='add'>+		 * Life is too short for anything else.</div><div class='add'>+		 */</div><div class='add'>+		if (test_bit(KVM_ARM_VCPU_HAS_EL2_E2H0, kvm-&gt;arch.vcpu_features)) {</div><div class='add'>+			val = 0;</div><div class='add'>+		} else {</div><div class='add'>+			val = SYS_FIELD_PREP_ENUM(ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY);</div><div class='add'>+			val |= SYS_FIELD_PREP_ENUM(ID_AA64MMFR4_EL1, E2H0, NI_NV1);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_ID_AA64DFR0_EL1:</div><div class='add'>+		/* Only limited support for PMU, Debug, BPs, WPs, and HPMN0 */</div><div class='add'>+		val &amp;= ~(ID_AA64DFR0_EL1_ExtTrcBuff	|</div><div class='add'>+			 ID_AA64DFR0_EL1_BRBE		|</div><div class='add'>+			 ID_AA64DFR0_EL1_MTPMU		|</div><div class='add'>+			 ID_AA64DFR0_EL1_TraceBuffer	|</div><div class='add'>+			 ID_AA64DFR0_EL1_TraceFilt	|</div><div class='add'>+			 ID_AA64DFR0_EL1_PMSVer		|</div><div class='add'>+			 ID_AA64DFR0_EL1_CTX_CMPs	|</div><div class='add'>+			 ID_AA64DFR0_EL1_SEBEP		|</div><div class='add'>+			 ID_AA64DFR0_EL1_PMSS		|</div><div class='add'>+			 ID_AA64DFR0_EL1_TraceVer);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * FEAT_Debugv8p9 requires support for extended breakpoints /</div><div class='add'>+		 * watchpoints.</div><div class='add'>+		 */</div><div class='add'>+		val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64DFR0_EL1, DebugVer, V8P8);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	/* Cap PARange to 48bits */</div><div class='del'>-	tmp = FIELD_GET(NV_FTR(MMFR0, PARANGE), val);</div><div class='del'>-	if (tmp &gt; 0b0101) {</div><div class='del'>-		val &amp;= ~NV_FTR(MMFR0, PARANGE);</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR0, PARANGE), 0b0101);</div><div class='del'>-	}</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64MMFR0_EL1, val);</div><div class='del'>-</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64MMFR1_EL1);</div><div class='del'>-	val &amp;= (NV_FTR(MMFR1, HCX)	|</div><div class='del'>-		NV_FTR(MMFR1, PAN)	|</div><div class='del'>-		NV_FTR(MMFR1, LO)	|</div><div class='del'>-		NV_FTR(MMFR1, HPDS)	|</div><div class='del'>-		NV_FTR(MMFR1, VH)	|</div><div class='del'>-		NV_FTR(MMFR1, VMIDBits));</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64MMFR1_EL1, val);</div><div class='del'>-</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64MMFR2_EL1);</div><div class='del'>-	val &amp;= ~(NV_FTR(MMFR2, BBM)	|</div><div class='del'>-		 NV_FTR(MMFR2, TTL)	|</div><div class='del'>-		 GENMASK_ULL(47, 44)	|</div><div class='del'>-		 NV_FTR(MMFR2, ST)	|</div><div class='del'>-		 NV_FTR(MMFR2, CCIDX)	|</div><div class='del'>-		 NV_FTR(MMFR2, VARange));</div><div class='del'>-</div><div class='del'>-	/* Force TTL support */</div><div class='del'>-	val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001);</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64MMFR2_EL1, val);</div><div class='del'>-</div><div class='del'>-	val = 0;</div><div class='del'>-	if (!cpus_have_final_cap(ARM64_HAS_HCR_NV1))</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(MMFR4, E2H0),</div><div class='del'>-				  ID_AA64MMFR4_EL1_E2H0_NI_NV1);</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64MMFR4_EL1, val);</div><div class='del'>-</div><div class='del'>-	/* Only limited support for PMU, Debug, BPs and WPs */</div><div class='del'>-	val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64DFR0_EL1);</div><div class='del'>-	val &amp;= (NV_FTR(DFR0, PMUVer)	|</div><div class='del'>-		NV_FTR(DFR0, WRPs)	|</div><div class='del'>-		NV_FTR(DFR0, BRPs)	|</div><div class='del'>-		NV_FTR(DFR0, DebugVer));</div><div class='del'>-</div><div class='del'>-	/* Cap Debug to ARMv8.1 */</div><div class='del'>-	tmp = FIELD_GET(NV_FTR(DFR0, DebugVer), val);</div><div class='del'>-	if (tmp &gt; 0b0111) {</div><div class='del'>-		val &amp;= ~NV_FTR(DFR0, DebugVer);</div><div class='del'>-		val |= FIELD_PREP(NV_FTR(DFR0, DebugVer), 0b0111);</div><div class='del'>-	}</div><div class='del'>-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64DFR0_EL1, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u64 kvm_vcpu_sanitise_vncr_reg(const struct kvm_vcpu *vcpu, enum vcpu_sysreg sr)</div><div class='add'>+u64 kvm_vcpu_apply_reg_masks(const struct kvm_vcpu *vcpu,</div><div class='add'>+			     enum vcpu_sysreg sr, u64 v)</div><div class='ctx'> {</div><div class='del'>-	u64 v = ctxt_sys_reg(&amp;vcpu-&gt;arch.ctxt, sr);</div><div class='ctx'> 	struct kvm_sysreg_masks *masks;</div><div class='ctx'> </div><div class='ctx'> 	masks = vcpu-&gt;kvm-&gt;arch.sysreg_masks;</div><div class='ctx'> </div><div class='ctx'> 	if (masks) {</div><div class='del'>-		sr -= __VNCR_START__;</div><div class='add'>+		sr -= __SANITISED_REG_START__;</div><div class='ctx'> </div><div class='ctx'> 		v &amp;= ~masks-&gt;mask[sr].res0;</div><div class='ctx'> 		v |= masks-&gt;mask[sr].res1;</div><div class='hunk'>@@ -925,30 +1638,33 @@ u64 kvm_vcpu_sanitise_vncr_reg(const struct kvm_vcpu *vcpu, enum vcpu_sysreg sr)</div><div class='ctx'> 	return v;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)</div><div class='add'>+static __always_inline void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)</div><div class='ctx'> {</div><div class='del'>-	int i = sr - __VNCR_START__;</div><div class='add'>+	int i = sr - __SANITISED_REG_START__;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(!__builtin_constant_p(sr));</div><div class='add'>+	BUILD_BUG_ON(sr &lt; __SANITISED_REG_START__);</div><div class='add'>+	BUILD_BUG_ON(sr &gt;= NR_SYS_REGS);</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.sysreg_masks-&gt;mask[i].res0 = res0;</div><div class='ctx'> 	kvm-&gt;arch.sysreg_masks-&gt;mask[i].res1 = res1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_init_nv_sysregs(struct kvm *kvm)</div><div class='add'>+int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='ctx'> 	u64 res0, res1;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (kvm-&gt;arch.sysreg_masks)</div><div class='del'>-		return 0;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.sysreg_masks = kzalloc(sizeof(*(kvm-&gt;arch.sysreg_masks)),</div><div class='ctx'> 					 GFP_KERNEL_ACCOUNT);</div><div class='ctx'> 	if (!kvm-&gt;arch.sysreg_masks)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	limit_nv_id_regs(kvm);</div><div class='del'>-</div><div class='ctx'> 	/* VTTBR_EL2 */</div><div class='ctx'> 	res0 = res1 = 0;</div><div class='ctx'> 	if (!kvm_has_feat_enum(kvm, ID_AA64MMFR1_EL1, VMIDBits, 16))</div><div class='hunk'>@@ -968,219 +1684,188 @@ int kvm_init_nv_sysregs(struct kvm *kvm)</div><div class='ctx'> 	set_sysreg_masks(kvm, VMPIDR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HCR_EL2 */</div><div class='del'>-	res0 = BIT(48);</div><div class='del'>-	res1 = HCR_RW;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, TWED, IMP))</div><div class='del'>-		res0 |= GENMASK(63, 59);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, MTE, MTE2))</div><div class='del'>-		res0 |= (HCR_TID5 | HCR_DCT | HCR_ATA);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, EVT, TTLBxS))</div><div class='del'>-		res0 |= (HCR_TTLBIS | HCR_TTLBOS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, CSV2, CSV2_2) &amp;&amp;</div><div class='del'>-	    !kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2))</div><div class='del'>-		res0 |= HCR_ENSCXT;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, EVT, IMP))</div><div class='del'>-		res0 |= (HCR_TOCU | HCR_TICAB | HCR_TID4);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, V1P1))</div><div class='del'>-		res0 |= HCR_AMVOFFEN;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1))</div><div class='del'>-		res0 |= HCR_FIEN;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, FWB, IMP))</div><div class='del'>-		res0 |= HCR_FWB;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, NV2))</div><div class='del'>-		res0 |= HCR_NV2;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, IMP))</div><div class='del'>-		res0 |= (HCR_AT | HCR_NV1 | HCR_NV);</div><div class='del'>-	if (!(__vcpu_has_feature(&amp;kvm-&gt;arch, KVM_ARM_VCPU_PTRAUTH_ADDRESS) &amp;&amp;</div><div class='del'>-	      __vcpu_has_feature(&amp;kvm-&gt;arch, KVM_ARM_VCPU_PTRAUTH_GENERIC)))</div><div class='del'>-		res0 |= (HCR_API | HCR_APK);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TME, IMP))</div><div class='del'>-		res0 |= BIT(39);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP))</div><div class='del'>-		res0 |= (HCR_TEA | HCR_TERR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))</div><div class='del'>-		res0 |= HCR_TLOR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, E2H0, IMP))</div><div class='del'>-		res1 |= HCR_E2H;</div><div class='add'>+	get_reg_fixed_bits(kvm, HCR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HCR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HCRX_EL2 */</div><div class='del'>-	res0 = HCRX_EL2_RES0;</div><div class='del'>-	res1 = HCRX_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR3_EL1, PACM, TRIVIAL_IMP))</div><div class='del'>-		res0 |= HCRX_EL2_PACMEn;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR2_EL1, FPMR, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_EnFPM;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_GCSEn;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, SYSREG_128, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_EnIDCP128;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ADERR, DEV_ASYNC))</div><div class='del'>-		res0 |= (HCRX_EL2_EnSDERR | HCRX_EL2_EnSNERR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, DF2, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_TMEA;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, D128, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_D128En;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, THE, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_PTTWI;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SCTLRX, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_SCTLR2En;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, TCRX, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_TCR2En;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_MSCEn | HCRX_EL2_MCE2);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, CMOW, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_CMOW;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, NMI, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_VFNMI | HCRX_EL2_VINMI | HCRX_EL2_TALLINT);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP) ||</div><div class='del'>-	    !(read_sysreg_s(SYS_SMIDR_EL1) &amp; SMIDR_EL1_SMPS))</div><div class='del'>-		res0 |= HCRX_EL2_SMPME;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_FGTnXS | HCRX_EL2_FnXS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))</div><div class='del'>-		res0 |= HCRX_EL2_EnASR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))</div><div class='del'>-		res0 |= HCRX_EL2_EnALS;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))</div><div class='del'>-		res0 |= HCRX_EL2_EnAS0;</div><div class='add'>+	get_reg_fixed_bits(kvm, HCRX_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HCRX_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HFG[RW]TR_EL2 */</div><div class='del'>-	res0 = res1 = 0;</div><div class='del'>-	if (!(__vcpu_has_feature(&amp;kvm-&gt;arch, KVM_ARM_VCPU_PTRAUTH_ADDRESS) &amp;&amp;</div><div class='del'>-	      __vcpu_has_feature(&amp;kvm-&gt;arch, KVM_ARM_VCPU_PTRAUTH_GENERIC)))</div><div class='del'>-		res0 |= (HFGxTR_EL2_APDAKey | HFGxTR_EL2_APDBKey |</div><div class='del'>-			 HFGxTR_EL2_APGAKey | HFGxTR_EL2_APIAKey |</div><div class='del'>-			 HFGxTR_EL2_APIBKey);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_LORC_EL1 | HFGxTR_EL2_LOREA_EL1 |</div><div class='del'>-			 HFGxTR_EL2_LORID_EL1 | HFGxTR_EL2_LORN_EL1 |</div><div class='del'>-			 HFGxTR_EL2_LORSA_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, CSV2, CSV2_2) &amp;&amp;</div><div class='del'>-	    !kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2))</div><div class='del'>-		res0 |= (HFGxTR_EL2_SCXTNUM_EL1 | HFGxTR_EL2_SCXTNUM_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, GIC, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_ICC_IGRPENn_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_ERRIDR_EL1 | HFGxTR_EL2_ERRSELR_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXFR_EL1 | HFGxTR_EL2_ERXCTLR_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXSTATUS_EL1 | HFGxTR_EL2_ERXMISCn_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXPFGF_EL1 | HFGxTR_EL2_ERXPFGCTL_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXPFGCDN_EL1 | HFGxTR_EL2_ERXADDR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))</div><div class='del'>-		res0 |= HFGxTR_EL2_nACCDATA_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nGCS_EL0 | HFGxTR_EL2_nGCS_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nSMPRI_EL1 | HFGxTR_EL2_nTPIDR2_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, THE, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_nRCWMASK_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1PIE, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nPIRE0_EL1 | HFGxTR_EL2_nPIR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nPOR_EL0 | HFGxTR_EL2_nPOR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S2POE, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_nS2POR_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, AIE, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nMAIR2_EL1 | HFGxTR_EL2_nAMAIR2_EL1);</div><div class='del'>-	set_sysreg_masks(kvm, HFGRTR_EL2, res0 | __HFGRTR_EL2_RES0, res1);</div><div class='del'>-	set_sysreg_masks(kvm, HFGWTR_EL2, res0 | __HFGWTR_EL2_RES0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGRTR_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGWTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGWTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HDFG[RW]TR_EL2 */</div><div class='del'>-	res0 = res1 = 0;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DoubleLock, IMP))</div><div class='del'>-		res0 |= HDFGRTR_EL2_OSDLR_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_PMEVCNTRn_EL0 | HDFGRTR_EL2_PMEVTYPERn_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCCFILTR_EL0 | HDFGRTR_EL2_PMCCNTR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCNTEN | HDFGRTR_EL2_PMINTEN |</div><div class='del'>-			 HDFGRTR_EL2_PMOVS | HDFGRTR_EL2_PMSELR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMMIR_EL1 | HDFGRTR_EL2_PMUSERENR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCEIDn_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_PMBLIMITR_EL1 | HDFGRTR_EL2_PMBPTR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMBSR_EL1 | HDFGRTR_EL2_PMSCR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSEVFR_EL1 | HDFGRTR_EL2_PMSFCR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSICR_EL1 | HDFGRTR_EL2_PMSIDR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSIRR_EL1 | HDFGRTR_EL2_PMSLATFR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMBIDR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_TRC | HDFGRTR_EL2_TRCAUTHSTATUS |</div><div class='del'>-			 HDFGRTR_EL2_TRCAUXCTLR | HDFGRTR_EL2_TRCCLAIM |</div><div class='del'>-			 HDFGRTR_EL2_TRCCNTVRn | HDFGRTR_EL2_TRCID |</div><div class='del'>-			 HDFGRTR_EL2_TRCIMSPECn | HDFGRTR_EL2_TRCOSLSR |</div><div class='del'>-			 HDFGRTR_EL2_TRCPRGCTLR | HDFGRTR_EL2_TRCSEQSTR |</div><div class='del'>-			 HDFGRTR_EL2_TRCSSCSRn | HDFGRTR_EL2_TRCSTATR |</div><div class='del'>-			 HDFGRTR_EL2_TRCVICTLR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_TRBBASER_EL1 | HDFGRTR_EL2_TRBIDR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBLIMITR_EL1 | HDFGRTR_EL2_TRBMAR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBPTR_EL1 | HDFGRTR_EL2_TRBSR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBTRG_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, BRBE, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_nBRBIDR | HDFGRTR_EL2_nBRBCTL |</div><div class='del'>-			 HDFGRTR_EL2_nBRBDATA);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P2))</div><div class='del'>-		res0 |= HDFGRTR_EL2_nPMSNEVFR_EL1;</div><div class='del'>-	set_sysreg_masks(kvm, HDFGRTR_EL2, res0 | HDFGRTR_EL2_RES0, res1);</div><div class='del'>-</div><div class='del'>-	/* Reuse the bits from the read-side and add the write-specific stuff */</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP))</div><div class='del'>-		res0 |= (HDFGWTR_EL2_PMCR_EL0 | HDFGWTR_EL2_PMSWINC_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceVer, IMP))</div><div class='del'>-		res0 |= HDFGWTR_EL2_TRCOSLAR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceFilt, IMP))</div><div class='del'>-		res0 |= HDFGWTR_EL2_TRFCR_EL1;</div><div class='del'>-	set_sysreg_masks(kvm, HFGWTR_EL2, res0 | HDFGWTR_EL2_RES0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGRTR_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGWTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGWTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HFGITR_EL2 */</div><div class='del'>-	res0 = HFGITR_EL2_RES0;</div><div class='del'>-	res1 = HFGITR_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, DPB, DPB2))</div><div class='del'>-		res0 |= HFGITR_EL2_DCCVADP;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, PAN, PAN2))</div><div class='del'>-		res0 |= (HFGITR_EL2_ATS1E1RP | HFGITR_EL2_ATS1E1WP);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))</div><div class='del'>-		res0 |= (HFGITR_EL2_TLBIRVAALE1OS | HFGITR_EL2_TLBIRVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1OS | HFGITR_EL2_TLBIRVAE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAALE1OS | HFGITR_EL2_TLBIVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAAE1OS | HFGITR_EL2_TLBIASIDE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAE1OS | HFGITR_EL2_TLBIVMALLE1OS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))</div><div class='del'>-		res0 |= (HFGITR_EL2_TLBIRVAALE1 | HFGITR_EL2_TLBIRVALE1 |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1 | HFGITR_EL2_TLBIRVAE1 |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAALE1IS | HFGITR_EL2_TLBIRVALE1IS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1IS | HFGITR_EL2_TLBIRVAE1IS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAALE1OS | HFGITR_EL2_TLBIRVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1OS | HFGITR_EL2_TLBIRVAE1OS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, SPECRES, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_CFPRCTX | HFGITR_EL2_DVPRCTX |</div><div class='del'>-			 HFGITR_EL2_CPPRCTX);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, BRBE, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_nBRBINJ | HFGITR_EL2_nBRBIALL);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_nGCSPUSHM_EL1 | HFGITR_EL2_nGCSSTR_EL1 |</div><div class='del'>-			 HFGITR_EL2_nGCSEPP);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, SPECRES, COSP_RCTX))</div><div class='del'>-		res0 |= HFGITR_EL2_COSPRCTX;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, ATS1A, IMP))</div><div class='del'>-		res0 |= HFGITR_EL2_ATS1E1A;</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGITR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HFGITR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HAFGRTR_EL2 - not a lot to see here */</div><div class='del'>-	res0 = HAFGRTR_EL2_RES0;</div><div class='del'>-	res1 = HAFGRTR_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, V1P1))</div><div class='del'>-		res0 |= ~(res0 | res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HAFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HAFGRTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='add'>+	/* HFG[RW]TR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGRTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGRTR2_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGWTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGWTR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* HDFG[RW]TR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGRTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGRTR2_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGWTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGWTR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* HFGITR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGITR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGITR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* TCR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, TCR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, TCR2_EL2, res0, res1);</div><div class='add'>+</div><div class='ctx'> 	/* SCTLR_EL1 */</div><div class='del'>-	res0 = SCTLR_EL1_RES0;</div><div class='del'>-	res1 = SCTLR_EL1_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, PAN, PAN3))</div><div class='del'>-		res0 |= SCTLR_EL1_EPAN;</div><div class='add'>+	get_reg_fixed_bits(kvm, SCTLR_EL1, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, SCTLR_EL1, res0, res1);</div><div class='ctx'> </div><div class='add'>+	/* SCTLR2_ELx */</div><div class='add'>+	get_reg_fixed_bits(kvm, SCTLR2_EL1, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, SCTLR2_EL1, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, SCTLR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, SCTLR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* MDCR_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, MDCR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, MDCR_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* CNTHCTL_EL2 */</div><div class='add'>+	res0 = GENMASK(63, 20);</div><div class='add'>+	res1 = 0;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RME, IMP))</div><div class='add'>+		res0 |= CNTHCTL_CNTPMASK | CNTHCTL_CNTVMASK;</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, ECV, CNTPOFF)) {</div><div class='add'>+		res0 |= CNTHCTL_ECV;</div><div class='add'>+		if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, ECV, IMP))</div><div class='add'>+			res0 |= (CNTHCTL_EL1TVT | CNTHCTL_EL1TVCT |</div><div class='add'>+				 CNTHCTL_EL1NVPCT | CNTHCTL_EL1NVVCT);</div><div class='add'>+	}</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, VH, IMP))</div><div class='add'>+		res0 |= GENMASK(11, 8);</div><div class='add'>+	set_sysreg_masks(kvm, CNTHCTL_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* ICH_HCR_EL2 */</div><div class='add'>+	res0 = ICH_HCR_EL2_RES0;</div><div class='add'>+	res1 = ICH_HCR_EL2_RES1;</div><div class='add'>+	if (!(kvm_vgic_global_state.ich_vtr_el2 &amp; ICH_VTR_EL2_TDS))</div><div class='add'>+		res0 |= ICH_HCR_EL2_TDIR;</div><div class='add'>+	/* No GICv4 is presented to the guest */</div><div class='add'>+	res0 |= ICH_HCR_EL2_DVIM | ICH_HCR_EL2_vSGIEOICount;</div><div class='add'>+	set_sysreg_masks(kvm, ICH_HCR_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* VNCR_EL2 */</div><div class='add'>+	set_sysreg_masks(kvm, VNCR_EL2, VNCR_EL2_RES0, VNCR_EL2_RES1);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	for (enum vcpu_sysreg sr = __SANITISED_REG_START__; sr &lt; NR_SYS_REGS; sr++)</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, sr, |=, 0);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void check_nested_vcpu_requests(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (kvm_check_request(KVM_REQ_NESTED_S2_UNMAP, vcpu)) {</div><div class='add'>+		struct kvm_s2_mmu *mmu = vcpu-&gt;arch.hw_mmu;</div><div class='add'>+</div><div class='add'>+		write_lock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+		if (mmu-&gt;pending_unmap) {</div><div class='add'>+			kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), true);</div><div class='add'>+			mmu-&gt;pending_unmap = false;</div><div class='add'>+		}</div><div class='add'>+		write_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kvm_check_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu))</div><div class='add'>+		kvm_map_l1_vncr(vcpu);</div><div class='add'>+</div><div class='add'>+	/* Must be last, as may switch context! */</div><div class='add'>+	if (kvm_check_request(KVM_REQ_GUEST_HYP_IRQ_PENDING, vcpu))</div><div class='add'>+		kvm_inject_nested_irq(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * One of the many architectural bugs in FEAT_NV2 is that the guest hypervisor</div><div class='add'>+ * can write to HCR_EL2 behind our back, potentially changing the exception</div><div class='add'>+ * routing / masking for even the host context.</div><div class='add'>+ *</div><div class='add'>+ * What follows is some slop to (1) react to exception routing / masking and (2)</div><div class='add'>+ * preserve the pending SError state across translation regimes.</div><div class='add'>+ */</div><div class='add'>+void kvm_nested_flush_hwstate(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vcpu_test_and_clear_flag(vcpu, NESTED_SERROR_PENDING)))</div><div class='add'>+		kvm_inject_serror_esr(vcpu, vcpu_get_vsesr(vcpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_nested_sync_hwstate(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long *hcr = vcpu_hcr(vcpu);</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We previously decided that an SError was deliverable to the guest.</div><div class='add'>+	 * Reap the pending state from HCR_EL2 and...</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(__test_and_clear_bit(__ffs(HCR_VSE), hcr)))</div><div class='add'>+		vcpu_set_flag(vcpu, NESTED_SERROR_PENDING);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Re-attempt SError injection in case the deliverability has changed,</div><div class='add'>+	 * which is necessary to faithfully emulate WFI the case of a pending</div><div class='add'>+	 * SError being a wakeup condition.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(vcpu_test_and_clear_flag(vcpu, NESTED_SERROR_PENDING)))</div><div class='add'>+		kvm_inject_serror_esr(vcpu, vcpu_get_vsesr(vcpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * KVM unconditionally sets most of these traps anyway but use an allowlist</div><div class='add'>+ * to document the guest hypervisor traps that may take precedence and guard</div><div class='add'>+ * against future changes to the non-nested trap configuration.</div><div class='add'>+ */</div><div class='add'>+#define NV_MDCR_GUEST_INCLUDE	(MDCR_EL2_TDE	|	\</div><div class='add'>+				 MDCR_EL2_TDA	|	\</div><div class='add'>+				 MDCR_EL2_TDRA	|	\</div><div class='add'>+				 MDCR_EL2_TTRF	|	\</div><div class='add'>+				 MDCR_EL2_TPMS	|	\</div><div class='add'>+				 MDCR_EL2_TPM	|	\</div><div class='add'>+				 MDCR_EL2_TPMCR	|	\</div><div class='add'>+				 MDCR_EL2_TDCC	|	\</div><div class='add'>+				 MDCR_EL2_TDOSA)</div><div class='add'>+</div><div class='add'>+void kvm_nested_setup_mdcr_el2(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 guest_mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In yet another example where FEAT_NV2 is fscking broken, accesses</div><div class='add'>+	 * to MDSCR_EL1 are redirected to the VNCR despite having an effect</div><div class='add'>+	 * at EL2. Use a big hammer to apply sanity.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		vcpu-&gt;arch.mdcr_el2 |= MDCR_EL2_TDA;</div><div class='add'>+	else</div><div class='add'>+		vcpu-&gt;arch.mdcr_el2 |= (guest_mdcr &amp; NV_MDCR_GUEST_INCLUDE);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/pkvm.c b/arch/arm64/kvm/pkvm.c<br/>index 85117ea8f351..24f0f8a8c943 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pkvm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pkvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pkvm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/pkvm.c</a></div><div class='hunk'>@@ -5,11 +5,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interval_tree_generic.h&gt;</div><div class='ctx'> #include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/sort.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/kvm_pkvm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -23,23 +24,6 @@ static unsigned int *hyp_memblock_nr_ptr = &amp;kvm_nvhe_sym(hyp_memblock_nr);</div><div class='ctx'> phys_addr_t hyp_mem_base;</div><div class='ctx'> phys_addr_t hyp_mem_size;</div><div class='ctx'> </div><div class='del'>-static int cmp_hyp_memblock(const void *p1, const void *p2)</div><div class='del'>-{</div><div class='del'>-	const struct memblock_region *r1 = p1;</div><div class='del'>-	const struct memblock_region *r2 = p2;</div><div class='del'>-</div><div class='del'>-	return r1-&gt;base &lt; r2-&gt;base ? -1 : (r1-&gt;base &gt; r2-&gt;base);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sort_memblock_regions(void)</div><div class='del'>-{</div><div class='del'>-	sort(hyp_memory,</div><div class='del'>-	     *hyp_memblock_nr_ptr,</div><div class='del'>-	     sizeof(struct memblock_region),</div><div class='del'>-	     cmp_hyp_memblock,</div><div class='del'>-	     NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init register_memblock_regions(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct memblock_region *reg;</div><div class='hunk'>@@ -51,7 +35,6 @@ static int __init register_memblock_regions(void)</div><div class='ctx'> 		hyp_memory[*hyp_memblock_nr_ptr] = *reg;</div><div class='ctx'> 		(*hyp_memblock_nr_ptr)++;</div><div class='ctx'> 	}</div><div class='del'>-	sort_memblock_regions();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -78,6 +61,7 @@ void __init kvm_hyp_reserve(void)</div><div class='ctx'> 	hyp_mem_pages += host_s2_pgtable_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_vm_table_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_vmemmap_pages(STRUCT_HYP_PAGE_SIZE);</div><div class='add'>+	hyp_mem_pages += pkvm_selftest_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_ffa_proxy_pages();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -101,15 +85,45 @@ void __init kvm_hyp_reserve(void)</div><div class='ctx'> 		 hyp_mem_base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __pkvm_destroy_hyp_vm(struct kvm *host_kvm)</div><div class='add'>+static void __pkvm_destroy_hyp_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	if (host_kvm-&gt;arch.pkvm.handle) {</div><div class='add'>+	if (pkvm_hyp_vm_is_created(kvm)) {</div><div class='ctx'> 		WARN_ON(kvm_call_hyp_nvhe(__pkvm_teardown_vm,</div><div class='del'>-					  host_kvm-&gt;arch.pkvm.handle));</div><div class='add'>+					  kvm-&gt;arch.pkvm.handle));</div><div class='add'>+	} else if (kvm-&gt;arch.pkvm.handle) {</div><div class='add'>+		/*</div><div class='add'>+		 * The VM could have been reserved but hyp initialization has</div><div class='add'>+		 * failed. Make sure to unreserve it.</div><div class='add'>+		 */</div><div class='add'>+		kvm_call_hyp_nvhe(__pkvm_unreserve_vm, kvm-&gt;arch.pkvm.handle);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	host_kvm-&gt;arch.pkvm.handle = 0;</div><div class='del'>-	free_hyp_memcache(&amp;host_kvm-&gt;arch.pkvm.teardown_mc);</div><div class='add'>+	kvm-&gt;arch.pkvm.handle = 0;</div><div class='add'>+	kvm-&gt;arch.pkvm.is_created = false;</div><div class='add'>+	free_hyp_memcache(&amp;kvm-&gt;arch.pkvm.teardown_mc);</div><div class='add'>+	free_hyp_memcache(&amp;kvm-&gt;arch.pkvm.stage2_teardown_mc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __pkvm_create_hyp_vcpu(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	size_t hyp_vcpu_sz = PAGE_ALIGN(PKVM_HYP_VCPU_SIZE);</div><div class='add'>+	pkvm_handle_t handle = vcpu-&gt;kvm-&gt;arch.pkvm.handle;</div><div class='add'>+	void *hyp_vcpu;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.pkvm_memcache.flags |= HYP_MEMCACHE_ACCOUNT_STAGE2;</div><div class='add'>+</div><div class='add'>+	hyp_vcpu = alloc_pages_exact(hyp_vcpu_sz, GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!hyp_vcpu)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = kvm_call_hyp_nvhe(__pkvm_init_vcpu, handle, vcpu, hyp_vcpu);</div><div class='add'>+	if (!ret)</div><div class='add'>+		vcpu_set_flag(vcpu, VCPU_PKVM_FINALIZED);</div><div class='add'>+	else</div><div class='add'>+		free_pages_exact(hyp_vcpu, hyp_vcpu_sz);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -122,19 +136,16 @@ static void __pkvm_destroy_hyp_vm(struct kvm *host_kvm)</div><div class='ctx'>  *</div><div class='ctx'>  * Return 0 on success, negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-static int __pkvm_create_hyp_vm(struct kvm *host_kvm)</div><div class='add'>+static int __pkvm_create_hyp_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	size_t pgd_sz, hyp_vm_sz, hyp_vcpu_sz;</div><div class='del'>-	struct kvm_vcpu *host_vcpu;</div><div class='del'>-	pkvm_handle_t handle;</div><div class='add'>+	size_t pgd_sz, hyp_vm_sz;</div><div class='ctx'> 	void *pgd, *hyp_vm;</div><div class='del'>-	unsigned long idx;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (host_kvm-&gt;created_vcpus &lt; 1)</div><div class='add'>+	if (kvm-&gt;created_vcpus &lt; 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	pgd_sz = kvm_pgtable_stage2_pgd_size(host_kvm-&gt;arch.mmu.vtcr);</div><div class='add'>+	pgd_sz = kvm_pgtable_stage2_pgd_size(kvm-&gt;arch.mmu.vtcr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The PGD pages will be reclaimed using a hyp_memcache which implies</div><div class='hunk'>@@ -148,7 +159,7 @@ static int __pkvm_create_hyp_vm(struct kvm *host_kvm)</div><div class='ctx'> 	/* Allocate memory to donate to hyp for vm and vcpu pointers. */</div><div class='ctx'> 	hyp_vm_sz = PAGE_ALIGN(size_add(PKVM_HYP_VM_SIZE,</div><div class='ctx'> 					size_mul(sizeof(void *),</div><div class='del'>-						 host_kvm-&gt;created_vcpus)));</div><div class='add'>+						 kvm-&gt;created_vcpus)));</div><div class='ctx'> 	hyp_vm = alloc_pages_exact(hyp_vm_sz, GFP_KERNEL_ACCOUNT);</div><div class='ctx'> 	if (!hyp_vm) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -156,44 +167,15 @@ static int __pkvm_create_hyp_vm(struct kvm *host_kvm)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Donate the VM memory to hyp and let hyp initialize it. */</div><div class='del'>-	ret = kvm_call_hyp_nvhe(__pkvm_init_vm, host_kvm, hyp_vm, pgd);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	ret = kvm_call_hyp_nvhe(__pkvm_init_vm, kvm, hyp_vm, pgd);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto free_vm;</div><div class='ctx'> </div><div class='del'>-	handle = ret;</div><div class='del'>-</div><div class='del'>-	host_kvm-&gt;arch.pkvm.handle = handle;</div><div class='del'>-</div><div class='del'>-	/* Donate memory for the vcpus at hyp and initialize it. */</div><div class='del'>-	hyp_vcpu_sz = PAGE_ALIGN(PKVM_HYP_VCPU_SIZE);</div><div class='del'>-	kvm_for_each_vcpu(idx, host_vcpu, host_kvm) {</div><div class='del'>-		void *hyp_vcpu;</div><div class='del'>-</div><div class='del'>-		/* Indexing of the vcpus to be sequential starting at 0. */</div><div class='del'>-		if (WARN_ON(host_vcpu-&gt;vcpu_idx != idx)) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto destroy_vm;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hyp_vcpu = alloc_pages_exact(hyp_vcpu_sz, GFP_KERNEL_ACCOUNT);</div><div class='del'>-		if (!hyp_vcpu) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto destroy_vm;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = kvm_call_hyp_nvhe(__pkvm_init_vcpu, handle, host_vcpu,</div><div class='del'>-					hyp_vcpu);</div><div class='del'>-		if (ret) {</div><div class='del'>-			free_pages_exact(hyp_vcpu, hyp_vcpu_sz);</div><div class='del'>-			goto destroy_vm;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	kvm-&gt;arch.pkvm.is_created = true;</div><div class='add'>+	kvm-&gt;arch.pkvm.stage2_teardown_mc.flags |= HYP_MEMCACHE_ACCOUNT_STAGE2;</div><div class='add'>+	kvm_account_pgtable_pages(pgd, pgd_sz / PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-destroy_vm:</div><div class='del'>-	__pkvm_destroy_hyp_vm(host_kvm);</div><div class='del'>-	return ret;</div><div class='ctx'> free_vm:</div><div class='ctx'> 	free_pages_exact(hyp_vm, hyp_vm_sz);</div><div class='ctx'> free_pgd:</div><div class='hunk'>@@ -201,27 +183,60 @@ free_pgd:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pkvm_create_hyp_vm(struct kvm *host_kvm)</div><div class='add'>+bool pkvm_hyp_vm_is_created(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return READ_ONCE(kvm-&gt;arch.pkvm.is_created);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_create_hyp_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;host_kvm-&gt;arch.config_lock);</div><div class='del'>-	if (!host_kvm-&gt;arch.pkvm.handle)</div><div class='del'>-		ret = __pkvm_create_hyp_vm(host_kvm);</div><div class='del'>-	mutex_unlock(&amp;host_kvm-&gt;arch.config_lock);</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='add'>+	if (!pkvm_hyp_vm_is_created(kvm))</div><div class='add'>+		ret = __pkvm_create_hyp_vm(kvm);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void pkvm_destroy_hyp_vm(struct kvm *host_kvm)</div><div class='add'>+int pkvm_create_hyp_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;host_kvm-&gt;arch.config_lock);</div><div class='del'>-	__pkvm_destroy_hyp_vm(host_kvm);</div><div class='del'>-	mutex_unlock(&amp;host_kvm-&gt;arch.config_lock);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vcpu-&gt;kvm-&gt;arch.config_lock);</div><div class='add'>+	if (!vcpu_get_flag(vcpu, VCPU_PKVM_FINALIZED))</div><div class='add'>+		ret = __pkvm_create_hyp_vcpu(vcpu);</div><div class='add'>+	mutex_unlock(&amp;vcpu-&gt;kvm-&gt;arch.config_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pkvm_init_host_vm(struct kvm *host_kvm)</div><div class='add'>+void pkvm_destroy_hyp_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='add'>+	__pkvm_destroy_hyp_vm(kvm);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_init_host_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pkvm_hyp_vm_is_created(kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* VM is already reserved, no need to proceed. */</div><div class='add'>+	if (kvm-&gt;arch.pkvm.handle)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Reserve the VM in hyp and obtain a hyp handle for the VM. */</div><div class='add'>+	ret = kvm_call_hyp_nvhe(__pkvm_reserve_vm);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.pkvm.handle = ret;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -258,6 +273,7 @@ static int __init finalize_pkvm(void)</div><div class='ctx'> 	 * at, which would end badly once inaccessible.</div><div class='ctx'> 	 */</div><div class='ctx'> 	kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start);</div><div class='add'>+	kmemleak_free_part(__hyp_data_start, __hyp_data_end - __hyp_data_start);</div><div class='ctx'> 	kmemleak_free_part(__hyp_rodata_start, __hyp_rodata_end - __hyp_rodata_start);</div><div class='ctx'> 	kmemleak_free_part_phys(hyp_mem_base, hyp_mem_size);</div><div class='ctx'> </div><div class='hunk'>@@ -268,3 +284,197 @@ static int __init finalize_pkvm(void)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> device_initcall_sync(finalize_pkvm);</div><div class='add'>+</div><div class='add'>+static u64 __pkvm_mapping_start(struct pkvm_mapping *m)</div><div class='add'>+{</div><div class='add'>+	return m-&gt;gfn * PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 __pkvm_mapping_end(struct pkvm_mapping *m)</div><div class='add'>+{</div><div class='add'>+	return (m-&gt;gfn + m-&gt;nr_pages) * PAGE_SIZE - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+INTERVAL_TREE_DEFINE(struct pkvm_mapping, node, u64, __subtree_last,</div><div class='add'>+		     __pkvm_mapping_start, __pkvm_mapping_end, static,</div><div class='add'>+		     pkvm_mapping);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __tmp is updated to iter_first(pkvm_mappings) *before* entering the body of the loop to allow</div><div class='add'>+ * freeing of __map inline.</div><div class='add'>+ */</div><div class='add'>+#define for_each_mapping_in_range_safe(__pgt, __start, __end, __map)				\</div><div class='add'>+	for (struct pkvm_mapping *__tmp = pkvm_mapping_iter_first(&amp;(__pgt)-&gt;pkvm_mappings,	\</div><div class='add'>+								  __start, __end - 1);		\</div><div class='add'>+	     __tmp &amp;&amp; ({									\</div><div class='add'>+				__map = __tmp;							\</div><div class='add'>+				__tmp = pkvm_mapping_iter_next(__map, __start, __end - 1);	\</div><div class='add'>+				true;								\</div><div class='add'>+		       });									\</div><div class='add'>+	    )</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='add'>+			     struct kvm_pgtable_mm_ops *mm_ops)</div><div class='add'>+{</div><div class='add'>+	pgt-&gt;pkvm_mappings	= RB_ROOT_CACHED;</div><div class='add'>+	pgt-&gt;mmu		= mmu;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='add'>+	pkvm_handle_t handle = kvm-&gt;arch.pkvm.handle;</div><div class='add'>+	struct pkvm_mapping *mapping;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!handle)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for_each_mapping_in_range_safe(pgt, start, end, mapping) {</div><div class='add'>+		ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_guest, handle, mapping-&gt;gfn,</div><div class='add'>+					mapping-&gt;nr_pages);</div><div class='add'>+		if (WARN_ON(ret))</div><div class='add'>+			return ret;</div><div class='add'>+		pkvm_mapping_remove(mapping, &amp;pgt-&gt;pkvm_mappings);</div><div class='add'>+		kfree(mapping);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pkvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt)</div><div class='add'>+{</div><div class='add'>+	__pkvm_pgtable_stage2_unmap(pgt, 0, ~(0ULL));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='add'>+			   u64 phys, enum kvm_pgtable_prot prot,</div><div class='add'>+			   void *mc, enum kvm_pgtable_walk_flags flags)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='add'>+	struct pkvm_mapping *mapping = NULL;</div><div class='add'>+	struct kvm_hyp_memcache *cache = mc;</div><div class='add'>+	u64 gfn = addr &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	u64 pfn = phys &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (size != PAGE_SIZE &amp;&amp; size != PMD_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calling stage2_map() on top of existing mappings is either happening because of a race</div><div class='add'>+	 * with another vCPU, or because we're changing between page and block mappings. As per</div><div class='add'>+	 * user_mem_abort(), same-size permission faults are handled in the relax_perms() path.</div><div class='add'>+	 */</div><div class='add'>+	mapping = pkvm_mapping_iter_first(&amp;pgt-&gt;pkvm_mappings, addr, addr + size - 1);</div><div class='add'>+	if (mapping) {</div><div class='add'>+		if (size == (mapping-&gt;nr_pages * PAGE_SIZE))</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+</div><div class='add'>+		/* Remove _any_ pkvm_mapping overlapping with the range, bigger or smaller. */</div><div class='add'>+		ret = __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		mapping = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = kvm_call_hyp_nvhe(__pkvm_host_share_guest, pfn, gfn, size / PAGE_SIZE, prot);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	swap(mapping, cache-&gt;mapping);</div><div class='add'>+	mapping-&gt;gfn = gfn;</div><div class='add'>+	mapping-&gt;pfn = pfn;</div><div class='add'>+	mapping-&gt;nr_pages = size / PAGE_SIZE;</div><div class='add'>+	pkvm_mapping_insert(mapping, &amp;pgt-&gt;pkvm_mappings);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm_s2_mmu_to_kvm(pgt-&gt;mmu)-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	return __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='add'>+	pkvm_handle_t handle = kvm-&gt;arch.pkvm.handle;</div><div class='add'>+	struct pkvm_mapping *mapping;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping) {</div><div class='add'>+		ret = kvm_call_hyp_nvhe(__pkvm_host_wrprotect_guest, handle, mapping-&gt;gfn,</div><div class='add'>+					mapping-&gt;nr_pages);</div><div class='add'>+		if (WARN_ON(ret))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='add'>+	struct pkvm_mapping *mapping;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping)</div><div class='add'>+		__clean_dcache_guest_page(pfn_to_kaddr(mapping-&gt;pfn),</div><div class='add'>+					  PAGE_SIZE * mapping-&gt;nr_pages);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool pkvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr, u64 size, bool mkold)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='add'>+	pkvm_handle_t handle = kvm-&gt;arch.pkvm.handle;</div><div class='add'>+	struct pkvm_mapping *mapping;</div><div class='add'>+	bool young = false;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping)</div><div class='add'>+		young |= kvm_call_hyp_nvhe(__pkvm_host_test_clear_young_guest, handle, mapping-&gt;gfn,</div><div class='add'>+					   mapping-&gt;nr_pages, mkold);</div><div class='add'>+</div><div class='add'>+	return young;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, enum kvm_pgtable_prot prot,</div><div class='add'>+				    enum kvm_pgtable_walk_flags flags)</div><div class='add'>+{</div><div class='add'>+	return kvm_call_hyp_nvhe(__pkvm_host_relax_perms_guest, addr &gt;&gt; PAGE_SHIFT, prot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pkvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,</div><div class='add'>+				 enum kvm_pgtable_walk_flags flags)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(kvm_call_hyp_nvhe(__pkvm_host_mkyoung_guest, addr &gt;&gt; PAGE_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pkvm_pgtable_stage2_free_unlinked(struct kvm_pgtable_mm_ops *mm_ops, void *pgtable, s8 level)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_ONCE(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+kvm_pte_t *pkvm_pgtable_stage2_create_unlinked(struct kvm_pgtable *pgt, u64 phys, s8 level,</div><div class='add'>+					enum kvm_pgtable_prot prot, void *mc, bool force_pte)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_ONCE(1);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pkvm_pgtable_stage2_split(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='add'>+			      struct kvm_mmu_memory_cache *mc)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_ONCE(1);</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c<br/>index ac36c438b8c1..b03dbda7f1ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pmu-emul.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pmu-emul.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pmu-emul.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/pmu-emul.c</a></div><div class='hunk'>@@ -17,13 +17,18 @@</div><div class='ctx'> </div><div class='ctx'> #define PERF_ATTR_CFG1_COUNTER_64BIT	BIT(0)</div><div class='ctx'> </div><div class='del'>-DEFINE_STATIC_KEY_FALSE(kvm_arm_pmu_available);</div><div class='del'>-</div><div class='ctx'> static LIST_HEAD(arm_pmus);</div><div class='ctx'> static DEFINE_MUTEX(arm_pmus_lock);</div><div class='ctx'> </div><div class='ctx'> static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);</div><div class='ctx'> static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);</div><div class='add'>+static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pmc);</div><div class='add'>+</div><div class='add'>+bool kvm_supports_guest_pmuv3(void)</div><div class='add'>+{</div><div class='add'>+	guard(mutex)(&amp;arm_pmus_lock);</div><div class='add'>+	return !list_empty(&amp;arm_pmus);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static struct kvm_vcpu *kvm_pmc_to_vcpu(const struct kvm_pmc *pmc)</div><div class='ctx'> {</div><div class='hunk'>@@ -89,7 +94,11 @@ static bool kvm_pmc_is_64bit(struct kvm_pmc *pmc)</div><div class='ctx'> </div><div class='ctx'> static bool kvm_pmc_has_64bit_overflow(struct kvm_pmc *pmc)</div><div class='ctx'> {</div><div class='del'>-	u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));</div><div class='add'>+	struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);</div><div class='add'>+	u64 val = kvm_vcpu_read_pmcr(vcpu);</div><div class='add'>+</div><div class='add'>+	if (kvm_pmu_counter_is_hyp(vcpu, pmc-&gt;idx))</div><div class='add'>+		return __vcpu_sys_reg(vcpu, MDCR_EL2) &amp; MDCR_EL2_HLP;</div><div class='ctx'> </div><div class='ctx'> 	return (pmc-&gt;idx &lt; ARMV8_PMU_CYCLE_IDX &amp;&amp; (val &amp; ARMV8_PMU_PMCR_LP)) ||</div><div class='ctx'> 	       (pmc-&gt;idx == ARMV8_PMU_CYCLE_IDX &amp;&amp; (val &amp; ARMV8_PMU_PMCR_LC));</div><div class='hunk'>@@ -111,6 +120,11 @@ static u32 counter_index_to_evtreg(u64 idx)</div><div class='ctx'> 	return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 kvm_pmc_read_evtreg(const struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	return __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), counter_index_to_evtreg(pmc-&gt;idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);</div><div class='hunk'>@@ -140,9 +154,6 @@ static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)</div><div class='ctx'>  */</div><div class='ctx'> u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)</div><div class='ctx'> {</div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +178,7 @@ static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)</div><div class='ctx'> 		val |= lower_32_bits(val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, reg, val);</div><div class='ctx'> </div><div class='ctx'> 	/* Recreate the perf event to reflect the updated sample_period */</div><div class='ctx'> 	kvm_pmu_create_perf_event(pmc);</div><div class='hunk'>@@ -181,13 +192,23 @@ static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)</div><div class='ctx'>  */</div><div class='ctx'> void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)</div><div class='ctx'> {</div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * kvm_pmu_set_counter_value_user - set PMU counter value from user</div><div class='add'>+ * @vcpu: The vcpu pointer</div><div class='add'>+ * @select_idx: The counter index</div><div class='add'>+ * @val: The counter value</div><div class='add'>+ */</div><div class='add'>+void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)</div><div class='add'>+{</div><div class='add'>+	kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, select_idx));</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, counter_index_to_reg(select_idx), val);</div><div class='add'>+	kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * kvm_pmu_release_perf_event - remove the perf event</div><div class='ctx'>  * @pmc: The PMU counter pointer</div><div class='ctx'>  */</div><div class='hunk'>@@ -218,7 +239,7 @@ static void kvm_pmu_stop_counter(struct kvm_pmc *pmc)</div><div class='ctx'> </div><div class='ctx'> 	reg = counter_index_to_reg(pmc-&gt;idx);</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, reg, val);</div><div class='ctx'> </div><div class='ctx'> 	kvm_pmu_release_perf_event(pmc);</div><div class='ctx'> }</div><div class='hunk'>@@ -238,20 +259,6 @@ void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * kvm_pmu_vcpu_reset - reset pmu state for cpu</div><div class='del'>- * @vcpu: The vcpu pointer</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for_each_set_bit(i, &amp;mask, 32)</div><div class='del'>-		kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * kvm_pmu_vcpu_destroy - free perf event of PMU for cpu</div><div class='ctx'>  * @vcpu: The vcpu pointer</div><div class='ctx'>  *</div><div class='hunk'>@@ -265,7 +272,50 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	irq_work_sync(&amp;vcpu-&gt;arch.pmu.overflow_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)</div><div class='add'>+static u64 kvm_pmu_hyp_counter_mask(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned int hpmn, n;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));</div><div class='add'>+	n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Programming HPMN to a value greater than PMCR_EL0.N is</div><div class='add'>+	 * CONSTRAINED UNPREDICTABLE. Make the implementation choice that an</div><div class='add'>+	 * UNKNOWN number of counters (in our case, zero) are reserved for EL2.</div><div class='add'>+	 */</div><div class='add'>+	if (hpmn &gt;= n)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Programming HPMN=0 is CONSTRAINED UNPREDICTABLE if FEAT_HPMN0 isn't</div><div class='add'>+	 * implemented. Since KVM's ability to emulate HPMN=0 does not directly</div><div class='add'>+	 * depend on hardware (all PMU registers are trapped), make the</div><div class='add'>+	 * implementation choice that all counters are included in the second</div><div class='add'>+	 * range reserved for EL2/EL3.</div><div class='add'>+	 */</div><div class='add'>+	return GENMASK(n - 1, hpmn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	return kvm_pmu_hyp_counter_mask(vcpu) &amp; BIT(idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 mask = kvm_pmu_implemented_counter_mask(vcpu);</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu) || vcpu_is_el2(vcpu))</div><div class='add'>+		return mask;</div><div class='add'>+</div><div class='add'>+	return mask &amp; ~kvm_pmu_hyp_counter_mask(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, kvm_vcpu_read_pmcr(vcpu));</div><div class='ctx'> </div><div class='hunk'>@@ -275,76 +325,70 @@ u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return GENMASK(val - 1, 0) | BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_pmu_enable_counter_mask - enable selected PMU counters</div><div class='del'>- * @vcpu: The vcpu pointer</div><div class='del'>- * @val: the value guest writes to PMCNTENSET register</div><div class='del'>- *</div><div class='del'>- * Call perf_event_enable to start counting the perf event</div><div class='del'>- */</div><div class='del'>-void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)</div><div class='add'>+static void kvm_pmc_enable_perf_event(struct kvm_pmc *pmc)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+	if (!pmc-&gt;perf_event) {</div><div class='add'>+		kvm_pmu_create_perf_event(pmc);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!(kvm_vcpu_read_pmcr(vcpu) &amp; ARMV8_PMU_PMCR_E) || !val)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; KVM_ARMV8_PMU_MAX_COUNTERS; i++) {</div><div class='del'>-		struct kvm_pmc *pmc;</div><div class='del'>-</div><div class='del'>-		if (!(val &amp; BIT(i)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		pmc = kvm_vcpu_idx_to_pmc(vcpu, i);</div><div class='add'>+	perf_event_enable(pmc-&gt;perf_event);</div><div class='add'>+	if (pmc-&gt;perf_event-&gt;state != PERF_EVENT_STATE_ACTIVE)</div><div class='add'>+		kvm_debug("fail to enable perf event\n");</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (!pmc-&gt;perf_event) {</div><div class='del'>-			kvm_pmu_create_perf_event(pmc);</div><div class='del'>-		} else {</div><div class='del'>-			perf_event_enable(pmc-&gt;perf_event);</div><div class='del'>-			if (pmc-&gt;perf_event-&gt;state != PERF_EVENT_STATE_ACTIVE)</div><div class='del'>-				kvm_debug("fail to enable perf event\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+static void kvm_pmc_disable_perf_event(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	if (pmc-&gt;perf_event)</div><div class='add'>+		perf_event_disable(pmc-&gt;perf_event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * kvm_pmu_disable_counter_mask - disable selected PMU counters</div><div class='del'>- * @vcpu: The vcpu pointer</div><div class='del'>- * @val: the value guest writes to PMCNTENCLR register</div><div class='del'>- *</div><div class='del'>- * Call perf_event_disable to stop counting the perf event</div><div class='del'>- */</div><div class='del'>-void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val)</div><div class='add'>+void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu) || !val)</div><div class='add'>+	if (!val)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; KVM_ARMV8_PMU_MAX_COUNTERS; i++) {</div><div class='del'>-		struct kvm_pmc *pmc;</div><div class='add'>+		struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, i);</div><div class='ctx'> </div><div class='ctx'> 		if (!(val &amp; BIT(i)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		pmc = kvm_vcpu_idx_to_pmc(vcpu, i);</div><div class='del'>-</div><div class='del'>-		if (pmc-&gt;perf_event)</div><div class='del'>-			perf_event_disable(pmc-&gt;perf_event);</div><div class='add'>+		if (kvm_pmu_counter_is_enabled(pmc))</div><div class='add'>+			kvm_pmc_enable_perf_event(pmc);</div><div class='add'>+		else</div><div class='add'>+			kvm_pmc_disable_perf_event(pmc);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_vcpu_pmu_restore_guest(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)</div><div class='add'>+/*</div><div class='add'>+ * Returns the PMU overflow state, which is true if there exists an event</div><div class='add'>+ * counter where the values of the global enable control, PMOVSSET_EL0[n], and</div><div class='add'>+ * PMINTENSET_EL1[n] are all 1.</div><div class='add'>+ */</div><div class='add'>+static bool kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 reg = 0;</div><div class='add'>+	u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);</div><div class='ctx'> </div><div class='del'>-	if ((kvm_vcpu_read_pmcr(vcpu) &amp; ARMV8_PMU_PMCR_E)) {</div><div class='del'>-		reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);</div><div class='del'>-		reg &amp;= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);</div><div class='del'>-		reg &amp;= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);</div><div class='del'>-	}</div><div class='add'>+	reg &amp;= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * PMCR_EL0.E is the global enable control for event counters available</div><div class='add'>+	 * to EL0 and EL1.</div><div class='add'>+	 */</div><div class='add'>+	if (!(kvm_vcpu_read_pmcr(vcpu) &amp; ARMV8_PMU_PMCR_E))</div><div class='add'>+		reg &amp;= kvm_pmu_hyp_counter_mask(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Otherwise, MDCR_EL2.HPME is the global enable control for event</div><div class='add'>+	 * counters reserved for EL2.</div><div class='add'>+	 */</div><div class='add'>+	if (!(vcpu_read_sys_reg(vcpu, MDCR_EL2) &amp; MDCR_EL2_HPME))</div><div class='add'>+		reg &amp;= ~kvm_pmu_hyp_counter_mask(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return reg;</div><div class='ctx'> }</div><div class='hunk'>@@ -354,10 +398,7 @@ static void kvm_pmu_update_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_pmu *pmu = &amp;vcpu-&gt;arch.pmu;</div><div class='ctx'> 	bool overflow;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	overflow = !!kvm_pmu_overflow_status(vcpu);</div><div class='add'>+	overflow = kvm_pmu_overflow_status(vcpu);</div><div class='ctx'> 	if (pmu-&gt;irq_level == overflow)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -462,14 +503,14 @@ static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		reg = __vcpu_sys_reg(vcpu, counter_index_to_reg(i)) + 1;</div><div class='ctx'> 		if (!kvm_pmc_is_64bit(pmc))</div><div class='ctx'> 			reg = lower_32_bits(reg);</div><div class='del'>-		__vcpu_sys_reg(vcpu, counter_index_to_reg(i)) = reg;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, counter_index_to_reg(i), reg);</div><div class='ctx'> </div><div class='ctx'> 		/* No overflow? move on */</div><div class='ctx'> 		if (kvm_pmc_has_64bit_overflow(pmc) ? reg : lower_32_bits(reg))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* Mark overflow */</div><div class='del'>-		__vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i);</div><div class='add'>+		__vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, |=, BIT(i));</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_pmu_counter_can_chain(pmc))</div><div class='ctx'> 			kvm_pmu_counter_increment(vcpu, BIT(i + 1),</div><div class='hunk'>@@ -515,7 +556,7 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event,</div><div class='ctx'> 	perf_event-&gt;attr.sample_period = period;</div><div class='ctx'> 	perf_event-&gt;hw.sample_period = period;</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(idx);</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, |=, BIT(idx));</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_pmu_counter_can_chain(pmc))</div><div class='ctx'> 		kvm_pmu_counter_increment(vcpu, BIT(idx + 1),</div><div class='hunk'>@@ -552,41 +593,87 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	/* Fixup PMCR_EL0 to reconcile the PMU version and the LP bit */</div><div class='ctx'> 	if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64DFR0_EL1, PMUVer, V3P5))</div><div class='ctx'> 		val &amp;= ~ARMV8_PMU_PMCR_LP;</div><div class='ctx'> </div><div class='del'>-	/* The reset bits don't indicate any state, and shouldn't be saved. */</div><div class='del'>-	__vcpu_sys_reg(vcpu, PMCR_EL0) = val &amp; ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P);</div><div class='add'>+	/* Request a reload of the PMU to enable/disable affected counters */</div><div class='add'>+	if ((__vcpu_sys_reg(vcpu, PMCR_EL0) ^ val) &amp; ARMV8_PMU_PMCR_E)</div><div class='add'>+		kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='ctx'> </div><div class='del'>-	if (val &amp; ARMV8_PMU_PMCR_E) {</div><div class='del'>-		kvm_pmu_enable_counter_mask(vcpu,</div><div class='del'>-		       __vcpu_sys_reg(vcpu, PMCNTENSET_EL0));</div><div class='del'>-	} else {</div><div class='del'>-		kvm_pmu_disable_counter_mask(vcpu,</div><div class='del'>-		       __vcpu_sys_reg(vcpu, PMCNTENSET_EL0));</div><div class='del'>-	}</div><div class='add'>+	/* The reset bits don't indicate any state, and shouldn't be saved. */</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, PMCR_EL0, (val &amp; ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P)));</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; ARMV8_PMU_PMCR_C)</div><div class='ctx'> 		kvm_pmu_set_counter_value(vcpu, ARMV8_PMU_CYCLE_IDX, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; ARMV8_PMU_PMCR_P) {</div><div class='del'>-		unsigned long mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='del'>-		mask &amp;= ~BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='add'>+		unsigned long mask = kvm_pmu_implemented_counter_mask(vcpu) &amp;</div><div class='add'>+				     ~BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='add'>+</div><div class='add'>+		if (!vcpu_is_el2(vcpu))</div><div class='add'>+			mask &amp;= ~kvm_pmu_hyp_counter_mask(vcpu);</div><div class='add'>+</div><div class='ctx'> 		for_each_set_bit(i, &amp;mask, 32)</div><div class='ctx'> 			kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);</div><div class='ctx'> 	}</div><div class='del'>-	kvm_vcpu_pmu_restore_guest(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pmc)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);</div><div class='del'>-	return (kvm_vcpu_read_pmcr(vcpu) &amp; ARMV8_PMU_PMCR_E) &amp;&amp;</div><div class='del'>-	       (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &amp; BIT(pmc-&gt;idx));</div><div class='add'>+	unsigned int mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!(__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &amp; BIT(pmc-&gt;idx)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (kvm_pmu_counter_is_hyp(vcpu, pmc-&gt;idx))</div><div class='add'>+		return mdcr &amp; MDCR_EL2_HPME;</div><div class='add'>+</div><div class='add'>+	return kvm_vcpu_read_pmcr(vcpu) &amp; ARMV8_PMU_PMCR_E;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_pmc_counts_at_el0(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	u64 evtreg = kvm_pmc_read_evtreg(pmc);</div><div class='add'>+	bool nsu = evtreg &amp; ARMV8_PMU_EXCLUDE_NS_EL0;</div><div class='add'>+	bool u = evtreg &amp; ARMV8_PMU_EXCLUDE_EL0;</div><div class='add'>+</div><div class='add'>+	return u == nsu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_pmc_counts_at_el1(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	u64 evtreg = kvm_pmc_read_evtreg(pmc);</div><div class='add'>+	bool nsk = evtreg &amp; ARMV8_PMU_EXCLUDE_NS_EL1;</div><div class='add'>+	bool p = evtreg &amp; ARMV8_PMU_EXCLUDE_EL1;</div><div class='add'>+</div><div class='add'>+	return p == nsk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_pmc_counts_at_el2(struct kvm_pmc *pmc)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);</div><div class='add'>+	u64 mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!kvm_pmu_counter_is_hyp(vcpu, pmc-&gt;idx) &amp;&amp; (mdcr &amp; MDCR_EL2_HPMD))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return kvm_pmc_read_evtreg(pmc) &amp; ARMV8_PMU_INCLUDE_EL2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_map_pmu_event(struct kvm *kvm, unsigned int eventsel)</div><div class='add'>+{</div><div class='add'>+	struct arm_pmu *pmu = kvm-&gt;arch.arm_pmu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The CPU PMU likely isn't PMUv3; let the driver provide a mapping</div><div class='add'>+	 * for the guest's PMUv3 event ID.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(pmu-&gt;map_pmuv3_event))</div><div class='add'>+		return pmu-&gt;map_pmuv3_event(eventsel);</div><div class='add'>+</div><div class='add'>+	return eventsel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -599,17 +686,16 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)</div><div class='ctx'> 	struct arm_pmu *arm_pmu = vcpu-&gt;kvm-&gt;arch.arm_pmu;</div><div class='ctx'> 	struct perf_event *event;</div><div class='ctx'> 	struct perf_event_attr attr;</div><div class='del'>-	u64 eventsel, reg, data;</div><div class='del'>-	bool p, u, nsk, nsu;</div><div class='add'>+	int eventsel;</div><div class='add'>+	u64 evtreg;</div><div class='ctx'> </div><div class='del'>-	reg = counter_index_to_evtreg(pmc-&gt;idx);</div><div class='del'>-	data = __vcpu_sys_reg(vcpu, reg);</div><div class='add'>+	evtreg = kvm_pmc_read_evtreg(pmc);</div><div class='ctx'> </div><div class='ctx'> 	kvm_pmu_stop_counter(pmc);</div><div class='ctx'> 	if (pmc-&gt;idx == ARMV8_PMU_CYCLE_IDX)</div><div class='ctx'> 		eventsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES;</div><div class='ctx'> 	else</div><div class='del'>-		eventsel = data &amp; kvm_pmu_event_mask(vcpu-&gt;kvm);</div><div class='add'>+		eventsel = evtreg &amp; kvm_pmu_event_mask(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Neither SW increment nor chained events need to be backed</div><div class='hunk'>@@ -627,23 +713,34 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)</div><div class='ctx'> 	    !test_bit(eventsel, vcpu-&gt;kvm-&gt;arch.pmu_filter))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	p = data &amp; ARMV8_PMU_EXCLUDE_EL1;</div><div class='del'>-	u = data &amp; ARMV8_PMU_EXCLUDE_EL0;</div><div class='del'>-	nsk = data &amp; ARMV8_PMU_EXCLUDE_NS_EL1;</div><div class='del'>-	nsu = data &amp; ARMV8_PMU_EXCLUDE_NS_EL0;</div><div class='add'>+	/*</div><div class='add'>+	 * Don't create an event if we're running on hardware that requires</div><div class='add'>+	 * PMUv3 event translation and we couldn't find a valid mapping.</div><div class='add'>+	 */</div><div class='add'>+	eventsel = kvm_map_pmu_event(vcpu-&gt;kvm, eventsel);</div><div class='add'>+	if (eventsel &lt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;attr, 0, sizeof(struct perf_event_attr));</div><div class='ctx'> 	attr.type = arm_pmu-&gt;pmu.type;</div><div class='ctx'> 	attr.size = sizeof(attr);</div><div class='ctx'> 	attr.pinned = 1;</div><div class='ctx'> 	attr.disabled = !kvm_pmu_counter_is_enabled(pmc);</div><div class='del'>-	attr.exclude_user = (u != nsu);</div><div class='del'>-	attr.exclude_kernel = (p != nsk);</div><div class='add'>+	attr.exclude_user = !kvm_pmc_counts_at_el0(pmc);</div><div class='ctx'> 	attr.exclude_hv = 1; /* Don't count EL2 events */</div><div class='ctx'> 	attr.exclude_host = 1; /* Don't count host events */</div><div class='ctx'> 	attr.config = eventsel;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Filter events at EL1 (i.e. vEL2) when in a hyp context based on the</div><div class='add'>+	 * guest's EL2 filter.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(is_hyp_ctxt(vcpu)))</div><div class='add'>+		attr.exclude_kernel = !kvm_pmc_counts_at_el2(pmc);</div><div class='add'>+	else</div><div class='add'>+		attr.exclude_kernel = !kvm_pmc_counts_at_el1(pmc);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * If counting with a 64bit counter, advertise it to the perf</div><div class='ctx'> 	 * code, carefully dealing with the initial sample period</div><div class='ctx'> 	 * which also depends on the overflow.</div><div class='hunk'>@@ -681,11 +778,8 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,</div><div class='ctx'> 	struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, select_idx);</div><div class='ctx'> 	u64 reg;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	reg = counter_index_to_evtreg(pmc-&gt;idx);</div><div class='del'>-	__vcpu_sys_reg(vcpu, reg) = data &amp; kvm_pmu_evtyper_mask(vcpu-&gt;kvm);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, reg, (data &amp; kvm_pmu_evtyper_mask(vcpu-&gt;kvm)));</div><div class='ctx'> </div><div class='ctx'> 	kvm_pmu_create_perf_event(pmc);</div><div class='ctx'> }</div><div class='hunk'>@@ -701,29 +795,23 @@ void kvm_host_pmu_init(struct arm_pmu *pmu)</div><div class='ctx'> 	if (!pmuv3_implemented(kvm_arm_pmu_get_pmuver_limit()))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;arm_pmus_lock);</div><div class='add'>+	guard(mutex)(&amp;arm_pmus_lock);</div><div class='ctx'> </div><div class='ctx'> 	entry = kmalloc(sizeof(*entry), GFP_KERNEL);</div><div class='ctx'> 	if (!entry)</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	entry-&gt;arm_pmu = pmu;</div><div class='ctx'> 	list_add_tail(&amp;entry-&gt;entry, &amp;arm_pmus);</div><div class='del'>-</div><div class='del'>-	if (list_is_singular(&amp;arm_pmus))</div><div class='del'>-		static_branch_enable(&amp;kvm_arm_pmu_available);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;arm_pmus_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct arm_pmu *kvm_pmu_probe_armpmu(void)</div><div class='ctx'> {</div><div class='del'>-	struct arm_pmu *tmp, *pmu = NULL;</div><div class='ctx'> 	struct arm_pmu_entry *entry;</div><div class='add'>+	struct arm_pmu *pmu;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;arm_pmus_lock);</div><div class='add'>+	guard(mutex)(&amp;arm_pmus_lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * It is safe to use a stale cpu to iterate the list of PMUs so long as</div><div class='hunk'>@@ -744,42 +832,62 @@ static struct arm_pmu *kvm_pmu_probe_armpmu(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	cpu = raw_smp_processor_id();</div><div class='ctx'> 	list_for_each_entry(entry, &amp;arm_pmus, entry) {</div><div class='del'>-		tmp = entry-&gt;arm_pmu;</div><div class='add'>+		pmu = entry-&gt;arm_pmu;</div><div class='ctx'> </div><div class='del'>-		if (cpumask_test_cpu(cpu, &amp;tmp-&gt;supported_cpus)) {</div><div class='del'>-			pmu = tmp;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		if (cpumask_test_cpu(cpu, &amp;pmu-&gt;supported_cpus))</div><div class='add'>+			return pmu;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;arm_pmus_lock);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return pmu;</div><div class='add'>+static u64 __compute_pmceid(struct arm_pmu *pmu, bool pmceid1)</div><div class='add'>+{</div><div class='add'>+	u32 hi[2], lo[2];</div><div class='add'>+</div><div class='add'>+	bitmap_to_arr32(lo, pmu-&gt;pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);</div><div class='add'>+	bitmap_to_arr32(hi, pmu-&gt;pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);</div><div class='add'>+</div><div class='add'>+	return ((u64)hi[pmceid1] &lt;&lt; 32) | lo[pmceid1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_pmceid0(struct arm_pmu *pmu)</div><div class='add'>+{</div><div class='add'>+	u64 val = __compute_pmceid(pmu, 0);</div><div class='add'>+</div><div class='add'>+	/* always support SW_INCR */</div><div class='add'>+	val |= BIT(ARMV8_PMUV3_PERFCTR_SW_INCR);</div><div class='add'>+	/* always support CHAIN */</div><div class='add'>+	val |= BIT(ARMV8_PMUV3_PERFCTR_CHAIN);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_pmceid1(struct arm_pmu *pmu)</div><div class='add'>+{</div><div class='add'>+	u64 val = __compute_pmceid(pmu, 1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Don't advertise STALL_SLOT*, as PMMIR_EL0 is handled</div><div class='add'>+	 * as RAZ</div><div class='add'>+	 */</div><div class='add'>+	val &amp;= ~(BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT - 32) |</div><div class='add'>+		 BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND - 32) |</div><div class='add'>+		 BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND - 32));</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)</div><div class='ctx'> {</div><div class='add'>+	struct arm_pmu *cpu_pmu = vcpu-&gt;kvm-&gt;arch.arm_pmu;</div><div class='ctx'> 	unsigned long *bmap = vcpu-&gt;kvm-&gt;arch.pmu_filter;</div><div class='ctx'> 	u64 val, mask = 0;</div><div class='ctx'> 	int base, i, nr_events;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	if (!pmceid1) {</div><div class='del'>-		val = read_sysreg(pmceid0_el0);</div><div class='del'>-		/* always support CHAIN */</div><div class='del'>-		val |= BIT(ARMV8_PMUV3_PERFCTR_CHAIN);</div><div class='add'>+		val = compute_pmceid0(cpu_pmu);</div><div class='ctx'> 		base = 0;</div><div class='ctx'> 	} else {</div><div class='del'>-		val = read_sysreg(pmceid1_el0);</div><div class='del'>-		/*</div><div class='del'>-		 * Don't advertise STALL_SLOT*, as PMMIR_EL0 is handled</div><div class='del'>-		 * as RAZ</div><div class='del'>-		 */</div><div class='del'>-		val &amp;= ~(BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT - 32) |</div><div class='del'>-			 BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND - 32) |</div><div class='del'>-			 BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND - 32));</div><div class='add'>+		val = compute_pmceid1(cpu_pmu);</div><div class='ctx'> 		base = 32;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -804,20 +912,17 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	u64 mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	u64 mask = kvm_pmu_implemented_counter_mask(vcpu);</div><div class='ctx'> </div><div class='del'>-	kvm_pmu_handle_pmcr(vcpu, kvm_vcpu_read_pmcr(vcpu));</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, &amp;=, mask);</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, PMINTENSET_EL1, &amp;=, mask);</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, PMCNTENSET_EL0, &amp;=, mask);</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, PMOVSSET_EL0) &amp;= mask;</div><div class='del'>-	__vcpu_sys_reg(vcpu, PMINTENSET_EL1) &amp;= mask;</div><div class='del'>-	__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &amp;= mask;</div><div class='add'>+	kvm_pmu_reprogram_counter_mask(vcpu, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (!kvm_vcpu_has_pmu(vcpu))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	if (!vcpu-&gt;arch.pmu.created)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -840,9 +945,6 @@ int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		   return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* One-off reload of the PMU on first run */</div><div class='del'>-	kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -910,18 +1012,43 @@ u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm)</div><div class='ctx'> 	struct arm_pmu *arm_pmu = kvm-&gt;arch.arm_pmu;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * PMUv3 requires that all event counters are capable of counting any</div><div class='add'>+	 * event, though the same may not be true of non-PMUv3 hardware.</div><div class='add'>+	 */</div><div class='add'>+	if (cpus_have_final_cap(ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * The arm_pmu-&gt;cntr_mask considers the fixed counter(s) as well.</div><div class='ctx'> 	 * Ignore those and return only the general-purpose counters.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return bitmap_weight(arm_pmu-&gt;cntr_mask, ARMV8_PMU_MAX_GENERAL_COUNTERS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_arm_set_nr_counters(struct kvm *kvm, unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	kvm-&gt;arch.nr_pmu_counters = nr;</div><div class='add'>+</div><div class='add'>+	/* Reset MDCR_EL2.HPMN behind the vcpus' back... */</div><div class='add'>+	if (test_bit(KVM_ARM_VCPU_HAS_EL2, kvm-&gt;arch.vcpu_features)) {</div><div class='add'>+		struct kvm_vcpu *vcpu;</div><div class='add'>+		unsigned long i;</div><div class='add'>+</div><div class='add'>+		kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+			u64 val = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+			val &amp;= ~MDCR_EL2_HPMN;</div><div class='add'>+			val |= FIELD_PREP(MDCR_EL2_HPMN, kvm-&gt;arch.nr_pmu_counters);</div><div class='add'>+			__vcpu_assign_sys_reg(vcpu, MDCR_EL2, val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvm_arm_set_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.arm_pmu = arm_pmu;</div><div class='del'>-	kvm-&gt;arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);</div><div class='add'>+	kvm_arm_set_nr_counters(kvm, kvm_arm_pmu_get_max_counters(kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -977,6 +1104,20 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_arm_pmu_v3_set_nr_counters(struct kvm_vcpu *vcpu, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	if (!kvm-&gt;arch.arm_pmu)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (n &gt; kvm_arm_pmu_get_max_counters(kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	kvm_arm_set_nr_counters(kvm, n);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='hunk'>@@ -1073,6 +1214,15 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> </div><div class='ctx'> 		return kvm_arm_pmu_v3_set_pmu(vcpu, pmu_id);</div><div class='ctx'> 	}</div><div class='add'>+	case KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS: {</div><div class='add'>+		unsigned int __user *uaddr = (unsigned int __user *)(long)attr-&gt;addr;</div><div class='add'>+		unsigned int n;</div><div class='add'>+</div><div class='add'>+		if (get_user(n, uaddr))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		return kvm_arm_pmu_v3_set_nr_counters(vcpu, n);</div><div class='add'>+	}</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_INIT:</div><div class='ctx'> 		return kvm_arm_pmu_v3_init(vcpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1111,6 +1261,7 @@ int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_INIT:</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_FILTER:</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_SET_PMU:</div><div class='add'>+	case KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS:</div><div class='ctx'> 		if (kvm_vcpu_has_pmu(vcpu))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1120,13 +1271,26 @@ int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> </div><div class='ctx'> u8 kvm_arm_pmu_get_pmuver_limit(void)</div><div class='ctx'> {</div><div class='del'>-	u64 tmp;</div><div class='add'>+	unsigned int pmuver;</div><div class='add'>+</div><div class='add'>+	pmuver = SYS_FIELD_GET(ID_AA64DFR0_EL1, PMUVer,</div><div class='add'>+			       read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Spoof a barebones PMUv3 implementation if the system supports IMPDEF</div><div class='add'>+	 * traps of the PMUv3 sysregs</div><div class='add'>+	 */</div><div class='add'>+	if (cpus_have_final_cap(ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS))</div><div class='add'>+		return ID_AA64DFR0_EL1_PMUVer_IMP;</div><div class='ctx'> </div><div class='del'>-	tmp = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);</div><div class='del'>-	tmp = cpuid_feature_cap_perfmon_field(tmp,</div><div class='del'>-					      ID_AA64DFR0_EL1_PMUVer_SHIFT,</div><div class='del'>-					      ID_AA64DFR0_EL1_PMUVer_V3P5);</div><div class='del'>-	return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), tmp);</div><div class='add'>+	/*</div><div class='add'>+	 * Otherwise, treat IMPLEMENTATION DEFINED functionality as</div><div class='add'>+	 * unimplemented</div><div class='add'>+	 */</div><div class='add'>+	if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return min(pmuver, ID_AA64DFR0_EL1_PMUVer_V3P5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1136,6 +1300,36 @@ u8 kvm_arm_pmu_get_pmuver_limit(void)</div><div class='ctx'> u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0);</div><div class='add'>+	u64 n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+</div><div class='add'>+	if (vcpu_has_nv(vcpu) &amp;&amp; !vcpu_is_el2(vcpu))</div><div class='add'>+		n = FIELD_GET(MDCR_EL2_HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));</div><div class='add'>+</div><div class='add'>+	return u64_replace_bits(pmcr, n, ARMV8_PMU_PMCR_N);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool reprogrammed = false;</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);</div><div class='add'>+	for_each_set_bit(i, &amp;mask, 32) {</div><div class='add'>+		struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, i);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We only need to reconfigure events where the filter is</div><div class='add'>+		 * different at EL1 vs. EL2, as we're multiplexing the true EL1</div><div class='add'>+		 * event filter bit for nested.</div><div class='add'>+		 */</div><div class='add'>+		if (kvm_pmc_counts_at_el1(pmc) == kvm_pmc_counts_at_el2(pmc))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		kvm_pmu_create_perf_event(pmc);</div><div class='add'>+		reprogrammed = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return u64_replace_bits(pmcr, vcpu-&gt;kvm-&gt;arch.pmcr_n, ARMV8_PMU_PMCR_N);</div><div class='add'>+	if (reprogrammed)</div><div class='add'>+		kvm_vcpu_pmu_restore_guest(vcpu);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c<br/>index 0b3adf3e17b4..6b48a3d16d0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/pmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/pmu.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@ void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pmu_events *pmu = kvm_get_pmu_events();</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3() || !kvm_pmu_switch_needed(attr))</div><div class='add'>+	if (!system_supports_pmuv3() || !kvm_pmu_switch_needed(attr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (!attr-&gt;exclude_host)</div><div class='hunk'>@@ -57,7 +57,7 @@ void kvm_clr_pmu_events(u64 clr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pmu_events *pmu = kvm_get_pmu_events();</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3())</div><div class='add'>+	if (!system_supports_pmuv3())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pmu-&gt;events_host &amp;= ~clr;</div><div class='hunk'>@@ -133,7 +133,7 @@ void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_pmu_events *pmu;</div><div class='ctx'> 	u64 events_guest, events_host;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3() || !has_vhe())</div><div class='add'>+	if (!system_supports_pmuv3() || !has_vhe())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='hunk'>@@ -154,7 +154,7 @@ void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_pmu_events *pmu;</div><div class='ctx'> 	u64 events_guest, events_host;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3() || !has_vhe())</div><div class='add'>+	if (!system_supports_pmuv3() || !has_vhe())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pmu = kvm_get_pmu_events();</div><div class='hunk'>@@ -180,7 +180,7 @@ bool kvm_set_pmuserenr(u64 val)</div><div class='ctx'> 	struct kvm_cpu_context *hctxt;</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arm_support_pmu_v3() || !has_vhe())</div><div class='add'>+	if (!system_supports_pmuv3() || !has_vhe())</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	vcpu = kvm_get_running_vcpu();</div><div class='head'>diff --git a/arch/arm64/kvm/psci.c b/arch/arm64/kvm/psci.c<br/>index 1f69b667332b..3b5dbe9a0a0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/psci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/psci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/psci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/psci.c</a></div><div class='hunk'>@@ -194,6 +194,12 @@ static void kvm_psci_system_off(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_psci_system_off2(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN,</div><div class='add'>+				 KVM_SYSTEM_EVENT_SHUTDOWN_FLAG_PSCI_OFF2);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET, 0);</div><div class='hunk'>@@ -322,7 +328,7 @@ static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)</div><div class='ctx'> </div><div class='ctx'> 	switch(psci_fn) {</div><div class='ctx'> 	case PSCI_0_2_FN_PSCI_VERSION:</div><div class='del'>-		val = minor == 0 ? KVM_ARM_PSCI_1_0 : KVM_ARM_PSCI_1_1;</div><div class='add'>+		val = PSCI_VERSION(1, minor);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PSCI_1_0_FN_PSCI_FEATURES:</div><div class='ctx'> 		arg = smccc_get_arg1(vcpu);</div><div class='hunk'>@@ -358,6 +364,11 @@ static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)</div><div class='ctx'> 			if (minor &gt;= 1)</div><div class='ctx'> 				val = 0;</div><div class='ctx'> 			break;</div><div class='add'>+		case PSCI_1_3_FN_SYSTEM_OFF2:</div><div class='add'>+		case PSCI_1_3_FN64_SYSTEM_OFF2:</div><div class='add'>+			if (minor &gt;= 3)</div><div class='add'>+				val = PSCI_1_3_OFF_TYPE_HIBERNATE_OFF;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PSCI_1_0_FN_SYSTEM_SUSPEND:</div><div class='hunk'>@@ -392,6 +403,33 @@ static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case PSCI_1_3_FN_SYSTEM_OFF2:</div><div class='add'>+		kvm_psci_narrow_to_32bit(vcpu);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PSCI_1_3_FN64_SYSTEM_OFF2:</div><div class='add'>+		if (minor &lt; 3)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		arg = smccc_get_arg1(vcpu);</div><div class='add'>+		/*</div><div class='add'>+		 * SYSTEM_OFF2 defaults to HIBERNATE_OFF if arg1 is zero. arg2</div><div class='add'>+		 * must be zero.</div><div class='add'>+		 */</div><div class='add'>+		if ((arg &amp;&amp; arg != PSCI_1_3_OFF_TYPE_HIBERNATE_OFF) ||</div><div class='add'>+		    smccc_get_arg2(vcpu) != 0) {</div><div class='add'>+			val = PSCI_RET_INVALID_PARAMS;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		kvm_psci_system_off2(vcpu);</div><div class='add'>+		/*</div><div class='add'>+		 * We shouldn't be going back to the guest after receiving a</div><div class='add'>+		 * SYSTEM_OFF2 request. Preload a return value of</div><div class='add'>+		 * INTERNAL_FAILURE should userspace ignore the exit and resume</div><div class='add'>+		 * the vCPU.</div><div class='add'>+		 */</div><div class='add'>+		val = PSCI_RET_INTERNAL_FAILURE;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return kvm_psci_0_2_call(vcpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -449,6 +487,10 @@ int kvm_psci_call(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (version) {</div><div class='add'>+	case KVM_ARM_PSCI_1_3:</div><div class='add'>+		return kvm_psci_1_x_call(vcpu, 3);</div><div class='add'>+	case KVM_ARM_PSCI_1_2:</div><div class='add'>+		return kvm_psci_1_x_call(vcpu, 2);</div><div class='ctx'> 	case KVM_ARM_PSCI_1_1:</div><div class='ctx'> 		return kvm_psci_1_x_call(vcpu, 1);</div><div class='ctx'> 	case KVM_ARM_PSCI_1_0:</div><div class='head'>diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c<br/>index e4a342e903e2..dc5acfb00af9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/ptdump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/ptdump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/ptdump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/ptdump.c</a></div><div class='hunk'>@@ -32,28 +32,28 @@ static const struct ptdump_prot_bits stage2_pte_bits[] = {</div><div class='ctx'> 		.set	= " ",</div><div class='ctx'> 		.clear	= "F",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | PTE_VALID,</div><div class='del'>-		.val	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | PTE_VALID,</div><div class='add'>+		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R,</div><div class='add'>+		.val	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R,</div><div class='ctx'> 		.set	= "R",</div><div class='ctx'> 		.clear	= " ",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | PTE_VALID,</div><div class='del'>-		.val	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | PTE_VALID,</div><div class='add'>+		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,</div><div class='add'>+		.val	= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,</div><div class='ctx'> 		.set	= "W",</div><div class='ctx'> 		.clear	= " ",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= KVM_PTE_LEAF_ATTR_HI_S2_XN | PTE_VALID,</div><div class='del'>-		.val	= PTE_VALID,</div><div class='del'>-		.set	= " ",</div><div class='del'>-		.clear	= "X",</div><div class='add'>+		.mask	= KVM_PTE_LEAF_ATTR_HI_S2_XN,</div><div class='add'>+		.val	= KVM_PTE_LEAF_ATTR_HI_S2_XN,</div><div class='add'>+		.set	= "NX",</div><div class='add'>+		.clear	= "x ",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_AF | PTE_VALID,</div><div class='del'>-		.val	= KVM_PTE_LEAF_ATTR_LO_S2_AF | PTE_VALID,</div><div class='add'>+		.mask	= KVM_PTE_LEAF_ATTR_LO_S2_AF,</div><div class='add'>+		.val	= KVM_PTE_LEAF_ATTR_LO_S2_AF,</div><div class='ctx'> 		.set	= "AF",</div><div class='ctx'> 		.clear	= "  ",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= PTE_TABLE_BIT | PTE_VALID,</div><div class='del'>-		.val	= PTE_VALID,</div><div class='add'>+		.mask	= PMD_TYPE_MASK,</div><div class='add'>+		.val	= PMD_TYPE_SECT,</div><div class='ctx'> 		.set	= "BLK",</div><div class='ctx'> 		.clear	= "   ",</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c<br/>index 0b0ae5ae7bc2..959532422d3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/reset.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/reset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/reset.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/reset.c</a></div><div class='hunk'>@@ -85,7 +85,7 @@ static void kvm_vcpu_enable_sve(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * KVM_REG_ARM64_SVE_VLS.  Allocation is deferred until</div><div class='ctx'> 	 * kvm_arm_vcpu_finalize(), which freezes the configuration.</div><div class='ctx'> 	 */</div><div class='del'>-	vcpu_set_flag(vcpu, GUEST_HAS_SVE);</div><div class='add'>+	set_bit(KVM_ARCH_FLAG_GUEST_HAS_SVE, &amp;vcpu-&gt;kvm-&gt;arch.flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -158,6 +158,8 @@ void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (sve_state)</div><div class='ctx'> 		kvm_unshare_hyp(sve_state, sve_state + vcpu_sve_state_size(vcpu));</div><div class='ctx'> 	kfree(sve_state);</div><div class='add'>+	free_page((unsigned long)vcpu-&gt;arch.ctxt.vncr_array);</div><div class='add'>+	kfree(vcpu-&gt;arch.vncr_tlb);</div><div class='ctx'> 	kfree(vcpu-&gt;arch.ccsidr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -167,11 +169,6 @@ static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		memset(vcpu-&gt;arch.sve_state, 0, vcpu_sve_state_size(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	vcpu_set_flag(vcpu, GUEST_HAS_PTRAUTH);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_reset_vcpu - sets core registers and sys_regs to reset value</div><div class='ctx'>  * @vcpu: The VCPU pointer</div><div class='hunk'>@@ -201,9 +198,6 @@ void kvm_reset_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vcpu-&gt;arch.reset_state.reset = false;</div><div class='ctx'> 	spin_unlock(&amp;vcpu-&gt;arch.mp_state_lock);</div><div class='ctx'> </div><div class='del'>-	/* Reset PMU outside of the non-preemptible section */</div><div class='del'>-	kvm_pmu_vcpu_reset(vcpu);</div><div class='del'>-</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> 	loaded = (vcpu-&gt;cpu != -1);</div><div class='ctx'> 	if (loaded)</div><div class='hunk'>@@ -216,10 +210,6 @@ void kvm_reset_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		kvm_vcpu_reset_sve(vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PTRAUTH_ADDRESS) ||</div><div class='del'>-	    vcpu_has_feature(vcpu, KVM_ARM_VCPU_PTRAUTH_GENERIC))</div><div class='del'>-		kvm_vcpu_enable_ptrauth(vcpu);</div><div class='del'>-</div><div class='ctx'> 	if (vcpu_el1_is_32bit(vcpu))</div><div class='ctx'> 		pstate = VCPU_RESET_PSTATE_SVC;</div><div class='ctx'> 	else if (vcpu_has_nv(vcpu))</div><div class='head'>diff --git a/arch/arm64/kvm/stacktrace.c b/arch/arm64/kvm/stacktrace.c<br/>index 3ace5b75813b..af5eec681127 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/stacktrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/stacktrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/stacktrace.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace/nvhe.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct stack_info stackinfo_get_overflow(void)</div><div class='hunk'>@@ -50,7 +51,7 @@ static struct stack_info stackinfo_get_hyp(void)</div><div class='ctx'> 	struct kvm_nvhe_stacktrace_info *stacktrace_info</div><div class='ctx'> 				= this_cpu_ptr_nvhe_sym(kvm_stacktrace_info);</div><div class='ctx'> 	unsigned long low = (unsigned long)stacktrace_info-&gt;stack_base;</div><div class='del'>-	unsigned long high = low + PAGE_SIZE;</div><div class='add'>+	unsigned long high = low + NVHE_STACK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	return (struct stack_info) {</div><div class='ctx'> 		.low = low,</div><div class='hunk'>@@ -60,8 +61,8 @@ static struct stack_info stackinfo_get_hyp(void)</div><div class='ctx'> </div><div class='ctx'> static struct stack_info stackinfo_get_hyp_kern_va(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long low = (unsigned long)*this_cpu_ptr(&amp;kvm_arm_hyp_stack_page);</div><div class='del'>-	unsigned long high = low + PAGE_SIZE;</div><div class='add'>+	unsigned long low = (unsigned long)*this_cpu_ptr(&amp;kvm_arm_hyp_stack_base);</div><div class='add'>+	unsigned long high = low + NVHE_STACK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	return (struct stack_info) {</div><div class='ctx'> 		.low = low,</div><div class='hunk'>@@ -145,7 +146,7 @@ static void unwind(struct unwind_state *state,</div><div class='ctx'>  */</div><div class='ctx'> static bool kvm_nvhe_dump_backtrace_entry(void *arg, unsigned long where)</div><div class='ctx'> {</div><div class='del'>-	unsigned long va_mask = GENMASK_ULL(vabits_actual - 1, 0);</div><div class='add'>+	unsigned long va_mask = GENMASK_ULL(__hyp_va_bits - 1, 0);</div><div class='ctx'> 	unsigned long hyp_offset = (unsigned long)arg;</div><div class='ctx'> </div><div class='ctx'> 	/* Mask tags and convert to kern addr */</div><div class='head'>diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c<br/>index dad88e31f953..91053aa832d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/sys_regs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/sys_regs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/sys_regs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/sys_regs.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/arm-gic-v3.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/arm_pmuv3.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='hunk'>@@ -81,36 +82,105 @@ static bool write_to_read_only(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			"sys_reg write to read-only register");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define PURE_EL2_SYSREG(el2)						\</div><div class='del'>-	case el2: {							\</div><div class='del'>-		*el1r = el2;						\</div><div class='del'>-		return true;						\</div><div class='add'>+enum sr_loc_attr {</div><div class='add'>+	SR_LOC_MEMORY	= 0,	  /* Register definitely in memory */</div><div class='add'>+	SR_LOC_LOADED	= BIT(0), /* Register on CPU, unless it cannot */</div><div class='add'>+	SR_LOC_MAPPED	= BIT(1), /* Register in a different CPU register */</div><div class='add'>+	SR_LOC_XLATED	= BIT(2), /* Register translated to fit another reg */</div><div class='add'>+	SR_LOC_SPECIAL	= BIT(3), /* Demanding register, implies loaded */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sr_loc {</div><div class='add'>+	enum sr_loc_attr loc;</div><div class='add'>+	enum vcpu_sysreg map_reg;</div><div class='add'>+	u64		 (*xlate)(u64);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum sr_loc_attr locate_direct_register(const struct kvm_vcpu *vcpu,</div><div class='add'>+					       enum vcpu_sysreg reg)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case SCTLR_EL1:</div><div class='add'>+	case CPACR_EL1:</div><div class='add'>+	case TTBR0_EL1:</div><div class='add'>+	case TTBR1_EL1:</div><div class='add'>+	case TCR_EL1:</div><div class='add'>+	case TCR2_EL1:</div><div class='add'>+	case PIR_EL1:</div><div class='add'>+	case PIRE0_EL1:</div><div class='add'>+	case POR_EL1:</div><div class='add'>+	case ESR_EL1:</div><div class='add'>+	case AFSR0_EL1:</div><div class='add'>+	case AFSR1_EL1:</div><div class='add'>+	case FAR_EL1:</div><div class='add'>+	case MAIR_EL1:</div><div class='add'>+	case VBAR_EL1:</div><div class='add'>+	case CONTEXTIDR_EL1:</div><div class='add'>+	case AMAIR_EL1:</div><div class='add'>+	case CNTKCTL_EL1:</div><div class='add'>+	case ELR_EL1:</div><div class='add'>+	case SPSR_EL1:</div><div class='add'>+	case ZCR_EL1:</div><div class='add'>+	case SCTLR2_EL1:</div><div class='add'>+		/*</div><div class='add'>+		 * EL1 registers which have an ELx2 mapping are loaded if</div><div class='add'>+		 * we're not in hypervisor context.</div><div class='add'>+		 */</div><div class='add'>+		return is_hyp_ctxt(vcpu) ? SR_LOC_MEMORY : SR_LOC_LOADED;</div><div class='add'>+</div><div class='add'>+	case TPIDR_EL0:</div><div class='add'>+	case TPIDRRO_EL0:</div><div class='add'>+	case TPIDR_EL1:</div><div class='add'>+	case PAR_EL1:</div><div class='add'>+	case DACR32_EL2:</div><div class='add'>+	case IFSR32_EL2:</div><div class='add'>+	case DBGVCR32_EL2:</div><div class='add'>+		/* These registers are always loaded, no matter what */</div><div class='add'>+		return SR_LOC_LOADED;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		/* Non-mapped EL2 registers are by definition in memory. */</div><div class='add'>+		return SR_LOC_MEMORY;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define MAPPED_EL2_SYSREG(el2, el1, fn)					\</div><div class='del'>-	case el2: {							\</div><div class='del'>-		*xlate = fn;						\</div><div class='del'>-		*el1r = el1;						\</div><div class='del'>-		return true;						\</div><div class='add'>+static void locate_mapped_el2_register(const struct kvm_vcpu *vcpu,</div><div class='add'>+				       enum vcpu_sysreg reg,</div><div class='add'>+				       enum vcpu_sysreg map_reg,</div><div class='add'>+				       u64 (*xlate)(u64),</div><div class='add'>+				       struct sr_loc *loc)</div><div class='add'>+{</div><div class='add'>+	if (!is_hyp_ctxt(vcpu)) {</div><div class='add'>+		loc-&gt;loc = SR_LOC_MEMORY;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	loc-&gt;loc = SR_LOC_LOADED | SR_LOC_MAPPED;</div><div class='add'>+	loc-&gt;map_reg = map_reg;</div><div class='add'>+</div><div class='add'>+	WARN_ON(locate_direct_register(vcpu, map_reg) != SR_LOC_MEMORY);</div><div class='add'>+</div><div class='add'>+	if (xlate != NULL &amp;&amp; !vcpu_el2_e2h_is_set(vcpu)) {</div><div class='add'>+		loc-&gt;loc |= SR_LOC_XLATED;</div><div class='add'>+		loc-&gt;xlate = xlate;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static bool get_el2_to_el1_mapping(unsigned int reg,</div><div class='del'>-				   unsigned int *el1r, u64 (**xlate)(u64))</div><div class='add'>+#define MAPPED_EL2_SYSREG(r, m, t)					\</div><div class='add'>+	case r:	{							\</div><div class='add'>+		locate_mapped_el2_register(vcpu, r, m, t, loc);		\</div><div class='add'>+		break;							\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static void locate_register(const struct kvm_vcpu *vcpu, enum vcpu_sysreg reg,</div><div class='add'>+			    struct sr_loc *loc)</div><div class='ctx'> {</div><div class='add'>+	if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU)) {</div><div class='add'>+		loc-&gt;loc = SR_LOC_MEMORY;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (reg) {</div><div class='del'>-		PURE_EL2_SYSREG(  VPIDR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  VMPIDR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  ACTLR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  HCR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  MDCR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  HSTR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  HACR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  VTTBR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  VTCR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  RVBAR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  TPIDR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  HPFAR_EL2	);</div><div class='del'>-		PURE_EL2_SYSREG(  CNTHCTL_EL2	);</div><div class='ctx'> 		MAPPED_EL2_SYSREG(SCTLR_EL2,   SCTLR_EL1,</div><div class='ctx'> 				  translate_sctlr_el2_to_sctlr_el1	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(CPTR_EL2,    CPACR_EL1,</div><div class='hunk'>@@ -126,99 +196,200 @@ static bool get_el2_to_el1_mapping(unsigned int reg,</div><div class='ctx'> 		MAPPED_EL2_SYSREG(ESR_EL2,     ESR_EL1,     NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(FAR_EL2,     FAR_EL1,     NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(MAIR_EL2,    MAIR_EL1,    NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(TCR2_EL2,    TCR2_EL1,    NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(PIR_EL2,     PIR_EL1,     NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(PIRE0_EL2,   PIRE0_EL1,   NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(POR_EL2,     POR_EL1,     NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(AMAIR_EL2,   AMAIR_EL1,   NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(ELR_EL2,     ELR_EL1,	    NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(SPSR_EL2,    SPSR_EL1,    NULL	     );</div><div class='ctx'> 		MAPPED_EL2_SYSREG(ZCR_EL2,     ZCR_EL1,     NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(CONTEXTIDR_EL2, CONTEXTIDR_EL1, NULL	     );</div><div class='add'>+		MAPPED_EL2_SYSREG(SCTLR2_EL2,  SCTLR2_EL1,  NULL	     );</div><div class='add'>+	case CNTHCTL_EL2:</div><div class='add'>+		/* CNTHCTL_EL2 is super special, until we support NV2.1 */</div><div class='add'>+		loc-&gt;loc = ((is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu)) ?</div><div class='add'>+			    SR_LOC_SPECIAL : SR_LOC_MEMORY);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return false;</div><div class='add'>+		loc-&gt;loc = locate_direct_register(vcpu, reg);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)</div><div class='add'>+static u64 read_sr_from_cpu(enum vcpu_sysreg reg)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val = 0x8badf00d8badf00d;</div><div class='del'>-	u64 (*xlate)(u64) = NULL;</div><div class='del'>-	unsigned int el1r;</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU))</div><div class='del'>-		goto memory_read;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case SCTLR_EL1:		val = read_sysreg_s(SYS_SCTLR_EL12);	break;</div><div class='add'>+	case CPACR_EL1:		val = read_sysreg_s(SYS_CPACR_EL12);	break;</div><div class='add'>+	case TTBR0_EL1:		val = read_sysreg_s(SYS_TTBR0_EL12);	break;</div><div class='add'>+	case TTBR1_EL1:		val = read_sysreg_s(SYS_TTBR1_EL12);	break;</div><div class='add'>+	case TCR_EL1:		val = read_sysreg_s(SYS_TCR_EL12);	break;</div><div class='add'>+	case TCR2_EL1:		val = read_sysreg_s(SYS_TCR2_EL12);	break;</div><div class='add'>+	case PIR_EL1:		val = read_sysreg_s(SYS_PIR_EL12);	break;</div><div class='add'>+	case PIRE0_EL1:		val = read_sysreg_s(SYS_PIRE0_EL12);	break;</div><div class='add'>+	case POR_EL1:		val = read_sysreg_s(SYS_POR_EL12);	break;</div><div class='add'>+	case ESR_EL1:		val = read_sysreg_s(SYS_ESR_EL12);	break;</div><div class='add'>+	case AFSR0_EL1:		val = read_sysreg_s(SYS_AFSR0_EL12);	break;</div><div class='add'>+	case AFSR1_EL1:		val = read_sysreg_s(SYS_AFSR1_EL12);	break;</div><div class='add'>+	case FAR_EL1:		val = read_sysreg_s(SYS_FAR_EL12);	break;</div><div class='add'>+	case MAIR_EL1:		val = read_sysreg_s(SYS_MAIR_EL12);	break;</div><div class='add'>+	case VBAR_EL1:		val = read_sysreg_s(SYS_VBAR_EL12);	break;</div><div class='add'>+	case CONTEXTIDR_EL1:	val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;</div><div class='add'>+	case AMAIR_EL1:		val = read_sysreg_s(SYS_AMAIR_EL12);	break;</div><div class='add'>+	case CNTKCTL_EL1:	val = read_sysreg_s(SYS_CNTKCTL_EL12);	break;</div><div class='add'>+	case ELR_EL1:		val = read_sysreg_s(SYS_ELR_EL12);	break;</div><div class='add'>+	case SPSR_EL1:		val = read_sysreg_s(SYS_SPSR_EL12);	break;</div><div class='add'>+	case ZCR_EL1:		val = read_sysreg_s(SYS_ZCR_EL12);	break;</div><div class='add'>+	case SCTLR2_EL1:	val = read_sysreg_s(SYS_SCTLR2_EL12);	break;</div><div class='add'>+	case TPIDR_EL0:		val = read_sysreg_s(SYS_TPIDR_EL0);	break;</div><div class='add'>+	case TPIDRRO_EL0:	val = read_sysreg_s(SYS_TPIDRRO_EL0);	break;</div><div class='add'>+	case TPIDR_EL1:		val = read_sysreg_s(SYS_TPIDR_EL1);	break;</div><div class='add'>+	case PAR_EL1:		val = read_sysreg_par();		break;</div><div class='add'>+	case DACR32_EL2:	val = read_sysreg_s(SYS_DACR32_EL2);	break;</div><div class='add'>+	case IFSR32_EL2:	val = read_sysreg_s(SYS_IFSR32_EL2);	break;</div><div class='add'>+	case DBGVCR32_EL2:	val = read_sysreg_s(SYS_DBGVCR32_EL2);	break;</div><div class='add'>+	default:		WARN_ON_ONCE(1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (unlikely(get_el2_to_el1_mapping(reg, &amp;el1r, &amp;xlate))) {</div><div class='del'>-		if (!is_hyp_ctxt(vcpu))</div><div class='del'>-			goto memory_read;</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * If this register does not have an EL1 counterpart,</div><div class='del'>-		 * then read the stored EL2 version.</div><div class='del'>-		 */</div><div class='del'>-		if (reg == el1r)</div><div class='del'>-			goto memory_read;</div><div class='add'>+static void write_sr_to_cpu(enum vcpu_sysreg reg, u64 val)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case SCTLR_EL1:		write_sysreg_s(val, SYS_SCTLR_EL12);	break;</div><div class='add'>+	case CPACR_EL1:		write_sysreg_s(val, SYS_CPACR_EL12);	break;</div><div class='add'>+	case TTBR0_EL1:		write_sysreg_s(val, SYS_TTBR0_EL12);	break;</div><div class='add'>+	case TTBR1_EL1:		write_sysreg_s(val, SYS_TTBR1_EL12);	break;</div><div class='add'>+	case TCR_EL1:		write_sysreg_s(val, SYS_TCR_EL12);	break;</div><div class='add'>+	case TCR2_EL1:		write_sysreg_s(val, SYS_TCR2_EL12);	break;</div><div class='add'>+	case PIR_EL1:		write_sysreg_s(val, SYS_PIR_EL12);	break;</div><div class='add'>+	case PIRE0_EL1:		write_sysreg_s(val, SYS_PIRE0_EL12);	break;</div><div class='add'>+	case POR_EL1:		write_sysreg_s(val, SYS_POR_EL12);	break;</div><div class='add'>+	case ESR_EL1:		write_sysreg_s(val, SYS_ESR_EL12);	break;</div><div class='add'>+	case AFSR0_EL1:		write_sysreg_s(val, SYS_AFSR0_EL12);	break;</div><div class='add'>+	case AFSR1_EL1:		write_sysreg_s(val, SYS_AFSR1_EL12);	break;</div><div class='add'>+	case FAR_EL1:		write_sysreg_s(val, SYS_FAR_EL12);	break;</div><div class='add'>+	case MAIR_EL1:		write_sysreg_s(val, SYS_MAIR_EL12);	break;</div><div class='add'>+	case VBAR_EL1:		write_sysreg_s(val, SYS_VBAR_EL12);	break;</div><div class='add'>+	case CONTEXTIDR_EL1:	write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;</div><div class='add'>+	case AMAIR_EL1:		write_sysreg_s(val, SYS_AMAIR_EL12);	break;</div><div class='add'>+	case CNTKCTL_EL1:	write_sysreg_s(val, SYS_CNTKCTL_EL12);	break;</div><div class='add'>+	case ELR_EL1:		write_sysreg_s(val, SYS_ELR_EL12);	break;</div><div class='add'>+	case SPSR_EL1:		write_sysreg_s(val, SYS_SPSR_EL12);	break;</div><div class='add'>+	case ZCR_EL1:		write_sysreg_s(val, SYS_ZCR_EL12);	break;</div><div class='add'>+	case SCTLR2_EL1:	write_sysreg_s(val, SYS_SCTLR2_EL12);	break;</div><div class='add'>+	case TPIDR_EL0:		write_sysreg_s(val, SYS_TPIDR_EL0);	break;</div><div class='add'>+	case TPIDRRO_EL0:	write_sysreg_s(val, SYS_TPIDRRO_EL0);	break;</div><div class='add'>+	case TPIDR_EL1:		write_sysreg_s(val, SYS_TPIDR_EL1);	break;</div><div class='add'>+	case PAR_EL1:		write_sysreg_s(val, SYS_PAR_EL1);	break;</div><div class='add'>+	case DACR32_EL2:	write_sysreg_s(val, SYS_DACR32_EL2);	break;</div><div class='add'>+	case IFSR32_EL2:	write_sysreg_s(val, SYS_IFSR32_EL2);	break;</div><div class='add'>+	case DBGVCR32_EL2:	write_sysreg_s(val, SYS_DBGVCR32_EL2);	break;</div><div class='add'>+	default:		WARN_ON_ONCE(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, enum vcpu_sysreg reg)</div><div class='add'>+{</div><div class='add'>+	struct sr_loc loc = {};</div><div class='add'>+</div><div class='add'>+	locate_register(vcpu, reg, &amp;loc);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!has_vhe() &amp;&amp; loc.loc != SR_LOC_MEMORY);</div><div class='add'>+</div><div class='add'>+	if (loc.loc &amp; SR_LOC_SPECIAL) {</div><div class='add'>+		u64 val;</div><div class='add'>+</div><div class='add'>+		WARN_ON_ONCE(loc.loc &amp; ~SR_LOC_SPECIAL);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * If we have a non-VHE guest and that the sysreg</div><div class='del'>-		 * requires translation to be used at EL1, use the</div><div class='del'>-		 * in-memory copy instead.</div><div class='add'>+		 * CNTHCTL_EL2 requires some special treatment to account</div><div class='add'>+		 * for the bits that can be set via CNTKCTL_EL1 when E2H==1.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!vcpu_el2_e2h_is_set(vcpu) &amp;&amp; xlate)</div><div class='del'>-			goto memory_read;</div><div class='del'>-</div><div class='del'>-		/* Get the current version of the EL1 counterpart. */</div><div class='del'>-		WARN_ON(!__vcpu_read_sys_reg_from_cpu(el1r, &amp;val));</div><div class='del'>-		return val;</div><div class='add'>+		switch (reg) {</div><div class='add'>+		case CNTHCTL_EL2:</div><div class='add'>+			val = read_sysreg_el1(SYS_CNTKCTL);</div><div class='add'>+			val &amp;= CNTKCTL_VALID_BITS;</div><div class='add'>+			val |= __vcpu_sys_reg(vcpu, reg) &amp; ~CNTKCTL_VALID_BITS;</div><div class='add'>+			return val;</div><div class='add'>+		default:</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* EL1 register can't be on the CPU if the guest is in vEL2. */</div><div class='del'>-	if (unlikely(is_hyp_ctxt(vcpu)))</div><div class='del'>-		goto memory_read;</div><div class='add'>+	if (loc.loc &amp; SR_LOC_LOADED) {</div><div class='add'>+		enum vcpu_sysreg map_reg = reg;</div><div class='ctx'> </div><div class='del'>-	if (__vcpu_read_sys_reg_from_cpu(reg, &amp;val))</div><div class='del'>-		return val;</div><div class='add'>+		if (loc.loc &amp; SR_LOC_MAPPED)</div><div class='add'>+			map_reg = loc.map_reg;</div><div class='add'>+</div><div class='add'>+		if (!(loc.loc &amp; SR_LOC_XLATED)) {</div><div class='add'>+			u64 val = read_sr_from_cpu(map_reg);</div><div class='add'>+</div><div class='add'>+			if (reg &gt;= __SANITISED_REG_START__)</div><div class='add'>+				val = kvm_vcpu_apply_reg_masks(vcpu, reg, val);</div><div class='add'>+</div><div class='add'>+			return val;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-memory_read:</div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)</div><div class='add'>+void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, enum vcpu_sysreg reg)</div><div class='ctx'> {</div><div class='del'>-	u64 (*xlate)(u64) = NULL;</div><div class='del'>-	unsigned int el1r;</div><div class='del'>-</div><div class='del'>-	if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU))</div><div class='del'>-		goto memory_write;</div><div class='add'>+	struct sr_loc loc = {};</div><div class='ctx'> </div><div class='del'>-	if (unlikely(get_el2_to_el1_mapping(reg, &amp;el1r, &amp;xlate))) {</div><div class='del'>-		if (!is_hyp_ctxt(vcpu))</div><div class='del'>-			goto memory_write;</div><div class='add'>+	locate_register(vcpu, reg, &amp;loc);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Always store a copy of the write to memory to avoid having</div><div class='del'>-		 * to reverse-translate virtual EL2 system registers for a</div><div class='del'>-		 * non-VHE guest hypervisor.</div><div class='del'>-		 */</div><div class='del'>-		__vcpu_sys_reg(vcpu, reg) = val;</div><div class='add'>+	WARN_ON_ONCE(!has_vhe() &amp;&amp; loc.loc != SR_LOC_MEMORY);</div><div class='ctx'> </div><div class='del'>-		/* No EL1 counterpart? We're done here.? */</div><div class='del'>-		if (reg == el1r)</div><div class='del'>-			return;</div><div class='add'>+	if (loc.loc &amp; SR_LOC_SPECIAL) {</div><div class='ctx'> </div><div class='del'>-		if (!vcpu_el2_e2h_is_set(vcpu) &amp;&amp; xlate)</div><div class='del'>-			val = xlate(val);</div><div class='add'>+		WARN_ON_ONCE(loc.loc &amp; ~SR_LOC_SPECIAL);</div><div class='ctx'> </div><div class='del'>-		/* Redirect this to the EL1 version of the register. */</div><div class='del'>-		WARN_ON(!__vcpu_write_sys_reg_to_cpu(val, el1r));</div><div class='del'>-		return;</div><div class='add'>+		switch (reg) {</div><div class='add'>+		case CNTHCTL_EL2:</div><div class='add'>+			/*</div><div class='add'>+			 * If E2H=1, some of the bits are backed by</div><div class='add'>+			 * CNTKCTL_EL1, while the rest is kept in memory.</div><div class='add'>+			 * Yes, this is fun stuff.</div><div class='add'>+			 */</div><div class='add'>+			write_sysreg_el1(val, SYS_CNTKCTL);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* EL1 register can't be on the CPU if the guest is in vEL2. */</div><div class='del'>-	if (unlikely(is_hyp_ctxt(vcpu)))</div><div class='del'>-		goto memory_write;</div><div class='add'>+	if (loc.loc &amp; SR_LOC_LOADED) {</div><div class='add'>+		enum vcpu_sysreg map_reg = reg;</div><div class='add'>+		u64 xlated_val;</div><div class='ctx'> </div><div class='del'>-	if (__vcpu_write_sys_reg_to_cpu(val, reg))</div><div class='del'>-		return;</div><div class='add'>+		if (reg &gt;= __SANITISED_REG_START__)</div><div class='add'>+			val = kvm_vcpu_apply_reg_masks(vcpu, reg, val);</div><div class='add'>+</div><div class='add'>+		if (loc.loc &amp; SR_LOC_MAPPED)</div><div class='add'>+			map_reg = loc.map_reg;</div><div class='ctx'> </div><div class='del'>-memory_write:</div><div class='del'>-	 __vcpu_sys_reg(vcpu, reg) = val;</div><div class='add'>+		if (loc.loc &amp; SR_LOC_XLATED)</div><div class='add'>+			xlated_val = loc.xlate(val);</div><div class='add'>+		else</div><div class='add'>+			xlated_val = val;</div><div class='add'>+</div><div class='add'>+		write_sr_to_cpu(map_reg, xlated_val);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Fall through to write the backing store anyway, which</div><div class='add'>+		 * allows translated registers to be directly read without a</div><div class='add'>+		 * reverse translation.</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */</div><div class='hunk'>@@ -390,10 +561,6 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	bool was_enabled = vcpu_has_cache_enabled(vcpu);</div><div class='ctx'> 	u64 val, mask, shift;</div><div class='ctx'> </div><div class='del'>-	if (reg_to_encoding(r) == SYS_TCR2_EL1 &amp;&amp;</div><div class='del'>-	    !kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR3_EL1, TCRX, IMP))</div><div class='del'>-		return undef_access(vcpu, p, r);</div><div class='del'>-</div><div class='ctx'> 	BUG_ON(!p-&gt;is_write);</div><div class='ctx'> </div><div class='ctx'> 	get_access_mask(r, &amp;mask, &amp;shift);</div><div class='hunk'>@@ -491,7 +658,12 @@ static bool access_gic_sre(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='ctx'> 		return ignore_write(vcpu, p);</div><div class='ctx'> </div><div class='del'>-	p-&gt;regval = vcpu-&gt;arch.vgic_cpu.vgic_v3.vgic_sre;</div><div class='add'>+	if (p-&gt;Op1 == 4) {	/* ICC_SRE_EL2 */</div><div class='add'>+		p-&gt;regval = KVM_ICC_SRE_EL2;</div><div class='add'>+	} else {		/* ICC_SRE_EL1 */</div><div class='add'>+		p-&gt;regval = vcpu-&gt;arch.vgic_cpu.vgic_v3.vgic_sre;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -530,17 +702,10 @@ static bool trap_oslar_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			   struct sys_reg_params *p,</div><div class='ctx'> 			   const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='del'>-	u64 oslsr;</div><div class='del'>-</div><div class='ctx'> 	if (!p-&gt;is_write)</div><div class='ctx'> 		return read_from_write_only(vcpu, p, r);</div><div class='ctx'> </div><div class='del'>-	/* Forward the OSLK bit to OSLSR */</div><div class='del'>-	oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) &amp; ~OSLSR_EL1_OSLK;</div><div class='del'>-	if (p-&gt;regval &amp; OSLAR_EL1_OSLK)</div><div class='del'>-		oslsr |= OSLSR_EL1_OSLK;</div><div class='del'>-</div><div class='del'>-	__vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;</div><div class='add'>+	kvm_debug_handle_oslar(vcpu, p-&gt;regval);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -565,7 +730,7 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='ctx'> 	if ((val ^ rd-&gt;val) &amp; ~OSLSR_EL1_OSLK)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, rd-&gt;reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, rd-&gt;reg, val);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -581,43 +746,13 @@ static bool trap_dbgauthstatus_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We want to avoid world-switching all the DBG registers all the</div><div class='del'>- * time:</div><div class='del'>- *</div><div class='del'>- * - If we've touched any debug register, it is likely that we're</div><div class='del'>- *   going to touch more of them. It then makes sense to disable the</div><div class='del'>- *   traps and start doing the save/restore dance</div><div class='del'>- * - If debug is active (DBG_MDSCR_KDE or DBG_MDSCR_MDE set), it is</div><div class='del'>- *   then mandatory to save/restore the registers, as the guest</div><div class='del'>- *   depends on them.</div><div class='del'>- *</div><div class='del'>- * For this, we use a DIRTY bit, indicating the guest has modified the</div><div class='del'>- * debug registers, used as follow:</div><div class='del'>- *</div><div class='del'>- * On guest entry:</div><div class='del'>- * - If the dirty bit is set (because we're coming back from trapping),</div><div class='del'>- *   disable the traps, save host registers, restore guest registers.</div><div class='del'>- * - If debug is actively in use (DBG_MDSCR_KDE or DBG_MDSCR_MDE set),</div><div class='del'>- *   set the dirty bit, disable the traps, save host registers,</div><div class='del'>- *   restore guest registers.</div><div class='del'>- * - Otherwise, enable the traps</div><div class='del'>- *</div><div class='del'>- * On guest exit:</div><div class='del'>- * - If the dirty bit is set, save guest registers, restore host</div><div class='del'>- *   registers and clear the dirty bit. This ensure that the host can</div><div class='del'>- *   now use the debug registers.</div><div class='del'>- */</div><div class='ctx'> static bool trap_debug_regs(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			    struct sys_reg_params *p,</div><div class='ctx'> 			    const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	access_rw(vcpu, p, r);</div><div class='del'>-	if (p-&gt;is_write)</div><div class='del'>-		vcpu_set_flag(vcpu, DEBUG_DIRTY);</div><div class='del'>-</div><div class='del'>-	trace_trap_reg(__func__, r-&gt;reg, p-&gt;is_write, p-&gt;regval);</div><div class='ctx'> </div><div class='add'>+	kvm_debug_set_guest_ownership(vcpu);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -626,9 +761,6 @@ static bool trap_debug_regs(struct kvm_vcpu *vcpu,</div><div class='ctx'>  *</div><div class='ctx'>  * A 32 bit write to a debug register leave top bits alone</div><div class='ctx'>  * A 32 bit read from a debug register only returns the bottom bits</div><div class='del'>- *</div><div class='del'>- * All writes will set the DEBUG_DIRTY flag to ensure the hyp code</div><div class='del'>- * switches between host and guest values in future.</div><div class='ctx'>  */</div><div class='ctx'> static void reg_to_dbg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		       struct sys_reg_params *p,</div><div class='hunk'>@@ -643,8 +775,6 @@ static void reg_to_dbg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	val &amp;= ~mask;</div><div class='ctx'> 	val |= (p-&gt;regval &amp; (mask &gt;&gt; shift)) &lt;&lt; shift;</div><div class='ctx'> 	*dbg_reg = val;</div><div class='del'>-</div><div class='del'>-	vcpu_set_flag(vcpu, DEBUG_DIRTY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dbg_to_reg(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -658,152 +788,79 @@ static void dbg_to_reg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	p-&gt;regval = (*dbg_reg &amp; mask) &gt;&gt; shift;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool trap_bvr(struct kvm_vcpu *vcpu,</div><div class='del'>-		     struct sys_reg_params *p,</div><div class='del'>-		     const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	u64 *dbg_reg = &amp;vcpu-&gt;arch.vcpu_debug_state.dbg_bvr[rd-&gt;CRm];</div><div class='del'>-</div><div class='del'>-	if (p-&gt;is_write)</div><div class='del'>-		reg_to_dbg(vcpu, p, rd, dbg_reg);</div><div class='del'>-	else</div><div class='del'>-		dbg_to_reg(vcpu, p, rd, dbg_reg);</div><div class='del'>-</div><div class='del'>-	trace_trap_reg(__func__, rd-&gt;CRm, p-&gt;is_write, *dbg_reg);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 val)</div><div class='add'>+static u64 *demux_wb_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_bvr[rd-&gt;CRm] = val;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	struct kvm_guest_debug_arch *dbg = &amp;vcpu-&gt;arch.vcpu_debug_state;</div><div class='ctx'> </div><div class='del'>-static int get_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 *val)</div><div class='del'>-{</div><div class='del'>-	*val = vcpu-&gt;arch.vcpu_debug_state.dbg_bvr[rd-&gt;CRm];</div><div class='del'>-	return 0;</div><div class='add'>+	switch (rd-&gt;Op2) {</div><div class='add'>+	case 0b100:</div><div class='add'>+		return &amp;dbg-&gt;dbg_bvr[rd-&gt;CRm];</div><div class='add'>+	case 0b101:</div><div class='add'>+		return &amp;dbg-&gt;dbg_bcr[rd-&gt;CRm];</div><div class='add'>+	case 0b110:</div><div class='add'>+		return &amp;dbg-&gt;dbg_wvr[rd-&gt;CRm];</div><div class='add'>+	case 0b111:</div><div class='add'>+		return &amp;dbg-&gt;dbg_wcr[rd-&gt;CRm];</div><div class='add'>+	default:</div><div class='add'>+		KVM_BUG_ON(1, vcpu-&gt;kvm);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 reset_bvr(struct kvm_vcpu *vcpu,</div><div class='del'>-		      const struct sys_reg_desc *rd)</div><div class='add'>+static bool trap_dbg_wb_reg(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_bvr[rd-&gt;CRm] = rd-&gt;val;</div><div class='del'>-	return rd-&gt;val;</div><div class='del'>-}</div><div class='add'>+	u64 *reg = demux_wb_reg(vcpu, rd);</div><div class='ctx'> </div><div class='del'>-static bool trap_bcr(struct kvm_vcpu *vcpu,</div><div class='del'>-		     struct sys_reg_params *p,</div><div class='del'>-		     const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	u64 *dbg_reg = &amp;vcpu-&gt;arch.vcpu_debug_state.dbg_bcr[rd-&gt;CRm];</div><div class='add'>+	if (!reg)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='del'>-		reg_to_dbg(vcpu, p, rd, dbg_reg);</div><div class='add'>+		reg_to_dbg(vcpu, p, rd, reg);</div><div class='ctx'> 	else</div><div class='del'>-		dbg_to_reg(vcpu, p, rd, dbg_reg);</div><div class='del'>-</div><div class='del'>-	trace_trap_reg(__func__, rd-&gt;CRm, p-&gt;is_write, *dbg_reg);</div><div class='add'>+		dbg_to_reg(vcpu, p, rd, reg);</div><div class='ctx'> </div><div class='add'>+	kvm_debug_set_guest_ownership(vcpu);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 val)</div><div class='add'>+static int set_dbg_wb_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='add'>+			  u64 val)</div><div class='ctx'> {</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_bcr[rd-&gt;CRm] = val;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	u64 *reg = demux_wb_reg(vcpu, rd);</div><div class='ctx'> </div><div class='del'>-static int get_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 *val)</div><div class='del'>-{</div><div class='del'>-	*val = vcpu-&gt;arch.vcpu_debug_state.dbg_bcr[rd-&gt;CRm];</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 reset_bcr(struct kvm_vcpu *vcpu,</div><div class='del'>-		      const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_bcr[rd-&gt;CRm] = rd-&gt;val;</div><div class='del'>-	return rd-&gt;val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool trap_wvr(struct kvm_vcpu *vcpu,</div><div class='del'>-		     struct sys_reg_params *p,</div><div class='del'>-		     const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	u64 *dbg_reg = &amp;vcpu-&gt;arch.vcpu_debug_state.dbg_wvr[rd-&gt;CRm];</div><div class='del'>-</div><div class='del'>-	if (p-&gt;is_write)</div><div class='del'>-		reg_to_dbg(vcpu, p, rd, dbg_reg);</div><div class='del'>-	else</div><div class='del'>-		dbg_to_reg(vcpu, p, rd, dbg_reg);</div><div class='del'>-</div><div class='del'>-	trace_trap_reg(__func__, rd-&gt;CRm, p-&gt;is_write,</div><div class='del'>-		vcpu-&gt;arch.vcpu_debug_state.dbg_wvr[rd-&gt;CRm]);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 val)</div><div class='del'>-{</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_wvr[rd-&gt;CRm] = val;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (!reg)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-static int get_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 *val)</div><div class='del'>-{</div><div class='del'>-	*val = vcpu-&gt;arch.vcpu_debug_state.dbg_wvr[rd-&gt;CRm];</div><div class='add'>+	*reg = val;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 reset_wvr(struct kvm_vcpu *vcpu,</div><div class='del'>-		      const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_wvr[rd-&gt;CRm] = rd-&gt;val;</div><div class='del'>-	return rd-&gt;val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool trap_wcr(struct kvm_vcpu *vcpu,</div><div class='del'>-		     struct sys_reg_params *p,</div><div class='del'>-		     const struct sys_reg_desc *rd)</div><div class='add'>+static int get_dbg_wb_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='add'>+			  u64 *val)</div><div class='ctx'> {</div><div class='del'>-	u64 *dbg_reg = &amp;vcpu-&gt;arch.vcpu_debug_state.dbg_wcr[rd-&gt;CRm];</div><div class='del'>-</div><div class='del'>-	if (p-&gt;is_write)</div><div class='del'>-		reg_to_dbg(vcpu, p, rd, dbg_reg);</div><div class='del'>-	else</div><div class='del'>-		dbg_to_reg(vcpu, p, rd, dbg_reg);</div><div class='del'>-</div><div class='del'>-	trace_trap_reg(__func__, rd-&gt;CRm, p-&gt;is_write, *dbg_reg);</div><div class='add'>+	u64 *reg = demux_wb_reg(vcpu, rd);</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='add'>+	if (!reg)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 val)</div><div class='del'>-{</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_wcr[rd-&gt;CRm] = val;</div><div class='add'>+	*val = *reg;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='del'>-		   u64 *val)</div><div class='add'>+static u64 reset_dbg_wb_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	*val = vcpu-&gt;arch.vcpu_debug_state.dbg_wcr[rd-&gt;CRm];</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	u64 *reg = demux_wb_reg(vcpu, rd);</div><div class='ctx'> </div><div class='del'>-static u64 reset_wcr(struct kvm_vcpu *vcpu,</div><div class='del'>-		      const struct sys_reg_desc *rd)</div><div class='del'>-{</div><div class='del'>-	vcpu-&gt;arch.vcpu_debug_state.dbg_wcr[rd-&gt;CRm] = rd-&gt;val;</div><div class='add'>+	/*</div><div class='add'>+	 * Bail early if we couldn't find storage for the register, the</div><div class='add'>+	 * KVM_BUG_ON() in demux_wb_reg() will prevent this VM from ever</div><div class='add'>+	 * being run.</div><div class='add'>+	 */</div><div class='add'>+	if (!reg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	*reg = rd-&gt;val;</div><div class='ctx'> 	return rd-&gt;val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -841,6 +898,12 @@ static u64 reset_mpidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> 	return mpidr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int hidden_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				      const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 				   const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='hunk'>@@ -853,13 +916,13 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mask = BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='del'>-	u8 n = vcpu-&gt;kvm-&gt;arch.pmcr_n;</div><div class='add'>+	u8 n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='ctx'> </div><div class='ctx'> 	if (n)</div><div class='ctx'> 		mask |= GENMASK(n - 1, 0);</div><div class='ctx'> </div><div class='ctx'> 	reset_unknown(vcpu, r);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) &amp;= mask;</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, r-&gt;reg, &amp;=, mask);</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -867,7 +930,7 @@ static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> static u64 reset_pmevcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	reset_unknown(vcpu, r);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) &amp;= GENMASK(31, 0);</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, r-&gt;reg, &amp;=, GENMASK(31, 0));</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -879,7 +942,7 @@ static u64 reset_pmevtyper(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	reset_unknown(vcpu, r);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) &amp;= kvm_pmu_evtyper_mask(vcpu-&gt;kvm);</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, r-&gt;reg, &amp;=, kvm_pmu_evtyper_mask(vcpu-&gt;kvm));</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -887,7 +950,7 @@ static u64 reset_pmevtyper(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> static u64 reset_pmselr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	reset_unknown(vcpu, r);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) &amp;= PMSELR_EL0_SEL_MASK;</div><div class='add'>+	__vcpu_rmw_sys_reg(vcpu, r-&gt;reg, &amp;=, PMSELR_EL0_SEL_MASK);</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -903,7 +966,7 @@ static u64 reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> 	 * The value of PMCR.N field is included when the</div><div class='ctx'> 	 * vCPU register is read via kvm_vcpu_read_pmcr().</div><div class='ctx'> 	 */</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) = pmcr;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, pmcr);</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -975,7 +1038,7 @@ static bool access_pmselr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='del'>-		__vcpu_sys_reg(vcpu, PMSELR_EL0) = p-&gt;regval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, PMSELR_EL0, p-&gt;regval);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* return PMSELR.SEL field */</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, PMSELR_EL0)</div><div class='hunk'>@@ -1035,6 +1098,22 @@ static int get_pmu_evcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int set_pmu_evcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			  u64 val)</div><div class='add'>+{</div><div class='add'>+	u64 idx;</div><div class='add'>+</div><div class='add'>+	if (r-&gt;CRn == 9 &amp;&amp; r-&gt;CRm == 13 &amp;&amp; r-&gt;Op2 == 0)</div><div class='add'>+		/* PMCCNTR_EL0 */</div><div class='add'>+		idx = ARMV8_PMU_CYCLE_IDX;</div><div class='add'>+	else</div><div class='add'>+		/* PMEVCNTRn_EL0 */</div><div class='add'>+		idx = ((r-&gt;CRm &amp; 3) &lt;&lt; 3) | (r-&gt;Op2 &amp; 7);</div><div class='add'>+</div><div class='add'>+	kvm_pmu_set_counter_value_user(vcpu, idx, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			      struct sys_reg_params *p,</div><div class='ctx'> 			      const struct sys_reg_desc *r)</div><div class='hunk'>@@ -1126,32 +1205,17 @@ static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> </div><div class='ctx'> static int set_pmreg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r, u64 val)</div><div class='ctx'> {</div><div class='del'>-	bool set;</div><div class='add'>+	u64 mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> </div><div class='del'>-	val &amp;= kvm_pmu_valid_counter_mask(vcpu);</div><div class='del'>-</div><div class='del'>-	switch (r-&gt;reg) {</div><div class='del'>-	case PMOVSSET_EL0:</div><div class='del'>-		/* CRm[1] being set indicates a SET register, and CLR otherwise */</div><div class='del'>-		set = r-&gt;CRm &amp; 2;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* Op2[0] being set indicates a SET register, and CLR otherwise */</div><div class='del'>-		set = r-&gt;Op2 &amp; 1;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (set)</div><div class='del'>-		__vcpu_sys_reg(vcpu, r-&gt;reg) |= val;</div><div class='del'>-	else</div><div class='del'>-		__vcpu_sys_reg(vcpu, r-&gt;reg) &amp;= ~val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, val &amp; mask);</div><div class='add'>+	kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_pmreg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r, u64 *val)</div><div class='ctx'> {</div><div class='del'>-	u64 mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	u64 mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	*val = __vcpu_sys_reg(vcpu, r-&gt;reg) &amp; mask;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1165,19 +1229,17 @@ static bool access_pmcnten(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	if (pmu_access_el0_disabled(vcpu))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> 	if (p-&gt;is_write) {</div><div class='ctx'> 		val = p-&gt;regval &amp; mask;</div><div class='del'>-		if (r-&gt;Op2 &amp; 0x1) {</div><div class='add'>+		if (r-&gt;Op2 &amp; 0x1)</div><div class='ctx'> 			/* accessing PMCNTENSET_EL0 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val;</div><div class='del'>-			kvm_pmu_enable_counter_mask(vcpu, val);</div><div class='del'>-			kvm_vcpu_pmu_restore_guest(vcpu);</div><div class='del'>-		} else {</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMCNTENSET_EL0, |=, val);</div><div class='add'>+		else</div><div class='ctx'> 			/* accessing PMCNTENCLR_EL0 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &amp;= ~val;</div><div class='del'>-			kvm_pmu_disable_counter_mask(vcpu, val);</div><div class='del'>-		}</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMCNTENSET_EL0, &amp;=, ~val);</div><div class='add'>+</div><div class='add'>+		kvm_pmu_reprogram_counter_mask(vcpu, val);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1188,7 +1250,7 @@ static bool access_pmcnten(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> static bool access_pminten(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 			   const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='del'>-	u64 mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	u64 mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (check_pmu_access_disabled(vcpu, 0))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1198,10 +1260,10 @@ static bool access_pminten(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> </div><div class='ctx'> 		if (r-&gt;Op2 &amp; 0x1)</div><div class='ctx'> 			/* accessing PMINTENSET_EL1 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMINTENSET_EL1) |= val;</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMINTENSET_EL1, |=, val);</div><div class='ctx'> 		else</div><div class='ctx'> 			/* accessing PMINTENCLR_EL1 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMINTENSET_EL1) &amp;= ~val;</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMINTENSET_EL1, &amp;=, ~val);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, PMINTENSET_EL1);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1212,7 +1274,7 @@ static bool access_pminten(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> static bool access_pmovs(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 			 const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='del'>-	u64 mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	u64 mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (pmu_access_el0_disabled(vcpu))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1220,10 +1282,10 @@ static bool access_pmovs(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	if (p-&gt;is_write) {</div><div class='ctx'> 		if (r-&gt;CRm &amp; 0x2)</div><div class='ctx'> 			/* accessing PMOVSSET_EL0 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= (p-&gt;regval &amp; mask);</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, |=, (p-&gt;regval &amp; mask));</div><div class='ctx'> 		else</div><div class='ctx'> 			/* accessing PMOVSCLR_EL0 */</div><div class='del'>-			__vcpu_sys_reg(vcpu, PMOVSSET_EL0) &amp;= ~(p-&gt;regval &amp; mask);</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, &amp;=, ~(p-&gt;regval &amp; mask));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1242,7 +1304,7 @@ static bool access_pmswinc(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	if (pmu_write_swinc_el0_disabled(vcpu))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	mask = kvm_pmu_valid_counter_mask(vcpu);</div><div class='add'>+	mask = kvm_pmu_accessible_counter_mask(vcpu);</div><div class='ctx'> 	kvm_pmu_software_increment(vcpu, p-&gt;regval &amp; mask);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1254,8 +1316,8 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 		if (!vcpu_mode_priv(vcpu))</div><div class='ctx'> 			return undef_access(vcpu, p, r);</div><div class='ctx'> </div><div class='del'>-		__vcpu_sys_reg(vcpu, PMUSERENR_EL0) =</div><div class='del'>-			       p-&gt;regval &amp; ARMV8_PMU_USERENR_MASK;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, PMUSERENR_EL0,</div><div class='add'>+				      (p-&gt;regval &amp; ARMV8_PMU_USERENR_MASK));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, PMUSERENR_EL0)</div><div class='ctx'> 			    &amp; ARMV8_PMU_USERENR_MASK;</div><div class='hunk'>@@ -1285,8 +1347,9 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	 * with the existing KVM behavior.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!kvm_vm_has_ran_once(kvm) &amp;&amp;</div><div class='add'>+	    !vcpu_has_nv(vcpu)	      &amp;&amp;</div><div class='ctx'> 	    new_n &lt;= kvm_arm_pmu_get_max_counters(kvm))</div><div class='del'>-		kvm-&gt;arch.pmcr_n = new_n;</div><div class='add'>+		kvm-&gt;arch.nr_pmu_counters = new_n;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1305,20 +1368,26 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	if (!kvm_supports_32bit_el0())</div><div class='ctx'> 		val |= ARMV8_PMU_PMCR_LC;</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, val);</div><div class='add'>+	kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Silly macro to expand the DBG{BCR,BVR,WVR,WCR}n_EL1 registers in one go */</div><div class='ctx'> #define DBG_BCR_BVR_WCR_WVR_EL1(n)					\</div><div class='ctx'> 	{ SYS_DESC(SYS_DBGBVRn_EL1(n)),					\</div><div class='del'>-	  trap_bvr, reset_bvr, 0, 0, get_bvr, set_bvr },		\</div><div class='add'>+	  trap_dbg_wb_reg, reset_dbg_wb_reg, 0, 0,			\</div><div class='add'>+	  get_dbg_wb_reg, set_dbg_wb_reg },				\</div><div class='ctx'> 	{ SYS_DESC(SYS_DBGBCRn_EL1(n)),					\</div><div class='del'>-	  trap_bcr, reset_bcr, 0, 0, get_bcr, set_bcr },		\</div><div class='add'>+	  trap_dbg_wb_reg, reset_dbg_wb_reg, 0, 0,			\</div><div class='add'>+	  get_dbg_wb_reg, set_dbg_wb_reg },				\</div><div class='ctx'> 	{ SYS_DESC(SYS_DBGWVRn_EL1(n)),					\</div><div class='del'>-	  trap_wvr, reset_wvr, 0, 0,  get_wvr, set_wvr },		\</div><div class='add'>+	  trap_dbg_wb_reg, reset_dbg_wb_reg, 0, 0,			\</div><div class='add'>+	  get_dbg_wb_reg, set_dbg_wb_reg },				\</div><div class='ctx'> 	{ SYS_DESC(SYS_DBGWCRn_EL1(n)),					\</div><div class='del'>-	  trap_wcr, reset_wcr, 0, 0,  get_wcr, set_wcr }</div><div class='add'>+	  trap_dbg_wb_reg, reset_dbg_wb_reg, 0, 0,			\</div><div class='add'>+	  get_dbg_wb_reg, set_dbg_wb_reg }</div><div class='ctx'> </div><div class='ctx'> #define PMU_SYS_REG(name)						\</div><div class='ctx'> 	SYS_DESC(SYS_##name), .reset = reset_pmu_reg,			\</div><div class='hunk'>@@ -1328,6 +1397,7 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> #define PMU_PMEVCNTR_EL0(n)						\</div><div class='ctx'> 	{ PMU_SYS_REG(PMEVCNTRn_EL0(n)),				\</div><div class='ctx'> 	  .reset = reset_pmevcntr, .get_user = get_pmu_evcntr,		\</div><div class='add'>+	  .set_user = set_pmu_evcntr,					\</div><div class='ctx'> 	  .access = access_pmu_evcntr, .reg = (PMEVCNTR0_EL0 + n), }</div><div class='ctx'> </div><div class='ctx'> /* Macro to expand the PMEVTYPERn_EL0 register */</div><div class='hunk'>@@ -1372,26 +1442,146 @@ static bool access_arch_timer(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	switch (reg) {</div><div class='ctx'> 	case SYS_CNTP_TVAL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HPTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_PTIMER;</div><div class='add'>+		treg = TIMER_REG_TVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_TVAL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HVTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_TVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_AARCH32_CNTP_TVAL:</div><div class='add'>+	case SYS_CNTP_TVAL_EL02:</div><div class='ctx'> 		tmr = TIMER_PTIMER;</div><div class='ctx'> 		treg = TIMER_REG_TVAL;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_TVAL_EL02:</div><div class='add'>+		tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_TVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHP_TVAL_EL2:</div><div class='add'>+		tmr = TIMER_HPTIMER;</div><div class='add'>+		treg = TIMER_REG_TVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHV_TVAL_EL2:</div><div class='add'>+		tmr = TIMER_HVTIMER;</div><div class='add'>+		treg = TIMER_REG_TVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_CNTP_CTL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HPTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_PTIMER;</div><div class='add'>+		treg = TIMER_REG_CTL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_CTL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HVTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CTL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_AARCH32_CNTP_CTL:</div><div class='add'>+	case SYS_CNTP_CTL_EL02:</div><div class='ctx'> 		tmr = TIMER_PTIMER;</div><div class='ctx'> 		treg = TIMER_REG_CTL;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_CTL_EL02:</div><div class='add'>+		tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CTL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHP_CTL_EL2:</div><div class='add'>+		tmr = TIMER_HPTIMER;</div><div class='add'>+		treg = TIMER_REG_CTL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHV_CTL_EL2:</div><div class='add'>+		tmr = TIMER_HVTIMER;</div><div class='add'>+		treg = TIMER_REG_CTL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_CNTP_CVAL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HPTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_PTIMER;</div><div class='add'>+		treg = TIMER_REG_CVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_CVAL_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu) &amp;&amp; vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+			tmr = TIMER_HVTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_AARCH32_CNTP_CVAL:</div><div class='add'>+	case SYS_CNTP_CVAL_EL02:</div><div class='ctx'> 		tmr = TIMER_PTIMER;</div><div class='ctx'> 		treg = TIMER_REG_CVAL;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTV_CVAL_EL02:</div><div class='add'>+		tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHP_CVAL_EL2:</div><div class='add'>+		tmr = TIMER_HPTIMER;</div><div class='add'>+		treg = TIMER_REG_CVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTHV_CVAL_EL2:</div><div class='add'>+		tmr = TIMER_HVTIMER;</div><div class='add'>+		treg = TIMER_REG_CVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_CNTPCT_EL0:</div><div class='ctx'> 	case SYS_CNTPCTSS_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu))</div><div class='add'>+			tmr = TIMER_HPTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_PTIMER;</div><div class='add'>+		treg = TIMER_REG_CNT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case SYS_AARCH32_CNTPCT:</div><div class='add'>+	case SYS_AARCH32_CNTPCTSS:</div><div class='ctx'> 		tmr = TIMER_PTIMER;</div><div class='ctx'> 		treg = TIMER_REG_CNT;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case SYS_CNTVCT_EL0:</div><div class='add'>+	case SYS_CNTVCTSS_EL0:</div><div class='add'>+		if (is_hyp_ctxt(vcpu))</div><div class='add'>+			tmr = TIMER_HVTIMER;</div><div class='add'>+		else</div><div class='add'>+			tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CNT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SYS_AARCH32_CNTVCT:</div><div class='add'>+	case SYS_AARCH32_CNTVCTSS:</div><div class='add'>+		tmr = TIMER_VTIMER;</div><div class='add'>+		treg = TIMER_REG_CNT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		print_sys_reg_msg(p, "%s", "Unhandled trapped timer register");</div><div class='ctx'> 		return undef_access(vcpu, p, r);</div><div class='hunk'>@@ -1405,6 +1595,16 @@ static bool access_arch_timer(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool access_hv_timer(struct kvm_vcpu *vcpu,</div><div class='add'>+			    struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='add'>+		return undef_access(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	return access_arch_timer(vcpu, p, r);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static s64 kvm_arm64_ftr_safe_value(u32 id, const struct arm64_ftr_bits *ftrp,</div><div class='ctx'> 				    s64 new, s64 cur)</div><div class='ctx'> {</div><div class='hunk'>@@ -1509,6 +1709,10 @@ static u8 pmuver_to_perfmon(u8 pmuver)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 sanitise_id_aa64pfr0_el1(const struct kvm_vcpu *vcpu, u64 val);</div><div class='add'>+static u64 sanitise_id_aa64pfr1_el1(const struct kvm_vcpu *vcpu, u64 val);</div><div class='add'>+static u64 sanitise_id_aa64dfr0_el1(const struct kvm_vcpu *vcpu, u64 val);</div><div class='add'>+</div><div class='ctx'> /* Read a sanitised cpufeature ID register by sys_reg_desc */</div><div class='ctx'> static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 				       const struct sys_reg_desc *r)</div><div class='hunk'>@@ -1522,41 +1726,58 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 	val = read_sanitised_ftr_reg(id);</div><div class='ctx'> </div><div class='ctx'> 	switch (id) {</div><div class='add'>+	case SYS_ID_AA64DFR0_EL1:</div><div class='add'>+		val = sanitise_id_aa64dfr0_el1(vcpu, val);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_ID_AA64PFR0_EL1:</div><div class='add'>+		val = sanitise_id_aa64pfr0_el1(vcpu, val);</div><div class='add'>+		break;</div><div class='ctx'> 	case SYS_ID_AA64PFR1_EL1:</div><div class='del'>-		if (!kvm_has_mte(vcpu-&gt;kvm))</div><div class='del'>-			val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);</div><div class='del'>-</div><div class='del'>-		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME);</div><div class='add'>+		val = sanitise_id_aa64pfr1_el1(vcpu, val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64PFR2_EL1:</div><div class='del'>-		/* We only expose FPMR */</div><div class='del'>-		val &amp;= ID_AA64PFR2_EL1_FPMR;</div><div class='add'>+		val &amp;= ID_AA64PFR2_EL1_FPMR |</div><div class='add'>+			(kvm_has_mte(vcpu-&gt;kvm) ?</div><div class='add'>+			 ID_AA64PFR2_EL1_MTEFAR | ID_AA64PFR2_EL1_MTESTOREONLY :</div><div class='add'>+			 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64ISAR1_EL1:</div><div class='ctx'> 		if (!vcpu_has_ptrauth(vcpu))</div><div class='del'>-			val &amp;= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |</div><div class='del'>-				 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |</div><div class='del'>-				 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |</div><div class='del'>-				 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));</div><div class='add'>+			val &amp;= ~(ID_AA64ISAR1_EL1_APA |</div><div class='add'>+				 ID_AA64ISAR1_EL1_API |</div><div class='add'>+				 ID_AA64ISAR1_EL1_GPA |</div><div class='add'>+				 ID_AA64ISAR1_EL1_GPI);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64ISAR2_EL1:</div><div class='ctx'> 		if (!vcpu_has_ptrauth(vcpu))</div><div class='del'>-			val &amp;= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |</div><div class='del'>-				 ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));</div><div class='del'>-		if (!cpus_have_final_cap(ARM64_HAS_WFXT))</div><div class='del'>-			val &amp;= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT);</div><div class='add'>+			val &amp;= ~(ID_AA64ISAR2_EL1_APA3 |</div><div class='add'>+				 ID_AA64ISAR2_EL1_GPA3);</div><div class='add'>+		if (!cpus_have_final_cap(ARM64_HAS_WFXT) ||</div><div class='add'>+		    has_broken_cntvoff())</div><div class='add'>+			val &amp;= ~ID_AA64ISAR2_EL1_WFxT;</div><div class='add'>+		break;</div><div class='add'>+	case SYS_ID_AA64ISAR3_EL1:</div><div class='add'>+		val &amp;= ID_AA64ISAR3_EL1_FPRCVT | ID_AA64ISAR3_EL1_LSFE |</div><div class='add'>+			ID_AA64ISAR3_EL1_FAMINMAX;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64MMFR2_EL1:</div><div class='ctx'> 		val &amp;= ~ID_AA64MMFR2_EL1_CCIDX_MASK;</div><div class='add'>+		val &amp;= ~ID_AA64MMFR2_EL1_NV;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64MMFR3_EL1:</div><div class='del'>-		val &amp;= ID_AA64MMFR3_EL1_TCRX | ID_AA64MMFR3_EL1_S1POE;</div><div class='add'>+		val &amp;= ID_AA64MMFR3_EL1_TCRX |</div><div class='add'>+		       ID_AA64MMFR3_EL1_SCTLRX |</div><div class='add'>+		       ID_AA64MMFR3_EL1_S1POE |</div><div class='add'>+		       ID_AA64MMFR3_EL1_S1PIE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_MMFR4_EL1:</div><div class='del'>-		val &amp;= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX);</div><div class='add'>+		val &amp;= ~ID_MMFR4_EL1_CCIDX;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (vcpu_has_nv(vcpu))</div><div class='add'>+		val = limit_nv_id_reg(vcpu-&gt;kvm, id, val);</div><div class='add'>+</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1583,15 +1804,24 @@ static bool is_feature_id_reg(u32 encoding)</div><div class='ctx'>  * Return true if the register's (Op0, Op1, CRn, CRm, Op2) is</div><div class='ctx'>  * (3, 0, 0, crm, op2), where 1&lt;=crm&lt;8, 0&lt;=op2&lt;8, which is the range of ID</div><div class='ctx'>  * registers KVM maintains on a per-VM basis.</div><div class='add'>+ *</div><div class='add'>+ * Additionally, the implementation ID registers and CTR_EL0 are handled as</div><div class='add'>+ * per-VM registers.</div><div class='ctx'>  */</div><div class='ctx'> static inline bool is_vm_ftr_id_reg(u32 id)</div><div class='ctx'> {</div><div class='del'>-	if (id == SYS_CTR_EL0)</div><div class='add'>+	switch (id) {</div><div class='add'>+	case SYS_CTR_EL0:</div><div class='add'>+	case SYS_MIDR_EL1:</div><div class='add'>+	case SYS_REVIDR_EL1:</div><div class='add'>+	case SYS_AIDR_EL1:</div><div class='ctx'> 		return true;</div><div class='add'>+	default:</div><div class='add'>+		return (sys_reg_Op0(id) == 3 &amp;&amp; sys_reg_Op1(id) == 0 &amp;&amp;</div><div class='add'>+			sys_reg_CRn(id) == 0 &amp;&amp; sys_reg_CRm(id) &gt;= 1 &amp;&amp;</div><div class='add'>+			sys_reg_CRm(id) &lt; 8);</div><div class='ctx'> </div><div class='del'>-	return (sys_reg_Op0(id) == 3 &amp;&amp; sys_reg_Op1(id) == 0 &amp;&amp;</div><div class='del'>-		sys_reg_CRn(id) == 0 &amp;&amp; sys_reg_CRm(id) &gt;= 1 &amp;&amp;</div><div class='del'>-		sys_reg_CRm(id) &lt; 8);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_vcpu_ftr_id_reg(u32 id)</div><div class='hunk'>@@ -1683,11 +1913,8 @@ static unsigned int fp8_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return REG_HIDDEN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 read_sanitised_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,</div><div class='del'>-					  const struct sys_reg_desc *rd)</div><div class='add'>+static u64 sanitise_id_aa64pfr0_el1(const struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='del'>-	u64 val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);</div><div class='del'>-</div><div class='ctx'> 	if (!vcpu_has_sve(vcpu))</div><div class='ctx'> 		val &amp;= ~ID_AA64PFR0_EL1_SVE_MASK;</div><div class='ctx'> </div><div class='hunk'>@@ -1708,31 +1935,50 @@ static u64 read_sanitised_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, CSV3, IMP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (kvm_vgic_global_state.type == VGIC_V3) {</div><div class='add'>+	if (vgic_is_v3(vcpu-&gt;kvm)) {</div><div class='ctx'> 		val &amp;= ~ID_AA64PFR0_EL1_GIC_MASK;</div><div class='ctx'> 		val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= ~ID_AA64PFR0_EL1_AMU_MASK;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * MPAM is disabled by default as KVM also needs a set of PARTID to</div><div class='add'>+	 * program the MPAMVPMx_EL2 PARTID remapping registers with. But some</div><div class='add'>+	 * older kernels let the guest see the ID bit.</div><div class='add'>+	 */</div><div class='add'>+	val &amp;= ~ID_AA64PFR0_EL1_MPAM_MASK;</div><div class='add'>+</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ID_REG_LIMIT_FIELD_ENUM(val, reg, field, limit)			       \</div><div class='del'>-({									       \</div><div class='del'>-	u64 __f_val = FIELD_GET(reg##_##field##_MASK, val);		       \</div><div class='del'>-	(val) &amp;= ~reg##_##field##_MASK;					       \</div><div class='del'>-	(val) |= FIELD_PREP(reg##_##field##_MASK,			       \</div><div class='del'>-			    min(__f_val,				       \</div><div class='del'>-				(u64)SYS_FIELD_VALUE(reg, field, limit)));     \</div><div class='del'>-	(val);								       \</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-static u64 read_sanitised_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='del'>-					  const struct sys_reg_desc *rd)</div><div class='add'>+static u64 sanitise_id_aa64pfr1_el1(const struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> {</div><div class='del'>-	u64 val = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);</div><div class='add'>+	u64 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_mte(vcpu-&gt;kvm)) {</div><div class='add'>+		val &amp;= ~ID_AA64PFR1_EL1_MTE;</div><div class='add'>+		val &amp;= ~ID_AA64PFR1_EL1_MTE_frac;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(cpus_have_final_cap(ARM64_HAS_RASV1P1_EXTN) &amp;&amp;</div><div class='add'>+	      SYS_FIELD_GET(ID_AA64PFR0_EL1, RAS, pfr0) == ID_AA64PFR0_EL1_RAS_IMP))</div><div class='add'>+		val &amp;= ~ID_AA64PFR1_EL1_RAS_frac;</div><div class='ctx'> </div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_SME;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_RNDR_trap;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_NMI;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_GCS;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_THE;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_MTEX;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_PFAR;</div><div class='add'>+	val &amp;= ~ID_AA64PFR1_EL1_MPAM_frac;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 sanitise_id_aa64dfr0_el1(const struct kvm_vcpu *vcpu, u64 val)</div><div class='add'>+{</div><div class='ctx'> 	val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64DFR0_EL1, DebugVer, V8P8);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1746,9 +1992,32 @@ static u64 read_sanitised_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	/* Hide SPE from guests */</div><div class='ctx'> 	val &amp;= ~ID_AA64DFR0_EL1_PMSVer_MASK;</div><div class='ctx'> </div><div class='add'>+	/* Hide BRBE from guests */</div><div class='add'>+	val &amp;= ~ID_AA64DFR0_EL1_BRBE_MASK;</div><div class='add'>+</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Older versions of KVM erroneously claim support for FEAT_DoubleLock with</div><div class='add'>+ * NV-enabled VMs on unsupporting hardware. Silently ignore the incorrect</div><div class='add'>+ * value if it is consistent with the bug.</div><div class='add'>+ */</div><div class='add'>+static bool ignore_feat_doublelock(struct kvm_vcpu *vcpu, u64 val)</div><div class='add'>+{</div><div class='add'>+	u8 host, user;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	host = SYS_FIELD_GET(ID_AA64DFR0_EL1, DoubleLock,</div><div class='add'>+			     read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1));</div><div class='add'>+	user = SYS_FIELD_GET(ID_AA64DFR0_EL1, DoubleLock, val);</div><div class='add'>+</div><div class='add'>+	return host == ID_AA64DFR0_EL1_DoubleLock_NI &amp;&amp;</div><div class='add'>+	       user == ID_AA64DFR0_EL1_DoubleLock_IMP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			       const struct sys_reg_desc *rd,</div><div class='ctx'> 			       u64 val)</div><div class='hunk'>@@ -1780,18 +2049,25 @@ static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (debugver &lt; ID_AA64DFR0_EL1_DebugVer_IMP)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (ignore_feat_doublelock(vcpu, val)) {</div><div class='add'>+		val &amp;= ~ID_AA64DFR0_EL1_DoubleLock;</div><div class='add'>+		val |= SYS_FIELD_PREP_ENUM(ID_AA64DFR0_EL1, DoubleLock, NI);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return set_id_reg(vcpu, rd, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 read_sanitised_id_dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				      const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	u8 perfmon = pmuver_to_perfmon(kvm_arm_pmu_get_pmuver_limit());</div><div class='add'>+	u8 perfmon;</div><div class='ctx'> 	u64 val = read_sanitised_ftr_reg(SYS_ID_DFR0_EL1);</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= ~ID_DFR0_EL1_PerfMon_MASK;</div><div class='del'>-	if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+	if (kvm_vcpu_has_pmu(vcpu)) {</div><div class='add'>+		perfmon = pmuver_to_perfmon(kvm_arm_pmu_get_pmuver_limit());</div><div class='ctx'> 		val |= SYS_FIELD_PREP(ID_DFR0_EL1, PerfMon, perfmon);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	val = ID_REG_LIMIT_FIELD_ENUM(val, ID_DFR0_EL1, CopDbg, Debugv8p8);</div><div class='ctx'> </div><div class='hunk'>@@ -1825,6 +2101,151 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return set_id_reg(vcpu, rd, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,</div><div class='add'>+			       const struct sys_reg_desc *rd, u64 user_val)</div><div class='add'>+{</div><div class='add'>+	u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);</div><div class='add'>+	u64 mpam_mask = ID_AA64PFR0_EL1_MPAM_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Commit 011e5f5bf529f ("arm64/cpufeature: Add remaining feature bits</div><div class='add'>+	 * in ID_AA64PFR0 register") exposed the MPAM field of AA64PFR0_EL1 to</div><div class='add'>+	 * guests, but didn't add trap handling. KVM doesn't support MPAM and</div><div class='add'>+	 * always returns an UNDEF for these registers. The guest must see 0</div><div class='add'>+	 * for this field.</div><div class='add'>+	 *</div><div class='add'>+	 * But KVM must also accept values from user-space that were provided</div><div class='add'>+	 * by KVM. On CPUs that support MPAM, permit user-space to write</div><div class='add'>+	 * the sanitizied value to ID_AA64PFR0_EL1.MPAM, but ignore this field.</div><div class='add'>+	 */</div><div class='add'>+	if ((hw_val &amp; mpam_mask) == (user_val &amp; mpam_mask))</div><div class='add'>+		user_val &amp;= ~ID_AA64PFR0_EL1_MPAM_MASK;</div><div class='add'>+</div><div class='add'>+	/* Fail the guest's request to disable the AA64 ISA at EL{0,1,2} */</div><div class='add'>+	if (!FIELD_GET(ID_AA64PFR0_EL1_EL0, user_val) ||</div><div class='add'>+	    !FIELD_GET(ID_AA64PFR0_EL1_EL1, user_val) ||</div><div class='add'>+	    (vcpu_has_nv(vcpu) &amp;&amp; !FIELD_GET(ID_AA64PFR0_EL1_EL2, user_val)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we are running on a GICv5 host and support FEAT_GCIE_LEGACY, then</div><div class='add'>+	 * we support GICv3. Fail attempts to do anything but set that to IMP.</div><div class='add'>+	 */</div><div class='add'>+	if (vgic_is_v3_compat(vcpu-&gt;kvm) &amp;&amp;</div><div class='add'>+	    FIELD_GET(ID_AA64PFR0_EL1_GIC_MASK, user_val) != ID_AA64PFR0_EL1_GIC_IMP)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_id_aa64pfr1_el1(struct kvm_vcpu *vcpu,</div><div class='add'>+			       const struct sys_reg_desc *rd, u64 user_val)</div><div class='add'>+{</div><div class='add'>+	u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);</div><div class='add'>+	u64 mpam_mask = ID_AA64PFR1_EL1_MPAM_frac_MASK;</div><div class='add'>+	u8 mte = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE, hw_val);</div><div class='add'>+	u8 user_mte_frac = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE_frac, user_val);</div><div class='add'>+	u8 hw_mte_frac = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE_frac, hw_val);</div><div class='add'>+</div><div class='add'>+	/* See set_id_aa64pfr0_el1 for comment about MPAM */</div><div class='add'>+	if ((hw_val &amp; mpam_mask) == (user_val &amp; mpam_mask))</div><div class='add'>+		user_val &amp;= ~ID_AA64PFR1_EL1_MPAM_frac_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Previously MTE_frac was hidden from guest. However, if the</div><div class='add'>+	 * hardware supports MTE2 but not MTE_ASYM_FAULT then a value</div><div class='add'>+	 * of 0 for this field indicates that the hardware supports</div><div class='add'>+	 * MTE_ASYNC. Whereas, 0xf indicates MTE_ASYNC is not supported.</div><div class='add'>+	 *</div><div class='add'>+	 * As KVM must accept values from KVM provided by user-space,</div><div class='add'>+	 * when ID_AA64PFR1_EL1.MTE is 2 allow user-space to set</div><div class='add'>+	 * ID_AA64PFR1_EL1.MTE_frac to 0. However, ignore it to avoid</div><div class='add'>+	 * incorrectly claiming hardware support for MTE_ASYNC in the</div><div class='add'>+	 * guest.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (mte == ID_AA64PFR1_EL1_MTE_MTE2 &amp;&amp;</div><div class='add'>+	    hw_mte_frac == ID_AA64PFR1_EL1_MTE_frac_NI &amp;&amp;</div><div class='add'>+	    user_mte_frac == ID_AA64PFR1_EL1_MTE_frac_ASYNC) {</div><div class='add'>+		user_val &amp;= ~ID_AA64PFR1_EL1_MTE_frac_MASK;</div><div class='add'>+		user_val |= hw_val &amp; ID_AA64PFR1_EL1_MTE_frac_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Allow userspace to de-feature a stage-2 translation granule but prevent it</div><div class='add'>+ * from claiming the impossible.</div><div class='add'>+ */</div><div class='add'>+#define tgran2_val_allowed(tg, safe, user)			\</div><div class='add'>+({								\</div><div class='add'>+	u8 __s = SYS_FIELD_GET(ID_AA64MMFR0_EL1, tg, safe);	\</div><div class='add'>+	u8 __u = SYS_FIELD_GET(ID_AA64MMFR0_EL1, tg, user);	\</div><div class='add'>+								\</div><div class='add'>+	__s == __u || __u == ID_AA64MMFR0_EL1_##tg##_NI;	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static int set_id_aa64mmfr0_el1(struct kvm_vcpu *vcpu,</div><div class='add'>+				const struct sys_reg_desc *rd, u64 user_val)</div><div class='add'>+{</div><div class='add'>+	u64 sanitized_val = kvm_read_sanitised_id_reg(vcpu, rd);</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_nv(vcpu))</div><div class='add'>+		return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+</div><div class='add'>+	if (!tgran2_val_allowed(TGRAN4_2, sanitized_val, user_val) ||</div><div class='add'>+	    !tgran2_val_allowed(TGRAN16_2, sanitized_val, user_val) ||</div><div class='add'>+	    !tgran2_val_allowed(TGRAN64_2, sanitized_val, user_val))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_id_aa64mmfr2_el1(struct kvm_vcpu *vcpu,</div><div class='add'>+				const struct sys_reg_desc *rd, u64 user_val)</div><div class='add'>+{</div><div class='add'>+	u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64MMFR2_EL1);</div><div class='add'>+	u64 nv_mask = ID_AA64MMFR2_EL1_NV_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We made the mistake to expose the now deprecated NV field,</div><div class='add'>+	 * so allow userspace to write it, but silently ignore it.</div><div class='add'>+	 */</div><div class='add'>+	if ((hw_val &amp; nv_mask) == (user_val &amp; nv_mask))</div><div class='add'>+		user_val &amp;= ~nv_mask;</div><div class='add'>+</div><div class='add'>+	return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_ctr_el0(struct kvm_vcpu *vcpu,</div><div class='add'>+		       const struct sys_reg_desc *rd, u64 user_val)</div><div class='add'>+{</div><div class='add'>+	u8 user_L1Ip = SYS_FIELD_GET(CTR_EL0, L1Ip, user_val);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Both AIVIVT (0b01) and VPIPT (0b00) are documented as reserved.</div><div class='add'>+	 * Hence only allow to set VIPT(0b10) or PIPT(0b11) for L1Ip based</div><div class='add'>+	 * on what hardware reports.</div><div class='add'>+	 *</div><div class='add'>+	 * Using a VIPT software model on PIPT will lead to over invalidation,</div><div class='add'>+	 * but still correct. Hence, we can allow downgrading PIPT to VIPT,</div><div class='add'>+	 * but not the other way around. This is handled via arm64_ftr_safe_value()</div><div class='add'>+	 * as CTR_EL0 ftr_bits has L1Ip field with type FTR_EXACT and safe value</div><div class='add'>+	 * set as VIPT.</div><div class='add'>+	 */</div><div class='add'>+	switch (user_L1Ip) {</div><div class='add'>+	case CTR_EL0_L1Ip_RESERVED_VPIPT:</div><div class='add'>+	case CTR_EL0_L1Ip_RESERVED_AIVIVT:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case CTR_EL0_L1Ip_VIPT:</div><div class='add'>+	case CTR_EL0_L1Ip_PIPT:</div><div class='add'>+		return set_id_reg(vcpu, rd, user_val);</div><div class='add'>+	default:</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * cpufeature ID register user accessors</div><div class='ctx'>  *</div><div class='hunk'>@@ -1985,9 +2406,9 @@ static u64 reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> 	 * one cache line.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (kvm_has_mte(vcpu-&gt;kvm))</div><div class='del'>-		clidr |= 2 &lt;&lt; CLIDR_TTYPE_SHIFT(loc);</div><div class='add'>+		clidr |= 2ULL &lt;&lt; CLIDR_TTYPE_SHIFT(loc);</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) = clidr;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, clidr);</div><div class='ctx'> </div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -2001,7 +2422,7 @@ static int set_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,</div><div class='ctx'> 	if ((val &amp; CLIDR_EL1_RES0) || (!(ctr_el0 &amp; CTR_EL0_IDC) &amp;&amp; idc))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	__vcpu_sys_reg(vcpu, rd-&gt;reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, rd-&gt;reg, val);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2086,16 +2507,23 @@ static bool bad_redir_trap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			"trap of EL2 register redirected to EL1");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define EL2_REG(name, acc, rst, v) {		\</div><div class='add'>+#define EL2_REG_FILTERED(name, acc, rst, v, filter) {	\</div><div class='ctx'> 	SYS_DESC(SYS_##name),			\</div><div class='ctx'> 	.access = acc,				\</div><div class='ctx'> 	.reset = rst,				\</div><div class='ctx'> 	.reg = name,				\</div><div class='del'>-	.visibility = el2_visibility,		\</div><div class='add'>+	.visibility = filter,			\</div><div class='ctx'> 	.val = v,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define EL2_REG(name, acc, rst, v)			\</div><div class='add'>+	EL2_REG_FILTERED(name, acc, rst, v, el2_visibility)</div><div class='add'>+</div><div class='ctx'> #define EL2_REG_VNCR(name, rst, v)	EL2_REG(name, bad_vncr_trap, rst, v)</div><div class='add'>+#define EL2_REG_VNCR_FILT(name, vis)			\</div><div class='add'>+	EL2_REG_FILTERED(name, bad_vncr_trap, reset_val, 0, vis)</div><div class='add'>+#define EL2_REG_VNCR_GICv3(name)			\</div><div class='add'>+	EL2_REG_VNCR_FILT(name, hidden_visibility)</div><div class='ctx'> #define EL2_REG_REDIR(name, rst, v)	EL2_REG(name, bad_redir_trap, rst, v)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2109,50 +2537,53 @@ static bool bad_redir_trap(struct kvm_vcpu *vcpu,</div><div class='ctx'>  * from userspace.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define ID_DESC_DEFAULT_CALLBACKS		\</div><div class='add'>+	.access	= access_id_reg,		\</div><div class='add'>+	.get_user = get_id_reg,			\</div><div class='add'>+	.set_user = set_id_reg,			\</div><div class='add'>+	.visibility = id_visibility,		\</div><div class='add'>+	.reset = kvm_read_sanitised_id_reg</div><div class='add'>+</div><div class='ctx'> #define ID_DESC(name)				\</div><div class='ctx'> 	SYS_DESC(SYS_##name),			\</div><div class='del'>-	.access	= access_id_reg,		\</div><div class='del'>-	.get_user = get_id_reg			\</div><div class='add'>+	ID_DESC_DEFAULT_CALLBACKS</div><div class='ctx'> </div><div class='ctx'> /* sys_reg_desc initialiser for known cpufeature ID registers */</div><div class='ctx'> #define ID_SANITISED(name) {			\</div><div class='ctx'> 	ID_DESC(name),				\</div><div class='del'>-	.set_user = set_id_reg,			\</div><div class='del'>-	.visibility = id_visibility,		\</div><div class='del'>-	.reset = kvm_read_sanitised_id_reg,	\</div><div class='ctx'> 	.val = 0,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* sys_reg_desc initialiser for known cpufeature ID registers */</div><div class='ctx'> #define AA32_ID_SANITISED(name) {		\</div><div class='ctx'> 	ID_DESC(name),				\</div><div class='del'>-	.set_user = set_id_reg,			\</div><div class='ctx'> 	.visibility = aa32_id_visibility,	\</div><div class='del'>-	.reset = kvm_read_sanitised_id_reg,	\</div><div class='ctx'> 	.val = 0,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* sys_reg_desc initialiser for writable ID registers */</div><div class='ctx'> #define ID_WRITABLE(name, mask) {		\</div><div class='ctx'> 	ID_DESC(name),				\</div><div class='del'>-	.set_user = set_id_reg,			\</div><div class='del'>-	.visibility = id_visibility,		\</div><div class='del'>-	.reset = kvm_read_sanitised_id_reg,	\</div><div class='ctx'> 	.val = mask,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* sys_reg_desc initialiser for cpufeature ID registers that need filtering */</div><div class='add'>+#define ID_FILTERED(sysreg, name, mask) {	\</div><div class='add'>+	ID_DESC(sysreg),				\</div><div class='add'>+	.set_user = set_##name,				\</div><div class='add'>+	.val = (mask),					\</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * sys_reg_desc initialiser for architecturally unallocated cpufeature ID</div><div class='ctx'>  * register with encoding Op0=3, Op1=0, CRn=0, CRm=crm, Op2=op2</div><div class='ctx'>  * (1 &lt;= crm &lt; 8, 0 &lt;= Op2 &lt; 8).</div><div class='ctx'>  */</div><div class='ctx'> #define ID_UNALLOCATED(crm, op2) {			\</div><div class='add'>+	.name = "S3_0_0_" #crm "_" #op2,		\</div><div class='ctx'> 	Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2),	\</div><div class='del'>-	.access = access_id_reg,			\</div><div class='del'>-	.get_user = get_id_reg,				\</div><div class='del'>-	.set_user = set_id_reg,				\</div><div class='add'>+	ID_DESC_DEFAULT_CALLBACKS,			\</div><div class='ctx'> 	.visibility = raz_visibility,			\</div><div class='del'>-	.reset = kvm_read_sanitised_id_reg,		\</div><div class='ctx'> 	.val = 0,					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2163,9 +2594,7 @@ static bool bad_redir_trap(struct kvm_vcpu *vcpu,</div><div class='ctx'>  */</div><div class='ctx'> #define ID_HIDDEN(name) {			\</div><div class='ctx'> 	ID_DESC(name),				\</div><div class='del'>-	.set_user = set_id_reg,			\</div><div class='ctx'> 	.visibility = raz_visibility,		\</div><div class='del'>-	.reset = kvm_read_sanitised_id_reg,	\</div><div class='ctx'> 	.val = 0,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2174,7 +2603,7 @@ static bool access_sp_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			  const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='del'>-		__vcpu_sys_reg(vcpu, SP_EL1) = p-&gt;regval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, SP_EL1, p-&gt;regval);</div><div class='ctx'> 	else</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, SP_EL1);</div><div class='ctx'> </div><div class='hunk'>@@ -2198,7 +2627,7 @@ static bool access_spsr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='del'>-		__vcpu_sys_reg(vcpu, SPSR_EL1) = p-&gt;regval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, SPSR_EL1, p-&gt;regval);</div><div class='ctx'> 	else</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, SPSR_EL1);</div><div class='ctx'> </div><div class='hunk'>@@ -2210,7 +2639,7 @@ static bool access_cntkctl_el12(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	if (p-&gt;is_write)</div><div class='del'>-		__vcpu_sys_reg(vcpu, CNTKCTL_EL1) = p-&gt;regval;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, CNTKCTL_EL1, p-&gt;regval);</div><div class='ctx'> 	else</div><div class='ctx'> 		p-&gt;regval = __vcpu_sys_reg(vcpu, CNTKCTL_EL1);</div><div class='ctx'> </div><div class='hunk'>@@ -2224,19 +2653,48 @@ static u64 reset_hcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_HCR_NV1))</div><div class='ctx'> 		val |= HCR_E2H;</div><div class='ctx'> </div><div class='del'>-	return __vcpu_sys_reg(vcpu, r-&gt;reg) = val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, val);</div><div class='add'>+</div><div class='add'>+	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int __el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				     const struct sys_reg_desc *rd,</div><div class='add'>+				     unsigned int (*fn)(const struct kvm_vcpu *,</div><div class='add'>+							const struct sys_reg_desc *))</div><div class='add'>+{</div><div class='add'>+	return el2_visibility(vcpu, rd) ?: fn(vcpu, rd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int sve_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 				       const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	unsigned int r;</div><div class='add'>+	return __el2_visibility(vcpu, rd, sve_visibility);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int vncr_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+					const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (el2_visibility(vcpu, rd) == 0 &amp;&amp;</div><div class='add'>+	    kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	r = el2_visibility(vcpu, rd);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return sve_visibility(vcpu, rd);</div><div class='add'>+static unsigned int sctlr2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				      const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (kvm_has_sctlr2(vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int sctlr2_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+					  const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	return __el2_visibility(vcpu, rd, sctlr2_visibility);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool access_zcr_el2(struct kvm_vcpu *vcpu,</div><div class='hunk'>@@ -2258,18 +2716,309 @@ static bool access_zcr_el2(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vq = SYS_FIELD_GET(ZCR_ELx, LEN, p-&gt;regval) + 1;</div><div class='ctx'> 	vq = min(vq, vcpu_sve_max_vq(vcpu));</div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, vq - 1, ZCR_EL2);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_gic_vtr(struct kvm_vcpu *vcpu,</div><div class='add'>+			   struct sys_reg_params *p,</div><div class='add'>+			   const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;is_write)</div><div class='add'>+		return write_to_read_only(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	p-&gt;regval = kvm_get_guest_vtr_el2();</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_gic_misr(struct kvm_vcpu *vcpu,</div><div class='add'>+			    struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;is_write)</div><div class='add'>+		return write_to_read_only(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	p-&gt;regval = vgic_v3_get_misr(vcpu);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_gic_eisr(struct kvm_vcpu *vcpu,</div><div class='add'>+			    struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;is_write)</div><div class='add'>+		return write_to_read_only(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	p-&gt;regval = vgic_v3_get_eisr(vcpu);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_gic_elrsr(struct kvm_vcpu *vcpu,</div><div class='add'>+			     struct sys_reg_params *p,</div><div class='add'>+			     const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;is_write)</div><div class='add'>+		return write_to_read_only(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	p-&gt;regval = vgic_v3_get_elrsr(vcpu);</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int s1poe_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 				     const struct sys_reg_desc *rd)</div><div class='ctx'> {</div><div class='del'>-	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR3_EL1, S1POE, IMP))</div><div class='add'>+	if (kvm_has_s1poe(vcpu-&gt;kvm))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return REG_HIDDEN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int s1poe_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+					 const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	return __el2_visibility(vcpu, rd, s1poe_visibility);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tcr2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				    const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (kvm_has_tcr2(vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tcr2_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				    const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	return __el2_visibility(vcpu, rd, tcr2_visibility);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int fgt2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				    const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (el2_visibility(vcpu, rd) == 0 &amp;&amp;</div><div class='add'>+	    kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, FGT, FGT2))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int fgt_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				   const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (el2_visibility(vcpu, rd) == 0 &amp;&amp;</div><div class='add'>+	    kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, FGT, IMP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int s1pie_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				     const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (kvm_has_s1pie(vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int s1pie_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+					 const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	return __el2_visibility(vcpu, rd, s1pie_visibility);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_mdcr(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct sys_reg_params *p,</div><div class='add'>+			const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	u64 hpmn, val, old = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;is_write) {</div><div class='add'>+		p-&gt;regval = old;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = p-&gt;regval;</div><div class='add'>+	hpmn = FIELD_GET(MDCR_EL2_HPMN, val);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If HPMN is out of bounds, limit it to what we actually</div><div class='add'>+	 * support. This matches the UNKNOWN definition of the field</div><div class='add'>+	 * in that case, and keeps the emulation simple. Sort of.</div><div class='add'>+	 */</div><div class='add'>+	if (hpmn &gt; vcpu-&gt;kvm-&gt;arch.nr_pmu_counters) {</div><div class='add'>+		hpmn = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+		u64p_replace_bits(&amp;val, hpmn, MDCR_EL2_HPMN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, MDCR_EL2, val);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Request a reload of the PMU to enable/disable the counters</div><div class='add'>+	 * affected by HPME.</div><div class='add'>+	 */</div><div class='add'>+	if ((old ^ val) &amp; MDCR_EL2_HPME)</div><div class='add'>+		kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool access_ras(struct kvm_vcpu *vcpu,</div><div class='add'>+		       struct sys_reg_params *p,</div><div class='add'>+		       const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	switch(reg_to_encoding(r)) {</div><div class='add'>+	case SYS_ERXPFGCDN_EL1:</div><div class='add'>+	case SYS_ERXPFGCTL_EL1:</div><div class='add'>+	case SYS_ERXPFGF_EL1:</div><div class='add'>+	case SYS_ERXMISC2_EL1:</div><div class='add'>+	case SYS_ERXMISC3_EL1:</div><div class='add'>+		if (!(kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||</div><div class='add'>+		      (kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) &amp;&amp;</div><div class='add'>+		       kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)))) {</div><div class='add'>+			kvm_inject_undefined(vcpu);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {</div><div class='add'>+			kvm_inject_undefined(vcpu);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return trap_raz_wi(vcpu, p, r);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For historical (ahem ABI) reasons, KVM treated MIDR_EL1, REVIDR_EL1, and</div><div class='add'>+ * AIDR_EL1 as "invariant" registers, meaning userspace cannot change them.</div><div class='add'>+ * The values made visible to userspace were the register values of the boot</div><div class='add'>+ * CPU.</div><div class='add'>+ *</div><div class='add'>+ * At the same time, reads from these registers at EL1 previously were not</div><div class='add'>+ * trapped, allowing the guest to read the actual hardware value. On big-little</div><div class='add'>+ * machines, this means the VM can see different values depending on where a</div><div class='add'>+ * given vCPU got scheduled.</div><div class='add'>+ *</div><div class='add'>+ * These registers are now trapped as collateral damage from SME, and what</div><div class='add'>+ * follows attempts to give a user / guest view consistent with the existing</div><div class='add'>+ * ABI.</div><div class='add'>+ */</div><div class='add'>+static bool access_imp_id_reg(struct kvm_vcpu *vcpu,</div><div class='add'>+			      struct sys_reg_params *p,</div><div class='add'>+			      const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;is_write)</div><div class='add'>+		return write_to_read_only(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return the VM-scoped implementation ID register values if userspace</div><div class='add'>+	 * has made them writable.</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &amp;vcpu-&gt;kvm-&gt;arch.flags))</div><div class='add'>+		return access_id_reg(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Otherwise, fall back to the old behavior of returning the value of</div><div class='add'>+	 * the current CPU.</div><div class='add'>+	 */</div><div class='add'>+	switch (reg_to_encoding(r)) {</div><div class='add'>+	case SYS_REVIDR_EL1:</div><div class='add'>+		p-&gt;regval = read_sysreg(revidr_el1);</div><div class='add'>+		break;</div><div class='add'>+	case SYS_AIDR_EL1:</div><div class='add'>+		p-&gt;regval = read_sysreg(aidr_el1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 __ro_after_init boot_cpu_midr_val;</div><div class='add'>+static u64 __ro_after_init boot_cpu_revidr_val;</div><div class='add'>+static u64 __ro_after_init boot_cpu_aidr_val;</div><div class='add'>+</div><div class='add'>+static void init_imp_id_regs(void)</div><div class='add'>+{</div><div class='add'>+	boot_cpu_midr_val = read_sysreg(midr_el1);</div><div class='add'>+	boot_cpu_revidr_val = read_sysreg(revidr_el1);</div><div class='add'>+	boot_cpu_aidr_val = read_sysreg(aidr_el1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 reset_imp_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	switch (reg_to_encoding(r)) {</div><div class='add'>+	case SYS_MIDR_EL1:</div><div class='add'>+		return boot_cpu_midr_val;</div><div class='add'>+	case SYS_REVIDR_EL1:</div><div class='add'>+		return boot_cpu_revidr_val;</div><div class='add'>+	case SYS_AIDR_EL1:</div><div class='add'>+		return boot_cpu_aidr_val;</div><div class='add'>+	default:</div><div class='add'>+		KVM_BUG_ON(1, vcpu-&gt;kvm);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_imp_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			  u64 val)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	u64 expected;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;kvm-&gt;arch.config_lock);</div><div class='add'>+</div><div class='add'>+	expected = read_id_reg(vcpu, r);</div><div class='add'>+	if (expected == val)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS, &amp;kvm-&gt;arch.flags))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Once the VM has started the ID registers are immutable. Reject the</div><div class='add'>+	 * write if userspace tries to change it.</div><div class='add'>+	 */</div><div class='add'>+	if (kvm_vm_has_ran_once(kvm))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Any value is allowed for the implementation ID registers so long as</div><div class='add'>+	 * it is within the writable mask.</div><div class='add'>+	 */</div><div class='add'>+	if ((val &amp; r-&gt;val) != val)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	kvm_set_vm_id_reg(kvm, reg_to_encoding(r), val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define IMPLEMENTATION_ID(reg, mask) {			\</div><div class='add'>+	SYS_DESC(SYS_##reg),				\</div><div class='add'>+	.access = access_imp_id_reg,			\</div><div class='add'>+	.get_user = get_id_reg,				\</div><div class='add'>+	.set_user = set_imp_id_reg,			\</div><div class='add'>+	.reset = reset_imp_id_reg,			\</div><div class='add'>+	.val = mask,					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static u64 reset_mdcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, vcpu-&gt;kvm-&gt;arch.nr_pmu_counters);</div><div class='add'>+	return vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Architected system registers.</div><div class='ctx'>  * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2</div><div class='hunk'>@@ -2318,7 +3067,9 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_DBGVCR32_EL2), undef_access, reset_val, DBGVCR32_EL2, 0 },</div><div class='ctx'> </div><div class='add'>+	IMPLEMENTATION_ID(MIDR_EL1, GENMASK_ULL(31, 0)),</div><div class='ctx'> 	{ SYS_DESC(SYS_MPIDR_EL1), NULL, reset_mpidr, MPIDR_EL1 },</div><div class='add'>+	IMPLEMENTATION_ID(REVIDR_EL1, GENMASK_ULL(63, 0)),</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ID regs: all ID_SANITISED() entries here must have corresponding</div><div class='hunk'>@@ -2365,19 +3116,28 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* AArch64 ID registers */</div><div class='ctx'> 	/* CRm=4 */</div><div class='del'>-	{ SYS_DESC(SYS_ID_AA64PFR0_EL1),</div><div class='del'>-	  .access = access_id_reg,</div><div class='del'>-	  .get_user = get_id_reg,</div><div class='del'>-	  .set_user = set_id_reg,</div><div class='del'>-	  .reset = read_sanitised_id_aa64pfr0_el1,</div><div class='del'>-	  .val = ~(ID_AA64PFR0_EL1_AMU |</div><div class='del'>-		   ID_AA64PFR0_EL1_MPAM |</div><div class='del'>-		   ID_AA64PFR0_EL1_SVE |</div><div class='del'>-		   ID_AA64PFR0_EL1_RAS |</div><div class='del'>-		   ID_AA64PFR0_EL1_AdvSIMD |</div><div class='del'>-		   ID_AA64PFR0_EL1_FP), },</div><div class='del'>-	ID_SANITISED(ID_AA64PFR1_EL1),</div><div class='del'>-	ID_WRITABLE(ID_AA64PFR2_EL1, ID_AA64PFR2_EL1_FPMR),</div><div class='add'>+	ID_FILTERED(ID_AA64PFR0_EL1, id_aa64pfr0_el1,</div><div class='add'>+		    ~(ID_AA64PFR0_EL1_AMU |</div><div class='add'>+		      ID_AA64PFR0_EL1_MPAM |</div><div class='add'>+		      ID_AA64PFR0_EL1_SVE |</div><div class='add'>+		      ID_AA64PFR0_EL1_AdvSIMD |</div><div class='add'>+		      ID_AA64PFR0_EL1_FP)),</div><div class='add'>+	ID_FILTERED(ID_AA64PFR1_EL1, id_aa64pfr1_el1,</div><div class='add'>+				     ~(ID_AA64PFR1_EL1_PFAR |</div><div class='add'>+				       ID_AA64PFR1_EL1_MTEX |</div><div class='add'>+				       ID_AA64PFR1_EL1_THE |</div><div class='add'>+				       ID_AA64PFR1_EL1_GCS |</div><div class='add'>+				       ID_AA64PFR1_EL1_MTE_frac |</div><div class='add'>+				       ID_AA64PFR1_EL1_NMI |</div><div class='add'>+				       ID_AA64PFR1_EL1_RNDR_trap |</div><div class='add'>+				       ID_AA64PFR1_EL1_SME |</div><div class='add'>+				       ID_AA64PFR1_EL1_RES0 |</div><div class='add'>+				       ID_AA64PFR1_EL1_MPAM_frac |</div><div class='add'>+				       ID_AA64PFR1_EL1_MTE)),</div><div class='add'>+	ID_WRITABLE(ID_AA64PFR2_EL1,</div><div class='add'>+		    ID_AA64PFR2_EL1_FPMR |</div><div class='add'>+		    ID_AA64PFR2_EL1_MTEFAR |</div><div class='add'>+		    ID_AA64PFR2_EL1_MTESTOREONLY),</div><div class='ctx'> 	ID_UNALLOCATED(4,3),</div><div class='ctx'> 	ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0),</div><div class='ctx'> 	ID_HIDDEN(ID_AA64SMFR0_EL1),</div><div class='hunk'>@@ -2385,13 +3145,23 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	ID_WRITABLE(ID_AA64FPFR0_EL1, ~ID_AA64FPFR0_EL1_RES0),</div><div class='ctx'> </div><div class='ctx'> 	/* CRm=5 */</div><div class='del'>-	{ SYS_DESC(SYS_ID_AA64DFR0_EL1),</div><div class='del'>-	  .access = access_id_reg,</div><div class='del'>-	  .get_user = get_id_reg,</div><div class='del'>-	  .set_user = set_id_aa64dfr0_el1,</div><div class='del'>-	  .reset = read_sanitised_id_aa64dfr0_el1,</div><div class='del'>-	  .val = ID_AA64DFR0_EL1_PMUVer_MASK |</div><div class='del'>-		 ID_AA64DFR0_EL1_DebugVer_MASK, },</div><div class='add'>+	/*</div><div class='add'>+	 * Prior to FEAT_Debugv8.9, the architecture defines context-aware</div><div class='add'>+	 * breakpoints (CTX_CMPs) as the highest numbered breakpoints (BRPs).</div><div class='add'>+	 * KVM does not trap + emulate the breakpoint registers, and as such</div><div class='add'>+	 * cannot support a layout that misaligns with the underlying hardware.</div><div class='add'>+	 * While it may be possible to describe a subset that aligns with</div><div class='add'>+	 * hardware, just prevent changes to BRPs and CTX_CMPs altogether for</div><div class='add'>+	 * simplicity.</div><div class='add'>+	 *</div><div class='add'>+	 * See DDI0487K.a, section D2.8.3 Breakpoint types and linking</div><div class='add'>+	 * of breakpoints for more details.</div><div class='add'>+	 */</div><div class='add'>+	ID_FILTERED(ID_AA64DFR0_EL1, id_aa64dfr0_el1,</div><div class='add'>+		    ID_AA64DFR0_EL1_DoubleLock_MASK |</div><div class='add'>+		    ID_AA64DFR0_EL1_WRPs_MASK |</div><div class='add'>+		    ID_AA64DFR0_EL1_PMUVer_MASK |</div><div class='add'>+		    ID_AA64DFR0_EL1_DebugVer_MASK),</div><div class='ctx'> 	ID_SANITISED(ID_AA64DFR1_EL1),</div><div class='ctx'> 	ID_UNALLOCATED(5,2),</div><div class='ctx'> 	ID_UNALLOCATED(5,3),</div><div class='hunk'>@@ -2409,32 +3179,34 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	ID_WRITABLE(ID_AA64ISAR2_EL1, ~(ID_AA64ISAR2_EL1_RES0 |</div><div class='ctx'> 					ID_AA64ISAR2_EL1_APA3 |</div><div class='ctx'> 					ID_AA64ISAR2_EL1_GPA3)),</div><div class='del'>-	ID_UNALLOCATED(6,3),</div><div class='add'>+	ID_WRITABLE(ID_AA64ISAR3_EL1, (ID_AA64ISAR3_EL1_FPRCVT |</div><div class='add'>+				       ID_AA64ISAR3_EL1_LSFE |</div><div class='add'>+				       ID_AA64ISAR3_EL1_FAMINMAX)),</div><div class='ctx'> 	ID_UNALLOCATED(6,4),</div><div class='ctx'> 	ID_UNALLOCATED(6,5),</div><div class='ctx'> 	ID_UNALLOCATED(6,6),</div><div class='ctx'> 	ID_UNALLOCATED(6,7),</div><div class='ctx'> </div><div class='ctx'> 	/* CRm=7 */</div><div class='del'>-	ID_WRITABLE(ID_AA64MMFR0_EL1, ~(ID_AA64MMFR0_EL1_RES0 |</div><div class='del'>-					ID_AA64MMFR0_EL1_TGRAN4_2 |</div><div class='del'>-					ID_AA64MMFR0_EL1_TGRAN64_2 |</div><div class='del'>-					ID_AA64MMFR0_EL1_TGRAN16_2)),</div><div class='add'>+	ID_FILTERED(ID_AA64MMFR0_EL1, id_aa64mmfr0_el1,</div><div class='add'>+				      ~(ID_AA64MMFR0_EL1_RES0 |</div><div class='add'>+					ID_AA64MMFR0_EL1_ASIDBITS)),</div><div class='ctx'> 	ID_WRITABLE(ID_AA64MMFR1_EL1, ~(ID_AA64MMFR1_EL1_RES0 |</div><div class='del'>-					ID_AA64MMFR1_EL1_HCX |</div><div class='del'>-					ID_AA64MMFR1_EL1_TWED |</div><div class='ctx'> 					ID_AA64MMFR1_EL1_XNX |</div><div class='ctx'> 					ID_AA64MMFR1_EL1_VH |</div><div class='ctx'> 					ID_AA64MMFR1_EL1_VMIDBits)),</div><div class='del'>-	ID_WRITABLE(ID_AA64MMFR2_EL1, ~(ID_AA64MMFR2_EL1_RES0 |</div><div class='add'>+	ID_FILTERED(ID_AA64MMFR2_EL1,</div><div class='add'>+		    id_aa64mmfr2_el1, ~(ID_AA64MMFR2_EL1_RES0 |</div><div class='ctx'> 					ID_AA64MMFR2_EL1_EVT |</div><div class='ctx'> 					ID_AA64MMFR2_EL1_FWB |</div><div class='ctx'> 					ID_AA64MMFR2_EL1_IDS |</div><div class='ctx'> 					ID_AA64MMFR2_EL1_NV |</div><div class='ctx'> 					ID_AA64MMFR2_EL1_CCIDX)),</div><div class='ctx'> 	ID_WRITABLE(ID_AA64MMFR3_EL1, (ID_AA64MMFR3_EL1_TCRX	|</div><div class='add'>+				       ID_AA64MMFR3_EL1_SCTLRX	|</div><div class='add'>+				       ID_AA64MMFR3_EL1_S1PIE   |</div><div class='ctx'> 				       ID_AA64MMFR3_EL1_S1POE)),</div><div class='del'>-	ID_SANITISED(ID_AA64MMFR4_EL1),</div><div class='add'>+	ID_WRITABLE(ID_AA64MMFR4_EL1, ID_AA64MMFR4_EL1_NV_frac),</div><div class='ctx'> 	ID_UNALLOCATED(7,5),</div><div class='ctx'> 	ID_UNALLOCATED(7,6),</div><div class='ctx'> 	ID_UNALLOCATED(7,7),</div><div class='hunk'>@@ -2442,6 +3214,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },</div><div class='ctx'> 	{ SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 },</div><div class='ctx'> 	{ SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 },</div><div class='add'>+	{ SYS_DESC(SYS_SCTLR2_EL1), access_vm_reg, reset_val, SCTLR2_EL1, 0,</div><div class='add'>+	  .visibility = sctlr2_visibility },</div><div class='ctx'> </div><div class='ctx'> 	MTE_REG(RGSR_EL1),</div><div class='ctx'> 	MTE_REG(GCR_EL1),</div><div class='hunk'>@@ -2453,7 +3227,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 },</div><div class='ctx'> 	{ SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },</div><div class='ctx'> 	{ SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },</div><div class='del'>-	{ SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0 },</div><div class='add'>+	{ SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0,</div><div class='add'>+	  .visibility = tcr2_visibility },</div><div class='ctx'> </div><div class='ctx'> 	PTRAUTH_KEY(APIA),</div><div class='ctx'> 	PTRAUTH_KEY(APIB),</div><div class='hunk'>@@ -2470,14 +3245,19 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_AFSR1_EL1), access_vm_reg, reset_unknown, AFSR1_EL1 },</div><div class='ctx'> 	{ SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },</div><div class='ctx'> </div><div class='del'>-	{ SYS_DESC(SYS_ERRIDR_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERRSELR_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXFR_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXCTLR_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXSTATUS_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXADDR_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi },</div><div class='del'>-	{ SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi },</div><div class='add'>+	{ SYS_DESC(SYS_ERRIDR_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERRSELR_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXFR_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXCTLR_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXSTATUS_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXADDR_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXPFGF_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXPFGCTL_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXPFGCDN_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXMISC0_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXMISC1_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXMISC2_EL1), access_ras },</div><div class='add'>+	{ SYS_DESC(SYS_ERXMISC3_EL1), access_ras },</div><div class='ctx'> </div><div class='ctx'> 	MTE_REG(TFSR_EL1),</div><div class='ctx'> 	MTE_REG(TFSRE0_EL1),</div><div class='hunk'>@@ -2496,6 +3276,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_PMBLIMITR_EL1), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_PMBPTR_EL1), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_PMBSR_EL1), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_PMSDSFR_EL1), undef_access },</div><div class='ctx'> 	/* PMBIDR_EL1 is not trapped */</div><div class='ctx'> </div><div class='ctx'> 	{ PMU_SYS_REG(PMINTENSET_EL1),</div><div class='hunk'>@@ -2507,8 +3288,10 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_PMMIR_EL1), trap_raz_wi },</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },</div><div class='del'>-	{ SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1 },</div><div class='del'>-	{ SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1 },</div><div class='add'>+	{ SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1,</div><div class='add'>+	  .visibility = s1pie_visibility },</div><div class='add'>+	{ SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1,</div><div class='add'>+	  .visibility = s1pie_visibility },</div><div class='ctx'> 	{ SYS_DESC(SYS_POR_EL1), NULL, reset_unknown, POR_EL1,</div><div class='ctx'> 	  .visibility = s1poe_visibility },</div><div class='ctx'> 	{ SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 },</div><div class='hunk'>@@ -2517,8 +3300,11 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_LOREA_EL1), trap_loregion },</div><div class='ctx'> 	{ SYS_DESC(SYS_LORN_EL1), trap_loregion },</div><div class='ctx'> 	{ SYS_DESC(SYS_LORC_EL1), trap_loregion },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMIDR_EL1), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_LORID_EL1), trap_loregion },</div><div class='ctx'> </div><div class='add'>+	{ SYS_DESC(SYS_MPAM1_EL1), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAM0_EL1), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_VBAR_EL1), access_rw, reset_val, VBAR_EL1, 0 },</div><div class='ctx'> 	{ SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 },</div><div class='ctx'> </div><div class='hunk'>@@ -2562,11 +3348,14 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	  .set_user = set_clidr, .val = ~CLIDR_EL1_RES0 },</div><div class='ctx'> 	{ SYS_DESC(SYS_CCSIDR2_EL1), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_SMIDR_EL1), undef_access },</div><div class='add'>+	IMPLEMENTATION_ID(AIDR_EL1, GENMASK_ULL(63, 0)),</div><div class='ctx'> 	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },</div><div class='del'>-	ID_WRITABLE(CTR_EL0, CTR_EL0_DIC_MASK |</div><div class='del'>-			     CTR_EL0_IDC_MASK |</div><div class='del'>-			     CTR_EL0_DminLine_MASK |</div><div class='del'>-			     CTR_EL0_IminLine_MASK),</div><div class='add'>+	ID_FILTERED(CTR_EL0, ctr_el0,</div><div class='add'>+		    CTR_EL0_DIC_MASK |</div><div class='add'>+		    CTR_EL0_IDC_MASK |</div><div class='add'>+		    CTR_EL0_DminLine_MASK |</div><div class='add'>+		    CTR_EL0_L1Ip_MASK |</div><div class='add'>+		    CTR_EL0_IminLine_MASK),</div><div class='ctx'> 	{ SYS_DESC(SYS_SVCR), undef_access, reset_val, SVCR, 0, .visibility = sme_visibility  },</div><div class='ctx'> 	{ SYS_DESC(SYS_FPMR), undef_access, reset_val, FPMR, 0, .visibility = fp8_visibility },</div><div class='ctx'> </div><div class='hunk'>@@ -2596,7 +3385,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	  .access = access_pmceid, .reset = NULL },</div><div class='ctx'> 	{ PMU_SYS_REG(PMCCNTR_EL0),</div><div class='ctx'> 	  .access = access_pmu_evcntr, .reset = reset_unknown,</div><div class='del'>-	  .reg = PMCCNTR_EL0, .get_user = get_pmu_evcntr},</div><div class='add'>+	  .reg = PMCCNTR_EL0, .get_user = get_pmu_evcntr,</div><div class='add'>+	  .set_user = set_pmu_evcntr },</div><div class='ctx'> 	{ PMU_SYS_REG(PMXEVTYPER_EL0),</div><div class='ctx'> 	  .access = access_pmu_evtyper, .reset = NULL },</div><div class='ctx'> 	{ PMU_SYS_REG(PMXEVCNTR_EL0),</div><div class='hunk'>@@ -2693,11 +3483,17 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	AMU_AMEVTYPER1_EL0(15),</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_CNTPCT_EL0), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTVCT_EL0), access_arch_timer },</div><div class='ctx'> 	{ SYS_DESC(SYS_CNTPCTSS_EL0), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTVCTSS_EL0), access_arch_timer },</div><div class='ctx'> 	{ SYS_DESC(SYS_CNTP_TVAL_EL0), access_arch_timer },</div><div class='ctx'> 	{ SYS_DESC(SYS_CNTP_CTL_EL0), access_arch_timer },</div><div class='ctx'> 	{ SYS_DESC(SYS_CNTP_CVAL_EL0), access_arch_timer },</div><div class='ctx'> </div><div class='add'>+	{ SYS_DESC(SYS_CNTV_TVAL_EL0), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTV_CTL_EL0), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTV_CVAL_EL0), access_arch_timer },</div><div class='add'>+</div><div class='ctx'> 	/* PMEVCNTRn_EL0 */</div><div class='ctx'> 	PMU_PMEVCNTR_EL0(0),</div><div class='ctx'> 	PMU_PMEVCNTR_EL0(1),</div><div class='hunk'>@@ -2773,30 +3569,41 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	EL2_REG_VNCR(VMPIDR_EL2, reset_unknown, 0),</div><div class='ctx'> 	EL2_REG(SCTLR_EL2, access_rw, reset_val, SCTLR_EL2_RES1),</div><div class='ctx'> 	EL2_REG(ACTLR_EL2, access_rw, reset_val, 0),</div><div class='add'>+	EL2_REG_FILTERED(SCTLR2_EL2, access_vm_reg, reset_val, 0,</div><div class='add'>+			 sctlr2_el2_visibility),</div><div class='ctx'> 	EL2_REG_VNCR(HCR_EL2, reset_hcr, 0),</div><div class='del'>-	EL2_REG(MDCR_EL2, access_rw, reset_val, 0),</div><div class='add'>+	EL2_REG(MDCR_EL2, access_mdcr, reset_mdcr, 0),</div><div class='ctx'> 	EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1),</div><div class='ctx'> 	EL2_REG_VNCR(HSTR_EL2, reset_val, 0),</div><div class='del'>-	EL2_REG_VNCR(HFGRTR_EL2, reset_val, 0),</div><div class='del'>-	EL2_REG_VNCR(HFGWTR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_VNCR_FILT(HFGRTR_EL2, fgt_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HFGWTR_EL2, fgt_visibility),</div><div class='ctx'> 	EL2_REG_VNCR(HFGITR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG_VNCR(HACR_EL2, reset_val, 0),</div><div class='ctx'> </div><div class='del'>-	{ SYS_DESC(SYS_ZCR_EL2), .access = access_zcr_el2, .reset = reset_val,</div><div class='del'>-	  .visibility = sve_el2_visibility, .reg = ZCR_EL2 },</div><div class='add'>+	EL2_REG_FILTERED(ZCR_EL2, access_zcr_el2, reset_val, 0,</div><div class='add'>+			 sve_el2_visibility),</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG_VNCR(HCRX_EL2, reset_val, 0),</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG(TTBR0_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG(TTBR1_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG(TCR_EL2, access_rw, reset_val, TCR_EL2_RES1),</div><div class='add'>+	EL2_REG_FILTERED(TCR2_EL2, access_rw, reset_val, TCR2_EL2_RES1,</div><div class='add'>+			 tcr2_el2_visibility),</div><div class='ctx'> 	EL2_REG_VNCR(VTTBR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG_VNCR(VTCR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_FILTERED(VNCR_EL2, bad_vncr_trap, reset_val, 0,</div><div class='add'>+			 vncr_el2_visibility),</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },</div><div class='del'>-	EL2_REG_VNCR(HDFGRTR_EL2, reset_val, 0),</div><div class='del'>-	EL2_REG_VNCR(HDFGWTR_EL2, reset_val, 0),</div><div class='del'>-	EL2_REG_VNCR(HAFGRTR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_VNCR_FILT(HDFGRTR2_EL2, fgt2_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HDFGWTR2_EL2, fgt2_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HFGRTR2_EL2, fgt2_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HFGWTR2_EL2, fgt2_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HDFGRTR_EL2, fgt_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HDFGWTR_EL2, fgt_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HAFGRTR_EL2, fgt_visibility),</div><div class='add'>+	EL2_REG_VNCR_FILT(HFGITR2_EL2, fgt2_visibility),</div><div class='ctx'> 	EL2_REG_REDIR(SPSR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG_REDIR(ELR_EL2, reset_val, 0),</div><div class='ctx'> 	{ SYS_DESC(SYS_SP_EL1), access_sp_el1},</div><div class='hunk'>@@ -2811,28 +3618,95 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	EL2_REG(AFSR0_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG(AFSR1_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG_REDIR(ESR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_VNCR(VSESR_EL2, reset_unknown, 0),</div><div class='ctx'> 	{ SYS_DESC(SYS_FPEXC32_EL2), undef_access, reset_val, FPEXC32_EL2, 0x700 },</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG_REDIR(FAR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG(HPFAR_EL2, access_rw, reset_val, 0),</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG(MAIR_EL2, access_rw, reset_val, 0),</div><div class='add'>+	EL2_REG_FILTERED(PIRE0_EL2, access_rw, reset_val, 0,</div><div class='add'>+			 s1pie_el2_visibility),</div><div class='add'>+	EL2_REG_FILTERED(PIR_EL2, access_rw, reset_val, 0,</div><div class='add'>+			 s1pie_el2_visibility),</div><div class='add'>+	EL2_REG_FILTERED(POR_EL2, access_rw, reset_val, 0,</div><div class='add'>+			 s1poe_el2_visibility),</div><div class='ctx'> 	EL2_REG(AMAIR_EL2, access_rw, reset_val, 0),</div><div class='add'>+	{ SYS_DESC(SYS_MPAMHCR_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPMV_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAM2_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM0_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM1_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM2_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM3_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM4_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM5_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM6_EL2), undef_access },</div><div class='add'>+	{ SYS_DESC(SYS_MPAMVPM7_EL2), undef_access },</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG(VBAR_EL2, access_rw, reset_val, 0),</div><div class='del'>-	EL2_REG(RVBAR_EL2, access_rw, reset_val, 0),</div><div class='add'>+	{ SYS_DESC(SYS_RVBAR_EL2), undef_access },</div><div class='ctx'> 	{ SYS_DESC(SYS_RMR_EL2), undef_access },</div><div class='del'>-</div><div class='del'>-	EL2_REG_VNCR(ICH_HCR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_VNCR(VDISR_EL2, reset_unknown, 0),</div><div class='add'>+</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP0R0_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP0R1_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP0R2_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP0R3_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP1R0_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP1R1_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP1R2_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_AP1R3_EL2),</div><div class='add'>+</div><div class='add'>+	{ SYS_DESC(SYS_ICC_SRE_EL2), access_gic_sre },</div><div class='add'>+</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_HCR_EL2),</div><div class='add'>+	{ SYS_DESC(SYS_ICH_VTR_EL2), access_gic_vtr },</div><div class='add'>+	{ SYS_DESC(SYS_ICH_MISR_EL2), access_gic_misr },</div><div class='add'>+	{ SYS_DESC(SYS_ICH_EISR_EL2), access_gic_eisr },</div><div class='add'>+	{ SYS_DESC(SYS_ICH_ELRSR_EL2), access_gic_elrsr },</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_VMCR_EL2),</div><div class='add'>+</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR0_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR1_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR2_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR3_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR4_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR5_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR6_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR7_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR8_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR9_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR10_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR11_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR12_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR13_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR14_EL2),</div><div class='add'>+	EL2_REG_VNCR_GICv3(ICH_LR15_EL2),</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG(CONTEXTIDR_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG(TPIDR_EL2, access_rw, reset_val, 0),</div><div class='ctx'> </div><div class='ctx'> 	EL2_REG_VNCR(CNTVOFF_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG(CNTHCTL_EL2, access_rw, reset_val, 0),</div><div class='add'>+	{ SYS_DESC(SYS_CNTHP_TVAL_EL2), access_arch_timer },</div><div class='add'>+	EL2_REG(CNTHP_CTL_EL2, access_arch_timer, reset_val, 0),</div><div class='add'>+	EL2_REG(CNTHP_CVAL_EL2, access_arch_timer, reset_val, 0),</div><div class='add'>+</div><div class='add'>+	{ SYS_DESC(SYS_CNTHV_TVAL_EL2), access_hv_timer },</div><div class='add'>+	EL2_REG(CNTHV_CTL_EL2, access_hv_timer, reset_val, 0),</div><div class='add'>+	EL2_REG(CNTHV_CVAL_EL2, access_hv_timer, reset_val, 0),</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_CNTKCTL_EL12), access_cntkctl_el12 },</div><div class='ctx'> </div><div class='add'>+	{ SYS_DESC(SYS_CNTP_TVAL_EL02), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTP_CTL_EL02), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTP_CVAL_EL02), access_arch_timer },</div><div class='add'>+</div><div class='add'>+	{ SYS_DESC(SYS_CNTV_TVAL_EL02), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTV_CTL_EL02), access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_CNTV_CVAL_EL02), access_arch_timer },</div><div class='add'>+</div><div class='ctx'> 	EL2_REG(SP_EL2, NULL, reset_unknown, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2903,7 +3777,7 @@ static bool handle_alle1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	 * Drop all shadow S2s, resulting in S1/S2 TLBIs for each of the</div><div class='ctx'> 	 * corresponding VMIDs.</div><div class='ctx'> 	 */</div><div class='del'>-	kvm_nested_s2_unmap(vcpu-&gt;kvm);</div><div class='add'>+	kvm_nested_s2_unmap(vcpu-&gt;kvm, true);</div><div class='ctx'> </div><div class='ctx'> 	write_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2955,7 +3829,30 @@ union tlbi_info {</div><div class='ctx'> static void s2_mmu_unmap_range(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 			       const union tlbi_info *info)</div><div class='ctx'> {</div><div class='del'>-	kvm_stage2_unmap_range(mmu, info-&gt;range.start, info-&gt;range.size);</div><div class='add'>+	/*</div><div class='add'>+	 * The unmap operation is allowed to drop the MMU lock and block, which</div><div class='add'>+	 * means that @mmu could be used for a different context than the one</div><div class='add'>+	 * currently being invalidated.</div><div class='add'>+	 *</div><div class='add'>+	 * This behavior is still safe, as:</div><div class='add'>+	 *</div><div class='add'>+	 *  1) The vCPU(s) that recycled the MMU are responsible for invalidating</div><div class='add'>+	 *     the entire MMU before reusing it, which still honors the intent</div><div class='add'>+	 *     of a TLBI.</div><div class='add'>+	 *</div><div class='add'>+	 *  2) Until the guest TLBI instruction is 'retired' (i.e. increment PC</div><div class='add'>+	 *     and ERET to the guest), other vCPUs are allowed to use stale</div><div class='add'>+	 *     translations.</div><div class='add'>+	 *</div><div class='add'>+	 *  3) Accidentally unmapping an unrelated MMU context is nonfatal, and</div><div class='add'>+	 *     at worst may cause more aborts for shadow stage-2 fills.</div><div class='add'>+	 *</div><div class='add'>+	 * Dropping the MMU lock also implies that shadow stage-2 fills could</div><div class='add'>+	 * happen behind the back of the TLBI. This is still safe, though, as</div><div class='add'>+	 * the L1 needs to put its stage-2 in a consistent state before doing</div><div class='add'>+	 * the TLBI.</div><div class='add'>+	 */</div><div class='add'>+	kvm_stage2_unmap_range(mmu, info-&gt;range.start, info-&gt;range.size, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool handle_vmalls12e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='hunk'>@@ -2987,8 +3884,7 @@ static bool handle_ripas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> {</div><div class='ctx'> 	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='ctx'> 	u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);</div><div class='del'>-	u64 base, range, tg, num, scale;</div><div class='del'>-	int shift;</div><div class='add'>+	u64 base, range;</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_supported_tlbi_ipas2_op(vcpu, sys_encoding))</div><div class='ctx'> 		return undef_access(vcpu, p, r);</div><div class='hunk'>@@ -2998,26 +3894,7 @@ static bool handle_ripas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	 * of the guest's S2 (different base granule size, for example), we</div><div class='ctx'> 	 * decide to ignore TTL and only use the described range.</div><div class='ctx'> 	 */</div><div class='del'>-	tg	= FIELD_GET(GENMASK(47, 46), p-&gt;regval);</div><div class='del'>-	scale	= FIELD_GET(GENMASK(45, 44), p-&gt;regval);</div><div class='del'>-	num	= FIELD_GET(GENMASK(43, 39), p-&gt;regval);</div><div class='del'>-	base	= p-&gt;regval &amp; GENMASK(36, 0);</div><div class='del'>-</div><div class='del'>-	switch(tg) {</div><div class='del'>-	case 1:</div><div class='del'>-		shift = 12;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		shift = 14;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-	default:		/* IMPDEF: handle tg==0 as 64k */</div><div class='del'>-		shift = 16;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	base &lt;&lt;= shift;</div><div class='del'>-	range = __TLBI_RANGE_PAGES(num, scale) &lt;&lt; shift;</div><div class='add'>+	base = decode_range_tlbi(p-&gt;regval, &amp;range, NULL);</div><div class='ctx'> </div><div class='ctx'> 	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm, get_vmid(vttbr),</div><div class='ctx'> 				   &amp;(union tlbi_info) {</div><div class='hunk'>@@ -3050,7 +3927,11 @@ static void s2_mmu_unmap_ipa(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 	max_size = compute_tlb_inval_range(mmu, info-&gt;ipa.addr);</div><div class='ctx'> 	base_addr &amp;= ~(max_size - 1);</div><div class='ctx'> </div><div class='del'>-	kvm_stage2_unmap_range(mmu, base_addr, max_size);</div><div class='add'>+	/*</div><div class='add'>+	 * See comment in s2_mmu_unmap_range() for why this is allowed to</div><div class='add'>+	 * reschedule.</div><div class='add'>+	 */</div><div class='add'>+	kvm_stage2_unmap_range(mmu, base_addr, max_size, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool handle_ipas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='hunk'>@@ -3079,11 +3960,22 @@ static void s2_mmu_tlbi_s1e1(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 	WARN_ON(__kvm_tlbi_s1e2(mmu, info-&gt;va.addr, info-&gt;va.encoding));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool handle_tlbi_el2(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='add'>+</div><div class='add'>+	if (!kvm_supported_tlbi_s1e2_op(vcpu, sys_encoding))</div><div class='add'>+		return undef_access(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	kvm_handle_s1e2_tlbi(vcpu, sys_encoding, p-&gt;regval);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 			    const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='del'>-	u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're here, this is because we've trapped on a EL1 TLBI</div><div class='hunk'>@@ -3094,6 +3986,13 @@ static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	 * - HCR_EL2.E2H == 0 : a non-VHE guest</div><div class='ctx'> 	 * - HCR_EL2.{E2H,TGE} == { 1, 0 } : a VHE guest in guest mode</div><div class='ctx'> 	 *</div><div class='add'>+	 * Another possibility is that we are invalidating the EL2 context</div><div class='add'>+	 * using EL1 instructions, but that we landed here because we need</div><div class='add'>+	 * additional invalidation for structures that are not held in the</div><div class='add'>+	 * CPU TLBs (such as the VNCR pseudo-TLB and its EL2 mapping). In</div><div class='add'>+	 * that case, we are guaranteed that HCR_EL2.{E2H,TGE} == { 1, 1 }</div><div class='add'>+	 * as we don't allow an NV-capable L1 in a nVHE configuration.</div><div class='add'>+	 *</div><div class='ctx'> 	 * We don't expect these helpers to ever be called when running</div><div class='ctx'> 	 * in a vEL1 context.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3103,7 +4002,13 @@ static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	if (!kvm_supported_tlbi_s1e1_op(vcpu, sys_encoding))</div><div class='ctx'> 		return undef_access(vcpu, p, r);</div><div class='ctx'> </div><div class='del'>-	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm, get_vmid(vttbr),</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu)) {</div><div class='add'>+		kvm_handle_s1e2_tlbi(vcpu, sys_encoding, p-&gt;regval);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm,</div><div class='add'>+				   get_vmid(__vcpu_sys_reg(vcpu, VTTBR_EL2)),</div><div class='ctx'> 				   &amp;(union tlbi_info) {</div><div class='ctx'> 					   .va = {</div><div class='ctx'> 						   .addr = p-&gt;regval,</div><div class='hunk'>@@ -3225,16 +4130,21 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1IS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1IS, handle_ripas2e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_ALLE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2OS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2OS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1OS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2OS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2OS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1OS, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_RVAE2IS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2IS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2IS, handle_tlbi_el2),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1IS, handle_alle1is),</div><div class='add'>+</div><div class='add'>+	SYS_INSN(TLBI_VALE2IS, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1IS, handle_vmalls12e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1OS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1, handle_ipas2e1is),</div><div class='hunk'>@@ -3244,11 +4154,17 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1, handle_ripas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1OS, handle_ripas2e1is),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1, handle_alle1is),</div><div class='add'>+</div><div class='add'>+	SYS_INSN(TLBI_VALE2, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1ISNXS, handle_ipas2e1is),</div><div class='hunk'>@@ -3256,19 +4172,19 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1ISNXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1ISNXS, handle_ripas2e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_ALLE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2OSNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2OSNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1OSNXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2OSNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2OSNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1OSNXS, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_RVAE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_ALLE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2ISNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2ISNXS, handle_tlbi_el2),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1ISNXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2ISNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2ISNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1ISNXS, handle_vmalls12e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1OSNXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1NXS, handle_ipas2e1is),</div><div class='hunk'>@@ -3278,14 +4194,14 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1NXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1NXS, handle_ripas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1OSNXS, handle_ripas2e1is),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_ALLE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2NXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2NXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1NXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2NXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2NXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1NXS, handle_vmalls12e1is),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3317,18 +4233,20 @@ static bool trap_dbgdidr(struct kvm_vcpu *vcpu,</div><div class='ctx'>  * None of the other registers share their location, so treat them as</div><div class='ctx'>  * if they were 64bit.</div><div class='ctx'>  */</div><div class='del'>-#define DBG_BCR_BVR_WCR_WVR(n)						      \</div><div class='del'>-	/* DBGBVRn */							      \</div><div class='del'>-	{ AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \</div><div class='del'>-	/* DBGBCRn */							      \</div><div class='del'>-	{ Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n },	      \</div><div class='del'>-	/* DBGWVRn */							      \</div><div class='del'>-	{ Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n },	      \</div><div class='del'>-	/* DBGWCRn */							      \</div><div class='del'>-	{ Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }</div><div class='del'>-</div><div class='del'>-#define DBGBXVR(n)							      \</div><div class='del'>-	{ AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }</div><div class='add'>+#define DBG_BCR_BVR_WCR_WVR(n)							\</div><div class='add'>+	/* DBGBVRn */								\</div><div class='add'>+	{ AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4),			\</div><div class='add'>+	  trap_dbg_wb_reg, NULL, n },						\</div><div class='add'>+	/* DBGBCRn */								\</div><div class='add'>+	{ Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_dbg_wb_reg, NULL, n },	\</div><div class='add'>+	/* DBGWVRn */								\</div><div class='add'>+	{ Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_dbg_wb_reg, NULL, n },	\</div><div class='add'>+	/* DBGWCRn */								\</div><div class='add'>+	{ Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_dbg_wb_reg, NULL, n }</div><div class='add'>+</div><div class='add'>+#define DBGBXVR(n)								\</div><div class='add'>+	{ AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1),			\</div><div class='add'>+	  trap_dbg_wb_reg, NULL, n }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Trapped cp14 registers. We generally ignore most of the external</div><div class='hunk'>@@ -3625,18 +4543,20 @@ static const struct sys_reg_desc cp15_64_regs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_AARCH32_CNTPCT),	      access_arch_timer },</div><div class='ctx'> 	{ Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },</div><div class='ctx'> 	{ Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_ASGI1R */</div><div class='add'>+	{ SYS_DESC(SYS_AARCH32_CNTVCT),	      access_arch_timer },</div><div class='ctx'> 	{ Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, /* ICC_SGI0R */</div><div class='ctx'> 	{ SYS_DESC(SYS_AARCH32_CNTP_CVAL),    access_arch_timer },</div><div class='ctx'> 	{ SYS_DESC(SYS_AARCH32_CNTPCTSS),     access_arch_timer },</div><div class='add'>+	{ SYS_DESC(SYS_AARCH32_CNTVCTSS),     access_arch_timer },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool check_sysreg_table(const struct sys_reg_desc *table, unsigned int n,</div><div class='del'>-			       bool is_32)</div><div class='add'>+			       bool reset_check)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='del'>-		if (!is_32 &amp;&amp; table[i].reg &amp;&amp; !table[i].reset) {</div><div class='add'>+		if (reset_check &amp;&amp; table[i].reg &amp;&amp; !table[i].reset) {</div><div class='ctx'> 			kvm_err("sys_reg table %pS entry %d (%s) lacks reset\n",</div><div class='ctx'> 				&amp;table[i], i, table[i].name);</div><div class='ctx'> 			return false;</div><div class='hunk'>@@ -3831,7 +4751,7 @@ static bool kvm_esr_cp10_id_to_sys64(u64 esr, struct sys_reg_params *params)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	kvm_pr_unimpl("Unhandled cp10 register %s: %u\n",</div><div class='del'>-		      params-&gt;is_write ? "write" : "read", reg_id);</div><div class='add'>+		      str_write_read(params-&gt;is_write), reg_id);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3947,9 +4867,13 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * Certain AArch32 ID registers are handled by rerouting to the AArch64</div><div class='ctx'> 	 * system register table. Registers in the ID range where CRm=0 are</div><div class='ctx'> 	 * excluded from this scheme as they do not trivially map into AArch64</div><div class='del'>-	 * system register encodings.</div><div class='add'>+	 * system register encodings, except for AIDR/REVIDR.</div><div class='ctx'> 	 */</div><div class='del'>-	if (params.Op1 == 0 &amp;&amp; params.CRn == 0 &amp;&amp; params.CRm)</div><div class='add'>+	if (params.Op1 == 0 &amp;&amp; params.CRn == 0 &amp;&amp;</div><div class='add'>+	    (params.CRm || params.Op2 == 6 /* REVIDR */))</div><div class='add'>+		return kvm_emulate_cp15_id_reg(vcpu, &amp;params);</div><div class='add'>+	if (params.Op1 == 1 &amp;&amp; params.CRn == 0 &amp;&amp;</div><div class='add'>+	    params.CRm == 0 &amp;&amp; params.Op2 == 7 /* AIDR */)</div><div class='ctx'> 		return kvm_emulate_cp15_id_reg(vcpu, &amp;params);</div><div class='ctx'> </div><div class='ctx'> 	return kvm_handle_cp_32(vcpu, &amp;params, cp15_regs, ARRAY_SIZE(cp15_regs));</div><div class='hunk'>@@ -4142,9 +5066,15 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			reset_vcpu_ftr_id_reg(vcpu, r);</div><div class='ctx'> 		else</div><div class='ctx'> 			r-&gt;reset(vcpu, r);</div><div class='add'>+</div><div class='add'>+		if (r-&gt;reg &gt;= __SANITISED_REG_START__ &amp;&amp; r-&gt;reg &lt; NR_SYS_REGS)</div><div class='add'>+			__vcpu_rmw_sys_reg(vcpu, r-&gt;reg, |=, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &amp;kvm-&gt;arch.flags);</div><div class='add'>+</div><div class='add'>+	if (kvm_vcpu_has_pmu(vcpu))</div><div class='add'>+		kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4250,65 +5180,6 @@ id_to_sys_reg_desc(struct kvm_vcpu *vcpu, u64 id,</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * These are the invariant sys_reg registers: we let the guest see the</div><div class='del'>- * host versions of these, so they're part of the guest state.</div><div class='del'>- *</div><div class='del'>- * A future CPU may provide a mechanism to present different values to</div><div class='del'>- * the guest, or a future kvm may trap them.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define FUNCTION_INVARIANT(reg)						\</div><div class='del'>-	static u64 reset_##reg(struct kvm_vcpu *v,			\</div><div class='del'>-			       const struct sys_reg_desc *r)		\</div><div class='del'>-	{								\</div><div class='del'>-		((struct sys_reg_desc *)r)-&gt;val = read_sysreg(reg);	\</div><div class='del'>-		return ((struct sys_reg_desc *)r)-&gt;val;			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-FUNCTION_INVARIANT(midr_el1)</div><div class='del'>-FUNCTION_INVARIANT(revidr_el1)</div><div class='del'>-FUNCTION_INVARIANT(aidr_el1)</div><div class='del'>-</div><div class='del'>-/* -&gt;val is filled in by kvm_sys_reg_table_init() */</div><div class='del'>-static struct sys_reg_desc invariant_sys_regs[] __ro_after_init = {</div><div class='del'>-	{ SYS_DESC(SYS_MIDR_EL1), NULL, reset_midr_el1 },</div><div class='del'>-	{ SYS_DESC(SYS_REVIDR_EL1), NULL, reset_revidr_el1 },</div><div class='del'>-	{ SYS_DESC(SYS_AIDR_EL1), NULL, reset_aidr_el1 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int get_invariant_sys_reg(u64 id, u64 __user *uaddr)</div><div class='del'>-{</div><div class='del'>-	const struct sys_reg_desc *r;</div><div class='del'>-</div><div class='del'>-	r = get_reg_by_id(id, invariant_sys_regs,</div><div class='del'>-			  ARRAY_SIZE(invariant_sys_regs));</div><div class='del'>-	if (!r)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	return put_user(r-&gt;val, uaddr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_invariant_sys_reg(u64 id, u64 __user *uaddr)</div><div class='del'>-{</div><div class='del'>-	const struct sys_reg_desc *r;</div><div class='del'>-	u64 val;</div><div class='del'>-</div><div class='del'>-	r = get_reg_by_id(id, invariant_sys_regs,</div><div class='del'>-			  ARRAY_SIZE(invariant_sys_regs));</div><div class='del'>-	if (!r)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	if (get_user(val, uaddr))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	/* This is what we mean by invariant: you can't change it. */</div><div class='del'>-	if (r-&gt;val != val)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int demux_c15_get(struct kvm_vcpu *vcpu, u64 id, void __user *uaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -4390,15 +5261,10 @@ int kvm_sys_reg_get_user(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg,</div><div class='ctx'> int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> {</div><div class='ctx'> 	void __user *uaddr = (void __user *)(unsigned long)reg-&gt;addr;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if ((reg-&gt;id &amp; KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)</div><div class='ctx'> 		return demux_c15_get(vcpu, reg-&gt;id, uaddr);</div><div class='ctx'> </div><div class='del'>-	err = get_invariant_sys_reg(reg-&gt;id, uaddr);</div><div class='del'>-	if (err != -ENOENT)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	return kvm_sys_reg_get_user(vcpu, reg,</div><div class='ctx'> 				    sys_reg_descs, ARRAY_SIZE(sys_reg_descs));</div><div class='ctx'> }</div><div class='hunk'>@@ -4424,7 +5290,7 @@ int kvm_sys_reg_set_user(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg,</div><div class='ctx'> 	if (r-&gt;set_user) {</div><div class='ctx'> 		ret = (r-&gt;set_user)(vcpu, r, val);</div><div class='ctx'> 	} else {</div><div class='del'>-		__vcpu_sys_reg(vcpu, r-&gt;reg) = val;</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, r-&gt;reg, val);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4434,15 +5300,10 @@ int kvm_sys_reg_set_user(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg,</div><div class='ctx'> int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)</div><div class='ctx'> {</div><div class='ctx'> 	void __user *uaddr = (void __user *)(unsigned long)reg-&gt;addr;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if ((reg-&gt;id &amp; KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)</div><div class='ctx'> 		return demux_c15_set(vcpu, reg-&gt;id, uaddr);</div><div class='ctx'> </div><div class='del'>-	err = set_invariant_sys_reg(reg-&gt;id, uaddr);</div><div class='del'>-	if (err != -ENOENT)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	return kvm_sys_reg_set_user(vcpu, reg,</div><div class='ctx'> 				    sys_reg_descs, ARRAY_SIZE(sys_reg_descs));</div><div class='ctx'> }</div><div class='hunk'>@@ -4531,23 +5392,14 @@ static int walk_sys_regs(struct kvm_vcpu *vcpu, u64 __user *uind)</div><div class='ctx'> </div><div class='ctx'> unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return ARRAY_SIZE(invariant_sys_regs)</div><div class='del'>-		+ num_demux_regs()</div><div class='add'>+	return num_demux_regs()</div><div class='ctx'> 		+ walk_sys_regs(vcpu, (u64 __user *)NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Then give them all the invariant registers' indices. */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(invariant_sys_regs); i++) {</div><div class='del'>-		if (put_user(sys_reg_to_index(&amp;invariant_sys_regs[i]), uindices))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		uindices++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	err = walk_sys_regs(vcpu, uindices);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -4643,80 +5495,18 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> 	vcpu_set_hcr(vcpu);</div><div class='ctx'> 	vcpu_set_ich_hcr(vcpu);</div><div class='del'>-</div><div class='del'>-	if (cpus_have_final_cap(ARM64_HAS_HCX)) {</div><div class='del'>-		/*</div><div class='del'>-		 * In general, all HCRX_EL2 bits are gated by a feature.</div><div class='del'>-		 * The only reason we can set SMPME without checking any</div><div class='del'>-		 * feature is that its effects are not directly observable</div><div class='del'>-		 * from the guest.</div><div class='del'>-		 */</div><div class='del'>-		vcpu-&gt;arch.hcrx_el2 = HCRX_EL2_SMPME;</div><div class='del'>-</div><div class='del'>-		if (kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))</div><div class='del'>-			vcpu-&gt;arch.hcrx_el2 |= (HCRX_EL2_MSCEn | HCRX_EL2_MCE2);</div><div class='del'>-</div><div class='del'>-		if (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, TCRX, IMP))</div><div class='del'>-			vcpu-&gt;arch.hcrx_el2 |= HCRX_EL2_TCR2En;</div><div class='del'>-</div><div class='del'>-		if (kvm_has_fpmr(kvm))</div><div class='del'>-			vcpu-&gt;arch.hcrx_el2 |= HCRX_EL2_EnFPM;</div><div class='del'>-	}</div><div class='add'>+	vcpu_set_hcrx(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &amp;kvm-&gt;arch.flags))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	kvm-&gt;arch.fgu[HFGxTR_GROUP] = (HFGxTR_EL2_nAMAIR2_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nMAIR2_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nS2POR_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nACCDATA_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nSMPRI_EL1_MASK	|</div><div class='del'>-				       HFGxTR_EL2_nTPIDR2_EL0_MASK);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_TLBIRVAALE1OS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIASIDE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVMALLE1OS);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_TLBIRVAALE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAALE1IS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAALE1OS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1OS);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, ATS1A, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= HFGITR_EL2_ATS1E1A;</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, PAN, PAN2))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_ATS1E1RP |</div><div class='del'>-						HFGITR_EL2_ATS1E1WP);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1PIE, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPIRE0_EL1 |</div><div class='del'>-						HFGxTR_EL2_nPIR_EL1);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 |</div><div class='del'>-						HFGxTR_EL2_nPOR_EL0);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HAFGRTR_GROUP] |= ~(HAFGRTR_EL2_RES0 |</div><div class='del'>-						  HAFGRTR_EL2_RES1);</div><div class='add'>+	compute_fgu(kvm, HFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGITR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HDFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HAFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGRTR2_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGITR2_GROUP);</div><div class='add'>+	compute_fgu(kvm, HDFGRTR2_GROUP);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &amp;kvm-&gt;arch.flags);</div><div class='ctx'> out:</div><div class='hunk'>@@ -4745,7 +5535,7 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu_has_nv(vcpu)) {</div><div class='del'>-		int ret = kvm_init_nv_sysregs(kvm);</div><div class='add'>+		int ret = kvm_init_nv_sysregs(vcpu);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4755,28 +5545,31 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> int __init kvm_sys_reg_table_init(void)</div><div class='ctx'> {</div><div class='add'>+	const struct sys_reg_desc *gicv3_regs;</div><div class='ctx'> 	bool valid = true;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int i, sz;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure tables are unique and in order. */</div><div class='del'>-	valid &amp;= check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false);</div><div class='del'>-	valid &amp;= check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true);</div><div class='del'>-	valid &amp;= check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true);</div><div class='del'>-	valid &amp;= check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true);</div><div class='del'>-	valid &amp;= check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true);</div><div class='del'>-	valid &amp;= check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false);</div><div class='add'>+	valid &amp;= check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), true);</div><div class='add'>+	valid &amp;= check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), false);</div><div class='add'>+	valid &amp;= check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), false);</div><div class='add'>+	valid &amp;= check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), false);</div><div class='add'>+	valid &amp;= check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), false);</div><div class='ctx'> 	valid &amp;= check_sysreg_table(sys_insn_descs, ARRAY_SIZE(sys_insn_descs), false);</div><div class='ctx'> </div><div class='add'>+	gicv3_regs = vgic_v3_get_sysreg_table(&amp;sz);</div><div class='add'>+	valid &amp;= check_sysreg_table(gicv3_regs, sz, false);</div><div class='add'>+</div><div class='ctx'> 	if (!valid)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* We abuse the reset function to overwrite the table itself. */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(invariant_sys_regs); i++)</div><div class='del'>-		invariant_sys_regs[i].reset(NULL, &amp;invariant_sys_regs[i]);</div><div class='add'>+	init_imp_id_regs();</div><div class='ctx'> </div><div class='ctx'> 	ret = populate_nv_trap_config();</div><div class='ctx'> </div><div class='add'>+	check_feature_map();</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; !ret &amp;&amp; i &lt; ARRAY_SIZE(sys_reg_descs); i++)</div><div class='ctx'> 		ret = populate_sysreg_config(sys_reg_descs + i, i);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h<br/>index 1d94ed6efad2..317abc490368 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/sys_regs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/sys_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/sys_regs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/sys_regs.h</a></div><div class='hunk'>@@ -108,7 +108,7 @@ inline void print_sys_reg_msg(const struct sys_reg_params *p,</div><div class='ctx'> 	/* Look, we even formatted it for you to paste into the table! */</div><div class='ctx'> 	kvm_pr_unimpl("%pV { Op0(%2u), Op1(%2u), CRn(%2u), CRm(%2u), Op2(%2u), func_%s },\n",</div><div class='ctx'> 		      &amp;(struct va_format){ fmt, &amp;va },</div><div class='del'>-		      p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2, p-&gt;is_write ? "write" : "read");</div><div class='add'>+		      p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2, str_write_read(p-&gt;is_write));</div><div class='ctx'> 	va_end(va);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -137,7 +137,7 @@ static inline u64 reset_unknown(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!r-&gt;reg);</div><div class='ctx'> 	BUG_ON(r-&gt;reg &gt;= NR_SYS_REGS);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) = 0x1de7ec7edbadc0deULL;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, 0x1de7ec7edbadc0deULL);</div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -145,7 +145,7 @@ static inline u64 reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!r-&gt;reg);</div><div class='ctx'> 	BUG_ON(r-&gt;reg &gt;= NR_SYS_REGS);</div><div class='del'>-	__vcpu_sys_reg(vcpu, r-&gt;reg) = r-&gt;val;</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, r-&gt;val);</div><div class='ctx'> 	return __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -247,4 +247,14 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu);</div><div class='ctx'> 	CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)),	\</div><div class='ctx'> 	Op2(sys_reg_Op2(reg))</div><div class='ctx'> </div><div class='add'>+#define ID_REG_LIMIT_FIELD_ENUM(val, reg, field, limit)			       \</div><div class='add'>+({									       \</div><div class='add'>+	u64 __f_val = FIELD_GET(reg##_##field##_MASK, val);		       \</div><div class='add'>+	(val) &amp;= ~reg##_##field##_MASK;					       \</div><div class='add'>+	(val) |= FIELD_PREP(reg##_##field##_MASK,			       \</div><div class='add'>+			    min(__f_val,				       \</div><div class='add'>+				(u64)SYS_FIELD_VALUE(reg, field, limit)));     \</div><div class='add'>+	(val);								       \</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KVM_SYS_REGS_LOCAL_H__ */</div><div class='head'>diff --git a/arch/arm64/kvm/trace_arm.h b/arch/arm64/kvm/trace_arm.h<br/>index c18c1a95831e..9c60f6465c78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/trace_arm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/trace_arm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/trace_arm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/trace_arm.h</a></div><div class='hunk'>@@ -176,7 +176,7 @@ TRACE_EVENT(kvm_set_way_flush,</div><div class='ctx'> 	    ),</div><div class='ctx'> </div><div class='ctx'> 	    TP_printk("S/W flush at 0x%016lx (cache %s)",</div><div class='del'>-		      __entry-&gt;vcpu_pc, __entry-&gt;cache ? "on" : "off")</div><div class='add'>+		      __entry-&gt;vcpu_pc, str_on_off(__entry-&gt;cache))</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(kvm_toggle_cache,</div><div class='hunk'>@@ -196,8 +196,8 @@ TRACE_EVENT(kvm_toggle_cache,</div><div class='ctx'> 	    ),</div><div class='ctx'> </div><div class='ctx'> 	    TP_printk("VM op at 0x%016lx (cache was %s, now %s)",</div><div class='del'>-		      __entry-&gt;vcpu_pc, __entry-&gt;was ? "on" : "off",</div><div class='del'>-		      __entry-&gt;now ? "on" : "off")</div><div class='add'>+		      __entry-&gt;vcpu_pc, str_on_off(__entry-&gt;was),</div><div class='add'>+		      str_on_off(__entry-&gt;now))</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kvm/trace_handle_exit.h b/arch/arm64/kvm/trace_handle_exit.h<br/>index 064a58c19f48..a7ab9a3bbed0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/trace_handle_exit.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/trace_handle_exit.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/trace_handle_exit.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/trace_handle_exit.h</a></div><div class='hunk'>@@ -46,38 +46,6 @@ TRACE_EVENT(kvm_hvc_arm64,</div><div class='ctx'> 		  __entry-&gt;vcpu_pc, __entry-&gt;r0, __entry-&gt;imm)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='del'>-TRACE_EVENT(kvm_arm_setup_debug,</div><div class='del'>-	TP_PROTO(struct kvm_vcpu *vcpu, __u32 guest_debug),</div><div class='del'>-	TP_ARGS(vcpu, guest_debug),</div><div class='del'>-</div><div class='del'>-	TP_STRUCT__entry(</div><div class='del'>-		__field(struct kvm_vcpu *, vcpu)</div><div class='del'>-		__field(__u32, guest_debug)</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_fast_assign(</div><div class='del'>-		__entry-&gt;vcpu = vcpu;</div><div class='del'>-		__entry-&gt;guest_debug = guest_debug;</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_printk("vcpu: %p, flags: 0x%08x", __entry-&gt;vcpu, __entry-&gt;guest_debug)</div><div class='del'>-);</div><div class='del'>-</div><div class='del'>-TRACE_EVENT(kvm_arm_clear_debug,</div><div class='del'>-	TP_PROTO(__u32 guest_debug),</div><div class='del'>-	TP_ARGS(guest_debug),</div><div class='del'>-</div><div class='del'>-	TP_STRUCT__entry(</div><div class='del'>-		__field(__u32, guest_debug)</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_fast_assign(</div><div class='del'>-		__entry-&gt;guest_debug = guest_debug;</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_printk("flags: 0x%08x", __entry-&gt;guest_debug)</div><div class='del'>-);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The dreg32 name is a leftover from a distant past. This will really</div><div class='ctx'>  * output a 64bit value...</div><div class='hunk'>@@ -99,49 +67,6 @@ TRACE_EVENT(kvm_arm_set_dreg32,</div><div class='ctx'> 	TP_printk("%s: 0x%llx", __entry-&gt;name, __entry-&gt;value)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='del'>-TRACE_DEFINE_SIZEOF(__u64);</div><div class='del'>-</div><div class='del'>-TRACE_EVENT(kvm_arm_set_regset,</div><div class='del'>-	TP_PROTO(const char *type, int len, __u64 *control, __u64 *value),</div><div class='del'>-	TP_ARGS(type, len, control, value),</div><div class='del'>-	TP_STRUCT__entry(</div><div class='del'>-		__field(const char *, name)</div><div class='del'>-		__field(int, len)</div><div class='del'>-		__array(u64, ctrls, 16)</div><div class='del'>-		__array(u64, values, 16)</div><div class='del'>-	),</div><div class='del'>-	TP_fast_assign(</div><div class='del'>-		__entry-&gt;name = type;</div><div class='del'>-		__entry-&gt;len = len;</div><div class='del'>-		memcpy(__entry-&gt;ctrls, control, len &lt;&lt; 3);</div><div class='del'>-		memcpy(__entry-&gt;values, value, len &lt;&lt; 3);</div><div class='del'>-	),</div><div class='del'>-	TP_printk("%d %s CTRL:%s VALUE:%s", __entry-&gt;len, __entry-&gt;name,</div><div class='del'>-		__print_array(__entry-&gt;ctrls, __entry-&gt;len, sizeof(__u64)),</div><div class='del'>-		__print_array(__entry-&gt;values, __entry-&gt;len, sizeof(__u64)))</div><div class='del'>-);</div><div class='del'>-</div><div class='del'>-TRACE_EVENT(trap_reg,</div><div class='del'>-	TP_PROTO(const char *fn, int reg, bool is_write, u64 write_value),</div><div class='del'>-	TP_ARGS(fn, reg, is_write, write_value),</div><div class='del'>-</div><div class='del'>-	TP_STRUCT__entry(</div><div class='del'>-		__field(const char *, fn)</div><div class='del'>-		__field(int, reg)</div><div class='del'>-		__field(bool, is_write)</div><div class='del'>-		__field(u64, write_value)</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_fast_assign(</div><div class='del'>-		__entry-&gt;fn = fn;</div><div class='del'>-		__entry-&gt;reg = reg;</div><div class='del'>-		__entry-&gt;is_write = is_write;</div><div class='del'>-		__entry-&gt;write_value = write_value;</div><div class='del'>-	),</div><div class='del'>-</div><div class='del'>-	TP_printk("%s %s reg %d (0x%016llx)", __entry-&gt;fn,  __entry-&gt;is_write?"write to":"read from", __entry-&gt;reg, __entry-&gt;write_value)</div><div class='del'>-);</div><div class='del'>-</div><div class='ctx'> TRACE_EVENT(kvm_handle_sys_reg,</div><div class='ctx'> 	TP_PROTO(unsigned long hsr),</div><div class='ctx'> 	TP_ARGS(hsr),</div><div class='hunk'>@@ -188,7 +113,7 @@ TRACE_EVENT(kvm_sys_access,</div><div class='ctx'> 		  __entry-&gt;vcpu_pc, __entry-&gt;name ?: "UNKN",</div><div class='ctx'> 		  __entry-&gt;Op0, __entry-&gt;Op1, __entry-&gt;CRn,</div><div class='ctx'> 		  __entry-&gt;CRm, __entry-&gt;Op2,</div><div class='del'>-		  __entry-&gt;is_write ? "write" : "read")</div><div class='add'>+		  str_write_read(__entry-&gt;is_write))</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(kvm_set_guest_debug,</div><div class='head'>diff --git a/arch/arm64/kvm/vgic-sys-reg-v3.c b/arch/arm64/kvm/vgic-sys-reg-v3.c<br/>index 9e7c486b48c2..bdc2d57370b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic-sys-reg-v3.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic-sys-reg-v3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic-sys-reg-v3.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic-sys-reg-v3.c</a></div><div class='hunk'>@@ -35,12 +35,12 @@ static int set_gic_ctlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> </div><div class='ctx'> 	vgic_v3_cpu-&gt;num_id_bits = host_id_bits;</div><div class='ctx'> </div><div class='del'>-	host_seis = FIELD_GET(ICH_VTR_SEIS_MASK, kvm_vgic_global_state.ich_vtr_el2);</div><div class='add'>+	host_seis = FIELD_GET(ICH_VTR_EL2_SEIS, kvm_vgic_global_state.ich_vtr_el2);</div><div class='ctx'> 	seis = FIELD_GET(ICC_CTLR_EL1_SEIS_MASK, val);</div><div class='ctx'> 	if (host_seis != seis)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	host_a3v = FIELD_GET(ICH_VTR_A3V_MASK, kvm_vgic_global_state.ich_vtr_el2);</div><div class='add'>+	host_a3v = FIELD_GET(ICH_VTR_EL2_A3V, kvm_vgic_global_state.ich_vtr_el2);</div><div class='ctx'> 	a3v = FIELD_GET(ICC_CTLR_EL1_A3V_MASK, val);</div><div class='ctx'> 	if (host_a3v != a3v)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -68,10 +68,10 @@ static int get_gic_ctlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	val |= FIELD_PREP(ICC_CTLR_EL1_PRI_BITS_MASK, vgic_v3_cpu-&gt;num_pri_bits - 1);</div><div class='ctx'> 	val |= FIELD_PREP(ICC_CTLR_EL1_ID_BITS_MASK, vgic_v3_cpu-&gt;num_id_bits);</div><div class='ctx'> 	val |= FIELD_PREP(ICC_CTLR_EL1_SEIS_MASK,</div><div class='del'>-			  FIELD_GET(ICH_VTR_SEIS_MASK,</div><div class='add'>+			  FIELD_GET(ICH_VTR_EL2_SEIS,</div><div class='ctx'> 				    kvm_vgic_global_state.ich_vtr_el2));</div><div class='ctx'> 	val |= FIELD_PREP(ICC_CTLR_EL1_A3V_MASK,</div><div class='del'>-			  FIELD_GET(ICH_VTR_A3V_MASK, kvm_vgic_global_state.ich_vtr_el2));</div><div class='add'>+			  FIELD_GET(ICH_VTR_EL2_A3V, kvm_vgic_global_state.ich_vtr_el2));</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The VMCR.CTLR value is in ICC_CTLR_EL1 layout.</div><div class='ctx'> 	 * Extract it directly using ICC_CTLR_EL1 reg definitions.</div><div class='hunk'>@@ -297,6 +297,91 @@ static int get_gic_sre(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int set_gic_ich_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 val)</div><div class='add'>+{</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, r-&gt;reg, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_gic_ich_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			    u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = __vcpu_sys_reg(vcpu, r-&gt;reg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_gic_ich_apr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 val)</div><div class='add'>+{</div><div class='add'>+	u8 idx = r-&gt;Op2 &amp; 3;</div><div class='add'>+</div><div class='add'>+	if (idx &gt; vgic_v3_max_apr_idx(vcpu))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return set_gic_ich_reg(vcpu, r, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_gic_ich_apr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			    u64 *val)</div><div class='add'>+{</div><div class='add'>+	u8 idx = r-&gt;Op2 &amp; 3;</div><div class='add'>+</div><div class='add'>+	if (idx &gt; vgic_v3_max_apr_idx(vcpu))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return get_gic_ich_reg(vcpu, r, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_gic_icc_sre(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 val)</div><div class='add'>+{</div><div class='add'>+	if (val != KVM_ICC_SRE_EL2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_gic_icc_sre(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = KVM_ICC_SRE_EL2;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_gic_ich_vtr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 val)</div><div class='add'>+{</div><div class='add'>+	if (val != kvm_get_guest_vtr_el2())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_gic_ich_vtr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='add'>+			   u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = kvm_get_guest_vtr_el2();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+				   const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	return vcpu_has_nv(vcpu) ? 0 : REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __EL2_REG(r, acc, i)			\</div><div class='add'>+	{					\</div><div class='add'>+		SYS_DESC(SYS_ ## r),		\</div><div class='add'>+		.get_user = get_gic_ ## acc,	\</div><div class='add'>+		.set_user = set_gic_ ## acc,	\</div><div class='add'>+		.reg = i,			\</div><div class='add'>+		.visibility = el2_visibility,	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define EL2_REG(r, acc)		__EL2_REG(r, acc, r)</div><div class='add'>+</div><div class='add'>+#define EL2_REG_RO(r, acc)	__EL2_REG(r, acc, 0)</div><div class='add'>+</div><div class='ctx'> static const struct sys_reg_desc gic_v3_icc_reg_descs[] = {</div><div class='ctx'> 	{ SYS_DESC(SYS_ICC_PMR_EL1),</div><div class='ctx'> 	  .set_user = set_gic_pmr, .get_user = get_gic_pmr, },</div><div class='hunk'>@@ -328,8 +413,42 @@ static const struct sys_reg_desc gic_v3_icc_reg_descs[] = {</div><div class='ctx'> 	  .set_user = set_gic_grpen0, .get_user = get_gic_grpen0, },</div><div class='ctx'> 	{ SYS_DESC(SYS_ICC_IGRPEN1_EL1),</div><div class='ctx'> 	  .set_user = set_gic_grpen1, .get_user = get_gic_grpen1, },</div><div class='add'>+	EL2_REG(ICH_AP0R0_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP0R1_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP0R2_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP0R3_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP1R0_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP1R1_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP1R2_EL2, ich_apr),</div><div class='add'>+	EL2_REG(ICH_AP1R3_EL2, ich_apr),</div><div class='add'>+	EL2_REG_RO(ICC_SRE_EL2, icc_sre),</div><div class='add'>+	EL2_REG(ICH_HCR_EL2, ich_reg),</div><div class='add'>+	EL2_REG_RO(ICH_VTR_EL2, ich_vtr),</div><div class='add'>+	EL2_REG(ICH_VMCR_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR0_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR1_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR2_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR3_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR4_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR5_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR6_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR7_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR8_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR9_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR10_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR11_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR12_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR13_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR14_EL2, ich_reg),</div><div class='add'>+	EL2_REG(ICH_LR15_EL2, ich_reg),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+const struct sys_reg_desc *vgic_v3_get_sysreg_table(unsigned int *sz)</div><div class='add'>+{</div><div class='add'>+	*sz = ARRAY_SIZE(gic_v3_icc_reg_descs);</div><div class='add'>+	return gic_v3_icc_reg_descs;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u64 attr_to_id(u64 attr)</div><div class='ctx'> {</div><div class='ctx'> 	return ARM64_SYS_REG(FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_OP0_MASK, attr),</div><div class='hunk'>@@ -341,8 +460,12 @@ static u64 attr_to_id(u64 attr)</div><div class='ctx'> </div><div class='ctx'> int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> {</div><div class='del'>-	if (get_reg_by_id(attr_to_id(attr-&gt;attr), gic_v3_icc_reg_descs,</div><div class='del'>-			  ARRAY_SIZE(gic_v3_icc_reg_descs)))</div><div class='add'>+	const struct sys_reg_desc *r;</div><div class='add'>+</div><div class='add'>+	r = get_reg_by_id(attr_to_id(attr-&gt;attr), gic_v3_icc_reg_descs,</div><div class='add'>+			  ARRAY_SIZE(gic_v3_icc_reg_descs));</div><div class='add'>+</div><div class='add'>+	if (r &amp;&amp; !sysreg_hidden(vcpu, r))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return -ENXIO;</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-debug.c b/arch/arm64/kvm/vgic/vgic-debug.c<br/>index e1397ab2072a..4c1209261b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-debug.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-debug.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-debug.c</a></div><div class='hunk'>@@ -69,7 +69,7 @@ static int iter_mark_lpis(struct kvm *kvm)</div><div class='ctx'> 	int nr_lpis = 0;</div><div class='ctx'> </div><div class='ctx'> 	xa_for_each(&amp;dist-&gt;lpi_xa, intid, irq) {</div><div class='del'>-		if (!vgic_try_get_irq_kref(irq))</div><div class='add'>+		if (!vgic_try_get_irq_ref(irq))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		xa_set_mark(&amp;dist-&gt;lpi_xa, intid, LPI_XA_MARK_DEBUG_ITER);</div><div class='hunk'>@@ -287,7 +287,10 @@ static int vgic_debug_show(struct seq_file *s, void *v)</div><div class='ctx'> 	 * Expect this to succeed, as iter_mark_lpis() takes a reference on</div><div class='ctx'> 	 * every LPI to be visited.</div><div class='ctx'> 	 */</div><div class='del'>-	irq = vgic_get_irq(kvm, vcpu, iter-&gt;intid);</div><div class='add'>+	if (iter-&gt;intid &lt; VGIC_NR_PRIVATE_IRQS)</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, iter-&gt;intid);</div><div class='add'>+	else</div><div class='add'>+		irq = vgic_get_irq(kvm, iter-&gt;intid);</div><div class='ctx'> 	if (WARN_ON_ONCE(!irq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -317,3 +320,230 @@ void vgic_debug_init(struct kvm *kvm)</div><div class='ctx'> void vgic_debug_destroy(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vgic_its_iter - Iterator for traversing VGIC ITS device tables.</div><div class='add'>+ * @dev: Pointer to the current its_device being processed.</div><div class='add'>+ * @ite: Pointer to the current its_ite within the device being processed.</div><div class='add'>+ *</div><div class='add'>+ * This structure is used to maintain the current position during iteration</div><div class='add'>+ * over the ITS device tables. It holds pointers to both the current device</div><div class='add'>+ * and the current ITE within that device.</div><div class='add'>+ */</div><div class='add'>+struct vgic_its_iter {</div><div class='add'>+	struct its_device *dev;</div><div class='add'>+	struct its_ite *ite;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * end_of_iter - Checks if the iterator has reached the end.</div><div class='add'>+ * @iter: The iterator to check.</div><div class='add'>+ *</div><div class='add'>+ * When the iterator completed processing the final ITE in the last device</div><div class='add'>+ * table, it was marked to indicate the end of iteration by setting its</div><div class='add'>+ * device and ITE pointers to NULL.</div><div class='add'>+ * This function checks whether the iterator was marked as end.</div><div class='add'>+ *</div><div class='add'>+ * Return: True if the iterator is marked as end, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool end_of_iter(struct vgic_its_iter *iter)</div><div class='add'>+{</div><div class='add'>+	return !iter-&gt;dev &amp;&amp; !iter-&gt;ite;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_iter_next - Advances the iterator to the next entry in the ITS tables.</div><div class='add'>+ * @its: The VGIC ITS structure.</div><div class='add'>+ * @iter: The iterator to advance.</div><div class='add'>+ *</div><div class='add'>+ * This function moves the iterator to the next ITE within the current device,</div><div class='add'>+ * or to the first ITE of the next device if the current ITE is the last in</div><div class='add'>+ * the device. If the current device is the last device, the iterator is set</div><div class='add'>+ * to indicate the end of iteration.</div><div class='add'>+ */</div><div class='add'>+static void vgic_its_iter_next(struct vgic_its *its, struct vgic_its_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct its_device *dev = iter-&gt;dev;</div><div class='add'>+	struct its_ite *ite = iter-&gt;ite;</div><div class='add'>+</div><div class='add'>+	if (!ite || list_is_last(&amp;ite-&gt;ite_list, &amp;dev-&gt;itt_head)) {</div><div class='add'>+		if (list_is_last(&amp;dev-&gt;dev_list, &amp;its-&gt;device_list)) {</div><div class='add'>+			dev = NULL;</div><div class='add'>+			ite = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			dev = list_next_entry(dev, dev_list);</div><div class='add'>+			ite = list_first_entry_or_null(&amp;dev-&gt;itt_head,</div><div class='add'>+						       struct its_ite,</div><div class='add'>+						       ite_list);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		ite = list_next_entry(ite, ite_list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iter-&gt;dev = dev;</div><div class='add'>+	iter-&gt;ite = ite;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_start - Start function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @pos: The starting position (offset).</div><div class='add'>+ *</div><div class='add'>+ * This function initializes the iterator to the beginning of the ITS tables</div><div class='add'>+ * and advances it to the specified position. It acquires the its_lock mutex</div><div class='add'>+ * to protect shared data.</div><div class='add'>+ *</div><div class='add'>+ * Return: An iterator pointer on success, NULL if no devices are found or</div><div class='add'>+ *         the end of the list is reached, or ERR_PTR(-ENOMEM) on memory</div><div class='add'>+ *         allocation failure.</div><div class='add'>+ */</div><div class='add'>+static void *vgic_its_debug_start(struct seq_file *s, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter;</div><div class='add'>+	struct its_device *dev;</div><div class='add'>+	loff_t offset = *pos;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;its-&gt;its_lock);</div><div class='add'>+</div><div class='add'>+	dev = list_first_entry_or_null(&amp;its-&gt;device_list,</div><div class='add'>+				       struct its_device, dev_list);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	iter = kmalloc(sizeof(*iter), GFP_KERNEL);</div><div class='add'>+	if (!iter)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	iter-&gt;dev = dev;</div><div class='add'>+	iter-&gt;ite = list_first_entry_or_null(&amp;dev-&gt;itt_head,</div><div class='add'>+					     struct its_ite, ite_list);</div><div class='add'>+</div><div class='add'>+	while (!end_of_iter(iter) &amp;&amp; offset--)</div><div class='add'>+		vgic_its_iter_next(its, iter);</div><div class='add'>+</div><div class='add'>+	if (end_of_iter(iter)) {</div><div class='add'>+		kfree(iter);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return iter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_next - Next function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ * @pos: The current position (offset).</div><div class='add'>+ *</div><div class='add'>+ * This function advances the iterator to the next entry and increments the</div><div class='add'>+ * position.</div><div class='add'>+ *</div><div class='add'>+ * Return: An iterator pointer on success, or NULL if the end of the list is</div><div class='add'>+ *         reached.</div><div class='add'>+ */</div><div class='add'>+static void *vgic_its_debug_next(struct seq_file *s, void *v, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+</div><div class='add'>+	++*pos;</div><div class='add'>+	vgic_its_iter_next(its, iter);</div><div class='add'>+</div><div class='add'>+	if (end_of_iter(iter)) {</div><div class='add'>+		kfree(iter);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return iter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_stop - Stop function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ *</div><div class='add'>+ * This function frees the iterator and releases the its_lock mutex.</div><div class='add'>+ */</div><div class='add'>+static void vgic_its_debug_stop(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR_OR_NULL(iter))</div><div class='add'>+		kfree(iter);</div><div class='add'>+	mutex_unlock(&amp;its-&gt;its_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_show - Show function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ *</div><div class='add'>+ * This function formats and prints the ITS table entry information to the</div><div class='add'>+ * seq_file output.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int vgic_its_debug_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+	struct its_device *dev = iter-&gt;dev;</div><div class='add'>+	struct its_ite *ite = iter-&gt;ite;</div><div class='add'>+</div><div class='add'>+	if (!ite)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (list_is_first(&amp;ite-&gt;ite_list, &amp;dev-&gt;itt_head)) {</div><div class='add'>+		seq_printf(s, "\n");</div><div class='add'>+		seq_printf(s, "Device ID: 0x%x, Event ID Range: [0 - %llu]\n",</div><div class='add'>+			   dev-&gt;device_id, BIT_ULL(dev-&gt;num_eventid_bits) - 1);</div><div class='add'>+		seq_printf(s, "EVENT_ID    INTID  HWINTID   TARGET   COL_ID HW\n");</div><div class='add'>+		seq_printf(s, "-----------------------------------------------\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ite-&gt;irq &amp;&amp; ite-&gt;collection) {</div><div class='add'>+		seq_printf(s, "%8u %8u %8u %8u %8u %2d\n",</div><div class='add'>+			   ite-&gt;event_id, ite-&gt;irq-&gt;intid, ite-&gt;irq-&gt;hwintid,</div><div class='add'>+			   ite-&gt;collection-&gt;target_addr,</div><div class='add'>+			   ite-&gt;collection-&gt;collection_id, ite-&gt;irq-&gt;hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct seq_operations vgic_its_debug_sops = {</div><div class='add'>+	.start = vgic_its_debug_start,</div><div class='add'>+	.next  = vgic_its_debug_next,</div><div class='add'>+	.stop  = vgic_its_debug_stop,</div><div class='add'>+	.show  = vgic_its_debug_show</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DEFINE_SEQ_ATTRIBUTE(vgic_its_debug);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_init - Initializes the debugfs interface for VGIC ITS.</div><div class='add'>+ * @dev: The KVM device structure.</div><div class='add'>+ *</div><div class='add'>+ * This function creates a debugfs file named "vgic-its-state@%its_base"</div><div class='add'>+ * to expose the ITS table information.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success.</div><div class='add'>+ */</div><div class='add'>+int vgic_its_debug_init(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = dev-&gt;private;</div><div class='add'>+	char *name;</div><div class='add'>+</div><div class='add'>+	name = kasprintf(GFP_KERNEL, "vgic-its-state@%llx", (u64)its-&gt;vgic_its_base);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file(name, 0444, dev-&gt;kvm-&gt;debugfs_dentry, its, &amp;vgic_its_debug_fops);</div><div class='add'>+</div><div class='add'>+	kfree(name);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_its_debug_destroy(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c<br/>index e7c53e8af3d1..1796b1a22a72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-init.c</a></div><div class='hunk'>@@ -34,9 +34,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * CPU Interface:</div><div class='ctx'>  *</div><div class='del'>- * - kvm_vgic_vcpu_init(): initialization of static data that</div><div class='del'>- *   doesn't depend on any sizing information or emulation type. No</div><div class='del'>- *   allocation is allowed there.</div><div class='add'>+ * - kvm_vgic_vcpu_init(): initialization of static data that doesn't depend</div><div class='add'>+ *   on any sizing information. Private interrupts are allocated if not</div><div class='add'>+ *   already allocated at vgic-creation time.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* EARLY INIT */</div><div class='hunk'>@@ -53,11 +53,13 @@ void kvm_vgic_early_init(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_dist *dist = &amp;kvm-&gt;arch.vgic;</div><div class='ctx'> </div><div class='del'>-	xa_init_flags(&amp;dist-&gt;lpi_xa, XA_FLAGS_LOCK_IRQ);</div><div class='add'>+	xa_init(&amp;dist-&gt;lpi_xa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* CREATION */</div><div class='ctx'> </div><div class='add'>+static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_vgic_create: triggered by the instantiation of the VGIC device by</div><div class='ctx'>  * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only)</div><div class='hunk'>@@ -82,15 +84,40 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)</div><div class='ctx'> 		!kvm_vgic_global_state.can_emulate_gicv2)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	/* Must be held to avoid race with vCPU creation */</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure mutual exclusion with vCPU creation and any vCPU ioctls by:</div><div class='add'>+	 *</div><div class='add'>+	 *  - Holding kvm-&gt;lock to prevent KVM_CREATE_VCPU from reaching</div><div class='add'>+	 *    kvm_arch_vcpu_precreate() and ensuring created_vcpus is stable.</div><div class='add'>+	 *    This alone is insufficient, as kvm_vm_ioctl_create_vcpu() drops</div><div class='add'>+	 *    the kvm-&gt;lock before completing the vCPU creation.</div><div class='add'>+	 */</div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;lock);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 *  - Acquiring the vCPU mutex for every *online* vCPU to prevent</div><div class='add'>+	 *    concurrent vCPU ioctls for vCPUs already visible to userspace.</div><div class='add'>+	 */</div><div class='ctx'> 	ret = -EBUSY;</div><div class='del'>-	if (!lock_all_vcpus(kvm))</div><div class='add'>+	if (kvm_trylock_all_vcpus(kvm))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 *  - Taking the config_lock which protects VGIC data structures such</div><div class='add'>+	 *    as the per-vCPU arrays of private IRQs (SGIs, PPIs).</div><div class='add'>+	 */</div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * - Bailing on the entire thing if a vCPU is in the middle of creation,</div><div class='add'>+	 *   dropped the kvm-&gt;lock, but hasn't reached kvm_arch_vcpu_create().</div><div class='add'>+	 *</div><div class='add'>+	 * The whole combination of this guarantees that no vCPU can get into</div><div class='add'>+	 * KVM with a VGIC configuration inconsistent with the VM's VGIC.</div><div class='add'>+	 */</div><div class='add'>+	if (kvm-&gt;created_vcpus != atomic_read(&amp;kvm-&gt;online_vcpus))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='ctx'> 	if (irqchip_in_kernel(kvm)) {</div><div class='ctx'> 		ret = -EEXIST;</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -112,8 +139,25 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+		ret = vgic_allocate_private_irqs_locked(vcpu, type);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+			struct vgic_cpu *vgic_cpu = &amp;vcpu-&gt;arch.vgic_cpu;</div><div class='add'>+			kfree(vgic_cpu-&gt;private_irqs);</div><div class='add'>+			vgic_cpu-&gt;private_irqs = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	kvm-&gt;arch.vgic.in_kernel = true;</div><div class='ctx'> 	kvm-&gt;arch.vgic.vgic_model = type;</div><div class='add'>+	kvm-&gt;arch.vgic.implementation_rev = KVM_VGIC_IMP_REV_LATEST;</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;</div><div class='ctx'> </div><div class='hunk'>@@ -122,9 +166,12 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)</div><div class='ctx'> 	else</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;kvm-&gt;arch.vgic.rd_regions);</div><div class='ctx'> </div><div class='add'>+	if (type == KVM_DEV_TYPE_ARM_VGIC_V3)</div><div class='add'>+		kvm-&gt;arch.vgic.nassgicap = system_supports_direct_sgis();</div><div class='add'>+</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='del'>-	unlock_all_vcpus(kvm);</div><div class='add'>+	kvm_unlock_all_vcpus(kvm);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -161,7 +208,7 @@ static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)</div><div class='ctx'> 		raw_spin_lock_init(&amp;irq-&gt;irq_lock);</div><div class='ctx'> 		irq-&gt;vcpu = NULL;</div><div class='ctx'> 		irq-&gt;target_vcpu = vcpu0;</div><div class='del'>-		kref_init(&amp;irq-&gt;refcount);</div><div class='add'>+		refcount_set(&amp;irq-&gt;refcount, 0);</div><div class='ctx'> 		switch (dist-&gt;vgic_model) {</div><div class='ctx'> 		case KVM_DEV_TYPE_ARM_VGIC_V2:</div><div class='ctx'> 			irq-&gt;targets = 0;</div><div class='hunk'>@@ -180,7 +227,28 @@ static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu)</div><div class='add'>+/* Default GICv3 Maintenance Interrupt INTID, as per SBSA */</div><div class='add'>+#define DEFAULT_MI_INTID	25</div><div class='add'>+</div><div class='add'>+int kvm_vgic_vcpu_nv_init(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;vcpu-&gt;kvm-&gt;arch.config_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Matching the tradition established with the timers, provide</div><div class='add'>+	 * a default PPI for the maintenance interrupt. It makes</div><div class='add'>+	 * things easier to reason about.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu-&gt;kvm-&gt;arch.vgic.mi_intid == 0)</div><div class='add'>+		vcpu-&gt;kvm-&gt;arch.vgic.mi_intid = DEFAULT_MI_INTID;</div><div class='add'>+	ret = kvm_vgic_set_owner(vcpu, vcpu-&gt;kvm-&gt;arch.vgic.mi_intid, vcpu);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_cpu *vgic_cpu = &amp;vcpu-&gt;arch.vgic_cpu;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -209,7 +277,7 @@ static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		irq-&gt;intid = i;</div><div class='ctx'> 		irq-&gt;vcpu = NULL;</div><div class='ctx'> 		irq-&gt;target_vcpu = vcpu;</div><div class='del'>-		kref_init(&amp;irq-&gt;refcount);</div><div class='add'>+		refcount_set(&amp;irq-&gt;refcount, 0);</div><div class='ctx'> 		if (vgic_irq_is_sgi(i)) {</div><div class='ctx'> 			/* SGIs */</div><div class='ctx'> 			irq-&gt;enabled = 1;</div><div class='hunk'>@@ -218,17 +286,28 @@ static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			/* PPIs */</div><div class='ctx'> 			irq-&gt;config = VGIC_CONFIG_LEVEL;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case KVM_DEV_TYPE_ARM_VGIC_V3:</div><div class='add'>+			irq-&gt;group = 1;</div><div class='add'>+			irq-&gt;mpidr = kvm_vcpu_get_mpidr_aff(vcpu);</div><div class='add'>+			break;</div><div class='add'>+		case KVM_DEV_TYPE_ARM_VGIC_V2:</div><div class='add'>+			irq-&gt;group = 0;</div><div class='add'>+			irq-&gt;targets = BIT(vcpu-&gt;vcpu_id);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu)</div><div class='add'>+static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu, u32 type)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vcpu-&gt;kvm-&gt;arch.config_lock);</div><div class='del'>-	ret = vgic_allocate_private_irqs_locked(vcpu);</div><div class='add'>+	ret = vgic_allocate_private_irqs_locked(vcpu, type);</div><div class='ctx'> 	mutex_unlock(&amp;vcpu-&gt;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -258,7 +337,7 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!irqchip_in_kernel(vcpu-&gt;kvm))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = vgic_allocate_private_irqs(vcpu);</div><div class='add'>+	ret = vgic_allocate_private_irqs(vcpu, dist-&gt;vgic_model);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -295,7 +374,7 @@ int vgic_init(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_dist *dist = &amp;kvm-&gt;arch.vgic;</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='del'>-	int ret = 0, i;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	unsigned long idx;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;arch.config_lock);</div><div class='hunk'>@@ -315,41 +394,11 @@ int vgic_init(struct kvm *kvm)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Initialize groups on CPUs created before the VGIC type was known */</div><div class='del'>-	kvm_for_each_vcpu(idx, vcpu, kvm) {</div><div class='del'>-		ret = vgic_allocate_private_irqs_locked(vcpu);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; VGIC_NR_PRIVATE_IRQS; i++) {</div><div class='del'>-			struct vgic_irq *irq = vgic_get_irq(kvm, vcpu, i);</div><div class='del'>-</div><div class='del'>-			switch (dist-&gt;vgic_model) {</div><div class='del'>-			case KVM_DEV_TYPE_ARM_VGIC_V3:</div><div class='del'>-				irq-&gt;group = 1;</div><div class='del'>-				irq-&gt;mpidr = kvm_vcpu_get_mpidr_aff(vcpu);</div><div class='del'>-				break;</div><div class='del'>-			case KVM_DEV_TYPE_ARM_VGIC_V2:</div><div class='del'>-				irq-&gt;group = 0;</div><div class='del'>-				irq-&gt;targets = 1U &lt;&lt; idx;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			vgic_put_irq(kvm, irq);</div><div class='del'>-</div><div class='del'>-			if (ret)</div><div class='del'>-				goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * If we have GICv4.1 enabled, unconditionally request enable the</div><div class='del'>-	 * v4 support so that we get HW-accelerated vSGIs. Otherwise, only</div><div class='del'>-	 * enable it if we present a virtual ITS to the guest.</div><div class='add'>+	 * Ensure vPEs are allocated if direct IRQ injection (e.g. vSGIs,</div><div class='add'>+	 * vLPIs) is supported.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vgic_supports_direct_msis(kvm)) {</div><div class='add'>+	if (vgic_supports_direct_irqs(kvm)) {</div><div class='ctx'> 		ret = vgic_v4_init(kvm);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -363,15 +412,7 @@ int vgic_init(struct kvm *kvm)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	vgic_debug_init(kvm);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If userspace didn't set the GIC implementation revision,</div><div class='del'>-	 * default to the latest and greatest. You know want it.</div><div class='del'>-	 */</div><div class='del'>-	if (!dist-&gt;implementation_rev)</div><div class='del'>-		dist-&gt;implementation_rev = KVM_VGIC_IMP_REV_LATEST;</div><div class='ctx'> 	dist-&gt;initialized = true;</div><div class='del'>-</div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -397,7 +438,7 @@ static void kvm_vgic_dist_destroy(struct kvm *kvm)</div><div class='ctx'> 		dist-&gt;vgic_cpu_base = VGIC_ADDR_UNDEF;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vgic_supports_direct_msis(kvm))</div><div class='add'>+	if (vgic_supports_direct_irqs(kvm))</div><div class='ctx'> 		vgic_v4_teardown(kvm);</div><div class='ctx'> </div><div class='ctx'> 	xa_destroy(&amp;dist-&gt;lpi_xa);</div><div class='hunk'>@@ -417,8 +458,28 @@ static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kfree(vgic_cpu-&gt;private_irqs);</div><div class='ctx'> 	vgic_cpu-&gt;private_irqs = NULL;</div><div class='ctx'> </div><div class='del'>-	if (vcpu-&gt;kvm-&gt;arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)</div><div class='add'>+	if (vcpu-&gt;kvm-&gt;arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {</div><div class='add'>+		/*</div><div class='add'>+		 * If this vCPU is being destroyed because of a failed creation</div><div class='add'>+		 * then unregister the redistributor to avoid leaving behind a</div><div class='add'>+		 * dangling pointer to the vCPU struct.</div><div class='add'>+		 *</div><div class='add'>+		 * vCPUs that have been successfully created (i.e. added to</div><div class='add'>+		 * kvm-&gt;vcpu_array) get unregistered in kvm_vgic_destroy(), as</div><div class='add'>+		 * this function gets called while holding kvm-&gt;arch.config_lock</div><div class='add'>+		 * in the VM teardown path and would otherwise introduce a lock</div><div class='add'>+		 * inversion w.r.t. kvm-&gt;srcu.</div><div class='add'>+		 *</div><div class='add'>+		 * vCPUs that failed creation are torn down outside of the</div><div class='add'>+		 * kvm-&gt;arch.config_lock and do not get unregistered in</div><div class='add'>+		 * kvm_vgic_destroy(), meaning it is both safe and necessary to</div><div class='add'>+		 * do so here.</div><div class='add'>+		 */</div><div class='add'>+		if (kvm_get_vcpu_by_id(vcpu-&gt;kvm, vcpu-&gt;vcpu_id) != vcpu)</div><div class='add'>+			vgic_unregister_redist_iodev(vcpu);</div><div class='add'>+</div><div class='ctx'> 		vgic_cpu-&gt;rd_iodev.base_addr = VGIC_ADDR_UNDEF;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -493,7 +554,6 @@ int vgic_lazy_init(struct kvm *kvm)</div><div class='ctx'>  * Also map the virtual CPU interface into the VM.</div><div class='ctx'>  * v2 calls vgic_init() if not already done.</div><div class='ctx'>  * v3 and derivatives return an error if the VGIC is not initialized.</div><div class='del'>- * vgic_ready() returns true if this function has succeeded.</div><div class='ctx'>  */</div><div class='ctx'> int kvm_vgic_map_resources(struct kvm *kvm)</div><div class='ctx'> {</div><div class='hunk'>@@ -502,12 +562,12 @@ int kvm_vgic_map_resources(struct kvm *kvm)</div><div class='ctx'> 	gpa_t dist_base;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (likely(vgic_ready(kvm)))</div><div class='add'>+	if (likely(smp_load_acquire(&amp;dist-&gt;ready)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.config_lock);</div><div class='del'>-	if (vgic_ready(kvm))</div><div class='add'>+	if (dist-&gt;ready)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (!irqchip_in_kernel(kvm))</div><div class='hunk'>@@ -524,22 +584,24 @@ int kvm_vgic_map_resources(struct kvm *kvm)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	dist-&gt;ready = true;</div><div class='ctx'> 	dist_base = dist-&gt;vgic_dist_base;</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	ret = vgic_register_dist_iodev(kvm, dist_base, type);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		kvm_err("Unable to register VGIC dist MMIO regions\n");</div><div class='add'>+		goto out_slots;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	smp_store_release(&amp;dist-&gt;ready, true);</div><div class='ctx'> 	goto out_slots;</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> out_slots:</div><div class='del'>-	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='del'>-</div><div class='ctx'> 	if (ret)</div><div class='del'>-		kvm_vgic_destroy(kvm);</div><div class='add'>+		kvm_vm_dead(kvm);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -559,12 +621,20 @@ void kvm_vgic_cpu_down(void)</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t vgic_maintenance_handler(int irq, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)data;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We cannot rely on the vgic maintenance interrupt to be</div><div class='ctx'> 	 * delivered synchronously. This means we can only use it to</div><div class='ctx'> 	 * exit the VM, and we perform the handling of EOIed</div><div class='ctx'> 	 * interrupts on the exit path (see vgic_fold_lr_state).</div><div class='add'>+	 *</div><div class='add'>+	 * Of course, NV throws a wrench in this plan, and needs</div><div class='add'>+	 * something special.</div><div class='ctx'> 	 */</div><div class='add'>+	if (vcpu &amp;&amp; vgic_state_is_nested(vcpu))</div><div class='add'>+		vgic_v3_handle_nested_maint_irq(vcpu);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -591,10 +661,12 @@ void kvm_vgic_init_cpu_hardware(void)</div><div class='ctx'> 	 * We want to make sure the list registers start out clear so that we</div><div class='ctx'> 	 * only have the program the used registers.</div><div class='ctx'> 	 */</div><div class='del'>-	if (kvm_vgic_global_state.type == VGIC_V2)</div><div class='add'>+	if (kvm_vgic_global_state.type == VGIC_V2) {</div><div class='ctx'> 		vgic_v2_init_lrs();</div><div class='del'>-	else</div><div class='add'>+	} else if (kvm_vgic_global_state.type == VGIC_V3 ||</div><div class='add'>+		   kvm_vgic_global_state.has_gcie_v3_compat) {</div><div class='ctx'> 		kvm_call_hyp(__vgic_v3_init_lrs);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -639,6 +711,9 @@ int kvm_vgic_hyp_init(void)</div><div class='ctx'> 			kvm_info("GIC system register CPU interface enabled\n");</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case GIC_V5:</div><div class='add'>+		ret = vgic_v5_probe(gic_kvm_info);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c<br/>index ba945ba78cc7..ce3e3ed3f29f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-its.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-its.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-its.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-its.c</a></div><div class='hunk'>@@ -31,6 +31,41 @@ static int vgic_its_commit_v0(struct vgic_its *its);</div><div class='ctx'> static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,</div><div class='ctx'> 			     struct kvm_vcpu *filter_vcpu, bool needs_inv);</div><div class='ctx'> </div><div class='add'>+#define vgic_its_read_entry_lock(i, g, valp, t)				\</div><div class='add'>+	({								\</div><div class='add'>+		int __sz = vgic_its_get_abi(i)-&gt;t##_esz;		\</div><div class='add'>+		struct kvm *__k = (i)-&gt;dev-&gt;kvm;			\</div><div class='add'>+		int __ret;						\</div><div class='add'>+									\</div><div class='add'>+		BUILD_BUG_ON(NR_ITS_ABIS == 1 &amp;&amp;			\</div><div class='add'>+			     sizeof(*(valp)) != ABI_0_ESZ);		\</div><div class='add'>+		if (NR_ITS_ABIS &gt; 1 &amp;&amp;					\</div><div class='add'>+		    KVM_BUG_ON(__sz != sizeof(*(valp)), __k))		\</div><div class='add'>+			__ret = -EINVAL;				\</div><div class='add'>+		else							\</div><div class='add'>+			__ret = kvm_read_guest_lock(__k, (g),		\</div><div class='add'>+						    valp, __sz);	\</div><div class='add'>+		__ret;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define vgic_its_write_entry_lock(i, g, val, t)				\</div><div class='add'>+	({								\</div><div class='add'>+		int __sz = vgic_its_get_abi(i)-&gt;t##_esz;		\</div><div class='add'>+		struct kvm *__k = (i)-&gt;dev-&gt;kvm;			\</div><div class='add'>+		typeof(val) __v = (val);				\</div><div class='add'>+		int __ret;						\</div><div class='add'>+									\</div><div class='add'>+		BUILD_BUG_ON(NR_ITS_ABIS == 1 &amp;&amp;			\</div><div class='add'>+			     sizeof(__v) != ABI_0_ESZ);			\</div><div class='add'>+		if (NR_ITS_ABIS &gt; 1 &amp;&amp;					\</div><div class='add'>+		    KVM_BUG_ON(__sz != sizeof(__v), __k))		\</div><div class='add'>+			__ret = -EINVAL;				\</div><div class='add'>+		else							\</div><div class='add'>+			__ret = vgic_write_guest_lock(__k, (g),		\</div><div class='add'>+						      &amp;__v, __sz);	\</div><div class='add'>+		__ret;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Creates a new (reference to a) struct vgic_irq for a given LPI.</div><div class='ctx'>  * If this LPI is already mapped on another ITS, we increase its refcount</div><div class='hunk'>@@ -42,8 +77,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,</div><div class='ctx'> 				     struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_dist *dist = &amp;kvm-&gt;arch.vgic;</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct vgic_irq *irq = vgic_get_irq(kvm, intid), *oldirq;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* In this case there is no put, since we keep the reference. */</div><div class='hunk'>@@ -54,7 +88,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,</div><div class='ctx'> 	if (!irq)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	ret = xa_reserve_irq(&amp;dist-&gt;lpi_xa, intid, GFP_KERNEL_ACCOUNT);</div><div class='add'>+	ret = xa_reserve(&amp;dist-&gt;lpi_xa, intid, GFP_KERNEL_ACCOUNT);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(irq);</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='hunk'>@@ -64,19 +98,19 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,</div><div class='ctx'> 	raw_spin_lock_init(&amp;irq-&gt;irq_lock);</div><div class='ctx'> </div><div class='ctx'> 	irq-&gt;config = VGIC_CONFIG_EDGE;</div><div class='del'>-	kref_init(&amp;irq-&gt;refcount);</div><div class='add'>+	refcount_set(&amp;irq-&gt;refcount, 1);</div><div class='ctx'> 	irq-&gt;intid = intid;</div><div class='ctx'> 	irq-&gt;target_vcpu = vcpu;</div><div class='ctx'> 	irq-&gt;group = 1;</div><div class='ctx'> </div><div class='del'>-	xa_lock_irqsave(&amp;dist-&gt;lpi_xa, flags);</div><div class='add'>+	xa_lock(&amp;dist-&gt;lpi_xa);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * There could be a race with another vgic_add_lpi(), so we need to</div><div class='ctx'> 	 * check that we don't add a second list entry with the same LPI.</div><div class='ctx'> 	 */</div><div class='ctx'> 	oldirq = xa_load(&amp;dist-&gt;lpi_xa, intid);</div><div class='del'>-	if (vgic_try_get_irq_kref(oldirq)) {</div><div class='add'>+	if (vgic_try_get_irq_ref(oldirq)) {</div><div class='ctx'> 		/* Someone was faster with adding this LPI, lets use that. */</div><div class='ctx'> 		kfree(irq);</div><div class='ctx'> 		irq = oldirq;</div><div class='hunk'>@@ -91,7 +125,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='del'>-	xa_unlock_irqrestore(&amp;dist-&gt;lpi_xa, flags);</div><div class='add'>+	xa_unlock(&amp;dist-&gt;lpi_xa);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='hunk'>@@ -119,36 +153,6 @@ out_unlock:</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct its_device {</div><div class='del'>-	struct list_head dev_list;</div><div class='del'>-</div><div class='del'>-	/* the head for the list of ITTEs */</div><div class='del'>-	struct list_head itt_head;</div><div class='del'>-	u32 num_eventid_bits;</div><div class='del'>-	gpa_t itt_addr;</div><div class='del'>-	u32 device_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define COLLECTION_NOT_MAPPED ((u32)~0)</div><div class='del'>-</div><div class='del'>-struct its_collection {</div><div class='del'>-	struct list_head coll_list;</div><div class='del'>-</div><div class='del'>-	u32 collection_id;</div><div class='del'>-	u32 target_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define its_is_collection_mapped(coll) ((coll) &amp;&amp; \</div><div class='del'>-				((coll)-&gt;target_addr != COLLECTION_NOT_MAPPED))</div><div class='del'>-</div><div class='del'>-struct its_ite {</div><div class='del'>-	struct list_head ite_list;</div><div class='del'>-</div><div class='del'>-	struct vgic_irq *irq;</div><div class='del'>-	struct its_collection *collection;</div><div class='del'>-	u32 event_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct vgic_its_abi - ITS abi ops and settings</div><div class='ctx'>  * @cte_esz: collection table entry size</div><div class='hunk'>@@ -301,39 +305,34 @@ static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='del'>-</div><div class='ctx'> 	if (irq-&gt;hw)</div><div class='del'>-		return its_prop_update_vlpi(irq-&gt;host_irq, prop, needs_inv);</div><div class='add'>+		ret = its_prop_update_vlpi(irq-&gt;host_irq, prop, needs_inv);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct its_vlpi_map map;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;irq-&gt;irq_lock);</div><div class='ctx'> 	irq-&gt;target_vcpu = vcpu;</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (irq-&gt;hw) {</div><div class='del'>-		struct its_vlpi_map map;</div><div class='del'>-</div><div class='del'>-		ret = its_get_vlpi(irq-&gt;host_irq, &amp;map);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	if (!irq-&gt;hw)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		if (map.vpe)</div><div class='del'>-			atomic_dec(&amp;map.vpe-&gt;vlpi_count);</div><div class='del'>-		map.vpe = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3.its_vpe;</div><div class='del'>-		atomic_inc(&amp;map.vpe-&gt;vlpi_count);</div><div class='add'>+	ret = its_get_vlpi(irq-&gt;host_irq, &amp;map);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		ret = its_map_vlpi(irq-&gt;host_irq, &amp;map);</div><div class='del'>-	}</div><div class='add'>+	if (map.vpe)</div><div class='add'>+		atomic_dec(&amp;map.vpe-&gt;vlpi_count);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	map.vpe = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3.its_vpe;</div><div class='add'>+	atomic_inc(&amp;map.vpe-&gt;vlpi_count);</div><div class='add'>+	return its_map_vlpi(irq-&gt;host_irq, &amp;map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct kvm_vcpu *collection_to_vcpu(struct kvm *kvm,</div><div class='hunk'>@@ -419,7 +418,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			last_byte_offset = byte_offset;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, NULL, intid);</div><div class='add'>+		irq = vgic_get_irq(vcpu-&gt;kvm, intid);</div><div class='ctx'> 		if (!irq)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -547,7 +546,7 @@ static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db,</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='ctx'> 	irq = xa_load(&amp;its-&gt;translation_cache, cache_key);</div><div class='del'>-	if (!vgic_try_get_irq_kref(irq))</div><div class='add'>+	if (!vgic_try_get_irq_ref(irq))</div><div class='ctx'> 		irq = NULL;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_unlock();</div><div class='hunk'>@@ -571,14 +570,24 @@ static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> 	 * its_lock, as the ITE (and the reference it holds) cannot be freed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	lockdep_assert_held(&amp;its-&gt;its_lock);</div><div class='del'>-	vgic_get_irq_kref(irq);</div><div class='add'>+	vgic_get_irq_ref(irq);</div><div class='add'>+</div><div class='add'>+	old = xa_store(&amp;its-&gt;translation_cache, cache_key, irq, GFP_KERNEL_ACCOUNT);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Put the reference taken on @irq if the store fails. Intentionally do</div><div class='add'>+	 * not return the error as the translation cache is best effort.</div><div class='add'>+	 */</div><div class='add'>+	if (xa_is_err(old)) {</div><div class='add'>+		vgic_put_irq(kvm, irq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We could have raced with another CPU caching the same</div><div class='ctx'> 	 * translation behind our back, ensure we don't leak a</div><div class='ctx'> 	 * reference if that is the case.</div><div class='ctx'> 	 */</div><div class='del'>-	old = xa_store(&amp;its-&gt;translation_cache, cache_key, irq, GFP_KERNEL_ACCOUNT);</div><div class='ctx'> 	if (old)</div><div class='ctx'> 		vgic_put_irq(kvm, old);</div><div class='ctx'> }</div><div class='hunk'>@@ -741,12 +750,17 @@ int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)</div><div class='ctx'> /* Requires the its_lock to be held. */</div><div class='ctx'> static void its_free_ite(struct kvm *kvm, struct its_ite *ite)</div><div class='ctx'> {</div><div class='add'>+	struct vgic_irq *irq = ite-&gt;irq;</div><div class='ctx'> 	list_del(&amp;ite-&gt;ite_list);</div><div class='ctx'> </div><div class='ctx'> 	/* This put matches the get in vgic_add_lpi. */</div><div class='del'>-	if (ite-&gt;irq) {</div><div class='del'>-		if (ite-&gt;irq-&gt;hw)</div><div class='del'>-			WARN_ON(its_unmap_vlpi(ite-&gt;irq-&gt;host_irq));</div><div class='add'>+	if (irq) {</div><div class='add'>+		scoped_guard(raw_spinlock_irqsave, &amp;irq-&gt;irq_lock) {</div><div class='add'>+			if (irq-&gt;hw)</div><div class='add'>+				its_unmap_vlpi(ite-&gt;irq-&gt;host_irq);</div><div class='add'>+</div><div class='add'>+			irq-&gt;hw = false;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		vgic_put_irq(kvm, ite-&gt;irq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -782,6 +796,9 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> </div><div class='ctx'> 	ite = find_ite(its, device_id, event_id);</div><div class='ctx'> 	if (ite &amp;&amp; its_is_collection_mapped(ite-&gt;collection)) {</div><div class='add'>+		struct its_device *device = find_its_device(its, device_id);</div><div class='add'>+		int ite_esz = vgic_its_get_abi(its)-&gt;ite_esz;</div><div class='add'>+		gpa_t gpa = device-&gt;itt_addr + ite-&gt;event_id * ite_esz;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Though the spec talks about removing the pending state, we</div><div class='ctx'> 		 * don't bother here since we clear the ITTE anyway and the</div><div class='hunk'>@@ -790,7 +807,8 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> 		vgic_its_invalidate_cache(its);</div><div class='ctx'> </div><div class='ctx'> 		its_free_ite(kvm, ite);</div><div class='del'>-		return 0;</div><div class='add'>+</div><div class='add'>+		return vgic_its_write_entry_lock(its, gpa, 0ULL, ite);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return E_ITS_DISCARD_UNMAPPED_INTERRUPT;</div><div class='hunk'>@@ -1140,8 +1158,9 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> 	u8 num_eventid_bits = its_cmd_get_size(its_cmd);</div><div class='ctx'> 	gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);</div><div class='ctx'> 	struct its_device *device;</div><div class='add'>+	gpa_t gpa;</div><div class='ctx'> </div><div class='del'>-	if (!vgic_its_check_id(its, its-&gt;baser_device_table, device_id, NULL))</div><div class='add'>+	if (!vgic_its_check_id(its, its-&gt;baser_device_table, device_id, &amp;gpa))</div><div class='ctx'> 		return E_ITS_MAPD_DEVICE_OOR;</div><div class='ctx'> </div><div class='ctx'> 	if (valid &amp;&amp; num_eventid_bits &gt; VITS_TYPER_IDBITS)</div><div class='hunk'>@@ -1162,7 +1181,7 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> 	 * is an error, so we are done in any case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!valid)</div><div class='del'>-		return 0;</div><div class='add'>+		return vgic_its_write_entry_lock(its, gpa, 0ULL, dte);</div><div class='ctx'> </div><div class='ctx'> 	device = vgic_its_alloc_device(its, device_id, itt_addr,</div><div class='ctx'> 				       num_eventid_bits);</div><div class='hunk'>@@ -1282,7 +1301,7 @@ int vgic_its_invall(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	unsigned long intid;</div><div class='ctx'> </div><div class='ctx'> 	xa_for_each(&amp;dist-&gt;lpi_xa, intid, irq) {</div><div class='del'>-		irq = vgic_get_irq(kvm, NULL, intid);</div><div class='add'>+		irq = vgic_get_irq(kvm, intid);</div><div class='ctx'> 		if (!irq)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1348,7 +1367,7 @@ static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	xa_for_each(&amp;dist-&gt;lpi_xa, intid, irq) {</div><div class='del'>-		irq = vgic_get_irq(kvm, NULL, intid);</div><div class='add'>+		irq = vgic_get_irq(kvm, intid);</div><div class='ctx'> 		if (!irq)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1888,6 +1907,8 @@ static void vgic_its_destroy(struct kvm_device *kvm_dev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;its-&gt;its_lock);</div><div class='ctx'> </div><div class='add'>+	vgic_its_debug_destroy(kvm_dev);</div><div class='add'>+</div><div class='ctx'> 	vgic_its_free_device_list(kvm, its);</div><div class='ctx'> 	vgic_its_free_collection_list(kvm, its);</div><div class='ctx'> 	vgic_its_invalidate_cache(its);</div><div class='hunk'>@@ -1949,7 +1970,7 @@ static int vgic_its_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!lock_all_vcpus(dev-&gt;kvm)) {</div><div class='add'>+	if (kvm_trylock_all_vcpus(dev-&gt;kvm)) {</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1984,7 +2005,7 @@ static int vgic_its_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='del'>-	unlock_all_vcpus(dev-&gt;kvm);</div><div class='add'>+	kvm_unlock_all_vcpus(dev-&gt;kvm);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2084,9 +2105,8 @@ static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz,</div><div class='ctx'>  * vgic_its_save_ite - Save an interrupt translation entry at @gpa</div><div class='ctx'>  */</div><div class='ctx'> static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,</div><div class='del'>-			      struct its_ite *ite, gpa_t gpa, int ite_esz)</div><div class='add'>+			      struct its_ite *ite, gpa_t gpa)</div><div class='ctx'> {</div><div class='del'>-	struct kvm *kvm = its-&gt;dev-&gt;kvm;</div><div class='ctx'> 	u32 next_offset;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='hunk'>@@ -2095,7 +2115,8 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,</div><div class='ctx'> 	       ((u64)ite-&gt;irq-&gt;intid &lt;&lt; KVM_ITS_ITE_PINTID_SHIFT) |</div><div class='ctx'> 		ite-&gt;collection-&gt;collection_id;</div><div class='ctx'> 	val = cpu_to_le64(val);</div><div class='del'>-	return vgic_write_guest_lock(kvm, gpa, &amp;val, ite_esz);</div><div class='add'>+</div><div class='add'>+	return vgic_its_write_entry_lock(its, gpa, val, ite);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2195,7 +2216,7 @@ static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)</div><div class='ctx'> 		if (ite-&gt;irq-&gt;hw &amp;&amp; !kvm_vgic_global_state.has_gicv4_1)</div><div class='ctx'> 			return -EACCES;</div><div class='ctx'> </div><div class='del'>-		ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz);</div><div class='add'>+		ret = vgic_its_save_ite(its, device, ite, gpa);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2234,12 +2255,10 @@ static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)</div><div class='ctx'>  * @its: ITS handle</div><div class='ctx'>  * @dev: ITS device</div><div class='ctx'>  * @ptr: GPA</div><div class='del'>- * @dte_esz: device table entry size</div><div class='ctx'>  */</div><div class='ctx'> static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,</div><div class='del'>-			     gpa_t ptr, int dte_esz)</div><div class='add'>+			     gpa_t ptr)</div><div class='ctx'> {</div><div class='del'>-	struct kvm *kvm = its-&gt;dev-&gt;kvm;</div><div class='ctx'> 	u64 val, itt_addr_field;</div><div class='ctx'> 	u32 next_offset;</div><div class='ctx'> </div><div class='hunk'>@@ -2250,7 +2269,8 @@ static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,</div><div class='ctx'> 	       (itt_addr_field &lt;&lt; KVM_ITS_DTE_ITTADDR_SHIFT) |</div><div class='ctx'> 		(dev-&gt;num_eventid_bits - 1));</div><div class='ctx'> 	val = cpu_to_le64(val);</div><div class='del'>-	return vgic_write_guest_lock(kvm, ptr, &amp;val, dte_esz);</div><div class='add'>+</div><div class='add'>+	return vgic_its_write_entry_lock(its, ptr, val, dte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2326,10 +2346,8 @@ static int vgic_its_device_cmp(void *priv, const struct list_head *a,</div><div class='ctx'>  */</div><div class='ctx'> static int vgic_its_save_device_tables(struct vgic_its *its)</div><div class='ctx'> {</div><div class='del'>-	const struct vgic_its_abi *abi = vgic_its_get_abi(its);</div><div class='ctx'> 	u64 baser = its-&gt;baser_device_table;</div><div class='ctx'> 	struct its_device *dev;</div><div class='del'>-	int dte_esz = abi-&gt;dte_esz;</div><div class='ctx'> </div><div class='ctx'> 	if (!(baser &amp; GITS_BASER_VALID))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2348,7 +2366,7 @@ static int vgic_its_save_device_tables(struct vgic_its *its)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		ret = vgic_its_save_dte(its, dev, eaddr, dte_esz);</div><div class='add'>+		ret = vgic_its_save_dte(its, dev, eaddr);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2429,7 +2447,7 @@ static int vgic_its_restore_device_tables(struct vgic_its *its)</div><div class='ctx'> </div><div class='ctx'> static int vgic_its_save_cte(struct vgic_its *its,</div><div class='ctx'> 			     struct its_collection *collection,</div><div class='del'>-			     gpa_t gpa, int esz)</div><div class='add'>+			     gpa_t gpa)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='hunk'>@@ -2437,7 +2455,8 @@ static int vgic_its_save_cte(struct vgic_its *its,</div><div class='ctx'> 	       ((u64)collection-&gt;target_addr &lt;&lt; KVM_ITS_CTE_RDBASE_SHIFT) |</div><div class='ctx'> 	       collection-&gt;collection_id);</div><div class='ctx'> 	val = cpu_to_le64(val);</div><div class='del'>-	return vgic_write_guest_lock(its-&gt;dev-&gt;kvm, gpa, &amp;val, esz);</div><div class='add'>+</div><div class='add'>+	return vgic_its_write_entry_lock(its, gpa, val, cte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2445,7 +2464,7 @@ static int vgic_its_save_cte(struct vgic_its *its,</div><div class='ctx'>  * Return +1 on success, 0 if the entry was invalid (which should be</div><div class='ctx'>  * interpreted as end-of-table), and a negative error value for generic errors.</div><div class='ctx'>  */</div><div class='del'>-static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)</div><div class='add'>+static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa)</div><div class='ctx'> {</div><div class='ctx'> 	struct its_collection *collection;</div><div class='ctx'> 	struct kvm *kvm = its-&gt;dev-&gt;kvm;</div><div class='hunk'>@@ -2453,8 +2472,7 @@ static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)</div><div class='ctx'> 	u64 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(esz &gt; sizeof(val));</div><div class='del'>-	ret = kvm_read_guest_lock(kvm, gpa, &amp;val, esz);</div><div class='add'>+	ret = vgic_its_read_entry_lock(its, gpa, &amp;val, cte);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	val = le64_to_cpu(val);</div><div class='hunk'>@@ -2492,7 +2510,6 @@ static int vgic_its_save_collection_table(struct vgic_its *its)</div><div class='ctx'> 	u64 baser = its-&gt;baser_coll_table;</div><div class='ctx'> 	gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser);</div><div class='ctx'> 	struct its_collection *collection;</div><div class='del'>-	u64 val;</div><div class='ctx'> 	size_t max_size, filled = 0;</div><div class='ctx'> 	int ret, cte_esz = abi-&gt;cte_esz;</div><div class='ctx'> </div><div class='hunk'>@@ -2502,7 +2519,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its)</div><div class='ctx'> 	max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(collection, &amp;its-&gt;collection_list, coll_list) {</div><div class='del'>-		ret = vgic_its_save_cte(its, collection, gpa, cte_esz);</div><div class='add'>+		ret = vgic_its_save_cte(its, collection, gpa);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		gpa += cte_esz;</div><div class='hunk'>@@ -2516,10 +2533,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its)</div><div class='ctx'> 	 * table is not fully filled, add a last dummy element</div><div class='ctx'> 	 * with valid bit unset</div><div class='ctx'> 	 */</div><div class='del'>-	val = 0;</div><div class='del'>-	BUG_ON(cte_esz &gt; sizeof(val));</div><div class='del'>-	ret = vgic_write_guest_lock(its-&gt;dev-&gt;kvm, gpa, &amp;val, cte_esz);</div><div class='del'>-	return ret;</div><div class='add'>+	return vgic_its_write_entry_lock(its, gpa, 0ULL, cte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2544,7 +2558,7 @@ static int vgic_its_restore_collection_table(struct vgic_its *its)</div><div class='ctx'> 	max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;</div><div class='ctx'> </div><div class='ctx'> 	while (read &lt; max_size) {</div><div class='del'>-		ret = vgic_its_restore_cte(its, gpa, cte_esz);</div><div class='add'>+		ret = vgic_its_restore_cte(its, gpa);</div><div class='ctx'> 		if (ret &lt;= 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 		gpa += cte_esz;</div><div class='hunk'>@@ -2661,7 +2675,7 @@ static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!lock_all_vcpus(kvm)) {</div><div class='add'>+	if (kvm_trylock_all_vcpus(kvm)) {</div><div class='ctx'> 		mutex_unlock(&amp;kvm-&gt;lock);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2679,11 +2693,14 @@ static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr)</div><div class='ctx'> 	case KVM_DEV_ARM_ITS_RESTORE_TABLES:</div><div class='ctx'> 		ret = abi-&gt;restore_tables(its);</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;its-&gt;its_lock);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='del'>-	unlock_all_vcpus(kvm);</div><div class='add'>+	kvm_unlock_all_vcpus(kvm);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2728,7 +2745,12 @@ static int vgic_its_set_attr(struct kvm_device *dev,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		return vgic_register_its_iodev(dev-&gt;kvm, its, addr);</div><div class='add'>+		ret = vgic_register_its_iodev(dev-&gt;kvm, its, addr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return vgic_its_debug_init(dev);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_CTRL:</div><div class='ctx'> 		return vgic_its_ctrl(dev-&gt;kvm, its, attr-&gt;attr);</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-kvm-device.c b/arch/arm64/kvm/vgic/vgic-kvm-device.c<br/>index 1d26bb5b02f4..3d1a776b716d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-kvm-device.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-kvm-device.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2015 ARM Ltd.</div><div class='ctx'>  * Author: Marc Zyngier &lt;marc.zyngier@arm.com&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/irqchip/arm-gic-v3.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;kvm/arm_vgic.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='hunk'>@@ -236,7 +237,12 @@ static int vgic_set_common_attr(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='del'>-		if (vgic_ready(dev-&gt;kvm) || dev-&gt;kvm-&gt;arch.vgic.nr_spis)</div><div class='add'>+		/*</div><div class='add'>+		 * Either userspace has already configured NR_IRQS or</div><div class='add'>+		 * the vgic has already been initialized and vgic_init()</div><div class='add'>+		 * supplied a default amount of SPIs.</div><div class='add'>+		 */</div><div class='add'>+		if (dev-&gt;kvm-&gt;arch.vgic.nr_spis)</div><div class='ctx'> 			ret = -EBUSY;</div><div class='ctx'> 		else</div><div class='ctx'> 			dev-&gt;kvm-&gt;arch.vgic.nr_spis =</div><div class='hunk'>@@ -263,7 +269,7 @@ static int vgic_set_common_attr(struct kvm_device *dev,</div><div class='ctx'> 				return -ENXIO;</div><div class='ctx'> 			mutex_lock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-			if (!lock_all_vcpus(dev-&gt;kvm)) {</div><div class='add'>+			if (kvm_trylock_all_vcpus(dev-&gt;kvm)) {</div><div class='ctx'> 				mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 				return -EBUSY;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -271,7 +277,7 @@ static int vgic_set_common_attr(struct kvm_device *dev,</div><div class='ctx'> 			mutex_lock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='ctx'> 			r = vgic_v3_save_pending_tables(dev-&gt;kvm);</div><div class='ctx'> 			mutex_unlock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='del'>-			unlock_all_vcpus(dev-&gt;kvm);</div><div class='add'>+			kvm_unlock_all_vcpus(dev-&gt;kvm);</div><div class='ctx'> 			mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -379,7 +385,7 @@ static int vgic_v2_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!lock_all_vcpus(dev-&gt;kvm)) {</div><div class='add'>+	if (kvm_trylock_all_vcpus(dev-&gt;kvm)) {</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -404,7 +410,7 @@ static int vgic_v2_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='del'>-	unlock_all_vcpus(dev-&gt;kvm);</div><div class='add'>+	kvm_unlock_all_vcpus(dev-&gt;kvm);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret &amp;&amp; !is_write)</div><div class='hunk'>@@ -499,6 +505,24 @@ int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Allow access to certain ID-like registers prior to VGIC initialization,</div><div class='add'>+ * thereby allowing the VMM to provision the features / sizing of the VGIC.</div><div class='add'>+ */</div><div class='add'>+static bool reg_allowed_pre_init(struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	if (attr-&gt;group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (attr-&gt;attr &amp; KVM_DEV_ARM_VGIC_OFFSET_MASK) {</div><div class='add'>+	case GICD_IIDR:</div><div class='add'>+	case GICD_TYPER2:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state</div><div class='ctx'>  *</div><div class='ctx'>  * @dev:      kvm device handle</div><div class='hunk'>@@ -540,14 +564,14 @@ static int vgic_v3_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!lock_all_vcpus(dev-&gt;kvm)) {</div><div class='add'>+	if (kvm_trylock_all_vcpus(dev-&gt;kvm)) {</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!vgic_initialized(dev-&gt;kvm))) {</div><div class='add'>+	if (!(vgic_initialized(dev-&gt;kvm) || reg_allowed_pre_init(attr))) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -584,7 +608,7 @@ static int vgic_v3_attr_regs_access(struct kvm_device *dev,</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='del'>-	unlock_all_vcpus(dev-&gt;kvm);</div><div class='add'>+	kvm_unlock_all_vcpus(dev-&gt;kvm);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;kvm-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret &amp;&amp; uaccess &amp;&amp; !is_write) {</div><div class='hunk'>@@ -604,6 +628,23 @@ static int vgic_v3_set_attr(struct kvm_device *dev,</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:</div><div class='ctx'> 		return vgic_v3_attr_regs_access(dev, attr, true);</div><div class='add'>+	case KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ: {</div><div class='add'>+		u32 __user *uaddr = (u32 __user *)attr-&gt;addr;</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		if (get_user(val, uaddr))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		guard(mutex)(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='add'>+		if (vgic_initialized(dev-&gt;kvm))</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		if (!irq_is_ppi(val))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		dev-&gt;kvm-&gt;arch.vgic.mi_intid = val;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		return vgic_set_common_attr(dev, attr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -618,6 +659,12 @@ static int vgic_v3_get_attr(struct kvm_device *dev,</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:</div><div class='ctx'> 		return vgic_v3_attr_regs_access(dev, attr, false);</div><div class='add'>+	case KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ: {</div><div class='add'>+		u32 __user *uaddr = (u32 __user *)(long)attr-&gt;addr;</div><div class='add'>+</div><div class='add'>+		guard(mutex)(&amp;dev-&gt;kvm-&gt;arch.config_lock);</div><div class='add'>+		return put_user(dev-&gt;kvm-&gt;arch.vgic.mi_intid, uaddr);</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		return vgic_get_common_attr(dev, attr);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -640,6 +687,7 @@ static int vgic_v3_has_attr(struct kvm_device *dev,</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:</div><div class='ctx'> 		return vgic_v3_has_attr_regs(dev, attr);</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:</div><div class='add'>+	case KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {</div><div class='ctx'> 		if (((attr-&gt;attr &amp; KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) &gt;&gt;</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v2.c b/arch/arm64/kvm/vgic/vgic-mmio-v2.c<br/>index e070cda86e12..f25fccb1f8e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio-v2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio-v2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio-v2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-mmio-v2.c</a></div><div class='hunk'>@@ -148,7 +148,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu,</div><div class='ctx'> 		if (!(targets &amp; (1U &lt;&lt; c)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(source_vcpu-&gt;kvm, vcpu, intid);</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		irq-&gt;pending_latch = true;</div><div class='hunk'>@@ -167,7 +167,7 @@ static unsigned long vgic_mmio_read_target(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	u64 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		val |= (u64)irq-&gt;targets &lt;&lt; (i * 8);</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +191,7 @@ static void vgic_mmio_write_target(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, NULL, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, intid + i);</div><div class='ctx'> 		int target;</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='hunk'>@@ -213,7 +213,7 @@ static unsigned long vgic_mmio_read_sgipend(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	u64 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		val |= (u64)irq-&gt;source &lt;&lt; (i * 8);</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +231,7 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -253,7 +253,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c<br/>index 9e50928f5d7d..70d50c77e5dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio-v3.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio-v3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio-v3.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-mmio-v3.c</a></div><div class='hunk'>@@ -50,8 +50,25 @@ bool vgic_has_its(struct kvm *kvm)</div><div class='ctx'> </div><div class='ctx'> bool vgic_supports_direct_msis(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	return (kvm_vgic_global_state.has_gicv4_1 ||</div><div class='del'>-		(kvm_vgic_global_state.has_gicv4 &amp;&amp; vgic_has_its(kvm)));</div><div class='add'>+	/*</div><div class='add'>+	 * Deliberately conflate vLPI and vSGI support on GICv4.1 hardware,</div><div class='add'>+	 * indirectly allowing userspace to control whether or not vPEs are</div><div class='add'>+	 * allocated for the VM.</div><div class='add'>+	 */</div><div class='add'>+	if (system_supports_direct_sgis() &amp;&amp; !vgic_supports_direct_sgis(kvm))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return kvm_vgic_global_state.has_gicv4 &amp;&amp; vgic_has_its(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool system_supports_direct_sgis(void)</div><div class='add'>+{</div><div class='add'>+	return kvm_vgic_global_state.has_gicv4_1 &amp;&amp; gic_cpuif_has_vsgi();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool vgic_supports_direct_sgis(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm-&gt;arch.vgic.nassgicap;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -86,7 +103,7 @@ static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GICD_TYPER2:</div><div class='del'>-		if (kvm_vgic_global_state.has_gicv4_1 &amp;&amp; gic_cpuif_has_vsgi())</div><div class='add'>+		if (vgic_supports_direct_sgis(vcpu-&gt;kvm))</div><div class='ctx'> 			value = GICD_TYPER2_nASSGIcap;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GICD_IIDR:</div><div class='hunk'>@@ -119,7 +136,7 @@ static void vgic_mmio_write_v3_misc(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		dist-&gt;enabled = val &amp; GICD_CTLR_ENABLE_SS_G1;</div><div class='ctx'> </div><div class='ctx'> 		/* Not a GICv4.1? No HW SGIs */</div><div class='del'>-		if (!kvm_vgic_global_state.has_gicv4_1 || !gic_cpuif_has_vsgi())</div><div class='add'>+		if (!vgic_supports_direct_sgis(vcpu-&gt;kvm))</div><div class='ctx'> 			val &amp;= ~GICD_CTLR_nASSGIreq;</div><div class='ctx'> </div><div class='ctx'> 		/* Dist stays enabled? nASSGIreq is RO */</div><div class='hunk'>@@ -133,7 +150,7 @@ static void vgic_mmio_write_v3_misc(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		if (is_hwsgi != dist-&gt;nassgireq)</div><div class='ctx'> 			vgic_v4_configure_vsgis(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='del'>-		if (kvm_vgic_global_state.has_gicv4_1 &amp;&amp;</div><div class='add'>+		if (vgic_supports_direct_sgis(vcpu-&gt;kvm) &amp;&amp;</div><div class='ctx'> 		    was_enabled != dist-&gt;enabled)</div><div class='ctx'> 			kvm_make_all_cpus_request(vcpu-&gt;kvm, KVM_REQ_RELOAD_GICv4);</div><div class='ctx'> 		else if (!was_enabled &amp;&amp; dist-&gt;enabled)</div><div class='hunk'>@@ -159,8 +176,18 @@ static int vgic_mmio_uaccess_write_v3_misc(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	switch (addr &amp; 0x0c) {</div><div class='ctx'> 	case GICD_TYPER2:</div><div class='del'>-		if (val != vgic_mmio_read_v3_misc(vcpu, addr, len))</div><div class='add'>+		reg = vgic_mmio_read_v3_misc(vcpu, addr, len);</div><div class='add'>+</div><div class='add'>+		if (reg == val)</div><div class='add'>+			return 0;</div><div class='add'>+		if (vgic_initialized(vcpu-&gt;kvm))</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		if ((reg ^ val) &amp; ~GICD_TYPER2_nASSGIcap)</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		if (!system_supports_direct_sgis() &amp;&amp; val)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		dist-&gt;nassgicap = val &amp; GICD_TYPER2_nASSGIcap;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case GICD_IIDR:</div><div class='ctx'> 		reg = vgic_mmio_read_v3_misc(vcpu, addr, len);</div><div class='hunk'>@@ -178,7 +205,7 @@ static int vgic_mmio_uaccess_write_v3_misc(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		}</div><div class='ctx'> 	case GICD_CTLR:</div><div class='ctx'> 		/* Not a GICv4.1? No HW SGIs */</div><div class='del'>-		if (!kvm_vgic_global_state.has_gicv4_1)</div><div class='add'>+		if (!vgic_supports_direct_sgis(vcpu-&gt;kvm))</div><div class='ctx'> 			val &amp;= ~GICD_CTLR_nASSGIreq;</div><div class='ctx'> </div><div class='ctx'> 		dist-&gt;enabled = val &amp; GICD_CTLR_ENABLE_SS_G1;</div><div class='hunk'>@@ -194,7 +221,7 @@ static unsigned long vgic_mmio_read_irouter(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					    gpa_t addr, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	int intid = VGIC_ADDR_TO_INTID(addr, 64);</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, NULL, intid);</div><div class='add'>+	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, intid);</div><div class='ctx'> 	unsigned long ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!irq)</div><div class='hunk'>@@ -220,7 +247,7 @@ static void vgic_mmio_write_irouter(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (addr &amp; 4)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(vcpu-&gt;kvm, NULL, intid);</div><div class='add'>+	irq = vgic_get_irq(vcpu-&gt;kvm, intid);</div><div class='ctx'> </div><div class='ctx'> 	if (!irq)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -530,6 +557,7 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				   unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_irq *irq;</div><div class='add'>+	u32 intid;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the guest wrote only to the upper 32bit part of the</div><div class='hunk'>@@ -541,9 +569,13 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if ((addr &amp; 4) || !vgic_lpis_enabled(vcpu))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	intid = lower_32_bits(val);</div><div class='add'>+	if (intid &lt; VGIC_MIN_LPI)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	vgic_set_rdist_busy(vcpu, true);</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(vcpu-&gt;kvm, NULL, lower_32_bits(val));</div><div class='add'>+	irq = vgic_get_irq(vcpu-&gt;kvm, intid);</div><div class='ctx'> 	if (irq) {</div><div class='ctx'> 		vgic_its_inv_lpi(vcpu-&gt;kvm, irq);</div><div class='ctx'> 		vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='hunk'>@@ -1020,7 +1052,7 @@ int vgic_v3_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr)</div><div class='ctx'> </div><div class='ctx'> static void vgic_v3_queue_sgi(struct kvm_vcpu *vcpu, u32 sgi, bool allow_group1)</div><div class='ctx'> {</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, sgi);</div><div class='add'>+	struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, sgi);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c<br/>index cf76523a2194..a573b1f0c6cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-mmio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-mmio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-mmio.c</a></div><div class='hunk'>@@ -50,7 +50,7 @@ unsigned long vgic_mmio_read_group(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	/* Loop over all IRQs affected by this read */</div><div class='ctx'> 	for (i = 0; i &lt; len * 8; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		if (irq-&gt;group)</div><div class='ctx'> 			value |= BIT(i);</div><div class='hunk'>@@ -74,7 +74,7 @@ void vgic_mmio_write_group(struct kvm_vcpu *vcpu, gpa_t addr,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len * 8; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		irq-&gt;group = !!(val &amp; BIT(i));</div><div class='hunk'>@@ -102,7 +102,7 @@ unsigned long vgic_mmio_read_enable(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	/* Loop over all IRQs affected by this read */</div><div class='ctx'> 	for (i = 0; i &lt; len * 8; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		if (irq-&gt;enabled)</div><div class='ctx'> 			value |= (1U &lt;&lt; i);</div><div class='hunk'>@@ -122,7 +122,7 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		if (irq-&gt;hw &amp;&amp; vgic_irq_is_sgi(irq-&gt;intid)) {</div><div class='hunk'>@@ -171,7 +171,7 @@ void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		if (irq-&gt;hw &amp;&amp; vgic_irq_is_sgi(irq-&gt;intid) &amp;&amp; irq-&gt;enabled)</div><div class='hunk'>@@ -193,7 +193,7 @@ int vgic_uaccess_write_senable(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		irq-&gt;enabled = true;</div><div class='hunk'>@@ -214,7 +214,7 @@ int vgic_uaccess_write_cenable(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		irq-&gt;enabled = false;</div><div class='hunk'>@@ -236,7 +236,7 @@ static unsigned long __read_pending(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	/* Loop over all IRQs affected by this read */</div><div class='ctx'> 	for (i = 0; i &lt; len * 8; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> 		bool val;</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +309,7 @@ static void __set_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		/* GICD_ISPENDR0 SGI bits are WI when written from the guest. */</div><div class='ctx'> 		if (is_vgic_v2_sgi(vcpu, irq) &amp;&amp; !is_user) {</div><div class='hunk'>@@ -395,7 +395,7 @@ static void __clear_pending(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		/* GICD_ICPENDR0 SGI bits are WI when written from the guest. */</div><div class='ctx'> 		if (is_vgic_v2_sgi(vcpu, irq) &amp;&amp; !is_user) {</div><div class='hunk'>@@ -494,7 +494,7 @@ static unsigned long __vgic_mmio_read_active(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	/* Loop over all IRQs affected by this read */</div><div class='ctx'> 	for (i = 0; i &lt; len * 8; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Even for HW interrupts, don't evaluate the HW state as</div><div class='hunk'>@@ -598,7 +598,7 @@ static void __vgic_mmio_write_cactive(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> 		vgic_mmio_change_active(vcpu, irq, false);</div><div class='ctx'> 		vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -635,7 +635,7 @@ static void __vgic_mmio_write_sactive(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(i, &amp;val, len * 8) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> 		vgic_mmio_change_active(vcpu, irq, true);</div><div class='ctx'> 		vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -672,7 +672,7 @@ unsigned long vgic_mmio_read_priority(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	u64 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		val |= (u64)irq-&gt;priority &lt;&lt; (i * 8);</div><div class='ctx'> </div><div class='hunk'>@@ -698,7 +698,7 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 		/* Narrow the priority range to what we actually support */</div><div class='hunk'>@@ -719,7 +719,7 @@ unsigned long vgic_mmio_read_config(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len * 4; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		if (irq-&gt;config == VGIC_CONFIG_EDGE)</div><div class='ctx'> 			value |= (2U &lt;&lt; (i * 2));</div><div class='hunk'>@@ -750,7 +750,7 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		if (intid + i &lt; VGIC_NR_PRIVATE_IRQS)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		irq = vgic_get_irq(vcpu-&gt;kvm, intid + i);</div><div class='ctx'> 		raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(i * 2 + 1, &amp;val))</div><div class='hunk'>@@ -775,7 +775,7 @@ u32 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid)</div><div class='ctx'> 		if ((intid + i) &lt; VGIC_NR_SGIS || (intid + i) &gt;= nr_irqs)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> 		if (irq-&gt;config == VGIC_CONFIG_LEVEL &amp;&amp; irq-&gt;line_level)</div><div class='ctx'> 			val |= (1U &lt;&lt; i);</div><div class='ctx'> </div><div class='hunk'>@@ -799,7 +799,7 @@ void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid,</div><div class='ctx'> 		if ((intid + i) &lt; VGIC_NR_SGIS || (intid + i) &gt;= nr_irqs)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid + i);</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid + i);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Line level is set irrespective of irq type</div><div class='hunk'>@@ -1091,7 +1091,7 @@ int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,</div><div class='ctx'> 		len = vgic_v3_init_dist_iodev(io_device);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		BUG_ON(1);</div><div class='add'>+		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	io_device-&gt;base_addr = dist_base_address;</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v2.c b/arch/arm64/kvm/vgic/vgic-v2.c<br/>index ae5a44d5702d..381673f03c39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-v2.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			kvm_notify_acked_irq(vcpu-&gt;kvm, 0,</div><div class='ctx'> 					     intid - VGIC_NR_PRIVATE_IRQS);</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid);</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid);</div><div class='ctx'> </div><div class='ctx'> 		raw_spin_lock(&amp;irq-&gt;irq_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c<br/>new file mode 100644<br/>index 000000000000..7f1259b49c50<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v3-nested.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-v3-nested.c</a></div><div class='hunk'>@@ -0,0 +1,407 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/kvm.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;kvm/arm_vgic.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/kvm_arm.h&gt;</div><div class='add'>+#include &lt;asm/kvm_emulate.h&gt;</div><div class='add'>+#include &lt;asm/kvm_nested.h&gt;</div><div class='add'>+</div><div class='add'>+#include "vgic.h"</div><div class='add'>+</div><div class='add'>+#define ICH_LRN(n)	(ICH_LR0_EL2 + (n))</div><div class='add'>+#define ICH_AP0RN(n)	(ICH_AP0R0_EL2 + (n))</div><div class='add'>+#define ICH_AP1RN(n)	(ICH_AP1R0_EL2 + (n))</div><div class='add'>+</div><div class='add'>+struct mi_state {</div><div class='add'>+	u16	eisr;</div><div class='add'>+	u16	elrsr;</div><div class='add'>+	bool	pend;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The shadow registers loaded to the hardware when running a L2 guest</div><div class='add'>+ * with the virtual IMO/FMO bits set.</div><div class='add'>+ */</div><div class='add'>+struct shadow_if {</div><div class='add'>+	struct vgic_v3_cpu_if	cpuif;</div><div class='add'>+	unsigned long		lr_map;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(struct shadow_if, shadow_if);</div><div class='add'>+</div><div class='add'>+static int lr_map_idx_to_shadow_idx(struct shadow_if *shadow_if, int idx)</div><div class='add'>+{</div><div class='add'>+	return hweight16(shadow_if-&gt;lr_map &amp; (BIT(idx) - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Nesting GICv3 support</div><div class='add'>+ *</div><div class='add'>+ * On a non-nesting VM (only running at EL0/EL1), the host hypervisor</div><div class='add'>+ * completely controls the interrupts injected via the list registers.</div><div class='add'>+ * Consequently, most of the state that is modified by the guest (by ACK-ing</div><div class='add'>+ * and EOI-ing interrupts) is synced by KVM on each entry/exit, so that we</div><div class='add'>+ * keep a semi-consistent view of the interrupts.</div><div class='add'>+ *</div><div class='add'>+ * This still applies for a NV guest, but only while "InHost" (either</div><div class='add'>+ * running at EL2, or at EL0 with HCR_EL2.{E2H.TGE}=={1,1}.</div><div class='add'>+ *</div><div class='add'>+ * When running a L2 guest ("not InHost"), things are radically different,</div><div class='add'>+ * as the L1 guest is in charge of provisioning the interrupts via its own</div><div class='add'>+ * view of the ICH_LR*_EL2 registers, which conveniently live in the VNCR</div><div class='add'>+ * page.  This means that the flow described above does work (there is no</div><div class='add'>+ * state to rebuild in the L0 hypervisor), and that most things happed on L2</div><div class='add'>+ * load/put:</div><div class='add'>+ *</div><div class='add'>+ * - on L2 load: move the in-memory L1 vGIC configuration into a shadow,</div><div class='add'>+ *   per-CPU data structure that is used to populate the actual LRs. This is</div><div class='add'>+ *   an extra copy that we could avoid, but life is short. In the process,</div><div class='add'>+ *   we remap any interrupt that has the HW bit set to the mapped interrupt</div><div class='add'>+ *   on the host, should the host consider it a HW one. This allows the HW</div><div class='add'>+ *   deactivation to take its course, such as for the timer.</div><div class='add'>+ *</div><div class='add'>+ * - on L2 put: perform the inverse transformation, so that the result of L2</div><div class='add'>+ *   running becomes visible to L1 in the VNCR-accessible registers.</div><div class='add'>+ *</div><div class='add'>+ * - there is nothing to do on L2 entry, as everything will have happened</div><div class='add'>+ *   on load. However, this is the point where we detect that an interrupt</div><div class='add'>+ *   targeting L1 and prepare the grand switcheroo.</div><div class='add'>+ *</div><div class='add'>+ * - on L2 exit: emulate the HW bit, and deactivate corresponding the L1</div><div class='add'>+ *   interrupt. The L0 active state will be cleared by the HW if the L1</div><div class='add'>+ *   interrupt was itself backed by a HW interrupt.</div><div class='add'>+ *</div><div class='add'>+ * Maintenance Interrupt (MI) management:</div><div class='add'>+ *</div><div class='add'>+ * Since the L2 guest runs the vgic in its full glory, MIs get delivered and</div><div class='add'>+ * used as a handover point between L2 and L1.</div><div class='add'>+ *</div><div class='add'>+ * - on delivery of a MI to L0 while L2 is running: make the L1 MI pending,</div><div class='add'>+ *   and let it rip. This will initiate a vcpu_put() on L2, and allow L1 to</div><div class='add'>+ *   run and process the MI.</div><div class='add'>+ *</div><div class='add'>+ * - L1 MI is a fully virtual interrupt, not linked to the host's MI. Its</div><div class='add'>+ *   state must be computed at each entry/exit of the guest, much like we do</div><div class='add'>+ *   it for the PMU interrupt.</div><div class='add'>+ *</div><div class='add'>+ * - because most of the ICH_*_EL2 registers live in the VNCR page, the</div><div class='add'>+ *   quality of emulation is poor: L1 can setup the vgic so that an MI would</div><div class='add'>+ *   immediately fire, and not observe anything until the next exit. Trying</div><div class='add'>+ *   to read ICH_MISR_EL2 would do the trick, for example.</div><div class='add'>+ *</div><div class='add'>+ * System register emulation:</div><div class='add'>+ *</div><div class='add'>+ * We get two classes of registers:</div><div class='add'>+ *</div><div class='add'>+ * - those backed by memory (LRs, APRs, HCR, VMCR): L1 can freely access</div><div class='add'>+ *   them, and L0 doesn't see a thing.</div><div class='add'>+ *</div><div class='add'>+ * - those that always trap (ELRSR, EISR, MISR): these are status registers</div><div class='add'>+ *   that are built on the fly based on the in-memory state.</div><div class='add'>+ *</div><div class='add'>+ * Only L1 can access the ICH_*_EL2 registers. A non-NV L2 obviously cannot,</div><div class='add'>+ * and a NV L2 would either access the VNCR page provided by L1 (memory</div><div class='add'>+ * based registers), or see the access redirected to L1 (registers that</div><div class='add'>+ * trap) thanks to NV being set by L1.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+bool vgic_state_is_nested(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 xmo;</div><div class='add'>+</div><div class='add'>+	if (is_nested_ctxt(vcpu)) {</div><div class='add'>+		xmo = __vcpu_sys_reg(vcpu, HCR_EL2) &amp; (HCR_IMO | HCR_FMO);</div><div class='add'>+		WARN_ONCE(xmo &amp;&amp; xmo != (HCR_IMO | HCR_FMO),</div><div class='add'>+			  "Separate virtual IRQ/FIQ settings not supported\n");</div><div class='add'>+</div><div class='add'>+		return !!xmo;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct shadow_if *get_shadow_if(void)</div><div class='add'>+{</div><div class='add'>+	return this_cpu_ptr(&amp;shadow_if);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lr_triggers_eoi(u64 lr)</div><div class='add'>+{</div><div class='add'>+	return !(lr &amp; (ICH_LR_STATE | ICH_LR_HW)) &amp;&amp; (lr &amp; ICH_LR_EOI);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vgic_compute_mi_state(struct kvm_vcpu *vcpu, struct mi_state *mi_state)</div><div class='add'>+{</div><div class='add'>+	u16 eisr = 0, elrsr = 0;</div><div class='add'>+	bool pend = false;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; kvm_vgic_global_state.nr_lr; i++) {</div><div class='add'>+		u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));</div><div class='add'>+</div><div class='add'>+		if (lr_triggers_eoi(lr))</div><div class='add'>+			eisr |= BIT(i);</div><div class='add'>+		if (!(lr &amp; ICH_LR_STATE))</div><div class='add'>+			elrsr |= BIT(i);</div><div class='add'>+		pend |= (lr &amp; ICH_LR_PENDING_BIT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mi_state-&gt;eisr	= eisr;</div><div class='add'>+	mi_state-&gt;elrsr	= elrsr;</div><div class='add'>+	mi_state-&gt;pend	= pend;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 vgic_v3_get_eisr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct mi_state mi_state;</div><div class='add'>+</div><div class='add'>+	vgic_compute_mi_state(vcpu, &amp;mi_state);</div><div class='add'>+	return mi_state.eisr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 vgic_v3_get_elrsr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct mi_state mi_state;</div><div class='add'>+</div><div class='add'>+	vgic_compute_mi_state(vcpu, &amp;mi_state);</div><div class='add'>+	return mi_state.elrsr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 vgic_v3_get_misr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct mi_state mi_state;</div><div class='add'>+	u64 reg = 0, hcr, vmcr;</div><div class='add'>+</div><div class='add'>+	hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);</div><div class='add'>+	vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2);</div><div class='add'>+</div><div class='add'>+	vgic_compute_mi_state(vcpu, &amp;mi_state);</div><div class='add'>+</div><div class='add'>+	if (mi_state.eisr)</div><div class='add'>+		reg |= ICH_MISR_EL2_EOI;</div><div class='add'>+</div><div class='add'>+	if (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) &amp; ICH_HCR_EL2_UIE) {</div><div class='add'>+		int used_lrs = kvm_vgic_global_state.nr_lr;</div><div class='add'>+</div><div class='add'>+		used_lrs -= hweight16(mi_state.elrsr);</div><div class='add'>+		reg |= (used_lrs &lt;= 1) ? ICH_MISR_EL2_U : 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_LRENPIE) &amp;&amp; FIELD_GET(ICH_HCR_EL2_EOIcount_MASK, hcr))</div><div class='add'>+		reg |= ICH_MISR_EL2_LRENP;</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_NPIE) &amp;&amp; !mi_state.pend)</div><div class='add'>+		reg |= ICH_MISR_EL2_NP;</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_VGrp0EIE) &amp;&amp; (vmcr &amp; ICH_VMCR_ENG0_MASK))</div><div class='add'>+		reg |= ICH_MISR_EL2_VGrp0E;</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_VGrp0DIE) &amp;&amp; !(vmcr &amp; ICH_VMCR_ENG0_MASK))</div><div class='add'>+		reg |= ICH_MISR_EL2_VGrp0D;</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_VGrp1EIE) &amp;&amp; (vmcr &amp; ICH_VMCR_ENG1_MASK))</div><div class='add'>+		reg |= ICH_MISR_EL2_VGrp1E;</div><div class='add'>+</div><div class='add'>+	if ((hcr &amp; ICH_HCR_EL2_VGrp1DIE) &amp;&amp; !(vmcr &amp; ICH_VMCR_ENG1_MASK))</div><div class='add'>+		reg |= ICH_MISR_EL2_VGrp1D;</div><div class='add'>+</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 translate_lr_pintid(struct kvm_vcpu *vcpu, u64 lr)</div><div class='add'>+{</div><div class='add'>+	struct vgic_irq *irq;</div><div class='add'>+</div><div class='add'>+	if (!(lr &amp; ICH_LR_HW))</div><div class='add'>+		return lr;</div><div class='add'>+</div><div class='add'>+	/* We have the HW bit set, check for validity of pINTID */</div><div class='add'>+	irq = vgic_get_vcpu_irq(vcpu, FIELD_GET(ICH_LR_PHYS_ID_MASK, lr));</div><div class='add'>+	/* If there was no real mapping, nuke the HW bit */</div><div class='add'>+	if (!irq || !irq-&gt;hw || irq-&gt;intid &gt; VGIC_MAX_SPI)</div><div class='add'>+		lr &amp;= ~ICH_LR_HW;</div><div class='add'>+</div><div class='add'>+	/* Translate the virtual mapping to the real one, even if invalid */</div><div class='add'>+	if (irq) {</div><div class='add'>+		lr &amp;= ~ICH_LR_PHYS_ID_MASK;</div><div class='add'>+		lr |= FIELD_PREP(ICH_LR_PHYS_ID_MASK, (u64)irq-&gt;hwintid);</div><div class='add'>+		vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return lr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For LRs which have HW bit set such as timer interrupts, we modify them to</div><div class='add'>+ * have the host hardware interrupt number instead of the virtual one programmed</div><div class='add'>+ * by the guest hypervisor.</div><div class='add'>+ */</div><div class='add'>+static void vgic_v3_create_shadow_lr(struct kvm_vcpu *vcpu,</div><div class='add'>+				     struct vgic_v3_cpu_if *s_cpu_if)</div><div class='add'>+{</div><div class='add'>+	struct shadow_if *shadow_if;</div><div class='add'>+</div><div class='add'>+	shadow_if = container_of(s_cpu_if, struct shadow_if, cpuif);</div><div class='add'>+	shadow_if-&gt;lr_map = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; kvm_vgic_global_state.nr_lr; i++) {</div><div class='add'>+		u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));</div><div class='add'>+</div><div class='add'>+		if (!(lr &amp; ICH_LR_STATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		lr = translate_lr_pintid(vcpu, lr);</div><div class='add'>+</div><div class='add'>+		s_cpu_if-&gt;vgic_lr[hweight16(shadow_if-&gt;lr_map)] = lr;</div><div class='add'>+		shadow_if-&gt;lr_map |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s_cpu_if-&gt;used_lrs = hweight16(shadow_if-&gt;lr_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_v3_sync_nested(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct shadow_if *shadow_if = get_shadow_if();</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(i, &amp;shadow_if-&gt;lr_map, kvm_vgic_global_state.nr_lr) {</div><div class='add'>+		u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));</div><div class='add'>+		struct vgic_irq *irq;</div><div class='add'>+</div><div class='add'>+		if (!(lr &amp; ICH_LR_HW) || !(lr &amp; ICH_LR_STATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If we had a HW lr programmed by the guest hypervisor, we</div><div class='add'>+		 * need to emulate the HW effect between the guest hypervisor</div><div class='add'>+		 * and the nested guest.</div><div class='add'>+		 */</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, FIELD_GET(ICH_LR_PHYS_ID_MASK, lr));</div><div class='add'>+		if (WARN_ON(!irq)) /* Shouldn't happen as we check on load */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		lr = __gic_v3_get_lr(lr_map_idx_to_shadow_idx(shadow_if, i));</div><div class='add'>+		if (!(lr &amp; ICH_LR_STATE))</div><div class='add'>+			irq-&gt;active = false;</div><div class='add'>+</div><div class='add'>+		vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vgic_v3_create_shadow_state(struct kvm_vcpu *vcpu,</div><div class='add'>+					struct vgic_v3_cpu_if *s_cpu_if)</div><div class='add'>+{</div><div class='add'>+	struct vgic_v3_cpu_if *host_if = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3;</div><div class='add'>+	u64 val = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're on a system with a broken vgic that requires</div><div class='add'>+	 * trapping, propagate the trapping requirements.</div><div class='add'>+	 *</div><div class='add'>+	 * Ah, the smell of rotten fruits...</div><div class='add'>+	 */</div><div class='add'>+	if (static_branch_unlikely(&amp;vgic_v3_cpuif_trap))</div><div class='add'>+		val = host_if-&gt;vgic_hcr &amp; (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 |</div><div class='add'>+					   ICH_HCR_EL2_TC | ICH_HCR_EL2_TDIR);</div><div class='add'>+	s_cpu_if-&gt;vgic_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) | val;</div><div class='add'>+	s_cpu_if-&gt;vgic_vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2);</div><div class='add'>+	s_cpu_if-&gt;vgic_sre = host_if-&gt;vgic_sre;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		s_cpu_if-&gt;vgic_ap0r[i] = __vcpu_sys_reg(vcpu, ICH_AP0RN(i));</div><div class='add'>+		s_cpu_if-&gt;vgic_ap1r[i] = __vcpu_sys_reg(vcpu, ICH_AP1RN(i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vgic_v3_create_shadow_lr(vcpu, s_cpu_if);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_v3_load_nested(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct shadow_if *shadow_if = get_shadow_if();</div><div class='add'>+	struct vgic_v3_cpu_if *cpu_if = &amp;shadow_if-&gt;cpuif;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!vgic_state_is_nested(vcpu));</div><div class='add'>+</div><div class='add'>+	vgic_v3_create_shadow_state(vcpu, cpu_if);</div><div class='add'>+</div><div class='add'>+	__vgic_v3_restore_vmcr_aprs(cpu_if);</div><div class='add'>+	__vgic_v3_activate_traps(cpu_if);</div><div class='add'>+</div><div class='add'>+	__vgic_v3_restore_state(cpu_if);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Propagate the number of used LRs for the benefit of the HYP</div><div class='add'>+	 * GICv3 emulation code. Yes, this is a pretty sorry hack.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;arch.vgic_cpu.vgic_v3.used_lrs = cpu_if-&gt;used_lrs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_v3_put_nested(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct shadow_if *shadow_if = get_shadow_if();</div><div class='add'>+	struct vgic_v3_cpu_if *s_cpu_if = &amp;shadow_if-&gt;cpuif;</div><div class='add'>+	u64 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	__vgic_v3_save_vmcr_aprs(s_cpu_if);</div><div class='add'>+	__vgic_v3_deactivate_traps(s_cpu_if);</div><div class='add'>+	__vgic_v3_save_state(s_cpu_if);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Translate the shadow state HW fields back to the virtual ones</div><div class='add'>+	 * before copying the shadow struct back to the nested one.</div><div class='add'>+	 */</div><div class='add'>+	val = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);</div><div class='add'>+	val &amp;= ~ICH_HCR_EL2_EOIcount_MASK;</div><div class='add'>+	val |= (s_cpu_if-&gt;vgic_hcr &amp; ICH_HCR_EL2_EOIcount_MASK);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, ICH_HCR_EL2, val);</div><div class='add'>+	__vcpu_assign_sys_reg(vcpu, ICH_VMCR_EL2, s_cpu_if-&gt;vgic_vmcr);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, ICH_AP0RN(i), s_cpu_if-&gt;vgic_ap0r[i]);</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, ICH_AP1RN(i), s_cpu_if-&gt;vgic_ap1r[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(i, &amp;shadow_if-&gt;lr_map, kvm_vgic_global_state.nr_lr) {</div><div class='add'>+		val = __vcpu_sys_reg(vcpu, ICH_LRN(i));</div><div class='add'>+</div><div class='add'>+		val &amp;= ~ICH_LR_STATE;</div><div class='add'>+		val |= s_cpu_if-&gt;vgic_lr[lr_map_idx_to_shadow_idx(shadow_if, i)] &amp; ICH_LR_STATE;</div><div class='add'>+</div><div class='add'>+		__vcpu_assign_sys_reg(vcpu, ICH_LRN(i), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.vgic_cpu.vgic_v3.used_lrs = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If we exit a L2 VM with a pending maintenance interrupt from the GIC,</div><div class='add'>+ * then we need to forward this to L1 so that it can re-sync the appropriate</div><div class='add'>+ * LRs and sample level triggered interrupts again.</div><div class='add'>+ */</div><div class='add'>+void vgic_v3_handle_nested_maint_irq(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool state = read_sysreg_s(SYS_ICH_MISR_EL2);</div><div class='add'>+</div><div class='add'>+	/* This will force a switch back to L1 if the level is high */</div><div class='add'>+	kvm_vgic_inject_irq(vcpu-&gt;kvm, vcpu,</div><div class='add'>+			    vcpu-&gt;kvm-&gt;arch.vgic.mi_intid, state, vcpu);</div><div class='add'>+</div><div class='add'>+	sysreg_clear_set_s(SYS_ICH_HCR_EL2, ICH_HCR_EL2_En, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool level;</div><div class='add'>+</div><div class='add'>+	level = (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) &amp; ICH_HCR_EL2_En) &amp;&amp; vgic_v3_get_misr(vcpu);</div><div class='add'>+	kvm_vgic_inject_irq(vcpu-&gt;kvm, vcpu,</div><div class='add'>+			    vcpu-&gt;kvm-&gt;arch.vgic.mi_intid, level, vcpu);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c<br/>index b217b256853c..f1c153106c56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v3.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v3.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-v3.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/kstrtox.h&gt;</div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;kvm/arm_vgic.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='hunk'>@@ -23,7 +24,7 @@ void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_v3_cpu_if *cpuif = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3;</div><div class='ctx'> </div><div class='del'>-	cpuif-&gt;vgic_hcr |= ICH_HCR_UIE;</div><div class='add'>+	cpuif-&gt;vgic_hcr |= ICH_HCR_EL2_UIE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool lr_signals_eoi_mi(u64 lr_val)</div><div class='hunk'>@@ -41,7 +42,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());</div><div class='ctx'> </div><div class='del'>-	cpuif-&gt;vgic_hcr &amp;= ~ICH_HCR_UIE;</div><div class='add'>+	cpuif-&gt;vgic_hcr &amp;= ~ICH_HCR_EL2_UIE;</div><div class='ctx'> </div><div class='ctx'> 	for (lr = 0; lr &lt; cpuif-&gt;used_lrs; lr++) {</div><div class='ctx'> 		u64 val = cpuif-&gt;vgic_lr[lr];</div><div class='hunk'>@@ -65,7 +66,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			kvm_notify_acked_irq(vcpu-&gt;kvm, 0,</div><div class='ctx'> 					     intid - VGIC_NR_PRIVATE_IRQS);</div><div class='ctx'> </div><div class='del'>-		irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid);</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid);</div><div class='ctx'> 		if (!irq)	/* An LPI could have been unmapped. */</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -283,15 +284,13 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vgic_v3-&gt;vgic_sre = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;arch.vgic_cpu.num_id_bits = (kvm_vgic_global_state.ich_vtr_el2 &amp;</div><div class='del'>-					   ICH_VTR_ID_BITS_MASK) &gt;&gt;</div><div class='del'>-					   ICH_VTR_ID_BITS_SHIFT;</div><div class='del'>-	vcpu-&gt;arch.vgic_cpu.num_pri_bits = ((kvm_vgic_global_state.ich_vtr_el2 &amp;</div><div class='del'>-					    ICH_VTR_PRI_BITS_MASK) &gt;&gt;</div><div class='del'>-					    ICH_VTR_PRI_BITS_SHIFT) + 1;</div><div class='add'>+	vcpu-&gt;arch.vgic_cpu.num_id_bits = FIELD_GET(ICH_VTR_EL2_IDbits,</div><div class='add'>+						    kvm_vgic_global_state.ich_vtr_el2);</div><div class='add'>+	vcpu-&gt;arch.vgic_cpu.num_pri_bits = FIELD_GET(ICH_VTR_EL2_PRIbits,</div><div class='add'>+						     kvm_vgic_global_state.ich_vtr_el2) + 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the show on the road... */</div><div class='del'>-	vgic_v3-&gt;vgic_hcr = ICH_HCR_EN;</div><div class='add'>+	vgic_v3-&gt;vgic_hcr = ICH_HCR_EL2_En;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -300,18 +299,19 @@ void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	/* Hide GICv3 sysreg if necessary */</div><div class='ctx'> 	if (!kvm_has_gicv3(vcpu-&gt;kvm)) {</div><div class='del'>-		vgic_v3-&gt;vgic_hcr |= ICH_HCR_TALL0 | ICH_HCR_TALL1 | ICH_HCR_TC;</div><div class='add'>+		vgic_v3-&gt;vgic_hcr |= (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 |</div><div class='add'>+				      ICH_HCR_EL2_TC);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (group0_trap)</div><div class='del'>-		vgic_v3-&gt;vgic_hcr |= ICH_HCR_TALL0;</div><div class='add'>+		vgic_v3-&gt;vgic_hcr |= ICH_HCR_EL2_TALL0;</div><div class='ctx'> 	if (group1_trap)</div><div class='del'>-		vgic_v3-&gt;vgic_hcr |= ICH_HCR_TALL1;</div><div class='add'>+		vgic_v3-&gt;vgic_hcr |= ICH_HCR_EL2_TALL1;</div><div class='ctx'> 	if (common_trap)</div><div class='del'>-		vgic_v3-&gt;vgic_hcr |= ICH_HCR_TC;</div><div class='add'>+		vgic_v3-&gt;vgic_hcr |= ICH_HCR_EL2_TC;</div><div class='ctx'> 	if (dir_trap)</div><div class='del'>-		vgic_v3-&gt;vgic_hcr |= ICH_HCR_TDIR;</div><div class='add'>+		vgic_v3-&gt;vgic_hcr |= ICH_HCR_EL2_TDIR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq)</div><div class='hunk'>@@ -588,6 +588,7 @@ int vgic_v3_map_resources(struct kvm *kvm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(vgic_v3_cpuif_trap);</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(vgic_v3_has_v2_compat);</div><div class='ctx'> </div><div class='ctx'> static int __init early_group0_trap_cfg(char *buf)</div><div class='ctx'> {</div><div class='hunk'>@@ -631,8 +632,8 @@ static const struct midr_range broken_seis[] = {</div><div class='ctx'> </div><div class='ctx'> static bool vgic_v3_broken_seis(void)</div><div class='ctx'> {</div><div class='del'>-	return ((kvm_vgic_global_state.ich_vtr_el2 &amp; ICH_VTR_SEIS_MASK) &amp;&amp;</div><div class='del'>-		is_midr_in_range_list(read_cpuid_id(), broken_seis));</div><div class='add'>+	return ((kvm_vgic_global_state.ich_vtr_el2 &amp; ICH_VTR_EL2_SEIS) &amp;&amp;</div><div class='add'>+		is_midr_in_range_list(broken_seis));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -663,9 +664,9 @@ int vgic_v3_probe(const struct gic_kvm_info *info)</div><div class='ctx'> 	if (info-&gt;has_v4) {</div><div class='ctx'> 		kvm_vgic_global_state.has_gicv4 = gicv4_enable;</div><div class='ctx'> 		kvm_vgic_global_state.has_gicv4_1 = info-&gt;has_v4_1 &amp;&amp; gicv4_enable;</div><div class='del'>-		kvm_info("GICv4%s support %sabled\n",</div><div class='add'>+		kvm_info("GICv4%s support %s\n",</div><div class='ctx'> 			 kvm_vgic_global_state.has_gicv4_1 ? ".1" : "",</div><div class='del'>-			 gicv4_enable ? "en" : "dis");</div><div class='add'>+			 str_enabled_disabled(gicv4_enable));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvm_vgic_global_state.vcpu_base = 0;</div><div class='hunk'>@@ -697,6 +698,13 @@ int vgic_v3_probe(const struct gic_kvm_info *info)</div><div class='ctx'> 	if (kvm_vgic_global_state.vcpu_base == 0)</div><div class='ctx'> 		kvm_info("disabling GICv2 emulation\n");</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Flip the static branch if the HW supports v2, even if we're</div><div class='add'>+	 * not using it (such as in protected mode).</div><div class='add'>+	 */</div><div class='add'>+	if (has_v2)</div><div class='add'>+		static_branch_enable(&amp;vgic_v3_has_v2_compat);</div><div class='add'>+</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_WORKAROUND_CAVIUM_30115)) {</div><div class='ctx'> 		group0_trap = true;</div><div class='ctx'> 		group1_trap = true;</div><div class='hunk'>@@ -705,10 +713,10 @@ int vgic_v3_probe(const struct gic_kvm_info *info)</div><div class='ctx'> 	if (vgic_v3_broken_seis()) {</div><div class='ctx'> 		kvm_info("GICv3 with broken locally generated SEI\n");</div><div class='ctx'> </div><div class='del'>-		kvm_vgic_global_state.ich_vtr_el2 &amp;= ~ICH_VTR_SEIS_MASK;</div><div class='add'>+		kvm_vgic_global_state.ich_vtr_el2 &amp;= ~ICH_VTR_EL2_SEIS;</div><div class='ctx'> 		group0_trap = true;</div><div class='ctx'> 		group1_trap = true;</div><div class='del'>-		if (ich_vtr_el2 &amp; ICH_VTR_TDS_MASK)</div><div class='add'>+		if (ich_vtr_el2 &amp; ICH_VTR_EL2_TDS)</div><div class='ctx'> 			dir_trap = true;</div><div class='ctx'> 		else</div><div class='ctx'> 			common_trap = true;</div><div class='hunk'>@@ -734,7 +742,14 @@ void vgic_v3_load(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_v3_cpu_if *cpu_if = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3;</div><div class='ctx'> </div><div class='del'>-	kvm_call_hyp(__vgic_v3_restore_vmcr_aprs, cpu_if);</div><div class='add'>+	/* If the vgic is nested, perform the full state loading */</div><div class='add'>+	if (vgic_state_is_nested(vcpu)) {</div><div class='add'>+		vgic_v3_load_nested(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(!is_protected_kvm_enabled()))</div><div class='add'>+		kvm_call_hyp(__vgic_v3_restore_vmcr_aprs, cpu_if);</div><div class='ctx'> </div><div class='ctx'> 	if (has_vhe())</div><div class='ctx'> 		__vgic_v3_activate_traps(cpu_if);</div><div class='hunk'>@@ -746,7 +761,13 @@ void vgic_v3_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_v3_cpu_if *cpu_if = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3;</div><div class='ctx'> </div><div class='del'>-	kvm_call_hyp(__vgic_v3_save_vmcr_aprs, cpu_if);</div><div class='add'>+	if (vgic_state_is_nested(vcpu)) {</div><div class='add'>+		vgic_v3_put_nested(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(!is_protected_kvm_enabled()))</div><div class='add'>+		kvm_call_hyp(__vgic_v3_save_vmcr_aprs, cpu_if);</div><div class='ctx'> 	WARN_ON(vgic_v4_put(vcpu));</div><div class='ctx'> </div><div class='ctx'> 	if (has_vhe())</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v4.c b/arch/arm64/kvm/vgic/vgic-v4.c<br/>index 74a67ad87f29..548aec9d5a72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v4.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic-v4.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v4.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-v4.c</a></div><div class='hunk'>@@ -123,7 +123,7 @@ static void vgic_v4_enable_vsgis(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * IRQ. The SGI code will do its magic.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; VGIC_NR_SGIS; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i);</div><div class='ctx'> 		struct irq_desc *desc;</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> 		int ret;</div><div class='hunk'>@@ -160,7 +160,7 @@ static void vgic_v4_disable_vsgis(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; VGIC_NR_SGIS; i++) {</div><div class='del'>-		struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, i);</div><div class='add'>+		struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i);</div><div class='ctx'> 		struct irq_desc *desc;</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> 		int ret;</div><div class='hunk'>@@ -336,14 +336,30 @@ void vgic_v4_teardown(struct kvm *kvm)</div><div class='ctx'> 	its_vm-&gt;vpes = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool vgic_v4_want_doorbell(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (vcpu_get_flag(vcpu, IN_WFI))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (likely(!vcpu_has_nv(vcpu)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GICv4 hardware is only ever used for the L1. Mark the vPE (i.e. the</div><div class='add'>+	 * L1 context) nonresident and request a doorbell to kick us out of the</div><div class='add'>+	 * L2 when an IRQ becomes pending.</div><div class='add'>+	 */</div><div class='add'>+	return vcpu_get_flag(vcpu, IN_NESTED_ERET);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int vgic_v4_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct its_vpe *vpe = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3.its_vpe;</div><div class='ctx'> </div><div class='del'>-	if (!vgic_supports_direct_msis(vcpu-&gt;kvm) || !vpe-&gt;resident)</div><div class='add'>+	if (!vgic_supports_direct_irqs(vcpu-&gt;kvm) || !vpe-&gt;resident)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return its_make_vpe_non_resident(vpe, !!vcpu_get_flag(vcpu, IN_WFI));</div><div class='add'>+	return its_make_vpe_non_resident(vpe, vgic_v4_want_doorbell(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int vgic_v4_load(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -351,7 +367,7 @@ int vgic_v4_load(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct its_vpe *vpe = &amp;vcpu-&gt;arch.vgic_cpu.vgic_v3.its_vpe;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!vgic_supports_direct_msis(vcpu-&gt;kvm) || vpe-&gt;resident)</div><div class='add'>+	if (!vgic_supports_direct_irqs(vcpu-&gt;kvm) || vpe-&gt;resident)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu_get_flag(vcpu, IN_WFI))</div><div class='hunk'>@@ -415,7 +431,7 @@ int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq,</div><div class='ctx'> 	struct vgic_irq *irq;</div><div class='ctx'> 	struct its_vlpi_map map;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!vgic_supports_direct_msis(kvm))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -428,17 +444,24 @@ int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq,</div><div class='ctx'> 	if (IS_ERR(its))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;its-&gt;its_lock);</div><div class='add'>+	guard(mutex)(&amp;its-&gt;its_lock);</div><div class='ctx'> </div><div class='del'>-	/* Perform the actual DevID/EventID -&gt; LPI translation. */</div><div class='del'>-	ret = vgic_its_resolve_lpi(kvm, its, irq_entry-&gt;msi.devid,</div><div class='del'>-				   irq_entry-&gt;msi.data, &amp;irq);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+	/*</div><div class='add'>+	 * Perform the actual DevID/EventID -&gt; LPI translation.</div><div class='add'>+	 *</div><div class='add'>+	 * Silently exit if translation fails as the guest (or userspace!) has</div><div class='add'>+	 * managed to do something stupid. Emulated LPI injection will still</div><div class='add'>+	 * work if the guest figures itself out at a later time.</div><div class='add'>+	 */</div><div class='add'>+	if (vgic_its_resolve_lpi(kvm, its, irq_entry-&gt;msi.devid,</div><div class='add'>+				 irq_entry-&gt;msi.data, &amp;irq))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Silently exit if the vLPI is already mapped */</div><div class='ctx'> 	if (irq-&gt;hw)</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_unlock_irq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Emit the mapping request. If it fails, the ITS probably</div><div class='hunk'>@@ -458,68 +481,72 @@ int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq,</div><div class='ctx'> </div><div class='ctx'> 	ret = its_map_vlpi(virq, &amp;map);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_unlock_irq;</div><div class='ctx'> </div><div class='ctx'> 	irq-&gt;hw		= true;</div><div class='ctx'> 	irq-&gt;host_irq	= virq;</div><div class='ctx'> 	atomic_inc(&amp;map.vpe-&gt;vlpi_count);</div><div class='ctx'> </div><div class='ctx'> 	/* Transfer pending state */</div><div class='del'>-	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='del'>-	if (irq-&gt;pending_latch) {</div><div class='del'>-		ret = irq_set_irqchip_state(irq-&gt;host_irq,</div><div class='del'>-					    IRQCHIP_STATE_PENDING,</div><div class='del'>-					    irq-&gt;pending_latch);</div><div class='del'>-		WARN_RATELIMIT(ret, "IRQ %d", irq-&gt;host_irq);</div><div class='add'>+	if (!irq-&gt;pending_latch)</div><div class='add'>+		goto out_unlock_irq;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Clear pending_latch and communicate this state</div><div class='del'>-		 * change via vgic_queue_irq_unlock.</div><div class='del'>-		 */</div><div class='del'>-		irq-&gt;pending_latch = false;</div><div class='del'>-		vgic_queue_irq_unlock(kvm, irq, flags);</div><div class='del'>-	} else {</div><div class='del'>-		raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='del'>-	}</div><div class='add'>+	ret = irq_set_irqchip_state(irq-&gt;host_irq, IRQCHIP_STATE_PENDING,</div><div class='add'>+				    irq-&gt;pending_latch);</div><div class='add'>+	WARN_RATELIMIT(ret, "IRQ %d", irq-&gt;host_irq);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear pending_latch and communicate this state</div><div class='add'>+	 * change via vgic_queue_irq_unlock.</div><div class='add'>+	 */</div><div class='add'>+	irq-&gt;pending_latch = false;</div><div class='add'>+	vgic_queue_irq_unlock(kvm, irq, flags);</div><div class='add'>+	return ret;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;its-&gt;its_lock);</div><div class='add'>+out_unlock_irq:</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int virq,</div><div class='del'>-				 struct kvm_kernel_irq_routing_entry *irq_entry)</div><div class='add'>+static struct vgic_irq *__vgic_host_irq_get_vlpi(struct kvm *kvm, int host_irq)</div><div class='ctx'> {</div><div class='del'>-	struct vgic_its *its;</div><div class='ctx'> 	struct vgic_irq *irq;</div><div class='del'>-	int ret;</div><div class='add'>+	unsigned long idx;</div><div class='ctx'> </div><div class='del'>-	if (!vgic_supports_direct_msis(kvm))</div><div class='del'>-		return 0;</div><div class='add'>+	guard(rcu)();</div><div class='add'>+	xa_for_each(&amp;kvm-&gt;arch.vgic.lpi_xa, idx, irq) {</div><div class='add'>+		if (!irq-&gt;hw || irq-&gt;host_irq != host_irq)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Get the ITS, and escape early on error (not a valid</div><div class='del'>-	 * doorbell for any of our vITSs).</div><div class='del'>-	 */</div><div class='del'>-	its = vgic_get_its(kvm, irq_entry);</div><div class='del'>-	if (IS_ERR(its))</div><div class='del'>-		return 0;</div><div class='add'>+		if (!vgic_try_get_irq_ref(irq))</div><div class='add'>+			return NULL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;its-&gt;its_lock);</div><div class='add'>+		return irq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = vgic_its_resolve_lpi(kvm, its, irq_entry-&gt;msi.devid,</div><div class='del'>-				   irq_entry-&gt;msi.data, &amp;irq);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int host_irq)</div><div class='add'>+{</div><div class='add'>+	struct vgic_irq *irq;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!vgic_supports_direct_msis(kvm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	irq = __vgic_host_irq_get_vlpi(kvm, host_irq);</div><div class='add'>+	if (!irq)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!(irq-&gt;hw &amp;&amp; irq-&gt;host_irq == virq));</div><div class='add'>+	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='add'>+	WARN_ON(irq-&gt;hw &amp;&amp; irq-&gt;host_irq != host_irq);</div><div class='ctx'> 	if (irq-&gt;hw) {</div><div class='ctx'> 		atomic_dec(&amp;irq-&gt;target_vcpu-&gt;arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count);</div><div class='ctx'> 		irq-&gt;hw = false;</div><div class='del'>-		ret = its_unmap_vlpi(virq);</div><div class='add'>+		its_unmap_vlpi(host_irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;its-&gt;its_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='add'>+	vgic_put_irq(kvm, irq);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v5.c b/arch/arm64/kvm/vgic/vgic-v5.c<br/>new file mode 100644<br/>index 000000000000..2d3811f4e117<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic-v5.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic-v5.c</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;kvm/arm_vgic.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/arm-vgic-info.h&gt;</div><div class='add'>+</div><div class='add'>+#include "vgic.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Probe for a vGICv5 compatible interrupt controller, returning 0 on success.</div><div class='add'>+ * Currently only supports GICv3-based VMs on a GICv5 host, and hence only</div><div class='add'>+ * registers a VGIC_V3 device.</div><div class='add'>+ */</div><div class='add'>+int vgic_v5_probe(const struct gic_kvm_info *info)</div><div class='add'>+{</div><div class='add'>+	u64 ich_vtr_el2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_GICV5_LEGACY))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	kvm_vgic_global_state.type = VGIC_V5;</div><div class='add'>+	kvm_vgic_global_state.has_gcie_v3_compat = true;</div><div class='add'>+</div><div class='add'>+	/* We only support v3 compat mode - use vGICv3 limits */</div><div class='add'>+	kvm_vgic_global_state.max_gic_vcpus = VGIC_V3_MAX_CPUS;</div><div class='add'>+</div><div class='add'>+	kvm_vgic_global_state.vcpu_base = 0;</div><div class='add'>+	kvm_vgic_global_state.vctrl_base = NULL;</div><div class='add'>+	kvm_vgic_global_state.can_emulate_gicv2 = false;</div><div class='add'>+	kvm_vgic_global_state.has_gicv4 = false;</div><div class='add'>+	kvm_vgic_global_state.has_gicv4_1 = false;</div><div class='add'>+</div><div class='add'>+	ich_vtr_el2 =  kvm_call_hyp_ret(__vgic_v3_get_gic_config);</div><div class='add'>+	kvm_vgic_global_state.ich_vtr_el2 = (u32)ich_vtr_el2;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The ListRegs field is 5 bits, but there is an architectural</div><div class='add'>+	 * maximum of 16 list registers. Just ignore bit 4...</div><div class='add'>+	 */</div><div class='add'>+	kvm_vgic_global_state.nr_lr = (ich_vtr_el2 &amp; 0xf) + 1;</div><div class='add'>+</div><div class='add'>+	ret = kvm_register_vgic_device(KVM_DEV_TYPE_ARM_VGIC_V3);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kvm_err("Cannot register GICv3-legacy KVM device.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static_branch_enable(&amp;kvm_vgic_global_state.gicv3_cpuif);</div><div class='add'>+	kvm_info("GCIE legacy system register CPU interface\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c<br/>index f50274fd5581..6dd5a10081e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic.c</a></div><div class='hunk'>@@ -28,8 +28,8 @@ struct vgic_global kvm_vgic_global_state __ro_after_init = {</div><div class='ctx'>  *     kvm-&gt;arch.config_lock (mutex)</div><div class='ctx'>  *       its-&gt;cmd_lock (mutex)</div><div class='ctx'>  *         its-&gt;its_lock (mutex)</div><div class='del'>- *           vgic_cpu-&gt;ap_list_lock		must be taken with IRQs disabled</div><div class='del'>- *             vgic_dist-&gt;lpi_xa.xa_lock	must be taken with IRQs disabled</div><div class='add'>+ *           vgic_dist-&gt;lpi_xa.xa_lock</div><div class='add'>+ *             vgic_cpu-&gt;ap_list_lock		must be taken with IRQs disabled</div><div class='ctx'>  *               vgic_irq-&gt;irq_lock		must be taken with IRQs disabled</div><div class='ctx'>  *</div><div class='ctx'>  * As the ap_list_lock might be taken from the timer interrupt handler,</div><div class='hunk'>@@ -71,7 +71,7 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='ctx'> 	irq = xa_load(&amp;dist-&gt;lpi_xa, intid);</div><div class='del'>-	if (!vgic_try_get_irq_kref(irq))</div><div class='add'>+	if (!vgic_try_get_irq_ref(irq))</div><div class='ctx'> 		irq = NULL;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_unlock();</div><div class='hunk'>@@ -84,17 +84,11 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)</div><div class='ctx'>  * struct vgic_irq. It also increases the refcount, so any caller is expected</div><div class='ctx'>  * to call vgic_put_irq() once it's finished with this IRQ.</div><div class='ctx'>  */</div><div class='del'>-struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,</div><div class='del'>-			      u32 intid)</div><div class='add'>+struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid)</div><div class='ctx'> {</div><div class='del'>-	/* SGIs and PPIs */</div><div class='del'>-	if (intid &lt;= VGIC_MAX_PRIVATE) {</div><div class='del'>-		intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1);</div><div class='del'>-		return &amp;vcpu-&gt;arch.vgic_cpu.private_irqs[intid];</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* SPIs */</div><div class='del'>-	if (intid &lt; (kvm-&gt;arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) {</div><div class='add'>+	if (intid &gt;= VGIC_NR_PRIVATE_IRQS &amp;&amp;</div><div class='add'>+	    intid &lt; (kvm-&gt;arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) {</div><div class='ctx'> 		intid = array_index_nospec(intid, kvm-&gt;arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS);</div><div class='ctx'> 		return &amp;kvm-&gt;arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -106,37 +100,80 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We can't do anything in here, because we lack the kvm pointer to</div><div class='del'>- * lock and remove the item from the lpi_list. So we keep this function</div><div class='del'>- * empty and use the return value of kref_put() to trigger the freeing.</div><div class='del'>- */</div><div class='del'>-static void vgic_irq_release(struct kref *ref)</div><div class='add'>+struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(!vcpu))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* SGIs and PPIs */</div><div class='add'>+	if (intid &lt; VGIC_NR_PRIVATE_IRQS) {</div><div class='add'>+		intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);</div><div class='add'>+		return &amp;vcpu-&gt;arch.vgic_cpu.private_irqs[intid];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vgic_get_irq(vcpu-&gt;kvm, intid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vgic_release_lpi_locked(struct vgic_dist *dist, struct vgic_irq *irq)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;dist-&gt;lpi_xa.xa_lock);</div><div class='add'>+	__xa_erase(&amp;dist-&gt;lpi_xa, irq-&gt;intid);</div><div class='add'>+	kfree_rcu(irq, rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __must_check bool __vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)</div><div class='ctx'> {</div><div class='add'>+	if (irq-&gt;intid &lt; VGIC_MIN_LPI)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return refcount_dec_and_test(&amp;irq-&gt;refcount);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __must_check bool vgic_put_irq_norelease(struct kvm *kvm, struct vgic_irq *irq)</div><div class='add'>+{</div><div class='add'>+	if (!__vgic_put_irq(kvm, irq))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	irq-&gt;pending_release = true;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_dist *dist = &amp;kvm-&gt;arch.vgic;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (irq-&gt;intid &lt; VGIC_MIN_LPI)</div><div class='del'>-		return;</div><div class='add'>+	if (irq-&gt;intid &gt;= VGIC_MIN_LPI)</div><div class='add'>+		might_lock(&amp;dist-&gt;lpi_xa.xa_lock);</div><div class='ctx'> </div><div class='del'>-	if (!kref_put(&amp;irq-&gt;refcount, vgic_irq_release))</div><div class='add'>+	if (!__vgic_put_irq(kvm, irq))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	xa_lock_irqsave(&amp;dist-&gt;lpi_xa, flags);</div><div class='del'>-	__xa_erase(&amp;dist-&gt;lpi_xa, irq-&gt;intid);</div><div class='del'>-	xa_unlock_irqrestore(&amp;dist-&gt;lpi_xa, flags);</div><div class='add'>+	xa_lock(&amp;dist-&gt;lpi_xa);</div><div class='add'>+	vgic_release_lpi_locked(dist, irq);</div><div class='add'>+	xa_unlock(&amp;dist-&gt;lpi_xa);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	kfree_rcu(irq, rcu);</div><div class='add'>+static void vgic_release_deleted_lpis(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct vgic_dist *dist = &amp;kvm-&gt;arch.vgic;</div><div class='add'>+	unsigned long intid;</div><div class='add'>+	struct vgic_irq *irq;</div><div class='add'>+</div><div class='add'>+	xa_lock(&amp;dist-&gt;lpi_xa);</div><div class='add'>+</div><div class='add'>+	xa_for_each(&amp;dist-&gt;lpi_xa, intid, irq) {</div><div class='add'>+		if (irq-&gt;pending_release)</div><div class='add'>+			vgic_release_lpi_locked(dist, irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xa_unlock(&amp;dist-&gt;lpi_xa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vgic_flush_pending_lpis(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_cpu *vgic_cpu = &amp;vcpu-&gt;arch.vgic_cpu;</div><div class='ctx'> 	struct vgic_irq *irq, *tmp;</div><div class='add'>+	bool deleted = false;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;vgic_cpu-&gt;ap_list_lock, flags);</div><div class='hunk'>@@ -147,11 +184,14 @@ void vgic_flush_pending_lpis(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			list_del(&amp;irq-&gt;ap_list);</div><div class='ctx'> 			irq-&gt;vcpu = NULL;</div><div class='ctx'> 			raw_spin_unlock(&amp;irq-&gt;irq_lock);</div><div class='del'>-			vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='add'>+			deleted |= vgic_put_irq_norelease(vcpu-&gt;kvm, irq);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;vgic_cpu-&gt;ap_list_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (deleted)</div><div class='add'>+		vgic_release_deleted_lpis(vcpu-&gt;kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending)</div><div class='hunk'>@@ -391,7 +431,7 @@ retry:</div><div class='ctx'> 	 * now in the ap_list. This is safe as the caller must already hold a</div><div class='ctx'> 	 * reference on the irq.</div><div class='ctx'> 	 */</div><div class='del'>-	vgic_get_irq_kref(irq);</div><div class='add'>+	vgic_get_irq_ref(irq);</div><div class='ctx'> 	list_add_tail(&amp;irq-&gt;ap_list, &amp;vcpu-&gt;arch.vgic_cpu.ap_list_head);</div><div class='ctx'> 	irq-&gt;vcpu = vcpu;</div><div class='ctx'> </div><div class='hunk'>@@ -437,7 +477,10 @@ int kvm_vgic_inject_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	trace_vgic_update_irq_pending(vcpu ? vcpu-&gt;vcpu_idx : 0, intid, level);</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(kvm, vcpu, intid);</div><div class='add'>+	if (intid &lt; VGIC_NR_PRIVATE_IRQS)</div><div class='add'>+		irq = vgic_get_vcpu_irq(vcpu, intid);</div><div class='add'>+	else</div><div class='add'>+		irq = vgic_get_irq(kvm, intid);</div><div class='ctx'> 	if (!irq)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -499,7 +542,7 @@ static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq)</div><div class='ctx'> int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,</div><div class='ctx'> 			  u32 vintid, struct irq_ops *ops)</div><div class='ctx'> {</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, vintid);</div><div class='add'>+	struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -524,7 +567,7 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,</div><div class='ctx'>  */</div><div class='ctx'> void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)</div><div class='ctx'> {</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, vintid);</div><div class='add'>+	struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!irq-&gt;hw)</div><div class='hunk'>@@ -547,7 +590,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)</div><div class='ctx'> 	if (!vgic_initialized(vcpu-&gt;kvm))</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, vintid);</div><div class='add'>+	irq = vgic_get_vcpu_irq(vcpu, vintid);</div><div class='ctx'> 	BUG_ON(!irq);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='hunk'>@@ -560,7 +603,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)</div><div class='ctx'> </div><div class='ctx'> int kvm_vgic_get_map(struct kvm_vcpu *vcpu, unsigned int vintid)</div><div class='ctx'> {</div><div class='del'>-	struct vgic_irq *irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, vintid);</div><div class='add'>+	struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -596,7 +639,7 @@ int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner)</div><div class='ctx'> 	if (!irq_is_ppi(intid) &amp;&amp; !vgic_valid_spi(vcpu-&gt;kvm, intid))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, intid);</div><div class='add'>+	irq = vgic_get_vcpu_irq(vcpu, intid);</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 	if (irq-&gt;owner &amp;&amp; irq-&gt;owner != owner)</div><div class='ctx'> 		ret = -EEXIST;</div><div class='hunk'>@@ -619,6 +662,7 @@ static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_cpu *vgic_cpu = &amp;vcpu-&gt;arch.vgic_cpu;</div><div class='ctx'> 	struct vgic_irq *irq, *tmp;</div><div class='add'>+	bool deleted_lpis = false;</div><div class='ctx'> </div><div class='ctx'> 	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());</div><div class='ctx'> </div><div class='hunk'>@@ -646,12 +690,12 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * This vgic_put_irq call matches the</div><div class='del'>-			 * vgic_get_irq_kref in vgic_queue_irq_unlock,</div><div class='add'>+			 * vgic_get_irq_ref in vgic_queue_irq_unlock,</div><div class='ctx'> 			 * where we added the LPI to the ap_list. As</div><div class='ctx'> 			 * we remove the irq from the list, we drop</div><div class='ctx'> 			 * also drop the refcount.</div><div class='ctx'> 			 */</div><div class='del'>-			vgic_put_irq(vcpu-&gt;kvm, irq);</div><div class='add'>+			deleted_lpis |= vgic_put_irq_norelease(vcpu-&gt;kvm, irq);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -714,6 +758,9 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_unlock(&amp;vgic_cpu-&gt;ap_list_lock);</div><div class='add'>+</div><div class='add'>+	if (unlikely(deleted_lpis))</div><div class='add'>+		vgic_release_deleted_lpis(vcpu-&gt;kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -807,7 +854,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 * the AP list has been sorted already.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (multi_sgi &amp;&amp; irq-&gt;priority &gt; prio) {</div><div class='del'>-			_raw_spin_unlock(&amp;irq-&gt;irq_lock);</div><div class='add'>+			raw_spin_unlock(&amp;irq-&gt;irq_lock);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -861,6 +908,15 @@ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int used_lrs;</div><div class='ctx'> </div><div class='add'>+	/* If nesting, emulate the HW effect from L0 to L1 */</div><div class='add'>+	if (vgic_state_is_nested(vcpu)) {</div><div class='add'>+		vgic_v3_sync_nested(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vcpu_has_nv(vcpu))</div><div class='add'>+		vgic_v3_nested_update_mi(vcpu);</div><div class='add'>+</div><div class='ctx'> 	/* An empty ap_list_head implies used_lrs == 0 */</div><div class='ctx'> 	if (list_empty(&amp;vcpu-&gt;arch.vgic_cpu.ap_list_head))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -890,6 +946,35 @@ static inline void vgic_restore_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='add'>+	 * If in a nested state, we must return early. Two possibilities:</div><div class='add'>+	 *</div><div class='add'>+	 * - If we have any pending IRQ for the guest and the guest</div><div class='add'>+	 *   expects IRQs to be handled in its virtual EL2 mode (the</div><div class='add'>+	 *   virtual IMO bit is set) and it is not already running in</div><div class='add'>+	 *   virtual EL2 mode, then we have to emulate an IRQ</div><div class='add'>+	 *   exception to virtual EL2.</div><div class='add'>+	 *</div><div class='add'>+	 *   We do that by placing a request to ourselves which will</div><div class='add'>+	 *   abort the entry procedure and inject the exception at the</div><div class='add'>+	 *   beginning of the run loop.</div><div class='add'>+	 *</div><div class='add'>+	 * - Otherwise, do exactly *NOTHING*. The guest state is</div><div class='add'>+	 *   already loaded, and we can carry on with running it.</div><div class='add'>+	 *</div><div class='add'>+	 * If we have NV, but are not in a nested state, compute the</div><div class='add'>+	 * maintenance interrupt state, as it may fire.</div><div class='add'>+	 */</div><div class='add'>+	if (vgic_state_is_nested(vcpu)) {</div><div class='add'>+		if (kvm_vgic_vcpu_pending_irq(vcpu))</div><div class='add'>+			kvm_make_request(KVM_REQ_GUEST_HYP_IRQ_PENDING, vcpu);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vcpu_has_nv(vcpu))</div><div class='add'>+		vgic_v3_nested_update_mi(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * If there are no virtual interrupts active or pending for this</div><div class='ctx'> 	 * VCPU, then there is no work to do and we can bail out without</div><div class='ctx'> 	 * taking any lock.  There is a potential race with someone injecting</div><div class='hunk'>@@ -902,7 +987,7 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * can be directly injected (GICv4).</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (list_empty(&amp;vcpu-&gt;arch.vgic_cpu.ap_list_head) &amp;&amp;</div><div class='del'>-	    !vgic_supports_direct_msis(vcpu-&gt;kvm))</div><div class='add'>+	    !vgic_supports_direct_irqs(vcpu-&gt;kvm))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());</div><div class='hunk'>@@ -916,7 +1001,7 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (can_access_vgic_from_kernel())</div><div class='ctx'> 		vgic_restore_state(vcpu);</div><div class='ctx'> </div><div class='del'>-	if (vgic_supports_direct_msis(vcpu-&gt;kvm))</div><div class='add'>+	if (vgic_supports_direct_irqs(vcpu-&gt;kvm))</div><div class='ctx'> 		vgic_v4_commit(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1008,7 +1093,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid)</div><div class='ctx'> 	if (!vgic_initialized(vcpu-&gt;kvm))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	irq = vgic_get_irq(vcpu-&gt;kvm, vcpu, vintid);</div><div class='add'>+	irq = vgic_get_vcpu_irq(vcpu, vintid);</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;irq-&gt;irq_lock, flags);</div><div class='ctx'> 	map_is_active = irq-&gt;hw &amp;&amp; irq-&gt;active;</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;irq-&gt;irq_lock, flags);</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic.h b/arch/arm64/kvm/vgic/vgic.h<br/>index f2486b4d9f95..ac5f9c5d2b98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vgic/vgic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vgic/vgic.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vgic/vgic.h</a></div><div class='hunk'>@@ -64,6 +64,24 @@</div><div class='ctx'> 				      KVM_REG_ARM_VGIC_SYSREG_CRM_MASK | \</div><div class='ctx'> 				      KVM_REG_ARM_VGIC_SYSREG_OP2_MASK)</div><div class='ctx'> </div><div class='add'>+#define KVM_ICC_SRE_EL2		(ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE |	\</div><div class='add'>+				 ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB)</div><div class='add'>+#define KVM_ICH_VTR_EL2_RES0	(ICH_VTR_EL2_DVIM 	|	\</div><div class='add'>+				 ICH_VTR_EL2_A3V	|	\</div><div class='add'>+				 ICH_VTR_EL2_IDbits)</div><div class='add'>+#define KVM_ICH_VTR_EL2_RES1	ICH_VTR_EL2_nV4</div><div class='add'>+</div><div class='add'>+static inline u64 kvm_get_guest_vtr_el2(void)</div><div class='add'>+{</div><div class='add'>+	u64 vtr;</div><div class='add'>+</div><div class='add'>+	vtr  = kvm_vgic_global_state.ich_vtr_el2;</div><div class='add'>+	vtr &amp;= ~KVM_ICH_VTR_EL2_RES0;</div><div class='add'>+	vtr |= KVM_ICH_VTR_EL2_RES1;</div><div class='add'>+</div><div class='add'>+	return vtr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * As per Documentation/virt/kvm/devices/arm-vgic-its.rst,</div><div class='ctx'>  * below macros are defined for ITS table entry encoding.</div><div class='hunk'>@@ -172,6 +190,36 @@ struct vgic_reg_attr {</div><div class='ctx'> 	gpa_t addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct its_device {</div><div class='add'>+	struct list_head dev_list;</div><div class='add'>+</div><div class='add'>+	/* the head for the list of ITTEs */</div><div class='add'>+	struct list_head itt_head;</div><div class='add'>+	u32 num_eventid_bits;</div><div class='add'>+	gpa_t itt_addr;</div><div class='add'>+	u32 device_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COLLECTION_NOT_MAPPED ((u32)~0)</div><div class='add'>+</div><div class='add'>+struct its_collection {</div><div class='add'>+	struct list_head coll_list;</div><div class='add'>+</div><div class='add'>+	u32 collection_id;</div><div class='add'>+	u32 target_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define its_is_collection_mapped(coll) ((coll) &amp;&amp; \</div><div class='add'>+				((coll)-&gt;target_addr != COLLECTION_NOT_MAPPED))</div><div class='add'>+</div><div class='add'>+struct its_ite {</div><div class='add'>+	struct list_head ite_list;</div><div class='add'>+</div><div class='add'>+	struct vgic_irq *irq;</div><div class='add'>+	struct its_collection *collection;</div><div class='add'>+	u32 event_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='ctx'> 		       struct vgic_reg_attr *reg_attr);</div><div class='ctx'> int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='hunk'>@@ -179,8 +227,8 @@ int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='ctx'> const struct vgic_register_region *</div><div class='ctx'> vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev,</div><div class='ctx'> 		     gpa_t addr, int len);</div><div class='del'>-struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,</div><div class='del'>-			      u32 intid);</div><div class='add'>+struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid);</div><div class='add'>+struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid);</div><div class='ctx'> void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq);</div><div class='ctx'> bool vgic_get_phys_line_level(struct vgic_irq *irq);</div><div class='ctx'> void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending);</div><div class='hunk'>@@ -219,7 +267,7 @@ void vgic_v2_put(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vgic_v2_save_state(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vgic_v2_restore_state(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='del'>-static inline bool vgic_try_get_irq_kref(struct vgic_irq *irq)</div><div class='add'>+static inline bool vgic_try_get_irq_ref(struct vgic_irq *irq)</div><div class='ctx'> {</div><div class='ctx'> 	if (!irq)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -227,12 +275,12 @@ static inline bool vgic_try_get_irq_kref(struct vgic_irq *irq)</div><div class='ctx'> 	if (irq-&gt;intid &lt; VGIC_MIN_LPI)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	return kref_get_unless_zero(&amp;irq-&gt;refcount);</div><div class='add'>+	return refcount_inc_not_zero(&amp;irq-&gt;refcount);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void vgic_get_irq_kref(struct vgic_irq *irq)</div><div class='add'>+static inline void vgic_get_irq_ref(struct vgic_irq *irq)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_ONCE(!vgic_try_get_irq_kref(irq));</div><div class='add'>+	WARN_ON_ONCE(!vgic_try_get_irq_ref(irq));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -267,6 +315,7 @@ int vgic_v3_redist_uaccess(struct kvm_vcpu *vcpu, bool is_write,</div><div class='ctx'> int vgic_v3_cpu_sysregs_uaccess(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				struct kvm_device_attr *attr, bool is_write);</div><div class='ctx'> int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr);</div><div class='add'>+const struct sys_reg_desc *vgic_v3_get_sysreg_table(unsigned int *sz);</div><div class='ctx'> int vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write,</div><div class='ctx'> 				    u32 intid, u32 *val);</div><div class='ctx'> int kvm_register_vgic_device(unsigned long type);</div><div class='hunk'>@@ -278,6 +327,8 @@ int vgic_init(struct kvm *kvm);</div><div class='ctx'> void vgic_debug_init(struct kvm *kvm);</div><div class='ctx'> void vgic_debug_destroy(struct kvm *kvm);</div><div class='ctx'> </div><div class='add'>+int vgic_v5_probe(const struct gic_kvm_info *info);</div><div class='add'>+</div><div class='ctx'> static inline int vgic_v3_max_apr_idx(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vgic_cpu *cpu_if = &amp;vcpu-&gt;arch.vgic_cpu;</div><div class='hunk'>@@ -339,7 +390,15 @@ void vgic_its_invalidate_all_caches(struct kvm *kvm);</div><div class='ctx'> int vgic_its_inv_lpi(struct kvm *kvm, struct vgic_irq *irq);</div><div class='ctx'> int vgic_its_invall(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+bool system_supports_direct_sgis(void);</div><div class='ctx'> bool vgic_supports_direct_msis(struct kvm *kvm);</div><div class='add'>+bool vgic_supports_direct_sgis(struct kvm *kvm);</div><div class='add'>+</div><div class='add'>+static inline bool vgic_supports_direct_irqs(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return vgic_supports_direct_msis(kvm) || vgic_supports_direct_sgis(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int vgic_v4_init(struct kvm *kvm);</div><div class='ctx'> void vgic_v4_teardown(struct kvm *kvm);</div><div class='ctx'> void vgic_v4_configure_vsgis(struct kvm *kvm);</div><div class='hunk'>@@ -353,4 +412,24 @@ static inline bool kvm_has_gicv3(struct kvm *kvm)</div><div class='ctx'> 	return kvm_has_feat(kvm, ID_AA64PFR0_EL1, GIC, IMP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void vgic_v3_sync_nested(struct kvm_vcpu *vcpu);</div><div class='add'>+void vgic_v3_load_nested(struct kvm_vcpu *vcpu);</div><div class='add'>+void vgic_v3_put_nested(struct kvm_vcpu *vcpu);</div><div class='add'>+void vgic_v3_handle_nested_maint_irq(struct kvm_vcpu *vcpu);</div><div class='add'>+void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+static inline bool vgic_is_v3_compat(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF) &amp;&amp;</div><div class='add'>+		kvm_vgic_global_state.has_gcie_v3_compat;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool vgic_is_v3(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_vgic_global_state.type == VGIC_V3 || vgic_is_v3_compat(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int vgic_its_debug_init(struct kvm_device *dev);</div><div class='add'>+void vgic_its_debug_destroy(struct kvm_device *dev);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/kvm/vmid.c b/arch/arm64/kvm/vmid.c<br/>index 806223b7022a..7fe8ba1a2851 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vmid.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/kvm/vmid.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/kvm/vmid.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/kvm/vmid.c</a></div><div class='hunk'>@@ -135,11 +135,10 @@ void kvm_arm_vmid_clear_active(void)</div><div class='ctx'> 	atomic64_set(this_cpu_ptr(&amp;active_vmids), VMID_ACTIVE_INVALID);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid)</div><div class='add'>+void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u64 vmid, old_active_vmid;</div><div class='del'>-	bool updated = false;</div><div class='ctx'> </div><div class='ctx'> 	vmid = atomic64_read(&amp;kvm_vmid-&gt;id);</div><div class='ctx'> </div><div class='hunk'>@@ -157,21 +156,17 @@ bool kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid)</div><div class='ctx'> 	if (old_active_vmid != 0 &amp;&amp; vmid_gen_match(vmid) &amp;&amp;</div><div class='ctx'> 	    0 != atomic64_cmpxchg_relaxed(this_cpu_ptr(&amp;active_vmids),</div><div class='ctx'> 					  old_active_vmid, vmid))</div><div class='del'>-		return false;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;cpu_vmid_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Check that our VMID belongs to the current generation. */</div><div class='ctx'> 	vmid = atomic64_read(&amp;kvm_vmid-&gt;id);</div><div class='del'>-	if (!vmid_gen_match(vmid)) {</div><div class='add'>+	if (!vmid_gen_match(vmid))</div><div class='ctx'> 		vmid = new_vmid(kvm_vmid);</div><div class='del'>-		updated = true;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	atomic64_set(this_cpu_ptr(&amp;active_vmids), vmid);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;cpu_vmid_lock, flags);</div><div class='del'>-</div><div class='del'>-	return updated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/lib/.gitignore b/arch/arm64/lib/.gitignore<br/>new file mode 100644<br/>index 000000000000..647d7a922e68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/.gitignore?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+# This now-removed directory used to contain generated files.</div><div class='add'>+/crypto/</div><div class='head'>diff --git a/arch/arm64/lib/Makefile b/arch/arm64/lib/Makefile<br/>index 13e6a2829116..633e5223d944 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/Makefile</a></div><div class='hunk'>@@ -13,8 +13,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> lib-$(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) += uaccess_flushcache.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRC32) += crc32.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARM64_MTE) += mte.o</div><div class='head'>diff --git a/arch/arm64/lib/clear_page.S b/arch/arm64/lib/clear_page.S<br/>index ebde40e7fa2b..bd6f7d5eb6eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/clear_page.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/clear_page.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/clear_page.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/clear_page.S</a></div><div class='hunk'>@@ -15,6 +15,19 @@</div><div class='ctx'>  *	x0 - dest</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(__pi_clear_page)</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+	.arch_extension mops</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	.Lno_mops</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+</div><div class='add'>+	mov	x1, #PAGE_SIZE</div><div class='add'>+	setpn	[x0]!, x1!, xzr</div><div class='add'>+	setmn	[x0]!, x1!, xzr</div><div class='add'>+	seten	[x0]!, x1!, xzr</div><div class='add'>+	ret</div><div class='add'>+.Lno_mops:</div><div class='add'>+#endif</div><div class='ctx'> 	mrs	x1, dczid_el0</div><div class='ctx'> 	tbnz	x1, #4, 2f	/* Branch if DC ZVA is prohibited */</div><div class='ctx'> 	and	w1, w1, #0xf</div><div class='head'>diff --git a/arch/arm64/lib/clear_user.S b/arch/arm64/lib/clear_user.S<br/>index a5a5f5b97b17..de9a303b6ad0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/clear_user.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/clear_user.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/clear_user.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/clear_user.S</a></div><div class='hunk'>@@ -17,14 +17,27 @@</div><div class='ctx'>  * Alignment fixed up by hardware.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	.p2align 4</div><div class='del'>-	// Alignment is for the loop, but since the prologue (including BTI)</div><div class='del'>-	// is also 16 bytes we can keep any padding outside the function</div><div class='ctx'> SYM_FUNC_START(__arch_clear_user)</div><div class='ctx'> 	add	x2, x0, x1</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+	.arch_extension mops</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	.Lno_mops</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+</div><div class='add'>+USER(9f, setpt	[x0]!, x1!, xzr)</div><div class='add'>+USER(6f, setmt	[x0]!, x1!, xzr)</div><div class='add'>+USER(6f, setet	[x0]!, x1!, xzr)</div><div class='add'>+	mov	x0, #0</div><div class='add'>+	ret</div><div class='add'>+.Lno_mops:</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	subs	x1, x1, #8</div><div class='ctx'> 	b.mi	2f</div><div class='del'>-1:</div><div class='add'>+</div><div class='add'>+1:	.p2align 4</div><div class='ctx'> USER(9f, sttr	xzr, [x0])</div><div class='ctx'> 	add	x0, x0, #8</div><div class='ctx'> 	subs	x1, x1, #8</div><div class='hunk'>@@ -47,6 +60,10 @@ USER(7f, sttrb	wzr, [x2, #-1])</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='ctx'> 	// Exception fixups</div><div class='add'>+6:	b.cs	9f</div><div class='add'>+	// Registers are in Option A format</div><div class='add'>+	add	x0, x0, x1</div><div class='add'>+	b	9f</div><div class='ctx'> 7:	sub	x0, x2, #5	// Adjust for faulting on the final byte...</div><div class='ctx'> 8:	add	x0, x0, #4	// ...or the second word of the 4-7 byte case</div><div class='ctx'> 9:	sub	x0, x2, x0</div><div class='head'>diff --git a/arch/arm64/lib/copy_from_user.S b/arch/arm64/lib/copy_from_user.S<br/>index 34e317907524..400057d607ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_from_user.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_from_user.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_from_user.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/copy_from_user.S</a></div><div class='hunk'>@@ -52,6 +52,13 @@</div><div class='ctx'> 	stp \reg1, \reg2, [\ptr], \val</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro cpy1 dst, src, count</div><div class='add'>+	.arch_extension mops</div><div class='add'>+	USER_CPY(9997f, 0, cpyfprt [\dst]!, [\src]!, \count!)</div><div class='add'>+	USER_CPY(9996f, 0, cpyfmrt [\dst]!, [\src]!, \count!)</div><div class='add'>+	USER_CPY(9996f, 0, cpyfert [\dst]!, [\src]!, \count!)</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> end	.req	x5</div><div class='ctx'> srcin	.req	x15</div><div class='ctx'> SYM_FUNC_START(__arch_copy_from_user)</div><div class='hunk'>@@ -62,6 +69,9 @@ SYM_FUNC_START(__arch_copy_from_user)</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='ctx'> 	// Exception fixups</div><div class='add'>+9996:	b.cs	9997f</div><div class='add'>+	// Registers are in Option A format</div><div class='add'>+	add	dst, dst, count</div><div class='ctx'> 9997:	cmp	dst, dstin</div><div class='ctx'> 	b.ne	9998f</div><div class='ctx'> 	// Before being absolutely sure we couldn't copy anything, try harder</div><div class='head'>diff --git a/arch/arm64/lib/copy_page.S b/arch/arm64/lib/copy_page.S<br/>index 6a56d7cf309d..e6374e7e5511 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_page.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_page.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_page.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/copy_page.S</a></div><div class='hunk'>@@ -18,6 +18,19 @@</div><div class='ctx'>  *	x1 - src</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(__pi_copy_page)</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+	.arch_extension mops</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	.Lno_mops</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+</div><div class='add'>+	mov	x2, #PAGE_SIZE</div><div class='add'>+	cpypwn	[x0]!, [x1]!, x2!</div><div class='add'>+	cpymwn	[x0]!, [x1]!, x2!</div><div class='add'>+	cpyewn	[x0]!, [x1]!, x2!</div><div class='add'>+	ret</div><div class='add'>+.Lno_mops:</div><div class='add'>+#endif</div><div class='ctx'> 	ldp	x2, x3, [x1]</div><div class='ctx'> 	ldp	x4, x5, [x1, #16]</div><div class='ctx'> 	ldp	x6, x7, [x1, #32]</div><div class='head'>diff --git a/arch/arm64/lib/copy_template.S b/arch/arm64/lib/copy_template.S<br/>index 488df234c49a..7f2f5a0e2fb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_template.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_template.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_template.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/copy_template.S</a></div><div class='hunk'>@@ -40,6 +40,16 @@ D_l	.req	x13</div><div class='ctx'> D_h	.req	x14</div><div class='ctx'> </div><div class='ctx'> 	mov	dst, dstin</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	.Lno_mops</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+	cpy1	dst, src, count</div><div class='add'>+	b	.Lexitfunc</div><div class='add'>+.Lno_mops:</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	cmp	count, #16</div><div class='ctx'> 	/*When memory length is less than 16, the accessed are not aligned.*/</div><div class='ctx'> 	b.lo	.Ltiny15</div><div class='head'>diff --git a/arch/arm64/lib/copy_to_user.S b/arch/arm64/lib/copy_to_user.S<br/>index 802231772608..819f2e3fc7a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_to_user.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/copy_to_user.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/copy_to_user.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/copy_to_user.S</a></div><div class='hunk'>@@ -51,6 +51,13 @@</div><div class='ctx'> 	user_stp 9997f, \reg1, \reg2, \ptr, \val</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro cpy1 dst, src, count</div><div class='add'>+	.arch_extension mops</div><div class='add'>+	USER_CPY(9997f, 1, cpyfpwt [\dst]!, [\src]!, \count!)</div><div class='add'>+	USER_CPY(9996f, 1, cpyfmwt [\dst]!, [\src]!, \count!)</div><div class='add'>+	USER_CPY(9996f, 1, cpyfewt [\dst]!, [\src]!, \count!)</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> end	.req	x5</div><div class='ctx'> srcin	.req	x15</div><div class='ctx'> SYM_FUNC_START(__arch_copy_to_user)</div><div class='hunk'>@@ -61,6 +68,9 @@ SYM_FUNC_START(__arch_copy_to_user)</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='ctx'> 	// Exception fixups</div><div class='add'>+9996:	b.cs	9997f</div><div class='add'>+	// Registers are in Option A format</div><div class='add'>+	add	dst, dst, count</div><div class='ctx'> 9997:	cmp	dst, dstin</div><div class='ctx'> 	b.ne	9998f</div><div class='ctx'> 	// Before being absolutely sure we couldn't copy anything, try harder</div><div class='head'>diff --git a/arch/arm64/lib/crc32.S b/arch/arm64/lib/crc32.S<br/>deleted file mode 100644<br/>index 8340dccff46f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/crc32.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/crc32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,160 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * Accelerated CRC32(C) using AArch64 CRC instructions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 - 2018 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/alternative.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-	.arch		armv8-a+crc</div><div class='del'>-</div><div class='del'>-	.macro		byteorder, reg, be</div><div class='del'>-	.if		\be</div><div class='del'>-CPU_LE( rev		\reg, \reg	)</div><div class='del'>-	.else</div><div class='del'>-CPU_BE( rev		\reg, \reg	)</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		byteorder16, reg, be</div><div class='del'>-	.if		\be</div><div class='del'>-CPU_LE( rev16		\reg, \reg	)</div><div class='del'>-	.else</div><div class='del'>-CPU_BE( rev16		\reg, \reg	)</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		bitorder, reg, be</div><div class='del'>-	.if		\be</div><div class='del'>-	rbit		\reg, \reg</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		bitorder16, reg, be</div><div class='del'>-	.if		\be</div><div class='del'>-	rbit		\reg, \reg</div><div class='del'>-	lsr		\reg, \reg, #16</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		bitorder8, reg, be</div><div class='del'>-	.if		\be</div><div class='del'>-	rbit		\reg, \reg</div><div class='del'>-	lsr		\reg, \reg, #24</div><div class='del'>-	.endif</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.macro		__crc32, c, be=0</div><div class='del'>-	bitorder	w0, \be</div><div class='del'>-	cmp		x2, #16</div><div class='del'>-	b.lt		8f			// less than 16 bytes</div><div class='del'>-</div><div class='del'>-	and		x7, x2, #0x1f</div><div class='del'>-	and		x2, x2, #~0x1f</div><div class='del'>-	cbz		x7, 32f			// multiple of 32 bytes</div><div class='del'>-</div><div class='del'>-	and		x8, x7, #0xf</div><div class='del'>-	ldp		x3, x4, [x1]</div><div class='del'>-	add		x8, x8, x1</div><div class='del'>-	add		x1, x1, x7</div><div class='del'>-	ldp		x5, x6, [x8]</div><div class='del'>-	byteorder	x3, \be</div><div class='del'>-	byteorder	x4, \be</div><div class='del'>-	byteorder	x5, \be</div><div class='del'>-	byteorder	x6, \be</div><div class='del'>-	bitorder	x3, \be</div><div class='del'>-	bitorder	x4, \be</div><div class='del'>-	bitorder	x5, \be</div><div class='del'>-	bitorder	x6, \be</div><div class='del'>-</div><div class='del'>-	tst		x7, #8</div><div class='del'>-	crc32\c\()x	w8, w0, x3</div><div class='del'>-	csel		x3, x3, x4, eq</div><div class='del'>-	csel		w0, w0, w8, eq</div><div class='del'>-	tst		x7, #4</div><div class='del'>-	lsr		x4, x3, #32</div><div class='del'>-	crc32\c\()w	w8, w0, w3</div><div class='del'>-	csel		x3, x3, x4, eq</div><div class='del'>-	csel		w0, w0, w8, eq</div><div class='del'>-	tst		x7, #2</div><div class='del'>-	lsr		w4, w3, #16</div><div class='del'>-	crc32\c\()h	w8, w0, w3</div><div class='del'>-	csel		w3, w3, w4, eq</div><div class='del'>-	csel		w0, w0, w8, eq</div><div class='del'>-	tst		x7, #1</div><div class='del'>-	crc32\c\()b	w8, w0, w3</div><div class='del'>-	csel		w0, w0, w8, eq</div><div class='del'>-	tst		x7, #16</div><div class='del'>-	crc32\c\()x	w8, w0, x5</div><div class='del'>-	crc32\c\()x	w8, w8, x6</div><div class='del'>-	csel		w0, w0, w8, eq</div><div class='del'>-	cbz		x2, 0f</div><div class='del'>-</div><div class='del'>-32:	ldp		x3, x4, [x1], #32</div><div class='del'>-	sub		x2, x2, #32</div><div class='del'>-	ldp		x5, x6, [x1, #-16]</div><div class='del'>-	byteorder	x3, \be</div><div class='del'>-	byteorder	x4, \be</div><div class='del'>-	byteorder	x5, \be</div><div class='del'>-	byteorder	x6, \be</div><div class='del'>-	bitorder	x3, \be</div><div class='del'>-	bitorder	x4, \be</div><div class='del'>-	bitorder	x5, \be</div><div class='del'>-	bitorder	x6, \be</div><div class='del'>-	crc32\c\()x	w0, w0, x3</div><div class='del'>-	crc32\c\()x	w0, w0, x4</div><div class='del'>-	crc32\c\()x	w0, w0, x5</div><div class='del'>-	crc32\c\()x	w0, w0, x6</div><div class='del'>-	cbnz		x2, 32b</div><div class='del'>-0:	bitorder	w0, \be</div><div class='del'>-	ret</div><div class='del'>-</div><div class='del'>-8:	tbz		x2, #3, 4f</div><div class='del'>-	ldr		x3, [x1], #8</div><div class='del'>-	byteorder	x3, \be</div><div class='del'>-	bitorder	x3, \be</div><div class='del'>-	crc32\c\()x	w0, w0, x3</div><div class='del'>-4:	tbz		x2, #2, 2f</div><div class='del'>-	ldr		w3, [x1], #4</div><div class='del'>-	byteorder	w3, \be</div><div class='del'>-	bitorder	w3, \be</div><div class='del'>-	crc32\c\()w	w0, w0, w3</div><div class='del'>-2:	tbz		x2, #1, 1f</div><div class='del'>-	ldrh		w3, [x1], #2</div><div class='del'>-	byteorder16	w3, \be</div><div class='del'>-	bitorder16	w3, \be</div><div class='del'>-	crc32\c\()h	w0, w0, w3</div><div class='del'>-1:	tbz		x2, #0, 0f</div><div class='del'>-	ldrb		w3, [x1]</div><div class='del'>-	bitorder8	w3, \be</div><div class='del'>-	crc32\c\()b	w0, w0, w3</div><div class='del'>-0:	bitorder	w0, \be</div><div class='del'>-	ret</div><div class='del'>-	.endm</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-SYM_FUNC_START(crc32_le)</div><div class='del'>-alternative_if_not ARM64_HAS_CRC32</div><div class='del'>-	b		crc32_le_base</div><div class='del'>-alternative_else_nop_endif</div><div class='del'>-	__crc32</div><div class='del'>-SYM_FUNC_END(crc32_le)</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-SYM_FUNC_START(__crc32c_le)</div><div class='del'>-alternative_if_not ARM64_HAS_CRC32</div><div class='del'>-	b		__crc32c_le_base</div><div class='del'>-alternative_else_nop_endif</div><div class='del'>-	__crc32		c</div><div class='del'>-SYM_FUNC_END(__crc32c_le)</div><div class='del'>-</div><div class='del'>-	.align		5</div><div class='del'>-SYM_FUNC_START(crc32_be)</div><div class='del'>-alternative_if_not ARM64_HAS_CRC32</div><div class='del'>-	b		crc32_be_base</div><div class='del'>-alternative_else_nop_endif</div><div class='del'>-	__crc32		be=1</div><div class='del'>-SYM_FUNC_END(crc32_be)</div><div class='head'>diff --git a/arch/arm64/lib/insn.c b/arch/arm64/lib/insn.c<br/>index b008a9b46a7f..4e298baddc2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/insn.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/insn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/insn.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/insn.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2014-2016 Zi Shen Lim &lt;zlim.lnx@gmail.com&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='hunk'>@@ -540,6 +541,35 @@ u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,</div><div class='ctx'> 					     offset &gt;&gt; shift);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 aarch64_insn_gen_load_acq_store_rel(enum aarch64_insn_register reg,</div><div class='add'>+					enum aarch64_insn_register base,</div><div class='add'>+					enum aarch64_insn_size_type size,</div><div class='add'>+					enum aarch64_insn_ldst_type type)</div><div class='add'>+{</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case AARCH64_INSN_LDST_LOAD_ACQ:</div><div class='add'>+		insn = aarch64_insn_get_load_acq_value();</div><div class='add'>+		break;</div><div class='add'>+	case AARCH64_INSN_LDST_STORE_REL:</div><div class='add'>+		insn = aarch64_insn_get_store_rel_value();</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("%s: unknown load-acquire/store-release encoding %d\n",</div><div class='add'>+		       __func__, type);</div><div class='add'>+		return AARCH64_BREAK_FAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	insn = aarch64_insn_encode_ldst_size(size, insn);</div><div class='add'>+</div><div class='add'>+	insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn,</div><div class='add'>+					    reg);</div><div class='add'>+</div><div class='add'>+	return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn,</div><div class='add'>+					    base);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,</div><div class='ctx'> 				   enum aarch64_insn_register base,</div><div class='ctx'> 				   enum aarch64_insn_register state,</div><div class='hunk'>@@ -1471,43 +1501,41 @@ u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,</div><div class='ctx'> 	return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='add'>+static u32 __get_barrier_crm_val(enum aarch64_insn_mb_type type)</div><div class='ctx'> {</div><div class='del'>-	u32 opt;</div><div class='del'>-	u32 insn;</div><div class='del'>-</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case AARCH64_INSN_MB_SY:</div><div class='del'>-		opt = 0xf;</div><div class='del'>-		break;</div><div class='add'>+		return 0xf;</div><div class='ctx'> 	case AARCH64_INSN_MB_ST:</div><div class='del'>-		opt = 0xe;</div><div class='del'>-		break;</div><div class='add'>+		return 0xe;</div><div class='ctx'> 	case AARCH64_INSN_MB_LD:</div><div class='del'>-		opt = 0xd;</div><div class='del'>-		break;</div><div class='add'>+		return 0xd;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISH:</div><div class='del'>-		opt = 0xb;</div><div class='del'>-		break;</div><div class='add'>+		return 0xb;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISHST:</div><div class='del'>-		opt = 0xa;</div><div class='del'>-		break;</div><div class='add'>+		return 0xa;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISHLD:</div><div class='del'>-		opt = 0x9;</div><div class='del'>-		break;</div><div class='add'>+		return 0x9;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSH:</div><div class='del'>-		opt = 0x7;</div><div class='del'>-		break;</div><div class='add'>+		return 0x7;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSHST:</div><div class='del'>-		opt = 0x6;</div><div class='del'>-		break;</div><div class='add'>+		return 0x6;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSHLD:</div><div class='del'>-		opt = 0x5;</div><div class='del'>-		break;</div><div class='add'>+		return 0x5;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("%s: unknown dmb type %d\n", __func__, type);</div><div class='add'>+		pr_err("%s: unknown barrier type %d\n", __func__, type);</div><div class='ctx'> 		return AARCH64_BREAK_FAULT;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='add'>+{</div><div class='add'>+	u32 opt;</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	opt = __get_barrier_crm_val(type);</div><div class='add'>+	if (opt == AARCH64_BREAK_FAULT)</div><div class='add'>+		return AARCH64_BREAK_FAULT;</div><div class='ctx'> </div><div class='ctx'> 	insn = aarch64_insn_get_dmb_value();</div><div class='ctx'> 	insn &amp;= ~GENMASK(11, 8);</div><div class='hunk'>@@ -1516,6 +1544,21 @@ u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='ctx'> 	return insn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type)</div><div class='add'>+{</div><div class='add'>+	u32 opt, insn;</div><div class='add'>+</div><div class='add'>+	opt = __get_barrier_crm_val(type);</div><div class='add'>+	if (opt == AARCH64_BREAK_FAULT)</div><div class='add'>+		return AARCH64_BREAK_FAULT;</div><div class='add'>+</div><div class='add'>+	insn = aarch64_insn_get_dsb_base_value();</div><div class='add'>+	insn &amp;= ~GENMASK(11, 8);</div><div class='add'>+	insn |= (opt &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	return insn;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='ctx'> 			 enum aarch64_insn_system_register sysreg)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/lib/memcpy.S b/arch/arm64/lib/memcpy.S<br/>index 4ab48d49c451..9b99106fb95f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/memcpy.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/memcpy.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/memcpy.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/memcpy.S</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'>    The loop tail is handled by always copying 64 bytes from the end.</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-SYM_FUNC_START(__pi_memcpy)</div><div class='add'>+SYM_FUNC_START_LOCAL(__pi_memcpy_generic)</div><div class='ctx'> 	add	srcend, src, count</div><div class='ctx'> 	add	dstend, dstin, count</div><div class='ctx'> 	cmp	count, 128</div><div class='hunk'>@@ -238,7 +238,24 @@ L(copy64_from_start):</div><div class='ctx'> 	stp	B_l, B_h, [dstin, 16]</div><div class='ctx'> 	stp	C_l, C_h, [dstin]</div><div class='ctx'> 	ret</div><div class='add'>+SYM_FUNC_END(__pi_memcpy_generic)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+	.arch_extension mops</div><div class='add'>+SYM_FUNC_START(__pi_memcpy)</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	__pi_memcpy_generic</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+</div><div class='add'>+	mov	dst, dstin</div><div class='add'>+	cpyp	[dst]!, [src]!, count!</div><div class='add'>+	cpym	[dst]!, [src]!, count!</div><div class='add'>+	cpye	[dst]!, [src]!, count!</div><div class='add'>+	ret</div><div class='ctx'> SYM_FUNC_END(__pi_memcpy)</div><div class='add'>+#else</div><div class='add'>+SYM_FUNC_ALIAS(__pi_memcpy, __pi_memcpy_generic)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_ALIAS(__memcpy, __pi_memcpy)</div><div class='ctx'> EXPORT_SYMBOL(__memcpy)</div><div class='head'>diff --git a/arch/arm64/lib/memset.S b/arch/arm64/lib/memset.S<br/>index a5aebe82ad73..97157da65ec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/memset.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/memset.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/memset.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/memset.S</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> dstin		.req	x0</div><div class='add'>+val_x		.req	x1</div><div class='ctx'> val		.req	w1</div><div class='ctx'> count		.req	x2</div><div class='ctx'> tmp1		.req	x3</div><div class='hunk'>@@ -42,7 +43,7 @@ dst		.req	x8</div><div class='ctx'> tmp3w		.req	w9</div><div class='ctx'> tmp3		.req	x9</div><div class='ctx'> </div><div class='del'>-SYM_FUNC_START(__pi_memset)</div><div class='add'>+SYM_FUNC_START_LOCAL(__pi_memset_generic)</div><div class='ctx'> 	mov	dst, dstin	/* Preserve return value.  */</div><div class='ctx'> 	and	A_lw, val, #255</div><div class='ctx'> 	orr	A_lw, A_lw, A_lw, lsl #8</div><div class='hunk'>@@ -201,7 +202,24 @@ SYM_FUNC_START(__pi_memset)</div><div class='ctx'> 	ands	count, count, zva_bits_x</div><div class='ctx'> 	b.ne	.Ltail_maybe_long</div><div class='ctx'> 	ret</div><div class='add'>+SYM_FUNC_END(__pi_memset_generic)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AS_HAS_MOPS</div><div class='add'>+	.arch_extension mops</div><div class='add'>+SYM_FUNC_START(__pi_memset)</div><div class='add'>+alternative_if_not ARM64_HAS_MOPS</div><div class='add'>+	b	__pi_memset_generic</div><div class='add'>+alternative_else_nop_endif</div><div class='add'>+</div><div class='add'>+	mov	dst, dstin</div><div class='add'>+	setp	[dst]!, count!, val_x</div><div class='add'>+	setm	[dst]!, count!, val_x</div><div class='add'>+	sete	[dst]!, count!, val_x</div><div class='add'>+	ret</div><div class='ctx'> SYM_FUNC_END(__pi_memset)</div><div class='add'>+#else</div><div class='add'>+SYM_FUNC_ALIAS(__pi_memset, __pi_memset_generic)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_ALIAS(__memset, __pi_memset)</div><div class='ctx'> EXPORT_SYMBOL(__memset)</div><div class='head'>diff --git a/arch/arm64/lib/xor-neon.c b/arch/arm64/lib/xor-neon.c<br/>index f9a53b7f9842..8fffebfa17b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/xor-neon.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/lib/xor-neon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/lib/xor-neon.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/lib/xor-neon.c</a></div><div class='hunk'>@@ -319,7 +319,7 @@ static void xor_arm64_eor3_5(unsigned long bytes,</div><div class='ctx'> </div><div class='ctx'> static int __init xor_neon_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ENABLED(CONFIG_AS_HAS_SHA3) &amp;&amp; cpu_have_named_feature(SHA3)) {</div><div class='add'>+	if (cpu_have_named_feature(SHA3)) {</div><div class='ctx'> 		xor_block_inner_neon.do_3 = xor_arm64_eor3_3;</div><div class='ctx'> 		xor_block_inner_neon.do_4 = xor_arm64_eor3_4;</div><div class='ctx'> 		xor_block_inner_neon.do_5 = xor_arm64_eor3_5;</div><div class='head'>diff --git a/arch/arm64/mm/Makefile b/arch/arm64/mm/Makefile<br/>index 2fc8c6dd0407..c26489cf96cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/Makefile</a></div><div class='hunk'>@@ -5,12 +5,13 @@ obj-y				:= dma-mapping.o extable.o fault.o init.o \</div><div class='ctx'> 				   context.o proc.o pageattr.o fixmap.o</div><div class='ctx'> obj-$(CONFIG_ARM64_CONTPTE)	+= contpte.o</div><div class='ctx'> obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o</div><div class='del'>-obj-$(CONFIG_PTDUMP_CORE)	+= ptdump.o</div><div class='add'>+obj-$(CONFIG_PTDUMP)		+= ptdump.o</div><div class='ctx'> obj-$(CONFIG_PTDUMP_DEBUGFS)	+= ptdump_debugfs.o</div><div class='ctx'> obj-$(CONFIG_TRANS_TABLE)	+= trans_pgd.o</div><div class='ctx'> obj-$(CONFIG_TRANS_TABLE)	+= trans_pgd-asm.o</div><div class='ctx'> obj-$(CONFIG_DEBUG_VIRTUAL)	+= physaddr.o</div><div class='ctx'> obj-$(CONFIG_ARM64_MTE)		+= mteswap.o</div><div class='add'>+obj-$(CONFIG_ARM64_GCS)		+= gcs.o</div><div class='ctx'> KASAN_SANITIZE_physaddr.o	+= n</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KASAN)		+= kasan_init.o</div><div class='head'>diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c<br/>index 188197590fc9..b2ac06246327 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/context.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/context.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/context.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/context.c</a></div><div class='hunk'>@@ -32,9 +32,9 @@ static unsigned long nr_pinned_asids;</div><div class='ctx'> static unsigned long *pinned_asid_map;</div><div class='ctx'> </div><div class='ctx'> #define ASID_MASK		(~GENMASK(asid_bits - 1, 0))</div><div class='del'>-#define ASID_FIRST_VERSION	(1UL &lt;&lt; asid_bits)</div><div class='add'>+#define ASID_FIRST_VERSION	(1UL &lt;&lt; 16)</div><div class='ctx'> </div><div class='del'>-#define NUM_USER_ASIDS		ASID_FIRST_VERSION</div><div class='add'>+#define NUM_USER_ASIDS		(1UL &lt;&lt; asid_bits)</div><div class='ctx'> #define ctxid2asid(asid)	((asid) &amp; ~ASID_MASK)</div><div class='ctx'> #define asid2ctxid(asid, genid)	((asid) | (genid))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/contpte.c b/arch/arm64/mm/contpte.c<br/>index 55107d27d3f8..c0557945939c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/contpte.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/contpte.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/contpte.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/contpte.c</a></div><div class='hunk'>@@ -68,7 +68,144 @@ static void contpte_convert(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 			pte = pte_mkyoung(pte);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__flush_tlb_range(&amp;vma, start_addr, addr, PAGE_SIZE, true, 3);</div><div class='add'>+	/*</div><div class='add'>+	 * On eliding the __tlb_flush_range() under BBML2+noabort:</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE: Instead of using N=16 as the contiguous block length, we use</div><div class='add'>+	 *       N=4 for clarity.</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE: 'n' and 'c' are used to denote the "contiguous bit" being</div><div class='add'>+	 *       unset and set, respectively.</div><div class='add'>+	 *</div><div class='add'>+	 * We worry about two cases where contiguous bit is used:</div><div class='add'>+	 *  - When folding N smaller non-contiguous ptes as 1 contiguous block.</div><div class='add'>+	 *  - When unfolding a contiguous block into N smaller non-contiguous ptes.</div><div class='add'>+	 *</div><div class='add'>+	 * Currently, the BBML0 folding case looks as follows:</div><div class='add'>+	 *</div><div class='add'>+	 *  0) Initial page-table layout:</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |RO,n|RO,n|RO,n|RW,n| &lt;--- last page being set as RO</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  1) Aggregate AF + dirty flags using __ptep_get_and_clear():</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |  0 |  0 |  0 |  0 |</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  2) __flush_tlb_range():</div><div class='add'>+	 *</div><div class='add'>+	 *   |____ tlbi + dsb ____|</div><div class='add'>+	 *</div><div class='add'>+	 *  3) __set_ptes() to repaint contiguous block:</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |RO,c|RO,c|RO,c|RO,c|</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  4) The kernel will eventually __flush_tlb() for changed page:</div><div class='add'>+	 *</div><div class='add'>+	 *                  |____| &lt;--- tlbi + dsb</div><div class='add'>+	 *</div><div class='add'>+	 * As expected, the intermediate tlbi+dsb ensures that other PEs</div><div class='add'>+	 * only ever see an invalid (0) entry, or the new contiguous TLB entry.</div><div class='add'>+	 * The final tlbi+dsb will always throw away the newly installed</div><div class='add'>+	 * contiguous TLB entry, which is a micro-optimisation opportunity,</div><div class='add'>+	 * but does not affect correctness.</div><div class='add'>+	 *</div><div class='add'>+	 * In the BBML2 case, the change is avoiding the intermediate tlbi+dsb.</div><div class='add'>+	 * This means a few things, but notably other PEs will still "see" any</div><div class='add'>+	 * stale cached TLB entries. This could lead to a "contiguous bit</div><div class='add'>+	 * misprogramming" issue until the final tlbi+dsb of the changed page,</div><div class='add'>+	 * which would clear out both the stale (RW,n) entry and the new (RO,c)</div><div class='add'>+	 * contiguous entry installed in its place.</div><div class='add'>+	 *</div><div class='add'>+	 * What this is saying, is the following:</div><div class='add'>+	 *</div><div class='add'>+	 *  +----+----+----+----+</div><div class='add'>+	 *  |RO,n|RO,n|RO,n|RW,n| &lt;--- old page tables, all non-contiguous</div><div class='add'>+	 *  +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  +----+----+----+----+</div><div class='add'>+	 *  |RO,c|RO,c|RO,c|RO,c| &lt;--- new page tables, all contiguous</div><div class='add'>+	 *  +----+----+----+----+</div><div class='add'>+	 *   /\</div><div class='add'>+	 *   ||</div><div class='add'>+	 *</div><div class='add'>+	 *  If both the old single (RW,n) and new contiguous (RO,c) TLB entries</div><div class='add'>+	 *  are present, and a write is made to this address, do we fault or</div><div class='add'>+	 *  is the write permitted (via amalgamation)?</div><div class='add'>+	 *</div><div class='add'>+	 * The relevant Arm ARM DDI 0487L.a requirements are RNGLXZ and RJQQTC,</div><div class='add'>+	 * and together state that when BBML1 or BBML2 are implemented, either</div><div class='add'>+	 * a TLB conflict abort is raised (which we expressly forbid), or will</div><div class='add'>+	 * "produce an OA, access permissions, and memory attributes that are</div><div class='add'>+	 * consistent with any of the programmed translation table values".</div><div class='add'>+	 *</div><div class='add'>+	 * That is to say, will either raise a TLB conflict, or produce one of</div><div class='add'>+	 * the cached TLB entries, but never amalgamate.</div><div class='add'>+	 *</div><div class='add'>+	 * Thus, as the page tables are only considered "consistent" after</div><div class='add'>+	 * the final tlbi+dsb (which evicts both the single stale (RW,n) TLB</div><div class='add'>+	 * entry as well as the new contiguous (RO,c) TLB entry), omitting the</div><div class='add'>+	 * initial tlbi+dsb is correct.</div><div class='add'>+	 *</div><div class='add'>+	 * It is also important to note that at the end of the BBML2 folding</div><div class='add'>+	 * case, we are still left with potentially all N TLB entries still</div><div class='add'>+	 * cached (the N-1 non-contiguous ptes, and the single contiguous</div><div class='add'>+	 * block). However, over time, natural TLB pressure will cause the</div><div class='add'>+	 * non-contiguous pte TLB entries to be flushed, leaving only the</div><div class='add'>+	 * contiguous block TLB entry. This means that omitting the tlbi+dsb is</div><div class='add'>+	 * not only correct, but also keeps our eventual performance benefits.</div><div class='add'>+	 *</div><div class='add'>+	 * For the unfolding case, BBML0 looks as follows:</div><div class='add'>+	 *</div><div class='add'>+	 *  0) Initial page-table layout:</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |RW,c|RW,c|RW,c|RW,c| &lt;--- last page being set as RO</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  1) Aggregate AF + dirty flags using __ptep_get_and_clear():</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |  0 |  0 |  0 |  0 |</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  2) __flush_tlb_range():</div><div class='add'>+	 *</div><div class='add'>+	 *   |____ tlbi + dsb ____|</div><div class='add'>+	 *</div><div class='add'>+	 *  3) __set_ptes() to repaint as non-contiguous:</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |RW,n|RW,n|RW,n|RW,n|</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  4) Update changed page permissions:</div><div class='add'>+	 *</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *   |RW,n|RW,n|RW,n|RO,n| &lt;--- last page permissions set</div><div class='add'>+	 *   +----+----+----+----+</div><div class='add'>+	 *</div><div class='add'>+	 *  5) The kernel will eventually __flush_tlb() for changed page:</div><div class='add'>+	 *</div><div class='add'>+	 *                  |____| &lt;--- tlbi + dsb</div><div class='add'>+	 *</div><div class='add'>+	 * For BBML2, we again remove the intermediate tlbi+dsb. Here, there</div><div class='add'>+	 * are no issues, as the final tlbi+dsb covering the changed page is</div><div class='add'>+	 * guaranteed to remove the original large contiguous (RW,c) TLB entry,</div><div class='add'>+	 * as well as the intermediate (RW,n) TLB entry; the next access will</div><div class='add'>+	 * install the new (RO,n) TLB entry and the page tables are only</div><div class='add'>+	 * considered "consistent" after the final tlbi+dsb, so software must</div><div class='add'>+	 * be prepared for this inconsistency prior to finishing the mm dance</div><div class='add'>+	 * regardless.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!system_supports_bbml2_noabort())</div><div class='add'>+		__flush_tlb_range(&amp;vma, start_addr, addr, PAGE_SIZE, true, 3);</div><div class='ctx'> </div><div class='ctx'> 	__set_ptes(mm, start_addr, start_ptep, pte, CONT_PTES);</div><div class='ctx'> }</div><div class='hunk'>@@ -169,17 +306,46 @@ pte_t contpte_ptep_get(pte_t *ptep, pte_t orig_pte)</div><div class='ctx'> 	for (i = 0; i &lt; CONT_PTES; i++, ptep++) {</div><div class='ctx'> 		pte = __ptep_get(ptep);</div><div class='ctx'> </div><div class='del'>-		if (pte_dirty(pte))</div><div class='add'>+		if (pte_dirty(pte)) {</div><div class='ctx'> 			orig_pte = pte_mkdirty(orig_pte);</div><div class='del'>-</div><div class='del'>-		if (pte_young(pte))</div><div class='add'>+			for (; i &lt; CONT_PTES; i++, ptep++) {</div><div class='add'>+				pte = __ptep_get(ptep);</div><div class='add'>+				if (pte_young(pte)) {</div><div class='add'>+					orig_pte = pte_mkyoung(orig_pte);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pte_young(pte)) {</div><div class='ctx'> 			orig_pte = pte_mkyoung(orig_pte);</div><div class='add'>+			i++;</div><div class='add'>+			ptep++;</div><div class='add'>+			for (; i &lt; CONT_PTES; i++, ptep++) {</div><div class='add'>+				pte = __ptep_get(ptep);</div><div class='add'>+				if (pte_dirty(pte)) {</div><div class='add'>+					orig_pte = pte_mkdirty(orig_pte);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return orig_pte;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(contpte_ptep_get);</div><div class='ctx'> </div><div class='add'>+static inline bool contpte_is_consistent(pte_t pte, unsigned long pfn,</div><div class='add'>+					pgprot_t orig_prot)</div><div class='add'>+{</div><div class='add'>+	pgprot_t prot = pte_pgprot(pte_mkold(pte_mkclean(pte)));</div><div class='add'>+</div><div class='add'>+	return pte_valid_cont(pte) &amp;&amp; pte_pfn(pte) == pfn &amp;&amp;</div><div class='add'>+			pgprot_val(prot) == pgprot_val(orig_prot);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> pte_t contpte_ptep_get_lockless(pte_t *orig_ptep)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -202,7 +368,6 @@ pte_t contpte_ptep_get_lockless(pte_t *orig_ptep)</div><div class='ctx'> 	pgprot_t orig_prot;</div><div class='ctx'> 	unsigned long pfn;</div><div class='ctx'> 	pte_t orig_pte;</div><div class='del'>-	pgprot_t prot;</div><div class='ctx'> 	pte_t *ptep;</div><div class='ctx'> 	pte_t pte;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -219,18 +384,44 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; CONT_PTES; i++, ptep++, pfn++) {</div><div class='ctx'> 		pte = __ptep_get(ptep);</div><div class='del'>-		prot = pte_pgprot(pte_mkold(pte_mkclean(pte)));</div><div class='ctx'> </div><div class='del'>-		if (!pte_valid_cont(pte) ||</div><div class='del'>-		   pte_pfn(pte) != pfn ||</div><div class='del'>-		   pgprot_val(prot) != pgprot_val(orig_prot))</div><div class='add'>+		if (!contpte_is_consistent(pte, pfn, orig_prot))</div><div class='ctx'> 			goto retry;</div><div class='ctx'> </div><div class='del'>-		if (pte_dirty(pte))</div><div class='add'>+		if (pte_dirty(pte)) {</div><div class='ctx'> 			orig_pte = pte_mkdirty(orig_pte);</div><div class='add'>+			for (; i &lt; CONT_PTES; i++, ptep++, pfn++) {</div><div class='add'>+				pte = __ptep_get(ptep);</div><div class='add'>+</div><div class='add'>+				if (!contpte_is_consistent(pte, pfn, orig_prot))</div><div class='add'>+					goto retry;</div><div class='add'>+</div><div class='add'>+				if (pte_young(pte)) {</div><div class='add'>+					orig_pte = pte_mkyoung(orig_pte);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (pte_young(pte))</div><div class='add'>+		if (pte_young(pte)) {</div><div class='ctx'> 			orig_pte = pte_mkyoung(orig_pte);</div><div class='add'>+			i++;</div><div class='add'>+			ptep++;</div><div class='add'>+			pfn++;</div><div class='add'>+			for (; i &lt; CONT_PTES; i++, ptep++, pfn++) {</div><div class='add'>+				pte = __ptep_get(ptep);</div><div class='add'>+</div><div class='add'>+				if (!contpte_is_consistent(pte, pfn, orig_prot))</div><div class='add'>+					goto retry;</div><div class='add'>+</div><div class='add'>+				if (pte_dirty(pte)) {</div><div class='add'>+					orig_pte = pte_mkdirty(orig_pte);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return orig_pte;</div><div class='hunk'>@@ -335,7 +526,7 @@ int contpte_ptep_clear_flush_young(struct vm_area_struct *vma,</div><div class='ctx'> 		 * eliding the trailing DSB applies here.</div><div class='ctx'> 		 */</div><div class='ctx'> 		addr = ALIGN_DOWN(addr, CONT_PTE_SIZE);</div><div class='del'>-		__flush_tlb_range_nosync(vma, addr, addr + CONT_PTE_SIZE,</div><div class='add'>+		__flush_tlb_range_nosync(vma-&gt;vm_mm, addr, addr + CONT_PTE_SIZE,</div><div class='ctx'> 					 PAGE_SIZE, true, 3);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/copypage.c b/arch/arm64/mm/copypage.c<br/>index a7bb20055ce0..a86c897017df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/copypage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/copypage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/copypage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/copypage.c</a></div><div class='hunk'>@@ -18,15 +18,42 @@ void copy_highpage(struct page *to, struct page *from)</div><div class='ctx'> {</div><div class='ctx'> 	void *kto = page_address(to);</div><div class='ctx'> 	void *kfrom = page_address(from);</div><div class='add'>+	struct folio *src = page_folio(from);</div><div class='add'>+	struct folio *dst = page_folio(to);</div><div class='add'>+	unsigned int i, nr_pages;</div><div class='ctx'> </div><div class='ctx'> 	copy_page(kto, kfrom);</div><div class='ctx'> </div><div class='ctx'> 	if (kasan_hw_tags_enabled())</div><div class='ctx'> 		page_kasan_tag_reset(to);</div><div class='ctx'> </div><div class='del'>-	if (system_supports_mte() &amp;&amp; page_mte_tagged(from)) {</div><div class='add'>+	if (!system_supports_mte())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (folio_test_hugetlb(src)) {</div><div class='add'>+		if (!folio_test_hugetlb_mte_tagged(src) ||</div><div class='add'>+		    from != folio_page(src, 0))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		WARN_ON_ONCE(!folio_try_hugetlb_mte_tagging(dst));</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Populate tags for all subpages.</div><div class='add'>+		 *</div><div class='add'>+		 * Don't assume the first page is head page since</div><div class='add'>+		 * huge page copy may start from any subpage.</div><div class='add'>+		 */</div><div class='add'>+		nr_pages = folio_nr_pages(src);</div><div class='add'>+		for (i = 0; i &lt; nr_pages; i++) {</div><div class='add'>+			kfrom = page_address(folio_page(src, i));</div><div class='add'>+			kto = page_address(folio_page(dst, i));</div><div class='add'>+			mte_copy_page_tags(kto, kfrom);</div><div class='add'>+		}</div><div class='add'>+		folio_set_hugetlb_mte_tagged(dst);</div><div class='add'>+	} else if (page_mte_tagged(from)) {</div><div class='ctx'> 		/* It's a new page, shouldn't have been tagged yet */</div><div class='ctx'> 		WARN_ON_ONCE(!try_page_mte_tagging(to));</div><div class='add'>+</div><div class='ctx'> 		mte_copy_page_tags(kto, kfrom);</div><div class='ctx'> 		set_page_mte_tagged(to);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/mm/extable.c b/arch/arm64/mm/extable.c<br/>index 228d681a8715..6e0528831cd3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/extable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/extable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/extable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/extable.c</a></div><div class='hunk'>@@ -8,8 +8,33 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-extable.h&gt;</div><div class='add'>+#include &lt;asm/esr.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='add'>+static bool cpy_faulted_on_uaccess(const struct exception_table_entry *ex,</div><div class='add'>+				   unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	bool uaccess_is_write = FIELD_GET(EX_DATA_UACCESS_WRITE, ex-&gt;data);</div><div class='add'>+	bool fault_on_write = esr &amp; ESR_ELx_WNR;</div><div class='add'>+</div><div class='add'>+	return uaccess_is_write == fault_on_write;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool insn_may_access_user(unsigned long addr, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	const struct exception_table_entry *ex = search_exception_tables(addr);</div><div class='add'>+</div><div class='add'>+	if (!ex)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (ex-&gt;type) {</div><div class='add'>+	case EX_TYPE_UACCESS_CPY:</div><div class='add'>+		return cpy_faulted_on_uaccess(ex, esr);</div><div class='add'>+	default:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline unsigned long</div><div class='ctx'> get_ex_fixup(const struct exception_table_entry *ex)</div><div class='ctx'> {</div><div class='hunk'>@@ -29,6 +54,17 @@ static bool ex_handler_uaccess_err_zero(const struct exception_table_entry *ex,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool ex_handler_uaccess_cpy(const struct exception_table_entry *ex,</div><div class='add'>+				   struct pt_regs *regs, unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	/* Do not fix up faults on kernel memory accesses */</div><div class='add'>+	if (!cpy_faulted_on_uaccess(ex, esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	regs-&gt;pc = get_ex_fixup(ex);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool</div><div class='ctx'> ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,</div><div class='ctx'> 				  struct pt_regs *regs)</div><div class='hunk'>@@ -56,7 +92,7 @@ ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool fixup_exception(struct pt_regs *regs)</div><div class='add'>+bool fixup_exception(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	const struct exception_table_entry *ex;</div><div class='ctx'> </div><div class='hunk'>@@ -70,6 +106,8 @@ bool fixup_exception(struct pt_regs *regs)</div><div class='ctx'> 	case EX_TYPE_UACCESS_ERR_ZERO:</div><div class='ctx'> 	case EX_TYPE_KACCESS_ERR_ZERO:</div><div class='ctx'> 		return ex_handler_uaccess_err_zero(ex, regs);</div><div class='add'>+	case EX_TYPE_UACCESS_CPY:</div><div class='add'>+		return ex_handler_uaccess_cpy(ex, regs, esr);</div><div class='ctx'> 	case EX_TYPE_LOAD_UNALIGNED_ZEROPAD:</div><div class='ctx'> 		return ex_handler_load_unaligned_zeropad(ex, regs);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c<br/>index 8b281cf308b3..d816ff44faff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/fault.c</a></div><div class='hunk'>@@ -53,18 +53,12 @@ struct fault_info {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct fault_info fault_info[];</div><div class='del'>-static struct fault_info debug_fault_info[];</div><div class='ctx'> </div><div class='ctx'> static inline const struct fault_info *esr_to_fault_info(unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	return fault_info + (esr &amp; ESR_ELx_FSC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)</div><div class='del'>-{</div><div class='del'>-	return debug_fault_info + DBG_ESR_EVT(esr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void data_abort_decode(unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long iss2 = ESR_ELx_ISS2(esr);</div><div class='hunk'>@@ -375,7 +369,7 @@ static void __do_kernel_fault(unsigned long addr, unsigned long esr,</div><div class='ctx'> 	 * Are we prepared to handle this kernel fault?</div><div class='ctx'> 	 * We are almost certainly not prepared to handle instruction faults.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!is_el1_instruction_abort(esr) &amp;&amp; fixup_exception(regs))</div><div class='add'>+	if (!is_el1_instruction_abort(esr) &amp;&amp; fixup_exception(regs, esr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),</div><div class='hunk'>@@ -487,23 +481,43 @@ static void do_bad_area(unsigned long far, unsigned long esr,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma,</div><div class='del'>-			unsigned int mm_flags)</div><div class='add'>+static bool fault_from_pkey(struct vm_area_struct *vma, unsigned int mm_flags)</div><div class='ctx'> {</div><div class='del'>-	unsigned long iss2 = ESR_ELx_ISS2(esr);</div><div class='del'>-</div><div class='ctx'> 	if (!system_supports_poe())</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (esr_fsc_is_permission_fault(esr) &amp;&amp; (iss2 &amp; ESR_ELx_Overlay))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * We do not check whether an Overlay fault has occurred because we</div><div class='add'>+	 * cannot make a decision based solely on its value:</div><div class='add'>+	 *</div><div class='add'>+	 * - If Overlay is set, a fault did occur due to POE, but it may be</div><div class='add'>+	 *   spurious in those cases where we update POR_EL0 without ISB (e.g.</div><div class='add'>+	 *   on context-switch). We would then need to manually check POR_EL0</div><div class='add'>+	 *   against vma_pkey(vma), which is exactly what</div><div class='add'>+	 *   arch_vma_access_permitted() does.</div><div class='add'>+	 *</div><div class='add'>+	 * - If Overlay is not set, we may still need to report a pkey fault.</div><div class='add'>+	 *   This is the case if an access was made within a mapping but with no</div><div class='add'>+	 *   page mapped, and POR_EL0 forbids the access (according to</div><div class='add'>+	 *   vma_pkey()). Such access will result in a SIGSEGV regardless</div><div class='add'>+	 *   because core code checks arch_vma_access_permitted(), but in order</div><div class='add'>+	 *   to report the correct error code - SEGV_PKUERR - we must handle</div><div class='add'>+	 *   that case here.</div><div class='add'>+	 */</div><div class='ctx'> 	return !arch_vma_access_permitted(vma,</div><div class='ctx'> 			mm_flags &amp; FAULT_FLAG_WRITE,</div><div class='ctx'> 			mm_flags &amp; FAULT_FLAG_INSTRUCTION,</div><div class='ctx'> 			false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_gcs_fault(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	if (!esr_is_data_abort(esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return ESR_ELx_ISS2(esr) &amp; ESR_ELx_GCS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool is_el0_instruction_abort(unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;</div><div class='hunk'>@@ -518,13 +532,30 @@ static bool is_write_abort(unsigned long esr)</div><div class='ctx'> 	return (esr &amp; ESR_ELx_WNR) &amp;&amp; !(esr &amp; ESR_ELx_CM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_invalid_gcs_access(struct vm_area_struct *vma, u64 esr)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (unlikely(is_gcs_fault(esr))) {</div><div class='add'>+		/* GCS accesses must be performed on a GCS page */</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; VM_SHADOW_STACK))</div><div class='add'>+			return true;</div><div class='add'>+	} else if (unlikely(vma-&gt;vm_flags &amp; VM_SHADOW_STACK)) {</div><div class='add'>+		/* Only GCS operations can write to a GCS page */</div><div class='add'>+		return esr_is_data_abort(esr) &amp;&amp; is_write_abort(esr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __kprobes do_page_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 				   struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	const struct fault_info *inf;</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> 	vm_fault_t fault;</div><div class='del'>-	unsigned long vm_flags;</div><div class='add'>+	vm_flags_t vm_flags;</div><div class='ctx'> 	unsigned int mm_flags = FAULT_FLAG_DEFAULT;</div><div class='ctx'> 	unsigned long addr = untagged_addr(far);</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='hunk'>@@ -554,6 +585,14 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 		/* It was exec fault */</div><div class='ctx'> 		vm_flags = VM_EXEC;</div><div class='ctx'> 		mm_flags |= FAULT_FLAG_INSTRUCTION;</div><div class='add'>+	} else if (is_gcs_fault(esr)) {</div><div class='add'>+		/*</div><div class='add'>+		 * The GCS permission on a page implies both read and</div><div class='add'>+		 * write so always handle any GCS fault as a write fault,</div><div class='add'>+		 * we need to trigger CoW even for GCS reads.</div><div class='add'>+		 */</div><div class='add'>+		vm_flags = VM_WRITE;</div><div class='add'>+		mm_flags |= FAULT_FLAG_WRITE;</div><div class='ctx'> 	} else if (is_write_abort(esr)) {</div><div class='ctx'> 		/* It was write fault */</div><div class='ctx'> 		vm_flags = VM_WRITE;</div><div class='hunk'>@@ -573,7 +612,7 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 			die_kernel_fault("execution of user memory",</div><div class='ctx'> 					 addr, esr, regs);</div><div class='ctx'> </div><div class='del'>-		if (!search_exception_tables(regs-&gt;pc))</div><div class='add'>+		if (!insn_may_access_user(regs-&gt;pc, esr))</div><div class='ctx'> 			die_kernel_fault("access to user memory outside uaccess routines",</div><div class='ctx'> 					 addr, esr, regs);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -587,6 +626,13 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 	if (!vma)</div><div class='ctx'> 		goto lock_mmap;</div><div class='ctx'> </div><div class='add'>+	if (is_invalid_gcs_access(vma, esr)) {</div><div class='add'>+		vma_end_read(vma);</div><div class='add'>+		fault = 0;</div><div class='add'>+		si_code = SEGV_ACCERR;</div><div class='add'>+		goto bad_area;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!(vma-&gt;vm_flags &amp; vm_flags)) {</div><div class='ctx'> 		vma_end_read(vma);</div><div class='ctx'> 		fault = 0;</div><div class='hunk'>@@ -595,7 +641,7 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fault_from_pkey(esr, vma, mm_flags)) {</div><div class='add'>+	if (fault_from_pkey(vma, mm_flags)) {</div><div class='ctx'> 		pkey = vma_pkey(vma);</div><div class='ctx'> 		vma_end_read(vma);</div><div class='ctx'> 		fault = 0;</div><div class='hunk'>@@ -639,7 +685,7 @@ retry:</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fault_from_pkey(esr, vma, mm_flags)) {</div><div class='add'>+	if (fault_from_pkey(vma, mm_flags)) {</div><div class='ctx'> 		pkey = vma_pkey(vma);</div><div class='ctx'> 		mmap_read_unlock(mm);</div><div class='ctx'> 		fault = 0;</div><div class='hunk'>@@ -786,6 +832,7 @@ static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> 		 */</div><div class='ctx'> 		siaddr  = untagged_addr(far);</div><div class='ctx'> 	}</div><div class='add'>+	add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK);</div><div class='ctx'> 	arm64_notify_die(inf-&gt;name, regs, inf-&gt;sig, inf-&gt;code, siaddr, esr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -797,9 +844,12 @@ static int do_tag_check_fault(unsigned long far, unsigned long esr,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN</div><div class='ctx'> 	 * for tag check faults. Set them to corresponding bits in the untagged</div><div class='del'>-	 * address.</div><div class='add'>+	 * address if ARM64_MTE_FAR isn't supported.</div><div class='add'>+	 * Otherwise, bits 63:60 of FAR_EL1 are not UNKNOWN.</div><div class='ctx'> 	 */</div><div class='del'>-	far = (__untagged_addr(far) &amp; ~MTE_TAG_MASK) | (far &amp; MTE_TAG_MASK);</div><div class='add'>+	if (!cpus_have_cap(ARM64_MTE_FAR))</div><div class='add'>+		far = (__untagged_addr(far) &amp; ~MTE_TAG_MASK) | (far &amp; MTE_TAG_MASK);</div><div class='add'>+</div><div class='ctx'> 	do_bad_area(far, esr, regs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -899,75 +949,6 @@ void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> NOKPROBE_SYMBOL(do_sp_pc_abort);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * __refdata because early_brk64 is __init, but the reference to it is</div><div class='del'>- * clobbered at arch_initcall time.</div><div class='del'>- * See traps.c and debug-monitors.c:debug_traps_init().</div><div class='del'>- */</div><div class='del'>-static struct fault_info __refdata debug_fault_info[] = {</div><div class='del'>-	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware breakpoint"	},</div><div class='del'>-	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware single-step"	},</div><div class='del'>-	{ do_bad,	SIGTRAP,	TRAP_HWBKPT,	"hardware watchpoint"	},</div><div class='del'>-	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 3"		},</div><div class='del'>-	{ do_bad,	SIGTRAP,	TRAP_BRKPT,	"aarch32 BKPT"		},</div><div class='del'>-	{ do_bad,	SIGKILL,	SI_KERNEL,	"aarch32 vector catch"	},</div><div class='del'>-	{ early_brk64,	SIGTRAP,	TRAP_BRKPT,	"aarch64 BRK"		},</div><div class='del'>-	{ do_bad,	SIGKILL,	SI_KERNEL,	"unknown 7"		},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init hook_debug_fault_code(int nr,</div><div class='del'>-				  int (*fn)(unsigned long, unsigned long, struct pt_regs *),</div><div class='del'>-				  int sig, int code, const char *name)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(nr &lt; 0 || nr &gt;= ARRAY_SIZE(debug_fault_info));</div><div class='del'>-</div><div class='del'>-	debug_fault_info[nr].fn		= fn;</div><div class='del'>-	debug_fault_info[nr].sig	= sig;</div><div class='del'>-	debug_fault_info[nr].code	= code;</div><div class='del'>-	debug_fault_info[nr].name	= name;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * In debug exception context, we explicitly disable preemption despite</div><div class='del'>- * having interrupts disabled.</div><div class='del'>- * This serves two purposes: it makes it much less likely that we would</div><div class='del'>- * accidentally schedule in exception context and it will force a warning</div><div class='del'>- * if we somehow manage to schedule by accident.</div><div class='del'>- */</div><div class='del'>-static void debug_exception_enter(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-</div><div class='del'>-	/* This code is a bit fragile.  Test it. */</div><div class='del'>-	RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");</div><div class='del'>-}</div><div class='del'>-NOKPROBE_SYMBOL(debug_exception_enter);</div><div class='del'>-</div><div class='del'>-static void debug_exception_exit(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	preempt_enable_no_resched();</div><div class='del'>-}</div><div class='del'>-NOKPROBE_SYMBOL(debug_exception_exit);</div><div class='del'>-</div><div class='del'>-void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,</div><div class='del'>-			struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	const struct fault_info *inf = esr_to_debug_fault_info(esr);</div><div class='del'>-	unsigned long pc = instruction_pointer(regs);</div><div class='del'>-</div><div class='del'>-	debug_exception_enter(regs);</div><div class='del'>-</div><div class='del'>-	if (user_mode(regs) &amp;&amp; !is_ttbr0_addr(pc))</div><div class='del'>-		arm64_apply_bp_hardening();</div><div class='del'>-</div><div class='del'>-	if (inf-&gt;fn(addr_if_watchpoint, esr, regs)) {</div><div class='del'>-		arm64_notify_die(inf-&gt;name, regs, inf-&gt;sig, inf-&gt;code, pc, esr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debug_exception_exit(regs);</div><div class='del'>-}</div><div class='del'>-NOKPROBE_SYMBOL(do_debug_exception);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Used during anonymous page fault handling.</div><div class='ctx'>  */</div><div class='ctx'> struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,</div><div class='hunk'>@@ -983,7 +964,7 @@ struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,</div><div class='ctx'> 	if (vma-&gt;vm_flags &amp; VM_MTE)</div><div class='ctx'> 		flags |= __GFP_ZEROTAGS;</div><div class='ctx'> </div><div class='del'>-	return vma_alloc_folio(flags, 0, vma, vaddr, false);</div><div class='add'>+	return vma_alloc_folio(flags, 0, vma, vaddr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void tag_clear_highpage(struct page *page)</div><div class='head'>diff --git a/arch/arm64/mm/fixmap.c b/arch/arm64/mm/fixmap.c<br/>index de1e09d986ad..c5c5425791da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/fixmap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/fixmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/fixmap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/fixmap.c</a></div><div class='hunk'>@@ -47,7 +47,8 @@ static void __init early_fixmap_init_pte(pmd_t *pmdp, unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> 	if (pmd_none(pmd)) {</div><div class='ctx'> 		ptep = bm_pte[BM_PTE_TABLE_IDX(addr)];</div><div class='del'>-		__pmd_populate(pmdp, __pa_symbol(ptep), PMD_TYPE_TABLE);</div><div class='add'>+		__pmd_populate(pmdp, __pa_symbol(ptep),</div><div class='add'>+			       PMD_TYPE_TABLE | PMD_TABLE_AF);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -59,7 +60,8 @@ static void __init early_fixmap_init_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> 	pmd_t *pmdp;</div><div class='ctx'> </div><div class='ctx'> 	if (pud_none(pud))</div><div class='del'>-		__pud_populate(pudp, __pa_symbol(bm_pmd), PUD_TYPE_TABLE);</div><div class='add'>+		__pud_populate(pudp, __pa_symbol(bm_pmd),</div><div class='add'>+			       PUD_TYPE_TABLE | PUD_TABLE_AF);</div><div class='ctx'> </div><div class='ctx'> 	pmdp = pmd_offset_kimg(pudp, addr);</div><div class='ctx'> 	do {</div><div class='hunk'>@@ -86,7 +88,8 @@ static void __init early_fixmap_init_pud(p4d_t *p4dp, unsigned long addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (p4d_none(p4d))</div><div class='del'>-		__p4d_populate(p4dp, __pa_symbol(bm_pud), P4D_TYPE_TABLE);</div><div class='add'>+		__p4d_populate(p4dp, __pa_symbol(bm_pud),</div><div class='add'>+			       P4D_TYPE_TABLE | P4D_TABLE_AF);</div><div class='ctx'> </div><div class='ctx'> 	pudp = pud_offset_kimg(p4dp, addr);</div><div class='ctx'> 	early_fixmap_init_pmd(pudp, addr, end);</div><div class='head'>diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c<br/>index 013eead9b695..fbf08b543c3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/flush.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/flush.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/flush.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/flush.c</a></div><div class='hunk'>@@ -53,11 +53,11 @@ void __sync_icache_dcache(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	struct folio *folio = page_folio(pte_page(pte));</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags)) {</div><div class='add'>+	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f)) {</div><div class='ctx'> 		sync_icache_aliases((unsigned long)folio_address(folio),</div><div class='ctx'> 				    (unsigned long)folio_address(folio) +</div><div class='ctx'> 					    folio_size(folio));</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__sync_icache_dcache);</div><div class='hunk'>@@ -69,8 +69,8 @@ EXPORT_SYMBOL_GPL(__sync_icache_dcache);</div><div class='ctx'>  */</div><div class='ctx'> void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_folio);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/gcs.c b/arch/arm64/mm/gcs.c<br/>new file mode 100644<br/>index 000000000000..6e93f78de79b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/gcs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/gcs.c</a></div><div class='hunk'>@@ -0,0 +1,248 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/mman.h&gt;</div><div class='add'>+#include &lt;linux/syscalls.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cmpxchg.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/gcs.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='add'>+static unsigned long alloc_gcs(unsigned long addr, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	int flags = MAP_ANONYMOUS | MAP_PRIVATE;</div><div class='add'>+	struct mm_struct *mm = current-&gt;mm;</div><div class='add'>+	unsigned long mapped_addr, unused;</div><div class='add'>+</div><div class='add'>+	if (addr)</div><div class='add'>+		flags |= MAP_FIXED_NOREPLACE;</div><div class='add'>+</div><div class='add'>+	mmap_write_lock(mm);</div><div class='add'>+	mapped_addr = do_mmap(NULL, addr, size, PROT_READ, flags,</div><div class='add'>+			      VM_SHADOW_STACK | VM_WRITE, 0, &amp;unused, NULL);</div><div class='add'>+	mmap_write_unlock(mm);</div><div class='add'>+</div><div class='add'>+	return mapped_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long gcs_size(unsigned long size)</div><div class='add'>+{</div><div class='add'>+	if (size)</div><div class='add'>+		return PAGE_ALIGN(size);</div><div class='add'>+</div><div class='add'>+	/* Allocate RLIMIT_STACK/2 with limits of PAGE_SIZE..2G */</div><div class='add'>+	size = PAGE_ALIGN(min_t(unsigned long long,</div><div class='add'>+				rlimit(RLIMIT_STACK) / 2, SZ_2G));</div><div class='add'>+	return max(PAGE_SIZE, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long gcs_alloc_thread_stack(struct task_struct *tsk,</div><div class='add'>+				     const struct kernel_clone_args *args)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr, size;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!task_gcs_el0_enabled(tsk))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((args-&gt;flags &amp; (CLONE_VFORK | CLONE_VM)) != CLONE_VM) {</div><div class='add'>+		tsk-&gt;thread.gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = args-&gt;stack_size / 2;</div><div class='add'>+</div><div class='add'>+	size = gcs_size(size);</div><div class='add'>+	addr = alloc_gcs(0, size);</div><div class='add'>+	if (IS_ERR_VALUE(addr))</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	tsk-&gt;thread.gcs_base = addr;</div><div class='add'>+	tsk-&gt;thread.gcs_size = size;</div><div class='add'>+	tsk-&gt;thread.gcspr_el0 = addr + size - sizeof(u64);</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags)</div><div class='add'>+{</div><div class='add'>+	unsigned long alloc_size;</div><div class='add'>+	unsigned long __user *cap_ptr;</div><div class='add'>+	unsigned long cap_val;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int cap_offset;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; ~(SHADOW_STACK_SET_TOKEN | SHADOW_STACK_SET_MARKER))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!PAGE_ALIGNED(addr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (size == 8 || !IS_ALIGNED(size, 8))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * An overflow would result in attempting to write the restore token</div><div class='add'>+	 * to the wrong location. Not catastrophic, but just return the right</div><div class='add'>+	 * error code and block it.</div><div class='add'>+	 */</div><div class='add'>+	alloc_size = PAGE_ALIGN(size);</div><div class='add'>+	if (alloc_size &lt; size)</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+</div><div class='add'>+	addr = alloc_gcs(addr, alloc_size);</div><div class='add'>+	if (IS_ERR_VALUE(addr))</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Put a cap token at the end of the allocated region so it</div><div class='add'>+	 * can be switched to.</div><div class='add'>+	 */</div><div class='add'>+	if (flags &amp; SHADOW_STACK_SET_TOKEN) {</div><div class='add'>+		/* Leave an extra empty frame as a top of stack marker? */</div><div class='add'>+		if (flags &amp; SHADOW_STACK_SET_MARKER)</div><div class='add'>+			cap_offset = 2;</div><div class='add'>+		else</div><div class='add'>+			cap_offset = 1;</div><div class='add'>+</div><div class='add'>+		cap_ptr = (unsigned long __user *)(addr + size -</div><div class='add'>+						   (cap_offset * sizeof(unsigned long)));</div><div class='add'>+		cap_val = GCS_CAP(cap_ptr);</div><div class='add'>+</div><div class='add'>+		put_user_gcs(cap_val, cap_ptr, &amp;ret);</div><div class='add'>+		if (ret != 0) {</div><div class='add'>+			vm_munmap(addr, size);</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Ensure the new cap is ordered before standard</div><div class='add'>+		 * memory accesses to the same location.</div><div class='add'>+		 */</div><div class='add'>+		gcsb_dsync();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Apply the GCS mode configured for the specified task to the</div><div class='add'>+ * hardware.</div><div class='add'>+ */</div><div class='add'>+void gcs_set_el0_mode(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	u64 gcscre0_el1 = GCSCRE0_EL1_nTR;</div><div class='add'>+</div><div class='add'>+	if (task-&gt;thread.gcs_el0_mode &amp; PR_SHADOW_STACK_ENABLE)</div><div class='add'>+		gcscre0_el1 |= GCSCRE0_EL1_RVCHKEN | GCSCRE0_EL1_PCRSEL;</div><div class='add'>+</div><div class='add'>+	if (task-&gt;thread.gcs_el0_mode &amp; PR_SHADOW_STACK_WRITE)</div><div class='add'>+		gcscre0_el1 |= GCSCRE0_EL1_STREn;</div><div class='add'>+</div><div class='add'>+	if (task-&gt;thread.gcs_el0_mode &amp; PR_SHADOW_STACK_PUSH)</div><div class='add'>+		gcscre0_el1 |= GCSCRE0_EL1_PUSHMEn;</div><div class='add'>+</div><div class='add'>+	write_sysreg_s(gcscre0_el1, SYS_GCSCRE0_EL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gcs_free(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!task-&gt;mm || task-&gt;mm != current-&gt;mm)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (task-&gt;thread.gcs_base)</div><div class='add'>+		vm_munmap(task-&gt;thread.gcs_base, task-&gt;thread.gcs_size);</div><div class='add'>+</div><div class='add'>+	task-&gt;thread.gcspr_el0 = 0;</div><div class='add'>+	task-&gt;thread.gcs_base = 0;</div><div class='add'>+	task-&gt;thread.gcs_size = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_set_shadow_stack_status(struct task_struct *task, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	unsigned long gcs, size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (is_compat_thread(task_thread_info(task)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Reject unknown flags */</div><div class='add'>+	if (arg &amp; ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = gcs_check_locked(task, arg);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If we are enabling GCS then make sure we have a stack */</div><div class='add'>+	if (arg &amp; PR_SHADOW_STACK_ENABLE &amp;&amp;</div><div class='add'>+	    !task_gcs_el0_enabled(task)) {</div><div class='add'>+		/* Do not allow GCS to be reenabled */</div><div class='add'>+		if (task-&gt;thread.gcs_base || task-&gt;thread.gcspr_el0)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (task != current)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		size = gcs_size(0);</div><div class='add'>+		gcs = alloc_gcs(0, size);</div><div class='add'>+		if (!gcs)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		task-&gt;thread.gcspr_el0 = gcs + size - sizeof(u64);</div><div class='add'>+		task-&gt;thread.gcs_base = gcs;</div><div class='add'>+		task-&gt;thread.gcs_size = size;</div><div class='add'>+		if (task == current)</div><div class='add'>+			write_sysreg_s(task-&gt;thread.gcspr_el0,</div><div class='add'>+				       SYS_GCSPR_EL0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	task-&gt;thread.gcs_el0_mode = arg;</div><div class='add'>+	if (task == current)</div><div class='add'>+		gcs_set_el0_mode(task);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_get_shadow_stack_status(struct task_struct *task,</div><div class='add'>+				 unsigned long __user *arg)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (is_compat_thread(task_thread_info(task)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return put_user(task-&gt;thread.gcs_el0_mode, arg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_lock_shadow_stack_status(struct task_struct *task,</div><div class='add'>+				  unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_gcs())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (is_compat_thread(task_thread_info(task)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We support locking unknown bits so applications can prevent</div><div class='add'>+	 * any changes in a future proof manner.</div><div class='add'>+	 */</div><div class='add'>+	task-&gt;thread.gcs_el0_locked |= arg;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c<br/>index 5f1e2103888b..1d90a7e75333 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/hugetlbpage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/hugetlbpage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -100,20 +100,11 @@ static int find_num_contig(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> static inline int num_contig_ptes(unsigned long size, size_t *pgsize)</div><div class='ctx'> {</div><div class='del'>-	int contig_ptes = 0;</div><div class='add'>+	int contig_ptes = 1;</div><div class='ctx'> </div><div class='ctx'> 	*pgsize = size;</div><div class='ctx'> </div><div class='ctx'> 	switch (size) {</div><div class='del'>-#ifndef __PAGETABLE_PMD_FOLDED</div><div class='del'>-	case PUD_SIZE:</div><div class='del'>-		if (pud_sect_supported())</div><div class='del'>-			contig_ptes = 1;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-	case PMD_SIZE:</div><div class='del'>-		contig_ptes = 1;</div><div class='del'>-		break;</div><div class='ctx'> 	case CONT_PMD_SIZE:</div><div class='ctx'> 		*pgsize = PMD_SIZE;</div><div class='ctx'> 		contig_ptes = CONT_PMDS;</div><div class='hunk'>@@ -122,6 +113,8 @@ static inline int num_contig_ptes(unsigned long size, size_t *pgsize)</div><div class='ctx'> 		*pgsize = PAGE_SIZE;</div><div class='ctx'> 		contig_ptes = CONT_PTES;</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON(!__hugetlb_valid_size(size));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return contig_ptes;</div><div class='hunk'>@@ -136,7 +129,7 @@ pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='ctx'> 	if (!pte_present(orig_pte) || !pte_cont(orig_pte))</div><div class='ctx'> 		return orig_pte;</div><div class='ctx'> </div><div class='del'>-	ncontig = num_contig_ptes(page_size(pte_page(orig_pte)), &amp;pgsize);</div><div class='add'>+	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='ctx'> 	for (i = 0; i &lt; ncontig; i++, ptep++) {</div><div class='ctx'> 		pte_t pte = __ptep_get(ptep);</div><div class='ctx'> </div><div class='hunk'>@@ -163,24 +156,22 @@ static pte_t get_clear_contig(struct mm_struct *mm,</div><div class='ctx'> 			     unsigned long pgsize,</div><div class='ctx'> 			     unsigned long ncontig)</div><div class='ctx'> {</div><div class='del'>-	pte_t orig_pte = __ptep_get(ptep);</div><div class='del'>-	unsigned long i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, addr += pgsize, ptep++) {</div><div class='del'>-		pte_t pte = __ptep_get_and_clear(mm, addr, ptep);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If HW_AFDBM is enabled, then the HW could turn on</div><div class='del'>-		 * the dirty or accessed bit for any page in the set,</div><div class='del'>-		 * so check them all.</div><div class='del'>-		 */</div><div class='del'>-		if (pte_dirty(pte))</div><div class='del'>-			orig_pte = pte_mkdirty(orig_pte);</div><div class='del'>-</div><div class='del'>-		if (pte_young(pte))</div><div class='del'>-			orig_pte = pte_mkyoung(orig_pte);</div><div class='add'>+	pte_t pte, tmp_pte;</div><div class='add'>+	bool present;</div><div class='add'>+</div><div class='add'>+	pte = __ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='add'>+	present = pte_present(pte);</div><div class='add'>+	while (--ncontig) {</div><div class='add'>+		ptep++;</div><div class='add'>+		tmp_pte = __ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='add'>+		if (present) {</div><div class='add'>+			if (pte_dirty(tmp_pte))</div><div class='add'>+				pte = pte_mkdirty(pte);</div><div class='add'>+			if (pte_young(tmp_pte))</div><div class='add'>+				pte = pte_mkyoung(pte);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return orig_pte;</div><div class='add'>+	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static pte_t get_clear_contig_flush(struct mm_struct *mm,</div><div class='hunk'>@@ -191,8 +182,9 @@ static pte_t get_clear_contig_flush(struct mm_struct *mm,</div><div class='ctx'> {</div><div class='ctx'> 	pte_t orig_pte = get_clear_contig(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> 	struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0);</div><div class='add'>+	unsigned long end = addr + (pgsize * ncontig);</div><div class='ctx'> </div><div class='del'>-	flush_tlb_range(&amp;vma, addr, addr + (pgsize * ncontig));</div><div class='add'>+	__flush_hugetlb_tlb_range(&amp;vma, addr, end, pgsize, true);</div><div class='ctx'> 	return orig_pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -215,9 +207,12 @@ static void clear_flush(struct mm_struct *mm,</div><div class='ctx'> 	unsigned long i, saddr = addr;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ncontig; i++, addr += pgsize, ptep++)</div><div class='del'>-		__ptep_get_and_clear(mm, addr, ptep);</div><div class='add'>+		__ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='ctx'> </div><div class='del'>-	flush_tlb_range(&amp;vma, saddr, addr);</div><div class='add'>+	if (mm == &amp;init_mm)</div><div class='add'>+		flush_tlb_kernel_range(saddr, addr);</div><div class='add'>+	else</div><div class='add'>+		__flush_hugetlb_tlb_range(&amp;vma, saddr, addr, pgsize, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='hunk'>@@ -226,30 +221,20 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ncontig;</div><div class='del'>-	unsigned long pfn, dpfn;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='ctx'> </div><div class='ctx'> 	ncontig = num_contig_ptes(sz, &amp;pgsize);</div><div class='ctx'> </div><div class='ctx'> 	if (!pte_present(pte)) {</div><div class='del'>-		for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize)</div><div class='del'>-			__set_ptes(mm, addr, ptep, pte, 1);</div><div class='add'>+		for (i = 0; i &lt; ncontig; i++, ptep++)</div><div class='add'>+			__set_ptes_anysz(mm, ptep, pte, 1, pgsize);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!pte_cont(pte)) {</div><div class='del'>-		__set_ptes(mm, addr, ptep, pte, 1);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pfn = pte_pfn(pte);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='add'>+	/* Only need to "break" if transitioning valid -&gt; valid. */</div><div class='add'>+	if (pte_cont(pte) &amp;&amp; pte_valid(__ptep_get(ptep)))</div><div class='add'>+		clear_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> </div><div class='del'>-	clear_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,</div><div class='hunk'>@@ -342,7 +327,9 @@ unsigned long hugetlb_mask_last_page(struct hstate *h)</div><div class='ctx'> 	switch (hp_size) {</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> 	case PUD_SIZE:</div><div class='del'>-		return PGDIR_SIZE - PUD_SIZE;</div><div class='add'>+		if (pud_sect_supported())</div><div class='add'>+			return PGDIR_SIZE - PUD_SIZE;</div><div class='add'>+		break;</div><div class='ctx'> #endif</div><div class='ctx'> 	case CONT_PMD_SIZE:</div><div class='ctx'> 		return PUD_SIZE - CONT_PMD_SIZE;</div><div class='hunk'>@@ -361,15 +348,24 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)</div><div class='ctx'> {</div><div class='ctx'> 	size_t pagesize = 1UL &lt;&lt; shift;</div><div class='ctx'> </div><div class='del'>-	entry = pte_mkhuge(entry);</div><div class='del'>-	if (pagesize == CONT_PTE_SIZE) {</div><div class='del'>-		entry = pte_mkcont(entry);</div><div class='del'>-	} else if (pagesize == CONT_PMD_SIZE) {</div><div class='del'>-		entry = pmd_pte(pmd_mkcont(pte_pmd(entry)));</div><div class='del'>-	} else if (pagesize != PUD_SIZE &amp;&amp; pagesize != PMD_SIZE) {</div><div class='del'>-		pr_warn("%s: unrecognized huge page size 0x%lx\n",</div><div class='del'>-			__func__, pagesize);</div><div class='add'>+	switch (pagesize) {</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		if (pud_sect_supported())</div><div class='add'>+			return pud_pte(pud_mkhuge(pte_pud(entry)));</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	case CONT_PMD_SIZE:</div><div class='add'>+		return pmd_pte(pmd_mkhuge(pmd_mkcont(pte_pmd(entry))));</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		return pmd_pte(pmd_mkhuge(pte_pmd(entry)));</div><div class='add'>+	case CONT_PTE_SIZE:</div><div class='add'>+		return pte_mkcont(entry);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='add'>+	pr_warn("%s: unrecognized huge page size 0x%lx\n",</div><div class='add'>+		__func__, pagesize);</div><div class='ctx'> 	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -385,18 +381,13 @@ void huge_pte_clear(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		__pte_clear(mm, addr, ptep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-			      unsigned long addr, pte_t *ptep)</div><div class='add'>+pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='add'>+			      pte_t *ptep, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	int ncontig;</div><div class='ctx'> 	size_t pgsize;</div><div class='del'>-	pte_t orig_pte = __ptep_get(ptep);</div><div class='del'>-</div><div class='del'>-	if (!pte_cont(orig_pte))</div><div class='del'>-		return __ptep_get_and_clear(mm, addr, ptep);</div><div class='del'>-</div><div class='del'>-	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='ctx'> </div><div class='add'>+	ncontig = num_contig_ptes(sz, &amp;pgsize);</div><div class='ctx'> 	return get_clear_contig(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -433,23 +424,23 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 			       unsigned long addr, pte_t *ptep,</div><div class='ctx'> 			       pte_t pte, int dirty)</div><div class='ctx'> {</div><div class='del'>-	int ncontig, i;</div><div class='add'>+	int ncontig;</div><div class='ctx'> 	size_t pgsize = 0;</div><div class='del'>-	unsigned long pfn = pte_pfn(pte), dpfn;</div><div class='ctx'> 	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='ctx'> 	pte_t orig_pte;</div><div class='ctx'> </div><div class='add'>+	VM_WARN_ON(!pte_present(pte));</div><div class='add'>+</div><div class='ctx'> 	if (!pte_cont(pte))</div><div class='ctx'> 		return __ptep_set_access_flags(vma, addr, ptep, pte, dirty);</div><div class='ctx'> </div><div class='del'>-	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	ncontig = num_contig_ptes(huge_page_size(hstate_vma(vma)), &amp;pgsize);</div><div class='ctx'> </div><div class='ctx'> 	if (!__cont_access_flags_changed(ptep, pte, ncontig))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	orig_pte = get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='add'>+	VM_WARN_ON(!pte_present(orig_pte));</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure we don't lose the dirty or young state */</div><div class='ctx'> 	if (pte_dirty(orig_pte))</div><div class='hunk'>@@ -458,38 +449,31 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 	if (pte_young(orig_pte))</div><div class='ctx'> 		pte = pte_mkyoung(pte);</div><div class='ctx'> </div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='del'>-</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void huge_ptep_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> 			     unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pfn, dpfn;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='del'>-	int ncontig, i;</div><div class='add'>+	int ncontig;</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	pte_t pte;</div><div class='ctx'> </div><div class='del'>-	if (!pte_cont(__ptep_get(ptep))) {</div><div class='add'>+	pte = __ptep_get(ptep);</div><div class='add'>+	VM_WARN_ON(!pte_present(pte));</div><div class='add'>+</div><div class='add'>+	if (!pte_cont(pte)) {</div><div class='ctx'> 		__ptep_set_wrprotect(mm, addr, ptep);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	pte = get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> 	pte = pte_wrprotect(pte);</div><div class='ctx'> </div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='del'>-	pfn = pte_pfn(pte);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='hunk'>@@ -499,15 +483,24 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	int ncontig;</div><div class='ctx'> </div><div class='del'>-	if (!pte_cont(__ptep_get(ptep)))</div><div class='del'>-		return ptep_clear_flush(vma, addr, ptep);</div><div class='del'>-</div><div class='del'>-	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='add'>+	ncontig = num_contig_ptes(huge_page_size(hstate_vma(vma)), &amp;pgsize);</div><div class='ctx'> 	return get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init hugetlbpage_init(void)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * HugeTLB pages are supported on maximum four page table</div><div class='add'>+	 * levels (PUD, CONT PMD, PMD, CONT PTE) for a given base</div><div class='add'>+	 * page size, corresponding to hugetlb_add_hstate() calls</div><div class='add'>+	 * here.</div><div class='add'>+	 *</div><div class='add'>+	 * HUGE_MAX_HSTATE should at least match maximum supported</div><div class='add'>+	 * HugeTLB page sizes on the platform. Any new addition to</div><div class='add'>+	 * supported HugeTLB page sizes will also require changing</div><div class='add'>+	 * HUGE_MAX_HSTATE as well.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(HUGE_MAX_HSTATE &lt; 4);</div><div class='ctx'> 	if (pud_sect_supported())</div><div class='ctx'> 		hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -526,6 +519,8 @@ bool __init arch_hugetlb_valid_size(unsigned long size)</div><div class='ctx'> </div><div class='ctx'> pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='add'>+	unsigned long psize = huge_page_size(hstate_vma(vma));</div><div class='add'>+</div><div class='ctx'> 	if (alternative_has_cap_unlikely(ARM64_WORKAROUND_2645198)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Break-before-make (BBM) is required for all user space mappings</div><div class='hunk'>@@ -535,7 +530,7 @@ pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr</div><div class='ctx'> 		if (pte_user_exec(__ptep_get(ptep)))</div><div class='ctx'> 			return huge_ptep_clear_flush(vma, addr, ptep);</div><div class='ctx'> 	}</div><div class='del'>-	return huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep);</div><div class='add'>+	return huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep, psize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep,</div><div class='head'>diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c<br/>index 27a32ff15412..524d34a0e921 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/init.c</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include &lt;asm/kvm_host.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='add'>+#include &lt;asm/rsi.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -97,34 +98,23 @@ static void __init arch_reserve_crashkernel(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long low_size = 0;</div><div class='ctx'> 	unsigned long long crash_base, crash_size;</div><div class='del'>-	char *cmdline = boot_command_line;</div><div class='ctx'> 	bool high = false;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_CRASH_RESERVE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret = parse_crashkernel(cmdline, memblock_phys_mem_size(),</div><div class='add'>+	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),</div><div class='ctx'> 				&amp;crash_size, &amp;crash_base,</div><div class='del'>-				&amp;low_size, &amp;high);</div><div class='add'>+				&amp;low_size, NULL, &amp;high);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	reserve_crashkernel_generic(cmdline, crash_size, crash_base,</div><div class='del'>-				    low_size, high);</div><div class='add'>+	reserve_crashkernel_generic(crash_size, crash_base, low_size, high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static phys_addr_t __init max_zone_phys(phys_addr_t zone_limit)</div><div class='ctx'> {</div><div class='del'>-	/**</div><div class='del'>-	 * Information we get from firmware (e.g. DT dma-ranges) describe DMA</div><div class='del'>-	 * bus constraints. Devices using DMA might have their own limitations.</div><div class='del'>-	 * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM</div><div class='del'>-	 * DMA zone on platforms that have RAM there.</div><div class='del'>-	 */</div><div class='del'>-	if (memblock_start_of_DRAM() &lt; U32_MAX)</div><div class='del'>-		zone_limit = min(zone_limit, U32_MAX);</div><div class='del'>-</div><div class='ctx'> 	return min(zone_limit, memblock_end_of_DRAM() - 1) + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +130,14 @@ static void __init zone_sizes_init(void)</div><div class='ctx'> 	acpi_zone_dma_limit = acpi_iort_dma_get_max_cpu_address();</div><div class='ctx'> 	dt_zone_dma_limit = of_dma_get_max_cpu_address(NULL);</div><div class='ctx'> 	zone_dma_limit = min(dt_zone_dma_limit, acpi_zone_dma_limit);</div><div class='add'>+	/*</div><div class='add'>+	 * Information we get from firmware (e.g. DT dma-ranges) describe DMA</div><div class='add'>+	 * bus constraints. Devices using DMA might have their own limitations.</div><div class='add'>+	 * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM</div><div class='add'>+	 * DMA zone on platforms that have RAM there.</div><div class='add'>+	 */</div><div class='add'>+	if (memblock_start_of_DRAM() &lt; U32_MAX)</div><div class='add'>+		zone_dma_limit = min(zone_dma_limit, U32_MAX);</div><div class='ctx'> 	arm64_dma_phys_limit = max_zone_phys(zone_dma_limit);</div><div class='ctx'> 	max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -245,7 +243,7 @@ void __init arm64_memblock_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (memory_limit != PHYS_ADDR_MAX) {</div><div class='ctx'> 		memblock_mem_limit_remove_map(memory_limit);</div><div class='del'>-		memblock_add(__pa_symbol(_text), (u64)(_end - _text));</div><div class='add'>+		memblock_add(__pa_symbol(_text), (resource_size_t)(_end - _text));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) &amp;&amp; phys_initrd_size) {</div><div class='hunk'>@@ -254,8 +252,8 @@ void __init arm64_memblock_init(void)</div><div class='ctx'> 		 * initrd to become inaccessible via the linear mapping.</div><div class='ctx'> 		 * Otherwise, this is a no-op</div><div class='ctx'> 		 */</div><div class='del'>-		u64 base = phys_initrd_start &amp; PAGE_MASK;</div><div class='del'>-		u64 size = PAGE_ALIGN(phys_initrd_start + phys_initrd_size) - base;</div><div class='add'>+		phys_addr_t base = phys_initrd_start &amp; PAGE_MASK;</div><div class='add'>+		resource_size_t size = PAGE_ALIGN(phys_initrd_start + phys_initrd_size) - base;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We can only add back the initrd memory if we don't end up</div><div class='hunk'>@@ -277,31 +275,11 @@ void __init arm64_memblock_init(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {</div><div class='del'>-		extern u16 memstart_offset_seed;</div><div class='del'>-		u64 mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);</div><div class='del'>-		int parange = cpuid_feature_extract_unsigned_field(</div><div class='del'>-					mmfr0, ID_AA64MMFR0_EL1_PARANGE_SHIFT);</div><div class='del'>-		s64 range = linear_region_size -</div><div class='del'>-			    BIT(id_aa64mmfr0_parange_to_phys_shift(parange));</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If the size of the linear region exceeds, by a sufficient</div><div class='del'>-		 * margin, the size of the region that the physical memory can</div><div class='del'>-		 * span, randomize the linear region as well.</div><div class='del'>-		 */</div><div class='del'>-		if (memstart_offset_seed &gt; 0 &amp;&amp; range &gt;= (s64)ARM64_MEMSTART_ALIGN) {</div><div class='del'>-			range /= ARM64_MEMSTART_ALIGN;</div><div class='del'>-			memstart_addr -= ARM64_MEMSTART_ALIGN *</div><div class='del'>-					 ((range * memstart_offset_seed) &gt;&gt; 16);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Register the kernel text, kernel data, initrd, and initial</div><div class='ctx'> 	 * pagetables with memblock.</div><div class='ctx'> 	 */</div><div class='del'>-	memblock_reserve(__pa_symbol(_stext), _end - _stext);</div><div class='add'>+	memblock_reserve(__pa_symbol(_text), _end - _text);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) &amp;&amp; phys_initrd_size) {</div><div class='ctx'> 		/* the generic initrd code expects virtual addresses */</div><div class='ctx'> 		initrd_start = __phys_to_virt(phys_initrd_start);</div><div class='hunk'>@@ -309,8 +287,6 @@ void __init arm64_memblock_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	early_init_fdt_scan_reserved_mem();</div><div class='del'>-</div><div class='del'>-	high_memory = __va(memblock_end_of_DRAM() - 1) + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init bootmem_init(void)</div><div class='hunk'>@@ -359,15 +335,16 @@ void __init bootmem_init(void)</div><div class='ctx'> 	memblock_dump_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * mem_init() marks the free areas in the mem_map and tells us how much memory</div><div class='del'>- * is free.  This is done after various parts of the system have claimed their</div><div class='del'>- * memory after the kernel image.</div><div class='del'>- */</div><div class='del'>-void __init mem_init(void)</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='ctx'> {</div><div class='add'>+	unsigned int flags = SWIOTLB_VERBOSE;</div><div class='ctx'> 	bool swiotlb = max_pfn &gt; PFN_DOWN(arm64_dma_phys_limit);</div><div class='ctx'> </div><div class='add'>+	if (is_realm_world()) {</div><div class='add'>+		swiotlb = true;</div><div class='add'>+		flags |= SWIOTLB_FORCE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC) &amp;&amp; !swiotlb) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If no bouncing needed for ZONE_DMA, reduce the swiotlb</div><div class='hunk'>@@ -379,10 +356,8 @@ void __init mem_init(void)</div><div class='ctx'> 		swiotlb = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	swiotlb_init(swiotlb, SWIOTLB_VERBOSE);</div><div class='del'>-</div><div class='del'>-	/* this will put all unused low memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='add'>+	swiotlb_init(swiotlb, flags);</div><div class='add'>+	swiotlb_update_mem_attributes();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check boundaries twice: Some fundamental inconsistencies can be</div><div class='head'>diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c<br/>index 6cc0b7e7eb03..10e246f11271 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/ioremap.c</a></div><div class='hunk'>@@ -15,10 +15,9 @@ int arm64_ioremap_prot_hook_register(ioremap_prot_hook_t hook)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,</div><div class='del'>-			   unsigned long prot)</div><div class='add'>+			   pgprot_t pgprot)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long last_addr = phys_addr + size - 1;</div><div class='del'>-	pgprot_t pgprot = __pgprot(prot);</div><div class='ctx'> </div><div class='ctx'> 	/* Don't allow outside PHYS_MASK */</div><div class='ctx'> 	if (last_addr &amp; ~PHYS_MASK)</div><div class='head'>diff --git a/arch/arm64/mm/kasan_init.c b/arch/arm64/mm/kasan_init.c<br/>index b65a29440a0c..abeb81bf6ebd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/kasan_init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/kasan_init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/kasan_init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/kasan_init.c</a></div><div class='hunk'>@@ -190,7 +190,7 @@ static void __init kasan_pgd_populate(unsigned long addr, unsigned long end,</div><div class='ctx'>  */</div><div class='ctx'> static bool __init root_level_aligned(u64 addr)</div><div class='ctx'> {</div><div class='del'>-	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 1) * (PAGE_SHIFT - 3);</div><div class='add'>+	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 1) * PTDESC_TABLE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	return (addr % (PAGE_SIZE &lt;&lt; shift)) == 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -245,7 +245,7 @@ static int __init root_level_idx(u64 addr)</div><div class='ctx'> 	 */</div><div class='ctx'> 	u64 vabits = IS_ENABLED(CONFIG_ARM64_64K_PAGES) ? VA_BITS</div><div class='ctx'> 							: vabits_actual;</div><div class='del'>-	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits) - 1) * (PAGE_SHIFT - 3);</div><div class='add'>+	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits) - 1) * PTDESC_TABLE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	return (addr &amp; ~_PAGE_OFFSET(vabits)) &gt;&gt; (shift + PAGE_SHIFT);</div><div class='ctx'> }</div><div class='hunk'>@@ -269,7 +269,7 @@ static void __init clone_next_level(u64 addr, pgd_t *tmp_pg_dir, pud_t *pud)</div><div class='ctx'>  */</div><div class='ctx'> static int __init next_level_idx(u64 addr)</div><div class='ctx'> {</div><div class='del'>-	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 2) * (PAGE_SHIFT - 3);</div><div class='add'>+	int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 2) * PTDESC_TABLE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	return (addr &gt;&gt; (shift + PAGE_SHIFT)) % PTRS_PER_PTE;</div><div class='ctx'> }</div><div class='hunk'>@@ -399,14 +399,12 @@ void __init kasan_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	kasan_init_shadow();</div><div class='ctx'> 	kasan_init_depth();</div><div class='del'>-#if defined(CONFIG_KASAN_GENERIC)</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Generic KASAN is now fully initialized.</div><div class='ctx'> 	 * Software and Hardware Tag-Based modes still require</div><div class='ctx'> 	 * kasan_init_sw_tags() and kasan_init_hw_tags() correspondingly.</div><div class='ctx'> 	 */</div><div class='del'>-	pr_info("KernelAddressSanitizer initialized (generic)\n");</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KASAN_GENERIC || CONFIG_KASAN_SW_TAGS */</div><div class='head'>diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c<br/>index 7e3ad97e27d8..08ee177432c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/mmap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/mmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/mmap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/mmap.c</a></div><div class='hunk'>@@ -81,10 +81,17 @@ static int __init adjust_protection_map(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(adjust_protection_map);</div><div class='ctx'> </div><div class='del'>-pgprot_t vm_get_page_prot(unsigned long vm_flags)</div><div class='add'>+pgprot_t vm_get_page_prot(vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='del'>-	pteval_t prot = pgprot_val(protection_map[vm_flags &amp;</div><div class='add'>+	ptdesc_t prot;</div><div class='add'>+</div><div class='add'>+	/* Short circuit GCS to avoid bloating the table. */</div><div class='add'>+	if (system_supports_gcs() &amp;&amp; (vm_flags &amp; VM_SHADOW_STACK)) {</div><div class='add'>+		prot = _PAGE_GCS_RO;</div><div class='add'>+	} else {</div><div class='add'>+		prot = pgprot_val(protection_map[vm_flags &amp;</div><div class='ctx'> 				   (VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (vm_flags &amp; VM_ARM64_BTI)</div><div class='ctx'> 		prot |= PTE_GP;</div><div class='head'>diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c<br/>index e55b02fbddc8..b8d37eb037fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/mmu.c</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> #include &lt;linux/set_memory.h&gt;</div><div class='ctx'> #include &lt;linux/kfence.h&gt;</div><div class='ctx'> #include &lt;linux/pkeys.h&gt;</div><div class='add'>+#include &lt;linux/mm_inline.h&gt;</div><div class='add'>+#include &lt;linux/pagewalk.h&gt;</div><div class='add'>+#include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='hunk'>@@ -46,6 +49,8 @@</div><div class='ctx'> #define NO_CONT_MAPPINGS	BIT(1)</div><div class='ctx'> #define NO_EXEC_MAPPINGS	BIT(2)	/* assumes FEAT_HPDS is not used */</div><div class='ctx'> </div><div class='add'>+DEFINE_STATIC_KEY_FALSE(arm64_ptdump_lock_key);</div><div class='add'>+</div><div class='ctx'> u64 kimage_voffset __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL(kimage_voffset);</div><div class='ctx'> </div><div class='hunk'>@@ -107,7 +112,7 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phys_mem_access_prot);</div><div class='ctx'> </div><div class='del'>-static phys_addr_t __init early_pgtable_alloc(int shift)</div><div class='add'>+static phys_addr_t __init early_pgtable_alloc(enum pgtable_type pgtable_type)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t phys;</div><div class='ctx'> </div><div class='hunk'>@@ -119,7 +124,7 @@ static phys_addr_t __init early_pgtable_alloc(int shift)</div><div class='ctx'> 	return phys;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool pgattr_change_is_safe(u64 old, u64 new)</div><div class='add'>+bool pgattr_change_is_safe(pteval_t old, pteval_t new)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The following mapping attributes may be updated in live</div><div class='hunk'>@@ -192,7 +197,7 @@ static void init_pte(pte_t *ptep, unsigned long addr, unsigned long end,</div><div class='ctx'> static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> 				unsigned long end, phys_addr_t phys,</div><div class='ctx'> 				pgprot_t prot,</div><div class='del'>-				phys_addr_t (*pgtable_alloc)(int),</div><div class='add'>+				phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='ctx'> 				int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='hunk'>@@ -201,13 +206,13 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(pmd_sect(pmd));</div><div class='ctx'> 	if (pmd_none(pmd)) {</div><div class='del'>-		pmdval_t pmdval = PMD_TYPE_TABLE | PMD_TABLE_UXN;</div><div class='add'>+		pmdval_t pmdval = PMD_TYPE_TABLE | PMD_TABLE_UXN | PMD_TABLE_AF;</div><div class='ctx'> 		phys_addr_t pte_phys;</div><div class='ctx'> </div><div class='ctx'> 		if (flags &amp; NO_EXEC_MAPPINGS)</div><div class='ctx'> 			pmdval |= PMD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='del'>-		pte_phys = pgtable_alloc(PAGE_SHIFT);</div><div class='add'>+		pte_phys = pgtable_alloc(TABLE_PTE);</div><div class='ctx'> 		ptep = pte_set_fixmap(pte_phys);</div><div class='ctx'> 		init_clear_pgtable(ptep);</div><div class='ctx'> 		ptep += pte_index(addr);</div><div class='hunk'>@@ -243,7 +248,7 @@ static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> static void init_pmd(pmd_t *pmdp, unsigned long addr, unsigned long end,</div><div class='ctx'> 		     phys_addr_t phys, pgprot_t prot,</div><div class='del'>-		     phys_addr_t (*pgtable_alloc)(int), int flags)</div><div class='add'>+		     phys_addr_t (*pgtable_alloc)(enum pgtable_type), int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +282,8 @@ static void init_pmd(pmd_t *pmdp, unsigned long addr, unsigned long end,</div><div class='ctx'> static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> 				unsigned long end, phys_addr_t phys,</div><div class='ctx'> 				pgprot_t prot,</div><div class='del'>-				phys_addr_t (*pgtable_alloc)(int), int flags)</div><div class='add'>+				phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='add'>+				int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> 	pud_t pud = READ_ONCE(*pudp);</div><div class='hunk'>@@ -288,13 +294,13 @@ static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> 	 */</div><div class='ctx'> 	BUG_ON(pud_sect(pud));</div><div class='ctx'> 	if (pud_none(pud)) {</div><div class='del'>-		pudval_t pudval = PUD_TYPE_TABLE | PUD_TABLE_UXN;</div><div class='add'>+		pudval_t pudval = PUD_TYPE_TABLE | PUD_TABLE_UXN | PUD_TABLE_AF;</div><div class='ctx'> 		phys_addr_t pmd_phys;</div><div class='ctx'> </div><div class='ctx'> 		if (flags &amp; NO_EXEC_MAPPINGS)</div><div class='ctx'> 			pudval |= PUD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='del'>-		pmd_phys = pgtable_alloc(PMD_SHIFT);</div><div class='add'>+		pmd_phys = pgtable_alloc(TABLE_PMD);</div><div class='ctx'> 		pmdp = pmd_set_fixmap(pmd_phys);</div><div class='ctx'> 		init_clear_pgtable(pmdp);</div><div class='ctx'> 		pmdp += pmd_index(addr);</div><div class='hunk'>@@ -325,7 +331,7 @@ static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,</div><div class='ctx'> 			   phys_addr_t phys, pgprot_t prot,</div><div class='del'>-			   phys_addr_t (*pgtable_alloc)(int),</div><div class='add'>+			   phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='ctx'> 			   int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='hunk'>@@ -333,13 +339,13 @@ static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,</div><div class='ctx'> 	pud_t *pudp;</div><div class='ctx'> </div><div class='ctx'> 	if (p4d_none(p4d)) {</div><div class='del'>-		p4dval_t p4dval = P4D_TYPE_TABLE | P4D_TABLE_UXN;</div><div class='add'>+		p4dval_t p4dval = P4D_TYPE_TABLE | P4D_TABLE_UXN | P4D_TABLE_AF;</div><div class='ctx'> 		phys_addr_t pud_phys;</div><div class='ctx'> </div><div class='ctx'> 		if (flags &amp; NO_EXEC_MAPPINGS)</div><div class='ctx'> 			p4dval |= P4D_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='del'>-		pud_phys = pgtable_alloc(PUD_SHIFT);</div><div class='add'>+		pud_phys = pgtable_alloc(TABLE_PUD);</div><div class='ctx'> 		pudp = pud_set_fixmap(pud_phys);</div><div class='ctx'> 		init_clear_pgtable(pudp);</div><div class='ctx'> 		pudp += pud_index(addr);</div><div class='hunk'>@@ -383,7 +389,7 @@ static void alloc_init_pud(p4d_t *p4dp, unsigned long addr, unsigned long end,</div><div class='ctx'> </div><div class='ctx'> static void alloc_init_p4d(pgd_t *pgdp, unsigned long addr, unsigned long end,</div><div class='ctx'> 			   phys_addr_t phys, pgprot_t prot,</div><div class='del'>-			   phys_addr_t (*pgtable_alloc)(int),</div><div class='add'>+			   phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='ctx'> 			   int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='hunk'>@@ -391,13 +397,13 @@ static void alloc_init_p4d(pgd_t *pgdp, unsigned long addr, unsigned long end,</div><div class='ctx'> 	p4d_t *p4dp;</div><div class='ctx'> </div><div class='ctx'> 	if (pgd_none(pgd)) {</div><div class='del'>-		pgdval_t pgdval = PGD_TYPE_TABLE | PGD_TABLE_UXN;</div><div class='add'>+		pgdval_t pgdval = PGD_TYPE_TABLE | PGD_TABLE_UXN | PGD_TABLE_AF;</div><div class='ctx'> 		phys_addr_t p4d_phys;</div><div class='ctx'> </div><div class='ctx'> 		if (flags &amp; NO_EXEC_MAPPINGS)</div><div class='ctx'> 			pgdval |= PGD_TABLE_PXN;</div><div class='ctx'> 		BUG_ON(!pgtable_alloc);</div><div class='del'>-		p4d_phys = pgtable_alloc(P4D_SHIFT);</div><div class='add'>+		p4d_phys = pgtable_alloc(TABLE_P4D);</div><div class='ctx'> 		p4dp = p4d_set_fixmap(p4d_phys);</div><div class='ctx'> 		init_clear_pgtable(p4dp);</div><div class='ctx'> 		p4dp += p4d_index(addr);</div><div class='hunk'>@@ -427,7 +433,7 @@ static void alloc_init_p4d(pgd_t *pgdp, unsigned long addr, unsigned long end,</div><div class='ctx'> static void __create_pgd_mapping_locked(pgd_t *pgdir, phys_addr_t phys,</div><div class='ctx'> 					unsigned long virt, phys_addr_t size,</div><div class='ctx'> 					pgprot_t prot,</div><div class='del'>-					phys_addr_t (*pgtable_alloc)(int),</div><div class='add'>+					phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='ctx'> 					int flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr, end, next;</div><div class='hunk'>@@ -455,7 +461,7 @@ static void __create_pgd_mapping_locked(pgd_t *pgdir, phys_addr_t phys,</div><div class='ctx'> static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,</div><div class='ctx'> 				 unsigned long virt, phys_addr_t size,</div><div class='ctx'> 				 pgprot_t prot,</div><div class='del'>-				 phys_addr_t (*pgtable_alloc)(int),</div><div class='add'>+				 phys_addr_t (*pgtable_alloc)(enum pgtable_type),</div><div class='ctx'> 				 int flags)</div><div class='ctx'> {</div><div class='ctx'> 	mutex_lock(&amp;fixmap_lock);</div><div class='hunk'>@@ -464,41 +470,424 @@ static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,</div><div class='ctx'> 	mutex_unlock(&amp;fixmap_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_UNMAP_KERNEL_AT_EL0</div><div class='del'>-extern __alias(__create_pgd_mapping_locked)</div><div class='del'>-void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys, unsigned long virt,</div><div class='del'>-			     phys_addr_t size, pgprot_t prot,</div><div class='del'>-			     phys_addr_t (*pgtable_alloc)(int), int flags);</div><div class='del'>-#endif</div><div class='add'>+#define INVALID_PHYS_ADDR	(-1ULL)</div><div class='ctx'> </div><div class='del'>-static phys_addr_t __pgd_pgtable_alloc(int shift)</div><div class='add'>+static phys_addr_t __pgd_pgtable_alloc(struct mm_struct *mm, gfp_t gfp,</div><div class='add'>+				       enum pgtable_type pgtable_type)</div><div class='ctx'> {</div><div class='ctx'> 	/* Page is zeroed by init_clear_pgtable() so don't duplicate effort. */</div><div class='del'>-	void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL &amp; ~__GFP_ZERO);</div><div class='add'>+	struct ptdesc *ptdesc = pagetable_alloc(gfp &amp; ~__GFP_ZERO, 0);</div><div class='add'>+	phys_addr_t pa;</div><div class='add'>+</div><div class='add'>+	if (!ptdesc)</div><div class='add'>+		return INVALID_PHYS_ADDR;</div><div class='add'>+</div><div class='add'>+	pa = page_to_phys(ptdesc_page(ptdesc));</div><div class='add'>+</div><div class='add'>+	switch (pgtable_type) {</div><div class='add'>+	case TABLE_PTE:</div><div class='add'>+		BUG_ON(!pagetable_pte_ctor(mm, ptdesc));</div><div class='add'>+		break;</div><div class='add'>+	case TABLE_PMD:</div><div class='add'>+		BUG_ON(!pagetable_pmd_ctor(mm, ptdesc));</div><div class='add'>+		break;</div><div class='add'>+	case TABLE_PUD:</div><div class='add'>+		pagetable_pud_ctor(ptdesc);</div><div class='add'>+		break;</div><div class='add'>+	case TABLE_P4D:</div><div class='add'>+		pagetable_p4d_ctor(ptdesc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phys_addr_t</div><div class='add'>+try_pgd_pgtable_alloc_init_mm(enum pgtable_type pgtable_type, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	return __pgd_pgtable_alloc(&amp;init_mm, gfp, pgtable_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phys_addr_t __maybe_unused</div><div class='add'>+pgd_pgtable_alloc_init_mm(enum pgtable_type pgtable_type)</div><div class='add'>+{</div><div class='add'>+	phys_addr_t pa;</div><div class='add'>+</div><div class='add'>+	pa = __pgd_pgtable_alloc(&amp;init_mm, GFP_PGTABLE_KERNEL, pgtable_type);</div><div class='add'>+	BUG_ON(pa == INVALID_PHYS_ADDR);</div><div class='add'>+	return pa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phys_addr_t</div><div class='add'>+pgd_pgtable_alloc_special_mm(enum pgtable_type pgtable_type)</div><div class='add'>+{</div><div class='add'>+	phys_addr_t pa;</div><div class='add'>+</div><div class='add'>+	pa = __pgd_pgtable_alloc(NULL, GFP_PGTABLE_KERNEL, pgtable_type);</div><div class='add'>+	BUG_ON(pa == INVALID_PHYS_ADDR);</div><div class='add'>+	return pa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void split_contpte(pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ptep = PTR_ALIGN_DOWN(ptep, sizeof(*ptep) * CONT_PTES);</div><div class='add'>+	for (i = 0; i &lt; CONT_PTES; i++, ptep++)</div><div class='add'>+		__set_pte(ptep, pte_mknoncont(__ptep_get(ptep)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int split_pmd(pmd_t *pmdp, pmd_t pmd, gfp_t gfp, bool to_cont)</div><div class='add'>+{</div><div class='add'>+	pmdval_t tableprot = PMD_TYPE_TABLE | PMD_TABLE_UXN | PMD_TABLE_AF;</div><div class='add'>+	unsigned long pfn = pmd_pfn(pmd);</div><div class='add'>+	pgprot_t prot = pmd_pgprot(pmd);</div><div class='add'>+	phys_addr_t pte_phys;</div><div class='add'>+	pte_t *ptep;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pte_phys = try_pgd_pgtable_alloc_init_mm(TABLE_PTE, gfp);</div><div class='add'>+	if (pte_phys == INVALID_PHYS_ADDR)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ptep = (pte_t *)phys_to_virt(pte_phys);</div><div class='add'>+</div><div class='add'>+	if (pgprot_val(prot) &amp; PMD_SECT_PXN)</div><div class='add'>+		tableprot |= PMD_TABLE_PXN;</div><div class='add'>+</div><div class='add'>+	prot = __pgprot((pgprot_val(prot) &amp; ~PTE_TYPE_MASK) | PTE_TYPE_PAGE);</div><div class='add'>+	prot = __pgprot(pgprot_val(prot) &amp; ~PTE_CONT);</div><div class='add'>+	if (to_cont)</div><div class='add'>+		prot = __pgprot(pgprot_val(prot) | PTE_CONT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PTE; i++, ptep++, pfn++)</div><div class='add'>+		__set_pte(ptep, pfn_pte(pfn, prot));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure the pte entries are visible to the table walker by the time</div><div class='add'>+	 * the pmd entry that points to the ptes is visible.</div><div class='add'>+	 */</div><div class='add'>+	dsb(ishst);</div><div class='add'>+	__pmd_populate(pmdp, pte_phys, tableprot);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void split_contpmd(pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pmdp = PTR_ALIGN_DOWN(pmdp, sizeof(*pmdp) * CONT_PMDS);</div><div class='add'>+	for (i = 0; i &lt; CONT_PMDS; i++, pmdp++)</div><div class='add'>+		set_pmd(pmdp, pmd_mknoncont(pmdp_get(pmdp)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int split_pud(pud_t *pudp, pud_t pud, gfp_t gfp, bool to_cont)</div><div class='add'>+{</div><div class='add'>+	pudval_t tableprot = PUD_TYPE_TABLE | PUD_TABLE_UXN | PUD_TABLE_AF;</div><div class='add'>+	unsigned int step = PMD_SIZE &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	unsigned long pfn = pud_pfn(pud);</div><div class='add'>+	pgprot_t prot = pud_pgprot(pud);</div><div class='add'>+	phys_addr_t pmd_phys;</div><div class='add'>+	pmd_t *pmdp;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pmd_phys = try_pgd_pgtable_alloc_init_mm(TABLE_PMD, gfp);</div><div class='add'>+	if (pmd_phys == INVALID_PHYS_ADDR)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	pmdp = (pmd_t *)phys_to_virt(pmd_phys);</div><div class='add'>+</div><div class='add'>+	if (pgprot_val(prot) &amp; PMD_SECT_PXN)</div><div class='add'>+		tableprot |= PUD_TABLE_PXN;</div><div class='add'>+</div><div class='add'>+	prot = __pgprot((pgprot_val(prot) &amp; ~PMD_TYPE_MASK) | PMD_TYPE_SECT);</div><div class='add'>+	prot = __pgprot(pgprot_val(prot) &amp; ~PTE_CONT);</div><div class='add'>+	if (to_cont)</div><div class='add'>+		prot = __pgprot(pgprot_val(prot) | PTE_CONT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PMD; i++, pmdp++, pfn += step)</div><div class='add'>+		set_pmd(pmdp, pfn_pmd(pfn, prot));</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!ptr);</div><div class='del'>-	return __pa(ptr);</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure the pmd entries are visible to the table walker by the time</div><div class='add'>+	 * the pud entry that points to the pmds is visible.</div><div class='add'>+	 */</div><div class='add'>+	dsb(ishst);</div><div class='add'>+	__pud_populate(pudp, pmd_phys, tableprot);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int split_kernel_leaf_mapping_locked(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	pgd_t *pgdp, pgd;</div><div class='add'>+	p4d_t *p4dp, p4d;</div><div class='add'>+	pud_t *pudp, pud;</div><div class='add'>+	pmd_t *pmdp, pmd;</div><div class='add'>+	pte_t *ptep, pte;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * PGD: If addr is PGD aligned then addr already describes a leaf</div><div class='add'>+	 * boundary. If not present then there is nothing to split.</div><div class='add'>+	 */</div><div class='add'>+	if (ALIGN_DOWN(addr, PGDIR_SIZE) == addr)</div><div class='add'>+		goto out;</div><div class='add'>+	pgdp = pgd_offset_k(addr);</div><div class='add'>+	pgd = pgdp_get(pgdp);</div><div class='add'>+	if (!pgd_present(pgd))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * P4D: If addr is P4D aligned then addr already describes a leaf</div><div class='add'>+	 * boundary. If not present then there is nothing to split.</div><div class='add'>+	 */</div><div class='add'>+	if (ALIGN_DOWN(addr, P4D_SIZE) == addr)</div><div class='add'>+		goto out;</div><div class='add'>+	p4dp = p4d_offset(pgdp, addr);</div><div class='add'>+	p4d = p4dp_get(p4dp);</div><div class='add'>+	if (!p4d_present(p4d))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * PUD: If addr is PUD aligned then addr already describes a leaf</div><div class='add'>+	 * boundary. If not present then there is nothing to split. Otherwise,</div><div class='add'>+	 * if we have a pud leaf, split to contpmd.</div><div class='add'>+	 */</div><div class='add'>+	if (ALIGN_DOWN(addr, PUD_SIZE) == addr)</div><div class='add'>+		goto out;</div><div class='add'>+	pudp = pud_offset(p4dp, addr);</div><div class='add'>+	pud = pudp_get(pudp);</div><div class='add'>+	if (!pud_present(pud))</div><div class='add'>+		goto out;</div><div class='add'>+	if (pud_leaf(pud)) {</div><div class='add'>+		ret = split_pud(pudp, pud, GFP_PGTABLE_KERNEL, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CONTPMD: If addr is CONTPMD aligned then addr already describes a</div><div class='add'>+	 * leaf boundary. If not present then there is nothing to split.</div><div class='add'>+	 * Otherwise, if we have a contpmd leaf, split to pmd.</div><div class='add'>+	 */</div><div class='add'>+	if (ALIGN_DOWN(addr, CONT_PMD_SIZE) == addr)</div><div class='add'>+		goto out;</div><div class='add'>+	pmdp = pmd_offset(pudp, addr);</div><div class='add'>+	pmd = pmdp_get(pmdp);</div><div class='add'>+	if (!pmd_present(pmd))</div><div class='add'>+		goto out;</div><div class='add'>+	if (pmd_leaf(pmd)) {</div><div class='add'>+		if (pmd_cont(pmd))</div><div class='add'>+			split_contpmd(pmdp);</div><div class='add'>+		/*</div><div class='add'>+		 * PMD: If addr is PMD aligned then addr already describes a</div><div class='add'>+		 * leaf boundary. Otherwise, split to contpte.</div><div class='add'>+		 */</div><div class='add'>+		if (ALIGN_DOWN(addr, PMD_SIZE) == addr)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = split_pmd(pmdp, pmd, GFP_PGTABLE_KERNEL, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CONTPTE: If addr is CONTPTE aligned then addr already describes a</div><div class='add'>+	 * leaf boundary. If not present then there is nothing to split.</div><div class='add'>+	 * Otherwise, if we have a contpte leaf, split to pte.</div><div class='add'>+	 */</div><div class='add'>+	if (ALIGN_DOWN(addr, CONT_PTE_SIZE) == addr)</div><div class='add'>+		goto out;</div><div class='add'>+	ptep = pte_offset_kernel(pmdp, addr);</div><div class='add'>+	pte = __ptep_get(ptep);</div><div class='add'>+	if (!pte_present(pte))</div><div class='add'>+		goto out;</div><div class='add'>+	if (pte_cont(pte))</div><div class='add'>+		split_contpte(ptep);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static phys_addr_t pgd_pgtable_alloc(int shift)</div><div class='add'>+static DEFINE_MUTEX(pgtable_split_lock);</div><div class='add'>+</div><div class='add'>+int split_kernel_leaf_mapping(unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	phys_addr_t pa = __pgd_pgtable_alloc(shift);</div><div class='del'>-	struct ptdesc *ptdesc = page_ptdesc(phys_to_page(pa));</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Call proper page table ctor in case later we need to</div><div class='del'>-	 * call core mm functions like apply_to_page_range() on</div><div class='del'>-	 * this pre-allocated page table.</div><div class='add'>+	 * !BBML2_NOABORT systems should not be trying to change permissions on</div><div class='add'>+	 * anything that is not pte-mapped in the first place. Just return early</div><div class='add'>+	 * and let the permission change code raise a warning if not already</div><div class='add'>+	 * pte-mapped.</div><div class='add'>+	 */</div><div class='add'>+	if (!system_supports_bbml2_noabort())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure start and end are at least page-aligned since this is the</div><div class='add'>+	 * finest granularity we can split to.</div><div class='add'>+	 */</div><div class='add'>+	if (start != PAGE_ALIGN(start) || end != PAGE_ALIGN(end))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pgtable_split_lock);</div><div class='add'>+	arch_enter_lazy_mmu_mode();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The split_kernel_leaf_mapping_locked() may sleep, it is not a</div><div class='add'>+	 * problem for ARM64 since ARM64's lazy MMU implementation allows</div><div class='add'>+	 * sleeping.</div><div class='ctx'> 	 *</div><div class='del'>-	 * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is</div><div class='del'>-	 * folded, and if so pagetable_pte_ctor() becomes nop.</div><div class='add'>+	 * Optimize for the common case of splitting out a single page from a</div><div class='add'>+	 * larger mapping. Here we can just split on the "least aligned" of</div><div class='add'>+	 * start and end and this will guarantee that there must also be a split</div><div class='add'>+	 * on the more aligned address since the both addresses must be in the</div><div class='add'>+	 * same contpte block and it must have been split to ptes.</div><div class='ctx'> 	 */</div><div class='del'>-	if (shift == PAGE_SHIFT)</div><div class='del'>-		BUG_ON(!pagetable_pte_ctor(ptdesc));</div><div class='del'>-	else if (shift == PMD_SHIFT)</div><div class='del'>-		BUG_ON(!pagetable_pmd_ctor(ptdesc));</div><div class='add'>+	if (end - start == PAGE_SIZE) {</div><div class='add'>+		start = __ffs(start) &lt; __ffs(end) ? start : end;</div><div class='add'>+		ret = split_kernel_leaf_mapping_locked(start);</div><div class='add'>+	} else {</div><div class='add'>+		ret = split_kernel_leaf_mapping_locked(start);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = split_kernel_leaf_mapping_locked(end);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return pa;</div><div class='add'>+	arch_leave_lazy_mmu_mode();</div><div class='add'>+	mutex_unlock(&amp;pgtable_split_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init split_to_ptes_pud_entry(pud_t *pudp, unsigned long addr,</div><div class='add'>+					  unsigned long next,</div><div class='add'>+					  struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pud_t pud = pudp_get(pudp);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (pud_leaf(pud))</div><div class='add'>+		ret = split_pud(pudp, pud, GFP_ATOMIC, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init split_to_ptes_pmd_entry(pmd_t *pmdp, unsigned long addr,</div><div class='add'>+					  unsigned long next,</div><div class='add'>+					  struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pmd_t pmd = pmdp_get(pmdp);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (pmd_leaf(pmd)) {</div><div class='add'>+		if (pmd_cont(pmd))</div><div class='add'>+			split_contpmd(pmdp);</div><div class='add'>+		ret = split_pmd(pmdp, pmd, GFP_ATOMIC, false);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We have split the pmd directly to ptes so there is no need to</div><div class='add'>+		 * visit each pte to check if they are contpte.</div><div class='add'>+		 */</div><div class='add'>+		walk-&gt;action = ACTION_CONTINUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init split_to_ptes_pte_entry(pte_t *ptep, unsigned long addr,</div><div class='add'>+					  unsigned long next,</div><div class='add'>+					  struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pte_t pte = __ptep_get(ptep);</div><div class='add'>+</div><div class='add'>+	if (pte_cont(pte))</div><div class='add'>+		split_contpte(ptep);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mm_walk_ops split_to_ptes_ops __initconst = {</div><div class='add'>+	.pud_entry	= split_to_ptes_pud_entry,</div><div class='add'>+	.pmd_entry	= split_to_ptes_pmd_entry,</div><div class='add'>+	.pte_entry	= split_to_ptes_pte_entry,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool linear_map_requires_bbml2 __initdata;</div><div class='add'>+</div><div class='add'>+u32 idmap_kpti_bbml2_flag;</div><div class='add'>+</div><div class='add'>+static void __init init_idmap_kpti_bbml2_flag(void)</div><div class='add'>+{</div><div class='add'>+	WRITE_ONCE(idmap_kpti_bbml2_flag, 1);</div><div class='add'>+	/* Must be visible to other CPUs before stop_machine() is called. */</div><div class='add'>+	smp_mb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init linear_map_split_to_ptes(void *__unused)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Repainting the linear map must be done by CPU0 (the boot CPU) because</div><div class='add'>+	 * that's the only CPU that we know supports BBML2. The other CPUs will</div><div class='add'>+	 * be held in a waiting area with the idmap active.</div><div class='add'>+	 */</div><div class='add'>+	if (!smp_processor_id()) {</div><div class='add'>+		unsigned long lstart = _PAGE_OFFSET(vabits_actual);</div><div class='add'>+		unsigned long lend = PAGE_END;</div><div class='add'>+		unsigned long kstart = (unsigned long)lm_alias(_stext);</div><div class='add'>+		unsigned long kend = (unsigned long)lm_alias(__init_begin);</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Wait for all secondary CPUs to be put into the waiting area.</div><div class='add'>+		 */</div><div class='add'>+		smp_cond_load_acquire(&amp;idmap_kpti_bbml2_flag, VAL == num_online_cpus());</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Walk all of the linear map [lstart, lend), except the kernel</div><div class='add'>+		 * linear map alias [kstart, kend), and split all mappings to</div><div class='add'>+		 * PTE. The kernel alias remains static throughout runtime so</div><div class='add'>+		 * can continue to be safely mapped with large mappings.</div><div class='add'>+		 */</div><div class='add'>+		ret = walk_kernel_page_table_range_lockless(lstart, kstart,</div><div class='add'>+						&amp;split_to_ptes_ops, NULL, NULL);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = walk_kernel_page_table_range_lockless(kend, lend,</div><div class='add'>+						&amp;split_to_ptes_ops, NULL, NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			panic("Failed to split linear map\n");</div><div class='add'>+		flush_tlb_kernel_range(lstart, lend);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Relies on dsb in flush_tlb_kernel_range() to avoid reordering</div><div class='add'>+		 * before any page table split operations.</div><div class='add'>+		 */</div><div class='add'>+		WRITE_ONCE(idmap_kpti_bbml2_flag, 0);</div><div class='add'>+	} else {</div><div class='add'>+		typedef void (wait_split_fn)(void);</div><div class='add'>+		extern wait_split_fn wait_linear_map_split_to_ptes;</div><div class='add'>+		wait_split_fn *wait_fn;</div><div class='add'>+</div><div class='add'>+		wait_fn = (void *)__pa_symbol(wait_linear_map_split_to_ptes);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * At least one secondary CPU doesn't support BBML2 so cannot</div><div class='add'>+		 * tolerate the size of the live mappings changing. So have the</div><div class='add'>+		 * secondary CPUs wait for the boot CPU to make the changes</div><div class='add'>+		 * with the idmap active and init_mm inactive.</div><div class='add'>+		 */</div><div class='add'>+		cpu_install_idmap();</div><div class='add'>+		wait_fn();</div><div class='add'>+		cpu_uninstall_idmap();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init linear_map_maybe_split_to_ptes(void)</div><div class='add'>+{</div><div class='add'>+	if (linear_map_requires_bbml2 &amp;&amp; !system_supports_bbml2_noabort()) {</div><div class='add'>+		init_idmap_kpti_bbml2_flag();</div><div class='add'>+		stop_machine(linear_map_split_to_ptes, NULL, cpu_online_mask);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -530,7 +919,7 @@ void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,</div><div class='ctx'> 		flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;</div><div class='ctx'> </div><div class='ctx'> 	__create_pgd_mapping(mm-&gt;pgd, phys, virt, size, prot,</div><div class='del'>-			     pgd_pgtable_alloc, flags);</div><div class='add'>+			     pgd_pgtable_alloc_special_mm, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_mapping_prot(phys_addr_t phys, unsigned long virt,</div><div class='hunk'>@@ -561,8 +950,8 @@ void __init mark_linear_text_alias_ro(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Remove the write permissions from the linear alias of .text/.rodata</div><div class='ctx'> 	 */</div><div class='del'>-	update_mapping_prot(__pa_symbol(_stext), (unsigned long)lm_alias(_stext),</div><div class='del'>-			    (unsigned long)__init_begin - (unsigned long)_stext,</div><div class='add'>+	update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),</div><div class='add'>+			    (unsigned long)__init_begin - (unsigned long)_text,</div><div class='ctx'> 			    PAGE_KERNEL_RO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -620,10 +1009,20 @@ static inline void arm64_kfence_map_pool(phys_addr_t kfence_pool, pgd_t *pgdp) {</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KFENCE */</div><div class='ctx'> </div><div class='add'>+static inline bool force_pte_mapping(void)</div><div class='add'>+{</div><div class='add'>+	bool bbml2 = system_capabilities_finalized() ?</div><div class='add'>+		system_supports_bbml2_noabort() : cpu_supports_bbml2_noabort();</div><div class='add'>+</div><div class='add'>+	return (!bbml2 &amp;&amp; (rodata_full || arm64_kfence_can_set_direct_map() ||</div><div class='add'>+			   is_realm_world())) ||</div><div class='add'>+		debug_pagealloc_enabled();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init map_mem(pgd_t *pgdp)</div><div class='ctx'> {</div><div class='ctx'> 	static const u64 direct_map_end = _PAGE_END(VA_BITS_MIN);</div><div class='del'>-	phys_addr_t kernel_start = __pa_symbol(_stext);</div><div class='add'>+	phys_addr_t kernel_start = __pa_symbol(_text);</div><div class='ctx'> 	phys_addr_t kernel_end = __pa_symbol(__init_begin);</div><div class='ctx'> 	phys_addr_t start, end;</div><div class='ctx'> 	phys_addr_t early_kfence_pool;</div><div class='hunk'>@@ -645,7 +1044,9 @@ static void __init map_mem(pgd_t *pgdp)</div><div class='ctx'> </div><div class='ctx'> 	early_kfence_pool = arm64_kfence_alloc_pool();</div><div class='ctx'> </div><div class='del'>-	if (can_set_direct_map())</div><div class='add'>+	linear_map_requires_bbml2 = !force_pte_mapping() &amp;&amp; can_set_direct_map();</div><div class='add'>+</div><div class='add'>+	if (force_pte_mapping())</div><div class='ctx'> 		flags |= NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -670,7 +1071,7 @@ static void __init map_mem(pgd_t *pgdp)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Map the linear alias of the [_stext, __init_begin) interval</div><div class='add'>+	 * Map the linear alias of the [_text, __init_begin) interval</div><div class='ctx'> 	 * as non-executable now, and remove the write permission in</div><div class='ctx'> 	 * mark_linear_text_alias_ro() below (which will be called after</div><div class='ctx'> 	 * alternative patching has completed). This makes the contents</div><div class='hunk'>@@ -697,6 +1098,10 @@ void mark_rodata_ro(void)</div><div class='ctx'> 	WRITE_ONCE(rodata_is_rw, false);</div><div class='ctx'> 	update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,</div><div class='ctx'> 			    section_size, PAGE_KERNEL_RO);</div><div class='add'>+	/* mark the range between _text and _stext as read only. */</div><div class='add'>+	update_mapping_prot(__pa_symbol(_text), (unsigned long)_text,</div><div class='add'>+			    (unsigned long)_stext - (unsigned long)_text,</div><div class='add'>+			    PAGE_KERNEL_RO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init declare_vma(struct vm_struct *vma,</div><div class='hunk'>@@ -722,7 +1127,93 @@ static void __init declare_vma(struct vm_struct *vma,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_UNMAP_KERNEL_AT_EL0</div><div class='del'>-static pgprot_t kernel_exec_prot(void)</div><div class='add'>+#define KPTI_NG_TEMP_VA		(-(1UL &lt;&lt; PMD_SHIFT))</div><div class='add'>+</div><div class='add'>+static phys_addr_t kpti_ng_temp_alloc __initdata;</div><div class='add'>+</div><div class='add'>+static phys_addr_t __init kpti_ng_pgd_alloc(enum pgtable_type type)</div><div class='add'>+{</div><div class='add'>+	kpti_ng_temp_alloc -= PAGE_SIZE;</div><div class='add'>+	return kpti_ng_temp_alloc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init __kpti_install_ng_mappings(void *__unused)</div><div class='add'>+{</div><div class='add'>+	typedef void (kpti_remap_fn)(int, int, phys_addr_t, unsigned long);</div><div class='add'>+	extern kpti_remap_fn idmap_kpti_install_ng_mappings;</div><div class='add'>+	kpti_remap_fn *remap_fn;</div><div class='add'>+</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	int levels = CONFIG_PGTABLE_LEVELS;</div><div class='add'>+	int order = order_base_2(levels);</div><div class='add'>+	u64 kpti_ng_temp_pgd_pa = 0;</div><div class='add'>+	pgd_t *kpti_ng_temp_pgd;</div><div class='add'>+	u64 alloc = 0;</div><div class='add'>+</div><div class='add'>+	if (levels == 5 &amp;&amp; !pgtable_l5_enabled())</div><div class='add'>+		levels = 4;</div><div class='add'>+	else if (levels == 4 &amp;&amp; !pgtable_l4_enabled())</div><div class='add'>+		levels = 3;</div><div class='add'>+</div><div class='add'>+	remap_fn = (void *)__pa_symbol(idmap_kpti_install_ng_mappings);</div><div class='add'>+</div><div class='add'>+	if (!cpu) {</div><div class='add'>+		alloc = __get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);</div><div class='add'>+		kpti_ng_temp_pgd = (pgd_t *)(alloc + (levels - 1) * PAGE_SIZE);</div><div class='add'>+		kpti_ng_temp_alloc = kpti_ng_temp_pgd_pa = __pa(kpti_ng_temp_pgd);</div><div class='add'>+</div><div class='add'>+		//</div><div class='add'>+		// Create a minimal page table hierarchy that permits us to map</div><div class='add'>+		// the swapper page tables temporarily as we traverse them.</div><div class='add'>+		//</div><div class='add'>+		// The physical pages are laid out as follows:</div><div class='add'>+		//</div><div class='add'>+		// +--------+-/-------+-/------ +-/------ +-\\\--------+</div><div class='add'>+		// :  PTE[] : | PMD[] : | PUD[] : | P4D[] : ||| PGD[]  :</div><div class='add'>+		// +--------+-\-------+-\------ +-\------ +-///--------+</div><div class='add'>+		//      ^</div><div class='add'>+		// The first page is mapped into this hierarchy at a PMD_SHIFT</div><div class='add'>+		// aligned virtual address, so that we can manipulate the PTE</div><div class='add'>+		// level entries while the mapping is active. The first entry</div><div class='add'>+		// covers the PTE[] page itself, the remaining entries are free</div><div class='add'>+		// to be used as a ad-hoc fixmap.</div><div class='add'>+		//</div><div class='add'>+		__create_pgd_mapping_locked(kpti_ng_temp_pgd, __pa(alloc),</div><div class='add'>+					    KPTI_NG_TEMP_VA, PAGE_SIZE, PAGE_KERNEL,</div><div class='add'>+					    kpti_ng_pgd_alloc, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_install_idmap();</div><div class='add'>+	remap_fn(cpu, num_online_cpus(), kpti_ng_temp_pgd_pa, KPTI_NG_TEMP_VA);</div><div class='add'>+	cpu_uninstall_idmap();</div><div class='add'>+</div><div class='add'>+	if (!cpu) {</div><div class='add'>+		free_pages(alloc, order);</div><div class='add'>+		arm64_use_ng_mappings = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init kpti_install_ng_mappings(void)</div><div class='add'>+{</div><div class='add'>+	/* Check whether KPTI is going to be used */</div><div class='add'>+	if (!arm64_kernel_unmapped_at_el0())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We don't need to rewrite the page-tables if either we've done</div><div class='add'>+	 * it already or we have KASLR enabled and therefore have not</div><div class='add'>+	 * created any global mappings at all.</div><div class='add'>+	 */</div><div class='add'>+	if (arm64_use_ng_mappings)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	init_idmap_kpti_bbml2_flag();</div><div class='add'>+	stop_machine(__kpti_install_ng_mappings, NULL, cpu_online_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static pgprot_t __init kernel_exec_prot(void)</div><div class='ctx'> {</div><div class='ctx'> 	return rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;</div><div class='ctx'> }</div><div class='hunk'>@@ -744,7 +1235,7 @@ static int __init map_entry_trampoline(void)</div><div class='ctx'> 	memset(tramp_pg_dir, 0, PGD_SIZE);</div><div class='ctx'> 	__create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS,</div><div class='ctx'> 			     entry_tramp_text_size(), prot,</div><div class='del'>-			     __pgd_pgtable_alloc, NO_BLOCK_MAPPINGS);</div><div class='add'>+			     pgd_pgtable_alloc_init_mm, NO_BLOCK_MAPPINGS);</div><div class='ctx'> </div><div class='ctx'> 	/* Map both the text and data into the kernel page table */</div><div class='ctx'> 	for (i = 0; i &lt; DIV_ROUND_UP(entry_tramp_text_size(), PAGE_SIZE); i++)</div><div class='hunk'>@@ -767,38 +1258,41 @@ static void __init declare_kernel_vmas(void)</div><div class='ctx'> {</div><div class='ctx'> 	static struct vm_struct vmlinux_seg[KERNEL_SEGMENT_COUNT];</div><div class='ctx'> </div><div class='del'>-	declare_vma(&amp;vmlinux_seg[0], _stext, _etext, VM_NO_GUARD);</div><div class='add'>+	declare_vma(&amp;vmlinux_seg[0], _text, _etext, VM_NO_GUARD);</div><div class='ctx'> 	declare_vma(&amp;vmlinux_seg[1], __start_rodata, __inittext_begin, VM_NO_GUARD);</div><div class='ctx'> 	declare_vma(&amp;vmlinux_seg[2], __inittext_begin, __inittext_end, VM_NO_GUARD);</div><div class='ctx'> 	declare_vma(&amp;vmlinux_seg[3], __initdata_begin, __initdata_end, VM_NO_GUARD);</div><div class='ctx'> 	declare_vma(&amp;vmlinux_seg[4], _data, _end, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __pi_map_range(u64 *pgd, u64 start, u64 end, u64 pa, pgprot_t prot,</div><div class='del'>-		    int level, pte_t *tbl, bool may_use_cont, u64 va_offset);</div><div class='add'>+void __pi_map_range(phys_addr_t *pte, u64 start, u64 end, phys_addr_t pa,</div><div class='add'>+		    pgprot_t prot, int level, pte_t *tbl, bool may_use_cont,</div><div class='add'>+		    u64 va_offset);</div><div class='ctx'> </div><div class='ctx'> static u8 idmap_ptes[IDMAP_LEVELS - 1][PAGE_SIZE] __aligned(PAGE_SIZE) __ro_after_init,</div><div class='del'>-	  kpti_ptes[IDMAP_LEVELS - 1][PAGE_SIZE] __aligned(PAGE_SIZE) __ro_after_init;</div><div class='add'>+	  kpti_bbml2_ptes[IDMAP_LEVELS - 1][PAGE_SIZE] __aligned(PAGE_SIZE) __ro_after_init;</div><div class='ctx'> </div><div class='ctx'> static void __init create_idmap(void)</div><div class='ctx'> {</div><div class='del'>-	u64 start = __pa_symbol(__idmap_text_start);</div><div class='del'>-	u64 end   = __pa_symbol(__idmap_text_end);</div><div class='del'>-	u64 ptep  = __pa_symbol(idmap_ptes);</div><div class='add'>+	phys_addr_t start = __pa_symbol(__idmap_text_start);</div><div class='add'>+	phys_addr_t end   = __pa_symbol(__idmap_text_end);</div><div class='add'>+	phys_addr_t ptep  = __pa_symbol(idmap_ptes);</div><div class='ctx'> </div><div class='ctx'> 	__pi_map_range(&amp;ptep, start, end, start, PAGE_KERNEL_ROX,</div><div class='ctx'> 		       IDMAP_ROOT_LEVEL, (pte_t *)idmap_pg_dir, false,</div><div class='ctx'> 		       __phys_to_virt(ptep) - ptep);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) &amp;&amp; !arm64_use_ng_mappings) {</div><div class='del'>-		extern u32 __idmap_kpti_flag;</div><div class='del'>-		u64 pa = __pa_symbol(&amp;__idmap_kpti_flag);</div><div class='add'>+	if (linear_map_requires_bbml2 ||</div><div class='add'>+	    (IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) &amp;&amp; !arm64_use_ng_mappings)) {</div><div class='add'>+		phys_addr_t pa = __pa_symbol(&amp;idmap_kpti_bbml2_flag);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The KPTI G-to-nG conversion code needs a read-write mapping</div><div class='del'>-		 * of its synchronization flag in the ID map.</div><div class='add'>+		 * of its synchronization flag in the ID map. This is also used</div><div class='add'>+		 * when splitting the linear map to ptes if a secondary CPU</div><div class='add'>+		 * doesn't support bbml2.</div><div class='ctx'> 		 */</div><div class='del'>-		ptep = __pa_symbol(kpti_ptes);</div><div class='add'>+		ptep = __pa_symbol(kpti_bbml2_ptes);</div><div class='ctx'> 		__pi_map_range(&amp;ptep, pa, pa + sizeof(u32), pa, PAGE_KERNEL,</div><div class='ctx'> 			       IDMAP_ROOT_LEVEL, (pte_t *)idmap_pg_dir, false,</div><div class='ctx'> 			       __phys_to_virt(ptep) - ptep);</div><div class='hunk'>@@ -823,7 +1317,7 @@ static void free_hotplug_page_range(struct page *page, size_t size,</div><div class='ctx'> 		vmem_altmap_free(altmap, size &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN_ON(PageReserved(page));</div><div class='del'>-		free_pages((unsigned long)page_address(page), get_order(size));</div><div class='add'>+		__free_pages(page, get_order(size));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1169,15 +1663,19 @@ int __meminit vmemmap_check_pmd(pmd_t *pmdp, int node,</div><div class='ctx'> 				unsigned long addr, unsigned long next)</div><div class='ctx'> {</div><div class='ctx'> 	vmemmap_verify((pte_t *)pmdp, node, addr, next);</div><div class='del'>-	return 1;</div><div class='add'>+</div><div class='add'>+	return pmd_sect(READ_ONCE(*pmdp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,</div><div class='ctx'> 		struct vmem_altmap *altmap)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON((start &lt; VMEMMAP_START) || (end &gt; VMEMMAP_END));</div><div class='add'>+	/* [start, end] should be within one section */</div><div class='add'>+	WARN_ON_ONCE(end - start &gt; PAGES_PER_SECTION * sizeof(struct page));</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_ARM64_4K_PAGES))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ARM64_4K_PAGES) ||</div><div class='add'>+	    (end - start &lt; PAGES_PER_SECTION * sizeof(struct page)))</div><div class='ctx'> 		return vmemmap_populate_basepages(start, end, node, altmap);</div><div class='ctx'> 	else</div><div class='ctx'> 		return vmemmap_populate_hugepages(start, end, node, altmap);</div><div class='hunk'>@@ -1244,7 +1742,8 @@ int pmd_clear_huge(pmd_t *pmdp)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)</div><div class='add'>+static int __pmd_free_pte_page(pmd_t *pmdp, unsigned long addr,</div><div class='add'>+			       bool acquire_mmap_lock)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t *table;</div><div class='ctx'> 	pmd_t pmd;</div><div class='hunk'>@@ -1256,13 +1755,25 @@ int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* See comment in pud_free_pmd_page for static key logic */</div><div class='ctx'> 	table = pte_offset_kernel(pmdp, addr);</div><div class='ctx'> 	pmd_clear(pmdp);</div><div class='ctx'> 	__flush_tlb_kernel_pgtable(addr);</div><div class='add'>+	if (static_branch_unlikely(&amp;arm64_ptdump_lock_key) &amp;&amp; acquire_mmap_lock) {</div><div class='add'>+		mmap_read_lock(&amp;init_mm);</div><div class='add'>+		mmap_read_unlock(&amp;init_mm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pte_free_kernel(NULL, table);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	/* If ptdump is walking the pagetables, acquire init_mm.mmap_lock */</div><div class='add'>+	return __pmd_free_pte_page(pmdp, addr, /* acquire_mmap_lock = */ true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int pud_free_pmd_page(pud_t *pudp, unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t *table;</div><div class='hunk'>@@ -1278,15 +1789,36 @@ int pud_free_pmd_page(pud_t *pudp, unsigned long addr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	table = pmd_offset(pudp, addr);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Our objective is to prevent ptdump from reading a PMD table which has</div><div class='add'>+	 * been freed. In this race, if pud_free_pmd_page observes the key on</div><div class='add'>+	 * (which got flipped by ptdump) then the mmap lock sequence here will,</div><div class='add'>+	 * as a result of the mmap write lock/unlock sequence in ptdump, give</div><div class='add'>+	 * us the correct synchronization. If not, this means that ptdump has</div><div class='add'>+	 * yet not started walking the pagetables - the sequence of barriers</div><div class='add'>+	 * issued by __flush_tlb_kernel_pgtable() guarantees that ptdump will</div><div class='add'>+	 * observe an empty PUD.</div><div class='add'>+	 */</div><div class='add'>+	pud_clear(pudp);</div><div class='add'>+	__flush_tlb_kernel_pgtable(addr);</div><div class='add'>+	if (static_branch_unlikely(&amp;arm64_ptdump_lock_key)) {</div><div class='add'>+		mmap_read_lock(&amp;init_mm);</div><div class='add'>+		mmap_read_unlock(&amp;init_mm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pmdp = table;</div><div class='ctx'> 	next = addr;</div><div class='ctx'> 	end = addr + PUD_SIZE;</div><div class='ctx'> 	do {</div><div class='del'>-		pmd_free_pte_page(pmdp, next);</div><div class='add'>+		if (pmd_present(pmdp_get(pmdp)))</div><div class='add'>+			/*</div><div class='add'>+			 * PMD has been isolated, so ptdump won't see it. No</div><div class='add'>+			 * need to acquire init_mm.mmap_lock.</div><div class='add'>+			 */</div><div class='add'>+			__pmd_free_pte_page(pmdp, next, /* acquire_mmap_lock = */ false);</div><div class='ctx'> 	} while (pmdp++, next += PMD_SIZE, next != end);</div><div class='ctx'> </div><div class='del'>-	pud_clear(pudp);</div><div class='del'>-	__flush_tlb_kernel_pgtable(addr);</div><div class='ctx'> 	pmd_free(NULL, table);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1306,8 +1838,8 @@ static void __remove_pgd_mapping(pgd_t *pgdir, unsigned long start, u64 size)</div><div class='ctx'> struct range arch_get_mappable_range(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct range mhp_range;</div><div class='del'>-	u64 start_linear_pa = __pa(_PAGE_OFFSET(vabits_actual));</div><div class='del'>-	u64 end_linear_pa = __pa(PAGE_END - 1);</div><div class='add'>+	phys_addr_t start_linear_pa = __pa(_PAGE_OFFSET(vabits_actual));</div><div class='add'>+	phys_addr_t end_linear_pa = __pa(PAGE_END - 1);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1342,11 +1874,11 @@ int arch_add_memory(int nid, u64 start, u64 size,</div><div class='ctx'> </div><div class='ctx'> 	VM_BUG_ON(!mhp_range_allowed(start, size, true));</div><div class='ctx'> </div><div class='del'>-	if (can_set_direct_map())</div><div class='add'>+	if (force_pte_mapping())</div><div class='ctx'> 		flags |= NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;</div><div class='ctx'> </div><div class='ctx'> 	__create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start),</div><div class='del'>-			     size, params-&gt;pgprot, __pgd_pgtable_alloc,</div><div class='add'>+			     size, params-&gt;pgprot, pgd_pgtable_alloc_init_mm,</div><div class='ctx'> 			     flags);</div><div class='ctx'> </div><div class='ctx'> 	memblock_clear_nomap(start, size);</div><div class='hunk'>@@ -1357,7 +1889,8 @@ int arch_add_memory(int nid, u64 start, u64 size,</div><div class='ctx'> 		__remove_pgd_mapping(swapper_pg_dir,</div><div class='ctx'> 				     __phys_to_virt(start), size);</div><div class='ctx'> 	else {</div><div class='del'>-		max_pfn = PFN_UP(start + size);</div><div class='add'>+		/* Address of hotplugged memory can be smaller */</div><div class='add'>+		max_pfn = max(max_pfn, PFN_UP(start + size));</div><div class='ctx'> 		max_low_pfn = max_pfn;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1499,24 +2032,41 @@ static int __init prevent_bootmem_remove_init(void)</div><div class='ctx'> early_initcall(prevent_bootmem_remove_init);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)</div><div class='add'>+pte_t modify_prot_start_ptes(struct vm_area_struct *vma, unsigned long addr,</div><div class='add'>+			     pte_t *ptep, unsigned int nr)</div><div class='ctx'> {</div><div class='add'>+	pte_t pte = get_and_clear_ptes(vma-&gt;vm_mm, addr, ptep, nr);</div><div class='add'>+</div><div class='ctx'> 	if (alternative_has_cap_unlikely(ARM64_WORKAROUND_2645198)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Break-before-make (BBM) is required for all user space mappings</div><div class='ctx'> 		 * when the permission changes from executable to non-executable</div><div class='ctx'> 		 * in cases where cpu is affected with errata #2645198.</div><div class='ctx'> 		 */</div><div class='del'>-		if (pte_user_exec(ptep_get(ptep)))</div><div class='del'>-			return ptep_clear_flush(vma, addr, ptep);</div><div class='add'>+		if (pte_accessible(vma-&gt;vm_mm, pte) &amp;&amp; pte_user_exec(pte))</div><div class='add'>+			__flush_tlb_range(vma, addr, nr * PAGE_SIZE,</div><div class='add'>+					  PAGE_SIZE, true, 3);</div><div class='ctx'> 	}</div><div class='del'>-	return ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep);</div><div class='add'>+</div><div class='add'>+	return pte;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	return modify_prot_start_ptes(vma, addr, ptep, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void modify_prot_commit_ptes(struct vm_area_struct *vma, unsigned long addr,</div><div class='add'>+			     pte_t *ptep, pte_t old_pte, pte_t pte,</div><div class='add'>+			     unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	set_ptes(vma-&gt;vm_mm, addr, ptep, pte, nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep,</div><div class='ctx'> 			     pte_t old_pte, pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	set_pte_at(vma-&gt;vm_mm, addr, ptep, pte);</div><div class='add'>+	modify_prot_commit_ptes(vma, addr, ptep, old_pte, pte, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1554,9 +2104,8 @@ void __cpu_replace_ttbr1(pgd_t *pgdp, bool cnp)</div><div class='ctx'> #ifdef CONFIG_ARCH_HAS_PKEYS</div><div class='ctx'> int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val)</div><div class='ctx'> {</div><div class='del'>-	u64 new_por = POE_RXW;</div><div class='add'>+	u64 new_por;</div><div class='ctx'> 	u64 old_por;</div><div class='del'>-	u64 pkey_shift;</div><div class='ctx'> </div><div class='ctx'> 	if (!system_supports_poe())</div><div class='ctx'> 		return -ENOSPC;</div><div class='hunk'>@@ -1570,7 +2119,7 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long i</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the bits we need in POR:  */</div><div class='del'>-	new_por = POE_RXW;</div><div class='add'>+	new_por = POE_RWX;</div><div class='ctx'> 	if (init_val &amp; PKEY_DISABLE_WRITE)</div><div class='ctx'> 		new_por &amp;= ~POE_W;</div><div class='ctx'> 	if (init_val &amp; PKEY_DISABLE_ACCESS)</div><div class='hunk'>@@ -1581,12 +2130,11 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long i</div><div class='ctx'> 		new_por &amp;= ~POE_X;</div><div class='ctx'> </div><div class='ctx'> 	/* Shift the bits in to the correct place in POR for pkey: */</div><div class='del'>-	pkey_shift = pkey * POR_BITS_PER_PKEY;</div><div class='del'>-	new_por &lt;&lt;= pkey_shift;</div><div class='add'>+	new_por = POR_ELx_PERM_PREP(pkey, new_por);</div><div class='ctx'> </div><div class='ctx'> 	/* Get old POR and mask off any old bits in place: */</div><div class='ctx'> 	old_por = read_sysreg_s(SYS_POR_EL0);</div><div class='del'>-	old_por &amp;= ~(POE_MASK &lt;&lt; pkey_shift);</div><div class='add'>+	old_por &amp;= ~(POE_MASK &lt;&lt; POR_ELx_PERM_SHIFT(pkey));</div><div class='ctx'> </div><div class='ctx'> 	/* Write old part along with new part: */</div><div class='ctx'> 	write_sysreg_s(old_por | new_por, SYS_POR_EL0);</div><div class='head'>diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c<br/>index 0e270a1c51e6..5135f2d66958 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/pageattr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/pageattr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/pageattr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/pageattr.c</a></div><div class='hunk'>@@ -5,10 +5,13 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mem_encrypt.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/pagewalk.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/pgtable-prot.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/kfence.h&gt;</div><div class='hunk'>@@ -18,49 +21,123 @@ struct page_change_data {</div><div class='ctx'> 	pgprot_t clear_mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-bool rodata_full __ro_after_init = IS_ENABLED(CONFIG_RODATA_FULL_DEFAULT_ENABLED);</div><div class='add'>+static ptdesc_t set_pageattr_masks(ptdesc_t val, struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	struct page_change_data *masks = walk-&gt;private;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(pgprot_val(masks-&gt;clear_mask));</div><div class='add'>+	val |= (pgprot_val(masks-&gt;set_mask));</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pageattr_pud_entry(pud_t *pud, unsigned long addr,</div><div class='add'>+			      unsigned long next, struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pud_t val = pudp_get(pud);</div><div class='add'>+</div><div class='add'>+	if (pud_sect(val)) {</div><div class='add'>+		if (WARN_ON_ONCE((next - addr) != PUD_SIZE))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		val = __pud(set_pageattr_masks(pud_val(val), walk));</div><div class='add'>+		set_pud(pud, val);</div><div class='add'>+		walk-&gt;action = ACTION_CONTINUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pageattr_pmd_entry(pmd_t *pmd, unsigned long addr,</div><div class='add'>+			      unsigned long next, struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pmd_t val = pmdp_get(pmd);</div><div class='add'>+</div><div class='add'>+	if (pmd_sect(val)) {</div><div class='add'>+		if (WARN_ON_ONCE((next - addr) != PMD_SIZE))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		val = __pmd(set_pageattr_masks(pmd_val(val), walk));</div><div class='add'>+		set_pmd(pmd, val);</div><div class='add'>+		walk-&gt;action = ACTION_CONTINUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pageattr_pte_entry(pte_t *pte, unsigned long addr,</div><div class='add'>+			      unsigned long next, struct mm_walk *walk)</div><div class='add'>+{</div><div class='add'>+	pte_t val = __ptep_get(pte);</div><div class='add'>+</div><div class='add'>+	val = __pte(set_pageattr_masks(pte_val(val), walk));</div><div class='add'>+	__set_pte(pte, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mm_walk_ops pageattr_ops = {</div><div class='add'>+	.pud_entry	= pageattr_pud_entry,</div><div class='add'>+	.pmd_entry	= pageattr_pmd_entry,</div><div class='add'>+	.pte_entry	= pageattr_pte_entry,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool rodata_full __ro_after_init = true;</div><div class='ctx'> </div><div class='ctx'> bool can_set_direct_map(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * rodata_full and DEBUG_PAGEALLOC require linear map to be</div><div class='del'>-	 * mapped at page granularity, so that it is possible to</div><div class='add'>+	 * rodata_full, DEBUG_PAGEALLOC and a Realm guest all require linear</div><div class='add'>+	 * map to be mapped at page granularity, so that it is possible to</div><div class='ctx'> 	 * protect/unprotect single pages.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * KFENCE pool requires page-granular mapping if initialized late.</div><div class='add'>+	 *</div><div class='add'>+	 * Realms need to make pages shared/protected at page granularity.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return rodata_full || debug_pagealloc_enabled() ||</div><div class='del'>-	       arm64_kfence_can_set_direct_map();</div><div class='add'>+		arm64_kfence_can_set_direct_map() || is_realm_world();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int change_page_range(pte_t *ptep, unsigned long addr, void *data)</div><div class='add'>+static int update_range_prot(unsigned long start, unsigned long size,</div><div class='add'>+			     pgprot_t set_mask, pgprot_t clear_mask)</div><div class='ctx'> {</div><div class='del'>-	struct page_change_data *cdata = data;</div><div class='del'>-	pte_t pte = __ptep_get(ptep);</div><div class='add'>+	struct page_change_data data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data.set_mask = set_mask;</div><div class='add'>+	data.clear_mask = clear_mask;</div><div class='ctx'> </div><div class='del'>-	pte = clear_pte_bit(pte, cdata-&gt;clear_mask);</div><div class='del'>-	pte = set_pte_bit(pte, cdata-&gt;set_mask);</div><div class='add'>+	ret = split_kernel_leaf_mapping(start, start + size);</div><div class='add'>+	if (WARN_ON_ONCE(ret))</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	__set_pte(ptep, pte);</div><div class='del'>-	return 0;</div><div class='add'>+	arch_enter_lazy_mmu_mode();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The caller must ensure that the range we are operating on does not</div><div class='add'>+	 * partially overlap a block mapping, or a cont mapping. Any such case</div><div class='add'>+	 * must be eliminated by splitting the mapping.</div><div class='add'>+	 */</div><div class='add'>+	ret = walk_kernel_page_table_range_lockless(start, start + size,</div><div class='add'>+						    &amp;pageattr_ops, NULL, &amp;data);</div><div class='add'>+	arch_leave_lazy_mmu_mode();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This function assumes that the range is mapped with PAGE_SIZE pages.</div><div class='del'>- */</div><div class='ctx'> static int __change_memory_common(unsigned long start, unsigned long size,</div><div class='del'>-				pgprot_t set_mask, pgprot_t clear_mask)</div><div class='add'>+				  pgprot_t set_mask, pgprot_t clear_mask)</div><div class='ctx'> {</div><div class='del'>-	struct page_change_data data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	data.set_mask = set_mask;</div><div class='del'>-	data.clear_mask = clear_mask;</div><div class='del'>-</div><div class='del'>-	ret = apply_to_page_range(&amp;init_mm, start, size, change_page_range,</div><div class='del'>-					&amp;data);</div><div class='add'>+	ret = update_range_prot(start, size, set_mask, clear_mask);</div><div class='ctx'> </div><div class='del'>-	flush_tlb_kernel_range(start, start + size);</div><div class='add'>+	/*</div><div class='add'>+	 * If the memory is being made valid without changing any other bits</div><div class='add'>+	 * then a TLBI isn't required as a non-valid entry cannot be cached in</div><div class='add'>+	 * the TLB.</div><div class='add'>+	 */</div><div class='add'>+	if (pgprot_val(set_mask) != PTE_VALID || pgprot_val(clear_mask))</div><div class='add'>+		flush_tlb_kernel_range(start, start + size);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -86,8 +163,8 @@ static int change_memory_common(unsigned long addr, int numpages,</div><div class='ctx'> 	 * we are operating on does not result in such splitting.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Let's restrict ourselves to mappings created by vmalloc (or vmap).</div><div class='del'>-	 * Those are guaranteed to consist entirely of page mappings, and</div><div class='del'>-	 * splitting is never needed.</div><div class='add'>+	 * Disallow VM_ALLOW_HUGE_VMAP mappings to guarantee that only page</div><div class='add'>+	 * mappings are updated and splitting is never needed.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * So check whether the [addr, addr + size) interval is entirely</div><div class='ctx'> 	 * covered by precisely one VM area that has the VM_ALLOC flag set.</div><div class='hunk'>@@ -95,7 +172,7 @@ static int change_memory_common(unsigned long addr, int numpages,</div><div class='ctx'> 	area = find_vm_area((void *)addr);</div><div class='ctx'> 	if (!area ||</div><div class='ctx'> 	    end &gt; (unsigned long)kasan_reset_tag(area-&gt;addr) + area-&gt;size ||</div><div class='del'>-	    !(area-&gt;flags &amp; VM_ALLOC))</div><div class='add'>+	    ((area-&gt;flags &amp; (VM_ALLOC | VM_ALLOW_HUGE_VMAP)) != VM_ALLOC))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!numpages)</div><div class='hunk'>@@ -164,35 +241,125 @@ int set_memory_valid(unsigned long addr, int numpages, int enable)</div><div class='ctx'> </div><div class='ctx'> int set_direct_map_invalid_noflush(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	struct page_change_data data = {</div><div class='del'>-		.set_mask = __pgprot(0),</div><div class='del'>-		.clear_mask = __pgprot(PTE_VALID),</div><div class='del'>-	};</div><div class='add'>+	pgprot_t clear_mask = __pgprot(PTE_VALID);</div><div class='add'>+	pgprot_t set_mask = __pgprot(0);</div><div class='ctx'> </div><div class='ctx'> 	if (!can_set_direct_map())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return apply_to_page_range(&amp;init_mm,</div><div class='del'>-				   (unsigned long)page_address(page),</div><div class='del'>-				   PAGE_SIZE, change_page_range, &amp;data);</div><div class='add'>+	return update_range_prot((unsigned long)page_address(page),</div><div class='add'>+				 PAGE_SIZE, set_mask, clear_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int set_direct_map_default_noflush(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	struct page_change_data data = {</div><div class='del'>-		.set_mask = __pgprot(PTE_VALID | PTE_WRITE),</div><div class='del'>-		.clear_mask = __pgprot(PTE_RDONLY),</div><div class='del'>-	};</div><div class='add'>+	pgprot_t set_mask = __pgprot(PTE_VALID | PTE_WRITE);</div><div class='add'>+	pgprot_t clear_mask = __pgprot(PTE_RDONLY);</div><div class='ctx'> </div><div class='ctx'> 	if (!can_set_direct_map())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return apply_to_page_range(&amp;init_mm,</div><div class='del'>-				   (unsigned long)page_address(page),</div><div class='del'>-				   PAGE_SIZE, change_page_range, &amp;data);</div><div class='add'>+	return update_range_prot((unsigned long)page_address(page),</div><div class='add'>+				 PAGE_SIZE, set_mask, clear_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __set_memory_enc_dec(unsigned long addr,</div><div class='add'>+				int numpages,</div><div class='add'>+				bool encrypt)</div><div class='add'>+{</div><div class='add'>+	unsigned long set_prot = 0, clear_prot = 0;</div><div class='add'>+	phys_addr_t start, end;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_realm_world())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!__is_lm_address(addr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	start = __virt_to_phys(addr);</div><div class='add'>+	end = start + numpages * PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (encrypt)</div><div class='add'>+		clear_prot = PROT_NS_SHARED;</div><div class='add'>+	else</div><div class='add'>+		set_prot = PROT_NS_SHARED;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Break the mapping before we make any changes to avoid stale TLB</div><div class='add'>+	 * entries or Synchronous External Aborts caused by RIPAS_EMPTY</div><div class='add'>+	 */</div><div class='add'>+	ret = __change_memory_common(addr, PAGE_SIZE * numpages,</div><div class='add'>+				     __pgprot(set_prot),</div><div class='add'>+				     __pgprot(clear_prot | PTE_VALID));</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (encrypt)</div><div class='add'>+		ret = rsi_set_memory_range_protected(start, end);</div><div class='add'>+	else</div><div class='add'>+		ret = rsi_set_memory_range_shared(start, end);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return __change_memory_common(addr, PAGE_SIZE * numpages,</div><div class='add'>+				      __pgprot(PTE_VALID),</div><div class='add'>+				      __pgprot(0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realm_set_memory_encrypted(unsigned long addr, int numpages)</div><div class='add'>+{</div><div class='add'>+	int ret = __set_memory_enc_dec(addr, numpages, true);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the request to change state fails, then the only sensible cause</div><div class='add'>+	 * of action for the caller is to leak the memory</div><div class='add'>+	 */</div><div class='add'>+	WARN(ret, "Failed to encrypt memory, %d pages will be leaked",</div><div class='add'>+	     numpages);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realm_set_memory_decrypted(unsigned long addr, int numpages)</div><div class='add'>+{</div><div class='add'>+	int ret = __set_memory_enc_dec(addr, numpages, false);</div><div class='add'>+</div><div class='add'>+	WARN(ret, "Failed to decrypt memory, %d pages will be leaked",</div><div class='add'>+	     numpages);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct arm64_mem_crypt_ops realm_crypt_ops = {</div><div class='add'>+	.encrypt = realm_set_memory_encrypted,</div><div class='add'>+	.decrypt = realm_set_memory_decrypted,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int realm_register_memory_enc_ops(void)</div><div class='add'>+{</div><div class='add'>+	return arm64_mem_crypt_ops_register(&amp;realm_crypt_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int set_direct_map_valid_noflush(struct page *page, unsigned nr, bool valid)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr = (unsigned long)page_address(page);</div><div class='add'>+</div><div class='add'>+	if (!can_set_direct_map())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return set_memory_valid(addr, nr, valid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_PAGEALLOC</div><div class='add'>+/*</div><div class='add'>+ * This is - apart from the return value - doing the same</div><div class='add'>+ * thing as the new set_direct_map_valid_noflush() function.</div><div class='add'>+ *</div><div class='add'>+ * Unify? Explain the conceptual differences?</div><div class='add'>+ */</div><div class='ctx'> void __kernel_map_pages(struct page *page, int numpages, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	if (!can_set_direct_map())</div><div class='head'>diff --git a/arch/arm64/mm/pgd.c b/arch/arm64/mm/pgd.c<br/>index 0c501cabc238..8160cff35089 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/pgd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/pgd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/pgd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/pgd.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> 	gfp_t gfp = GFP_PGTABLE_USER;</div><div class='ctx'> </div><div class='ctx'> 	if (pgdir_is_page_size())</div><div class='del'>-		return (pgd_t *)__get_free_page(gfp);</div><div class='add'>+		return __pgd_alloc(mm, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		return kmem_cache_alloc(pgd_cache, gfp);</div><div class='ctx'> }</div><div class='hunk'>@@ -41,7 +41,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> {</div><div class='ctx'> 	if (pgdir_is_page_size())</div><div class='del'>-		free_page((unsigned long)pgd);</div><div class='add'>+		__pgd_free(mm, pgd);</div><div class='ctx'> 	else</div><div class='ctx'> 		kmem_cache_free(pgd_cache, pgd);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/mm/physaddr.c b/arch/arm64/mm/physaddr.c<br/>index cde44c13dda1..7d94e09b01b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/physaddr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/physaddr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/physaddr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/physaddr.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> phys_addr_t __virt_to_phys(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	WARN(!__is_lm_address(__tag_reset(x)),</div><div class='del'>-	     "virt_to_phys used for non-linear address: %pK (%pS)\n",</div><div class='add'>+	     "virt_to_phys used for non-linear address: %p (%pS)\n",</div><div class='ctx'> 	      (void *)x,</div><div class='ctx'> 	      (void *)x);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S<br/>index 8abdc7fed321..86818511962b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/proc.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/proc.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/proc.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/proc.S</a></div><div class='hunk'>@@ -245,10 +245,6 @@ SYM_FUNC_ALIAS(__pi_idmap_cpu_replace_ttbr1, idmap_cpu_replace_ttbr1)</div><div class='ctx'>  *</div><div class='ctx'>  * Called exactly once from stop_machine context by each CPU found during boot.</div><div class='ctx'>  */</div><div class='del'>-	.pushsection	".data", "aw", %progbits</div><div class='del'>-SYM_DATA(__idmap_kpti_flag, .long 1)</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='ctx'> SYM_TYPED_FUNC_START(idmap_kpti_install_ng_mappings)</div><div class='ctx'> 	cpu		.req	w0</div><div class='ctx'> 	temp_pte	.req	x0</div><div class='hunk'>@@ -273,7 +269,7 @@ SYM_TYPED_FUNC_START(idmap_kpti_install_ng_mappings)</div><div class='ctx'> </div><div class='ctx'> 	mov	x5, x3				// preserve temp_pte arg</div><div class='ctx'> 	mrs	swapper_ttb, ttbr1_el1</div><div class='del'>-	adr_l	flag_ptr, __idmap_kpti_flag</div><div class='add'>+	adr_l	flag_ptr, idmap_kpti_bbml2_flag</div><div class='ctx'> </div><div class='ctx'> 	cbnz	cpu, __idmap_kpti_secondary</div><div class='ctx'> </div><div class='hunk'>@@ -416,7 +412,25 @@ alternative_else_nop_endif</div><div class='ctx'> __idmap_kpti_secondary:</div><div class='ctx'> 	/* Uninstall swapper before surgery begins */</div><div class='ctx'> 	__idmap_cpu_set_reserved_ttbr1 x16, x17</div><div class='add'>+	b scondary_cpu_wait</div><div class='add'>+</div><div class='add'>+	.unreq	swapper_ttb</div><div class='add'>+	.unreq	flag_ptr</div><div class='add'>+SYM_FUNC_END(idmap_kpti_install_ng_mappings)</div><div class='add'>+	.popsection</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	.pushsection ".idmap.text", "a"</div><div class='add'>+SYM_TYPED_FUNC_START(wait_linear_map_split_to_ptes)</div><div class='add'>+	/* Must be same registers as in idmap_kpti_install_ng_mappings */</div><div class='add'>+	swapper_ttb	.req	x3</div><div class='add'>+	flag_ptr	.req	x4</div><div class='add'>+</div><div class='add'>+	mrs     swapper_ttb, ttbr1_el1</div><div class='add'>+	adr_l   flag_ptr, idmap_kpti_bbml2_flag</div><div class='add'>+	__idmap_cpu_set_reserved_ttbr1 x16, x17</div><div class='ctx'> </div><div class='add'>+scondary_cpu_wait:</div><div class='ctx'> 	/* Increment the flag to let the boot CPU we're ready */</div><div class='ctx'> 1:	ldxr	w16, [flag_ptr]</div><div class='ctx'> 	add	w16, w16, #1</div><div class='hunk'>@@ -436,9 +450,8 @@ __idmap_kpti_secondary:</div><div class='ctx'> </div><div class='ctx'> 	.unreq	swapper_ttb</div><div class='ctx'> 	.unreq	flag_ptr</div><div class='del'>-SYM_FUNC_END(idmap_kpti_install_ng_mappings)</div><div class='add'>+SYM_FUNC_END(wait_linear_map_split_to_ptes)</div><div class='ctx'> 	.popsection</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *	__cpu_setup</div><div class='hunk'>@@ -454,7 +467,7 @@ SYM_FUNC_START(__cpu_setup)</div><div class='ctx'> 	dsb	nsh</div><div class='ctx'> </div><div class='ctx'> 	msr	cpacr_el1, xzr			// Reset cpacr_el1</div><div class='del'>-	mov	x1, #1 &lt;&lt; 12			// Reset mdscr_el1 and disable</div><div class='add'>+	mov	x1, MDSCR_EL1_TDCC		// Reset mdscr_el1 and disable</div><div class='ctx'> 	msr	mdscr_el1, x1			// access to the DCC from EL0</div><div class='ctx'> 	reset_pmuserenr_el0 x1			// Disable PMU access from EL0</div><div class='ctx'> 	reset_amuserenr_el0 x1			// Disable AMU access from EL0</div><div class='hunk'>@@ -465,10 +478,12 @@ SYM_FUNC_START(__cpu_setup)</div><div class='ctx'> 	 */</div><div class='ctx'> 	mair	.req	x17</div><div class='ctx'> 	tcr	.req	x16</div><div class='add'>+	tcr2	.req	x15</div><div class='ctx'> 	mov_q	mair, MAIR_EL1_SET</div><div class='ctx'> 	mov_q	tcr, TCR_T0SZ(IDMAP_VA_BITS) | TCR_T1SZ(VA_BITS_MIN) | TCR_CACHE_FLAGS | \</div><div class='ctx'> 		     TCR_SHARED | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \</div><div class='ctx'> 		     TCR_TBI0 | TCR_A1 | TCR_KASAN_SW_FLAGS | TCR_MTE_FLAGS</div><div class='add'>+	mov	tcr2, xzr</div><div class='ctx'> </div><div class='ctx'> 	tcr_clear_errata_bits tcr, x9, x5</div><div class='ctx'> </div><div class='hunk'>@@ -493,9 +508,14 @@ alternative_else_nop_endif</div><div class='ctx'> 	 * via capabilities.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mrs	x9, ID_AA64MMFR1_EL1</div><div class='del'>-	and	x9, x9, ID_AA64MMFR1_EL1_HAFDBS_MASK</div><div class='add'>+	ubfx	x9, x9, ID_AA64MMFR1_EL1_HAFDBS_SHIFT, #4</div><div class='ctx'> 	cbz	x9, 1f</div><div class='ctx'> 	orr	tcr, tcr, #TCR_HA		// hardware Access flag update</div><div class='add'>+#ifdef CONFIG_ARM64_HAFT</div><div class='add'>+	cmp	x9, ID_AA64MMFR1_EL1_HAFDBS_HAFT</div><div class='add'>+	b.lt	1f</div><div class='add'>+	orr	tcr2, tcr2, TCR2_EL1_HAFT</div><div class='add'>+#endif /* CONFIG_ARM64_HAFT */</div><div class='ctx'> 1:</div><div class='ctx'> #endif	/* CONFIG_ARM64_HW_AFDBM */</div><div class='ctx'> 	msr	mair_el1, mair</div><div class='hunk'>@@ -505,31 +525,21 @@ alternative_else_nop_endif</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4</div><div class='ctx'> 	cbz	x1, .Lskip_indirection</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The PROT_* macros describing the various memory types may resolve to</div><div class='del'>-	 * C expressions if they include the PTE_MAYBE_* macros, and so they</div><div class='del'>-	 * can only be used from C code. The PIE_E* constants below are also</div><div class='del'>-	 * defined in terms of those macros, but will mask out those</div><div class='del'>-	 * PTE_MAYBE_* constants, whether they are set or not. So #define them</div><div class='del'>-	 * as 0x0 here so we can evaluate the PIE_E* constants in asm context.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#define PTE_MAYBE_NG		0</div><div class='del'>-#define PTE_MAYBE_SHARED	0</div><div class='del'>-</div><div class='del'>-	mov_q	x0, PIE_E0</div><div class='add'>+	mov_q	x0, PIE_E0_ASM</div><div class='ctx'> 	msr	REG_PIRE0_EL1, x0</div><div class='del'>-	mov_q	x0, PIE_E1</div><div class='add'>+	mov_q	x0, PIE_E1_ASM</div><div class='ctx'> 	msr	REG_PIR_EL1, x0</div><div class='ctx'> </div><div class='del'>-#undef PTE_MAYBE_NG</div><div class='del'>-#undef PTE_MAYBE_SHARED</div><div class='del'>-</div><div class='del'>-	mov	x0, TCR2_EL1x_PIE</div><div class='del'>-	msr	REG_TCR2_EL1, x0</div><div class='add'>+	orr	tcr2, tcr2, TCR2_EL1_PIE</div><div class='ctx'> </div><div class='ctx'> .Lskip_indirection:</div><div class='ctx'> </div><div class='add'>+	mrs_s	x1, SYS_ID_AA64MMFR3_EL1</div><div class='add'>+	ubfx	x1, x1, #ID_AA64MMFR3_EL1_TCRX_SHIFT, #4</div><div class='add'>+	cbz	x1, 1f</div><div class='add'>+	msr	REG_TCR2_EL1, tcr2</div><div class='add'>+1:</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Prepare SCTLR</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -538,4 +548,5 @@ alternative_else_nop_endif</div><div class='ctx'> </div><div class='ctx'> 	.unreq	mair</div><div class='ctx'> 	.unreq	tcr</div><div class='add'>+	.unreq	tcr2</div><div class='ctx'> SYM_FUNC_END(__cpu_setup)</div><div class='head'>diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c<br/>index 264c5f9b97d8..ab9899ca1e5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ptdump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ptdump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ptdump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/ptdump.c</a></div><div class='hunk'>@@ -80,10 +80,10 @@ static const struct ptdump_prot_bits pte_bits[] = {</div><div class='ctx'> 		.set	= "CON",</div><div class='ctx'> 		.clear	= "   ",</div><div class='ctx'> 	}, {</div><div class='del'>-		.mask	= PTE_TABLE_BIT,</div><div class='del'>-		.val	= PTE_TABLE_BIT,</div><div class='del'>-		.set	= "   ",</div><div class='del'>-		.clear	= "BLK",</div><div class='add'>+		.mask	= PMD_TYPE_MASK,</div><div class='add'>+		.val	= PMD_TYPE_SECT,</div><div class='add'>+		.set	= "BLK",</div><div class='add'>+		.clear	= "   ",</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.mask	= PTE_UXN,</div><div class='ctx'> 		.val	= PTE_UXN,</div><div class='hunk'>@@ -189,12 +189,12 @@ static void note_prot_wx(struct ptdump_pg_state *st, unsigned long addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void note_page(struct ptdump_state *pt_st, unsigned long addr, int level,</div><div class='del'>-	       u64 val)</div><div class='add'>+	       pteval_t val)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdump_pg_state *st = container_of(pt_st, struct ptdump_pg_state, ptdump);</div><div class='ctx'> 	struct ptdump_pg_level *pg_level = st-&gt;pg_level;</div><div class='ctx'> 	static const char units[] = "KMGTPE";</div><div class='del'>-	u64 prot = 0;</div><div class='add'>+	ptdesc_t prot = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* check if the current level has been folded dynamically */</div><div class='ctx'> 	if (st-&gt;mm &amp;&amp; ((level == 1 &amp;&amp; mm_p4d_folded(st-&gt;mm)) ||</div><div class='hunk'>@@ -251,6 +251,45 @@ void note_page(struct ptdump_state *pt_st, unsigned long addr, int level,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void note_page_pte(struct ptdump_state *pt_st, unsigned long addr, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 4, pte_val(pte));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void note_page_pmd(struct ptdump_state *pt_st, unsigned long addr, pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 3, pmd_val(pmd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void note_page_pud(struct ptdump_state *pt_st, unsigned long addr, pud_t pud)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 2, pud_val(pud));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void note_page_p4d(struct ptdump_state *pt_st, unsigned long addr, p4d_t p4d)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 1, p4d_val(p4d));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void note_page_pgd(struct ptdump_state *pt_st, unsigned long addr, pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 0, pgd_val(pgd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void note_page_flush(struct ptdump_state *pt_st)</div><div class='add'>+{</div><div class='add'>+	pte_t pte_zero = {0};</div><div class='add'>+</div><div class='add'>+	note_page(pt_st, 0, -1, pte_val(pte_zero));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arm64_ptdump_walk_pgd(struct ptdump_state *st, struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	static_branch_inc(&amp;arm64_ptdump_lock_key);</div><div class='add'>+	ptdump_walk_pgd(st, mm, NULL);</div><div class='add'>+	static_branch_dec(&amp;arm64_ptdump_lock_key);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ptdump_walk(struct seq_file *s, struct ptdump_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long end = ~0UL;</div><div class='hunk'>@@ -266,7 +305,12 @@ void ptdump_walk(struct seq_file *s, struct ptdump_info *info)</div><div class='ctx'> 		.pg_level = &amp;kernel_pg_levels[0],</div><div class='ctx'> 		.level = -1,</div><div class='ctx'> 		.ptdump = {</div><div class='del'>-			.note_page = note_page,</div><div class='add'>+			.note_page_pte = note_page_pte,</div><div class='add'>+			.note_page_pmd = note_page_pmd,</div><div class='add'>+			.note_page_pud = note_page_pud,</div><div class='add'>+			.note_page_p4d = note_page_p4d,</div><div class='add'>+			.note_page_pgd = note_page_pgd,</div><div class='add'>+			.note_page_flush = note_page_flush,</div><div class='ctx'> 			.range = (struct ptdump_range[]){</div><div class='ctx'> 				{info-&gt;base_addr, end},</div><div class='ctx'> 				{0, 0}</div><div class='hunk'>@@ -274,7 +318,7 @@ void ptdump_walk(struct seq_file *s, struct ptdump_info *info)</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ptdump_walk_pgd(&amp;st.ptdump, info-&gt;mm, NULL);</div><div class='add'>+	arm64_ptdump_walk_pgd(&amp;st.ptdump, info-&gt;mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init ptdump_initialize(void)</div><div class='hunk'>@@ -303,7 +347,12 @@ bool ptdump_check_wx(void)</div><div class='ctx'> 		.level = -1,</div><div class='ctx'> 		.check_wx = true,</div><div class='ctx'> 		.ptdump = {</div><div class='del'>-			.note_page = note_page,</div><div class='add'>+			.note_page_pte = note_page_pte,</div><div class='add'>+			.note_page_pmd = note_page_pmd,</div><div class='add'>+			.note_page_pud = note_page_pud,</div><div class='add'>+			.note_page_p4d = note_page_p4d,</div><div class='add'>+			.note_page_pgd = note_page_pgd,</div><div class='add'>+			.note_page_flush = note_page_flush,</div><div class='ctx'> 			.range = (struct ptdump_range[]) {</div><div class='ctx'> 				{_PAGE_OFFSET(vabits_actual), ~0UL},</div><div class='ctx'> 				{0, 0}</div><div class='hunk'>@@ -311,7 +360,7 @@ bool ptdump_check_wx(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	ptdump_walk_pgd(&amp;st.ptdump, &amp;init_mm, NULL);</div><div class='add'>+	arm64_ptdump_walk_pgd(&amp;st.ptdump, &amp;init_mm);</div><div class='ctx'> </div><div class='ctx'> 	if (st.wx_pages || st.uxn_pages) {</div><div class='ctx'> 		pr_warn("Checked W+X mappings: FAILED, %lu W+X pages found, %lu non-UXN pages found\n",</div><div class='head'>diff --git a/arch/arm64/mm/ptdump_debugfs.c b/arch/arm64/mm/ptdump_debugfs.c<br/>index 68bf1a125502..1e308328c079 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ptdump_debugfs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/ptdump_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/ptdump_debugfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/ptdump_debugfs.c</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/memory_hotplug.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptdump.h&gt;</div><div class='hunk'>@@ -9,9 +8,7 @@ static int ptdump_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdump_info *info = m-&gt;private;</div><div class='ctx'> </div><div class='del'>-	get_online_mems();</div><div class='ctx'> 	ptdump_walk(m, info);</div><div class='del'>-	put_online_mems();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> DEFINE_SHOW_ATTRIBUTE(ptdump);</div><div class='head'>diff --git a/arch/arm64/mm/trans_pgd.c b/arch/arm64/mm/trans_pgd.c<br/>index 0f7b484cb2ff..18543b603c77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/trans_pgd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/mm/trans_pgd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/mm/trans_pgd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/mm/trans_pgd.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static void _copy_pte(pte_t *dst_ptep, pte_t *src_ptep, unsigned long addr)</div><div class='ctx'> 		 */</div><div class='ctx'> 		BUG_ON(!pfn_valid(pte_pfn(pte)));</div><div class='ctx'> </div><div class='del'>-		__set_pte(dst_ptep, pte_mkpresent(pte_mkwrite_novma(pte)));</div><div class='add'>+		__set_pte(dst_ptep, pte_mkvalid(pte_mkwrite_novma(pte)));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -162,6 +162,13 @@ static int copy_p4d(struct trans_pgd_info *info, pgd_t *dst_pgdp,</div><div class='ctx'> 	unsigned long next;</div><div class='ctx'> 	unsigned long addr = start;</div><div class='ctx'> </div><div class='add'>+	if (pgd_none(READ_ONCE(*dst_pgdp))) {</div><div class='add'>+		dst_p4dp = trans_alloc(info);</div><div class='add'>+		if (!dst_p4dp)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		pgd_populate(NULL, dst_pgdp, dst_p4dp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dst_p4dp = p4d_offset(dst_pgdp, start);</div><div class='ctx'> 	src_p4dp = p4d_offset(src_pgdp, start);</div><div class='ctx'> 	do {</div><div class='head'>diff --git a/arch/arm64/net/Makefile b/arch/arm64/net/Makefile<br/>index 5c540efb7d9b..3ae382bfca87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/net/Makefile</a></div><div class='hunk'>@@ -2,4 +2,4 @@</div><div class='ctx'> #</div><div class='ctx'> # ARM64 networking code</div><div class='ctx'> #</div><div class='del'>-obj-$(CONFIG_BPF_JIT) += bpf_jit_comp.o</div><div class='add'>+obj-$(CONFIG_BPF_JIT) += bpf_jit_comp.o bpf_timed_may_goto.o</div><div class='head'>diff --git a/arch/arm64/net/bpf_jit.h b/arch/arm64/net/bpf_jit.h<br/>index b22ab2f97a30..bbea4f36f9f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/bpf_jit.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/bpf_jit.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/net/bpf_jit.h</a></div><div class='hunk'>@@ -119,6 +119,26 @@</div><div class='ctx'> 	aarch64_insn_gen_load_store_ex(Rt, Rn, Rs, A64_SIZE(sf), \</div><div class='ctx'> 				       AARCH64_INSN_LDST_STORE_REL_EX)</div><div class='ctx'> </div><div class='add'>+/* Load-acquire &amp; store-release */</div><div class='add'>+#define A64_LDAR(Rt, Rn, size)  \</div><div class='add'>+	aarch64_insn_gen_load_acq_store_rel(Rt, Rn, AARCH64_INSN_SIZE_##size, \</div><div class='add'>+					    AARCH64_INSN_LDST_LOAD_ACQ)</div><div class='add'>+#define A64_STLR(Rt, Rn, size)  \</div><div class='add'>+	aarch64_insn_gen_load_acq_store_rel(Rt, Rn, AARCH64_INSN_SIZE_##size, \</div><div class='add'>+					    AARCH64_INSN_LDST_STORE_REL)</div><div class='add'>+</div><div class='add'>+/* Rt = [Rn] (load acquire) */</div><div class='add'>+#define A64_LDARB(Wt, Xn)	A64_LDAR(Wt, Xn, 8)</div><div class='add'>+#define A64_LDARH(Wt, Xn)	A64_LDAR(Wt, Xn, 16)</div><div class='add'>+#define A64_LDAR32(Wt, Xn)	A64_LDAR(Wt, Xn, 32)</div><div class='add'>+#define A64_LDAR64(Xt, Xn)	A64_LDAR(Xt, Xn, 64)</div><div class='add'>+</div><div class='add'>+/* [Rn] = Rt (store release) */</div><div class='add'>+#define A64_STLRB(Wt, Xn)	A64_STLR(Wt, Xn, 8)</div><div class='add'>+#define A64_STLRH(Wt, Xn)	A64_STLR(Wt, Xn, 16)</div><div class='add'>+#define A64_STLR32(Wt, Xn)	A64_STLR(Wt, Xn, 32)</div><div class='add'>+#define A64_STLR64(Xt, Xn)	A64_STLR(Xt, Xn, 64)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * LSE atomics</div><div class='ctx'>  *</div><div class='hunk'>@@ -305,4 +325,9 @@</div><div class='ctx'> #define A64_MRS_SP_EL0(Rt) \</div><div class='ctx'> 	aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_SP_EL0)</div><div class='ctx'> </div><div class='add'>+/* Barriers */</div><div class='add'>+#define A64_SB aarch64_insn_get_sb_value()</div><div class='add'>+#define A64_DSB_NSH (aarch64_insn_get_dsb_base_value() | 0x7 &lt;&lt; 8)</div><div class='add'>+#define A64_ISB aarch64_insn_get_isb_value()</div><div class='add'>+</div><div class='ctx'> #endif /* _BPF_JIT_H */</div><div class='head'>diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c<br/>index 8bbd0b20136a..ab83089c3d8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/bpf_jit_comp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/bpf_jit_comp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -7,8 +7,10 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "bpf_jit: " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/arm-smccc.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='add'>+#include &lt;linux/cfi.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='hunk'>@@ -17,9 +19,10 @@</div><div class='ctx'> #include &lt;asm/asm-extable.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='del'>-#include &lt;asm/patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bpf_jit.h"</div><div class='hunk'>@@ -28,6 +31,7 @@</div><div class='ctx'> #define TMP_REG_2 (MAX_BPF_JIT_REG + 1)</div><div class='ctx'> #define TCCNT_PTR (MAX_BPF_JIT_REG + 2)</div><div class='ctx'> #define TMP_REG_3 (MAX_BPF_JIT_REG + 3)</div><div class='add'>+#define PRIVATE_SP (MAX_BPF_JIT_REG + 4)</div><div class='ctx'> #define ARENA_VM_START (MAX_BPF_JIT_REG + 5)</div><div class='ctx'> </div><div class='ctx'> #define check_imm(bits, imm) do {				\</div><div class='hunk'>@@ -66,6 +70,8 @@ static const int bpf2a64[] = {</div><div class='ctx'> 	[TCCNT_PTR] = A64_R(26),</div><div class='ctx'> 	/* temporary register for blinding constants */</div><div class='ctx'> 	[BPF_REG_AX] = A64_R(9),</div><div class='add'>+	/* callee saved register for private stack pointer */</div><div class='add'>+	[PRIVATE_SP] = A64_R(27),</div><div class='ctx'> 	/* callee saved register for kern_vm_start address */</div><div class='ctx'> 	[ARENA_VM_START] = A64_R(28),</div><div class='ctx'> };</div><div class='hunk'>@@ -84,6 +90,7 @@ struct jit_ctx {</div><div class='ctx'> 	u64 user_vm_start;</div><div class='ctx'> 	u64 arena_vm_start;</div><div class='ctx'> 	bool fp_used;</div><div class='add'>+	bool priv_sp_used;</div><div class='ctx'> 	bool write;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -96,6 +103,10 @@ struct bpf_plt {</div><div class='ctx'> #define PLT_TARGET_SIZE   sizeof_field(struct bpf_plt, target)</div><div class='ctx'> #define PLT_TARGET_OFFSET offsetof(struct bpf_plt, target)</div><div class='ctx'> </div><div class='add'>+/* Memory size/value to protect private stack overflow/underflow */</div><div class='add'>+#define PRIV_STACK_GUARD_SZ    16</div><div class='add'>+#define PRIV_STACK_GUARD_VAL   0xEB9F12345678eb9fULL</div><div class='add'>+</div><div class='ctx'> static inline void emit(const u32 insn, struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	if (ctx-&gt;image != NULL &amp;&amp; ctx-&gt;write)</div><div class='hunk'>@@ -104,6 +115,14 @@ static inline void emit(const u32 insn, struct jit_ctx *ctx)</div><div class='ctx'> 	ctx-&gt;idx++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void emit_u32_data(const u32 data, struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (ctx-&gt;image != NULL &amp;&amp; ctx-&gt;write)</div><div class='add'>+		ctx-&gt;image[ctx-&gt;idx] = data;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;idx++;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void emit_a64_mov_i(const int is64, const int reg,</div><div class='ctx'> 				  const s32 val, struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -164,6 +183,12 @@ static inline void emit_bti(u32 insn, struct jit_ctx *ctx)</div><div class='ctx'> 		emit(insn, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void emit_kcfi(u32 hash, struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_CFI))</div><div class='add'>+		emit_u32_data(hash, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Kernel addresses in the vmalloc space use at most 48 bits, and the</div><div class='ctx'>  * remaining bits are guaranteed to be 0x1. So we can compose the address</div><div class='hunk'>@@ -267,6 +292,19 @@ static bool is_addsub_imm(u32 imm)</div><div class='ctx'> 	return !(imm &amp; ~0xfff) || !(imm &amp; ~0xfff000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void emit_a64_add_i(const bool is64, const int dst, const int src,</div><div class='add'>+				  const int tmp, const s32 imm, struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (is_addsub_imm(imm)) {</div><div class='add'>+		emit(A64_ADD_I(is64, dst, src, imm), ctx);</div><div class='add'>+	} else if (is_addsub_imm(-(u32)imm)) {</div><div class='add'>+		emit(A64_SUB_I(is64, dst, src, -imm), ctx);</div><div class='add'>+	} else {</div><div class='add'>+		emit_a64_mov_i(is64, tmp, imm, ctx);</div><div class='add'>+		emit(A64_ADD(is64, dst, src, tmp), ctx);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * There are 3 types of AArch64 LDR/STR (immediate) instruction:</div><div class='ctx'>  * Post-index, Pre-index, Unsigned offset.</div><div class='hunk'>@@ -372,8 +410,11 @@ static void find_used_callee_regs(struct jit_ctx *ctx)</div><div class='ctx'> 	if (reg_used &amp; 8)</div><div class='ctx'> 		ctx-&gt;used_callee_reg[i++] = bpf2a64[BPF_REG_9];</div><div class='ctx'> </div><div class='del'>-	if (reg_used &amp; 16)</div><div class='add'>+	if (reg_used &amp; 16) {</div><div class='ctx'> 		ctx-&gt;used_callee_reg[i++] = bpf2a64[BPF_REG_FP];</div><div class='add'>+		if (ctx-&gt;priv_sp_used)</div><div class='add'>+			ctx-&gt;used_callee_reg[i++] = bpf2a64[PRIVATE_SP];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;arena_vm_start)</div><div class='ctx'> 		ctx-&gt;used_callee_reg[i++] = bpf2a64[ARENA_VM_START];</div><div class='hunk'>@@ -397,6 +438,7 @@ static void push_callee_regs(struct jit_ctx *ctx)</div><div class='ctx'> 		emit(A64_PUSH(A64_R(23), A64_R(24), A64_SP), ctx);</div><div class='ctx'> 		emit(A64_PUSH(A64_R(25), A64_R(26), A64_SP), ctx);</div><div class='ctx'> 		emit(A64_PUSH(A64_R(27), A64_R(28), A64_SP), ctx);</div><div class='add'>+		ctx-&gt;fp_used = true;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		find_used_callee_regs(ctx);</div><div class='ctx'> 		for (i = 0; i + 1 &lt; ctx-&gt;nr_used_callee_reg; i += 2) {</div><div class='hunk'>@@ -446,6 +488,19 @@ static void pop_callee_regs(struct jit_ctx *ctx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void emit_percpu_ptr(const u8 dst_reg, void __percpu *ptr,</div><div class='add'>+			    struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	const u8 tmp = bpf2a64[TMP_REG_1];</div><div class='add'>+</div><div class='add'>+	emit_a64_mov_i64(dst_reg, (__force const u64)ptr, ctx);</div><div class='add'>+	if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))</div><div class='add'>+		emit(A64_MRS_TPIDR_EL2(tmp), ctx);</div><div class='add'>+	else</div><div class='add'>+		emit(A64_MRS_TPIDR_EL1(tmp), ctx);</div><div class='add'>+	emit(A64_ADD(1, dst_reg, dst_reg, tmp), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define BTI_INSNS (IS_ENABLED(CONFIG_ARM64_BTI_KERNEL) ? 1 : 0)</div><div class='ctx'> #define PAC_INSNS (IS_ENABLED(CONFIG_ARM64_PTR_AUTH_KERNEL) ? 1 : 0)</div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +516,8 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf)</div><div class='ctx'> 	const bool is_main_prog = !bpf_is_subprog(prog);</div><div class='ctx'> 	const u8 fp = bpf2a64[BPF_REG_FP];</div><div class='ctx'> 	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='del'>-	const int idx0 = ctx-&gt;idx;</div><div class='add'>+	const u8 priv_sp = bpf2a64[PRIVATE_SP];</div><div class='add'>+	void __percpu *priv_stack_ptr;</div><div class='ctx'> 	int cur_offset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -487,6 +543,9 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	emit_kcfi(is_main_prog ? cfi_bpf_hash : cfi_bpf_subprog_hash, ctx);</div><div class='add'>+	const int idx0 = ctx-&gt;idx;</div><div class='add'>+</div><div class='ctx'> 	/* bpf function may be invoked by 3 instruction types:</div><div class='ctx'> 	 * 1. bl, attached via freplace to bpf prog via short jump</div><div class='ctx'> 	 * 2. br, attached via freplace to bpf prog via long jump</div><div class='hunk'>@@ -536,15 +595,23 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf)</div><div class='ctx'> 		emit(A64_SUB_I(1, A64_SP, A64_FP, 96), ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;fp_used)</div><div class='del'>-		/* Set up BPF prog stack base register */</div><div class='del'>-		emit(A64_MOV(1, fp, A64_SP), ctx);</div><div class='del'>-</div><div class='ctx'> 	/* Stack must be multiples of 16B */</div><div class='ctx'> 	ctx-&gt;stack_size = round_up(prog-&gt;aux-&gt;stack_depth, 16);</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;fp_used) {</div><div class='add'>+		if (ctx-&gt;priv_sp_used) {</div><div class='add'>+			/* Set up private stack pointer */</div><div class='add'>+			priv_stack_ptr = prog-&gt;aux-&gt;priv_stack_ptr + PRIV_STACK_GUARD_SZ;</div><div class='add'>+			emit_percpu_ptr(priv_sp, priv_stack_ptr, ctx);</div><div class='add'>+			emit(A64_ADD_I(1, fp, priv_sp, ctx-&gt;stack_size), ctx);</div><div class='add'>+		} else {</div><div class='add'>+			/* Set up BPF prog stack base register */</div><div class='add'>+			emit(A64_MOV(1, fp, A64_SP), ctx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Set up function call stack */</div><div class='del'>-	if (ctx-&gt;stack_size)</div><div class='add'>+	if (ctx-&gt;stack_size &amp;&amp; !ctx-&gt;priv_sp_used)</div><div class='ctx'> 		emit(A64_SUB_I(1, A64_SP, A64_SP, ctx-&gt;stack_size), ctx);</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;arena_vm_start)</div><div class='hunk'>@@ -608,7 +675,7 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 	emit(A64_STR64I(tcc, ptr, 0), ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* restore SP */</div><div class='del'>-	if (ctx-&gt;stack_size)</div><div class='add'>+	if (ctx-&gt;stack_size &amp;&amp; !ctx-&gt;priv_sp_used)</div><div class='ctx'> 		emit(A64_ADD_I(1, A64_SP, A64_SP, ctx-&gt;stack_size), ctx);</div><div class='ctx'> </div><div class='ctx'> 	pop_callee_regs(ctx);</div><div class='hunk'>@@ -634,6 +701,81 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emit_atomic_ld_st(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	const s32 imm = insn-&gt;imm;</div><div class='add'>+	const s16 off = insn-&gt;off;</div><div class='add'>+	const u8 code = insn-&gt;code;</div><div class='add'>+	const bool arena = BPF_MODE(code) == BPF_PROBE_ATOMIC;</div><div class='add'>+	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='add'>+	const u8 dst = bpf2a64[insn-&gt;dst_reg];</div><div class='add'>+	const u8 src = bpf2a64[insn-&gt;src_reg];</div><div class='add'>+	const u8 tmp = bpf2a64[TMP_REG_1];</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_LOAD_ACQ:</div><div class='add'>+		reg = src;</div><div class='add'>+		break;</div><div class='add'>+	case BPF_STORE_REL:</div><div class='add'>+		reg = dst;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err_once("unknown atomic load/store op code %02x\n", imm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (off) {</div><div class='add'>+		emit_a64_add_i(1, tmp, reg, tmp, off, ctx);</div><div class='add'>+		reg = tmp;</div><div class='add'>+	}</div><div class='add'>+	if (arena) {</div><div class='add'>+		emit(A64_ADD(1, tmp, reg, arena_vm_base), ctx);</div><div class='add'>+		reg = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_LOAD_ACQ:</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			emit(A64_LDARB(dst, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			emit(A64_LDARH(dst, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			emit(A64_LDAR32(dst, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			emit(A64_LDAR64(dst, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case BPF_STORE_REL:</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			emit(A64_STLRB(src, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			emit(A64_STLRH(src, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			emit(A64_STLR32(src, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			emit(A64_STLR64(src, reg), ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err_once("unexpected atomic load/store op code %02x\n",</div><div class='add'>+			    imm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ARM64_LSE_ATOMICS</div><div class='ctx'> static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -648,16 +790,13 @@ static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> 	const s16 off = insn-&gt;off;</div><div class='ctx'> 	u8 reg = dst;</div><div class='ctx'> </div><div class='del'>-	if (off || arena) {</div><div class='del'>-		if (off) {</div><div class='del'>-			emit_a64_mov_i(1, tmp, off, ctx);</div><div class='del'>-			emit(A64_ADD(1, tmp, tmp, dst), ctx);</div><div class='del'>-			reg = tmp;</div><div class='del'>-		}</div><div class='del'>-		if (arena) {</div><div class='del'>-			emit(A64_ADD(1, tmp, reg, arena_vm_base), ctx);</div><div class='del'>-			reg = tmp;</div><div class='del'>-		}</div><div class='add'>+	if (off) {</div><div class='add'>+		emit_a64_add_i(1, tmp, reg, tmp, off, ctx);</div><div class='add'>+		reg = tmp;</div><div class='add'>+	}</div><div class='add'>+	if (arena) {</div><div class='add'>+		emit(A64_ADD(1, tmp, reg, arena_vm_base), ctx);</div><div class='add'>+		reg = tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (insn-&gt;imm) {</div><div class='hunk'>@@ -723,7 +862,7 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> 	const s32 imm = insn-&gt;imm;</div><div class='ctx'> 	const s16 off = insn-&gt;off;</div><div class='ctx'> 	const bool isdw = BPF_SIZE(code) == BPF_DW;</div><div class='del'>-	u8 reg;</div><div class='add'>+	u8 reg = dst;</div><div class='ctx'> 	s32 jmp_offset;</div><div class='ctx'> </div><div class='ctx'> 	if (BPF_MODE(code) == BPF_PROBE_ATOMIC) {</div><div class='hunk'>@@ -732,11 +871,8 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!off) {</div><div class='del'>-		reg = dst;</div><div class='del'>-	} else {</div><div class='del'>-		emit_a64_mov_i(1, tmp, off, ctx);</div><div class='del'>-		emit(A64_ADD(1, tmp, tmp, dst), ctx);</div><div class='add'>+	if (off) {</div><div class='add'>+		emit_a64_add_i(1, tmp, reg, tmp, off, ctx);</div><div class='ctx'> 		reg = tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -857,23 +993,70 @@ static void build_plt(struct jit_ctx *ctx)</div><div class='ctx'> 		plt-&gt;target = (u64)&amp;dummy_tramp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void build_epilogue(struct jit_ctx *ctx)</div><div class='add'>+/* Clobbers BPF registers 1-4, aka x0-x3 */</div><div class='add'>+static void __maybe_unused build_bhb_mitigation(struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	const u8 r1 = bpf2a64[BPF_REG_1]; /* aka x0 */</div><div class='add'>+	u8 k = get_spectre_bhb_loop_value();</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY) ||</div><div class='add'>+	    cpu_mitigations_off() || __nospectre_bhb ||</div><div class='add'>+	    arm64_get_spectre_v2_state() == SPECTRE_VULNERABLE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (capable(CAP_SYS_ADMIN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (supports_clearbhb(SCOPE_SYSTEM)) {</div><div class='add'>+		emit(aarch64_insn_gen_hint(AARCH64_INSN_HINT_CLEARBHB), ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (k) {</div><div class='add'>+		emit_a64_mov_i64(r1, k, ctx);</div><div class='add'>+		emit(A64_B(1), ctx);</div><div class='add'>+		emit(A64_SUBS_I(true, r1, r1, 1), ctx);</div><div class='add'>+		emit(A64_B_(A64_COND_NE, -2), ctx);</div><div class='add'>+		emit(aarch64_insn_gen_dsb(AARCH64_INSN_MB_ISH), ctx);</div><div class='add'>+		emit(aarch64_insn_get_isb_value(), ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_spectre_bhb_fw_mitigated()) {</div><div class='add'>+		emit(A64_ORR_I(false, r1, AARCH64_INSN_REG_ZR,</div><div class='add'>+			       ARM_SMCCC_ARCH_WORKAROUND_3), ctx);</div><div class='add'>+		switch (arm_smccc_1_1_get_conduit()) {</div><div class='add'>+		case SMCCC_CONDUIT_HVC:</div><div class='add'>+			emit(aarch64_insn_get_hvc_value(), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case SMCCC_CONDUIT_SMC:</div><div class='add'>+			emit(aarch64_insn_get_smc_value(), ctx);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pr_err_once("Firmware mitigation enabled with unknown conduit\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void build_epilogue(struct jit_ctx *ctx, bool was_classic)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 r0 = bpf2a64[BPF_REG_0];</div><div class='ctx'> 	const u8 ptr = bpf2a64[TCCNT_PTR];</div><div class='ctx'> </div><div class='ctx'> 	/* We're done with BPF stack */</div><div class='del'>-	if (ctx-&gt;stack_size)</div><div class='add'>+	if (ctx-&gt;stack_size &amp;&amp; !ctx-&gt;priv_sp_used)</div><div class='ctx'> 		emit(A64_ADD_I(1, A64_SP, A64_SP, ctx-&gt;stack_size), ctx);</div><div class='ctx'> </div><div class='ctx'> 	pop_callee_regs(ctx);</div><div class='ctx'> </div><div class='ctx'> 	emit(A64_POP(A64_ZR, ptr, A64_SP), ctx);</div><div class='ctx'> </div><div class='add'>+	if (was_classic)</div><div class='add'>+		build_bhb_mitigation(ctx);</div><div class='add'>+</div><div class='ctx'> 	/* Restore FP/LR registers */</div><div class='ctx'> 	emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);</div><div class='ctx'> </div><div class='del'>-	/* Set return value */</div><div class='add'>+	/* Move the return value from bpf:r0 (aka x7) to x0 */</div><div class='ctx'> 	emit(A64_MOV(1, A64_R(0), r0), ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Authenticate lr */</div><div class='hunk'>@@ -883,19 +1066,53 @@ static void build_epilogue(struct jit_ctx *ctx)</div><div class='ctx'> 	emit(A64_RET(A64_LR), ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define BPF_FIXUP_OFFSET_MASK	GENMASK(26, 0)</div><div class='add'>+/*</div><div class='add'>+ * Metadata encoding for exception handling in JITed code.</div><div class='add'>+ *</div><div class='add'>+ * Format of `fixup` field in `struct exception_table_entry`:</div><div class='add'>+ *</div><div class='add'>+ * Bit layout of `fixup` (32-bit):</div><div class='add'>+ *</div><div class='add'>+ * +-----------+--------+-----------+-----------+----------+</div><div class='add'>+ * |   31-27   | 26-22  |     21    |   20-16   |   15-0   |</div><div class='add'>+ * |           |        |           |           |          |</div><div class='add'>+ * | FIXUP_REG | Unused | ARENA_ACC | ARENA_REG |  OFFSET  |</div><div class='add'>+ * +-----------+--------+-----------+-----------+----------+</div><div class='add'>+ *</div><div class='add'>+ * - OFFSET (16 bits): Offset used to compute address for Load/Store instruction.</div><div class='add'>+ * - ARENA_REG (5 bits): Register that is used to calculate the address for load/store when</div><div class='add'>+ *                       accessing the arena region.</div><div class='add'>+ * - ARENA_ACCESS (1 bit): This bit is set when the faulting instruction accessed the arena region.</div><div class='add'>+ * - FIXUP_REG (5 bits): Destination register for the load instruction (cleared on fault) or set to</div><div class='add'>+ *                       DONT_CLEAR if it is a store instruction.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define BPF_FIXUP_OFFSET_MASK      GENMASK(15, 0)</div><div class='add'>+#define BPF_FIXUP_ARENA_REG_MASK   GENMASK(20, 16)</div><div class='add'>+#define BPF_ARENA_ACCESS           BIT(21)</div><div class='ctx'> #define BPF_FIXUP_REG_MASK	GENMASK(31, 27)</div><div class='ctx'> #define DONT_CLEAR 5 /* Unused ARM64 register from BPF's POV */</div><div class='ctx'> </div><div class='ctx'> bool ex_handler_bpf(const struct exception_table_entry *ex,</div><div class='ctx'> 		    struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex-&gt;fixup);</div><div class='ctx'> 	int dst_reg = FIELD_GET(BPF_FIXUP_REG_MASK, ex-&gt;fixup);</div><div class='add'>+	s16 off = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex-&gt;fixup);</div><div class='add'>+	int arena_reg = FIELD_GET(BPF_FIXUP_ARENA_REG_MASK, ex-&gt;fixup);</div><div class='add'>+	bool is_arena = !!(ex-&gt;fixup &amp; BPF_ARENA_ACCESS);</div><div class='add'>+	bool is_write = (dst_reg == DONT_CLEAR);</div><div class='add'>+	unsigned long addr;</div><div class='add'>+</div><div class='add'>+	if (is_arena) {</div><div class='add'>+		addr = regs-&gt;regs[arena_reg] + off;</div><div class='add'>+		bpf_prog_report_arena_violation(is_write, addr, regs-&gt;pc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (dst_reg != DONT_CLEAR)</div><div class='ctx'> 		regs-&gt;regs[dst_reg] = 0;</div><div class='del'>-	regs-&gt;pc = (unsigned long)&amp;ex-&gt;fixup - offset;</div><div class='add'>+	/* Skip the faulting instruction */</div><div class='add'>+	regs-&gt;pc += AARCH64_INSN_SIZE;</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -905,7 +1122,9 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 				 int dst_reg)</div><div class='ctx'> {</div><div class='ctx'> 	off_t ins_offset;</div><div class='del'>-	off_t fixup_offset;</div><div class='add'>+	s16 off = insn-&gt;off;</div><div class='add'>+	bool is_arena;</div><div class='add'>+	int arena_reg;</div><div class='ctx'> 	unsigned long pc;</div><div class='ctx'> 	struct exception_table_entry *ex;</div><div class='ctx'> </div><div class='hunk'>@@ -914,11 +1133,16 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM &amp;&amp;</div><div class='del'>-		BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX &amp;&amp;</div><div class='del'>-			BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32 &amp;&amp;</div><div class='del'>-				BPF_MODE(insn-&gt;code) != BPF_PROBE_ATOMIC)</div><div class='add'>+	    BPF_MODE(insn-&gt;code) != BPF_PROBE_MEMSX &amp;&amp;</div><div class='add'>+	    BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32 &amp;&amp;</div><div class='add'>+	    BPF_MODE(insn-&gt;code) != BPF_PROBE_MEM32SX &amp;&amp;</div><div class='add'>+	    BPF_MODE(insn-&gt;code) != BPF_PROBE_ATOMIC)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	is_arena = (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) ||</div><div class='add'>+		   (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32SX) ||</div><div class='add'>+		   (BPF_MODE(insn-&gt;code) == BPF_PROBE_ATOMIC);</div><div class='add'>+</div><div class='ctx'> 	if (!ctx-&gt;prog-&gt;aux-&gt;extable ||</div><div class='ctx'> 	    WARN_ON_ONCE(ctx-&gt;exentry_idx &gt;= ctx-&gt;prog-&gt;aux-&gt;num_exentries))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -937,22 +1161,6 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Since the extable follows the program, the fixup offset is always</div><div class='del'>-	 * negative and limited to BPF_JIT_REGION_SIZE. Store a positive value</div><div class='del'>-	 * to keep things simple, and put the destination register in the upper</div><div class='del'>-	 * bits. We don't need to worry about buildtime or runtime sort</div><div class='del'>-	 * modifying the upper bits because the table is already sorted, and</div><div class='del'>-	 * isn't part of the main exception table.</div><div class='del'>-	 *</div><div class='del'>-	 * The fixup_offset is set to the next instruction from the instruction</div><div class='del'>-	 * that may fault. The execution will jump to this after handling the</div><div class='del'>-	 * fault.</div><div class='del'>-	 */</div><div class='del'>-	fixup_offset = (long)&amp;ex-&gt;fixup - (pc + AARCH64_INSN_SIZE);</div><div class='del'>-	if (!FIELD_FIT(BPF_FIXUP_OFFSET_MASK, fixup_offset))</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * The offsets above have been calculated using the RO buffer but we</div><div class='ctx'> 	 * need to use the R/W buffer for writes.</div><div class='ctx'> 	 * switch ex to rw buffer for writing.</div><div class='hunk'>@@ -964,8 +1172,26 @@ static int add_exception_handler(const struct bpf_insn *insn,</div><div class='ctx'> 	if (BPF_CLASS(insn-&gt;code) != BPF_LDX)</div><div class='ctx'> 		dst_reg = DONT_CLEAR;</div><div class='ctx'> </div><div class='del'>-	ex-&gt;fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |</div><div class='del'>-		    FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);</div><div class='add'>+	ex-&gt;fixup = FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);</div><div class='add'>+</div><div class='add'>+	if (is_arena) {</div><div class='add'>+		ex-&gt;fixup |= BPF_ARENA_ACCESS;</div><div class='add'>+		/*</div><div class='add'>+		 * insn-&gt;src_reg/dst_reg holds the address in the arena region with upper 32-bits</div><div class='add'>+		 * being zero because of a preceding addr_space_cast(r&lt;n&gt;, 0x0, 0x1) instruction.</div><div class='add'>+		 * This address is adjusted with the addition of arena_vm_start (see the</div><div class='add'>+		 * implementation of BPF_PROBE_MEM32 and BPF_PROBE_ATOMIC) before being used for the</div><div class='add'>+		 * memory access. Pass the reg holding the unmodified 32-bit address to</div><div class='add'>+		 * ex_handler_bpf.</div><div class='add'>+		 */</div><div class='add'>+		if (BPF_CLASS(insn-&gt;code) == BPF_LDX)</div><div class='add'>+			arena_reg = bpf2a64[insn-&gt;src_reg];</div><div class='add'>+		else</div><div class='add'>+			arena_reg = bpf2a64[insn-&gt;dst_reg];</div><div class='add'>+</div><div class='add'>+		ex-&gt;fixup |=  FIELD_PREP(BPF_FIXUP_OFFSET_MASK, off) |</div><div class='add'>+			      FIELD_PREP(BPF_FIXUP_ARENA_REG_MASK, arena_reg);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ex-&gt;type = EX_TYPE_BPF;</div><div class='ctx'> </div><div class='hunk'>@@ -989,6 +1215,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,</div><div class='ctx'> 	const u8 tmp2 = bpf2a64[TMP_REG_2];</div><div class='ctx'> 	const u8 fp = bpf2a64[BPF_REG_FP];</div><div class='ctx'> 	const u8 arena_vm_base = bpf2a64[ARENA_VM_START];</div><div class='add'>+	const u8 priv_sp = bpf2a64[PRIVATE_SP];</div><div class='ctx'> 	const s16 off = insn-&gt;off;</div><div class='ctx'> 	const s32 imm = insn-&gt;imm;</div><div class='ctx'> 	const int i = insn - ctx-&gt;prog-&gt;insnsi;</div><div class='hunk'>@@ -1146,20 +1373,13 @@ emit_bswap_uxt:</div><div class='ctx'> 	/* dst = dst OP imm */</div><div class='ctx'> 	case BPF_ALU | BPF_ADD | BPF_K:</div><div class='ctx'> 	case BPF_ALU64 | BPF_ADD | BPF_K:</div><div class='del'>-		if (is_addsub_imm(imm)) {</div><div class='del'>-			emit(A64_ADD_I(is64, dst, dst, imm), ctx);</div><div class='del'>-		} else if (is_addsub_imm(-imm)) {</div><div class='del'>-			emit(A64_SUB_I(is64, dst, dst, -imm), ctx);</div><div class='del'>-		} else {</div><div class='del'>-			emit_a64_mov_i(is64, tmp, imm, ctx);</div><div class='del'>-			emit(A64_ADD(is64, dst, dst, tmp), ctx);</div><div class='del'>-		}</div><div class='add'>+		emit_a64_add_i(is64, dst, dst, tmp, imm, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_ALU | BPF_SUB | BPF_K:</div><div class='ctx'> 	case BPF_ALU64 | BPF_SUB | BPF_K:</div><div class='ctx'> 		if (is_addsub_imm(imm)) {</div><div class='ctx'> 			emit(A64_SUB_I(is64, dst, dst, imm), ctx);</div><div class='del'>-		} else if (is_addsub_imm(-imm)) {</div><div class='add'>+		} else if (is_addsub_imm(-(u32)imm)) {</div><div class='ctx'> 			emit(A64_ADD_I(is64, dst, dst, -imm), ctx);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			emit_a64_mov_i(is64, tmp, imm, ctx);</div><div class='hunk'>@@ -1330,7 +1550,7 @@ emit_cond_jmp:</div><div class='ctx'> 	case BPF_JMP32 | BPF_JSLE | BPF_K:</div><div class='ctx'> 		if (is_addsub_imm(imm)) {</div><div class='ctx'> 			emit(A64_CMP_I(is64, dst, imm), ctx);</div><div class='del'>-		} else if (is_addsub_imm(-imm)) {</div><div class='add'>+		} else if (is_addsub_imm(-(u32)imm)) {</div><div class='ctx'> 			emit(A64_CMN_I(is64, dst, -imm), ctx);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			emit_a64_mov_i(is64, tmp, imm, ctx);</div><div class='hunk'>@@ -1381,7 +1601,13 @@ emit_cond_jmp:</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		emit_call(func_addr, ctx);</div><div class='del'>-		emit(A64_MOV(1, r0, A64_R(0)), ctx);</div><div class='add'>+		/*</div><div class='add'>+		 * Call to arch_bpf_timed_may_goto() is emitted by the</div><div class='add'>+		 * verifier and called with custom calling convention with</div><div class='add'>+		 * first argument and return value in BPF_REG_AX (x9).</div><div class='add'>+		 */</div><div class='add'>+		if (func_addr != (u64)arch_bpf_timed_may_goto)</div><div class='add'>+			emit(A64_MOV(1, r0, A64_R(0)), ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* tail call */</div><div class='hunk'>@@ -1435,19 +1661,24 @@ emit_cond_jmp:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='del'>-		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32) {</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32SX | BPF_B:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32SX | BPF_H:</div><div class='add'>+	case BPF_LDX | BPF_PROBE_MEM32SX | BPF_W:</div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32 ||</div><div class='add'>+		    BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32SX) {</div><div class='ctx'> 			emit(A64_ADD(1, tmp2, src, arena_vm_base), ctx);</div><div class='ctx'> 			src = tmp2;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (src == fp) {</div><div class='del'>-			src_adj = A64_SP;</div><div class='add'>+			src_adj = ctx-&gt;priv_sp_used ? priv_sp : A64_SP;</div><div class='ctx'> 			off_adj = off + ctx-&gt;stack_size;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			src_adj = src;</div><div class='ctx'> 			off_adj = off;</div><div class='ctx'> 		}</div><div class='ctx'> 		sign_extend = (BPF_MODE(insn-&gt;code) == BPF_MEMSX ||</div><div class='del'>-				BPF_MODE(insn-&gt;code) == BPF_PROBE_MEMSX);</div><div class='add'>+				BPF_MODE(insn-&gt;code) == BPF_PROBE_MEMSX ||</div><div class='add'>+				 BPF_MODE(insn-&gt;code) == BPF_PROBE_MEM32SX);</div><div class='ctx'> 		switch (BPF_SIZE(code)) {</div><div class='ctx'> 		case BPF_W:</div><div class='ctx'> 			if (is_lsi_offset(off_adj, 2)) {</div><div class='hunk'>@@ -1506,17 +1737,14 @@ emit_cond_jmp:</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	/* speculation barrier */</div><div class='add'>+	/* speculation barrier against v1 and v4 */</div><div class='ctx'> 	case BPF_ST | BPF_NOSPEC:</div><div class='del'>-		/*</div><div class='del'>-		 * Nothing required here.</div><div class='del'>-		 *</div><div class='del'>-		 * In case of arm64, we rely on the firmware mitigation of</div><div class='del'>-		 * Speculative Store Bypass as controlled via the ssbd kernel</div><div class='del'>-		 * parameter. Whenever the mitigation is enabled, it works</div><div class='del'>-		 * for all of the kernel code with no need to provide any</div><div class='del'>-		 * additional instructions.</div><div class='del'>-		 */</div><div class='add'>+		if (alternative_has_cap_likely(ARM64_HAS_SB)) {</div><div class='add'>+			emit(A64_SB, ctx);</div><div class='add'>+		} else {</div><div class='add'>+			emit(A64_DSB_NSH, ctx);</div><div class='add'>+			emit(A64_ISB, ctx);</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* ST: *(size *)(dst + off) = imm */</div><div class='hunk'>@@ -1533,7 +1761,7 @@ emit_cond_jmp:</div><div class='ctx'> 			dst = tmp2;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (dst == fp) {</div><div class='del'>-			dst_adj = A64_SP;</div><div class='add'>+			dst_adj = ctx-&gt;priv_sp_used ? priv_sp : A64_SP;</div><div class='ctx'> 			off_adj = off + ctx-&gt;stack_size;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dst_adj = dst;</div><div class='hunk'>@@ -1595,7 +1823,7 @@ emit_cond_jmp:</div><div class='ctx'> 			dst = tmp2;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (dst == fp) {</div><div class='del'>-			dst_adj = A64_SP;</div><div class='add'>+			dst_adj = ctx-&gt;priv_sp_used ? priv_sp : A64_SP;</div><div class='ctx'> 			off_adj = off + ctx-&gt;stack_size;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dst_adj = dst;</div><div class='hunk'>@@ -1641,20 +1869,28 @@ emit_cond_jmp:</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_H:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='add'>+	case BPF_STX | BPF_PROBE_ATOMIC | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_PROBE_ATOMIC | BPF_H:</div><div class='ctx'> 	case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:</div><div class='ctx'> 	case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:</div><div class='del'>-		if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='add'>+		if (bpf_atomic_is_load_store(insn))</div><div class='add'>+			ret = emit_atomic_ld_st(insn, ctx);</div><div class='add'>+		else if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='ctx'> 			ret = emit_lse_atomic(insn, ctx);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = emit_ll_sc_atomic(insn, ctx);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		ret = add_exception_handler(insn, ctx, dst);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		if (BPF_MODE(insn-&gt;code) == BPF_PROBE_ATOMIC) {</div><div class='add'>+			ret = add_exception_handler(insn, ctx, dst);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1732,6 +1968,39 @@ static inline void bpf_flush_icache(void *start, void *end)</div><div class='ctx'> 	flush_icache_range((unsigned long)start, (unsigned long)end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void priv_stack_init_guard(void __percpu *priv_stack_ptr, int alloc_size)</div><div class='add'>+{</div><div class='add'>+	int cpu, underflow_idx = (alloc_size - PRIV_STACK_GUARD_SZ) &gt;&gt; 3;</div><div class='add'>+	u64 *stack_ptr;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		stack_ptr = per_cpu_ptr(priv_stack_ptr, cpu);</div><div class='add'>+		stack_ptr[0] = PRIV_STACK_GUARD_VAL;</div><div class='add'>+		stack_ptr[1] = PRIV_STACK_GUARD_VAL;</div><div class='add'>+		stack_ptr[underflow_idx] = PRIV_STACK_GUARD_VAL;</div><div class='add'>+		stack_ptr[underflow_idx + 1] = PRIV_STACK_GUARD_VAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void priv_stack_check_guard(void __percpu *priv_stack_ptr, int alloc_size,</div><div class='add'>+				   struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	int cpu, underflow_idx = (alloc_size - PRIV_STACK_GUARD_SZ) &gt;&gt; 3;</div><div class='add'>+	u64 *stack_ptr;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		stack_ptr = per_cpu_ptr(priv_stack_ptr, cpu);</div><div class='add'>+		if (stack_ptr[0] != PRIV_STACK_GUARD_VAL ||</div><div class='add'>+		    stack_ptr[1] != PRIV_STACK_GUARD_VAL ||</div><div class='add'>+		    stack_ptr[underflow_idx] != PRIV_STACK_GUARD_VAL ||</div><div class='add'>+		    stack_ptr[underflow_idx + 1] != PRIV_STACK_GUARD_VAL) {</div><div class='add'>+			pr_err("BPF private stack overflow/underflow detected for prog %sx\n",</div><div class='add'>+			       bpf_jit_get_prog_name(prog));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct arm64_jit_data {</div><div class='ctx'> 	struct bpf_binary_header *header;</div><div class='ctx'> 	u8 *ro_image;</div><div class='hunk'>@@ -1744,9 +2013,11 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	int image_size, prog_size, extable_size, extable_align, extable_offset;</div><div class='ctx'> 	struct bpf_prog *tmp, *orig_prog = prog;</div><div class='ctx'> 	struct bpf_binary_header *header;</div><div class='del'>-	struct bpf_binary_header *ro_header;</div><div class='add'>+	struct bpf_binary_header *ro_header = NULL;</div><div class='ctx'> 	struct arm64_jit_data *jit_data;</div><div class='add'>+	void __percpu *priv_stack_ptr = NULL;</div><div class='ctx'> 	bool was_classic = bpf_prog_was_classic(prog);</div><div class='add'>+	int priv_stack_alloc_sz;</div><div class='ctx'> 	bool tmp_blinded = false;</div><div class='ctx'> 	bool extra_pass = false;</div><div class='ctx'> 	struct jit_ctx ctx;</div><div class='hunk'>@@ -1778,6 +2049,23 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 		}</div><div class='ctx'> 		prog-&gt;aux-&gt;jit_data = jit_data;</div><div class='ctx'> 	}</div><div class='add'>+	priv_stack_ptr = prog-&gt;aux-&gt;priv_stack_ptr;</div><div class='add'>+	if (!priv_stack_ptr &amp;&amp; prog-&gt;aux-&gt;jits_use_priv_stack) {</div><div class='add'>+		/* Allocate actual private stack size with verifier-calculated</div><div class='add'>+		 * stack size plus two memory guards to protect overflow and</div><div class='add'>+		 * underflow.</div><div class='add'>+		 */</div><div class='add'>+		priv_stack_alloc_sz = round_up(prog-&gt;aux-&gt;stack_depth, 16) +</div><div class='add'>+				      2 * PRIV_STACK_GUARD_SZ;</div><div class='add'>+		priv_stack_ptr = __alloc_percpu_gfp(priv_stack_alloc_sz, 16, GFP_KERNEL);</div><div class='add'>+		if (!priv_stack_ptr) {</div><div class='add'>+			prog = orig_prog;</div><div class='add'>+			goto out_priv_stack;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv_stack_init_guard(priv_stack_ptr, priv_stack_alloc_sz);</div><div class='add'>+		prog-&gt;aux-&gt;priv_stack_ptr = priv_stack_ptr;</div><div class='add'>+	}</div><div class='ctx'> 	if (jit_data-&gt;ctx.offset) {</div><div class='ctx'> 		ctx = jit_data-&gt;ctx;</div><div class='ctx'> 		ro_image_ptr = jit_data-&gt;ro_image;</div><div class='hunk'>@@ -1801,6 +2089,9 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	ctx.user_vm_start = bpf_arena_get_user_vm_start(prog-&gt;aux-&gt;arena);</div><div class='ctx'> 	ctx.arena_vm_start = bpf_arena_get_kern_vm_start(prog-&gt;aux-&gt;arena);</div><div class='ctx'> </div><div class='add'>+	if (priv_stack_ptr)</div><div class='add'>+		ctx.priv_sp_used = true;</div><div class='add'>+</div><div class='ctx'> 	/* Pass 1: Estimate the maximum image size.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * BPF line info needs ctx-&gt;offset[i] to be the offset of</div><div class='hunk'>@@ -1817,7 +2108,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctx.epilogue_offset = ctx.idx;</div><div class='del'>-	build_epilogue(&amp;ctx);</div><div class='add'>+	build_epilogue(&amp;ctx, was_classic);</div><div class='ctx'> 	build_plt(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	extable_align = __alignof__(struct exception_table_entry);</div><div class='hunk'>@@ -1880,7 +2171,7 @@ skip_init_ctx:</div><div class='ctx'> 		goto out_free_hdr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	build_epilogue(&amp;ctx);</div><div class='add'>+	build_epilogue(&amp;ctx, was_classic);</div><div class='ctx'> 	build_plt(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Extra pass to validate JITed code. */</div><div class='hunk'>@@ -1928,9 +2219,9 @@ skip_init_ctx:</div><div class='ctx'> 		jit_data-&gt;ro_header = ro_header;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	prog-&gt;bpf_func = (void *)ctx.ro_image;</div><div class='add'>+	prog-&gt;bpf_func = (void *)ctx.ro_image + cfi_get_offset();</div><div class='ctx'> 	prog-&gt;jited = 1;</div><div class='del'>-	prog-&gt;jited_len = prog_size;</div><div class='add'>+	prog-&gt;jited_len = prog_size - cfi_get_offset();</div><div class='ctx'> </div><div class='ctx'> 	if (!prog-&gt;is_func || extra_pass) {</div><div class='ctx'> 		int i;</div><div class='hunk'>@@ -1940,7 +2231,12 @@ skip_init_ctx:</div><div class='ctx'> 			ctx.offset[i] *= AARCH64_INSN_SIZE;</div><div class='ctx'> 		bpf_prog_fill_jited_linfo(prog, ctx.offset + 1);</div><div class='ctx'> out_off:</div><div class='add'>+		if (!ro_header &amp;&amp; priv_stack_ptr) {</div><div class='add'>+			free_percpu(priv_stack_ptr);</div><div class='add'>+			prog-&gt;aux-&gt;priv_stack_ptr = NULL;</div><div class='add'>+		}</div><div class='ctx'> 		kvfree(ctx.offset);</div><div class='add'>+out_priv_stack:</div><div class='ctx'> 		kfree(jit_data);</div><div class='ctx'> 		prog-&gt;aux-&gt;jit_data = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1959,6 +2255,11 @@ out_free_hdr:</div><div class='ctx'> 	goto out_off;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_supports_private_stack(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool bpf_jit_supports_kfunc_call(void)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -1983,7 +2284,7 @@ bool bpf_jit_supports_subprog_tailcalls(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='del'>-			    int args_off, int retval_off, int run_ctx_off,</div><div class='add'>+			    int bargs_off, int retval_off, int run_ctx_off,</div><div class='ctx'> 			    bool save_ret)</div><div class='ctx'> {</div><div class='ctx'> 	__le32 *branch;</div><div class='hunk'>@@ -2025,7 +2326,7 @@ static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='ctx'> 	branch = ctx-&gt;image + ctx-&gt;idx;</div><div class='ctx'> 	emit(A64_NOP, ctx);</div><div class='ctx'> </div><div class='del'>-	emit(A64_ADD_I(1, A64_R(0), A64_SP, args_off), ctx);</div><div class='add'>+	emit(A64_ADD_I(1, A64_R(0), A64_SP, bargs_off), ctx);</div><div class='ctx'> 	if (!p-&gt;jited)</div><div class='ctx'> 		emit_addr_mov_i64(A64_R(1), (const u64)p-&gt;insnsi, ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -2050,7 +2351,7 @@ static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='del'>-			       int args_off, int retval_off, int run_ctx_off,</div><div class='add'>+			       int bargs_off, int retval_off, int run_ctx_off,</div><div class='ctx'> 			       __le32 **branches)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -2060,7 +2361,7 @@ static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='ctx'> 	 */</div><div class='ctx'> 	emit(A64_STR64I(A64_ZR, A64_SP, retval_off), ctx);</div><div class='ctx'> 	for (i = 0; i &lt; tl-&gt;nr_links; i++) {</div><div class='del'>-		invoke_bpf_prog(ctx, tl-&gt;links[i], args_off, retval_off,</div><div class='add'>+		invoke_bpf_prog(ctx, tl-&gt;links[i], bargs_off, retval_off,</div><div class='ctx'> 				run_ctx_off, true);</div><div class='ctx'> 		/* if (*(u64 *)(sp + retval_off) !=  0)</div><div class='ctx'> 		 *	goto do_fexit;</div><div class='hunk'>@@ -2074,26 +2375,129 @@ static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void save_args(struct jit_ctx *ctx, int args_off, int nregs)</div><div class='add'>+struct arg_aux {</div><div class='add'>+	/* how many args are passed through registers, the rest of the args are</div><div class='add'>+	 * passed through stack</div><div class='add'>+	 */</div><div class='add'>+	int args_in_regs;</div><div class='add'>+	/* how many registers are used to pass arguments */</div><div class='add'>+	int regs_for_args;</div><div class='add'>+	/* how much stack is used for additional args passed to bpf program</div><div class='add'>+	 * that did not fit in original function registers</div><div class='add'>+	 */</div><div class='add'>+	int bstack_for_args;</div><div class='add'>+	/* home much stack is used for additional args passed to the</div><div class='add'>+	 * original function when called from trampoline (this one needs</div><div class='add'>+	 * arguments to be properly aligned)</div><div class='add'>+	 */</div><div class='add'>+	int ostack_for_args;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int calc_arg_aux(const struct btf_func_model *m,</div><div class='add'>+			 struct arg_aux *a)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int stack_slots, nregs, slots, i;</div><div class='add'>+</div><div class='add'>+	/* verifier ensures m-&gt;nr_args &lt;= MAX_BPF_FUNC_ARGS */</div><div class='add'>+	for (i = 0, nregs = 0; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		if (nregs + slots &lt;= 8) /* passed through register ? */</div><div class='add'>+			nregs += slots;</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a-&gt;args_in_regs = i;</div><div class='add'>+	a-&gt;regs_for_args = nregs;</div><div class='add'>+	a-&gt;ostack_for_args = 0;</div><div class='add'>+	a-&gt;bstack_for_args = 0;</div><div class='add'>+</div><div class='add'>+	/* the rest arguments are passed through stack */</div><div class='add'>+	for (; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		stack_slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		a-&gt;bstack_for_args += stack_slots * 8;</div><div class='add'>+		a-&gt;ostack_for_args = a-&gt;ostack_for_args + stack_slots * 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nregs; i++) {</div><div class='del'>-		emit(A64_STR64I(i, A64_SP, args_off), ctx);</div><div class='del'>-		args_off += 8;</div><div class='add'>+static void clear_garbage(struct jit_ctx *ctx, int reg, int effective_bytes)</div><div class='add'>+{</div><div class='add'>+	if (effective_bytes) {</div><div class='add'>+		int garbage_bits = 64 - 8 * effective_bytes;</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		/* garbage bits are at the right end */</div><div class='add'>+		emit(A64_LSR(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+		emit(A64_LSL(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+#else</div><div class='add'>+		/* garbage bits are at the left end */</div><div class='add'>+		emit(A64_LSL(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+		emit(A64_LSR(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void restore_args(struct jit_ctx *ctx, int args_off, int nregs)</div><div class='add'>+static void save_args(struct jit_ctx *ctx, int bargs_off, int oargs_off,</div><div class='add'>+		      const struct btf_func_model *m,</div><div class='add'>+		      const struct arg_aux *a,</div><div class='add'>+		      bool for_call_origin)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	int reg;</div><div class='add'>+	int doff;</div><div class='add'>+	int soff;</div><div class='add'>+	int slots;</div><div class='add'>+	u8 tmp = bpf2a64[TMP_REG_1];</div><div class='add'>+</div><div class='add'>+	/* store arguments to the stack for the bpf program, or restore</div><div class='add'>+	 * arguments from stack for the original function</div><div class='add'>+	 */</div><div class='add'>+	for (reg = 0; reg &lt; a-&gt;regs_for_args; reg++) {</div><div class='add'>+		emit(for_call_origin ?</div><div class='add'>+		     A64_LDR64I(reg, A64_SP, bargs_off) :</div><div class='add'>+		     A64_STR64I(reg, A64_SP, bargs_off),</div><div class='add'>+		     ctx);</div><div class='add'>+		bargs_off += 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soff = 32; /* on stack arguments start from FP + 32 */</div><div class='add'>+	doff = (for_call_origin ? oargs_off : bargs_off);</div><div class='add'>+</div><div class='add'>+	/* save on stack arguments */</div><div class='add'>+	for (i = a-&gt;args_in_regs; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		/* verifier ensures arg_size &lt;= 16, so slots equals 1 or 2 */</div><div class='add'>+		while (slots-- &gt; 0) {</div><div class='add'>+			emit(A64_LDR64I(tmp, A64_FP, soff), ctx);</div><div class='add'>+			/* if there is unused space in the last slot, clear</div><div class='add'>+			 * the garbage contained in the space.</div><div class='add'>+			 */</div><div class='add'>+			if (slots == 0 &amp;&amp; !for_call_origin)</div><div class='add'>+				clear_garbage(ctx, tmp, m-&gt;arg_size[i] % 8);</div><div class='add'>+			emit(A64_STR64I(tmp, A64_SP, doff), ctx);</div><div class='add'>+			soff += 8;</div><div class='add'>+			doff += 8;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nregs; i++) {</div><div class='del'>-		emit(A64_LDR64I(i, A64_SP, args_off), ctx);</div><div class='del'>-		args_off += 8;</div><div class='add'>+static void restore_args(struct jit_ctx *ctx, int bargs_off, int nregs)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	for (reg = 0; reg &lt; nregs; reg++) {</div><div class='add'>+		emit(A64_LDR64I(reg, A64_SP, bargs_off), ctx);</div><div class='add'>+		bargs_off += 8;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_struct_ops_tramp(const struct bpf_tramp_links *fentry_links)</div><div class='add'>+{</div><div class='add'>+	return fentry_links-&gt;nr_links == 1 &amp;&amp;</div><div class='add'>+		fentry_links-&gt;links[0]-&gt;link.type == BPF_LINK_TYPE_STRUCT_OPS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Based on the x86's implementation of arch_prepare_bpf_trampoline().</div><div class='ctx'>  *</div><div class='ctx'>  * bpf prog and function entry before bpf trampoline hooked:</div><div class='hunk'>@@ -2107,49 +2511,61 @@ static void restore_args(struct jit_ctx *ctx, int args_off, int nregs)</div><div class='ctx'>  */</div><div class='ctx'> static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 			      struct bpf_tramp_links *tlinks, void *func_addr,</div><div class='del'>-			      int nregs, u32 flags)</div><div class='add'>+			      const struct btf_func_model *m,</div><div class='add'>+			      const struct arg_aux *a,</div><div class='add'>+			      u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int stack_size;</div><div class='ctx'> 	int retaddr_off;</div><div class='ctx'> 	int regs_off;</div><div class='ctx'> 	int retval_off;</div><div class='del'>-	int args_off;</div><div class='del'>-	int nregs_off;</div><div class='add'>+	int bargs_off;</div><div class='add'>+	int nfuncargs_off;</div><div class='ctx'> 	int ip_off;</div><div class='ctx'> 	int run_ctx_off;</div><div class='add'>+	int oargs_off;</div><div class='add'>+	int nfuncargs;</div><div class='ctx'> 	struct bpf_tramp_links *fentry = &amp;tlinks[BPF_TRAMP_FENTRY];</div><div class='ctx'> 	struct bpf_tramp_links *fexit = &amp;tlinks[BPF_TRAMP_FEXIT];</div><div class='ctx'> 	struct bpf_tramp_links *fmod_ret = &amp;tlinks[BPF_TRAMP_MODIFY_RETURN];</div><div class='ctx'> 	bool save_ret;</div><div class='ctx'> 	__le32 **branches = NULL;</div><div class='add'>+	bool is_struct_ops = is_struct_ops_tramp(fentry);</div><div class='ctx'> </div><div class='ctx'> 	/* trampoline stack layout:</div><div class='del'>-	 *                  [ parent ip         ]</div><div class='del'>-	 *                  [ FP                ]</div><div class='del'>-	 * SP + retaddr_off [ self ip           ]</div><div class='del'>-	 *                  [ FP                ]</div><div class='add'>+	 *                    [ parent ip         ]</div><div class='add'>+	 *                    [ FP                ]</div><div class='add'>+	 * SP + retaddr_off   [ self ip           ]</div><div class='add'>+	 *                    [ FP                ]</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ padding           ] align SP to multiples of 16</div><div class='add'>+	 *                    [ padding           ] align SP to multiples of 16</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ x20               ] callee saved reg x20</div><div class='del'>-	 * SP + regs_off    [ x19               ] callee saved reg x19</div><div class='add'>+	 *                    [ x20               ] callee saved reg x20</div><div class='add'>+	 * SP + regs_off      [ x19               ] callee saved reg x19</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + retval_off  [ return value      ] BPF_TRAMP_F_CALL_ORIG or</div><div class='del'>-	 *                                        BPF_TRAMP_F_RET_FENTRY_RET</div><div class='add'>+	 * SP + retval_off    [ return value      ] BPF_TRAMP_F_CALL_ORIG or</div><div class='add'>+	 *                                          BPF_TRAMP_F_RET_FENTRY_RET</div><div class='add'>+	 *                    [ arg reg N         ]</div><div class='add'>+	 *                    [ ...               ]</div><div class='add'>+	 * SP + bargs_off     [ arg reg 1         ] for bpf</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ arg reg N         ]</div><div class='del'>-	 *                  [ ...               ]</div><div class='del'>-	 * SP + args_off    [ arg reg 1         ]</div><div class='add'>+	 * SP + nfuncargs_off [ arg regs count    ]</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + nregs_off   [ arg regs count    ]</div><div class='add'>+	 * SP + ip_off        [ traced function   ] BPF_TRAMP_F_IP_ARG flag</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + ip_off      [ traced function   ] BPF_TRAMP_F_IP_ARG flag</div><div class='add'>+	 * SP + run_ctx_off   [ bpf_tramp_run_ctx ]</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + run_ctx_off [ bpf_tramp_run_ctx ]</div><div class='add'>+	 *                    [ stack arg N       ]</div><div class='add'>+	 *                    [ ...               ]</div><div class='add'>+	 * SP + oargs_off     [ stack arg 1       ] for original func</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	stack_size = 0;</div><div class='add'>+	oargs_off = stack_size;</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG)</div><div class='add'>+		stack_size +=  a-&gt;ostack_for_args;</div><div class='add'>+</div><div class='ctx'> 	run_ctx_off = stack_size;</div><div class='ctx'> 	/* room for bpf_tramp_run_ctx */</div><div class='ctx'> 	stack_size += round_up(sizeof(struct bpf_tramp_run_ctx), 8);</div><div class='hunk'>@@ -2159,13 +2575,14 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_IP_ARG)</div><div class='ctx'> 		stack_size += 8;</div><div class='ctx'> </div><div class='del'>-	nregs_off = stack_size;</div><div class='add'>+	nfuncargs_off = stack_size;</div><div class='ctx'> 	/* room for args count */</div><div class='ctx'> 	stack_size += 8;</div><div class='ctx'> </div><div class='del'>-	args_off = stack_size;</div><div class='add'>+	bargs_off = stack_size;</div><div class='ctx'> 	/* room for args */</div><div class='del'>-	stack_size += nregs * 8;</div><div class='add'>+	nfuncargs = a-&gt;regs_for_args + a-&gt;bstack_for_args / 8;</div><div class='add'>+	stack_size += 8 * nfuncargs;</div><div class='ctx'> </div><div class='ctx'> 	/* room for return value */</div><div class='ctx'> 	retval_off = stack_size;</div><div class='hunk'>@@ -2183,6 +2600,12 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	/* return address locates above FP */</div><div class='ctx'> 	retaddr_off = stack_size + 8;</div><div class='ctx'> </div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_INDIRECT) {</div><div class='add'>+		/*</div><div class='add'>+		 * Indirect call for bpf_struct_ops</div><div class='add'>+		 */</div><div class='add'>+		emit_kcfi(cfi_get_func_hash(func_addr), ctx);</div><div class='add'>+	}</div><div class='ctx'> 	/* bpf trampoline may be invoked by 3 instruction types:</div><div class='ctx'> 	 * 1. bl, attached to bpf prog or kernel function via short jump</div><div class='ctx'> 	 * 2. br, attached to bpf prog or kernel function via long jump</div><div class='hunk'>@@ -2191,11 +2614,14 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	 */</div><div class='ctx'> 	emit_bti(A64_BTI_JC, ctx);</div><div class='ctx'> </div><div class='del'>-	/* frame for parent function */</div><div class='del'>-	emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx);</div><div class='del'>-	emit(A64_MOV(1, A64_FP, A64_SP), ctx);</div><div class='add'>+	/* x9 is not set for struct_ops */</div><div class='add'>+	if (!is_struct_ops) {</div><div class='add'>+		/* frame for parent function */</div><div class='add'>+		emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx);</div><div class='add'>+		emit(A64_MOV(1, A64_FP, A64_SP), ctx);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* frame for patched function */</div><div class='add'>+	/* frame for patched function for tracing, or caller for struct_ops */</div><div class='ctx'> 	emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);</div><div class='ctx'> 	emit(A64_MOV(1, A64_FP, A64_SP), ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -2209,23 +2635,27 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* save arg regs count*/</div><div class='del'>-	emit(A64_MOVZ(1, A64_R(10), nregs, 0), ctx);</div><div class='del'>-	emit(A64_STR64I(A64_R(10), A64_SP, nregs_off), ctx);</div><div class='add'>+	emit(A64_MOVZ(1, A64_R(10), nfuncargs, 0), ctx);</div><div class='add'>+	emit(A64_STR64I(A64_R(10), A64_SP, nfuncargs_off), ctx);</div><div class='ctx'> </div><div class='del'>-	/* save arg regs */</div><div class='del'>-	save_args(ctx, args_off, nregs);</div><div class='add'>+	/* save args for bpf */</div><div class='add'>+	save_args(ctx, bargs_off, oargs_off, m, a, false);</div><div class='ctx'> </div><div class='ctx'> 	/* save callee saved registers */</div><div class='ctx'> 	emit(A64_STR64I(A64_R(19), A64_SP, regs_off), ctx);</div><div class='ctx'> 	emit(A64_STR64I(A64_R(20), A64_SP, regs_off + 8), ctx);</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='del'>-		emit_a64_mov_i64(A64_R(0), (const u64)im, ctx);</div><div class='add'>+		/* for the first pass, assume the worst case */</div><div class='add'>+		if (!ctx-&gt;image)</div><div class='add'>+			ctx-&gt;idx += 4;</div><div class='add'>+		else</div><div class='add'>+			emit_a64_mov_i64(A64_R(0), (const u64)im, ctx);</div><div class='ctx'> 		emit_call((const u64)__bpf_tramp_enter, ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fentry-&gt;nr_links; i++)</div><div class='del'>-		invoke_bpf_prog(ctx, fentry-&gt;links[i], args_off,</div><div class='add'>+		invoke_bpf_prog(ctx, fentry-&gt;links[i], bargs_off,</div><div class='ctx'> 				retval_off, run_ctx_off,</div><div class='ctx'> 				flags &amp; BPF_TRAMP_F_RET_FENTRY_RET);</div><div class='ctx'> </div><div class='hunk'>@@ -2235,12 +2665,13 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 		if (!branches)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		invoke_bpf_mod_ret(ctx, fmod_ret, args_off, retval_off,</div><div class='add'>+		invoke_bpf_mod_ret(ctx, fmod_ret, bargs_off, retval_off,</div><div class='ctx'> 				   run_ctx_off, branches);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='del'>-		restore_args(ctx, args_off, nregs);</div><div class='add'>+		/* save args for original func */</div><div class='add'>+		save_args(ctx, bargs_off, oargs_off, m, a, true);</div><div class='ctx'> 		/* call original func */</div><div class='ctx'> 		emit(A64_LDR64I(A64_R(10), A64_SP, retaddr_off), ctx);</div><div class='ctx'> 		emit(A64_ADR(A64_LR, AARCH64_INSN_SIZE * 2), ctx);</div><div class='hunk'>@@ -2259,17 +2690,21 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fexit-&gt;nr_links; i++)</div><div class='del'>-		invoke_bpf_prog(ctx, fexit-&gt;links[i], args_off, retval_off,</div><div class='add'>+		invoke_bpf_prog(ctx, fexit-&gt;links[i], bargs_off, retval_off,</div><div class='ctx'> 				run_ctx_off, false);</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='ctx'> 		im-&gt;ip_epilogue = ctx-&gt;ro_image + ctx-&gt;idx;</div><div class='del'>-		emit_a64_mov_i64(A64_R(0), (const u64)im, ctx);</div><div class='add'>+		/* for the first pass, assume the worst case */</div><div class='add'>+		if (!ctx-&gt;image)</div><div class='add'>+			ctx-&gt;idx += 4;</div><div class='add'>+		else</div><div class='add'>+			emit_a64_mov_i64(A64_R(0), (const u64)im, ctx);</div><div class='ctx'> 		emit_call((const u64)__bpf_tramp_exit, ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_RESTORE_REGS)</div><div class='del'>-		restore_args(ctx, args_off, nregs);</div><div class='add'>+		restore_args(ctx, bargs_off, a-&gt;regs_for_args);</div><div class='ctx'> </div><div class='ctx'> 	/* restore callee saved register x19 and x20 */</div><div class='ctx'> 	emit(A64_LDR64I(A64_R(19), A64_SP, regs_off), ctx);</div><div class='hunk'>@@ -2281,19 +2716,24 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	/* reset SP  */</div><div class='ctx'> 	emit(A64_MOV(1, A64_SP, A64_FP), ctx);</div><div class='ctx'> </div><div class='del'>-	/* pop frames  */</div><div class='del'>-	emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);</div><div class='del'>-	emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx);</div><div class='del'>-</div><div class='del'>-	if (flags &amp; BPF_TRAMP_F_SKIP_FRAME) {</div><div class='del'>-		/* skip patched function, return to parent */</div><div class='del'>-		emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);</div><div class='del'>-		emit(A64_RET(A64_R(9)), ctx);</div><div class='add'>+	if (is_struct_ops) {</div><div class='add'>+		emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);</div><div class='add'>+		emit(A64_RET(A64_LR), ctx);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* return to patched function */</div><div class='del'>-		emit(A64_MOV(1, A64_R(10), A64_LR), ctx);</div><div class='del'>-		emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);</div><div class='del'>-		emit(A64_RET(A64_R(10)), ctx);</div><div class='add'>+		/* pop frames */</div><div class='add'>+		emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);</div><div class='add'>+		emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; BPF_TRAMP_F_SKIP_FRAME) {</div><div class='add'>+			/* skip patched function, return to parent */</div><div class='add'>+			emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);</div><div class='add'>+			emit(A64_RET(A64_R(9)), ctx);</div><div class='add'>+		} else {</div><div class='add'>+			/* return to patched function */</div><div class='add'>+			emit(A64_MOV(1, A64_R(10), A64_LR), ctx);</div><div class='add'>+			emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);</div><div class='add'>+			emit(A64_RET(A64_R(10)), ctx);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(branches);</div><div class='hunk'>@@ -2301,21 +2741,6 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	return ctx-&gt;idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int btf_func_model_nregs(const struct btf_func_model *m)</div><div class='del'>-{</div><div class='del'>-	int nregs = m-&gt;nr_args;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* extra registers needed for struct argument */</div><div class='del'>-	for (i = 0; i &lt; MAX_BPF_FUNC_ARGS; i++) {</div><div class='del'>-		/* The arg_size is at most 16 bytes, enforced by the verifier. */</div><div class='del'>-		if (m-&gt;arg_flags[i] &amp; BTF_FMODEL_STRUCT_ARG)</div><div class='del'>-			nregs += (m-&gt;arg_size[i] + 7) / 8 - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return nregs;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='ctx'> 			     struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -2324,14 +2749,14 @@ int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='ctx'> 		.idx = 0,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct bpf_tramp_image im;</div><div class='del'>-	int nregs, ret;</div><div class='add'>+	struct arg_aux aaux;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	nregs = btf_func_model_nregs(m);</div><div class='del'>-	/* the first 8 registers are used for arguments */</div><div class='del'>-	if (nregs &gt; 8)</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+	ret = calc_arg_aux(m, &amp;aaux);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = prepare_trampoline(&amp;ctx, &amp;im, tlinks, func_addr, nregs, flags);</div><div class='add'>+	ret = prepare_trampoline(&amp;ctx, &amp;im, tlinks, func_addr, m, &amp;aaux, flags);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2358,9 +2783,10 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='ctx'> 				u32 flags, struct bpf_tramp_links *tlinks,</div><div class='ctx'> 				void *func_addr)</div><div class='ctx'> {</div><div class='del'>-	int ret, nregs;</div><div class='del'>-	void *image, *tmp;</div><div class='ctx'> 	u32 size = ro_image_end - ro_image;</div><div class='add'>+	struct arg_aux aaux;</div><div class='add'>+	void *image, *tmp;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* image doesn't need to be in module memory range, so we can</div><div class='ctx'> 	 * use kvmalloc.</div><div class='hunk'>@@ -2376,13 +2802,12 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='ctx'> 		.write = true,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	nregs = btf_func_model_nregs(m);</div><div class='del'>-	/* the first 8 registers are used for arguments */</div><div class='del'>-	if (nregs &gt; 8)</div><div class='del'>-		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	jit_fill_hole(image, (unsigned int)(ro_image_end - ro_image));</div><div class='del'>-	ret = prepare_trampoline(&amp;ctx, im, tlinks, func_addr, nregs, flags);</div><div class='add'>+	ret = calc_arg_aux(m, &amp;aaux);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = prepare_trampoline(&amp;ctx, im, tlinks, func_addr, m, &amp;aaux, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &gt; 0 &amp;&amp; validate_code(&amp;ctx) &lt; 0) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -2398,7 +2823,6 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bpf_flush_icache(ro_image, ro_image + size);</div><div class='ctx'> out:</div><div class='ctx'> 	kvfree(image);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2646,7 +3070,8 @@ bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)</div><div class='ctx'> 	switch (insn-&gt;code) {</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='del'>-		if (!cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='add'>+		if (!bpf_atomic_is_load_store(insn) &amp;&amp;</div><div class='add'>+		    !cpus_have_cap(ARM64_HAS_LSE_ATOMICS))</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -2657,6 +3082,22 @@ bool bpf_jit_supports_percpu_insn(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_bypass_spec_v4(void)</div><div class='add'>+{</div><div class='add'>+	/* In case of arm64, we rely on the firmware mitigation of Speculative</div><div class='add'>+	 * Store Bypass as controlled via the ssbd kernel parameter. Whenever</div><div class='add'>+	 * the mitigation is enabled, it works for all of the kernel code with</div><div class='add'>+	 * no need to provide any additional instructions. Therefore, skip</div><div class='add'>+	 * inserting nospec insns against Spectre v4.</div><div class='add'>+	 */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_timed_may_goto(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool bpf_jit_inlines_helper_call(s32 imm)</div><div class='ctx'> {</div><div class='ctx'> 	switch (imm) {</div><div class='hunk'>@@ -2674,6 +3115,8 @@ void bpf_jit_free(struct bpf_prog *prog)</div><div class='ctx'> 	if (prog-&gt;jited) {</div><div class='ctx'> 		struct arm64_jit_data *jit_data = prog-&gt;aux-&gt;jit_data;</div><div class='ctx'> 		struct bpf_binary_header *hdr;</div><div class='add'>+		void __percpu *priv_stack_ptr;</div><div class='add'>+		int priv_stack_alloc_sz;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If we fail the final pass of JIT (from jit_subprogs),</div><div class='hunk'>@@ -2681,12 +3124,19 @@ void bpf_jit_free(struct bpf_prog *prog)</div><div class='ctx'> 		 * before freeing it.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (jit_data) {</div><div class='del'>-			bpf_arch_text_copy(&amp;jit_data-&gt;ro_header-&gt;size, &amp;jit_data-&gt;header-&gt;size,</div><div class='del'>-					   sizeof(jit_data-&gt;header-&gt;size));</div><div class='add'>+			bpf_jit_binary_pack_finalize(jit_data-&gt;ro_header, jit_data-&gt;header);</div><div class='ctx'> 			kfree(jit_data);</div><div class='ctx'> 		}</div><div class='add'>+		prog-&gt;bpf_func -= cfi_get_offset();</div><div class='ctx'> 		hdr = bpf_jit_binary_pack_hdr(prog);</div><div class='ctx'> 		bpf_jit_binary_pack_free(hdr, NULL);</div><div class='add'>+		priv_stack_ptr = prog-&gt;aux-&gt;priv_stack_ptr;</div><div class='add'>+		if (priv_stack_ptr) {</div><div class='add'>+			priv_stack_alloc_sz = round_up(prog-&gt;aux-&gt;stack_depth, 16) +</div><div class='add'>+					      2 * PRIV_STACK_GUARD_SZ;</div><div class='add'>+			priv_stack_check_guard(priv_stack_ptr, priv_stack_alloc_sz, prog);</div><div class='add'>+			free_percpu(prog-&gt;aux-&gt;priv_stack_ptr);</div><div class='add'>+		}</div><div class='ctx'> 		WARN_ON_ONCE(!bpf_prog_kallsyms_verify_off(prog));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/net/bpf_timed_may_goto.S b/arch/arm64/net/bpf_timed_may_goto.S<br/>new file mode 100644<br/>index 000000000000..894cfcd7b241<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/net/bpf_timed_may_goto.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/net/bpf_timed_may_goto.S</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Puranjay Mohan &lt;puranjay@kernel.org&gt; */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+SYM_FUNC_START(arch_bpf_timed_may_goto)</div><div class='add'>+	/* Allocate stack space and emit frame record */</div><div class='add'>+	stp     x29, x30, [sp, #-64]!</div><div class='add'>+	mov     x29, sp</div><div class='add'>+</div><div class='add'>+	/* Save BPF registers R0 - R5 (x7, x0-x4)*/</div><div class='add'>+	stp	x7, x0, [sp, #16]</div><div class='add'>+	stp	x1, x2, [sp, #32]</div><div class='add'>+	stp	x3, x4, [sp, #48]</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Stack depth was passed in BPF_REG_AX (x9), add it to the BPF_FP</div><div class='add'>+	 * (x25) to get the pointer to count and timestamp and pass it as the</div><div class='add'>+	 * first argument in x0.</div><div class='add'>+	 *</div><div class='add'>+	 * Before generating the call to arch_bpf_timed_may_goto, the verifier</div><div class='add'>+	 * generates a load instruction using FP, i.e. REG_AX = *(u64 *)(FP -</div><div class='add'>+	 * stack_off_cnt), so BPF_REG_FP (x25) is always set up by the arm64</div><div class='add'>+	 * jit in this case.</div><div class='add'>+	 */</div><div class='add'>+	add	x0, x9, x25</div><div class='add'>+	bl	bpf_check_timed_may_goto</div><div class='add'>+	/* BPF_REG_AX(x9) will be stored into count, so move return value to it. */</div><div class='add'>+	mov	x9, x0</div><div class='add'>+</div><div class='add'>+	/* Restore BPF registers R0 - R5 (x7, x0-x4) */</div><div class='add'>+	ldp	x7, x0, [sp, #16]</div><div class='add'>+	ldp	x1, x2, [sp, #32]</div><div class='add'>+	ldp	x3, x4, [sp, #48]</div><div class='add'>+</div><div class='add'>+	/* Restore FP and LR */</div><div class='add'>+	ldp     x29, x30, [sp], #64</div><div class='add'>+</div><div class='add'>+	ret</div><div class='add'>+SYM_FUNC_END(arch_bpf_timed_may_goto)</div><div class='head'>diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps<br/>index eedb5acc21ed..1b32c1232d28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/cpucaps?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/cpucaps</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/cpucaps?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/tools/cpucaps</a></div><div class='hunk'>@@ -28,12 +28,16 @@ HAS_EPAN</div><div class='ctx'> HAS_EVT</div><div class='ctx'> HAS_FPMR</div><div class='ctx'> HAS_FGT</div><div class='add'>+HAS_FGT2</div><div class='ctx'> HAS_FPSIMD</div><div class='add'>+HAS_GCS</div><div class='ctx'> HAS_GENERIC_AUTH</div><div class='ctx'> HAS_GENERIC_AUTH_ARCH_QARMA3</div><div class='ctx'> HAS_GENERIC_AUTH_ARCH_QARMA5</div><div class='ctx'> HAS_GENERIC_AUTH_IMP_DEF</div><div class='del'>-HAS_GIC_CPUIF_SYSREGS</div><div class='add'>+HAS_GICV3_CPUIF</div><div class='add'>+HAS_GICV5_CPUIF</div><div class='add'>+HAS_GICV5_LEGACY</div><div class='ctx'> HAS_GIC_PRIO_MASKING</div><div class='ctx'> HAS_GIC_PRIO_RELAXED_SYNC</div><div class='ctx'> HAS_HCR_NV1</div><div class='hunk'>@@ -43,10 +47,14 @@ HAS_LPA2</div><div class='ctx'> HAS_LSE_ATOMICS</div><div class='ctx'> HAS_MOPS</div><div class='ctx'> HAS_NESTED_VIRT</div><div class='add'>+HAS_BBML2_NOABORT</div><div class='ctx'> HAS_PAN</div><div class='add'>+HAS_PMUV3</div><div class='ctx'> HAS_S1PIE</div><div class='ctx'> HAS_S1POE</div><div class='add'>+HAS_SCTLR2</div><div class='ctx'> HAS_RAS_EXTN</div><div class='add'>+HAS_RASV1P1_EXTN</div><div class='ctx'> HAS_RNG</div><div class='ctx'> HAS_SB</div><div class='ctx'> HAS_STAGE2_FWB</div><div class='hunk'>@@ -56,12 +64,17 @@ HAS_TLB_RANGE</div><div class='ctx'> HAS_VA52</div><div class='ctx'> HAS_VIRT_HOST_EXTN</div><div class='ctx'> HAS_WFXT</div><div class='add'>+HAFT</div><div class='ctx'> HW_DBM</div><div class='ctx'> KVM_HVHE</div><div class='ctx'> KVM_PROTECTED_MODE</div><div class='ctx'> MISMATCHED_CACHE_TYPE</div><div class='add'>+MPAM</div><div class='add'>+MPAM_HCR</div><div class='ctx'> MTE</div><div class='ctx'> MTE_ASYMM</div><div class='add'>+MTE_FAR</div><div class='add'>+MTE_STORE_ONLY</div><div class='ctx'> SME</div><div class='ctx'> SME_FA64</div><div class='ctx'> SME2</div><div class='hunk'>@@ -89,6 +102,7 @@ WORKAROUND_2457168</div><div class='ctx'> WORKAROUND_2645198</div><div class='ctx'> WORKAROUND_2658417</div><div class='ctx'> WORKAROUND_AMPERE_AC03_CPU_38</div><div class='add'>+WORKAROUND_AMPERE_AC04_CPU_23</div><div class='ctx'> WORKAROUND_TRBE_OVERWRITE_FILL_MODE</div><div class='ctx'> WORKAROUND_TSB_FLUSH_FAILURE</div><div class='ctx'> WORKAROUND_TRBE_WRITE_OUT_OF_RANGE</div><div class='hunk'>@@ -100,7 +114,9 @@ WORKAROUND_CAVIUM_TX2_219_TVM</div><div class='ctx'> WORKAROUND_CLEAN_CACHE</div><div class='ctx'> WORKAROUND_DEVICE_LOAD_ACQUIRE</div><div class='ctx'> WORKAROUND_NVIDIA_CARMEL_CNP</div><div class='add'>+WORKAROUND_PMUV3_IMPDEF_TRAPS</div><div class='ctx'> WORKAROUND_QCOM_FALKOR_E1003</div><div class='add'>+WORKAROUND_QCOM_ORYON_CNTVOFF</div><div class='ctx'> WORKAROUND_REPEAT_TLBI</div><div class='ctx'> WORKAROUND_SPECULATIVE_AT</div><div class='ctx'> WORKAROUND_SPECULATIVE_SSBS</div><div class='head'>diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.awk<br/>index d1254a056114..bbbb812603e8 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/gen-sysreg.awk?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/gen-sysreg.awk</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/gen-sysreg.awk?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/tools/gen-sysreg.awk</a></div><div class='hunk'>@@ -111,7 +111,7 @@ END {</div><div class='ctx'> /^$/ { next }</div><div class='ctx'> /^[\t ]*#/ { next }</div><div class='ctx'> </div><div class='del'>-/^SysregFields/ &amp;&amp; block_current() == "Root" {</div><div class='add'>+$1 == "SysregFields" &amp;&amp; block_current() == "Root" {</div><div class='ctx'> 	block_push("SysregFields")</div><div class='ctx'> </div><div class='ctx'> 	expect_fields(2)</div><div class='hunk'>@@ -122,12 +122,17 @@ END {</div><div class='ctx'> 	res1 = "UL(0)"</div><div class='ctx'> 	unkn = "UL(0)"</div><div class='ctx'> </div><div class='add'>+	if (reg in defined_fields)</div><div class='add'>+		fatal("Duplicate SysregFields definition for " reg)</div><div class='add'>+	defined_fields[reg] = 1</div><div class='add'>+</div><div class='ctx'> 	next_bit = 63</div><div class='ctx'> </div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^EndSysregFields/ &amp;&amp; block_current() == "SysregFields" {</div><div class='add'>+$1 == "EndSysregFields" &amp;&amp; block_current() == "SysregFields" {</div><div class='add'>+	expect_fields(1)</div><div class='ctx'> 	if (next_bit &gt; 0)</div><div class='ctx'> 		fatal("Unspecified bits in " reg)</div><div class='ctx'> </div><div class='hunk'>@@ -145,7 +150,7 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Sysreg/ &amp;&amp; block_current() == "Root" {</div><div class='add'>+$1 == "Sysreg" &amp;&amp; block_current() == "Root" {</div><div class='ctx'> 	block_push("Sysreg")</div><div class='ctx'> </div><div class='ctx'> 	expect_fields(7)</div><div class='hunk'>@@ -161,6 +166,10 @@ END {</div><div class='ctx'> 	res1 = "UL(0)"</div><div class='ctx'> 	unkn = "UL(0)"</div><div class='ctx'> </div><div class='add'>+	if (reg in defined_regs)</div><div class='add'>+		fatal("Duplicate Sysreg definition for " reg)</div><div class='add'>+	defined_regs[reg] = 1</div><div class='add'>+</div><div class='ctx'> 	define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)</div><div class='ctx'> 	define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +186,8 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^EndSysreg/ &amp;&amp; block_current() == "Sysreg" {</div><div class='add'>+$1 == "EndSysreg" &amp;&amp; block_current() == "Sysreg" {</div><div class='add'>+	expect_fields(1)</div><div class='ctx'> 	if (next_bit &gt; 0)</div><div class='ctx'> 		fatal("Unspecified bits in " reg)</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +216,7 @@ END {</div><div class='ctx'> </div><div class='ctx'> # Currently this is effectivey a comment, in future we may want to emit</div><div class='ctx'> # defines for the fields.</div><div class='del'>-/^Fields/ &amp;&amp; block_current() == "Sysreg" {</div><div class='add'>+($1 == "Fields" || $1 == "Mapping") &amp;&amp; block_current() == "Sysreg" {</div><div class='ctx'> 	expect_fields(2)</div><div class='ctx'> </div><div class='ctx'> 	if (next_bit != 63)</div><div class='hunk'>@@ -224,7 +234,7 @@ END {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/^Res0/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Res0" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	expect_fields(2)</div><div class='ctx'> 	parse_bitdef(reg, "RES0", $2)</div><div class='ctx'> 	field = "RES0_" msb "_" lsb</div><div class='hunk'>@@ -234,7 +244,7 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Res1/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Res1" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	expect_fields(2)</div><div class='ctx'> 	parse_bitdef(reg, "RES1", $2)</div><div class='ctx'> 	field = "RES1_" msb "_" lsb</div><div class='hunk'>@@ -244,7 +254,7 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Unkn/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Unkn" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	expect_fields(2)</div><div class='ctx'> 	parse_bitdef(reg, "UNKN", $2)</div><div class='ctx'> 	field = "UNKN_" msb "_" lsb</div><div class='hunk'>@@ -254,7 +264,7 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Field/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Field" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	expect_fields(3)</div><div class='ctx'> 	field = $3</div><div class='ctx'> 	parse_bitdef(reg, field, $2)</div><div class='hunk'>@@ -265,14 +275,14 @@ END {</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Raz/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Raz" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	expect_fields(2)</div><div class='ctx'> 	parse_bitdef(reg, field, $2)</div><div class='ctx'> </div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^SignedEnum/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "SignedEnum" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	block_push("Enum")</div><div class='ctx'> </div><div class='ctx'> 	expect_fields(3)</div><div class='hunk'>@@ -282,10 +292,12 @@ END {</div><div class='ctx'> 	define_field(reg, field, msb, lsb)</div><div class='ctx'> 	define_field_sign(reg, field, "true")</div><div class='ctx'> </div><div class='add'>+	delete seen_enum_vals</div><div class='add'>+</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^UnsignedEnum/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "UnsignedEnum" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	block_push("Enum")</div><div class='ctx'> </div><div class='ctx'> 	expect_fields(3)</div><div class='hunk'>@@ -295,10 +307,12 @@ END {</div><div class='ctx'> 	define_field(reg, field, msb, lsb)</div><div class='ctx'> 	define_field_sign(reg, field, "false")</div><div class='ctx'> </div><div class='add'>+	delete seen_enum_vals</div><div class='add'>+</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^Enum/ &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='add'>+$1 == "Enum" &amp;&amp; (block_current() == "Sysreg" || block_current() == "SysregFields") {</div><div class='ctx'> 	block_push("Enum")</div><div class='ctx'> </div><div class='ctx'> 	expect_fields(3)</div><div class='hunk'>@@ -307,16 +321,21 @@ END {</div><div class='ctx'> </div><div class='ctx'> 	define_field(reg, field, msb, lsb)</div><div class='ctx'> </div><div class='add'>+	delete seen_enum_vals</div><div class='add'>+</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/^EndEnum/ &amp;&amp; block_current() == "Enum" {</div><div class='add'>+$1 == "EndEnum" &amp;&amp; block_current() == "Enum" {</div><div class='add'>+	expect_fields(1)</div><div class='ctx'> </div><div class='ctx'> 	field = null</div><div class='ctx'> 	msb = null</div><div class='ctx'> 	lsb = null</div><div class='ctx'> 	print ""</div><div class='ctx'> </div><div class='add'>+	delete seen_enum_vals</div><div class='add'>+</div><div class='ctx'> 	block_pop()</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='hunk'>@@ -326,6 +345,10 @@ END {</div><div class='ctx'> 	val = $1</div><div class='ctx'> 	name = $2</div><div class='ctx'> </div><div class='add'>+	if (val in seen_enum_vals)</div><div class='add'>+		fatal("Duplicate Enum value " val " for " name)</div><div class='add'>+	seen_enum_vals[val] = 1</div><div class='add'>+</div><div class='ctx'> 	define(reg "_" field "_" name, "UL(" val ")")</div><div class='ctx'> 	next</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/tools/syscall_32.tbl b/arch/arm64/tools/syscall_32.tbl<br/>index 9a37930d4e26..8d9088bc577d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/syscall_32.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/syscall_32.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/syscall_32.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/tools/syscall_32.tbl</a></div><div class='hunk'>@@ -474,3 +474,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg<br/>index 8d637ac4b7c6..1c6cdf9d54bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/sysreg?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/tools/sysreg</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/tools/sysreg?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/tools/sysreg</a></div><div class='hunk'>@@ -24,8 +24,16 @@</div><div class='ctx'> #	...</div><div class='ctx'> # EndEnum</div><div class='ctx'> </div><div class='del'>-# Alternatively if multiple registers share the same layout then</div><div class='del'>-# a SysregFields block can be used to describe the shared layout</div><div class='add'>+# For VHE aliases (*_EL12, *_EL02) of system registers, a Mapping</div><div class='add'>+# entry describes the register the alias actually accesses:</div><div class='add'>+</div><div class='add'>+# Sysreg 	&lt;name_EL12&gt;	&lt;op0&gt; 	&lt;op1&gt;	&lt;crn&gt;	&lt;crm&gt;	&lt;op2&gt;</div><div class='add'>+# Mapping	&lt;name_EL1&gt;</div><div class='add'>+# EndSysreg</div><div class='add'>+</div><div class='add'>+# Where multiple system registers are not VHE aliases but share a</div><div class='add'>+# common layout, a SysregFields block can be used to describe the</div><div class='add'>+# shared layout:</div><div class='ctx'> </div><div class='ctx'> # SysregFields	&lt;fieldsname&gt;</div><div class='ctx'> # &lt;field&gt;</div><div class='hunk'>@@ -46,7 +54,7 @@</div><div class='ctx'> #</div><div class='ctx'> # In general it is recommended that new enumeration items be named for the</div><div class='ctx'> # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration</div><div class='del'>-# item ACCDATA) though it may be more taseful to do something else.</div><div class='add'>+# item ACCDATA) though it may be more tasteful to do something else.</div><div class='ctx'> </div><div class='ctx'> Sysreg	OSDTRRX_EL1	2	0	0	0	2</div><div class='ctx'> Res0	63:32</div><div class='hunk'>@@ -93,6 +101,17 @@ Res0	63:32</div><div class='ctx'> Field	31:0	DTRTX</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MDSELR_EL1	2	0	0	4	2</div><div class='add'>+Res0	63:6</div><div class='add'>+Field	5:4	BANK</div><div class='add'>+Res0	3:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MDSTEPOP_EL1	2	0	0	5	2</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:0	OPCODE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	OSECCR_EL1	2	0	0	6	2</div><div class='ctx'> Res0	63:32</div><div class='ctx'> Field	31:0	EDECCR</div><div class='hunk'>@@ -103,6 +122,285 @@ Res0	63:1</div><div class='ctx'> Field	0	OSLK</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	SPMACCESSR_EL1	2	0	9	13	3</div><div class='add'>+UnsignedEnum	63:62	P31</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	61:60	P30</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	59:58	P29</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	57:56	P28</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	55:54	P27</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	53:52	P26</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	51:50	P25</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	49:48	P24</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	47:46	P23</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	45:44	P22</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	43:42	P21</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	41:40	P20</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	39:38	P19</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	37:36	P18</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	35:34	P17</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	33:32	P16</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	31:30	P15</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	29:28	P14</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	27:26	P13</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	25:24	P12</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	23:22	P11</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	21:20	P10</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	19:18	P9</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	17:16	P8</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	15:14	P7</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	13:12	P6</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	11:10	P5</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	9:8	P4</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	7:6	P3</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	5:4	P2</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	3:2	P1</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	1:0	P0</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMACCESSR_EL12	2	5	9	13	3</div><div class='add'>+Mapping	SPMACCESSR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMIIDR_EL1	2	0	9	13	4</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:20	ProductID</div><div class='add'>+Field	19:16	Variant</div><div class='add'>+Field	15:12	Revision</div><div class='add'>+Field	11:0	Implementer</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMDEVARCH_EL1	2	0	9	13	5</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:21	ARCHITECT</div><div class='add'>+Field	20	PRESENT</div><div class='add'>+Field	19:16	REVISION</div><div class='add'>+Field	15:12	ARCHVER</div><div class='add'>+Field	11:0	ARCHPART</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMDEVAFF_EL1	2	0	9	13	6</div><div class='add'>+Res0	63:40</div><div class='add'>+Field	39:32	Aff3</div><div class='add'>+Field	31	F0V</div><div class='add'>+Field	30	U</div><div class='add'>+Res0	29:25</div><div class='add'>+Field	24	MT</div><div class='add'>+Field	23:16	Aff2</div><div class='add'>+Field	15:8	Aff1</div><div class='add'>+Field	7:0	Aff0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCFGR_EL1	2	0	9	13	7</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:28	NCG</div><div class='add'>+Res0	27:25</div><div class='add'>+Field	24	HDBG</div><div class='add'>+Field	23	TRO</div><div class='add'>+Field	22	SS</div><div class='add'>+Field	21	FZO</div><div class='add'>+Field	20	MSI</div><div class='add'>+Field	19	RAO</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	NA</div><div class='add'>+Field	16	EX</div><div class='add'>+Field	15:14	RAZ</div><div class='add'>+Field	13:8	SIZE</div><div class='add'>+Field	7:0	N</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMINTENSET_EL1	2	0	9	14	1</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMINTENCLR_EL1	2	0	9	14	2</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMCCNTSVR_EL1	2	0	14	11	7</div><div class='add'>+Field	63:0	CCNT</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMICNTSVR_EL1	2	0	14	12	0</div><div class='add'>+Field	63:0	ICNT</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCR_EL0	2	3	9	12	0</div><div class='add'>+Res0	63:12</div><div class='add'>+Field	11	TRO</div><div class='add'>+Field	10	HDBG</div><div class='add'>+Field	9	FZO</div><div class='add'>+Field	8	NA</div><div class='add'>+Res0	7:5</div><div class='add'>+Field	4	EX</div><div class='add'>+Res0	3:2</div><div class='add'>+Field	1	P</div><div class='add'>+Field	0	E</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCNTENSET_EL0	2	3	9	12	1</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCNTENCLR_EL0	2	3	9	12	2</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMOVSCLR_EL0	2	3	9	12	3</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMZR_EL0       2	3	9	12	4</div><div class='add'>+Field   63:0      P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMSELR_EL0	2	3	9	12	5</div><div class='add'>+Res0	63:10</div><div class='add'>+Field	9:4	SYSPMUSEL</div><div class='add'>+Res0	3:2</div><div class='add'>+Field	1:0	BANK</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMOVSSET_EL0	2	3	9	14	3</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMSCR_EL1	2	7	9	14	7</div><div class='add'>+Field	63:32	IMPDEF</div><div class='add'>+Field	31	RAO</div><div class='add'>+Res0	30:5</div><div class='add'>+Field	4	NAO</div><div class='add'>+Res0	3:1</div><div class='add'>+Field	0	SO</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg ID_PFR0_EL1	3	0	0	1	0</div><div class='ctx'> Res0	63:32</div><div class='ctx'> UnsignedEnum	31:28	RAS</div><div class='hunk'>@@ -176,7 +474,7 @@ EndEnum</div><div class='ctx'> Enum	7:4	Security</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	EL3</div><div class='del'>-	0b0001	NSACR_RFR</div><div class='add'>+	0b0010	NSACR_RFR</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	3:0	ProgMod</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -899,6 +1197,7 @@ UnsignedEnum	31:28	RAS</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> 	0b0010	V1P1</div><div class='add'>+	0b0011	V2</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	27:24	GIC</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1010,7 +1309,15 @@ UnsignedEnum	35:32	FPMR</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	31:12</div><div class='add'>+Res0	31:20</div><div class='add'>+UnsignedEnum	19:16	UINJ</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	15:12	GCIE</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> UnsignedEnum	11:8	MTEFAR</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='hunk'>@@ -1025,6 +1332,138 @@ UnsignedEnum	3:0	MTEPERM</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+SysregFields BRBINFx_EL1</div><div class='add'>+Res0	63:47</div><div class='add'>+Field	46	CCU</div><div class='add'>+Field	45:40	CC_EXP</div><div class='add'>+Field	39:32	CC_MANT</div><div class='add'>+Res0	31:18</div><div class='add'>+Field	17	LASTFAILED</div><div class='add'>+Field	16	T</div><div class='add'>+Res0	15:14</div><div class='add'>+Enum	13:8		TYPE</div><div class='add'>+	0b000000	DIRECT_UNCOND</div><div class='add'>+	0b000001	INDIRECT</div><div class='add'>+	0b000010	DIRECT_LINK</div><div class='add'>+	0b000011	INDIRECT_LINK</div><div class='add'>+	0b000101	RET</div><div class='add'>+	0b000111	ERET</div><div class='add'>+	0b001000	DIRECT_COND</div><div class='add'>+	0b100001	DEBUG_HALT</div><div class='add'>+	0b100010	CALL</div><div class='add'>+	0b100011	TRAP</div><div class='add'>+	0b100100	SERROR</div><div class='add'>+	0b100110	INSN_DEBUG</div><div class='add'>+	0b100111	DATA_DEBUG</div><div class='add'>+	0b101010	ALIGN_FAULT</div><div class='add'>+	0b101011	INSN_FAULT</div><div class='add'>+	0b101100	DATA_FAULT</div><div class='add'>+	0b101110	IRQ</div><div class='add'>+	0b101111	FIQ</div><div class='add'>+	0b110000	IMPDEF_TRAP_EL3</div><div class='add'>+	0b111001	DEBUG_EXIT</div><div class='add'>+EndEnum</div><div class='add'>+Enum	7:6	EL</div><div class='add'>+	0b00	EL0</div><div class='add'>+	0b01	EL1</div><div class='add'>+	0b10	EL2</div><div class='add'>+	0b11	EL3</div><div class='add'>+EndEnum</div><div class='add'>+Field	5	MPRED</div><div class='add'>+Res0	4:2</div><div class='add'>+Enum	1:0	VALID</div><div class='add'>+	0b00	NONE</div><div class='add'>+	0b01	TARGET</div><div class='add'>+	0b10	SOURCE</div><div class='add'>+	0b11	FULL</div><div class='add'>+EndEnum</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+SysregFields	BRBCR_ELx</div><div class='add'>+Res0	63:24</div><div class='add'>+Field	23 	EXCEPTION</div><div class='add'>+Field	22 	ERTN</div><div class='add'>+Res0	21:10</div><div class='add'>+Field	9	FZPSS</div><div class='add'>+Field	8 	FZP</div><div class='add'>+Res0	7</div><div class='add'>+Enum	6:5	TS</div><div class='add'>+	0b01	VIRTUAL</div><div class='add'>+	0b10	GUEST_PHYSICAL</div><div class='add'>+	0b11	PHYSICAL</div><div class='add'>+EndEnum</div><div class='add'>+Field	4	MPRED</div><div class='add'>+Field	3	CC</div><div class='add'>+Res0	2</div><div class='add'>+Field	1	ExBRE</div><div class='add'>+Field	0	E0BRE</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	BRBCR_EL1	2	1	9	0	0</div><div class='add'>+Fields	BRBCR_ELx</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBFCR_EL1	2	1	9	0	1</div><div class='add'>+Res0	63:30</div><div class='add'>+Enum	29:28	BANK</div><div class='add'>+	0b00	BANK_0</div><div class='add'>+	0b01	BANK_1</div><div class='add'>+EndEnum</div><div class='add'>+Res0	27:23</div><div class='add'>+Field	22	CONDDIR</div><div class='add'>+Field	21	DIRCALL</div><div class='add'>+Field	20	INDCALL</div><div class='add'>+Field	19	RTN</div><div class='add'>+Field	18	INDIRECT</div><div class='add'>+Field	17	DIRECT</div><div class='add'>+Field	16	EnI</div><div class='add'>+Res0	15:8</div><div class='add'>+Field	7	PAUSED</div><div class='add'>+Field	6	LASTFAILED</div><div class='add'>+Res0	5:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBTS_EL1	2	1	9	0	2</div><div class='add'>+Field	63:0	TS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBINFINJ_EL1	2	1	9	1	0</div><div class='add'>+Fields BRBINFx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBSRCINJ_EL1	2	1	9	1	1</div><div class='add'>+Field	63:0 ADDRESS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBTGTINJ_EL1	2	1	9	1	2</div><div class='add'>+Field	63:0 ADDRESS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBIDR0_EL1	2	1	9	2	0</div><div class='add'>+Res0	63:16</div><div class='add'>+Enum	15:12	CC</div><div class='add'>+	0b0101	20_BIT</div><div class='add'>+EndEnum</div><div class='add'>+Enum	11:8	FORMAT</div><div class='add'>+	0b0000	FORMAT_0</div><div class='add'>+EndEnum</div><div class='add'>+Enum	7:0		NUMREC</div><div class='add'>+	0b00001000	8</div><div class='add'>+	0b00010000	16</div><div class='add'>+	0b00100000	32</div><div class='add'>+	0b01000000	64</div><div class='add'>+EndEnum</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBCR_EL2	2	4	9	0	0</div><div class='add'>+Fields	BRBCR_ELx</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	BRBCR_EL12	2	5	9	0	0</div><div class='add'>+Fields	BRBCR_ELx</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	ID_AA64ZFR0_EL1	3	0	0	4	4</div><div class='ctx'> Res0	63:60</div><div class='ctx'> UnsignedEnum	59:56	F64MM</div><div class='hunk'>@@ -1035,7 +1474,10 @@ UnsignedEnum	55:52	F32MM</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	51:48</div><div class='add'>+UnsignedEnum	51:48	F16MM</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> UnsignedEnum	47:44	I8MM</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='hunk'>@@ -1053,6 +1495,7 @@ Res0	31:28</div><div class='ctx'> UnsignedEnum	27:24	B16B16</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='add'>+	0b0010	BFSCALE</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	23:20	BF16</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1063,16 +1506,22 @@ UnsignedEnum	19:16	BitPerm</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	15:8</div><div class='add'>+UnsignedEnum	15:12	EltPerm</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	11:8</div><div class='ctx'> UnsignedEnum	7:4	AES</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> 	0b0010	PMULL128</div><div class='add'>+	0b0011	AES2</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	3:0	SVEver</div><div class='ctx'> 	0b0000	IMP</div><div class='ctx'> 	0b0001	SVE2</div><div class='ctx'> 	0b0010	SVE2p1</div><div class='add'>+	0b0011	SVE2p2</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='hunk'>@@ -1090,7 +1539,7 @@ UnsignedEnum	59:56	SMEver</div><div class='ctx'> 	0b0000	SME</div><div class='ctx'> 	0b0001	SME2</div><div class='ctx'> 	0b0010	SME2p1</div><div class='del'>-	0b0000	IMP</div><div class='add'>+	0b0011	SME2p2</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	55:52	I16I64</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1154,7 +1603,29 @@ UnsignedEnum	28	SF8DP2</div><div class='ctx'> 	0b0	NI</div><div class='ctx'> 	0b1	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	27:0</div><div class='add'>+Res0	27:26</div><div class='add'>+UnsignedEnum	25	SBitPerm</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	24	AES</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	23	SFEXPA</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	22:17</div><div class='add'>+UnsignedEnum	16	STMOP</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	15:1</div><div class='add'>+UnsignedEnum	0	SMOP4</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	ID_AA64FPFR0_EL1	3	0	0	4	7</div><div class='hunk'>@@ -1175,7 +1646,15 @@ UnsignedEnum	28	F8DP2</div><div class='ctx'> 	0b0	NI</div><div class='ctx'> 	0b1	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	27:2</div><div class='add'>+UnsignedEnum	27	F8MM8</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	26	F8MM4</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	25:2</div><div class='ctx'> UnsignedEnum	1	F8E4M3</div><div class='ctx'> 	0b0	NI</div><div class='ctx'> 	0b1	IMP</div><div class='hunk'>@@ -1200,7 +1679,7 @@ UnsignedEnum	55:52	BRBE</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> 	0b0010	BRBE_V1P1</div><div class='ctx'> EndEnum</div><div class='del'>-Enum	51:48	MTPMU</div><div class='add'>+SignedEnum	51:48	MTPMU</div><div class='ctx'> 	0b0000	NI_IMPDEF</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> 	0b1111	NI</div><div class='hunk'>@@ -1208,12 +1687,13 @@ EndEnum</div><div class='ctx'> UnsignedEnum	47:44	TraceBuffer</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='add'>+	0b0010	TRBE_V1P1</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	43:40	TraceFilt</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-UnsignedEnum	39:36	DoubleLock</div><div class='add'>+SignedEnum	39:36	DoubleLock</div><div class='ctx'> 	0b0000	IMP</div><div class='ctx'> 	0b1111	NI</div><div class='ctx'> EndEnum</div><div class='hunk'>@@ -1224,11 +1704,18 @@ UnsignedEnum	35:32	PMSVer</div><div class='ctx'> 	0b0011	V1P2</div><div class='ctx'> 	0b0100	V1P3</div><div class='ctx'> 	0b0101	V1P4</div><div class='add'>+	0b0110	V1P5</div><div class='ctx'> EndEnum</div><div class='ctx'> Field	31:28	CTX_CMPs</div><div class='del'>-Res0	27:24</div><div class='add'>+UnsignedEnum	27:24	SEBEP</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	23:20	WRPs</div><div class='del'>-Res0	19:16</div><div class='add'>+UnsignedEnum	19:16	PMSS</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	15:12	BRPs</div><div class='ctx'> UnsignedEnum	11:8	PMUVer</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1238,6 +1725,7 @@ UnsignedEnum	11:8	PMUVer</div><div class='ctx'> 	0b0110	V3P5</div><div class='ctx'> 	0b0111	V3P7</div><div class='ctx'> 	0b1000	V3P8</div><div class='add'>+	0b1001	V3P9</div><div class='ctx'> 	0b1111	IMP_DEF</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	7:4	TraceVer</div><div class='hunk'>@@ -1287,6 +1775,32 @@ Field	15:8	BRPs</div><div class='ctx'> Field	7:0	SYSPMUID</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	ID_AA64DFR2_EL1	3	0	0	5	2</div><div class='add'>+Res0	63:28</div><div class='add'>+UnsignedEnum	27:24	TRBE_EXC</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	23:20	SPE_nVM</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	19:16	SPE_EXC</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	15:8</div><div class='add'>+UnsignedEnum	7:4	BWE</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	FEAT_BWE</div><div class='add'>+	0b0002	FEAT_BWE2</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	3:0	STEP</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	ID_AA64AFR0_EL1	3	0	0	5	4</div><div class='ctx'> Res0	63:32</div><div class='ctx'> Field	31:28	IMPDEF7</div><div class='hunk'>@@ -1378,6 +1892,7 @@ UnsignedEnum	63:60	LS64</div><div class='ctx'> 	0b0001	LS64</div><div class='ctx'> 	0b0010	LS64_V</div><div class='ctx'> 	0b0011	LS64_ACCDATA</div><div class='add'>+	0b0100	LS64WB</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	59:56	XS</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1468,12 +1983,16 @@ EndEnum</div><div class='ctx'> UnsignedEnum	55:52	CSSC</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='add'>+	0b0010	CMPBR</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	51:48	RPRFM</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	47:44</div><div class='add'>+UnsignedEnum	47:44	PCDPHINT</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> UnsignedEnum	43:40	PRFMSLC</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='hunk'>@@ -1526,7 +2045,23 @@ EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	ID_AA64ISAR3_EL1	3	0	0	6	3</div><div class='del'>-Res0	63:16</div><div class='add'>+Res0	63:32</div><div class='add'>+UnsignedEnum	31:28	FPRCVT</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	27:24	LSUI</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	23:20	OCCMO</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	19:16	LSFE</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> UnsignedEnum	15:12	PACM</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	TRIVIAL_IMP</div><div class='hunk'>@@ -1556,6 +2091,7 @@ EndEnum</div><div class='ctx'> UnsignedEnum	59:56	FGT</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='add'>+	0b0010	FGT2</div><div class='ctx'> EndEnum</div><div class='ctx'> Res0	55:48</div><div class='ctx'> UnsignedEnum	47:44	EXS</div><div class='hunk'>@@ -1617,6 +2153,7 @@ Enum	3:0	PARANGE</div><div class='ctx'> 	0b0100	44</div><div class='ctx'> 	0b0101	48</div><div class='ctx'> 	0b0110	52</div><div class='add'>+	0b0111	56</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='hunk'>@@ -1648,6 +2185,8 @@ EndEnum</div><div class='ctx'> UnsignedEnum	39:36	ETS</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='add'>+	0b0010	ETS2</div><div class='add'>+	0b0011	ETS3</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	35:32	TWED</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1688,6 +2227,8 @@ UnsignedEnum	3:0	HAFDBS</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	AF</div><div class='ctx'> 	0b0010	DBM</div><div class='add'>+	0b0011	HAFT</div><div class='add'>+	0b0100	HDBSS</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='hunk'>@@ -1831,12 +2372,21 @@ EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	ID_AA64MMFR4_EL1	3	0	0	7	4</div><div class='del'>-Res0	63:40</div><div class='add'>+Res0	63:48</div><div class='add'>+UnsignedEnum	47:44	SRMASK</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	43:40</div><div class='ctx'> UnsignedEnum	39:36	E3DSE</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	35:28</div><div class='add'>+Res0	35:32</div><div class='add'>+UnsignedEnum	31:28	RMEGDI</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> SignedEnum	27:24	E2H0</div><div class='ctx'> 	0b0000	IMP</div><div class='ctx'> 	0b1110	NI_NV1</div><div class='hunk'>@@ -1845,6 +2395,7 @@ EndEnum</div><div class='ctx'> UnsignedEnum	23:20	NV_frac</div><div class='ctx'> 	0b0000	NV_NV2</div><div class='ctx'> 	0b0001	NV2_ONLY</div><div class='add'>+	0b0010	NV2P1</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	19:16	FGWTE3</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1858,13 +2409,16 @@ UnsignedEnum	11:8	ASID2</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-SignedEnum	7:4	EIESB</div><div class='add'>+UnsignedEnum	7:4	EIESB</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	ToEL3</div><div class='ctx'> 	0b0010	ToELx</div><div class='ctx'> 	0b1111	ANY</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	3:0</div><div class='add'>+UnsignedEnum	3:0	PoPS</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	SCTLR_EL1	3	0	1	0	0</div><div class='hunk'>@@ -1939,8 +2493,30 @@ Field	1	A</div><div class='ctx'> Field	0	M</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='del'>-SysregFields	CPACR_ELx</div><div class='del'>-Res0	63:30</div><div class='add'>+Sysreg	SCTLR_EL12      3	5	1	0	0</div><div class='add'>+Mapping	SCTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRALIAS_EL1  3	0	1	4	6</div><div class='add'>+Mapping	SCTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLR_EL1	3	0	1	0	1</div><div class='add'>+Field   63:0    IMPDEF</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLR_EL12      3	5	1	0	1</div><div class='add'>+Mapping	ACTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRALIAS_EL1  3	0	1	4	5</div><div class='add'>+Mapping	ACTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACR_EL1	3	0	1	0	2</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	TCPAC</div><div class='add'>+Field	30	TAM</div><div class='ctx'> Field	29	E0POE</div><div class='ctx'> Field	28	TTA</div><div class='ctx'> Res0	27:26</div><div class='hunk'>@@ -1950,10 +2526,337 @@ Field	21:20	FPEN</div><div class='ctx'> Res0	19:18</div><div class='ctx'> Field	17:16	ZEN</div><div class='ctx'> Res0	15:0</div><div class='del'>-EndSysregFields</div><div class='add'>+EndSysreg</div><div class='ctx'> </div><div class='del'>-Sysreg	CPACR_EL1	3	0	1	0	2</div><div class='del'>-Fields	CPACR_ELx</div><div class='add'>+Sysreg	CPACRALIAS_EL1  3	0	1	4	4</div><div class='add'>+Mapping	CPACR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRMASK_EL1	3	0	1	4	1</div><div class='add'>+Field	63:0	IMPDEF</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRMASK_EL12	3	5	1	4	1</div><div class='add'>+Mapping	ACTLRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACRMASK_EL1	3	0	1	4	2</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	TCPAC</div><div class='add'>+Field	30	TAM</div><div class='add'>+Field	29	E0POE</div><div class='add'>+Field	28	TTA</div><div class='add'>+Res0	27:25</div><div class='add'>+Field	24	SMEN</div><div class='add'>+Res0	23:21</div><div class='add'>+Field	20	FPEN</div><div class='add'>+Res0	19:17</div><div class='add'>+Field	16	ZEN</div><div class='add'>+Res0	15:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACRMASK_EL12	3	5	1	4	2</div><div class='add'>+Mapping CPACRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PFAR_EL1	3	0	6	0	5</div><div class='add'>+Field	63	NS</div><div class='add'>+Field	62	NSE</div><div class='add'>+Res0	61:56</div><div class='add'>+Field	55:52	PA_55_52</div><div class='add'>+Field	51:48	PA_51_48</div><div class='add'>+Field	47:0	PA</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PFAR_EL12	3	5	6	0	5</div><div class='add'>+Mapping	PFAR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2_EL1      3	0	1	0	3</div><div class='add'>+Res0    63:13</div><div class='add'>+Field   12      CPTM0</div><div class='add'>+Field   11      CPTM</div><div class='add'>+Field   10      CPTA0</div><div class='add'>+Field   9       CPTA</div><div class='add'>+Field   8       EnPACM0</div><div class='add'>+Field   7       EnPACM</div><div class='add'>+Field   6       EnIDCP128</div><div class='add'>+Field   5       EASE</div><div class='add'>+Field   4       EnANERR</div><div class='add'>+Field   3       EnADERR</div><div class='add'>+Field   2       NMEA</div><div class='add'>+Res0    1:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2_EL12     3	5	1	0	3</div><div class='add'>+Mapping	SCTLR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2ALIAS_EL1 3	0	1	4	7</div><div class='add'>+Mapping	SCTLR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2MASK_EL1	3	0	1	4	3</div><div class='add'>+Res0	63:13</div><div class='add'>+Field	12	CPTM0</div><div class='add'>+Field	11	CPTM</div><div class='add'>+Field	10	CPTA0</div><div class='add'>+Field	9	CPTA</div><div class='add'>+Field	8	EnPACM0</div><div class='add'>+Field	7	EnPACM</div><div class='add'>+Field	6	EnIDCP128</div><div class='add'>+Field	5	EASE</div><div class='add'>+Field	4	EnANERR</div><div class='add'>+Field	3	EnADERR</div><div class='add'>+Field	2	NMEA</div><div class='add'>+Res0	1:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2MASK_EL12	3	5	1	4	3</div><div class='add'>+Mapping	SCTLR2MASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRMASK_EL1	3	0	1	4	0</div><div class='add'>+Field	63	TIDCP</div><div class='add'>+Field	62	SPINTMASK</div><div class='add'>+Field	61	NMI</div><div class='add'>+Field	60	EnTP2</div><div class='add'>+Field	59	TCSO</div><div class='add'>+Field	58	TCSO0</div><div class='add'>+Field	57	EPAN</div><div class='add'>+Field	56	EnALS</div><div class='add'>+Field	55	EnAS0</div><div class='add'>+Field	54	EnASR</div><div class='add'>+Field	53	TME</div><div class='add'>+Field	52	TME0</div><div class='add'>+Field	51	TMT</div><div class='add'>+Field	50	TMT0</div><div class='add'>+Res0	49:47</div><div class='add'>+Field	46	TWEDEL</div><div class='add'>+Field	45	TWEDEn</div><div class='add'>+Field	44	DSSBS</div><div class='add'>+Field	43	ATA</div><div class='add'>+Field	42	ATA0</div><div class='add'>+Res0	41</div><div class='add'>+Field	40	TCF</div><div class='add'>+Res0	39</div><div class='add'>+Field	38	TCF0</div><div class='add'>+Field	37	ITFSB</div><div class='add'>+Field	36	BT1</div><div class='add'>+Field	35	BT0</div><div class='add'>+Field	34	EnFPM</div><div class='add'>+Field	33	MSCEn</div><div class='add'>+Field	32	CMOW</div><div class='add'>+Field	31	EnIA</div><div class='add'>+Field	30	EnIB</div><div class='add'>+Field	29	LSMAOE</div><div class='add'>+Field	28	nTLSMD</div><div class='add'>+Field	27	EnDA</div><div class='add'>+Field	26	UCI</div><div class='add'>+Field	25	EE</div><div class='add'>+Field	24	E0E</div><div class='add'>+Field	23	SPAN</div><div class='add'>+Field	22	EIS</div><div class='add'>+Field	21	IESB</div><div class='add'>+Field	20	TSCXT</div><div class='add'>+Field	19	WXN</div><div class='add'>+Field	18	nTWE</div><div class='add'>+Res0	17</div><div class='add'>+Field	16	nTWI</div><div class='add'>+Field	15	UCT</div><div class='add'>+Field	14	DZE</div><div class='add'>+Field	13	EnDB</div><div class='add'>+Field	12	I</div><div class='add'>+Field	11	EOS</div><div class='add'>+Field	10	EnRCTX</div><div class='add'>+Field	9	UMA</div><div class='add'>+Field	8	SED</div><div class='add'>+Field	7	ITD</div><div class='add'>+Field	6	nAA</div><div class='add'>+Field	5	CP15BEN</div><div class='add'>+Field	4	SA0</div><div class='add'>+Field	3	SA</div><div class='add'>+Field	2	C</div><div class='add'>+Field	1	A</div><div class='add'>+Field	0	M</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRMASK_EL12	3	5	1	4	0</div><div class='add'>+Mapping	SCTLRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2MASK_EL1	3	0	2	7	3</div><div class='add'>+Res0	63:22</div><div class='add'>+Field	21	FNGNA1</div><div class='add'>+Field	20	FNGNA0</div><div class='add'>+Res0	19</div><div class='add'>+Field	18	FNG1</div><div class='add'>+Field	17	FNG0</div><div class='add'>+Field	16	A2</div><div class='add'>+Field	15	DisCH1</div><div class='add'>+Field	14	DisCH0</div><div class='add'>+Res0	13:12</div><div class='add'>+Field	11	HAFT</div><div class='add'>+Field	10	PTTWI</div><div class='add'>+Res0	9:6</div><div class='add'>+Field	5	D128</div><div class='add'>+Field	4	AIE</div><div class='add'>+Field	3	POE</div><div class='add'>+Field	2	E0POE</div><div class='add'>+Field	1	PIE</div><div class='add'>+Field	0	PnCH</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2MASK_EL12	3	5	2	7	3</div><div class='add'>+Mapping	TCR2MASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRMASK_EL1	3	0	2	7	2</div><div class='add'>+Res0	63:62</div><div class='add'>+Field	61	MTX1</div><div class='add'>+Field	60	MTX0</div><div class='add'>+Field	59	DS</div><div class='add'>+Field	58	TCMA1</div><div class='add'>+Field	57	TCMA0</div><div class='add'>+Field	56	E0PD1</div><div class='add'>+Field	55	E0PD0</div><div class='add'>+Field	54	NFD1</div><div class='add'>+Field	53	NFD0</div><div class='add'>+Field	52	TBID1</div><div class='add'>+Field	51	TBID0</div><div class='add'>+Field	50	HWU162</div><div class='add'>+Field	49	HWU161</div><div class='add'>+Field	48	HWU160</div><div class='add'>+Field	47	HWU159</div><div class='add'>+Field	46	HWU062</div><div class='add'>+Field	45	HWU061</div><div class='add'>+Field	44	HWU060</div><div class='add'>+Field	43	HWU059</div><div class='add'>+Field	42	HPD1</div><div class='add'>+Field	41	HPD0</div><div class='add'>+Field	40	HD</div><div class='add'>+Field	39	HA</div><div class='add'>+Field	38	TBI1</div><div class='add'>+Field	37	TBI0</div><div class='add'>+Field	36	AS</div><div class='add'>+Res0	35:33</div><div class='add'>+Field	32	IPS</div><div class='add'>+Res0	31</div><div class='add'>+Field	30	TG1</div><div class='add'>+Res0	29</div><div class='add'>+Field	28	SH1</div><div class='add'>+Res0	27</div><div class='add'>+Field	26	ORGN1</div><div class='add'>+Res0	25</div><div class='add'>+Field	24	IRGN1</div><div class='add'>+Field	23	EPD1</div><div class='add'>+Field	22	A1</div><div class='add'>+Res0	21:17</div><div class='add'>+Field	16	T1SZ</div><div class='add'>+Res0	15</div><div class='add'>+Field	14	TG0</div><div class='add'>+Res0	13</div><div class='add'>+Field	12	SH0</div><div class='add'>+Res0	11</div><div class='add'>+Field	10	ORGN0</div><div class='add'>+Res0	9</div><div class='add'>+Field	8	IRGN0</div><div class='add'>+Field	7	EPD0</div><div class='add'>+Res0	6:1</div><div class='add'>+Field	0	T0SZ</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRMASK_EL12	3	5	2	7	2</div><div class='add'>+Mapping TCRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ERXGSR_EL1	3	0	5	3	2</div><div class='add'>+Field	63	S63</div><div class='add'>+Field	62	S62</div><div class='add'>+Field	61	S61</div><div class='add'>+Field	60	S60</div><div class='add'>+Field	59	S59</div><div class='add'>+Field	58	S58</div><div class='add'>+Field	57	S57</div><div class='add'>+Field	56	S56</div><div class='add'>+Field	55	S55</div><div class='add'>+Field	54	S54</div><div class='add'>+Field	53	S53</div><div class='add'>+Field	52	S52</div><div class='add'>+Field	51	S51</div><div class='add'>+Field	50	S50</div><div class='add'>+Field	49	S49</div><div class='add'>+Field	48	S48</div><div class='add'>+Field	47	S47</div><div class='add'>+Field	46	S46</div><div class='add'>+Field	45	S45</div><div class='add'>+Field	44	S44</div><div class='add'>+Field	43	S43</div><div class='add'>+Field	42	S42</div><div class='add'>+Field	41	S41</div><div class='add'>+Field	40	S40</div><div class='add'>+Field	39	S39</div><div class='add'>+Field	38	S38</div><div class='add'>+Field	37	S37</div><div class='add'>+Field	36	S36</div><div class='add'>+Field	35	S35</div><div class='add'>+Field	34	S34</div><div class='add'>+Field	33	S33</div><div class='add'>+Field	32	S32</div><div class='add'>+Field	31	S31</div><div class='add'>+Field	30	S30</div><div class='add'>+Field	29	S29</div><div class='add'>+Field	28	S28</div><div class='add'>+Field	27	S27</div><div class='add'>+Field	26	S26</div><div class='add'>+Field	25	S25</div><div class='add'>+Field	24	S24</div><div class='add'>+Field	23	S23</div><div class='add'>+Field	22	S22</div><div class='add'>+Field	21	S21</div><div class='add'>+Field	20	S20</div><div class='add'>+Field	19	S19</div><div class='add'>+Field	18	S18</div><div class='add'>+Field	17	S17</div><div class='add'>+Field	16	S16</div><div class='add'>+Field	15	S15</div><div class='add'>+Field	14	S14</div><div class='add'>+Field	13	S13</div><div class='add'>+Field	12	S12</div><div class='add'>+Field	11	S11</div><div class='add'>+Field	10	S10</div><div class='add'>+Field	9	S9</div><div class='add'>+Field	8	S8</div><div class='add'>+Field	7	S7</div><div class='add'>+Field	6	S6</div><div class='add'>+Field	5	S5</div><div class='add'>+Field	4	S4</div><div class='add'>+Field	3	S3</div><div class='add'>+Field	2	S2</div><div class='add'>+Field	1	S1</div><div class='add'>+Field	0	S0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TRFCR_EL1	3	0	1	2	1</div><div class='add'>+Res0	63:7</div><div class='add'>+UnsignedEnum	6:5	TS</div><div class='add'>+	0b0001	VIRTUAL</div><div class='add'>+	0b0010	GUEST_PHYSICAL</div><div class='add'>+	0b0011	PHYSICAL</div><div class='add'>+EndEnum</div><div class='add'>+Res0	4:2</div><div class='add'>+Field	1	ExTRE</div><div class='add'>+Field	0	E0TRE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TRCITECR_EL1	3	0	1	2	3</div><div class='add'>+Res0	63:2</div><div class='add'>+Field	1	E1E</div><div class='add'>+Field	0	E0E</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TRCITECR_EL12	3	5	1	2	3</div><div class='add'>+Mapping	TRCITECR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	SMPRI_EL1	3	0	1	2	4</div><div class='hunk'>@@ -2083,11 +2986,20 @@ Field	0	RND</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PMSFCR_EL1	3	0	9	9	4</div><div class='del'>-Res0	63:19</div><div class='add'>+Res0	63:53</div><div class='add'>+Field	52	SIMDm</div><div class='add'>+Field	51	FPm</div><div class='add'>+Field	50	STm</div><div class='add'>+Field	49	LDm</div><div class='add'>+Field	48	Bm</div><div class='add'>+Res0	47:21</div><div class='add'>+Field	20	SIMD</div><div class='add'>+Field	19	FP</div><div class='ctx'> Field	18	ST</div><div class='ctx'> Field	17	LD</div><div class='ctx'> Field	16	B</div><div class='del'>-Res0	15:4</div><div class='add'>+Res0	15:5</div><div class='add'>+Field	4	FDS</div><div class='ctx'> Field	3	FnE</div><div class='ctx'> Field	2	FL</div><div class='ctx'> Field	1	FT</div><div class='hunk'>@@ -2104,7 +3016,28 @@ Field	15:0	MINLAT</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PMSIDR_EL1	3	0	9	9	7</div><div class='del'>-Res0	63:25</div><div class='add'>+Res0	63:33</div><div class='add'>+UnsignedEnum	32	SME</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	31:28	ALTCLK</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+	0b1111	IMPDEF</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	27	FPF</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	26	EFT</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	25	CRR</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	24	PBT</div><div class='ctx'> Field	23:20	FORMAT</div><div class='ctx'> Enum	19:16	COUNTSIZE</div><div class='hunk'>@@ -2122,7 +3055,10 @@ Enum	11:8	INTERVAL</div><div class='ctx'> 	0b0111	3072</div><div class='ctx'> 	0b1000	4096</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	7</div><div class='add'>+UnsignedEnum	7	FDS</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	6	FnE</div><div class='ctx'> Field	5	ERND</div><div class='ctx'> Field	4	LDS</div><div class='hunk'>@@ -2165,6 +3101,16 @@ Field	16	COLL</div><div class='ctx'> Field	15:0	MSS</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	PMSDSFR_EL1	3	0	9	10	4</div><div class='add'>+Field	63:0	S</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMBMAR_EL1	3	0	9	10	5</div><div class='add'>+Res0	63:10</div><div class='add'>+Field	9:8	SH</div><div class='add'>+Field	7:0	Attr</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	PMBIDR_EL1	3	0	9	10	7</div><div class='ctx'> Res0	63:12</div><div class='ctx'> Enum	11:8	EA</div><div class='hunk'>@@ -2178,11 +3124,480 @@ Field	4	P</div><div class='ctx'> Field	3:0	ALIGN</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	TRBMPAM_EL1	3	0	9	11	5</div><div class='add'>+Res0	63:27</div><div class='add'>+Field	26	EN</div><div class='add'>+Field	25:24	MPAM_SP</div><div class='add'>+Field	23:16	PMG</div><div class='add'>+Field	15:0	PARTID</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMSSCR_EL1	3	0	9	13	3</div><div class='add'>+Res0	63:33</div><div class='add'>+Field	32	NC</div><div class='add'>+Res0	31:1</div><div class='add'>+Field	0	SS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMUACR_EL1	3	0	9	14	4</div><div class='add'>+Res0	63:33</div><div class='add'>+Field	32	F0</div><div class='add'>+Field	31	C</div><div class='add'>+Field	30:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMECR_EL1	3	0	9	14	5</div><div class='add'>+Res0	63:5</div><div class='add'>+Field	4:3	SSE</div><div class='add'>+Field	2	KPME</div><div class='add'>+Field	1:0	PMEE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMIAR_EL1	3	0	9	14	7</div><div class='add'>+Field	63:0	ADDRESS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+SysregFields	ICC_PPI_HMRx_EL1</div><div class='add'>+Field	63	HM63</div><div class='add'>+Field	62	HM62</div><div class='add'>+Field	61	HM61</div><div class='add'>+Field	60	HM60</div><div class='add'>+Field	59	HM59</div><div class='add'>+Field	58	HM58</div><div class='add'>+Field	57	HM57</div><div class='add'>+Field	56	HM56</div><div class='add'>+Field	55	HM55</div><div class='add'>+Field	54	HM54</div><div class='add'>+Field	53	HM53</div><div class='add'>+Field	52	HM52</div><div class='add'>+Field	51	HM51</div><div class='add'>+Field	50	HM50</div><div class='add'>+Field	49	HM49</div><div class='add'>+Field	48	HM48</div><div class='add'>+Field	47	HM47</div><div class='add'>+Field	46	HM46</div><div class='add'>+Field	45	HM45</div><div class='add'>+Field	44	HM44</div><div class='add'>+Field	43	HM43</div><div class='add'>+Field	42	HM42</div><div class='add'>+Field	41	HM41</div><div class='add'>+Field	40	HM40</div><div class='add'>+Field	39	HM39</div><div class='add'>+Field	38	HM38</div><div class='add'>+Field	37	HM37</div><div class='add'>+Field	36	HM36</div><div class='add'>+Field	35	HM35</div><div class='add'>+Field	34	HM34</div><div class='add'>+Field	33	HM33</div><div class='add'>+Field	32	HM32</div><div class='add'>+Field	31	HM31</div><div class='add'>+Field	30	HM30</div><div class='add'>+Field	29	HM29</div><div class='add'>+Field	28	HM28</div><div class='add'>+Field	27	HM27</div><div class='add'>+Field	26	HM26</div><div class='add'>+Field	25	HM25</div><div class='add'>+Field	24	HM24</div><div class='add'>+Field	23	HM23</div><div class='add'>+Field	22	HM22</div><div class='add'>+Field	21	HM21</div><div class='add'>+Field	20	HM20</div><div class='add'>+Field	19	HM19</div><div class='add'>+Field	18	HM18</div><div class='add'>+Field	17	HM17</div><div class='add'>+Field	16	HM16</div><div class='add'>+Field	15	HM15</div><div class='add'>+Field	14	HM14</div><div class='add'>+Field	13	HM13</div><div class='add'>+Field	12	HM12</div><div class='add'>+Field	11	HM11</div><div class='add'>+Field	10	HM10</div><div class='add'>+Field	9	HM9</div><div class='add'>+Field	8	HM8</div><div class='add'>+Field	7	HM7</div><div class='add'>+Field	6	HM6</div><div class='add'>+Field	5	HM5</div><div class='add'>+Field	4	HM4</div><div class='add'>+Field	3	HM3</div><div class='add'>+Field	2	HM2</div><div class='add'>+Field	1	HM1</div><div class='add'>+Field	0	HM0</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_HMR0_EL1	3	0	12	10	0</div><div class='add'>+Fields ICC_PPI_HMRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_HMR1_EL1	3	0	12	10	1</div><div class='add'>+Fields ICC_PPI_HMRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_IDR0_EL1	3	0	12	10	2</div><div class='add'>+Res0	63:12</div><div class='add'>+UnsignedEnum	11:8	GCIE_LEGACY</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	7:4	PRI_BITS</div><div class='add'>+	0b0011	4BITS</div><div class='add'>+	0b0100	5BITS</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	3:0	ID_BITS</div><div class='add'>+	0b0000	16BITS</div><div class='add'>+	0b0001	24BITS</div><div class='add'>+EndEnum</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_ICSR_EL1	3	0	12	10	4</div><div class='add'>+Res0	63:48</div><div class='add'>+Field	47:32	IAFFID</div><div class='add'>+Res0	31:16</div><div class='add'>+Field	15:11	Priority</div><div class='add'>+Res0	10:6</div><div class='add'>+Field	5	HM</div><div class='add'>+Field	4	Active</div><div class='add'>+Field	3	IRM</div><div class='add'>+Field	2	Pending</div><div class='add'>+Field	1	Enabled</div><div class='add'>+Field	0	F</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+SysregFields	ICC_PPI_ENABLERx_EL1</div><div class='add'>+Field	63	EN63</div><div class='add'>+Field	62	EN62</div><div class='add'>+Field	61	EN61</div><div class='add'>+Field	60	EN60</div><div class='add'>+Field	59	EN59</div><div class='add'>+Field	58	EN58</div><div class='add'>+Field	57	EN57</div><div class='add'>+Field	56	EN56</div><div class='add'>+Field	55	EN55</div><div class='add'>+Field	54	EN54</div><div class='add'>+Field	53	EN53</div><div class='add'>+Field	52	EN52</div><div class='add'>+Field	51	EN51</div><div class='add'>+Field	50	EN50</div><div class='add'>+Field	49	EN49</div><div class='add'>+Field	48	EN48</div><div class='add'>+Field	47	EN47</div><div class='add'>+Field	46	EN46</div><div class='add'>+Field	45	EN45</div><div class='add'>+Field	44	EN44</div><div class='add'>+Field	43	EN43</div><div class='add'>+Field	42	EN42</div><div class='add'>+Field	41	EN41</div><div class='add'>+Field	40	EN40</div><div class='add'>+Field	39	EN39</div><div class='add'>+Field	38	EN38</div><div class='add'>+Field	37	EN37</div><div class='add'>+Field	36	EN36</div><div class='add'>+Field	35	EN35</div><div class='add'>+Field	34	EN34</div><div class='add'>+Field	33	EN33</div><div class='add'>+Field	32	EN32</div><div class='add'>+Field	31	EN31</div><div class='add'>+Field	30	EN30</div><div class='add'>+Field	29	EN29</div><div class='add'>+Field	28	EN28</div><div class='add'>+Field	27	EN27</div><div class='add'>+Field	26	EN26</div><div class='add'>+Field	25	EN25</div><div class='add'>+Field	24	EN24</div><div class='add'>+Field	23	EN23</div><div class='add'>+Field	22	EN22</div><div class='add'>+Field	21	EN21</div><div class='add'>+Field	20	EN20</div><div class='add'>+Field	19	EN19</div><div class='add'>+Field	18	EN18</div><div class='add'>+Field	17	EN17</div><div class='add'>+Field	16	EN16</div><div class='add'>+Field	15	EN15</div><div class='add'>+Field	14	EN14</div><div class='add'>+Field	13	EN13</div><div class='add'>+Field	12	EN12</div><div class='add'>+Field	11	EN11</div><div class='add'>+Field	10	EN10</div><div class='add'>+Field	9	EN9</div><div class='add'>+Field	8	EN8</div><div class='add'>+Field	7	EN7</div><div class='add'>+Field	6	EN6</div><div class='add'>+Field	5	EN5</div><div class='add'>+Field	4	EN4</div><div class='add'>+Field	3	EN3</div><div class='add'>+Field	2	EN2</div><div class='add'>+Field	1	EN1</div><div class='add'>+Field	0	EN0</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_ENABLER0_EL1	3	0	12	10	6</div><div class='add'>+Fields ICC_PPI_ENABLERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_ENABLER1_EL1	3	0	12	10	7</div><div class='add'>+Fields ICC_PPI_ENABLERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+SysregFields	ICC_PPI_ACTIVERx_EL1</div><div class='add'>+Field	63	Active63</div><div class='add'>+Field	62	Active62</div><div class='add'>+Field	61	Active61</div><div class='add'>+Field	60	Active60</div><div class='add'>+Field	59	Active59</div><div class='add'>+Field	58	Active58</div><div class='add'>+Field	57	Active57</div><div class='add'>+Field	56	Active56</div><div class='add'>+Field	55	Active55</div><div class='add'>+Field	54	Active54</div><div class='add'>+Field	53	Active53</div><div class='add'>+Field	52	Active52</div><div class='add'>+Field	51	Active51</div><div class='add'>+Field	50	Active50</div><div class='add'>+Field	49	Active49</div><div class='add'>+Field	48	Active48</div><div class='add'>+Field	47	Active47</div><div class='add'>+Field	46	Active46</div><div class='add'>+Field	45	Active45</div><div class='add'>+Field	44	Active44</div><div class='add'>+Field	43	Active43</div><div class='add'>+Field	42	Active42</div><div class='add'>+Field	41	Active41</div><div class='add'>+Field	40	Active40</div><div class='add'>+Field	39	Active39</div><div class='add'>+Field	38	Active38</div><div class='add'>+Field	37	Active37</div><div class='add'>+Field	36	Active36</div><div class='add'>+Field	35	Active35</div><div class='add'>+Field	34	Active34</div><div class='add'>+Field	33	Active33</div><div class='add'>+Field	32	Active32</div><div class='add'>+Field	31	Active31</div><div class='add'>+Field	30	Active30</div><div class='add'>+Field	29	Active29</div><div class='add'>+Field	28	Active28</div><div class='add'>+Field	27	Active27</div><div class='add'>+Field	26	Active26</div><div class='add'>+Field	25	Active25</div><div class='add'>+Field	24	Active24</div><div class='add'>+Field	23	Active23</div><div class='add'>+Field	22	Active22</div><div class='add'>+Field	21	Active21</div><div class='add'>+Field	20	Active20</div><div class='add'>+Field	19	Active19</div><div class='add'>+Field	18	Active18</div><div class='add'>+Field	17	Active17</div><div class='add'>+Field	16	Active16</div><div class='add'>+Field	15	Active15</div><div class='add'>+Field	14	Active14</div><div class='add'>+Field	13	Active13</div><div class='add'>+Field	12	Active12</div><div class='add'>+Field	11	Active11</div><div class='add'>+Field	10	Active10</div><div class='add'>+Field	9	Active9</div><div class='add'>+Field	8	Active8</div><div class='add'>+Field	7	Active7</div><div class='add'>+Field	6	Active6</div><div class='add'>+Field	5	Active5</div><div class='add'>+Field	4	Active4</div><div class='add'>+Field	3	Active3</div><div class='add'>+Field	2	Active2</div><div class='add'>+Field	1	Active1</div><div class='add'>+Field	0	Active0</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_CACTIVER0_EL1	3	0	12	13	0</div><div class='add'>+Fields ICC_PPI_ACTIVERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_CACTIVER1_EL1	3	0	12	13	1</div><div class='add'>+Fields ICC_PPI_ACTIVERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_SACTIVER0_EL1	3	0	12	13	2</div><div class='add'>+Fields ICC_PPI_ACTIVERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_SACTIVER1_EL1	3	0	12	13	3</div><div class='add'>+Fields ICC_PPI_ACTIVERx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+SysregFields	ICC_PPI_PENDRx_EL1</div><div class='add'>+Field	63	Pend63</div><div class='add'>+Field	62	Pend62</div><div class='add'>+Field	61	Pend61</div><div class='add'>+Field	60	Pend60</div><div class='add'>+Field	59	Pend59</div><div class='add'>+Field	58	Pend58</div><div class='add'>+Field	57	Pend57</div><div class='add'>+Field	56	Pend56</div><div class='add'>+Field	55	Pend55</div><div class='add'>+Field	54	Pend54</div><div class='add'>+Field	53	Pend53</div><div class='add'>+Field	52	Pend52</div><div class='add'>+Field	51	Pend51</div><div class='add'>+Field	50	Pend50</div><div class='add'>+Field	49	Pend49</div><div class='add'>+Field	48	Pend48</div><div class='add'>+Field	47	Pend47</div><div class='add'>+Field	46	Pend46</div><div class='add'>+Field	45	Pend45</div><div class='add'>+Field	44	Pend44</div><div class='add'>+Field	43	Pend43</div><div class='add'>+Field	42	Pend42</div><div class='add'>+Field	41	Pend41</div><div class='add'>+Field	40	Pend40</div><div class='add'>+Field	39	Pend39</div><div class='add'>+Field	38	Pend38</div><div class='add'>+Field	37	Pend37</div><div class='add'>+Field	36	Pend36</div><div class='add'>+Field	35	Pend35</div><div class='add'>+Field	34	Pend34</div><div class='add'>+Field	33	Pend33</div><div class='add'>+Field	32	Pend32</div><div class='add'>+Field	31	Pend31</div><div class='add'>+Field	30	Pend30</div><div class='add'>+Field	29	Pend29</div><div class='add'>+Field	28	Pend28</div><div class='add'>+Field	27	Pend27</div><div class='add'>+Field	26	Pend26</div><div class='add'>+Field	25	Pend25</div><div class='add'>+Field	24	Pend24</div><div class='add'>+Field	23	Pend23</div><div class='add'>+Field	22	Pend22</div><div class='add'>+Field	21	Pend21</div><div class='add'>+Field	20	Pend20</div><div class='add'>+Field	19	Pend19</div><div class='add'>+Field	18	Pend18</div><div class='add'>+Field	17	Pend17</div><div class='add'>+Field	16	Pend16</div><div class='add'>+Field	15	Pend15</div><div class='add'>+Field	14	Pend14</div><div class='add'>+Field	13	Pend13</div><div class='add'>+Field	12	Pend12</div><div class='add'>+Field	11	Pend11</div><div class='add'>+Field	10	Pend10</div><div class='add'>+Field	9	Pend9</div><div class='add'>+Field	8	Pend8</div><div class='add'>+Field	7	Pend7</div><div class='add'>+Field	6	Pend6</div><div class='add'>+Field	5	Pend5</div><div class='add'>+Field	4	Pend4</div><div class='add'>+Field	3	Pend3</div><div class='add'>+Field	2	Pend2</div><div class='add'>+Field	1	Pend1</div><div class='add'>+Field	0	Pend0</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_CPENDR0_EL1	3	0	12	13	4</div><div class='add'>+Fields ICC_PPI_PENDRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_CPENDR1_EL1	3	0	12	13	5</div><div class='add'>+Fields ICC_PPI_PENDRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_SPENDR0_EL1	3	0	12	13	6</div><div class='add'>+Fields ICC_PPI_PENDRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_SPENDR1_EL1	3	0	12	13	7</div><div class='add'>+Fields ICC_PPI_PENDRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+SysregFields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+Res0	63:61</div><div class='add'>+Field	60:56	Priority7</div><div class='add'>+Res0	55:53</div><div class='add'>+Field	52:48	Priority6</div><div class='add'>+Res0	47:45</div><div class='add'>+Field	44:40	Priority5</div><div class='add'>+Res0	39:37</div><div class='add'>+Field	36:32	Priority4</div><div class='add'>+Res0	31:29</div><div class='add'>+Field	28:24	Priority3</div><div class='add'>+Res0	23:21</div><div class='add'>+Field	20:16	Priority2</div><div class='add'>+Res0	15:13</div><div class='add'>+Field	12:8	Priority1</div><div class='add'>+Res0	7:5</div><div class='add'>+Field	4:0	Priority0</div><div class='add'>+EndSysregFields</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR0_EL1	3	0	12	14	0</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR1_EL1	3	0	12	14	1</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR2_EL1	3	0	12	14	2</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR3_EL1	3	0	12	14	3</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR4_EL1	3	0	12	14	4</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR5_EL1	3	0	12	14	5</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR6_EL1	3	0	12	14	6</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR7_EL1	3	0	12	14	7</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR8_EL1	3	0	12	15	0</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR9_EL1	3	0	12	15	1</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR10_EL1	3	0	12	15	2</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR11_EL1	3	0	12	15	3</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR12_EL1	3	0	12	15	4</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR13_EL1	3	0	12	15	5</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR14_EL1	3	0	12	15	6</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PPI_PRIORITYR15_EL1	3	0	12	15	7</div><div class='add'>+Fields	ICC_PPI_PRIORITYRx_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	PMSELR_EL0	3	3	9	12	5</div><div class='ctx'> Res0	63:5</div><div class='ctx'> Field	4:0	SEL</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	PMZR_EL0        3	3	9	13	4</div><div class='add'>+Res0	63:33</div><div class='add'>+Field	32	F0</div><div class='add'>+Field	31	C</div><div class='add'>+Field	30:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> SysregFields	CONTEXTIDR_ELx</div><div class='ctx'> Res0	63:32</div><div class='ctx'> Field	31:0	PROCID</div><div class='hunk'>@@ -2253,6 +3668,19 @@ Res0	14:12</div><div class='ctx'> Field	11:0	AFFINITY</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	ICC_CR0_EL1	3	1	12	0	1</div><div class='add'>+Res0	63:39</div><div class='add'>+Field	38	PID</div><div class='add'>+Field	37:32	IPPT</div><div class='add'>+Res0	31:1</div><div class='add'>+Field	0	EN</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICC_PCR_EL1	3	1	12	0	2</div><div class='add'>+Res0	63:5</div><div class='add'>+Field	4:0	PRIORITY</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	CSSELR_EL1	3	2	0	0	0</div><div class='ctx'> Res0	63:5</div><div class='ctx'> Field	4	TnD</div><div class='hunk'>@@ -2321,7 +3749,110 @@ UnsignedEnum	2:0	F8S1</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='del'>-SysregFields	HFGxTR_EL2</div><div class='add'>+Sysreg	HCR_EL2		3	4	1	1	0</div><div class='add'>+Field	63:60	TWEDEL</div><div class='add'>+Field	59	TWEDEn</div><div class='add'>+Field	58	TID5</div><div class='add'>+Field	57	DCT</div><div class='add'>+Field	56	ATA</div><div class='add'>+Field	55	TTLBOS</div><div class='add'>+Field	54	TTLBIS</div><div class='add'>+Field	53	EnSCXT</div><div class='add'>+Field	52	TOCU</div><div class='add'>+Field	51	AMVOFFEN</div><div class='add'>+Field	50	TICAB</div><div class='add'>+Field	49	TID4</div><div class='add'>+Field	48	GPF</div><div class='add'>+Field	47	FIEN</div><div class='add'>+Field	46	FWB</div><div class='add'>+Field	45	NV2</div><div class='add'>+Field	44	AT</div><div class='add'>+Field	43	NV1</div><div class='add'>+Field	42	NV</div><div class='add'>+Field	41	API</div><div class='add'>+Field	40	APK</div><div class='add'>+Field	39	TME</div><div class='add'>+Field	38	MIOCNCE</div><div class='add'>+Field	37	TEA</div><div class='add'>+Field	36	TERR</div><div class='add'>+Field	35	TLOR</div><div class='add'>+Field	34	E2H</div><div class='add'>+Field	33	ID</div><div class='add'>+Field	32	CD</div><div class='add'>+Field	31	RW</div><div class='add'>+Field	30	TRVM</div><div class='add'>+Field	29	HCD</div><div class='add'>+Field	28	TDZ</div><div class='add'>+Field	27	TGE</div><div class='add'>+Field	26	TVM</div><div class='add'>+Field	25	TTLB</div><div class='add'>+Field	24	TPU</div><div class='add'>+Field	23	TPCP</div><div class='add'>+Field	22	TSW</div><div class='add'>+Field	21	TACR</div><div class='add'>+Field	20	TIDCP</div><div class='add'>+Field	19	TSC</div><div class='add'>+Field	18	TID3</div><div class='add'>+Field	17	TID2</div><div class='add'>+Field	16	TID1</div><div class='add'>+Field	15	TID0</div><div class='add'>+Field	14	TWE</div><div class='add'>+Field	13	TWI</div><div class='add'>+Field	12	DC</div><div class='add'>+UnsignedEnum	11:10	BSU</div><div class='add'>+	0b00	NONE</div><div class='add'>+	0b01	IS</div><div class='add'>+	0b10	OS</div><div class='add'>+	0b11	FS</div><div class='add'>+EndEnum</div><div class='add'>+Field	9	FB</div><div class='add'>+Field	8	VSE</div><div class='add'>+Field	7	VI</div><div class='add'>+Field	6	VF</div><div class='add'>+Field	5	AMO</div><div class='add'>+Field	4	IMO</div><div class='add'>+Field	3	FMO</div><div class='add'>+Field	2	PTW</div><div class='add'>+Field	1	SWIO</div><div class='add'>+Field	0	VM</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg MDCR_EL2		3	4	1	1	1</div><div class='add'>+Res0	63:51</div><div class='add'>+Field	50	EnSTEPOP</div><div class='add'>+Res0	49:44</div><div class='add'>+Field	43	EBWE</div><div class='add'>+Res0	42</div><div class='add'>+Field	41:40	PMEE</div><div class='add'>+Res0	39:37</div><div class='add'>+Field	36	HPMFZS</div><div class='add'>+Res0	35:32</div><div class='add'>+Field	31:30	PMSSE</div><div class='add'>+Field	29	HPMFZO</div><div class='add'>+Field	28	MTPME</div><div class='add'>+Field	27	TDCC</div><div class='add'>+Field	26	HLP</div><div class='add'>+Field	25:24	E2TB</div><div class='add'>+Field	23	HCCD</div><div class='add'>+Res0	22:20</div><div class='add'>+Field	19	TTRF</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	HPMD</div><div class='add'>+Res0	16</div><div class='add'>+Field	15	EnSPM</div><div class='add'>+Field	14	TPMS</div><div class='add'>+Field	13:12	E2PB</div><div class='add'>+Field	11	TDRA</div><div class='add'>+Field	10	TDOSA</div><div class='add'>+Field	9	TDA</div><div class='add'>+Field	8	TDE</div><div class='add'>+Field	7	HPME</div><div class='add'>+Field	6	TPM</div><div class='add'>+Field	5	TPMCR</div><div class='add'>+Field	4:0	HPMN</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg HFGRTR_EL2	3	4	1	1	4</div><div class='ctx'> Field	63	nAMAIR2_EL1</div><div class='ctx'> Field	62	nMAIR2_EL1</div><div class='ctx'> Field	61	nS2POR_EL1</div><div class='hunk'>@@ -2386,18 +3917,74 @@ Field	3	AMAIR_EL1</div><div class='ctx'> Field	2	AIDR_EL1</div><div class='ctx'> Field	1	AFSR1_EL1</div><div class='ctx'> Field	0	AFSR0_EL1</div><div class='del'>-EndSysregFields</div><div class='del'>-</div><div class='del'>-Sysreg HFGRTR_EL2	3	4	1	1	4</div><div class='del'>-Fields	HFGxTR_EL2</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg HFGWTR_EL2	3	4	1	1	5</div><div class='del'>-Fields	HFGxTR_EL2</div><div class='add'>+Field	63	nAMAIR2_EL1</div><div class='add'>+Field	62	nMAIR2_EL1</div><div class='add'>+Field	61	nS2POR_EL1</div><div class='add'>+Field	60	nPOR_EL1</div><div class='add'>+Field	59	nPOR_EL0</div><div class='add'>+Field	58	nPIR_EL1</div><div class='add'>+Field	57	nPIRE0_EL1</div><div class='add'>+Field	56	nRCWMASK_EL1</div><div class='add'>+Field	55	nTPIDR2_EL0</div><div class='add'>+Field	54	nSMPRI_EL1</div><div class='add'>+Field	53	nGCS_EL1</div><div class='add'>+Field	52	nGCS_EL0</div><div class='add'>+Res0	51</div><div class='add'>+Field	50	nACCDATA_EL1</div><div class='add'>+Field	49	ERXADDR_EL1</div><div class='add'>+Field	48	ERXPFGCDN_EL1</div><div class='add'>+Field	47	ERXPFGCTL_EL1</div><div class='add'>+Res0	46</div><div class='add'>+Field	45	ERXMISCn_EL1</div><div class='add'>+Field	44	ERXSTATUS_EL1</div><div class='add'>+Field	43	ERXCTLR_EL1</div><div class='add'>+Res0	42</div><div class='add'>+Field	41	ERRSELR_EL1</div><div class='add'>+Res0	40</div><div class='add'>+Field	39	ICC_IGRPENn_EL1</div><div class='add'>+Field	38	VBAR_EL1</div><div class='add'>+Field	37	TTBR1_EL1</div><div class='add'>+Field	36	TTBR0_EL1</div><div class='add'>+Field	35	TPIDR_EL0</div><div class='add'>+Field	34	TPIDRRO_EL0</div><div class='add'>+Field	33	TPIDR_EL1</div><div class='add'>+Field	32	TCR_EL1</div><div class='add'>+Field	31	SCXTNUM_EL0</div><div class='add'>+Field	30	SCXTNUM_EL1</div><div class='add'>+Field	29	SCTLR_EL1</div><div class='add'>+Res0	28</div><div class='add'>+Field	27	PAR_EL1</div><div class='add'>+Res0	26:25</div><div class='add'>+Field	24	MAIR_EL1</div><div class='add'>+Field	23	LORSA_EL1</div><div class='add'>+Field	22	LORN_EL1</div><div class='add'>+Res0	21</div><div class='add'>+Field	20	LOREA_EL1</div><div class='add'>+Field	19	LORC_EL1</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	FAR_EL1</div><div class='add'>+Field	16	ESR_EL1</div><div class='add'>+Res0	15:14</div><div class='add'>+Field	13	CSSELR_EL1</div><div class='add'>+Field	12	CPACR_EL1</div><div class='add'>+Field	11	CONTEXTIDR_EL1</div><div class='add'>+Res0	10:9</div><div class='add'>+Field	8	APIBKey</div><div class='add'>+Field	7	APIAKey</div><div class='add'>+Field	6	APGAKey</div><div class='add'>+Field	5	APDBKey</div><div class='add'>+Field	4	APDAKey</div><div class='add'>+Field	3	AMAIR_EL1</div><div class='add'>+Res0	2</div><div class='add'>+Field	1	AFSR1_EL1</div><div class='add'>+Field	0	AFSR0_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg HFGITR_EL2	3	4	1	1	6</div><div class='del'>-Res0	63</div><div class='add'>+Field   63	PSBCSYNC</div><div class='ctx'> Field	62	ATS1E1A</div><div class='ctx'> Res0	61</div><div class='ctx'> Field	60	COSPRCTX</div><div class='hunk'>@@ -2463,6 +4050,117 @@ Field	1	ICIALLU</div><div class='ctx'> Field	0	ICIALLUIS</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg TRFCR_EL2	3	4	1	2	1</div><div class='add'>+Res0	63:7</div><div class='add'>+UnsignedEnum	6:5	TS</div><div class='add'>+	0b0000	USE_TRFCR_EL1_TS</div><div class='add'>+	0b0001	VIRTUAL</div><div class='add'>+	0b0010	GUEST_PHYSICAL</div><div class='add'>+	0b0011	PHYSICAL</div><div class='add'>+EndEnum</div><div class='add'>+Res0	4</div><div class='add'>+Field	3	CX</div><div class='add'>+Res0	2</div><div class='add'>+Field	1	E2TRE</div><div class='add'>+Field	0	E0HTRE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Sysreg HDFGRTR2_EL2	3	4	3	1	0</div><div class='add'>+Res0	63:25</div><div class='add'>+Field	24	nPMBMAR_EL1</div><div class='add'>+Field	23	nMDSTEPOP_EL1</div><div class='add'>+Field	22	nTRBMPAM_EL1</div><div class='add'>+Res0	21</div><div class='add'>+Field	20	nTRCITECR_EL1</div><div class='add'>+Field	19	nPMSDSFR_EL1</div><div class='add'>+Field	18	nSPMDEVAFF_EL1</div><div class='add'>+Field	17	nSPMID</div><div class='add'>+Field	16	nSPMSCR_EL1</div><div class='add'>+Field	15	nSPMACCESSR_EL1</div><div class='add'>+Field	14	nSPMCR_EL0</div><div class='add'>+Field	13	nSPMOVS</div><div class='add'>+Field	12	nSPMINTEN</div><div class='add'>+Field	11	nSPMCNTEN</div><div class='add'>+Field	10	nSPMSELR_EL0</div><div class='add'>+Field	9	nSPMEVTYPERn_EL0</div><div class='add'>+Field	8	nSPMEVCNTRn_EL0</div><div class='add'>+Field	7	nPMSSCR_EL1</div><div class='add'>+Field	6	nPMSSDATA</div><div class='add'>+Field	5	nMDSELR_EL1</div><div class='add'>+Field	4	nPMUACR_EL1</div><div class='add'>+Field	3	nPMICFILTR_EL0</div><div class='add'>+Field	2	nPMICNTR_EL0</div><div class='add'>+Field	1	nPMIAR_EL1</div><div class='add'>+Field	0	nPMECR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg HDFGWTR2_EL2	3	4	3	1	1</div><div class='add'>+Res0	63:25</div><div class='add'>+Field	24	nPMBMAR_EL1</div><div class='add'>+Field	23	nMDSTEPOP_EL1</div><div class='add'>+Field	22	nTRBMPAM_EL1</div><div class='add'>+Field	21	nPMZR_EL0</div><div class='add'>+Field	20	nTRCITECR_EL1</div><div class='add'>+Field	19	nPMSDSFR_EL1</div><div class='add'>+Res0	18:17</div><div class='add'>+Field	16	nSPMSCR_EL1</div><div class='add'>+Field	15	nSPMACCESSR_EL1</div><div class='add'>+Field	14	nSPMCR_EL0</div><div class='add'>+Field	13	nSPMOVS</div><div class='add'>+Field	12	nSPMINTEN</div><div class='add'>+Field	11	nSPMCNTEN</div><div class='add'>+Field	10	nSPMSELR_EL0</div><div class='add'>+Field	9	nSPMEVTYPERn_EL0</div><div class='add'>+Field	8	nSPMEVCNTRn_EL0</div><div class='add'>+Field	7	nPMSSCR_EL1</div><div class='add'>+Res0	6</div><div class='add'>+Field	5	nMDSELR_EL1</div><div class='add'>+Field	4	nPMUACR_EL1</div><div class='add'>+Field	3	nPMICFILTR_EL0</div><div class='add'>+Field	2	nPMICNTR_EL0</div><div class='add'>+Field	1	nPMIAR_EL1</div><div class='add'>+Field	0	nPMECR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	HFGRTR2_EL2	3	4	3	1	2</div><div class='add'>+Res0	63:15</div><div class='add'>+Field	14	nACTLRALIAS_EL1</div><div class='add'>+Field	13	nACTLRMASK_EL1</div><div class='add'>+Field	12	nTCR2ALIAS_EL1</div><div class='add'>+Field	11	nTCRALIAS_EL1</div><div class='add'>+Field	10	nSCTLRALIAS2_EL1</div><div class='add'>+Field	9	nSCTLRALIAS_EL1</div><div class='add'>+Field	8	nCPACRALIAS_EL1</div><div class='add'>+Field	7	nTCR2MASK_EL1</div><div class='add'>+Field	6	nTCRMASK_EL1</div><div class='add'>+Field	5	nSCTLR2MASK_EL1</div><div class='add'>+Field	4	nSCTLRMASK_EL1</div><div class='add'>+Field	3	nCPACRMASK_EL1</div><div class='add'>+Field	2	nRCWSMASK_EL1</div><div class='add'>+Field	1	nERXGSR_EL1</div><div class='add'>+Field	0	nPFAR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	HFGWTR2_EL2	3	4	3	1	3</div><div class='add'>+Res0	63:15</div><div class='add'>+Field	14	nACTLRALIAS_EL1</div><div class='add'>+Field	13	nACTLRMASK_EL1</div><div class='add'>+Field	12	nTCR2ALIAS_EL1</div><div class='add'>+Field	11	nTCRALIAS_EL1</div><div class='add'>+Field	10	nSCTLRALIAS2_EL1</div><div class='add'>+Field	9	nSCTLRALIAS_EL1</div><div class='add'>+Field	8	nCPACRALIAS_EL1</div><div class='add'>+Field	7	nTCR2MASK_EL1</div><div class='add'>+Field	6	nTCRMASK_EL1</div><div class='add'>+Field	5	nSCTLR2MASK_EL1</div><div class='add'>+Field	4	nSCTLRMASK_EL1</div><div class='add'>+Field	3	nCPACRMASK_EL1</div><div class='add'>+Field	2	nRCWSMASK_EL1</div><div class='add'>+Res0	1</div><div class='add'>+Field	0	nPFAR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg HDFGRTR_EL2	3	4	3	1	4</div><div class='ctx'> Field	63	PMBIDR_EL1</div><div class='ctx'> Field	62	nPMSNEVFR_EL1</div><div class='hunk'>@@ -2635,6 +4333,12 @@ Field	1	AMEVCNTR00_EL0</div><div class='ctx'> Field	0	AMCNTEN0</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	HFGITR2_EL2	3	4	3	1	7</div><div class='add'>+Res0	63:2</div><div class='add'>+Field	1	nDCCIVAPS</div><div class='add'>+Field	0	TSBCSYNC</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	ZCR_EL2	3	4	1	2	0</div><div class='ctx'> Fields	ZCR_ELx</div><div class='ctx'> EndSysreg</div><div class='hunk'>@@ -2690,6 +4394,12 @@ Sysreg	SMCR_EL2	3	4	1	2	6</div><div class='ctx'> Fields	SMCR_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	VNCR_EL2	3	4	2	2	0</div><div class='add'>+Field	63:57	RESS</div><div class='add'>+Field	56:12	BADDR</div><div class='add'>+Res0	11:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	GCSCR_EL2	3	4	2	5	0</div><div class='ctx'> Fields	GCSCR_ELx</div><div class='ctx'> EndSysreg</div><div class='hunk'>@@ -2737,6 +4447,228 @@ Field	1	E2SPE</div><div class='ctx'> Field	0	E0HSPE</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MPAMHCR_EL2	3	4	10	4	0</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	TRAP_MPAMIDR_EL1</div><div class='add'>+Res0	30:9</div><div class='add'>+Field	8	GSTAPP_PLK</div><div class='add'>+Res0	7:2</div><div class='add'>+Field	1	EL1_VPMEN</div><div class='add'>+Field	0	EL0_VPMEN</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPMV_EL2	3	4	10	4	1</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	VPM_V31</div><div class='add'>+Field	30	VPM_V30</div><div class='add'>+Field	29	VPM_V29</div><div class='add'>+Field	28	VPM_V28</div><div class='add'>+Field	27	VPM_V27</div><div class='add'>+Field	26	VPM_V26</div><div class='add'>+Field	25	VPM_V25</div><div class='add'>+Field	24	VPM_V24</div><div class='add'>+Field	23	VPM_V23</div><div class='add'>+Field	22	VPM_V22</div><div class='add'>+Field	21	VPM_V21</div><div class='add'>+Field	20	VPM_V20</div><div class='add'>+Field	19	VPM_V19</div><div class='add'>+Field	18	VPM_V18</div><div class='add'>+Field	17	VPM_V17</div><div class='add'>+Field	16	VPM_V16</div><div class='add'>+Field	15	VPM_V15</div><div class='add'>+Field	14	VPM_V14</div><div class='add'>+Field	13	VPM_V13</div><div class='add'>+Field	12	VPM_V12</div><div class='add'>+Field	11	VPM_V11</div><div class='add'>+Field	10	VPM_V10</div><div class='add'>+Field	9	VPM_V9</div><div class='add'>+Field	8	VPM_V8</div><div class='add'>+Field	7	VPM_V7</div><div class='add'>+Field	6	VPM_V6</div><div class='add'>+Field	5	VPM_V5</div><div class='add'>+Field	4	VPM_V4</div><div class='add'>+Field	3	VPM_V3</div><div class='add'>+Field	2	VPM_V2</div><div class='add'>+Field	1	VPM_V1</div><div class='add'>+Field	0	VPM_V0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAM2_EL2	3	4	10	5	0</div><div class='add'>+Field	63	MPAMEN</div><div class='add'>+Res0	62:59</div><div class='add'>+Field	58	TIDR</div><div class='add'>+Res0	57</div><div class='add'>+Field	56	ALTSP_HFC</div><div class='add'>+Field	55	ALTSP_EL2</div><div class='add'>+Field	54	ALTSP_FRCD</div><div class='add'>+Res0	53:51</div><div class='add'>+Field	50	EnMPAMSM</div><div class='add'>+Field	49	TRAPMPAM0EL1</div><div class='add'>+Field	48	TRAPMPAM1EL1</div><div class='add'>+Field	47:40	PMG_D</div><div class='add'>+Field	39:32	PMG_I</div><div class='add'>+Field	31:16	PARTID_D</div><div class='add'>+Field	15:0	PARTID_I</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM0_EL2	3	4	10	6	0</div><div class='add'>+Field	63:48	PhyPARTID3</div><div class='add'>+Field	47:32	PhyPARTID2</div><div class='add'>+Field	31:16	PhyPARTID1</div><div class='add'>+Field	15:0	PhyPARTID0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM1_EL2	3	4	10	6	1</div><div class='add'>+Field	63:48	PhyPARTID7</div><div class='add'>+Field	47:32	PhyPARTID6</div><div class='add'>+Field	31:16	PhyPARTID5</div><div class='add'>+Field	15:0	PhyPARTID4</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM2_EL2	3	4	10	6	2</div><div class='add'>+Field	63:48	PhyPARTID11</div><div class='add'>+Field	47:32	PhyPARTID10</div><div class='add'>+Field	31:16	PhyPARTID9</div><div class='add'>+Field	15:0	PhyPARTID8</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM3_EL2	3	4	10	6	3</div><div class='add'>+Field	63:48	PhyPARTID15</div><div class='add'>+Field	47:32	PhyPARTID14</div><div class='add'>+Field	31:16	PhyPARTID13</div><div class='add'>+Field	15:0	PhyPARTID12</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM4_EL2	3	4	10	6	4</div><div class='add'>+Field	63:48	PhyPARTID19</div><div class='add'>+Field	47:32	PhyPARTID18</div><div class='add'>+Field	31:16	PhyPARTID17</div><div class='add'>+Field	15:0	PhyPARTID16</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM5_EL2	3	4	10	6	5</div><div class='add'>+Field	63:48	PhyPARTID23</div><div class='add'>+Field	47:32	PhyPARTID22</div><div class='add'>+Field	31:16	PhyPARTID21</div><div class='add'>+Field	15:0	PhyPARTID20</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM6_EL2	3	4	10	6	6</div><div class='add'>+Field	63:48	PhyPARTID27</div><div class='add'>+Field	47:32	PhyPARTID26</div><div class='add'>+Field	31:16	PhyPARTID25</div><div class='add'>+Field	15:0	PhyPARTID24</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAMVPM7_EL2	3	4	10	6	7</div><div class='add'>+Field	63:48	PhyPARTID31</div><div class='add'>+Field	47:32	PhyPARTID30</div><div class='add'>+Field	31:16	PhyPARTID29</div><div class='add'>+Field	15:0	PhyPARTID28</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_HFGRTR_EL2	3	4	12	9	4</div><div class='add'>+Res0	63:21</div><div class='add'>+Field	20	ICC_PPI_ACTIVERn_EL1</div><div class='add'>+Field	19	ICC_PPI_PRIORITYRn_EL1</div><div class='add'>+Field	18	ICC_PPI_PENDRn_EL1</div><div class='add'>+Field	17	ICC_PPI_ENABLERn_EL1</div><div class='add'>+Field	16	ICC_PPI_HMRn_EL1</div><div class='add'>+Res0	15:8</div><div class='add'>+Field	7	ICC_IAFFIDR_EL1</div><div class='add'>+Field	6	ICC_ICSR_EL1</div><div class='add'>+Field	5	ICC_PCR_EL1</div><div class='add'>+Field	4	ICC_HPPIR_EL1</div><div class='add'>+Field	3	ICC_HAPR_EL1</div><div class='add'>+Field	2	ICC_CR0_EL1</div><div class='add'>+Field	1	ICC_IDRn_EL1</div><div class='add'>+Field	0	ICC_APR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_HFGWTR_EL2	3	4	12	9	6</div><div class='add'>+Res0	63:21</div><div class='add'>+Field	20	ICC_PPI_ACTIVERn_EL1</div><div class='add'>+Field	19	ICC_PPI_PRIORITYRn_EL1</div><div class='add'>+Field	18	ICC_PPI_PENDRn_EL1</div><div class='add'>+Field	17	ICC_PPI_ENABLERn_EL1</div><div class='add'>+Res0	16:7</div><div class='add'>+Field	6	ICC_ICSR_EL1</div><div class='add'>+Field	5	ICC_PCR_EL1</div><div class='add'>+Res0    4:3</div><div class='add'>+Field	2	ICC_CR0_EL1</div><div class='add'>+Res0	1</div><div class='add'>+Field	0	ICC_APR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_HFGITR_EL2	3	4	12	9	7</div><div class='add'>+Res0	63:11</div><div class='add'>+Field	10	GICRCDNMIA</div><div class='add'>+Field	9	GICRCDIA</div><div class='add'>+Field	8	GICCDDI</div><div class='add'>+Field	7	GICCDEOI</div><div class='add'>+Field	6	GICCDHM</div><div class='add'>+Field	5	GICCDRCFG</div><div class='add'>+Field	4	GICCDPEND</div><div class='add'>+Field	3	GICCDAFF</div><div class='add'>+Field	2	GICCDPRI</div><div class='add'>+Field	1	GICCDDIS</div><div class='add'>+Field	0	GICCDEN</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_HCR_EL2	3	4	12	11	0</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:27	EOIcount</div><div class='add'>+Res0	26:16</div><div class='add'>+Field	15	DVIM</div><div class='add'>+Field	14	TDIR</div><div class='add'>+Field	13	TSEI</div><div class='add'>+Field	12	TALL1</div><div class='add'>+Field	11	TALL0</div><div class='add'>+Field	10	TC</div><div class='add'>+Res0	9</div><div class='add'>+Field	8	vSGIEOICount</div><div class='add'>+Field	7	VGrp1DIE</div><div class='add'>+Field	6	VGrp1EIE</div><div class='add'>+Field	5	VGrp0DIE</div><div class='add'>+Field	4	VGrp0EIE</div><div class='add'>+Field	3	NPIE</div><div class='add'>+Field	2	LRENPIE</div><div class='add'>+Field	1	UIE</div><div class='add'>+Field	0	En</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_VTR_EL2	3	4	12	11	1</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:29	PRIbits</div><div class='add'>+Field	28:26	PREbits</div><div class='add'>+Field	25:23	IDbits</div><div class='add'>+Field	22	SEIS</div><div class='add'>+Field	21	A3V</div><div class='add'>+Field	20	nV4</div><div class='add'>+Field	19	TDS</div><div class='add'>+Field	18	DVIM</div><div class='add'>+Res0	17:5</div><div class='add'>+Field	4:0	ListRegs</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_MISR_EL2	3	4	12	11	2</div><div class='add'>+Res0	63:8</div><div class='add'>+Field	7	VGrp1D</div><div class='add'>+Field	6	VGrp1E</div><div class='add'>+Field	5	VGrp0D</div><div class='add'>+Field	4	VGrp0E</div><div class='add'>+Field	3	NP</div><div class='add'>+Field	2	LRENP</div><div class='add'>+Field	1	U</div><div class='add'>+Field	0	EOI</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ICH_VCTLR_EL2	3	4	12	11	4</div><div class='add'>+Res0	63:2</div><div class='add'>+Field	1	V3</div><div class='add'>+Field	0	En</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	CONTEXTIDR_EL2	3	4	13	0	1</div><div class='ctx'> Fields	CONTEXTIDR_ELx</div><div class='ctx'> EndSysreg</div><div class='hunk'>@@ -2746,31 +4678,39 @@ Field	63:0	PhysicalOffset</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	CPACR_EL12	3	5	1	0	2</div><div class='del'>-Fields	CPACR_ELx</div><div class='add'>+Mapping	CPACR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	ZCR_EL12	3	5	1	2	0</div><div class='del'>-Fields	ZCR_ELx</div><div class='add'>+Mapping	ZCR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TRFCR_EL12	3	5	1	2	1</div><div class='add'>+Mapping	TRFCR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	SMCR_EL12	3	5	1	2	6</div><div class='del'>-Fields	SMCR_ELx</div><div class='add'>+Mapping	SMCR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	GCSCR_EL12	3	5	2	5	0</div><div class='del'>-Fields	GCSCR_ELx</div><div class='add'>+Mapping	GCSCR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	GCSPR_EL12	3	5	2	5	1</div><div class='del'>-Fields	GCSPR_ELx</div><div class='add'>+Mapping	GCSPR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	FAR_EL12	3	5	6	0	0</div><div class='ctx'> Field	63:0	ADDR</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MPAM1_EL12	3	5	10	5	0</div><div class='add'>+Fields	MPAM1_ELx</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	CONTEXTIDR_EL12	3	5	13	0	1</div><div class='del'>-Fields	CONTEXTIDR_ELx</div><div class='add'>+Mapping	CONTEXTIDR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> SysregFields TTBRx_EL1</div><div class='hunk'>@@ -2787,8 +4727,104 @@ Sysreg	TTBR1_EL1	3	0	2	0	1</div><div class='ctx'> Fields	TTBRx_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='del'>-SysregFields	TCR2_EL1x</div><div class='del'>-Res0	63:16</div><div class='add'>+Sysreg	TCR_EL1		3	0	2	0	2</div><div class='add'>+Res0    63:62</div><div class='add'>+Field   61      MTX1</div><div class='add'>+Field   60      MTX0</div><div class='add'>+Field   59      DS</div><div class='add'>+Field   58      TCMA1</div><div class='add'>+Field   57      TCMA0</div><div class='add'>+Field   56      E0PD1</div><div class='add'>+Field   55      E0PD0</div><div class='add'>+Field   54      NFD1</div><div class='add'>+Field   53      NFD0</div><div class='add'>+Field   52      TBID1</div><div class='add'>+Field   51      TBID0</div><div class='add'>+Field   50      HWU162</div><div class='add'>+Field   49      HWU161</div><div class='add'>+Field   48      HWU160</div><div class='add'>+Field   47      HWU159</div><div class='add'>+Field   46      HWU062</div><div class='add'>+Field   45      HWU061</div><div class='add'>+Field   44      HWU060</div><div class='add'>+Field   43      HWU059</div><div class='add'>+Field   42      HPD1</div><div class='add'>+Field   41      HPD0</div><div class='add'>+Field   40      HD</div><div class='add'>+Field   39      HA</div><div class='add'>+Field   38      TBI1</div><div class='add'>+Field   37      TBI0</div><div class='add'>+Field   36      AS</div><div class='add'>+Res0    35</div><div class='add'>+Field   34:32   IPS</div><div class='add'>+Enum	31:30   TG1</div><div class='add'>+	0b01	16K</div><div class='add'>+	0b10	4K</div><div class='add'>+	0b11	64K</div><div class='add'>+EndEnum</div><div class='add'>+Enum	29:28   SH1</div><div class='add'>+	0b00	NONE</div><div class='add'>+	0b10	OUTER</div><div class='add'>+	0b11	INNER</div><div class='add'>+EndEnum</div><div class='add'>+Enum	27:26  ORGN1</div><div class='add'>+	0b00	NC</div><div class='add'>+	0b01	WBWA</div><div class='add'>+	0b10	WT</div><div class='add'>+	0b11	WBnWA</div><div class='add'>+EndEnum</div><div class='add'>+Enum	25:24   IRGN1</div><div class='add'>+	0b00	NC</div><div class='add'>+	0b01	WBWA</div><div class='add'>+	0b10	WT</div><div class='add'>+	0b11	WBnWA</div><div class='add'>+EndEnum</div><div class='add'>+Field   23      EPD1</div><div class='add'>+Field   22      A1</div><div class='add'>+Field   21:16   T1SZ</div><div class='add'>+Enum	15:14   TG0</div><div class='add'>+	0b00	4K</div><div class='add'>+	0b01	64K</div><div class='add'>+	0b10	16K</div><div class='add'>+EndEnum</div><div class='add'>+Enum	13:12   SH0</div><div class='add'>+	0b00	NONE</div><div class='add'>+	0b10	OUTER</div><div class='add'>+	0b11	INNER</div><div class='add'>+EndEnum</div><div class='add'>+Enum	11:10  ORGN0</div><div class='add'>+	0b00	NC</div><div class='add'>+	0b01	WBWA</div><div class='add'>+	0b10	WT</div><div class='add'>+	0b11	WBnWA</div><div class='add'>+EndEnum</div><div class='add'>+Enum	9:8   IRGN0</div><div class='add'>+	0b00	NC</div><div class='add'>+	0b01	WBWA</div><div class='add'>+	0b10	WT</div><div class='add'>+	0b11	WBnWA</div><div class='add'>+EndEnum</div><div class='add'>+Field   7       EPD0</div><div class='add'>+Res0    6</div><div class='add'>+Field   5:0     T0SZ</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR_EL12        3	5	2	0	2</div><div class='add'>+Mapping	TCR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRALIAS_EL1    3	0	2	7	6</div><div class='add'>+Mapping	TCR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2_EL1	3	0	2	0	3</div><div class='add'>+Res0	63:22</div><div class='add'>+Field	21	FNGNA1</div><div class='add'>+Field	20	FNGNA0</div><div class='add'>+Res0	19</div><div class='add'>+Field	18	FNG1</div><div class='add'>+Field	17	FNG0</div><div class='add'>+Field	16	A2</div><div class='ctx'> Field	15	DisCH1</div><div class='ctx'> Field	14	DisCH0</div><div class='ctx'> Res0	13:12</div><div class='hunk'>@@ -2801,26 +4837,28 @@ Field	3	POE</div><div class='ctx'> Field	2	E0POE</div><div class='ctx'> Field	1	PIE</div><div class='ctx'> Field	0	PnCH</div><div class='del'>-EndSysregFields</div><div class='del'>-</div><div class='del'>-Sysreg	TCR2_EL1	3	0	2	0	3</div><div class='del'>-Fields	TCR2_EL1x</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	TCR2_EL12	3	5	2	0	3</div><div class='del'>-Fields	TCR2_EL1x</div><div class='add'>+Mapping	TCR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2ALIAS_EL1   3	0	2	7	7</div><div class='add'>+Mapping	TCR2_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	TCR2_EL2	3	4	2	0	3</div><div class='del'>-Res0	63:16</div><div class='add'>+Res0	63:19</div><div class='add'>+Field	18	FNG1</div><div class='add'>+Field	17	FNG0</div><div class='add'>+Field	16	A2</div><div class='ctx'> Field	15	DisCH1</div><div class='ctx'> Field	14	DisCH0</div><div class='ctx'> Field	13	AMEC1</div><div class='ctx'> Field	12	AMEC0</div><div class='ctx'> Field	11	HAFT</div><div class='ctx'> Field	10	PTTWI</div><div class='del'>-Field	9:8	SKL1</div><div class='del'>-Field	7:6	SKL0</div><div class='add'>+Res0	9:6</div><div class='ctx'> Field	5	D128</div><div class='ctx'> Field	4	AIE</div><div class='ctx'> Field	3	POE</div><div class='hunk'>@@ -2880,6 +4918,10 @@ Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PIRE0_EL12	3	5	10	2	2</div><div class='add'>+Mapping	PIRE0_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PIRE0_EL2	3	4	10	2	2</div><div class='ctx'> Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='hunk'>@@ -2888,7 +4930,7 @@ Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PIR_EL12	3	5	10	2	3</div><div class='del'>-Fields	PIRx_ELx</div><div class='add'>+Mapping	PIR_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PIR_EL2		3	4	10	2	3</div><div class='hunk'>@@ -2903,10 +4945,14 @@ Sysreg	POR_EL1		3	0	10	2	4</div><div class='ctx'> Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='del'>-Sysreg	POR_EL12	3	5	10	2	4</div><div class='add'>+Sysreg	POR_EL2		3	4	10	2	4</div><div class='ctx'> Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	POR_EL12	3	5	10	2	4</div><div class='add'>+Mapping	POR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	S2POR_EL1	3	0	10	2	5</div><div class='ctx'> Fields	PIRx_ELx</div><div class='ctx'> EndSysreg</div><div class='hunk'>@@ -2941,6 +4987,22 @@ Res0	1</div><div class='ctx'> Field	0	EN</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MPAMIDR_EL1	3	0	10	4	4</div><div class='add'>+Res0	63:62</div><div class='add'>+Field	61	HAS_SDEFLT</div><div class='add'>+Field	60	HAS_FORCE_NS</div><div class='add'>+Field	59	SP4</div><div class='add'>+Field	58	HAS_TIDR</div><div class='add'>+Field	57	HAS_ALTSP</div><div class='add'>+Res0	56:40</div><div class='add'>+Field	39:32	PMG_MAX</div><div class='add'>+Res0	31:21</div><div class='add'>+Field	20:18	VPMR_MAX</div><div class='add'>+Field	17	HAS_HCR</div><div class='add'>+Res0	16</div><div class='add'>+Field	15:0	PARTID_MAX</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	LORID_EL1	3	0	10	4	7</div><div class='ctx'> Res0	63:24</div><div class='ctx'> Field	23:16	LD</div><div class='hunk'>@@ -2948,6 +5010,27 @@ Res0	15:8</div><div class='ctx'> Field	7:0	LR</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MPAM1_EL1	3	0	10	5	0</div><div class='add'>+Field	63	MPAMEN</div><div class='add'>+Res0	62:61</div><div class='add'>+Field	60 FORCED_NS</div><div class='add'>+Res0	59:55</div><div class='add'>+Field	54	ALTSP_FRCD</div><div class='add'>+Res0	53:48</div><div class='add'>+Field	47:40	PMG_D</div><div class='add'>+Field	39:32	PMG_I</div><div class='add'>+Field	31:16	PARTID_D</div><div class='add'>+Field	15:0	PARTID_I</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MPAM0_EL1	3	0	10	5	1</div><div class='add'>+Res0	63:48</div><div class='add'>+Field	47:40	PMG_D</div><div class='add'>+Field	39:32	PMG_I</div><div class='add'>+Field	31:16	PARTID_D</div><div class='add'>+Field	15:0	PARTID_I</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	ISR_EL1	3	0	12	1	0</div><div class='ctx'> Res0	63:11</div><div class='ctx'> Field	10	IS</div><div class='hunk'>@@ -3028,7 +5111,12 @@ Field	31:0	TRG</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	TRBIDR_EL1	3	0	9	11	7</div><div class='del'>-Res0	63:12</div><div class='add'>+Res0	63:16</div><div class='add'>+UnsignedEnum	15:12	MPAM</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	DEFAULT</div><div class='add'>+	0b0010	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Enum	11:8	EA</div><div class='ctx'> 	0b0000	NON_DESC</div><div class='ctx'> 	0b0001	IGNORE</div><div class='hunk'>@@ -3039,3 +5127,10 @@ Field	5	F</div><div class='ctx'> Field	4	P</div><div class='ctx'> Field	3:0	Align</div><div class='ctx'> EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	HPFAR_EL2	3	4	6	0	4</div><div class='add'>+Field	63	NS</div><div class='add'>+Res0	62:48</div><div class='add'>+Field	47:4	FIPA</div><div class='add'>+Res0	3:0</div><div class='add'>+EndSysreg</div><div class='head'>diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S<br/>index 9d01361696a1..ae551b857137 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/arm64/xen/hypercall.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/arm64/xen/hypercall.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/arm64/xen/hypercall.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/arm64/xen/hypercall.S</a></div><div class='hunk'>@@ -83,7 +83,26 @@ HYPERCALL3(vcpu_op);</div><div class='ctx'> HYPERCALL1(platform_op_raw);</div><div class='ctx'> HYPERCALL2(multicall);</div><div class='ctx'> HYPERCALL2(vm_assist);</div><div class='del'>-HYPERCALL3(dm_op);</div><div class='add'>+</div><div class='add'>+SYM_FUNC_START(HYPERVISOR_dm_op)</div><div class='add'>+	mov x16, #__HYPERVISOR_dm_op;	\</div><div class='add'>+	/*</div><div class='add'>+	 * dm_op hypercalls are issued by the userspace. The kernel needs to</div><div class='add'>+	 * enable access to TTBR0_EL1 as the hypervisor would issue stage 1</div><div class='add'>+	 * translations to user memory via AT instructions. Since AT</div><div class='add'>+	 * instructions are not affected by the PAN bit (ARMv8.1), we only</div><div class='add'>+	 * need the explicit uaccess_enable/disable if the TTBR0 PAN emulation</div><div class='add'>+	 * is enabled (it implies that hardware UAO and PAN disabled).</div><div class='add'>+	 */</div><div class='add'>+	uaccess_ttbr0_enable x6, x7, x8</div><div class='add'>+	hvc XEN_IMM</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable userspace access from kernel once the hyp call completed.</div><div class='add'>+	 */</div><div class='add'>+	uaccess_ttbr0_disable x6, x7</div><div class='add'>+	ret</div><div class='add'>+SYM_FUNC_END(HYPERVISOR_dm_op);</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START(privcmd_call)</div><div class='ctx'> 	mov x16, x0</div><div class='head'>diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig<br/>index 5479707eb5d1..4331313a42ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/Kconfig</a></div><div class='hunk'>@@ -64,9 +64,6 @@ config CSKY</div><div class='ctx'> 	select GENERIC_IRQ_MULTI_HANDLER</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='del'>-	select GENERIC_TIME_VSYSCALL</div><div class='del'>-	select GENERIC_VDSO_32</div><div class='del'>-	select GENERIC_GETTIMEOFDAY</div><div class='ctx'> 	select GX6605S_TIMER if CPU_CK610</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL</div><div class='hunk'>@@ -80,11 +77,9 @@ config CSKY</div><div class='ctx'> 	select HAVE_DEBUG_KMEMLEAK</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS</div><div class='del'>-	select HAVE_GENERIC_VDSO</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='ctx'> 	select HAVE_KERNEL_GZIP</div><div class='ctx'> 	select HAVE_KERNEL_LZO</div><div class='ctx'> 	select HAVE_KERNEL_LZMA</div><div class='head'>diff --git a/arch/csky/abiv1/alignment.c b/arch/csky/abiv1/alignment.c<br/>index e5b8b4b2109a..aee904833dec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/abiv1/alignment.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/abiv1/alignment.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/abiv1/alignment.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/abiv1/alignment.c</a></div><div class='hunk'>@@ -300,7 +300,7 @@ bad_area:</div><div class='ctx'> 	force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ctl_table alignment_tbl[5] = {</div><div class='add'>+static const struct ctl_table alignment_tbl[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname = "kernel_enable",</div><div class='ctx'> 		.data = &amp;align_kern_enable,</div><div class='head'>diff --git a/arch/csky/abiv1/cacheflush.c b/arch/csky/abiv1/cacheflush.c<br/>index 171e8fb32285..4bc0aad3cf8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/abiv1/cacheflush.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/abiv1/cacheflush.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/abiv1/cacheflush.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/abiv1/cacheflush.c</a></div><div class='hunk'>@@ -25,12 +25,12 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> 	mapping = folio_flush_mapping(folio);</div><div class='ctx'> </div><div class='ctx'> 	if (mapping &amp;&amp; !folio_mapped(folio))</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	else {</div><div class='ctx'> 		dcache_wbinv_all();</div><div class='ctx'> 		if (mapping)</div><div class='ctx'> 			icache_inv_all();</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_folio);</div><div class='hunk'>@@ -56,7 +56,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	folio = page_folio(pfn_to_page(pfn));</div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		dcache_wbinv_all();</div><div class='ctx'> </div><div class='ctx'> 	if (folio_flush_mapping(folio)) {</div><div class='head'>diff --git a/arch/csky/include/asm/Kbuild b/arch/csky/include/asm/Kbuild<br/>index 9a9bc65b57a9..3a5c7f6e5aac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/Kbuild</a></div><div class='hunk'>@@ -11,3 +11,4 @@ generic-y += qspinlock.h</div><div class='ctx'> generic-y += parport.h</div><div class='ctx'> generic-y += user.h</div><div class='ctx'> generic-y += vmlinux.lds.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/csky/include/asm/bitops.h b/arch/csky/include/asm/bitops.h<br/>index 72e1b2aa29a0..80d67eee6e86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/bitops.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * asm-generic/bitops/ffs.h</div><div class='ctx'>  */</div><div class='del'>-static inline int ffs(int x)</div><div class='add'>+static inline __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	if (!x)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -26,7 +26,7 @@ static inline int ffs(int x)</div><div class='ctx'> /*</div><div class='ctx'>  * asm-generic/bitops/__ffs.h</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned long __ffs(unsigned long x)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long __ffs(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile (</div><div class='ctx'> 		"brev %0\n"</div><div class='hunk'>@@ -39,7 +39,7 @@ static __always_inline unsigned long __ffs(unsigned long x)</div><div class='ctx'> /*</div><div class='ctx'>  * asm-generic/bitops/fls.h</div><div class='ctx'>  */</div><div class='del'>-static __always_inline int fls(unsigned int x)</div><div class='add'>+static __always_inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"ff1 %0\n"</div><div class='hunk'>@@ -52,7 +52,7 @@ static __always_inline int fls(unsigned int x)</div><div class='ctx'> /*</div><div class='ctx'>  * asm-generic/bitops/__fls.h</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned long __fls(unsigned long x)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long __fls(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	return fls(x) - 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/csky/include/asm/io.h b/arch/csky/include/asm/io.h<br/>index 4725bb977b0f..536d3bf32ff1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/io.h</a></div><div class='hunk'>@@ -32,22 +32,11 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * String version of I/O memory access operations.</div><div class='del'>- */</div><div class='del'>-extern void __memcpy_fromio(void *, const volatile void __iomem *, size_t);</div><div class='del'>-extern void __memcpy_toio(volatile void __iomem *, const void *, size_t);</div><div class='del'>-extern void __memset_io(volatile void __iomem *, int, size_t);</div><div class='del'>-</div><div class='del'>-#define memset_io(c,v,l)        __memset_io((c),(v),(l))</div><div class='del'>-#define memcpy_fromio(a,c,l)    __memcpy_fromio((a),(c),(l))</div><div class='del'>-#define memcpy_toio(c,a,l)      __memcpy_toio((c),(a),(l))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * I/O memory mapping functions.</div><div class='ctx'>  */</div><div class='ctx'> #define ioremap_wc(addr, size) \</div><div class='ctx'> 	ioremap_prot((addr), (size), \</div><div class='del'>-		(_PAGE_IOREMAP &amp; ~_CACHE_MASK) | _CACHE_UNCACHED)</div><div class='add'>+		__pgprot((_PAGE_IOREMAP &amp; ~_CACHE_MASK) | _CACHE_UNCACHED))</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/csky/include/asm/page.h b/arch/csky/include/asm/page.h<br/>index 0ca6c408c07f..4911d0892b71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/page.h</a></div><div class='hunk'>@@ -7,12 +7,8 @@</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * PAGE_SHIFT determines the page size: 4KB</div><div class='del'>- */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='add'>+</div><div class='ctx'> #define THREAD_SIZE	(PAGE_SIZE * 2)</div><div class='ctx'> #define THREAD_MASK	(~(THREAD_SIZE - 1))</div><div class='ctx'> #define THREAD_SHIFT	(PAGE_SHIFT + 1)</div><div class='hunk'>@@ -43,9 +39,6 @@ extern void *memcpy(void *to, const void *from, size_t l);</div><div class='ctx'> #define clear_page(page)	memset((page), 0, PAGE_SIZE)</div><div class='ctx'> #define copy_page(to, from)	memcpy((to), (from), PAGE_SIZE)</div><div class='ctx'> </div><div class='del'>-#define page_to_phys(page)	(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define phys_to_page(paddr)	(pfn_to_page(PFN_DOWN(paddr)))</div><div class='del'>-</div><div class='ctx'> struct page;</div><div class='ctx'> </div><div class='ctx'> #include &lt;abi/page.h&gt;</div><div class='head'>diff --git a/arch/csky/include/asm/pgalloc.h b/arch/csky/include/asm/pgalloc.h<br/>index 9c84c9012e53..9ed2b15ffd94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='del'>-	pte = (pte_t *) __get_free_page(GFP_KERNEL);</div><div class='add'>+	pte = __pte_alloc_one_kernel(mm);</div><div class='ctx'> 	if (!pte)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -44,7 +44,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> 	pgd_t *ret;</div><div class='ctx'> 	pgd_t *init;</div><div class='ctx'> </div><div class='del'>-	ret = (pgd_t *) __get_free_page(GFP_KERNEL);</div><div class='add'>+	ret = __pgd_alloc(mm, 0);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		init = pgd_offset(&amp;init_mm, 0UL);</div><div class='ctx'> 		pgd_init((unsigned long *)ret);</div><div class='hunk'>@@ -61,11 +61,8 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, address)		\</div><div class='del'>-do {							\</div><div class='del'>-	pagetable_pte_dtor(page_ptdesc(pte));		\</div><div class='del'>-	tlb_remove_page_ptdesc(tlb, page_ptdesc(pte));	\</div><div class='del'>-} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, address)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> extern void pagetable_init(void);</div><div class='ctx'> extern void mmu_init(unsigned long min_pfn, unsigned long max_pfn);</div><div class='head'>diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h<br/>index a397e1718ab6..5a394be09c35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/pgtable.h</a></div><div class='hunk'>@@ -200,7 +200,7 @@ static inline pte_t pte_mkyoung(pte_t pte)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -249,11 +249,6 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)</div><div class='ctx'> 	return __pgprot(prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	return __pte((pte_val(pte) &amp; _PAGE_CHG_MASK) |</div><div class='head'>diff --git a/arch/csky/include/asm/syscall.h b/arch/csky/include/asm/syscall.h<br/>index 0de5734950bf..717f44b4d26f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/include/asm/syscall.h</a></div><div class='hunk'>@@ -59,6 +59,19 @@ syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='ctx'> 	memcpy(args, &amp;regs-&gt;a1, 5 * sizeof(args[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void</div><div class='add'>+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='add'>+		      const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;regs-&gt;a0, args, 6 * sizeof(regs-&gt;a0));</div><div class='add'>+	/*</div><div class='add'>+	 * Also copy the first argument into orig_a0</div><div class='add'>+	 * so that syscall_get_arguments() would return it</div><div class='add'>+	 * instead of the previous value.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;orig_a0 = regs-&gt;a0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int</div><div class='ctx'> syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/csky/include/asm/vdso/clocksource.h b/arch/csky/include/asm/vdso/clocksource.h<br/>deleted file mode 100644<br/>index dfca7b4724b7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/vdso/clocksource.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/clocksource.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,9 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_VDSO_CSKY_CLOCKSOURCE_H</div><div class='del'>-#define __ASM_VDSO_CSKY_CLOCKSOURCE_H</div><div class='del'>-</div><div class='del'>-#define VDSO_ARCH_CLOCKMODES	\</div><div class='del'>-	VDSO_CLOCKMODE_ARCHTIMER</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_VDSO_CSKY_CLOCKSOURCE_H */</div><div class='head'>diff --git a/arch/csky/include/asm/vdso/gettimeofday.h b/arch/csky/include/asm/vdso/gettimeofday.h<br/>deleted file mode 100644<br/>index 6c4f1446944f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/gettimeofday.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,114 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_VDSO_CSKY_GETTIMEOFDAY_H</div><div class='del'>-#define __ASM_VDSO_CSKY_GETTIMEOFDAY_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/barrier.h&gt;</div><div class='del'>-#include &lt;asm/unistd.h&gt;</div><div class='del'>-#include &lt;abi/regdef.h&gt;</div><div class='del'>-#include &lt;uapi/linux/time.h&gt;</div><div class='del'>-</div><div class='del'>-#define VDSO_HAS_CLOCK_GETRES	1</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-int gettimeofday_fallback(struct __kernel_old_timeval *_tv,</div><div class='del'>-			  struct timezone *_tz)</div><div class='del'>-{</div><div class='del'>-	register struct __kernel_old_timeval *tv asm("a0") = _tv;</div><div class='del'>-	register struct timezone *tz asm("a1") = _tz;</div><div class='del'>-	register long ret asm("a0");</div><div class='del'>-	register long nr asm(syscallid) = __NR_gettimeofday;</div><div class='del'>-</div><div class='del'>-	asm volatile ("trap 0\n"</div><div class='del'>-		      : "=r" (ret)</div><div class='del'>-		      : "r"(tv), "r"(tz), "r"(nr)</div><div class='del'>-		      : "memory");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)</div><div class='del'>-{</div><div class='del'>-	register clockid_t clkid asm("a0") = _clkid;</div><div class='del'>-	register struct __kernel_timespec *ts asm("a1") = _ts;</div><div class='del'>-	register long ret asm("a0");</div><div class='del'>-	register long nr asm(syscallid) = __NR_clock_gettime64;</div><div class='del'>-</div><div class='del'>-	asm volatile ("trap 0\n"</div><div class='del'>-		      : "=r" (ret)</div><div class='del'>-		      : "r"(clkid), "r"(ts), "r"(nr)</div><div class='del'>-		      : "memory");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-long clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)</div><div class='del'>-{</div><div class='del'>-	register clockid_t clkid asm("a0") = _clkid;</div><div class='del'>-	register struct old_timespec32 *ts asm("a1") = _ts;</div><div class='del'>-	register long ret asm("a0");</div><div class='del'>-	register long nr asm(syscallid) = __NR_clock_gettime;</div><div class='del'>-</div><div class='del'>-	asm volatile ("trap 0\n"</div><div class='del'>-		      : "=r" (ret)</div><div class='del'>-		      : "r"(clkid), "r"(ts), "r"(nr)</div><div class='del'>-		      : "memory");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)</div><div class='del'>-{</div><div class='del'>-	register clockid_t clkid asm("a0") = _clkid;</div><div class='del'>-	register struct __kernel_timespec *ts asm("a1") = _ts;</div><div class='del'>-	register long ret asm("a0");</div><div class='del'>-	register long nr asm(syscallid) = __NR_clock_getres_time64;</div><div class='del'>-</div><div class='del'>-	asm volatile ("trap 0\n"</div><div class='del'>-		      : "=r" (ret)</div><div class='del'>-		      : "r"(clkid), "r"(ts), "r"(nr)</div><div class='del'>-		      : "memory");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-int clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)</div><div class='del'>-{</div><div class='del'>-	register clockid_t clkid asm("a0") = _clkid;</div><div class='del'>-	register struct old_timespec32 *ts asm("a1") = _ts;</div><div class='del'>-	register long ret asm("a0");</div><div class='del'>-	register long nr asm(syscallid) = __NR_clock_getres;</div><div class='del'>-</div><div class='del'>-	asm volatile ("trap 0\n"</div><div class='del'>-		      : "=r" (ret)</div><div class='del'>-		      : "r"(clkid), "r"(ts), "r"(nr)</div><div class='del'>-		      : "memory");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-uint64_t csky_pmu_read_cc(void);</div><div class='del'>-static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_CSKY_PMU_V1</div><div class='del'>-	return csky_pmu_read_cc();</div><div class='del'>-#else</div><div class='del'>-	return 0;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return _vdso_data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_VDSO_CSKY_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/csky/include/asm/vdso/processor.h b/arch/csky/include/asm/vdso/processor.h<br/>deleted file mode 100644<br/>index 39a6b561d0cc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/vdso/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/processor.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_VDSO_CSKY_PROCESSOR_H</div><div class='del'>-#define __ASM_VDSO_CSKY_PROCESSOR_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#define cpu_relax()	barrier()</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_VDSO_CSKY_PROCESSOR_H */</div><div class='head'>diff --git a/arch/csky/include/asm/vdso/vsyscall.h b/arch/csky/include/asm/vdso/vsyscall.h<br/>deleted file mode 100644<br/>index c276211a7c4d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/include/asm/vdso/vsyscall.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_VDSO_CSKY_VSYSCALL_H</div><div class='del'>-#define __ASM_VDSO_CSKY_VSYSCALL_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;vdso/datapage.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='del'>-</div><div class='del'>-static __always_inline struct vdso_data *__csky_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __csky_get_k_vdso_data</div><div class='del'>-</div><div class='del'>-#include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_VDSO_CSKY_VSYSCALL_H */</div><div class='head'>diff --git a/arch/csky/kernel/Makefile b/arch/csky/kernel/Makefile<br/>index 8a868316b912..a406a4ac2378 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/Makefile</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-extra-y := vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN) := vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y += head.o entry.o atomic.o signal.o traps.o irq.o time.o vdso.o vdso/</div><div class='del'>-obj-y += power.o syscall.o syscall_table.o setup.o io.o</div><div class='add'>+obj-y += power.o syscall.o syscall_table.o setup.o</div><div class='ctx'> obj-y += process.o cpu-probe.o ptrace.o stacktrace.o</div><div class='ctx'> obj-y += probes/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/csky/kernel/asm-offsets.c b/arch/csky/kernel/asm-offsets.c<br/>index d1e903579473..5525c8e7e1d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/kernel_stat.h&gt;</div><div class='head'>diff --git a/arch/csky/kernel/io.c b/arch/csky/kernel/io.c<br/>deleted file mode 100644<br/>index 5883f13fa2b1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/io.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,91 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy data from IO memory space to "real" memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)from, 4)) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 4) {</div><div class='del'>-		*(u32 *)to = __raw_readl(from);</div><div class='del'>-		from += 4;</div><div class='del'>-		to += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_fromio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy data from "real" memory space to IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)to, 4)) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 4) {</div><div class='del'>-		__raw_writel(*(u32 *)from, to);</div><div class='del'>-		from += 4;</div><div class='del'>-		to += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_toio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "memset" on IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memset_io(volatile void __iomem *dst, int c, size_t count)</div><div class='del'>-{</div><div class='del'>-	u32 qc = (u8)c;</div><div class='del'>-</div><div class='del'>-	qc |= qc &lt;&lt; 8;</div><div class='del'>-	qc |= qc &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)dst, 4)) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 4) {</div><div class='del'>-		__raw_writel(qc, dst);</div><div class='del'>-		dst += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memset_io);</div><div class='head'>diff --git a/arch/csky/kernel/perf_event.c b/arch/csky/kernel/perf_event.c<br/>index e5f18420ce64..e0a36acd265b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/perf_event.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/perf_event.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/perf_event.c</a></div><div class='hunk'>@@ -1139,8 +1139,7 @@ static irqreturn_t csky_pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> 		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		csky_pmu_event_set_period(event);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			csky_pmu_stop_event(event);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	csky_pmu_enable(&amp;csky_pmu.pmu);</div><div class='head'>diff --git a/arch/csky/kernel/process.c b/arch/csky/kernel/process.c<br/>index 0c6e4b17fe00..a7a90340042a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/process.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ void flush_thread(void){}</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct switch_stack *childstack;</div><div class='head'>diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c<br/>index 0f7e7b653c72..6bb685a2646b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/ptrace.c</a></div><div class='hunk'>@@ -166,7 +166,7 @@ static int fpr_set(struct task_struct *target,</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset csky_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = sizeof(struct pt_regs) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='hunk'>@@ -174,7 +174,7 @@ static const struct user_regset csky_regsets[] = {</div><div class='ctx'> 		.set = gpr_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n = sizeof(struct user_fp) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='head'>diff --git a/arch/csky/kernel/setup.c b/arch/csky/kernel/setup.c<br/>index 51012e90780d..e0d6ca86ea8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/setup.c</a></div><div class='hunk'>@@ -12,6 +12,45 @@</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BLK_DEV_INITRD</div><div class='add'>+static void __init setup_initrd(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long size;</div><div class='add'>+</div><div class='add'>+	if (initrd_start &gt;= initrd_end) {</div><div class='add'>+		pr_err("initrd not found or empty");</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (__pa(initrd_end) &gt; PFN_PHYS(max_low_pfn)) {</div><div class='add'>+		pr_err("initrd extends beyond end of memory");</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = initrd_end - initrd_start;</div><div class='add'>+</div><div class='add'>+	if (memblock_is_region_reserved(__pa(initrd_start), size)) {</div><div class='add'>+		pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region",</div><div class='add'>+		       __pa(initrd_start), size);</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memblock_reserve(__pa(initrd_start), size);</div><div class='add'>+</div><div class='add'>+	pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",</div><div class='add'>+		(void *)(initrd_start), size);</div><div class='add'>+</div><div class='add'>+	initrd_below_start_ok = 1;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+disable:</div><div class='add'>+	initrd_start = initrd_end = 0;</div><div class='add'>+</div><div class='add'>+	pr_err(" - disabling initrd\n");</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init csky_memblock_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long lowmem_size = PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);</div><div class='hunk'>@@ -40,6 +79,10 @@ static void __init csky_memblock_init(void)</div><div class='ctx'> 		max_low_pfn = min_low_pfn + sseg_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BLK_DEV_INITRD</div><div class='add'>+	setup_initrd();</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	max_zone_pfn[ZONE_NORMAL] = max_low_pfn;</div><div class='ctx'> </div><div class='ctx'> 	mmu_init(min_low_pfn, max_low_pfn);</div><div class='hunk'>@@ -112,9 +155,9 @@ asmlinkage __visible void __init csky_start(unsigned int unused,</div><div class='ctx'> 	pre_trap_init();</div><div class='ctx'> </div><div class='ctx'> 	if (dtb_start == NULL)</div><div class='del'>-		early_init_dt_scan(__dtb_start);</div><div class='add'>+		early_init_dt_scan(__dtb_start, __pa(dtb_start));</div><div class='ctx'> 	else</div><div class='del'>-		early_init_dt_scan(dtb_start);</div><div class='add'>+		early_init_dt_scan(dtb_start, __pa(dtb_start));</div><div class='ctx'> </div><div class='ctx'> 	start_kernel();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/csky/kernel/vdso.c b/arch/csky/kernel/vdso.c<br/>index 5c9ef63c29f1..c54d019d66bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/vdso.c</a></div><div class='hunk'>@@ -8,23 +8,19 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern char vdso_start[], vdso_end[];</div><div class='ctx'> </div><div class='ctx'> static unsigned int vdso_pages;</div><div class='ctx'> static struct page **vdso_pagelist;</div><div class='ctx'> </div><div class='del'>-static union vdso_data_store vdso_data_store __page_aligned_data;</div><div class='del'>-struct vdso_data *vdso_data = vdso_data_store.data;</div><div class='del'>-</div><div class='ctx'> static int __init vdso_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	vdso_pages = (vdso_end - vdso_start) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	vdso_pagelist =</div><div class='del'>-		kcalloc(vdso_pages + 1, sizeof(struct page *), GFP_KERNEL);</div><div class='add'>+		kcalloc(vdso_pages, sizeof(struct page *), GFP_KERNEL);</div><div class='ctx'> 	if (unlikely(vdso_pagelist == NULL)) {</div><div class='ctx'> 		pr_err("vdso: pagelist allocation failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -36,7 +32,6 @@ static int __init vdso_init(void)</div><div class='ctx'> 		pg = virt_to_page(vdso_start + (i &lt;&lt; PAGE_SHIFT));</div><div class='ctx'> 		vdso_pagelist[i] = pg;</div><div class='ctx'> 	}</div><div class='del'>-	vdso_pagelist[i] = virt_to_page(vdso_data);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -52,11 +47,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,</div><div class='ctx'> 	static struct vm_special_mapping vdso_mapping = {</div><div class='ctx'> 		.name = "[vdso]",</div><div class='ctx'> 	};</div><div class='del'>-	static struct vm_special_mapping vvar_mapping = {</div><div class='del'>-		.name = "[vvar]",</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	vdso_len = (vdso_pages + 1) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	vdso_len = vdso_pages &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	mmap_write_lock(mm);</div><div class='ctx'> 	vdso_base = get_unmapped_area(NULL, 0, vdso_len, 0, 0);</div><div class='hunk'>@@ -85,27 +77,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vdso_base += (vdso_pages &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	vvar_mapping.pages = &amp;vdso_pagelist[vdso_pages];</div><div class='del'>-	vma = _install_special_mapping(mm, vdso_base, PAGE_SIZE,</div><div class='del'>-		(VM_READ | VM_MAYREAD), &amp;vvar_mapping);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(vma)) {</div><div class='del'>-		ret = PTR_ERR(vma);</div><div class='del'>-		mm-&gt;context.vdso = NULL;</div><div class='del'>-		goto end;</div><div class='del'>-	}</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> end:</div><div class='ctx'> 	mmap_write_unlock(mm);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-const char *arch_vma_name(struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	if (vma-&gt;vm_mm &amp;&amp; (vma-&gt;vm_start == (long)vma-&gt;vm_mm-&gt;context.vdso))</div><div class='del'>-		return "[vdso]";</div><div class='del'>-	if (vma-&gt;vm_mm &amp;&amp; (vma-&gt;vm_start ==</div><div class='del'>-			   (long)vma-&gt;vm_mm-&gt;context.vdso + PAGE_SIZE))</div><div class='del'>-		return "[vdso_data]";</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/csky/kernel/vdso/Makefile b/arch/csky/kernel/vdso/Makefile<br/>index bc2261f5a8d4..a3042287a070 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/vdso/Makefile</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> # Symbols present in the vdso</div><div class='ctx'> vdso-syms  += rt_sigreturn</div><div class='del'>-vdso-syms  += vgettimeofday</div><div class='ctx'> </div><div class='ctx'> # Files to link into the vdso</div><div class='ctx'> obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o</div><div class='head'>diff --git a/arch/csky/kernel/vdso/vdso.lds.S b/arch/csky/kernel/vdso/vdso.lds.S<br/>index 590a6c79fff7..8d226252d439 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/kernel/vdso/vdso.lds.S</a></div><div class='hunk'>@@ -49,10 +49,6 @@ VERSION</div><div class='ctx'> 	LINUX_5.10 {</div><div class='ctx'> 	global:</div><div class='ctx'> 		__vdso_rt_sigreturn;</div><div class='del'>-		__vdso_clock_gettime;</div><div class='del'>-		__vdso_clock_gettime64;</div><div class='del'>-		__vdso_gettimeofday;</div><div class='del'>-		__vdso_clock_getres;</div><div class='ctx'> 	local: *;</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/csky/kernel/vdso/vgettimeofday.c b/arch/csky/kernel/vdso/vgettimeofday.c<br/>deleted file mode 100644<br/>index 55af30e83752..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/kernel/vdso/vgettimeofday.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/kernel/vdso/vgettimeofday.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;vdso/gettime.h&gt;</div><div class='del'>-</div><div class='del'>-extern</div><div class='del'>-int __vdso_clock_gettime(clockid_t clock,</div><div class='del'>-			 struct old_timespec32 *ts)</div><div class='del'>-{</div><div class='del'>-	return __cvdso_clock_gettime32(clock, ts);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __vdso_clock_gettime64(clockid_t clock,</div><div class='del'>-			   struct __kernel_timespec *ts)</div><div class='del'>-{</div><div class='del'>-	return __cvdso_clock_gettime(clock, ts);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __vdso_gettimeofday(struct __kernel_old_timeval *tv,</div><div class='del'>-			struct timezone *tz)</div><div class='del'>-{</div><div class='del'>-	return __cvdso_gettimeofday(tv, tz);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __vdso_clock_getres(clockid_t clock_id,</div><div class='del'>-			struct old_timespec32 *res)</div><div class='del'>-{</div><div class='del'>-	return __cvdso_clock_getres_time32(clock_id, res);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/csky/mm/fault.c b/arch/csky/mm/fault.c<br/>index a885518ce1dd..a6ca7dff4215 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/mm/fault.c</a></div><div class='hunk'>@@ -277,7 +277,7 @@ retry:</div><div class='ctx'> 	if (fault &amp; VM_FAULT_COMPLETED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (unlikely((fault &amp; VM_FAULT_RETRY) &amp;&amp; (flags &amp; FAULT_FLAG_ALLOW_RETRY))) {</div><div class='add'>+	if (unlikely(fault &amp; VM_FAULT_RETRY)) {</div><div class='ctx'> 		flags |= FAULT_FLAG_TRIED;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c<br/>index bde7cabd23df..573da66b2543 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/csky/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/csky/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/csky/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/csky/mm/init.c</a></div><div class='hunk'>@@ -42,73 +42,6 @@ unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]</div><div class='ctx'> 						__page_aligned_bss;</div><div class='ctx'> EXPORT_SYMBOL(empty_zero_page);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BLK_DEV_INITRD</div><div class='del'>-static void __init setup_initrd(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long size;</div><div class='del'>-</div><div class='del'>-	if (initrd_start &gt;= initrd_end) {</div><div class='del'>-		pr_err("initrd not found or empty");</div><div class='del'>-		goto disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (__pa(initrd_end) &gt; PFN_PHYS(max_low_pfn)) {</div><div class='del'>-		pr_err("initrd extends beyond end of memory");</div><div class='del'>-		goto disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	size = initrd_end - initrd_start;</div><div class='del'>-</div><div class='del'>-	if (memblock_is_region_reserved(__pa(initrd_start), size)) {</div><div class='del'>-		pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region",</div><div class='del'>-		       __pa(initrd_start), size);</div><div class='del'>-		goto disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memblock_reserve(__pa(initrd_start), size);</div><div class='del'>-</div><div class='del'>-	pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",</div><div class='del'>-		(void *)(initrd_start), size);</div><div class='del'>-</div><div class='del'>-	initrd_below_start_ok = 1;</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-disable:</div><div class='del'>-	initrd_start = initrd_end = 0;</div><div class='del'>-</div><div class='del'>-	pr_err(" - disabling initrd\n");</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	unsigned long tmp;</div><div class='del'>-</div><div class='del'>-	set_max_mapnr(highend_pfn - ARCH_PFN_OFFSET);</div><div class='del'>-#else</div><div class='del'>-	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);</div><div class='del'>-#endif</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn &lt;&lt; PAGE_SHIFT);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_BLK_DEV_INITRD</div><div class='del'>-	setup_initrd();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	for (tmp = highstart_pfn; tmp &lt; highend_pfn; tmp++) {</div><div class='del'>-		struct page *page = pfn_to_page(tmp);</div><div class='del'>-</div><div class='del'>-		/* FIXME not sure about */</div><div class='del'>-		if (!memblock_is_reserved(tmp &lt;&lt; PAGE_SHIFT))</div><div class='del'>-			free_highmem_page(page);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void free_initmem(void)</div><div class='ctx'> {</div><div class='ctx'> 	free_initmem_default(-1);</div><div class='head'>diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig<br/>index e233b5efa276..d987ba368ed6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/Kconfig</a></div><div class='hunk'>@@ -20,7 +20,6 @@ config HEXAGON</div><div class='ctx'> 	# select ARCH_HAS_CPU_IDLE_WAIT</div><div class='ctx'> 	# select GPIOLIB</div><div class='ctx'> 	# select HAVE_CLK</div><div class='del'>-	# select GENERIC_PENDING_IRQ if SMP</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='ctx'> 	# GENERIC_ALLOCATOR is used by dma_alloc_coherent()</div><div class='hunk'>@@ -30,8 +29,6 @@ config HEXAGON</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select NEED_SG_DMA_LENGTH</div><div class='del'>-	select NO_IOPORT_MAP</div><div class='del'>-	select GENERIC_IOMAP</div><div class='ctx'> 	select GENERIC_IOREMAP</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select STACKTRACE_SUPPORT</div><div class='hunk'>@@ -59,6 +56,9 @@ config EARLY_PRINTK</div><div class='ctx'> config MMU</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config NO_IOPORT_MAP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config GENERIC_CSUM</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/Makefile b/arch/hexagon/Makefile<br/>index 92d005958dfb..ff172cbe5881 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/Makefile</a></div><div class='hunk'>@@ -32,3 +32,9 @@ KBUILD_LDFLAGS += $(ldflags-y)</div><div class='ctx'> TIR_NAME := r19</div><div class='ctx'> KBUILD_CFLAGS += -ffixed-$(TIR_NAME) -DTHREADINFO_REG=$(TIR_NAME) -D__linux__</div><div class='ctx'> KBUILD_AFLAGS += -DTHREADINFO_REG=$(TIR_NAME)</div><div class='add'>+</div><div class='add'>+# Disable HexagonConstExtenders pass for LLVM versions prior to 19.1.0</div><div class='add'>+# https://github.com/llvm/llvm-project/issues/99714</div><div class='add'>+ifneq ($(call clang-min-version, 190100),y)</div><div class='add'>+KBUILD_CFLAGS += -mllvm -hexagon-cext=false</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/hexagon/configs/comet_defconfig b/arch/hexagon/configs/comet_defconfig<br/>index 6cb764947596..c6108f000288 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/configs/comet_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/configs/comet_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/configs/comet_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/configs/comet_defconfig</a></div><div class='hunk'>@@ -72,10 +72,6 @@ CONFIG_INET=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_FRAME_WARN=0</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild<br/>index 8c1a78c8f527..1efa1e993d4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/Kbuild</a></div><div class='hunk'>@@ -5,3 +5,4 @@ generic-y += extable.h</div><div class='ctx'> generic-y += iomap.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/hexagon/include/asm/bitops.h b/arch/hexagon/include/asm/bitops.h<br/>index 160d8f37fa1a..b23cb13833af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/bitops.h</a></div><div class='hunk'>@@ -200,7 +200,7 @@ arch_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)</div><div class='ctx'>  *</div><div class='ctx'>  * Undefined if no zero exists, so code should check against ~0UL first.</div><div class='ctx'>  */</div><div class='del'>-static inline long ffz(int x)</div><div class='add'>+static inline long __attribute_const__ ffz(int x)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -217,7 +217,7 @@ static inline long ffz(int x)</div><div class='ctx'>  * This is defined the same way as ffs.</div><div class='ctx'>  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.</div><div class='ctx'>  */</div><div class='del'>-static inline int fls(unsigned int x)</div><div class='add'>+static inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -238,7 +238,7 @@ static inline int fls(unsigned int x)</div><div class='ctx'>  * the libc and compiler builtin ffs routines, therefore</div><div class='ctx'>  * differs in spirit from the above ffz (man ffs).</div><div class='ctx'>  */</div><div class='del'>-static inline int ffs(int x)</div><div class='add'>+static inline __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +260,7 @@ static inline int ffs(int x)</div><div class='ctx'>  * bits_per_long assumed to be 32</div><div class='ctx'>  * numbering starts at 0 I think (instead of 1 like ffs)</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long __ffs(unsigned long word)</div><div class='add'>+static inline __attribute_const__ unsigned long __ffs(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	int num;</div><div class='ctx'> </div><div class='hunk'>@@ -278,7 +278,7 @@ static inline unsigned long __ffs(unsigned long word)</div><div class='ctx'>  * Undefined if no set bit exists, so code should check against 0 first.</div><div class='ctx'>  * bits_per_long assumed to be 32</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long __fls(unsigned long word)</div><div class='add'>+static inline __attribute_const__ unsigned long __fls(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	int num;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/include/asm/cmpxchg.h b/arch/hexagon/include/asm/cmpxchg.h<br/>index bf6cf5579cf4..9c58fb81f7fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/cmpxchg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/cmpxchg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -56,7 +56,7 @@ __arch_xchg(unsigned long x, volatile void *ptr, int size)</div><div class='ctx'> 	__typeof__(ptr) __ptr = (ptr);				\</div><div class='ctx'> 	__typeof__(*(ptr)) __old = (old);			\</div><div class='ctx'> 	__typeof__(*(ptr)) __new = (new);			\</div><div class='del'>-	__typeof__(*(ptr)) __oldval = 0;			\</div><div class='add'>+	__typeof__(*(ptr)) __oldval = (__typeof__(*(ptr))) 0;	\</div><div class='ctx'> 								\</div><div class='ctx'> 	asm volatile(						\</div><div class='ctx'> 		"1:	%0 = memw_locked(%1);\n"		\</div><div class='head'>diff --git a/arch/hexagon/include/asm/io.h b/arch/hexagon/include/asm/io.h<br/>index 522d321ea85a..83b2eb5de60c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/io.h</a></div><div class='hunk'>@@ -8,38 +8,13 @@</div><div class='ctx'> #ifndef _ASM_IO_H</div><div class='ctx'> #define _ASM_IO_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/iomap.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We don't have PCI yet.</div><div class='del'>- * _IO_BASE is pointing at what should be unused virtual space.</div><div class='del'>- */</div><div class='del'>-#define IO_SPACE_LIMIT 0xffff</div><div class='del'>-#define _IO_BASE ((void __iomem *)0xfe000000)</div><div class='del'>-</div><div class='del'>-#define IOMEM(x)        ((void __force __iomem *)(x))</div><div class='del'>-</div><div class='ctx'> extern int remap_area_pages(unsigned long start, unsigned long phys_addr,</div><div class='ctx'> 				unsigned long end, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-/* Defined in lib/io.c, needed for smc91x driver. */</div><div class='del'>-extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);</div><div class='del'>-extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);</div><div class='del'>-</div><div class='del'>-extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen);</div><div class='del'>-extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen);</div><div class='del'>-</div><div class='del'>-#define readsw(p, d, l)	__raw_readsw(p, d, l)</div><div class='del'>-#define writesw(p, d, l) __raw_writesw(p, d, l)</div><div class='del'>-</div><div class='del'>-#define readsl(p, d, l)   __raw_readsl(p, d, l)</div><div class='del'>-#define writesl(p, d, l)  __raw_writesl(p, d, l)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * virt_to_phys - map virtual address to physical</div><div class='ctx'>  * @address:  address to map</div><div class='hunk'>@@ -59,20 +34,11 @@ static inline void *phys_to_virt(unsigned long address)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * IO port access primitives.  Hexagon doesn't have special IO access</div><div class='del'>- * instructions; all I/O is memory mapped.</div><div class='del'>- *</div><div class='del'>- * in/out are used for "ports", but we don't have "port instructions",</div><div class='del'>- * so these are really just memory mapped too.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * readb - read byte from memory mapped device</div><div class='ctx'>  * @addr:  pointer to memory</div><div class='ctx'>  *</div><div class='del'>- * Operates on "I/O bus memory space"</div><div class='ctx'>  */</div><div class='del'>-static inline u8 readb(const volatile void __iomem *addr)</div><div class='add'>+static inline u8 __raw_readb(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u8 val;</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -82,8 +48,9 @@ static inline u8 readb(const volatile void __iomem *addr)</div><div class='ctx'> 	);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='add'>+#define __raw_readb __raw_readb</div><div class='ctx'> </div><div class='del'>-static inline u16 readw(const volatile void __iomem *addr)</div><div class='add'>+static inline u16 __raw_readw(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u16 val;</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -93,8 +60,9 @@ static inline u16 readw(const volatile void __iomem *addr)</div><div class='ctx'> 	);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='add'>+#define __raw_readw __raw_readw</div><div class='ctx'> </div><div class='del'>-static inline u32 readl(const volatile void __iomem *addr)</div><div class='add'>+static inline u32 __raw_readl(const volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	asm volatile(</div><div class='hunk'>@@ -104,6 +72,7 @@ static inline u32 readl(const volatile void __iomem *addr)</div><div class='ctx'> 	);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='add'>+#define __raw_readl __raw_readl</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * writeb - write a byte to a memory location</div><div class='hunk'>@@ -111,7 +80,7 @@ static inline u32 readl(const volatile void __iomem *addr)</div><div class='ctx'>  * @addr:  pointer to memory</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-static inline void writeb(u8 data, volatile void __iomem *addr)</div><div class='add'>+static inline void __raw_writeb(u8 data, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"memb(%0) = %1;"</div><div class='hunk'>@@ -120,8 +89,9 @@ static inline void writeb(u8 data, volatile void __iomem *addr)</div><div class='ctx'> 		: "memory"</div><div class='ctx'> 	);</div><div class='ctx'> }</div><div class='add'>+#define __raw_writeb __raw_writeb</div><div class='ctx'> </div><div class='del'>-static inline void writew(u16 data, volatile void __iomem *addr)</div><div class='add'>+static inline void __raw_writew(u16 data, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"memh(%0) = %1;"</div><div class='hunk'>@@ -131,8 +101,9 @@ static inline void writew(u16 data, volatile void __iomem *addr)</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='add'>+#define __raw_writew __raw_writew</div><div class='ctx'> </div><div class='del'>-static inline void writel(u32 data, volatile void __iomem *addr)</div><div class='add'>+static inline void __raw_writel(u32 data, volatile void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"memw(%0) = %1;"</div><div class='hunk'>@@ -141,26 +112,7 @@ static inline void writel(u32 data, volatile void __iomem *addr)</div><div class='ctx'> 		: "memory"</div><div class='ctx'> 	);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#define __raw_writeb writeb</div><div class='del'>-#define __raw_writew writew</div><div class='del'>-#define __raw_writel writel</div><div class='del'>-</div><div class='del'>-#define __raw_readb readb</div><div class='del'>-#define __raw_readw readw</div><div class='del'>-#define __raw_readl readl</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define readb_relaxed __raw_readb</div><div class='del'>-#define readw_relaxed __raw_readw</div><div class='del'>-#define readl_relaxed __raw_readl</div><div class='del'>-</div><div class='del'>-#define writeb_relaxed __raw_writeb</div><div class='del'>-#define writew_relaxed __raw_writew</div><div class='del'>-#define writel_relaxed __raw_writel</div><div class='add'>+#define __raw_writel __raw_writel</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * I/O memory mapping functions.</div><div class='hunk'>@@ -168,140 +120,6 @@ static inline void writel(u32 data, volatile void __iomem *addr)</div><div class='ctx'> #define _PAGE_IOREMAP (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \</div><div class='ctx'> 		       (__HEXAGON_C_DEV &lt;&lt; 6))</div><div class='ctx'> </div><div class='del'>-#define __raw_writel writel</div><div class='del'>-</div><div class='del'>-static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,</div><div class='del'>-	int count)</div><div class='del'>-{</div><div class='del'>-	memcpy(dst, (void *) src, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void memcpy_toio(volatile void __iomem *dst, const void *src,</div><div class='del'>-	int count)</div><div class='del'>-{</div><div class='del'>-	memcpy((void *) dst, src, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void memset_io(volatile void __iomem *addr, int value,</div><div class='del'>-			     size_t size)</div><div class='del'>-{</div><div class='del'>-	memset((void __force *)addr, value, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define PCI_IO_ADDR	(volatile void __iomem *)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * inb - read byte from I/O port or something</div><div class='del'>- * @port:  address in I/O space</div><div class='del'>- *</div><div class='del'>- * Operates on "I/O bus I/O space"</div><div class='del'>- */</div><div class='del'>-static inline u8 inb(unsigned long port)</div><div class='del'>-{</div><div class='del'>-	return readb(_IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u16 inw(unsigned long port)</div><div class='del'>-{</div><div class='del'>-	return readw(_IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u32 inl(unsigned long port)</div><div class='del'>-{</div><div class='del'>-	return readl(_IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * outb - write a byte to a memory location</div><div class='del'>- * @data: data to write to</div><div class='del'>- * @addr:  address in I/O space</div><div class='del'>- */</div><div class='del'>-static inline void outb(u8 data, unsigned long port)</div><div class='del'>-{</div><div class='del'>-	writeb(data, _IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void outw(u16 data, unsigned long port)</div><div class='del'>-{</div><div class='del'>-	writew(data, _IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void outl(u32 data, unsigned long port)</div><div class='del'>-{</div><div class='del'>-	writel(data, _IO_BASE + (port &amp; IO_SPACE_LIMIT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define outb_p outb</div><div class='del'>-#define outw_p outw</div><div class='del'>-#define outl_p outl</div><div class='del'>-</div><div class='del'>-#define inb_p inb</div><div class='del'>-#define inw_p inw</div><div class='del'>-#define inl_p inl</div><div class='del'>-</div><div class='del'>-static inline void insb(unsigned long port, void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		u8 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			u8 x = inb(port);</div><div class='del'>-			*buf++ = x;</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void insw(unsigned long port, void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		u16 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			u16 x = inw(port);</div><div class='del'>-			*buf++ = x;</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void insl(unsigned long port, void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		u32 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			u32 x = inw(port);</div><div class='del'>-			*buf++ = x;</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void outsb(unsigned long port, const void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		const u8 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			outb(*buf++, port);</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void outsw(unsigned long port, const void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		const u16 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			outw(*buf++, port);</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void outsl(unsigned long port, const void *buffer, int count)</div><div class='del'>-{</div><div class='del'>-	if (count) {</div><div class='del'>-		const u32 *buf = buffer;</div><div class='del'>-		do {</div><div class='del'>-			outl(*buf++, port);</div><div class='del'>-		} while (--count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * These defines are necessary to use the generic io.h for filling in</div><div class='ctx'>  * the missing parts of the API contract. This is because the platform</div><div class='hunk'>@@ -310,23 +128,6 @@ static inline void outsl(unsigned long port, const void *buffer, int count)</div><div class='ctx'>  */</div><div class='ctx'> #define virt_to_phys virt_to_phys</div><div class='ctx'> #define phys_to_virt phys_to_virt</div><div class='del'>-#define memset_io memset_io</div><div class='del'>-#define memcpy_fromio memcpy_fromio</div><div class='del'>-#define memcpy_toio memcpy_toio</div><div class='del'>-#define readb readb</div><div class='del'>-#define readw readw</div><div class='del'>-#define readl readl</div><div class='del'>-#define writeb writeb</div><div class='del'>-#define writew writew</div><div class='del'>-#define writel writel</div><div class='del'>-#define insb insb</div><div class='del'>-#define insw insw</div><div class='del'>-#define insl insl</div><div class='del'>-#define outsb outsb</div><div class='del'>-#define outsw outsw</div><div class='del'>-#define outsl outsl</div><div class='ctx'> #include &lt;asm-generic/io.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/hexagon/include/asm/page.h b/arch/hexagon/include/asm/page.h<br/>index 8a6af57274c2..137ba7c5de48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/page.h</a></div><div class='hunk'>@@ -45,9 +45,7 @@</div><div class='ctx'> #define HVM_HUGEPAGE_SIZE 0x5</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define PAGE_SHIFT CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE  (1UL &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK  (~((1 &lt;&lt; PAGE_SHIFT) - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='hunk'>@@ -118,12 +116,6 @@ static inline void clear_page(void *page)</div><div class='ctx'> #define clear_user_page(page, vaddr, pg)	clear_page(page)</div><div class='ctx'> #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * page_to_phys - convert page to physical address</div><div class='del'>- * @page - pointer to page entry in mem_map</div><div class='del'>- */</div><div class='del'>-#define page_to_phys(page)      (page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='ctx'> static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> {</div><div class='ctx'> 	return __pa(kaddr) &gt;&gt; PAGE_SHIFT;</div><div class='head'>diff --git a/arch/hexagon/include/asm/pgalloc.h b/arch/hexagon/include/asm/pgalloc.h<br/>index 55988625e6fb..937a11ef4c33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *pgd;</div><div class='ctx'> </div><div class='del'>-	pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	pgd = __pgd_alloc(mm, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * There may be better ways to do this, but to ensure</div><div class='hunk'>@@ -87,10 +87,7 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'> 		max_kernel_seg = pmdindex;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, addr)				\</div><div class='del'>-do {								\</div><div class='del'>-	pagetable_pte_dtor((page_ptdesc(pte)));			\</div><div class='del'>-	tlb_remove_page_ptdesc((tlb), (page_ptdesc(pte)));	\</div><div class='del'>-} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, addr)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/hexagon/include/asm/pgtable.h b/arch/hexagon/include/asm/pgtable.h<br/>index 8c5b7a1c3d90..fbf24d1d1ca6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/pgtable.h</a></div><div class='hunk'>@@ -238,9 +238,6 @@ static inline int pte_present(pte_t pte)</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_PRESENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* mk_pte - make a PTE out of a page pointer and protection bits */</div><div class='del'>-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> /* pte_page - returns a page (frame pointer/descriptor?) based on a PTE */</div><div class='ctx'> #define pte_page(x) pfn_to_page(pte_pfn(x))</div><div class='ctx'> </div><div class='hunk'>@@ -390,7 +387,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)</div><div class='ctx'> 		(((type &amp; 0x1f) &lt;&lt; 1) | \</div><div class='ctx'> 		 ((offset &amp; 0x3ffff8) &lt;&lt; 10) | ((offset &amp; 0x7) &lt;&lt; 7)) })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/hexagon/include/asm/setup.h b/arch/hexagon/include/asm/setup.h<br/>new file mode 100644<br/>index 000000000000..9f2749cd4052<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/setup.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 and</div><div class='add'>+ * only version 2 as published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_HEXAGON_SETUP_H</div><div class='add'>+#define _ASM_HEXAGON_SETUP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;uapi/asm/setup.h&gt;</div><div class='add'>+</div><div class='add'>+extern char external_cmdline_buffer;</div><div class='add'>+</div><div class='add'>+void __init setup_arch_memory(void);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/hexagon/include/asm/spinlock_types.h b/arch/hexagon/include/asm/spinlock_types.h<br/>index d5f66495b670..63add2d863e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #define _ASM_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_RAW_H</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='head'>diff --git a/arch/hexagon/include/asm/syscall.h b/arch/hexagon/include/asm/syscall.h<br/>index f6e454f18038..70637261817a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/asm/syscall.h</a></div><div class='hunk'>@@ -26,6 +26,13 @@ static inline long syscall_get_nr(struct task_struct *task,</div><div class='ctx'> 	return regs-&gt;r06;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;r06 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 					 struct pt_regs *regs,</div><div class='ctx'> 					 unsigned long *args)</div><div class='hunk'>@@ -33,6 +40,13 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	memcpy(args, &amp;(&amp;regs-&gt;r00)[0], 6 * sizeof(args[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;(&amp;regs-&gt;r00)[0], args, 6 * sizeof(args[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline long syscall_get_error(struct task_struct *task,</div><div class='ctx'> 				     struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -45,6 +59,13 @@ static inline long syscall_get_return_value(struct task_struct *task,</div><div class='ctx'> 	return regs-&gt;r00;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_return_value(struct task_struct *task,</div><div class='add'>+					    struct pt_regs *regs,</div><div class='add'>+					    int error, long val)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;r00 = (long) error ?: val;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	return AUDIT_ARCH_HEXAGON;</div><div class='head'>diff --git a/arch/hexagon/include/uapi/asm/setup.h b/arch/hexagon/include/uapi/asm/setup.h<br/>index 8ce9428b1583..598f74f671f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/uapi/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/include/uapi/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/include/uapi/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/include/uapi/asm/setup.h</a></div><div class='hunk'>@@ -17,19 +17,9 @@</div><div class='ctx'>  * 02110-1301, USA.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef _ASM_SETUP_H</div><div class='del'>-#define _ASM_SETUP_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#else</div><div class='del'>-#define __init</div><div class='del'>-#endif</div><div class='add'>+#ifndef _UAPI_ASM_HEXAGON_SETUP_H</div><div class='add'>+#define _UAPI_ASM_HEXAGON_SETUP_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-extern char external_cmdline_buffer;</div><div class='del'>-</div><div class='del'>-void __init setup_arch_memory(void);</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/hexagon/kernel/Makefile b/arch/hexagon/kernel/Makefile<br/>index 3fdf937eb572..8e0fb4a62315 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-extra-y := vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN) := vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y += head.o</div><div class='ctx'> obj-$(CONFIG_SMP) += smp.o</div><div class='head'>diff --git a/arch/hexagon/kernel/asm-offsets.c b/arch/hexagon/kernel/asm-offsets.c<br/>index 03a7063f9456..50eea9fa6f13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/arch/hexagon/kernel/process.c b/arch/hexagon/kernel/process.c<br/>index 2a77bfd75694..15b4992bfa29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/process.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ void arch_cpu_idle(void)</div><div class='ctx'>  */</div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct thread_info *ti = task_thread_info(p);</div><div class='head'>diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c<br/>index 905b06790ab7..2093eee143e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/ptrace.c</a></div><div class='hunk'>@@ -137,7 +137,7 @@ enum hexagon_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset hexagon_regsets[] = {</div><div class='ctx'> 	[REGSET_GENERAL] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(unsigned long),</div><div class='ctx'> 		.align = sizeof(unsigned long),</div><div class='head'>diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c<br/>index f0f207e2a694..6f851e1cd4ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/time.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/time.c</a></div><div class='hunk'>@@ -170,8 +170,7 @@ static void __init time_init_deferred(void)</div><div class='ctx'> </div><div class='ctx'> 	ce_dev-&gt;cpumask = cpu_all_mask;</div><div class='ctx'> </div><div class='del'>-	if (!resource)</div><div class='del'>-		resource = rtos_timer_device.resource;</div><div class='add'>+	resource = rtos_timer_device.resource;</div><div class='ctx'> </div><div class='ctx'> 	/*  ioremap here means this has to run later, after paging init  */</div><div class='ctx'> 	rtos_timer = ioremap(resource-&gt;start, resource_size(resource));</div><div class='head'>diff --git a/arch/hexagon/kernel/traps.c b/arch/hexagon/kernel/traps.c<br/>index 75e062722d28..e732aa01c2ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/kernel/traps.c</a></div><div class='hunk'>@@ -135,7 +135,7 @@ static void do_show_stack(struct task_struct *task, unsigned long *fp,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Attempt to continue past exception. */</div><div class='del'>-		if (0 == newfp) {</div><div class='add'>+		if (!newfp) {</div><div class='ctx'> 			struct pt_regs *regs = (struct pt_regs *) (((void *)fp)</div><div class='ctx'> 						+ 8);</div><div class='ctx'> </div><div class='hunk'>@@ -195,8 +195,10 @@ int die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> 	printk(KERN_EMERG "Oops: %s[#%d]:\n", str, ++die.counter);</div><div class='ctx'> </div><div class='ctx'> 	if (notify_die(DIE_OOPS, str, regs, err, pt_cause(regs), SIGSEGV) ==</div><div class='del'>-	    NOTIFY_STOP)</div><div class='add'>+	    NOTIFY_STOP) {</div><div class='add'>+		spin_unlock_irq(&amp;die.lock);</div><div class='ctx'> 		return 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	print_modules();</div><div class='ctx'> 	show_regs(regs);</div><div class='head'>diff --git a/arch/hexagon/lib/Makefile b/arch/hexagon/lib/Makefile<br/>index a64641e89d5f..107894c0910e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/lib/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/lib/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/lib/Makefile</a></div><div class='hunk'>@@ -2,5 +2,5 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for hexagon-specific library files.</div><div class='ctx'> #</div><div class='del'>-obj-y = checksum.o io.o memcpy.o memset.o memcpy_likely_aligned.o \</div><div class='add'>+obj-y = checksum.o memcpy.o memset.o memcpy_likely_aligned.o \</div><div class='ctx'>          divsi3.o modsi3.o udivsi3.o  umodsi3.o</div><div class='head'>diff --git a/arch/hexagon/lib/io.c b/arch/hexagon/lib/io.c<br/>deleted file mode 100644<br/>index 55f75392857b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/lib/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/lib/io.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,82 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * I/O access functions for Hexagon</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-/*  These are all FIFO routines!  */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __raw_readsw - read words a short at a time</div><div class='del'>- * @addr:  source address</div><div class='del'>- * @data:  data address</div><div class='del'>- * @len: number of shorts to read</div><div class='del'>- */</div><div class='del'>-void __raw_readsw(const void __iomem *addr, void *data, int len)</div><div class='del'>-{</div><div class='del'>-	const volatile short int *src = (short int *) addr;</div><div class='del'>-	short int *dst = (short int *) data;</div><div class='del'>-</div><div class='del'>-	if ((u32)data &amp; 0x1)</div><div class='del'>-		panic("unaligned pointer to readsw");</div><div class='del'>-</div><div class='del'>-	while (len-- &gt; 0)</div><div class='del'>-		*dst++ = *src;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__raw_readsw);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __raw_writesw - read words a short at a time</div><div class='del'>- * @addr:  source address</div><div class='del'>- * @data:  data address</div><div class='del'>- * @len: number of shorts to read</div><div class='del'>- */</div><div class='del'>-void __raw_writesw(void __iomem *addr, const void *data, int len)</div><div class='del'>-{</div><div class='del'>-	const short int *src = (short int *)data;</div><div class='del'>-	volatile short int *dst = (short int *)addr;</div><div class='del'>-</div><div class='del'>-	if ((u32)data &amp; 0x1)</div><div class='del'>-		panic("unaligned pointer to writesw");</div><div class='del'>-</div><div class='del'>-	while (len-- &gt; 0)</div><div class='del'>-		*dst = *src++;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__raw_writesw);</div><div class='del'>-</div><div class='del'>-/*  Pretty sure len is pre-adjusted for the length of the access already */</div><div class='del'>-void __raw_readsl(const void __iomem *addr, void *data, int len)</div><div class='del'>-{</div><div class='del'>-	const volatile long *src = (long *) addr;</div><div class='del'>-	long *dst = (long *) data;</div><div class='del'>-</div><div class='del'>-	if ((u32)data &amp; 0x3)</div><div class='del'>-		panic("unaligned pointer to readsl");</div><div class='del'>-</div><div class='del'>-	while (len-- &gt; 0)</div><div class='del'>-		*dst++ = *src;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__raw_readsl);</div><div class='del'>-</div><div class='del'>-void __raw_writesl(void __iomem *addr, const void *data, int len)</div><div class='del'>-{</div><div class='del'>-	const long *src = (long *)data;</div><div class='del'>-	volatile long *dst = (long *)addr;</div><div class='del'>-</div><div class='del'>-	if ((u32)data &amp; 0x3)</div><div class='del'>-		panic("unaligned pointer to writesl");</div><div class='del'>-</div><div class='del'>-	while (len-- &gt; 0)</div><div class='del'>-		*dst = *src++;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__raw_writesl);</div><div class='head'>diff --git a/arch/hexagon/mm/init.c b/arch/hexagon/mm/init.c<br/>index 3458f39ca2ac..34eb9d424b96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/hexagon/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/hexagon/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/hexagon/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/hexagon/mm/init.c</a></div><div class='hunk'>@@ -43,32 +43,6 @@ DEFINE_SPINLOCK(kmap_gen_lock);</div><div class='ctx'> /*  checkpatch says don't init this to 0.  */</div><div class='ctx'> unsigned long long kmap_generation;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * mem_init - initializes memory</div><div class='del'>- *</div><div class='del'>- * Frees up bootmem</div><div class='del'>- * Fixes up more stuff for HIGHMEM</div><div class='del'>- * Calculates and displays memory available/used</div><div class='del'>- */</div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	/*  No idea where this is actually declared.  Seems to evade LXR.  */</div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *  To-Do:  someone somewhere should wipe out the bootmem map</div><div class='del'>-	 *  after we're done?</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This can be moved to some more virtual-memory-specific</div><div class='del'>-	 * initialization hook at some point.  Set the init_mm</div><div class='del'>-	 * descriptors "context" value to point to the initial</div><div class='del'>-	 * kernel segment table's physical address.</div><div class='del'>-	 */</div><div class='del'>-	init_mm.context.ptbase = __pa(init_mm.pgd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void sync_icache_dcache(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr;</div><div class='hunk'>@@ -104,10 +78,10 @@ static void __init paging_init(void)</div><div class='ctx'> 	free_area_init(max_zone_pfn);  /*  sets up the zonelists and mem_map  */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Start of high memory area.  Will probably need something more</div><div class='del'>-	 * fancy if we...  get more fancy.</div><div class='add'>+	 * Set the init_mm descriptors "context" value to point to the</div><div class='add'>+	 * initial kernel segment table's physical address.</div><div class='ctx'> 	 */</div><div class='del'>-	high_memory = (void *)((bootmem_lastpg + 1) &lt;&lt; PAGE_SHIFT);</div><div class='add'>+	init_mm.context.ptbase = __pa(init_mm.pgd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef DMA_RESERVE</div><div class='head'>diff --git a/arch/loongarch/Kbuild b/arch/loongarch/Kbuild<br/>index bfa21465d83a..beb8499dd8ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/Kbuild</a></div><div class='hunk'>@@ -4,7 +4,6 @@ obj-y += net/</div><div class='ctx'> obj-y += vdso/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KVM) += kvm/</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB) += boot/dts/</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='ctx'> subdir- += boot</div><div class='head'>diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig<br/>index bb35c34f86d2..5b1116733d88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/Kconfig</a></div><div class='hunk'>@@ -9,6 +9,7 @@ config LOONGARCH</div><div class='ctx'> 	select ACPI_PPTT if ACPI</div><div class='ctx'> 	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI</div><div class='ctx'> 	select ARCH_BINFMT_ELF_STATE</div><div class='add'>+	select ARCH_NEEDS_DEFER_KASAN</div><div class='ctx'> 	select ARCH_DISABLE_KASAN_INLINE</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTPLUG</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTREMOVE</div><div class='hunk'>@@ -23,11 +24,13 @@ config LOONGARCH</div><div class='ctx'> 	select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU</div><div class='ctx'> 	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS</div><div class='ctx'> 	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE</div><div class='del'>-	select ARCH_HAS_PTE_DEVMAP</div><div class='add'>+	select ARCH_HAS_PREEMPT_LAZY</div><div class='ctx'> 	select ARCH_HAS_PTE_SPECIAL</div><div class='ctx'> 	select ARCH_HAS_SET_MEMORY</div><div class='ctx'> 	select ARCH_HAS_SET_DIRECT_MAP</div><div class='ctx'> 	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST</div><div class='add'>+	select ARCH_HAS_UBSAN</div><div class='add'>+	select ARCH_HAS_VDSO_ARCH_DATA</div><div class='ctx'> 	select ARCH_INLINE_READ_LOCK if !PREEMPTION</div><div class='ctx'> 	select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION</div><div class='ctx'> 	select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION</div><div class='hunk'>@@ -65,9 +68,15 @@ config LOONGARCH</div><div class='ctx'> 	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128</div><div class='ctx'> 	select ARCH_SUPPORTS_LTO_CLANG</div><div class='ctx'> 	select ARCH_SUPPORTS_LTO_CLANG_THIN</div><div class='add'>+	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS</div><div class='ctx'> 	select ARCH_SUPPORTS_NUMA_BALANCING</div><div class='add'>+	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='add'>+	select ARCH_SUPPORTS_RT</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT if SMP</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC  if SMP</div><div class='ctx'> 	select ARCH_USE_BUILTIN_BSWAP</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF</div><div class='add'>+	select ARCH_USE_MEMTEST</div><div class='ctx'> 	select ARCH_USE_QUEUED_RWLOCKS</div><div class='ctx'> 	select ARCH_USE_QUEUED_SPINLOCKS</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_BPF_JIT</div><div class='hunk'>@@ -79,6 +88,7 @@ config LOONGARCH</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select CPU_PM</div><div class='add'>+	select EDAC_SUPPORT</div><div class='ctx'> 	select EFI</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GENERIC_CMOS_UPDATE</div><div class='hunk'>@@ -102,7 +112,6 @@ config LOONGARCH</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_TIME_VSYSCALL</div><div class='del'>-	select GENERIC_VDSO_TIME_NS</div><div class='ctx'> 	select GPIOLIB</div><div class='ctx'> 	select HAS_IOPORT</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL</div><div class='hunk'>@@ -111,6 +120,7 @@ config LOONGARCH</div><div class='ctx'> 	select HAVE_ARCH_KASAN</div><div class='ctx'> 	select HAVE_ARCH_KFENCE</div><div class='ctx'> 	select HAVE_ARCH_KGDB if PERF_EVENTS</div><div class='add'>+	select HAVE_ARCH_KSTACK_ERASE</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_BITS if MMU</div><div class='ctx'> 	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP</div><div class='hunk'>@@ -126,16 +136,18 @@ config LOONGARCH</div><div class='ctx'> 	select HAVE_DMA_CONTIGUOUS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_ARGS</div><div class='add'>+	select HAVE_FTRACE_REGS_HAVING_PT_REGS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS</div><div class='ctx'> 	select HAVE_EBPF_JIT</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN</div><div class='ctx'> 	select HAVE_EXIT_THREAD</div><div class='add'>+	select HAVE_GENERIC_TIF_BITS</div><div class='ctx'> 	select HAVE_GUP_FAST</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='add'>+	select HAVE_FTRACE_GRAPH_FUNC</div><div class='ctx'> 	select HAVE_FUNCTION_ARG_ACCESS_API</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FREGS</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_GCC_PLUGINS</div><div class='hunk'>@@ -155,6 +167,7 @@ config LOONGARCH</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='ctx'> 	select HAVE_PERF_REGS</div><div class='ctx'> 	select HAVE_PERF_USER_STACK_DUMP</div><div class='add'>+	select HAVE_POSIX_CPU_TIMERS_TASK_WORK</div><div class='ctx'> 	select HAVE_PREEMPT_DYNAMIC_KEY</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC</div><div class='hunk'>@@ -168,7 +181,7 @@ config LOONGARCH</div><div class='ctx'> 	select HAVE_STACKPROTECTOR</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select HAVE_TIF_NOHZ</div><div class='del'>-	select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP</div><div class='add'>+	select HAVE_VIRT_CPU_ACCOUNTING_GEN</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='ctx'> 	select IRQ_LOONGARCH_CPU</div><div class='ctx'> 	select LOCK_MM_AND_FIND_VMA</div><div class='hunk'>@@ -176,6 +189,7 @@ config LOONGARCH</div><div class='ctx'> 	select MODULES_USE_ELF_RELA if MODULES</div><div class='ctx'> 	select NEED_PER_CPU_EMBED_FIRST_CHUNK</div><div class='ctx'> 	select NEED_PER_CPU_PAGE_FIRST_CHUNK</div><div class='add'>+	select NUMA_MEMBLKS if NUMA</div><div class='ctx'> 	select OF</div><div class='ctx'> 	select OF_EARLY_FLATTREE</div><div class='ctx'> 	select PCI</div><div class='hunk'>@@ -242,7 +256,7 @@ config MACH_LOONGSON64</div><div class='ctx'> 	def_bool 64BIT</div><div class='ctx'> </div><div class='ctx'> config FIX_EARLYCON_MEM</div><div class='del'>-	def_bool y</div><div class='add'>+	def_bool !ARCH_IOREMAP</div><div class='ctx'> </div><div class='ctx'> config PGTABLE_2LEVEL</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -284,6 +298,13 @@ config AS_HAS_LBT_EXTENSION</div><div class='ctx'> config AS_HAS_LVZ_EXTENSION</div><div class='ctx'> 	def_bool $(as-instr,hvcl 0)</div><div class='ctx'> </div><div class='add'>+config CC_HAS_ANNOTATE_TABLEJUMP</div><div class='add'>+	def_bool $(cc-option,-mannotate-tablejump)</div><div class='add'>+</div><div class='add'>+config RUSTC_HAS_ANNOTATE_TABLEJUMP</div><div class='add'>+	depends on RUST</div><div class='add'>+	def_bool $(rustc-option,-Cllvm-args=--loongarch-annotate-tablejump)</div><div class='add'>+</div><div class='ctx'> menu "Kernel type and options"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='hunk'>@@ -375,8 +396,8 @@ config CMDLINE_BOOTLOADER</div><div class='ctx'> config CMDLINE_EXTEND</div><div class='ctx'> 	bool "Use built-in to extend bootloader kernel arguments"</div><div class='ctx'> 	help</div><div class='del'>-	  The command-line arguments provided during boot will be</div><div class='del'>-	  appended to the built-in command line. This is useful in</div><div class='add'>+	  The built-in command line will be appended to the command-</div><div class='add'>+	  line arguments provided during boot. This is useful in</div><div class='ctx'> 	  cases where the provided arguments are insufficient and</div><div class='ctx'> 	  you don't want to or cannot modify them.</div><div class='ctx'> </div><div class='hunk'>@@ -393,6 +414,7 @@ endchoice</div><div class='ctx'> config BUILTIN_DTB</div><div class='ctx'> 	bool "Enable built-in dtb in kernel"</div><div class='ctx'> 	depends on OF</div><div class='add'>+	select GENERIC_BUILTIN_DTB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Some existing systems do not provide a canonical device tree to</div><div class='ctx'> 	  the kernel at boot time. Let's provide a device tree table in the</div><div class='hunk'>@@ -433,14 +455,6 @@ config EFI_STUB</div><div class='ctx'> 	  This kernel feature allows the kernel to be loaded directly by</div><div class='ctx'> 	  EFI firmware without the use of a bootloader.</div><div class='ctx'> </div><div class='del'>-config SCHED_SMT</div><div class='del'>-	bool "SMT scheduler support"</div><div class='del'>-	depends on SMP</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Improves scheduler's performance when there are multiple</div><div class='del'>-	  threads in one physical core.</div><div class='del'>-</div><div class='ctx'> config SMP</div><div class='ctx'> 	bool "Multi-Processing support"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -470,10 +484,10 @@ config HOTPLUG_CPU</div><div class='ctx'> 	  Say N if you want to disable CPU hotplug.</div><div class='ctx'> </div><div class='ctx'> config NR_CPUS</div><div class='del'>-	int "Maximum number of CPUs (2-256)"</div><div class='del'>-	range 2 256</div><div class='add'>+	int "Maximum number of CPUs (2-2048)"</div><div class='add'>+	range 2 2048</div><div class='add'>+	default "2048"</div><div class='ctx'> 	depends on SMP</div><div class='del'>-	default "64"</div><div class='ctx'> 	help</div><div class='ctx'> 	  This allows you to specify the maximum number of CPUs which this</div><div class='ctx'> 	  kernel will support.</div><div class='hunk'>@@ -539,10 +553,14 @@ config ARCH_STRICT_ALIGN</div><div class='ctx'> 	  -mstrict-align build parameter to prevent unaligned accesses.</div><div class='ctx'> </div><div class='ctx'> 	  CPUs with h/w unaligned access support:</div><div class='del'>-	  Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.</div><div class='add'>+	  Loongson-2K2000/2K3000 and all of Loongson-3 series processors</div><div class='add'>+	  based on LoongArch.</div><div class='ctx'> </div><div class='ctx'> 	  CPUs without h/w unaligned access support:</div><div class='del'>-	  Loongson-2K500/2K1000.</div><div class='add'>+	  Loongson-2K0300/2K0500/2K1000.</div><div class='add'>+</div><div class='add'>+	  If you want to make sure whether to support unaligned memory access</div><div class='add'>+	  on your hardware, please read the bit 20 (UAL) of CPUCFG1 register.</div><div class='ctx'> </div><div class='ctx'> 	  This option is enabled by default to make the kernel be able to run</div><div class='ctx'> 	  on all LoongArch systems. But you can disable it manually if you want</div><div class='hunk'>@@ -601,9 +619,22 @@ config CPU_HAS_PREFETCH</div><div class='ctx'> config ARCH_SUPPORTS_KEXEC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_SUPPORTS_KEXEC_FILE</div><div class='add'>+	def_bool 64BIT</div><div class='add'>+</div><div class='add'>+config ARCH_SELECTS_KEXEC_FILE</div><div class='add'>+	def_bool 64BIT</div><div class='add'>+	depends on KEXEC_FILE</div><div class='add'>+	select KEXEC_ELF</div><div class='add'>+	select RELOCATABLE</div><div class='add'>+	select HAVE_IMA_KEXEC if IMA</div><div class='add'>+</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config ARCH_SELECTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on CRASH_DUMP</div><div class='head'>diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile<br/>index ae3f80622f4c..dc5bd3f1b8d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/Makefile</a></div><div class='hunk'>@@ -59,7 +59,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_64BIT</div><div class='ctx'> ld-emul			= $(64bit-emul)</div><div class='del'>-cflags-y		+= -mabi=lp64s</div><div class='add'>+cflags-y		+= -mabi=lp64s -mcmodel=normal</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> cflags-y			+= -pipe $(CC_FLAGS_NO_FPU)</div><div class='hunk'>@@ -101,10 +101,25 @@ KBUILD_AFLAGS			+= $(call cc-option,-mthin-add-sub) $(call cc-option,-Wa$(comma)</div><div class='ctx'> KBUILD_CFLAGS			+= $(call cc-option,-mthin-add-sub) $(call cc-option,-Wa$(comma)-mthin-add-sub)</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_OBJTOOL</div><div class='del'>-KBUILD_CFLAGS			+= -fno-jump-tables</div><div class='add'>+ifdef CONFIG_CC_HAS_ANNOTATE_TABLEJUMP</div><div class='add'>+KBUILD_CFLAGS			+= -mannotate-tablejump</div><div class='add'>+else</div><div class='add'>+KBUILD_CFLAGS			+= -fno-jump-tables # keep compatibility with older compilers</div><div class='add'>+endif</div><div class='add'>+ifdef CONFIG_RUSTC_HAS_ANNOTATE_TABLEJUMP</div><div class='add'>+KBUILD_RUSTFLAGS		+= -Cllvm-args=--loongarch-annotate-tablejump</div><div class='add'>+else</div><div class='add'>+KBUILD_RUSTFLAGS		+= -Zno-jump-tables # keep compatibility with older compilers</div><div class='add'>+endif</div><div class='add'>+ifdef CONFIG_LTO_CLANG</div><div class='add'>+# The annotate-tablejump option can not be passed to LLVM backend when LTO is enabled.</div><div class='add'>+# Ensure it is aware of linker with LTO, '--loongarch-annotate-tablejump' also needs to</div><div class='add'>+# be passed via '-mllvm' to ld.lld.</div><div class='add'>+KBUILD_LDFLAGS			+= $(call ld-option,-mllvm --loongarch-annotate-tablejump)</div><div class='add'>+endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-KBUILD_RUSTFLAGS		+= --target=loongarch64-unknown-none-softfloat</div><div class='add'>+KBUILD_RUSTFLAGS		+= --target=loongarch64-unknown-none-softfloat -Ccode-model=small</div><div class='ctx'> KBUILD_RUSTFLAGS_KERNEL		+= -Zdirect-access-external-data=yes</div><div class='ctx'> KBUILD_RUSTFLAGS_MODULE		+= -Zdirect-access-external-data=no</div><div class='ctx'> </div><div class='hunk'>@@ -114,7 +129,7 @@ KBUILD_RUSTFLAGS_KERNEL		+= -Crelocation-model=pie</div><div class='ctx'> LDFLAGS_vmlinux			+= -static -pie --no-dynamic-linker -z notext $(call ld-option, --apply-dynamic-relocs)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-cflags-y += $(call cc-option, -mno-check-zero-division)</div><div class='add'>+cflags-y += $(call cc-option, -mno-check-zero-division -fno-isolate-erroneous-paths-dereference)</div><div class='ctx'> </div><div class='ctx'> ifndef CONFIG_KASAN</div><div class='ctx'> cflags-y += -fno-builtin-memcpy -fno-builtin-memmove -fno-builtin-memset</div><div class='hunk'>@@ -177,11 +192,14 @@ vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@</div><div class='ctx'> </div><div class='ctx'> install:</div><div class='del'>-	$(Q)install -D -m 755 $(KBUILD_IMAGE) $(INSTALL_PATH)/$(image-name-y)-$(KERNELRELEASE)</div><div class='del'>-	$(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)</div><div class='del'>-	$(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)</div><div class='add'>+	$(call cmd,install)</div><div class='ctx'> </div><div class='ctx'> define archhelp</div><div class='del'>-	echo '  install              - install kernel into $(INSTALL_PATH)'</div><div class='add'>+	echo '  vmlinux.elf    - Uncompressed ELF kernel image (arch/loongarch/boot/vmlinux.elf)'</div><div class='add'>+	echo '  vmlinux.efi    - Uncompressed EFI kernel image (arch/loongarch/boot/vmlinux.efi)'</div><div class='add'>+	echo '  vmlinuz.efi    - GZIP/ZSTD-compressed EFI kernel image (arch/loongarch/boot/vmlinuz.efi)'</div><div class='add'>+	echo '                   Default when CONFIG_EFI_ZBOOT=y'</div><div class='add'>+	echo '  install        - Install kernel using (your) ~/bin/$(INSTALLKERNEL) or'</div><div class='add'>+	echo '                   (distribution) /sbin/$(INSTALLKERNEL) or install.sh to $$(INSTALL_PATH)'</div><div class='ctx'> 	echo</div><div class='ctx'> endef</div><div class='head'>diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile<br/>index 747d0c3f6389..15d5e14fe418 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='ctx'> dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))</div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts<br/>index a34734a6c3ce..018ed904352a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k0500-ref.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k0500-ref.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k0500-ref.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k0500-ref.dts</a></div><div class='hunk'>@@ -41,6 +41,15 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;apbdma3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gmac0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k0500.dtsi b/arch/loongarch/boot/dts/loongson-2k0500.dtsi<br/>index 3b38ff8853a7..588ebc3bded4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k0500.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k0500.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k0500.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k0500.dtsi</a></div><div class='hunk'>@@ -104,7 +104,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma-controller@1fe10c20 {</div><div class='add'>+		apbdma2: dma-controller@1fe10c20 {</div><div class='ctx'> 			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";</div><div class='ctx'> 			reg = &lt;0 0x1fe10c20 0 0x8&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;eiointc&gt;;</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma-controller@1fe10c30 {</div><div class='add'>+		apbdma3: dma-controller@1fe10c30 {</div><div class='ctx'> 			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";</div><div class='ctx'> 			reg = &lt;0 0x1fe10c30 0 0x8&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;eiointc&gt;;</div><div class='hunk'>@@ -169,6 +169,166 @@</div><div class='ctx'> 			interrupts = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pwm@1ff5c000 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c000 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c010 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c010 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c020 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c020 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c030 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c030 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c040 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c040 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c050 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c050 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c060 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c060 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c070 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c070 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c080 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c080 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c090 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c090 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0a0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0a0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0b0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0b0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0c0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0c0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0d0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0d0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0e0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0e0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1ff5c0f0 {</div><div class='add'>+			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1ff5c0f0 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gmac0: ethernet@1f020000 {</div><div class='ctx'> 			compatible = "snps,dwmac-3.70a";</div><div class='ctx'> 			reg = &lt;0x0 0x1f020000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -277,6 +437,30 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		mmc0: mmc@1ff64000 {</div><div class='add'>+			compatible = "loongson,ls2k0500-mmc";</div><div class='add'>+			reg = &lt;0 0x1ff64000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x1fe10100 0 0x4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;eiointc&gt;;</div><div class='add'>+			interrupts = &lt;57&gt;;</div><div class='add'>+			dmas = &lt;&amp;apbdma3 0&gt;;</div><div class='add'>+			dma-names = "rx-tx";</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc@1ff66000 {</div><div class='add'>+			compatible = "loongson,ls2k0500-mmc";</div><div class='add'>+			reg = &lt;0 0x1ff66000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x1fe10100 0 0x4&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;eiointc&gt;;</div><div class='add'>+			interrupts = &lt;58&gt;;</div><div class='add'>+			dmas = &lt;&amp;apbdma2 0&gt;;</div><div class='add'>+			dma-names = "rx-tx";</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc: power-management@1ff6c000 {</div><div class='ctx'> 			compatible = "loongson,ls2k0500-pmc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x1ff6c000 0x0 0x58&gt;;</div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k1000-ref.dts b/arch/loongarch/boot/dts/loongson-2k1000-ref.dts<br/>index 23cf26cc3e5f..d9a452ada5d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k1000-ref.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k1000-ref.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k1000-ref.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k1000-ref.dts</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='add'>+#include "dt-bindings/thermal/thermal.h"</div><div class='ctx'> #include "loongson-2k1000.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='hunk'>@@ -38,6 +39,26 @@</div><div class='ctx'> 			linux,cma-default;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	fan0: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;255 153 85 25&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm1 0 100000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apbdma1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdio_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio0 22 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac0 {</div><div class='hunk'>@@ -90,10 +111,21 @@</div><div class='ctx'> </div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;0&gt;;</div><div class='del'>-	spidev@0 {</div><div class='del'>-		compatible = "rohm,dh2228fv";</div><div class='del'>-		spi-max-frequency = &lt;100000000&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pinctrl-0 = &lt;&amp;pwm1_pins_default&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu_thermal {</div><div class='add'>+	cooling-maps {</div><div class='add'>+		map0 {</div><div class='add'>+			trip = &lt;&amp;cpu_alert&gt;;</div><div class='add'>+			cooling-device = &lt;&amp;fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k1000.dtsi b/arch/loongarch/boot/dts/loongson-2k1000.dtsi<br/>index 92180140eb56..d8e01e2534dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k1000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k1000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k1000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k1000.dtsi</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	thermal-zones {</div><div class='del'>-		cpu-thermal {</div><div class='add'>+		cpu_thermal: cpu-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;1000&gt;;</div><div class='ctx'> 			polling-delay = &lt;5000&gt;;</div><div class='ctx'> 			thermal-sensors = &lt;&amp;tsensor 0&gt;;</div><div class='hunk'>@@ -187,14 +187,14 @@</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;&gt;,</div><div class='del'>-				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;0 IRQ_TYPE_NONE&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;26 IRQ_TYPE_NONE&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -209,13 +209,13 @@</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;&gt;,</div><div class='add'>+				     &lt;0 IRQ_TYPE_NONE&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				     &lt;&gt;,</div><div class='del'>-				     &lt;&gt;,</div><div class='add'>+				     &lt;0 IRQ_TYPE_NONE&gt;,</div><div class='add'>+				     &lt;0 IRQ_TYPE_NONE&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'> 				     &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='hunk'>@@ -256,7 +256,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma-controller@1fe00c10 {</div><div class='add'>+		apbdma1: dma-controller@1fe00c10 {</div><div class='ctx'> 			compatible = "loongson,ls2k1000-apbdma";</div><div class='ctx'> 			reg = &lt;0x0 0x1fe00c10 0x0 0x8&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;liointc1&gt;;</div><div class='hunk'>@@ -266,7 +266,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma-controller@1fe00c20 {</div><div class='add'>+		apbdma2: dma-controller@1fe00c20 {</div><div class='ctx'> 			compatible = "loongson,ls2k1000-apbdma";</div><div class='ctx'> 			reg = &lt;0x0 0x1fe00c20 0x0 0x8&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;liointc1&gt;;</div><div class='hunk'>@@ -276,7 +276,7 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dma-controller@1fe00c30 {</div><div class='add'>+		apbdma3: dma-controller@1fe00c30 {</div><div class='ctx'> 			compatible = "loongson,ls2k1000-apbdma";</div><div class='ctx'> 			reg = &lt;0x0 0x1fe00c30 0x0 0x8&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;liointc1&gt;;</div><div class='hunk'>@@ -322,6 +322,46 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pwm@1fe22000 {</div><div class='add'>+			compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1fe22000 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm1: pwm@1fe22010 {</div><div class='add'>+			compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1fe22010 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1fe22020 {</div><div class='add'>+			compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1fe22020 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@1fe22030 {</div><div class='add'>+			compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x1fe22030 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pmc: power-management@1fe27000 {</div><div class='ctx'> 			compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x1fe27000 0x0 0x58&gt;;</div><div class='hunk'>@@ -352,6 +392,31 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		i2s: i2s@1fe2d000 {</div><div class='add'>+			compatible = "loongson,ls2k1000-i2s";</div><div class='add'>+			reg = &lt;0 0x1fe2d000 0 0x14&gt;,</div><div class='add'>+			      &lt;0 0x1fe00438 0 0x8&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;apbdma2 0&gt;, &lt;&amp;apbdma3 0&gt;;</div><div class='add'>+			dma-names = "tx", "rx";</div><div class='add'>+			#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc: mmc@1fe2c000 {</div><div class='add'>+			compatible = "loongson,ls2k1000-mmc";</div><div class='add'>+			reg = &lt;0 0x1fe2c000 0 0x68&gt;,</div><div class='add'>+			      &lt;0 0x1fe00438 0 0x8&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+			interrupts = &lt;31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+			dmas = &lt;&amp;apbdma1 0&gt;;</div><div class='add'>+			dma-names = "rx-tx";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		spi0: spi@1fff0220 {</div><div class='ctx'> 			compatible = "loongson,ls2k1000-spi";</div><div class='ctx'> 			reg = &lt;0x0 0x1fff0220 0x0 0x10&gt;;</div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k2000-ref.dts b/arch/loongarch/boot/dts/loongson-2k2000-ref.dts<br/>index ea9e6985d0e9..3c6b12220386 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k2000-ref.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k2000-ref.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k2000-ref.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k2000-ref.dts</a></div><div class='hunk'>@@ -39,6 +39,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;emmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sata {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/loongarch/boot/dts/loongson-2k2000.dtsi b/arch/loongarch/boot/dts/loongson-2k2000.dtsi<br/>index 0953c5707825..00cc485b753b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k2000.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/boot/dts/loongson-2k2000.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/dts/loongson-2k2000.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/dts/loongson-2k2000.dtsi</a></div><div class='hunk'>@@ -165,6 +165,66 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;eiointc&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pwm@100a0000 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0000 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@100a0100 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0100 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@100a0200 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0200 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@100a0300 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0300 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@100a0400 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0400 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm@100a0500 {</div><div class='add'>+			compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+			reg = &lt;0x0 0x100a0500 0x0 0x10&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_MISC_CLK&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rtc0: rtc@100d0100 {</div><div class='ctx'> 			compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";</div><div class='ctx'> 			reg = &lt;0x0 0x100d0100 0x0 0x100&gt;;</div><div class='hunk'>@@ -173,6 +233,22 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		i2c@1fe00120 {</div><div class='add'>+			compatible = "loongson,ls2k-i2c";</div><div class='add'>+			reg = &lt;0x0 0x1fe00120 0x0 0x8&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc&gt;;</div><div class='add'>+			interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1fe00130 {</div><div class='add'>+			compatible = "loongson,ls2k-i2c";</div><div class='add'>+			reg = &lt;0x0 0x1fe00130 0x0 0x8&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;liointc&gt;;</div><div class='add'>+			interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@1fe001e0 {</div><div class='ctx'> 			compatible = "ns16550a";</div><div class='ctx'> 			reg = &lt;0x0 0x1fe001e0 0x0 0x10&gt;;</div><div class='hunk'>@@ -183,6 +259,24 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		emmc: mmc@79990000 {</div><div class='add'>+			compatible = "loongson,ls2k2000-mmc";</div><div class='add'>+			reg = &lt;0x0 0x79990000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_EMMC_CLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc@79991000 {</div><div class='add'>+			compatible = "loongson,ls2k2000-mmc";</div><div class='add'>+			reg = &lt;0x0 0x79991000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;pic&gt;;</div><div class='add'>+			interrupts = &lt;50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk LOONGSON2_EMMC_CLK&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pcie@1a000000 {</div><div class='ctx'> 			compatible = "loongson,ls2k-pci";</div><div class='ctx'> 			reg = &lt;0x0 0x1a000000 0x0 0x02000000&gt;,</div><div class='hunk'>@@ -243,9 +337,11 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			hda@7,0 {</div><div class='add'>+			i2s@7,0 {</div><div class='ctx'> 				reg = &lt;0x3800 0x0 0x0 0x0 0x0&gt;;</div><div class='del'>-				interrupts = &lt;58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+					     &lt;79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-names = "tx", "rx";</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/loongarch/boot/install.sh b/arch/loongarch/boot/install.sh<br/>new file mode 100755<br/>index 000000000000..daac197d3315<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/boot/install.sh?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/boot/install.sh</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+#!/bin/sh</div><div class='add'>+#</div><div class='add'>+# This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+# License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+# for more details.</div><div class='add'>+#</div><div class='add'>+# Copyright (C) 1995 by Linus Torvalds</div><div class='add'>+#</div><div class='add'>+# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin</div><div class='add'>+# Adapted from code in arch/i386/boot/install.sh by Russell King</div><div class='add'>+#</div><div class='add'>+# "make install" script for the LoongArch Linux port</div><div class='add'>+#</div><div class='add'>+# Arguments:</div><div class='add'>+#   $1 - kernel version</div><div class='add'>+#   $2 - kernel image file</div><div class='add'>+#   $3 - kernel map file</div><div class='add'>+#   $4 - default install path (blank if root directory)</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+case "${2##*/}" in</div><div class='add'>+vmlinux.elf)</div><div class='add'>+  echo "Installing uncompressed vmlinux.elf kernel"</div><div class='add'>+  base=vmlinux</div><div class='add'>+  ;;</div><div class='add'>+vmlinux.efi)</div><div class='add'>+  echo "Installing uncompressed vmlinux.efi kernel"</div><div class='add'>+  base=vmlinux</div><div class='add'>+  ;;</div><div class='add'>+vmlinuz.efi)</div><div class='add'>+  echo "Installing gzip/zstd compressed vmlinuz.efi kernel"</div><div class='add'>+  base=vmlinuz</div><div class='add'>+  ;;</div><div class='add'>+*)</div><div class='add'>+ echo "Warning: Unexpected kernel type"</div><div class='add'>+ exit 1</div><div class='add'>+ ;;</div><div class='add'>+esac</div><div class='add'>+</div><div class='add'>+if [ -f $4/$base-$1 ]; then</div><div class='add'>+  mv $4/$base-$1 $4/$base-$1.old</div><div class='add'>+fi</div><div class='add'>+cat $2 &gt; $4/$base-$1</div><div class='add'>+</div><div class='add'>+# Install system map file</div><div class='add'>+if [ -f $4/System.map-$1 ]; then</div><div class='add'>+  mv $4/System.map-$1 $4/System.map-$1.old</div><div class='add'>+fi</div><div class='add'>+cp $3 $4/System.map-$1</div><div class='add'>+</div><div class='add'>+# Install kernel config file</div><div class='add'>+if [ -f $4/config-$1 ]; then</div><div class='add'>+  mv $4/config-$1 $4/config-$1.old</div><div class='add'>+fi</div><div class='add'>+cp .config $4/config-$1</div><div class='head'>diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig<br/>index 75b366407a60..3e838c229cd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/configs/loongson3_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/configs/loongson3_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/configs/loongson3_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/configs/loongson3_defconfig</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> # CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_KERNEL_ZSTD=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_POSIX_MQUEUE=y</div><div class='ctx'> CONFIG_NO_HZ=y</div><div class='hunk'>@@ -23,9 +24,9 @@ CONFIG_NUMA_BALANCING=y</div><div class='ctx'> CONFIG_MEMCG=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='ctx'> CONFIG_CFS_BANDWIDTH=y</div><div class='del'>-CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUP_PIDS=y</div><div class='ctx'> CONFIG_CGROUP_RDMA=y</div><div class='add'>+CONFIG_CGROUP_DMEM=y</div><div class='ctx'> CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_HUGETLB=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='hunk'>@@ -44,6 +45,7 @@ CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='ctx'> CONFIG_KEXEC=y</div><div class='add'>+CONFIG_KEXEC_FILE=y</div><div class='ctx'> CONFIG_CRASH_DUMP=y</div><div class='ctx'> CONFIG_LOONGARCH=y</div><div class='ctx'> CONFIG_64BIT=y</div><div class='hunk'>@@ -54,7 +56,7 @@ CONFIG_DMI=y</div><div class='ctx'> CONFIG_EFI=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_HOTPLUG_CPU=y</div><div class='del'>-CONFIG_NR_CPUS=256</div><div class='add'>+CONFIG_NR_CPUS=2048</div><div class='ctx'> CONFIG_NUMA=y</div><div class='ctx'> CONFIG_CPU_HAS_FPU=y</div><div class='ctx'> CONFIG_CPU_HAS_LSX=y</div><div class='hunk'>@@ -70,6 +72,14 @@ CONFIG_ACPI_IPMI=m</div><div class='ctx'> CONFIG_ACPI_HOTPLUG_CPU=y</div><div class='ctx'> CONFIG_ACPI_PCI_SLOT=y</div><div class='ctx'> CONFIG_ACPI_HOTPLUG_MEMORY=y</div><div class='add'>+CONFIG_ACPI_BGRT=y</div><div class='add'>+CONFIG_CPU_FREQ=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_USERSPACE=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_ONDEMAND=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y</div><div class='add'>+CONFIG_LOONGSON3_CPUFREQ=m</div><div class='ctx'> CONFIG_VIRTUALIZATION=y</div><div class='ctx'> CONFIG_KVM=m</div><div class='ctx'> CONFIG_JUMP_LABEL=y</div><div class='hunk'>@@ -78,6 +88,9 @@ CONFIG_MODULE_FORCE_LOAD=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_MODULE_FORCE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='add'>+CONFIG_MODULE_COMPRESS=y</div><div class='add'>+CONFIG_MODULE_COMPRESS_ZSTD=y</div><div class='add'>+CONFIG_MODULE_DECOMPRESS=y</div><div class='ctx'> CONFIG_BLK_DEV_ZONED=y</div><div class='ctx'> CONFIG_BLK_DEV_THROTTLING=y</div><div class='ctx'> CONFIG_BLK_WBT=y</div><div class='hunk'>@@ -85,6 +98,8 @@ CONFIG_BLK_CGROUP_IOLATENCY=y</div><div class='ctx'> CONFIG_BLK_CGROUP_FC_APPID=y</div><div class='ctx'> CONFIG_BLK_CGROUP_IOCOST=y</div><div class='ctx'> CONFIG_BLK_CGROUP_IOPRIO=y</div><div class='add'>+CONFIG_BLK_INLINE_ENCRYPTION=y</div><div class='add'>+CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_BSD_DISKLABEL=y</div><div class='ctx'> CONFIG_UNIXWARE_DISKLABEL=y</div><div class='hunk'>@@ -92,14 +107,15 @@ CONFIG_CMDLINE_PARTITION=y</div><div class='ctx'> CONFIG_IOSCHED_BFQ=y</div><div class='ctx'> CONFIG_BFQ_GROUP_IOSCHED=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='del'>-CONFIG_ZPOOL=y</div><div class='ctx'> CONFIG_ZSWAP=y</div><div class='ctx'> CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y</div><div class='del'>-CONFIG_ZBUD=y</div><div class='del'>-CONFIG_ZSMALLOC=m</div><div class='add'>+CONFIG_ZSMALLOC=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_MEMORY_HOTPLUG=y</div><div class='del'>-CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y</div><div class='add'>+# CONFIG_MHP_DEFAULT_ONLINE_TYPE_OFFLINE is not set</div><div class='add'>+CONFIG_MHP_DEFAULT_ONLINE_TYPE_ONLINE_AUTO=y</div><div class='add'>+# CONFIG_MHP_DEFAULT_ONLINE_TYPE_ONLINE_KERNEL is not set</div><div class='add'>+# CONFIG_MHP_DEFAULT_ONLINE_TYPE_ONLINE_MOVABLE is not set</div><div class='ctx'> CONFIG_MEMORY_HOTREMOVE=y</div><div class='ctx'> CONFIG_KSM=y</div><div class='ctx'> CONFIG_TRANSPARENT_HUGEPAGE=y</div><div class='hunk'>@@ -139,7 +155,16 @@ CONFIG_INET_ESPINTCP=y</div><div class='ctx'> CONFIG_INET_IPCOMP=m</div><div class='ctx'> CONFIG_INET_UDP_DIAG=y</div><div class='ctx'> CONFIG_TCP_CONG_ADVANCED=y</div><div class='del'>-CONFIG_TCP_CONG_BBR=m</div><div class='add'>+CONFIG_TCP_CONG_BIC=y</div><div class='add'>+CONFIG_TCP_CONG_HSTCP=m</div><div class='add'>+CONFIG_TCP_CONG_HYBLA=m</div><div class='add'>+CONFIG_TCP_CONG_VEGAS=m</div><div class='add'>+CONFIG_TCP_CONG_NV=m</div><div class='add'>+CONFIG_TCP_CONG_SCALABLE=m</div><div class='add'>+CONFIG_TCP_CONG_VENO=m</div><div class='add'>+CONFIG_TCP_CONG_DCTCP=m</div><div class='add'>+CONFIG_TCP_CONG_CDG=m</div><div class='add'>+CONFIG_TCP_CONG_BBR=y</div><div class='ctx'> CONFIG_IPV6_ROUTER_PREF=y</div><div class='ctx'> CONFIG_IPV6_ROUTE_INFO=y</div><div class='ctx'> CONFIG_INET6_AH=m</div><div class='hunk'>@@ -209,7 +234,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CPU=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DSCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='hunk'>@@ -317,15 +341,33 @@ CONFIG_LLC2=m</div><div class='ctx'> CONFIG_NET_SCHED=y</div><div class='ctx'> CONFIG_NET_SCH_HTB=m</div><div class='ctx'> CONFIG_NET_SCH_PRIO=m</div><div class='add'>+CONFIG_NET_SCH_MULTIQ=m</div><div class='add'>+CONFIG_NET_SCH_RED=m</div><div class='add'>+CONFIG_NET_SCH_SFB=m</div><div class='ctx'> CONFIG_NET_SCH_SFQ=m</div><div class='ctx'> CONFIG_NET_SCH_TBF=m</div><div class='add'>+CONFIG_NET_SCH_CBS=m</div><div class='add'>+CONFIG_NET_SCH_GRED=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='add'>+CONFIG_NET_SCH_MQPRIO=m</div><div class='add'>+CONFIG_NET_SCH_SKBPRIO=m</div><div class='add'>+CONFIG_NET_SCH_QFQ=m</div><div class='add'>+CONFIG_NET_SCH_CODEL=m</div><div class='add'>+CONFIG_NET_SCH_FQ_CODEL=m</div><div class='add'>+CONFIG_NET_SCH_CAKE=m</div><div class='add'>+CONFIG_NET_SCH_FQ=m</div><div class='add'>+CONFIG_NET_SCH_PIE=m</div><div class='add'>+CONFIG_NET_SCH_FQ_PIE=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='add'>+CONFIG_NET_SCH_DEFAULT=y</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='add'>+CONFIG_NET_CLS_FLOW=m</div><div class='ctx'> CONFIG_NET_CLS_CGROUP=m</div><div class='ctx'> CONFIG_NET_CLS_BPF=m</div><div class='add'>+CONFIG_NET_CLS_FLOWER=m</div><div class='add'>+CONFIG_NET_CLS_MATCHALL=m</div><div class='ctx'> CONFIG_NET_CLS_ACT=y</div><div class='ctx'> CONFIG_NET_ACT_POLICE=m</div><div class='ctx'> CONFIG_NET_ACT_GACT=m</div><div class='hunk'>@@ -393,6 +435,7 @@ CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_FW_LOADER_COMPRESS=y</div><div class='ctx'> CONFIG_FW_LOADER_COMPRESS_ZSTD=y</div><div class='add'>+CONFIG_SYSFB_SIMPLEFB=y</div><div class='ctx'> CONFIG_EFI_ZBOOT=y</div><div class='ctx'> CONFIG_EFI_BOOTLOADER_CONTROL=m</div><div class='ctx'> CONFIG_EFI_CAPSULE_LOADER=m</div><div class='hunk'>@@ -406,6 +449,11 @@ CONFIG_MTD_CFI_AMDSTD=m</div><div class='ctx'> CONFIG_MTD_CFI_STAA=m</div><div class='ctx'> CONFIG_MTD_RAM=m</div><div class='ctx'> CONFIG_MTD_ROM=m</div><div class='add'>+CONFIG_MTD_RAW_NAND=m</div><div class='add'>+CONFIG_MTD_NAND_PLATFORM=m</div><div class='add'>+CONFIG_MTD_NAND_LOONGSON=m</div><div class='add'>+CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y</div><div class='add'>+CONFIG_MTD_NAND_ECC_SW_BCH=y</div><div class='ctx'> CONFIG_MTD_UBI=m</div><div class='ctx'> CONFIG_MTD_UBI_BLOCK=y</div><div class='ctx'> CONFIG_PARPORT=y</div><div class='hunk'>@@ -413,7 +461,16 @@ CONFIG_PARPORT_PC=y</div><div class='ctx'> CONFIG_PARPORT_SERIAL=y</div><div class='ctx'> CONFIG_PARPORT_PC_FIFO=y</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='add'>+CONFIG_ZRAM_BACKEND_LZ4=y</div><div class='add'>+CONFIG_ZRAM_BACKEND_LZ4HC=y</div><div class='add'>+CONFIG_ZRAM_BACKEND_ZSTD=y</div><div class='add'>+CONFIG_ZRAM_BACKEND_DEFLATE=y</div><div class='add'>+CONFIG_ZRAM_BACKEND_842=y</div><div class='add'>+CONFIG_ZRAM_BACKEND_LZO=y</div><div class='ctx'> CONFIG_ZRAM_DEF_COMP_ZSTD=y</div><div class='add'>+CONFIG_ZRAM_WRITEBACK=y</div><div class='add'>+CONFIG_ZRAM_MEMORY_TRACKING=y</div><div class='add'>+CONFIG_ZRAM_MULTI_COMP=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='hunk'>@@ -433,6 +490,9 @@ CONFIG_NVME_TARGET_RDMA=m</div><div class='ctx'> CONFIG_NVME_TARGET_FC=m</div><div class='ctx'> CONFIG_NVME_TARGET_TCP=m</div><div class='ctx'> CONFIG_EEPROM_AT24=m</div><div class='add'>+CONFIG_PVPANIC=y</div><div class='add'>+CONFIG_PVPANIC_MMIO=m</div><div class='add'>+CONFIG_PVPANIC_PCI=m</div><div class='ctx'> CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_BLK_DEV_SR=y</div><div class='ctx'> CONFIG_CHR_DEV_SG=y</div><div class='hunk'>@@ -470,12 +530,10 @@ CONFIG_PATA_ATIIXP=y</div><div class='ctx'> CONFIG_PATA_PCMCIA=m</div><div class='ctx'> CONFIG_MD=y</div><div class='ctx'> CONFIG_BLK_DEV_MD=m</div><div class='del'>-CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_MD_RAID0=m</div><div class='ctx'> CONFIG_MD_RAID1=m</div><div class='ctx'> CONFIG_MD_RAID10=m</div><div class='ctx'> CONFIG_MD_RAID456=m</div><div class='del'>-CONFIG_MD_MULTIPATH=m</div><div class='ctx'> CONFIG_BCACHE=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=y</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -489,6 +547,16 @@ CONFIG_DM_ZERO=m</div><div class='ctx'> CONFIG_DM_MULTIPATH=m</div><div class='ctx'> CONFIG_DM_MULTIPATH_QL=m</div><div class='ctx'> CONFIG_DM_MULTIPATH_ST=m</div><div class='add'>+CONFIG_DM_MULTIPATH_HST=m</div><div class='add'>+CONFIG_DM_MULTIPATH_IOA=m</div><div class='add'>+CONFIG_DM_INIT=y</div><div class='add'>+CONFIG_DM_UEVENT=y</div><div class='add'>+CONFIG_DM_VERITY=m</div><div class='add'>+CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y</div><div class='add'>+CONFIG_DM_VERITY_FEC=y</div><div class='add'>+CONFIG_DM_INTEGRITY=m</div><div class='add'>+CONFIG_DM_ZONED=m</div><div class='add'>+CONFIG_DM_VDO=m</div><div class='ctx'> CONFIG_TARGET_CORE=m</div><div class='ctx'> CONFIG_TCM_IBLOCK=m</div><div class='ctx'> CONFIG_TCM_FILEIO=m</div><div class='hunk'>@@ -500,6 +568,13 @@ CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_BONDING=m</div><div class='ctx'> CONFIG_DUMMY=y</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_IFB=m</div><div class='add'>+CONFIG_NET_TEAM=m</div><div class='add'>+CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='add'>+CONFIG_NET_TEAM_MODE_ROUNDROBIN=m</div><div class='add'>+CONFIG_NET_TEAM_MODE_RANDOM=m</div><div class='add'>+CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m</div><div class='add'>+CONFIG_NET_TEAM_MODE_LOADBALANCE=m</div><div class='ctx'> CONFIG_MACVLAN=m</div><div class='ctx'> CONFIG_MACVTAP=m</div><div class='ctx'> CONFIG_IPVLAN=m</div><div class='hunk'>@@ -534,6 +609,11 @@ CONFIG_E1000=y</div><div class='ctx'> CONFIG_E1000E=y</div><div class='ctx'> CONFIG_IGB=y</div><div class='ctx'> CONFIG_IXGBE=y</div><div class='add'>+CONFIG_I40E=y</div><div class='add'>+CONFIG_ICE=y</div><div class='add'>+CONFIG_FM10K=y</div><div class='add'>+CONFIG_IGC=y</div><div class='add'>+CONFIG_IDPF=y</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MELLANOX is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MICREL is not set</div><div class='hunk'>@@ -580,12 +660,14 @@ CONFIG_PPP_ASYNC=m</div><div class='ctx'> CONFIG_PPP_SYNC_TTY=m</div><div class='ctx'> CONFIG_USB_RTL8150=m</div><div class='ctx'> CONFIG_USB_RTL8152=m</div><div class='add'>+CONFIG_USB_USBNET=m</div><div class='ctx'> # CONFIG_USB_NET_AX8817X is not set</div><div class='ctx'> # CONFIG_USB_NET_AX88179_178A is not set</div><div class='ctx'> CONFIG_USB_NET_CDC_EEM=m</div><div class='ctx'> CONFIG_USB_NET_HUAWEI_CDC_NCM=m</div><div class='ctx'> CONFIG_USB_NET_CDC_MBIM=m</div><div class='ctx'> # CONFIG_USB_NET_NET1080 is not set</div><div class='add'>+CONFIG_USB_NET_RNDIS_HOST=m</div><div class='ctx'> # CONFIG_USB_BELKIN is not set</div><div class='ctx'> # CONFIG_USB_ARMLINUX is not set</div><div class='ctx'> # CONFIG_USB_NET_ZAURUS is not set</div><div class='hunk'>@@ -594,10 +676,11 @@ CONFIG_ATH9K_HTC=m</div><div class='ctx'> CONFIG_IWLWIFI=m</div><div class='ctx'> CONFIG_IWLDVM=m</div><div class='ctx'> CONFIG_IWLMVM=m</div><div class='del'>-CONFIG_HOSTAP=m</div><div class='ctx'> CONFIG_MT7601U=m</div><div class='ctx'> CONFIG_RT2X00=m</div><div class='ctx'> CONFIG_RT2800USB=m</div><div class='add'>+CONFIG_RTL8180=m</div><div class='add'>+CONFIG_RTL8187=m</div><div class='ctx'> CONFIG_RTL8192CE=m</div><div class='ctx'> CONFIG_RTL8192SE=m</div><div class='ctx'> CONFIG_RTL8192DE=m</div><div class='hunk'>@@ -607,22 +690,37 @@ CONFIG_RTL8188EE=m</div><div class='ctx'> CONFIG_RTL8192EE=m</div><div class='ctx'> CONFIG_RTL8821AE=m</div><div class='ctx'> CONFIG_RTL8192CU=m</div><div class='add'>+CONFIG_RTL8192DU=m</div><div class='ctx'> # CONFIG_RTLWIFI_DEBUG is not set</div><div class='ctx'> CONFIG_RTL8XXXU=m</div><div class='ctx'> CONFIG_RTW88=m</div><div class='ctx'> CONFIG_RTW88_8822BE=m</div><div class='add'>+CONFIG_RTW88_8822BU=m</div><div class='ctx'> CONFIG_RTW88_8822CE=m</div><div class='add'>+CONFIG_RTW88_8822CU=m</div><div class='ctx'> CONFIG_RTW88_8723DE=m</div><div class='add'>+CONFIG_RTW88_8723DU=m</div><div class='ctx'> CONFIG_RTW88_8821CE=m</div><div class='add'>+CONFIG_RTW88_8821CU=m</div><div class='add'>+CONFIG_RTW88_8821AU=m</div><div class='add'>+CONFIG_RTW88_8812AU=m</div><div class='add'>+CONFIG_RTW88_8814AE=m</div><div class='add'>+CONFIG_RTW88_8814AU=m</div><div class='ctx'> CONFIG_RTW89=m</div><div class='add'>+CONFIG_RTW89_8851BE=m</div><div class='ctx'> CONFIG_RTW89_8852AE=m</div><div class='add'>+CONFIG_RTW89_8852BE=m</div><div class='add'>+CONFIG_RTW89_8852BTE=m</div><div class='ctx'> CONFIG_RTW89_8852CE=m</div><div class='add'>+CONFIG_RTW89_8922AE=m</div><div class='ctx'> CONFIG_ZD1211RW=m</div><div class='del'>-CONFIG_USB_NET_RNDIS_WLAN=m</div><div class='ctx'> CONFIG_USB4_NET=m</div><div class='ctx'> CONFIG_INPUT_MOUSEDEV=y</div><div class='ctx'> CONFIG_INPUT_MOUSEDEV_PSAUX=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO=m</div><div class='add'>+CONFIG_KEYBOARD_GPIO_POLLED=m</div><div class='add'>+CONFIG_KEYBOARD_MATRIX=m</div><div class='ctx'> CONFIG_KEYBOARD_XTKBD=m</div><div class='ctx'> CONFIG_MOUSE_PS2_ELANTECH=y</div><div class='ctx'> CONFIG_MOUSE_PS2_SENTELIC=y</div><div class='hunk'>@@ -647,10 +745,16 @@ CONFIG_VIRTIO_CONSOLE=y</div><div class='ctx'> CONFIG_IPMI_HANDLER=m</div><div class='ctx'> CONFIG_IPMI_DEVICE_INTERFACE=m</div><div class='ctx'> CONFIG_IPMI_SI=m</div><div class='add'>+CONFIG_IPMI_LS2K=y</div><div class='ctx'> CONFIG_HW_RANDOM=y</div><div class='ctx'> CONFIG_HW_RANDOM_VIRTIO=m</div><div class='add'>+CONFIG_TCG_TPM=m</div><div class='add'>+CONFIG_TCG_LOONGSON=m</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_PIIX4=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_CORE=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_SLAVE=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PCI=y</div><div class='ctx'> CONFIG_I2C_GPIO=y</div><div class='ctx'> CONFIG_I2C_LS2X=y</div><div class='ctx'> CONFIG_SPI=y</div><div class='hunk'>@@ -661,6 +765,10 @@ CONFIG_PINCTRL_LOONGSON2=y</div><div class='ctx'> CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_GPIO_LOONGSON=y</div><div class='ctx'> CONFIG_GPIO_LOONGSON_64BIT=y</div><div class='add'>+CONFIG_GPIO_PCA953X=m</div><div class='add'>+CONFIG_GPIO_PCA953X_IRQ=y</div><div class='add'>+CONFIG_GPIO_PCA9570=m</div><div class='add'>+CONFIG_GPIO_PCF857X=m</div><div class='ctx'> CONFIG_POWER_RESET=y</div><div class='ctx'> CONFIG_POWER_RESET_RESTART=y</div><div class='ctx'> CONFIG_POWER_RESET_SYSCON=y</div><div class='hunk'>@@ -671,6 +779,7 @@ CONFIG_SENSORS_LM93=m</div><div class='ctx'> CONFIG_SENSORS_W83795=m</div><div class='ctx'> CONFIG_SENSORS_W83627HF=m</div><div class='ctx'> CONFIG_LOONGSON2_THERMAL=m</div><div class='add'>+CONFIG_MFD_LOONGSON_SE=m</div><div class='ctx'> CONFIG_RC_CORE=m</div><div class='ctx'> CONFIG_LIRC=y</div><div class='ctx'> CONFIG_RC_DECODERS=y</div><div class='hunk'>@@ -691,6 +800,7 @@ CONFIG_MEDIA_PCI_SUPPORT=y</div><div class='ctx'> CONFIG_VIDEO_BT848=m</div><div class='ctx'> CONFIG_DVB_BT8XX=m</div><div class='ctx'> CONFIG_DRM=y</div><div class='add'>+CONFIG_DRM_LOAD_EDID_FIRMWARE=y</div><div class='ctx'> CONFIG_DRM_RADEON=m</div><div class='ctx'> CONFIG_DRM_RADEON_USERPTR=y</div><div class='ctx'> CONFIG_DRM_AMDGPU=m</div><div class='hunk'>@@ -701,9 +811,11 @@ CONFIG_DRM_AST=y</div><div class='ctx'> CONFIG_DRM_QXL=m</div><div class='ctx'> CONFIG_DRM_VIRTIO_GPU=m</div><div class='ctx'> CONFIG_DRM_LOONGSON=y</div><div class='add'>+CONFIG_DRM_SIMPLEDRM=y</div><div class='ctx'> CONFIG_FB=y</div><div class='ctx'> CONFIG_FB_EFI=y</div><div class='ctx'> CONFIG_FB_RADEON=y</div><div class='add'>+CONFIG_FIRMWARE_EDID=y</div><div class='ctx'> CONFIG_LCD_CLASS_DEVICE=y</div><div class='ctx'> CONFIG_LCD_PLATFORM=m</div><div class='ctx'> # CONFIG_VGA_CONSOLE is not set</div><div class='hunk'>@@ -721,17 +833,44 @@ CONFIG_SND_HDA_HWDEP=y</div><div class='ctx'> CONFIG_SND_HDA_INPUT_BEEP=y</div><div class='ctx'> CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_REALTEK=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK_LIB=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC260=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC262=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC268=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC269=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC662=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC680=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861VD=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC880=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC882=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_SIGMATEL=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_HDMI=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_GENERIC=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_INTEL=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_ATI=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_NVIDIA=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_CONEXANT=y</div><div class='ctx'> CONFIG_SND_USB_AUDIO=m</div><div class='add'>+CONFIG_SND_USB_AUDIO_MIDI_V2=y</div><div class='ctx'> CONFIG_SND_SOC=m</div><div class='ctx'> CONFIG_SND_SOC_LOONGSON_CARD=m</div><div class='add'>+CONFIG_SND_SOC_ES7134=m</div><div class='add'>+CONFIG_SND_SOC_ES7241=m</div><div class='add'>+CONFIG_SND_SOC_ES8311=m</div><div class='add'>+CONFIG_SND_SOC_ES8316=m</div><div class='add'>+CONFIG_SND_SOC_ES8323=m</div><div class='add'>+CONFIG_SND_SOC_ES8326=m</div><div class='add'>+CONFIG_SND_SOC_ES8328_I2C=m</div><div class='add'>+CONFIG_SND_SOC_ES8328_SPI=m</div><div class='add'>+CONFIG_SND_SOC_UDA1334=m</div><div class='add'>+CONFIG_SND_SOC_UDA1342=m</div><div class='ctx'> CONFIG_SND_VIRTIO=m</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='ctx'> CONFIG_UHID=m</div><div class='ctx'> CONFIG_HID_A4TECH=m</div><div class='ctx'> CONFIG_HID_CHERRY=m</div><div class='add'>+CONFIG_HID_ELAN=m</div><div class='ctx'> CONFIG_HID_LOGITECH=m</div><div class='ctx'> CONFIG_HID_LOGITECH_DJ=m</div><div class='ctx'> CONFIG_LOGITECH_FF=y</div><div class='hunk'>@@ -740,7 +879,11 @@ CONFIG_LOGIG940_FF=y</div><div class='ctx'> CONFIG_HID_MICROSOFT=m</div><div class='ctx'> CONFIG_HID_MULTITOUCH=m</div><div class='ctx'> CONFIG_HID_SUNPLUS=m</div><div class='add'>+CONFIG_HID_WACOM=m</div><div class='ctx'> CONFIG_USB_HIDDEV=y</div><div class='add'>+CONFIG_I2C_HID_ACPI=m</div><div class='add'>+CONFIG_I2C_HID_OF=m</div><div class='add'>+CONFIG_I2C_HID_OF_ELAN=m</div><div class='ctx'> CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_OTG=y</div><div class='ctx'> CONFIG_USB_MON=y</div><div class='hunk'>@@ -770,12 +913,17 @@ CONFIG_TYPEC_TCPM=m</div><div class='ctx'> CONFIG_TYPEC_TCPCI=m</div><div class='ctx'> CONFIG_TYPEC_UCSI=m</div><div class='ctx'> CONFIG_UCSI_ACPI=m</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_LOONGSON2=m</div><div class='ctx'> CONFIG_INFINIBAND=m</div><div class='add'>+CONFIG_EDAC=y</div><div class='add'>+# CONFIG_EDAC_LEGACY_SYSFS is not set</div><div class='add'>+CONFIG_EDAC_LOONGSON=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_EFI=y</div><div class='ctx'> CONFIG_RTC_DRV_LOONGSON=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='del'>-CONFIG_LS2X_APB_DMA=y</div><div class='add'>+CONFIG_LOONGSON2_APB_DMA=y</div><div class='ctx'> CONFIG_UDMABUF=y</div><div class='ctx'> CONFIG_DMABUF_HEAPS=y</div><div class='ctx'> CONFIG_DMABUF_HEAPS_SYSTEM=y</div><div class='hunk'>@@ -828,19 +976,22 @@ CONFIG_NTB_SWITCHTEC=m</div><div class='ctx'> CONFIG_NTB_PERF=m</div><div class='ctx'> CONFIG_NTB_TRANSPORT=m</div><div class='ctx'> CONFIG_PWM=y</div><div class='add'>+CONFIG_PWM_LOONGSON=y</div><div class='ctx'> CONFIG_GENERIC_PHY=y</div><div class='ctx'> CONFIG_USB4=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS_SECURITY=y</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='add'>+CONFIG_EXT4_FS_SECURITY=y</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='ctx'> CONFIG_JFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_JFS_SECURITY=y</div><div class='ctx'> CONFIG_XFS_FS=y</div><div class='add'>+CONFIG_XFS_SUPPORT_V4=y</div><div class='add'>+CONFIG_XFS_SUPPORT_ASCII_CI=y</div><div class='ctx'> CONFIG_XFS_QUOTA=y</div><div class='ctx'> CONFIG_XFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_GFS2_FS=m</div><div class='hunk'>@@ -852,6 +1003,9 @@ CONFIG_F2FS_FS=m</div><div class='ctx'> CONFIG_F2FS_FS_SECURITY=y</div><div class='ctx'> CONFIG_F2FS_CHECK_FS=y</div><div class='ctx'> CONFIG_F2FS_FS_COMPRESSION=y</div><div class='add'>+CONFIG_FS_ENCRYPTION=y</div><div class='add'>+CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y</div><div class='add'>+CONFIG_FS_VERITY=y</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y</div><div class='ctx'> CONFIG_QUOTA=y</div><div class='hunk'>@@ -904,16 +1058,13 @@ CONFIG_SQUASHFS_ZSTD=y</div><div class='ctx'> CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='ctx'> CONFIG_PSTORE=m</div><div class='del'>-CONFIG_PSTORE_LZO_COMPRESS=m</div><div class='del'>-CONFIG_PSTORE_LZ4_COMPRESS=m</div><div class='del'>-CONFIG_PSTORE_LZ4HC_COMPRESS=m</div><div class='del'>-CONFIG_PSTORE_842_COMPRESS=y</div><div class='del'>-CONFIG_PSTORE_ZSTD_COMPRESS=y</div><div class='del'>-CONFIG_PSTORE_ZSTD_COMPRESS_DEFAULT=y</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='add'>+CONFIG_PSTORE_COMPRESS=y</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS_ZIP_LZMA=y</div><div class='add'>+CONFIG_EROFS_FS_ZIP_DEFLATE=y</div><div class='add'>+CONFIG_EROFS_FS_ZIP_ZSTD=y</div><div class='add'>+CONFIG_EROFS_FS_ONDEMAND=y</div><div class='ctx'> CONFIG_EROFS_FS_PCPU_KTHREAD=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='hunk'>@@ -932,9 +1083,12 @@ CONFIG_CEPH_FS_SECURITY_LABEL=y</div><div class='ctx'> CONFIG_CIFS=m</div><div class='ctx'> # CONFIG_CIFS_DEBUG is not set</div><div class='ctx'> CONFIG_9P_FS=y</div><div class='add'>+CONFIG_NLS_DEFAULT="utf8"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_936=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_950=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_DLM=m</div><div class='ctx'> CONFIG_KEY_DH_OPERATIONS=y</div><div class='hunk'>@@ -945,7 +1099,7 @@ CONFIG_SECURITY_APPARMOR=y</div><div class='ctx'> CONFIG_SECURITY_YAMA=y</div><div class='ctx'> CONFIG_DEFAULT_SECURITY_DAC=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> CONFIG_CRYPTO_PCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -955,10 +1109,11 @@ CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_KHAZAD=m</div><div class='ctx'> CONFIG_CRYPTO_SEED=m</div><div class='ctx'> CONFIG_CRYPTO_SERPENT=m</div><div class='add'>+CONFIG_CRYPTO_SM4_GENERIC=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='add'>+CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -969,8 +1124,8 @@ CONFIG_CRYPTO_USER_API_HASH=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='del'>-CONFIG_CRYPTO_CRC32_LOONGARCH=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_VIRTIO=m</div><div class='add'>+CONFIG_CRYPTO_DEV_LOONGSON_RNG=m</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_DMA_NUMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=0</div><div class='head'>diff --git a/arch/loongarch/crypto/Kconfig b/arch/loongarch/crypto/Kconfig<br/>index 200a6e8b43b1..a0270b3e5b30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/crypto/Kconfig</a></div><div class='hunk'>@@ -2,13 +2,4 @@</div><div class='ctx'> </div><div class='ctx'> menu "Accelerated Cryptographic Algorithms for CPU (loongarch)"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CRC32_LOONGARCH</div><div class='del'>-	tristate "CRC32c and CRC32"</div><div class='del'>-	select CRC32</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC32c and CRC32 CRC algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: LoongArch with CRC32 instructions</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/loongarch/crypto/Makefile b/arch/loongarch/crypto/Makefile<br/>index d22613d27ce9..ba83755dde2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/crypto/Makefile</a></div><div class='hunk'>@@ -2,5 +2,3 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for LoongArch crypto files..</div><div class='ctx'> #</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32_LOONGARCH) += crc32-loongarch.o</div><div class='head'>diff --git a/arch/loongarch/crypto/crc32-loongarch.c b/arch/loongarch/crypto/crc32-loongarch.c<br/>deleted file mode 100644<br/>index b7d9782827f5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/crypto/crc32-loongarch.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/crypto/crc32-loongarch.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,300 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * crc32.c - CRC32 and CRC32C using LoongArch crc* instructions</div><div class='del'>- *</div><div class='del'>- * Module based on mips/crypto/crc32-mips.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 Linaro Ltd &lt;yazen.ghannam@linaro.org&gt;</div><div class='del'>- * Copyright (C) 2018 MIPS Tech, LLC</div><div class='del'>- * Copyright (C) 2020-2023 Loongson Technology Corporation Limited</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/cpu-features.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-#define _CRC32(crc, value, size, type)			\</div><div class='del'>-do {							\</div><div class='del'>-	__asm__ __volatile__(				\</div><div class='del'>-		#type ".w." #size ".w" " %0, %1, %0\n\t"\</div><div class='del'>-		: "+r" (crc)				\</div><div class='del'>-		: "r" (value)				\</div><div class='del'>-		: "memory");				\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define CRC32(crc, value, size)		_CRC32(crc, value, size, crc)</div><div class='del'>-#define CRC32C(crc, value, size)	_CRC32(crc, value, size, crcc)</div><div class='del'>-</div><div class='del'>-static u32 crc32_loongarch_hw(u32 crc_, const u8 *p, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u32 crc = crc_;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(u64)) {</div><div class='del'>-		u64 value = get_unaligned_le64(p);</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, d);</div><div class='del'>-		p += sizeof(u64);</div><div class='del'>-		len -= sizeof(u64);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u32)) {</div><div class='del'>-		u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, w);</div><div class='del'>-		p += sizeof(u32);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u16)) {</div><div class='del'>-		u16 value = get_unaligned_le16(p);</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, h);</div><div class='del'>-		p += sizeof(u16);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u8)) {</div><div class='del'>-		u8 value = *p++;</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, b);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 crc32c_loongarch_hw(u32 crc_, const u8 *p, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u32 crc = crc_;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(u64)) {</div><div class='del'>-		u64 value = get_unaligned_le64(p);</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, d);</div><div class='del'>-		p += sizeof(u64);</div><div class='del'>-		len -= sizeof(u64);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u32)) {</div><div class='del'>-		u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, w);</div><div class='del'>-		p += sizeof(u32);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u16)) {</div><div class='del'>-		u16 value = get_unaligned_le16(p);</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, h);</div><div class='del'>-		p += sizeof(u16);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u8)) {</div><div class='del'>-		u8 value = *p++;</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, b);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CHKSUM_BLOCK_SIZE	1</div><div class='del'>-#define CHKSUM_DIGEST_SIZE	4</div><div class='del'>-</div><div class='del'>-struct chksum_ctx {</div><div class='del'>-	u32 key;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct chksum_desc_ctx {</div><div class='del'>-	u32 crc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int chksum_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = mctx-&gt;key;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Setting the seed allows arbitrary accumulators and flexible XOR policy</div><div class='del'>- * If your algorithm starts with ~0, then XOR with ~0 before you set the seed.</div><div class='del'>- */</div><div class='del'>-static int chksum_setkey(struct crypto_shash *tfm, const u8 *key, unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	if (keylen != sizeof(mctx-&gt;key))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mctx-&gt;key = get_unaligned_le32(key);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_update(struct shash_desc *desc, const u8 *data, unsigned int length)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = crc32_loongarch_hw(ctx-&gt;crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_update(struct shash_desc *desc, const u8 *data, unsigned int length)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = crc32c_loongarch_hw(ctx-&gt;crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(ctx-&gt;crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(~ctx-&gt;crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __chksum_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	put_unaligned_le32(crc32_loongarch_hw(crc, data, len), out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __chksumc_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	put_unaligned_le32(~crc32c_loongarch_hw(crc, data, len), out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_finup(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return __chksum_finup(ctx-&gt;crc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_finup(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return __chksumc_finup(ctx-&gt;crc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_digest(struct shash_desc *desc, const u8 *data, unsigned int length, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	return __chksum_finup(mctx-&gt;key, data, length, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_digest(struct shash_desc *desc, const u8 *data, unsigned int length, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	return __chksumc_finup(mctx-&gt;key, data, length, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	mctx-&gt;key = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	mctx-&gt;key = ~0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc32_alg = {</div><div class='del'>-	.digestsize		=	CHKSUM_DIGEST_SIZE,</div><div class='del'>-	.setkey			=	chksum_setkey,</div><div class='del'>-	.init			=	chksum_init,</div><div class='del'>-	.update			=	chksum_update,</div><div class='del'>-	.final			=	chksum_final,</div><div class='del'>-	.finup			=	chksum_finup,</div><div class='del'>-	.digest			=	chksum_digest,</div><div class='del'>-	.descsize		=	sizeof(struct chksum_desc_ctx),</div><div class='del'>-	.base			=	{</div><div class='del'>-		.cra_name		=	"crc32",</div><div class='del'>-		.cra_driver_name	=	"crc32-loongarch",</div><div class='del'>-		.cra_priority		=	300,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-		.cra_blocksize		=	CHKSUM_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		=	sizeof(struct chksum_ctx),</div><div class='del'>-		.cra_module		=	THIS_MODULE,</div><div class='del'>-		.cra_init		=	chksum_cra_init,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc32c_alg = {</div><div class='del'>-	.digestsize		=	CHKSUM_DIGEST_SIZE,</div><div class='del'>-	.setkey			=	chksum_setkey,</div><div class='del'>-	.init			=	chksum_init,</div><div class='del'>-	.update			=	chksumc_update,</div><div class='del'>-	.final			=	chksumc_final,</div><div class='del'>-	.finup			=	chksumc_finup,</div><div class='del'>-	.digest			=	chksumc_digest,</div><div class='del'>-	.descsize		=	sizeof(struct chksum_desc_ctx),</div><div class='del'>-	.base			=	{</div><div class='del'>-		.cra_name		=	"crc32c",</div><div class='del'>-		.cra_driver_name	=	"crc32c-loongarch",</div><div class='del'>-		.cra_priority		=	300,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-		.cra_blocksize		=	CHKSUM_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		=	sizeof(struct chksum_ctx),</div><div class='del'>-		.cra_module		=	THIS_MODULE,</div><div class='del'>-		.cra_init		=	chksumc_cra_init,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init crc32_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has(CPU_FEATURE_CRC32))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_shash(&amp;crc32_alg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_shash(&amp;crc32c_alg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc32_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has(CPU_FEATURE_CRC32))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	crypto_unregister_shash(&amp;crc32_alg);</div><div class='del'>-	crypto_unregister_shash(&amp;crc32c_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(crc32_mod_init);</div><div class='del'>-module_exit(crc32_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Min Zhou &lt;zhoumin@loongson.cn&gt;");</div><div class='del'>-MODULE_AUTHOR("Huacai Chen &lt;chenhuacai@loongson.cn&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CRC32 and CRC32C using LoongArch crc* instructions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/loongarch/include/asm/Kbuild b/arch/loongarch/include/asm/Kbuild<br/>index 5b5a6c90e6e2..b04d2cef935f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/Kbuild</a></div><div class='hunk'>@@ -10,4 +10,4 @@ generic-y += user.h</div><div class='ctx'> generic-y += ioctl.h</div><div class='ctx'> generic-y += mmzone.h</div><div class='ctx'> generic-y += statfs.h</div><div class='del'>-generic-y += param.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/loongarch/include/asm/acenv.h b/arch/loongarch/include/asm/acenv.h<br/>index 52f298f7293b..483c955f2ae5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/acenv.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/acenv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/acenv.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/acenv.h</a></div><div class='hunk'>@@ -10,9 +10,8 @@</div><div class='ctx'> #ifndef _ASM_LOONGARCH_ACENV_H</div><div class='ctx'> #define _ASM_LOONGARCH_ACENV_H</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This header is required by ACPI core, but we have nothing to fill in</div><div class='del'>- * right now. Will be updated later when needed.</div><div class='del'>- */</div><div class='add'>+#ifdef CONFIG_ARCH_STRICT_ALIGN</div><div class='add'>+#define ACPI_MISALIGNMENT_NOT_SUPPORTED</div><div class='add'>+#endif /* CONFIG_ARCH_STRICT_ALIGN */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_LOONGARCH_ACENV_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h<br/>index 313f66f7913a..7376840fa9f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/acpi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/acpi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/acpi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/acpi.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@ static inline bool acpi_has_cpu_in_madt(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MAX_CORE_PIC 256</div><div class='add'>+#define MAX_CORE_PIC 2048</div><div class='ctx'> </div><div class='ctx'> extern struct list_head acpi_wakeup_device_list;</div><div class='ctx'> extern struct acpi_madt_core_pic acpi_core_pic[MAX_CORE_PIC];</div><div class='head'>diff --git a/arch/loongarch/include/asm/addrspace.h b/arch/loongarch/include/asm/addrspace.h<br/>index fe198b473f84..e739dbc6329d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/addrspace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/addrspace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/addrspace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/addrspace.h</a></div><div class='hunk'>@@ -18,12 +18,12 @@</div><div class='ctx'> /*</div><div class='ctx'>  * This gives the physical RAM offset.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifndef PHYS_OFFSET</div><div class='ctx'> #define PHYS_OFFSET	_UL(0)</div><div class='ctx'> #endif</div><div class='ctx'> extern unsigned long vm_map_base;</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifndef IO_BASE</div><div class='ctx'> #define IO_BASE			CSR_DMW0_BASE</div><div class='hunk'>@@ -66,7 +66,7 @@ extern unsigned long vm_map_base;</div><div class='ctx'> #define FIXADDR_TOP		((unsigned long)(long)(int)0xfffe0000)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ATYPE_</div><div class='ctx'> #define _ATYPE32_</div><div class='ctx'> #define _ATYPE64_</div><div class='hunk'>@@ -85,7 +85,7 @@ extern unsigned long vm_map_base;</div><div class='ctx'> /*</div><div class='ctx'>  *  32/64-bit LoongArch address spaces</div><div class='ctx'>  */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ACAST32_</div><div class='ctx'> #define _ACAST64_</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/loongarch/include/asm/alternative-asm.h b/arch/loongarch/include/asm/alternative-asm.h<br/>index ff3d10ac393f..7dc29bd9b2f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/alternative-asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/alternative-asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/alternative-asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/alternative-asm.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_ALTERNATIVE_ASM_H</div><div class='ctx'> #define _ASM_ALTERNATIVE_ASM_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +77,6 @@</div><div class='ctx'> 	.previous</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif  /*  __ASSEMBLY__  */</div><div class='add'>+#endif  /*  __ASSEMBLER__  */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_ALTERNATIVE_ASM_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/alternative.h b/arch/loongarch/include/asm/alternative.h<br/>index cee7b29785ab..b5bae21fb3c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/alternative.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/alternative.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/alternative.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/alternative.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_ALTERNATIVE_H</div><div class='ctx'> #define _ASM_ALTERNATIVE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='hunk'>@@ -106,6 +106,6 @@ extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);</div><div class='ctx'> #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \</div><div class='ctx'> 	(asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) ::: "memory"))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_ALTERNATIVE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/asm-extable.h b/arch/loongarch/include/asm/asm-extable.h<br/>index df05005f2b80..d60bdf2e6377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm-extable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm-extable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm-extable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/asm-extable.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define EX_TYPE_UACCESS_ERR_ZERO	2</div><div class='ctx'> #define EX_TYPE_BPF			3</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\</div><div class='ctx'> 	.pushsection	__ex_table, "a";		\</div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> 	__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_FIXUP, 0)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -60,6 +60,6 @@</div><div class='ctx'> #define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)			\</div><div class='ctx'> 	_ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ASM_EXTABLE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/asm-prototypes.h b/arch/loongarch/include/asm/asm-prototypes.h<br/>index 51f224bcfc65..704066b4f736 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm-prototypes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm-prototypes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm-prototypes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/asm-prototypes.h</a></div><div class='hunk'>@@ -12,3 +12,11 @@ __int128_t __ashlti3(__int128_t a, int b);</div><div class='ctx'> __int128_t __ashrti3(__int128_t a, int b);</div><div class='ctx'> __int128_t __lshrti3(__int128_t a, int b);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_fork(struct task_struct *prev,</div><div class='add'>+							   struct pt_regs *regs);</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_kernel_thread(struct task_struct *prev,</div><div class='add'>+								    struct pt_regs *regs,</div><div class='add'>+								    int (*fn)(void *),</div><div class='add'>+								    void *fn_arg);</div><div class='head'>diff --git a/arch/loongarch/include/asm/asm.h b/arch/loongarch/include/asm/asm.h<br/>index f591b3245def..f018d26fc995 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/asm.h</a></div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> #define LONG_SRA	srai.w</div><div class='ctx'> #define LONG_SRAV	sra.w</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define LONG		.word</div><div class='ctx'> #endif</div><div class='ctx'> #define LONGSIZE	4</div><div class='hunk'>@@ -131,7 +131,7 @@</div><div class='ctx'> #define LONG_SRA	srai.d</div><div class='ctx'> #define LONG_SRAV	sra.d</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define LONG		.dword</div><div class='ctx'> #endif</div><div class='ctx'> #define LONGSIZE	8</div><div class='hunk'>@@ -158,7 +158,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PTR_SCALESHIFT	2</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define PTR		.word</div><div class='ctx'> #endif</div><div class='ctx'> #define PTRSIZE		4</div><div class='hunk'>@@ -181,7 +181,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PTR_SCALESHIFT	3</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define PTR		.dword</div><div class='ctx'> #endif</div><div class='ctx'> #define PTRSIZE		8</div><div class='head'>diff --git a/arch/loongarch/include/asm/bootinfo.h b/arch/loongarch/include/asm/bootinfo.h<br/>index 6d5846dd075c..7657e016233f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/bootinfo.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/bootinfo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/bootinfo.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/bootinfo.h</a></div><div class='hunk'>@@ -26,6 +26,10 @@ struct loongson_board_info {</div><div class='ctx'> </div><div class='ctx'> #define NR_WORDS DIV_ROUND_UP(NR_CPUS, BITS_PER_LONG)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The "core" of cores_per_node and cores_per_package stands for a</div><div class='add'>+ * logical core, which means in a SMT system it stands for a thread.</div><div class='add'>+ */</div><div class='ctx'> struct loongson_system_configuration {</div><div class='ctx'> 	int nr_cpus;</div><div class='ctx'> 	int nr_nodes;</div><div class='head'>diff --git a/arch/loongarch/include/asm/bug.h b/arch/loongarch/include/asm/bug.h<br/>index 08388876ade4..f6f254f2c5db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/bug.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/bug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/bug.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/bug.h</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/break.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_DEBUG_BUGVERBOSE</div><div class='ctx'> #define _BUGVERBOSE_LOCATION(file, line)</div><div class='hunk'>@@ -33,25 +34,25 @@</div><div class='ctx'> </div><div class='ctx'> #define ASM_BUG_FLAGS(flags)					\</div><div class='ctx'> 	__BUG_ENTRY(flags)					\</div><div class='del'>-	break		BRK_BUG</div><div class='add'>+	break		BRK_BUG;</div><div class='ctx'> </div><div class='ctx'> #define ASM_BUG()	ASM_BUG_FLAGS(0)</div><div class='ctx'> </div><div class='del'>-#define __BUG_FLAGS(flags)					\</div><div class='del'>-	asm_inline volatile (__stringify(ASM_BUG_FLAGS(flags)));</div><div class='add'>+#define __BUG_FLAGS(flags, extra)					\</div><div class='add'>+	asm_inline volatile (__stringify(ASM_BUG_FLAGS(flags))		\</div><div class='add'>+			     extra);</div><div class='ctx'> </div><div class='ctx'> #define __WARN_FLAGS(flags)					\</div><div class='ctx'> do {								\</div><div class='ctx'> 	instrumentation_begin();				\</div><div class='del'>-	__BUG_FLAGS(BUGFLAG_WARNING|(flags));			\</div><div class='del'>-	annotate_reachable();					\</div><div class='add'>+	__BUG_FLAGS(BUGFLAG_WARNING|(flags), ANNOTATE_REACHABLE(10001b));\</div><div class='ctx'> 	instrumentation_end();					\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> #define BUG()							\</div><div class='ctx'> do {								\</div><div class='ctx'> 	instrumentation_begin();				\</div><div class='del'>-	__BUG_FLAGS(0);						\</div><div class='add'>+	__BUG_FLAGS(0, "");					\</div><div class='ctx'> 	unreachable();						\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/include/asm/cache.h b/arch/loongarch/include/asm/cache.h<br/>index 1b6d09617199..aa622c754414 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/cache.h</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> #define L1_CACHE_SHIFT		CONFIG_L1_CACHE_SHIFT</div><div class='ctx'> #define L1_CACHE_BYTES		(1 &lt;&lt; L1_CACHE_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define ARCH_DMA_MINALIGN	(16)</div><div class='add'>+</div><div class='ctx'> #define __read_mostly __section(".data..read_mostly")</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_CACHE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/cpu-info.h b/arch/loongarch/include/asm/cpu-info.h<br/>index 900589cb159d..7f5bc0ad9d50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cpu-info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cpu-info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cpu-info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/cpu-info.h</a></div><div class='hunk'>@@ -57,6 +57,7 @@ struct cpuinfo_loongarch {</div><div class='ctx'> 	int			global_id; /* physical global thread number */</div><div class='ctx'> 	int			vabits; /* Virtual Address size in bits */</div><div class='ctx'> 	int			pabits; /* Physical Address size in bits */</div><div class='add'>+	int			timerbits; /* Width of arch timer in bits */</div><div class='ctx'> 	unsigned int		ksave_mask; /* Usable KSave mask. */</div><div class='ctx'> 	unsigned int		watch_dreg_count;   /* Number data breakpoints */</div><div class='ctx'> 	unsigned int		watch_ireg_count;   /* Number instruction breakpoints */</div><div class='hunk'>@@ -75,27 +76,6 @@ extern const char *__cpu_full_name[];</div><div class='ctx'> #define cpu_family_string()	__cpu_family[raw_smp_processor_id()]</div><div class='ctx'> #define cpu_full_name_string()	__cpu_full_name[raw_smp_processor_id()]</div><div class='ctx'> </div><div class='del'>-struct seq_file;</div><div class='del'>-struct notifier_block;</div><div class='del'>-</div><div class='del'>-extern int register_proc_cpuinfo_notifier(struct notifier_block *nb);</div><div class='del'>-extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v);</div><div class='del'>-</div><div class='del'>-#define proc_cpuinfo_notifier(fn, pri)					\</div><div class='del'>-({									\</div><div class='del'>-	static struct notifier_block fn##_nb = {			\</div><div class='del'>-		.notifier_call = fn,					\</div><div class='del'>-		.priority = pri						\</div><div class='del'>-	};								\</div><div class='del'>-									\</div><div class='del'>-	register_proc_cpuinfo_notifier(&amp;fn##_nb);			\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-struct proc_cpuinfo_notifier_args {</div><div class='del'>-	struct seq_file *m;</div><div class='del'>-	unsigned long n;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static inline bool cpus_are_siblings(int cpua, int cpub)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpuinfo_loongarch *infoa = &amp;cpu_data[cpua];</div><div class='head'>diff --git a/arch/loongarch/include/asm/cpu.h b/arch/loongarch/include/asm/cpu.h<br/>index 98cf4d7b4b0a..dfb982fe8701 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/cpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/cpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/cpu.h</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PRID_PRODUCT_MASK	0x0fff</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> enum cpu_type_enum {</div><div class='ctx'> 	CPU_UNKNOWN,</div><div class='hunk'>@@ -55,7 +55,7 @@ enum cpu_type_enum {</div><div class='ctx'> 	CPU_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ISA Level encodings</div><div class='head'>diff --git a/arch/loongarch/include/asm/entry-common.h b/arch/loongarch/include/asm/entry-common.h<br/>index 0fe2a098ded9..099132980dc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/entry-common.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/entry-common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/entry-common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/entry-common.h</a></div><div class='hunk'>@@ -2,12 +2,6 @@</div><div class='ctx'> #ifndef ARCH_LOONGARCH_ENTRY_COMMON_H</div><div class='ctx'> #define ARCH_LOONGARCH_ENTRY_COMMON_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/processor.h&gt;</div><div class='del'>-</div><div class='del'>-static inline bool on_thread_stack(void)</div><div class='del'>-{</div><div class='del'>-	return !(((unsigned long)(current-&gt;stack) ^ current_stack_pointer) &amp; ~(THREAD_SIZE - 1));</div><div class='del'>-}</div><div class='add'>+#include &lt;asm/stacktrace.h&gt; /* For on_thread_stack() */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/loongarch/include/asm/fprobe.h b/arch/loongarch/include/asm/fprobe.h<br/>new file mode 100644<br/>index 000000000000..7af3b3126caf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/fprobe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/fprobe.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_LOONGARCH_FPROBE_H</div><div class='add'>+#define _ASM_LOONGARCH_FPROBE_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Explicitly undef ARCH_DEFINE_ENCODE_FPROBE_HEADER, because loongarch does not</div><div class='add'>+ * have enough number of fixed MSBs of the address of kernel objects for</div><div class='add'>+ * encoding the size of data in fprobe_header. Use 2-entries encoding instead.</div><div class='add'>+ */</div><div class='add'>+#undef ARCH_DEFINE_ENCODE_FPROBE_HEADER</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_LOONGARCH_FPROBE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/fpu.h b/arch/loongarch/include/asm/fpu.h<br/>index 3177674228f8..45514f314664 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/fpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/fpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/fpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/fpu.h</a></div><div class='hunk'>@@ -22,22 +22,29 @@</div><div class='ctx'> struct sigcontext;</div><div class='ctx'> </div><div class='ctx'> #define kernel_fpu_available() cpu_has_fpu</div><div class='del'>-extern void kernel_fpu_begin(void);</div><div class='del'>-extern void kernel_fpu_end(void);</div><div class='del'>-</div><div class='del'>-extern void _init_fpu(unsigned int);</div><div class='del'>-extern void _save_fp(struct loongarch_fpu *);</div><div class='del'>-extern void _restore_fp(struct loongarch_fpu *);</div><div class='del'>-</div><div class='del'>-extern void _save_lsx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _restore_lsx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _init_lsx_upper(void);</div><div class='del'>-extern void _restore_lsx_upper(struct loongarch_fpu *fpu);</div><div class='del'>-</div><div class='del'>-extern void _save_lasx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _restore_lasx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _init_lasx_upper(void);</div><div class='del'>-extern void _restore_lasx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+</div><div class='add'>+void kernel_fpu_begin(void);</div><div class='add'>+void kernel_fpu_end(void);</div><div class='add'>+</div><div class='add'>+asmlinkage void _init_fpu(unsigned int);</div><div class='add'>+asmlinkage void _save_fp(struct loongarch_fpu *);</div><div class='add'>+asmlinkage void _restore_fp(struct loongarch_fpu *);</div><div class='add'>+asmlinkage int _save_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='add'>+asmlinkage int _restore_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='add'>+</div><div class='add'>+asmlinkage void _save_lsx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _restore_lsx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _init_lsx_upper(void);</div><div class='add'>+asmlinkage void _restore_lsx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage int _save_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+asmlinkage int _restore_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+</div><div class='add'>+asmlinkage void _save_lasx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _restore_lasx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _init_lasx_upper(void);</div><div class='add'>+asmlinkage void _restore_lasx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage int _save_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+asmlinkage int _restore_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='ctx'> </div><div class='ctx'> static inline void enable_lsx(void);</div><div class='ctx'> static inline void disable_lsx(void);</div><div class='head'>diff --git a/arch/loongarch/include/asm/ftrace.h b/arch/loongarch/include/asm/ftrace.h<br/>index c0a682808e07..f4caaf764f9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/ftrace.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #define MCOUNT_INSN_SIZE 4		/* sizeof mcount call */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_DYNAMIC_FTRACE</div><div class='ctx'> </div><div class='hunk'>@@ -44,39 +44,28 @@ void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent);</div><div class='ctx'> #ifdef CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS</div><div class='ctx'> struct ftrace_ops;</div><div class='ctx'> </div><div class='del'>-struct ftrace_regs {</div><div class='del'>-	struct pt_regs regs;</div><div class='del'>-};</div><div class='add'>+#include &lt;linux/ftrace_regs.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __always_inline struct pt_regs *arch_ftrace_get_regs(struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	return &amp;fregs-&gt;regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline unsigned long</div><div class='del'>-ftrace_regs_get_instruction_pointer(struct ftrace_regs *fregs)</div><div class='del'>-{</div><div class='del'>-	return instruction_pointer(&amp;fregs-&gt;regs);</div><div class='add'>+	return &amp;arch_ftrace_regs(fregs)-&gt;regs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='ctx'> ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs, unsigned long ip)</div><div class='ctx'> {</div><div class='del'>-	instruction_pointer_set(&amp;fregs-&gt;regs, ip);</div><div class='add'>+	instruction_pointer_set(&amp;arch_ftrace_regs(fregs)-&gt;regs, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ftrace_regs_get_argument(fregs, n) \</div><div class='del'>-	regs_get_kernel_argument(&amp;(fregs)-&gt;regs, n)</div><div class='del'>-#define ftrace_regs_get_stack_pointer(fregs) \</div><div class='del'>-	kernel_stack_pointer(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_return_value(fregs) \</div><div class='del'>-	regs_return_value(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_set_return_value(fregs, ret) \</div><div class='del'>-	regs_set_return_value(&amp;(fregs)-&gt;regs, ret)</div><div class='del'>-#define ftrace_override_function_with_return(fregs) \</div><div class='del'>-	override_function_with_return(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_query_register_offset(name) \</div><div class='del'>-	regs_query_register_offset(name)</div><div class='add'>+#undef ftrace_regs_get_frame_pointer</div><div class='add'>+#define ftrace_regs_get_frame_pointer(fregs) \</div><div class='add'>+	(arch_ftrace_regs(fregs)-&gt;regs.regs[22])</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long</div><div class='add'>+ftrace_regs_get_return_address(struct ftrace_regs *fregs)</div><div class='add'>+{</div><div class='add'>+	return *(unsigned long *)(arch_ftrace_regs(fregs)-&gt;regs.regs[1]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define ftrace_graph_func ftrace_graph_func</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='hunk'>@@ -90,35 +79,13 @@ __arch_ftrace_set_direct_caller(struct pt_regs *regs, unsigned long addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define arch_ftrace_set_direct_caller(fregs, addr) \</div><div class='del'>-	__arch_ftrace_set_direct_caller(&amp;(fregs)-&gt;regs, addr)</div><div class='add'>+	__arch_ftrace_set_direct_caller(&amp;arch_ftrace_regs(fregs)-&gt;regs, addr)</div><div class='ctx'> #endif /* CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_FUNCTION_TRACER */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-struct fgraph_ret_regs {</div><div class='del'>-	/* a0 - a1 */</div><div class='del'>-	unsigned long regs[2];</div><div class='del'>-</div><div class='del'>-	unsigned long fp;</div><div class='del'>-	unsigned long __unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline unsigned long fgraph_ret_regs_return_value(struct fgraph_ret_regs *ret_regs)</div><div class='del'>-{</div><div class='del'>-	return ret_regs-&gt;regs[0];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long fgraph_ret_regs_frame_pointer(struct fgraph_ret_regs *ret_regs)</div><div class='del'>-{</div><div class='del'>-	return ret_regs-&gt;fp;</div><div class='del'>-}</div><div class='del'>-#endif /* ifdef CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_LOONGARCH_FTRACE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/gpr-num.h b/arch/loongarch/include/asm/gpr-num.h<br/>index 996038da806d..af95b941f48b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/gpr-num.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/gpr-num.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/gpr-num.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/gpr-num.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_GPR_NUM_H</div><div class='ctx'> #define __ASM_GPR_NUM_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> 	.equ	.L__gpr_num_zero, 0</div><div class='ctx'> 	.irp	num,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 	.equ	.L__gpr_num_$s\num, 23 + \num</div><div class='ctx'> 	.endr</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define __DEFINE_ASM_GPR_NUMS					\</div><div class='ctx'> "	.equ	.L__gpr_num_zero, 0\n"				\</div><div class='hunk'>@@ -47,6 +47,6 @@</div><div class='ctx'> "	.equ	.L__gpr_num_$s\\num, 23 + \\num\n"		\</div><div class='ctx'> "	.endr\n"						\</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_GPR_NUM_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/hugetlb.h b/arch/loongarch/include/asm/hugetlb.h<br/>index 5da32c00d483..ab68b594f889 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -10,28 +10,20 @@</div><div class='ctx'> </div><div class='ctx'> uint64_t pmd_to_entrylo(unsigned long pmd_val);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PREPARE_HUGEPAGE_RANGE</div><div class='del'>-static inline int prepare_hugepage_range(struct file *file,</div><div class='del'>-					 unsigned long addr,</div><div class='del'>-					 unsigned long len)</div><div class='add'>+#define __HAVE_ARCH_HUGE_PTE_CLEAR</div><div class='add'>+static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,</div><div class='add'>+				  pte_t *ptep, unsigned long sz)</div><div class='ctx'> {</div><div class='del'>-	unsigned long task_size = STACK_TOP;</div><div class='del'>-	struct hstate *h = hstate_file(file);</div><div class='add'>+	pte_t clear;</div><div class='ctx'> </div><div class='del'>-	if (len &amp; ~huge_page_mask(h))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (addr &amp; ~huge_page_mask(h))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (len &gt; task_size)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	if (task_size - len &lt; addr)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	pte_val(clear) = (unsigned long)invalid_pte_table;</div><div class='add'>+	set_pte_at(mm, addr, ptep, clear);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR</div><div class='ctx'> static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-					    unsigned long addr, pte_t *ptep)</div><div class='add'>+					    unsigned long addr, pte_t *ptep,</div><div class='add'>+					    unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t clear;</div><div class='ctx'> 	pte_t pte = ptep_get(ptep);</div><div class='hunk'>@@ -46,8 +38,9 @@ static inline pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='ctx'> 					  unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte;</div><div class='add'>+	unsigned long sz = huge_page_size(hstate_vma(vma));</div><div class='ctx'> </div><div class='del'>-	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep);</div><div class='add'>+	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep, sz);</div><div class='ctx'> 	flush_tlb_page(vma, addr);</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/include/asm/hw_breakpoint.h b/arch/loongarch/include/asm/hw_breakpoint.h<br/>index d78330916bd1..13b2462f3d8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/hw_breakpoint.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/hw_breakpoint.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/hw_breakpoint.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/hw_breakpoint.h</a></div><div class='hunk'>@@ -38,8 +38,8 @@ struct arch_hw_breakpoint {</div><div class='ctx'>  * Limits.</div><div class='ctx'>  * Changing these will require modifications to the register accessors.</div><div class='ctx'>  */</div><div class='del'>-#define LOONGARCH_MAX_BRP		8</div><div class='del'>-#define LOONGARCH_MAX_WRP		8</div><div class='add'>+#define LOONGARCH_MAX_BRP		14</div><div class='add'>+#define LOONGARCH_MAX_WRP		14</div><div class='ctx'> </div><div class='ctx'> /* Virtual debug register bases. */</div><div class='ctx'> #define CSR_CFG_ADDR	0</div><div class='head'>diff --git a/arch/loongarch/include/asm/image.h b/arch/loongarch/include/asm/image.h<br/>new file mode 100644<br/>index 000000000000..cab981cdb72a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/image.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/image.h</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * LoongArch binary image header for EFI(PE/COFF) format.</div><div class='add'>+ *</div><div class='add'>+ * Author: Youling Tang &lt;tangyouling@kylinos.cn&gt;</div><div class='add'>+ * Copyright (C) 2025 KylinSoft Corporation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_IMAGE_H</div><div class='add'>+#define __ASM_IMAGE_H</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct loongarch_image_header</div><div class='add'>+ *</div><div class='add'>+ * @dos_sig: Optional PE format 'MZ' signature.</div><div class='add'>+ * @padding_1: Reserved.</div><div class='add'>+ * @kernel_entry: Kernel image entry pointer.</div><div class='add'>+ * @kernel_asize: An estimated size of the memory image size in LSB byte order.</div><div class='add'>+ * @text_offset: The image load offset in LSB byte order.</div><div class='add'>+ * @padding_2: Reserved.</div><div class='add'>+ * @pe_header: Optional offset to a PE format header.</div><div class='add'>+ **/</div><div class='add'>+</div><div class='add'>+struct loongarch_image_header {</div><div class='add'>+	uint8_t dos_sig[2];</div><div class='add'>+	uint16_t padding_1[3];</div><div class='add'>+	uint64_t kernel_entry;</div><div class='add'>+	uint64_t kernel_asize;</div><div class='add'>+	uint64_t text_offset;</div><div class='add'>+	uint32_t padding_2[7];</div><div class='add'>+	uint32_t pe_header;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * loongarch_header_check_dos_sig - Helper to check the header</div><div class='add'>+ *</div><div class='add'>+ * Returns true (non-zero) if 'MZ' signature is found.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline int loongarch_header_check_dos_sig(const struct loongarch_image_header *h)</div><div class='add'>+{</div><div class='add'>+	if (!h)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return (h-&gt;dos_sig[0] == 'M' &amp;&amp; h-&gt;dos_sig[1] == 'Z');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_IMAGE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm/inst.h<br/>index 944482063f14..55e64a12a124 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/inst.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/inst.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/inst.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/inst.h</a></div><div class='hunk'>@@ -77,6 +77,10 @@ enum reg2_op {</div><div class='ctx'> 	iocsrwrh_op     = 0x19205,</div><div class='ctx'> 	iocsrwrw_op     = 0x19206,</div><div class='ctx'> 	iocsrwrd_op     = 0x19207,</div><div class='add'>+	llacqw_op	= 0xe15e0,</div><div class='add'>+	screlw_op	= 0xe15e1,</div><div class='add'>+	llacqd_op	= 0xe15e2,</div><div class='add'>+	screld_op	= 0xe15e3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum reg2i5_op {</div><div class='hunk'>@@ -189,6 +193,7 @@ enum reg3_op {</div><div class='ctx'> 	fldxd_op	= 0x7068,</div><div class='ctx'> 	fstxs_op	= 0x7070,</div><div class='ctx'> 	fstxd_op	= 0x7078,</div><div class='add'>+	scq_op		= 0x70ae,</div><div class='ctx'> 	amswapw_op	= 0x70c0,</div><div class='ctx'> 	amswapd_op	= 0x70c1,</div><div class='ctx'> 	amaddw_op	= 0x70c2,</div><div class='hunk'>@@ -497,6 +502,7 @@ void arch_simulate_insn(union loongarch_instruction insn, struct pt_regs *regs);</div><div class='ctx'> int larch_insn_read(void *addr, u32 *insnp);</div><div class='ctx'> int larch_insn_write(void *addr, u32 insn);</div><div class='ctx'> int larch_insn_patch_text(void *addr, u32 insn);</div><div class='add'>+int larch_insn_text_copy(void *dst, void *src, size_t len);</div><div class='ctx'> </div><div class='ctx'> u32 larch_insn_gen_nop(void);</div><div class='ctx'> u32 larch_insn_gen_b(unsigned long pc, unsigned long dest);</div><div class='hunk'>@@ -510,6 +516,8 @@ u32 larch_insn_gen_move(enum loongarch_gpr rd, enum loongarch_gpr rj);</div><div class='ctx'> u32 larch_insn_gen_lu12iw(enum loongarch_gpr rd, int imm);</div><div class='ctx'> u32 larch_insn_gen_lu32id(enum loongarch_gpr rd, int imm);</div><div class='ctx'> u32 larch_insn_gen_lu52id(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);</div><div class='add'>+u32 larch_insn_gen_beq(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);</div><div class='add'>+u32 larch_insn_gen_bne(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);</div><div class='ctx'> u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm);</div><div class='ctx'> </div><div class='ctx'> static inline bool signed_imm_check(long val, unsigned int bit)</div><div class='hunk'>@@ -683,7 +691,17 @@ DEF_EMIT_REG2I16_FORMAT(blt, blt_op)</div><div class='ctx'> DEF_EMIT_REG2I16_FORMAT(bge, bge_op)</div><div class='ctx'> DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op)</div><div class='ctx'> DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op)</div><div class='del'>-DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op)</div><div class='add'>+</div><div class='add'>+static inline void emit_jirl(union loongarch_instruction *insn,</div><div class='add'>+			     enum loongarch_gpr rd,</div><div class='add'>+			     enum loongarch_gpr rj,</div><div class='add'>+			     int offset)</div><div class='add'>+{</div><div class='add'>+	insn-&gt;reg2i16_format.opcode = jirl_op;</div><div class='add'>+	insn-&gt;reg2i16_format.immediate = offset;</div><div class='add'>+	insn-&gt;reg2i16_format.rd = rd;</div><div class='add'>+	insn-&gt;reg2i16_format.rj = rj;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP)				\</div><div class='ctx'> static inline void emit_##NAME(union loongarch_instruction *insn,	\</div><div class='head'>diff --git a/arch/loongarch/include/asm/io.h b/arch/loongarch/include/asm/io.h<br/>index 5e95a60df180..eaff72b38dc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/io.h</a></div><div class='hunk'>@@ -23,9 +23,9 @@ extern void __init early_iounmap(void __iomem *addr, unsigned long size);</div><div class='ctx'> #ifdef CONFIG_ARCH_IOREMAP</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,</div><div class='del'>-					 unsigned long prot_val)</div><div class='add'>+					 pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	switch (prot_val &amp; _CACHE_MASK) {</div><div class='add'>+	switch (pgprot_val(prot) &amp; _CACHE_MASK) {</div><div class='ctx'> 	case _CACHE_CC:</div><div class='ctx'> 		return (void __iomem *)(unsigned long)(CACHE_BASE + offset);</div><div class='ctx'> 	case _CACHE_SUC:</div><div class='hunk'>@@ -38,7 +38,7 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ioremap(offset, size)		\</div><div class='del'>-	ioremap_prot((offset), (size), pgprot_val(PAGE_KERNEL_SUC))</div><div class='add'>+	ioremap_prot((offset), (size), PAGE_KERNEL_SUC)</div><div class='ctx'> </div><div class='ctx'> #define iounmap(addr) 			((void)(addr))</div><div class='ctx'> </div><div class='hunk'>@@ -55,23 +55,13 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,</div><div class='ctx'>  */</div><div class='ctx'> #define ioremap_wc(offset, size)	\</div><div class='ctx'> 	ioremap_prot((offset), (size),	\</div><div class='del'>-		pgprot_val(wc_enabled ? PAGE_KERNEL_WUC : PAGE_KERNEL_SUC))</div><div class='add'>+		     wc_enabled ? PAGE_KERNEL_WUC : PAGE_KERNEL_SUC)</div><div class='ctx'> </div><div class='ctx'> #define ioremap_cache(offset, size)	\</div><div class='del'>-	ioremap_prot((offset), (size), pgprot_val(PAGE_KERNEL))</div><div class='add'>+	ioremap_prot((offset), (size), PAGE_KERNEL)</div><div class='ctx'> </div><div class='ctx'> #define mmiowb() wmb()</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * String version of I/O memory access operations.</div><div class='del'>- */</div><div class='del'>-extern void __memset_io(volatile void __iomem *dst, int c, size_t count);</div><div class='del'>-extern void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count);</div><div class='del'>-extern void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count);</div><div class='del'>-#define memset_io(c, v, l)     __memset_io((c), (v), (l))</div><div class='del'>-#define memcpy_fromio(a, c, l) __memcpy_fromio((a), (c), (l))</div><div class='del'>-#define memcpy_toio(c, a, l)   __memcpy_toio((c), (a), (l))</div><div class='del'>-</div><div class='ctx'> #define __io_aw() mmiowb()</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KFENCE</div><div class='head'>diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/irq.h<br/>index 9c2ca785faa9..12bd15578c33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/irq.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/irq.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/irq.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@ void spurious_interrupt(void);</div><div class='ctx'> #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace</div><div class='ctx'> void arch_trigger_cpumask_backtrace(const struct cpumask *mask, int exclude_cpu);</div><div class='ctx'> </div><div class='del'>-#define MAX_IO_PICS 2</div><div class='add'>+#define MAX_IO_PICS 8</div><div class='ctx'> #define NR_IRQS	(64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS))</div><div class='ctx'> </div><div class='ctx'> struct acpi_vector_group {</div><div class='hunk'>@@ -65,6 +65,7 @@ extern struct acpi_vector_group pch_group[MAX_IO_PICS];</div><div class='ctx'> extern struct acpi_vector_group msi_group[MAX_IO_PICS];</div><div class='ctx'> </div><div class='ctx'> #define CORES_PER_EIO_NODE	4</div><div class='add'>+#define CORES_PER_VEIO_NODE	256</div><div class='ctx'> </div><div class='ctx'> #define LOONGSON_CPU_UART0_VEC		10 /* CPU UART0 */</div><div class='ctx'> #define LOONGSON_CPU_THSENS_VEC		14 /* CPU Thsens */</div><div class='head'>diff --git a/arch/loongarch/include/asm/irqflags.h b/arch/loongarch/include/asm/irqflags.h<br/>index 319a8c616f1f..620163628a7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/irqflags.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/irqflags.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/irqflags.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/irqflags.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef _ASM_IRQFLAGS_H</div><div class='ctx'> #define _ASM_IRQFLAGS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -14,40 +14,48 @@</div><div class='ctx'> static inline void arch_local_irq_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 flags = CSR_CRMD_IE;</div><div class='add'>+	register u32 mask asm("t0") = CSR_CRMD_IE;</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"csrxchg %[val], %[mask], %[reg]\n\t"</div><div class='ctx'> 		: [val] "+r" (flags)</div><div class='del'>-		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='add'>+		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void arch_local_irq_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 flags = 0;</div><div class='add'>+	register u32 mask asm("t0") = CSR_CRMD_IE;</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"csrxchg %[val], %[mask], %[reg]\n\t"</div><div class='ctx'> 		: [val] "+r" (flags)</div><div class='del'>-		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='add'>+		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long arch_local_irq_save(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 flags = 0;</div><div class='add'>+	register u32 mask asm("t0") = CSR_CRMD_IE;</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"csrxchg %[val], %[mask], %[reg]\n\t"</div><div class='ctx'> 		: [val] "+r" (flags)</div><div class='del'>-		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='add'>+		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> 	return flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void arch_local_irq_restore(unsigned long flags)</div><div class='ctx'> {</div><div class='add'>+	register u32 mask asm("t0") = CSR_CRMD_IE;</div><div class='add'>+</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"csrxchg %[val], %[mask], %[reg]\n\t"</div><div class='ctx'> 		: [val] "+r" (flags)</div><div class='del'>-		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='add'>+		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -72,6 +80,6 @@ static inline int arch_irqs_disabled(void)</div><div class='ctx'> 	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* #ifndef __ASSEMBLY__ */</div><div class='add'>+#endif /* #ifndef __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_IRQFLAGS_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/jump_label.h b/arch/loongarch/include/asm/jump_label.h<br/>index 29acfe3de3fa..4000c7603d8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/jump_label.h</a></div><div class='hunk'>@@ -7,24 +7,28 @@</div><div class='ctx'> #ifndef __ASM_JUMP_LABEL_H</div><div class='ctx'> #define __ASM_JUMP_LABEL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define JUMP_LABEL_NOP_SIZE	4</div><div class='ctx'> </div><div class='del'>-#define JUMP_TABLE_ENTRY				\</div><div class='add'>+/* This macro is also expanded on the Rust side. */</div><div class='add'>+#define JUMP_TABLE_ENTRY(key, label)			\</div><div class='ctx'> 	 ".pushsection	__jump_table, \"aw\"	\n\t"	\</div><div class='ctx'> 	 ".align	3			\n\t"	\</div><div class='del'>-	 ".long		1b - ., %l[l_yes] - .	\n\t"	\</div><div class='del'>-	 ".quad		%0 - .			\n\t"	\</div><div class='add'>+	 ".long		1b - ., " label " - .	\n\t"	\</div><div class='add'>+	 ".quad		" key " - .		\n\t"	\</div><div class='ctx'> 	 ".popsection				\n\t"</div><div class='ctx'> </div><div class='add'>+#define ARCH_STATIC_BRANCH_ASM(key, label)		\</div><div class='add'>+	"1:	nop				\n\t"	\</div><div class='add'>+	JUMP_TABLE_ENTRY(key, label)</div><div class='add'>+</div><div class='ctx'> static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch)</div><div class='ctx'> {</div><div class='ctx'> 	asm goto(</div><div class='del'>-		"1:	nop			\n\t"</div><div class='del'>-		JUMP_TABLE_ENTRY</div><div class='add'>+		ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]")</div><div class='ctx'> 		:  :  "i"(&amp;((char *)key)[branch]) :  : l_yes);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -37,7 +41,7 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke</div><div class='ctx'> {</div><div class='ctx'> 	asm goto(</div><div class='ctx'> 		"1:	b	%l[l_yes]	\n\t"</div><div class='del'>-		JUMP_TABLE_ENTRY</div><div class='add'>+		JUMP_TABLE_ENTRY("%0", "%l[l_yes]")</div><div class='ctx'> 		:  :  "i"(&amp;((char *)key)[branch]) :  : l_yes);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -46,5 +50,5 @@ l_yes:</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='add'>+#endif  /* __ASSEMBLER__ */</div><div class='ctx'> #endif	/* __ASM_JUMP_LABEL_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/kasan.h b/arch/loongarch/include/asm/kasan.h<br/>index cd6084f4e153..0e50e5b5e056 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kasan.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kasan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kasan.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kasan.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_KASAN_H</div><div class='ctx'> #define __ASM_KASAN_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #define XRANGE_SHIFT (48)</div><div class='ctx'> </div><div class='ctx'> /* Valid address length */</div><div class='del'>-#define XRANGE_SHADOW_SHIFT	(PGDIR_SHIFT + PAGE_SHIFT - 3)</div><div class='add'>+#define XRANGE_SHADOW_SHIFT	min(cpu_vabits, VA_BITS)</div><div class='ctx'> /* Used for taking out the valid address */</div><div class='ctx'> #define XRANGE_SHADOW_MASK	GENMASK_ULL(XRANGE_SHADOW_SHIFT - 1, 0)</div><div class='ctx'> /* One segment whole address space size */</div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> /* 64-bit segment value. */</div><div class='ctx'> #define XKPRANGE_UC_SEG		(0x8000)</div><div class='ctx'> #define XKPRANGE_CC_SEG		(0x9000)</div><div class='add'>+#define XKPRANGE_WC_SEG		(0xa000)</div><div class='ctx'> #define XKVRANGE_VC_SEG		(0xffff)</div><div class='ctx'> </div><div class='ctx'> /* Cached */</div><div class='hunk'>@@ -41,23 +42,30 @@</div><div class='ctx'> #define XKPRANGE_UC_SHADOW_SIZE		(XKPRANGE_UC_SIZE &gt;&gt; KASAN_SHADOW_SCALE_SHIFT)</div><div class='ctx'> #define XKPRANGE_UC_SHADOW_END		(XKPRANGE_UC_KASAN_OFFSET + XKPRANGE_UC_SHADOW_SIZE)</div><div class='ctx'> </div><div class='add'>+/* WriteCombine */</div><div class='add'>+#define XKPRANGE_WC_START		WRITECOMBINE_BASE</div><div class='add'>+#define XKPRANGE_WC_SIZE		XRANGE_SIZE</div><div class='add'>+#define XKPRANGE_WC_KASAN_OFFSET	XKPRANGE_UC_SHADOW_END</div><div class='add'>+#define XKPRANGE_WC_SHADOW_SIZE		(XKPRANGE_WC_SIZE &gt;&gt; KASAN_SHADOW_SCALE_SHIFT)</div><div class='add'>+#define XKPRANGE_WC_SHADOW_END		(XKPRANGE_WC_KASAN_OFFSET + XKPRANGE_WC_SHADOW_SIZE)</div><div class='add'>+</div><div class='ctx'> /* VMALLOC (Cached or UnCached)  */</div><div class='ctx'> #define XKVRANGE_VC_START		MODULES_VADDR</div><div class='ctx'> #define XKVRANGE_VC_SIZE		round_up(KFENCE_AREA_END - MODULES_VADDR + 1, PGDIR_SIZE)</div><div class='del'>-#define XKVRANGE_VC_KASAN_OFFSET	XKPRANGE_UC_SHADOW_END</div><div class='add'>+#define XKVRANGE_VC_KASAN_OFFSET	XKPRANGE_WC_SHADOW_END</div><div class='ctx'> #define XKVRANGE_VC_SHADOW_SIZE		(XKVRANGE_VC_SIZE &gt;&gt; KASAN_SHADOW_SCALE_SHIFT)</div><div class='ctx'> #define XKVRANGE_VC_SHADOW_END		(XKVRANGE_VC_KASAN_OFFSET + XKVRANGE_VC_SHADOW_SIZE)</div><div class='ctx'> </div><div class='ctx'> /* KAsan shadow memory start right after vmalloc. */</div><div class='ctx'> #define KASAN_SHADOW_START		round_up(KFENCE_AREA_END, PGDIR_SIZE)</div><div class='ctx'> #define KASAN_SHADOW_SIZE		(XKVRANGE_VC_SHADOW_END - XKPRANGE_CC_KASAN_OFFSET)</div><div class='del'>-#define KASAN_SHADOW_END		round_up(KASAN_SHADOW_START + KASAN_SHADOW_SIZE, PGDIR_SIZE)</div><div class='add'>+#define KASAN_SHADOW_END		(round_up(KASAN_SHADOW_START + KASAN_SHADOW_SIZE, PGDIR_SIZE) - 1)</div><div class='ctx'> </div><div class='ctx'> #define XKPRANGE_CC_SHADOW_OFFSET	(KASAN_SHADOW_START + XKPRANGE_CC_KASAN_OFFSET)</div><div class='ctx'> #define XKPRANGE_UC_SHADOW_OFFSET	(KASAN_SHADOW_START + XKPRANGE_UC_KASAN_OFFSET)</div><div class='add'>+#define XKPRANGE_WC_SHADOW_OFFSET	(KASAN_SHADOW_START + XKPRANGE_WC_KASAN_OFFSET)</div><div class='ctx'> #define XKVRANGE_VC_SHADOW_OFFSET	(KASAN_SHADOW_START + XKVRANGE_VC_KASAN_OFFSET)</div><div class='ctx'> </div><div class='del'>-extern bool kasan_early_stage;</div><div class='ctx'> extern unsigned char kasan_early_shadow_page[PAGE_SIZE];</div><div class='ctx'> </div><div class='ctx'> #define kasan_mem_to_shadow kasan_mem_to_shadow</div><div class='hunk'>@@ -66,12 +74,6 @@ void *kasan_mem_to_shadow(const void *addr);</div><div class='ctx'> #define kasan_shadow_to_mem kasan_shadow_to_mem</div><div class='ctx'> const void *kasan_shadow_to_mem(const void *shadow_addr);</div><div class='ctx'> </div><div class='del'>-#define kasan_arch_is_ready kasan_arch_is_ready</div><div class='del'>-static __always_inline bool kasan_arch_is_ready(void)</div><div class='del'>-{</div><div class='del'>-	return !kasan_early_stage;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define addr_has_metadata addr_has_metadata</div><div class='ctx'> static __always_inline bool addr_has_metadata(const void *addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/include/asm/kexec.h b/arch/loongarch/include/asm/kexec.h<br/>index cf95cd3eb2de..209fa43222e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kexec.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kexec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kexec.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kexec.h</a></div><div class='hunk'>@@ -41,6 +41,18 @@ struct kimage_arch {</div><div class='ctx'> 	unsigned long systable_ptr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KEXEC_FILE</div><div class='add'>+extern const struct kexec_file_ops kexec_efi_ops;</div><div class='add'>+extern const struct kexec_file_ops kexec_elf_ops;</div><div class='add'>+</div><div class='add'>+int arch_kimage_file_post_load_cleanup(struct kimage *image);</div><div class='add'>+#define arch_kimage_file_post_load_cleanup arch_kimage_file_post_load_cleanup</div><div class='add'>+</div><div class='add'>+extern int load_other_segments(struct kimage *image,</div><div class='add'>+		unsigned long kernel_load_addr, unsigned long kernel_size,</div><div class='add'>+		char *initrd, unsigned long initrd_len, char *cmdline, unsigned long cmdline_len);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> typedef void (*do_kexec_t)(unsigned long efi_boot,</div><div class='ctx'> 			   unsigned long cmdline_ptr,</div><div class='ctx'> 			   unsigned long systable_ptr,</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_eiointc.h b/arch/loongarch/include/asm/kvm_eiointc.h<br/>new file mode 100644<br/>index 000000000000..a3a40aba8acf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_eiointc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_eiointc.h</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_KVM_EIOINTC_H</div><div class='add'>+#define __ASM_KVM_EIOINTC_H</div><div class='add'>+</div><div class='add'>+#include &lt;kvm/iodev.h&gt;</div><div class='add'>+</div><div class='add'>+#define EIOINTC_IRQS			256</div><div class='add'>+#define EIOINTC_ROUTE_MAX_VCPUS		256</div><div class='add'>+#define EIOINTC_IRQS_U8_NUMS		(EIOINTC_IRQS / 8)</div><div class='add'>+#define EIOINTC_IRQS_U16_NUMS		(EIOINTC_IRQS_U8_NUMS / 2)</div><div class='add'>+#define EIOINTC_IRQS_U32_NUMS		(EIOINTC_IRQS_U8_NUMS / 4)</div><div class='add'>+#define EIOINTC_IRQS_U64_NUMS		(EIOINTC_IRQS_U8_NUMS / 8)</div><div class='add'>+/* map to ipnum per 32 irqs */</div><div class='add'>+#define EIOINTC_IRQS_NODETYPE_COUNT	16</div><div class='add'>+</div><div class='add'>+#define EIOINTC_BASE			0x1400</div><div class='add'>+#define EIOINTC_SIZE			0x900</div><div class='add'>+</div><div class='add'>+#define EIOINTC_NODETYPE_START		0xa0</div><div class='add'>+#define EIOINTC_NODETYPE_END		0xbf</div><div class='add'>+#define EIOINTC_IPMAP_START		0xc0</div><div class='add'>+#define EIOINTC_IPMAP_END		0xc7</div><div class='add'>+#define EIOINTC_ENABLE_START		0x200</div><div class='add'>+#define EIOINTC_ENABLE_END		0x21f</div><div class='add'>+#define EIOINTC_BOUNCE_START		0x280</div><div class='add'>+#define EIOINTC_BOUNCE_END		0x29f</div><div class='add'>+#define EIOINTC_ISR_START		0x300</div><div class='add'>+#define EIOINTC_ISR_END			0x31f</div><div class='add'>+#define EIOINTC_COREISR_START		0x400</div><div class='add'>+#define EIOINTC_COREISR_END		0x41f</div><div class='add'>+#define EIOINTC_COREMAP_START		0x800</div><div class='add'>+#define EIOINTC_COREMAP_END		0x8ff</div><div class='add'>+</div><div class='add'>+#define EIOINTC_VIRT_BASE		(0x40000000)</div><div class='add'>+#define EIOINTC_VIRT_SIZE		(0x1000)</div><div class='add'>+</div><div class='add'>+#define EIOINTC_VIRT_FEATURES		(0x0)</div><div class='add'>+#define EIOINTC_HAS_VIRT_EXTENSION	(0)</div><div class='add'>+#define EIOINTC_HAS_ENABLE_OPTION	(1)</div><div class='add'>+#define EIOINTC_HAS_INT_ENCODE		(2)</div><div class='add'>+#define EIOINTC_HAS_CPU_ENCODE		(3)</div><div class='add'>+#define EIOINTC_VIRT_HAS_FEATURES	((1U &lt;&lt; EIOINTC_HAS_VIRT_EXTENSION) \</div><div class='add'>+					| (1U &lt;&lt; EIOINTC_HAS_ENABLE_OPTION) \</div><div class='add'>+					| (1U &lt;&lt; EIOINTC_HAS_INT_ENCODE)    \</div><div class='add'>+					| (1U &lt;&lt; EIOINTC_HAS_CPU_ENCODE))</div><div class='add'>+#define EIOINTC_VIRT_CONFIG		(0x4)</div><div class='add'>+#define EIOINTC_ENABLE			(1)</div><div class='add'>+#define EIOINTC_ENABLE_INT_ENCODE	(2)</div><div class='add'>+#define EIOINTC_ENABLE_CPU_ENCODE	(3)</div><div class='add'>+</div><div class='add'>+#define LOONGSON_IP_NUM			8</div><div class='add'>+</div><div class='add'>+struct loongarch_eiointc {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct kvm_io_device device;</div><div class='add'>+	struct kvm_io_device device_vext;</div><div class='add'>+	uint32_t num_cpu;</div><div class='add'>+	uint32_t features;</div><div class='add'>+	uint32_t status;</div><div class='add'>+</div><div class='add'>+	/* hardware state */</div><div class='add'>+	union nodetype {</div><div class='add'>+		u64 reg_u64[EIOINTC_IRQS_NODETYPE_COUNT / 4];</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS_NODETYPE_COUNT / 2];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS_NODETYPE_COUNT];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS_NODETYPE_COUNT * 2];</div><div class='add'>+	} nodetype;</div><div class='add'>+</div><div class='add'>+	/* one bit shows the state of one irq */</div><div class='add'>+	union bounce {</div><div class='add'>+		u64 reg_u64[EIOINTC_IRQS_U64_NUMS];</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS_U32_NUMS];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS_U16_NUMS];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS_U8_NUMS];</div><div class='add'>+	} bounce;</div><div class='add'>+</div><div class='add'>+	union isr {</div><div class='add'>+		u64 reg_u64[EIOINTC_IRQS_U64_NUMS];</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS_U32_NUMS];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS_U16_NUMS];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS_U8_NUMS];</div><div class='add'>+	} isr;</div><div class='add'>+	union coreisr {</div><div class='add'>+		u64 reg_u64[EIOINTC_ROUTE_MAX_VCPUS][EIOINTC_IRQS_U64_NUMS];</div><div class='add'>+		u32 reg_u32[EIOINTC_ROUTE_MAX_VCPUS][EIOINTC_IRQS_U32_NUMS];</div><div class='add'>+		u16 reg_u16[EIOINTC_ROUTE_MAX_VCPUS][EIOINTC_IRQS_U16_NUMS];</div><div class='add'>+		u8 reg_u8[EIOINTC_ROUTE_MAX_VCPUS][EIOINTC_IRQS_U8_NUMS];</div><div class='add'>+	} coreisr;</div><div class='add'>+	union enable {</div><div class='add'>+		u64 reg_u64[EIOINTC_IRQS_U64_NUMS];</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS_U32_NUMS];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS_U16_NUMS];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS_U8_NUMS];</div><div class='add'>+	} enable;</div><div class='add'>+</div><div class='add'>+	/* use one byte to config ipmap for 32 irqs at once */</div><div class='add'>+	union ipmap {</div><div class='add'>+		u64 reg_u64;</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS_U32_NUMS / 4];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS_U16_NUMS / 4];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS_U8_NUMS / 4];</div><div class='add'>+	} ipmap;</div><div class='add'>+	/* use one byte to config coremap for one irq */</div><div class='add'>+	union coremap {</div><div class='add'>+		u64 reg_u64[EIOINTC_IRQS / 8];</div><div class='add'>+		u32 reg_u32[EIOINTC_IRQS / 4];</div><div class='add'>+		u16 reg_u16[EIOINTC_IRQS / 2];</div><div class='add'>+		u8 reg_u8[EIOINTC_IRQS];</div><div class='add'>+	} coremap;</div><div class='add'>+</div><div class='add'>+	DECLARE_BITMAP(sw_coreisr[EIOINTC_ROUTE_MAX_VCPUS][LOONGSON_IP_NUM], EIOINTC_IRQS);</div><div class='add'>+	uint8_t  sw_coremap[EIOINTC_IRQS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_eiointc_device(void);</div><div class='add'>+void eiointc_set_irq(struct loongarch_eiointc *s, int irq, int level);</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_KVM_EIOINTC_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include/asm/kvm_host.h<br/>index d6bb72424027..0cecbd038bb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_host.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_host.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -12,14 +12,20 @@</div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_types.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ipi.h&gt;</div><div class='add'>+#include &lt;asm/kvm_eiointc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pch_pic.h&gt;</div><div class='ctx'> #include &lt;asm/loongarch.h&gt;</div><div class='ctx'> </div><div class='add'>+#define __KVM_HAVE_ARCH_INTC_INITIALIZED</div><div class='add'>+</div><div class='ctx'> /* Loongarch KVM register ids */</div><div class='ctx'> #define KVM_GET_IOC_CSR_IDX(id)		((id &amp; KVM_CSR_IDX_MASK) &gt;&gt; LOONGARCH_REG_SHIFT)</div><div class='ctx'> #define KVM_GET_IOC_CPUCFG_IDX(id)	((id &amp; KVM_CPUCFG_IDX_MASK) &gt;&gt; LOONGARCH_REG_SHIFT)</div><div class='hunk'>@@ -53,6 +59,12 @@ struct kvm_vcpu_stat {</div><div class='ctx'> 	u64 cpucfg_exits;</div><div class='ctx'> 	u64 signal_exits;</div><div class='ctx'> 	u64 hypercall_exits;</div><div class='add'>+	u64 ipi_read_exits;</div><div class='add'>+	u64 ipi_write_exits;</div><div class='add'>+	u64 eiointc_read_exits;</div><div class='add'>+	u64 eiointc_write_exits;</div><div class='add'>+	u64 pch_pic_read_exits;</div><div class='add'>+	u64 pch_pic_write_exits;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define KVM_MEM_HUGEPAGE_CAPABLE	(1UL &lt;&lt; 0)</div><div class='hunk'>@@ -84,7 +96,7 @@ struct kvm_world_switch {</div><div class='ctx'>  *</div><div class='ctx'>  *  For LOONGARCH_CSR_CPUID register, max CPUID size if 512</div><div class='ctx'>  *  For IPI hardware, max destination CPUID size 1024</div><div class='del'>- *  For extioi interrupt controller, max destination CPUID size is 256</div><div class='add'>+ *  For eiointc interrupt controller, max destination CPUID size is 256</div><div class='ctx'>  *  For msgint interrupt controller, max supported CPUID size is 65536</div><div class='ctx'>  *</div><div class='ctx'>  * Currently max CPUID is defined as 256 for KVM hypervisor, in future</div><div class='hunk'>@@ -117,6 +129,9 @@ struct kvm_arch {</div><div class='ctx'> </div><div class='ctx'> 	s64 time_offset;</div><div class='ctx'> 	struct kvm_context __percpu *vmcs;</div><div class='add'>+	struct loongarch_ipi *ipi;</div><div class='add'>+	struct loongarch_eiointc *eiointc;</div><div class='add'>+	struct loongarch_pch_pic *pch_pic;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define CSR_MAX_NUMS		0x800</div><div class='hunk'>@@ -148,6 +163,7 @@ enum emulation_result {</div><div class='ctx'> #define LOONGARCH_PV_FEAT_UPDATED	BIT_ULL(63)</div><div class='ctx'> #define LOONGARCH_PV_FEAT_MASK		(BIT(KVM_FEATURE_IPI) |		\</div><div class='ctx'> 					 BIT(KVM_FEATURE_STEAL_TIME) |	\</div><div class='add'>+					 BIT(KVM_FEATURE_USER_HCALL) |	\</div><div class='ctx'> 					 BIT(KVM_FEATURE_VIRT_EXTIOI))</div><div class='ctx'> </div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='hunk'>@@ -161,6 +177,9 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	/* Pointers stored here for easy accessing from assembly code */</div><div class='ctx'> 	int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+	/* GPA (=HVA) of PGD for secondary mmu */</div><div class='add'>+	unsigned long kvm_pgd;</div><div class='add'>+</div><div class='ctx'> 	/* Host registers preserved across guest mode execution */</div><div class='ctx'> 	unsigned long host_sp;</div><div class='ctx'> 	unsigned long host_tp;</div><div class='hunk'>@@ -221,6 +240,8 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	int last_sched_cpu;</div><div class='ctx'> 	/* mp state */</div><div class='ctx'> 	struct kvm_mp_state mp_state;</div><div class='add'>+	/* ipi state */</div><div class='add'>+	struct ipi_state ipi_state;</div><div class='ctx'> 	/* cpucfg */</div><div class='ctx'> 	u32 cpucfg[KVM_MAX_CPUCFG_REGS];</div><div class='ctx'> </div><div class='hunk'>@@ -272,13 +293,15 @@ static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch)</div><div class='ctx'> 	return (arch-&gt;cpucfg[6] &amp; CPUCFG6_PMNUM) &gt;&gt; CPUCFG6_PMNUM_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='ctx'> /* Debug: dump vcpu state */</div><div class='ctx'> int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> /* MMU handling */</div><div class='ctx'> void kvm_flush_tlb_all(void);</div><div class='ctx'> void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa);</div><div class='del'>-int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write);</div><div class='add'>+int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode);</div><div class='ctx'> </div><div class='ctx'> int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable);</div><div class='ctx'> int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);</div><div class='hunk'>@@ -303,7 +326,6 @@ static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch)</div><div class='ctx'> </div><div class='ctx'> /* Misc */</div><div class='ctx'> static inline void kvm_arch_hardware_unsetup(void) {}</div><div class='del'>-static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}</div><div class='ctx'> static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}</div><div class='ctx'> static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_ipi.h b/arch/loongarch/include/asm/kvm_ipi.h<br/>new file mode 100644<br/>index 000000000000..060163dfb4a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_ipi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_ipi.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_KVM_IPI_H</div><div class='add'>+#define __ASM_KVM_IPI_H</div><div class='add'>+</div><div class='add'>+#include &lt;kvm/iodev.h&gt;</div><div class='add'>+</div><div class='add'>+#define LARCH_INT_IPI			12</div><div class='add'>+</div><div class='add'>+struct loongarch_ipi {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct kvm_io_device device;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ipi_state {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	uint32_t status;</div><div class='add'>+	uint32_t en;</div><div class='add'>+	uint32_t set;</div><div class='add'>+	uint32_t clear;</div><div class='add'>+	uint64_t buf[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IOCSR_IPI_BASE		0x1000</div><div class='add'>+#define IOCSR_IPI_SIZE		0x160</div><div class='add'>+</div><div class='add'>+#define IOCSR_IPI_STATUS	0x000</div><div class='add'>+#define IOCSR_IPI_EN		0x004</div><div class='add'>+#define IOCSR_IPI_SET		0x008</div><div class='add'>+#define IOCSR_IPI_CLEAR		0x00c</div><div class='add'>+#define IOCSR_IPI_BUF_20	0x020</div><div class='add'>+#define IOCSR_IPI_BUF_28	0x028</div><div class='add'>+#define IOCSR_IPI_BUF_30	0x030</div><div class='add'>+#define IOCSR_IPI_BUF_38	0x038</div><div class='add'>+#define IOCSR_IPI_SEND		0x040</div><div class='add'>+#define IOCSR_MAIL_SEND		0x048</div><div class='add'>+#define IOCSR_ANY_SEND		0x158</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_ipi_device(void);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_mmu.h b/arch/loongarch/include/asm/kvm_mmu.h<br/>index 099bafc6f797..e36cc7e8ed20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_mmu.h</a></div><div class='hunk'>@@ -16,6 +16,13 @@</div><div class='ctx'>  */</div><div class='ctx'> #define KVM_MMU_CACHE_MIN_PAGES	(CONFIG_PGTABLE_LEVELS - 1)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * _PAGE_MODIFIED is a SW pte bit, it records page ever written on host</div><div class='add'>+ * kernel, on secondary MMU it records the page writeable attribute, in</div><div class='add'>+ * order for fast path handling.</div><div class='add'>+ */</div><div class='add'>+#define KVM_PAGE_WRITEABLE	_PAGE_MODIFIED</div><div class='add'>+</div><div class='ctx'> #define _KVM_FLUSH_PGTABLE	0x1</div><div class='ctx'> #define _KVM_HAS_PGMASK		0x2</div><div class='ctx'> #define kvm_pfn_pte(pfn, prot)	(((pfn) &lt;&lt; PFN_PTE_SHIFT) | pgprot_val(prot))</div><div class='hunk'>@@ -52,10 +59,10 @@ static inline void kvm_set_pte(kvm_pte_t *ptep, kvm_pte_t val)</div><div class='ctx'> 	WRITE_ONCE(*ptep, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int kvm_pte_write(kvm_pte_t pte) { return pte &amp; _PAGE_WRITE; }</div><div class='del'>-static inline int kvm_pte_dirty(kvm_pte_t pte) { return pte &amp; _PAGE_DIRTY; }</div><div class='ctx'> static inline int kvm_pte_young(kvm_pte_t pte) { return pte &amp; _PAGE_ACCESSED; }</div><div class='ctx'> static inline int kvm_pte_huge(kvm_pte_t pte) { return pte &amp; _PAGE_HUGE; }</div><div class='add'>+static inline int kvm_pte_dirty(kvm_pte_t pte) { return pte &amp; __WRITEABLE; }</div><div class='add'>+static inline int kvm_pte_writeable(kvm_pte_t pte) { return pte &amp; KVM_PAGE_WRITEABLE; }</div><div class='ctx'> </div><div class='ctx'> static inline kvm_pte_t kvm_pte_mkyoung(kvm_pte_t pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -69,12 +76,12 @@ static inline kvm_pte_t kvm_pte_mkold(kvm_pte_t pte)</div><div class='ctx'> </div><div class='ctx'> static inline kvm_pte_t kvm_pte_mkdirty(kvm_pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte | _PAGE_DIRTY;</div><div class='add'>+	return pte | __WRITEABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline kvm_pte_t kvm_pte_mkclean(kvm_pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte &amp; ~_PAGE_DIRTY;</div><div class='add'>+	return pte &amp; ~__WRITEABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline kvm_pte_t kvm_pte_mkhuge(kvm_pte_t pte)</div><div class='hunk'>@@ -87,6 +94,11 @@ static inline kvm_pte_t kvm_pte_mksmall(kvm_pte_t pte)</div><div class='ctx'> 	return pte &amp; ~_PAGE_HUGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline kvm_pte_t kvm_pte_mkwriteable(kvm_pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return pte | KVM_PAGE_WRITEABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int kvm_need_flush(kvm_ptw_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	return ctx-&gt;flag &amp; _KVM_FLUSH_PGTABLE;</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_para.h b/arch/loongarch/include/asm/kvm_para.h<br/>index c4e84227280d..3e4b397f423f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_para.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_para.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_para.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #define KVM_HCALL_CODE_SERVICE		0</div><div class='ctx'> #define KVM_HCALL_CODE_SWDBG		1</div><div class='add'>+#define KVM_HCALL_CODE_USER_SERVICE	2</div><div class='ctx'> </div><div class='ctx'> #define KVM_HCALL_SERVICE		HYPERCALL_ENCODE(HYPERVISOR_KVM, KVM_HCALL_CODE_SERVICE)</div><div class='ctx'> #define  KVM_HCALL_FUNC_IPI		1</div><div class='hunk'>@@ -20,6 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> #define KVM_HCALL_SWDBG			HYPERCALL_ENCODE(HYPERVISOR_KVM, KVM_HCALL_CODE_SWDBG)</div><div class='ctx'> </div><div class='add'>+#define KVM_HCALL_USER_SERVICE		HYPERCALL_ENCODE(HYPERVISOR_KVM, KVM_HCALL_CODE_USER_SERVICE)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * LoongArch hypercall return code</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_pch_pic.h b/arch/loongarch/include/asm/kvm_pch_pic.h<br/>new file mode 100644<br/>index 000000000000..7f33a3039272<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_pch_pic.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_pch_pic.h</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_KVM_PCH_PIC_H</div><div class='add'>+#define __ASM_KVM_PCH_PIC_H</div><div class='add'>+</div><div class='add'>+#include &lt;kvm/iodev.h&gt;</div><div class='add'>+</div><div class='add'>+#define PCH_PIC_SIZE			0x3e8</div><div class='add'>+</div><div class='add'>+#define PCH_PIC_INT_ID_START		0x0</div><div class='add'>+#define PCH_PIC_INT_ID_END		0x7</div><div class='add'>+#define PCH_PIC_MASK_START		0x20</div><div class='add'>+#define PCH_PIC_MASK_END		0x27</div><div class='add'>+#define PCH_PIC_HTMSI_EN_START		0x40</div><div class='add'>+#define PCH_PIC_HTMSI_EN_END		0x47</div><div class='add'>+#define PCH_PIC_EDGE_START		0x60</div><div class='add'>+#define PCH_PIC_EDGE_END		0x67</div><div class='add'>+#define PCH_PIC_CLEAR_START		0x80</div><div class='add'>+#define PCH_PIC_CLEAR_END		0x87</div><div class='add'>+#define PCH_PIC_AUTO_CTRL0_START	0xc0</div><div class='add'>+#define PCH_PIC_AUTO_CTRL0_END		0xc7</div><div class='add'>+#define PCH_PIC_AUTO_CTRL1_START	0xe0</div><div class='add'>+#define PCH_PIC_AUTO_CTRL1_END		0xe7</div><div class='add'>+#define PCH_PIC_ROUTE_ENTRY_START	0x100</div><div class='add'>+#define PCH_PIC_ROUTE_ENTRY_END		0x13f</div><div class='add'>+#define PCH_PIC_HTMSI_VEC_START		0x200</div><div class='add'>+#define PCH_PIC_HTMSI_VEC_END		0x23f</div><div class='add'>+#define PCH_PIC_INT_IRR_START		0x380</div><div class='add'>+#define PCH_PIC_INT_IRR_END		0x38f</div><div class='add'>+#define PCH_PIC_INT_ISR_START		0x3a0</div><div class='add'>+#define PCH_PIC_INT_ISR_END		0x3af</div><div class='add'>+#define PCH_PIC_POLARITY_START		0x3e0</div><div class='add'>+#define PCH_PIC_POLARITY_END		0x3e7</div><div class='add'>+#define PCH_PIC_INT_ID_VAL		0x7UL</div><div class='add'>+#define PCH_PIC_INT_ID_VER		0x1UL</div><div class='add'>+</div><div class='add'>+union pch_pic_id {</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t reserved_0[3];</div><div class='add'>+		uint8_t id;</div><div class='add'>+		uint8_t version;</div><div class='add'>+		uint8_t reserved_1;</div><div class='add'>+		uint8_t irq_num;</div><div class='add'>+		uint8_t reserved_2;</div><div class='add'>+	} desc;</div><div class='add'>+	uint64_t data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct loongarch_pch_pic {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct kvm_io_device device;</div><div class='add'>+	union pch_pic_id id;</div><div class='add'>+	uint64_t mask; /* 1:disable irq, 0:enable irq */</div><div class='add'>+	uint64_t htmsi_en; /* 1:msi */</div><div class='add'>+	uint64_t edge; /* 1:edge triggered, 0:level triggered */</div><div class='add'>+	uint64_t auto_ctrl0; /* only use default value 00b */</div><div class='add'>+	uint64_t auto_ctrl1; /* only use default value 00b */</div><div class='add'>+	uint64_t last_intirr; /* edge detection */</div><div class='add'>+	uint64_t irr; /* interrupt request register */</div><div class='add'>+	uint64_t isr; /* interrupt service register */</div><div class='add'>+	uint64_t polarity; /* 0: high level trigger, 1: low level trigger */</div><div class='add'>+	uint8_t  route_entry[64]; /* default value 0, route to int0: eiointc */</div><div class='add'>+	uint8_t  htmsi_vector[64]; /* irq route table for routing to eiointc */</div><div class='add'>+	uint64_t pch_pic_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_pch_pic_device(void);</div><div class='add'>+void pch_pic_set_irq(struct loongarch_pch_pic *s, int irq, int level);</div><div class='add'>+void pch_msi_set_irq(struct kvm *kvm, int irq, int level);</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_KVM_PCH_PIC_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_vcpu.h b/arch/loongarch/include/asm/kvm_vcpu.h<br/>index d7e8f7d50ee0..f1efd7cfbc20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_vcpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/kvm_vcpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/kvm_vcpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/kvm_vcpu.h</a></div><div class='hunk'>@@ -37,12 +37,13 @@</div><div class='ctx'> #define KVM_LOONGSON_IRQ_NUM_MASK	0xffff</div><div class='ctx'> </div><div class='ctx'> typedef union loongarch_instruction  larch_inst;</div><div class='del'>-typedef int (*exit_handle_fn)(struct kvm_vcpu *);</div><div class='add'>+typedef int (*exit_handle_fn)(struct kvm_vcpu *, int);</div><div class='ctx'> </div><div class='ctx'> int  kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst);</div><div class='ctx'> int  kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst);</div><div class='ctx'> int  kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run);</div><div class='ctx'> int  kvm_complete_iocsr_read(struct kvm_vcpu *vcpu, struct kvm_run *run);</div><div class='add'>+int  kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run);</div><div class='ctx'> int  kvm_emu_idle(struct kvm_vcpu *vcpu);</div><div class='ctx'> int  kvm_pending_timer(struct kvm_vcpu *vcpu);</div><div class='ctx'> int  kvm_handle_fault(struct kvm_vcpu *vcpu, int fault);</div><div class='head'>diff --git a/arch/loongarch/include/asm/lbt.h b/arch/loongarch/include/asm/lbt.h<br/>index e671978bf552..38566574e562 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/lbt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/lbt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/lbt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/lbt.h</a></div><div class='hunk'>@@ -12,9 +12,13 @@</div><div class='ctx'> #include &lt;asm/loongarch.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='del'>-extern void _init_lbt(void);</div><div class='del'>-extern void _save_lbt(struct loongarch_lbt *);</div><div class='del'>-extern void _restore_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage void _init_lbt(void);</div><div class='add'>+asmlinkage void _save_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage void _restore_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage int _save_lbt_context(void __user *regs, void __user *eflags);</div><div class='add'>+asmlinkage int _restore_lbt_context(void __user *regs, void __user *eflags);</div><div class='add'>+asmlinkage int _save_ftop_context(void __user *ftop);</div><div class='add'>+asmlinkage int _restore_ftop_context(void __user *ftop);</div><div class='ctx'> </div><div class='ctx'> static inline int is_lbt_enabled(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h<br/>index 26542413a5b0..09dfd7eb406e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/loongarch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/loongarch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/loongarch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/loongarch.h</a></div><div class='hunk'>@@ -9,15 +9,15 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;larchintrin.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* CPUCFG */</div><div class='ctx'> #define read_cpucfg(reg) __cpucfg(reg)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* LoongArch Registers */</div><div class='ctx'> #define REG_ZERO	0x0</div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> #define REG_S7		0x1e</div><div class='ctx'> #define REG_S8		0x1f</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Bit fields for CPUCFG registers */</div><div class='ctx'> #define LOONGARCH_CPUCFG0		0x0</div><div class='hunk'>@@ -108,6 +108,12 @@</div><div class='ctx'> #define  CPUCFG3_SPW_HG_HF		BIT(11)</div><div class='ctx'> #define  CPUCFG3_RVA			BIT(12)</div><div class='ctx'> #define  CPUCFG3_RVAMAX			GENMASK(16, 13)</div><div class='add'>+#define  CPUCFG3_ALDORDER_CAP		BIT(18) /* All address load ordered, capability */</div><div class='add'>+#define  CPUCFG3_ASTORDER_CAP		BIT(19) /* All address store ordered, capability */</div><div class='add'>+#define  CPUCFG3_ALDORDER_STA		BIT(20) /* All address load ordered, status */</div><div class='add'>+#define  CPUCFG3_ASTORDER_STA		BIT(21) /* All address store ordered, status */</div><div class='add'>+#define  CPUCFG3_SLDORDER_CAP		BIT(22) /* Same address load ordered, capability */</div><div class='add'>+#define  CPUCFG3_SLDORDER_STA		BIT(23) /* Same address load ordered, status */</div><div class='ctx'> </div><div class='ctx'> #define LOONGARCH_CPUCFG4		0x4</div><div class='ctx'> #define  CPUCFG4_CCFREQ			GENMASK(31, 0)</div><div class='hunk'>@@ -165,7 +171,7 @@</div><div class='ctx'>  * SW emulation for KVM hypervirsor, see arch/loongarch/include/uapi/asm/kvm_para.h</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* CSR */</div><div class='ctx'> #define csr_read32(reg) __csrrd_w(reg)</div><div class='hunk'>@@ -181,7 +187,7 @@</div><div class='ctx'> #define iocsr_write32(val, reg) __iocsrwr_w(val, reg)</div><div class='ctx'> #define iocsr_write64(val, reg) __iocsrwr_d(val, reg)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* CSR register number */</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +256,7 @@</div><div class='ctx'> #define  CSR_ESTAT_IS_WIDTH		15</div><div class='ctx'> #define  CSR_ESTAT_IS			(_ULCAST_(0x7fff) &lt;&lt; CSR_ESTAT_IS_SHIFT)</div><div class='ctx'> </div><div class='del'>-#define LOONGARCH_CSR_ERA		0x6	/* ERA */</div><div class='add'>+#define LOONGARCH_CSR_ERA		0x6	/* Exception return address */</div><div class='ctx'> </div><div class='ctx'> #define LOONGARCH_CSR_BADV		0x7	/* Bad virtual address */</div><div class='ctx'> </div><div class='hunk'>@@ -405,8 +411,8 @@</div><div class='ctx'> </div><div class='ctx'> /* Config CSR registers */</div><div class='ctx'> #define LOONGARCH_CSR_CPUID		0x20	/* CPU core id */</div><div class='del'>-#define  CSR_CPUID_COREID_WIDTH		9</div><div class='del'>-#define  CSR_CPUID_COREID		_ULCAST_(0x1ff)</div><div class='add'>+#define  CSR_CPUID_COREID_WIDTH		11</div><div class='add'>+#define  CSR_CPUID_COREID		_ULCAST_(0x7ff)</div><div class='ctx'> </div><div class='ctx'> #define LOONGARCH_CSR_PRCFG1		0x21	/* Config1 */</div><div class='ctx'> #define  CSR_CONF1_VSMAX_SHIFT		12</div><div class='hunk'>@@ -445,6 +451,13 @@</div><div class='ctx'> #define LOONGARCH_CSR_KS6		0x36</div><div class='ctx'> #define LOONGARCH_CSR_KS7		0x37</div><div class='ctx'> #define LOONGARCH_CSR_KS8		0x38</div><div class='add'>+#define LOONGARCH_CSR_KS9		0x39</div><div class='add'>+#define LOONGARCH_CSR_KS10		0x3a</div><div class='add'>+#define LOONGARCH_CSR_KS11		0x3b</div><div class='add'>+#define LOONGARCH_CSR_KS12		0x3c</div><div class='add'>+#define LOONGARCH_CSR_KS13		0x3d</div><div class='add'>+#define LOONGARCH_CSR_KS14		0x3e</div><div class='add'>+#define LOONGARCH_CSR_KS15		0x3f</div><div class='ctx'> </div><div class='ctx'> /* Exception allocated KS0, KS1 and KS2 statically */</div><div class='ctx'> #define EXCEPTION_KS0			LOONGARCH_CSR_KS0</div><div class='hunk'>@@ -466,7 +479,6 @@</div><div class='ctx'> </div><div class='ctx'> #define LOONGARCH_CSR_TCFG		0x41	/* Timer config */</div><div class='ctx'> #define  CSR_TCFG_VAL_SHIFT		2</div><div class='del'>-#define	 CSR_TCFG_VAL_WIDTH		48</div><div class='ctx'> #define  CSR_TCFG_VAL			(_ULCAST_(0x3fffffffffff) &lt;&lt; CSR_TCFG_VAL_SHIFT)</div><div class='ctx'> #define  CSR_TCFG_PERIOD_SHIFT		1</div><div class='ctx'> #define  CSR_TCFG_PERIOD		(_ULCAST_(0x1) &lt;&lt; CSR_TCFG_PERIOD_SHIFT)</div><div class='hunk'>@@ -566,6 +578,15 @@</div><div class='ctx'> </div><div class='ctx'> /* Implement dependent */</div><div class='ctx'> #define LOONGARCH_CSR_IMPCTL1		0x80	/* Loongson config1 */</div><div class='add'>+#define  CSR_LDSTORDER_SHIFT		28</div><div class='add'>+#define  CSR_LDSTORDER_WIDTH		3</div><div class='add'>+#define  CSR_LDSTORDER_MASK		(_ULCAST_(0x7) &lt;&lt; CSR_LDSTORDER_SHIFT)</div><div class='add'>+#define  CSR_LDSTORDER_NLD_NST		(_ULCAST_(0x0) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 000 = No Load No Store */</div><div class='add'>+#define  CSR_LDSTORDER_ALD_NST		(_ULCAST_(0x1) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 001 = All Load No Store */</div><div class='add'>+#define  CSR_LDSTORDER_SLD_NST		(_ULCAST_(0x3) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 011 = Same Load No Store */</div><div class='add'>+#define  CSR_LDSTORDER_NLD_AST		(_ULCAST_(0x4) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 100 = No Load All Store */</div><div class='add'>+#define  CSR_LDSTORDER_ALD_AST		(_ULCAST_(0x5) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 101 = All Load All Store */</div><div class='add'>+#define  CSR_LDSTORDER_SLD_AST		(_ULCAST_(0x7) &lt;&lt; CSR_LDSTORDER_SHIFT) /* 111 = Same Load All Store */</div><div class='ctx'> #define  CSR_MISPEC_SHIFT		20</div><div class='ctx'> #define  CSR_MISPEC_WIDTH		8</div><div class='ctx'> #define  CSR_MISPEC			(_ULCAST_(0xff) &lt;&lt; CSR_MISPEC_SHIFT)</div><div class='hunk'>@@ -959,6 +980,36 @@</div><div class='ctx'> #define LOONGARCH_CSR_DB7CTRL		0x34a	/* data breakpoint 7 control */</div><div class='ctx'> #define LOONGARCH_CSR_DB7ASID		0x34b	/* data breakpoint 7 asid */</div><div class='ctx'> </div><div class='add'>+#define LOONGARCH_CSR_DB8ADDR		0x350	/* data breakpoint 8 address */</div><div class='add'>+#define LOONGARCH_CSR_DB8MASK		0x351	/* data breakpoint 8 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB8CTRL		0x352	/* data breakpoint 8 control */</div><div class='add'>+#define LOONGARCH_CSR_DB8ASID		0x353	/* data breakpoint 8 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_DB9ADDR		0x358	/* data breakpoint 9 address */</div><div class='add'>+#define LOONGARCH_CSR_DB9MASK		0x359	/* data breakpoint 9 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB9CTRL		0x35a	/* data breakpoint 9 control */</div><div class='add'>+#define LOONGARCH_CSR_DB9ASID		0x35b	/* data breakpoint 9 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_DB10ADDR		0x360	/* data breakpoint 10 address */</div><div class='add'>+#define LOONGARCH_CSR_DB10MASK		0x361	/* data breakpoint 10 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB10CTRL		0x362	/* data breakpoint 10 control */</div><div class='add'>+#define LOONGARCH_CSR_DB10ASID		0x363	/* data breakpoint 10 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_DB11ADDR		0x368	/* data breakpoint 11 address */</div><div class='add'>+#define LOONGARCH_CSR_DB11MASK		0x369	/* data breakpoint 11 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB11CTRL		0x36a	/* data breakpoint 11 control */</div><div class='add'>+#define LOONGARCH_CSR_DB11ASID		0x36b	/* data breakpoint 11 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_DB12ADDR		0x370	/* data breakpoint 12 address */</div><div class='add'>+#define LOONGARCH_CSR_DB12MASK		0x371	/* data breakpoint 12 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB12CTRL		0x372	/* data breakpoint 12 control */</div><div class='add'>+#define LOONGARCH_CSR_DB12ASID		0x373	/* data breakpoint 12 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_DB13ADDR		0x378	/* data breakpoint 13 address */</div><div class='add'>+#define LOONGARCH_CSR_DB13MASK		0x379	/* data breakpoint 13 mask */</div><div class='add'>+#define LOONGARCH_CSR_DB13CTRL		0x37a	/* data breakpoint 13 control */</div><div class='add'>+#define LOONGARCH_CSR_DB13ASID		0x37b	/* data breakpoint 13 asid */</div><div class='add'>+</div><div class='ctx'> #define LOONGARCH_CSR_FWPC		0x380	/* instruction breakpoint config */</div><div class='ctx'> #define LOONGARCH_CSR_FWPS		0x381	/* instruction breakpoint status */</div><div class='ctx'> </div><div class='hunk'>@@ -1002,6 +1053,36 @@</div><div class='ctx'> #define LOONGARCH_CSR_IB7CTRL		0x3ca	/* inst breakpoint 7 control */</div><div class='ctx'> #define LOONGARCH_CSR_IB7ASID		0x3cb	/* inst breakpoint 7 asid */</div><div class='ctx'> </div><div class='add'>+#define LOONGARCH_CSR_IB8ADDR		0x3d0	/* inst breakpoint 8 address */</div><div class='add'>+#define LOONGARCH_CSR_IB8MASK		0x3d1	/* inst breakpoint 8 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB8CTRL		0x3d2	/* inst breakpoint 8 control */</div><div class='add'>+#define LOONGARCH_CSR_IB8ASID		0x3d3	/* inst breakpoint 8 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_IB9ADDR		0x3d8	/* inst breakpoint 9 address */</div><div class='add'>+#define LOONGARCH_CSR_IB9MASK		0x3d9	/* inst breakpoint 9 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB9CTRL		0x3da	/* inst breakpoint 9 control */</div><div class='add'>+#define LOONGARCH_CSR_IB9ASID		0x3db	/* inst breakpoint 9 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_IB10ADDR		0x3e0	/* inst breakpoint 10 address */</div><div class='add'>+#define LOONGARCH_CSR_IB10MASK		0x3e1	/* inst breakpoint 10 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB10CTRL		0x3e2	/* inst breakpoint 10 control */</div><div class='add'>+#define LOONGARCH_CSR_IB10ASID		0x3e3	/* inst breakpoint 10 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_IB11ADDR		0x3e8	/* inst breakpoint 11 address */</div><div class='add'>+#define LOONGARCH_CSR_IB11MASK		0x3e9	/* inst breakpoint 11 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB11CTRL		0x3ea	/* inst breakpoint 11 control */</div><div class='add'>+#define LOONGARCH_CSR_IB11ASID		0x3eb	/* inst breakpoint 11 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_IB12ADDR		0x3f0	/* inst breakpoint 12 address */</div><div class='add'>+#define LOONGARCH_CSR_IB12MASK		0x3f1	/* inst breakpoint 12 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB12CTRL		0x3f2	/* inst breakpoint 12 control */</div><div class='add'>+#define LOONGARCH_CSR_IB12ASID		0x3f3	/* inst breakpoint 12 asid */</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_CSR_IB13ADDR		0x3f8	/* inst breakpoint 13 address */</div><div class='add'>+#define LOONGARCH_CSR_IB13MASK		0x3f9	/* inst breakpoint 13 mask */</div><div class='add'>+#define LOONGARCH_CSR_IB13CTRL		0x3fa	/* inst breakpoint 13 control */</div><div class='add'>+#define LOONGARCH_CSR_IB13ASID		0x3fb	/* inst breakpoint 13 asid */</div><div class='add'>+</div><div class='ctx'> #define LOONGARCH_CSR_DEBUG		0x500	/* debug config */</div><div class='ctx'> #define LOONGARCH_CSR_DERA		0x501	/* debug era */</div><div class='ctx'> #define LOONGARCH_CSR_DESAVE		0x502	/* debug save */</div><div class='hunk'>@@ -1121,7 +1202,7 @@</div><div class='ctx'> #define LOONGARCH_IOCSR_EXTIOI_ROUTE_BASE	0x1c00</div><div class='ctx'> #define IOCSR_EXTIOI_VECTOR_NUM			256</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 drdtime(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1283,7 +1364,7 @@ __BUILD_CSR_OP(tlbidx)</div><div class='ctx'> #define clear_csr_estat(val)	\</div><div class='ctx'> 	csr_xchg32(~(val), val, LOONGARCH_CSR_ESTAT)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Generic EntryLo bit definitions */</div><div class='ctx'> #define ENTRYLO_V		(_ULCAST_(1) &lt;&lt; 0)</div><div class='head'>diff --git a/arch/loongarch/include/asm/numa.h b/arch/loongarch/include/asm/numa.h<br/>index b5f9de9f102e..bbf9f70bd25f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/numa.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/numa.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/numa.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/numa.h</a></div><div class='hunk'>@@ -22,20 +22,6 @@ extern int numa_off;</div><div class='ctx'> extern s16 __cpuid_to_node[CONFIG_NR_CPUS];</div><div class='ctx'> extern nodemask_t numa_nodes_parsed __initdata;</div><div class='ctx'> </div><div class='del'>-struct numa_memblk {</div><div class='del'>-	u64			start;</div><div class='del'>-	u64			end;</div><div class='del'>-	int			nid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NR_NODE_MEMBLKS		(MAX_NUMNODES*2)</div><div class='del'>-struct numa_meminfo {</div><div class='del'>-	int			nr_blks;</div><div class='del'>-	struct numa_memblk	blk[NR_NODE_MEMBLKS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern int __init numa_add_memblk(int nodeid, u64 start, u64 end);</div><div class='del'>-</div><div class='ctx'> extern void __init early_numa_add_cpu(int cpuid, s16 node);</div><div class='ctx'> extern void numa_add_cpu(unsigned int cpu);</div><div class='ctx'> extern void numa_remove_cpu(unsigned int cpu);</div><div class='head'>diff --git a/arch/loongarch/include/asm/orc_types.h b/arch/loongarch/include/asm/orc_types.h<br/>index caf1f71a1057..d5fa98d1d177 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/orc_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/orc_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/orc_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/orc_types.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> #define ORC_TYPE_REGS			3</div><div class='ctx'> #define ORC_TYPE_REGS_PARTIAL		4</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * This struct is more or less a vastly simplified version of the DWARF Call</div><div class='ctx'>  * Frame Information standard.  It contains only the necessary parts of DWARF</div><div class='hunk'>@@ -53,6 +53,6 @@ struct orc_entry {</div><div class='ctx'> 	unsigned int	type:3;</div><div class='ctx'> 	unsigned int	signal:1;</div><div class='ctx'> };</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ORC_TYPES_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/page.h b/arch/loongarch/include/asm/page.h<br/>index e85df33f11c7..a3aaf34fba16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/page.h</a></div><div class='hunk'>@@ -8,19 +8,14 @@</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * PAGE_SHIFT determines the page size</div><div class='del'>- */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define HPAGE_SHIFT	(PAGE_SHIFT + PAGE_SHIFT - 3)</div><div class='ctx'> #define HPAGE_SIZE	(_AC(1, UL) &lt;&lt; HPAGE_SHIFT)</div><div class='ctx'> #define HPAGE_MASK	(~(HPAGE_SIZE - 1))</div><div class='ctx'> #define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pfn.h&gt;</div><div class='hunk'>@@ -81,9 +76,6 @@ struct page *tlb_virt_to_page(unsigned long kaddr);</div><div class='ctx'> #define pfn_to_phys(pfn)	__pfn_to_phys(pfn)</div><div class='ctx'> #define phys_to_pfn(paddr)	__phys_to_pfn(paddr)</div><div class='ctx'> </div><div class='del'>-#define page_to_phys(page)	pfn_to_phys(page_to_pfn(page))</div><div class='del'>-#define phys_to_page(paddr)	pfn_to_page(phys_to_pfn(paddr))</div><div class='del'>-</div><div class='ctx'> #ifndef CONFIG_KFENCE</div><div class='ctx'> </div><div class='ctx'> #define page_to_virt(page)	__va(page_to_phys(page))</div><div class='hunk'>@@ -113,14 +105,11 @@ struct page *tlb_virt_to_page(unsigned long kaddr);</div><div class='ctx'> extern int __virt_addr_valid(volatile void *kaddr);</div><div class='ctx'> #define virt_addr_valid(kaddr)	__virt_addr_valid((volatile void *)(kaddr))</div><div class='ctx'> </div><div class='del'>-#define VM_DATA_DEFAULT_FLAGS \</div><div class='del'>-	(VM_READ | VM_WRITE | \</div><div class='del'>-	 ((current-&gt;personality &amp; READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \</div><div class='del'>-	 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)</div><div class='add'>+#define VM_DATA_DEFAULT_FLAGS	VM_DATA_FLAGS_TSK_EXEC</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PAGE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/pgalloc.h b/arch/loongarch/include/asm/pgalloc.h<br/>index 4e2d6b7ca2ee..1c63a9d9a6d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PMD_ALLOC_ONE</div><div class='ctx'> #define __HAVE_ARCH_PUD_ALLOC_ONE</div><div class='add'>+#define __HAVE_ARCH_PTE_ALLOC_ONE_KERNEL</div><div class='ctx'> #include &lt;asm-generic/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_populate_kernel(struct mm_struct *mm,</div><div class='hunk'>@@ -44,11 +45,18 @@ extern void pagetable_init(void);</div><div class='ctx'> </div><div class='ctx'> extern pgd_t *pgd_alloc(struct mm_struct *mm);</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, address)			\</div><div class='del'>-do {								\</div><div class='del'>-	pagetable_pte_dtor(page_ptdesc(pte));			\</div><div class='del'>-	tlb_remove_page_ptdesc((tlb), page_ptdesc(pte));	\</div><div class='del'>-} while (0)</div><div class='add'>+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	pte_t *pte = __pte_alloc_one_kernel(mm);</div><div class='add'>+</div><div class='add'>+	if (pte)</div><div class='add'>+		kernel_pte_init(pte);</div><div class='add'>+</div><div class='add'>+	return pte;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __pte_free_tlb(tlb, pte, address)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +69,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	if (!pagetable_pmd_ctor(ptdesc)) {</div><div class='add'>+	if (!pagetable_pmd_ctor(mm, ptdesc)) {</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/loongarch/include/asm/pgtable-bits.h b/arch/loongarch/include/asm/pgtable-bits.h<br/>index 82cd3a9f094b..2fc3789220ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgtable-bits.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgtable-bits.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgtable-bits.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/pgtable-bits.h</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #define	_PAGE_PFN_SHIFT		12</div><div class='ctx'> #define	_PAGE_SWP_EXCLUSIVE_SHIFT 23</div><div class='ctx'> #define	_PAGE_PFN_END_SHIFT	48</div><div class='del'>-#define	_PAGE_DEVMAP_SHIFT	59</div><div class='ctx'> #define	_PAGE_PRESENT_INVALID_SHIFT 60</div><div class='ctx'> #define	_PAGE_NO_READ_SHIFT	61</div><div class='ctx'> #define	_PAGE_NO_EXEC_SHIFT	62</div><div class='hunk'>@@ -36,7 +35,6 @@</div><div class='ctx'> #define _PAGE_MODIFIED		(_ULCAST_(1) &lt;&lt; _PAGE_MODIFIED_SHIFT)</div><div class='ctx'> #define _PAGE_PROTNONE		(_ULCAST_(1) &lt;&lt; _PAGE_PROTNONE_SHIFT)</div><div class='ctx'> #define _PAGE_SPECIAL		(_ULCAST_(1) &lt;&lt; _PAGE_SPECIAL_SHIFT)</div><div class='del'>-#define _PAGE_DEVMAP		(_ULCAST_(1) &lt;&lt; _PAGE_DEVMAP_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /* We borrow bit 23 to store the exclusive marker in swap PTEs. */</div><div class='ctx'> #define _PAGE_SWP_EXCLUSIVE	(_ULCAST_(1) &lt;&lt; _PAGE_SWP_EXCLUSIVE_SHIFT)</div><div class='hunk'>@@ -76,8 +74,8 @@</div><div class='ctx'> #define __READABLE	(_PAGE_VALID)</div><div class='ctx'> #define __WRITEABLE	(_PAGE_DIRTY | _PAGE_WRITE)</div><div class='ctx'> </div><div class='del'>-#define _PAGE_CHG_MASK	(_PAGE_MODIFIED | _PAGE_SPECIAL | _PAGE_DEVMAP | _PFN_MASK | _CACHE_MASK | _PAGE_PLV)</div><div class='del'>-#define _HPAGE_CHG_MASK	(_PAGE_MODIFIED | _PAGE_SPECIAL | _PAGE_DEVMAP | _PFN_MASK | _CACHE_MASK | _PAGE_PLV | _PAGE_HUGE)</div><div class='add'>+#define _PAGE_CHG_MASK	(_PAGE_MODIFIED | _PAGE_SPECIAL | _PFN_MASK | _CACHE_MASK | _PAGE_PLV)</div><div class='add'>+#define _HPAGE_CHG_MASK	(_PAGE_MODIFIED | _PAGE_SPECIAL | _PFN_MASK | _CACHE_MASK | _PAGE_PLV | _PAGE_HUGE)</div><div class='ctx'> </div><div class='ctx'> #define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \</div><div class='ctx'> 				 _PAGE_USER | _CACHE_CC)</div><div class='hunk'>@@ -92,10 +90,17 @@</div><div class='ctx'> #define PAGE_KERNEL_WUC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \</div><div class='ctx'> 				 _PAGE_GLOBAL | _PAGE_KERN |  _CACHE_WUC)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define _PAGE_IOREMAP		pgprot_val(PAGE_KERNEL_SUC)</div><div class='ctx'> </div><div class='add'>+#define pgprot_nx pgprot_nx</div><div class='add'>+</div><div class='add'>+static inline pgprot_t pgprot_nx(pgprot_t _prot)</div><div class='add'>+{</div><div class='add'>+	return __pgprot(pgprot_val(_prot) | _PAGE_NO_EXEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define pgprot_noncached pgprot_noncached</div><div class='ctx'> </div><div class='ctx'> static inline pgprot_t pgprot_noncached(pgprot_t _prot)</div><div class='hunk'>@@ -120,6 +125,6 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)</div><div class='ctx'> 	return __pgprot(prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PGTABLE_BITS_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/include/asm/pgtable.h<br/>index 9965f52ef65b..bd128696e96d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/pgtable.h</a></div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'> </div><div class='ctx'> #define USER_PTRS_PER_PGD       ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm_types.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='hunk'>@@ -255,7 +255,6 @@ static inline void pmd_clear(pmd_t *pmdp)</div><div class='ctx'> </div><div class='ctx'> #define pmd_page_vaddr(pmd)	pmd_val(pmd)</div><div class='ctx'> </div><div class='del'>-extern pmd_t mk_pmd(struct page *page, pgprot_t prot);</div><div class='ctx'> extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp, pmd_t pmd);</div><div class='ctx'> </div><div class='ctx'> #define pte_page(x)		pfn_to_page(pte_pfn(x))</div><div class='hunk'>@@ -268,7 +267,11 @@ extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp, pm</div><div class='ctx'>  */</div><div class='ctx'> extern void pgd_init(void *addr);</div><div class='ctx'> extern void pud_init(void *addr);</div><div class='add'>+#define pud_init pud_init</div><div class='ctx'> extern void pmd_init(void *addr);</div><div class='add'>+#define pmd_init pmd_init</div><div class='add'>+extern void kernel_pte_init(void *addr);</div><div class='add'>+#define kernel_pte_init kernel_pte_init</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that</div><div class='hunk'>@@ -298,7 +301,7 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)</div><div class='ctx'> #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) })</div><div class='ctx'> #define __swp_entry_to_pmd(x)	((pmd_t) { (x).val | _PAGE_HUGE })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -325,39 +328,17 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)</div><div class='ctx'> {</div><div class='ctx'> 	WRITE_ONCE(*ptep, pteval);</div><div class='ctx'> </div><div class='del'>-	if (pte_val(pteval) &amp; _PAGE_GLOBAL) {</div><div class='del'>-		pte_t *buddy = ptep_buddy(ptep);</div><div class='del'>-		/*</div><div class='del'>-		 * Make sure the buddy is global too (if it's !none,</div><div class='del'>-		 * it better already be global)</div><div class='del'>-		 */</div><div class='del'>-		if (pte_none(ptep_get(buddy))) {</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-			/*</div><div class='del'>-			 * For SMP, multiple CPUs can race, so we need</div><div class='del'>-			 * to do this atomically.</div><div class='del'>-			 */</div><div class='del'>-			__asm__ __volatile__(</div><div class='del'>-			__AMOR "$zero, %[global], %[buddy] \n"</div><div class='del'>-			: [buddy] "+ZB" (buddy-&gt;pte)</div><div class='del'>-			: [global] "r" (_PAGE_GLOBAL)</div><div class='del'>-			: "memory");</div><div class='del'>-</div><div class='del'>-			DBAR(0b11000); /* o_wrw = 0b11000 */</div><div class='del'>-#else /* !CONFIG_SMP */</div><div class='del'>-			WRITE_ONCE(*buddy, __pte(pte_val(ptep_get(buddy)) | _PAGE_GLOBAL));</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (pte_val(pteval) &amp; _PAGE_GLOBAL)</div><div class='add'>+		DBAR(0b11000); /* o_wrw = 0b11000 */</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	/* Preserve global status for the pair */</div><div class='del'>-	if (pte_val(ptep_get(ptep_buddy(ptep))) &amp; _PAGE_GLOBAL)</div><div class='del'>-		set_pte(ptep, __pte(_PAGE_GLOBAL));</div><div class='del'>-	else</div><div class='del'>-		set_pte(ptep, __pte(0));</div><div class='add'>+	pte_t pte = ptep_get(ptep);</div><div class='add'>+	pte_val(pte) &amp;= _PAGE_GLOBAL;</div><div class='add'>+	set_pte(ptep, pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define PGD_T_LOG2	(__builtin_ffs(sizeof(pgd_t)) - 1)</div><div class='hunk'>@@ -428,9 +409,6 @@ static inline int pte_special(pte_t pte)	{ return pte_val(pte) &amp; _PAGE_SPECIAL;</div><div class='ctx'> static inline pte_t pte_mkspecial(pte_t pte)	{ pte_val(pte) |= _PAGE_SPECIAL; return pte; }</div><div class='ctx'> #endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */</div><div class='ctx'> </div><div class='del'>-static inline int pte_devmap(pte_t pte)		{ return !!(pte_val(pte) &amp; _PAGE_DEVMAP); }</div><div class='del'>-static inline pte_t pte_mkdevmap(pte_t pte)	{ pte_val(pte) |= _PAGE_DEVMAP; return pte; }</div><div class='del'>-</div><div class='ctx'> #define pte_accessible pte_accessible</div><div class='ctx'> static inline unsigned long pte_accessible(struct mm_struct *mm, pte_t a)</div><div class='ctx'> {</div><div class='hunk'>@@ -444,12 +422,6 @@ static inline unsigned long pte_accessible(struct mm_struct *mm, pte_t a)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	return __pte((pte_val(pte) &amp; _PAGE_CHG_MASK) |</div><div class='hunk'>@@ -565,17 +537,6 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd)</div><div class='ctx'> 	return pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pmd_devmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return !!(pmd_val(pmd) &amp; _PAGE_DEVMAP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline pmd_t pmd_mkdevmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	pmd_val(pmd) |= _PAGE_DEVMAP;</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct page *pmd_page(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	if (pmd_trans_huge(pmd))</div><div class='hunk'>@@ -631,11 +592,6 @@ static inline long pmd_protnone(pmd_t pmd)</div><div class='ctx'> #define pmd_leaf(pmd)		((pmd_val(pmd) &amp; _PAGE_HUGE) != 0)</div><div class='ctx'> #define pud_leaf(pud)		((pud_val(pud) &amp; _PAGE_HUGE) != 0)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='del'>-#define pud_devmap(pud)		(0)</div><div class='del'>-#define pgd_devmap(pgd)		(0)</div><div class='del'>-#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * We provide our own get_unmapped area to cope with the virtual aliasing</div><div class='ctx'>  * constraints placed on us by the cache architecture.</div><div class='hunk'>@@ -643,6 +599,6 @@ static inline long pmd_protnone(pmd_t pmd)</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PGTABLE_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/prefetch.h b/arch/loongarch/include/asm/prefetch.h<br/>index 1672262a5e2e..0b168cdaae9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/prefetch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/prefetch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/prefetch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/prefetch.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #define Pref_Load	0</div><div class='ctx'> #define Pref_Store	8</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> 	.macro	__pref hint addr</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_PREFETCH</div><div class='head'>diff --git a/arch/loongarch/include/asm/ptrace.h b/arch/loongarch/include/asm/ptrace.h<br/>index f3ddaed9ef7f..e5d21e836d99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/ptrace.h</a></div><div class='hunk'>@@ -33,9 +33,9 @@ struct pt_regs {</div><div class='ctx'> 	unsigned long __last[];</div><div class='ctx'> } __aligned(8);</div><div class='ctx'> </div><div class='del'>-static inline int regs_irqs_disabled(struct pt_regs *regs)</div><div class='add'>+static __always_inline bool regs_irqs_disabled(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	return arch_irqs_disabled_flags(regs-&gt;csr_prmd);</div><div class='add'>+	return !(regs-&gt;csr_prmd &amp; CSR_PRMD_PIE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='hunk'>@@ -55,7 +55,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs, unsigned long v</div><div class='ctx'> </div><div class='ctx'> /* Query offset/name of register from its name/offset */</div><div class='ctx'> extern int regs_query_register_offset(const char *name);</div><div class='del'>-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))</div><div class='add'>+#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last) - sizeof(unsigned long))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * regs_get_register() - get register value from its offset</div><div class='head'>diff --git a/arch/loongarch/include/asm/set_memory.h b/arch/loongarch/include/asm/set_memory.h<br/>index d70505b6676c..55dfaefd02c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/set_memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/set_memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/set_memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/set_memory.h</a></div><div class='hunk'>@@ -17,5 +17,6 @@ int set_memory_rw(unsigned long addr, int numpages);</div><div class='ctx'> bool kernel_page_present(struct page *page);</div><div class='ctx'> int set_direct_map_default_noflush(struct page *page);</div><div class='ctx'> int set_direct_map_invalid_noflush(struct page *page);</div><div class='add'>+int set_direct_map_valid_noflush(struct page *page, unsigned nr, bool valid);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_LOONGARCH_SET_MEMORY_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/smp.h b/arch/loongarch/include/asm/smp.h<br/>index 3383c9d24e94..3a47f52959a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/smp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/smp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/smp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/smp.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@ extern int smp_num_siblings;</div><div class='ctx'> extern int num_processors;</div><div class='ctx'> extern int disabled_cpus;</div><div class='ctx'> extern cpumask_t cpu_sibling_map[];</div><div class='add'>+extern cpumask_t cpu_llc_shared_map[];</div><div class='ctx'> extern cpumask_t cpu_core_map[];</div><div class='ctx'> extern cpumask_t cpu_foreign_map[];</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +39,7 @@ int loongson_cpu_disable(void);</div><div class='ctx'> void loongson_cpu_die(unsigned int cpu);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline void plat_smp_setup(void)</div><div class='add'>+static inline void __init plat_smp_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	loongson_smp_setup();</div><div class='ctx'> }</div><div class='hunk'>@@ -77,6 +78,8 @@ extern int __cpu_logical_map[NR_CPUS];</div><div class='ctx'> #define SMP_IRQ_WORK		BIT(ACTION_IRQ_WORK)</div><div class='ctx'> #define SMP_CLEAR_VECTOR	BIT(ACTION_CLEAR_VECTOR)</div><div class='ctx'> </div><div class='add'>+struct seq_file;</div><div class='add'>+</div><div class='ctx'> struct secondary_data {</div><div class='ctx'> 	unsigned long stack;</div><div class='ctx'> 	unsigned long thread_info;</div><div class='head'>diff --git a/arch/loongarch/include/asm/sparsemem.h b/arch/loongarch/include/asm/sparsemem.h<br/>index 8d4af6aff8a8..4501efac1a87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/sparsemem.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/sparsemem.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/sparsemem.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/sparsemem.h</a></div><div class='hunk'>@@ -21,11 +21,6 @@</div><div class='ctx'> #define VMEMMAP_SIZE	0	/* 1, For FLATMEM; 2, For SPARSEMEM without VMEMMAP. */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MEMORY_HOTPLUG</div><div class='del'>-int memory_add_physaddr_to_nid(u64 addr);</div><div class='del'>-#define memory_add_physaddr_to_nid memory_add_physaddr_to_nid</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define INIT_MEMBLOCK_RESERVED_REGIONS	(INIT_MEMBLOCK_REGIONS + NR_CPUS)</div><div class='ctx'> </div><div class='ctx'> #endif /* _LOONGARCH_SPARSEMEM_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/include/asm/stackframe.h<br/>index 66736837085b..5cb568a60cf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/stackframe.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/stackframe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/stackframe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/stackframe.h</a></div><div class='hunk'>@@ -57,6 +57,12 @@</div><div class='ctx'> 	jirl	zero, \temp1, 0xc</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro STACKLEAK_ERASE</div><div class='add'>+#ifdef CONFIG_KSTACK_ERASE</div><div class='add'>+	bl	stackleak_erase_on_task_stack</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> 	.macro BACKUP_T0T1</div><div class='ctx'> 	csrwr	t0, EXCEPTION_KS0</div><div class='ctx'> 	csrwr	t1, EXCEPTION_KS1</div><div class='head'>diff --git a/arch/loongarch/include/asm/stacktrace.h b/arch/loongarch/include/asm/stacktrace.h<br/>index f23adb15f418..5c8be156567c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/stacktrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/stacktrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/stacktrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/stacktrace.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/loongarch.h&gt;</div><div class='add'>+#include &lt;asm/unwind_hints.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum stack_type {</div><div class='hunk'>@@ -30,6 +31,11 @@ bool in_irq_stack(unsigned long stack, struct stack_info *info);</div><div class='ctx'> bool in_task_stack(unsigned long stack, struct task_struct *task, struct stack_info *info);</div><div class='ctx'> int get_stack_info(unsigned long stack, struct task_struct *task, struct stack_info *info);</div><div class='ctx'> </div><div class='add'>+static __always_inline bool on_thread_stack(void)</div><div class='add'>+{</div><div class='add'>+	return !(((unsigned long)(current-&gt;stack) ^ current_stack_pointer) &amp; ~(THREAD_SIZE - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define STR_LONG_L    __stringify(LONG_L)</div><div class='ctx'> #define STR_LONG_S    __stringify(LONG_S)</div><div class='ctx'> #define STR_LONGSIZE  __stringify(LONGSIZE)</div><div class='hunk'>@@ -43,6 +49,7 @@ int get_stack_info(unsigned long stack, struct task_struct *task, struct stack_i</div><div class='ctx'> static __always_inline void prepare_frametrace(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='add'>+		UNWIND_HINT_SAVE</div><div class='ctx'> 		/* Save $ra */</div><div class='ctx'> 		STORE_ONE_REG(1)</div><div class='ctx'> 		/* Use $ra to save PC */</div><div class='hunk'>@@ -80,6 +87,7 @@ static __always_inline void prepare_frametrace(struct pt_regs *regs)</div><div class='ctx'> 		STORE_ONE_REG(29)</div><div class='ctx'> 		STORE_ONE_REG(30)</div><div class='ctx'> 		STORE_ONE_REG(31)</div><div class='add'>+		UNWIND_HINT_RESTORE</div><div class='ctx'> 		: "=m" (regs-&gt;csr_era)</div><div class='ctx'> 		: "r" (regs-&gt;regs)</div><div class='ctx'> 		: "memory");</div><div class='head'>diff --git a/arch/loongarch/include/asm/syscall.h b/arch/loongarch/include/asm/syscall.h<br/>index e286dc58476e..81d2733f7b94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/syscall.h</a></div><div class='hunk'>@@ -26,6 +26,13 @@ static inline long syscall_get_nr(struct task_struct *task,</div><div class='ctx'> 	return regs-&gt;regs[11];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;regs[11] = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_rollback(struct task_struct *task,</div><div class='ctx'> 				    struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -61,6 +68,14 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	memcpy(&amp;args[1], &amp;regs-&gt;regs[5], 5 * sizeof(long));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;orig_a0 = args[0];</div><div class='add'>+	memcpy(&amp;regs-&gt;regs[5], &amp;args[1], 5 * sizeof(long));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	return AUDIT_ARCH_LOONGARCH64;</div><div class='head'>diff --git a/arch/loongarch/include/asm/thread_info.h b/arch/loongarch/include/asm/thread_info.h<br/>index 8bf0e6f51546..4d7117fcdc78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/thread_info.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -53,7 +53,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> </div><div class='ctx'> register unsigned long current_stack_pointer __asm__("$sp");</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='ctx'> #define THREAD_SIZE		SZ_16K</div><div class='hunk'>@@ -65,48 +65,42 @@ register unsigned long current_stack_pointer __asm__("$sp");</div><div class='ctx'>  *   access</div><div class='ctx'>  * - pending work-to-be-done flags are in LSW</div><div class='ctx'>  * - other flags in MSW</div><div class='add'>+ *</div><div class='add'>+ * Tell the generic TIF infrastructure which special bits loongarch supports</div><div class='ctx'>  */</div><div class='del'>-#define TIF_SIGPENDING		1	/* signal pending */</div><div class='del'>-#define TIF_NEED_RESCHED	2	/* rescheduling necessary */</div><div class='del'>-#define TIF_NOTIFY_RESUME	3	/* callback before returning to user */</div><div class='del'>-#define TIF_NOTIFY_SIGNAL	4	/* signal notifications exist */</div><div class='del'>-#define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */</div><div class='del'>-#define TIF_NOHZ		6	/* in adaptive nohz mode */</div><div class='del'>-#define TIF_UPROBE		7	/* breakpointed or singlestepping */</div><div class='del'>-#define TIF_USEDFPU		8	/* FPU was used by this task this quantum (SMP) */</div><div class='del'>-#define TIF_USEDSIMD		9	/* SIMD has been used this quantum */</div><div class='del'>-#define TIF_MEMDIE		10	/* is terminating due to OOM killer */</div><div class='del'>-#define TIF_FIXADE		11	/* Fix address errors in software */</div><div class='del'>-#define TIF_LOGADE		12	/* Log address errors to syslog */</div><div class='del'>-#define TIF_32BIT_REGS		13	/* 32-bit general purpose registers */</div><div class='del'>-#define TIF_32BIT_ADDR		14	/* 32-bit address space */</div><div class='del'>-#define TIF_LOAD_WATCH		15	/* If set, load watch registers */</div><div class='del'>-#define TIF_SINGLESTEP		16	/* Single Step */</div><div class='del'>-#define TIF_LSX_CTX_LIVE	17	/* LSX context must be preserved */</div><div class='del'>-#define TIF_LASX_CTX_LIVE	18	/* LASX context must be preserved */</div><div class='del'>-#define TIF_USEDLBT		19	/* LBT was used by this task this quantum (SMP) */</div><div class='del'>-#define TIF_LBT_CTX_LIVE	20	/* LBT context must be preserved */</div><div class='del'>-#define TIF_PATCH_PENDING	21	/* pending live patching update */</div><div class='add'>+#define HAVE_TIF_NEED_RESCHED_LAZY</div><div class='add'>+#define HAVE_TIF_RESTORE_SIGMASK</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/thread_info_tif.h&gt;</div><div class='add'>+</div><div class='add'>+/* Architecture specific bits */</div><div class='add'>+#define TIF_NOHZ		16	/* in adaptive nohz mode */</div><div class='add'>+#define TIF_USEDFPU		17	/* FPU was used by this task this quantum (SMP) */</div><div class='add'>+#define TIF_USEDSIMD		18	/* SIMD has been used this quantum */</div><div class='add'>+#define TIF_FIXADE		19	/* Fix address errors in software */</div><div class='add'>+#define TIF_LOGADE		20	/* Log address errors to syslog */</div><div class='add'>+#define TIF_32BIT_REGS		21	/* 32-bit general purpose registers */</div><div class='add'>+#define TIF_32BIT_ADDR		22	/* 32-bit address space */</div><div class='add'>+#define TIF_LOAD_WATCH		23	/* If set, load watch registers */</div><div class='add'>+#define TIF_SINGLESTEP		24	/* Single Step */</div><div class='add'>+#define TIF_LSX_CTX_LIVE	25	/* LSX context must be preserved */</div><div class='add'>+#define TIF_LASX_CTX_LIVE	26	/* LASX context must be preserved */</div><div class='add'>+#define TIF_USEDLBT		27	/* LBT was used by this task this quantum (SMP) */</div><div class='add'>+#define TIF_LBT_CTX_LIVE	28	/* LBT context must be preserved */</div><div class='ctx'> </div><div class='del'>-#define _TIF_SIGPENDING		(1&lt;&lt;TIF_SIGPENDING)</div><div class='del'>-#define _TIF_NEED_RESCHED	(1&lt;&lt;TIF_NEED_RESCHED)</div><div class='del'>-#define _TIF_NOTIFY_RESUME	(1&lt;&lt;TIF_NOTIFY_RESUME)</div><div class='del'>-#define _TIF_NOTIFY_SIGNAL	(1&lt;&lt;TIF_NOTIFY_SIGNAL)</div><div class='del'>-#define _TIF_NOHZ		(1&lt;&lt;TIF_NOHZ)</div><div class='del'>-#define _TIF_UPROBE		(1&lt;&lt;TIF_UPROBE)</div><div class='del'>-#define _TIF_USEDFPU		(1&lt;&lt;TIF_USEDFPU)</div><div class='del'>-#define _TIF_USEDSIMD		(1&lt;&lt;TIF_USEDSIMD)</div><div class='del'>-#define _TIF_FIXADE		(1&lt;&lt;TIF_FIXADE)</div><div class='del'>-#define _TIF_LOGADE		(1&lt;&lt;TIF_LOGADE)</div><div class='del'>-#define _TIF_32BIT_REGS		(1&lt;&lt;TIF_32BIT_REGS)</div><div class='del'>-#define _TIF_32BIT_ADDR		(1&lt;&lt;TIF_32BIT_ADDR)</div><div class='del'>-#define _TIF_LOAD_WATCH		(1&lt;&lt;TIF_LOAD_WATCH)</div><div class='del'>-#define _TIF_SINGLESTEP		(1&lt;&lt;TIF_SINGLESTEP)</div><div class='del'>-#define _TIF_LSX_CTX_LIVE	(1&lt;&lt;TIF_LSX_CTX_LIVE)</div><div class='del'>-#define _TIF_LASX_CTX_LIVE	(1&lt;&lt;TIF_LASX_CTX_LIVE)</div><div class='del'>-#define _TIF_USEDLBT		(1&lt;&lt;TIF_USEDLBT)</div><div class='del'>-#define _TIF_LBT_CTX_LIVE	(1&lt;&lt;TIF_LBT_CTX_LIVE)</div><div class='del'>-#define _TIF_PATCH_PENDING	(1&lt;&lt;TIF_PATCH_PENDING)</div><div class='add'>+#define _TIF_NOHZ		BIT(TIF_NOHZ)</div><div class='add'>+#define _TIF_USEDFPU		BIT(TIF_USEDFPU)</div><div class='add'>+#define _TIF_USEDSIMD		BIT(TIF_USEDSIMD)</div><div class='add'>+#define _TIF_FIXADE		BIT(TIF_FIXADE)</div><div class='add'>+#define _TIF_LOGADE		BIT(TIF_LOGADE)</div><div class='add'>+#define _TIF_32BIT_REGS		BIT(TIF_32BIT_REGS)</div><div class='add'>+#define _TIF_32BIT_ADDR		BIT(TIF_32BIT_ADDR)</div><div class='add'>+#define _TIF_LOAD_WATCH		BIT(TIF_LOAD_WATCH)</div><div class='add'>+#define _TIF_SINGLESTEP		BIT(TIF_SINGLESTEP)</div><div class='add'>+#define _TIF_LSX_CTX_LIVE	BIT(TIF_LSX_CTX_LIVE)</div><div class='add'>+#define _TIF_LASX_CTX_LIVE	BIT(TIF_LASX_CTX_LIVE)</div><div class='add'>+#define _TIF_USEDLBT		BIT(TIF_USEDLBT)</div><div class='add'>+#define _TIF_LBT_CTX_LIVE	BIT(TIF_LBT_CTX_LIVE)</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_THREAD_INFO_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/topology.h b/arch/loongarch/include/asm/topology.h<br/>index 50273c9187d0..f06e7ff25bb7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/topology.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/topology.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/topology.h</a></div><div class='hunk'>@@ -19,17 +19,22 @@ extern int pcibus_to_node(struct pci_bus *);</div><div class='ctx'> </div><div class='ctx'> #define cpumask_of_pcibus(bus)	(cpu_online_mask)</div><div class='ctx'> </div><div class='del'>-extern unsigned char node_distances[MAX_NUMNODES][MAX_NUMNODES];</div><div class='del'>-</div><div class='del'>-void numa_set_distance(int from, int to, int distance);</div><div class='del'>-</div><div class='del'>-#define node_distance(from, to)	(node_distances[(from)][(to)])</div><div class='add'>+int __node_distance(int from, int to);</div><div class='add'>+#define node_distance(from, to) __node_distance(from, to)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> #define pcibus_to_node(bus)	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+/*</div><div class='add'>+ * Return cpus that shares the last level cache.</div><div class='add'>+ */</div><div class='add'>+static inline const struct cpumask *cpu_coregroup_mask(int cpu)</div><div class='add'>+{</div><div class='add'>+	return &amp;cpu_llc_shared_map[cpu];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define topology_physical_package_id(cpu)	(cpu_data[cpu].package)</div><div class='ctx'> #define topology_core_id(cpu)			(cpu_data[cpu].core)</div><div class='ctx'> #define topology_core_cpumask(cpu)		(&amp;cpu_core_map[cpu])</div><div class='head'>diff --git a/arch/loongarch/include/asm/types.h b/arch/loongarch/include/asm/types.h<br/>index baf15a0dcf8b..0edd731f3d6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/types.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;asm-generic/int-ll64.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ULCAST_</div><div class='ctx'> #define _U64CAST_</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/loongarch/include/asm/unwind_hints.h b/arch/loongarch/include/asm/unwind_hints.h<br/>index a01086ad9dde..16c7f7e465a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/unwind_hints.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/unwind_hints.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/unwind_hints.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/unwind_hints.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;linux/objtool.h&gt;</div><div class='ctx'> #include &lt;asm/orc_types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro UNWIND_HINT_UNDEFINED</div><div class='ctx'> 	UNWIND_HINT type=UNWIND_HINT_TYPE_UNDEFINED</div><div class='hunk'>@@ -23,6 +23,14 @@</div><div class='ctx'> 	UNWIND_HINT sp_reg=ORC_REG_SP type=UNWIND_HINT_TYPE_CALL</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='add'>+</div><div class='add'>+#define UNWIND_HINT_SAVE \</div><div class='add'>+	UNWIND_HINT(UNWIND_HINT_TYPE_SAVE, 0, 0, 0)</div><div class='add'>+</div><div class='add'>+#define UNWIND_HINT_RESTORE \</div><div class='add'>+	UNWIND_HINT(UNWIND_HINT_TYPE_RESTORE, 0, 0, 0)</div><div class='add'>+</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_LOONGARCH_UNWIND_HINTS_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/uprobes.h b/arch/loongarch/include/asm/uprobes.h<br/>index 99a0d198927f..025fc3f0a102 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/uprobes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/uprobes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/uprobes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/uprobes.h</a></div><div class='hunk'>@@ -15,7 +15,6 @@ typedef u32 uprobe_opcode_t;</div><div class='ctx'> #define UPROBE_XOLBP_INSN	__emit_break(BRK_UPROBE_XOLBP)</div><div class='ctx'> </div><div class='ctx'> struct arch_uprobe {</div><div class='del'>-	unsigned long	resume_era;</div><div class='ctx'> 	u32	insn[2];</div><div class='ctx'> 	u32	ixol[2];</div><div class='ctx'> 	bool	simulate;</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso.h b/arch/loongarch/include/asm/vdso.h<br/>index d3ba35eb23e7..f72ec79e2dde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso.h</a></div><div class='hunk'>@@ -31,7 +31,6 @@ struct loongarch_vdso_info {</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> 	unsigned long offset_sigreturn;</div><div class='ctx'> 	struct vm_special_mapping code_mapping;</div><div class='del'>-	struct vm_special_mapping data_mapping;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct loongarch_vdso_info vdso_info;</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/arch_data.h b/arch/loongarch/include/asm/vdso/arch_data.h<br/>new file mode 100644<br/>index 000000000000..395ec223bcbe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/arch_data.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/arch_data.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Author: Huacai Chen &lt;chenhuacai@loongson.cn&gt;</div><div class='add'>+ * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _VDSO_ARCH_DATA_H</div><div class='add'>+#define _VDSO_ARCH_DATA_H</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/vdso.h&gt;</div><div class='add'>+</div><div class='add'>+struct vdso_pcpu_data {</div><div class='add'>+	u32 node;</div><div class='add'>+} ____cacheline_aligned_in_smp;</div><div class='add'>+</div><div class='add'>+struct vdso_arch_data {</div><div class='add'>+	struct vdso_pcpu_data pdata[NR_CPUS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/getrandom.h b/arch/loongarch/include/asm/vdso/getrandom.h<br/>index 02f36772541b..2ff05003c6e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/getrandom.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/getrandom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/getrandom.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/getrandom.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_GETRANDOM_H</div><div class='ctx'> #define __ASM_VDSO_GETRANDOM_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/vdso/vdso.h&gt;</div><div class='hunk'>@@ -20,7 +20,7 @@ static __always_inline ssize_t getrandom_syscall(void *_buffer, size_t _len, uns</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 	"      syscall 0\n"</div><div class='del'>-	: "+r" (ret)</div><div class='add'>+	: "=r" (ret)</div><div class='ctx'> 	: "r" (nr), "r" (buffer), "r" (len), "r" (flags)</div><div class='ctx'> 	: "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8",</div><div class='ctx'> 	  "memory");</div><div class='hunk'>@@ -28,12 +28,6 @@ static __always_inline ssize_t getrandom_syscall(void *_buffer, size_t _len, uns</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_rng_data *__arch_get_vdso_rng_data(void)</div><div class='del'>-{</div><div class='del'>-	return (const struct vdso_rng_data *)(get_vdso_data() + VVAR_LOONGARCH_PAGES_START *</div><div class='del'>-	       PAGE_SIZE + offsetof(struct loongarch_vdso_data, rng_data));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_GETRANDOM_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/gettimeofday.h b/arch/loongarch/include/asm/vdso/gettimeofday.h<br/>index 89e6b222c2f2..dcafabca9bb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> #define __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/vdso/vdso.h&gt;</div><div class='hunk'>@@ -25,7 +25,7 @@ static __always_inline long gettimeofday_fallback(</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 	"       syscall 0\n"</div><div class='del'>-	: "+r" (ret)</div><div class='add'>+	: "=r" (ret)</div><div class='ctx'> 	: "r" (nr), "r" (tv), "r" (tz)</div><div class='ctx'> 	: "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",</div><div class='ctx'> 	  "$t8", "memory");</div><div class='hunk'>@@ -44,7 +44,7 @@ static __always_inline long clock_gettime_fallback(</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 	"       syscall 0\n"</div><div class='del'>-	: "+r" (ret)</div><div class='add'>+	: "=r" (ret)</div><div class='ctx'> 	: "r" (nr), "r" (clkid), "r" (ts)</div><div class='ctx'> 	: "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",</div><div class='ctx'> 	  "$t8", "memory");</div><div class='hunk'>@@ -63,7 +63,7 @@ static __always_inline int clock_getres_fallback(</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 	"       syscall 0\n"</div><div class='del'>-	: "+r" (ret)</div><div class='add'>+	: "=r" (ret)</div><div class='ctx'> 	: "r" (nr), "r" (clkid), "r" (ts)</div><div class='ctx'> 	: "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",</div><div class='ctx'> 	  "$t8", "memory");</div><div class='hunk'>@@ -72,7 +72,7 @@ static __always_inline int clock_getres_fallback(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	uint64_t count;</div><div class='ctx'> </div><div class='hunk'>@@ -89,18 +89,6 @@ static inline bool loongarch_vdso_hres_capable(void)</div><div class='ctx'> }</div><div class='ctx'> #define __arch_vdso_hres_capable loongarch_vdso_hres_capable</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return (const struct vdso_data *)get_vdso_data();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-static __always_inline</div><div class='del'>-const struct vdso_data *__arch_get_timens_vdso_data(const struct vdso_data *vd)</div><div class='del'>-{</div><div class='del'>-	return (const struct vdso_data *)(get_vdso_data() + VVAR_TIMENS_PAGE_OFFSET * PAGE_SIZE);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/processor.h b/arch/loongarch/include/asm/vdso/processor.h<br/>index ef5770b343a0..1e255373b0b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/processor.h</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'> #ifndef __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> #define __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define cpu_relax()	barrier()</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_PROCESSOR_H */</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/vdso.h b/arch/loongarch/include/asm/vdso/vdso.h<br/>index e31ac7474513..04bd2d452876 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/vdso.h</a></div><div class='hunk'>@@ -7,65 +7,15 @@</div><div class='ctx'> #ifndef _ASM_VDSO_VDSO_H</div><div class='ctx'> #define _ASM_VDSO_VDSO_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='del'>-struct vdso_pcpu_data {</div><div class='del'>-	u32 node;</div><div class='del'>-} ____cacheline_aligned_in_smp;</div><div class='add'>+#define VVAR_SIZE (VDSO_NR_PAGES &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-struct loongarch_vdso_data {</div><div class='del'>-	struct vdso_pcpu_data pdata[NR_CPUS];</div><div class='del'>-	struct vdso_rng_data rng_data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The layout of vvar:</div><div class='del'>- *</div><div class='del'>- *                      high</div><div class='del'>- * +---------------------+--------------------------+</div><div class='del'>- * | loongarch vdso data | LOONGARCH_VDSO_DATA_SIZE |</div><div class='del'>- * +---------------------+--------------------------+</div><div class='del'>- * |  time-ns vdso data  |        PAGE_SIZE         |</div><div class='del'>- * +---------------------+--------------------------+</div><div class='del'>- * |  generic vdso data  |        PAGE_SIZE         |</div><div class='del'>- * +---------------------+--------------------------+</div><div class='del'>- *                      low</div><div class='del'>- */</div><div class='del'>-#define LOONGARCH_VDSO_DATA_SIZE PAGE_ALIGN(sizeof(struct loongarch_vdso_data))</div><div class='del'>-#define LOONGARCH_VDSO_DATA_PAGES (LOONGARCH_VDSO_DATA_SIZE &gt;&gt; PAGE_SHIFT)</div><div class='del'>-</div><div class='del'>-enum vvar_pages {</div><div class='del'>-	VVAR_GENERIC_PAGE_OFFSET,</div><div class='del'>-	VVAR_TIMENS_PAGE_OFFSET,</div><div class='del'>-	VVAR_LOONGARCH_PAGES_START,</div><div class='del'>-	VVAR_LOONGARCH_PAGES_END = VVAR_LOONGARCH_PAGES_START + LOONGARCH_VDSO_DATA_PAGES - 1,</div><div class='del'>-	VVAR_NR_PAGES,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define VVAR_SIZE (VVAR_NR_PAGES &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='del'>-static inline unsigned long get_vdso_base(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr;</div><div class='del'>-</div><div class='del'>-	__asm__(</div><div class='del'>-	" la.pcrel %0, _start\n"</div><div class='del'>-	: "=r" (addr)</div><div class='del'>-	:</div><div class='del'>-	:);</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long get_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return get_vdso_base() - VVAR_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/loongarch/include/asm/vdso/vsyscall.h b/arch/loongarch/include/asm/vdso/vsyscall.h<br/>index b1273ce6f140..558eb9dfda52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/asm/vdso/vsyscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/asm/vdso/vsyscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/asm/vdso/vsyscall.h</a></div><div class='hunk'>@@ -2,34 +2,13 @@</div><div class='ctx'> #ifndef __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> #define __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='del'>-extern struct vdso_rng_data *vdso_rng_data;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Update the vDSO data page to keep in sync with kernel timekeeping.</div><div class='del'>- */</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_data *__loongarch_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __loongarch_get_k_vdso_data</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_rng_data *__loongarch_get_k_vdso_rng_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_rng_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_rng_data __loongarch_get_k_vdso_rng_data</div><div class='del'>-</div><div class='ctx'> /* The asm-generic header needs to be included after the definitions above */</div><div class='ctx'> #include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_VSYSCALL_H */</div><div class='head'>diff --git a/arch/loongarch/include/uapi/asm/kvm.h b/arch/loongarch/include/uapi/asm/kvm.h<br/>index 70d89070bfeb..57ba1a563bb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/kvm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/kvm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='add'>+#define __KVM_HAVE_IRQ_LINE</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * KVM LoongArch specific structures and definitions.</div><div class='ctx'>  *</div><div class='hunk'>@@ -101,6 +103,7 @@ struct kvm_fpu {</div><div class='ctx'> #define  KVM_LOONGARCH_VM_FEAT_PMU		5</div><div class='ctx'> #define  KVM_LOONGARCH_VM_FEAT_PV_IPI		6</div><div class='ctx'> #define  KVM_LOONGARCH_VM_FEAT_PV_STEALTIME	7</div><div class='add'>+#define  KVM_LOONGARCH_VM_FEAT_PTW		8</div><div class='ctx'> </div><div class='ctx'> /* Device Control API on vcpu fd */</div><div class='ctx'> #define KVM_LOONGARCH_VCPU_CPUCFG	0</div><div class='hunk'>@@ -132,4 +135,22 @@ struct kvm_iocsr_entry {</div><div class='ctx'> #define KVM_IRQCHIP_NUM_PINS	64</div><div class='ctx'> #define KVM_MAX_CORES		256</div><div class='ctx'> </div><div class='add'>+#define KVM_DEV_LOONGARCH_IPI_GRP_REGS			0x40000001</div><div class='add'>+</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS		0x40000002</div><div class='add'>+</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS		0x40000003</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU	0x0</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE	0x1</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE	0x2</div><div class='add'>+</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL		0x40000004</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU	0x0</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE	0x1</div><div class='add'>+#define KVM_DEV_LOONGARCH_EXTIOI_CTRL_LOAD_FINISHED	0x3</div><div class='add'>+</div><div class='add'>+#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_REGS	        0x40000005</div><div class='add'>+#define KVM_DEV_LOONGARCH_PCH_PIC_GRP_CTRL	        0x40000006</div><div class='add'>+#define KVM_DEV_LOONGARCH_PCH_PIC_CTRL_INIT	        0</div><div class='add'>+</div><div class='ctx'> #endif /* __UAPI_ASM_LOONGARCH_KVM_H */</div><div class='head'>diff --git a/arch/loongarch/include/uapi/asm/kvm_para.h b/arch/loongarch/include/uapi/asm/kvm_para.h<br/>index b0604aa9b4bb..76d802ef01ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/kvm_para.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/kvm_para.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/kvm_para.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/uapi/asm/kvm_para.h</a></div><div class='hunk'>@@ -17,5 +17,6 @@</div><div class='ctx'> #define  KVM_FEATURE_STEAL_TIME		2</div><div class='ctx'> /* BIT 24 - 31 are features configurable by user space vmm */</div><div class='ctx'> #define  KVM_FEATURE_VIRT_EXTIOI	24</div><div class='add'>+#define  KVM_FEATURE_USER_HCALL		25</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_KVM_PARA_H */</div><div class='head'>diff --git a/arch/loongarch/include/uapi/asm/ptrace.h b/arch/loongarch/include/uapi/asm/ptrace.h<br/>index ac915f841650..aafb3cd9e943 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -72,6 +72,16 @@ struct user_watch_state {</div><div class='ctx'> 	} dbg_regs[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct user_watch_state_v2 {</div><div class='add'>+	uint64_t dbg_info;</div><div class='add'>+	struct {</div><div class='add'>+		uint64_t    addr;</div><div class='add'>+		uint64_t    mask;</div><div class='add'>+		uint32_t    ctrl;</div><div class='add'>+		uint32_t    pad;</div><div class='add'>+	} dbg_regs[14];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define PTRACE_SYSEMU			0x1f</div><div class='ctx'> #define PTRACE_SYSEMU_SINGLESTEP	0x20</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/include/uapi/asm/setup.h b/arch/loongarch/include/uapi/asm/setup.h<br/>new file mode 100644<br/>index 000000000000..d46363ce3e02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/include/uapi/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/include/uapi/asm/setup.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+</div><div class='add'>+#ifndef _UAPI_ASM_LOONGARCH_SETUP_H</div><div class='add'>+#define _UAPI_ASM_LOONGARCH_SETUP_H</div><div class='add'>+</div><div class='add'>+#define COMMAND_LINE_SIZE	4096</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_ASM_LOONGARCH_SETUP_H */</div><div class='head'>diff --git a/arch/loongarch/kernel/Makefile b/arch/loongarch/kernel/Makefile<br/>index c9bfeda89e40..001924877772 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/Makefile</a></div><div class='hunk'>@@ -5,12 +5,12 @@</div><div class='ctx'> </div><div class='ctx'> OBJECT_FILES_NON_STANDARD_head.o := y</div><div class='ctx'> </div><div class='del'>-extra-y		:= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	:= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y		+= head.o cpu-probe.o cacheinfo.o env.o setup.o entry.o genex.o \</div><div class='del'>-		   traps.o irq.o idle.o process.o dma.o mem.o io.o reset.o switch.o \</div><div class='add'>+		   traps.o irq.o idle.o process.o dma.o mem.o reset.o switch.o \</div><div class='ctx'> 		   elf.o syscall.o signal.o time.o topology.o inst.o ptrace.o vdso.o \</div><div class='del'>-		   alternative.o unwind.o</div><div class='add'>+		   alternative.o kdebugfs.o unwind.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ACPI)		+= acpi.o</div><div class='ctx'> obj-$(CONFIG_EFI) 		+= efi.o</div><div class='hunk'>@@ -21,10 +21,10 @@ obj-$(CONFIG_CPU_HAS_LBT)	+= lbt.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARCH_STRICT_ALIGN)	+= unaligned.o</div><div class='ctx'> </div><div class='del'>-CFLAGS_module.o		+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_syscall.o	+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_traps.o		+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_perf_event.o	+= $(call cc-option,-Wno-override-init,)</div><div class='add'>+CFLAGS_module.o		+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_syscall.o	+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_traps.o		+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_perf_event.o	+= $(call cc-disable-warning, override-init)</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'>   ifndef CONFIG_DYNAMIC_FTRACE</div><div class='hunk'>@@ -62,6 +62,7 @@ obj-$(CONFIG_MAGIC_SYSRQ)	+= sysrq.o</div><div class='ctx'> obj-$(CONFIG_RELOCATABLE)	+= relocate.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KEXEC_CORE)	+= machine_kexec.o relocate_kernel.o</div><div class='add'>+obj-$(CONFIG_KEXEC_FILE)	+= machine_kexec_file.o kexec_efi.o kexec_elf.o</div><div class='ctx'> obj-$(CONFIG_CRASH_DUMP)	+= crash_dump.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_UNWINDER_GUESS)	+= unwind_guess.o</div><div class='head'>diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c<br/>index f1a74b80f22c..1367ca759468 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/acpi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/acpi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/acpi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/acpi.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/efi-bgrt.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='hunk'>@@ -58,48 +59,48 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)</div><div class='ctx'> 		return ioremap_cache(phys, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpu_enumerated = 0;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-static int set_processor_mask(u32 id, u32 flags)</div><div class='add'>+static int set_processor_mask(u32 id, u32 pass)</div><div class='ctx'> {</div><div class='del'>-	int nr_cpus;</div><div class='del'>-	int cpu, cpuid = id;</div><div class='del'>-</div><div class='del'>-	if (!cpu_enumerated)</div><div class='del'>-		nr_cpus = NR_CPUS;</div><div class='del'>-	else</div><div class='del'>-		nr_cpus = nr_cpu_ids;</div><div class='add'>+	int cpu = -1, cpuid = id;</div><div class='ctx'> </div><div class='del'>-	if (num_processors &gt;= nr_cpus) {</div><div class='add'>+	if (num_processors &gt;= NR_CPUS) {</div><div class='ctx'> 		pr_warn(PREFIX "nr_cpus limit of %i reached."</div><div class='del'>-			" processor 0x%x ignored.\n", nr_cpus, cpuid);</div><div class='add'>+			" processor 0x%x ignored.\n", NR_CPUS, cpuid);</div><div class='ctx'> </div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (cpuid == loongson_sysconf.boot_cpu_id)</div><div class='ctx'> 		cpu = 0;</div><div class='del'>-	else</div><div class='del'>-		cpu = find_first_zero_bit(cpumask_bits(cpu_present_mask), NR_CPUS);</div><div class='ctx'> </div><div class='del'>-	if (!cpu_enumerated)</div><div class='del'>-		set_cpu_possible(cpu, true);</div><div class='del'>-</div><div class='del'>-	if (flags &amp; ACPI_MADT_ENABLED) {</div><div class='add'>+	switch (pass) {</div><div class='add'>+	case 1: /* Pass 1 handle enabled processors */</div><div class='add'>+		if (cpu &lt; 0)</div><div class='add'>+			cpu = find_first_zero_bit(cpumask_bits(cpu_present_mask), NR_CPUS);</div><div class='ctx'> 		num_processors++;</div><div class='ctx'> 		set_cpu_present(cpu, true);</div><div class='del'>-		__cpu_number_map[cpuid] = cpu;</div><div class='del'>-		__cpu_logical_map[cpu] = cpuid;</div><div class='del'>-	} else</div><div class='add'>+		break;</div><div class='add'>+	case 2: /* Pass 2 handle disabled processors */</div><div class='add'>+		if (cpu &lt; 0)</div><div class='add'>+			cpu = find_first_zero_bit(cpumask_bits(cpu_possible_mask), NR_CPUS);</div><div class='ctx'> 		disabled_cpus++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return cpu;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_cpu_possible(cpu, true);</div><div class='add'>+	__cpu_number_map[cpuid] = cpu;</div><div class='add'>+	__cpu_logical_map[cpu] = cpuid;</div><div class='ctx'> </div><div class='ctx'> 	return cpu;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int __init</div><div class='del'>-acpi_parse_processor(union acpi_subtable_headers *header, const unsigned long end)</div><div class='add'>+acpi_parse_p1_processor(union acpi_subtable_headers *header, const unsigned long end)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_madt_core_pic *processor = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -110,13 +111,30 @@ acpi_parse_processor(union acpi_subtable_headers *header, const unsigned long en</div><div class='ctx'> 	acpi_table_print_madt_entry(&amp;header-&gt;common);</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	acpi_core_pic[processor-&gt;core_id] = *processor;</div><div class='del'>-	set_processor_mask(processor-&gt;core_id, processor-&gt;flags);</div><div class='add'>+	if (processor-&gt;flags &amp; ACPI_MADT_ENABLED)</div><div class='add'>+		set_processor_mask(processor-&gt;core_id, 1);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init</div><div class='add'>+acpi_parse_p2_processor(union acpi_subtable_headers *header, const unsigned long end)</div><div class='add'>+{</div><div class='add'>+	struct acpi_madt_core_pic *processor = NULL;</div><div class='add'>+</div><div class='add'>+	processor = (struct acpi_madt_core_pic *)header;</div><div class='add'>+	if (BAD_MADT_ENTRY(processor, end))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	if (!(processor-&gt;flags &amp; ACPI_MADT_ENABLED))</div><div class='add'>+		set_processor_mask(processor-&gt;core_id, 2);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static int __init</div><div class='ctx'> acpi_parse_eio_master(union acpi_subtable_headers *header, const unsigned long end)</div><div class='ctx'> {</div><div class='ctx'> 	static int core = 0;</div><div class='hunk'>@@ -143,12 +161,14 @@ static void __init acpi_process_madt(void)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	acpi_table_parse_madt(ACPI_MADT_TYPE_CORE_PIC,</div><div class='del'>-			acpi_parse_processor, MAX_CORE_PIC);</div><div class='add'>+			acpi_parse_p1_processor, MAX_CORE_PIC);</div><div class='add'>+</div><div class='add'>+	acpi_table_parse_madt(ACPI_MADT_TYPE_CORE_PIC,</div><div class='add'>+			acpi_parse_p2_processor, MAX_CORE_PIC);</div><div class='ctx'> </div><div class='ctx'> 	acpi_table_parse_madt(ACPI_MADT_TYPE_EIO_PIC,</div><div class='ctx'> 			acpi_parse_eio_master, MAX_IO_PICS);</div><div class='ctx'> </div><div class='del'>-	cpu_enumerated = 1;</div><div class='ctx'> 	loongson_sysconf.nr_cpus = num_processors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -225,34 +245,6 @@ fdt_earlycon:</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI_NUMA</div><div class='ctx'> </div><div class='del'>-static __init int setup_node(int pxm)</div><div class='del'>-{</div><div class='del'>-	return acpi_map_pxm_to_node(pxm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Callback for SLIT parsing.  pxm_to_node() returns NUMA_NO_NODE for</div><div class='del'>- * I/O localities since SRAT does not list them.  I/O localities are</div><div class='del'>- * not supported at this point.</div><div class='del'>- */</div><div class='del'>-unsigned int numa_distance_cnt;</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_numa_distances_cnt(struct acpi_table_slit *slit)</div><div class='del'>-{</div><div class='del'>-	return slit-&gt;locality_count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init numa_set_distance(int from, int to, int distance)</div><div class='del'>-{</div><div class='del'>-	if ((u8)distance != distance || (from == to &amp;&amp; distance != LOCAL_DISTANCE)) {</div><div class='del'>-		pr_warn_once("Warning: invalid distance parameter, from=%d to=%d distance=%d\n",</div><div class='del'>-				from, to, distance);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	node_distances[from][to] = distance;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Callback for Proximity Domain -&gt; CPUID mapping */</div><div class='ctx'> void __init</div><div class='ctx'> acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)</div><div class='hunk'>@@ -273,7 +265,41 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)</div><div class='ctx'> 		pxm |= (pa-&gt;proximity_domain_hi[1] &lt;&lt; 16);</div><div class='ctx'> 		pxm |= (pa-&gt;proximity_domain_hi[2] &lt;&lt; 24);</div><div class='ctx'> 	}</div><div class='del'>-	node = setup_node(pxm);</div><div class='add'>+	node = acpi_map_pxm_to_node(pxm);</div><div class='add'>+	if (node &lt; 0) {</div><div class='add'>+		pr_err("SRAT: Too many proximity domains %x\n", pxm);</div><div class='add'>+		bad_srat();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pa-&gt;apic_id &gt;= CONFIG_NR_CPUS) {</div><div class='add'>+		pr_info("SRAT: PXM %u -&gt; CPU 0x%02x -&gt; Node %u skipped apicid that is too big\n",</div><div class='add'>+				pxm, pa-&gt;apic_id, node);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	early_numa_add_cpu(pa-&gt;apic_id, node);</div><div class='add'>+</div><div class='add'>+	set_cpuid_to_node(pa-&gt;apic_id, node);</div><div class='add'>+	node_set(node, numa_nodes_parsed);</div><div class='add'>+	pr_info("SRAT: PXM %u -&gt; CPU 0x%02x -&gt; Node %u\n", pxm, pa-&gt;apic_id, node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init</div><div class='add'>+acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa)</div><div class='add'>+{</div><div class='add'>+	int pxm, node;</div><div class='add'>+</div><div class='add'>+	if (srat_disabled())</div><div class='add'>+		return;</div><div class='add'>+	if (pa-&gt;header.length &lt; sizeof(struct acpi_srat_x2apic_cpu_affinity)) {</div><div class='add'>+		bad_srat();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if ((pa-&gt;flags &amp; ACPI_SRAT_CPU_ENABLED) == 0)</div><div class='add'>+		return;</div><div class='add'>+	pxm = pa-&gt;proximity_domain;</div><div class='add'>+	node = acpi_map_pxm_to_node(pxm);</div><div class='ctx'> 	if (node &lt; 0) {</div><div class='ctx'> 		pr_err("SRAT: Too many proximity domains %x\n", pxm);</div><div class='ctx'> 		bad_srat();</div><div class='hunk'>@@ -310,6 +336,10 @@ static int __ref acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)</div><div class='ctx'> 	int nid;</div><div class='ctx'> </div><div class='ctx'> 	nid = acpi_get_node(handle);</div><div class='add'>+</div><div class='add'>+	if (nid != NUMA_NO_NODE)</div><div class='add'>+		nid = early_cpu_to_node(cpu);</div><div class='add'>+</div><div class='ctx'> 	if (nid != NUMA_NO_NODE) {</div><div class='ctx'> 		set_cpuid_to_node(physid, nid);</div><div class='ctx'> 		node_set(nid, numa_nodes_parsed);</div><div class='hunk'>@@ -324,12 +354,14 @@ int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, int *pcpu</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	cpu = set_processor_mask(physid, ACPI_MADT_ENABLED);</div><div class='del'>-	if (cpu &lt; 0) {</div><div class='add'>+	cpu = cpu_number_map(physid);</div><div class='add'>+	if (cpu &lt; 0 || cpu &gt;= nr_cpu_ids) {</div><div class='ctx'> 		pr_info(PREFIX "Unable to map lapic to logical cpu number\n");</div><div class='del'>-		return cpu;</div><div class='add'>+		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	num_processors++;</div><div class='add'>+	set_cpu_present(cpu, true);</div><div class='ctx'> 	acpi_map_cpu2node(handle, cpu, physid);</div><div class='ctx'> </div><div class='ctx'> 	*pcpu = cpu;</div><div class='head'>diff --git a/arch/loongarch/kernel/alternative.c b/arch/loongarch/kernel/alternative.c<br/>index 4ad13847e962..0e0c766df1e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/alternative.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/alternative.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/alternative.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/alternative.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='head'>diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/asm-offsets.c<br/>index bee9f7a3108f..3017c7157600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='hunk'>@@ -14,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __used output_ptreg_defines(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -279,18 +282,6 @@ static void __used output_pbe_defines(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_FUNCTION_GRAPH_TRACER</div><div class='del'>-static void __used output_fgraph_ret_regs_defines(void)</div><div class='del'>-{</div><div class='del'>-	COMMENT("LoongArch fgraph_ret_regs offsets.");</div><div class='del'>-	OFFSET(FGRET_REGS_A0, fgraph_ret_regs, regs[0]);</div><div class='del'>-	OFFSET(FGRET_REGS_A1, fgraph_ret_regs, regs[1]);</div><div class='del'>-	OFFSET(FGRET_REGS_FP, fgraph_ret_regs, fp);</div><div class='del'>-	DEFINE(FGRET_REGS_SIZE, sizeof(struct fgraph_ret_regs));</div><div class='del'>-	BLANK();</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void __used output_kvm_defines(void)</div><div class='ctx'> {</div><div class='ctx'> 	COMMENT("KVM/LoongArch Specific offsets.");</div><div class='hunk'>@@ -307,6 +298,7 @@ static void __used output_kvm_defines(void)</div><div class='ctx'> 	OFFSET(KVM_ARCH_HSP, kvm_vcpu_arch, host_sp);</div><div class='ctx'> 	OFFSET(KVM_ARCH_HTP, kvm_vcpu_arch, host_tp);</div><div class='ctx'> 	OFFSET(KVM_ARCH_HPGD, kvm_vcpu_arch, host_pgd);</div><div class='add'>+	OFFSET(KVM_ARCH_KVMPGD, kvm_vcpu_arch, kvm_pgd);</div><div class='ctx'> 	OFFSET(KVM_ARCH_HANDLE_EXIT, kvm_vcpu_arch, handle_exit);</div><div class='ctx'> 	OFFSET(KVM_ARCH_HEENTRY, kvm_vcpu_arch, host_eentry);</div><div class='ctx'> 	OFFSET(KVM_ARCH_GEENTRY, kvm_vcpu_arch, guest_eentry);</div><div class='hunk'>@@ -321,3 +313,11 @@ static void __used output_kvm_defines(void)</div><div class='ctx'> 	OFFSET(KVM_GPGD, kvm, arch.pgd);</div><div class='ctx'> 	BLANK();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void __used output_vdso_defines(void)</div><div class='add'>+{</div><div class='add'>+	COMMENT("LoongArch vDSO offsets.");</div><div class='add'>+</div><div class='add'>+	DEFINE(__VDSO_PAGES, VDSO_NR_PAGES);</div><div class='add'>+	BLANK();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kernel/cacheinfo.c b/arch/loongarch/kernel/cacheinfo.c<br/>index c7988f757281..8e231b0d2cd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/cacheinfo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/cacheinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/cacheinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/cacheinfo.c</a></div><div class='hunk'>@@ -51,6 +51,12 @@ static void cache_cpumap_setup(unsigned int cpu)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			sib_leaf = sib_cpu_ci-&gt;info_list + index;</div><div class='add'>+			/* SMT cores share all caches */</div><div class='add'>+			if (cpus_are_siblings(i, cpu)) {</div><div class='add'>+				cpumask_set_cpu(cpu, &amp;sib_leaf-&gt;shared_cpu_map);</div><div class='add'>+				cpumask_set_cpu(i, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+			}</div><div class='add'>+			/* Node's cores share shared caches */</div><div class='ctx'> 			if (cache_leaves_are_shared(this_leaf, sib_leaf)) {</div><div class='ctx'> 				cpumask_set_cpu(cpu, &amp;sib_leaf-&gt;shared_cpu_map);</div><div class='ctx'> 				cpumask_set_cpu(i, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='head'>diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c<br/>index cbce099037b2..cbfce2872d71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/cpu-probe.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/cpu-probe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/cpu-probe.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/cpu-probe.c</a></div><div class='hunk'>@@ -52,6 +52,48 @@ static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_loongarch *c)</div><div class='ctx'> 	c-&gt;fpu_mask = ~(fcsr0 ^ fcsr1) &amp; ~mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* simd = -1/0/128/256 */</div><div class='add'>+static unsigned int simd = -1U;</div><div class='add'>+</div><div class='add'>+static int __init cpu_setup_simd(char *str)</div><div class='add'>+{</div><div class='add'>+	get_option(&amp;str, &amp;simd);</div><div class='add'>+	pr_info("Set SIMD width = %u\n", simd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+early_param("simd", cpu_setup_simd);</div><div class='add'>+</div><div class='add'>+static int __init cpu_final_simd(void)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_loongarch *c = &amp;cpu_data[0];</div><div class='add'>+</div><div class='add'>+	if (simd &lt; 128) {</div><div class='add'>+		c-&gt;options &amp;= ~LOONGARCH_CPU_LSX;</div><div class='add'>+		elf_hwcap &amp;= ~HWCAP_LOONGARCH_LSX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (simd &lt; 256) {</div><div class='add'>+		c-&gt;options &amp;= ~LOONGARCH_CPU_LASX;</div><div class='add'>+		elf_hwcap &amp;= ~HWCAP_LOONGARCH_LASX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	simd = 0;</div><div class='add'>+</div><div class='add'>+	if (c-&gt;options &amp; LOONGARCH_CPU_LSX)</div><div class='add'>+		simd = 128;</div><div class='add'>+</div><div class='add'>+	if (c-&gt;options &amp; LOONGARCH_CPU_LASX)</div><div class='add'>+		simd = 256;</div><div class='add'>+</div><div class='add'>+	pr_info("Final SIMD width = %u\n", simd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(cpu_final_simd);</div><div class='add'>+</div><div class='ctx'> static inline void set_elf_platform(int cpu, const char *plat)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu == 0)</div><div class='hunk'>@@ -134,13 +176,13 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)</div><div class='ctx'> 		elf_hwcap |= HWCAP_LOONGARCH_FPU;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_LSX</div><div class='del'>-	if (config &amp; CPUCFG2_LSX) {</div><div class='add'>+	if ((config &amp; CPUCFG2_LSX) &amp;&amp; (simd &gt;= 128)) {</div><div class='ctx'> 		c-&gt;options |= LOONGARCH_CPU_LSX;</div><div class='ctx'> 		elf_hwcap |= HWCAP_LOONGARCH_LSX;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_LASX</div><div class='del'>-	if (config &amp; CPUCFG2_LASX) {</div><div class='add'>+	if ((config &amp; CPUCFG2_LASX) &amp;&amp; (simd &gt;= 256)) {</div><div class='ctx'> 		c-&gt;options |= LOONGARCH_CPU_LASX;</div><div class='ctx'> 		elf_hwcap |= HWCAP_LOONGARCH_LASX;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -190,6 +232,7 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)</div><div class='ctx'> 	set_cpu_asid_mask(c, asid_mask);</div><div class='ctx'> </div><div class='ctx'> 	config = read_csr_prcfg1();</div><div class='add'>+	c-&gt;timerbits = (config &amp; CSR_CONF1_TMRBITS) &gt;&gt; CSR_CONF1_TMRBITS_SHIFT;</div><div class='ctx'> 	c-&gt;ksave_mask = GENMASK((config &amp; CSR_CONF1_KSNUM) - 1, 0);</div><div class='ctx'> 	c-&gt;ksave_mask &amp;= ~(EXC_KSAVE_MASK | PERCPU_KSAVE_MASK | KVM_KSAVE_MASK);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/efi-header.S b/arch/loongarch/kernel/efi-header.S<br/>index 5f23b85d78ca..ba0bdbf86aa8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/efi-header.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/efi-header.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/efi-header.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/efi-header.S</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.macro	__EFI_PE_HEADER</div><div class='del'>-	.long	PE_MAGIC</div><div class='add'>+	.long	IMAGE_NT_SIGNATURE</div><div class='ctx'> .Lcoff_header:</div><div class='ctx'> 	.short	IMAGE_FILE_MACHINE_LOONGARCH64		/* Machine */</div><div class='ctx'> 	.short	.Lsection_count				/* NumberOfSections */</div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> 		IMAGE_FILE_LINE_NUMS_STRIPPED		/* Characteristics */</div><div class='ctx'> </div><div class='ctx'> .Loptional_header:</div><div class='del'>-	.short	PE_OPT_MAGIC_PE32PLUS			/* PE32+ format */</div><div class='add'>+	.short	IMAGE_NT_OPTIONAL_HDR64_MAGIC		/* PE32+ format */</div><div class='ctx'> 	.byte	0x02					/* MajorLinkerVersion */</div><div class='ctx'> 	.byte	0x14					/* MinorLinkerVersion */</div><div class='ctx'> 	.long	__inittext_end - .Lefi_header_end	/* SizeOfCode */</div><div class='head'>diff --git a/arch/loongarch/kernel/efi.c b/arch/loongarch/kernel/efi.c<br/>index 2bf86aeda874..860a3bc030e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/efi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/efi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/efi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/efi.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ static void __init init_screen_info(void)</div><div class='ctx'> 	memset(si, 0, sizeof(*si));</div><div class='ctx'> 	early_memunmap(si, sizeof(*si));</div><div class='ctx'> </div><div class='del'>-	memblock_reserve(screen_info.lfb_base, screen_info.lfb_size);</div><div class='add'>+	memblock_reserve(__screen_info_lfb_base(&amp;screen_info), screen_info.lfb_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init efi_init(void)</div><div class='hunk'>@@ -144,6 +144,18 @@ void __init efi_init(void)</div><div class='ctx'> 		if (efi_memmap_init_early(&amp;data) &lt; 0)</div><div class='ctx'> 			panic("Unable to map EFI memory map.\n");</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Reserve the physical memory region occupied by the EFI</div><div class='add'>+		 * memory map table (header + descriptors). This is crucial</div><div class='add'>+		 * for kdump, as the kdump kernel relies on this original</div><div class='add'>+		 * memmap passed by the bootloader. Without reservation,</div><div class='add'>+		 * this region could be overwritten by the primary kernel.</div><div class='add'>+		 * Also, set the EFI_PRESERVE_BS_REGIONS flag to indicate that</div><div class='add'>+		 * critical boot services code/data regions like this are preserved.</div><div class='add'>+		 */</div><div class='add'>+		memblock_reserve((phys_addr_t)boot_memmap, sizeof(*tbl) + data.size);</div><div class='add'>+		set_bit(EFI_PRESERVE_BS_REGIONS, &amp;efi.flags);</div><div class='add'>+</div><div class='ctx'> 		early_memunmap(tbl, sizeof(*tbl));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/elf.c b/arch/loongarch/kernel/elf.c<br/>index 0fa81ced28dc..3d98c6aa00db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/elf.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/elf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/elf.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/elf.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/binfmts.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu-features.h&gt;</div><div class='head'>diff --git a/arch/loongarch/kernel/entry.S b/arch/loongarch/kernel/entry.S<br/>index 48e7e34e355e..47e1db9a1ce4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/entry.S</a></div><div class='hunk'>@@ -73,28 +73,29 @@ SYM_CODE_START(handle_syscall)</div><div class='ctx'> 	move		a0, sp</div><div class='ctx'> 	bl		do_syscall</div><div class='ctx'> </div><div class='add'>+	STACKLEAK_ERASE</div><div class='ctx'> 	RESTORE_ALL_AND_RET</div><div class='ctx'> SYM_CODE_END(handle_syscall)</div><div class='ctx'> _ASM_NOKPROBE(handle_syscall)</div><div class='ctx'> </div><div class='del'>-SYM_CODE_START(ret_from_fork)</div><div class='add'>+SYM_CODE_START(ret_from_fork_asm)</div><div class='ctx'> 	UNWIND_HINT_REGS</div><div class='del'>-	bl		schedule_tail		# a0 = struct task_struct *prev</div><div class='del'>-	move		a0, sp</div><div class='del'>-	bl 		syscall_exit_to_user_mode</div><div class='add'>+	move		a1, sp</div><div class='add'>+	bl 		ret_from_fork</div><div class='add'>+	STACKLEAK_ERASE</div><div class='ctx'> 	RESTORE_STATIC</div><div class='ctx'> 	RESTORE_SOME</div><div class='ctx'> 	RESTORE_SP_AND_RET</div><div class='del'>-SYM_CODE_END(ret_from_fork)</div><div class='add'>+SYM_CODE_END(ret_from_fork_asm)</div><div class='ctx'> </div><div class='del'>-SYM_CODE_START(ret_from_kernel_thread)</div><div class='add'>+SYM_CODE_START(ret_from_kernel_thread_asm)</div><div class='ctx'> 	UNWIND_HINT_REGS</div><div class='del'>-	bl		schedule_tail		# a0 = struct task_struct *prev</div><div class='del'>-	move		a0, s1</div><div class='del'>-	jirl		ra, s0, 0</div><div class='del'>-	move		a0, sp</div><div class='del'>-	bl		syscall_exit_to_user_mode</div><div class='add'>+	move		a1, sp</div><div class='add'>+	move		a2, s0</div><div class='add'>+	move		a3, s1</div><div class='add'>+	bl		ret_from_kernel_thread</div><div class='add'>+	STACKLEAK_ERASE</div><div class='ctx'> 	RESTORE_STATIC</div><div class='ctx'> 	RESTORE_SOME</div><div class='ctx'> 	RESTORE_SP_AND_RET</div><div class='del'>-SYM_CODE_END(ret_from_kernel_thread)</div><div class='add'>+SYM_CODE_END(ret_from_kernel_thread_asm)</div><div class='head'>diff --git a/arch/loongarch/kernel/env.c b/arch/loongarch/kernel/env.c<br/>index 2f1f5b08638f..23bd5ae2212c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/env.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/env.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/env.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/env.c</a></div><div class='hunk'>@@ -39,16 +39,19 @@ void __init init_environ(void)</div><div class='ctx'> </div><div class='ctx'> static int __init init_cpu_fullname(void)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *root;</div><div class='ctx'> 	int cpu, ret;</div><div class='del'>-	char *model;</div><div class='add'>+	char *cpuname;</div><div class='add'>+	const char *model;</div><div class='add'>+	struct device_node *root;</div><div class='ctx'> </div><div class='ctx'> 	/* Parsing cpuname from DTS model property */</div><div class='ctx'> 	root = of_find_node_by_path("/");</div><div class='del'>-	ret = of_property_read_string(root, "model", (const char **)&amp;model);</div><div class='add'>+	ret = of_property_read_string(root, "model", &amp;model);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		cpuname = kstrdup(model, GFP_KERNEL);</div><div class='add'>+		loongson_sysconf.cpuname = strsep(&amp;cpuname, " ");</div><div class='add'>+	}</div><div class='ctx'> 	of_node_put(root);</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		loongson_sysconf.cpuname = strsep(&amp;model, " ");</div><div class='ctx'> </div><div class='ctx'> 	if (loongson_sysconf.cpuname &amp;&amp; !strncmp(loongson_sysconf.cpuname, "Loongson", 8)) {</div><div class='ctx'> 		for (cpu = 0; cpu &lt; NR_CPUS; cpu++)</div><div class='hunk'>@@ -68,6 +71,8 @@ static int __init fdt_cpu_clk_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	clk = of_clk_get(np, 0);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='ctx'> 	if (IS_ERR(clk))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -81,7 +86,7 @@ late_initcall(fdt_cpu_clk_init);</div><div class='ctx'> static ssize_t boardinfo_show(struct kobject *kobj,</div><div class='ctx'> 			      struct kobj_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(buf,</div><div class='add'>+	return sysfs_emit(buf,</div><div class='ctx'> 		"BIOS Information\n"</div><div class='ctx'> 		"Vendor\t\t\t: %s\n"</div><div class='ctx'> 		"Version\t\t\t: %s\n"</div><div class='hunk'>@@ -104,6 +109,8 @@ static int __init boardinfo_init(void)</div><div class='ctx'> 	struct kobject *loongson_kobj;</div><div class='ctx'> </div><div class='ctx'> 	loongson_kobj = kobject_create_and_add("loongson", firmware_kobj);</div><div class='add'>+	if (!loongson_kobj)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	return sysfs_create_file(loongson_kobj, &amp;boardinfo_attr.attr);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/fpu.S b/arch/loongarch/kernel/fpu.S<br/>index 6ab640101457..28caf416ae36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/fpu.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/fpu.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/fpu.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/fpu.S</a></div><div class='hunk'>@@ -458,6 +458,7 @@ SYM_FUNC_START(_save_fp_context)</div><div class='ctx'> 	li.w		a0, 0				# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_fp_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_fp_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -471,6 +472,7 @@ SYM_FUNC_START(_restore_fp_context)</div><div class='ctx'> 	li.w		a0, 0				# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_fp_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_fp_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -484,6 +486,7 @@ SYM_FUNC_START(_save_lsx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_save_lsx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lsx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -497,6 +500,7 @@ SYM_FUNC_START(_restore_lsx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_restore_lsx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lsx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -510,6 +514,7 @@ SYM_FUNC_START(_save_lasx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_save_lasx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lasx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -523,6 +528,7 @@ SYM_FUNC_START(_restore_lasx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_restore_lasx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lasx_context)</div><div class='ctx'> </div><div class='ctx'> .L_fpu_fault:</div><div class='ctx'> 	li.w	a0, -EFAULT				# failure</div><div class='head'>diff --git a/arch/loongarch/kernel/ftrace_dyn.c b/arch/loongarch/kernel/ftrace_dyn.c<br/>index bff058317062..d5d81d74034c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/ftrace_dyn.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/ftrace_dyn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/ftrace_dyn.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/ftrace_dyn.c</a></div><div class='hunk'>@@ -85,14 +85,13 @@ static bool ftrace_find_callable_addr(struct dyn_ftrace *rec, struct module *mod</div><div class='ctx'> 	 * dealing with an out-of-range condition, we can assume it</div><div class='ctx'> 	 * is due to a module being loaded far away from the kernel.</div><div class='ctx'> 	 *</div><div class='del'>-	 * NOTE: __module_text_address() must be called with preemption</div><div class='del'>-	 * disabled, but we can rely on ftrace_lock to ensure that 'mod'</div><div class='add'>+	 * NOTE: __module_text_address() must be called within a RCU read</div><div class='add'>+	 * section, but we can rely on ftrace_lock to ensure that 'mod'</div><div class='ctx'> 	 * retains its validity throughout the remainder of this code.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!mod) {</div><div class='del'>-		preempt_disable();</div><div class='del'>-		mod = __module_text_address(pc);</div><div class='del'>-		preempt_enable();</div><div class='add'>+		scoped_guard(rcu)</div><div class='add'>+			mod = __module_text_address(pc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!mod))</div><div class='hunk'>@@ -241,10 +240,18 @@ void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent)</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 		       struct ftrace_ops *op, struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	struct pt_regs *regs = &amp;fregs-&gt;regs;</div><div class='add'>+	struct pt_regs *regs = &amp;arch_ftrace_regs(fregs)-&gt;regs;</div><div class='ctx'> 	unsigned long *parent = (unsigned long *)&amp;regs-&gt;regs[1];</div><div class='add'>+	unsigned long return_hooker = (unsigned long)&amp;return_to_handler;</div><div class='add'>+	unsigned long old;</div><div class='add'>+</div><div class='add'>+	if (unlikely(atomic_read(&amp;current-&gt;tracing_graph_pause)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old = *parent;</div><div class='ctx'> </div><div class='del'>-	prepare_ftrace_return(ip, (unsigned long *)parent);</div><div class='add'>+	if (!function_graph_enter_regs(old, ip, 0, parent, fregs))</div><div class='add'>+		*parent = return_hooker;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> static int ftrace_modify_graph_caller(bool enable)</div><div class='head'>diff --git a/arch/loongarch/kernel/genex.S b/arch/loongarch/kernel/genex.S<br/>index 86d5d90ebefe..733a7665e434 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/genex.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/genex.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/genex.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/genex.S</a></div><div class='hunk'>@@ -16,30 +16,35 @@</div><div class='ctx'> #include &lt;asm/stackframe.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> </div><div class='add'>+	.section .cpuidle.text, "ax"</div><div class='ctx'> 	.align	5</div><div class='ctx'> SYM_FUNC_START(__arch_cpu_idle)</div><div class='del'>-	/* start of rollback region */</div><div class='del'>-	LONG_L	t0, tp, TI_FLAGS</div><div class='del'>-	nop</div><div class='del'>-	andi	t0, t0, _TIF_NEED_RESCHED</div><div class='del'>-	bnez	t0, 1f</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='add'>+	/* start of idle interrupt region */</div><div class='add'>+	ori	t0, zero, CSR_CRMD_IE</div><div class='add'>+	/* idle instruction needs irq enabled */</div><div class='add'>+	csrxchg	t0, t0, LOONGARCH_CSR_CRMD</div><div class='add'>+	/*</div><div class='add'>+	 * If an interrupt lands here; between enabling interrupts above and</div><div class='add'>+	 * going idle on the next instruction, we must *NOT* go idle since the</div><div class='add'>+	 * interrupt could have set TIF_NEED_RESCHED or caused an timer to need</div><div class='add'>+	 * reprogramming. Fall through -- see handle_vint() below -- and have</div><div class='add'>+	 * the idle loop take care of things.</div><div class='add'>+	 */</div><div class='ctx'> 	idle	0</div><div class='del'>-	/* end of rollback region */</div><div class='del'>-1:	jr	ra</div><div class='add'>+	/* end of idle interrupt region */</div><div class='add'>+idle_exit:</div><div class='add'>+	jr	ra</div><div class='ctx'> SYM_FUNC_END(__arch_cpu_idle)</div><div class='add'>+	.previous</div><div class='ctx'> </div><div class='ctx'> SYM_CODE_START(handle_vint)</div><div class='ctx'> 	UNWIND_HINT_UNDEFINED</div><div class='ctx'> 	BACKUP_T0T1</div><div class='ctx'> 	SAVE_ALL</div><div class='del'>-	la_abs	t1, __arch_cpu_idle</div><div class='add'>+	la_abs	t1, idle_exit</div><div class='ctx'> 	LONG_L	t0, sp, PT_ERA</div><div class='del'>-	/* 32 byte rollback region */</div><div class='del'>-	ori	t0, t0, 0x1f</div><div class='del'>-	xori	t0, t0, 0x1f</div><div class='add'>+	/* 3 instructions idle interrupt region */</div><div class='add'>+	ori	t0, t0, 0b1100</div><div class='ctx'> 	bne	t0, t1, 1f</div><div class='ctx'> 	LONG_S	t0, sp, PT_ERA</div><div class='ctx'> 1:	move	a0, sp</div><div class='head'>diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S<br/>index 506a99a5bbc7..e3865e92a917 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/head.S</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> 	__HEAD</div><div class='ctx'> </div><div class='ctx'> _head:</div><div class='del'>-	.word	MZ_MAGIC		/* "MZ", MS-DOS header */</div><div class='add'>+	.word	IMAGE_DOS_SIGNATURE	/* "MZ", MS-DOS header */</div><div class='ctx'> 	.org	0x8</div><div class='ctx'> 	.dword	_kernel_entry		/* Kernel entry point (physical address) */</div><div class='ctx'> 	.dword	_kernel_asize		/* Kernel image effective size */</div><div class='head'>diff --git a/arch/loongarch/kernel/hw_breakpoint.c b/arch/loongarch/kernel/hw_breakpoint.c<br/>index a6e4b605bfa8..c35f9bf38033 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/hw_breakpoint.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/hw_breakpoint.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/hw_breakpoint.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/hw_breakpoint.c</a></div><div class='hunk'>@@ -51,7 +51,13 @@ int hw_breakpoint_slots(int type)</div><div class='ctx'> 	READ_WB_REG_CASE(OFF, 4, REG, T, VAL);		\</div><div class='ctx'> 	READ_WB_REG_CASE(OFF, 5, REG, T, VAL);		\</div><div class='ctx'> 	READ_WB_REG_CASE(OFF, 6, REG, T, VAL);		\</div><div class='del'>-	READ_WB_REG_CASE(OFF, 7, REG, T, VAL);</div><div class='add'>+	READ_WB_REG_CASE(OFF, 7, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 8, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 9, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 10, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 11, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 12, REG, T, VAL);		\</div><div class='add'>+	READ_WB_REG_CASE(OFF, 13, REG, T, VAL);</div><div class='ctx'> </div><div class='ctx'> #define GEN_WRITE_WB_REG_CASES(OFF, REG, T, VAL)	\</div><div class='ctx'> 	WRITE_WB_REG_CASE(OFF, 0, REG, T, VAL);		\</div><div class='hunk'>@@ -61,7 +67,13 @@ int hw_breakpoint_slots(int type)</div><div class='ctx'> 	WRITE_WB_REG_CASE(OFF, 4, REG, T, VAL);		\</div><div class='ctx'> 	WRITE_WB_REG_CASE(OFF, 5, REG, T, VAL);		\</div><div class='ctx'> 	WRITE_WB_REG_CASE(OFF, 6, REG, T, VAL);		\</div><div class='del'>-	WRITE_WB_REG_CASE(OFF, 7, REG, T, VAL);</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 7, REG, T, VAL);		\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 8, REG, T, VAL);		\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 9, REG, T, VAL);		\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 10, REG, T, VAL);	\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 11, REG, T, VAL);	\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 12, REG, T, VAL);	\</div><div class='add'>+	WRITE_WB_REG_CASE(OFF, 13, REG, T, VAL);</div><div class='ctx'> </div><div class='ctx'> static u64 read_wb_reg(int reg, int n, int t)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/kernel/idle.c b/arch/loongarch/kernel/idle.c<br/>index 0b5dd2faeb90..54b247d8cdb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/idle.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/idle.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/idle.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/idle.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> </div><div class='ctx'> void __cpuidle arch_cpu_idle(void)</div><div class='ctx'> {</div><div class='del'>-	raw_local_irq_enable();</div><div class='del'>-	__arch_cpu_idle(); /* idle instruction needs irq enabled */</div><div class='add'>+	__arch_cpu_idle();</div><div class='ctx'> 	raw_local_irq_disable();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c<br/>index 3050329556d1..bf037f0c6b26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/inst.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/inst.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/inst.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/inst.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/set_memory.h&gt;</div><div class='add'>+#include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='hunk'>@@ -139,6 +141,9 @@ bool insns_not_supported(union loongarch_instruction insn)</div><div class='ctx'> 	case amswapw_op ... ammindbdu_op:</div><div class='ctx'> 		pr_notice("atomic memory access instructions are not supported\n");</div><div class='ctx'> 		return true;</div><div class='add'>+	case scq_op:</div><div class='add'>+		pr_notice("sc.q instruction is not supported\n");</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (insn.reg2i14_format.opcode) {</div><div class='hunk'>@@ -150,6 +155,15 @@ bool insns_not_supported(union loongarch_instruction insn)</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	switch (insn.reg2_format.opcode) {</div><div class='add'>+	case llacqw_op:</div><div class='add'>+	case llacqd_op:</div><div class='add'>+	case screlw_op:</div><div class='add'>+	case screld_op:</div><div class='add'>+		pr_notice("llacq and screl instructions are not supported\n");</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (insn.reg1i21_format.opcode) {</div><div class='ctx'> 	case bceqz_op:</div><div class='ctx'> 		pr_notice("bceqz and bcnez instructions are not supported\n");</div><div class='hunk'>@@ -218,6 +232,50 @@ int larch_insn_patch_text(void *addr, u32 insn)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct insn_copy {</div><div class='add'>+	void *dst;</div><div class='add'>+	void *src;</div><div class='add'>+	size_t len;</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int text_copy_cb(void *data)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct insn_copy *copy = data;</div><div class='add'>+</div><div class='add'>+	if (smp_processor_id() == copy-&gt;cpu) {</div><div class='add'>+		ret = copy_to_kernel_nofault(copy-&gt;dst, copy-&gt;src, copy-&gt;len);</div><div class='add'>+		if (ret)</div><div class='add'>+			pr_err("%s: operation failed\n", __func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flush_icache_range((unsigned long)copy-&gt;dst, (unsigned long)copy-&gt;dst + copy-&gt;len);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int larch_insn_text_copy(void *dst, void *src, size_t len)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	size_t start, end;</div><div class='add'>+	struct insn_copy copy = {</div><div class='add'>+		.dst = dst,</div><div class='add'>+		.src = src,</div><div class='add'>+		.len = len,</div><div class='add'>+		.cpu = smp_processor_id(),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	start = round_down((size_t)dst, PAGE_SIZE);</div><div class='add'>+	end   = round_up((size_t)dst + len, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	set_memory_rw(start, (end - start) / PAGE_SIZE);</div><div class='add'>+	ret = stop_machine(text_copy_cb, &amp;copy, cpu_online_mask);</div><div class='add'>+	set_memory_rox(start, (end - start) / PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 larch_insn_gen_nop(void)</div><div class='ctx'> {</div><div class='ctx'> 	return INSN_NOP;</div><div class='hunk'>@@ -323,6 +381,34 @@ u32 larch_insn_gen_lu52id(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm)</div><div class='ctx'> 	return insn.word;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 larch_insn_gen_beq(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm)</div><div class='add'>+{</div><div class='add'>+	union loongarch_instruction insn;</div><div class='add'>+</div><div class='add'>+	if ((imm &amp; 3) || imm &lt; -SZ_128K || imm &gt;= SZ_128K) {</div><div class='add'>+		pr_warn("The generated beq instruction is out of range.\n");</div><div class='add'>+		return INSN_BREAK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_beq(&amp;insn, rj, rd, imm &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	return insn.word;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 larch_insn_gen_bne(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm)</div><div class='add'>+{</div><div class='add'>+	union loongarch_instruction insn;</div><div class='add'>+</div><div class='add'>+	if ((imm &amp; 3) || imm &lt; -SZ_128K || imm &gt;= SZ_128K) {</div><div class='add'>+		pr_warn("The generated bne instruction is out of range.\n");</div><div class='add'>+		return INSN_BREAK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_bne(&amp;insn, rj, rd, imm &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	return insn.word;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm)</div><div class='ctx'> {</div><div class='ctx'> 	union loongarch_instruction insn;</div><div class='hunk'>@@ -332,7 +418,7 @@ u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm)</div><div class='ctx'> 		return INSN_BREAK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	emit_jirl(&amp;insn, rj, rd, imm &gt;&gt; 2);</div><div class='add'>+	emit_jirl(&amp;insn, rd, rj, imm &gt;&gt; 2);</div><div class='ctx'> </div><div class='ctx'> 	return insn.word;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/io.c b/arch/loongarch/kernel/io.c<br/>deleted file mode 100644<br/>index cb85bda5a6ad..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/io.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,94 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy data from IO memory space to "real" memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)from, 8)) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		*(u64 *)to = __raw_readq(from);</div><div class='del'>-		from += 8;</div><div class='del'>-		to += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		*(u8 *)to = __raw_readb(from);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_fromio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy data from "real" memory space to IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)</div><div class='del'>-{</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)to, 8)) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		__raw_writeq(*(u64 *)from, to);</div><div class='del'>-		from += 8;</div><div class='del'>-		to += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(*(u8 *)from, to);</div><div class='del'>-		from++;</div><div class='del'>-		to++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memcpy_toio);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "memset" on IO memory space.</div><div class='del'>- */</div><div class='del'>-void __memset_io(volatile void __iomem *dst, int c, size_t count)</div><div class='del'>-{</div><div class='del'>-	u64 qc = (u8)c;</div><div class='del'>-</div><div class='del'>-	qc |= qc &lt;&lt; 8;</div><div class='del'>-	qc |= qc &lt;&lt; 16;</div><div class='del'>-	qc |= qc &lt;&lt; 32;</div><div class='del'>-</div><div class='del'>-	while (count &amp;&amp; !IS_ALIGNED((unsigned long)dst, 8)) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt;= 8) {</div><div class='del'>-		__raw_writeq(qc, dst);</div><div class='del'>-		dst += 8;</div><div class='del'>-		count -= 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count) {</div><div class='del'>-		__raw_writeb(c, dst);</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__memset_io);</div><div class='head'>diff --git a/arch/loongarch/kernel/irq.c b/arch/loongarch/kernel/irq.c<br/>index d129039b368b..80946cafaec1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/irq.c</a></div><div class='hunk'>@@ -92,9 +92,9 @@ int __init arch_probe_nr_irqs(void)</div><div class='ctx'> 	int nr_io_pics = bitmap_weight(loongson_sysconf.cores_io_master, NR_CPUS);</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has_avecint)</div><div class='del'>-		nr_irqs = (64 + NR_VECTORS * nr_io_pics);</div><div class='add'>+		irq_set_nr_irqs(64 + NR_VECTORS * nr_io_pics);</div><div class='ctx'> 	else</div><div class='del'>-		nr_irqs = (64 + NR_VECTORS * (nr_cpu_ids + nr_io_pics));</div><div class='add'>+		irq_set_nr_irqs(64 + NR_VECTORS * (nr_cpu_ids + nr_io_pics));</div><div class='ctx'> </div><div class='ctx'> 	return NR_IRQS_LEGACY;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/kdebugfs.c b/arch/loongarch/kernel/kdebugfs.c<br/>new file mode 100644<br/>index 000000000000..80cf64772399<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kdebugfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/kdebugfs.c</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/kstrtox.h&gt;</div><div class='add'>+#include &lt;asm/loongarch.h&gt;</div><div class='add'>+</div><div class='add'>+struct dentry *arch_debugfs_dir;</div><div class='add'>+EXPORT_SYMBOL(arch_debugfs_dir);</div><div class='add'>+</div><div class='add'>+static int sfb_state, tso_state;</div><div class='add'>+</div><div class='add'>+static void set_sfb_state(void *info)</div><div class='add'>+{</div><div class='add'>+	int val = *(int *)info &lt;&lt; CSR_STFILL_SHIFT;</div><div class='add'>+</div><div class='add'>+	csr_xchg32(val, CSR_STFILL, LOONGARCH_CSR_IMPCTL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sfb_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	int s, state;</div><div class='add'>+	char str[32];</div><div class='add'>+</div><div class='add'>+	state = (csr_read32(LOONGARCH_CSR_IMPCTL1) &amp; CSR_STFILL) &gt;&gt; CSR_STFILL_SHIFT;</div><div class='add'>+</div><div class='add'>+	s = snprintf(str, sizeof(str), "Boot State: %x\nCurrent State: %x\n", sfb_state, state);</div><div class='add'>+</div><div class='add'>+	if (*ppos &gt;= s)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	s -= *ppos;</div><div class='add'>+	s = min_t(u32, s, count);</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(buf, &amp;str[*ppos], s))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	*ppos += s;</div><div class='add'>+</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sfb_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	int state;</div><div class='add'>+</div><div class='add'>+	if (kstrtoint_from_user(buf, count, 10, &amp;state))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case 0: case 1:</div><div class='add'>+		on_each_cpu(set_sfb_state, &amp;state, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations sfb_fops = {</div><div class='add'>+	.read = sfb_read,</div><div class='add'>+	.write = sfb_write,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.llseek = default_llseek</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define LDSTORDER_NLD_NST        0x0 /* 000 = No Load No Store */</div><div class='add'>+#define LDSTORDER_ALD_NST        0x1 /* 001 = All Load No Store */</div><div class='add'>+#define LDSTORDER_SLD_NST        0x3 /* 011 = Same Load No Store */</div><div class='add'>+#define LDSTORDER_NLD_AST        0x4 /* 100 = No Load All Store */</div><div class='add'>+#define LDSTORDER_ALD_AST        0x5 /* 101 = All Load All Store */</div><div class='add'>+#define LDSTORDER_SLD_AST        0x7 /* 111 = Same Load All Store */</div><div class='add'>+</div><div class='add'>+static char *tso_hints[] = {</div><div class='add'>+	"No Load No Store",</div><div class='add'>+	"All Load No Store",</div><div class='add'>+	"Invalid Config",</div><div class='add'>+	"Same Load No Store",</div><div class='add'>+	"No Load All Store",</div><div class='add'>+	"All Load All Store",</div><div class='add'>+	"Invalid Config",</div><div class='add'>+	"Same Load All Store"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void set_tso_state(void *info)</div><div class='add'>+{</div><div class='add'>+	int val = *(int *)info &lt;&lt; CSR_LDSTORDER_SHIFT;</div><div class='add'>+</div><div class='add'>+	csr_xchg32(val, CSR_LDSTORDER_MASK, LOONGARCH_CSR_IMPCTL1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t tso_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	int s, state;</div><div class='add'>+	char str[240];</div><div class='add'>+</div><div class='add'>+	state = (csr_read32(LOONGARCH_CSR_IMPCTL1) &amp; CSR_LDSTORDER_MASK) &gt;&gt; CSR_LDSTORDER_SHIFT;</div><div class='add'>+</div><div class='add'>+	s = snprintf(str, sizeof(str), "Boot State: %d (%s)\n"</div><div class='add'>+			               "Current State: %d (%s)\n\n"</div><div class='add'>+				       "Available States:\n"</div><div class='add'>+				       "0 (%s)\t" "1 (%s)\t" "3 (%s)\n"</div><div class='add'>+				       "4 (%s)\t" "5 (%s)\t" "7 (%s)\n",</div><div class='add'>+				       tso_state, tso_hints[tso_state], state, tso_hints[state],</div><div class='add'>+				       tso_hints[0], tso_hints[1], tso_hints[3], tso_hints[4], tso_hints[5], tso_hints[7]);</div><div class='add'>+</div><div class='add'>+	if (*ppos &gt;= s)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	s -= *ppos;</div><div class='add'>+	s = min_t(u32, s, count);</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(buf, &amp;str[*ppos], s))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	*ppos += s;</div><div class='add'>+</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t tso_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	int state;</div><div class='add'>+</div><div class='add'>+	if (kstrtoint_from_user(buf, count, 10, &amp;state))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case 0: case 1: case 3:</div><div class='add'>+	case 4: case 5: case 7:</div><div class='add'>+		on_each_cpu(set_tso_state, &amp;state, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations tso_fops = {</div><div class='add'>+	.read = tso_read,</div><div class='add'>+	.write = tso_write,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.llseek = default_llseek</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init arch_kdebugfs_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int config = read_cpucfg(LOONGARCH_CPUCFG3);</div><div class='add'>+</div><div class='add'>+	arch_debugfs_dir = debugfs_create_dir("loongarch", NULL);</div><div class='add'>+</div><div class='add'>+	if (config &amp; CPUCFG3_SFB) {</div><div class='add'>+		debugfs_create_file("sfb_state", S_IRUGO | S_IWUSR,</div><div class='add'>+			    arch_debugfs_dir, &amp;sfb_state, &amp;sfb_fops);</div><div class='add'>+		sfb_state = (csr_read32(LOONGARCH_CSR_IMPCTL1) &amp; CSR_STFILL) &gt;&gt; CSR_STFILL_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config &amp; (CPUCFG3_ALDORDER_CAP | CPUCFG3_ASTORDER_CAP)) {</div><div class='add'>+		debugfs_create_file("tso_state", S_IRUGO | S_IWUSR,</div><div class='add'>+			    arch_debugfs_dir, &amp;tso_state, &amp;tso_fops);</div><div class='add'>+		tso_state = (csr_read32(LOONGARCH_CSR_IMPCTL1) &amp; CSR_LDSTORDER_MASK) &gt;&gt; CSR_LDSTORDER_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+postcore_initcall(arch_kdebugfs_init);</div><div class='head'>diff --git a/arch/loongarch/kernel/kexec_efi.c b/arch/loongarch/kernel/kexec_efi.c<br/>new file mode 100644<br/>index 000000000000..45121b914f8f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kexec_efi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/kexec_efi.c</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Load EFI vmlinux file for the kexec_file_load syscall.</div><div class='add'>+ *</div><div class='add'>+ * Author: Youling Tang &lt;tangyouling@kylinos.cn&gt;</div><div class='add'>+ * Copyright (C) 2025 KylinSoft Corporation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"kexec_file(EFI): " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/kexec.h&gt;</div><div class='add'>+#include &lt;linux/pe.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/image.h&gt;</div><div class='add'>+</div><div class='add'>+static int efi_kexec_probe(const char *kernel_buf, unsigned long kernel_len)</div><div class='add'>+{</div><div class='add'>+	const struct loongarch_image_header *h = (const struct loongarch_image_header *)kernel_buf;</div><div class='add'>+</div><div class='add'>+	if (!h || (kernel_len &lt; sizeof(*h))) {</div><div class='add'>+		kexec_dprintk("No LoongArch image header.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!loongarch_header_check_dos_sig(h)) {</div><div class='add'>+		kexec_dprintk("No LoongArch PE image header.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *efi_kexec_load(struct kimage *image,</div><div class='add'>+				char *kernel, unsigned long kernel_len,</div><div class='add'>+				char *initrd, unsigned long initrd_len,</div><div class='add'>+				char *cmdline, unsigned long cmdline_len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long text_offset, kernel_segment_number;</div><div class='add'>+	struct kexec_buf kbuf;</div><div class='add'>+	struct kexec_segment *kernel_segment;</div><div class='add'>+	struct loongarch_image_header *h;</div><div class='add'>+</div><div class='add'>+	h = (struct loongarch_image_header *)kernel;</div><div class='add'>+	if (!h-&gt;kernel_asize)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Load the kernel</div><div class='add'>+	 * FIXME: Non-relocatable kernel rejected for kexec_file (require CONFIG_RELOCATABLE)</div><div class='add'>+	 */</div><div class='add'>+	kbuf.image = image;</div><div class='add'>+	kbuf.buf_max = ULONG_MAX;</div><div class='add'>+	kbuf.top_down = false;</div><div class='add'>+</div><div class='add'>+	kbuf.buffer = kernel;</div><div class='add'>+	kbuf.bufsz = kernel_len;</div><div class='add'>+	kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;</div><div class='add'>+	kbuf.memsz = le64_to_cpu(h-&gt;kernel_asize);</div><div class='add'>+	text_offset = le64_to_cpu(h-&gt;text_offset);</div><div class='add'>+	kbuf.buf_min = text_offset;</div><div class='add'>+	kbuf.buf_align = SZ_2M;</div><div class='add'>+</div><div class='add'>+	kernel_segment_number = image-&gt;nr_segments;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The location of the kernel segment may make it impossible to</div><div class='add'>+	 * satisfy the other segment requirements, so we try repeatedly</div><div class='add'>+	 * to find a location that will work.</div><div class='add'>+	 */</div><div class='add'>+	while ((ret = kexec_add_buffer(&amp;kbuf)) == 0) {</div><div class='add'>+		/* Try to load additional data */</div><div class='add'>+		kernel_segment = &amp;image-&gt;segment[kernel_segment_number];</div><div class='add'>+		ret = load_other_segments(image, kernel_segment-&gt;mem,</div><div class='add'>+					  kernel_segment-&gt;memsz, initrd,</div><div class='add'>+					  initrd_len, cmdline, cmdline_len);</div><div class='add'>+		if (!ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We couldn't find space for the other segments; erase the</div><div class='add'>+		 * kernel segment and try the next available hole.</div><div class='add'>+		 */</div><div class='add'>+		image-&gt;nr_segments -= 1;</div><div class='add'>+		kbuf.buf_min = kernel_segment-&gt;mem + kernel_segment-&gt;memsz;</div><div class='add'>+		kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("Could not find any suitable kernel location!");</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kernel_segment = &amp;image-&gt;segment[kernel_segment_number];</div><div class='add'>+</div><div class='add'>+	/* Make sure the second kernel jumps to the correct "kernel_entry" */</div><div class='add'>+	image-&gt;start = kernel_segment-&gt;mem + h-&gt;kernel_entry - text_offset;</div><div class='add'>+</div><div class='add'>+	kexec_dprintk("Loaded kernel at 0x%lx bufsz=0x%lx memsz=0x%lx\n",</div><div class='add'>+		      kernel_segment-&gt;mem, kbuf.bufsz, kernel_segment-&gt;memsz);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct kexec_file_ops kexec_efi_ops = {</div><div class='add'>+	.probe = efi_kexec_probe,</div><div class='add'>+	.load = efi_kexec_load,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/loongarch/kernel/kexec_elf.c b/arch/loongarch/kernel/kexec_elf.c<br/>new file mode 100644<br/>index 000000000000..97b2f049801a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kexec_elf.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/kexec_elf.c</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Load ELF vmlinux file for the kexec_file_load syscall.</div><div class='add'>+ *</div><div class='add'>+ * Author: Youling Tang &lt;tangyouling@kylinos.cn&gt;</div><div class='add'>+ * Copyright (C) 2025 KylinSoft Corporation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"kexec_file(ELF): " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/elf.h&gt;</div><div class='add'>+#include &lt;linux/kexec.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+</div><div class='add'>+#define elf_kexec_probe kexec_elf_probe</div><div class='add'>+</div><div class='add'>+static int _elf_kexec_load(struct kimage *image,</div><div class='add'>+			   struct elfhdr *ehdr, struct kexec_elf_info *elf_info,</div><div class='add'>+			   struct kexec_buf *kbuf, unsigned long *text_offset)</div><div class='add'>+{</div><div class='add'>+	int i, ret = -1;</div><div class='add'>+</div><div class='add'>+	/* Read in the PT_LOAD segments. */</div><div class='add'>+	for (i = 0; i &lt; ehdr-&gt;e_phnum; i++) {</div><div class='add'>+		size_t size;</div><div class='add'>+		const struct elf_phdr *phdr;</div><div class='add'>+</div><div class='add'>+		phdr = &amp;elf_info-&gt;proghdrs[i];</div><div class='add'>+		if (phdr-&gt;p_type != PT_LOAD)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		size = phdr-&gt;p_filesz;</div><div class='add'>+		if (size &gt; phdr-&gt;p_memsz)</div><div class='add'>+			size = phdr-&gt;p_memsz;</div><div class='add'>+</div><div class='add'>+		kbuf-&gt;buffer = (void *)elf_info-&gt;buffer + phdr-&gt;p_offset;</div><div class='add'>+		kbuf-&gt;bufsz = size;</div><div class='add'>+		kbuf-&gt;buf_align = phdr-&gt;p_align;</div><div class='add'>+		*text_offset = __pa(phdr-&gt;p_paddr);</div><div class='add'>+		kbuf-&gt;buf_min = *text_offset;</div><div class='add'>+		kbuf-&gt;memsz = ALIGN(phdr-&gt;p_memsz, SZ_64K);</div><div class='add'>+		kbuf-&gt;mem = KEXEC_BUF_MEM_UNKNOWN;</div><div class='add'>+		ret = kexec_add_buffer(kbuf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *elf_kexec_load(struct kimage *image,</div><div class='add'>+			    char *kernel, unsigned long kernel_len,</div><div class='add'>+			    char *initrd, unsigned long initrd_len,</div><div class='add'>+			    char *cmdline, unsigned long cmdline_len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long text_offset, kernel_segment_number;</div><div class='add'>+	struct elfhdr ehdr;</div><div class='add'>+	struct kexec_buf kbuf;</div><div class='add'>+	struct kexec_elf_info elf_info;</div><div class='add'>+	struct kexec_segment *kernel_segment;</div><div class='add'>+</div><div class='add'>+	ret = kexec_build_elf_info(kernel, kernel_len, &amp;ehdr, &amp;elf_info);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Load the kernel</div><div class='add'>+	 * FIXME: Non-relocatable kernel rejected for kexec_file (require CONFIG_RELOCATABLE)</div><div class='add'>+	 */</div><div class='add'>+	kbuf.image = image;</div><div class='add'>+	kbuf.buf_max = ULONG_MAX;</div><div class='add'>+	kbuf.top_down = false;</div><div class='add'>+</div><div class='add'>+	kernel_segment_number = image-&gt;nr_segments;</div><div class='add'>+</div><div class='add'>+	ret = _elf_kexec_load(image, &amp;ehdr, &amp;elf_info, &amp;kbuf, &amp;text_offset);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Load additional data */</div><div class='add'>+	kernel_segment = &amp;image-&gt;segment[kernel_segment_number];</div><div class='add'>+	ret = load_other_segments(image, kernel_segment-&gt;mem, kernel_segment-&gt;memsz,</div><div class='add'>+				  initrd, initrd_len, cmdline, cmdline_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Make sure the second kernel jumps to the correct "kernel_entry". */</div><div class='add'>+	image-&gt;start = kernel_segment-&gt;mem + __pa(ehdr.e_entry) - text_offset;</div><div class='add'>+</div><div class='add'>+	kexec_dprintk("Loaded kernel at 0x%lx bufsz=0x%lx memsz=0x%lx\n",</div><div class='add'>+		      kernel_segment-&gt;mem, kbuf.bufsz, kernel_segment-&gt;memsz);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kexec_free_elf_info(&amp;elf_info);</div><div class='add'>+	return ret ? ERR_PTR(ret) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct kexec_file_ops kexec_elf_ops = {</div><div class='add'>+	.probe = elf_kexec_probe,</div><div class='add'>+	.load  = elf_kexec_load,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/loongarch/kernel/kfpu.c b/arch/loongarch/kernel/kfpu.c<br/>index ec5b28e570c9..141b49bd989c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kfpu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kfpu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kfpu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/kfpu.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='hunk'>@@ -18,11 +19,28 @@ static unsigned int euen_mask = CSR_EUEN_FPEN;</div><div class='ctx'> static DEFINE_PER_CPU(bool, in_kernel_fpu);</div><div class='ctx'> static DEFINE_PER_CPU(unsigned int, euen_current);</div><div class='ctx'> </div><div class='add'>+static inline void fpregs_lock(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		preempt_disable();</div><div class='add'>+	else</div><div class='add'>+		local_bh_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fpregs_unlock(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		preempt_enable();</div><div class='add'>+	else</div><div class='add'>+		local_bh_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kernel_fpu_begin(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int *euen_curr;</div><div class='ctx'> </div><div class='del'>-	preempt_disable();</div><div class='add'>+	if (!irqs_disabled())</div><div class='add'>+		fpregs_lock();</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(this_cpu_read(in_kernel_fpu));</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +91,8 @@ void kernel_fpu_end(void)</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(in_kernel_fpu, false);</div><div class='ctx'> </div><div class='del'>-	preempt_enable();</div><div class='add'>+	if (!irqs_disabled())</div><div class='add'>+		fpregs_unlock();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kernel_fpu_end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/kgdb.c b/arch/loongarch/kernel/kgdb.c<br/>index 445c452d72a7..7be5b4c0c900 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kgdb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/kgdb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/kgdb.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/hw_breakpoint.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/kgdb.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> #include &lt;linux/processor.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -224,13 +225,13 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)</div><div class='ctx'> 	regs-&gt;csr_era = pc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void arch_kgdb_breakpoint(void)</div><div class='add'>+noinline void arch_kgdb_breakpoint(void)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ __volatile__ (			\</div><div class='ctx'> 		".globl kgdb_breakinst\n\t"	\</div><div class='del'>-		"nop\n"				\</div><div class='ctx'> 		"kgdb_breakinst:\tbreak 2\n\t"); /* BRK_KDB = 2 */</div><div class='ctx'> }</div><div class='add'>+STACK_FRAME_NON_STANDARD(arch_kgdb_breakpoint);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Calls linux_debug_hook before the kernel dies. If KGDB is enabled,</div><div class='head'>diff --git a/arch/loongarch/kernel/lbt.S b/arch/loongarch/kernel/lbt.S<br/>index 001f061d226a..71678912d24c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/lbt.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/lbt.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/lbt.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/lbt.S</a></div><div class='hunk'>@@ -90,6 +90,7 @@ SYM_FUNC_START(_save_lbt_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_lbt_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lbt_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: scr</div><div class='hunk'>@@ -110,6 +111,7 @@ SYM_FUNC_START(_restore_lbt_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_lbt_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lbt_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: ftop</div><div class='hunk'>@@ -120,6 +122,7 @@ SYM_FUNC_START(_save_ftop_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_ftop_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_ftop_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: ftop</div><div class='hunk'>@@ -150,6 +153,7 @@ SYM_FUNC_START(_restore_ftop_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_ftop_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_ftop_context)</div><div class='ctx'> </div><div class='ctx'> .L_lbt_fault:</div><div class='ctx'> 	li.w		a0, -EFAULT		# failure</div><div class='head'>diff --git a/arch/loongarch/kernel/machine_kexec.c b/arch/loongarch/kernel/machine_kexec.c<br/>index 8ae641dc53bb..e4b2bbc47e62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/machine_kexec.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/machine_kexec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/machine_kexec.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -70,18 +70,28 @@ int machine_kexec_prepare(struct kimage *kimage)</div><div class='ctx'> 	kimage-&gt;arch.efi_boot = fw_arg0;</div><div class='ctx'> 	kimage-&gt;arch.systable_ptr = fw_arg2;</div><div class='ctx'> </div><div class='del'>-	/* Find the command line */</div><div class='del'>-	for (i = 0; i &lt; kimage-&gt;nr_segments; i++) {</div><div class='del'>-		if (!strncmp(bootloader, (char __user *)kimage-&gt;segment[i].buf, strlen(bootloader))) {</div><div class='del'>-			if (!copy_from_user(cmdline_ptr, kimage-&gt;segment[i].buf, COMMAND_LINE_SIZE))</div><div class='del'>-				kimage-&gt;arch.cmdline_ptr = (unsigned long)cmdline_ptr;</div><div class='del'>-			break;</div><div class='add'>+	if (kimage-&gt;file_mode == 1) {</div><div class='add'>+		/*</div><div class='add'>+		 * kimage-&gt;cmdline_buf will be released in kexec_file_load, so copy</div><div class='add'>+		 * to the KEXEC_CMDLINE_ADDR safe area.</div><div class='add'>+		 */</div><div class='add'>+		memcpy((void *)KEXEC_CMDLINE_ADDR, (void *)kimage-&gt;arch.cmdline_ptr,</div><div class='add'>+					strlen((char *)kimage-&gt;arch.cmdline_ptr) + 1);</div><div class='add'>+		kimage-&gt;arch.cmdline_ptr = (unsigned long)KEXEC_CMDLINE_ADDR;</div><div class='add'>+	} else {</div><div class='add'>+		/* Find the command line */</div><div class='add'>+		for (i = 0; i &lt; kimage-&gt;nr_segments; i++) {</div><div class='add'>+			if (!strncmp(bootloader, (char __user *)kimage-&gt;segment[i].buf, strlen(bootloader))) {</div><div class='add'>+				if (!copy_from_user(cmdline_ptr, kimage-&gt;segment[i].buf, COMMAND_LINE_SIZE))</div><div class='add'>+					kimage-&gt;arch.cmdline_ptr = (unsigned long)cmdline_ptr;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!kimage-&gt;arch.cmdline_ptr) {</div><div class='del'>-		pr_err("Command line not included in the provided image\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		if (!kimage-&gt;arch.cmdline_ptr) {</div><div class='add'>+			pr_err("Command line not included in the provided image\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* kexec/kdump need a safe page to save reboot_code_buffer */</div><div class='hunk'>@@ -126,14 +136,14 @@ void kexec_reboot(void)</div><div class='ctx'> 	/* All secondary cpus go to kexec_smp_wait */</div><div class='ctx'> 	if (smp_processor_id() &gt; 0) {</div><div class='ctx'> 		relocated_kexec_smp_wait(NULL);</div><div class='del'>-		unreachable();</div><div class='add'>+		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	do_kexec = (void *)reboot_code_buffer;</div><div class='ctx'> 	do_kexec(efi_boot, cmdline_ptr, systable_ptr, start_addr, first_ind_entry);</div><div class='ctx'> </div><div class='del'>-	unreachable();</div><div class='add'>+	BUG();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -287,9 +297,10 @@ void machine_kexec(struct kimage *image)</div><div class='ctx'> 	/* We do not want to be bothered. */</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='del'>-	pr_notice("EFI boot flag 0x%lx\n", efi_boot);</div><div class='del'>-	pr_notice("Command line at 0x%lx\n", cmdline_ptr);</div><div class='del'>-	pr_notice("System table at 0x%lx\n", systable_ptr);</div><div class='add'>+	pr_notice("EFI boot flag: 0x%lx\n", efi_boot);</div><div class='add'>+	pr_notice("Command line addr: 0x%lx\n", cmdline_ptr);</div><div class='add'>+	pr_notice("Command line string: %s\n", (char *)cmdline_ptr);</div><div class='add'>+	pr_notice("System table addr: 0x%lx\n", systable_ptr);</div><div class='ctx'> 	pr_notice("We will call new kernel at 0x%lx\n", start_addr);</div><div class='ctx'> 	pr_notice("Bye ...\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/machine_kexec_file.c b/arch/loongarch/kernel/machine_kexec_file.c<br/>new file mode 100644<br/>index 000000000000..dda236b51a88<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/machine_kexec_file.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/machine_kexec_file.c</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * kexec_file for LoongArch</div><div class='add'>+ *</div><div class='add'>+ * Author: Youling Tang &lt;tangyouling@kylinos.cn&gt;</div><div class='add'>+ * Copyright (C) 2025 KylinSoft Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Most code is derived from LoongArch port of kexec-tools</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "kexec_file: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/kexec.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;asm/bootinfo.h&gt;</div><div class='add'>+</div><div class='add'>+const struct kexec_file_ops * const kexec_file_loaders[] = {</div><div class='add'>+	&amp;kexec_efi_ops,</div><div class='add'>+	&amp;kexec_elf_ops,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int arch_kimage_file_post_load_cleanup(struct kimage *image)</div><div class='add'>+{</div><div class='add'>+	vfree(image-&gt;elf_headers);</div><div class='add'>+	image-&gt;elf_headers = NULL;</div><div class='add'>+	image-&gt;elf_headers_sz = 0;</div><div class='add'>+</div><div class='add'>+	return kexec_image_post_load_cleanup_default(image);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add the "kexec_file" command line parameter to command line. */</div><div class='add'>+static void cmdline_add_loader(unsigned long *cmdline_tmplen, char *modified_cmdline)</div><div class='add'>+{</div><div class='add'>+	int loader_strlen;</div><div class='add'>+</div><div class='add'>+	loader_strlen = sprintf(modified_cmdline + (*cmdline_tmplen), "kexec_file ");</div><div class='add'>+	*cmdline_tmplen += loader_strlen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add the "initrd=start,size" command line parameter to command line. */</div><div class='add'>+static void cmdline_add_initrd(struct kimage *image, unsigned long *cmdline_tmplen,</div><div class='add'>+				char *modified_cmdline, unsigned long initrd)</div><div class='add'>+{</div><div class='add'>+	int initrd_strlen;</div><div class='add'>+</div><div class='add'>+	initrd_strlen = sprintf(modified_cmdline + (*cmdline_tmplen), "initrd=0x%lx,0x%lx ",</div><div class='add'>+		initrd, image-&gt;initrd_buf_len);</div><div class='add'>+	*cmdline_tmplen += initrd_strlen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CRASH_DUMP</div><div class='add'>+</div><div class='add'>+static int prepare_elf_headers(void **addr, unsigned long *sz)</div><div class='add'>+{</div><div class='add'>+	int ret, nr_ranges;</div><div class='add'>+	uint64_t i;</div><div class='add'>+	phys_addr_t start, end;</div><div class='add'>+	struct crash_mem *cmem;</div><div class='add'>+</div><div class='add'>+	nr_ranges = 2; /* for exclusion of crashkernel region */</div><div class='add'>+	for_each_mem_range(i, &amp;start, &amp;end)</div><div class='add'>+		nr_ranges++;</div><div class='add'>+</div><div class='add'>+	cmem = kmalloc(struct_size(cmem, ranges, nr_ranges), GFP_KERNEL);</div><div class='add'>+	if (!cmem)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmem-&gt;max_nr_ranges = nr_ranges;</div><div class='add'>+	cmem-&gt;nr_ranges = 0;</div><div class='add'>+	for_each_mem_range(i, &amp;start, &amp;end) {</div><div class='add'>+		cmem-&gt;ranges[cmem-&gt;nr_ranges].start = start;</div><div class='add'>+		cmem-&gt;ranges[cmem-&gt;nr_ranges].end = end - 1;</div><div class='add'>+		cmem-&gt;nr_ranges++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Exclude crashkernel region */</div><div class='add'>+	ret = crash_exclude_mem_range(cmem, crashk_res.start, crashk_res.end);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (crashk_low_res.end) {</div><div class='add'>+		ret = crash_exclude_mem_range(cmem, crashk_low_res.start, crashk_low_res.end);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = crash_prepare_elf64_headers(cmem, true, addr, sz);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(cmem);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Add the "mem=size@start" command line parameter to command line, indicating the</div><div class='add'>+ * memory region the new kernel can use to boot into.</div><div class='add'>+ */</div><div class='add'>+static void cmdline_add_mem(unsigned long *cmdline_tmplen, char *modified_cmdline)</div><div class='add'>+{</div><div class='add'>+	int mem_strlen = 0;</div><div class='add'>+</div><div class='add'>+	mem_strlen = sprintf(modified_cmdline + (*cmdline_tmplen), "mem=0x%llx@0x%llx ",</div><div class='add'>+		crashk_res.end - crashk_res.start + 1, crashk_res.start);</div><div class='add'>+	*cmdline_tmplen += mem_strlen;</div><div class='add'>+</div><div class='add'>+	if (crashk_low_res.end) {</div><div class='add'>+		mem_strlen = sprintf(modified_cmdline + (*cmdline_tmplen), "mem=0x%llx@0x%llx ",</div><div class='add'>+			crashk_low_res.end - crashk_low_res.start + 1, crashk_low_res.start);</div><div class='add'>+		*cmdline_tmplen += mem_strlen;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add the "elfcorehdr=size@start" command line parameter to command line. */</div><div class='add'>+static void cmdline_add_elfcorehdr(struct kimage *image, unsigned long *cmdline_tmplen,</div><div class='add'>+				   char *modified_cmdline, unsigned long elfcorehdr_sz)</div><div class='add'>+{</div><div class='add'>+	int elfcorehdr_strlen = 0;</div><div class='add'>+</div><div class='add'>+	elfcorehdr_strlen = sprintf(modified_cmdline + (*cmdline_tmplen), "elfcorehdr=0x%lx@0x%lx ",</div><div class='add'>+		elfcorehdr_sz, image-&gt;elf_load_addr);</div><div class='add'>+	*cmdline_tmplen += elfcorehdr_strlen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Try to add the initrd to the image. If it is not possible to find valid</div><div class='add'>+ * locations, this function will undo changes to the image and return non zero.</div><div class='add'>+ */</div><div class='add'>+int load_other_segments(struct kimage *image,</div><div class='add'>+			unsigned long kernel_load_addr, unsigned long kernel_size,</div><div class='add'>+			char *initrd, unsigned long initrd_len, char *cmdline, unsigned long cmdline_len)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned long cmdline_tmplen = 0;</div><div class='add'>+	unsigned long initrd_load_addr = 0;</div><div class='add'>+	unsigned long orig_segments = image-&gt;nr_segments;</div><div class='add'>+	char *modified_cmdline = NULL;</div><div class='add'>+	struct kexec_buf kbuf;</div><div class='add'>+</div><div class='add'>+	kbuf.image = image;</div><div class='add'>+	/* Don't allocate anything below the kernel */</div><div class='add'>+	kbuf.buf_min = kernel_load_addr + kernel_size;</div><div class='add'>+</div><div class='add'>+	modified_cmdline = kzalloc(COMMAND_LINE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!modified_cmdline)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmdline_add_loader(&amp;cmdline_tmplen, modified_cmdline);</div><div class='add'>+	/* Ensure it's null terminated */</div><div class='add'>+	modified_cmdline[COMMAND_LINE_SIZE - 1] = '\0';</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CRASH_DUMP</div><div class='add'>+	/* Load elf core header */</div><div class='add'>+	if (image-&gt;type == KEXEC_TYPE_CRASH) {</div><div class='add'>+		void *headers;</div><div class='add'>+		unsigned long headers_sz;</div><div class='add'>+</div><div class='add'>+		ret = prepare_elf_headers(&amp;headers, &amp;headers_sz);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("Preparing elf core header failed\n");</div><div class='add'>+			goto out_err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kbuf.buffer = headers;</div><div class='add'>+		kbuf.bufsz = headers_sz;</div><div class='add'>+		kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;</div><div class='add'>+		kbuf.memsz = headers_sz;</div><div class='add'>+		kbuf.buf_align = SZ_64K; /* largest supported page size */</div><div class='add'>+		kbuf.buf_max = ULONG_MAX;</div><div class='add'>+		kbuf.top_down = true;</div><div class='add'>+</div><div class='add'>+		ret = kexec_add_buffer(&amp;kbuf);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			vfree(headers);</div><div class='add'>+			goto out_err;</div><div class='add'>+		}</div><div class='add'>+		image-&gt;elf_headers = headers;</div><div class='add'>+		image-&gt;elf_load_addr = kbuf.mem;</div><div class='add'>+		image-&gt;elf_headers_sz = headers_sz;</div><div class='add'>+</div><div class='add'>+		kexec_dprintk("Loaded elf core header at 0x%lx bufsz=0x%lx memsz=0x%lx\n",</div><div class='add'>+			      image-&gt;elf_load_addr, kbuf.bufsz, kbuf.memsz);</div><div class='add'>+</div><div class='add'>+		/* Add the mem=size@start parameter to the command line */</div><div class='add'>+		cmdline_add_mem(&amp;cmdline_tmplen, modified_cmdline);</div><div class='add'>+</div><div class='add'>+		/* Add the elfcorehdr=size@start parameter to the command line */</div><div class='add'>+		cmdline_add_elfcorehdr(image, &amp;cmdline_tmplen, modified_cmdline, headers_sz);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Load initrd */</div><div class='add'>+	if (initrd) {</div><div class='add'>+		kbuf.buffer = initrd;</div><div class='add'>+		kbuf.bufsz = initrd_len;</div><div class='add'>+		kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;</div><div class='add'>+		kbuf.memsz = initrd_len;</div><div class='add'>+		kbuf.buf_align = 0;</div><div class='add'>+		/* within 1GB-aligned window of up to 32GB in size */</div><div class='add'>+		kbuf.buf_max = round_down(kernel_load_addr, SZ_1G) + (unsigned long)SZ_1G * 32;</div><div class='add'>+		kbuf.top_down = false;</div><div class='add'>+</div><div class='add'>+		ret = kexec_add_buffer(&amp;kbuf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out_err;</div><div class='add'>+		initrd_load_addr = kbuf.mem;</div><div class='add'>+</div><div class='add'>+		kexec_dprintk("Loaded initrd at 0x%lx bufsz=0x%lx memsz=0x%lx\n",</div><div class='add'>+			      initrd_load_addr, kbuf.bufsz, kbuf.memsz);</div><div class='add'>+</div><div class='add'>+		/* Add the initrd=start,size parameter to the command line */</div><div class='add'>+		cmdline_add_initrd(image, &amp;cmdline_tmplen, modified_cmdline, initrd_load_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmdline_len + cmdline_tmplen &gt; COMMAND_LINE_SIZE) {</div><div class='add'>+		pr_err("Appending command line exceeds COMMAND_LINE_SIZE\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(modified_cmdline + cmdline_tmplen, cmdline, cmdline_len);</div><div class='add'>+	cmdline = modified_cmdline;</div><div class='add'>+	image-&gt;arch.cmdline_ptr = (unsigned long)cmdline;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	image-&gt;nr_segments = orig_segments;</div><div class='add'>+	kfree(modified_cmdline);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kernel/mcount.S b/arch/loongarch/kernel/mcount.S<br/>index 3015896016a0..b6850503e061 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/mcount.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/mcount.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/mcount.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/mcount.S</a></div><div class='hunk'>@@ -79,10 +79,11 @@ SYM_FUNC_START(ftrace_graph_caller)</div><div class='ctx'> SYM_FUNC_END(ftrace_graph_caller)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START(return_to_handler)</div><div class='del'>-	PTR_ADDI	sp, sp, -FGRET_REGS_SIZE</div><div class='del'>-	PTR_S		a0, sp, FGRET_REGS_A0</div><div class='del'>-	PTR_S		a1, sp, FGRET_REGS_A1</div><div class='del'>-	PTR_S		zero, sp, FGRET_REGS_FP</div><div class='add'>+	/* Save return value regs */</div><div class='add'>+	PTR_ADDI	sp, sp, -PT_SIZE</div><div class='add'>+	PTR_S		a0, sp, PT_R4</div><div class='add'>+	PTR_S		a1, sp, PT_R5</div><div class='add'>+	PTR_S		zero, sp, PT_R22</div><div class='ctx'> </div><div class='ctx'> 	move		a0, sp</div><div class='ctx'> 	bl		ftrace_return_to_handler</div><div class='hunk'>@@ -90,9 +91,11 @@ SYM_FUNC_START(return_to_handler)</div><div class='ctx'> 	/* Restore the real parent address: a0 -&gt; ra */</div><div class='ctx'> 	move		ra, a0</div><div class='ctx'> </div><div class='del'>-	PTR_L		a0, sp, FGRET_REGS_A0</div><div class='del'>-	PTR_L		a1, sp, FGRET_REGS_A1</div><div class='del'>-	PTR_ADDI	sp, sp, FGRET_REGS_SIZE</div><div class='add'>+	/* Restore return value regs */</div><div class='add'>+	PTR_L		a0, sp, PT_R4</div><div class='add'>+	PTR_L		a1, sp, PT_R5</div><div class='add'>+	PTR_ADDI	sp, sp, PT_SIZE</div><div class='add'>+</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(return_to_handler)</div><div class='ctx'> #endif /* CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='head'>diff --git a/arch/loongarch/kernel/mcount_dyn.S b/arch/loongarch/kernel/mcount_dyn.S<br/>index 0c65cf09110c..d6b474ad1d5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/mcount_dyn.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/mcount_dyn.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/mcount_dyn.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/mcount_dyn.S</a></div><div class='hunk'>@@ -140,19 +140,19 @@ SYM_CODE_END(ftrace_graph_caller)</div><div class='ctx'> SYM_CODE_START(return_to_handler)</div><div class='ctx'> 	UNWIND_HINT_UNDEFINED</div><div class='ctx'> 	/* Save return value regs */</div><div class='del'>-	PTR_ADDI	sp, sp, -FGRET_REGS_SIZE</div><div class='del'>-	PTR_S		a0, sp, FGRET_REGS_A0</div><div class='del'>-	PTR_S		a1, sp, FGRET_REGS_A1</div><div class='del'>-	PTR_S		zero, sp, FGRET_REGS_FP</div><div class='add'>+	PTR_ADDI	sp, sp, -PT_SIZE</div><div class='add'>+	PTR_S		a0, sp, PT_R4</div><div class='add'>+	PTR_S		a1, sp, PT_R5</div><div class='add'>+	PTR_S		zero, sp, PT_R22</div><div class='ctx'> </div><div class='ctx'> 	move		a0, sp</div><div class='ctx'> 	bl		ftrace_return_to_handler</div><div class='ctx'> 	move		ra, a0</div><div class='ctx'> </div><div class='ctx'> 	/* Restore return value regs */</div><div class='del'>-	PTR_L		a0, sp, FGRET_REGS_A0</div><div class='del'>-	PTR_L		a1, sp, FGRET_REGS_A1</div><div class='del'>-	PTR_ADDI	sp, sp, FGRET_REGS_SIZE</div><div class='add'>+	PTR_L		a0, sp, PT_R4</div><div class='add'>+	PTR_L		a1, sp, PT_R5</div><div class='add'>+	PTR_ADDI	sp, sp, PT_SIZE</div><div class='ctx'> </div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_CODE_END(return_to_handler)</div><div class='head'>diff --git a/arch/loongarch/kernel/module-sections.c b/arch/loongarch/kernel/module-sections.c<br/>index e2f30ff9afde..a43ba7f9f987 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/module-sections.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/module-sections.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/module-sections.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/module-sections.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='add'>+#include &lt;linux/sort.h&gt;</div><div class='ctx'> </div><div class='ctx'> Elf_Addr module_emit_got_entry(struct module *mod, Elf_Shdr *sechdrs, Elf_Addr val)</div><div class='ctx'> {</div><div class='hunk'>@@ -61,39 +62,38 @@ Elf_Addr module_emit_plt_entry(struct module *mod, Elf_Shdr *sechdrs, Elf_Addr v</div><div class='ctx'> 	return (Elf_Addr)&amp;plt[nr];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int is_rela_equal(const Elf_Rela *x, const Elf_Rela *y)</div><div class='del'>-{</div><div class='del'>-	return x-&gt;r_info == y-&gt;r_info &amp;&amp; x-&gt;r_addend == y-&gt;r_addend;</div><div class='del'>-}</div><div class='add'>+#define cmp_3way(a, b)  ((a) &lt; (b) ? -1 : (a) &gt; (b))</div><div class='ctx'> </div><div class='del'>-static bool duplicate_rela(const Elf_Rela *rela, int idx)</div><div class='add'>+static int compare_rela(const void *x, const void *y)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int ret;</div><div class='add'>+	const Elf_Rela *rela_x = x, *rela_y = y;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; idx; i++) {</div><div class='del'>-		if (is_rela_equal(&amp;rela[i], &amp;rela[idx]))</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	ret = cmp_3way(rela_x-&gt;r_info, rela_y-&gt;r_info);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = cmp_3way(rela_x-&gt;r_addend, rela_y-&gt;r_addend);</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void count_max_entries(Elf_Rela *relas, int num,</div><div class='ctx'> 			      unsigned int *plts, unsigned int *gots)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i, type;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	sort(relas, num, sizeof(Elf_Rela), compare_rela, NULL);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num; i++) {</div><div class='del'>-		type = ELF_R_TYPE(relas[i].r_info);</div><div class='del'>-		switch (type) {</div><div class='add'>+		if (i &amp;&amp; !compare_rela(&amp;relas[i-1], &amp;relas[i]))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (ELF_R_TYPE(relas[i].r_info)) {</div><div class='ctx'> 		case R_LARCH_SOP_PUSH_PLT_PCREL:</div><div class='ctx'> 		case R_LARCH_B26:</div><div class='del'>-			if (!duplicate_rela(relas, i))</div><div class='del'>-				(*plts)++;</div><div class='add'>+			(*plts)++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case R_LARCH_GOT_PC_HI20:</div><div class='del'>-			if (!duplicate_rela(relas, i))</div><div class='del'>-				(*gots)++;</div><div class='add'>+			(*gots)++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break; /* Do nothing. */</div><div class='head'>diff --git a/arch/loongarch/kernel/numa.c b/arch/loongarch/kernel/numa.c<br/>index 84fe7f854820..d6e73e8f9c0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/numa.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/numa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/numa.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/numa.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/nodemask.h&gt;</div><div class='add'>+#include &lt;linux/numa_memblks.h&gt;</div><div class='ctx'> #include &lt;linux/swap.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/pfn.h&gt;</div><div class='hunk'>@@ -27,10 +28,6 @@</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='ctx'> int numa_off;</div><div class='del'>-unsigned char node_distances[MAX_NUMNODES][MAX_NUMNODES];</div><div class='del'>-EXPORT_SYMBOL(node_distances);</div><div class='del'>-</div><div class='del'>-static struct numa_meminfo numa_meminfo;</div><div class='ctx'> cpumask_t cpus_on_node[MAX_NUMNODES];</div><div class='ctx'> cpumask_t phys_cpus_on_node[MAX_NUMNODES];</div><div class='ctx'> EXPORT_SYMBOL(cpus_on_node);</div><div class='hunk'>@@ -43,8 +40,6 @@ s16 __cpuid_to_node[CONFIG_NR_CPUS] = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL(__cpuid_to_node);</div><div class='ctx'> </div><div class='del'>-nodemask_t numa_nodes_parsed __initdata;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_HAVE_SETUP_PER_CPU_AREA</div><div class='ctx'> unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(__per_cpu_offset);</div><div class='hunk'>@@ -145,48 +140,6 @@ void numa_remove_cpu(unsigned int cpu)</div><div class='ctx'> 	cpumask_clear_cpu(cpu, &amp;cpus_on_node[nid]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init numa_add_memblk_to(int nid, u64 start, u64 end,</div><div class='del'>-				     struct numa_meminfo *mi)</div><div class='del'>-{</div><div class='del'>-	/* ignore zero length blks */</div><div class='del'>-	if (start == end)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* whine about and ignore invalid blks */</div><div class='del'>-	if (start &gt; end || nid &lt; 0 || nid &gt;= MAX_NUMNODES) {</div><div class='del'>-		pr_warn("NUMA: Warning: invalid memblk node %d [mem %#010Lx-%#010Lx]\n",</div><div class='del'>-			   nid, start, end - 1);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mi-&gt;nr_blks &gt;= NR_NODE_MEMBLKS) {</div><div class='del'>-		pr_err("NUMA: too many memblk ranges\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mi-&gt;blk[mi-&gt;nr_blks].start = PFN_ALIGN(start);</div><div class='del'>-	mi-&gt;blk[mi-&gt;nr_blks].end = PFN_ALIGN(end - PAGE_SIZE + 1);</div><div class='del'>-	mi-&gt;blk[mi-&gt;nr_blks].nid = nid;</div><div class='del'>-	mi-&gt;nr_blks++;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * numa_add_memblk - Add one numa_memblk to numa_meminfo</div><div class='del'>- * @nid: NUMA node ID of the new memblk</div><div class='del'>- * @start: Start address of the new memblk</div><div class='del'>- * @end: End address of the new memblk</div><div class='del'>- *</div><div class='del'>- * Add a new memblk to the default numa_meminfo.</div><div class='del'>- *</div><div class='del'>- * RETURNS:</div><div class='del'>- * 0 on success, -errno on failure.</div><div class='del'>- */</div><div class='del'>-int __init numa_add_memblk(int nid, u64 start, u64 end)</div><div class='del'>-{</div><div class='del'>-	return numa_add_memblk_to(nid, start, end, &amp;numa_meminfo);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init node_mem_init(unsigned int node)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start_pfn, end_pfn;</div><div class='hunk'>@@ -205,18 +158,6 @@ static void __init node_mem_init(unsigned int node)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI_NUMA</div><div class='ctx'> </div><div class='del'>-static void __init add_node_intersection(u32 node, u64 start, u64 size, u32 type)</div><div class='del'>-{</div><div class='del'>-	static unsigned long num_physpages;</div><div class='del'>-</div><div class='del'>-	num_physpages += (size &gt;&gt; PAGE_SHIFT);</div><div class='del'>-	pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",</div><div class='del'>-		node, type, start, size);</div><div class='del'>-	pr_info("       start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",</div><div class='del'>-		start &gt;&gt; PAGE_SHIFT, (start + size) &gt;&gt; PAGE_SHIFT, num_physpages);</div><div class='del'>-	memblock_set_node(start, size, &amp;memblock.memory, node);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * add_numamem_region</div><div class='ctx'>  *</div><div class='hunk'>@@ -228,28 +169,21 @@ static void __init add_node_intersection(u32 node, u64 start, u64 size, u32 type</div><div class='ctx'>  */</div><div class='ctx'> static void __init add_numamem_region(u64 start, u64 end, u32 type)</div><div class='ctx'> {</div><div class='del'>-	u32 i;</div><div class='del'>-	u64 ofs = start;</div><div class='add'>+	u32 node = pa_to_nid(start);</div><div class='add'>+	u64 size = end - start;</div><div class='add'>+	static unsigned long num_physpages;</div><div class='ctx'> </div><div class='ctx'> 	if (start &gt;= end) {</div><div class='ctx'> 		pr_debug("Invalid region: %016llx-%016llx\n", start, end);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; numa_meminfo.nr_blks; i++) {</div><div class='del'>-		struct numa_memblk *mb = &amp;numa_meminfo.blk[i];</div><div class='del'>-</div><div class='del'>-		if (ofs &gt; mb-&gt;end)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (end &gt; mb-&gt;end) {</div><div class='del'>-			add_node_intersection(mb-&gt;nid, ofs, mb-&gt;end - ofs, type);</div><div class='del'>-			ofs = mb-&gt;end;</div><div class='del'>-		} else {</div><div class='del'>-			add_node_intersection(mb-&gt;nid, ofs, end - ofs, type);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	num_physpages += (size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",</div><div class='add'>+		node, type, start, size);</div><div class='add'>+	pr_info("       start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",</div><div class='add'>+		start &gt;&gt; PAGE_SHIFT, end &gt;&gt; PAGE_SHIFT, num_physpages);</div><div class='add'>+	memblock_set_node(start, size, &amp;memblock.memory, node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init init_node_memblock(void)</div><div class='hunk'>@@ -291,24 +225,6 @@ static void __init init_node_memblock(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init numa_default_distance(void)</div><div class='del'>-{</div><div class='del'>-	int row, col;</div><div class='del'>-</div><div class='del'>-	for (row = 0; row &lt; MAX_NUMNODES; row++)</div><div class='del'>-		for (col = 0; col &lt; MAX_NUMNODES; col++) {</div><div class='del'>-			if (col == row)</div><div class='del'>-				node_distances[row][col] = LOCAL_DISTANCE;</div><div class='del'>-			else</div><div class='del'>-				/* We assume that one node per package here!</div><div class='del'>-				 *</div><div class='del'>-				 * A SLIT should be used for multiple nodes</div><div class='del'>-				 * per package to override default setting.</div><div class='del'>-				 */</div><div class='del'>-				node_distances[row][col] = REMOTE_DISTANCE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * fake_numa_init() - For Non-ACPI systems</div><div class='ctx'>  * Return: 0 on success, -errno on failure.</div><div class='hunk'>@@ -333,11 +249,11 @@ int __init init_numa_memory(void)</div><div class='ctx'> 	for (i = 0; i &lt; NR_CPUS; i++)</div><div class='ctx'> 		set_cpuid_to_node(i, NUMA_NO_NODE);</div><div class='ctx'> </div><div class='del'>-	numa_default_distance();</div><div class='add'>+	numa_reset_distance();</div><div class='ctx'> 	nodes_clear(numa_nodes_parsed);</div><div class='ctx'> 	nodes_clear(node_possible_map);</div><div class='ctx'> 	nodes_clear(node_online_map);</div><div class='del'>-	memset(&amp;numa_meminfo, 0, sizeof(numa_meminfo));</div><div class='add'>+	WARN_ON(memblock_clear_hotplug(0, PHYS_ADDR_MAX));</div><div class='ctx'> </div><div class='ctx'> 	/* Parse SRAT and SLIT if provided by firmware. */</div><div class='ctx'> 	ret = acpi_disabled ? fake_numa_init() : acpi_numa_init();</div><div class='hunk'>@@ -387,12 +303,6 @@ void __init paging_init(void)</div><div class='ctx'> 	free_area_init(zones_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	memblock_free_all();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pcibus_to_node(struct pci_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> 	return dev_to_node(&amp;bus-&gt;dev);</div><div class='head'>diff --git a/arch/loongarch/kernel/paravirt.c b/arch/loongarch/kernel/paravirt.c<br/>index a5fc61f8b348..b1b51f920b23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/paravirt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/paravirt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/paravirt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/paravirt.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq_work.h&gt;</div><div class='hunk'>@@ -51,11 +50,18 @@ static u64 paravt_steal_clock(int cpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+static struct smp_ops native_ops;</div><div class='add'>+</div><div class='ctx'> static void pv_send_ipi_single(int cpu, unsigned int action)</div><div class='ctx'> {</div><div class='ctx'> 	int min, old;</div><div class='ctx'> 	irq_cpustat_t *info = &amp;per_cpu(irq_stat, cpu);</div><div class='ctx'> </div><div class='add'>+	if (unlikely(action == ACTION_BOOT_CPU)) {</div><div class='add'>+		native_ops.send_ipi_single(cpu, action);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	old = atomic_fetch_or(BIT(action), &amp;info-&gt;message);</div><div class='ctx'> 	if (old)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -75,6 +81,11 @@ static void pv_send_ipi_mask(const struct cpumask *mask, unsigned int action)</div><div class='ctx'> 	if (cpumask_empty(mask))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (unlikely(action == ACTION_BOOT_CPU)) {</div><div class='add'>+		native_ops.send_ipi_mask(mask, action);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	action = BIT(action);</div><div class='ctx'> 	for_each_cpu(i, mask) {</div><div class='ctx'> 		info = &amp;per_cpu(irq_stat, i);</div><div class='hunk'>@@ -147,6 +158,8 @@ static void pv_init_ipi(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r, swi;</div><div class='ctx'> </div><div class='add'>+	/* Init native ipi irq for ACTION_BOOT_CPU */</div><div class='add'>+	native_ops.init_ipi();</div><div class='ctx'> 	swi = get_percpu_irq(INT_SWI0);</div><div class='ctx'> 	if (swi &lt; 0)</div><div class='ctx'> 		panic("SWI0 IRQ mapping failed\n");</div><div class='hunk'>@@ -193,6 +206,7 @@ int __init pv_ipi_init(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+	native_ops		= mp_ops;</div><div class='ctx'> 	mp_ops.init_ipi		= pv_init_ipi;</div><div class='ctx'> 	mp_ops.send_ipi_single	= pv_send_ipi_single;</div><div class='ctx'> 	mp_ops.send_ipi_mask	= pv_send_ipi_mask;</div><div class='head'>diff --git a/arch/loongarch/kernel/perf_event.c b/arch/loongarch/kernel/perf_event.c<br/>index f86a4b838dd7..8ad098703488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/perf_event.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/perf_event.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/perf_event.c</a></div><div class='hunk'>@@ -479,8 +479,7 @@ static void handle_associated_event(struct cpu_hw_events *cpuc, int idx,</div><div class='ctx'> 	if (!loongarch_pmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (perf_event_overflow(event, data, regs))</div><div class='del'>-		loongarch_pmu_disable_event(idx);</div><div class='add'>+	perf_event_overflow(event, data, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t pmu_handle_irq(int irq, void *dev)</div><div class='head'>diff --git a/arch/loongarch/kernel/proc.c b/arch/loongarch/kernel/proc.c<br/>index 6ce46d92f1f1..cea30768ae92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/proc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/proc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/proc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/proc.c</a></div><div class='hunk'>@@ -13,28 +13,12 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * No lock; only written during early bootup by CPU 0.</div><div class='del'>- */</div><div class='del'>-static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);</div><div class='del'>-</div><div class='del'>-int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)</div><div class='del'>-{</div><div class='del'>-	return raw_notifier_chain_register(&amp;proc_cpuinfo_chain, nb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)</div><div class='del'>-{</div><div class='del'>-	return raw_notifier_call_chain(&amp;proc_cpuinfo_chain, val, v);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long n = (unsigned long) v - 1;</div><div class='ctx'> 	unsigned int isa = cpu_data[n].isa_level;</div><div class='ctx'> 	unsigned int version = cpu_data[n].processor_id &amp; 0xff;</div><div class='ctx'> 	unsigned int fp_version = cpu_data[n].fpu_vers;</div><div class='del'>-	struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	if (!cpu_online(n))</div><div class='hunk'>@@ -91,20 +75,13 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 	if (cpu_has_lbt_mips)	seq_printf(m, " lbt_mips");</div><div class='ctx'> 	seq_printf(m, "\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(m, "Hardware Watchpoint\t: %s",</div><div class='del'>-		      cpu_has_watch ? "yes, " : "no\n");</div><div class='add'>+	seq_printf(m, "Hardware Watchpoint\t: %s", str_yes_no(cpu_has_watch));</div><div class='ctx'> 	if (cpu_has_watch) {</div><div class='del'>-		seq_printf(m, "iwatch count: %d, dwatch count: %d\n",</div><div class='add'>+		seq_printf(m, ", iwatch count: %d, dwatch count: %d",</div><div class='ctx'> 		      cpu_data[n].watch_ireg_count, cpu_data[n].watch_dreg_count);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	proc_cpuinfo_notifier_args.m = m;</div><div class='del'>-	proc_cpuinfo_notifier_args.n = n;</div><div class='del'>-</div><div class='del'>-	raw_notifier_call_chain(&amp;proc_cpuinfo_chain, 0,</div><div class='del'>-				&amp;proc_cpuinfo_notifier_args);</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "\n");</div><div class='add'>+	seq_printf(m, "\n\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/process.c b/arch/loongarch/kernel/process.c<br/>index f2ff8b5d591e..efd9edf65603 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/process.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/entry-common.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/sched/debug.h&gt;</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/nmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/asm-prototypes.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='hunk'>@@ -47,6 +49,7 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -63,8 +66,9 @@ EXPORT_SYMBOL(__stack_chk_guard);</div><div class='ctx'> unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;</div><div class='ctx'> EXPORT_SYMBOL(boot_option_idle_override);</div><div class='ctx'> </div><div class='del'>-asmlinkage void ret_from_fork(void);</div><div class='del'>-asmlinkage void ret_from_kernel_thread(void);</div><div class='add'>+asmlinkage void restore_and_ret(void);</div><div class='add'>+asmlinkage void ret_from_fork_asm(void);</div><div class='add'>+asmlinkage void ret_from_kernel_thread_asm(void);</div><div class='ctx'> </div><div class='ctx'> void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)</div><div class='ctx'> {</div><div class='hunk'>@@ -138,6 +142,23 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_fork(struct task_struct *prev,</div><div class='add'>+							   struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	schedule_tail(prev);</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_kernel_thread(struct task_struct *prev,</div><div class='add'>+								    struct pt_regs *regs,</div><div class='add'>+								    int (*fn)(void *),</div><div class='add'>+								    void *fn_arg)</div><div class='add'>+{</div><div class='add'>+	schedule_tail(prev);</div><div class='add'>+	fn(fn_arg);</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Copy architecture-specific thread state</div><div class='ctx'>  */</div><div class='hunk'>@@ -146,7 +167,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 	unsigned long childksp;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	struct pt_regs *childregs, *regs = current_pt_regs();</div><div class='ctx'> </div><div class='ctx'> 	childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE;</div><div class='hunk'>@@ -165,8 +186,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		p-&gt;thread.reg03 = childksp;</div><div class='ctx'> 		p-&gt;thread.reg23 = (unsigned long)args-&gt;fn;</div><div class='ctx'> 		p-&gt;thread.reg24 = (unsigned long)args-&gt;fn_arg;</div><div class='del'>-		p-&gt;thread.reg01 = (unsigned long)ret_from_kernel_thread;</div><div class='del'>-		p-&gt;thread.sched_ra = (unsigned long)ret_from_kernel_thread;</div><div class='add'>+		p-&gt;thread.reg01 = (unsigned long)ret_from_kernel_thread_asm;</div><div class='add'>+		p-&gt;thread.sched_ra = (unsigned long)ret_from_kernel_thread_asm;</div><div class='ctx'> 		memset(childregs, 0, sizeof(struct pt_regs));</div><div class='ctx'> 		childregs-&gt;csr_euen = p-&gt;thread.csr_euen;</div><div class='ctx'> 		childregs-&gt;csr_crmd = p-&gt;thread.csr_crmd;</div><div class='hunk'>@@ -182,8 +203,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		childregs-&gt;regs[3] = usp;</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;thread.reg03 = (unsigned long) childregs;</div><div class='del'>-	p-&gt;thread.reg01 = (unsigned long) ret_from_fork;</div><div class='del'>-	p-&gt;thread.sched_ra = (unsigned long) ret_from_fork;</div><div class='add'>+	p-&gt;thread.reg01 = (unsigned long) ret_from_fork_asm;</div><div class='add'>+	p-&gt;thread.sched_ra = (unsigned long) ret_from_fork_asm;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * New tasks lose permission to use the fpu. This accelerates context</div><div class='hunk'>@@ -293,13 +314,15 @@ unsigned long stack_top(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long top = TASK_SIZE &amp; PAGE_MASK;</div><div class='ctx'> </div><div class='del'>-	/* Space for the VDSO &amp; data page */</div><div class='del'>-	top -= PAGE_ALIGN(current-&gt;thread.vdso-&gt;size);</div><div class='del'>-	top -= VVAR_SIZE;</div><div class='add'>+	if (current-&gt;thread.vdso) {</div><div class='add'>+		/* Space for the VDSO &amp; data page */</div><div class='add'>+		top -= PAGE_ALIGN(current-&gt;thread.vdso-&gt;size);</div><div class='add'>+		top -= VVAR_SIZE;</div><div class='ctx'> </div><div class='del'>-	/* Space to randomize the VDSO base */</div><div class='del'>-	if (current-&gt;flags &amp; PF_RANDOMIZE)</div><div class='del'>-		top -= VDSO_RANDOMIZE_SIZE;</div><div class='add'>+		/* Space to randomize the VDSO base */</div><div class='add'>+		if (current-&gt;flags &amp; PF_RANDOMIZE)</div><div class='add'>+			top -= VDSO_RANDOMIZE_SIZE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return top;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/ptrace.c b/arch/loongarch/kernel/ptrace.c<br/>index 19dc6eff45cc..8edd0954e55a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/ptrace.c</a></div><div class='hunk'>@@ -720,7 +720,7 @@ static int hw_break_set(struct task_struct *target,</div><div class='ctx'> 	unsigned int note_type = regset-&gt;core_note_type;</div><div class='ctx'> </div><div class='ctx'> 	/* Resource info */</div><div class='del'>-	offset = offsetof(struct user_watch_state, dbg_regs);</div><div class='add'>+	offset = offsetof(struct user_watch_state_v2, dbg_regs);</div><div class='ctx'> 	user_regset_copyin_ignore(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, 0, offset);</div><div class='ctx'> </div><div class='ctx'> 	/* (address, mask, ctrl) registers */</div><div class='hunk'>@@ -864,7 +864,7 @@ enum loongarch_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type	= NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n		= ELF_NGREG,</div><div class='ctx'> 		.size		= sizeof(elf_greg_t),</div><div class='ctx'> 		.align		= sizeof(elf_greg_t),</div><div class='hunk'>@@ -872,7 +872,7 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> 		.set		= gpr_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type	= NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n		= ELF_NFPREG,</div><div class='ctx'> 		.size		= sizeof(elf_fpreg_t),</div><div class='ctx'> 		.align		= sizeof(elf_fpreg_t),</div><div class='hunk'>@@ -880,7 +880,7 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> 		.set		= fpr_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_CPUCFG] = {</div><div class='del'>-		.core_note_type	= NT_LOONGARCH_CPUCFG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_CPUCFG),</div><div class='ctx'> 		.n		= 64,</div><div class='ctx'> 		.size		= sizeof(u32),</div><div class='ctx'> 		.align		= sizeof(u32),</div><div class='hunk'>@@ -889,7 +889,7 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_LSX</div><div class='ctx'> 	[REGSET_LSX] = {</div><div class='del'>-		.core_note_type	= NT_LOONGARCH_LSX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_LSX),</div><div class='ctx'> 		.n		= NUM_FPU_REGS,</div><div class='ctx'> 		.size		= 16,</div><div class='ctx'> 		.align		= 16,</div><div class='hunk'>@@ -899,7 +899,7 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_LASX</div><div class='ctx'> 	[REGSET_LASX] = {</div><div class='del'>-		.core_note_type	= NT_LOONGARCH_LASX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_LASX),</div><div class='ctx'> 		.n		= NUM_FPU_REGS,</div><div class='ctx'> 		.size		= 32,</div><div class='ctx'> 		.align		= 32,</div><div class='hunk'>@@ -909,7 +909,7 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_LBT</div><div class='ctx'> 	[REGSET_LBT] = {</div><div class='del'>-		.core_note_type	= NT_LOONGARCH_LBT,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_LBT),</div><div class='ctx'> 		.n		= 5,</div><div class='ctx'> 		.size		= sizeof(u64),</div><div class='ctx'> 		.align		= sizeof(u64),</div><div class='hunk'>@@ -919,16 +919,16 @@ static const struct user_regset loongarch64_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='ctx'> 	[REGSET_HW_BREAK] = {</div><div class='del'>-		.core_note_type = NT_LOONGARCH_HW_BREAK,</div><div class='del'>-		.n = sizeof(struct user_watch_state) / sizeof(u32),</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_HW_BREAK),</div><div class='add'>+		.n = sizeof(struct user_watch_state_v2) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='ctx'> 		.regset_get = hw_break_get,</div><div class='ctx'> 		.set = hw_break_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_HW_WATCH] = {</div><div class='del'>-		.core_note_type = NT_LOONGARCH_HW_WATCH,</div><div class='del'>-		.n = sizeof(struct user_watch_state) / sizeof(u32),</div><div class='add'>+		USER_REGSET_NOTE_TYPE(LOONGARCH_HW_WATCH),</div><div class='add'>+		.n = sizeof(struct user_watch_state_v2) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='ctx'> 		.regset_get = hw_break_get,</div><div class='head'>diff --git a/arch/loongarch/kernel/relocate.c b/arch/loongarch/kernel/relocate.c<br/>index 50c469067f3a..b5e2312a2fca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/relocate.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/relocate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/relocate.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/relocate.c</a></div><div class='hunk'>@@ -166,6 +166,10 @@ static inline __init bool kaslr_disabled(void)</div><div class='ctx'> 		return true;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	str = strstr(boot_command_line, "kexec_file");</div><div class='add'>+	if (str == boot_command_line || (str &gt; boot_command_line &amp;&amp; *(str - 1) == ' '))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/relocate_kernel.S b/arch/loongarch/kernel/relocate_kernel.S<br/>index 84e6de2fd973..8b5140ac9ea1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/relocate_kernel.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/relocate_kernel.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/relocate_kernel.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/relocate_kernel.S</a></div><div class='hunk'>@@ -109,4 +109,4 @@ SYM_CODE_END(kexec_smp_wait)</div><div class='ctx'> relocate_new_kernel_end:</div><div class='ctx'> </div><div class='ctx'> 	.section ".data"</div><div class='del'>-SYM_DATA(relocate_new_kernel_size, .long relocate_new_kernel_end - relocate_new_kernel)</div><div class='add'>+SYM_DATA(relocate_new_kernel_size, .quad relocate_new_kernel_end - relocate_new_kernel)</div><div class='head'>diff --git a/arch/loongarch/kernel/reset.c b/arch/loongarch/kernel/reset.c<br/>index 1ef8c6383535..de8fa5a8a825 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/reset.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/reset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/reset.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/reset.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@ void machine_halt(void)</div><div class='ctx'> 	console_flush_on_panic(CONSOLE_FLUSH_PENDING);</div><div class='ctx'> </div><div class='ctx'> 	while (true) {</div><div class='del'>-		__arch_cpu_idle();</div><div class='add'>+		__asm__ __volatile__("idle 0" : : : "memory");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -53,7 +53,7 @@ void machine_power_off(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	while (true) {</div><div class='del'>-		__arch_cpu_idle();</div><div class='add'>+		__asm__ __volatile__("idle 0" : : : "memory");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,6 +74,6 @@ void machine_restart(char *command)</div><div class='ctx'> 		acpi_reboot();</div><div class='ctx'> </div><div class='ctx'> 	while (true) {</div><div class='del'>-		__arch_cpu_idle();</div><div class='add'>+		__asm__ __volatile__("idle 0" : : : "memory");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c<br/>index 00e307203ddb..69c17d162fff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/setup.c</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> #define SMBIOS_FREQHIGH_OFFSET		0x17</div><div class='ctx'> #define SMBIOS_FREQLOW_MASK		0xFF</div><div class='ctx'> #define SMBIOS_CORE_PACKAGE_OFFSET	0x23</div><div class='add'>+#define SMBIOS_THREAD_PACKAGE_OFFSET	0x25</div><div class='ctx'> #define LOONGSON_EFI_ENABLE		(1 &lt;&lt; 3)</div><div class='ctx'> </div><div class='ctx'> unsigned long fw_arg0, fw_arg1, fw_arg2;</div><div class='hunk'>@@ -125,7 +126,7 @@ static void __init parse_cpu_table(const struct dmi_header *dm)</div><div class='ctx'> 	cpu_clock_freq = freq_temp * 1000000;</div><div class='ctx'> </div><div class='ctx'> 	loongson_sysconf.cpuname = (void *)dmi_string_parse(dm, dmi_data[16]);</div><div class='del'>-	loongson_sysconf.cores_per_package = *(dmi_data + SMBIOS_CORE_PACKAGE_OFFSET);</div><div class='add'>+	loongson_sysconf.cores_per_package = *(dmi_data + SMBIOS_THREAD_PACKAGE_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("CpuClock = %llu\n", cpu_clock_freq);</div><div class='ctx'> }</div><div class='hunk'>@@ -190,6 +191,16 @@ static int __init early_parse_mem(char *p)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	start = 0;</div><div class='add'>+	size = memparse(p, &amp;p);</div><div class='add'>+	if (*p == '@')	/* Every mem=... should contain '@' */</div><div class='add'>+		start = memparse(p + 1, &amp;p);</div><div class='add'>+	else {		/* Only one mem=... is allowed if no '@' */</div><div class='add'>+		usermem = 1;</div><div class='add'>+		memblock_enforce_memory_limit(size);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If a user specifies memory size, we</div><div class='ctx'> 	 * blow away any automatically generated</div><div class='hunk'>@@ -200,14 +211,6 @@ static int __init early_parse_mem(char *p)</div><div class='ctx'> 		memblock_remove(memblock_start_of_DRAM(),</div><div class='ctx'> 			memblock_end_of_DRAM() - memblock_start_of_DRAM());</div><div class='ctx'> 	}</div><div class='del'>-	start = 0;</div><div class='del'>-	size = memparse(p, &amp;p);</div><div class='del'>-	if (*p == '@')</div><div class='del'>-		start = memparse(p + 1, &amp;p);</div><div class='del'>-	else {</div><div class='del'>-		pr_err("Invalid format!\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_NUMA))</div><div class='ctx'> 		memblock_add(start, size);</div><div class='hunk'>@@ -258,18 +261,17 @@ static void __init arch_reserve_crashkernel(void)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned long long low_size = 0;</div><div class='ctx'> 	unsigned long long crash_base, crash_size;</div><div class='del'>-	char *cmdline = boot_command_line;</div><div class='ctx'> 	bool high = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_CRASH_RESERVE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret = parse_crashkernel(cmdline, memblock_phys_mem_size(),</div><div class='del'>-				&amp;crash_size, &amp;crash_base, &amp;low_size, &amp;high);</div><div class='add'>+	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),</div><div class='add'>+				&amp;crash_size, &amp;crash_base, &amp;low_size, NULL, &amp;high);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	reserve_crashkernel_generic(cmdline, crash_size, crash_base, low_size, high);</div><div class='add'>+	reserve_crashkernel_generic(crash_size, crash_base, low_size, high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init fdt_setup(void)</div><div class='hunk'>@@ -290,7 +292,7 @@ static void __init fdt_setup(void)</div><div class='ctx'> 	if (!fdt_pointer || fdt_check_header(fdt_pointer))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	early_init_dt_scan(fdt_pointer);</div><div class='add'>+	early_init_dt_scan(fdt_pointer, __pa(fdt_pointer));</div><div class='ctx'> 	early_init_fdt_reserve_self();</div><div class='ctx'> </div><div class='ctx'> 	max_low_pfn = PFN_PHYS(memblock_end_of_DRAM());</div><div class='hunk'>@@ -353,6 +355,7 @@ void __init platform_init(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	acpi_table_upgrade();</div><div class='add'>+	acpi_gbl_use_global_lock = false;</div><div class='ctx'> 	acpi_gbl_use_default_register_widths = false;</div><div class='ctx'> 	acpi_boot_table_init();</div><div class='ctx'> #endif</div><div class='hunk'>@@ -386,6 +389,9 @@ static void __init check_kernel_sections_mem(void)</div><div class='ctx'>  */</div><div class='ctx'> static void __init arch_mem_init(char **cmdline_p)</div><div class='ctx'> {</div><div class='add'>+	/* Recalculate max_low_pfn for "mem=xxx" */</div><div class='add'>+	max_pfn = max_low_pfn = PHYS_PFN(memblock_end_of_DRAM());</div><div class='add'>+</div><div class='ctx'> 	if (usermem)</div><div class='ctx'> 		pr_info("User-defined physical RAM map overwrite\n");</div><div class='ctx'> </div><div class='hunk'>@@ -430,7 +436,7 @@ static void __init resource_init(void)</div><div class='ctx'> </div><div class='ctx'> 	num_standard_resources = memblock.memory.cnt;</div><div class='ctx'> 	res_size = num_standard_resources * sizeof(*standard_resources);</div><div class='del'>-	standard_resources = memblock_alloc(res_size, SMP_CACHE_BYTES);</div><div class='add'>+	standard_resources = memblock_alloc_or_panic(res_size, SMP_CACHE_BYTES);</div><div class='ctx'> </div><div class='ctx'> 	for_each_mem_region(region) {</div><div class='ctx'> 		res = &amp;standard_resources[i++];</div><div class='head'>diff --git a/arch/loongarch/kernel/signal.c b/arch/loongarch/kernel/signal.c<br/>index 7a555b600171..c9f7ca778364 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/signal.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/signal.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/signal.c</a></div><div class='hunk'>@@ -51,27 +51,6 @@</div><div class='ctx'> #define lock_lbt_owner()	({ preempt_disable(); pagefault_disable(); })</div><div class='ctx'> #define unlock_lbt_owner()	({ pagefault_enable(); preempt_enable(); })</div><div class='ctx'> </div><div class='del'>-/* Assembly functions to move context to/from the FPU */</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_HAS_LBT</div><div class='del'>-extern asmlinkage int _save_lbt_context(void __user *regs, void __user *eflags);</div><div class='del'>-extern asmlinkage int _restore_lbt_context(void __user *regs, void __user *eflags);</div><div class='del'>-extern asmlinkage int _save_ftop_context(void __user *ftop);</div><div class='del'>-extern asmlinkage int _restore_ftop_context(void __user *ftop);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct rt_sigframe {</div><div class='ctx'> 	struct siginfo rs_info;</div><div class='ctx'> 	struct ucontext rs_uctx;</div><div class='hunk'>@@ -698,6 +677,11 @@ static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,</div><div class='ctx'> 	for (i = 1; i &lt; 32; i++)</div><div class='ctx'> 		err |= __put_user(regs-&gt;regs[i], &amp;sc-&gt;sc_regs[i]);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_CPU_HAS_LBT</div><div class='add'>+	if (extctx-&gt;lbt.addr)</div><div class='add'>+		err |= protected_save_lbt_context(extctx);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	if (extctx-&gt;lasx.addr)</div><div class='ctx'> 		err |= protected_save_lasx_context(extctx);</div><div class='ctx'> 	else if (extctx-&gt;lsx.addr)</div><div class='hunk'>@@ -705,11 +689,6 @@ static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,</div><div class='ctx'> 	else if (extctx-&gt;fpu.addr)</div><div class='ctx'> 		err |= protected_save_fpu_context(extctx);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_HAS_LBT</div><div class='del'>-	if (extctx-&gt;lbt.addr)</div><div class='del'>-		err |= protected_save_lbt_context(extctx);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/* Set the "end" magic */</div><div class='ctx'> 	info = (struct sctx_info *)extctx-&gt;end.addr;</div><div class='ctx'> 	err |= __put_user(0, &amp;info-&gt;magic);</div><div class='head'>diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c<br/>index 9afc2d8b3414..46036d98da75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/smp.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/tracepoint.h&gt;</div><div class='hunk'>@@ -45,6 +46,10 @@ EXPORT_SYMBOL(__cpu_logical_map);</div><div class='ctx'> cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(cpu_sibling_map);</div><div class='ctx'> </div><div class='add'>+/* Representing the last level cache shared map of each logical CPU */</div><div class='add'>+cpumask_t cpu_llc_shared_map[NR_CPUS] __read_mostly;</div><div class='add'>+EXPORT_SYMBOL(cpu_llc_shared_map);</div><div class='add'>+</div><div class='ctx'> /* Representing the core map of multi-core chips of each logical CPU */</div><div class='ctx'> cpumask_t cpu_core_map[NR_CPUS] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(cpu_core_map);</div><div class='hunk'>@@ -62,6 +67,9 @@ EXPORT_SYMBOL(cpu_foreign_map);</div><div class='ctx'> /* representing cpus for which sibling maps can be computed */</div><div class='ctx'> static cpumask_t cpu_sibling_setup_map;</div><div class='ctx'> </div><div class='add'>+/* representing cpus for which llc shared maps can be computed */</div><div class='add'>+static cpumask_t cpu_llc_shared_setup_map;</div><div class='add'>+</div><div class='ctx'> /* representing cpus for which core maps can be computed */</div><div class='ctx'> static cpumask_t cpu_core_setup_map;</div><div class='ctx'> </div><div class='hunk'>@@ -82,7 +90,7 @@ void show_ipi_list(struct seq_file *p, int prec)</div><div class='ctx'> 	for (i = 0; i &lt; NR_IPI; i++) {</div><div class='ctx'> 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec &gt;= 4 ? " " : "");</div><div class='ctx'> 		for_each_online_cpu(cpu)</div><div class='del'>-			seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).ipi_irqs[i]);</div><div class='add'>+			seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, cpu).ipi_irqs[i], 10);</div><div class='ctx'> 		seq_printf(p, " LoongArch  %d  %s\n", i + 1, ipi_types[i]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -101,6 +109,34 @@ static inline void set_cpu_core_map(int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void set_cpu_llc_shared_map(int cpu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;cpu_llc_shared_setup_map);</div><div class='add'>+</div><div class='add'>+	for_each_cpu(i, &amp;cpu_llc_shared_setup_map) {</div><div class='add'>+		if (cpu_to_node(cpu) == cpu_to_node(i)) {</div><div class='add'>+			cpumask_set_cpu(i, &amp;cpu_llc_shared_map[cpu]);</div><div class='add'>+			cpumask_set_cpu(cpu, &amp;cpu_llc_shared_map[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void clear_cpu_llc_shared_map(int cpu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_cpu(i, &amp;cpu_llc_shared_setup_map) {</div><div class='add'>+		if (cpu_to_node(cpu) == cpu_to_node(i)) {</div><div class='add'>+			cpumask_clear_cpu(i, &amp;cpu_llc_shared_map[cpu]);</div><div class='add'>+			cpumask_clear_cpu(cpu, &amp;cpu_llc_shared_map[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpumask_clear_cpu(cpu, &amp;cpu_llc_shared_setup_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void set_cpu_sibling_map(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -302,7 +338,7 @@ static void __init fdt_smp_setup(void)</div><div class='ctx'> 		__cpu_number_map[cpuid] = cpu;</div><div class='ctx'> 		__cpu_logical_map[cpu] = cpuid;</div><div class='ctx'> </div><div class='del'>-		early_numa_add_cpu(cpu, 0);</div><div class='add'>+		early_numa_add_cpu(cpuid, 0);</div><div class='ctx'> 		set_cpuid_to_node(cpuid, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -331,11 +367,11 @@ void __init loongson_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	parse_acpi_topology();</div><div class='add'>+	cpu_data[0].global_id = cpu_logical_map(0);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; loongson_sysconf.nr_cpus; i++) {</div><div class='ctx'> 		set_cpu_present(i, true);</div><div class='ctx'> 		csr_mail_send(0, __cpu_logical_map[i], 0);</div><div class='del'>-		cpu_data[i].global_id = __cpu_logical_map[i];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;</div><div class='hunk'>@@ -380,6 +416,7 @@ void loongson_init_secondary(void)</div><div class='ctx'> 		     cpu_logical_map(cpu) / loongson_sysconf.cores_per_package;</div><div class='ctx'> 	cpu_data[cpu].core = pptt_enabled ? cpu_data[cpu].core :</div><div class='ctx'> 		     cpu_logical_map(cpu) % loongson_sysconf.cores_per_package;</div><div class='add'>+	cpu_data[cpu].global_id = cpu_logical_map(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void loongson_smp_finish(void)</div><div class='hunk'>@@ -404,6 +441,7 @@ int loongson_cpu_disable(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='ctx'> 	clear_cpu_sibling_map(cpu);</div><div class='add'>+	clear_cpu_llc_shared_map(cpu);</div><div class='ctx'> 	calculate_cpu_foreign_map();</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	irq_migrate_all_off_this_cpu();</div><div class='hunk'>@@ -422,7 +460,7 @@ void loongson_cpu_die(unsigned int cpu)</div><div class='ctx'> 	mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __noreturn arch_cpu_idle_dead(void)</div><div class='add'>+static void __noreturn idle_play_dead(void)</div><div class='ctx'> {</div><div class='ctx'> 	register uint64_t addr;</div><div class='ctx'> 	register void (*init_fn)(void);</div><div class='hunk'>@@ -446,6 +484,50 @@ void __noreturn arch_cpu_idle_dead(void)</div><div class='ctx'> 	BUG();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HIBERNATION</div><div class='add'>+static void __noreturn poll_play_dead(void)</div><div class='add'>+{</div><div class='add'>+	register uint64_t addr;</div><div class='add'>+	register void (*init_fn)(void);</div><div class='add'>+</div><div class='add'>+	idle_task_exit();</div><div class='add'>+	__this_cpu_write(cpu_state, CPU_DEAD);</div><div class='add'>+</div><div class='add'>+	__smp_mb();</div><div class='add'>+	do {</div><div class='add'>+		__asm__ __volatile__("nop\n\t");</div><div class='add'>+		addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);</div><div class='add'>+	} while (addr == 0);</div><div class='add'>+</div><div class='add'>+	init_fn = (void *)TO_CACHE(addr);</div><div class='add'>+	iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_CLEAR);</div><div class='add'>+</div><div class='add'>+	init_fn();</div><div class='add'>+	BUG();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void (*play_dead)(void) = idle_play_dead;</div><div class='add'>+</div><div class='add'>+void __noreturn arch_cpu_idle_dead(void)</div><div class='add'>+{</div><div class='add'>+	play_dead();</div><div class='add'>+	BUG(); /* play_dead() doesn't return */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HIBERNATION</div><div class='add'>+int hibernate_resume_nonboot_cpu_disable(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	play_dead = poll_play_dead;</div><div class='add'>+	ret = suspend_disable_secondary_cpus();</div><div class='add'>+	play_dead = idle_play_dead;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -526,6 +608,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	current_thread_info()-&gt;cpu = 0;</div><div class='ctx'> 	loongson_prepare_cpus(max_cpus);</div><div class='ctx'> 	set_cpu_sibling_map(0);</div><div class='add'>+	set_cpu_llc_shared_map(0);</div><div class='ctx'> 	set_cpu_core_map(0);</div><div class='ctx'> 	calculate_cpu_foreign_map();</div><div class='ctx'> #ifndef CONFIG_HOTPLUG_CPU</div><div class='hunk'>@@ -567,6 +650,7 @@ asmlinkage void start_secondary(void)</div><div class='ctx'> 	loongson_init_secondary();</div><div class='ctx'> </div><div class='ctx'> 	set_cpu_sibling_map(cpu);</div><div class='add'>+	set_cpu_llc_shared_map(cpu);</div><div class='ctx'> 	set_cpu_core_map(cpu);</div><div class='ctx'> </div><div class='ctx'> 	notify_cpu_starting(cpu);</div><div class='head'>diff --git a/arch/loongarch/kernel/stacktrace.c b/arch/loongarch/kernel/stacktrace.c<br/>index 9a038d1070d7..387dc4d3c486 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/stacktrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/stacktrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/stacktrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/stacktrace.c</a></div><div class='hunk'>@@ -51,12 +51,13 @@ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry,</div><div class='ctx'> 	if (task == current) {</div><div class='ctx'> 		regs-&gt;regs[3] = (unsigned long)__builtin_frame_address(0);</div><div class='ctx'> 		regs-&gt;csr_era = (unsigned long)__builtin_return_address(0);</div><div class='add'>+		regs-&gt;regs[22] = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		regs-&gt;regs[3] = thread_saved_fp(task);</div><div class='ctx'> 		regs-&gt;csr_era = thread_saved_ra(task);</div><div class='add'>+		regs-&gt;regs[22] = task-&gt;thread.reg22;</div><div class='ctx'> 	}</div><div class='ctx'> 	regs-&gt;regs[1] = 0;</div><div class='del'>-	regs-&gt;regs[22] = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (unwind_start(&amp;state, task, regs);</div><div class='ctx'> 	     !unwind_done(&amp;state) &amp;&amp; !unwind_error(&amp;state); unwind_next_frame(&amp;state)) {</div><div class='head'>diff --git a/arch/loongarch/kernel/switch.S b/arch/loongarch/kernel/switch.S<br/>index 31dd8199b245..9c23cb7e432f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/switch.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/switch.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/switch.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/switch.S</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * task_struct *__switch_to(task_struct *prev, task_struct *next,</div><div class='del'>- *			    struct thread_info *next_ti)</div><div class='add'>+ *			    struct thread_info *next_ti, void *sched_ra, void *sched_cfa)</div><div class='ctx'>  */</div><div class='ctx'> 	.align	5</div><div class='ctx'> SYM_FUNC_START(__switch_to)</div><div class='head'>diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c<br/>index 46d7d40c87e3..6fb92cc1a4c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/time.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/time.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/cpuhotplug.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -102,7 +103,22 @@ static int constant_timer_next_event(unsigned long delta, struct clock_event_dev</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long __init get_loops_per_jiffy(void)</div><div class='add'>+static int arch_timer_starting(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	set_csr_ecfg(ECFGF_TIMER);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int arch_timer_dying(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	/* Clear Timer Interrupt */</div><div class='add'>+	write_csr_tintclear(CSR_TINTCLR_TI);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long get_loops_per_jiffy(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long lpj = (unsigned long)const_clock_freq;</div><div class='ctx'> </div><div class='hunk'>@@ -111,7 +127,7 @@ static unsigned long __init get_loops_per_jiffy(void)</div><div class='ctx'> 	return lpj;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long init_offset __nosavedata;</div><div class='add'>+static long init_offset;</div><div class='ctx'> </div><div class='ctx'> void save_counter(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -127,8 +143,12 @@ void sync_counter(void)</div><div class='ctx'> int constant_clockevent_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='del'>-	unsigned long min_delta = 0x600;</div><div class='del'>-	unsigned long max_delta = (1UL &lt;&lt; 48) - 1;</div><div class='add'>+#ifdef CONFIG_PREEMPT_RT</div><div class='add'>+	unsigned long min_delta = 100;</div><div class='add'>+#else</div><div class='add'>+	unsigned long min_delta = 1000;</div><div class='add'>+#endif</div><div class='add'>+	unsigned long max_delta = GENMASK_ULL(boot_cpu_data.timerbits, 0);</div><div class='ctx'> 	struct clock_event_device *cd;</div><div class='ctx'> 	static int irq = 0, timer_irq_installed = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -168,6 +188,10 @@ int constant_clockevent_init(void)</div><div class='ctx'> 	lpj_fine = get_loops_per_jiffy();</div><div class='ctx'> 	pr_info("Constant clock event device register\n");</div><div class='ctx'> </div><div class='add'>+	cpuhp_setup_state(CPUHP_AP_LOONGARCH_ARCH_TIMER_STARTING,</div><div class='add'>+			  "clockevents/loongarch/timer:starting",</div><div class='add'>+			  arch_timer_starting, arch_timer_dying);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c<br/>index f9f4eb00c92e..3d9be6ca7ec5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/traps.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/extable.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/sched/mm.h&gt;</div><div class='hunk'>@@ -553,8 +554,12 @@ asmlinkage void noinstr do_ale(struct pt_regs *regs)</div><div class='ctx'> 	die_if_kernel("Kernel ale access", regs);</div><div class='ctx'> 	force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs-&gt;csr_badvaddr);</div><div class='ctx'> #else</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned int *pc;</div><div class='ctx'> </div><div class='add'>+	if (!pie)</div><div class='add'>+		local_irq_enable();</div><div class='add'>+</div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs-&gt;csr_badvaddr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -579,6 +584,8 @@ sigbus:</div><div class='ctx'> 	die_if_kernel("Kernel ale access", regs);</div><div class='ctx'> 	force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs-&gt;csr_badvaddr);</div><div class='ctx'> out:</div><div class='add'>+	if (!pie)</div><div class='add'>+		local_irq_disable();</div><div class='ctx'> #endif</div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='ctx'> }</div><div class='hunk'>@@ -592,29 +599,37 @@ int is_valid_bugaddr(unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> static void bug_handler(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		force_sig(SIGTRAP);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (report_bug(regs-&gt;csr_era, regs)) {</div><div class='ctx'> 	case BUG_TRAP_TYPE_BUG:</div><div class='del'>-	case BUG_TRAP_TYPE_NONE:</div><div class='del'>-		die_if_kernel("Oops - BUG", regs);</div><div class='del'>-		force_sig(SIGTRAP);</div><div class='add'>+		die("Oops - BUG", regs);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BUG_TRAP_TYPE_WARN:</div><div class='ctx'> 		/* Skip the BUG instruction and continue */</div><div class='ctx'> 		regs-&gt;csr_era += LOONGARCH_INSN_SIZE;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (!fixup_exception(regs))</div><div class='add'>+			die("Oops - BUG", regs);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr do_bce(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool user = user_mode(regs);</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned long era = exception_era(regs);</div><div class='ctx'> 	u64 badv = 0, lower = 0, upper = ULONG_MAX;</div><div class='ctx'> 	union loongarch_instruction insn;</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.trap_nr = read_csr_excode();</div><div class='hunk'>@@ -680,7 +695,7 @@ asmlinkage void noinstr do_bce(struct pt_regs *regs)</div><div class='ctx'> 	force_sig_bnderr((void __user *)badv, (void __user *)lower, (void __user *)upper);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='hunk'>@@ -698,11 +713,12 @@ bad_era:</div><div class='ctx'> asmlinkage void noinstr do_bp(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool user = user_mode(regs);</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned int opcode, bcode;</div><div class='ctx'> 	unsigned long era = exception_era(regs);</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (__get_inst(&amp;opcode, (u32 *)era, user))</div><div class='hunk'>@@ -768,7 +784,7 @@ asmlinkage void noinstr do_bp(struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='hunk'>@@ -1003,6 +1019,7 @@ static void init_restore_lbt(void)</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1012,7 +1029,7 @@ asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> 	 * (including the user using 'MOVGR2GCSR' to turn on TM, which</div><div class='ctx'> 	 * will not trigger the BTE), we need to check PRMD first.</div><div class='ctx'> 	 */</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has_lbt) {</div><div class='hunk'>@@ -1026,7 +1043,7 @@ asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='head'>diff --git a/arch/loongarch/kernel/unaligned.c b/arch/loongarch/kernel/unaligned.c<br/>index 3abf163dda05..487be604b96a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unaligned.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unaligned.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unaligned.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/unaligned.c</a></div><div class='hunk'>@@ -482,14 +482,10 @@ sigbus:</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> static int __init debugfs_unaligned(void)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *d;</div><div class='del'>-</div><div class='del'>-	d = debugfs_create_dir("loongarch", NULL);</div><div class='del'>-</div><div class='ctx'> 	debugfs_create_u32("unaligned_instructions_user",</div><div class='del'>-				S_IRUGO, d, &amp;unaligned_instructions_user);</div><div class='add'>+				S_IRUGO, arch_debugfs_dir, &amp;unaligned_instructions_user);</div><div class='ctx'> 	debugfs_create_u32("unaligned_instructions_kernel",</div><div class='del'>-				S_IRUGO, d, &amp;unaligned_instructions_kernel);</div><div class='add'>+				S_IRUGO, arch_debugfs_dir, &amp;unaligned_instructions_kernel);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/unwind_guess.c b/arch/loongarch/kernel/unwind_guess.c<br/>index 98379b7d4147..08d7951b2f60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_guess.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_guess.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_guess.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/unwind_guess.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='ctx'> unsigned long unwind_get_return_address(struct unwind_state *state)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/kernel/unwind_orc.c b/arch/loongarch/kernel/unwind_orc.c<br/>index b25722876331..0d5fa64a2225 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_orc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_orc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_orc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/unwind_orc.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#include &lt;linux/objtool.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;asm/exception.h&gt;</div><div class='ctx'> #include &lt;asm/orc_header.h&gt;</div><div class='hunk'>@@ -399,7 +400,7 @@ bool unwind_next_frame(struct unwind_state *state)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Don't let modules unload while we're reading their ORC data. */</div><div class='del'>-	preempt_disable();</div><div class='add'>+	guard(rcu)();</div><div class='ctx'> </div><div class='ctx'> 	if (is_entry_func(state-&gt;pc))</div><div class='ctx'> 		goto end;</div><div class='hunk'>@@ -507,21 +508,19 @@ bool unwind_next_frame(struct unwind_state *state)</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;pc = bt_address(pc);</div><div class='ctx'> 	if (!state-&gt;pc) {</div><div class='del'>-		pr_err("cannot find unwind pc at %pK\n", (void *)pc);</div><div class='add'>+		pr_err("cannot find unwind pc at %p\n", (void *)pc);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!__kernel_text_address(state-&gt;pc))</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	preempt_enable();</div><div class='ctx'> 	return true;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	state-&gt;error = true;</div><div class='ctx'> </div><div class='ctx'> end:</div><div class='del'>-	preempt_enable();</div><div class='ctx'> 	state-&gt;stack_info.type = STACK_TYPE_UNKNOWN;</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/unwind_prologue.c b/arch/loongarch/kernel/unwind_prologue.c<br/>index 929ae240280a..729e775bd40d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_prologue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/unwind_prologue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/unwind_prologue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/unwind_prologue.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/kallsyms.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/uprobes.c b/arch/loongarch/kernel/uprobes.c<br/>index 87abc7137b73..6022eb0f71db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/uprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/uprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/uprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/uprobes.c</a></div><div class='hunk'>@@ -42,7 +42,6 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> 	utask-&gt;autask.saved_trap_nr = current-&gt;thread.trap_nr;</div><div class='ctx'> 	current-&gt;thread.trap_nr = UPROBE_TRAP_NR;</div><div class='ctx'> 	instruction_pointer_set(regs, utask-&gt;xol_vaddr);</div><div class='del'>-	user_enable_single_step(current);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -53,13 +52,7 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_ONCE(current-&gt;thread.trap_nr != UPROBE_TRAP_NR);</div><div class='ctx'> 	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='del'>-</div><div class='del'>-	if (auprobe-&gt;simulate)</div><div class='del'>-		instruction_pointer_set(regs, auprobe-&gt;resume_era);</div><div class='del'>-	else</div><div class='del'>-		instruction_pointer_set(regs, utask-&gt;vaddr + LOONGARCH_INSN_SIZE);</div><div class='del'>-</div><div class='del'>-	user_disable_single_step(current);</div><div class='add'>+	instruction_pointer_set(regs, utask-&gt;vaddr + LOONGARCH_INSN_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -70,7 +63,6 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='ctx'> 	instruction_pointer_set(regs, utask-&gt;vaddr);</div><div class='del'>-	user_disable_single_step(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool arch_uprobe_xol_was_trapped(struct task_struct *t)</div><div class='hunk'>@@ -90,7 +82,6 @@ bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	insn.word = auprobe-&gt;insn[0];</div><div class='ctx'> 	arch_simulate_insn(insn, regs);</div><div class='del'>-	auprobe-&gt;resume_era = regs-&gt;csr_era;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kernel/vdso.c b/arch/loongarch/kernel/vdso.c<br/>index f6fcc52aefae..dee1a15d7f4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kernel/vdso.c</a></div><div class='hunk'>@@ -14,8 +14,7 @@</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/time_namespace.h&gt;</div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='add'>+#include &lt;linux/vdso_datastore.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='hunk'>@@ -26,19 +25,6 @@</div><div class='ctx'> </div><div class='ctx'> extern char vdso_start[], vdso_end[];</div><div class='ctx'> </div><div class='del'>-/* Kernel-provided data used by the VDSO. */</div><div class='del'>-static union vdso_data_store generic_vdso_data __page_aligned_data;</div><div class='del'>-</div><div class='del'>-static union {</div><div class='del'>-	u8 page[LOONGARCH_VDSO_DATA_SIZE];</div><div class='del'>-	struct loongarch_vdso_data vdata;</div><div class='del'>-} loongarch_vdso_data __page_aligned_data;</div><div class='del'>-</div><div class='del'>-static struct page *vdso_pages[] = { NULL };</div><div class='del'>-struct vdso_data *vdso_data = generic_vdso_data.data;</div><div class='del'>-struct vdso_pcpu_data *vdso_pdata = loongarch_vdso_data.vdata.pdata;</div><div class='del'>-struct vdso_rng_data *vdso_rng_data = &amp;loongarch_vdso_data.vdata.rng_data;</div><div class='del'>-</div><div class='ctx'> static int vdso_mremap(const struct vm_special_mapping *sm, struct vm_area_struct *new_vma)</div><div class='ctx'> {</div><div class='ctx'> 	current-&gt;mm-&gt;context.vdso = (void *)(new_vma-&gt;vm_start);</div><div class='hunk'>@@ -46,55 +32,12 @@ static int vdso_mremap(const struct vm_special_mapping *sm, struct vm_area_struc</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static vm_fault_t vvar_fault(const struct vm_special_mapping *sm,</div><div class='del'>-			     struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='del'>-{</div><div class='del'>-	unsigned long pfn;</div><div class='del'>-	struct page *timens_page = find_timens_vvar_page(vma);</div><div class='del'>-</div><div class='del'>-	switch (vmf-&gt;pgoff) {</div><div class='del'>-	case VVAR_GENERIC_PAGE_OFFSET:</div><div class='del'>-		if (!timens_page)</div><div class='del'>-			pfn = sym_to_pfn(vdso_data);</div><div class='del'>-		else</div><div class='del'>-			pfn = page_to_pfn(timens_page);</div><div class='del'>-		break;</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	case VVAR_TIMENS_PAGE_OFFSET:</div><div class='del'>-		/*</div><div class='del'>-		 * If a task belongs to a time namespace then a namespace specific</div><div class='del'>-		 * VVAR is mapped with the VVAR_GENERIC_PAGE_OFFSET and the real</div><div class='del'>-		 * VVAR page is mapped with the VVAR_TIMENS_PAGE_OFFSET offset.</div><div class='del'>-		 * See also the comment near timens_setup_vdso_data().</div><div class='del'>-		 */</div><div class='del'>-		if (!timens_page)</div><div class='del'>-			return VM_FAULT_SIGBUS;</div><div class='del'>-		else</div><div class='del'>-			pfn = sym_to_pfn(vdso_data);</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_TIME_NS */</div><div class='del'>-	case VVAR_LOONGARCH_PAGES_START ... VVAR_LOONGARCH_PAGES_END:</div><div class='del'>-		pfn = sym_to_pfn(&amp;loongarch_vdso_data) + vmf-&gt;pgoff - VVAR_LOONGARCH_PAGES_START;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return VM_FAULT_SIGBUS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return vmf_insert_pfn(vma, vmf-&gt;address, pfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct loongarch_vdso_info vdso_info = {</div><div class='ctx'> 	.vdso = vdso_start,</div><div class='del'>-	.size = PAGE_SIZE,</div><div class='ctx'> 	.code_mapping = {</div><div class='ctx'> 		.name = "[vdso]",</div><div class='del'>-		.pages = vdso_pages,</div><div class='ctx'> 		.mremap = vdso_mremap,</div><div class='ctx'> 	},</div><div class='del'>-	.data_mapping = {</div><div class='del'>-		.name = "[vvar]",</div><div class='del'>-		.fault = vvar_fault,</div><div class='del'>-	},</div><div class='ctx'> 	.offset_sigreturn = vdso_offset_sigreturn,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -103,10 +46,16 @@ static int __init init_vdso(void)</div><div class='ctx'> 	unsigned long i, cpu, pfn;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!PAGE_ALIGNED(vdso_info.vdso));</div><div class='del'>-	BUG_ON(!PAGE_ALIGNED(vdso_info.size));</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu)</div><div class='del'>-		vdso_pdata[cpu].node = cpu_to_node(cpu);</div><div class='add'>+		vdso_k_arch_data-&gt;pdata[cpu].node = cpu_to_node(cpu);</div><div class='add'>+</div><div class='add'>+	vdso_info.size = PAGE_ALIGN(vdso_end - vdso_start);</div><div class='add'>+	vdso_info.code_mapping.pages =</div><div class='add'>+		kcalloc(vdso_info.size / PAGE_SIZE, sizeof(struct page *), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!vdso_info.code_mapping.pages)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	pfn = __phys_to_pfn(__pa_symbol(vdso_info.vdso));</div><div class='ctx'> 	for (i = 0; i &lt; vdso_info.size / PAGE_SIZE; i++)</div><div class='hunk'>@@ -116,37 +65,6 @@ static int __init init_vdso(void)</div><div class='ctx'> }</div><div class='ctx'> subsys_initcall(init_vdso);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-struct vdso_data *arch_get_vdso_data(void *vvar_page)</div><div class='del'>-{</div><div class='del'>-	return (struct vdso_data *)(vvar_page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The vvar mapping contains data for a specific time namespace, so when a</div><div class='del'>- * task changes namespace we must unmap its vvar data for the old namespace.</div><div class='del'>- * Subsequent faults will map in data for the new namespace.</div><div class='del'>- *</div><div class='del'>- * For more details see timens_setup_vdso_data().</div><div class='del'>- */</div><div class='del'>-int vdso_join_timens(struct task_struct *task, struct time_namespace *ns)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = task-&gt;mm;</div><div class='del'>-	struct vm_area_struct *vma;</div><div class='del'>-</div><div class='del'>-	VMA_ITERATOR(vmi, mm, 0);</div><div class='del'>-</div><div class='del'>-	mmap_read_lock(mm);</div><div class='del'>-	for_each_vma(vmi, vma) {</div><div class='del'>-		if (vma_is_special_mapping(vma, &amp;vdso_info.data_mapping))</div><div class='del'>-			zap_vma_pages(vma);</div><div class='del'>-	}</div><div class='del'>-	mmap_read_unlock(mm);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned long vdso_base(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long base = STACK_TOP;</div><div class='hunk'>@@ -182,9 +100,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vma = _install_special_mapping(mm, data_addr, VVAR_SIZE,</div><div class='del'>-				       VM_READ | VM_MAYREAD | VM_PFNMAP,</div><div class='del'>-				       &amp;info-&gt;data_mapping);</div><div class='add'>+	vma = vdso_install_vvar_mapping(mm, data_addr);</div><div class='ctx'> 	if (IS_ERR(vma)) {</div><div class='ctx'> 		ret = PTR_ERR(vma);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -192,7 +108,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> </div><div class='ctx'> 	vdso_addr = data_addr + VVAR_SIZE;</div><div class='ctx'> 	vma = _install_special_mapping(mm, vdso_addr, info-&gt;size,</div><div class='del'>-				       VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,</div><div class='add'>+				       VM_READ | VM_EXEC |</div><div class='add'>+				       VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC |</div><div class='add'>+				       VM_SEALED_SYSMAP,</div><div class='ctx'> 				       &amp;info-&gt;code_mapping);</div><div class='ctx'> 	if (IS_ERR(vma)) {</div><div class='ctx'> 		ret = PTR_ERR(vma);</div><div class='head'>diff --git a/arch/loongarch/kvm/Kconfig b/arch/loongarch/kvm/Kconfig<br/>index 248744b4d086..ae64bbdf83a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/Kconfig</a></div><div class='hunk'>@@ -21,15 +21,19 @@ config KVM</div><div class='ctx'> 	tristate "Kernel-based Virtual Machine (KVM) support"</div><div class='ctx'> 	depends on AS_HAS_LVZ_EXTENSION</div><div class='ctx'> 	select HAVE_KVM_DIRTY_RING_ACQ_REL</div><div class='add'>+	select HAVE_KVM_IRQ_ROUTING</div><div class='add'>+	select HAVE_KVM_IRQCHIP</div><div class='add'>+	select HAVE_KVM_MSI</div><div class='add'>+	select HAVE_KVM_READONLY_MEM</div><div class='ctx'> 	select HAVE_KVM_VCPU_ASYNC_IOCTL</div><div class='ctx'> 	select KVM_COMMON</div><div class='ctx'> 	select KVM_GENERIC_DIRTYLOG_READ_PROTECT</div><div class='ctx'> 	select KVM_GENERIC_HARDWARE_ENABLING</div><div class='ctx'> 	select KVM_GENERIC_MMU_NOTIFIER</div><div class='ctx'> 	select KVM_MMIO</div><div class='del'>-	select HAVE_KVM_READONLY_MEM</div><div class='del'>-	select KVM_XFER_TO_GUEST_WORK</div><div class='add'>+	select VIRT_XFER_TO_GUEST_WORK</div><div class='ctx'> 	select SCHED_INFO</div><div class='add'>+	select GUEST_PERF_EVENTS if PERF_EVENTS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support hosting virtualized guest machines using</div><div class='ctx'> 	  hardware virtualization extensions. You will need</div><div class='head'>diff --git a/arch/loongarch/kvm/Makefile b/arch/loongarch/kvm/Makefile<br/>index b2f4cbe01ae8..cb41d9265662 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/Makefile</a></div><div class='hunk'>@@ -3,8 +3,6 @@</div><div class='ctx'> # Makefile for LoongArch KVM support</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-ccflags-y += -I $(src)</div><div class='del'>-</div><div class='ctx'> include $(srctree)/virt/kvm/Makefile.kvm</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KVM) += kvm.o</div><div class='hunk'>@@ -18,5 +16,9 @@ kvm-y += timer.o</div><div class='ctx'> kvm-y += tlb.o</div><div class='ctx'> kvm-y += vcpu.o</div><div class='ctx'> kvm-y += vm.o</div><div class='add'>+kvm-y += intc/ipi.o</div><div class='add'>+kvm-y += intc/eiointc.o</div><div class='add'>+kvm-y += intc/pch_pic.o</div><div class='add'>+kvm-y += irqfd.o</div><div class='ctx'> </div><div class='del'>-CFLAGS_exit.o	+= $(call cc-option,-Wno-override-init,)</div><div class='add'>+CFLAGS_exit.o	+= $(call cc-disable-warning, override-init)</div><div class='head'>diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c<br/>index 90894f70ff4a..cb493980d874 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/exit.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/exit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/exit.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/exit.c</a></div><div class='hunk'>@@ -156,8 +156,8 @@ static int kvm_handle_csr(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> </div><div class='ctx'> int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned long val;</div><div class='add'>+	int idx, ret;</div><div class='add'>+	unsigned long *val;</div><div class='ctx'> 	u32 addr, rd, rj, opcode;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -167,9 +167,9 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 	rj = inst.reg2_format.rj;</div><div class='ctx'> 	opcode = inst.reg2_format.opcode;</div><div class='ctx'> 	addr = vcpu-&gt;arch.gprs[rj];</div><div class='del'>-	ret = EMULATE_DO_IOCSR;</div><div class='ctx'> 	run-&gt;iocsr_io.phys_addr = addr;</div><div class='ctx'> 	run-&gt;iocsr_io.is_write = 0;</div><div class='add'>+	val = &amp;vcpu-&gt;arch.gprs[rd];</div><div class='ctx'> </div><div class='ctx'> 	/* LoongArch is Little endian */</div><div class='ctx'> 	switch (opcode) {</div><div class='hunk'>@@ -202,16 +202,33 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 		run-&gt;iocsr_io.is_write = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		ret = EMULATE_FAIL;</div><div class='del'>-		break;</div><div class='add'>+		return EMULATE_FAIL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ret == EMULATE_DO_IOCSR) {</div><div class='del'>-		if (run-&gt;iocsr_io.is_write) {</div><div class='del'>-			val = vcpu-&gt;arch.gprs[rd];</div><div class='del'>-			memcpy(run-&gt;iocsr_io.data, &amp;val, run-&gt;iocsr_io.len);</div><div class='add'>+	if (run-&gt;iocsr_io.is_write) {</div><div class='add'>+		idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+		ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run-&gt;iocsr_io.len, val);</div><div class='add'>+		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = EMULATE_DONE;</div><div class='add'>+		else {</div><div class='add'>+			ret = EMULATE_DO_IOCSR;</div><div class='add'>+			/* Save data and let user space to write it */</div><div class='add'>+			memcpy(run-&gt;iocsr_io.data, val, run-&gt;iocsr_io.len);</div><div class='ctx'> 		}</div><div class='del'>-		vcpu-&gt;arch.io_gpr = rd;</div><div class='add'>+		trace_kvm_iocsr(KVM_TRACE_IOCSR_WRITE, run-&gt;iocsr_io.len, addr, val);</div><div class='add'>+	} else {</div><div class='add'>+		vcpu-&gt;arch.io_gpr = rd; /* Set register id for iocsr read completion */</div><div class='add'>+		idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+		ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr,</div><div class='add'>+				      run-&gt;iocsr_io.len, run-&gt;iocsr_io.data);</div><div class='add'>+		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			kvm_complete_iocsr_read(vcpu, run);</div><div class='add'>+			ret = EMULATE_DONE;</div><div class='add'>+		} else</div><div class='add'>+			ret = EMULATE_DO_IOCSR;</div><div class='add'>+		trace_kvm_iocsr(KVM_TRACE_IOCSR_READ, run-&gt;iocsr_io.len, addr, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -272,9 +289,11 @@ static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	er = EMULATE_FAIL;</div><div class='ctx'> 	switch (((inst.word &gt;&gt; 24) &amp; 0xff)) {</div><div class='ctx'> 	case 0x0: /* CPUCFG GSPR */</div><div class='add'>+		trace_kvm_exit_cpucfg(vcpu, KVM_TRACE_EXIT_CPUCFG);</div><div class='ctx'> 		er = kvm_emu_cpucfg(vcpu, inst);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x4: /* CSR{RD,WR,XCHG} GSPR */</div><div class='add'>+		trace_kvm_exit_csr(vcpu, KVM_TRACE_EXIT_CSR);</div><div class='ctx'> 		er = kvm_handle_csr(vcpu, inst);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x6: /* Cache, Idle and IOCSR GSPR */</div><div class='hunk'>@@ -324,7 +343,7 @@ static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='ctx'>  * 2) Execute CACOP/IDLE instructions;</div><div class='ctx'>  * 3) Access to unimplemented CSRs/IOCSRs.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_gspr(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = RESUME_GUEST;</div><div class='ctx'> 	enum emulation_result er = EMULATE_DONE;</div><div class='hunk'>@@ -349,7 +368,7 @@ static int kvm_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int idx, ret;</div><div class='ctx'> 	unsigned int op8, opcode, rd;</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='ctx'> </div><div class='hunk'>@@ -447,19 +466,36 @@ int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret == EMULATE_DO_MMIO) {</div><div class='del'>-		/* Set for kvm_complete_mmio_read() use */</div><div class='del'>-		vcpu-&gt;arch.io_gpr = rd;</div><div class='add'>+		trace_kvm_mmio(KVM_TRACE_MMIO_READ, run-&gt;mmio.len, run-&gt;mmio.phys_addr, NULL);</div><div class='add'>+</div><div class='add'>+		vcpu-&gt;arch.io_gpr = rd; /* Set for kvm_complete_mmio_read() use */</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If mmio device such as PCH-PIC is emulated in KVM,</div><div class='add'>+		 * it need not return to user space to handle the mmio</div><div class='add'>+		 * exception.</div><div class='add'>+		 */</div><div class='add'>+		idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+		ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, vcpu-&gt;arch.badv,</div><div class='add'>+				      run-&gt;mmio.len, run-&gt;mmio.data);</div><div class='add'>+		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			kvm_complete_mmio_read(vcpu, run);</div><div class='add'>+			update_pc(&amp;vcpu-&gt;arch);</div><div class='add'>+			vcpu-&gt;mmio_needed = 0;</div><div class='add'>+			return EMULATE_DONE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		run-&gt;mmio.is_write = 0;</div><div class='ctx'> 		vcpu-&gt;mmio_is_write = 0;</div><div class='del'>-		trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, run-&gt;mmio.len,</div><div class='del'>-				run-&gt;mmio.phys_addr, NULL);</div><div class='del'>-	} else {</div><div class='del'>-		kvm_err("Read not supported Inst=0x%08x @%lx BadVaddr:%#lx\n",</div><div class='del'>-			inst.word, vcpu-&gt;arch.pc, vcpu-&gt;arch.badv);</div><div class='del'>-		kvm_arch_vcpu_dump_regs(vcpu);</div><div class='del'>-		vcpu-&gt;mmio_needed = 0;</div><div class='add'>+		return EMULATE_DO_MMIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvm_err("Read not supported Inst=0x%08x @%lx BadVaddr:%#lx\n",</div><div class='add'>+			inst.word, vcpu-&gt;arch.pc, vcpu-&gt;arch.badv);</div><div class='add'>+	kvm_arch_vcpu_dump_regs(vcpu);</div><div class='add'>+	vcpu-&gt;mmio_needed = 0;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -507,7 +543,7 @@ int kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> </div><div class='ctx'> int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int idx, ret;</div><div class='ctx'> 	unsigned int rd, op8, opcode;</div><div class='ctx'> 	unsigned long curr_pc, rd_val = 0;</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='hunk'>@@ -600,23 +636,35 @@ int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret == EMULATE_DO_MMIO) {</div><div class='add'>+		trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, run-&gt;mmio.len, run-&gt;mmio.phys_addr, data);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If mmio device such as PCH-PIC is emulated in KVM,</div><div class='add'>+		 * it need not return to user space to handle the mmio</div><div class='add'>+		 * exception.</div><div class='add'>+		 */</div><div class='add'>+		idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+		ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, vcpu-&gt;arch.badv, run-&gt;mmio.len, data);</div><div class='add'>+		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+		if (!ret)</div><div class='add'>+			return EMULATE_DONE;</div><div class='add'>+</div><div class='ctx'> 		run-&gt;mmio.is_write = 1;</div><div class='ctx'> 		vcpu-&gt;mmio_needed = 1;</div><div class='ctx'> 		vcpu-&gt;mmio_is_write = 1;</div><div class='del'>-		trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, run-&gt;mmio.len,</div><div class='del'>-				run-&gt;mmio.phys_addr, data);</div><div class='del'>-	} else {</div><div class='del'>-		vcpu-&gt;arch.pc = curr_pc;</div><div class='del'>-		kvm_err("Write not supported Inst=0x%08x @%lx BadVaddr:%#lx\n",</div><div class='del'>-			inst.word, vcpu-&gt;arch.pc, vcpu-&gt;arch.badv);</div><div class='del'>-		kvm_arch_vcpu_dump_regs(vcpu);</div><div class='del'>-		/* Rollback PC if emulation was unsuccessful */</div><div class='add'>+		return EMULATE_DO_MMIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	vcpu-&gt;arch.pc = curr_pc;</div><div class='add'>+	kvm_err("Write not supported Inst=0x%08x @%lx BadVaddr:%#lx\n",</div><div class='add'>+			inst.word, vcpu-&gt;arch.pc, vcpu-&gt;arch.badv);</div><div class='add'>+	kvm_arch_vcpu_dump_regs(vcpu);</div><div class='add'>+	/* Rollback PC if emulation was unsuccessful */</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='add'>+static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	larch_inst inst;</div><div class='hunk'>@@ -624,7 +672,13 @@ static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='ctx'> 	unsigned long badv = vcpu-&gt;arch.badv;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_handle_mm_fault(vcpu, badv, write);</div><div class='add'>+	/* Inject ADE exception if exceed max GPA size */</div><div class='add'>+	if (unlikely(badv &gt;= vcpu-&gt;kvm-&gt;arch.gpa_size)) {</div><div class='add'>+		kvm_queue_exception(vcpu, EXCCODE_ADE, EXSUBCODE_ADEM);</div><div class='add'>+		return RESUME_GUEST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = kvm_handle_mm_fault(vcpu, badv, write, ecode);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		/* Treat as MMIO */</div><div class='ctx'> 		inst.word = vcpu-&gt;arch.badi;</div><div class='hunk'>@@ -654,24 +708,33 @@ static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_read_fault(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_read_fault(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	return kvm_handle_rdwr_fault(vcpu, false);</div><div class='add'>+	return kvm_handle_rdwr_fault(vcpu, false, ecode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_write_fault(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_write_fault(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	return kvm_handle_rdwr_fault(vcpu, true);</div><div class='add'>+	return kvm_handle_rdwr_fault(vcpu, true, ecode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='add'>+{</div><div class='add'>+	update_pc(&amp;vcpu-&gt;arch);</div><div class='add'>+	kvm_write_reg(vcpu, LOONGARCH_GPR_A0, run-&gt;hypercall.ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * kvm_handle_fpu_disabled() - Guest used fpu however it is disabled at host</div><div class='ctx'>  * @vcpu:	Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use fpu which hasn't been allowed</div><div class='ctx'>  * by the root context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_fpu_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_fpu_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='ctx'> </div><div class='hunk'>@@ -716,19 +779,18 @@ static long kvm_save_notify(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return KVM_HCALL_INVALID_CODE;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return KVM_HCALL_INVALID_CODE;</div><div class='del'>-};</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * kvm_handle_lsx_disabled() - Guest used LSX while disabled in root.</div><div class='ctx'>  * @vcpu:      Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use LSX when it is disabled in the root</div><div class='ctx'>  * context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lsx(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -739,11 +801,12 @@ static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> /*</div><div class='ctx'>  * kvm_handle_lasx_disabled() - Guest used LASX while disabled in root.</div><div class='ctx'>  * @vcpu:	Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use LASX when it is disabled in the root</div><div class='ctx'>  * context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lasx(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -751,7 +814,7 @@ static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return RESUME_GUEST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lbt(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -759,32 +822,25 @@ static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return RESUME_GUEST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_send_pv_ipi(struct kvm_vcpu *vcpu)</div><div class='add'>+static void kvm_send_pv_ipi(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned int min, cpu, i;</div><div class='del'>-	unsigned long ipi_bitmap;</div><div class='add'>+	unsigned int min, cpu;</div><div class='ctx'> 	struct kvm_vcpu *dest;</div><div class='add'>+	DECLARE_BITMAP(ipi_bitmap, BITS_PER_LONG * 2) = {</div><div class='add'>+		kvm_read_reg(vcpu, LOONGARCH_GPR_A1),</div><div class='add'>+		kvm_read_reg(vcpu, LOONGARCH_GPR_A2)</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	min = kvm_read_reg(vcpu, LOONGARCH_GPR_A3);</div><div class='del'>-	for (i = 0; i &lt; 2; i++, min += BITS_PER_LONG) {</div><div class='del'>-		ipi_bitmap = kvm_read_reg(vcpu, LOONGARCH_GPR_A1 + i);</div><div class='del'>-		if (!ipi_bitmap)</div><div class='add'>+	for_each_set_bit(cpu, ipi_bitmap, BITS_PER_LONG * 2) {</div><div class='add'>+		dest = kvm_get_vcpu_by_cpuid(vcpu-&gt;kvm, cpu + min);</div><div class='add'>+		if (!dest)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		cpu = find_first_bit((void *)&amp;ipi_bitmap, BITS_PER_LONG);</div><div class='del'>-		while (cpu &lt; BITS_PER_LONG) {</div><div class='del'>-			dest = kvm_get_vcpu_by_cpuid(vcpu-&gt;kvm, cpu + min);</div><div class='del'>-			cpu = find_next_bit((void *)&amp;ipi_bitmap, BITS_PER_LONG, cpu + 1);</div><div class='del'>-			if (!dest)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			/* Send SWI0 to dest vcpu to emulate IPI interrupt */</div><div class='del'>-			kvm_queue_irq(dest, INT_SWI0);</div><div class='del'>-			kvm_vcpu_kick(dest);</div><div class='del'>-		}</div><div class='add'>+		/* Send SWI0 to dest vcpu to emulate IPI interrupt */</div><div class='add'>+		kvm_queue_irq(dest, INT_SWI0);</div><div class='add'>+		kvm_vcpu_kick(dest);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -813,7 +869,7 @@ static void kvm_handle_service(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_write_reg(vcpu, LOONGARCH_GPR_A0, ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_hypercall(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_hypercall(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	larch_inst inst;</div><div class='hunk'>@@ -828,6 +884,28 @@ static int kvm_handle_hypercall(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu-&gt;stat.hypercall_exits++;</div><div class='ctx'> 		kvm_handle_service(vcpu);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_HCALL_USER_SERVICE:</div><div class='add'>+		if (!kvm_guest_has_pv_feature(vcpu, KVM_FEATURE_USER_HCALL)) {</div><div class='add'>+			kvm_write_reg(vcpu, LOONGARCH_GPR_A0, KVM_HCALL_INVALID_CODE);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		vcpu-&gt;stat.hypercall_exits++;</div><div class='add'>+		vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_HYPERCALL;</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.nr = KVM_HCALL_USER_SERVICE;</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[0] = kvm_read_reg(vcpu, LOONGARCH_GPR_A0);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[1] = kvm_read_reg(vcpu, LOONGARCH_GPR_A1);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[2] = kvm_read_reg(vcpu, LOONGARCH_GPR_A2);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[3] = kvm_read_reg(vcpu, LOONGARCH_GPR_A3);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[4] = kvm_read_reg(vcpu, LOONGARCH_GPR_A4);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.args[5] = kvm_read_reg(vcpu, LOONGARCH_GPR_A5);</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.flags = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * Set invalid return value by default, let user-mode VMM modify it.</div><div class='add'>+		 */</div><div class='add'>+		vcpu-&gt;run-&gt;hypercall.ret = KVM_HCALL_INVALID_CODE;</div><div class='add'>+		ret = RESUME_HOST;</div><div class='add'>+		break;</div><div class='ctx'> 	case KVM_HCALL_SWDBG:</div><div class='ctx'> 		/* KVM_HCALL_SWDBG only in effective when SW_BP is enabled */</div><div class='ctx'> 		if (vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_SW_BP_MASK) {</div><div class='hunk'>@@ -851,16 +929,14 @@ static int kvm_handle_hypercall(struct kvm_vcpu *vcpu)</div><div class='ctx'> /*</div><div class='ctx'>  * LoongArch KVM callback handling for unimplemented guest exiting</div><div class='ctx'>  */</div><div class='del'>-static int kvm_fault_ni(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_fault_ni(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ecode, inst;</div><div class='del'>-	unsigned long estat, badv;</div><div class='add'>+	unsigned int inst;</div><div class='add'>+	unsigned long badv;</div><div class='ctx'> </div><div class='ctx'> 	/* Fetch the instruction */</div><div class='ctx'> 	inst = vcpu-&gt;arch.badi;</div><div class='ctx'> 	badv = vcpu-&gt;arch.badv;</div><div class='del'>-	estat = vcpu-&gt;arch.host_estat;</div><div class='del'>-	ecode = (estat &amp; CSR_ESTAT_EXC) &gt;&gt; CSR_ESTAT_EXC_SHIFT;</div><div class='ctx'> 	kvm_err("ECode: %d PC=%#lx Inst=0x%08x BadVaddr=%#lx ESTAT=%#lx\n",</div><div class='ctx'> 			ecode, vcpu-&gt;arch.pc, inst, badv, read_gcsr_estat());</div><div class='ctx'> 	kvm_arch_vcpu_dump_regs(vcpu);</div><div class='hunk'>@@ -885,5 +961,5 @@ static exit_handle_fn kvm_fault_tables[EXCCODE_INT_START] = {</div><div class='ctx'> </div><div class='ctx'> int kvm_handle_fault(struct kvm_vcpu *vcpu, int fault)</div><div class='ctx'> {</div><div class='del'>-	return kvm_fault_tables[fault](vcpu);</div><div class='add'>+	return kvm_fault_tables[fault](vcpu, fault);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/eiointc.c<br/>new file mode 100644<br/>index 000000000000..c32333695381<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/intc/eiointc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/intc/eiointc.c</a></div><div class='hunk'>@@ -0,0 +1,695 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/kvm_eiointc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_vcpu.h&gt;</div><div class='add'>+#include &lt;linux/count_zeros.h&gt;</div><div class='add'>+</div><div class='add'>+static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s)</div><div class='add'>+{</div><div class='add'>+	int ipnum, cpu, cpuid, irq;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; EIOINTC_IRQS; irq++) {</div><div class='add'>+		ipnum = s-&gt;ipmap.reg_u8[irq / 32];</div><div class='add'>+		if (!(s-&gt;status &amp; BIT(EIOINTC_ENABLE_INT_ENCODE))) {</div><div class='add'>+			ipnum = count_trailing_zeros(ipnum);</div><div class='add'>+			ipnum = (ipnum &gt;= 0 &amp;&amp; ipnum &lt; 4) ? ipnum : 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cpuid = s-&gt;coremap.reg_u8[irq];</div><div class='add'>+		vcpu = kvm_get_vcpu_by_cpuid(s-&gt;kvm, cpuid);</div><div class='add'>+		if (!vcpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cpu = vcpu-&gt;vcpu_id;</div><div class='add'>+		if (test_bit(irq, (unsigned long *)s-&gt;coreisr.reg_u32[cpu]))</div><div class='add'>+			__set_bit(irq, s-&gt;sw_coreisr[cpu][ipnum]);</div><div class='add'>+		else</div><div class='add'>+			__clear_bit(irq, s-&gt;sw_coreisr[cpu][ipnum]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void eiointc_update_irq(struct loongarch_eiointc *s, int irq, int level)</div><div class='add'>+{</div><div class='add'>+	int ipnum, cpu, found;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	struct kvm_interrupt vcpu_irq;</div><div class='add'>+</div><div class='add'>+	ipnum = s-&gt;ipmap.reg_u8[irq / 32];</div><div class='add'>+	if (!(s-&gt;status &amp; BIT(EIOINTC_ENABLE_INT_ENCODE))) {</div><div class='add'>+		ipnum = count_trailing_zeros(ipnum);</div><div class='add'>+		ipnum = (ipnum &gt;= 0 &amp;&amp; ipnum &lt; 4) ? ipnum : 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu = s-&gt;sw_coremap[irq];</div><div class='add'>+	vcpu = kvm_get_vcpu_by_id(s-&gt;kvm, cpu);</div><div class='add'>+	if (unlikely(vcpu == NULL)) {</div><div class='add'>+		kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (level) {</div><div class='add'>+		/* if not enable return false */</div><div class='add'>+		if (!test_bit(irq, (unsigned long *)s-&gt;enable.reg_u32))</div><div class='add'>+			return;</div><div class='add'>+		__set_bit(irq, (unsigned long *)s-&gt;coreisr.reg_u32[cpu]);</div><div class='add'>+		found = find_first_bit(s-&gt;sw_coreisr[cpu][ipnum], EIOINTC_IRQS);</div><div class='add'>+		__set_bit(irq, s-&gt;sw_coreisr[cpu][ipnum]);</div><div class='add'>+	} else {</div><div class='add'>+		__clear_bit(irq, (unsigned long *)s-&gt;coreisr.reg_u32[cpu]);</div><div class='add'>+		__clear_bit(irq, s-&gt;sw_coreisr[cpu][ipnum]);</div><div class='add'>+		found = find_first_bit(s-&gt;sw_coreisr[cpu][ipnum], EIOINTC_IRQS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (found &lt; EIOINTC_IRQS)</div><div class='add'>+		return; /* other irq is handling, needn't update parent irq */</div><div class='add'>+</div><div class='add'>+	vcpu_irq.irq = level ? (INT_HWI0 + ipnum) : -(INT_HWI0 + ipnum);</div><div class='add'>+	kvm_vcpu_ioctl_interrupt(vcpu, &amp;vcpu_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s,</div><div class='add'>+					int irq, u64 val, u32 len, bool notify)</div><div class='add'>+{</div><div class='add'>+	int i, cpu, cpuid;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		cpuid = val &amp; 0xff;</div><div class='add'>+		val = val &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+		if (!(s-&gt;status &amp; BIT(EIOINTC_ENABLE_CPU_ENCODE))) {</div><div class='add'>+			cpuid = ffs(cpuid) - 1;</div><div class='add'>+			cpuid = (cpuid &gt;= 4) ? 0 : cpuid;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		vcpu = kvm_get_vcpu_by_cpuid(s-&gt;kvm, cpuid);</div><div class='add'>+		if (!vcpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cpu = vcpu-&gt;vcpu_id;</div><div class='add'>+		if (s-&gt;sw_coremap[irq + i] == cpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (notify &amp;&amp; test_bit(irq + i, (unsigned long *)s-&gt;isr.reg_u8)) {</div><div class='add'>+			/* lower irq at old cpu and raise irq at new cpu */</div><div class='add'>+			eiointc_update_irq(s, irq + i, 0);</div><div class='add'>+			s-&gt;sw_coremap[irq + i] = cpu;</div><div class='add'>+			eiointc_update_irq(s, irq + i, 1);</div><div class='add'>+		} else {</div><div class='add'>+			s-&gt;sw_coremap[irq + i] = cpu;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void eiointc_set_irq(struct loongarch_eiointc *s, int irq, int level)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned long *isr = (unsigned long *)s-&gt;isr.reg_u8;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;s-&gt;lock, flags);</div><div class='add'>+	level ? __set_bit(irq, isr) : __clear_bit(irq, isr);</div><div class='add'>+	eiointc_update_irq(s, irq, level);</div><div class='add'>+	spin_unlock_irqrestore(&amp;s-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_eiointc_read(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s,</div><div class='add'>+				gpa_t addr, unsigned long *val)</div><div class='add'>+{</div><div class='add'>+	int index, ret = 0;</div><div class='add'>+	u64 data = 0;</div><div class='add'>+	gpa_t offset;</div><div class='add'>+</div><div class='add'>+	offset = addr - EIOINTC_BASE;</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case EIOINTC_NODETYPE_START ... EIOINTC_NODETYPE_END:</div><div class='add'>+		index = (offset - EIOINTC_NODETYPE_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;nodetype.reg_u64[index];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_IPMAP_START ... EIOINTC_IPMAP_END:</div><div class='add'>+		index = (offset - EIOINTC_IPMAP_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;ipmap.reg_u64;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_ENABLE_START ... EIOINTC_ENABLE_END:</div><div class='add'>+		index = (offset - EIOINTC_ENABLE_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;enable.reg_u64[index];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END:</div><div class='add'>+		index = (offset - EIOINTC_BOUNCE_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;bounce.reg_u64[index];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREISR_START ... EIOINTC_COREISR_END:</div><div class='add'>+		index = (offset - EIOINTC_COREISR_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;coreisr.reg_u64[vcpu-&gt;vcpu_id][index];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREMAP_START ... EIOINTC_COREMAP_END:</div><div class='add'>+		index = (offset - EIOINTC_COREMAP_START) &gt;&gt; 3;</div><div class='add'>+		data = s-&gt;coremap.reg_u64[index];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	*val = data;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_read(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	unsigned long flags, data, offset;</div><div class='add'>+	struct loongarch_eiointc *eiointc = vcpu-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+</div><div class='add'>+	if (!eiointc) {</div><div class='add'>+		kvm_err("%s: eiointc irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr &amp; (len - 1)) {</div><div class='add'>+		kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = addr &amp; 0x7;</div><div class='add'>+	addr -= offset;</div><div class='add'>+	vcpu-&gt;stat.eiointc_read_exits++;</div><div class='add'>+	spin_lock_irqsave(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+	ret = loongarch_eiointc_read(vcpu, eiointc, addr, &amp;data);</div><div class='add'>+	spin_unlock_irqrestore(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data = data &gt;&gt; (offset * 8);</div><div class='add'>+	switch (len) {</div><div class='add'>+	case 1:</div><div class='add'>+		*(long *)val = (s8)data;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		*(long *)val = (s16)data;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		*(long *)val = (s32)data;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*(long *)val = (long)data;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_eiointc_write(struct kvm_vcpu *vcpu,</div><div class='add'>+				struct loongarch_eiointc *s,</div><div class='add'>+				gpa_t addr, u64 value, u64 field_mask)</div><div class='add'>+{</div><div class='add'>+	int index, irq, ret = 0;</div><div class='add'>+	u8 cpu;</div><div class='add'>+	u64 data, old, mask;</div><div class='add'>+	gpa_t offset;</div><div class='add'>+</div><div class='add'>+	offset = addr &amp; 7;</div><div class='add'>+	mask = field_mask &lt;&lt; (offset * 8);</div><div class='add'>+	data = (value &amp; field_mask) &lt;&lt; (offset * 8);</div><div class='add'>+</div><div class='add'>+	addr -= offset;</div><div class='add'>+	offset = addr - EIOINTC_BASE;</div><div class='add'>+</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case EIOINTC_NODETYPE_START ... EIOINTC_NODETYPE_END:</div><div class='add'>+		index = (offset - EIOINTC_NODETYPE_START) &gt;&gt; 3;</div><div class='add'>+		old = s-&gt;nodetype.reg_u64[index];</div><div class='add'>+		s-&gt;nodetype.reg_u64[index] = (old &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_IPMAP_START ... EIOINTC_IPMAP_END:</div><div class='add'>+		/*</div><div class='add'>+		 * ipmap cannot be set at runtime, can be set only at the beginning</div><div class='add'>+		 * of irqchip driver, need not update upper irq level</div><div class='add'>+		 */</div><div class='add'>+		old = s-&gt;ipmap.reg_u64;</div><div class='add'>+		s-&gt;ipmap.reg_u64 = (old &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_ENABLE_START ... EIOINTC_ENABLE_END:</div><div class='add'>+		index = (offset - EIOINTC_ENABLE_START) &gt;&gt; 3;</div><div class='add'>+		old = s-&gt;enable.reg_u64[index];</div><div class='add'>+		s-&gt;enable.reg_u64[index] = (old &amp; ~mask) | data;</div><div class='add'>+		/*</div><div class='add'>+		 * 1: enable irq.</div><div class='add'>+		 * update irq when isr is set.</div><div class='add'>+		 */</div><div class='add'>+		data = s-&gt;enable.reg_u64[index] &amp; ~old &amp; s-&gt;isr.reg_u64[index];</div><div class='add'>+		while (data) {</div><div class='add'>+			irq = __ffs(data);</div><div class='add'>+			eiointc_update_irq(s, irq + index * 64, 1);</div><div class='add'>+			data &amp;= ~BIT_ULL(irq);</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 * 0: disable irq.</div><div class='add'>+		 * update irq when isr is set.</div><div class='add'>+		 */</div><div class='add'>+		data = ~s-&gt;enable.reg_u64[index] &amp; old &amp; s-&gt;isr.reg_u64[index];</div><div class='add'>+		while (data) {</div><div class='add'>+			irq = __ffs(data);</div><div class='add'>+			eiointc_update_irq(s, irq + index * 64, 0);</div><div class='add'>+			data &amp;= ~BIT_ULL(irq);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END:</div><div class='add'>+		/* do not emulate hw bounced irq routing */</div><div class='add'>+		index = (offset - EIOINTC_BOUNCE_START) &gt;&gt; 3;</div><div class='add'>+		old = s-&gt;bounce.reg_u64[index];</div><div class='add'>+		s-&gt;bounce.reg_u64[index] = (old &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREISR_START ... EIOINTC_COREISR_END:</div><div class='add'>+		index = (offset - EIOINTC_COREISR_START) &gt;&gt; 3;</div><div class='add'>+		/* use attrs to get current cpu index */</div><div class='add'>+		cpu = vcpu-&gt;vcpu_id;</div><div class='add'>+		old = s-&gt;coreisr.reg_u64[cpu][index];</div><div class='add'>+		/* write 1 to clear interrupt */</div><div class='add'>+		s-&gt;coreisr.reg_u64[cpu][index] = old &amp; ~data;</div><div class='add'>+		data &amp;= old;</div><div class='add'>+		while (data) {</div><div class='add'>+			irq = __ffs(data);</div><div class='add'>+			eiointc_update_irq(s, irq + index * 64, 0);</div><div class='add'>+			data &amp;= ~BIT_ULL(irq);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREMAP_START ... EIOINTC_COREMAP_END:</div><div class='add'>+		index = (offset - EIOINTC_COREMAP_START) &gt;&gt; 3;</div><div class='add'>+		old = s-&gt;coremap.reg_u64[index];</div><div class='add'>+		s-&gt;coremap.reg_u64[index] = (old &amp; ~mask) | data;</div><div class='add'>+		data = s-&gt;coremap.reg_u64[index];</div><div class='add'>+		eiointc_update_sw_coremap(s, index * 8, data, sizeof(data), true);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_write(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	unsigned long flags, value;</div><div class='add'>+	struct loongarch_eiointc *eiointc = vcpu-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+</div><div class='add'>+	if (!eiointc) {</div><div class='add'>+		kvm_err("%s: eiointc irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr &amp; (len - 1)) {</div><div class='add'>+		kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;stat.eiointc_write_exits++;</div><div class='add'>+	spin_lock_irqsave(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+	switch (len) {</div><div class='add'>+	case 1:</div><div class='add'>+		value = *(unsigned char *)val;</div><div class='add'>+		ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, 0xFF);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		value = *(unsigned short *)val;</div><div class='add'>+		ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, USHRT_MAX);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		value = *(unsigned int *)val;</div><div class='add'>+		ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, UINT_MAX);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		value = *(unsigned long *)val;</div><div class='add'>+		ret = loongarch_eiointc_write(vcpu, eiointc, addr, value, ULONG_MAX);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct kvm_io_device_ops kvm_eiointc_ops = {</div><div class='add'>+	.read	= kvm_eiointc_read,</div><div class='add'>+	.write	= kvm_eiointc_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_virt_read(struct kvm_vcpu *vcpu,</div><div class='add'>+				struct kvm_io_device *dev,</div><div class='add'>+				gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 *data = val;</div><div class='add'>+	struct loongarch_eiointc *eiointc = vcpu-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+</div><div class='add'>+	if (!eiointc) {</div><div class='add'>+		kvm_err("%s: eiointc irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr -= EIOINTC_VIRT_BASE;</div><div class='add'>+	spin_lock_irqsave(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case EIOINTC_VIRT_FEATURES:</div><div class='add'>+		*data = eiointc-&gt;features;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_VIRT_CONFIG:</div><div class='add'>+		*data = eiointc-&gt;status;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_virt_write(struct kvm_vcpu *vcpu,</div><div class='add'>+				struct kvm_io_device *dev,</div><div class='add'>+				gpa_t addr, int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value = *(u32 *)val;</div><div class='add'>+	struct loongarch_eiointc *eiointc = vcpu-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+</div><div class='add'>+	if (!eiointc) {</div><div class='add'>+		kvm_err("%s: eiointc irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr -= EIOINTC_VIRT_BASE;</div><div class='add'>+	spin_lock_irqsave(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case EIOINTC_VIRT_FEATURES:</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_VIRT_CONFIG:</div><div class='add'>+		/*</div><div class='add'>+		 * eiointc features can only be set at disabled status</div><div class='add'>+		 */</div><div class='add'>+		if ((eiointc-&gt;status &amp; BIT(EIOINTC_ENABLE)) &amp;&amp; value) {</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		eiointc-&gt;status = value &amp; eiointc-&gt;features;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;eiointc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct kvm_io_device_ops kvm_eiointc_virt_ops = {</div><div class='add'>+	.read	= kvm_eiointc_virt_read,</div><div class='add'>+	.write	= kvm_eiointc_virt_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_ctrl_access(struct kvm_device *dev,</div><div class='add'>+					struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned long type = (unsigned long)attr-&gt;attr;</div><div class='add'>+	u32 i, start_irq, val;</div><div class='add'>+	void __user *data;</div><div class='add'>+	struct loongarch_eiointc *s = dev-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+</div><div class='add'>+	data = (void __user *)attr-&gt;addr;</div><div class='add'>+	switch (type) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU:</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE:</div><div class='add'>+		if (copy_from_user(&amp;val, data, 4))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;s-&gt;lock, flags);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU:</div><div class='add'>+		if (val &gt;= EIOINTC_ROUTE_MAX_VCPUS)</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		else</div><div class='add'>+			s-&gt;num_cpu = val;</div><div class='add'>+		break;</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE:</div><div class='add'>+		s-&gt;features = val;</div><div class='add'>+		if (!(s-&gt;features &amp; BIT(EIOINTC_HAS_VIRT_EXTENSION)))</div><div class='add'>+			s-&gt;status |= BIT(EIOINTC_ENABLE);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_CTRL_LOAD_FINISHED:</div><div class='add'>+		eiointc_set_sw_coreisr(s);</div><div class='add'>+		for (i = 0; i &lt; (EIOINTC_IRQS / 4); i++) {</div><div class='add'>+			start_irq = i * 4;</div><div class='add'>+			eiointc_update_sw_coremap(s, start_irq,</div><div class='add'>+					s-&gt;coremap.reg_u32[i], sizeof(u32), false);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;s-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_regs_access(struct kvm_device *dev,</div><div class='add'>+					struct kvm_device_attr *attr,</div><div class='add'>+					bool is_write, int *data)</div><div class='add'>+{</div><div class='add'>+	int addr, cpu, offset, ret = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void *p = NULL;</div><div class='add'>+	struct loongarch_eiointc *s;</div><div class='add'>+</div><div class='add'>+	s = dev-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+	addr = attr-&gt;attr;</div><div class='add'>+	cpu = addr &gt;&gt; 16;</div><div class='add'>+	addr &amp;= 0xffff;</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case EIOINTC_NODETYPE_START ... EIOINTC_NODETYPE_END:</div><div class='add'>+		offset = (addr - EIOINTC_NODETYPE_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;nodetype.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_IPMAP_START ... EIOINTC_IPMAP_END:</div><div class='add'>+		offset = (addr - EIOINTC_IPMAP_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;ipmap.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_ENABLE_START ... EIOINTC_ENABLE_END:</div><div class='add'>+		offset = (addr - EIOINTC_ENABLE_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;enable.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END:</div><div class='add'>+		offset = (addr - EIOINTC_BOUNCE_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;bounce.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_ISR_START ... EIOINTC_ISR_END:</div><div class='add'>+		offset = (addr - EIOINTC_ISR_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;isr.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREISR_START ... EIOINTC_COREISR_END:</div><div class='add'>+		if (cpu &gt;= s-&gt;num_cpu)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		offset = (addr - EIOINTC_COREISR_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;coreisr.reg_u32[cpu][offset];</div><div class='add'>+		break;</div><div class='add'>+	case EIOINTC_COREMAP_START ... EIOINTC_COREMAP_END:</div><div class='add'>+		offset = (addr - EIOINTC_COREMAP_START) / 4;</div><div class='add'>+		p = &amp;s-&gt;coremap.reg_u32[offset];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown eiointc register, addr = %d\n", __func__, addr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;s-&gt;lock, flags);</div><div class='add'>+	if (is_write)</div><div class='add'>+		memcpy(p, data, 4);</div><div class='add'>+	else</div><div class='add'>+		memcpy(data, p, 4);</div><div class='add'>+	spin_unlock_irqrestore(&amp;s-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_sw_status_access(struct kvm_device *dev,</div><div class='add'>+					struct kvm_device_attr *attr,</div><div class='add'>+					bool is_write, int *data)</div><div class='add'>+{</div><div class='add'>+	int addr, ret = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void *p = NULL;</div><div class='add'>+	struct loongarch_eiointc *s;</div><div class='add'>+</div><div class='add'>+	s = dev-&gt;kvm-&gt;arch.eiointc;</div><div class='add'>+	addr = attr-&gt;attr;</div><div class='add'>+	addr &amp;= 0xffff;</div><div class='add'>+</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU:</div><div class='add'>+		if (is_write)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		p = &amp;s-&gt;num_cpu;</div><div class='add'>+		break;</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE:</div><div class='add'>+		if (is_write)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		p = &amp;s-&gt;features;</div><div class='add'>+		break;</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE:</div><div class='add'>+		p = &amp;s-&gt;status;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown eiointc register, addr = %d\n", __func__, addr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;s-&gt;lock, flags);</div><div class='add'>+	if (is_write)</div><div class='add'>+		memcpy(p, data, 4);</div><div class='add'>+	else</div><div class='add'>+		memcpy(data, p, 4);</div><div class='add'>+	spin_unlock_irqrestore(&amp;s-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_get_attr(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	int ret, data;</div><div class='add'>+</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS:</div><div class='add'>+		ret = kvm_eiointc_regs_access(dev, attr, false, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (copy_to_user((void __user *)attr-&gt;addr, &amp;data, 4))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS:</div><div class='add'>+		ret = kvm_eiointc_sw_status_access(dev, attr, false, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (copy_to_user((void __user *)attr-&gt;addr, &amp;data, 4))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_set_attr(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	int data;</div><div class='add'>+</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL:</div><div class='add'>+		return kvm_eiointc_ctrl_access(dev, attr);</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS:</div><div class='add'>+		if (copy_from_user(&amp;data, (void __user *)attr-&gt;addr, 4))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		return kvm_eiointc_regs_access(dev, attr, true, &amp;data);</div><div class='add'>+	case KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS:</div><div class='add'>+		if (copy_from_user(&amp;data, (void __user *)attr-&gt;addr, 4))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		return kvm_eiointc_sw_status_access(dev, attr, true, &amp;data);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_eiointc_create(struct kvm_device *dev, u32 type)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct loongarch_eiointc *s;</div><div class='add'>+	struct kvm_io_device *device;</div><div class='add'>+	struct kvm *kvm = dev-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	/* eiointc has been created */</div><div class='add'>+	if (kvm-&gt;arch.eiointc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	s = kzalloc(sizeof(struct loongarch_eiointc), GFP_KERNEL);</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;s-&gt;lock);</div><div class='add'>+	s-&gt;kvm = kvm;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize IOCSR device</div><div class='add'>+	 */</div><div class='add'>+	device = &amp;s-&gt;device;</div><div class='add'>+	kvm_iodevice_init(device, &amp;kvm_eiointc_ops);</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	ret = kvm_io_bus_register_dev(kvm, KVM_IOCSR_BUS,</div><div class='add'>+			EIOINTC_BASE, EIOINTC_SIZE, device);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(s);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device = &amp;s-&gt;device_vext;</div><div class='add'>+	kvm_iodevice_init(device, &amp;kvm_eiointc_virt_ops);</div><div class='add'>+	ret = kvm_io_bus_register_dev(kvm, KVM_IOCSR_BUS,</div><div class='add'>+			EIOINTC_VIRT_BASE, EIOINTC_VIRT_SIZE, device);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &amp;s-&gt;device);</div><div class='add'>+		kfree(s);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	kvm-&gt;arch.eiointc = s;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_eiointc_destroy(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct loongarch_eiointc *eiointc;</div><div class='add'>+</div><div class='add'>+	if (!dev || !dev-&gt;kvm || !dev-&gt;kvm-&gt;arch.eiointc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm = dev-&gt;kvm;</div><div class='add'>+	eiointc = kvm-&gt;arch.eiointc;</div><div class='add'>+	kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &amp;eiointc-&gt;device);</div><div class='add'>+	kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &amp;eiointc-&gt;device_vext);</div><div class='add'>+	kfree(eiointc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_device_ops kvm_eiointc_dev_ops = {</div><div class='add'>+	.name = "kvm-loongarch-eiointc",</div><div class='add'>+	.create = kvm_eiointc_create,</div><div class='add'>+	.destroy = kvm_eiointc_destroy,</div><div class='add'>+	.set_attr = kvm_eiointc_set_attr,</div><div class='add'>+	.get_attr = kvm_eiointc_get_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_eiointc_device(void)</div><div class='add'>+{</div><div class='add'>+	return kvm_register_device_ops(&amp;kvm_eiointc_dev_ops, KVM_DEV_TYPE_LOONGARCH_EIOINTC);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c<br/>new file mode 100644<br/>index 000000000000..05cefd29282e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/intc/ipi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/intc/ipi.c</a></div><div class='hunk'>@@ -0,0 +1,475 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ipi.h&gt;</div><div class='add'>+#include &lt;asm/kvm_vcpu.h&gt;</div><div class='add'>+</div><div class='add'>+static void ipi_set(struct kvm_vcpu *vcpu, uint32_t data)</div><div class='add'>+{</div><div class='add'>+	uint32_t status;</div><div class='add'>+	struct kvm_interrupt irq;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	status = vcpu-&gt;arch.ipi_state.status;</div><div class='add'>+	vcpu-&gt;arch.ipi_state.status |= data;</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	if ((status == 0) &amp;&amp; data) {</div><div class='add'>+		irq.irq = LARCH_INT_IPI;</div><div class='add'>+		kvm_vcpu_ioctl_interrupt(vcpu, &amp;irq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipi_send(struct kvm *kvm, uint64_t data)</div><div class='add'>+{</div><div class='add'>+	int cpu;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	cpu = ((data &amp; 0xffffffff) &gt;&gt; 16) &amp; 0x3ff;</div><div class='add'>+	vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);</div><div class='add'>+	if (unlikely(vcpu == NULL)) {</div><div class='add'>+		kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipi_set(vcpu, BIT(data &amp; 0x1f));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipi_clear(struct kvm_vcpu *vcpu, uint64_t data)</div><div class='add'>+{</div><div class='add'>+	uint32_t status;</div><div class='add'>+	struct kvm_interrupt irq;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	vcpu-&gt;arch.ipi_state.status &amp;= ~data;</div><div class='add'>+	status = vcpu-&gt;arch.ipi_state.status;</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	if (status == 0) {</div><div class='add'>+		irq.irq = -LARCH_INT_IPI;</div><div class='add'>+		kvm_vcpu_ioctl_interrupt(vcpu, &amp;irq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static uint64_t read_mailbox(struct kvm_vcpu *vcpu, int offset, int len)</div><div class='add'>+{</div><div class='add'>+	uint64_t data = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	data = *(ulong *)((void *)vcpu-&gt;arch.ipi_state.buf + (offset - 0x20));</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+</div><div class='add'>+	switch (len) {</div><div class='add'>+	case 1:</div><div class='add'>+		return data &amp; 0xff;</div><div class='add'>+	case 2:</div><div class='add'>+		return data &amp; 0xffff;</div><div class='add'>+	case 4:</div><div class='add'>+		return data &amp; 0xffffffff;</div><div class='add'>+	case 8:</div><div class='add'>+		return data;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown data len: %d\n", __func__, len);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_mailbox(struct kvm_vcpu *vcpu, int offset, uint64_t data, int len)</div><div class='add'>+{</div><div class='add'>+	void *pbuf;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+	pbuf = (void *)vcpu-&gt;arch.ipi_state.buf + (offset - 0x20);</div><div class='add'>+</div><div class='add'>+	switch (len) {</div><div class='add'>+	case 1:</div><div class='add'>+		*(unsigned char *)pbuf = (unsigned char)data;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		*(unsigned short *)pbuf = (unsigned short)data;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		*(unsigned int *)pbuf = (unsigned int)data;</div><div class='add'>+		break;</div><div class='add'>+	case 8:</div><div class='add'>+		*(unsigned long *)pbuf = (unsigned long)data;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown data len: %d\n", __func__, len);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mail_send(struct kvm *kvm, uint64_t data)</div><div class='add'>+{</div><div class='add'>+	int i, cpu, mailbox, offset;</div><div class='add'>+	uint32_t val = 0, mask = 0;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	cpu = ((data &amp; 0xffffffff) &gt;&gt; 16) &amp; 0x3ff;</div><div class='add'>+	vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);</div><div class='add'>+	if (unlikely(vcpu == NULL)) {</div><div class='add'>+		kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	mailbox = ((data &amp; 0xffffffff) &gt;&gt; 2) &amp; 0x7;</div><div class='add'>+	offset = IOCSR_IPI_BUF_20 + mailbox * 4;</div><div class='add'>+	if ((data &gt;&gt; 27) &amp; 0xf) {</div><div class='add'>+		val = read_mailbox(vcpu, offset, 4);</div><div class='add'>+		for (i = 0; i &lt; 4; i++)</div><div class='add'>+			if (data &amp; (BIT(27 + i)))</div><div class='add'>+				mask |= (0xff &lt;&lt; (i * 8));</div><div class='add'>+		val &amp;= mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val |= ((uint32_t)(data &gt;&gt; 32) &amp; ~mask);</div><div class='add'>+	write_mailbox(vcpu, offset, val, 4);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)</div><div class='add'>+{</div><div class='add'>+	int i, idx, ret;</div><div class='add'>+	uint64_t val = 0, mask = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Bit 27-30 is mask for byte writing.</div><div class='add'>+	 * If the mask is 0, we need not to do anything.</div><div class='add'>+	 */</div><div class='add'>+	if ((data &gt;&gt; 27) &amp; 0xf) {</div><div class='add'>+		/* Read the old val */</div><div class='add'>+		idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+		ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, 4, &amp;val);</div><div class='add'>+		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+		if (unlikely(ret)) {</div><div class='add'>+			kvm_err("%s: : read data from addr %llx failed\n", __func__, addr);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		/* Construct the mask by scanning the bit 27-30 */</div><div class='add'>+		for (i = 0; i &lt; 4; i++) {</div><div class='add'>+			if (data &amp; (BIT(27 + i)))</div><div class='add'>+				mask |= (0xff &lt;&lt; (i * 8));</div><div class='add'>+		}</div><div class='add'>+		/* Save the old part of val */</div><div class='add'>+		val &amp;= mask;</div><div class='add'>+	}</div><div class='add'>+	val |= ((uint32_t)(data &gt;&gt; 32) &amp; ~mask);</div><div class='add'>+	idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+	ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, 4, &amp;val);</div><div class='add'>+	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		kvm_err("%s: : write data to addr %llx failed\n", __func__, addr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int any_send(struct kvm *kvm, uint64_t data)</div><div class='add'>+{</div><div class='add'>+	int cpu, offset;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	cpu = ((data &amp; 0xffffffff) &gt;&gt; 16) &amp; 0x3ff;</div><div class='add'>+	vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);</div><div class='add'>+	if (unlikely(vcpu == NULL)) {</div><div class='add'>+		kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	offset = data &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	return send_ipi_data(vcpu, offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_ipi_readl(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	uint32_t offset;</div><div class='add'>+	uint64_t res = 0;</div><div class='add'>+</div><div class='add'>+	offset = (uint32_t)(addr &amp; 0x1ff);</div><div class='add'>+	WARN_ON_ONCE(offset &amp; (len - 1));</div><div class='add'>+</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case IOCSR_IPI_STATUS:</div><div class='add'>+		spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		res = vcpu-&gt;arch.ipi_state.status;</div><div class='add'>+		spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_EN:</div><div class='add'>+		spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		res = vcpu-&gt;arch.ipi_state.en;</div><div class='add'>+		spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_SET:</div><div class='add'>+		res = 0;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_CLEAR:</div><div class='add'>+		res = 0;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_20 ... IOCSR_IPI_BUF_38 + 7:</div><div class='add'>+		if (offset + len &gt; IOCSR_IPI_BUF_38 + 8) {</div><div class='add'>+			kvm_err("%s: invalid offset or len: offset = %d, len = %d\n",</div><div class='add'>+				__func__, offset, len);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		res = read_mailbox(vcpu, offset, len);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown addr: %llx\n", __func__, addr);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	*(uint64_t *)val = res;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	uint64_t data;</div><div class='add'>+	uint32_t offset;</div><div class='add'>+</div><div class='add'>+	data = *(uint64_t *)val;</div><div class='add'>+</div><div class='add'>+	offset = (uint32_t)(addr &amp; 0x1ff);</div><div class='add'>+	WARN_ON_ONCE(offset &amp; (len - 1));</div><div class='add'>+</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case IOCSR_IPI_STATUS:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_EN:</div><div class='add'>+		spin_lock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		vcpu-&gt;arch.ipi_state.en = data;</div><div class='add'>+		spin_unlock(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_SET:</div><div class='add'>+		ipi_set(vcpu, data);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_CLEAR:</div><div class='add'>+		/* Just clear the status of the current vcpu */</div><div class='add'>+		ipi_clear(vcpu, data);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_20 ... IOCSR_IPI_BUF_38 + 7:</div><div class='add'>+		if (offset + len &gt; IOCSR_IPI_BUF_38 + 8) {</div><div class='add'>+			kvm_err("%s: invalid offset or len: offset = %d, len = %d\n",</div><div class='add'>+				__func__, offset, len);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		write_mailbox(vcpu, offset, data, len);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_SEND:</div><div class='add'>+		ipi_send(vcpu-&gt;kvm, data);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_MAIL_SEND:</div><div class='add'>+		ret = mail_send(vcpu-&gt;kvm, data);</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_ANY_SEND:</div><div class='add'>+		ret = any_send(vcpu-&gt;kvm, data);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown addr: %llx\n", __func__, addr);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_read(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;stat.ipi_read_exits++;</div><div class='add'>+	return loongarch_ipi_readl(vcpu, addr, len, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_write(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;stat.ipi_write_exits++;</div><div class='add'>+	return loongarch_ipi_writel(vcpu, addr, len, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct kvm_io_device_ops kvm_ipi_ops = {</div><div class='add'>+	.read	= kvm_ipi_read,</div><div class='add'>+	.write	= kvm_ipi_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_regs_access(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr,</div><div class='add'>+				bool is_write)</div><div class='add'>+{</div><div class='add'>+	int len = 4;</div><div class='add'>+	int cpu, addr;</div><div class='add'>+	uint64_t val;</div><div class='add'>+	void *p = NULL;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+	cpu = (attr-&gt;attr &gt;&gt; 16) &amp; 0x3ff;</div><div class='add'>+	addr = attr-&gt;attr &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	vcpu = kvm_get_vcpu_by_id(dev-&gt;kvm, cpu);</div><div class='add'>+	if (unlikely(vcpu == NULL)) {</div><div class='add'>+		kvm_err("%s: invalid target cpu: %d\n", __func__, cpu);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case IOCSR_IPI_STATUS:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.status;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_EN:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.en;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_SET:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.set;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_CLEAR:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.clear;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_20:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.buf[0];</div><div class='add'>+		len = 8;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_28:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.buf[1];</div><div class='add'>+		len = 8;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_30:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.buf[2];</div><div class='add'>+		len = 8;</div><div class='add'>+		break;</div><div class='add'>+	case IOCSR_IPI_BUF_38:</div><div class='add'>+		p = &amp;vcpu-&gt;arch.ipi_state.buf[3];</div><div class='add'>+		len = 8;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown ipi register, addr = %d\n", __func__, addr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_write) {</div><div class='add'>+		if (len == 4) {</div><div class='add'>+			if (get_user(val, (uint32_t __user *)attr-&gt;addr))</div><div class='add'>+				return -EFAULT;</div><div class='add'>+			*(uint32_t *)p = (uint32_t)val;</div><div class='add'>+		} else if (len == 8) {</div><div class='add'>+			if (get_user(val, (uint64_t __user *)attr-&gt;addr))</div><div class='add'>+				return -EFAULT;</div><div class='add'>+			*(uint64_t *)p = val;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (len == 4) {</div><div class='add'>+			val = *(uint32_t *)p;</div><div class='add'>+			return put_user(val, (uint32_t __user *)attr-&gt;addr);</div><div class='add'>+		} else if (len == 8) {</div><div class='add'>+			val = *(uint64_t *)p;</div><div class='add'>+			return put_user(val, (uint64_t __user *)attr-&gt;addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_get_attr(struct kvm_device *dev,</div><div class='add'>+			struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_IPI_GRP_REGS:</div><div class='add'>+		return kvm_ipi_regs_access(dev, attr, false);</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown group (%d)\n", __func__, attr-&gt;group);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_set_attr(struct kvm_device *dev,</div><div class='add'>+			struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_IPI_GRP_REGS:</div><div class='add'>+		return kvm_ipi_regs_access(dev, attr, true);</div><div class='add'>+	default:</div><div class='add'>+		kvm_err("%s: unknown group (%d)\n", __func__, attr-&gt;group);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_ipi_create(struct kvm_device *dev, u32 type)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct kvm_io_device *device;</div><div class='add'>+	struct loongarch_ipi *s;</div><div class='add'>+</div><div class='add'>+	if (!dev) {</div><div class='add'>+		kvm_err("%s: kvm_device ptr is invalid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm = dev-&gt;kvm;</div><div class='add'>+	if (kvm-&gt;arch.ipi) {</div><div class='add'>+		kvm_err("%s: LoongArch IPI has already been created!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s = kzalloc(sizeof(struct loongarch_ipi), GFP_KERNEL);</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;s-&gt;lock);</div><div class='add'>+	s-&gt;kvm = kvm;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize IOCSR device</div><div class='add'>+	 */</div><div class='add'>+	device = &amp;s-&gt;device;</div><div class='add'>+	kvm_iodevice_init(device, &amp;kvm_ipi_ops);</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	ret = kvm_io_bus_register_dev(kvm, KVM_IOCSR_BUS, IOCSR_IPI_BASE, IOCSR_IPI_SIZE, device);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kvm_err("%s: Initialize IOCSR dev failed, ret = %d\n", __func__, ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.ipi = s;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	kfree(s);</div><div class='add'>+	return -EFAULT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_ipi_destroy(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct loongarch_ipi *ipi;</div><div class='add'>+</div><div class='add'>+	if (!dev || !dev-&gt;kvm || !dev-&gt;kvm-&gt;arch.ipi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm = dev-&gt;kvm;</div><div class='add'>+	ipi = kvm-&gt;arch.ipi;</div><div class='add'>+	kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &amp;ipi-&gt;device);</div><div class='add'>+	kfree(ipi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_device_ops kvm_ipi_dev_ops = {</div><div class='add'>+	.name = "kvm-loongarch-ipi",</div><div class='add'>+	.create = kvm_ipi_create,</div><div class='add'>+	.destroy = kvm_ipi_destroy,</div><div class='add'>+	.set_attr = kvm_ipi_set_attr,</div><div class='add'>+	.get_attr = kvm_ipi_get_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_ipi_device(void)</div><div class='add'>+{</div><div class='add'>+	return kvm_register_device_ops(&amp;kvm_ipi_dev_ops, KVM_DEV_TYPE_LOONGARCH_IPI);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pch_pic.c<br/>new file mode 100644<br/>index 000000000000..a698a73de399<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/intc/pch_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/intc/pch_pic.c</a></div><div class='hunk'>@@ -0,0 +1,491 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/kvm_eiointc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pch_pic.h&gt;</div><div class='add'>+#include &lt;asm/kvm_vcpu.h&gt;</div><div class='add'>+#include &lt;linux/count_zeros.h&gt;</div><div class='add'>+</div><div class='add'>+/* update the isr according to irq level and route irq to eiointc */</div><div class='add'>+static void pch_pic_update_irq(struct loongarch_pch_pic *s, int irq, int level)</div><div class='add'>+{</div><div class='add'>+	u64 mask = BIT(irq);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * set isr and route irq to eiointc and</div><div class='add'>+	 * the route table is in htmsi_vector[]</div><div class='add'>+	 */</div><div class='add'>+	if (level) {</div><div class='add'>+		if (mask &amp; s-&gt;irr &amp; ~s-&gt;mask) {</div><div class='add'>+			s-&gt;isr |= mask;</div><div class='add'>+			irq = s-&gt;htmsi_vector[irq];</div><div class='add'>+			eiointc_set_irq(s-&gt;kvm-&gt;arch.eiointc, irq, level);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (mask &amp; s-&gt;isr &amp; ~s-&gt;irr) {</div><div class='add'>+			s-&gt;isr &amp;= ~mask;</div><div class='add'>+			irq = s-&gt;htmsi_vector[irq];</div><div class='add'>+			eiointc_set_irq(s-&gt;kvm-&gt;arch.eiointc, irq, level);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* update batch irqs, the irq_mask is a bitmap of irqs */</div><div class='add'>+static void pch_pic_update_batch_irqs(struct loongarch_pch_pic *s, u64 irq_mask, int level)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	DECLARE_BITMAP(irqs, 64) = { BITMAP_FROM_U64(irq_mask) };</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(irq, irqs, 64)</div><div class='add'>+		pch_pic_update_irq(s, irq, level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called when a irq is triggered in pch pic */</div><div class='add'>+void pch_pic_set_irq(struct loongarch_pch_pic *s, int irq, int level)</div><div class='add'>+{</div><div class='add'>+	u64 mask = BIT(irq);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;s-&gt;lock);</div><div class='add'>+	if (level)</div><div class='add'>+		s-&gt;irr |= mask; /* set irr */</div><div class='add'>+	else {</div><div class='add'>+		/*</div><div class='add'>+		 * In edge triggered mode, 0 does not mean to clear irq</div><div class='add'>+		 * The irr register variable is cleared when cpu writes to the</div><div class='add'>+		 * PCH_PIC_CLEAR_START address area</div><div class='add'>+		 */</div><div class='add'>+		if (s-&gt;edge &amp; mask) {</div><div class='add'>+			spin_unlock(&amp;s-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		s-&gt;irr &amp;= ~mask;</div><div class='add'>+	}</div><div class='add'>+	pch_pic_update_irq(s, irq, level);</div><div class='add'>+	spin_unlock(&amp;s-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* msi irq handler */</div><div class='add'>+void pch_msi_set_irq(struct kvm *kvm, int irq, int level)</div><div class='add'>+{</div><div class='add'>+	eiointc_set_irq(kvm-&gt;arch.eiointc, irq, level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = 0, offset;</div><div class='add'>+	u64 data = 0;</div><div class='add'>+	void *ptemp;</div><div class='add'>+</div><div class='add'>+	offset = addr - s-&gt;pch_pic_base;</div><div class='add'>+	offset -= offset &amp; 7;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;s-&gt;lock);</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case PCH_PIC_INT_ID_START ... PCH_PIC_INT_ID_END:</div><div class='add'>+		data = s-&gt;id.data;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_MASK_START ... PCH_PIC_MASK_END:</div><div class='add'>+		data = s-&gt;mask;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_EN_START ... PCH_PIC_HTMSI_EN_END:</div><div class='add'>+		/* read htmsi enable reg */</div><div class='add'>+		data = s-&gt;htmsi_en;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_EDGE_START ... PCH_PIC_EDGE_END:</div><div class='add'>+		/* read edge enable reg */</div><div class='add'>+		data = s-&gt;edge;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_AUTO_CTRL0_START ... PCH_PIC_AUTO_CTRL0_END:</div><div class='add'>+	case PCH_PIC_AUTO_CTRL1_START ... PCH_PIC_AUTO_CTRL1_END:</div><div class='add'>+		/* we only use default mode: fixed interrupt distribution mode */</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_ROUTE_ENTRY_START ... PCH_PIC_ROUTE_ENTRY_END:</div><div class='add'>+		/* only route to int0: eiointc */</div><div class='add'>+		ptemp = s-&gt;route_entry + (offset - PCH_PIC_ROUTE_ENTRY_START);</div><div class='add'>+		data = *(u64 *)ptemp;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_VEC_START ... PCH_PIC_HTMSI_VEC_END:</div><div class='add'>+		/* read htmsi vector */</div><div class='add'>+		ptemp = s-&gt;htmsi_vector + (offset - PCH_PIC_HTMSI_VEC_START);</div><div class='add'>+		data = *(u64 *)ptemp;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_POLARITY_START ... PCH_PIC_POLARITY_END:</div><div class='add'>+		data = s-&gt;polarity;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_INT_IRR_START:</div><div class='add'>+		data = s-&gt;irr;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_INT_ISR_START:</div><div class='add'>+		data = s-&gt;isr;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;s-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		offset = (addr - s-&gt;pch_pic_base) &amp; 7;</div><div class='add'>+		data = data &gt;&gt; (offset * 8);</div><div class='add'>+		memcpy(val, &amp;data, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_read(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, void *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct loongarch_pch_pic *s = vcpu-&gt;kvm-&gt;arch.pch_pic;</div><div class='add'>+</div><div class='add'>+	if (!s) {</div><div class='add'>+		kvm_err("%s: pch pic irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr &amp; (len - 1)) {</div><div class='add'>+		kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* statistics of pch pic reading */</div><div class='add'>+	vcpu-&gt;stat.pch_pic_read_exits++;</div><div class='add'>+	ret = loongarch_pch_pic_read(s, addr, len, val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongarch_pch_pic_write(struct loongarch_pch_pic *s, gpa_t addr,</div><div class='add'>+					int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	int ret = 0, offset;</div><div class='add'>+	u64 old, data, mask;</div><div class='add'>+	void *ptemp;</div><div class='add'>+</div><div class='add'>+	switch (len) {</div><div class='add'>+	case 1:</div><div class='add'>+		data = *(u8 *)val;</div><div class='add'>+		mask = 0xFF;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		data = *(u16 *)val;</div><div class='add'>+		mask = USHRT_MAX;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		data = *(u32 *)val;</div><div class='add'>+		mask = UINT_MAX;</div><div class='add'>+		break;</div><div class='add'>+	case 8:</div><div class='add'>+	default:</div><div class='add'>+		data = *(u64 *)val;</div><div class='add'>+		mask = ULONG_MAX;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = (addr - s-&gt;pch_pic_base) &amp; 7;</div><div class='add'>+	mask = mask &lt;&lt; (offset * 8);</div><div class='add'>+	data = data &lt;&lt; (offset * 8);</div><div class='add'>+	offset = (addr - s-&gt;pch_pic_base) - offset;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;s-&gt;lock);</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case PCH_PIC_MASK_START:</div><div class='add'>+		old = s-&gt;mask;</div><div class='add'>+		s-&gt;mask = (old &amp; ~mask) | data;</div><div class='add'>+		if (old &amp; ~data)</div><div class='add'>+			pch_pic_update_batch_irqs(s, old &amp; ~data, 1);</div><div class='add'>+		if (~old &amp; data)</div><div class='add'>+			pch_pic_update_batch_irqs(s, ~old &amp; data, 0);</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_EN_START:</div><div class='add'>+		s-&gt;htmsi_en = (s-&gt;htmsi_en &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_EDGE_START:</div><div class='add'>+		s-&gt;edge = (s-&gt;edge &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_POLARITY_START:</div><div class='add'>+		s-&gt;polarity = (s-&gt;polarity &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_CLEAR_START:</div><div class='add'>+		old = s-&gt;irr &amp; s-&gt;edge &amp; data;</div><div class='add'>+		if (old) {</div><div class='add'>+			s-&gt;irr &amp;= ~old;</div><div class='add'>+			pch_pic_update_batch_irqs(s, old, 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_VEC_START ... PCH_PIC_HTMSI_VEC_END:</div><div class='add'>+		ptemp = s-&gt;htmsi_vector + (offset - PCH_PIC_HTMSI_VEC_START);</div><div class='add'>+		*(u64 *)ptemp = (*(u64 *)ptemp &amp; ~mask) | data;</div><div class='add'>+		break;</div><div class='add'>+	/* Not implemented */</div><div class='add'>+	case PCH_PIC_AUTO_CTRL0_START:</div><div class='add'>+	case PCH_PIC_AUTO_CTRL1_START:</div><div class='add'>+	case PCH_PIC_ROUTE_ENTRY_START ... PCH_PIC_ROUTE_ENTRY_END:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;s-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_write(struct kvm_vcpu *vcpu,</div><div class='add'>+			struct kvm_io_device *dev,</div><div class='add'>+			gpa_t addr, int len, const void *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct loongarch_pch_pic *s = vcpu-&gt;kvm-&gt;arch.pch_pic;</div><div class='add'>+</div><div class='add'>+	if (!s) {</div><div class='add'>+		kvm_err("%s: pch pic irqchip not valid!\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr &amp; (len - 1)) {</div><div class='add'>+		kvm_err("%s: pch pic not aligned addr %llx len %d\n", __func__, addr, len);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* statistics of pch pic writing */</div><div class='add'>+	vcpu-&gt;stat.pch_pic_write_exits++;</div><div class='add'>+	ret = loongarch_pch_pic_write(s, addr, len, val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct kvm_io_device_ops kvm_pch_pic_ops = {</div><div class='add'>+	.read	= kvm_pch_pic_read,</div><div class='add'>+	.write	= kvm_pch_pic_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_init(struct kvm_device *dev, u64 addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct kvm *kvm = dev-&gt;kvm;</div><div class='add'>+	struct kvm_io_device *device;</div><div class='add'>+	struct loongarch_pch_pic *s = dev-&gt;kvm-&gt;arch.pch_pic;</div><div class='add'>+</div><div class='add'>+	s-&gt;pch_pic_base = addr;</div><div class='add'>+	device = &amp;s-&gt;device;</div><div class='add'>+	/* init device by pch pic writing and reading ops */</div><div class='add'>+	kvm_iodevice_init(device, &amp;kvm_pch_pic_ops);</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+	/* register pch pic device */</div><div class='add'>+	ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, addr, PCH_PIC_SIZE, device);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;slots_lock);</div><div class='add'>+</div><div class='add'>+	return (ret &lt; 0) ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* used by user space to get or set pch pic registers */</div><div class='add'>+static int kvm_pch_pic_regs_access(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr,</div><div class='add'>+				bool is_write)</div><div class='add'>+{</div><div class='add'>+	char buf[8];</div><div class='add'>+	int addr, offset, len = 8, ret = 0;</div><div class='add'>+	void __user *data;</div><div class='add'>+	void *p = NULL;</div><div class='add'>+	struct loongarch_pch_pic *s;</div><div class='add'>+</div><div class='add'>+	s = dev-&gt;kvm-&gt;arch.pch_pic;</div><div class='add'>+	addr = attr-&gt;attr;</div><div class='add'>+	data = (void __user *)attr-&gt;addr;</div><div class='add'>+</div><div class='add'>+	/* get pointer to pch pic register by addr */</div><div class='add'>+	switch (addr) {</div><div class='add'>+	case PCH_PIC_MASK_START:</div><div class='add'>+		p = &amp;s-&gt;mask;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_EN_START:</div><div class='add'>+		p = &amp;s-&gt;htmsi_en;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_EDGE_START:</div><div class='add'>+		p = &amp;s-&gt;edge;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_AUTO_CTRL0_START:</div><div class='add'>+		p = &amp;s-&gt;auto_ctrl0;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_AUTO_CTRL1_START:</div><div class='add'>+		p = &amp;s-&gt;auto_ctrl1;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_ROUTE_ENTRY_START ... PCH_PIC_ROUTE_ENTRY_END:</div><div class='add'>+		offset = addr - PCH_PIC_ROUTE_ENTRY_START;</div><div class='add'>+		p = &amp;s-&gt;route_entry[offset];</div><div class='add'>+		len = 1;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_HTMSI_VEC_START ... PCH_PIC_HTMSI_VEC_END:</div><div class='add'>+		offset = addr - PCH_PIC_HTMSI_VEC_START;</div><div class='add'>+		p = &amp;s-&gt;htmsi_vector[offset];</div><div class='add'>+		len = 1;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_INT_IRR_START:</div><div class='add'>+		p = &amp;s-&gt;irr;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_INT_ISR_START:</div><div class='add'>+		p = &amp;s-&gt;isr;</div><div class='add'>+		break;</div><div class='add'>+	case PCH_PIC_POLARITY_START:</div><div class='add'>+		p = &amp;s-&gt;polarity;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_write) {</div><div class='add'>+		if (copy_from_user(buf, data, len))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;s-&gt;lock);</div><div class='add'>+	if (is_write)</div><div class='add'>+		memcpy(p, buf, len);</div><div class='add'>+	else</div><div class='add'>+		memcpy(buf, p, len);</div><div class='add'>+	spin_unlock(&amp;s-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!is_write) {</div><div class='add'>+		if (copy_to_user(data, buf, len))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_get_attr(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_PCH_PIC_GRP_REGS:</div><div class='add'>+		return kvm_pch_pic_regs_access(dev, attr, false);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_set_attr(struct kvm_device *dev,</div><div class='add'>+				struct kvm_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	u64 addr;</div><div class='add'>+	void __user *uaddr = (void __user *)(long)attr-&gt;addr;</div><div class='add'>+</div><div class='add'>+	switch (attr-&gt;group) {</div><div class='add'>+	case KVM_DEV_LOONGARCH_PCH_PIC_GRP_CTRL:</div><div class='add'>+		switch (attr-&gt;attr) {</div><div class='add'>+		case KVM_DEV_LOONGARCH_PCH_PIC_CTRL_INIT:</div><div class='add'>+			if (copy_from_user(&amp;addr, uaddr, sizeof(addr)))</div><div class='add'>+				return -EFAULT;</div><div class='add'>+</div><div class='add'>+			if (!dev-&gt;kvm-&gt;arch.pch_pic) {</div><div class='add'>+				kvm_err("%s: please create pch_pic irqchip first!\n", __func__);</div><div class='add'>+				return -ENODEV;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			return kvm_pch_pic_init(dev, addr);</div><div class='add'>+		default:</div><div class='add'>+			kvm_err("%s: unknown group (%d) attr (%lld)\n", __func__, attr-&gt;group,</div><div class='add'>+					attr-&gt;attr);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	case KVM_DEV_LOONGARCH_PCH_PIC_GRP_REGS:</div><div class='add'>+		return kvm_pch_pic_regs_access(dev, attr, true);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_setup_default_irq_routing(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 nr = KVM_IRQCHIP_NUM_PINS;</div><div class='add'>+	struct kvm_irq_routing_entry *entries;</div><div class='add'>+</div><div class='add'>+	entries = kcalloc(nr, sizeof(*entries), GFP_KERNEL);</div><div class='add'>+	if (!entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr; i++) {</div><div class='add'>+		entries[i].gsi = i;</div><div class='add'>+		entries[i].type = KVM_IRQ_ROUTING_IRQCHIP;</div><div class='add'>+		entries[i].u.irqchip.irqchip = 0;</div><div class='add'>+		entries[i].u.irqchip.pin = i;</div><div class='add'>+	}</div><div class='add'>+	ret = kvm_set_irq_routing(kvm, entries, nr, 0);</div><div class='add'>+	kfree(entries);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_pch_pic_create(struct kvm_device *dev, u32 type)</div><div class='add'>+{</div><div class='add'>+	int i, ret, irq_num;</div><div class='add'>+	struct kvm *kvm = dev-&gt;kvm;</div><div class='add'>+	struct loongarch_pch_pic *s;</div><div class='add'>+</div><div class='add'>+	/* pch pic should not has been created */</div><div class='add'>+	if (kvm-&gt;arch.pch_pic)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = kvm_setup_default_irq_routing(kvm);</div><div class='add'>+	if (ret)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	s = kzalloc(sizeof(struct loongarch_pch_pic), GFP_KERNEL);</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupt controller identification register 1</div><div class='add'>+	 *   Bit 24-31 Interrupt Controller ID</div><div class='add'>+	 * Interrupt controller identification register 2</div><div class='add'>+	 *   Bit  0-7  Interrupt Controller version number</div><div class='add'>+	 *   Bit 16-23 The number of interrupt sources supported</div><div class='add'>+	 */</div><div class='add'>+	irq_num = 32;</div><div class='add'>+	s-&gt;mask = -1UL;</div><div class='add'>+	s-&gt;id.desc.id = PCH_PIC_INT_ID_VAL;</div><div class='add'>+	s-&gt;id.desc.version = PCH_PIC_INT_ID_VER;</div><div class='add'>+	s-&gt;id.desc.irq_num = irq_num - 1;</div><div class='add'>+	for (i = 0; i &lt; irq_num; i++) {</div><div class='add'>+		s-&gt;route_entry[i] = 1;</div><div class='add'>+		s-&gt;htmsi_vector[i] = i;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_init(&amp;s-&gt;lock);</div><div class='add'>+	s-&gt;kvm = kvm;</div><div class='add'>+	kvm-&gt;arch.pch_pic = s;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_pch_pic_destroy(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm;</div><div class='add'>+	struct loongarch_pch_pic *s;</div><div class='add'>+</div><div class='add'>+	if (!dev || !dev-&gt;kvm || !dev-&gt;kvm-&gt;arch.pch_pic)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm = dev-&gt;kvm;</div><div class='add'>+	s = kvm-&gt;arch.pch_pic;</div><div class='add'>+	/* unregister pch pic device and free it's memory */</div><div class='add'>+	kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &amp;s-&gt;device);</div><div class='add'>+	kfree(s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvm_device_ops kvm_pch_pic_dev_ops = {</div><div class='add'>+	.name = "kvm-loongarch-pch-pic",</div><div class='add'>+	.create = kvm_pch_pic_create,</div><div class='add'>+	.destroy = kvm_pch_pic_destroy,</div><div class='add'>+	.set_attr = kvm_pch_pic_set_attr,</div><div class='add'>+	.get_attr = kvm_pch_pic_get_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_loongarch_register_pch_pic_device(void)</div><div class='add'>+{</div><div class='add'>+	return kvm_register_device_ops(&amp;kvm_pch_pic_dev_ops, KVM_DEV_TYPE_LOONGARCH_PCHPIC);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kvm/interrupt.c b/arch/loongarch/kvm/interrupt.c<br/>index 4c3f22de4b40..8462083f0301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/interrupt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/interrupt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/interrupt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/interrupt.c</a></div><div class='hunk'>@@ -83,28 +83,11 @@ void kvm_deliver_intr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	unsigned long *pending = &amp;vcpu-&gt;arch.irq_pending;</div><div class='ctx'> 	unsigned long *pending_clr = &amp;vcpu-&gt;arch.irq_clear;</div><div class='ctx'> </div><div class='del'>-	if (!(*pending) &amp;&amp; !(*pending_clr))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (*pending_clr) {</div><div class='del'>-		priority = __ffs(*pending_clr);</div><div class='del'>-		while (priority &lt;= INT_IPI) {</div><div class='del'>-			kvm_irq_clear(vcpu, priority);</div><div class='del'>-			priority = find_next_bit(pending_clr,</div><div class='del'>-					BITS_PER_BYTE * sizeof(*pending_clr),</div><div class='del'>-					priority + 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for_each_set_bit(priority, pending_clr, INT_IPI + 1)</div><div class='add'>+		kvm_irq_clear(vcpu, priority);</div><div class='ctx'> </div><div class='del'>-	if (*pending) {</div><div class='del'>-		priority = __ffs(*pending);</div><div class='del'>-		while (priority &lt;= INT_IPI) {</div><div class='del'>-			kvm_irq_deliver(vcpu, priority);</div><div class='del'>-			priority = find_next_bit(pending,</div><div class='del'>-					BITS_PER_BYTE * sizeof(*pending),</div><div class='del'>-					priority + 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for_each_set_bit(priority, pending, INT_IPI + 1)</div><div class='add'>+		kvm_irq_deliver(vcpu, priority);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_pending_timer(struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/loongarch/kvm/irqfd.c b/arch/loongarch/kvm/irqfd.c<br/>new file mode 100644<br/>index 000000000000..9a39627aecf0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/irqfd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/irqfd.c</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;trace/events/kvm.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pch_pic.h&gt;</div><div class='add'>+</div><div class='add'>+static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,</div><div class='add'>+		struct kvm *kvm, int irq_source_id, int level, bool line_status)</div><div class='add'>+{</div><div class='add'>+	/* PCH-PIC pin (0 ~ 64) &lt;---&gt; GSI (0 ~ 64) */</div><div class='add'>+	pch_pic_set_irq(kvm-&gt;arch.pch_pic, e-&gt;irqchip.pin, level);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * kvm_set_msi: inject the MSI corresponding to the</div><div class='add'>+ * MSI routing entry</div><div class='add'>+ *</div><div class='add'>+ * This is the entry point for irqfd MSI injection</div><div class='add'>+ * and userspace MSI injection.</div><div class='add'>+ */</div><div class='add'>+int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,</div><div class='add'>+		struct kvm *kvm, int irq_source_id, int level, bool line_status)</div><div class='add'>+{</div><div class='add'>+	if (!level)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	pch_msi_set_irq(kvm, e-&gt;msi.data, level);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * kvm_set_routing_entry: populate a kvm routing entry</div><div class='add'>+ * from a user routing entry</div><div class='add'>+ *</div><div class='add'>+ * @kvm: the VM this entry is applied to</div><div class='add'>+ * @e: kvm kernel routing entry handle</div><div class='add'>+ * @ue: user api routing entry handle</div><div class='add'>+ * return 0 on success, -EINVAL on errors.</div><div class='add'>+ */</div><div class='add'>+int kvm_set_routing_entry(struct kvm *kvm,</div><div class='add'>+			struct kvm_kernel_irq_routing_entry *e,</div><div class='add'>+			const struct kvm_irq_routing_entry *ue)</div><div class='add'>+{</div><div class='add'>+	switch (ue-&gt;type) {</div><div class='add'>+	case KVM_IRQ_ROUTING_IRQCHIP:</div><div class='add'>+		e-&gt;set = kvm_set_pic_irq;</div><div class='add'>+		e-&gt;irqchip.irqchip = ue-&gt;u.irqchip.irqchip;</div><div class='add'>+		e-&gt;irqchip.pin = ue-&gt;u.irqchip.pin;</div><div class='add'>+</div><div class='add'>+		if (e-&gt;irqchip.pin &gt;= KVM_IRQCHIP_NUM_PINS)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	case KVM_IRQ_ROUTING_MSI:</div><div class='add'>+		e-&gt;set = kvm_set_msi;</div><div class='add'>+		e-&gt;msi.address_lo = ue-&gt;u.msi.address_lo;</div><div class='add'>+		e-&gt;msi.address_hi = ue-&gt;u.msi.address_hi;</div><div class='add'>+		e-&gt;msi.data = ue-&gt;u.msi.data;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,</div><div class='add'>+		struct kvm *kvm, int irq_source_id, int level, bool line_status)</div><div class='add'>+{</div><div class='add'>+	switch (e-&gt;type) {</div><div class='add'>+	case KVM_IRQ_ROUTING_IRQCHIP:</div><div class='add'>+		pch_pic_set_irq(kvm-&gt;arch.pch_pic, e-&gt;irqchip.pin, level);</div><div class='add'>+		return 0;</div><div class='add'>+	case KVM_IRQ_ROUTING_MSI:</div><div class='add'>+		pch_msi_set_irq(kvm, e-&gt;msi.data, level);</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EWOULDBLOCK;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool kvm_arch_intc_initialized(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_arch_irqchip_in_kernel(kvm);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c<br/>index 27e9b94c0a0b..80ea63d465b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/main.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/main.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/main.c</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_csr.h&gt;</div><div class='add'>+#include &lt;asm/kvm_eiointc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pch_pic.h&gt;</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> </div><div class='ctx'> unsigned long vpid_mask;</div><div class='hunk'>@@ -243,6 +245,24 @@ void kvm_check_vpid(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		trace_kvm_vpid_change(vcpu, vcpu-&gt;arch.vpid);</div><div class='ctx'> 		vcpu-&gt;cpu = cpu;</div><div class='ctx'> 		kvm_clear_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LLBCTL is a separated guest CSR register from host, a general</div><div class='add'>+		 * exception ERET instruction clears the host LLBCTL register in</div><div class='add'>+		 * host mode, and clears the guest LLBCTL register in guest mode.</div><div class='add'>+		 * ERET in tlb refill exception does not clear LLBCTL register.</div><div class='add'>+		 *</div><div class='add'>+		 * When secondary mmu mapping is changed, guest OS does not know</div><div class='add'>+		 * even if the content is changed after mapping is changed.</div><div class='add'>+		 *</div><div class='add'>+		 * Here clear WCLLB of the guest LLBCTL register when mapping is</div><div class='add'>+		 * changed. Otherwise, if mmu mapping is changed while guest is</div><div class='add'>+		 * executing LL/SC pair, LL loads with the old address and set</div><div class='add'>+		 * the LLBCTL flag, SC checks the LLBCTL flag and will store the</div><div class='add'>+		 * new address successfully since LLBCTL_WCLLB is on, even if</div><div class='add'>+		 * memory with new address is changed on other VCPUs.</div><div class='add'>+		 */</div><div class='add'>+		set_gcsr_llbctl(CSR_LLBCTL_WCLLB);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Restore GSTAT(0x50).vpid */</div><div class='hunk'>@@ -276,16 +296,16 @@ int kvm_arch_enable_virtualization_cpu(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable virtualization features granting guest direct control of</div><div class='ctx'> 	 * certain features:</div><div class='del'>-	 * GCI=2:       Trap on init or unimplement cache instruction.</div><div class='add'>+	 * GCI=2:       Trap on init or unimplemented cache instruction.</div><div class='ctx'> 	 * TORU=0:      Trap on Root Unimplement.</div><div class='ctx'> 	 * CACTRL=1:    Root control cache.</div><div class='del'>-	 * TOP=0:       Trap on Previlege.</div><div class='add'>+	 * TOP=0:       Trap on Privilege.</div><div class='ctx'> 	 * TOE=0:       Trap on Exception.</div><div class='ctx'> 	 * TIT=0:       Trap on Timer.</div><div class='ctx'> 	 */</div><div class='del'>-	if (env &amp; CSR_GCFG_GCIP_ALL)</div><div class='add'>+	if (env &amp; CSR_GCFG_GCIP_SECURE)</div><div class='ctx'> 		gcfg |= CSR_GCFG_GCI_SECURE;</div><div class='del'>-	if (env &amp; CSR_GCFG_MATC_ROOT)</div><div class='add'>+	if (env &amp; CSR_GCFG_MATP_ROOT)</div><div class='ctx'> 		gcfg |= CSR_GCFG_MATC_ROOT;</div><div class='ctx'> </div><div class='ctx'> 	write_csr_gcfg(gcfg);</div><div class='hunk'>@@ -297,6 +317,13 @@ int kvm_arch_enable_virtualization_cpu(void)</div><div class='ctx'> 	kvm_debug("GCFG:%lx GSTAT:%lx GINTC:%lx GTLBC:%lx",</div><div class='ctx'> 		  read_csr_gcfg(), read_csr_gstat(), read_csr_gintc(), read_csr_gtlbc());</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * HW Guest CSR registers are lost after CPU suspend and resume.</div><div class='add'>+	 * Clear last_vcpu so that Guest CSR registers forced to reload</div><div class='add'>+	 * from vCPU SW state.</div><div class='add'>+	 */</div><div class='add'>+	this_cpu_ptr(vmcs)-&gt;last_vcpu = NULL;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -313,7 +340,7 @@ void kvm_arch_disable_virtualization_cpu(void)</div><div class='ctx'> </div><div class='ctx'> static int kvm_loongarch_env_init(void)</div><div class='ctx'> {</div><div class='del'>-	int cpu, order;</div><div class='add'>+	int cpu, order, ret;</div><div class='ctx'> 	void *addr;</div><div class='ctx'> 	struct kvm_context *context;</div><div class='ctx'> </div><div class='hunk'>@@ -367,8 +394,22 @@ static int kvm_loongarch_env_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvm_init_gcsr_flag();</div><div class='add'>+	kvm_register_perf_callbacks(NULL);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Register LoongArch IPI interrupt controller interface. */</div><div class='add'>+	ret = kvm_loongarch_register_ipi_device();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Register LoongArch EIOINTC interrupt controller interface. */</div><div class='add'>+	ret = kvm_loongarch_register_eiointc_device();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Register LoongArch PCH-PIC interrupt controller interface. */</div><div class='add'>+	ret = kvm_loongarch_register_pch_pic_device();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_loongarch_env_exit(void)</div><div class='hunk'>@@ -385,6 +426,8 @@ static void kvm_loongarch_env_exit(void)</div><div class='ctx'> 		}</div><div class='ctx'> 		kfree(kvm_loongarch_ops);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_unregister_perf_callbacks();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvm_loongarch_init(void)</div><div class='head'>diff --git a/arch/loongarch/kvm/mmu.c b/arch/loongarch/kvm/mmu.c<br/>index 28681dfb4b85..7c8143e79c12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/mmu.c</a></div><div class='hunk'>@@ -552,12 +552,10 @@ bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)</div><div class='ctx'> static int kvm_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	kvm_pfn_t pfn = 0;</div><div class='ctx'> 	kvm_pte_t *ptep, changed, new;</div><div class='ctx'> 	gfn_t gfn = gpa &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='del'>-	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -570,10 +568,8 @@ static int kvm_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa, bool writ</div><div class='ctx'> </div><div class='ctx'> 	/* Track access to pages marked old */</div><div class='ctx'> 	new = kvm_pte_mkyoung(*ptep);</div><div class='del'>-	/* call kvm_set_pfn_accessed() after unlock */</div><div class='del'>-</div><div class='ctx'> 	if (write &amp;&amp; !kvm_pte_dirty(new)) {</div><div class='del'>-		if (!kvm_pte_write(new)) {</div><div class='add'>+		if (!kvm_pte_writeable(new)) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -595,26 +591,14 @@ static int kvm_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa, bool writ</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	changed = new ^ (*ptep);</div><div class='del'>-	if (changed) {</div><div class='add'>+	if (changed)</div><div class='ctx'> 		kvm_set_pte(ptep, new);</div><div class='del'>-		pfn = kvm_pte_pfn(new);</div><div class='del'>-		page = kvm_pfn_to_refcounted_page(pfn);</div><div class='del'>-		if (page)</div><div class='del'>-			get_page(page);</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='del'>-	if (changed) {</div><div class='del'>-		if (kvm_pte_young(changed))</div><div class='del'>-			kvm_set_pfn_accessed(pfn);</div><div class='add'>+	if (kvm_pte_dirty(changed))</div><div class='add'>+		mark_page_dirty(kvm, gfn);</div><div class='ctx'> </div><div class='del'>-		if (kvm_pte_dirty(changed)) {</div><div class='del'>-			mark_page_dirty(kvm, gfn);</div><div class='del'>-			kvm_set_pfn_dirty(pfn);</div><div class='del'>-		}</div><div class='del'>-		if (page)</div><div class='del'>-			put_page(page);</div><div class='del'>-	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='hunk'>@@ -796,6 +780,7 @@ static int kvm_map_page(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	struct kvm_mmu_memory_cache *memcache = &amp;vcpu-&gt;arch.mmu_page_cache;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	/* Try the fast path to handle old / clean pages */</div><div class='ctx'> 	srcu_idx = srcu_read_lock(&amp;kvm-&gt;srcu);</div><div class='hunk'>@@ -823,7 +808,7 @@ retry:</div><div class='ctx'> 	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure the read of mmu_invalidate_seq isn't reordered with PTE reads in</div><div class='del'>-	 * gfn_to_pfn_prot() (which calls get_user_pages()), so that we don't</div><div class='add'>+	 * kvm_faultin_pfn() (which calls get_user_pages()), so that we don't</div><div class='ctx'> 	 * risk the page we get a reference to getting unmapped before we have a</div><div class='ctx'> 	 * chance to grab the mmu_lock without mmu_invalidate_retry() noticing.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -835,7 +820,7 @@ retry:</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> </div><div class='ctx'> 	/* Slow path - ask KVM core whether we can access this GPA */</div><div class='del'>-	pfn = gfn_to_pfn_prot(kvm, gfn, write, &amp;writeable);</div><div class='add'>+	pfn = kvm_faultin_pfn(vcpu, gfn, write, &amp;writeable, &amp;page);</div><div class='ctx'> 	if (is_error_noslot_pfn(pfn)) {</div><div class='ctx'> 		err = -EFAULT;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -847,10 +832,10 @@ retry:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This can happen when mappings are changed asynchronously, but</div><div class='ctx'> 		 * also synchronously if a COW is triggered by</div><div class='del'>-		 * gfn_to_pfn_prot().</div><div class='add'>+		 * kvm_faultin_pfn().</div><div class='ctx'> 		 */</div><div class='ctx'> 		spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		kvm_release_pfn_clean(pfn);</div><div class='add'>+		kvm_release_page_unused(page);</div><div class='ctx'> 		if (retry_no &gt; 100) {</div><div class='ctx'> 			retry_no = 0;</div><div class='ctx'> 			schedule();</div><div class='hunk'>@@ -871,9 +856,9 @@ retry:</div><div class='ctx'> 		prot_bits |= _CACHE_SUC;</div><div class='ctx'> </div><div class='ctx'> 	if (writeable) {</div><div class='del'>-		prot_bits |= _PAGE_WRITE;</div><div class='add'>+		prot_bits = kvm_pte_mkwriteable(prot_bits);</div><div class='ctx'> 		if (write)</div><div class='del'>-			prot_bits |= __WRITEABLE;</div><div class='add'>+			prot_bits = kvm_pte_mkdirty(prot_bits);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable dirty logging on HugePages */</div><div class='hunk'>@@ -915,20 +900,19 @@ retry:</div><div class='ctx'> 	else</div><div class='ctx'> 		++kvm-&gt;stat.pages;</div><div class='ctx'> 	kvm_set_pte(ptep, new_pte);</div><div class='add'>+</div><div class='add'>+	kvm_release_faultin_page(kvm, page, false, writeable);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='del'>-	if (prot_bits &amp; _PAGE_DIRTY) {</div><div class='add'>+	if (kvm_pte_dirty(prot_bits))</div><div class='ctx'> 		mark_page_dirty_in_slot(kvm, memslot, gfn);</div><div class='del'>-		kvm_set_pfn_dirty(pfn);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='ctx'> out:</div><div class='ctx'> 	srcu_read_unlock(&amp;kvm-&gt;srcu, srcu_idx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='add'>+int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -937,8 +921,17 @@ int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate this entry in the TLB */</div><div class='del'>-	vcpu-&gt;arch.flush_gpa = gpa;</div><div class='del'>-	kvm_make_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);</div><div class='add'>+	if (!cpu_has_ptw || (ecode == EXCCODE_TLBM)) {</div><div class='add'>+		/*</div><div class='add'>+		 * With HW PTW, invalid TLB is not added when page fault. But</div><div class='add'>+		 * for EXCCODE_TLBM exception, stale TLB may exist because of</div><div class='add'>+		 * the last read access.</div><div class='add'>+		 *</div><div class='add'>+		 * With SW PTW, invalid TLB is added in TLB refill exception.</div><div class='add'>+		 */</div><div class='add'>+		vcpu-&gt;arch.flush_gpa = gpa;</div><div class='add'>+		kvm_make_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/switch.S b/arch/loongarch/kvm/switch.S<br/>index 0c292f818492..f1768b7a6194 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/switch.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/switch.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/switch.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/switch.S</a></div><div class='hunk'>@@ -60,16 +60,8 @@</div><div class='ctx'> 	ld.d	t0, a2, KVM_ARCH_GPC</div><div class='ctx'> 	csrwr	t0, LOONGARCH_CSR_ERA</div><div class='ctx'> </div><div class='del'>-	/* Save host PGDL */</div><div class='del'>-	csrrd	t0, LOONGARCH_CSR_PGDL</div><div class='del'>-	st.d	t0, a2, KVM_ARCH_HPGD</div><div class='del'>-</div><div class='del'>-	/* Switch to kvm */</div><div class='del'>-	ld.d	t1, a2, KVM_VCPU_KVM - KVM_VCPU_ARCH</div><div class='del'>-</div><div class='del'>-	/* Load guest PGDL */</div><div class='del'>-	li.w    t0, KVM_GPGD</div><div class='del'>-	ldx.d   t0, t1, t0</div><div class='add'>+	/* Load PGD for KVM hypervisor */</div><div class='add'>+	ld.d	t0, a2, KVM_ARCH_KVMPGD</div><div class='ctx'> 	csrwr	t0, LOONGARCH_CSR_PGDL</div><div class='ctx'> </div><div class='ctx'> 	/* Mix GID and RID */</div><div class='hunk'>@@ -85,7 +77,7 @@</div><div class='ctx'> 	 * Guest CRMD comes from separate GCSR_CRMD register</div><div class='ctx'> 	 */</div><div class='ctx'> 	ori	t0, zero, CSR_PRMD_PIE</div><div class='del'>-	csrxchg	t0, t0,   LOONGARCH_CSR_PRMD</div><div class='add'>+	csrwr	t0, LOONGARCH_CSR_PRMD</div><div class='ctx'> </div><div class='ctx'> 	/* Set PVM bit to setup ertn to guest context */</div><div class='ctx'> 	ori	t0, zero, CSR_GSTAT_PVM</div><div class='head'>diff --git a/arch/loongarch/kvm/timer.c b/arch/loongarch/kvm/timer.c<br/>index 74a4b5c272d6..32dc213374be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/timer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/timer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/timer.c</a></div><div class='hunk'>@@ -161,10 +161,11 @@ static void _kvm_save_timer(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (kvm_vcpu_is_blocking(vcpu)) {</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * HRTIMER_MODE_PINNED is suggested since vcpu may run in</div><div class='del'>-		 * the same physical cpu in next time</div><div class='add'>+		 * HRTIMER_MODE_PINNED_HARD is suggested since vcpu may run in</div><div class='add'>+		 * the same physical cpu in next time, and the timer should run</div><div class='add'>+		 * in hardirq context even in the PREEMPT_RT case.</div><div class='ctx'> 		 */</div><div class='del'>-		hrtimer_start(&amp;vcpu-&gt;arch.swtimer, expire, HRTIMER_MODE_ABS_PINNED);</div><div class='add'>+		hrtimer_start(&amp;vcpu-&gt;arch.swtimer, expire, HRTIMER_MODE_ABS_PINNED_HARD);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kvm/trace.h b/arch/loongarch/kvm/trace.h<br/>index 1783397b1bc8..3467ee22b704 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/trace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/trace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/trace.h</a></div><div class='hunk'>@@ -46,11 +46,15 @@ DEFINE_EVENT(kvm_transition, kvm_out,</div><div class='ctx'> /* Further exit reasons */</div><div class='ctx'> #define KVM_TRACE_EXIT_IDLE		64</div><div class='ctx'> #define KVM_TRACE_EXIT_CACHE		65</div><div class='add'>+#define KVM_TRACE_EXIT_CPUCFG		66</div><div class='add'>+#define KVM_TRACE_EXIT_CSR		67</div><div class='ctx'> </div><div class='ctx'> /* Tracepoints for VM exits */</div><div class='ctx'> #define kvm_trace_symbol_exit_types			\</div><div class='ctx'> 	{ KVM_TRACE_EXIT_IDLE,		"IDLE" },	\</div><div class='del'>-	{ KVM_TRACE_EXIT_CACHE,		"CACHE" }</div><div class='add'>+	{ KVM_TRACE_EXIT_CACHE,		"CACHE" },	\</div><div class='add'>+	{ KVM_TRACE_EXIT_CPUCFG,	"CPUCFG" },	\</div><div class='add'>+	{ KVM_TRACE_EXIT_CSR,		"CSR" }</div><div class='ctx'> </div><div class='ctx'> DECLARE_EVENT_CLASS(kvm_exit,</div><div class='ctx'> 	    TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),</div><div class='hunk'>@@ -82,6 +86,14 @@ DEFINE_EVENT(kvm_exit, kvm_exit_cache,</div><div class='ctx'> 	     TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),</div><div class='ctx'> 	     TP_ARGS(vcpu, reason));</div><div class='ctx'> </div><div class='add'>+DEFINE_EVENT(kvm_exit, kvm_exit_cpucfg,</div><div class='add'>+	     TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),</div><div class='add'>+	     TP_ARGS(vcpu, reason));</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(kvm_exit, kvm_exit_csr,</div><div class='add'>+	     TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),</div><div class='add'>+	     TP_ARGS(vcpu, reason));</div><div class='add'>+</div><div class='ctx'> DEFINE_EVENT(kvm_exit, kvm_exit,</div><div class='ctx'> 	     TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),</div><div class='ctx'> 	     TP_ARGS(vcpu, reason));</div><div class='hunk'>@@ -149,6 +161,41 @@ TRACE_EVENT(kvm_aux,</div><div class='ctx'> 		      __entry-&gt;pc)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='add'>+#define KVM_TRACE_IOCSR_READ_UNSATISFIED 0</div><div class='add'>+#define KVM_TRACE_IOCSR_READ 1</div><div class='add'>+#define KVM_TRACE_IOCSR_WRITE 2</div><div class='add'>+</div><div class='add'>+#define kvm_trace_symbol_iocsr \</div><div class='add'>+	{ KVM_TRACE_IOCSR_READ_UNSATISFIED, "unsatisfied-read" }, \</div><div class='add'>+	{ KVM_TRACE_IOCSR_READ, "read" }, \</div><div class='add'>+	{ KVM_TRACE_IOCSR_WRITE, "write" }</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(kvm_iocsr,</div><div class='add'>+	TP_PROTO(int type, int len, u64 gpa, void *val),</div><div class='add'>+	TP_ARGS(type, len, gpa, val),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__field(	u32,	type	)</div><div class='add'>+		__field(	u32,	len	)</div><div class='add'>+		__field(	u64,	gpa	)</div><div class='add'>+		__field(	u64,	val	)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__entry-&gt;type		= type;</div><div class='add'>+		__entry-&gt;len		= len;</div><div class='add'>+		__entry-&gt;gpa		= gpa;</div><div class='add'>+		__entry-&gt;val		= 0;</div><div class='add'>+		if (val)</div><div class='add'>+			memcpy(&amp;__entry-&gt;val, val,</div><div class='add'>+			       min_t(u32, sizeof(__entry-&gt;val), len));</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("iocsr %s len %u gpa 0x%llx val 0x%llx",</div><div class='add'>+		  __print_symbolic(__entry-&gt;type, kvm_trace_symbol_iocsr),</div><div class='add'>+		  __entry-&gt;len, __entry-&gt;gpa, __entry-&gt;val)</div><div class='add'>+);</div><div class='add'>+</div><div class='ctx'> TRACE_EVENT(kvm_vpid_change,</div><div class='ctx'> 	    TP_PROTO(struct kvm_vcpu *vcpu, unsigned long vpid),</div><div class='ctx'> 	    TP_ARGS(vcpu, vpid),</div><div class='head'>diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c<br/>index 0697b1064251..30e3b089a596 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/vcpu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/vcpu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/vcpu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/vcpu.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='del'>-#include &lt;linux/entry-kvm.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/lbt.h&gt;</div><div class='ctx'> #include &lt;asm/loongarch.h&gt;</div><div class='hunk'>@@ -20,7 +19,13 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {</div><div class='ctx'> 	STATS_DESC_COUNTER(VCPU, idle_exits),</div><div class='ctx'> 	STATS_DESC_COUNTER(VCPU, cpucfg_exits),</div><div class='ctx'> 	STATS_DESC_COUNTER(VCPU, signal_exits),</div><div class='del'>-	STATS_DESC_COUNTER(VCPU, hypercall_exits)</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, hypercall_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, ipi_read_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, ipi_write_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, eiointc_read_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, eiointc_write_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, pch_pic_read_exits),</div><div class='add'>+	STATS_DESC_COUNTER(VCPU, pch_pic_write_exits)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct kvm_stats_header kvm_vcpu_stats_header = {</div><div class='hunk'>@@ -240,16 +245,18 @@ static void kvm_late_check_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'>  */</div><div class='ctx'> static int kvm_enter_guest_check(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int idx, ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check conditions before entering the guest</div><div class='ctx'> 	 */</div><div class='del'>-	ret = xfer_to_guest_mode_handle_work(vcpu);</div><div class='add'>+	ret = kvm_xfer_to_guest_mode_handle_work(vcpu);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='ctx'> 	ret = kvm_check_requests(vcpu);</div><div class='add'>+	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -292,6 +299,7 @@ static int kvm_pre_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu-&gt;arch.aux_inuse &amp;= ~KVM_LARCH_SWCSR_LATEST;</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_request_pending(vcpu) || xfer_to_guest_mode_work_pending()) {</div><div class='add'>+			kvm_lose_pmu(vcpu);</div><div class='ctx'> 			/* make sure the vcpu mode has been written */</div><div class='ctx'> 			smp_store_mb(vcpu-&gt;mode, OUTSIDE_GUEST_MODE);</div><div class='ctx'> 			local_irq_enable();</div><div class='hunk'>@@ -309,7 +317,7 @@ static int kvm_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = RESUME_GUEST;</div><div class='ctx'> 	unsigned long estat = vcpu-&gt;arch.host_estat;</div><div class='del'>-	u32 intr = estat &amp; 0x1fff; /* Ignore NMI */</div><div class='add'>+	u32 intr = estat &amp; CSR_ESTAT_IS;</div><div class='ctx'> 	u32 ecode = (estat &amp; CSR_ESTAT_EXC) &gt;&gt; CSR_ESTAT_EXC_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;mode = OUTSIDE_GUEST_MODE;</div><div class='hunk'>@@ -359,6 +367,34 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	preempt_disable();</div><div class='add'>+	val = gcsr_read(LOONGARCH_CSR_CRMD);</div><div class='add'>+	preempt_enable();</div><div class='add'>+</div><div class='add'>+	return (val &amp; CSR_PRMD_PPLV) == PLV_KERN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_GUEST_PERF_EVENTS</div><div class='add'>+unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu-&gt;arch.pc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event,</div><div class='add'>+ * arrived in guest context.  For LoongArch64, if PMU is not passthrough to VM,</div><div class='add'>+ * any event that arrives while a vCPU is loaded is considered to be "in guest".</div><div class='add'>+ */</div><div class='add'>+bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (vcpu &amp;&amp; !(vcpu-&gt;arch.aux_inuse &amp; KVM_LARCH_PMU));</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+bool kvm_arch_vcpu_preempted_in_kernel(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -643,6 +679,8 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)</div><div class='ctx'> 			*v |= CPUCFG2_ARMBT;</div><div class='ctx'> 		if (cpu_has_lbt_mips)</div><div class='ctx'> 			*v |= CPUCFG2_MIPSBT;</div><div class='add'>+		if (cpu_has_ptw)</div><div class='add'>+			*v |= CPUCFG2_PTW;</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case LOONGARCH_CPUCFG3:</div><div class='hunk'>@@ -872,6 +910,13 @@ static int kvm_set_one_reg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			vcpu-&gt;arch.st.guest_addr = 0;</div><div class='ctx'> 			memset(&amp;vcpu-&gt;arch.irq_pending, 0, sizeof(vcpu-&gt;arch.irq_pending));</div><div class='ctx'> 			memset(&amp;vcpu-&gt;arch.irq_clear, 0, sizeof(vcpu-&gt;arch.irq_clear));</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * When vCPU reset, clear the ESTAT and GINTC registers</div><div class='add'>+			 * Other CSR registers are cleared with function _kvm_setcsr().</div><div class='add'>+			 */</div><div class='add'>+			kvm_write_sw_gcsr(vcpu-&gt;arch.csr, LOONGARCH_CSR_GINTC, 0);</div><div class='add'>+			kvm_write_sw_gcsr(vcpu-&gt;arch.csr, LOONGARCH_CSR_ESTAT, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ret = -EINVAL;</div><div class='hunk'>@@ -1239,9 +1284,11 @@ int kvm_own_lbt(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='del'>-	set_csr_euen(CSR_EUEN_LBTEN);</div><div class='del'>-	_restore_lbt(&amp;vcpu-&gt;arch.lbt);</div><div class='del'>-	vcpu-&gt;arch.aux_inuse |= KVM_LARCH_LBT;</div><div class='add'>+	if (!(vcpu-&gt;arch.aux_inuse &amp; KVM_LARCH_LBT)) {</div><div class='add'>+		set_csr_euen(CSR_EUEN_LBTEN);</div><div class='add'>+		_restore_lbt(&amp;vcpu-&gt;arch.lbt);</div><div class='add'>+		vcpu-&gt;arch.aux_inuse |= KVM_LARCH_LBT;</div><div class='add'>+	}</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1457,8 +1504,17 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vcpu-&gt;arch.vpid = 0;</div><div class='ctx'> 	vcpu-&gt;arch.flush_gpa = INVALID_GPA;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;vcpu-&gt;arch.swtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED);</div><div class='del'>-	vcpu-&gt;arch.swtimer.function = kvm_swtimer_wakeup;</div><div class='add'>+	hrtimer_setup(&amp;vcpu-&gt;arch.swtimer, kvm_swtimer_wakeup, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_ABS_PINNED_HARD);</div><div class='add'>+</div><div class='add'>+	/* Get GPA (=HVA) of PGD for kvm hypervisor */</div><div class='add'>+	vcpu-&gt;arch.kvm_pgd = __pa(vcpu-&gt;kvm-&gt;arch.pgd);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get PGD for primary mmu, virtual address is used since there is</div><div class='add'>+	 * memory access after loading from CSR_PGD in tlb exception fast path.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;arch.host_pgd = (unsigned long)vcpu-&gt;kvm-&gt;mm-&gt;pgd;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.handle_exit = kvm_handle_exit;</div><div class='ctx'> 	vcpu-&gt;arch.guest_eentry = (unsigned long)kvm_loongarch_ops-&gt;exc_entry;</div><div class='hunk'>@@ -1475,6 +1531,9 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* Init */</div><div class='ctx'> 	vcpu-&gt;arch.last_sched_cpu = -1;</div><div class='ctx'> </div><div class='add'>+	/* Init ipi_state lock */</div><div class='add'>+	spin_lock_init(&amp;vcpu-&gt;arch.ipi_state.lock);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize guest register state to valid architectural reset state.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1543,9 +1602,6 @@ static int _kvm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> </div><div class='ctx'> 	/* Restore timer state regardless */</div><div class='ctx'> 	kvm_restore_timer(vcpu);</div><div class='del'>-</div><div class='del'>-	/* Control guest page CCA attribute */</div><div class='del'>-	change_csr_gcfg(CSR_GCFG_MATC_MASK, CSR_GCFG_MATC_ROOT);</div><div class='ctx'> 	kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore hardware PMU CSRs */</div><div class='hunk'>@@ -1727,9 +1783,14 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu-&gt;mmio_needed = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (run-&gt;exit_reason == KVM_EXIT_LOONGARCH_IOCSR) {</div><div class='add'>+	switch (run-&gt;exit_reason) {</div><div class='add'>+	case KVM_EXIT_HYPERCALL:</div><div class='add'>+		kvm_complete_user_service(vcpu, run);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_EXIT_LOONGARCH_IOCSR:</div><div class='ctx'> 		if (!run-&gt;iocsr_io.is_write)</div><div class='ctx'> 			kvm_complete_iocsr_read(vcpu, run);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!vcpu-&gt;wants_to_run)</div><div class='head'>diff --git a/arch/loongarch/kvm/vm.c b/arch/loongarch/kvm/vm.c<br/>index 4ba734aaef87..a49b1c1a3dd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/vm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/kvm/vm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/kvm/vm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/kvm/vm.c</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_vcpu.h&gt;</div><div class='add'>+#include &lt;asm/kvm_eiointc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_pch_pic.h&gt;</div><div class='ctx'> </div><div class='ctx'> const struct _kvm_stats_desc kvm_vm_stats_desc[] = {</div><div class='ctx'> 	KVM_GENERIC_VM_STATS(),</div><div class='hunk'>@@ -46,7 +48,11 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 	if (kvm_pvtime_supported())</div><div class='ctx'> 		kvm-&gt;arch.pv_features |= BIT(KVM_FEATURE_STEAL_TIME);</div><div class='ctx'> </div><div class='del'>-	kvm-&gt;arch.gpa_size = BIT(cpu_vabits - 1);</div><div class='add'>+	/*</div><div class='add'>+	 * cpu_vabits means user address space only (a half of total).</div><div class='add'>+	 * GPA size of VM is the same with the size of user address space.</div><div class='add'>+	 */</div><div class='add'>+	kvm-&gt;arch.gpa_size = BIT(cpu_vabits);</div><div class='ctx'> 	kvm-&gt;arch.root_level = CONFIG_PGTABLE_LEVELS - 1;</div><div class='ctx'> 	kvm-&gt;arch.invalid_ptes[0] = 0;</div><div class='ctx'> 	kvm-&gt;arch.invalid_ptes[1] = (unsigned long)invalid_pte_table;</div><div class='hunk'>@@ -76,6 +82,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	switch (ext) {</div><div class='add'>+	case KVM_CAP_IRQCHIP:</div><div class='ctx'> 	case KVM_CAP_ONE_REG:</div><div class='ctx'> 	case KVM_CAP_ENABLE_CAP:</div><div class='ctx'> 	case KVM_CAP_READONLY_MEM:</div><div class='hunk'>@@ -139,6 +146,10 @@ static int kvm_vm_feature_has_attr(struct kvm *kvm, struct kvm_device_attr *attr</div><div class='ctx'> 		if (kvm_pvtime_supported())</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		return -ENXIO;</div><div class='add'>+	case KVM_LOONGARCH_VM_FEAT_PTW:</div><div class='add'>+		if (cpu_has_ptw)</div><div class='add'>+			return 0;</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -161,6 +172,8 @@ int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='ctx'> 	struct kvm_device_attr attr;</div><div class='ctx'> </div><div class='ctx'> 	switch (ioctl) {</div><div class='add'>+	case KVM_CREATE_IRQCHIP:</div><div class='add'>+		return 0;</div><div class='ctx'> 	case KVM_HAS_DEVICE_ATTR:</div><div class='ctx'> 		if (copy_from_user(&amp;attr, argp, sizeof(attr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -170,3 +183,19 @@ int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='ctx'> 		return -ENOIOCTLCMD;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event, bool line_status)</div><div class='add'>+{</div><div class='add'>+	if (!kvm_arch_irqchip_in_kernel(kvm))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	irq_event-&gt;status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,</div><div class='add'>+					irq_event-&gt;irq, irq_event-&gt;level, line_status);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool kvm_arch_irqchip_in_kernel(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm-&gt;arch.ipi &amp;&amp; kvm-&gt;arch.eiointc &amp;&amp; kvm-&gt;arch.pch_pic);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/lib/csum.c b/arch/loongarch/lib/csum.c<br/>index a5e84b403c3b..bcc9d01d8c41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/lib/csum.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/lib/csum.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/lib/csum.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/lib/csum.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> // Copyright (C) 2019-2020 Arm Ltd.</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/kasan-checks.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +26,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len)</div><div class='ctx'> 	const u64 *ptr;</div><div class='ctx'> 	u64 data, sum64 = 0;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(len == 0))</div><div class='add'>+	if (unlikely(len &lt;= 0))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	offset = (unsigned long)buff &amp; 7;</div><div class='head'>diff --git a/arch/loongarch/mm/fault.c b/arch/loongarch/mm/fault.c<br/>index deefd9617d00..2c93d33356e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/fault.c</a></div><div class='hunk'>@@ -215,6 +215,58 @@ static void __kprobes __do_page_fault(struct pt_regs *regs,</div><div class='ctx'> 		flags |= FAULT_FLAG_USER;</div><div class='ctx'> </div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='add'>+</div><div class='add'>+	if (!(flags &amp; FAULT_FLAG_USER))</div><div class='add'>+		goto lock_mmap;</div><div class='add'>+</div><div class='add'>+	vma = lock_vma_under_rcu(mm, address);</div><div class='add'>+	if (!vma)</div><div class='add'>+		goto lock_mmap;</div><div class='add'>+</div><div class='add'>+	if (write) {</div><div class='add'>+		flags |= FAULT_FLAG_WRITE;</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; VM_WRITE)) {</div><div class='add'>+			vma_end_read(vma);</div><div class='add'>+			si_code = SEGV_ACCERR;</div><div class='add'>+			count_vm_vma_lock_event(VMA_LOCK_SUCCESS);</div><div class='add'>+			goto bad_area_nosemaphore;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; VM_EXEC) &amp;&amp; address == exception_era(regs)) {</div><div class='add'>+			vma_end_read(vma);</div><div class='add'>+			si_code = SEGV_ACCERR;</div><div class='add'>+			count_vm_vma_lock_event(VMA_LOCK_SUCCESS);</div><div class='add'>+			goto bad_area_nosemaphore;</div><div class='add'>+		}</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_WRITE)) &amp;&amp; address != exception_era(regs)) {</div><div class='add'>+			vma_end_read(vma);</div><div class='add'>+			si_code = SEGV_ACCERR;</div><div class='add'>+			count_vm_vma_lock_event(VMA_LOCK_SUCCESS);</div><div class='add'>+			goto bad_area_nosemaphore;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fault = handle_mm_fault(vma, address, flags | FAULT_FLAG_VMA_LOCK, regs);</div><div class='add'>+	if (!(fault &amp; (VM_FAULT_RETRY | VM_FAULT_COMPLETED)))</div><div class='add'>+		vma_end_read(vma);</div><div class='add'>+</div><div class='add'>+	if (!(fault &amp; VM_FAULT_RETRY)) {</div><div class='add'>+		count_vm_vma_lock_event(VMA_LOCK_SUCCESS);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	count_vm_vma_lock_event(VMA_LOCK_RETRY);</div><div class='add'>+	if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+		flags |= FAULT_FLAG_TRIED;</div><div class='add'>+</div><div class='add'>+	/* Quick path to respond to signals */</div><div class='add'>+	if (fault_signal_pending(fault, regs)) {</div><div class='add'>+		if (!user_mode(regs))</div><div class='add'>+			no_context(regs, write, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+lock_mmap:</div><div class='add'>+</div><div class='ctx'> retry:</div><div class='ctx'> 	vma = lock_mm_and_find_vma(mm, address, regs);</div><div class='ctx'> 	if (unlikely(!vma))</div><div class='hunk'>@@ -276,8 +328,10 @@ good_area:</div><div class='ctx'> 		 */</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='add'>+	mmap_read_unlock(mm);</div><div class='add'>+</div><div class='add'>+done:</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='del'>-		mmap_read_unlock(mm);</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM) {</div><div class='ctx'> 			do_out_of_memory(regs, write, address);</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -290,8 +344,6 @@ good_area:</div><div class='ctx'> 		}</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mmap_read_unlock(mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,</div><div class='head'>diff --git a/arch/loongarch/mm/hugetlbpage.c b/arch/loongarch/mm/hugetlbpage.c<br/>index e4068906143b..02dad4624fe3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/hugetlbpage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/hugetlbpage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -47,7 +47,8 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				pmd = pmd_offset(pud, addr);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return (pte_t *) pmd;</div><div class='add'>+</div><div class='add'>+	return (!pmd || pmd_none(pmdp_get(pmd))) ? NULL : (pte_t *) pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> uint64_t pmd_to_entrylo(unsigned long pmd_val)</div><div class='head'>diff --git a/arch/loongarch/mm/init.c b/arch/loongarch/mm/init.c<br/>index 8a87a482c8f4..c3e4586a7975 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/init.c</a></div><div class='hunk'>@@ -65,9 +65,6 @@ void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long max_zone_pfns[MAX_NR_ZONES];</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ZONE_DMA</div><div class='del'>-	max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_ZONE_DMA32</div><div class='ctx'> 	max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -75,14 +72,6 @@ void __init paging_init(void)</div><div class='ctx'> </div><div class='ctx'> 	free_area_init(max_zone_pfns);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	max_mapnr = max_low_pfn;</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn &lt;&lt; PAGE_SHIFT);</div><div class='del'>-</div><div class='del'>-	memblock_free_all();</div><div class='del'>-}</div><div class='ctx'> #endif /* !CONFIG_NUMA */</div><div class='ctx'> </div><div class='ctx'> void __ref free_initmem(void)</div><div class='hunk'>@@ -117,14 +106,6 @@ void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)</div><div class='ctx'> 		page += vmem_altmap_offset(altmap);</div><div class='ctx'> 	__remove_pages(start_pfn, nr_pages, altmap);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NUMA</div><div class='del'>-int memory_add_physaddr_to_nid(u64 start)</div><div class='del'>-{</div><div class='del'>-	return pa_to_nid(start);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);</div><div class='del'>-#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SPARSEMEM_VMEMMAP</div><div class='hunk'>@@ -174,9 +155,7 @@ pte_t * __init populate_kernel_pte(unsigned long addr)</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> </div><div class='ctx'> 	if (p4d_none(p4dp_get(p4d))) {</div><div class='del'>-		pud = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		if (!pud)</div><div class='del'>-			panic("%s: Failed to allocate memory\n", __func__);</div><div class='add'>+		pud = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 		p4d_populate(&amp;init_mm, p4d, pud);</div><div class='ctx'> #ifndef __PAGETABLE_PUD_FOLDED</div><div class='ctx'> 		pud_init(pud);</div><div class='hunk'>@@ -185,9 +164,7 @@ pte_t * __init populate_kernel_pte(unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> 	pud = pud_offset(p4d, addr);</div><div class='ctx'> 	if (pud_none(pudp_get(pud))) {</div><div class='del'>-		pmd = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		if (!pmd)</div><div class='del'>-			panic("%s: Failed to allocate memory\n", __func__);</div><div class='add'>+		pmd = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 		pud_populate(&amp;init_mm, pud, pmd);</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> 		pmd_init(pmd);</div><div class='hunk'>@@ -198,10 +175,9 @@ pte_t * __init populate_kernel_pte(unsigned long addr)</div><div class='ctx'> 	if (!pmd_present(pmdp_get(pmd))) {</div><div class='ctx'> 		pte_t *pte;</div><div class='ctx'> </div><div class='del'>-		pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		if (!pte)</div><div class='del'>-			panic("%s: Failed to allocate memory\n", __func__);</div><div class='add'>+		pte = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 		pmd_populate_kernel(&amp;init_mm, pmd, pte);</div><div class='add'>+		kernel_pte_init(pte);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return pte_offset_kernel(pmd, addr);</div><div class='head'>diff --git a/arch/loongarch/mm/ioremap.c b/arch/loongarch/mm/ioremap.c<br/>index 70ca73019811..df949a3d0f34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/ioremap.c</a></div><div class='hunk'>@@ -16,12 +16,12 @@ void __init early_iounmap(void __iomem *addr, unsigned long size)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *early_memremap_ro(resource_size_t phys_addr, unsigned long size)</div><div class='add'>+void * __init early_memremap_ro(resource_size_t phys_addr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return early_memremap(phys_addr, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *early_memremap_prot(resource_size_t phys_addr, unsigned long size,</div><div class='add'>+void * __init early_memremap_prot(resource_size_t phys_addr, unsigned long size,</div><div class='ctx'> 		    unsigned long prot_val)</div><div class='ctx'> {</div><div class='ctx'> 	return early_memremap(phys_addr, size);</div><div class='head'>diff --git a/arch/loongarch/mm/kasan_init.c b/arch/loongarch/mm/kasan_init.c<br/>index 427d6b1aec09..170da98ad4f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/kasan_init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/kasan_init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/kasan_init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/kasan_init.c</a></div><div class='hunk'>@@ -13,6 +13,13 @@</div><div class='ctx'> </div><div class='ctx'> static pgd_t kasan_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);</div><div class='ctx'> </div><div class='add'>+#ifdef __PAGETABLE_P4D_FOLDED</div><div class='add'>+#define __pgd_none(early, pgd) (0)</div><div class='add'>+#else</div><div class='add'>+#define __pgd_none(early, pgd) (early ? (pgd_val(pgd) == 0) : \</div><div class='add'>+(__pa(pgd_val(pgd)) == (unsigned long)__pa(kasan_early_shadow_p4d)))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef __PAGETABLE_PUD_FOLDED</div><div class='ctx'> #define __p4d_none(early, p4d) (0)</div><div class='ctx'> #else</div><div class='hunk'>@@ -33,11 +40,9 @@ static pgd_t kasan_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);</div><div class='ctx'> #define __pte_none(early, pte) (early ? pte_none(pte) : \</div><div class='ctx'> ((pte_val(pte) &amp; _PFN_MASK) == (unsigned long)__pa(kasan_early_shadow_page)))</div><div class='ctx'> </div><div class='del'>-bool kasan_early_stage = true;</div><div class='del'>-</div><div class='ctx'> void *kasan_mem_to_shadow(const void *addr)</div><div class='ctx'> {</div><div class='del'>-	if (!kasan_arch_is_ready()) {</div><div class='add'>+	if (!kasan_enabled()) {</div><div class='ctx'> 		return (void *)(kasan_early_shadow_page);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		unsigned long maddr = (unsigned long)addr;</div><div class='hunk'>@@ -55,6 +60,9 @@ void *kasan_mem_to_shadow(const void *addr)</div><div class='ctx'> 		case XKPRANGE_UC_SEG:</div><div class='ctx'> 			offset = XKPRANGE_UC_SHADOW_OFFSET;</div><div class='ctx'> 			break;</div><div class='add'>+		case XKPRANGE_WC_SEG:</div><div class='add'>+			offset = XKPRANGE_WC_SHADOW_OFFSET;</div><div class='add'>+			break;</div><div class='ctx'> 		case XKVRANGE_VC_SEG:</div><div class='ctx'> 			offset = XKVRANGE_VC_SHADOW_OFFSET;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -79,6 +87,8 @@ const void *kasan_shadow_to_mem(const void *shadow_addr)</div><div class='ctx'> </div><div class='ctx'> 	if (addr &gt;= XKVRANGE_VC_SHADOW_OFFSET)</div><div class='ctx'> 		return (void *)(((addr - XKVRANGE_VC_SHADOW_OFFSET) &lt;&lt; KASAN_SHADOW_SCALE_SHIFT) + XKVRANGE_VC_START);</div><div class='add'>+	else if (addr &gt;= XKPRANGE_WC_SHADOW_OFFSET)</div><div class='add'>+		return (void *)(((addr - XKPRANGE_WC_SHADOW_OFFSET) &lt;&lt; KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_WC_START);</div><div class='ctx'> 	else if (addr &gt;= XKPRANGE_UC_SHADOW_OFFSET)</div><div class='ctx'> 		return (void *)(((addr - XKPRANGE_UC_SHADOW_OFFSET) &lt;&lt; KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_UC_START);</div><div class='ctx'> 	else if (addr &gt;= XKPRANGE_CC_SHADOW_OFFSET)</div><div class='hunk'>@@ -142,6 +152,19 @@ static pud_t *__init kasan_pud_offset(p4d_t *p4dp, unsigned long addr, int node,</div><div class='ctx'> 	return pud_offset(p4dp, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static p4d_t *__init kasan_p4d_offset(pgd_t *pgdp, unsigned long addr, int node, bool early)</div><div class='add'>+{</div><div class='add'>+	if (__pgd_none(early, pgdp_get(pgdp))) {</div><div class='add'>+		phys_addr_t p4d_phys = early ?</div><div class='add'>+			__pa_symbol(kasan_early_shadow_p4d) : kasan_alloc_zeroed_page(node);</div><div class='add'>+		if (!early)</div><div class='add'>+			memcpy(__va(p4d_phys), kasan_early_shadow_p4d, sizeof(kasan_early_shadow_p4d));</div><div class='add'>+		pgd_populate(&amp;init_mm, pgdp, (p4d_t *)__va(p4d_phys));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return p4d_offset(pgdp, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init kasan_pte_populate(pmd_t *pmdp, unsigned long addr,</div><div class='ctx'> 				      unsigned long end, int node, bool early)</div><div class='ctx'> {</div><div class='hunk'>@@ -178,19 +201,19 @@ static void __init kasan_pud_populate(p4d_t *p4dp, unsigned long addr,</div><div class='ctx'> 	do {</div><div class='ctx'> 		next = pud_addr_end(addr, end);</div><div class='ctx'> 		kasan_pmd_populate(pudp, addr, next, node, early);</div><div class='del'>-	} while (pudp++, addr = next, addr != end);</div><div class='add'>+	} while (pudp++, addr = next, addr != end &amp;&amp; __pud_none(early, READ_ONCE(*pudp)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init kasan_p4d_populate(pgd_t *pgdp, unsigned long addr,</div><div class='ctx'> 					    unsigned long end, int node, bool early)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long next;</div><div class='del'>-	p4d_t *p4dp = p4d_offset(pgdp, addr);</div><div class='add'>+	p4d_t *p4dp = kasan_p4d_offset(pgdp, addr, node, early);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		next = p4d_addr_end(addr, end);</div><div class='ctx'> 		kasan_pud_populate(p4dp, addr, next, node, early);</div><div class='del'>-	} while (p4dp++, addr = next, addr != end);</div><div class='add'>+	} while (p4dp++, addr = next, addr != end &amp;&amp; __p4d_none(early, READ_ONCE(*p4dp)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init kasan_pgd_populate(unsigned long addr, unsigned long end,</div><div class='hunk'>@@ -218,7 +241,7 @@ static void __init kasan_map_populate(unsigned long start, unsigned long end,</div><div class='ctx'> asmlinkage void __init kasan_early_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_START, PGDIR_SIZE));</div><div class='del'>-	BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_END, PGDIR_SIZE));</div><div class='add'>+	BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_END + 1, PGDIR_SIZE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void kasan_set_pgd(pgd_t *pgdp, pgd_t pgdval)</div><div class='hunk'>@@ -233,7 +256,7 @@ static void __init clear_pgds(unsigned long start, unsigned long end)</div><div class='ctx'> 	 * swapper_pg_dir. pgd_clear() can't be used</div><div class='ctx'> 	 * here because it's nop on 2,3-level pagetable setups</div><div class='ctx'> 	 */</div><div class='del'>-	for (; start &lt; end; start += PGDIR_SIZE)</div><div class='add'>+	for (; start &lt; end; start = pgd_addr_end(start, end))</div><div class='ctx'> 		kasan_set_pgd((pgd_t *)pgd_offset_k(start), __pgd(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -243,6 +266,17 @@ void __init kasan_init(void)</div><div class='ctx'> 	phys_addr_t pa_start, pa_end;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * If PGDIR_SIZE is too large for cpu_vabits, KASAN_SHADOW_END will</div><div class='add'>+	 * overflow UINTPTR_MAX and then looks like a user space address.</div><div class='add'>+	 * For example, PGDIR_SIZE of CONFIG_4KB_4LEVEL is 2^39, which is too</div><div class='add'>+	 * large for Loongson-2K series whose cpu_vabits = 39.</div><div class='add'>+	 */</div><div class='add'>+	if (KASAN_SHADOW_END &lt; vm_map_base) {</div><div class='add'>+		pr_warn("PGDIR_SIZE too large for cpu_vabits, KernelAddressSanitizer disabled.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * PGD was populated as invalid_pmd_table or invalid_pud_table</div><div class='ctx'> 	 * in pagetable_init() which depends on how many levels of page</div><div class='ctx'> 	 * table you are using, but we had to clean the gpd of kasan</div><div class='hunk'>@@ -262,7 +296,8 @@ void __init kasan_init(void)</div><div class='ctx'> 	kasan_populate_early_shadow(kasan_mem_to_shadow((void *)VMALLOC_START),</div><div class='ctx'> 					kasan_mem_to_shadow((void *)KFENCE_AREA_END));</div><div class='ctx'> </div><div class='del'>-	kasan_early_stage = false;</div><div class='add'>+	/* Enable KASAN here before kasan_mem_to_shadow(). */</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> </div><div class='ctx'> 	/* Populate the linear mapping */</div><div class='ctx'> 	for_each_mem_range(i, &amp;pa_start, &amp;pa_end) {</div><div class='hunk'>@@ -293,5 +328,4 @@ void __init kasan_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* At this point kasan is fully initialized. Enable error messages */</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='del'>-	pr_info("KernelAddressSanitizer initialized.\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/mm/mmap.c b/arch/loongarch/mm/mmap.c<br/>index 914e82ff3f65..1df9e99582cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/mmap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/mmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/mmap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/mmap.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kfence.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='hunk'>@@ -63,8 +64,11 @@ static unsigned long arch_get_unmapped_area_common(struct file *filp,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info.length = len;</div><div class='del'>-	info.align_mask = do_color_align ? (PAGE_MASK &amp; SHM_ALIGN_MASK) : 0;</div><div class='ctx'> 	info.align_offset = pgoff &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	if (filp &amp;&amp; is_file_hugepages(filp))</div><div class='add'>+		info.align_mask = huge_page_mask_align(filp);</div><div class='add'>+	else</div><div class='add'>+		info.align_mask = do_color_align ? (PAGE_MASK &amp; SHM_ALIGN_MASK) : 0;</div><div class='ctx'> </div><div class='ctx'> 	if (dir == DOWN) {</div><div class='ctx'> 		info.flags = VM_UNMAPPED_AREA_TOPDOWN;</div><div class='head'>diff --git a/arch/loongarch/mm/pageattr.c b/arch/loongarch/mm/pageattr.c<br/>index ffd8d76021d4..f5e910b68229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/pageattr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/pageattr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/pageattr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/pageattr.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 2024 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/pagewalk.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='hunk'>@@ -117,7 +118,7 @@ static int __set_memory(unsigned long addr, int numpages, pgprot_t set_mask, pgp</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mmap_write_lock(&amp;init_mm);</div><div class='del'>-	ret = walk_page_range_novma(&amp;init_mm, start, end, &amp;pageattr_ops, NULL, &amp;masks);</div><div class='add'>+	ret = walk_kernel_page_table_range(start, end, &amp;pageattr_ops, NULL, &amp;masks);</div><div class='ctx'> 	mmap_write_unlock(&amp;init_mm);</div><div class='ctx'> </div><div class='ctx'> 	flush_tlb_kernel_range(start, end);</div><div class='hunk'>@@ -167,7 +168,7 @@ bool kernel_page_present(struct page *page)</div><div class='ctx'> 	unsigned long addr = (unsigned long)page_address(page);</div><div class='ctx'> </div><div class='ctx'> 	if (addr &lt; vm_map_base)</div><div class='del'>-		return true;</div><div class='add'>+		return memblock_is_memory(__pa(addr));</div><div class='ctx'> </div><div class='ctx'> 	pgd = pgd_offset_k(addr);</div><div class='ctx'> 	if (pgd_none(pgdp_get(pgd)))</div><div class='hunk'>@@ -216,3 +217,22 @@ int set_direct_map_invalid_noflush(struct page *page)</div><div class='ctx'> </div><div class='ctx'> 	return __set_memory(addr, 1, __pgprot(0), __pgprot(_PAGE_PRESENT | _PAGE_VALID));</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int set_direct_map_valid_noflush(struct page *page, unsigned nr, bool valid)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr = (unsigned long)page_address(page);</div><div class='add'>+	pgprot_t set, clear;</div><div class='add'>+</div><div class='add'>+	if (addr &lt; vm_map_base)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (valid) {</div><div class='add'>+		set = PAGE_KERNEL;</div><div class='add'>+		clear = __pgprot(0);</div><div class='add'>+	} else {</div><div class='add'>+		set = __pgprot(0);</div><div class='add'>+		clear = __pgprot(_PAGE_PRESENT | _PAGE_VALID);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __set_memory(addr, 1, set, clear);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c<br/>index eb6a29b491a7..352d9b2e02ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/pgtable.c</a></div><div class='hunk'>@@ -23,11 +23,10 @@ EXPORT_SYMBOL(tlb_virt_to_page);</div><div class='ctx'> </div><div class='ctx'> pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *init, *ret = NULL;</div><div class='del'>-	struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL &amp; ~__GFP_HIGHMEM, 0);</div><div class='add'>+	pgd_t *init, *ret;</div><div class='ctx'> </div><div class='del'>-	if (ptdesc) {</div><div class='del'>-		ret = (pgd_t *)ptdesc_address(ptdesc);</div><div class='add'>+	ret = __pgd_alloc(mm, 0);</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		init = pgd_offset(&amp;init_mm, 0UL);</div><div class='ctx'> 		pgd_init(ret);</div><div class='ctx'> 		memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,</div><div class='hunk'>@@ -116,13 +115,24 @@ void pud_init(void *addr)</div><div class='ctx'> EXPORT_SYMBOL_GPL(pud_init);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-pmd_t mk_pmd(struct page *page, pgprot_t prot)</div><div class='add'>+void kernel_pte_init(void *addr)</div><div class='ctx'> {</div><div class='del'>-	pmd_t pmd;</div><div class='add'>+	unsigned long *p, *end;</div><div class='ctx'> </div><div class='del'>-	pmd_val(pmd) = (page_to_pfn(page) &lt;&lt; PFN_PTE_SHIFT) | pgprot_val(prot);</div><div class='add'>+	p = (unsigned long *)addr;</div><div class='add'>+	end = p + PTRS_PER_PTE;</div><div class='ctx'> </div><div class='del'>-	return pmd;</div><div class='add'>+	do {</div><div class='add'>+		p[0] = _PAGE_GLOBAL;</div><div class='add'>+		p[1] = _PAGE_GLOBAL;</div><div class='add'>+		p[2] = _PAGE_GLOBAL;</div><div class='add'>+		p[3] = _PAGE_GLOBAL;</div><div class='add'>+		p[4] = _PAGE_GLOBAL;</div><div class='add'>+		p += 8;</div><div class='add'>+		p[-3] = _PAGE_GLOBAL;</div><div class='add'>+		p[-2] = _PAGE_GLOBAL;</div><div class='add'>+		p[-1] = _PAGE_GLOBAL;</div><div class='add'>+	} while (p != end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='head'>diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c<br/>index 5ac9beb5f093..3b427b319db2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/tlb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/mm/tlb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/mm/tlb.c</a></div><div class='hunk'>@@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)</div><div class='ctx'> 		/* Avoid lockdep warning */</div><div class='ctx'> 		rcutree_report_cpu_starting(cpu);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_NUMA</div><div class='add'>+#if defined(CONFIG_NUMA) &amp;&amp; !defined(CONFIG_PREEMPT_RT)</div><div class='ctx'> 		vec_sz = sizeof(exception_handlers);</div><div class='ctx'> </div><div class='ctx'> 		if (pcpu_handlers[cpu])</div><div class='head'>diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c<br/>index 7dbefd4ba210..cbe53d0b7fb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/net/bpf_jit.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/net/bpf_jit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/net/bpf_jit.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/net/bpf_jit.c</a></div><div class='hunk'>@@ -4,13 +4,20 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/memory.h&gt;</div><div class='ctx'> #include "bpf_jit.h"</div><div class='ctx'> </div><div class='del'>-#define REG_TCC		LOONGARCH_GPR_A6</div><div class='del'>-#define TCC_SAVED	LOONGARCH_GPR_S5</div><div class='add'>+#define LOONGARCH_MAX_REG_ARGS 8</div><div class='add'>+</div><div class='add'>+#define LOONGARCH_LONG_JUMP_NINSNS 5</div><div class='add'>+#define LOONGARCH_LONG_JUMP_NBYTES (LOONGARCH_LONG_JUMP_NINSNS * 4)</div><div class='ctx'> </div><div class='del'>-#define SAVE_RA		BIT(0)</div><div class='del'>-#define SAVE_TCC	BIT(1)</div><div class='add'>+#define LOONGARCH_FENTRY_NINSNS 2</div><div class='add'>+#define LOONGARCH_FENTRY_NBYTES (LOONGARCH_FENTRY_NINSNS * 4)</div><div class='add'>+#define LOONGARCH_BPF_FENTRY_NBYTES (LOONGARCH_LONG_JUMP_NINSNS * 4)</div><div class='add'>+</div><div class='add'>+#define REG_TCC		LOONGARCH_GPR_A6</div><div class='add'>+#define BPF_TAIL_CALL_CNT_PTR_STACK_OFF(stack) (round_up(stack, 16) - 80)</div><div class='ctx'> </div><div class='ctx'> static const int regmap[] = {</div><div class='ctx'> 	/* return value from in-kernel function, and exit value for eBPF program */</div><div class='hunk'>@@ -32,32 +39,57 @@ static const int regmap[] = {</div><div class='ctx'> 	[BPF_REG_AX] = LOONGARCH_GPR_T0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void mark_call(struct jit_ctx *ctx)</div><div class='add'>+static void prepare_bpf_tail_call_cnt(struct jit_ctx *ctx, int *store_offset)</div><div class='ctx'> {</div><div class='del'>-	ctx-&gt;flags |= SAVE_RA;</div><div class='del'>-}</div><div class='add'>+	const struct bpf_prog *prog = ctx-&gt;prog;</div><div class='add'>+	const bool is_main_prog = !bpf_is_subprog(prog);</div><div class='ctx'> </div><div class='del'>-static void mark_tail_call(struct jit_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	ctx-&gt;flags |= SAVE_TCC;</div><div class='del'>-}</div><div class='add'>+	if (is_main_prog) {</div><div class='add'>+		/*</div><div class='add'>+		 * LOONGARCH_GPR_T3 = MAX_TAIL_CALL_CNT</div><div class='add'>+		 * if (REG_TCC &gt; T3 )</div><div class='add'>+		 *	std REG_TCC -&gt; LOONGARCH_GPR_SP + store_offset</div><div class='add'>+		 * else</div><div class='add'>+		 *	std REG_TCC -&gt; LOONGARCH_GPR_SP + store_offset</div><div class='add'>+		 *	REG_TCC = LOONGARCH_GPR_SP + store_offset</div><div class='add'>+		 *</div><div class='add'>+		 * std REG_TCC -&gt; LOONGARCH_GPR_SP + store_offset</div><div class='add'>+		 *</div><div class='add'>+		 * The purpose of this code is to first push the TCC into stack,</div><div class='add'>+		 * and then push the address of TCC into stack.</div><div class='add'>+		 * In cases where bpf2bpf and tailcall are used in combination,</div><div class='add'>+		 * the value in REG_TCC may be a count or an address,</div><div class='add'>+		 * these two cases need to be judged and handled separately.</div><div class='add'>+		 */</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, MAX_TAIL_CALL_CNT);</div><div class='add'>+		*store_offset -= sizeof(long);</div><div class='ctx'> </div><div class='del'>-static bool seen_call(struct jit_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	return (ctx-&gt;flags &amp; SAVE_RA);</div><div class='del'>-}</div><div class='add'>+		emit_cond_jmp(ctx, BPF_JGT, REG_TCC, LOONGARCH_GPR_T3, 4);</div><div class='ctx'> </div><div class='del'>-static bool seen_tail_call(struct jit_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	return (ctx-&gt;flags &amp; SAVE_TCC);</div><div class='del'>-}</div><div class='add'>+		/*</div><div class='add'>+		 * If REG_TCC &lt; MAX_TAIL_CALL_CNT, the value in REG_TCC is a count,</div><div class='add'>+		 * push tcc into stack</div><div class='add'>+		 */</div><div class='add'>+		emit_insn(ctx, std, REG_TCC, LOONGARCH_GPR_SP, *store_offset);</div><div class='ctx'> </div><div class='del'>-static u8 tail_call_reg(struct jit_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	if (seen_call(ctx))</div><div class='del'>-		return TCC_SAVED;</div><div class='add'>+		/* Push the address of TCC into the REG_TCC */</div><div class='add'>+		emit_insn(ctx, addid, REG_TCC, LOONGARCH_GPR_SP, *store_offset);</div><div class='ctx'> </div><div class='del'>-	return REG_TCC;</div><div class='add'>+		emit_uncond_jmp(ctx, 2);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If REG_TCC &gt; MAX_TAIL_CALL_CNT, the value in REG_TCC is an address,</div><div class='add'>+		 * push tcc_ptr into stack</div><div class='add'>+		 */</div><div class='add'>+		emit_insn(ctx, std, REG_TCC, LOONGARCH_GPR_SP, *store_offset);</div><div class='add'>+	} else {</div><div class='add'>+		*store_offset -= sizeof(long);</div><div class='add'>+		emit_insn(ctx, std, REG_TCC, LOONGARCH_GPR_SP, *store_offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Push tcc_ptr into stack */</div><div class='add'>+	*store_offset -= sizeof(long);</div><div class='add'>+	emit_insn(ctx, std, REG_TCC, LOONGARCH_GPR_SP, *store_offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -80,6 +112,10 @@ static u8 tail_call_reg(struct jit_ctx *ctx)</div><div class='ctx'>  *                            |           $s4           |</div><div class='ctx'>  *                            +-------------------------+</div><div class='ctx'>  *                            |           $s5           |</div><div class='add'>+ *                            +-------------------------+</div><div class='add'>+ *                            |           tcc           |</div><div class='add'>+ *                            +-------------------------+</div><div class='add'>+ *                            |           tcc_ptr       |</div><div class='ctx'>  *                            +-------------------------+ &lt;--BPF_REG_FP</div><div class='ctx'>  *                            |  prog-&gt;aux-&gt;stack_depth |</div><div class='ctx'>  *                            |        (optional)       |</div><div class='hunk'>@@ -88,22 +124,32 @@ static u8 tail_call_reg(struct jit_ctx *ctx)</div><div class='ctx'>  */</div><div class='ctx'> static void build_prologue(struct jit_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	int stack_adjust = 0, store_offset, bpf_stack_adjust;</div><div class='add'>+	int i, stack_adjust = 0, store_offset, bpf_stack_adjust;</div><div class='add'>+	const struct bpf_prog *prog = ctx-&gt;prog;</div><div class='add'>+	const bool is_main_prog = !bpf_is_subprog(prog);</div><div class='ctx'> </div><div class='ctx'> 	bpf_stack_adjust = round_up(ctx-&gt;prog-&gt;aux-&gt;stack_depth, 16);</div><div class='ctx'> </div><div class='del'>-	/* To store ra, fp, s0, s1, s2, s3, s4 and s5. */</div><div class='add'>+	/* To store ra, fp, s0, s1, s2, s3, s4, s5 */</div><div class='ctx'> 	stack_adjust += sizeof(long) * 8;</div><div class='ctx'> </div><div class='add'>+	/* To store tcc and tcc_ptr */</div><div class='add'>+	stack_adjust += sizeof(long) * 2;</div><div class='add'>+</div><div class='ctx'> 	stack_adjust = round_up(stack_adjust, 16);</div><div class='ctx'> 	stack_adjust += bpf_stack_adjust;</div><div class='ctx'> </div><div class='add'>+	/* Reserve space for the move_imm + jirl instruction */</div><div class='add'>+	for (i = 0; i &lt; LOONGARCH_LONG_JUMP_NINSNS; i++)</div><div class='add'>+		emit_insn(ctx, nop);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='del'>-	 * First instruction initializes the tail call count (TCC).</div><div class='del'>-	 * On tail call we skip this instruction, and the TCC is</div><div class='del'>-	 * passed in REG_TCC from the caller.</div><div class='add'>+	 * First instruction initializes the tail call count (TCC)</div><div class='add'>+	 * register to zero. On tail call we skip this instruction,</div><div class='add'>+	 * and the TCC is passed in REG_TCC from the caller.</div><div class='ctx'> 	 */</div><div class='del'>-	emit_insn(ctx, addid, REG_TCC, LOONGARCH_GPR_ZERO, MAX_TAIL_CALL_CNT);</div><div class='add'>+	if (is_main_prog)</div><div class='add'>+		emit_insn(ctx, addid, REG_TCC, LOONGARCH_GPR_ZERO, 0);</div><div class='ctx'> </div><div class='ctx'> 	emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, -stack_adjust);</div><div class='ctx'> </div><div class='hunk'>@@ -131,18 +177,13 @@ static void build_prologue(struct jit_ctx *ctx)</div><div class='ctx'> 	store_offset -= sizeof(long);</div><div class='ctx'> 	emit_insn(ctx, std, LOONGARCH_GPR_S5, LOONGARCH_GPR_SP, store_offset);</div><div class='ctx'> </div><div class='add'>+	prepare_bpf_tail_call_cnt(ctx, &amp;store_offset);</div><div class='add'>+</div><div class='ctx'> 	emit_insn(ctx, addid, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_adjust);</div><div class='ctx'> </div><div class='ctx'> 	if (bpf_stack_adjust)</div><div class='ctx'> 		emit_insn(ctx, addid, regmap[BPF_REG_FP], LOONGARCH_GPR_SP, bpf_stack_adjust);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Program contains calls and tail calls, so REG_TCC need</div><div class='del'>-	 * to be saved across calls.</div><div class='del'>-	 */</div><div class='del'>-	if (seen_tail_call(ctx) &amp;&amp; seen_call(ctx))</div><div class='del'>-		move_reg(ctx, TCC_SAVED, REG_TCC);</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;stack_size = stack_adjust;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -175,19 +216,29 @@ static void __build_epilogue(struct jit_ctx *ctx, bool is_tail_call)</div><div class='ctx'> 	load_offset -= sizeof(long);</div><div class='ctx'> 	emit_insn(ctx, ldd, LOONGARCH_GPR_S5, LOONGARCH_GPR_SP, load_offset);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * When push into the stack, follow the order of tcc then tcc_ptr.</div><div class='add'>+	 * When pop from the stack, first pop tcc_ptr then followed by tcc.</div><div class='add'>+	 */</div><div class='add'>+	load_offset -= 2 * sizeof(long);</div><div class='add'>+	emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_SP, load_offset);</div><div class='add'>+</div><div class='add'>+	load_offset += sizeof(long);</div><div class='add'>+	emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_SP, load_offset);</div><div class='add'>+</div><div class='ctx'> 	emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, stack_adjust);</div><div class='ctx'> </div><div class='ctx'> 	if (!is_tail_call) {</div><div class='ctx'> 		/* Set return value */</div><div class='del'>-		move_reg(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0]);</div><div class='add'>+		emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0);</div><div class='ctx'> 		/* Return to the caller */</div><div class='del'>-		emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0);</div><div class='add'>+		emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Call the next bpf prog and skip the first instruction</div><div class='ctx'> 		 * of TCC initialization.</div><div class='ctx'> 		 */</div><div class='del'>-		emit_insn(ctx, jirl, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, 1);</div><div class='add'>+		emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T3, 6);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -206,12 +257,10 @@ bool bpf_jit_supports_far_kfunc_call(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* initialized on the first pass of build_body() */</div><div class='del'>-static int out_offset = -1;</div><div class='del'>-static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='add'>+static int emit_bpf_tail_call(struct jit_ctx *ctx, int insn)</div><div class='ctx'> {</div><div class='del'>-	int off;</div><div class='del'>-	u8 tcc = tail_call_reg(ctx);</div><div class='add'>+	int off, tc_ninsn = 0;</div><div class='add'>+	int tcc_ptr_off = BPF_TAIL_CALL_CNT_PTR_STACK_OFF(ctx-&gt;stack_size);</div><div class='ctx'> 	u8 a1 = LOONGARCH_GPR_A1;</div><div class='ctx'> 	u8 a2 = LOONGARCH_GPR_A2;</div><div class='ctx'> 	u8 t1 = LOONGARCH_GPR_T1;</div><div class='hunk'>@@ -220,7 +269,7 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 	const int idx0 = ctx-&gt;idx;</div><div class='ctx'> </div><div class='ctx'> #define cur_offset (ctx-&gt;idx - idx0)</div><div class='del'>-#define jmp_offset (out_offset - (cur_offset))</div><div class='add'>+#define jmp_offset (tc_ninsn - (cur_offset))</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * a0: &amp;ctx</div><div class='hunk'>@@ -230,6 +279,7 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 	 * if (index &gt;= array-&gt;map.max_entries)</div><div class='ctx'> 	 *	 goto out;</div><div class='ctx'> 	 */</div><div class='add'>+	tc_ninsn = insn ? ctx-&gt;offset[insn+1] - ctx-&gt;offset[insn] : ctx-&gt;offset[0];</div><div class='ctx'> 	off = offsetof(struct bpf_array, map.max_entries);</div><div class='ctx'> 	emit_insn(ctx, ldwu, t1, a1, off);</div><div class='ctx'> 	/* bgeu $a2, $t1, jmp_offset */</div><div class='hunk'>@@ -237,11 +287,15 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 		goto toofar;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * if (--TCC &lt; 0)</div><div class='del'>-	 *	 goto out;</div><div class='add'>+	 * if ((*tcc_ptr)++ &gt;= MAX_TAIL_CALL_CNT)</div><div class='add'>+	 *      goto out;</div><div class='ctx'> 	 */</div><div class='del'>-	emit_insn(ctx, addid, REG_TCC, tcc, -1);</div><div class='del'>-	if (emit_tailcall_jmp(ctx, BPF_JSLT, REG_TCC, LOONGARCH_GPR_ZERO, jmp_offset) &lt; 0)</div><div class='add'>+	emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_SP, tcc_ptr_off);</div><div class='add'>+	emit_insn(ctx, ldd, t3, REG_TCC, 0);</div><div class='add'>+	emit_insn(ctx, addid, t3, t3, 1);</div><div class='add'>+	emit_insn(ctx, std, t3, REG_TCC, 0);</div><div class='add'>+	emit_insn(ctx, addid, t2, LOONGARCH_GPR_ZERO, MAX_TAIL_CALL_CNT);</div><div class='add'>+	if (emit_tailcall_jmp(ctx, BPF_JSGT, t3, t2, jmp_offset) &lt; 0)</div><div class='ctx'> 		goto toofar;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -261,15 +315,6 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)</div><div class='ctx'> 	emit_insn(ctx, ldd, t3, t2, off);</div><div class='ctx'> 	__build_epilogue(ctx, true);</div><div class='ctx'> </div><div class='del'>-	/* out: */</div><div class='del'>-	if (out_offset == -1)</div><div class='del'>-		out_offset = cur_offset;</div><div class='del'>-	if (cur_offset != out_offset) {</div><div class='del'>-		pr_err_once("tail_call out_offset = %d, expected %d!\n",</div><div class='del'>-			    cur_offset, out_offset);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> toofar:</div><div class='hunk'>@@ -461,7 +506,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext</div><div class='ctx'> 	u64 func_addr;</div><div class='ctx'> 	bool func_addr_fixed, sign_extend;</div><div class='ctx'> 	int i = insn - ctx-&gt;prog-&gt;insnsi;</div><div class='del'>-	int ret, jmp_offset;</div><div class='add'>+	int ret, jmp_offset, tcc_ptr_off;</div><div class='ctx'> 	const u8 code = insn-&gt;code;</div><div class='ctx'> 	const u8 cond = BPF_OP(code);</div><div class='ctx'> 	const u8 t1 = LOONGARCH_GPR_T1;</div><div class='hunk'>@@ -482,13 +527,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext</div><div class='ctx'> 			emit_zext_32(ctx, dst, is32);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 8:</div><div class='del'>-			move_reg(ctx, t1, src);</div><div class='del'>-			emit_insn(ctx, extwb, dst, t1);</div><div class='add'>+			emit_insn(ctx, extwb, dst, src);</div><div class='ctx'> 			emit_zext_32(ctx, dst, is32);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 16:</div><div class='del'>-			move_reg(ctx, t1, src);</div><div class='del'>-			emit_insn(ctx, extwh, dst, t1);</div><div class='add'>+			emit_insn(ctx, extwh, dst, src);</div><div class='ctx'> 			emit_zext_32(ctx, dst, is32);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 32:</div><div class='hunk'>@@ -897,21 +940,27 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext</div><div class='ctx'> </div><div class='ctx'> 	/* function call */</div><div class='ctx'> 	case BPF_JMP | BPF_CALL:</div><div class='del'>-		mark_call(ctx);</div><div class='ctx'> 		ret = bpf_jit_get_func_addr(ctx-&gt;prog, insn, extra_pass,</div><div class='ctx'> 					    &amp;func_addr, &amp;func_addr_fixed);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='add'>+		if (insn-&gt;src_reg == BPF_PSEUDO_CALL) {</div><div class='add'>+			tcc_ptr_off = BPF_TAIL_CALL_CNT_PTR_STACK_OFF(ctx-&gt;stack_size);</div><div class='add'>+			emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_SP, tcc_ptr_off);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		move_addr(ctx, t1, func_addr);</div><div class='del'>-		emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0);</div><div class='del'>-		move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);</div><div class='add'>+		emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0);</div><div class='add'>+</div><div class='add'>+		if (insn-&gt;src_reg != BPF_PSEUDO_CALL)</div><div class='add'>+			move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);</div><div class='add'>+</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* tail call */</div><div class='ctx'> 	case BPF_JMP | BPF_TAIL_CALL:</div><div class='del'>-		mark_tail_call(ctx);</div><div class='del'>-		if (emit_bpf_tail_call(ctx) &lt; 0)</div><div class='add'>+		if (emit_bpf_tail_call(ctx, i) &lt; 0)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -930,7 +979,10 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext</div><div class='ctx'> 	{</div><div class='ctx'> 		const u64 imm64 = (u64)(insn + 1)-&gt;imm &lt;&lt; 32 | (u32)insn-&gt;imm;</div><div class='ctx'> </div><div class='del'>-		move_imm(ctx, dst, imm64, is32);</div><div class='add'>+		if (bpf_pseudo_func(insn))</div><div class='add'>+			move_addr(ctx, dst, imm64);</div><div class='add'>+		else</div><div class='add'>+			move_imm(ctx, dst, imm64, is32);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1172,12 +1224,566 @@ static int validate_code(struct jit_ctx *ctx)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_ctx(struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (validate_code(ctx))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='ctx'> 	if (WARN_ON_ONCE(ctx-&gt;num_exentries != ctx-&gt;prog-&gt;aux-&gt;num_exentries))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emit_jump_and_link(struct jit_ctx *ctx, u8 rd, u64 target)</div><div class='add'>+{</div><div class='add'>+	if (!target) {</div><div class='add'>+		pr_err("bpf_jit: jump target address is error\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	move_imm(ctx, LOONGARCH_GPR_T1, target, false);</div><div class='add'>+	emit_insn(ctx, jirl, rd, LOONGARCH_GPR_T1, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_jump_or_nops(void *target, void *ip, u32 *insns, bool is_call)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct jit_ctx ctx;</div><div class='add'>+</div><div class='add'>+	ctx.idx = 0;</div><div class='add'>+	ctx.image = (union loongarch_instruction *)insns;</div><div class='add'>+</div><div class='add'>+	if (!target) {</div><div class='add'>+		for (i = 0; i &lt; LOONGARCH_LONG_JUMP_NINSNS; i++)</div><div class='add'>+			emit_insn((&amp;ctx), nop);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return emit_jump_and_link(&amp;ctx, is_call ? LOONGARCH_GPR_T0 : LOONGARCH_GPR_ZERO, (u64)target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_call(struct jit_ctx *ctx, u64 addr)</div><div class='add'>+{</div><div class='add'>+	return emit_jump_and_link(ctx, LOONGARCH_GPR_RA, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *bpf_arch_text_copy(void *dst, void *src, size_t len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;text_mutex);</div><div class='add'>+	ret = larch_insn_text_copy(dst, src, len);</div><div class='add'>+	mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	return ret ? ERR_PTR(-EINVAL) : dst;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type,</div><div class='add'>+		       void *old_addr, void *new_addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	bool is_call = (poke_type == BPF_MOD_CALL);</div><div class='add'>+	u32 old_insns[LOONGARCH_LONG_JUMP_NINSNS] = {[0 ... 4] = INSN_NOP};</div><div class='add'>+	u32 new_insns[LOONGARCH_LONG_JUMP_NINSNS] = {[0 ... 4] = INSN_NOP};</div><div class='add'>+</div><div class='add'>+	/* Only poking bpf text is supported. Since kernel function entry</div><div class='add'>+	 * is set up by ftrace, we rely on ftrace to poke kernel functions.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_bpf_text_address((unsigned long)ip))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = emit_jump_or_nops(old_addr, ip, old_insns, is_call);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (memcmp(ip, old_insns, LOONGARCH_LONG_JUMP_NBYTES))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	ret = emit_jump_or_nops(new_addr, ip, new_insns, is_call);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;text_mutex);</div><div class='add'>+	if (memcmp(ip, new_insns, LOONGARCH_LONG_JUMP_NBYTES))</div><div class='add'>+		ret = larch_insn_text_copy(ip, new_insns, LOONGARCH_LONG_JUMP_NBYTES);</div><div class='add'>+	mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bpf_arch_text_invalidate(void *dst, size_t len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 *inst;</div><div class='add'>+</div><div class='add'>+	inst = kvmalloc(len, GFP_KERNEL);</div><div class='add'>+	if (!inst)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (len / sizeof(u32)); i++)</div><div class='add'>+		inst[i] = INSN_BREAK;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;text_mutex);</div><div class='add'>+	if (larch_insn_text_copy(dst, inst, len))</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	kvfree(inst);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void store_args(struct jit_ctx *ctx, int nargs, int args_off)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nargs; i++) {</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_A0 + i, LOONGARCH_GPR_FP, -args_off);</div><div class='add'>+		args_off -= 8;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void restore_args(struct jit_ctx *ctx, int nargs, int args_off)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nargs; i++) {</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_A0 + i, LOONGARCH_GPR_FP, -args_off);</div><div class='add'>+		args_off -= 8;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='add'>+			   int args_off, int retval_off, int run_ctx_off, bool save_ret)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 *branch;</div><div class='add'>+	struct bpf_prog *p = l-&gt;link.prog;</div><div class='add'>+	int cookie_off = offsetof(struct bpf_tramp_run_ctx, bpf_cookie);</div><div class='add'>+</div><div class='add'>+	if (l-&gt;cookie) {</div><div class='add'>+		move_imm(ctx, LOONGARCH_GPR_T1, l-&gt;cookie, false);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_T1, LOONGARCH_GPR_FP, -run_ctx_off + cookie_off);</div><div class='add'>+	} else {</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_FP, -run_ctx_off + cookie_off);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* arg1: prog */</div><div class='add'>+	move_imm(ctx, LOONGARCH_GPR_A0, (const s64)p, false);</div><div class='add'>+	/* arg2: &amp;run_ctx */</div><div class='add'>+	emit_insn(ctx, addid, LOONGARCH_GPR_A1, LOONGARCH_GPR_FP, -run_ctx_off);</div><div class='add'>+	ret = emit_call(ctx, (const u64)bpf_trampoline_enter(p));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* store prog start time */</div><div class='add'>+	move_reg(ctx, LOONGARCH_GPR_S1, LOONGARCH_GPR_A0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if (__bpf_prog_enter(prog) == 0)</div><div class='add'>+	 *      goto skip_exec_of_prog;</div><div class='add'>+	 */</div><div class='add'>+	branch = (u32 *)ctx-&gt;image + ctx-&gt;idx;</div><div class='add'>+	/* nop reserved for conditional jump */</div><div class='add'>+	emit_insn(ctx, nop);</div><div class='add'>+</div><div class='add'>+	/* arg1: &amp;args_off */</div><div class='add'>+	emit_insn(ctx, addid, LOONGARCH_GPR_A0, LOONGARCH_GPR_FP, -args_off);</div><div class='add'>+	if (!p-&gt;jited)</div><div class='add'>+		move_imm(ctx, LOONGARCH_GPR_A1, (const s64)p-&gt;insnsi, false);</div><div class='add'>+	ret = emit_call(ctx, (const u64)p-&gt;bpf_func);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (save_ret) {</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_A0, LOONGARCH_GPR_FP, -retval_off);</div><div class='add'>+		emit_insn(ctx, std, regmap[BPF_REG_0], LOONGARCH_GPR_FP, -(retval_off - 8));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update branch with beqz */</div><div class='add'>+	if (ctx-&gt;image) {</div><div class='add'>+		int offset = (void *)(&amp;ctx-&gt;image[ctx-&gt;idx]) - (void *)branch;</div><div class='add'>+		*branch = larch_insn_gen_beq(LOONGARCH_GPR_A0, LOONGARCH_GPR_ZERO, offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* arg1: prog */</div><div class='add'>+	move_imm(ctx, LOONGARCH_GPR_A0, (const s64)p, false);</div><div class='add'>+	/* arg2: prog start time */</div><div class='add'>+	move_reg(ctx, LOONGARCH_GPR_A1, LOONGARCH_GPR_S1);</div><div class='add'>+	/* arg3: &amp;run_ctx */</div><div class='add'>+	emit_insn(ctx, addid, LOONGARCH_GPR_A2, LOONGARCH_GPR_FP, -run_ctx_off);</div><div class='add'>+	ret = emit_call(ctx, (const u64)bpf_trampoline_exit(p));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='add'>+			       int args_off, int retval_off, int run_ctx_off, u32 **branches)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	emit_insn(ctx, std, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_FP, -retval_off);</div><div class='add'>+	for (i = 0; i &lt; tl-&gt;nr_links; i++) {</div><div class='add'>+		invoke_bpf_prog(ctx, tl-&gt;links[i], args_off, retval_off, run_ctx_off, true);</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_T1, LOONGARCH_GPR_FP, -retval_off);</div><div class='add'>+		branches[i] = (u32 *)ctx-&gt;image + ctx-&gt;idx;</div><div class='add'>+		emit_insn(ctx, nop);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *arch_alloc_bpf_trampoline(unsigned int size)</div><div class='add'>+{</div><div class='add'>+	return bpf_prog_pack_alloc(size, jit_fill_hole);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_free_bpf_trampoline(void *image, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	bpf_prog_pack_free(image, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Sign-extend the register if necessary</div><div class='add'>+ */</div><div class='add'>+static void sign_extend(struct jit_ctx *ctx, int rd, int rj, u8 size, bool sign)</div><div class='add'>+{</div><div class='add'>+	/* ABI requires unsigned char/short to be zero-extended */</div><div class='add'>+	if (!sign &amp;&amp; (size == 1 || size == 2)) {</div><div class='add'>+		if (rd != rj)</div><div class='add'>+			move_reg(ctx, rd, rj);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		emit_insn(ctx, extwb, rd, rj);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		emit_insn(ctx, extwh, rd, rj);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		emit_insn(ctx, addiw, rd, rj, 0);</div><div class='add'>+		break;</div><div class='add'>+	case 8:</div><div class='add'>+		if (rd != rj)</div><div class='add'>+			move_reg(ctx, rd, rj);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_warn("bpf_jit: invalid size %d for sign_extend\n", size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __arch_prepare_bpf_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='add'>+					 const struct btf_func_model *m, struct bpf_tramp_links *tlinks,</div><div class='add'>+					 void *func_addr, u32 flags)</div><div class='add'>+{</div><div class='add'>+	int i, ret, save_ret;</div><div class='add'>+	int stack_size, nargs;</div><div class='add'>+	int retval_off, args_off, nargs_off, ip_off, run_ctx_off, sreg_off, tcc_ptr_off;</div><div class='add'>+	bool is_struct_ops = flags &amp; BPF_TRAMP_F_INDIRECT;</div><div class='add'>+	void *orig_call = func_addr;</div><div class='add'>+	struct bpf_tramp_links *fentry = &amp;tlinks[BPF_TRAMP_FENTRY];</div><div class='add'>+	struct bpf_tramp_links *fexit = &amp;tlinks[BPF_TRAMP_FEXIT];</div><div class='add'>+	struct bpf_tramp_links *fmod_ret = &amp;tlinks[BPF_TRAMP_MODIFY_RETURN];</div><div class='add'>+	u32 **branches = NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * FP + 8       [ RA to parent func ] return address to parent</div><div class='add'>+	 *                    function</div><div class='add'>+	 * FP + 0       [ FP of parent func ] frame pointer of parent</div><div class='add'>+	 *                    function</div><div class='add'>+	 * FP - 8       [ T0 to traced func ] return address of traced</div><div class='add'>+	 *                    function</div><div class='add'>+	 * FP - 16      [ FP of traced func ] frame pointer of traced</div><div class='add'>+	 *                    function</div><div class='add'>+	 *</div><div class='add'>+	 * FP - retval_off  [ return value      ] BPF_TRAMP_F_CALL_ORIG or</div><div class='add'>+	 *                    BPF_TRAMP_F_RET_FENTRY_RET</div><div class='add'>+	 *                  [ argN              ]</div><div class='add'>+	 *                  [ ...               ]</div><div class='add'>+	 * FP - args_off    [ arg1              ]</div><div class='add'>+	 *</div><div class='add'>+	 * FP - nargs_off   [ regs count        ]</div><div class='add'>+	 *</div><div class='add'>+	 * FP - ip_off      [ traced func   ] BPF_TRAMP_F_IP_ARG</div><div class='add'>+	 *</div><div class='add'>+	 * FP - run_ctx_off [ bpf_tramp_run_ctx ]</div><div class='add'>+	 *</div><div class='add'>+	 * FP - sreg_off    [ callee saved reg  ]</div><div class='add'>+	 *</div><div class='add'>+	 * FP - tcc_ptr_off [ tail_call_cnt_ptr ]</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (m-&gt;nr_args &gt; LOONGARCH_MAX_REG_ARGS)</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* FIXME: No support of struct argument */</div><div class='add'>+	for (i = 0; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		if (m-&gt;arg_flags[i] &amp; BTF_FMODEL_STRUCT_ARG)</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; (BPF_TRAMP_F_ORIG_STACK | BPF_TRAMP_F_SHARE_IPMODIFY))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store return address and frame pointer */</div><div class='add'>+	stack_size = 16;</div><div class='add'>+</div><div class='add'>+	save_ret = flags &amp; (BPF_TRAMP_F_CALL_ORIG | BPF_TRAMP_F_RET_FENTRY_RET);</div><div class='add'>+	if (save_ret)</div><div class='add'>+		stack_size += 16; /* Save BPF R0 and A0 */</div><div class='add'>+</div><div class='add'>+	retval_off = stack_size;</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store args */</div><div class='add'>+	nargs = m-&gt;nr_args;</div><div class='add'>+	stack_size += nargs * 8;</div><div class='add'>+	args_off = stack_size;</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store args number */</div><div class='add'>+	stack_size += 8;</div><div class='add'>+	nargs_off = stack_size;</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store ip address */</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_IP_ARG) {</div><div class='add'>+		stack_size += 8;</div><div class='add'>+		ip_off = stack_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store struct bpf_tramp_run_ctx */</div><div class='add'>+	stack_size += round_up(sizeof(struct bpf_tramp_run_ctx), 8);</div><div class='add'>+	run_ctx_off = stack_size;</div><div class='add'>+</div><div class='add'>+	stack_size += 8;</div><div class='add'>+	sreg_off = stack_size;</div><div class='add'>+</div><div class='add'>+	/* Room of trampoline frame to store tail_call_cnt_ptr */</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX) {</div><div class='add'>+		stack_size += 8;</div><div class='add'>+		tcc_ptr_off = stack_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stack_size = round_up(stack_size, 16);</div><div class='add'>+</div><div class='add'>+	if (is_struct_ops) {</div><div class='add'>+		/*</div><div class='add'>+		 * For the trampoline called directly, just handle</div><div class='add'>+		 * the frame of trampoline.</div><div class='add'>+		 */</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, -stack_size);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_RA, LOONGARCH_GPR_SP, stack_size - 8);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size - 16);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * For the trampoline called from function entry,</div><div class='add'>+		 * the frame of traced function and the frame of</div><div class='add'>+		 * trampoline need to be considered.</div><div class='add'>+		 */</div><div class='add'>+		/* RA and FP for parent function */</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, -16);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_RA, LOONGARCH_GPR_SP, 8);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, 0);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, 16);</div><div class='add'>+</div><div class='add'>+		/* RA and FP for traced function */</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, -stack_size);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_T0, LOONGARCH_GPR_SP, stack_size - 8);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size - 16);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX)</div><div class='add'>+		emit_insn(ctx, std, REG_TCC, LOONGARCH_GPR_FP, -tcc_ptr_off);</div><div class='add'>+</div><div class='add'>+	/* callee saved register S1 to pass start time */</div><div class='add'>+	emit_insn(ctx, std, LOONGARCH_GPR_S1, LOONGARCH_GPR_FP, -sreg_off);</div><div class='add'>+</div><div class='add'>+	/* store ip address of the traced function */</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_IP_ARG) {</div><div class='add'>+		move_imm(ctx, LOONGARCH_GPR_T1, (const s64)func_addr, false);</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_T1, LOONGARCH_GPR_FP, -ip_off);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* store nargs number */</div><div class='add'>+	move_imm(ctx, LOONGARCH_GPR_T1, nargs, false);</div><div class='add'>+	emit_insn(ctx, std, LOONGARCH_GPR_T1, LOONGARCH_GPR_FP, -nargs_off);</div><div class='add'>+</div><div class='add'>+	store_args(ctx, nargs, args_off);</div><div class='add'>+</div><div class='add'>+	/* To traced function */</div><div class='add'>+	/* Ftrace jump skips 2 NOP instructions */</div><div class='add'>+	if (is_kernel_text((unsigned long)orig_call))</div><div class='add'>+		orig_call += LOONGARCH_FENTRY_NBYTES;</div><div class='add'>+	/* Direct jump skips 5 NOP instructions */</div><div class='add'>+	else if (is_bpf_text_address((unsigned long)orig_call))</div><div class='add'>+		orig_call += LOONGARCH_BPF_FENTRY_NBYTES;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		move_addr(ctx, LOONGARCH_GPR_A0, (const u64)im);</div><div class='add'>+		ret = emit_call(ctx, (const u64)__bpf_tramp_enter);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fentry-&gt;nr_links; i++) {</div><div class='add'>+		ret = invoke_bpf_prog(ctx, fentry-&gt;links[i], args_off, retval_off,</div><div class='add'>+				      run_ctx_off, flags &amp; BPF_TRAMP_F_RET_FENTRY_RET);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	if (fmod_ret-&gt;nr_links) {</div><div class='add'>+		branches  = kcalloc(fmod_ret-&gt;nr_links, sizeof(u32 *), GFP_KERNEL);</div><div class='add'>+		if (!branches)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		invoke_bpf_mod_ret(ctx, fmod_ret, args_off, retval_off, run_ctx_off, branches);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		restore_args(ctx, m-&gt;nr_args, args_off);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX)</div><div class='add'>+			emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_FP, -tcc_ptr_off);</div><div class='add'>+</div><div class='add'>+		ret = emit_call(ctx, (const u64)orig_call);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+		emit_insn(ctx, std, LOONGARCH_GPR_A0, LOONGARCH_GPR_FP, -retval_off);</div><div class='add'>+		emit_insn(ctx, std, regmap[BPF_REG_0], LOONGARCH_GPR_FP, -(retval_off - 8));</div><div class='add'>+		im-&gt;ip_after_call = ctx-&gt;ro_image + ctx-&gt;idx;</div><div class='add'>+		/* Reserve space for the move_imm + jirl instruction */</div><div class='add'>+		for (i = 0; i &lt; LOONGARCH_LONG_JUMP_NINSNS; i++)</div><div class='add'>+			emit_insn(ctx, nop);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; ctx-&gt;image &amp;&amp; i &lt; fmod_ret-&gt;nr_links; i++) {</div><div class='add'>+		int offset = (void *)(&amp;ctx-&gt;image[ctx-&gt;idx]) - (void *)branches[i];</div><div class='add'>+		*branches[i] = larch_insn_gen_bne(LOONGARCH_GPR_T1, LOONGARCH_GPR_ZERO, offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fexit-&gt;nr_links; i++) {</div><div class='add'>+		ret = invoke_bpf_prog(ctx, fexit-&gt;links[i], args_off, retval_off, run_ctx_off, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		im-&gt;ip_epilogue = ctx-&gt;ro_image + ctx-&gt;idx;</div><div class='add'>+		move_addr(ctx, LOONGARCH_GPR_A0, (const u64)im);</div><div class='add'>+		ret = emit_call(ctx, (const u64)__bpf_tramp_exit);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_RESTORE_REGS)</div><div class='add'>+		restore_args(ctx, m-&gt;nr_args, args_off);</div><div class='add'>+</div><div class='add'>+	if (save_ret) {</div><div class='add'>+		emit_insn(ctx, ldd, regmap[BPF_REG_0], LOONGARCH_GPR_FP, -(retval_off - 8));</div><div class='add'>+		if (is_struct_ops)</div><div class='add'>+			sign_extend(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0],</div><div class='add'>+				    m-&gt;ret_size, m-&gt;ret_flags &amp; BTF_FMODEL_SIGNED_ARG);</div><div class='add'>+		else</div><div class='add'>+			emit_insn(ctx, ldd, LOONGARCH_GPR_A0, LOONGARCH_GPR_FP, -retval_off);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_insn(ctx, ldd, LOONGARCH_GPR_S1, LOONGARCH_GPR_FP, -sreg_off);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX)</div><div class='add'>+		emit_insn(ctx, ldd, REG_TCC, LOONGARCH_GPR_FP, -tcc_ptr_off);</div><div class='add'>+</div><div class='add'>+	if (is_struct_ops) {</div><div class='add'>+		/* trampoline called directly */</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_RA, LOONGARCH_GPR_SP, stack_size - 8);</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size - 16);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, stack_size);</div><div class='add'>+</div><div class='add'>+		emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0);</div><div class='add'>+	} else {</div><div class='add'>+		/* trampoline called from function entry */</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_T0, LOONGARCH_GPR_SP, stack_size - 8);</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, stack_size - 16);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, stack_size);</div><div class='add'>+</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_RA, LOONGARCH_GPR_SP, 8);</div><div class='add'>+		emit_insn(ctx, ldd, LOONGARCH_GPR_FP, LOONGARCH_GPR_SP, 0);</div><div class='add'>+		emit_insn(ctx, addid, LOONGARCH_GPR_SP, LOONGARCH_GPR_SP, 16);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; BPF_TRAMP_F_SKIP_FRAME)</div><div class='add'>+			/* return to parent function */</div><div class='add'>+			emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0);</div><div class='add'>+		else</div><div class='add'>+			/* return to traced function */</div><div class='add'>+			emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T0, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ctx-&gt;idx;</div><div class='add'>+out:</div><div class='add'>+	kfree(branches);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='add'>+				void *ro_image_end, const struct btf_func_model *m,</div><div class='add'>+				u32 flags, struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='add'>+{</div><div class='add'>+	int ret, size;</div><div class='add'>+	void *image, *tmp;</div><div class='add'>+	struct jit_ctx ctx;</div><div class='add'>+</div><div class='add'>+	size = ro_image_end - ro_image;</div><div class='add'>+	image = kvmalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!image)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ctx.image = (union loongarch_instruction *)image;</div><div class='add'>+	ctx.ro_image = (union loongarch_instruction *)ro_image;</div><div class='add'>+	ctx.idx = 0;</div><div class='add'>+</div><div class='add'>+	jit_fill_hole(image, (unsigned int)(ro_image_end - ro_image));</div><div class='add'>+	ret = __arch_prepare_bpf_trampoline(&amp;ctx, im, m, tlinks, func_addr, flags);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (validate_code(&amp;ctx) &lt; 0) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmp = bpf_arch_text_copy(ro_image, image, size);</div><div class='add'>+	if (IS_ERR(tmp)) {</div><div class='add'>+		ret = PTR_ERR(tmp);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kvfree(image);</div><div class='add'>+	return ret &lt; 0 ? ret : size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='add'>+			     struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct jit_ctx ctx;</div><div class='add'>+	struct bpf_tramp_image im;</div><div class='add'>+</div><div class='add'>+	ctx.image = NULL;</div><div class='add'>+	ctx.idx = 0;</div><div class='add'>+</div><div class='add'>+	ret = __arch_prepare_bpf_trampoline(&amp;ctx, &amp;im, m, tlinks, func_addr, flags);</div><div class='add'>+</div><div class='add'>+	return ret &lt; 0 ? ret : ret * LOONGARCH_INSN_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	bool tmp_blinded = false, extra_pass = false;</div><div class='hunk'>@@ -1280,7 +1886,7 @@ skip_init_ctx:</div><div class='ctx'> 	build_epilogue(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* 3. Extra pass to validate JITed code */</div><div class='del'>-	if (validate_code(&amp;ctx)) {</div><div class='add'>+	if (validate_ctx(&amp;ctx)) {</div><div class='ctx'> 		bpf_jit_binary_free(header);</div><div class='ctx'> 		prog = orig_prog;</div><div class='ctx'> 		goto out_offset;</div><div class='hunk'>@@ -1334,7 +1940,6 @@ out:</div><div class='ctx'> 	if (tmp_blinded)</div><div class='ctx'> 		bpf_jit_prog_release_other(prog, prog == orig_prog ? tmp : orig_prog);</div><div class='ctx'> </div><div class='del'>-	out_offset = -1;</div><div class='ctx'> </div><div class='ctx'> 	return prog;</div><div class='ctx'> </div><div class='hunk'>@@ -1346,6 +1951,16 @@ out_free:</div><div class='ctx'> 	goto out_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_bypass_spec_v1(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_bypass_spec_v4(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */</div><div class='ctx'> bool bpf_jit_supports_subprog_tailcalls(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/net/bpf_jit.h b/arch/loongarch/net/bpf_jit.h<br/>index 68586338ecf8..5697158fd164 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/net/bpf_jit.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/net/bpf_jit.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/net/bpf_jit.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@ struct jit_ctx {</div><div class='ctx'> 	u32 *offset;</div><div class='ctx'> 	int num_exentries;</div><div class='ctx'> 	union loongarch_instruction *image;</div><div class='add'>+	union loongarch_instruction *ro_image;</div><div class='ctx'> 	u32 stack_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -27,6 +28,11 @@ struct jit_data {</div><div class='ctx'> 	struct jit_ctx ctx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline void emit_nop(union loongarch_instruction *insn)</div><div class='add'>+{</div><div class='add'>+	insn-&gt;word = INSN_NOP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define emit_insn(ctx, func, ...)						\</div><div class='ctx'> do {										\</div><div class='ctx'> 	if (ctx-&gt;image != NULL) {						\</div><div class='hunk'>@@ -303,3 +309,8 @@ static inline int emit_tailcall_jmp(struct jit_ctx *ctx, u8 cond, enum loongarch</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline void bpf_flush_icache(void *start, void *end)</div><div class='add'>+{</div><div class='add'>+	flush_icache_range((unsigned long)start, (unsigned long)end);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/loongarch/pci/acpi.c b/arch/loongarch/pci/acpi.c<br/>index 1da4dc46df43..50c9016641a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/pci/acpi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/pci/acpi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/pci/acpi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/pci/acpi.c</a></div><div class='hunk'>@@ -194,6 +194,7 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_bus *bus;</div><div class='ctx'> 	struct pci_root_info *info;</div><div class='add'>+	struct pci_host_bridge *host;</div><div class='ctx'> 	struct acpi_pci_root_ops *root_ops;</div><div class='ctx'> 	int domain = root-&gt;segment;</div><div class='ctx'> 	int busnum = root-&gt;secondary.start;</div><div class='hunk'>@@ -237,8 +238,17 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pci_bus_size_bridges(bus);</div><div class='del'>-		pci_bus_assign_resources(bus);</div><div class='add'>+		/* If we must preserve the resource configuration, claim now */</div><div class='add'>+		host = pci_find_host_bridge(bus);</div><div class='add'>+		if (host-&gt;preserve_config)</div><div class='add'>+			pci_bus_claim_resources(bus);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Assign whatever was left unassigned. If we didn't claim above,</div><div class='add'>+		 * this will reassign everything.</div><div class='add'>+		 */</div><div class='add'>+		pci_assign_unassigned_root_bus_resources(bus);</div><div class='add'>+</div><div class='ctx'> 		list_for_each_entry(child, &amp;bus-&gt;children, node)</div><div class='ctx'> 			pcie_bus_configure_settings(child);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/loongarch/pci/pci.c b/arch/loongarch/pci/pci.c<br/>index 2726639150bc..5bc9627a6cf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/pci/pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/pci/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/pci/pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/pci/pci.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'>  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='head'>diff --git a/arch/loongarch/power/hibernate.c b/arch/loongarch/power/hibernate.c<br/>index 1e0590542f98..e7b7346592cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/hibernate.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/hibernate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/hibernate.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/power/hibernate.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/loongson.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -14,6 +15,7 @@ struct pt_regs saved_regs;</div><div class='ctx'> </div><div class='ctx'> void save_processor_state(void)</div><div class='ctx'> {</div><div class='add'>+	save_counter();</div><div class='ctx'> 	saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);</div><div class='ctx'> 	saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);</div><div class='ctx'> 	saved_euen = csr_read32(LOONGARCH_CSR_EUEN);</div><div class='hunk'>@@ -26,6 +28,7 @@ void save_processor_state(void)</div><div class='ctx'> </div><div class='ctx'> void restore_processor_state(void)</div><div class='ctx'> {</div><div class='add'>+	sync_counter();</div><div class='ctx'> 	csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);</div><div class='ctx'> 	csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);</div><div class='ctx'> 	csr_write32(saved_euen, LOONGARCH_CSR_EUEN);</div><div class='head'>diff --git a/arch/loongarch/power/platform.c b/arch/loongarch/power/platform.c<br/>index 0909729dc2e1..5bbdb9fd76e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/platform.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/platform.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/power/platform.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@ void enable_gpe_wakeup(void)</div><div class='ctx'> 	if (acpi_gbl_reduced_hardware)</div><div class='ctx'> 	       return;</div><div class='ctx'> </div><div class='del'>-	acpi_enable_all_wakeup_gpes();</div><div class='add'>+	acpi_hw_enable_all_wakeup_gpes();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void enable_pci_wakeup(void)</div><div class='head'>diff --git a/arch/loongarch/power/suspend_asm.S b/arch/loongarch/power/suspend_asm.S<br/>index 9fe28d5a0270..df0865df26fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/suspend_asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/power/suspend_asm.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/power/suspend_asm.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/power/suspend_asm.S</a></div><div class='hunk'>@@ -30,9 +30,6 @@</div><div class='ctx'> 	st.d		$r29, sp, PT_R29</div><div class='ctx'> 	st.d		$r30, sp, PT_R30</div><div class='ctx'> 	st.d		$r31, sp, PT_R31</div><div class='del'>-</div><div class='del'>-	la.pcrel	t0, acpi_saved_sp</div><div class='del'>-	st.d		sp, t0, 0</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro SETUP_WAKEUP</div><div class='hunk'>@@ -51,6 +48,7 @@</div><div class='ctx'> 	ld.d		$r29, sp, PT_R29</div><div class='ctx'> 	ld.d		$r30, sp, PT_R30</div><div class='ctx'> 	ld.d		$r31, sp, PT_R31</div><div class='add'>+	addi.d		sp, sp, PT_SIZE</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='hunk'>@@ -59,6 +57,10 @@</div><div class='ctx'> /* Sleep/wakeup code for Loongson-3 */</div><div class='ctx'> SYM_FUNC_START(loongarch_suspend_enter)</div><div class='ctx'> 	SETUP_SLEEP</div><div class='add'>+</div><div class='add'>+	la.pcrel	t0, acpi_saved_sp</div><div class='add'>+	st.d		sp, t0, 0</div><div class='add'>+</div><div class='ctx'> 	bl		__flush_cache_all</div><div class='ctx'> </div><div class='ctx'> 	/* Pass RA and SP to BIOS */</div><div class='hunk'>@@ -82,7 +84,7 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)</div><div class='ctx'> </div><div class='ctx'> 	la.pcrel	t0, acpi_saved_sp</div><div class='ctx'> 	ld.d		sp, t0, 0</div><div class='add'>+</div><div class='ctx'> 	SETUP_WAKEUP</div><div class='del'>-	addi.d		sp, sp, PT_SIZE</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(loongarch_suspend_enter)</div><div class='head'>diff --git a/arch/loongarch/vdso/Makefile b/arch/loongarch/vdso/Makefile<br/>index 40c1175823d6..d8316f993482 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/vdso/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Objects to go into the VDSO.</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> obj-vdso-y := elf.o vgetcpu.o vgettimeofday.o vgetrandom.o \</div><div class='ctx'>               vgetrandom-chacha.o sigreturn.o</div><div class='hunk'>@@ -19,7 +19,7 @@ ccflags-vdso := \</div><div class='ctx'> cflags-vdso := $(ccflags-vdso) \</div><div class='ctx'> 	-isystem $(shell $(CC) -print-file-name=include) \</div><div class='ctx'> 	$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \</div><div class='del'>-	-O2 -g -fno-strict-aliasing -fno-common -fno-builtin \</div><div class='add'>+	-std=gnu11 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \</div><div class='ctx'> 	-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \</div><div class='ctx'> 	$(call cc-option, -fno-asynchronous-unwind-tables) \</div><div class='ctx'> 	$(call cc-option, -fno-stack-protector)</div><div class='hunk'>@@ -36,8 +36,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> # VDSO linker flags.</div><div class='ctx'> ldflags-y := -Bsymbolic --no-undefined -soname=linux-vdso.so.1 \</div><div class='del'>-	$(filter -E%,$(KBUILD_CFLAGS)) -nostdlib -shared \</div><div class='del'>-	--hash-style=sysv --build-id -T</div><div class='add'>+	$(filter -E%,$(KBUILD_CFLAGS)) -shared --build-id -T</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Shared build commands.</div><div class='head'>diff --git a/arch/loongarch/vdso/vdso.lds.S b/arch/loongarch/vdso/vdso.lds.S<br/>index 6b441bde4026..8ff986499947 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/vdso/vdso.lds.S</a></div><div class='hunk'>@@ -3,6 +3,9 @@</div><div class='ctx'>  * Author: Huacai Chen &lt;chenhuacai@loongson.cn&gt;</div><div class='ctx'>  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited</div><div class='ctx'>  */</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;generated/asm-offsets.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> OUTPUT_FORMAT("elf64-loongarch", "elf64-loongarch", "elf64-loongarch")</div><div class='ctx'> </div><div class='hunk'>@@ -10,7 +13,8 @@ OUTPUT_ARCH(loongarch)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_start = .);</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='ctx'> 	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	.hash		: { *(.hash) }			:text</div><div class='head'>diff --git a/arch/loongarch/vdso/vgetcpu.c b/arch/loongarch/vdso/vgetcpu.c<br/>index 9e445be39763..5301cd9d0f83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vgetcpu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vgetcpu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vgetcpu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/vdso/vgetcpu.c</a></div><div class='hunk'>@@ -19,27 +19,19 @@ static __always_inline int read_cpu_id(void)</div><div class='ctx'> 	return cpu_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_pcpu_data *get_pcpu_data(void)</div><div class='del'>-{</div><div class='del'>-	return (struct vdso_pcpu_data *)(get_vdso_data() + VVAR_LOONGARCH_PAGES_START * PAGE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern</div><div class='ctx'> int __vdso_getcpu(unsigned int *cpu, unsigned int *node, struct getcpu_cache *unused);</div><div class='ctx'> int __vdso_getcpu(unsigned int *cpu, unsigned int *node, struct getcpu_cache *unused)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu_id;</div><div class='del'>-	const struct vdso_pcpu_data *data;</div><div class='ctx'> </div><div class='ctx'> 	cpu_id = read_cpu_id();</div><div class='ctx'> </div><div class='ctx'> 	if (cpu)</div><div class='ctx'> 		*cpu = cpu_id;</div><div class='ctx'> </div><div class='del'>-	if (node) {</div><div class='del'>-		data = get_pcpu_data();</div><div class='del'>-		*node = data[cpu_id].node;</div><div class='del'>-	}</div><div class='add'>+	if (node)</div><div class='add'>+		*node = vdso_u_arch_data.pdata[cpu_id].node;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/vdso/vgetrandom-chacha.S b/arch/loongarch/vdso/vgetrandom-chacha.S<br/>index c2733e6c3a8d..c4dd2bab8825 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vgetrandom-chacha.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/loongarch/vdso/vgetrandom-chacha.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/loongarch/vdso/vgetrandom-chacha.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/loongarch/vdso/vgetrandom-chacha.S</a></div><div class='hunk'>@@ -58,9 +58,7 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)</div><div class='ctx'> #define copy0		t5</div><div class='ctx'> #define copy1		t6</div><div class='ctx'> #define copy2		t7</div><div class='del'>-</div><div class='del'>-/* Reuse i as copy3 */</div><div class='del'>-#define copy3		i</div><div class='add'>+#define copy3		t8</div><div class='ctx'> </div><div class='ctx'> /* Packs to be used with OP_4REG */</div><div class='ctx'> #define line0		state0, state1, state2, state3</div><div class='hunk'>@@ -99,6 +97,7 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)</div><div class='ctx'> 	li.w		copy0, 0x61707865</div><div class='ctx'> 	li.w		copy1, 0x3320646e</div><div class='ctx'> 	li.w		copy2, 0x79622d32</div><div class='add'>+	li.w		copy3, 0x6b206574</div><div class='ctx'> </div><div class='ctx'> 	ld.w		cnt_lo, counter, 0</div><div class='ctx'> 	ld.w		cnt_hi, counter, 4</div><div class='hunk'>@@ -108,7 +107,7 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)</div><div class='ctx'> 	move		state0, copy0</div><div class='ctx'> 	move		state1, copy1</div><div class='ctx'> 	move		state2, copy2</div><div class='del'>-	li.w		state3, 0x6b206574</div><div class='add'>+	move		state3, copy3</div><div class='ctx'> </div><div class='ctx'> 	/* state[4,5,..,11] = key */</div><div class='ctx'> 	ld.w		state4, key, 0</div><div class='hunk'>@@ -167,12 +166,6 @@ SYM_FUNC_START(__arch_chacha20_blocks_nostack)</div><div class='ctx'> 	addi.w		i, i, -1</div><div class='ctx'> 	bnez		i, .Lpermute</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * copy[3] = "expa", materialize it here because copy[3] shares the</div><div class='del'>-	 * same register with i which just became dead.</div><div class='del'>-	 */</div><div class='del'>-	li.w		copy3, 0x6b206574</div><div class='del'>-</div><div class='ctx'> 	/* output[0,1,2,3] = copy[0,1,2,3] + state[0,1,2,3] */</div><div class='ctx'> 	OP_4REG	add.w	line0, copy</div><div class='ctx'> 	st.w		state0, output, 0</div><div class='head'>diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig<br/>index cc26df907bfe..11835eb59d94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/Kconfig</a></div><div class='hunk'>@@ -18,17 +18,21 @@ config M68K</div><div class='ctx'> 	select DMA_DIRECT_REMAP if M68K_NONCOHERENT_DMA &amp;&amp; !COLDFIRE</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='del'>-	select GENERIC_IOMAP if HAS_IOPORT</div><div class='add'>+	select GENERIC_IOMAP if HAS_IOPORT &amp;&amp; MMU &amp;&amp; !COLDFIRE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_LIB_ASHLDI3</div><div class='ctx'> 	select GENERIC_LIB_ASHRDI3</div><div class='ctx'> 	select GENERIC_LIB_LSHRDI3</div><div class='add'>+	select GENERIC_LIB_MULDI3</div><div class='add'>+	select GENERIC_PCI_IOMAP if PCI</div><div class='ctx'> 	select HAS_IOPORT if PCI || ISA || ATARI_ROM_ISA</div><div class='add'>+	select HAVE_ARCH_LIBGCC_H</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER</div><div class='ctx'> 	select HAVE_ASM_MODVERSIONS</div><div class='ctx'> 	select HAVE_DEBUG_BUGVERBOSE</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS if !CPU_HAS_NO_UNALIGNED</div><div class='add'>+	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION</div><div class='ctx'> 	select HAVE_MOD_ARCH_SPECIFIC</div><div class='ctx'> 	select HAVE_UID16</div><div class='ctx'> 	select MMU_GATHER_NO_RANGE if MMU</div><div class='hunk'>@@ -84,24 +88,23 @@ config MMU</div><div class='ctx'> 	  support by paged memory management. If unsure, say 'Y'.</div><div class='ctx'> </div><div class='ctx'> config MMU_MOTOROLA</div><div class='del'>-	bool</div><div class='add'>+	def_bool MMU &amp;&amp; M68KCLASSIC</div><div class='ctx'> 	select HAVE_PAGE_SIZE_4KB</div><div class='ctx'> </div><div class='ctx'> config MMU_COLDFIRE</div><div class='add'>+	def_bool MMU &amp;&amp; COLDFIRE</div><div class='ctx'> 	select HAVE_PAGE_SIZE_8KB</div><div class='del'>-	bool</div><div class='ctx'> </div><div class='ctx'> config MMU_SUN3</div><div class='del'>-	bool</div><div class='add'>+	def_bool MMU &amp;&amp; SUN3</div><div class='ctx'> 	select HAVE_PAGE_SIZE_8KB</div><div class='del'>-	depends on MMU &amp;&amp; !MMU_MOTOROLA &amp;&amp; !MMU_COLDFIRE</div><div class='ctx'> </div><div class='ctx'> config ARCH_SUPPORTS_KEXEC</div><div class='del'>-	def_bool M68KCLASSIC &amp;&amp; MMU</div><div class='add'>+	def_bool (M68KCLASSIC || SUN3) &amp;&amp; MMU</div><div class='ctx'> </div><div class='ctx'> config BOOTINFO_PROC</div><div class='ctx'> 	bool "Export bootinfo in procfs"</div><div class='del'>-	depends on KEXEC &amp;&amp; M68KCLASSIC</div><div class='add'>+	depends on KEXEC &amp;&amp; (M68KCLASSIC || SUN3)</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y to export the bootinfo used to boot the kernel in a</div><div class='ctx'> 	  "bootinfo" file in procfs.  This is useful with kexec.</div><div class='head'>diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu<br/>index c777a129768a..c9a7e602d8a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.cpu?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.cpu</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.cpu?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/Kconfig.cpu</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> comment "Processor Type"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='del'>-	prompt "CPU family support"</div><div class='add'>+	prompt "CPU/machine family support"</div><div class='ctx'> 	default M68KCLASSIC if MMU</div><div class='ctx'> 	default COLDFIRE if !MMU</div><div class='ctx'> 	help</div><div class='hunk'>@@ -19,8 +19,9 @@ choice</div><div class='ctx'> 	  processor, select COLDFIRE.</div><div class='ctx'> </div><div class='ctx'> config M68KCLASSIC</div><div class='del'>-	bool "Classic M68K CPU family support"</div><div class='add'>+	bool "Classic M68K CPU/machine family support"</div><div class='ctx'> 	select HAVE_ARCH_PFN_VALID</div><div class='add'>+	select M68020 if MMU &amp;&amp; !(M68030 || M68040 || M68060)</div><div class='ctx'> </div><div class='ctx'> config COLDFIRE</div><div class='ctx'> 	bool "Coldfire CPU family support"</div><div class='hunk'>@@ -32,13 +33,23 @@ config COLDFIRE</div><div class='ctx'> 	select HAVE_LEGACY_CLK</div><div class='ctx'> 	select HAVE_PAGE_SIZE_8KB if !MMU</div><div class='ctx'> </div><div class='del'>-endchoice</div><div class='add'>+config SUN3</div><div class='add'>+	bool "Sun3 machine support"</div><div class='add'>+	depends on MMU</div><div class='add'>+	select HAVE_ARCH_PFN_VALID</div><div class='add'>+	select LEGACY_TIMER_TICK</div><div class='add'>+	select NO_DMA</div><div class='add'>+	select M68020</div><div class='add'>+	help</div><div class='add'>+	  This option enables support for the Sun 3 series of workstations</div><div class='add'>+	  (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU</div><div class='add'>+	  but the custom memory management unit makes them incompatible with</div><div class='add'>+	  all other classic m68k machines, including Sun 3x.</div><div class='ctx'> </div><div class='del'>-if M68KCLASSIC</div><div class='add'>+endchoice</div><div class='ctx'> </div><div class='ctx'> config M68000</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on !MMU</div><div class='add'>+	def_bool M68KCLASSIC &amp;&amp; !MMU</div><div class='ctx'> 	select CPU_HAS_NO_BITFIELDS</div><div class='ctx'> 	select CPU_HAS_NO_CAS</div><div class='ctx'> 	select CPU_HAS_NO_MULDIV64</div><div class='hunk'>@@ -56,7 +67,7 @@ config M68000</div><div class='ctx'> 	  a paging MMU.</div><div class='ctx'> </div><div class='ctx'> config M68020</div><div class='del'>-	bool "68020 support"</div><div class='add'>+	bool "68020 support" if M68KCLASSIC</div><div class='ctx'> 	depends on MMU</div><div class='ctx'> 	select FPU</div><div class='ctx'> 	select CPU_HAS_ADDRESS_SPACES</div><div class='hunk'>@@ -66,9 +77,10 @@ config M68020</div><div class='ctx'> 	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the</div><div class='ctx'> 	  Sun 3, which provides its own version.</div><div class='ctx'> </div><div class='add'>+if M68KCLASSIC &amp;&amp; MMU</div><div class='add'>+</div><div class='ctx'> config M68030</div><div class='ctx'> 	bool "68030 support"</div><div class='del'>-	depends on MMU &amp;&amp; !MMU_SUN3</div><div class='ctx'> 	select FPU</div><div class='ctx'> 	select CPU_HAS_ADDRESS_SPACES</div><div class='ctx'> 	help</div><div class='hunk'>@@ -78,7 +90,6 @@ config M68030</div><div class='ctx'> </div><div class='ctx'> config M68040</div><div class='ctx'> 	bool "68040 support"</div><div class='del'>-	depends on MMU &amp;&amp; !MMU_SUN3</div><div class='ctx'> 	select FPU</div><div class='ctx'> 	select CPU_HAS_ADDRESS_SPACES</div><div class='ctx'> 	help</div><div class='hunk'>@@ -89,13 +100,14 @@ config M68040</div><div class='ctx'> </div><div class='ctx'> config M68060</div><div class='ctx'> 	bool "68060 support"</div><div class='del'>-	depends on MMU &amp;&amp; !MMU_SUN3</div><div class='ctx'> 	select FPU</div><div class='ctx'> 	select CPU_HAS_ADDRESS_SPACES</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you anticipate running this kernel on a computer with a MC68060</div><div class='ctx'> 	  processor, say Y. Otherwise, say N.</div><div class='ctx'> </div><div class='add'>+endif # M68KCLASSIC</div><div class='add'>+</div><div class='ctx'> config M68328</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on !MMU</div><div class='hunk'>@@ -117,8 +129,6 @@ config M68VZ328</div><div class='ctx'> 	help</div><div class='ctx'> 	  Motorola 68VZ328 processor support.</div><div class='ctx'> </div><div class='del'>-endif # M68KCLASSIC</div><div class='del'>-</div><div class='ctx'> if COLDFIRE</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='hunk'>@@ -325,7 +335,7 @@ comment "Processor Specific Options"</div><div class='ctx'> </div><div class='ctx'> config M68KFPU_EMU</div><div class='ctx'> 	bool "Math emulation support"</div><div class='del'>-	depends on M68KCLASSIC &amp;&amp; FPU</div><div class='add'>+	depends on (M68KCLASSIC || SUN3) &amp;&amp; FPU</div><div class='ctx'> 	help</div><div class='ctx'> 	  At some point in the future, this will cause floating-point math</div><div class='ctx'> 	  instructions to be emulated by the kernel on machines that lack a</div><div class='head'>diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug<br/>index 30638a6e8edc..d036f903864c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.debug?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.debug</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.debug?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/Kconfig.debug</a></div><div class='hunk'>@@ -10,7 +10,7 @@ config BOOTPARAM_STRING</div><div class='ctx'> </div><div class='ctx'> config EARLY_PRINTK</div><div class='ctx'> 	bool "Early printk"</div><div class='del'>-	depends on !(SUN3 || M68000 || COLDFIRE)</div><div class='add'>+	depends on MMU_MOTOROLA</div><div class='ctx'> 	help</div><div class='ctx'> 	  Write kernel log output directly to a serial port.</div><div class='ctx'> 	  Where implemented, output goes to the framebuffer as well.</div><div class='head'>diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine<br/>index d06b1c5d9b0c..de39f23b180e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.machine?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/Kconfig.machine</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/Kconfig.machine?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/Kconfig.machine</a></div><div class='hunk'>@@ -6,7 +6,6 @@ if M68KCLASSIC</div><div class='ctx'> config AMIGA</div><div class='ctx'> 	bool "Amiga support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Amiga series of computers. If</div><div class='hunk'>@@ -16,7 +15,6 @@ config AMIGA</div><div class='ctx'> config ATARI</div><div class='ctx'> 	bool "Atari support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select HAVE_ARCH_NVRAM_OPS</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='ctx'> 	help</div><div class='hunk'>@@ -31,7 +29,6 @@ config ATARI_KBD_CORE</div><div class='ctx'> config MAC</div><div class='ctx'> 	bool "Macintosh support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select HAVE_ARCH_NVRAM_OPS</div><div class='ctx'> 	select HAVE_PATA_PLATFORM</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='hunk'>@@ -44,7 +41,6 @@ config MAC</div><div class='ctx'> config APOLLO</div><div class='ctx'> 	bool "Apollo support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to run Linux on an MC680x0-based Apollo</div><div class='hunk'>@@ -53,7 +49,6 @@ config APOLLO</div><div class='ctx'> config VME</div><div class='ctx'> 	bool "VME (Motorola and BVM) support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to build a kernel for a 680x0 based VME</div><div class='ctx'> 	  board.  Boards currently supported include Motorola boards MVME147,</div><div class='hunk'>@@ -97,7 +92,6 @@ config BVME6000</div><div class='ctx'> config HP300</div><div class='ctx'> 	bool "HP9000/300 and HP9000/400 support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the HP9000/300 and HP9000/400 series</div><div class='hunk'>@@ -110,7 +104,6 @@ config SUN3X</div><div class='ctx'> 	bool "Sun3x support"</div><div class='ctx'> 	depends on MMU</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select M68030</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Sun 3x series of workstations.</div><div class='hunk'>@@ -124,7 +117,6 @@ config SUN3X</div><div class='ctx'> config Q40</div><div class='ctx'> 	bool "Q40/Q60 support"</div><div class='ctx'> 	depends on MMU</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select LEGACY_TIMER_TICK</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Q40 is a Motorola 68040-based successor to the Sinclair QL</div><div class='hunk'>@@ -133,22 +125,6 @@ config Q40</div><div class='ctx'> 	  Q60. Select your CPU below.  For 68LC060 don't forget to enable FPU</div><div class='ctx'> 	  emulation.</div><div class='ctx'> </div><div class='del'>-config SUN3</div><div class='del'>-	bool "Sun3 support"</div><div class='del'>-	depends on MMU</div><div class='del'>-	depends on !MMU_MOTOROLA</div><div class='del'>-	select MMU_SUN3 if MMU</div><div class='del'>-	select LEGACY_TIMER_TICK</div><div class='del'>-	select NO_DMA</div><div class='del'>-	select M68020</div><div class='del'>-	help</div><div class='del'>-	  This option enables support for the Sun 3 series of workstations</div><div class='del'>-	  (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires</div><div class='del'>-	  that all other hardware types must be disabled, as Sun 3 kernels</div><div class='del'>-	  are incompatible with all other m68k targets (including Sun 3x!).</div><div class='del'>-</div><div class='del'>-	  If you don't want to compile a kernel exclusively for a Sun 3, say N.</div><div class='del'>-</div><div class='ctx'> config VIRT</div><div class='ctx'> 	bool "Virtual M68k Machine support"</div><div class='ctx'> 	depends on MMU</div><div class='hunk'>@@ -157,7 +133,6 @@ config VIRT</div><div class='ctx'> 	select GOLDFISH_TIMER</div><div class='ctx'> 	select GOLDFISH_TTY</div><div class='ctx'> 	select M68040</div><div class='del'>-	select MMU_MOTOROLA if MMU</div><div class='ctx'> 	select RTC_CLASS</div><div class='ctx'> 	select RTC_DRV_GOLDFISH</div><div class='ctx'> 	select TTY</div><div class='head'>diff --git a/arch/m68k/amiga/amisound.c b/arch/m68k/amiga/amisound.c<br/>index 714fe8ec6afa..5fd93dfab809 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/amiga/amisound.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/amiga/amisound.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/amiga/amisound.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/amiga/amisound.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@ void amiga_mksound( unsigned int hz, unsigned int ticks )</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	del_timer( &amp;sound_timer );</div><div class='add'>+	timer_delete(&amp;sound_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (hz &gt; 20 &amp;&amp; hz &lt; 32767) {</div><div class='ctx'> 		unsigned long period = (clock_constant / hz);</div><div class='head'>diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c<br/>index 0147130dc34e..242d18e750b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/amiga/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/amiga/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/amiga/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/amiga/config.c</a></div><div class='hunk'>@@ -16,12 +16,10 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/zorro.h&gt;</div><div class='head'>diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c<br/>index e161ecd76035..e324c5f671de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/apollo/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/apollo/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/apollo/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/apollo/config.c</a></div><div class='hunk'>@@ -3,9 +3,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='head'>diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c<br/>index b48a0606a000..ee2d061efb2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/atari/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/atari/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/atari/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/atari/config.c</a></div><div class='hunk'>@@ -33,7 +33,6 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/usb/isp116x.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='head'>diff --git a/arch/m68k/atari/nvram.c b/arch/m68k/atari/nvram.c<br/>index 7000d2443aa3..ededc31375c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/atari/nvram.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/atari/nvram.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/atari/nvram.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/atari/nvram.c</a></div><div class='hunk'>@@ -16,7 +16,9 @@</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/atarihw.h&gt;</div><div class='ctx'> #include &lt;asm/atariints.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -198,7 +200,7 @@ static void atari_nvram_proc_read(unsigned char *nvram, struct seq_file *seq,</div><div class='ctx'> 		seq_printf(seq, "0x%02x (undefined)\n", nvram[1]);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(seq, "SCSI arbitration : %s\n",</div><div class='del'>-		   (nvram[16] &amp; 0x80) ? "on" : "off");</div><div class='add'>+		   str_on_off(nvram[16] &amp; 0x80));</div><div class='ctx'> 	seq_puts(seq, "SCSI host ID     : ");</div><div class='ctx'> 	if (nvram[16] &amp; 0x80)</div><div class='ctx'> 		seq_printf(seq, "%d\n", nvram[16] &amp; 7);</div><div class='hunk'>@@ -236,7 +238,7 @@ static void atari_nvram_proc_read(unsigned char *nvram, struct seq_file *seq,</div><div class='ctx'> 		   vmode &amp; 16 ? "VGA" : "TV", vmode &amp; 32 ? "PAL" : "NTSC");</div><div class='ctx'> 	seq_printf(seq,</div><div class='ctx'> 		   "                   %soverscan, compat. mode %s%s\n",</div><div class='del'>-		   vmode &amp; 64 ? "" : "no ", vmode &amp; 128 ? "on" : "off",</div><div class='add'>+		   vmode &amp; 64 ? "" : "no ", str_on_off(vmode &amp; 128),</div><div class='ctx'> 		   vmode &amp; 256 ?</div><div class='ctx'> 		   (vmode &amp; 16 ? ", line doubling" : ", half screen") : "");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/coldfire/device.c b/arch/m68k/coldfire/device.c<br/>index 7dab46728aed..b6958ec2a220 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/device.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/device.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/coldfire/device.c</a></div><div class='hunk'>@@ -93,7 +93,7 @@ static struct platform_device mcf_uart = {</div><div class='ctx'> 	.dev.platform_data	= mcf_uart_platform_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if IS_ENABLED(CONFIG_FEC)</div><div class='add'>+#ifdef MCFFEC_BASE0</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_M5441x</div><div class='ctx'> #define FEC_NAME	"enet-fec"</div><div class='hunk'>@@ -145,6 +145,7 @@ static struct platform_device mcf_fec0 = {</div><div class='ctx'> 		.platform_data		= FEC_PDATA,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='add'>+#endif /* MCFFEC_BASE0 */</div><div class='ctx'> </div><div class='ctx'> #ifdef MCFFEC_BASE1</div><div class='ctx'> static struct resource mcf_fec1_resources[] = {</div><div class='hunk'>@@ -182,7 +183,6 @@ static struct platform_device mcf_fec1 = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> #endif /* MCFFEC_BASE1 */</div><div class='del'>-#endif /* CONFIG_FEC */</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> /*</div><div class='hunk'>@@ -624,12 +624,12 @@ static struct platform_device mcf_flexcan0 = {</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *mcf_devices[] __initdata = {</div><div class='ctx'> 	&amp;mcf_uart,</div><div class='del'>-#if IS_ENABLED(CONFIG_FEC)</div><div class='add'>+#ifdef MCFFEC_BASE0</div><div class='ctx'> 	&amp;mcf_fec0,</div><div class='add'>+#endif</div><div class='ctx'> #ifdef MCFFEC_BASE1</div><div class='ctx'> 	&amp;mcf_fec1,</div><div class='ctx'> #endif</div><div class='del'>-#endif</div><div class='ctx'> #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	&amp;mcf_qspi,</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/m68k/coldfire/gpio.c b/arch/m68k/coldfire/gpio.c<br/>index ca26de257871..e2f7af1facb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/gpio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/gpio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/coldfire/gpio.c</a></div><div class='hunk'>@@ -123,10 +123,12 @@ static int mcfgpio_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='ctx'> 	return __mcfgpio_direction_output(offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcfgpio_set_value(struct gpio_chip *chip, unsigned offset,</div><div class='del'>-			      int value)</div><div class='add'>+static int mcfgpio_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			     int value)</div><div class='ctx'> {</div><div class='ctx'> 	__mcfgpio_set_value(offset, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcfgpio_request(struct gpio_chip *chip, unsigned offset)</div><div class='head'>diff --git a/arch/m68k/coldfire/m5272.c b/arch/m68k/coldfire/m5272.c<br/>index 734dab657fe3..918e2a3236c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/m5272.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/m5272.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/m5272.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/coldfire/m5272.c</a></div><div class='hunk'>@@ -108,7 +108,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'>  * an ethernet switch. In this case we need to use the fixed phy type,</div><div class='ctx'>  * and we need to declare it early in boot.</div><div class='ctx'>  */</div><div class='del'>-static struct fixed_phy_status nettel_fixed_phy_status __initdata = {</div><div class='add'>+static const struct fixed_phy_status nettel_fixed_phy_status __initconst = {</div><div class='ctx'> 	.link	= 1,</div><div class='ctx'> 	.speed	= 100,</div><div class='ctx'> 	.duplex	= 0,</div><div class='hunk'>@@ -119,7 +119,7 @@ static struct fixed_phy_status nettel_fixed_phy_status __initdata = {</div><div class='ctx'> static int __init init_BSP(void)</div><div class='ctx'> {</div><div class='ctx'> 	m5272_uarts_init();</div><div class='del'>-	fixed_phy_add(PHY_POLL, 0, &amp;nettel_fixed_phy_status);</div><div class='add'>+	fixed_phy_add(&amp;nettel_fixed_phy_status);</div><div class='ctx'> 	clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/coldfire/m5441x.c b/arch/m68k/coldfire/m5441x.c<br/>index 405e9d5c832c..7a25cfc7ac07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/m5441x.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/coldfire/m5441x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/coldfire/m5441x.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/coldfire/m5441x.c</a></div><div class='hunk'>@@ -33,14 +33,14 @@ DEFINE_CLK(0, "mcfuart.0", 24, MCF_BUSCLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfuart.1", 25, MCF_BUSCLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfuart.2", 26, MCF_BUSCLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfuart.3", 27, MCF_BUSCLK);</div><div class='del'>-DEFINE_CLK(0, "mcftmr.0", 28, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcftmr.1", 29, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcftmr.2", 30, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcftmr.3", 31, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcfpit.0", 32, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcfpit.1", 33, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcfpit.2", 34, MCF_CLK);</div><div class='del'>-DEFINE_CLK(0, "mcfpit.3", 35, MCF_CLK);</div><div class='add'>+DEFINE_CLK(0, "mcftmr.0", 28, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcftmr.1", 29, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcftmr.2", 30, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcftmr.3", 31, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcfpit.0", 32, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcfpit.1", 33, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcfpit.2", 34, MCF_BUSCLK);</div><div class='add'>+DEFINE_CLK(0, "mcfpit.3", 35, MCF_BUSCLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfeport.0", 37, MCF_CLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfadc.0", 38, MCF_CLK);</div><div class='ctx'> DEFINE_CLK(0, "mcfdac.0", 39, MCF_CLK);</div><div class='hunk'>@@ -167,8 +167,8 @@ static struct clk * const disable_clks[] __initconst = {</div><div class='ctx'> 	&amp;__clk_0_14, /* i2c.1 */</div><div class='ctx'> 	&amp;__clk_0_22, /* i2c.0 */</div><div class='ctx'> 	&amp;__clk_0_23, /* dspi.0 */</div><div class='del'>-	&amp;__clk_0_28, /* tmr.1 */</div><div class='del'>-	&amp;__clk_0_29, /* tmr.2 */</div><div class='add'>+	&amp;__clk_0_28, /* tmr.0 */</div><div class='add'>+	&amp;__clk_0_29, /* tmr.1 */</div><div class='ctx'> 	&amp;__clk_0_30, /* tmr.2 */</div><div class='ctx'> 	&amp;__clk_0_31, /* tmr.3 */</div><div class='ctx'> 	&amp;__clk_0_32, /* pit.0 */</div><div class='head'>diff --git a/arch/m68k/configs/amcore_defconfig b/arch/m68k/configs/amcore_defconfig<br/>index 67a0d157122d..60767811e34a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/amcore_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/amcore_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/amcore_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/amcore_defconfig</a></div><div class='hunk'>@@ -2,7 +2,6 @@ CONFIG_LOCALVERSION="amcore-002"</div><div class='ctx'> CONFIG_DEFAULT_HOSTNAME="amcore"</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> # CONFIG_FHANDLE is not set</div><div class='del'>-# CONFIG_USELIB is not set</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='hunk'>@@ -89,4 +88,3 @@ CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> # CONFIG_CRYPTO_ECHAINIV is not set</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=y</div><div class='head'>diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig<br/>index d01dc47d52ea..fba8089c9fb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/amiga_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/amiga_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/amiga_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/amiga_defconfig</a></div><div class='hunk'>@@ -85,7 +85,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -126,6 +125,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -207,14 +207,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -234,10 +232,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -246,6 +242,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -267,8 +264,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -299,7 +295,6 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_PARPORT=m</div><div class='ctx'> CONFIG_PARPORT_AMIGA=m</div><div class='hunk'>@@ -312,7 +307,6 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -336,6 +330,7 @@ CONFIG_ATA=y</div><div class='ctx'> CONFIG_PATA_GAYLE=y</div><div class='ctx'> CONFIG_PATA_BUDDHA=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -358,6 +353,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -377,6 +373,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_A2065=y</div><div class='ctx'> CONFIG_ARIADNE=y</div><div class='hunk'>@@ -449,11 +446,11 @@ CONFIG_RTC_DRV_RP5C01=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -487,7 +484,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -552,14 +548,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -580,17 +576,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -607,7 +600,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -620,13 +613,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -636,7 +628,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig<br/>index 46808e581d7b..6af37716384c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/apollo_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/apollo_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/apollo_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/apollo_defconfig</a></div><div class='hunk'>@@ -81,7 +81,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -122,6 +121,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -203,14 +203,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -230,10 +228,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -242,6 +238,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -263,8 +260,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -295,14 +291,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -316,6 +310,7 @@ CONFIG_SCSI_SAS_ATTRS=m</div><div class='ctx'> CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -338,6 +333,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -357,6 +353,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_PPP=m</div><div class='ctx'> CONFIG_PPP_BSDCOMP=m</div><div class='hunk'>@@ -406,11 +403,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -444,7 +441,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -509,14 +505,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -537,17 +533,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -564,7 +557,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -577,13 +570,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -593,7 +585,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig<br/>index 4469a7839c9d..471f4ec3730d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/atari_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/atari_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/atari_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/atari_defconfig</a></div><div class='hunk'>@@ -88,7 +88,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -129,6 +128,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -210,14 +210,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -237,10 +235,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -249,6 +245,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -270,8 +267,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -302,7 +298,6 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_PARPORT=m</div><div class='ctx'> CONFIG_PARPORT_ATARI=m</div><div class='hunk'>@@ -313,7 +308,6 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -331,6 +325,7 @@ CONFIG_ATA=y</div><div class='ctx'> # CONFIG_ATA_BMDMA is not set</div><div class='ctx'> CONFIG_PATA_FALCON=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -353,6 +348,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -372,6 +368,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_ATARILANCE=y</div><div class='ctx'> CONFIG_NE2000=y</div><div class='hunk'>@@ -426,11 +423,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -464,7 +461,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -529,14 +525,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -557,17 +553,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -584,7 +577,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -597,13 +590,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -613,7 +605,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig<br/>index c0719322c028..28492ef51457 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/bvme6000_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/bvme6000_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/bvme6000_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/bvme6000_defconfig</a></div><div class='hunk'>@@ -78,7 +78,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -119,6 +118,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -200,14 +200,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -227,10 +225,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -239,6 +235,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -260,8 +257,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -292,14 +288,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -314,6 +308,7 @@ CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_BVME6000_SCSI=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -336,6 +331,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -355,6 +351,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_BVME6000_NET=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -398,11 +395,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -436,7 +433,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -501,14 +497,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -529,17 +525,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -556,7 +549,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -569,13 +562,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -585,7 +577,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig<br/>index 8d429e63f8f2..2fbefb16b72e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/hp300_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/hp300_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/hp300_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/hp300_defconfig</a></div><div class='hunk'>@@ -80,7 +80,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -121,6 +120,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -202,14 +202,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -229,10 +227,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -241,6 +237,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -262,8 +259,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -294,14 +290,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -315,6 +309,7 @@ CONFIG_SCSI_SAS_ATTRS=m</div><div class='ctx'> CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -337,6 +332,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -356,6 +352,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_HPLANCE=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -408,11 +405,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -446,7 +443,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -511,14 +507,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -539,17 +535,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -566,7 +559,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -579,13 +572,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -595,7 +587,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig<br/>index bafd33da27c1..deec5df3f35a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mac_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mac_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mac_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/mac_defconfig</a></div><div class='hunk'>@@ -79,7 +79,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -120,6 +119,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -201,14 +201,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -228,10 +226,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -240,6 +236,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -261,8 +258,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -293,7 +289,6 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_BLK_DEV_SWIM=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='hunk'>@@ -301,7 +296,6 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -320,6 +314,7 @@ CONFIG_ATA=y</div><div class='ctx'> # CONFIG_ATA_BMDMA is not set</div><div class='ctx'> CONFIG_PATA_PLATFORM=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -349,6 +344,7 @@ CONFIG_MAC_EMUMOUSEBTN=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -368,6 +364,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_MACMACE=y</div><div class='ctx'> CONFIG_MAC89x0=y</div><div class='hunk'>@@ -425,11 +422,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -463,7 +460,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -528,14 +524,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -556,17 +552,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -583,7 +576,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -596,13 +589,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -612,7 +604,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig<br/>index 6f5ca3f85ea1..301a05c12577 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/multi_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/multi_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/multi_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/multi_defconfig</a></div><div class='hunk'>@@ -99,7 +99,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -140,6 +139,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -221,14 +221,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -248,10 +246,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -260,6 +256,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -281,8 +278,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -313,7 +309,6 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_PARPORT=m</div><div class='ctx'> CONFIG_PARPORT_PC=m</div><div class='hunk'>@@ -330,7 +325,6 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -363,6 +357,7 @@ CONFIG_PATA_GAYLE=y</div><div class='ctx'> CONFIG_PATA_BUDDHA=y</div><div class='ctx'> CONFIG_PATA_PLATFORM=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -392,6 +387,7 @@ CONFIG_MAC_EMUMOUSEBTN=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -411,6 +407,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_A2065=y</div><div class='ctx'> CONFIG_ARIADNE=y</div><div class='hunk'>@@ -503,6 +500,7 @@ CONFIG_UHID=m</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> # CONFIG_RTC_NVMEM is not set</div><div class='add'>+CONFIG_RTC_DRV_M48T59=m</div><div class='ctx'> CONFIG_RTC_DRV_MSM6242=m</div><div class='ctx'> CONFIG_RTC_DRV_RP5C01=m</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='hunk'>@@ -511,11 +509,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -549,7 +547,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -614,14 +611,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -642,17 +639,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -669,7 +663,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -682,13 +676,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -698,7 +691,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig<br/>index d16b328c7136..0d401db0e8f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mvme147_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mvme147_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mvme147_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/mvme147_defconfig</a></div><div class='hunk'>@@ -77,7 +77,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -118,6 +117,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -199,14 +199,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -226,10 +224,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -238,6 +234,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -259,8 +256,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -291,14 +287,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -313,6 +307,7 @@ CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_MVME147_SCSI=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -335,6 +330,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -354,6 +350,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_MVME147_NET=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -391,17 +388,18 @@ CONFIG_UHID=m</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> # CONFIG_RTC_NVMEM is not set</div><div class='add'>+CONFIG_RTC_DRV_M48T59=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_VIRTIO_MENU is not set</div><div class='ctx'> # CONFIG_VHOST_MENU is not set</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -435,7 +433,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -500,14 +497,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -528,17 +525,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -555,7 +549,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -568,13 +562,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -584,7 +577,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig<br/>index 80f6c15a5ed5..90fb5b6bcf83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mvme16x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/mvme16x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/mvme16x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/mvme16x_defconfig</a></div><div class='hunk'>@@ -78,7 +78,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -119,6 +118,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -200,14 +200,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -227,10 +225,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -239,6 +235,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -260,8 +257,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -292,14 +288,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -314,6 +308,7 @@ CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_MVME16x_SCSI=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -336,6 +331,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -355,6 +351,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_MVME16x_NET=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -392,17 +389,18 @@ CONFIG_UHID=m</div><div class='ctx'> # CONFIG_USB_SUPPORT is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> # CONFIG_RTC_NVMEM is not set</div><div class='add'>+CONFIG_RTC_DRV_M48T59=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_VIRTIO_MENU is not set</div><div class='ctx'> # CONFIG_VHOST_MENU is not set</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -436,7 +434,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -501,14 +498,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -529,17 +526,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -556,7 +550,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -569,13 +563,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -585,7 +578,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig<br/>index 0e81589f0ee2..b89b0f7fe2da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/q40_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/q40_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/q40_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/q40_defconfig</a></div><div class='hunk'>@@ -79,7 +79,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -120,6 +119,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -201,14 +201,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -228,10 +226,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -240,6 +236,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -261,8 +258,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -293,7 +289,6 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_PARPORT=m</div><div class='ctx'> CONFIG_PARPORT_PC=m</div><div class='hunk'>@@ -303,7 +298,6 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -320,6 +314,7 @@ CONFIG_ATA=y</div><div class='ctx'> # CONFIG_ATA_BMDMA is not set</div><div class='ctx'> CONFIG_PATA_FALCON=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -342,6 +337,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -361,6 +357,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_NE2000=y</div><div class='ctx'> CONFIG_PLIP=m</div><div class='hunk'>@@ -415,11 +412,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -453,7 +450,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -518,14 +514,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -546,17 +542,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -573,7 +566,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -586,13 +579,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -602,7 +594,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig<br/>index 8cd785290339..8cc372c4df72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/sun3_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/sun3_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/sun3_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/sun3_defconfig</a></div><div class='hunk'>@@ -74,7 +74,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -115,6 +114,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -196,14 +196,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -223,10 +221,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -235,6 +231,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -256,8 +253,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -288,14 +284,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -310,6 +304,7 @@ CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_SUN3_SCSI=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -332,6 +327,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -351,6 +347,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_SUN3LANCE=y</div><div class='ctx'> CONFIG_SUN3_82586=y</div><div class='hunk'>@@ -396,11 +393,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -434,7 +431,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -499,14 +495,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -527,17 +523,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -554,7 +547,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -566,13 +559,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -582,7 +574,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig<br/>index 78035369f60f..f4569f64c6e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/sun3x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/configs/sun3x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/configs/sun3x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/configs/sun3x_defconfig</a></div><div class='hunk'>@@ -75,7 +75,6 @@ CONFIG_NETFILTER=y</div><div class='ctx'> CONFIG_NETFILTER_NETLINK_HOOK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_ZONES=y</div><div class='del'>-# CONFIG_NF_CT_PROTO_DCCP is not set</div><div class='ctx'> CONFIG_NF_CONNTRACK_AMANDA=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_FTP=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_H323=m</div><div class='hunk'>@@ -116,6 +115,7 @@ CONFIG_NFT_FIB_NETDEV=m</div><div class='ctx'> CONFIG_NFT_REJECT_NETDEV=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE_INET=m</div><div class='ctx'> CONFIG_NF_FLOW_TABLE=m</div><div class='add'>+CONFIG_NETFILTER_XTABLES_LEGACY=y</div><div class='ctx'> CONFIG_NETFILTER_XT_SET=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='hunk'>@@ -197,14 +197,12 @@ CONFIG_IP_NF_MATCH_AH=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_ECN=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_MATCH_TTL=m</div><div class='del'>-CONFIG_IP_NF_FILTER=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_SYNPROXY=m</div><div class='ctx'> CONFIG_IP_NF_NAT=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_MASQUERADE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_NETMAP=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_REDIRECT=m</div><div class='del'>-CONFIG_IP_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='hunk'>@@ -224,10 +222,8 @@ CONFIG_IP6_NF_MATCH_RPFILTER=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_RT=m</div><div class='ctx'> CONFIG_IP6_NF_MATCH_SRH=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_HL=m</div><div class='del'>-CONFIG_IP6_NF_FILTER=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_REJECT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_SYNPROXY=m</div><div class='del'>-CONFIG_IP6_NF_MANGLE=m</div><div class='ctx'> CONFIG_IP6_NF_RAW=m</div><div class='ctx'> CONFIG_IP6_NF_NAT=m</div><div class='ctx'> CONFIG_IP6_NF_TARGET_MASQUERADE=m</div><div class='hunk'>@@ -236,6 +232,7 @@ CONFIG_NF_TABLES_BRIDGE=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_META=m</div><div class='ctx'> CONFIG_NFT_BRIDGE_REJECT=m</div><div class='ctx'> CONFIG_NF_CONNTRACK_BRIDGE=m</div><div class='add'>+CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m</div><div class='ctx'> CONFIG_BRIDGE_NF_EBTABLES=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_BROUTE=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_T_FILTER=m</div><div class='hunk'>@@ -257,8 +254,7 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='add'>+CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -289,14 +285,12 @@ CONFIG_NET_IFE=m</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_TEST_ASYNC_DRIVER_PROBE=m</div><div class='del'>-CONFIG_DM_KUNIT_TEST=m</div><div class='ctx'> CONFIG_CONNECTOR=m</div><div class='ctx'> CONFIG_ZRAM=m</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_DRBD=m</div><div class='ctx'> CONFIG_BLK_DEV_NBD=m</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_CDROM_PKTCDVD=m</div><div class='ctx'> CONFIG_ATA_OVER_ETH=m</div><div class='ctx'> CONFIG_DUMMY_IRQ=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='hunk'>@@ -311,6 +305,7 @@ CONFIG_ISCSI_TCP=m</div><div class='ctx'> CONFIG_ISCSI_BOOT_SYSFS=m</div><div class='ctx'> CONFIG_SUN3X_ESP=y</div><div class='ctx'> CONFIG_MD=y</div><div class='add'>+CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_UNSTRIPED=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='hunk'>@@ -333,6 +328,7 @@ CONFIG_TCM_PSCSI=m</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_DUMMY=m</div><div class='ctx'> CONFIG_WIREGUARD=m</div><div class='add'>+CONFIG_OVPN=m</div><div class='ctx'> CONFIG_EQUALIZER=m</div><div class='ctx'> CONFIG_NET_TEAM=m</div><div class='ctx'> CONFIG_NET_TEAM_MODE_BROADCAST=m</div><div class='hunk'>@@ -352,6 +348,7 @@ CONFIG_PFCP=m</div><div class='ctx'> CONFIG_MACSEC=m</div><div class='ctx'> CONFIG_NETCONSOLE=m</div><div class='ctx'> CONFIG_NETCONSOLE_DYNAMIC=y</div><div class='add'>+CONFIG_TUN=m</div><div class='ctx'> CONFIG_VETH=m</div><div class='ctx'> CONFIG_SUN3LANCE=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -396,11 +393,11 @@ CONFIG_RTC_DRV_GENERIC=m</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_DAX=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_REISERFS_FS=m</div><div class='ctx'> CONFIG_JFS_FS=m</div><div class='add'>+CONFIG_XFS_FS=m</div><div class='ctx'> CONFIG_OCFS2_FS=m</div><div class='ctx'> # CONFIG_OCFS2_DEBUG_MASKLOG is not set</div><div class='del'>-CONFIG_BCACHEFS_FS=m</div><div class='add'>+CONFIG_BTRFS_FS=m</div><div class='ctx'> CONFIG_FANOTIFY=y</div><div class='ctx'> CONFIG_QUOTA_NETLINK_INTERFACE=y</div><div class='ctx'> CONFIG_AUTOFS_FS=m</div><div class='hunk'>@@ -434,7 +431,6 @@ CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_QNX6FS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_EROFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='hunk'>@@ -499,14 +495,14 @@ CONFIG_DLM=m</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='add'>+CONFIG_CRYPTO_NULL=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='ctx'> CONFIG_CRYPTO_ECRDSA=m</div><div class='del'>-CONFIG_CRYPTO_CURVE25519=m</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -527,17 +523,14 @@ CONFIG_CRYPTO_ADIANTUM=m</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_HCTR2=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_AEGIS128=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_GENERIC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='hunk'>@@ -554,7 +547,7 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRC32_SELFTEST=m</div><div class='add'>+CONFIG_CRC_BENCHMARK=y</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -567,13 +560,12 @@ CONFIG_KUNIT_ALL_TESTS=m</div><div class='ctx'> CONFIG_TEST_DHRY=m</div><div class='ctx'> CONFIG_TEST_MIN_HEAP=m</div><div class='ctx'> CONFIG_TEST_DIV64=m</div><div class='add'>+CONFIG_TEST_MULDIV64=m</div><div class='ctx'> CONFIG_REED_SOLOMON_TEST=m</div><div class='ctx'> CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -583,7 +575,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/emu/nfblock.c b/arch/m68k/emu/nfblock.c<br/>index 83410f8184ec..94a4fadc651a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/emu/nfblock.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/emu/nfblock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/emu/nfblock.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/emu/nfblock.c</a></div><div class='hunk'>@@ -77,9 +77,9 @@ static void nfhd_submit_bio(struct bio *bio)</div><div class='ctx'> 	bio_endio(bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nfhd_getgeo(struct block_device *bdev, struct hd_geometry *geo)</div><div class='add'>+static int nfhd_getgeo(struct gendisk *disk, struct hd_geometry *geo)</div><div class='ctx'> {</div><div class='del'>-	struct nfhd_device *dev = bdev-&gt;bd_disk-&gt;private_data;</div><div class='add'>+	struct nfhd_device *dev = disk-&gt;private_data;</div><div class='ctx'> </div><div class='ctx'> 	geo-&gt;cylinders = dev-&gt;blocks &gt;&gt; (6 - dev-&gt;bshift);</div><div class='ctx'> 	geo-&gt;heads = 4;</div><div class='head'>diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild<br/>index 0dbf9c5c6fae..b282e0dd8dc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/Kbuild</a></div><div class='hunk'>@@ -4,3 +4,4 @@ generic-y += extable.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += spinlock.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/m68k/include/asm/adb_iop.h b/arch/m68k/include/asm/adb_iop.h<br/>index 6aecd020e2fc..ca10b1ec0c78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/adb_iop.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/adb_iop.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/adb_iop.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/adb_iop.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #define ADB_IOP_SRQ		0x04	/* SRQ detected                */</div><div class='ctx'> #define ADB_IOP_TIMEOUT		0x02	/* nonzero if timeout          */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct adb_iopmsg {</div><div class='ctx'> 	__u8 flags;		/* ADB flags         */</div><div class='hunk'>@@ -43,4 +43,4 @@ struct adb_iopmsg {</div><div class='ctx'> 	__u8 spare[21];		/* spare             */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h<br/>index 14c64a6f1217..e9639e48c6c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/bitops.h</a></div><div class='hunk'>@@ -350,12 +350,12 @@ static inline bool xor_unlock_is_negative_byte(unsigned long mask,</div><div class='ctx'> #include &lt;asm-generic/bitops/ffz.h&gt;</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static inline int find_first_zero_bit(const unsigned long *vaddr,</div><div class='del'>-				      unsigned size)</div><div class='add'>+static inline unsigned long find_first_zero_bit(const unsigned long *vaddr,</div><div class='add'>+						unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long *p = vaddr;</div><div class='del'>-	int res = 32;</div><div class='del'>-	unsigned int words;</div><div class='add'>+	unsigned long res = 32;</div><div class='add'>+	unsigned long words;</div><div class='ctx'> 	unsigned long num;</div><div class='ctx'> </div><div class='ctx'> 	if (!size)</div><div class='hunk'>@@ -376,8 +376,9 @@ out:</div><div class='ctx'> }</div><div class='ctx'> #define find_first_zero_bit find_first_zero_bit</div><div class='ctx'> </div><div class='del'>-static inline int find_next_zero_bit(const unsigned long *vaddr, int size,</div><div class='del'>-				     int offset)</div><div class='add'>+static inline unsigned long find_next_zero_bit(const unsigned long *vaddr,</div><div class='add'>+					       unsigned long size,</div><div class='add'>+					       unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long *p = vaddr + (offset &gt;&gt; 5);</div><div class='ctx'> 	int bit = offset &amp; 31UL, res;</div><div class='hunk'>@@ -406,11 +407,12 @@ static inline int find_next_zero_bit(const unsigned long *vaddr, int size,</div><div class='ctx'> }</div><div class='ctx'> #define find_next_zero_bit find_next_zero_bit</div><div class='ctx'> </div><div class='del'>-static inline int find_first_bit(const unsigned long *vaddr, unsigned size)</div><div class='add'>+static inline unsigned long find_first_bit(const unsigned long *vaddr,</div><div class='add'>+					   unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long *p = vaddr;</div><div class='del'>-	int res = 32;</div><div class='del'>-	unsigned int words;</div><div class='add'>+	unsigned long res = 32;</div><div class='add'>+	unsigned long words;</div><div class='ctx'> 	unsigned long num;</div><div class='ctx'> </div><div class='ctx'> 	if (!size)</div><div class='hunk'>@@ -431,8 +433,9 @@ out:</div><div class='ctx'> }</div><div class='ctx'> #define find_first_bit find_first_bit</div><div class='ctx'> </div><div class='del'>-static inline int find_next_bit(const unsigned long *vaddr, int size,</div><div class='del'>-				int offset)</div><div class='add'>+static inline unsigned long find_next_bit(const unsigned long *vaddr,</div><div class='add'>+					  unsigned long size,</div><div class='add'>+					  unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long *p = vaddr + (offset &gt;&gt; 5);</div><div class='ctx'> 	int bit = offset &amp; 31UL, res;</div><div class='hunk'>@@ -465,7 +468,7 @@ static inline int find_next_bit(const unsigned long *vaddr, int size,</div><div class='ctx'>  * ffz = Find First Zero in word. Undefined if no zero exists,</div><div class='ctx'>  * so code should check against ~0UL first..</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long ffz(unsigned long word)</div><div class='add'>+static inline unsigned long __attribute_const__ ffz(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='hunk'>@@ -488,7 +491,7 @@ static inline unsigned long ffz(unsigned long word)</div><div class='ctx'>  */</div><div class='ctx'> #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) &amp;&amp; \</div><div class='ctx'> 	!defined(CONFIG_M68000)</div><div class='del'>-static inline unsigned long __ffs(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __ffs(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ __volatile__ ("bitrev %0; ff1 %0"</div><div class='ctx'> 		: "=d" (x)</div><div class='hunk'>@@ -496,7 +499,7 @@ static inline unsigned long __ffs(unsigned long x)</div><div class='ctx'> 	return x;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ffs(int x)</div><div class='add'>+static inline __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	if (!x)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -518,7 +521,7 @@ static inline int ffs(int x)</div><div class='ctx'>  *	the libc and compiler builtin ffs routines, therefore</div><div class='ctx'>  *	differs in spirit from the above ffz (man ffs).</div><div class='ctx'>  */</div><div class='del'>-static inline int ffs(int x)</div><div class='add'>+static inline __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	int cnt;</div><div class='ctx'> </div><div class='hunk'>@@ -528,7 +531,7 @@ static inline int ffs(int x)</div><div class='ctx'> 	return 32 - cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long __ffs(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __ffs(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	return ffs(x) - 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -536,7 +539,7 @@ static inline unsigned long __ffs(unsigned long x)</div><div class='ctx'> /*</div><div class='ctx'>  *	fls: find last bit set.</div><div class='ctx'>  */</div><div class='del'>-static inline int fls(unsigned int x)</div><div class='add'>+static inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int cnt;</div><div class='ctx'> </div><div class='hunk'>@@ -546,7 +549,7 @@ static inline int fls(unsigned int x)</div><div class='ctx'> 	return 32 - cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long __fls(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __fls(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	return fls(x) - 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/include/asm/bootinfo.h b/arch/m68k/include/asm/bootinfo.h<br/>index 81c91af8ec6c..267272b436e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/bootinfo.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/bootinfo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/bootinfo.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/bootinfo.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;uapi/asm/bootinfo.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BOOTINFO_PROC</div><div class='ctx'> extern void save_bootinfo(const struct bi_record *bi);</div><div class='hunk'>@@ -28,7 +28,7 @@ void process_uboot_commandline(char *commandp, int size);</div><div class='ctx'> static inline void process_uboot_commandline(char *commandp, int size) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif /* _M68K_BOOTINFO_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/entry.h b/arch/m68k/include/asm/entry.h<br/>index 9b52b060c76a..86cba7c19e67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/entry.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/entry.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/entry.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/entry.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> #define ALLOWINT	(~0x700)</div><div class='ctx'> #endif /* machine compilation types */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * This defines the normal kernel pt-regs layout.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/m68k/include/asm/floppy.h b/arch/m68k/include/asm/floppy.h<br/>index a4d0fea47c6b..dea98bbc0932 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/floppy.h</a></div><div class='hunk'>@@ -107,13 +107,9 @@ static void fd_free_irq(void)</div><div class='ctx'> </div><div class='ctx'> #define fd_free_dma()             /* nothing */</div><div class='ctx'> </div><div class='del'>-/* No 64k boundary crossing problems on Q40 - no DMA at all */</div><div class='del'>-#define CROSS_64KB(a,s) (0)</div><div class='del'>-</div><div class='ctx'> #define DMA_MODE_READ  0x44    /* i386 look-alike */</div><div class='ctx'> #define DMA_MODE_WRITE 0x48</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int m68k_floppy_init(void)</div><div class='ctx'> {</div><div class='ctx'>   use_virtual_dma =1;</div><div class='head'>diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h<br/>index 2c96e8480173..516371d5587a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/io_no.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/io_no.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/io_no.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/io_no.h</a></div><div class='hunk'>@@ -123,10 +123,6 @@ static inline void writel(u32 value, volatile void __iomem *addr)</div><div class='ctx'> #define PCI_IO_SIZE	0x00010000		/* 64k */</div><div class='ctx'> #define PCI_IO_MASK	(PCI_IO_SIZE - 1)</div><div class='ctx'> </div><div class='del'>-#define HAVE_ARCH_PIO_SIZE</div><div class='del'>-#define PIO_OFFSET	0</div><div class='del'>-#define PIO_MASK	0xffff</div><div class='del'>-#define PIO_RESERVED	0x10000</div><div class='ctx'> #define PCI_IOBASE	((void __iomem *) PCI_IO_PA)</div><div class='ctx'> #define PCI_SPACE_LIMIT	PCI_IO_MASK</div><div class='ctx'> #endif /* CONFIG_PCI */</div><div class='head'>diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h<br/>index 14992fde7340..2263e92d418a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/irq.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/irq.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/irq.h</a></div><div class='hunk'>@@ -28,10 +28,8 @@</div><div class='ctx'> #define NR_IRQS	32</div><div class='ctx'> #elif defined(CONFIG_APOLLO)</div><div class='ctx'> #define NR_IRQS	24</div><div class='del'>-#elif defined(CONFIG_HP300)</div><div class='add'>+#else /* CONFIG_HP300 etc. */</div><div class='ctx'> #define NR_IRQS	8</div><div class='del'>-#else</div><div class='del'>-#define NR_IRQS	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \</div><div class='head'>diff --git a/arch/m68k/include/asm/kexec.h b/arch/m68k/include/asm/kexec.h<br/>index 3b0b64f0a353..f79427bd6487 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/kexec.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/kexec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/kexec.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/kexec.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #define KEXEC_ARCH KEXEC_ARCH_68K</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline void crash_setup_regs(struct pt_regs *newregs,</div><div class='ctx'> 				    struct pt_regs *oldregs)</div><div class='hunk'>@@ -23,7 +23,7 @@ static inline void crash_setup_regs(struct pt_regs *newregs,</div><div class='ctx'> 	/* Dummy implementation for now */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KEXEC_CORE */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/libgcc.h b/arch/m68k/include/asm/libgcc.h<br/>new file mode 100644<br/>index 000000000000..27e17195bd7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/libgcc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/libgcc.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __ASM_M68K_LIBGCC_H</div><div class='add'>+#define __ASM_M68K_LIBGCC_H</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_CPU_HAS_NO_MULDIV64</div><div class='add'>+/*</div><div class='add'>+ * For those 68K CPUs that support 64bit multiply define umul_ppm()</div><div class='add'>+ * for the common muldi3 libgcc helper function (in lib/muldi3.c).</div><div class='add'>+ * CPUs that don't have it (like the original 68000 and ColdFire)</div><div class='add'>+ * will fallback to using the C-coded version of umul_ppmm().</div><div class='add'>+ */</div><div class='add'>+#define umul_ppmm(w1, w0, u, v)				\</div><div class='add'>+	do {						\</div><div class='add'>+		unsigned long __u = (u), __v = (v);	\</div><div class='add'>+		unsigned long __w0, __w1;		\</div><div class='add'>+							\</div><div class='add'>+		__asm__ ("mulu%.l %3,%1:%0"		\</div><div class='add'>+			 : "=d" (__w0),			\</div><div class='add'>+			   "=d" (__w1)			\</div><div class='add'>+			 : "%0" (__u),			\</div><div class='add'>+			   "dmi" (__v));		\</div><div class='add'>+							\</div><div class='add'>+		(w0) = __w0; (w1) = __w1;		\</div><div class='add'>+	} while (0)</div><div class='add'>+#endif /* !CONFIG_CPU_HAS_NO_MULDIV64 */</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_M68K_LIBGCC_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/mac_baboon.h b/arch/m68k/include/asm/mac_baboon.h<br/>index 08d9b8829a1a..ed5b5b48bdf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_baboon.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_baboon.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_baboon.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mac_baboon.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #define BABOON_BASE (0x50F1A000)	/* same as IDE controller base */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct baboon {</div><div class='ctx'> 	char	pad1[208];	/* generic IDE registers, not used here */</div><div class='hunk'>@@ -36,4 +36,4 @@ extern void baboon_register_interrupts(void);</div><div class='ctx'> extern void baboon_irq_enable(int);</div><div class='ctx'> extern void baboon_irq_disable(int);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY **/</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/mac_iop.h b/arch/m68k/include/asm/mac_iop.h<br/>index 32f1c79c818f..a6753eb16ba4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_iop.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_iop.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_iop.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mac_iop.h</a></div><div class='hunk'>@@ -66,7 +66,7 @@</div><div class='ctx'> #define IOP_ADDR_ALIVE		0x031F</div><div class='ctx'> #define IOP_ADDR_RECV_MSG	0x0320</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * IOP Control registers, staggered because in usual Apple style they were</div><div class='hunk'>@@ -163,4 +163,4 @@ extern void iop_ism_irq_poll(uint);</div><div class='ctx'> </div><div class='ctx'> extern void iop_register_interrupts(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h<br/>index 56ef986c0a9b..a6e86e443155 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_oss.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_oss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_oss.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mac_oss.h</a></div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> </div><div class='ctx'> #define OSS_POWEROFF	0x80</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct mac_oss {</div><div class='ctx'>     __u8  irq_level[0x10];	/* [0x000-0x00f] Interrupt levels */</div><div class='hunk'>@@ -77,4 +77,4 @@ extern void oss_register_interrupts(void);</div><div class='ctx'> extern void oss_irq_enable(int);</div><div class='ctx'> extern void oss_irq_disable(int);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/mac_psc.h b/arch/m68k/include/asm/mac_psc.h<br/>index 86a5a5eab89e..6587dbd54476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_psc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_psc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_psc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mac_psc.h</a></div><div class='hunk'>@@ -207,7 +207,7 @@</div><div class='ctx'> 				 * Unknown, always 0x0000.</div><div class='ctx'> 				 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern volatile __u8 *psc;</div><div class='ctx'> </div><div class='hunk'>@@ -249,4 +249,4 @@ static inline u32 psc_read_long(int offset)</div><div class='ctx'> 	return *((volatile __u32 *)(psc + offset));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h<br/>index a9ef1e9ba6c4..b065cd8e5071 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_via.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mac_via.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mac_via.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mac_via.h</a></div><div class='hunk'>@@ -250,7 +250,7 @@</div><div class='ctx'> #define IER_SET_BIT(b) (0x80 | (1&lt;&lt;(b)) )</div><div class='ctx'> #define IER_CLR_BIT(b) (0x7F &amp; (1&lt;&lt;(b)) )</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern volatile __u8 *via1,*via2;</div><div class='ctx'> extern int rbv_present,via_alt_mapping;</div><div class='hunk'>@@ -267,6 +267,6 @@ extern void via1_irq(struct irq_desc *desc);</div><div class='ctx'> extern void via1_set_head(int);</div><div class='ctx'> extern int via2_scsi_drq_pending(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MAC_VIA_H_ */</div><div class='head'>diff --git a/arch/m68k/include/asm/math-emu.h b/arch/m68k/include/asm/math-emu.h<br/>index eefaa3a2b596..91074ade14ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/math-emu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/math-emu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/math-emu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/math-emu.h</a></div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> #define PMUNIMPL	(1&lt;&lt;PUNIMPL)</div><div class='ctx'> #define PMMOVEM		(1&lt;&lt;PMOVEM)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -127,7 +127,7 @@ extern unsigned int fp_debugprint;</div><div class='ctx'> </div><div class='ctx'> #define FPDATA		((struct fp_data *)current-&gt;thread.fp)</div><div class='ctx'> </div><div class='del'>-#else	/* __ASSEMBLY__ */</div><div class='add'>+#else	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define FPDATA		%a2</div><div class='ctx'> </div><div class='hunk'>@@ -311,6 +311,6 @@ old_gas=old_gas+1</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_M68K_SETUP_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/mcf_pgalloc.h b/arch/m68k/include/asm/mcf_pgalloc.h<br/>index 302c5bf67179..fc5454d37da3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcf_pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcf_pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcf_pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mcf_pgalloc.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)</div><div class='ctx'> {</div><div class='del'>-	pagetable_free(virt_to_ptdesc(pte));</div><div class='add'>+	pagetable_dtor_free(virt_to_ptdesc(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern const char bad_pmd_string[];</div><div class='hunk'>@@ -19,6 +19,10 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='add'>+	if (!pagetable_pte_ctor(mm, ptdesc)) {</div><div class='add'>+		pagetable_free(ptdesc);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ptdesc_address(ptdesc);</div><div class='ctx'> }</div><div class='hunk'>@@ -37,7 +41,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pgtable,</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdesc *ptdesc = virt_to_ptdesc(pgtable);</div><div class='ctx'> </div><div class='del'>-	pagetable_pte_dtor(ptdesc);</div><div class='add'>+	pagetable_dtor(ptdesc);</div><div class='ctx'> 	pagetable_free(ptdesc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -48,7 +52,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	if (!pagetable_pte_ctor(ptdesc)) {</div><div class='add'>+	if (!pagetable_pte_ctor(mm, ptdesc)) {</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -61,7 +65,7 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pgtable)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptdesc *ptdesc = virt_to_ptdesc(pgtable);</div><div class='ctx'> </div><div class='del'>-	pagetable_pte_dtor(ptdesc);</div><div class='add'>+	pagetable_dtor(ptdesc);</div><div class='ctx'> 	pagetable_free(ptdesc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +77,7 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pgtable)</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> {</div><div class='del'>-	pagetable_free(virt_to_ptdesc(pgd));</div><div class='add'>+	pagetable_dtor_free(virt_to_ptdesc(pgd));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='hunk'>@@ -84,6 +88,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='add'>+	pagetable_pgd_ctor(ptdesc);</div><div class='ctx'> 	new_pgd = ptdesc_address(ptdesc);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(new_pgd, swapper_pg_dir, PTRS_PER_PGD * sizeof(pgd_t));</div><div class='head'>diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h<br/>index 48f87a8a8832..189bb7b1e663 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcf_pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcf_pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcf_pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mcf_pgtable.h</a></div><div class='hunk'>@@ -92,16 +92,10 @@</div><div class='ctx'> #define PTE_MASK	PAGE_MASK</div><div class='ctx'> #define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define pmd_pgtable(pmd) pfn_to_virt(pmd_val(pmd) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	pte_val(pte) = (pte_val(pte) &amp; CF_PAGE_CHG_MASK) | pgprot_val(newprot);</div><div class='hunk'>@@ -274,7 +268,7 @@ extern pgd_t kernel_pg_dir[PTRS_PER_PGD];</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)	(__pte((x).val))</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -298,5 +292,5 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> #define pfn_pte(pfn, prot)	__pte(((pfn) &lt;&lt; PAGE_SHIFT) | pgprot_val(prot))</div><div class='ctx'> #define pte_pfn(pte)		(pte_val(pte) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> #endif	/* _MCF_PGTABLE_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h<br/>index 019f24439546..9c91ecdafc45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcfgpio.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcfgpio.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcfgpio.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mcfgpio.h</a></div><div class='hunk'>@@ -136,7 +136,7 @@ static inline void gpio_free(unsigned gpio)</div><div class='ctx'>  * read-modify-write as well as those controlled by the EPORT and GPIO modules.</div><div class='ctx'>  */</div><div class='ctx'> #define MCFGPIO_SCR_START		40</div><div class='del'>-#elif defined(CONFIGM5441x)</div><div class='add'>+#elif defined(CONFIG_M5441x)</div><div class='ctx'> /* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */</div><div class='ctx'> #define MCFGPIO_SCR_START		0</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h<br/>index 283352ab0d5d..db16ea1057f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcfmmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mcfmmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mcfmmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mcfmmu.h</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> #define	MMUDR_PAN	10			/* Physical address */</div><div class='ctx'> #define	MMUDR_PAMASK	0xfffffc00		/* PA mask */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *	Simple access functions for the MMU registers. Nothing fancy</div><div class='head'>diff --git a/arch/m68k/include/asm/motorola_pgalloc.h b/arch/m68k/include/asm/motorola_pgalloc.h<br/>index 74a817d9387f..1091fb0affbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/motorola_pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/motorola_pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/motorola_pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/motorola_pgalloc.h</a></div><div class='hunk'>@@ -9,13 +9,13 @@ extern void mmu_page_ctor(void *page);</div><div class='ctx'> extern void mmu_page_dtor(void *page);</div><div class='ctx'> </div><div class='ctx'> enum m68k_table_types {</div><div class='del'>-	TABLE_PGD = 0,</div><div class='del'>-	TABLE_PMD = 0, /* same size as PGD */</div><div class='del'>-	TABLE_PTE = 1,</div><div class='add'>+	TABLE_PGD,</div><div class='add'>+	TABLE_PMD,</div><div class='add'>+	TABLE_PTE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern void init_pointer_table(void *table, int type);</div><div class='del'>-extern void *get_pointer_table(int type);</div><div class='add'>+extern void *get_pointer_table(struct mm_struct *mm, int type);</div><div class='ctx'> extern int free_pointer_table(void *table, int type);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -26,7 +26,7 @@ extern int free_pointer_table(void *table, int type);</div><div class='ctx'> </div><div class='ctx'> static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return get_pointer_table(TABLE_PTE);</div><div class='add'>+	return get_pointer_table(mm, TABLE_PTE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)</div><div class='hunk'>@@ -36,7 +36,7 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)</div><div class='ctx'> </div><div class='ctx'> static inline pgtable_t pte_alloc_one(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return get_pointer_table(TABLE_PTE);</div><div class='add'>+	return get_pointer_table(mm, TABLE_PTE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pte_free(struct mm_struct *mm, pgtable_t pgtable)</div><div class='hunk'>@@ -53,7 +53,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pgtable,</div><div class='ctx'> </div><div class='ctx'> static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	return get_pointer_table(TABLE_PMD);</div><div class='add'>+	return get_pointer_table(mm, TABLE_PMD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int pmd_free(struct mm_struct *mm, pmd_t *pmd)</div><div class='hunk'>@@ -75,7 +75,7 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return get_pointer_table(TABLE_PGD);</div><div class='add'>+	return get_pointer_table(mm, TABLE_PGD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h<br/>index 9866c7acdabe..dcf6829b3eab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/motorola_pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/motorola_pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/motorola_pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/motorola_pgtable.h</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> /* We borrow bit 11 to store the exclusive marker in swap PTEs. */</div><div class='ctx'> #define _PAGE_SWP_EXCLUSIVE	0x800</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* This is the cache mode to be used for pages containing page descriptors for</div><div class='ctx'>  * processors &gt;= '040. It is in pte_mknocache(), and the variable is defined</div><div class='hunk'>@@ -81,12 +81,6 @@ extern unsigned long mm_cachebits;</div><div class='ctx'> </div><div class='ctx'> #define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd))</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	pte_val(pte) = (pte_val(pte) &amp; _PAGE_CHG_MASK) | pgprot_val(newprot);</div><div class='hunk'>@@ -191,7 +185,7 @@ extern pgd_t kernel_pg_dir[128];</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)	((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -208,5 +202,5 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _MOTOROLA_PGTABLE_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/mvme147hw.h b/arch/m68k/include/asm/mvme147hw.h<br/>index e28eb1c0e0bf..6ad93bac06f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mvme147hw.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mvme147hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mvme147hw.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mvme147hw.h</a></div><div class='hunk'>@@ -4,24 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned char</div><div class='del'>-		ctrl,</div><div class='del'>-		bcd_sec,</div><div class='del'>-		bcd_min,</div><div class='del'>-		bcd_hr,</div><div class='del'>-		bcd_dow,</div><div class='del'>-		bcd_dom,</div><div class='del'>-		bcd_mth,</div><div class='del'>-		bcd_year;</div><div class='del'>-} MK48T02;</div><div class='del'>-</div><div class='del'>-#define RTC_WRITE	0x80</div><div class='del'>-#define RTC_READ	0x40</div><div class='del'>-#define RTC_STOP	0x20</div><div class='del'>-</div><div class='del'>-#define m147_rtc ((MK48T02 * volatile)0xfffe07f8)</div><div class='del'>-</div><div class='add'>+#define MVME147_RTC_BASE	0xfffe0000</div><div class='ctx'> </div><div class='ctx'> struct pcc_regs {</div><div class='ctx'>    volatile u_long	dma_tadr;</div><div class='hunk'>@@ -93,8 +76,8 @@ struct pcc_regs {</div><div class='ctx'> #define M147_SCC_B_ADDR		0xfffe3000</div><div class='ctx'> #define M147_SCC_PCLK		5000000</div><div class='ctx'> </div><div class='del'>-#define MVME147_IRQ_SCSI_PORT	(IRQ_USER+0x45)</div><div class='del'>-#define MVME147_IRQ_SCSI_DMA	(IRQ_USER+0x46)</div><div class='add'>+#define MVME147_IRQ_SCSI_PORT	(IRQ_USER + 5)</div><div class='add'>+#define MVME147_IRQ_SCSI_DMA	(IRQ_USER + 6)</div><div class='ctx'> </div><div class='ctx'> /* SCC interrupts, for MVME147 */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/mvme16xhw.h b/arch/m68k/include/asm/mvme16xhw.h<br/>index cc7f5ae1220f..ff1126a51fbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mvme16xhw.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/mvme16xhw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/mvme16xhw.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/mvme16xhw.h</a></div><div class='hunk'>@@ -24,23 +24,7 @@ typedef struct {</div><div class='ctx'> </div><div class='ctx'> #define mvmelp   ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))</div><div class='ctx'> </div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned char</div><div class='del'>-		ctrl,</div><div class='del'>-		bcd_sec,</div><div class='del'>-		bcd_min,</div><div class='del'>-		bcd_hr,</div><div class='del'>-		bcd_dow,</div><div class='del'>-		bcd_dom,</div><div class='del'>-		bcd_mth,</div><div class='del'>-		bcd_year;</div><div class='del'>-} MK48T08_t, *MK48T08ptr_t;</div><div class='del'>-</div><div class='del'>-#define RTC_WRITE	0x80</div><div class='del'>-#define RTC_READ	0x40</div><div class='del'>-#define RTC_STOP	0x20</div><div class='del'>-</div><div class='del'>-#define MVME_RTC_BASE	0xfffc1ff8</div><div class='add'>+#define MVME_RTC_BASE	0xfffc0000</div><div class='ctx'> </div><div class='ctx'> #define MVME_I596_BASE	0xfff46000</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/nettel.h b/arch/m68k/include/asm/nettel.h<br/>index 3bd4b7a4613f..9bf55cef119e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/nettel.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/nettel.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/nettel.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/nettel.h</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> </div><div class='ctx'> #define	NETtel_LEDADDR	0x30400000</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern volatile unsigned short ppdata;</div><div class='ctx'> </div><div class='hunk'>@@ -80,7 +80,7 @@ static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)</div><div class='ctx'> #define	MCFPP_DTR0	0x0040</div><div class='ctx'> #define	MCFPP_DTR1	0x0000		/* Port 1 no DTR support */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  *	These functions defined to give quasi generic access to the</div><div class='ctx'>  *	PPIO bits used for DTR/DCD.</div><div class='head'>diff --git a/arch/m68k/include/asm/openprom.h b/arch/m68k/include/asm/openprom.h<br/>index dd22e649f5c5..6456ba40a946 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/openprom.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/openprom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/openprom.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/openprom.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #define	LINUX_OPPROM_MAGIC      0x10010407</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* V0 prom device operations. */</div><div class='ctx'> struct linux_dev_v0_funcs {</div><div class='ctx'> 	int (*v0_devopen)(char *device_str);</div><div class='hunk'>@@ -308,6 +308,6 @@ struct linux_prom_ranges {</div><div class='ctx'> 	unsigned int or_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !(__ASSEMBLY__) */</div><div class='add'>+#endif /* !(__ASSEMBLER__) */</div><div class='ctx'> </div><div class='ctx'> #endif /* !(__SPARC_OPENPROM_H) */</div><div class='head'>diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h<br/>index 8cfb84b49975..d30f8b2f1592 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/page.h</a></div><div class='hunk'>@@ -6,13 +6,11 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/page_offset.h&gt;</div><div class='ctx'> </div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='add'>+</div><div class='ctx'> #define PAGE_OFFSET	(PAGE_OFFSET_RAW)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are used to make use of C type-checking..</div><div class='hunk'>@@ -50,7 +48,7 @@ extern unsigned long _rambase;</div><div class='ctx'> extern unsigned long _ramstart;</div><div class='ctx'> extern unsigned long _ramend;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> #include &lt;asm/page_mm.h&gt;</div><div class='head'>diff --git a/arch/m68k/include/asm/page_mm.h b/arch/m68k/include/asm/page_mm.h<br/>index e0ae4d5fc985..ed782609ca41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page_mm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page_mm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page_mm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/page_mm.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _M68K_PAGE_MM_H</div><div class='ctx'> #define _M68K_PAGE_MM_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/module.h&gt;</div><div class='hunk'>@@ -144,6 +144,6 @@ extern int m68k_virt_to_node_shift;</div><div class='ctx'> #define virt_addr_valid(kaddr)	((unsigned long)(kaddr) &gt;= PAGE_OFFSET &amp;&amp; (unsigned long)(kaddr) &lt; (unsigned long)high_memory)</div><div class='ctx'> #define pfn_valid(pfn)		virt_addr_valid(pfn_to_virt(pfn))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _M68K_PAGE_MM_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h<br/>index af3a10973233..39db2026a4b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page_no.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/page_no.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/page_no.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/page_no.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _M68K_PAGE_NO_H</div><div class='ctx'> #define _M68K_PAGE_NO_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'>  </div><div class='ctx'> extern unsigned long memory_start;</div><div class='ctx'> extern unsigned long memory_end;</div><div class='hunk'>@@ -14,7 +14,7 @@ extern unsigned long memory_end;</div><div class='ctx'> #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)</div><div class='ctx'> </div><div class='ctx'> #define vma_alloc_zeroed_movable_folio(vma, vaddr) \</div><div class='del'>-	vma_alloc_folio(GFP_HIGHUSER_MOVABLE | __GFP_ZERO, 0, vma, vaddr, false)</div><div class='add'>+	vma_alloc_folio(GFP_HIGHUSER_MOVABLE | __GFP_ZERO, 0, vma, vaddr)</div><div class='ctx'> </div><div class='ctx'> #define __pa(vaddr)		((unsigned long)(vaddr))</div><div class='ctx'> #define __va(paddr)		((void *)((unsigned long)(paddr)))</div><div class='hunk'>@@ -37,6 +37,6 @@ static inline void *pfn_to_virt(unsigned long pfn)</div><div class='ctx'> </div><div class='ctx'> #define ARCH_PFN_OFFSET PHYS_PFN(PAGE_OFFSET_RAW)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _M68K_PAGE_NO_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/pgtable.h b/arch/m68k/include/asm/pgtable.h<br/>index 49fcfd734860..02f1a4601379 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/pgtable.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;asm/pgtable_mm.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void paging_init(void);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h<br/>index dbdf1c2b2f66..bba64a9c49ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/pgtable_mm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/pgtable_mm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/pgtable_mm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/pgtable_mm.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='hunk'>@@ -119,16 +119,6 @@ extern void *empty_zero_page;</div><div class='ctx'>  */</div><div class='ctx'> #define ZERO_PAGE(vaddr)	(virt_to_page(empty_zero_page))</div><div class='ctx'> </div><div class='del'>-/* number of bits that fit into a memory pointer */</div><div class='del'>-#define BITS_PER_PTR			(8*sizeof(unsigned long))</div><div class='del'>-</div><div class='del'>-/* to align the pointer to a pointer address */</div><div class='del'>-#define PTR_MASK			(~(sizeof(void*)-1))</div><div class='del'>-</div><div class='del'>-/* sizeof(void*)==1&lt;&lt;SIZEOF_PTR_LOG2 */</div><div class='del'>-/* 64-bit machines, beware!  SRB. */</div><div class='del'>-#define SIZEOF_PTR_LOG2			       2</div><div class='del'>-</div><div class='ctx'> extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -145,7 +135,7 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,</div><div class='ctx'> #define update_mmu_cache(vma, addr, ptep) \</div><div class='ctx'> 	update_mmu_cache_range(NULL, vma, addr, ptep, 1)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* MMU-specific headers */</div><div class='ctx'> </div><div class='hunk'>@@ -157,7 +147,7 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,</div><div class='ctx'> #include &lt;asm/motorola_pgtable.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Macro to mark a page protection value as "uncacheable".</div><div class='ctx'>  */</div><div class='hunk'>@@ -182,6 +172,6 @@ pgprot_t pgprot_dmacoherent(pgprot_t prot);</div><div class='ctx'> #define pgprot_dmacoherent(prot)	pgprot_dmacoherent(prot)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_COLDFIRE */</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _M68K_PGTABLE_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h<br/>index 8f2676c3a988..3c43c09d4489 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/processor.h</a></div><div class='hunk'>@@ -95,10 +95,24 @@ static inline void set_fc(unsigned long val)</div><div class='ctx'> 			      "movec %0,%/dfc\n\t"</div><div class='ctx'> 			      : /* no outputs */ : "r" (val) : "memory");</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline unsigned long get_fc(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	__asm__ ("movec %/dfc,%0" : "=r" (val) : );</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='ctx'> #else</div><div class='ctx'> static inline void set_fc(unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline unsigned long get_fc(void)</div><div class='add'>+{</div><div class='add'>+	return USER_DATA;</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_CPU_HAS_ADDRESS_SPACES */</div><div class='ctx'> </div><div class='ctx'> struct thread_struct {</div><div class='head'>diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h<br/>index ea5a80ca1ab3..bc86ce012025 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/ptrace.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifndef PS_S</div><div class='ctx'> #define PS_S  (0x2000)</div><div class='hunk'>@@ -24,5 +24,5 @@</div><div class='ctx'> #define arch_has_block_step()	(1)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _M68K_PTRACE_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h<br/>index 2c99477aaf89..e4ec169f5c7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/setup.h</a></div><div class='hunk'>@@ -28,9 +28,9 @@</div><div class='ctx'> </div><div class='ctx'> #define CL_SIZE COMMAND_LINE_SIZE</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned long m68k_machtype;</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_AMIGA)</div><div class='ctx'> #  define MACH_IS_AMIGA (0)</div><div class='hunk'>@@ -199,7 +199,7 @@ extern unsigned long m68k_machtype;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned long m68k_cputype;</div><div class='ctx'> extern unsigned long m68k_fputype;</div><div class='ctx'> extern unsigned long m68k_mmutype;</div><div class='hunk'>@@ -213,7 +213,7 @@ extern unsigned long vme_brdtype;</div><div class='ctx'>      */</div><div class='ctx'> </div><div class='ctx'> extern int m68k_is040or060;</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_M68020)</div><div class='ctx'> #  define CPU_IS_020 (0)</div><div class='hunk'>@@ -321,7 +321,7 @@ extern int m68k_is040or060;</div><div class='ctx'> </div><div class='ctx'> #define NUM_MEMINFO	4</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> struct m68k_mem_info {</div><div class='ctx'> 	unsigned long addr;		/* physical address of memory chunk */</div><div class='ctx'> 	unsigned long size;		/* length of memory chunk (in bytes) */</div><div class='head'>diff --git a/arch/m68k/include/asm/sun3_pgalloc.h b/arch/m68k/include/asm/sun3_pgalloc.h<br/>index 4a137eecb6fe..1e21c758b774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3_pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3_pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3_pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/sun3_pgalloc.h</a></div><div class='hunk'>@@ -17,11 +17,8 @@</div><div class='ctx'> </div><div class='ctx'> extern const char bad_pmd_string[];</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, addr)				\</div><div class='del'>-do {								\</div><div class='del'>-	pagetable_pte_dtor(page_ptdesc(pte));			\</div><div class='del'>-	tlb_remove_page_ptdesc((tlb), page_ptdesc(pte));	\</div><div class='del'>-} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, addr)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -43,9 +40,11 @@ static inline pgd_t * pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *new_pgd;</div><div class='ctx'> </div><div class='del'>-	new_pgd = (pgd_t *)get_zeroed_page(GFP_KERNEL);</div><div class='del'>-	memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE);</div><div class='del'>-	memset(new_pgd, 0, (PAGE_OFFSET &gt;&gt; PGDIR_SHIFT));</div><div class='add'>+	new_pgd = __pgd_alloc(mm, 0);</div><div class='add'>+	if (likely(new_pgd != NULL)) {</div><div class='add'>+		memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE);</div><div class='add'>+		memset(new_pgd, 0, (PAGE_OFFSET &gt;&gt; PGDIR_SHIFT));</div><div class='add'>+	}</div><div class='ctx'> 	return new_pgd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/sun3_pgtable.h b/arch/m68k/include/asm/sun3_pgtable.h<br/>index 30081aee8164..80ca185a18a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3_pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3_pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3_pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/sun3_pgtable.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sun3mmu.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/virtconvert.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #define PTOV(addr)	__va(addr)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* These need to be defined for compatibility although the sun3 doesn't use them */</div><div class='ctx'> #define _PAGE_NOCACHE030 0x040</div><div class='hunk'>@@ -74,13 +74,7 @@</div><div class='ctx'> /* We borrow bit 6 to store the exclusive marker in swap PTEs. */</div><div class='ctx'> #define _PAGE_SWP_EXCLUSIVE	0x040</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='hunk'>@@ -175,7 +169,7 @@ extern pgd_t kernel_pg_dir[PTRS_PER_PGD];</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)	((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -192,5 +186,5 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> #endif	/* !_SUN3_PGTABLE_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/sun3mmu.h b/arch/m68k/include/asm/sun3mmu.h<br/>index 21a75daa278f..fee05cd2ce5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/sun3mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/sun3mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/sun3mmu.h</a></div><div class='hunk'>@@ -67,7 +67,7 @@</div><div class='ctx'> #define SUN3_BUSERR_PROTERR	(0x40)</div><div class='ctx'> #define SUN3_BUSERR_INVALID	(0x80)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Read bus error status register (implicitly clearing it). */</div><div class='ctx'> static inline unsigned char sun3_get_buserr(void)</div><div class='hunk'>@@ -167,6 +167,6 @@ extern void __iomem *sun3_ioremap(unsigned long phys, unsigned long size,</div><div class='ctx'> </div><div class='ctx'> extern int sun3_map_test(unsigned long addr, char *val);</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* !__SUN3_MMU_H__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/syscall.h b/arch/m68k/include/asm/syscall.h<br/>index d1453e850cdd..bf84b160c2eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/syscall.h</a></div><div class='hunk'>@@ -14,6 +14,13 @@ static inline int syscall_get_nr(struct task_struct *task,</div><div class='ctx'> 	return regs-&gt;orig_d0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;orig_d0 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_rollback(struct task_struct *task,</div><div class='ctx'> 				    struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h<br/>index 3e31adbddc75..5cb3ace55622 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/thread_info.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> </div><div class='ctx'> #define THREAD_SIZE	(PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct thread_info {</div><div class='ctx'> 	struct task_struct	*task;		/* main task structure */</div><div class='hunk'>@@ -31,7 +31,7 @@ struct thread_info {</div><div class='ctx'> 	__u32			cpu;		/* should always be 0 on m68k */</div><div class='ctx'> 	unsigned long		tp_value;	/* thread pointer */</div><div class='ctx'> };</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define INIT_THREAD_INFO(tsk)			\</div><div class='ctx'> {						\</div><div class='hunk'>@@ -39,7 +39,7 @@ struct thread_info {</div><div class='ctx'> 	.preempt_count	= INIT_PREEMPT_COUNT,	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* how to get the thread information struct from C */</div><div class='ctx'> static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/m68k/include/asm/traps.h b/arch/m68k/include/asm/traps.h<br/>index a9d5c1c870d3..c7b3989bd4b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/traps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/traps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/traps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/traps.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef _M68K_TRAPS_H</div><div class='ctx'> #define _M68K_TRAPS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='hunk'>@@ -94,7 +94,7 @@ asmlinkage void bad_inthandler(void);</div><div class='ctx'> </div><div class='ctx'> #define VECOFF(vec) ((vec)&lt;&lt;2)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Status register bits */</div><div class='ctx'> #define PS_T  (0x8000)</div><div class='hunk'>@@ -271,6 +271,6 @@ struct frame {</div><div class='ctx'> asmlinkage void berr_040cleanup(struct frame *fp);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _M68K_TRAPS_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/vga.h b/arch/m68k/include/asm/vga.h<br/>index 4742e6bc3ab8..cdd414fa8710 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/vga.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/vga.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/vga.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/vga.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #ifndef CONFIG_PCI</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/raw_io.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/kmap.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -29,9 +29,9 @@</div><div class='ctx'> #define inw_p(port)		0</div><div class='ctx'> #define outb_p(port, val)	do { } while (0)</div><div class='ctx'> #define outw(port, val)		do { } while (0)</div><div class='del'>-#define readb			raw_inb</div><div class='del'>-#define writeb			raw_outb</div><div class='del'>-#define writew			raw_outw</div><div class='add'>+#define readb			__raw_readb</div><div class='add'>+#define writeb			__raw_writeb</div><div class='add'>+#define writew			__raw_writew</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PCI */</div><div class='ctx'> #endif /* _ASM_M68K_VGA_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/virtconvert.h b/arch/m68k/include/asm/virtconvert.h<br/>index 0a27905b0036..32e27bddb7d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/virtconvert.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/asm/virtconvert.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/asm/virtconvert.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/asm/virtconvert.h</a></div><div class='hunk'>@@ -28,9 +28,6 @@ static inline void *phys_to_virt(unsigned long address)</div><div class='ctx'> 	return __va(address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Permanent address of a page. */</div><div class='del'>-#define page_to_phys(page)	(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * IO bus memory addresses are 1:1 with the physical address,</div><div class='ctx'>  * deprecated globally but still used on two machines.</div><div class='head'>diff --git a/arch/m68k/include/uapi/asm/bootinfo-vme.h b/arch/m68k/include/uapi/asm/bootinfo-vme.h<br/>index f36a09ab5e79..b8139eb39352 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/bootinfo-vme.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/bootinfo-vme.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/bootinfo-vme.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/uapi/asm/bootinfo-vme.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #define VME_TYPE_BVME6000	0x6000	/* BVM Ltd. BVME6000 */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Board ID data structure - pointer to this retrieved from Bug by head.S</div><div class='hunk'>@@ -56,7 +56,7 @@ typedef struct {</div><div class='ctx'> 	__be32	option2;</div><div class='ctx'> } t_bdid, *p_bdid;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>     /*</div><div class='head'>diff --git a/arch/m68k/include/uapi/asm/bootinfo.h b/arch/m68k/include/uapi/asm/bootinfo.h<br/>index 024e87d7095f..28d2d44c08d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/bootinfo.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/bootinfo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/bootinfo.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/uapi/asm/bootinfo.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'>     /*</div><div class='ctx'>      *  Bootinfo definitions</div><div class='hunk'>@@ -43,7 +43,7 @@ struct mem_info {</div><div class='ctx'> 	__be32 size;			/* length of memory chunk (in bytes) */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>     /*</div><div class='hunk'>@@ -167,7 +167,7 @@ struct mem_info {</div><div class='ctx'> #define BI_VERSION_MAJOR(v)		(((v) &gt;&gt; 16) &amp; 0xffff)</div><div class='ctx'> #define BI_VERSION_MINOR(v)		((v) &amp; 0xffff)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct bootversion {</div><div class='ctx'> 	__be16 branch;</div><div class='hunk'>@@ -178,7 +178,7 @@ struct bootversion {</div><div class='ctx'> 	} machversions[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_M68K_BOOTINFO_H */</div><div class='head'>diff --git a/arch/m68k/include/uapi/asm/ptrace.h b/arch/m68k/include/uapi/asm/ptrace.h<br/>index ebd9fccb3d11..d70f771399b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #define PT_SR	   17</div><div class='ctx'> #define PT_PC	   18</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* this struct defines the way the registers are stored on the</div><div class='ctx'>    stack during a system call. */</div><div class='hunk'>@@ -81,5 +81,5 @@ struct switch_stack {</div><div class='ctx'> #define PTRACE_GETFDPIC_EXEC	0</div><div class='ctx'> #define PTRACE_GETFDPIC_INTERP	1</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _UAPI_M68K_PTRACE_H */</div><div class='head'>diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile<br/>index f335bf3268a1..57c1b3e8d60e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/Makefile</a></div><div class='hunk'>@@ -3,18 +3,10 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y			+= vmlinux.lds</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_AMIGA)	:= head.o</div><div class='del'>-obj-$(CONFIG_ATARI)	:= head.o</div><div class='del'>-obj-$(CONFIG_MAC)	:= head.o</div><div class='del'>-obj-$(CONFIG_APOLLO)	:= head.o</div><div class='del'>-obj-$(CONFIG_VME)	:= head.o</div><div class='del'>-obj-$(CONFIG_HP300)	:= head.o</div><div class='del'>-obj-$(CONFIG_Q40)	:= head.o</div><div class='del'>-obj-$(CONFIG_SUN3X)	:= head.o</div><div class='del'>-obj-$(CONFIG_VIRT)	:= head.o</div><div class='del'>-obj-$(CONFIG_SUN3)	:= sun3-head.o</div><div class='add'>+always-$(KBUILD_BUILTIN)	+= vmlinux.lds</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_MMU_MOTOROLA)	:= head.o</div><div class='add'>+obj-$(CONFIG_SUN3)		:= sun3-head.o</div><div class='ctx'> </div><div class='ctx'> obj-y	+= entry.o irq.o module.o process.o ptrace.o</div><div class='ctx'> obj-y	+= setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o</div><div class='head'>diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c<br/>index 906d73230537..67a1990f9d74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'>  * #defines from the assembly-language output.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> #define ASM_OFFSETS_C</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='head'>diff --git a/arch/m68k/kernel/early_printk.c b/arch/m68k/kernel/early_printk.c<br/>index 3cc944df04f6..521cbb8a150c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/early_printk.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/early_printk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/early_printk.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/early_printk.c</a></div><div class='hunk'>@@ -13,25 +13,13 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#include "../mvme147/mvme147.h"</div><div class='ctx'> #include "../mvme16x/mvme16x.h"</div><div class='ctx'> </div><div class='del'>-asmlinkage void __init debug_cons_nputs(const char *s, unsigned n);</div><div class='del'>-</div><div class='del'>-static void __ref debug_cons_write(struct console *c,</div><div class='del'>-				   const char *s, unsigned n)</div><div class='del'>-{</div><div class='del'>-#if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \</div><div class='del'>-      defined(CONFIG_COLDFIRE))</div><div class='del'>-	if (MACH_IS_MVME16x)</div><div class='del'>-		mvme16x_cons_write(c, s, n);</div><div class='del'>-	else</div><div class='del'>-		debug_cons_nputs(s, n);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='add'>+asmlinkage void __init debug_cons_nputs(struct console *c, const char *s, unsigned int n);</div><div class='ctx'> </div><div class='ctx'> static struct console early_console_instance = {</div><div class='ctx'> 	.name  = "debug",</div><div class='del'>-	.write = debug_cons_write,</div><div class='ctx'> 	.flags = CON_PRINTBUFFER | CON_BOOT,</div><div class='ctx'> 	.index = -1</div><div class='ctx'> };</div><div class='hunk'>@@ -41,6 +29,12 @@ static int __init setup_early_printk(char *buf)</div><div class='ctx'> 	if (early_console || buf)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (MACH_IS_MVME147)</div><div class='add'>+		early_console_instance.write = mvme147_scc_write;</div><div class='add'>+	else if (MACH_IS_MVME16x)</div><div class='add'>+		early_console_instance.write = mvme16x_cons_write;</div><div class='add'>+	else</div><div class='add'>+		early_console_instance.write = debug_cons_nputs;</div><div class='ctx'> 	early_console = &amp;early_console_instance;</div><div class='ctx'> 	register_console(early_console);</div><div class='ctx'> </div><div class='hunk'>@@ -48,20 +42,15 @@ static int __init setup_early_printk(char *buf)</div><div class='ctx'> }</div><div class='ctx'> early_param("earlyprintk", setup_early_printk);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * debug_cons_nputs() defined in arch/m68k/kernel/head.S cannot be called</div><div class='del'>- * after init sections are discarded (for platforms that use it).</div><div class='del'>- */</div><div class='del'>-#if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \</div><div class='del'>-      defined(CONFIG_COLDFIRE))</div><div class='del'>-</div><div class='ctx'> static int __init unregister_early_console(void)</div><div class='ctx'> {</div><div class='del'>-	if (!early_console || MACH_IS_MVME16x)</div><div class='del'>-		return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * debug_cons_nputs() defined in arch/m68k/kernel/head.S cannot be</div><div class='add'>+	 * called after init sections are discarded (for platforms that use it).</div><div class='add'>+	 */</div><div class='add'>+	if (early_console &amp;&amp; early_console-&gt;write == debug_cons_nputs)</div><div class='add'>+		return unregister_console(early_console);</div><div class='ctx'> </div><div class='del'>-	return unregister_console(early_console);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> late_initcall(unregister_early_console);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S<br/>index 852255cf60de..2e4ef0358887 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/head.S</a></div><div class='hunk'>@@ -3263,8 +3263,8 @@ func_return	putn</div><div class='ctx'>  *	turns around and calls the internal routines.  This routine</div><div class='ctx'>  *	is used by the boot console.</div><div class='ctx'>  *</div><div class='del'>- *	The calling parameters are:</div><div class='del'>- *		void debug_cons_nputs(const char *str, unsigned length)</div><div class='add'>+ *	The function signature is -</div><div class='add'>+ *		void debug_cons_nputs(struct console *c, const char *s, unsigned int n)</div><div class='ctx'>  *</div><div class='ctx'>  *	This routine does NOT understand variable arguments only</div><div class='ctx'>  *	simple strings!</div><div class='hunk'>@@ -3273,8 +3273,8 @@ ENTRY(debug_cons_nputs)</div><div class='ctx'> 	moveml	%d0/%d1/%a0,%sp@-</div><div class='ctx'> 	movew	%sr,%sp@-</div><div class='ctx'> 	ori	#0x0700,%sr</div><div class='del'>-	movel	%sp@(18),%a0		/* fetch parameter */</div><div class='del'>-	movel	%sp@(22),%d1		/* fetch parameter */</div><div class='add'>+	movel	%sp@(22),%a0		/* char *s */</div><div class='add'>+	movel	%sp@(26),%d1		/* unsigned int n */</div><div class='ctx'> 	jra	2f</div><div class='ctx'> 1:</div><div class='ctx'> #ifdef CONSOLE_DEBUG</div><div class='hunk'>@@ -3400,6 +3400,7 @@ L(console_clear_loop):</div><div class='ctx'> </div><div class='ctx'> 	movel	%d4,%d1				/* screen height in pixels */</div><div class='ctx'> 	divul	%a0@(FONT_DESC_HEIGHT),%d1	/* d1 = max num rows */</div><div class='add'>+	subql	#1,%d1				/* row range is 0 to num - 1 */</div><div class='ctx'> </div><div class='ctx'> 	movel	%d0,%a2@(Lconsole_struct_num_columns)</div><div class='ctx'> 	movel	%d1,%a2@(Lconsole_struct_num_rows)</div><div class='hunk'>@@ -3532,61 +3533,44 @@ func_start	console_putc,%a0/%a1/%d0-%d7</div><div class='ctx'> 	tstl	%pc@(L(console_font))</div><div class='ctx'> 	jeq	L(console_exit)</div><div class='ctx'> </div><div class='add'>+	lea	%pc@(L(console_globals)),%a0</div><div class='add'>+</div><div class='ctx'> 	/* Output character in d7 on console.</div><div class='ctx'> 	 */</div><div class='ctx'> 	movel	ARG1,%d7</div><div class='ctx'> 	cmpib	#'\n',%d7</div><div class='del'>-	jbne	1f</div><div class='add'>+	jne	L(console_not_lf)</div><div class='ctx'> </div><div class='del'>-	/* A little safe recursion is good for the soul */</div><div class='del'>-	console_putc	#'\r'</div><div class='del'>-1:</div><div class='del'>-	lea	%pc@(L(console_globals)),%a0</div><div class='add'>+	clrl	%a0@(Lconsole_struct_cur_column)	/* implicit \r */</div><div class='ctx'> </div><div class='del'>-	cmpib	#10,%d7</div><div class='del'>-	jne	L(console_not_lf)</div><div class='ctx'> 	movel	%a0@(Lconsole_struct_cur_row),%d0</div><div class='del'>-	addil	#1,%d0</div><div class='del'>-	movel	%d0,%a0@(Lconsole_struct_cur_row)</div><div class='ctx'> 	movel	%a0@(Lconsole_struct_num_rows),%d1</div><div class='ctx'> 	cmpl	%d1,%d0</div><div class='ctx'> 	jcs	1f</div><div class='del'>-	subil	#1,%d0</div><div class='del'>-	movel	%d0,%a0@(Lconsole_struct_cur_row)</div><div class='ctx'> 	console_scroll</div><div class='add'>+	jra	L(console_exit)</div><div class='ctx'> 1:</div><div class='add'>+	addql	#1,%d0</div><div class='add'>+	movel	%d0,%a0@(Lconsole_struct_cur_row)</div><div class='ctx'> 	jra	L(console_exit)</div><div class='ctx'> </div><div class='ctx'> L(console_not_lf):</div><div class='del'>-	cmpib	#13,%d7</div><div class='del'>-	jne	L(console_not_cr)</div><div class='add'>+	cmpib	#'\r',%d7</div><div class='add'>+	jne	L(console_not_lf_not_cr)</div><div class='ctx'> 	clrl	%a0@(Lconsole_struct_cur_column)</div><div class='ctx'> 	jra	L(console_exit)</div><div class='ctx'> </div><div class='del'>-L(console_not_cr):</div><div class='del'>-	cmpib	#1,%d7</div><div class='del'>-	jne	L(console_not_home)</div><div class='del'>-	clrl	%a0@(Lconsole_struct_cur_row)</div><div class='del'>-	clrl	%a0@(Lconsole_struct_cur_column)</div><div class='del'>-	jra	L(console_exit)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	At this point we know that the %d7 character is going to be</div><div class='del'>- *	rendered on the screen.  Register usage is -</div><div class='del'>- *		a0 = pointer to console globals</div><div class='del'>- *		a1 = font data</div><div class='del'>- *		d0 = cursor column</div><div class='del'>- *		d1 = cursor row to draw the character</div><div class='del'>- *		d7 = character number</div><div class='del'>- */</div><div class='del'>-L(console_not_home):</div><div class='add'>+	/*</div><div class='add'>+	 *	At this point we know that the %d7 character is going to be</div><div class='add'>+	 *	rendered on the screen.  Register usage is -</div><div class='add'>+	 *	a0 = pointer to console globals</div><div class='add'>+	 *	a1 = font data</div><div class='add'>+	 *	d0 = cursor column</div><div class='add'>+	 *	d1 = cursor row to draw the character</div><div class='add'>+	 *	d7 = character number</div><div class='add'>+	 */</div><div class='add'>+L(console_not_lf_not_cr):</div><div class='ctx'> 	movel	%a0@(Lconsole_struct_cur_column),%d0</div><div class='del'>-	addql	#1,%a0@(Lconsole_struct_cur_column)</div><div class='del'>-	movel	%a0@(Lconsole_struct_num_columns),%d1</div><div class='del'>-	cmpl	%d1,%d0</div><div class='del'>-	jcs	1f</div><div class='del'>-	console_putc	#'\n'	/* recursion is OK! */</div><div class='del'>-1:</div><div class='ctx'> 	movel	%a0@(Lconsole_struct_cur_row),%d1</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3633,6 +3617,23 @@ L(console_do_font_scanline):</div><div class='ctx'> 	addq	#1,%d1</div><div class='ctx'> 	dbra	%d7,L(console_read_char_scanline)</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 *	Register usage in the code below:</div><div class='add'>+	 *	a0 = pointer to console globals</div><div class='add'>+	 *	d0 = cursor column</div><div class='add'>+	 *	d1 = cursor column limit</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	lea	%pc@(L(console_globals)),%a0</div><div class='add'>+</div><div class='add'>+	movel	%a0@(Lconsole_struct_cur_column),%d0</div><div class='add'>+	addql	#1,%d0</div><div class='add'>+	movel	%d0,%a0@(Lconsole_struct_cur_column)	/* Update cursor pos */</div><div class='add'>+	movel	%a0@(Lconsole_struct_num_columns),%d1</div><div class='add'>+	cmpl	%d1,%d0</div><div class='add'>+	jcs	L(console_exit)</div><div class='add'>+	console_putc	#'\n'		/* Line wrap using tail recursion */</div><div class='add'>+</div><div class='ctx'> L(console_exit):</div><div class='ctx'> func_return	console_putc</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/kernel/pcibios.c b/arch/m68k/kernel/pcibios.c<br/>index 9504eb19d73a..e6ab3f9ff5d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/pcibios.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/pcibios.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/pcibios.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/pcibios.c</a></div><div class='hunk'>@@ -44,41 +44,24 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,</div><div class='ctx'>  */</div><div class='ctx'> int pcibios_enable_device(struct pci_dev *dev, int mask)</div><div class='ctx'> {</div><div class='del'>-	struct resource *r;</div><div class='ctx'> 	u16 cmd, newcmd;</div><div class='del'>-	int idx;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	pci_read_config_word(dev, PCI_COMMAND, &amp;cmd);</div><div class='del'>-	newcmd = cmd;</div><div class='del'>-</div><div class='del'>-	for (idx = 0; idx &lt; 6; idx++) {</div><div class='del'>-		/* Only set up the requested stuff */</div><div class='del'>-		if (!(mask &amp; (1 &lt;&lt; idx)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		r = dev-&gt;resource + idx;</div><div class='del'>-		if (!r-&gt;start &amp;&amp; r-&gt;end) {</div><div class='del'>-			pr_err("PCI: Device %s not available because of resource collisions\n",</div><div class='del'>-				pci_name(dev));</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		if (r-&gt;flags &amp; IORESOURCE_IO)</div><div class='del'>-			newcmd |= PCI_COMMAND_IO;</div><div class='del'>-		if (r-&gt;flags &amp; IORESOURCE_MEM)</div><div class='del'>-			newcmd |= PCI_COMMAND_MEMORY;</div><div class='del'>-	}</div><div class='add'>+	ret = pci_enable_resources(dev, mask);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Bridges (eg, cardbus bridges) need to be fully enabled</div><div class='ctx'> 	 */</div><div class='del'>-	if ((dev-&gt;class &gt;&gt; 16) == PCI_BASE_CLASS_BRIDGE)</div><div class='add'>+	if ((dev-&gt;class &gt;&gt; 16) == PCI_BASE_CLASS_BRIDGE) {</div><div class='add'>+		pci_read_config_word(dev, PCI_COMMAND, &amp;cmd);</div><div class='ctx'> 		newcmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	if (newcmd != cmd) {</div><div class='del'>-		pr_info("PCI: enabling device %s (0x%04x -&gt; 0x%04x)\n",</div><div class='del'>-			pci_name(dev), cmd, newcmd);</div><div class='del'>-		pci_write_config_word(dev, PCI_COMMAND, newcmd);</div><div class='add'>+		if (newcmd != cmd) {</div><div class='add'>+			pr_info("PCI: enabling bridge %s (0x%04x -&gt; 0x%04x)\n",</div><div class='add'>+				pci_name(dev), cmd, newcmd);</div><div class='add'>+			pci_write_config_word(dev, PCI_COMMAND, newcmd);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c<br/>index fda7eac23f87..f5a07a70e938 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/process.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ asmlinkage int m68k_clone3(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct fork_frame {</div><div class='head'>diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c<br/>index c20d590e4297..cfa2df24eced 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/ptrace.c</a></div><div class='hunk'>@@ -319,7 +319,7 @@ enum m68k_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset m68k_user_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u16),</div><div class='hunk'>@@ -327,7 +327,7 @@ static const struct user_regset m68k_user_regsets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_FPU</div><div class='ctx'> 	[REGSET_FPU] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n = sizeof(struct user_m68kfp_struct) / sizeof(u32),</div><div class='ctx'> 		.size = sizeof(u32),</div><div class='ctx'> 		.align = sizeof(u32),</div><div class='head'>diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c<br/>index 10310b04f77d..c7e8de0d34bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/setup_mm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/setup_mm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/setup_mm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/setup_mm.c</a></div><div class='hunk'>@@ -147,8 +147,7 @@ static void __init m68k_parse_bootinfo(const struct bi_record *record)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case BI_COMMAND_LINE:</div><div class='del'>-			strscpy(m68k_command_line, data,</div><div class='del'>-				sizeof(m68k_command_line));</div><div class='add'>+			strscpy(m68k_command_line, data);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case BI_RNG_SEED: {</div><div class='hunk'>@@ -243,13 +242,16 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	setup_initial_init_mm((void *)PAGE_OFFSET, _etext, _edata, _end);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_BOOTPARAM)</div><div class='del'>-	strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE);</div><div class='del'>-	m68k_command_line[CL_SIZE - 1] = 0;</div><div class='add'>+	strscpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE);</div><div class='ctx'> #endif /* CONFIG_BOOTPARAM */</div><div class='ctx'> 	process_uboot_commandline(&amp;m68k_command_line[0], CL_SIZE);</div><div class='ctx'> 	*cmdline_p = m68k_command_line;</div><div class='ctx'> 	memcpy(boot_command_line, *cmdline_p, CL_SIZE);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * Initialise the static keys early as they may be enabled by the</div><div class='add'>+	 * cpufeature code and early parameters.</div><div class='add'>+	 */</div><div class='add'>+	jump_label_init();</div><div class='ctx'> 	parse_early_param();</div><div class='ctx'> </div><div class='ctx'> 	switch (m68k_machtype) {</div><div class='hunk'>@@ -482,7 +484,7 @@ static int hardware_proc_show(struct seq_file *m, void *v)</div><div class='ctx'> 	if (mach_get_model)</div><div class='ctx'> 		mach_get_model(model);</div><div class='ctx'> 	else</div><div class='del'>-		strcpy(model, "Unknown m68k");</div><div class='add'>+		strscpy(model, "Unknown m68k");</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "Model:\t\t%s\n", model);</div><div class='ctx'> 	for (mem = 0, i = 0; i &lt; m68k_num_memory; i++)</div><div class='head'>diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c<br/>index c926da9d5ec2..f724875b15cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/setup_no.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/setup_no.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/setup_no.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/setup_no.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='hunk'>@@ -146,8 +145,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	/* Keep a copy of command line */</div><div class='ctx'> 	*cmdline_p = &amp;command_line[0];</div><div class='del'>-	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);</div><div class='del'>-	boot_command_line[COMMAND_LINE_SIZE-1] = 0;</div><div class='add'>+	strscpy(boot_command_line, command_line, COMMAND_LINE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Give all the memory to the bootmap allocator, tell it to put the</div><div class='head'>diff --git a/arch/m68k/kernel/syscalls/syscall.tbl b/arch/m68k/kernel/syscalls/syscall.tbl<br/>index 22a3cbd4c602..f41d38dfbf13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/syscalls/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/syscalls/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -462,3 +462,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c<br/>index a97600b2af50..acd4c2da562b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/time.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/time.c</a></div><div class='hunk'>@@ -62,7 +62,7 @@ void timer_heartbeat(void)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_HEARTBEAT */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_M68KCLASSIC</div><div class='add'>+#if defined(CONFIG_M68KCLASSIC) || defined(CONFIG_SUN3)</div><div class='ctx'> /* machine dependent timer functions */</div><div class='ctx'> int (*mach_hwclk) (int, struct rtc_time*);</div><div class='ctx'> EXPORT_SYMBOL(mach_hwclk);</div><div class='hunk'>@@ -149,7 +149,7 @@ static int __init rtc_init(void)</div><div class='ctx'> </div><div class='ctx'> module_init(rtc_init);</div><div class='ctx'> #endif /* CONFIG_RTC_DRV_GENERIC */</div><div class='del'>-#endif /* CONFIG M68KCLASSIC */</div><div class='add'>+#endif /* CONFIG_M68KCLASSIC || SUN3 */</div><div class='ctx'> </div><div class='ctx'> void __init time_init(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c<br/>index 53d0cf343d90..d2f25e8895e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/traps.c</a></div><div class='hunk'>@@ -383,7 +383,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 			fp-&gt;ptregs.format == 0xa ? fp-&gt;ptregs.pc + 4 : fp-&gt;un.fmtb.baddr);</div><div class='ctx'> 	if (ssw &amp; DF)</div><div class='ctx'> 		pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",</div><div class='del'>-			ssw &amp; RW ? "read" : "write",</div><div class='add'>+			str_read_write(ssw &amp; RW),</div><div class='ctx'> 			fp-&gt;un.fmtb.daddr,</div><div class='ctx'> 			space_names[ssw &amp; DFC], fp-&gt;ptregs.pc);</div><div class='ctx'> </div><div class='hunk'>@@ -419,7 +419,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",</div><div class='del'>-					ssw &amp; RW ? "read" : "write",</div><div class='add'>+					str_read_write(ssw &amp; RW),</div><div class='ctx'> 					fp-&gt;un.fmtb.daddr,</div><div class='ctx'> 					space_names[ssw &amp; DFC], fp-&gt;ptregs.pc);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -455,7 +455,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 			pr_debug("*** unexpected busfault type=%#04x\n",</div><div class='ctx'> 				 buserr_type);</div><div class='ctx'> 			pr_debug("invalid %s access at %#lx from pc %#lx\n",</div><div class='del'>-				 !(ssw &amp; RW) ? "write" : "read", addr,</div><div class='add'>+				 str_read_write(ssw &amp; RW), addr,</div><div class='ctx'> 				 fp-&gt;ptregs.pc);</div><div class='ctx'> 			die_if_kernel ("Oops", &amp;fp-&gt;ptregs, buserr_type);</div><div class='ctx'> 			force_sig (SIGBUS);</div><div class='hunk'>@@ -514,7 +514,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 			fp-&gt;ptregs.format == 0xa ? fp-&gt;ptregs.pc + 4 : fp-&gt;un.fmtb.baddr);</div><div class='ctx'> 	if (ssw &amp; DF)</div><div class='ctx'> 		pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",</div><div class='del'>-			ssw &amp; RW ? "read" : "write",</div><div class='add'>+			str_read_write(ssw &amp; RW),</div><div class='ctx'> 			fp-&gt;un.fmtb.daddr,</div><div class='ctx'> 			space_names[ssw &amp; DFC], fp-&gt;ptregs.pc);</div><div class='ctx'> </div><div class='hunk'>@@ -548,7 +548,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 			/* We might have an exception table for this PC */</div><div class='ctx'> 			if (ssw &amp; 4 &amp;&amp; !search_exception_tables(fp-&gt;ptregs.pc)) {</div><div class='ctx'> 				pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",</div><div class='del'>-				       ssw &amp; RW ? "read" : "write",</div><div class='add'>+				       str_read_write(ssw &amp; RW),</div><div class='ctx'> 				       fp-&gt;un.fmtb.daddr,</div><div class='ctx'> 				       space_names[ssw &amp; DFC], fp-&gt;ptregs.pc);</div><div class='ctx'> 				goto buserr;</div><div class='hunk'>@@ -564,7 +564,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> 				       mmusr);</div><div class='ctx'> 		} else if (mmusr &amp; (MMU_B|MMU_L|MMU_S)) {</div><div class='ctx'> 			pr_err("invalid %s access at %#lx from pc %#lx\n",</div><div class='del'>-			       !(ssw &amp; RW) ? "write" : "read", addr,</div><div class='add'>+			       str_read_write(ssw &amp; RW), addr,</div><div class='ctx'> 			       fp-&gt;ptregs.pc);</div><div class='ctx'> 			die_if_kernel("Oops",&amp;fp-&gt;ptregs,mmusr);</div><div class='ctx'> 			force_sig(SIGSEGV);</div><div class='hunk'>@@ -575,7 +575,7 @@ static inline void bus_error030 (struct frame *fp)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 			pr_err("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",</div><div class='del'>-			       !(ssw &amp; RW) ? "write" : "read", addr,</div><div class='add'>+			       str_read_write(ssw &amp; RW), addr,</div><div class='ctx'> 			       fp-&gt;ptregs.pc, ssw);</div><div class='ctx'> 			asm volatile ("ptestr #1,%1@,#0\n\t"</div><div class='ctx'> 				      "pmove %%psr,%0"</div><div class='hunk'>@@ -991,7 +991,7 @@ static void bad_super_trap(struct frame *fp)</div><div class='ctx'> 				fp-&gt;ptregs.pc + 4 : fp-&gt;un.fmtb.baddr);</div><div class='ctx'> 		if (ssw &amp; DF)</div><div class='ctx'> 			pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",</div><div class='del'>-				ssw &amp; RW ? "read" : "write",</div><div class='add'>+				str_read_write(ssw &amp; RW),</div><div class='ctx'> 				fp-&gt;un.fmtb.daddr, space_names[ssw &amp; DFC],</div><div class='ctx'> 				fp-&gt;ptregs.pc);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/m68k/kernel/uboot.c b/arch/m68k/kernel/uboot.c<br/>index 8bb1cb3a7490..fa7c279ead5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/uboot.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/kernel/uboot.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/kernel/uboot.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/kernel/uboot.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='hunk'>@@ -74,7 +73,7 @@ static void __init parse_uboot_commandline(char *commandp, int size)</div><div class='ctx'> 	uboot_cmd_end = sp[5];</div><div class='ctx'> </div><div class='ctx'> 	if (uboot_cmd_start &amp;&amp; uboot_cmd_end)</div><div class='del'>-		strncpy(commandp, (const char *)uboot_cmd_start, size);</div><div class='add'>+		strscpy(commandp, (const char *)uboot_cmd_start, size);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_BLK_DEV_INITRD)</div><div class='ctx'> 	uboot_initrd_start = sp[2];</div><div class='head'>diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile<br/>index 9158688e6cc6..15278a95259e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/lib/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/lib/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/lib/Makefile</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> # Makefile for m68k-specific library files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-lib-y	:= muldi3.o memcpy.o memset.o memmove.o</div><div class='add'>+lib-y	:= memcpy.o memset.o memmove.o</div><div class='ctx'> </div><div class='ctx'> lib-$(CONFIG_MMU) += uaccess.o</div><div class='ctx'> lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += mulsi3.o divsi3.o udivsi3.o</div><div class='head'>diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c<br/>deleted file mode 100644<br/>index 5012a9b218c7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/lib/muldi3.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/lib/muldi3.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and </div><div class='del'>-			   gcc-2.7.2.3/longlong.h which is: */</div><div class='del'>-/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.</div><div class='del'>-</div><div class='del'>-This file is part of GNU CC.</div><div class='del'>-</div><div class='del'>-GNU CC is free software; you can redistribute it and/or modify</div><div class='del'>-it under the terms of the GNU General Public License as published by</div><div class='del'>-the Free Software Foundation; either version 2, or (at your option)</div><div class='del'>-any later version.</div><div class='del'>-</div><div class='del'>-GNU CC is distributed in the hope that it will be useful,</div><div class='del'>-but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-GNU General Public License for more details. */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/libgcc.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_HAS_NO_MULDIV64</div><div class='del'>-</div><div class='del'>-#define SI_TYPE_SIZE 32</div><div class='del'>-#define __BITS4 (SI_TYPE_SIZE / 4)</div><div class='del'>-#define __ll_B (1L &lt;&lt; (SI_TYPE_SIZE / 2))</div><div class='del'>-#define __ll_lowpart(t) ((USItype) (t) % __ll_B)</div><div class='del'>-#define __ll_highpart(t) ((USItype) (t) / __ll_B)</div><div class='del'>-</div><div class='del'>-#define umul_ppmm(w1, w0, u, v)						\</div><div class='del'>-  do {									\</div><div class='del'>-    USItype __x0, __x1, __x2, __x3;					\</div><div class='del'>-    USItype __ul, __vl, __uh, __vh;					\</div><div class='del'>-									\</div><div class='del'>-    __ul = __ll_lowpart (u);						\</div><div class='del'>-    __uh = __ll_highpart (u);						\</div><div class='del'>-    __vl = __ll_lowpart (v);						\</div><div class='del'>-    __vh = __ll_highpart (v);						\</div><div class='del'>-									\</div><div class='del'>-    __x0 = (USItype) __ul * __vl;					\</div><div class='del'>-    __x1 = (USItype) __ul * __vh;					\</div><div class='del'>-    __x2 = (USItype) __uh * __vl;					\</div><div class='del'>-    __x3 = (USItype) __uh * __vh;					\</div><div class='del'>-									\</div><div class='del'>-    __x1 += __ll_highpart (__x0);/* this can't give carry */		\</div><div class='del'>-    __x1 += __x2;		/* but this indeed can */		\</div><div class='del'>-    if (__x1 &lt; __x2)		/* did we get it? */			\</div><div class='del'>-      __x3 += __ll_B;		/* yes, add it in the proper pos. */	\</div><div class='del'>-									\</div><div class='del'>-    (w1) = __x3 + __ll_highpart (__x1);					\</div><div class='del'>-    (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);		\</div><div class='del'>-  } while (0)</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define umul_ppmm(w1, w0, u, v) \</div><div class='del'>-  __asm__ ("mulu%.l %3,%1:%0"						\</div><div class='del'>-           : "=d" ((USItype)(w0)),					\</div><div class='del'>-             "=d" ((USItype)(w1))					\</div><div class='del'>-           : "%0" ((USItype)(u)),					\</div><div class='del'>-             "dmi" ((USItype)(v)))</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define __umulsidi3(u, v) \</div><div class='del'>-  ({DIunion __w;							\</div><div class='del'>-    umul_ppmm (__w.s.high, __w.s.low, u, v);				\</div><div class='del'>-    __w.ll; })</div><div class='del'>-</div><div class='del'>-typedef 	 int SItype	__mode(SI);</div><div class='del'>-typedef unsigned int USItype	__mode(SI);</div><div class='del'>-typedef		 int DItype	__mode(DI);</div><div class='del'>-typedef int word_type           __mode(__word__);</div><div class='del'>-</div><div class='del'>-struct DIstruct {SItype high, low;};</div><div class='del'>-</div><div class='del'>-typedef union</div><div class='del'>-{</div><div class='del'>-  struct DIstruct s;</div><div class='del'>-  DItype ll;</div><div class='del'>-} DIunion;</div><div class='del'>-</div><div class='del'>-DItype</div><div class='del'>-__muldi3 (DItype u, DItype v)</div><div class='del'>-{</div><div class='del'>-  DIunion w;</div><div class='del'>-  DIunion uu, vv;</div><div class='del'>-</div><div class='del'>-  uu.ll = u;</div><div class='del'>-  vv.ll = v;</div><div class='del'>-</div><div class='del'>-  w.ll = __umulsidi3 (uu.s.low, vv.s.low);</div><div class='del'>-  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high</div><div class='del'>-	       + (USItype) uu.s.high * (USItype) vv.s.low);</div><div class='del'>-</div><div class='del'>-  return w.ll;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__muldi3);</div><div class='head'>diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c<br/>index e324410ef239..c0033f885ed4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mac/config.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> /* keyb */</div><div class='hunk'>@@ -23,7 +22,6 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> /* keyb */</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/adb.h&gt;</div><div class='hunk'>@@ -793,7 +791,7 @@ static void __init mac_identify(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	macintosh_config = mac_data_table;</div><div class='del'>-	for (m = macintosh_config; m-&gt;ident != -1; m++) {</div><div class='add'>+	for (m = &amp;mac_data_table[1]; m-&gt;ident != -1; m++) {</div><div class='ctx'> 		if (m-&gt;ident == model) {</div><div class='ctx'> 			macintosh_config = m;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/m68k/mac/macboing.c b/arch/m68k/mac/macboing.c<br/>index faea2265a540..6312d5b600a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/macboing.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/macboing.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/macboing.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mac/macboing.c</a></div><div class='hunk'>@@ -183,7 +183,7 @@ void mac_mksound( unsigned int freq, unsigned int length )</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	del_timer( &amp;mac_sound_timer );</div><div class='add'>+	timer_delete(&amp;mac_sound_timer);</div><div class='ctx'> </div><div class='ctx'> 	for ( i = 0; i &lt; 0x800; i++ )</div><div class='ctx'> 		mac_asc_regs[ i ] = 0;</div><div class='hunk'>@@ -277,7 +277,7 @@ static void mac_quadra_ring_bell(struct timer_list *unused)</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	del_timer( &amp;mac_sound_timer );</div><div class='add'>+	timer_delete(&amp;mac_sound_timer);</div><div class='ctx'> </div><div class='ctx'> 	if ( mac_bell_duration-- &gt; 0 )</div><div class='ctx'> 	{</div><div class='head'>diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c<br/>index 01e6b0e37f8d..9cb813eda4fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/via.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mac/via.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mac/via.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mac/via.c</a></div><div class='hunk'>@@ -621,6 +621,22 @@ static u64 mac_read_clk(struct clocksource *cs)</div><div class='ctx'> 	 * These problems are avoided by ignoring the low byte. Clock accuracy</div><div class='ctx'> 	 * is 256 times worse (error can reach 0.327 ms) but CPU overhead is</div><div class='ctx'> 	 * reduced by avoiding slow VIA register accesses.</div><div class='add'>+	 *</div><div class='add'>+	 * The VIA timer counter observably decrements to 0xFFFF before the</div><div class='add'>+	 * counter reload interrupt gets raised. That complicates things a bit.</div><div class='add'>+	 *</div><div class='add'>+	 * State | vT1CH      | VIA_TIMER_1_INT | inference drawn</div><div class='add'>+	 * ------+------------+-----------------+-----------------------------</div><div class='add'>+	 * i     | FE thru 00 | false           | counter is decrementing</div><div class='add'>+	 * ii    | FF         | false           | counter wrapped</div><div class='add'>+	 * iii   | FF         | true            | wrapped, interrupt raised</div><div class='add'>+	 * iv    | FF         | false           | wrapped, interrupt handled</div><div class='add'>+	 * v     | FE thru 00 | true            | wrapped, interrupt unhandled</div><div class='add'>+	 *</div><div class='add'>+	 * State iv is never observed because handling the interrupt involves</div><div class='add'>+	 * a 6522 register access and every access consumes a "phi 2" clock</div><div class='add'>+	 * cycle. So 0xFF implies either state ii or state iii, depending on</div><div class='add'>+	 * the value of the VIA_TIMER_1_INT bit.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='head'>diff --git a/arch/m68k/math-emu/fp_emu.h b/arch/m68k/math-emu/fp_emu.h<br/>index c1ecfef7886a..6ac811c31ca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/math-emu/fp_emu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/math-emu/fp_emu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/math-emu/fp_emu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/math-emu/fp_emu.h</a></div><div class='hunk'>@@ -38,12 +38,12 @@</div><div class='ctx'> #ifndef _FP_EMU_H</div><div class='ctx'> #define _FP_EMU_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> #include &lt;asm/math-emu.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define IS_INF(a) ((a)-&gt;exp == 0x7fff)</div><div class='ctx'> #define IS_ZERO(a) ((a)-&gt;mant.m64 == 0)</div><div class='hunk'>@@ -124,7 +124,7 @@ extern const struct fp_ext fp_Inf;</div><div class='ctx'> 			: "a1", "d1", "d2", "memory");		\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * set, reset or clear a bit in the fp status register</div><div class='hunk'>@@ -141,6 +141,6 @@ extern const struct fp_ext fp_Inf;</div><div class='ctx'> 	btst	#(\bit&amp;7),(FPD_FPSR+3-(\bit/8),FPDATA)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _FP_EMU_H */</div><div class='head'>diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c<br/>index 1b47bec15832..488411af1b3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mm/init.c</a></div><div class='hunk'>@@ -68,10 +68,7 @@ void __init paging_init(void)</div><div class='ctx'> </div><div class='ctx'> 	high_memory = (void *) end_mem;</div><div class='ctx'> </div><div class='del'>-	empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+	empty_zero_page = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 	max_zone_pfn[ZONE_DMA] = end_mem &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	free_area_init(max_zone_pfn);</div><div class='ctx'> }</div><div class='hunk'>@@ -124,7 +121,5 @@ static inline void init_pointer_tables(void)</div><div class='ctx'> </div><div class='ctx'> void __init mem_init(void)</div><div class='ctx'> {</div><div class='del'>-	/* this will put all memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='ctx'> 	init_pointer_tables();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c<br/>index 9a6fa342e872..19a75029036c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/mcfmmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/mcfmmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/mcfmmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mm/mcfmmu.c</a></div><div class='hunk'>@@ -42,20 +42,14 @@ void __init paging_init(void)</div><div class='ctx'> 	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+	empty_zero_page = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	pg_dir = swapper_pg_dir;</div><div class='ctx'> 	memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));</div><div class='ctx'> </div><div class='ctx'> 	size = num_pages * sizeof(pte_t);</div><div class='ctx'> 	size = (size + PAGE_SIZE) &amp; ~(PAGE_SIZE-1);</div><div class='del'>-	next_pgtable = (unsigned long) memblock_alloc(size, PAGE_SIZE);</div><div class='del'>-	if (!next_pgtable)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, size, PAGE_SIZE);</div><div class='add'>+	next_pgtable = (unsigned long) memblock_alloc_or_panic(size, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	pg_dir += PAGE_OFFSET &gt;&gt; PGDIR_SHIFT;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c<br/>index c1761d309fc6..62283bc2ed79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/motorola.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/motorola.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/motorola.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mm/motorola.c</a></div><div class='hunk'>@@ -92,22 +92,24 @@ void mmu_page_dtor(void *page)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ++andreas: {get,free}_pointer_table rewritten to use unused fields from</div><div class='del'>-   struct page instead of separately kmalloced struct.  Stolen from</div><div class='add'>+   struct ptdesc instead of separately kmalloced struct.  Stolen from</div><div class='ctx'>    arch/sparc/mm/srmmu.c ... */</div><div class='ctx'> </div><div class='ctx'> typedef struct list_head ptable_desc;</div><div class='ctx'> </div><div class='del'>-static struct list_head ptable_list[2] = {</div><div class='add'>+static struct list_head ptable_list[3] = {</div><div class='ctx'> 	LIST_HEAD_INIT(ptable_list[0]),</div><div class='ctx'> 	LIST_HEAD_INIT(ptable_list[1]),</div><div class='add'>+	LIST_HEAD_INIT(ptable_list[2]),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define PD_PTABLE(page) ((ptable_desc *)&amp;(virt_to_page((void *)(page))-&gt;lru))</div><div class='del'>-#define PD_PAGE(ptable) (list_entry(ptable, struct page, lru))</div><div class='del'>-#define PD_MARKBITS(dp) (*(unsigned int *)&amp;PD_PAGE(dp)-&gt;index)</div><div class='add'>+#define PD_PTABLE(ptdesc) ((ptable_desc *)&amp;(virt_to_ptdesc((void *)(ptdesc))-&gt;pt_list))</div><div class='add'>+#define PD_PTDESC(ptable) (list_entry(ptable, struct ptdesc, pt_list))</div><div class='add'>+#define PD_MARKBITS(dp) (*(unsigned int *)&amp;PD_PTDESC(dp)-&gt;pt_index)</div><div class='ctx'> </div><div class='del'>-static const int ptable_shift[2] = {</div><div class='del'>-	7+2, /* PGD, PMD */</div><div class='add'>+static const int ptable_shift[3] = {</div><div class='add'>+	7+2, /* PGD */</div><div class='add'>+	7+2, /* PMD */</div><div class='ctx'> 	6+2, /* PTE */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -118,10 +120,10 @@ void __init init_pointer_table(void *table, int type)</div><div class='ctx'> {</div><div class='ctx'> 	ptable_desc *dp;</div><div class='ctx'> 	unsigned long ptable = (unsigned long)table;</div><div class='del'>-	unsigned long page = ptable &amp; PAGE_MASK;</div><div class='del'>-	unsigned int mask = 1U &lt;&lt; ((ptable - page)/ptable_size(type));</div><div class='add'>+	unsigned long pt_addr = ptable &amp; PAGE_MASK;</div><div class='add'>+	unsigned int mask = 1U &lt;&lt; ((ptable - pt_addr)/ptable_size(type));</div><div class='ctx'> </div><div class='del'>-	dp = PD_PTABLE(page);</div><div class='add'>+	dp = PD_PTABLE(pt_addr);</div><div class='ctx'> 	if (!(PD_MARKBITS(dp) &amp; mask)) {</div><div class='ctx'> 		PD_MARKBITS(dp) = ptable_mask(type);</div><div class='ctx'> 		list_add(dp, &amp;ptable_list[type]);</div><div class='hunk'>@@ -130,14 +132,14 @@ void __init init_pointer_table(void *table, int type)</div><div class='ctx'> 	PD_MARKBITS(dp) &amp;= ~mask;</div><div class='ctx'> 	pr_debug("init_pointer_table: %lx, %x\n", ptable, PD_MARKBITS(dp));</div><div class='ctx'> </div><div class='del'>-	/* unreserve the page so it's possible to free that page */</div><div class='del'>-	__ClearPageReserved(PD_PAGE(dp));</div><div class='del'>-	init_page_count(PD_PAGE(dp));</div><div class='add'>+	/* unreserve the ptdesc so it's possible to free that ptdesc */</div><div class='add'>+	__ClearPageReserved(ptdesc_page(PD_PTDESC(dp)));</div><div class='add'>+	init_page_count(ptdesc_page(PD_PTDESC(dp)));</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *get_pointer_table(int type)</div><div class='add'>+void *get_pointer_table(struct mm_struct *mm, int type)</div><div class='ctx'> {</div><div class='ctx'> 	ptable_desc *dp = ptable_list[type].next;</div><div class='ctx'> 	unsigned int mask = list_empty(&amp;ptable_list[type]) ? 0 : PD_MARKBITS(dp);</div><div class='hunk'>@@ -145,32 +147,44 @@ void *get_pointer_table(int type)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For a pointer table for a user process address space, a</div><div class='del'>-	 * table is taken from a page allocated for the purpose.  Each</div><div class='del'>-	 * page can hold 8 pointer tables.  The page is remapped in</div><div class='add'>+	 * table is taken from a ptdesc allocated for the purpose.  Each</div><div class='add'>+	 * ptdesc can hold 8 pointer tables.  The ptdesc is remapped in</div><div class='ctx'> 	 * virtual address space to be noncacheable.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (mask == 0) {</div><div class='del'>-		void *page;</div><div class='add'>+		struct ptdesc *ptdesc;</div><div class='ctx'> 		ptable_desc *new;</div><div class='add'>+		void *pt_addr;</div><div class='ctx'> </div><div class='del'>-		if (!(page = (void *)get_zeroed_page(GFP_KERNEL)))</div><div class='add'>+		ptdesc = pagetable_alloc(GFP_KERNEL | __GFP_ZERO, 0);</div><div class='add'>+		if (!ptdesc)</div><div class='ctx'> 			return NULL;</div><div class='ctx'> </div><div class='del'>-		if (type == TABLE_PTE) {</div><div class='add'>+		pt_addr = ptdesc_address(ptdesc);</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case TABLE_PTE:</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * m68k doesn't have SPLIT_PTE_PTLOCKS for not having</div><div class='ctx'> 			 * SMP.</div><div class='ctx'> 			 */</div><div class='del'>-			pagetable_pte_ctor(virt_to_ptdesc(page));</div><div class='add'>+			pagetable_pte_ctor(mm, ptdesc);</div><div class='add'>+			break;</div><div class='add'>+		case TABLE_PMD:</div><div class='add'>+			pagetable_pmd_ctor(mm, ptdesc);</div><div class='add'>+			break;</div><div class='add'>+		case TABLE_PGD:</div><div class='add'>+			pagetable_pgd_ctor(ptdesc);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		mmu_page_ctor(page);</div><div class='add'>+		mmu_page_ctor(pt_addr);</div><div class='ctx'> </div><div class='del'>-		new = PD_PTABLE(page);</div><div class='add'>+		new = PD_PTABLE(pt_addr);</div><div class='ctx'> 		PD_MARKBITS(new) = ptable_mask(type) - 1;</div><div class='ctx'> 		list_add_tail(new, dp);</div><div class='ctx'> </div><div class='del'>-		return (pmd_t *)page;</div><div class='add'>+		return (pmd_t *)pt_addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (tmp = 1, off = 0; (mask &amp; tmp) == 0; tmp &lt;&lt;= 1, off += ptable_size(type))</div><div class='hunk'>@@ -180,29 +194,27 @@ void *get_pointer_table(int type)</div><div class='ctx'> 		/* move to end of list */</div><div class='ctx'> 		list_move_tail(dp, &amp;ptable_list[type]);</div><div class='ctx'> 	}</div><div class='del'>-	return page_address(PD_PAGE(dp)) + off;</div><div class='add'>+	return ptdesc_address(PD_PTDESC(dp)) + off;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int free_pointer_table(void *table, int type)</div><div class='ctx'> {</div><div class='ctx'> 	ptable_desc *dp;</div><div class='ctx'> 	unsigned long ptable = (unsigned long)table;</div><div class='del'>-	unsigned long page = ptable &amp; PAGE_MASK;</div><div class='del'>-	unsigned int mask = 1U &lt;&lt; ((ptable - page)/ptable_size(type));</div><div class='add'>+	unsigned long pt_addr = ptable &amp; PAGE_MASK;</div><div class='add'>+	unsigned int mask = 1U &lt;&lt; ((ptable - pt_addr)/ptable_size(type));</div><div class='ctx'> </div><div class='del'>-	dp = PD_PTABLE(page);</div><div class='add'>+	dp = PD_PTABLE(pt_addr);</div><div class='ctx'> 	if (PD_MARKBITS (dp) &amp; mask)</div><div class='ctx'> 		panic ("table already free!");</div><div class='ctx'> </div><div class='ctx'> 	PD_MARKBITS (dp) |= mask;</div><div class='ctx'> </div><div class='ctx'> 	if (PD_MARKBITS(dp) == ptable_mask(type)) {</div><div class='del'>-		/* all tables in page are free, free page */</div><div class='add'>+		/* all tables in ptdesc are free, free ptdesc */</div><div class='ctx'> 		list_del(dp);</div><div class='del'>-		mmu_page_dtor((void *)page);</div><div class='del'>-		if (type == TABLE_PTE)</div><div class='del'>-			pagetable_pte_dtor(virt_to_ptdesc((void *)page));</div><div class='del'>-		free_page (page);</div><div class='add'>+		mmu_page_dtor((void *)pt_addr);</div><div class='add'>+		pagetable_dtor_free(virt_to_ptdesc((void *)pt_addr));</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	} else if (ptable_list[type].next != dp) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -491,10 +503,7 @@ void __init paging_init(void)</div><div class='ctx'> 	 * initialize the bad page table and bad page to point</div><div class='ctx'> 	 * to a couple of allocated pages</div><div class='ctx'> 	 */</div><div class='del'>-	empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+	empty_zero_page = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set up SFC/DFC registers</div><div class='head'>diff --git a/arch/m68k/mm/sun3mmu.c b/arch/m68k/mm/sun3mmu.c<br/>index 494739c1783e..1ecf6bdd08bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/sun3mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mm/sun3mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mm/sun3mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mm/sun3mmu.c</a></div><div class='hunk'>@@ -44,10 +44,7 @@ void __init paging_init(void)</div><div class='ctx'> 	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0, };</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> </div><div class='del'>-	empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+	empty_zero_page = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	address = PAGE_OFFSET;</div><div class='ctx'> 	pg_dir = swapper_pg_dir;</div><div class='hunk'>@@ -57,10 +54,7 @@ void __init paging_init(void)</div><div class='ctx'> 	size = num_pages * sizeof(pte_t);</div><div class='ctx'> 	size = (size + PAGE_SIZE) &amp; ~(PAGE_SIZE-1);</div><div class='ctx'> </div><div class='del'>-	next_pgtable = (unsigned long)memblock_alloc(size, PAGE_SIZE);</div><div class='del'>-	if (!next_pgtable)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, size, PAGE_SIZE);</div><div class='add'>+	next_pgtable = (unsigned long)memblock_alloc_or_panic(size, PAGE_SIZE);</div><div class='ctx'> 	bootmem_end = (next_pgtable + size + PAGE_SIZE) &amp; PAGE_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* Map whole memory from PAGE_OFFSET (0x0E000000) */</div><div class='head'>diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c<br/>index 8b5dc07f0811..3054d3857efa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme147/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme147/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme147/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mvme147/config.c</a></div><div class='hunk'>@@ -19,8 +19,9 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/major.h&gt;</div><div class='del'>-#include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/rtc/m48t59.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo-vme.h&gt;</div><div class='hunk'>@@ -32,16 +33,13 @@</div><div class='ctx'> #include &lt;asm/mvme147hw.h&gt;</div><div class='ctx'> #include &lt;asm/config.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "mvme147.h"</div><div class='ctx'> </div><div class='ctx'> static void mvme147_get_model(char *model);</div><div class='del'>-extern void mvme147_sched_init(void);</div><div class='del'>-extern int mvme147_hwclk (int, struct rtc_time *);</div><div class='add'>+static void __init mvme147_sched_init(void);</div><div class='ctx'> extern void mvme147_reset (void);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int bcd2int (unsigned char b);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> int __init mvme147_parse_bootinfo(const struct bi_record *bi)</div><div class='ctx'> {</div><div class='ctx'> 	uint16_t tag = be16_to_cpu(bi-&gt;tag);</div><div class='hunk'>@@ -79,7 +77,6 @@ void __init config_mvme147(void)</div><div class='ctx'> {</div><div class='ctx'> 	mach_sched_init		= mvme147_sched_init;</div><div class='ctx'> 	mach_init_IRQ		= mvme147_init_IRQ;</div><div class='del'>-	mach_hwclk		= mvme147_hwclk;</div><div class='ctx'> 	mach_reset		= mvme147_reset;</div><div class='ctx'> 	mach_get_model		= mvme147_get_model;</div><div class='ctx'> </div><div class='hunk'>@@ -88,6 +85,28 @@ void __init config_mvme147(void)</div><div class='ctx'> 		vme_brdtype = VME_TYPE_MVME147;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct resource m48t59_rsrc[] = {</div><div class='add'>+	DEFINE_RES_MEM(MVME147_RTC_BASE, 0x800),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct m48t59_plat_data m48t59_data = {</div><div class='add'>+	.type = M48T59RTC_TYPE_M48T02,</div><div class='add'>+	.yy_offset = 70,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mvme147_platform_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!MACH_IS_MVME147)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	platform_device_register_resndata(NULL, "rtc-m48t59", -1,</div><div class='add'>+					  m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc),</div><div class='add'>+					  &amp;m48t59_data, sizeof(m48t59_data));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(mvme147_platform_init);</div><div class='add'>+</div><div class='ctx'> static u64 mvme147_read_clk(struct clocksource *cs);</div><div class='ctx'> </div><div class='ctx'> static struct clocksource mvme147_clk = {</div><div class='hunk'>@@ -123,7 +142,7 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-void mvme147_sched_init (void)</div><div class='add'>+static void __init mvme147_sched_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,</div><div class='ctx'> 			"timer 1", NULL))</div><div class='hunk'>@@ -161,27 +180,31 @@ static u64 mvme147_read_clk(struct clocksource *cs)</div><div class='ctx'> 	return ticks;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcd2int (unsigned char b)</div><div class='add'>+static void scc_delay(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__ ("nop; nop;");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void scc_write(char ch)</div><div class='ctx'> {</div><div class='del'>-	return ((b&gt;&gt;4)*10 + (b&amp;15));</div><div class='add'>+	do {</div><div class='add'>+		scc_delay();</div><div class='add'>+	} while (!(in_8(M147_SCC_A_ADDR) &amp; BIT(2)));</div><div class='add'>+	scc_delay();</div><div class='add'>+	out_8(M147_SCC_A_ADDR, 8);</div><div class='add'>+	scc_delay();</div><div class='add'>+	out_8(M147_SCC_A_ADDR, ch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mvme147_hwclk(int op, struct rtc_time *t)</div><div class='add'>+void mvme147_scc_write(struct console *co, const char *str, unsigned int count)</div><div class='ctx'> {</div><div class='del'>-	if (!op) {</div><div class='del'>-		m147_rtc-&gt;ctrl = RTC_READ;</div><div class='del'>-		t-&gt;tm_year = bcd2int (m147_rtc-&gt;bcd_year);</div><div class='del'>-		t-&gt;tm_mon  = bcd2int(m147_rtc-&gt;bcd_mth) - 1;</div><div class='del'>-		t-&gt;tm_mday = bcd2int (m147_rtc-&gt;bcd_dom);</div><div class='del'>-		t-&gt;tm_hour = bcd2int (m147_rtc-&gt;bcd_hr);</div><div class='del'>-		t-&gt;tm_min  = bcd2int (m147_rtc-&gt;bcd_min);</div><div class='del'>-		t-&gt;tm_sec  = bcd2int (m147_rtc-&gt;bcd_sec);</div><div class='del'>-		m147_rtc-&gt;ctrl = 0;</div><div class='del'>-		if (t-&gt;tm_year &lt; 70)</div><div class='del'>-			t-&gt;tm_year += 100;</div><div class='del'>-	} else {</div><div class='del'>-		/* FIXME Setting the time is not yet supported */</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	while (count--)	{</div><div class='add'>+		if (*str == '\n')</div><div class='add'>+			scc_write('\r');</div><div class='add'>+		scc_write(*str++);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/mvme147/mvme147.h b/arch/m68k/mvme147/mvme147.h<br/>new file mode 100644<br/>index 000000000000..140bc98b0102<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme147/mvme147.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mvme147/mvme147.h</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+</div><div class='add'>+struct console;</div><div class='add'>+</div><div class='add'>+/* config.c */</div><div class='add'>+void mvme147_scc_write(struct console *co, const char *str, unsigned int count);</div><div class='head'>diff --git a/arch/m68k/mvme16x/Makefile b/arch/m68k/mvme16x/Makefile<br/>index a8a368c2cbea..02f9e4ad8209 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme16x/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme16x/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mvme16x/Makefile</a></div><div class='hunk'>@@ -3,4 +3,4 @@</div><div class='ctx'> # Makefile for Linux arch/m68k/mvme16x source directory</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-y		:= config.o rtc.o</div><div class='add'>+obj-y		:= config.o</div><div class='head'>diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c<br/>index d1fbd1704d65..99768fe8da73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme16x/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme16x/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/mvme16x/config.c</a></div><div class='hunk'>@@ -21,9 +21,10 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/major.h&gt;</div><div class='del'>-#include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/rtc/m48t59.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo-vme.h&gt;</div><div class='hunk'>@@ -39,16 +40,10 @@</div><div class='ctx'> </div><div class='ctx'> extern t_bdid mvme_bdid;</div><div class='ctx'> </div><div class='del'>-static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;</div><div class='del'>-</div><div class='ctx'> static void mvme16x_get_model(char *model);</div><div class='ctx'> extern void mvme16x_sched_init(void);</div><div class='del'>-extern int mvme16x_hwclk (int, struct rtc_time *);</div><div class='ctx'> extern void mvme16x_reset (void);</div><div class='ctx'> </div><div class='del'>-int bcd2int (unsigned char b);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> unsigned short mvme16x_config;</div><div class='ctx'> EXPORT_SYMBOL(mvme16x_config);</div><div class='ctx'> </div><div class='hunk'>@@ -268,7 +263,6 @@ void __init config_mvme16x(void)</div><div class='ctx'> </div><div class='ctx'>     mach_sched_init      = mvme16x_sched_init;</div><div class='ctx'>     mach_init_IRQ        = mvme16x_init_IRQ;</div><div class='del'>-    mach_hwclk           = mvme16x_hwclk;</div><div class='ctx'>     mach_reset		 = mvme16x_reset;</div><div class='ctx'>     mach_get_model       = mvme16x_get_model;</div><div class='ctx'>     mach_get_hardware_list = mvme16x_get_hardware_list;</div><div class='hunk'>@@ -312,6 +306,28 @@ void __init config_mvme16x(void)</div><div class='ctx'>     }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct resource m48t59_rsrc[] = {</div><div class='add'>+	DEFINE_RES_MEM(MVME_RTC_BASE, 0x2000),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct m48t59_plat_data m48t59_data = {</div><div class='add'>+	.type = M48T59RTC_TYPE_M48T08,</div><div class='add'>+	.yy_offset = 70,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mvme16x_platform_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!MACH_IS_MVME16x)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	platform_device_register_resndata(NULL, "rtc-m48t59", -1,</div><div class='add'>+					  m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc),</div><div class='add'>+					  &amp;m48t59_data, sizeof(m48t59_data));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(mvme16x_platform_init);</div><div class='add'>+</div><div class='ctx'> static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *new = (unsigned long *)vectors;</div><div class='hunk'>@@ -426,28 +442,3 @@ static u64 mvme16x_read_clk(struct clocksource *cs)</div><div class='ctx'> </div><div class='ctx'> 	return ticks;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int bcd2int (unsigned char b)</div><div class='del'>-{</div><div class='del'>-	return ((b&gt;&gt;4)*10 + (b&amp;15));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mvme16x_hwclk(int op, struct rtc_time *t)</div><div class='del'>-{</div><div class='del'>-	if (!op) {</div><div class='del'>-		rtc-&gt;ctrl = RTC_READ;</div><div class='del'>-		t-&gt;tm_year = bcd2int (rtc-&gt;bcd_year);</div><div class='del'>-		t-&gt;tm_mon  = bcd2int(rtc-&gt;bcd_mth) - 1;</div><div class='del'>-		t-&gt;tm_mday = bcd2int (rtc-&gt;bcd_dom);</div><div class='del'>-		t-&gt;tm_hour = bcd2int (rtc-&gt;bcd_hr);</div><div class='del'>-		t-&gt;tm_min  = bcd2int (rtc-&gt;bcd_min);</div><div class='del'>-		t-&gt;tm_sec  = bcd2int (rtc-&gt;bcd_sec);</div><div class='del'>-		rtc-&gt;ctrl = 0;</div><div class='del'>-		if (t-&gt;tm_year &lt; 70)</div><div class='del'>-			t-&gt;tm_year += 100;</div><div class='del'>-	} else {</div><div class='del'>-		/* FIXME Setting the time is not yet supported */</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/m68k/mvme16x/rtc.c b/arch/m68k/mvme16x/rtc.c<br/>deleted file mode 100644<br/>index ccbaae1125e6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/mvme16x/rtc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/mvme16x/rtc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,165 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- *	Real Time Clock interface for Linux on the MVME16x</div><div class='del'>- *</div><div class='del'>- * Based on the PC driver by Paul Gortmaker.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define RTC_VERSION		"1.00"</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/miscdevice.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/capability.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/poll.h&gt;</div><div class='del'>-#include &lt;linux/rtc.h&gt;	/* For struct rtc_time and ioctls, etc */</div><div class='del'>-#include &lt;linux/bcd.h&gt;</div><div class='del'>-#include &lt;asm/mvme16xhw.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	We sponge a minor off of the misc major. No need slurping</div><div class='del'>- *	up another valuable major dev number for this. If you add</div><div class='del'>- *	an ioctl, make sure you don't conflict with SPARC's RTC</div><div class='del'>- *	ioctls.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const unsigned char days_in_mo[] =</div><div class='del'>-{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};</div><div class='del'>-</div><div class='del'>-static atomic_t rtc_ready = ATOMIC_INIT(1);</div><div class='del'>-</div><div class='del'>-static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct rtc_time wtime;</div><div class='del'>-	void __user *argp = (void __user *)arg;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case RTC_RD_TIME:	/* Read the time/date from RTC	*/</div><div class='del'>-	{</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		/* Ensure clock and real-time-mode-register are accessible */</div><div class='del'>-		rtc-&gt;ctrl = RTC_READ;</div><div class='del'>-		memset(&amp;wtime, 0, sizeof(struct rtc_time));</div><div class='del'>-		wtime.tm_sec =  bcd2bin(rtc-&gt;bcd_sec);</div><div class='del'>-		wtime.tm_min =  bcd2bin(rtc-&gt;bcd_min);</div><div class='del'>-		wtime.tm_hour = bcd2bin(rtc-&gt;bcd_hr);</div><div class='del'>-		wtime.tm_mday =  bcd2bin(rtc-&gt;bcd_dom);</div><div class='del'>-		wtime.tm_mon =  bcd2bin(rtc-&gt;bcd_mth)-1;</div><div class='del'>-		wtime.tm_year = bcd2bin(rtc-&gt;bcd_year);</div><div class='del'>-		if (wtime.tm_year &lt; 70)</div><div class='del'>-			wtime.tm_year += 100;</div><div class='del'>-		wtime.tm_wday = bcd2bin(rtc-&gt;bcd_dow)-1;</div><div class='del'>-		rtc-&gt;ctrl = 0;</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-		return copy_to_user(argp, &amp;wtime, sizeof wtime) ?</div><div class='del'>-								-EFAULT : 0;</div><div class='del'>-	}</div><div class='del'>-	case RTC_SET_TIME:	/* Set the RTC */</div><div class='del'>-	{</div><div class='del'>-		struct rtc_time rtc_tm;</div><div class='del'>-		unsigned char mon, day, hrs, min, sec, leap_yr;</div><div class='del'>-		unsigned int yrs;</div><div class='del'>-</div><div class='del'>-		if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-			return -EACCES;</div><div class='del'>-</div><div class='del'>-		if (copy_from_user(&amp;rtc_tm, argp, sizeof(struct rtc_time)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		yrs = rtc_tm.tm_year;</div><div class='del'>-		if (yrs &lt; 1900)</div><div class='del'>-			yrs += 1900;</div><div class='del'>-		mon = rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */</div><div class='del'>-		day = rtc_tm.tm_mday;</div><div class='del'>-		hrs = rtc_tm.tm_hour;</div><div class='del'>-		min = rtc_tm.tm_min;</div><div class='del'>-		sec = rtc_tm.tm_sec;</div><div class='del'>-</div><div class='del'>-		leap_yr = ((!(yrs % 4) &amp;&amp; (yrs % 100)) || !(yrs % 400));</div><div class='del'>-</div><div class='del'>-		if ((mon &gt; 12) || (day == 0))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if (day &gt; (days_in_mo[mon] + ((mon == 2) &amp;&amp; leap_yr)))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if ((hrs &gt;= 24) || (min &gt;= 60) || (sec &gt;= 60))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if (yrs &gt;= 2070)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		rtc-&gt;ctrl     = RTC_WRITE;</div><div class='del'>-</div><div class='del'>-		rtc-&gt;bcd_sec  = bin2bcd(sec);</div><div class='del'>-		rtc-&gt;bcd_min  = bin2bcd(min);</div><div class='del'>-		rtc-&gt;bcd_hr   = bin2bcd(hrs);</div><div class='del'>-		rtc-&gt;bcd_dom  = bin2bcd(day);</div><div class='del'>-		rtc-&gt;bcd_mth  = bin2bcd(mon);</div><div class='del'>-		rtc-&gt;bcd_year = bin2bcd(yrs%100);</div><div class='del'>-</div><div class='del'>-		rtc-&gt;ctrl     = 0;</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We enforce only one user at a time here with the open/close.</div><div class='del'>- */</div><div class='del'>-static int rtc_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	if( !atomic_dec_and_test(&amp;rtc_ready) )</div><div class='del'>-	{</div><div class='del'>-		atomic_inc( &amp;rtc_ready );</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rtc_release(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	atomic_inc( &amp;rtc_ready );</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	The various file operations we support.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const struct file_operations rtc_fops = {</div><div class='del'>-	.unlocked_ioctl	= rtc_ioctl,</div><div class='del'>-	.open		= rtc_open,</div><div class='del'>-	.release	= rtc_release,</div><div class='del'>-	.llseek		= noop_llseek,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct miscdevice rtc_dev=</div><div class='del'>-{</div><div class='del'>-	.minor =	RTC_MINOR,</div><div class='del'>-	.name =		"rtc",</div><div class='del'>-	.fops =		&amp;rtc_fops</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init rtc_MK48T08_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!MACH_IS_MVME16x)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pr_info("MK48T08 Real Time Clock Driver v%s\n", RTC_VERSION);</div><div class='del'>-	return misc_register(&amp;rtc_dev);</div><div class='del'>-}</div><div class='del'>-device_initcall(rtc_MK48T08_init);</div><div class='head'>diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c<br/>index de7870ad2a30..5a4258697622 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/q40/config.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/q40/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/q40/config.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/q40/config.c</a></div><div class='hunk'>@@ -13,14 +13,12 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/major.h&gt;</div><div class='ctx'> #include &lt;linux/serial_reg.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/bcd.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/sun3/mmu_emu.c b/arch/m68k/sun3/mmu_emu.c<br/>index 119bd32efcfb..b39fc3717d8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/sun3/mmu_emu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/sun3/mmu_emu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/sun3/mmu_emu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/sun3/mmu_emu.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/sched/mm.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='hunk'>@@ -370,8 +371,8 @@ int mmu_emu_handle_fault (unsigned long vaddr, int read_flag, int kernel_fault)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_MMU_EMU</div><div class='del'>-	pr_info("%s: vaddr=%lx type=%s crp=%p\n", __func__, vaddr,</div><div class='del'>-		read_flag ? "read" : "write", crp);</div><div class='add'>+	pr_info("%s: vaddr=%lx type=%s crp=%px\n", __func__, vaddr,</div><div class='add'>+		str_read_write(read_flag), crp);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	segment = (vaddr &gt;&gt; SUN3_PMEG_SIZE_BITS) &amp; 0x7FF;</div><div class='hunk'>@@ -417,7 +418,7 @@ int mmu_emu_handle_fault (unsigned long vaddr, int read_flag, int kernel_fault)</div><div class='ctx'> 		pte_val (*pte) |= SUN3_PAGE_ACCESSED;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_MMU_EMU</div><div class='del'>-	pr_info("seg:%ld crp:%p -&gt;", get_fs().seg, crp);</div><div class='add'>+	pr_info("seg:%ld crp:%px -&gt;", get_fc(), crp);</div><div class='ctx'> 	print_pte_vaddr (vaddr);</div><div class='ctx'> 	pr_cont("\n");</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/m68k/sun3/sun3dvma.c b/arch/m68k/sun3/sun3dvma.c<br/>index 6ebf52740ad7..225fc735e466 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/m68k/sun3/sun3dvma.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/m68k/sun3/sun3dvma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/m68k/sun3/sun3dvma.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/m68k/sun3/sun3dvma.c</a></div><div class='hunk'>@@ -252,12 +252,8 @@ void __init dvma_init(void)</div><div class='ctx'> </div><div class='ctx'> 	list_add(&amp;(hole-&gt;list), &amp;hole_list);</div><div class='ctx'> </div><div class='del'>-	iommu_use = memblock_alloc(IOMMU_TOTAL_ENTRIES * sizeof(unsigned long),</div><div class='add'>+	iommu_use = memblock_alloc_or_panic(IOMMU_TOTAL_ENTRIES * sizeof(unsigned long),</div><div class='ctx'> 				   SMP_CACHE_BYTES);</div><div class='del'>-	if (!iommu_use)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      IOMMU_TOTAL_ENTRIES * sizeof(unsigned long));</div><div class='del'>-</div><div class='ctx'> 	dvma_unmap_iommu(DVMA_START, DVMA_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	sun3_dvma_init();</div><div class='head'>diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig<br/>index f18ec02ddeb2..484ebb3baedf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/Kconfig</a></div><div class='hunk'>@@ -28,7 +28,6 @@ config MICROBLAZE</div><div class='ctx'> 	select HAVE_DEBUG_KMEMLEAK</div><div class='ctx'> 	select HAVE_DMA_CONTIGUOUS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_PAGE_SIZE_4KB</div><div class='head'>diff --git a/arch/microblaze/Kconfig.platform b/arch/microblaze/Kconfig.platform<br/>index 7795f90dad86..9cf9007ed69a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/Kconfig.platform?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/Kconfig.platform</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/Kconfig.platform?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/Kconfig.platform</a></div><div class='hunk'>@@ -8,10 +8,10 @@</div><div class='ctx'> menu "Platform options"</div><div class='ctx'> </div><div class='ctx'> config OPT_LIB_FUNCTION</div><div class='del'>-	bool "Optimalized lib function"</div><div class='add'>+	bool "Optimized lib function"</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Allows turn on optimalized library function (memcpy and memmove).</div><div class='add'>+	  Turns on optimized library functions (memcpy and memmove).</div><div class='ctx'> 	  They are optimized by using word alignment. This will work</div><div class='ctx'> 	  fine if both source and destination are aligned on the same</div><div class='ctx'> 	  boundary. However, if they are aligned on different boundaries</div><div class='hunk'>@@ -19,13 +19,13 @@ config OPT_LIB_FUNCTION</div><div class='ctx'> 	  on MicroBlaze systems without a barrel shifter.</div><div class='ctx'> </div><div class='ctx'> config OPT_LIB_ASM</div><div class='del'>-	bool "Optimalized lib function ASM"</div><div class='add'>+	bool "Optimized lib function ASM"</div><div class='ctx'> 	depends on OPT_LIB_FUNCTION &amp;&amp; (XILINX_MICROBLAZE0_USE_BARREL = 1)</div><div class='ctx'> 	depends on CPU_BIG_ENDIAN</div><div class='ctx'> 	default n</div><div class='ctx'> 	help</div><div class='del'>-	  Allows turn on optimalized library function (memcpy and memmove).</div><div class='del'>-	  Function are written in asm code.</div><div class='add'>+	  Turns on optimized library functions (memcpy and memmove).</div><div class='add'>+	  They are written in assembly.</div><div class='ctx'> </div><div class='ctx'> # Definitions for MICROBLAZE0</div><div class='ctx'> comment "Definitions for MICROBLAZE0"</div><div class='head'>diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild<br/>index a055f5dbe00a..7178f990e8b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/Kbuild</a></div><div class='hunk'>@@ -8,3 +8,4 @@ generic-y += parport.h</div><div class='ctx'> generic-y += syscalls.h</div><div class='ctx'> generic-y += tlb.h</div><div class='ctx'> generic-y += user.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/microblaze/include/asm/asm-compat.h b/arch/microblaze/include/asm/asm-compat.h<br/>index c05259ce2d2c..9f0461476231 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/asm-compat.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/asm-compat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/asm-compat.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/asm-compat.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #  define stringify_in_c(...)	__VA_ARGS__</div><div class='ctx'> #  define ASM_CONST(x)		x</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/microblaze/include/asm/current.h b/arch/microblaze/include/asm/current.h<br/>index a4bb45be30e6..099e69f32bf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/current.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/current.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/current.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/current.h</a></div><div class='hunk'>@@ -14,13 +14,13 @@</div><div class='ctx'>  * but check asm/microblaze/kernel/entry.S to be sure.</div><div class='ctx'>  */</div><div class='ctx'> #define CURRENT_TASK	r31</div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Dedicate r31 to keeping the current task pointer</div><div class='ctx'>  */</div><div class='ctx'> register struct task_struct *current asm("r31");</div><div class='ctx'> </div><div class='ctx'> # define get_current()	current</div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MICROBLAZE_CURRENT_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h<br/>index 6c42bed41166..9efadf12397c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/entry.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/entry.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/entry.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/entry.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PER_CPU(var) var</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> DECLARE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */</div><div class='ctx'> DECLARE_PER_CPU(unsigned int, KM); /* Kernel/user mode */</div><div class='ctx'> DECLARE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */</div><div class='hunk'>@@ -29,6 +29,6 @@ DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */</div><div class='ctx'> DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */</div><div class='ctx'> </div><div class='ctx'> extern asmlinkage void do_notify_resume(struct pt_regs *regs, int in_syscall);</div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MICROBLAZE_ENTRY_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h<br/>index 967f175173e1..c4591e4f7175 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/exceptions.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/exceptions.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/exceptions.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/exceptions.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #define _ASM_MICROBLAZE_EXCEPTIONS_H</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Macros to enable and disable HW exceptions in the MSR */</div><div class='ctx'> /* Define MSR enable bit for HW exceptions */</div><div class='hunk'>@@ -64,6 +64,6 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);</div><div class='ctx'> void die(const char *str, struct pt_regs *fp, long err);</div><div class='ctx'> void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);</div><div class='ctx'> </div><div class='del'>-#endif /*__ASSEMBLY__ */</div><div class='add'>+#endif /*__ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/fixmap.h b/arch/microblaze/include/asm/fixmap.h<br/>index e6e9288bff76..f9797849e4d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/fixmap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/fixmap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/fixmap.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #ifndef _ASM_FIXMAP_H</div><div class='ctx'> #define _ASM_FIXMAP_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #ifdef CONFIG_HIGHMEM</div><div class='hunk'>@@ -62,5 +62,5 @@ extern void __set_fixmap(enum fixed_addresses idx,</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/fixmap.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/microblaze/include/asm/ftrace.h b/arch/microblaze/include/asm/ftrace.h<br/>index 4ca38b92a3a2..27c1bafb669c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/ftrace.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define MCOUNT_ADDR		((unsigned long)(_mcount))</div><div class='ctx'> #define MCOUNT_INSN_SIZE	8 /* sizeof mcount call */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void _mcount(void);</div><div class='ctx'> extern void ftrace_call_graph(void);</div><div class='ctx'> void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr);</div><div class='head'>diff --git a/arch/microblaze/include/asm/kgdb.h b/arch/microblaze/include/asm/kgdb.h<br/>index 8dc5ebb07fd5..321c3c8bfcf2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/kgdb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/kgdb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/kgdb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/kgdb.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #ifndef __MICROBLAZE_KGDB_H__</div><div class='ctx'> #define __MICROBLAZE_KGDB_H__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define CACHE_FLUSH_IS_SAFE	1</div><div class='ctx'> #define BUFMAX			2048</div><div class='hunk'>@@ -27,6 +27,6 @@ static inline void arch_kgdb_breakpoint(void)</div><div class='ctx'> struct pt_regs;</div><div class='ctx'> asmlinkage void microblaze_kgdb_break(struct pt_regs *regs);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __MICROBLAZE_KGDB_H__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h<br/>index b928a87c0076..7262dc4da338 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/mmu.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #define _ASM_MICROBLAZE_MMU_H</div><div class='ctx'> </div><div class='ctx'> #  ifdef __KERNEL__</div><div class='del'>-#   ifndef __ASSEMBLY__</div><div class='add'>+#   ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Default "unsigned long" context */</div><div class='ctx'> typedef unsigned long mm_context_t;</div><div class='hunk'>@@ -56,7 +56,7 @@ extern void _tlbia(void);		/* invalidate all TLB entries */</div><div class='ctx'>  * mapping has to increase tlb_skip size.</div><div class='ctx'>  */</div><div class='ctx'> extern u32 tlb_skip;</div><div class='del'>-#   endif /* __ASSEMBLY__ */</div><div class='add'>+#   endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The</div><div class='head'>diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h<br/>index 8810f4f1c3b0..90ac9f34b4b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/page.h</a></div><div class='hunk'>@@ -19,16 +19,13 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(ASM_CONST(1) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define LOAD_OFFSET	ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR))</div><div class='ctx'> </div><div class='ctx'> #define PTE_SHIFT	(PAGE_SHIFT - 2)	/* 1024 ptes per page */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PAGE_OFFSET -- the first address of the first page of memory. With MMU</div><div class='hunk'>@@ -101,10 +98,9 @@ extern int page_is_ram(unsigned long pfn);</div><div class='ctx'> </div><div class='ctx'> #  define virt_to_page(kaddr)	(pfn_to_page(__pa(kaddr) &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> #  define page_to_virt(page)   __va(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#  define page_to_phys(page)     (page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #  define ARCH_PFN_OFFSET	(memory_start &gt;&gt; PAGE_SHIFT)</div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Convert between virtual and physical address for MMU. */</div><div class='ctx'> /* Handle MicroBlaze processor with virtual memory. */</div><div class='hunk'>@@ -117,7 +113,7 @@ extern int page_is_ram(unsigned long pfn);</div><div class='ctx'> #define tovirt(rd, rs) \</div><div class='ctx'> 	addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> # define __pa(x)	__virt_to_phys((unsigned long)(x))</div><div class='ctx'> # define __va(x)	((void *)__phys_to_virt((unsigned long)(x)))</div><div class='hunk'>@@ -134,7 +130,7 @@ static inline const void *pfn_to_virt(unsigned long pfn)</div><div class='ctx'> </div><div class='ctx'> #define	virt_addr_valid(vaddr)	(pfn_valid(virt_to_pfn(vaddr)))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define TOPHYS(addr)  __virt_to_phys(addr)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h<br/>index 6c33b05f730f..084a8a0dc239 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -21,12 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> extern void __bad_pte(pmd_t *pmd);</div><div class='ctx'> </div><div class='del'>-static inline pgd_t *get_pgd(void)</div><div class='del'>-{</div><div class='del'>-	return (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define pgd_alloc(mm)		get_pgd()</div><div class='add'>+#define pgd_alloc(mm)		__pgd_alloc(mm, 0)</div><div class='ctx'> </div><div class='ctx'> extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h<br/>index e4ea2ec3642f..4eb76de6be4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/pgtable.h</a></div><div class='hunk'>@@ -10,14 +10,14 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern int mem_init_done;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable-nopmd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='hunk'>@@ -39,7 +39,7 @@ extern pte_t *va_to_pte(unsigned long address);</div><div class='ctx'> #define VMALLOC_START	(CONFIG_KERNEL_START + CONFIG_LOWMEM_SIZE)</div><div class='ctx'> #define VMALLOC_END	ioremap_bot</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Macro to mark a page protection value as "uncacheable".</div><div class='hunk'>@@ -99,7 +99,6 @@ extern pte_t *va_to_pte(unsigned long address);</div><div class='ctx'> #define PTRS_PER_PGD	(1 &lt;&lt; (32 - PGDIR_SHIFT))</div><div class='ctx'> </div><div class='ctx'> #define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)</div><div class='del'>-#define FIRST_USER_PGD_NR	0</div><div class='ctx'> </div><div class='ctx'> #define USER_PGD_PTRS (PAGE_OFFSET &gt;&gt; PGDIR_SHIFT)</div><div class='ctx'> #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)</div><div class='hunk'>@@ -208,7 +207,7 @@ extern pte_t *va_to_pte(unsigned long address);</div><div class='ctx'>  * Also, write permissions imply read permissions.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * ZERO_PAGE is a global shared page that is always zero: used</div><div class='ctx'>  * for zero-mapped memory areas etc..</div><div class='hunk'>@@ -216,7 +215,7 @@ extern pte_t *va_to_pte(unsigned long address);</div><div class='ctx'> extern unsigned long empty_zero_page[1024];</div><div class='ctx'> #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define pte_none(pte)		((pte_val(pte) &amp; ~_PTE_NONE_MASK) == 0)</div><div class='ctx'> #define pte_present(pte)	(pte_val(pte) &amp; _PAGE_PRESENT)</div><div class='hunk'>@@ -237,7 +236,7 @@ extern unsigned long empty_zero_page[1024];</div><div class='ctx'> #define pfn_pte(pfn, prot) \</div><div class='ctx'> 	__pte(((pte_basic_t)(pfn) &lt;&lt; PFN_PTE_SHIFT) | pgprot_val(prot))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * The following only work if pte_present() is true.</div><div class='ctx'>  * Undefined behaviour if not..</div><div class='hunk'>@@ -285,14 +284,6 @@ static inline pte_t mk_pte_phys(phys_addr_t physpage, pgprot_t pgprot)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define mk_pte(page, pgprot) \</div><div class='del'>-({									   \</div><div class='del'>-	pte_t pte;							   \</div><div class='del'>-	pte_val(pte) = (((page - mem_map) &lt;&lt; PAGE_SHIFT) + memory_start) |  \</div><div class='del'>-			pgprot_val(pgprot);				   \</div><div class='del'>-	pte;								   \</div><div class='del'>-})</div><div class='del'>-</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	pte_val(pte) = (pte_val(pte) &amp; _PAGE_CHG_MASK) | pgprot_val(newprot);</div><div class='hunk'>@@ -406,7 +397,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) &gt;&gt; 2 })</div><div class='ctx'> #define __swp_entry_to_pte(x)	((pte_t) { (x).val &lt;&lt; 2 })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -444,13 +435,13 @@ extern int mem_init_done;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void __init mmu_init(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned long ioremap_bot, ioremap_base;</div><div class='ctx'> </div><div class='ctx'> void setup_memory(void);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MICROBLAZE_PGTABLE_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h<br/>index 4e193c7550df..d59bdfffca7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/processor.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/entry.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> /* from kernel/cpu/mb.c */</div><div class='ctx'> extern const struct seq_operations cpuinfo_op;</div><div class='ctx'> </div><div class='hunk'>@@ -29,7 +29,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp);</div><div class='ctx'> extern void ret_from_fork(void);</div><div class='ctx'> extern void ret_from_kernel_thread(void);</div><div class='ctx'> </div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is used to define STACK_TOP, and with MMU it must be below</div><div class='hunk'>@@ -45,7 +45,7 @@ extern void ret_from_kernel_thread(void);</div><div class='ctx'> </div><div class='ctx'> # define THREAD_KSP	0</div><div class='ctx'> </div><div class='del'>-#  ifndef __ASSEMBLY__</div><div class='add'>+#  ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* If you change this, you must change the associated assembly-languages</div><div class='ctx'>  * constants defined below, THREAD_*.</div><div class='hunk'>@@ -88,5 +88,5 @@ unsigned long __get_wchan(struct task_struct *p);</div><div class='ctx'> extern struct dentry *of_debugfs_root;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#  endif /* __ASSEMBLY__ */</div><div class='add'>+#  endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_MICROBLAZE_PROCESSOR_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h<br/>index bfcb89df5e26..17982292a64f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/ptrace.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define kernel_mode(regs)		((regs)-&gt;pt_mode)</div><div class='ctx'> #define user_mode(regs)			(!kernel_mode(regs))</div><div class='ctx'> </div><div class='hunk'>@@ -20,5 +20,5 @@ static inline long regs_return_value(struct pt_regs *regs)</div><div class='ctx'> 	return regs-&gt;r3;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_MICROBLAZE_PTRACE_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h<br/>index a9311ad84a67..f5008f5e7a5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/sections.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/sections.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/sections.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/sections.h</a></div><div class='hunk'>@@ -10,11 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/sections.h&gt;</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> extern char _ssbss[], _esbss[];</div><div class='ctx'> extern unsigned long __ivt_start[], __ivt_end[];</div><div class='ctx'> </div><div class='ctx'> extern u32 _fdt_start[], _fdt_end[];</div><div class='ctx'> </div><div class='del'>-# endif /* !__ASSEMBLY__ */</div><div class='add'>+# endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_MICROBLAZE_SECTIONS_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h<br/>index bf2600f75959..837ed0bbae4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/setup.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> extern char cmd_line[COMMAND_LINE_SIZE];</div><div class='ctx'> </div><div class='ctx'> extern char *klimit;</div><div class='hunk'>@@ -25,5 +25,5 @@ void machine_shutdown(void);</div><div class='ctx'> void machine_halt(void);</div><div class='ctx'> void machine_power_off(void);</div><div class='ctx'> </div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_MICROBLAZE_SETUP_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/syscall.h b/arch/microblaze/include/asm/syscall.h<br/>index 5eb3f624cc59..b5b6b91fae3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/syscall.h</a></div><div class='hunk'>@@ -14,6 +14,13 @@ static inline long syscall_get_nr(struct task_struct *task,</div><div class='ctx'> 	return regs-&gt;r12;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;r12 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_rollback(struct task_struct *task,</div><div class='ctx'> 				    struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h<br/>index a0ddd2a36fb9..0153f7c2717c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/thread_info.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #define THREAD_SIZE		(1 &lt;&lt; THREAD_SHIFT)</div><div class='ctx'> #define THREAD_SIZE_ORDER	1</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> # include &lt;linux/types.h&gt;</div><div class='ctx'> # include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -86,7 +86,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * thread information flags</div><div class='head'>diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h<br/>index cfe3f888b432..fedda9908aa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/unistd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/unistd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/unistd.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/unistd.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* #define __ARCH_WANT_OLD_READDIR */</div><div class='ctx'> /* #define __ARCH_WANT_OLD_STAT */</div><div class='hunk'>@@ -33,6 +33,6 @@</div><div class='ctx'> #define __ARCH_WANT_SYS_VFORK</div><div class='ctx'> #define __ARCH_WANT_SYS_FORK</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MICROBLAZE_UNISTD_H */</div><div class='head'>diff --git a/arch/microblaze/include/asm/xilinx_mb_manager.h b/arch/microblaze/include/asm/xilinx_mb_manager.h<br/>index 7b6995722b0c..121a3224882b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/xilinx_mb_manager.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/asm/xilinx_mb_manager.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/asm/xilinx_mb_manager.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/asm/xilinx_mb_manager.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef _XILINX_MB_MANAGER_H</div><div class='ctx'> #define _XILINX_MB_MANAGER_H</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -21,7 +21,7 @@ void xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val,</div><div class='ctx'> 			  void *priv, void (*reset_callback)(void *data));</div><div class='ctx'> asmlinkage void xmb_inject_err(void);</div><div class='ctx'> </div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='add'>+# endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Error injection offset */</div><div class='ctx'> #define XMB_INJECT_ERR_OFFSET	0x200</div><div class='head'>diff --git a/arch/microblaze/include/uapi/asm/ptrace.h b/arch/microblaze/include/uapi/asm/ptrace.h<br/>index 46dd94cb7802..8039957a1a9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #ifndef _UAPI_ASM_MICROBLAZE_PTRACE_H</div><div class='ctx'> #define _UAPI_ASM_MICROBLAZE_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long microblaze_reg_t;</div><div class='ctx'> </div><div class='hunk'>@@ -68,6 +68,6 @@ struct pt_regs {</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_MICROBLAZE_PTRACE_H */</div><div class='head'>diff --git a/arch/microblaze/include/uapi/asm/setup.h b/arch/microblaze/include/uapi/asm/setup.h<br/>index 6831794e6f2c..16c56807f86a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/uapi/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/include/uapi/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/include/uapi/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/include/uapi/asm/setup.h</a></div><div class='hunk'>@@ -14,7 +14,4 @@</div><div class='ctx'> </div><div class='ctx'> #define COMMAND_LINE_SIZE	256</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-# endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* _UAPI_ASM_MICROBLAZE_SETUP_H */</div><div class='head'>diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile<br/>index 85c4d29ef43e..241e466e7333 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/Makefile</a></div><div class='hunk'>@@ -11,7 +11,7 @@ CFLAGS_REMOVE_ftrace.o = -pg</div><div class='ctx'> CFLAGS_REMOVE_process.o = -pg</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-extra-y := vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN) := vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y += head.o dma.o exceptions.o \</div><div class='ctx'> 	hw_exception_handler.o irq.o \</div><div class='head'>diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c<br/>index 104c3ac5f30c..b4b67d58e7f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  * License. See the file "COPYING" in the main directory of this archive</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='head'>diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c<br/>index 9581d194d9e4..37cb2898216b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/cpu/mb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/cpu/mb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/cpu/mb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/cpu/mb.c</a></div><div class='hunk'>@@ -66,10 +66,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 		   " MSR:\t\t%s\n"</div><div class='ctx'> 		   " PCMP:\t\t%s\n"</div><div class='ctx'> 		   " DIV:\t\t%s\n",</div><div class='del'>-		   (cpuinfo.use_instr &amp; PVR0_USE_BARREL_MASK) ? "yes" : "no",</div><div class='del'>-		   (cpuinfo.use_instr &amp; PVR2_USE_MSR_INSTR) ? "yes" : "no",</div><div class='del'>-		   (cpuinfo.use_instr &amp; PVR2_USE_PCMP_INSTR) ? "yes" : "no",</div><div class='del'>-		   (cpuinfo.use_instr &amp; PVR0_USE_DIV_MASK) ? "yes" : "no");</div><div class='add'>+		   str_yes_no(cpuinfo.use_instr &amp; PVR0_USE_BARREL_MASK),</div><div class='add'>+		   str_yes_no(cpuinfo.use_instr &amp; PVR2_USE_MSR_INSTR),</div><div class='add'>+		   str_yes_no(cpuinfo.use_instr &amp; PVR2_USE_PCMP_INSTR),</div><div class='add'>+		   str_yes_no(cpuinfo.use_instr &amp; PVR0_USE_DIV_MASK));</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, " MMU:\t\t%x\n", cpuinfo.mmu);</div><div class='ctx'> </div><div class='hunk'>@@ -120,7 +120,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m,</div><div class='ctx'> 		   "HW-Debug:\t%s\n",</div><div class='del'>-		   cpuinfo.hw_debug ? "yes" : "no");</div><div class='add'>+		   str_yes_no(cpuinfo.hw_debug));</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m,</div><div class='ctx'> 		   "PVR-USR1:\t%02x\n"</div><div class='head'>diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c<br/>index c892e173ec99..a8553f54152b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/microblaze_ksyms.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/microblaze_ksyms.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/microblaze_ksyms.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/microblaze_ksyms.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/xilinx_mb_manager.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> extern void _mcount(void);</div><div class='hunk'>@@ -46,3 +47,12 @@ extern void __udivsi3(void);</div><div class='ctx'> EXPORT_SYMBOL(__udivsi3);</div><div class='ctx'> extern void __umodsi3(void);</div><div class='ctx'> EXPORT_SYMBOL(__umodsi3);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MB_MANAGER</div><div class='add'>+extern void xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val,</div><div class='add'>+				 void (*callback)(void *data),</div><div class='add'>+				 void *priv, void (*reset_callback)(void *data));</div><div class='add'>+EXPORT_SYMBOL(xmb_manager_register);</div><div class='add'>+extern asmlinkage void xmb_inject_err(void);</div><div class='add'>+EXPORT_SYMBOL(xmb_inject_err);</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c<br/>index 56342e11442d..6cbf642d7b80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/process.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ void flush_thread(void)</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *childregs = task_pt_regs(p);</div><div class='head'>diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c<br/>index e424c796e297..76ac4cfdfb42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/prom.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@ void __init early_init_devtree(void *params)</div><div class='ctx'> {</div><div class='ctx'> 	pr_debug(" -&gt; early_init_devtree(%p)\n", params);</div><div class='ctx'> </div><div class='del'>-	early_init_dt_scan(params);</div><div class='add'>+	early_init_dt_scan(params, __pa(params));</div><div class='ctx'> 	if (!strlen(boot_command_line))</div><div class='ctx'> 		strscpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/kernel/syscalls/syscall.tbl b/arch/microblaze/kernel/syscalls/syscall.tbl<br/>index 2b81a6bd78b2..580af574fe73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/syscalls/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/syscalls/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -468,3 +468,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c<br/>index 26c385582c3b..a2ab67b747a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/timer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/kernel/timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/kernel/timer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/kernel/timer.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static struct timecounter xilinx_tc = {</div><div class='ctx'> 	.cc = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u64 xilinx_cc_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 xilinx_cc_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	return xilinx_read(NULL);</div><div class='ctx'> }</div><div class='hunk'>@@ -252,7 +252,7 @@ static int __init xilinx_timer_init(struct device_node *timer)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* If this property is present, the device is a PWM and not a timer */</div><div class='del'>-	if (of_property_read_bool(timer, "#pwm-cells"))</div><div class='add'>+	if (of_property_present(timer, "#pwm-cells"))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (initialized)</div><div class='head'>diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c<br/>index 4520c5741579..31d475cdb1c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/mm/init.c</a></div><div class='hunk'>@@ -52,19 +52,6 @@ static void __init highmem_init(void)</div><div class='ctx'> 	map_page(PKMAP_BASE, 0, 0);	/* XXX gross */</div><div class='ctx'> 	pkmap_page_table = virt_to_kpte(PKMAP_BASE);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static void __meminit highmem_setup(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long pfn;</div><div class='del'>-</div><div class='del'>-	for (pfn = max_low_pfn; pfn &lt; max_pfn; ++pfn) {</div><div class='del'>-		struct page *page = pfn_to_page(pfn);</div><div class='del'>-</div><div class='del'>-		/* FIXME not sure about */</div><div class='del'>-		if (!memblock_is_reserved(pfn &lt;&lt; PAGE_SHIFT))</div><div class='del'>-			free_highmem_page(page);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> #endif /* CONFIG_HIGHMEM */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -104,17 +91,13 @@ void __init setup_memory(void)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * min_low_pfn - the first page (mm/bootmem.c - node_boot_start)</div><div class='ctx'> 	 * max_low_pfn</div><div class='del'>-	 * max_mapnr - the first unused page (mm/bootmem.c - node_low_pfn)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* memory start is from the kernel end (aligned) to higher addr */</div><div class='ctx'> 	min_low_pfn = memory_start &gt;&gt; PAGE_SHIFT; /* minimum for allocation */</div><div class='del'>-	/* RAM is assumed contiguous */</div><div class='del'>-	max_mapnr = memory_size &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	max_low_pfn = ((u64)memory_start + (u64)lowmem_size) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	max_pfn = ((u64)memory_start + (u64)memory_size) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	pr_info("%s: max_mapnr: %#lx\n", __func__, max_mapnr);</div><div class='ctx'> 	pr_info("%s: min_low_pfn: %#lx\n", __func__, min_low_pfn);</div><div class='ctx'> 	pr_info("%s: max_low_pfn: %#lx\n", __func__, max_low_pfn);</div><div class='ctx'> 	pr_info("%s: max_pfn: %#lx\n", __func__, max_pfn);</div><div class='hunk'>@@ -124,14 +107,6 @@ void __init setup_memory(void)</div><div class='ctx'> </div><div class='ctx'> void __init mem_init(void)</div><div class='ctx'> {</div><div class='del'>-	high_memory = (void *)__va(memory_start + lowmem_size - 1);</div><div class='del'>-</div><div class='del'>-	/* this will put all memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	highmem_setup();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	mem_init_done = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +118,7 @@ int page_is_ram(unsigned long pfn)</div><div class='ctx'> /*</div><div class='ctx'>  * Check for command-line options that affect what MMU_init will do.</div><div class='ctx'>  */</div><div class='del'>-static void mm_cmdline_setup(void)</div><div class='add'>+static void __init mm_cmdline_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long maxmem = 0;</div><div class='ctx'> 	char *p = cmd_line;</div><div class='head'>diff --git a/arch/microblaze/mm/pgtable.c b/arch/microblaze/mm/pgtable.c<br/>index 9f73265aad4e..e96dd1b7aba4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/microblaze/mm/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/microblaze/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/microblaze/mm/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/microblaze/mm/pgtable.c</a></div><div class='hunk'>@@ -245,7 +245,7 @@ unsigned long iopa(unsigned long addr)</div><div class='ctx'> __ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	if (mem_init_done)</div><div class='del'>-		return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+		return __pte_alloc_one_kernel(mm);</div><div class='ctx'> 	else</div><div class='ctx'> 		return memblock_alloc_try_nid(PAGE_SIZE, PAGE_SIZE,</div><div class='ctx'> 					      MEMBLOCK_LOW_LIMIT,</div><div class='head'>diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms<br/>index bca37ddf974b..41a00fa860c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/Kbuild.platforms?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Kbuild.platforms</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/Kbuild.platforms?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/Kbuild.platforms</a></div><div class='hunk'>@@ -11,6 +11,7 @@ platform-$(CONFIG_CAVIUM_OCTEON_SOC)	+= cavium-octeon/</div><div class='ctx'> platform-$(CONFIG_EYEQ)			+= mobileye/</div><div class='ctx'> platform-$(CONFIG_MIPS_COBALT)		+= cobalt/</div><div class='ctx'> platform-$(CONFIG_MACH_DECSTATION)	+= dec/</div><div class='add'>+platform-$(CONFIG_ECONET)		+= econet/</div><div class='ctx'> platform-$(CONFIG_MIPS_GENERIC)		+= generic/</div><div class='ctx'> platform-$(CONFIG_MACH_JAZZ)		+= jazz/</div><div class='ctx'> platform-$(CONFIG_LANTIQ)		+= lantiq/</div><div class='head'>diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig<br/>index 397edf05dd72..e8683f58fd3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@ config MIPS</div><div class='ctx'> 	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT</div><div class='ctx'> 	select ARCH_HAS_CPU_CACHE_ALIASING</div><div class='ctx'> 	select ARCH_HAS_CPU_FINALIZE_INIT</div><div class='del'>-	select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION &gt;= 140000</div><div class='add'>+	select ARCH_HAS_CURRENT_STACK_POINTER</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT</div><div class='ctx'> 	select ARCH_HAS_DMA_OPS if MACH_JAZZ</div><div class='ctx'> 	select ARCH_HAS_FORTIFY_SOURCE</div><div class='hunk'>@@ -29,14 +29,15 @@ config MIPS</div><div class='ctx'> 	select ARCH_WANT_IPC_PARSE_VERSION</div><div class='ctx'> 	select ARCH_WANT_LD_ORPHAN_WARN</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT</div><div class='add'>+	select BUILTIN_DTB_ALL if BUILTIN_DTB</div><div class='ctx'> 	select CLONE_BACKWARDS</div><div class='ctx'> 	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV &lt; 1)</div><div class='ctx'> 	select CPU_PM if CPU_IDLE || SUSPEND</div><div class='ctx'> 	select GENERIC_ATOMIC64 if !64BIT</div><div class='add'>+	select GENERIC_BUILTIN_DTB if BUILTIN_DTB</div><div class='ctx'> 	select GENERIC_CMOS_UPDATE</div><div class='ctx'> 	select GENERIC_CPU_AUTOPROBE</div><div class='ctx'> 	select GENERIC_GETTIMEOFDAY</div><div class='del'>-	select GENERIC_IOMAP</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_ISA_DMA if EISA</div><div class='hunk'>@@ -45,6 +46,7 @@ config MIPS</div><div class='ctx'> 	select GENERIC_LIB_CMPDI2</div><div class='ctx'> 	select GENERIC_LIB_LSHRDI3</div><div class='ctx'> 	select GENERIC_LIB_UCMPDI2</div><div class='add'>+	select GENERIC_PCI_IOMAP</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_IDLE_POLL_SETUP</div><div class='hunk'>@@ -70,7 +72,6 @@ config MIPS</div><div class='ctx'> 	select HAVE_EBPF_JIT if !CPU_MICROMIPS</div><div class='ctx'> 	select HAVE_EXIT_THREAD</div><div class='ctx'> 	select HAVE_GUP_FAST</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_GCC_PLUGINS</div><div class='hunk'>@@ -388,6 +389,31 @@ config MACH_DECSTATION</div><div class='ctx'> </div><div class='ctx'> 	  otherwise choose R3000.</div><div class='ctx'> </div><div class='add'>+config ECONET</div><div class='add'>+	bool "EcoNet MIPS family"</div><div class='add'>+	select BOOT_RAW</div><div class='add'>+	select CPU_BIG_ENDIAN</div><div class='add'>+	select DEBUG_ZBOOT if DEBUG_KERNEL</div><div class='add'>+	select EARLY_PRINTK_8250</div><div class='add'>+	select ECONET_EN751221_TIMER</div><div class='add'>+	select SERIAL_8250</div><div class='add'>+	select SERIAL_OF_PLATFORM</div><div class='add'>+	select SYS_SUPPORTS_BIG_ENDIAN</div><div class='add'>+	select SYS_HAS_CPU_MIPS32_R1</div><div class='add'>+	select SYS_HAS_CPU_MIPS32_R2</div><div class='add'>+	select SYS_HAS_EARLY_PRINTK</div><div class='add'>+	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='add'>+	select SYS_SUPPORTS_MIPS16</div><div class='add'>+	select SYS_SUPPORTS_ZBOOT_UART16550</div><div class='add'>+	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='add'>+	select USE_OF</div><div class='add'>+	help</div><div class='add'>+	  EcoNet EN75xx MIPS devices are big endian MIPS machines used</div><div class='add'>+	  in XPON (fiber) and DSL applications. They have SPI, PCI, USB,</div><div class='add'>+	  GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores.</div><div class='add'>+	  Don't confuse these with the Airoha ARM devices sometimes referred</div><div class='add'>+	  to as "EcoNet", this family is for MIPS based devices only.</div><div class='add'>+</div><div class='ctx'> config MACH_JAZZ</div><div class='ctx'> 	bool "Jazz family of machines"</div><div class='ctx'> 	select ARC_MEMORY</div><div class='hunk'>@@ -453,6 +479,23 @@ config LANTIQ</div><div class='ctx'> </div><div class='ctx'> config MACH_LOONGSON32</div><div class='ctx'> 	bool "Loongson 32-bit family of machines"</div><div class='add'>+	select MACH_GENERIC_CORE</div><div class='add'>+	select USE_OF</div><div class='add'>+	select BUILTIN_DTB</div><div class='add'>+	select BOOT_ELF32</div><div class='add'>+	select CEVT_R4K</div><div class='add'>+	select CSRC_R4K</div><div class='add'>+	select COMMON_CLK</div><div class='add'>+	select DMA_NONCOHERENT</div><div class='add'>+	select GENERIC_IRQ_SHOW_LEVEL</div><div class='add'>+	select IRQ_MIPS_CPU</div><div class='add'>+	select LS1X_IRQ</div><div class='add'>+	select SYS_HAS_CPU_LOONGSON32</div><div class='add'>+	select SYS_HAS_EARLY_PRINTK</div><div class='add'>+	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='add'>+	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='add'>+	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='add'>+	select SYS_SUPPORTS_HIGHMEM</div><div class='ctx'> 	select SYS_SUPPORTS_ZBOOT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the Loongson-1 family of machines.</div><div class='hunk'>@@ -535,6 +578,7 @@ config MIPS_MALTA</div><div class='ctx'> 	select MIPS_L1_CACHE_SHIFT_6</div><div class='ctx'> 	select MIPS_MSC</div><div class='ctx'> 	select PCI_GT64XXX_PCI0</div><div class='add'>+	select RTC_MC146818_LIB</div><div class='ctx'> 	select SMP_UP if SMP</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select SYS_HAS_CPU_MIPS32_R1</div><div class='hunk'>@@ -614,6 +658,7 @@ config EYEQ</div><div class='ctx'> 	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN</div><div class='ctx'> 	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN</div><div class='ctx'> 	select USE_OF</div><div class='add'>+	select HOTPLUG_PARALLEL if SMP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to build a kernel supporting EyeQ SoC from Mobileye.</div><div class='ctx'> </div><div class='hunk'>@@ -1017,6 +1062,7 @@ source "arch/mips/ath79/Kconfig"</div><div class='ctx'> source "arch/mips/bcm47xx/Kconfig"</div><div class='ctx'> source "arch/mips/bcm63xx/Kconfig"</div><div class='ctx'> source "arch/mips/bmips/Kconfig"</div><div class='add'>+source "arch/mips/econet/Kconfig"</div><div class='ctx'> source "arch/mips/generic/Kconfig"</div><div class='ctx'> source "arch/mips/ingenic/Kconfig"</div><div class='ctx'> source "arch/mips/jazz/Kconfig"</div><div class='hunk'>@@ -1084,7 +1130,6 @@ config CSRC_IOASIC</div><div class='ctx'> </div><div class='ctx'> config CSRC_R4K</div><div class='ctx'> 	select CLOCKSOURCE_WATCHDOG if CPU_FREQ</div><div class='del'>-	select HAVE_UNSTABLE_SCHED_CLOCK if SMP &amp;&amp; 64BIT</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> config CSRC_SB1250</div><div class='hunk'>@@ -1357,25 +1402,20 @@ config CPU_LOONGSON2F</div><div class='ctx'> 	  have a similar programming interface with FPGA northbridge used in</div><div class='ctx'> 	  Loongson2E.</div><div class='ctx'> </div><div class='del'>-config CPU_LOONGSON1B</div><div class='del'>-	bool "Loongson 1B"</div><div class='del'>-	depends on SYS_HAS_CPU_LOONGSON1B</div><div class='del'>-	select CPU_LOONGSON32</div><div class='del'>-	select LEDS_GPIO_REGISTER</div><div class='del'>-	help</div><div class='del'>-	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32</div><div class='del'>-	  Release 1 instruction set and part of the MIPS32 Release 2</div><div class='del'>-	  instruction set.</div><div class='del'>-</div><div class='del'>-config CPU_LOONGSON1C</div><div class='del'>-	bool "Loongson 1C"</div><div class='del'>-	depends on SYS_HAS_CPU_LOONGSON1C</div><div class='del'>-	select CPU_LOONGSON32</div><div class='add'>+config CPU_LOONGSON32</div><div class='add'>+	bool "Loongson 32-bit CPU"</div><div class='add'>+	depends on SYS_HAS_CPU_LOONGSON32</div><div class='add'>+	select CPU_MIPS32</div><div class='add'>+	select CPU_MIPSR2</div><div class='add'>+	select CPU_HAS_PREFETCH</div><div class='add'>+	select CPU_HAS_LOAD_STORE_LR</div><div class='add'>+	select CPU_SUPPORTS_32BIT_KERNEL</div><div class='add'>+	select CPU_SUPPORTS_HIGHMEM</div><div class='add'>+	select CPU_SUPPORTS_CPUFREQ</div><div class='ctx'> 	select LEDS_GPIO_REGISTER</div><div class='ctx'> 	help</div><div class='del'>-	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32</div><div class='del'>-	  Release 1 instruction set and part of the MIPS32 Release 2</div><div class='del'>-	  instruction set.</div><div class='add'>+	  The Loongson GS232 microarchitecture implements the MIPS32 Release 1</div><div class='add'>+	  instruction set and part of the MIPS32 Release 2 instruction set.</div><div class='ctx'> </div><div class='ctx'> config CPU_MIPS32_R1</div><div class='ctx'> 	bool "MIPS32 Release 1"</div><div class='hunk'>@@ -1808,15 +1848,7 @@ config CPU_LOONGSON2EF</div><div class='ctx'> 	select CPU_SUPPORTS_64BIT_KERNEL</div><div class='ctx'> 	select CPU_SUPPORTS_HIGHMEM</div><div class='ctx'> 	select CPU_SUPPORTS_HUGEPAGES</div><div class='del'>-</div><div class='del'>-config CPU_LOONGSON32</div><div class='del'>-	bool</div><div class='del'>-	select CPU_MIPS32</div><div class='del'>-	select CPU_MIPSR2</div><div class='del'>-	select CPU_HAS_PREFETCH</div><div class='del'>-	select CPU_SUPPORTS_32BIT_KERNEL</div><div class='del'>-	select CPU_SUPPORTS_HIGHMEM</div><div class='del'>-	select CPU_SUPPORTS_CPUFREQ</div><div class='add'>+	select RTC_MC146818_LIB</div><div class='ctx'> </div><div class='ctx'> config CPU_BMIPS32_3300</div><div class='ctx'> 	select SMP_UP if SMP</div><div class='hunk'>@@ -1855,10 +1887,7 @@ config SYS_HAS_CPU_LOONGSON2F</div><div class='ctx'> 	select CPU_SUPPORTS_CPUFREQ</div><div class='ctx'> 	select CPU_SUPPORTS_ADDRWINCFG if 64BIT</div><div class='ctx'> </div><div class='del'>-config SYS_HAS_CPU_LOONGSON1B</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config SYS_HAS_CPU_LOONGSON1C</div><div class='add'>+config SYS_HAS_CPU_LOONGSON32</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> config SYS_HAS_CPU_MIPS32_R1</div><div class='hunk'>@@ -1999,7 +2028,6 @@ config CPU_MIPSR6</div><div class='ctx'> 	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN</div><div class='ctx'> 	select HAVE_ARCH_BITREVERSE</div><div class='ctx'> 	select MIPS_ASID_BITS_VARIABLE</div><div class='del'>-	select MIPS_CRC_SUPPORT</div><div class='ctx'> 	select MIPS_SPRAM</div><div class='ctx'> </div><div class='ctx'> config TARGET_ISA_REV</div><div class='hunk'>@@ -2194,7 +2222,7 @@ config MIPS_MT_SMP</div><div class='ctx'> 	select SMP</div><div class='ctx'> 	select SMP_UP</div><div class='ctx'> 	select SYS_SUPPORTS_SMP</div><div class='del'>-	select SYS_SUPPORTS_SCHED_SMT</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT</div><div class='ctx'> 	select MIPS_PERF_SHARED_TC_COUNTERS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is a kernel model which is known as SMVP. This is supported</div><div class='hunk'>@@ -2206,18 +2234,6 @@ config MIPS_MT_SMP</div><div class='ctx'> config MIPS_MT</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config SCHED_SMT</div><div class='del'>-	bool "SMT (multithreading) scheduler support"</div><div class='del'>-	depends on SYS_SUPPORTS_SCHED_SMT</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  SMT scheduler support improves the CPU scheduler's decision making</div><div class='del'>-	  when dealing with MIPS MT enabled cores at a cost of slightly</div><div class='del'>-	  increased overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='del'>-config SYS_SUPPORTS_SCHED_SMT</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config SYS_SUPPORTS_MULTITHREADING</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -2285,10 +2301,11 @@ config MIPS_CPS</div><div class='ctx'> 	select MIPS_CM</div><div class='ctx'> 	select MIPS_CPS_PM if HOTPLUG_CPU</div><div class='ctx'> 	select SMP</div><div class='add'>+	select HOTPLUG_SMT if HOTPLUG_PARALLEL</div><div class='ctx'> 	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU</div><div class='ctx'> 	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)</div><div class='ctx'> 	select SYS_SUPPORTS_HOTPLUG_CPU</div><div class='del'>-	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6</div><div class='ctx'> 	select SYS_SUPPORTS_SMP</div><div class='ctx'> 	select WEAK_ORDERING</div><div class='ctx'> 	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU</div><div class='hunk'>@@ -2475,9 +2492,6 @@ config MIPS_ASID_BITS</div><div class='ctx'> config MIPS_ASID_BITS_VARIABLE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config MIPS_CRC_SUPPORT</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> # R4600 erratum.  Due to the lack of errata information the exact</div><div class='ctx'> # technical details aren't known.  I've experimentally found that disabling</div><div class='ctx'> # interrupts during indexed I-cache flushes seems to be sufficient to deal</div><div class='hunk'>@@ -2619,6 +2633,7 @@ config RELOCATABLE</div><div class='ctx'> 		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \</div><div class='ctx'> 		   CPU_P5600 || CAVIUM_OCTEON_SOC || \</div><div class='ctx'> 		   CPU_LOONGSON64</div><div class='add'>+	select ARCH_VMLINUX_NEEDS_RELOCS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This builds a kernel image that retains relocation information</div><div class='ctx'> 	  so it can be loaded someplace besides the default 1MB.</div><div class='hunk'>@@ -2876,6 +2891,9 @@ config ARCH_SUPPORTS_KEXEC</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config PHYSICAL_START</div><div class='ctx'> 	hex "Physical address where the kernel is loaded"</div><div class='ctx'> 	default "0xffffffff84000000"</div><div class='hunk'>@@ -2968,8 +2986,8 @@ choice</div><div class='ctx'> 	prompt "Kernel command line type"</div><div class='ctx'> 	depends on !CMDLINE_OVERRIDE</div><div class='ctx'> 	default MIPS_CMDLINE_FROM_DTB if USE_OF &amp;&amp; !ATH79 &amp;&amp; !MACH_INGENIC &amp;&amp; \</div><div class='del'>-					 !MACH_LOONGSON64 &amp;&amp; !MIPS_MALTA &amp;&amp; \</div><div class='del'>-					 !CAVIUM_OCTEON_SOC</div><div class='add'>+					 !MACH_LOONGSON64 &amp;&amp; !MACH_LOONGSON32 &amp;&amp; \</div><div class='add'>+					 !MIPS_MALTA &amp;&amp; !CAVIUM_OCTEON_SOC</div><div class='ctx'> 	default MIPS_CMDLINE_FROM_BOOTLOADER</div><div class='ctx'> </div><div class='ctx'> 	config MIPS_CMDLINE_FROM_DTB</div><div class='head'>diff --git a/arch/mips/Makefile b/arch/mips/Makefile<br/>index 5785a3d5ccfb..d9057e29bc62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/Makefile</a></div><div class='hunk'>@@ -100,10 +100,6 @@ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib</div><div class='ctx'> KBUILD_AFLAGS_MODULE		+= -mlong-calls</div><div class='ctx'> KBUILD_CFLAGS_MODULE		+= -mlong-calls</div><div class='ctx'> </div><div class='del'>-ifeq ($(CONFIG_RELOCATABLE),y)</div><div class='del'>-LDFLAGS_vmlinux			+= --emit-relocs</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> cflags-y += -ffreestanding</div><div class='ctx'> </div><div class='ctx'> cflags-$(CONFIG_CPU_BIG_ENDIAN)		+= -EB</div><div class='hunk'>@@ -423,9 +419,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> CLEAN_FILES += vmlinux.32 vmlinux.64</div><div class='ctx'> </div><div class='del'>-# device-trees</div><div class='del'>-core-y += arch/mips/boot/dts/</div><div class='del'>-</div><div class='ctx'> archprepare:</div><div class='ctx'> ifdef CONFIG_MIPS32_N32</div><div class='ctx'> 	@$(kecho) '  Checking missing-syscalls for N32'</div><div class='head'>diff --git a/arch/mips/Makefile.postlink b/arch/mips/Makefile.postlink<br/>index 6cfdc149d3bc..ea0add7d56b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/Makefile.postlink?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/Makefile.postlink</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/Makefile.postlink?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/Makefile.postlink</a></div><div class='hunk'>@@ -22,7 +22,7 @@ quiet_cmd_relocs = RELOCS  $@</div><div class='ctx'> </div><div class='ctx'> # `@true` prevents complaint when there is nothing to be done</div><div class='ctx'> </div><div class='del'>-vmlinux: FORCE</div><div class='add'>+vmlinux vmlinux.unstripped: FORCE</div><div class='ctx'> 	@true</div><div class='ctx'> ifeq ($(CONFIG_CPU_LOONGSON3_WORKAROUNDS),y)</div><div class='ctx'> 	$(call if_changed,ls3_llsc)</div><div class='head'>diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c<br/>index 6c8996e20a7d..551b0d21d9dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/alchemy/common/clock.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/alchemy/common/clock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/alchemy/common/clock.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/alchemy/common/clock.c</a></div><div class='hunk'>@@ -211,30 +211,34 @@ static int alchemy_clk_aux_setr(struct clk_hw *hw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long alchemy_clk_aux_roundr(struct clk_hw *hw,</div><div class='del'>-					    unsigned long rate,</div><div class='del'>-					    unsigned long *parent_rate)</div><div class='add'>+static int alchemy_clk_aux_determine_rate(struct clk_hw *hw,</div><div class='add'>+					  struct clk_rate_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct alchemy_auxpll_clk *a = to_auxpll_clk(hw);</div><div class='ctx'> 	unsigned long mult;</div><div class='ctx'> </div><div class='del'>-	if (!rate || !*parent_rate)</div><div class='add'>+	if (!req-&gt;rate || !req-&gt;best_parent_rate) {</div><div class='add'>+		req-&gt;rate = 0;</div><div class='add'>+</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	mult = rate / (*parent_rate);</div><div class='add'>+	mult = req-&gt;rate / req-&gt;best_parent_rate;</div><div class='ctx'> </div><div class='ctx'> 	if (mult &amp;&amp; (mult &lt; 7))</div><div class='ctx'> 		mult = 7;</div><div class='ctx'> 	if (mult &gt; a-&gt;maxmult)</div><div class='ctx'> 		mult = a-&gt;maxmult;</div><div class='ctx'> </div><div class='del'>-	return (*parent_rate) * mult;</div><div class='add'>+	req-&gt;rate = req-&gt;best_parent_rate * mult;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct clk_ops alchemy_clkops_aux = {</div><div class='ctx'> 	.recalc_rate	= alchemy_clk_aux_recalc,</div><div class='ctx'> 	.set_rate	= alchemy_clk_aux_setr,</div><div class='del'>-	.round_rate	= alchemy_clk_aux_roundr,</div><div class='add'>+	.determine_rate = alchemy_clk_aux_determine_rate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,</div><div class='head'>diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c<br/>index 1b16daaa86ae..e79e26ffac99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/alchemy/common/gpiolib.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/alchemy/common/gpiolib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/alchemy/common/gpiolib.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/alchemy/common/gpiolib.c</a></div><div class='hunk'>@@ -40,9 +40,11 @@ static int gpio2_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	return !!alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int gpio2_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -68,10 +70,12 @@ static int gpio1_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	return !!alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gpio1_set(struct gpio_chip *chip,</div><div class='add'>+static int gpio1_set(struct gpio_chip *chip,</div><div class='ctx'> 				unsigned offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -119,9 +123,11 @@ static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off)</div><div class='ctx'> 	return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)</div><div class='add'>+static int alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)</div><div class='ctx'> {</div><div class='ctx'> 	au1300_gpio_set_value(off + AU1300_GPIO_BASE, v);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off)</div><div class='head'>diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c<br/>index 8ccf167c167e..e8c38aaf46a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ath25/ar2315.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ath25/ar2315.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/ath25/ar2315.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/ath25/ar2315.c</a></div><div class='hunk'>@@ -149,8 +149,8 @@ void __init ar2315_arch_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	ath25_irq_dispatch = ar2315_irq_dispatch;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(NULL, AR2315_MISC_IRQ_COUNT,</div><div class='del'>-				       &amp;ar2315_misc_irq_domain_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(NULL, AR2315_MISC_IRQ_COUNT,</div><div class='add'>+					  &amp;ar2315_misc_irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add IRQ domain");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c<br/>index cfa103518113..4a1d874be766 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ath25/ar5312.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ath25/ar5312.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/ath25/ar5312.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/ath25/ar5312.c</a></div><div class='hunk'>@@ -143,8 +143,8 @@ void __init ar5312_arch_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	ath25_irq_dispatch = ar5312_irq_dispatch;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(NULL, AR5312_MISC_IRQ_COUNT,</div><div class='del'>-				       &amp;ar5312_misc_irq_domain_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(NULL, AR5312_MISC_IRQ_COUNT,</div><div class='add'>+					  &amp;ar5312_misc_irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add IRQ domain");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c<br/>index 247be207f293..a93a4266dc1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm47xx/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm47xx/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm47xx/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/bcm47xx/setup.c</a></div><div class='hunk'>@@ -256,7 +256,7 @@ static int __init bcm47xx_cpu_fixes(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(bcm47xx_cpu_fixes);</div><div class='ctx'> </div><div class='del'>-static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {</div><div class='add'>+static const struct fixed_phy_status bcm47xx_fixed_phy_status __initconst = {</div><div class='ctx'> 	.link	= 1,</div><div class='ctx'> 	.speed	= SPEED_100,</div><div class='ctx'> 	.duplex	= DUPLEX_FULL,</div><div class='hunk'>@@ -282,7 +282,7 @@ static int __init bcm47xx_register_bus_complete(void)</div><div class='ctx'> 	bcm47xx_leds_register();</div><div class='ctx'> 	bcm47xx_workarounds();</div><div class='ctx'> </div><div class='del'>-	fixed_phy_add(PHY_POLL, 0, &amp;bcm47xx_fixed_phy_status);</div><div class='add'>+	fixed_phy_add(&amp;bcm47xx_fixed_phy_status);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> device_initcall(bcm47xx_register_bus_complete);</div><div class='head'>diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c<br/>index 9cc8fbf218a5..c5617b889b1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm63xx/boards/board_bcm963xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm63xx/boards/board_bcm963xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm63xx/boards/board_bcm963xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/bcm63xx/boards/board_bcm963xx.c</a></div><div class='hunk'>@@ -764,7 +764,7 @@ void __init board_prom_init(void)</div><div class='ctx'> 			snprintf(cfe_version, 12, "%s", (char *) &amp;cfe[4]);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		strcpy(cfe_version, "unknown");</div><div class='add'>+		strscpy(cfe_version, "unknown");</div><div class='ctx'> 	}</div><div class='ctx'> 	pr_info("CFE version: %s\n", cfe_version);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c<br/>index 5c4a233db55f..ff45a6989c3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm63xx/gpio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/bcm63xx/gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/bcm63xx/gpio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/bcm63xx/gpio.c</a></div><div class='hunk'>@@ -35,8 +35,7 @@ static void bcm63xx_gpio_out_low_reg_init(void)</div><div class='ctx'> static DEFINE_SPINLOCK(bcm63xx_gpio_lock);</div><div class='ctx'> static u32 gpio_out_low, gpio_out_high;</div><div class='ctx'> </div><div class='del'>-static void bcm63xx_gpio_set(struct gpio_chip *chip,</div><div class='del'>-			     unsigned gpio, int val)</div><div class='add'>+static int bcm63xx_gpio_set(struct gpio_chip *chip, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	u32 mask;</div><div class='hunk'>@@ -62,6 +61,8 @@ static void bcm63xx_gpio_set(struct gpio_chip *chip,</div><div class='ctx'> 		*v &amp;= ~mask;</div><div class='ctx'> 	bcm_gpio_writel(*v, reg);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bcm63xx_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)</div><div class='head'>diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile<br/>index 196c44fa72d9..8473c4671702 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/Makefile</a></div><div class='hunk'>@@ -54,10 +54,10 @@ UIMAGE_ENTRYADDR = $(VMLINUX_ENTRY_ADDRESS)</div><div class='ctx'> # Compressed vmlinux images</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y += vmlinux.bin.bz2</div><div class='del'>-extra-y += vmlinux.bin.gz</div><div class='del'>-extra-y += vmlinux.bin.lzma</div><div class='del'>-extra-y += vmlinux.bin.lzo</div><div class='add'>+targets += vmlinux.bin.bz2</div><div class='add'>+targets += vmlinux.bin.gz</div><div class='add'>+targets += vmlinux.bin.lzma</div><div class='add'>+targets += vmlinux.bin.lzo</div><div class='ctx'> </div><div class='ctx'> $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE</div><div class='ctx'> 	$(call if_changed,bzip2)</div><div class='head'>diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c<br/>index db618e72a0c4..529e77a6487c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/compressed/uart-16550.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/compressed/uart-16550.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/compressed/uart-16550.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/compressed/uart-16550.c</a></div><div class='hunk'>@@ -20,6 +20,11 @@</div><div class='ctx'> #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ECONET</div><div class='add'>+#define EN75_UART_BASE	0x1fbf0003</div><div class='add'>+#define PORT(offset)	(CKSEG1ADDR(EN75_UART_BASE) + (4 * (offset)))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef IOTYPE</div><div class='ctx'> #define IOTYPE char</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile<br/>index e2476b12bb0c..6d9dbe945541 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,12 +1,14 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> subdir-$(CONFIG_BMIPS_GENERIC)		+= brcm</div><div class='ctx'> subdir-$(CONFIG_CAVIUM_OCTEON_SOC)	+= cavium-octeon</div><div class='add'>+subdir-$(CONFIG_ECONET)			+= econet</div><div class='ctx'> subdir-$(CONFIG_EYEQ)			+= mobileye</div><div class='ctx'> subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK)   += img</div><div class='ctx'> subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON)	+= img</div><div class='ctx'> subdir-$(CONFIG_MACH_INGENIC)		+= ingenic</div><div class='ctx'> subdir-$(CONFIG_LANTIQ)			+= lantiq</div><div class='ctx'> subdir-$(CONFIG_MACH_LOONGSON64)	+= loongson</div><div class='add'>+subdir-$(CONFIG_MACH_LOONGSON32)	+= loongson</div><div class='ctx'> subdir-$(CONFIG_SOC_VCOREIII)		+= mscc</div><div class='ctx'> subdir-$(CONFIG_MIPS_MALTA)		+= mti</div><div class='ctx'> subdir-$(CONFIG_LEGACY_BOARD_SEAD3)	+= mti</div><div class='hunk'>@@ -16,5 +18,3 @@ subdir-$(CONFIG_ATH79)			+= qca</div><div class='ctx'> subdir-$(CONFIG_RALINK)			+= ralink</div><div class='ctx'> subdir-$(CONFIG_MACH_REALTEK_RTL)	+= realtek</div><div class='ctx'> subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA)	+= xilfpga</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	:= $(addsuffix /, $(subdir-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile<br/>index d85f446cc0ce..1798209697c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/Makefile</a></div><div class='hunk'>@@ -33,5 +33,3 @@ dtb-$(CONFIG_DT_NONE) += \</div><div class='ctx'> 	bcm97420c.dtb \</div><div class='ctx'> 	bcm97425svmb.dtb \</div><div class='ctx'> 	bcm97435svmb.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi<br/>index 777c4379ed03..5e487f66c343 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm6358.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm6358.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm6358.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm6358.dtsi</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		mips-hpt-frequency = &lt;150000000&gt;;</div><div class='add'>+		brcm,bmips-cbr-reg = &lt;0xff400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "brcm,bmips4350";</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi<br/>index fc15e200877d..087f3295a14b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm6368.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm6368.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm6368.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm6368.dtsi</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		mips-hpt-frequency = &lt;200000000&gt;;</div><div class='add'>+		brcm,bmips-cbr-reg = &lt;0xff400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "brcm,bmips4350";</div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi<br/>index 2afa0dada575..9d6f97e02ff9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7346.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7346.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm7346.dtsi</a></div><div class='hunk'>@@ -531,7 +531,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi<br/>index a57cacea91cf..a7f60f059e50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7360.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7360.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm7360.dtsi</a></div><div class='hunk'>@@ -450,7 +450,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi<br/>index 728b9e9f84b8..2d483cbf254f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7362.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7362.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm7362.dtsi</a></div><div class='hunk'>@@ -446,7 +446,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi<br/>index 62588c53d356..c3bb020ff2b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7425.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7425.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7425.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm7425.dtsi</a></div><div class='hunk'>@@ -542,7 +542,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -569,7 +570,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi<br/>index cfdf9804e126..60cfa4074cce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7435.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/brcm/bcm7435.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/brcm/bcm7435.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/brcm/bcm7435.dtsi</a></div><div class='hunk'>@@ -558,7 +558,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -585,7 +586,8 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			memc-ddr@2000 {</div><div class='del'>-				compatible = "brcm,brcmstb-memc-ddr";</div><div class='add'>+				compatible = "brcm,brcmstb-memc-ddr-rev-a.0.0",</div><div class='add'>+					     "brcm,brcmstb-memc-ddr";</div><div class='ctx'> 				reg = &lt;0x2000 0x300&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile<br/>index 17aef35f311b..48085bca666c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/cavium-octeon/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/cavium-octeon/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/cavium-octeon/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/cavium-octeon/Makefile</a></div><div class='hunk'>@@ -1,4 +1,2 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_CAVIUM_OCTEON_SOC)	+= octeon_3xxx.dtb octeon_68xx.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/econet/Makefile b/arch/mips/boot/dts/econet/Makefile<br/>new file mode 100644<br/>index 000000000000..b467d5624e39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/econet/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/econet/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_DTB_ECONET_SMARTFIBER_XP8421_B)	+= en751221_smartfiber_xp8421-b.dtb</div><div class='head'>diff --git a/arch/mips/boot/dts/econet/en751221.dtsi b/arch/mips/boot/dts/econet/en751221.dtsi<br/>new file mode 100644<br/>index 000000000000..66197e73d4f0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/econet/en751221.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/econet/en751221.dtsi</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "econet,en751221";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	hpt_clock: clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;  /* 200 MHz */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus: cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			compatible = "mips,mips24KEc";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpuintc: interrupt-controller {</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intc: interrupt-controller@1fb40000 {</div><div class='add'>+		compatible = "econet,en751221-intc";</div><div class='add'>+		reg = &lt;0x1fb40000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		econet,shadow-interrupts = &lt;7 2&gt;, &lt;8 3&gt;, &lt;13 12&gt;, &lt;30 29&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart: serial@1fbf0000 {</div><div class='add'>+		compatible = "ns16550";</div><div class='add'>+		reg = &lt;0x1fbf0000 0x30&gt;;</div><div class='add'>+		reg-io-width = &lt;4&gt;;</div><div class='add'>+		reg-shift = &lt;2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;0&gt;;</div><div class='add'>+		/*</div><div class='add'>+		 * Conversion of baud rate to clock frequency requires a</div><div class='add'>+		 * computation that is not in the ns16550 driver, so this</div><div class='add'>+		 * uart is fixed at 115200 baud.</div><div class='add'>+		 */</div><div class='add'>+		clock-frequency = &lt;1843200&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	timer_hpt: timer@1fbf0400 {</div><div class='add'>+		compatible = "econet,en751221-timer";</div><div class='add'>+		reg = &lt;0x1fbf0400 0x100&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;30&gt;;</div><div class='add'>+		clocks = &lt;&amp;hpt_clock&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts b/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts<br/>new file mode 100644<br/>index 000000000000..8223c5bce67f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "en751221.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "SmartFiber XP8421-B";</div><div class='add'>+	compatible = "smartfiber,xp8421-b", "econet,en751221";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x1c000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "/serial@1fbf0000:115200";</div><div class='add'>+		linux,usable-memory-range = &lt;0x00020000 0x1bfe0000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/Makefile b/arch/mips/boot/dts/ingenic/Makefile<br/>index 54aa0c4e6091..6e674f1a3aa3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ingenic/Makefile</a></div><div class='hunk'>@@ -5,5 +5,3 @@ dtb-$(CONFIG_JZ4770_GCW0)	+= gcw0.dtb</div><div class='ctx'> dtb-$(CONFIG_JZ4780_CI20)	+= ci20.dtb</div><div class='ctx'> dtb-$(CONFIG_X1000_CU1000_NEO)	+= cu1000-neo.dtb</div><div class='ctx'> dtb-$(CONFIG_X1830_CU1830_NEO)	+= cu1830-neo.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts b/arch/mips/boot/dts/ingenic/gcw0.dts<br/>index 5d33f26fd28c..8455778928b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/gcw0.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/gcw0.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/gcw0.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ingenic/gcw0.dts</a></div><div class='hunk'>@@ -91,7 +91,7 @@</div><div class='ctx'> 			"MIC1N", "Built-in Mic";</div><div class='ctx'> 		simple-audio-card,pin-switches = "Speaker", "Headphones";</div><div class='ctx'> </div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpf 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpf 21 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;speaker_amp&gt;, &lt;&amp;headphones_amp&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;dai_codec&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/ingenic/rs90.dts b/arch/mips/boot/dts/ingenic/rs90.dts<br/>index e8df70dd42bf..6d2c8aea5f49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/rs90.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ingenic/rs90.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ingenic/rs90.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ingenic/rs90.dts</a></div><div class='hunk'>@@ -148,7 +148,7 @@</div><div class='ctx'> 			"Speaker", "OUTR";</div><div class='ctx'> 		simple-audio-card,pin-switches = "Speaker";</div><div class='ctx'> </div><div class='del'>-		simple-audio-card,hp-det-gpio = &lt;&amp;gpd 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		simple-audio-card,hp-det-gpios = &lt;&amp;gpd 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 		simple-audio-card,aux-devs = &lt;&amp;amp&gt;;</div><div class='ctx'> </div><div class='ctx'> 		simple-audio-card,bitclock-master = &lt;&amp;dai_codec&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/lantiq/Makefile b/arch/mips/boot/dts/lantiq/Makefile<br/>index ae6e3e21ebeb..d8531b4653c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/lantiq/Makefile</a></div><div class='hunk'>@@ -1,4 +1,2 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_DT_EASY50712)	+= danube_easy50712.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi<br/>index 7a7ba66aa534..650400bd5725 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/danube.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/danube.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/danube.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/lantiq/danube.dtsi</a></div><div class='hunk'>@@ -5,8 +5,12 @@</div><div class='ctx'> 	compatible = "lantiq,xway", "lantiq,danube";</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'> 		cpu@0 {</div><div class='ctx'> 			compatible = "mips,mips24Kc";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -100,6 +104,8 @@</div><div class='ctx'> 				  0x1000000 0 0x00000000 0xae00000 0 0x200000&gt;; /* io space */</div><div class='ctx'> 			reg = &lt;0x7000000 0x8000		/* config space */</div><div class='ctx'> 				0xe105400 0x400&gt;;	/* pci bridge */</div><div class='add'>+</div><div class='add'>+			device_type = "pci";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/lantiq/danube_easy50712.dts b/arch/mips/boot/dts/lantiq/danube_easy50712.dts<br/>index 1ce20b7d05cb..c9f7886f57b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/danube_easy50712.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/lantiq/danube_easy50712.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/lantiq/danube_easy50712.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/lantiq/danube_easy50712.dts</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> /include/ "danube.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	model = "Intel EASY50712";</div><div class='add'>+</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";</div><div class='ctx'> 	};</div><div class='hunk'>@@ -82,16 +84,19 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		etop@e180000 {</div><div class='add'>+		ethernet@e180000 {</div><div class='ctx'> 			compatible = "lantiq,etop-xway";</div><div class='ctx'> 			reg = &lt;0xe180000 0x40000&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;icu0&gt;;</div><div class='ctx'> 			interrupts = &lt;73 78&gt;;</div><div class='add'>+			interrupt-names = "tx", "rx";</div><div class='ctx'> 			phy-mode = "rmii";</div><div class='ctx'> 			mac-address = [ 00 11 22 33 44 55 ];</div><div class='add'>+			lantiq,rx-burst-length = &lt;4&gt;;</div><div class='add'>+			lantiq,tx-burst-length = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		stp0: stp@e100bb0 {</div><div class='add'>+		stp0: gpio@e100bb0 {</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 			compatible = "lantiq,gpio-stp-xway";</div><div class='ctx'> 			gpio-controller;</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile<br/>index 5c6433e441ee..8ee12504d353 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/Makefile</a></div><div class='hunk'>@@ -1,4 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+ifneq ($(CONFIG_BUILTIN_DTB_NAME),)</div><div class='add'>+dtb-y	:= $(addsuffix .dtb, $(CONFIG_BUILTIN_DTB_NAME))</div><div class='add'>+else</div><div class='ctx'> dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64_2core_2k1000.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64c_4core_ls7a.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64c_4core_rs780e.dtb</div><div class='hunk'>@@ -6,4 +10,8 @@ dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64c_8core_rs780e.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64g_4core_ls7a.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64v_4core_virtio.dtb</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='add'>+dtb-$(CONFIG_MACH_LOONGSON32)	+= cq-t300b.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_LOONGSON32)	+= ls1b-demo.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_LOONGSON32)	+= lsgz_1b_dev.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_LOONGSON32)	+= smartloong-1c.dtb</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/cq-t300b.dts b/arch/mips/boot/dts/loongson/cq-t300b.dts<br/>new file mode 100644<br/>index 000000000000..5244fab2496d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/cq-t300b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/cq-t300b.dts</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "loongson1c.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "loongson,cq-t300b", "loongson,ls1c";</div><div class='add'>+	model = "CQ-T300B Board";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		serial0 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led0 {</div><div class='add'>+			label = "led0";</div><div class='add'>+			gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "nand-disk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xtal {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@13 {</div><div class='add'>+			reg = &lt;0x13&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@1000000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x1000000 0x3f000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi<br/>new file mode 100644<br/>index 000000000000..5ba5a5d131ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/loongson1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/loongson1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/loongson,ls1x-clk.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	xtal: clock {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-output-names = "xtal";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			clocks = &lt;&amp;clkc LS1X_CLKID_CPU&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpu_intc: interrupt-controller {</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc: bus@1fd00000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x1fd00000 0x130000&gt;;</div><div class='add'>+</div><div class='add'>+		intc0: interrupt-controller@1040 {</div><div class='add'>+			compatible = "loongson,ls1x-intc";</div><div class='add'>+			reg = &lt;0x1040 0x18&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc1: interrupt-controller@1058 {</div><div class='add'>+			compatible = "loongson,ls1x-intc";</div><div class='add'>+			reg = &lt;0x1058 0x18&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;3&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc2: interrupt-controller@1070 {</div><div class='add'>+			compatible = "loongson,ls1x-intc";</div><div class='add'>+			reg = &lt;0x1070 0x18&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;4&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc3: interrupt-controller@1088 {</div><div class='add'>+			compatible = "loongson,ls1x-intc";</div><div class='add'>+			reg = &lt;0x1088 0x18&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+			interrupts = &lt;5&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@10c0 {</div><div class='add'>+			compatible = "loongson,ls1x-gpio";</div><div class='add'>+			reg = &lt;0x10c0 0x4&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@10c4 {</div><div class='add'>+			compatible = "loongson,ls1x-gpio";</div><div class='add'>+			reg = &lt;0x10c4 0x4&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb: bus@1fe40000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x1fe40000 0xc0000&gt;;</div><div class='add'>+</div><div class='add'>+		uart0: serial@0 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x0 0x8&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+			interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@4000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x4000 0x8&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@8000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x8000 0x8&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@c000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0xc000 0x8&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi<br/>new file mode 100644<br/>index 000000000000..776d272b0f43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/loongson1b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/loongson1b.dtsi</a></div><div class='hunk'>@@ -0,0 +1,198 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "loongson1.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpu_opp_table: opp-table {</div><div class='add'>+		compatible = "operating-points-v2";</div><div class='add'>+		opp-shared;</div><div class='add'>+</div><div class='add'>+		opp-44000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;44000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-47142000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;47142000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-50769000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;50769000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-55000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;55000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-60000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;60000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-66000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;66000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-73333000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;73333000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-82500000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;82500000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-94285000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;94285000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-110000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;110000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-132000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;132000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-165000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;165000000&gt;;</div><div class='add'>+		};</div><div class='add'>+		opp-220000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;220000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clkc: clock-controller@1fe78030 {</div><div class='add'>+		compatible = "loongson,ls1b-clk";</div><div class='add'>+		reg = &lt;0x1fe78030 0x8&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	syscon: syscon@420 {</div><div class='add'>+		compatible = "loongson,ls1b-syscon", "syscon";</div><div class='add'>+		reg = &lt;0x420 0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dma: dma-controller@1160 {</div><div class='add'>+		compatible = "loongson,ls1b-apbdma";</div><div class='add'>+		reg = &lt;0x1160 0x4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;15 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1", "ch2";</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ehci: usb@100000 {</div><div class='add'>+		compatible = "generic-ehci";</div><div class='add'>+		reg = &lt;0x100000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ohci: usb@108000 {</div><div class='add'>+		compatible = "generic-ohci";</div><div class='add'>+		reg = &lt;0x108000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac0: ethernet@110000 {</div><div class='add'>+		compatible = "loongson,ls1b-gmac", "snps,dwmac-3.50a";</div><div class='add'>+		reg = &lt;0x110000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_AHB&gt;;</div><div class='add'>+		clock-names = "stmmaceth";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "macirq";</div><div class='add'>+		loongson,ls1-syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+		snps,pbl = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac1: ethernet@120000 {</div><div class='add'>+		compatible = "loongson,ls1b-gmac", "snps,dwmac-3.50a";</div><div class='add'>+		reg = &lt;0x120000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_AHB&gt;;</div><div class='add'>+		clock-names = "stmmaceth";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "macirq";</div><div class='add'>+		loongson,ls1-syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+		snps,pbl = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apb {</div><div class='add'>+	clocksource: timer@1c030 {</div><div class='add'>+		compatible = "loongson,ls1b-pwmtimer";</div><div class='add'>+		reg = &lt;0x1c030 0x10&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+		interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog: watchdog@1c060 {</div><div class='add'>+		compatible = "loongson,ls1b-wdt";</div><div class='add'>+		reg = &lt;0x1c060 0xc&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: rtc@24000 {</div><div class='add'>+		compatible = "loongson,ls1b-rtc";</div><div class='add'>+		reg = &lt;0x24000 0x78&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+		interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ac97: audio-controller@34000 {</div><div class='add'>+		compatible = "loongson,ls1b-ac97";</div><div class='add'>+		reg = &lt;0x34000 0x60&gt;, &lt;0x32420 0x4&gt;, &lt;0x34c4c 0x4&gt;;</div><div class='add'>+		reg-names = "ac97", "audio-tx", "audio-rx";</div><div class='add'>+		dmas = &lt;&amp;dma 1&gt;, &lt;&amp;dma 2&gt;;</div><div class='add'>+		dma-names = "tx", "rx";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nand: nand-controller@38000 {</div><div class='add'>+		compatible = "loongson,ls1b-nand-controller";</div><div class='add'>+		reg = &lt;0x38000 0x24&gt;, &lt;0x38040 0x4&gt;;</div><div class='add'>+		reg-names = "nand", "nand-dma";</div><div class='add'>+		dmas = &lt;&amp;dma 0&gt;;</div><div class='add'>+		dma-names = "rxtx";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		nand@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			label = "ls1x-nand";</div><div class='add'>+			nand-use-soft-ecc-engine;</div><div class='add'>+			nand-ecc-algo = "hamming";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cpu0 {</div><div class='add'>+	operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	ngpios = &lt;31&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	ngpios = &lt;30&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi<br/>new file mode 100644<br/>index 000000000000..5e80c6a657af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/loongson1c.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/loongson1c.dtsi</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "loongson1.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	clkc: clock-controller@1fe78030 {</div><div class='add'>+		compatible = "loongson,ls1c-clk";</div><div class='add'>+		reg = &lt;0x1fe78030 0x8&gt;;</div><div class='add'>+		clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+		#clock-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;soc {</div><div class='add'>+	syscon: syscon@420 {</div><div class='add'>+		compatible = "loongson,ls1c-syscon", "syscon";</div><div class='add'>+		reg = &lt;0x420 0x8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intc4: interrupt-controller@10a0 {</div><div class='add'>+		compatible = "loongson,ls1x-intc";</div><div class='add'>+		reg = &lt;0x10a0 0x18&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+		interrupts = &lt;6&gt;;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio2: gpio@10c8 {</div><div class='add'>+		compatible = "loongson,ls1x-gpio";</div><div class='add'>+		reg = &lt;0x10c8 0x4&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		ngpios = &lt;32&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio3: gpio@10cc {</div><div class='add'>+		compatible = "loongson,ls1x-gpio";</div><div class='add'>+		reg = &lt;0x10cc 0x4&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		ngpios = &lt;32&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dma: dma-controller@1160 {</div><div class='add'>+		compatible = "loongson,ls1c-apbdma", "loongson,ls1b-apbdma";</div><div class='add'>+		reg = &lt;0x1160 0x4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc0&gt;;</div><div class='add'>+		interrupts = &lt;13 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;14 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+			     &lt;15 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+		interrupt-names = "ch0", "ch1", "ch2";</div><div class='add'>+		#dma-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emac: ethernet@110000 {</div><div class='add'>+		compatible = "loongson,ls1c-emac", "snps,dwmac-3.50a";</div><div class='add'>+		reg = &lt;0x110000 0x10000&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_AHB&gt;;</div><div class='add'>+		clock-names = "stmmaceth";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "macirq";</div><div class='add'>+		loongson,ls1-syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+		snps,pbl = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ehci: usb@120000 {</div><div class='add'>+		compatible = "generic-ehci";</div><div class='add'>+		reg = &lt;0x120000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ohci: usb@128000 {</div><div class='add'>+		compatible = "generic-ohci";</div><div class='add'>+		reg = &lt;0x128000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc1&gt;;</div><div class='add'>+		interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;apb {</div><div class='add'>+	watchdog: watchdog@1c060 {</div><div class='add'>+		compatible = "loongson,ls1c-wdt";</div><div class='add'>+		reg = &lt;0x1c060 0xc&gt;;</div><div class='add'>+		clocks = &lt;&amp;clkc LS1X_CLKID_APB&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtc: rtc@24000 {</div><div class='add'>+		compatible = "loongson,ls1c-rtc";</div><div class='add'>+		reg = &lt;0x24000 0x78&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nand: nand-controller@38000 {</div><div class='add'>+		compatible = "loongson,ls1c-nand-controller";</div><div class='add'>+		reg = &lt;0x38000 0x24&gt;, &lt;0x38040 0x4&gt;;</div><div class='add'>+		reg-names = "nand", "nand-dma";</div><div class='add'>+		dmas = &lt;&amp;dma 0&gt;;</div><div class='add'>+		dma-names = "rxtx";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+</div><div class='add'>+		nand@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			label = "ls1x-nand";</div><div class='add'>+			nand-use-soft-ecc-engine;</div><div class='add'>+			nand-ecc-algo = "hamming";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	ngpios = &lt;32&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	ngpios = &lt;32&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	interrupts = &lt;29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts b/arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts<br/>index c7ea4f1c0bb2..6c277ab83d4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> 		compatible = "loongson,pch-msi-1.0";</div><div class='ctx'> 		reg = &lt;0 0x2ff00000 0 0x8&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		msi-controller;</div><div class='ctx'> 		loongson,msi-base-vec = &lt;64&gt;;</div><div class='ctx'> 		loongson,msi-num-vecs = &lt;64&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/ls1b-demo.dts b/arch/mips/boot/dts/loongson/ls1b-demo.dts<br/>new file mode 100644<br/>index 000000000000..13f8b102e100<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/ls1b-demo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/ls1b-demo.dts</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "loongson1b.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "loongson,ls1b-demo", "loongson,ls1b";</div><div class='add'>+	model = "LS1B-DEMO Board";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:38400n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	codec: audio-codec {</div><div class='add'>+		compatible = "realtek,alc203";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "ls1b-alc203";</div><div class='add'>+		simple-audio-card,format = "ac97";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Speaker", "Line Out Jack",</div><div class='add'>+			"Headphone", "Headphone Jack",</div><div class='add'>+			"Microphone", "Microphone Jack";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Line Out Jack", "TX",</div><div class='add'>+			"Headphone Jack", "TX",</div><div class='add'>+			"RX", "Microphone Jack";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;ac97&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xtal {</div><div class='add'>+	clock-frequency = &lt;33000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@1000000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x1000000 0x7000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ac97 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi<br/>index cce9428afc41..ee71045883e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/ls7a-pch.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/loongson/ls7a-pch.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/ls7a-pch.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/ls7a-pch.dtsi</a></div><div class='hunk'>@@ -70,7 +70,6 @@</div><div class='ctx'> 			device_type = "pci";</div><div class='ctx'> 			#address-cells = &lt;3&gt;;</div><div class='ctx'> 			#size-cells = &lt;2&gt;;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			msi-parent = &lt;&amp;msi&gt;;</div><div class='ctx'> </div><div class='ctx'> 			reg = &lt;0 0x1a000000 0 0x02000000&gt;,</div><div class='hunk'>@@ -234,7 +233,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@9,0 {</div><div class='add'>+			pcie@9,0 {</div><div class='ctx'> 				compatible = "pci0014,7a19.1",</div><div class='ctx'> 						   "pci0014,7a19",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -244,12 +243,16 @@</div><div class='ctx'> 				interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@a,0 {</div><div class='add'>+			pcie@a,0 {</div><div class='ctx'> 				compatible = "pci0014,7a09.1",</div><div class='ctx'> 						   "pci0014,7a09",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -259,12 +262,16 @@</div><div class='ctx'> 				interrupts = &lt;33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@b,0 {</div><div class='add'>+			pcie@b,0 {</div><div class='ctx'> 				compatible = "pci0014,7a09.1",</div><div class='ctx'> 						   "pci0014,7a09",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -274,12 +281,16 @@</div><div class='ctx'> 				interrupts = &lt;34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@c,0 {</div><div class='add'>+			pcie@c,0 {</div><div class='ctx'> 				compatible = "pci0014,7a09.1",</div><div class='ctx'> 						   "pci0014,7a09",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -289,12 +300,16 @@</div><div class='ctx'> 				interrupts = &lt;35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 35 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@d,0 {</div><div class='add'>+			pcie@d,0 {</div><div class='ctx'> 				compatible = "pci0014,7a19.1",</div><div class='ctx'> 						   "pci0014,7a19",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -304,12 +319,16 @@</div><div class='ctx'> 				interrupts = &lt;36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@e,0 {</div><div class='add'>+			pcie@e,0 {</div><div class='ctx'> 				compatible = "pci0014,7a09.1",</div><div class='ctx'> 						   "pci0014,7a09",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -319,12 +338,16 @@</div><div class='ctx'> 				interrupts = &lt;37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@f,0 {</div><div class='add'>+			pcie@f,0 {</div><div class='ctx'> 				compatible = "pci0014,7a29.1",</div><div class='ctx'> 						   "pci0014,7a29",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -334,12 +357,16 @@</div><div class='ctx'> 				interrupts = &lt;40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@10,0 {</div><div class='add'>+			pcie@10,0 {</div><div class='ctx'> 				compatible = "pci0014,7a19.1",</div><div class='ctx'> 						   "pci0014,7a19",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -349,12 +376,16 @@</div><div class='ctx'> 				interrupts = &lt;41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@11,0 {</div><div class='add'>+			pcie@11,0 {</div><div class='ctx'> 				compatible = "pci0014,7a29.1",</div><div class='ctx'> 						   "pci0014,7a29",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -364,12 +395,16 @@</div><div class='ctx'> 				interrupts = &lt;42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@12,0 {</div><div class='add'>+			pcie@12,0 {</div><div class='ctx'> 				compatible = "pci0014,7a19.1",</div><div class='ctx'> 						   "pci0014,7a19",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -379,12 +414,16 @@</div><div class='ctx'> 				interrupts = &lt;43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@13,0 {</div><div class='add'>+			pcie@13,0 {</div><div class='ctx'> 				compatible = "pci0014,7a29.1",</div><div class='ctx'> 						   "pci0014,7a29",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -394,12 +433,16 @@</div><div class='ctx'> 				interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			pci_bridge@14,0 {</div><div class='add'>+			pcie@14,0 {</div><div class='ctx'> 				compatible = "pci0014,7a19.1",</div><div class='ctx'> 						   "pci0014,7a19",</div><div class='ctx'> 						   "pciclass060400",</div><div class='hunk'>@@ -409,9 +452,13 @@</div><div class='ctx'> 				interrupts = &lt;39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;pic&gt;;</div><div class='ctx'> </div><div class='add'>+				#address-cells = &lt;3&gt;;</div><div class='add'>+				#size-cells = &lt;2&gt;;</div><div class='add'>+				device_type = "pci";</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='ctx'> 				interrupt-map = &lt;0 0 0 0 &amp;pic 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				ranges;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts<br/>new file mode 100644<br/>index 000000000000..94ec151c0a94<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/lsgz_1b_dev.dts</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "loongson1b.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "loongson,lsgz-1b-dev", "loongson,ls1b";</div><div class='add'>+	model = "LSGZ_1B_DEV Board";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		serial0 = &amp;uart2;</div><div class='add'>+		serial1 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led9 {</div><div class='add'>+			label = "led9";</div><div class='add'>+			gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led6 {</div><div class='add'>+			label = "led6";</div><div class='add'>+			gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "nand-disk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	codec: audio-codec {</div><div class='add'>+		compatible = "realtek,alc203";</div><div class='add'>+		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "simple-audio-card";</div><div class='add'>+		simple-audio-card,name = "ls1b-alc655";</div><div class='add'>+		simple-audio-card,format = "ac97";</div><div class='add'>+		simple-audio-card,widgets =</div><div class='add'>+			"Speaker", "Line Out Jack",</div><div class='add'>+			"Line", "Line In Jack",</div><div class='add'>+			"Microphone", "Microphone Jack";</div><div class='add'>+		simple-audio-card,routing =</div><div class='add'>+			"Line Out Jack", "TX",</div><div class='add'>+			"RX", "Line In Jack",</div><div class='add'>+			"RX", "Microphone Jack";</div><div class='add'>+</div><div class='add'>+		simple-audio-card,cpu {</div><div class='add'>+			sound-dai = &lt;&amp;ac97&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		simple-audio-card,codec {</div><div class='add'>+			sound-dai = &lt;&amp;codec&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xtal {</div><div class='add'>+	clock-frequency = &lt;33000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "mii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy1: ethernet-phy@0 {</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@1000000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x1000000 0x7000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ac97 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/loongson/smartloong-1c.dts b/arch/mips/boot/dts/loongson/smartloong-1c.dts<br/>new file mode 100644<br/>index 000000000000..e6c6c2f00c42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/loongson/smartloong-1c.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/loongson/smartloong-1c.dts</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2023-2025 Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "loongson1c.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "loongmasses,smartloong-1c", "loongson,ls1c";</div><div class='add'>+	model = "Smartloong-1C Board";</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		serial0 = &amp;uart2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led0 {</div><div class='add'>+			label = "led0";</div><div class='add'>+			gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "led1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "nand-disk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;xtal {</div><div class='add'>+	clock-frequency = &lt;24000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emac {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rmii";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		compatible = "snps,dwmac-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		phy0: ethernet-phy@13 {</div><div class='add'>+			reg = &lt;0x13&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;nand {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	nand@0 {</div><div class='add'>+		partitions {</div><div class='add'>+			compatible = "fixed-partitions";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0x0 0x1000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@1000000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x1000000 0x7000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ehci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ohci {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;watchdog {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi b/arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi<br/>deleted file mode 100644<br/>index 17a342cc744e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,270 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-/*</div><div class='del'>- * Copyright 2023 Mobileye Vision Technologies Ltd.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/clock/mobileye,eyeq5-clk.h&gt;</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	/* Fixed clock */</div><div class='del'>-	xtal: xtal {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;30000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-/* PLL_CPU derivatives */</div><div class='del'>-	occ_cpu: occ-cpu {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_CPU&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	si_css0_ref_clk: si-css0-ref-clk { /* gate ClkRstGen_si_css0_ref */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_cpu&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	cpc_clk: cpc-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	core0_clk: core0-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	core1_clk: core1-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	core2_clk: core2-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	core3_clk: core3-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	cm_clk: cm-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	mem_clk: mem-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;si_css0_ref_clk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	occ_isram: occ-isram {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_CPU&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;2&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	isram_clk: isram-clk { /* gate ClkRstGen_isram */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_isram&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	occ_dbu: occ-dbu {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_CPU&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;10&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	si_dbu_tp_pclk: si-dbu-tp-pclk { /* gate ClkRstGen_dbu */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_dbu&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-/* PLL_VDI derivatives */</div><div class='del'>-	occ_vdi: occ-vdi {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_VDI&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;2&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	vdi_clk: vdi-clk { /* gate ClkRstGen_vdi */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_vdi&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	occ_can_ser: occ-can-ser {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_VDI&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;16&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	can_ser_clk: can-ser-clk { /* gate ClkRstGen_can_ser */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_can_ser&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	i2c_ser_clk: i2c-ser-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_VDI&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;20&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-/* PLL_PER derivatives */</div><div class='del'>-	occ_periph: occ-periph {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;16&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	periph_clk: periph-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	can_clk: can-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	spi_clk: spi-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	uart_clk: uart-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	i2c_clk: i2c-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "i2c_clk";</div><div class='del'>-	};</div><div class='del'>-	timer_clk: timer-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "timer_clk";</div><div class='del'>-	};</div><div class='del'>-	gpio_clk: gpio-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "gpio_clk";</div><div class='del'>-	};</div><div class='del'>-	emmc_sys_clk: emmc-sys-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;10&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "emmc_sys_clk";</div><div class='del'>-	};</div><div class='del'>-	ccf_ctrl_clk: ccf-ctrl-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;4&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "ccf_ctrl_clk";</div><div class='del'>-	};</div><div class='del'>-	occ_mjpeg_core: occ-mjpeg-core {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;2&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "occ_mjpeg_core";</div><div class='del'>-	};</div><div class='del'>-	hsm_clk: hsm-clk { /* gate ClkRstGen_hsm */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_mjpeg_core&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "hsm_clk";</div><div class='del'>-	};</div><div class='del'>-	mjpeg_core_clk: mjpeg-core-clk { /* gate ClkRstGen_mjpeg_gen */</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_mjpeg_core&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "mjpeg_core_clk";</div><div class='del'>-	};</div><div class='del'>-	fcmu_a_clk: fcmu-a-clk {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;20&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "fcmu_a_clk";</div><div class='del'>-	};</div><div class='del'>-	occ_pci_sys: occ-pci-sys {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;olb EQ5C_PLL_PER&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;8&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "occ_pci_sys";</div><div class='del'>-	};</div><div class='del'>-	pclk: pclk {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;250000000&gt;;  /* 250MHz */</div><div class='del'>-	};</div><div class='del'>-	tsu_clk: tsu-clk {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;125000000&gt;;  /* 125MHz */</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts<br/>index 6898b2d8267d..9fc1a1b0a81b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5-epm5.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mobileye/eyeq5-epm5.dts</a></div><div class='hunk'>@@ -21,3 +21,11 @@</div><div class='ctx'> 		      &lt;0x8 0x02000000 0x0 0x7E000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	temperature-sensor@48 {</div><div class='add'>+		compatible = "ti,tmp112";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		label = "U60";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi<br/>index 0708771c193d..36a73e8a63a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq5.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq5.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq5.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mobileye/eyeq5.dtsi</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "eyeq5-clocks.dtsi"</div><div class='add'>+#include &lt;dt-bindings/clock/mobileye,eyeq5-clk.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "img,i6500";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;core0_clk&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb EQ5C_CPU_CORE0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -49,6 +49,28 @@</div><div class='ctx'> 		mhm_reserved_0: the-mhm-reserved-0@0 {</div><div class='ctx'> 			reg = &lt;0x8 0x00000000 0x0 0x0000800&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		nvram@461fe00 {</div><div class='add'>+			compatible = "mobileye,eyeq5-bootloader-config", "nvmem-rmem";</div><div class='add'>+			reg = &lt;0x0 0x0461fe00 0x0 0x200&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+</div><div class='add'>+			nvmem-layout {</div><div class='add'>+				compatible = "fixed-layout";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				eth0_mac: mac@7c {</div><div class='add'>+					reg = &lt;0x7c 0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				eth1_mac: mac@82 {</div><div class='add'>+					reg = &lt;0x82 0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -64,19 +86,112 @@</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	xtal: xtal {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;30000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pclk: pclk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;250000000&gt;;  /* 250MHz */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tsu_clk: tsu-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;125000000&gt;;  /* 125MHz */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> </div><div class='add'>+		i2c0: i2c@300000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-i2c", "arm,primecell";</div><div class='add'>+			reg = &lt;0 0x300000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;; /* Fast mode */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb 35&gt;, &lt;&amp;olb EQ5C_PER_I2C&gt;;</div><div class='add'>+			clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;olb 0 13&gt;;</div><div class='add'>+			i2c-transfer-timeout-us = &lt;10000&gt;;</div><div class='add'>+			mobileye,olb = &lt;&amp;olb 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@400000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-i2c", "arm,primecell";</div><div class='add'>+			reg = &lt;0 0x400000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;; /* Fast mode */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb 35&gt;, &lt;&amp;olb EQ5C_PER_I2C&gt;;</div><div class='add'>+			clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;olb 0 14&gt;;</div><div class='add'>+			i2c-transfer-timeout-us = &lt;10000&gt;;</div><div class='add'>+			mobileye,olb = &lt;&amp;olb 1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@500000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-i2c", "arm,primecell";</div><div class='add'>+			reg = &lt;0 0x500000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;; /* Fast mode */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb 35&gt;, &lt;&amp;olb EQ5C_PER_I2C&gt;;</div><div class='add'>+			clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;olb 0 15&gt;;</div><div class='add'>+			i2c-transfer-timeout-us = &lt;10000&gt;;</div><div class='add'>+			mobileye,olb = &lt;&amp;olb 2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@600000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-i2c", "arm,primecell";</div><div class='add'>+			reg = &lt;0 0x600000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;; /* Fast mode */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb 35&gt;, &lt;&amp;olb EQ5C_PER_I2C&gt;;</div><div class='add'>+			clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;olb 0 16&gt;;</div><div class='add'>+			i2c-transfer-timeout-us = &lt;10000&gt;;</div><div class='add'>+			mobileye,olb = &lt;&amp;olb 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c4: i2c@700000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-i2c", "arm,primecell";</div><div class='add'>+			reg = &lt;0 0x700000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;400000&gt;; /* Fast mode */</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb 35&gt;, &lt;&amp;olb EQ5C_PER_I2C&gt;;</div><div class='add'>+			clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+			resets = &lt;&amp;olb 0 17&gt;;</div><div class='add'>+			i2c-transfer-timeout-us = &lt;10000&gt;;</div><div class='add'>+			mobileye,olb = &lt;&amp;olb 4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@800000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0x800000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks  = &lt;&amp;uart_clk&gt;, &lt;&amp;occ_periph&gt;;</div><div class='add'>+			clocks  = &lt;&amp;olb EQ5C_PER_UART&gt;, &lt;&amp;olb EQ5C_PER_OCC&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			resets = &lt;&amp;olb 0 10&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='hunk'>@@ -89,7 +204,7 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks  = &lt;&amp;uart_clk&gt;, &lt;&amp;occ_periph&gt;;</div><div class='add'>+			clocks  = &lt;&amp;olb EQ5C_PER_UART&gt;, &lt;&amp;olb EQ5C_PER_OCC&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			resets = &lt;&amp;olb 0 11&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='hunk'>@@ -102,7 +217,7 @@</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks  = &lt;&amp;uart_clk&gt;, &lt;&amp;occ_periph&gt;;</div><div class='add'>+			clocks  = &lt;&amp;olb EQ5C_PER_UART&gt;, &lt;&amp;olb EQ5C_PER_OCC&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 			resets = &lt;&amp;olb 0 12&gt;;</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='hunk'>@@ -135,9 +250,61 @@</div><div class='ctx'> 			timer {</div><div class='ctx'> 				compatible = "mti,gic-timer";</div><div class='ctx'> 				interrupts = &lt;GIC_LOCAL 1 IRQ_TYPE_NONE&gt;;</div><div class='del'>-				clocks = &lt;&amp;core0_clk&gt;;</div><div class='add'>+				clocks = &lt;&amp;olb EQ5C_CPU_CORE0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		emmc: mmc@2200000 {</div><div class='add'>+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";</div><div class='add'>+			reg = &lt;0 0x2200000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb EQ5C_PER_EMMC&gt;;</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			mmc-ddr-1_8v;</div><div class='add'>+			sd-uhs-ddr50;</div><div class='add'>+			mmc-hs200-1_8v;</div><div class='add'>+			mmc-hs400-1_8v;</div><div class='add'>+			mmc-hs400-enhanced-strobe;</div><div class='add'>+</div><div class='add'>+			cdns,phy-input-delay-legacy = &lt;4&gt;;</div><div class='add'>+			cdns,phy-input-delay-mmc-highspeed = &lt;2&gt;;</div><div class='add'>+			cdns,phy-input-delay-mmc-ddr = &lt;3&gt;;</div><div class='add'>+			cdns,phy-dll-delay-sdclk = &lt;32&gt;;</div><div class='add'>+			cdns,phy-dll-delay-sdclk-hsmmc = &lt;32&gt;;</div><div class='add'>+			cdns,phy-dll-delay-strobe = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@1400000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-gpio";</div><div class='add'>+			reg = &lt;0x0 0x1400000 0x0 0x1000&gt;;</div><div class='add'>+			gpio-bank = &lt;0&gt;;</div><div class='add'>+			ngpios = &lt;29&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;olb 0 0 29&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			resets = &lt;&amp;olb 0 26&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@1500000 {</div><div class='add'>+			compatible = "mobileye,eyeq5-gpio";</div><div class='add'>+			reg = &lt;0x0 0x1500000 0x0 0x1000&gt;;</div><div class='add'>+			gpio-bank = &lt;1&gt;;</div><div class='add'>+			ngpios = &lt;23&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 14 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;olb 0 29 23&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			resets = &lt;&amp;olb 0 26&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts b/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts<br/>index ebc0d363fbf8..59a3e95050eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include "eyeq6h.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	compatible = "mobileye,eyeq6-epm6", "mobileye,eyeq6";</div><div class='add'>+	compatible = "mobileye,eyeq6h-epm6", "mobileye,eyeq6h";</div><div class='ctx'> 	model = "Mobile EyeQ6H MP6 Evaluation board";</div><div class='ctx'> </div><div class='ctx'> 	chosen {</div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi<br/>deleted file mode 100644<br/>index 5fa99e06fde7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-/*</div><div class='del'>- * Copyright 2023 Mobileye Vision Technologies Ltd.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/clock/mobileye,eyeq5-clk.h&gt;</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	xtal: clock-30000000 {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;30000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pll_west: clock-2000000000-west {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;2000000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pll_cpu: clock-2000000000-cpu {</div><div class='del'>-		compatible = "fixed-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;2000000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* pll-cpu derivatives */</div><div class='del'>-	occ_cpu: clock-2000000000-occ-cpu {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;pll_cpu&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* pll-west derivatives */</div><div class='del'>-	occ_periph_w: clock-200000000 {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;pll_west&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;10&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-	uart_clk: clock-200000000-uart {</div><div class='del'>-		compatible = "fixed-factor-clock";</div><div class='del'>-		clocks = &lt;&amp;occ_periph_w&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-div = &lt;1&gt;;</div><div class='del'>-		clock-mult = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='head'>diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi<br/>index 1db3c3cda2e3..5ae939d25ea8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq6h.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mobileye/eyeq6h.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mobileye/eyeq6h.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mobileye/eyeq6h.dtsi</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "eyeq6h-fixed-clocks.dtsi"</div><div class='add'>+#include &lt;dt-bindings/clock/mobileye,eyeq5-clk.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "img,i6500";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;occ_cpu&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb_central EQ6HC_CENTRAL_CPU_OCC&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -32,19 +32,46 @@</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	coherency-manager {</div><div class='add'>+		compatible = "mobileye,eyeq6-cm";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	xtal: clock-30000000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;30000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc: soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		olb_acc: system-controller@d2003000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-acc-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xd2003000 0x0 0x1000&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		olb_central: system-controller@d3100000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-central-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xd3100000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@d3331000 {</div><div class='ctx'> 			compatible = "arm,pl011", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0 0xd3331000 0x0 0x1000&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 			interrupts = &lt;GIC_SHARED 43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			clocks = &lt;&amp;occ_periph_w&gt;, &lt;&amp;occ_periph_w&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb_west EQ6HC_WEST_PER_UART&gt;, &lt;&amp;olb_west EQ6HC_WEST_PER_OCC&gt;;</div><div class='ctx'> 			clock-names = "uartclk", "apb_pclk";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -56,6 +83,15 @@</div><div class='ctx'> 			pinctrl-single,function-mask = &lt;0xffff&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		olb_west: system-controller@d3338000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-west-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xd3338000 0x0 0x1000&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_east: pinctrl@d3357000 {</div><div class='ctx'> 			compatible = "pinctrl-single";</div><div class='ctx'> 			reg = &lt;0x0 0xd3357000 0x0 0xb0&gt;;</div><div class='hunk'>@@ -64,6 +100,45 @@</div><div class='ctx'> 			pinctrl-single,function-mask = &lt;0xffff&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		olb_east: system-controller@d3358000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-east-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xd3358000 0x0 0x1000&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emmc: mmc@d8010000 {</div><div class='add'>+			compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc";</div><div class='add'>+			reg = &lt;0 0xd8010000 0x0 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+			interrupts = &lt;GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;olb_south EQ6HC_SOUTH_DIV_EMMC&gt;;</div><div class='add'>+			bus-width = &lt;8&gt;;</div><div class='add'>+			max-frequency = &lt;200000000&gt;;</div><div class='add'>+			mmc-ddr-1_8v;</div><div class='add'>+			sd-uhs-ddr50;</div><div class='add'>+			mmc-hs200-1_8v;</div><div class='add'>+			mmc-hs400-1_8v;</div><div class='add'>+			mmc-hs400-enhanced-strobe;</div><div class='add'>+</div><div class='add'>+			cdns,phy-input-delay-legacy = &lt;4&gt;;</div><div class='add'>+			cdns,phy-input-delay-mmc-highspeed = &lt;2&gt;;</div><div class='add'>+			cdns,phy-input-delay-mmc-ddr = &lt;3&gt;;</div><div class='add'>+			cdns,phy-dll-delay-sdclk = &lt;32&gt;;</div><div class='add'>+			cdns,phy-dll-delay-sdclk-hsmmc = &lt;32&gt;;</div><div class='add'>+			cdns,phy-dll-delay-strobe = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		olb_south: system-controller@d8013000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-south-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xd8013000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pinctrl_south: pinctrl@d8014000 {</div><div class='ctx'> 			compatible = "pinctrl-single";</div><div class='ctx'> 			reg = &lt;0x0 0xd8014000 0x0 0xf8&gt;;</div><div class='hunk'>@@ -72,6 +147,22 @@</div><div class='ctx'> 			pinctrl-single,function-mask = &lt;0xffff&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		olb_ddr0: system-controller@e4080000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-ddr0-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xe4080000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		olb_ddr1: system-controller@e4081000 {</div><div class='add'>+			compatible = "mobileye,eyeq6h-ddr1-olb", "syscon";</div><div class='add'>+			reg = &lt;0x0 0xe4081000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gic: interrupt-controller@f0920000 {</div><div class='ctx'> 			compatible = "mti,gic";</div><div class='ctx'> 			reg = &lt;0x0 0xf0920000 0x0 0x20000&gt;;</div><div class='hunk'>@@ -89,7 +180,7 @@</div><div class='ctx'> 			timer {</div><div class='ctx'> 				compatible = "mti,gic-timer";</div><div class='ctx'> 				interrupts = &lt;GIC_LOCAL 1 IRQ_TYPE_NONE&gt;;</div><div class='del'>-				clocks = &lt;&amp;occ_cpu&gt;;</div><div class='add'>+				clocks = &lt;&amp;olb_central EQ6HC_CENTRAL_CPU_OCC&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/mips/boot/dts/mscc/Makefile b/arch/mips/boot/dts/mscc/Makefile<br/>index eeb6b7aae83b..566dbec3c7fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mscc/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mscc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mscc/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mscc/Makefile</a></div><div class='hunk'>@@ -8,6 +8,3 @@ dtb-$(CONFIG_SOC_VCOREIII)	+= \</div><div class='ctx'> 	ocelot_pcb123.dtb \</div><div class='ctx'> 	serval_pcb105.dtb \</div><div class='ctx'> 	serval_pcb106.dtb</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile<br/>index b5f7426998b1..c1c7b27296dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mti/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/mti/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/mti/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/mti/Makefile</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_MIPS_MALTA)	+= malta.dtb</div><div class='ctx'> dtb-$(CONFIG_LEGACY_BOARD_SEAD3)	+= sead3.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/pic32/Makefile b/arch/mips/boot/dts/pic32/Makefile<br/>index fb57f36324db..4069cda2370c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/pic32/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/pic32/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/pic32/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/pic32/Makefile</a></div><div class='hunk'>@@ -3,5 +3,3 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK)		+= pic32mzda_sk.dtb</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_DTB_PIC32_NONE)		+= \</div><div class='ctx'> 					pic32mzda_sk.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/pic32/pic32mzda.dtsi b/arch/mips/boot/dts/pic32/pic32mzda.dtsi<br/>index fdc721b414a8..feca35ba56a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/pic32/pic32mzda.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/pic32/pic32mzda.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/pic32/pic32mzda.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/pic32/pic32mzda.dtsi</a></div><div class='hunk'>@@ -225,7 +225,7 @@</div><div class='ctx'> 		gpio-ranges = &lt;&amp;pic32_pinctrl 0 144 16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci: sdhci@1f8ec000 {</div><div class='add'>+	sdhci: mmc@1f8ec000 {</div><div class='ctx'> 		compatible = "microchip,pic32mzda-sdhci";</div><div class='ctx'> 		reg = &lt;0x1f8ec000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi<br/>index 61dcfa5b6ca7..c1ca03a27b6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9132.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9132.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9132.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9132.dtsi</a></div><div class='hunk'>@@ -156,6 +156,15 @@</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		wifi: wifi@180c0000 {</div><div class='add'>+			compatible = "qca,ar9130-wifi";</div><div class='add'>+			reg = &lt;0x180c0000 0x230000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb_phy: usb-phy {</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts<br/>index f894fe17816b..a7901bb040ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts</a></div><div class='hunk'>@@ -108,3 +108,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi b/arch/mips/boot/dts/qca/ar9331.dtsi<br/>index 768ac0f869b1..6eb84a26a20f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331.dtsi</a></div><div class='hunk'>@@ -285,6 +285,15 @@</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		wifi: wifi@18100000 {</div><div class='add'>+			compatible = "qca,ar9330-wifi";</div><div class='add'>+			reg = &lt;0x18100000 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+			interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb_phy: usb-phy {</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331_dpt_module.dts b/arch/mips/boot/dts/qca/ar9331_dpt_module.dts<br/>index c857cd22f7db..08e728b8ced8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_dpt_module.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_dpt_module.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_dpt_module.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331_dpt_module.dts</a></div><div class='hunk'>@@ -97,3 +97,7 @@</div><div class='ctx'> &amp;phy_port4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts b/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts<br/>index 7affa58d4fa6..37a74aabe4b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts</a></div><div class='hunk'>@@ -98,3 +98,7 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331_omega.dts b/arch/mips/boot/dts/qca/ar9331_omega.dts<br/>index 8904aa917a6e..1450419024cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_omega.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_omega.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_omega.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331_omega.dts</a></div><div class='hunk'>@@ -74,3 +74,7 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts b/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts<br/>index dc65ebd60bbc..5786a827c000 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts</a></div><div class='hunk'>@@ -106,3 +106,7 @@</div><div class='ctx'> &amp;phy_port4 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts b/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts<br/>index 10b9759228b7..a7108c803eb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts</a></div><div class='hunk'>@@ -114,3 +114,7 @@</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;wifi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/Makefile b/arch/mips/boot/dts/ralink/Makefile<br/>index d27d7e8c700f..dc002152d843 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/Makefile</a></div><div class='hunk'>@@ -10,5 +10,3 @@ dtb-$(CONFIG_SOC_MT7621) += \</div><div class='ctx'> 	mt7621-gnubee-gb-pc1.dtb \</div><div class='ctx'> 	mt7621-gnubee-gb-pc2.dtb \</div><div class='ctx'> 	mt7621-tplink-hc220-g5-v1.dtb</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts b/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts<br/>index 18107ca0a06b..0bfb1dde9764 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "mt7628a.dtsi"</div><div class='add'>+#include "mt7628a.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> 		led-power-green {</div><div class='ctx'> 			label = "smartgw:power:green";</div><div class='ctx'> 			gpios = &lt;&amp;gpio 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			default-state = "off";</div><div class='add'>+			linux,default-trigger = "timer";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-power-red {</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/mt7620a.dtsi b/arch/mips/boot/dts/ralink/mt7620a.dtsi<br/>index 1f6e5320f486..460164bdd430 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7620a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7620a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7620a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/mt7620a.dtsi</a></div><div class='hunk'>@@ -1,4 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;dt-bindings/clock/mediatek,mtmips-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -25,9 +27,11 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		sysc@0 {</div><div class='del'>-			compatible = "ralink,mt7620a-sysc";</div><div class='add'>+		sysc: syscon@0 {</div><div class='add'>+			compatible = "ralink,mt7620-sysc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: intc@200 {</div><div class='hunk'>@@ -50,10 +54,22 @@</div><div class='ctx'> 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";</div><div class='ctx'> 			reg = &lt;0xc00 0x100&gt;;</div><div class='ctx'> </div><div class='add'>+			clocks = &lt;&amp;sysc MT7620_CLK_UARTLITE&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 			interrupts = &lt;12&gt;;</div><div class='ctx'> </div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	wmac: wifi@10180000 {</div><div class='add'>+		compatible = "ralink,rt2880-wifi";</div><div class='add'>+		reg = &lt;0x10180000 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+		clocks = &lt;&amp;sysc 16&gt;;</div><div class='add'>+</div><div class='add'>+		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+		interrupts = &lt;6&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/mt7620a_eval.dts b/arch/mips/boot/dts/ralink/mt7620a_eval.dts<br/>index 8de8f89f31b8..da483ee65b61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7620a_eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7620a_eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7620a_eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/mt7620a_eval.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "mt7620a.dtsi"</div><div class='add'>+#include "mt7620a.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi<br/>index 45a15e005cc4..5d7a6cfa9e2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7628a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/mt7628a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/mt7628a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/mt7628a.dtsi</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;dt-bindings/clock/mediatek,mtmips-sysc.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -16,11 +17,6 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	resetc: reset-controller {</div><div class='del'>-		compatible = "ralink,rt2880-reset";</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	cpuintc: interrupt-controller {</div><div class='ctx'> 		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;1&gt;;</div><div class='hunk'>@@ -36,9 +32,11 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		sysc: system-controller@0 {</div><div class='del'>-			compatible = "ralink,mt7620a-sysc", "syscon";</div><div class='add'>+		sysc: syscon@0 {</div><div class='add'>+			compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x60&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pinmux: pinmux@60 {</div><div class='hunk'>@@ -136,13 +134,8 @@</div><div class='ctx'> </div><div class='ctx'> 		watchdog: watchdog@100 {</div><div class='ctx'> 			compatible = "mediatek,mt7621-wdt";</div><div class='del'>-			reg = &lt;0x100 0x30&gt;;</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;resetc 8&gt;;</div><div class='del'>-			reset-names = "wdt";</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-			interrupts = &lt;24&gt;;</div><div class='add'>+			reg = &lt;0x100 0x100&gt;;</div><div class='add'>+			mediatek,sysctl = &lt;&amp;sysc&gt;;</div><div class='ctx'> </div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='hunk'>@@ -154,7 +147,7 @@</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 9&gt;;</div><div class='add'>+			resets = &lt;&amp;sysc 9&gt;;</div><div class='ctx'> 			reset-names = "intc";</div><div class='ctx'> </div><div class='ctx'> 			interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='hunk'>@@ -190,7 +183,9 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinmux_spi_spi&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 18&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysc MT76X8_CLK_SPI1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;sysc 18&gt;;</div><div class='ctx'> 			reset-names = "spi";</div><div class='ctx'> </div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -206,7 +201,9 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinmux_i2c_i2c&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 16&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysc MT76X8_CLK_I2C&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;sysc 16&gt;;</div><div class='ctx'> 			reset-names = "i2c";</div><div class='ctx'> </div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -222,7 +219,9 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinmux_uart0_uart&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 12&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysc MT76X8_CLK_UART0&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;sysc 12&gt;;</div><div class='ctx'> 			reset-names = "uart0";</div><div class='ctx'> </div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -238,7 +237,9 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinmux_uart1_uart&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 19&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysc MT76X8_CLK_UART1&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;sysc 19&gt;;</div><div class='ctx'> 			reset-names = "uart1";</div><div class='ctx'> </div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -254,7 +255,9 @@</div><div class='ctx'> 			pinctrl-names = "default";</div><div class='ctx'> 			pinctrl-0 = &lt;&amp;pinmux_uart2_uart&gt;;</div><div class='ctx'> </div><div class='del'>-			resets = &lt;&amp;resetc 20&gt;;</div><div class='add'>+			clocks = &lt;&amp;sysc MT76X8_CLK_UART2&gt;;</div><div class='add'>+</div><div class='add'>+			resets = &lt;&amp;sysc 20&gt;;</div><div class='ctx'> 			reset-names = "uart2";</div><div class='ctx'> </div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='hunk'>@@ -271,7 +274,7 @@</div><div class='ctx'> 		#phy-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 		ralink,sysctl = &lt;&amp;sysc&gt;;</div><div class='del'>-		resets = &lt;&amp;resetc 22 &amp;resetc 25&gt;;</div><div class='add'>+		resets = &lt;&amp;sysc 22 &amp;sysc 25&gt;;</div><div class='ctx'> 		reset-names = "host", "device";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -290,6 +293,8 @@</div><div class='ctx'> 		compatible = "mediatek,mt7628-wmac";</div><div class='ctx'> 		reg = &lt;0x10300000 0x100000&gt;;</div><div class='ctx'> </div><div class='add'>+		clocks = &lt;&amp;sysc MT76X8_CLK_WMAC&gt;;</div><div class='add'>+</div><div class='ctx'> 		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='ctx'> 		interrupts = &lt;6&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/omega2p.dts b/arch/mips/boot/dts/ralink/omega2p.dts<br/>index 5884fd48f59a..51a40ab6df2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/omega2p.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/omega2p.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/omega2p.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/omega2p.dts</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "mt7628a.dtsi"</div><div class='add'>+#include "mt7628a.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "onion,omega2+", "ralink,mt7688a-soc", "ralink,mt7628a-soc";</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/rt2880.dtsi b/arch/mips/boot/dts/ralink/rt2880.dtsi<br/>index 8fc1987d9063..1f2ea3434324 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt2880.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt2880.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt2880.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/rt2880.dtsi</a></div><div class='hunk'>@@ -1,4 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;dt-bindings/clock/mediatek,mtmips-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -25,9 +27,11 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		sysc@0 {</div><div class='del'>-			compatible = "ralink,rt2880-sysc";</div><div class='add'>+		sysc: syscon@0 {</div><div class='add'>+			compatible = "ralink,rt2880-sysc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: intc@200 {</div><div class='hunk'>@@ -50,6 +54,8 @@</div><div class='ctx'> 			compatible = "ralink,rt2880-uart", "ns16550a";</div><div class='ctx'> 			reg = &lt;0xc00 0x100&gt;;</div><div class='ctx'> </div><div class='add'>+			clocks = &lt;&amp;sysc RT2880_CLK_UARTLITE&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 			interrupts = &lt;8&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/rt2880_eval.dts b/arch/mips/boot/dts/ralink/rt2880_eval.dts<br/>index 759bc1dd5b83..9854a4b120e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt2880_eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt2880_eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt2880_eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/rt2880_eval.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "rt2880.dtsi"</div><div class='add'>+#include "rt2880.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";</div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/rt3050.dtsi b/arch/mips/boot/dts/ralink/rt3050.dtsi<br/>index 23062333a76d..a7d9bb9bc1af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3050.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3050.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3050.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/rt3050.dtsi</a></div><div class='hunk'>@@ -1,4 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;dt-bindings/clock/mediatek,mtmips-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -25,9 +27,11 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		sysc@0 {</div><div class='del'>-			compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";</div><div class='add'>+		sysc: syscon@0 {</div><div class='add'>+			compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: intc@200 {</div><div class='hunk'>@@ -50,6 +54,8 @@</div><div class='ctx'> 			compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";</div><div class='ctx'> 			reg = &lt;0xc00 0x100&gt;;</div><div class='ctx'> </div><div class='add'>+			clocks = &lt;&amp;sysc RT305X_CLK_UARTLITE&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 			interrupts = &lt;12&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/rt3883.dtsi b/arch/mips/boot/dts/ralink/rt3883.dtsi<br/>index 61132cf157e5..11d111a06037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3883.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3883.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3883.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/rt3883.dtsi</a></div><div class='hunk'>@@ -1,4 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;dt-bindings/clock/mediatek,mtmips-sysc.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -25,9 +27,11 @@</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		sysc@0 {</div><div class='del'>-			compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";</div><div class='add'>+		sysc: syscon@0 {</div><div class='add'>+			compatible = "ralink,rt3883-sysc", "syscon";</div><div class='ctx'> 			reg = &lt;0x0 0x100&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: intc@200 {</div><div class='hunk'>@@ -50,6 +54,8 @@</div><div class='ctx'> 			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";</div><div class='ctx'> 			reg = &lt;0xc00 0x100&gt;;</div><div class='ctx'> </div><div class='add'>+			clocks = &lt;&amp;sysc RT3883_CLK_UARTLITE&gt;;</div><div class='add'>+</div><div class='ctx'> 			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 			interrupts = &lt;12&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/boot/dts/ralink/rt3883_eval.dts b/arch/mips/boot/dts/ralink/rt3883_eval.dts<br/>index c22bc84df219..a095a1fe9415 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3883_eval.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/ralink/rt3883_eval.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/ralink/rt3883_eval.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/ralink/rt3883_eval.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-/include/ "rt3883.dtsi"</div><div class='add'>+#include "rt3883.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "ralink,rt3883-eval-board", "ralink,rt3883-soc";</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts<br/>index 77d2566545f2..6f6a05d4088e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "rtl930x.dtsi"</div><div class='add'>+#include "rtl9302c.dtsi"</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -71,3 +71,99 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	/* External RTL8224 */</div><div class='add'>+	phy0: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy1: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy2: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy3: ethernet-phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio1 {</div><div class='add'>+	/* External RTL8224 */</div><div class='add'>+	phy4: ethernet-phy@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy5: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy6: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+	phy7: ethernet-phy@3 {</div><div class='add'>+		reg = &lt;3&gt;;</div><div class='add'>+		compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;switch0 {</div><div class='add'>+	ethernet-ports {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		port@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy2&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy3&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@16 {</div><div class='add'>+			reg = &lt;16&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy4&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@17 {</div><div class='add'>+			reg = &lt;17&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy5&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@18 {</div><div class='add'>+			reg = &lt;18&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy6&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@19 {</div><div class='add'>+			reg = &lt;19&gt;;</div><div class='add'>+			phy-handle = &lt;&amp;phy7&gt;;</div><div class='add'>+			phy-mode = "usxgmii";</div><div class='add'>+		};</div><div class='add'>+		port@24{</div><div class='add'>+			reg = &lt;24&gt;;</div><div class='add'>+			phy-mode = "10gbase-r";</div><div class='add'>+		};</div><div class='add'>+		port@25{</div><div class='add'>+			reg = &lt;25&gt;;</div><div class='add'>+			phy-mode = "10gbase-r";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/cisco_sg220-26.dts b/arch/mips/boot/dts/realtek/cisco_sg220-26.dts<br/>index 1cdbb09297ef..fab3d552404d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/cisco_sg220-26.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/cisco_sg220-26.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/cisco_sg220-26.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/realtek/cisco_sg220-26.dts</a></div><div class='hunk'>@@ -2,9 +2,10 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "rtl83xx.dtsi"</div><div class='ctx'> #include "rtl838x.dtsi"</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Cisco SG220-26";</div><div class='ctx'> 	compatible = "cisco,sg220-26", "realtek,rtl8382-soc";</div><div class='hunk'>@@ -18,6 +19,13 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x8000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio-restart {</div><div class='add'>+		compatible = "gpio-restart";</div><div class='add'>+		gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		priority = &lt;192&gt;;</div><div class='add'>+		open-source;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi<br/>index 722106e39194..ce522a6af262 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl838x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl838x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl838x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/realtek/rtl838x.dtsi</a></div><div class='hunk'>@@ -1,6 +1,14 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -9,8 +17,7 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "mips,mips4KEc";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;baseclk 0&gt;;</div><div class='del'>-			clock-names = "cpu";</div><div class='add'>+			clocks = &lt;&amp;baseclk&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -19,4 +26,104 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;500000000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	cpuintc: cpuintc {</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lx_clk: clock-lexra {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;200000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc@18000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x18000000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+		spi0: spi@1200 {</div><div class='add'>+			compatible = "realtek,rtl8380-spi";</div><div class='add'>+			reg = &lt;0x1200 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@2000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x2000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;31&gt;;</div><div class='add'>+</div><div class='add'>+			reg-io-width = &lt;1&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			fifo-size = &lt;1&gt;;</div><div class='add'>+			no-loopback-test;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@2100 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x2100 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+			reg-io-width = &lt;1&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			fifo-size = &lt;1&gt;;</div><div class='add'>+			no-loopback-test;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		intc: interrupt-controller@3000 {</div><div class='add'>+			compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";</div><div class='add'>+			reg = &lt;0x3000 0x20&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;, &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog: watchdog@3150 {</div><div class='add'>+			compatible = "realtek,rtl8380-wdt";</div><div class='add'>+			reg = &lt;0x3150 0xc&gt;;</div><div class='add'>+</div><div class='add'>+			realtek,reset-mode = "soc";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+			timeout-sec = &lt;20&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupt-names = "phase1", "phase2";</div><div class='add'>+			interrupts = &lt;19&gt;, &lt;18&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@3500 {</div><div class='add'>+			compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";</div><div class='add'>+			reg = &lt;0x3500 0x1c&gt;;</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			ngpios = &lt;24&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;23&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/rtl83xx.dtsi b/arch/mips/boot/dts/realtek/rtl83xx.dtsi<br/>deleted file mode 100644<br/>index 03ddc61f7c9e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl83xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl83xx.dtsi</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uart0;</div><div class='del'>-		serial1 = &amp;uart1;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpuintc: cpuintc {</div><div class='del'>-		compatible = "mti,cpu-interrupt-controller";</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	soc: soc {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x18000000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-		uart0: serial@2000 {</div><div class='del'>-			compatible = "ns16550a";</div><div class='del'>-			reg = &lt;0x2000 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-			interrupts = &lt;31&gt;;</div><div class='del'>-</div><div class='del'>-			reg-io-width = &lt;1&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			fifo-size = &lt;1&gt;;</div><div class='del'>-			no-loopback-test;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart1: serial@2100 {</div><div class='del'>-			compatible = "ns16550a";</div><div class='del'>-			reg = &lt;0x2100 0x100&gt;;</div><div class='del'>-</div><div class='del'>-			clock-frequency = &lt;200000000&gt;;</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-			interrupts = &lt;30&gt;;</div><div class='del'>-</div><div class='del'>-			reg-io-width = &lt;1&gt;;</div><div class='del'>-			reg-shift = &lt;2&gt;;</div><div class='del'>-			fifo-size = &lt;1&gt;;</div><div class='del'>-			no-loopback-test;</div><div class='del'>-</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/rtl9302c.dtsi b/arch/mips/boot/dts/realtek/rtl9302c.dtsi<br/>new file mode 100644<br/>index 000000000000..8690433af498<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl9302c.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/realtek/rtl9302c.dtsi</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+#include "rtl930x.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;switch0 {</div><div class='add'>+	compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	compatible = "realtek,rtl9302c-i2c", "realtek,rtl9301-i2c";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	compatible = "realtek,rtl9302c-i2c", "realtek,rtl9301-i2c";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi<br/>index f271940f82be..24e262e2dc2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl930x.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/dts/realtek/rtl930x.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/dts/realtek/rtl930x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/dts/realtek/rtl930x.dtsi</a></div><div class='hunk'>@@ -1,10 +1,23 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause</div><div class='ctx'> </div><div class='del'>-#include "rtl83xx.dtsi"</div><div class='del'>-</div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "realtek,rtl9302-soc";</div><div class='ctx'> </div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpuintc: cpuintc {</div><div class='add'>+		compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+		#address-cells = &lt;0&gt;;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	cpus {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -13,8 +26,7 @@</div><div class='ctx'> 			device_type = "cpu";</div><div class='ctx'> 			compatible = "mips,mips34Kc";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='del'>-			clocks = &lt;&amp;baseclk 0&gt;;</div><div class='del'>-			clock-names = "cpu";</div><div class='add'>+			clocks = &lt;&amp;baseclk&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -29,51 +41,177 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency  = &lt;175000000&gt;;</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;soc {</div><div class='del'>-	intc: interrupt-controller@3000 {</div><div class='del'>-		compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";</div><div class='del'>-		reg = &lt;0x3000 0x18&gt;, &lt;0x3018 0x18&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	switch0: switch@1b000000 {</div><div class='add'>+		compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";</div><div class='add'>+		reg = &lt;0x1b000000 0x10000&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-		interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;, &lt;6&gt;, &lt;7&gt;;</div><div class='del'>-	};</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt;23&gt;, &lt;24&gt;;</div><div class='add'>+		interrupt-names = "switch", "nic";</div><div class='ctx'> </div><div class='del'>-	spi0: spi@1200 {</div><div class='del'>-		compatible = "realtek,rtl8380-spi";</div><div class='del'>-		reg = &lt;0x1200 0x100&gt;;</div><div class='add'>+		reboot@c {</div><div class='add'>+			compatible = "syscon-reboot";</div><div class='add'>+			reg = &lt;0x0c 0x4&gt;;</div><div class='add'>+			value = &lt;0x01&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='add'>+		i2c0: i2c@36c {</div><div class='add'>+			compatible = "realtek,rtl9301-i2c";</div><div class='add'>+			reg = &lt;0x36c 0x14&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	timer0: timer@3200 {</div><div class='del'>-		compatible = "realtek,rtl9302-timer", "realtek,otto-timer";</div><div class='del'>-		reg = &lt;0x3200 0x10&gt;, &lt;0x3210 0x10&gt;, &lt;0x3220 0x10&gt;,</div><div class='del'>-		    &lt;0x3230 0x10&gt;, &lt;0x3240 0x10&gt;;</div><div class='add'>+		i2c1: i2c@388 {</div><div class='add'>+			compatible = "realtek,rtl9301-i2c";</div><div class='add'>+			reg = &lt;0x388 0x14&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupts = &lt;7&gt;, &lt;8&gt;, &lt;9&gt;, &lt;10&gt;, &lt;11&gt;;</div><div class='del'>-		clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+		mdio_controller: mdio-controller@ca00 {</div><div class='add'>+			compatible = "realtek,rtl9301-mdio";</div><div class='add'>+			reg = &lt;0xca00 0x200&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio-bus@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			mdio1: mdio-bus@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			mdio2: mdio-bus@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+			mdio3: mdio-bus@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;uart0 {</div><div class='del'>-	/delete-property/ clock-frequency;</div><div class='del'>-	clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+	soc: soc@18000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x18000000 0x20000&gt;;</div><div class='ctx'> </div><div class='del'>-	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	interrupts = &lt;30&gt;;</div><div class='del'>-};</div><div class='add'>+		intc: interrupt-controller@3000 {</div><div class='add'>+			compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";</div><div class='add'>+			reg = &lt;0x3000 0x18&gt;, &lt;0x3018 0x18&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-&amp;uart1 {</div><div class='del'>-	/delete-property/ clock-frequency;</div><div class='del'>-	clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+			interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;, &lt;6&gt;, &lt;7&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	interrupts = &lt;31&gt;;</div><div class='del'>-};</div><div class='add'>+		spi0: spi@1200 {</div><div class='add'>+			compatible = "realtek,rtl8380-spi";</div><div class='add'>+			reg = &lt;0x1200 0x100&gt;;</div><div class='ctx'> </div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		timer0: timer@3200 {</div><div class='add'>+			compatible = "realtek,rtl9302-timer", "realtek,otto-timer";</div><div class='add'>+			reg = &lt;0x3200 0x10&gt;, &lt;0x3210 0x10&gt;, &lt;0x3220 0x10&gt;,</div><div class='add'>+			    &lt;0x3230 0x10&gt;, &lt;0x3240 0x10&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;7&gt;, &lt;8&gt;, &lt;9&gt;, &lt;10&gt;, &lt;11&gt;;</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog0: watchdog@3260 {</div><div class='add'>+			compatible = "realtek,rtl9300-wdt";</div><div class='add'>+			reg = &lt;0x3260 0xc&gt;;</div><div class='add'>+</div><div class='add'>+			realtek,reset-mode = "soc";</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+			timeout-sec = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupt-names = "phase1", "phase2";</div><div class='add'>+			interrupts = &lt;5&gt;, &lt;6&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@3300 {</div><div class='add'>+			compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";</div><div class='add'>+			reg = &lt;0x3300 0x1c&gt;, &lt;0x3338 0x8&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			ngpios = &lt;24&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;13&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		snand: spi@1a400 {</div><div class='add'>+			compatible = "realtek,rtl9301-snand";</div><div class='add'>+			reg = &lt;0x1a400 0x44&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;19&gt;;</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@2000 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x2000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+			reg-io-width = &lt;1&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			fifo-size = &lt;1&gt;;</div><div class='add'>+			no-loopback-test;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@2100 {</div><div class='add'>+			compatible = "ns16550a";</div><div class='add'>+			reg = &lt;0x2100 0x100&gt;;</div><div class='add'>+</div><div class='add'>+			clocks = &lt;&amp;lx_clk&gt;;</div><div class='add'>+</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;31&gt;;</div><div class='add'>+</div><div class='add'>+			reg-io-width = &lt;1&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			fifo-size = &lt;1&gt;;</div><div class='add'>+			no-loopback-test;</div><div class='add'>+</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/boot/tools/relocs.c b/arch/mips/boot/tools/relocs.c<br/>index a88d66c46d7f..9863e1d5c62e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/tools/relocs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/boot/tools/relocs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/boot/tools/relocs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/boot/tools/relocs.c</a></div><div class='hunk'>@@ -468,6 +468,8 @@ static void walk_relocs(int (*process)(struct section *sec, Elf_Rel *rel,</div><div class='ctx'> 			Elf_Sym *sym, const char *symname))</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	struct section *extab_sec = sec_lookup("__ex_table");</div><div class='add'>+	int extab_index = extab_sec ? extab_sec - secs : -1;</div><div class='ctx'> </div><div class='ctx'> 	/* Walk through the relocations */</div><div class='ctx'> 	for (i = 0; i &lt; ehdr.e_shnum; i++) {</div><div class='hunk'>@@ -480,6 +482,9 @@ static void walk_relocs(int (*process)(struct section *sec, Elf_Rel *rel,</div><div class='ctx'> 		if (sec-&gt;shdr.sh_type != SHT_REL_TYPE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		if (sec-&gt;shdr.sh_info == extab_index)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		sec_symtab  = sec-&gt;link;</div><div class='ctx'> 		sec_applies = &amp;secs[sec-&gt;shdr.sh_info];</div><div class='ctx'> 		if (!(sec_applies-&gt;shdr.sh_flags &amp; SHF_ALLOC))</div><div class='head'>diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile<br/>index 2a5926578841..ab84ede0cbe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/Makefile</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'> </div><div class='ctx'> obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o</div><div class='ctx'> obj-y += dma-octeon.o</div><div class='add'>+obj-y += octeon-crypto.o</div><div class='ctx'> obj-y += octeon-memcpy.o</div><div class='ctx'> obj-y += executive/</div><div class='del'>-obj-y += crypto/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MTD)		      += flash_setup.o</div><div class='ctx'> obj-$(CONFIG_SMP)		      += smp.o</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/Makefile b/arch/mips/cavium-octeon/crypto/Makefile<br/>deleted file mode 100644<br/>index db26c73fa0ed..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#</div><div class='del'>-# OCTEON-specific crypto modules.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-y += octeon-crypto.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_MD5_OCTEON)		+= octeon-md5.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_OCTEON)	+= octeon-sha1.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_OCTEON)	+= octeon-sha256.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_OCTEON)	+= octeon-sha512.o</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-md5.c b/arch/mips/cavium-octeon/crypto/octeon-md5.c<br/>deleted file mode 100644<br/>index 5ee4ade99b99..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-md5.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,208 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * MD5 Message Digest Algorithm (RFC1321).</div><div class='del'>- *</div><div class='del'>- * Adapted for OCTEON by Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;.</div><div class='del'>- *</div><div class='del'>- * Based on crypto/md5.c, which is:</div><div class='del'>- *</div><div class='del'>- * Derived from cryptoapi implementation, originally based on the</div><div class='del'>- * public domain implementation written by Colin Plumb in 1993.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Cryptoapi developers.</div><div class='del'>- * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the Free</div><div class='del'>- * Software Foundation; either version 2 of the License, or (at your option)</div><div class='del'>- * any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-#include "octeon-crypto.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void octeon_md5_store_hash(struct md5_state *ctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)ctx-&gt;hash;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[0], 0);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[1], 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_md5_read_hash(struct md5_state *ctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)ctx-&gt;hash;</div><div class='del'>-</div><div class='del'>-	hash[0] = read_octeon_64bit_hash_dword(0);</div><div class='del'>-	hash[1] = read_octeon_64bit_hash_dword(1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_md5_transform(const void *_block)</div><div class='del'>-{</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_dword(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_dword(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_dword(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_dword(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_dword(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_dword(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_dword(block[6], 6);</div><div class='del'>-	octeon_md5_start(block[7]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_md5_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	mctx-&gt;hash[0] = MD5_H0;</div><div class='del'>-	mctx-&gt;hash[1] = MD5_H1;</div><div class='del'>-	mctx-&gt;hash[2] = MD5_H2;</div><div class='del'>-	mctx-&gt;hash[3] = MD5_H3;</div><div class='del'>-	cpu_to_le32_array(mctx-&gt;hash, 4);</div><div class='del'>-	mctx-&gt;byte_count = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_md5_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const u32 avail = sizeof(mctx-&gt;block) - (mctx-&gt;byte_count &amp; 0x3f);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	mctx-&gt;byte_count += len;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail),</div><div class='del'>-		       data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail), data,</div><div class='del'>-	       avail);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_md5_store_hash(mctx);</div><div class='del'>-</div><div class='del'>-	octeon_md5_transform(mctx-&gt;block);</div><div class='del'>-	data += avail;</div><div class='del'>-	len -= avail;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(mctx-&gt;block)) {</div><div class='del'>-		octeon_md5_transform(data);</div><div class='del'>-		data += sizeof(mctx-&gt;block);</div><div class='del'>-		len -= sizeof(mctx-&gt;block);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	octeon_md5_read_hash(mctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	memcpy(mctx-&gt;block, data, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_md5_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = mctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)mctx-&gt;block + offset;</div><div class='del'>-	int padding = 56 - (offset + 1);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_md5_store_hash(mctx);</div><div class='del'>-</div><div class='del'>-	if (padding &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padding + sizeof(u64));</div><div class='del'>-		octeon_md5_transform(mctx-&gt;block);</div><div class='del'>-		p = (char *)mctx-&gt;block;</div><div class='del'>-		padding = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padding);</div><div class='del'>-	mctx-&gt;block[14] = mctx-&gt;byte_count &lt;&lt; 3;</div><div class='del'>-	mctx-&gt;block[15] = mctx-&gt;byte_count &gt;&gt; 29;</div><div class='del'>-	cpu_to_le32_array(mctx-&gt;block + 14, 2);</div><div class='del'>-	octeon_md5_transform(mctx-&gt;block);</div><div class='del'>-</div><div class='del'>-	octeon_md5_read_hash(mctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	memcpy(out, mctx-&gt;hash, sizeof(mctx-&gt;hash));</div><div class='del'>-	memset(mctx, 0, sizeof(*mctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_md5_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, ctx, sizeof(*ctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_md5_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(ctx, in, sizeof(*ctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='del'>-	.init		=	octeon_md5_init,</div><div class='del'>-	.update		=	octeon_md5_update,</div><div class='del'>-	.final		=	octeon_md5_final,</div><div class='del'>-	.export		=	octeon_md5_export,</div><div class='del'>-	.import		=	octeon_md5_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"md5",</div><div class='del'>-		.cra_driver_name=	"octeon-md5",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	MD5_HMAC_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init md5_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!octeon_has_crypto())</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit md5_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(md5_mod_init);</div><div class='del'>-module_exit(md5_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("MD5 Message Digest Algorithm (OCTEON)");</div><div class='del'>-MODULE_AUTHOR("Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;");</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha1.c b/arch/mips/cavium-octeon/crypto/octeon-sha1.c<br/>deleted file mode 100644<br/>index 37a07b3c4568..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha1.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha1.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * SHA1 Secure Hash Algorithm.</div><div class='del'>- *</div><div class='del'>- * Adapted for OCTEON by Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;.</div><div class='del'>- *</div><div class='del'>- * Based on crypto/sha1_generic.c, which is:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Alan Smithee.</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-#include "octeon-crypto.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void octeon_sha1_store_hash(struct sha1_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-	union {</div><div class='del'>-		u32 word[2];</div><div class='del'>-		u64 dword;</div><div class='del'>-	} hash_tail = { { sctx-&gt;state[4], } };</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[0], 0);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[1], 1);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash_tail.dword, 2);</div><div class='del'>-	memzero_explicit(&amp;hash_tail.word[0], sizeof(hash_tail.word[0]));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha1_read_hash(struct sha1_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-	union {</div><div class='del'>-		u32 word[2];</div><div class='del'>-		u64 dword;</div><div class='del'>-	} hash_tail;</div><div class='del'>-</div><div class='del'>-	hash[0]		= read_octeon_64bit_hash_dword(0);</div><div class='del'>-	hash[1]		= read_octeon_64bit_hash_dword(1);</div><div class='del'>-	hash_tail.dword	= read_octeon_64bit_hash_dword(2);</div><div class='del'>-	sctx-&gt;state[4]	= hash_tail.word[0];</div><div class='del'>-	memzero_explicit(&amp;hash_tail.dword, sizeof(hash_tail.dword));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha1_transform(const void *_block)</div><div class='del'>-{</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_dword(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_dword(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_dword(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_dword(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_dword(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_dword(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_dword(block[6], 6);</div><div class='del'>-	octeon_sha1_start(block[7]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha1_update(struct sha1_state *sctx, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int partial;</div><div class='del'>-	unsigned int done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count % SHA1_BLOCK_SIZE;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA1_BLOCK_SIZE) {</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buffer + partial, data,</div><div class='del'>-			       done + SHA1_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buffer;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			octeon_sha1_transform(src);</div><div class='del'>-			done += SHA1_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + SHA1_BLOCK_SIZE &lt;= len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buffer + partial, src, len - done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha1 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha1_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha1_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha1_update(sctx, data, len);</div><div class='del'>-</div><div class='del'>-	octeon_sha1_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	unsigned int pad_len;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64. */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	pad_len = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha1_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha1_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha1_update(sctx, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	octeon_sha1_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg octeon_sha1_alg = {</div><div class='del'>-	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha1_base_init,</div><div class='del'>-	.update		=	octeon_sha1_update,</div><div class='del'>-	.final		=	octeon_sha1_final,</div><div class='del'>-	.export		=	octeon_sha1_export,</div><div class='del'>-	.import		=	octeon_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha1",</div><div class='del'>-		.cra_driver_name=	"octeon-sha1",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init octeon_sha1_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!octeon_has_crypto())</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	return crypto_register_shash(&amp;octeon_sha1_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit octeon_sha1_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;octeon_sha1_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(octeon_sha1_mod_init);</div><div class='del'>-module_exit(octeon_sha1_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm (OCTEON)");</div><div class='del'>-MODULE_AUTHOR("Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;");</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha256.c b/arch/mips/cavium-octeon/crypto/octeon-sha256.c<br/>deleted file mode 100644<br/>index 435e4a6e7f13..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha256.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha256.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,241 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * SHA-224 and SHA-256 Secure Hash Algorithm.</div><div class='del'>- *</div><div class='del'>- * Adapted for OCTEON by Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;.</div><div class='del'>- *</div><div class='del'>- * Based on crypto/sha256_generic.c, which is:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='del'>- * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-#include "octeon-crypto.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void octeon_sha256_store_hash(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[0], 0);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[1], 1);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[2], 2);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[3], 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha256_read_hash(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-</div><div class='del'>-	hash[0] = read_octeon_64bit_hash_dword(0);</div><div class='del'>-	hash[1] = read_octeon_64bit_hash_dword(1);</div><div class='del'>-	hash[2] = read_octeon_64bit_hash_dword(2);</div><div class='del'>-	hash[3] = read_octeon_64bit_hash_dword(3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha256_transform(const void *_block)</div><div class='del'>-{</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_dword(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_dword(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_dword(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_dword(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_dword(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_dword(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_dword(block[6], 6);</div><div class='del'>-	octeon_sha256_start(block[7]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha256_update(struct sha256_state *sctx, const u8 *data,</div><div class='del'>-				   unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int partial;</div><div class='del'>-	unsigned int done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buf + partial, data,</div><div class='del'>-			       done + SHA256_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buf;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			octeon_sha256_transform(src);</div><div class='del'>-			done += SHA256_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + SHA256_BLOCK_SIZE &lt;= len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buf + partial, src, len - done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha256 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha256_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha256_update(sctx, data, len);</div><div class='del'>-</div><div class='del'>-	octeon_sha256_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	unsigned int pad_len;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64. */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	pad_len = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha256_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha256_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha256_update(sctx, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	octeon_sha256_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha224_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[SHA256_DIGEST_SIZE];</div><div class='del'>-</div><div class='del'>-	octeon_sha256_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, SHA224_DIGEST_SIZE);</div><div class='del'>-	memzero_explicit(D, SHA256_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg octeon_sha256_algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	octeon_sha256_update,</div><div class='del'>-	.final		=	octeon_sha256_final,</div><div class='del'>-	.export		=	octeon_sha256_export,</div><div class='del'>-	.import		=	octeon_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"octeon-sha256",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	octeon_sha256_update,</div><div class='del'>-	.final		=	octeon_sha224_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"octeon-sha224",</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init octeon_sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!octeon_has_crypto())</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	return crypto_register_shashes(octeon_sha256_algs,</div><div class='del'>-				       ARRAY_SIZE(octeon_sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit octeon_sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(octeon_sha256_algs,</div><div class='del'>-				  ARRAY_SIZE(octeon_sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(octeon_sha256_mod_init);</div><div class='del'>-module_exit(octeon_sha256_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm (OCTEON)");</div><div class='del'>-MODULE_AUTHOR("Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;");</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha512.c b/arch/mips/cavium-octeon/crypto/octeon-sha512.c<br/>deleted file mode 100644<br/>index 2dee9354e33f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha512.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-sha512.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,238 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * SHA-512 and SHA-384 Secure Hash Algorithm.</div><div class='del'>- *</div><div class='del'>- * Adapted for OCTEON by Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;.</div><div class='del'>- *</div><div class='del'>- * Based on crypto/sha512_generic.c, which is:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) 2003 Kyle McMartin &lt;kyle@debian.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-#include "octeon-crypto.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void octeon_sha512_store_hash(struct sha512_state *sctx)</div><div class='del'>-{</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[0], 0);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[1], 1);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[2], 2);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[3], 3);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[4], 4);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[5], 5);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[6], 6);</div><div class='del'>-	write_octeon_64bit_hash_sha512(sctx-&gt;state[7], 7);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha512_read_hash(struct sha512_state *sctx)</div><div class='del'>-{</div><div class='del'>-	sctx-&gt;state[0] = read_octeon_64bit_hash_sha512(0);</div><div class='del'>-	sctx-&gt;state[1] = read_octeon_64bit_hash_sha512(1);</div><div class='del'>-	sctx-&gt;state[2] = read_octeon_64bit_hash_sha512(2);</div><div class='del'>-	sctx-&gt;state[3] = read_octeon_64bit_hash_sha512(3);</div><div class='del'>-	sctx-&gt;state[4] = read_octeon_64bit_hash_sha512(4);</div><div class='del'>-	sctx-&gt;state[5] = read_octeon_64bit_hash_sha512(5);</div><div class='del'>-	sctx-&gt;state[6] = read_octeon_64bit_hash_sha512(6);</div><div class='del'>-	sctx-&gt;state[7] = read_octeon_64bit_hash_sha512(7);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha512_transform(const void *_block)</div><div class='del'>-{</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_sha512(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[6], 6);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[7], 7);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[8], 8);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[9], 9);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[10], 10);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[11], 11);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[12], 12);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[13], 13);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[14], 14);</div><div class='del'>-	octeon_sha512_start(block[15]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha512_update(struct sha512_state *sctx, const u8 *data,</div><div class='del'>-				   unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int part_len;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* Compute number of bytes mod 128. */</div><div class='del'>-	index = sctx-&gt;count[0] % SHA512_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Update number of bytes. */</div><div class='del'>-	if ((sctx-&gt;count[0] += len) &lt; len)</div><div class='del'>-		sctx-&gt;count[1]++;</div><div class='del'>-</div><div class='del'>-	part_len = SHA512_BLOCK_SIZE - index;</div><div class='del'>-</div><div class='del'>-	/* Transform as many times as possible. */</div><div class='del'>-	if (len &gt;= part_len) {</div><div class='del'>-		memcpy(&amp;sctx-&gt;buf[index], data, part_len);</div><div class='del'>-		octeon_sha512_transform(sctx-&gt;buf);</div><div class='del'>-</div><div class='del'>-		for (i = part_len; i + SHA512_BLOCK_SIZE &lt;= len;</div><div class='del'>-			i += SHA512_BLOCK_SIZE)</div><div class='del'>-			octeon_sha512_transform(&amp;data[i]);</div><div class='del'>-</div><div class='del'>-		index = 0;</div><div class='del'>-	} else {</div><div class='del'>-		i = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Buffer remaining input. */</div><div class='del'>-	memcpy(&amp;sctx-&gt;buf[index], &amp;data[i], len - i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha512 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha512_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha512_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha512_update(sctx, data, len);</div><div class='del'>-</div><div class='del'>-	octeon_sha512_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha512_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static u8 padding[128] = { 0x80, };</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	__be64 *dst = (__be64 *)hash;</div><div class='del'>-	unsigned int pad_len;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits[2];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits[1] = cpu_to_be64(sctx-&gt;count[0] &lt;&lt; 3);</div><div class='del'>-	bits[0] = cpu_to_be64(sctx-&gt;count[1] &lt;&lt; 3 | sctx-&gt;count[0] &gt;&gt; 61);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 112 mod 128. */</div><div class='del'>-	index = sctx-&gt;count[0] &amp; 0x7f;</div><div class='del'>-	pad_len = (index &lt; 112) ? (112 - index) : ((128+112) - index);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha512_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha512_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha512_update(sctx, (const u8 *)bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	octeon_sha512_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest. */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be64(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(struct sha512_state));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha384_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[64];</div><div class='del'>-</div><div class='del'>-	octeon_sha512_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, 48);</div><div class='del'>-	memzero_explicit(D, 64);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg octeon_sha512_algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha512_base_init,</div><div class='del'>-	.update		=	octeon_sha512_update,</div><div class='del'>-	.final		=	octeon_sha512_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha512",</div><div class='del'>-		.cra_driver_name=	"octeon-sha512",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha384_base_init,</div><div class='del'>-	.update		=	octeon_sha512_update,</div><div class='del'>-	.final		=	octeon_sha384_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha384",</div><div class='del'>-		.cra_driver_name=	"octeon-sha384",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init octeon_sha512_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!octeon_has_crypto())</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	return crypto_register_shashes(octeon_sha512_algs,</div><div class='del'>-				       ARRAY_SIZE(octeon_sha512_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit octeon_sha512_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(octeon_sha512_algs,</div><div class='del'>-				  ARRAY_SIZE(octeon_sha512_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(octeon_sha512_mod_init);</div><div class='del'>-module_exit(octeon_sha512_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-512 and SHA-384 Secure Hash Algorithms (OCTEON)");</div><div class='del'>-MODULE_AUTHOR("Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;");</div><div class='head'>diff --git a/arch/mips/cavium-octeon/executive/octeon-model.c b/arch/mips/cavium-octeon/executive/octeon-model.c<br/>index 657dbad9644e..98996cc0857e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/executive/octeon-model.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/executive/octeon-model.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/executive/octeon-model.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/executive/octeon-model.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'>  * Contact Cavium Networks for more information</div><div class='ctx'>  ***********************license end**************************************/</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/octeon/octeon.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum octeon_feature_bits __octeon_feature_bits __read_mostly;</div><div class='hunk'>@@ -208,16 +209,16 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (chip_id &amp; 0xf) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			strcpy(pass, "1.X");</div><div class='add'>+			strscpy(pass, "1.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='del'>-			strcpy(pass, "2.X");</div><div class='add'>+			strscpy(pass, "2.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='del'>-			strcpy(pass, "3.X");</div><div class='add'>+			strscpy(pass, "3.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			strcpy(pass, "X.X");</div><div class='add'>+			strscpy(pass, "X.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -232,13 +233,13 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (chip_id &amp; 0xf) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			strcpy(pass, "1.0");</div><div class='add'>+			strscpy(pass, "1.0");</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='del'>-			strcpy(pass, "1.1");</div><div class='add'>+			strscpy(pass, "1.1");</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			strcpy(pass, "X.X");</div><div class='add'>+			strscpy(pass, "X.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -253,13 +254,13 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (chip_id &amp; 0xf) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			strcpy(pass, "1.0");</div><div class='add'>+			strscpy(pass, "1.0");</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='del'>-			strcpy(pass, "1.1");</div><div class='add'>+			strscpy(pass, "1.1");</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			strcpy(pass, "X.X");</div><div class='add'>+			strscpy(pass, "X.X");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -273,16 +274,16 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,</div><div class='ctx'> 		if ((chip_id &amp; 0xFF) &lt; 0x8) {</div><div class='ctx'> 			switch (chip_id &amp; 0x3) {</div><div class='ctx'> 			case 0:</div><div class='del'>-				strcpy(pass, "1.0");</div><div class='add'>+				strscpy(pass, "1.0");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-				strcpy(pass, "1.1");</div><div class='add'>+				strscpy(pass, "1.1");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 3:</div><div class='del'>-				strcpy(pass, "1.2");</div><div class='add'>+				strscpy(pass, "1.2");</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='del'>-				strcpy(pass, "1.X");</div><div class='add'>+				strscpy(pass, "1.X");</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -447,7 +448,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,</div><div class='ctx'> 	default:</div><div class='ctx'> 		family = "XX";</div><div class='ctx'> 		core_model = "XX";</div><div class='del'>-		strcpy(pass, "X.X");</div><div class='add'>+		strscpy(pass, "X.X");</div><div class='ctx'> 		suffix = "XXX";</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-crypto.c b/arch/mips/cavium-octeon/octeon-crypto.c<br/>index cfb4a146cf17..0ff8559391f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-crypto.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-crypto.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/octeon-crypto.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/octeon-crypto.c</a></div><div class='hunk'>@@ -7,12 +7,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cop2.h&gt;</div><div class='add'>+#include &lt;asm/octeon/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/sched/task_stack.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "octeon-crypto.h"</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * Enable access to Octeon's COP2 crypto hardware for kernel use. Wrap any</div><div class='ctx'>  * crypto operations in calls to octeon_crypto_enable/disable in order to make</div><div class='head'>diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c<br/>index 8425a6b38aa2..5c3de175ef5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/octeon-irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/octeon-irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/octeon-irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/octeon-irq.c</a></div><div class='hunk'>@@ -1503,9 +1503,9 @@ static int __init octeon_irq_init_ciu(</div><div class='ctx'> 	/* Mips internal */</div><div class='ctx'> 	octeon_irq_init_core();</div><div class='ctx'> </div><div class='del'>-	ciu_domain = irq_domain_add_tree(</div><div class='del'>-		ciu_node, &amp;octeon_irq_domain_ciu_ops, dd);</div><div class='del'>-	irq_set_default_host(ciu_domain);</div><div class='add'>+	ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_irq_domain_ciu_ops,</div><div class='add'>+					    dd);</div><div class='add'>+	irq_set_default_domain(ciu_domain);</div><div class='ctx'> </div><div class='ctx'> 	/* CIU_0 */</div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='hunk'>@@ -1637,8 +1637,8 @@ static int __init octeon_irq_init_gpio(</div><div class='ctx'> 	if (gpiod) {</div><div class='ctx'> 		/* gpio domain host_data is the base hwirq number. */</div><div class='ctx'> 		gpiod-&gt;base_hwirq = base_hwirq;</div><div class='del'>-		irq_domain_add_linear(</div><div class='del'>-			gpio_node, 16, &amp;octeon_irq_domain_gpio_ops, gpiod);</div><div class='add'>+		irq_domain_create_linear(of_fwnode_handle(gpio_node), 16,</div><div class='add'>+					 &amp;octeon_irq_domain_gpio_ops, gpiod);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_warn("Cannot allocate memory for GPIO irq_domain.\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2074,9 +2074,9 @@ static int __init octeon_irq_init_ciu2(</div><div class='ctx'> 	/* Mips internal */</div><div class='ctx'> 	octeon_irq_init_core();</div><div class='ctx'> </div><div class='del'>-	ciu_domain = irq_domain_add_tree(</div><div class='del'>-		ciu_node, &amp;octeon_irq_domain_ciu2_ops, NULL);</div><div class='del'>-	irq_set_default_host(ciu_domain);</div><div class='add'>+	ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_irq_domain_ciu2_ops,</div><div class='add'>+					    NULL);</div><div class='add'>+	irq_set_default_domain(ciu_domain);</div><div class='ctx'> </div><div class='ctx'> 	/* CUI2 */</div><div class='ctx'> 	for (i = 0; i &lt; 64; i++) {</div><div class='hunk'>@@ -2331,11 +2331,12 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,</div><div class='ctx'> 	}</div><div class='ctx'> 	host_data-&gt;max_bits = val;</div><div class='ctx'> </div><div class='del'>-	cib_domain = irq_domain_add_linear(ciu_node, host_data-&gt;max_bits,</div><div class='del'>-					   &amp;octeon_irq_domain_cib_ops,</div><div class='del'>-					   host_data);</div><div class='add'>+	cib_domain = irq_domain_create_linear(of_fwnode_handle(ciu_node),</div><div class='add'>+					      host_data-&gt;max_bits,</div><div class='add'>+					      &amp;octeon_irq_domain_cib_ops,</div><div class='add'>+					      host_data);</div><div class='ctx'> 	if (!cib_domain) {</div><div class='del'>-		pr_err("ERROR: Couldn't irq_domain_add_linear()\n");</div><div class='add'>+		pr_err("ERROR: Couldn't irq_domain_create_linear()\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2918,8 +2919,8 @@ static int __init octeon_irq_init_ciu3(struct device_node *ciu_node,</div><div class='ctx'> 	 * Initialize all domains to use the default domain. Specific major</div><div class='ctx'> 	 * blocks will overwrite the default domain as needed.</div><div class='ctx'> 	 */</div><div class='del'>-	domain = irq_domain_add_tree(ciu_node, &amp;octeon_dflt_domain_ciu3_ops,</div><div class='del'>-				     ciu3_info);</div><div class='add'>+	domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_dflt_domain_ciu3_ops,</div><div class='add'>+					ciu3_info);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_CIU3_DOMAINS; i++)</div><div class='ctx'> 		ciu3_info-&gt;domain[i] = domain;</div><div class='ctx'> </div><div class='hunk'>@@ -2929,7 +2930,7 @@ static int __init octeon_irq_init_ciu3(struct device_node *ciu_node,</div><div class='ctx'> 		/* Only do per CPU things if it is the CIU of the boot node. */</div><div class='ctx'> 		octeon_irq_ciu3_alloc_resources(ciu3_info);</div><div class='ctx'> 		if (node == 0)</div><div class='del'>-			irq_set_default_host(domain);</div><div class='add'>+			irq_set_default_domain(domain);</div><div class='ctx'> </div><div class='ctx'> 		octeon_irq_use_ip4 = false;</div><div class='ctx'> 		/* Enable the CIU lines */</div><div class='head'>diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c<br/>index 5e1dd4e6e82f..47677b5d7ed0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/octeon-platform.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/octeon-platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/octeon-platform.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/octeon-platform.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/libfdt.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/octeon/octeon.h&gt;</div><div class='ctx'> #include &lt;asm/octeon/cvmx-helper-board.h&gt;</div><div class='hunk'>@@ -538,8 +539,7 @@ static void __init octeon_fdt_set_phy(int eth, int phy_addr)</div><div class='ctx'> </div><div class='ctx'> 	if (octeon_has_88e1145()) {</div><div class='ctx'> 		fdt_nop_property(initial_boot_params, phy, "marvell,reg-init");</div><div class='del'>-		memset(new_name, 0, sizeof(new_name));</div><div class='del'>-		strcpy(new_name, "marvell,88e1145");</div><div class='add'>+		strscpy_pad(new_name, "marvell,88e1145");</div><div class='ctx'> 		p = fdt_getprop(initial_boot_params, phy, "compatible",</div><div class='ctx'> 				&amp;current_len);</div><div class='ctx'> 		if (p &amp;&amp; current_len &gt;= strlen(new_name))</div><div class='head'>diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c<br/>index 08ea2cde1eb5..054e331b3202 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/cavium-octeon/smp.c</a></div><div class='hunk'>@@ -334,7 +334,7 @@ static void octeon_cpu_die(unsigned int cpu)</div><div class='ctx'> 		new_mask = *p;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_info("Reset core %d. Available Coremask = 0x%x \n", coreid, new_mask);</div><div class='add'>+	pr_info("Reset core %d. Available Coremask = 0x%x\n", coreid, new_mask);</div><div class='ctx'> 	mb();</div><div class='ctx'> 	cvmx_write_csr(CVMX_CIU_PP_RST, 1 &lt;&lt; coreid);</div><div class='ctx'> 	cvmx_write_csr(CVMX_CIU_PP_RST, 0);</div><div class='head'>diff --git a/arch/mips/configs/ath79_defconfig b/arch/mips/configs/ath79_defconfig<br/>index 8caa03a41327..cba0b85c6707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ath79_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ath79_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ath79_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ath79_defconfig</a></div><div class='hunk'>@@ -82,7 +82,6 @@ CONFIG_LEDS_GPIO=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> # CONFIG_PROC_PAGE_MONITOR is not set</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_SCHED_DEBUG is not set</div><div class='head'>diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig<br/>index 6a68a96d13f8..f56e8db5da95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/bcm47xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/bcm47xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/bcm47xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/bcm47xx_defconfig</a></div><div class='hunk'>@@ -69,7 +69,6 @@ CONFIG_USB_HCD_BCMA=y</div><div class='ctx'> CONFIG_USB_HCD_SSB=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_TIMER=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_DEFAULT_ON=y</div><div class='del'>-CONFIG_CRC32_SARWATE=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_INFO_REDUCED=y</div><div class='head'>diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig<br/>index e463a9acae03..97d2cd997285 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/bigsur_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/bigsur_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/bigsur_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/bigsur_defconfig</a></div><div class='hunk'>@@ -81,7 +81,6 @@ CONFIG_IP_VS_SH=m</div><div class='ctx'> CONFIG_IP_VS_SED=m</div><div class='ctx'> CONFIG_IP_VS_NQ=m</div><div class='ctx'> CONFIG_IP_VS_FTP=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_BRIDGE=m</div><div class='ctx'> CONFIG_VLAN_8021Q=m</div><div class='ctx'> CONFIG_VLAN_8021Q_GVRP=y</div><div class='hunk'>@@ -222,7 +221,6 @@ CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='hunk'>@@ -239,8 +237,6 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='del'>-CONFIG_CRC7=m</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig<br/>index f523ee6f25bf..68c363366bce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/cavium_octeon_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/cavium_octeon_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/cavium_octeon_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/cavium_octeon_defconfig</a></div><div class='hunk'>@@ -155,10 +155,6 @@ CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_SECURITY_NETWORK=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='del'>-CONFIG_CRYPTO_MD5_OCTEON=y</div><div class='del'>-CONFIG_CRYPTO_SHA1_OCTEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_OCTEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA512_OCTEON=m</div><div class='ctx'> CONFIG_CRYPTO_DES=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig<br/>index e835730ea7fa..b0b551efac7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/cobalt_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/cobalt_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/cobalt_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/cobalt_defconfig</a></div><div class='hunk'>@@ -70,4 +70,3 @@ CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFSD=y</div><div class='ctx'> CONFIG_NFSD_V3_ACL=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='head'>diff --git a/arch/mips/configs/db1xxx_defconfig b/arch/mips/configs/db1xxx_defconfig<br/>index 6eff21ff15d5..281dd7d0f805 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/db1xxx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/db1xxx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/db1xxx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/db1xxx_defconfig</a></div><div class='hunk'>@@ -216,7 +216,6 @@ CONFIG_CRYPTO_USER=y</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_HASH=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_SKCIPHER=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/mips/configs/decstation_64_defconfig b/arch/mips/configs/decstation_64_defconfig<br/>index 92a1d0aea38c..85a4472cb058 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_64_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_64_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_64_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/decstation_64_defconfig</a></div><div class='hunk'>@@ -168,7 +168,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='hunk'>@@ -177,12 +176,9 @@ CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_OFB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_CMAC=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_CRC32=m</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='head'>diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig<br/>index db214fcebcbe..a3b2c8da2dde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/decstation_defconfig</a></div><div class='hunk'>@@ -163,7 +163,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='hunk'>@@ -172,12 +171,9 @@ CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_OFB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_CMAC=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_CRC32=m</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='head'>diff --git a/arch/mips/configs/decstation_r4k_defconfig b/arch/mips/configs/decstation_r4k_defconfig<br/>index 15b769e96d5b..a476717b8a6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_r4k_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/decstation_r4k_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/decstation_r4k_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/decstation_r4k_defconfig</a></div><div class='hunk'>@@ -163,7 +163,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='hunk'>@@ -172,12 +171,9 @@ CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_OFB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='del'>-CONFIG_CRYPTO_KEYWRAP=m</div><div class='ctx'> CONFIG_CRYPTO_CMAC=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_CRC32=m</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='head'>diff --git a/arch/mips/configs/eyeq5_defconfig b/arch/mips/configs/eyeq5_defconfig<br/>index ae9a09b16e40..6688f56aba1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/eyeq5_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/eyeq5_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/eyeq5_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/eyeq5_defconfig</a></div><div class='hunk'>@@ -19,20 +19,18 @@ CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_EYEQ=y</div><div class='del'>-CONFIG_MACH_EYEQ5=y</div><div class='ctx'> CONFIG_FIT_IMAGE_FDT_EPM5=y</div><div class='del'>-CONFIG_PAGE_SIZE_16KB=y</div><div class='ctx'> CONFIG_MIPS_CPS=y</div><div class='ctx'> CONFIG_CPU_HAS_MSA=y</div><div class='ctx'> CONFIG_NR_CPUS=16</div><div class='ctx'> CONFIG_MIPS_RAW_APPENDED_DTB=y</div><div class='ctx'> CONFIG_JUMP_LABEL=y</div><div class='add'>+CONFIG_PAGE_SIZE_16KB=y</div><div class='ctx'> CONFIG_COMPAT_32BIT_TIME=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_TRIM_UNUSED_KSYMS=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_SPARSEMEM_MANUAL=y</div><div class='ctx'> CONFIG_USERFAULTFD=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='hunk'>@@ -64,8 +62,14 @@ CONFIG_CAN_M_CAN=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='ctx'> CONFIG_HW_RANDOM=y</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_NOMADIK=y</div><div class='ctx'> # CONFIG_PTP_1588_CLOCK is not set</div><div class='ctx'> CONFIG_PINCTRL=y</div><div class='add'>+CONFIG_GPIOLIB=y</div><div class='add'>+CONFIG_GPIO_NOMADIK=y</div><div class='add'>+CONFIG_SENSORS_LM75=y</div><div class='ctx'> CONFIG_MFD_SYSCON=y</div><div class='ctx'> CONFIG_HID_A4TECH=y</div><div class='ctx'> CONFIG_HID_BELKIN=y</div><div class='hunk'>@@ -79,6 +83,8 @@ CONFIG_HID_MICROSOFT=y</div><div class='ctx'> CONFIG_HID_MONTEREY=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_SDHCI_CADENCE=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_RESET_CONTROLLER=y</div><div class='ctx'> # CONFIG_NVMEM is not set</div><div class='hunk'>@@ -99,7 +105,6 @@ CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_NFS_V4_1=y</div><div class='ctx'> CONFIG_NFS_V4_2=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRYPTO_CRC32_MIPS=y</div><div class='ctx'> CONFIG_FRAME_WARN=1024</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_RCU_TRACE is not set</div><div class='head'>diff --git a/arch/mips/configs/eyeq6_defconfig b/arch/mips/configs/eyeq6_defconfig<br/>index 6597d5e88b33..0a00a201937b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/eyeq6_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/eyeq6_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/eyeq6_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/eyeq6_defconfig</a></div><div class='hunk'>@@ -82,6 +82,8 @@ CONFIG_HID_MICROSOFT=y</div><div class='ctx'> CONFIG_HID_MONTEREY=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_SDHCI_CADENCE=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_RESET_CONTROLLER=y</div><div class='ctx'> # CONFIG_NVMEM is not set</div><div class='hunk'>@@ -102,7 +104,6 @@ CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_NFS_V4_1=y</div><div class='ctx'> CONFIG_NFS_V4_2=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRYPTO_CRC32_MIPS=y</div><div class='ctx'> CONFIG_FRAME_WARN=1024</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_RCU_TRACE is not set</div><div class='head'>diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig<br/>index 00329bb5de5a..cdedbb8a8f53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/fuloong2e_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/fuloong2e_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/fuloong2e_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/fuloong2e_defconfig</a></div><div class='hunk'>@@ -44,7 +44,6 @@ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_TRACE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_IPRANGE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LENGTH=m</div><div class='hunk'>@@ -218,5 +217,3 @@ CONFIG_CRYPTO_SEED=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC7=m</div><div class='head'>diff --git a/arch/mips/configs/gcw0_defconfig b/arch/mips/configs/gcw0_defconfig<br/>index bc1ef66e3999..8b7ad877e07a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/gcw0_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/gcw0_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/gcw0_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/gcw0_defconfig</a></div><div class='hunk'>@@ -13,7 +13,6 @@ CONFIG_MIPS_CMDLINE_DTB_EXTEND=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='del'>-# CONFIG_BOUNCE is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='head'>diff --git a/arch/mips/configs/generic/32r6.config b/arch/mips/configs/generic/32r6.config<br/>index 1a5d5ea4ab2b..ca606e71f4d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/32r6.config?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/32r6.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/32r6.config?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/generic/32r6.config</a></div><div class='hunk'>@@ -1,4 +1,2 @@</div><div class='ctx'> CONFIG_CPU_MIPS32_R6=y</div><div class='ctx'> CONFIG_HIGHMEM=y</div><div class='del'>-</div><div class='del'>-CONFIG_CRYPTO_CRC32_MIPS=y</div><div class='head'>diff --git a/arch/mips/configs/generic/64r6.config b/arch/mips/configs/generic/64r6.config<br/>index 63b4e95f303d..23a300914957 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/64r6.config?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/64r6.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/64r6.config?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/generic/64r6.config</a></div><div class='hunk'>@@ -4,5 +4,4 @@ CONFIG_MIPS32_O32=y</div><div class='ctx'> CONFIG_MIPS32_N32=y</div><div class='ctx'> </div><div class='ctx'> CONFIG_CPU_HAS_MSA=y</div><div class='del'>-CONFIG_CRYPTO_CRC32_MIPS=y</div><div class='ctx'> CONFIG_VIRTUALIZATION=y</div><div class='head'>diff --git a/arch/mips/configs/generic/board-marduk.config b/arch/mips/configs/generic/board-marduk.config<br/>index 05ca34cd5a73..65433c5c4fde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/board-marduk.config?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/generic/board-marduk.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/generic/board-marduk.config?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/generic/board-marduk.config</a></div><div class='hunk'>@@ -50,4 +50,3 @@ CONFIG_CRYPTO_DEV_IMGTEC_HASH=y</div><div class='ctx'> CONFIG_IMGPDC_WDT=y</div><div class='ctx'> CONFIG_IR_IMG=y</div><div class='ctx'> CONFIG_CC10001_ADC=y</div><div class='del'>-CONFIG_SND_SOC_IMG=y</div><div class='head'>diff --git a/arch/mips/configs/gpr_defconfig b/arch/mips/configs/gpr_defconfig<br/>index 92fc0edbac47..437ef6dc0b4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/gpr_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/gpr_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/gpr_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/gpr_defconfig</a></div><div class='hunk'>@@ -84,7 +84,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=y</div><div class='hunk'>@@ -116,7 +115,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -274,7 +272,7 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_850=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO_AUTHENC=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='head'>diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig<br/>index e22e8b825903..2decf8b98d31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip22_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip22_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip22_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ip22_defconfig</a></div><div class='hunk'>@@ -79,7 +79,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DSCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='hunk'>@@ -161,7 +160,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -327,5 +325,4 @@ CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='head'>diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig<br/>index 4714074c8bd7..5d079941fd20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip27_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip27_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip27_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ip27_defconfig</a></div><div class='hunk'>@@ -63,7 +63,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -255,9 +254,6 @@ CONFIG_I2C_TAOS_EVM=m</div><div class='ctx'> CONFIG_I2C_STUB=m</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> CONFIG_THERMAL=y</div><div class='del'>-CONFIG_MFD_PCF50633=m</div><div class='del'>-CONFIG_PCF50633_ADC=m</div><div class='del'>-CONFIG_PCF50633_GPIO=m</div><div class='ctx'> # CONFIG_VGA_ARB is not set</div><div class='ctx'> CONFIG_LEDS_LP3944=m</div><div class='ctx'> CONFIG_LEDS_PCA955X=m</div><div class='hunk'>@@ -305,7 +301,6 @@ CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=m</div><div class='hunk'>@@ -322,4 +317,3 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='head'>diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig<br/>index e0040110a3ee..6db21e498faa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip28_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip28_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip28_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ip28_defconfig</a></div><div class='hunk'>@@ -60,6 +60,5 @@ CONFIG_TMPFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/mips/configs/ip30_defconfig b/arch/mips/configs/ip30_defconfig<br/>index 178d61645cea..a4524e785469 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip30_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip30_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip30_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ip30_defconfig</a></div><div class='hunk'>@@ -176,8 +176,6 @@ CONFIG_CRYPTO_XTS=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_RMD160=m</div><div class='del'>-CONFIG_CRYPTO_VMAC=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='head'>diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig<br/>index 930c5f6ed182..d8ac11427f69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip32_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/ip32_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/ip32_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/ip32_defconfig</a></div><div class='hunk'>@@ -177,8 +177,6 @@ CONFIG_CRYPTO_SERPENT=y</div><div class='ctx'> CONFIG_CRYPTO_TEA=y</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig<br/>index 71d6340497c9..5038a27d035f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/lemote2f_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/lemote2f_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/lemote2f_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/lemote2f_defconfig</a></div><div class='hunk'>@@ -297,7 +297,7 @@ CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAMELLIA=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='head'>diff --git a/arch/mips/configs/loongson1c_defconfig b/arch/mips/configs/loongson1_defconfig<br/>index c3910a9dee9e..81acae6f61c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson1c_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson1c_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson1_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/loongson1_defconfig</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> # CONFIG_LOCALVERSION_AUTO is not set</div><div class='ctx'> CONFIG_KERNEL_XZ=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT_V3=y</div><div class='hunk'>@@ -12,16 +11,16 @@ CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='del'>-# CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_MACH_LOONGSON32=y</div><div class='del'>-CONFIG_LOONGSON1_LS1C=y</div><div class='del'>-# CONFIG_SECCOMP is not set</div><div class='ctx'> # CONFIG_SUSPEND is not set</div><div class='add'>+# CONFIG_SECCOMP is not set</div><div class='add'>+# CONFIG_GCC_PLUGINS is not set</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='del'>-# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='hunk'>@@ -32,6 +31,7 @@ CONFIG_SYN_COOKIES=y</div><div class='ctx'> # CONFIG_INET_DIAG is not set</div><div class='ctx'> # CONFIG_IPV6 is not set</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='add'>+# CONFIG_ETHTOOL_NETLINK is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> # CONFIG_STANDALONE is not set</div><div class='hunk'>@@ -39,32 +39,75 @@ CONFIG_MTD=y</div><div class='ctx'> CONFIG_MTD_CMDLINE_PARTS=y</div><div class='ctx'> CONFIG_MTD_BLOCK=y</div><div class='ctx'> CONFIG_MTD_RAW_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_LOONGSON1=y</div><div class='ctx'> CONFIG_MTD_UBI=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_SCSI=m</div><div class='ctx'> # CONFIG_SCSI_PROC_FS is not set</div><div class='ctx'> CONFIG_BLK_DEV_SD=m</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_SCSI_LOWLEVEL is not set</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_ALACRITECH is not set</div><div class='add'>+# CONFIG_NET_VENDOR_AMAZON is not set</div><div class='add'>+# CONFIG_NET_VENDOR_AQUANTIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ARC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ASIX is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CADENCE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CAVIUM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CORTINA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_DAVICOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ENGLEDER is not set</div><div class='add'>+# CONFIG_NET_VENDOR_EZCHIP is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FUNGIBLE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_GOOGLE is not set</div><div class='add'>+# CONFIG_NET_VENDOR_HISILICON is not set</div><div class='add'>+# CONFIG_NET_VENDOR_HUAWEI is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_LITEX is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_META is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROCHIP is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROSOFT is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NI is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NETRONOME is not set</div><div class='add'>+# CONFIG_NET_VENDOR_PENSANDO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_QUALCOMM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_RENESAS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_ROCKER is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SAMSUNG is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SOLARFLARE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SOCIONEXT is not set</div><div class='ctx'> CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_DWMAC_GENERIC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SYNOPSYS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_VERTEXCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_VIA is not set</div><div class='add'>+# CONFIG_NET_VENDOR_WANGXUN is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_WIZNET is not set</div><div class='add'>+# CONFIG_NET_VENDOR_XILINX is not set</div><div class='add'>+CONFIG_DAVICOM_PHY=y</div><div class='add'>+CONFIG_REALTEK_PHY=y</div><div class='add'>+# CONFIG_USB_NET_DRIVERS is not set</div><div class='ctx'> # CONFIG_WLAN is not set</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> # CONFIG_INPUT_KEYBOARD is not set</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_VT_CONSOLE is not set</div><div class='ctx'> CONFIG_VT_HW_CONSOLE_BINDING=y</div><div class='ctx'> CONFIG_LEGACY_PTY_COUNT=8</div><div class='ctx'> CONFIG_SERIAL_8250=y</div><div class='ctx'> CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_OF_PLATFORM=y</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_PTP_1588_CLOCK is not set</div><div class='ctx'> CONFIG_GPIOLIB=y</div><div class='ctx'> CONFIG_GPIO_LOONGSON1=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='hunk'>@@ -72,7 +115,15 @@ CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_WATCHDOG_NOWAYOUT=y</div><div class='ctx'> CONFIG_WATCHDOG_SYSFS=y</div><div class='ctx'> CONFIG_LOONGSON1_WDT=y</div><div class='del'>-# CONFIG_VGA_CONSOLE is not set</div><div class='add'>+CONFIG_SOUND=y</div><div class='add'>+CONFIG_SND=y</div><div class='add'>+# CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='add'>+# CONFIG_SND_DRIVERS is not set</div><div class='add'>+# CONFIG_SND_MIPS is not set</div><div class='add'>+# CONFIG_SND_USB is not set</div><div class='add'>+CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_LOONGSON1_AC97=y</div><div class='add'>+CONFIG_SND_SIMPLE_CARD=y</div><div class='ctx'> CONFIG_HID_GENERIC=m</div><div class='ctx'> CONFIG_USB_HID=m</div><div class='ctx'> CONFIG_USB=y</div><div class='hunk'>@@ -87,17 +138,20 @@ CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_LEDS_GPIO=y</div><div class='ctx'> CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_MTD=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='del'>-CONFIG_RTC_DRV_LOONGSON1=y</div><div class='add'>+# CONFIG_RTC_NVMEM is not set</div><div class='add'>+CONFIG_RTC_DRV_LOONGSON=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_LOONGSON1_APB_DMA=y</div><div class='add'>+# CONFIG_VIRTIO_MENU is not set</div><div class='add'>+# CONFIG_VHOST_MENU is not set</div><div class='add'>+# CONFIG_MIPS_PLATFORM_DEVICES is not set</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT2_FS_XATTR=y</div><div class='del'>-CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS_SECURITY=y</div><div class='add'>+# CONFIG_NVMEM is not set</div><div class='add'>+CONFIG_EXT4_FS=y</div><div class='add'>+CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='ctx'> CONFIG_PROC_KCORE=y</div><div class='hunk'>@@ -106,16 +160,21 @@ CONFIG_TMPFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_UBIFS_FS=y</div><div class='ctx'> CONFIG_UBIFS_FS_ADVANCED_COMPR=y</div><div class='ctx'> CONFIG_UBIFS_ATIME_SUPPORT=y</div><div class='add'>+# CONFIG_UBIFS_FS_SECURITY is not set</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-# CONFIG_CRYPTO_ECHAINIV is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='add'>+# CONFIG_XZ_DEC_X86 is not set</div><div class='add'>+# CONFIG_XZ_DEC_POWERPC is not set</div><div class='add'>+# CONFIG_XZ_DEC_ARM is not set</div><div class='add'>+# CONFIG_XZ_DEC_ARMTHUMB is not set</div><div class='add'>+# CONFIG_XZ_DEC_ARM64 is not set</div><div class='add'>+# CONFIG_XZ_DEC_SPARC is not set</div><div class='add'>+# CONFIG_XZ_DEC_RISCV is not set</div><div class='ctx'> CONFIG_DYNAMIC_DEBUG=y</div><div class='del'>-CONFIG_DEBUG_FS=y</div><div class='add'>+# CONFIG_DEBUG_MISC is not set</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-# CONFIG_SCHED_DEBUG is not set</div><div class='del'>-# CONFIG_DEBUG_PREEMPT is not set</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='ctx'> # CONFIG_EARLY_PRINTK is not set</div><div class='head'>diff --git a/arch/mips/configs/loongson1b_defconfig b/arch/mips/configs/loongson1b_defconfig<br/>deleted file mode 100644<br/>index 68207b31dc20..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson1b_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson1b_defconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,120 +0,0 @@</div><div class='del'>-# CONFIG_LOCALVERSION_AUTO is not set</div><div class='del'>-CONFIG_KERNEL_XZ=y</div><div class='del'>-CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_HIGH_RES_TIMERS=y</div><div class='del'>-CONFIG_PREEMPT=y</div><div class='del'>-CONFIG_BSD_PROCESS_ACCT=y</div><div class='del'>-CONFIG_BSD_PROCESS_ACCT_V3=y</div><div class='del'>-CONFIG_IKCONFIG=y</div><div class='del'>-CONFIG_IKCONFIG_PROC=y</div><div class='del'>-CONFIG_LOG_BUF_SHIFT=16</div><div class='del'>-CONFIG_NAMESPACES=y</div><div class='del'>-CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='del'>-CONFIG_EXPERT=y</div><div class='del'>-CONFIG_PERF_EVENTS=y</div><div class='del'>-# CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_MACH_LOONGSON32=y</div><div class='del'>-# CONFIG_SECCOMP is not set</div><div class='del'>-# CONFIG_SUSPEND is not set</div><div class='del'>-CONFIG_MODULES=y</div><div class='del'>-CONFIG_MODULE_UNLOAD=y</div><div class='del'>-CONFIG_MODVERSIONS=y</div><div class='del'>-# CONFIG_BLK_DEV_BSG is not set</div><div class='del'>-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='del'>-CONFIG_NET=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='del'>-CONFIG_INET=y</div><div class='del'>-CONFIG_IP_PNP=y</div><div class='del'>-CONFIG_IP_PNP_DHCP=y</div><div class='del'>-CONFIG_SYN_COOKIES=y</div><div class='del'>-# CONFIG_INET_DIAG is not set</div><div class='del'>-# CONFIG_IPV6 is not set</div><div class='del'>-# CONFIG_WIRELESS is not set</div><div class='del'>-CONFIG_DEVTMPFS=y</div><div class='del'>-CONFIG_DEVTMPFS_MOUNT=y</div><div class='del'>-# CONFIG_STANDALONE is not set</div><div class='del'>-CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_CMDLINE_PARTS=y</div><div class='del'>-CONFIG_MTD_BLOCK=y</div><div class='del'>-CONFIG_MTD_RAW_NAND=y</div><div class='del'>-CONFIG_MTD_UBI=y</div><div class='del'>-CONFIG_BLK_DEV_LOOP=y</div><div class='del'>-CONFIG_SCSI=m</div><div class='del'>-# CONFIG_SCSI_PROC_FS is not set</div><div class='del'>-CONFIG_BLK_DEV_SD=m</div><div class='del'>-# CONFIG_SCSI_LOWLEVEL is not set</div><div class='del'>-CONFIG_NETDEVICES=y</div><div class='del'>-# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='del'>-# CONFIG_NET_VENDOR_INTEL is not set</div><div class='del'>-# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='del'>-# CONFIG_NET_VENDOR_MICREL is not set</div><div class='del'>-# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='del'>-# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='del'>-# CONFIG_NET_VENDOR_SMSC is not set</div><div class='del'>-CONFIG_STMMAC_ETH=y</div><div class='del'>-# CONFIG_NET_VENDOR_WIZNET is not set</div><div class='del'>-# CONFIG_WLAN is not set</div><div class='del'>-CONFIG_INPUT_EVDEV=y</div><div class='del'>-# CONFIG_INPUT_KEYBOARD is not set</div><div class='del'>-# CONFIG_INPUT_MOUSE is not set</div><div class='del'>-# CONFIG_SERIO is not set</div><div class='del'>-CONFIG_VT_HW_CONSOLE_BINDING=y</div><div class='del'>-CONFIG_LEGACY_PTY_COUNT=8</div><div class='del'>-CONFIG_SERIAL_8250=y</div><div class='del'>-CONFIG_SERIAL_8250_CONSOLE=y</div><div class='del'>-# CONFIG_HW_RANDOM is not set</div><div class='del'>-CONFIG_GPIOLIB=y</div><div class='del'>-CONFIG_GPIO_LOONGSON1=y</div><div class='del'>-# CONFIG_HWMON is not set</div><div class='del'>-CONFIG_WATCHDOG=y</div><div class='del'>-CONFIG_WATCHDOG_NOWAYOUT=y</div><div class='del'>-CONFIG_WATCHDOG_SYSFS=y</div><div class='del'>-CONFIG_LOONGSON1_WDT=y</div><div class='del'>-# CONFIG_VGA_CONSOLE is not set</div><div class='del'>-CONFIG_HID_GENERIC=m</div><div class='del'>-CONFIG_USB_HID=m</div><div class='del'>-CONFIG_USB=y</div><div class='del'>-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='del'>-CONFIG_USB_EHCI_HCD=y</div><div class='del'>-# CONFIG_USB_EHCI_TT_NEWSCHED is not set</div><div class='del'>-CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='del'>-CONFIG_USB_STORAGE=m</div><div class='del'>-CONFIG_USB_SERIAL=m</div><div class='del'>-CONFIG_USB_SERIAL_PL2303=m</div><div class='del'>-CONFIG_NEW_LEDS=y</div><div class='del'>-CONFIG_LEDS_CLASS=y</div><div class='del'>-CONFIG_LEDS_GPIO=y</div><div class='del'>-CONFIG_LEDS_TRIGGERS=y</div><div class='del'>-CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='del'>-CONFIG_RTC_CLASS=y</div><div class='del'>-CONFIG_RTC_DRV_LOONGSON1=y</div><div class='del'>-# CONFIG_IOMMU_SUPPORT is not set</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT2_FS_XATTR=y</div><div class='del'>-CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT2_FS_SECURITY=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS_SECURITY=y</div><div class='del'>-# CONFIG_DNOTIFY is not set</div><div class='del'>-CONFIG_VFAT_FS=y</div><div class='del'>-CONFIG_PROC_KCORE=y</div><div class='del'>-CONFIG_TMPFS=y</div><div class='del'>-CONFIG_TMPFS_POSIX_ACL=y</div><div class='del'>-CONFIG_UBIFS_FS=y</div><div class='del'>-CONFIG_UBIFS_FS_ADVANCED_COMPR=y</div><div class='del'>-CONFIG_UBIFS_ATIME_SUPPORT=y</div><div class='del'>-CONFIG_NFS_FS=y</div><div class='del'>-CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_NLS_CODEPAGE_437=m</div><div class='del'>-CONFIG_NLS_ISO8859_1=m</div><div class='del'>-# CONFIG_CRYPTO_ECHAINIV is not set</div><div class='del'>-# CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_DYNAMIC_DEBUG=y</div><div class='del'>-CONFIG_DEBUG_FS=y</div><div class='del'>-CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-# CONFIG_SCHED_DEBUG is not set</div><div class='del'>-# CONFIG_DEBUG_PREEMPT is not set</div><div class='del'>-# CONFIG_FTRACE is not set</div><div class='del'>-# CONFIG_EARLY_PRINTK is not set</div><div class='head'>diff --git a/arch/mips/configs/loongson2k_defconfig b/arch/mips/configs/loongson2k_defconfig<br/>index 4b7f914d01d0..0cc665d3ea34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson2k_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson2k_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson2k_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/loongson2k_defconfig</a></div><div class='hunk'>@@ -52,7 +52,6 @@ CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_MARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LENGTH=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LIMIT=m</div><div class='hunk'>@@ -257,6 +256,17 @@ CONFIG_SND_HDA_INTEL=y</div><div class='ctx'> CONFIG_SND_HDA_HWDEP=y</div><div class='ctx'> CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_REALTEK=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK_LIB=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC260=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC262=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC268=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC269=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC662=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC680=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861VD=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC880=y</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC882=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_ANALOG=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_SIGMATEL=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_VIA=y</div><div class='head'>diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig<br/>index 78f498752066..240efff37d98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson3_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/loongson3_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/loongson3_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/loongson3_defconfig</a></div><div class='hunk'>@@ -5,6 +5,8 @@ CONFIG_POSIX_MQUEUE=y</div><div class='ctx'> CONFIG_AUDIT=y</div><div class='ctx'> CONFIG_NO_HZ=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_BPF_SYSCALL=y</div><div class='add'>+CONFIG_BPF_JIT=y</div><div class='ctx'> CONFIG_PREEMPT=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT_V3=y</div><div class='hunk'>@@ -22,18 +24,16 @@ CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='del'>-CONFIG_SYSFS_DEPRECATED=y</div><div class='ctx'> CONFIG_RELAY=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_BPF_SYSCALL=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_PERF_EVENTS=y</div><div class='add'>+CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_MACH_LOONGSON64=y</div><div class='ctx'> CONFIG_CPU_HAS_MSA=y</div><div class='ctx'> CONFIG_NUMA=y</div><div class='ctx'> CONFIG_NR_CPUS=16</div><div class='ctx'> CONFIG_HZ_256=y</div><div class='del'>-CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_MIPS32_O32=y</div><div class='ctx'> CONFIG_MIPS32_N32=y</div><div class='ctx'> CONFIG_VIRTUALIZATION=y</div><div class='hunk'>@@ -47,15 +47,12 @@ CONFIG_MODVERSIONS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_MQ_IOSCHED_DEADLINE=m</div><div class='ctx'> CONFIG_IOSCHED_BFQ=y</div><div class='del'>-CONFIG_BFQ_GROUP_IOSCHED=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='ctx'> CONFIG_KSM=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='ctx'> CONFIG_XFRM_USER=y</div><div class='ctx'> CONFIG_NET_KEY=y</div><div class='del'>-CONFIG_INET=y</div><div class='ctx'> CONFIG_IP_MULTICAST=y</div><div class='ctx'> CONFIG_IP_ADVANCED_ROUTER=y</div><div class='ctx'> CONFIG_IP_MULTIPLE_TABLES=y</div><div class='hunk'>@@ -75,7 +72,6 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LENGTH=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LIMIT=m</div><div class='hunk'>@@ -106,7 +102,6 @@ CONFIG_IP_NF_TARGET_ECN=m</div><div class='ctx'> CONFIG_IP_NF_TARGET_TTL=m</div><div class='ctx'> CONFIG_IP_NF_RAW=m</div><div class='ctx'> CONFIG_IP_NF_SECURITY=m</div><div class='del'>-CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='ctx'> CONFIG_NF_TABLES_IPV6=y</div><div class='hunk'>@@ -128,7 +123,6 @@ CONFIG_L2TP=m</div><div class='ctx'> CONFIG_BRIDGE=m</div><div class='ctx'> CONFIG_VSOCKETS=m</div><div class='ctx'> CONFIG_VIRTIO_VSOCKETS=m</div><div class='del'>-CONFIG_BPF_JIT=y</div><div class='ctx'> CONFIG_CFG80211=m</div><div class='ctx'> CONFIG_CFG80211_WEXT=y</div><div class='ctx'> CONFIG_MAC80211=m</div><div class='hunk'>@@ -146,6 +140,7 @@ CONFIG_BLK_DEV_LOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='ctx'> CONFIG_VIRTIO_BLK=y</div><div class='add'>+CONFIG_BLK_DEV_NVME=m</div><div class='ctx'> CONFIG_RAID_ATTRS=m</div><div class='ctx'> CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_BLK_DEV_SR=y</div><div class='hunk'>@@ -167,12 +162,10 @@ CONFIG_SATA_AHCI=y</div><div class='ctx'> CONFIG_PATA_ATIIXP=y</div><div class='ctx'> CONFIG_MD=y</div><div class='ctx'> CONFIG_BLK_DEV_MD=m</div><div class='del'>-CONFIG_MD_LINEAR=m</div><div class='ctx'> CONFIG_MD_RAID0=m</div><div class='ctx'> CONFIG_MD_RAID1=m</div><div class='ctx'> CONFIG_MD_RAID10=m</div><div class='ctx'> CONFIG_MD_RAID456=m</div><div class='del'>-CONFIG_MD_MULTIPATH=m</div><div class='ctx'> CONFIG_BLK_DEV_DM=m</div><div class='ctx'> CONFIG_DM_CRYPT=m</div><div class='ctx'> CONFIG_DM_SNAPSHOT=m</div><div class='hunk'>@@ -196,7 +189,6 @@ CONFIG_VIRTIO_NET=m</div><div class='ctx'> # CONFIG_NET_VENDOR_ARC is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_ATHEROS is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='del'>-# CONFIG_NET_VENDOR_BROCADE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CHELSIO is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_CISCO is not set</div><div class='hunk'>@@ -216,6 +208,7 @@ CONFIG_IXGBE=y</div><div class='ctx'> # CONFIG_NET_VENDOR_NVIDIA is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_OKI is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_QLOGIC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_BROCADE is not set</div><div class='ctx'> # CONFIG_NET_VENDOR_RDC is not set</div><div class='ctx'> CONFIG_8139CP=m</div><div class='ctx'> CONFIG_8139TOO=m</div><div class='hunk'>@@ -242,7 +235,6 @@ CONFIG_PPPOL2TP=m</div><div class='ctx'> CONFIG_PPP_ASYNC=m</div><div class='ctx'> CONFIG_PPP_SYNC_TTY=m</div><div class='ctx'> CONFIG_ATH9K=m</div><div class='del'>-CONFIG_HOSTAP=m</div><div class='ctx'> CONFIG_INPUT_SPARSEKMAP=y</div><div class='ctx'> CONFIG_INPUT_MOUSEDEV=y</div><div class='ctx'> CONFIG_INPUT_MOUSEDEV_PSAUX=y</div><div class='hunk'>@@ -276,23 +268,20 @@ CONFIG_MEDIA_SUPPORT=m</div><div class='ctx'> CONFIG_MEDIA_USB_SUPPORT=y</div><div class='ctx'> CONFIG_USB_VIDEO_CLASS=m</div><div class='ctx'> CONFIG_DRM=y</div><div class='add'>+CONFIG_DRM_RADEON=m</div><div class='ctx'> CONFIG_DRM_AMDGPU=m</div><div class='ctx'> CONFIG_DRM_AMDGPU_SI=y</div><div class='ctx'> CONFIG_DRM_AMDGPU_CIK=y</div><div class='ctx'> CONFIG_DRM_AMDGPU_USERPTR=y</div><div class='ctx'> CONFIG_DRM_AMD_ACP=y</div><div class='del'>-CONFIG_DRM_AMD_DC=y</div><div class='ctx'> CONFIG_DRM_AMD_DC_SI=y</div><div class='ctx'> CONFIG_DRM_AST=m</div><div class='del'>-CONFIG_DRM_RADEON=m</div><div class='ctx'> CONFIG_DRM_QXL=y</div><div class='ctx'> CONFIG_DRM_VIRTIO_GPU=y</div><div class='ctx'> CONFIG_FB=y</div><div class='ctx'> CONFIG_FB_RADEON=y</div><div class='ctx'> CONFIG_LCD_CLASS_DEVICE=y</div><div class='ctx'> CONFIG_LCD_PLATFORM=m</div><div class='del'>-# CONFIG_VGA_CONSOLE is not set</div><div class='del'>-CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='ctx'> CONFIG_SOUND=y</div><div class='hunk'>@@ -303,8 +292,23 @@ CONFIG_SND_SEQ_DUMMY=m</div><div class='ctx'> CONFIG_SND_HDA_INTEL=m</div><div class='ctx'> CONFIG_SND_HDA_PATCH_LOADER=y</div><div class='ctx'> CONFIG_SND_HDA_CODEC_REALTEK=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_REALTEK_LIB=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC260=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC262=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC268=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC269=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC662=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC680=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC861VD=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC880=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_ALC882=m</div><div class='ctx'> CONFIG_SND_HDA_CODEC_SIGMATEL=m</div><div class='ctx'> CONFIG_SND_HDA_CODEC_HDMI=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_GENERIC=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_INTEL=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_ATI=m</div><div class='add'>+CONFIG_SND_HDA_CODEC_HDMI_NVIDIA=m</div><div class='ctx'> CONFIG_SND_HDA_CODEC_CONEXANT=m</div><div class='ctx'> # CONFIG_SND_USB is not set</div><div class='ctx'> CONFIG_HIDRAW=y</div><div class='hunk'>@@ -350,13 +354,11 @@ CONFIG_EXT3_FS_SECURITY=y</div><div class='ctx'> CONFIG_XFS_FS=y</div><div class='ctx'> CONFIG_XFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_QUOTA=y</div><div class='del'>-# CONFIG_PRINT_QUOTA_WARNING is not set</div><div class='ctx'> CONFIG_QFMT_V1=m</div><div class='ctx'> CONFIG_QFMT_V2=m</div><div class='ctx'> CONFIG_AUTOFS_FS=y</div><div class='ctx'> CONFIG_FUSE_FS=m</div><div class='ctx'> CONFIG_VIRTIO_FS=m</div><div class='del'>-CONFIG_NETFS_SUPPORT=m</div><div class='ctx'> CONFIG_FSCACHE=y</div><div class='ctx'> CONFIG_ISO9660_FS=m</div><div class='ctx'> CONFIG_JOLIET=y</div><div class='hunk'>@@ -391,23 +393,21 @@ CONFIG_SECURITY_NETWORK=y</div><div class='ctx'> CONFIG_SECURITY_PATH=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_BOOTPARAM=y</div><div class='del'>-CONFIG_SECURITY_SELINUX_DISABLE=y</div><div class='ctx'> CONFIG_DEFAULT_SECURITY_DAC=y</div><div class='del'>-CONFIG_CRYPTO_HMAC=y</div><div class='del'>-CONFIG_CRYPTO_MD5=y</div><div class='del'>-CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='add'>+CONFIG_CRYPTO_HMAC=y</div><div class='add'>+CONFIG_CRYPTO_MD5=y</div><div class='add'>+CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_SCHED_DEBUG is not set</div><div class='del'>-# CONFIG_DEBUG_PREEMPT is not set</div><div class='ctx'> CONFIG_FUNCTION_TRACER=y</div><div class='ctx'> CONFIG_FTRACE_SYSCALLS=y</div><div class='ctx'> CONFIG_CMDLINE_BOOL=y</div><div class='head'>diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig<br/>index 4390d30206d9..9fcbac829920 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/malta_defconfig</a></div><div class='hunk'>@@ -80,7 +80,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HELPER=m</div><div class='hunk'>@@ -190,7 +189,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -347,7 +345,6 @@ CONFIG_CRAMFS=m</div><div class='ctx'> CONFIG_VXFS_FS=m</div><div class='ctx'> CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='head'>diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig<br/>index d63d8be8cb50..19102386a81c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_kvm_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_kvm_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_kvm_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/malta_kvm_defconfig</a></div><div class='hunk'>@@ -84,7 +84,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HELPER=m</div><div class='hunk'>@@ -194,7 +193,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -354,7 +352,6 @@ CONFIG_CRAMFS=m</div><div class='ctx'> CONFIG_VXFS_FS=m</div><div class='ctx'> CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='head'>diff --git a/arch/mips/configs/malta_qemu_32r6_defconfig b/arch/mips/configs/malta_qemu_32r6_defconfig<br/>index b21f48863d81..1b98f6945c2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_qemu_32r6_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/malta_qemu_32r6_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/malta_qemu_32r6_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/malta_qemu_32r6_defconfig</a></div><div class='hunk'>@@ -64,7 +64,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='head'>diff --git a/arch/mips/configs/maltaaprp_defconfig b/arch/mips/configs/maltaaprp_defconfig<br/>index ecfa8a396c33..7b8905cb3400 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaaprp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaaprp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaaprp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/maltaaprp_defconfig</a></div><div class='hunk'>@@ -66,7 +66,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='head'>diff --git a/arch/mips/configs/maltasmvp_defconfig b/arch/mips/configs/maltasmvp_defconfig<br/>index 5cb4f262a4ea..8249f6a51895 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltasmvp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltasmvp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltasmvp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/maltasmvp_defconfig</a></div><div class='hunk'>@@ -67,7 +67,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='head'>diff --git a/arch/mips/configs/maltasmvp_eva_defconfig b/arch/mips/configs/maltasmvp_eva_defconfig<br/>index 5e1498296782..21cb37668763 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltasmvp_eva_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltasmvp_eva_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltasmvp_eva_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/maltasmvp_eva_defconfig</a></div><div class='hunk'>@@ -68,7 +68,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='head'>diff --git a/arch/mips/configs/maltaup_defconfig b/arch/mips/configs/maltaup_defconfig<br/>index c8594505d676..3df9cd669683 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaup_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaup_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaup_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/maltaup_defconfig</a></div><div class='hunk'>@@ -65,7 +65,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='head'>diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig<br/>index 338bb6544a93..1dd07c9d1812 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaup_xpa_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/maltaup_xpa_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/maltaup_xpa_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/maltaup_xpa_defconfig</a></div><div class='hunk'>@@ -82,7 +82,6 @@ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HELPER=m</div><div class='hunk'>@@ -191,7 +190,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -353,7 +351,6 @@ CONFIG_CRAMFS=m</div><div class='ctx'> CONFIG_VXFS_FS=m</div><div class='ctx'> CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='head'>diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig<br/>index 935585d8bb26..2707ab134639 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/mtx1_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/mtx1_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/mtx1_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/mtx1_defconfig</a></div><div class='hunk'>@@ -130,7 +130,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=y</div><div class='hunk'>@@ -162,7 +161,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -664,7 +662,7 @@ CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='head'>diff --git a/arch/mips/configs/omega2p_defconfig b/arch/mips/configs/omega2p_defconfig<br/>index 7c1c1b974d8f..e2bcdfd290a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/omega2p_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/omega2p_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/omega2p_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/omega2p_defconfig</a></div><div class='hunk'>@@ -61,6 +61,7 @@ CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='add'>+CONFIG_CLK_MTMIPS=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_MEMORY=y</div><div class='ctx'> CONFIG_PHY_RALINK_USB=y</div><div class='hunk'>@@ -110,7 +111,6 @@ CONFIG_NLS_KOI8_U=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig<br/>index 517f1b060bf4..30d18b084cda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rb532_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rb532_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rb532_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/rb532_defconfig</a></div><div class='hunk'>@@ -56,7 +56,6 @@ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_TRACE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_LIMIT=y</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y</div><div class='hunk'>@@ -77,7 +76,6 @@ CONFIG_NET_SCH_CBQ=m</div><div class='ctx'> CONFIG_NET_SCH_PRIO=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -154,7 +152,6 @@ CONFIG_JFFS2_FS=y</div><div class='ctx'> CONFIG_JFFS2_SUMMARY=y</div><div class='ctx'> CONFIG_JFFS2_COMPRESSION_OPTIONS=y</div><div class='ctx'> CONFIG_SQUASHFS=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='head'>diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig<br/>index 08e1c1f2f4de..39a2419e1f3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rm200_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rm200_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rm200_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/rm200_defconfig</a></div><div class='hunk'>@@ -64,7 +64,6 @@ CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNMARK=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DSCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='hunk'>@@ -143,7 +142,6 @@ CONFIG_NET_SCH_GRED=m</div><div class='ctx'> CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -336,7 +334,6 @@ CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_HPFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=m</div><div class='ctx'> CONFIG_NFSD=m</div><div class='head'>diff --git a/arch/mips/configs/rt305x_defconfig b/arch/mips/configs/rt305x_defconfig<br/>index 332f9094e847..8f9701efef19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rt305x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/rt305x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/rt305x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/rt305x_defconfig</a></div><div class='hunk'>@@ -128,8 +128,6 @@ CONFIG_SQUASHFS=y</div><div class='ctx'> # CONFIG_SQUASHFS_ZLIB is not set</div><div class='ctx'> CONFIG_SQUASHFS_XZ=y</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='del'>-CONFIG_CRC32_SARWATE=y</div><div class='ctx'> # CONFIG_XZ_DEC_X86 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_POWERPC is not set</div><div class='ctx'> # CONFIG_XZ_DEC_IA64 is not set</div><div class='head'>diff --git a/arch/mips/configs/sb1250_swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig<br/>index ce855b644bb0..ae2afff00e01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/sb1250_swarm_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/sb1250_swarm_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/sb1250_swarm_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/sb1250_swarm_defconfig</a></div><div class='hunk'>@@ -99,4 +99,3 @@ CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='head'>diff --git a/arch/mips/configs/vocore2_defconfig b/arch/mips/configs/vocore2_defconfig<br/>index 7c8ebb1b56da..2a9a9b12847d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/vocore2_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/vocore2_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/vocore2_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/vocore2_defconfig</a></div><div class='hunk'>@@ -61,6 +61,7 @@ CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='add'>+CONFIG_CLK_MTMIPS=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> CONFIG_MEMORY=y</div><div class='ctx'> CONFIG_PHY_RALINK_USB=y</div><div class='hunk'>@@ -110,7 +111,6 @@ CONFIG_NLS_KOI8_U=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/mips/configs/xway_defconfig b/arch/mips/configs/xway_defconfig<br/>index 08c0aa03fd56..aae8497b6872 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/xway_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/configs/xway_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/configs/xway_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/configs/xway_defconfig</a></div><div class='hunk'>@@ -140,8 +140,6 @@ CONFIG_SQUASHFS=y</div><div class='ctx'> # CONFIG_SQUASHFS_ZLIB is not set</div><div class='ctx'> CONFIG_SQUASHFS_XZ=y</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='del'>-CONFIG_CRC32_SARWATE=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/mips/crypto/Kconfig b/arch/mips/crypto/Kconfig<br/>index 9003a5c1e879..6a5bd5074867 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/crypto/Kconfig</a></div><div class='hunk'>@@ -2,73 +2,4 @@</div><div class='ctx'> </div><div class='ctx'> menu "Accelerated Cryptographic Algorithms for CPU (mips)"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CRC32_MIPS</div><div class='del'>-	tristate "CRC32c and CRC32"</div><div class='del'>-	depends on MIPS_CRC_SUPPORT</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC32c and CRC32 CRC algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: mips</div><div class='del'>-</div><div class='del'>-config CRYPTO_POLY1305_MIPS</div><div class='del'>-	tristate "Hash functions: Poly1305"</div><div class='del'>-	depends on MIPS</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips</div><div class='del'>-</div><div class='del'>-config CRYPTO_MD5_OCTEON</div><div class='del'>-	tristate "Digests: MD5 (OCTEON)"</div><div class='del'>-	depends on CPU_CAVIUM_OCTEON</div><div class='del'>-	select CRYPTO_MD5</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  MD5 message digest algorithm (RFC1321)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips OCTEON using crypto instructions, when available</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_OCTEON</div><div class='del'>-	tristate "Hash functions: SHA-1 (OCTEON)"</div><div class='del'>-	depends on CPU_CAVIUM_OCTEON</div><div class='del'>-	select CRYPTO_SHA1</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips OCTEON</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA256_OCTEON</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (OCTEON)"</div><div class='del'>-	depends on CPU_CAVIUM_OCTEON</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips OCTEON using crypto instructions, when available</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA512_OCTEON</div><div class='del'>-	tristate "Hash functions: SHA-384 and SHA-512 (OCTEON)"</div><div class='del'>-	depends on CPU_CAVIUM_OCTEON</div><div class='del'>-	select CRYPTO_SHA512</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-384 and SHA-512 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips OCTEON using crypto instructions, when available</div><div class='del'>-</div><div class='del'>-config CRYPTO_CHACHA_MIPS</div><div class='del'>-	tristate "Ciphers: ChaCha20, XChaCha20, XChaCha12 (MIPS32r2)"</div><div class='del'>-	depends on CPU_MIPS32_R2</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: MIPS32r2</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/mips/crypto/Makefile b/arch/mips/crypto/Makefile<br/>index 5e4105cccf9f..5adb631a69c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/crypto/Makefile</a></div><div class='hunk'>@@ -3,22 +3,3 @@</div><div class='ctx'> # Makefile for MIPS crypto files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32-mips.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o</div><div class='del'>-chacha-mips-y := chacha-core.o chacha-glue.o</div><div class='del'>-AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o</div><div class='del'>-poly1305-mips-y := poly1305-core.o poly1305-glue.o</div><div class='del'>-</div><div class='del'>-perlasm-flavour-$(CONFIG_32BIT) := o32</div><div class='del'>-perlasm-flavour-$(CONFIG_64BIT) := 64</div><div class='del'>-</div><div class='del'>-quiet_cmd_perlasm = PERLASM $@</div><div class='del'>-      cmd_perlasm = $(PERL) $(&lt;) $(perlasm-flavour-y) $(@)</div><div class='del'>-</div><div class='del'>-$(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE</div><div class='del'>-	$(call if_changed,perlasm)</div><div class='del'>-</div><div class='del'>-targets += poly1305-core.S</div><div class='head'>diff --git a/arch/mips/crypto/chacha-core.S b/arch/mips/crypto/chacha-core.S<br/>deleted file mode 100644<br/>index 5755f69cfe00..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/chacha-core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/chacha-core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,497 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 OR MIT */</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2016-2018 René van Dorst &lt;opensource@vdorst.com&gt;. All Rights Reserved.</div><div class='del'>- * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MASK_U32		0x3c</div><div class='del'>-#define CHACHA20_BLOCK_SIZE	64</div><div class='del'>-#define STACK_SIZE		32</div><div class='del'>-</div><div class='del'>-#define X0	$t0</div><div class='del'>-#define X1	$t1</div><div class='del'>-#define X2	$t2</div><div class='del'>-#define X3	$t3</div><div class='del'>-#define X4	$t4</div><div class='del'>-#define X5	$t5</div><div class='del'>-#define X6	$t6</div><div class='del'>-#define X7	$t7</div><div class='del'>-#define X8	$t8</div><div class='del'>-#define X9	$t9</div><div class='del'>-#define X10	$v1</div><div class='del'>-#define X11	$s6</div><div class='del'>-#define X12	$s5</div><div class='del'>-#define X13	$s4</div><div class='del'>-#define X14	$s3</div><div class='del'>-#define X15	$s2</div><div class='del'>-/* Use regs which are overwritten on exit for Tx so we don't leak clear data. */</div><div class='del'>-#define T0	$s1</div><div class='del'>-#define T1	$s0</div><div class='del'>-#define T(n)	T ## n</div><div class='del'>-#define X(n)	X ## n</div><div class='del'>-</div><div class='del'>-/* Input arguments */</div><div class='del'>-#define STATE		$a0</div><div class='del'>-#define OUT		$a1</div><div class='del'>-#define IN		$a2</div><div class='del'>-#define BYTES		$a3</div><div class='del'>-</div><div class='del'>-/* Output argument */</div><div class='del'>-/* NONCE[0] is kept in a register and not in memory.</div><div class='del'>- * We don't want to touch original value in memory.</div><div class='del'>- * Must be incremented every loop iteration.</div><div class='del'>- */</div><div class='del'>-#define NONCE_0		$v0</div><div class='del'>-</div><div class='del'>-/* SAVED_X and SAVED_CA are set in the jump table.</div><div class='del'>- * Use regs which are overwritten on exit else we don't leak clear data.</div><div class='del'>- * They are used to handling the last bytes which are not multiple of 4.</div><div class='del'>- */</div><div class='del'>-#define SAVED_X		X15</div><div class='del'>-#define SAVED_CA	$s7</div><div class='del'>-</div><div class='del'>-#define IS_UNALIGNED	$s7</div><div class='del'>-</div><div class='del'>-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__</div><div class='del'>-#define MSB 0</div><div class='del'>-#define LSB 3</div><div class='del'>-#define ROTx rotl</div><div class='del'>-#define ROTR(n) rotr n, 24</div><div class='del'>-#define	CPU_TO_LE32(n) \</div><div class='del'>-	wsbh	n; \</div><div class='del'>-	rotr	n, 16;</div><div class='del'>-#else</div><div class='del'>-#define MSB 3</div><div class='del'>-#define LSB 0</div><div class='del'>-#define ROTx rotr</div><div class='del'>-#define CPU_TO_LE32(n)</div><div class='del'>-#define ROTR(n)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define FOR_EACH_WORD(x) \</div><div class='del'>-	x( 0); \</div><div class='del'>-	x( 1); \</div><div class='del'>-	x( 2); \</div><div class='del'>-	x( 3); \</div><div class='del'>-	x( 4); \</div><div class='del'>-	x( 5); \</div><div class='del'>-	x( 6); \</div><div class='del'>-	x( 7); \</div><div class='del'>-	x( 8); \</div><div class='del'>-	x( 9); \</div><div class='del'>-	x(10); \</div><div class='del'>-	x(11); \</div><div class='del'>-	x(12); \</div><div class='del'>-	x(13); \</div><div class='del'>-	x(14); \</div><div class='del'>-	x(15);</div><div class='del'>-</div><div class='del'>-#define FOR_EACH_WORD_REV(x) \</div><div class='del'>-	x(15); \</div><div class='del'>-	x(14); \</div><div class='del'>-	x(13); \</div><div class='del'>-	x(12); \</div><div class='del'>-	x(11); \</div><div class='del'>-	x(10); \</div><div class='del'>-	x( 9); \</div><div class='del'>-	x( 8); \</div><div class='del'>-	x( 7); \</div><div class='del'>-	x( 6); \</div><div class='del'>-	x( 5); \</div><div class='del'>-	x( 4); \</div><div class='del'>-	x( 3); \</div><div class='del'>-	x( 2); \</div><div class='del'>-	x( 1); \</div><div class='del'>-	x( 0);</div><div class='del'>-</div><div class='del'>-#define PLUS_ONE_0	 1</div><div class='del'>-#define PLUS_ONE_1	 2</div><div class='del'>-#define PLUS_ONE_2	 3</div><div class='del'>-#define PLUS_ONE_3	 4</div><div class='del'>-#define PLUS_ONE_4	 5</div><div class='del'>-#define PLUS_ONE_5	 6</div><div class='del'>-#define PLUS_ONE_6	 7</div><div class='del'>-#define PLUS_ONE_7	 8</div><div class='del'>-#define PLUS_ONE_8	 9</div><div class='del'>-#define PLUS_ONE_9	10</div><div class='del'>-#define PLUS_ONE_10	11</div><div class='del'>-#define PLUS_ONE_11	12</div><div class='del'>-#define PLUS_ONE_12	13</div><div class='del'>-#define PLUS_ONE_13	14</div><div class='del'>-#define PLUS_ONE_14	15</div><div class='del'>-#define PLUS_ONE_15	16</div><div class='del'>-#define PLUS_ONE(x)	PLUS_ONE_ ## x</div><div class='del'>-#define _CONCAT3(a,b,c)	a ## b ## c</div><div class='del'>-#define CONCAT3(a,b,c)	_CONCAT3(a,b,c)</div><div class='del'>-</div><div class='del'>-#define STORE_UNALIGNED(x) \</div><div class='del'>-CONCAT3(.Lchacha_mips_xor_unaligned_, PLUS_ONE(x), _b: ;) \</div><div class='del'>-	.if (x != 12); \</div><div class='del'>-		lw	T0, (x*4)(STATE); \</div><div class='del'>-	.endif; \</div><div class='del'>-	lwl	T1, (x*4)+MSB ## (IN); \</div><div class='del'>-	lwr	T1, (x*4)+LSB ## (IN); \</div><div class='del'>-	.if (x == 12); \</div><div class='del'>-		addu	X ## x, NONCE_0; \</div><div class='del'>-	.else; \</div><div class='del'>-		addu	X ## x, T0; \</div><div class='del'>-	.endif; \</div><div class='del'>-	CPU_TO_LE32(X ## x); \</div><div class='del'>-	xor	X ## x, T1; \</div><div class='del'>-	swl	X ## x, (x*4)+MSB ## (OUT); \</div><div class='del'>-	swr	X ## x, (x*4)+LSB ## (OUT);</div><div class='del'>-</div><div class='del'>-#define STORE_ALIGNED(x) \</div><div class='del'>-CONCAT3(.Lchacha_mips_xor_aligned_, PLUS_ONE(x), _b: ;) \</div><div class='del'>-	.if (x != 12); \</div><div class='del'>-		lw	T0, (x*4)(STATE); \</div><div class='del'>-	.endif; \</div><div class='del'>-	lw	T1, (x*4) ## (IN); \</div><div class='del'>-	.if (x == 12); \</div><div class='del'>-		addu	X ## x, NONCE_0; \</div><div class='del'>-	.else; \</div><div class='del'>-		addu	X ## x, T0; \</div><div class='del'>-	.endif; \</div><div class='del'>-	CPU_TO_LE32(X ## x); \</div><div class='del'>-	xor	X ## x, T1; \</div><div class='del'>-	sw	X ## x, (x*4) ## (OUT);</div><div class='del'>-</div><div class='del'>-/* Jump table macro.</div><div class='del'>- * Used for setup and handling the last bytes, which are not multiple of 4.</div><div class='del'>- * X15 is free to store Xn</div><div class='del'>- * Every jumptable entry must be equal in size.</div><div class='del'>- */</div><div class='del'>-#define JMPTBL_ALIGNED(x) \</div><div class='del'>-.Lchacha_mips_jmptbl_aligned_ ## x: ; \</div><div class='del'>-	.set	noreorder; \</div><div class='del'>-	b	.Lchacha_mips_xor_aligned_ ## x ## _b; \</div><div class='del'>-	.if (x == 12); \</div><div class='del'>-		addu	SAVED_X, X ## x, NONCE_0; \</div><div class='del'>-	.else; \</div><div class='del'>-		addu	SAVED_X, X ## x, SAVED_CA; \</div><div class='del'>-	.endif; \</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-#define JMPTBL_UNALIGNED(x) \</div><div class='del'>-.Lchacha_mips_jmptbl_unaligned_ ## x: ; \</div><div class='del'>-	.set	noreorder; \</div><div class='del'>-	b	.Lchacha_mips_xor_unaligned_ ## x ## _b; \</div><div class='del'>-	.if (x == 12); \</div><div class='del'>-		addu	SAVED_X, X ## x, NONCE_0; \</div><div class='del'>-	.else; \</div><div class='del'>-		addu	SAVED_X, X ## x, SAVED_CA; \</div><div class='del'>-	.endif; \</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-#define AXR(A, B, C, D,  K, L, M, N,  V, W, Y, Z,  S) \</div><div class='del'>-	addu	X(A), X(K); \</div><div class='del'>-	addu	X(B), X(L); \</div><div class='del'>-	addu	X(C), X(M); \</div><div class='del'>-	addu	X(D), X(N); \</div><div class='del'>-	xor	X(V), X(A); \</div><div class='del'>-	xor	X(W), X(B); \</div><div class='del'>-	xor	X(Y), X(C); \</div><div class='del'>-	xor	X(Z), X(D); \</div><div class='del'>-	rotl	X(V), S;    \</div><div class='del'>-	rotl	X(W), S;    \</div><div class='del'>-	rotl	X(Y), S;    \</div><div class='del'>-	rotl	X(Z), S;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.set	reorder</div><div class='del'>-.set	noat</div><div class='del'>-.globl	chacha_crypt_arch</div><div class='del'>-.ent	chacha_crypt_arch</div><div class='del'>-chacha_crypt_arch:</div><div class='del'>-	.frame	$sp, STACK_SIZE, $ra</div><div class='del'>-</div><div class='del'>-	/* Load number of rounds */</div><div class='del'>-	lw	$at, 16($sp)</div><div class='del'>-</div><div class='del'>-	addiu	$sp, -STACK_SIZE</div><div class='del'>-</div><div class='del'>-	/* Return bytes = 0. */</div><div class='del'>-	beqz	BYTES, .Lchacha_mips_end</div><div class='del'>-</div><div class='del'>-	lw	NONCE_0, 48(STATE)</div><div class='del'>-</div><div class='del'>-	/* Save s0-s7 */</div><div class='del'>-	sw	$s0,  0($sp)</div><div class='del'>-	sw	$s1,  4($sp)</div><div class='del'>-	sw	$s2,  8($sp)</div><div class='del'>-	sw	$s3, 12($sp)</div><div class='del'>-	sw	$s4, 16($sp)</div><div class='del'>-	sw	$s5, 20($sp)</div><div class='del'>-	sw	$s6, 24($sp)</div><div class='del'>-	sw	$s7, 28($sp)</div><div class='del'>-</div><div class='del'>-	/* Test IN or OUT is unaligned.</div><div class='del'>-	 * IS_UNALIGNED = ( IN | OUT ) &amp; 0x00000003</div><div class='del'>-	 */</div><div class='del'>-	or	IS_UNALIGNED, IN, OUT</div><div class='del'>-	andi	IS_UNALIGNED, 0x3</div><div class='del'>-</div><div class='del'>-	b	.Lchacha_rounds_start</div><div class='del'>-</div><div class='del'>-.align 4</div><div class='del'>-.Loop_chacha_rounds:</div><div class='del'>-	addiu	IN,  CHACHA20_BLOCK_SIZE</div><div class='del'>-	addiu	OUT, CHACHA20_BLOCK_SIZE</div><div class='del'>-	addiu	NONCE_0, 1</div><div class='del'>-</div><div class='del'>-.Lchacha_rounds_start:</div><div class='del'>-	lw	X0,  0(STATE)</div><div class='del'>-	lw	X1,  4(STATE)</div><div class='del'>-	lw	X2,  8(STATE)</div><div class='del'>-	lw	X3,  12(STATE)</div><div class='del'>-</div><div class='del'>-	lw	X4,  16(STATE)</div><div class='del'>-	lw	X5,  20(STATE)</div><div class='del'>-	lw	X6,  24(STATE)</div><div class='del'>-	lw	X7,  28(STATE)</div><div class='del'>-	lw	X8,  32(STATE)</div><div class='del'>-	lw	X9,  36(STATE)</div><div class='del'>-	lw	X10, 40(STATE)</div><div class='del'>-	lw	X11, 44(STATE)</div><div class='del'>-</div><div class='del'>-	move	X12, NONCE_0</div><div class='del'>-	lw	X13, 52(STATE)</div><div class='del'>-	lw	X14, 56(STATE)</div><div class='del'>-	lw	X15, 60(STATE)</div><div class='del'>-</div><div class='del'>-.Loop_chacha_xor_rounds:</div><div class='del'>-	addiu	$at, -2</div><div class='del'>-	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15, 16);</div><div class='del'>-	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7, 12);</div><div class='del'>-	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15,  8);</div><div class='del'>-	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7,  7);</div><div class='del'>-	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14, 16);</div><div class='del'>-	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4, 12);</div><div class='del'>-	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14,  8);</div><div class='del'>-	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4,  7);</div><div class='del'>-	bnez	$at, .Loop_chacha_xor_rounds</div><div class='del'>-</div><div class='del'>-	addiu	BYTES, -(CHACHA20_BLOCK_SIZE)</div><div class='del'>-</div><div class='del'>-	/* Is data src/dst unaligned? Jump */</div><div class='del'>-	bnez	IS_UNALIGNED, .Loop_chacha_unaligned</div><div class='del'>-</div><div class='del'>-	/* Set number rounds here to fill delayslot. */</div><div class='del'>-	lw	$at, (STACK_SIZE+16)($sp)</div><div class='del'>-</div><div class='del'>-	/* BYTES &lt; 0, it has no full block. */</div><div class='del'>-	bltz	BYTES, .Lchacha_mips_no_full_block_aligned</div><div class='del'>-</div><div class='del'>-	FOR_EACH_WORD_REV(STORE_ALIGNED)</div><div class='del'>-</div><div class='del'>-	/* BYTES &gt; 0? Loop again. */</div><div class='del'>-	bgtz	BYTES, .Loop_chacha_rounds</div><div class='del'>-</div><div class='del'>-	/* Place this here to fill delay slot */</div><div class='del'>-	addiu	NONCE_0, 1</div><div class='del'>-</div><div class='del'>-	/* BYTES &lt; 0? Handle last bytes */</div><div class='del'>-	bltz	BYTES, .Lchacha_mips_xor_bytes</div><div class='del'>-</div><div class='del'>-.Lchacha_mips_xor_done:</div><div class='del'>-	/* Restore used registers */</div><div class='del'>-	lw	$s0,  0($sp)</div><div class='del'>-	lw	$s1,  4($sp)</div><div class='del'>-	lw	$s2,  8($sp)</div><div class='del'>-	lw	$s3, 12($sp)</div><div class='del'>-	lw	$s4, 16($sp)</div><div class='del'>-	lw	$s5, 20($sp)</div><div class='del'>-	lw	$s6, 24($sp)</div><div class='del'>-	lw	$s7, 28($sp)</div><div class='del'>-</div><div class='del'>-	/* Write NONCE_0 back to right location in state */</div><div class='del'>-	sw	NONCE_0, 48(STATE)</div><div class='del'>-</div><div class='del'>-.Lchacha_mips_end:</div><div class='del'>-	addiu	$sp, STACK_SIZE</div><div class='del'>-	jr	$ra</div><div class='del'>-</div><div class='del'>-.Lchacha_mips_no_full_block_aligned:</div><div class='del'>-	/* Restore the offset on BYTES */</div><div class='del'>-	addiu	BYTES, CHACHA20_BLOCK_SIZE</div><div class='del'>-</div><div class='del'>-	/* Get number of full WORDS */</div><div class='del'>-	andi	$at, BYTES, MASK_U32</div><div class='del'>-</div><div class='del'>-	/* Load upper half of jump table addr */</div><div class='del'>-	lui	T0, %hi(.Lchacha_mips_jmptbl_aligned_0)</div><div class='del'>-</div><div class='del'>-	/* Calculate lower half jump table offset */</div><div class='del'>-	ins	T0, $at, 1, 6</div><div class='del'>-</div><div class='del'>-	/* Add offset to STATE */</div><div class='del'>-	addu	T1, STATE, $at</div><div class='del'>-</div><div class='del'>-	/* Add lower half jump table addr */</div><div class='del'>-	addiu	T0, %lo(.Lchacha_mips_jmptbl_aligned_0)</div><div class='del'>-</div><div class='del'>-	/* Read value from STATE */</div><div class='del'>-	lw	SAVED_CA, 0(T1)</div><div class='del'>-</div><div class='del'>-	/* Store remaining bytecounter as negative value */</div><div class='del'>-	subu	BYTES, $at, BYTES</div><div class='del'>-</div><div class='del'>-	jr	T0</div><div class='del'>-</div><div class='del'>-	/* Jump table */</div><div class='del'>-	FOR_EACH_WORD(JMPTBL_ALIGNED)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.Loop_chacha_unaligned:</div><div class='del'>-	/* Set number rounds here to fill delayslot. */</div><div class='del'>-	lw	$at, (STACK_SIZE+16)($sp)</div><div class='del'>-</div><div class='del'>-	/* BYTES &gt; 0, it has no full block. */</div><div class='del'>-	bltz	BYTES, .Lchacha_mips_no_full_block_unaligned</div><div class='del'>-</div><div class='del'>-	FOR_EACH_WORD_REV(STORE_UNALIGNED)</div><div class='del'>-</div><div class='del'>-	/* BYTES &gt; 0? Loop again. */</div><div class='del'>-	bgtz	BYTES, .Loop_chacha_rounds</div><div class='del'>-</div><div class='del'>-	/* Write NONCE_0 back to right location in state */</div><div class='del'>-	sw	NONCE_0, 48(STATE)</div><div class='del'>-</div><div class='del'>-	.set noreorder</div><div class='del'>-	/* Fall through to byte handling */</div><div class='del'>-	bgez	BYTES, .Lchacha_mips_xor_done</div><div class='del'>-.Lchacha_mips_xor_unaligned_0_b:</div><div class='del'>-.Lchacha_mips_xor_aligned_0_b:</div><div class='del'>-	/* Place this here to fill delay slot */</div><div class='del'>-	addiu	NONCE_0, 1</div><div class='del'>-	.set reorder</div><div class='del'>-</div><div class='del'>-.Lchacha_mips_xor_bytes:</div><div class='del'>-	addu	IN, $at</div><div class='del'>-	addu	OUT, $at</div><div class='del'>-	/* First byte */</div><div class='del'>-	lbu	T1, 0(IN)</div><div class='del'>-	addiu	$at, BYTES, 1</div><div class='del'>-	CPU_TO_LE32(SAVED_X)</div><div class='del'>-	ROTR(SAVED_X)</div><div class='del'>-	xor	T1, SAVED_X</div><div class='del'>-	sb	T1, 0(OUT)</div><div class='del'>-	beqz	$at, .Lchacha_mips_xor_done</div><div class='del'>-	/* Second byte */</div><div class='del'>-	lbu	T1, 1(IN)</div><div class='del'>-	addiu	$at, BYTES, 2</div><div class='del'>-	ROTx	SAVED_X, 8</div><div class='del'>-	xor	T1, SAVED_X</div><div class='del'>-	sb	T1, 1(OUT)</div><div class='del'>-	beqz	$at, .Lchacha_mips_xor_done</div><div class='del'>-	/* Third byte */</div><div class='del'>-	lbu	T1, 2(IN)</div><div class='del'>-	ROTx	SAVED_X, 8</div><div class='del'>-	xor	T1, SAVED_X</div><div class='del'>-	sb	T1, 2(OUT)</div><div class='del'>-	b	.Lchacha_mips_xor_done</div><div class='del'>-</div><div class='del'>-.Lchacha_mips_no_full_block_unaligned:</div><div class='del'>-	/* Restore the offset on BYTES */</div><div class='del'>-	addiu	BYTES, CHACHA20_BLOCK_SIZE</div><div class='del'>-</div><div class='del'>-	/* Get number of full WORDS */</div><div class='del'>-	andi	$at, BYTES, MASK_U32</div><div class='del'>-</div><div class='del'>-	/* Load upper half of jump table addr */</div><div class='del'>-	lui	T0, %hi(.Lchacha_mips_jmptbl_unaligned_0)</div><div class='del'>-</div><div class='del'>-	/* Calculate lower half jump table offset */</div><div class='del'>-	ins	T0, $at, 1, 6</div><div class='del'>-</div><div class='del'>-	/* Add offset to STATE */</div><div class='del'>-	addu	T1, STATE, $at</div><div class='del'>-</div><div class='del'>-	/* Add lower half jump table addr */</div><div class='del'>-	addiu	T0, %lo(.Lchacha_mips_jmptbl_unaligned_0)</div><div class='del'>-</div><div class='del'>-	/* Read value from STATE */</div><div class='del'>-	lw	SAVED_CA, 0(T1)</div><div class='del'>-</div><div class='del'>-	/* Store remaining bytecounter as negative value */</div><div class='del'>-	subu	BYTES, $at, BYTES</div><div class='del'>-</div><div class='del'>-	jr	T0</div><div class='del'>-</div><div class='del'>-	/* Jump table */</div><div class='del'>-	FOR_EACH_WORD(JMPTBL_UNALIGNED)</div><div class='del'>-.end chacha_crypt_arch</div><div class='del'>-.set at</div><div class='del'>-</div><div class='del'>-/* Input arguments</div><div class='del'>- * STATE	$a0</div><div class='del'>- * OUT		$a1</div><div class='del'>- * NROUND	$a2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef X12</div><div class='del'>-#undef X13</div><div class='del'>-#undef X14</div><div class='del'>-#undef X15</div><div class='del'>-</div><div class='del'>-#define X12	$a3</div><div class='del'>-#define X13	$at</div><div class='del'>-#define X14	$v0</div><div class='del'>-#define X15	STATE</div><div class='del'>-</div><div class='del'>-.set noat</div><div class='del'>-.globl	hchacha_block_arch</div><div class='del'>-.ent	hchacha_block_arch</div><div class='del'>-hchacha_block_arch:</div><div class='del'>-	.frame	$sp, STACK_SIZE, $ra</div><div class='del'>-</div><div class='del'>-	addiu	$sp, -STACK_SIZE</div><div class='del'>-</div><div class='del'>-	/* Save X11(s6) */</div><div class='del'>-	sw	X11, 0($sp)</div><div class='del'>-</div><div class='del'>-	lw	X0,  0(STATE)</div><div class='del'>-	lw	X1,  4(STATE)</div><div class='del'>-	lw	X2,  8(STATE)</div><div class='del'>-	lw	X3,  12(STATE)</div><div class='del'>-	lw	X4,  16(STATE)</div><div class='del'>-	lw	X5,  20(STATE)</div><div class='del'>-	lw	X6,  24(STATE)</div><div class='del'>-	lw	X7,  28(STATE)</div><div class='del'>-	lw	X8,  32(STATE)</div><div class='del'>-	lw	X9,  36(STATE)</div><div class='del'>-	lw	X10, 40(STATE)</div><div class='del'>-	lw	X11, 44(STATE)</div><div class='del'>-	lw	X12, 48(STATE)</div><div class='del'>-	lw	X13, 52(STATE)</div><div class='del'>-	lw	X14, 56(STATE)</div><div class='del'>-	lw	X15, 60(STATE)</div><div class='del'>-</div><div class='del'>-.Loop_hchacha_xor_rounds:</div><div class='del'>-	addiu	$a2, -2</div><div class='del'>-	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15, 16);</div><div class='del'>-	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7, 12);</div><div class='del'>-	AXR( 0, 1, 2, 3,  4, 5, 6, 7, 12,13,14,15,  8);</div><div class='del'>-	AXR( 8, 9,10,11, 12,13,14,15,  4, 5, 6, 7,  7);</div><div class='del'>-	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14, 16);</div><div class='del'>-	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4, 12);</div><div class='del'>-	AXR( 0, 1, 2, 3,  5, 6, 7, 4, 15,12,13,14,  8);</div><div class='del'>-	AXR(10,11, 8, 9, 15,12,13,14,  5, 6, 7, 4,  7);</div><div class='del'>-	bnez	$a2, .Loop_hchacha_xor_rounds</div><div class='del'>-</div><div class='del'>-	/* Restore used register */</div><div class='del'>-	lw	X11, 0($sp)</div><div class='del'>-</div><div class='del'>-	sw	X0,  0(OUT)</div><div class='del'>-	sw	X1,  4(OUT)</div><div class='del'>-	sw	X2,  8(OUT)</div><div class='del'>-	sw	X3,  12(OUT)</div><div class='del'>-	sw	X12, 16(OUT)</div><div class='del'>-	sw	X13, 20(OUT)</div><div class='del'>-	sw	X14, 24(OUT)</div><div class='del'>-	sw	X15, 28(OUT)</div><div class='del'>-</div><div class='del'>-	addiu	$sp, STACK_SIZE</div><div class='del'>-	jr	$ra</div><div class='del'>-.end hchacha_block_arch</div><div class='del'>-.set at</div><div class='head'>diff --git a/arch/mips/crypto/chacha-glue.c b/arch/mips/crypto/chacha-glue.c<br/>deleted file mode 100644<br/>index d1fd23e6ef84..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/chacha-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/chacha-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,152 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * MIPS accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				  unsigned int bytes, int nrounds);</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-asmlinkage void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds);</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	chacha_init_generic(state, key, iv);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_init_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_mips_stream_xor(struct skcipher_request *req,</div><div class='del'>-				  const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		chacha_crypt(state, walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-			     nbytes, ctx-&gt;nrounds);</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_mips(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_mips_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_mips(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	hchacha_block(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_mips_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_mips,</div><div class='del'>-		.decrypt		= chacha_mips,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_mips,</div><div class='del'>-		.decrypt		= xchacha_mips,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_mips,</div><div class='del'>-		.decrypt		= xchacha_mips,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER))</div><div class='del'>-		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (MIPS accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-mips");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-mips");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-mips");</div><div class='head'>diff --git a/arch/mips/crypto/crc32-mips.c b/arch/mips/crypto/crc32-mips.c<br/>deleted file mode 100644<br/>index a7a1d43a1b2c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/crc32-mips.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/crc32-mips.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,354 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * crc32-mips.c - CRC32 and CRC32C using optional MIPSr6 instructions</div><div class='del'>- *</div><div class='del'>- * Module based on arm64/crypto/crc32-arm.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 Linaro Ltd &lt;yazen.ghannam@linaro.org&gt;</div><div class='del'>- * Copyright (C) 2018 MIPS Tech, LLC</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;asm/mipsregs.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-</div><div class='del'>-enum crc_op_size {</div><div class='del'>-	b, h, w, d,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum crc_type {</div><div class='del'>-	crc32,</div><div class='del'>-	crc32c,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifndef TOOLCHAIN_SUPPORTS_CRC</div><div class='del'>-#define _ASM_SET_CRC(OP, SZ, TYPE)					  \</div><div class='del'>-_ASM_MACRO_3R(OP, rt, rs, rt2,						  \</div><div class='del'>-	".ifnc	\\rt, \\rt2\n\t"					  \</div><div class='del'>-	".error	\"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \</div><div class='del'>-	".endif\n\t"							  \</div><div class='del'>-	_ASM_INSN_IF_MIPS(0x7c00000f | (__rt &lt;&lt; 16) | (__rs &lt;&lt; 21) |	  \</div><div class='del'>-			  ((SZ) &lt;&lt;  6) | ((TYPE) &lt;&lt; 8))			  \</div><div class='del'>-	_ASM_INSN32_IF_MM(0x00000030 | (__rs &lt;&lt; 16) | (__rt &lt;&lt; 21) |	  \</div><div class='del'>-			  ((SZ) &lt;&lt; 14) | ((TYPE) &lt;&lt; 3)))</div><div class='del'>-#define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t"</div><div class='del'>-#else /* !TOOLCHAIN_SUPPORTS_CRC */</div><div class='del'>-#define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t"</div><div class='del'>-#define _ASM_UNSET_CRC(op, SZ, TYPE)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define __CRC32(crc, value, op, SZ, TYPE)		\</div><div class='del'>-do {							\</div><div class='del'>-	__asm__ __volatile__(				\</div><div class='del'>-		".set	push\n\t"			\</div><div class='del'>-		_ASM_SET_CRC(op, SZ, TYPE)		\</div><div class='del'>-		#op "	%0, %1, %0\n\t"			\</div><div class='del'>-		_ASM_UNSET_CRC(op, SZ, TYPE)		\</div><div class='del'>-		".set	pop"				\</div><div class='del'>-		: "+r" (crc)				\</div><div class='del'>-		: "r" (value));				\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define _CRC32_crc32b(crc, value)	__CRC32(crc, value, crc32b, 0, 0)</div><div class='del'>-#define _CRC32_crc32h(crc, value)	__CRC32(crc, value, crc32h, 1, 0)</div><div class='del'>-#define _CRC32_crc32w(crc, value)	__CRC32(crc, value, crc32w, 2, 0)</div><div class='del'>-#define _CRC32_crc32d(crc, value)	__CRC32(crc, value, crc32d, 3, 0)</div><div class='del'>-#define _CRC32_crc32cb(crc, value)	__CRC32(crc, value, crc32cb, 0, 1)</div><div class='del'>-#define _CRC32_crc32ch(crc, value)	__CRC32(crc, value, crc32ch, 1, 1)</div><div class='del'>-#define _CRC32_crc32cw(crc, value)	__CRC32(crc, value, crc32cw, 2, 1)</div><div class='del'>-#define _CRC32_crc32cd(crc, value)	__CRC32(crc, value, crc32cd, 3, 1)</div><div class='del'>-</div><div class='del'>-#define _CRC32(crc, value, size, op) \</div><div class='del'>-	_CRC32_##op##size(crc, value)</div><div class='del'>-</div><div class='del'>-#define CRC32(crc, value, size) \</div><div class='del'>-	_CRC32(crc, value, size, crc32)</div><div class='del'>-</div><div class='del'>-#define CRC32C(crc, value, size) \</div><div class='del'>-	_CRC32(crc, value, size, crc32c)</div><div class='del'>-</div><div class='del'>-static u32 crc32_mips_le_hw(u32 crc_, const u8 *p, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u32 crc = crc_;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_64BIT)) {</div><div class='del'>-		for (; len &gt;= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {</div><div class='del'>-			u64 value = get_unaligned_le64(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, d);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (len &amp; sizeof(u32)) {</div><div class='del'>-			u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, w);</div><div class='del'>-			p += sizeof(u32);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		for (; len &gt;= sizeof(u32); len -= sizeof(u32)) {</div><div class='del'>-			u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, w);</div><div class='del'>-			p += sizeof(u32);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u16)) {</div><div class='del'>-		u16 value = get_unaligned_le16(p);</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, h);</div><div class='del'>-		p += sizeof(u16);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u8)) {</div><div class='del'>-		u8 value = *p++;</div><div class='del'>-</div><div class='del'>-		CRC32(crc, value, b);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 crc32c_mips_le_hw(u32 crc_, const u8 *p, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u32 crc = crc_;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_64BIT)) {</div><div class='del'>-		for (; len &gt;= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {</div><div class='del'>-			u64 value = get_unaligned_le64(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, d);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (len &amp; sizeof(u32)) {</div><div class='del'>-			u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, w);</div><div class='del'>-			p += sizeof(u32);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		for (; len &gt;= sizeof(u32); len -= sizeof(u32)) {</div><div class='del'>-			u32 value = get_unaligned_le32(p);</div><div class='del'>-</div><div class='del'>-			CRC32(crc, value, w);</div><div class='del'>-			p += sizeof(u32);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u16)) {</div><div class='del'>-		u16 value = get_unaligned_le16(p);</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, h);</div><div class='del'>-		p += sizeof(u16);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; sizeof(u8)) {</div><div class='del'>-		u8 value = *p++;</div><div class='del'>-</div><div class='del'>-		CRC32C(crc, value, b);</div><div class='del'>-	}</div><div class='del'>-	return crc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CHKSUM_BLOCK_SIZE	1</div><div class='del'>-#define CHKSUM_DIGEST_SIZE	4</div><div class='del'>-</div><div class='del'>-struct chksum_ctx {</div><div class='del'>-	u32 key;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct chksum_desc_ctx {</div><div class='del'>-	u32 crc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int chksum_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = mctx-&gt;key;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Setting the seed allows arbitrary accumulators and flexible XOR policy</div><div class='del'>- * If your algorithm starts with ~0, then XOR with ~0 before you set</div><div class='del'>- * the seed.</div><div class='del'>- */</div><div class='del'>-static int chksum_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='del'>-			 unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	if (keylen != sizeof(mctx-&gt;key))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	mctx-&gt;key = get_unaligned_le32(key);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int length)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = crc32_mips_le_hw(ctx-&gt;crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int length)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;crc = crc32c_mips_le_hw(ctx-&gt;crc, data, length);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(ctx-&gt;crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	put_unaligned_le32(~ctx-&gt;crc, out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __chksum_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	put_unaligned_le32(crc32_mips_le_hw(crc, data, len), out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __chksumc_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	put_unaligned_le32(~crc32c_mips_le_hw(crc, data, len), out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return __chksum_finup(ctx-&gt;crc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return __chksumc_finup(ctx-&gt;crc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int length, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	return __chksum_finup(mctx-&gt;key, data, length, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksumc_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int length, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	return __chksumc_finup(mctx-&gt;key, data, length, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chksum_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	mctx-&gt;key = ~0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc32_alg = {</div><div class='del'>-	.digestsize		=	CHKSUM_DIGEST_SIZE,</div><div class='del'>-	.setkey			=	chksum_setkey,</div><div class='del'>-	.init			=	chksum_init,</div><div class='del'>-	.update			=	chksum_update,</div><div class='del'>-	.final			=	chksum_final,</div><div class='del'>-	.finup			=	chksum_finup,</div><div class='del'>-	.digest			=	chksum_digest,</div><div class='del'>-	.descsize		=	sizeof(struct chksum_desc_ctx),</div><div class='del'>-	.base			=	{</div><div class='del'>-		.cra_name		=	"crc32",</div><div class='del'>-		.cra_driver_name	=	"crc32-mips-hw",</div><div class='del'>-		.cra_priority		=	300,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-		.cra_blocksize		=	CHKSUM_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		=	sizeof(struct chksum_ctx),</div><div class='del'>-		.cra_module		=	THIS_MODULE,</div><div class='del'>-		.cra_init		=	chksum_cra_init,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct shash_alg crc32c_alg = {</div><div class='del'>-	.digestsize		=	CHKSUM_DIGEST_SIZE,</div><div class='del'>-	.setkey			=	chksum_setkey,</div><div class='del'>-	.init			=	chksum_init,</div><div class='del'>-	.update			=	chksumc_update,</div><div class='del'>-	.final			=	chksumc_final,</div><div class='del'>-	.finup			=	chksumc_finup,</div><div class='del'>-	.digest			=	chksumc_digest,</div><div class='del'>-	.descsize		=	sizeof(struct chksum_desc_ctx),</div><div class='del'>-	.base			=	{</div><div class='del'>-		.cra_name		=	"crc32c",</div><div class='del'>-		.cra_driver_name	=	"crc32c-mips-hw",</div><div class='del'>-		.cra_priority		=	300,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-		.cra_blocksize		=	CHKSUM_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		=	sizeof(struct chksum_ctx),</div><div class='del'>-		.cra_module		=	THIS_MODULE,</div><div class='del'>-		.cra_init		=	chksum_cra_init,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init crc32_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_shash(&amp;crc32_alg);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_shash(&amp;crc32c_alg);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		crypto_unregister_shash(&amp;crc32_alg);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc32_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;crc32_alg);</div><div class='del'>-	crypto_unregister_shash(&amp;crc32c_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Marcin Nowakowski &lt;marcin.nowakowski@mips.com");</div><div class='del'>-MODULE_DESCRIPTION("CRC32 and CRC32C using optional MIPS instructions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(MIPS_CRC32, crc32_mod_init);</div><div class='del'>-module_exit(crc32_mod_exit);</div><div class='head'>diff --git a/arch/mips/crypto/poly1305-glue.c b/arch/mips/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index c03ad0bbe69c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/poly1305-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,192 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for MIPS</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_init_mips(void *state, const u8 *key);</div><div class='del'>-asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_emit_mips(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_mips(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mips_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_mips(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	poly1305_blocks_mips(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_update(struct shash_desc *desc, const u8 *src,</div><div class='del'>-				unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			mips_poly1305_blocks(dctx, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		mips_poly1305_blocks(dctx, src, len, 1);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks_mips(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-					     POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		poly1305_blocks_mips(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-		src += len;</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks_mips(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_mips(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	*dctx = (struct poly1305_desc_ctx){};</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg mips_poly1305_alg = {</div><div class='del'>-	.init			= mips_poly1305_init,</div><div class='del'>-	.update			= mips_poly1305_update,</div><div class='del'>-	.final			= mips_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-mips",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mips_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shash(&amp;mips_poly1305_alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mips_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		crypto_unregister_shash(&amp;mips_poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mips_poly1305_mod_init);</div><div class='del'>-module_exit(mips_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 transform (MIPS accelerated");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-mips");</div><div class='head'>diff --git a/arch/mips/crypto/poly1305-mips.pl b/arch/mips/crypto/poly1305-mips.pl<br/>deleted file mode 100644<br/>index b05bab884ed2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/crypto/poly1305-mips.pl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/crypto/poly1305-mips.pl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1273 +0,0 @@</div><div class='del'>-#!/usr/bin/env perl</div><div class='del'>-# SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause</div><div class='del'>-#</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov, @dot-asm, originally for the OpenSSL</div><div class='del'>-# project.</div><div class='del'>-# ====================================================================</div><div class='del'>-</div><div class='del'>-# Poly1305 hash for MIPS.</div><div class='del'>-#</div><div class='del'>-# May 2016</div><div class='del'>-#</div><div class='del'>-# Numbers are cycles per processed byte with poly1305_blocks alone.</div><div class='del'>-#</div><div class='del'>-#		IALU/gcc</div><div class='del'>-# R1x000	~5.5/+130%	(big-endian)</div><div class='del'>-# Octeon II	2.50/+70%	(little-endian)</div><div class='del'>-#</div><div class='del'>-# March 2019</div><div class='del'>-#</div><div class='del'>-# Add 32-bit code path.</div><div class='del'>-#</div><div class='del'>-# October 2019</div><div class='del'>-#</div><div class='del'>-# Modulo-scheduling reduction allows to omit dependency chain at the</div><div class='del'>-# end of inner loop and improve performance. Also optimize MIPS32R2</div><div class='del'>-# code path for MIPS 1004K core. Per René von Dorst's suggestions.</div><div class='del'>-#</div><div class='del'>-#		IALU/gcc</div><div class='del'>-# R1x000	~9.8/?		(big-endian)</div><div class='del'>-# Octeon II	3.65/+140%	(little-endian)</div><div class='del'>-# MT7621/1004K	4.75/?		(little-endian)</div><div class='del'>-#</div><div class='del'>-######################################################################</div><div class='del'>-# There is a number of MIPS ABI in use, O32 and N32/64 are most</div><div class='del'>-# widely used. Then there is a new contender: NUBI. It appears that if</div><div class='del'>-# one picks the latter, it's possible to arrange code in ABI neutral</div><div class='del'>-# manner. Therefore let's stick to NUBI register layout:</div><div class='del'>-#</div><div class='del'>-($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));</div><div class='del'>-($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));</div><div class='del'>-($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));</div><div class='del'>-($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));</div><div class='del'>-#</div><div class='del'>-# The return value is placed in $a0. Following coding rules facilitate</div><div class='del'>-# interoperability:</div><div class='del'>-#</div><div class='del'>-# - never ever touch $tp, "thread pointer", former $gp [o32 can be</div><div class='del'>-#   excluded from the rule, because it's specified volatile];</div><div class='del'>-# - copy return value to $t0, former $v0 [or to $a0 if you're adapting</div><div class='del'>-#   old code];</div><div class='del'>-# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;</div><div class='del'>-#</div><div class='del'>-# For reference here is register layout for N32/64 MIPS ABIs:</div><div class='del'>-#</div><div class='del'>-# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));</div><div class='del'>-# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));</div><div class='del'>-# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));</div><div class='del'>-# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));</div><div class='del'>-# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));</div><div class='del'>-#</div><div class='del'>-# &lt;appro@openssl.org&gt;</div><div class='del'>-#</div><div class='del'>-######################################################################</div><div class='del'>-</div><div class='del'>-$flavour = shift || "64"; # supported flavours are o32,n32,64,nubi32,nubi64</div><div class='del'>-</div><div class='del'>-$v0 = ($flavour =~ /nubi/i) ? $a0 : $t0;</div><div class='del'>-</div><div class='del'>-if ($flavour =~ /64|n32/i) {{{</div><div class='del'>-######################################################################</div><div class='del'>-# 64-bit code path</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-my ($ctx,$inp,$len,$padbit) = ($a0,$a1,$a2,$a3);</div><div class='del'>-my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if (defined(_MIPS_ARCH_MIPS64R3) || defined(_MIPS_ARCH_MIPS64R5) || \\</div><div class='del'>-     defined(_MIPS_ARCH_MIPS64R6)) \\</div><div class='del'>-     &amp;&amp; !defined(_MIPS_ARCH_MIPS64R2)</div><div class='del'>-# define _MIPS_ARCH_MIPS64R2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-# define dmultu(rs,rt)</div><div class='del'>-# define mflo(rd,rs,rt)	dmulu	rd,rs,rt</div><div class='del'>-# define mfhi(rd,rs,rt)	dmuhu	rd,rs,rt</div><div class='del'>-#else</div><div class='del'>-# define dmultu(rs,rt)		dmultu	rs,rt</div><div class='del'>-# define mflo(rd,rs,rt)	mflo	rd</div><div class='del'>-# define mfhi(rd,rs,rt)	mfhi	rd</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef	__KERNEL__</div><div class='del'>-# define poly1305_init   poly1305_init_mips</div><div class='del'>-# define poly1305_blocks poly1305_blocks_mips</div><div class='del'>-# define poly1305_emit   poly1305_emit_mips</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(__MIPSEB__) &amp;&amp; !defined(MIPSEB)</div><div class='del'>-# define MIPSEB</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef MIPSEB</div><div class='del'>-# define MSB 0</div><div class='del'>-# define LSB 7</div><div class='del'>-#else</div><div class='del'>-# define MSB 7</div><div class='del'>-# define LSB 0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.set	noat</div><div class='del'>-.set	noreorder</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-.globl	poly1305_init</div><div class='del'>-.ent	poly1305_init</div><div class='del'>-poly1305_init:</div><div class='del'>-	.frame	$sp,0,$ra</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-	sd	$zero,0($ctx)</div><div class='del'>-	sd	$zero,8($ctx)</div><div class='del'>-	sd	$zero,16($ctx)</div><div class='del'>-</div><div class='del'>-	beqz	$inp,.Lno_key</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	andi	$tmp0,$inp,7		# $inp % 8</div><div class='del'>-	dsubu	$inp,$inp,$tmp0		# align $inp</div><div class='del'>-	sll	$tmp0,$tmp0,3		# byte to bit offset</div><div class='del'>-	ld	$in0,0($inp)</div><div class='del'>-	ld	$in1,8($inp)</div><div class='del'>-	beqz	$tmp0,.Laligned_key</div><div class='del'>-	ld	$tmp2,16($inp)</div><div class='del'>-</div><div class='del'>-	subu	$tmp1,$zero,$tmp0</div><div class='del'>-# ifdef	MIPSEB</div><div class='del'>-	dsllv	$in0,$in0,$tmp0</div><div class='del'>-	dsrlv	$tmp3,$in1,$tmp1</div><div class='del'>-	dsllv	$in1,$in1,$tmp0</div><div class='del'>-	dsrlv	$tmp2,$tmp2,$tmp1</div><div class='del'>-# else</div><div class='del'>-	dsrlv	$in0,$in0,$tmp0</div><div class='del'>-	dsllv	$tmp3,$in1,$tmp1</div><div class='del'>-	dsrlv	$in1,$in1,$tmp0</div><div class='del'>-	dsllv	$tmp2,$tmp2,$tmp1</div><div class='del'>-# endif</div><div class='del'>-	or	$in0,$in0,$tmp3</div><div class='del'>-	or	$in1,$in1,$tmp2</div><div class='del'>-.Laligned_key:</div><div class='del'>-#else</div><div class='del'>-	ldl	$in0,0+MSB($inp)</div><div class='del'>-	ldl	$in1,8+MSB($inp)</div><div class='del'>-	ldr	$in0,0+LSB($inp)</div><div class='del'>-	ldr	$in1,8+LSB($inp)</div><div class='del'>-#endif</div><div class='del'>-#ifdef	MIPSEB</div><div class='del'>-# if defined(_MIPS_ARCH_MIPS64R2)</div><div class='del'>-	dsbh	$in0,$in0		# byte swap</div><div class='del'>-	 dsbh	$in1,$in1</div><div class='del'>-	dshd	$in0,$in0</div><div class='del'>-	 dshd	$in1,$in1</div><div class='del'>-# else</div><div class='del'>-	ori	$tmp0,$zero,0xFF</div><div class='del'>-	dsll	$tmp2,$tmp0,32</div><div class='del'>-	or	$tmp0,$tmp2		# 0x000000FF000000FF</div><div class='del'>-</div><div class='del'>-	and	$tmp1,$in0,$tmp0	# byte swap</div><div class='del'>-	 and	$tmp3,$in1,$tmp0</div><div class='del'>-	dsrl	$tmp2,$in0,24</div><div class='del'>-	 dsrl	$tmp4,$in1,24</div><div class='del'>-	dsll	$tmp1,24</div><div class='del'>-	 dsll	$tmp3,24</div><div class='del'>-	and	$tmp2,$tmp0</div><div class='del'>-	 and	$tmp4,$tmp0</div><div class='del'>-	dsll	$tmp0,8			# 0x0000FF000000FF00</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 or	$tmp3,$tmp4</div><div class='del'>-	and	$tmp2,$in0,$tmp0</div><div class='del'>-	 and	$tmp4,$in1,$tmp0</div><div class='del'>-	dsrl	$in0,8</div><div class='del'>-	 dsrl	$in1,8</div><div class='del'>-	dsll	$tmp2,8</div><div class='del'>-	 dsll	$tmp4,8</div><div class='del'>-	and	$in0,$tmp0</div><div class='del'>-	 and	$in1,$tmp0</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 or	$tmp3,$tmp4</div><div class='del'>-	or	$in0,$tmp1</div><div class='del'>-	 or	$in1,$tmp3</div><div class='del'>-	dsrl	$tmp1,$in0,32</div><div class='del'>-	 dsrl	$tmp3,$in1,32</div><div class='del'>-	dsll	$in0,32</div><div class='del'>-	 dsll	$in1,32</div><div class='del'>-	or	$in0,$tmp1</div><div class='del'>-	 or	$in1,$tmp3</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	li	$tmp0,1</div><div class='del'>-	dsll	$tmp0,32		# 0x0000000100000000</div><div class='del'>-	daddiu	$tmp0,-63		# 0x00000000ffffffc1</div><div class='del'>-	dsll	$tmp0,28		# 0x0ffffffc10000000</div><div class='del'>-	daddiu	$tmp0,-1		# 0x0ffffffc0fffffff</div><div class='del'>-</div><div class='del'>-	and	$in0,$tmp0</div><div class='del'>-	daddiu	$tmp0,-3		# 0x0ffffffc0ffffffc</div><div class='del'>-	and	$in1,$tmp0</div><div class='del'>-</div><div class='del'>-	sd	$in0,24($ctx)</div><div class='del'>-	dsrl	$tmp0,$in1,2</div><div class='del'>-	sd	$in1,32($ctx)</div><div class='del'>-	daddu	$tmp0,$in1		# s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-	sd	$tmp0,40($ctx)</div><div class='del'>-</div><div class='del'>-.Lno_key:</div><div class='del'>-	li	$v0,0			# return 0</div><div class='del'>-	jr	$ra</div><div class='del'>-.end	poly1305_init</div><div class='del'>-___</div><div class='del'>-{</div><div class='del'>-my $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? "0x0003f000" : "0x00030000";</div><div class='del'>-</div><div class='del'>-my ($h0,$h1,$h2,$r0,$r1,$rs1,$d0,$d1,$d2) =</div><div class='del'>-   ($s0,$s1,$s2,$s3,$s4,$s5,$in0,$in1,$t2);</div><div class='del'>-my ($shr,$shl) = ($s6,$s7);		# used on R6</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.align	5</div><div class='del'>-.globl	poly1305_blocks</div><div class='del'>-.ent	poly1305_blocks</div><div class='del'>-poly1305_blocks:</div><div class='del'>-	.set	noreorder</div><div class='del'>-	dsrl	$len,4			# number of complete blocks</div><div class='del'>-	bnez	$len,poly1305_blocks_internal</div><div class='del'>-	nop</div><div class='del'>-	jr	$ra</div><div class='del'>-	nop</div><div class='del'>-.end	poly1305_blocks</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-.ent	poly1305_blocks_internal</div><div class='del'>-poly1305_blocks_internal:</div><div class='del'>-	.set	noreorder</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	.frame	$sp,8*8,$ra</div><div class='del'>-	.mask	$SAVED_REGS_MASK|0x000c0000,-8</div><div class='del'>-	dsubu	$sp,8*8</div><div class='del'>-	sd	$s7,56($sp)</div><div class='del'>-	sd	$s6,48($sp)</div><div class='del'>-#else</div><div class='del'>-	.frame	$sp,6*8,$ra</div><div class='del'>-	.mask	$SAVED_REGS_MASK,-8</div><div class='del'>-	dsubu	$sp,6*8</div><div class='del'>-#endif</div><div class='del'>-	sd	$s5,40($sp)</div><div class='del'>-	sd	$s4,32($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue</div><div class='del'>-	sd	$s3,24($sp)</div><div class='del'>-	sd	$s2,16($sp)</div><div class='del'>-	sd	$s1,8($sp)</div><div class='del'>-	sd	$s0,0($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	andi	$shr,$inp,7</div><div class='del'>-	dsubu	$inp,$inp,$shr		# align $inp</div><div class='del'>-	sll	$shr,$shr,3		# byte to bit offset</div><div class='del'>-	subu	$shl,$zero,$shr</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ld	$h0,0($ctx)		# load hash value</div><div class='del'>-	ld	$h1,8($ctx)</div><div class='del'>-	ld	$h2,16($ctx)</div><div class='del'>-</div><div class='del'>-	ld	$r0,24($ctx)		# load key</div><div class='del'>-	ld	$r1,32($ctx)</div><div class='del'>-	ld	$rs1,40($ctx)</div><div class='del'>-</div><div class='del'>-	dsll	$len,4</div><div class='del'>-	daddu	$len,$inp		# end of buffer</div><div class='del'>-	b	.Loop</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Loop:</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	ld	$in0,0($inp)		# load input</div><div class='del'>-	ld	$in1,8($inp)</div><div class='del'>-	beqz	$shr,.Laligned_inp</div><div class='del'>-</div><div class='del'>-	ld	$tmp2,16($inp)</div><div class='del'>-# ifdef	MIPSEB</div><div class='del'>-	dsllv	$in0,$in0,$shr</div><div class='del'>-	dsrlv	$tmp3,$in1,$shl</div><div class='del'>-	dsllv	$in1,$in1,$shr</div><div class='del'>-	dsrlv	$tmp2,$tmp2,$shl</div><div class='del'>-# else</div><div class='del'>-	dsrlv	$in0,$in0,$shr</div><div class='del'>-	dsllv	$tmp3,$in1,$shl</div><div class='del'>-	dsrlv	$in1,$in1,$shr</div><div class='del'>-	dsllv	$tmp2,$tmp2,$shl</div><div class='del'>-# endif</div><div class='del'>-	or	$in0,$in0,$tmp3</div><div class='del'>-	or	$in1,$in1,$tmp2</div><div class='del'>-.Laligned_inp:</div><div class='del'>-#else</div><div class='del'>-	ldl	$in0,0+MSB($inp)	# load input</div><div class='del'>-	ldl	$in1,8+MSB($inp)</div><div class='del'>-	ldr	$in0,0+LSB($inp)</div><div class='del'>-	ldr	$in1,8+LSB($inp)</div><div class='del'>-#endif</div><div class='del'>-	daddiu	$inp,16</div><div class='del'>-#ifdef	MIPSEB</div><div class='del'>-# if defined(_MIPS_ARCH_MIPS64R2)</div><div class='del'>-	dsbh	$in0,$in0		# byte swap</div><div class='del'>-	 dsbh	$in1,$in1</div><div class='del'>-	dshd	$in0,$in0</div><div class='del'>-	 dshd	$in1,$in1</div><div class='del'>-# else</div><div class='del'>-	ori	$tmp0,$zero,0xFF</div><div class='del'>-	dsll	$tmp2,$tmp0,32</div><div class='del'>-	or	$tmp0,$tmp2		# 0x000000FF000000FF</div><div class='del'>-</div><div class='del'>-	and	$tmp1,$in0,$tmp0	# byte swap</div><div class='del'>-	 and	$tmp3,$in1,$tmp0</div><div class='del'>-	dsrl	$tmp2,$in0,24</div><div class='del'>-	 dsrl	$tmp4,$in1,24</div><div class='del'>-	dsll	$tmp1,24</div><div class='del'>-	 dsll	$tmp3,24</div><div class='del'>-	and	$tmp2,$tmp0</div><div class='del'>-	 and	$tmp4,$tmp0</div><div class='del'>-	dsll	$tmp0,8			# 0x0000FF000000FF00</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 or	$tmp3,$tmp4</div><div class='del'>-	and	$tmp2,$in0,$tmp0</div><div class='del'>-	 and	$tmp4,$in1,$tmp0</div><div class='del'>-	dsrl	$in0,8</div><div class='del'>-	 dsrl	$in1,8</div><div class='del'>-	dsll	$tmp2,8</div><div class='del'>-	 dsll	$tmp4,8</div><div class='del'>-	and	$in0,$tmp0</div><div class='del'>-	 and	$in1,$tmp0</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 or	$tmp3,$tmp4</div><div class='del'>-	or	$in0,$tmp1</div><div class='del'>-	 or	$in1,$tmp3</div><div class='del'>-	dsrl	$tmp1,$in0,32</div><div class='del'>-	 dsrl	$tmp3,$in1,32</div><div class='del'>-	dsll	$in0,32</div><div class='del'>-	 dsll	$in1,32</div><div class='del'>-	or	$in0,$tmp1</div><div class='del'>-	 or	$in1,$tmp3</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	dsrl	$tmp1,$h2,2		# modulo-scheduled reduction</div><div class='del'>-	andi	$h2,$h2,3</div><div class='del'>-	dsll	$tmp0,$tmp1,2</div><div class='del'>-</div><div class='del'>-	daddu	$d0,$h0,$in0		# accumulate input</div><div class='del'>-	 daddu	$tmp1,$tmp0</div><div class='del'>-	sltu	$tmp0,$d0,$h0</div><div class='del'>-	daddu	$d0,$d0,$tmp1		# ... and residue</div><div class='del'>-	sltu	$tmp1,$d0,$tmp1</div><div class='del'>-	daddu	$d1,$h1,$in1</div><div class='del'>-	daddu	$tmp0,$tmp1</div><div class='del'>-	sltu	$tmp1,$d1,$h1</div><div class='del'>-	daddu	$d1,$tmp0</div><div class='del'>-</div><div class='del'>-	dmultu	($r0,$d0)		# h0*r0</div><div class='del'>-	 daddu	$d2,$h2,$padbit</div><div class='del'>-	 sltu	$tmp0,$d1,$tmp0</div><div class='del'>-	mflo	($h0,$r0,$d0)</div><div class='del'>-	mfhi	($h1,$r0,$d0)</div><div class='del'>-</div><div class='del'>-	dmultu	($rs1,$d1)		# h1*5*r1</div><div class='del'>-	 daddu	$d2,$tmp1</div><div class='del'>-	 daddu	$d2,$tmp0</div><div class='del'>-	mflo	($tmp0,$rs1,$d1)</div><div class='del'>-	mfhi	($tmp1,$rs1,$d1)</div><div class='del'>-</div><div class='del'>-	dmultu	($r1,$d0)		# h0*r1</div><div class='del'>-	mflo	($tmp2,$r1,$d0)</div><div class='del'>-	mfhi	($h2,$r1,$d0)</div><div class='del'>-	 daddu	$h0,$tmp0</div><div class='del'>-	 daddu	$h1,$tmp1</div><div class='del'>-	 sltu	$tmp0,$h0,$tmp0</div><div class='del'>-</div><div class='del'>-	dmultu	($r0,$d1)		# h1*r0</div><div class='del'>-	 daddu	$h1,$tmp0</div><div class='del'>-	 daddu	$h1,$tmp2</div><div class='del'>-	mflo	($tmp0,$r0,$d1)</div><div class='del'>-	mfhi	($tmp1,$r0,$d1)</div><div class='del'>-</div><div class='del'>-	dmultu	($rs1,$d2)		# h2*5*r1</div><div class='del'>-	 sltu	$tmp2,$h1,$tmp2</div><div class='del'>-	 daddu	$h2,$tmp2</div><div class='del'>-	mflo	($tmp2,$rs1,$d2)</div><div class='del'>-</div><div class='del'>-	dmultu	($r0,$d2)		# h2*r0</div><div class='del'>-	 daddu	$h1,$tmp0</div><div class='del'>-	 daddu	$h2,$tmp1</div><div class='del'>-	mflo	($tmp3,$r0,$d2)</div><div class='del'>-	 sltu	$tmp0,$h1,$tmp0</div><div class='del'>-	 daddu	$h2,$tmp0</div><div class='del'>-</div><div class='del'>-	daddu	$h1,$tmp2</div><div class='del'>-	sltu	$tmp2,$h1,$tmp2</div><div class='del'>-	daddu	$h2,$tmp2</div><div class='del'>-	daddu	$h2,$tmp3</div><div class='del'>-</div><div class='del'>-	bne	$inp,$len,.Loop</div><div class='del'>-</div><div class='del'>-	sd	$h0,0($ctx)		# store hash value</div><div class='del'>-	sd	$h1,8($ctx)</div><div class='del'>-	sd	$h2,16($ctx)</div><div class='del'>-</div><div class='del'>-	.set	noreorder</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	ld	$s7,56($sp)</div><div class='del'>-	ld	$s6,48($sp)</div><div class='del'>-#endif</div><div class='del'>-	ld	$s5,40($sp)		# epilogue</div><div class='del'>-	ld	$s4,32($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($flavour =~ /nubi/i);	# optimize non-nubi epilogue</div><div class='del'>-	ld	$s3,24($sp)</div><div class='del'>-	ld	$s2,16($sp)</div><div class='del'>-	ld	$s1,8($sp)</div><div class='del'>-	ld	$s0,0($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	jr	$ra</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS64R6)</div><div class='del'>-	daddu	$sp,8*8</div><div class='del'>-#else</div><div class='del'>-	daddu	$sp,6*8</div><div class='del'>-#endif</div><div class='del'>-.end	poly1305_blocks_internal</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-{</div><div class='del'>-my ($ctx,$mac,$nonce) = ($a0,$a1,$a2);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.align	5</div><div class='del'>-.globl	poly1305_emit</div><div class='del'>-.ent	poly1305_emit</div><div class='del'>-poly1305_emit:</div><div class='del'>-	.frame	$sp,0,$ra</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-	ld	$tmp2,16($ctx)</div><div class='del'>-	ld	$tmp0,0($ctx)</div><div class='del'>-	ld	$tmp1,8($ctx)</div><div class='del'>-</div><div class='del'>-	li	$in0,-4			# final reduction</div><div class='del'>-	dsrl	$in1,$tmp2,2</div><div class='del'>-	and	$in0,$tmp2</div><div class='del'>-	andi	$tmp2,$tmp2,3</div><div class='del'>-	daddu	$in0,$in1</div><div class='del'>-</div><div class='del'>-	daddu	$tmp0,$tmp0,$in0</div><div class='del'>-	sltu	$in1,$tmp0,$in0</div><div class='del'>-	 daddiu	$in0,$tmp0,5		# compare to modulus</div><div class='del'>-	daddu	$tmp1,$tmp1,$in1</div><div class='del'>-	 sltiu	$tmp3,$in0,5</div><div class='del'>-	sltu	$tmp4,$tmp1,$in1</div><div class='del'>-	 daddu	$in1,$tmp1,$tmp3</div><div class='del'>-	daddu	$tmp2,$tmp2,$tmp4</div><div class='del'>-	 sltu	$tmp3,$in1,$tmp3</div><div class='del'>-	 daddu	$tmp2,$tmp2,$tmp3</div><div class='del'>-</div><div class='del'>-	dsrl	$tmp2,2			# see if it carried/borrowed</div><div class='del'>-	dsubu	$tmp2,$zero,$tmp2</div><div class='del'>-</div><div class='del'>-	xor	$in0,$tmp0</div><div class='del'>-	xor	$in1,$tmp1</div><div class='del'>-	and	$in0,$tmp2</div><div class='del'>-	and	$in1,$tmp2</div><div class='del'>-	xor	$in0,$tmp0</div><div class='del'>-	xor	$in1,$tmp1</div><div class='del'>-</div><div class='del'>-	lwu	$tmp0,0($nonce)		# load nonce</div><div class='del'>-	lwu	$tmp1,4($nonce)</div><div class='del'>-	lwu	$tmp2,8($nonce)</div><div class='del'>-	lwu	$tmp3,12($nonce)</div><div class='del'>-	dsll	$tmp1,32</div><div class='del'>-	dsll	$tmp3,32</div><div class='del'>-	or	$tmp0,$tmp1</div><div class='del'>-	or	$tmp2,$tmp3</div><div class='del'>-</div><div class='del'>-	daddu	$in0,$tmp0		# accumulate nonce</div><div class='del'>-	daddu	$in1,$tmp2</div><div class='del'>-	sltu	$tmp0,$in0,$tmp0</div><div class='del'>-	daddu	$in1,$tmp0</div><div class='del'>-</div><div class='del'>-	dsrl	$tmp0,$in0,8		# write mac value</div><div class='del'>-	dsrl	$tmp1,$in0,16</div><div class='del'>-	dsrl	$tmp2,$in0,24</div><div class='del'>-	sb	$in0,0($mac)</div><div class='del'>-	dsrl	$tmp3,$in0,32</div><div class='del'>-	sb	$tmp0,1($mac)</div><div class='del'>-	dsrl	$tmp0,$in0,40</div><div class='del'>-	sb	$tmp1,2($mac)</div><div class='del'>-	dsrl	$tmp1,$in0,48</div><div class='del'>-	sb	$tmp2,3($mac)</div><div class='del'>-	dsrl	$tmp2,$in0,56</div><div class='del'>-	sb	$tmp3,4($mac)</div><div class='del'>-	dsrl	$tmp3,$in1,8</div><div class='del'>-	sb	$tmp0,5($mac)</div><div class='del'>-	dsrl	$tmp0,$in1,16</div><div class='del'>-	sb	$tmp1,6($mac)</div><div class='del'>-	dsrl	$tmp1,$in1,24</div><div class='del'>-	sb	$tmp2,7($mac)</div><div class='del'>-</div><div class='del'>-	sb	$in1,8($mac)</div><div class='del'>-	dsrl	$tmp2,$in1,32</div><div class='del'>-	sb	$tmp3,9($mac)</div><div class='del'>-	dsrl	$tmp3,$in1,40</div><div class='del'>-	sb	$tmp0,10($mac)</div><div class='del'>-	dsrl	$tmp0,$in1,48</div><div class='del'>-	sb	$tmp1,11($mac)</div><div class='del'>-	dsrl	$tmp1,$in1,56</div><div class='del'>-	sb	$tmp2,12($mac)</div><div class='del'>-	sb	$tmp3,13($mac)</div><div class='del'>-	sb	$tmp0,14($mac)</div><div class='del'>-	sb	$tmp1,15($mac)</div><div class='del'>-</div><div class='del'>-	jr	$ra</div><div class='del'>-.end	poly1305_emit</div><div class='del'>-.rdata</div><div class='del'>-.asciiz	"Poly1305 for MIPS64, CRYPTOGAMS by \@dot-asm"</div><div class='del'>-.align	2</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-}}} else {{{</div><div class='del'>-######################################################################</div><div class='del'>-# 32-bit code path</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-my ($ctx,$inp,$len,$padbit) = ($a0,$a1,$a2,$a3);</div><div class='del'>-my ($in0,$in1,$in2,$in3,$tmp0,$tmp1,$tmp2,$tmp3) =</div><div class='del'>-   ($a4,$a5,$a6,$a7,$at,$t0,$t1,$t2);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-#if (defined(_MIPS_ARCH_MIPS32R3) || defined(_MIPS_ARCH_MIPS32R5) || \\</div><div class='del'>-     defined(_MIPS_ARCH_MIPS32R6)) \\</div><div class='del'>-     &amp;&amp; !defined(_MIPS_ARCH_MIPS32R2)</div><div class='del'>-# define _MIPS_ARCH_MIPS32R2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS32R6)</div><div class='del'>-# define multu(rs,rt)</div><div class='del'>-# define mflo(rd,rs,rt)	mulu	rd,rs,rt</div><div class='del'>-# define mfhi(rd,rs,rt)	muhu	rd,rs,rt</div><div class='del'>-#else</div><div class='del'>-# define multu(rs,rt)	multu	rs,rt</div><div class='del'>-# define mflo(rd,rs,rt)	mflo	rd</div><div class='del'>-# define mfhi(rd,rs,rt)	mfhi	rd</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef	__KERNEL__</div><div class='del'>-# define poly1305_init   poly1305_init_mips</div><div class='del'>-# define poly1305_blocks poly1305_blocks_mips</div><div class='del'>-# define poly1305_emit   poly1305_emit_mips</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(__MIPSEB__) &amp;&amp; !defined(MIPSEB)</div><div class='del'>-# define MIPSEB</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef MIPSEB</div><div class='del'>-# define MSB 0</div><div class='del'>-# define LSB 3</div><div class='del'>-#else</div><div class='del'>-# define MSB 3</div><div class='del'>-# define LSB 0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.set	noat</div><div class='del'>-.set	noreorder</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-.globl	poly1305_init</div><div class='del'>-.ent	poly1305_init</div><div class='del'>-poly1305_init:</div><div class='del'>-	.frame	$sp,0,$ra</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-	sw	$zero,0($ctx)</div><div class='del'>-	sw	$zero,4($ctx)</div><div class='del'>-	sw	$zero,8($ctx)</div><div class='del'>-	sw	$zero,12($ctx)</div><div class='del'>-	sw	$zero,16($ctx)</div><div class='del'>-</div><div class='del'>-	beqz	$inp,.Lno_key</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS32R6)</div><div class='del'>-	andi	$tmp0,$inp,3		# $inp % 4</div><div class='del'>-	subu	$inp,$inp,$tmp0		# align $inp</div><div class='del'>-	sll	$tmp0,$tmp0,3		# byte to bit offset</div><div class='del'>-	lw	$in0,0($inp)</div><div class='del'>-	lw	$in1,4($inp)</div><div class='del'>-	lw	$in2,8($inp)</div><div class='del'>-	lw	$in3,12($inp)</div><div class='del'>-	beqz	$tmp0,.Laligned_key</div><div class='del'>-</div><div class='del'>-	lw	$tmp2,16($inp)</div><div class='del'>-	subu	$tmp1,$zero,$tmp0</div><div class='del'>-# ifdef	MIPSEB</div><div class='del'>-	sllv	$in0,$in0,$tmp0</div><div class='del'>-	srlv	$tmp3,$in1,$tmp1</div><div class='del'>-	sllv	$in1,$in1,$tmp0</div><div class='del'>-	or	$in0,$in0,$tmp3</div><div class='del'>-	srlv	$tmp3,$in2,$tmp1</div><div class='del'>-	sllv	$in2,$in2,$tmp0</div><div class='del'>-	or	$in1,$in1,$tmp3</div><div class='del'>-	srlv	$tmp3,$in3,$tmp1</div><div class='del'>-	sllv	$in3,$in3,$tmp0</div><div class='del'>-	or	$in2,$in2,$tmp3</div><div class='del'>-	srlv	$tmp2,$tmp2,$tmp1</div><div class='del'>-	or	$in3,$in3,$tmp2</div><div class='del'>-# else</div><div class='del'>-	srlv	$in0,$in0,$tmp0</div><div class='del'>-	sllv	$tmp3,$in1,$tmp1</div><div class='del'>-	srlv	$in1,$in1,$tmp0</div><div class='del'>-	or	$in0,$in0,$tmp3</div><div class='del'>-	sllv	$tmp3,$in2,$tmp1</div><div class='del'>-	srlv	$in2,$in2,$tmp0</div><div class='del'>-	or	$in1,$in1,$tmp3</div><div class='del'>-	sllv	$tmp3,$in3,$tmp1</div><div class='del'>-	srlv	$in3,$in3,$tmp0</div><div class='del'>-	or	$in2,$in2,$tmp3</div><div class='del'>-	sllv	$tmp2,$tmp2,$tmp1</div><div class='del'>-	or	$in3,$in3,$tmp2</div><div class='del'>-# endif</div><div class='del'>-.Laligned_key:</div><div class='del'>-#else</div><div class='del'>-	lwl	$in0,0+MSB($inp)</div><div class='del'>-	lwl	$in1,4+MSB($inp)</div><div class='del'>-	lwl	$in2,8+MSB($inp)</div><div class='del'>-	lwl	$in3,12+MSB($inp)</div><div class='del'>-	lwr	$in0,0+LSB($inp)</div><div class='del'>-	lwr	$in1,4+LSB($inp)</div><div class='del'>-	lwr	$in2,8+LSB($inp)</div><div class='del'>-	lwr	$in3,12+LSB($inp)</div><div class='del'>-#endif</div><div class='del'>-#ifdef	MIPSEB</div><div class='del'>-# if defined(_MIPS_ARCH_MIPS32R2)</div><div class='del'>-	wsbh	$in0,$in0		# byte swap</div><div class='del'>-	wsbh	$in1,$in1</div><div class='del'>-	wsbh	$in2,$in2</div><div class='del'>-	wsbh	$in3,$in3</div><div class='del'>-	rotr	$in0,$in0,16</div><div class='del'>-	rotr	$in1,$in1,16</div><div class='del'>-	rotr	$in2,$in2,16</div><div class='del'>-	rotr	$in3,$in3,16</div><div class='del'>-# else</div><div class='del'>-	srl	$tmp0,$in0,24		# byte swap</div><div class='del'>-	srl	$tmp1,$in0,8</div><div class='del'>-	andi	$tmp2,$in0,0xFF00</div><div class='del'>-	sll	$in0,$in0,24</div><div class='del'>-	andi	$tmp1,0xFF00</div><div class='del'>-	sll	$tmp2,$tmp2,8</div><div class='del'>-	or	$in0,$tmp0</div><div class='del'>-	 srl	$tmp0,$in1,24</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 srl	$tmp2,$in1,8</div><div class='del'>-	or	$in0,$tmp1</div><div class='del'>-	 andi	$tmp1,$in1,0xFF00</div><div class='del'>-	 sll	$in1,$in1,24</div><div class='del'>-	 andi	$tmp2,0xFF00</div><div class='del'>-	 sll	$tmp1,$tmp1,8</div><div class='del'>-	 or	$in1,$tmp0</div><div class='del'>-	srl	$tmp0,$in2,24</div><div class='del'>-	 or	$tmp2,$tmp1</div><div class='del'>-	srl	$tmp1,$in2,8</div><div class='del'>-	 or	$in1,$tmp2</div><div class='del'>-	andi	$tmp2,$in2,0xFF00</div><div class='del'>-	sll	$in2,$in2,24</div><div class='del'>-	andi	$tmp1,0xFF00</div><div class='del'>-	sll	$tmp2,$tmp2,8</div><div class='del'>-	or	$in2,$tmp0</div><div class='del'>-	 srl	$tmp0,$in3,24</div><div class='del'>-	or	$tmp1,$tmp2</div><div class='del'>-	 srl	$tmp2,$in3,8</div><div class='del'>-	or	$in2,$tmp1</div><div class='del'>-	 andi	$tmp1,$in3,0xFF00</div><div class='del'>-	 sll	$in3,$in3,24</div><div class='del'>-	 andi	$tmp2,0xFF00</div><div class='del'>-	 sll	$tmp1,$tmp1,8</div><div class='del'>-	 or	$in3,$tmp0</div><div class='del'>-	 or	$tmp2,$tmp1</div><div class='del'>-	 or	$in3,$tmp2</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	lui	$tmp0,0x0fff</div><div class='del'>-	ori	$tmp0,0xffff		# 0x0fffffff</div><div class='del'>-	and	$in0,$in0,$tmp0</div><div class='del'>-	subu	$tmp0,3			# 0x0ffffffc</div><div class='del'>-	and	$in1,$in1,$tmp0</div><div class='del'>-	and	$in2,$in2,$tmp0</div><div class='del'>-	and	$in3,$in3,$tmp0</div><div class='del'>-</div><div class='del'>-	sw	$in0,20($ctx)</div><div class='del'>-	sw	$in1,24($ctx)</div><div class='del'>-	sw	$in2,28($ctx)</div><div class='del'>-	sw	$in3,32($ctx)</div><div class='del'>-</div><div class='del'>-	srl	$tmp1,$in1,2</div><div class='del'>-	srl	$tmp2,$in2,2</div><div class='del'>-	srl	$tmp3,$in3,2</div><div class='del'>-	addu	$in1,$in1,$tmp1		# s1 = r1 + (r1 &gt;&gt; 2)</div><div class='del'>-	addu	$in2,$in2,$tmp2</div><div class='del'>-	addu	$in3,$in3,$tmp3</div><div class='del'>-	sw	$in1,36($ctx)</div><div class='del'>-	sw	$in2,40($ctx)</div><div class='del'>-	sw	$in3,44($ctx)</div><div class='del'>-.Lno_key:</div><div class='del'>-	li	$v0,0</div><div class='del'>-	jr	$ra</div><div class='del'>-.end	poly1305_init</div><div class='del'>-___</div><div class='del'>-{</div><div class='del'>-my $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? "0x00fff000" : "0x00ff0000";</div><div class='del'>-</div><div class='del'>-my ($h0,$h1,$h2,$h3,$h4, $r0,$r1,$r2,$r3, $rs1,$rs2,$rs3) =</div><div class='del'>-   ($s0,$s1,$s2,$s3,$s4, $s5,$s6,$s7,$s8, $s9,$s10,$s11);</div><div class='del'>-my ($d0,$d1,$d2,$d3) =</div><div class='del'>-   ($a4,$a5,$a6,$a7);</div><div class='del'>-my $shr = $t2;		# used on R6</div><div class='del'>-my $one = $t2;		# used on R2</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.globl	poly1305_blocks</div><div class='del'>-.align	5</div><div class='del'>-.ent	poly1305_blocks</div><div class='del'>-poly1305_blocks:</div><div class='del'>-	.frame	$sp,16*4,$ra</div><div class='del'>-	.mask	$SAVED_REGS_MASK,-4</div><div class='del'>-	.set	noreorder</div><div class='del'>-	subu	$sp, $sp,4*12</div><div class='del'>-	sw	$s11,4*11($sp)</div><div class='del'>-	sw	$s10,4*10($sp)</div><div class='del'>-	sw	$s9, 4*9($sp)</div><div class='del'>-	sw	$s8, 4*8($sp)</div><div class='del'>-	sw	$s7, 4*7($sp)</div><div class='del'>-	sw	$s6, 4*6($sp)</div><div class='del'>-	sw	$s5, 4*5($sp)</div><div class='del'>-	sw	$s4, 4*4($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue</div><div class='del'>-	sw	$s3, 4*3($sp)</div><div class='del'>-	sw	$s2, 4*2($sp)</div><div class='del'>-	sw	$s1, 4*1($sp)</div><div class='del'>-	sw	$s0, 4*0($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-	srl	$len,4			# number of complete blocks</div><div class='del'>-	li	$one,1</div><div class='del'>-	beqz	$len,.Labort</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS32R6)</div><div class='del'>-	andi	$shr,$inp,3</div><div class='del'>-	subu	$inp,$inp,$shr		# align $inp</div><div class='del'>-	sll	$shr,$shr,3		# byte to bit offset</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	lw	$h0,0($ctx)		# load hash value</div><div class='del'>-	lw	$h1,4($ctx)</div><div class='del'>-	lw	$h2,8($ctx)</div><div class='del'>-	lw	$h3,12($ctx)</div><div class='del'>-	lw	$h4,16($ctx)</div><div class='del'>-</div><div class='del'>-	lw	$r0,20($ctx)		# load key</div><div class='del'>-	lw	$r1,24($ctx)</div><div class='del'>-	lw	$r2,28($ctx)</div><div class='del'>-	lw	$r3,32($ctx)</div><div class='del'>-	lw	$rs1,36($ctx)</div><div class='del'>-	lw	$rs2,40($ctx)</div><div class='del'>-	lw	$rs3,44($ctx)</div><div class='del'>-</div><div class='del'>-	sll	$len,4</div><div class='del'>-	addu	$len,$len,$inp		# end of buffer</div><div class='del'>-	b	.Loop</div><div class='del'>-</div><div class='del'>-.align	4</div><div class='del'>-.Loop:</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS32R6)</div><div class='del'>-	lw	$d0,0($inp)		# load input</div><div class='del'>-	lw	$d1,4($inp)</div><div class='del'>-	lw	$d2,8($inp)</div><div class='del'>-	lw	$d3,12($inp)</div><div class='del'>-	beqz	$shr,.Laligned_inp</div><div class='del'>-</div><div class='del'>-	lw	$t0,16($inp)</div><div class='del'>-	subu	$t1,$zero,$shr</div><div class='del'>-# ifdef	MIPSEB</div><div class='del'>-	sllv	$d0,$d0,$shr</div><div class='del'>-	srlv	$at,$d1,$t1</div><div class='del'>-	sllv	$d1,$d1,$shr</div><div class='del'>-	or	$d0,$d0,$at</div><div class='del'>-	srlv	$at,$d2,$t1</div><div class='del'>-	sllv	$d2,$d2,$shr</div><div class='del'>-	or	$d1,$d1,$at</div><div class='del'>-	srlv	$at,$d3,$t1</div><div class='del'>-	sllv	$d3,$d3,$shr</div><div class='del'>-	or	$d2,$d2,$at</div><div class='del'>-	srlv	$t0,$t0,$t1</div><div class='del'>-	or	$d3,$d3,$t0</div><div class='del'>-# else</div><div class='del'>-	srlv	$d0,$d0,$shr</div><div class='del'>-	sllv	$at,$d1,$t1</div><div class='del'>-	srlv	$d1,$d1,$shr</div><div class='del'>-	or	$d0,$d0,$at</div><div class='del'>-	sllv	$at,$d2,$t1</div><div class='del'>-	srlv	$d2,$d2,$shr</div><div class='del'>-	or	$d1,$d1,$at</div><div class='del'>-	sllv	$at,$d3,$t1</div><div class='del'>-	srlv	$d3,$d3,$shr</div><div class='del'>-	or	$d2,$d2,$at</div><div class='del'>-	sllv	$t0,$t0,$t1</div><div class='del'>-	or	$d3,$d3,$t0</div><div class='del'>-# endif</div><div class='del'>-.Laligned_inp:</div><div class='del'>-#else</div><div class='del'>-	lwl	$d0,0+MSB($inp)		# load input</div><div class='del'>-	lwl	$d1,4+MSB($inp)</div><div class='del'>-	lwl	$d2,8+MSB($inp)</div><div class='del'>-	lwl	$d3,12+MSB($inp)</div><div class='del'>-	lwr	$d0,0+LSB($inp)</div><div class='del'>-	lwr	$d1,4+LSB($inp)</div><div class='del'>-	lwr	$d2,8+LSB($inp)</div><div class='del'>-	lwr	$d3,12+LSB($inp)</div><div class='del'>-#endif</div><div class='del'>-#ifdef	MIPSEB</div><div class='del'>-# if defined(_MIPS_ARCH_MIPS32R2)</div><div class='del'>-	wsbh	$d0,$d0			# byte swap</div><div class='del'>-	wsbh	$d1,$d1</div><div class='del'>-	wsbh	$d2,$d2</div><div class='del'>-	wsbh	$d3,$d3</div><div class='del'>-	rotr	$d0,$d0,16</div><div class='del'>-	rotr	$d1,$d1,16</div><div class='del'>-	rotr	$d2,$d2,16</div><div class='del'>-	rotr	$d3,$d3,16</div><div class='del'>-# else</div><div class='del'>-	srl	$at,$d0,24		# byte swap</div><div class='del'>-	srl	$t0,$d0,8</div><div class='del'>-	andi	$t1,$d0,0xFF00</div><div class='del'>-	sll	$d0,$d0,24</div><div class='del'>-	andi	$t0,0xFF00</div><div class='del'>-	sll	$t1,$t1,8</div><div class='del'>-	or	$d0,$at</div><div class='del'>-	 srl	$at,$d1,24</div><div class='del'>-	or	$t0,$t1</div><div class='del'>-	 srl	$t1,$d1,8</div><div class='del'>-	or	$d0,$t0</div><div class='del'>-	 andi	$t0,$d1,0xFF00</div><div class='del'>-	 sll	$d1,$d1,24</div><div class='del'>-	 andi	$t1,0xFF00</div><div class='del'>-	 sll	$t0,$t0,8</div><div class='del'>-	 or	$d1,$at</div><div class='del'>-	srl	$at,$d2,24</div><div class='del'>-	 or	$t1,$t0</div><div class='del'>-	srl	$t0,$d2,8</div><div class='del'>-	 or	$d1,$t1</div><div class='del'>-	andi	$t1,$d2,0xFF00</div><div class='del'>-	sll	$d2,$d2,24</div><div class='del'>-	andi	$t0,0xFF00</div><div class='del'>-	sll	$t1,$t1,8</div><div class='del'>-	or	$d2,$at</div><div class='del'>-	 srl	$at,$d3,24</div><div class='del'>-	or	$t0,$t1</div><div class='del'>-	 srl	$t1,$d3,8</div><div class='del'>-	or	$d2,$t0</div><div class='del'>-	 andi	$t0,$d3,0xFF00</div><div class='del'>-	 sll	$d3,$d3,24</div><div class='del'>-	 andi	$t1,0xFF00</div><div class='del'>-	 sll	$t0,$t0,8</div><div class='del'>-	 or	$d3,$at</div><div class='del'>-	 or	$t1,$t0</div><div class='del'>-	 or	$d3,$t1</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-	srl	$t0,$h4,2		# modulo-scheduled reduction</div><div class='del'>-	andi	$h4,$h4,3</div><div class='del'>-	sll	$at,$t0,2</div><div class='del'>-</div><div class='del'>-	addu	$d0,$d0,$h0		# accumulate input</div><div class='del'>-	 addu	$t0,$t0,$at</div><div class='del'>-	sltu	$h0,$d0,$h0</div><div class='del'>-	addu	$d0,$d0,$t0		# ... and residue</div><div class='del'>-	sltu	$at,$d0,$t0</div><div class='del'>-</div><div class='del'>-	addu	$d1,$d1,$h1</div><div class='del'>-	 addu	$h0,$h0,$at		# carry</div><div class='del'>-	sltu	$h1,$d1,$h1</div><div class='del'>-	addu	$d1,$d1,$h0</div><div class='del'>-	sltu	$h0,$d1,$h0</div><div class='del'>-</div><div class='del'>-	addu	$d2,$d2,$h2</div><div class='del'>-	 addu	$h1,$h1,$h0		# carry</div><div class='del'>-	sltu	$h2,$d2,$h2</div><div class='del'>-	addu	$d2,$d2,$h1</div><div class='del'>-	sltu	$h1,$d2,$h1</div><div class='del'>-</div><div class='del'>-	addu	$d3,$d3,$h3</div><div class='del'>-	 addu	$h2,$h2,$h1		# carry</div><div class='del'>-	sltu	$h3,$d3,$h3</div><div class='del'>-	addu	$d3,$d3,$h2</div><div class='del'>-</div><div class='del'>-#if defined(_MIPS_ARCH_MIPS32R2) &amp;&amp; !defined(_MIPS_ARCH_MIPS32R6)</div><div class='del'>-	multu	$r0,$d0			# d0*r0</div><div class='del'>-	 sltu	$h2,$d3,$h2</div><div class='del'>-	maddu	$rs3,$d1		# d1*s3</div><div class='del'>-	 addu	$h3,$h3,$h2		# carry</div><div class='del'>-	maddu	$rs2,$d2		# d2*s2</div><div class='del'>-	 addu	$h4,$h4,$padbit</div><div class='del'>-	maddu	$rs1,$d3		# d3*s1</div><div class='del'>-	 addu	$h4,$h4,$h3</div><div class='del'>-	mfhi	$at</div><div class='del'>-	mflo	$h0</div><div class='del'>-</div><div class='del'>-	multu	$r1,$d0			# d0*r1</div><div class='del'>-	maddu	$r0,$d1			# d1*r0</div><div class='del'>-	maddu	$rs3,$d2		# d2*s3</div><div class='del'>-	maddu	$rs2,$d3		# d3*s2</div><div class='del'>-	maddu	$rs1,$h4		# h4*s1</div><div class='del'>-	maddu	$at,$one		# hi*1</div><div class='del'>-	mfhi	$at</div><div class='del'>-	mflo	$h1</div><div class='del'>-</div><div class='del'>-	multu	$r2,$d0			# d0*r2</div><div class='del'>-	maddu	$r1,$d1			# d1*r1</div><div class='del'>-	maddu	$r0,$d2			# d2*r0</div><div class='del'>-	maddu	$rs3,$d3		# d3*s3</div><div class='del'>-	maddu	$rs2,$h4		# h4*s2</div><div class='del'>-	maddu	$at,$one		# hi*1</div><div class='del'>-	mfhi	$at</div><div class='del'>-	mflo	$h2</div><div class='del'>-</div><div class='del'>-	mul	$t0,$r0,$h4		# h4*r0</div><div class='del'>-</div><div class='del'>-	multu	$r3,$d0			# d0*r3</div><div class='del'>-	maddu	$r2,$d1			# d1*r2</div><div class='del'>-	maddu	$r1,$d2			# d2*r1</div><div class='del'>-	maddu	$r0,$d3			# d3*r0</div><div class='del'>-	maddu	$rs3,$h4		# h4*s3</div><div class='del'>-	maddu	$at,$one		# hi*1</div><div class='del'>-	mfhi	$at</div><div class='del'>-	mflo	$h3</div><div class='del'>-</div><div class='del'>-	 addiu	$inp,$inp,16</div><div class='del'>-</div><div class='del'>-	addu	$h4,$t0,$at</div><div class='del'>-#else</div><div class='del'>-	multu	($r0,$d0)		# d0*r0</div><div class='del'>-	mflo	($h0,$r0,$d0)</div><div class='del'>-	mfhi	($h1,$r0,$d0)</div><div class='del'>-</div><div class='del'>-	 sltu	$h2,$d3,$h2</div><div class='del'>-	 addu	$h3,$h3,$h2		# carry</div><div class='del'>-</div><div class='del'>-	multu	($rs3,$d1)		# d1*s3</div><div class='del'>-	mflo	($at,$rs3,$d1)</div><div class='del'>-	mfhi	($t0,$rs3,$d1)</div><div class='del'>-</div><div class='del'>-	 addu	$h4,$h4,$padbit</div><div class='del'>-	 addiu	$inp,$inp,16</div><div class='del'>-	 addu	$h4,$h4,$h3</div><div class='del'>-</div><div class='del'>-	multu	($rs2,$d2)		# d2*s2</div><div class='del'>-	mflo	($a3,$rs2,$d2)</div><div class='del'>-	mfhi	($t1,$rs2,$d2)</div><div class='del'>-	 addu	$h0,$h0,$at</div><div class='del'>-	 addu	$h1,$h1,$t0</div><div class='del'>-	multu	($rs1,$d3)		# d3*s1</div><div class='del'>-	 sltu	$at,$h0,$at</div><div class='del'>-	 addu	$h1,$h1,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$rs1,$d3)</div><div class='del'>-	mfhi	($t0,$rs1,$d3)</div><div class='del'>-	 addu	$h0,$h0,$a3</div><div class='del'>-	 addu	$h1,$h1,$t1</div><div class='del'>-	multu	($r1,$d0)		# d0*r1</div><div class='del'>-	 sltu	$a3,$h0,$a3</div><div class='del'>-	 addu	$h1,$h1,$a3</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$r1,$d0)</div><div class='del'>-	mfhi	($h2,$r1,$d0)</div><div class='del'>-	 addu	$h0,$h0,$at</div><div class='del'>-	 addu	$h1,$h1,$t0</div><div class='del'>-	multu	($r0,$d1)		# d1*r0</div><div class='del'>-	 sltu	$at,$h0,$at</div><div class='del'>-	 addu	$h1,$h1,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$r0,$d1)</div><div class='del'>-	mfhi	($t0,$r0,$d1)</div><div class='del'>-	 addu	$h1,$h1,$a3</div><div class='del'>-	 sltu	$a3,$h1,$a3</div><div class='del'>-	multu	($rs3,$d2)		# d2*s3</div><div class='del'>-	 addu	$h2,$h2,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$rs3,$d2)</div><div class='del'>-	mfhi	($t1,$rs3,$d2)</div><div class='del'>-	 addu	$h1,$h1,$at</div><div class='del'>-	 addu	$h2,$h2,$t0</div><div class='del'>-	multu	($rs2,$d3)		# d3*s2</div><div class='del'>-	 sltu	$at,$h1,$at</div><div class='del'>-	 addu	$h2,$h2,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$rs2,$d3)</div><div class='del'>-	mfhi	($t0,$rs2,$d3)</div><div class='del'>-	 addu	$h1,$h1,$a3</div><div class='del'>-	 addu	$h2,$h2,$t1</div><div class='del'>-	multu	($rs1,$h4)		# h4*s1</div><div class='del'>-	 sltu	$a3,$h1,$a3</div><div class='del'>-	 addu	$h2,$h2,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$rs1,$h4)</div><div class='del'>-	 addu	$h1,$h1,$at</div><div class='del'>-	 addu	$h2,$h2,$t0</div><div class='del'>-	multu	($r2,$d0)		# d0*r2</div><div class='del'>-	 sltu	$at,$h1,$at</div><div class='del'>-	 addu	$h2,$h2,$at</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	mflo	($at,$r2,$d0)</div><div class='del'>-	mfhi	($h3,$r2,$d0)</div><div class='del'>-	 addu	$h1,$h1,$a3</div><div class='del'>-	 sltu	$a3,$h1,$a3</div><div class='del'>-	multu	($r1,$d1)		# d1*r1</div><div class='del'>-	 addu	$h2,$h2,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$r1,$d1)</div><div class='del'>-	mfhi	($t1,$r1,$d1)</div><div class='del'>-	 addu	$h2,$h2,$at</div><div class='del'>-	 sltu	$at,$h2,$at</div><div class='del'>-	multu	($r0,$d2)		# d2*r0</div><div class='del'>-	 addu	$h3,$h3,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$r0,$d2)</div><div class='del'>-	mfhi	($t0,$r0,$d2)</div><div class='del'>-	 addu	$h2,$h2,$a3</div><div class='del'>-	 addu	$h3,$h3,$t1</div><div class='del'>-	multu	($rs3,$d3)		# d3*s3</div><div class='del'>-	 sltu	$a3,$h2,$a3</div><div class='del'>-	 addu	$h3,$h3,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$rs3,$d3)</div><div class='del'>-	mfhi	($t1,$rs3,$d3)</div><div class='del'>-	 addu	$h2,$h2,$at</div><div class='del'>-	 addu	$h3,$h3,$t0</div><div class='del'>-	multu	($rs2,$h4)		# h4*s2</div><div class='del'>-	 sltu	$at,$h2,$at</div><div class='del'>-	 addu	$h3,$h3,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$rs2,$h4)</div><div class='del'>-	 addu	$h2,$h2,$a3</div><div class='del'>-	 addu	$h3,$h3,$t1</div><div class='del'>-	multu	($r3,$d0)		# d0*r3</div><div class='del'>-	 sltu	$a3,$h2,$a3</div><div class='del'>-	 addu	$h3,$h3,$a3</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$r3,$d0)</div><div class='del'>-	mfhi	($t1,$r3,$d0)</div><div class='del'>-	 addu	$h2,$h2,$at</div><div class='del'>-	 sltu	$at,$h2,$at</div><div class='del'>-	multu	($r2,$d1)		# d1*r2</div><div class='del'>-	 addu	$h3,$h3,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$r2,$d1)</div><div class='del'>-	mfhi	($t0,$r2,$d1)</div><div class='del'>-	 addu	$h3,$h3,$a3</div><div class='del'>-	 sltu	$a3,$h3,$a3</div><div class='del'>-	multu	($r0,$d3)		# d3*r0</div><div class='del'>-	 addu	$t1,$t1,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$r0,$d3)</div><div class='del'>-	mfhi	($d3,$r0,$d3)</div><div class='del'>-	 addu	$h3,$h3,$at</div><div class='del'>-	 addu	$t1,$t1,$t0</div><div class='del'>-	multu	($r1,$d2)		# d2*r1</div><div class='del'>-	 sltu	$at,$h3,$at</div><div class='del'>-	 addu	$t1,$t1,$at</div><div class='del'>-</div><div class='del'>-	mflo	($at,$r1,$d2)</div><div class='del'>-	mfhi	($t0,$r1,$d2)</div><div class='del'>-	 addu	$h3,$h3,$a3</div><div class='del'>-	 addu	$t1,$t1,$d3</div><div class='del'>-	multu	($rs3,$h4)		# h4*s3</div><div class='del'>-	 sltu	$a3,$h3,$a3</div><div class='del'>-	 addu	$t1,$t1,$a3</div><div class='del'>-</div><div class='del'>-	mflo	($a3,$rs3,$h4)</div><div class='del'>-	 addu	$h3,$h3,$at</div><div class='del'>-	 addu	$t1,$t1,$t0</div><div class='del'>-	multu	($r0,$h4)		# h4*r0</div><div class='del'>-	 sltu	$at,$h3,$at</div><div class='del'>-	 addu	$t1,$t1,$at</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	mflo	($h4,$r0,$h4)</div><div class='del'>-	 addu	$h3,$h3,$a3</div><div class='del'>-	 sltu	$a3,$h3,$a3</div><div class='del'>-	 addu	$t1,$t1,$a3</div><div class='del'>-	addu	$h4,$h4,$t1</div><div class='del'>-</div><div class='del'>-	li	$padbit,1		# if we loop, padbit is 1</div><div class='del'>-#endif</div><div class='del'>-	bne	$inp,$len,.Loop</div><div class='del'>-</div><div class='del'>-	sw	$h0,0($ctx)		# store hash value</div><div class='del'>-	sw	$h1,4($ctx)</div><div class='del'>-	sw	$h2,8($ctx)</div><div class='del'>-	sw	$h3,12($ctx)</div><div class='del'>-	sw	$h4,16($ctx)</div><div class='del'>-</div><div class='del'>-	.set	noreorder</div><div class='del'>-.Labort:</div><div class='del'>-	lw	$s11,4*11($sp)</div><div class='del'>-	lw	$s10,4*10($sp)</div><div class='del'>-	lw	$s9, 4*9($sp)</div><div class='del'>-	lw	$s8, 4*8($sp)</div><div class='del'>-	lw	$s7, 4*7($sp)</div><div class='del'>-	lw	$s6, 4*6($sp)</div><div class='del'>-	lw	$s5, 4*5($sp)</div><div class='del'>-	lw	$s4, 4*4($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___ if ($flavour =~ /nubi/i);	# optimize non-nubi prologue</div><div class='del'>-	lw	$s3, 4*3($sp)</div><div class='del'>-	lw	$s2, 4*2($sp)</div><div class='del'>-	lw	$s1, 4*1($sp)</div><div class='del'>-	lw	$s0, 4*0($sp)</div><div class='del'>-___</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-	jr	$ra</div><div class='del'>-	addu	$sp,$sp,4*12</div><div class='del'>-.end	poly1305_blocks</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-{</div><div class='del'>-my ($ctx,$mac,$nonce,$tmp4) = ($a0,$a1,$a2,$a3);</div><div class='del'>-</div><div class='del'>-$code.=&lt;&lt;___;</div><div class='del'>-.align	5</div><div class='del'>-.globl	poly1305_emit</div><div class='del'>-.ent	poly1305_emit</div><div class='del'>-poly1305_emit:</div><div class='del'>-	.frame	$sp,0,$ra</div><div class='del'>-	.set	reorder</div><div class='del'>-</div><div class='del'>-	lw	$tmp4,16($ctx)</div><div class='del'>-	lw	$tmp0,0($ctx)</div><div class='del'>-	lw	$tmp1,4($ctx)</div><div class='del'>-	lw	$tmp2,8($ctx)</div><div class='del'>-	lw	$tmp3,12($ctx)</div><div class='del'>-</div><div class='del'>-	li	$in0,-4			# final reduction</div><div class='del'>-	srl	$ctx,$tmp4,2</div><div class='del'>-	and	$in0,$in0,$tmp4</div><div class='del'>-	andi	$tmp4,$tmp4,3</div><div class='del'>-	addu	$ctx,$ctx,$in0</div><div class='del'>-</div><div class='del'>-	addu	$tmp0,$tmp0,$ctx</div><div class='del'>-	sltu	$ctx,$tmp0,$ctx</div><div class='del'>-	 addiu	$in0,$tmp0,5		# compare to modulus</div><div class='del'>-	addu	$tmp1,$tmp1,$ctx</div><div class='del'>-	 sltiu	$in1,$in0,5</div><div class='del'>-	sltu	$ctx,$tmp1,$ctx</div><div class='del'>-	 addu	$in1,$in1,$tmp1</div><div class='del'>-	addu	$tmp2,$tmp2,$ctx</div><div class='del'>-	 sltu	$in2,$in1,$tmp1</div><div class='del'>-	sltu	$ctx,$tmp2,$ctx</div><div class='del'>-	 addu	$in2,$in2,$tmp2</div><div class='del'>-	addu	$tmp3,$tmp3,$ctx</div><div class='del'>-	 sltu	$in3,$in2,$tmp2</div><div class='del'>-	sltu	$ctx,$tmp3,$ctx</div><div class='del'>-	 addu	$in3,$in3,$tmp3</div><div class='del'>-	addu	$tmp4,$tmp4,$ctx</div><div class='del'>-	 sltu	$ctx,$in3,$tmp3</div><div class='del'>-	 addu	$ctx,$tmp4</div><div class='del'>-</div><div class='del'>-	srl	$ctx,2			# see if it carried/borrowed</div><div class='del'>-	subu	$ctx,$zero,$ctx</div><div class='del'>-</div><div class='del'>-	xor	$in0,$tmp0</div><div class='del'>-	xor	$in1,$tmp1</div><div class='del'>-	xor	$in2,$tmp2</div><div class='del'>-	xor	$in3,$tmp3</div><div class='del'>-	and	$in0,$ctx</div><div class='del'>-	and	$in1,$ctx</div><div class='del'>-	and	$in2,$ctx</div><div class='del'>-	and	$in3,$ctx</div><div class='del'>-	xor	$in0,$tmp0</div><div class='del'>-	xor	$in1,$tmp1</div><div class='del'>-	xor	$in2,$tmp2</div><div class='del'>-	xor	$in3,$tmp3</div><div class='del'>-</div><div class='del'>-	lw	$tmp0,0($nonce)		# load nonce</div><div class='del'>-	lw	$tmp1,4($nonce)</div><div class='del'>-	lw	$tmp2,8($nonce)</div><div class='del'>-	lw	$tmp3,12($nonce)</div><div class='del'>-</div><div class='del'>-	addu	$in0,$tmp0		# accumulate nonce</div><div class='del'>-	sltu	$ctx,$in0,$tmp0</div><div class='del'>-</div><div class='del'>-	addu	$in1,$tmp1</div><div class='del'>-	sltu	$tmp1,$in1,$tmp1</div><div class='del'>-	addu	$in1,$ctx</div><div class='del'>-	sltu	$ctx,$in1,$ctx</div><div class='del'>-	addu	$ctx,$tmp1</div><div class='del'>-</div><div class='del'>-	addu	$in2,$tmp2</div><div class='del'>-	sltu	$tmp2,$in2,$tmp2</div><div class='del'>-	addu	$in2,$ctx</div><div class='del'>-	sltu	$ctx,$in2,$ctx</div><div class='del'>-	addu	$ctx,$tmp2</div><div class='del'>-</div><div class='del'>-	addu	$in3,$tmp3</div><div class='del'>-	addu	$in3,$ctx</div><div class='del'>-</div><div class='del'>-	srl	$tmp0,$in0,8		# write mac value</div><div class='del'>-	srl	$tmp1,$in0,16</div><div class='del'>-	srl	$tmp2,$in0,24</div><div class='del'>-	sb	$in0, 0($mac)</div><div class='del'>-	sb	$tmp0,1($mac)</div><div class='del'>-	srl	$tmp0,$in1,8</div><div class='del'>-	sb	$tmp1,2($mac)</div><div class='del'>-	srl	$tmp1,$in1,16</div><div class='del'>-	sb	$tmp2,3($mac)</div><div class='del'>-	srl	$tmp2,$in1,24</div><div class='del'>-	sb	$in1, 4($mac)</div><div class='del'>-	sb	$tmp0,5($mac)</div><div class='del'>-	srl	$tmp0,$in2,8</div><div class='del'>-	sb	$tmp1,6($mac)</div><div class='del'>-	srl	$tmp1,$in2,16</div><div class='del'>-	sb	$tmp2,7($mac)</div><div class='del'>-	srl	$tmp2,$in2,24</div><div class='del'>-	sb	$in2, 8($mac)</div><div class='del'>-	sb	$tmp0,9($mac)</div><div class='del'>-	srl	$tmp0,$in3,8</div><div class='del'>-	sb	$tmp1,10($mac)</div><div class='del'>-	srl	$tmp1,$in3,16</div><div class='del'>-	sb	$tmp2,11($mac)</div><div class='del'>-	srl	$tmp2,$in3,24</div><div class='del'>-	sb	$in3, 12($mac)</div><div class='del'>-	sb	$tmp0,13($mac)</div><div class='del'>-	sb	$tmp1,14($mac)</div><div class='del'>-	sb	$tmp2,15($mac)</div><div class='del'>-</div><div class='del'>-	jr	$ra</div><div class='del'>-.end	poly1305_emit</div><div class='del'>-.rdata</div><div class='del'>-.asciiz	"Poly1305 for MIPS32, CRYPTOGAMS by \@dot-asm"</div><div class='del'>-.align	2</div><div class='del'>-___</div><div class='del'>-}</div><div class='del'>-}}}</div><div class='del'>-</div><div class='del'>-$output=pop and open STDOUT,"&gt;$output";</div><div class='del'>-print $code;</div><div class='del'>-close STDOUT;</div><div class='head'>diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c<br/>index cb12eb211a49..8d74d7d6c05b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/dec/prom/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/dec/prom/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/dec/prom/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/dec/prom/init.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@ int (*__pmax_close)(int);</div><div class='ctx'>  * Detect which PROM the DECSTATION has, and set the callback vectors</div><div class='ctx'>  * appropriately.</div><div class='ctx'>  */</div><div class='del'>-void __init which_prom(s32 magic, s32 *prom_vec)</div><div class='add'>+static void __init which_prom(s32 magic, s32 *prom_vec)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * No sign of the REX PROM's magic number means we assume a non-REX</div><div class='head'>diff --git a/arch/mips/econet/Kconfig b/arch/mips/econet/Kconfig<br/>new file mode 100644<br/>index 000000000000..fd69884cc9a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/econet/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/econet/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+if ECONET</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "EcoNet SoC selection"</div><div class='add'>+	default SOC_ECONET_EN751221</div><div class='add'>+	help</div><div class='add'>+	  Select EcoNet MIPS SoC type. Individual SoCs within a family are</div><div class='add'>+	  very similar, so is it enough to select the right family, and</div><div class='add'>+	  then customize to the specific SoC using the device tree only.</div><div class='add'>+</div><div class='add'>+	config SOC_ECONET_EN751221</div><div class='add'>+		bool "EN751221 family"</div><div class='add'>+		select COMMON_CLK</div><div class='add'>+		select ECONET_EN751221_INTC</div><div class='add'>+		select IRQ_MIPS_CPU</div><div class='add'>+		select SMP</div><div class='add'>+		select SMP_UP</div><div class='add'>+		select SYS_SUPPORTS_SMP</div><div class='add'>+		help</div><div class='add'>+		  The EN751221 family includes EN7512, RN7513, EN7521, EN7526.</div><div class='add'>+		  They are based on single core MIPS 34Kc processors. To boot</div><div class='add'>+		  this kernel, you will need a device tree such as</div><div class='add'>+		  MIPS_RAW_APPENDED_DTB=y, and a root filesystem.</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "Devicetree selection"</div><div class='add'>+	default DTB_ECONET_NONE</div><div class='add'>+	help</div><div class='add'>+	  Select the devicetree.</div><div class='add'>+</div><div class='add'>+	config DTB_ECONET_NONE</div><div class='add'>+		bool "None"</div><div class='add'>+</div><div class='add'>+	config DTB_ECONET_SMARTFIBER_XP8421_B</div><div class='add'>+		bool "EN751221 SmartFiber XP8421-B"</div><div class='add'>+		depends on SOC_ECONET_EN751221</div><div class='add'>+		select BUILTIN_DTB</div><div class='add'>+		help</div><div class='add'>+		  The SmartFiber XP8421-B is a device based on the EN751221 SoC.</div><div class='add'>+		  It has 512MB of memory and 256MB of NAND flash. This kernel</div><div class='add'>+		  needs only an appended initramfs to boot. It can be loaded</div><div class='add'>+		  through XMODEM and booted from memory in the bootloader, or</div><div class='add'>+		  it can be packed in tclinux.trx format and written to flash.</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/mips/econet/Makefile b/arch/mips/econet/Makefile<br/>new file mode 100644<br/>index 000000000000..7e4529e7d3d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/econet/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/econet/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+</div><div class='add'>+obj-y := init.o</div><div class='head'>diff --git a/arch/mips/econet/Platform b/arch/mips/econet/Platform<br/>new file mode 100644<br/>index 000000000000..ea5616447bcd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/econet/Platform?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/econet/Platform</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+# To address a 7.2MB kernel size limit in the EcoNet SDK bootloader,</div><div class='add'>+# we put the load address well above where the bootloader loads and then use</div><div class='add'>+# zboot. So please set CONFIG_ZBOOT_LOAD_ADDRESS to the address where your</div><div class='add'>+# bootloader actually places the kernel.</div><div class='add'>+load-$(CONFIG_ECONET)	+= 0xffffffff81000000</div><div class='head'>diff --git a/arch/mips/econet/init.c b/arch/mips/econet/init.c<br/>new file mode 100644<br/>index 000000000000..6f43ffb209cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/econet/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/econet/init.c</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * EcoNet setup code</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Caleb James DeLisle &lt;cjd@cjdns.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/of_clk.h&gt;</div><div class='add'>+#include &lt;linux/irqchip.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/addrspace.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/bootinfo.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/smp-ops.h&gt;</div><div class='add'>+#include &lt;asm/reboot.h&gt;</div><div class='add'>+</div><div class='add'>+#define CR_AHB_RSTCR		((void __iomem *)CKSEG1ADDR(0x1fb00040))</div><div class='add'>+#define RESET			BIT(31)</div><div class='add'>+</div><div class='add'>+#define UART_BASE		CKSEG1ADDR(0x1fbf0003)</div><div class='add'>+#define UART_REG_SHIFT		2</div><div class='add'>+</div><div class='add'>+static void hw_reset(char *command)</div><div class='add'>+{</div><div class='add'>+	iowrite32(RESET, CR_AHB_RSTCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 1. Bring up early printk. */</div><div class='add'>+void __init prom_init(void)</div><div class='add'>+{</div><div class='add'>+	setup_8250_early_printk_port(UART_BASE, UART_REG_SHIFT, 0);</div><div class='add'>+	_machine_restart = hw_reset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 2. Parse the DT and find memory */</div><div class='add'>+void __init plat_mem_setup(void)</div><div class='add'>+{</div><div class='add'>+	void *dtb;</div><div class='add'>+</div><div class='add'>+	set_io_port_base(KSEG1);</div><div class='add'>+</div><div class='add'>+	dtb = get_fdt();</div><div class='add'>+	if (!dtb)</div><div class='add'>+		panic("no dtb found");</div><div class='add'>+</div><div class='add'>+	__dt_setup_arch(dtb);</div><div class='add'>+</div><div class='add'>+	early_init_dt_scan_memory();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 3. Overload __weak device_tree_init(), add SMP_UP ops */</div><div class='add'>+void __init device_tree_init(void)</div><div class='add'>+{</div><div class='add'>+	unflatten_and_copy_device_tree();</div><div class='add'>+</div><div class='add'>+	register_up_smp_ops();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const char *get_system_type(void)</div><div class='add'>+{</div><div class='add'>+	return "EcoNet-EN75xx";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 4. Initialize the IRQ subsystem */</div><div class='add'>+void __init arch_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	irqchip_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 5. Timers */</div><div class='add'>+void __init plat_time_init(void)</div><div class='add'>+{</div><div class='add'>+	of_clk_init(NULL);</div><div class='add'>+	timer_probe();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/fw/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c<br/>index 155c5e911723..86b0e377b713 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/fw/arc/cmdline.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/fw/arc/cmdline.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/fw/arc/cmdline.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/fw/arc/cmdline.c</a></div><div class='hunk'>@@ -42,12 +42,13 @@ static char __init *move_firmware_args(int argc, LONG *argv, char *cp)</div><div class='ctx'> {</div><div class='ctx'> 	char *s;</div><div class='ctx'> 	int actr, i;</div><div class='add'>+	size_t len;</div><div class='ctx'> </div><div class='ctx'> 	actr = 1; /* Always ignore argv[0] */</div><div class='ctx'> </div><div class='ctx'> 	while (actr &lt; argc) {</div><div class='del'>-		for(i = 0; i &lt; ARRAY_SIZE(used_arc); i++) {</div><div class='del'>-			int len = strlen(used_arc[i][0]);</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(used_arc); i++) {</div><div class='add'>+			len = strlen(used_arc[i][0]);</div><div class='ctx'> </div><div class='ctx'> 			if (!strncmp(prom_argv(actr), used_arc[i][0], len)) {</div><div class='ctx'> 			/* Ok, we want it. First append the replacement... */</div><div class='hunk'>@@ -57,8 +58,9 @@ static char __init *move_firmware_args(int argc, LONG *argv, char *cp)</div><div class='ctx'> 				s = strchr(prom_argv(actr), '=');</div><div class='ctx'> 				if (s) {</div><div class='ctx'> 					s++;</div><div class='del'>-					strcpy(cp, s);</div><div class='del'>-					cp += strlen(s);</div><div class='add'>+					len = strlen(s);</div><div class='add'>+					memcpy(cp, s, len + 1);</div><div class='add'>+					cp += len;</div><div class='ctx'> 				}</div><div class='ctx'> 				*cp++ = ' ';</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -74,6 +76,7 @@ void __init prom_init_cmdline(int argc, LONG *argv)</div><div class='ctx'> {</div><div class='ctx'> 	char *cp;</div><div class='ctx'> 	int actr, i;</div><div class='add'>+	size_t len;</div><div class='ctx'> </div><div class='ctx'> 	actr = 1; /* Always ignore argv[0] */</div><div class='ctx'> </div><div class='hunk'>@@ -86,14 +89,15 @@ void __init prom_init_cmdline(int argc, LONG *argv)</div><div class='ctx'> </div><div class='ctx'> 	while (actr &lt; argc) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(ignored); i++) {</div><div class='del'>-			int len = strlen(ignored[i]);</div><div class='del'>-</div><div class='add'>+			len = strlen(ignored[i]);</div><div class='ctx'> 			if (!strncmp(prom_argv(actr), ignored[i], len))</div><div class='ctx'> 				goto pic_cont;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		/* Ok, we want it. */</div><div class='del'>-		strcpy(cp, prom_argv(actr));</div><div class='del'>-		cp += strlen(prom_argv(actr));</div><div class='add'>+		len = strlen(prom_argv(actr));</div><div class='add'>+		memcpy(cp, prom_argv(actr), len + 1);</div><div class='add'>+		cp += len;</div><div class='ctx'> 		*cp++ = ' ';</div><div class='ctx'> </div><div class='ctx'> 	pic_cont:</div><div class='hunk'>@@ -105,6 +109,6 @@ void __init prom_init_cmdline(int argc, LONG *argv)</div><div class='ctx'> 	*cp = '\0';</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_CMDLINE</div><div class='del'>-	printk(KERN_DEBUG "prom cmdline: %s\n", arcs_cmdline);</div><div class='add'>+	pr_debug("prom cmdline: %s\n", arcs_cmdline);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/generic/board-ocelot.c b/arch/mips/generic/board-ocelot.c<br/>index 7115410acb4f..59a0fb243582 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/generic/board-ocelot.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/generic/board-ocelot.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/generic/board-ocelot.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/generic/board-ocelot.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2017 Microsemi Corporation</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/machine.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +42,7 @@ static __init bool ocelot_detect(void)</div><div class='ctx'> </div><div class='ctx'> 		if (prom_argc &gt; 1 &amp;&amp; strlen(prom_argv[1]) &gt; 0)</div><div class='ctx'> 			/* ignore all built-in args if any f/w args given */</div><div class='del'>-			strcpy(arcs_cmdline, prom_argv[1]);</div><div class='add'>+			strscpy(arcs_cmdline, prom_argv[1]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='head'>diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild<br/>index 7ba67a0d6c97..684569b2ecd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/Kbuild</a></div><div class='hunk'>@@ -13,3 +13,4 @@ generic-y += parport.h</div><div class='ctx'> generic-y += qrwlock.h</div><div class='ctx'> generic-y += qspinlock.h</div><div class='ctx'> generic-y += user.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h<br/>index 7e9ef01cb182..e2354e9b0ee2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/addrspace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/addrspace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/addrspace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/addrspace.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Configure language</div><div class='ctx'>  */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ATYPE_</div><div class='ctx'> #define _ATYPE32_</div><div class='ctx'> #define _ATYPE64_</div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  32-bit MIPS address spaces</div><div class='ctx'>  */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ACAST32_</div><div class='ctx'> #define _ACAST64_</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/mips/include/asm/asm-eva.h b/arch/mips/include/asm/asm-eva.h<br/>index e327ebc76753..220431d00ee9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/asm-eva.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/asm-eva.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/asm-eva.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/asm-eva.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #ifndef __ASM_ASM_EVA_H</div><div class='ctx'> #define __ASM_ASM_EVA_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Kernel variants */</div><div class='ctx'> </div><div class='hunk'>@@ -99,7 +99,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_EVA */</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define kernel_cache(op, base)		cache op, base</div><div class='ctx'> #define kernel_pref(hint, base)		pref hint, base</div><div class='hunk'>@@ -185,6 +185,6 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_EVA */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ASM_EVA_H */</div><div class='head'>diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h<br/>index 87ff609b53fe..0ed19ffed076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/asm.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define CFI_SECTIONS</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * LEAF - declare leaf routine</div><div class='ctx'>  */</div><div class='hunk'>@@ -123,7 +123,7 @@ symbol		=	value</div><div class='ctx'> #define ASM_PRINT(string)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Stack alignment</div><div class='hunk'>@@ -228,7 +228,7 @@ symbol		=	value</div><div class='ctx'> #define LONG_INS	ins</div><div class='ctx'> #define LONG_EXT	ext</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define LONG		.word</div><div class='ctx'> #endif</div><div class='ctx'> #define LONGSIZE	4</div><div class='hunk'>@@ -257,7 +257,7 @@ symbol		=	value</div><div class='ctx'> #define LONG_INS	dins</div><div class='ctx'> #define LONG_EXT	dext</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define LONG		.dword</div><div class='ctx'> #endif</div><div class='ctx'> #define LONGSIZE	8</div><div class='head'>diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h<br/>index 89f73d1a4ea4..42f88452c920 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/bitops.h</a></div><div class='hunk'>@@ -327,7 +327,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *</div><div class='ctx'>  * Return the bit position (0..63) of the most significant 1 bit in a word</div><div class='ctx'>  * Returns -1 if no 1 bit exists</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned long __fls(unsigned long word)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long __fls(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	int num;</div><div class='ctx'> </div><div class='hunk'>@@ -393,7 +393,7 @@ static __always_inline unsigned long __fls(unsigned long word)</div><div class='ctx'>  * Returns 0..SZLONG-1</div><div class='ctx'>  * Undefined if no bit exists, so code should check against 0 first.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned long __ffs(unsigned long word)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long __ffs(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	return __fls(word &amp; -word);</div><div class='ctx'> }</div><div class='hunk'>@@ -405,7 +405,7 @@ static __always_inline unsigned long __ffs(unsigned long word)</div><div class='ctx'>  * This is defined the same way as ffs.</div><div class='ctx'>  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.</div><div class='ctx'>  */</div><div class='del'>-static inline int fls(unsigned int x)</div><div class='add'>+static inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -458,7 +458,7 @@ static inline int fls(unsigned int x)</div><div class='ctx'>  * the libc and compiler builtin ffs routines, therefore</div><div class='ctx'>  * differs in spirit from the below ffz (man ffs).</div><div class='ctx'>  */</div><div class='del'>-static inline int ffs(int word)</div><div class='add'>+static inline __attribute_const__ int ffs(int word)</div><div class='ctx'> {</div><div class='ctx'> 	if (!word)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h<br/>index 3a1cdfddb987..0eee81be9e2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/bmips.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/bmips.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/bmips.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/bmips.h</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ZSCM_REG_BASE			0x97000000</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;asm/r4kcache.h&gt;</div><div class='hunk'>@@ -124,6 +124,6 @@ static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(__ASSEMBLY__) */</div><div class='add'>+#endif /* !defined(__ASSEMBLER__) */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_BMIPS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h<br/>index 1f14132b3fc9..5099c1b65a58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cacheflush.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cacheflush.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -37,11 +37,11 @@</div><div class='ctx'> #define PG_dcache_dirty			PG_arch_1</div><div class='ctx'> </div><div class='ctx'> #define folio_test_dcache_dirty(folio)		\</div><div class='del'>-	test_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags)</div><div class='add'>+	test_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags.f)</div><div class='ctx'> #define folio_set_dcache_dirty(folio)	\</div><div class='del'>-	set_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags)</div><div class='add'>+	set_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags.f)</div><div class='ctx'> #define folio_clear_dcache_dirty(folio)	\</div><div class='del'>-	clear_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags)</div><div class='add'>+	clear_bit(PG_dcache_dirty, &amp;(folio)-&gt;flags.f)</div><div class='ctx'> </div><div class='ctx'> extern void (*flush_cache_all)(void);</div><div class='ctx'> extern void (*__flush_cache_all)(void);</div><div class='hunk'>@@ -50,13 +50,14 @@ extern void (*flush_cache_mm)(struct mm_struct *mm);</div><div class='ctx'> extern void (*flush_cache_range)(struct vm_area_struct *vma,</div><div class='ctx'> 	unsigned long start, unsigned long end);</div><div class='ctx'> extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);</div><div class='del'>-extern void __flush_dcache_pages(struct page *page, unsigned int nr);</div><div class='add'>+void __flush_dcache_folio_pages(struct folio *folio, struct page *page, unsigned int nr);</div><div class='ctx'> </div><div class='ctx'> #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1</div><div class='ctx'> static inline void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu_has_dc_aliases)</div><div class='del'>-		__flush_dcache_pages(&amp;folio-&gt;page, folio_nr_pages(folio));</div><div class='add'>+		__flush_dcache_folio_pages(folio, folio_page(folio, 0),</div><div class='add'>+					   folio_nr_pages(folio));</div><div class='ctx'> 	else if (!cpu_has_ic_fills_f_dc)</div><div class='ctx'> 		folio_set_dcache_dirty(folio);</div><div class='ctx'> }</div><div class='hunk'>@@ -64,10 +65,12 @@ static inline void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> </div><div class='ctx'> static inline void flush_dcache_page(struct page *page)</div><div class='ctx'> {</div><div class='add'>+	struct folio *folio = page_folio(page);</div><div class='add'>+</div><div class='ctx'> 	if (cpu_has_dc_aliases)</div><div class='del'>-		__flush_dcache_pages(page, 1);</div><div class='add'>+		__flush_dcache_folio_pages(folio, page, 1);</div><div class='ctx'> 	else if (!cpu_has_ic_fills_f_dc)</div><div class='del'>-		folio_set_dcache_dirty(page_folio(page));</div><div class='add'>+		folio_set_dcache_dirty(folio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define flush_dcache_mmap_lock(mapping)		do { } while (0)</div><div class='head'>diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h<br/>index a600670d00e9..fd60837ce50b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu-info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu-info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu-info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/cpu-info.h</a></div><div class='hunk'>@@ -123,6 +123,7 @@ extern struct cpuinfo_mips cpu_data[];</div><div class='ctx'> </div><div class='ctx'> extern void cpu_probe(void);</div><div class='ctx'> extern void cpu_report(void);</div><div class='add'>+extern void cpu_disable_mmid(void);</div><div class='ctx'> </div><div class='ctx'> extern const char *__cpu_name[];</div><div class='ctx'> #define cpu_name_string()	__cpu_name[raw_smp_processor_id()]</div><div class='head'>diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h<br/>index a4a66bd93748..fd37a44a2f19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu-type.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu-type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu-type.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/cpu-type.h</a></div><div class='hunk'>@@ -24,8 +24,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)</div><div class='ctx'> 	case CPU_LOONGSON64:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SYS_HAS_CPU_LOONGSON1B) || \</div><div class='del'>-    defined(CONFIG_SYS_HAS_CPU_LOONGSON1C)</div><div class='add'>+#ifdef CONFIG_SYS_HAS_CPU_LOONGSON32</div><div class='ctx'> 	case CPU_LOONGSON32:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h<br/>index ecb9854cb432..0fd9f9bbd21f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/cpu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/cpu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/cpu.h</a></div><div class='hunk'>@@ -248,8 +248,7 @@</div><div class='ctx'> #define PRID_REV_VR4181A		0x0070	/* Same as VR4122 */</div><div class='ctx'> #define PRID_REV_VR4130			0x0080</div><div class='ctx'> #define PRID_REV_34K_V1_0_2		0x0022</div><div class='del'>-#define PRID_REV_LOONGSON1B		0x0020</div><div class='del'>-#define PRID_REV_LOONGSON1C		0x0020	/* Same as Loongson-1B */</div><div class='add'>+#define PRID_REV_LOONGSON1		0x0020</div><div class='ctx'> #define PRID_REV_LOONGSON2E		0x0002</div><div class='ctx'> #define PRID_REV_LOONGSON2F		0x0003</div><div class='ctx'> #define PRID_REV_LOONGSON2K_R1_0	0x0000</div><div class='hunk'>@@ -288,7 +287,7 @@</div><div class='ctx'> </div><div class='ctx'> #define FPIR_IMP_NONE		0x0000</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> enum cpu_type_enum {</div><div class='ctx'> 	CPU_UNKNOWN,</div><div class='hunk'>@@ -329,7 +328,7 @@ enum cpu_type_enum {</div><div class='ctx'> 	CPU_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ISA Level encodings</div><div class='head'>diff --git a/arch/mips/include/asm/dec/ecc.h b/arch/mips/include/asm/dec/ecc.h<br/>index c3a3f71f1a54..dbc39643c31c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/ecc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/ecc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/ecc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/dec/ecc.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define KN0X_ESR_SYNLO		(0x7f&lt;&lt;0)	/* syndrome from ECC logic */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/dec/interrupts.h b/arch/mips/include/asm/dec/interrupts.h<br/>index e10d341067c8..c1cd36c04b6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/interrupts.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/interrupts.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/interrupts.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/dec/interrupts.h</a></div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> #define DEC_CPU_IRQ_ALL		(0xff &lt;&lt; CAUSEB_IP)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Interrupt table structures to hide differences between systems.</div><div class='hunk'>@@ -121,6 +121,6 @@ extern void cpu_all_int(void);</div><div class='ctx'> extern void dec_intr_unimplemented(void);</div><div class='ctx'> extern void asic_intr_unimplemented(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/dec/kn01.h b/arch/mips/include/asm/dec/kn01.h<br/>index 88d9ffd74258..6c074b93a7db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn01.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn01.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn01.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/dec/kn01.h</a></div><div class='hunk'>@@ -71,7 +71,7 @@</div><div class='ctx'> #define KN01_CSR_LEDS		(0xff&lt;&lt;0) /* ~diagnostic LEDs (w/o) */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/dec/kn02.h b/arch/mips/include/asm/dec/kn02.h<br/>index 93430b5f4724..9fea17020079 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn02.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn02.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn02.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/dec/kn02.h</a></div><div class='hunk'>@@ -80,7 +80,7 @@</div><div class='ctx'> #define KN02_IRQ_ALL		0xff</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/dec/kn02xa.h b/arch/mips/include/asm/dec/kn02xa.h<br/>index b56b4577f6ef..3580d78b906f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn02xa.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/dec/kn02xa.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/dec/kn02xa.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/dec/kn02xa.h</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> #define KN02XA_EAR_RES_0	(0x3&lt;&lt;0)	/* unused */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/ds1287.h b/arch/mips/include/asm/ds1287.h<br/>index 46cfb01f9a14..51cb61fd4c03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ds1287.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ds1287.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ds1287.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/ds1287.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #define __ASM_DS1287_H</div><div class='ctx'> </div><div class='ctx'> extern int ds1287_timer_state(void);</div><div class='del'>-extern void ds1287_set_base_clock(unsigned int clock);</div><div class='add'>+extern int ds1287_set_base_clock(unsigned int hz);</div><div class='ctx'> extern int ds1287_clockevent_init(int irq);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/eva.h b/arch/mips/include/asm/eva.h<br/>index a3d1807f227c..c7b39f38634b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/eva.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/eva.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/eva.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/eva.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;kernel-entry-init.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EVA</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +38,6 @@ platform_eva_init</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_EVA */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/floppy.h b/arch/mips/include/asm/floppy.h<br/>index 021d09ae5670..44da2ff91f65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/floppy.h</a></div><div class='hunk'>@@ -34,21 +34,6 @@ static inline void fd_cacheflush(char * addr, long size)</div><div class='ctx'> #define N_FDC 1			/* do you *really* want a second controller? */</div><div class='ctx'> #define N_DRIVE 8</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The DMA channel used by the floppy controller cannot access data at</div><div class='del'>- * addresses &gt;= 16MB</div><div class='del'>- *</div><div class='del'>- * Went back to the 1MB limit, as some people had problems with the floppy</div><div class='del'>- * driver otherwise. It doesn't matter much for performance anyway, as most</div><div class='del'>- * floppy accesses go through the track buffer.</div><div class='del'>- *</div><div class='del'>- * On MIPSes using vdma, this actually means that *all* transfers go thru</div><div class='del'>- * the * track buffer since 0x1000000 is always smaller than KSEG0/1.</div><div class='del'>- * Actually this needs to be a bit more complicated since the so much different</div><div class='del'>- * hardware available with MIPS CPUs ...</div><div class='del'>- */</div><div class='del'>-#define CROSS_64KB(a, s) ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64)</div><div class='del'>-</div><div class='ctx'> #define EXTRA_FLOPPY_PARAMS</div><div class='ctx'> </div><div class='ctx'> #include &lt;floppy.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h<br/>index dc025888f6d2..7d557f03188f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/ftrace.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #define MCOUNT_ADDR ((unsigned long)(_mcount))</div><div class='ctx'> #define MCOUNT_INSN_SIZE 4		/* sizeof mcount call */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void _mcount(void);</div><div class='ctx'> #define mcount _mcount</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +89,22 @@ struct dyn_arch_ftrace {</div><div class='ctx'> void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,</div><div class='ctx'> 			   unsigned long fp);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* CONFIG_FUNCTION_TRACER */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FTRACE_SYSCALLS</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+/*</div><div class='add'>+ * Some syscall entry functions on mips start with "__sys_" (fork and clone,</div><div class='add'>+ * for instance). We should also match the sys_ variant with those.</div><div class='add'>+ */</div><div class='add'>+#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME</div><div class='add'>+static inline bool arch_syscall_match_sym_name(const char *sym,</div><div class='add'>+					       const char *name)</div><div class='add'>+{</div><div class='add'>+	return !strcmp(sym, name) ||</div><div class='add'>+		(!strncmp(sym, "__sys_", 6) &amp;&amp; !strcmp(sym + 6, name + 4));</div><div class='add'>+}</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='add'>+#endif /* CONFIG_FTRACE_SYSCALLS */</div><div class='ctx'> #endif /* _ASM_MIPS_FTRACE_H */</div><div class='head'>diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h<br/>index cb16be93b048..a084b3b3bc81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/hazards.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/hazards.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/hazards.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/hazards.h</a></div><div class='hunk'>@@ -301,7 +301,7 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define _ssnop ___ssnop</div><div class='ctx'> #define	_ehb ___ehb</div><div class='hunk'>@@ -417,6 +417,6 @@ do {									\</div><div class='ctx'>  */</div><div class='ctx'> extern void mips_ihb(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__  */</div><div class='add'>+#endif /* __ASSEMBLER__  */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_HAZARDS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h<br/>index fd69c8808554..8c460ce01ffe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -11,28 +11,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_PREPARE_HUGEPAGE_RANGE</div><div class='del'>-static inline int prepare_hugepage_range(struct file *file,</div><div class='del'>-					 unsigned long addr,</div><div class='del'>-					 unsigned long len)</div><div class='del'>-{</div><div class='del'>-	unsigned long task_size = STACK_TOP;</div><div class='del'>-	struct hstate *h = hstate_file(file);</div><div class='del'>-</div><div class='del'>-	if (len &amp; ~huge_page_mask(h))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (addr &amp; ~huge_page_mask(h))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (len &gt; task_size)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	if (task_size - len &lt; addr)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR</div><div class='ctx'> static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-					    unsigned long addr, pte_t *ptep)</div><div class='add'>+					    unsigned long addr, pte_t *ptep,</div><div class='add'>+					    unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t clear;</div><div class='ctx'> 	pte_t pte = *ptep;</div><div class='hunk'>@@ -47,13 +29,14 @@ static inline pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='ctx'> 					  unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte;</div><div class='add'>+	unsigned long sz = huge_page_size(hstate_vma(vma));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * clear the huge pte entry firstly, so that the other smp threads will</div><div class='ctx'> 	 * not get old pte entry after finishing flush_tlb_page and before</div><div class='ctx'> 	 * setting new huge pte entry</div><div class='ctx'> 	 */</div><div class='del'>-	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep);</div><div class='add'>+	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep, sz);</div><div class='ctx'> 	flush_tlb_page(vma, addr);</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/include/asm/idle.h b/arch/mips/include/asm/idle.h<br/>index 0992cad9c632..c7d75807d13f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/idle.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/idle.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/idle.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/idle.h</a></div><div class='hunk'>@@ -6,11 +6,10 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void (*cpu_wait)(void);</div><div class='del'>-extern void r4k_wait(void);</div><div class='del'>-extern asmlinkage void __r4k_wait(void);</div><div class='add'>+extern asmlinkage void r4k_wait(void);</div><div class='ctx'> extern void r4k_wait_irqoff(void);</div><div class='ctx'> </div><div class='del'>-static inline int using_rollback_handler(void)</div><div class='add'>+static inline int using_skipover_handler(void)</div><div class='ctx'> {</div><div class='ctx'> 	return cpu_wait == r4k_wait;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h<br/>index af58d6ae06b8..980187a83053 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/io.h</a></div><div class='hunk'>@@ -67,17 +67,6 @@ static inline void set_io_port_base(unsigned long base)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Provide the necessary definitions for generic iomap. We make use of</div><div class='del'>- * mips_io_port_base for iomap(), but we don't reserve any low addresses for</div><div class='del'>- * use with I/O ports.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define HAVE_ARCH_PIO_SIZE</div><div class='del'>-#define PIO_OFFSET	mips_io_port_base</div><div class='del'>-#define PIO_MASK	IO_SPACE_LIMIT</div><div class='del'>-#define PIO_RESERVED	0x0UL</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Enforce in-order execution of data I/O.  In the MIPS architecture</div><div class='ctx'>  * these are equivalent to corresponding platform-specific memory</div><div class='ctx'>  * barriers defined in &lt;asm/barrier.h&gt;.  API pinched from PowerPC,</div><div class='hunk'>@@ -125,13 +114,8 @@ static inline unsigned long isa_virt_to_bus(volatile void *address)</div><div class='ctx'> 	return virt_to_phys(address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Change "struct page" to physical address.</div><div class='del'>- */</div><div class='del'>-#define page_to_phys(page)	((dma_addr_t)page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,</div><div class='del'>-		unsigned long prot_val);</div><div class='add'>+			   pgprot_t prot);</div><div class='ctx'> void iounmap(const volatile void __iomem *addr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -146,7 +130,7 @@ void iounmap(const volatile void __iomem *addr);</div><div class='ctx'>  * address.</div><div class='ctx'>  */</div><div class='ctx'> #define ioremap(offset, size)						\</div><div class='del'>-	ioremap_prot((offset), (size), _CACHE_UNCACHED)</div><div class='add'>+	ioremap_prot((offset), (size), __pgprot(_CACHE_UNCACHED))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ioremap_cache -	map bus memory into CPU space</div><div class='hunk'>@@ -164,7 +148,7 @@ void iounmap(const volatile void __iomem *addr);</div><div class='ctx'>  * memory-like regions on I/O busses.</div><div class='ctx'>  */</div><div class='ctx'> #define ioremap_cache(offset, size)					\</div><div class='del'>-	ioremap_prot((offset), (size), _page_cachable_default)</div><div class='add'>+	ioremap_prot((offset), (size), __pgprot(_page_cachable_default))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ioremap_wc     -   map bus memory into CPU space</div><div class='hunk'>@@ -185,7 +169,7 @@ void iounmap(const volatile void __iomem *addr);</div><div class='ctx'>  * _CACHE_UNCACHED option (see cpu_probe() method).</div><div class='ctx'>  */</div><div class='ctx'> #define ioremap_wc(offset, size)					\</div><div class='del'>-	ioremap_prot((offset), (size), boot_cpu_data.writecombine)</div><div class='add'>+	ioremap_prot((offset), (size), __pgprot(boot_cpu_data.writecombine))</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CPU_CAVIUM_OCTEON)</div><div class='ctx'> #define war_io_reorder_wmb()		wmb()</div><div class='hunk'>@@ -402,8 +386,8 @@ static inline void writes##bwlq(volatile void __iomem *mem,		\</div><div class='ctx'> 	}								\</div><div class='ctx'> }									\</div><div class='ctx'> 									\</div><div class='del'>-static inline void reads##bwlq(volatile void __iomem *mem, void *addr,	\</div><div class='del'>-			       unsigned int count)			\</div><div class='add'>+static inline void reads##bwlq(const volatile void __iomem *mem,	\</div><div class='add'>+			       void *addr, unsigned int count)		\</div><div class='ctx'> {									\</div><div class='ctx'> 	volatile type *__addr = addr;					\</div><div class='ctx'> 									\</div><div class='hunk'>@@ -560,6 +544,16 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);</div><div class='ctx'> </div><div class='ctx'> void __ioread64_copy(void *to, const void __iomem *from, size_t count);</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PCI) &amp;&amp; defined(CONFIG_PCI_DRIVERS_LEGACY)</div><div class='add'>+struct pci_dev;</div><div class='add'>+void pci_iounmap(struct pci_dev *dev, void __iomem *addr);</div><div class='add'>+#define pci_iounmap pci_iounmap</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_IOBASE</div><div class='add'>+#define PCI_IOBASE ((void __iomem *)mips_io_port_base)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #include &lt;asm-generic/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void *isa_bus_to_virt(unsigned long address)</div><div class='head'>diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h<br/>index f5b8300f4573..70e5b05fd88b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/irqflags.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/irqflags.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/irqflags.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/irqflags.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef _ASM_IRQFLAGS_H</div><div class='ctx'> #define _ASM_IRQFLAGS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -142,7 +142,7 @@ static inline int arch_irqs_disabled(void)</div><div class='ctx'> 	return arch_irqs_disabled_flags(arch_local_save_flags());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* #ifndef __ASSEMBLY__ */</div><div class='add'>+#endif /* #ifndef __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Do the CPU's IRQ-state tracing from assembly code.</div><div class='head'>diff --git a/arch/mips/include/asm/jazz.h b/arch/mips/include/asm/jazz.h<br/>index a61970d01a81..9356e87dd64b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/jazz.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/jazz.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/jazz.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/jazz.h</a></div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> #define LED_E			0x9e</div><div class='ctx'> #define LED_F			0x8e</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static __inline__ void pica_set_led(unsigned int bits)</div><div class='ctx'> {</div><div class='hunk'>@@ -79,7 +79,7 @@ static __inline__ void pica_set_led(unsigned int bits)</div><div class='ctx'> 	*led_register = bits;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Base address of the Sonic Ethernet adapter in Jazz machines.</div><div class='hunk'>@@ -100,7 +100,7 @@ static __inline__ void pica_set_led(unsigned int bits)</div><div class='ctx'> #define JAZZ_KEYBOARD_DATA	0xe0005000</div><div class='ctx'> #define JAZZ_KEYBOARD_COMMAND	0xe0005001</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='ctx'> 	unsigned char data;</div><div class='hunk'>@@ -121,7 +121,7 @@ typedef struct {</div><div class='ctx'>  */</div><div class='ctx'> #define keyboard_hardware	jazz_keyboard_hardware</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * i8042 keyboard controller for most other Mips machines.</div><div class='hunk'>@@ -154,7 +154,7 @@ typedef struct {</div><div class='ctx'> /*</div><div class='ctx'>  * DRAM configuration register</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef __MIPSEL__</div><div class='ctx'> typedef struct {</div><div class='ctx'> 	unsigned int bank2 : 3;</div><div class='hunk'>@@ -174,7 +174,7 @@ typedef struct {</div><div class='ctx'> 	unsigned int bank2 : 3;</div><div class='ctx'> } dram_configuration;</div><div class='ctx'> #endif</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define PICA_DRAM_CONFIG	0xe00fffe0</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +260,7 @@ typedef struct {</div><div class='ctx'> /*</div><div class='ctx'>  * Access the R4030 DMA and I/O Controller</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline void r4030_delay(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -299,7 +299,7 @@ static inline void r4030_write_reg32(unsigned long addr, unsigned val)</div><div class='ctx'> 	r4030_delay();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define JAZZ_FDC_BASE	0xe0003000</div><div class='ctx'> #define JAZZ_RTC_BASE	0xe0004000</div><div class='head'>diff --git a/arch/mips/include/asm/jump_label.h b/arch/mips/include/asm/jump_label.h<br/>index ff5d388502d4..c1508f88e03e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/jump_label.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #define arch_jump_label_transform_static arch_jump_label_transform</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;asm/isa-rev.h&gt;</div><div class='hunk'>@@ -76,5 +76,5 @@ struct jump_entry {</div><div class='ctx'> 	jump_label_t key;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='add'>+#endif  /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_MIPS_JUMP_LABEL_H */</div><div class='head'>diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h<br/>index f7222eb594ea..c14b10821817 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/kvm_host.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/kvm_host.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -886,7 +886,6 @@ extern unsigned long kvm_mips_get_ramsize(struct kvm *kvm);</div><div class='ctx'> extern int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			     struct kvm_mips_interrupt *irq);</div><div class='ctx'> </div><div class='del'>-static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_free_memslot(struct kvm *kvm,</div><div class='ctx'> 					 struct kvm_memory_slot *slot) {}</div><div class='ctx'> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}</div><div class='head'>diff --git a/arch/mips/include/asm/linkage.h b/arch/mips/include/asm/linkage.h<br/>index 1829c2b6da6c..fd44ba754f1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/linkage.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/linkage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/linkage.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/linkage.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_LINKAGE_H</div><div class='ctx'> #define __ASM_LINKAGE_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-generic/mc146818rtc.h b/arch/mips/include/asm/mach-generic/mc146818rtc.h<br/>index 9c72e540ff56..249279b0494d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-generic/mc146818rtc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-generic/mc146818rtc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-generic/mc146818rtc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-generic/mc146818rtc.h</a></div><div class='hunk'>@@ -29,8 +29,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> #define RTC_ALWAYS_BCD	0</div><div class='ctx'> </div><div class='del'>-#ifndef mc146818_decode_year</div><div class='del'>-#define mc146818_decode_year(year) ((year) &lt; 70 ? (year) + 2000 : (year) + 1900)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* __ASM_MACH_GENERIC_MC146818RTC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h<br/>index f8783d339fb0..6332b6cbf7ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-generic/spaces.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-generic/spaces.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-generic/spaces.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-generic/spaces.h</a></div><div class='hunk'>@@ -21,13 +21,13 @@</div><div class='ctx'> /*</div><div class='ctx'>  * This gives the physical RAM offset.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> # if defined(CONFIG_MIPS_AUTO_PFN_OFFSET)</div><div class='ctx'> #  define PHYS_OFFSET		((unsigned long)PFN_PHYS(ARCH_PFN_OFFSET))</div><div class='ctx'> # elif !defined(PHYS_OFFSET)</div><div class='ctx'> #  define PHYS_OFFSET		_AC(0, UL)</div><div class='ctx'> # endif</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_32BIT</div><div class='ctx'> #define CAC_BASE		_AC(0x80000000, UL)</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h<br/>index ce4e4c6e09e2..50d487a4c95e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2003 Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='ctx'>  *		 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='ctx'>  *		 2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='del'>- *		 2015 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *		 2015 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ip30/spaces.h b/arch/mips/include/asm/mach-ip30/spaces.h<br/>index c8a302dfbe05..d381b93d6ad3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ip30/spaces.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ip30/spaces.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ip30/spaces.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-ip30/spaces.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2016 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ * Copyright (C) 2016 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #ifndef _ASM_MACH_IP30_SPACES_H</div><div class='head'>diff --git a/arch/mips/include/asm/mach-jazz/mc146818rtc.h b/arch/mips/include/asm/mach-jazz/mc146818rtc.h<br/>index 987f727afe25..639bff8ebca3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-jazz/mc146818rtc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-jazz/mc146818rtc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-jazz/mc146818rtc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-jazz/mc146818rtc.h</a></div><div class='hunk'>@@ -33,6 +33,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> #define RTC_ALWAYS_BCD	0</div><div class='ctx'> </div><div class='del'>-#define mc146818_decode_year(year) ((year) + 1980)</div><div class='del'>-</div><div class='ctx'> #endif /* __ASM_MACH_JAZZ_MC146818RTC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h<br/>index c2e0acb755cd..dd9f621d0204 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a></div><div class='hunk'>@@ -99,5 +99,8 @@ extern __iomem void *ltq_cgu_membase;</div><div class='ctx'> extern void ltq_pmu_enable(unsigned int module);</div><div class='ctx'> extern void ltq_pmu_disable(unsigned int module);</div><div class='ctx'> </div><div class='add'>+/* VMMC */</div><div class='add'>+extern unsigned int *ltq_get_cp1_base(void);</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_SOC_TYPE_XWAY */</div><div class='ctx'> #endif /* _LTQ_XWAY_H__ */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h b/arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h<br/>index a0d4b752899e..5dbc9b13d15b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-loongson2ef/cs5536/cs5536_pci.h</a></div><div class='hunk'>@@ -12,12 +12,32 @@</div><div class='ctx'> #ifndef _CS5536_PCI_H</div><div class='ctx'> #define _CS5536_PCI_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pci_regs.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void cs5536_pci_conf_write4(int function, int reg, u32 value);</div><div class='ctx'> extern u32 cs5536_pci_conf_read4(int function, int reg);</div><div class='ctx'> </div><div class='add'>+extern void pci_ehci_write_reg(int reg, u32 value);</div><div class='add'>+extern u32 pci_ehci_read_reg(int reg);</div><div class='add'>+</div><div class='add'>+extern void pci_ide_write_reg(int reg, u32 value);</div><div class='add'>+extern u32 pci_ide_read_reg(int reg);</div><div class='add'>+</div><div class='add'>+extern void pci_acc_write_reg(int reg, u32 value);</div><div class='add'>+extern u32 pci_acc_read_reg(int reg);</div><div class='add'>+</div><div class='add'>+extern void pci_ohci_write_reg(int reg, u32 value);</div><div class='add'>+extern u32 pci_ohci_read_reg(int reg);</div><div class='add'>+</div><div class='add'>+extern void pci_isa_write_bar(int n, u32 value);</div><div class='add'>+extern u32 pci_isa_read_bar(int n);</div><div class='add'>+extern void pci_isa_write_reg(int reg, u32 value);</div><div class='add'>+extern u32 pci_isa_read_reg(int reg);</div><div class='add'>+</div><div class='add'>+extern int __init init_mfgpt_clocksource(void);</div><div class='add'>+</div><div class='ctx'> #define CS5536_ACC_INTR		9</div><div class='ctx'> #define CS5536_IDE_INTR		14</div><div class='ctx'> #define CS5536_USB_INTR		11</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson2ef/loongson.h b/arch/mips/include/asm/mach-loongson2ef/loongson.h<br/>index ca039b8dcde3..4a098fb10232 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson2ef/loongson.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson2ef/loongson.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson2ef/loongson.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-loongson2ef/loongson.h</a></div><div class='hunk'>@@ -18,6 +18,9 @@ extern void bonito_irq_init(void);</div><div class='ctx'> extern void mach_prepare_reboot(void);</div><div class='ctx'> extern void mach_prepare_shutdown(void);</div><div class='ctx'> </div><div class='add'>+/* machine-specific PROM functions */</div><div class='add'>+extern void __init mach_prom_init_machtype(void);</div><div class='add'>+</div><div class='ctx'> /* environment arguments from bootloader */</div><div class='ctx'> extern u32 cpu_clock_freq;</div><div class='ctx'> extern u32 memsize, highmemsize;</div><div class='hunk'>@@ -45,6 +48,12 @@ extern void __init mach_init_irq(void);</div><div class='ctx'> extern void mach_irq_dispatch(unsigned int pending);</div><div class='ctx'> extern int mach_i8259_irq(void);</div><div class='ctx'> </div><div class='add'>+/* power management functions */</div><div class='add'>+extern void setup_wakeup_events(void);</div><div class='add'>+extern int wakeup_loongson(void);</div><div class='add'>+extern void __weak mach_suspend(void);</div><div class='add'>+extern void __weak mach_resume(void);</div><div class='add'>+</div><div class='ctx'> /* We need this in some places... */</div><div class='ctx'> #define delay() ({		\</div><div class='ctx'> 	int x;				\</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson32/irq.h b/arch/mips/include/asm/mach-loongson32/irq.h<br/>deleted file mode 100644<br/>index 6115f025ba21..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson32/irq.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/irq.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,107 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * IRQ mappings for Loongson 1</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON32_IRQ_H</div><div class='del'>-#define __ASM_MACH_LOONGSON32_IRQ_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CPU core Interrupt Numbers</div><div class='del'>- */</div><div class='del'>-#define MIPS_CPU_IRQ_BASE		0</div><div class='del'>-#define MIPS_CPU_IRQ(x)			(MIPS_CPU_IRQ_BASE + (x))</div><div class='del'>-</div><div class='del'>-#define SOFTINT0_IRQ			MIPS_CPU_IRQ(0)</div><div class='del'>-#define SOFTINT1_IRQ			MIPS_CPU_IRQ(1)</div><div class='del'>-#define INT0_IRQ			MIPS_CPU_IRQ(2)</div><div class='del'>-#define INT1_IRQ			MIPS_CPU_IRQ(3)</div><div class='del'>-#define INT2_IRQ			MIPS_CPU_IRQ(4)</div><div class='del'>-#define INT3_IRQ			MIPS_CPU_IRQ(5)</div><div class='del'>-#define INT4_IRQ			MIPS_CPU_IRQ(6)</div><div class='del'>-#define TIMER_IRQ			MIPS_CPU_IRQ(7)		/* cpu timer */</div><div class='del'>-</div><div class='del'>-#define MIPS_CPU_IRQS		(MIPS_CPU_IRQ(7) + 1 - MIPS_CPU_IRQ_BASE)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * INT0~3 Interrupt Numbers</div><div class='del'>- */</div><div class='del'>-#define LS1X_IRQ_BASE			MIPS_CPU_IRQS</div><div class='del'>-#define LS1X_IRQ(n, x)			(LS1X_IRQ_BASE + (n &lt;&lt; 5) + (x))</div><div class='del'>-</div><div class='del'>-#define LS1X_UART0_IRQ			LS1X_IRQ(0, 2)</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-#define LS1X_UART1_IRQ			LS1X_IRQ(0, 3)</div><div class='del'>-#define LS1X_UART2_IRQ			LS1X_IRQ(0, 4)</div><div class='del'>-#define LS1X_UART3_IRQ			LS1X_IRQ(0, 5)</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define LS1X_UART1_IRQ			LS1X_IRQ(0, 4)</div><div class='del'>-#define LS1X_UART2_IRQ			LS1X_IRQ(0, 5)</div><div class='del'>-#endif</div><div class='del'>-#define LS1X_CAN0_IRQ			LS1X_IRQ(0, 6)</div><div class='del'>-#define LS1X_CAN1_IRQ			LS1X_IRQ(0, 7)</div><div class='del'>-#define LS1X_SPI0_IRQ			LS1X_IRQ(0, 8)</div><div class='del'>-#define LS1X_SPI1_IRQ			LS1X_IRQ(0, 9)</div><div class='del'>-#define LS1X_AC97_IRQ			LS1X_IRQ(0, 10)</div><div class='del'>-#define LS1X_DMA0_IRQ			LS1X_IRQ(0, 13)</div><div class='del'>-#define LS1X_DMA1_IRQ			LS1X_IRQ(0, 14)</div><div class='del'>-#define LS1X_DMA2_IRQ			LS1X_IRQ(0, 15)</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define LS1X_NAND_IRQ			LS1X_IRQ(0, 16)</div><div class='del'>-#endif</div><div class='del'>-#define LS1X_PWM0_IRQ			LS1X_IRQ(0, 17)</div><div class='del'>-#define LS1X_PWM1_IRQ			LS1X_IRQ(0, 18)</div><div class='del'>-#define LS1X_PWM2_IRQ			LS1X_IRQ(0, 19)</div><div class='del'>-#define LS1X_PWM3_IRQ			LS1X_IRQ(0, 20)</div><div class='del'>-#define LS1X_RTC_INT0_IRQ		LS1X_IRQ(0, 21)</div><div class='del'>-#define LS1X_RTC_INT1_IRQ		LS1X_IRQ(0, 22)</div><div class='del'>-#define LS1X_RTC_INT2_IRQ		LS1X_IRQ(0, 23)</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-#define LS1X_TOY_INT0_IRQ		LS1X_IRQ(0, 24)</div><div class='del'>-#define LS1X_TOY_INT1_IRQ		LS1X_IRQ(0, 25)</div><div class='del'>-#define LS1X_TOY_INT2_IRQ		LS1X_IRQ(0, 26)</div><div class='del'>-#define LS1X_RTC_TICK_IRQ		LS1X_IRQ(0, 27)</div><div class='del'>-#define LS1X_TOY_TICK_IRQ		LS1X_IRQ(0, 28)</div><div class='del'>-#define LS1X_UART4_IRQ			LS1X_IRQ(0, 29)</div><div class='del'>-#define LS1X_UART5_IRQ			LS1X_IRQ(0, 30)</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define LS1X_UART3_IRQ			LS1X_IRQ(0, 29)</div><div class='del'>-#define LS1X_ADC_IRQ			LS1X_IRQ(0, 30)</div><div class='del'>-#define LS1X_SDIO_IRQ			LS1X_IRQ(0, 31)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define LS1X_EHCI_IRQ			LS1X_IRQ(1, 0)</div><div class='del'>-#define LS1X_OHCI_IRQ			LS1X_IRQ(1, 1)</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-#define LS1X_GMAC0_IRQ			LS1X_IRQ(1, 2)</div><div class='del'>-#define LS1X_GMAC1_IRQ			LS1X_IRQ(1, 3)</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define LS1X_OTG_IRQ			LS1X_IRQ(1, 2)</div><div class='del'>-#define LS1X_GMAC0_IRQ			LS1X_IRQ(1, 3)</div><div class='del'>-#define LS1X_CAM_IRQ			LS1X_IRQ(1, 4)</div><div class='del'>-#define LS1X_UART4_IRQ			LS1X_IRQ(1, 5)</div><div class='del'>-#define LS1X_UART5_IRQ			LS1X_IRQ(1, 6)</div><div class='del'>-#define LS1X_UART6_IRQ			LS1X_IRQ(1, 7)</div><div class='del'>-#define LS1X_UART7_IRQ			LS1X_IRQ(1, 8)</div><div class='del'>-#define LS1X_UART8_IRQ			LS1X_IRQ(1, 9)</div><div class='del'>-#define LS1X_UART9_IRQ			LS1X_IRQ(1, 13)</div><div class='del'>-#define LS1X_UART10_IRQ			LS1X_IRQ(1, 14)</div><div class='del'>-#define LS1X_UART11_IRQ			LS1X_IRQ(1, 15)</div><div class='del'>-#define LS1X_I2C0_IRQ			LS1X_IRQ(1, 17)</div><div class='del'>-#define LS1X_I2C1_IRQ			LS1X_IRQ(1, 18)</div><div class='del'>-#define LS1X_I2C2_IRQ			LS1X_IRQ(1, 19)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-#define INTN	4</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define INTN	5</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define LS1X_IRQS		(LS1X_IRQ(INTN, 31) + 1 - LS1X_IRQ_BASE)</div><div class='del'>-</div><div class='del'>-#define NR_IRQS			(MIPS_CPU_IRQS + LS1X_IRQS)</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_LOONGSON32_IRQ_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson32/loongson1.h b/arch/mips/include/asm/mach-loongson32/loongson1.h<br/>deleted file mode 100644<br/>index 84f45461c832..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson32/loongson1.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/loongson1.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * Register mappings for Loongson 1</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON32_LOONGSON1_H</div><div class='del'>-#define __ASM_MACH_LOONGSON32_LOONGSON1_H</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-#define DEFAULT_MEMSIZE			64	/* If no memsize provided */</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-#define DEFAULT_MEMSIZE			32</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Loongson 1 Register Bases */</div><div class='del'>-#define LS1X_MUX_BASE			0x1fd00420</div><div class='del'>-#define LS1X_INTC_BASE			0x1fd01040</div><div class='del'>-#define LS1X_GPIO0_BASE			0x1fd010c0</div><div class='del'>-#define LS1X_GPIO1_BASE			0x1fd010c4</div><div class='del'>-#define LS1X_DMAC_BASE			0x1fd01160</div><div class='del'>-#define LS1X_CBUS_BASE			0x1fd011c0</div><div class='del'>-#define LS1X_EHCI_BASE			0x1fe00000</div><div class='del'>-#define LS1X_OHCI_BASE			0x1fe08000</div><div class='del'>-#define LS1X_GMAC0_BASE			0x1fe10000</div><div class='del'>-#define LS1X_GMAC1_BASE			0x1fe20000</div><div class='del'>-</div><div class='del'>-#define LS1X_UART0_BASE			0x1fe40000</div><div class='del'>-#define LS1X_UART1_BASE			0x1fe44000</div><div class='del'>-#define LS1X_UART2_BASE			0x1fe48000</div><div class='del'>-#define LS1X_UART3_BASE			0x1fe4c000</div><div class='del'>-#define LS1X_CAN0_BASE			0x1fe50000</div><div class='del'>-#define LS1X_CAN1_BASE			0x1fe54000</div><div class='del'>-#define LS1X_I2C0_BASE			0x1fe58000</div><div class='del'>-#define LS1X_I2C1_BASE			0x1fe68000</div><div class='del'>-#define LS1X_I2C2_BASE			0x1fe70000</div><div class='del'>-#define LS1X_PWM0_BASE			0x1fe5c000</div><div class='del'>-#define LS1X_PWM1_BASE			0x1fe5c010</div><div class='del'>-#define LS1X_PWM2_BASE			0x1fe5c020</div><div class='del'>-#define LS1X_PWM3_BASE			0x1fe5c030</div><div class='del'>-#define LS1X_WDT_BASE			0x1fe5c060</div><div class='del'>-#define LS1X_RTC_BASE			0x1fe64000</div><div class='del'>-#define LS1X_AC97_BASE			0x1fe74000</div><div class='del'>-#define LS1X_NAND_BASE			0x1fe78000</div><div class='del'>-#define LS1X_CLK_BASE			0x1fe78030</div><div class='del'>-</div><div class='del'>-#include &lt;regs-mux.h&gt;</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson32/platform.h b/arch/mips/include/asm/mach-loongson32/platform.h<br/>deleted file mode 100644<br/>index f74292b13bc3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson32/platform.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/platform.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON32_PLATFORM_H</div><div class='del'>-#define __ASM_MACH_LOONGSON32_PLATFORM_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct platform_device ls1x_uart_pdev;</div><div class='del'>-extern struct platform_device ls1x_eth0_pdev;</div><div class='del'>-extern struct platform_device ls1x_eth1_pdev;</div><div class='del'>-extern struct platform_device ls1x_ehci_pdev;</div><div class='del'>-extern struct platform_device ls1x_gpio0_pdev;</div><div class='del'>-extern struct platform_device ls1x_gpio1_pdev;</div><div class='del'>-extern struct platform_device ls1x_rtc_pdev;</div><div class='del'>-extern struct platform_device ls1x_wdt_pdev;</div><div class='del'>-</div><div class='del'>-void __init ls1x_rtc_set_extclk(struct platform_device *pdev);</div><div class='del'>-void __init ls1x_serial_set_uartclk(struct platform_device *pdev);</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_LOONGSON32_PLATFORM_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson32/regs-mux.h b/arch/mips/include/asm/mach-loongson32/regs-mux.h<br/>deleted file mode 100644<br/>index 95788a4f03a0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson32/regs-mux.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson32/regs-mux.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,124 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2014 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * Loongson 1 MUX Register Definitions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_MACH_LOONGSON32_REGS_MUX_H</div><div class='del'>-#define __ASM_MACH_LOONGSON32_REGS_MUX_H</div><div class='del'>-</div><div class='del'>-#define LS1X_MUX_REG(x) \</div><div class='del'>-		((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x)))</div><div class='del'>-</div><div class='del'>-#define LS1X_MUX_CTRL0			LS1X_MUX_REG(0x0)</div><div class='del'>-#define LS1X_MUX_CTRL1			LS1X_MUX_REG(0x4)</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-/* MUX CTRL0 Register Bits */</div><div class='del'>-#define UART0_USE_PWM23			BIT(28)</div><div class='del'>-#define UART0_USE_PWM01			BIT(27)</div><div class='del'>-#define UART1_USE_LCD0_5_6_11		BIT(26)</div><div class='del'>-#define I2C2_USE_CAN1			BIT(25)</div><div class='del'>-#define I2C1_USE_CAN0			BIT(24)</div><div class='del'>-#define NAND3_USE_UART5			BIT(23)</div><div class='del'>-#define NAND3_USE_UART4			BIT(22)</div><div class='del'>-#define NAND3_USE_UART1_DAT		BIT(21)</div><div class='del'>-#define NAND3_USE_UART1_CTS		BIT(20)</div><div class='del'>-#define NAND3_USE_PWM23			BIT(19)</div><div class='del'>-#define NAND3_USE_PWM01			BIT(18)</div><div class='del'>-#define NAND2_USE_UART5			BIT(17)</div><div class='del'>-#define NAND2_USE_UART4			BIT(16)</div><div class='del'>-#define NAND2_USE_UART1_DAT		BIT(15)</div><div class='del'>-#define NAND2_USE_UART1_CTS		BIT(14)</div><div class='del'>-#define NAND2_USE_PWM23			BIT(13)</div><div class='del'>-#define NAND2_USE_PWM01			BIT(12)</div><div class='del'>-#define NAND1_USE_UART5			BIT(11)</div><div class='del'>-#define NAND1_USE_UART4			BIT(10)</div><div class='del'>-#define NAND1_USE_UART1_DAT		BIT(9)</div><div class='del'>-#define NAND1_USE_UART1_CTS		BIT(8)</div><div class='del'>-#define NAND1_USE_PWM23			BIT(7)</div><div class='del'>-#define NAND1_USE_PWM01			BIT(6)</div><div class='del'>-#define GMAC1_USE_UART1			BIT(4)</div><div class='del'>-#define GMAC1_USE_UART0			BIT(3)</div><div class='del'>-#define LCD_USE_UART0_DAT		BIT(2)</div><div class='del'>-#define LCD_USE_UART15			BIT(1)</div><div class='del'>-#define LCD_USE_UART0			BIT(0)</div><div class='del'>-</div><div class='del'>-/* MUX CTRL1 Register Bits */</div><div class='del'>-#define USB_RESET			BIT(31)</div><div class='del'>-#define SPI1_CS_USE_PWM01		BIT(24)</div><div class='del'>-#define SPI1_USE_CAN			BIT(23)</div><div class='del'>-#define DISABLE_DDR_CONFSPACE		BIT(20)</div><div class='del'>-#define DDR32TO16EN			BIT(16)</div><div class='del'>-#define GMAC1_SHUT			BIT(13)</div><div class='del'>-#define GMAC0_SHUT			BIT(12)</div><div class='del'>-#define USB_SHUT			BIT(11)</div><div class='del'>-#define UART1_3_USE_CAN1		BIT(5)</div><div class='del'>-#define UART1_2_USE_CAN0		BIT(4)</div><div class='del'>-#define GMAC1_USE_TXCLK			BIT(3)</div><div class='del'>-#define GMAC0_USE_TXCLK			BIT(2)</div><div class='del'>-#define GMAC1_USE_PWM23			BIT(1)</div><div class='del'>-#define GMAC0_USE_PWM01			BIT(0)</div><div class='del'>-</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-</div><div class='del'>-/* SHUT_CTRL Register Bits */</div><div class='del'>-#define UART_SPLIT			GENMASK(31, 30)</div><div class='del'>-#define OUTPUT_CLK			GENMASK(29, 26)</div><div class='del'>-#define ADC_SHUT			BIT(25)</div><div class='del'>-#define SDIO_SHUT			BIT(24)</div><div class='del'>-#define DMA2_SHUT			BIT(23)</div><div class='del'>-#define DMA1_SHUT			BIT(22)</div><div class='del'>-#define DMA0_SHUT			BIT(21)</div><div class='del'>-#define SPI1_SHUT			BIT(20)</div><div class='del'>-#define SPI0_SHUT			BIT(19)</div><div class='del'>-#define I2C2_SHUT			BIT(18)</div><div class='del'>-#define I2C1_SHUT			BIT(17)</div><div class='del'>-#define I2C0_SHUT			BIT(16)</div><div class='del'>-#define AC97_SHUT			BIT(15)</div><div class='del'>-#define I2S_SHUT			BIT(14)</div><div class='del'>-#define UART3_SHUT			BIT(13)</div><div class='del'>-#define UART2_SHUT			BIT(12)</div><div class='del'>-#define UART1_SHUT			BIT(11)</div><div class='del'>-#define UART0_SHUT			BIT(10)</div><div class='del'>-#define CAN1_SHUT			BIT(9)</div><div class='del'>-#define CAN0_SHUT			BIT(8)</div><div class='del'>-#define ECC_SHUT			BIT(7)</div><div class='del'>-#define GMAC_SHUT			BIT(6)</div><div class='del'>-#define USBHOST_SHUT			BIT(5)</div><div class='del'>-#define USBOTG_SHUT			BIT(4)</div><div class='del'>-#define SDRAM_SHUT			BIT(3)</div><div class='del'>-#define SRAM_SHUT			BIT(2)</div><div class='del'>-#define CAM_SHUT			BIT(1)</div><div class='del'>-#define LCD_SHUT			BIT(0)</div><div class='del'>-</div><div class='del'>-#define UART_SPLIT_SHIFT                        30</div><div class='del'>-#define OUTPUT_CLK_SHIFT                        26</div><div class='del'>-</div><div class='del'>-/* MISC_CTRL Register Bits */</div><div class='del'>-#define USBHOST_RSTN			BIT(31)</div><div class='del'>-#define PHY_INTF_SELI			GENMASK(30, 28)</div><div class='del'>-#define AC97_EN				BIT(25)</div><div class='del'>-#define SDIO_DMA_EN			GENMASK(24, 23)</div><div class='del'>-#define ADC_DMA_EN			BIT(22)</div><div class='del'>-#define SDIO_USE_SPI1			BIT(17)</div><div class='del'>-#define SDIO_USE_SPI0			BIT(16)</div><div class='del'>-#define SRAM_CTRL			GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define PHY_INTF_SELI_SHIFT                     28</div><div class='del'>-#define SDIO_DMA_EN_SHIFT                       23</div><div class='del'>-#define SRAM_CTRL_SHIFT				0</div><div class='del'>-</div><div class='del'>-#define LS1X_CBUS_REG(n, x) \</div><div class='del'>-		((void __iomem *)KSEG1ADDR(LS1X_CBUS_BASE + (n * 0x04) + (x)))</div><div class='del'>-</div><div class='del'>-#define LS1X_CBUS_FIRST(n)		LS1X_CBUS_REG(n, 0x00)</div><div class='del'>-#define LS1X_CBUS_SECOND(n)		LS1X_CBUS_REG(n, 0x10)</div><div class='del'>-#define LS1X_CBUS_THIRD(n)		LS1X_CBUS_REG(n, 0x20)</div><div class='del'>-#define LS1X_CBUS_FOURTHT(n)		LS1X_CBUS_REG(n, 0x30)</div><div class='del'>-#define LS1X_CBUS_FIFTHT(n)		LS1X_CBUS_REG(n, 0x40)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_LOONGSON32_REGS_MUX_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson64/boot_param.h b/arch/mips/include/asm/mach-loongson64/boot_param.h<br/>index 9218b3ae3383..3a11ce85762b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson64/boot_param.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson64/boot_param.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson64/boot_param.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-loongson64/boot_param.h</a></div><div class='hunk'>@@ -128,10 +128,10 @@ struct irq_source_routing_table {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct interface_info {</div><div class='del'>-	u16 vers; /* version of the specificition */</div><div class='del'>-	u16 size;</div><div class='del'>-	u8  flag;</div><div class='del'>-	char description[64];</div><div class='add'>+	u16 vers; /* version of the specification */</div><div class='add'>+	u16 size; /* size of this interface */</div><div class='add'>+	u8  flag; /* used or unused */</div><div class='add'>+	char description[64]; /* description for each change */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> #define MAX_RESOURCE_NUMBER 128</div><div class='head'>diff --git a/arch/mips/include/asm/mach-loongson64/spaces.h b/arch/mips/include/asm/mach-loongson64/spaces.h<br/>index ce04e998a37b..dbd26db5f2c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson64/spaces.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-loongson64/spaces.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-loongson64/spaces.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-loongson64/spaces.h</a></div><div class='hunk'>@@ -7,9 +7,10 @@</div><div class='ctx'> #endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> /* Skip 128k to trap NULL pointer dereferences */</div><div class='del'>-#define PCI_IOBASE	_AC(0xc000000000000000 + SZ_128K, UL)</div><div class='add'>+#define PCI_PORT_BASE	_AC(0xc000000000000000 + SZ_128K, UL)</div><div class='add'>+#define PCI_IOBASE	(void __iomem *)PCI_PORT_BASE</div><div class='ctx'> #define PCI_IOSIZE	SZ_16M</div><div class='del'>-#define MAP_BASE	(PCI_IOBASE + PCI_IOSIZE)</div><div class='add'>+#define MAP_BASE	(PCI_PORT_BASE + PCI_IOSIZE)</div><div class='ctx'> </div><div class='ctx'> #define IO_SPACE_LIMIT  (PCI_IOSIZE - 1)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-malta/mc146818rtc.h b/arch/mips/include/asm/mach-malta/mc146818rtc.h<br/>index e8cc7fdf7415..7da2c0ea55da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-malta/mc146818rtc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-malta/mc146818rtc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-malta/mc146818rtc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-malta/mc146818rtc.h</a></div><div class='hunk'>@@ -31,6 +31,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> #define RTC_ALWAYS_BCD	0</div><div class='ctx'> </div><div class='del'>-#define mc146818_decode_year(year) ((year) &lt; 70 ? (year) + 2000 : (year) + 1900)</div><div class='del'>-</div><div class='ctx'> #endif /* __ASM_MACH_MALTA_MC146818RTC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h<br/>index a9f0570d0f04..a63d106c89c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ralink/spaces.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-ralink/spaces.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-ralink/spaces.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-ralink/spaces.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_MACH_RALINK_SPACES_H_</div><div class='ctx'> #define __ASM_MACH_RALINK_SPACES_H_</div><div class='ctx'> </div><div class='del'>-#define PCI_IOBASE	mips_io_port_base</div><div class='add'>+#define PCI_IOBASE	(void __iomem *)mips_io_port_base</div><div class='ctx'> #define PCI_IOSIZE	SZ_64K</div><div class='ctx'> #define IO_SPACE_LIMIT	(PCI_IOSIZE - 1)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h<br/>index 3eb767c8a4ee..e17ce82d02ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-rc32434/pci.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-rc32434/pci.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-rc32434/pci.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mach-rc32434/pci.h</a></div><div class='hunk'>@@ -167,7 +167,7 @@ struct pci_msu {</div><div class='ctx'> #define PCI_CFGA_DEV		0x0000f800</div><div class='ctx'> #define PCI_CFGA_DEV_INTERN	0</div><div class='ctx'> #define PCI_CFGA_BUS_BIT	16</div><div class='del'>-#define PCI CFGA_BUS		0x00ff0000</div><div class='add'>+#define PCI_CFGA_BUS		0x00ff0000</div><div class='ctx'> #define PCI_CFGA_BUS_TYPE0	0</div><div class='ctx'> #define PCI_CFGA_EN		(1 &lt;&lt; 31)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-rm/mc146818rtc.h b/arch/mips/include/asm/mach-rm/mc146818rtc.h<br/>deleted file mode 100644<br/>index a074f4f84f75..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mach-rm/mc146818rtc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mach-rm/mc146818rtc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004 by Ralf Baechle</div><div class='del'>- *</div><div class='del'>- * RTC routines for PC style attached Dallas chip with ARC epoch.</div><div class='del'>- */</div><div class='del'>-#ifndef __ASM_MACH_RM_MC146818RTC_H</div><div class='del'>-#define __ASM_MACH_RM_MC146818RTC_H</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='del'>-#define mc146818_decode_year(year) ((year) &lt; 70 ? (year) + 2000 : (year) + 1900)</div><div class='del'>-#else</div><div class='del'>-#define mc146818_decode_year(year) ((year) + 1980)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-generic/mc146818rtc.h&gt;</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_RM_MC146818RTC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mc146818-time.h b/arch/mips/include/asm/mc146818-time.h<br/>index cbf5cec345f1..ac52a30b4161 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mc146818-time.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mc146818-time.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mc146818-time.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mc146818-time.h</a></div><div class='hunk'>@@ -8,112 +8,21 @@</div><div class='ctx'> #ifndef __ASM_MC146818_TIME_H</div><div class='ctx'> #define __ASM_MC146818_TIME_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/bcd.h&gt;</div><div class='ctx'> #include &lt;linux/mc146818rtc.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * For check timing call set_rtc_mmss() 500ms; used in timer interrupt.</div><div class='del'>- */</div><div class='del'>-#define USEC_AFTER	500000</div><div class='del'>-#define USEC_BEFORE	500000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * In order to set the CMOS clock precisely, set_rtc_mmss has to be</div><div class='del'>- * called 500 ms after the second nowtime has started, because when</div><div class='del'>- * nowtime is written into the registers of the CMOS clock, it will</div><div class='del'>- * jump to the next second precisely 500 ms later. Check the Motorola</div><div class='del'>- * MC146818A or Dallas DS12887 data sheet for details.</div><div class='del'>- *</div><div class='del'>- * BUG: This routine does not handle hour overflow properly; it just</div><div class='del'>- *	sets the minutes. Usually you'll only notice that after reboot!</div><div class='del'>- */</div><div class='del'>-static inline int mc146818_set_rtc_mmss(unsigned long nowtime)</div><div class='del'>-{</div><div class='del'>-	int real_seconds, real_minutes, cmos_minutes;</div><div class='del'>-	unsigned char save_control, save_freq_select;</div><div class='del'>-	int retval = 0;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;rtc_lock, flags);</div><div class='del'>-	save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */</div><div class='del'>-	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);</div><div class='del'>-</div><div class='del'>-	save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */</div><div class='del'>-	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);</div><div class='del'>-</div><div class='del'>-	cmos_minutes = CMOS_READ(RTC_MINUTES);</div><div class='del'>-	if (!(save_control &amp; RTC_DM_BINARY) || RTC_ALWAYS_BCD)</div><div class='del'>-		cmos_minutes = bcd2bin(cmos_minutes);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * since we're only adjusting minutes and seconds,</div><div class='del'>-	 * don't interfere with hour overflow. This avoids</div><div class='del'>-	 * messing with unknown time zones but requires your</div><div class='del'>-	 * RTC not to be off by more than 15 minutes</div><div class='del'>-	 */</div><div class='del'>-	real_seconds = nowtime % 60;</div><div class='del'>-	real_minutes = nowtime / 60;</div><div class='del'>-	if (((abs(real_minutes - cmos_minutes) + 15)/30) &amp; 1)</div><div class='del'>-		real_minutes += 30;		/* correct for half hour time zone */</div><div class='del'>-	real_minutes %= 60;</div><div class='del'>-</div><div class='del'>-	if (abs(real_minutes - cmos_minutes) &lt; 30) {</div><div class='del'>-		if (!(save_control &amp; RTC_DM_BINARY) || RTC_ALWAYS_BCD) {</div><div class='del'>-			real_seconds = bin2bcd(real_seconds);</div><div class='del'>-			real_minutes = bin2bcd(real_minutes);</div><div class='del'>-		}</div><div class='del'>-		CMOS_WRITE(real_seconds, RTC_SECONDS);</div><div class='del'>-		CMOS_WRITE(real_minutes, RTC_MINUTES);</div><div class='del'>-	} else {</div><div class='del'>-		printk_once(KERN_NOTICE</div><div class='del'>-		       "set_rtc_mmss: can't update from %d to %d\n",</div><div class='del'>-		       cmos_minutes, real_minutes);</div><div class='del'>-		retval = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The following flags have to be released exactly in this order,</div><div class='del'>-	 * otherwise the DS12887 (popular MC146818A clone with integrated</div><div class='del'>-	 * battery and quartz) will not reset the oscillator and will not</div><div class='del'>-	 * update precisely 500 ms later. You won't find this mentioned in</div><div class='del'>-	 * the Dallas Semiconductor data sheets, but who believes data</div><div class='del'>-	 * sheets anyway ...			       -- Markus Kuhn</div><div class='del'>-	 */</div><div class='del'>-	CMOS_WRITE(save_control, RTC_CONTROL);</div><div class='del'>-	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);</div><div class='del'>-	spin_unlock_irqrestore(&amp;rtc_lock, flags);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_RTC_MC146818_LIB</div><div class='ctx'> static inline time64_t mc146818_get_cmos_time(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int year, mon, day, hour, min, sec;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;rtc_lock, flags);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		sec = CMOS_READ(RTC_SECONDS);</div><div class='del'>-		min = CMOS_READ(RTC_MINUTES);</div><div class='del'>-		hour = CMOS_READ(RTC_HOURS);</div><div class='del'>-		day = CMOS_READ(RTC_DAY_OF_MONTH);</div><div class='del'>-		mon = CMOS_READ(RTC_MONTH);</div><div class='del'>-		year = CMOS_READ(RTC_YEAR);</div><div class='del'>-	} while (sec != CMOS_READ(RTC_SECONDS));</div><div class='add'>+	struct rtc_time tm;</div><div class='ctx'> </div><div class='del'>-	if (!(CMOS_READ(RTC_CONTROL) &amp; RTC_DM_BINARY) || RTC_ALWAYS_BCD) {</div><div class='del'>-		sec = bcd2bin(sec);</div><div class='del'>-		min = bcd2bin(min);</div><div class='del'>-		hour = bcd2bin(hour);</div><div class='del'>-		day = bcd2bin(day);</div><div class='del'>-		mon = bcd2bin(mon);</div><div class='del'>-		year = bcd2bin(year);</div><div class='add'>+	if (mc146818_get_time(&amp;tm, 1000)) {</div><div class='add'>+		pr_err("Unable to read current time from RTC\n");</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;rtc_lock, flags);</div><div class='del'>-	year = mc146818_decode_year(year);</div><div class='ctx'> </div><div class='del'>-	return mktime64(year, mon, day, hour, min, sec);</div><div class='add'>+	return rtc_tm_to_time64(&amp;tm);</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_RTC_MC146818_LIB */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_MC146818_TIME_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h<br/>index 31a31fe78d77..74c5fc0fc6c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-boards/bonito64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-boards/bonito64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-boards/bonito64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mips-boards/bonito64.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #ifndef _ASM_MIPS_BOARDS_BONITO64_H</div><div class='ctx'> #define _ASM_MIPS_BOARDS_BONITO64_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* offsets from base register */</div><div class='ctx'> #define BONITO(x)	(x)</div><div class='hunk'>@@ -36,7 +36,7 @@ extern unsigned long _pcictrl_bonito_pcicfg;</div><div class='ctx'> </div><div class='ctx'> #define BONITO(x)		*(volatile u32 *)(_pcictrl_bonito + (x))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define BONITO_BOOT_BASE		0x1fc00000</div><div class='head'>diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h<br/>index 1e782275850a..407f253bb4a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-cm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-cm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-cm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mips-cm.h</a></div><div class='hunk'>@@ -59,6 +59,16 @@ extern phys_addr_t mips_cm_l2sync_phys_base(void);</div><div class='ctx'>  */</div><div class='ctx'> extern int mips_cm_is64;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * mips_cm_is_l2_hci_broken  - determine if HCI is broken</div><div class='add'>+ *</div><div class='add'>+ * Some CM reports show that Hardware Cache Initialization is</div><div class='add'>+ * complete, but in reality it's not the case. They also incorrectly</div><div class='add'>+ * indicate that Hardware Cache Initialization is supported. This</div><div class='add'>+ * flags allows warning about this broken feature.</div><div class='add'>+ */</div><div class='add'>+extern bool mips_cm_is_l2_hci_broken;</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * mips_cm_error_report - Report CM cache errors</div><div class='ctx'>  */</div><div class='hunk'>@@ -98,6 +108,18 @@ static inline bool mips_cm_present(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * mips_cm_update_property - update property from the device tree</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the properties from the device tree if a CM node exist and</div><div class='add'>+ * update the internal variable based on this.</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_MIPS_CM</div><div class='add'>+extern void mips_cm_update_property(void);</div><div class='add'>+#else</div><div class='add'>+static inline void mips_cm_update_property(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * mips_cm_has_l2sync - determine whether an L2-only sync region is present</div><div class='ctx'>  *</div><div class='ctx'>  * Returns true if the system implements an L2-only sync region, else false.</div><div class='hunk'>@@ -255,6 +277,12 @@ GCR_ACCESSOR_RW(32, 0x130, l2_config)</div><div class='ctx'> GCR_ACCESSOR_RO(32, 0x150, sys_config2)</div><div class='ctx'> #define CM_GCR_SYS_CONFIG2_MAXVPW		GENMASK(3, 0)</div><div class='ctx'> </div><div class='add'>+/* GCR_L2-RAM_CONFIG - Configuration &amp; status of L2 cache RAMs */</div><div class='add'>+GCR_ACCESSOR_RW(64, 0x240, l2_ram_config)</div><div class='add'>+#define CM_GCR_L2_RAM_CONFIG_PRESENT		BIT(31)</div><div class='add'>+#define CM_GCR_L2_RAM_CONFIG_HCI_DONE		BIT(30)</div><div class='add'>+#define CM_GCR_L2_RAM_CONFIG_HCI_SUPPORTED	BIT(29)</div><div class='add'>+</div><div class='ctx'> /* GCR_L2_PFT_CONTROL - Controls hardware L2 prefetching */</div><div class='ctx'> GCR_ACCESSOR_RW(32, 0x300, l2_pft_control)</div><div class='ctx'> #define CM_GCR_L2_PFT_CONTROL_PAGEMASK		GENMASK(31, 12)</div><div class='hunk'>@@ -266,6 +294,18 @@ GCR_ACCESSOR_RW(32, 0x308, l2_pft_control_b)</div><div class='ctx'> #define CM_GCR_L2_PFT_CONTROL_B_CEN		BIT(8)</div><div class='ctx'> #define CM_GCR_L2_PFT_CONTROL_B_PORTID		GENMASK(7, 0)</div><div class='ctx'> </div><div class='add'>+/* GCR_L2_TAG_ADDR - Access addresses in L2 cache tags */</div><div class='add'>+GCR_ACCESSOR_RW(64, 0x600, l2_tag_addr)</div><div class='add'>+</div><div class='add'>+/* GCR_L2_TAG_STATE - Access L2 cache tag state */</div><div class='add'>+GCR_ACCESSOR_RW(64, 0x608, l2_tag_state)</div><div class='add'>+</div><div class='add'>+/* GCR_L2_DATA - Access data in L2 cache lines */</div><div class='add'>+GCR_ACCESSOR_RW(64, 0x610, l2_data)</div><div class='add'>+</div><div class='add'>+/* GCR_L2_ECC - Access ECC information from L2 cache lines */</div><div class='add'>+GCR_ACCESSOR_RW(64, 0x618, l2_ecc)</div><div class='add'>+</div><div class='ctx'> /* GCR_L2SM_COP - L2 cache op state machine control */</div><div class='ctx'> GCR_ACCESSOR_RW(32, 0x620, l2sm_cop)</div><div class='ctx'> #define CM_GCR_L2SM_COP_PRESENT			BIT(31)</div><div class='hunk'>@@ -326,7 +366,9 @@ GCR_CX_ACCESSOR_RW(32, 0x018, other)</div><div class='ctx'> </div><div class='ctx'> /* GCR_Cx_RESET_BASE - Configure where powered up cores will fetch from */</div><div class='ctx'> GCR_CX_ACCESSOR_RW(32, 0x020, reset_base)</div><div class='add'>+GCR_CX_ACCESSOR_RW(64, 0x020, reset64_base)</div><div class='ctx'> #define CM_GCR_Cx_RESET_BASE_BEVEXCBASE		GENMASK(31, 12)</div><div class='add'>+#define CM_GCR_Cx_RESET64_BASE_BEVEXCBASE	GENMASK_ULL(47, 12)</div><div class='ctx'> #define CM_GCR_Cx_RESET_BASE_MODE		BIT(1)</div><div class='ctx'> </div><div class='ctx'> /* GCR_Cx_ID - Identify the current core */</div><div class='head'>diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h<br/>index 917009b80e69..1fffd47a4564 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-cps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mips-cps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mips-cps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mips-cps.h</a></div><div class='hunk'>@@ -258,6 +258,8 @@ static inline bool mips_cps_multicluster_cpus(void)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * mips_cps_first_online_in_cluster() - Detect if CPU is first online in cluster</div><div class='add'>+ * @first_cpu: The first other online CPU in cluster, or nr_cpu_ids if</div><div class='add'>+ * the function returns true.</div><div class='ctx'>  *</div><div class='ctx'>  * Determine whether the local CPU is the first to be brought online in its</div><div class='ctx'>  * cluster - that is, whether there are any other online CPUs in the local</div><div class='hunk'>@@ -265,6 +267,6 @@ static inline bool mips_cps_multicluster_cpus(void)</div><div class='ctx'>  *</div><div class='ctx'>  * Returns true if this CPU is first online, else false.</div><div class='ctx'>  */</div><div class='del'>-extern unsigned int mips_cps_first_online_in_cluster(void);</div><div class='add'>+extern unsigned int mips_cps_first_online_in_cluster(int *first_cpu);</div><div class='ctx'> </div><div class='ctx'> #endif /* __MIPS_ASM_MIPS_CPS_H__ */</div><div class='head'>diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h<br/>index b1ee3c48e84b..cab7582010e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mipsmtregs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mipsmtregs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mipsmtregs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mipsmtregs.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * C macros</div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'> /* TCHalt */</div><div class='ctx'> #define TCHALT_H		(_ULCAST_(1))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline unsigned core_nvpes(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -469,6 +469,6 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> __BUILD_SET_C0(mvpcontrol)</div><div class='ctx'> </div><div class='del'>-#endif /* Not __ASSEMBLY__ */</div><div class='add'>+#endif /* Not __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h<br/>index 3c6ddc0c2c7a..f799c0d723da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mipsregs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mipsregs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mipsregs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mipsregs.h</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Configure language</div><div class='ctx'>  */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define _ULCAST_</div><div class='ctx'> #define _U64CAST_</div><div class='ctx'> #else</div><div class='hunk'>@@ -1346,7 +1346,7 @@</div><div class='ctx'> #define FPU_CSR_RD	0x3	/* towards -Infinity */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Macros for handling the ISA mode bit for MIPS16 and microMIPS.</div><div class='hunk'>@@ -2039,8 +2039,8 @@ do {									\</div><div class='ctx'> #define read_c0_perfcntr3_64()	__read_64bit_c0_register($25, 7)</div><div class='ctx'> #define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val)</div><div class='ctx'> </div><div class='del'>-#define read_c0_ecc()		__read_32bit_c0_register($26, 0)</div><div class='del'>-#define write_c0_ecc(val)	__write_32bit_c0_register($26, 0, val)</div><div class='add'>+#define read_c0_errctl()	__read_32bit_c0_register($26, 0)</div><div class='add'>+#define write_c0_errctl(val)	__write_32bit_c0_register($26, 0, val)</div><div class='ctx'> </div><div class='ctx'> #define read_c0_derraddr0()	__read_ulong_c0_register($26, 1)</div><div class='ctx'> #define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)</div><div class='hunk'>@@ -3095,6 +3095,6 @@ static inline unsigned int get_ebase_cpunum(void)</div><div class='ctx'> 	return read_c0_ebase() &amp; MIPS_EBASE_CPUNUM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MIPSREGS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mmzone.h b/arch/mips/include/asm/mmzone.h<br/>index 14226ea42036..602a21aee9d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mmzone.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/mmzone.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/mmzone.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/mmzone.h</a></div><div class='hunk'>@@ -20,6 +20,4 @@</div><div class='ctx'> #define nid_to_addrbase(nid) 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern void setup_zero_pages(void);</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_MMZONE_H_ */</div><div class='head'>diff --git a/arch/mips/include/asm/msa.h b/arch/mips/include/asm/msa.h<br/>index 236a49ee2e3e..c6077f5fa4b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/msa.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/msa.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/msa.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/msa.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +218,7 @@ __BUILD_MSA_CTL_REG(request, 5)</div><div class='ctx'> __BUILD_MSA_CTL_REG(map, 6)</div><div class='ctx'> __BUILD_MSA_CTL_REG(unmap, 7)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define MSA_IR		0</div><div class='ctx'> #define MSA_CSR		1</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-crypto.h b/arch/mips/include/asm/octeon/crypto.h<br/>index cb68f9e284bb..cb68f9e284bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/cavium-octeon/crypto/octeon-crypto.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/cavium-octeon/crypto/octeon-crypto.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/octeon/crypto.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/octeon/crypto.h</a></div><div class='head'>diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h<br/>index 4609cb0326cf..bc3e3484c1bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/page.h</a></div><div class='hunk'>@@ -14,12 +14,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * PAGE_SHIFT determines the page size</div><div class='del'>- */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1,UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~((1 &lt;&lt; PAGE_SHIFT) - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is used for calculating the real page sizes</div><div class='head'>diff --git a/arch/mips/include/asm/pci/bridge.h b/arch/mips/include/asm/pci/bridge.h<br/>index 9c476a0400e0..eaeafccd82c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pci/bridge.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pci/bridge.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pci/bridge.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/pci/bridge.h</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'>  *    Bridge address map</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define ATE_V		0x01</div><div class='ctx'> #define ATE_CO		0x02</div><div class='hunk'>@@ -288,7 +288,7 @@ struct bridge_err_cmdword {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define berr_field	berr_un.berr_st</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The values of these macros can and should be crosschecked</div><div class='head'>diff --git a/arch/mips/include/asm/pgalloc.h b/arch/mips/include/asm/pgalloc.h<br/>index f4440edcd8fe..942af87f1cdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PMD_ALLOC_ONE</div><div class='ctx'> #define __HAVE_ARCH_PUD_ALLOC_ONE</div><div class='del'>-#define __HAVE_ARCH_PGD_FREE</div><div class='ctx'> #include &lt;asm-generic/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,</div><div class='hunk'>@@ -49,16 +48,8 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)</div><div class='ctx'> extern void pgd_init(void *addr);</div><div class='ctx'> extern pgd_t *pgd_alloc(struct mm_struct *mm);</div><div class='ctx'> </div><div class='del'>-static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	pagetable_free(virt_to_ptdesc(pgd));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __pte_free_tlb(tlb, pte, address)			\</div><div class='del'>-do {								\</div><div class='del'>-	pagetable_pte_dtor(page_ptdesc(pte));			\</div><div class='del'>-	tlb_remove_page_ptdesc((tlb), page_ptdesc(pte));	\</div><div class='del'>-} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, address)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +62,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	if (!pagetable_pmd_ctor(ptdesc)) {</div><div class='add'>+	if (!pagetable_pmd_ctor(mm, ptdesc)) {</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h<br/>index 401c1d9e4409..6e854bb11f37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgtable-64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgtable-64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgtable-64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/pgtable-64.h</a></div><div class='hunk'>@@ -317,7 +317,9 @@ static inline pmd_t *pud_pgtable(pud_t pud)</div><div class='ctx'>  */</div><div class='ctx'> extern void pgd_init(void *addr);</div><div class='ctx'> extern void pud_init(void *addr);</div><div class='add'>+#define pud_init pud_init</div><div class='ctx'> extern void pmd_init(void *addr);</div><div class='add'>+#define pmd_init pmd_init</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that</div><div class='head'>diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h<br/>index c29a551eb0ca..ae73ecf4c41a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/pgtable.h</a></div><div class='hunk'>@@ -504,12 +504,6 @@ static inline int ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_XPA)</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='hunk'>@@ -540,7 +534,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PHYS_ADDR_T_64BIT) &amp;&amp; defined(CONFIG_CPU_MIPS32)</div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte.pte_low &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -557,7 +551,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -719,9 +713,6 @@ static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */</div><div class='ctx'> </div><div class='del'>-/* Extern to avoid header file madness */</div><div class='del'>-extern pmd_t mk_pmd(struct page *page, pgprot_t prot);</div><div class='del'>-</div><div class='ctx'> static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	pmd_val(pmd) = (pmd_val(pmd) &amp; (_PAGE_CHG_MASK | _PAGE_HUGE)) |</div><div class='head'>diff --git a/arch/mips/include/asm/pm.h b/arch/mips/include/asm/pm.h<br/>index 7ecd4dfe3846..52f3d64c5f34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/pm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/pm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/pm.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #ifndef __ASM_PM_H</div><div class='ctx'> #define __ASM_PM_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> 	RESUME_RESTORE_REGS_RETURN</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct mips_static_suspend_state - Core saved CPU state across S2R.</div><div class='hunk'>@@ -150,6 +150,6 @@ struct mips_static_suspend_state {</div><div class='ctx'> 	unsigned long sp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PM_HELPERS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h<br/>index a56594f360ee..4bd359fa3d97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/prefetch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/prefetch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/prefetch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/prefetch.h</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> #define Pref_WriteBackInvalidate	25</div><div class='ctx'> #define Pref_PrepareForStore		30</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> 	.macro	__pref hint addr</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_PREFETCH</div><div class='head'>diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h<br/>index 4a2b40ce39e0..ef72c46b5568 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/ptrace.h</a></div><div class='hunk'>@@ -27,8 +27,8 @@</div><div class='ctx'>  */</div><div class='ctx'> struct pt_regs {</div><div class='ctx'> #ifdef CONFIG_32BIT</div><div class='del'>-	/* Pad bytes for argument save space on the stack. */</div><div class='del'>-	unsigned long pad0[8];</div><div class='add'>+	/* Saved syscall stack arguments; entries 0-3 unused. */</div><div class='add'>+	unsigned long args[8];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Saved main processor registers. */</div><div class='hunk'>@@ -65,7 +65,8 @@ static inline void instruction_pointer_set(struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> /* Query offset/name of register from its name/offset */</div><div class='ctx'> extern int regs_query_register_offset(const char *name);</div><div class='del'>-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))</div><div class='add'>+#define MAX_REG_OFFSET \</div><div class='add'>+	(offsetof(struct pt_regs, __last) - sizeof(unsigned long))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * regs_get_register() - get register value from its offset</div><div class='head'>diff --git a/arch/mips/include/asm/regdef.h b/arch/mips/include/asm/regdef.h<br/>index 236051364f78..dd0b558c9767 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/regdef.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/regdef.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/regdef.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/regdef.h</a></div><div class='hunk'>@@ -103,7 +103,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #if _MIPS_SIM == _MIPS_SIM_ABI32</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -192,6 +192,6 @@</div><div class='ctx'> #define ra	$31	/* return address */</div><div class='ctx'> </div><div class='ctx'> #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_REGDEF_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sgi/heart.h b/arch/mips/include/asm/sgi/heart.h<br/>index 0d03751955c4..c224c2e3575a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sgi/heart.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sgi/heart.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sgi/heart.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sgi/heart.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='ctx'>  *		 2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='del'>- *		 2007-2015 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *		 2007-2015 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __ASM_SGI_HEART_H</div><div class='ctx'> #define __ASM_SGI_HEART_H</div><div class='head'>diff --git a/arch/mips/include/asm/sibyte/board.h b/arch/mips/include/asm/sibyte/board.h<br/>index 03463faa4244..d29c1c013dc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/board.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/board.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/board.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sibyte/board.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;asm/sibyte/bigsur.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef LEDS_PHYS</div><div class='ctx'> #define setleds(t0, t1, c0, c1, c2, c3) \</div><div class='hunk'>@@ -46,6 +46,6 @@ extern void setleds(char *str);</div><div class='ctx'> #define setleds(s) do { } while (0)</div><div class='ctx'> #endif /* LEDS_PHYS */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _SIBYTE_BOARD_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sibyte/sb1250.h b/arch/mips/include/asm/sibyte/sb1250.h<br/>index 495b31925ed7..de4b352256c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/sb1250.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/sb1250.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/sb1250.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sibyte/sb1250.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #define SB1250_DUART_MINOR_BASE		64</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/sibyte/sb1250_defs.h b/arch/mips/include/asm/sibyte/sb1250_defs.h<br/>index 68cd7c0b37ea..98cbb65cce0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/sb1250_defs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sibyte/sb1250_defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sibyte/sb1250_defs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sibyte/sb1250_defs.h</a></div><div class='hunk'>@@ -199,7 +199,7 @@</div><div class='ctx'>  * Note: you'll need to define uint32_t and uint64_t in your headers.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> #define _SB_MAKE64(x) ((uint64_t)(x))</div><div class='ctx'> #define _SB_MAKE32(x) ((uint32_t)(x))</div><div class='ctx'> #else</div><div class='hunk'>@@ -238,9 +238,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#if defined(__mips64) &amp;&amp; !defined(__ASSEMBLY__)</div><div class='add'>+#if defined(__mips64) &amp;&amp; !defined(__ASSEMBLER__)</div><div class='ctx'> #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)</div><div class='ctx'> #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/smp-cps.h b/arch/mips/include/asm/smp-cps.h<br/>index ab94e50f62b8..63620abbd067 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/smp-cps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/smp-cps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/smp-cps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/smp-cps.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #define CPS_ENTRY_PATCH_INSNS	6</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct vpe_boot_config {</div><div class='ctx'> 	unsigned long pc;</div><div class='hunk'>@@ -22,7 +22,13 @@ struct core_boot_config {</div><div class='ctx'> 	struct vpe_boot_config *vpe_config;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern struct core_boot_config *mips_cps_core_bootcfg;</div><div class='add'>+struct cluster_boot_config {</div><div class='add'>+	unsigned long *core_power;</div><div class='add'>+	struct cpumask cpumask;</div><div class='add'>+	struct core_boot_config *core_config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct cluster_boot_config *mips_cps_cluster_bootcfg;</div><div class='ctx'> </div><div class='ctx'> extern void mips_cps_core_boot(int cca, void __iomem *gcr_base);</div><div class='ctx'> extern void mips_cps_core_init(void);</div><div class='hunk'>@@ -49,9 +55,9 @@ static inline bool mips_cps_smp_in_use(void) { return false; }</div><div class='ctx'> </div><div class='ctx'> #endif /* !CONFIG_MIPS_CPS */</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> .extern mips_cps_bootcfg;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __MIPS_ASM_SMP_CPS_H__ */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/addrs.h b/arch/mips/include/asm/sn/addrs.h<br/>index 837d23e24976..7c675fecbf9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/addrs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/addrs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/addrs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/addrs.h</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'> #define _ASM_SN_ADDRS_H</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> #include &lt;asm/sn/kldir.h&gt;</div><div class='hunk'>@@ -25,15 +25,15 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define UINT64_CAST		(unsigned long)</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define UINT64_CAST</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define NASID_GET_META(_n)	((_n) &gt;&gt; NASID_LOCAL_BITS)</div><div class='hunk'>@@ -254,7 +254,7 @@</div><div class='ctx'> #define LOCAL_HUB_ADDR(_x)	(IALIAS_BASE + (_x))</div><div class='ctx'> #define REMOTE_HUB_ADDR(_n, _x) ((NODE_SWIN_BASE(_n, 1) + 0x800000 + (_x)))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define LOCAL_HUB_PTR(_x)	((u64 *)LOCAL_HUB_ADDR((_x)))</div><div class='ctx'> #define REMOTE_HUB_PTR(_n, _x)	((u64 *)REMOTE_HUB_ADDR((_n), (_x)))</div><div class='hunk'>@@ -265,7 +265,7 @@</div><div class='ctx'> #define REMOTE_HUB_S(_n, _r, _d)	__raw_writeq((_d),		\</div><div class='ctx'> 						REMOTE_HUB_PTR((_n), (_r)))</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Software structure locations -- permanently fixed</div><div class='hunk'>@@ -315,7 +315,7 @@</div><div class='ctx'> #define KLI_KERN_XP		8</div><div class='ctx'> #define KLI_KERN_PARTID		9</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define KLD_BASE(nasid)		((kldir_ent_t *) KLDIR_ADDR(nasid))</div><div class='ctx'> #define KLD_LAUNCH(nasid)	(KLD_BASE(nasid) + KLI_LAUNCH)</div><div class='hunk'>@@ -371,7 +371,7 @@</div><div class='ctx'> #define KERN_VARS_ADDR(nasid)	KLD_KERN_VARS(nasid)-&gt;pointer</div><div class='ctx'> #define KERN_VARS_SIZE(nasid)	KLD_KERN_VARS(nasid)-&gt;size</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SN_ADDRS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/gda.h b/arch/mips/include/asm/sn/gda.h<br/>index 5b8c96d5b587..d8fd80137206 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/gda.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/gda.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/gda.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/gda.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> #define G_PARTIDOFF	40</div><div class='ctx'> #define G_TABLEOFF	128</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef struct gda {</div><div class='ctx'> 	u32	g_magic;	/* GDA magic number */</div><div class='hunk'>@@ -63,7 +63,7 @@ typedef struct gda {</div><div class='ctx'> </div><div class='ctx'> #define GDA ((gda_t*) GDA_ADDR(get_nasid()))</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> /*</div><div class='ctx'>  * Define:	PART_GDA_VERSION</div><div class='ctx'>  * Purpose:	Define the minimum version of the GDA required, lower</div><div class='head'>diff --git a/arch/mips/include/asm/sn/kldir.h b/arch/mips/include/asm/sn/kldir.h<br/>index 245f59bf3845..f394b1e0c956 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/kldir.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/kldir.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/kldir.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/kldir.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #define KLDIR_ENT_SIZE			0x40</div><div class='ctx'> #define KLDIR_MAX_ENTRIES		(0x400 / 0x40)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef struct kldir_ent_s {</div><div class='ctx'> 	u64		magic;		/* Indicates validity of entry	    */</div><div class='ctx'> 	off_t		offset;		/* Offset from start of node space  */</div><div class='hunk'>@@ -27,7 +27,7 @@ typedef struct kldir_ent_s {</div><div class='ctx'> 	/* NOTE: These 16 bytes are used in the Partition KLDIR</div><div class='ctx'> 	   entry to store partition info. Refer to klpart.h for this. */</div><div class='ctx'> } kldir_ent_t;</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SGI_IP27</div><div class='ctx'> #include &lt;asm/sn/sn0/kldir.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/sn/klkernvars.h b/arch/mips/include/asm/sn/klkernvars.h<br/>index ea6b21795163..bb7a6c36f6e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/klkernvars.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/klkernvars.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/klkernvars.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/klkernvars.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #define KV_MAGIC		0x5f4b565f</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sn/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,6 +24,6 @@ typedef struct kern_vars_s {</div><div class='ctx'> 	unsigned long	kv_rw_baseaddr;</div><div class='ctx'> } kern_vars_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SN_KLKERNVARS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/launch.h b/arch/mips/include/asm/sn/launch.h<br/>index 04226d8d30c4..ce95187362e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/launch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/launch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/launch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/launch.h</a></div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'>  * clears the BUSY flag after control is returned to it.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef int launch_state_t;</div><div class='ctx'> typedef void (*launch_proc_t)(u64 call_parm);</div><div class='hunk'>@@ -101,6 +101,6 @@ typedef struct launch_s {</div><div class='ctx'> #define LAUNCH_FLASH	(*(void (*)(void)) \</div><div class='ctx'> 			 IP27PROM_FLASHLEDS)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SN_LAUNCH_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/nmi.h b/arch/mips/include/asm/sn/nmi.h<br/>index 12ac210f12a1..eff51606bbce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/nmi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/nmi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/nmi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/nmi.h</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef struct nmi_s {</div><div class='ctx'> 	volatile unsigned long	 magic;		/* Magic number */</div><div class='hunk'>@@ -59,13 +59,13 @@ typedef struct nmi_s {</div><div class='ctx'> 	volatile unsigned long	 gmaster;	/* Flag true only on global master*/</div><div class='ctx'> } nmi_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Following definitions are needed both in the prom &amp; the kernel</div><div class='ctx'>  * to identify the format of the nmi cpu register save area in the</div><div class='ctx'>  * low memory on each node.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct reg_struct {</div><div class='ctx'> 	unsigned long	gpr[32];</div><div class='hunk'>@@ -78,7 +78,7 @@ struct reg_struct {</div><div class='ctx'> 	unsigned long	nmi_sr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* These are the assembly language offsets into the reg_struct structure */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/addrs.h b/arch/mips/include/asm/sn/sn0/addrs.h<br/>index f13df84edfdd..a28158a91ecf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/addrs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/addrs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/addrs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/addrs.h</a></div><div class='hunk'>@@ -84,15 +84,15 @@</div><div class='ctx'> #define NASID_GET(_pa)		(int) ((UINT64_CAST (_pa) &gt;&gt;		\</div><div class='ctx'> 					NASID_SHFT) &amp; NASID_BITMASK)</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> #define NODE_SWIN_BASE(nasid, widget)					\</div><div class='ctx'> 	((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN)		\</div><div class='ctx'> 	: RAW_NODE_SWIN_BASE(nasid, widget))</div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> #define NODE_SWIN_BASE(nasid, widget) \</div><div class='ctx'>      (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) &lt;&lt; SWIN_SIZE_BITS))</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The following definitions pertain to the IO special address</div><div class='hunk'>@@ -139,11 +139,11 @@</div><div class='ctx'> /* Turn on sable logging for the processors whose bits are set. */</div><div class='ctx'> #define SABLE_LOG_TRIGGER(_map)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define KERN_NMI_ADDR(nasid, slice)					\</div><div class='ctx'> 		    TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET +	\</div><div class='ctx'> 				  (IP27_NMI_KREGS_CPU_SIZE * (slice)))</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef PROM</div><div class='ctx'> </div><div class='hunk'>@@ -248,7 +248,7 @@</div><div class='ctx'> #define KL_UART_DATA	LOCAL_HUB_ADDR(MD_UREG0_1)	/* UART data reg */</div><div class='ctx'> #define KL_I2C_REG	MD_UREG0_0			/* I2C reg */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Address 0x400 to 0x1000 ualias points to cache error eframe + misc</div><div class='ctx'>  * CACHE_ERR_SP_PTR could either contain an address to the stack, or</div><div class='hunk'>@@ -266,7 +266,7 @@</div><div class='ctx'> #define CACHE_ERR_SP		(CACHE_ERR_SP_PTR - 16)</div><div class='ctx'> #define CACHE_ERR_AREA_SIZE	(ARCS_SPB_OFFSET - CACHE_ERR_EFRAME)</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define _ARCSPROM</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/hub.h b/arch/mips/include/asm/sn/sn0/hub.h<br/>index c84adde36d41..916394319af5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hub.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hub.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hub.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/hub.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define UATTR_MSPEC	2</div><div class='ctx'> #define UATTR_UNCAC	3</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Returns the local nasid into res.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/hubio.h b/arch/mips/include/asm/sn/sn0/hubio.h<br/>index 57ece90f8cf1..c489426f8f9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubio.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubio.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubio.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/hubio.h</a></div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * The IO LLP control status register and widget control register</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef union hubii_wid_u {</div><div class='ctx'> 	u64	wid_reg_value;</div><div class='hunk'>@@ -292,7 +292,7 @@ typedef union io_perf_cnt {</div><div class='ctx'> 	} perf_cnt_bits;</div><div class='ctx'> } io_perf_cnt_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define LNK_STAT_WORKING	0x2</div><div class='hunk'>@@ -440,7 +440,7 @@ typedef union io_perf_cnt {</div><div class='ctx'> /*</div><div class='ctx'>  * Fields in CRB Register A</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef union icrba_u {</div><div class='ctx'> 	u64	reg_value;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -486,7 +486,7 @@ typedef union h1_icrba_u {</div><div class='ctx'> #define ICRBN_A_CERR_SHFT	54</div><div class='ctx'> #define ICRBN_A_ERR_MASK	0x3ff</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define IIO_ICRB_ADDR_SHFT	2	/* Shift to get proper address */</div><div class='ctx'> </div><div class='hunk'>@@ -509,7 +509,7 @@ typedef union h1_icrba_u {</div><div class='ctx'> /*</div><div class='ctx'>  * Fields in CRB Register B</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef union icrbb_u {</div><div class='ctx'> 	u64	reg_value;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -608,7 +608,7 @@ typedef union h1_icrbb_u {</div><div class='ctx'> #define b_imsg		icrbb_field_s.imsg</div><div class='ctx'> #define b_initiator	icrbb_field_s.initiator</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * values for field xtsize</div><div class='hunk'>@@ -666,7 +666,7 @@ typedef union h1_icrbb_u {</div><div class='ctx'>  * Fields in CRB Register C</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef union icrbc_s {</div><div class='ctx'> 	u64	reg_value;</div><div class='hunk'>@@ -698,13 +698,13 @@ typedef union icrbc_s {</div><div class='ctx'> #define c_barrop	icrbc_field_s.barrop</div><div class='ctx'> #define c_doresp	icrbc_field_s.doresp</div><div class='ctx'> #define c_gbr	icrbc_field_s.gbr</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fields in CRB Register D</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef union icrbd_s {</div><div class='ctx'> 	u64	reg_value;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -737,7 +737,7 @@ typedef union hubii_ifdr_u {</div><div class='ctx'> 	} hi_ifdr_fields;</div><div class='ctx'> } hubii_ifdr_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Hardware designed names for the BTE control registers.</div><div class='hunk'>@@ -784,7 +784,7 @@ typedef union hubii_ifdr_u {</div><div class='ctx'>  * IO PIO Read Table Entry format</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef union iprte_a {</div><div class='ctx'> 	u64	entry;</div><div class='hunk'>@@ -806,7 +806,7 @@ typedef union iprte_a {</div><div class='ctx'> #define iprte_init	iprte_fields.initiator</div><div class='ctx'> #define iprte_addr	iprte_fields.addr</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define IPRTE_ADDRSHFT	3</div><div class='ctx'> </div><div class='hunk'>@@ -814,7 +814,7 @@ typedef union iprte_a {</div><div class='ctx'>  * Hub IIO PRB Register format.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Note: Fields bnakctr, anakctr, xtalkctrmode, ovflow fields are</div><div class='ctx'>  * "Status" fields, and should only be used in case of clean up after errors.</div><div class='hunk'>@@ -846,7 +846,7 @@ typedef union iprb_u {</div><div class='ctx'> #define iprb_anakctr	iprb_fields_s.anakctr</div><div class='ctx'> #define iprb_xtalkctr	iprb_fields_s.xtalkctr</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * values for mode field in iprb_t.</div><div class='hunk'>@@ -861,7 +861,7 @@ typedef union iprb_u {</div><div class='ctx'> /*</div><div class='ctx'>  * IO CRB entry C_A to E_A : Partial (cache) CRBS</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef union icrbp_a {</div><div class='ctx'> 	u64   ip_reg;	    /* the entire register value	*/</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -895,7 +895,7 @@ typedef union icrbp_a {</div><div class='ctx'> 	} ip_fmt;</div><div class='ctx'> } icrbp_a_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * A couple of defines to go with the above structure.</div><div class='hunk'>@@ -903,7 +903,7 @@ typedef union icrbp_a {</div><div class='ctx'> #define ICRBP_A_CERR_SHFT	54</div><div class='ctx'> #define ICRBP_A_ERR_MASK	0x3ff</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef union hubii_idsr {</div><div class='ctx'> 	u64 iin_reg;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -917,7 +917,7 @@ typedef union hubii_idsr {</div><div class='ctx'> 		    level : 7;</div><div class='ctx'> 	} iin_fmt;</div><div class='ctx'> } hubii_idsr_t;</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * IO BTE Length/Status (IIO_IBLS) register bit field definitions</div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/hubmd.h b/arch/mips/include/asm/sn/sn0/hubmd.h<br/>index 305d002be182..97d9cbbf9f4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubmd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubmd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/hubmd.h</a></div><div class='hunk'>@@ -423,7 +423,7 @@</div><div class='ctx'>  * Operations on page migration threshold register</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * LED register macros</div><div class='hunk'>@@ -735,7 +735,7 @@ typedef union md_perf_cnt {</div><div class='ctx'> } md_perf_cnt_t;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define DIR_ERROR_VALID_MASK	0xe000000000000000</div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/hubni.h b/arch/mips/include/asm/sn/sn0/hubni.h<br/>index b8253142cb83..4830bae723e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubni.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubni.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubni.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/hubni.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef _ASM_SGI_SN0_HUBNI_H</div><div class='ctx'> #define _ASM_SGI_SN0_HUBNI_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -226,7 +226,7 @@</div><div class='ctx'> </div><div class='ctx'> #define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef union	hubni_port_error_u {</div><div class='ctx'> 	u64	nipe_reg_value;</div><div class='hunk'>@@ -258,6 +258,6 @@ static inline int get_region_shift(void)</div><div class='ctx'> 	return NASID_TO_COARSEREG_SHFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SGI_SN0_HUBNI_H */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/sn0/hubpi.h b/arch/mips/include/asm/sn/sn0/hubpi.h<br/>index 7b83655913c5..a4fe0feeef0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubpi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/sn0/hubpi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/sn0/hubpi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/sn0/hubpi.h</a></div><div class='hunk'>@@ -306,7 +306,7 @@</div><div class='ctx'> #define ERR_STACK_SIZE_BYTES(_sz) \</div><div class='ctx'>        ((_sz) ? (PI_MIN_STACK_SIZE &lt;&lt; ((_sz) - 1)) : 0)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * format of error stack and error status registers.</div><div class='ctx'>  */</div><div class='hunk'>@@ -359,7 +359,7 @@ typedef union pi_err_stat1 {</div><div class='ctx'> </div><div class='ctx'> typedef u64	rtc_time_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Bits in PI_SYSAD_ERRCHK_EN */</div><div class='head'>diff --git a/arch/mips/include/asm/sn/types.h b/arch/mips/include/asm/sn/types.h<br/>index 451ba1ee41ad..53d04c04d6f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sn/types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sn/types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sn/types.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long	cpuid_t;</div><div class='ctx'> typedef signed short	nasid_t;	/* node id in numa-as-id space */</div><div class='head'>diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h<br/>index 4724a563c5bf..43a09f0dd3ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/socket.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/socket.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/socket.h</a></div><div class='hunk'>@@ -36,15 +36,6 @@ enum sock_type {</div><div class='ctx'> 	SOCK_PACKET	= 10,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define SOCK_MAX (SOCK_PACKET + 1)</div><div class='del'>-/* Mask which covers at least up to SOCK_MASK-1.  The</div><div class='del'>- *  * remaining bits are used as flags. */</div><div class='del'>-#define SOCK_TYPE_MASK 0xf</div><div class='del'>-</div><div class='del'>-/* Flags for socket, socketpair, paccept */</div><div class='del'>-#define SOCK_CLOEXEC	O_CLOEXEC</div><div class='del'>-#define SOCK_NONBLOCK	O_NONBLOCK</div><div class='del'>-</div><div class='ctx'> #define ARCH_HAS_SOCKET_TYPES 1</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SOCKET_H */</div><div class='head'>diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h<br/>index a4374b4cb88f..d6ccd5344021 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/switch_to.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/switch_to.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/switch_to.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/switch_to.h</a></div><div class='hunk'>@@ -97,7 +97,7 @@ do {									\</div><div class='ctx'> 	}								\</div><div class='ctx'> } while (0)</div><div class='ctx'> #else</div><div class='del'>-# define __sanitize_fcr31(next)</div><div class='add'>+# define __sanitize_fcr31(next) do { (void) (next); } while (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/mips/include/asm/sync.h b/arch/mips/include/asm/sync.h<br/>index 44c04a82d0b7..d7873e8d7e6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sync.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/sync.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/sync.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/sync.h</a></div><div class='hunk'>@@ -193,7 +193,7 @@</div><div class='ctx'>  * Preprocessor magic to expand macros used as arguments before we insert them</div><div class='ctx'>  * into assembly code.</div><div class='ctx'>  */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> # define ___SYNC(type, reason, else)				\</div><div class='ctx'> 	____SYNC(type, reason, else)</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h<br/>index ebdf4d910af2..d19e67e2aa6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/syscall.h</a></div><div class='hunk'>@@ -41,6 +41,21 @@ static inline long syscall_get_nr(struct task_struct *task,</div><div class='ctx'> 	return task_thread_info(task)-&gt;syscall;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * New syscall number has to be assigned to regs[2] because</div><div class='add'>+	 * it is loaded from there unconditionally after return from</div><div class='add'>+	 * syscall_trace_enter() invocation.</div><div class='add'>+	 *</div><div class='add'>+	 * Consequently, if the syscall was indirect and nr != __NR_syscall,</div><div class='add'>+	 * then after this assignment the syscall will cease to be indirect.</div><div class='add'>+	 */</div><div class='add'>+	task_thread_info(task)-&gt;syscall = regs-&gt;regs[2] = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mips_syscall_update_nr(struct task_struct *task,</div><div class='ctx'> 					  struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -57,37 +72,38 @@ static inline void mips_syscall_update_nr(struct task_struct *task,</div><div class='ctx'> static inline void mips_get_syscall_arg(unsigned long *arg,</div><div class='ctx'> 	struct task_struct *task, struct pt_regs *regs, unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	unsigned long usp __maybe_unused = regs-&gt;regs[29];</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_32BIT</div><div class='ctx'> 	switch (n) {</div><div class='ctx'> 	case 0: case 1: case 2: case 3:</div><div class='ctx'> 		*arg = regs-&gt;regs[4 + n];</div><div class='del'>-</div><div class='ctx'> 		return;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_32BIT</div><div class='ctx'> 	case 4: case 5: case 6: case 7:</div><div class='del'>-		get_user(*arg, (int *)usp + n);</div><div class='add'>+		*arg = regs-&gt;args[n];</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	*arg = regs-&gt;regs[4 + n];</div><div class='add'>+	if ((IS_ENABLED(CONFIG_MIPS32_O32) &amp;&amp;</div><div class='add'>+	     test_tsk_thread_flag(task, TIF_32BIT_REGS)))</div><div class='add'>+		*arg = (unsigned int)*arg;</div><div class='ctx'> #endif</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_64BIT</div><div class='add'>+static inline void mips_set_syscall_arg(unsigned long *arg,</div><div class='add'>+	struct task_struct *task, struct pt_regs *regs, unsigned int n)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_32BIT</div><div class='add'>+	switch (n) {</div><div class='add'>+	case 0: case 1: case 2: case 3:</div><div class='add'>+		regs-&gt;regs[4 + n] = *arg;</div><div class='add'>+		return;</div><div class='ctx'> 	case 4: case 5: case 6: case 7:</div><div class='del'>-#ifdef CONFIG_MIPS32_O32</div><div class='del'>-		if (test_tsk_thread_flag(task, TIF_32BIT_REGS))</div><div class='del'>-			get_user(*arg, (int *)usp + n);</div><div class='del'>-		else</div><div class='del'>-#endif</div><div class='del'>-			*arg = regs-&gt;regs[4 + n];</div><div class='del'>-</div><div class='add'>+		*arg = regs-&gt;args[n] = *arg;</div><div class='ctx'> 		return;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	unreachable();</div><div class='add'>+#else</div><div class='add'>+	regs-&gt;regs[4 + n] = *arg;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline long syscall_get_error(struct task_struct *task,</div><div class='hunk'>@@ -136,6 +152,17 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 		mips_get_syscall_arg(args++, task, regs, i++);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	unsigned int n = 6;</div><div class='add'>+</div><div class='add'>+	while (n--)</div><div class='add'>+		mips_set_syscall_arg(args++, task, regs, i++);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern const unsigned long sys_call_table[];</div><div class='ctx'> extern const unsigned long sys32_call_table[];</div><div class='ctx'> extern const unsigned long sysn32_call_table[];</div><div class='head'>diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h<br/>index b9d76e8ac5a2..2707dad260dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/thread_info.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +73,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> register unsigned long current_stack_pointer __asm__("sp");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='ctx'> #if defined(CONFIG_PAGE_SIZE_4KB) &amp;&amp; defined(CONFIG_32BIT)</div><div class='head'>diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h<br/>index e855a3611d92..5e7193b759f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/time.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/time.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/time.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/time.h</a></div><div class='hunk'>@@ -55,7 +55,7 @@ static inline int mips_clockevent_init(void)</div><div class='ctx'>  */</div><div class='ctx'> extern int init_r4k_clocksource(void);</div><div class='ctx'> </div><div class='del'>-static inline int init_mips_clocksource(void)</div><div class='add'>+static inline __init int init_mips_clocksource(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_CSRC_R4K</div><div class='ctx'> 	return init_r4k_clocksource();</div><div class='head'>diff --git a/arch/mips/include/asm/topology.h b/arch/mips/include/asm/topology.h<br/>index 0673d2d0f2e6..5158c802eb65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/topology.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/topology.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/topology.h</a></div><div class='hunk'>@@ -16,6 +16,9 @@</div><div class='ctx'> #define topology_core_id(cpu)			(cpu_core(&amp;cpu_data[cpu]))</div><div class='ctx'> #define topology_core_cpumask(cpu)		(&amp;cpu_core_map[cpu])</div><div class='ctx'> #define topology_sibling_cpumask(cpu)		(&amp;cpu_sibling_map[cpu])</div><div class='add'>+</div><div class='add'>+extern struct cpumask __cpu_primary_thread_mask;</div><div class='add'>+#define cpu_primary_thread_mask ((const struct cpumask *)&amp;__cpu_primary_thread_mask)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_TOPOLOGY_H */</div><div class='head'>diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h<br/>index ba83d3fb0a84..6a974b990f4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/unistd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/unistd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/unistd.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #define NR_syscalls  (__NR_O32_Linux + __NR_O32_Linux_syscalls)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define __ARCH_WANT_NEW_STAT</div><div class='ctx'> #define __ARCH_WANT_OLD_READDIR</div><div class='hunk'>@@ -62,6 +62,6 @@</div><div class='ctx'> /* whitelists for checksyscalls */</div><div class='ctx'> #define __IGNORE_fadvise64_64</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_UNISTD_H */</div><div class='head'>diff --git a/arch/mips/include/asm/vdso/gettimeofday.h b/arch/mips/include/asm/vdso/gettimeofday.h<br/>index 44a45f3fa4b0..32d2d173fdc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> #define __ASM_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/vdso/vdso.h&gt;</div><div class='ctx'> #include &lt;asm/clocksource.h&gt;</div><div class='hunk'>@@ -167,7 +167,7 @@ static __always_inline u64 read_r4k_count(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CLKSRC_MIPS_GIC</div><div class='ctx'> </div><div class='del'>-static __always_inline u64 read_gic_count(const struct vdso_data *data)</div><div class='add'>+static __always_inline u64 read_gic_count(const struct vdso_time_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *gic = get_gic(data);</div><div class='ctx'> 	u32 hi, hi2, lo;</div><div class='hunk'>@@ -184,7 +184,7 @@ static __always_inline u64 read_gic_count(const struct vdso_data *data)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_CSRC_R4K</div><div class='ctx'> 	if (clock_mode == VDSO_CLOCKMODE_R4K)</div><div class='hunk'>@@ -209,11 +209,12 @@ static inline bool mips_vdso_hres_capable(void)</div><div class='ctx'> }</div><div class='ctx'> #define __arch_vdso_hres_capable mips_vdso_hres_capable</div><div class='ctx'> </div><div class='del'>-static __always_inline const struct vdso_data *__arch_get_vdso_data(void)</div><div class='add'>+static __always_inline const struct vdso_time_data *__arch_get_vdso_u_time_data(void)</div><div class='ctx'> {</div><div class='del'>-	return get_vdso_data();</div><div class='add'>+	return get_vdso_time_data();</div><div class='ctx'> }</div><div class='add'>+#define __arch_get_vdso_u_time_data __arch_get_vdso_u_time_data</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/mips/include/asm/vdso/processor.h b/arch/mips/include/asm/vdso/processor.h<br/>index 511c95d735e6..05cdb366dc21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vdso/processor.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> #define __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_LOONGSON64</div><div class='ctx'> /*</div><div class='hunk'>@@ -22,6 +22,6 @@</div><div class='ctx'> #define cpu_relax()	barrier()</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_PROCESSOR_H */</div><div class='head'>diff --git a/arch/mips/include/asm/vdso/vdso.h b/arch/mips/include/asm/vdso/vdso.h<br/>index 6cd88191fefa..6889e0f2e5db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vdso/vdso.h</a></div><div class='hunk'>@@ -5,16 +5,18 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sgidefs.h&gt;</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#define __VDSO_PAGES 4</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline unsigned long get_vdso_base(void)</div><div class='add'>+static inline const struct vdso_time_data *get_vdso_time_data(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long addr;</div><div class='add'>+	const struct vdso_time_data *addr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can't use cpu_has_mips_r6 since it needs the cpu_data[]</div><div class='hunk'>@@ -27,7 +29,7 @@ static inline unsigned long get_vdso_base(void)</div><div class='ctx'> 	 * We can't use addiupc because there is no label-label</div><div class='ctx'> 	 * support for the addiupc reloc</div><div class='ctx'> 	 */</div><div class='del'>-	__asm__("lapc	%0, _start			\n"</div><div class='add'>+	__asm__("lapc	%0, vdso_u_time_data		\n"</div><div class='ctx'> 		: "=r" (addr) : :);</div><div class='ctx'> #else</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -46,7 +48,7 @@ static inline unsigned long get_vdso_base(void)</div><div class='ctx'> 	"	.set noreorder				\n"</div><div class='ctx'> 	"	bal	1f				\n"</div><div class='ctx'> 	"	 nop					\n"</div><div class='del'>-	"	.word	_start - .			\n"</div><div class='add'>+	"	.word	vdso_u_time_data - .		\n"</div><div class='ctx'> 	"1:	lw	%0, 0($31)			\n"</div><div class='ctx'> 	"	" STR(PTR_ADDU) " %0, $31, %0		\n"</div><div class='ctx'> 	"	.set pop				\n"</div><div class='hunk'>@@ -58,18 +60,13 @@ static inline unsigned long get_vdso_base(void)</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline const struct vdso_data *get_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return (const struct vdso_data *)(get_vdso_base() - PAGE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CLKSRC_MIPS_GIC</div><div class='ctx'> </div><div class='del'>-static inline void __iomem *get_gic(const struct vdso_data *data)</div><div class='add'>+static inline void __iomem *get_gic(const struct vdso_time_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	return (void __iomem *)((unsigned long)data &amp; PAGE_MASK) - PAGE_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_CLKSRC_MIPS_GIC */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/mips/include/asm/vdso/vsyscall.h b/arch/mips/include/asm/vdso/vsyscall.h<br/>index 47168aaf1eff..0f061a9babd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vdso/vsyscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vdso/vsyscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vdso/vsyscall.h</a></div><div class='hunk'>@@ -2,26 +2,15 @@</div><div class='ctx'> #ifndef __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> #define __ASM_VDSO_VSYSCALL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='del'>-#include &lt;vdso/datapage.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Update the vDSO data page to keep in sync with kernel timekeeping.</div><div class='del'>- */</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_data *__mips_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __mips_get_k_vdso_data</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The asm-generic header needs to be included after the definitions above */</div><div class='ctx'> #include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_VSYSCALL_H */</div><div class='head'>diff --git a/arch/mips/include/asm/vga.h b/arch/mips/include/asm/vga.h<br/>index 0136e0366698..491c2b5aeb81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vga.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vga.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vga.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vga.h</a></div><div class='hunk'>@@ -47,10 +47,6 @@ static inline void scr_memsetw(u16 *s, u16 v, unsigned int count)</div><div class='ctx'> 	memset16(s, cpu_to_le16(v), count / 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define scr_memcpyw(d, s, c) memcpy(d, s, c)</div><div class='del'>-#define scr_memmovew(d, s, c) memmove(d, s, c)</div><div class='del'>-#define VT_BUF_HAVE_MEMCPYW</div><div class='del'>-#define VT_BUF_HAVE_MEMMOVEW</div><div class='ctx'> #define VT_BUF_HAVE_MEMSETW</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_VGA_H */</div><div class='head'>diff --git a/arch/mips/include/asm/vpe.h b/arch/mips/include/asm/vpe.h<br/>index 61fd4d0aeda4..c0769dc4b853 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vpe.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/vpe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/vpe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/vpe.h</a></div><div class='hunk'>@@ -119,4 +119,12 @@ void cleanup_tc(struct tc *tc);</div><div class='ctx'> </div><div class='ctx'> int __init vpe_module_init(void);</div><div class='ctx'> void __exit vpe_module_exit(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MIPS_VPE_LOADER_MT</div><div class='add'>+void *vpe_alloc(void);</div><div class='add'>+int vpe_start(void *vpe, unsigned long start);</div><div class='add'>+int vpe_stop(void *vpe);</div><div class='add'>+int vpe_free(void *vpe);</div><div class='add'>+#endif /* CONFIG_MIPS_VPE_LOADER_MT */</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_VPE_H */</div><div class='head'>diff --git a/arch/mips/include/asm/xtalk/xtalk.h b/arch/mips/include/asm/xtalk/xtalk.h<br/>index 680e7efebbaf..dfe6a3fce65a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/xtalk/xtalk.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/xtalk/xtalk.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/xtalk/xtalk.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/xtalk/xtalk.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #ifndef _ASM_XTALK_XTALK_H</div><div class='ctx'> #define _ASM_XTALK_XTALK_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * User-level device driver visible types</div><div class='ctx'>  */</div><div class='hunk'>@@ -47,6 +47,6 @@ typedef struct xtalk_piomap_s *xtalk_piomap_t;</div><div class='ctx'> #define XIO_PORT(x)	((xwidgetnum_t)(((x)&amp;XIO_PORT_BITS) &gt;&gt; XIO_PORT_SHIFT))</div><div class='ctx'> #define XIO_PACK(p, o)	((((uint64_t)(p))&lt;&lt;XIO_PORT_SHIFT) | ((o)&amp;XIO_ADDR_BITS))</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_XTALK_XTALK_H */</div><div class='head'>diff --git a/arch/mips/include/asm/xtalk/xwidget.h b/arch/mips/include/asm/xtalk/xwidget.h<br/>index 24f121da6a1d..efcfe4494576 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/xtalk/xwidget.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/asm/xtalk/xwidget.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/asm/xtalk/xwidget.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/asm/xtalk/xwidget.h</a></div><div class='hunk'>@@ -203,7 +203,7 @@ static const struct widget_ident __initconst widget_idents[] = {</div><div class='ctx'>  * widget target flush register are widget dependent thus will not be</div><div class='ctx'>  * defined here</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef u32 widgetreg_t;</div><div class='ctx'> </div><div class='ctx'> /* widget configuration registers */</div><div class='hunk'>@@ -274,6 +274,6 @@ typedef struct xwidget_hwid_s {</div><div class='ctx'> 	((hwid2)-&gt;mfg_num == XWIDGET_MFG_NUM_NONE) || \</div><div class='ctx'> 	((hwid1)-&gt;mfg_num == (hwid2)-&gt;mfg_num)))</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_XTALK_XWIDGET_H */</div><div class='head'>diff --git a/arch/mips/include/uapi/asm/mman.h b/arch/mips/include/uapi/asm/mman.h<br/>index 9c48d9a21aa0..b700dae28c48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/uapi/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/uapi/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/uapi/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/uapi/asm/mman.h</a></div><div class='hunk'>@@ -105,6 +105,9 @@</div><div class='ctx'> </div><div class='ctx'> #define MADV_COLLAPSE	25		/* Synchronous hugepage collapse */</div><div class='ctx'> </div><div class='add'>+#define MADV_GUARD_INSTALL 102		/* fatal signal on access to range */</div><div class='add'>+#define MADV_GUARD_REMOVE 103		/* unguard range */</div><div class='add'>+</div><div class='ctx'> /* compatibility flags */</div><div class='ctx'> #define MAP_FILE	0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h<br/>index 8ab7582291ab..72fb1b006da9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/include/uapi/asm/socket.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/include/uapi/asm/socket.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -157,6 +157,15 @@</div><div class='ctx'> #define SCM_DEVMEM_DMABUF	SO_DEVMEM_DMABUF</div><div class='ctx'> #define SO_DEVMEM_DONTNEED	80</div><div class='ctx'> </div><div class='add'>+#define SCM_TS_OPT_ID		81</div><div class='add'>+</div><div class='add'>+#define SO_RCVPRIORITY		82</div><div class='add'>+</div><div class='add'>+#define SO_PASSRIGHTS		83</div><div class='add'>+</div><div class='add'>+#define SO_INQ			84</div><div class='add'>+#define SCM_INQ			SO_INQ</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> #if __BITS_PER_LONG == 64</div><div class='head'>diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile<br/>index ecf3278a32f7..95a1e674fd67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for the Linux/MIPS kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y		:= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	:= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y		+= head.o branch.o cmpxchg.o elf.o entry.o genex.o idle.o irq.o \</div><div class='ctx'> 		   process.o prom.o ptrace.o reset.o setup.o signal.o \</div><div class='head'>diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c<br/>index cb1045ebab06..5debd9a3854a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'>  * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com</div><div class='ctx'>  * Copyright (C) 2000 MIPS Technologies, Inc.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -27,6 +29,12 @@ void output_ptreg_defines(void);</div><div class='ctx'> void output_ptreg_defines(void)</div><div class='ctx'> {</div><div class='ctx'> 	COMMENT("MIPS pt_regs offsets.");</div><div class='add'>+#ifdef CONFIG_32BIT</div><div class='add'>+	OFFSET(PT_ARG4, pt_regs, args[4]);</div><div class='add'>+	OFFSET(PT_ARG5, pt_regs, args[5]);</div><div class='add'>+	OFFSET(PT_ARG6, pt_regs, args[6]);</div><div class='add'>+	OFFSET(PT_ARG7, pt_regs, args[7]);</div><div class='add'>+#endif</div><div class='ctx'> 	OFFSET(PT_R0, pt_regs, regs[0]);</div><div class='ctx'> 	OFFSET(PT_R1, pt_regs, regs[1]);</div><div class='ctx'> 	OFFSET(PT_R2, pt_regs, regs[2]);</div><div class='hunk'>@@ -404,6 +412,9 @@ void output_cps_defines(void)</div><div class='ctx'> {</div><div class='ctx'> 	COMMENT(" MIPS CPS offsets. ");</div><div class='ctx'> </div><div class='add'>+	OFFSET(CLUSTERBOOTCFG_CORECONFIG, cluster_boot_config, core_config);</div><div class='add'>+	DEFINE(CLUSTERBOOTCFG_SIZE, sizeof(struct cluster_boot_config));</div><div class='add'>+</div><div class='ctx'> 	OFFSET(COREBOOTCFG_VPEMASK, core_boot_config, vpe_mask);</div><div class='ctx'> 	OFFSET(COREBOOTCFG_VPECONFIG, core_boot_config, vpe_config);</div><div class='ctx'> 	DEFINE(COREBOOTCFG_SIZE, sizeof(struct core_boot_config));</div><div class='head'>diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c<br/>index d39a2963b451..2a14dc4ee57e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cevt-bcm1480.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cevt-bcm1480.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cevt-bcm1480.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/cevt-bcm1480.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ void sb1480_clockevent_init(void)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(cpu &gt; 3);	/* Only have 4 general purpose timers */</div><div class='ctx'> </div><div class='del'>-	sprintf(name, "bcm1480-counter-%d", cpu);</div><div class='add'>+	sprintf(name, "bcm1480-counter-%u", cpu);</div><div class='ctx'> 	cd-&gt;name		= name;</div><div class='ctx'> 	cd-&gt;features		= CLOCK_EVT_FEAT_PERIODIC |</div><div class='ctx'> 				  CLOCK_EVT_FEAT_ONESHOT;</div><div class='head'>diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c<br/>index 9a47fbcd4638..de64d6bb7ba3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cevt-ds1287.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cevt-ds1287.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cevt-ds1287.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/cevt-ds1287.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/mc146818rtc.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/ds1287.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='ctx'> int ds1287_timer_state(void)</div><div class='head'>diff --git a/arch/mips/kernel/cmpxchg.c b/arch/mips/kernel/cmpxchg.c<br/>index e974a4954df8..c371def2302d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cmpxchg.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cmpxchg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cmpxchg.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/cmpxchg.c</a></div><div class='hunk'>@@ -102,3 +102,4 @@ unsigned long __cmpxchg_small(volatile void *ptr, unsigned long old,</div><div class='ctx'> 			return old;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(__cmpxchg_small);</div><div class='head'>diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S<br/>index f876309130ad..2ae7034a3d5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cps-vec.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cps-vec.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cps-vec.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/cps-vec.S</a></div><div class='hunk'>@@ -19,6 +19,10 @@</div><div class='ctx'> #define GCR_CPC_BASE_OFS	0x0088</div><div class='ctx'> #define GCR_CL_COHERENCE_OFS	0x2008</div><div class='ctx'> #define GCR_CL_ID_OFS		0x2028</div><div class='add'>+#define  CM3_GCR_Cx_ID_CLUSTER_SHF	8</div><div class='add'>+#define  CM3_GCR_Cx_ID_CLUSTER_MSK	(0xff &lt;&lt; 8)</div><div class='add'>+#define  CM3_GCR_Cx_ID_CORENUM_SHF	0</div><div class='add'>+#define  CM3_GCR_Cx_ID_CORENUM_MSK	(0xff &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> #define CPC_CL_VC_STOP_OFS	0x2020</div><div class='ctx'> #define CPC_CL_VC_RUN_OFS	0x2028</div><div class='hunk'>@@ -271,12 +275,21 @@ LEAF(mips_cps_core_init)</div><div class='ctx'>  */</div><div class='ctx'> LEAF(mips_cps_get_bootcfg)</div><div class='ctx'> 	/* Calculate a pointer to this cores struct core_boot_config */</div><div class='add'>+	PTR_LA	v0, mips_cps_cluster_bootcfg</div><div class='add'>+	PTR_L	v0, 0(v0)</div><div class='ctx'> 	lw	t0, GCR_CL_ID_OFS(s1)</div><div class='add'>+#ifdef CONFIG_CPU_MIPSR6</div><div class='add'>+	ext	t1, t0, CM3_GCR_Cx_ID_CLUSTER_SHF, 8</div><div class='add'>+	li	t2, CLUSTERBOOTCFG_SIZE</div><div class='add'>+	mul	t1, t1, t2</div><div class='add'>+	PTR_ADDU \</div><div class='add'>+		v0, v0, t1</div><div class='add'>+#endif</div><div class='add'>+	PTR_L	v0, CLUSTERBOOTCFG_CORECONFIG(v0)</div><div class='add'>+	andi	t0, t0, CM3_GCR_Cx_ID_CORENUM_MSK</div><div class='ctx'> 	li	t1, COREBOOTCFG_SIZE</div><div class='ctx'> 	mul	t0, t0, t1</div><div class='del'>-	PTR_LA	t1, mips_cps_core_bootcfg</div><div class='del'>-	PTR_L	t1, 0(t1)</div><div class='del'>-	PTR_ADDU v0, t0, t1</div><div class='add'>+	PTR_ADDU v0, v0, t0</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate this VPEs ID. If the core doesn't support MT use 0 */</div><div class='ctx'> 	li	t9, 0</div><div class='head'>diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c<br/>index af7412549e6e..1e49e05ac8b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cpu-probe.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/cpu-probe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/cpu-probe.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/cpu-probe.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mmu_context.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='hunk'>@@ -37,6 +38,8 @@</div><div class='ctx'> unsigned int elf_hwcap __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL_GPL(elf_hwcap);</div><div class='ctx'> </div><div class='add'>+static bool mmid_disabled_quirk;</div><div class='add'>+</div><div class='ctx'> static inline unsigned long cpu_get_msa_id(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long status, msa_id;</div><div class='hunk'>@@ -645,7 +648,7 @@ static inline unsigned int decode_config5(struct cpuinfo_mips *c)</div><div class='ctx'> 	config5 &amp;= ~(MIPS_CONF5_UFR | MIPS_CONF5_UFE);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_mips_r6) {</div><div class='del'>-		if (!__builtin_constant_p(cpu_has_mmid) || cpu_has_mmid)</div><div class='add'>+		if (!mmid_disabled_quirk &amp;&amp; (!__builtin_constant_p(cpu_has_mmid) || cpu_has_mmid))</div><div class='ctx'> 			config5 |= MIPS_CONF5_MI;</div><div class='ctx'> 		else</div><div class='ctx'> 			config5 &amp;= ~MIPS_CONF5_MI;</div><div class='hunk'>@@ -708,7 +711,6 @@ static inline unsigned int decode_config5(struct cpuinfo_mips *c)</div><div class='ctx'> 					max_mmid_width);</div><div class='ctx'> 				asid_mask = GENMASK(max_mmid_width - 1, 0);</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='ctx'> 			set_cpu_asid_mask(c, asid_mask);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1286,14 +1288,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		set_cpu_asid_mask(c, MIPS_ENTRYHI_ASID);</div><div class='ctx'> 		c-&gt;writecombine = _CACHE_UNCACHED_ACCELERATED;</div><div class='ctx'> 		break;</div><div class='del'>-	case PRID_IMP_LOONGSON_32:  /* Loongson-1 */</div><div class='add'>+	case PRID_IMP_LOONGSON_32:</div><div class='ctx'> 		decode_configs(c);</div><div class='ctx'> </div><div class='ctx'> 		c-&gt;cputype = CPU_LOONGSON32;</div><div class='ctx'> </div><div class='ctx'> 		switch (c-&gt;processor_id &amp; PRID_REV_MASK) {</div><div class='del'>-		case PRID_REV_LOONGSON1B:</div><div class='del'>-			__cpu_name[cpu] = "Loongson 1B";</div><div class='add'>+		case PRID_REV_LOONGSON1:</div><div class='add'>+			__cpu_name[cpu] = "ICT Loongson-1";</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2046,3 +2048,39 @@ void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe)</div><div class='ctx'> 	cpuinfo-&gt;globalnumber &amp;= ~MIPS_GLOBALNUMBER_VP;</div><div class='ctx'> 	cpuinfo-&gt;globalnumber |= vpe &lt;&lt; MIPS_GLOBALNUMBER_VP_SHF;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void cpu_disable_mmid(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long asid_mask;</div><div class='add'>+	unsigned int cpu = smp_processor_id();</div><div class='add'>+	struct cpuinfo_mips *c = &amp;current_cpu_data;</div><div class='add'>+	unsigned int config4 = read_c0_config4();</div><div class='add'>+	unsigned int config5 =  read_c0_config5();</div><div class='add'>+</div><div class='add'>+	/* Setup the initial ASID mask based on config4 */</div><div class='add'>+	asid_mask = MIPS_ENTRYHI_ASID;</div><div class='add'>+	if (config4 &amp; MIPS_CONF4_AE)</div><div class='add'>+		asid_mask |= MIPS_ENTRYHI_ASIDX;</div><div class='add'>+	set_cpu_asid_mask(c, asid_mask);</div><div class='add'>+</div><div class='add'>+	/* Disable MMID in the C0 and update cpuinfo_mips accordingly */</div><div class='add'>+	config5 &amp;= ~(MIPS_CONF5_UFR | MIPS_CONF5_UFE);</div><div class='add'>+	config5 &amp;= ~MIPS_CONF5_MI;</div><div class='add'>+	write_c0_config5(config5);</div><div class='add'>+	/* Ensure the write to config5 above takes effect */</div><div class='add'>+	back_to_back_c0_hazard();</div><div class='add'>+	c-&gt;options &amp;= ~MIPS_CPU_MMID;</div><div class='add'>+</div><div class='add'>+	/* Setup asid cache value cleared in per_cpu_trap_init() */</div><div class='add'>+	cpu_data[cpu].asid_cache = asid_first_version(cpu);</div><div class='add'>+</div><div class='add'>+	/* Reinit context for each CPU */</div><div class='add'>+	for_each_possible_cpu(i)</div><div class='add'>+		set_cpu_context(i, &amp;init_mm, 0);</div><div class='add'>+</div><div class='add'>+	/* Ensure that now MMID will be seen as disable */</div><div class='add'>+	mmid_disabled_quirk = true;</div><div class='add'>+</div><div class='add'>+	pr_info("MMID support disabled due to hardware support issue\n");</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c<br/>index 8c401e42301c..f39e85fd58fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/ftrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/ftrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/ftrace.c</a></div><div class='hunk'>@@ -248,7 +248,7 @@ int ftrace_disable_ftrace_graph_caller(void)</div><div class='ctx'> #define S_R_SP	(0xafb0 &lt;&lt; 16)	/* s{d,w} R, offset(sp) */</div><div class='ctx'> #define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */</div><div class='ctx'> </div><div class='del'>-unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long</div><div class='add'>+static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long</div><div class='ctx'> 		old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long sp, ip, tmp;</div><div class='head'>diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S<br/>index a572ce36a24f..08c0a01d9a29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/genex.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/genex.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/genex.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/genex.S</a></div><div class='hunk'>@@ -104,48 +104,59 @@ handle_vcei:</div><div class='ctx'> </div><div class='ctx'> 	__FINIT</div><div class='ctx'> </div><div class='del'>-	.align	5	/* 32 byte rollback region */</div><div class='del'>-LEAF(__r4k_wait)</div><div class='del'>-	.set	push</div><div class='del'>-	.set	noreorder</div><div class='del'>-	/* start of rollback region */</div><div class='del'>-	LONG_L	t0, TI_FLAGS($28)</div><div class='del'>-	nop</div><div class='del'>-	andi	t0, _TIF_NEED_RESCHED</div><div class='del'>-	bnez	t0, 1f</div><div class='del'>-	 nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-#ifdef CONFIG_CPU_MICROMIPS</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-#endif</div><div class='add'>+	.section .cpuidle.text,"ax"</div><div class='add'>+	/* Align to 32 bytes for the maximum idle interrupt region size. */</div><div class='add'>+	.align	5</div><div class='add'>+LEAF(r4k_wait)</div><div class='add'>+	/* Keep the ISA bit clear for calculations on local labels here. */</div><div class='add'>+0:	.fill 	0</div><div class='add'>+	/* Start of idle interrupt region. */</div><div class='add'>+	local_irq_enable</div><div class='add'>+	/*</div><div class='add'>+	 * If an interrupt lands here, before going idle on the next</div><div class='add'>+	 * instruction, we must *NOT* go idle since the interrupt could</div><div class='add'>+	 * have set TIF_NEED_RESCHED or caused a timer to need resched.</div><div class='add'>+	 * Fall through -- see skipover_handler below -- and have the</div><div class='add'>+	 * idle loop take care of things.</div><div class='add'>+	 */</div><div class='add'>+1:	.fill	0</div><div class='add'>+	/* The R2 EI/EHB sequence takes 8 bytes, otherwise pad up.  */</div><div class='add'>+	.if		1b - 0b &gt; 32</div><div class='add'>+	.error	"overlong idle interrupt region"</div><div class='add'>+	.elseif	1b - 0b &gt; 8</div><div class='add'>+	.align	4</div><div class='add'>+	.endif</div><div class='add'>+2:	.fill	0</div><div class='add'>+	.equ	r4k_wait_idle_size, 2b - 0b</div><div class='add'>+	/* End of idle interrupt region; size has to be a power of 2. */</div><div class='ctx'> 	.set	MIPS_ISA_ARCH_LEVEL_RAW</div><div class='add'>+r4k_wait_insn:</div><div class='ctx'> 	wait</div><div class='del'>-	/* end of rollback region (the region size must be power of two) */</div><div class='del'>-1:</div><div class='add'>+r4k_wait_exit:</div><div class='add'>+	.set	mips0</div><div class='add'>+	local_irq_disable</div><div class='ctx'> 	jr	ra</div><div class='del'>-	 nop</div><div class='del'>-	.set	pop</div><div class='del'>-	END(__r4k_wait)</div><div class='add'>+	END(r4k_wait)</div><div class='add'>+	.previous</div><div class='ctx'> </div><div class='del'>-	.macro	BUILD_ROLLBACK_PROLOGUE handler</div><div class='del'>-	FEXPORT(rollback_\handler)</div><div class='add'>+	.macro	BUILD_SKIPOVER_PROLOGUE handler</div><div class='add'>+	FEXPORT(skipover_\handler)</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	noat</div><div class='ctx'> 	MFC0	k0, CP0_EPC</div><div class='del'>-	PTR_LA	k1, __r4k_wait</div><div class='del'>-	ori	k0, 0x1f	/* 32 byte rollback region */</div><div class='del'>-	xori	k0, 0x1f</div><div class='add'>+	/* Subtract/add 2 to let the ISA bit propagate through the mask.  */</div><div class='add'>+	PTR_LA	k1, r4k_wait_insn - 2</div><div class='add'>+	ori 	k0, r4k_wait_idle_size - 2</div><div class='add'>+	.set	noreorder</div><div class='ctx'> 	bne	k0, k1, \handler</div><div class='add'>+	PTR_ADDIU 	k0, r4k_wait_exit - r4k_wait_insn + 2</div><div class='add'>+	.set	reorder</div><div class='ctx'> 	MTC0	k0, CP0_EPC</div><div class='ctx'> 	.set pop</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.align	5</div><div class='del'>-BUILD_ROLLBACK_PROLOGUE handle_int</div><div class='add'>+BUILD_SKIPOVER_PROLOGUE handle_int</div><div class='ctx'> NESTED(handle_int, PT_SIZE, sp)</div><div class='ctx'> 	.cfi_signal_frame</div><div class='ctx'> #ifdef CONFIG_TRACE_IRQFLAGS</div><div class='hunk'>@@ -265,7 +276,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)</div><div class='ctx'>  * This prototype is copied to ebase + n*IntCtl.VS and patched</div><div class='ctx'>  * to invoke the handler</div><div class='ctx'>  */</div><div class='del'>-BUILD_ROLLBACK_PROLOGUE except_vec_vi</div><div class='add'>+BUILD_SKIPOVER_PROLOGUE except_vec_vi</div><div class='ctx'> NESTED(except_vec_vi, 0, sp)</div><div class='ctx'> 	SAVE_SOME docfi=1</div><div class='ctx'> 	SAVE_AT docfi=1</div><div class='head'>diff --git a/arch/mips/kernel/gpio_txx9.c b/arch/mips/kernel/gpio_txx9.c<br/>index 8c083612df9d..96ac40d20c23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/gpio_txx9.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/gpio_txx9.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/gpio_txx9.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/gpio_txx9.c</a></div><div class='hunk'>@@ -32,14 +32,16 @@ static void txx9_gpio_set_raw(unsigned int offset, int value)</div><div class='ctx'> 	__raw_writel(val, &amp;txx9_pioptr-&gt;dout);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void txx9_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			  int value)</div><div class='add'>+static int txx9_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			 int value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	spin_lock_irqsave(&amp;txx9_gpio_lock, flags);</div><div class='ctx'> 	txx9_gpio_set_raw(offset, value);</div><div class='ctx'> 	mmiowb();</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;txx9_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)</div><div class='head'>diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S<br/>index b825ed4476c7..d99ed58b7043 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/head.S</a></div><div class='hunk'>@@ -59,6 +59,8 @@</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	__HEAD</div><div class='add'>+</div><div class='ctx'> #ifndef CONFIG_NO_EXCEPT_FILL</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reserved space for exception handlers.</div><div class='head'>diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c<br/>index 5abc8b7340f8..80e8a04a642e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/idle.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/idle.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/idle.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/idle.c</a></div><div class='hunk'>@@ -35,13 +35,6 @@ static void __cpuidle r3081_wait(void)</div><div class='ctx'> 	write_c0_conf(cfg | R30XX_CONF_HALT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __cpuidle r4k_wait(void)</div><div class='del'>-{</div><div class='del'>-	raw_local_irq_enable();</div><div class='del'>-	__r4k_wait();</div><div class='del'>-	raw_local_irq_disable();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This variant is preferable as it allows testing need_resched and going to</div><div class='ctx'>  * sleep depending on the outcome atomically.  Unfortunately the "It is</div><div class='head'>diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c<br/>index 3eb2cfb893e1..7c9c5dc38823 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/mips-cm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/mips-cm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/mips-cm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/mips-cm.c</a></div><div class='hunk'>@@ -5,15 +5,18 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mips-cps.h&gt;</div><div class='add'>+#include &lt;asm/smp-cps.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='ctx'> </div><div class='ctx'> void __iomem *mips_gcr_base;</div><div class='ctx'> void __iomem *mips_cm_l2sync_base;</div><div class='ctx'> int mips_cm_is64;</div><div class='add'>+bool mips_cm_is_l2_hci_broken;</div><div class='ctx'> </div><div class='ctx'> static char *cm2_tr[8] = {</div><div class='ctx'> 	"mem",	"gcr",	"gic",	"mmio",</div><div class='hunk'>@@ -237,6 +240,23 @@ static void mips_cm_probe_l2sync(void)</div><div class='ctx'> 	mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mips_cm_update_property(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *cm_node;</div><div class='add'>+</div><div class='add'>+	cm_node = of_find_compatible_node(of_root, NULL, "mobileye,eyeq6-cm");</div><div class='add'>+	if (!cm_node)</div><div class='add'>+		return;</div><div class='add'>+	pr_info("HCI (Hardware Cache Init for the L2 cache) in GCR_L2_RAM_CONFIG from the CM3 is broken");</div><div class='add'>+	mips_cm_is_l2_hci_broken = true;</div><div class='add'>+</div><div class='add'>+	/* Disable MMID only if it was configured */</div><div class='add'>+	if (cpu_has_mmid)</div><div class='add'>+		cpu_disable_mmid();</div><div class='add'>+</div><div class='add'>+	of_node_put(cm_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mips_cm_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t addr;</div><div class='hunk'>@@ -308,7 +328,9 @@ void mips_cm_lock_other(unsigned int cluster, unsigned int core,</div><div class='ctx'> 		      FIELD_PREP(CM3_GCR_Cx_OTHER_VP, vp);</div><div class='ctx'> </div><div class='ctx'> 		if (cm_rev &gt;= CM_REV_CM3_5) {</div><div class='del'>-			val |= CM_GCR_Cx_OTHER_CLUSTER_EN;</div><div class='add'>+			if (cluster != cpu_cluster(&amp;current_cpu_data))</div><div class='add'>+				val |= CM_GCR_Cx_OTHER_CLUSTER_EN;</div><div class='add'>+			val |= CM_GCR_Cx_OTHER_GIC_EN;</div><div class='ctx'> 			val |= FIELD_PREP(CM_GCR_Cx_OTHER_CLUSTER, cluster);</div><div class='ctx'> 			val |= FIELD_PREP(CM_GCR_Cx_OTHER_BLOCK, block);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -513,39 +535,23 @@ void mips_cm_error_report(void)</div><div class='ctx'> 	write_gcr_error_cause(cm_error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int mips_cps_first_online_in_cluster(void)</div><div class='add'>+unsigned int mips_cps_first_online_in_cluster(int *first_cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned int local_cl;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	local_cl = cpu_cluster(&amp;current_cpu_data);</div><div class='add'>+	unsigned int local_cl = cpu_cluster(&amp;current_cpu_data);</div><div class='add'>+	struct cpumask *local_cl_mask;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We rely upon knowledge that CPUs are numbered sequentially by</div><div class='del'>-	 * cluster - ie. CPUs 0..X will be in cluster 0, CPUs X+1..Y in cluster</div><div class='del'>-	 * 1, CPUs Y+1..Z in cluster 2 etc. This means that CPUs in the same</div><div class='del'>-	 * cluster will immediately precede or follow one another.</div><div class='del'>-	 *</div><div class='del'>-	 * First we scan backwards, until we find an online CPU in the cluster</div><div class='del'>-	 * or we move on to another cluster.</div><div class='add'>+	 * mips_cps_cluster_bootcfg is allocated in cps_prepare_cpus. If it is</div><div class='add'>+	 * not yet done, then we are so early that only one CPU is running, so</div><div class='add'>+	 * it is the first online CPU in the cluster.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = smp_processor_id() - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (cpu_cluster(&amp;cpu_data[i]) != local_cl)</div><div class='del'>-			break;</div><div class='del'>-		if (!cpu_online(i))</div><div class='del'>-			continue;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Then do the same for higher numbered CPUs */</div><div class='del'>-	for (i = smp_processor_id() + 1; i &lt; nr_cpu_ids; i++) {</div><div class='del'>-		if (cpu_cluster(&amp;cpu_data[i]) != local_cl)</div><div class='del'>-			break;</div><div class='del'>-		if (!cpu_online(i))</div><div class='del'>-			continue;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* We found no online CPUs in the local cluster */</div><div class='del'>-	return true;</div><div class='add'>+	if  (IS_ENABLED(CONFIG_MIPS_CPS) &amp;&amp; mips_cps_cluster_bootcfg)</div><div class='add'>+		local_cl_mask = &amp;mips_cps_cluster_bootcfg[local_cl].cpumask;</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	*first_cpu = cpumask_any_and_but(local_cl_mask,</div><div class='add'>+					 cpu_online_mask,</div><div class='add'>+					 smp_processor_id());</div><div class='add'>+	return (*first_cpu &gt;= nr_cpu_ids);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c<br/>index 37676a44fefb..2ef610650a9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/mips-mt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/mips-mt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/mips-mt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/mips-mt.c</a></div><div class='hunk'>@@ -122,9 +122,8 @@ void mips_mt_set_cpuoptions(void)</div><div class='ctx'> 		unsigned long ectlval;</div><div class='ctx'> 		unsigned long itcblkgrn;</div><div class='ctx'> </div><div class='del'>-		/* ErrCtl register is known as "ecc" to Linux */</div><div class='del'>-		ectlval = read_c0_ecc();</div><div class='del'>-		write_c0_ecc(ectlval | (0x1 &lt;&lt; 26));</div><div class='add'>+		ectlval = read_c0_errctl();</div><div class='add'>+		write_c0_errctl(ectlval | (0x1 &lt;&lt; 26));</div><div class='ctx'> 		ehb();</div><div class='ctx'> #define INDEX_0 (0x80000000)</div><div class='ctx'> #define INDEX_8 (0x80000008)</div><div class='hunk'>@@ -145,7 +144,7 @@ void mips_mt_set_cpuoptions(void)</div><div class='ctx'> 		ehb();</div><div class='ctx'> 		/* Write out to ITU with CACHE op */</div><div class='ctx'> 		cache_op(Index_Store_Tag_D, INDEX_0);</div><div class='del'>-		write_c0_ecc(ectlval);</div><div class='add'>+		write_c0_errctl(ectlval);</div><div class='ctx'> 		ehb();</div><div class='ctx'> 		printk("Mapped %ld ITC cells starting at 0x%08x\n",</div><div class='ctx'> 			((itcblkgrn &amp; 0x7fe00000) &gt;&gt; 20), itc_base);</div><div class='head'>diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c<br/>index c4d6b09136b1..196a070349b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/perf_event_mipsxx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/perf_event_mipsxx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/perf_event_mipsxx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/perf_event_mipsxx.c</a></div><div class='hunk'>@@ -791,8 +791,7 @@ static void handle_associated_event(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	if (!mipspmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (perf_event_overflow(event, data, regs))</div><div class='del'>-		mipsxx_pmu_disable_event(idx);</div><div class='add'>+	perf_event_overflow(event, data, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c<br/>index d09ca77e624d..3de0e05e0511 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/pm-cps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/pm-cps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/pm-cps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/pm-cps.c</a></div><div class='hunk'>@@ -57,10 +57,7 @@ static DEFINE_PER_CPU_ALIGNED(u32*, ready_count);</div><div class='ctx'> /* Indicates online CPUs coupled with the current CPU */</div><div class='ctx'> static DEFINE_PER_CPU_ALIGNED(cpumask_t, online_coupled);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Used to synchronize entry to deep idle states. Actually per-core rather</div><div class='del'>- * than per-CPU.</div><div class='del'>- */</div><div class='add'>+/* Used to synchronize entry to deep idle states */</div><div class='ctx'> static DEFINE_PER_CPU_ALIGNED(atomic_t, pm_barrier);</div><div class='ctx'> </div><div class='ctx'> /* Saved CPU state across the CPS_PM_POWER_GATED state */</div><div class='hunk'>@@ -104,17 +101,20 @@ static void coupled_barrier(atomic_t *a, unsigned online)</div><div class='ctx'> int cps_pm_enter_state(enum cps_pm_state state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned cpu = smp_processor_id();</div><div class='add'>+	unsigned int cluster = cpu_cluster(&amp;current_cpu_data);</div><div class='ctx'> 	unsigned core = cpu_core(&amp;current_cpu_data);</div><div class='ctx'> 	unsigned online, left;</div><div class='ctx'> 	cpumask_t *coupled_mask = this_cpu_ptr(&amp;online_coupled);</div><div class='ctx'> 	u32 *core_ready_count, *nc_core_ready_count;</div><div class='ctx'> 	void *nc_addr;</div><div class='ctx'> 	cps_nc_entry_fn entry;</div><div class='add'>+	struct cluster_boot_config *cluster_cfg;</div><div class='ctx'> 	struct core_boot_config *core_cfg;</div><div class='ctx'> 	struct vpe_boot_config *vpe_cfg;</div><div class='add'>+	atomic_t *barrier;</div><div class='ctx'> </div><div class='ctx'> 	/* Check that there is an entry function for this state */</div><div class='del'>-	entry = per_cpu(nc_asm_enter, core)[state];</div><div class='add'>+	entry = per_cpu(nc_asm_enter, cpu)[state];</div><div class='ctx'> 	if (!entry)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -138,7 +138,8 @@ int cps_pm_enter_state(enum cps_pm_state state)</div><div class='ctx'> 		if (!mips_cps_smp_in_use())</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		core_cfg = &amp;mips_cps_core_bootcfg[core];</div><div class='add'>+		cluster_cfg = &amp;mips_cps_cluster_bootcfg[cluster];</div><div class='add'>+		core_cfg = &amp;cluster_cfg-&gt;core_config[core];</div><div class='ctx'> 		vpe_cfg = &amp;core_cfg-&gt;vpe_config[cpu_vpe_id(&amp;current_cpu_data)];</div><div class='ctx'> 		vpe_cfg-&gt;pc = (unsigned long)mips_cps_pm_restore;</div><div class='ctx'> 		vpe_cfg-&gt;gp = (unsigned long)current_thread_info();</div><div class='hunk'>@@ -150,7 +151,7 @@ int cps_pm_enter_state(enum cps_pm_state state)</div><div class='ctx'> 	smp_mb__after_atomic();</div><div class='ctx'> </div><div class='ctx'> 	/* Create a non-coherent mapping of the core ready_count */</div><div class='del'>-	core_ready_count = per_cpu(ready_count, core);</div><div class='add'>+	core_ready_count = per_cpu(ready_count, cpu);</div><div class='ctx'> 	nc_addr = kmap_noncoherent(virt_to_page(core_ready_count),</div><div class='ctx'> 				   (unsigned long)core_ready_count);</div><div class='ctx'> 	nc_addr += ((unsigned long)core_ready_count &amp; ~PAGE_MASK);</div><div class='hunk'>@@ -158,7 +159,8 @@ int cps_pm_enter_state(enum cps_pm_state state)</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure ready_count is zero-initialised before the assembly runs */</div><div class='ctx'> 	WRITE_ONCE(*nc_core_ready_count, 0);</div><div class='del'>-	coupled_barrier(&amp;per_cpu(pm_barrier, core), online);</div><div class='add'>+	barrier = &amp;per_cpu(pm_barrier, cpumask_first(&amp;cpu_sibling_map[cpu]));</div><div class='add'>+	coupled_barrier(barrier, online);</div><div class='ctx'> </div><div class='ctx'> 	/* Run the generated entry code */</div><div class='ctx'> 	left = entry(online, nc_core_ready_count);</div><div class='hunk'>@@ -629,12 +631,14 @@ out_err:</div><div class='ctx'> </div><div class='ctx'> static int cps_pm_online_cpu(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	enum cps_pm_state state;</div><div class='del'>-	unsigned core = cpu_core(&amp;cpu_data[cpu]);</div><div class='add'>+	unsigned int sibling, core;</div><div class='ctx'> 	void *entry_fn, *core_rc;</div><div class='add'>+	enum cps_pm_state state;</div><div class='add'>+</div><div class='add'>+	core = cpu_core(&amp;cpu_data[cpu]);</div><div class='ctx'> </div><div class='ctx'> 	for (state = CPS_PM_NC_WAIT; state &lt; CPS_PM_STATE_COUNT; state++) {</div><div class='del'>-		if (per_cpu(nc_asm_enter, core)[state])</div><div class='add'>+		if (per_cpu(nc_asm_enter, cpu)[state])</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (!test_bit(state, state_support))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -646,16 +650,19 @@ static int cps_pm_online_cpu(unsigned int cpu)</div><div class='ctx'> 			clear_bit(state, state_support);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		per_cpu(nc_asm_enter, core)[state] = entry_fn;</div><div class='add'>+		for_each_cpu(sibling, &amp;cpu_sibling_map[cpu])</div><div class='add'>+			per_cpu(nc_asm_enter, sibling)[state] = entry_fn;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!per_cpu(ready_count, core)) {</div><div class='add'>+	if (!per_cpu(ready_count, cpu)) {</div><div class='ctx'> 		core_rc = kmalloc(sizeof(u32), GFP_KERNEL);</div><div class='ctx'> 		if (!core_rc) {</div><div class='ctx'> 			pr_err("Failed allocate core %u ready_count\n", core);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		per_cpu(ready_count, core) = core_rc;</div><div class='add'>+</div><div class='add'>+		for_each_cpu(sibling, &amp;cpu_sibling_map[cpu])</div><div class='add'>+			per_cpu(ready_count, sibling) = core_rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c<br/>index 8eba5a1ed664..8f0a0001540c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/proc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/proc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/proc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/proc.c</a></div><div class='hunk'>@@ -66,24 +66,23 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 	seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",</div><div class='ctx'> 		      cpu_data[n].udelay_val / (500000/HZ),</div><div class='ctx'> 		      (cpu_data[n].udelay_val / (5000/HZ)) % 100);</div><div class='del'>-	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");</div><div class='add'>+	seq_printf(m, "wait instruction\t: %s\n", str_yes_no(cpu_wait));</div><div class='ctx'> 	seq_printf(m, "microsecond timers\t: %s\n",</div><div class='del'>-		      cpu_has_counter ? "yes" : "no");</div><div class='add'>+		      str_yes_no(cpu_has_counter));</div><div class='ctx'> 	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);</div><div class='ctx'> 	seq_printf(m, "extra interrupt vector\t: %s\n",</div><div class='del'>-		      cpu_has_divec ? "yes" : "no");</div><div class='del'>-	seq_printf(m, "hardware watchpoint\t: %s",</div><div class='del'>-		      cpu_has_watch ? "yes, " : "no\n");</div><div class='add'>+		      str_yes_no(cpu_has_divec));</div><div class='add'>+	seq_printf(m, "hardware watchpoint\t: %s", str_yes_no(cpu_has_watch));</div><div class='ctx'> 	if (cpu_has_watch) {</div><div class='del'>-		seq_printf(m, "count: %d, address/irw mask: [",</div><div class='add'>+		seq_printf(m, ", count: %d, address/irw mask: [",</div><div class='ctx'> 		      cpu_data[n].watch_reg_count);</div><div class='ctx'> 		for (i = 0; i &lt; cpu_data[n].watch_reg_count; i++)</div><div class='ctx'> 			seq_printf(m, "%s0x%04x", i ? ", " : "",</div><div class='ctx'> 				cpu_data[n].watch_reg_masks[i]);</div><div class='del'>-		seq_puts(m, "]\n");</div><div class='add'>+		seq_puts(m, "]");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	seq_puts(m, "isa\t\t\t:");</div><div class='add'>+	seq_puts(m, "\nisa\t\t\t:");</div><div class='ctx'> 	if (cpu_has_mips_1)</div><div class='ctx'> 		seq_puts(m, " mips1");</div><div class='ctx'> 	if (cpu_has_mips_2)</div><div class='hunk'>@@ -155,7 +154,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_mmips) {</div><div class='ctx'> 		seq_printf(m, "micromips kernel\t: %s\n",</div><div class='del'>-		      (read_c0_config3() &amp; MIPS_CONF3_ISA_OE) ?  "yes" : "no");</div><div class='add'>+		      str_yes_no(read_c0_config3() &amp; MIPS_CONF3_ISA_OE));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	seq_puts(m, "Options implemented\t:");</div><div class='head'>diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c<br/>index b630604c577f..29191fa1801e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/process.c</a></div><div class='hunk'>@@ -107,7 +107,7 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'>  */</div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct thread_info *ti = task_thread_info(p);</div><div class='hunk'>@@ -690,18 +690,20 @@ unsigned long mips_stack_top(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Space for the VDSO, data page &amp; GIC user page */</div><div class='del'>-	top -= PAGE_ALIGN(current-&gt;thread.abi-&gt;vdso-&gt;size);</div><div class='del'>-	top -= PAGE_SIZE;</div><div class='del'>-	top -= mips_gic_present() ? PAGE_SIZE : 0;</div><div class='add'>+	if (current-&gt;thread.abi) {</div><div class='add'>+		top -= PAGE_ALIGN(current-&gt;thread.abi-&gt;vdso-&gt;size);</div><div class='add'>+		top -= PAGE_SIZE;</div><div class='add'>+		top -= mips_gic_present() ? PAGE_SIZE : 0;</div><div class='add'>+</div><div class='add'>+		/* Space to randomize the VDSO base */</div><div class='add'>+		if (current-&gt;flags &amp; PF_RANDOMIZE)</div><div class='add'>+			top -= VDSO_RANDOMIZE_SIZE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Space for cache colour alignment */</div><div class='ctx'> 	if (cpu_has_dc_aliases)</div><div class='ctx'> 		top -= shm_align_mask + 1;</div><div class='ctx'> </div><div class='del'>-	/* Space to randomize the VDSO base */</div><div class='del'>-	if (current-&gt;flags &amp; PF_RANDOMIZE)</div><div class='del'>-		top -= VDSO_RANDOMIZE_SIZE;</div><div class='del'>-</div><div class='ctx'> 	return top;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c<br/>index 6062e6fa589a..4fd6da0a06c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/prom.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@ char *mips_get_machine_name(void)</div><div class='ctx'> </div><div class='ctx'> void __init __dt_setup_arch(void *bph)</div><div class='ctx'> {</div><div class='del'>-	if (!early_init_dt_scan(bph))</div><div class='add'>+	if (!early_init_dt_scan(bph, __pa(bph)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mips_set_machine_name(of_flat_dt_get_machine_name());</div><div class='head'>diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c<br/>index 61503a36067e..3f4c94c88124 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/ptrace.c</a></div><div class='hunk'>@@ -922,58 +922,60 @@ static const struct pt_regs_offset regoffset_table[] = {</div><div class='ctx'>  */</div><div class='ctx'> int regs_query_register_offset(const char *name)</div><div class='ctx'> {</div><div class='del'>-        const struct pt_regs_offset *roff;</div><div class='del'>-        for (roff = regoffset_table; roff-&gt;name != NULL; roff++)</div><div class='del'>-                if (!strcmp(roff-&gt;name, name))</div><div class='del'>-                        return roff-&gt;offset;</div><div class='del'>-        return -EINVAL;</div><div class='add'>+	const struct pt_regs_offset *roff;</div><div class='add'>+</div><div class='add'>+	for (roff = regoffset_table; roff-&gt;name != NULL; roff++)</div><div class='add'>+		if (!strcmp(roff-&gt;name, name))</div><div class='add'>+			return roff-&gt;offset;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset mips_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type	= NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n		= ELF_NGREG,</div><div class='ctx'> 		.size		= sizeof(unsigned int),</div><div class='ctx'> 		.align		= sizeof(unsigned int),</div><div class='del'>-		.regset_get		= gpr32_get,</div><div class='add'>+		.regset_get	= gpr32_get,</div><div class='ctx'> 		.set		= gpr32_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_DSP] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_DSP,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_DSP),</div><div class='ctx'> 		.n		= NUM_DSP_REGS + 1,</div><div class='ctx'> 		.size		= sizeof(u32),</div><div class='ctx'> 		.align		= sizeof(u32),</div><div class='del'>-		.regset_get		= dsp32_get,</div><div class='add'>+		.regset_get	= dsp32_get,</div><div class='ctx'> 		.set		= dsp32_set,</div><div class='ctx'> 		.active		= dsp_active,</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_MIPS_FP_SUPPORT</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type	= NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n		= ELF_NFPREG,</div><div class='ctx'> 		.size		= sizeof(elf_fpreg_t),</div><div class='ctx'> 		.align		= sizeof(elf_fpreg_t),</div><div class='del'>-		.regset_get		= fpr_get,</div><div class='add'>+		.regset_get	= fpr_get,</div><div class='ctx'> 		.set		= fpr_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FP_MODE] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_FP_MODE,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_FP_MODE),</div><div class='ctx'> 		.n		= 1,</div><div class='ctx'> 		.size		= sizeof(int),</div><div class='ctx'> 		.align		= sizeof(int),</div><div class='del'>-		.regset_get		= fp_mode_get,</div><div class='add'>+		.regset_get	= fp_mode_get,</div><div class='ctx'> 		.set		= fp_mode_set,</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_MSA</div><div class='ctx'> 	[REGSET_MSA] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_MSA,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_MSA),</div><div class='ctx'> 		.n		= NUM_FPU_REGS + 1,</div><div class='ctx'> 		.size		= 16,</div><div class='ctx'> 		.align		= 16,</div><div class='del'>-		.regset_get		= msa_get,</div><div class='add'>+		.regset_get	= msa_get,</div><div class='ctx'> 		.set		= msa_set,</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='hunk'>@@ -993,47 +995,47 @@ static const struct user_regset_view user_mips_view = {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset mips64_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type	= NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n		= ELF_NGREG,</div><div class='ctx'> 		.size		= sizeof(unsigned long),</div><div class='ctx'> 		.align		= sizeof(unsigned long),</div><div class='del'>-		.regset_get		= gpr64_get,</div><div class='add'>+		.regset_get	= gpr64_get,</div><div class='ctx'> 		.set		= gpr64_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_DSP] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_DSP,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_DSP),</div><div class='ctx'> 		.n		= NUM_DSP_REGS + 1,</div><div class='ctx'> 		.size		= sizeof(u64),</div><div class='ctx'> 		.align		= sizeof(u64),</div><div class='del'>-		.regset_get		= dsp64_get,</div><div class='add'>+		.regset_get	= dsp64_get,</div><div class='ctx'> 		.set		= dsp64_set,</div><div class='ctx'> 		.active		= dsp_active,</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_MIPS_FP_SUPPORT</div><div class='ctx'> 	[REGSET_FP_MODE] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_FP_MODE,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_FP_MODE),</div><div class='ctx'> 		.n		= 1,</div><div class='ctx'> 		.size		= sizeof(int),</div><div class='ctx'> 		.align		= sizeof(int),</div><div class='del'>-		.regset_get		= fp_mode_get,</div><div class='add'>+		.regset_get	= fp_mode_get,</div><div class='ctx'> 		.set		= fp_mode_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type	= NT_PRFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 		.n		= ELF_NFPREG,</div><div class='ctx'> 		.size		= sizeof(elf_fpreg_t),</div><div class='ctx'> 		.align		= sizeof(elf_fpreg_t),</div><div class='del'>-		.regset_get		= fpr_get,</div><div class='add'>+		.regset_get	= fpr_get,</div><div class='ctx'> 		.set		= fpr_set,</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_HAS_MSA</div><div class='ctx'> 	[REGSET_MSA] = {</div><div class='del'>-		.core_note_type	= NT_MIPS_MSA,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(MIPS_MSA),</div><div class='ctx'> 		.n		= NUM_FPU_REGS + 1,</div><div class='ctx'> 		.size		= 16,</div><div class='ctx'> 		.align		= 16,</div><div class='del'>-		.regset_get		= msa_get,</div><div class='add'>+		.regset_get	= msa_get,</div><div class='ctx'> 		.set		= msa_set,</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1326,24 +1328,8 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SECCOMP</div><div class='del'>-	if (unlikely(test_thread_flag(TIF_SECCOMP))) {</div><div class='del'>-		int ret, i;</div><div class='del'>-		struct seccomp_data sd;</div><div class='del'>-		unsigned long args[6];</div><div class='del'>-</div><div class='del'>-		sd.nr = current_thread_info()-&gt;syscall;</div><div class='del'>-		sd.arch = syscall_get_arch(current);</div><div class='del'>-		syscall_get_arguments(current, regs, args);</div><div class='del'>-		for (i = 0; i &lt; 6; i++)</div><div class='del'>-			sd.args[i] = args[i];</div><div class='del'>-		sd.instruction_pointer = KSTK_EIP(current);</div><div class='del'>-</div><div class='del'>-		ret = __secure_computing(&amp;sd);</div><div class='del'>-		if (ret == -1)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	if (secure_computing())</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))</div><div class='ctx'> 		trace_sys_enter(regs, regs-&gt;regs[2]);</div><div class='hunk'>@@ -1367,7 +1353,7 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs)</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage void syscall_trace_leave(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-        /*</div><div class='add'>+	/*</div><div class='ctx'> 	 * We may come here right after calling schedule_user()</div><div class='ctx'> 	 * or do_notify_resume(), in which case we can be in RCU</div><div class='ctx'> 	 * user mode.</div><div class='head'>diff --git a/arch/mips/kernel/relocate.c b/arch/mips/kernel/relocate.c<br/>index 7eeeaf1ff95d..7f1c136ad850 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/relocate.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/relocate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/relocate.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/relocate.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ static int __init reloc_handler(u32 type, u32 *loc_orig, u32 *loc_new,</div><div class='ctx'> 		apply_r_mips_hi16_rel(loc_orig, loc_new, offset);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("Unhandled relocation type %d at 0x%pK\n", type,</div><div class='add'>+		pr_err("Unhandled relocation type %d at 0x%p\n", type,</div><div class='ctx'> 		       loc_orig);</div><div class='ctx'> 		return -ENOEXEC;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -337,7 +337,7 @@ void *__init relocate_kernel(void)</div><div class='ctx'> #if defined(CONFIG_USE_OF)</div><div class='ctx'> 	/* Deal with the device tree */</div><div class='ctx'> 	fdt = plat_get_fdt();</div><div class='del'>-	early_init_dt_scan(fdt);</div><div class='add'>+	early_init_dt_scan(fdt, __pa(fdt));</div><div class='ctx'> 	if (boot_command_line[0]) {</div><div class='ctx'> 		/* Boot command line was passed in device tree */</div><div class='ctx'> 		strscpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);</div><div class='hunk'>@@ -439,10 +439,10 @@ static void show_kernel_relocation(const char *level)</div><div class='ctx'> {</div><div class='ctx'> 	if (__kaslr_offset &gt; 0) {</div><div class='ctx'> 		printk(level);</div><div class='del'>-		pr_cont("Kernel relocated by 0x%pK\n", (void *)__kaslr_offset);</div><div class='del'>-		pr_cont(" .text @ 0x%pK\n", _text);</div><div class='del'>-		pr_cont(" .data @ 0x%pK\n", _sdata);</div><div class='del'>-		pr_cont(" .bss  @ 0x%pK\n", __bss_start);</div><div class='add'>+		pr_cont("Kernel relocated by 0x%p\n", (void *)__kaslr_offset);</div><div class='add'>+		pr_cont(" .text @ 0x%p\n", _text);</div><div class='add'>+		pr_cont(" .data @ 0x%p\n", _sdata);</div><div class='add'>+		pr_cont(" .bss  @ 0x%p\n", __bss_start);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S<br/>index 2c604717e630..4947a4f39e37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/scall32-o32.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/scall32-o32.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/scall32-o32.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/scall32-o32.S</a></div><div class='hunk'>@@ -64,10 +64,10 @@ load_a6: user_lw(t7, 24(t0))		# argument #7 from usp</div><div class='ctx'> load_a7: user_lw(t8, 28(t0))		# argument #8 from usp</div><div class='ctx'> loads_done:</div><div class='ctx'> </div><div class='del'>-	sw	t5, 16(sp)		# argument #5 to ksp</div><div class='del'>-	sw	t6, 20(sp)		# argument #6 to ksp</div><div class='del'>-	sw	t7, 24(sp)		# argument #7 to ksp</div><div class='del'>-	sw	t8, 28(sp)		# argument #8 to ksp</div><div class='add'>+	sw	t5, PT_ARG4(sp)		# argument #5 to ksp</div><div class='add'>+	sw	t6, PT_ARG5(sp)		# argument #6 to ksp</div><div class='add'>+	sw	t7, PT_ARG6(sp)		# argument #7 to ksp</div><div class='add'>+	sw	t8, PT_ARG7(sp)		# argument #8 to ksp</div><div class='ctx'> 	.set	pop</div><div class='ctx'> </div><div class='ctx'> 	.section __ex_table,"a"</div><div class='head'>diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c<br/>index 12a1a4ffb602..11b9b6b63e19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/setup.c</a></div><div class='hunk'>@@ -458,7 +458,7 @@ static void __init mips_parse_crashkernel(void)</div><div class='ctx'> 	total_mem = memblock_phys_mem_size();</div><div class='ctx'> 	ret = parse_crashkernel(boot_command_line, total_mem,</div><div class='ctx'> 				&amp;crash_size, &amp;crash_base,</div><div class='del'>-				NULL, NULL);</div><div class='add'>+				NULL, NULL, NULL);</div><div class='ctx'> 	if (ret != 0 || crash_size &lt;= 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -704,10 +704,7 @@ static void __init resource_init(void)</div><div class='ctx'> 	for_each_mem_range(i, &amp;start, &amp;end) {</div><div class='ctx'> 		struct resource *res;</div><div class='ctx'> </div><div class='del'>-		res = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);</div><div class='del'>-		if (!res)</div><div class='del'>-			panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-			      sizeof(struct resource));</div><div class='add'>+		res = memblock_alloc_or_panic(sizeof(struct resource), SMP_CACHE_BYTES);</div><div class='ctx'> </div><div class='ctx'> 		res-&gt;start = start;</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c<br/>index 395622c37325..22d4f9ff3ae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/smp-cps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/smp-cps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/smp-cps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/smp-cps.c</a></div><div class='hunk'>@@ -36,11 +36,55 @@ enum label_id {</div><div class='ctx'> </div><div class='ctx'> UASM_L_LA(_not_nmi)</div><div class='ctx'> </div><div class='del'>-static DECLARE_BITMAP(core_power, NR_CPUS);</div><div class='del'>-static uint32_t core_entry_reg;</div><div class='add'>+static u64 core_entry_reg;</div><div class='ctx'> static phys_addr_t cps_vec_pa;</div><div class='ctx'> </div><div class='del'>-struct core_boot_config *mips_cps_core_bootcfg;</div><div class='add'>+struct cluster_boot_config *mips_cps_cluster_bootcfg;</div><div class='add'>+</div><div class='add'>+static void power_up_other_cluster(unsigned int cluster)</div><div class='add'>+{</div><div class='add'>+	u32 stat, seq_state;</div><div class='add'>+	unsigned int timeout;</div><div class='add'>+</div><div class='add'>+	mips_cm_lock_other(cluster, CM_GCR_Cx_OTHER_CORE_CM, 0,</div><div class='add'>+			   CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='add'>+	stat = read_cpc_co_stat_conf();</div><div class='add'>+	mips_cm_unlock_other();</div><div class='add'>+</div><div class='add'>+	seq_state = stat &amp; CPC_Cx_STAT_CONF_SEQSTATE;</div><div class='add'>+	seq_state &gt;&gt;= __ffs(CPC_Cx_STAT_CONF_SEQSTATE);</div><div class='add'>+	if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U5)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Set endianness &amp; power up the CM */</div><div class='add'>+	mips_cm_lock_other(cluster, 0, 0, CM_GCR_Cx_OTHER_BLOCK_GLOBAL);</div><div class='add'>+	write_cpc_redir_sys_config(IS_ENABLED(CONFIG_CPU_BIG_ENDIAN));</div><div class='add'>+	write_cpc_redir_pwrup_ctl(1);</div><div class='add'>+	mips_cm_unlock_other();</div><div class='add'>+</div><div class='add'>+	/* Wait for the CM to start up */</div><div class='add'>+	timeout = 1000;</div><div class='add'>+	mips_cm_lock_other(cluster, CM_GCR_Cx_OTHER_CORE_CM, 0,</div><div class='add'>+			   CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='add'>+	while (1) {</div><div class='add'>+		stat = read_cpc_co_stat_conf();</div><div class='add'>+		seq_state = stat &amp; CPC_Cx_STAT_CONF_SEQSTATE;</div><div class='add'>+		seq_state &gt;&gt;= __ffs(CPC_Cx_STAT_CONF_SEQSTATE);</div><div class='add'>+		if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U5)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (timeout) {</div><div class='add'>+			mdelay(1);</div><div class='add'>+			timeout--;</div><div class='add'>+		} else {</div><div class='add'>+			pr_warn("Waiting for cluster %u CM to power up... STAT_CONF=0x%x\n",</div><div class='add'>+				cluster, stat);</div><div class='add'>+			mdelay(1000);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mips_cm_unlock_other();</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static unsigned __init core_vpe_count(unsigned int cluster, unsigned core)</div><div class='ctx'> {</div><div class='hunk'>@@ -94,6 +138,20 @@ static void __init *mips_cps_build_core_entry(void *addr)</div><div class='ctx'> 	return p;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool __init check_64bit_reset(void)</div><div class='add'>+{</div><div class='add'>+	bool cx_64bit_reset = false;</div><div class='add'>+</div><div class='add'>+	mips_cm_lock_other(0, 0, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='add'>+	write_gcr_co_reset64_base(CM_GCR_Cx_RESET64_BASE_BEVEXCBASE);</div><div class='add'>+	if ((read_gcr_co_reset64_base() &amp; CM_GCR_Cx_RESET64_BASE_BEVEXCBASE) ==</div><div class='add'>+	    CM_GCR_Cx_RESET64_BASE_BEVEXCBASE)</div><div class='add'>+		cx_64bit_reset = true;</div><div class='add'>+	mips_cm_unlock_other();</div><div class='add'>+</div><div class='add'>+	return cx_64bit_reset;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init allocate_cps_vecs(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Try to allocate in KSEG1 first */</div><div class='hunk'>@@ -105,11 +163,23 @@ static int __init allocate_cps_vecs(void)</div><div class='ctx'> 					CM_GCR_Cx_RESET_BASE_BEVEXCBASE;</div><div class='ctx'> </div><div class='ctx'> 	if (!cps_vec_pa &amp;&amp; mips_cm_is64) {</div><div class='del'>-		cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN,</div><div class='del'>-							0x0, SZ_4G - 1);</div><div class='del'>-		if (cps_vec_pa)</div><div class='del'>-			core_entry_reg = (cps_vec_pa &amp; CM_GCR_Cx_RESET_BASE_BEVEXCBASE) |</div><div class='add'>+		phys_addr_t end;</div><div class='add'>+</div><div class='add'>+		if (check_64bit_reset()) {</div><div class='add'>+			pr_info("VP Local Reset Exception Base support 47 bits address\n");</div><div class='add'>+			end = MEMBLOCK_ALLOC_ANYWHERE;</div><div class='add'>+		} else {</div><div class='add'>+			end = SZ_4G - 1;</div><div class='add'>+		}</div><div class='add'>+		cps_vec_pa = memblock_phys_alloc_range(BEV_VEC_SIZE, BEV_VEC_ALIGN, 0, end);</div><div class='add'>+		if (cps_vec_pa) {</div><div class='add'>+			if (check_64bit_reset())</div><div class='add'>+				core_entry_reg = (cps_vec_pa &amp; CM_GCR_Cx_RESET64_BASE_BEVEXCBASE) |</div><div class='add'>+					CM_GCR_Cx_RESET_BASE_MODE;</div><div class='add'>+			else</div><div class='add'>+				core_entry_reg = (cps_vec_pa &amp; CM_GCR_Cx_RESET_BASE_BEVEXCBASE) |</div><div class='ctx'> 					CM_GCR_Cx_RESET_BASE_MODE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cps_vec_pa)</div><div class='hunk'>@@ -152,6 +222,9 @@ static void __init cps_smp_setup(void)</div><div class='ctx'> 			pr_cont(",");</div><div class='ctx'> 		pr_cont("{");</div><div class='ctx'> </div><div class='add'>+		if (mips_cm_revision() &gt;= CM_REV_CM3_5)</div><div class='add'>+			power_up_other_cluster(cl);</div><div class='add'>+</div><div class='ctx'> 		ncores = mips_cps_numcores(cl);</div><div class='ctx'> 		for (c = 0; c &lt; ncores; c++) {</div><div class='ctx'> 			core_vpes = core_vpe_count(cl, c);</div><div class='hunk'>@@ -163,6 +236,7 @@ static void __init cps_smp_setup(void)</div><div class='ctx'> 			/* Use the number of VPEs in cluster 0 core 0 for smp_num_siblings */</div><div class='ctx'> 			if (!cl &amp;&amp; !c)</div><div class='ctx'> 				smp_num_siblings = core_vpes;</div><div class='add'>+			cpumask_set_cpu(nvpes, &amp;__cpu_primary_thread_mask);</div><div class='ctx'> </div><div class='ctx'> 			for (v = 0; v &lt; min_t(int, core_vpes, NR_CPUS - nvpes); v++) {</div><div class='ctx'> 				cpu_set_cluster(&amp;cpu_data[nvpes + v], cl);</div><div class='hunk'>@@ -179,8 +253,8 @@ static void __init cps_smp_setup(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Indicate present CPUs (CPU being synonymous with VPE) */</div><div class='ctx'> 	for (v = 0; v &lt; min_t(unsigned, nvpes, NR_CPUS); v++) {</div><div class='del'>-		set_cpu_possible(v, cpu_cluster(&amp;cpu_data[v]) == 0);</div><div class='del'>-		set_cpu_present(v, cpu_cluster(&amp;cpu_data[v]) == 0);</div><div class='add'>+		set_cpu_possible(v, true);</div><div class='add'>+		set_cpu_present(v, true);</div><div class='ctx'> 		__cpu_number_map[v] = v;</div><div class='ctx'> 		__cpu_logical_map[v] = v;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -188,9 +262,6 @@ static void __init cps_smp_setup(void)</div><div class='ctx'> 	/* Set a coherent default CCA (CWB) */</div><div class='ctx'> 	change_c0_config(CONF_CM_CMASK, 0x5);</div><div class='ctx'> </div><div class='del'>-	/* Core 0 is powered up (we're running on it) */</div><div class='del'>-	bitmap_set(core_power, 0, 1);</div><div class='del'>-</div><div class='ctx'> 	/* Initialise core 0 */</div><div class='ctx'> 	mips_cps_core_init();</div><div class='ctx'> </div><div class='hunk'>@@ -210,10 +281,23 @@ static void __init cps_smp_setup(void)</div><div class='ctx'> #endif /* CONFIG_MIPS_MT_FPAFF */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned long calibrate_delay_is_known(void)</div><div class='add'>+{</div><div class='add'>+	int first_cpu_cluster = 0;</div><div class='add'>+</div><div class='add'>+	/* The calibration has to be done on the primary CPU of the cluster */</div><div class='add'>+	if (mips_cps_first_online_in_cluster(&amp;first_cpu_cluster))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return cpu_data[first_cpu_cluster].udelay_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init cps_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> {</div><div class='del'>-	unsigned ncores, core_vpes, c, cca;</div><div class='add'>+	unsigned int nclusters, ncores, core_vpes, nvpe = 0, c, cl, cca;</div><div class='ctx'> 	bool cca_unsuitable, cores_limited;</div><div class='add'>+	struct cluster_boot_config *cluster_bootcfg;</div><div class='add'>+	struct core_boot_config *core_bootcfg;</div><div class='ctx'> </div><div class='ctx'> 	mips_mt_set_cpuoptions();</div><div class='ctx'> </div><div class='hunk'>@@ -255,40 +339,70 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> </div><div class='ctx'> 	setup_cps_vecs();</div><div class='ctx'> </div><div class='del'>-	/* Allocate core boot configuration structs */</div><div class='del'>-	ncores = mips_cps_numcores(0);</div><div class='del'>-	mips_cps_core_bootcfg = kcalloc(ncores, sizeof(*mips_cps_core_bootcfg),</div><div class='del'>-					GFP_KERNEL);</div><div class='del'>-	if (!mips_cps_core_bootcfg) {</div><div class='del'>-		pr_err("Failed to allocate boot config for %u cores\n", ncores);</div><div class='add'>+	/* Allocate cluster boot configuration structs */</div><div class='add'>+	nclusters = mips_cps_numclusters();</div><div class='add'>+	mips_cps_cluster_bootcfg = kcalloc(nclusters,</div><div class='add'>+					   sizeof(*mips_cps_cluster_bootcfg),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!mips_cps_cluster_bootcfg)</div><div class='ctx'> 		goto err_out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* Allocate VPE boot configuration structs */</div><div class='del'>-	for (c = 0; c &lt; ncores; c++) {</div><div class='del'>-		core_vpes = core_vpe_count(0, c);</div><div class='del'>-		mips_cps_core_bootcfg[c].vpe_config = kcalloc(core_vpes,</div><div class='del'>-				sizeof(*mips_cps_core_bootcfg[c].vpe_config),</div><div class='add'>+	if (nclusters &gt; 1)</div><div class='add'>+		mips_cm_update_property();</div><div class='add'>+</div><div class='add'>+	for (cl = 0; cl &lt; nclusters; cl++) {</div><div class='add'>+		/* Allocate core boot configuration structs */</div><div class='add'>+		ncores = mips_cps_numcores(cl);</div><div class='add'>+		core_bootcfg = kcalloc(ncores, sizeof(*core_bootcfg),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+		if (!core_bootcfg)</div><div class='add'>+			goto err_out;</div><div class='add'>+		mips_cps_cluster_bootcfg[cl].core_config = core_bootcfg;</div><div class='add'>+</div><div class='add'>+		mips_cps_cluster_bootcfg[cl].core_power =</div><div class='add'>+			kcalloc(BITS_TO_LONGS(ncores), sizeof(unsigned long),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='del'>-		if (!mips_cps_core_bootcfg[c].vpe_config) {</div><div class='del'>-			pr_err("Failed to allocate %u VPE boot configs\n",</div><div class='del'>-			       core_vpes);</div><div class='add'>+		if (!mips_cps_cluster_bootcfg[cl].core_power)</div><div class='ctx'> 			goto err_out;</div><div class='add'>+</div><div class='add'>+		/* Allocate VPE boot configuration structs */</div><div class='add'>+		for (c = 0; c &lt; ncores; c++) {</div><div class='add'>+			int v;</div><div class='add'>+			core_vpes = core_vpe_count(cl, c);</div><div class='add'>+			core_bootcfg[c].vpe_config = kcalloc(core_vpes,</div><div class='add'>+					sizeof(*core_bootcfg[c].vpe_config),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+			for (v = 0; v &lt; core_vpes; v++)</div><div class='add'>+				cpumask_set_cpu(nvpe++, &amp;mips_cps_cluster_bootcfg[cl].cpumask);</div><div class='add'>+			if (!core_bootcfg[c].vpe_config)</div><div class='add'>+				goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Mark this CPU as booted */</div><div class='del'>-	atomic_set(&amp;mips_cps_core_bootcfg[cpu_core(&amp;current_cpu_data)].vpe_mask,</div><div class='del'>-		   1 &lt;&lt; cpu_vpe_id(&amp;current_cpu_data));</div><div class='add'>+	/* Mark this CPU as powered up &amp; booted */</div><div class='add'>+	cl = cpu_cluster(&amp;current_cpu_data);</div><div class='add'>+	c = cpu_core(&amp;current_cpu_data);</div><div class='add'>+	cluster_bootcfg = &amp;mips_cps_cluster_bootcfg[cl];</div><div class='add'>+	cpu_smt_set_num_threads(core_vpes, core_vpes);</div><div class='add'>+	core_bootcfg = &amp;cluster_bootcfg-&gt;core_config[c];</div><div class='add'>+	bitmap_set(cluster_bootcfg-&gt;core_power, cpu_core(&amp;current_cpu_data), 1);</div><div class='add'>+	atomic_set(&amp;core_bootcfg-&gt;vpe_mask, 1 &lt;&lt; cpu_vpe_id(&amp;current_cpu_data));</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> err_out:</div><div class='ctx'> 	/* Clean up allocations */</div><div class='del'>-	if (mips_cps_core_bootcfg) {</div><div class='del'>-		for (c = 0; c &lt; ncores; c++)</div><div class='del'>-			kfree(mips_cps_core_bootcfg[c].vpe_config);</div><div class='del'>-		kfree(mips_cps_core_bootcfg);</div><div class='del'>-		mips_cps_core_bootcfg = NULL;</div><div class='add'>+	if (mips_cps_cluster_bootcfg) {</div><div class='add'>+		for (cl = 0; cl &lt; nclusters; cl++) {</div><div class='add'>+			cluster_bootcfg = &amp;mips_cps_cluster_bootcfg[cl];</div><div class='add'>+			ncores = mips_cps_numcores(cl);</div><div class='add'>+			for (c = 0; c &lt; ncores; c++) {</div><div class='add'>+				core_bootcfg = &amp;cluster_bootcfg-&gt;core_config[c];</div><div class='add'>+				kfree(core_bootcfg-&gt;vpe_config);</div><div class='add'>+			}</div><div class='add'>+			kfree(mips_cps_cluster_bootcfg[c].core_config);</div><div class='add'>+		}</div><div class='add'>+		kfree(mips_cps_cluster_bootcfg);</div><div class='add'>+		mips_cps_cluster_bootcfg = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Effectively disable SMP by declaring CPUs not present */</div><div class='hunk'>@@ -299,16 +413,124 @@ err_out:</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void boot_core(unsigned int core, unsigned int vpe_id)</div><div class='add'>+static void init_cluster_l2(void)</div><div class='ctx'> {</div><div class='del'>-	u32 stat, seq_state;</div><div class='del'>-	unsigned timeout;</div><div class='add'>+	u32 l2_cfg, l2sm_cop, result;</div><div class='add'>+</div><div class='add'>+	while (!mips_cm_is_l2_hci_broken) {</div><div class='add'>+		l2_cfg = read_gcr_redir_l2_ram_config();</div><div class='add'>+</div><div class='add'>+		/* If HCI is not supported, use the state machine below */</div><div class='add'>+		if (!(l2_cfg &amp; CM_GCR_L2_RAM_CONFIG_PRESENT))</div><div class='add'>+			break;</div><div class='add'>+		if (!(l2_cfg &amp; CM_GCR_L2_RAM_CONFIG_HCI_SUPPORTED))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* If the HCI_DONE bit is set, we're finished */</div><div class='add'>+		if (l2_cfg &amp; CM_GCR_L2_RAM_CONFIG_HCI_DONE)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	l2sm_cop = read_gcr_redir_l2sm_cop();</div><div class='add'>+	if (WARN(!(l2sm_cop &amp; CM_GCR_L2SM_COP_PRESENT),</div><div class='add'>+		 "L2 init not supported on this system yet"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Clear L2 tag registers */</div><div class='add'>+	write_gcr_redir_l2_tag_state(0);</div><div class='add'>+	write_gcr_redir_l2_ecc(0);</div><div class='add'>+</div><div class='add'>+	/* Ensure the L2 tag writes complete before the state machine starts */</div><div class='add'>+	mb();</div><div class='add'>+</div><div class='add'>+	/* Wait for the L2 state machine to be idle */</div><div class='add'>+	do {</div><div class='add'>+		l2sm_cop = read_gcr_redir_l2sm_cop();</div><div class='add'>+	} while (l2sm_cop &amp; CM_GCR_L2SM_COP_RUNNING);</div><div class='add'>+</div><div class='add'>+	/* Start a store tag operation */</div><div class='add'>+	l2sm_cop = CM_GCR_L2SM_COP_TYPE_IDX_STORETAG;</div><div class='add'>+	l2sm_cop &lt;&lt;= __ffs(CM_GCR_L2SM_COP_TYPE);</div><div class='add'>+	l2sm_cop |= CM_GCR_L2SM_COP_CMD_START;</div><div class='add'>+	write_gcr_redir_l2sm_cop(l2sm_cop);</div><div class='add'>+</div><div class='add'>+	/* Ensure the state machine starts before we poll for completion */</div><div class='add'>+	mb();</div><div class='add'>+</div><div class='add'>+	/* Wait for the operation to be complete */</div><div class='add'>+	do {</div><div class='add'>+		l2sm_cop = read_gcr_redir_l2sm_cop();</div><div class='add'>+		result = l2sm_cop &amp; CM_GCR_L2SM_COP_RESULT;</div><div class='add'>+		result &gt;&gt;= __ffs(CM_GCR_L2SM_COP_RESULT);</div><div class='add'>+	} while (!result);</div><div class='add'>+</div><div class='add'>+	WARN(result != CM_GCR_L2SM_COP_RESULT_DONE_OK,</div><div class='add'>+	     "L2 state machine failed cache init with error %u\n", result);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void boot_core(unsigned int cluster, unsigned int core,</div><div class='add'>+		      unsigned int vpe_id)</div><div class='add'>+{</div><div class='add'>+	struct cluster_boot_config *cluster_cfg;</div><div class='add'>+	u32 access, stat, seq_state;</div><div class='add'>+	unsigned int timeout, ncores;</div><div class='add'>+</div><div class='add'>+	cluster_cfg = &amp;mips_cps_cluster_bootcfg[cluster];</div><div class='add'>+	ncores = mips_cps_numcores(cluster);</div><div class='add'>+</div><div class='add'>+	if ((cluster != cpu_cluster(&amp;current_cpu_data)) &amp;&amp;</div><div class='add'>+	    bitmap_empty(cluster_cfg-&gt;core_power, ncores)) {</div><div class='add'>+		power_up_other_cluster(cluster);</div><div class='add'>+</div><div class='add'>+		mips_cm_lock_other(cluster, core, 0,</div><div class='add'>+				   CM_GCR_Cx_OTHER_BLOCK_GLOBAL);</div><div class='add'>+</div><div class='add'>+		/* Ensure cluster GCRs are where we expect */</div><div class='add'>+		write_gcr_redir_base(read_gcr_base());</div><div class='add'>+		write_gcr_redir_cpc_base(read_gcr_cpc_base());</div><div class='add'>+		write_gcr_redir_gic_base(read_gcr_gic_base());</div><div class='add'>+</div><div class='add'>+		init_cluster_l2();</div><div class='add'>+</div><div class='add'>+		/* Mirror L2 configuration */</div><div class='add'>+		write_gcr_redir_l2_only_sync_base(read_gcr_l2_only_sync_base());</div><div class='add'>+		write_gcr_redir_l2_pft_control(read_gcr_l2_pft_control());</div><div class='add'>+		write_gcr_redir_l2_pft_control_b(read_gcr_l2_pft_control_b());</div><div class='add'>+</div><div class='add'>+		/* Mirror ECC/parity setup */</div><div class='add'>+		write_gcr_redir_err_control(read_gcr_err_control());</div><div class='add'>+</div><div class='add'>+		/* Set BEV base */</div><div class='add'>+		write_gcr_redir_bev_base(core_entry_reg);</div><div class='add'>+</div><div class='add'>+		mips_cm_unlock_other();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cluster != cpu_cluster(&amp;current_cpu_data)) {</div><div class='add'>+		mips_cm_lock_other(cluster, core, 0,</div><div class='add'>+				   CM_GCR_Cx_OTHER_BLOCK_GLOBAL);</div><div class='add'>+</div><div class='add'>+		/* Ensure the core can access the GCRs */</div><div class='add'>+		access = read_gcr_redir_access();</div><div class='add'>+		access |= BIT(core);</div><div class='add'>+		write_gcr_redir_access(access);</div><div class='add'>+</div><div class='add'>+		mips_cm_unlock_other();</div><div class='add'>+	} else {</div><div class='add'>+		/* Ensure the core can access the GCRs */</div><div class='add'>+		access = read_gcr_access();</div><div class='add'>+		access |= BIT(core);</div><div class='add'>+		write_gcr_access(access);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Select the appropriate core */</div><div class='del'>-	mips_cm_lock_other(0, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='add'>+	mips_cm_lock_other(cluster, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='ctx'> </div><div class='ctx'> 	/* Set its reset vector */</div><div class='del'>-	write_gcr_co_reset_base(core_entry_reg);</div><div class='add'>+	if (mips_cm_is64)</div><div class='add'>+		write_gcr_co_reset64_base(core_entry_reg);</div><div class='add'>+	else</div><div class='add'>+		write_gcr_co_reset_base(core_entry_reg);</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure its coherency is disabled */</div><div class='ctx'> 	write_gcr_co_coherence(0);</div><div class='hunk'>@@ -371,30 +593,42 @@ static void boot_core(unsigned int core, unsigned int vpe_id)</div><div class='ctx'> 	mips_cm_unlock_other();</div><div class='ctx'> </div><div class='ctx'> 	/* The core is now powered up */</div><div class='del'>-	bitmap_set(core_power, core, 1);</div><div class='add'>+	bitmap_set(cluster_cfg-&gt;core_power, core, 1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Restore CM_PWRUP=0 so that the CM can power down if all the cores in</div><div class='add'>+	 * the cluster do (eg. if they're all removed via hotplug.</div><div class='add'>+	 */</div><div class='add'>+	if (mips_cm_revision() &gt;= CM_REV_CM3_5) {</div><div class='add'>+		mips_cm_lock_other(cluster, 0, 0, CM_GCR_Cx_OTHER_BLOCK_GLOBAL);</div><div class='add'>+		write_cpc_redir_pwrup_ctl(0);</div><div class='add'>+		mips_cm_unlock_other();</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void remote_vpe_boot(void *dummy)</div><div class='ctx'> {</div><div class='add'>+	unsigned int cluster = cpu_cluster(&amp;current_cpu_data);</div><div class='ctx'> 	unsigned core = cpu_core(&amp;current_cpu_data);</div><div class='del'>-	struct core_boot_config *core_cfg = &amp;mips_cps_core_bootcfg[core];</div><div class='add'>+	struct cluster_boot_config *cluster_cfg =</div><div class='add'>+		&amp;mips_cps_cluster_bootcfg[cluster];</div><div class='add'>+	struct core_boot_config *core_cfg = &amp;cluster_cfg-&gt;core_config[core];</div><div class='ctx'> </div><div class='ctx'> 	mips_cps_boot_vpes(core_cfg, cpu_vpe_id(&amp;current_cpu_data));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cps_boot_secondary(int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='add'>+	unsigned int cluster = cpu_cluster(&amp;cpu_data[cpu]);</div><div class='ctx'> 	unsigned core = cpu_core(&amp;cpu_data[cpu]);</div><div class='ctx'> 	unsigned vpe_id = cpu_vpe_id(&amp;cpu_data[cpu]);</div><div class='del'>-	struct core_boot_config *core_cfg = &amp;mips_cps_core_bootcfg[core];</div><div class='add'>+	struct cluster_boot_config *cluster_cfg =</div><div class='add'>+		&amp;mips_cps_cluster_bootcfg[cluster];</div><div class='add'>+	struct core_boot_config *core_cfg = &amp;cluster_cfg-&gt;core_config[core];</div><div class='ctx'> 	struct vpe_boot_config *vpe_cfg = &amp;core_cfg-&gt;vpe_config[vpe_id];</div><div class='ctx'> 	unsigned int remote;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* We don't yet support booting CPUs in other clusters */</div><div class='del'>-	if (cpu_cluster(&amp;cpu_data[cpu]) != cpu_cluster(&amp;raw_current_cpu_data))</div><div class='del'>-		return -ENOSYS;</div><div class='del'>-</div><div class='ctx'> 	vpe_cfg-&gt;pc = (unsigned long)&amp;smp_bootstrap;</div><div class='ctx'> 	vpe_cfg-&gt;sp = __KSTK_TOS(idle);</div><div class='ctx'> 	vpe_cfg-&gt;gp = (unsigned long)task_thread_info(idle);</div><div class='hunk'>@@ -403,15 +637,19 @@ static int cps_boot_secondary(int cpu, struct task_struct *idle)</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(core, core_power)) {</div><div class='add'>+	if (!test_bit(core, cluster_cfg-&gt;core_power)) {</div><div class='ctx'> 		/* Boot a VPE on a powered down core */</div><div class='del'>-		boot_core(core, vpe_id);</div><div class='add'>+		boot_core(cluster, core, vpe_id);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_vp) {</div><div class='del'>-		mips_cm_lock_other(0, core, vpe_id, CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='del'>-		write_gcr_co_reset_base(core_entry_reg);</div><div class='add'>+		mips_cm_lock_other(cluster, core, vpe_id,</div><div class='add'>+				   CM_GCR_Cx_OTHER_BLOCK_LOCAL);</div><div class='add'>+		if (mips_cm_is64)</div><div class='add'>+			write_gcr_co_reset64_base(core_entry_reg);</div><div class='add'>+		else</div><div class='add'>+			write_gcr_co_reset_base(core_entry_reg);</div><div class='ctx'> 		mips_cm_unlock_other();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -544,12 +782,14 @@ static void cps_kexec_nonboot_cpu(void)</div><div class='ctx'> static int cps_cpu_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned cpu = smp_processor_id();</div><div class='add'>+	struct cluster_boot_config *cluster_cfg;</div><div class='ctx'> 	struct core_boot_config *core_cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (!cps_pm_support_state(CPS_PM_POWER_GATED))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	core_cfg = &amp;mips_cps_core_bootcfg[cpu_core(&amp;current_cpu_data)];</div><div class='add'>+	cluster_cfg = &amp;mips_cps_cluster_bootcfg[cpu_cluster(&amp;current_cpu_data)];</div><div class='add'>+	core_cfg = &amp;cluster_cfg-&gt;core_config[cpu_core(&amp;current_cpu_data)];</div><div class='ctx'> 	atomic_sub(1 &lt;&lt; cpu_vpe_id(&amp;current_cpu_data), &amp;core_cfg-&gt;vpe_mask);</div><div class='ctx'> 	smp_mb__after_atomic();</div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='hunk'>@@ -615,11 +855,15 @@ static void cps_cpu_die(unsigned int cpu) { }</div><div class='ctx'> </div><div class='ctx'> static void cps_cleanup_dead_cpu(unsigned cpu)</div><div class='ctx'> {</div><div class='add'>+	unsigned int cluster = cpu_cluster(&amp;cpu_data[cpu]);</div><div class='ctx'> 	unsigned core = cpu_core(&amp;cpu_data[cpu]);</div><div class='ctx'> 	unsigned int vpe_id = cpu_vpe_id(&amp;cpu_data[cpu]);</div><div class='ctx'> 	ktime_t fail_time;</div><div class='ctx'> 	unsigned stat;</div><div class='ctx'> 	int err;</div><div class='add'>+	struct cluster_boot_config *cluster_cfg;</div><div class='add'>+</div><div class='add'>+	cluster_cfg = &amp;mips_cps_cluster_bootcfg[cluster];</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now wait for the CPU to actually offline. Without doing this that</div><div class='hunk'>@@ -671,7 +915,7 @@ static void cps_cleanup_dead_cpu(unsigned cpu)</div><div class='ctx'> 		} while (1);</div><div class='ctx'> </div><div class='ctx'> 		/* Indicate the core is powered off */</div><div class='del'>-		bitmap_clear(core_power, core, 1);</div><div class='add'>+		bitmap_clear(cluster_cfg-&gt;core_power, core, 1);</div><div class='ctx'> 	} else if (cpu_has_mipsmt) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Have a CPU with access to the offlined CPUs registers wait</div><div class='head'>diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c<br/>index 39e193cad2b9..4868e79f3b30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/smp.c</a></div><div class='hunk'>@@ -56,8 +56,10 @@ EXPORT_SYMBOL(cpu_sibling_map);</div><div class='ctx'> cpumask_t cpu_core_map[NR_CPUS] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(cpu_core_map);</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_HOTPLUG_PARALLEL</div><div class='ctx'> static DECLARE_COMPLETION(cpu_starting);</div><div class='ctx'> static DECLARE_COMPLETION(cpu_running);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * A logical cpu mask containing only one VPE per core to</div><div class='hunk'>@@ -74,6 +76,8 @@ static cpumask_t cpu_core_setup_map;</div><div class='ctx'> </div><div class='ctx'> cpumask_t cpu_coherent_mask;</div><div class='ctx'> </div><div class='add'>+struct cpumask __cpu_primary_thread_mask __read_mostly;</div><div class='add'>+</div><div class='ctx'> unsigned int smp_max_threads __initdata = UINT_MAX;</div><div class='ctx'> </div><div class='ctx'> static int __init early_nosmt(char *s)</div><div class='hunk'>@@ -367,6 +371,9 @@ asmlinkage void start_secondary(void)</div><div class='ctx'> 	 * to an option instead of something based on .cputype</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HOTPLUG_PARALLEL</div><div class='add'>+	cpuhp_ap_sync_alive();</div><div class='add'>+#endif</div><div class='ctx'> 	calibrate_delay();</div><div class='ctx'> 	cpu_data[cpu].udelay_val = loops_per_jiffy;</div><div class='ctx'> </div><div class='hunk'>@@ -376,8 +383,10 @@ asmlinkage void start_secondary(void)</div><div class='ctx'> 	cpumask_set_cpu(cpu, &amp;cpu_coherent_mask);</div><div class='ctx'> 	notify_cpu_starting(cpu);</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_HOTPLUG_PARALLEL</div><div class='ctx'> 	/* Notify boot CPU that we're starting &amp; ready to sync counters */</div><div class='ctx'> 	complete(&amp;cpu_starting);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	synchronise_count_slave(cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -386,11 +395,13 @@ asmlinkage void start_secondary(void)</div><div class='ctx'> </div><div class='ctx'> 	calculate_cpu_foreign_map();</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_HOTPLUG_PARALLEL</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Notify boot CPU that we're up &amp; online and it can safely return</div><div class='ctx'> 	 * from __cpu_up</div><div class='ctx'> 	 */</div><div class='ctx'> 	complete(&amp;cpu_running);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * irq will be enabled in -&gt;smp_finish(), enabling it too early</div><div class='hunk'>@@ -447,6 +458,12 @@ void __init smp_prepare_boot_cpu(void)</div><div class='ctx'> 	set_cpu_online(0, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HOTPLUG_PARALLEL</div><div class='add'>+int arch_cpuhp_kick_ap_alive(unsigned int cpu, struct task_struct *tidle)</div><div class='add'>+{</div><div class='add'>+	return mp_ops-&gt;boot_secondary(cpu, tidle);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='ctx'> int __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -466,6 +483,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> 	wait_for_completion(&amp;cpu_running);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PROFILING</div><div class='ctx'> /* Not really SMP stuff ... */</div><div class='head'>diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c<br/>index 71c7e5e27567..dd31e3fffd24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/spram.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/spram.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/spram.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/spram.c</a></div><div class='hunk'>@@ -26,10 +26,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ERRCTL_SPRAM		(1 &lt;&lt; 28)</div><div class='ctx'> </div><div class='del'>-/* errctl access */</div><div class='del'>-#define read_c0_errctl(x) read_c0_ecc(x)</div><div class='del'>-#define write_c0_errctl(x) write_c0_ecc(x)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Different semantics to the set_c0_* function built by __BUILD_SET_C0</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/mips/kernel/syscalls/syscall_n32.tbl b/arch/mips/kernel/syscalls/syscall_n32.tbl<br/>index 953f5b7dc723..d824ffe9a014 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_n32.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_n32.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_n32.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/syscalls/syscall_n32.tbl</a></div><div class='hunk'>@@ -401,3 +401,10 @@</div><div class='ctx'> 460	n32	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	n32	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	n32	mseal				sys_mseal</div><div class='add'>+463	n32	setxattrat			sys_setxattrat</div><div class='add'>+464	n32	getxattrat			sys_getxattrat</div><div class='add'>+465	n32	listxattrat			sys_listxattrat</div><div class='add'>+466	n32	removexattrat			sys_removexattrat</div><div class='add'>+467	n32	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	n32	file_getattr			sys_file_getattr</div><div class='add'>+469	n32	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/mips/kernel/syscalls/syscall_n64.tbl b/arch/mips/kernel/syscalls/syscall_n64.tbl<br/>index 1464c6be6eb3..7a7049c2c307 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_n64.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_n64.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_n64.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/syscalls/syscall_n64.tbl</a></div><div class='hunk'>@@ -377,3 +377,10 @@</div><div class='ctx'> 460	n64	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	n64	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	n64	mseal				sys_mseal</div><div class='add'>+463	n64	setxattrat			sys_setxattrat</div><div class='add'>+464	n64	getxattrat			sys_getxattrat</div><div class='add'>+465	n64	listxattrat			sys_listxattrat</div><div class='add'>+466	n64	removexattrat			sys_removexattrat</div><div class='add'>+467	n64	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	n64	file_getattr			sys_file_getattr</div><div class='add'>+469	n64	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/mips/kernel/syscalls/syscall_o32.tbl b/arch/mips/kernel/syscalls/syscall_o32.tbl<br/>index 2439a2491cff..d330274f0601 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_o32.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/syscalls/syscall_o32.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/syscalls/syscall_o32.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/syscalls/syscall_o32.tbl</a></div><div class='hunk'>@@ -450,3 +450,10 @@</div><div class='ctx'> 460	o32	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	o32	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	o32	mseal				sys_mseal</div><div class='add'>+463	o32	setxattrat			sys_setxattrat</div><div class='add'>+464	o32	getxattrat			sys_getxattrat</div><div class='add'>+465	o32	listxattrat			sys_listxattrat</div><div class='add'>+466	o32	removexattrat			sys_removexattrat</div><div class='add'>+467	o32	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	o32	file_getattr			sys_file_getattr</div><div class='add'>+469	o32	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c<br/>index dc29bd9656b0..8ec1e185b35c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/traps.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/kdb.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='hunk'>@@ -76,7 +77,7 @@</div><div class='ctx'> #include "access-helper.h"</div><div class='ctx'> </div><div class='ctx'> extern void check_wait(void);</div><div class='del'>-extern asmlinkage void rollback_handle_int(void);</div><div class='add'>+extern asmlinkage void skipover_handle_int(void);</div><div class='ctx'> extern asmlinkage void handle_int(void);</div><div class='ctx'> extern asmlinkage void handle_adel(void);</div><div class='ctx'> extern asmlinkage void handle_ades(void);</div><div class='hunk'>@@ -1705,10 +1706,10 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> 		l2parity &amp;= l1parity;</div><div class='ctx'> </div><div class='ctx'> 		/* Probe L1 ECC support */</div><div class='del'>-		cp0_ectl = read_c0_ecc();</div><div class='del'>-		write_c0_ecc(cp0_ectl | ERRCTL_PE);</div><div class='add'>+		cp0_ectl = read_c0_errctl();</div><div class='add'>+		write_c0_errctl(cp0_ectl | ERRCTL_PE);</div><div class='ctx'> 		back_to_back_c0_hazard();</div><div class='del'>-		cp0_ectl = read_c0_ecc();</div><div class='add'>+		cp0_ectl = read_c0_errctl();</div><div class='ctx'> </div><div class='ctx'> 		/* Probe L2 ECC support */</div><div class='ctx'> 		gcr_ectl = read_gcr_err_control();</div><div class='hunk'>@@ -1727,9 +1728,9 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> 			cp0_ectl |= ERRCTL_PE;</div><div class='ctx'> 		else</div><div class='ctx'> 			cp0_ectl &amp;= ~ERRCTL_PE;</div><div class='del'>-		write_c0_ecc(cp0_ectl);</div><div class='add'>+		write_c0_errctl(cp0_ectl);</div><div class='ctx'> 		back_to_back_c0_hazard();</div><div class='del'>-		WARN_ON(!!(read_c0_ecc() &amp; ERRCTL_PE) != l1parity);</div><div class='add'>+		WARN_ON(!!(read_c0_errctl() &amp; ERRCTL_PE) != l1parity);</div><div class='ctx'> </div><div class='ctx'> 		/* Configure L2 ECC checking */</div><div class='ctx'> 		if (l2parity)</div><div class='hunk'>@@ -1741,8 +1742,8 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> 		gcr_ectl &amp;= CM_GCR_ERR_CONTROL_L2_ECC_EN;</div><div class='ctx'> 		WARN_ON(!!gcr_ectl != l2parity);</div><div class='ctx'> </div><div class='del'>-		pr_info("Cache parity protection %sabled\n",</div><div class='del'>-			l1parity ? "en" : "dis");</div><div class='add'>+		pr_info("Cache parity protection %s\n",</div><div class='add'>+			str_enabled_disabled(l1parity));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1761,18 +1762,18 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> 			unsigned long errctl;</div><div class='ctx'> 			unsigned int l1parity_present, l2parity_present;</div><div class='ctx'> </div><div class='del'>-			errctl = read_c0_ecc();</div><div class='add'>+			errctl = read_c0_errctl();</div><div class='ctx'> 			errctl &amp;= ~(ERRCTL_PE|ERRCTL_L2P);</div><div class='ctx'> </div><div class='ctx'> 			/* probe L1 parity support */</div><div class='del'>-			write_c0_ecc(errctl | ERRCTL_PE);</div><div class='add'>+			write_c0_errctl(errctl | ERRCTL_PE);</div><div class='ctx'> 			back_to_back_c0_hazard();</div><div class='del'>-			l1parity_present = (read_c0_ecc() &amp; ERRCTL_PE);</div><div class='add'>+			l1parity_present = (read_c0_errctl() &amp; ERRCTL_PE);</div><div class='ctx'> </div><div class='ctx'> 			/* probe L2 parity support */</div><div class='del'>-			write_c0_ecc(errctl|ERRCTL_L2P);</div><div class='add'>+			write_c0_errctl(errctl|ERRCTL_L2P);</div><div class='ctx'> 			back_to_back_c0_hazard();</div><div class='del'>-			l2parity_present = (read_c0_ecc() &amp; ERRCTL_L2P);</div><div class='add'>+			l2parity_present = (read_c0_errctl() &amp; ERRCTL_L2P);</div><div class='ctx'> </div><div class='ctx'> 			if (l1parity_present &amp;&amp; l2parity_present) {</div><div class='ctx'> 				if (l1parity)</div><div class='hunk'>@@ -1791,20 +1792,20 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> </div><div class='ctx'> 			printk(KERN_INFO "Writing ErrCtl register=%08lx\n", errctl);</div><div class='ctx'> </div><div class='del'>-			write_c0_ecc(errctl);</div><div class='add'>+			write_c0_errctl(errctl);</div><div class='ctx'> 			back_to_back_c0_hazard();</div><div class='del'>-			errctl = read_c0_ecc();</div><div class='add'>+			errctl = read_c0_errctl();</div><div class='ctx'> 			printk(KERN_INFO "Readback ErrCtl register=%08lx\n", errctl);</div><div class='ctx'> </div><div class='ctx'> 			if (l1parity_present)</div><div class='del'>-				printk(KERN_INFO "Cache parity protection %sabled\n",</div><div class='del'>-				       (errctl &amp; ERRCTL_PE) ? "en" : "dis");</div><div class='add'>+				pr_info("Cache parity protection %s\n",</div><div class='add'>+					str_enabled_disabled(errctl &amp; ERRCTL_PE));</div><div class='ctx'> </div><div class='ctx'> 			if (l2parity_present) {</div><div class='ctx'> 				if (l1parity_present &amp;&amp; l1parity)</div><div class='ctx'> 					errctl ^= ERRCTL_L2P;</div><div class='del'>-				printk(KERN_INFO "L2 cache parity protection %sabled\n",</div><div class='del'>-				       (errctl &amp; ERRCTL_L2P) ? "en" : "dis");</div><div class='add'>+				pr_info("L2 cache parity protection %s\n",</div><div class='add'>+					str_enabled_disabled(errctl &amp; ERRCTL_L2P));</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1812,11 +1813,11 @@ static inline __init void parity_protection_init(void)</div><div class='ctx'> 	case CPU_5KC:</div><div class='ctx'> 	case CPU_5KE:</div><div class='ctx'> 	case CPU_LOONGSON32:</div><div class='del'>-		write_c0_ecc(0x80000000);</div><div class='add'>+		write_c0_errctl(0x80000000);</div><div class='ctx'> 		back_to_back_c0_hazard();</div><div class='ctx'> 		/* Set the PE bit (bit 31) in the c0_errctl register. */</div><div class='del'>-		printk(KERN_INFO "Cache parity protection %sabled\n",</div><div class='del'>-		       (read_c0_ecc() &amp; 0x80000000) ? "en" : "dis");</div><div class='add'>+		pr_info("Cache parity protection %s\n",</div><div class='add'>+			str_enabled_disabled(read_c0_errctl() &amp; 0x80000000));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPU_20KC:</div><div class='ctx'> 	case CPU_25KF:</div><div class='hunk'>@@ -1887,8 +1888,8 @@ asmlinkage void do_ftlb(void)</div><div class='ctx'> 	if ((cpu_has_mips_r2_r6) &amp;&amp;</div><div class='ctx'> 	    (((current_cpu_data.processor_id &amp; 0xff0000) == PRID_COMP_MIPS) ||</div><div class='ctx'> 	    ((current_cpu_data.processor_id &amp; 0xff0000) == PRID_COMP_LOONGSON))) {</div><div class='del'>-		pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",</div><div class='del'>-		       read_c0_ecc());</div><div class='add'>+		pr_err("FTLB error exception, cp0_errctl=0x%08x:\n",</div><div class='add'>+		       read_c0_errctl());</div><div class='ctx'> 		pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());</div><div class='ctx'> 		reg_val = read_c0_cacheerr();</div><div class='ctx'> 		pr_err("c0_cacheerr == %08x\n", reg_val);</div><div class='hunk'>@@ -2065,7 +2066,7 @@ void *set_vi_handler(int n, vi_handler_t addr)</div><div class='ctx'> {</div><div class='ctx'> 	extern const u8 except_vec_vi[];</div><div class='ctx'> 	extern const u8 except_vec_vi_ori[], except_vec_vi_end[];</div><div class='del'>-	extern const u8 rollback_except_vec_vi[];</div><div class='add'>+	extern const u8 skipover_except_vec_vi[];</div><div class='ctx'> 	unsigned long handler;</div><div class='ctx'> 	unsigned long old_handler = vi_handlers[n];</div><div class='ctx'> 	int srssets = current_cpu_data.srsets;</div><div class='hunk'>@@ -2094,7 +2095,7 @@ void *set_vi_handler(int n, vi_handler_t addr)</div><div class='ctx'> 			change_c0_srsmap(0xf &lt;&lt; n*4, 0 &lt;&lt; n*4);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vec_start = using_rollback_handler() ? rollback_except_vec_vi :</div><div class='add'>+	vec_start = using_skipover_handler() ? skipover_except_vec_vi :</div><div class='ctx'> 					       except_vec_vi;</div><div class='ctx'> #if defined(CONFIG_CPU_MICROMIPS) || defined(CONFIG_CPU_BIG_ENDIAN)</div><div class='ctx'> 	ori_offset = except_vec_vi_ori - vec_start + 2;</div><div class='hunk'>@@ -2425,8 +2426,8 @@ void __init trap_init(void)</div><div class='ctx'> 	if (board_be_init)</div><div class='ctx'> 		board_be_init();</div><div class='ctx'> </div><div class='del'>-	set_except_vector(EXCCODE_INT, using_rollback_handler() ?</div><div class='del'>-					rollback_handle_int : handle_int);</div><div class='add'>+	set_except_vector(EXCCODE_INT, using_skipover_handler() ?</div><div class='add'>+					skipover_handle_int : handle_int);</div><div class='ctx'> 	set_except_vector(EXCCODE_MOD, handle_tlbm);</div><div class='ctx'> 	set_except_vector(EXCCODE_TLBL, handle_tlbl);</div><div class='ctx'> 	set_except_vector(EXCCODE_TLBS, handle_tlbs);</div><div class='head'>diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c<br/>index dda36fa26307..de096777172f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/vdso.c</a></div><div class='hunk'>@@ -11,10 +11,11 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='add'>+#include &lt;linux/vdso_datastore.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/abi.h&gt;</div><div class='ctx'> #include &lt;asm/mips-cps.h&gt;</div><div class='hunk'>@@ -23,20 +24,7 @@</div><div class='ctx'> #include &lt;vdso/helpers.h&gt;</div><div class='ctx'> #include &lt;vdso/vsyscall.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Kernel-provided data used by the VDSO. */</div><div class='del'>-static union vdso_data_store mips_vdso_data __page_aligned_data;</div><div class='del'>-struct vdso_data *vdso_data = mips_vdso_data.data;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mapping for the VDSO data/GIC pages. The real pages are mapped manually, as</div><div class='del'>- * what we map and where within the area they are mapped is determined at</div><div class='del'>- * runtime.</div><div class='del'>- */</div><div class='del'>-static struct page *no_pages[] = { NULL };</div><div class='del'>-static struct vm_special_mapping vdso_vvar_mapping = {</div><div class='del'>-	.name = "[vvar]",</div><div class='del'>-	.pages = no_pages,</div><div class='del'>-};</div><div class='add'>+static_assert(VDSO_NR_PAGES == __VDSO_PAGES);</div><div class='ctx'> </div><div class='ctx'> static void __init init_vdso_image(struct mips_vdso_image *image)</div><div class='ctx'> {</div><div class='hunk'>@@ -90,7 +78,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> {</div><div class='ctx'> 	struct mips_vdso_image *image = current-&gt;thread.abi-&gt;vdso;</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='del'>-	unsigned long gic_size, vvar_size, size, base, data_addr, vdso_addr, gic_pfn, gic_base;</div><div class='add'>+	unsigned long gic_size, size, base, data_addr, vdso_addr, gic_pfn, gic_base;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -98,11 +86,12 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {</div><div class='add'>+		unsigned long unused;</div><div class='add'>+</div><div class='ctx'> 		/* Map delay slot emulation page */</div><div class='del'>-		base = mmap_region(NULL, STACK_TOP, PAGE_SIZE,</div><div class='del'>-				VM_READ | VM_EXEC |</div><div class='del'>-				VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,</div><div class='del'>-				0, NULL);</div><div class='add'>+		base = do_mmap(NULL, STACK_TOP, PAGE_SIZE, PROT_READ | PROT_EXEC,</div><div class='add'>+			       MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED, 0, 0, &amp;unused,</div><div class='add'>+			       NULL);</div><div class='ctx'> 		if (IS_ERR_VALUE(base)) {</div><div class='ctx'> 			ret = base;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -118,8 +107,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 	 * the counter registers at the start.</div><div class='ctx'> 	 */</div><div class='ctx'> 	gic_size = mips_gic_present() ? PAGE_SIZE : 0;</div><div class='del'>-	vvar_size = gic_size + PAGE_SIZE;</div><div class='del'>-	size = vvar_size + image-&gt;size;</div><div class='add'>+	size = gic_size + VDSO_NR_PAGES * PAGE_SIZE + image-&gt;size;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Find a region that's large enough for us to perform the</div><div class='hunk'>@@ -142,15 +130,13 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_has_dc_aliases) {</div><div class='ctx'> 		base = __ALIGN_MASK(base, shm_align_mask);</div><div class='del'>-		base += ((unsigned long)vdso_data - gic_size) &amp; shm_align_mask;</div><div class='add'>+		base += ((unsigned long)vdso_k_time_data - gic_size) &amp; shm_align_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	data_addr = base + gic_size;</div><div class='del'>-	vdso_addr = data_addr + PAGE_SIZE;</div><div class='add'>+	vdso_addr = data_addr + VDSO_NR_PAGES * PAGE_SIZE;</div><div class='ctx'> </div><div class='del'>-	vma = _install_special_mapping(mm, base, vvar_size,</div><div class='del'>-				       VM_READ | VM_MAYREAD,</div><div class='del'>-				       &amp;vdso_vvar_mapping);</div><div class='add'>+	vma = vdso_install_vvar_mapping(mm, data_addr);</div><div class='ctx'> 	if (IS_ERR(vma)) {</div><div class='ctx'> 		ret = PTR_ERR(vma);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -160,6 +146,17 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 	if (gic_size) {</div><div class='ctx'> 		gic_base = (unsigned long)mips_gic_base + MIPS_GIC_USER_OFS;</div><div class='ctx'> 		gic_pfn = PFN_DOWN(__pa(gic_base));</div><div class='add'>+		static const struct vm_special_mapping gic_mapping = {</div><div class='add'>+			.name	= "[gic]",</div><div class='add'>+			.pages	= (struct page **) { NULL },</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vma = _install_special_mapping(mm, base, gic_size, VM_READ | VM_MAYREAD,</div><div class='add'>+					       &amp;gic_mapping);</div><div class='add'>+		if (IS_ERR(vma)) {</div><div class='add'>+			ret = PTR_ERR(vma);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		ret = io_remap_pfn_range(vma, base, gic_pfn, gic_size,</div><div class='ctx'> 					 pgprot_noncached(vma-&gt;vm_page_prot));</div><div class='hunk'>@@ -167,13 +164,6 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Map data page. */</div><div class='del'>-	ret = remap_pfn_range(vma, data_addr,</div><div class='del'>-			      virt_to_phys(vdso_data) &gt;&gt; PAGE_SHIFT,</div><div class='del'>-			      PAGE_SIZE, vma-&gt;vm_page_prot);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	/* Map VDSO image. */</div><div class='ctx'> 	vma = _install_special_mapping(mm, vdso_addr, image-&gt;size,</div><div class='ctx'> 				       VM_READ | VM_EXEC |</div><div class='head'>diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S<br/>index 9ff55cb80a64..2b708fac8d2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vmlinux.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vmlinux.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -61,6 +61,7 @@ SECTIONS</div><div class='ctx'> 	/* read-only */</div><div class='ctx'> 	_text = .;	/* Text and read-only data */</div><div class='ctx'> 	.text : {</div><div class='add'>+		HEAD_TEXT</div><div class='ctx'> 		TEXT_TEXT</div><div class='ctx'> 		SCHED_TEXT</div><div class='ctx'> 		LOCK_TEXT</div><div class='head'>diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c<br/>index 737d0d4fdcd3..2b67c44adab9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vpe.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kernel/vpe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kernel/vpe.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kernel/vpe.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/syscalls.h&gt;</div><div class='ctx'> #include &lt;linux/moduleloader.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -582,7 +583,7 @@ static int vpe_elfload(struct vpe *v)</div><div class='ctx'> 	struct module mod; /* so we can re-use the relocations code */</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;mod, 0, sizeof(struct module));</div><div class='del'>-	strcpy(mod.name, "VPE loader");</div><div class='add'>+	strscpy(mod.name, "VPE loader");</div><div class='ctx'> </div><div class='ctx'> 	hdr = (Elf_Ehdr *) v-&gt;pbuffer;</div><div class='ctx'> 	len = v-&gt;plen;</div><div class='head'>diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c<br/>index 60b43ea85c12..a75587018f44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kvm/mips.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kvm/mips.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kvm/mips.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kvm/mips.c</a></div><div class='hunk'>@@ -288,9 +288,8 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;vcpu-&gt;arch.comparecount_timer, CLOCK_MONOTONIC,</div><div class='del'>-		     HRTIMER_MODE_REL);</div><div class='del'>-	vcpu-&gt;arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;</div><div class='add'>+	hrtimer_setup(&amp;vcpu-&gt;arch.comparecount_timer, kvm_mips_comparecount_wakeup, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate space for host mode exception handlers that handle</div><div class='hunk'>@@ -316,7 +315,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * we allocate is out of range, just give up now.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!cpu_has_ebase_wg &amp;&amp; virt_to_phys(gebase) &gt;= 0x20000000) {</div><div class='del'>-		kvm_err("CP0_EBase.WG required for guest exception base %pK\n",</div><div class='add'>+		kvm_err("CP0_EBase.WG required for guest exception base %p\n",</div><div class='ctx'> 			gebase);</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto out_free_gebase;</div><div class='head'>diff --git a/arch/mips/kvm/mmu.c b/arch/mips/kvm/mmu.c<br/>index c17157e700c0..d2c3b6b41f18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/kvm/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/kvm/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/kvm/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/kvm/mmu.c</a></div><div class='hunk'>@@ -484,8 +484,6 @@ static int _kvm_mips_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa,</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='ctx'> 	gfn_t gfn = gpa &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	pte_t *ptep;</div><div class='del'>-	kvm_pfn_t pfn = 0;	/* silence bogus GCC warning */</div><div class='del'>-	bool pfn_valid = false;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='hunk'>@@ -498,12 +496,9 @@ static int _kvm_mips_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Track access to pages marked old */</div><div class='del'>-	if (!pte_young(*ptep)) {</div><div class='add'>+	if (!pte_young(*ptep))</div><div class='ctx'> 		set_pte(ptep, pte_mkyoung(*ptep));</div><div class='del'>-		pfn = pte_pfn(*ptep);</div><div class='del'>-		pfn_valid = true;</div><div class='del'>-		/* call kvm_set_pfn_accessed() after unlock */</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	if (write_fault &amp;&amp; !pte_dirty(*ptep)) {</div><div class='ctx'> 		if (!pte_write(*ptep)) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='hunk'>@@ -512,9 +507,7 @@ static int _kvm_mips_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa,</div><div class='ctx'> </div><div class='ctx'> 		/* Track dirtying of writeable pages */</div><div class='ctx'> 		set_pte(ptep, pte_mkdirty(*ptep));</div><div class='del'>-		pfn = pte_pfn(*ptep);</div><div class='ctx'> 		mark_page_dirty(kvm, gfn);</div><div class='del'>-		kvm_set_pfn_dirty(pfn);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (out_entry)</div><div class='hunk'>@@ -524,8 +517,6 @@ static int _kvm_mips_map_page_fast(struct kvm_vcpu *vcpu, unsigned long gpa,</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	if (pfn_valid)</div><div class='del'>-		kvm_set_pfn_accessed(pfn);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -566,6 +557,7 @@ static int kvm_mips_map_page(struct kvm_vcpu *vcpu, unsigned long gpa,</div><div class='ctx'> 	bool writeable;</div><div class='ctx'> 	unsigned long prot_bits;</div><div class='ctx'> 	unsigned long mmu_seq;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	/* Try the fast path to handle old / clean pages */</div><div class='ctx'> 	srcu_idx = srcu_read_lock(&amp;kvm-&gt;srcu);</div><div class='hunk'>@@ -587,7 +579,7 @@ retry:</div><div class='ctx'> 	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure the read of mmu_invalidate_seq isn't reordered with PTE reads</div><div class='del'>-	 * in gfn_to_pfn_prot() (which calls get_user_pages()), so that we don't</div><div class='add'>+	 * in kvm_faultin_pfn() (which calls get_user_pages()), so that we don't</div><div class='ctx'> 	 * risk the page we get a reference to getting unmapped before we have a</div><div class='ctx'> 	 * chance to grab the mmu_lock without mmu_invalidate_retry() noticing.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -599,7 +591,7 @@ retry:</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> </div><div class='ctx'> 	/* Slow path - ask KVM core whether we can access this GPA */</div><div class='del'>-	pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &amp;writeable);</div><div class='add'>+	pfn = kvm_faultin_pfn(vcpu, gfn, write_fault, &amp;writeable, &amp;page);</div><div class='ctx'> 	if (is_error_noslot_pfn(pfn)) {</div><div class='ctx'> 		err = -EFAULT;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -611,10 +603,10 @@ retry:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This can happen when mappings are changed asynchronously, but</div><div class='ctx'> 		 * also synchronously if a COW is triggered by</div><div class='del'>-		 * gfn_to_pfn_prot().</div><div class='add'>+		 * kvm_faultin_pfn().</div><div class='ctx'> 		 */</div><div class='ctx'> 		spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-		kvm_release_pfn_clean(pfn);</div><div class='add'>+		kvm_release_page_unused(page);</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -628,7 +620,6 @@ retry:</div><div class='ctx'> 		if (write_fault) {</div><div class='ctx'> 			prot_bits |= __WRITEABLE;</div><div class='ctx'> 			mark_page_dirty(kvm, gfn);</div><div class='del'>-			kvm_set_pfn_dirty(pfn);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	entry = pfn_pte(pfn, __pgprot(prot_bits));</div><div class='hunk'>@@ -642,9 +633,8 @@ retry:</div><div class='ctx'> 	if (out_buddy)</div><div class='ctx'> 		*out_buddy = *ptep_buddy(ptep);</div><div class='ctx'> </div><div class='add'>+	kvm_release_faultin_page(kvm, page, false, writeable);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='del'>-	kvm_set_pfn_accessed(pfn);</div><div class='ctx'> out:</div><div class='ctx'> 	srcu_read_unlock(&amp;kvm-&gt;srcu, srcu_idx);</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/arch/mips/lantiq/falcon/prom.c b/arch/mips/lantiq/falcon/prom.c<br/>index 7b98def106e4..2a38c4267685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/falcon/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/falcon/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/falcon/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/falcon/prom.c</a></div><div class='hunk'>@@ -36,14 +36,14 @@</div><div class='ctx'> #define BOOT_NVEC	(BOOT_REG_BASE | 0x04)</div><div class='ctx'> #define BOOT_EVEC	(BOOT_REG_BASE | 0x08)</div><div class='ctx'> </div><div class='del'>-void __init ltq_soc_nmi_setup(void)</div><div class='add'>+static void __init ltq_soc_nmi_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	extern void (*nmi_handler)(void);</div><div class='ctx'> </div><div class='ctx'> 	ltq_w32((unsigned long)&amp;nmi_handler, (void *)BOOT_NVEC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init ltq_soc_ejtag_setup(void)</div><div class='add'>+static void __init ltq_soc_ejtag_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	extern void (*ejtag_debug_handler)(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c<br/>index 1187729d8cbb..577e6e6309a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/falcon/sysctrl.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/falcon/sysctrl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/falcon/sysctrl.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/falcon/sysctrl.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../clk.h"</div><div class='add'>+#include "../prom.h"</div><div class='ctx'> </div><div class='ctx'> /* infrastructure control register */</div><div class='ctx'> #define SYS1_INFRAC		0x00bc</div><div class='hunk'>@@ -72,11 +73,6 @@</div><div class='ctx'> static void __iomem *sysctl_membase[3], *status_membase;</div><div class='ctx'> void __iomem *ltq_sys1_membase, *ltq_ebu_membase;</div><div class='ctx'> </div><div class='del'>-void falcon_trigger_hrst(int level)</div><div class='del'>-{</div><div class='del'>-	sysctl_w32(SYSCTL_SYS1, level &amp; 1, SYS1_HRSTOUTC);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void sysctl_wait(struct clk *clk,</div><div class='ctx'> 		unsigned int test, unsigned int reg)</div><div class='ctx'> {</div><div class='hunk'>@@ -214,19 +210,16 @@ void __init ltq_soc_init(void)</div><div class='ctx'> 	of_node_put(np_syseth);</div><div class='ctx'> 	of_node_put(np_sysgpe);</div><div class='ctx'> </div><div class='del'>-	if ((request_mem_region(res_status.start, resource_size(&amp;res_status),</div><div class='del'>-				res_status.name) &lt; 0) ||</div><div class='del'>-		(request_mem_region(res_ebu.start, resource_size(&amp;res_ebu),</div><div class='del'>-				res_ebu.name) &lt; 0) ||</div><div class='del'>-		(request_mem_region(res_sys[0].start,</div><div class='del'>-				resource_size(&amp;res_sys[0]),</div><div class='del'>-				res_sys[0].name) &lt; 0) ||</div><div class='del'>-		(request_mem_region(res_sys[1].start,</div><div class='del'>-				resource_size(&amp;res_sys[1]),</div><div class='del'>-				res_sys[1].name) &lt; 0) ||</div><div class='del'>-		(request_mem_region(res_sys[2].start,</div><div class='del'>-				resource_size(&amp;res_sys[2]),</div><div class='del'>-				res_sys[2].name) &lt; 0))</div><div class='add'>+	if ((!request_mem_region(res_status.start, resource_size(&amp;res_status),</div><div class='add'>+				 res_status.name)) ||</div><div class='add'>+	    (!request_mem_region(res_ebu.start, resource_size(&amp;res_ebu),</div><div class='add'>+				 res_ebu.name)) ||</div><div class='add'>+	    (!request_mem_region(res_sys[0].start, resource_size(&amp;res_sys[0]),</div><div class='add'>+				 res_sys[0].name)) ||</div><div class='add'>+	    (!request_mem_region(res_sys[1].start, resource_size(&amp;res_sys[1]),</div><div class='add'>+				 res_sys[1].name)) ||</div><div class='add'>+	    (!request_mem_region(res_sys[2].start, resource_size(&amp;res_sys[2]),</div><div class='add'>+				 res_sys[2].name)))</div><div class='ctx'> 		pr_err("Failed to request core resources");</div><div class='ctx'> </div><div class='ctx'> 	status_membase = ioremap(res_status.start,</div><div class='head'>diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c<br/>index 8f208007b8e8..961c55933a6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/irq.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/irq_cpu.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> #include &lt;irq.h&gt;</div><div class='hunk'>@@ -335,7 +336,8 @@ static const struct irq_domain_ops irq_domain_ops = {</div><div class='ctx'> 	.map = icu_map,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init icu_of_init(struct device_node *node, struct device_node *parent)</div><div class='add'>+static int __init</div><div class='add'>+icu_of_init(struct device_node *node, struct device_node *parent)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *eiu_node;</div><div class='ctx'> 	struct resource res;</div><div class='hunk'>@@ -377,7 +379,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)</div><div class='ctx'> 	for (i = 0; i &lt; MAX_IM; i++)</div><div class='ctx'> 		irq_set_chained_handler(i + 2, ltq_hw_irq_handler);</div><div class='ctx'> </div><div class='del'>-	ltq_domain = irq_domain_add_linear(node,</div><div class='add'>+	ltq_domain = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='ctx'> 		(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,</div><div class='ctx'> 		&amp;irq_domain_ops, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lantiq/xway/clk.c b/arch/mips/lantiq/xway/clk.c<br/>index 47ad21430fe2..39fb3ecdd6b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/clk.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/clk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/clk.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/xway/clk.c</a></div><div class='hunk'>@@ -74,7 +74,7 @@ unsigned long ltq_danube_pp32_hz(void)</div><div class='ctx'> 	return clk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long ltq_ar9_sys_hz(void)</div><div class='add'>+static unsigned long ltq_ar9_sys_hz(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (((ltq_cgu_r32(CGU_SYS) &gt;&gt; 3) &amp; 0x3) == 0x2)</div><div class='ctx'> 		return CLOCK_393M;</div><div class='head'>diff --git a/arch/mips/lantiq/xway/dcdc.c b/arch/mips/lantiq/xway/dcdc.c<br/>index 4a808f8c5beb..b79c462fd48a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/dcdc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/dcdc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/dcdc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/xway/dcdc.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ static struct platform_driver dcdc_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init dcdc_init(void)</div><div class='add'>+static int __init dcdc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = platform_driver_register(&amp;dcdc_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c<br/>index 934ac72937e5..4693eba6c296 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/dma.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/dma.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/xway/dma.c</a></div><div class='hunk'>@@ -289,7 +289,7 @@ static struct platform_driver dma_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init</div><div class='add'>+static int __init</div><div class='ctx'> dma_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_driver_register(&amp;dma_driver);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c<br/>index 8d52001301de..484c9e3000c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/gptu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/gptu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/gptu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/xway/gptu.c</a></div><div class='hunk'>@@ -194,7 +194,7 @@ static struct platform_driver dma_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init gptu_init(void)</div><div class='add'>+static int __init gptu_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = platform_driver_register(&amp;dma_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c<br/>index 5a75283d17f1..d9aa80afdf9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/sysctrl.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lantiq/xway/sysctrl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lantiq/xway/sysctrl.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lantiq/xway/sysctrl.c</a></div><div class='hunk'>@@ -485,7 +485,7 @@ void __init ltq_soc_init(void)</div><div class='ctx'> 	/* add our generic xway clocks */</div><div class='ctx'> 	clkdev_add_pmu("10000000.fpi", NULL, 0, 0, PMU_FPI);</div><div class='ctx'> 	clkdev_add_pmu("1e100a00.gptu", NULL, 1, 0, PMU_GPT);</div><div class='del'>-	clkdev_add_pmu("1e100bb0.stp", NULL, 1, 0, PMU_STP);</div><div class='add'>+	clkdev_add_pmu("1e100bb0.gpio", NULL, 1, 0, PMU_STP);</div><div class='ctx'> 	clkdev_add_pmu("1e100c00.serial", NULL, 0, 0, PMU_ASC1);</div><div class='ctx'> 	clkdev_add_pmu("1e104100.dma", NULL, 1, 0, PMU_DMA);</div><div class='ctx'> 	clkdev_add_pmu("1e100800.spi", NULL, 1, 0, PMU_SPI);</div><div class='hunk'>@@ -497,7 +497,7 @@ void __init ltq_soc_init(void)</div><div class='ctx'> 		ifccr = CGU_IFCCR_VR9;</div><div class='ctx'> 		pcicr = CGU_PCICR_VR9;</div><div class='ctx'> 	} else {</div><div class='del'>-		clkdev_add_pmu("1e180000.etop", NULL, 1, 0, PMU_PPE);</div><div class='add'>+		clkdev_add_pmu("1e180000.ethernet", NULL, 1, 0, PMU_PPE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!of_machine_is_compatible("lantiq,ase"))</div><div class='hunk'>@@ -531,9 +531,9 @@ void __init ltq_soc_init(void)</div><div class='ctx'> 						CLOCK_133M, CLOCK_133M);</div><div class='ctx'> 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);</div><div class='ctx'> 		clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);</div><div class='del'>-		clkdev_add_pmu("1e180000.etop", "ppe", 1, 0, PMU_PPE);</div><div class='del'>-		clkdev_add_cgu("1e180000.etop", "ephycgu", CGU_EPHY);</div><div class='del'>-		clkdev_add_pmu("1e180000.etop", "ephy", 1, 0, PMU_EPHY);</div><div class='add'>+		clkdev_add_pmu("1e180000.ethernet", "ppe", 1, 0, PMU_PPE);</div><div class='add'>+		clkdev_add_cgu("1e180000.ethernet", "ephycgu", CGU_EPHY);</div><div class='add'>+		clkdev_add_pmu("1e180000.ethernet", "ephy", 1, 0, PMU_EPHY);</div><div class='ctx'> 		clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_ASE_SDIO);</div><div class='ctx'> 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);</div><div class='ctx'> 	} else if (of_machine_is_compatible("lantiq,grx390")) {</div><div class='hunk'>@@ -592,7 +592,7 @@ void __init ltq_soc_init(void)</div><div class='ctx'> 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);</div><div class='ctx'> 		clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);</div><div class='ctx'> 		clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM);</div><div class='del'>-		clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH);</div><div class='add'>+		clkdev_add_pmu("1e180000.ethernet", "switch", 1, 0, PMU_SWITCH);</div><div class='ctx'> 		clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);</div><div class='ctx'> 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);</div><div class='ctx'> 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);</div><div class='head'>diff --git a/arch/mips/lib/.gitignore b/arch/mips/lib/.gitignore<br/>new file mode 100644<br/>index 000000000000..647d7a922e68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lib/.gitignore?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lib/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+# This now-removed directory used to contain generated files.</div><div class='add'>+/crypto/</div><div class='head'>diff --git a/arch/mips/lib/iomap-pci.c b/arch/mips/lib/iomap-pci.c<br/>index a9cb28813f0b..1b7ce19fb3bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/lib/iomap-pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/lib/iomap-pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/lib/iomap-pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/lib/iomap-pci.c</a></div><div class='hunk'>@@ -43,4 +43,14 @@ void __iomem *__pci_ioport_map(struct pci_dev *dev,</div><div class='ctx'> 	return (void __iomem *) (ctrl-&gt;io_map_base + port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	struct pci_controller *ctrl = dev-&gt;bus-&gt;sysdata;</div><div class='add'>+	void __iomem *base = (void __iomem *)ctrl-&gt;io_map_base;</div><div class='add'>+</div><div class='add'>+	if (addr &lt; base || addr &gt; (base + resource_size(ctrl-&gt;io_resource)))</div><div class='add'>+		iounmap(addr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(pci_iounmap);</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_PCI_DRIVERS_LEGACY */</div><div class='head'>diff --git a/arch/mips/loongson2ef/common/machtype.c b/arch/mips/loongson2ef/common/machtype.c<br/>index 82f6de49f20f..e635e66d2e6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson2ef/common/machtype.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson2ef/common/machtype.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson2ef/common/machtype.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson2ef/common/machtype.c</a></div><div class='hunk'>@@ -48,8 +48,7 @@ void __init prom_init_machtype(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	p += strlen("machtype=");</div><div class='del'>-	strncpy(str, p, MACHTYPE_LEN);</div><div class='del'>-	str[MACHTYPE_LEN] = '\0';</div><div class='add'>+	strscpy(str, p);</div><div class='ctx'> 	p = strstr(str, " ");</div><div class='ctx'> 	if (p)</div><div class='ctx'> 		*p = '\0';</div><div class='head'>diff --git a/arch/mips/loongson32/Kconfig b/arch/mips/loongson32/Kconfig<br/>index a7c500959577..461d518b0033 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson32/Kconfig</a></div><div class='hunk'>@@ -1,38 +1,9 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-if MACH_LOONGSON32</div><div class='ctx'> </div><div class='del'>-choice</div><div class='del'>-	prompt "Machine Type"</div><div class='del'>-</div><div class='del'>-config LOONGSON1_LS1B</div><div class='del'>-	bool "Loongson LS1B board"</div><div class='del'>-	select CEVT_R4K if !MIPS_EXTERNAL_TIMER</div><div class='del'>-	select CSRC_R4K if !MIPS_EXTERNAL_TIMER</div><div class='del'>-	select SYS_HAS_CPU_LOONGSON1B</div><div class='del'>-	select DMA_NONCOHERENT</div><div class='del'>-	select BOOT_ELF32</div><div class='del'>-	select IRQ_MIPS_CPU</div><div class='del'>-	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='del'>-	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='del'>-	select SYS_SUPPORTS_HIGHMEM</div><div class='del'>-	select SYS_HAS_EARLY_PRINTK</div><div class='del'>-	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='del'>-	select COMMON_CLK</div><div class='del'>-</div><div class='del'>-config LOONGSON1_LS1C</div><div class='del'>-	bool "Loongson LS1C board"</div><div class='del'>-	select CEVT_R4K if !MIPS_EXTERNAL_TIMER</div><div class='del'>-	select CSRC_R4K if !MIPS_EXTERNAL_TIMER</div><div class='del'>-	select SYS_HAS_CPU_LOONGSON1C</div><div class='del'>-	select DMA_NONCOHERENT</div><div class='del'>-	select BOOT_ELF32</div><div class='del'>-	select IRQ_MIPS_CPU</div><div class='del'>-	select SYS_SUPPORTS_32BIT_KERNEL</div><div class='del'>-	select SYS_SUPPORTS_LITTLE_ENDIAN</div><div class='del'>-	select SYS_SUPPORTS_HIGHMEM</div><div class='del'>-	select SYS_HAS_EARLY_PRINTK</div><div class='del'>-	select USE_GENERIC_EARLY_PRINTK_8250</div><div class='del'>-	select COMMON_CLK</div><div class='del'>-endchoice</div><div class='del'>-</div><div class='del'>-endif # MACH_LOONGSON32</div><div class='add'>+config BUILTIN_DTB_NAME</div><div class='add'>+	string "Source file for built-in DTB"</div><div class='add'>+	depends on BUILTIN_DTB</div><div class='add'>+	help</div><div class='add'>+	  Base name (without suffix, relative to arch/mips/boot/dts/loongson)</div><div class='add'>+	  for the DTS file that will be used to produce the DTB linked into</div><div class='add'>+	  the kernel.</div><div class='head'>diff --git a/arch/mips/loongson32/Makefile b/arch/mips/loongson32/Makefile<br/>index ba10954b4b21..a4e40e534e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson32/Makefile</a></div><div class='hunk'>@@ -1,18 +1 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#</div><div class='del'>-# Common code for all Loongson 1 based systems</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_MACH_LOONGSON32) += common/</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# Loongson LS1B board</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_LOONGSON1_LS1B)  += ls1b/</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# Loongson LS1C board</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_LOONGSON1_LS1C)  += ls1c/</div><div class='head'>diff --git a/arch/mips/loongson32/Platform b/arch/mips/loongson32/Platform<br/>index 3b9673e7a2fa..67fd07450488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Platform?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/Platform</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/Platform?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson32/Platform</a></div><div class='hunk'>@@ -1,3 +1,2 @@</div><div class='ctx'> cflags-$(CONFIG_CPU_LOONGSON32)		+= -march=mips32r2 -Wa,--trap</div><div class='del'>-cflags-$(CONFIG_MACH_LOONGSON32)	+= -I$(srctree)/arch/mips/include/asm/mach-loongson32</div><div class='ctx'> load-$(CONFIG_CPU_LOONGSON32)		+= 0xffffffff80200000</div><div class='head'>diff --git a/arch/mips/loongson32/common/Makefile b/arch/mips/loongson32/common/Makefile<br/>deleted file mode 100644<br/>index f3950d308187..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#</div><div class='del'>-# Makefile for common code of loongson1 based machines.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-y	+= time.o irq.o platform.o prom.o setup.o</div><div class='head'>diff --git a/arch/mips/loongson32/common/irq.c b/arch/mips/loongson32/common/irq.c<br/>deleted file mode 100644<br/>index 9a50070f74f7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/irq.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,191 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;asm/irq_cpu.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;loongson1.h&gt;</div><div class='del'>-#include &lt;irq.h&gt;</div><div class='del'>-</div><div class='del'>-#define LS1X_INTC_REG(n, x) \</div><div class='del'>-		((void __iomem *)KSEG1ADDR(LS1X_INTC_BASE + (n * 0x18) + (x)))</div><div class='del'>-</div><div class='del'>-#define LS1X_INTC_INTISR(n)		LS1X_INTC_REG(n, 0x0)</div><div class='del'>-#define LS1X_INTC_INTIEN(n)		LS1X_INTC_REG(n, 0x4)</div><div class='del'>-#define LS1X_INTC_INTSET(n)		LS1X_INTC_REG(n, 0x8)</div><div class='del'>-#define LS1X_INTC_INTCLR(n)		LS1X_INTC_REG(n, 0xc)</div><div class='del'>-#define LS1X_INTC_INTPOL(n)		LS1X_INTC_REG(n, 0x10)</div><div class='del'>-#define LS1X_INTC_INTEDGE(n)		LS1X_INTC_REG(n, 0x14)</div><div class='del'>-</div><div class='del'>-static void ls1x_irq_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit = (d-&gt;irq - LS1X_IRQ_BASE) &amp; 0x1f;</div><div class='del'>-	unsigned int n = (d-&gt;irq - LS1X_IRQ_BASE) &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	__raw_writel(__raw_readl(LS1X_INTC_INTCLR(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTCLR(n));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ls1x_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit = (d-&gt;irq - LS1X_IRQ_BASE) &amp; 0x1f;</div><div class='del'>-	unsigned int n = (d-&gt;irq - LS1X_IRQ_BASE) &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	__raw_writel(__raw_readl(LS1X_INTC_INTIEN(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTIEN(n));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ls1x_irq_mask_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit = (d-&gt;irq - LS1X_IRQ_BASE) &amp; 0x1f;</div><div class='del'>-	unsigned int n = (d-&gt;irq - LS1X_IRQ_BASE) &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	__raw_writel(__raw_readl(LS1X_INTC_INTIEN(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTIEN(n));</div><div class='del'>-	__raw_writel(__raw_readl(LS1X_INTC_INTCLR(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTCLR(n));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ls1x_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit = (d-&gt;irq - LS1X_IRQ_BASE) &amp; 0x1f;</div><div class='del'>-	unsigned int n = (d-&gt;irq - LS1X_IRQ_BASE) &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	__raw_writel(__raw_readl(LS1X_INTC_INTIEN(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTIEN(n));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ls1x_irq_settype(struct irq_data *d, unsigned int type)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit = (d-&gt;irq - LS1X_IRQ_BASE) &amp; 0x1f;</div><div class='del'>-	unsigned int n = (d-&gt;irq - LS1X_IRQ_BASE) &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	switch (type) {</div><div class='del'>-	case IRQ_TYPE_LEVEL_HIGH:</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTPOL(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTPOL(n));</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTEDGE(n));</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_LEVEL_LOW:</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTPOL(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTPOL(n));</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTEDGE(n));</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_RISING:</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTPOL(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTPOL(n));</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTEDGE(n));</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_FALLING:</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTPOL(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTPOL(n));</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTEDGE(n));</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_BOTH:</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTPOL(n))</div><div class='del'>-			&amp; ~(1 &lt;&lt; bit), LS1X_INTC_INTPOL(n));</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n))</div><div class='del'>-			| (1 &lt;&lt; bit), LS1X_INTC_INTEDGE(n));</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_NONE:</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ls1x_irq_chip = {</div><div class='del'>-	.name		= "LS1X-INTC",</div><div class='del'>-	.irq_ack	= ls1x_irq_ack,</div><div class='del'>-	.irq_mask	= ls1x_irq_mask,</div><div class='del'>-	.irq_mask_ack	= ls1x_irq_mask_ack,</div><div class='del'>-	.irq_unmask	= ls1x_irq_unmask,</div><div class='del'>-	.irq_set_type   = ls1x_irq_settype,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ls1x_irq_dispatch(int n)</div><div class='del'>-{</div><div class='del'>-	u32 int_status, irq;</div><div class='del'>-</div><div class='del'>-	/* Get pending sources, masked by current enables */</div><div class='del'>-	int_status = __raw_readl(LS1X_INTC_INTISR(n)) &amp;</div><div class='del'>-			__raw_readl(LS1X_INTC_INTIEN(n));</div><div class='del'>-</div><div class='del'>-	if (int_status) {</div><div class='del'>-		irq = LS1X_IRQ(n, __ffs(int_status));</div><div class='del'>-		do_IRQ(irq);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void plat_irq_dispatch(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int pending;</div><div class='del'>-</div><div class='del'>-	pending = read_c0_cause() &amp; read_c0_status() &amp; ST0_IM;</div><div class='del'>-</div><div class='del'>-	if (pending &amp; CAUSEF_IP7)</div><div class='del'>-		do_IRQ(TIMER_IRQ);</div><div class='del'>-	else if (pending &amp; CAUSEF_IP2)</div><div class='del'>-		ls1x_irq_dispatch(0); /* INT0 */</div><div class='del'>-	else if (pending &amp; CAUSEF_IP3)</div><div class='del'>-		ls1x_irq_dispatch(1); /* INT1 */</div><div class='del'>-	else if (pending &amp; CAUSEF_IP4)</div><div class='del'>-		ls1x_irq_dispatch(2); /* INT2 */</div><div class='del'>-	else if (pending &amp; CAUSEF_IP5)</div><div class='del'>-		ls1x_irq_dispatch(3); /* INT3 */</div><div class='del'>-	else if (pending &amp; CAUSEF_IP6)</div><div class='del'>-		ls1x_irq_dispatch(4); /* INT4 */</div><div class='del'>-	else</div><div class='del'>-		spurious_interrupt();</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ls1x_irq_init(int base)</div><div class='del'>-{</div><div class='del'>-	int n;</div><div class='del'>-</div><div class='del'>-	/* Disable interrupts and clear pending,</div><div class='del'>-	 * setup all IRQs as high level triggered</div><div class='del'>-	 */</div><div class='del'>-	for (n = 0; n &lt; INTN; n++) {</div><div class='del'>-		__raw_writel(0x0, LS1X_INTC_INTIEN(n));</div><div class='del'>-		__raw_writel(0xffffffff, LS1X_INTC_INTCLR(n));</div><div class='del'>-		__raw_writel(0xffffffff, LS1X_INTC_INTPOL(n));</div><div class='del'>-		/* set DMA0, DMA1 and DMA2 to edge trigger */</div><div class='del'>-		__raw_writel(n ? 0x0 : 0xe000, LS1X_INTC_INTEDGE(n));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	for (n = base; n &lt; NR_IRQS; n++) {</div><div class='del'>-		irq_set_chip_and_handler(n, &amp;ls1x_irq_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (request_irq(INT0_IRQ, no_action, IRQF_NO_THREAD, "cascade", NULL))</div><div class='del'>-		pr_err("Failed to request irq %d (cascade)\n", INT0_IRQ);</div><div class='del'>-	if (request_irq(INT1_IRQ, no_action, IRQF_NO_THREAD, "cascade", NULL))</div><div class='del'>-		pr_err("Failed to request irq %d (cascade)\n", INT1_IRQ);</div><div class='del'>-	if (request_irq(INT2_IRQ, no_action, IRQF_NO_THREAD, "cascade", NULL))</div><div class='del'>-		pr_err("Failed to request irq %d (cascade)\n", INT2_IRQ);</div><div class='del'>-	if (request_irq(INT3_IRQ, no_action, IRQF_NO_THREAD, "cascade", NULL))</div><div class='del'>-		pr_err("Failed to request irq %d (cascade)\n", INT3_IRQ);</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-	if (request_irq(INT4_IRQ, no_action, IRQF_NO_THREAD, "cascade", NULL))</div><div class='del'>-		pr_err("Failed to request irq %d (cascade)\n", INT4_IRQ);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init arch_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	mips_cpu_irq_init();</div><div class='del'>-	ls1x_irq_init(LS1X_IRQ_BASE);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c<br/>deleted file mode 100644<br/>index 623eb4bc7b41..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/platform.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/platform.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,285 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011-2016 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/stmmac.h&gt;</div><div class='del'>-#include &lt;linux/usb/ehci_pdriver.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;platform.h&gt;</div><div class='del'>-#include &lt;loongson1.h&gt;</div><div class='del'>-</div><div class='del'>-/* 8250/16550 compatible UART */</div><div class='del'>-#define LS1X_UART(_id)						\</div><div class='del'>-	{							\</div><div class='del'>-		.mapbase	= LS1X_UART ## _id ## _BASE,	\</div><div class='del'>-		.irq		= LS1X_UART ## _id ## _IRQ,	\</div><div class='del'>-		.iotype		= UPIO_MEM,			\</div><div class='del'>-		.flags		= UPF_IOREMAP | UPF_FIXED_TYPE, \</div><div class='del'>-		.type		= PORT_16550A,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static struct plat_serial8250_port ls1x_serial8250_pdata[] = {</div><div class='del'>-	LS1X_UART(0),</div><div class='del'>-	LS1X_UART(1),</div><div class='del'>-	LS1X_UART(2),</div><div class='del'>-	LS1X_UART(3),</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_uart_pdev = {</div><div class='del'>-	.name		= "serial8250",</div><div class='del'>-	.id		= PLAT8250_DEV_PLATFORM,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = ls1x_serial8250_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ls1x_serial_set_uartclk(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk;</div><div class='del'>-	struct plat_serial8250_port *p;</div><div class='del'>-</div><div class='del'>-	clk = clk_get(&amp;pdev-&gt;dev, pdev-&gt;name);</div><div class='del'>-	if (IS_ERR(clk)) {</div><div class='del'>-		pr_err("unable to get %s clock, err=%ld",</div><div class='del'>-		       pdev-&gt;name, PTR_ERR(clk));</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	clk_prepare_enable(clk);</div><div class='del'>-</div><div class='del'>-	for (p = pdev-&gt;dev.platform_data; p-&gt;flags != 0; ++p)</div><div class='del'>-		p-&gt;uartclk = clk_get_rate(clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Synopsys Ethernet GMAC */</div><div class='del'>-static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {</div><div class='del'>-	.phy_mask	= 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {</div><div class='del'>-	.pbl		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)</div><div class='del'>-{</div><div class='del'>-	struct plat_stmmacenet_data *plat_dat = NULL;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = __raw_readl(LS1X_MUX_CTRL1);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-	plat_dat = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	if (plat_dat-&gt;bus_id) {</div><div class='del'>-		__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |</div><div class='del'>-			     GMAC1_USE_UART0, LS1X_MUX_CTRL0);</div><div class='del'>-		switch (plat_dat-&gt;phy_interface) {</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-			val &amp;= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);</div><div class='del'>-			break;</div><div class='del'>-		case PHY_INTERFACE_MODE_MII:</div><div class='del'>-			val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			pr_err("unsupported mii mode %d\n",</div><div class='del'>-			       plat_dat-&gt;phy_interface);</div><div class='del'>-			return -ENOTSUPP;</div><div class='del'>-		}</div><div class='del'>-		val &amp;= ~GMAC1_SHUT;</div><div class='del'>-	} else {</div><div class='del'>-		switch (plat_dat-&gt;phy_interface) {</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-			val &amp;= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);</div><div class='del'>-			break;</div><div class='del'>-		case PHY_INTERFACE_MODE_MII:</div><div class='del'>-			val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			pr_err("unsupported mii mode %d\n",</div><div class='del'>-			       plat_dat-&gt;phy_interface);</div><div class='del'>-			return -ENOTSUPP;</div><div class='del'>-		}</div><div class='del'>-		val &amp;= ~GMAC0_SHUT;</div><div class='del'>-	}</div><div class='del'>-	__raw_writel(val, LS1X_MUX_CTRL1);</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-	plat_dat = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	val &amp;= ~PHY_INTF_SELI;</div><div class='del'>-	if (plat_dat-&gt;phy_interface == PHY_INTERFACE_MODE_RMII)</div><div class='del'>-		val |= 0x4 &lt;&lt; PHY_INTF_SELI_SHIFT;</div><div class='del'>-	__raw_writel(val, LS1X_MUX_CTRL1);</div><div class='del'>-</div><div class='del'>-	val = __raw_readl(LS1X_MUX_CTRL0);</div><div class='del'>-	__raw_writel(val &amp; (~GMAC_SHUT), LS1X_MUX_CTRL0);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct plat_stmmacenet_data ls1x_eth0_pdata = {</div><div class='del'>-	.bus_id			= 0,</div><div class='del'>-	.phy_addr		= -1,</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-	.phy_interface		= PHY_INTERFACE_MODE_MII,</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-	.phy_interface		= PHY_INTERFACE_MODE_RMII,</div><div class='del'>-#endif</div><div class='del'>-	.mdio_bus_data		= &amp;ls1x_mdio_bus_data,</div><div class='del'>-	.dma_cfg		= &amp;ls1x_eth_dma_cfg,</div><div class='del'>-	.has_gmac		= 1,</div><div class='del'>-	.tx_coe			= 1,</div><div class='del'>-	.rx_queues_to_use	= 1,</div><div class='del'>-	.tx_queues_to_use	= 1,</div><div class='del'>-	.init			= ls1x_eth_mux_init,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ls1x_eth0_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= LS1X_GMAC0_BASE,</div><div class='del'>-		.end	= LS1X_GMAC0_BASE + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.name	= "macirq",</div><div class='del'>-		.start	= LS1X_GMAC0_IRQ,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_eth0_pdev = {</div><div class='del'>-	.name		= "stmmaceth",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_eth0_resources),</div><div class='del'>-	.resource	= ls1x_eth0_resources,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ls1x_eth0_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_LOONGSON1_LS1B</div><div class='del'>-static struct plat_stmmacenet_data ls1x_eth1_pdata = {</div><div class='del'>-	.bus_id			= 1,</div><div class='del'>-	.phy_addr		= -1,</div><div class='del'>-	.phy_interface		= PHY_INTERFACE_MODE_MII,</div><div class='del'>-	.mdio_bus_data		= &amp;ls1x_mdio_bus_data,</div><div class='del'>-	.dma_cfg		= &amp;ls1x_eth_dma_cfg,</div><div class='del'>-	.has_gmac		= 1,</div><div class='del'>-	.tx_coe			= 1,</div><div class='del'>-	.rx_queues_to_use	= 1,</div><div class='del'>-	.tx_queues_to_use	= 1,</div><div class='del'>-	.init			= ls1x_eth_mux_init,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ls1x_eth1_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= LS1X_GMAC1_BASE,</div><div class='del'>-		.end	= LS1X_GMAC1_BASE + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.name	= "macirq",</div><div class='del'>-		.start	= LS1X_GMAC1_IRQ,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_eth1_pdev = {</div><div class='del'>-	.name		= "stmmaceth",</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_eth1_resources),</div><div class='del'>-	.resource	= ls1x_eth1_resources,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ls1x_eth1_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-#endif	/* CONFIG_LOONGSON1_LS1B */</div><div class='del'>-</div><div class='del'>-/* GPIO */</div><div class='del'>-static struct resource ls1x_gpio0_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= LS1X_GPIO0_BASE,</div><div class='del'>-		.end	= LS1X_GPIO0_BASE + SZ_4 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_gpio0_pdev = {</div><div class='del'>-	.name		= "ls1x-gpio",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_gpio0_resources),</div><div class='del'>-	.resource	= ls1x_gpio0_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ls1x_gpio1_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= LS1X_GPIO1_BASE,</div><div class='del'>-		.end	= LS1X_GPIO1_BASE + SZ_4 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_gpio1_pdev = {</div><div class='del'>-	.name		= "ls1x-gpio",</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_gpio1_resources),</div><div class='del'>-	.resource	= ls1x_gpio1_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* USB EHCI */</div><div class='del'>-static u64 ls1x_ehci_dmamask = DMA_BIT_MASK(32);</div><div class='del'>-</div><div class='del'>-static struct resource ls1x_ehci_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= LS1X_EHCI_BASE,</div><div class='del'>-		.end	= LS1X_EHCI_BASE + SZ_32K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= LS1X_EHCI_IRQ,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usb_ehci_pdata ls1x_ehci_pdata = {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_ehci_pdev = {</div><div class='del'>-	.name		= "ehci-platform",</div><div class='del'>-	.id		= -1,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_ehci_resources),</div><div class='del'>-	.resource	= ls1x_ehci_resources,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.dma_mask = &amp;ls1x_ehci_dmamask,</div><div class='del'>-		.platform_data = &amp;ls1x_ehci_pdata,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Real Time Clock */</div><div class='del'>-struct platform_device ls1x_rtc_pdev = {</div><div class='del'>-	.name		= "ls1x-rtc",</div><div class='del'>-	.id		= -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Watchdog */</div><div class='del'>-static struct resource ls1x_wdt_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= LS1X_WDT_BASE,</div><div class='del'>-		.end	= LS1X_WDT_BASE + SZ_16 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device ls1x_wdt_pdev = {</div><div class='del'>-	.name		= "ls1x-wdt",</div><div class='del'>-	.id		= -1,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(ls1x_wdt_resources),</div><div class='del'>-	.resource	= ls1x_wdt_resources,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/mips/loongson32/common/prom.c b/arch/mips/loongson32/common/prom.c<br/>deleted file mode 100644<br/>index fc580a22748e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/prom.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * Modified from arch/mips/pnx833x/common/prom.c.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-#include &lt;linux/serial_reg.h&gt;</div><div class='del'>-#include &lt;asm/fw/fw.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;loongson1.h&gt;</div><div class='del'>-</div><div class='del'>-unsigned long memsize;</div><div class='del'>-</div><div class='del'>-void __init prom_init(void)</div><div class='del'>-{</div><div class='del'>-	void __iomem *uart_base;</div><div class='del'>-</div><div class='del'>-	fw_init_cmdline();</div><div class='del'>-</div><div class='del'>-	memsize = fw_getenvl("memsize");</div><div class='del'>-	if(!memsize)</div><div class='del'>-		memsize = DEFAULT_MEMSIZE;</div><div class='del'>-</div><div class='del'>-	if (strstr(arcs_cmdline, "console=ttyS3"))</div><div class='del'>-		uart_base = ioremap(LS1X_UART3_BASE, 0x0f);</div><div class='del'>-	else if (strstr(arcs_cmdline, "console=ttyS2"))</div><div class='del'>-		uart_base = ioremap(LS1X_UART2_BASE, 0x0f);</div><div class='del'>-	else if (strstr(arcs_cmdline, "console=ttyS1"))</div><div class='del'>-		uart_base = ioremap(LS1X_UART1_BASE, 0x0f);</div><div class='del'>-	else</div><div class='del'>-		uart_base = ioremap(LS1X_UART0_BASE, 0x0f);</div><div class='del'>-	setup_8250_early_printk_port((unsigned long)uart_base, 0, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init plat_mem_setup(void)</div><div class='del'>-{</div><div class='del'>-	memblock_add(0x0, (memsize &lt;&lt; 20));</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/loongson32/common/setup.c b/arch/mips/loongson32/common/setup.c<br/>deleted file mode 100644<br/>index 4733fe037176..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/setup.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;asm/cpu-info.h&gt;</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-</div><div class='del'>-const char *get_system_type(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int processor_id = (&amp;current_cpu_data)-&gt;processor_id;</div><div class='del'>-</div><div class='del'>-	switch (processor_id &amp; PRID_REV_MASK) {</div><div class='del'>-	case PRID_REV_LOONGSON1B:</div><div class='del'>-#if defined(CONFIG_LOONGSON1_LS1B)</div><div class='del'>-		return "LOONGSON LS1B";</div><div class='del'>-#elif defined(CONFIG_LOONGSON1_LS1C)</div><div class='del'>-		return "LOONGSON LS1C";</div><div class='del'>-#endif</div><div class='del'>-	default:</div><div class='del'>-		return "LOONGSON (unknown)";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/loongson32/common/time.c b/arch/mips/loongson32/common/time.c<br/>deleted file mode 100644<br/>index 74ad2b17918d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/common/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/common/time.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2014 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/of_clk.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-</div><div class='del'>-void __init plat_time_init(void)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk = NULL;</div><div class='del'>-</div><div class='del'>-	/* initialize LS1X clocks */</div><div class='del'>-	of_clk_init(NULL);</div><div class='del'>-</div><div class='del'>-	/* setup mips r4k timer */</div><div class='del'>-	clk = clk_get(NULL, "cpu_clk");</div><div class='del'>-	if (IS_ERR(clk))</div><div class='del'>-		panic("unable to get cpu clock, err=%ld", PTR_ERR(clk));</div><div class='del'>-</div><div class='del'>-	mips_hpt_frequency = clk_get_rate(clk) / 2;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/loongson32/ls1b/Makefile b/arch/mips/loongson32/ls1b/Makefile<br/>deleted file mode 100644<br/>index 33c574dc0f7f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/ls1b/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1b/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#</div><div class='del'>-# Makefile for loongson1B based machines.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-y += board.o</div><div class='head'>diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c<br/>deleted file mode 100644<br/>index fe115bdcb22c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/ls1b/board.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1b/board.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2011-2016 Zhang, Keguang &lt;keguang.zhang@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;loongson1.h&gt;</div><div class='del'>-#include &lt;platform.h&gt;</div><div class='del'>-</div><div class='del'>-static const struct gpio_led ls1x_gpio_leds[] __initconst = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "LED9",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.gpio			= 38,</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.default_state		= LEDS_GPIO_DEFSTATE_OFF,</div><div class='del'>-	}, {</div><div class='del'>-		.name			= "LED6",</div><div class='del'>-		.default_trigger	= "nand-disk",</div><div class='del'>-		.gpio			= 39,</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.default_state		= LEDS_GPIO_DEFSTATE_OFF,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {</div><div class='del'>-	.num_leds	= ARRAY_SIZE(ls1x_gpio_leds),</div><div class='del'>-	.leds		= ls1x_gpio_leds,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *ls1b_platform_devices[] __initdata = {</div><div class='del'>-	&amp;ls1x_uart_pdev,</div><div class='del'>-	&amp;ls1x_eth0_pdev,</div><div class='del'>-	&amp;ls1x_eth1_pdev,</div><div class='del'>-	&amp;ls1x_ehci_pdev,</div><div class='del'>-	&amp;ls1x_gpio0_pdev,</div><div class='del'>-	&amp;ls1x_gpio1_pdev,</div><div class='del'>-	&amp;ls1x_rtc_pdev,</div><div class='del'>-	&amp;ls1x_wdt_pdev,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ls1b_platform_init(void)</div><div class='del'>-{</div><div class='del'>-	ls1x_serial_set_uartclk(&amp;ls1x_uart_pdev);</div><div class='del'>-</div><div class='del'>-	gpio_led_register_device(-1, &amp;ls1x_led_pdata);</div><div class='del'>-</div><div class='del'>-	return platform_add_devices(ls1b_platform_devices,</div><div class='del'>-				   ARRAY_SIZE(ls1b_platform_devices));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(ls1b_platform_init);</div><div class='head'>diff --git a/arch/mips/loongson32/ls1c/Makefile b/arch/mips/loongson32/ls1c/Makefile<br/>deleted file mode 100644<br/>index 1cf3aa264d55..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/ls1c/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1c/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#</div><div class='del'>-# Makefile for loongson1C based machines.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-y += board.o</div><div class='head'>diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c<br/>deleted file mode 100644<br/>index 9dcfe9de55b0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson32/ls1c/board.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson32/ls1c/board.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2016 Yang Ling &lt;gnaygnil@gmail.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;platform.h&gt;</div><div class='del'>-</div><div class='del'>-static struct platform_device *ls1c_platform_devices[] __initdata = {</div><div class='del'>-	&amp;ls1x_uart_pdev,</div><div class='del'>-	&amp;ls1x_eth0_pdev,</div><div class='del'>-	&amp;ls1x_rtc_pdev,</div><div class='del'>-	&amp;ls1x_wdt_pdev,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ls1c_platform_init(void)</div><div class='del'>-{</div><div class='del'>-	ls1x_serial_set_uartclk(&amp;ls1x_uart_pdev);</div><div class='del'>-</div><div class='del'>-	return platform_add_devices(ls1c_platform_devices,</div><div class='del'>-				   ARRAY_SIZE(ls1c_platform_devices));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(ls1c_platform_init);</div><div class='head'>diff --git a/arch/mips/loongson64/boardinfo.c b/arch/mips/loongson64/boardinfo.c<br/>index 280989c5a137..827ab94b98b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/boardinfo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/boardinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/boardinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson64/boardinfo.c</a></div><div class='hunk'>@@ -1,17 +1,18 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/kobject.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;boot_param.h&gt;</div><div class='ctx'> </div><div class='ctx'> static ssize_t boardinfo_show(struct kobject *kobj,</div><div class='ctx'> 			      struct kobj_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='del'>-	char board_manufacturer[64] = {0};</div><div class='add'>+	char board_manufacturer[64];</div><div class='ctx'> 	char *tmp_board_manufacturer = board_manufacturer;</div><div class='del'>-	char bios_vendor[64] = {0};</div><div class='add'>+	char bios_vendor[64];</div><div class='ctx'> 	char *tmp_bios_vendor = bios_vendor;</div><div class='ctx'> </div><div class='del'>-	strcpy(board_manufacturer, eboard-&gt;name);</div><div class='del'>-	strcpy(bios_vendor, einter-&gt;description);</div><div class='add'>+	strscpy_pad(board_manufacturer, eboard-&gt;name);</div><div class='add'>+	strscpy_pad(bios_vendor, einter-&gt;description);</div><div class='ctx'> </div><div class='ctx'> 	return sprintf(buf,</div><div class='ctx'> 		       "Board Info\n"</div><div class='hunk'>@@ -21,13 +22,11 @@ static ssize_t boardinfo_show(struct kobject *kobj,</div><div class='ctx'> 		       "BIOS Info\n"</div><div class='ctx'> 		       "Vendor\t\t\t: %s\n"</div><div class='ctx'> 		       "Version\t\t\t: %s\n"</div><div class='del'>-		       "ROM Size\t\t: %d KB\n"</div><div class='ctx'> 		       "Release Date\t\t: %s\n",</div><div class='ctx'> 		       strsep(&amp;tmp_board_manufacturer, "-"),</div><div class='ctx'> 		       eboard-&gt;name,</div><div class='ctx'> 		       strsep(&amp;tmp_bios_vendor, "-"),</div><div class='ctx'> 		       einter-&gt;description,</div><div class='del'>-		       einter-&gt;size,</div><div class='ctx'> 		       especial-&gt;special_name);</div><div class='ctx'> }</div><div class='ctx'> static struct kobj_attribute boardinfo_attr = __ATTR(boardinfo, 0444,</div><div class='head'>diff --git a/arch/mips/loongson64/env.c b/arch/mips/loongson64/env.c<br/>index 09ff05269861..be8d2ad10750 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/env.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/env.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/env.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson64/env.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/dma-map-ops.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/pci_ids.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;loongson.h&gt;</div><div class='ctx'> #include &lt;boot_param.h&gt;</div><div class='hunk'>@@ -162,7 +163,7 @@ void __init prom_lefi_init_env(void)</div><div class='ctx'> 		dma_default_coherent = !eirq_source-&gt;dma_noncoherent;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off");</div><div class='add'>+	pr_info("Firmware: Coherent DMA: %s\n", str_on_off(dma_default_coherent));</div><div class='ctx'> </div><div class='ctx'> 	loongson_sysconf.restart_addr = boot_p-&gt;reset_system.ResetWarm;</div><div class='ctx'> 	loongson_sysconf.poweroff_addr = boot_p-&gt;reset_system.Shutdown;</div><div class='head'>diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c<br/>index a35dd7311795..b9f90f33fc9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson64/init.c</a></div><div class='hunk'>@@ -128,7 +128,7 @@ void __init prom_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* init base address of io space */</div><div class='del'>-	set_io_port_base(PCI_IOBASE);</div><div class='add'>+	set_io_port_base((unsigned long)PCI_IOBASE);</div><div class='ctx'> </div><div class='ctx'> 	if (loongson_sysconf.early_config)</div><div class='ctx'> 		loongson_sysconf.early_config();</div><div class='hunk'>@@ -178,7 +178,7 @@ static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vaddr = PCI_IOBASE + range-&gt;io_start;</div><div class='add'>+	vaddr = (unsigned long)PCI_IOBASE + range-&gt;io_start;</div><div class='ctx'> </div><div class='ctx'> 	vmap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/loongson64/numa.c b/arch/mips/loongson64/numa.c<br/>index 8388400d052f..95d5f553ce19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/numa.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/numa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/numa.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson64/numa.c</a></div><div class='hunk'>@@ -164,13 +164,6 @@ void __init paging_init(void)</div><div class='ctx'> 	free_area_init(zones_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	high_memory = (void *) __va(get_num_physpages() &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	memblock_free_all();</div><div class='del'>-	setup_zero_pages();	/* This comes from node 0 */</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* All PCI device belongs to logical Node-0 */</div><div class='ctx'> int pcibus_to_node(struct pci_bus *bus)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mips/loongson64/setup.c b/arch/mips/loongson64/setup.c<br/>index 257038e18779..b3e590eae952 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/loongson64/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/loongson64/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/loongson64/setup.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'>  * Copyright (C) 2007 Lemote Inc. &amp; Institute of Computing Technology</div><div class='ctx'>  * Author: Fuxin Zhang, zhangfx@lemote.com</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='head'>diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c<br/>index 265bc57819df..c89e70df43d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/math-emu/cp1emu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/math-emu/cp1emu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/math-emu/cp1emu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/math-emu/cp1emu.c</a></div><div class='hunk'>@@ -1660,7 +1660,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	case 0x3:</div><div class='add'>+	case 0x7:</div><div class='ctx'> 		if (MIPSInst_FUNC(ir) != pfetch_op)</div><div class='ctx'> 			return SIGILL;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/math-emu/me-debugfs.c b/arch/mips/math-emu/me-debugfs.c<br/>index d5ad76b2bb67..aeddf7aecfc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/math-emu/me-debugfs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/math-emu/me-debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/math-emu/me-debugfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/math-emu/me-debugfs.c</a></div><div class='hunk'>@@ -37,11 +37,11 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_fpuemu_stat, fpuemu_stat_get, NULL, "%llu\n");</div><div class='ctx'>  * used in debugfs item names to be clearly associated to corresponding</div><div class='ctx'>  * MIPS FPU instructions.</div><div class='ctx'>  */</div><div class='del'>-static void adjust_instruction_counter_name(char *out_name, char *in_name)</div><div class='add'>+static void adjust_instruction_counter_name(char *out_name, char *in_name, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='del'>-	strcpy(out_name, in_name);</div><div class='add'>+	strscpy(out_name, in_name, len);</div><div class='ctx'> 	while (in_name[i] != '\0') {</div><div class='ctx'> 		if (out_name[i] == '_')</div><div class='ctx'> 			out_name[i] = '.';</div><div class='hunk'>@@ -226,7 +226,7 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> #define FPU_STAT_CREATE_EX(m)						\</div><div class='ctx'> do {									\</div><div class='del'>-	adjust_instruction_counter_name(name, #m);			\</div><div class='add'>+	adjust_instruction_counter_name(name, #m, sizeof(name));			\</div><div class='ctx'> 									\</div><div class='ctx'> 	debugfs_create_file(name, 0444, fpuemu_debugfs_inst_dir,	\</div><div class='ctx'> 				(void *)FPU_EMU_STAT_OFFSET(m),		\</div><div class='head'>diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c<br/>index bf9a37c60e9f..e3b4224c9a40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/cache.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/cache.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/cache.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/cache.c</a></div><div class='hunk'>@@ -99,9 +99,9 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __flush_dcache_pages(struct page *page, unsigned int nr)</div><div class='add'>+void __flush_dcache_folio_pages(struct folio *folio, struct page *page,</div><div class='add'>+		unsigned int nr)</div><div class='ctx'> {</div><div class='del'>-	struct folio *folio = page_folio(page);</div><div class='ctx'> 	struct address_space *mapping = folio_flush_mapping(folio);</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -117,12 +117,12 @@ void __flush_dcache_pages(struct page *page, unsigned int nr)</div><div class='ctx'> 	 * get faulted into the tlb (and thus flushed) anyways.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; nr; i++) {</div><div class='del'>-		addr = (unsigned long)kmap_local_page(nth_page(page, i));</div><div class='add'>+		addr = (unsigned long)kmap_local_page(page + i);</div><div class='ctx'> 		flush_data_cache_page(addr);</div><div class='ctx'> 		kunmap_local((void *)addr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__flush_dcache_pages);</div><div class='add'>+EXPORT_SYMBOL(__flush_dcache_folio_pages);</div><div class='ctx'> </div><div class='ctx'> void __flush_anon_page(struct page *page, unsigned long vmaddr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c<br/>index 4583d1a2a73e..a673d3d68254 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/init.c</a></div><div class='hunk'>@@ -59,24 +59,16 @@ EXPORT_SYMBOL(zero_page_mask);</div><div class='ctx'> /*</div><div class='ctx'>  * Not static inline because used by IP27 special magic initialization code</div><div class='ctx'>  */</div><div class='del'>-void setup_zero_pages(void)</div><div class='add'>+static void __init setup_zero_pages(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int order, i;</div><div class='del'>-	struct page *page;</div><div class='add'>+	unsigned int order;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_vce)</div><div class='ctx'> 		order = 3;</div><div class='ctx'> 	else</div><div class='ctx'> 		order = 0;</div><div class='ctx'> </div><div class='del'>-	empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("Oh boy, that early out of memory?");</div><div class='del'>-</div><div class='del'>-	page = virt_to_page((void *)empty_zero_page);</div><div class='del'>-	split_page(page, order);</div><div class='del'>-	for (i = 0; i &lt; (1 &lt;&lt; order); i++, page++)</div><div class='del'>-		mark_page_reserved(page);</div><div class='add'>+	empty_zero_page = (unsigned long)memblock_alloc_or_panic(PAGE_SIZE &lt;&lt; order, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	zero_page_mask = ((PAGE_SIZE &lt;&lt; order) - 1) &amp; PAGE_MASK;</div><div class='ctx'> }</div><div class='hunk'>@@ -423,17 +415,8 @@ void __init paging_init(void)</div><div class='ctx'> 		       " %ldk highmem ignored\n",</div><div class='ctx'> 		       (highend_pfn - max_low_pfn) &lt;&lt; (PAGE_SHIFT - 10));</div><div class='ctx'> 		max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;</div><div class='del'>-</div><div class='del'>-		max_mapnr = max_low_pfn;</div><div class='del'>-	} else if (highend_pfn) {</div><div class='del'>-		max_mapnr = highend_pfn;</div><div class='del'>-	} else {</div><div class='del'>-		max_mapnr = max_low_pfn;</div><div class='ctx'> 	}</div><div class='del'>-#else</div><div class='del'>-	max_mapnr = max_low_pfn;</div><div class='ctx'> #endif</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn &lt;&lt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	free_area_init(max_zone_pfns);</div><div class='ctx'> }</div><div class='hunk'>@@ -442,26 +425,7 @@ void __init paging_init(void)</div><div class='ctx'> static struct kcore_list kcore_kseg0;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline void __init mem_init_free_highmem(void)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	unsigned long tmp;</div><div class='del'>-</div><div class='del'>-	if (cpu_has_dc_aliases)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (tmp = highstart_pfn; tmp &lt; highend_pfn; tmp++) {</div><div class='del'>-		struct page *page = pfn_to_page(tmp);</div><div class='del'>-</div><div class='del'>-		if (!memblock_is_memory(PFN_PHYS(tmp)))</div><div class='del'>-			SetPageReserved(page);</div><div class='del'>-		else</div><div class='del'>-			free_highmem_page(page);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init mem_init(void)</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When PFN_PTE_SHIFT is greater than PAGE_SHIFT we won't have enough PTE</div><div class='hunk'>@@ -470,9 +434,7 @@ void __init mem_init(void)</div><div class='ctx'> 	BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT) &amp;&amp; (PFN_PTE_SHIFT &gt; PAGE_SHIFT));</div><div class='ctx'> </div><div class='ctx'> 	maar_init();</div><div class='del'>-	memblock_free_all();</div><div class='ctx'> 	setup_zero_pages();	/* Setup zeroed pages.  */</div><div class='del'>-	mem_init_free_highmem();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> 	if ((unsigned long) &amp;_text &gt; (unsigned long) CKSEG0)</div><div class='hunk'>@@ -482,6 +444,11 @@ void __init mem_init(void)</div><div class='ctx'> 				0x80000000 - 4, KCORE_TEXT);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='add'>+#else  /* CONFIG_NUMA */</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='add'>+{</div><div class='add'>+	setup_zero_pages();	/* This comes from node 0 */</div><div class='add'>+}</div><div class='ctx'> #endif /* !CONFIG_NUMA */</div><div class='ctx'> </div><div class='ctx'> void free_init_pages(const char *what, unsigned long begin, unsigned long end)</div><div class='head'>diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c<br/>index d8243d61ef32..c6c4576cd4a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/ioremap.c</a></div><div class='hunk'>@@ -44,9 +44,9 @@ static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages,</div><div class='ctx'>  * ioremap_prot gives the caller control over cache coherency attributes (CCA)</div><div class='ctx'>  */</div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t phys_addr, unsigned long size,</div><div class='del'>-		unsigned long prot_val)</div><div class='add'>+			   pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags = prot_val &amp; _CACHE_MASK;</div><div class='add'>+	unsigned long flags = pgprot_val(prot) &amp; _CACHE_MASK;</div><div class='ctx'> 	unsigned long offset, pfn, last_pfn;</div><div class='ctx'> 	struct vm_struct *area;</div><div class='ctx'> 	phys_addr_t last_addr;</div><div class='head'>diff --git a/arch/mips/mm/ioremap64.c b/arch/mips/mm/ioremap64.c<br/>index 15e7820d6a5f..acc03ba20098 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/ioremap64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/ioremap64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/ioremap64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/ioremap64.c</a></div><div class='hunk'>@@ -3,9 +3,9 @@</div><div class='ctx'> #include &lt;ioremap.h&gt;</div><div class='ctx'> </div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,</div><div class='del'>-		unsigned long prot_val)</div><div class='add'>+			   pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags = prot_val &amp; _CACHE_MASK;</div><div class='add'>+	unsigned long flags = pgprot_val(prot) &amp; _CACHE_MASK;</div><div class='ctx'> 	u64 base = (flags == _CACHE_UNCACHED ? IO_BASE : UNCAC_BASE);</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c<br/>index 84dd5136d53a..e2cf2166d5cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable-32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable-32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable-32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/pgtable-32.c</a></div><div class='hunk'>@@ -31,16 +31,6 @@ void pgd_init(void *addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_TRANSPARENT_HUGEPAGE)</div><div class='del'>-pmd_t mk_pmd(struct page *page, pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	pmd_t pmd;</div><div class='del'>-</div><div class='del'>-	pmd_val(pmd) = (page_to_pfn(page) &lt;&lt; PFN_PTE_SHIFT) | pgprot_val(prot);</div><div class='del'>-</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c<br/>index 1e544827dea9..b24f865de357 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable-64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable-64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable-64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/pgtable-64.c</a></div><div class='hunk'>@@ -90,15 +90,6 @@ void pud_init(void *addr)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='del'>-pmd_t mk_pmd(struct page *page, pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	pmd_t pmd;</div><div class='del'>-</div><div class='del'>-	pmd_val(pmd) = (page_to_pfn(page) &lt;&lt; PFN_PTE_SHIFT) | pgprot_val(prot);</div><div class='del'>-</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 		pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c<br/>index 1506e458040d..10835414819f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/pgtable.c</a></div><div class='hunk'>@@ -10,12 +10,10 @@</div><div class='ctx'> </div><div class='ctx'> pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *init, *ret = NULL;</div><div class='del'>-	struct ptdesc *ptdesc = pagetable_alloc(GFP_KERNEL &amp; ~__GFP_HIGHMEM,</div><div class='del'>-			PGD_TABLE_ORDER);</div><div class='add'>+	pgd_t *init, *ret;</div><div class='ctx'> </div><div class='del'>-	if (ptdesc) {</div><div class='del'>-		ret = ptdesc_address(ptdesc);</div><div class='add'>+	ret = __pgd_alloc(mm, PGD_TABLE_ORDER);</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		init = pgd_offset(&amp;init_mm, 0UL);</div><div class='ctx'> 		pgd_init(ret);</div><div class='ctx'> 		memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,</div><div class='head'>diff --git a/arch/mips/mm/physaddr.c b/arch/mips/mm/physaddr.c<br/>index f9b8c85e9843..a6b1bf82057a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/physaddr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/physaddr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/physaddr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/physaddr.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@ static inline bool __debug_virt_addr_valid(unsigned long x)</div><div class='ctx'> phys_addr_t __virt_to_phys(volatile const void *x)</div><div class='ctx'> {</div><div class='ctx'> 	WARN(!__debug_virt_addr_valid((unsigned long)x),</div><div class='del'>-	     "virt_to_phys used for non-linear address: %pK (%pS)\n",</div><div class='add'>+	     "virt_to_phys used for non-linear address: %p (%pS)\n",</div><div class='ctx'> 	     x, x);</div><div class='ctx'> </div><div class='ctx'> 	return __virt_to_phys_nodebug(x);</div><div class='head'>diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c<br/>index 76f3b9c0a9f0..347126dc010d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/tlb-r4k.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/mm/tlb-r4k.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/mm/tlb-r4k.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/mm/tlb-r4k.c</a></div><div class='hunk'>@@ -508,6 +508,60 @@ static int __init set_ntlb(char *str)</div><div class='ctx'> </div><div class='ctx'> __setup("ntlb=", set_ntlb);</div><div class='ctx'> </div><div class='add'>+/* Initialise all TLB entries with unique values */</div><div class='add'>+static void r4k_tlb_uniquify(void)</div><div class='add'>+{</div><div class='add'>+	int entry = num_wired_entries();</div><div class='add'>+</div><div class='add'>+	htw_stop();</div><div class='add'>+	write_c0_entrylo0(0);</div><div class='add'>+	write_c0_entrylo1(0);</div><div class='add'>+</div><div class='add'>+	while (entry &lt; current_cpu_data.tlbsize) {</div><div class='add'>+		unsigned long asid_mask = cpu_asid_mask(&amp;current_cpu_data);</div><div class='add'>+		unsigned long asid = 0;</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		/* Skip wired MMID to make ginvt_mmid work */</div><div class='add'>+		if (cpu_has_mmid)</div><div class='add'>+			asid = MMID_KERNEL_WIRED + 1;</div><div class='add'>+</div><div class='add'>+		/* Check for match before using UNIQUE_ENTRYHI */</div><div class='add'>+		do {</div><div class='add'>+			if (cpu_has_mmid) {</div><div class='add'>+				write_c0_memorymapid(asid);</div><div class='add'>+				write_c0_entryhi(UNIQUE_ENTRYHI(entry));</div><div class='add'>+			} else {</div><div class='add'>+				write_c0_entryhi(UNIQUE_ENTRYHI(entry) | asid);</div><div class='add'>+			}</div><div class='add'>+			mtc0_tlbw_hazard();</div><div class='add'>+			tlb_probe();</div><div class='add'>+			tlb_probe_hazard();</div><div class='add'>+			idx = read_c0_index();</div><div class='add'>+			/* No match or match is on current entry */</div><div class='add'>+			if (idx &lt; 0 || idx == entry)</div><div class='add'>+				break;</div><div class='add'>+			/*</div><div class='add'>+			 * If we hit a match, we need to try again with</div><div class='add'>+			 * a different ASID.</div><div class='add'>+			 */</div><div class='add'>+			asid++;</div><div class='add'>+		} while (asid &lt; asid_mask);</div><div class='add'>+</div><div class='add'>+		if (idx &gt;= 0 &amp;&amp; idx != entry)</div><div class='add'>+			panic("Unable to uniquify TLB entry %d", idx);</div><div class='add'>+</div><div class='add'>+		write_c0_index(entry);</div><div class='add'>+		mtc0_tlbw_hazard();</div><div class='add'>+		tlb_write_indexed();</div><div class='add'>+		entry++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tlbw_use_hazard();</div><div class='add'>+	htw_start();</div><div class='add'>+	flush_micro_tlb();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Configure TLB (for init or after a CPU has been powered off).</div><div class='ctx'>  */</div><div class='hunk'>@@ -547,7 +601,7 @@ static void r4k_tlb_configure(void)</div><div class='ctx'> 	temp_tlb_entry = current_cpu_data.tlbsize - 1;</div><div class='ctx'> </div><div class='ctx'> 	/* From this point on the ARC firmware is dead.	 */</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	r4k_tlb_uniquify();</div><div class='ctx'> </div><div class='ctx'> 	/* Did I tell you that ARC SUCKS?  */</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c<br/>index a925842ee125..17fa97ec6ffb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-ar2315.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-ar2315.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-ar2315.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-ar2315.c</a></div><div class='hunk'>@@ -469,8 +469,8 @@ static int ar2315_pci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	apc-&gt;domain = irq_domain_add_linear(NULL, AR2315_PCI_IRQ_COUNT,</div><div class='del'>-					    &amp;ar2315_pci_irq_domain_ops, apc);</div><div class='add'>+	apc-&gt;domain = irq_domain_create_linear(NULL, AR2315_PCI_IRQ_COUNT,</div><div class='add'>+					       &amp;ar2315_pci_irq_domain_ops, apc);</div><div class='ctx'> 	if (!apc-&gt;domain) {</div><div class='ctx'> 		dev_err(dev, "failed to add IRQ domain\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c<br/>index 68a8cefed420..0e85839b8225 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-lantiq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-lantiq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-lantiq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-lantiq.c</a></div><div class='hunk'>@@ -234,7 +234,7 @@ static struct platform_driver ltq_pci_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init pcibios_init(void)</div><div class='add'>+static int __init pcibios_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = platform_driver_register(&amp;ltq_pci_driver);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c<br/>index ec2567f8efd8..d04b7c1294b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-legacy.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-legacy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-legacy.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-legacy.c</a></div><div class='hunk'>@@ -29,6 +29,14 @@ static LIST_HEAD(controllers);</div><div class='ctx'> </div><div class='ctx'> static int pci_initialized;</div><div class='ctx'> </div><div class='add'>+unsigned long pci_address_to_pio(phys_addr_t address)</div><div class='add'>+{</div><div class='add'>+	if (address &gt; IO_SPACE_LIMIT)</div><div class='add'>+		return (unsigned long)-1;</div><div class='add'>+</div><div class='add'>+	return (unsigned long) address;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We need to avoid collisions with `mirrored' VGA ports</div><div class='ctx'>  * and other strange ISA hardware, so we always want the</div><div class='hunk'>@@ -241,45 +249,11 @@ static int __init pcibios_init(void)</div><div class='ctx'> </div><div class='ctx'> subsys_initcall(pcibios_init);</div><div class='ctx'> </div><div class='del'>-static int pcibios_enable_resources(struct pci_dev *dev, int mask)</div><div class='del'>-{</div><div class='del'>-	u16 cmd, old_cmd;</div><div class='del'>-	int idx;</div><div class='del'>-	struct resource *r;</div><div class='del'>-</div><div class='del'>-	pci_read_config_word(dev, PCI_COMMAND, &amp;cmd);</div><div class='del'>-	old_cmd = cmd;</div><div class='del'>-	pci_dev_for_each_resource(dev, r, idx) {</div><div class='del'>-		/* Only set up the requested stuff */</div><div class='del'>-		if (!(mask &amp; (1&lt;&lt;idx)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!(r-&gt;flags &amp; (IORESOURCE_IO | IORESOURCE_MEM)))</div><div class='del'>-			continue;</div><div class='del'>-		if ((idx == PCI_ROM_RESOURCE) &amp;&amp;</div><div class='del'>-				(!(r-&gt;flags &amp; IORESOURCE_ROM_ENABLE)))</div><div class='del'>-			continue;</div><div class='del'>-		if (!r-&gt;start &amp;&amp; r-&gt;end) {</div><div class='del'>-			pci_err(dev,</div><div class='del'>-				"can't enable device: resource collisions\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		if (r-&gt;flags &amp; IORESOURCE_IO)</div><div class='del'>-			cmd |= PCI_COMMAND_IO;</div><div class='del'>-		if (r-&gt;flags &amp; IORESOURCE_MEM)</div><div class='del'>-			cmd |= PCI_COMMAND_MEMORY;</div><div class='del'>-	}</div><div class='del'>-	if (cmd != old_cmd) {</div><div class='del'>-		pci_info(dev, "enabling device (%04x -&gt; %04x)\n", old_cmd, cmd);</div><div class='del'>-		pci_write_config_word(dev, PCI_COMMAND, cmd);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pcibios_enable_device(struct pci_dev *dev, int mask)</div><div class='ctx'> {</div><div class='del'>-	int err = pcibios_enable_resources(dev, mask);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='add'>+	err = pci_enable_resources(dev, mask);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c<br/>index 1cada09fa5db..006e2bbab87e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-rt2880.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-rt2880.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-rt2880.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-rt2880.c</a></div><div class='hunk'>@@ -264,7 +264,7 @@ static struct platform_driver rt288x_pci_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init pcibios_init(void)</div><div class='add'>+static int __init pcibios_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = platform_driver_register(&amp;rt288x_pci_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c<br/>index 4ac68a534e4f..14454ece485d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-rt3883.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-rt3883.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-rt3883.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-rt3883.c</a></div><div class='hunk'>@@ -208,9 +208,10 @@ static int rt3883_pci_irq_init(struct device *dev,</div><div class='ctx'> 	rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA);</div><div class='ctx'> </div><div class='ctx'> 	rpc-&gt;irq_domain =</div><div class='del'>-		irq_domain_add_linear(rpc-&gt;intc_of_node, RT3883_PCI_IRQ_COUNT,</div><div class='del'>-				      &amp;rt3883_pci_irq_domain_ops,</div><div class='del'>-				      rpc);</div><div class='add'>+		irq_domain_create_linear(of_fwnode_handle(rpc-&gt;intc_of_node),</div><div class='add'>+					 RT3883_PCI_IRQ_COUNT,</div><div class='add'>+					 &amp;rt3883_pci_irq_domain_ops,</div><div class='add'>+					 rpc);</div><div class='ctx'> 	if (!rpc-&gt;irq_domain) {</div><div class='ctx'> 		dev_err(dev, "unable to add IRQ domain\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/arch/mips/pci/pci-xtalk-bridge.c b/arch/mips/pci/pci-xtalk-bridge.c<br/>index 45ddbaa6c123..e00c38620d14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-xtalk-bridge.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/pci/pci-xtalk-bridge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/pci/pci-xtalk-bridge.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/pci/pci-xtalk-bridge.c</a></div><div class='hunk'>@@ -620,7 +620,7 @@ static int bridge_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (bridge_get_partnum(virt_to_phys((void *)bd-&gt;bridge_addr), partnum))</div><div class='ctx'> 		return -EPROBE_DEFER; /* not available yet */</div><div class='ctx'> </div><div class='del'>-	parent = irq_get_default_host();</div><div class='add'>+	parent = irq_get_default_domain();</div><div class='ctx'> 	if (!parent)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	fn = irq_domain_alloc_named_fwnode("BRIDGE");</div><div class='hunk'>@@ -749,7 +749,7 @@ static void bridge_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver bridge_driver = {</div><div class='ctx'> 	.probe = bridge_probe,</div><div class='del'>-	.remove_new = bridge_remove,</div><div class='add'>+	.remove = bridge_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "xtalk-bridge",</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig<br/>index 08c012a2591f..910d059ec70b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/ralink/Kconfig</a></div><div class='hunk'>@@ -1,13 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> if RALINK</div><div class='ctx'> </div><div class='del'>-config CLKEVT_RT3352</div><div class='del'>-	bool</div><div class='del'>-	depends on SOC_RT305X || SOC_MT7620</div><div class='del'>-	default y</div><div class='del'>-	select TIMER_OF</div><div class='del'>-	select CLKSRC_MMIO</div><div class='del'>-</div><div class='ctx'> config RALINK_ILL_ACC</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on SOC_RT305X</div><div class='head'>diff --git a/arch/mips/ralink/Makefile b/arch/mips/ralink/Makefile<br/>index 26fabbdea1f1..0c109eae1953 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/ralink/Makefile</a></div><div class='hunk'>@@ -10,8 +10,6 @@ ifndef CONFIG_MIPS_GIC</div><div class='ctx'> 	obj-y += clk.o timer.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_IRQ_INTC) += irq.o</div><div class='head'>diff --git a/arch/mips/ralink/cevt-rt3352.c b/arch/mips/ralink/cevt-rt3352.c<br/>deleted file mode 100644<br/>index 269d4877d120..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/cevt-rt3352.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/cevt-rt3352.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,153 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2013 by John Crispin &lt;john@phrozen.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clockchips.h&gt;</div><div class='del'>-#include &lt;linux/clocksource.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/reset.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach-ralink/ralink_regs.h&gt;</div><div class='del'>-</div><div class='del'>-#define SYSTICK_FREQ		(50 * 1000)</div><div class='del'>-</div><div class='del'>-#define SYSTICK_CONFIG		0x00</div><div class='del'>-#define SYSTICK_COMPARE		0x04</div><div class='del'>-#define SYSTICK_COUNT		0x08</div><div class='del'>-</div><div class='del'>-/* route systick irq to mips irq 7 instead of the r4k-timer */</div><div class='del'>-#define CFG_EXT_STK_EN		0x2</div><div class='del'>-/* enable the counter */</div><div class='del'>-#define CFG_CNT_EN		0x1</div><div class='del'>-</div><div class='del'>-struct systick_device {</div><div class='del'>-	void __iomem *membase;</div><div class='del'>-	struct clock_event_device dev;</div><div class='del'>-	int irq_requested;</div><div class='del'>-	int freq_scale;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int systick_set_oneshot(struct clock_event_device *evt);</div><div class='del'>-static int systick_shutdown(struct clock_event_device *evt);</div><div class='del'>-</div><div class='del'>-static int systick_next_event(unsigned long delta,</div><div class='del'>-				struct clock_event_device *evt)</div><div class='del'>-{</div><div class='del'>-	struct systick_device *sdev;</div><div class='del'>-	u32 count;</div><div class='del'>-</div><div class='del'>-	sdev = container_of(evt, struct systick_device, dev);</div><div class='del'>-	count = ioread32(sdev-&gt;membase + SYSTICK_COUNT);</div><div class='del'>-	count = (count + delta) % SYSTICK_FREQ;</div><div class='del'>-	iowrite32(count, sdev-&gt;membase + SYSTICK_COMPARE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void systick_event_handler(struct clock_event_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* noting to do here */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t systick_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct clock_event_device *dev = (struct clock_event_device *) dev_id;</div><div class='del'>-</div><div class='del'>-	dev-&gt;event_handler(dev);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct systick_device systick = {</div><div class='del'>-	.dev = {</div><div class='del'>-		/*</div><div class='del'>-		 * cevt-r4k uses 300, make sure systick</div><div class='del'>-		 * gets used if available</div><div class='del'>-		 */</div><div class='del'>-		.rating			= 310,</div><div class='del'>-		.features		= CLOCK_EVT_FEAT_ONESHOT,</div><div class='del'>-		.set_next_event		= systick_next_event,</div><div class='del'>-		.set_state_shutdown	= systick_shutdown,</div><div class='del'>-		.set_state_oneshot	= systick_set_oneshot,</div><div class='del'>-		.event_handler		= systick_event_handler,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int systick_shutdown(struct clock_event_device *evt)</div><div class='del'>-{</div><div class='del'>-	struct systick_device *sdev;</div><div class='del'>-</div><div class='del'>-	sdev = container_of(evt, struct systick_device, dev);</div><div class='del'>-</div><div class='del'>-	if (sdev-&gt;irq_requested)</div><div class='del'>-		free_irq(systick.dev.irq, &amp;systick.dev);</div><div class='del'>-	sdev-&gt;irq_requested = 0;</div><div class='del'>-	iowrite32(0, systick.membase + SYSTICK_CONFIG);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int systick_set_oneshot(struct clock_event_device *evt)</div><div class='del'>-{</div><div class='del'>-	const char *name = systick.dev.name;</div><div class='del'>-	struct systick_device *sdev;</div><div class='del'>-	int irq = systick.dev.irq;</div><div class='del'>-</div><div class='del'>-	sdev = container_of(evt, struct systick_device, dev);</div><div class='del'>-</div><div class='del'>-	if (!sdev-&gt;irq_requested) {</div><div class='del'>-		if (request_irq(irq, systick_interrupt,</div><div class='del'>-				IRQF_PERCPU | IRQF_TIMER, name, &amp;systick.dev))</div><div class='del'>-			pr_err("Failed to request irq %d (%s)\n", irq, name);</div><div class='del'>-	}</div><div class='del'>-	sdev-&gt;irq_requested = 1;</div><div class='del'>-	iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN,</div><div class='del'>-		  systick.membase + SYSTICK_CONFIG);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ralink_systick_init(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	systick.membase = of_iomap(np, 0);</div><div class='del'>-	if (!systick.membase)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	systick.dev.name = np-&gt;name;</div><div class='del'>-	clockevents_calc_mult_shift(&amp;systick.dev, SYSTICK_FREQ, 60);</div><div class='del'>-	systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &amp;systick.dev);</div><div class='del'>-	systick.dev.max_delta_ticks = 0x7fff;</div><div class='del'>-	systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &amp;systick.dev);</div><div class='del'>-	systick.dev.min_delta_ticks = 0x3;</div><div class='del'>-	systick.dev.irq = irq_of_parse_and_map(np, 0);</div><div class='del'>-	if (!systick.dev.irq) {</div><div class='del'>-		pr_err("%pOFn: request_irq failed", np);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np-&gt;name,</div><div class='del'>-				    SYSTICK_FREQ, 301, 16,</div><div class='del'>-				    clocksource_mmio_readl_up);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	clockevents_register_device(&amp;systick.dev);</div><div class='del'>-</div><div class='del'>-	pr_info("%pOFn: running - mult: %d, shift: %d\n",</div><div class='del'>-			np, systick.dev.mult, systick.dev.shift);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);</div><div class='head'>diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c<br/>index 46aef0a1b22a..955b36e89358 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/ralink/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/ralink/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/ralink/irq.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq_cpu.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='hunk'>@@ -176,7 +177,7 @@ static int __init intc_of_init(struct device_node *node,</div><div class='ctx'> 	/* route all INTC interrupts to MIPS HW0 interrupt */</div><div class='ctx'> 	rt_intc_w32(0, INTC_REG_TYPE);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(node, RALINK_INTC_IRQ_COUNT,</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(node), RALINK_INTC_IRQ_COUNT,</div><div class='ctx'> 			RALINK_INTC_IRQ_BASE, 0, &amp;irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add irqdomain");</div><div class='head'>diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c<br/>index ea6ebfea4a67..9aa5ef374465 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/rb532/gpio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/rb532/gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/rb532/gpio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/rb532/gpio.c</a></div><div class='hunk'>@@ -105,13 +105,15 @@ static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> /*</div><div class='ctx'>  * Set output GPIO level</div><div class='ctx'>  */</div><div class='del'>-static void rb532_gpio_set(struct gpio_chip *chip,</div><div class='del'>-				unsigned offset, int value)</div><div class='add'>+static int rb532_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			  int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb532_gpio_chip	*gpch;</div><div class='ctx'> </div><div class='ctx'> 	gpch = gpiochip_get_data(chip);</div><div class='ctx'> 	rb532_set_bit(value, offset, gpch-&gt;regbase + GPIOD);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c<br/>index b88e89ec5894..8c370eb180ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/rb532/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/rb532/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/rb532/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/rb532/prom.c</a></div><div class='hunk'>@@ -53,6 +53,7 @@ static void __init prom_setup_cmdline(void)</div><div class='ctx'> 	int prom_argc;</div><div class='ctx'> 	char **prom_argv;</div><div class='ctx'> 	int i;</div><div class='add'>+	size_t len;</div><div class='ctx'> </div><div class='ctx'> 	prom_argc = fw_arg0;</div><div class='ctx'> 	prom_argv = (char **) fw_arg1;</div><div class='hunk'>@@ -82,20 +83,20 @@ static void __init prom_setup_cmdline(void)</div><div class='ctx'> 				mips_machtype = MACH_MIKROTIK_RB532;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		strcpy(cp, prom_argv[i]);</div><div class='del'>-		cp += strlen(prom_argv[i]);</div><div class='add'>+		len = strlen(prom_argv[i]);</div><div class='add'>+		memcpy(cp, prom_argv[i], len + 1);</div><div class='add'>+		cp += len;</div><div class='ctx'> 	}</div><div class='ctx'> 	*(cp++) = ' ';</div><div class='ctx'> </div><div class='del'>-	i = strlen(arcs_cmdline);</div><div class='del'>-	if (i &gt; 0) {</div><div class='add'>+	len = strlen(arcs_cmdline);</div><div class='add'>+	if (len &gt; 0) {</div><div class='ctx'> 		*(cp++) = ' ';</div><div class='del'>-		strcpy(cp, arcs_cmdline);</div><div class='del'>-		cp += strlen(arcs_cmdline);</div><div class='add'>+		memcpy(cp, arcs_cmdline, len + 1);</div><div class='add'>+		cp += len;</div><div class='ctx'> 	}</div><div class='ctx'> 	cmd_line[COMMAND_LINE_SIZE - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	strcpy(arcs_cmdline, cmd_line);</div><div class='add'>+	strscpy(arcs_cmdline, cmd_line);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init prom_init(void)</div><div class='head'>diff --git a/arch/mips/sgi-ip22/ip22-gio.c b/arch/mips/sgi-ip22/ip22-gio.c<br/>index d20eec742bfa..5893ea4e382c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-gio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-gio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-gio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip22/ip22-gio.c</a></div><div class='hunk'>@@ -165,9 +165,8 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *a,</div><div class='ctx'> 			     char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct gio_device *gio_dev = to_gio_device(dev);</div><div class='del'>-	int len = snprintf(buf, PAGE_SIZE, "gio:%x\n", gio_dev-&gt;id.id);</div><div class='ctx'> </div><div class='del'>-	return (len &gt;= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;</div><div class='add'>+	return sysfs_emit(buf, "gio:%x\n", gio_dev-&gt;id.id);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(modalias);</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +176,7 @@ static ssize_t name_show(struct device *dev,</div><div class='ctx'> 	struct gio_device *giodev;</div><div class='ctx'> </div><div class='ctx'> 	giodev = to_gio_device(dev);</div><div class='del'>-	return sprintf(buf, "%s", giodev-&gt;name);</div><div class='add'>+	return sysfs_emit(buf, "%s\n", giodev-&gt;name);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(name);</div><div class='ctx'> </div><div class='hunk'>@@ -187,7 +186,7 @@ static ssize_t id_show(struct device *dev,</div><div class='ctx'> 	struct gio_device *giodev;</div><div class='ctx'> </div><div class='ctx'> 	giodev = to_gio_device(dev);</div><div class='del'>-	return sprintf(buf, "%x", giodev-&gt;id.id);</div><div class='add'>+	return sysfs_emit(buf, "%x\n", giodev-&gt;id.id);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(id);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c<br/>index 0b2002e02a47..3a53690b4b33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-platform.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-platform.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip22/ip22-platform.c</a></div><div class='hunk'>@@ -221,3 +221,35 @@ static int __init sgi_ds1286_devinit(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> device_initcall(sgi_ds1286_devinit);</div><div class='add'>+</div><div class='add'>+#define SGI_ZILOG_BASE	(HPC3_CHIP0_BASE + \</div><div class='add'>+			 offsetof(struct hpc3_regs, pbus_extregs[6]) + \</div><div class='add'>+			 offsetof(struct sgioc_regs, uart))</div><div class='add'>+</div><div class='add'>+static struct resource sgi_zilog_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start	= SGI_ZILOG_BASE,</div><div class='add'>+		.end	= SGI_ZILOG_BASE + 15,</div><div class='add'>+		.flags	= IORESOURCE_MEM</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start	= SGI_SERIAL_IRQ,</div><div class='add'>+		.end	= SGI_SERIAL_IRQ,</div><div class='add'>+		.flags	= IORESOURCE_IRQ</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device zilog_device = {</div><div class='add'>+	.name		= "ip22zilog",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sgi_zilog_resources),</div><div class='add'>+	.resource	= sgi_zilog_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int __init sgi_zilog_devinit(void)</div><div class='add'>+{</div><div class='add'>+	return platform_device_register(&amp;zilog_device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+device_initcall(sgi_zilog_devinit);</div><div class='head'>diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c<br/>index 8f0861c58080..8539f562f5b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-reset.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-reset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-reset.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip22/ip22-reset.c</a></div><div class='hunk'>@@ -98,7 +98,7 @@ static void blink_timeout(struct timer_list *unused)</div><div class='ctx'> </div><div class='ctx'> static void debounce(struct timer_list *unused)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;debounce_timer);</div><div class='add'>+	timer_delete(&amp;debounce_timer);</div><div class='ctx'> 	if (sgint-&gt;istat1 &amp; SGINT_ISTAT1_PWR) {</div><div class='ctx'> 		/* Interrupt still being sent. */</div><div class='ctx'> 		debounce_timer.expires = jiffies + (HZ / 20); /* 0.05s	*/</div><div class='head'>diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c<br/>index e06a818fe792..f083b25be13b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip22/ip22-setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip22/ip22-setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip22/ip22-setup.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/tty.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='hunk'>@@ -65,7 +66,7 @@ void __init plat_mem_setup(void)</div><div class='ctx'> 		static char options[8] __initdata;</div><div class='ctx'> 		char *baud = ArcGetEnvironmentVariable("dbaud");</div><div class='ctx'> 		if (baud)</div><div class='del'>-			strcpy(options, baud);</div><div class='add'>+			strscpy(options, baud);</div><div class='ctx'> 		add_preferred_console("ttyS", *(ctype + 1) == '2' ? 1 : 0,</div><div class='ctx'> 				      baud ? options : NULL);</div><div class='ctx'> 	} else if (!ctype || *ctype != 'g') {</div><div class='head'>diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c<br/>index 00e63e9ef61d..20ef663af16e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip27/ip27-irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip27/ip27-irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip27/ip27-irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip27/ip27-irq.c</a></div><div class='hunk'>@@ -165,7 +165,7 @@ static void hub_domain_free(struct irq_domain *domain,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	irqd = irq_domain_get_irq_data(domain, virq);</div><div class='del'>-	if (irqd &amp;&amp; irqd-&gt;chip_data)</div><div class='add'>+	if (irqd)</div><div class='ctx'> 		kfree(irqd-&gt;chip_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +297,7 @@ void __init arch_init_irq(void)</div><div class='ctx'> 	if (WARN_ON(domain == NULL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(domain);</div><div class='add'>+	irq_set_default_domain(domain);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_percpu_devid(IP27_HUB_PEND0_IRQ);</div><div class='ctx'> 	irq_set_chained_handler_and_data(IP27_HUB_PEND0_IRQ, ip27_do_irq_mask0,</div><div class='head'>diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c<br/>index 1963313f55d8..2b3e46e2e607 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip27/ip27-memory.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip27/ip27-memory.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip27/ip27-memory.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip27/ip27-memory.c</a></div><div class='hunk'>@@ -406,8 +406,6 @@ void __init prom_meminit(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void setup_zero_pages(void);</div><div class='del'>-</div><div class='ctx'> void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long zones_size[MAX_NR_ZONES] = {0, };</div><div class='hunk'>@@ -416,10 +414,3 @@ void __init paging_init(void)</div><div class='ctx'> 	zones_size[ZONE_NORMAL] = max_low_pfn;</div><div class='ctx'> 	free_area_init(zones_size);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	high_memory = (void *) __va(get_num_physpages() &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	memblock_free_all();</div><div class='del'>-	setup_zero_pages();	/* This comes from node 0 */</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-irq.c b/arch/mips/sgi-ip30/ip30-irq.c<br/>index 423c32cb66ed..9fb905e2cf14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-irq.c</a></div><div class='hunk'>@@ -313,7 +313,7 @@ void __init arch_init_irq(void)</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(domain);</div><div class='add'>+	irq_set_default_domain(domain);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_percpu_devid(IP30_HEART_L0_IRQ);</div><div class='ctx'> 	irq_set_chained_handler_and_data(IP30_HEART_L0_IRQ, ip30_normal_irq,</div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-power.c b/arch/mips/sgi-ip30/ip30-power.c<br/>index 120b3f3d5108..66851e17c5a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-power.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-power.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-power.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-power.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * ip30-power.c: Software powerdown and reset handling for IP30 architecture.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='del'>- *               2014 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *               2014 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  *               2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-setup.c b/arch/mips/sgi-ip30/ip30-setup.c<br/>index e8547636a748..3fcb3ec9f802 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-setup.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * SGI IP30 miscellaneous setup bits.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='del'>- *               2007 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *               2007 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  *               2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-smp.c b/arch/mips/sgi-ip30/ip30-smp.c<br/>index 4bfe654602b1..1e8210f2a9f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-smp.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * and smp-bmips.c.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2005-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='del'>- *               2006-2007, 2014-2015 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *               2006-2007, 2014-2015 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  *               2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-timer.c b/arch/mips/sgi-ip30/ip30-timer.c<br/>index d13e105478ae..7652f72f0daf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-timer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-timer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-timer.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='ctx'>  * Copyright (C) 2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='del'>- * Copyright (C) 2011 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ * Copyright (C) 2011 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='head'>diff --git a/arch/mips/sgi-ip30/ip30-xtalk.c b/arch/mips/sgi-ip30/ip30-xtalk.c<br/>index 7ceb2b23ea1c..d798ee8c998c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-xtalk.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip30/ip30-xtalk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip30/ip30-xtalk.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip30/ip30-xtalk.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * ip30-xtalk.c - Very basic Crosstalk (XIO) detection support.</div><div class='ctx'>  *   Copyright (C) 2004-2007 Stanislaw Skowronek &lt;skylark@unaligned.org&gt;</div><div class='ctx'>  *   Copyright (C) 2009 Johannes Dickgreber &lt;tanzy@gmx.de&gt;</div><div class='del'>- *   Copyright (C) 2007, 2014-2016 Joshua Kinard &lt;kumba@gentoo.org&gt;</div><div class='add'>+ *   Copyright (C) 2007, 2014-2016 Joshua Kinard &lt;linux@kumba.dev&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='head'>diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c<br/>index aeb0805aae57..c2ebc4bbd866 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip32/ip32-setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sgi-ip32/ip32-setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sgi-ip32/ip32-setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sgi-ip32/ip32-setup.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/param.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/mipsregs.h&gt;</div><div class='hunk'>@@ -90,7 +91,7 @@ void __init plat_mem_setup(void)</div><div class='ctx'> 			static char options[8] __initdata;</div><div class='ctx'> 			char *baud = ArcGetEnvironmentVariable("dbaud");</div><div class='ctx'> 			if (baud)</div><div class='del'>-				strcpy(options, baud);</div><div class='add'>+				strscpy(options, baud);</div><div class='ctx'> 			add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0,</div><div class='ctx'> 					      baud ? options : NULL);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c<br/>index 42fdb939c88d..fc7da12284f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/sni/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/sni/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/sni/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/sni/setup.c</a></div><div class='hunk'>@@ -12,8 +12,8 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='del'>-#include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/screen_info.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FW_ARC</div><div class='ctx'> #include &lt;asm/fw/arc/types.h&gt;</div><div class='hunk'>@@ -81,7 +81,7 @@ static void __init sni_console_setup(void)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (baud)</div><div class='del'>-			strcpy(options, baud);</div><div class='add'>+			strscpy(options, baud);</div><div class='ctx'> 		if (strncmp(cdev, "tty552", 6) == 0)</div><div class='ctx'> 			add_preferred_console("ttyS", port,</div><div class='ctx'> 					      baud ? options : NULL);</div><div class='head'>diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c<br/>index 1e67fecd466e..03f8a3a95637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/txx9/generic/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/txx9/generic/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/txx9/generic/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/txx9/generic/setup.c</a></div><div class='hunk'>@@ -200,7 +200,7 @@ static void __init preprocess_cmdline(void)</div><div class='ctx'> 	static char cmdline[COMMAND_LINE_SIZE] __initdata;</div><div class='ctx'> 	char *s;</div><div class='ctx'> </div><div class='del'>-	strcpy(cmdline, arcs_cmdline);</div><div class='add'>+	strscpy(cmdline, arcs_cmdline);</div><div class='ctx'> 	s = cmdline;</div><div class='ctx'> 	arcs_cmdline[0] = '\0';</div><div class='ctx'> 	while (s &amp;&amp; *s) {</div><div class='hunk'>@@ -270,7 +270,7 @@ void __init prom_init(void)</div><div class='ctx'> 	preprocess_cmdline();</div><div class='ctx'> 	select_board();</div><div class='ctx'> </div><div class='del'>-	strcpy(txx9_system_type, txx9_board_vec-&gt;system);</div><div class='add'>+	strscpy(txx9_system_type, txx9_board_vec-&gt;system);</div><div class='ctx'> </div><div class='ctx'> 	txx9_board_vec-&gt;prom_init();</div><div class='ctx'> }</div><div class='hunk'>@@ -603,8 +603,8 @@ static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return !!(data-&gt;cur_val &amp; (1 &lt;&lt; offset));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			    int value)</div><div class='add'>+static int txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct txx9_iocled_data *data = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -616,6 +616,8 @@ static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 	writeb(data-&gt;cur_val, data-&gt;mmioaddr);</div><div class='ctx'> 	mmiowb();</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;txx9_iocled_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)</div><div class='hunk'>@@ -774,7 +776,7 @@ struct txx9_sramc_dev {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,</div><div class='del'>-			      struct bin_attribute *bin_attr,</div><div class='add'>+			      const struct bin_attribute *bin_attr,</div><div class='ctx'> 			      char *buf, loff_t pos, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct txx9_sramc_dev *dev = bin_attr-&gt;private;</div><div class='hunk'>@@ -789,7 +791,7 @@ static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,</div><div class='del'>-			       struct bin_attribute *bin_attr,</div><div class='add'>+			       const struct bin_attribute *bin_attr,</div><div class='ctx'> 			       char *buf, loff_t pos, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct txx9_sramc_dev *dev = bin_attr-&gt;private;</div><div class='head'>diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile<br/>index b289b2c1b294..69d4593f64fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/vdso/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Objects to go into the VDSO.</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> obj-vdso-y := elf.o vgettimeofday.o sigreturn.o</div><div class='ctx'> </div><div class='hunk'>@@ -27,6 +27,7 @@ endif</div><div class='ctx'> # offsets.</div><div class='ctx'> cflags-vdso := $(ccflags-vdso) \</div><div class='ctx'> 	$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \</div><div class='add'>+	$(filter -std=%,$(KBUILD_CFLAGS)) \</div><div class='ctx'> 	-O3 -g -fPIC -fno-strict-aliasing -fno-common -fno-builtin -G 0 \</div><div class='ctx'> 	-mrelax-pic-calls $(call cc-option, -mexplicit-relocs) \</div><div class='ctx'> 	-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \</div><div class='head'>diff --git a/arch/mips/vdso/genvdso.c b/arch/mips/vdso/genvdso.c<br/>index 09e30eb4be86..d47412ea6e67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/genvdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/genvdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/genvdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/vdso/genvdso.c</a></div><div class='hunk'>@@ -270,7 +270,7 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	/* Write out the stripped VDSO data. */</div><div class='ctx'> 	fprintf(out_file,</div><div class='del'>-		"static unsigned char vdso_data[PAGE_ALIGN(%zu)] __page_aligned_data = {\n\t",</div><div class='add'>+		"static unsigned char vdso_image_data[PAGE_ALIGN(%zu)] __page_aligned_data = {\n\t",</div><div class='ctx'> 		vdso_size);</div><div class='ctx'> 	for (i = 0; i &lt; vdso_size; i++) {</div><div class='ctx'> 		if (!(i % 10))</div><div class='hunk'>@@ -286,7 +286,7 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	fprintf(out_file, "struct mips_vdso_image vdso_image%s%s = {\n",</div><div class='ctx'> 		(vdso_name[0]) ? "_" : "", vdso_name);</div><div class='del'>-	fprintf(out_file, "\t.data = vdso_data,\n");</div><div class='add'>+	fprintf(out_file, "\t.data = vdso_image_data,\n");</div><div class='ctx'> 	fprintf(out_file, "\t.size = PAGE_ALIGN(%zu),\n", vdso_size);</div><div class='ctx'> 	fprintf(out_file, "\t.mapping = {\n");</div><div class='ctx'> 	fprintf(out_file, "\t\t.name = \"[vdso]\",\n");</div><div class='head'>diff --git a/arch/mips/vdso/vdso.lds.S b/arch/mips/vdso/vdso.lds.S<br/>index 836465e3bcb8..c8bbe56d89cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/vdso.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/mips/vdso/vdso.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/mips/vdso/vdso.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/mips/vdso/vdso.lds.S</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sgidefs.h&gt;</div><div class='add'>+#include &lt;asm/vdso/vdso.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> #if _MIPS_SIM == _MIPS_SIM_ABI64</div><div class='ctx'> OUTPUT_FORMAT("elf64-tradlittlemips", "elf64-tradbigmips", "elf64-tradlittlemips")</div><div class='hunk'>@@ -18,7 +20,8 @@ OUTPUT_ARCH(mips)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_start = .);</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='ctx'> 	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/nios2/Kbuild b/arch/nios2/Kbuild<br/>index fc2952edd2de..fa64c5954b20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/Kbuild</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='del'>-obj-y += kernel/ mm/ platform/ boot/dts/</div><div class='add'>+obj-y += kernel/ mm/ platform/</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='ctx'> subdir- += boot</div><div class='head'>diff --git a/arch/nios2/boot/dts/Makefile b/arch/nios2/boot/dts/Makefile<br/>index 1a2e8996bec7..1b8f41c4154f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-obj-y := $(patsubst %.dts,%.dtb.o,$(CONFIG_NIOS2_DTB_SOURCE))</div><div class='add'>+dtb-y := $(addsuffix .dtb, $(CONFIG_BUILTIN_DTB_NAME))</div><div class='ctx'> </div><div class='del'>-dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(src)/%.dts,%.dtb, $(wildcard $(src)/*.dts))</div><div class='add'>+dtb-$(CONFIG_OF_ALL_DTBS) += $(patsubst $(src)/%.dts,%.dtb, $(wildcard $(src)/*.dts))</div><div class='head'>diff --git a/arch/nios2/include/asm/Kbuild b/arch/nios2/include/asm/Kbuild<br/>index 0d09829ed144..28004301c236 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/Kbuild</a></div><div class='hunk'>@@ -7,3 +7,4 @@ generic-y += kvm_para.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += spinlock.h</div><div class='ctx'> generic-y += user.h</div><div class='add'>+generic-y += text-patching.h</div><div class='head'>diff --git a/arch/nios2/include/asm/entry.h b/arch/nios2/include/asm/entry.h<br/>index bafb7b2ca59f..cb25ed56450a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/entry.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/entry.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/entry.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/entry.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #ifndef _ASM_NIOS2_ENTRY_H</div><div class='ctx'> #define _ASM_NIOS2_ENTRY_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/registers.h&gt;</div><div class='hunk'>@@ -117,5 +117,5 @@</div><div class='ctx'> 	addi	sp, sp, SWITCH_STACK_SIZE</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_NIOS2_ENTRY_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h<br/>index 746853ac7d8d..36e3550673b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/io.h</a></div><div class='hunk'>@@ -28,9 +28,6 @@</div><div class='ctx'> void __iomem *ioremap(unsigned long physaddr, unsigned long size);</div><div class='ctx'> void iounmap(void __iomem *addr);</div><div class='ctx'> </div><div class='del'>-/* Pages to physical address... */</div><div class='del'>-#define page_to_phys(page)	virt_to_phys(page_to_virt(page))</div><div class='del'>-</div><div class='ctx'> /* Macros used for converting between virtual and physical mappings. */</div><div class='ctx'> #define phys_to_virt(vaddr)	\</div><div class='ctx'> 	((void *)((unsigned long)(vaddr) | CONFIG_NIOS2_KERNEL_REGION_BASE))</div><div class='head'>diff --git a/arch/nios2/include/asm/page.h b/arch/nios2/include/asm/page.h<br/>index 0722f88e63cc..00a51623d38a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/page.h</a></div><div class='hunk'>@@ -18,12 +18,7 @@</div><div class='ctx'> #include &lt;linux/pfn.h&gt;</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * PAGE_SHIFT determines the page size</div><div class='del'>- */</div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE - 1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PAGE_OFFSET -- the first address of the first page of memory.</div><div class='hunk'>@@ -31,7 +26,7 @@</div><div class='ctx'> #define PAGE_OFFSET	\</div><div class='ctx'> 	(CONFIG_NIOS2_MEM_BASE + CONFIG_NIOS2_KERNEL_REGION_BASE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This gives the physical RAM offset.</div><div class='hunk'>@@ -95,6 +90,6 @@ extern struct page *mem_map;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_NIOS2_PAGE_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/pgalloc.h b/arch/nios2/include/asm/pgalloc.h<br/>index ce6bb8e74271..db122b093a8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -28,10 +28,7 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'> </div><div class='ctx'> extern pgd_t *pgd_alloc(struct mm_struct *mm);</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, addr)					\</div><div class='del'>-	do {								\</div><div class='del'>-		pagetable_pte_dtor(page_ptdesc(pte));			\</div><div class='del'>-		tlb_remove_page_ptdesc((tlb), (page_ptdesc(pte)));	\</div><div class='del'>-	} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, addr)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_NIOS2_PGALLOC_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/pgtable.h b/arch/nios2/include/asm/pgtable.h<br/>index eab87c6beacb..844dce55569f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/pgtable.h</a></div><div class='hunk'>@@ -221,12 +221,6 @@ static inline void pte_clear(struct mm_struct *mm,</div><div class='ctx'>  * Conversion functions: convert a page and protection to a page entry,</div><div class='ctx'>  * and a page entry and page directory to the page they refer to.</div><div class='ctx'>  */</div><div class='del'>-#define mk_pte(page, prot)	(pfn_pte(page_to_pfn(page), prot))</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='ctx'> #define pmd_phys(pmd)		virt_to_phys((void *)pmd_val(pmd))</div><div class='ctx'> #define pmd_pfn(pmd)		(pmd_phys(pmd) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> #define pmd_page(pmd)		(pfn_to_page(pmd_phys(pmd) &gt;&gt; PAGE_SHIFT))</div><div class='hunk'>@@ -265,7 +259,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)</div><div class='ctx'> #define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -291,4 +285,20 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> #define update_mmu_cache(vma, addr, ptep) \</div><div class='ctx'> 	update_mmu_cache_range(NULL, vma, addr, ptep, 1)</div><div class='ctx'> </div><div class='add'>+static inline int pte_same(pte_t pte_a, pte_t pte_b);</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS</div><div class='add'>+static inline int ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='add'>+					unsigned long address, pte_t *ptep,</div><div class='add'>+					pte_t entry, int dirty)</div><div class='add'>+{</div><div class='add'>+	if (!pte_same(*ptep, entry))</div><div class='add'>+		set_ptes(vma-&gt;vm_mm, address, ptep, entry, 1);</div><div class='add'>+	/*</div><div class='add'>+	 * update_mmu_cache will unconditionally execute, handling both</div><div class='add'>+	 * the case that the PTE changed and the spurious fault case.</div><div class='add'>+	 */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_NIOS2_PGTABLE_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/processor.h b/arch/nios2/include/asm/processor.h<br/>index eb44130364a9..d9521c3c2df9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/processor.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> /* Kuser helpers is mapped to this user space address */</div><div class='ctx'> #define KUSER_BASE		0x1000</div><div class='ctx'> #define KUSER_SIZE		(PAGE_SIZE)</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> # define TASK_SIZE		0x7FFF0000UL</div><div class='ctx'> # define TASK_UNMAPPED_BASE	(PAGE_ALIGN(TASK_SIZE / 3))</div><div class='hunk'>@@ -72,6 +72,6 @@ extern unsigned long __get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> #define cpu_relax()	barrier()</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_NIOS2_PROCESSOR_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/ptrace.h b/arch/nios2/include/asm/ptrace.h<br/>index 9da34c3022a2..96cbcd40c7ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/ptrace.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> /* This struct defines the way the registers are stored on the</div><div class='ctx'>    stack during a system call.  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> struct pt_regs {</div><div class='ctx'> 	unsigned long  r8;	/* r8-r15 Caller-saved GP registers */</div><div class='ctx'> 	unsigned long  r9;</div><div class='hunk'>@@ -78,5 +78,5 @@ extern void show_regs(struct pt_regs *);</div><div class='ctx'> </div><div class='ctx'> int do_syscall_trace_enter(void);</div><div class='ctx'> void do_syscall_trace_exit(void);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_NIOS2_PTRACE_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/registers.h b/arch/nios2/include/asm/registers.h<br/>index 95b67dd16f81..165dab26221f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/registers.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/registers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/registers.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/registers.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_NIOS2_REGISTERS_H</div><div class='ctx'> #define _ASM_NIOS2_REGISTERS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/cpuinfo.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> </div><div class='ctx'> /* tlbmisc register bits */</div><div class='ctx'> #define TLBMISC_PID_SHIFT	4</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define TLBMISC_PID_MASK	((1UL &lt;&lt; cpuinfo.tlb_pid_num_bits) - 1)</div><div class='ctx'> #endif</div><div class='ctx'> #define TLBMISC_WAY_MASK	0xf</div><div class='head'>diff --git a/arch/nios2/include/asm/setup.h b/arch/nios2/include/asm/setup.h<br/>index 908a1526d1bd..6d3f26a71cb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/setup.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> extern char exception_handler_hook[];</div><div class='hunk'>@@ -18,6 +18,6 @@ extern char fast_handler_end[];</div><div class='ctx'> extern void pagetable_init(void);</div><div class='ctx'> </div><div class='ctx'> #endif/* __KERNEL__ */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_NIOS2_SETUP_H */</div><div class='head'>diff --git a/arch/nios2/include/asm/syscall.h b/arch/nios2/include/asm/syscall.h<br/>index fff52205fb65..8e3eb1d689bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/syscall.h</a></div><div class='hunk'>@@ -15,6 +15,11 @@ static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> 	return regs-&gt;r2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task, struct pt_regs *regs, int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;r2 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_rollback(struct task_struct *task,</div><div class='ctx'> 				struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -58,6 +63,17 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	*args   = regs-&gt;r9;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+	struct pt_regs *regs, const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;r4 = *args++;</div><div class='add'>+	regs-&gt;r5 = *args++;</div><div class='add'>+	regs-&gt;r6 = *args++;</div><div class='add'>+	regs-&gt;r7 = *args++;</div><div class='add'>+	regs-&gt;r8 = *args++;</div><div class='add'>+	regs-&gt;r9 = *args;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	return AUDIT_ARCH_NIOS2;</div><div class='head'>diff --git a/arch/nios2/include/asm/syscalls.h b/arch/nios2/include/asm/syscalls.h<br/>index b4d4ed3bf9c8..0e214b0a0ac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/syscalls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/syscalls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/syscalls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/syscalls.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> int sys_cacheflush(unsigned long addr, unsigned long len,</div><div class='ctx'> 				unsigned int op);</div><div class='add'>+asmlinkage long __sys_clone3(struct clone_args __user *uargs, size_t size);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/syscalls.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/nios2/include/asm/thread_info.h b/arch/nios2/include/asm/thread_info.h<br/>index 5abac9893b32..83df79286d62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/thread_info.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #define THREAD_SIZE_ORDER	1</div><div class='ctx'> #define THREAD_SIZE		8192 /* 2 * PAGE_SIZE */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * low level task data that entry.S needs immediate access to</div><div class='hunk'>@@ -61,7 +61,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> </div><div class='ctx'> 	return (struct thread_info *)(sp &amp; ~(THREAD_SIZE - 1));</div><div class='ctx'> }</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * thread information flags</div><div class='head'>diff --git a/arch/nios2/include/asm/traps.h b/arch/nios2/include/asm/traps.h<br/>index afd77bef01c6..133a3dedbc3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/traps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/traps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/traps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/traps.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #define TRAP_ID_SYSCALL		0</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> void _exception(int signo, struct pt_regs *regs, int code, unsigned long addr);</div><div class='ctx'> void do_page_fault(struct pt_regs *regs, unsigned long cause,</div><div class='ctx'> 		   unsigned long address);</div><div class='head'>diff --git a/arch/nios2/include/asm/unistd.h b/arch/nios2/include/asm/unistd.h<br/>index 1146e56473c5..213f6de3cf7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/unistd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/asm/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/asm/unistd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/asm/unistd.h</a></div><div class='hunk'>@@ -7,6 +7,4 @@</div><div class='ctx'> #define __ARCH_WANT_STAT64</div><div class='ctx'> #define __ARCH_WANT_SET_GET_RLIMIT</div><div class='ctx'> </div><div class='del'>-#define __ARCH_BROKEN_SYS_CLONE3</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/nios2/include/uapi/asm/ptrace.h b/arch/nios2/include/uapi/asm/ptrace.h<br/>index 2b91dbe5bcfe..1298db9f0fc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #ifndef _UAPI_ASM_NIOS2_PTRACE_H</div><div class='ctx'> #define _UAPI_ASM_NIOS2_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -80,5 +80,5 @@ struct user_pt_regs {</div><div class='ctx'> 	__u32		regs[49];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _UAPI_ASM_NIOS2_PTRACE_H */</div><div class='head'>diff --git a/arch/nios2/kernel/Makefile b/arch/nios2/kernel/Makefile<br/>index 78a913181fa1..4dce965a7b73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for the nios2 linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y	+= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	+= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	+= head.o</div><div class='ctx'> obj-y	+= cpuinfo.o</div><div class='head'>diff --git a/arch/nios2/kernel/asm-offsets.c b/arch/nios2/kernel/asm-offsets.c<br/>index e3d9b7b6fb48..88190b503ce5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2011 Tobias Klauser &lt;tklauser@distanz.ch&gt;</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='head'>diff --git a/arch/nios2/kernel/cpuinfo.c b/arch/nios2/kernel/cpuinfo.c<br/>index 338849c430a5..55882feb6249 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/cpuinfo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/cpuinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/cpuinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/cpuinfo.c</a></div><div class='hunk'>@@ -46,10 +46,7 @@ void __init setup_cpuinfo(void)</div><div class='ctx'> 	cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");</div><div class='ctx'> </div><div class='ctx'> 	str = of_get_property(cpu, "altr,implementation", &amp;len);</div><div class='del'>-	if (str)</div><div class='del'>-		strscpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));</div><div class='del'>-	else</div><div class='del'>-		strcpy(cpuinfo.cpu_impl, "&lt;unknown&gt;");</div><div class='add'>+	strscpy(cpuinfo.cpu_impl, str ?: "&lt;unknown&gt;");</div><div class='ctx'> </div><div class='ctx'> 	cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div");</div><div class='ctx'> 	cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul");</div><div class='hunk'>@@ -143,11 +140,11 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 		   " DIV:\t\t%s\n"</div><div class='ctx'> 		   " BMX:\t\t%s\n"</div><div class='ctx'> 		   " CDX:\t\t%s\n",</div><div class='del'>-		   cpuinfo.has_mul ? "yes" : "no",</div><div class='del'>-		   cpuinfo.has_mulx ? "yes" : "no",</div><div class='del'>-		   cpuinfo.has_div ? "yes" : "no",</div><div class='del'>-		   cpuinfo.has_bmx ? "yes" : "no",</div><div class='del'>-		   cpuinfo.has_cdx ? "yes" : "no");</div><div class='add'>+		   str_yes_no(cpuinfo.has_mul),</div><div class='add'>+		   str_yes_no(cpuinfo.has_mulx),</div><div class='add'>+		   str_yes_no(cpuinfo.has_div),</div><div class='add'>+		   str_yes_no(cpuinfo.has_bmx),</div><div class='add'>+		   str_yes_no(cpuinfo.has_cdx));</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m,</div><div class='ctx'> 		   "Icache:\t\t%ukB, line length: %u\n",</div><div class='head'>diff --git a/arch/nios2/kernel/entry.S b/arch/nios2/kernel/entry.S<br/>index 99f0a65e6234..dd40dfd908e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/entry.S</a></div><div class='hunk'>@@ -403,6 +403,12 @@ ENTRY(sys_clone)</div><div class='ctx'> 	addi    sp, sp, 4</div><div class='ctx'> 	RESTORE_SWITCH_STACK</div><div class='ctx'> 	ret</div><div class='add'>+/* long syscall(SYS_clone3, struct clone_args *cl_args, size_t size); */</div><div class='add'>+ENTRY(__sys_clone3)</div><div class='add'>+	SAVE_SWITCH_STACK</div><div class='add'>+	call	sys_clone3</div><div class='add'>+	RESTORE_SWITCH_STACK</div><div class='add'>+	ret</div><div class='ctx'> </div><div class='ctx'> ENTRY(sys_rt_sigreturn)</div><div class='ctx'> 	SAVE_SWITCH_STACK</div><div class='head'>diff --git a/arch/nios2/kernel/irq.c b/arch/nios2/kernel/irq.c<br/>index 6b7890e5f7af..73568d8e21e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/irq.c</a></div><div class='hunk'>@@ -69,10 +69,11 @@ void __init init_IRQ(void)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!node);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &amp;irq_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+					  NIOS2_CPU_NR_IRQS, &amp;irq_ops, NULL);</div><div class='ctx'> 	BUG_ON(!domain);</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(domain);</div><div class='add'>+	irq_set_default_domain(domain);</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> 	/* Load the initial ienable value */</div><div class='ctx'> 	ienable = RDCTL(CTL_IENABLE);</div><div class='head'>diff --git a/arch/nios2/kernel/process.c b/arch/nios2/kernel/process.c<br/>index f84021303f6a..151404139085 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/process.c</a></div><div class='hunk'>@@ -101,7 +101,7 @@ void flush_thread(void)</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *childregs = task_pt_regs(p);</div><div class='head'>diff --git a/arch/nios2/kernel/prom.c b/arch/nios2/kernel/prom.c<br/>index 9a8393e6b4a8..4f8c14da6490 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/prom.c</a></div><div class='hunk'>@@ -27,15 +27,15 @@ void __init early_init_devtree(void *params)</div><div class='ctx'> 	if (be32_to_cpup((__be32 *)CONFIG_NIOS2_DTB_PHYS_ADDR) ==</div><div class='ctx'> 		 OF_DT_HEADER) {</div><div class='ctx'> 		params = (void *)CONFIG_NIOS2_DTB_PHYS_ADDR;</div><div class='del'>-		early_init_dt_scan(params);</div><div class='add'>+		early_init_dt_scan(params, __pa(params));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_NIOS2_DTB_SOURCE_BOOL</div><div class='add'>+#ifdef CONFIG_BUILTIN_DTB</div><div class='ctx'> 	if (be32_to_cpu((__be32) *dtb) == OF_DT_HEADER)</div><div class='ctx'> 		params = (void *)__dtb_start;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	early_init_dt_scan(params);</div><div class='add'>+	early_init_dt_scan(params, __pa(params));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/nios2/kernel/ptrace.c b/arch/nios2/kernel/ptrace.c<br/>index 9221c15972e6..c88f5cabc0c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/ptrace.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ enum nios2_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset nios2_regsets[] = {</div><div class='ctx'> 	[REGSET_GENERAL] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 		.n = NUM_PTRACE_REG,</div><div class='ctx'> 		.size = sizeof(unsigned long),</div><div class='ctx'> 		.align = sizeof(unsigned long),</div><div class='head'>diff --git a/arch/nios2/kernel/setup.c b/arch/nios2/kernel/setup.c<br/>index da122a5fa43b..f43f01c4ab93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/setup.c</a></div><div class='hunk'>@@ -142,6 +142,20 @@ static void __init find_limits(unsigned long *min, unsigned long *max_low,</div><div class='ctx'> 	*max_high = PFN_DOWN(memblock_end_of_DRAM());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init adjust_lowmem_bounds(void)</div><div class='add'>+{</div><div class='add'>+	phys_addr_t block_start, block_end;</div><div class='add'>+	u64 i;</div><div class='add'>+	phys_addr_t memblock_limit = 0;</div><div class='add'>+</div><div class='add'>+	for_each_mem_range(i, &amp;block_start, &amp;block_end) {</div><div class='add'>+		if (block_end &gt; memblock_limit)</div><div class='add'>+			memblock_limit = block_end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memblock_set_current_limit(memblock_limit);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init setup_arch(char **cmdline_p)</div><div class='ctx'> {</div><div class='ctx'> 	console_verbose();</div><div class='hunk'>@@ -149,14 +163,16 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	memory_start = memblock_start_of_DRAM();</div><div class='ctx'> 	memory_end = memblock_end_of_DRAM();</div><div class='ctx'> </div><div class='add'>+	pr_debug("%s: start=%lx, end=%lx\n", __func__, memory_start, memory_end);</div><div class='add'>+</div><div class='ctx'> 	setup_initial_init_mm(_stext, _etext, _edata, _end);</div><div class='ctx'> 	init_task.thread.kregs = &amp;fake_regs;</div><div class='ctx'> </div><div class='ctx'> 	/* Keep a copy of command line */</div><div class='ctx'> 	*cmdline_p = boot_command_line;</div><div class='ctx'> </div><div class='add'>+	adjust_lowmem_bounds();</div><div class='ctx'> 	find_limits(&amp;min_low_pfn, &amp;max_low_pfn, &amp;max_pfn);</div><div class='del'>-	max_mapnr = max_low_pfn;</div><div class='ctx'> </div><div class='ctx'> 	memblock_reserve(__pa_symbol(_stext), _end - _stext);</div><div class='ctx'> #ifdef CONFIG_BLK_DEV_INITRD</div><div class='head'>diff --git a/arch/nios2/kernel/syscall_table.c b/arch/nios2/kernel/syscall_table.c<br/>index 434694067d8f..c99818aac9e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/syscall_table.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/kernel/syscall_table.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/kernel/syscall_table.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/kernel/syscall_table.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #define __SYSCALL_WITH_COMPAT(nr, native, compat)        __SYSCALL(nr, native)</div><div class='ctx'> </div><div class='ctx'> #define sys_mmap2 sys_mmap_pgoff</div><div class='add'>+#define sys_clone3 __sys_clone3</div><div class='ctx'> </div><div class='ctx'> void *sys_call_table[__NR_syscalls] = {</div><div class='ctx'> 	[0 ... __NR_syscalls-1] = sys_ni_syscall,</div><div class='head'>diff --git a/arch/nios2/mm/cacheflush.c b/arch/nios2/mm/cacheflush.c<br/>index 0ee9c5f02e08..8321182eb927 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/cacheflush.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/cacheflush.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/cacheflush.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/mm/cacheflush.c</a></div><div class='hunk'>@@ -187,7 +187,7 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> </div><div class='ctx'> 	/* Flush this page if there are aliases. */</div><div class='ctx'> 	if (mapping &amp;&amp; !mapping_mapped(mapping)) {</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		__flush_dcache_folio(folio);</div><div class='ctx'> 		if (mapping) {</div><div class='hunk'>@@ -195,7 +195,7 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> 			flush_aliases(mapping, folio);</div><div class='ctx'> 			flush_icache_range(start, start + folio_size(folio));</div><div class='ctx'> 		}</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_dcache_folio);</div><div class='hunk'>@@ -227,7 +227,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	folio = page_folio(pfn_to_page(pfn));</div><div class='del'>-	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (!test_and_set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		__flush_dcache_folio(folio);</div><div class='ctx'> </div><div class='ctx'> 	mapping = folio_flush_mapping(folio);</div><div class='head'>diff --git a/arch/nios2/mm/init.c b/arch/nios2/mm/init.c<br/>index a2278485de19..94efa3de3933 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/mm/init.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ void __init paging_init(void)</div><div class='ctx'> 	pagetable_init();</div><div class='ctx'> 	pgd_current = swapper_pg_dir;</div><div class='ctx'> </div><div class='del'>-	max_zone_pfn[ZONE_NORMAL] = max_mapnr;</div><div class='add'>+	max_zone_pfn[ZONE_NORMAL] = max_low_pfn;</div><div class='ctx'> </div><div class='ctx'> 	/* pass the memory from the bootmem allocator to the main allocator */</div><div class='ctx'> 	free_area_init(max_zone_pfn);</div><div class='hunk'>@@ -60,20 +60,6 @@ void __init paging_init(void)</div><div class='ctx'> 			(unsigned long)empty_zero_page + PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init mem_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long end_mem   = memory_end; /* this must not include</div><div class='del'>-						kernel stack at top */</div><div class='del'>-</div><div class='del'>-	pr_debug("mem_init: start=%lx, end=%lx\n", memory_start, memory_end);</div><div class='del'>-</div><div class='del'>-	end_mem &amp;= PAGE_MASK;</div><div class='del'>-	high_memory = __va(end_mem);</div><div class='del'>-</div><div class='del'>-	/* this will put all memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init mmu_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	flush_tlb_all();</div><div class='head'>diff --git a/arch/nios2/mm/pgtable.c b/arch/nios2/mm/pgtable.c<br/>index 7c76e8a7447a..6470ed378782 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/mm/pgtable.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpuinfo.h&gt;</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* pteaddr:</div><div class='ctx'>  *   ptbase | vpn* | zero</div><div class='hunk'>@@ -54,7 +55,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *ret, *init;</div><div class='ctx'> </div><div class='del'>-	ret = (pgd_t *) __get_free_page(GFP_KERNEL);</div><div class='add'>+	ret = __pgd_alloc(mm, 0);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		init = pgd_offset(&amp;init_mm, 0UL);</div><div class='ctx'> 		pgd_init(ret);</div><div class='head'>diff --git a/arch/nios2/mm/tlb.c b/arch/nios2/mm/tlb.c<br/>index f90ac35f05f3..a9cbe20f9e79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/tlb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/mm/tlb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/mm/tlb.c</a></div><div class='hunk'>@@ -144,10 +144,11 @@ static void flush_tlb_one(unsigned long addr)</div><div class='ctx'> 		if (((pteaddr &gt;&gt; 2) &amp; 0xfffff) != (addr &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		tlbmisc = RDCTL(CTL_TLBMISC);</div><div class='ctx'> 		pr_debug("Flush entry by writing way=%dl pid=%ld\n",</div><div class='del'>-			 way, (pid_misc &gt;&gt; TLBMISC_PID_SHIFT));</div><div class='add'>+			 way, ((tlbmisc &gt;&gt; TLBMISC_PID_SHIFT) &amp; TLBMISC_PID_MASK));</div><div class='ctx'> </div><div class='del'>-		tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT);</div><div class='add'>+		tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) | (tlbmisc &amp; TLBMISC_PID);</div><div class='ctx'> 		WRCTL(CTL_TLBMISC, tlbmisc);</div><div class='ctx'> 		WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));</div><div class='ctx'> 		WRCTL(CTL_TLBACC, 0);</div><div class='hunk'>@@ -237,7 +238,8 @@ void flush_tlb_pid(unsigned long mmu_pid)</div><div class='ctx'> 			if (pid != mmu_pid)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT);</div><div class='add'>+			tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) |</div><div class='add'>+				  (pid &lt;&lt; TLBMISC_PID_SHIFT);</div><div class='ctx'> 			WRCTL(CTL_TLBMISC, tlbmisc);</div><div class='ctx'> 			WRCTL(CTL_TLBACC, 0);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -272,15 +274,17 @@ void flush_tlb_all(void)</div><div class='ctx'> 	/* remember pid/way until we return */</div><div class='ctx'> 	get_misc_and_pid(&amp;org_misc, &amp;pid_misc);</div><div class='ctx'> </div><div class='del'>-	/* Start at way 0, way is auto-incremented after each TLBACC write */</div><div class='del'>-	WRCTL(CTL_TLBMISC, TLBMISC_WE);</div><div class='del'>-</div><div class='ctx'> 	/* Map each TLB entry to physcal address 0 with no-access and a</div><div class='ctx'> 	   bad ptbase */</div><div class='ctx'> 	for (line = 0; line &lt; cpuinfo.tlb_num_lines; line++) {</div><div class='ctx'> 		WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));</div><div class='del'>-		for (way = 0; way &lt; cpuinfo.tlb_num_ways; way++)</div><div class='add'>+		for (way = 0; way &lt; cpuinfo.tlb_num_ways; way++) {</div><div class='add'>+			// Code such as replace_tlb_one_pid assumes that no duplicate entries exist</div><div class='add'>+			// for a single address across ways, so also use way as a dummy PID</div><div class='add'>+			WRCTL(CTL_TLBMISC, TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) |</div><div class='add'>+					   (way &lt;&lt; TLBMISC_PID_SHIFT));</div><div class='ctx'> 			WRCTL(CTL_TLBACC, 0);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		addr += PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/nios2/platform/Kconfig.platform b/arch/nios2/platform/Kconfig.platform<br/>index e849daff6fd1..c75cadd92388 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/nios2/platform/Kconfig.platform?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/nios2/platform/Kconfig.platform</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/nios2/platform/Kconfig.platform?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/nios2/platform/Kconfig.platform</a></div><div class='hunk'>@@ -35,19 +35,20 @@ config NIOS2_DTB_PHYS_ADDR</div><div class='ctx'> 	help</div><div class='ctx'> 	  Physical address of a dtb blob.</div><div class='ctx'> </div><div class='del'>-config NIOS2_DTB_SOURCE_BOOL</div><div class='add'>+config BUILTIN_DTB</div><div class='ctx'> 	bool "Compile and link device tree into kernel image"</div><div class='ctx'> 	depends on !COMPILE_TEST</div><div class='add'>+	select GENERIC_BUILTIN_DTB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This allows you to specify a dts (device tree source) file</div><div class='ctx'> 	  which will be compiled and linked into the kernel image.</div><div class='ctx'> </div><div class='del'>-config NIOS2_DTB_SOURCE</div><div class='del'>-	string "Device tree source file"</div><div class='del'>-	depends on NIOS2_DTB_SOURCE_BOOL</div><div class='add'>+config BUILTIN_DTB_NAME</div><div class='add'>+	string "Built-in device tree name"</div><div class='add'>+	depends on BUILTIN_DTB</div><div class='ctx'> 	default ""</div><div class='ctx'> 	help</div><div class='del'>-	  Absolute path to the device tree source (dts) file describing your</div><div class='add'>+	  Relative path to the device tree without suffix describing your</div><div class='ctx'> 	  system.</div><div class='ctx'> </div><div class='ctx'> comment "Nios II instructions"</div><div class='head'>diff --git a/arch/openrisc/Kbuild b/arch/openrisc/Kbuild<br/>index b0b0f2b03f87..70bdb24ff204 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/Kbuild</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> obj-y += lib/ kernel/ mm/</div><div class='del'>-obj-y += boot/dts/</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='ctx'> subdir- += boot</div><div class='head'>diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig<br/>index 69c0258700b2..9156635dd264 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/Kconfig</a></div><div class='hunk'>@@ -10,6 +10,7 @@ config OPENRISC</div><div class='ctx'> 	select ARCH_HAS_DMA_SET_UNCACHED</div><div class='ctx'> 	select ARCH_HAS_DMA_CLEAR_UNCACHED</div><div class='ctx'> 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE</div><div class='add'>+	select GENERIC_BUILTIN_DTB</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select OF</div><div class='ctx'> 	select OF_EARLY_FLATTREE</div><div class='hunk'>@@ -23,9 +24,13 @@ config OPENRISC</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='ctx'> 	select GENERIC_IOREMAP</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='add'>+	select HAVE_ARCH_JUMP_LABEL</div><div class='add'>+	select HAVE_ARCH_JUMP_LABEL_RELATIVE</div><div class='ctx'> 	select HAVE_PCI</div><div class='ctx'> 	select HAVE_UID16</div><div class='ctx'> 	select HAVE_PAGE_SIZE_8KB</div><div class='add'>+	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='add'>+	select HAVE_RSEQ</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS_BROADCAST</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='hunk'>@@ -65,6 +70,9 @@ config STACKTRACE_SUPPORT</div><div class='ctx'> config LOCKDEP_SUPPORT</div><div class='ctx'> 	def_bool  y</div><div class='ctx'> </div><div class='add'>+config FIX_EARLYCON_MEM</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> menu "Processor type and features"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='hunk'>@@ -89,7 +97,7 @@ config DCACHE_WRITETHROUGH</div><div class='ctx'> </div><div class='ctx'> 	  If unsure say N here</div><div class='ctx'> </div><div class='del'>-config OPENRISC_BUILTIN_DTB</div><div class='add'>+config BUILTIN_DTB_NAME</div><div class='ctx'> 	string "Builtin DTB"</div><div class='ctx'> 	default ""</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/boot/dts/Makefile b/arch/openrisc/boot/dts/Makefile<br/>index 13db5a2aab52..3a66e0ef3985 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-obj-y += $(addsuffix .dtb.o, $(CONFIG_OPENRISC_BUILTIN_DTB))</div><div class='add'>+dtb-y += $(addsuffix .dtb, $(CONFIG_BUILTIN_DTB_NAME))</div><div class='ctx'> </div><div class='ctx'> #DTC_FLAGS ?= -p 1024</div><div class='head'>diff --git a/arch/openrisc/configs/or1klitex_defconfig b/arch/openrisc/configs/or1klitex_defconfig<br/>index 466f31a091be..3e849d25838a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/or1klitex_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/or1klitex_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/or1klitex_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/configs/or1klitex_defconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_SGETMASK_SYSCALL=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="or1klitex"</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='ctx'> CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y</div><div class='ctx'> CONFIG_NET=y</div><div class='head'>diff --git a/arch/openrisc/configs/or1ksim_defconfig b/arch/openrisc/configs/or1ksim_defconfig<br/>index 0116e465238f..769705ac24d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/or1ksim_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/or1ksim_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/or1ksim_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/configs/or1ksim_defconfig</a></div><div class='hunk'>@@ -3,26 +3,23 @@ CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_RD_GZIP is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_KALLSYMS is not set</div><div class='ctx'> # CONFIG_EPOLL is not set</div><div class='ctx'> # CONFIG_TIMERFD is not set</div><div class='ctx'> # CONFIG_EVENTFD is not set</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='del'>-# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='del'>-# CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_SLUB=y</div><div class='del'>-CONFIG_SLUB_TINY=y</div><div class='add'>+# CONFIG_KALLSYMS is not set</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="or1ksim"</div><div class='add'>+CONFIG_HZ_100=y</div><div class='add'>+CONFIG_JUMP_LABEL=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLOCK is not set</div><div class='del'>-CONFIG_OPENRISC_BUILTIN_DTB="or1ksim"</div><div class='del'>-CONFIG_HZ_100=y</div><div class='add'>+CONFIG_SLUB_TINY=y</div><div class='add'>+# CONFIG_COMPAT_BRK is not set</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='ctx'> CONFIG_INET=y</div><div class='del'>-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='del'>-# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='del'>-# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='ctx'> # CONFIG_INET_DIAG is not set</div><div class='ctx'> CONFIG_TCP_CONG_ADVANCED=y</div><div class='ctx'> # CONFIG_TCP_CONG_BIC is not set</div><div class='hunk'>@@ -35,7 +32,6 @@ CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> # CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='del'>-CONFIG_PROC_DEVICETREE=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_ETHOC=y</div><div class='ctx'> CONFIG_MICREL_PHY=y</div><div class='hunk'>@@ -53,4 +49,3 @@ CONFIG_SERIAL_OF_PLATFORM=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='del'>-# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='head'>diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/configs/simple_smp_defconfig<br/>index b990cb6c9309..6008e824d31c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/simple_smp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/simple_smp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/simple_smp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/configs/simple_smp_defconfig</a></div><div class='hunk'>@@ -20,7 +20,7 @@ CONFIG_SLUB=y</div><div class='ctx'> CONFIG_SLUB_TINY=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> # CONFIG_BLOCK is not set</div><div class='del'>-CONFIG_OPENRISC_BUILTIN_DTB="simple_smp"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="simple_smp"</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='ctx'> CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y</div><div class='head'>diff --git a/arch/openrisc/configs/virt_defconfig b/arch/openrisc/configs/virt_defconfig<br/>index c1b69166c500..a93a3e1e4f87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/virt_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/configs/virt_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/configs/virt_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/configs/virt_defconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ CONFIG_NR_CPUS=8</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_HZ_100=y</div><div class='ctx'> # CONFIG_OPENRISC_NO_SPR_SR_DSX is not set</div><div class='add'>+CONFIG_JUMP_LABEL=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='hunk'>@@ -55,7 +56,6 @@ CONFIG_DRM=y</div><div class='ctx'> # CONFIG_DRM_FBDEV_EMULATION is not set</div><div class='ctx'> CONFIG_DRM_VIRTIO_GPU=y</div><div class='ctx'> CONFIG_FB=y</div><div class='del'>-CONFIG_FIRMWARE_EDID=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='head'>diff --git a/arch/openrisc/include/asm/bitops/__ffs.h b/arch/openrisc/include/asm/bitops/__ffs.h<br/>index 1e224b616fdf..4827b66530b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/__ffs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/__ffs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/__ffs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/bitops/__ffs.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OPENRISC_HAVE_INST_FF1</div><div class='ctx'> </div><div class='del'>-static inline unsigned long __ffs(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __ffs(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/bitops/__fls.h b/arch/openrisc/include/asm/bitops/__fls.h<br/>index 9658446ad141..637cc76fe4b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/__fls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/__fls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/__fls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/bitops/__fls.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OPENRISC_HAVE_INST_FL1</div><div class='ctx'> </div><div class='del'>-static inline unsigned long __fls(unsigned long x)</div><div class='add'>+static inline __attribute_const__ unsigned long __fls(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/bitops/ffs.h b/arch/openrisc/include/asm/bitops/ffs.h<br/>index b4c835d6bc84..536a60ab9cc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/ffs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/ffs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/ffs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/bitops/ffs.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OPENRISC_HAVE_INST_FF1</div><div class='ctx'> </div><div class='del'>-static inline int ffs(int x)</div><div class='add'>+static inline __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/bitops/fls.h b/arch/openrisc/include/asm/bitops/fls.h<br/>index 6b77f6556fb9..77da7639bb3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/fls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/bitops/fls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/bitops/fls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/bitops/fls.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OPENRISC_HAVE_INST_FL1</div><div class='ctx'> </div><div class='del'>-static inline int fls(unsigned int x)</div><div class='add'>+static inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/cacheflush.h b/arch/openrisc/include/asm/cacheflush.h<br/>index 984c331ff5f4..cd8f971c0fec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/cacheflush.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/cacheflush.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'>  */</div><div class='ctx'> extern void local_dcache_page_flush(struct page *page);</div><div class='ctx'> extern void local_icache_page_inv(struct page *page);</div><div class='add'>+extern void local_dcache_range_flush(unsigned long start, unsigned long end);</div><div class='add'>+extern void local_dcache_range_inv(unsigned long start, unsigned long end);</div><div class='add'>+extern void local_icache_range_inv(unsigned long start, unsigned long end);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Data cache flushing always happen on the local cpu. Instruction cache</div><div class='hunk'>@@ -39,6 +42,20 @@ extern void smp_icache_page_inv(struct page *page);</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Even if the actual block size is larger than L1_CACHE_BYTES, paddr</div><div class='add'>+ * can be incremented by L1_CACHE_BYTES. When paddr is written to the</div><div class='add'>+ * invalidate register, the entire cache line encompassing this address</div><div class='add'>+ * is invalidated. Each subsequent reference to the same cache line will</div><div class='add'>+ * not affect the invalidation process.</div><div class='add'>+ */</div><div class='add'>+#define local_dcache_block_flush(addr) \</div><div class='add'>+	local_dcache_range_flush(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+#define local_dcache_block_inv(addr) \</div><div class='add'>+	local_dcache_range_inv(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+#define local_icache_block_inv(addr) \</div><div class='add'>+	local_icache_range_inv(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Synchronizes caches. Whenever a cpu writes executable code to memory, this</div><div class='ctx'>  * should be called to make sure the processor sees the newly written code.</div><div class='ctx'>  */</div><div class='hunk'>@@ -58,7 +75,7 @@ static inline void sync_icache_dcache(struct page *page)</div><div class='ctx'> </div><div class='ctx'> static inline void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	clear_bit(PG_dc_clean, &amp;folio-&gt;flags);</div><div class='add'>+	clear_bit(PG_dc_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> #define flush_dcache_folio flush_dcache_folio</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/cpuinfo.h b/arch/openrisc/include/asm/cpuinfo.h<br/>index 5e4744153d0e..3cfc4cf0b019 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/cpuinfo.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/cpuinfo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/cpuinfo.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/cpuinfo.h</a></div><div class='hunk'>@@ -15,16 +15,21 @@</div><div class='ctx'> #ifndef __ASM_OPENRISC_CPUINFO_H</div><div class='ctx'> #define __ASM_OPENRISC_CPUINFO_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/spr.h&gt;</div><div class='add'>+#include &lt;asm/spr_defs.h&gt;</div><div class='add'>+</div><div class='add'>+struct cache_desc {</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 sets;</div><div class='add'>+	u32 block_size;</div><div class='add'>+	u32 ways;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct cpuinfo_or1k {</div><div class='ctx'> 	u32 clock_frequency;</div><div class='ctx'> </div><div class='del'>-	u32 icache_size;</div><div class='del'>-	u32 icache_block_size;</div><div class='del'>-	u32 icache_ways;</div><div class='del'>-</div><div class='del'>-	u32 dcache_size;</div><div class='del'>-	u32 dcache_block_size;</div><div class='del'>-	u32 dcache_ways;</div><div class='add'>+	struct cache_desc icache;</div><div class='add'>+	struct cache_desc dcache;</div><div class='ctx'> </div><div class='ctx'> 	u16 coreid;</div><div class='ctx'> };</div><div class='hunk'>@@ -32,4 +37,9 @@ struct cpuinfo_or1k {</div><div class='ctx'> extern struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];</div><div class='ctx'> extern void setup_cpuinfo(void);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Check if the cache component exists.</div><div class='add'>+ */</div><div class='add'>+extern bool cpu_cache_is_present(const unsigned int cache_type);</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_OPENRISC_CPUINFO_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/fixmap.h b/arch/openrisc/include/asm/fixmap.h<br/>index ecdb98a5839f..74000215064d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/fixmap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/fixmap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/fixmap.h</a></div><div class='hunk'>@@ -26,29 +26,19 @@</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * On OpenRISC we use these special fixed_addresses for doing ioremap</div><div class='del'>- * early in the boot process before memory initialization is complete.</div><div class='del'>- * This is used, in particular, by the early serial console code.</div><div class='del'>- *</div><div class='del'>- * It's not really 'fixmap', per se, but fits loosely into the same</div><div class='del'>- * paradigm.</div><div class='del'>- */</div><div class='ctx'> enum fixed_addresses {</div><div class='del'>-	/*</div><div class='del'>-	 * FIX_IOREMAP entries are useful for mapping physical address</div><div class='del'>-	 * space before ioremap() is useable, e.g. really early in boot</div><div class='del'>-	 * before kmalloc() is working.</div><div class='del'>-	 */</div><div class='del'>-#define FIX_N_IOREMAPS  32</div><div class='del'>-	FIX_IOREMAP_BEGIN,</div><div class='del'>-	FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS - 1,</div><div class='add'>+	FIX_EARLYCON_MEM_BASE,</div><div class='add'>+	FIX_TEXT_POKE0,</div><div class='ctx'> 	__end_of_fixed_addresses</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define FIXADDR_SIZE		(__end_of_fixed_addresses &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> /* FIXADDR_BOTTOM might be a better name here... */</div><div class='ctx'> #define FIXADDR_START		(FIXADDR_TOP - FIXADDR_SIZE)</div><div class='add'>+#define FIXMAP_PAGE_IO		PAGE_KERNEL_NOCACHE</div><div class='add'>+</div><div class='add'>+extern void __set_fixmap(enum fixed_addresses idx,</div><div class='add'>+			 phys_addr_t phys, pgprot_t flags);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/fixmap.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/insn-def.h b/arch/openrisc/include/asm/insn-def.h<br/>new file mode 100644<br/>index 000000000000..1e0c028a5b95<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/insn-def.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/insn-def.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Chen Miao</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_OPENRISC_INSN_DEF_H</div><div class='add'>+#define __ASM_OPENRISC_INSN_DEF_H</div><div class='add'>+</div><div class='add'>+/* or1k instructions are always 32 bits. */</div><div class='add'>+#define	OPENRISC_INSN_SIZE		4</div><div class='add'>+</div><div class='add'>+/* or1k nop instruction code */</div><div class='add'>+#define OPENRISC_INSN_NOP     0x15000000U</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_OPENRISC_INSN_DEF_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/jump_label.h b/arch/openrisc/include/asm/jump_label.h<br/>new file mode 100644<br/>index 000000000000..3ec0f4e19f9c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/jump_label.h</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Chen Miao</div><div class='add'>+ *</div><div class='add'>+ * Based on arch/arm/include/asm/jump_label.h</div><div class='add'>+ */</div><div class='add'>+#ifndef __ASM_OPENRISC_JUMP_LABEL_H</div><div class='add'>+#define __ASM_OPENRISC_JUMP_LABEL_H</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/insn-def.h&gt;</div><div class='add'>+</div><div class='add'>+#define HAVE_JUMP_LABEL_BATCH</div><div class='add'>+</div><div class='add'>+#define JUMP_LABEL_NOP_SIZE OPENRISC_INSN_SIZE</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * JUMP_TABLE_ENTRY - Create a jump table entry</div><div class='add'>+ * @key: Jump key identifier (typically a symbol address)</div><div class='add'>+ * @label: Target label address</div><div class='add'>+ *</div><div class='add'>+ * This macro creates a jump table entry in the dedicated kernel section (__jump_table).</div><div class='add'>+ * Each entry contains the following information:</div><div class='add'>+ * 		Offset from current instruction to jump instruction (1b - .)</div><div class='add'>+ * 		Offset from current instruction to target label (label - .)</div><div class='add'>+ * 		Offset from current instruction to key identifier (key - .)</div><div class='add'>+ */</div><div class='add'>+#define JUMP_TABLE_ENTRY(key, label)			\</div><div class='add'>+	".pushsection	__jump_table, \"aw\"	\n\t"	\</div><div class='add'>+	".align 	4 			\n\t"	\</div><div class='add'>+	".long 		1b - ., " label " - .	\n\t"	\</div><div class='add'>+	".long 		" key " - . 		\n\t"	\</div><div class='add'>+	".popsection				\n\t"</div><div class='add'>+</div><div class='add'>+#define ARCH_STATIC_BRANCH_ASM(key, label)		\</div><div class='add'>+	".align		4			\n\t"	\</div><div class='add'>+	"1: l.nop				\n\t"	\</div><div class='add'>+	"    l.nop				\n\t"	\</div><div class='add'>+	JUMP_TABLE_ENTRY(key, label)</div><div class='add'>+</div><div class='add'>+static __always_inline bool arch_static_branch(struct static_key *const key,</div><div class='add'>+					       const bool branch)</div><div class='add'>+{</div><div class='add'>+	asm goto (ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]")</div><div class='add'>+		  ::"i"(&amp;((char *)key)[branch])::l_yes);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+l_yes:</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ARCH_STATIC_BRANCH_JUMP_ASM(key, label)		\</div><div class='add'>+	".align		4			\n\t"	\</div><div class='add'>+	"1: l.j	" label "			\n\t"	\</div><div class='add'>+	"    l.nop				\n\t"	\</div><div class='add'>+	JUMP_TABLE_ENTRY(key, label)</div><div class='add'>+</div><div class='add'>+static __always_inline bool</div><div class='add'>+arch_static_branch_jump(struct static_key *const key, const bool branch)</div><div class='add'>+{</div><div class='add'>+	asm goto (ARCH_STATIC_BRANCH_JUMP_ASM("%0", "%l[l_yes]")</div><div class='add'>+		  ::"i"(&amp;((char *)key)[branch])::l_yes);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+l_yes:</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='add'>+#endif /* __ASM_OPENRISC_JUMP_LABEL_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/mmu.h b/arch/openrisc/include/asm/mmu.h<br/>index eb720110f3a2..e7826a681bc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/mmu.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #ifndef __ASM_OPENRISC_MMU_H</div><div class='ctx'> #define __ASM_OPENRISC_MMU_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> typedef unsigned long mm_context_t;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/page.h b/arch/openrisc/include/asm/page.h<br/>index 1d5913f67c31..85797f94d1d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/page.h</a></div><div class='hunk'>@@ -15,16 +15,7 @@</div><div class='ctx'> #ifndef __ASM_OPENRISC_PAGE_H</div><div class='ctx'> #define __ASM_OPENRISC_PAGE_H</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* PAGE_SHIFT determines the page size */</div><div class='del'>-</div><div class='del'>-#define PAGE_SHIFT      CONFIG_PAGE_SHIFT</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='del'>-#define PAGE_SIZE       (1 &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#else</div><div class='del'>-#define PAGE_SIZE       (1UL &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#endif</div><div class='del'>-#define PAGE_MASK       (~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PAGE_OFFSET	0xc0000000</div><div class='ctx'> #define KERNELBASE	PAGE_OFFSET</div><div class='hunk'>@@ -34,7 +25,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define clear_page(page)	memset((page), 0, PAGE_SIZE)</div><div class='ctx'> #define copy_page(to, from)	memcpy((to), (from), PAGE_SIZE)</div><div class='hunk'>@@ -64,10 +55,10 @@ typedef struct page *pgtable_t;</div><div class='ctx'> #define __pgd(x)	((pgd_t) { (x) })</div><div class='ctx'> #define __pgprot(x)	((pgprot_t) { (x) })</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))</div><div class='ctx'> #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)</div><div class='hunk'>@@ -80,11 +71,9 @@ static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> #define virt_to_page(addr) \</div><div class='ctx'> 	(mem_map + (((unsigned long)(addr)-PAGE_OFFSET) &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> </div><div class='del'>-#define page_to_phys(page)      ((dma_addr_t)page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-</div><div class='ctx'> #define virt_addr_valid(kaddr)	(pfn_valid(virt_to_pfn(kaddr)))</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='head'>diff --git a/arch/openrisc/include/asm/pgalloc.h b/arch/openrisc/include/asm/pgalloc.h<br/>index c6a73772a546..3f110931d8f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -41,15 +41,13 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'>  */</div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL);</div><div class='add'>+	pgd_t *ret = __pgd_alloc(mm, 0);</div><div class='ctx'> </div><div class='del'>-	if (ret) {</div><div class='del'>-		memset(ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));</div><div class='add'>+	if (ret)</div><div class='ctx'> 		memcpy(ret + USER_PTRS_PER_PGD,</div><div class='ctx'> 		       swapper_pg_dir + USER_PTRS_PER_PGD,</div><div class='ctx'> 		       (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));</div><div class='ctx'> </div><div class='del'>-	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -66,10 +64,7 @@ extern inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm);</div><div class='ctx'> </div><div class='del'>-#define __pte_free_tlb(tlb, pte, addr)				\</div><div class='del'>-do {								\</div><div class='del'>-	pagetable_pte_dtor(page_ptdesc(pte));			\</div><div class='del'>-	tlb_remove_page_ptdesc((tlb), (page_ptdesc(pte)));	\</div><div class='del'>-} while (0)</div><div class='add'>+#define __pte_free_tlb(tlb, pte, addr)	\</div><div class='add'>+	tlb_remove_ptdesc((tlb), page_ptdesc(pte))</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/openrisc/include/asm/pgtable.h b/arch/openrisc/include/asm/pgtable.h<br/>index 60c6ce7ff2dc..b218050e2f6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable-nopmd.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -183,23 +183,6 @@ extern void paging_init(void);</div><div class='ctx'> extern unsigned long empty_zero_page[2048];</div><div class='ctx'> #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))</div><div class='ctx'> </div><div class='del'>-/* number of bits that fit into a memory pointer */</div><div class='del'>-#define BITS_PER_PTR			(8*sizeof(unsigned long))</div><div class='del'>-</div><div class='del'>-/* to align the pointer to a pointer address */</div><div class='del'>-#define PTR_MASK			(~(sizeof(void *)-1))</div><div class='del'>-</div><div class='del'>-/* sizeof(void*)==1&lt;&lt;SIZEOF_PTR_LOG2 */</div><div class='del'>-/* 64-bit machines, beware!  SRB. */</div><div class='del'>-#define SIZEOF_PTR_LOG2			2</div><div class='del'>-</div><div class='del'>-/* to find an entry in a page-table */</div><div class='del'>-#define PAGE_PTR(address) \</div><div class='del'>-((unsigned long)(address)&gt;&gt;(PAGE_SHIFT-SIZEOF_PTR_LOG2)&amp;PTR_MASK&amp;~PAGE_MASK)</div><div class='del'>-</div><div class='del'>-/* to set the page-dir */</div><div class='del'>-#define SET_PAGE_DIR(tsk, pgdir)</div><div class='del'>-</div><div class='ctx'> #define pte_none(x)	(!pte_val(x))</div><div class='ctx'> #define pte_present(x)	(pte_val(x) &amp; _PAGE_PRESENT)</div><div class='ctx'> #define pte_clear(mm, addr, xp)	do { pte_val(*(xp)) = 0; } while (0)</div><div class='hunk'>@@ -299,8 +282,6 @@ static inline pte_t __mk_pte(void *page, pgprot_t pgprot)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> #define mk_pte_phys(physpage, pgprot) \</div><div class='ctx'> ({                                                                      \</div><div class='ctx'> 	pte_t __pte;                                                    \</div><div class='hunk'>@@ -413,7 +394,7 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,</div><div class='ctx'> #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -432,5 +413,5 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> typedef pte_t *pte_addr_t;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __ASM_OPENRISC_PGTABLE_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/processor.h b/arch/openrisc/include/asm/processor.h<br/>index e05d1b59e24e..3ff893a67c13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/processor.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define TASK_UNMAPPED_BASE      (TASK_SIZE / 8 * 3)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='hunk'>@@ -78,5 +78,5 @@ void show_registers(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #define cpu_relax()     barrier()</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __ASM_OPENRISC_PROCESSOR_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h<br/>index 1da3e66292e2..28facf2f3e00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Make kernel PTrace/register structures opaque to userspace... userspace can</div><div class='hunk'>@@ -26,7 +27,7 @@</div><div class='ctx'>  * they share a cacheline (not done yet, though... future optimization).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * This struct describes how the registers are laid out on the kernel stack</div><div class='ctx'>  * during a syscall or other kernel entry.</div><div class='hunk'>@@ -42,6 +43,36 @@ struct pt_regs {</div><div class='ctx'> 			/* Named registers */</div><div class='ctx'> 			long  sr;	/* Stored in place of r0 */</div><div class='ctx'> 			long  sp;	/* r1 */</div><div class='add'>+			long  gpr2;</div><div class='add'>+			long  gpr3;</div><div class='add'>+			long  gpr4;</div><div class='add'>+			long  gpr5;</div><div class='add'>+			long  gpr6;</div><div class='add'>+			long  gpr7;</div><div class='add'>+			long  gpr8;</div><div class='add'>+			long  gpr9;</div><div class='add'>+			long  gpr10;</div><div class='add'>+			long  gpr11;</div><div class='add'>+			long  gpr12;</div><div class='add'>+			long  gpr13;</div><div class='add'>+			long  gpr14;</div><div class='add'>+			long  gpr15;</div><div class='add'>+			long  gpr16;</div><div class='add'>+			long  gpr17;</div><div class='add'>+			long  gpr18;</div><div class='add'>+			long  gpr19;</div><div class='add'>+			long  gpr20;</div><div class='add'>+			long  gpr21;</div><div class='add'>+			long  gpr22;</div><div class='add'>+			long  gpr23;</div><div class='add'>+			long  gpr24;</div><div class='add'>+			long  gpr25;</div><div class='add'>+			long  gpr26;</div><div class='add'>+			long  gpr27;</div><div class='add'>+			long  gpr28;</div><div class='add'>+			long  gpr29;</div><div class='add'>+			long  gpr30;</div><div class='add'>+			long  gpr31;</div><div class='ctx'> 		};</div><div class='ctx'> 		struct {</div><div class='ctx'> 			/* Old style */</div><div class='hunk'>@@ -66,17 +97,57 @@ struct pt_regs {</div><div class='ctx'> /* TODO: Rename this to REDZONE because that's what it is */</div><div class='ctx'> #define STACK_FRAME_OVERHEAD  128  /* size of minimum stack frame */</div><div class='ctx'> </div><div class='del'>-#define instruction_pointer(regs)	((regs)-&gt;pc)</div><div class='add'>+#define MAX_REG_OFFSET offsetof(struct pt_regs, orig_gpr11)</div><div class='add'>+</div><div class='add'>+/* Helpers for working with the instruction pointer */</div><div class='add'>+static inline unsigned long instruction_pointer(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)regs-&gt;pc;</div><div class='add'>+}</div><div class='add'>+static inline void instruction_pointer_set(struct pt_regs *regs,</div><div class='add'>+					   unsigned long val)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;pc = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define user_mode(regs)			(((regs)-&gt;sr &amp; SPR_SR_SM) == 0)</div><div class='ctx'> #define user_stack_pointer(regs)	((unsigned long)(regs)-&gt;sp)</div><div class='ctx'> #define profile_pc(regs)		instruction_pointer(regs)</div><div class='ctx'> </div><div class='add'>+/* Valid only for Kernel mode traps. */</div><div class='add'>+static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)regs-&gt;sp;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline long regs_return_value(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return regs-&gt;gpr[11];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+extern int regs_query_register_offset(const char *name);</div><div class='add'>+extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,</div><div class='add'>+					       unsigned int n);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regs_get_register() - get register value from its offset</div><div class='add'>+ * @regs:	pt_regs from which register value is gotten</div><div class='add'>+ * @offset:	offset of the register.</div><div class='add'>+ *</div><div class='add'>+ * regs_get_register returns the value of a register whose offset from @regs.</div><div class='add'>+ * The @offset is the offset of the register in struct pt_regs.</div><div class='add'>+ * If @offset is bigger than MAX_REG_OFFSET, this returns 0.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long regs_get_register(struct pt_regs *regs,</div><div class='add'>+					      unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(offset &gt; MAX_REG_OFFSET))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return *(unsigned long *)((unsigned long)regs + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Offsets used by 'ptrace' system call interface.</div><div class='head'>diff --git a/arch/openrisc/include/asm/setup.h b/arch/openrisc/include/asm/setup.h<br/>index 9acbc5deda69..dce9f4d3b378 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/setup.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm-generic/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> void __init or1k_early_setup(void *fdt);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/include/asm/syscall.h b/arch/openrisc/include/asm/syscall.h<br/>index 903ed882bdec..5e037d9659c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/syscall.h</a></div><div class='hunk'>@@ -26,6 +26,12 @@ syscall_get_nr(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='add'>+syscall_set_nr(struct task_struct *task, struct pt_regs *regs, int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;orig_gpr11 = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='ctx'> syscall_rollback(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	regs-&gt;gpr[11] = regs-&gt;orig_gpr11;</div><div class='hunk'>@@ -57,6 +63,13 @@ syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='ctx'> 	memcpy(args, &amp;regs-&gt;gpr[3], 6 * sizeof(args[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void</div><div class='add'>+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,</div><div class='add'>+		      const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;regs-&gt;gpr[3], args, 6 * sizeof(args[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	return AUDIT_ARCH_OPENRISC;</div><div class='head'>diff --git a/arch/openrisc/include/asm/text-patching.h b/arch/openrisc/include/asm/text-patching.h<br/>new file mode 100644<br/>index 000000000000..d19098dac0cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/text-patching.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/text-patching.h</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Chen Miao</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_OPENRISC_PATCHING_H</div><div class='add'>+#define _ASM_OPENRISC_PATCHING_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+int patch_insn_write(void *addr, u32 insn);</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_OPENRISC_PATCHING_H */</div><div class='head'>diff --git a/arch/openrisc/include/asm/thread_info.h b/arch/openrisc/include/asm/thread_info.h<br/>index 4af3049c34c2..e338fff7efb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'>  * - if the contents of this structure are changed, the assembly constants</div><div class='ctx'>  *   must also be changed</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct thread_info {</div><div class='ctx'> 	struct task_struct	*task;		/* main task structure */</div><div class='hunk'>@@ -58,7 +58,7 @@ struct thread_info {</div><div class='ctx'>  *</div><div class='ctx'>  * preempt_count needs to be 1 initially, until the scheduler is functional.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define INIT_THREAD_INFO(tsk)				\</div><div class='ctx'> {							\</div><div class='ctx'> 	.task		= &amp;tsk,				\</div><div class='hunk'>@@ -75,7 +75,7 @@ register struct thread_info *current_thread_info_reg asm("r10");</div><div class='ctx'> #define get_thread_info(ti) get_task_struct((ti)-&gt;task)</div><div class='ctx'> #define put_thread_info(ti) put_task_struct((ti)-&gt;task)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * thread information flags</div><div class='head'>diff --git a/arch/openrisc/include/uapi/asm/ptrace.h b/arch/openrisc/include/uapi/asm/ptrace.h<br/>index a77cc9915ca8..1f12a60d5a06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> #ifndef _UAPI__ASM_OPENRISC_PTRACE_H</div><div class='ctx'> #define _UAPI__ASM_OPENRISC_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * This is the layout of the regset returned by the GETREGSET ptrace call</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/openrisc/kernel/Makefile b/arch/openrisc/kernel/Makefile<br/>index 79129161f3e0..19e0eb94f2eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/Makefile</a></div><div class='hunk'>@@ -3,15 +3,17 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y	:= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	:= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	:= head.o setup.o or32_ksyms.o process.o dma.o \</div><div class='ctx'> 	   traps.o time.o irq.o entry.o ptrace.o signal.o \</div><div class='del'>-	   sys_call_table.o unwinder.o</div><div class='add'>+	   sys_call_table.o unwinder.o cacheinfo.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= smp.o sync-timer.o</div><div class='ctx'> obj-$(CONFIG_STACKTRACE)	+= stacktrace.o</div><div class='ctx'> obj-$(CONFIG_MODULES)		+= module.o</div><div class='ctx'> obj-$(CONFIG_OF)		+= prom.o</div><div class='add'>+obj-y	+= patching.o</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='head'>diff --git a/arch/openrisc/kernel/asm-offsets.c b/arch/openrisc/kernel/asm-offsets.c<br/>index 710651d5aaae..3cc826f2216b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'>  * compile this file to assembler, and then extract the</div><div class='ctx'>  * #defines from the assembly-language output.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='head'>diff --git a/arch/openrisc/kernel/cacheinfo.c b/arch/openrisc/kernel/cacheinfo.c<br/>new file mode 100644<br/>index 000000000000..61230545e4ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/cacheinfo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/cacheinfo.c</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * OpenRISC cacheinfo support</div><div class='add'>+ *</div><div class='add'>+ * Based on work done for MIPS and LoongArch. All original copyrights</div><div class='add'>+ * apply as per the original source declaration.</div><div class='add'>+ *</div><div class='add'>+ * OpenRISC implementation:</div><div class='add'>+ * Copyright (C) 2025 Sahil Siddiq &lt;sahilcdq@proton.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/cacheinfo.h&gt;</div><div class='add'>+#include &lt;asm/cpuinfo.h&gt;</div><div class='add'>+#include &lt;asm/spr.h&gt;</div><div class='add'>+#include &lt;asm/spr_defs.h&gt;</div><div class='add'>+</div><div class='add'>+static inline void ci_leaf_init(struct cacheinfo *this_leaf, enum cache_type type,</div><div class='add'>+				unsigned int level, struct cache_desc *cache, int cpu)</div><div class='add'>+{</div><div class='add'>+	this_leaf-&gt;type = type;</div><div class='add'>+	this_leaf-&gt;level = level;</div><div class='add'>+	this_leaf-&gt;coherency_line_size = cache-&gt;block_size;</div><div class='add'>+	this_leaf-&gt;number_of_sets = cache-&gt;sets;</div><div class='add'>+	this_leaf-&gt;ways_of_associativity = cache-&gt;ways;</div><div class='add'>+	this_leaf-&gt;size = cache-&gt;size;</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int init_cache_level(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	int leaves = 0, levels = 0;</div><div class='add'>+	unsigned long upr = mfspr(SPR_UPR);</div><div class='add'>+	unsigned long iccfgr, dccfgr;</div><div class='add'>+</div><div class='add'>+	if (!(upr &amp; SPR_UPR_UP)) {</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- no UPR register... unable to detect configuration\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_DCP)) {</div><div class='add'>+		dccfgr = mfspr(SPR_DCCFGR);</div><div class='add'>+		cpuinfo-&gt;dcache.ways = 1 &lt;&lt; (dccfgr &amp; SPR_DCCFGR_NCW);</div><div class='add'>+		cpuinfo-&gt;dcache.sets = 1 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_NCS) &gt;&gt; 3);</div><div class='add'>+		cpuinfo-&gt;dcache.block_size = 16 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_CBS) &gt;&gt; 7);</div><div class='add'>+		cpuinfo-&gt;dcache.size =</div><div class='add'>+		    cpuinfo-&gt;dcache.sets * cpuinfo-&gt;dcache.ways * cpuinfo-&gt;dcache.block_size;</div><div class='add'>+		leaves += 1;</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- dcache: %d bytes total, %d bytes/line, %d set(s), %d way(s)\n",</div><div class='add'>+		       cpuinfo-&gt;dcache.size, cpuinfo-&gt;dcache.block_size,</div><div class='add'>+		       cpuinfo-&gt;dcache.sets, cpuinfo-&gt;dcache.ways);</div><div class='add'>+	} else</div><div class='add'>+		printk(KERN_INFO "-- dcache disabled\n");</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_ICP)) {</div><div class='add'>+		iccfgr = mfspr(SPR_ICCFGR);</div><div class='add'>+		cpuinfo-&gt;icache.ways = 1 &lt;&lt; (iccfgr &amp; SPR_ICCFGR_NCW);</div><div class='add'>+		cpuinfo-&gt;icache.sets = 1 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_NCS) &gt;&gt; 3);</div><div class='add'>+		cpuinfo-&gt;icache.block_size = 16 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_CBS) &gt;&gt; 7);</div><div class='add'>+		cpuinfo-&gt;icache.size =</div><div class='add'>+		    cpuinfo-&gt;icache.sets * cpuinfo-&gt;icache.ways * cpuinfo-&gt;icache.block_size;</div><div class='add'>+		leaves += 1;</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- icache: %d bytes total, %d bytes/line, %d set(s), %d way(s)\n",</div><div class='add'>+		       cpuinfo-&gt;icache.size, cpuinfo-&gt;icache.block_size,</div><div class='add'>+		       cpuinfo-&gt;icache.sets, cpuinfo-&gt;icache.ways);</div><div class='add'>+	} else</div><div class='add'>+		printk(KERN_INFO "-- icache disabled\n");</div><div class='add'>+</div><div class='add'>+	if (!leaves)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	levels = 1;</div><div class='add'>+</div><div class='add'>+	this_cpu_ci-&gt;num_leaves = leaves;</div><div class='add'>+	this_cpu_ci-&gt;num_levels = levels;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int populate_cache_leaves(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	struct cacheinfo *this_leaf = this_cpu_ci-&gt;info_list;</div><div class='add'>+	int level = 1;</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_DCP)) {</div><div class='add'>+		ci_leaf_init(this_leaf, CACHE_TYPE_DATA, level, &amp;cpuinfo-&gt;dcache, cpu);</div><div class='add'>+		this_leaf-&gt;attributes = ((mfspr(SPR_DCCFGR) &amp; SPR_DCCFGR_CWS) &gt;&gt; 8) ?</div><div class='add'>+					CACHE_WRITE_BACK : CACHE_WRITE_THROUGH;</div><div class='add'>+		this_leaf++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_ICP))</div><div class='add'>+		ci_leaf_init(this_leaf, CACHE_TYPE_INST, level, &amp;cpuinfo-&gt;icache, cpu);</div><div class='add'>+</div><div class='add'>+	this_cpu_ci-&gt;cpu_map_populated = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c<br/>index b3edbb33b621..af932a4ad306 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/dma.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/dma.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/dma.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/pagewalk.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpuinfo.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,9 +25,6 @@ static int</div><div class='ctx'> page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'> 		 unsigned long next, struct mm_walk *walk)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cl;</div><div class='del'>-	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='del'>-</div><div class='ctx'> 	pte_val(*pte) |= _PAGE_CI;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -36,8 +34,7 @@ page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'> 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush page out of dcache */</div><div class='del'>-	for (cl = __pa(addr); cl &lt; __pa(next); cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-		mtspr(SPR_DCBFR, cl);</div><div class='add'>+	local_dcache_range_flush(__pa(addr), __pa(next));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -75,7 +72,7 @@ void *arch_dma_set_uncached(void *cpu_addr, size_t size)</div><div class='ctx'> 	 * them and setting the cache-inhibit bit.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mmap_write_lock(&amp;init_mm);</div><div class='del'>-	error = walk_page_range_novma(&amp;init_mm, va, va + size,</div><div class='add'>+	error = walk_kernel_page_table_range(va, va + size,</div><div class='ctx'> 			&amp;set_nocache_walk_ops, NULL, NULL);</div><div class='ctx'> 	mmap_write_unlock(&amp;init_mm);</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +87,7 @@ void arch_dma_clear_uncached(void *cpu_addr, size_t size)</div><div class='ctx'> </div><div class='ctx'> 	mmap_write_lock(&amp;init_mm);</div><div class='ctx'> 	/* walk_page_range shouldn't be able to fail here */</div><div class='del'>-	WARN_ON(walk_page_range_novma(&amp;init_mm, va, va + size,</div><div class='add'>+	WARN_ON(walk_kernel_page_table_range(va, va + size,</div><div class='ctx'> 			&amp;clear_nocache_walk_ops, NULL, NULL));</div><div class='ctx'> 	mmap_write_unlock(&amp;init_mm);</div><div class='ctx'> }</div><div class='hunk'>@@ -98,21 +95,14 @@ void arch_dma_clear_uncached(void *cpu_addr, size_t size)</div><div class='ctx'> void arch_sync_dma_for_device(phys_addr_t addr, size_t size,</div><div class='ctx'> 		enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cl;</div><div class='del'>-	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='del'>-</div><div class='ctx'> 	switch (dir) {</div><div class='ctx'> 	case DMA_TO_DEVICE:</div><div class='ctx'> 		/* Flush the dcache for the requested range */</div><div class='del'>-		for (cl = addr; cl &lt; addr + size;</div><div class='del'>-		     cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-			mtspr(SPR_DCBFR, cl);</div><div class='add'>+		local_dcache_range_flush(addr, addr + size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DMA_FROM_DEVICE:</div><div class='ctx'> 		/* Invalidate the dcache for the requested range */</div><div class='del'>-		for (cl = addr; cl &lt; addr + size;</div><div class='del'>-		     cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-			mtspr(SPR_DCBIR, cl);</div><div class='add'>+		local_dcache_range_inv(addr, addr + size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S<br/>index 440711d7bf40..c7e90b09645e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/entry.S</a></div><div class='hunk'>@@ -239,6 +239,8 @@ handler:							;\</div><div class='ctx'> </div><div class='ctx'> /* =====================================================[ exceptions] === */</div><div class='ctx'> </div><div class='add'>+	__REF</div><div class='add'>+</div><div class='ctx'> /* ---[ 0x100: RESET exception ]----------------------------------------- */</div><div class='ctx'> </div><div class='ctx'> EXCEPTION_ENTRY(_tng_kernel_start)</div><div class='hunk'>@@ -712,6 +714,10 @@ _syscall_check_trace_leave:</div><div class='ctx'>  * interrupts that set NEED_RESCHED or SIGNALPENDING... really true? */</div><div class='ctx'> </div><div class='ctx'> _syscall_check_work:</div><div class='add'>+#ifdef CONFIG_DEBUG_RSEQ</div><div class='add'>+	l.jal	rseq_syscall</div><div class='add'>+	 l.ori	r3,r1,0</div><div class='add'>+#endif</div><div class='ctx'> 	/* Here we need to disable interrupts */</div><div class='ctx'> 	DISABLE_INTERRUPTS(r27,r29)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='head'>diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S<br/>index 439e00f81e5d..bd760066f1cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/head.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/head.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/head.S</a></div><div class='hunk'>@@ -26,15 +26,15 @@</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> </div><div class='del'>-#define tophys(rd,rs)				\</div><div class='del'>-	l.movhi	rd,hi(-KERNELBASE)		;\</div><div class='add'>+#define tophys(rd,rs)						\</div><div class='add'>+	l.movhi	rd,hi(-KERNELBASE)				;\</div><div class='ctx'> 	l.add	rd,rd,rs</div><div class='ctx'> </div><div class='del'>-#define CLEAR_GPR(gpr)				\</div><div class='add'>+#define CLEAR_GPR(gpr)						\</div><div class='ctx'> 	l.movhi	gpr,0x0</div><div class='ctx'> </div><div class='del'>-#define LOAD_SYMBOL_2_GPR(gpr,symbol)		\</div><div class='del'>-	l.movhi gpr,hi(symbol)			;\</div><div class='add'>+#define LOAD_SYMBOL_2_GPR(gpr,symbol)				\</div><div class='add'>+	l.movhi gpr,hi(symbol)					;\</div><div class='ctx'> 	l.ori   gpr,gpr,lo(symbol)</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -326,21 +326,21 @@</div><div class='ctx'> 	l.addi  r1,r1,-(INT_FRAME_SIZE)				;\</div><div class='ctx'> 	/* r1 is KSP, r30 is __pa(KSP) */			;\</div><div class='ctx'> 	tophys  (r30,r1)					;\</div><div class='del'>-	l.sw    PT_GPR12(r30),r12					;\</div><div class='add'>+	l.sw    PT_GPR12(r30),r12				;\</div><div class='ctx'> 	l.mfspr r12,r0,SPR_EPCR_BASE				;\</div><div class='ctx'> 	l.sw    PT_PC(r30),r12					;\</div><div class='ctx'> 	l.mfspr r12,r0,SPR_ESR_BASE				;\</div><div class='ctx'> 	l.sw    PT_SR(r30),r12					;\</div><div class='ctx'> 	/* save r31 */						;\</div><div class='ctx'> 	EXCEPTION_T_LOAD_GPR30(r12)				;\</div><div class='del'>-	l.sw	PT_GPR30(r30),r12					;\</div><div class='add'>+	l.sw	PT_GPR30(r30),r12				;\</div><div class='ctx'> 	/* save r10 as was prior to exception */		;\</div><div class='ctx'> 	EXCEPTION_T_LOAD_GPR10(r12)				;\</div><div class='del'>-	l.sw	PT_GPR10(r30),r12					;\</div><div class='del'>-	/* save PT_SP as was prior to exception */			;\</div><div class='add'>+	l.sw	PT_GPR10(r30),r12				;\</div><div class='add'>+	/* save PT_SP as was prior to exception */		;\</div><div class='ctx'> 	EXCEPTION_T_LOAD_SP(r12)				;\</div><div class='ctx'> 	l.sw	PT_SP(r30),r12					;\</div><div class='del'>-	l.sw    PT_GPR13(r30),r13					;\</div><div class='add'>+	l.sw    PT_GPR13(r30),r13				;\</div><div class='ctx'> 	/* --&gt; */						;\</div><div class='ctx'> 	/* save exception r4, set r4 = EA */			;\</div><div class='ctx'> 	l.sw	PT_GPR4(r30),r4					;\</div><div class='hunk'>@@ -357,6 +357,8 @@</div><div class='ctx'> </div><div class='ctx'> /* =====================================================[ exceptions] === */</div><div class='ctx'> </div><div class='add'>+	__HEAD</div><div class='add'>+</div><div class='ctx'> /* ---[ 0x100: RESET exception ]----------------------------------------- */</div><div class='ctx'>     .org 0x100</div><div class='ctx'> 	/* Jump to .init code at _start which lives in the .head section</div><div class='hunk'>@@ -394,7 +396,7 @@ _dispatch_do_ipage_fault:</div><div class='ctx'>     .org 0x500</div><div class='ctx'> 	EXCEPTION_HANDLE(_timer_handler)</div><div class='ctx'> </div><div class='del'>-/* ---[ 0x600: Alignment exception ]-------------------------------------- */</div><div class='add'>+/* ---[ 0x600: Alignment exception ]------------------------------------- */</div><div class='ctx'>     .org 0x600</div><div class='ctx'> 	EXCEPTION_HANDLE(_alignment_handler)</div><div class='ctx'> </div><div class='hunk'>@@ -424,7 +426,7 @@ _dispatch_do_ipage_fault:</div><div class='ctx'>     .org 0xc00</div><div class='ctx'> 	EXCEPTION_HANDLE(_sys_call_handler)</div><div class='ctx'> </div><div class='del'>-/* ---[ 0xd00: Floating point exception ]--------------------------------- */</div><div class='add'>+/* ---[ 0xd00: Floating point exception ]-------------------------------- */</div><div class='ctx'>     .org 0xd00</div><div class='ctx'> 	EXCEPTION_HANDLE(_fpe_trap_handler)</div><div class='ctx'> </div><div class='hunk'>@@ -506,10 +508,10 @@ _dispatch_do_ipage_fault:</div><div class='ctx'> </div><div class='ctx'> /*    .text*/</div><div class='ctx'> </div><div class='del'>-/* This early stuff belongs in HEAD, but some of the functions below definitely</div><div class='add'>+/* This early stuff belongs in the .init.text section, but some of the functions below definitely</div><div class='ctx'>  * don't... */</div><div class='ctx'> </div><div class='del'>-	__HEAD</div><div class='add'>+	__INIT</div><div class='ctx'> 	.global _start</div><div class='ctx'> _start:</div><div class='ctx'> 	/* Init r0 to zero as per spec */</div><div class='hunk'>@@ -816,7 +818,7 @@ secondary_start:</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* ========================================[ cache ]=== */</div><div class='add'>+/* ==========================================================[ cache ]=== */</div><div class='ctx'> </div><div class='ctx'> 	/* alignment here so we don't change memory offsets with</div><div class='ctx'> 	 * memory controller defined</div><div class='head'>diff --git a/arch/openrisc/kernel/jump_label.c b/arch/openrisc/kernel/jump_label.c<br/>new file mode 100644<br/>index 000000000000..ab7137c23b46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/jump_label.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/jump_label.c</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Chen Miao</div><div class='add'>+ *</div><div class='add'>+ * Based on arch/arm/kernel/jump_label.c</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;asm/bug.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='add'>+</div><div class='add'>+bool arch_jump_label_transform_queue(struct jump_entry *entry,</div><div class='add'>+				     enum jump_label_type type)</div><div class='add'>+{</div><div class='add'>+	void *addr = (void *)jump_entry_code(entry);</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	if (type == JUMP_LABEL_JMP) {</div><div class='add'>+		long offset;</div><div class='add'>+</div><div class='add'>+		offset = jump_entry_target(entry) - jump_entry_code(entry);</div><div class='add'>+		/*</div><div class='add'>+		 * The actual maximum range of the l.j instruction's offset is -134,217,728</div><div class='add'>+		 * ~ 134,217,724 (sign 26-bit imm).</div><div class='add'>+		 * For the original jump range, we need to right-shift N by 2 to obtain the</div><div class='add'>+		 * instruction's offset.</div><div class='add'>+		 */</div><div class='add'>+		WARN_ON_ONCE(offset &lt; -134217728 || offset &gt; 134217724);</div><div class='add'>+</div><div class='add'>+		/* 26bit imm mask */</div><div class='add'>+		offset = (offset &gt;&gt; 2) &amp; 0x03ffffff;</div><div class='add'>+</div><div class='add'>+		insn = offset;</div><div class='add'>+	} else {</div><div class='add'>+		insn = OPENRISC_INSN_NOP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (early_boot_irqs_disabled)</div><div class='add'>+		copy_to_kernel_nofault(addr, &amp;insn, sizeof(insn));</div><div class='add'>+	else</div><div class='add'>+		patch_insn_write(addr, insn);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_jump_label_transform_apply(void)</div><div class='add'>+{</div><div class='add'>+	kick_all_cpus_sync();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/openrisc/kernel/module.c b/arch/openrisc/kernel/module.c<br/>index c9ff4c4a0b29..4ac4fbaa827c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/module.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/module.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/module.c</a></div><div class='hunk'>@@ -55,6 +55,10 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,</div><div class='ctx'> 			value |= *location &amp; 0xfc000000;</div><div class='ctx'> 			*location = value;</div><div class='ctx'> 			break;</div><div class='add'>+		case R_OR1K_32_PCREL:</div><div class='add'>+			value -= (uint32_t)location;</div><div class='add'>+			*location = value;</div><div class='add'>+			break;</div><div class='ctx'> 		case R_OR1K_AHI16:</div><div class='ctx'> 			/* Adjust the operand to match with a signed LO16.  */</div><div class='ctx'> 			value += 0x8000;</div><div class='head'>diff --git a/arch/openrisc/kernel/patching.c b/arch/openrisc/kernel/patching.c<br/>new file mode 100644<br/>index 000000000000..d186172beb33<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/patching.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/patching.c</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2020 SiFive</div><div class='add'>+ * Copyright (C) 2025 Chen Miao</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/insn-def.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/fixmap.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+</div><div class='add'>+static DEFINE_RAW_SPINLOCK(patch_lock);</div><div class='add'>+</div><div class='add'>+static __always_inline void *patch_map(void *addr, int fixmap)</div><div class='add'>+{</div><div class='add'>+	uintptr_t uaddr = (uintptr_t) addr;</div><div class='add'>+	phys_addr_t phys;</div><div class='add'>+</div><div class='add'>+	if (core_kernel_text(uaddr)) {</div><div class='add'>+		phys = __pa_symbol(addr);</div><div class='add'>+	} else {</div><div class='add'>+		struct page *page = vmalloc_to_page(addr);</div><div class='add'>+		BUG_ON(!page);</div><div class='add'>+		phys = page_to_phys(page) + offset_in_page(addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (void *)set_fixmap_offset(fixmap, phys);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void patch_unmap(int fixmap)</div><div class='add'>+{</div><div class='add'>+	clear_fixmap(fixmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __patch_insn_write(void *addr, u32 insn)</div><div class='add'>+{</div><div class='add'>+	void *waddr = addr;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;patch_lock, flags);</div><div class='add'>+</div><div class='add'>+	waddr = patch_map(addr, FIX_TEXT_POKE0);</div><div class='add'>+</div><div class='add'>+	ret = copy_to_kernel_nofault(waddr, &amp;insn, OPENRISC_INSN_SIZE);</div><div class='add'>+	local_icache_range_inv((unsigned long)waddr,</div><div class='add'>+			       (unsigned long)waddr + OPENRISC_INSN_SIZE);</div><div class='add'>+</div><div class='add'>+	patch_unmap(FIX_TEXT_POKE0);</div><div class='add'>+</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;patch_lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * patch_insn_write - Write a single instruction to a specified memory location</div><div class='add'>+ * This API provides a single-instruction patching, primarily used for runtime</div><div class='add'>+ * code modification.</div><div class='add'>+ * By the way, the insn size must be 4 bytes.</div><div class='add'>+ */</div><div class='add'>+int patch_insn_write(void *addr, u32 insn)</div><div class='add'>+{</div><div class='add'>+	u32 *tp = addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if ((uintptr_t) tp &amp; 0x3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = __patch_insn_write(tp, insn);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c<br/>index eef99fee2110..73ffb9fa3118 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/process.c</a></div><div class='hunk'>@@ -165,7 +165,7 @@ extern asmlinkage void ret_from_fork(void);</div><div class='ctx'> int</div><div class='ctx'> copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *userregs;</div><div class='head'>diff --git a/arch/openrisc/kernel/prom.c b/arch/openrisc/kernel/prom.c<br/>index 19e6008bf114..e424e9bd12a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/prom.c</a></div><div class='hunk'>@@ -22,6 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> void __init early_init_devtree(void *params)</div><div class='ctx'> {</div><div class='del'>-	early_init_dt_scan(params);</div><div class='add'>+	early_init_dt_scan(params, __pa(params));</div><div class='ctx'> 	memblock_allow_resize();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c<br/>index 5091b18eab4c..552489b24855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/ptrace.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ enum or1k_regset {</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset or1k_regsets[] = {</div><div class='ctx'> 	[REGSET_GENERAL] = {</div><div class='del'>-			    .core_note_type = NT_PRSTATUS,</div><div class='add'>+			    USER_REGSET_NOTE_TYPE(PRSTATUS),</div><div class='ctx'> 			    .n = ELF_NGREG,</div><div class='ctx'> 			    .size = sizeof(long),</div><div class='ctx'> 			    .align = sizeof(long),</div><div class='hunk'>@@ -133,7 +133,7 @@ static const struct user_regset or1k_regsets[] = {</div><div class='ctx'> 			    },</div><div class='ctx'> #ifdef CONFIG_FPU</div><div class='ctx'> 	[REGSET_FPU] = {</div><div class='del'>-			    .core_note_type = NT_PRFPREG,</div><div class='add'>+			    USER_REGSET_NOTE_TYPE(PRFPREG),</div><div class='ctx'> 			    .n = sizeof(struct __or1k_fpu_state) / sizeof(long),</div><div class='ctx'> 			    .size = sizeof(long),</div><div class='ctx'> 			    .align = sizeof(long),</div><div class='hunk'>@@ -160,6 +160,102 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)</div><div class='ctx'>  * in exit.c or in signal.c.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+struct pt_regs_offset {</div><div class='add'>+	const char *name;</div><div class='add'>+	int offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}</div><div class='add'>+#define REG_OFFSET_END {.name = NULL, .offset = 0}</div><div class='add'>+</div><div class='add'>+static const struct pt_regs_offset regoffset_table[] = {</div><div class='add'>+	REG_OFFSET_NAME(sr),</div><div class='add'>+	REG_OFFSET_NAME(sp),</div><div class='add'>+	REG_OFFSET_NAME(gpr2),</div><div class='add'>+	REG_OFFSET_NAME(gpr3),</div><div class='add'>+	REG_OFFSET_NAME(gpr4),</div><div class='add'>+	REG_OFFSET_NAME(gpr5),</div><div class='add'>+	REG_OFFSET_NAME(gpr6),</div><div class='add'>+	REG_OFFSET_NAME(gpr7),</div><div class='add'>+	REG_OFFSET_NAME(gpr8),</div><div class='add'>+	REG_OFFSET_NAME(gpr9),</div><div class='add'>+	REG_OFFSET_NAME(gpr10),</div><div class='add'>+	REG_OFFSET_NAME(gpr11),</div><div class='add'>+	REG_OFFSET_NAME(gpr12),</div><div class='add'>+	REG_OFFSET_NAME(gpr13),</div><div class='add'>+	REG_OFFSET_NAME(gpr14),</div><div class='add'>+	REG_OFFSET_NAME(gpr15),</div><div class='add'>+	REG_OFFSET_NAME(gpr16),</div><div class='add'>+	REG_OFFSET_NAME(gpr17),</div><div class='add'>+	REG_OFFSET_NAME(gpr18),</div><div class='add'>+	REG_OFFSET_NAME(gpr19),</div><div class='add'>+	REG_OFFSET_NAME(gpr20),</div><div class='add'>+	REG_OFFSET_NAME(gpr21),</div><div class='add'>+	REG_OFFSET_NAME(gpr22),</div><div class='add'>+	REG_OFFSET_NAME(gpr23),</div><div class='add'>+	REG_OFFSET_NAME(gpr24),</div><div class='add'>+	REG_OFFSET_NAME(gpr25),</div><div class='add'>+	REG_OFFSET_NAME(gpr26),</div><div class='add'>+	REG_OFFSET_NAME(gpr27),</div><div class='add'>+	REG_OFFSET_NAME(gpr28),</div><div class='add'>+	REG_OFFSET_NAME(gpr29),</div><div class='add'>+	REG_OFFSET_NAME(gpr30),</div><div class='add'>+	REG_OFFSET_NAME(gpr31),</div><div class='add'>+	REG_OFFSET_NAME(pc),</div><div class='add'>+	REG_OFFSET_NAME(orig_gpr11),</div><div class='add'>+	REG_OFFSET_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regs_query_register_offset() - query register offset from its name</div><div class='add'>+ * @name:	the name of a register</div><div class='add'>+ *</div><div class='add'>+ * regs_query_register_offset() returns the offset of a register in struct</div><div class='add'>+ * pt_regs from its name. If the name is invalid, this returns -EINVAL;</div><div class='add'>+ */</div><div class='add'>+int regs_query_register_offset(const char *name)</div><div class='add'>+{</div><div class='add'>+	const struct pt_regs_offset *roff;</div><div class='add'>+</div><div class='add'>+	for (roff = regoffset_table; roff-&gt;name != NULL; roff++)</div><div class='add'>+		if (!strcmp(roff-&gt;name, name))</div><div class='add'>+			return roff-&gt;offset;</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regs_within_kernel_stack() - check the address in the stack</div><div class='add'>+ * @regs:      pt_regs which contains kernel stack pointer.</div><div class='add'>+ * @addr:      address which is checked.</div><div class='add'>+ *</div><div class='add'>+ * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).</div><div class='add'>+ * If @addr is within the kernel stack, it returns true. If not, returns false.</div><div class='add'>+ */</div><div class='add'>+static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return (addr &amp; ~(THREAD_SIZE - 1))  ==</div><div class='add'>+		(kernel_stack_pointer(regs) &amp; ~(THREAD_SIZE - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regs_get_kernel_stack_nth() - get Nth entry of the stack</div><div class='add'>+ * @regs:	pt_regs which contains kernel stack pointer.</div><div class='add'>+ * @n:		stack entry number.</div><div class='add'>+ *</div><div class='add'>+ * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which</div><div class='add'>+ * is specified by @regs. If the @n th entry is NOT in the kernel stack,</div><div class='add'>+ * this returns 0.</div><div class='add'>+ */</div><div class='add'>+unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);</div><div class='add'>+</div><div class='add'>+	addr += n;</div><div class='add'>+	if (regs_within_kernel_stack(regs, (unsigned long)addr))</div><div class='add'>+		return *addr;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Called by kernel/ptrace.c when detaching..</div><div class='head'>diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c<br/>index be56eaafc8b9..000a9cc10e6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/setup.c</a></div><div class='hunk'>@@ -113,21 +113,6 @@ static void print_cpuinfo(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (upr &amp; SPR_UPR_DCP)</div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",</div><div class='del'>-		       cpuinfo-&gt;dcache_size, cpuinfo-&gt;dcache_block_size,</div><div class='del'>-		       cpuinfo-&gt;dcache_ways);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "-- dcache disabled\n");</div><div class='del'>-	if (upr &amp; SPR_UPR_ICP)</div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",</div><div class='del'>-		       cpuinfo-&gt;icache_size, cpuinfo-&gt;icache_block_size,</div><div class='del'>-		       cpuinfo-&gt;icache_ways);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "-- icache disabled\n");</div><div class='del'>-</div><div class='ctx'> 	if (upr &amp; SPR_UPR_DMP)</div><div class='ctx'> 		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",</div><div class='ctx'> 		       1 &lt;&lt; ((mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTS) &gt;&gt; 2),</div><div class='hunk'>@@ -155,8 +140,6 @@ static void print_cpuinfo(void)</div><div class='ctx'> void __init setup_cpuinfo(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *cpu;</div><div class='del'>-	unsigned long iccfgr, dccfgr;</div><div class='del'>-	unsigned long cache_set_size;</div><div class='ctx'> 	int cpu_id = smp_processor_id();</div><div class='ctx'> 	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[cpu_id];</div><div class='ctx'> </div><div class='hunk'>@@ -164,20 +147,6 @@ void __init setup_cpuinfo(void)</div><div class='ctx'> 	if (!cpu)</div><div class='ctx'> 		panic("Couldn't find CPU%d in device tree...\n", cpu_id);</div><div class='ctx'> </div><div class='del'>-	iccfgr = mfspr(SPR_ICCFGR);</div><div class='del'>-	cpuinfo-&gt;icache_ways = 1 &lt;&lt; (iccfgr &amp; SPR_ICCFGR_NCW);</div><div class='del'>-	cache_set_size = 1 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_NCS) &gt;&gt; 3);</div><div class='del'>-	cpuinfo-&gt;icache_block_size = 16 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_CBS) &gt;&gt; 7);</div><div class='del'>-	cpuinfo-&gt;icache_size =</div><div class='del'>-	    cache_set_size * cpuinfo-&gt;icache_ways * cpuinfo-&gt;icache_block_size;</div><div class='del'>-</div><div class='del'>-	dccfgr = mfspr(SPR_DCCFGR);</div><div class='del'>-	cpuinfo-&gt;dcache_ways = 1 &lt;&lt; (dccfgr &amp; SPR_DCCFGR_NCW);</div><div class='del'>-	cache_set_size = 1 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_NCS) &gt;&gt; 3);</div><div class='del'>-	cpuinfo-&gt;dcache_block_size = 16 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_CBS) &gt;&gt; 7);</div><div class='del'>-	cpuinfo-&gt;dcache_size =</div><div class='del'>-	    cache_set_size * cpuinfo-&gt;dcache_ways * cpuinfo-&gt;dcache_block_size;</div><div class='del'>-</div><div class='ctx'> 	if (of_property_read_u32(cpu, "clock-frequency",</div><div class='ctx'> 				 &amp;cpuinfo-&gt;clock_frequency)) {</div><div class='ctx'> 		printk(KERN_WARNING</div><div class='hunk'>@@ -280,6 +249,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 		initrd_below_start_ok = 1;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='add'>+	/* perform jump_table sorting before paging_init locks down read only memory */</div><div class='add'>+	jump_label_init();</div><div class='ctx'> </div><div class='ctx'> 	/* paging_init() sets up the MMU and marks all pages as reserved */</div><div class='ctx'> 	paging_init();</div><div class='hunk'>@@ -294,14 +265,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 	unsigned int vr, cpucfgr;</div><div class='ctx'> 	unsigned int avr;</div><div class='ctx'> 	unsigned int version;</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	struct cpuinfo_or1k *cpuinfo = v;</div><div class='add'>+	seq_printf(m, "processor\t\t: %d\n", cpuinfo-&gt;coreid);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	vr = mfspr(SPR_VR);</div><div class='ctx'> 	cpucfgr = mfspr(SPR_CPUCFGR);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	seq_printf(m, "processor\t\t: %d\n", cpuinfo-&gt;coreid);</div><div class='del'>-#endif</div><div class='ctx'> 	if (vr &amp; SPR_VR_UVRP) {</div><div class='ctx'> 		vr = mfspr(SPR_VR2);</div><div class='ctx'> 		version = vr &amp; SPR_VR2_VER;</div><div class='hunk'>@@ -320,14 +291,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 		seq_printf(m, "revision\t\t: %d\n", vr &amp; SPR_VR_REV);</div><div class='ctx'> 	}</div><div class='ctx'> 	seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ);</div><div class='del'>-	seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo-&gt;dcache_size);</div><div class='del'>-	seq_printf(m, "dcache block size\t: %d bytes\n",</div><div class='del'>-		   cpuinfo-&gt;dcache_block_size);</div><div class='del'>-	seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo-&gt;dcache_ways);</div><div class='del'>-	seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo-&gt;icache_size);</div><div class='del'>-	seq_printf(m, "icache block size\t: %d bytes\n",</div><div class='del'>-		   cpuinfo-&gt;icache_block_size);</div><div class='del'>-	seq_printf(m, "icache ways\t\t: %d\n", cpuinfo-&gt;icache_ways);</div><div class='ctx'> 	seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n",</div><div class='ctx'> 		   1 &lt;&lt; ((mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTS) &gt;&gt; 2),</div><div class='ctx'> 		   1 + (mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTW));</div><div class='head'>diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c<br/>index c7ab42e2cb7a..f70a13ee0593 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/signal.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/signal.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/signal.c</a></div><div class='hunk'>@@ -244,6 +244,8 @@ handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	rseq_signal_deliver(ksig, regs);</div><div class='add'>+</div><div class='ctx'> 	ret = setup_rt_frame(ksig, sigmask_to_save(), regs);</div><div class='ctx'> </div><div class='ctx'> 	signal_setup_done(ret, ksig, test_thread_flag(TIF_SINGLESTEP));</div><div class='head'>diff --git a/arch/openrisc/kernel/vmlinux.lds.S b/arch/openrisc/kernel/vmlinux.lds.S<br/>index bc1306047837..049bff45f612 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/vmlinux.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/kernel/vmlinux.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -50,6 +50,7 @@ SECTIONS</div><div class='ctx'>         .text                   : AT(ADDR(.text) - LOAD_OFFSET)</div><div class='ctx'> 	{</div><div class='ctx'>           _stext = .;</div><div class='add'>+	  HEAD_TEXT</div><div class='ctx'> 	  TEXT_TEXT</div><div class='ctx'> 	  SCHED_TEXT</div><div class='ctx'> 	  LOCK_TEXT</div><div class='hunk'>@@ -83,8 +84,6 @@ SECTIONS</div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 	__init_begin = .;</div><div class='ctx'> </div><div class='del'>-	HEAD_TEXT_SECTION</div><div class='del'>-</div><div class='ctx'> 	/* Page aligned */</div><div class='ctx'> 	INIT_TEXT_SECTION(PAGE_SIZE)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/mm/cache.c b/arch/openrisc/mm/cache.c<br/>index eb43b73f3855..f33df46dae4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/cache.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/cache.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/cache.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/mm/cache.c</a></div><div class='hunk'>@@ -14,37 +14,76 @@</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cpuinfo.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='del'>-static __always_inline void cache_loop(struct page *page, const unsigned int reg)</div><div class='add'>+/*</div><div class='add'>+ * Check if the cache component exists.</div><div class='add'>+ */</div><div class='add'>+bool cpu_cache_is_present(const unsigned int cache_type)</div><div class='ctx'> {</div><div class='del'>-	unsigned long paddr = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	unsigned long line = paddr &amp; ~(L1_CACHE_BYTES - 1);</div><div class='add'>+	unsigned long upr = mfspr(SPR_UPR);</div><div class='add'>+	unsigned long mask = SPR_UPR_UP | cache_type;</div><div class='add'>+</div><div class='add'>+	return !((upr &amp; mask) ^ mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void cache_loop(unsigned long paddr, unsigned long end,</div><div class='add'>+				       const unsigned short reg, const unsigned int cache_type)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_cache_is_present(cache_type))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	while (line &lt; paddr + PAGE_SIZE) {</div><div class='del'>-		mtspr(reg, line);</div><div class='del'>-		line += L1_CACHE_BYTES;</div><div class='add'>+	while (paddr &lt; end) {</div><div class='add'>+		mtspr(reg, paddr);</div><div class='add'>+		paddr += L1_CACHE_BYTES;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline void cache_loop_page(struct page *page, const unsigned short reg,</div><div class='add'>+					    const unsigned int cache_type)</div><div class='add'>+{</div><div class='add'>+	unsigned long paddr = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	unsigned long end = paddr + PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	paddr &amp;= ~(L1_CACHE_BYTES - 1);</div><div class='add'>+</div><div class='add'>+	cache_loop(paddr, end, reg, cache_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void local_dcache_page_flush(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	cache_loop(page, SPR_DCBFR);</div><div class='add'>+	cache_loop_page(page, SPR_DCBFR, SPR_UPR_DCP);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(local_dcache_page_flush);</div><div class='ctx'> </div><div class='ctx'> void local_icache_page_inv(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	cache_loop(page, SPR_ICBIR);</div><div class='add'>+	cache_loop_page(page, SPR_ICBIR, SPR_UPR_ICP);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(local_icache_page_inv);</div><div class='ctx'> </div><div class='add'>+void local_dcache_range_flush(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_DCBFR, SPR_UPR_DCP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void local_dcache_range_inv(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_DCBIR, SPR_UPR_DCP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void local_icache_range_inv(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_ICBIR, SPR_UPR_ICP);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void update_cache(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 	pte_t *pte)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pfn = pte_val(*pte) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	struct folio *folio = page_folio(pfn_to_page(pfn));</div><div class='del'>-	int dirty = !test_and_set_bit(PG_dc_clean, &amp;folio-&gt;flags);</div><div class='add'>+	int dirty = !test_and_set_bit(PG_dc_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Since icaches do not snoop for updated data on OpenRISC, we</div><div class='hunk'>@@ -58,4 +97,3 @@ void update_cache(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 			sync_icache_dcache(folio_page(folio, nr));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='head'>diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c<br/>index 1dcd78c8f0e9..9382d9a0ec78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/mm/init.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> int mem_init_done;</div><div class='ctx'> </div><div class='hunk'>@@ -176,8 +177,8 @@ void __init paging_init(void)</div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate instruction caches after code modification */</div><div class='del'>-	mtspr(SPR_ICBIR, 0x900);</div><div class='del'>-	mtspr(SPR_ICBIR, 0xa00);</div><div class='add'>+	local_icache_block_inv(0x900);</div><div class='add'>+	local_icache_block_inv(0xa00);</div><div class='ctx'> </div><div class='ctx'> 	/* New TLB miss handlers and kernel page tables are in now place.</div><div class='ctx'> 	 * Make sure that page flags get updated for all pages in TLB by</div><div class='hunk'>@@ -193,20 +194,55 @@ void __init mem_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!mem_map);</div><div class='ctx'> </div><div class='del'>-	max_mapnr = max_low_pfn;</div><div class='del'>-	high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);</div><div class='del'>-</div><div class='ctx'> 	/* clear the zero-page */</div><div class='ctx'> 	memset((void *)empty_zero_page, 0, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	/* this will put all low memory onto the freelists */</div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='ctx'> 	printk("mem_init_done ...........................................\n");</div><div class='ctx'> 	mem_init_done = 1;</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init map_page(unsigned long va, phys_addr_t pa, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	p4d_t *p4d;</div><div class='add'>+	pud_t *pud;</div><div class='add'>+	pmd_t *pmd;</div><div class='add'>+	pte_t *pte;</div><div class='add'>+</div><div class='add'>+	p4d = p4d_offset(pgd_offset_k(va), va);</div><div class='add'>+	pud = pud_offset(p4d, va);</div><div class='add'>+	pmd = pmd_offset(pud, va);</div><div class='add'>+	pte = pte_alloc_kernel(pmd, va);</div><div class='add'>+</div><div class='add'>+	if (pte == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (pgprot_val(prot))</div><div class='add'>+		set_pte_at(&amp;init_mm, va, pte, pfn_pte(pa &gt;&gt; PAGE_SHIFT, prot));</div><div class='add'>+	else</div><div class='add'>+		pte_clear(&amp;init_mm, va, pte);</div><div class='add'>+</div><div class='add'>+	local_flush_tlb_page(NULL, va);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __set_fix must now support both EARLYCON and TEXT_POKE mappings,</div><div class='add'>+ * which are used at different stages of kernel execution.</div><div class='add'>+ */</div><div class='add'>+void __set_fixmap(enum fixed_addresses idx,</div><div class='add'>+			 phys_addr_t phys, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	unsigned long address = __fix_to_virt(idx);</div><div class='add'>+</div><div class='add'>+	if (idx &gt;= __end_of_fixed_addresses) {</div><div class='add'>+		BUG();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	map_page(address, phys, prot);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const pgprot_t protection_map[16] = {</div><div class='ctx'> 	[VM_NONE]					= PAGE_NONE,</div><div class='ctx'> 	[VM_READ]					= PAGE_READONLY_X,</div><div class='head'>diff --git a/arch/openrisc/mm/ioremap.c b/arch/openrisc/mm/ioremap.c<br/>index f59ea4c10b0f..3b352f97fecb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/openrisc/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/openrisc/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/openrisc/mm/ioremap.c</a></div><div class='hunk'>@@ -36,12 +36,9 @@ pte_t __ref *pte_alloc_one_kernel(struct mm_struct *mm)</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(mem_init_done)) {</div><div class='del'>-		pte = (pte_t *)get_zeroed_page(GFP_KERNEL);</div><div class='add'>+		pte = __pte_alloc_one_kernel(mm);</div><div class='ctx'> 	} else {</div><div class='del'>-		pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		if (!pte)</div><div class='del'>-			panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-			      __func__, PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+		pte = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return pte;</div><div class='head'>diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig<br/>index aa6a3cad275d..47fd9662d800 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/Kconfig</a></div><div class='hunk'>@@ -31,6 +31,9 @@ config PARISC</div><div class='ctx'> 	select HAVE_KERNEL_UNCOMPRESSED</div><div class='ctx'> 	select HAVE_PCI</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='add'>+	select HAVE_PERF_REGS</div><div class='add'>+	select HAVE_PERF_USER_STACK_DUMP</div><div class='add'>+	select PERF_USE_VMALLOC</div><div class='ctx'> 	select HAVE_KERNEL_BZIP2</div><div class='ctx'> 	select HAVE_KERNEL_GZIP</div><div class='ctx'> 	select HAVE_KERNEL_LZ4</div><div class='hunk'>@@ -44,6 +47,7 @@ config PARISC</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_ARCH_TOPOLOGY if SMP</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC if SMP &amp;&amp; PA8X00</div><div class='ctx'> 	select GENERIC_CPU_DEVICES if !SMP</div><div class='ctx'> 	select GENERIC_LIB_DEVMEM_IS_ALLOWED</div><div class='ctx'> 	select SYSCTL_ARCH_UNALIGN_ALLOW</div><div class='hunk'>@@ -60,8 +64,8 @@ config PARISC</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_BITS</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL</div><div class='ctx'> 	select HAVE_ARCH_HASH</div><div class='del'>-	select HAVE_ARCH_JUMP_LABEL</div><div class='del'>-	select HAVE_ARCH_JUMP_LABEL_RELATIVE</div><div class='add'>+	# select HAVE_ARCH_JUMP_LABEL</div><div class='add'>+	# select HAVE_ARCH_JUMP_LABEL_RELATIVE</div><div class='ctx'> 	select HAVE_ARCH_KFENCE</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='hunk'>@@ -81,7 +85,6 @@ config PARISC</div><div class='ctx'> 	select HAVE_KPROBES</div><div class='ctx'> 	select HAVE_KRETPROBES</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD if HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_KPROBES_ON_FTRACE</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS</div><div class='hunk'>@@ -320,14 +323,6 @@ config SMP</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say N.</div><div class='ctx'> </div><div class='del'>-config SCHED_MC</div><div class='del'>-	bool "Multi-core scheduler support"</div><div class='del'>-	depends on GENERIC_ARCH_TOPOLOGY &amp;&amp; PA8X00</div><div class='del'>-	help</div><div class='del'>-	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='del'>-	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='del'>-	  increased overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='ctx'> config IRQSTACKS</div><div class='ctx'> 	bool "Use separate kernel stacks when processing interrupts"</div><div class='ctx'> 	default y</div><div class='head'>diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile<br/>index 21b8166a6883..48ae3c79557a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/Makefile</a></div><div class='hunk'>@@ -39,7 +39,9 @@ endif</div><div class='ctx'> </div><div class='ctx'> export LD_BFD</div><div class='ctx'> </div><div class='del'>-# Set default 32 bits cross compilers for vdso</div><div class='add'>+# Set default 32 bits cross compilers for vdso.</div><div class='add'>+# This means that for 64BIT, both the 64-bit tools and the 32-bit tools</div><div class='add'>+# need to be in the path.</div><div class='ctx'> CC_ARCHES_32 = hppa hppa2.0 hppa1.1</div><div class='ctx'> CC_SUFFIXES  = linux linux-gnu unknown-linux-gnu suse-linux</div><div class='ctx'> CROSS32_COMPILE := $(call cc-cross-prefix, \</div><div class='hunk'>@@ -139,7 +141,7 @@ palo lifimage: vmlinuz</div><div class='ctx'> 	fi</div><div class='ctx'> 	@if test ! -f "$(PALOCONF)"; then \</div><div class='ctx'> 		cp $(srctree)/arch/parisc/defpalo.conf $(objtree)/palo.conf; \</div><div class='del'>-		echo 'A generic palo config file ($(objree)/palo.conf) has been created for you.'; \</div><div class='add'>+		echo 'A generic palo config file ($(objtree)/palo.conf) has been created for you.'; \</div><div class='ctx'> 		echo 'You should check it and re-run "make palo".'; \</div><div class='ctx'> 		echo 'WARNING: the "lifimage" file is now placed in this directory by default!'; \</div><div class='ctx'> 		false; \</div><div class='head'>diff --git a/arch/parisc/boot/compressed/Makefile b/arch/parisc/boot/compressed/Makefile<br/>index 92227fa813dc..17c42d718eb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/boot/compressed/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/boot/compressed/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/boot/compressed/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/boot/compressed/Makefile</a></div><div class='hunk'>@@ -18,6 +18,7 @@ KBUILD_CFLAGS += -fno-PIE -mno-space-regs -mdisable-fpregs -Os</div><div class='ctx'> ifndef CONFIG_64BIT</div><div class='ctx'> KBUILD_CFLAGS += -mfast-indirect-calls</div><div class='ctx'> endif</div><div class='add'>+KBUILD_CFLAGS += -std=gnu11</div><div class='ctx'> </div><div class='ctx'> LDFLAGS_vmlinux := -X -e startup --as-needed -T</div><div class='ctx'> $(obj)/vmlinux: $(obj)/vmlinux.lds $(addprefix $(obj)/, $(OBJECTS)) $(LIBGCC) FORCE</div><div class='head'>diff --git a/arch/parisc/configs/generic-32bit_defconfig b/arch/parisc/configs/generic-32bit_defconfig<br/>index 5ce258f3fffa..94928d114d4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/configs/generic-32bit_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/configs/generic-32bit_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/configs/generic-32bit_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/configs/generic-32bit_defconfig</a></div><div class='hunk'>@@ -132,11 +132,11 @@ CONFIG_I2C=y</div><div class='ctx'> CONFIG_HWMON=m</div><div class='ctx'> CONFIG_DRM=m</div><div class='ctx'> CONFIG_DRM_DISPLAY_DP_AUX_CEC=y</div><div class='del'>-# CONFIG_DRM_I2C_CH7006 is not set</div><div class='del'>-# CONFIG_DRM_I2C_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_RADEON=m</div><div class='ctx'> CONFIG_DRM_NOUVEAU=m</div><div class='ctx'> # CONFIG_DRM_NOUVEAU_BACKLIGHT is not set</div><div class='add'>+# CONFIG_DRM_NOUVEAU_CH7006 is not set</div><div class='add'>+# CONFIG_DRM_NOUVEAU_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_VGEM=m</div><div class='ctx'> CONFIG_DRM_UDL=m</div><div class='ctx'> CONFIG_DRM_MGAG200=m</div><div class='hunk'>@@ -251,7 +251,7 @@ CONFIG_CIFS=m</div><div class='ctx'> CONFIG_CIFS_XATTR=y</div><div class='ctx'> CONFIG_CIFS_POSIX=y</div><div class='ctx'> # CONFIG_CIFS_DEBUG is not set</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='hunk'>@@ -264,8 +264,6 @@ CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1=y</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/parisc/configs/generic-64bit_defconfig b/arch/parisc/configs/generic-64bit_defconfig<br/>index 19a804860ed5..d8cd7f858b2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/configs/generic-64bit_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/configs/generic-64bit_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/configs/generic-64bit_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/configs/generic-64bit_defconfig</a></div><div class='hunk'>@@ -193,11 +193,11 @@ CONFIG_MEDIA_SUPPORT=m</div><div class='ctx'> CONFIG_AGP=y</div><div class='ctx'> CONFIG_AGP_PARISC=y</div><div class='ctx'> CONFIG_DRM=y</div><div class='del'>-# CONFIG_DRM_I2C_CH7006 is not set</div><div class='del'>-# CONFIG_DRM_I2C_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_RADEON=y</div><div class='ctx'> CONFIG_DRM_NOUVEAU=m</div><div class='ctx'> # CONFIG_DRM_NOUVEAU_BACKLIGHT is not set</div><div class='add'>+# CONFIG_DRM_NOUVEAU_CH7006 is not set</div><div class='add'>+# CONFIG_DRM_NOUVEAU_SIL164 is not set</div><div class='ctx'> CONFIG_DRM_MGAG200=m</div><div class='ctx'> CONFIG_FB=y</div><div class='ctx'> CONFIG_FB_PM2=m</div><div class='hunk'>@@ -268,7 +268,6 @@ CONFIG_PROC_KCORE=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_TMPFS_XATTR=y</div><div class='ctx'> CONFIG_CONFIGFS_FS=y</div><div class='del'>-CONFIG_SYSV_FS=y</div><div class='ctx'> CONFIG_NFS_FS=m</div><div class='ctx'> CONFIG_NFS_V4=m</div><div class='ctx'> CONFIG_NFS_V4_1=y</div><div class='hunk'>@@ -284,7 +283,6 @@ CONFIG_NLS_ASCII=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_ISO8859_2=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_FCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='hunk'>@@ -293,8 +291,6 @@ CONFIG_CRYPTO_MD5=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='head'>diff --git a/arch/parisc/include/asm/alternative.h b/arch/parisc/include/asm/alternative.h<br/>index 1eb488f25b83..1601ae4b888d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/alternative.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/alternative.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/alternative.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/alternative.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #define INSN_PxTLB	0x02		/* modify pdtlb, pitlb */</div><div class='ctx'> #define INSN_NOP	0x08000240	/* nop */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -61,6 +61,6 @@ void apply_alternatives(struct alt_instr *start, struct alt_instr *end,</div><div class='ctx'> 	.word (new_instr_ptr - .)	!	\</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-#endif  /*  __ASSEMBLY__  */</div><div class='add'>+#endif  /*  __ASSEMBLER__  */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PARISC_ALTERNATIVE_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h<br/>index 000a28e1c5e8..c20261604f09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/assembly.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/assembly.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/assembly.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/assembly.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> #define SR_TEMP2	2</div><div class='ctx'> #define SR_USER		3</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> #define LDREG	ldd</div><div class='hunk'>@@ -582,5 +582,5 @@</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/include/asm/barrier.h b/arch/parisc/include/asm/barrier.h<br/>index c705decf2bed..519b1903c5ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/barrier.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/barrier.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/barrier.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/barrier.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* The synchronize caches instruction executes as a nop on systems in</div><div class='ctx'>    which all memory references are performed in order. */</div><div class='hunk'>@@ -93,5 +93,5 @@ do {									\</div><div class='ctx'> })</div><div class='ctx'> #include &lt;asm-generic/barrier.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* __ASM_BARRIER_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h<br/>index 0ec9cfc5131f..bd1280a8a5ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/bitops.h</a></div><div class='hunk'>@@ -123,7 +123,7 @@ static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)</div><div class='ctx'>  * cycles for each mispredicted branch.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static __inline__ unsigned long __ffs(unsigned long x)</div><div class='add'>+static __inline__ __attribute_const__ unsigned long __ffs(unsigned long x)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ret;</div><div class='ctx'> </div><div class='hunk'>@@ -161,7 +161,7 @@ static __inline__ unsigned long __ffs(unsigned long x)</div><div class='ctx'>  * This is defined the same way as the libc and compiler builtin</div><div class='ctx'>  * ffs routines, therefore differs in spirit from the above ffz (man ffs).</div><div class='ctx'>  */</div><div class='del'>-static __inline__ int ffs(int x)</div><div class='add'>+static __inline__ __attribute_const__ int ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	return x ? (__ffs((unsigned long)x) + 1) : 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -171,7 +171,7 @@ static __inline__ int ffs(int x)</div><div class='ctx'>  * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static __inline__ int fls(unsigned int x)</div><div class='add'>+static __inline__ __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	if (!x)</div><div class='head'>diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h<br/>index a3f0f100f219..3f8d3be6ef24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/cache.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #define L1_CACHE_BYTES 16</div><div class='ctx'> #define L1_CACHE_SHIFT 4</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define SMP_CACHE_BYTES L1_CACHE_BYTES</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +66,7 @@ void parisc_setup_cache_timing(void);</div><div class='ctx'> 			ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")</div><div class='ctx'> #define asm_syncdma()	asm volatile("syncdma" :::"memory")</div><div class='ctx'> </div><div class='del'>-#endif /* ! __ASSEMBLY__ */</div><div class='add'>+#endif /* ! __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Classes of processor wrt: disabling space register hashing */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/current.h b/arch/parisc/include/asm/current.h<br/>index dc7aea07c3f3..2814529a4c28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/current.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/current.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/current.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/current.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_PARISC_CURRENT_H</div><div class='ctx'> #define _ASM_PARISC_CURRENT_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='ctx'> static __always_inline struct task_struct *get_current(void)</div><div class='hunk'>@@ -16,6 +16,6 @@ static __always_inline struct task_struct *get_current(void)</div><div class='ctx'> </div><div class='ctx'> #define current get_current()</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PARISC_CURRENT_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/dwarf.h b/arch/parisc/include/asm/dwarf.h<br/>index f4512db86a19..526f4a79262c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/dwarf.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/dwarf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/dwarf.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/dwarf.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_PARISC_DWARF_H</div><div class='ctx'> #define _ASM_PARISC_DWARF_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define CFI_STARTPROC	.cfi_startproc</div><div class='ctx'> #define CFI_ENDPROC	.cfi_endproc</div><div class='hunk'>@@ -15,6 +15,6 @@</div><div class='ctx'> #define CFI_REL_OFFSET	.cfi_rel_offset</div><div class='ctx'> #define CFI_UNDEFINED	.cfi_undefined</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_PARISC_DWARF_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/fixmap.h b/arch/parisc/include/asm/fixmap.h<br/>index 5cd80ce1163a..9cafa449c4a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/fixmap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/fixmap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/fixmap.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> #define KERNEL_MAP_START	(GATEWAY_PAGE_SIZE)</div><div class='ctx'> #define KERNEL_MAP_END		(FIXMAP_START)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> enum fixed_addresses {</div><div class='hunk'>@@ -59,6 +59,6 @@ extern void *parisc_vmalloc_start;</div><div class='ctx'> void set_fixmap(enum fixed_addresses idx, phys_addr_t phys);</div><div class='ctx'> void clear_fixmap(enum fixed_addresses idx);</div><div class='ctx'> </div><div class='del'>-#endif /*__ASSEMBLY__*/</div><div class='add'>+#endif /*__ASSEMBLER__*/</div><div class='ctx'> </div><div class='ctx'> #endif /*_ASM_FIXMAP_H*/</div><div class='head'>diff --git a/arch/parisc/include/asm/floppy.h b/arch/parisc/include/asm/floppy.h<br/>index b318a7df52f6..f15b69fea901 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/floppy.h</a></div><div class='hunk'>@@ -8,9 +8,9 @@</div><div class='ctx'> #ifndef __ASM_PARISC_FLOPPY_H</div><div class='ctx'> #define __ASM_PARISC_FLOPPY_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The DMA channel used by the floppy controller cannot access data at</div><div class='ctx'>  * addresses &gt;= 16MB</div><div class='hunk'>@@ -20,15 +20,12 @@</div><div class='ctx'>  * floppy accesses go through the track buffer.</div><div class='ctx'>  */</div><div class='ctx'> #define _CROSS_64KB(a,s,vdma) \</div><div class='del'>-(!(vdma) &amp;&amp; ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))</div><div class='del'>-</div><div class='del'>-#define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma &amp; 1)</div><div class='del'>-</div><div class='add'>+	(!(vdma) &amp;&amp; \</div><div class='add'>+	 ((unsigned long)(a) / SZ_64K != ((unsigned long)(a) + (s) - 1) / SZ_64K))</div><div class='ctx'> </div><div class='ctx'> #define SW fd_routine[use_virtual_dma&amp;1]</div><div class='ctx'> #define CSW fd_routine[can_use_virtual_dma &amp; 1]</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #define fd_inb(base, reg)		readb((base) + (reg))</div><div class='ctx'> #define fd_outb(value, base, reg)	writeb(value, (base) + (reg))</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +203,7 @@ static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)</div><div class='ctx'> static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)</div><div class='ctx'> {</div><div class='ctx'> #ifdef FLOPPY_SANITY_CHECK</div><div class='del'>-	if (CROSS_64KB(addr, size)) {</div><div class='add'>+	if (_CROSS_64KB(addr, size, use_virtual_dma &amp; 1)) {</div><div class='ctx'> 		printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/parisc/include/asm/ftrace.h b/arch/parisc/include/asm/ftrace.h<br/>index f1cc1ee3a647..8b89d2b642eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/ftrace.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_PARISC_FTRACE_H</div><div class='ctx'> #define _ASM_PARISC_FTRACE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void mcount(void);</div><div class='ctx'> </div><div class='ctx'> #define MCOUNT_ADDR		((unsigned long)mcount)</div><div class='hunk'>@@ -29,6 +29,6 @@ unsigned long ftrace_call_adjust(unsigned long addr);</div><div class='ctx'> </div><div class='ctx'> #define ftrace_return_address(n) return_address(n)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PARISC_FTRACE_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/hugetlb.h b/arch/parisc/include/asm/hugetlb.h<br/>index 72daacc472a0..21e9ace17739 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -10,22 +10,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR</div><div class='ctx'> pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pte_t *ptep);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If the arch doesn't supply something else, assume that hugepage</div><div class='del'>- * size aligned regions are ok without further preparation.</div><div class='del'>- */</div><div class='del'>-#define __HAVE_ARCH_PREPARE_HUGEPAGE_RANGE</div><div class='del'>-static inline int prepare_hugepage_range(struct file *file,</div><div class='del'>-			unsigned long addr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-	if (len &amp; ~HPAGE_MASK)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (addr &amp; ~HPAGE_MASK)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+			      pte_t *ptep, unsigned long sz);</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_CLEAR_FLUSH</div><div class='ctx'> static inline pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='head'>diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h<br/>index a63190af2f05..f01ad3ad60b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/io.h</a></div><div class='hunk'>@@ -131,17 +131,10 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr)</div><div class='ctx'> 		       _PAGE_ACCESSED | _PAGE_NO_CACHE)</div><div class='ctx'> </div><div class='ctx'> #define ioremap_wc(addr, size)  \</div><div class='del'>-	ioremap_prot((addr), (size), _PAGE_IOREMAP)</div><div class='add'>+	ioremap_prot((addr), (size), __pgprot(_PAGE_IOREMAP))</div><div class='ctx'> </div><div class='ctx'> #define pci_iounmap			pci_iounmap</div><div class='ctx'> </div><div class='del'>-void memset_io(volatile void __iomem *addr, unsigned char val, int count);</div><div class='del'>-void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);</div><div class='del'>-void memcpy_toio(volatile void __iomem *dst, const void *src, int count);</div><div class='del'>-#define memset_io memset_io</div><div class='del'>-#define memcpy_fromio memcpy_fromio</div><div class='del'>-#define memcpy_toio memcpy_toio</div><div class='del'>-</div><div class='ctx'> /* Port-space IO */</div><div class='ctx'> </div><div class='ctx'> #define inb_p inb</div><div class='hunk'>@@ -231,36 +224,54 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);</div><div class='ctx'> #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='del'>-#define ioread64 ioread64</div><div class='del'>-#define ioread64be ioread64be</div><div class='del'>-#define iowrite64 iowrite64</div><div class='del'>-#define iowrite64be iowrite64be</div><div class='ctx'> extern u64 ioread64(const void __iomem *addr);</div><div class='ctx'> extern u64 ioread64be(const void __iomem *addr);</div><div class='add'>+#define ioread64 ioread64</div><div class='add'>+#define ioread64be ioread64be</div><div class='add'>+</div><div class='ctx'> extern void iowrite64(u64 val, void __iomem *addr);</div><div class='ctx'> extern void iowrite64be(u64 val, void __iomem *addr);</div><div class='add'>+#define iowrite64 iowrite64</div><div class='add'>+#define iowrite64be iowrite64be</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#include &lt;asm-generic/iomap.h&gt;</div><div class='del'>-/*</div><div class='del'>- * These get provided from &lt;asm-generic/iomap.h&gt; since parisc does not</div><div class='del'>- * select GENERIC_IOMAP.</div><div class='del'>- */</div><div class='add'>+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);</div><div class='add'>+extern void ioport_unmap(void __iomem *);</div><div class='ctx'> #define ioport_map ioport_map</div><div class='ctx'> #define ioport_unmap ioport_unmap</div><div class='add'>+</div><div class='add'>+extern unsigned int ioread8(const void __iomem *);</div><div class='add'>+extern unsigned int ioread16(const void __iomem *);</div><div class='add'>+extern unsigned int ioread16be(const void __iomem *);</div><div class='add'>+extern unsigned int ioread32(const void __iomem *);</div><div class='add'>+extern unsigned int ioread32be(const void __iomem *);</div><div class='ctx'> #define ioread8 ioread8</div><div class='ctx'> #define ioread16 ioread16</div><div class='ctx'> #define ioread32 ioread32</div><div class='ctx'> #define ioread16be ioread16be</div><div class='ctx'> #define ioread32be ioread32be</div><div class='add'>+</div><div class='add'>+extern void iowrite8(u8, void __iomem *);</div><div class='add'>+extern void iowrite16(u16, void __iomem *);</div><div class='add'>+extern void iowrite16be(u16, void __iomem *);</div><div class='add'>+extern void iowrite32(u32, void __iomem *);</div><div class='add'>+extern void iowrite32be(u32, void __iomem *);</div><div class='ctx'> #define iowrite8 iowrite8</div><div class='ctx'> #define iowrite16 iowrite16</div><div class='ctx'> #define iowrite32 iowrite32</div><div class='ctx'> #define iowrite16be iowrite16be</div><div class='ctx'> #define iowrite32be iowrite32be</div><div class='add'>+</div><div class='add'>+extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='add'>+extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='add'>+extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);</div><div class='ctx'> #define ioread8_rep ioread8_rep</div><div class='ctx'> #define ioread16_rep ioread16_rep</div><div class='ctx'> #define ioread32_rep ioread32_rep</div><div class='add'>+</div><div class='add'>+extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='add'>+extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='add'>+extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);</div><div class='ctx'> #define iowrite8_rep iowrite8_rep</div><div class='ctx'> #define iowrite16_rep iowrite16_rep</div><div class='ctx'> #define iowrite32_rep iowrite32_rep</div><div class='head'>diff --git a/arch/parisc/include/asm/jump_label.h b/arch/parisc/include/asm/jump_label.h<br/>index 317ebc5edc9f..f325ae3c622f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/jump_label.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_PARISC_JUMP_LABEL_H</div><div class='ctx'> #define _ASM_PARISC_JUMP_LABEL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -44,5 +44,5 @@ l_yes:</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='add'>+#endif  /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/include/asm/kexec.h b/arch/parisc/include/asm/kexec.h<br/>index 87e174006995..bf31e2d50df9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/kexec.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/kexec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/kexec.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/kexec.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #define KEXEC_ARCH KEXEC_ARCH_PARISC</div><div class='ctx'> #define ARCH_HAS_KIMAGE_ARCH</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct kimage_arch {</div><div class='ctx'> 	unsigned long initrd_start;</div><div class='hunk'>@@ -28,6 +28,6 @@ static inline void crash_setup_regs(struct pt_regs *newregs,</div><div class='ctx'> 	/* Dummy implementation for now */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_PARISC_KEXEC_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/kgdb.h b/arch/parisc/include/asm/kgdb.h<br/>index 317cd434bee3..9ece98bc6d9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/kgdb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/kgdb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/kgdb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/kgdb.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> #define CACHE_FLUSH_IS_SAFE		1</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline void arch_kgdb_breakpoint(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/include/asm/linkage.h b/arch/parisc/include/asm/linkage.h<br/>index cd6fe4febead..d4cad492b971 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/linkage.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/linkage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/linkage.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/linkage.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define ASM_NL	!</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define ENTRY(name) \</div><div class='ctx'> 	ALIGN	!\</div><div class='hunk'>@@ -35,6 +35,6 @@ name:		ASM_NL\</div><div class='ctx'> 	.procend	ASM_NL\</div><div class='ctx'> 	ENDPROC(name)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif  /* __ASM_PARISC_LINKAGE_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/asm/mman.h<br/>index 89b6beeda0b8..663f587dc789 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/mman.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #ifndef __ASM_MMAN_H__</div><div class='ctx'> #define __ASM_MMAN_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/mman.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* PARISC cannot allow mdwe as it needs writable stacks */</div><div class='hunk'>@@ -11,7 +12,7 @@ static inline bool arch_memory_deny_write_exec_supported(void)</div><div class='ctx'> }</div><div class='ctx'> #define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported</div><div class='ctx'> </div><div class='del'>-static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)</div><div class='add'>+static inline unsigned long arch_calc_vm_flag_bits(struct file *file, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The stack on parisc grows upwards, so if userspace requests memory</div><div class='hunk'>@@ -23,6 +24,6 @@ static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)</div><div class='add'>+#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags)</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_MMAN_H__ */</div><div class='head'>diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h<br/>index 4bea2e95798f..8f4e51071ea1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/page.h</a></div><div class='hunk'>@@ -4,13 +4,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='del'>-#define PAGE_SHIFT	CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE	(_AC(1,UL) &lt;&lt; PAGE_SHIFT)</div><div class='del'>-#define PAGE_MASK	(~(PAGE_SIZE-1))</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='hunk'>@@ -95,7 +93,7 @@ typedef struct __physmem_range {</div><div class='ctx'> extern physmem_range_t pmem_ranges[];</div><div class='ctx'> extern int npmem_ranges;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* WARNING: The definitions below must match exactly to sizeof(pte_t)</div><div class='ctx'>  * etc</div><div class='hunk'>@@ -141,7 +139,7 @@ extern int npmem_ranges;</div><div class='ctx'> #define KERNEL_BINARY_TEXT_START	(__PAGE_OFFSET + 0x100000)</div><div class='ctx'> </div><div class='ctx'> /* These macros don't work for 64-bit C code -- don't allow in C at all */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #   define PA(x)	((x)-__PAGE_OFFSET)</div><div class='ctx'> #   define VA(x)	((x)+__PAGE_OFFSET)</div><div class='ctx'> #endif</div><div class='hunk'>@@ -168,7 +166,6 @@ extern int npmem_ranges;</div><div class='ctx'> </div><div class='ctx'> #define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#define page_to_phys(page)	(page_to_pfn(page) &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='head'>diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h<br/>index 5d2d9737e579..6080a1516b34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pdc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pdc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pdc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/pdc.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/pdc.h&gt;</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> extern int parisc_narrow_firmware;</div><div class='ctx'> </div><div class='hunk'>@@ -109,5 +109,5 @@ static inline char * os_id_to_string(u16 os_id) {</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(__ASSEMBLY__) */</div><div class='add'>+#endif /* !defined(__ASSEMBLER__) */</div><div class='ctx'> #endif /* _PARISC_PDC_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/pdcpat.h b/arch/parisc/include/asm/pdcpat.h<br/>index 8f160375b865..84ac81b1adde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pdcpat.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pdcpat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pdcpat.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/pdcpat.h</a></div><div class='hunk'>@@ -210,7 +210,7 @@</div><div class='ctx'> #define PDC_PAT_SYSTEM_INFO	76L</div><div class='ctx'> /* PDC_PAT_SYSTEM_INFO uses the same options as PDC_SYSTEM_INFO function. */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='hunk'>@@ -389,6 +389,6 @@ extern int pdc_pat_mem_get_dimm_phys_location(</div><div class='ctx'>                 struct pdc_pat_mem_phys_mem_location *pret,</div><div class='ctx'>                 unsigned long phys_addr);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* ! __PARISC_PATPDC_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/perf_event.h b/arch/parisc/include/asm/perf_event.h<br/>index 1e0fd8ba6c03..8a2925029d15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/perf_event.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/perf_event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/perf_event.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/perf_event.h</a></div><div class='hunk'>@@ -1,6 +1,12 @@</div><div class='ctx'> #ifndef __ASM_PARISC_PERF_EVENT_H</div><div class='ctx'> #define __ASM_PARISC_PERF_EVENT_H</div><div class='ctx'> </div><div class='del'>-/* Empty, just to avoid compiling error */</div><div class='add'>+#include &lt;asm/psw.h&gt;</div><div class='add'>+</div><div class='add'>+#define perf_arch_fetch_caller_regs(regs, __ip) { \</div><div class='add'>+	(regs)-&gt;gr[0] = KERNEL_PSW; \</div><div class='add'>+	(regs)-&gt;iaoq[0] = (__ip); \</div><div class='add'>+	asm volatile("copy %%sp, %0\n":"=r"((regs)-&gt;gr[30])); \</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PARISC_PERF_EVENT_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/pgalloc.h b/arch/parisc/include/asm/pgalloc.h<br/>index e3e142b1c5c5..3b84ee93edaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -11,27 +11,12 @@</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PMD_ALLOC_ONE</div><div class='del'>-#define __HAVE_ARCH_PMD_FREE</div><div class='del'>-#define __HAVE_ARCH_PGD_FREE</div><div class='ctx'> #include &lt;asm-generic/pgalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Allocate the top level pgd (page directory) */</div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *pgd;</div><div class='del'>-</div><div class='del'>-	pgd = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_TABLE_ORDER);</div><div class='del'>-	if (unlikely(pgd == NULL))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	memset(pgd, 0, PAGE_SIZE &lt;&lt; PGD_TABLE_ORDER);</div><div class='del'>-</div><div class='del'>-	return pgd;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	free_pages((unsigned long)pgd, PGD_TABLE_ORDER);</div><div class='add'>+	return __pgd_alloc(mm, PGD_TABLE_ORDER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS == 3</div><div class='hunk'>@@ -46,17 +31,19 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)</div><div class='ctx'> </div><div class='ctx'> static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	pmd_t *pmd;</div><div class='del'>-</div><div class='del'>-	pmd = (pmd_t *)__get_free_pages(GFP_PGTABLE_KERNEL, PMD_TABLE_ORDER);</div><div class='del'>-	if (likely(pmd))</div><div class='del'>-		memset ((void *)pmd, 0, PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER);</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='add'>+	struct ptdesc *ptdesc;</div><div class='add'>+	gfp_t gfp = GFP_PGTABLE_USER;</div><div class='ctx'> </div><div class='del'>-static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)</div><div class='del'>-{</div><div class='del'>-	free_pages((unsigned long)pmd, PMD_TABLE_ORDER);</div><div class='add'>+	if (mm == &amp;init_mm)</div><div class='add'>+		gfp = GFP_PGTABLE_KERNEL;</div><div class='add'>+	ptdesc = pagetable_alloc(gfp, PMD_TABLE_ORDER);</div><div class='add'>+	if (!ptdesc)</div><div class='add'>+		return NULL;</div><div class='add'>+	if (!pagetable_pmd_ctor(mm, ptdesc)) {</div><div class='add'>+		pagetable_free(ptdesc);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return ptdesc_address(ptdesc);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h<br/>index babf65751e81..2c139a4dbf4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * we simulate an x86-style page table for the linux mm code</div><div class='ctx'>  */</div><div class='hunk'>@@ -73,7 +73,7 @@ extern void __update_cache(pte_t pte);</div><div class='ctx'> 		mb();				\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define pte_ERROR(e) \</div><div class='ctx'> 	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))</div><div class='hunk'>@@ -226,7 +226,7 @@ extern void __update_cache(pte_t pte);</div><div class='ctx'> #define PxD_FLAG_SHIFT    (4)</div><div class='ctx'> #define PxD_VALUE_SHIFT   (PFN_PTE_SHIFT-PxD_FLAG_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define PAGE_NONE	__pgprot(_PAGE_PRESENT | _PAGE_USER)</div><div class='ctx'> #define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE)</div><div class='hunk'>@@ -276,7 +276,7 @@ extern unsigned long *empty_zero_page;</div><div class='ctx'> #define pte_none(x)     (pte_val(x) == 0)</div><div class='ctx'> #define pte_present(x)	(pte_val(x) &amp; _PAGE_PRESENT)</div><div class='ctx'> #define pte_user(x)	(pte_val(x) &amp; _PAGE_USER)</div><div class='del'>-#define pte_clear(mm, addr, xp)  set_pte(xp, __pte(0))</div><div class='add'>+#define pte_clear(mm, addr, xp) set_pte_at((mm), (addr), (xp), __pte(0))</div><div class='ctx'> </div><div class='ctx'> #define pmd_flag(x)	(pmd_val(x) &amp; PxD_FLAG_MASK)</div><div class='ctx'> #define pmd_address(x)	((unsigned long)(pmd_val(x) &amp;~ PxD_FLAG_MASK) &lt;&lt; PxD_VALUE_SHIFT)</div><div class='hunk'>@@ -338,10 +338,6 @@ static inline pte_t pte_mkspecial(pte_t pte)	{ pte_val(pte) |= _PAGE_SPECIAL; re</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='ctx'> #define __mk_pte(addr,pgprot) \</div><div class='ctx'> ({									\</div><div class='ctx'> 	pte_t __pte;							\</div><div class='hunk'>@@ -351,8 +347,6 @@ static inline pte_t pte_mkspecial(pte_t pte)	{ pte_val(pte) |= _PAGE_SPECIAL; re</div><div class='ctx'> 	__pte;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))</div><div class='del'>-</div><div class='ctx'> static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte;</div><div class='hunk'>@@ -398,6 +392,7 @@ static inline void set_ptes(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #define set_ptes set_ptes</div><div class='add'>+#define set_pte_at(mm, addr, ptep, pte) set_ptes(mm, addr, ptep, pte, 1)</div><div class='ctx'> </div><div class='ctx'> /* Used for deferring calls to flush_dcache_page() */</div><div class='ctx'> </div><div class='hunk'>@@ -431,7 +426,7 @@ static inline void set_ptes(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -462,7 +457,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned</div><div class='ctx'> 	if (!pte_young(pte)) {</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	set_pte(ptep, pte_mkold(pte));</div><div class='add'>+	set_pte_at(vma-&gt;vm_mm, addr, ptep, pte_mkold(pte));</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -472,12 +467,12 @@ pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, pte_t *pt</div><div class='ctx'> struct mm_struct;</div><div class='ctx'> static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	set_pte(ptep, pte_wrprotect(*ptep));</div><div class='add'>+	set_pte_at(mm, addr, ptep, pte_wrprotect(*ptep));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define pte_same(A,B)	(pte_val(A) == pte_val(B))</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* TLB page size encoding - see table 3-1 in parisc20.pdf */</div><div class='head'>diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h<br/>index 6e63f720024d..748eefb27c68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/prefetch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/prefetch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/prefetch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/prefetch.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #ifndef __ASM_PARISC_PREFETCH_H</div><div class='ctx'> #define __ASM_PARISC_PREFETCH_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef CONFIG_PREFETCH</div><div class='ctx'> </div><div class='ctx'> #define ARCH_HAS_PREFETCH</div><div class='hunk'>@@ -40,6 +40,6 @@ static inline void prefetchw(const void *addr)</div><div class='ctx'> #endif /* CONFIG_PA20 */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PREFETCH */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PARISC_PROCESSOR_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h<br/>index 77fac02188e1..dd0b5e199559 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/processor.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #ifndef __ASM_PARISC_PROCESSOR_H</div><div class='ctx'> #define __ASM_PARISC_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;linux/irqreturn.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define HAVE_ARCH_PICK_MMAP_LAYOUT</div><div class='ctx'> </div><div class='hunk'>@@ -45,10 +45,10 @@</div><div class='ctx'> #define STACK_TOP	TASK_SIZE</div><div class='ctx'> #define STACK_TOP_MAX	DEFAULT_TASK_SIZE</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct rlimit;</div><div class='del'>-unsigned long mmap_upper_limit(struct rlimit *rlim_stack);</div><div class='add'>+unsigned long mmap_upper_limit(const struct rlimit *rlim_stack);</div><div class='ctx'> unsigned long calc_max_stack_size(unsigned long stack_max);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -325,6 +325,6 @@ extern void sba_directed_lmmio(struct parisc_device *, struct resource *);</div><div class='ctx'> extern void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask);</div><div class='ctx'> extern void ccio_cujo20_fixup(struct parisc_device *dev, u32 iovp);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_PARISC_PROCESSOR_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/psw.h b/arch/parisc/include/asm/psw.h<br/>index 46921ffcc407..9140e1ab7e63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/psw.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/psw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/psw.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/psw.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> #define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)</div><div class='ctx'> #define USER_PSW      (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* The program status word as bitfields.  */</div><div class='ctx'> struct pa_psw {</div><div class='hunk'>@@ -99,6 +99,6 @@ struct pa_psw {</div><div class='ctx'> #define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/include/asm/signal.h b/arch/parisc/include/asm/signal.h<br/>index e84883c6b4c7..85c3d7409bbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/signal.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/signal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/signal.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/signal.h</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/signal.h&gt;</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Most things should be clean enough to redefine this at will, if care</div><div class='ctx'>    is taken to make libc match.  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_PARISC_SIGNAL_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h<br/>index 94d1f21ce99a..0cf1c3a2696a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/smp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/smp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/smp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/smp.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@ extern int init_per_cpu(int cpuid);</div><div class='ctx'> #define PDC_OS_BOOT_RENDEZVOUS     0x10</div><div class='ctx'> #define PDC_OS_BOOT_RENDEZVOUS_HI  0x28</div><div class='ctx'> </div><div class='del'>-#ifndef ASSEMBLY</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;	/* for NR_CPUS */</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='hunk'>@@ -34,7 +34,7 @@ extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);</div><div class='ctx'> </div><div class='ctx'> #define raw_smp_processor_id()		(current_thread_info()-&gt;cpu)</div><div class='ctx'> </div><div class='del'>-#endif /* !ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_SMP */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h<br/>index 51f40eaf7780..1013eeba31e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/special_insns.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/special_insns.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/special_insns.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/special_insns.h</a></div><div class='hunk'>@@ -32,6 +32,34 @@</div><div class='ctx'> 	pa;						\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * prober_user() - Probe user read access</div><div class='add'>+ * @sr:		Space regster.</div><div class='add'>+ * @va:		Virtual address.</div><div class='add'>+ *</div><div class='add'>+ * Return: Non-zero if address is accessible.</div><div class='add'>+ *</div><div class='add'>+ * Due to the way _PAGE_READ is handled in TLB entries, we need</div><div class='add'>+ * a special check to determine whether a user address is accessible.</div><div class='add'>+ * The ldb instruction does the initial access check. If it is</div><div class='add'>+ * successful, the probe instruction checks user access rights.</div><div class='add'>+ */</div><div class='add'>+#define prober_user(sr, va)	({			\</div><div class='add'>+	unsigned long read_allowed;			\</div><div class='add'>+	__asm__ __volatile__(				\</div><div class='add'>+		"copy %%r0,%0\n"			\</div><div class='add'>+		"8:\tldb 0(%%sr%1,%2),%%r0\n"		\</div><div class='add'>+		"\tproberi (%%sr%1,%2),%3,%0\n"		\</div><div class='add'>+		"9:\n"					\</div><div class='add'>+		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b,	\</div><div class='add'>+				"or %%r0,%%r0,%%r0")	\</div><div class='add'>+		: "=&amp;r" (read_allowed)			\</div><div class='add'>+		: "i" (sr), "r" (va), "i" (PRIV_USER)	\</div><div class='add'>+		: "memory"				\</div><div class='add'>+	);						\</div><div class='add'>+	read_allowed;					\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #define CR_EIEM 15	/* External Interrupt Enable Mask */</div><div class='ctx'> #define CR_CR16 16	/* CR16 Interval Timer */</div><div class='ctx'> #define CR_EIRR 23	/* External Interrupt Request Register */</div><div class='head'>diff --git a/arch/parisc/include/asm/spinlock_types.h b/arch/parisc/include/asm/spinlock_types.h<br/>index 7b986b09dba8..8e6889bc23cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #define SPINLOCK_BREAK_INSN	0x0000c006	/* break 6,6 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='ctx'> 	volatile unsigned int lock[4];</div><div class='hunk'>@@ -26,7 +26,7 @@ typedef struct {</div><div class='ctx'> 	volatile unsigned int	counter;</div><div class='ctx'> } arch_rwlock_t;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define __ARCH_RW_LOCK_UNLOCKED__       0x01000000</div><div class='ctx'> #define __ARCH_RW_LOCK_UNLOCKED         { .lock_mutex = __ARCH_SPIN_LOCK_UNLOCKED, \</div><div class='head'>diff --git a/arch/parisc/include/asm/syscall.h b/arch/parisc/include/asm/syscall.h<br/>index 00b127a5e09b..c11222798ab2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/syscall.h</a></div><div class='hunk'>@@ -17,6 +17,13 @@ static inline long syscall_get_nr(struct task_struct *tsk,</div><div class='ctx'> 	return regs-&gt;gr[20];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *tsk,</div><div class='add'>+				  struct pt_regs *regs,</div><div class='add'>+				  int nr)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;gr[20] = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_get_arguments(struct task_struct *tsk,</div><div class='ctx'> 					 struct pt_regs *regs,</div><div class='ctx'> 					 unsigned long *args)</div><div class='hunk'>@@ -29,6 +36,18 @@ static inline void syscall_get_arguments(struct task_struct *tsk,</div><div class='ctx'> 	args[0] = regs-&gt;gr[26];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *tsk,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;gr[21] = args[5];</div><div class='add'>+	regs-&gt;gr[22] = args[4];</div><div class='add'>+	regs-&gt;gr[23] = args[3];</div><div class='add'>+	regs-&gt;gr[24] = args[2];</div><div class='add'>+	regs-&gt;gr[25] = args[1];</div><div class='add'>+	regs-&gt;gr[26] = args[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline long syscall_get_error(struct task_struct *task,</div><div class='ctx'> 				     struct pt_regs *regs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/include/asm/patch.h b/arch/parisc/include/asm/text-patching.h<br/>index 400d84c6e504..400d84c6e504 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/patch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/patch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/text-patching.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/text-patching.h</a></div><div class='head'>diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h<br/>index 1a58795f785c..b283738bb6da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_PARISC_THREAD_INFO_H</div><div class='ctx'> #define _ASM_PARISC_THREAD_INFO_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +20,7 @@ struct thread_info {</div><div class='ctx'> 	.preempt_count	= INIT_PREEMPT_COUNT,	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/traps.h b/arch/parisc/include/asm/traps.h<br/>index 0ccdb738a9a3..10c8fb68e404 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/traps.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/traps.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/traps.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/traps.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PARISC_ITLB_TRAP	6 /* defined by architecture. Do not change. */</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> struct pt_regs;</div><div class='ctx'> </div><div class='ctx'> /* traps.c */</div><div class='head'>diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h<br/>index 88d0ae5769dd..6c531d2c847e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/uaccess.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/uaccess.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/uaccess.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -42,9 +42,24 @@</div><div class='ctx'> 	__gu_err;					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define __get_user(val, ptr)				\</div><div class='del'>-({							\</div><div class='del'>-	__get_user_internal(SR_USER, val, ptr);	\</div><div class='add'>+#define __probe_user_internal(sr, error, ptr)			\</div><div class='add'>+({								\</div><div class='add'>+	__asm__("\tproberi (%%sr%1,%2),%3,%0\n"			\</div><div class='add'>+		"\tcmpiclr,= 1,%0,%0\n"				\</div><div class='add'>+		"\tldi %4,%0\n"					\</div><div class='add'>+		: "=r"(error)					\</div><div class='add'>+		: "i"(sr), "r"(ptr), "i"(PRIV_USER),		\</div><div class='add'>+		  "i"(-EFAULT));				\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define __get_user(val, ptr)					\</div><div class='add'>+({								\</div><div class='add'>+	register long __gu_err;					\</div><div class='add'>+								\</div><div class='add'>+	__gu_err = __get_user_internal(SR_USER, val, ptr);	\</div><div class='add'>+	if (likely(!__gu_err))					\</div><div class='add'>+		__probe_user_internal(SR_USER, __gu_err, ptr);	\</div><div class='add'>+	__gu_err;						\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> #define __get_user_asm(sr, val, ldx, ptr)		\</div><div class='head'>diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h<br/>index a97c0fd55f91..3e46c6ea9df6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/unistd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/unistd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/unistd.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #define __NR_Linux_syscalls	__NR_syscalls</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define SYS_ify(syscall_name)   __NR_##syscall_name</div><div class='ctx'> </div><div class='hunk'>@@ -144,7 +144,7 @@</div><div class='ctx'> #define __ARCH_WANT_SYS_UTIME</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #undef STR</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/vdso.h b/arch/parisc/include/asm/vdso.h<br/>index 2a2dc11b5545..81bc1d42802a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/vdso.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __PARISC_VDSO_H__</div><div class='ctx'> #define __PARISC_VDSO_H__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> #include &lt;generated/vdso64-offsets.h&gt;</div><div class='hunk'>@@ -12,9 +12,7 @@</div><div class='ctx'> #define VDSO64_SYMBOL(tsk, name) ((tsk)-&gt;mm-&gt;context.vdso_base + (vdso64_offset_##name))</div><div class='ctx'> #define VDSO32_SYMBOL(tsk, name) ((tsk)-&gt;mm-&gt;context.vdso_base + (vdso32_offset_##name))</div><div class='ctx'> </div><div class='del'>-extern struct vdso_data *vdso_data;</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY __ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Default link addresses for the vDSOs */</div><div class='ctx'> #define VDSO_LBASE	0</div><div class='head'>diff --git a/arch/parisc/include/asm/video.h b/arch/parisc/include/asm/video.h<br/>index c5dff3223194..a9d50ebd6e76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/video.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/asm/video.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/asm/video.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/asm/video.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> struct device;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_STI_CORE)</div><div class='add'>+#if defined(CONFIG_STI_CORE) &amp;&amp; defined(CONFIG_VIDEO)</div><div class='ctx'> bool video_is_primary_device(struct device *dev);</div><div class='ctx'> #define video_is_primary_device video_is_primary_device</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/ioctls.h b/arch/parisc/include/uapi/asm/ioctls.h<br/>index 82d1148c6379..74b4027a4e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/ioctls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/ioctls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/ioctls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/ioctls.h</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'> #define TCSETS		_IOW('T', 17, struct termios) /* TCSETATTR */</div><div class='ctx'> #define TCSETSW		_IOW('T', 18, struct termios) /* TCSETATTRD */</div><div class='ctx'> #define TCSETSF		_IOW('T', 19, struct termios) /* TCSETATTRF */</div><div class='del'>-#define TCGETA		_IOR('T', 1, struct termio)</div><div class='del'>-#define TCSETA		_IOW('T', 2, struct termio)</div><div class='del'>-#define TCSETAW		_IOW('T', 3, struct termio)</div><div class='del'>-#define TCSETAF		_IOW('T', 4, struct termio)</div><div class='add'>+#define TCGETA          0x40125401</div><div class='add'>+#define TCSETA          0x80125402</div><div class='add'>+#define TCSETAW         0x80125403</div><div class='add'>+#define TCSETAF         0x80125404</div><div class='ctx'> #define TCSBRK		_IO('T', 5)</div><div class='ctx'> #define TCXONC		_IO('T', 6)</div><div class='ctx'> #define TCFLSH		_IO('T', 7)</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/mman.h b/arch/parisc/include/uapi/asm/mman.h<br/>index 68c44f99bc93..b6a709506987 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/mman.h</a></div><div class='hunk'>@@ -75,6 +75,9 @@</div><div class='ctx'> #define MADV_HWPOISON     100		/* poison a page for testing */</div><div class='ctx'> #define MADV_SOFT_OFFLINE 101		/* soft offline page for testing */</div><div class='ctx'> </div><div class='add'>+#define MADV_GUARD_INSTALL 102		/* fatal signal on access to range */</div><div class='add'>+#define MADV_GUARD_REMOVE 103		/* unguard range */</div><div class='add'>+</div><div class='ctx'> /* compatibility flags */</div><div class='ctx'> #define MAP_FILE	0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/pdc.h b/arch/parisc/include/uapi/asm/pdc.h<br/>index fef4f2e96160..65031ddf8372 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/pdc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/pdc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/pdc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/pdc.h</a></div><div class='hunk'>@@ -361,7 +361,7 @@</div><div class='ctx'> /* size of the pdc_result buffer for firmware.c */</div><div class='ctx'> #define NUM_PDC_RESULT	32</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> /* flags for hardware_path */</div><div class='ctx'> #define	PF_AUTOBOOT	0x80</div><div class='hunk'>@@ -741,6 +741,6 @@ struct pdc_firm_test_get_rtn_block {   /* PDC_MODEL/PDC_FIRM_TEST_GET */</div><div class='ctx'> #define PIRANHA_CPU_ID		0x13</div><div class='ctx'> #define MAKO_CPU_ID		0x14</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(__ASSEMBLY__) */</div><div class='add'>+#endif /* !defined(__ASSEMBLER__) */</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_PARISC_PDC_H */</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/perf_regs.h b/arch/parisc/include/uapi/asm/perf_regs.h<br/>new file mode 100644<br/>index 000000000000..1ae687bb3d3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/perf_regs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/perf_regs.h</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_ASM_PARISC_PERF_REGS_H</div><div class='add'>+#define _UAPI_ASM_PARISC_PERF_REGS_H</div><div class='add'>+</div><div class='add'>+/* see struct user_regs_struct */</div><div class='add'>+enum perf_event_parisc_regs {</div><div class='add'>+	PERF_REG_PARISC_R0,	/* PSW is in gr[0] */</div><div class='add'>+	PERF_REG_PARISC_R1,</div><div class='add'>+	PERF_REG_PARISC_R2,</div><div class='add'>+	PERF_REG_PARISC_R3,</div><div class='add'>+	PERF_REG_PARISC_R4,</div><div class='add'>+	PERF_REG_PARISC_R5,</div><div class='add'>+	PERF_REG_PARISC_R6,</div><div class='add'>+	PERF_REG_PARISC_R7,</div><div class='add'>+	PERF_REG_PARISC_R8,</div><div class='add'>+	PERF_REG_PARISC_R9,</div><div class='add'>+	PERF_REG_PARISC_R10,</div><div class='add'>+	PERF_REG_PARISC_R11,</div><div class='add'>+	PERF_REG_PARISC_R12,</div><div class='add'>+	PERF_REG_PARISC_R13,</div><div class='add'>+	PERF_REG_PARISC_R14,</div><div class='add'>+	PERF_REG_PARISC_R15,</div><div class='add'>+	PERF_REG_PARISC_R16,</div><div class='add'>+	PERF_REG_PARISC_R17,</div><div class='add'>+	PERF_REG_PARISC_R18,</div><div class='add'>+	PERF_REG_PARISC_R19,</div><div class='add'>+	PERF_REG_PARISC_R20,</div><div class='add'>+	PERF_REG_PARISC_R21,</div><div class='add'>+	PERF_REG_PARISC_R22,</div><div class='add'>+	PERF_REG_PARISC_R23,</div><div class='add'>+	PERF_REG_PARISC_R24,</div><div class='add'>+	PERF_REG_PARISC_R25,</div><div class='add'>+	PERF_REG_PARISC_R26,</div><div class='add'>+	PERF_REG_PARISC_R27,</div><div class='add'>+	PERF_REG_PARISC_R28,</div><div class='add'>+	PERF_REG_PARISC_R29,</div><div class='add'>+	PERF_REG_PARISC_R30,</div><div class='add'>+	PERF_REG_PARISC_R31,</div><div class='add'>+</div><div class='add'>+	PERF_REG_PARISC_SR0,</div><div class='add'>+	PERF_REG_PARISC_SR1,</div><div class='add'>+	PERF_REG_PARISC_SR2,</div><div class='add'>+	PERF_REG_PARISC_SR3,</div><div class='add'>+	PERF_REG_PARISC_SR4,</div><div class='add'>+	PERF_REG_PARISC_SR5,</div><div class='add'>+	PERF_REG_PARISC_SR6,</div><div class='add'>+	PERF_REG_PARISC_SR7,</div><div class='add'>+</div><div class='add'>+	PERF_REG_PARISC_IAOQ0,</div><div class='add'>+	PERF_REG_PARISC_IAOQ1,</div><div class='add'>+	PERF_REG_PARISC_IASQ0,</div><div class='add'>+	PERF_REG_PARISC_IASQ1,</div><div class='add'>+</div><div class='add'>+	PERF_REG_PARISC_SAR,	/* CR11 */</div><div class='add'>+	PERF_REG_PARISC_IIR,	/* CR19 */</div><div class='add'>+	PERF_REG_PARISC_ISR,	/* CR20 */</div><div class='add'>+	PERF_REG_PARISC_IOR,	/* CR21 */</div><div class='add'>+	PERF_REG_PARISC_IPSW,	/* CR22 */</div><div class='add'>+</div><div class='add'>+	PERF_REG_PARISC_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_ASM_PARISC_PERF_REGS_H */</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/signal.h b/arch/parisc/include/uapi/asm/signal.h<br/>index 40d7a574c5dd..d99accf37341 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/signal.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/signal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/signal.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/signal.h</a></div><div class='hunk'>@@ -61,7 +61,7 @@</div><div class='ctx'> #define _NSIG_BPW	(sizeof(unsigned long) * 8)</div><div class='ctx'> #define _NSIG_WORDS	(_NSIG / _NSIG_BPW)</div><div class='ctx'> </div><div class='del'>-# ifndef __ASSEMBLY__</div><div class='add'>+# ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #  include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -80,5 +80,5 @@ typedef struct sigaltstack {</div><div class='ctx'> 	__kernel_size_t ss_size;</div><div class='ctx'> } stack_t;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _UAPI_ASM_PARISC_SIGNAL_H */</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h<br/>index 38fc0b188e08..c16ec36dfee6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/socket.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/include/uapi/asm/socket.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -132,11 +132,20 @@</div><div class='ctx'> #define SO_PASSPIDFD		0x404A</div><div class='ctx'> #define SO_PEERPIDFD		0x404B</div><div class='ctx'> </div><div class='del'>-#define SO_DEVMEM_LINEAR	78</div><div class='add'>+#define SCM_TS_OPT_ID		0x404C</div><div class='add'>+</div><div class='add'>+#define SO_RCVPRIORITY		0x404D</div><div class='add'>+</div><div class='add'>+#define SO_DEVMEM_LINEAR	0x404E</div><div class='ctx'> #define SCM_DEVMEM_LINEAR	SO_DEVMEM_LINEAR</div><div class='del'>-#define SO_DEVMEM_DMABUF	79</div><div class='add'>+#define SO_DEVMEM_DMABUF	0x404F</div><div class='ctx'> #define SCM_DEVMEM_DMABUF	SO_DEVMEM_DMABUF</div><div class='del'>-#define SO_DEVMEM_DONTNEED	80</div><div class='add'>+#define SO_DEVMEM_DONTNEED	0x4050</div><div class='add'>+</div><div class='add'>+#define SO_PASSRIGHTS		0x4051</div><div class='add'>+</div><div class='add'>+#define SO_INQ			0x4052</div><div class='add'>+#define SCM_INQ			SO_INQ</div><div class='ctx'> </div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile<br/>index 5ab0467be70a..9157bc8bdf41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # Makefile for arch/parisc/kernel</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y		:= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)		:= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y		:= head.o cache.o pacache.o setup.o pdt.o traps.o time.o irq.o \</div><div class='ctx'> 		   syscall.o entry.o sys_parisc.o firmware.o \</div><div class='hunk'>@@ -38,6 +38,7 @@ obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY)	+= topology.o</div><div class='ctx'> obj-$(CONFIG_FUNCTION_TRACER)		+= ftrace.o</div><div class='ctx'> obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o</div><div class='ctx'> obj-$(CONFIG_JUMP_LABEL)		+= jump_label.o</div><div class='add'>+obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o perf_regs.o</div><div class='ctx'> obj-$(CONFIG_KGDB)			+= kgdb.o</div><div class='ctx'> obj-$(CONFIG_KPROBES)			+= kprobes.o</div><div class='ctx'> obj-$(CONFIG_KEXEC_CORE)		+= kexec.o relocate_kernel.o</div><div class='head'>diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c<br/>index 757816a7bd4b..9abfe65492c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'>  *    Copyright (C) 2002 Randolph Chung &lt;tausq with parisc-linux.org&gt;</div><div class='ctx'>  *    Copyright (C) 2003 James Bottomley &lt;jejb at parisc-linux.org&gt;</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='head'>diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c<br/>index db531e58d70e..4c5240d3a3c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/cache.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/cache.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/cache.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/cache.c</a></div><div class='hunk'>@@ -122,10 +122,10 @@ void __update_cache(pte_t pte)</div><div class='ctx'> 	pfn = folio_pfn(folio);</div><div class='ctx'> 	nr = folio_nr_pages(folio);</div><div class='ctx'> 	if (folio_flush_mapping(folio) &amp;&amp;</div><div class='del'>-	    test_bit(PG_dcache_dirty, &amp;folio-&gt;flags)) {</div><div class='add'>+	    test_bit(PG_dcache_dirty, &amp;folio-&gt;flags.f)) {</div><div class='ctx'> 		while (nr--)</div><div class='ctx'> 			flush_kernel_dcache_page_addr(pfn_va(pfn + nr));</div><div class='del'>-		clear_bit(PG_dcache_dirty, &amp;folio-&gt;flags);</div><div class='add'>+		clear_bit(PG_dcache_dirty, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	} else if (parisc_requires_coherency())</div><div class='ctx'> 		while (nr--)</div><div class='ctx'> 			flush_kernel_dcache_page_addr(pfn_va(pfn + nr));</div><div class='hunk'>@@ -429,7 +429,7 @@ static inline pte_t *get_ptep(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	return ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool pte_needs_flush(pte_t pte)</div><div class='add'>+static inline bool pte_needs_cache_flush(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return (pte_val(pte) &amp; (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE))</div><div class='ctx'> 		== (_PAGE_PRESENT | _PAGE_ACCESSED);</div><div class='hunk'>@@ -481,7 +481,7 @@ void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> 	pgoff_t pgoff;</div><div class='ctx'> </div><div class='ctx'> 	if (mapping &amp;&amp; !mapping_mapped(mapping)) {</div><div class='del'>-		set_bit(PG_dcache_dirty, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_dirty, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -630,7 +630,7 @@ static void flush_cache_page_if_present(struct vm_area_struct *vma,</div><div class='ctx'> 	ptep = get_ptep(vma-&gt;vm_mm, vmaddr);</div><div class='ctx'> 	if (ptep) {</div><div class='ctx'> 		pte = ptep_get(ptep);</div><div class='del'>-		needs_flush = pte_needs_flush(pte);</div><div class='add'>+		needs_flush = pte_needs_cache_flush(pte);</div><div class='ctx'> 		pte_unmap(ptep);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (needs_flush)</div><div class='hunk'>@@ -841,7 +841,7 @@ void flush_cache_vmap(unsigned long start, unsigned long end)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vm = find_vm_area((void *)start);</div><div class='del'>-	if (WARN_ON_ONCE(!vm)) {</div><div class='add'>+	if (!vm) {</div><div class='ctx'> 		flush_cache_all();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/parisc/kernel/drivers.c b/arch/parisc/kernel/drivers.c<br/>index 1e793f770f71..1f8936fc2292 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/drivers.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/drivers.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/drivers.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/drivers.c</a></div><div class='hunk'>@@ -995,6 +995,7 @@ static __init int qemu_print_iodc_data(struct device *lin_dev, void *data)</div><div class='ctx'> 	struct pdc_system_map_mod_info pdc_mod_info;</div><div class='ctx'> 	struct pdc_module_path mod_path;</div><div class='ctx'> </div><div class='add'>+	memset(&amp;iodc_data, 0, sizeof(iodc_data));</div><div class='ctx'> 	status = pdc_iodc_read(&amp;count, hpa, 0,</div><div class='ctx'> 		&amp;iodc_data, sizeof(iodc_data));</div><div class='ctx'> 	if (status != PDC_OK) {</div><div class='hunk'>@@ -1012,6 +1013,11 @@ static __init int qemu_print_iodc_data(struct device *lin_dev, void *data)</div><div class='ctx'> </div><div class='ctx'> 	mod_index = 0;</div><div class='ctx'> 	do {</div><div class='add'>+		/* initialize device path for old machines */</div><div class='add'>+		memset(&amp;mod_path, 0xff, sizeof(mod_path));</div><div class='add'>+		get_node_path(dev-&gt;dev.parent, &amp;mod_path.path);</div><div class='add'>+		mod_path.path.mod = dev-&gt;hw_path;</div><div class='add'>+		memset(&amp;pdc_mod_info, 0, sizeof(pdc_mod_info));</div><div class='ctx'> 		status = pdc_system_map_find_mods(&amp;pdc_mod_info,</div><div class='ctx'> 				&amp;mod_path, mod_index++);</div><div class='ctx'> 	} while (status == PDC_OK &amp;&amp; pdc_mod_info.mod_addr != hpa);</div><div class='head'>diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S<br/>index ea57bcc21dc5..f4bf61a34701 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/entry.S</a></div><div class='hunk'>@@ -499,6 +499,12 @@</div><div class='ctx'> 	 * this happens is quite subtle, read below */</div><div class='ctx'> 	.macro		make_insert_tlb	spc,pte,prot,tmp</div><div class='ctx'> 	space_to_prot   \spc \prot        /* create prot id from space */</div><div class='add'>+</div><div class='add'>+#if _PAGE_SPECIAL_BIT == _PAGE_DMB_BIT</div><div class='add'>+	/* need to drop DMB bit, as it's used as SPECIAL flag */</div><div class='add'>+	depi		0,_PAGE_SPECIAL_BIT,1,\pte</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* The following is the real subtlety.  This is depositing</div><div class='ctx'> 	 * T &lt;-&gt; _PAGE_REFTRAP</div><div class='ctx'> 	 * D &lt;-&gt; _PAGE_DIRTY</div><div class='hunk'>@@ -511,17 +517,18 @@</div><div class='ctx'> 	 * Finally, _PAGE_READ goes in the top bit of PL1 (so we</div><div class='ctx'> 	 * trigger an access rights trap in user space if the user</div><div class='ctx'> 	 * tries to read an unreadable page */</div><div class='del'>-#if _PAGE_SPECIAL_BIT == _PAGE_DMB_BIT</div><div class='del'>-	/* need to drop DMB bit, as it's used as SPECIAL flag */</div><div class='del'>-	depi		0,_PAGE_SPECIAL_BIT,1,\pte</div><div class='del'>-#endif</div><div class='ctx'> 	depd            \pte,8,7,\prot</div><div class='ctx'> </div><div class='ctx'> 	/* PAGE_USER indicates the page can be read with user privileges,</div><div class='ctx'> 	 * so deposit X1|11 to PL1|PL2 (remember the upper bit of PL1</div><div class='del'>-	 * contains _PAGE_READ) */</div><div class='add'>+	 * contains _PAGE_READ). While the kernel can't directly write</div><div class='add'>+	 * user pages which have _PAGE_WRITE zero, it can read pages</div><div class='add'>+	 * which have _PAGE_READ zero (PL &lt;= PL1). Thus, the kernel</div><div class='add'>+	 * exception fault handler doesn't trigger when reading pages</div><div class='add'>+	 * that aren't user read accessible */</div><div class='ctx'> 	extrd,u,*=      \pte,_PAGE_USER_BIT+32,1,%r0</div><div class='ctx'> 	depdi		7,11,3,\prot</div><div class='add'>+</div><div class='ctx'> 	/* If we're a gateway page, drop PL2 back to zero for promotion</div><div class='ctx'> 	 * to kernel privilege (so we can execute the page as kernel).</div><div class='ctx'> 	 * Any privilege promotion page always denys read and write */</div><div class='head'>diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c<br/>index c69f6d5946e9..042343492a28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/firmware.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/firmware.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/firmware.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/firmware.c</a></div><div class='hunk'>@@ -464,7 +464,8 @@ int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdc_lock, flags);</div><div class='del'>-	retval = mem_pdc_call(PDC_SYSTEM_MAP, PDC_FIND_MODULE, __pa(pdc_result), </div><div class='add'>+	memcpy(pdc_result2, mod_path, sizeof(*mod_path));</div><div class='add'>+	retval = mem_pdc_call(PDC_SYSTEM_MAP, PDC_FIND_MODULE, __pa(pdc_result),</div><div class='ctx'> 			      __pa(pdc_result2), mod_index);</div><div class='ctx'> 	convert_to_wide(pdc_result);</div><div class='ctx'> 	memcpy(pdc_mod_info, pdc_result, sizeof(*pdc_mod_info));</div><div class='head'>diff --git a/arch/parisc/kernel/ftrace.c b/arch/parisc/kernel/ftrace.c<br/>index c91f9c2e61ed..10fd5b3e63e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/ftrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/ftrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/ftrace.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> #include &lt;asm/assembly.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define __hot __section(".text.hot")</div><div class='ctx'> </div><div class='hunk'>@@ -87,7 +87,7 @@ int ftrace_enable_ftrace_graph_caller(void)</div><div class='ctx'> </div><div class='ctx'> int ftrace_disable_ftrace_graph_caller(void)</div><div class='ctx'> {</div><div class='del'>-	static_key_enable(&amp;ftrace_graph_enable.key);</div><div class='add'>+	static_key_disable(&amp;ftrace_graph_enable.key);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/parisc/kernel/jump_label.c b/arch/parisc/kernel/jump_label.c<br/>index e253b134500d..ea51f15bf0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/jump_label.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/jump_label.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/jump_label.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/jump_label.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline int reassemble_17(int as17)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/kernel/kgdb.c b/arch/parisc/kernel/kgdb.c<br/>index b16fa9bac5f4..fee81f877525 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/kgdb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/kgdb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/kgdb.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> const struct kgdb_arch arch_kgdb_ops = {</div><div class='head'>diff --git a/arch/parisc/kernel/kprobes.c b/arch/parisc/kernel/kprobes.c<br/>index 6e0b86652f30..9255adba67a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/kprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/kprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/kprobes.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;linux/kprobes.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;</div><div class='ctx'> DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);</div><div class='head'>diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c<br/>index c1587aa35beb..509146a52725 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/parisc_ksyms.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/parisc_ksyms.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/parisc_ksyms.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/parisc_ksyms.c</a></div><div class='hunk'>@@ -43,9 +43,6 @@ EXPORT_SYMBOL($global$);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-EXPORT_SYMBOL(memcpy_toio);</div><div class='del'>-EXPORT_SYMBOL(memcpy_fromio);</div><div class='del'>-EXPORT_SYMBOL(memset_io);</div><div class='ctx'> </div><div class='ctx'> extern void $$divI(void);</div><div class='ctx'> extern void $$divU(void);</div><div class='head'>diff --git a/arch/parisc/kernel/patch.c b/arch/parisc/kernel/patch.c<br/>index e59574f65e64..35dd764b871e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/patch.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/patch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/patch.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/patch.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct patch {</div><div class='ctx'> 	void *addr;</div><div class='head'>diff --git a/arch/parisc/kernel/pdt.c b/arch/parisc/kernel/pdt.c<br/>index 0f9b3b5914cf..b70b67adb855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/pdt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/pdt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/pdt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/pdt.c</a></div><div class='hunk'>@@ -63,6 +63,7 @@ static unsigned long pdt_entry[MAX_PDT_ENTRIES] __page_aligned_bss;</div><div class='ctx'> #define PDT_ADDR_PERM_ERR	(pdt_type != PDT_PDC ? 2UL : 0UL)</div><div class='ctx'> #define PDT_ADDR_SINGLE_ERR	1UL</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PROC_FS</div><div class='ctx'> /* report PDT entries via /proc/meminfo */</div><div class='ctx'> void arch_report_meminfo(struct seq_file *m)</div><div class='ctx'> {</div><div class='hunk'>@@ -74,6 +75,7 @@ void arch_report_meminfo(struct seq_file *m)</div><div class='ctx'> 	seq_printf(m, "PDT_cur_entries: %7lu\n",</div><div class='ctx'> 			pdt_status.pdt_entries);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static int get_info_pat_new(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/kernel/perf.c b/arch/parisc/kernel/perf.c<br/>index 5e8e37a722ef..5e10f98ce7b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/perf.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/perf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/perf.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/perf.c</a></div><div class='hunk'>@@ -475,9 +475,9 @@ static const struct file_operations perf_fops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct miscdevice perf_dev = {</div><div class='del'>-	MISC_DYNAMIC_MINOR,</div><div class='del'>-	PA_PERF_DEV,</div><div class='del'>-	&amp;perf_fops</div><div class='add'>+	.minor	= MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name	= PA_PERF_DEV,</div><div class='add'>+	.fops	= &amp;perf_fops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/parisc/kernel/perf_event.c b/arch/parisc/kernel/perf_event.c<br/>new file mode 100644<br/>index 000000000000..f90b83886ab4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/perf_event.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/perf_event.c</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Performance event support for parisc</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 by Helge Deller &lt;deller@gmx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/unwind.h&gt;</div><div class='add'>+</div><div class='add'>+void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,</div><div class='add'>+			   struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct unwind_frame_info info;</div><div class='add'>+</div><div class='add'>+	unwind_frame_init_task(&amp;info, current, NULL);</div><div class='add'>+	while (1) {</div><div class='add'>+		if (unwind_once(&amp;info) &lt; 0 || info.ip == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!__kernel_text_address(info.ip) ||</div><div class='add'>+			perf_callchain_store(entry, info.ip))</div><div class='add'>+				return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/parisc/kernel/perf_regs.c b/arch/parisc/kernel/perf_regs.c<br/>new file mode 100644<br/>index 000000000000..68458e2f6197<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/perf_regs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/perf_regs.c</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Copyright (C) 2025 by Helge Deller &lt;deller@gmx.de&gt; */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/perf_regs.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+u64 perf_reg_value(struct pt_regs *regs, int idx)</div><div class='add'>+{</div><div class='add'>+	switch (idx) {</div><div class='add'>+	case PERF_REG_PARISC_R0 ... PERF_REG_PARISC_R31:</div><div class='add'>+		return regs-&gt;gr[idx - PERF_REG_PARISC_R0];</div><div class='add'>+	case PERF_REG_PARISC_SR0 ... PERF_REG_PARISC_SR7:</div><div class='add'>+		return regs-&gt;sr[idx - PERF_REG_PARISC_SR0];</div><div class='add'>+	case PERF_REG_PARISC_IASQ0 ... PERF_REG_PARISC_IASQ1:</div><div class='add'>+		return regs-&gt;iasq[idx - PERF_REG_PARISC_IASQ0];</div><div class='add'>+	case PERF_REG_PARISC_IAOQ0 ... PERF_REG_PARISC_IAOQ1:</div><div class='add'>+		return regs-&gt;iasq[idx - PERF_REG_PARISC_IAOQ0];</div><div class='add'>+	case PERF_REG_PARISC_SAR:	/* CR11 */</div><div class='add'>+		return regs-&gt;sar;</div><div class='add'>+	case PERF_REG_PARISC_IIR:	/* CR19 */</div><div class='add'>+		return regs-&gt;iir;</div><div class='add'>+	case PERF_REG_PARISC_ISR:	/* CR20 */</div><div class='add'>+		return regs-&gt;isr;</div><div class='add'>+	case PERF_REG_PARISC_IOR:	/* CR21 */</div><div class='add'>+		return regs-&gt;ior;</div><div class='add'>+	case PERF_REG_PARISC_IPSW:	/* CR22 */</div><div class='add'>+		return regs-&gt;ipsw;</div><div class='add'>+	};</div><div class='add'>+	WARN_ON_ONCE((u32)idx &gt;= PERF_REG_PARISC_MAX);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define REG_RESERVED (~((1ULL &lt;&lt; PERF_REG_PARISC_MAX) - 1))</div><div class='add'>+</div><div class='add'>+int perf_reg_validate(u64 mask)</div><div class='add'>+{</div><div class='add'>+	if (!mask || mask &amp; REG_RESERVED)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 perf_reg_abi(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_64BIT))</div><div class='add'>+		return PERF_SAMPLE_REGS_ABI_32;</div><div class='add'>+</div><div class='add'>+	if (test_tsk_thread_flag(task, TIF_32BIT))</div><div class='add'>+		return PERF_SAMPLE_REGS_ABI_32;</div><div class='add'>+</div><div class='add'>+	return PERF_SAMPLE_REGS_ABI_64;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void perf_get_regs_user(struct perf_regs *regs_user,</div><div class='add'>+			struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	regs_user-&gt;regs = task_pt_regs(current);</div><div class='add'>+	regs_user-&gt;abi = perf_reg_abi(current);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c<br/>index ed93bd8c1545..e64ab5d2a40d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/process.c</a></div><div class='hunk'>@@ -201,7 +201,7 @@ arch_initcall(parisc_idle_init);</div><div class='ctx'> int</div><div class='ctx'> copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='del'>-	unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+	u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 	unsigned long usp = args-&gt;stack;</div><div class='ctx'> 	unsigned long tls = args-&gt;tls;</div><div class='ctx'> 	struct pt_regs *cregs = &amp;(p-&gt;thread.regs);</div><div class='head'>diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c<br/>index ceb45f51d52e..8a17ab7e6e0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/ptrace.c</a></div><div class='hunk'>@@ -562,12 +562,12 @@ static int gpr_set(struct task_struct *target,</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset native_regsets[] = {</div><div class='ctx'> 	[REGSET_GENERAL] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(long), .align = sizeof(long),</div><div class='ctx'> 		.regset_get = gpr_get, .set = gpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FP] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(__u64), .align = sizeof(__u64),</div><div class='ctx'> 		.regset_get = fpr_get, .set = fpr_set</div><div class='ctx'> 	}</div><div class='hunk'>@@ -629,12 +629,12 @@ static int gpr32_set(struct task_struct *target,</div><div class='ctx'>  */</div><div class='ctx'> static const struct user_regset compat_regsets[] = {</div><div class='ctx'> 	[REGSET_GENERAL] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(compat_long_t), .align = sizeof(compat_long_t),</div><div class='ctx'> 		.regset_get = gpr32_get, .set = gpr32_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FP] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(__u64), .align = sizeof(__u64),</div><div class='ctx'> 		.regset_get = fpr_get, .set = fpr_set</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c<br/>index f852fe274abe..b2cdbb8a12b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/sys_parisc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/sys_parisc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/sys_parisc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/sys_parisc.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ unsigned long calc_max_stack_size(unsigned long stack_max)</div><div class='ctx'>  * indicating that "current" should be used instead of a passed-in</div><div class='ctx'>  * value from the exec bprm as done with arch_pick_mmap_layout().</div><div class='ctx'>  */</div><div class='del'>-unsigned long mmap_upper_limit(struct rlimit *rlim_stack)</div><div class='add'>+unsigned long mmap_upper_limit(const struct rlimit *rlim_stack)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long stack_base;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S<br/>index 0fa81bf1466b..f58c4bccfbce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/syscall.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/syscall.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/syscall.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/syscall.S</a></div><div class='hunk'>@@ -613,6 +613,9 @@ lws_compare_and_swap32:</div><div class='ctx'> lws_compare_and_swap:</div><div class='ctx'> 	/* Trigger memory reference interruptions without writing to memory */</div><div class='ctx'> 1:	ldw	0(%r26), %r28</div><div class='add'>+	proberi	(%r26), PRIV_USER, %r28</div><div class='add'>+	comb,=,n	%r28, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 2:	stbys,e	%r0, 0(%r26)</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate 8-bit hash index from virtual address */</div><div class='hunk'>@@ -767,6 +770,9 @@ cas2_lock_start:</div><div class='ctx'> 	copy	%r26, %r28</div><div class='ctx'> 	depi_safe	0, 31, 2, %r28</div><div class='ctx'> 10:	ldw	0(%r28), %r1</div><div class='add'>+	proberi	(%r28), PRIV_USER, %r1</div><div class='add'>+	comb,=,n	%r1, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 11:	stbys,e	%r0, 0(%r28)</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate 8-bit hash index from virtual address */</div><div class='hunk'>@@ -951,41 +957,47 @@ atomic_xchg_begin:</div><div class='ctx'> </div><div class='ctx'> 	/* 8-bit exchange */</div><div class='ctx'> 1:	ldb	0(%r24), %r20</div><div class='add'>+	proberi	(%r24), PRIV_USER, %r20</div><div class='add'>+	comb,=,n	%r20, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 	copy	%r23, %r20</div><div class='ctx'> 	depi_safe	0, 31, 2, %r20</div><div class='ctx'> 	b	atomic_xchg_start</div><div class='ctx'> 2:	stbys,e	%r0, 0(%r20)</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='ctx'> </div><div class='ctx'> 	/* 16-bit exchange */</div><div class='ctx'> 3:	ldh	0(%r24), %r20</div><div class='add'>+	proberi	(%r24), PRIV_USER, %r20</div><div class='add'>+	comb,=,n	%r20, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 	copy	%r23, %r20</div><div class='ctx'> 	depi_safe	0, 31, 2, %r20</div><div class='ctx'> 	b	atomic_xchg_start</div><div class='ctx'> 4:	stbys,e	%r0, 0(%r20)</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='ctx'> </div><div class='ctx'> 	/* 32-bit exchange */</div><div class='ctx'> 5:	ldw	0(%r24), %r20</div><div class='add'>+	proberi	(%r24), PRIV_USER, %r20</div><div class='add'>+	comb,=,n	%r20, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 	b	atomic_xchg_start</div><div class='ctx'> 6:	stbys,e	%r0, 0(%r23)</div><div class='ctx'> 	nop</div><div class='ctx'> 	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='ctx'> </div><div class='ctx'> 	/* 64-bit exchange */</div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> 7:	ldd	0(%r24), %r20</div><div class='add'>+	proberi	(%r24), PRIV_USER, %r20</div><div class='add'>+	comb,=,n	%r20, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 8:	stdby,e	%r0, 0(%r23)</div><div class='ctx'> #else</div><div class='ctx'> 7:	ldw	0(%r24), %r20</div><div class='ctx'> 8:	ldw	4(%r24), %r20</div><div class='add'>+	proberi	(%r24), PRIV_USER, %r20</div><div class='add'>+	comb,=,n	%r20, %r0, lws_fault /* backwards, likely not taken */</div><div class='add'>+	nop</div><div class='ctx'> 	copy	%r23, %r20</div><div class='ctx'> 	depi_safe	0, 31, 2, %r20</div><div class='ctx'> 9:	stbys,e	%r0, 0(%r20)</div><div class='head'>diff --git a/arch/parisc/kernel/syscalls/syscall.tbl b/arch/parisc/kernel/syscalls/syscall.tbl<br/>index 66dc406b12e4..88a788a7b18d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/syscalls/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/syscalls/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -461,3 +461,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c<br/>index b9b3d527bc90..4c7c5df80bd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/traps.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/kfence.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/assembly.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -633,6 +634,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)</div><div class='ctx'> 		/* Assist Exception Trap, i.e. floating point exception. */</div><div class='ctx'> 		die_if_kernel("Floating point exception", regs, 0); /* quiet */</div><div class='ctx'> 		__inc_irq_stat(irq_fpassist_count);</div><div class='add'>+		perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);</div><div class='ctx'> 		handle_fpe(regs);</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c<br/>index f4626943633a..fb64d9ce0b17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/unaligned.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/unaligned.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/unaligned.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/unaligned.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/sysctl.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include "unaligned.h"</div><div class='hunk'>@@ -25,7 +26,7 @@</div><div class='ctx'> #define DPRINTF(fmt, args...)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define RFMT "%#08lx"</div><div class='add'>+#define RFMT "0x%08lx"</div><div class='ctx'> </div><div class='ctx'> /* 1111 1100 0000 0000 0001 0011 1100 0000 */</div><div class='ctx'> #define OPCODE1(a,b,c)	((a)&lt;&lt;26|(b)&lt;&lt;12|(c)&lt;&lt;6) </div><div class='hunk'>@@ -378,6 +379,7 @@ void handle_unaligned(struct pt_regs *regs)</div><div class='ctx'> 	int ret = ERR_NOTHANDLED;</div><div class='ctx'> </div><div class='ctx'> 	__inc_irq_stat(irq_unaligned_count);</div><div class='add'>+	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs-&gt;ior);</div><div class='ctx'> </div><div class='ctx'> 	/* log a message with pacing */</div><div class='ctx'> 	if (user_mode(regs)) {</div><div class='head'>diff --git a/arch/parisc/kernel/vdso32/Makefile b/arch/parisc/kernel/vdso32/Makefile<br/>index 2b36d25ada6e..4ee8d17da229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/vdso32/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/vdso32/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/vdso32/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/vdso32/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> KCOV_INSTRUMENT := n</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +33,7 @@ KBUILD_CFLAGS += -DBUILD_VDSO -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> VDSO_LIBGCC := $(shell $(CROSS32CC) -print-libgcc-file-name)</div><div class='ctx'> </div><div class='ctx'> obj-y += vdso32_wrapper.o</div><div class='del'>-extra-y += vdso32.lds</div><div class='add'>+targets += vdso32.lds</div><div class='ctx'> CPPFLAGS_vdso32.lds += -P -C  #  -U$(ARCH)</div><div class='ctx'> </div><div class='ctx'> $(obj)/vdso32_wrapper.o : $(obj)/vdso32.so FORCE</div><div class='head'>diff --git a/arch/parisc/kernel/vdso64/Makefile b/arch/parisc/kernel/vdso64/Makefile<br/>index bd87bd6a6659..c63f4069170f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/vdso64/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/kernel/vdso64/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/kernel/vdso64/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/kernel/vdso64/Makefile</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> KCOV_INSTRUMENT := n</div><div class='ctx'> </div><div class='hunk'>@@ -32,7 +32,7 @@ KBUILD_CFLAGS += -DBUILD_VDSO -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> VDSO_LIBGCC := $(shell $(CC) -print-libgcc-file-name)</div><div class='ctx'> </div><div class='ctx'> obj-y += vdso64_wrapper.o</div><div class='del'>-extra-y += vdso64.lds</div><div class='add'>+targets += vdso64.lds</div><div class='ctx'> CPPFLAGS_vdso64.lds += -P -C -U$(ARCH)</div><div class='ctx'> </div><div class='ctx'> $(obj)/vdso64_wrapper.o : $(obj)/vdso64.so FORCE</div><div class='head'>diff --git a/arch/parisc/lib/checksum.c b/arch/parisc/lib/checksum.c<br/>index 4818f3db84a5..59d8c15d81bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/checksum.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/checksum.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/checksum.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/lib/checksum.c</a></div><div class='hunk'>@@ -25,15 +25,6 @@</div><div class='ctx'> 	: "=r"(_t)                      \</div><div class='ctx'> 	: "r"(_r), "0"(_t));</div><div class='ctx'> </div><div class='del'>-static inline unsigned short from32to16(unsigned int x)</div><div class='del'>-{</div><div class='del'>-	/* 32 bits --&gt; 16 bits + carry */</div><div class='del'>-	x = (x &amp; 0xffff) + (x &gt;&gt; 16);</div><div class='del'>-	/* 16 bits + carry --&gt; 16 bits including carry */</div><div class='del'>-	x = (x &amp; 0xffff) + (x &gt;&gt; 16);</div><div class='del'>-	return (unsigned short)x;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned int do_csum(const unsigned char * buff, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int odd, count;</div><div class='hunk'>@@ -85,7 +76,7 @@ static inline unsigned int do_csum(const unsigned char * buff, int len)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (len &amp; 1)</div><div class='ctx'> 		result += le16_to_cpu(*buff);</div><div class='del'>-	result = from32to16(result);</div><div class='add'>+	result = csum_from32to16(result);</div><div class='ctx'> 	if (odd)</div><div class='ctx'> 		result = swab16(result);</div><div class='ctx'> out:</div><div class='hunk'>@@ -102,7 +93,7 @@ __wsum csum_partial(const void *buff, int len, __wsum sum)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int result = do_csum(buff, len);</div><div class='ctx'> 	addc(result, sum);</div><div class='del'>-	return (__force __wsum)from32to16(result);</div><div class='add'>+	return (__force __wsum)csum_from32to16(result);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(csum_partial);</div><div class='head'>diff --git a/arch/parisc/lib/io.c b/arch/parisc/lib/io.c<br/>index 7c00496b47d4..3c7e617f5a93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/io.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/lib/io.c</a></div><div class='hunk'>@@ -12,114 +12,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Copies a block of memory to a device in an efficient manner.</div><div class='del'>- * Assumes the device can cope with 32-bit transfers.  If it can't,</div><div class='del'>- * don't use this function.</div><div class='del'>- */</div><div class='del'>-void memcpy_toio(volatile void __iomem *dst, const void *src, int count)</div><div class='del'>-{</div><div class='del'>-	if (((unsigned long)dst &amp; 3) != ((unsigned long)src &amp; 3))</div><div class='del'>-		goto bytecopy;</div><div class='del'>-	while ((unsigned long)dst &amp; 3) {</div><div class='del'>-		writeb(*(char *)src, dst++);</div><div class='del'>-		src++;</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-	while (count &gt; 3) {</div><div class='del'>-		__raw_writel(*(u32 *)src, dst);</div><div class='del'>-		src += 4;</div><div class='del'>-		dst += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>- bytecopy:</div><div class='del'>-	while (count--) {</div><div class='del'>-		writeb(*(char *)src, dst++);</div><div class='del'>-		src++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-** Copies a block of memory from a device in an efficient manner.</div><div class='del'>-** Assumes the device can cope with 32-bit transfers.  If it can't,</div><div class='del'>-** don't use this function.</div><div class='del'>-**</div><div class='del'>-** CR16 counts on C3000 reading 256 bytes from Symbios 896 RAM:</div><div class='del'>-**	27341/64    = 427 cyc per int</div><div class='del'>-**	61311/128   = 478 cyc per short</div><div class='del'>-**	122637/256  = 479 cyc per byte</div><div class='del'>-** Ergo bus latencies dominant (not transfer size).</div><div class='del'>-**      Minimize total number of transfers at cost of CPU cycles.</div><div class='del'>-**	TODO: only look at src alignment and adjust the stores to dest.</div><div class='del'>-*/</div><div class='del'>-void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)</div><div class='del'>-{</div><div class='del'>-	/* first compare alignment of src/dst */ </div><div class='del'>-	if ( (((unsigned long)dst ^ (unsigned long)src) &amp; 1) || (count &lt; 2) )</div><div class='del'>-		goto bytecopy;</div><div class='del'>-</div><div class='del'>-	if ( (((unsigned long)dst ^ (unsigned long)src) &amp; 2) || (count &lt; 4) )</div><div class='del'>-		goto shortcopy;</div><div class='del'>-</div><div class='del'>-	/* Then check for misaligned start address */</div><div class='del'>-	if ((unsigned long)src &amp; 1) {</div><div class='del'>-		*(u8 *)dst = readb(src);</div><div class='del'>-		src++;</div><div class='del'>-		dst++;</div><div class='del'>-		count--;</div><div class='del'>-		if (count &lt; 2) goto bytecopy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((unsigned long)src &amp; 2) {</div><div class='del'>-		*(u16 *)dst = __raw_readw(src);</div><div class='del'>-		src += 2;</div><div class='del'>-		dst += 2;</div><div class='del'>-		count -= 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (count &gt; 3) {</div><div class='del'>-		*(u32 *)dst = __raw_readl(src);</div><div class='del'>-		dst += 4;</div><div class='del'>-		src += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>- shortcopy:</div><div class='del'>-	while (count &gt; 1) {</div><div class='del'>-		*(u16 *)dst = __raw_readw(src);</div><div class='del'>-		src += 2;</div><div class='del'>-		dst += 2;</div><div class='del'>-		count -= 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>- bytecopy:</div><div class='del'>-	while (count--) {</div><div class='del'>-		*(char *)dst = readb(src);</div><div class='del'>-		src++;</div><div class='del'>-		dst++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Sets a block of memory on a device to a given value.</div><div class='del'>- * Assumes the device can cope with 32-bit transfers.  If it can't,</div><div class='del'>- * don't use this function.</div><div class='del'>- */</div><div class='del'>-void memset_io(volatile void __iomem *addr, unsigned char val, int count)</div><div class='del'>-{</div><div class='del'>-	u32 val32 = (val &lt;&lt; 24) | (val &lt;&lt; 16) | (val &lt;&lt; 8) | val;</div><div class='del'>-	while ((unsigned long)addr &amp; 3) {</div><div class='del'>-		writeb(val, addr++);</div><div class='del'>-		count--;</div><div class='del'>-	}</div><div class='del'>-	while (count &gt; 3) {</div><div class='del'>-		__raw_writel(val32, addr);</div><div class='del'>-		addr += 4;</div><div class='del'>-		count -= 4;</div><div class='del'>-	}</div><div class='del'>-	while (count--) {</div><div class='del'>-		writeb(val, addr++);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Read COUNT 8-bit bytes from port PORT into memory starting at</div><div class='ctx'>  * SRC.</div><div class='hunk'>@@ -170,15 +62,15 @@ void insw (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 	unsigned char *p;</div><div class='ctx'> </div><div class='ctx'> 	p = (unsigned char *)dst;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	switch (((unsigned long)p) &amp; 0x3)</div><div class='ctx'> 	{</div><div class='ctx'> 	 case 0x00:			/* Buffer 32-bit aligned */</div><div class='ctx'> 		while (count&gt;=2) {</div><div class='del'>-			</div><div class='add'>+</div><div class='ctx'> 			count -= 2;</div><div class='ctx'> 			l = cpu_to_le16(inw(port)) &lt;&lt; 16;</div><div class='ctx'> 			l |= cpu_to_le16(inw(port));</div><div class='hunk'>@@ -189,13 +81,13 @@ void insw (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 			*(unsigned short *)p = cpu_to_le16(inw(port));</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	 case 0x02:			/* Buffer 16-bit aligned */</div><div class='ctx'> 		*(unsigned short *)p = cpu_to_le16(inw(port));</div><div class='ctx'> 		p += 2;</div><div class='ctx'> 		count--;</div><div class='ctx'> 		while (count&gt;=2) {</div><div class='del'>-			</div><div class='add'>+</div><div class='ctx'> 			count -= 2;</div><div class='ctx'> 			l = cpu_to_le16(inw(port)) &lt;&lt; 16;</div><div class='ctx'> 			l |= cpu_to_le16(inw(port));</div><div class='hunk'>@@ -206,13 +98,13 @@ void insw (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 			*(unsigned short *)p = cpu_to_le16(inw(port));</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 	 case 0x01:			/* Buffer 8-bit aligned */</div><div class='ctx'> 	 case 0x03:</div><div class='ctx'> 		/* I don't bother with 32bit transfers</div><div class='ctx'> 		 * in this case, 16bit will have to do -- DE */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = cpu_to_le16(inw(port));</div><div class='ctx'> 		*p = l &gt;&gt; 8;</div><div class='ctx'> 		p++;</div><div class='hunk'>@@ -242,10 +134,10 @@ void insl (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 	unsigned char *p;</div><div class='ctx'> </div><div class='ctx'> 	p = (unsigned char *)dst;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	switch (((unsigned long) dst) &amp; 0x3)</div><div class='ctx'> 	{</div><div class='ctx'> 	 case 0x00:			/* Buffer 32-bit aligned */</div><div class='hunk'>@@ -255,14 +147,14 @@ void insl (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 			p += 4;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	 case 0x02:			/* Buffer 16-bit aligned */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = cpu_to_le32(inl(port));</div><div class='ctx'> 		*(unsigned short *)p = l &gt;&gt; 16;</div><div class='ctx'> 		p += 2;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		while (count--)</div><div class='ctx'> 		{</div><div class='ctx'> 			l2 = cpu_to_le32(inl(port));</div><div class='hunk'>@@ -274,7 +166,7 @@ void insl (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 		break;</div><div class='ctx'> 	 case 0x01:			/* Buffer 8-bit aligned */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = cpu_to_le32(inl(port));</div><div class='ctx'> 		*(unsigned char *)p = l &gt;&gt; 24;</div><div class='ctx'> 		p++;</div><div class='hunk'>@@ -291,7 +183,7 @@ void insl (unsigned long port, void *dst, unsigned long count)</div><div class='ctx'> 		break;</div><div class='ctx'> 	 case 0x03:			/* Buffer 8-bit aligned */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = cpu_to_le32(inl(port));</div><div class='ctx'> 		*p = l &gt;&gt; 24;</div><div class='ctx'> 		p++;</div><div class='hunk'>@@ -340,10 +232,10 @@ void outsw (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 	const unsigned char *p;</div><div class='ctx'> </div><div class='ctx'> 	p = (const unsigned char *)src;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	switch (((unsigned long)p) &amp; 0x3)</div><div class='ctx'> 	{</div><div class='ctx'> 	 case 0x00:			/* Buffer 32-bit aligned */</div><div class='hunk'>@@ -358,13 +250,13 @@ void outsw (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 			outw(le16_to_cpu(*(unsigned short*)p), port);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	 case 0x02:			/* Buffer 16-bit aligned */</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		outw(le16_to_cpu(*(unsigned short*)p), port);</div><div class='ctx'> 		p += 2;</div><div class='ctx'> 		count--;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		while (count&gt;=2) {</div><div class='ctx'> 			count -= 2;</div><div class='ctx'> 			l = *(unsigned int *)p;</div><div class='hunk'>@@ -376,11 +268,11 @@ void outsw (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 			outw(le16_to_cpu(*(unsigned short *)p), port);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-		</div><div class='del'>-	 case 0x01:			/* Buffer 8-bit aligned */	</div><div class='add'>+</div><div class='add'>+	 case 0x01:			/* Buffer 8-bit aligned */</div><div class='ctx'> 		/* I don't bother with 32bit transfers</div><div class='ctx'> 		 * in this case, 16bit will have to do -- DE */</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l  = *p &lt;&lt; 8;</div><div class='ctx'> 		p++;</div><div class='ctx'> 		count--;</div><div class='hunk'>@@ -395,7 +287,7 @@ void outsw (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 		l2 = *(unsigned char *)p;</div><div class='ctx'> 		outw (le16_to_cpu(l | l2&gt;&gt;8), port);</div><div class='ctx'> 		break;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -412,10 +304,10 @@ void outsl (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 	const unsigned char *p;</div><div class='ctx'> </div><div class='ctx'> 	p = (const unsigned char *)src;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	switch (((unsigned long)p) &amp; 0x3)</div><div class='ctx'> 	{</div><div class='ctx'> 	 case 0x00:			/* Buffer 32-bit aligned */</div><div class='hunk'>@@ -425,13 +317,13 @@ void outsl (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 			p += 4;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	 case 0x02:			/* Buffer 16-bit aligned */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = *(unsigned short *)p;</div><div class='ctx'> 		p += 2;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		while (count--)</div><div class='ctx'> 		{</div><div class='ctx'> 			l2 = *(unsigned int *)p;</div><div class='hunk'>@@ -462,7 +354,7 @@ void outsl (unsigned long port, const void *src, unsigned long count)</div><div class='ctx'> 		break;</div><div class='ctx'> 	 case 0x03:			/* Buffer 8-bit aligned */</div><div class='ctx'> 		--count;</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		l = *p &lt;&lt; 24;</div><div class='ctx'> 		p++;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c<br/>index 5fc0c852c84c..03165c82dfdb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/memcpy.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/lib/memcpy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/lib/memcpy.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/lib/memcpy.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define get_user_space()	mfsp(SR_USER)</div><div class='ctx'> #define get_kernel_space()	SR_KERNEL</div><div class='hunk'>@@ -32,9 +33,24 @@ EXPORT_SYMBOL(raw_copy_to_user);</div><div class='ctx'> unsigned long raw_copy_from_user(void *dst, const void __user *src,</div><div class='ctx'> 			       unsigned long len)</div><div class='ctx'> {</div><div class='add'>+	unsigned long start = (unsigned long) src;</div><div class='add'>+	unsigned long end = start + len;</div><div class='add'>+	unsigned long newlen = len;</div><div class='add'>+</div><div class='ctx'> 	mtsp(get_user_space(), SR_TEMP1);</div><div class='ctx'> 	mtsp(get_kernel_space(), SR_TEMP2);</div><div class='del'>-	return pa_memcpy(dst, (void __force *)src, len);</div><div class='add'>+</div><div class='add'>+	/* Check region is user accessible */</div><div class='add'>+	while (start &lt; end) {</div><div class='add'>+		if (!prober_user(SR_TEMP1, start)) {</div><div class='add'>+			newlen = (start - (unsigned long) src);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		start += PAGE_SIZE;</div><div class='add'>+		/* align to page boundry which may have different permission */</div><div class='add'>+		start = PAGE_ALIGN_DOWN(start);</div><div class='add'>+	}</div><div class='add'>+	return len - newlen + pa_memcpy(dst, (void __force *)src, newlen);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(raw_copy_from_user);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/math-emu/driver.c b/arch/parisc/math-emu/driver.c<br/>index 34495446e051..71829cb7bc81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/math-emu/driver.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/math-emu/driver.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/math-emu/driver.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/math-emu/driver.c</a></div><div class='hunk'>@@ -97,9 +97,19 @@ handle_fpe(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(regs-&gt;fr, frcopy, sizeof regs-&gt;fr);</div><div class='ctx'> 	if (signalcode != 0) {</div><div class='del'>-	    force_sig_fault(signalcode &gt;&gt; 24, signalcode &amp; 0xffffff,</div><div class='del'>-			    (void __user *) regs-&gt;iaoq[0]);</div><div class='del'>-	    return -1;</div><div class='add'>+		int sig = signalcode &gt;&gt; 24;</div><div class='add'>+</div><div class='add'>+		if (sig == SIGFPE) {</div><div class='add'>+			/*</div><div class='add'>+			 * Clear floating point trap bit to avoid trapping</div><div class='add'>+			 * again on the first floating-point instruction in</div><div class='add'>+			 * the userspace signal handler.</div><div class='add'>+			 */</div><div class='add'>+			regs-&gt;fr[0] &amp;= ~(1ULL &lt;&lt; 38);</div><div class='add'>+		}</div><div class='add'>+		force_sig_fault(sig, signalcode &amp; 0xffffff,</div><div class='add'>+				(void __user *) regs-&gt;iaoq[0]);</div><div class='add'>+		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return signalcode ? -1 : 0;</div><div class='head'>diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c<br/>index c39de84e98b0..f1785640b049 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/mm/fault.c</a></div><div class='hunk'>@@ -363,6 +363,10 @@ bad_area:</div><div class='ctx'> 	mmap_read_unlock(mm);</div><div class='ctx'> </div><div class='ctx'> bad_area_nosemaphore:</div><div class='add'>+	if (!user_mode(regs) &amp;&amp; fixup_exception(regs)) {</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (user_mode(regs)) {</div><div class='ctx'> 		int signo, si_code;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/mm/hugetlbpage.c b/arch/parisc/mm/hugetlbpage.c<br/>index aa664f7ddb63..a94fe546d434 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/hugetlbpage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/hugetlbpage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -21,27 +21,6 @@</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-unsigned long</div><div class='del'>-hugetlb_get_unmapped_area(struct file *file, unsigned long addr,</div><div class='del'>-		unsigned long len, unsigned long pgoff, unsigned long flags)</div><div class='del'>-{</div><div class='del'>-	struct hstate *h = hstate_file(file);</div><div class='del'>-</div><div class='del'>-	if (len &amp; ~huge_page_mask(h))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (len &gt; TASK_SIZE)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (flags &amp; MAP_FIXED)</div><div class='del'>-		if (prepare_hugepage_range(file, addr, len))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (addr)</div><div class='del'>-		addr = ALIGN(addr, huge_page_size(h));</div><div class='del'>-</div><div class='del'>-	/* we need to make sure the colouring is OK */</div><div class='del'>-	return arch_get_unmapped_area(file, addr, len, pgoff, flags, 0);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,</div><div class='hunk'>@@ -147,7 +126,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pte_t *ptep)</div><div class='add'>+			      pte_t *ptep, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t entry;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c<br/>index 96970fa75e4a..14270715d754 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/mm/init.c</a></div><div class='hunk'>@@ -377,10 +377,8 @@ static void __ref map_pages(unsigned long start_vaddr,</div><div class='ctx'> </div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS == 3</div><div class='ctx'> 		if (pud_none(*pud)) {</div><div class='del'>-			pmd = memblock_alloc(PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER,</div><div class='add'>+			pmd = memblock_alloc_or_panic(PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER,</div><div class='ctx'> 					     PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER);</div><div class='del'>-			if (!pmd)</div><div class='del'>-				panic("pmd allocation failed.\n");</div><div class='ctx'> 			pud_populate(NULL, pud, pmd);</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -388,9 +386,7 @@ static void __ref map_pages(unsigned long start_vaddr,</div><div class='ctx'> 		pmd = pmd_offset(pud, vaddr);</div><div class='ctx'> 		for (tmp1 = start_pmd; tmp1 &lt; PTRS_PER_PMD; tmp1++, pmd++) {</div><div class='ctx'> 			if (pmd_none(*pmd)) {</div><div class='del'>-				pg_table = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-				if (!pg_table)</div><div class='del'>-					panic("page table allocation failed\n");</div><div class='add'>+				pg_table = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> 				pmd_populate_kernel(NULL, pmd, pg_table);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -566,10 +562,6 @@ void __init mem_init(void)</div><div class='ctx'> 	BUILD_BUG_ON(TMPALIAS_MAP_START &gt;= 0x80000000);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	high_memory = __va((max_pfn &lt;&lt; PAGE_SHIFT));</div><div class='del'>-	set_max_mapnr(max_low_pfn);</div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PA11</div><div class='ctx'> 	if (boot_cpu_data.cpu_type == pcxl2 || boot_cpu_data.cpu_type == pcxl) {</div><div class='ctx'> 		pcxl_dma_start = (unsigned long)SET_MAP_OFFSET(MAP_START);</div><div class='hunk'>@@ -648,9 +640,7 @@ static void __init pagetable_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-	if (!empty_zero_page)</div><div class='del'>-		panic("zero page allocation failed.\n");</div><div class='add'>+	empty_zero_page = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -687,19 +677,15 @@ static void __init fixmap_init(void)</div><div class='ctx'> </div><div class='ctx'> #if CONFIG_PGTABLE_LEVELS == 3</div><div class='ctx'> 	if (pud_none(*pud)) {</div><div class='del'>-		pmd = memblock_alloc(PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER,</div><div class='add'>+		pmd = memblock_alloc_or_panic(PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER,</div><div class='ctx'> 				     PAGE_SIZE &lt;&lt; PMD_TABLE_ORDER);</div><div class='del'>-		if (!pmd)</div><div class='del'>-			panic("fixmap: pmd allocation failed.\n");</div><div class='ctx'> 		pud_populate(NULL, pud, pmd);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	pmd = pmd_offset(pud, addr);</div><div class='ctx'> 	do {</div><div class='del'>-		pte_t *pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		if (!pte)</div><div class='del'>-			panic("fixmap: pte allocation failed.\n");</div><div class='add'>+		pte_t *pte = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 		pmd_populate_kernel(&amp;init_mm, pmd, pte);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/mm/ioremap.c b/arch/parisc/mm/ioremap.c<br/>index fd996472dfe7..0b65c4b3baee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/parisc/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/parisc/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/parisc/mm/ioremap.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='ctx'> void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,</div><div class='del'>-			   unsigned long prot)</div><div class='add'>+			   pgprot_t prot)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> 	unsigned long end = phys_addr + size - 1;</div><div class='hunk'>@@ -41,6 +41,6 @@ void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return generic_ioremap_prot(phys_addr, size, __pgprot(prot));</div><div class='add'>+	return generic_ioremap_prot(phys_addr, size, prot);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap_prot);</div><div class='head'>diff --git a/arch/powerpc/Kbuild b/arch/powerpc/Kbuild<br/>index 571f260b0842..b010ccb071b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/Kbuild</a></div><div class='hunk'>@@ -19,4 +19,4 @@ obj-$(CONFIG_KEXEC_CORE)  += kexec/</div><div class='ctx'> obj-$(CONFIG_KEXEC_FILE)  += purgatory/</div><div class='ctx'> </div><div class='ctx'> # for cleaning</div><div class='del'>-subdir- += boot</div><div class='add'>+subdir- += boot tools</div><div class='head'>diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig<br/>index 8094a01974cc..e24f4d88885a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/Kconfig</a></div><div class='hunk'>@@ -122,6 +122,7 @@ config PPC</div><div class='ctx'> 	# Please keep this list sorted alphabetically.</div><div class='ctx'> 	#</div><div class='ctx'> 	select ARCH_32BIT_OFF_T if PPC32</div><div class='add'>+	select ARCH_NEEDS_DEFER_KASAN		if PPC_RADIX_MMU</div><div class='ctx'> 	select ARCH_DISABLE_KASAN_INLINE	if PPC_RADIX_MMU</div><div class='ctx'> 	select ARCH_DMA_DEFAULT_COHERENT	if !NOT_COHERENT_CACHE</div><div class='ctx'> 	select ARCH_ENABLE_MEMORY_HOTPLUG</div><div class='hunk'>@@ -145,7 +146,8 @@ config PPC</div><div class='ctx'> 	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE</div><div class='ctx'> 	select ARCH_HAS_PHYS_TO_DMA</div><div class='ctx'> 	select ARCH_HAS_PMEM_API</div><div class='del'>-	select ARCH_HAS_PTE_DEVMAP		if PPC_BOOK3S_64</div><div class='add'>+	select ARCH_HAS_PREEMPT_LAZY</div><div class='add'>+	select ARCH_HAS_PTDUMP</div><div class='ctx'> 	select ARCH_HAS_PTE_SPECIAL</div><div class='ctx'> 	select ARCH_HAS_SCALED_CPUTIME		if VIRT_CPU_ACCOUNTING_NATIVE &amp;&amp; PPC_BOOK3S_64</div><div class='ctx'> 	select ARCH_HAS_SET_MEMORY</div><div class='hunk'>@@ -156,6 +158,7 @@ config PPC</div><div class='ctx'> 	select ARCH_HAS_TICK_BROADCAST		if GENERIC_CLOCKEVENTS_BROADCAST</div><div class='ctx'> 	select ARCH_HAS_UACCESS_FLUSHCACHE</div><div class='ctx'> 	select ARCH_HAS_UBSAN</div><div class='add'>+	select ARCH_HAS_VDSO_ARCH_DATA</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select ARCH_HAVE_EXTRA_ELF_NOTES        if SPU_BASE</div><div class='ctx'> 	select ARCH_KEEP_MEMBLOCK</div><div class='hunk'>@@ -168,6 +171,9 @@ config PPC</div><div class='ctx'> 	select ARCH_STACKWALK</div><div class='ctx'> 	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='ctx'> 	select ARCH_SUPPORTS_DEBUG_PAGEALLOC	if PPC_BOOK3S || PPC_8xx</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC		if SMP</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_SMT		if PPC64 &amp;&amp; SMP</div><div class='add'>+	select SCHED_MC				if ARCH_SUPPORTS_SCHED_MC</div><div class='ctx'> 	select ARCH_USE_BUILTIN_BSWAP</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF		if PPC64</div><div class='ctx'> 	select ARCH_USE_MEMTEST</div><div class='hunk'>@@ -203,10 +209,8 @@ config PPC</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_IRQ_SHOW_LEVEL</div><div class='ctx'> 	select GENERIC_PCI_IOMAP		if PCI</div><div class='del'>-	select GENERIC_PTDUMP</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select GENERIC_TIME_VSYSCALL</div><div class='del'>-	select GENERIC_VDSO_TIME_NS</div><div class='ctx'> 	select HAS_IOPORT			if PCI</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL</div><div class='ctx'> 	select HAVE_ARCH_HUGE_VMALLOC		if HAVE_ARCH_HUGE_VMAP</div><div class='hunk'>@@ -234,17 +238,21 @@ config PPC</div><div class='ctx'> 	select HAVE_DEBUG_STACKOVERFLOW</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_ARGS	if ARCH_USING_PATCHABLE_FUNCTION_ENTRY || MPROFILE_KERNEL || PPC32</div><div class='add'>+	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if PPC_FTRACE_OUT_OF_LINE || (PPC32 &amp;&amp; ARCH_USING_PATCHABLE_FUNCTION_ENTRY)</div><div class='add'>+	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_REGS	if ARCH_USING_PATCHABLE_FUNCTION_ENTRY || MPROFILE_KERNEL || PPC32</div><div class='ctx'> 	select HAVE_EBPF_JIT</div><div class='ctx'> 	select HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='ctx'> 	select HAVE_GUP_FAST</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='add'>+	select HAVE_FTRACE_GRAPH_FUNC</div><div class='add'>+	select HAVE_FTRACE_REGS_HAVING_PT_REGS</div><div class='ctx'> 	select HAVE_FUNCTION_ARG_ACCESS_API</div><div class='ctx'> 	select HAVE_FUNCTION_DESCRIPTORS	if PPC64_ELF_ABI_V1</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FREGS</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='del'>-	select HAVE_FUNCTION_TRACER		if PPC64 || (PPC32 &amp;&amp; CC_IS_GCC)</div><div class='del'>-	select HAVE_GCC_PLUGINS			if GCC_VERSION &gt;= 50200   # plugin support on gcc &lt;= 5.1 is buggy on PPC</div><div class='add'>+	select HAVE_FUNCTION_TRACER		if !COMPILE_TEST &amp;&amp; (PPC64 || (PPC32 &amp;&amp; CC_IS_GCC))</div><div class='add'>+	select HAVE_GCC_PLUGINS</div><div class='ctx'> 	select HAVE_GENERIC_VDSO</div><div class='ctx'> 	select HAVE_HARDLOCKUP_DETECTOR_ARCH	if PPC_BOOK3S_64 &amp;&amp; SMP</div><div class='ctx'> 	select HAVE_HARDLOCKUP_DETECTOR_PERF	if PERF_EVENTS &amp;&amp; HAVE_PERF_EVENTS_NMI</div><div class='hunk'>@@ -269,15 +277,19 @@ config PPC</div><div class='ctx'> 	select HAVE_PERF_EVENTS_NMI		if PPC64</div><div class='ctx'> 	select HAVE_PERF_REGS</div><div class='ctx'> 	select HAVE_PERF_USER_STACK_DUMP</div><div class='add'>+	select HAVE_PREEMPT_DYNAMIC_KEY</div><div class='ctx'> 	select HAVE_RETHOOK			if KPROBES</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	select HAVE_RELIABLE_STACKTRACE</div><div class='ctx'> 	select HAVE_RSEQ</div><div class='add'>+	select HAVE_SAMPLE_FTRACE_DIRECT	if HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI	if HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='ctx'> 	select HAVE_SETUP_PER_CPU_AREA		if PPC64</div><div class='ctx'> 	select HAVE_SOFTIRQ_ON_OWN_STACK</div><div class='del'>-	select HAVE_STACKPROTECTOR		if PPC32 &amp;&amp; $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r2)</div><div class='del'>-	select HAVE_STACKPROTECTOR		if PPC64 &amp;&amp; $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r13)</div><div class='add'>+	select HAVE_STACKPROTECTOR		if PPC32 &amp;&amp; $(cc-option,$(m32-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 -mstack-protector-guard-offset=0)</div><div class='add'>+	select HAVE_STACKPROTECTOR		if PPC64 &amp;&amp; $(cc-option,$(m64-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 -mstack-protector-guard-offset=0)</div><div class='ctx'> 	select HAVE_STATIC_CALL			if PPC32</div><div class='add'>+	select HAVE_STATIC_CALL_INLINE		if PPC32</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select HAVE_VIRT_CPU_ACCOUNTING</div><div class='ctx'> 	select HAVE_VIRT_CPU_ACCOUNTING_GEN</div><div class='hunk'>@@ -403,12 +415,9 @@ config ARCH_HAS_ADD_PAGES</div><div class='ctx'> config PPC_DCR_NATIVE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config PPC_DCR_MMIO</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config PPC_DCR</div><div class='ctx'> 	bool</div><div class='del'>-	depends on PPC_DCR_NATIVE || PPC_DCR_MMIO</div><div class='add'>+	depends on PPC_DCR_NATIVE</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config PPC_PCI_OF_BUS_MAP</div><div class='hunk'>@@ -434,11 +443,6 @@ config PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT</div><div class='ctx'> 	  PCI domain dependent and each PCI controller on own domain can have</div><div class='ctx'> 	  256 PCI buses, like it is on other Linux architectures.</div><div class='ctx'> </div><div class='del'>-config PPC_OF_PLATFORM_PCI</div><div class='del'>-	bool</div><div class='del'>-	depends on PCI</div><div class='del'>-	depends on PPC64 # not supported on 32 bits yet</div><div class='del'>-</div><div class='ctx'> config ARCH_SUPPORTS_UPROBES</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -569,6 +573,22 @@ config ARCH_USING_PATCHABLE_FUNCTION_ENTRY</div><div class='ctx'> 	def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mlittle-endian) if PPC64 &amp;&amp; CPU_LITTLE_ENDIAN</div><div class='ctx'> 	def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mbig-endian) if PPC64 &amp;&amp; CPU_BIG_ENDIAN</div><div class='ctx'> </div><div class='add'>+config PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	def_bool PPC64 &amp;&amp; ARCH_USING_PATCHABLE_FUNCTION_ENTRY</div><div class='add'>+	select ARCH_WANTS_PRE_LINK_VMLINUX</div><div class='add'>+</div><div class='add'>+config PPC_FTRACE_OUT_OF_LINE_NUM_RESERVE</div><div class='add'>+	int "Number of ftrace out-of-line stubs to reserve within .text"</div><div class='add'>+	depends on PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	default 32768</div><div class='add'>+	help</div><div class='add'>+	  Number of stubs to reserve for use by ftrace. This space is</div><div class='add'>+	  reserved within .text, and is distinct from any additional space</div><div class='add'>+	  added at the end of .text before the final vmlinux link. Set to</div><div class='add'>+	  zero to have stubs only be generated at the end of vmlinux (only</div><div class='add'>+	  if the size of vmlinux is less than 32MB). Set to a higher value</div><div class='add'>+	  if building vmlinux larger than 48MB.</div><div class='add'>+</div><div class='ctx'> config HOTPLUG_CPU</div><div class='ctx'> 	bool "Support for enabling/disabling CPUs"</div><div class='ctx'> 	depends on SMP &amp;&amp; (PPC_PSERIES || \</div><div class='hunk'>@@ -684,6 +704,10 @@ config RELOCATABLE_TEST</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool PPC64 || PPC_BOOK3S_32 || PPC_85xx || (44x &amp;&amp; !SMP)</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	bool</div><div class='add'>+	default y if !PPC_BOOK3S_32</div><div class='add'>+</div><div class='ctx'> config ARCH_SELECTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on CRASH_DUMP</div><div class='hunk'>@@ -693,6 +717,9 @@ config ARCH_SUPPORTS_CRASH_HOTPLUG</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on PPC64</div><div class='ctx'> </div><div class='add'>+config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION</div><div class='add'>+	def_bool CRASH_RESERVE</div><div class='add'>+</div><div class='ctx'> config FA_DUMP</div><div class='ctx'> 	bool "Firmware-assisted dump"</div><div class='ctx'> 	depends on CRASH_DUMP &amp;&amp; PPC64 &amp;&amp; (PPC_RTAS || PPC_POWERNV)</div><div class='hunk'>@@ -868,7 +895,7 @@ config DATA_SHIFT</div><div class='ctx'> 	int "Data shift" if DATA_SHIFT_BOOL</div><div class='ctx'> 	default 24 if STRICT_KERNEL_RWX &amp;&amp; PPC64</div><div class='ctx'> 	range 17 28 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_BOOK3S_32</div><div class='del'>-	range 19 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_8xx</div><div class='add'>+	range 14 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_8xx</div><div class='ctx'> 	range 20 24 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_85xx</div><div class='ctx'> 	default 22 if STRICT_KERNEL_RWX &amp;&amp; PPC_BOOK3S_32</div><div class='ctx'> 	default 18 if (DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_BOOK3S_32</div><div class='hunk'>@@ -881,10 +908,10 @@ config DATA_SHIFT</div><div class='ctx'> 	  On Book3S 32 (603+), DBATs are used to map kernel text and rodata RO.</div><div class='ctx'> 	  Smaller is the alignment, greater is the number of necessary DBATs.</div><div class='ctx'> </div><div class='del'>-	  On 8xx, large pages (512kb or 8M) are used to map kernel linear</div><div class='del'>-	  memory. Aligning to 8M reduces TLB misses as only 8M pages are used</div><div class='del'>-	  in that case. If PIN_TLB is selected, it must be aligned to 8M as</div><div class='del'>-	  8M pages will be pinned.</div><div class='add'>+	  On 8xx, large pages (16kb or 512kb or 8M) are used to map kernel</div><div class='add'>+	  linear memory. Aligning to 8M reduces TLB misses as only 8M pages</div><div class='add'>+	  are used in that case. If PIN_TLB is selected, it must be aligned</div><div class='add'>+	  to 8M as 8M pages will be pinned.</div><div class='ctx'> </div><div class='ctx'> config ARCH_FORCE_MAX_ORDER</div><div class='ctx'> 	int "Order of maximal physically contiguous allocations"</div><div class='hunk'>@@ -940,14 +967,6 @@ config PPC_PROT_SAO_LPAR</div><div class='ctx'> config PPC_COPRO_BASE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config SCHED_SMT</div><div class='del'>-	bool "SMT (Hyperthreading) scheduler support"</div><div class='del'>-	depends on PPC64 &amp;&amp; SMP</div><div class='del'>-	help</div><div class='del'>-	  SMT scheduler support improves the CPU scheduler's decision making</div><div class='del'>-	  when dealing with POWER5 cpus at a cost of slightly increased</div><div class='del'>-	  overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='ctx'> config PPC_DENORMALISATION</div><div class='ctx'> 	bool "PowerPC denormalisation exception handling"</div><div class='ctx'> 	depends on PPC_BOOK3S_64</div><div class='hunk'>@@ -1298,6 +1317,14 @@ config MODULES_SIZE</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='add'>+config PPC64_PROC_SYSTEMCFG</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on PPC64 &amp;&amp; PROC_FS</div><div class='add'>+	help</div><div class='add'>+	  This option enables the presence of /proc/ppc64/systemcfg through</div><div class='add'>+	  which the systemcfg page can be accessed.</div><div class='add'>+	  This interface only exists for backwards-compatibility.</div><div class='add'>+</div><div class='ctx'> if PPC64</div><div class='ctx'> # This value must have zeroes in the bottom 60 bits otherwise lots will break</div><div class='ctx'> config PAGE_OFFSET</div><div class='head'>diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug<br/>index 0bbec4afc0d5..f15e5920080b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kconfig.debug?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Kconfig.debug</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Kconfig.debug?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/Kconfig.debug</a></div><div class='hunk'>@@ -216,19 +216,6 @@ config PPC_EARLY_DEBUG_RTAS_PANEL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable early debugging via the RTAS panel.</div><div class='ctx'> </div><div class='del'>-config PPC_EARLY_DEBUG_RTAS_CONSOLE</div><div class='del'>-	bool "RTAS Console"</div><div class='del'>-	depends on PPC_RTAS</div><div class='del'>-	select UDBG_RTAS_CONSOLE</div><div class='del'>-	help</div><div class='del'>-	  Select this to enable early debugging via the RTAS console.</div><div class='del'>-</div><div class='del'>-config PPC_EARLY_DEBUG_MAPLE</div><div class='del'>-	bool "Maple real mode"</div><div class='del'>-	depends on PPC_MAPLE</div><div class='del'>-	help</div><div class='del'>-	  Select this to enable early debugging for Maple.</div><div class='del'>-</div><div class='ctx'> config PPC_EARLY_DEBUG_PAS_REALMODE</div><div class='ctx'> 	bool "PA Semi real mode"</div><div class='ctx'> 	depends on PPC_PASEMI</div><div class='head'>diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile<br/>index bbfe4a1f06ef..a58b1029592c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/Makefile</a></div><div class='hunk'>@@ -58,18 +58,18 @@ ifeq ($(CONFIG_PPC64)$(CONFIG_LD_IS_BFD),yy)</div><div class='ctx'> # There is a corresponding test in arch/powerpc/lib/Makefile</div><div class='ctx'> KBUILD_LDFLAGS_MODULE += --save-restore-funcs</div><div class='ctx'> else</div><div class='del'>-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o</div><div class='add'>+KBUILD_LDFLAGS_MODULE += $(objtree)/arch/powerpc/lib/crtsavres.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_CPU_LITTLE_ENDIAN</div><div class='del'>-KBUILD_CFLAGS	+= -mlittle-endian</div><div class='add'>+KBUILD_CPPFLAGS	+= -mlittle-endian</div><div class='ctx'> KBUILD_LDFLAGS	+= -EL</div><div class='ctx'> LDEMULATION	:= lppc</div><div class='ctx'> GNUTARGET	:= powerpcle</div><div class='ctx'> MULTIPLEWORD	:= -mno-multiple</div><div class='ctx'> KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-save-toc-indirect)</div><div class='ctx'> else</div><div class='del'>-KBUILD_CFLAGS += $(call cc-option,-mbig-endian)</div><div class='add'>+KBUILD_CPPFLAGS	+= $(call cc-option,-mbig-endian)</div><div class='ctx'> KBUILD_LDFLAGS	+= -EB</div><div class='ctx'> LDEMULATION	:= ppc</div><div class='ctx'> GNUTARGET	:= powerpc</div><div class='hunk'>@@ -95,20 +95,13 @@ aflags-$(CONFIG_CPU_BIG_ENDIAN)		+= $(call cc-option,-mbig-endian)</div><div class='ctx'> aflags-$(CONFIG_CPU_LITTLE_ENDIAN)	+= -mlittle-endian</div><div class='ctx'> </div><div class='ctx'> ifeq ($(HAS_BIARCH),y)</div><div class='del'>-KBUILD_CFLAGS	+= -m$(BITS)</div><div class='add'>+KBUILD_CPPFLAGS	+= -m$(BITS)</div><div class='ctx'> KBUILD_AFLAGS	+= -m$(BITS)</div><div class='ctx'> KBUILD_LDFLAGS	+= -m elf$(BITS)$(LDEMULATION)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-cflags-$(CONFIG_STACKPROTECTOR)	+= -mstack-protector-guard=tls</div><div class='del'>-ifdef CONFIG_PPC64</div><div class='del'>-cflags-$(CONFIG_STACKPROTECTOR)	+= -mstack-protector-guard-reg=r13</div><div class='del'>-else</div><div class='del'>-cflags-$(CONFIG_STACKPROTECTOR)	+= -mstack-protector-guard-reg=r2</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> LDFLAGS_vmlinux-y := -Bstatic</div><div class='del'>-LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie</div><div class='add'>+LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie --no-dynamic-linker</div><div class='ctx'> LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) += -z notext</div><div class='ctx'> LDFLAGS_vmlinux	:= $(LDFLAGS_vmlinux-y)</div><div class='ctx'> </div><div class='hunk'>@@ -155,7 +148,15 @@ CC_FLAGS_NO_FPU		:= $(call cc-option,-msoft-float)</div><div class='ctx'> ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> ifdef CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY</div><div class='ctx'> KBUILD_CPPFLAGS	+= -DCC_USING_PATCHABLE_FUNCTION_ENTRY</div><div class='add'>+ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+CC_FLAGS_FTRACE := -fpatchable-function-entry=1</div><div class='add'>+else</div><div class='add'>+ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS # PPC32 only</div><div class='add'>+CC_FLAGS_FTRACE := -fpatchable-function-entry=3,1</div><div class='add'>+else</div><div class='ctx'> CC_FLAGS_FTRACE := -fpatchable-function-entry=2</div><div class='add'>+endif</div><div class='add'>+endif</div><div class='ctx'> else</div><div class='ctx'> CC_FLAGS_FTRACE := -pg</div><div class='ctx'> ifdef CONFIG_MPROFILE_KERNEL</div><div class='hunk'>@@ -175,7 +176,6 @@ KBUILD_CPPFLAGS	+= -I $(srctree)/arch/powerpc $(asinstr)</div><div class='ctx'> KBUILD_AFLAGS	+= $(AFLAGS-y)</div><div class='ctx'> KBUILD_CFLAGS	+= $(CC_FLAGS_NO_FPU)</div><div class='ctx'> KBUILD_CFLAGS	+= $(CFLAGS-y)</div><div class='del'>-CPP		= $(CC) -E $(KBUILD_CFLAGS)</div><div class='ctx'> </div><div class='ctx'> CHECKFLAGS	+= -m$(BITS) -D__powerpc__ -D__powerpc$(BITS)__</div><div class='ctx'> ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='hunk'>@@ -359,7 +359,7 @@ define archhelp</div><div class='ctx'>   echo '  install         - Install kernel using'</div><div class='ctx'>   echo '                    (your) ~/bin/$(INSTALLKERNEL) or'</div><div class='ctx'>   echo '                    (distribution) /sbin/$(INSTALLKERNEL) or'</div><div class='del'>-  echo '                    install to $$(INSTALL_PATH) and run lilo'</div><div class='add'>+  echo '                    install to $$(INSTALL_PATH)'</div><div class='ctx'>   echo '  *_defconfig     - Select default config from arch/powerpc/configs'</div><div class='ctx'>   echo ''</div><div class='ctx'>   echo '  Targets with &lt;dt&gt; embed a device tree blob inside the image'</div><div class='hunk'>@@ -402,9 +402,13 @@ prepare: stack_protector_prepare</div><div class='ctx'> PHONY += stack_protector_prepare</div><div class='ctx'> stack_protector_prepare: prepare0</div><div class='ctx'> ifdef CONFIG_PPC64</div><div class='del'>-	$(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h))</div><div class='add'>+	$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \</div><div class='add'>+				-mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' \</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> else</div><div class='del'>-	$(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h))</div><div class='add'>+	$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \</div><div class='add'>+				-mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' \</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/Makefile.postlink b/arch/powerpc/Makefile.postlink<br/>index ae5a4256b03d..bb601be36173 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Makefile.postlink?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/Makefile.postlink</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/Makefile.postlink?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/Makefile.postlink</a></div><div class='hunk'>@@ -24,6 +24,9 @@ else</div><div class='ctx'> 	$(CONFIG_SHELL) $(srctree)/arch/powerpc/tools/relocs_check.sh "$(OBJDUMP)" "$(NM)" "$@"</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+quiet_cmd_ftrace_check = CHKFTRC $@</div><div class='add'>+      cmd_ftrace_check = $(CONFIG_SHELL) $(srctree)/arch/powerpc/tools/ftrace_check.sh "$(NM)" "$@"</div><div class='add'>+</div><div class='ctx'> # `@true` prevents complaint when there is nothing to be done</div><div class='ctx'> </div><div class='ctx'> vmlinux: FORCE</div><div class='hunk'>@@ -34,6 +37,11 @@ endif</div><div class='ctx'> ifdef CONFIG_RELOCATABLE</div><div class='ctx'> 	$(call if_changed,relocs_check)</div><div class='ctx'> endif</div><div class='add'>+ifdef CONFIG_FUNCTION_TRACER</div><div class='add'>+ifndef CONFIG_PPC64_ELF_ABI_V1</div><div class='add'>+	$(call cmd,ftrace_check)</div><div class='add'>+endif</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='ctx'> 	rm -f .tmp_symbols.txt</div><div class='head'>diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore<br/>index a4716d138cfc..5a867f23fe7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/.gitignore?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/.gitignore?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/.gitignore</a></div><div class='hunk'>@@ -30,7 +30,6 @@ zImage.coff</div><div class='ctx'> zImage.epapr</div><div class='ctx'> zImage.holly</div><div class='ctx'> zImage.*lds</div><div class='del'>-zImage.maple</div><div class='ctx'> zImage.miboot</div><div class='ctx'> zImage.pmac</div><div class='ctx'> zImage.pseries</div><div class='head'>diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile<br/>index fa8518067d38..c47b78c1d3e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/Makefile</a></div><div class='hunk'>@@ -70,6 +70,7 @@ BOOTCPPFLAGS	:= -nostdinc $(LINUXINCLUDE)</div><div class='ctx'> BOOTCPPFLAGS	+= -isystem $(shell $(BOOTCC) -print-file-name=include)</div><div class='ctx'> </div><div class='ctx'> BOOTCFLAGS	:= $(BOOTTARGETFLAGS) \</div><div class='add'>+		   -std=gnu11 \</div><div class='ctx'> 		   -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \</div><div class='ctx'> 		   -fno-strict-aliasing -O2 \</div><div class='ctx'> 		   -msoft-float -mno-altivec -mno-vsx \</div><div class='hunk'>@@ -173,7 +174,6 @@ src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c</div><div class='ctx'> src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c</div><div class='ctx'> src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S</div><div class='ctx'> src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S</div><div class='del'>-src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S</div><div class='ctx'> src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c</div><div class='ctx'> </div><div class='ctx'> src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c</div><div class='hunk'>@@ -243,13 +243,13 @@ $(obj)/wrapper.a: $(obj-wlib) FORCE</div><div class='ctx'> hostprogs	:= addnote hack-coff mktree</div><div class='ctx'> </div><div class='ctx'> targets		+= $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) zImage.lds</div><div class='del'>-extra-y		:= $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \</div><div class='add'>+always-y	:= $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \</div><div class='ctx'> 		   $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds</div><div class='ctx'> </div><div class='ctx'> dtstree		:= $(src)/dts</div><div class='ctx'> </div><div class='ctx'> wrapper		:= $(src)/wrapper</div><div class='del'>-wrapperbits	:= $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \</div><div class='add'>+wrapperbits	:= $(always-y) $(addprefix $(obj)/,addnote hack-coff mktree) \</div><div class='ctx'> 			$(wrapper) FORCE</div><div class='ctx'> </div><div class='ctx'> #############</div><div class='hunk'>@@ -276,8 +276,6 @@ quiet_cmd_wrap	= WRAP    $@</div><div class='ctx'> </div><div class='ctx'> image-$(CONFIG_PPC_PSERIES)		+= zImage.pseries</div><div class='ctx'> image-$(CONFIG_PPC_POWERNV)		+= zImage.pseries</div><div class='del'>-image-$(CONFIG_PPC_MAPLE)		+= zImage.maple</div><div class='del'>-image-$(CONFIG_PPC_IBM_CELL_BLADE)	+= zImage.pseries</div><div class='ctx'> image-$(CONFIG_PPC_PS3)			+= dtbImage.ps3</div><div class='ctx'> image-$(CONFIG_PPC_CHRP)		+= zImage.chrp</div><div class='ctx'> image-$(CONFIG_PPC_EFIKA)		+= zImage.chrp</div><div class='hunk'>@@ -444,7 +442,7 @@ $(obj)/zImage.initrd:	$(addprefix $(obj)/, $(initrd-y))</div><div class='ctx'> clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \</div><div class='ctx'> 	zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \</div><div class='ctx'> 	zImage.miboot zImage.pmac zImage.pseries \</div><div class='del'>-	zImage.maple simpleImage.* otheros.bld</div><div class='add'>+	simpleImage.* otheros.bld</div><div class='ctx'> </div><div class='ctx'> # clean up files cached by wrapper</div><div class='ctx'> clean-kernel-base := vmlinux.strip vmlinux.bin</div><div class='hunk'>@@ -458,7 +456,7 @@ WRAPPER_DTSDIR := /usr/lib/kernel-wrapper/dts</div><div class='ctx'> WRAPPER_BINDIR := /usr/sbin</div><div class='ctx'> INSTALL := install</div><div class='ctx'> </div><div class='del'>-extra-installed		:= $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))</div><div class='add'>+extra-installed		:= $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(always-y))</div><div class='ctx'> hostprogs-installed	:= $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs))</div><div class='ctx'> wrapper-installed	:= $(DESTDIR)$(WRAPPER_BINDIR)/wrapper</div><div class='ctx'> dts-installed		:= $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts))</div><div class='head'>diff --git a/arch/powerpc/boot/dts/microwatt.dts b/arch/powerpc/boot/dts/microwatt.dts<br/>index 269e930b3b0b..292b909ca9ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/dts/microwatt.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/dts/microwatt.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/dts/microwatt.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/dts/microwatt.dts</a></div><div class='hunk'>@@ -1,13 +1,15 @@</div><div class='ctx'> /dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#size-cells = &lt;0x02&gt;;</div><div class='ctx'> 	#address-cells = &lt;0x02&gt;;</div><div class='del'>-	model-name = "microwatt";</div><div class='add'>+	model = "microwatt";</div><div class='ctx'> 	compatible = "microwatt-soc";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;UART0;</div><div class='add'>+		ethernet = &amp;enet0;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	reserved-memory {</div><div class='hunk'>@@ -35,40 +37,79 @@</div><div class='ctx'> </div><div class='ctx'> 		ibm,powerpc-cpu-features {</div><div class='ctx'> 			display-name = "Microwatt";</div><div class='del'>-			isa = &lt;3000&gt;;</div><div class='add'>+			isa = &lt;3100&gt;;</div><div class='ctx'> 			device_type = "cpu-features";</div><div class='ctx'> 			compatible = "ibm,powerpc-cpu-features";</div><div class='ctx'> </div><div class='ctx'> 			mmu-radix {</div><div class='ctx'> 				isa = &lt;3000&gt;;</div><div class='del'>-				usable-privilege = &lt;2&gt;;</div><div class='add'>+				usable-privilege = &lt;6&gt;;</div><div class='add'>+				os-support = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			little-endian {</div><div class='del'>-				isa = &lt;2050&gt;;</div><div class='del'>-				usable-privilege = &lt;3&gt;;</div><div class='add'>+				isa = &lt;0&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+				os-support = &lt;0&gt;;</div><div class='ctx'> 				hwcap-bit-nr = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			cache-inhibited-large-page {</div><div class='del'>-				isa = &lt;2040&gt;;</div><div class='del'>-				usable-privilege = &lt;2&gt;;</div><div class='add'>+				isa = &lt;0&gt;;</div><div class='add'>+				usable-privilege = &lt;6&gt;;</div><div class='add'>+				os-support = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			fixed-point-v3 {</div><div class='ctx'> 				isa = &lt;3000&gt;;</div><div class='del'>-				usable-privilege = &lt;3&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			no-execute {</div><div class='del'>-				isa = &lt;2010&gt;;</div><div class='add'>+				isa = &lt;0x00&gt;;</div><div class='ctx'> 				usable-privilege = &lt;2&gt;;</div><div class='add'>+				os-support = &lt;0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			floating-point {</div><div class='add'>+				hfscr-bit-nr = &lt;0&gt;;</div><div class='ctx'> 				hwcap-bit-nr = &lt;27&gt;;</div><div class='ctx'> 				isa = &lt;0&gt;;</div><div class='del'>-				usable-privilege = &lt;3&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+				hv-support = &lt;1&gt;;</div><div class='add'>+				os-support = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			prefixed-instructions {</div><div class='add'>+				hfscr-bit-nr = &lt;13&gt;;</div><div class='add'>+				fscr-bit-nr = &lt;13&gt;;</div><div class='add'>+				isa = &lt;3010&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+				os-support = &lt;1&gt;;</div><div class='add'>+				hv-support = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tar {</div><div class='add'>+				hfscr-bit-nr = &lt;8&gt;;</div><div class='add'>+				fscr-bit-nr = &lt;8&gt;;</div><div class='add'>+				isa = &lt;2070&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+				os-support = &lt;1&gt;;</div><div class='add'>+				hv-support = &lt;1&gt;;</div><div class='add'>+				hwcap-bit-nr = &lt;58&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			control-register {</div><div class='add'>+				isa = &lt;0&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			system-call-vectored {</div><div class='add'>+				isa = &lt;3000&gt;;</div><div class='add'>+				usable-privilege = &lt;7&gt;;</div><div class='add'>+				os-support = &lt;1&gt;;</div><div class='add'>+				fscr-bit-nr = &lt;12&gt;;</div><div class='add'>+				hwcap-bit-nr = &lt;52&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -101,6 +142,36 @@</div><div class='ctx'> 			ibm,mmu-lpid-bits = &lt;12&gt;;</div><div class='ctx'> 			ibm,mmu-pid-bits = &lt;20&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		PowerPC,Microwatt@1 {</div><div class='add'>+			i-cache-sets = &lt;2&gt;;</div><div class='add'>+			ibm,dec-bits = &lt;64&gt;;</div><div class='add'>+			reservation-granule-size = &lt;64&gt;;</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			timebase-frequency = &lt;100000000&gt;;</div><div class='add'>+			i-tlb-sets = &lt;1&gt;;</div><div class='add'>+			ibm,ppc-interrupt-server#s = &lt;1&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;2&gt;;</div><div class='add'>+			i-tlb-size = &lt;64&gt;;</div><div class='add'>+			cpu-version = &lt;0x990000&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+			i-cache-size = &lt;0x1000&gt;;</div><div class='add'>+			ibm,processor-radix-AP-encodings = &lt;0x0c 0xa0000010 0x20000015 0x4000001e&gt;;</div><div class='add'>+			tlb-size = &lt;0&gt;;</div><div class='add'>+			tlb-sets = &lt;0&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			d-tlb-size = &lt;128&gt;;</div><div class='add'>+			d-tlb-sets = &lt;2&gt;;</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			general-purpose;</div><div class='add'>+			64-bit;</div><div class='add'>+			d-cache-size = &lt;0x1000&gt;;</div><div class='add'>+			ibm,chip-id = &lt;0&gt;;</div><div class='add'>+			ibm,mmu-lpid-bits = &lt;12&gt;;</div><div class='add'>+			ibm,mmu-pid-bits = &lt;20&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc@c0000000 {</div><div class='hunk'>@@ -113,8 +184,8 @@</div><div class='ctx'> </div><div class='ctx'> 		interrupt-controller@4000 {</div><div class='ctx'> 			compatible = "openpower,xics-presentation", "ibm,ppc-xicp";</div><div class='del'>-			ibm,interrupt-server-ranges = &lt;0x0 0x1&gt;;</div><div class='del'>-			reg = &lt;0x4000 0x100&gt;;</div><div class='add'>+			ibm,interrupt-server-ranges = &lt;0x0 0x2&gt;;</div><div class='add'>+			reg = &lt;0x4000 0x10 0x4010 0x10&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ICS: interrupt-controller@5000 {</div><div class='hunk'>@@ -138,7 +209,18 @@</div><div class='ctx'> 			interrupts = &lt;0x10 0x1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ethernet@8020000 {</div><div class='add'>+		gpio: gpio@7000 {</div><div class='add'>+			device_type = "gpio";</div><div class='add'>+			compatible = "faraday,ftgpio010";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x7000 0x80&gt;;</div><div class='add'>+			interrupts = &lt;0x14 1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		enet0: ethernet@8020000 {</div><div class='ctx'> 			compatible = "litex,liteeth";</div><div class='ctx'> 			reg = &lt;0x8021000 0x100</div><div class='ctx'> 				0x8020800 0x100</div><div class='hunk'>@@ -160,7 +242,6 @@</div><div class='ctx'> 			reg-names = "phy", "core", "reader", "writer", "irq";</div><div class='ctx'> 			bus-width = &lt;4&gt;;</div><div class='ctx'> 			interrupts = &lt;0x13 1&gt;;</div><div class='del'>-			cap-sd-highspeed;</div><div class='ctx'> 			clocks = &lt;&amp;sys_clk&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts<br/>index e09b37d7489d..a89cb3139ca8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/dts/mpc8315erdb.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/dts/mpc8315erdb.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/dts/mpc8315erdb.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/dts/mpc8315erdb.dts</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "fsl,mpc8315erdb";</div><div class='hunk'>@@ -358,6 +359,15 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;ipic&gt;;</div><div class='ctx'> 			fsl,mpc8313-wakeup-timer = &lt;&amp;gtm1&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		gpio: gpio-controller@c00 {</div><div class='add'>+			compatible = "fsl,mpc8314-gpio";</div><div class='add'>+			reg = &lt;0xc00 0x100&gt;;</div><div class='add'>+			interrupts = &lt;74 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;ipic&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	pci0: pci@e0008500 {</div><div class='head'>diff --git a/arch/powerpc/boot/install.sh b/arch/powerpc/boot/install.sh<br/>index 101fcb397a0f..c3df6c27ce75 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/install.sh?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/install.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/install.sh?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/install.sh</a></div><div class='hunk'>@@ -19,19 +19,19 @@</div><div class='ctx'> set -e</div><div class='ctx'> </div><div class='ctx'> # this should work for both the pSeries zImage and the iSeries vmlinux.sm</div><div class='del'>-image_name=`basename $2`</div><div class='add'>+image_name=$(basename "$2")</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> echo "Warning: '${INSTALLKERNEL}' command not available... Copying" \</div><div class='ctx'>      "directly to $4/$image_name-$1" &gt;&amp;2</div><div class='ctx'> </div><div class='del'>-if [ -f $4/$image_name-$1 ]; then</div><div class='del'>-	mv $4/$image_name-$1 $4/$image_name-$1.old</div><div class='add'>+if [ -f "$4"/"$image_name"-"$1" ]; then</div><div class='add'>+	mv "$4"/"$image_name"-"$1" "$4"/"$image_name"-"$1".old</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-if [ -f $4/System.map-$1 ]; then</div><div class='del'>-	mv $4/System.map-$1 $4/System-$1.old</div><div class='add'>+if [ -f "$4"/System.map-"$1" ]; then</div><div class='add'>+	mv "$4"/System.map-"$1" "$4"/System-"$1".old</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-cat $2 &gt; $4/$image_name-$1</div><div class='del'>-cp $3 $4/System.map-$1</div><div class='add'>+cat "$2" &gt; "$4"/"$image_name"-"$1"</div><div class='add'>+cp "$3" "$4"/System.map-"$1"</div><div class='head'>diff --git a/arch/powerpc/boot/page.h b/arch/powerpc/boot/page.h<br/>index c3d55fc8f34c..e44a3119720d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/page.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * Copyright (C) 2001 PPC64 Team, IBM Corp</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define ASM_CONST(x) x</div><div class='ctx'> #else</div><div class='ctx'> #define __ASM_CONST(x) x##UL</div><div class='head'>diff --git a/arch/powerpc/boot/rs6000.h b/arch/powerpc/boot/rs6000.h<br/>index a9d879155ef9..16df8f3c43f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/rs6000.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/rs6000.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/rs6000.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/rs6000.h</a></div><div class='hunk'>@@ -1,11 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* IBM RS/6000 "XCOFF" file definitions for BFD.</div><div class='ctx'>    Copyright (C) 1990, 1991 Free Software Foundation, Inc.</div><div class='del'>-   FIXME: Can someone provide a transliteration of this name into ASCII?</div><div class='del'>-   Using the following chars caused a compiler warning on HIUX (so I replaced</div><div class='del'>-   them with octal escapes), and isn't useful without an understanding of what</div><div class='del'>-   character set it is.</div><div class='del'>-   Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM</div><div class='add'>+   Written by Mimi Phuong-Thao Vo of IBM</div><div class='ctx'>    and John Gilmore of Cygnus Support.  */</div><div class='ctx'> </div><div class='ctx'> /********************** FILE HEADER **********************/</div><div class='head'>diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper<br/>index b1f5549a3c9c..a75baefd1cff 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/wrapper?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/boot/wrapper</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/boot/wrapper?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/boot/wrapper</a></div><div class='hunk'>@@ -226,18 +226,12 @@ ld_is_lld()</div><div class='ctx'> </div><div class='ctx'> # Do not include PT_INTERP segment when linking pie. Non-pie linking</div><div class='ctx'> # just ignores this option.</div><div class='del'>-LD_VERSION=$(${CROSS}ld --version | ld_version)</div><div class='del'>-LD_NO_DL_MIN_VERSION=$(echo 2.26 | ld_version)</div><div class='del'>-if [ "$LD_VERSION" -ge "$LD_NO_DL_MIN_VERSION" ] ; then</div><div class='del'>-	nodl="--no-dynamic-linker"</div><div class='del'>-fi</div><div class='add'>+nodl="--no-dynamic-linker"</div><div class='ctx'> </div><div class='ctx'> # suppress some warnings in recent ld versions</div><div class='ctx'> nowarn="-z noexecstack"</div><div class='del'>-if ! ld_is_lld; then</div><div class='del'>-	if [ "$LD_VERSION" -ge "$(echo 2.39 | ld_version)" ]; then</div><div class='del'>-		nowarn="$nowarn --no-warn-rwx-segments"</div><div class='del'>-	fi</div><div class='add'>+if "${CROSS}ld" -v --no-warn-rwx-segments &gt;/dev/null 2&gt;&amp;1; then</div><div class='add'>+	nowarn="$nowarn --no-warn-rwx-segments"</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> platformo=$object/"$platform".o</div><div class='hunk'>@@ -271,11 +265,6 @@ pseries)</div><div class='ctx'>     fi</div><div class='ctx'>     make_space=n</div><div class='ctx'>     ;;</div><div class='del'>-maple)</div><div class='del'>-    platformo="$object/of.o $object/epapr.o"</div><div class='del'>-    link_address='0x400000'</div><div class='del'>-    make_space=n</div><div class='del'>-    ;;</div><div class='ctx'> pmac|chrp)</div><div class='ctx'>     platformo="$object/of.o $object/epapr.o"</div><div class='ctx'>     make_space=n</div><div class='hunk'>@@ -517,7 +506,7 @@ fi</div><div class='ctx'> </div><div class='ctx'> # post-processing needed for some platforms</div><div class='ctx'> case "$platform" in</div><div class='del'>-pseries|chrp|maple)</div><div class='add'>+pseries|chrp)</div><div class='ctx'>     $objbin/addnote "$ofile"</div><div class='ctx'>     ;;</div><div class='ctx'> coff)</div><div class='head'>diff --git a/arch/powerpc/configs/44x/akebono_defconfig b/arch/powerpc/configs/44x/akebono_defconfig<br/>index fde4824f235e..1882eb2da354 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/akebono_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/akebono_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/akebono_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/44x/akebono_defconfig</a></div><div class='hunk'>@@ -128,6 +128,5 @@ CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0x00010000</div><div class='ctx'> CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x33f</div><div class='ctx'> CONFIG_CRYPTO_PCBC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='del'>-CONFIG_CRYPTO_SHA1_PPC=y</div><div class='ctx'> CONFIG_CRYPTO_DES=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='head'>diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig<br/>index 2479ab62d12f..98221bda380d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/sam440ep_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/sam440ep_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/sam440ep_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/44x/sam440ep_defconfig</a></div><div class='hunk'>@@ -91,5 +91,4 @@ CONFIG_AFFS_FS=m</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig<br/>index 20891c413149..5757625469c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/warp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/44x/warp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/44x/warp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/44x/warp_defconfig</a></div><div class='hunk'>@@ -85,8 +85,6 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig<br/>index 1715ff547442..b99caba8724a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a></div><div class='hunk'>@@ -73,6 +73,5 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=y</div><div class='ctx'> CONFIG_NLS_ISO8859_8=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig<br/>index e65c0057147f..11163052fdba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a></div><div class='hunk'>@@ -80,5 +80,4 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig<br/>index 17714bf0ed40..312d39e4242c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a></div><div class='hunk'>@@ -72,5 +72,4 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig<br/>index 58fae5131fa7..ac27f99faab8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a></div><div class='hunk'>@@ -75,6 +75,5 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig<br/>index da6fc203e2dc..7beb36a41d45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/ge_imp3a_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/ge_imp3a_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a></div><div class='hunk'>@@ -221,9 +221,6 @@ CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig<br/>index e7080497048d..0a42072fa23c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/stx_gp3_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/stx_gp3_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a></div><div class='hunk'>@@ -60,8 +60,6 @@ CONFIG_CRAMFS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_BDI_SWITCH=y</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig<br/>index 3a6381aa9fdc..488d03ae6d6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></div><div class='hunk'>@@ -132,7 +132,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NFSD=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='head'>diff --git a/arch/powerpc/configs/86xx-hw.config b/arch/powerpc/configs/86xx-hw.config<br/>index 0cb24b33c88e..e7bd265fae5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/86xx-hw.config?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/86xx-hw.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/86xx-hw.config?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/86xx-hw.config</a></div><div class='hunk'>@@ -5,7 +5,6 @@ CONFIG_BROADCOM_PHY=y</div><div class='ctx'> # CONFIG_CARDBUS is not set</div><div class='ctx'> CONFIG_CHR_DEV_SG=y</div><div class='ctx'> CONFIG_CHR_DEV_ST=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_DS1682=y</div><div class='ctx'> CONFIG_EEPROM_LEGACY=y</div><div class='head'>diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig<br/>index 97f4d4851735..3c6445c98a85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/adder875_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/adder875_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/adder875_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/adder875_defconfig</a></div><div class='hunk'>@@ -44,7 +44,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig<br/>index 200bb1ecb560..69ef3dc31c4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/amigaone_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/amigaone_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/amigaone_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/amigaone_defconfig</a></div><div class='hunk'>@@ -106,7 +106,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_AFFS_FS=m</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig<br/>index 53f43a34e1a9..7a31b52e92e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/cell_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/cell_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/cell_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/cell_defconfig</a></div><div class='hunk'>@@ -25,7 +25,6 @@ CONFIG_PS3_DISK=y</div><div class='ctx'> CONFIG_PS3_ROM=m</div><div class='ctx'> CONFIG_PS3_FLASH=m</div><div class='ctx'> CONFIG_PS3_LPM=m</div><div class='del'>-CONFIG_PPC_IBM_CELL_BLADE=y</div><div class='ctx'> CONFIG_RTAS_FLASH=y</div><div class='ctx'> CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='hunk'>@@ -63,7 +62,6 @@ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_TCPMSS=m</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_COMMENT=m</div><div class='del'>-CONFIG_NETFILTER_XT_MATCH_DCCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_DSCP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_ESP=m</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m</div><div class='hunk'>@@ -133,7 +131,6 @@ CONFIG_SKGE=m</div><div class='ctx'> CONFIG_SKY2=m</div><div class='ctx'> CONFIG_GELIC_NET=m</div><div class='ctx'> CONFIG_GELIC_WIRELESS=y</div><div class='del'>-CONFIG_SPIDER_NET=y</div><div class='ctx'> # CONFIG_INPUT_KEYBOARD is not set</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> # CONFIG_SERIO_I8042 is not set</div><div class='hunk'>@@ -168,7 +165,6 @@ CONFIG_INFINIBAND_MTHCA=m</div><div class='ctx'> CONFIG_INFINIBAND_IPOIB=m</div><div class='ctx'> CONFIG_INFINIBAND_IPOIB_DEBUG_DATA=y</div><div class='ctx'> CONFIG_EDAC=y</div><div class='del'>-CONFIG_EDAC_CELL=y</div><div class='ctx'> CONFIG_UIO=m</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='head'>diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig<br/>index fb314f75ad4b..b799c95480ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/chrp32_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/chrp32_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/chrp32_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/chrp32_defconfig</a></div><div class='hunk'>@@ -110,7 +110,6 @@ CONFIG_PROC_KCORE=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig<br/>index 50cc59eb36cf..354180ab94bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ep88xc_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ep88xc_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ep88xc_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ep88xc_defconfig</a></div><div class='hunk'>@@ -47,7 +47,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/fsl-emb-nonhw.config b/arch/powerpc/configs/fsl-emb-nonhw.config<br/>index 3009b0efaf34..2f81bc2d819e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/fsl-emb-nonhw.config?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/fsl-emb-nonhw.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/fsl-emb-nonhw.config?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/fsl-emb-nonhw.config</a></div><div class='hunk'>@@ -15,7 +15,6 @@ CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_CGROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUPS=y</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_CRYPTO_MD4=y</div><div class='hunk'>@@ -112,7 +111,6 @@ CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_RCU_TRACE=y</div><div class='ctx'> CONFIG_RESET_CONTROLLER=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_UBIFS_FS=y</div><div class='head'>diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig<br/>index 9215bed53291..428f17b45513 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/g5_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/g5_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/g5_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/g5_defconfig</a></div><div class='hunk'>@@ -231,12 +231,11 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='ctx'> CONFIG_BOOTX_TEXT=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='head'>diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig<br/>index d77eeb525366..cdd99657b71b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/gamecube_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/gamecube_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/gamecube_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/gamecube_defconfig</a></div><div class='hunk'>@@ -82,7 +82,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_CIFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig<br/>index fa707de761be..b564f9e33a0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/linkstation_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/linkstation_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/linkstation_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/linkstation_defconfig</a></div><div class='hunk'>@@ -125,8 +125,6 @@ CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig<br/>deleted file mode 100644<br/>index c821a97f4a89..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/maple_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/maple_defconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,111 +0,0 @@</div><div class='del'>-CONFIG_PPC64=y</div><div class='del'>-CONFIG_SMP=y</div><div class='del'>-CONFIG_NR_CPUS=4</div><div class='del'>-CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_POSIX_MQUEUE=y</div><div class='del'>-CONFIG_NO_HZ=y</div><div class='del'>-CONFIG_HIGH_RES_TIMERS=y</div><div class='del'>-CONFIG_IKCONFIG=y</div><div class='del'>-CONFIG_IKCONFIG_PROC=y</div><div class='del'>-# CONFIG_COMPAT_BRK is not set</div><div class='del'>-CONFIG_PROFILING=y</div><div class='del'>-CONFIG_KPROBES=y</div><div class='del'>-CONFIG_MODULES=y</div><div class='del'>-CONFIG_MODULE_UNLOAD=y</div><div class='del'>-CONFIG_MODVERSIONS=y</div><div class='del'>-CONFIG_MODULE_SRCVERSION_ALL=y</div><div class='del'>-# CONFIG_BLK_DEV_BSG is not set</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_MAC_PARTITION=y</div><div class='del'>-# CONFIG_PPC_POWERNV is not set</div><div class='del'>-# CONFIG_PPC_PSERIES is not set</div><div class='del'>-# CONFIG_PPC_PMAC is not set</div><div class='del'>-CONFIG_PPC_MAPLE=y</div><div class='del'>-CONFIG_UDBG_RTAS_CONSOLE=y</div><div class='del'>-CONFIG_GEN_RTC=y</div><div class='del'>-CONFIG_KEXEC=y</div><div class='del'>-CONFIG_IRQ_ALL_CPUS=y</div><div class='del'>-CONFIG_PPC_4K_PAGES=y</div><div class='del'>-CONFIG_PCI_MSI=y</div><div class='del'>-CONFIG_NET=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='del'>-CONFIG_XFRM_USER=m</div><div class='del'>-CONFIG_INET=y</div><div class='del'>-CONFIG_IP_MULTICAST=y</div><div class='del'>-CONFIG_IP_PNP=y</div><div class='del'>-CONFIG_IP_PNP_DHCP=y</div><div class='del'>-# CONFIG_IPV6 is not set</div><div class='del'>-CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='del'>-# CONFIG_SCSI_PROC_FS is not set</div><div class='del'>-CONFIG_BLK_DEV_SD=y</div><div class='del'>-CONFIG_BLK_DEV_SR=y</div><div class='del'>-CONFIG_CHR_DEV_SG=y</div><div class='del'>-CONFIG_SCSI_IPR=y</div><div class='del'>-CONFIG_ATA=y</div><div class='del'>-CONFIG_PATA_AMD=y</div><div class='del'>-CONFIG_ATA_GENERIC=y</div><div class='del'>-CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_AMD8111_ETH=y</div><div class='del'>-CONFIG_TIGON3=y</div><div class='del'>-CONFIG_E1000=y</div><div class='del'>-CONFIG_USB_PEGASUS=y</div><div class='del'>-# CONFIG_INPUT_KEYBOARD is not set</div><div class='del'>-# CONFIG_INPUT_MOUSE is not set</div><div class='del'>-# CONFIG_SERIO is not set</div><div class='del'>-CONFIG_SERIAL_8250=y</div><div class='del'>-CONFIG_SERIAL_8250_CONSOLE=y</div><div class='del'>-CONFIG_HVC_RTAS=y</div><div class='del'>-# CONFIG_HW_RANDOM is not set</div><div class='del'>-CONFIG_I2C=y</div><div class='del'>-CONFIG_I2C_CHARDEV=y</div><div class='del'>-CONFIG_I2C_AMD8111=y</div><div class='del'>-# CONFIG_VGA_CONSOLE is not set</div><div class='del'>-CONFIG_HID_GYRATION=y</div><div class='del'>-CONFIG_HID_PANTHERLORD=y</div><div class='del'>-CONFIG_HID_PETALYNX=y</div><div class='del'>-CONFIG_HID_SAMSUNG=y</div><div class='del'>-CONFIG_HID_SUNPLUS=y</div><div class='del'>-CONFIG_USB=y</div><div class='del'>-CONFIG_USB_MON=y</div><div class='del'>-CONFIG_USB_EHCI_HCD=y</div><div class='del'>-CONFIG_USB_EHCI_ROOT_HUB_TT=y</div><div class='del'>-# CONFIG_USB_EHCI_HCD_PPC_OF is not set</div><div class='del'>-CONFIG_USB_OHCI_HCD=y</div><div class='del'>-CONFIG_USB_UHCI_HCD=y</div><div class='del'>-CONFIG_USB_SERIAL=y</div><div class='del'>-CONFIG_USB_SERIAL_GENERIC=y</div><div class='del'>-CONFIG_USB_SERIAL_CYPRESS_M8=m</div><div class='del'>-CONFIG_USB_SERIAL_GARMIN=m</div><div class='del'>-CONFIG_USB_SERIAL_IPW=m</div><div class='del'>-CONFIG_USB_SERIAL_KEYSPAN=y</div><div class='del'>-CONFIG_USB_SERIAL_TI=m</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT4_FS=y</div><div class='del'>-CONFIG_FS_DAX=y</div><div class='del'>-CONFIG_MSDOS_FS=y</div><div class='del'>-CONFIG_VFAT_FS=y</div><div class='del'>-CONFIG_PROC_KCORE=y</div><div class='del'>-CONFIG_TMPFS=y</div><div class='del'>-CONFIG_HUGETLBFS=y</div><div class='del'>-CONFIG_CRAMFS=y</div><div class='del'>-CONFIG_NFS_FS=y</div><div class='del'>-CONFIG_NFS_V3_ACL=y</div><div class='del'>-CONFIG_NFS_V4=y</div><div class='del'>-CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_NLS_DEFAULT="utf-8"</div><div class='del'>-CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='del'>-CONFIG_DEBUG_STACK_USAGE=y</div><div class='del'>-CONFIG_DEBUG_STACKOVERFLOW=y</div><div class='del'>-CONFIG_XMON=y</div><div class='del'>-CONFIG_XMON_DEFAULT=y</div><div class='del'>-CONFIG_BOOTX_TEXT=y</div><div class='del'>-CONFIG_CRYPTO_ECB=m</div><div class='del'>-CONFIG_CRYPTO_PCBC=m</div><div class='del'>-# CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRINTK_TIME=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig<br/>index 83c4710017e9..a815d9e5e3e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc83xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc83xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc83xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/mpc83xx_defconfig</a></div><div class='hunk'>@@ -97,7 +97,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig<br/>index 6f449411abf7..dfbdd5e8e108 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc866_ads_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/mpc866_ads_defconfig</a></div><div class='hunk'>@@ -38,5 +38,3 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig<br/>index 77306be62e9e..9bc2758a6a9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc885_ads_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mpc885_ads_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mpc885_ads_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/mpc885_ads_defconfig</a></div><div class='hunk'>@@ -70,7 +70,6 @@ CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_CRYPTO=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_TALITOS=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='hunk'>@@ -78,4 +77,4 @@ CONFIG_DEBUG_VM_PGTABLE=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> CONFIG_BDI_SWITCH=y</div><div class='ctx'> CONFIG_PPC_EARLY_DEBUG=y</div><div class='del'>-CONFIG_GENERIC_PTDUMP=y</div><div class='add'>+CONFIG_PTDUMP_DEBUGFS=y</div><div class='head'>diff --git a/arch/powerpc/configs/mvme5100_defconfig b/arch/powerpc/configs/mvme5100_defconfig<br/>index d1c7fd5bf34b..fa2b3b9c5945 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mvme5100_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/mvme5100_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/mvme5100_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/mvme5100_defconfig</a></div><div class='hunk'>@@ -107,8 +107,6 @@ CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig<br/>index 61993944db40..8bbf51b38480 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/pasemi_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/pasemi_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/pasemi_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/pasemi_defconfig</a></div><div class='hunk'>@@ -159,7 +159,6 @@ CONFIG_NFSD=y</div><div class='ctx'> CONFIG_NFSD_V4=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig<br/>index 57ded82c2840..ae45f70b29f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/pmac32_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/pmac32_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/pmac32_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/pmac32_defconfig</a></div><div class='hunk'>@@ -87,7 +87,6 @@ CONFIG_IP_NF_RAW=m</div><div class='ctx'> CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_BT=m</div><div class='ctx'> CONFIG_BT_RFCOMM=m</div><div class='ctx'> CONFIG_BT_RFCOMM_TTY=y</div><div class='hunk'>@@ -208,6 +207,7 @@ CONFIG_FB_ATY=y</div><div class='ctx'> CONFIG_FB_ATY_CT=y</div><div class='ctx'> CONFIG_FB_ATY_GX=y</div><div class='ctx'> CONFIG_FB_3DFX=y</div><div class='add'>+CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='ctx'> # CONFIG_VGA_CONSOLE is not set</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='hunk'>@@ -275,7 +275,6 @@ CONFIG_NFSD_V3_ACL=y</div><div class='ctx'> CONFIG_NFSD_V4=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig<br/>index ee84ade7a033..bd4685612de6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/powernv_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/powernv_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/powernv_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/powernv_defconfig</a></div><div class='hunk'>@@ -46,7 +46,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_USERSPACE=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='del'>-CONFIG_HZ_100=y</div><div class='add'>+CONFIG_HZ_1000=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='ctx'> CONFIG_PPC_TRANSACTIONAL_MEM=y</div><div class='ctx'> CONFIG_PPC_UV=y</div><div class='hunk'>@@ -317,14 +317,10 @@ CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='ctx'> CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='ctx'> CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='ctx'> CONFIG_XMON=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='del'>-CONFIG_CRYPTO_CRC32C_VPMSUM=m</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF_VPMSUM=m</div><div class='del'>-CONFIG_CRYPTO_MD5_PPC=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_PPC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA256=y</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='hunk'>@@ -343,3 +339,4 @@ CONFIG_KVM_BOOK3S_64_HV=m</div><div class='ctx'> CONFIG_VHOST_NET=m</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_PRINTK_CALLER=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='head'>diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig<br/>index 8b595f67068c..41c930f74ed4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc44x_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc44x_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc44x_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ppc44x_defconfig</a></div><div class='hunk'>@@ -90,7 +90,6 @@ CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=y</div><div class='head'>diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig<br/>index a5e3e7f97f4d..2d92c11eea7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc64_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc64_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc64_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ppc64_defconfig</a></div><div class='hunk'>@@ -44,7 +44,6 @@ CONFIG_PPC_SMLPAR=y</div><div class='ctx'> CONFIG_IBMEBUS=y</div><div class='ctx'> CONFIG_PAPR_SCM=m</div><div class='ctx'> CONFIG_PPC_SVM=y</div><div class='del'>-CONFIG_PPC_MAPLE=y</div><div class='ctx'> CONFIG_PPC_PASEMI=y</div><div class='ctx'> CONFIG_PPC_PASEMI_IOMMU=y</div><div class='ctx'> CONFIG_PPC_PS3=y</div><div class='hunk'>@@ -52,14 +51,13 @@ CONFIG_PS3_DISK=m</div><div class='ctx'> CONFIG_PS3_ROM=m</div><div class='ctx'> CONFIG_PS3_FLASH=m</div><div class='ctx'> CONFIG_PS3_LPM=m</div><div class='del'>-CONFIG_PPC_IBM_CELL_BLADE=y</div><div class='ctx'> CONFIG_RTAS_FLASH=m</div><div class='ctx'> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_USERSPACE=y</div><div class='ctx'> CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y</div><div class='ctx'> CONFIG_CPU_FREQ_PMAC64=y</div><div class='del'>-CONFIG_HZ_100=y</div><div class='add'>+CONFIG_HZ_1000=y</div><div class='ctx'> CONFIG_PPC_TRANSACTIONAL_MEM=y</div><div class='ctx'> CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_KEXEC_FILE=y</div><div class='hunk'>@@ -229,7 +227,6 @@ CONFIG_NETXEN_NIC=m</div><div class='ctx'> CONFIG_SUNGEM=y</div><div class='ctx'> CONFIG_GELIC_NET=m</div><div class='ctx'> CONFIG_GELIC_WIRELESS=y</div><div class='del'>-CONFIG_SPIDER_NET=m</div><div class='ctx'> CONFIG_BROADCOM_PHY=m</div><div class='ctx'> CONFIG_MARVELL_PHY=y</div><div class='ctx'> CONFIG_PPP=m</div><div class='hunk'>@@ -380,7 +377,7 @@ CONFIG_IMA_WRITE_POLICY=y</div><div class='ctx'> CONFIG_IMA_APPRAISE=y</div><div class='ctx'> CONFIG_IMA_ARCH_POLICY=y</div><div class='ctx'> CONFIG_IMA_APPRAISE_MODSIG=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_SERPENT=m</div><div class='hunk'>@@ -390,11 +387,6 @@ CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA256=y</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRYPTO_CRC32C_VPMSUM=m</div><div class='del'>-CONFIG_CRYPTO_CRCT10DIF_VPMSUM=m</div><div class='del'>-CONFIG_CRYPTO_VPMSUM_TESTER=m</div><div class='del'>-CONFIG_CRYPTO_MD5_PPC=m</div><div class='del'>-CONFIG_CRYPTO_SHA1_PPC=m</div><div class='ctx'> CONFIG_CRYPTO_AES_GCM_P10=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_NX=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_NX_ENCRYPT=m</div><div class='hunk'>@@ -472,3 +464,4 @@ CONFIG_TEST_MEMCAT_P=m</div><div class='ctx'> CONFIG_TEST_MEMINIT=m</div><div class='ctx'> CONFIG_TEST_FREE_PAGES=m</div><div class='ctx'> CONFIG_MEMTEST=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='head'>diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig<br/>index 4c05f4e4d505..90247b2a0ab0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc64e_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc64e_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc64e_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ppc64e_defconfig</a></div><div class='hunk'>@@ -207,7 +207,6 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_STACK_USAGE=y</div><div class='hunk'>@@ -221,7 +220,7 @@ CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='ctx'> CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='ctx'> CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='ctx'> CONFIG_XMON=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig<br/>index c06344db0eb3..b082c1fae13c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc6xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ppc6xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ppc6xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ppc6xx_defconfig</a></div><div class='hunk'>@@ -225,7 +225,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=m</div><div class='ctx'> CONFIG_ATM_CLIP=m</div><div class='hunk'>@@ -253,7 +252,6 @@ CONFIG_NET_SCH_DSMARK=m</div><div class='ctx'> CONFIG_NET_SCH_NETEM=m</div><div class='ctx'> CONFIG_NET_SCH_INGRESS=m</div><div class='ctx'> CONFIG_NET_CLS_BASIC=m</div><div class='del'>-CONFIG_NET_CLS_TCINDEX=m</div><div class='ctx'> CONFIG_NET_CLS_ROUTE4=m</div><div class='ctx'> CONFIG_NET_CLS_FW=m</div><div class='ctx'> CONFIG_NET_CLS_U32=m</div><div class='hunk'>@@ -486,7 +484,6 @@ CONFIG_VIA_VELOCITY=m</div><div class='ctx'> CONFIG_PCMCIA_XIRC2PS=m</div><div class='ctx'> CONFIG_FDDI=y</div><div class='ctx'> CONFIG_SKFP=m</div><div class='del'>-CONFIG_NET_SB1000=m</div><div class='ctx'> CONFIG_BROADCOM_PHY=m</div><div class='ctx'> CONFIG_CICADA_PHY=m</div><div class='ctx'> CONFIG_DAVICOM_PHY=m</div><div class='hunk'>@@ -717,6 +714,7 @@ CONFIG_FB_TRIDENT=m</div><div class='ctx'> CONFIG_FB_SM501=m</div><div class='ctx'> CONFIG_FB_IBM_GXT4500=y</div><div class='ctx'> CONFIG_LCD_PLATFORM=m</div><div class='add'>+CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='ctx'> CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y</div><div class='ctx'> CONFIG_LOGO=y</div><div class='hunk'>@@ -986,7 +984,6 @@ CONFIG_MINIX_FS=m</div><div class='ctx'> CONFIG_OMFS_FS=m</div><div class='ctx'> CONFIG_QNX4FS_FS=m</div><div class='ctx'> CONFIG_ROMFS_FS=m</div><div class='del'>-CONFIG_SYSV_FS=m</div><div class='ctx'> CONFIG_UFS_FS=m</div><div class='ctx'> CONFIG_NFS_FS=m</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='hunk'>@@ -1075,7 +1072,7 @@ CONFIG_SECURITY_NETWORK_XFRM=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_BOOTPARAM=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_DISABLE=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig<br/>index 2b175ddf82f0..0b48d2b776c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ps3_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/ps3_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/ps3_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/ps3_defconfig</a></div><div class='hunk'>@@ -148,8 +148,6 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/powerpc/configs/skiroot_defconfig b/arch/powerpc/configs/skiroot_defconfig<br/>index 9d44e6630908..2b71a6dc399e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/skiroot_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/skiroot_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/skiroot_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/skiroot_defconfig</a></div><div class='hunk'>@@ -78,7 +78,6 @@ CONFIG_VIRTIO_BLK=m</div><div class='ctx'> CONFIG_BLK_DEV_NVME=m</div><div class='ctx'> CONFIG_NVME_MULTIPATH=y</div><div class='ctx'> CONFIG_EEPROM_AT24=m</div><div class='del'>-# CONFIG_CXL is not set</div><div class='ctx'> # CONFIG_OCXL is not set</div><div class='ctx'> CONFIG_BLK_DEV_SD=m</div><div class='ctx'> CONFIG_BLK_DEV_SR=m</div><div class='hunk'>@@ -279,9 +278,6 @@ CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY=y</div><div class='ctx'> # CONFIG_INTEGRITY is not set</div><div class='ctx'> CONFIG_LSM="yama,loadpin,safesetid,integrity"</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='del'>-CONFIG_LIBCRC32C=y</div><div class='ctx'> # CONFIG_XZ_DEC_X86 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_IA64 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_ARM is not set</div><div class='head'>diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig<br/>index 7a978d396991..e415222bd839 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/storcenter_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/storcenter_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/storcenter_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/storcenter_defconfig</a></div><div class='hunk'>@@ -75,4 +75,3 @@ CONFIG_NLS_DEFAULT="utf8"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig<br/>index 383c0966e92f..425f10837a18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/tqm8xx_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/tqm8xx_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/tqm8xx_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/tqm8xx_defconfig</a></div><div class='hunk'>@@ -54,7 +54,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC32_SLICEBY4=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig<br/>index 5017a697b67b..7c714a19221e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/wii_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/configs/wii_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/configs/wii_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/configs/wii_defconfig</a></div><div class='hunk'>@@ -114,7 +114,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_CIFS=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='head'>diff --git a/arch/powerpc/crypto/Kconfig b/arch/powerpc/crypto/Kconfig<br/>index 46a4c85e85e2..662aed46f9c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/Kconfig</a></div><div class='hunk'>@@ -2,90 +2,9 @@</div><div class='ctx'> </div><div class='ctx'> menu "Accelerated Cryptographic Algorithms for CPU (powerpc)"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CURVE25519_PPC64</div><div class='del'>-	tristate "Public key crypto: Curve25519 (PowerPC64)"</div><div class='del'>-	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN</div><div class='del'>-	select CRYPTO_LIB_CURVE25519_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CURVE25519</div><div class='del'>-	help</div><div class='del'>-	  Curve25519 algorithm</div><div class='del'>-</div><div class='del'>-	  Architecture: PowerPC64</div><div class='del'>-	  - Little-endian</div><div class='del'>-</div><div class='del'>-config CRYPTO_CRC32C_VPMSUM</div><div class='del'>-	tristate "CRC32c"</div><div class='del'>-	depends on PPC64 &amp;&amp; ALTIVEC</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRC32</div><div class='del'>-	help</div><div class='del'>-	  CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc64 using</div><div class='del'>-	  - AltiVec extensions</div><div class='del'>-</div><div class='del'>-	  Enable on POWER8 and newer processors for improved performance.</div><div class='del'>-</div><div class='del'>-config CRYPTO_CRCT10DIF_VPMSUM</div><div class='del'>-	tristate "CRC32T10DIF"</div><div class='del'>-	depends on PPC64 &amp;&amp; ALTIVEC &amp;&amp; CRC_T10DIF</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc64 using</div><div class='del'>-	  - AltiVec extensions</div><div class='del'>-</div><div class='del'>-	  Enable on POWER8 and newer processors for improved performance.</div><div class='del'>-</div><div class='del'>-config CRYPTO_VPMSUM_TESTER</div><div class='del'>-	tristate "CRC32c and CRC32T10DIF hardware acceleration tester"</div><div class='del'>-	depends on CRYPTO_CRCT10DIF_VPMSUM &amp;&amp; CRYPTO_CRC32C_VPMSUM</div><div class='del'>-	help</div><div class='del'>-	  Stress test for CRC32c and CRCT10DIF algorithms implemented with</div><div class='del'>-	  powerpc64 AltiVec extensions (POWER8 vpmsum instructions).</div><div class='del'>-	  Unless you are testing these algorithms, you don't need this.</div><div class='del'>-</div><div class='del'>-config CRYPTO_MD5_PPC</div><div class='del'>-	tristate "Digests: MD5"</div><div class='del'>-	depends on PPC</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  MD5 message digest algorithm (RFC1321)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_PPC</div><div class='del'>-	tristate "Hash functions: SHA-1"</div><div class='del'>-	depends on PPC</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA1_PPC_SPE</div><div class='del'>-	tristate "Hash functions: SHA-1 (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='del'>-	help</div><div class='del'>-	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc using</div><div class='del'>-	  - SPE (Signal Processing Engine) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA256_PPC_SPE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc using</div><div class='del'>-	  - SPE (Signal Processing Engine) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AES_PPC_SPE</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='add'>+	depends on SPE</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	help</div><div class='ctx'> 	  Block ciphers: AES cipher algorithms (FIPS-197)</div><div class='hunk'>@@ -107,12 +26,12 @@ config CRYPTO_AES_PPC_SPE</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_GCM_P10</div><div class='ctx'> 	tristate "Stitched AES/GCM acceleration support on P10 or later CPU (PPC)"</div><div class='del'>-	depends on BROKEN</div><div class='ctx'> 	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='add'>+	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  AEAD cipher: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	  GCM (Galois/Counter Mode) authenticated encryption mode (NIST SP800-38D)</div><div class='hunk'>@@ -123,32 +42,6 @@ config CRYPTO_AES_GCM_P10</div><div class='ctx'> 	  Support for cryptographic acceleration instructions on Power10 or</div><div class='ctx'> 	  later CPU. This module supports stitched acceleration for AES/GCM.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_P10</div><div class='del'>-	tristate "Ciphers: ChaCha20, XChacha20, XChacha12 (P10 or later)"</div><div class='del'>-	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: PowerPC64</div><div class='del'>-	  - Power10 or later</div><div class='del'>-	  - Little-endian</div><div class='del'>-</div><div class='del'>-config CRYPTO_POLY1305_P10</div><div class='del'>-	tristate "Hash functions: Poly1305 (P10 or later)"</div><div class='del'>-	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_LIB_POLY1305_GENERIC</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: PowerPC64</div><div class='del'>-	  - Power10 or later</div><div class='del'>-	  - Little-endian</div><div class='del'>-</div><div class='ctx'> config CRYPTO_DEV_VMX</div><div class='ctx'>         bool "Support for VMX cryptographic acceleration instructions"</div><div class='ctx'>         depends on PPC64 &amp;&amp; VSX</div><div class='head'>diff --git a/arch/powerpc/crypto/Makefile b/arch/powerpc/crypto/Makefile<br/>index 59808592f0a1..5960e5300db7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/Makefile</a></div><div class='hunk'>@@ -6,31 +6,12 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_PPC_SPE) += aes-ppc-spe.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_MD5_PPC) += md5-ppc.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_PPC) += sha1-powerpc.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA1_PPC_SPE) += sha1-ppc-spe.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_PPC_SPE) += sha256-ppc-spe.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32C_VPMSUM) += crc32c-vpmsum.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRCT10DIF_VPMSUM) += crct10dif-vpmsum.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_VPMSUM_TESTER) += crc-vpmsum_test.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_GCM_P10) += aes-gcm-p10-crypto.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_P10) += chacha-p10-crypto.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_P10) += poly1305-p10-crypto.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_VMX_ENCRYPT) += vmx-crypto.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CURVE25519_PPC64) += curve25519-ppc64le.o</div><div class='ctx'> </div><div class='ctx'> aes-ppc-spe-y := aes-spe-core.o aes-spe-keys.o aes-tab-4k.o aes-spe-modes.o aes-spe-glue.o</div><div class='del'>-md5-ppc-y := md5-asm.o md5-glue.o</div><div class='del'>-sha1-powerpc-y := sha1-powerpc-asm.o sha1.o</div><div class='del'>-sha1-ppc-spe-y := sha1-spe-asm.o sha1-spe-glue.o</div><div class='del'>-sha256-ppc-spe-y := sha256-spe-asm.o sha256-spe-glue.o</div><div class='del'>-crc32c-vpmsum-y := crc32c-vpmsum_asm.o crc32c-vpmsum_glue.o</div><div class='del'>-crct10dif-vpmsum-y := crct10dif-vpmsum_asm.o crct10dif-vpmsum_glue.o</div><div class='ctx'> aes-gcm-p10-crypto-y := aes-gcm-p10-glue.o aes-gcm-p10.o ghashp10-ppc.o aesp10-ppc.o</div><div class='del'>-chacha-p10-crypto-y := chacha-p10-glue.o chacha-p10le-8x.o</div><div class='del'>-poly1305-p10-crypto-y := poly1305-p10-glue.o poly1305-p10le_64.o</div><div class='ctx'> vmx-crypto-objs := vmx.o aesp8-ppc.o ghashp8-ppc.o aes.o aes_cbc.o aes_ctr.o aes_xts.o ghash.o</div><div class='del'>-curve25519-ppc64le-y := curve25519-ppc64le-core.o curve25519-ppc64le_asm.o</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)</div><div class='ctx'> override flavour := linux-ppc64le</div><div class='hunk'>@@ -56,3 +37,4 @@ $(obj)/aesp8-ppc.S $(obj)/ghashp8-ppc.S: $(obj)/%.S: $(src)/%.pl FORCE</div><div class='ctx'> OBJECT_FILES_NON_STANDARD_aesp10-ppc.o := y</div><div class='ctx'> OBJECT_FILES_NON_STANDARD_ghashp10-ppc.o := y</div><div class='ctx'> OBJECT_FILES_NON_STANDARD_aesp8-ppc.o := y</div><div class='add'>+OBJECT_FILES_NON_STANDARD_ghashp8-ppc.o := y</div><div class='head'>diff --git a/arch/powerpc/crypto/aes-gcm-p10-glue.c b/arch/powerpc/crypto/aes-gcm-p10-glue.c<br/>index f66ad56e765f..85f4fd4b1bdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes-gcm-p10-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes-gcm-p10-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes-gcm-p10-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes-gcm-p10-glue.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='hunk'>@@ -24,6 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> #define	PPC_ALIGN		16</div><div class='ctx'> #define GCM_IV_SIZE		12</div><div class='add'>+#define RFC4106_NONCE_SIZE	4</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("PPC64le AES-GCM with Stitched implementation");</div><div class='ctx'> MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com");</div><div class='hunk'>@@ -31,15 +33,16 @@ MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("aes");</div><div class='ctx'> </div><div class='ctx'> asmlinkage int aes_p10_set_encrypt_key(const u8 *userKey, const int bits,</div><div class='del'>-				      void *key);</div><div class='add'>+				       void *key);</div><div class='ctx'> asmlinkage void aes_p10_encrypt(const u8 *in, u8 *out, const void *key);</div><div class='del'>-asmlinkage void aes_p10_gcm_encrypt(u8 *in, u8 *out, size_t len,</div><div class='add'>+asmlinkage void aes_p10_gcm_encrypt(const u8 *in, u8 *out, size_t len,</div><div class='ctx'> 				    void *rkey, u8 *iv, void *Xi);</div><div class='del'>-asmlinkage void aes_p10_gcm_decrypt(u8 *in, u8 *out, size_t len,</div><div class='add'>+asmlinkage void aes_p10_gcm_decrypt(const u8 *in, u8 *out, size_t len,</div><div class='ctx'> 				    void *rkey, u8 *iv, void *Xi);</div><div class='ctx'> asmlinkage void gcm_init_htable(unsigned char htable[], unsigned char Xi[]);</div><div class='ctx'> asmlinkage void gcm_ghash_p10(unsigned char *Xi, unsigned char *Htable,</div><div class='del'>-		unsigned char *aad, unsigned int alen);</div><div class='add'>+			      unsigned char *aad, unsigned int alen);</div><div class='add'>+asmlinkage void gcm_update(u8 *iv, void *Xi);</div><div class='ctx'> </div><div class='ctx'> struct aes_key {</div><div class='ctx'> 	u8 key[AES_MAX_KEYLENGTH];</div><div class='hunk'>@@ -52,6 +55,7 @@ struct gcm_ctx {</div><div class='ctx'> 	u8 aad_hash[16];</div><div class='ctx'> 	u64 aadLen;</div><div class='ctx'> 	u64 Plen;	/* offset 56 - used in aes_p10_gcm_{en/de}crypt */</div><div class='add'>+	u8 pblock[16];</div><div class='ctx'> };</div><div class='ctx'> struct Hash_ctx {</div><div class='ctx'> 	u8 H[16];	/* subkey */</div><div class='hunk'>@@ -60,17 +64,20 @@ struct Hash_ctx {</div><div class='ctx'> </div><div class='ctx'> struct p10_aes_gcm_ctx {</div><div class='ctx'> 	struct aes_key enc_key;</div><div class='add'>+	u8 nonce[RFC4106_NONCE_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void vsx_begin(void)</div><div class='ctx'> {</div><div class='ctx'> 	preempt_disable();</div><div class='add'>+	pagefault_disable();</div><div class='ctx'> 	enable_kernel_vsx();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vsx_end(void)</div><div class='ctx'> {</div><div class='ctx'> 	disable_kernel_vsx();</div><div class='add'>+	pagefault_enable();</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -185,7 +192,7 @@ static int set_authsize(struct crypto_aead *tfm, unsigned int authsize)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int p10_aes_gcm_setkey(struct crypto_aead *aead, const u8 *key,</div><div class='del'>-			     unsigned int keylen)</div><div class='add'>+			      unsigned int keylen)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_tfm *tfm = crypto_aead_tfm(aead);</div><div class='ctx'> 	struct p10_aes_gcm_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='hunk'>@@ -198,7 +205,8 @@ static int p10_aes_gcm_setkey(struct crypto_aead *aead, const u8 *key,</div><div class='ctx'> 	return ret ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='add'>+static int p10_aes_gcm_crypt(struct aead_request *req, u8 *riv,</div><div class='add'>+			     int assoclen, int enc)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_tfm *tfm = req-&gt;base.tfm;</div><div class='ctx'> 	struct p10_aes_gcm_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='hunk'>@@ -206,11 +214,9 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> 	struct gcm_ctx *gctx = PTR_ALIGN((void *)databuf, PPC_ALIGN);</div><div class='ctx'> 	u8 hashbuf[sizeof(struct Hash_ctx) + PPC_ALIGN];</div><div class='ctx'> 	struct Hash_ctx *hash = PTR_ALIGN((void *)hashbuf, PPC_ALIGN);</div><div class='del'>-	struct scatter_walk assoc_sg_walk;</div><div class='ctx'> 	struct skcipher_walk walk;</div><div class='ctx'> 	u8 *assocmem = NULL;</div><div class='ctx'> 	u8 *assoc;</div><div class='del'>-	unsigned int assoclen = req-&gt;assoclen;</div><div class='ctx'> 	unsigned int cryptlen = req-&gt;cryptlen;</div><div class='ctx'> 	unsigned char ivbuf[AES_BLOCK_SIZE+PPC_ALIGN];</div><div class='ctx'> 	unsigned char *iv = PTR_ALIGN((void *)ivbuf, PPC_ALIGN);</div><div class='hunk'>@@ -218,16 +224,16 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> 	unsigned long auth_tag_len = crypto_aead_authsize(__crypto_aead_cast(tfm));</div><div class='ctx'> 	u8 otag[16];</div><div class='ctx'> 	int total_processed = 0;</div><div class='add'>+	int nbytes;</div><div class='ctx'> </div><div class='ctx'> 	memset(databuf, 0, sizeof(databuf));</div><div class='ctx'> 	memset(hashbuf, 0, sizeof(hashbuf));</div><div class='ctx'> 	memset(ivbuf, 0, sizeof(ivbuf));</div><div class='del'>-	memcpy(iv, req-&gt;iv, GCM_IV_SIZE);</div><div class='add'>+	memcpy(iv, riv, GCM_IV_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Linearize assoc, if not already linear */</div><div class='ctx'> 	if (req-&gt;src-&gt;length &gt;= assoclen &amp;&amp; req-&gt;src-&gt;length) {</div><div class='del'>-		scatterwalk_start(&amp;assoc_sg_walk, req-&gt;src);</div><div class='del'>-		assoc = scatterwalk_map(&amp;assoc_sg_walk);</div><div class='add'>+		assoc = sg_virt(req-&gt;src); /* ppc64 is !HIGHMEM */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		gfp_t flags = (req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) ?</div><div class='ctx'> 			      GFP_KERNEL : GFP_ATOMIC;</div><div class='hunk'>@@ -245,10 +251,7 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> 	gcmp10_init(gctx, iv, (unsigned char *) &amp;ctx-&gt;enc_key, hash, assoc, assoclen);</div><div class='ctx'> 	vsx_end();</div><div class='ctx'> </div><div class='del'>-	if (!assocmem)</div><div class='del'>-		scatterwalk_unmap(assoc);</div><div class='del'>-	else</div><div class='del'>-		kfree(assocmem);</div><div class='add'>+	kfree(assocmem);</div><div class='ctx'> </div><div class='ctx'> 	if (enc)</div><div class='ctx'> 		ret = skcipher_walk_aead_encrypt(&amp;walk, req, false);</div><div class='hunk'>@@ -257,19 +260,25 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	while (walk.nbytes &gt; 0 &amp;&amp; ret == 0) {</div><div class='add'>+	while ((nbytes = walk.nbytes) &gt; 0 &amp;&amp; ret == 0) {</div><div class='add'>+		const u8 *src = walk.src.virt.addr;</div><div class='add'>+		u8 *dst = walk.dst.virt.addr;</div><div class='add'>+		u8 buf[AES_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+		if (unlikely(nbytes &gt; 0 &amp;&amp; nbytes &lt; AES_BLOCK_SIZE))</div><div class='add'>+			src = dst = memcpy(buf, src, nbytes);</div><div class='ctx'> </div><div class='ctx'> 		vsx_begin();</div><div class='ctx'> 		if (enc)</div><div class='del'>-			aes_p10_gcm_encrypt(walk.src.virt.addr,</div><div class='del'>-					    walk.dst.virt.addr,</div><div class='del'>-					    walk.nbytes,</div><div class='add'>+			aes_p10_gcm_encrypt(src, dst, nbytes,</div><div class='ctx'> 					    &amp;ctx-&gt;enc_key, gctx-&gt;iv, hash-&gt;Htable);</div><div class='ctx'> 		else</div><div class='del'>-			aes_p10_gcm_decrypt(walk.src.virt.addr,</div><div class='del'>-					    walk.dst.virt.addr,</div><div class='del'>-					    walk.nbytes,</div><div class='add'>+			aes_p10_gcm_decrypt(src, dst, nbytes,</div><div class='ctx'> 					    &amp;ctx-&gt;enc_key, gctx-&gt;iv, hash-&gt;Htable);</div><div class='add'>+</div><div class='add'>+		if (unlikely(nbytes &gt; 0 &amp;&amp; nbytes &lt; AES_BLOCK_SIZE))</div><div class='add'>+			memcpy(walk.dst.virt.addr, buf, nbytes);</div><div class='add'>+</div><div class='ctx'> 		vsx_end();</div><div class='ctx'> </div><div class='ctx'> 		total_processed += walk.nbytes;</div><div class='hunk'>@@ -281,6 +290,7 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> </div><div class='ctx'> 	/* Finalize hash */</div><div class='ctx'> 	vsx_begin();</div><div class='add'>+	gcm_update(gctx-&gt;iv, hash-&gt;Htable);</div><div class='ctx'> 	finish_tag(gctx, hash, total_processed);</div><div class='ctx'> 	vsx_end();</div><div class='ctx'> </div><div class='hunk'>@@ -302,17 +312,63 @@ static int p10_aes_gcm_crypt(struct aead_request *req, int enc)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rfc4106_setkey(struct crypto_aead *tfm, const u8 *inkey,</div><div class='add'>+			  unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct p10_aes_gcm_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	keylen -= RFC4106_NONCE_SIZE;</div><div class='add'>+	err = p10_aes_gcm_setkey(tfm, inkey, keylen);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memcpy(ctx-&gt;nonce, inkey + keylen, RFC4106_NONCE_SIZE);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rfc4106_setauthsize(struct crypto_aead *tfm, unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	return crypto_rfc4106_check_authsize(authsize);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rfc4106_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct p10_aes_gcm_ctx *ctx = crypto_aead_ctx(aead);</div><div class='add'>+	u8 iv[AES_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+	memcpy(iv, ctx-&gt;nonce, RFC4106_NONCE_SIZE);</div><div class='add'>+	memcpy(iv + RFC4106_NONCE_SIZE, req-&gt;iv, GCM_RFC4106_IV_SIZE);</div><div class='add'>+</div><div class='add'>+	return crypto_ipsec_check_assoclen(req-&gt;assoclen) ?:</div><div class='add'>+	       p10_aes_gcm_crypt(req, iv, req-&gt;assoclen - GCM_RFC4106_IV_SIZE, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rfc4106_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='add'>+	struct p10_aes_gcm_ctx *ctx = crypto_aead_ctx(aead);</div><div class='add'>+	u8 iv[AES_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+	memcpy(iv, ctx-&gt;nonce, RFC4106_NONCE_SIZE);</div><div class='add'>+	memcpy(iv + RFC4106_NONCE_SIZE, req-&gt;iv, GCM_RFC4106_IV_SIZE);</div><div class='add'>+</div><div class='add'>+	return crypto_ipsec_check_assoclen(req-&gt;assoclen) ?:</div><div class='add'>+	       p10_aes_gcm_crypt(req, iv, req-&gt;assoclen - GCM_RFC4106_IV_SIZE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int p10_aes_gcm_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	return p10_aes_gcm_crypt(req, 1);</div><div class='add'>+	return p10_aes_gcm_crypt(req, req-&gt;iv, req-&gt;assoclen, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int p10_aes_gcm_decrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	return p10_aes_gcm_crypt(req, 0);</div><div class='add'>+	return p10_aes_gcm_crypt(req, req-&gt;iv, req-&gt;assoclen, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct aead_alg gcm_aes_alg = {</div><div class='add'>+static struct aead_alg gcm_aes_algs[] = {{</div><div class='ctx'> 	.ivsize			= GCM_IV_SIZE,</div><div class='ctx'> 	.maxauthsize		= 16,</div><div class='ctx'> </div><div class='hunk'>@@ -321,23 +377,57 @@ static struct aead_alg gcm_aes_alg = {</div><div class='ctx'> 	.encrypt		= p10_aes_gcm_encrypt,</div><div class='ctx'> 	.decrypt		= p10_aes_gcm_decrypt,</div><div class='ctx'> </div><div class='del'>-	.base.cra_name		= "gcm(aes)",</div><div class='del'>-	.base.cra_driver_name	= "aes_gcm_p10",</div><div class='add'>+	.base.cra_name		= "__gcm(aes)",</div><div class='add'>+	.base.cra_driver_name	= "__aes_gcm_p10",</div><div class='ctx'> 	.base.cra_priority	= 2100,</div><div class='ctx'> 	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_ctxsize	= sizeof(struct p10_aes_gcm_ctx),</div><div class='add'>+	.base.cra_ctxsize	= sizeof(struct p10_aes_gcm_ctx)+</div><div class='add'>+				  4 * sizeof(u64[2]),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='add'>+	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='add'>+}, {</div><div class='add'>+	.ivsize			= GCM_RFC4106_IV_SIZE,</div><div class='add'>+	.maxauthsize		= 16,</div><div class='add'>+	.setkey			= rfc4106_setkey,</div><div class='add'>+	.setauthsize		= rfc4106_setauthsize,</div><div class='add'>+	.encrypt		= rfc4106_encrypt,</div><div class='add'>+	.decrypt		= rfc4106_decrypt,</div><div class='add'>+</div><div class='add'>+	.base.cra_name		= "__rfc4106(gcm(aes))",</div><div class='add'>+	.base.cra_driver_name	= "__rfc4106_aes_gcm_p10",</div><div class='add'>+	.base.cra_priority	= 2100,</div><div class='add'>+	.base.cra_blocksize	= 1,</div><div class='add'>+	.base.cra_ctxsize	= sizeof(struct p10_aes_gcm_ctx) +</div><div class='add'>+				  4 * sizeof(u64[2]),</div><div class='add'>+	.base.cra_module	= THIS_MODULE,</div><div class='add'>+	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='add'>+}};</div><div class='add'>+</div><div class='add'>+static struct simd_aead_alg *p10_simd_aeads[ARRAY_SIZE(gcm_aes_algs)];</div><div class='ctx'> </div><div class='ctx'> static int __init p10_init(void)</div><div class='ctx'> {</div><div class='del'>-	return crypto_register_aead(&amp;gcm_aes_alg);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = simd_register_aeads_compat(gcm_aes_algs,</div><div class='add'>+					 ARRAY_SIZE(gcm_aes_algs),</div><div class='add'>+					 p10_simd_aeads);</div><div class='add'>+	if (ret) {</div><div class='add'>+		simd_unregister_aeads(gcm_aes_algs, ARRAY_SIZE(gcm_aes_algs),</div><div class='add'>+				      p10_simd_aeads);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit p10_exit(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_aead(&amp;gcm_aes_alg);</div><div class='add'>+	simd_unregister_aeads(gcm_aes_algs, ARRAY_SIZE(gcm_aes_algs),</div><div class='add'>+			      p10_simd_aeads);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-module_cpu_feature_match(PPC_MODULE_FEATURE_P10, p10_init);</div><div class='add'>+module_init(p10_init);</div><div class='ctx'> module_exit(p10_exit);</div><div class='head'>diff --git a/arch/powerpc/crypto/aes-gcm-p10.S b/arch/powerpc/crypto/aes-gcm-p10.S<br/>index a51f4b265308..89f50eef3512 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes-gcm-p10.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes-gcm-p10.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes-gcm-p10.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes-gcm-p10.S</a></div><div class='hunk'>@@ -1,42 +1,42 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>- #</div><div class='del'>- # Accelerated AES-GCM stitched implementation for ppc64le.</div><div class='del'>- #</div><div class='del'>- # Copyright 2022- IBM Inc. All rights reserved</div><div class='del'>- #</div><div class='del'>- #===================================================================================</div><div class='del'>- # Written by Danny Tsen &lt;dtsen@linux.ibm.com&gt;</div><div class='del'>- #</div><div class='del'>- # GHASH is based on the Karatsuba multiplication method.</div><div class='del'>- #</div><div class='del'>- #    Xi xor X1</div><div class='del'>- #</div><div class='del'>- #    X1 * H^4 + X2 * H^3 + x3 * H^2 + X4 * H =</div><div class='del'>- #      (X1.h * H4.h + xX.l * H4.l + X1 * H4) +</div><div class='del'>- #      (X2.h * H3.h + X2.l * H3.l + X2 * H3) +</div><div class='del'>- #      (X3.h * H2.h + X3.l * H2.l + X3 * H2) +</div><div class='del'>- #      (X4.h * H.h + X4.l * H.l + X4 * H)</div><div class='del'>- #</div><div class='del'>- # Xi = v0</div><div class='del'>- # H Poly = v2</div><div class='del'>- # Hash keys = v3 - v14</div><div class='del'>- #     ( H.l, H, H.h)</div><div class='del'>- #     ( H^2.l, H^2, H^2.h)</div><div class='del'>- #     ( H^3.l, H^3, H^3.h)</div><div class='del'>- #     ( H^4.l, H^4, H^4.h)</div><div class='del'>- #</div><div class='del'>- # v30 is IV</div><div class='del'>- # v31 - counter 1</div><div class='del'>- #</div><div class='del'>- # AES used,</div><div class='del'>- #     vs0 - vs14 for round keys</div><div class='del'>- #     v15, v16, v17, v18, v19, v20, v21, v22 for 8 blocks (encrypted)</div><div class='del'>- #</div><div class='del'>- # This implementation uses stitched AES-GCM approach to improve overall performance.</div><div class='del'>- # AES is implemented with 8x blocks and GHASH is using 2 4x blocks.</div><div class='del'>- #</div><div class='del'>- # ===================================================================================</div><div class='del'>- #</div><div class='add'>+#</div><div class='add'>+# Accelerated AES-GCM stitched implementation for ppc64le.</div><div class='add'>+#</div><div class='add'>+# Copyright 2024- IBM Inc.</div><div class='add'>+#</div><div class='add'>+#===================================================================================</div><div class='add'>+# Written by Danny Tsen &lt;dtsen@us.ibm.com&gt;</div><div class='add'>+#</div><div class='add'>+# GHASH is based on the Karatsuba multiplication method.</div><div class='add'>+#</div><div class='add'>+#    Xi xor X1</div><div class='add'>+#</div><div class='add'>+#    X1 * H^4 + X2 * H^3 + x3 * H^2 + X4 * H =</div><div class='add'>+#      (X1.h * H4.h + xX.l * H4.l + X1 * H4) +</div><div class='add'>+#      (X2.h * H3.h + X2.l * H3.l + X2 * H3) +</div><div class='add'>+#      (X3.h * H2.h + X3.l * H2.l + X3 * H2) +</div><div class='add'>+#      (X4.h * H.h + X4.l * H.l + X4 * H)</div><div class='add'>+#</div><div class='add'>+# Xi = v0</div><div class='add'>+# H Poly = v2</div><div class='add'>+# Hash keys = v3 - v14</div><div class='add'>+#     ( H.l, H, H.h)</div><div class='add'>+#     ( H^2.l, H^2, H^2.h)</div><div class='add'>+#     ( H^3.l, H^3, H^3.h)</div><div class='add'>+#     ( H^4.l, H^4, H^4.h)</div><div class='add'>+#</div><div class='add'>+# v30 is IV</div><div class='add'>+# v31 - counter 1</div><div class='add'>+#</div><div class='add'>+# AES used,</div><div class='add'>+#     vs0 - round key 0</div><div class='add'>+#     v15, v16, v17, v18, v19, v20, v21, v22 for 8 blocks (encrypted)</div><div class='add'>+#</div><div class='add'>+# This implementation uses stitched AES-GCM approach to improve overall performance.</div><div class='add'>+# AES is implemented with 8x blocks and GHASH is using 2 4x blocks.</div><div class='add'>+#</div><div class='add'>+# ===================================================================================</div><div class='add'>+#</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ppc_asm.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='hunk'>@@ -44,483 +44,224 @@</div><div class='ctx'> .machine        "any"</div><div class='ctx'> .text</div><div class='ctx'> </div><div class='del'>- # 4x loops</div><div class='del'>- # v15 - v18 - input states</div><div class='del'>- # vs1 - vs9 - round keys</div><div class='del'>- #</div><div class='del'>-.macro Loop_aes_middle4x</div><div class='del'>-	xxlor	19+32, 1, 1</div><div class='del'>-	xxlor	20+32, 2, 2</div><div class='del'>-	xxlor	21+32, 3, 3</div><div class='del'>-	xxlor	22+32, 4, 4</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 19</div><div class='del'>-	vcipher	16, 16, 19</div><div class='del'>-	vcipher	17, 17, 19</div><div class='del'>-	vcipher	18, 18, 19</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 20</div><div class='del'>-	vcipher	16, 16, 20</div><div class='del'>-	vcipher	17, 17, 20</div><div class='del'>-	vcipher	18, 18, 20</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 21</div><div class='del'>-	vcipher	16, 16, 21</div><div class='del'>-	vcipher	17, 17, 21</div><div class='del'>-	vcipher	18, 18, 21</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 22</div><div class='del'>-	vcipher	16, 16, 22</div><div class='del'>-	vcipher	17, 17, 22</div><div class='del'>-	vcipher	18, 18, 22</div><div class='del'>-</div><div class='del'>-	xxlor	19+32, 5, 5</div><div class='del'>-	xxlor	20+32, 6, 6</div><div class='del'>-	xxlor	21+32, 7, 7</div><div class='del'>-	xxlor	22+32, 8, 8</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 19</div><div class='del'>-	vcipher	16, 16, 19</div><div class='del'>-	vcipher	17, 17, 19</div><div class='del'>-	vcipher	18, 18, 19</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 20</div><div class='del'>-	vcipher	16, 16, 20</div><div class='del'>-	vcipher	17, 17, 20</div><div class='del'>-	vcipher	18, 18, 20</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 21</div><div class='del'>-	vcipher	16, 16, 21</div><div class='del'>-	vcipher	17, 17, 21</div><div class='del'>-	vcipher	18, 18, 21</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 22</div><div class='del'>-	vcipher	16, 16, 22</div><div class='del'>-	vcipher	17, 17, 22</div><div class='del'>-	vcipher	18, 18, 22</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 9, 9</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='add'>+.macro	SAVE_GPR GPR OFFSET FRAME</div><div class='add'>+	std	\GPR,\OFFSET(\FRAME)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>- # 8x loops</div><div class='del'>- # v15 - v22 - input states</div><div class='del'>- # vs1 - vs9 - round keys</div><div class='del'>- #</div><div class='del'>-.macro Loop_aes_middle8x</div><div class='del'>-	xxlor	23+32, 1, 1</div><div class='del'>-	xxlor	24+32, 2, 2</div><div class='del'>-	xxlor	25+32, 3, 3</div><div class='del'>-	xxlor	26+32, 4, 4</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 25</div><div class='del'>-	vcipher	16, 16, 25</div><div class='del'>-	vcipher	17, 17, 25</div><div class='del'>-	vcipher	18, 18, 25</div><div class='del'>-	vcipher	19, 19, 25</div><div class='del'>-	vcipher	20, 20, 25</div><div class='del'>-	vcipher	21, 21, 25</div><div class='del'>-	vcipher	22, 22, 25</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 26</div><div class='del'>-	vcipher	16, 16, 26</div><div class='del'>-	vcipher	17, 17, 26</div><div class='del'>-	vcipher	18, 18, 26</div><div class='del'>-	vcipher	19, 19, 26</div><div class='del'>-	vcipher	20, 20, 26</div><div class='del'>-	vcipher	21, 21, 26</div><div class='del'>-	vcipher	22, 22, 26</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 5, 5</div><div class='del'>-	xxlor	24+32, 6, 6</div><div class='del'>-	xxlor	25+32, 7, 7</div><div class='del'>-	xxlor	26+32, 8, 8</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 25</div><div class='del'>-	vcipher	16, 16, 25</div><div class='del'>-	vcipher	17, 17, 25</div><div class='del'>-	vcipher	18, 18, 25</div><div class='del'>-	vcipher	19, 19, 25</div><div class='del'>-	vcipher	20, 20, 25</div><div class='del'>-	vcipher	21, 21, 25</div><div class='del'>-	vcipher	22, 22, 25</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 26</div><div class='del'>-	vcipher	16, 16, 26</div><div class='del'>-	vcipher	17, 17, 26</div><div class='del'>-	vcipher	18, 18, 26</div><div class='del'>-	vcipher	19, 19, 26</div><div class='del'>-	vcipher	20, 20, 26</div><div class='del'>-	vcipher	21, 21, 26</div><div class='del'>-	vcipher	22, 22, 26</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 9, 9</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='add'>+.macro	SAVE_VRS VRS OFFSET FRAME</div><div class='add'>+	stxv	\VRS+32, \OFFSET(\FRAME)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-.macro Loop_aes_middle_1x</div><div class='del'>-	xxlor	19+32, 1, 1</div><div class='del'>-	xxlor	20+32, 2, 2</div><div class='del'>-	xxlor	21+32, 3, 3</div><div class='del'>-	xxlor	22+32, 4, 4</div><div class='del'>-</div><div class='del'>-	vcipher 15, 15, 19</div><div class='del'>-	vcipher 15, 15, 20</div><div class='del'>-	vcipher 15, 15, 21</div><div class='del'>-	vcipher 15, 15, 22</div><div class='del'>-</div><div class='del'>-	xxlor	19+32, 5, 5</div><div class='del'>-	xxlor	20+32, 6, 6</div><div class='del'>-	xxlor	21+32, 7, 7</div><div class='del'>-	xxlor	22+32, 8, 8</div><div class='del'>-</div><div class='del'>-	vcipher 15, 15, 19</div><div class='del'>-	vcipher 15, 15, 20</div><div class='del'>-	vcipher 15, 15, 21</div><div class='del'>-	vcipher 15, 15, 22</div><div class='del'>-</div><div class='del'>-	xxlor	19+32, 9, 9</div><div class='del'>-	vcipher 15, 15, 19</div><div class='add'>+.macro	RESTORE_GPR GPR OFFSET FRAME</div><div class='add'>+	ld	\GPR,\OFFSET(\FRAME)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # Compute 4x hash values based on Karatsuba method.</div><div class='del'>- #</div><div class='del'>-.macro ppc_aes_gcm_ghash</div><div class='del'>-	vxor		15, 15, 0</div><div class='del'>-</div><div class='del'>-	vpmsumd		23, 12, 15		# H4.L * X.L</div><div class='del'>-	vpmsumd		24, 9, 16</div><div class='del'>-	vpmsumd		25, 6, 17</div><div class='del'>-	vpmsumd		26, 3, 18</div><div class='del'>-</div><div class='del'>-	vxor		23, 23, 24</div><div class='del'>-	vxor		23, 23, 25</div><div class='del'>-	vxor		23, 23, 26		# L</div><div class='del'>-</div><div class='del'>-	vpmsumd		24, 13, 15		# H4.L * X.H + H4.H * X.L</div><div class='del'>-	vpmsumd		25, 10, 16		# H3.L * X1.H + H3.H * X1.L</div><div class='del'>-	vpmsumd		26, 7, 17</div><div class='del'>-	vpmsumd		27, 4, 18</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='del'>-	vxor		24, 24, 27		# M</div><div class='del'>-</div><div class='del'>-	# sum hash and reduction with H Poly</div><div class='del'>-	vpmsumd		28, 23, 2		# reduction</div><div class='del'>-</div><div class='del'>-	vxor		29, 29, 29</div><div class='del'>-	vsldoi		26, 24, 29, 8		# mL</div><div class='del'>-	vsldoi		29, 29, 24, 8		# mH</div><div class='del'>-	vxor		23, 23, 26		# mL + L</div><div class='del'>-</div><div class='del'>-	vsldoi		23, 23, 23, 8		# swap</div><div class='del'>-	vxor		23, 23, 28</div><div class='del'>-</div><div class='del'>-	vpmsumd		24, 14, 15		# H4.H * X.H</div><div class='del'>-	vpmsumd		25, 11, 16</div><div class='del'>-	vpmsumd		26, 8, 17</div><div class='del'>-	vpmsumd		27, 5, 18</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='del'>-	vxor		24, 24, 27</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 29</div><div class='del'>-</div><div class='del'>-	# sum hash and reduction with H Poly</div><div class='del'>-	vsldoi		27, 23, 23, 8		# swap</div><div class='del'>-	vpmsumd		23, 23, 2</div><div class='del'>-	vxor		27, 27, 24</div><div class='del'>-	vxor		23, 23, 27</div><div class='del'>-</div><div class='del'>-	xxlor		32, 23+32, 23+32		# update hash</div><div class='del'>-</div><div class='add'>+.macro	RESTORE_VRS VRS OFFSET FRAME</div><div class='add'>+	lxv	\VRS+32, \OFFSET(\FRAME)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # Combine two 4x ghash</div><div class='del'>- # v15 - v22 - input blocks</div><div class='del'>- #</div><div class='del'>-.macro ppc_aes_gcm_ghash2_4x</div><div class='del'>-	# first 4x hash</div><div class='del'>-	vxor		15, 15, 0		# Xi + X</div><div class='del'>-</div><div class='del'>-	vpmsumd		23, 12, 15		# H4.L * X.L</div><div class='del'>-	vpmsumd		24, 9, 16</div><div class='del'>-	vpmsumd		25, 6, 17</div><div class='del'>-	vpmsumd		26, 3, 18</div><div class='del'>-</div><div class='del'>-	vxor		23, 23, 24</div><div class='del'>-	vxor		23, 23, 25</div><div class='del'>-	vxor		23, 23, 26		# L</div><div class='del'>-</div><div class='del'>-	vpmsumd		24, 13, 15		# H4.L * X.H + H4.H * X.L</div><div class='del'>-	vpmsumd		25, 10, 16		# H3.L * X1.H + H3.H * X1.L</div><div class='del'>-	vpmsumd		26, 7, 17</div><div class='del'>-	vpmsumd		27, 4, 18</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='del'>-</div><div class='del'>-	# sum hash and reduction with H Poly</div><div class='del'>-	vpmsumd		28, 23, 2		# reduction</div><div class='del'>-</div><div class='del'>-	vxor		29, 29, 29</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 27		# M</div><div class='del'>-	vsldoi		26, 24, 29, 8		# mL</div><div class='del'>-	vsldoi		29, 29, 24, 8		# mH</div><div class='del'>-	vxor		23, 23, 26		# mL + L</div><div class='del'>-</div><div class='del'>-	vsldoi		23, 23, 23, 8		# swap</div><div class='del'>-	vxor		23, 23, 28</div><div class='add'>+.macro SAVE_REGS</div><div class='add'>+	mflr 0</div><div class='add'>+	std 0, 16(1)</div><div class='add'>+	stdu 1,-512(1)</div><div class='add'>+</div><div class='add'>+	SAVE_GPR 14, 112, 1</div><div class='add'>+	SAVE_GPR 15, 120, 1</div><div class='add'>+	SAVE_GPR 16, 128, 1</div><div class='add'>+	SAVE_GPR 17, 136, 1</div><div class='add'>+	SAVE_GPR 18, 144, 1</div><div class='add'>+	SAVE_GPR 19, 152, 1</div><div class='add'>+	SAVE_GPR 20, 160, 1</div><div class='add'>+	SAVE_GPR 21, 168, 1</div><div class='add'>+	SAVE_GPR 22, 176, 1</div><div class='add'>+	SAVE_GPR 23, 184, 1</div><div class='add'>+	SAVE_GPR 24, 192, 1</div><div class='add'>+</div><div class='add'>+	addi	9, 1, 256</div><div class='add'>+	SAVE_VRS 20, 0, 9</div><div class='add'>+	SAVE_VRS 21, 16, 9</div><div class='add'>+	SAVE_VRS 22, 32, 9</div><div class='add'>+	SAVE_VRS 23, 48, 9</div><div class='add'>+	SAVE_VRS 24, 64, 9</div><div class='add'>+	SAVE_VRS 25, 80, 9</div><div class='add'>+	SAVE_VRS 26, 96, 9</div><div class='add'>+	SAVE_VRS 27, 112, 9</div><div class='add'>+	SAVE_VRS 28, 128, 9</div><div class='add'>+	SAVE_VRS 29, 144, 9</div><div class='add'>+	SAVE_VRS 30, 160, 9</div><div class='add'>+	SAVE_VRS 31, 176, 9</div><div class='add'>+.endm # SAVE_REGS</div><div class='ctx'> </div><div class='del'>-	vpmsumd		24, 14, 15		# H4.H * X.H</div><div class='del'>-	vpmsumd		25, 11, 16</div><div class='del'>-	vpmsumd		26, 8, 17</div><div class='del'>-	vpmsumd		27, 5, 18</div><div class='add'>+.macro RESTORE_REGS</div><div class='add'>+	addi	9, 1, 256</div><div class='add'>+	RESTORE_VRS 20, 0, 9</div><div class='add'>+	RESTORE_VRS 21, 16, 9</div><div class='add'>+	RESTORE_VRS 22, 32, 9</div><div class='add'>+	RESTORE_VRS 23, 48, 9</div><div class='add'>+	RESTORE_VRS 24, 64, 9</div><div class='add'>+	RESTORE_VRS 25, 80, 9</div><div class='add'>+	RESTORE_VRS 26, 96, 9</div><div class='add'>+	RESTORE_VRS 27, 112, 9</div><div class='add'>+	RESTORE_VRS 28, 128, 9</div><div class='add'>+	RESTORE_VRS 29, 144, 9</div><div class='add'>+	RESTORE_VRS 30, 160, 9</div><div class='add'>+	RESTORE_VRS 31, 176, 9</div><div class='add'>+</div><div class='add'>+	RESTORE_GPR 14, 112, 1</div><div class='add'>+	RESTORE_GPR 15, 120, 1</div><div class='add'>+	RESTORE_GPR 16, 128, 1</div><div class='add'>+	RESTORE_GPR 17, 136, 1</div><div class='add'>+	RESTORE_GPR 18, 144, 1</div><div class='add'>+	RESTORE_GPR 19, 152, 1</div><div class='add'>+	RESTORE_GPR 20, 160, 1</div><div class='add'>+	RESTORE_GPR 21, 168, 1</div><div class='add'>+	RESTORE_GPR 22, 176, 1</div><div class='add'>+	RESTORE_GPR 23, 184, 1</div><div class='add'>+	RESTORE_GPR 24, 192, 1</div><div class='add'>+</div><div class='add'>+	addi    1, 1, 512</div><div class='add'>+	ld 0, 16(1)</div><div class='add'>+	mtlr 0</div><div class='add'>+.endm # RESTORE_REGS</div><div class='add'>+</div><div class='add'>+# 4x loops</div><div class='add'>+.macro AES_CIPHER_4x _VCIPHER ST r</div><div class='add'>+	\_VCIPHER	\ST, \ST, \r</div><div class='add'>+	\_VCIPHER	\ST+1, \ST+1, \r</div><div class='add'>+	\_VCIPHER	\ST+2, \ST+2, \r</div><div class='add'>+	\_VCIPHER	\ST+3, \ST+3, \r</div><div class='add'>+.endm</div><div class='ctx'> </div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='del'>-	vxor		24, 24, 27		# H</div><div class='add'>+# 8x loops</div><div class='add'>+.macro AES_CIPHER_8x _VCIPHER ST r</div><div class='add'>+	\_VCIPHER	\ST, \ST, \r</div><div class='add'>+	\_VCIPHER	\ST+1, \ST+1, \r</div><div class='add'>+	\_VCIPHER	\ST+2, \ST+2, \r</div><div class='add'>+	\_VCIPHER	\ST+3, \ST+3, \r</div><div class='add'>+	\_VCIPHER	\ST+4, \ST+4, \r</div><div class='add'>+	\_VCIPHER	\ST+5, \ST+5, \r</div><div class='add'>+	\_VCIPHER	\ST+6, \ST+6, \r</div><div class='add'>+	\_VCIPHER	\ST+7, \ST+7, \r</div><div class='add'>+.endm</div><div class='ctx'> </div><div class='del'>-	vxor		24, 24, 29		# H + mH</div><div class='add'>+.macro LOOP_8AES_STATE</div><div class='add'>+	xxlor	32+23, 1, 1</div><div class='add'>+	xxlor	32+24, 2, 2</div><div class='add'>+	xxlor	32+25, 3, 3</div><div class='add'>+	xxlor	32+26, 4, 4</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 23</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 24</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 25</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 26</div><div class='add'>+	xxlor	32+23, 5, 5</div><div class='add'>+	xxlor	32+24, 6, 6</div><div class='add'>+	xxlor	32+25, 7, 7</div><div class='add'>+	xxlor	32+26, 8, 8</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 23</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 24</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 25</div><div class='add'>+	AES_CIPHER_8x vcipher, 15, 26</div><div class='add'>+.endm</div><div class='ctx'> </div><div class='del'>-	# sum hash and reduction with H Poly</div><div class='del'>-	vsldoi		27, 23, 23, 8		# swap</div><div class='del'>-	vpmsumd		23, 23, 2</div><div class='del'>-	vxor		27, 27, 24</div><div class='del'>-	vxor		27, 23, 27		# 1st Xi</div><div class='del'>-</div><div class='del'>-	# 2nd 4x hash</div><div class='del'>-	vpmsumd		24, 9, 20</div><div class='del'>-	vpmsumd		25, 6, 21</div><div class='del'>-	vpmsumd		26, 3, 22</div><div class='del'>-	vxor		19, 19, 27		# Xi + X</div><div class='del'>-	vpmsumd		23, 12, 19		# H4.L * X.L</div><div class='del'>-</div><div class='del'>-	vxor		23, 23, 24</div><div class='del'>-	vxor		23, 23, 25</div><div class='del'>-	vxor		23, 23, 26		# L</div><div class='del'>-</div><div class='del'>-	vpmsumd		24, 13, 19		# H4.L * X.H + H4.H * X.L</div><div class='del'>-	vpmsumd		25, 10, 20		# H3.L * X1.H + H3.H * X1.L</div><div class='del'>-	vpmsumd		26, 7, 21</div><div class='del'>-	vpmsumd		27, 4, 22</div><div class='del'>-</div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='add'>+#</div><div class='add'>+# PPC_GHASH4x(H, S1, S2, S3, S4): Compute 4x hash values based on Karatsuba method.</div><div class='add'>+# H: returning digest</div><div class='add'>+# S#: states</div><div class='add'>+#</div><div class='add'>+# S1 should xor with the previous digest</div><div class='add'>+#</div><div class='add'>+# Xi = v0</div><div class='add'>+# H Poly = v2</div><div class='add'>+# Hash keys = v3 - v14</div><div class='add'>+# Scratch: v23 - v29</div><div class='add'>+#</div><div class='add'>+.macro PPC_GHASH4x H S1 S2 S3 S4</div><div class='add'>+</div><div class='add'>+	vpmsumd	23, 12, \S1		# H4.L * X.L</div><div class='add'>+	vpmsumd	24, 9, \S2</div><div class='add'>+	vpmsumd	25, 6, \S3</div><div class='add'>+	vpmsumd	26, 3, \S4</div><div class='add'>+</div><div class='add'>+	vpmsumd	27, 13, \S1		# H4.L * X.H + H4.H * X.L</div><div class='add'>+	vpmsumd	28, 10, \S2		# H3.L * X1.H + H3.H * X1.L</div><div class='add'>+</div><div class='add'>+	vxor	23, 23, 24</div><div class='add'>+	vxor	23, 23, 25</div><div class='add'>+	vxor	23, 23, 26		# L</div><div class='add'>+</div><div class='add'>+	vxor	24, 27, 28</div><div class='add'>+	vpmsumd	25, 7, \S3</div><div class='add'>+	vpmsumd	26, 4, \S4</div><div class='add'>+</div><div class='add'>+	vxor	24, 24, 25</div><div class='add'>+	vxor	24, 24, 26		# M</div><div class='ctx'> </div><div class='ctx'> 	# sum hash and reduction with H Poly</div><div class='del'>-	vpmsumd		28, 23, 2		# reduction</div><div class='del'>-</div><div class='del'>-	vxor		29, 29, 29</div><div class='add'>+	vpmsumd	28, 23, 2		# reduction</div><div class='ctx'> </div><div class='del'>-	vxor		24, 24, 27		# M</div><div class='del'>-	vsldoi		26, 24, 29, 8		# mL</div><div class='del'>-	vsldoi		29, 29, 24, 8		# mH</div><div class='del'>-	vxor		23, 23, 26		# mL + L</div><div class='add'>+	vxor	1, 1, 1</div><div class='add'>+	vsldoi	25, 24, 1, 8		# mL</div><div class='add'>+	vsldoi	1, 1, 24, 8		# mH</div><div class='add'>+	vxor	23, 23, 25		# mL + L</div><div class='ctx'> </div><div class='del'>-	vsldoi		23, 23, 23, 8		# swap</div><div class='del'>-	vxor		23, 23, 28</div><div class='add'>+	# This performs swap and xor like,</div><div class='add'>+	#   vsldoi	23, 23, 23, 8		# swap</div><div class='add'>+	#   vxor	23, 23, 28</div><div class='add'>+	xxlor	32+25, 10, 10</div><div class='add'>+	vpermxor 23, 23, 28, 25</div><div class='ctx'> </div><div class='del'>-	vpmsumd		24, 14, 19		# H4.H * X.H</div><div class='del'>-	vpmsumd		25, 11, 20</div><div class='del'>-	vpmsumd		26, 8, 21</div><div class='del'>-	vpmsumd		27, 5, 22</div><div class='add'>+	vpmsumd	26, 14, \S1		# H4.H * X.H</div><div class='add'>+	vpmsumd	27, 11, \S2</div><div class='add'>+	vpmsumd	28, 8, \S3</div><div class='add'>+	vpmsumd	29, 5, \S4</div><div class='ctx'> </div><div class='del'>-	vxor		24, 24, 25</div><div class='del'>-	vxor		24, 24, 26</div><div class='del'>-	vxor		24, 24, 27		# H</div><div class='add'>+	vxor	24, 26, 27</div><div class='add'>+	vxor	24, 24, 28</div><div class='add'>+	vxor	24, 24, 29</div><div class='ctx'> </div><div class='del'>-	vxor		24, 24, 29		# H + mH</div><div class='add'>+	vxor	24, 24, 1</div><div class='ctx'> </div><div class='ctx'> 	# sum hash and reduction with H Poly</div><div class='del'>-	vsldoi		27, 23, 23, 8		# swap</div><div class='del'>-	vpmsumd		23, 23, 2</div><div class='del'>-	vxor		27, 27, 24</div><div class='del'>-	vxor		23, 23, 27</div><div class='del'>-</div><div class='del'>-	xxlor		32, 23+32, 23+32		# update hash</div><div class='del'>-</div><div class='add'>+	vsldoi	25, 23, 23, 8		# swap</div><div class='add'>+	vpmsumd	23, 23, 2</div><div class='add'>+	vxor	27, 25, 24</div><div class='add'>+	vxor	\H, 23, 27</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # Compute update single hash</div><div class='del'>- #</div><div class='del'>-.macro ppc_update_hash_1x</div><div class='del'>-	vxor		28, 28, 0</div><div class='del'>-</div><div class='del'>-	vxor		19, 19, 19</div><div class='add'>+#</div><div class='add'>+# Compute update single ghash</div><div class='add'>+# scratch: v1, v22..v27</div><div class='add'>+#</div><div class='add'>+.macro PPC_GHASH1x H S1</div><div class='ctx'> </div><div class='del'>-	vpmsumd		22, 3, 28		# L</div><div class='del'>-	vpmsumd		23, 4, 28		# M</div><div class='del'>-	vpmsumd		24, 5, 28		# H</div><div class='add'>+	vxor	1, 1, 1</div><div class='ctx'> </div><div class='del'>-	vpmsumd		27, 22, 2		# reduction</div><div class='add'>+	vpmsumd	22, 3, \S1		# L</div><div class='add'>+	vpmsumd	23, 4, \S1		# M</div><div class='add'>+	vpmsumd	24, 5, \S1		# H</div><div class='ctx'> </div><div class='del'>-	vsldoi		25, 23, 19, 8		# mL</div><div class='del'>-	vsldoi		26, 19, 23, 8		# mH</div><div class='del'>-	vxor		22, 22, 25		# LL + LL</div><div class='del'>-	vxor		24, 24, 26		# HH + HH</div><div class='add'>+	vpmsumd	27, 22, 2		# reduction</div><div class='ctx'> </div><div class='del'>-	vsldoi		22, 22, 22, 8		# swap</div><div class='del'>-	vxor		22, 22, 27</div><div class='add'>+	vsldoi	25, 23, 1, 8		# mL</div><div class='add'>+	vsldoi	26, 1, 23, 8		# mH</div><div class='add'>+	vxor	22, 22, 25		# LL + LL</div><div class='add'>+	vxor	24, 24, 26		# HH + HH</div><div class='ctx'> </div><div class='del'>-	vsldoi		20, 22, 22, 8		# swap</div><div class='del'>-	vpmsumd		22, 22, 2		# reduction</div><div class='del'>-	vxor		20, 20, 24</div><div class='del'>-	vxor		22, 22, 20</div><div class='add'>+	xxlor	32+25, 10, 10</div><div class='add'>+	vpermxor 22, 22, 27, 25</div><div class='ctx'> </div><div class='del'>-	vmr		0, 22			# update hash</div><div class='del'>-</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro SAVE_REGS</div><div class='del'>-	stdu 1,-640(1)</div><div class='del'>-	mflr 0</div><div class='del'>-</div><div class='del'>-	std	14,112(1)</div><div class='del'>-	std	15,120(1)</div><div class='del'>-	std	16,128(1)</div><div class='del'>-	std	17,136(1)</div><div class='del'>-	std	18,144(1)</div><div class='del'>-	std	19,152(1)</div><div class='del'>-	std	20,160(1)</div><div class='del'>-	std	21,168(1)</div><div class='del'>-	li	9, 256</div><div class='del'>-	stvx	20, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	21, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	22, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	23, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	24, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	25, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	26, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	27, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	28, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	29, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	30, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	stvx	31, 9, 1</div><div class='del'>-	stxv	14, 464(1)</div><div class='del'>-	stxv	15, 480(1)</div><div class='del'>-	stxv	16, 496(1)</div><div class='del'>-	stxv	17, 512(1)</div><div class='del'>-	stxv	18, 528(1)</div><div class='del'>-	stxv	19, 544(1)</div><div class='del'>-	stxv	20, 560(1)</div><div class='del'>-	stxv	21, 576(1)</div><div class='del'>-	stxv	22, 592(1)</div><div class='del'>-	std	0, 656(1)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro RESTORE_REGS</div><div class='del'>-	lxv	14, 464(1)</div><div class='del'>-	lxv	15, 480(1)</div><div class='del'>-	lxv	16, 496(1)</div><div class='del'>-	lxv	17, 512(1)</div><div class='del'>-	lxv	18, 528(1)</div><div class='del'>-	lxv	19, 544(1)</div><div class='del'>-	lxv	20, 560(1)</div><div class='del'>-	lxv	21, 576(1)</div><div class='del'>-	lxv	22, 592(1)</div><div class='del'>-	li	9, 256</div><div class='del'>-	lvx	20, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	21, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	22, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	23, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	24, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	25, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	26, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	27, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	28, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	29, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	30, 9, 1</div><div class='del'>-	addi	9, 9, 16</div><div class='del'>-	lvx	31, 9, 1</div><div class='del'>-</div><div class='del'>-	ld	0, 656(1)</div><div class='del'>-	ld      14,112(1)</div><div class='del'>-	ld      15,120(1)</div><div class='del'>-	ld      16,128(1)</div><div class='del'>-	ld      17,136(1)</div><div class='del'>-	ld      18,144(1)</div><div class='del'>-	ld      19,152(1)</div><div class='del'>-	ld      20,160(1)</div><div class='del'>-	ld	21,168(1)</div><div class='del'>-</div><div class='del'>-	mtlr	0</div><div class='del'>-	addi	1, 1, 640</div><div class='add'>+	vsldoi	23, 22, 22, 8		# swap</div><div class='add'>+	vpmsumd	22, 22, 2		# reduction</div><div class='add'>+	vxor	23, 23, 24</div><div class='add'>+	vxor	\H, 22, 23</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# LOAD_HASH_TABLE</div><div class='add'>+# Xi = v0</div><div class='add'>+# H Poly = v2</div><div class='add'>+# Hash keys = v3 - v14</div><div class='add'>+#</div><div class='ctx'> .macro LOAD_HASH_TABLE</div><div class='ctx'> 	# Load Xi</div><div class='ctx'> 	lxvb16x	32, 0, 8	# load Xi</div><div class='hunk'>@@ -557,657 +298,434 @@</div><div class='ctx'> 	lxvd2x	14+32, 10, 8	# H^4h</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # aes_p10_gcm_encrypt (const void *inp, void *out, size_t len,</div><div class='del'>- #               const char *rk, unsigned char iv[16], void *Xip);</div><div class='del'>- #</div><div class='del'>- #    r3 - inp</div><div class='del'>- #    r4 - out</div><div class='del'>- #    r5 - len</div><div class='del'>- #    r6 - AES round keys</div><div class='del'>- #    r7 - iv and other data</div><div class='del'>- #    r8 - Xi, HPoli, hash keys</div><div class='del'>- #</div><div class='del'>- #    rounds is at offset 240 in rk</div><div class='del'>- #    Xi is at 0 in gcm_table (Xip).</div><div class='del'>- #</div><div class='del'>-_GLOBAL(aes_p10_gcm_encrypt)</div><div class='del'>-.align 5</div><div class='del'>-</div><div class='del'>-	SAVE_REGS</div><div class='del'>-</div><div class='del'>-	LOAD_HASH_TABLE</div><div class='del'>-</div><div class='del'>-	# initialize ICB: GHASH( IV ), IV - r7</div><div class='del'>-	lxvb16x	30+32, 0, 7	# load IV  - v30</div><div class='del'>-</div><div class='del'>-	mr	12, 5		# length</div><div class='del'>-	li	11, 0		# block index</div><div class='del'>-</div><div class='del'>-	# counter 1</div><div class='del'>-	vxor	31, 31, 31</div><div class='del'>-	vspltisb 22, 1</div><div class='del'>-	vsldoi	31, 31, 22,1	# counter 1</div><div class='del'>-</div><div class='del'>-	# load round key to VSR</div><div class='del'>-	lxv	0, 0(6)</div><div class='del'>-	lxv	1, 0x10(6)</div><div class='del'>-	lxv	2, 0x20(6)</div><div class='del'>-	lxv	3, 0x30(6)</div><div class='del'>-	lxv	4, 0x40(6)</div><div class='del'>-	lxv	5, 0x50(6)</div><div class='del'>-	lxv	6, 0x60(6)</div><div class='del'>-	lxv	7, 0x70(6)</div><div class='del'>-	lxv	8, 0x80(6)</div><div class='del'>-	lxv	9, 0x90(6)</div><div class='del'>-	lxv	10, 0xa0(6)</div><div class='del'>-</div><div class='del'>-	# load rounds - 10 (128), 12 (192), 14 (256)</div><div class='del'>-	lwz	9,240(6)</div><div class='del'>-</div><div class='del'>-	#</div><div class='del'>-	# vxor	state, state, w # addroundkey</div><div class='del'>-	xxlor	32+29, 0, 0</div><div class='del'>-	vxor	15, 30, 29	# IV + round key - add round key 0</div><div class='del'>-</div><div class='del'>-	cmpdi	9, 10</div><div class='del'>-	beq	Loop_aes_gcm_8x</div><div class='del'>-</div><div class='del'>-	# load 2 more round keys (v11, v12)</div><div class='del'>-	lxv	11, 0xb0(6)</div><div class='del'>-	lxv	12, 0xc0(6)</div><div class='del'>-</div><div class='del'>-	cmpdi	9, 12</div><div class='del'>-	beq	Loop_aes_gcm_8x</div><div class='del'>-</div><div class='del'>-	# load 2 more round keys (v11, v12, v13, v14)</div><div class='del'>-	lxv	13, 0xd0(6)</div><div class='del'>-	lxv	14, 0xe0(6)</div><div class='del'>-	cmpdi	9, 14</div><div class='del'>-	beq	Loop_aes_gcm_8x</div><div class='del'>-</div><div class='del'>-	b	aes_gcm_out</div><div class='del'>-</div><div class='del'>-.align 5</div><div class='del'>-Loop_aes_gcm_8x:</div><div class='del'>-	mr	14, 3</div><div class='del'>-	mr	9, 4</div><div class='del'>-</div><div class='del'>-	#</div><div class='del'>-	# check partial block</div><div class='del'>-	#</div><div class='del'>-Continue_partial_check:</div><div class='del'>-	ld	15, 56(7)</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Continue</div><div class='del'>-	bgt	Final_block</div><div class='del'>-	cmpdi	15, 16</div><div class='del'>-	blt	Final_block</div><div class='del'>-</div><div class='del'>-Continue:</div><div class='del'>-	# n blcoks</div><div class='del'>-	li	10, 128</div><div class='del'>-	divdu	10, 12, 10	# n 128 bytes-blocks</div><div class='del'>-	cmpdi	10, 0</div><div class='del'>-	beq	Loop_last_block</div><div class='del'>-</div><div class='del'>-	vaddudm	30, 30, 31	# IV + counter</div><div class='del'>-	vxor	16, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	17, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	18, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	19, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	20, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	21, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	22, 30, 29</div><div class='del'>-</div><div class='del'>-	mtctr	10</div><div class='del'>-</div><div class='del'>-	li	15, 16</div><div class='del'>-	li	16, 32</div><div class='del'>-	li	17, 48</div><div class='del'>-	li	18, 64</div><div class='del'>-	li	19, 80</div><div class='del'>-	li	20, 96</div><div class='del'>-	li	21, 112</div><div class='del'>-</div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-</div><div class='del'>-Loop_8x_block:</div><div class='del'>-</div><div class='del'>-	lxvb16x		15, 0, 14	# load block</div><div class='del'>-	lxvb16x		16, 15, 14	# load block</div><div class='del'>-	lxvb16x		17, 16, 14	# load block</div><div class='del'>-	lxvb16x		18, 17, 14	# load block</div><div class='del'>-	lxvb16x		19, 18, 14	# load block</div><div class='del'>-	lxvb16x		20, 19, 14	# load block</div><div class='del'>-	lxvb16x		21, 20, 14	# load block</div><div class='del'>-	lxvb16x		22, 21, 14	# load block</div><div class='del'>-	addi		14, 14, 128</div><div class='del'>-</div><div class='del'>-	Loop_aes_middle8x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_next_ghash</div><div class='del'>-</div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_next_ghash</div><div class='del'>-</div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_next_ghash</div><div class='del'>-	b	aes_gcm_out</div><div class='del'>-</div><div class='del'>-Do_next_ghash:</div><div class='del'>-</div><div class='del'>-	#</div><div class='del'>-	# last round</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='del'>-	vcipherlast     16, 16, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		47, 47, 15</div><div class='del'>-	stxvb16x        47, 0, 9	# store output</div><div class='del'>-	xxlxor		48, 48, 16</div><div class='del'>-	stxvb16x        48, 15, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     17, 17, 23</div><div class='del'>-	vcipherlast     18, 18, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		49, 49, 17</div><div class='del'>-	stxvb16x        49, 16, 9	# store output</div><div class='del'>-	xxlxor		50, 50, 18</div><div class='del'>-	stxvb16x        50, 17, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     19, 19, 23</div><div class='del'>-	vcipherlast     20, 20, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		51, 51, 19</div><div class='del'>-	stxvb16x        51, 18, 9	# store output</div><div class='del'>-	xxlxor		52, 52, 20</div><div class='del'>-	stxvb16x        52, 19, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     21, 21, 23</div><div class='del'>-	vcipherlast     22, 22, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		53, 53, 21</div><div class='del'>-	stxvb16x        53, 20, 9	# store output</div><div class='del'>-	xxlxor		54, 54, 22</div><div class='del'>-	stxvb16x        54, 21, 9	# store output</div><div class='del'>-</div><div class='del'>-	addi		9, 9, 128</div><div class='del'>-</div><div class='del'>-	# ghash here</div><div class='del'>-	ppc_aes_gcm_ghash2_4x</div><div class='del'>-</div><div class='del'>-	xxlor	27+32, 0, 0</div><div class='del'>-	vaddudm 30, 30, 31		# IV + counter</div><div class='del'>-	vmr	29, 30</div><div class='del'>-	vxor    15, 30, 27		# add round key</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    16, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    17, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    18, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    19, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    20, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    21, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    22, 30, 27</div><div class='del'>-</div><div class='del'>-	addi    12, 12, -128</div><div class='del'>-	addi    11, 11, 128</div><div class='del'>-</div><div class='del'>-	bdnz	Loop_8x_block</div><div class='del'>-</div><div class='del'>-	vmr	30, 29</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='del'>-</div><div class='del'>-Loop_last_block:</div><div class='del'>-	cmpdi   12, 0</div><div class='del'>-	beq     aes_gcm_out</div><div class='del'>-</div><div class='del'>-	# loop last few blocks</div><div class='add'>+################################################################################</div><div class='add'>+# Compute AES and ghash one block at a time.</div><div class='add'>+# r23: AES rounds</div><div class='add'>+# v30: current IV</div><div class='add'>+# vs0: roundkey 0</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START_LOCAL(aes_gcm_crypt_1x)</div><div class='add'>+</div><div class='add'>+	cmpdi	5, 16</div><div class='add'>+	bge	__More_1x</div><div class='add'>+	blr</div><div class='add'>+__More_1x:</div><div class='ctx'> 	li      10, 16</div><div class='del'>-	divdu   10, 12, 10</div><div class='del'>-</div><div class='del'>-	mtctr   10</div><div class='del'>-</div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-</div><div class='del'>-	cmpdi   12, 16</div><div class='del'>-	blt     Final_block</div><div class='del'>-</div><div class='del'>-Next_rem_block:</div><div class='del'>-	lxvb16x 15, 0, 14		# load block</div><div class='del'>-</div><div class='del'>-	Loop_aes_middle_1x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_next_1x</div><div class='del'>-</div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='add'>+	divdu   12, 5, 10</div><div class='add'>+</div><div class='add'>+	xxlxor	32+15, 32+30, 0</div><div class='add'>+</div><div class='add'>+	# Pre-load 8 AES rounds to scratch vectors.</div><div class='add'>+	xxlor	32+16, 1, 1</div><div class='add'>+	xxlor	32+17, 2, 2</div><div class='add'>+	xxlor	32+18, 3, 3</div><div class='add'>+	xxlor	32+19, 4, 4</div><div class='add'>+	xxlor	32+20, 5, 5</div><div class='add'>+	xxlor	32+21, 6, 6</div><div class='add'>+	xxlor	32+28, 7, 7</div><div class='add'>+	xxlor	32+29, 8, 8</div><div class='add'>+	lwz	23, 240(6)	# n rounds</div><div class='add'>+	addi	22, 23, -9	# remaing AES rounds</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_next_1x</div><div class='del'>-</div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_next_1x</div><div class='del'>-</div><div class='del'>-Do_next_1x:</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		47, 47, 15</div><div class='del'>-	stxvb16x	47, 0, 9	# store output</div><div class='del'>-	addi		14, 14, 16</div><div class='del'>-	addi		9, 9, 16</div><div class='del'>-</div><div class='del'>-	vmr		28, 15</div><div class='del'>-	ppc_update_hash_1x</div><div class='del'>-</div><div class='del'>-	addi		12, 12, -16</div><div class='del'>-	addi		11, 11, 16</div><div class='del'>-	xxlor		19+32, 0, 0</div><div class='del'>-	vaddudm		30, 30, 31		# IV + counter</div><div class='del'>-	vxor		15, 30, 19		# add round key</div><div class='del'>-</div><div class='del'>-	bdnz	Next_rem_block</div><div class='del'>-</div><div class='del'>-	li	15, 0</div><div class='del'>-	std	15, 56(7)		# clear partial?</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='ctx'> 	cmpdi	12, 0</div><div class='del'>-	beq	aes_gcm_out</div><div class='del'>-</div><div class='del'>-Final_block:</div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-	Loop_aes_middle_1x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_final_1x</div><div class='del'>-</div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_final_1x</div><div class='del'>-</div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='add'>+	bgt	__Loop_1x</div><div class='add'>+	blr</div><div class='ctx'> </div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='add'>+__Loop_1x:</div><div class='add'>+	mtctr	22</div><div class='add'>+	addi	10, 6, 144</div><div class='add'>+	vcipher	15, 15, 16</div><div class='add'>+	vcipher	15, 15, 17</div><div class='add'>+	vcipher	15, 15, 18</div><div class='add'>+	vcipher	15, 15, 19</div><div class='add'>+	vcipher	15, 15, 20</div><div class='add'>+	vcipher	15, 15, 21</div><div class='add'>+	vcipher	15, 15, 28</div><div class='add'>+	vcipher	15, 15, 29</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_final_1x</div><div class='add'>+__Loop_aes_1state:</div><div class='add'>+	lxv	32+1, 0(10)</div><div class='add'>+	vcipher	15, 15, 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__Loop_aes_1state</div><div class='add'>+	lxv	32+1, 0(10)		# last round key</div><div class='add'>+	lxvb16x 11, 0, 14		# load input block</div><div class='add'>+	vcipherlast 15, 15, 1</div><div class='add'>+</div><div class='add'>+	xxlxor	32+15, 32+15, 11</div><div class='add'>+	stxvb16x 32+15, 0, 9	# store output</div><div class='add'>+	addi	14, 14, 16</div><div class='add'>+	addi	9, 9, 16</div><div class='ctx'> </div><div class='del'>-Do_final_1x:</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='add'>+	cmpdi	24, 0	# decrypt?</div><div class='add'>+	bne	__Encrypt_1x</div><div class='add'>+	xxlor	15+32, 11, 11</div><div class='add'>+__Encrypt_1x:</div><div class='add'>+	vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH1x 0, 15</div><div class='ctx'> </div><div class='del'>-	# check partial block</div><div class='del'>-	li	21, 0			# encrypt</div><div class='del'>-	ld	15, 56(7)		# partial?</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Normal_block</div><div class='del'>-	bl	Do_partial_block</div><div class='add'>+	addi	5, 5, -16</div><div class='add'>+	addi	11, 11, 16</div><div class='ctx'> </div><div class='add'>+	vadduwm 30, 30, 31		# IV + counter</div><div class='add'>+	xxlxor	32+15, 32+30, 0</div><div class='add'>+	addi	12, 12, -1</div><div class='ctx'> 	cmpdi	12, 0</div><div class='del'>-	ble aes_gcm_out</div><div class='add'>+	bgt	__Loop_1x</div><div class='ctx'> </div><div class='del'>-	b Continue_partial_check</div><div class='del'>-</div><div class='del'>-Normal_block:</div><div class='del'>-	lxvb16x	15, 0, 14		# load last block</div><div class='del'>-	xxlxor	47, 47, 15</div><div class='del'>-</div><div class='del'>-	# create partial block mask</div><div class='del'>-	li	15, 16</div><div class='del'>-	sub	15, 15, 12		# index to the mask</div><div class='del'>-</div><div class='del'>-	vspltisb	16, -1		# first 16 bytes - 0xffff...ff</div><div class='del'>-	vspltisb	17, 0		# second 16 bytes - 0x0000...00</div><div class='del'>-	li	10, 192</div><div class='del'>-	stvx	16, 10, 1</div><div class='add'>+	stxvb16x 32+30, 0, 7		# update IV</div><div class='add'>+	stxvb16x 32+0, 0, 8		# update Xi</div><div class='add'>+	blr</div><div class='add'>+SYM_FUNC_END(aes_gcm_crypt_1x)</div><div class='add'>+</div><div class='add'>+################################################################################</div><div class='add'>+# Process a normal partial block when we come here.</div><div class='add'>+#  Compute partial mask, Load and store partial block to stack.</div><div class='add'>+#  Update partial_len and pblock.</div><div class='add'>+#  pblock is (encrypted ^ AES state) for encrypt</div><div class='add'>+#        and (input ^ AES state) for decrypt.</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START_LOCAL(__Process_partial)</div><div class='add'>+</div><div class='add'>+	# create partial mask</div><div class='add'>+	vspltisb 16, -1</div><div class='add'>+	li	12, 16</div><div class='add'>+	sub	12, 12, 5</div><div class='add'>+	sldi	12, 12, 3</div><div class='add'>+	mtvsrdd	32+17, 0, 12</div><div class='add'>+	vslo	16, 16, 17		# partial block mask</div><div class='add'>+</div><div class='add'>+	lxvb16x 11, 0, 14		# load partial block</div><div class='add'>+	xxland	11, 11, 32+16</div><div class='add'>+</div><div class='add'>+	# AES crypt partial</div><div class='add'>+	xxlxor	32+15, 32+30, 0</div><div class='add'>+	lwz	23, 240(6)		# n rounds</div><div class='add'>+	addi	22, 23, -1		# loop - 1</div><div class='add'>+	mtctr	22</div><div class='add'>+	addi	10, 6, 16</div><div class='add'>+</div><div class='add'>+__Loop_aes_pstate:</div><div class='add'>+	lxv	32+1, 0(10)</div><div class='add'>+	vcipher	15, 15, 1</div><div class='ctx'> 	addi	10, 10, 16</div><div class='del'>-	stvx	17, 10, 1</div><div class='del'>-</div><div class='del'>-	addi	10, 1, 192</div><div class='del'>-	lxvb16x	16, 15, 10		# load partial block mask</div><div class='del'>-	xxland	47, 47, 16</div><div class='del'>-</div><div class='del'>-	vmr	28, 15</div><div class='del'>-	ppc_update_hash_1x</div><div class='add'>+	bdnz	__Loop_aes_pstate</div><div class='add'>+	lxv	32+1, 0(10)		# last round key</div><div class='add'>+	vcipherlast 15, 15, 1</div><div class='ctx'> </div><div class='del'>-	# * should store only the remaining bytes.</div><div class='del'>-	bl	Write_partial_block</div><div class='del'>-</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='del'>-	std	12, 56(7)		# update partial?</div><div class='del'>-	li	16, 16</div><div class='add'>+	xxlxor	32+15, 32+15, 11</div><div class='add'>+	vand	15, 15, 16</div><div class='ctx'> </div><div class='del'>-	stxvb16x	32, 0, 8		# write out Xi</div><div class='del'>-	stxvb16x	32, 16, 8		# write out Xi</div><div class='del'>-	b aes_gcm_out</div><div class='del'>-</div><div class='del'>- #</div><div class='del'>- # Compute data mask</div><div class='del'>- #</div><div class='del'>-.macro GEN_MASK _mask _start _end</div><div class='del'>-	vspltisb	16, -1		# first 16 bytes - 0xffff...ff</div><div class='del'>-	vspltisb	17, 0		# second 16 bytes - 0x0000...00</div><div class='del'>-	li	10, 192</div><div class='del'>-	stxvb16x	17+32, 10, 1</div><div class='del'>-	add	10, 10, \_start</div><div class='del'>-	stxvb16x	16+32, 10, 1</div><div class='del'>-	add	10, 10, \_end</div><div class='del'>-	stxvb16x	17+32, 10, 1</div><div class='del'>-</div><div class='del'>-	addi	10, 1, 192</div><div class='del'>-	lxvb16x	\_mask, 0, 10		# load partial block mask</div><div class='del'>-.endm</div><div class='add'>+	# AES crypt output v15</div><div class='add'>+	# Write partial</div><div class='add'>+	li	10, 224</div><div class='add'>+	stxvb16x 15+32, 10, 1		# write v15 to stack</div><div class='add'>+	addi	10, 1, 223</div><div class='add'>+	addi	12, 9, -1</div><div class='add'>+        mtctr	5			# partial block len</div><div class='add'>+__Write_partial:</div><div class='add'>+        lbzu	22, 1(10)</div><div class='add'>+	stbu	22, 1(12)</div><div class='add'>+        bdnz	__Write_partial</div><div class='add'>+</div><div class='add'>+	cmpdi	24, 0			# decrypt?</div><div class='add'>+	bne	__Encrypt_partial</div><div class='add'>+	xxlor	32+15, 11, 11		# decrypt using the input block</div><div class='add'>+__Encrypt_partial:</div><div class='add'>+	#vxor	15, 15, 0		# ^ previous hash</div><div class='add'>+	#PPC_GHASH1x 0, 15</div><div class='add'>+</div><div class='add'>+	add	14, 14, 5</div><div class='add'>+	add	9, 9, 5</div><div class='add'>+	std	5, 56(7)		# update partial</div><div class='add'>+	sub	11, 11, 5</div><div class='add'>+	li	5, 0			# done last byte</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # Handle multiple partial blocks for encrypt and decrypt</div><div class='del'>- #   operations.</div><div class='del'>- #</div><div class='del'>-SYM_FUNC_START_LOCAL(Do_partial_block)</div><div class='del'>-	add	17, 15, 5</div><div class='del'>-	cmpdi	17, 16</div><div class='del'>-	bgt	Big_block</div><div class='del'>-	GEN_MASK 18, 15, 5</div><div class='del'>-	b	_Partial</div><div class='del'>-SYM_FUNC_END(Do_partial_block)</div><div class='del'>-Big_block:</div><div class='add'>+	#</div><div class='add'>+	# Don't increase IV since this is the last partial.</div><div class='add'>+	# It should get updated in gcm_update if no more data blocks.</div><div class='add'>+	#vadduwm	30, 30, 31		# increase IV</div><div class='add'>+	stxvb16x 32+30, 0, 7		# update IV</div><div class='add'>+	li	10, 64</div><div class='add'>+	stxvb16x 32+0, 0, 8		# Update X1</div><div class='add'>+	stxvb16x 32+15, 10, 7		# Update pblock</div><div class='add'>+	blr</div><div class='add'>+SYM_FUNC_END(__Process_partial)</div><div class='add'>+</div><div class='add'>+################################################################################</div><div class='add'>+# Combine partial blocks and ghash when we come here.</div><div class='add'>+#</div><div class='add'>+# The partial block has to be shifted to the right location to encrypt/decrypt</div><div class='add'>+# and compute ghash if combing the previous partial block is needed.</div><div class='add'>+# - Compute ghash for a full block. Clear Partial_len and pblock. Update IV.</div><div class='add'>+#   Write Xi.</div><div class='add'>+# - Don't compute ghash if not full block.  gcm_update will take care of it</div><div class='add'>+#   is the last block. Update Partial_len and pblock.</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START_LOCAL(__Combine_partial)</div><div class='add'>+</div><div class='add'>+	ld	12, 56(7)</div><div class='add'>+	mr	21, 5			# these bytes to be processed</div><div class='add'>+</div><div class='add'>+	li	17, 0</div><div class='ctx'> 	li	16, 16</div><div class='del'>-	GEN_MASK 18, 15, 16</div><div class='del'>-</div><div class='del'>-_Partial:</div><div class='del'>-	lxvb16x	17+32, 0, 14		# load last block</div><div class='del'>-	sldi	16, 15, 3</div><div class='del'>-	mtvsrdd	32+16, 0, 16</div><div class='del'>-	vsro	17, 17, 16</div><div class='del'>-	xxlxor	47, 47, 17+32</div><div class='del'>-	xxland	47, 47, 18</div><div class='del'>-</div><div class='del'>-	vxor	0, 0, 0			# clear Xi</div><div class='del'>-	vmr	28, 15</div><div class='del'>-</div><div class='del'>-	cmpdi	21, 0			# encrypt/decrypt ops?</div><div class='del'>-	beq	Skip_decrypt</div><div class='del'>-	xxland	32+28, 32+17, 18</div><div class='del'>-</div><div class='del'>-Skip_decrypt:</div><div class='del'>-</div><div class='del'>-	ppc_update_hash_1x</div><div class='add'>+	sub	22, 16, 12		# bytes to complete a block</div><div class='add'>+	sub	17, 22, 5		# remaining bytes in a block</div><div class='add'>+	cmpdi	5, 16</div><div class='add'>+	ble	__Inp_msg_less16</div><div class='add'>+	li	17, 0</div><div class='add'>+	mr	21, 22</div><div class='add'>+	b	__Combine_continue</div><div class='add'>+__Inp_msg_less16:</div><div class='add'>+	cmpd	22, 5</div><div class='add'>+	bgt	__Combine_continue</div><div class='add'>+	li	17, 0</div><div class='add'>+	mr	21, 22			# these bytes to be processed</div><div class='add'>+</div><div class='add'>+__Combine_continue:</div><div class='add'>+	# load msg and shift to the proper location and mask</div><div class='add'>+	vspltisb 16, -1</div><div class='add'>+	sldi	15, 12, 3</div><div class='add'>+	mtvsrdd	32+17, 0, 15</div><div class='add'>+	vslo	16, 16, 17</div><div class='add'>+	vsro	16, 16, 17</div><div class='add'>+	sldi	15, 17, 3</div><div class='add'>+	mtvsrdd	32+17, 0, 15</div><div class='add'>+	vsro	16, 16, 17</div><div class='add'>+	vslo	16, 16, 17		# mask</div><div class='add'>+</div><div class='add'>+	lxvb16x 32+19, 0, 14		# load partial block</div><div class='add'>+	sldi	15, 12, 3</div><div class='add'>+	mtvsrdd	32+17, 0, 15</div><div class='add'>+	vsro	19, 19, 17		# 0x00..xxxx??..??</div><div class='add'>+	sldi	15, 17, 3</div><div class='add'>+	mtvsrdd	32+17, 0, 15</div><div class='add'>+	vsro	19, 19, 17		# 0x00..xxxx</div><div class='add'>+	vslo	19, 19, 17		# shift back to form 0x00..xxxx00..00</div><div class='add'>+</div><div class='add'>+	# AES crypt partial</div><div class='add'>+	xxlxor	32+15, 32+30, 0</div><div class='add'>+	lwz	23, 240(6)	# n rounds</div><div class='add'>+	addi	22, 23, -1	# loop - 1</div><div class='add'>+	mtctr	22</div><div class='add'>+	addi	10, 6, 16</div><div class='add'>+</div><div class='add'>+__Loop_aes_cpstate:</div><div class='add'>+	lxv	32+1, 0(10)</div><div class='add'>+	vcipher	15, 15, 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__Loop_aes_cpstate</div><div class='add'>+	lxv	32+1, 0(10)		# last round key</div><div class='add'>+	vcipherlast 15, 15, 1</div><div class='ctx'> </div><div class='del'>-	li	16, 16</div><div class='del'>-	lxvb16x 32+29, 16, 8</div><div class='del'>-	vxor	0, 0, 29</div><div class='del'>-	stxvb16x 32, 0, 8		# save Xi</div><div class='del'>-	stxvb16x 32, 16, 8		# save Xi</div><div class='del'>-</div><div class='del'>-	# store partial block</div><div class='del'>-	# loop the rest of the stream if any</div><div class='del'>-	sldi	16, 15, 3</div><div class='del'>-	mtvsrdd	32+16, 0, 16</div><div class='del'>-	vslo	15, 15, 16</div><div class='del'>-	#stxvb16x 15+32, 0, 9		# last block</div><div class='add'>+	vxor	15, 15, 19</div><div class='add'>+	vand	15, 15, 16</div><div class='ctx'> </div><div class='del'>-	li	16, 16</div><div class='del'>-	sub	17, 16, 15		# 16 - partial</div><div class='del'>-</div><div class='del'>-	add	16, 15, 5</div><div class='del'>-	cmpdi	16, 16</div><div class='del'>-	bgt	Larger_16</div><div class='del'>-	mr	17, 5</div><div class='del'>-Larger_16:</div><div class='del'>-</div><div class='del'>-	# write partial</div><div class='del'>-	li		10, 192</div><div class='del'>-	stxvb16x	15+32, 10, 1	# save current block</div><div class='del'>-</div><div class='del'>-	addi		10, 9, -1</div><div class='del'>-	addi		16, 1, 191</div><div class='del'>-	mtctr		17		# move partial byte count</div><div class='del'>-</div><div class='del'>-Write_last_partial:</div><div class='del'>-        lbzu		18, 1(16)</div><div class='del'>-	stbu		18, 1(10)</div><div class='del'>-        bdnz		Write_last_partial</div><div class='del'>-	# Complete loop partial</div><div class='del'>-</div><div class='del'>-	add	14, 14, 17</div><div class='del'>-	add	9, 9, 17</div><div class='del'>-	sub	12, 12, 17</div><div class='del'>-	add	11, 11, 17</div><div class='del'>-</div><div class='del'>-	add	15, 15, 5</div><div class='del'>-	cmpdi	15, 16</div><div class='del'>-	blt	Save_partial</div><div class='del'>-</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='del'>-	xxlor	32+29, 0, 0</div><div class='del'>-	vxor	15, 30, 29		# IV + round key - add round key 0</div><div class='del'>-	li	15, 0</div><div class='del'>-	std	15, 56(7)		# partial done - clear</div><div class='del'>-	b	Partial_done</div><div class='del'>-Save_partial:</div><div class='del'>-	std	15, 56(7)		# partial</div><div class='del'>-</div><div class='del'>-Partial_done:</div><div class='add'>+	# AES crypt output v15</div><div class='add'>+	# Write partial</div><div class='add'>+	li	10, 224</div><div class='add'>+	stxvb16x 15+32, 10, 1		# write v15 to stack</div><div class='add'>+	addi	10, 1, 223</div><div class='add'>+	add	10, 10, 12		# add offset</div><div class='add'>+	addi	15, 9, -1</div><div class='add'>+        mtctr	21			# partial block len</div><div class='add'>+__Write_combine_partial:</div><div class='add'>+        lbzu	22, 1(10)</div><div class='add'>+	stbu	22, 1(15)</div><div class='add'>+        bdnz	__Write_combine_partial</div><div class='add'>+</div><div class='add'>+	add	14, 14, 21</div><div class='add'>+	add	11, 11, 21</div><div class='add'>+	add	9, 9, 21</div><div class='add'>+	sub	5, 5, 21</div><div class='add'>+</div><div class='add'>+	# Encrypt/Decrypt?</div><div class='add'>+	cmpdi	24, 0			# decrypt?</div><div class='add'>+	bne	__Encrypt_combine_partial</div><div class='add'>+	vmr	15, 19		# decrypt using the input block</div><div class='add'>+</div><div class='add'>+__Encrypt_combine_partial:</div><div class='add'>+	#</div><div class='add'>+	# Update partial flag and combine ghash.</div><div class='add'>+__Update_partial_ghash:</div><div class='add'>+	li	10, 64</div><div class='add'>+	lxvb16x 32+17, 10, 7		# load previous pblock</div><div class='add'>+	add	12, 12, 21		# combined pprocessed</div><div class='add'>+	vxor	15, 15, 17		# combined pblock</div><div class='add'>+</div><div class='add'>+	cmpdi	12, 16</div><div class='add'>+	beq	__Clear_partial_flag</div><div class='add'>+	std	12, 56(7)		# update partial len</div><div class='add'>+	stxvb16x 32+15, 10, 7		# Update current pblock</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # Write partial block</div><div class='del'>- # r9 - output</div><div class='del'>- # r12 - remaining bytes</div><div class='del'>- # v15 - partial input data</div><div class='del'>- #</div><div class='del'>-SYM_FUNC_START_LOCAL(Write_partial_block)</div><div class='del'>-	li		10, 192</div><div class='del'>-	stxvb16x	15+32, 10, 1		# last block</div><div class='del'>-</div><div class='del'>-	addi		10, 9, -1</div><div class='del'>-	addi		16, 1, 191</div><div class='del'>-</div><div class='del'>-        mtctr		12			# remaining bytes</div><div class='del'>-	li		15, 0</div><div class='del'>-</div><div class='del'>-Write_last_byte:</div><div class='del'>-        lbzu		14, 1(16)</div><div class='del'>-	stbu		14, 1(10)</div><div class='del'>-        bdnz		Write_last_byte</div><div class='add'>+__Clear_partial_flag:</div><div class='add'>+	li	12, 0</div><div class='add'>+	std	12, 56(7)</div><div class='add'>+	# Update IV and ghash here</div><div class='add'>+	vadduwm	30, 30, 31		# increase IV</div><div class='add'>+	stxvb16x 32+30, 0, 7		# update IV</div><div class='add'>+</div><div class='add'>+	# v15 either is either (input blockor encrypted)^(AES state)</div><div class='add'>+	vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH1x 0, 15</div><div class='add'>+	stxvb16x 32+0, 10, 7		# update pblock for debug?</div><div class='add'>+	stxvb16x 32+0, 0, 8		# update Xi</div><div class='ctx'> 	blr</div><div class='del'>-SYM_FUNC_END(Write_partial_block)</div><div class='add'>+SYM_FUNC_END(__Combine_partial)</div><div class='ctx'> </div><div class='del'>-aes_gcm_out:</div><div class='del'>-	# out = state</div><div class='del'>-	stxvb16x	32, 0, 8		# write out Xi</div><div class='del'>-	add	3, 11, 12		# return count</div><div class='add'>+################################################################################</div><div class='add'>+# gcm_update(iv, Xi) - compute last hash</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START(gcm_update)</div><div class='ctx'> </div><div class='del'>-	RESTORE_REGS</div><div class='del'>-	blr</div><div class='add'>+	ld	10, 56(3)</div><div class='add'>+	cmpdi	10, 0</div><div class='add'>+	beq	__no_update</div><div class='ctx'> </div><div class='del'>- #</div><div class='del'>- # 8x Decrypt</div><div class='del'>- #</div><div class='del'>-_GLOBAL(aes_p10_gcm_decrypt)</div><div class='del'>-.align 5</div><div class='add'>+	lxvb16x	32, 0, 4	# load Xi</div><div class='add'>+	# load Hash - h^4, h^3, h^2, h</div><div class='add'>+	li	10, 32</div><div class='add'>+	lxvd2x	2+32, 10, 4	# H Poli</div><div class='add'>+	li	10, 48</div><div class='add'>+	lxvd2x	3+32, 10, 4	# Hl</div><div class='add'>+	li	10, 64</div><div class='add'>+	lxvd2x	4+32, 10, 4	# H</div><div class='add'>+	li	10, 80</div><div class='add'>+	lxvd2x	5+32, 10, 4	# Hh</div><div class='add'>+</div><div class='add'>+	addis	11, 2, permx@toc@ha</div><div class='add'>+	addi	11, 11, permx@toc@l</div><div class='add'>+	lxv	10, 0(11)	# vs10: vpermxor vector</div><div class='add'>+</div><div class='add'>+	li	9, 64</div><div class='add'>+	lxvb16x 32+6, 9, 3		# load pblock</div><div class='add'>+	vxor	6, 6, 0</div><div class='add'>+</div><div class='add'>+	vxor	1, 1, 1</div><div class='add'>+	vpmsumd	12, 3, 6		# L</div><div class='add'>+	vpmsumd	13, 4, 6		# M</div><div class='add'>+	vpmsumd	14, 5, 6		# H</div><div class='add'>+	vpmsumd	17, 12, 2		# reduction</div><div class='add'>+	vsldoi	15, 13, 1, 8		# mL</div><div class='add'>+	vsldoi	16, 1, 13, 8		# mH</div><div class='add'>+	vxor	12, 12, 15		# LL + LL</div><div class='add'>+	vxor	14, 14, 16		# HH + HH</div><div class='add'>+	xxlor	32+15, 10, 10</div><div class='add'>+	vpermxor 12, 12, 17, 15</div><div class='add'>+	vsldoi	13, 12, 12, 8		# swap</div><div class='add'>+	vpmsumd	12, 12, 2		# reduction</div><div class='add'>+	vxor	13, 13, 14</div><div class='add'>+	vxor	7, 12, 13</div><div class='add'>+</div><div class='add'>+	#vxor	0, 0, 0</div><div class='add'>+	#stxvb16x 32+0, 9, 3</div><div class='add'>+	li	10, 0</div><div class='add'>+	std	10, 56(3)</div><div class='add'>+	stxvb16x 32+7, 0, 4</div><div class='add'>+</div><div class='add'>+__no_update:</div><div class='add'>+	blr</div><div class='add'>+SYM_FUNC_END(gcm_update)</div><div class='add'>+</div><div class='add'>+################################################################################</div><div class='add'>+# aes_p10_gcm_encrypt (const void *inp, void *out, size_t len,</div><div class='add'>+#               const char *rk, unsigned char iv[16], void *Xip);</div><div class='add'>+#</div><div class='add'>+#    r3 - inp</div><div class='add'>+#    r4 - out</div><div class='add'>+#    r5 - len</div><div class='add'>+#    r6 - AES round keys</div><div class='add'>+#    r7 - iv and other data</div><div class='add'>+#    r8 - Xi, HPoli, hash keys</div><div class='add'>+#</div><div class='add'>+#    rounds is at offset 240 in rk</div><div class='add'>+#    Xi is at 0 in gcm_table (Xip).</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START(aes_p10_gcm_encrypt)</div><div class='add'>+</div><div class='add'>+	cmpdi	5, 0</div><div class='add'>+	ble	__Invalid_msg_len</div><div class='ctx'> </div><div class='ctx'> 	SAVE_REGS</div><div class='del'>-</div><div class='ctx'> 	LOAD_HASH_TABLE</div><div class='ctx'> </div><div class='ctx'> 	# initialize ICB: GHASH( IV ), IV - r7</div><div class='ctx'> 	lxvb16x	30+32, 0, 7	# load IV  - v30</div><div class='ctx'> </div><div class='del'>-	mr	12, 5		# length</div><div class='del'>-	li	11, 0		# block index</div><div class='add'>+	mr	14, 3</div><div class='add'>+	mr	9, 4</div><div class='ctx'> </div><div class='ctx'> 	# counter 1</div><div class='ctx'> 	vxor	31, 31, 31</div><div class='ctx'> 	vspltisb 22, 1</div><div class='ctx'> 	vsldoi	31, 31, 22,1	# counter 1</div><div class='ctx'> </div><div class='del'>-	# load round key to VSR</div><div class='del'>-	lxv	0, 0(6)</div><div class='del'>-	lxv	1, 0x10(6)</div><div class='del'>-	lxv	2, 0x20(6)</div><div class='del'>-	lxv	3, 0x30(6)</div><div class='del'>-	lxv	4, 0x40(6)</div><div class='del'>-	lxv	5, 0x50(6)</div><div class='del'>-	lxv	6, 0x60(6)</div><div class='del'>-	lxv	7, 0x70(6)</div><div class='del'>-	lxv	8, 0x80(6)</div><div class='del'>-	lxv	9, 0x90(6)</div><div class='del'>-	lxv	10, 0xa0(6)</div><div class='add'>+	addis	11, 2, permx@toc@ha</div><div class='add'>+	addi	11, 11, permx@toc@l</div><div class='add'>+	lxv	10, 0(11)	# vs10: vpermxor vector</div><div class='add'>+	li	11, 0</div><div class='add'>+</div><div class='add'>+	# load 9 round keys to VSR</div><div class='add'>+	lxv	0, 0(6)			# round key 0</div><div class='add'>+	lxv	1, 16(6)		# round key 1</div><div class='add'>+	lxv	2, 32(6)		# round key 2</div><div class='add'>+	lxv	3, 48(6)		# round key 3</div><div class='add'>+	lxv	4, 64(6)		# round key 4</div><div class='add'>+	lxv	5, 80(6)		# round key 5</div><div class='add'>+	lxv	6, 96(6)		# round key 6</div><div class='add'>+	lxv	7, 112(6)		# round key 7</div><div class='add'>+	lxv	8, 128(6)		# round key 8</div><div class='ctx'> </div><div class='ctx'> 	# load rounds - 10 (128), 12 (192), 14 (256)</div><div class='del'>-	lwz	9,240(6)</div><div class='add'>+	lwz	23, 240(6)		# n rounds</div><div class='add'>+	li	24, 1			# encrypt</div><div class='ctx'> </div><div class='add'>+__Process_encrypt:</div><div class='ctx'> 	#</div><div class='del'>-	# vxor	state, state, w # addroundkey</div><div class='del'>-	xxlor	32+29, 0, 0</div><div class='del'>-	vxor	15, 30, 29	# IV + round key - add round key 0</div><div class='del'>-</div><div class='del'>-	cmpdi	9, 10</div><div class='del'>-	beq	Loop_aes_gcm_8x_dec</div><div class='del'>-</div><div class='del'>-	# load 2 more round keys (v11, v12)</div><div class='del'>-	lxv	11, 0xb0(6)</div><div class='del'>-	lxv	12, 0xc0(6)</div><div class='del'>-</div><div class='del'>-	cmpdi	9, 12</div><div class='del'>-	beq	Loop_aes_gcm_8x_dec</div><div class='del'>-</div><div class='del'>-	# load 2 more round keys (v11, v12, v13, v14)</div><div class='del'>-	lxv	13, 0xd0(6)</div><div class='del'>-	lxv	14, 0xe0(6)</div><div class='del'>-	cmpdi	9, 14</div><div class='del'>-	beq	Loop_aes_gcm_8x_dec</div><div class='add'>+	# Process different blocks</div><div class='add'>+	#</div><div class='add'>+	ld	12, 56(7)</div><div class='add'>+	cmpdi	12, 0</div><div class='add'>+	bgt	__Do_combine_enc</div><div class='add'>+	cmpdi	5, 128</div><div class='add'>+	blt	__Process_more_enc</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Process 8x AES/GCM blocks</div><div class='add'>+#</div><div class='add'>+__Process_8x_enc:</div><div class='add'>+	# 8x blcoks</div><div class='add'>+	li	10, 128</div><div class='add'>+	divdu	12, 5, 10	# n 128 bytes-blocks</div><div class='ctx'> </div><div class='del'>-	b	aes_gcm_out</div><div class='add'>+	addi	12, 12, -1	# loop - 1</div><div class='ctx'> </div><div class='del'>-.align 5</div><div class='del'>-Loop_aes_gcm_8x_dec:</div><div class='del'>-	mr	14, 3</div><div class='del'>-	mr	9, 4</div><div class='add'>+	vmr	15, 30		# first state: IV</div><div class='add'>+	vadduwm	16, 15, 31	# state + counter</div><div class='add'>+	vadduwm	17, 16, 31</div><div class='add'>+	vadduwm	18, 17, 31</div><div class='add'>+	vadduwm	19, 18, 31</div><div class='add'>+	vadduwm	20, 19, 31</div><div class='add'>+	vadduwm	21, 20, 31</div><div class='add'>+	vadduwm	22, 21, 31</div><div class='add'>+	xxlor	9, 32+22, 32+22	# save last state</div><div class='ctx'> </div><div class='del'>-	#</div><div class='del'>-	# check partial block</div><div class='del'>-	#</div><div class='del'>-Continue_partial_check_dec:</div><div class='del'>-	ld	15, 56(7)</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Continue_dec</div><div class='del'>-	bgt	Final_block_dec</div><div class='del'>-	cmpdi	15, 16</div><div class='del'>-	blt	Final_block_dec</div><div class='del'>-</div><div class='del'>-Continue_dec:</div><div class='del'>-	# n blcoks</div><div class='del'>-	li	10, 128</div><div class='del'>-	divdu	10, 12, 10	# n 128 bytes-blocks</div><div class='del'>-	cmpdi	10, 0</div><div class='del'>-	beq	Loop_last_block_dec</div><div class='del'>-</div><div class='del'>-	vaddudm	30, 30, 31	# IV + counter</div><div class='del'>-	vxor	16, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	17, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	18, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	19, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	20, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	21, 30, 29</div><div class='del'>-	vaddudm	30, 30, 31</div><div class='del'>-	vxor	22, 30, 29</div><div class='del'>-</div><div class='del'>-	mtctr	10</div><div class='add'>+	# vxor  state, state, w # addroundkey</div><div class='add'>+	xxlor	32+29, 0, 0</div><div class='add'>+        vxor    15, 15, 29      # IV + round key - add round key 0</div><div class='add'>+	vxor	16, 16, 29</div><div class='add'>+	vxor	17, 17, 29</div><div class='add'>+	vxor	18, 18, 29</div><div class='add'>+	vxor	19, 19, 29</div><div class='add'>+	vxor	20, 20, 29</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 29</div><div class='ctx'> </div><div class='ctx'> 	li	15, 16</div><div class='ctx'> 	li	16, 32</div><div class='hunk'>@@ -1217,305 +735,502 @@ Continue_dec:</div><div class='ctx'> 	li	20, 96</div><div class='ctx'> 	li	21, 112</div><div class='ctx'> </div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-</div><div class='del'>-Loop_8x_block_dec:</div><div class='del'>-</div><div class='del'>-	lxvb16x		15, 0, 14	# load block</div><div class='del'>-	lxvb16x		16, 15, 14	# load block</div><div class='del'>-	lxvb16x		17, 16, 14	# load block</div><div class='del'>-	lxvb16x		18, 17, 14	# load block</div><div class='del'>-	lxvb16x		19, 18, 14	# load block</div><div class='del'>-	lxvb16x		20, 19, 14	# load block</div><div class='del'>-	lxvb16x		21, 20, 14	# load block</div><div class='del'>-	lxvb16x		22, 21, 14	# load block</div><div class='del'>-	addi		14, 14, 128</div><div class='del'>-</div><div class='del'>-	Loop_aes_middle8x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_next_ghash_dec</div><div class='del'>-</div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_next_ghash_dec</div><div class='del'>-</div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	16, 16, 23</div><div class='del'>-	vcipher	17, 17, 23</div><div class='del'>-	vcipher	18, 18, 23</div><div class='del'>-	vcipher	19, 19, 23</div><div class='del'>-	vcipher	20, 20, 23</div><div class='del'>-	vcipher	21, 21, 23</div><div class='del'>-	vcipher	22, 22, 23</div><div class='del'>-</div><div class='del'>-	vcipher	15, 15, 24</div><div class='del'>-	vcipher	16, 16, 24</div><div class='del'>-	vcipher	17, 17, 24</div><div class='del'>-	vcipher	18, 18, 24</div><div class='del'>-	vcipher	19, 19, 24</div><div class='del'>-	vcipher	20, 20, 24</div><div class='del'>-	vcipher	21, 21, 24</div><div class='del'>-	vcipher	22, 22, 24</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_next_ghash_dec</div><div class='del'>-	b	aes_gcm_out</div><div class='add'>+	#</div><div class='add'>+	# Pre-compute first 8 AES state and leave 1/3/5 more rounds</div><div class='add'>+	# for the loop.</div><div class='add'>+	#</div><div class='add'>+	addi	22, 23, -9		# process 8 keys</div><div class='add'>+	mtctr	22			# AES key loop</div><div class='add'>+	addi	10, 6, 144</div><div class='ctx'> </div><div class='del'>-Do_next_ghash_dec:</div><div class='add'>+	LOOP_8AES_STATE			# process 8 AES keys</div><div class='ctx'> </div><div class='del'>-	#</div><div class='del'>-	# last round</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='del'>-	vcipherlast     16, 16, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		47, 47, 15</div><div class='del'>-	stxvb16x        47, 0, 9	# store output</div><div class='del'>-	xxlxor		48, 48, 16</div><div class='del'>-	stxvb16x        48, 15, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     17, 17, 23</div><div class='del'>-	vcipherlast     18, 18, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		49, 49, 17</div><div class='del'>-	stxvb16x        49, 16, 9	# store output</div><div class='del'>-	xxlxor		50, 50, 18</div><div class='del'>-	stxvb16x        50, 17, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     19, 19, 23</div><div class='del'>-	vcipherlast     20, 20, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		51, 51, 19</div><div class='del'>-	stxvb16x        51, 18, 9	# store output</div><div class='del'>-	xxlxor		52, 52, 20</div><div class='del'>-	stxvb16x        52, 19, 9	# store output</div><div class='del'>-</div><div class='del'>-	vcipherlast     21, 21, 23</div><div class='del'>-	vcipherlast     22, 22, 23</div><div class='del'>-</div><div class='del'>-	xxlxor		53, 53, 21</div><div class='del'>-	stxvb16x        53, 20, 9	# store output</div><div class='del'>-	xxlxor		54, 54, 22</div><div class='del'>-	stxvb16x        54, 21, 9	# store output</div><div class='del'>-</div><div class='del'>-	addi		9, 9, 128</div><div class='del'>-</div><div class='del'>-	xxlor           15+32, 15, 15</div><div class='del'>-	xxlor           16+32, 16, 16</div><div class='del'>-	xxlor           17+32, 17, 17</div><div class='del'>-	xxlor           18+32, 18, 18</div><div class='del'>-	xxlor           19+32, 19, 19</div><div class='del'>-	xxlor           20+32, 20, 20</div><div class='del'>-	xxlor           21+32, 21, 21</div><div class='del'>-	xxlor           22+32, 22, 22</div><div class='add'>+__PreLoop_aes_state:</div><div class='add'>+	lxv	32+1, 0(10)		# round key</div><div class='add'>+	AES_CIPHER_8x vcipher 15 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__PreLoop_aes_state</div><div class='add'>+	lxv	32+1, 0(10)		# last round key (v1)</div><div class='add'>+</div><div class='add'>+	cmpdi	12, 0			# Only one loop (8 block)</div><div class='add'>+	beq	__Finish_ghash</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Loop 8x blocks and compute ghash</div><div class='add'>+#</div><div class='add'>+__Loop_8x_block_enc:</div><div class='add'>+	vcipherlast     15, 15, 1</div><div class='add'>+	vcipherlast     16, 16, 1</div><div class='add'>+	vcipherlast     17, 17, 1</div><div class='add'>+	vcipherlast     18, 18, 1</div><div class='add'>+	vcipherlast     19, 19, 1</div><div class='add'>+	vcipherlast     20, 20, 1</div><div class='add'>+	vcipherlast     21, 21, 1</div><div class='add'>+	vcipherlast     22, 22, 1</div><div class='add'>+</div><div class='add'>+	lxvb16x	32+23, 0, 14	# load block</div><div class='add'>+	lxvb16x	32+24, 15, 14	# load block</div><div class='add'>+	lxvb16x	32+25, 16, 14	# load block</div><div class='add'>+	lxvb16x	32+26, 17, 14	# load block</div><div class='add'>+	lxvb16x	32+27, 18, 14	# load block</div><div class='add'>+	lxvb16x	32+28, 19, 14	# load block</div><div class='add'>+	lxvb16x	32+29, 20, 14	# load block</div><div class='add'>+	lxvb16x	32+30, 21, 14	# load block</div><div class='add'>+	addi	14, 14, 128</div><div class='add'>+</div><div class='add'>+	vxor	15, 15, 23</div><div class='add'>+	vxor	16, 16, 24</div><div class='add'>+	vxor	17, 17, 25</div><div class='add'>+	vxor	18, 18, 26</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 28</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 30</div><div class='add'>+</div><div class='add'>+	stxvb16x 47, 0, 9	# store output</div><div class='add'>+	stxvb16x 48, 15, 9	# store output</div><div class='add'>+	stxvb16x 49, 16, 9	# store output</div><div class='add'>+	stxvb16x 50, 17, 9	# store output</div><div class='add'>+	stxvb16x 51, 18, 9	# store output</div><div class='add'>+	stxvb16x 52, 19, 9	# store output</div><div class='add'>+	stxvb16x 53, 20, 9	# store output</div><div class='add'>+	stxvb16x 54, 21, 9	# store output</div><div class='add'>+	addi	9, 9, 128</div><div class='ctx'> </div><div class='ctx'> 	# ghash here</div><div class='del'>-	ppc_aes_gcm_ghash2_4x</div><div class='del'>-</div><div class='del'>-	xxlor	27+32, 0, 0</div><div class='del'>-	vaddudm 30, 30, 31		# IV + counter</div><div class='del'>-	vmr	29, 30</div><div class='del'>-	vxor    15, 30, 27		# add round key</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    16, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    17, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    18, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    19, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    20, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    21, 30, 27</div><div class='del'>-	vaddudm 30, 30, 31</div><div class='del'>-	vxor    22, 30, 27</div><div class='del'>-</div><div class='del'>-	addi    12, 12, -128</div><div class='add'>+	vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH4x 0, 15, 16, 17, 18</div><div class='add'>+</div><div class='add'>+	vxor	19, 19, 0</div><div class='add'>+	PPC_GHASH4x 0, 19, 20, 21, 22</div><div class='add'>+</div><div class='add'>+	xxlor	32+15, 9, 9		# last state</div><div class='add'>+	vadduwm 15, 15, 31		# state + counter</div><div class='add'>+	vadduwm 16, 15, 31</div><div class='add'>+	vadduwm 17, 16, 31</div><div class='add'>+	vadduwm 18, 17, 31</div><div class='add'>+	vadduwm 19, 18, 31</div><div class='add'>+	vadduwm 20, 19, 31</div><div class='add'>+	vadduwm 21, 20, 31</div><div class='add'>+	vadduwm 22, 21, 31</div><div class='add'>+	xxlor	9, 32+22, 32+22		# save last state</div><div class='add'>+</div><div class='add'>+	xxlor	32+27, 0, 0		# restore roundkey 0</div><div class='add'>+        vxor    15, 15, 27		# IV + round key - add round key 0</div><div class='add'>+	vxor	16, 16, 27</div><div class='add'>+	vxor	17, 17, 27</div><div class='add'>+	vxor	18, 18, 27</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 27</div><div class='add'>+	vxor	21, 21, 27</div><div class='add'>+	vxor	22, 22, 27</div><div class='add'>+</div><div class='add'>+	addi    5, 5, -128</div><div class='ctx'> 	addi    11, 11, 128</div><div class='ctx'> </div><div class='del'>-	bdnz	Loop_8x_block_dec</div><div class='del'>-</div><div class='del'>-	vmr	30, 29</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='del'>-</div><div class='del'>-Loop_last_block_dec:</div><div class='del'>-	cmpdi   12, 0</div><div class='del'>-	beq     aes_gcm_out</div><div class='del'>-</div><div class='del'>-	# loop last few blocks</div><div class='del'>-	li      10, 16</div><div class='del'>-	divdu   10, 12, 10</div><div class='del'>-</div><div class='del'>-	mtctr   10</div><div class='del'>-</div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-</div><div class='del'>-	cmpdi   12, 16</div><div class='del'>-	blt     Final_block_dec</div><div class='del'>-</div><div class='del'>-Next_rem_block_dec:</div><div class='del'>-	lxvb16x 15, 0, 14		# load block</div><div class='del'>-</div><div class='del'>-	Loop_aes_middle_1x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='add'>+	LOOP_8AES_STATE			# process 8 AES keys</div><div class='add'>+	mtctr	22			# AES key loop</div><div class='add'>+	addi	10, 6, 144</div><div class='add'>+__LastLoop_aes_state:</div><div class='add'>+	lxv	32+1, 0(10)		# round key</div><div class='add'>+	AES_CIPHER_8x vcipher 15 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__LastLoop_aes_state</div><div class='add'>+	lxv	32+1, 0(10)		# last round key (v1)</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_next_1x_dec</div><div class='add'>+	addi	12, 12, -1</div><div class='add'>+	cmpdi	12, 0</div><div class='add'>+	bne	__Loop_8x_block_enc</div><div class='add'>+</div><div class='add'>+__Finish_ghash:</div><div class='add'>+	vcipherlast     15, 15, 1</div><div class='add'>+	vcipherlast     16, 16, 1</div><div class='add'>+	vcipherlast     17, 17, 1</div><div class='add'>+	vcipherlast     18, 18, 1</div><div class='add'>+	vcipherlast     19, 19, 1</div><div class='add'>+	vcipherlast     20, 20, 1</div><div class='add'>+	vcipherlast     21, 21, 1</div><div class='add'>+	vcipherlast     22, 22, 1</div><div class='add'>+</div><div class='add'>+	lxvb16x	32+23, 0, 14	# load block</div><div class='add'>+	lxvb16x	32+24, 15, 14	# load block</div><div class='add'>+	lxvb16x	32+25, 16, 14	# load block</div><div class='add'>+	lxvb16x	32+26, 17, 14	# load block</div><div class='add'>+	lxvb16x	32+27, 18, 14	# load block</div><div class='add'>+	lxvb16x	32+28, 19, 14	# load block</div><div class='add'>+	lxvb16x	32+29, 20, 14	# load block</div><div class='add'>+	lxvb16x	32+30, 21, 14	# load block</div><div class='add'>+	addi	14, 14, 128</div><div class='add'>+</div><div class='add'>+	vxor	15, 15, 23</div><div class='add'>+	vxor	16, 16, 24</div><div class='add'>+	vxor	17, 17, 25</div><div class='add'>+	vxor	18, 18, 26</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 28</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 30</div><div class='add'>+</div><div class='add'>+	stxvb16x 47, 0, 9	# store output</div><div class='add'>+	stxvb16x 48, 15, 9	# store output</div><div class='add'>+	stxvb16x 49, 16, 9	# store output</div><div class='add'>+	stxvb16x 50, 17, 9	# store output</div><div class='add'>+	stxvb16x 51, 18, 9	# store output</div><div class='add'>+	stxvb16x 52, 19, 9	# store output</div><div class='add'>+	stxvb16x 53, 20, 9	# store output</div><div class='add'>+	stxvb16x 54, 21, 9	# store output</div><div class='add'>+	addi	9, 9, 128</div><div class='add'>+</div><div class='add'>+	vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH4x 0, 15, 16, 17, 18</div><div class='add'>+</div><div class='add'>+	vxor	19, 19, 0</div><div class='add'>+	PPC_GHASH4x 0, 19, 20, 21, 22</div><div class='add'>+</div><div class='add'>+	xxlor	30+32, 9, 9		# last ctr</div><div class='add'>+	vadduwm	30, 30, 31		# increase ctr</div><div class='add'>+	stxvb16x 32+30, 0, 7		# update IV</div><div class='add'>+	stxvb16x 32+0, 0, 8		# update Xi</div><div class='add'>+</div><div class='add'>+	addi    5, 5, -128</div><div class='add'>+	addi    11, 11, 128</div><div class='ctx'> </div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='add'>+	#</div><div class='add'>+	# Done 8x blocks</div><div class='add'>+	#</div><div class='ctx'> </div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='ctx'> </div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='add'>+__Process_more_enc:</div><div class='add'>+	li	24, 1			# encrypt</div><div class='add'>+	bl	aes_gcm_crypt_1x</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_next_1x_dec</div><div class='add'>+	bl	__Process_partial</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='add'>+__Do_combine_enc:</div><div class='add'>+	bl	__Combine_partial</div><div class='add'>+	cmpdi	5, 0</div><div class='add'>+	bgt	__Process_encrypt</div><div class='add'>+	b	aes_gcm_out</div><div class='ctx'> </div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='add'>+SYM_FUNC_END(aes_p10_gcm_encrypt)</div><div class='ctx'> </div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='add'>+################################################################################</div><div class='add'>+# aes_p10_gcm_decrypt (const void *inp, void *out, size_t len,</div><div class='add'>+#               const char *rk, unsigned char iv[16], void *Xip);</div><div class='add'>+# 8x Decrypt</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+SYM_FUNC_START(aes_p10_gcm_decrypt)</div><div class='ctx'> </div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='add'>+	cmpdi	5, 0</div><div class='add'>+	ble	__Invalid_msg_len</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_next_1x_dec</div><div class='add'>+	SAVE_REGS</div><div class='add'>+	LOAD_HASH_TABLE</div><div class='ctx'> </div><div class='del'>-Do_next_1x_dec:</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='add'>+	# initialize ICB: GHASH( IV ), IV - r7</div><div class='add'>+	lxvb16x	30+32, 0, 7	# load IV  - v30</div><div class='ctx'> </div><div class='del'>-	xxlxor		47, 47, 15</div><div class='del'>-	stxvb16x	47, 0, 9	# store output</div><div class='del'>-	addi		14, 14, 16</div><div class='del'>-	addi		9, 9, 16</div><div class='add'>+	mr	14, 3</div><div class='add'>+	mr	9, 4</div><div class='ctx'> </div><div class='del'>-	xxlor           28+32, 15, 15</div><div class='del'>-	#vmr		28, 15</div><div class='del'>-	ppc_update_hash_1x</div><div class='add'>+	# counter 1</div><div class='add'>+	vxor	31, 31, 31</div><div class='add'>+	vspltisb 22, 1</div><div class='add'>+	vsldoi	31, 31, 22,1	# counter 1</div><div class='ctx'> </div><div class='del'>-	addi		12, 12, -16</div><div class='del'>-	addi		11, 11, 16</div><div class='del'>-	xxlor		19+32, 0, 0</div><div class='del'>-	vaddudm		30, 30, 31		# IV + counter</div><div class='del'>-	vxor		15, 30, 19		# add round key</div><div class='add'>+	addis	11, 2, permx@toc@ha</div><div class='add'>+	addi	11, 11, permx@toc@l</div><div class='add'>+	lxv	10, 0(11)	# vs10: vpermxor vector</div><div class='add'>+	li	11, 0</div><div class='add'>+</div><div class='add'>+	# load 9 round keys to VSR</div><div class='add'>+	lxv	0, 0(6)			# round key 0</div><div class='add'>+	lxv	1, 16(6)		# round key 1</div><div class='add'>+	lxv	2, 32(6)		# round key 2</div><div class='add'>+	lxv	3, 48(6)		# round key 3</div><div class='add'>+	lxv	4, 64(6)		# round key 4</div><div class='add'>+	lxv	5, 80(6)		# round key 5</div><div class='add'>+	lxv	6, 96(6)		# round key 6</div><div class='add'>+	lxv	7, 112(6)		# round key 7</div><div class='add'>+	lxv	8, 128(6)		# round key 8</div><div class='ctx'> </div><div class='del'>-	bdnz	Next_rem_block_dec</div><div class='add'>+	# load rounds - 10 (128), 12 (192), 14 (256)</div><div class='add'>+	lwz	23, 240(6)		# n rounds</div><div class='add'>+	li	24, 0			# decrypt</div><div class='ctx'> </div><div class='del'>-	li	15, 0</div><div class='del'>-	std	15, 56(7)		# clear partial?</div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='add'>+__Process_decrypt:</div><div class='add'>+	#</div><div class='add'>+	# Process different blocks</div><div class='add'>+	#</div><div class='add'>+	ld	12, 56(7)</div><div class='ctx'> 	cmpdi	12, 0</div><div class='del'>-	beq	aes_gcm_out</div><div class='del'>-</div><div class='del'>-Final_block_dec:</div><div class='del'>-	lwz	10, 240(6)</div><div class='del'>-	Loop_aes_middle_1x</div><div class='del'>-</div><div class='del'>-	xxlor	23+32, 10, 10</div><div class='del'>-</div><div class='del'>-	cmpdi	10, 10</div><div class='del'>-	beq	Do_final_1x_dec</div><div class='add'>+	bgt	__Do_combine_dec</div><div class='add'>+	cmpdi	5, 128</div><div class='add'>+	blt	__Process_more_dec</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Process 8x AES/GCM blocks</div><div class='add'>+#</div><div class='add'>+__Process_8x_dec:</div><div class='add'>+	# 8x blcoks</div><div class='add'>+	li	10, 128</div><div class='add'>+	divdu	12, 5, 10	# n 128 bytes-blocks</div><div class='ctx'> </div><div class='del'>-	# 192 bits</div><div class='del'>-	xxlor	24+32, 11, 11</div><div class='add'>+	addi	12, 12, -1	# loop - 1</div><div class='ctx'> </div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='add'>+	vmr	15, 30		# first state: IV</div><div class='add'>+	vadduwm	16, 15, 31	# state + counter</div><div class='add'>+	vadduwm	17, 16, 31</div><div class='add'>+	vadduwm	18, 17, 31</div><div class='add'>+	vadduwm	19, 18, 31</div><div class='add'>+	vadduwm	20, 19, 31</div><div class='add'>+	vadduwm	21, 20, 31</div><div class='add'>+	vadduwm	22, 21, 31</div><div class='add'>+	xxlor	9, 32+22, 32+22	# save last state</div><div class='ctx'> </div><div class='del'>-	xxlor	23+32, 12, 12</div><div class='add'>+	# vxor  state, state, w # addroundkey</div><div class='add'>+	xxlor	32+29, 0, 0</div><div class='add'>+        vxor    15, 15, 29      # IV + round key - add round key 0</div><div class='add'>+	vxor	16, 16, 29</div><div class='add'>+	vxor	17, 17, 29</div><div class='add'>+	vxor	18, 18, 29</div><div class='add'>+	vxor	19, 19, 29</div><div class='add'>+	vxor	20, 20, 29</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 29</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 12</div><div class='del'>-	beq	Do_final_1x_dec</div><div class='add'>+	li	15, 16</div><div class='add'>+	li	16, 32</div><div class='add'>+	li	17, 48</div><div class='add'>+	li	18, 64</div><div class='add'>+	li	19, 80</div><div class='add'>+	li	20, 96</div><div class='add'>+	li	21, 112</div><div class='ctx'> </div><div class='del'>-	# 256 bits</div><div class='del'>-	xxlor	24+32, 13, 13</div><div class='add'>+	#</div><div class='add'>+	# Pre-compute first 8 AES state and leave 1/3/5 more rounds</div><div class='add'>+	# for the loop.</div><div class='add'>+	#</div><div class='add'>+	addi	22, 23, -9		# process 8 keys</div><div class='add'>+	mtctr	22			# AES key loop</div><div class='add'>+	addi	10, 6, 144</div><div class='ctx'> </div><div class='del'>-	vcipher	15, 15, 23</div><div class='del'>-	vcipher	15, 15, 24</div><div class='add'>+	LOOP_8AES_STATE			# process 8 AES keys</div><div class='ctx'> </div><div class='del'>-	xxlor	23+32, 14, 14</div><div class='add'>+__PreLoop_aes_state_dec:</div><div class='add'>+	lxv	32+1, 0(10)		# round key</div><div class='add'>+	AES_CIPHER_8x vcipher 15 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__PreLoop_aes_state_dec</div><div class='add'>+	lxv	32+1, 0(10)		# last round key (v1)</div><div class='add'>+</div><div class='add'>+	cmpdi	12, 0			# Only one loop (8 block)</div><div class='add'>+	beq	__Finish_ghash_dec</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Loop 8x blocks and compute ghash</div><div class='add'>+#</div><div class='add'>+__Loop_8x_block_dec:</div><div class='add'>+	vcipherlast     15, 15, 1</div><div class='add'>+	vcipherlast     16, 16, 1</div><div class='add'>+	vcipherlast     17, 17, 1</div><div class='add'>+	vcipherlast     18, 18, 1</div><div class='add'>+	vcipherlast     19, 19, 1</div><div class='add'>+	vcipherlast     20, 20, 1</div><div class='add'>+	vcipherlast     21, 21, 1</div><div class='add'>+	vcipherlast     22, 22, 1</div><div class='add'>+</div><div class='add'>+	lxvb16x	32+23, 0, 14	# load block</div><div class='add'>+	lxvb16x	32+24, 15, 14	# load block</div><div class='add'>+	lxvb16x	32+25, 16, 14	# load block</div><div class='add'>+	lxvb16x	32+26, 17, 14	# load block</div><div class='add'>+	lxvb16x	32+27, 18, 14	# load block</div><div class='add'>+	lxvb16x	32+28, 19, 14	# load block</div><div class='add'>+	lxvb16x	32+29, 20, 14	# load block</div><div class='add'>+	lxvb16x	32+30, 21, 14	# load block</div><div class='add'>+	addi	14, 14, 128</div><div class='add'>+</div><div class='add'>+	vxor	15, 15, 23</div><div class='add'>+	vxor	16, 16, 24</div><div class='add'>+	vxor	17, 17, 25</div><div class='add'>+	vxor	18, 18, 26</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 28</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 30</div><div class='add'>+</div><div class='add'>+	stxvb16x 47, 0, 9	# store output</div><div class='add'>+	stxvb16x 48, 15, 9	# store output</div><div class='add'>+	stxvb16x 49, 16, 9	# store output</div><div class='add'>+	stxvb16x 50, 17, 9	# store output</div><div class='add'>+	stxvb16x 51, 18, 9	# store output</div><div class='add'>+	stxvb16x 52, 19, 9	# store output</div><div class='add'>+	stxvb16x 53, 20, 9	# store output</div><div class='add'>+	stxvb16x 54, 21, 9	# store output</div><div class='add'>+</div><div class='add'>+	addi	9, 9, 128</div><div class='add'>+</div><div class='add'>+	vmr	15, 23</div><div class='add'>+	vmr	16, 24</div><div class='add'>+	vmr	17, 25</div><div class='add'>+	vmr	18, 26</div><div class='add'>+	vmr	19, 27</div><div class='add'>+	vmr	20, 28</div><div class='add'>+	vmr	21, 29</div><div class='add'>+	vmr	22, 30</div><div class='ctx'> </div><div class='del'>-	cmpdi	10, 14</div><div class='del'>-	beq	Do_final_1x_dec</div><div class='add'>+	# ghash here</div><div class='add'>+	vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH4x 0, 15, 16, 17, 18</div><div class='add'>+</div><div class='add'>+	vxor	19, 19, 0</div><div class='add'>+	PPC_GHASH4x 0, 19, 20, 21, 22</div><div class='add'>+</div><div class='add'>+	xxlor	32+15, 9, 9		# last state</div><div class='add'>+	vadduwm 15, 15, 31		# state + counter</div><div class='add'>+	vadduwm 16, 15, 31</div><div class='add'>+	vadduwm 17, 16, 31</div><div class='add'>+	vadduwm 18, 17, 31</div><div class='add'>+	vadduwm 19, 18, 31</div><div class='add'>+	vadduwm 20, 19, 31</div><div class='add'>+	vadduwm 21, 20, 31</div><div class='add'>+	vadduwm 22, 21, 31</div><div class='add'>+	xxlor	9, 32+22, 32+22		# save last state</div><div class='add'>+</div><div class='add'>+	xxlor	32+27, 0, 0		# restore roundkey 0</div><div class='add'>+        vxor    15, 15, 27		# IV + round key - add round key 0</div><div class='add'>+	vxor	16, 16, 27</div><div class='add'>+	vxor	17, 17, 27</div><div class='add'>+	vxor	18, 18, 27</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 27</div><div class='add'>+	vxor	21, 21, 27</div><div class='add'>+	vxor	22, 22, 27</div><div class='add'>+</div><div class='add'>+	addi    5, 5, -128</div><div class='add'>+	addi    11, 11, 128</div><div class='ctx'> </div><div class='del'>-Do_final_1x_dec:</div><div class='del'>-	vcipherlast     15, 15, 23</div><div class='add'>+	LOOP_8AES_STATE			# process 8 AES keys</div><div class='add'>+	mtctr	22			# AES key loop</div><div class='add'>+	addi	10, 6, 144</div><div class='add'>+__LastLoop_aes_state_dec:</div><div class='add'>+	lxv	32+1, 0(10)		# round key</div><div class='add'>+	AES_CIPHER_8x vcipher 15 1</div><div class='add'>+	addi	10, 10, 16</div><div class='add'>+	bdnz	__LastLoop_aes_state_dec</div><div class='add'>+	lxv	32+1, 0(10)		# last round key (v1)</div><div class='ctx'> </div><div class='del'>-	# check partial block</div><div class='del'>-	li	21, 1			# decrypt</div><div class='del'>-	ld	15, 56(7)		# partial?</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Normal_block_dec</div><div class='del'>-	bl	Do_partial_block</div><div class='add'>+	addi	12, 12, -1</div><div class='ctx'> 	cmpdi	12, 0</div><div class='del'>-	ble aes_gcm_out</div><div class='del'>-</div><div class='del'>-	b Continue_partial_check_dec</div><div class='add'>+	bne	__Loop_8x_block_dec</div><div class='add'>+</div><div class='add'>+__Finish_ghash_dec:</div><div class='add'>+	vcipherlast     15, 15, 1</div><div class='add'>+	vcipherlast     16, 16, 1</div><div class='add'>+	vcipherlast     17, 17, 1</div><div class='add'>+	vcipherlast     18, 18, 1</div><div class='add'>+	vcipherlast     19, 19, 1</div><div class='add'>+	vcipherlast     20, 20, 1</div><div class='add'>+	vcipherlast     21, 21, 1</div><div class='add'>+	vcipherlast     22, 22, 1</div><div class='add'>+</div><div class='add'>+	lxvb16x	32+23, 0, 14	# load block</div><div class='add'>+	lxvb16x	32+24, 15, 14	# load block</div><div class='add'>+	lxvb16x	32+25, 16, 14	# load block</div><div class='add'>+	lxvb16x	32+26, 17, 14	# load block</div><div class='add'>+	lxvb16x	32+27, 18, 14	# load block</div><div class='add'>+	lxvb16x	32+28, 19, 14	# load block</div><div class='add'>+	lxvb16x	32+29, 20, 14	# load block</div><div class='add'>+	lxvb16x	32+30, 21, 14	# load block</div><div class='add'>+	addi	14, 14, 128</div><div class='add'>+</div><div class='add'>+	vxor	15, 15, 23</div><div class='add'>+	vxor	16, 16, 24</div><div class='add'>+	vxor	17, 17, 25</div><div class='add'>+	vxor	18, 18, 26</div><div class='add'>+	vxor	19, 19, 27</div><div class='add'>+	vxor	20, 20, 28</div><div class='add'>+	vxor	21, 21, 29</div><div class='add'>+	vxor	22, 22, 30</div><div class='add'>+</div><div class='add'>+	stxvb16x 47, 0, 9	# store output</div><div class='add'>+	stxvb16x 48, 15, 9	# store output</div><div class='add'>+	stxvb16x 49, 16, 9	# store output</div><div class='add'>+	stxvb16x 50, 17, 9	# store output</div><div class='add'>+	stxvb16x 51, 18, 9	# store output</div><div class='add'>+	stxvb16x 52, 19, 9	# store output</div><div class='add'>+	stxvb16x 53, 20, 9	# store output</div><div class='add'>+	stxvb16x 54, 21, 9	# store output</div><div class='add'>+	addi	9, 9, 128</div><div class='add'>+</div><div class='add'>+	#vmr	15, 23</div><div class='add'>+	vxor	15, 23, 0</div><div class='add'>+	vmr	16, 24</div><div class='add'>+	vmr	17, 25</div><div class='add'>+	vmr	18, 26</div><div class='add'>+	vmr	19, 27</div><div class='add'>+	vmr	20, 28</div><div class='add'>+	vmr	21, 29</div><div class='add'>+	vmr	22, 30</div><div class='add'>+</div><div class='add'>+	#vxor	15, 15, 0</div><div class='add'>+	PPC_GHASH4x 0, 15, 16, 17, 18</div><div class='add'>+</div><div class='add'>+	vxor	19, 19, 0</div><div class='add'>+	PPC_GHASH4x 0, 19, 20, 21, 22</div><div class='add'>+</div><div class='add'>+	xxlor	30+32, 9, 9		# last ctr</div><div class='add'>+	vadduwm	30, 30, 31		# increase ctr</div><div class='add'>+	stxvb16x 32+30, 0, 7		# update IV</div><div class='add'>+	stxvb16x 32+0, 0, 8		# update Xi</div><div class='add'>+</div><div class='add'>+	addi    5, 5, -128</div><div class='add'>+	addi    11, 11, 128</div><div class='ctx'> </div><div class='del'>-Normal_block_dec:</div><div class='del'>-	lxvb16x	15, 0, 14		# load last block</div><div class='del'>-	xxlxor	47, 47, 15</div><div class='add'>+	#</div><div class='add'>+	# Done 8x blocks</div><div class='add'>+	#</div><div class='ctx'> </div><div class='del'>-	# create partial block mask</div><div class='del'>-	li	15, 16</div><div class='del'>-	sub	15, 15, 12		# index to the mask</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='ctx'> </div><div class='del'>-	vspltisb	16, -1		# first 16 bytes - 0xffff...ff</div><div class='del'>-	vspltisb	17, 0		# second 16 bytes - 0x0000...00</div><div class='del'>-	li	10, 192</div><div class='del'>-	stvx	16, 10, 1</div><div class='del'>-	addi	10, 10, 16</div><div class='del'>-	stvx	17, 10, 1</div><div class='add'>+__Process_more_dec:</div><div class='add'>+	li	24, 0			# decrypt</div><div class='add'>+	bl	aes_gcm_crypt_1x</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='ctx'> </div><div class='del'>-	addi	10, 1, 192</div><div class='del'>-	lxvb16x	16, 15, 10		# load partial block mask</div><div class='del'>-	xxland	47, 47, 16</div><div class='add'>+	bl	__Process_partial</div><div class='add'>+	cmpdi   5, 0</div><div class='add'>+	beq     aes_gcm_out</div><div class='add'>+__Do_combine_dec:</div><div class='add'>+	bl	__Combine_partial</div><div class='add'>+	cmpdi	5, 0</div><div class='add'>+	bgt	__Process_decrypt</div><div class='add'>+	b	aes_gcm_out</div><div class='add'>+SYM_FUNC_END(aes_p10_gcm_decrypt)</div><div class='ctx'> </div><div class='del'>-	xxland	32+28, 15, 16</div><div class='del'>-	#vmr	28, 15</div><div class='del'>-	ppc_update_hash_1x</div><div class='add'>+SYM_FUNC_START_LOCAL(aes_gcm_out)</div><div class='ctx'> </div><div class='del'>-	# * should store only the remaining bytes.</div><div class='del'>-	bl	Write_partial_block</div><div class='add'>+	mr	3, 11			# return count</div><div class='ctx'> </div><div class='del'>-	stxvb16x 30+32, 0, 7		# update IV</div><div class='del'>-	std	12, 56(7)		# update partial?</div><div class='del'>-	li	16, 16</div><div class='add'>+	RESTORE_REGS</div><div class='add'>+	blr</div><div class='ctx'> </div><div class='del'>-	stxvb16x	32, 0, 8		# write out Xi</div><div class='del'>-	stxvb16x	32, 16, 8		# write out Xi</div><div class='del'>-	b aes_gcm_out</div><div class='add'>+__Invalid_msg_len:</div><div class='add'>+	li	3, 0</div><div class='add'>+	blr</div><div class='add'>+SYM_FUNC_END(aes_gcm_out)</div><div class='add'>+</div><div class='add'>+SYM_DATA_START_LOCAL(PERMX)</div><div class='add'>+.align 4</div><div class='add'>+# for vector permute and xor</div><div class='add'>+permx:</div><div class='add'>+.long 0x4c5d6e7f, 0x08192a3b, 0xc4d5e6f7, 0x8091a2b3</div><div class='add'>+SYM_DATA_END(permx)</div><div class='head'>diff --git a/arch/powerpc/crypto/aes.c b/arch/powerpc/crypto/aes.c<br/>index ec06189fbf99..3f1e5e894902 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes.c</a></div><div class='hunk'>@@ -7,15 +7,15 @@</div><div class='ctx'>  * Author: Marcelo Henrique Cerri &lt;mhcerri@br.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/cipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_cbc.c b/arch/powerpc/crypto/aes_cbc.c<br/>index ed0debc7acb5..5f2a4f375eef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_cbc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_cbc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_cbc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes_cbc.c</a></div><div class='hunk'>@@ -12,6 +12,10 @@</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_ctr.c b/arch/powerpc/crypto/aes_ctr.c<br/>index 9a3da8cd62f3..e27c4036e711 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_ctr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_ctr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_ctr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes_ctr.c</a></div><div class='hunk'>@@ -12,6 +12,10 @@</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='hunk'>@@ -69,9 +73,9 @@ static int p8_aes_ctr_setkey(struct crypto_skcipher *tfm, const u8 *key,</div><div class='ctx'> static void p8_aes_ctr_final(const struct p8_aes_ctr_ctx *ctx,</div><div class='ctx'> 			     struct skcipher_walk *walk)</div><div class='ctx'> {</div><div class='add'>+	const u8 *src = walk-&gt;src.virt.addr;</div><div class='ctx'> 	u8 *ctrblk = walk-&gt;iv;</div><div class='ctx'> 	u8 keystream[AES_BLOCK_SIZE];</div><div class='del'>-	u8 *src = walk-&gt;src.virt.addr;</div><div class='ctx'> 	u8 *dst = walk-&gt;dst.virt.addr;</div><div class='ctx'> 	unsigned int nbytes = walk-&gt;nbytes;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_xts.c b/arch/powerpc/crypto/aes_xts.c<br/>index dabbccb41550..9440e771cede 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_xts.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/aes_xts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/aes_xts.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/aes_xts.c</a></div><div class='hunk'>@@ -13,6 +13,10 @@</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/chacha-p10-glue.c b/arch/powerpc/crypto/chacha-p10-glue.c<br/>deleted file mode 100644<br/>index 7c728755852e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/chacha-p10-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/chacha-p10-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,227 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * PowerPC P10 (ppc64le) accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright 2023- IBM Corp. All rights reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_p10le_8x(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				unsigned int len, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_p10);</div><div class='del'>-</div><div class='del'>-static void vsx_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_vsx();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vsx_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_vsx();</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chacha_p10_do_8x(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			     unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	unsigned int l = bytes &amp; ~0x0FF;</div><div class='del'>-</div><div class='del'>-	if (l &gt; 0) {</div><div class='del'>-		chacha_p10le_8x(state, dst, src, l, nrounds);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += l / CHACHA_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bytes &gt; 0)</div><div class='del'>-		chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	chacha_init_generic(state, key, iv);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_init_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_p10) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='del'>-	    !crypto_simd_usable())</div><div class='del'>-		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		vsx_begin();</div><div class='del'>-		chacha_p10_do_8x(state, dst, src, todo, nrounds);</div><div class='del'>-		vsx_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_p10_stream_xor(struct skcipher_request *req,</div><div class='del'>-				 const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = rounddown(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!crypto_simd_usable()) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			chacha_p10_do_8x(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			vsx_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-		if (err)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_p10(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_p10_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_p10(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init_generic(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-	hchacha_block_arch(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_p10_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_p10,</div><div class='del'>-		.decrypt		= chacha_p10,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_p10,</div><div class='del'>-		.decrypt		= xchacha_p10,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_p10,</div><div class='del'>-		.decrypt		= xchacha_p10,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_p10_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_p10);</div><div class='del'>-</div><div class='del'>-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_p10_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_p10))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_p10_init);</div><div class='del'>-module_exit(chacha_p10_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (P10 accelerated)");</div><div class='del'>-MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-p10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-p10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-p10");</div><div class='head'>diff --git a/arch/powerpc/crypto/chacha-p10le-8x.S b/arch/powerpc/crypto/chacha-p10le-8x.S<br/>deleted file mode 100644<br/>index 17bedb66b822..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/chacha-p10le-8x.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/chacha-p10le-8x.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,842 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-#</div><div class='del'>-# Accelerated chacha20 implementation for ppc64le.</div><div class='del'>-#</div><div class='del'>-# Copyright 2023- IBM Corp. All rights reserved</div><div class='del'>-#</div><div class='del'>-#===================================================================================</div><div class='del'>-# Written by Danny Tsen &lt;dtsen@us.ibm.com&gt;</div><div class='del'>-#</div><div class='del'>-# chacha_p10le_8x(u32 *state, byte *dst, const byte *src,</div><div class='del'>-#				 size_t len, int nrounds);</div><div class='del'>-#</div><div class='del'>-# do rounds,  8 quarter rounds</div><div class='del'>-# 1.  a += b; d ^= a; d &lt;&lt;&lt;= 16;</div><div class='del'>-# 2.  c += d; b ^= c; b &lt;&lt;&lt;= 12;</div><div class='del'>-# 3.  a += b; d ^= a; d &lt;&lt;&lt;= 8;</div><div class='del'>-# 4.  c += d; b ^= c; b &lt;&lt;&lt;= 7</div><div class='del'>-#</div><div class='del'>-# row1 = (row1 + row2),  row4 = row1 xor row4,  row4 rotate each word by 16</div><div class='del'>-# row3 = (row3 + row4),  row2 = row3 xor row2,  row2 rotate each word by 12</div><div class='del'>-# row1 = (row1 + row2), row4 = row1 xor row4,  row4 rotate each word by 8</div><div class='del'>-# row3 = (row3 + row4), row2 = row3 xor row2,  row2 rotate each word by 7</div><div class='del'>-#</div><div class='del'>-# 4 blocks (a b c d)</div><div class='del'>-#</div><div class='del'>-# a0 b0 c0 d0</div><div class='del'>-# a1 b1 c1 d1</div><div class='del'>-# ...</div><div class='del'>-# a4 b4 c4 d4</div><div class='del'>-# ...</div><div class='del'>-# a8 b8 c8 d8</div><div class='del'>-# ...</div><div class='del'>-# a12 b12 c12 d12</div><div class='del'>-# a13 ...</div><div class='del'>-# a14 ...</div><div class='del'>-# a15 b15 c15 d15</div><div class='del'>-#</div><div class='del'>-# Column round (v0, v4,  v8, v12, v1, v5,  v9, v13, v2, v6, v10, v14, v3, v7, v11, v15)</div><div class='del'>-# Diagnal round (v0, v5, v10, v15, v1, v6, v11, v12, v2, v7,  v8, v13, v3, v4,  v9, v14)</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/asm-compat.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.machine	"any"</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.macro	SAVE_GPR GPR OFFSET FRAME</div><div class='del'>-	std	\GPR,\OFFSET(\FRAME)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	SAVE_VRS VRS OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	stvx	\VRS, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	SAVE_VSX VSX OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	stxvx	\VSX, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_GPR GPR OFFSET FRAME</div><div class='del'>-	ld	\GPR,\OFFSET(\FRAME)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_VRS VRS OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	lvx	\VRS, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_VSX VSX OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	lxvx	\VSX, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro SAVE_REGS</div><div class='del'>-	mflr 0</div><div class='del'>-	std 0, 16(1)</div><div class='del'>-	stdu 1,-752(1)</div><div class='del'>-</div><div class='del'>-	SAVE_GPR 14, 112, 1</div><div class='del'>-	SAVE_GPR 15, 120, 1</div><div class='del'>-	SAVE_GPR 16, 128, 1</div><div class='del'>-	SAVE_GPR 17, 136, 1</div><div class='del'>-	SAVE_GPR 18, 144, 1</div><div class='del'>-	SAVE_GPR 19, 152, 1</div><div class='del'>-	SAVE_GPR 20, 160, 1</div><div class='del'>-	SAVE_GPR 21, 168, 1</div><div class='del'>-	SAVE_GPR 22, 176, 1</div><div class='del'>-	SAVE_GPR 23, 184, 1</div><div class='del'>-	SAVE_GPR 24, 192, 1</div><div class='del'>-	SAVE_GPR 25, 200, 1</div><div class='del'>-	SAVE_GPR 26, 208, 1</div><div class='del'>-	SAVE_GPR 27, 216, 1</div><div class='del'>-	SAVE_GPR 28, 224, 1</div><div class='del'>-	SAVE_GPR 29, 232, 1</div><div class='del'>-	SAVE_GPR 30, 240, 1</div><div class='del'>-	SAVE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	addi	9, 1, 256</div><div class='del'>-	SAVE_VRS 20, 0, 9</div><div class='del'>-	SAVE_VRS 21, 16, 9</div><div class='del'>-	SAVE_VRS 22, 32, 9</div><div class='del'>-	SAVE_VRS 23, 48, 9</div><div class='del'>-	SAVE_VRS 24, 64, 9</div><div class='del'>-	SAVE_VRS 25, 80, 9</div><div class='del'>-	SAVE_VRS 26, 96, 9</div><div class='del'>-	SAVE_VRS 27, 112, 9</div><div class='del'>-	SAVE_VRS 28, 128, 9</div><div class='del'>-	SAVE_VRS 29, 144, 9</div><div class='del'>-	SAVE_VRS 30, 160, 9</div><div class='del'>-	SAVE_VRS 31, 176, 9</div><div class='del'>-</div><div class='del'>-	SAVE_VSX 14, 192, 9</div><div class='del'>-	SAVE_VSX 15, 208, 9</div><div class='del'>-	SAVE_VSX 16, 224, 9</div><div class='del'>-	SAVE_VSX 17, 240, 9</div><div class='del'>-	SAVE_VSX 18, 256, 9</div><div class='del'>-	SAVE_VSX 19, 272, 9</div><div class='del'>-	SAVE_VSX 20, 288, 9</div><div class='del'>-	SAVE_VSX 21, 304, 9</div><div class='del'>-	SAVE_VSX 22, 320, 9</div><div class='del'>-	SAVE_VSX 23, 336, 9</div><div class='del'>-	SAVE_VSX 24, 352, 9</div><div class='del'>-	SAVE_VSX 25, 368, 9</div><div class='del'>-	SAVE_VSX 26, 384, 9</div><div class='del'>-	SAVE_VSX 27, 400, 9</div><div class='del'>-	SAVE_VSX 28, 416, 9</div><div class='del'>-	SAVE_VSX 29, 432, 9</div><div class='del'>-	SAVE_VSX 30, 448, 9</div><div class='del'>-	SAVE_VSX 31, 464, 9</div><div class='del'>-.endm # SAVE_REGS</div><div class='del'>-</div><div class='del'>-.macro RESTORE_REGS</div><div class='del'>-	addi	9, 1, 256</div><div class='del'>-	RESTORE_VRS 20, 0, 9</div><div class='del'>-	RESTORE_VRS 21, 16, 9</div><div class='del'>-	RESTORE_VRS 22, 32, 9</div><div class='del'>-	RESTORE_VRS 23, 48, 9</div><div class='del'>-	RESTORE_VRS 24, 64, 9</div><div class='del'>-	RESTORE_VRS 25, 80, 9</div><div class='del'>-	RESTORE_VRS 26, 96, 9</div><div class='del'>-	RESTORE_VRS 27, 112, 9</div><div class='del'>-	RESTORE_VRS 28, 128, 9</div><div class='del'>-	RESTORE_VRS 29, 144, 9</div><div class='del'>-	RESTORE_VRS 30, 160, 9</div><div class='del'>-	RESTORE_VRS 31, 176, 9</div><div class='del'>-</div><div class='del'>-	RESTORE_VSX 14, 192, 9</div><div class='del'>-	RESTORE_VSX 15, 208, 9</div><div class='del'>-	RESTORE_VSX 16, 224, 9</div><div class='del'>-	RESTORE_VSX 17, 240, 9</div><div class='del'>-	RESTORE_VSX 18, 256, 9</div><div class='del'>-	RESTORE_VSX 19, 272, 9</div><div class='del'>-	RESTORE_VSX 20, 288, 9</div><div class='del'>-	RESTORE_VSX 21, 304, 9</div><div class='del'>-	RESTORE_VSX 22, 320, 9</div><div class='del'>-	RESTORE_VSX 23, 336, 9</div><div class='del'>-	RESTORE_VSX 24, 352, 9</div><div class='del'>-	RESTORE_VSX 25, 368, 9</div><div class='del'>-	RESTORE_VSX 26, 384, 9</div><div class='del'>-	RESTORE_VSX 27, 400, 9</div><div class='del'>-	RESTORE_VSX 28, 416, 9</div><div class='del'>-	RESTORE_VSX 29, 432, 9</div><div class='del'>-	RESTORE_VSX 30, 448, 9</div><div class='del'>-	RESTORE_VSX 31, 464, 9</div><div class='del'>-</div><div class='del'>-	RESTORE_GPR 14, 112, 1</div><div class='del'>-	RESTORE_GPR 15, 120, 1</div><div class='del'>-	RESTORE_GPR 16, 128, 1</div><div class='del'>-	RESTORE_GPR 17, 136, 1</div><div class='del'>-	RESTORE_GPR 18, 144, 1</div><div class='del'>-	RESTORE_GPR 19, 152, 1</div><div class='del'>-	RESTORE_GPR 20, 160, 1</div><div class='del'>-	RESTORE_GPR 21, 168, 1</div><div class='del'>-	RESTORE_GPR 22, 176, 1</div><div class='del'>-	RESTORE_GPR 23, 184, 1</div><div class='del'>-	RESTORE_GPR 24, 192, 1</div><div class='del'>-	RESTORE_GPR 25, 200, 1</div><div class='del'>-	RESTORE_GPR 26, 208, 1</div><div class='del'>-	RESTORE_GPR 27, 216, 1</div><div class='del'>-	RESTORE_GPR 28, 224, 1</div><div class='del'>-	RESTORE_GPR 29, 232, 1</div><div class='del'>-	RESTORE_GPR 30, 240, 1</div><div class='del'>-	RESTORE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	addi    1, 1, 752</div><div class='del'>-	ld 0, 16(1)</div><div class='del'>-	mtlr 0</div><div class='del'>-.endm # RESTORE_REGS</div><div class='del'>-</div><div class='del'>-.macro QT_loop_8x</div><div class='del'>-	# QR(v0, v4,  v8, v12, v1, v5,  v9, v13, v2, v6, v10, v14, v3, v7, v11, v15)</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 20, 20</div><div class='del'>-	vadduwm 0, 0, 4</div><div class='del'>-	vadduwm 1, 1, 5</div><div class='del'>-	vadduwm 2, 2, 6</div><div class='del'>-	vadduwm 3, 3, 7</div><div class='del'>-	  vadduwm 16, 16, 20</div><div class='del'>-	  vadduwm 17, 17, 21</div><div class='del'>-	  vadduwm 18, 18, 22</div><div class='del'>-	  vadduwm 19, 19, 23</div><div class='del'>-</div><div class='del'>-	  vpermxor 12, 12, 0, 25</div><div class='del'>-	  vpermxor 13, 13, 1, 25</div><div class='del'>-	  vpermxor 14, 14, 2, 25</div><div class='del'>-	  vpermxor 15, 15, 3, 25</div><div class='del'>-	  vpermxor 28, 28, 16, 25</div><div class='del'>-	  vpermxor 29, 29, 17, 25</div><div class='del'>-	  vpermxor 30, 30, 18, 25</div><div class='del'>-	  vpermxor 31, 31, 19, 25</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-	vadduwm 8, 8, 12</div><div class='del'>-	vadduwm 9, 9, 13</div><div class='del'>-	vadduwm 10, 10, 14</div><div class='del'>-	vadduwm 11, 11, 15</div><div class='del'>-	  vadduwm 24, 24, 28</div><div class='del'>-	  vadduwm 25, 25, 29</div><div class='del'>-	  vadduwm 26, 26, 30</div><div class='del'>-	  vadduwm 27, 27, 31</div><div class='del'>-	vxor 4, 4, 8</div><div class='del'>-	vxor 5, 5, 9</div><div class='del'>-	vxor 6, 6, 10</div><div class='del'>-	vxor 7, 7, 11</div><div class='del'>-	  vxor 20, 20, 24</div><div class='del'>-	  vxor 21, 21, 25</div><div class='del'>-	  vxor 22, 22, 26</div><div class='del'>-	  vxor 23, 23, 27</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 21, 21</div><div class='del'>-	vrlw 4, 4, 25  #</div><div class='del'>-	vrlw 5, 5, 25</div><div class='del'>-	vrlw 6, 6, 25</div><div class='del'>-	vrlw 7, 7, 25</div><div class='del'>-	  vrlw 20, 20, 25  #</div><div class='del'>-	  vrlw 21, 21, 25</div><div class='del'>-	  vrlw 22, 22, 25</div><div class='del'>-	  vrlw 23, 23, 25</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-	vadduwm 0, 0, 4</div><div class='del'>-	vadduwm 1, 1, 5</div><div class='del'>-	vadduwm 2, 2, 6</div><div class='del'>-	vadduwm 3, 3, 7</div><div class='del'>-	  vadduwm 16, 16, 20</div><div class='del'>-	  vadduwm 17, 17, 21</div><div class='del'>-	  vadduwm 18, 18, 22</div><div class='del'>-	  vadduwm 19, 19, 23</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 22, 22</div><div class='del'>-	  vpermxor 12, 12, 0, 25</div><div class='del'>-	  vpermxor 13, 13, 1, 25</div><div class='del'>-	  vpermxor 14, 14, 2, 25</div><div class='del'>-	  vpermxor 15, 15, 3, 25</div><div class='del'>-	  vpermxor 28, 28, 16, 25</div><div class='del'>-	  vpermxor 29, 29, 17, 25</div><div class='del'>-	  vpermxor 30, 30, 18, 25</div><div class='del'>-	  vpermxor 31, 31, 19, 25</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-	vadduwm 8, 8, 12</div><div class='del'>-	vadduwm 9, 9, 13</div><div class='del'>-	vadduwm 10, 10, 14</div><div class='del'>-	vadduwm 11, 11, 15</div><div class='del'>-	  vadduwm 24, 24, 28</div><div class='del'>-	  vadduwm 25, 25, 29</div><div class='del'>-	  vadduwm 26, 26, 30</div><div class='del'>-	  vadduwm 27, 27, 31</div><div class='del'>-	xxlor	0, 32+28, 32+28</div><div class='del'>-	xxlor	32+28, 23, 23</div><div class='del'>-	vxor 4, 4, 8</div><div class='del'>-	vxor 5, 5, 9</div><div class='del'>-	vxor 6, 6, 10</div><div class='del'>-	vxor 7, 7, 11</div><div class='del'>-	  vxor 20, 20, 24</div><div class='del'>-	  vxor 21, 21, 25</div><div class='del'>-	  vxor 22, 22, 26</div><div class='del'>-	  vxor 23, 23, 27</div><div class='del'>-	vrlw 4, 4, 28  #</div><div class='del'>-	vrlw 5, 5, 28</div><div class='del'>-	vrlw 6, 6, 28</div><div class='del'>-	vrlw 7, 7, 28</div><div class='del'>-	  vrlw 20, 20, 28  #</div><div class='del'>-	  vrlw 21, 21, 28</div><div class='del'>-	  vrlw 22, 22, 28</div><div class='del'>-	  vrlw 23, 23, 28</div><div class='del'>-	xxlor	32+28, 0, 0</div><div class='del'>-</div><div class='del'>-	# QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7,  v8, v13, v3, v4,  v9, v14)</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 20, 20</div><div class='del'>-	vadduwm 0, 0, 5</div><div class='del'>-	vadduwm 1, 1, 6</div><div class='del'>-	vadduwm 2, 2, 7</div><div class='del'>-	vadduwm 3, 3, 4</div><div class='del'>-	  vadduwm 16, 16, 21</div><div class='del'>-	  vadduwm 17, 17, 22</div><div class='del'>-	  vadduwm 18, 18, 23</div><div class='del'>-	  vadduwm 19, 19, 20</div><div class='del'>-</div><div class='del'>-	  vpermxor 15, 15, 0, 25</div><div class='del'>-	  vpermxor 12, 12, 1, 25</div><div class='del'>-	  vpermxor 13, 13, 2, 25</div><div class='del'>-	  vpermxor 14, 14, 3, 25</div><div class='del'>-	  vpermxor 31, 31, 16, 25</div><div class='del'>-	  vpermxor 28, 28, 17, 25</div><div class='del'>-	  vpermxor 29, 29, 18, 25</div><div class='del'>-	  vpermxor 30, 30, 19, 25</div><div class='del'>-</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-	vadduwm 10, 10, 15</div><div class='del'>-	vadduwm 11, 11, 12</div><div class='del'>-	vadduwm 8, 8, 13</div><div class='del'>-	vadduwm 9, 9, 14</div><div class='del'>-	  vadduwm 26, 26, 31</div><div class='del'>-	  vadduwm 27, 27, 28</div><div class='del'>-	  vadduwm 24, 24, 29</div><div class='del'>-	  vadduwm 25, 25, 30</div><div class='del'>-	vxor 5, 5, 10</div><div class='del'>-	vxor 6, 6, 11</div><div class='del'>-	vxor 7, 7, 8</div><div class='del'>-	vxor 4, 4, 9</div><div class='del'>-	  vxor 21, 21, 26</div><div class='del'>-	  vxor 22, 22, 27</div><div class='del'>-	  vxor 23, 23, 24</div><div class='del'>-	  vxor 20, 20, 25</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 21, 21</div><div class='del'>-	vrlw 5, 5, 25</div><div class='del'>-	vrlw 6, 6, 25</div><div class='del'>-	vrlw 7, 7, 25</div><div class='del'>-	vrlw 4, 4, 25</div><div class='del'>-	  vrlw 21, 21, 25</div><div class='del'>-	  vrlw 22, 22, 25</div><div class='del'>-	  vrlw 23, 23, 25</div><div class='del'>-	  vrlw 20, 20, 25</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-</div><div class='del'>-	vadduwm 0, 0, 5</div><div class='del'>-	vadduwm 1, 1, 6</div><div class='del'>-	vadduwm 2, 2, 7</div><div class='del'>-	vadduwm 3, 3, 4</div><div class='del'>-	  vadduwm 16, 16, 21</div><div class='del'>-	  vadduwm 17, 17, 22</div><div class='del'>-	  vadduwm 18, 18, 23</div><div class='del'>-	  vadduwm 19, 19, 20</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+25, 32+25</div><div class='del'>-	xxlor	32+25, 22, 22</div><div class='del'>-	  vpermxor 15, 15, 0, 25</div><div class='del'>-	  vpermxor 12, 12, 1, 25</div><div class='del'>-	  vpermxor 13, 13, 2, 25</div><div class='del'>-	  vpermxor 14, 14, 3, 25</div><div class='del'>-	  vpermxor 31, 31, 16, 25</div><div class='del'>-	  vpermxor 28, 28, 17, 25</div><div class='del'>-	  vpermxor 29, 29, 18, 25</div><div class='del'>-	  vpermxor 30, 30, 19, 25</div><div class='del'>-	xxlor	32+25, 0, 0</div><div class='del'>-</div><div class='del'>-	vadduwm 10, 10, 15</div><div class='del'>-	vadduwm 11, 11, 12</div><div class='del'>-	vadduwm 8, 8, 13</div><div class='del'>-	vadduwm 9, 9, 14</div><div class='del'>-	  vadduwm 26, 26, 31</div><div class='del'>-	  vadduwm 27, 27, 28</div><div class='del'>-	  vadduwm 24, 24, 29</div><div class='del'>-	  vadduwm 25, 25, 30</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+28, 32+28</div><div class='del'>-	xxlor	32+28, 23, 23</div><div class='del'>-	vxor 5, 5, 10</div><div class='del'>-	vxor 6, 6, 11</div><div class='del'>-	vxor 7, 7, 8</div><div class='del'>-	vxor 4, 4, 9</div><div class='del'>-	  vxor 21, 21, 26</div><div class='del'>-	  vxor 22, 22, 27</div><div class='del'>-	  vxor 23, 23, 24</div><div class='del'>-	  vxor 20, 20, 25</div><div class='del'>-	vrlw 5, 5, 28</div><div class='del'>-	vrlw 6, 6, 28</div><div class='del'>-	vrlw 7, 7, 28</div><div class='del'>-	vrlw 4, 4, 28</div><div class='del'>-	  vrlw 21, 21, 28</div><div class='del'>-	  vrlw 22, 22, 28</div><div class='del'>-	  vrlw 23, 23, 28</div><div class='del'>-	  vrlw 20, 20, 28</div><div class='del'>-	xxlor	32+28, 0, 0</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro QT_loop_4x</div><div class='del'>-	# QR(v0, v4,  v8, v12, v1, v5,  v9, v13, v2, v6, v10, v14, v3, v7, v11, v15)</div><div class='del'>-	vadduwm 0, 0, 4</div><div class='del'>-	vadduwm 1, 1, 5</div><div class='del'>-	vadduwm 2, 2, 6</div><div class='del'>-	vadduwm 3, 3, 7</div><div class='del'>-	  vpermxor 12, 12, 0, 20</div><div class='del'>-	  vpermxor 13, 13, 1, 20</div><div class='del'>-	  vpermxor 14, 14, 2, 20</div><div class='del'>-	  vpermxor 15, 15, 3, 20</div><div class='del'>-	vadduwm 8, 8, 12</div><div class='del'>-	vadduwm 9, 9, 13</div><div class='del'>-	vadduwm 10, 10, 14</div><div class='del'>-	vadduwm 11, 11, 15</div><div class='del'>-	vxor 4, 4, 8</div><div class='del'>-	vxor 5, 5, 9</div><div class='del'>-	vxor 6, 6, 10</div><div class='del'>-	vxor 7, 7, 11</div><div class='del'>-	vrlw 4, 4, 21</div><div class='del'>-	vrlw 5, 5, 21</div><div class='del'>-	vrlw 6, 6, 21</div><div class='del'>-	vrlw 7, 7, 21</div><div class='del'>-	vadduwm 0, 0, 4</div><div class='del'>-	vadduwm 1, 1, 5</div><div class='del'>-	vadduwm 2, 2, 6</div><div class='del'>-	vadduwm 3, 3, 7</div><div class='del'>-	  vpermxor 12, 12, 0, 22</div><div class='del'>-	  vpermxor 13, 13, 1, 22</div><div class='del'>-	  vpermxor 14, 14, 2, 22</div><div class='del'>-	  vpermxor 15, 15, 3, 22</div><div class='del'>-	vadduwm 8, 8, 12</div><div class='del'>-	vadduwm 9, 9, 13</div><div class='del'>-	vadduwm 10, 10, 14</div><div class='del'>-	vadduwm 11, 11, 15</div><div class='del'>-	vxor 4, 4, 8</div><div class='del'>-	vxor 5, 5, 9</div><div class='del'>-	vxor 6, 6, 10</div><div class='del'>-	vxor 7, 7, 11</div><div class='del'>-	vrlw 4, 4, 23</div><div class='del'>-	vrlw 5, 5, 23</div><div class='del'>-	vrlw 6, 6, 23</div><div class='del'>-	vrlw 7, 7, 23</div><div class='del'>-</div><div class='del'>-	# QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7,  v8, v13, v3, v4,  v9, v14)</div><div class='del'>-	vadduwm 0, 0, 5</div><div class='del'>-	vadduwm 1, 1, 6</div><div class='del'>-	vadduwm 2, 2, 7</div><div class='del'>-	vadduwm 3, 3, 4</div><div class='del'>-	  vpermxor 15, 15, 0, 20</div><div class='del'>-	  vpermxor 12, 12, 1, 20</div><div class='del'>-	  vpermxor 13, 13, 2, 20</div><div class='del'>-	  vpermxor 14, 14, 3, 20</div><div class='del'>-	vadduwm 10, 10, 15</div><div class='del'>-	vadduwm 11, 11, 12</div><div class='del'>-	vadduwm 8, 8, 13</div><div class='del'>-	vadduwm 9, 9, 14</div><div class='del'>-	vxor 5, 5, 10</div><div class='del'>-	vxor 6, 6, 11</div><div class='del'>-	vxor 7, 7, 8</div><div class='del'>-	vxor 4, 4, 9</div><div class='del'>-	vrlw 5, 5, 21</div><div class='del'>-	vrlw 6, 6, 21</div><div class='del'>-	vrlw 7, 7, 21</div><div class='del'>-	vrlw 4, 4, 21</div><div class='del'>-	vadduwm 0, 0, 5</div><div class='del'>-	vadduwm 1, 1, 6</div><div class='del'>-	vadduwm 2, 2, 7</div><div class='del'>-	vadduwm 3, 3, 4</div><div class='del'>-	  vpermxor 15, 15, 0, 22</div><div class='del'>-	  vpermxor 12, 12, 1, 22</div><div class='del'>-	  vpermxor 13, 13, 2, 22</div><div class='del'>-	  vpermxor 14, 14, 3, 22</div><div class='del'>-	vadduwm 10, 10, 15</div><div class='del'>-	vadduwm 11, 11, 12</div><div class='del'>-	vadduwm 8, 8, 13</div><div class='del'>-	vadduwm 9, 9, 14</div><div class='del'>-	vxor 5, 5, 10</div><div class='del'>-	vxor 6, 6, 11</div><div class='del'>-	vxor 7, 7, 8</div><div class='del'>-	vxor 4, 4, 9</div><div class='del'>-	vrlw 5, 5, 23</div><div class='del'>-	vrlw 6, 6, 23</div><div class='del'>-	vrlw 7, 7, 23</div><div class='del'>-	vrlw 4, 4, 23</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-# Transpose</div><div class='del'>-.macro TP_4x a0 a1 a2 a3</div><div class='del'>-	xxmrghw  10, 32+\a0, 32+\a1	# a0, a1, b0, b1</div><div class='del'>-	xxmrghw  11, 32+\a2, 32+\a3	# a2, a3, b2, b3</div><div class='del'>-	xxmrglw  12, 32+\a0, 32+\a1	# c0, c1, d0, d1</div><div class='del'>-	xxmrglw  13, 32+\a2, 32+\a3	# c2, c3, d2, d3</div><div class='del'>-	xxpermdi	32+\a0, 10, 11, 0	# a0, a1, a2, a3</div><div class='del'>-	xxpermdi	32+\a1, 10, 11, 3	# b0, b1, b2, b3</div><div class='del'>-	xxpermdi	32+\a2, 12, 13, 0	# c0, c1, c2, c3</div><div class='del'>-	xxpermdi	32+\a3, 12, 13, 3	# d0, d1, d2, d3</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-# key stream = working state + state</div><div class='del'>-.macro Add_state S</div><div class='del'>-	vadduwm \S+0, \S+0, 16-\S</div><div class='del'>-	vadduwm \S+4, \S+4, 17-\S</div><div class='del'>-	vadduwm \S+8, \S+8, 18-\S</div><div class='del'>-	vadduwm \S+12, \S+12, 19-\S</div><div class='del'>-</div><div class='del'>-	vadduwm \S+1, \S+1, 16-\S</div><div class='del'>-	vadduwm \S+5, \S+5, 17-\S</div><div class='del'>-	vadduwm \S+9, \S+9, 18-\S</div><div class='del'>-	vadduwm \S+13, \S+13, 19-\S</div><div class='del'>-</div><div class='del'>-	vadduwm \S+2, \S+2, 16-\S</div><div class='del'>-	vadduwm \S+6, \S+6, 17-\S</div><div class='del'>-	vadduwm \S+10, \S+10, 18-\S</div><div class='del'>-	vadduwm \S+14, \S+14, 19-\S</div><div class='del'>-</div><div class='del'>-	vadduwm	\S+3, \S+3, 16-\S</div><div class='del'>-	vadduwm	\S+7, \S+7, 17-\S</div><div class='del'>-	vadduwm	\S+11, \S+11, 18-\S</div><div class='del'>-	vadduwm	\S+15, \S+15, 19-\S</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# write 256 bytes</div><div class='del'>-#</div><div class='del'>-.macro Write_256 S</div><div class='del'>-	add 9, 14, 5</div><div class='del'>-	add 16, 14, 4</div><div class='del'>-	lxvw4x 0, 0, 9</div><div class='del'>-	lxvw4x 1, 17, 9</div><div class='del'>-	lxvw4x 2, 18, 9</div><div class='del'>-	lxvw4x 3, 19, 9</div><div class='del'>-	lxvw4x 4, 20, 9</div><div class='del'>-	lxvw4x 5, 21, 9</div><div class='del'>-	lxvw4x 6, 22, 9</div><div class='del'>-	lxvw4x 7, 23, 9</div><div class='del'>-	lxvw4x 8, 24, 9</div><div class='del'>-	lxvw4x 9, 25, 9</div><div class='del'>-	lxvw4x 10, 26, 9</div><div class='del'>-	lxvw4x 11, 27, 9</div><div class='del'>-	lxvw4x 12, 28, 9</div><div class='del'>-	lxvw4x 13, 29, 9</div><div class='del'>-	lxvw4x 14, 30, 9</div><div class='del'>-	lxvw4x 15, 31, 9</div><div class='del'>-</div><div class='del'>-	xxlxor \S+32, \S+32, 0</div><div class='del'>-	xxlxor \S+36, \S+36, 1</div><div class='del'>-	xxlxor \S+40, \S+40, 2</div><div class='del'>-	xxlxor \S+44, \S+44, 3</div><div class='del'>-	xxlxor \S+33, \S+33, 4</div><div class='del'>-	xxlxor \S+37, \S+37, 5</div><div class='del'>-	xxlxor \S+41, \S+41, 6</div><div class='del'>-	xxlxor \S+45, \S+45, 7</div><div class='del'>-	xxlxor \S+34, \S+34, 8</div><div class='del'>-	xxlxor \S+38, \S+38, 9</div><div class='del'>-	xxlxor \S+42, \S+42, 10</div><div class='del'>-	xxlxor \S+46, \S+46, 11</div><div class='del'>-	xxlxor \S+35, \S+35, 12</div><div class='del'>-	xxlxor \S+39, \S+39, 13</div><div class='del'>-	xxlxor \S+43, \S+43, 14</div><div class='del'>-	xxlxor \S+47, \S+47, 15</div><div class='del'>-</div><div class='del'>-	stxvw4x \S+32, 0, 16</div><div class='del'>-	stxvw4x \S+36, 17, 16</div><div class='del'>-	stxvw4x \S+40, 18, 16</div><div class='del'>-	stxvw4x \S+44, 19, 16</div><div class='del'>-</div><div class='del'>-	stxvw4x \S+33, 20, 16</div><div class='del'>-	stxvw4x \S+37, 21, 16</div><div class='del'>-	stxvw4x \S+41, 22, 16</div><div class='del'>-	stxvw4x \S+45, 23, 16</div><div class='del'>-</div><div class='del'>-	stxvw4x \S+34, 24, 16</div><div class='del'>-	stxvw4x \S+38, 25, 16</div><div class='del'>-	stxvw4x \S+42, 26, 16</div><div class='del'>-	stxvw4x \S+46, 27, 16</div><div class='del'>-</div><div class='del'>-	stxvw4x \S+35, 28, 16</div><div class='del'>-	stxvw4x \S+39, 29, 16</div><div class='del'>-	stxvw4x \S+43, 30, 16</div><div class='del'>-	stxvw4x \S+47, 31, 16</div><div class='del'>-</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# chacha20_p10le_8x(u32 *state, byte *dst, const byte *src, size_t len, int nrounds);</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START(chacha_p10le_8x)</div><div class='del'>-.align 5</div><div class='del'>-	cmpdi	6, 0</div><div class='del'>-	ble	Out_no_chacha</div><div class='del'>-</div><div class='del'>-	SAVE_REGS</div><div class='del'>-</div><div class='del'>-	# r17 - r31 mainly for Write_256 macro.</div><div class='del'>-	li	17, 16</div><div class='del'>-	li	18, 32</div><div class='del'>-	li	19, 48</div><div class='del'>-	li	20, 64</div><div class='del'>-	li	21, 80</div><div class='del'>-	li	22, 96</div><div class='del'>-	li	23, 112</div><div class='del'>-	li	24, 128</div><div class='del'>-	li	25, 144</div><div class='del'>-	li	26, 160</div><div class='del'>-	li	27, 176</div><div class='del'>-	li	28, 192</div><div class='del'>-	li	29, 208</div><div class='del'>-	li	30, 224</div><div class='del'>-	li	31, 240</div><div class='del'>-</div><div class='del'>-	mr 15, 6			# len</div><div class='del'>-	li 14, 0			# offset to inp and outp</div><div class='del'>-</div><div class='del'>-        lxvw4x	48, 0, 3		#  vr16, constants</div><div class='del'>-	lxvw4x	49, 17, 3		#  vr17, key 1</div><div class='del'>-	lxvw4x	50, 18, 3		#  vr18, key 2</div><div class='del'>-	lxvw4x	51, 19, 3		#  vr19, counter, nonce</div><div class='del'>-</div><div class='del'>-	# create (0, 1, 2, 3) counters</div><div class='del'>-	vspltisw 0, 0</div><div class='del'>-	vspltisw 1, 1</div><div class='del'>-	vspltisw 2, 2</div><div class='del'>-	vspltisw 3, 3</div><div class='del'>-	vmrghw	4, 0, 1</div><div class='del'>-	vmrglw	5, 2, 3</div><div class='del'>-	vsldoi	30, 4, 5, 8		# vr30 counter, 4 (0, 1, 2, 3)</div><div class='del'>-</div><div class='del'>-	vspltisw 21, 12</div><div class='del'>-	vspltisw 23, 7</div><div class='del'>-</div><div class='del'>-	addis	11, 2, permx@toc@ha</div><div class='del'>-	addi	11, 11, permx@toc@l</div><div class='del'>-	lxvw4x	32+20, 0, 11</div><div class='del'>-	lxvw4x	32+22, 17, 11</div><div class='del'>-</div><div class='del'>-	sradi	8, 7, 1</div><div class='del'>-</div><div class='del'>-	mtctr 8</div><div class='del'>-</div><div class='del'>-	# save constants to vsx</div><div class='del'>-	xxlor	16, 48, 48</div><div class='del'>-	xxlor	17, 49, 49</div><div class='del'>-	xxlor	18, 50, 50</div><div class='del'>-	xxlor	19, 51, 51</div><div class='del'>-</div><div class='del'>-	vspltisw 25, 4</div><div class='del'>-	vspltisw 26, 8</div><div class='del'>-</div><div class='del'>-	xxlor	25, 32+26, 32+26</div><div class='del'>-	xxlor	24, 32+25, 32+25</div><div class='del'>-</div><div class='del'>-	vadduwm	31, 30, 25		# counter = (0, 1, 2, 3) + (4, 4, 4, 4)</div><div class='del'>-	xxlor	30, 32+30, 32+30</div><div class='del'>-	xxlor	31, 32+31, 32+31</div><div class='del'>-</div><div class='del'>-	xxlor	20, 32+20, 32+20</div><div class='del'>-	xxlor	21, 32+21, 32+21</div><div class='del'>-	xxlor	22, 32+22, 32+22</div><div class='del'>-	xxlor	23, 32+23, 32+23</div><div class='del'>-</div><div class='del'>-	cmpdi	6, 512</div><div class='del'>-	blt	Loop_last</div><div class='del'>-</div><div class='del'>-Loop_8x:</div><div class='del'>-	xxspltw  32+0, 16, 0</div><div class='del'>-	xxspltw  32+1, 16, 1</div><div class='del'>-	xxspltw  32+2, 16, 2</div><div class='del'>-	xxspltw  32+3, 16, 3</div><div class='del'>-</div><div class='del'>-	xxspltw  32+4, 17, 0</div><div class='del'>-	xxspltw  32+5, 17, 1</div><div class='del'>-	xxspltw  32+6, 17, 2</div><div class='del'>-	xxspltw  32+7, 17, 3</div><div class='del'>-	xxspltw  32+8, 18, 0</div><div class='del'>-	xxspltw  32+9, 18, 1</div><div class='del'>-	xxspltw  32+10, 18, 2</div><div class='del'>-	xxspltw  32+11, 18, 3</div><div class='del'>-	xxspltw  32+12, 19, 0</div><div class='del'>-	xxspltw  32+13, 19, 1</div><div class='del'>-	xxspltw  32+14, 19, 2</div><div class='del'>-	xxspltw  32+15, 19, 3</div><div class='del'>-	vadduwm	12, 12, 30	# increase counter</div><div class='del'>-</div><div class='del'>-	xxspltw  32+16, 16, 0</div><div class='del'>-	xxspltw  32+17, 16, 1</div><div class='del'>-	xxspltw  32+18, 16, 2</div><div class='del'>-	xxspltw  32+19, 16, 3</div><div class='del'>-</div><div class='del'>-	xxspltw  32+20, 17, 0</div><div class='del'>-	xxspltw  32+21, 17, 1</div><div class='del'>-	xxspltw  32+22, 17, 2</div><div class='del'>-	xxspltw  32+23, 17, 3</div><div class='del'>-	xxspltw  32+24, 18, 0</div><div class='del'>-	xxspltw  32+25, 18, 1</div><div class='del'>-	xxspltw  32+26, 18, 2</div><div class='del'>-	xxspltw  32+27, 18, 3</div><div class='del'>-	xxspltw  32+28, 19, 0</div><div class='del'>-	xxspltw  32+29, 19, 1</div><div class='del'>-	vadduwm	28, 28, 31	# increase counter</div><div class='del'>-	xxspltw  32+30, 19, 2</div><div class='del'>-	xxspltw  32+31, 19, 3</div><div class='del'>-</div><div class='del'>-.align 5</div><div class='del'>-quarter_loop_8x:</div><div class='del'>-	QT_loop_8x</div><div class='del'>-</div><div class='del'>-	bdnz	quarter_loop_8x</div><div class='del'>-</div><div class='del'>-	xxlor	0, 32+30, 32+30</div><div class='del'>-	xxlor	32+30, 30, 30</div><div class='del'>-	vadduwm	12, 12, 30</div><div class='del'>-	xxlor	32+30, 0, 0</div><div class='del'>-	TP_4x 0, 1, 2, 3</div><div class='del'>-	TP_4x 4, 5, 6, 7</div><div class='del'>-	TP_4x 8, 9, 10, 11</div><div class='del'>-	TP_4x 12, 13, 14, 15</div><div class='del'>-</div><div class='del'>-	xxlor	0, 48, 48</div><div class='del'>-	xxlor	1, 49, 49</div><div class='del'>-	xxlor	2, 50, 50</div><div class='del'>-	xxlor	3, 51, 51</div><div class='del'>-	xxlor	48, 16, 16</div><div class='del'>-	xxlor	49, 17, 17</div><div class='del'>-	xxlor	50, 18, 18</div><div class='del'>-	xxlor	51, 19, 19</div><div class='del'>-	Add_state 0</div><div class='del'>-	xxlor	48, 0, 0</div><div class='del'>-	xxlor	49, 1, 1</div><div class='del'>-	xxlor	50, 2, 2</div><div class='del'>-	xxlor	51, 3, 3</div><div class='del'>-	Write_256 0</div><div class='del'>-	addi	14, 14, 256	# offset +=256</div><div class='del'>-	addi	15, 15, -256	# len -=256</div><div class='del'>-</div><div class='del'>-	xxlor	5, 32+31, 32+31</div><div class='del'>-	xxlor	32+31, 31, 31</div><div class='del'>-	vadduwm	28, 28, 31</div><div class='del'>-	xxlor	32+31, 5, 5</div><div class='del'>-	TP_4x 16+0, 16+1, 16+2, 16+3</div><div class='del'>-	TP_4x 16+4, 16+5, 16+6, 16+7</div><div class='del'>-	TP_4x 16+8, 16+9, 16+10, 16+11</div><div class='del'>-	TP_4x 16+12, 16+13, 16+14, 16+15</div><div class='del'>-</div><div class='del'>-	xxlor	32, 16, 16</div><div class='del'>-	xxlor	33, 17, 17</div><div class='del'>-	xxlor	34, 18, 18</div><div class='del'>-	xxlor	35, 19, 19</div><div class='del'>-	Add_state 16</div><div class='del'>-	Write_256 16</div><div class='del'>-	addi	14, 14, 256	# offset +=256</div><div class='del'>-	addi	15, 15, -256	# len +=256</div><div class='del'>-</div><div class='del'>-	xxlor	32+24, 24, 24</div><div class='del'>-	xxlor	32+25, 25, 25</div><div class='del'>-	xxlor	32+30, 30, 30</div><div class='del'>-	vadduwm	30, 30, 25</div><div class='del'>-	vadduwm	31, 30, 24</div><div class='del'>-	xxlor	30, 32+30, 32+30</div><div class='del'>-	xxlor	31, 32+31, 32+31</div><div class='del'>-</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Out_loop</div><div class='del'>-</div><div class='del'>-	cmpdi	15, 512</div><div class='del'>-	blt	Loop_last</div><div class='del'>-</div><div class='del'>-	mtctr 8</div><div class='del'>-	b Loop_8x</div><div class='del'>-</div><div class='del'>-Loop_last:</div><div class='del'>-        lxvw4x	48, 0, 3		#  vr16, constants</div><div class='del'>-	lxvw4x	49, 17, 3		#  vr17, key 1</div><div class='del'>-	lxvw4x	50, 18, 3		#  vr18, key 2</div><div class='del'>-	lxvw4x	51, 19, 3		#  vr19, counter, nonce</div><div class='del'>-</div><div class='del'>-	vspltisw 21, 12</div><div class='del'>-	vspltisw 23, 7</div><div class='del'>-	addis	11, 2, permx@toc@ha</div><div class='del'>-	addi	11, 11, permx@toc@l</div><div class='del'>-	lxvw4x	32+20, 0, 11</div><div class='del'>-	lxvw4x	32+22, 17, 11</div><div class='del'>-</div><div class='del'>-	sradi	8, 7, 1</div><div class='del'>-	mtctr 8</div><div class='del'>-</div><div class='del'>-Loop_4x:</div><div class='del'>-	vspltw  0, 16, 0</div><div class='del'>-	vspltw  1, 16, 1</div><div class='del'>-	vspltw  2, 16, 2</div><div class='del'>-	vspltw  3, 16, 3</div><div class='del'>-</div><div class='del'>-	vspltw  4, 17, 0</div><div class='del'>-	vspltw  5, 17, 1</div><div class='del'>-	vspltw  6, 17, 2</div><div class='del'>-	vspltw  7, 17, 3</div><div class='del'>-	vspltw  8, 18, 0</div><div class='del'>-	vspltw  9, 18, 1</div><div class='del'>-	vspltw  10, 18, 2</div><div class='del'>-	vspltw  11, 18, 3</div><div class='del'>-	vspltw  12, 19, 0</div><div class='del'>-	vadduwm	12, 12, 30	# increase counter</div><div class='del'>-	vspltw  13, 19, 1</div><div class='del'>-	vspltw  14, 19, 2</div><div class='del'>-	vspltw  15, 19, 3</div><div class='del'>-</div><div class='del'>-.align 5</div><div class='del'>-quarter_loop:</div><div class='del'>-	QT_loop_4x</div><div class='del'>-</div><div class='del'>-	bdnz	quarter_loop</div><div class='del'>-</div><div class='del'>-	vadduwm	12, 12, 30</div><div class='del'>-	TP_4x 0, 1, 2, 3</div><div class='del'>-	TP_4x 4, 5, 6, 7</div><div class='del'>-	TP_4x 8, 9, 10, 11</div><div class='del'>-	TP_4x 12, 13, 14, 15</div><div class='del'>-</div><div class='del'>-	Add_state 0</div><div class='del'>-	Write_256 0</div><div class='del'>-	addi	14, 14, 256	# offset += 256</div><div class='del'>-	addi	15, 15, -256	# len += 256</div><div class='del'>-</div><div class='del'>-	# Update state counter</div><div class='del'>-	vspltisw 25, 4</div><div class='del'>-	vadduwm	30, 30, 25</div><div class='del'>-</div><div class='del'>-	cmpdi	15, 0</div><div class='del'>-	beq	Out_loop</div><div class='del'>-	cmpdi	15, 256</div><div class='del'>-	blt	Out_loop</div><div class='del'>-</div><div class='del'>-	mtctr 8</div><div class='del'>-	b Loop_4x</div><div class='del'>-</div><div class='del'>-Out_loop:</div><div class='del'>-	RESTORE_REGS</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-Out_no_chacha:</div><div class='del'>-	li	3, 0</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(chacha_p10le_8x)</div><div class='del'>-</div><div class='del'>-SYM_DATA_START_LOCAL(PERMX)</div><div class='del'>-.align 5</div><div class='del'>-permx:</div><div class='del'>-.long 0x22330011, 0x66774455, 0xaabb8899, 0xeeffccdd</div><div class='del'>-.long 0x11223300, 0x55667744, 0x99aabb88, 0xddeeffcc</div><div class='del'>-SYM_DATA_END(PERMX)</div><div class='head'>diff --git a/arch/powerpc/crypto/crc-vpmsum_test.c b/arch/powerpc/crypto/crc-vpmsum_test.c<br/>deleted file mode 100644<br/>index c61a874a3a5c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crc-vpmsum_test.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc-vpmsum_test.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,133 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * CRC vpmsum tester</div><div class='del'>- * Copyright 2017 Daniel Axtens, IBM Corporation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crc-t10dif.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-static unsigned long iterations = 10000;</div><div class='del'>-</div><div class='del'>-#define MAX_CRC_LENGTH 65535</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init crc_test_init(void)</div><div class='del'>-{</div><div class='del'>-	u16 crc16 = 0, verify16 = 0;</div><div class='del'>-	__le32 verify32le = 0;</div><div class='del'>-	unsigned char *data;</div><div class='del'>-	u32 verify32 = 0;</div><div class='del'>-	unsigned long i;</div><div class='del'>-	__le32 crc32;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	struct crypto_shash *crct10dif_tfm;</div><div class='del'>-	struct crypto_shash *crc32c_tfm;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_ARCH_207S))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	data = kmalloc(MAX_CRC_LENGTH, GFP_KERNEL);</div><div class='del'>-	if (!data)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	crct10dif_tfm = crypto_alloc_shash("crct10dif", 0, 0);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(crct10dif_tfm)) {</div><div class='del'>-		pr_err("Error allocating crc-t10dif\n");</div><div class='del'>-		goto free_buf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crc32c_tfm = crypto_alloc_shash("crc32c", 0, 0);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(crc32c_tfm)) {</div><div class='del'>-		pr_err("Error allocating crc32c\n");</div><div class='del'>-		goto free_16;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		SHASH_DESC_ON_STACK(crct10dif_shash, crct10dif_tfm);</div><div class='del'>-		SHASH_DESC_ON_STACK(crc32c_shash, crc32c_tfm);</div><div class='del'>-</div><div class='del'>-		crct10dif_shash-&gt;tfm = crct10dif_tfm;</div><div class='del'>-		ret = crypto_shash_init(crct10dif_shash);</div><div class='del'>-</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_err("Error initing crc-t10dif\n");</div><div class='del'>-			goto free_32;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		crc32c_shash-&gt;tfm = crc32c_tfm;</div><div class='del'>-		ret = crypto_shash_init(crc32c_shash);</div><div class='del'>-</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_err("Error initing crc32c\n");</div><div class='del'>-			goto free_32;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pr_info("crc-vpmsum_test begins, %lu iterations\n", iterations);</div><div class='del'>-		for (i=0; i&lt;iterations; i++) {</div><div class='del'>-			size_t offset = get_random_u32_below(16);</div><div class='del'>-			size_t len = get_random_u32_below(MAX_CRC_LENGTH);</div><div class='del'>-</div><div class='del'>-			if (len &lt;= offset)</div><div class='del'>-				continue;</div><div class='del'>-			get_random_bytes(data, len);</div><div class='del'>-			len -= offset;</div><div class='del'>-</div><div class='del'>-			crypto_shash_update(crct10dif_shash, data+offset, len);</div><div class='del'>-			crypto_shash_final(crct10dif_shash, (u8 *)(&amp;crc16));</div><div class='del'>-			verify16 = crc_t10dif_generic(verify16, data+offset, len);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-			if (crc16 != verify16) {</div><div class='del'>-				pr_err("FAILURE in CRC16: got 0x%04x expected 0x%04x (len %lu)\n",</div><div class='del'>-				       crc16, verify16, len);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			crypto_shash_update(crc32c_shash, data+offset, len);</div><div class='del'>-			crypto_shash_final(crc32c_shash, (u8 *)(&amp;crc32));</div><div class='del'>-			verify32 = le32_to_cpu(verify32le);</div><div class='del'>-		        verify32le = ~cpu_to_le32(__crc32c_le(~verify32, data+offset, len));</div><div class='del'>-			if (crc32 != verify32le) {</div><div class='del'>-				pr_err("FAILURE in CRC32: got 0x%08x expected 0x%08x (len %lu)\n",</div><div class='del'>-				       crc32, verify32, len);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		cond_resched();</div><div class='del'>-		}</div><div class='del'>-		pr_info("crc-vpmsum_test done, completed %lu iterations\n", i);</div><div class='del'>-	} while (0);</div><div class='del'>-</div><div class='del'>-free_32:</div><div class='del'>-	crypto_free_shash(crc32c_tfm);</div><div class='del'>-</div><div class='del'>-free_16:</div><div class='del'>-	crypto_free_shash(crct10dif_tfm);</div><div class='del'>-</div><div class='del'>-free_buf:</div><div class='del'>-	kfree(data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc_test_exit(void) {}</div><div class='del'>-</div><div class='del'>-module_init(crc_test_init);</div><div class='del'>-module_exit(crc_test_exit);</div><div class='del'>-module_param(iterations, long, 0400);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Daniel Axtens &lt;dja@axtens.net&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Vector polynomial multiply-sum CRC tester");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/crypto/crc32-vpmsum_core.S b/arch/powerpc/crypto/crc32-vpmsum_core.S<br/>deleted file mode 100644<br/>index b0f87f595b26..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crc32-vpmsum_core.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32-vpmsum_core.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,746 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Core of the accelerated CRC algorithm.</div><div class='del'>- * In your file, define the constants and CRC_FUNCTION_NAME</div><div class='del'>- * Then include this file.</div><div class='del'>- *</div><div class='del'>- * Calculate the checksum of data that is 16 byte aligned and a multiple of</div><div class='del'>- * 16 bytes.</div><div class='del'>- *</div><div class='del'>- * The first step is to reduce it to 1024 bits. We do this in 8 parallel</div><div class='del'>- * chunks in order to mask the latency of the vpmsum instructions. If we</div><div class='del'>- * have more than 32 kB of data to checksum we repeat this step multiple</div><div class='del'>- * times, passing in the previous 1024 bits.</div><div class='del'>- *</div><div class='del'>- * The next step is to reduce the 1024 bits to 64 bits. This step adds</div><div class='del'>- * 32 bits of 0s to the end - this matches what a CRC does. We just</div><div class='del'>- * calculate constants that land the data in this 32 bits.</div><div class='del'>- *</div><div class='del'>- * We then use fixed point Barrett reduction to compute a mod n over GF(2)</div><div class='del'>- * for n = CRC using POWER8 instructions. We use x = 32.</div><div class='del'>- *</div><div class='del'>- * https://en.wikipedia.org/wiki/Barrett_reduction</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Anton Blanchard &lt;anton@au.ibm.com&gt;, IBM</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/ppc-opcode.h&gt;</div><div class='del'>-</div><div class='del'>-#define MAX_SIZE	32768</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-</div><div class='del'>-#if defined(__BIG_ENDIAN__) &amp;&amp; defined(REFLECT)</div><div class='del'>-#define BYTESWAP_DATA</div><div class='del'>-#elif defined(__LITTLE_ENDIAN__) &amp;&amp; !defined(REFLECT)</div><div class='del'>-#define BYTESWAP_DATA</div><div class='del'>-#else</div><div class='del'>-#undef BYTESWAP_DATA</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define off16		r25</div><div class='del'>-#define off32		r26</div><div class='del'>-#define off48		r27</div><div class='del'>-#define off64		r28</div><div class='del'>-#define off80		r29</div><div class='del'>-#define off96		r30</div><div class='del'>-#define off112		r31</div><div class='del'>-</div><div class='del'>-#define const1		v24</div><div class='del'>-#define const2		v25</div><div class='del'>-</div><div class='del'>-#define byteswap	v26</div><div class='del'>-#define	mask_32bit	v27</div><div class='del'>-#define	mask_64bit	v28</div><div class='del'>-#define zeroes		v29</div><div class='del'>-</div><div class='del'>-#ifdef BYTESWAP_DATA</div><div class='del'>-#define VPERM(A, B, C, D) vperm	A, B, C, D</div><div class='del'>-#else</div><div class='del'>-#define VPERM(A, B, C, D)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* unsigned int CRC_FUNCTION_NAME(unsigned int crc, void *p, unsigned long len) */</div><div class='del'>-FUNC_START(CRC_FUNCTION_NAME)</div><div class='del'>-	std	r31,-8(r1)</div><div class='del'>-	std	r30,-16(r1)</div><div class='del'>-	std	r29,-24(r1)</div><div class='del'>-	std	r28,-32(r1)</div><div class='del'>-	std	r27,-40(r1)</div><div class='del'>-	std	r26,-48(r1)</div><div class='del'>-	std	r25,-56(r1)</div><div class='del'>-</div><div class='del'>-	li	off16,16</div><div class='del'>-	li	off32,32</div><div class='del'>-	li	off48,48</div><div class='del'>-	li	off64,64</div><div class='del'>-	li	off80,80</div><div class='del'>-	li	off96,96</div><div class='del'>-	li	off112,112</div><div class='del'>-	li	r0,0</div><div class='del'>-</div><div class='del'>-	/* Enough room for saving 10 non volatile VMX registers */</div><div class='del'>-	subi	r6,r1,56+10*16</div><div class='del'>-	subi	r7,r1,56+2*16</div><div class='del'>-</div><div class='del'>-	stvx	v20,0,r6</div><div class='del'>-	stvx	v21,off16,r6</div><div class='del'>-	stvx	v22,off32,r6</div><div class='del'>-	stvx	v23,off48,r6</div><div class='del'>-	stvx	v24,off64,r6</div><div class='del'>-	stvx	v25,off80,r6</div><div class='del'>-	stvx	v26,off96,r6</div><div class='del'>-	stvx	v27,off112,r6</div><div class='del'>-	stvx	v28,0,r7</div><div class='del'>-	stvx	v29,off16,r7</div><div class='del'>-</div><div class='del'>-	mr	r10,r3</div><div class='del'>-</div><div class='del'>-	vxor	zeroes,zeroes,zeroes</div><div class='del'>-	vspltisw v0,-1</div><div class='del'>-</div><div class='del'>-	vsldoi	mask_32bit,zeroes,v0,4</div><div class='del'>-	vsldoi	mask_64bit,zeroes,v0,8</div><div class='del'>-</div><div class='del'>-	/* Get the initial value into v8 */</div><div class='del'>-	vxor	v8,v8,v8</div><div class='del'>-	MTVRD(v8, R3)</div><div class='del'>-#ifdef REFLECT</div><div class='del'>-	vsldoi	v8,zeroes,v8,8	/* shift into bottom 32 bits */</div><div class='del'>-#else</div><div class='del'>-	vsldoi	v8,v8,zeroes,4	/* shift into top 32 bits */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef BYTESWAP_DATA</div><div class='del'>-	LOAD_REG_ADDR(r3, .byteswap_constant)</div><div class='del'>-	lvx	byteswap,0,r3</div><div class='del'>-	addi	r3,r3,16</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	cmpdi	r5,256</div><div class='del'>-	blt	.Lshort</div><div class='del'>-</div><div class='del'>-	rldicr	r6,r5,0,56</div><div class='del'>-</div><div class='del'>-	/* Checksum in blocks of MAX_SIZE */</div><div class='del'>-1:	lis	r7,MAX_SIZE@h</div><div class='del'>-	ori	r7,r7,MAX_SIZE@l</div><div class='del'>-	mr	r9,r7</div><div class='del'>-	cmpd	r6,r7</div><div class='del'>-	bgt	2f</div><div class='del'>-	mr	r7,r6</div><div class='del'>-2:	subf	r6,r7,r6</div><div class='del'>-</div><div class='del'>-	/* our main loop does 128 bytes at a time */</div><div class='del'>-	srdi	r7,r7,7</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Work out the offset into the constants table to start at. Each</div><div class='del'>-	 * constant is 16 bytes, and it is used against 128 bytes of input</div><div class='del'>-	 * data - 128 / 16 = 8</div><div class='del'>-	 */</div><div class='del'>-	sldi	r8,r7,4</div><div class='del'>-	srdi	r9,r9,3</div><div class='del'>-	subf	r8,r8,r9</div><div class='del'>-</div><div class='del'>-	/* We reduce our final 128 bytes in a separate step */</div><div class='del'>-	addi	r7,r7,-1</div><div class='del'>-	mtctr	r7</div><div class='del'>-</div><div class='del'>-	LOAD_REG_ADDR(r3, .constants)</div><div class='del'>-</div><div class='del'>-	/* Find the start of our constants */</div><div class='del'>-	add	r3,r3,r8</div><div class='del'>-</div><div class='del'>-	/* zero v0-v7 which will contain our checksums */</div><div class='del'>-	vxor	v0,v0,v0</div><div class='del'>-	vxor	v1,v1,v1</div><div class='del'>-	vxor	v2,v2,v2</div><div class='del'>-	vxor	v3,v3,v3</div><div class='del'>-	vxor	v4,v4,v4</div><div class='del'>-	vxor	v5,v5,v5</div><div class='del'>-	vxor	v6,v6,v6</div><div class='del'>-	vxor	v7,v7,v7</div><div class='del'>-</div><div class='del'>-	lvx	const1,0,r3</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we are looping back to consume more data we use the values</div><div class='del'>-	 * already in v16-v23.</div><div class='del'>-	 */</div><div class='del'>-	cmpdi	r0,1</div><div class='del'>-	beq	2f</div><div class='del'>-</div><div class='del'>-	/* First warm up pass */</div><div class='del'>-	lvx	v16,0,r4</div><div class='del'>-	lvx	v17,off16,r4</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPERM(v17,v17,v17,byteswap)</div><div class='del'>-	lvx	v18,off32,r4</div><div class='del'>-	lvx	v19,off48,r4</div><div class='del'>-	VPERM(v18,v18,v18,byteswap)</div><div class='del'>-	VPERM(v19,v19,v19,byteswap)</div><div class='del'>-	lvx	v20,off64,r4</div><div class='del'>-	lvx	v21,off80,r4</div><div class='del'>-	VPERM(v20,v20,v20,byteswap)</div><div class='del'>-	VPERM(v21,v21,v21,byteswap)</div><div class='del'>-	lvx	v22,off96,r4</div><div class='del'>-	lvx	v23,off112,r4</div><div class='del'>-	VPERM(v22,v22,v22,byteswap)</div><div class='del'>-	VPERM(v23,v23,v23,byteswap)</div><div class='del'>-	addi	r4,r4,8*16</div><div class='del'>-</div><div class='del'>-	/* xor in initial value */</div><div class='del'>-	vxor	v16,v16,v8</div><div class='del'>-</div><div class='del'>-2:	bdz	.Lfirst_warm_up_done</div><div class='del'>-</div><div class='del'>-	addi	r3,r3,16</div><div class='del'>-	lvx	const2,0,r3</div><div class='del'>-</div><div class='del'>-	/* Second warm up pass */</div><div class='del'>-	VPMSUMD(v8,v16,const1)</div><div class='del'>-	lvx	v16,0,r4</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v9,v17,const1)</div><div class='del'>-	lvx	v17,off16,r4</div><div class='del'>-	VPERM(v17,v17,v17,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v10,v18,const1)</div><div class='del'>-	lvx	v18,off32,r4</div><div class='del'>-	VPERM(v18,v18,v18,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v11,v19,const1)</div><div class='del'>-	lvx	v19,off48,r4</div><div class='del'>-	VPERM(v19,v19,v19,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v12,v20,const1)</div><div class='del'>-	lvx	v20,off64,r4</div><div class='del'>-	VPERM(v20,v20,v20,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v13,v21,const1)</div><div class='del'>-	lvx	v21,off80,r4</div><div class='del'>-	VPERM(v21,v21,v21,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v14,v22,const1)</div><div class='del'>-	lvx	v22,off96,r4</div><div class='del'>-	VPERM(v22,v22,v22,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v15,v23,const1)</div><div class='del'>-	lvx	v23,off112,r4</div><div class='del'>-	VPERM(v23,v23,v23,byteswap)</div><div class='del'>-</div><div class='del'>-	addi	r4,r4,8*16</div><div class='del'>-</div><div class='del'>-	bdz	.Lfirst_cool_down</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * main loop. We modulo schedule it such that it takes three iterations</div><div class='del'>-	 * to complete - first iteration load, second iteration vpmsum, third</div><div class='del'>-	 * iteration xor.</div><div class='del'>-	 */</div><div class='del'>-	.balign	16</div><div class='del'>-4:	lvx	const1,0,r3</div><div class='del'>-	addi	r3,r3,16</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v0,v0,v8</div><div class='del'>-	VPMSUMD(v8,v16,const2)</div><div class='del'>-	lvx	v16,0,r4</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v1,v1,v9</div><div class='del'>-	VPMSUMD(v9,v17,const2)</div><div class='del'>-	lvx	v17,off16,r4</div><div class='del'>-	VPERM(v17,v17,v17,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v2,v2,v10</div><div class='del'>-	VPMSUMD(v10,v18,const2)</div><div class='del'>-	lvx	v18,off32,r4</div><div class='del'>-	VPERM(v18,v18,v18,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v3,v3,v11</div><div class='del'>-	VPMSUMD(v11,v19,const2)</div><div class='del'>-	lvx	v19,off48,r4</div><div class='del'>-	VPERM(v19,v19,v19,byteswap)</div><div class='del'>-	lvx	const2,0,r3</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v4,v4,v12</div><div class='del'>-	VPMSUMD(v12,v20,const1)</div><div class='del'>-	lvx	v20,off64,r4</div><div class='del'>-	VPERM(v20,v20,v20,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v5,v5,v13</div><div class='del'>-	VPMSUMD(v13,v21,const1)</div><div class='del'>-	lvx	v21,off80,r4</div><div class='del'>-	VPERM(v21,v21,v21,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v6,v6,v14</div><div class='del'>-	VPMSUMD(v14,v22,const1)</div><div class='del'>-	lvx	v22,off96,r4</div><div class='del'>-	VPERM(v22,v22,v22,byteswap)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v7,v7,v15</div><div class='del'>-	VPMSUMD(v15,v23,const1)</div><div class='del'>-	lvx	v23,off112,r4</div><div class='del'>-	VPERM(v23,v23,v23,byteswap)</div><div class='del'>-</div><div class='del'>-	addi	r4,r4,8*16</div><div class='del'>-</div><div class='del'>-	bdnz	4b</div><div class='del'>-</div><div class='del'>-.Lfirst_cool_down:</div><div class='del'>-	/* First cool down pass */</div><div class='del'>-	lvx	const1,0,r3</div><div class='del'>-	addi	r3,r3,16</div><div class='del'>-</div><div class='del'>-	vxor	v0,v0,v8</div><div class='del'>-	VPMSUMD(v8,v16,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v1,v1,v9</div><div class='del'>-	VPMSUMD(v9,v17,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v2,v2,v10</div><div class='del'>-	VPMSUMD(v10,v18,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v3,v3,v11</div><div class='del'>-	VPMSUMD(v11,v19,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v4,v4,v12</div><div class='del'>-	VPMSUMD(v12,v20,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v5,v5,v13</div><div class='del'>-	VPMSUMD(v13,v21,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v6,v6,v14</div><div class='del'>-	VPMSUMD(v14,v22,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-	vxor	v7,v7,v15</div><div class='del'>-	VPMSUMD(v15,v23,const1)</div><div class='del'>-	ori	r2,r2,0</div><div class='del'>-</div><div class='del'>-.Lsecond_cool_down:</div><div class='del'>-	/* Second cool down pass */</div><div class='del'>-	vxor	v0,v0,v8</div><div class='del'>-	vxor	v1,v1,v9</div><div class='del'>-	vxor	v2,v2,v10</div><div class='del'>-	vxor	v3,v3,v11</div><div class='del'>-	vxor	v4,v4,v12</div><div class='del'>-	vxor	v5,v5,v13</div><div class='del'>-	vxor	v6,v6,v14</div><div class='del'>-	vxor	v7,v7,v15</div><div class='del'>-</div><div class='del'>-#ifdef REFLECT</div><div class='del'>-	/*</div><div class='del'>-	 * vpmsumd produces a 96 bit result in the least significant bits</div><div class='del'>-	 * of the register. Since we are bit reflected we have to shift it</div><div class='del'>-	 * left 32 bits so it occupies the least significant bits in the</div><div class='del'>-	 * bit reflected domain.</div><div class='del'>-	 */</div><div class='del'>-	vsldoi	v0,v0,zeroes,4</div><div class='del'>-	vsldoi	v1,v1,zeroes,4</div><div class='del'>-	vsldoi	v2,v2,zeroes,4</div><div class='del'>-	vsldoi	v3,v3,zeroes,4</div><div class='del'>-	vsldoi	v4,v4,zeroes,4</div><div class='del'>-	vsldoi	v5,v5,zeroes,4</div><div class='del'>-	vsldoi	v6,v6,zeroes,4</div><div class='del'>-	vsldoi	v7,v7,zeroes,4</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* xor with last 1024 bits */</div><div class='del'>-	lvx	v8,0,r4</div><div class='del'>-	lvx	v9,off16,r4</div><div class='del'>-	VPERM(v8,v8,v8,byteswap)</div><div class='del'>-	VPERM(v9,v9,v9,byteswap)</div><div class='del'>-	lvx	v10,off32,r4</div><div class='del'>-	lvx	v11,off48,r4</div><div class='del'>-	VPERM(v10,v10,v10,byteswap)</div><div class='del'>-	VPERM(v11,v11,v11,byteswap)</div><div class='del'>-	lvx	v12,off64,r4</div><div class='del'>-	lvx	v13,off80,r4</div><div class='del'>-	VPERM(v12,v12,v12,byteswap)</div><div class='del'>-	VPERM(v13,v13,v13,byteswap)</div><div class='del'>-	lvx	v14,off96,r4</div><div class='del'>-	lvx	v15,off112,r4</div><div class='del'>-	VPERM(v14,v14,v14,byteswap)</div><div class='del'>-	VPERM(v15,v15,v15,byteswap)</div><div class='del'>-</div><div class='del'>-	addi	r4,r4,8*16</div><div class='del'>-</div><div class='del'>-	vxor	v16,v0,v8</div><div class='del'>-	vxor	v17,v1,v9</div><div class='del'>-	vxor	v18,v2,v10</div><div class='del'>-	vxor	v19,v3,v11</div><div class='del'>-	vxor	v20,v4,v12</div><div class='del'>-	vxor	v21,v5,v13</div><div class='del'>-	vxor	v22,v6,v14</div><div class='del'>-	vxor	v23,v7,v15</div><div class='del'>-</div><div class='del'>-	li	r0,1</div><div class='del'>-	cmpdi	r6,0</div><div class='del'>-	addi	r6,r6,128</div><div class='del'>-	bne	1b</div><div class='del'>-</div><div class='del'>-	/* Work out how many bytes we have left */</div><div class='del'>-	andi.	r5,r5,127</div><div class='del'>-</div><div class='del'>-	/* Calculate where in the constant table we need to start */</div><div class='del'>-	subfic	r6,r5,128</div><div class='del'>-	add	r3,r3,r6</div><div class='del'>-</div><div class='del'>-	/* How many 16 byte chunks are in the tail */</div><div class='del'>-	srdi	r7,r5,4</div><div class='del'>-	mtctr	r7</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reduce the previously calculated 1024 bits to 64 bits, shifting</div><div class='del'>-	 * 32 bits to include the trailing 32 bits of zeros</div><div class='del'>-	 */</div><div class='del'>-	lvx	v0,0,r3</div><div class='del'>-	lvx	v1,off16,r3</div><div class='del'>-	lvx	v2,off32,r3</div><div class='del'>-	lvx	v3,off48,r3</div><div class='del'>-	lvx	v4,off64,r3</div><div class='del'>-	lvx	v5,off80,r3</div><div class='del'>-	lvx	v6,off96,r3</div><div class='del'>-	lvx	v7,off112,r3</div><div class='del'>-	addi	r3,r3,8*16</div><div class='del'>-</div><div class='del'>-	VPMSUMW(v0,v16,v0)</div><div class='del'>-	VPMSUMW(v1,v17,v1)</div><div class='del'>-	VPMSUMW(v2,v18,v2)</div><div class='del'>-	VPMSUMW(v3,v19,v3)</div><div class='del'>-	VPMSUMW(v4,v20,v4)</div><div class='del'>-	VPMSUMW(v5,v21,v5)</div><div class='del'>-	VPMSUMW(v6,v22,v6)</div><div class='del'>-	VPMSUMW(v7,v23,v7)</div><div class='del'>-</div><div class='del'>-	/* Now reduce the tail (0 - 112 bytes) */</div><div class='del'>-	cmpdi	r7,0</div><div class='del'>-	beq	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,0,r4</div><div class='del'>-	lvx	v17,0,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off16,r4</div><div class='del'>-	lvx	v17,off16,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off32,r4</div><div class='del'>-	lvx	v17,off32,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off48,r4</div><div class='del'>-	lvx	v17,off48,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off64,r4</div><div class='del'>-	lvx	v17,off64,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off80,r4</div><div class='del'>-	lvx	v17,off80,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-	bdz	1f</div><div class='del'>-</div><div class='del'>-	lvx	v16,off96,r4</div><div class='del'>-	lvx	v17,off96,r3</div><div class='del'>-	VPERM(v16,v16,v16,byteswap)</div><div class='del'>-	VPMSUMW(v16,v16,v17)</div><div class='del'>-	vxor	v0,v0,v16</div><div class='del'>-</div><div class='del'>-	/* Now xor all the parallel chunks together */</div><div class='del'>-1:	vxor	v0,v0,v1</div><div class='del'>-	vxor	v2,v2,v3</div><div class='del'>-	vxor	v4,v4,v5</div><div class='del'>-	vxor	v6,v6,v7</div><div class='del'>-</div><div class='del'>-	vxor	v0,v0,v2</div><div class='del'>-	vxor	v4,v4,v6</div><div class='del'>-</div><div class='del'>-	vxor	v0,v0,v4</div><div class='del'>-</div><div class='del'>-.Lbarrett_reduction:</div><div class='del'>-	/* Barrett constants */</div><div class='del'>-	LOAD_REG_ADDR(r3, .barrett_constants)</div><div class='del'>-</div><div class='del'>-	lvx	const1,0,r3</div><div class='del'>-	lvx	const2,off16,r3</div><div class='del'>-</div><div class='del'>-	vsldoi	v1,v0,v0,8</div><div class='del'>-	vxor	v0,v0,v1		/* xor two 64 bit results together */</div><div class='del'>-</div><div class='del'>-#ifdef REFLECT</div><div class='del'>-	/* shift left one bit */</div><div class='del'>-	vspltisb v1,1</div><div class='del'>-	vsl	v0,v0,v1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	vand	v0,v0,mask_64bit</div><div class='del'>-#ifndef REFLECT</div><div class='del'>-	/*</div><div class='del'>-	 * Now for the Barrett reduction algorithm. The idea is to calculate q,</div><div class='del'>-	 * the multiple of our polynomial that we need to subtract. By</div><div class='del'>-	 * doing the computation 2x bits higher (ie 64 bits) and shifting the</div><div class='del'>-	 * result back down 2x bits, we round down to the nearest multiple.</div><div class='del'>-	 */</div><div class='del'>-	VPMSUMD(v1,v0,const1)	/* ma */</div><div class='del'>-	vsldoi	v1,zeroes,v1,8	/* q = floor(ma/(2^64)) */</div><div class='del'>-	VPMSUMD(v1,v1,const2)	/* qn */</div><div class='del'>-	vxor	v0,v0,v1	/* a - qn, subtraction is xor in GF(2) */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Get the result into r3. We need to shift it left 8 bytes:</div><div class='del'>-	 * V0 [ 0 1 2 X ]</div><div class='del'>-	 * V0 [ 0 X 2 3 ]</div><div class='del'>-	 */</div><div class='del'>-	vsldoi	v0,v0,zeroes,8	/* shift result into top 64 bits */</div><div class='del'>-#else</div><div class='del'>-	/*</div><div class='del'>-	 * The reflected version of Barrett reduction. Instead of bit</div><div class='del'>-	 * reflecting our data (which is expensive to do), we bit reflect our</div><div class='del'>-	 * constants and our algorithm, which means the intermediate data in</div><div class='del'>-	 * our vector registers goes from 0-63 instead of 63-0. We can reflect</div><div class='del'>-	 * the algorithm because we don't carry in mod 2 arithmetic.</div><div class='del'>-	 */</div><div class='del'>-	vand	v1,v0,mask_32bit	/* bottom 32 bits of a */</div><div class='del'>-	VPMSUMD(v1,v1,const1)		/* ma */</div><div class='del'>-	vand	v1,v1,mask_32bit	/* bottom 32bits of ma */</div><div class='del'>-	VPMSUMD(v1,v1,const2)		/* qn */</div><div class='del'>-	vxor	v0,v0,v1		/* a - qn, subtraction is xor in GF(2) */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Since we are bit reflected, the result (ie the low 32 bits) is in</div><div class='del'>-	 * the high 32 bits. We just need to shift it left 4 bytes</div><div class='del'>-	 * V0 [ 0 1 X 3 ]</div><div class='del'>-	 * V0 [ 0 X 2 3 ]</div><div class='del'>-	 */</div><div class='del'>-	vsldoi	v0,v0,zeroes,4		/* shift result into top 64 bits of */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Get it into r3 */</div><div class='del'>-	MFVRD(R3, v0)</div><div class='del'>-</div><div class='del'>-.Lout:</div><div class='del'>-	subi	r6,r1,56+10*16</div><div class='del'>-	subi	r7,r1,56+2*16</div><div class='del'>-</div><div class='del'>-	lvx	v20,0,r6</div><div class='del'>-	lvx	v21,off16,r6</div><div class='del'>-	lvx	v22,off32,r6</div><div class='del'>-	lvx	v23,off48,r6</div><div class='del'>-	lvx	v24,off64,r6</div><div class='del'>-	lvx	v25,off80,r6</div><div class='del'>-	lvx	v26,off96,r6</div><div class='del'>-	lvx	v27,off112,r6</div><div class='del'>-	lvx	v28,0,r7</div><div class='del'>-	lvx	v29,off16,r7</div><div class='del'>-</div><div class='del'>-	ld	r31,-8(r1)</div><div class='del'>-	ld	r30,-16(r1)</div><div class='del'>-	ld	r29,-24(r1)</div><div class='del'>-	ld	r28,-32(r1)</div><div class='del'>-	ld	r27,-40(r1)</div><div class='del'>-	ld	r26,-48(r1)</div><div class='del'>-	ld	r25,-56(r1)</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-.Lfirst_warm_up_done:</div><div class='del'>-	lvx	const1,0,r3</div><div class='del'>-	addi	r3,r3,16</div><div class='del'>-</div><div class='del'>-	VPMSUMD(v8,v16,const1)</div><div class='del'>-	VPMSUMD(v9,v17,const1)</div><div class='del'>-	VPMSUMD(v10,v18,const1)</div><div class='del'>-	VPMSUMD(v11,v19,const1)</div><div class='del'>-	VPMSUMD(v12,v20,const1)</div><div class='del'>-	VPMSUMD(v13,v21,const1)</div><div class='del'>-	VPMSUMD(v14,v22,const1)</div><div class='del'>-	VPMSUMD(v15,v23,const1)</div><div class='del'>-</div><div class='del'>-	b	.Lsecond_cool_down</div><div class='del'>-</div><div class='del'>-.Lshort:</div><div class='del'>-	cmpdi	r5,0</div><div class='del'>-	beq	.Lzero</div><div class='del'>-</div><div class='del'>-	LOAD_REG_ADDR(r3, .short_constants)</div><div class='del'>-</div><div class='del'>-	/* Calculate where in the constant table we need to start */</div><div class='del'>-	subfic	r6,r5,256</div><div class='del'>-	add	r3,r3,r6</div><div class='del'>-</div><div class='del'>-	/* How many 16 byte chunks? */</div><div class='del'>-	srdi	r7,r5,4</div><div class='del'>-	mtctr	r7</div><div class='del'>-</div><div class='del'>-	vxor	v19,v19,v19</div><div class='del'>-	vxor	v20,v20,v20</div><div class='del'>-</div><div class='del'>-	lvx	v0,0,r4</div><div class='del'>-	lvx	v16,0,r3</div><div class='del'>-	VPERM(v0,v0,v16,byteswap)</div><div class='del'>-	vxor	v0,v0,v8	/* xor in initial value */</div><div class='del'>-	VPMSUMW(v0,v0,v16)</div><div class='del'>-	bdz	.Lv0</div><div class='del'>-</div><div class='del'>-	lvx	v1,off16,r4</div><div class='del'>-	lvx	v17,off16,r3</div><div class='del'>-	VPERM(v1,v1,v17,byteswap)</div><div class='del'>-	VPMSUMW(v1,v1,v17)</div><div class='del'>-	bdz	.Lv1</div><div class='del'>-</div><div class='del'>-	lvx	v2,off32,r4</div><div class='del'>-	lvx	v16,off32,r3</div><div class='del'>-	VPERM(v2,v2,v16,byteswap)</div><div class='del'>-	VPMSUMW(v2,v2,v16)</div><div class='del'>-	bdz	.Lv2</div><div class='del'>-</div><div class='del'>-	lvx	v3,off48,r4</div><div class='del'>-	lvx	v17,off48,r3</div><div class='del'>-	VPERM(v3,v3,v17,byteswap)</div><div class='del'>-	VPMSUMW(v3,v3,v17)</div><div class='del'>-	bdz	.Lv3</div><div class='del'>-</div><div class='del'>-	lvx	v4,off64,r4</div><div class='del'>-	lvx	v16,off64,r3</div><div class='del'>-	VPERM(v4,v4,v16,byteswap)</div><div class='del'>-	VPMSUMW(v4,v4,v16)</div><div class='del'>-	bdz	.Lv4</div><div class='del'>-</div><div class='del'>-	lvx	v5,off80,r4</div><div class='del'>-	lvx	v17,off80,r3</div><div class='del'>-	VPERM(v5,v5,v17,byteswap)</div><div class='del'>-	VPMSUMW(v5,v5,v17)</div><div class='del'>-	bdz	.Lv5</div><div class='del'>-</div><div class='del'>-	lvx	v6,off96,r4</div><div class='del'>-	lvx	v16,off96,r3</div><div class='del'>-	VPERM(v6,v6,v16,byteswap)</div><div class='del'>-	VPMSUMW(v6,v6,v16)</div><div class='del'>-	bdz	.Lv6</div><div class='del'>-</div><div class='del'>-	lvx	v7,off112,r4</div><div class='del'>-	lvx	v17,off112,r3</div><div class='del'>-	VPERM(v7,v7,v17,byteswap)</div><div class='del'>-	VPMSUMW(v7,v7,v17)</div><div class='del'>-	bdz	.Lv7</div><div class='del'>-</div><div class='del'>-	addi	r3,r3,128</div><div class='del'>-	addi	r4,r4,128</div><div class='del'>-</div><div class='del'>-	lvx	v8,0,r4</div><div class='del'>-	lvx	v16,0,r3</div><div class='del'>-	VPERM(v8,v8,v16,byteswap)</div><div class='del'>-	VPMSUMW(v8,v8,v16)</div><div class='del'>-	bdz	.Lv8</div><div class='del'>-</div><div class='del'>-	lvx	v9,off16,r4</div><div class='del'>-	lvx	v17,off16,r3</div><div class='del'>-	VPERM(v9,v9,v17,byteswap)</div><div class='del'>-	VPMSUMW(v9,v9,v17)</div><div class='del'>-	bdz	.Lv9</div><div class='del'>-</div><div class='del'>-	lvx	v10,off32,r4</div><div class='del'>-	lvx	v16,off32,r3</div><div class='del'>-	VPERM(v10,v10,v16,byteswap)</div><div class='del'>-	VPMSUMW(v10,v10,v16)</div><div class='del'>-	bdz	.Lv10</div><div class='del'>-</div><div class='del'>-	lvx	v11,off48,r4</div><div class='del'>-	lvx	v17,off48,r3</div><div class='del'>-	VPERM(v11,v11,v17,byteswap)</div><div class='del'>-	VPMSUMW(v11,v11,v17)</div><div class='del'>-	bdz	.Lv11</div><div class='del'>-</div><div class='del'>-	lvx	v12,off64,r4</div><div class='del'>-	lvx	v16,off64,r3</div><div class='del'>-	VPERM(v12,v12,v16,byteswap)</div><div class='del'>-	VPMSUMW(v12,v12,v16)</div><div class='del'>-	bdz	.Lv12</div><div class='del'>-</div><div class='del'>-	lvx	v13,off80,r4</div><div class='del'>-	lvx	v17,off80,r3</div><div class='del'>-	VPERM(v13,v13,v17,byteswap)</div><div class='del'>-	VPMSUMW(v13,v13,v17)</div><div class='del'>-	bdz	.Lv13</div><div class='del'>-</div><div class='del'>-	lvx	v14,off96,r4</div><div class='del'>-	lvx	v16,off96,r3</div><div class='del'>-	VPERM(v14,v14,v16,byteswap)</div><div class='del'>-	VPMSUMW(v14,v14,v16)</div><div class='del'>-	bdz	.Lv14</div><div class='del'>-</div><div class='del'>-	lvx	v15,off112,r4</div><div class='del'>-	lvx	v17,off112,r3</div><div class='del'>-	VPERM(v15,v15,v17,byteswap)</div><div class='del'>-	VPMSUMW(v15,v15,v17)</div><div class='del'>-</div><div class='del'>-.Lv15:	vxor	v19,v19,v15</div><div class='del'>-.Lv14:	vxor	v20,v20,v14</div><div class='del'>-.Lv13:	vxor	v19,v19,v13</div><div class='del'>-.Lv12:	vxor	v20,v20,v12</div><div class='del'>-.Lv11:	vxor	v19,v19,v11</div><div class='del'>-.Lv10:	vxor	v20,v20,v10</div><div class='del'>-.Lv9:	vxor	v19,v19,v9</div><div class='del'>-.Lv8:	vxor	v20,v20,v8</div><div class='del'>-.Lv7:	vxor	v19,v19,v7</div><div class='del'>-.Lv6:	vxor	v20,v20,v6</div><div class='del'>-.Lv5:	vxor	v19,v19,v5</div><div class='del'>-.Lv4:	vxor	v20,v20,v4</div><div class='del'>-.Lv3:	vxor	v19,v19,v3</div><div class='del'>-.Lv2:	vxor	v20,v20,v2</div><div class='del'>-.Lv1:	vxor	v19,v19,v1</div><div class='del'>-.Lv0:	vxor	v20,v20,v0</div><div class='del'>-</div><div class='del'>-	vxor	v0,v19,v20</div><div class='del'>-</div><div class='del'>-	b	.Lbarrett_reduction</div><div class='del'>-</div><div class='del'>-.Lzero:</div><div class='del'>-	mr	r3,r10</div><div class='del'>-	b	.Lout</div><div class='del'>-</div><div class='del'>-FUNC_END(CRC_FUNCTION_NAME)</div><div class='head'>diff --git a/arch/powerpc/crypto/crc32c-vpmsum_asm.S b/arch/powerpc/crypto/crc32c-vpmsum_asm.S<br/>deleted file mode 100644<br/>index bf442004ea1f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crc32c-vpmsum_asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32c-vpmsum_asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,842 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Calculate a crc32c with vpmsum acceleration</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Anton Blanchard &lt;anton@au.ibm.com&gt;, IBM</div><div class='del'>- */</div><div class='del'>-	.section	.rodata</div><div class='del'>-.balign 16</div><div class='del'>-</div><div class='del'>-.byteswap_constant:</div><div class='del'>-	/* byte reverse permute constant */</div><div class='del'>-	.octa 0x0F0E0D0C0B0A09080706050403020100</div><div class='del'>-</div><div class='del'>-.constants:</div><div class='del'>-</div><div class='del'>-	/* Reduce 262144 kbits to 1024 bits */</div><div class='del'>-	/* x^261120 mod p(x)` &lt;&lt; 1, x^261184 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b6ca9e20000000009c37c408</div><div class='del'>-</div><div class='del'>-	/* x^260096 mod p(x)` &lt;&lt; 1, x^260160 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000350249a800000001b51df26c</div><div class='del'>-</div><div class='del'>-	/* x^259072 mod p(x)` &lt;&lt; 1, x^259136 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001862dac54000000000724b9d0</div><div class='del'>-</div><div class='del'>-	/* x^258048 mod p(x)` &lt;&lt; 1, x^258112 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d87fb48c00000001c00532fe</div><div class='del'>-</div><div class='del'>-	/* x^257024 mod p(x)` &lt;&lt; 1, x^257088 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f39b699e00000000f05a9362</div><div class='del'>-</div><div class='del'>-	/* x^256000 mod p(x)` &lt;&lt; 1, x^256064 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000101da11b400000001e1007970</div><div class='del'>-</div><div class='del'>-	/* x^254976 mod p(x)` &lt;&lt; 1, x^255040 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001cab571e000000000a57366ee</div><div class='del'>-</div><div class='del'>-	/* x^253952 mod p(x)` &lt;&lt; 1, x^254016 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000c7020cfe0000000192011284</div><div class='del'>-</div><div class='del'>-	/* x^252928 mod p(x)` &lt;&lt; 1, x^252992 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000cdaed1ae0000000162716d9a</div><div class='del'>-</div><div class='del'>-	/* x^251904 mod p(x)` &lt;&lt; 1, x^251968 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001e804effc00000000cd97ecde</div><div class='del'>-</div><div class='del'>-	/* x^250880 mod p(x)` &lt;&lt; 1, x^250944 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000077c3ea3a0000000058812bc0</div><div class='del'>-</div><div class='del'>-	/* x^249856 mod p(x)` &lt;&lt; 1, x^249920 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000068df31b40000000088b8c12e</div><div class='del'>-</div><div class='del'>-	/* x^248832 mod p(x)` &lt;&lt; 1, x^248896 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b059b6c200000001230b234c</div><div class='del'>-</div><div class='del'>-	/* x^247808 mod p(x)` &lt;&lt; 1, x^247872 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000145fb8ed800000001120b416e</div><div class='del'>-</div><div class='del'>-	/* x^246784 mod p(x)` &lt;&lt; 1, x^246848 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000cbc0916800000001974aecb0</div><div class='del'>-</div><div class='del'>-	/* x^245760 mod p(x)` &lt;&lt; 1, x^245824 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000005ceeedc2000000008ee3f226</div><div class='del'>-</div><div class='del'>-	/* x^244736 mod p(x)` &lt;&lt; 1, x^244800 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000047d74e8600000001089aba9a</div><div class='del'>-</div><div class='del'>-	/* x^243712 mod p(x)` &lt;&lt; 1, x^243776 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001407e9e220000000065113872</div><div class='del'>-</div><div class='del'>-	/* x^242688 mod p(x)` &lt;&lt; 1, x^242752 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001da967bda000000005c07ec10</div><div class='del'>-</div><div class='del'>-	/* x^241664 mod p(x)` &lt;&lt; 1, x^241728 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000006c8983680000000187590924</div><div class='del'>-</div><div class='del'>-	/* x^240640 mod p(x)` &lt;&lt; 1, x^240704 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000f2d14c9800000000e35da7c6</div><div class='del'>-</div><div class='del'>-	/* x^239616 mod p(x)` &lt;&lt; 1, x^239680 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001993c6ad4000000000415855a</div><div class='del'>-</div><div class='del'>-	/* x^238592 mod p(x)` &lt;&lt; 1, x^238656 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000014683d1ac0000000073617758</div><div class='del'>-</div><div class='del'>-	/* x^237568 mod p(x)` &lt;&lt; 1, x^237632 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001a7c93e6c0000000176021d28</div><div class='del'>-</div><div class='del'>-	/* x^236544 mod p(x)` &lt;&lt; 1, x^236608 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000010211e90a00000001c358fd0a</div><div class='del'>-</div><div class='del'>-	/* x^235520 mod p(x)` &lt;&lt; 1, x^235584 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001119403e00000001ff7a2c18</div><div class='del'>-</div><div class='del'>-	/* x^234496 mod p(x)` &lt;&lt; 1, x^234560 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001c3261aa00000000f2d9f7e4</div><div class='del'>-</div><div class='del'>-	/* x^233472 mod p(x)` &lt;&lt; 1, x^233536 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000014e37a634000000016cf1f9c8</div><div class='del'>-</div><div class='del'>-	/* x^232448 mod p(x)` &lt;&lt; 1, x^232512 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000073786c0c000000010af9279a</div><div class='del'>-</div><div class='del'>-	/* x^231424 mod p(x)` &lt;&lt; 1, x^231488 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011dc037f80000000004f101e8</div><div class='del'>-</div><div class='del'>-	/* x^230400 mod p(x)` &lt;&lt; 1, x^230464 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000031433dfc0000000070bcf184</div><div class='del'>-</div><div class='del'>-	/* x^229376 mod p(x)` &lt;&lt; 1, x^229440 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000009cde8348000000000a8de642</div><div class='del'>-</div><div class='del'>-	/* x^228352 mod p(x)` &lt;&lt; 1, x^228416 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000038d3c2a60000000062ea130c</div><div class='del'>-</div><div class='del'>-	/* x^227328 mod p(x)` &lt;&lt; 1, x^227392 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011b25f26000000001eb31cbb2</div><div class='del'>-</div><div class='del'>-	/* x^226304 mod p(x)` &lt;&lt; 1, x^226368 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001629e6f00000000170783448</div><div class='del'>-</div><div class='del'>-	/* x^225280 mod p(x)` &lt;&lt; 1, x^225344 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000160838b4c00000001a684b4c6</div><div class='del'>-</div><div class='del'>-	/* x^224256 mod p(x)` &lt;&lt; 1, x^224320 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000007a44011c00000000253ca5b4</div><div class='del'>-</div><div class='del'>-	/* x^223232 mod p(x)` &lt;&lt; 1, x^223296 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000226f417a0000000057b4b1e2</div><div class='del'>-</div><div class='del'>-	/* x^222208 mod p(x)` &lt;&lt; 1, x^222272 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000045eb2eb400000000b6bd084c</div><div class='del'>-</div><div class='del'>-	/* x^221184 mod p(x)` &lt;&lt; 1, x^221248 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000014459d70c0000000123c2d592</div><div class='del'>-</div><div class='del'>-	/* x^220160 mod p(x)` &lt;&lt; 1, x^220224 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d406ed8200000000159dafce</div><div class='del'>-</div><div class='del'>-	/* x^219136 mod p(x)` &lt;&lt; 1, x^219200 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000160c8e1a80000000127e1a64e</div><div class='del'>-</div><div class='del'>-	/* x^218112 mod p(x)` &lt;&lt; 1, x^218176 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000027ba80980000000056860754</div><div class='del'>-</div><div class='del'>-	/* x^217088 mod p(x)` &lt;&lt; 1, x^217152 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000006d92d01800000001e661aae8</div><div class='del'>-</div><div class='del'>-	/* x^216064 mod p(x)` &lt;&lt; 1, x^216128 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000012ed7e3f200000000f82c6166</div><div class='del'>-</div><div class='del'>-	/* x^215040 mod p(x)` &lt;&lt; 1, x^215104 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000002dc8778800000000c4f9c7ae</div><div class='del'>-</div><div class='del'>-	/* x^214016 mod p(x)` &lt;&lt; 1, x^214080 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000018240bb80000000074203d20</div><div class='del'>-</div><div class='del'>-	/* x^212992 mod p(x)` &lt;&lt; 1, x^213056 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001ad381580000000198173052</div><div class='del'>-</div><div class='del'>-	/* x^211968 mod p(x)` &lt;&lt; 1, x^212032 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001396b78f200000001ce8aba54</div><div class='del'>-</div><div class='del'>-	/* x^210944 mod p(x)` &lt;&lt; 1, x^211008 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011a68133400000001850d5d94</div><div class='del'>-</div><div class='del'>-	/* x^209920 mod p(x)` &lt;&lt; 1, x^209984 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000012104732e00000001d609239c</div><div class='del'>-</div><div class='del'>-	/* x^208896 mod p(x)` &lt;&lt; 1, x^208960 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000a140d90c000000001595f048</div><div class='del'>-</div><div class='del'>-	/* x^207872 mod p(x)` &lt;&lt; 1, x^207936 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b7215eda0000000042ccee08</div><div class='del'>-</div><div class='del'>-	/* x^206848 mod p(x)` &lt;&lt; 1, x^206912 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001aaf1df3c000000010a389d74</div><div class='del'>-</div><div class='del'>-	/* x^205824 mod p(x)` &lt;&lt; 1, x^205888 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000029d15b8a000000012a840da6</div><div class='del'>-</div><div class='del'>-	/* x^204800 mod p(x)` &lt;&lt; 1, x^204864 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000f1a96922000000001d181c0c</div><div class='del'>-</div><div class='del'>-	/* x^203776 mod p(x)` &lt;&lt; 1, x^203840 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001ac80d03c0000000068b7d1f6</div><div class='del'>-</div><div class='del'>-	/* x^202752 mod p(x)` &lt;&lt; 1, x^202816 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000f11d56a000000005b0f14fc</div><div class='del'>-</div><div class='del'>-	/* x^201728 mod p(x)` &lt;&lt; 1, x^201792 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f1c022a20000000179e9e730</div><div class='del'>-</div><div class='del'>-	/* x^200704 mod p(x)` &lt;&lt; 1, x^200768 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000173d00ae200000001ce1368d6</div><div class='del'>-</div><div class='del'>-	/* x^199680 mod p(x)` &lt;&lt; 1, x^199744 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d4ffe4ac0000000112c3a84c</div><div class='del'>-</div><div class='del'>-	/* x^198656 mod p(x)` &lt;&lt; 1, x^198720 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016edc5ae400000000de940fee</div><div class='del'>-</div><div class='del'>-	/* x^197632 mod p(x)` &lt;&lt; 1, x^197696 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f1a0214000000000fe896b7e</div><div class='del'>-</div><div class='del'>-	/* x^196608 mod p(x)` &lt;&lt; 1, x^196672 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ca0b28a000000001f797431c</div><div class='del'>-</div><div class='del'>-	/* x^195584 mod p(x)` &lt;&lt; 1, x^195648 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001928e30a20000000053e989ba</div><div class='del'>-</div><div class='del'>-	/* x^194560 mod p(x)` &lt;&lt; 1, x^194624 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000097b1b002000000003920cd16</div><div class='del'>-</div><div class='del'>-	/* x^193536 mod p(x)` &lt;&lt; 1, x^193600 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b15bf90600000001e6f579b8</div><div class='del'>-</div><div class='del'>-	/* x^192512 mod p(x)` &lt;&lt; 1, x^192576 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000411c5d52000000007493cb0a</div><div class='del'>-</div><div class='del'>-	/* x^191488 mod p(x)` &lt;&lt; 1, x^191552 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001c36f330000000001bdd376d8</div><div class='del'>-</div><div class='del'>-	/* x^190464 mod p(x)` &lt;&lt; 1, x^190528 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001119227e0000000016badfee6</div><div class='del'>-</div><div class='del'>-	/* x^189440 mod p(x)` &lt;&lt; 1, x^189504 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000114d47020000000071de5c58</div><div class='del'>-</div><div class='del'>-	/* x^188416 mod p(x)` &lt;&lt; 1, x^188480 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000458b5b9800000000453f317c</div><div class='del'>-</div><div class='del'>-	/* x^187392 mod p(x)` &lt;&lt; 1, x^187456 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000012e31fb8e0000000121675cce</div><div class='del'>-</div><div class='del'>-	/* x^186368 mod p(x)` &lt;&lt; 1, x^186432 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000005cf619d800000001f409ee92</div><div class='del'>-</div><div class='del'>-	/* x^185344 mod p(x)` &lt;&lt; 1, x^185408 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000063f4d8b200000000f36b9c88</div><div class='del'>-</div><div class='del'>-	/* x^184320 mod p(x)` &lt;&lt; 1, x^184384 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000004138dc8a0000000036b398f4</div><div class='del'>-</div><div class='del'>-	/* x^183296 mod p(x)` &lt;&lt; 1, x^183360 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d29ee8e000000001748f9adc</div><div class='del'>-</div><div class='del'>-	/* x^182272 mod p(x)` &lt;&lt; 1, x^182336 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000006a08ace800000001be94ec00</div><div class='del'>-</div><div class='del'>-	/* x^181248 mod p(x)` &lt;&lt; 1, x^181312 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000127d4201000000000b74370d6</div><div class='del'>-</div><div class='del'>-	/* x^180224 mod p(x)` &lt;&lt; 1, x^180288 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000019d76b6200000001174d0b98</div><div class='del'>-</div><div class='del'>-	/* x^179200 mod p(x)` &lt;&lt; 1, x^179264 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b1471f6e00000000befc06a4</div><div class='del'>-</div><div class='del'>-	/* x^178176 mod p(x)` &lt;&lt; 1, x^178240 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f64c19cc00000001ae125288</div><div class='del'>-</div><div class='del'>-	/* x^177152 mod p(x)` &lt;&lt; 1, x^177216 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000003c0ea00000000095c19b34</div><div class='del'>-</div><div class='del'>-	/* x^176128 mod p(x)` &lt;&lt; 1, x^176192 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000014d73abf600000001a78496f2</div><div class='del'>-</div><div class='del'>-	/* x^175104 mod p(x)` &lt;&lt; 1, x^175168 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001620eb84400000001ac5390a0</div><div class='del'>-</div><div class='del'>-	/* x^174080 mod p(x)` &lt;&lt; 1, x^174144 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000147655048000000002a80ed6e</div><div class='del'>-</div><div class='del'>-	/* x^173056 mod p(x)` &lt;&lt; 1, x^173120 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000067b5077e00000001fa9b0128</div><div class='del'>-</div><div class='del'>-	/* x^172032 mod p(x)` &lt;&lt; 1, x^172096 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000010ffe20600000001ea94929e</div><div class='del'>-</div><div class='del'>-	/* x^171008 mod p(x)` &lt;&lt; 1, x^171072 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000fee8f1e0000000125f4305c</div><div class='del'>-</div><div class='del'>-	/* x^169984 mod p(x)` &lt;&lt; 1, x^170048 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001da26fbae00000001471e2002</div><div class='del'>-</div><div class='del'>-	/* x^168960 mod p(x)` &lt;&lt; 1, x^169024 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b3a8bd880000000132d2253a</div><div class='del'>-</div><div class='del'>-	/* x^167936 mod p(x)` &lt;&lt; 1, x^168000 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000e8f3898e00000000f26b3592</div><div class='del'>-</div><div class='del'>-	/* x^166912 mod p(x)` &lt;&lt; 1, x^166976 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b0d0d28c00000000bc8b67b0</div><div class='del'>-</div><div class='del'>-	/* x^165888 mod p(x)` &lt;&lt; 1, x^165952 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000030f2a798000000013a826ef2</div><div class='del'>-</div><div class='del'>-	/* x^164864 mod p(x)` &lt;&lt; 1, x^164928 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000fba10020000000081482c84</div><div class='del'>-</div><div class='del'>-	/* x^163840 mod p(x)` &lt;&lt; 1, x^163904 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000bdb9bd7200000000e77307c2</div><div class='del'>-</div><div class='del'>-	/* x^162816 mod p(x)` &lt;&lt; 1, x^162880 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000075d3bf5a00000000d4a07ec8</div><div class='del'>-</div><div class='del'>-	/* x^161792 mod p(x)` &lt;&lt; 1, x^161856 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ef1f98a00000000017102100</div><div class='del'>-</div><div class='del'>-	/* x^160768 mod p(x)` &lt;&lt; 1, x^160832 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000689c760200000000db406486</div><div class='del'>-</div><div class='del'>-	/* x^159744 mod p(x)` &lt;&lt; 1, x^159808 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016d5fa5fe0000000192db7f88</div><div class='del'>-</div><div class='del'>-	/* x^158720 mod p(x)` &lt;&lt; 1, x^158784 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d0d2b9ca000000018bf67b1e</div><div class='del'>-</div><div class='del'>-	/* x^157696 mod p(x)` &lt;&lt; 1, x^157760 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000041e7b470000000007c09163e</div><div class='del'>-</div><div class='del'>-	/* x^156672 mod p(x)` &lt;&lt; 1, x^156736 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001cbb6495e000000000adac060</div><div class='del'>-</div><div class='del'>-	/* x^155648 mod p(x)` &lt;&lt; 1, x^155712 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000010052a0b000000000bd8316ae</div><div class='del'>-</div><div class='del'>-	/* x^154624 mod p(x)` &lt;&lt; 1, x^154688 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d8effb5c000000019f09ab54</div><div class='del'>-</div><div class='del'>-	/* x^153600 mod p(x)` &lt;&lt; 1, x^153664 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d969853c0000000125155542</div><div class='del'>-</div><div class='del'>-	/* x^152576 mod p(x)` &lt;&lt; 1, x^152640 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000523ccce2000000018fdb5882</div><div class='del'>-</div><div class='del'>-	/* x^151552 mod p(x)` &lt;&lt; 1, x^151616 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001e2436bc00000000e794b3f4</div><div class='del'>-</div><div class='del'>-	/* x^150528 mod p(x)` &lt;&lt; 1, x^150592 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ddd1c3a2000000016f9bb022</div><div class='del'>-</div><div class='del'>-	/* x^149504 mod p(x)` &lt;&lt; 1, x^149568 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000019fcfe3800000000290c9978</div><div class='del'>-</div><div class='del'>-	/* x^148480 mod p(x)` &lt;&lt; 1, x^148544 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001ce95db640000000083c0f350</div><div class='del'>-</div><div class='del'>-	/* x^147456 mod p(x)` &lt;&lt; 1, x^147520 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000af5828060000000173ea6628</div><div class='del'>-</div><div class='del'>-	/* x^146432 mod p(x)` &lt;&lt; 1, x^146496 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001006388f600000001c8b4e00a</div><div class='del'>-</div><div class='del'>-	/* x^145408 mod p(x)` &lt;&lt; 1, x^145472 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000179eca00a00000000de95d6aa</div><div class='del'>-</div><div class='del'>-	/* x^144384 mod p(x)` &lt;&lt; 1, x^144448 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000122410a6a000000010b7f7248</div><div class='del'>-</div><div class='del'>-	/* x^143360 mod p(x)` &lt;&lt; 1, x^143424 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000004288e87c00000001326e3a06</div><div class='del'>-</div><div class='del'>-	/* x^142336 mod p(x)` &lt;&lt; 1, x^142400 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016c5490da00000000bb62c2e6</div><div class='del'>-</div><div class='del'>-	/* x^141312 mod p(x)` &lt;&lt; 1, x^141376 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000d1c71f6e0000000156a4b2c2</div><div class='del'>-</div><div class='del'>-	/* x^140288 mod p(x)` &lt;&lt; 1, x^140352 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b4ce08a6000000011dfe763a</div><div class='del'>-</div><div class='del'>-	/* x^139264 mod p(x)` &lt;&lt; 1, x^139328 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001466ba60c000000007bcca8e2</div><div class='del'>-</div><div class='del'>-	/* x^138240 mod p(x)` &lt;&lt; 1, x^138304 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f6c488a40000000186118faa</div><div class='del'>-</div><div class='del'>-	/* x^137216 mod p(x)` &lt;&lt; 1, x^137280 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000013bfb06820000000111a65a88</div><div class='del'>-</div><div class='del'>-	/* x^136192 mod p(x)` &lt;&lt; 1, x^136256 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000690e9e54000000003565e1c4</div><div class='del'>-</div><div class='del'>-	/* x^135168 mod p(x)` &lt;&lt; 1, x^135232 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000281346b6000000012ed02a82</div><div class='del'>-</div><div class='del'>-	/* x^134144 mod p(x)` &lt;&lt; 1, x^134208 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000015646402400000000c486ecfc</div><div class='del'>-</div><div class='del'>-	/* x^133120 mod p(x)` &lt;&lt; 1, x^133184 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016063a8dc0000000001b951b2</div><div class='del'>-</div><div class='del'>-	/* x^132096 mod p(x)` &lt;&lt; 1, x^132160 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000116a663620000000048143916</div><div class='del'>-</div><div class='del'>-	/* x^131072 mod p(x)` &lt;&lt; 1, x^131136 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000017e8aa4d200000001dc2ae124</div><div class='del'>-</div><div class='del'>-	/* x^130048 mod p(x)` &lt;&lt; 1, x^130112 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001728eb10c00000001416c58d6</div><div class='del'>-</div><div class='del'>-	/* x^129024 mod p(x)` &lt;&lt; 1, x^129088 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b08fd7fa00000000a479744a</div><div class='del'>-</div><div class='del'>-	/* x^128000 mod p(x)` &lt;&lt; 1, x^128064 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001092a16e80000000096ca3a26</div><div class='del'>-</div><div class='del'>-	/* x^126976 mod p(x)` &lt;&lt; 1, x^127040 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000a505637c00000000ff223d4e</div><div class='del'>-</div><div class='del'>-	/* x^125952 mod p(x)` &lt;&lt; 1, x^126016 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000d94869b2000000010e84da42</div><div class='del'>-</div><div class='del'>-	/* x^124928 mod p(x)` &lt;&lt; 1, x^124992 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001c8b203ae00000001b61ba3d0</div><div class='del'>-</div><div class='del'>-	/* x^123904 mod p(x)` &lt;&lt; 1, x^123968 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000005704aea000000000680f2de8</div><div class='del'>-</div><div class='del'>-	/* x^122880 mod p(x)` &lt;&lt; 1, x^122944 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000012e295fa2000000008772a9a8</div><div class='del'>-</div><div class='del'>-	/* x^121856 mod p(x)` &lt;&lt; 1, x^121920 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011d0908bc0000000155f295bc</div><div class='del'>-</div><div class='del'>-	/* x^120832 mod p(x)` &lt;&lt; 1, x^120896 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000193ed97ea00000000595f9282</div><div class='del'>-</div><div class='del'>-	/* x^119808 mod p(x)` &lt;&lt; 1, x^119872 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000013a0f1c520000000164b1c25a</div><div class='del'>-</div><div class='del'>-	/* x^118784 mod p(x)` &lt;&lt; 1, x^118848 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000010c2c40c000000000fbd67c50</div><div class='del'>-</div><div class='del'>-	/* x^117760 mod p(x)` &lt;&lt; 1, x^117824 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ff6fac3e0000000096076268</div><div class='del'>-</div><div class='del'>-	/* x^116736 mod p(x)` &lt;&lt; 1, x^116800 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000017b3609c000000001d288e4cc</div><div class='del'>-</div><div class='del'>-	/* x^115712 mod p(x)` &lt;&lt; 1, x^115776 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000088c8c92200000001eaac1bdc</div><div class='del'>-</div><div class='del'>-	/* x^114688 mod p(x)` &lt;&lt; 1, x^114752 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001751baae600000001f1ea39e2</div><div class='del'>-</div><div class='del'>-	/* x^113664 mod p(x)` &lt;&lt; 1, x^113728 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000010795297200000001eb6506fc</div><div class='del'>-</div><div class='del'>-	/* x^112640 mod p(x)` &lt;&lt; 1, x^112704 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000162b00abe000000010f806ffe</div><div class='del'>-</div><div class='del'>-	/* x^111616 mod p(x)` &lt;&lt; 1, x^111680 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000d7b404c000000010408481e</div><div class='del'>-</div><div class='del'>-	/* x^110592 mod p(x)` &lt;&lt; 1, x^110656 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000763b13d40000000188260534</div><div class='del'>-</div><div class='del'>-	/* x^109568 mod p(x)` &lt;&lt; 1, x^109632 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000f6dc22d80000000058fc73e0</div><div class='del'>-</div><div class='del'>-	/* x^108544 mod p(x)` &lt;&lt; 1, x^108608 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000007daae06000000000391c59b8</div><div class='del'>-</div><div class='del'>-	/* x^107520 mod p(x)` &lt;&lt; 1, x^107584 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000013359ab7c000000018b638400</div><div class='del'>-</div><div class='del'>-	/* x^106496 mod p(x)` &lt;&lt; 1, x^106560 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000008add438a000000011738f5c4</div><div class='del'>-</div><div class='del'>-	/* x^105472 mod p(x)` &lt;&lt; 1, x^105536 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001edbefdea000000008cf7c6da</div><div class='del'>-</div><div class='del'>-	/* x^104448 mod p(x)` &lt;&lt; 1, x^104512 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000004104e0f800000001ef97fb16</div><div class='del'>-</div><div class='del'>-	/* x^103424 mod p(x)` &lt;&lt; 1, x^103488 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b48a82220000000102130e20</div><div class='del'>-</div><div class='del'>-	/* x^102400 mod p(x)` &lt;&lt; 1, x^102464 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001bcb4684400000000db968898</div><div class='del'>-</div><div class='del'>-	/* x^101376 mod p(x)` &lt;&lt; 1, x^101440 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000013293ce0a00000000b5047b5e</div><div class='del'>-</div><div class='del'>-	/* x^100352 mod p(x)` &lt;&lt; 1, x^100416 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001710d0844000000010b90fdb2</div><div class='del'>-</div><div class='del'>-	/* x^99328 mod p(x)` &lt;&lt; 1, x^99392 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000117907f6e000000004834a32e</div><div class='del'>-</div><div class='del'>-	/* x^98304 mod p(x)` &lt;&lt; 1, x^98368 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000087ddf93e0000000059c8f2b0</div><div class='del'>-</div><div class='del'>-	/* x^97280 mod p(x)` &lt;&lt; 1, x^97344 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000005970e9b00000000122cec508</div><div class='del'>-</div><div class='del'>-	/* x^96256 mod p(x)` &lt;&lt; 1, x^96320 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000185b2b7d0000000000a330cda</div><div class='del'>-</div><div class='del'>-	/* x^95232 mod p(x)` &lt;&lt; 1, x^95296 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001dcee0efc000000014a47148c</div><div class='del'>-</div><div class='del'>-	/* x^94208 mod p(x)` &lt;&lt; 1, x^94272 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000030da27220000000042c61cb8</div><div class='del'>-</div><div class='del'>-	/* x^93184 mod p(x)` &lt;&lt; 1, x^93248 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000012f925a180000000012fe6960</div><div class='del'>-</div><div class='del'>-	/* x^92160 mod p(x)` &lt;&lt; 1, x^92224 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000dd2e357c00000000dbda2c20</div><div class='del'>-</div><div class='del'>-	/* x^91136 mod p(x)` &lt;&lt; 1, x^91200 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000071c80de000000011122410c</div><div class='del'>-</div><div class='del'>-	/* x^90112 mod p(x)` &lt;&lt; 1, x^90176 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011513140a00000000977b2070</div><div class='del'>-</div><div class='del'>-	/* x^89088 mod p(x)` &lt;&lt; 1, x^89152 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001df876e8e000000014050438e</div><div class='del'>-</div><div class='del'>-	/* x^88064 mod p(x)` &lt;&lt; 1, x^88128 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000015f81d6ce0000000147c840e8</div><div class='del'>-</div><div class='del'>-	/* x^87040 mod p(x)` &lt;&lt; 1, x^87104 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000019dd94dbe00000001cc7c88ce</div><div class='del'>-</div><div class='del'>-	/* x^86016 mod p(x)` &lt;&lt; 1, x^86080 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001373d206e00000001476b35a4</div><div class='del'>-</div><div class='del'>-	/* x^84992 mod p(x)` &lt;&lt; 1, x^85056 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000668ccade000000013d52d508</div><div class='del'>-</div><div class='del'>-	/* x^83968 mod p(x)` &lt;&lt; 1, x^84032 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b192d268000000008e4be32e</div><div class='del'>-</div><div class='del'>-	/* x^82944 mod p(x)` &lt;&lt; 1, x^83008 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000e30f3a7800000000024120fe</div><div class='del'>-</div><div class='del'>-	/* x^81920 mod p(x)` &lt;&lt; 1, x^81984 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000010ef1f7bc00000000ddecddb4</div><div class='del'>-</div><div class='del'>-	/* x^80896 mod p(x)` &lt;&lt; 1, x^80960 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001f5ac738000000000d4d403bc</div><div class='del'>-</div><div class='del'>-	/* x^79872 mod p(x)` &lt;&lt; 1, x^79936 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011822ea7000000001734b89aa</div><div class='del'>-</div><div class='del'>-	/* x^78848 mod p(x)` &lt;&lt; 1, x^78912 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000c3a33848000000010e7a58d6</div><div class='del'>-</div><div class='del'>-	/* x^77824 mod p(x)` &lt;&lt; 1, x^77888 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001bd151c2400000001f9f04e9c</div><div class='del'>-</div><div class='del'>-	/* x^76800 mod p(x)` &lt;&lt; 1, x^76864 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000056002d7600000000b692225e</div><div class='del'>-</div><div class='del'>-	/* x^75776 mod p(x)` &lt;&lt; 1, x^75840 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000014657c4f4000000019b8d3f3e</div><div class='del'>-</div><div class='del'>-	/* x^74752 mod p(x)` &lt;&lt; 1, x^74816 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000113742d7c00000001a874f11e</div><div class='del'>-</div><div class='del'>-	/* x^73728 mod p(x)` &lt;&lt; 1, x^73792 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000019c5920ba000000010d5a4254</div><div class='del'>-</div><div class='del'>-	/* x^72704 mod p(x)` &lt;&lt; 1, x^72768 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000005216d2d600000000bbb2f5d6</div><div class='del'>-</div><div class='del'>-	/* x^71680 mod p(x)` &lt;&lt; 1, x^71744 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000136f5ad8a0000000179cc0e36</div><div class='del'>-</div><div class='del'>-	/* x^70656 mod p(x)` &lt;&lt; 1, x^70720 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000018b07beb600000001dca1da4a</div><div class='del'>-</div><div class='del'>-	/* x^69632 mod p(x)` &lt;&lt; 1, x^69696 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000db1e93b000000000feb1a192</div><div class='del'>-</div><div class='del'>-	/* x^68608 mod p(x)` &lt;&lt; 1, x^68672 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000b96fa3a00000000d1eeedd6</div><div class='del'>-</div><div class='del'>-	/* x^67584 mod p(x)` &lt;&lt; 1, x^67648 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d9968af0000000008fad9bb4</div><div class='del'>-</div><div class='del'>-	/* x^66560 mod p(x)` &lt;&lt; 1, x^66624 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000e4a77a200000001884938e4</div><div class='del'>-</div><div class='del'>-	/* x^65536 mod p(x)` &lt;&lt; 1, x^65600 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000508c2ac800000001bc2e9bc0</div><div class='del'>-</div><div class='del'>-	/* x^64512 mod p(x)` &lt;&lt; 1, x^64576 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000021572a8000000001f9658a68</div><div class='del'>-</div><div class='del'>-	/* x^63488 mod p(x)` &lt;&lt; 1, x^63552 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b859daf2000000001b9224fc</div><div class='del'>-</div><div class='del'>-	/* x^62464 mod p(x)` &lt;&lt; 1, x^62528 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016f7884740000000055b2fb84</div><div class='del'>-</div><div class='del'>-	/* x^61440 mod p(x)` &lt;&lt; 1, x^61504 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b438810e000000018b090348</div><div class='del'>-</div><div class='del'>-	/* x^60416 mod p(x)` &lt;&lt; 1, x^60480 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000095ddc6f2000000011ccbd5ea</div><div class='del'>-</div><div class='del'>-	/* x^59392 mod p(x)` &lt;&lt; 1, x^59456 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d977c20c0000000007ae47f8</div><div class='del'>-</div><div class='del'>-	/* x^58368 mod p(x)` &lt;&lt; 1, x^58432 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ebedb99a0000000172acbec0</div><div class='del'>-</div><div class='del'>-	/* x^57344 mod p(x)` &lt;&lt; 1, x^57408 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001df9e9e9200000001c6e3ff20</div><div class='del'>-</div><div class='del'>-	/* x^56320 mod p(x)` &lt;&lt; 1, x^56384 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001a4a3f95200000000e1b38744</div><div class='del'>-</div><div class='del'>-	/* x^55296 mod p(x)` &lt;&lt; 1, x^55360 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000e2f5122000000000791585b2</div><div class='del'>-</div><div class='del'>-	/* x^54272 mod p(x)` &lt;&lt; 1, x^54336 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000004aa01f3e00000000ac53b894</div><div class='del'>-</div><div class='del'>-	/* x^53248 mod p(x)` &lt;&lt; 1, x^53312 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000b3e90a5800000001ed5f2cf4</div><div class='del'>-</div><div class='del'>-	/* x^52224 mod p(x)` &lt;&lt; 1, x^52288 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000000c9ca2aa00000001df48b2e0</div><div class='del'>-</div><div class='del'>-	/* x^51200 mod p(x)` &lt;&lt; 1, x^51264 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000015168231600000000049c1c62</div><div class='del'>-</div><div class='del'>-	/* x^50176 mod p(x)` &lt;&lt; 1, x^50240 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000036fce78c000000017c460c12</div><div class='del'>-</div><div class='del'>-	/* x^49152 mod p(x)` &lt;&lt; 1, x^49216 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000009037dc10000000015be4da7e</div><div class='del'>-</div><div class='del'>-	/* x^48128 mod p(x)` &lt;&lt; 1, x^48192 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000d3298582000000010f38f668</div><div class='del'>-</div><div class='del'>-	/* x^47104 mod p(x)` &lt;&lt; 1, x^47168 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001b42e8ad60000000039f40a00</div><div class='del'>-</div><div class='del'>-	/* x^46080 mod p(x)` &lt;&lt; 1, x^46144 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000142a983800000000bd4c10c4</div><div class='del'>-</div><div class='del'>-	/* x^45056 mod p(x)` &lt;&lt; 1, x^45120 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000109c7f1900000000042db1d98</div><div class='del'>-</div><div class='del'>-	/* x^44032 mod p(x)` &lt;&lt; 1, x^44096 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000056ff931000000001c905bae6</div><div class='del'>-</div><div class='del'>-	/* x^43008 mod p(x)` &lt;&lt; 1, x^43072 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001594513aa00000000069d40ea</div><div class='del'>-</div><div class='del'>-	/* x^41984 mod p(x)` &lt;&lt; 1, x^42048 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001e3b5b1e8000000008e4fbad0</div><div class='del'>-</div><div class='del'>-	/* x^40960 mod p(x)` &lt;&lt; 1, x^41024 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000011dd5fc080000000047bedd46</div><div class='del'>-</div><div class='del'>-	/* x^39936 mod p(x)` &lt;&lt; 1, x^40000 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001675f0cc20000000026396bf8</div><div class='del'>-</div><div class='del'>-	/* x^38912 mod p(x)` &lt;&lt; 1, x^38976 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000d1c8dd4400000000379beb92</div><div class='del'>-</div><div class='del'>-	/* x^37888 mod p(x)` &lt;&lt; 1, x^37952 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000115ebd3d8000000000abae54a</div><div class='del'>-</div><div class='del'>-	/* x^36864 mod p(x)` &lt;&lt; 1, x^36928 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001ecbd0dac0000000007e6a128</div><div class='del'>-</div><div class='del'>-	/* x^35840 mod p(x)` &lt;&lt; 1, x^35904 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000cdf67af2000000000ade29d2</div><div class='del'>-</div><div class='del'>-	/* x^34816 mod p(x)` &lt;&lt; 1, x^34880 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000004c01ff4c00000000f974c45c</div><div class='del'>-</div><div class='del'>-	/* x^33792 mod p(x)` &lt;&lt; 1, x^33856 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000f2d8657e00000000e77ac60a</div><div class='del'>-</div><div class='del'>-	/* x^32768 mod p(x)` &lt;&lt; 1, x^32832 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000006bae74c40000000145895816</div><div class='del'>-</div><div class='del'>-	/* x^31744 mod p(x)` &lt;&lt; 1, x^31808 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000152af8aa00000000038e362be</div><div class='del'>-</div><div class='del'>-	/* x^30720 mod p(x)` &lt;&lt; 1, x^30784 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000004663802000000007f991a64</div><div class='del'>-</div><div class='del'>-	/* x^29696 mod p(x)` &lt;&lt; 1, x^29760 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001ab2f5afc00000000fa366d3a</div><div class='del'>-</div><div class='del'>-	/* x^28672 mod p(x)` &lt;&lt; 1, x^28736 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000074a4ebd400000001a2bb34f0</div><div class='del'>-</div><div class='del'>-	/* x^27648 mod p(x)` &lt;&lt; 1, x^27712 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001d7ab3a4c0000000028a9981e</div><div class='del'>-</div><div class='del'>-	/* x^26624 mod p(x)` &lt;&lt; 1, x^26688 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001a8da60c600000001dbc672be</div><div class='del'>-</div><div class='del'>-	/* x^25600 mod p(x)` &lt;&lt; 1, x^25664 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000013cf6382000000000b04d77f6</div><div class='del'>-</div><div class='del'>-	/* x^24576 mod p(x)` &lt;&lt; 1, x^24640 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000bec12e1e0000000124400d96</div><div class='del'>-</div><div class='del'>-	/* x^23552 mod p(x)` &lt;&lt; 1, x^23616 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001c6368010000000014ca4b414</div><div class='del'>-</div><div class='del'>-	/* x^22528 mod p(x)` &lt;&lt; 1, x^22592 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001e6e78758000000012fe2c938</div><div class='del'>-</div><div class='del'>-	/* x^21504 mod p(x)` &lt;&lt; 1, x^21568 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000008d7f2b3c00000001faed01e6</div><div class='del'>-</div><div class='del'>-	/* x^20480 mod p(x)` &lt;&lt; 1, x^20544 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000016b4a156e000000007e80ecfe</div><div class='del'>-</div><div class='del'>-	/* x^19456 mod p(x)` &lt;&lt; 1, x^19520 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001c63cfeb60000000098daee94</div><div class='del'>-</div><div class='del'>-	/* x^18432 mod p(x)` &lt;&lt; 1, x^18496 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000015f902670000000010a04edea</div><div class='del'>-</div><div class='del'>-	/* x^17408 mod p(x)` &lt;&lt; 1, x^17472 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001cd5de11e00000001c00b4524</div><div class='del'>-</div><div class='del'>-	/* x^16384 mod p(x)` &lt;&lt; 1, x^16448 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001acaec540000000170296550</div><div class='del'>-</div><div class='del'>-	/* x^15360 mod p(x)` &lt;&lt; 1, x^15424 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000002bd0ca780000000181afaa48</div><div class='del'>-</div><div class='del'>-	/* x^14336 mod p(x)` &lt;&lt; 1, x^14400 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000032d63d5c0000000185a31ffa</div><div class='del'>-</div><div class='del'>-	/* x^13312 mod p(x)` &lt;&lt; 1, x^13376 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000001c6d4e4c000000002469f608</div><div class='del'>-</div><div class='del'>-	/* x^12288 mod p(x)` &lt;&lt; 1, x^12352 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000106a60b92000000006980102a</div><div class='del'>-</div><div class='del'>-	/* x^11264 mod p(x)` &lt;&lt; 1, x^11328 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000d3855e120000000111ea9ca8</div><div class='del'>-</div><div class='del'>-	/* x^10240 mod p(x)` &lt;&lt; 1, x^10304 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000e312563600000001bd1d29ce</div><div class='del'>-</div><div class='del'>-	/* x^9216 mod p(x)` &lt;&lt; 1, x^9280 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x000000009e8f7ea400000001b34b9580</div><div class='del'>-</div><div class='del'>-	/* x^8192 mod p(x)` &lt;&lt; 1, x^8256 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000001c82e562c000000003076054e</div><div class='del'>-</div><div class='del'>-	/* x^7168 mod p(x)` &lt;&lt; 1, x^7232 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000ca9f09ce000000012a608ea4</div><div class='del'>-</div><div class='del'>-	/* x^6144 mod p(x)` &lt;&lt; 1, x^6208 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000c63764e600000000784d05fe</div><div class='del'>-</div><div class='del'>-	/* x^5120 mod p(x)` &lt;&lt; 1, x^5184 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000168d2e49e000000016ef0d82a</div><div class='del'>-</div><div class='del'>-	/* x^4096 mod p(x)` &lt;&lt; 1, x^4160 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000e986c1480000000075bda454</div><div class='del'>-</div><div class='del'>-	/* x^3072 mod p(x)` &lt;&lt; 1, x^3136 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x00000000cfb65894000000003dc0a1c4</div><div class='del'>-</div><div class='del'>-	/* x^2048 mod p(x)` &lt;&lt; 1, x^2112 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000111cadee400000000e9a5d8be</div><div class='del'>-</div><div class='del'>-	/* x^1024 mod p(x)` &lt;&lt; 1, x^1088 mod p(x)` &lt;&lt; 1 */</div><div class='del'>-	.octa 0x0000000171fb63ce00000001609bc4b4</div><div class='del'>-</div><div class='del'>-.short_constants:</div><div class='del'>-</div><div class='del'>-	/* Reduce final 1024-2048 bits to 64 bits, shifting 32 bits to include the trailing 32 bits of zeros */</div><div class='del'>-	/* x^1952 mod p(x)`, x^1984 mod p(x)`, x^2016 mod p(x)`, x^2048 mod p(x)` */</div><div class='del'>-	.octa 0x7fec2963e5bf80485cf015c388e56f72</div><div class='del'>-</div><div class='del'>-	/* x^1824 mod p(x)`, x^1856 mod p(x)`, x^1888 mod p(x)`, x^1920 mod p(x)` */</div><div class='del'>-	.octa 0x38e888d4844752a9963a18920246e2e6</div><div class='del'>-</div><div class='del'>-	/* x^1696 mod p(x)`, x^1728 mod p(x)`, x^1760 mod p(x)`, x^1792 mod p(x)` */</div><div class='del'>-	.octa 0x42316c00730206ad419a441956993a31</div><div class='del'>-</div><div class='del'>-	/* x^1568 mod p(x)`, x^1600 mod p(x)`, x^1632 mod p(x)`, x^1664 mod p(x)` */</div><div class='del'>-	.octa 0x543d5c543e65ddf9924752ba2b830011</div><div class='del'>-</div><div class='del'>-	/* x^1440 mod p(x)`, x^1472 mod p(x)`, x^1504 mod p(x)`, x^1536 mod p(x)` */</div><div class='del'>-	.octa 0x78e87aaf56767c9255bd7f9518e4a304</div><div class='del'>-</div><div class='del'>-	/* x^1312 mod p(x)`, x^1344 mod p(x)`, x^1376 mod p(x)`, x^1408 mod p(x)` */</div><div class='del'>-	.octa 0x8f68fcec1903da7f6d76739fe0553f1e</div><div class='del'>-</div><div class='del'>-	/* x^1184 mod p(x)`, x^1216 mod p(x)`, x^1248 mod p(x)`, x^1280 mod p(x)` */</div><div class='del'>-	.octa 0x3f4840246791d588c133722b1fe0b5c3</div><div class='del'>-</div><div class='del'>-	/* x^1056 mod p(x)`, x^1088 mod p(x)`, x^1120 mod p(x)`, x^1152 mod p(x)` */</div><div class='del'>-	.octa 0x34c96751b04de25a64b67ee0e55ef1f3</div><div class='del'>-</div><div class='del'>-	/* x^928 mod p(x)`, x^960 mod p(x)`, x^992 mod p(x)`, x^1024 mod p(x)` */</div><div class='del'>-	.octa 0x156c8e180b4a395b069db049b8fdb1e7</div><div class='del'>-</div><div class='del'>-	/* x^800 mod p(x)`, x^832 mod p(x)`, x^864 mod p(x)`, x^896 mod p(x)` */</div><div class='del'>-	.octa 0xe0b99ccbe661f7bea11bfaf3c9e90b9e</div><div class='del'>-</div><div class='del'>-	/* x^672 mod p(x)`, x^704 mod p(x)`, x^736 mod p(x)`, x^768 mod p(x)` */</div><div class='del'>-	.octa 0x041d37768cd75659817cdc5119b29a35</div><div class='del'>-</div><div class='del'>-	/* x^544 mod p(x)`, x^576 mod p(x)`, x^608 mod p(x)`, x^640 mod p(x)` */</div><div class='del'>-	.octa 0x3a0777818cfaa9651ce9d94b36c41f1c</div><div class='del'>-</div><div class='del'>-	/* x^416 mod p(x)`, x^448 mod p(x)`, x^480 mod p(x)`, x^512 mod p(x)` */</div><div class='del'>-	.octa 0x0e148e8252377a554f256efcb82be955</div><div class='del'>-</div><div class='del'>-	/* x^288 mod p(x)`, x^320 mod p(x)`, x^352 mod p(x)`, x^384 mod p(x)` */</div><div class='del'>-	.octa 0x9c25531d19e65ddeec1631edb2dea967</div><div class='del'>-</div><div class='del'>-	/* x^160 mod p(x)`, x^192 mod p(x)`, x^224 mod p(x)`, x^256 mod p(x)` */</div><div class='del'>-	.octa 0x790606ff9957c0a65d27e147510ac59a</div><div class='del'>-</div><div class='del'>-	/* x^32 mod p(x)`, x^64 mod p(x)`, x^96 mod p(x)`, x^128 mod p(x)` */</div><div class='del'>-	.octa 0x82f63b786ea2d55ca66805eb18b8ea18</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.barrett_constants:</div><div class='del'>-	/* 33 bit reflected Barrett constant m - (4^32)/n */</div><div class='del'>-	.octa 0x000000000000000000000000dea713f1	/* x^64 div p(x)` */</div><div class='del'>-	/* 33 bit reflected Barrett constant n */</div><div class='del'>-	.octa 0x00000000000000000000000105ec76f1</div><div class='del'>-</div><div class='del'>-#define CRC_FUNCTION_NAME __crc32c_vpmsum</div><div class='del'>-#define REFLECT</div><div class='del'>-#include "crc32-vpmsum_core.S"</div><div class='head'>diff --git a/arch/powerpc/crypto/crc32c-vpmsum_glue.c b/arch/powerpc/crypto/crc32c-vpmsum_glue.c<br/>deleted file mode 100644<br/>index 63760b7dbb76..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crc32c-vpmsum_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crc32c-vpmsum_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,173 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-#define CHKSUM_BLOCK_SIZE	1</div><div class='del'>-#define CHKSUM_DIGEST_SIZE	4</div><div class='del'>-</div><div class='del'>-#define VMX_ALIGN		16</div><div class='del'>-#define VMX_ALIGN_MASK		(VMX_ALIGN-1)</div><div class='del'>-</div><div class='del'>-#define VECTOR_BREAKPOINT	512</div><div class='del'>-</div><div class='del'>-u32 __crc32c_vpmsum(u32 crc, unsigned char const *p, size_t len);</div><div class='del'>-</div><div class='del'>-static u32 crc32c_vpmsum(u32 crc, unsigned char const *p, size_t len)</div><div class='del'>-{</div><div class='del'>-	unsigned int prealign;</div><div class='del'>-	unsigned int tail;</div><div class='del'>-</div><div class='del'>-	if (len &lt; (VECTOR_BREAKPOINT + VMX_ALIGN) || !crypto_simd_usable())</div><div class='del'>-		return __crc32c_le(crc, p, len);</div><div class='del'>-</div><div class='del'>-	if ((unsigned long)p &amp; VMX_ALIGN_MASK) {</div><div class='del'>-		prealign = VMX_ALIGN - ((unsigned long)p &amp; VMX_ALIGN_MASK);</div><div class='del'>-		crc = __crc32c_le(crc, p, prealign);</div><div class='del'>-		len -= prealign;</div><div class='del'>-		p += prealign;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; ~VMX_ALIGN_MASK) {</div><div class='del'>-		preempt_disable();</div><div class='del'>-		pagefault_disable();</div><div class='del'>-		enable_kernel_altivec();</div><div class='del'>-		crc = __crc32c_vpmsum(crc, p, len &amp; ~VMX_ALIGN_MASK);</div><div class='del'>-		disable_kernel_altivec();</div><div class='del'>-		pagefault_enable();</div><div class='del'>-		preempt_enable();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tail = len &amp; VMX_ALIGN_MASK;</div><div class='del'>-	if (tail) {</div><div class='del'>-		p += len &amp; ~VMX_ALIGN_MASK;</div><div class='del'>-		crc = __crc32c_le(crc, p, tail);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_cra_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	u32 *key = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	*key = ~0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Setting the seed allows arbitrary accumulators and flexible XOR policy</div><div class='del'>- * If your algorithm starts with ~0, then XOR with ~0 before you set</div><div class='del'>- * the seed.</div><div class='del'>- */</div><div class='del'>-static int crc32c_vpmsum_setkey(struct crypto_shash *hash, const u8 *key,</div><div class='del'>-			       unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	u32 *mctx = crypto_shash_ctx(hash);</div><div class='del'>-</div><div class='del'>-	if (keylen != sizeof(u32))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	*mctx = le32_to_cpup((__le32 *)key);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u32 *mctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	u32 *crcp = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crcp = *mctx;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			       unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u32 *crcp = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crcp = crc32c_vpmsum(*crcp, data, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __crc32c_vpmsum_finup(u32 *crcp, const u8 *data, unsigned int len,</div><div class='del'>-				u8 *out)</div><div class='del'>-{</div><div class='del'>-	*(__le32 *)out = ~cpu_to_le32(crc32c_vpmsum(*crcp, data, len));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return __crc32c_vpmsum_finup(shash_desc_ctx(desc), data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u32 *crcp = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*(__le32 *)out = ~cpu_to_le32p(crcp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crc32c_vpmsum_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			       unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return __crc32c_vpmsum_finup(crypto_shash_ctx(desc-&gt;tfm), data, len,</div><div class='del'>-				     out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.setkey		= crc32c_vpmsum_setkey,</div><div class='del'>-	.init		= crc32c_vpmsum_init,</div><div class='del'>-	.update		= crc32c_vpmsum_update,</div><div class='del'>-	.final		= crc32c_vpmsum_final,</div><div class='del'>-	.finup		= crc32c_vpmsum_finup,</div><div class='del'>-	.digest		= crc32c_vpmsum_digest,</div><div class='del'>-	.descsize	= sizeof(u32),</div><div class='del'>-	.digestsize	= CHKSUM_DIGEST_SIZE,</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "crc32c",</div><div class='del'>-		.cra_driver_name	= "crc32c-vpmsum",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,</div><div class='del'>-		.cra_blocksize		= CHKSUM_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		= sizeof(u32),</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-		.cra_init		= crc32c_vpmsum_cra_init,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init crc32c_vpmsum_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_ARCH_207S))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crc32c_vpmsum_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(PPC_MODULE_FEATURE_VEC_CRYPTO, crc32c_vpmsum_mod_init);</div><div class='del'>-module_exit(crc32c_vpmsum_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Anton Blanchard &lt;anton@samba.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CRC32C using vector polynomial multiply-sum instructions");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crc32c");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crc32c-vpmsum");</div><div class='head'>diff --git a/arch/powerpc/crypto/crct10dif-vpmsum_asm.S b/arch/powerpc/crypto/crct10dif-vpmsum_asm.S<br/>deleted file mode 100644<br/>index f0b93a0fe168..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crct10dif-vpmsum_asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crct10dif-vpmsum_asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,845 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Calculate a CRC T10DIF  with vpmsum acceleration</div><div class='del'>- *</div><div class='del'>- * Constants generated by crc32-vpmsum, available at</div><div class='del'>- * https://github.com/antonblanchard/crc32-vpmsum</div><div class='del'>- *</div><div class='del'>- * crc32-vpmsum is</div><div class='del'>- * Copyright (C) 2015 Anton Blanchard &lt;anton@au.ibm.com&gt;, IBM</div><div class='del'>- */</div><div class='del'>-	.section	.rodata</div><div class='del'>-.balign 16</div><div class='del'>-</div><div class='del'>-.byteswap_constant:</div><div class='del'>-	/* byte reverse permute constant */</div><div class='del'>-	.octa 0x0F0E0D0C0B0A09080706050403020100</div><div class='del'>-</div><div class='del'>-.constants:</div><div class='del'>-</div><div class='del'>-	/* Reduce 262144 kbits to 1024 bits */</div><div class='del'>-	/* x^261184 mod p(x), x^261120 mod p(x) */</div><div class='del'>-	.octa 0x0000000056d300000000000052550000</div><div class='del'>-</div><div class='del'>-	/* x^260160 mod p(x), x^260096 mod p(x) */</div><div class='del'>-	.octa 0x00000000ee67000000000000a1e40000</div><div class='del'>-</div><div class='del'>-	/* x^259136 mod p(x), x^259072 mod p(x) */</div><div class='del'>-	.octa 0x0000000060830000000000004ad10000</div><div class='del'>-</div><div class='del'>-	/* x^258112 mod p(x), x^258048 mod p(x) */</div><div class='del'>-	.octa 0x000000008cfe0000000000009ab40000</div><div class='del'>-</div><div class='del'>-	/* x^257088 mod p(x), x^257024 mod p(x) */</div><div class='del'>-	.octa 0x000000003e93000000000000fdb50000</div><div class='del'>-</div><div class='del'>-	/* x^256064 mod p(x), x^256000 mod p(x) */</div><div class='del'>-	.octa 0x000000003c2000000000000045480000</div><div class='del'>-</div><div class='del'>-	/* x^255040 mod p(x), x^254976 mod p(x) */</div><div class='del'>-	.octa 0x00000000b1fc0000000000008d690000</div><div class='del'>-</div><div class='del'>-	/* x^254016 mod p(x), x^253952 mod p(x) */</div><div class='del'>-	.octa 0x00000000f82b00000000000024ad0000</div><div class='del'>-</div><div class='del'>-	/* x^252992 mod p(x), x^252928 mod p(x) */</div><div class='del'>-	.octa 0x0000000044420000000000009f1a0000</div><div class='del'>-</div><div class='del'>-	/* x^251968 mod p(x), x^251904 mod p(x) */</div><div class='del'>-	.octa 0x00000000e88c00000000000066ec0000</div><div class='del'>-</div><div class='del'>-	/* x^250944 mod p(x), x^250880 mod p(x) */</div><div class='del'>-	.octa 0x00000000385c000000000000c87d0000</div><div class='del'>-</div><div class='del'>-	/* x^249920 mod p(x), x^249856 mod p(x) */</div><div class='del'>-	.octa 0x000000003227000000000000c8ff0000</div><div class='del'>-</div><div class='del'>-	/* x^248896 mod p(x), x^248832 mod p(x) */</div><div class='del'>-	.octa 0x00000000a9a900000000000033440000</div><div class='del'>-</div><div class='del'>-	/* x^247872 mod p(x), x^247808 mod p(x) */</div><div class='del'>-	.octa 0x00000000abaa00000000000066eb0000</div><div class='del'>-</div><div class='del'>-	/* x^246848 mod p(x), x^246784 mod p(x) */</div><div class='del'>-	.octa 0x000000001ac3000000000000c4ef0000</div><div class='del'>-</div><div class='del'>-	/* x^245824 mod p(x), x^245760 mod p(x) */</div><div class='del'>-	.octa 0x0000000063f000000000000056f30000</div><div class='del'>-</div><div class='del'>-	/* x^244800 mod p(x), x^244736 mod p(x) */</div><div class='del'>-	.octa 0x0000000032cc00000000000002050000</div><div class='del'>-</div><div class='del'>-	/* x^243776 mod p(x), x^243712 mod p(x) */</div><div class='del'>-	.octa 0x00000000f8b5000000000000568e0000</div><div class='del'>-</div><div class='del'>-	/* x^242752 mod p(x), x^242688 mod p(x) */</div><div class='del'>-	.octa 0x000000008db100000000000064290000</div><div class='del'>-</div><div class='del'>-	/* x^241728 mod p(x), x^241664 mod p(x) */</div><div class='del'>-	.octa 0x0000000059ca0000000000006b660000</div><div class='del'>-</div><div class='del'>-	/* x^240704 mod p(x), x^240640 mod p(x) */</div><div class='del'>-	.octa 0x000000005f5c00000000000018f80000</div><div class='del'>-</div><div class='del'>-	/* x^239680 mod p(x), x^239616 mod p(x) */</div><div class='del'>-	.octa 0x0000000061af000000000000b6090000</div><div class='del'>-</div><div class='del'>-	/* x^238656 mod p(x), x^238592 mod p(x) */</div><div class='del'>-	.octa 0x00000000e29e000000000000099a0000</div><div class='del'>-</div><div class='del'>-	/* x^237632 mod p(x), x^237568 mod p(x) */</div><div class='del'>-	.octa 0x000000000975000000000000a8360000</div><div class='del'>-</div><div class='del'>-	/* x^236608 mod p(x), x^236544 mod p(x) */</div><div class='del'>-	.octa 0x0000000043900000000000004f570000</div><div class='del'>-</div><div class='del'>-	/* x^235584 mod p(x), x^235520 mod p(x) */</div><div class='del'>-	.octa 0x00000000f9cd000000000000134c0000</div><div class='del'>-</div><div class='del'>-	/* x^234560 mod p(x), x^234496 mod p(x) */</div><div class='del'>-	.octa 0x000000007c29000000000000ec380000</div><div class='del'>-</div><div class='del'>-	/* x^233536 mod p(x), x^233472 mod p(x) */</div><div class='del'>-	.octa 0x000000004c6a000000000000b0d10000</div><div class='del'>-</div><div class='del'>-	/* x^232512 mod p(x), x^232448 mod p(x) */</div><div class='del'>-	.octa 0x00000000e7290000000000007d3e0000</div><div class='del'>-</div><div class='del'>-	/* x^231488 mod p(x), x^231424 mod p(x) */</div><div class='del'>-	.octa 0x00000000f1ab000000000000f0b20000</div><div class='del'>-</div><div class='del'>-	/* x^230464 mod p(x), x^230400 mod p(x) */</div><div class='del'>-	.octa 0x0000000039db0000000000009c270000</div><div class='del'>-</div><div class='del'>-	/* x^229440 mod p(x), x^229376 mod p(x) */</div><div class='del'>-	.octa 0x000000005e2800000000000092890000</div><div class='del'>-</div><div class='del'>-	/* x^228416 mod p(x), x^228352 mod p(x) */</div><div class='del'>-	.octa 0x00000000d44e000000000000d5ee0000</div><div class='del'>-</div><div class='del'>-	/* x^227392 mod p(x), x^227328 mod p(x) */</div><div class='del'>-	.octa 0x00000000cd0a00000000000041f50000</div><div class='del'>-</div><div class='del'>-	/* x^226368 mod p(x), x^226304 mod p(x) */</div><div class='del'>-	.octa 0x00000000c5b400000000000010520000</div><div class='del'>-</div><div class='del'>-	/* x^225344 mod p(x), x^225280 mod p(x) */</div><div class='del'>-	.octa 0x00000000fd2100000000000042170000</div><div class='del'>-</div><div class='del'>-	/* x^224320 mod p(x), x^224256 mod p(x) */</div><div class='del'>-	.octa 0x000000002f2500000000000095c20000</div><div class='del'>-</div><div class='del'>-	/* x^223296 mod p(x), x^223232 mod p(x) */</div><div class='del'>-	.octa 0x000000001b0100000000000001ce0000</div><div class='del'>-</div><div class='del'>-	/* x^222272 mod p(x), x^222208 mod p(x) */</div><div class='del'>-	.octa 0x000000000d430000000000002aca0000</div><div class='del'>-</div><div class='del'>-	/* x^221248 mod p(x), x^221184 mod p(x) */</div><div class='del'>-	.octa 0x0000000030a6000000000000385e0000</div><div class='del'>-</div><div class='del'>-	/* x^220224 mod p(x), x^220160 mod p(x) */</div><div class='del'>-	.octa 0x00000000e37b0000000000006f7a0000</div><div class='del'>-</div><div class='del'>-	/* x^219200 mod p(x), x^219136 mod p(x) */</div><div class='del'>-	.octa 0x00000000873600000000000024320000</div><div class='del'>-</div><div class='del'>-	/* x^218176 mod p(x), x^218112 mod p(x) */</div><div class='del'>-	.octa 0x00000000e9fb000000000000bd9c0000</div><div class='del'>-</div><div class='del'>-	/* x^217152 mod p(x), x^217088 mod p(x) */</div><div class='del'>-	.octa 0x000000003b9500000000000054bc0000</div><div class='del'>-</div><div class='del'>-	/* x^216128 mod p(x), x^216064 mod p(x) */</div><div class='del'>-	.octa 0x00000000133e000000000000a4660000</div><div class='del'>-</div><div class='del'>-	/* x^215104 mod p(x), x^215040 mod p(x) */</div><div class='del'>-	.octa 0x00000000784500000000000079930000</div><div class='del'>-</div><div class='del'>-	/* x^214080 mod p(x), x^214016 mod p(x) */</div><div class='del'>-	.octa 0x00000000b9800000000000001bb80000</div><div class='del'>-</div><div class='del'>-	/* x^213056 mod p(x), x^212992 mod p(x) */</div><div class='del'>-	.octa 0x00000000687600000000000024400000</div><div class='del'>-</div><div class='del'>-	/* x^212032 mod p(x), x^211968 mod p(x) */</div><div class='del'>-	.octa 0x00000000aff300000000000029e10000</div><div class='del'>-</div><div class='del'>-	/* x^211008 mod p(x), x^210944 mod p(x) */</div><div class='del'>-	.octa 0x0000000024b50000000000005ded0000</div><div class='del'>-</div><div class='del'>-	/* x^209984 mod p(x), x^209920 mod p(x) */</div><div class='del'>-	.octa 0x0000000017e8000000000000b12e0000</div><div class='del'>-</div><div class='del'>-	/* x^208960 mod p(x), x^208896 mod p(x) */</div><div class='del'>-	.octa 0x00000000128400000000000026d20000</div><div class='del'>-</div><div class='del'>-	/* x^207936 mod p(x), x^207872 mod p(x) */</div><div class='del'>-	.octa 0x000000002115000000000000a32a0000</div><div class='del'>-</div><div class='del'>-	/* x^206912 mod p(x), x^206848 mod p(x) */</div><div class='del'>-	.octa 0x000000009595000000000000a1210000</div><div class='del'>-</div><div class='del'>-	/* x^205888 mod p(x), x^205824 mod p(x) */</div><div class='del'>-	.octa 0x00000000281e000000000000ee8b0000</div><div class='del'>-</div><div class='del'>-	/* x^204864 mod p(x), x^204800 mod p(x) */</div><div class='del'>-	.octa 0x0000000006010000000000003d0d0000</div><div class='del'>-</div><div class='del'>-	/* x^203840 mod p(x), x^203776 mod p(x) */</div><div class='del'>-	.octa 0x00000000e2b600000000000034e90000</div><div class='del'>-</div><div class='del'>-	/* x^202816 mod p(x), x^202752 mod p(x) */</div><div class='del'>-	.octa 0x000000001bd40000000000004cdb0000</div><div class='del'>-</div><div class='del'>-	/* x^201792 mod p(x), x^201728 mod p(x) */</div><div class='del'>-	.octa 0x00000000df2800000000000030e90000</div><div class='del'>-</div><div class='del'>-	/* x^200768 mod p(x), x^200704 mod p(x) */</div><div class='del'>-	.octa 0x0000000049c200000000000042590000</div><div class='del'>-</div><div class='del'>-	/* x^199744 mod p(x), x^199680 mod p(x) */</div><div class='del'>-	.octa 0x000000009b97000000000000df950000</div><div class='del'>-</div><div class='del'>-	/* x^198720 mod p(x), x^198656 mod p(x) */</div><div class='del'>-	.octa 0x000000006184000000000000da7b0000</div><div class='del'>-</div><div class='del'>-	/* x^197696 mod p(x), x^197632 mod p(x) */</div><div class='del'>-	.octa 0x00000000461700000000000012510000</div><div class='del'>-</div><div class='del'>-	/* x^196672 mod p(x), x^196608 mod p(x) */</div><div class='del'>-	.octa 0x000000009b40000000000000f37e0000</div><div class='del'>-</div><div class='del'>-	/* x^195648 mod p(x), x^195584 mod p(x) */</div><div class='del'>-	.octa 0x00000000eeb2000000000000ecf10000</div><div class='del'>-</div><div class='del'>-	/* x^194624 mod p(x), x^194560 mod p(x) */</div><div class='del'>-	.octa 0x00000000b2e800000000000050f20000</div><div class='del'>-</div><div class='del'>-	/* x^193600 mod p(x), x^193536 mod p(x) */</div><div class='del'>-	.octa 0x00000000f59a000000000000e0b30000</div><div class='del'>-</div><div class='del'>-	/* x^192576 mod p(x), x^192512 mod p(x) */</div><div class='del'>-	.octa 0x00000000467f0000000000004d5a0000</div><div class='del'>-</div><div class='del'>-	/* x^191552 mod p(x), x^191488 mod p(x) */</div><div class='del'>-	.octa 0x00000000da92000000000000bb010000</div><div class='del'>-</div><div class='del'>-	/* x^190528 mod p(x), x^190464 mod p(x) */</div><div class='del'>-	.octa 0x000000001e1000000000000022a40000</div><div class='del'>-</div><div class='del'>-	/* x^189504 mod p(x), x^189440 mod p(x) */</div><div class='del'>-	.octa 0x0000000058fe000000000000836f0000</div><div class='del'>-</div><div class='del'>-	/* x^188480 mod p(x), x^188416 mod p(x) */</div><div class='del'>-	.octa 0x00000000b9ce000000000000d78d0000</div><div class='del'>-</div><div class='del'>-	/* x^187456 mod p(x), x^187392 mod p(x) */</div><div class='del'>-	.octa 0x0000000022210000000000004f8d0000</div><div class='del'>-</div><div class='del'>-	/* x^186432 mod p(x), x^186368 mod p(x) */</div><div class='del'>-	.octa 0x00000000744600000000000033760000</div><div class='del'>-</div><div class='del'>-	/* x^185408 mod p(x), x^185344 mod p(x) */</div><div class='del'>-	.octa 0x000000001c2e000000000000a1e50000</div><div class='del'>-</div><div class='del'>-	/* x^184384 mod p(x), x^184320 mod p(x) */</div><div class='del'>-	.octa 0x00000000dcc8000000000000a1a40000</div><div class='del'>-</div><div class='del'>-	/* x^183360 mod p(x), x^183296 mod p(x) */</div><div class='del'>-	.octa 0x00000000910f00000000000019a20000</div><div class='del'>-</div><div class='del'>-	/* x^182336 mod p(x), x^182272 mod p(x) */</div><div class='del'>-	.octa 0x0000000055d5000000000000f6ae0000</div><div class='del'>-</div><div class='del'>-	/* x^181312 mod p(x), x^181248 mod p(x) */</div><div class='del'>-	.octa 0x00000000c8ba000000000000a7ac0000</div><div class='del'>-</div><div class='del'>-	/* x^180288 mod p(x), x^180224 mod p(x) */</div><div class='del'>-	.octa 0x0000000031f8000000000000eea20000</div><div class='del'>-</div><div class='del'>-	/* x^179264 mod p(x), x^179200 mod p(x) */</div><div class='del'>-	.octa 0x000000001966000000000000c4d90000</div><div class='del'>-</div><div class='del'>-	/* x^178240 mod p(x), x^178176 mod p(x) */</div><div class='del'>-	.octa 0x00000000b9810000000000002b470000</div><div class='del'>-</div><div class='del'>-	/* x^177216 mod p(x), x^177152 mod p(x) */</div><div class='del'>-	.octa 0x000000008303000000000000f7cf0000</div><div class='del'>-</div><div class='del'>-	/* x^176192 mod p(x), x^176128 mod p(x) */</div><div class='del'>-	.octa 0x000000002ce500000000000035b30000</div><div class='del'>-</div><div class='del'>-	/* x^175168 mod p(x), x^175104 mod p(x) */</div><div class='del'>-	.octa 0x000000002fae0000000000000c7c0000</div><div class='del'>-</div><div class='del'>-	/* x^174144 mod p(x), x^174080 mod p(x) */</div><div class='del'>-	.octa 0x00000000f50c0000000000009edf0000</div><div class='del'>-</div><div class='del'>-	/* x^173120 mod p(x), x^173056 mod p(x) */</div><div class='del'>-	.octa 0x00000000714f00000000000004cd0000</div><div class='del'>-</div><div class='del'>-	/* x^172096 mod p(x), x^172032 mod p(x) */</div><div class='del'>-	.octa 0x00000000c161000000000000541b0000</div><div class='del'>-</div><div class='del'>-	/* x^171072 mod p(x), x^171008 mod p(x) */</div><div class='del'>-	.octa 0x0000000021c8000000000000e2700000</div><div class='del'>-</div><div class='del'>-	/* x^170048 mod p(x), x^169984 mod p(x) */</div><div class='del'>-	.octa 0x00000000b93d00000000000009a60000</div><div class='del'>-</div><div class='del'>-	/* x^169024 mod p(x), x^168960 mod p(x) */</div><div class='del'>-	.octa 0x00000000fbcf000000000000761c0000</div><div class='del'>-</div><div class='del'>-	/* x^168000 mod p(x), x^167936 mod p(x) */</div><div class='del'>-	.octa 0x0000000026350000000000009db30000</div><div class='del'>-</div><div class='del'>-	/* x^166976 mod p(x), x^166912 mod p(x) */</div><div class='del'>-	.octa 0x00000000b64f0000000000003e9f0000</div><div class='del'>-</div><div class='del'>-	/* x^165952 mod p(x), x^165888 mod p(x) */</div><div class='del'>-	.octa 0x00000000bd0e00000000000078590000</div><div class='del'>-</div><div class='del'>-	/* x^164928 mod p(x), x^164864 mod p(x) */</div><div class='del'>-	.octa 0x00000000d9360000000000008bc80000</div><div class='del'>-</div><div class='del'>-	/* x^163904 mod p(x), x^163840 mod p(x) */</div><div class='del'>-	.octa 0x000000002f140000000000008c9f0000</div><div class='del'>-</div><div class='del'>-	/* x^162880 mod p(x), x^162816 mod p(x) */</div><div class='del'>-	.octa 0x000000006a270000000000006af70000</div><div class='del'>-</div><div class='del'>-	/* x^161856 mod p(x), x^161792 mod p(x) */</div><div class='del'>-	.octa 0x000000006685000000000000e5210000</div><div class='del'>-</div><div class='del'>-	/* x^160832 mod p(x), x^160768 mod p(x) */</div><div class='del'>-	.octa 0x0000000062da00000000000008290000</div><div class='del'>-</div><div class='del'>-	/* x^159808 mod p(x), x^159744 mod p(x) */</div><div class='del'>-	.octa 0x00000000bb4b000000000000e4d00000</div><div class='del'>-</div><div class='del'>-	/* x^158784 mod p(x), x^158720 mod p(x) */</div><div class='del'>-	.octa 0x00000000d2490000000000004ae10000</div><div class='del'>-</div><div class='del'>-	/* x^157760 mod p(x), x^157696 mod p(x) */</div><div class='del'>-	.octa 0x00000000c85b00000000000000e70000</div><div class='del'>-</div><div class='del'>-	/* x^156736 mod p(x), x^156672 mod p(x) */</div><div class='del'>-	.octa 0x00000000c37a00000000000015650000</div><div class='del'>-</div><div class='del'>-	/* x^155712 mod p(x), x^155648 mod p(x) */</div><div class='del'>-	.octa 0x0000000018530000000000001c2f0000</div><div class='del'>-</div><div class='del'>-	/* x^154688 mod p(x), x^154624 mod p(x) */</div><div class='del'>-	.octa 0x00000000b46600000000000037bd0000</div><div class='del'>-</div><div class='del'>-	/* x^153664 mod p(x), x^153600 mod p(x) */</div><div class='del'>-	.octa 0x00000000439b00000000000012190000</div><div class='del'>-</div><div class='del'>-	/* x^152640 mod p(x), x^152576 mod p(x) */</div><div class='del'>-	.octa 0x00000000b1260000000000005ece0000</div><div class='del'>-</div><div class='del'>-	/* x^151616 mod p(x), x^151552 mod p(x) */</div><div class='del'>-	.octa 0x00000000d8110000000000002a5e0000</div><div class='del'>-</div><div class='del'>-	/* x^150592 mod p(x), x^150528 mod p(x) */</div><div class='del'>-	.octa 0x00000000099f00000000000052330000</div><div class='del'>-</div><div class='del'>-	/* x^149568 mod p(x), x^149504 mod p(x) */</div><div class='del'>-	.octa 0x00000000f9f9000000000000f9120000</div><div class='del'>-</div><div class='del'>-	/* x^148544 mod p(x), x^148480 mod p(x) */</div><div class='del'>-	.octa 0x000000005cc00000000000000ddc0000</div><div class='del'>-</div><div class='del'>-	/* x^147520 mod p(x), x^147456 mod p(x) */</div><div class='del'>-	.octa 0x00000000343b00000000000012200000</div><div class='del'>-</div><div class='del'>-	/* x^146496 mod p(x), x^146432 mod p(x) */</div><div class='del'>-	.octa 0x000000009222000000000000d12b0000</div><div class='del'>-</div><div class='del'>-	/* x^145472 mod p(x), x^145408 mod p(x) */</div><div class='del'>-	.octa 0x00000000d781000000000000eb2d0000</div><div class='del'>-</div><div class='del'>-	/* x^144448 mod p(x), x^144384 mod p(x) */</div><div class='del'>-	.octa 0x000000000bf400000000000058970000</div><div class='del'>-</div><div class='del'>-	/* x^143424 mod p(x), x^143360 mod p(x) */</div><div class='del'>-	.octa 0x00000000094200000000000013690000</div><div class='del'>-</div><div class='del'>-	/* x^142400 mod p(x), x^142336 mod p(x) */</div><div class='del'>-	.octa 0x00000000d55100000000000051950000</div><div class='del'>-</div><div class='del'>-	/* x^141376 mod p(x), x^141312 mod p(x) */</div><div class='del'>-	.octa 0x000000008f11000000000000954b0000</div><div class='del'>-</div><div class='del'>-	/* x^140352 mod p(x), x^140288 mod p(x) */</div><div class='del'>-	.octa 0x00000000140f000000000000b29e0000</div><div class='del'>-</div><div class='del'>-	/* x^139328 mod p(x), x^139264 mod p(x) */</div><div class='del'>-	.octa 0x00000000c6db000000000000db5d0000</div><div class='del'>-</div><div class='del'>-	/* x^138304 mod p(x), x^138240 mod p(x) */</div><div class='del'>-	.octa 0x00000000715b000000000000dfaf0000</div><div class='del'>-</div><div class='del'>-	/* x^137280 mod p(x), x^137216 mod p(x) */</div><div class='del'>-	.octa 0x000000000dea000000000000e3b60000</div><div class='del'>-</div><div class='del'>-	/* x^136256 mod p(x), x^136192 mod p(x) */</div><div class='del'>-	.octa 0x000000006f94000000000000ddaf0000</div><div class='del'>-</div><div class='del'>-	/* x^135232 mod p(x), x^135168 mod p(x) */</div><div class='del'>-	.octa 0x0000000024e1000000000000e4f70000</div><div class='del'>-</div><div class='del'>-	/* x^134208 mod p(x), x^134144 mod p(x) */</div><div class='del'>-	.octa 0x000000008810000000000000aa110000</div><div class='del'>-</div><div class='del'>-	/* x^133184 mod p(x), x^133120 mod p(x) */</div><div class='del'>-	.octa 0x0000000030c2000000000000a8e60000</div><div class='del'>-</div><div class='del'>-	/* x^132160 mod p(x), x^132096 mod p(x) */</div><div class='del'>-	.octa 0x00000000e6d0000000000000ccf30000</div><div class='del'>-</div><div class='del'>-	/* x^131136 mod p(x), x^131072 mod p(x) */</div><div class='del'>-	.octa 0x000000004da000000000000079bf0000</div><div class='del'>-</div><div class='del'>-	/* x^130112 mod p(x), x^130048 mod p(x) */</div><div class='del'>-	.octa 0x000000007759000000000000b3a30000</div><div class='del'>-</div><div class='del'>-	/* x^129088 mod p(x), x^129024 mod p(x) */</div><div class='del'>-	.octa 0x00000000597400000000000028790000</div><div class='del'>-</div><div class='del'>-	/* x^128064 mod p(x), x^128000 mod p(x) */</div><div class='del'>-	.octa 0x000000007acd000000000000b5820000</div><div class='del'>-</div><div class='del'>-	/* x^127040 mod p(x), x^126976 mod p(x) */</div><div class='del'>-	.octa 0x00000000e6e400000000000026ad0000</div><div class='del'>-</div><div class='del'>-	/* x^126016 mod p(x), x^125952 mod p(x) */</div><div class='del'>-	.octa 0x000000006d49000000000000985b0000</div><div class='del'>-</div><div class='del'>-	/* x^124992 mod p(x), x^124928 mod p(x) */</div><div class='del'>-	.octa 0x000000000f0800000000000011520000</div><div class='del'>-</div><div class='del'>-	/* x^123968 mod p(x), x^123904 mod p(x) */</div><div class='del'>-	.octa 0x000000002c7f000000000000846c0000</div><div class='del'>-</div><div class='del'>-	/* x^122944 mod p(x), x^122880 mod p(x) */</div><div class='del'>-	.octa 0x000000005ce7000000000000ae1d0000</div><div class='del'>-</div><div class='del'>-	/* x^121920 mod p(x), x^121856 mod p(x) */</div><div class='del'>-	.octa 0x00000000d4cb000000000000e21d0000</div><div class='del'>-</div><div class='del'>-	/* x^120896 mod p(x), x^120832 mod p(x) */</div><div class='del'>-	.octa 0x000000003a2300000000000019bb0000</div><div class='del'>-</div><div class='del'>-	/* x^119872 mod p(x), x^119808 mod p(x) */</div><div class='del'>-	.octa 0x000000000e1700000000000095290000</div><div class='del'>-</div><div class='del'>-	/* x^118848 mod p(x), x^118784 mod p(x) */</div><div class='del'>-	.octa 0x000000006e6400000000000050d20000</div><div class='del'>-</div><div class='del'>-	/* x^117824 mod p(x), x^117760 mod p(x) */</div><div class='del'>-	.octa 0x000000008d5c0000000000000cd10000</div><div class='del'>-</div><div class='del'>-	/* x^116800 mod p(x), x^116736 mod p(x) */</div><div class='del'>-	.octa 0x00000000ef310000000000007b570000</div><div class='del'>-</div><div class='del'>-	/* x^115776 mod p(x), x^115712 mod p(x) */</div><div class='del'>-	.octa 0x00000000645d00000000000053d60000</div><div class='del'>-</div><div class='del'>-	/* x^114752 mod p(x), x^114688 mod p(x) */</div><div class='del'>-	.octa 0x0000000018fc00000000000077510000</div><div class='del'>-</div><div class='del'>-	/* x^113728 mod p(x), x^113664 mod p(x) */</div><div class='del'>-	.octa 0x000000000cb3000000000000a7b70000</div><div class='del'>-</div><div class='del'>-	/* x^112704 mod p(x), x^112640 mod p(x) */</div><div class='del'>-	.octa 0x00000000991b000000000000d0780000</div><div class='del'>-</div><div class='del'>-	/* x^111680 mod p(x), x^111616 mod p(x) */</div><div class='del'>-	.octa 0x00000000845a000000000000be3c0000</div><div class='del'>-</div><div class='del'>-	/* x^110656 mod p(x), x^110592 mod p(x) */</div><div class='del'>-	.octa 0x00000000d3a9000000000000df020000</div><div class='del'>-</div><div class='del'>-	/* x^109632 mod p(x), x^109568 mod p(x) */</div><div class='del'>-	.octa 0x0000000017d7000000000000063e0000</div><div class='del'>-</div><div class='del'>-	/* x^108608 mod p(x), x^108544 mod p(x) */</div><div class='del'>-	.octa 0x000000007a860000000000008ab40000</div><div class='del'>-</div><div class='del'>-	/* x^107584 mod p(x), x^107520 mod p(x) */</div><div class='del'>-	.octa 0x00000000fd7c000000000000c7bd0000</div><div class='del'>-</div><div class='del'>-	/* x^106560 mod p(x), x^106496 mod p(x) */</div><div class='del'>-	.octa 0x00000000a56b000000000000efd60000</div><div class='del'>-</div><div class='del'>-	/* x^105536 mod p(x), x^105472 mod p(x) */</div><div class='del'>-	.octa 0x0000000010e400000000000071380000</div><div class='del'>-</div><div class='del'>-	/* x^104512 mod p(x), x^104448 mod p(x) */</div><div class='del'>-	.octa 0x00000000994500000000000004d30000</div><div class='del'>-</div><div class='del'>-	/* x^103488 mod p(x), x^103424 mod p(x) */</div><div class='del'>-	.octa 0x00000000b83c0000000000003b0e0000</div><div class='del'>-</div><div class='del'>-	/* x^102464 mod p(x), x^102400 mod p(x) */</div><div class='del'>-	.octa 0x00000000d6c10000000000008b020000</div><div class='del'>-</div><div class='del'>-	/* x^101440 mod p(x), x^101376 mod p(x) */</div><div class='del'>-	.octa 0x000000009efc000000000000da940000</div><div class='del'>-</div><div class='del'>-	/* x^100416 mod p(x), x^100352 mod p(x) */</div><div class='del'>-	.octa 0x000000005e87000000000000f9f70000</div><div class='del'>-</div><div class='del'>-	/* x^99392 mod p(x), x^99328 mod p(x) */</div><div class='del'>-	.octa 0x000000006c9b00000000000045e40000</div><div class='del'>-</div><div class='del'>-	/* x^98368 mod p(x), x^98304 mod p(x) */</div><div class='del'>-	.octa 0x00000000178a00000000000083940000</div><div class='del'>-</div><div class='del'>-	/* x^97344 mod p(x), x^97280 mod p(x) */</div><div class='del'>-	.octa 0x00000000f0c8000000000000f0a00000</div><div class='del'>-</div><div class='del'>-	/* x^96320 mod p(x), x^96256 mod p(x) */</div><div class='del'>-	.octa 0x00000000f699000000000000b74b0000</div><div class='del'>-</div><div class='del'>-	/* x^95296 mod p(x), x^95232 mod p(x) */</div><div class='del'>-	.octa 0x00000000316d000000000000c1cf0000</div><div class='del'>-</div><div class='del'>-	/* x^94272 mod p(x), x^94208 mod p(x) */</div><div class='del'>-	.octa 0x00000000987e00000000000072680000</div><div class='del'>-</div><div class='del'>-	/* x^93248 mod p(x), x^93184 mod p(x) */</div><div class='del'>-	.octa 0x00000000acff000000000000e0ab0000</div><div class='del'>-</div><div class='del'>-	/* x^92224 mod p(x), x^92160 mod p(x) */</div><div class='del'>-	.octa 0x00000000a1f6000000000000c5a80000</div><div class='del'>-</div><div class='del'>-	/* x^91200 mod p(x), x^91136 mod p(x) */</div><div class='del'>-	.octa 0x0000000061bd000000000000cf690000</div><div class='del'>-</div><div class='del'>-	/* x^90176 mod p(x), x^90112 mod p(x) */</div><div class='del'>-	.octa 0x00000000c9f2000000000000cbcc0000</div><div class='del'>-</div><div class='del'>-	/* x^89152 mod p(x), x^89088 mod p(x) */</div><div class='del'>-	.octa 0x000000005a33000000000000de050000</div><div class='del'>-</div><div class='del'>-	/* x^88128 mod p(x), x^88064 mod p(x) */</div><div class='del'>-	.octa 0x00000000e416000000000000ccd70000</div><div class='del'>-</div><div class='del'>-	/* x^87104 mod p(x), x^87040 mod p(x) */</div><div class='del'>-	.octa 0x0000000058930000000000002f670000</div><div class='del'>-</div><div class='del'>-	/* x^86080 mod p(x), x^86016 mod p(x) */</div><div class='del'>-	.octa 0x00000000a9d3000000000000152f0000</div><div class='del'>-</div><div class='del'>-	/* x^85056 mod p(x), x^84992 mod p(x) */</div><div class='del'>-	.octa 0x00000000c114000000000000ecc20000</div><div class='del'>-</div><div class='del'>-	/* x^84032 mod p(x), x^83968 mod p(x) */</div><div class='del'>-	.octa 0x00000000b9270000000000007c890000</div><div class='del'>-</div><div class='del'>-	/* x^83008 mod p(x), x^82944 mod p(x) */</div><div class='del'>-	.octa 0x000000002e6000000000000006ee0000</div><div class='del'>-</div><div class='del'>-	/* x^81984 mod p(x), x^81920 mod p(x) */</div><div class='del'>-	.octa 0x00000000dfc600000000000009100000</div><div class='del'>-</div><div class='del'>-	/* x^80960 mod p(x), x^80896 mod p(x) */</div><div class='del'>-	.octa 0x000000004911000000000000ad4e0000</div><div class='del'>-</div><div class='del'>-	/* x^79936 mod p(x), x^79872 mod p(x) */</div><div class='del'>-	.octa 0x00000000ae1b000000000000b04d0000</div><div class='del'>-</div><div class='del'>-	/* x^78912 mod p(x), x^78848 mod p(x) */</div><div class='del'>-	.octa 0x0000000005fa000000000000e9900000</div><div class='del'>-</div><div class='del'>-	/* x^77888 mod p(x), x^77824 mod p(x) */</div><div class='del'>-	.octa 0x0000000004a1000000000000cc6f0000</div><div class='del'>-</div><div class='del'>-	/* x^76864 mod p(x), x^76800 mod p(x) */</div><div class='del'>-	.octa 0x00000000af73000000000000ed110000</div><div class='del'>-</div><div class='del'>-	/* x^75840 mod p(x), x^75776 mod p(x) */</div><div class='del'>-	.octa 0x0000000082530000000000008f7e0000</div><div class='del'>-</div><div class='del'>-	/* x^74816 mod p(x), x^74752 mod p(x) */</div><div class='del'>-	.octa 0x00000000cfdc000000000000594f0000</div><div class='del'>-</div><div class='del'>-	/* x^73792 mod p(x), x^73728 mod p(x) */</div><div class='del'>-	.octa 0x00000000a6b6000000000000a8750000</div><div class='del'>-</div><div class='del'>-	/* x^72768 mod p(x), x^72704 mod p(x) */</div><div class='del'>-	.octa 0x00000000fd76000000000000aa0c0000</div><div class='del'>-</div><div class='del'>-	/* x^71744 mod p(x), x^71680 mod p(x) */</div><div class='del'>-	.octa 0x0000000006f500000000000071db0000</div><div class='del'>-</div><div class='del'>-	/* x^70720 mod p(x), x^70656 mod p(x) */</div><div class='del'>-	.octa 0x0000000037ca000000000000ab0c0000</div><div class='del'>-</div><div class='del'>-	/* x^69696 mod p(x), x^69632 mod p(x) */</div><div class='del'>-	.octa 0x00000000d7ab000000000000b7a00000</div><div class='del'>-</div><div class='del'>-	/* x^68672 mod p(x), x^68608 mod p(x) */</div><div class='del'>-	.octa 0x00000000440800000000000090d30000</div><div class='del'>-</div><div class='del'>-	/* x^67648 mod p(x), x^67584 mod p(x) */</div><div class='del'>-	.octa 0x00000000186100000000000054730000</div><div class='del'>-</div><div class='del'>-	/* x^66624 mod p(x), x^66560 mod p(x) */</div><div class='del'>-	.octa 0x000000007368000000000000a3a20000</div><div class='del'>-</div><div class='del'>-	/* x^65600 mod p(x), x^65536 mod p(x) */</div><div class='del'>-	.octa 0x0000000026d0000000000000f9040000</div><div class='del'>-</div><div class='del'>-	/* x^64576 mod p(x), x^64512 mod p(x) */</div><div class='del'>-	.octa 0x00000000fe770000000000009c0a0000</div><div class='del'>-</div><div class='del'>-	/* x^63552 mod p(x), x^63488 mod p(x) */</div><div class='del'>-	.octa 0x000000002cba000000000000d1e70000</div><div class='del'>-</div><div class='del'>-	/* x^62528 mod p(x), x^62464 mod p(x) */</div><div class='del'>-	.octa 0x00000000f8bd0000000000005ac10000</div><div class='del'>-</div><div class='del'>-	/* x^61504 mod p(x), x^61440 mod p(x) */</div><div class='del'>-	.octa 0x000000007372000000000000d68d0000</div><div class='del'>-</div><div class='del'>-	/* x^60480 mod p(x), x^60416 mod p(x) */</div><div class='del'>-	.octa 0x00000000f37f00000000000089f60000</div><div class='del'>-</div><div class='del'>-	/* x^59456 mod p(x), x^59392 mod p(x) */</div><div class='del'>-	.octa 0x00000000078400000000000008a90000</div><div class='del'>-</div><div class='del'>-	/* x^58432 mod p(x), x^58368 mod p(x) */</div><div class='del'>-	.octa 0x00000000d3e400000000000042360000</div><div class='del'>-</div><div class='del'>-	/* x^57408 mod p(x), x^57344 mod p(x) */</div><div class='del'>-	.octa 0x00000000eba800000000000092d50000</div><div class='del'>-</div><div class='del'>-	/* x^56384 mod p(x), x^56320 mod p(x) */</div><div class='del'>-	.octa 0x00000000afbe000000000000b4d50000</div><div class='del'>-</div><div class='del'>-	/* x^55360 mod p(x), x^55296 mod p(x) */</div><div class='del'>-	.octa 0x00000000d8ca000000000000c9060000</div><div class='del'>-</div><div class='del'>-	/* x^54336 mod p(x), x^54272 mod p(x) */</div><div class='del'>-	.octa 0x00000000c2d00000000000008f4f0000</div><div class='del'>-</div><div class='del'>-	/* x^53312 mod p(x), x^53248 mod p(x) */</div><div class='del'>-	.octa 0x00000000373200000000000028690000</div><div class='del'>-</div><div class='del'>-	/* x^52288 mod p(x), x^52224 mod p(x) */</div><div class='del'>-	.octa 0x0000000046ae000000000000c3b30000</div><div class='del'>-</div><div class='del'>-	/* x^51264 mod p(x), x^51200 mod p(x) */</div><div class='del'>-	.octa 0x00000000b243000000000000f8700000</div><div class='del'>-</div><div class='del'>-	/* x^50240 mod p(x), x^50176 mod p(x) */</div><div class='del'>-	.octa 0x00000000f7f500000000000029eb0000</div><div class='del'>-</div><div class='del'>-	/* x^49216 mod p(x), x^49152 mod p(x) */</div><div class='del'>-	.octa 0x000000000c7e000000000000fe730000</div><div class='del'>-</div><div class='del'>-	/* x^48192 mod p(x), x^48128 mod p(x) */</div><div class='del'>-	.octa 0x00000000c38200000000000096000000</div><div class='del'>-</div><div class='del'>-	/* x^47168 mod p(x), x^47104 mod p(x) */</div><div class='del'>-	.octa 0x000000008956000000000000683c0000</div><div class='del'>-</div><div class='del'>-	/* x^46144 mod p(x), x^46080 mod p(x) */</div><div class='del'>-	.octa 0x00000000422d0000000000005f1e0000</div><div class='del'>-</div><div class='del'>-	/* x^45120 mod p(x), x^45056 mod p(x) */</div><div class='del'>-	.octa 0x00000000ac0f0000000000006f810000</div><div class='del'>-</div><div class='del'>-	/* x^44096 mod p(x), x^44032 mod p(x) */</div><div class='del'>-	.octa 0x00000000ce30000000000000031f0000</div><div class='del'>-</div><div class='del'>-	/* x^43072 mod p(x), x^43008 mod p(x) */</div><div class='del'>-	.octa 0x000000003d43000000000000455a0000</div><div class='del'>-</div><div class='del'>-	/* x^42048 mod p(x), x^41984 mod p(x) */</div><div class='del'>-	.octa 0x000000007ebe000000000000a6050000</div><div class='del'>-</div><div class='del'>-	/* x^41024 mod p(x), x^40960 mod p(x) */</div><div class='del'>-	.octa 0x00000000976e00000000000077eb0000</div><div class='del'>-</div><div class='del'>-	/* x^40000 mod p(x), x^39936 mod p(x) */</div><div class='del'>-	.octa 0x000000000872000000000000389c0000</div><div class='del'>-</div><div class='del'>-	/* x^38976 mod p(x), x^38912 mod p(x) */</div><div class='del'>-	.octa 0x000000008979000000000000c7b20000</div><div class='del'>-</div><div class='del'>-	/* x^37952 mod p(x), x^37888 mod p(x) */</div><div class='del'>-	.octa 0x000000005c1e0000000000001d870000</div><div class='del'>-</div><div class='del'>-	/* x^36928 mod p(x), x^36864 mod p(x) */</div><div class='del'>-	.octa 0x00000000aebb00000000000045810000</div><div class='del'>-</div><div class='del'>-	/* x^35904 mod p(x), x^35840 mod p(x) */</div><div class='del'>-	.octa 0x000000004f7e0000000000006d4a0000</div><div class='del'>-</div><div class='del'>-	/* x^34880 mod p(x), x^34816 mod p(x) */</div><div class='del'>-	.octa 0x00000000ea98000000000000b9200000</div><div class='del'>-</div><div class='del'>-	/* x^33856 mod p(x), x^33792 mod p(x) */</div><div class='del'>-	.octa 0x00000000f39600000000000022f20000</div><div class='del'>-</div><div class='del'>-	/* x^32832 mod p(x), x^32768 mod p(x) */</div><div class='del'>-	.octa 0x000000000bc500000000000041ca0000</div><div class='del'>-</div><div class='del'>-	/* x^31808 mod p(x), x^31744 mod p(x) */</div><div class='del'>-	.octa 0x00000000786400000000000078500000</div><div class='del'>-</div><div class='del'>-	/* x^30784 mod p(x), x^30720 mod p(x) */</div><div class='del'>-	.octa 0x00000000be970000000000009e7e0000</div><div class='del'>-</div><div class='del'>-	/* x^29760 mod p(x), x^29696 mod p(x) */</div><div class='del'>-	.octa 0x00000000dd6d000000000000a53c0000</div><div class='del'>-</div><div class='del'>-	/* x^28736 mod p(x), x^28672 mod p(x) */</div><div class='del'>-	.octa 0x000000004c3f00000000000039340000</div><div class='del'>-</div><div class='del'>-	/* x^27712 mod p(x), x^27648 mod p(x) */</div><div class='del'>-	.octa 0x0000000093a4000000000000b58e0000</div><div class='del'>-</div><div class='del'>-	/* x^26688 mod p(x), x^26624 mod p(x) */</div><div class='del'>-	.octa 0x0000000050fb00000000000062d40000</div><div class='del'>-</div><div class='del'>-	/* x^25664 mod p(x), x^25600 mod p(x) */</div><div class='del'>-	.octa 0x00000000f505000000000000a26f0000</div><div class='del'>-</div><div class='del'>-	/* x^24640 mod p(x), x^24576 mod p(x) */</div><div class='del'>-	.octa 0x0000000064f900000000000065e60000</div><div class='del'>-</div><div class='del'>-	/* x^23616 mod p(x), x^23552 mod p(x) */</div><div class='del'>-	.octa 0x00000000e8c2000000000000aad90000</div><div class='del'>-</div><div class='del'>-	/* x^22592 mod p(x), x^22528 mod p(x) */</div><div class='del'>-	.octa 0x00000000720b000000000000a3b00000</div><div class='del'>-</div><div class='del'>-	/* x^21568 mod p(x), x^21504 mod p(x) */</div><div class='del'>-	.octa 0x00000000e992000000000000d2680000</div><div class='del'>-</div><div class='del'>-	/* x^20544 mod p(x), x^20480 mod p(x) */</div><div class='del'>-	.octa 0x000000009132000000000000cf4c0000</div><div class='del'>-</div><div class='del'>-	/* x^19520 mod p(x), x^19456 mod p(x) */</div><div class='del'>-	.octa 0x00000000608a00000000000076610000</div><div class='del'>-</div><div class='del'>-	/* x^18496 mod p(x), x^18432 mod p(x) */</div><div class='del'>-	.octa 0x000000009948000000000000fb9f0000</div><div class='del'>-</div><div class='del'>-	/* x^17472 mod p(x), x^17408 mod p(x) */</div><div class='del'>-	.octa 0x00000000173000000000000003770000</div><div class='del'>-</div><div class='del'>-	/* x^16448 mod p(x), x^16384 mod p(x) */</div><div class='del'>-	.octa 0x000000006fe300000000000004880000</div><div class='del'>-</div><div class='del'>-	/* x^15424 mod p(x), x^15360 mod p(x) */</div><div class='del'>-	.octa 0x00000000e15300000000000056a70000</div><div class='del'>-</div><div class='del'>-	/* x^14400 mod p(x), x^14336 mod p(x) */</div><div class='del'>-	.octa 0x0000000092d60000000000009dfd0000</div><div class='del'>-</div><div class='del'>-	/* x^13376 mod p(x), x^13312 mod p(x) */</div><div class='del'>-	.octa 0x0000000002fd00000000000074c80000</div><div class='del'>-</div><div class='del'>-	/* x^12352 mod p(x), x^12288 mod p(x) */</div><div class='del'>-	.octa 0x00000000c78b000000000000a3ec0000</div><div class='del'>-</div><div class='del'>-	/* x^11328 mod p(x), x^11264 mod p(x) */</div><div class='del'>-	.octa 0x000000009262000000000000b3530000</div><div class='del'>-</div><div class='del'>-	/* x^10304 mod p(x), x^10240 mod p(x) */</div><div class='del'>-	.octa 0x0000000084f200000000000047bf0000</div><div class='del'>-</div><div class='del'>-	/* x^9280 mod p(x), x^9216 mod p(x) */</div><div class='del'>-	.octa 0x0000000067ee000000000000e97c0000</div><div class='del'>-</div><div class='del'>-	/* x^8256 mod p(x), x^8192 mod p(x) */</div><div class='del'>-	.octa 0x00000000535b00000000000091e10000</div><div class='del'>-</div><div class='del'>-	/* x^7232 mod p(x), x^7168 mod p(x) */</div><div class='del'>-	.octa 0x000000007ebb00000000000055060000</div><div class='del'>-</div><div class='del'>-	/* x^6208 mod p(x), x^6144 mod p(x) */</div><div class='del'>-	.octa 0x00000000c6a1000000000000fd360000</div><div class='del'>-</div><div class='del'>-	/* x^5184 mod p(x), x^5120 mod p(x) */</div><div class='del'>-	.octa 0x000000001be500000000000055860000</div><div class='del'>-</div><div class='del'>-	/* x^4160 mod p(x), x^4096 mod p(x) */</div><div class='del'>-	.octa 0x00000000ae0e0000000000005bd00000</div><div class='del'>-</div><div class='del'>-	/* x^3136 mod p(x), x^3072 mod p(x) */</div><div class='del'>-	.octa 0x0000000022040000000000008db20000</div><div class='del'>-</div><div class='del'>-	/* x^2112 mod p(x), x^2048 mod p(x) */</div><div class='del'>-	.octa 0x00000000c9eb000000000000efe20000</div><div class='del'>-</div><div class='del'>-	/* x^1088 mod p(x), x^1024 mod p(x) */</div><div class='del'>-	.octa 0x0000000039b400000000000051d10000</div><div class='del'>-</div><div class='del'>-.short_constants:</div><div class='del'>-</div><div class='del'>-	/* Reduce final 1024-2048 bits to 64 bits, shifting 32 bits to include the trailing 32 bits of zeros */</div><div class='del'>-	/* x^2048 mod p(x), x^2016 mod p(x), x^1984 mod p(x), x^1952 mod p(x) */</div><div class='del'>-	.octa 0xefe20000dccf00009440000033590000</div><div class='del'>-</div><div class='del'>-	/* x^1920 mod p(x), x^1888 mod p(x), x^1856 mod p(x), x^1824 mod p(x) */</div><div class='del'>-	.octa 0xee6300002f3f000062180000e0ed0000</div><div class='del'>-</div><div class='del'>-	/* x^1792 mod p(x), x^1760 mod p(x), x^1728 mod p(x), x^1696 mod p(x) */</div><div class='del'>-	.octa 0xcf5f000017ef0000ccbe000023d30000</div><div class='del'>-</div><div class='del'>-	/* x^1664 mod p(x), x^1632 mod p(x), x^1600 mod p(x), x^1568 mod p(x) */</div><div class='del'>-	.octa 0x6d0c0000a30e00000920000042630000</div><div class='del'>-</div><div class='del'>-	/* x^1536 mod p(x), x^1504 mod p(x), x^1472 mod p(x), x^1440 mod p(x) */</div><div class='del'>-	.octa 0x21d30000932b0000a7a00000efcc0000</div><div class='del'>-</div><div class='del'>-	/* x^1408 mod p(x), x^1376 mod p(x), x^1344 mod p(x), x^1312 mod p(x) */</div><div class='del'>-	.octa 0x10be00000b310000666f00000d1c0000</div><div class='del'>-</div><div class='del'>-	/* x^1280 mod p(x), x^1248 mod p(x), x^1216 mod p(x), x^1184 mod p(x) */</div><div class='del'>-	.octa 0x1f240000ce9e0000caad0000589e0000</div><div class='del'>-</div><div class='del'>-	/* x^1152 mod p(x), x^1120 mod p(x), x^1088 mod p(x), x^1056 mod p(x) */</div><div class='del'>-	.octa 0x29610000d02b000039b400007cf50000</div><div class='del'>-</div><div class='del'>-	/* x^1024 mod p(x), x^992 mod p(x), x^960 mod p(x), x^928 mod p(x) */</div><div class='del'>-	.octa 0x51d100009d9d00003c0e0000bfd60000</div><div class='del'>-</div><div class='del'>-	/* x^896 mod p(x), x^864 mod p(x), x^832 mod p(x), x^800 mod p(x) */</div><div class='del'>-	.octa 0xda390000ceae000013830000713c0000</div><div class='del'>-</div><div class='del'>-	/* x^768 mod p(x), x^736 mod p(x), x^704 mod p(x), x^672 mod p(x) */</div><div class='del'>-	.octa 0xb67800001e16000085c0000080a60000</div><div class='del'>-</div><div class='del'>-	/* x^640 mod p(x), x^608 mod p(x), x^576 mod p(x), x^544 mod p(x) */</div><div class='del'>-	.octa 0x0db40000f7f90000371d0000e6580000</div><div class='del'>-</div><div class='del'>-	/* x^512 mod p(x), x^480 mod p(x), x^448 mod p(x), x^416 mod p(x) */</div><div class='del'>-	.octa 0x87e70000044c0000aadb0000a4970000</div><div class='del'>-</div><div class='del'>-	/* x^384 mod p(x), x^352 mod p(x), x^320 mod p(x), x^288 mod p(x) */</div><div class='del'>-	.octa 0x1f990000ad180000d8b30000e7b50000</div><div class='del'>-</div><div class='del'>-	/* x^256 mod p(x), x^224 mod p(x), x^192 mod p(x), x^160 mod p(x) */</div><div class='del'>-	.octa 0xbe6c00006ee300004c1a000006df0000</div><div class='del'>-</div><div class='del'>-	/* x^128 mod p(x), x^96 mod p(x), x^64 mod p(x), x^32 mod p(x) */</div><div class='del'>-	.octa 0xfb0b00002d560000136800008bb70000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.barrett_constants:</div><div class='del'>-	/* Barrett constant m - (4^32)/n */</div><div class='del'>-	.octa 0x000000000000000000000001f65a57f8	/* x^64 div p(x) */</div><div class='del'>-	/* Barrett constant n */</div><div class='del'>-	.octa 0x0000000000000000000000018bb70000</div><div class='del'>-</div><div class='del'>-#define CRC_FUNCTION_NAME __crct10dif_vpmsum</div><div class='del'>-#include "crc32-vpmsum_core.S"</div><div class='head'>diff --git a/arch/powerpc/crypto/crct10dif-vpmsum_glue.c b/arch/powerpc/crypto/crct10dif-vpmsum_glue.c<br/>deleted file mode 100644<br/>index 1dc8b6915178..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/crct10dif-vpmsum_glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/crct10dif-vpmsum_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,126 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Calculate a CRC T10-DIF with vpmsum acceleration</div><div class='del'>- *</div><div class='del'>- * Copyright 2017, Daniel Axtens, IBM Corporation.</div><div class='del'>- * [based on crc32c-vpmsum_glue.c]</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crc-t10dif.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-#define VMX_ALIGN		16</div><div class='del'>-#define VMX_ALIGN_MASK		(VMX_ALIGN-1)</div><div class='del'>-</div><div class='del'>-#define VECTOR_BREAKPOINT	64</div><div class='del'>-</div><div class='del'>-u32 __crct10dif_vpmsum(u32 crc, unsigned char const *p, size_t len);</div><div class='del'>-</div><div class='del'>-static u16 crct10dif_vpmsum(u16 crci, unsigned char const *p, size_t len)</div><div class='del'>-{</div><div class='del'>-	unsigned int prealign;</div><div class='del'>-	unsigned int tail;</div><div class='del'>-	u32 crc = crci;</div><div class='del'>-</div><div class='del'>-	if (len &lt; (VECTOR_BREAKPOINT + VMX_ALIGN) || !crypto_simd_usable())</div><div class='del'>-		return crc_t10dif_generic(crc, p, len);</div><div class='del'>-</div><div class='del'>-	if ((unsigned long)p &amp; VMX_ALIGN_MASK) {</div><div class='del'>-		prealign = VMX_ALIGN - ((unsigned long)p &amp; VMX_ALIGN_MASK);</div><div class='del'>-		crc = crc_t10dif_generic(crc, p, prealign);</div><div class='del'>-		len -= prealign;</div><div class='del'>-		p += prealign;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp; ~VMX_ALIGN_MASK) {</div><div class='del'>-		crc &lt;&lt;= 16;</div><div class='del'>-		preempt_disable();</div><div class='del'>-		pagefault_disable();</div><div class='del'>-		enable_kernel_altivec();</div><div class='del'>-		crc = __crct10dif_vpmsum(crc, p, len &amp; ~VMX_ALIGN_MASK);</div><div class='del'>-		disable_kernel_altivec();</div><div class='del'>-		pagefault_enable();</div><div class='del'>-		preempt_enable();</div><div class='del'>-		crc &gt;&gt;= 16;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tail = len &amp; VMX_ALIGN_MASK;</div><div class='del'>-	if (tail) {</div><div class='del'>-		p += len &amp; ~VMX_ALIGN_MASK;</div><div class='del'>-		crc = crc_t10dif_generic(crc, p, tail);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crc &amp; 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_vpmsum_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crct10dif_vpmsum_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int length)</div><div class='del'>-{</div><div class='del'>-	u16 *crc = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*crc = crct10dif_vpmsum(*crc, data, length);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int crct10dif_vpmsum_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	u16 *crcp = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*(u16 *)out = *crcp;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.init		= crct10dif_vpmsum_init,</div><div class='del'>-	.update		= crct10dif_vpmsum_update,</div><div class='del'>-	.final		= crct10dif_vpmsum_final,</div><div class='del'>-	.descsize	= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-	.digestsize	= CRC_T10DIF_DIGEST_SIZE,</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "crct10dif",</div><div class='del'>-		.cra_driver_name	= "crct10dif-vpmsum",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= CRC_T10DIF_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init crct10dif_vpmsum_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_ARCH_207S))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit crct10dif_vpmsum_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(PPC_MODULE_FEATURE_VEC_CRYPTO, crct10dif_vpmsum_mod_init);</div><div class='del'>-module_exit(crct10dif_vpmsum_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Daniel Axtens &lt;dja@axtens.net&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CRCT10DIF using vector polynomial multiply-sum instructions");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crct10dif");</div><div class='del'>-MODULE_ALIAS_CRYPTO("crct10dif-vpmsum");</div><div class='head'>diff --git a/arch/powerpc/crypto/curve25519-ppc64le-core.c b/arch/powerpc/crypto/curve25519-ppc64le-core.c<br/>deleted file mode 100644<br/>index f7810be0b292..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/curve25519-ppc64le-core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/curve25519-ppc64le-core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,300 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright 2024- IBM Corp.</div><div class='del'>- *</div><div class='del'>- * X25519 scalar multiplication with 51 bits limbs for PPC64le.</div><div class='del'>- *   Based on RFC7748 and AArch64 optimized implementation for X25519</div><div class='del'>- *     - Algorithm 1 Scalar multiplication of a variable point</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/curve25519.h&gt;</div><div class='del'>-#include &lt;crypto/internal/kpp.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/processor.h&gt;</div><div class='del'>-</div><div class='del'>-typedef uint64_t fe51[5];</div><div class='del'>-</div><div class='del'>-asmlinkage void x25519_fe51_mul(fe51 h, const fe51 f, const fe51 g);</div><div class='del'>-asmlinkage void x25519_fe51_sqr(fe51 h, const fe51 f);</div><div class='del'>-asmlinkage void x25519_fe51_mul121666(fe51 h, fe51 f);</div><div class='del'>-asmlinkage void x25519_fe51_sqr_times(fe51 h, const fe51 f, int n);</div><div class='del'>-asmlinkage void x25519_fe51_frombytes(fe51 h, const uint8_t *s);</div><div class='del'>-asmlinkage void x25519_fe51_tobytes(uint8_t *s, const fe51 h);</div><div class='del'>-asmlinkage void x25519_cswap(fe51 p, fe51 q, unsigned int bit);</div><div class='del'>-</div><div class='del'>-#define fmul x25519_fe51_mul</div><div class='del'>-#define fsqr x25519_fe51_sqr</div><div class='del'>-#define fmul121666 x25519_fe51_mul121666</div><div class='del'>-#define fe51_tobytes x25519_fe51_tobytes</div><div class='del'>-</div><div class='del'>-static void fadd(fe51 h, const fe51 f, const fe51 g)</div><div class='del'>-{</div><div class='del'>-	h[0] = f[0] + g[0];</div><div class='del'>-	h[1] = f[1] + g[1];</div><div class='del'>-	h[2] = f[2] + g[2];</div><div class='del'>-	h[3] = f[3] + g[3];</div><div class='del'>-	h[4] = f[4] + g[4];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Prime = 2 ** 255 - 19, 255 bits</div><div class='del'>- *    (0x7fffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffed)</div><div class='del'>- *</div><div class='del'>- * Prime in 5 51-bit limbs</div><div class='del'>- */</div><div class='del'>-static fe51 prime51 = { 0x7ffffffffffed, 0x7ffffffffffff, 0x7ffffffffffff, 0x7ffffffffffff, 0x7ffffffffffff};</div><div class='del'>-</div><div class='del'>-static void fsub(fe51 h, const fe51 f, const fe51 g)</div><div class='del'>-{</div><div class='del'>-	h[0] = (f[0] + ((prime51[0] * 2))) - g[0];</div><div class='del'>-	h[1] = (f[1] + ((prime51[1] * 2))) - g[1];</div><div class='del'>-	h[2] = (f[2] + ((prime51[2] * 2))) - g[2];</div><div class='del'>-	h[3] = (f[3] + ((prime51[3] * 2))) - g[3];</div><div class='del'>-	h[4] = (f[4] + ((prime51[4] * 2))) - g[4];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fe51_frombytes(fe51 h, const uint8_t *s)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Make sure 64-bit aligned.</div><div class='del'>-	 */</div><div class='del'>-	unsigned char sbuf[32+8];</div><div class='del'>-	unsigned char *sb = PTR_ALIGN((void *)sbuf, 8);</div><div class='del'>-</div><div class='del'>-	memcpy(sb, s, 32);</div><div class='del'>-	x25519_fe51_frombytes(h, sb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void finv(fe51 o, const fe51 i)</div><div class='del'>-{</div><div class='del'>-	fe51 a0, b, c, t00;</div><div class='del'>-</div><div class='del'>-	fsqr(a0, i);</div><div class='del'>-	x25519_fe51_sqr_times(t00, a0, 2);</div><div class='del'>-</div><div class='del'>-	fmul(b, t00, i);</div><div class='del'>-	fmul(a0, b, a0);</div><div class='del'>-</div><div class='del'>-	fsqr(t00, a0);</div><div class='del'>-</div><div class='del'>-	fmul(b, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, b, 5);</div><div class='del'>-</div><div class='del'>-	fmul(b, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, b, 10);</div><div class='del'>-</div><div class='del'>-	fmul(c, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, c, 20);</div><div class='del'>-</div><div class='del'>-	fmul(t00, t00, c);</div><div class='del'>-	x25519_fe51_sqr_times(t00, t00, 10);</div><div class='del'>-</div><div class='del'>-	fmul(b, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, b, 50);</div><div class='del'>-</div><div class='del'>-	fmul(c, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, c, 100);</div><div class='del'>-</div><div class='del'>-	fmul(t00, t00, c);</div><div class='del'>-	x25519_fe51_sqr_times(t00, t00, 50);</div><div class='del'>-</div><div class='del'>-	fmul(t00, t00, b);</div><div class='del'>-	x25519_fe51_sqr_times(t00, t00, 5);</div><div class='del'>-</div><div class='del'>-	fmul(o, t00, a0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void curve25519_fe51(uint8_t out[32], const uint8_t scalar[32],</div><div class='del'>-			    const uint8_t point[32])</div><div class='del'>-{</div><div class='del'>-	fe51 x1, x2, z2, x3, z3;</div><div class='del'>-	uint8_t s[32];</div><div class='del'>-	unsigned int swap = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	memcpy(s, scalar, 32);</div><div class='del'>-	s[0]  &amp;= 0xf8;</div><div class='del'>-	s[31] &amp;= 0x7f;</div><div class='del'>-	s[31] |= 0x40;</div><div class='del'>-	fe51_frombytes(x1, point);</div><div class='del'>-</div><div class='del'>-	z2[0] = z2[1] = z2[2] = z2[3] = z2[4] = 0;</div><div class='del'>-	x3[0] = x1[0];</div><div class='del'>-	x3[1] = x1[1];</div><div class='del'>-	x3[2] = x1[2];</div><div class='del'>-	x3[3] = x1[3];</div><div class='del'>-	x3[4] = x1[4];</div><div class='del'>-</div><div class='del'>-	x2[0] = z3[0] = 1;</div><div class='del'>-	x2[1] = z3[1] = 0;</div><div class='del'>-	x2[2] = z3[2] = 0;</div><div class='del'>-	x2[3] = z3[3] = 0;</div><div class='del'>-	x2[4] = z3[4] = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 254; i &gt;= 0; --i) {</div><div class='del'>-		unsigned int k_t = 1 &amp; (s[i / 8] &gt;&gt; (i &amp; 7));</div><div class='del'>-		fe51 a, b, c, d, e;</div><div class='del'>-		fe51 da, cb, aa, bb;</div><div class='del'>-		fe51 dacb_p, dacb_m;</div><div class='del'>-</div><div class='del'>-		swap ^= k_t;</div><div class='del'>-		x25519_cswap(x2, x3, swap);</div><div class='del'>-		x25519_cswap(z2, z3, swap);</div><div class='del'>-		swap = k_t;</div><div class='del'>-</div><div class='del'>-		fsub(b, x2, z2);		// B = x_2 - z_2</div><div class='del'>-		fadd(a, x2, z2);		// A = x_2 + z_2</div><div class='del'>-		fsub(d, x3, z3);		// D = x_3 - z_3</div><div class='del'>-		fadd(c, x3, z3);		// C = x_3 + z_3</div><div class='del'>-</div><div class='del'>-		fsqr(bb, b);			// BB = B^2</div><div class='del'>-		fsqr(aa, a);			// AA = A^2</div><div class='del'>-		fmul(da, d, a);			// DA = D * A</div><div class='del'>-		fmul(cb, c, b);			// CB = C * B</div><div class='del'>-</div><div class='del'>-		fsub(e, aa, bb);		// E = AA - BB</div><div class='del'>-		fmul(x2, aa, bb);		// x2 = AA * BB</div><div class='del'>-		fadd(dacb_p, da, cb);		// DA + CB</div><div class='del'>-		fsub(dacb_m, da, cb);		// DA - CB</div><div class='del'>-</div><div class='del'>-		fmul121666(z3, e);		// 121666 * E</div><div class='del'>-		fsqr(z2, dacb_m);		// (DA - CB)^2</div><div class='del'>-		fsqr(x3, dacb_p);		// x3 = (DA + CB)^2</div><div class='del'>-		fadd(b, bb, z3);		// BB + 121666 * E</div><div class='del'>-		fmul(z3, x1, z2);		// z3 = x1 * (DA - CB)^2</div><div class='del'>-		fmul(z2, e, b);		// z2 = e * (BB + (DA + CB)^2)</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	finv(z2, z2);</div><div class='del'>-	fmul(x2, x2, z2);</div><div class='del'>-	fe51_tobytes(out, x2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void curve25519_arch(u8 mypublic[CURVE25519_KEY_SIZE],</div><div class='del'>-		     const u8 secret[CURVE25519_KEY_SIZE],</div><div class='del'>-		     const u8 basepoint[CURVE25519_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	curve25519_fe51(mypublic, secret, basepoint);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(curve25519_arch);</div><div class='del'>-</div><div class='del'>-void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE],</div><div class='del'>-			  const u8 secret[CURVE25519_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	curve25519_fe51(pub, secret, curve25519_base_point);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(curve25519_base_arch);</div><div class='del'>-</div><div class='del'>-static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	u8 *secret = kpp_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	if (!len)</div><div class='del'>-		curve25519_generate_secret(secret);</div><div class='del'>-	else if (len == CURVE25519_KEY_SIZE &amp;&amp;</div><div class='del'>-		 crypto_memneq(buf, curve25519_null_point, CURVE25519_KEY_SIZE))</div><div class='del'>-		memcpy(secret, buf, CURVE25519_KEY_SIZE);</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int curve25519_generate_public_key(struct kpp_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);</div><div class='del'>-	const u8 *secret = kpp_tfm_ctx(tfm);</div><div class='del'>-	u8 buf[CURVE25519_KEY_SIZE];</div><div class='del'>-	int copied, nbytes;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;src)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	curve25519_base_arch(buf, secret);</div><div class='del'>-</div><div class='del'>-	/* might want less than we've got */</div><div class='del'>-	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req-&gt;dst_len);</div><div class='del'>-	copied = sg_copy_from_buffer(req-&gt;dst, sg_nents_for_len(req-&gt;dst,</div><div class='del'>-								nbytes),</div><div class='del'>-				     buf, nbytes);</div><div class='del'>-	if (copied != nbytes)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int curve25519_compute_shared_secret(struct kpp_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);</div><div class='del'>-	const u8 *secret = kpp_tfm_ctx(tfm);</div><div class='del'>-	u8 public_key[CURVE25519_KEY_SIZE];</div><div class='del'>-	u8 buf[CURVE25519_KEY_SIZE];</div><div class='del'>-	int copied, nbytes;</div><div class='del'>-</div><div class='del'>-	if (!req-&gt;src)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	copied = sg_copy_to_buffer(req-&gt;src,</div><div class='del'>-				   sg_nents_for_len(req-&gt;src,</div><div class='del'>-						    CURVE25519_KEY_SIZE),</div><div class='del'>-				   public_key, CURVE25519_KEY_SIZE);</div><div class='del'>-	if (copied != CURVE25519_KEY_SIZE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	curve25519_arch(buf, secret, public_key);</div><div class='del'>-</div><div class='del'>-	/* might want less than we've got */</div><div class='del'>-	nbytes = min_t(size_t, CURVE25519_KEY_SIZE, req-&gt;dst_len);</div><div class='del'>-	copied = sg_copy_from_buffer(req-&gt;dst, sg_nents_for_len(req-&gt;dst,</div><div class='del'>-								nbytes),</div><div class='del'>-				     buf, nbytes);</div><div class='del'>-	if (copied != nbytes)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int curve25519_max_size(struct crypto_kpp *tfm)</div><div class='del'>-{</div><div class='del'>-	return CURVE25519_KEY_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct kpp_alg curve25519_alg = {</div><div class='del'>-	.base.cra_name		= "curve25519",</div><div class='del'>-	.base.cra_driver_name	= "curve25519-ppc64le",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_ctxsize	= CURVE25519_KEY_SIZE,</div><div class='del'>-</div><div class='del'>-	.set_secret		= curve25519_set_secret,</div><div class='del'>-	.generate_public_key	= curve25519_generate_public_key,</div><div class='del'>-	.compute_shared_secret	= curve25519_compute_shared_secret,</div><div class='del'>-	.max_size		= curve25519_max_size,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init curve25519_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_KPP) ?</div><div class='del'>-		crypto_register_kpp(&amp;curve25519_alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit curve25519_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_KPP))</div><div class='del'>-		crypto_unregister_kpp(&amp;curve25519_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(curve25519_mod_init);</div><div class='del'>-module_exit(curve25519_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("curve25519");</div><div class='del'>-MODULE_ALIAS_CRYPTO("curve25519-ppc64le");</div><div class='del'>-MODULE_DESCRIPTION("PPC64le Curve25519 scalar multiplication with 51 bits limbs");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_AUTHOR("Danny Tsen &lt;dtsen@us.ibm.com&gt;");</div><div class='head'>diff --git a/arch/powerpc/crypto/curve25519-ppc64le_asm.S b/arch/powerpc/crypto/curve25519-ppc64le_asm.S<br/>deleted file mode 100644<br/>index 06c1febe24b9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/curve25519-ppc64le_asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/curve25519-ppc64le_asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,671 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-#</div><div class='del'>-# This code is taken from CRYPTOGAMs[1] and is included here using the option</div><div class='del'>-# in the license to distribute the code under the GPL. Therefore this program</div><div class='del'>-# is free software; you can redistribute it and/or modify it under the terms of</div><div class='del'>-# the GNU General Public License version 2 as published by the Free Software</div><div class='del'>-# Foundation.</div><div class='del'>-#</div><div class='del'>-# [1] https://github.com/dot-asm/cryptogams/</div><div class='del'>-</div><div class='del'>-# Copyright (c) 2006-2017, CRYPTOGAMS by &lt;appro@openssl.org&gt;</div><div class='del'>-# All rights reserved.</div><div class='del'>-#</div><div class='del'>-# Redistribution and use in source and binary forms, with or without</div><div class='del'>-# modification, are permitted provided that the following conditions</div><div class='del'>-# are met:</div><div class='del'>-#</div><div class='del'>-#       * Redistributions of source code must retain copyright notices,</div><div class='del'>-#         this list of conditions and the following disclaimer.</div><div class='del'>-#</div><div class='del'>-#       * Redistributions in binary form must reproduce the above</div><div class='del'>-#         copyright notice, this list of conditions and the following</div><div class='del'>-#         disclaimer in the documentation and/or other materials</div><div class='del'>-#         provided with the distribution.</div><div class='del'>-#</div><div class='del'>-#       * Neither the name of the CRYPTOGAMS nor the names of its</div><div class='del'>-#         copyright holder and contributors may be used to endorse or</div><div class='del'>-#         promote products derived from this software without specific</div><div class='del'>-#         prior written permission.</div><div class='del'>-#</div><div class='del'>-# ALTERNATIVELY, provided that this notice is retained in full, this</div><div class='del'>-# product may be distributed under the terms of the GNU General Public</div><div class='del'>-# License (GPL), in which case the provisions of the GPL apply INSTEAD OF</div><div class='del'>-# those given above.</div><div class='del'>-#</div><div class='del'>-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS</div><div class='del'>-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written by Andy Polyakov &lt;appro@openssl.org&gt; for the OpenSSL</div><div class='del'>-# project. The module is, however, dual licensed under OpenSSL and</div><div class='del'>-# CRYPTOGAMS licenses depending on where you obtain it. For further</div><div class='del'>-# details see https://www.openssl.org/~appro/cryptogams/.</div><div class='del'>-# ====================================================================</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# ====================================================================</div><div class='del'>-# Written and Modified by Danny Tsen &lt;dtsen@us.ibm.com&gt;</div><div class='del'>-# - Added x25519_fe51_sqr_times, x25519_fe51_frombytes, x25519_fe51_tobytes</div><div class='del'>-#   and x25519_cswap</div><div class='del'>-#</div><div class='del'>-# Copyright 2024- IBM Corp.</div><div class='del'>-#</div><div class='del'>-# X25519 lower-level primitives for PPC64.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_mul)</div><div class='del'>-</div><div class='del'>-	stdu	1,-144(1)</div><div class='del'>-	std	21,56(1)</div><div class='del'>-	std	22,64(1)</div><div class='del'>-	std	23,72(1)</div><div class='del'>-	std	24,80(1)</div><div class='del'>-	std	25,88(1)</div><div class='del'>-	std	26,96(1)</div><div class='del'>-	std	27,104(1)</div><div class='del'>-	std	28,112(1)</div><div class='del'>-	std	29,120(1)</div><div class='del'>-	std	30,128(1)</div><div class='del'>-	std	31,136(1)</div><div class='del'>-</div><div class='del'>-	ld	6,0(5)</div><div class='del'>-	ld	7,0(4)</div><div class='del'>-	ld	8,8(4)</div><div class='del'>-	ld	9,16(4)</div><div class='del'>-	ld	10,24(4)</div><div class='del'>-	ld	11,32(4)</div><div class='del'>-</div><div class='del'>-	mulld	22,7,6</div><div class='del'>-	mulhdu	23,7,6</div><div class='del'>-</div><div class='del'>-	mulld	24,8,6</div><div class='del'>-	mulhdu	25,8,6</div><div class='del'>-</div><div class='del'>-	mulld	30,11,6</div><div class='del'>-	mulhdu	31,11,6</div><div class='del'>-	ld	4,8(5)</div><div class='del'>-	mulli	11,11,19</div><div class='del'>-</div><div class='del'>-	mulld	26,9,6</div><div class='del'>-	mulhdu	27,9,6</div><div class='del'>-</div><div class='del'>-	mulld	28,10,6</div><div class='del'>-	mulhdu	29,10,6</div><div class='del'>-	mulld	12,11,4</div><div class='del'>-	mulhdu	21,11,4</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,21</div><div class='del'>-</div><div class='del'>-	mulld	12,7,4</div><div class='del'>-	mulhdu	21,7,4</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,21</div><div class='del'>-</div><div class='del'>-	mulld	12,10,4</div><div class='del'>-	mulhdu	21,10,4</div><div class='del'>-	ld	6,16(5)</div><div class='del'>-	mulli	10,10,19</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,21</div><div class='del'>-</div><div class='del'>-	mulld	12,8,4</div><div class='del'>-	mulhdu	21,8,4</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,21</div><div class='del'>-</div><div class='del'>-	mulld	12,9,4</div><div class='del'>-	mulhdu	21,9,4</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,21</div><div class='del'>-	mulld	12,10,6</div><div class='del'>-	mulhdu	21,10,6</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,21</div><div class='del'>-</div><div class='del'>-	mulld	12,11,6</div><div class='del'>-	mulhdu	21,11,6</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,21</div><div class='del'>-</div><div class='del'>-	mulld	12,9,6</div><div class='del'>-	mulhdu	21,9,6</div><div class='del'>-	ld	4,24(5)</div><div class='del'>-	mulli	9,9,19</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,21</div><div class='del'>-</div><div class='del'>-	mulld	12,7,6</div><div class='del'>-	mulhdu	21,7,6</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,21</div><div class='del'>-</div><div class='del'>-	mulld	12,8,6</div><div class='del'>-	mulhdu	21,8,6</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,21</div><div class='del'>-	mulld	12,9,4</div><div class='del'>-	mulhdu	21,9,4</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,21</div><div class='del'>-</div><div class='del'>-	mulld	12,10,4</div><div class='del'>-	mulhdu	21,10,4</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,21</div><div class='del'>-</div><div class='del'>-	mulld	12,8,4</div><div class='del'>-	mulhdu	21,8,4</div><div class='del'>-	ld	6,32(5)</div><div class='del'>-	mulli	8,8,19</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,21</div><div class='del'>-</div><div class='del'>-	mulld	12,11,4</div><div class='del'>-	mulhdu	21,11,4</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,21</div><div class='del'>-</div><div class='del'>-	mulld	12,7,4</div><div class='del'>-	mulhdu	21,7,4</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,21</div><div class='del'>-	mulld	12,8,6</div><div class='del'>-	mulhdu	21,8,6</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,21</div><div class='del'>-</div><div class='del'>-	mulld	12,9,6</div><div class='del'>-	mulhdu	21,9,6</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,21</div><div class='del'>-</div><div class='del'>-	mulld	12,10,6</div><div class='del'>-	mulhdu	21,10,6</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,21</div><div class='del'>-</div><div class='del'>-	mulld	12,11,6</div><div class='del'>-	mulhdu	21,11,6</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,21</div><div class='del'>-</div><div class='del'>-	mulld	12,7,6</div><div class='del'>-	mulhdu	21,7,6</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,21</div><div class='del'>-</div><div class='del'>-.Lfe51_reduce:</div><div class='del'>-	li	0,-1</div><div class='del'>-	srdi	0,0,13</div><div class='del'>-</div><div class='del'>-	srdi	12,26,51</div><div class='del'>-	and	9,26,0</div><div class='del'>-	insrdi	12,27,51,0</div><div class='del'>-	srdi	21,22,51</div><div class='del'>-	and	7,22,0</div><div class='del'>-	insrdi	21,23,51,0</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	addze	29,29</div><div class='del'>-	addc	24,24,21</div><div class='del'>-	addze	25,25</div><div class='del'>-</div><div class='del'>-	srdi	12,28,51</div><div class='del'>-	and	10,28,0</div><div class='del'>-	insrdi	12,29,51,0</div><div class='del'>-	srdi	21,24,51</div><div class='del'>-	and	8,24,0</div><div class='del'>-	insrdi	21,25,51,0</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	addze	31,31</div><div class='del'>-	add	9,9,21</div><div class='del'>-</div><div class='del'>-	srdi	12,30,51</div><div class='del'>-	and	11,30,0</div><div class='del'>-	insrdi	12,31,51,0</div><div class='del'>-	mulli	12,12,19</div><div class='del'>-</div><div class='del'>-	add	7,7,12</div><div class='del'>-</div><div class='del'>-	srdi	21,9,51</div><div class='del'>-	and	9,9,0</div><div class='del'>-	add	10,10,21</div><div class='del'>-</div><div class='del'>-	srdi	12,7,51</div><div class='del'>-	and	7,7,0</div><div class='del'>-	add	8,8,12</div><div class='del'>-</div><div class='del'>-	std	9,16(3)</div><div class='del'>-	std	10,24(3)</div><div class='del'>-	std	11,32(3)</div><div class='del'>-	std	7,0(3)</div><div class='del'>-	std	8,8(3)</div><div class='del'>-</div><div class='del'>-	ld	21,56(1)</div><div class='del'>-	ld	22,64(1)</div><div class='del'>-	ld	23,72(1)</div><div class='del'>-	ld	24,80(1)</div><div class='del'>-	ld	25,88(1)</div><div class='del'>-	ld	26,96(1)</div><div class='del'>-	ld	27,104(1)</div><div class='del'>-	ld	28,112(1)</div><div class='del'>-	ld	29,120(1)</div><div class='del'>-	ld	30,128(1)</div><div class='del'>-	ld	31,136(1)</div><div class='del'>-	addi	1,1,144</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(x25519_fe51_mul)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_sqr)</div><div class='del'>-</div><div class='del'>-	stdu	1,-144(1)</div><div class='del'>-	std	21,56(1)</div><div class='del'>-	std	22,64(1)</div><div class='del'>-	std	23,72(1)</div><div class='del'>-	std	24,80(1)</div><div class='del'>-	std	25,88(1)</div><div class='del'>-	std	26,96(1)</div><div class='del'>-	std	27,104(1)</div><div class='del'>-	std	28,112(1)</div><div class='del'>-	std	29,120(1)</div><div class='del'>-	std	30,128(1)</div><div class='del'>-	std	31,136(1)</div><div class='del'>-</div><div class='del'>-	ld	7,0(4)</div><div class='del'>-	ld	8,8(4)</div><div class='del'>-	ld	9,16(4)</div><div class='del'>-	ld	10,24(4)</div><div class='del'>-	ld	11,32(4)</div><div class='del'>-</div><div class='del'>-	add	6,7,7</div><div class='del'>-	mulli	21,11,19</div><div class='del'>-</div><div class='del'>-	mulld	22,7,7</div><div class='del'>-	mulhdu	23,7,7</div><div class='del'>-	mulld	24,8,6</div><div class='del'>-	mulhdu	25,8,6</div><div class='del'>-	mulld	26,9,6</div><div class='del'>-	mulhdu	27,9,6</div><div class='del'>-	mulld	28,10,6</div><div class='del'>-	mulhdu	29,10,6</div><div class='del'>-	mulld	30,11,6</div><div class='del'>-	mulhdu	31,11,6</div><div class='del'>-	add	6,8,8</div><div class='del'>-	mulld	12,11,21</div><div class='del'>-	mulhdu	11,11,21</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,11</div><div class='del'>-</div><div class='del'>-	mulli	5,10,19</div><div class='del'>-</div><div class='del'>-	mulld	12,8,8</div><div class='del'>-	mulhdu	11,8,8</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,11</div><div class='del'>-	mulld	12,9,6</div><div class='del'>-	mulhdu	11,9,6</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,11</div><div class='del'>-	mulld	12,10,6</div><div class='del'>-	mulhdu	11,10,6</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,11</div><div class='del'>-	mulld	12,21,6</div><div class='del'>-	mulhdu	11,21,6</div><div class='del'>-	add	6,10,10</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,11</div><div class='del'>-	mulld	12,10,5</div><div class='del'>-	mulhdu	10,10,5</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,10</div><div class='del'>-	mulld	12,6,21</div><div class='del'>-	mulhdu	10,6,21</div><div class='del'>-	add	6,9,9</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,10</div><div class='del'>-</div><div class='del'>-	mulld	12,9,9</div><div class='del'>-	mulhdu	10,9,9</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,10</div><div class='del'>-	mulld	12,5,6</div><div class='del'>-	mulhdu	10,5,6</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,10</div><div class='del'>-	mulld	12,21,6</div><div class='del'>-	mulhdu	10,21,6</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,10</div><div class='del'>-</div><div class='del'>-	b	.Lfe51_reduce</div><div class='del'>-SYM_FUNC_END(x25519_fe51_sqr)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_mul121666)</div><div class='del'>-</div><div class='del'>-	stdu	1,-144(1)</div><div class='del'>-	std	21,56(1)</div><div class='del'>-	std	22,64(1)</div><div class='del'>-	std	23,72(1)</div><div class='del'>-	std	24,80(1)</div><div class='del'>-	std	25,88(1)</div><div class='del'>-	std	26,96(1)</div><div class='del'>-	std	27,104(1)</div><div class='del'>-	std	28,112(1)</div><div class='del'>-	std	29,120(1)</div><div class='del'>-	std	30,128(1)</div><div class='del'>-	std	31,136(1)</div><div class='del'>-</div><div class='del'>-	lis	6,1</div><div class='del'>-	ori	6,6,56130</div><div class='del'>-	ld	7,0(4)</div><div class='del'>-	ld	8,8(4)</div><div class='del'>-	ld	9,16(4)</div><div class='del'>-	ld	10,24(4)</div><div class='del'>-	ld	11,32(4)</div><div class='del'>-</div><div class='del'>-	mulld	22,7,6</div><div class='del'>-	mulhdu	23,7,6</div><div class='del'>-	mulld	24,8,6</div><div class='del'>-	mulhdu	25,8,6</div><div class='del'>-	mulld	26,9,6</div><div class='del'>-	mulhdu	27,9,6</div><div class='del'>-	mulld	28,10,6</div><div class='del'>-	mulhdu	29,10,6</div><div class='del'>-	mulld	30,11,6</div><div class='del'>-	mulhdu	31,11,6</div><div class='del'>-</div><div class='del'>-	b	.Lfe51_reduce</div><div class='del'>-SYM_FUNC_END(x25519_fe51_mul121666)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_sqr_times)</div><div class='del'>-</div><div class='del'>-	stdu	1,-144(1)</div><div class='del'>-	std	21,56(1)</div><div class='del'>-	std	22,64(1)</div><div class='del'>-	std	23,72(1)</div><div class='del'>-	std	24,80(1)</div><div class='del'>-	std	25,88(1)</div><div class='del'>-	std	26,96(1)</div><div class='del'>-	std	27,104(1)</div><div class='del'>-	std	28,112(1)</div><div class='del'>-	std	29,120(1)</div><div class='del'>-	std	30,128(1)</div><div class='del'>-	std	31,136(1)</div><div class='del'>-</div><div class='del'>-	ld	7,0(4)</div><div class='del'>-	ld	8,8(4)</div><div class='del'>-	ld	9,16(4)</div><div class='del'>-	ld	10,24(4)</div><div class='del'>-	ld	11,32(4)</div><div class='del'>-</div><div class='del'>-	mtctr	5</div><div class='del'>-</div><div class='del'>-.Lsqr_times_loop:</div><div class='del'>-	add	6,7,7</div><div class='del'>-	mulli	21,11,19</div><div class='del'>-</div><div class='del'>-	mulld	22,7,7</div><div class='del'>-	mulhdu	23,7,7</div><div class='del'>-	mulld	24,8,6</div><div class='del'>-	mulhdu	25,8,6</div><div class='del'>-	mulld	26,9,6</div><div class='del'>-	mulhdu	27,9,6</div><div class='del'>-	mulld	28,10,6</div><div class='del'>-	mulhdu	29,10,6</div><div class='del'>-	mulld	30,11,6</div><div class='del'>-	mulhdu	31,11,6</div><div class='del'>-	add	6,8,8</div><div class='del'>-	mulld	12,11,21</div><div class='del'>-	mulhdu	11,11,21</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,11</div><div class='del'>-</div><div class='del'>-	mulli	5,10,19</div><div class='del'>-</div><div class='del'>-	mulld	12,8,8</div><div class='del'>-	mulhdu	11,8,8</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,11</div><div class='del'>-	mulld	12,9,6</div><div class='del'>-	mulhdu	11,9,6</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	adde	29,29,11</div><div class='del'>-	mulld	12,10,6</div><div class='del'>-	mulhdu	11,10,6</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,11</div><div class='del'>-	mulld	12,21,6</div><div class='del'>-	mulhdu	11,21,6</div><div class='del'>-	add	6,10,10</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,11</div><div class='del'>-	mulld	12,10,5</div><div class='del'>-	mulhdu	10,10,5</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,10</div><div class='del'>-	mulld	12,6,21</div><div class='del'>-	mulhdu	10,6,21</div><div class='del'>-	add	6,9,9</div><div class='del'>-	addc	26,26,12</div><div class='del'>-	adde	27,27,10</div><div class='del'>-</div><div class='del'>-	mulld	12,9,9</div><div class='del'>-	mulhdu	10,9,9</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	adde	31,31,10</div><div class='del'>-	mulld	12,5,6</div><div class='del'>-	mulhdu	10,5,6</div><div class='del'>-	addc	22,22,12</div><div class='del'>-	adde	23,23,10</div><div class='del'>-	mulld	12,21,6</div><div class='del'>-	mulhdu	10,21,6</div><div class='del'>-	addc	24,24,12</div><div class='del'>-	adde	25,25,10</div><div class='del'>-</div><div class='del'>-	# fe51_reduce</div><div class='del'>-	li	0,-1</div><div class='del'>-	srdi	0,0,13</div><div class='del'>-</div><div class='del'>-	srdi	12,26,51</div><div class='del'>-	and	9,26,0</div><div class='del'>-	insrdi	12,27,51,0</div><div class='del'>-	srdi	21,22,51</div><div class='del'>-	and	7,22,0</div><div class='del'>-	insrdi	21,23,51,0</div><div class='del'>-	addc	28,28,12</div><div class='del'>-	addze	29,29</div><div class='del'>-	addc	24,24,21</div><div class='del'>-	addze	25,25</div><div class='del'>-</div><div class='del'>-	srdi	12,28,51</div><div class='del'>-	and	10,28,0</div><div class='del'>-	insrdi	12,29,51,0</div><div class='del'>-	srdi	21,24,51</div><div class='del'>-	and	8,24,0</div><div class='del'>-	insrdi	21,25,51,0</div><div class='del'>-	addc	30,30,12</div><div class='del'>-	addze	31,31</div><div class='del'>-	add	9,9,21</div><div class='del'>-</div><div class='del'>-	srdi	12,30,51</div><div class='del'>-	and	11,30,0</div><div class='del'>-	insrdi	12,31,51,0</div><div class='del'>-	mulli	12,12,19</div><div class='del'>-</div><div class='del'>-	add	7,7,12</div><div class='del'>-</div><div class='del'>-	srdi	21,9,51</div><div class='del'>-	and	9,9,0</div><div class='del'>-	add	10,10,21</div><div class='del'>-</div><div class='del'>-	srdi	12,7,51</div><div class='del'>-	and	7,7,0</div><div class='del'>-	add	8,8,12</div><div class='del'>-</div><div class='del'>-	bdnz	.Lsqr_times_loop</div><div class='del'>-</div><div class='del'>-	std	9,16(3)</div><div class='del'>-	std	10,24(3)</div><div class='del'>-	std	11,32(3)</div><div class='del'>-	std	7,0(3)</div><div class='del'>-	std	8,8(3)</div><div class='del'>-</div><div class='del'>-	ld	21,56(1)</div><div class='del'>-	ld	22,64(1)</div><div class='del'>-	ld	23,72(1)</div><div class='del'>-	ld	24,80(1)</div><div class='del'>-	ld	25,88(1)</div><div class='del'>-	ld	26,96(1)</div><div class='del'>-	ld	27,104(1)</div><div class='del'>-	ld	28,112(1)</div><div class='del'>-	ld	29,120(1)</div><div class='del'>-	ld	30,128(1)</div><div class='del'>-	ld	31,136(1)</div><div class='del'>-	addi	1,1,144</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(x25519_fe51_sqr_times)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_frombytes)</div><div class='del'>-</div><div class='del'>-	li	12, -1</div><div class='del'>-	srdi	12, 12, 13	# 0x7ffffffffffff</div><div class='del'>-</div><div class='del'>-	ld	5, 0(4)</div><div class='del'>-	ld	6, 8(4)</div><div class='del'>-	ld	7, 16(4)</div><div class='del'>-	ld	8, 24(4)</div><div class='del'>-</div><div class='del'>-	srdi	10, 5, 51</div><div class='del'>-	and	5, 5, 12	# h0</div><div class='del'>-</div><div class='del'>-	sldi	11, 6, 13</div><div class='del'>-	or	11, 10, 11	# h1t</div><div class='del'>-	srdi	10, 6, 38</div><div class='del'>-	and	6, 11, 12	# h1</div><div class='del'>-</div><div class='del'>-	sldi	11, 7, 26</div><div class='del'>-	or	10, 10, 11	# h2t</div><div class='del'>-</div><div class='del'>-	srdi	11, 7, 25</div><div class='del'>-	and	7, 10, 12	# h2</div><div class='del'>-	sldi	10, 8, 39</div><div class='del'>-	or	11, 11, 10	# h3t</div><div class='del'>-</div><div class='del'>-	srdi	9, 8, 12</div><div class='del'>-	and	8, 11, 12	# h3</div><div class='del'>-	and	9, 9, 12	# h4</div><div class='del'>-</div><div class='del'>-	std	5, 0(3)</div><div class='del'>-	std	6, 8(3)</div><div class='del'>-	std	7, 16(3)</div><div class='del'>-	std	8, 24(3)</div><div class='del'>-	std	9, 32(3)</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(x25519_fe51_frombytes)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_fe51_tobytes)</div><div class='del'>-</div><div class='del'>-	ld	5, 0(4)</div><div class='del'>-	ld	6, 8(4)</div><div class='del'>-	ld	7, 16(4)</div><div class='del'>-	ld	8, 24(4)</div><div class='del'>-	ld	9, 32(4)</div><div class='del'>-</div><div class='del'>-	li	12, -1</div><div class='del'>-	srdi	12, 12, 13	# 0x7ffffffffffff</div><div class='del'>-</div><div class='del'>-	# Full reducuction</div><div class='del'>-	addi	10, 5, 19</div><div class='del'>-	srdi	10, 10, 51</div><div class='del'>-	add	10, 10, 6</div><div class='del'>-	srdi	10, 10, 51</div><div class='del'>-	add	10, 10, 7</div><div class='del'>-	srdi	10, 10, 51</div><div class='del'>-	add	10, 10, 8</div><div class='del'>-	srdi	10, 10, 51</div><div class='del'>-	add	10, 10, 9</div><div class='del'>-	srdi	10, 10, 51</div><div class='del'>-</div><div class='del'>-	mulli	10, 10, 19</div><div class='del'>-	add	5, 5, 10</div><div class='del'>-	srdi	11, 5, 51</div><div class='del'>-	add	6, 6, 11</div><div class='del'>-	srdi	11, 6, 51</div><div class='del'>-	add	7, 7, 11</div><div class='del'>-	srdi	11, 7, 51</div><div class='del'>-	add	8, 8, 11</div><div class='del'>-	srdi	11, 8, 51</div><div class='del'>-	add	9, 9, 11</div><div class='del'>-</div><div class='del'>-	and	5, 5, 12</div><div class='del'>-	and	6, 6, 12</div><div class='del'>-	and	7, 7, 12</div><div class='del'>-	and	8, 8, 12</div><div class='del'>-	and	9, 9, 12</div><div class='del'>-</div><div class='del'>-	sldi	10, 6, 51</div><div class='del'>-	or	5, 5, 10	# s0</div><div class='del'>-</div><div class='del'>-	srdi	11, 6, 13</div><div class='del'>-	sldi	10, 7, 38</div><div class='del'>-	or	6, 11, 10	# s1</div><div class='del'>-</div><div class='del'>-	srdi	11, 7, 26</div><div class='del'>-	sldi	10, 8, 25</div><div class='del'>-	or	7, 11, 10	# s2</div><div class='del'>-</div><div class='del'>-	srdi	11, 8, 39</div><div class='del'>-	sldi	10, 9, 12</div><div class='del'>-	or	8, 11, 10	# s4</div><div class='del'>-</div><div class='del'>-	std	5, 0(3)</div><div class='del'>-	std	6, 8(3)</div><div class='del'>-	std	7, 16(3)</div><div class='del'>-	std	8, 24(3)</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(x25519_fe51_tobytes)</div><div class='del'>-</div><div class='del'>-.align	5</div><div class='del'>-SYM_FUNC_START(x25519_cswap)</div><div class='del'>-</div><div class='del'>-	li	7, 5</div><div class='del'>-	neg	6, 5</div><div class='del'>-	mtctr	7</div><div class='del'>-</div><div class='del'>-.Lswap_loop:</div><div class='del'>-	ld	8, 0(3)</div><div class='del'>-	ld	9, 0(4)</div><div class='del'>-	xor	10, 8, 9</div><div class='del'>-	and	10, 10, 6</div><div class='del'>-	xor	11, 8, 10</div><div class='del'>-	xor	12, 9, 10</div><div class='del'>-	std	11, 0(3)</div><div class='del'>-	addi	3, 3, 8</div><div class='del'>-	std	12, 0(4)</div><div class='del'>-	addi	4, 4, 8</div><div class='del'>-	bdnz	.Lswap_loop</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(x25519_cswap)</div><div class='head'>diff --git a/arch/powerpc/crypto/ghash.c b/arch/powerpc/crypto/ghash.c<br/>index 77eca20bc7ac..7308735bdb33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/ghash.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/ghash.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/ghash.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/ghash.c</a></div><div class='hunk'>@@ -11,19 +11,18 @@</div><div class='ctx'>  *   Copyright (C) 2014 - 2018 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include "aesp8-ppc.h"</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/ghash.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include "aesp8-ppc.h"</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> void gcm_init_p8(u128 htable[16], const u64 Xi[2]);</div><div class='ctx'> void gcm_gmult_p8(u64 Xi[2], const u128 htable[16]);</div><div class='hunk'>@@ -39,15 +38,12 @@ struct p8_ghash_ctx {</div><div class='ctx'> </div><div class='ctx'> struct p8_ghash_desc_ctx {</div><div class='ctx'> 	u64 shash[2];</div><div class='del'>-	u8 buffer[GHASH_DIGEST_SIZE];</div><div class='del'>-	int bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int p8_ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;bytes = 0;</div><div class='ctx'> 	memset(dctx-&gt;shash, 0, GHASH_DIGEST_SIZE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -74,27 +70,30 @@ static int p8_ghash_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __ghash_block(struct p8_ghash_ctx *ctx,</div><div class='del'>-				 struct p8_ghash_desc_ctx *dctx)</div><div class='add'>+				 struct p8_ghash_desc_ctx *dctx,</div><div class='add'>+				 const u8 *src)</div><div class='ctx'> {</div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> 		pagefault_disable();</div><div class='ctx'> 		enable_kernel_vsx();</div><div class='del'>-		gcm_ghash_p8(dctx-&gt;shash, ctx-&gt;htable,</div><div class='del'>-				dctx-&gt;buffer, GHASH_DIGEST_SIZE);</div><div class='add'>+		gcm_ghash_p8(dctx-&gt;shash, ctx-&gt;htable, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 		disable_kernel_vsx();</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> 	} else {</div><div class='del'>-		crypto_xor((u8 *)dctx-&gt;shash, dctx-&gt;buffer, GHASH_BLOCK_SIZE);</div><div class='add'>+		crypto_xor((u8 *)dctx-&gt;shash, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 		gf128mul_lle((be128 *)dctx-&gt;shash, &amp;ctx-&gt;key);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='del'>-				  struct p8_ghash_desc_ctx *dctx,</div><div class='del'>-				  const u8 *src, unsigned int srclen)</div><div class='add'>+static inline int __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='add'>+				 struct p8_ghash_desc_ctx *dctx,</div><div class='add'>+				 const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='add'>+	int remain = srclen - round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	srclen -= remain;</div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> 		pagefault_disable();</div><div class='hunk'>@@ -105,62 +104,38 @@ static inline void __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> 	} else {</div><div class='del'>-		while (srclen &gt;= GHASH_BLOCK_SIZE) {</div><div class='add'>+		do {</div><div class='ctx'> 			crypto_xor((u8 *)dctx-&gt;shash, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 			gf128mul_lle((be128 *)dctx-&gt;shash, &amp;ctx-&gt;key);</div><div class='ctx'> 			srclen -= GHASH_BLOCK_SIZE;</div><div class='ctx'> 			src += GHASH_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='add'>+		} while (srclen);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int p8_ghash_update(struct shash_desc *desc,</div><div class='ctx'> 			   const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	struct p8_ghash_ctx *ctx = crypto_tfm_ctx(crypto_shash_tfm(desc-&gt;tfm));</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		if (dctx-&gt;bytes + srclen &lt; GHASH_DIGEST_SIZE) {</div><div class='del'>-			memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-				srclen);</div><div class='del'>-			dctx-&gt;bytes += srclen;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-			GHASH_DIGEST_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		__ghash_block(ctx, dctx);</div><div class='del'>-</div><div class='del'>-		src += GHASH_DIGEST_SIZE - dctx-&gt;bytes;</div><div class='del'>-		srclen -= GHASH_DIGEST_SIZE - dctx-&gt;bytes;</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='del'>-	}</div><div class='del'>-	len = srclen &amp; ~(GHASH_DIGEST_SIZE - 1);</div><div class='del'>-	if (len) {</div><div class='del'>-		__ghash_blocks(ctx, dctx, src, len);</div><div class='del'>-		src += len;</div><div class='del'>-		srclen -= len;</div><div class='del'>-	}</div><div class='del'>-	if (srclen) {</div><div class='del'>-		memcpy(dctx-&gt;buffer, src, srclen);</div><div class='del'>-		dctx-&gt;bytes = srclen;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	return __ghash_blocks(ctx, dctx, src, srclen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int p8_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int p8_ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	struct p8_ghash_ctx *ctx = crypto_tfm_ctx(crypto_shash_tfm(desc-&gt;tfm));</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		for (i = dctx-&gt;bytes; i &lt; GHASH_DIGEST_SIZE; i++)</div><div class='del'>-			dctx-&gt;buffer[i] = 0;</div><div class='del'>-		__ghash_block(ctx, dctx);</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='add'>+</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		__ghash_block(ctx, dctx, buf);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='ctx'> 	memcpy(out, dctx-&gt;shash, GHASH_DIGEST_SIZE);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -170,14 +145,14 @@ struct shash_alg p8_ghash_alg = {</div><div class='ctx'> 	.digestsize = GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init = p8_ghash_init,</div><div class='ctx'> 	.update = p8_ghash_update,</div><div class='del'>-	.final = p8_ghash_final,</div><div class='add'>+	.finup = p8_ghash_finup,</div><div class='ctx'> 	.setkey = p8_ghash_setkey,</div><div class='del'>-	.descsize = sizeof(struct p8_ghash_desc_ctx)</div><div class='del'>-		+ sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.descsize = sizeof(struct p8_ghash_desc_ctx),</div><div class='ctx'> 	.base = {</div><div class='ctx'> 		 .cra_name = "ghash",</div><div class='ctx'> 		 .cra_driver_name = "p8_ghash",</div><div class='ctx'> 		 .cra_priority = 1000,</div><div class='add'>+		 .cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		 .cra_blocksize = GHASH_BLOCK_SIZE,</div><div class='ctx'> 		 .cra_ctxsize = sizeof(struct p8_ghash_ctx),</div><div class='ctx'> 		 .cra_module = THIS_MODULE,</div><div class='head'>diff --git a/arch/powerpc/crypto/md5-asm.S b/arch/powerpc/crypto/md5-asm.S<br/>deleted file mode 100644<br/>index fa6bc440cf4a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/md5-asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/md5-asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,235 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Fast MD5 implementation for PPC</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/asm-compat.h&gt;</div><div class='del'>-</div><div class='del'>-#define rHP	r3</div><div class='del'>-#define rWP	r4</div><div class='del'>-</div><div class='del'>-#define rH0	r0</div><div class='del'>-#define rH1	r6</div><div class='del'>-#define rH2	r7</div><div class='del'>-#define rH3	r5</div><div class='del'>-</div><div class='del'>-#define rW00	r8</div><div class='del'>-#define rW01	r9</div><div class='del'>-#define rW02	r10</div><div class='del'>-#define rW03	r11</div><div class='del'>-#define rW04	r12</div><div class='del'>-#define rW05	r14</div><div class='del'>-#define rW06	r15</div><div class='del'>-#define rW07	r16</div><div class='del'>-#define rW08	r17</div><div class='del'>-#define rW09	r18</div><div class='del'>-#define rW10	r19</div><div class='del'>-#define rW11	r20</div><div class='del'>-#define rW12	r21</div><div class='del'>-#define rW13	r22</div><div class='del'>-#define rW14	r23</div><div class='del'>-#define rW15	r24</div><div class='del'>-</div><div class='del'>-#define rT0	r25</div><div class='del'>-#define rT1	r26</div><div class='del'>-</div><div class='del'>-#define INITIALIZE \</div><div class='del'>-	PPC_STLU r1,-INT_FRAME_SIZE(r1); \</div><div class='del'>-	SAVE_GPRS(14, 26, r1)		/* push registers onto stack	*/</div><div class='del'>-</div><div class='del'>-#define FINALIZE \</div><div class='del'>-	REST_GPRS(14, 26, r1);		/* pop registers from stack	*/ \</div><div class='del'>-	addi	r1,r1,INT_FRAME_SIZE</div><div class='del'>-</div><div class='del'>-#ifdef __BIG_ENDIAN__</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwbrx		reg,0,rWP;	/* load data			*/</div><div class='del'>-#define INC_PTR \</div><div class='del'>-	addi		rWP,rWP,4;	/* increment per word		*/</div><div class='del'>-#define NEXT_BLOCK			/* nothing to do		*/</div><div class='del'>-#else</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwz		reg,off(rWP);	/* load data			*/</div><div class='del'>-#define INC_PTR				/* nothing to do		*/</div><div class='del'>-#define NEXT_BLOCK \</div><div class='del'>-	addi		rWP,rWP,64;	/* increment per block		*/</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \</div><div class='del'>-	LOAD_DATA(w0, off)		/*    W				*/ \</div><div class='del'>-	and		rT0,b,c;	/* 1: f = b and c		*/ \</div><div class='del'>-	INC_PTR				/*    ptr++			*/ \</div><div class='del'>-	andc		rT1,d,b;	/* 1: f' = ~b and d		*/ \</div><div class='del'>-	LOAD_DATA(w1, off+4)		/*    W				*/ \</div><div class='del'>-	or		rT0,rT0,rT1;	/* 1: f = f or f'		*/ \</div><div class='del'>-	addi		w0,w0,k0l;	/* 1: wk = w + k		*/ \</div><div class='del'>-	add		a,a,rT0;	/* 1: a = a + f			*/ \</div><div class='del'>-	addis		w0,w0,k0h;	/* 1: wk = w + k'		*/ \</div><div class='del'>-	addis		w1,w1,k1h;	/* 2: wk = w + k		*/ \</div><div class='del'>-	add		a,a,w0;		/* 1: a = a + wk		*/ \</div><div class='del'>-	addi		w1,w1,k1l;	/* 2: wk = w + k'		*/ \</div><div class='del'>-	rotrwi		a,a,p;		/* 1: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,w1;		/* 2: a = a + wk		*/ \</div><div class='del'>-	add		a,a,b;		/* 1: a = a + b			*/ \</div><div class='del'>-	and		rT0,a,b;	/* 2: f = b and c		*/ \</div><div class='del'>-	andc		rT1,c,a;	/* 2: f' = ~b and d		*/ \</div><div class='del'>-	or		rT0,rT0,rT1;	/* 2: f = f or f'		*/ \</div><div class='del'>-	add		d,d,rT0;	/* 2: a = a + f			*/ \</div><div class='del'>-	INC_PTR				/*    ptr++			*/ \</div><div class='del'>-	rotrwi		d,d,q;		/* 2: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,a;		/* 2: a = a + b			*/</div><div class='del'>-</div><div class='del'>-#define R_16_31(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \</div><div class='del'>-	andc		rT0,c,d;	/* 1: f = c and ~d		*/ \</div><div class='del'>-	and		rT1,b,d;	/* 1: f' = b and d		*/ \</div><div class='del'>-	addi		w0,w0,k0l;	/* 1: wk = w + k		*/ \</div><div class='del'>-	or		rT0,rT0,rT1;	/* 1: f = f or f'		*/ \</div><div class='del'>-	addis		w0,w0,k0h;	/* 1: wk = w + k'		*/ \</div><div class='del'>-	add		a,a,rT0;	/* 1: a = a + f			*/ \</div><div class='del'>-	addi		w1,w1,k1l;	/* 2: wk = w + k		*/ \</div><div class='del'>-	add		a,a,w0;		/* 1: a = a + wk		*/ \</div><div class='del'>-	addis		w1,w1,k1h;	/* 2: wk = w + k'		*/ \</div><div class='del'>-	andc		rT0,b,c;	/* 2: f = c and ~d		*/ \</div><div class='del'>-	rotrwi		a,a,p;		/* 1: a = a rotl x		*/ \</div><div class='del'>-	add		a,a,b;		/* 1: a = a + b			*/ \</div><div class='del'>-	add		d,d,w1;		/* 2: a = a + wk		*/ \</div><div class='del'>-	and		rT1,a,c;	/* 2: f' = b and d		*/ \</div><div class='del'>-	or		rT0,rT0,rT1;	/* 2: f = f or f'		*/ \</div><div class='del'>-	add		d,d,rT0;	/* 2: a = a + f			*/ \</div><div class='del'>-	rotrwi		d,d,q;		/* 2: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,a;		/* 2: a = a +b			*/</div><div class='del'>-</div><div class='del'>-#define R_32_47(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \</div><div class='del'>-	xor		rT0,b,c;	/* 1: f' = b xor c		*/ \</div><div class='del'>-	addi		w0,w0,k0l;	/* 1: wk = w + k		*/ \</div><div class='del'>-	xor		rT1,rT0,d;	/* 1: f = f xor f'		*/ \</div><div class='del'>-	addis		w0,w0,k0h;	/* 1: wk = w + k'		*/ \</div><div class='del'>-	add		a,a,rT1;	/* 1: a = a + f			*/ \</div><div class='del'>-	addi		w1,w1,k1l;	/* 2: wk = w + k		*/ \</div><div class='del'>-	add		a,a,w0;		/* 1: a = a + wk		*/ \</div><div class='del'>-	addis		w1,w1,k1h;	/* 2: wk = w + k'		*/ \</div><div class='del'>-	rotrwi		a,a,p;		/* 1: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,w1;		/* 2: a = a + wk		*/ \</div><div class='del'>-	add		a,a,b;		/* 1: a = a + b			*/ \</div><div class='del'>-	xor		rT1,rT0,a;	/* 2: f = b xor f'		*/ \</div><div class='del'>-	add		d,d,rT1;	/* 2: a = a + f			*/ \</div><div class='del'>-	rotrwi		d,d,q;		/* 2: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,a;		/* 2: a = a + b			*/</div><div class='del'>-</div><div class='del'>-#define R_48_63(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \</div><div class='del'>-	addi		w0,w0,k0l;	/* 1: w = w + k			*/ \</div><div class='del'>-	orc		rT0,b,d;	/* 1: f = b or ~d		*/ \</div><div class='del'>-	addis		w0,w0,k0h;	/* 1: w = w + k'		*/ \</div><div class='del'>-	xor		rT0,rT0,c;	/* 1: f = f xor c		*/ \</div><div class='del'>-	add		a,a,w0;		/* 1: a = a + wk		*/ \</div><div class='del'>-	addi		w1,w1,k1l;	/* 2: w = w + k			*/ \</div><div class='del'>-	add		a,a,rT0;	/* 1: a = a + f			*/ \</div><div class='del'>-	addis		w1,w1,k1h;	/* 2: w = w + k'		*/ \</div><div class='del'>-	rotrwi		a,a,p;		/* 1: a = a rotl x		*/ \</div><div class='del'>-	add		a,a,b;		/* 1: a = a + b			*/ \</div><div class='del'>-	orc		rT0,a,c;	/* 2: f = b or ~d		*/ \</div><div class='del'>-	add		d,d,w1;		/* 2: a = a + wk		*/ \</div><div class='del'>-	xor		rT0,rT0,b;	/* 2: f = f xor c		*/ \</div><div class='del'>-	add		d,d,rT0;	/* 2: a = a + f			*/ \</div><div class='del'>-	rotrwi		d,d,q;		/* 2: a = a rotl x		*/ \</div><div class='del'>-	add		d,d,a;		/* 2: a = a + b			*/</div><div class='del'>-</div><div class='del'>-_GLOBAL(ppc_md5_transform)</div><div class='del'>-	INITIALIZE</div><div class='del'>-</div><div class='del'>-	mtctr		r5</div><div class='del'>-	lwz		rH0,0(rHP)</div><div class='del'>-	lwz		rH1,4(rHP)</div><div class='del'>-	lwz		rH2,8(rHP)</div><div class='del'>-	lwz		rH3,12(rHP)</div><div class='del'>-</div><div class='del'>-ppc_md5_main:</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rW00, rW01, 25, 20, 0,</div><div class='del'>-		0xd76b, -23432, 0xe8c8, -18602)</div><div class='del'>-	R_00_15(rH2, rH3, rH0, rH1, rW02, rW03, 15, 10, 8,</div><div class='del'>-		0x2420, 0x70db, 0xc1be, -12562)</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rW04, rW05, 25, 20, 16,</div><div class='del'>-		0xf57c, 0x0faf, 0x4788, -14806)</div><div class='del'>-	R_00_15(rH2, rH3, rH0, rH1, rW06, rW07, 15, 10, 24,</div><div class='del'>-		0xa830, 0x4613, 0xfd47, -27391)</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rW08, rW09, 25, 20, 32,</div><div class='del'>-		0x6981, -26408, 0x8b45,  -2129)</div><div class='del'>-	R_00_15(rH2, rH3, rH0, rH1, rW10, rW11, 15, 10, 40,</div><div class='del'>-		0xffff, 0x5bb1, 0x895d, -10306)</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rW12, rW13, 25, 20, 48,</div><div class='del'>-		0x6b90, 0x1122, 0xfd98, 0x7193)</div><div class='del'>-	R_00_15(rH2, rH3, rH0, rH1, rW14, rW15, 15, 10, 56,</div><div class='del'>-		0xa679, 0x438e, 0x49b4, 0x0821)</div><div class='del'>-</div><div class='del'>-	R_16_31(rH0, rH1, rH2, rH3, rW01, rW06, 27, 23,</div><div class='del'>-		0x0d56, 0x6e0c, 0x1810, 0x6d2d)</div><div class='del'>-	R_16_31(rH2, rH3, rH0, rH1, rW11, rW00, 18, 12,</div><div class='del'>-		0x9d02, -32109, 0x124c, 0x2332)</div><div class='del'>-	R_16_31(rH0, rH1, rH2, rH3, rW05, rW10, 27, 23,</div><div class='del'>-		0x8ea7, 0x4a33, 0x0245, -18270)</div><div class='del'>-	R_16_31(rH2, rH3, rH0, rH1, rW15, rW04, 18, 12,</div><div class='del'>-		0x8eee,  -8608, 0xf258,  -5095)</div><div class='del'>-	R_16_31(rH0, rH1, rH2, rH3, rW09, rW14, 27, 23,</div><div class='del'>-		0x969d, -10697, 0x1cbe, -15288)</div><div class='del'>-	R_16_31(rH2, rH3, rH0, rH1, rW03, rW08, 18, 12,</div><div class='del'>-		0x3317, 0x3e99, 0xdbd9, 0x7c15)</div><div class='del'>-	R_16_31(rH0, rH1, rH2, rH3, rW13, rW02, 27, 23,</div><div class='del'>-		0xac4b, 0x7772, 0xd8cf, 0x331d)</div><div class='del'>-	R_16_31(rH2, rH3, rH0, rH1, rW07, rW12, 18, 12,</div><div class='del'>-		0x6a28, 0x6dd8, 0x219a, 0x3b68)</div><div class='del'>-</div><div class='del'>-	R_32_47(rH0, rH1, rH2, rH3, rW05, rW08, 28, 21,</div><div class='del'>-		0x29cb, 0x28e5, 0x4218,  -7788)</div><div class='del'>-	R_32_47(rH2, rH3, rH0, rH1, rW11, rW14, 16,  9,</div><div class='del'>-		0x473f, 0x06d1, 0x3aae, 0x3036)</div><div class='del'>-	R_32_47(rH0, rH1, rH2, rH3, rW01, rW04, 28, 21,</div><div class='del'>-		0xaea1, -15134, 0x640b, -11295)</div><div class='del'>-	R_32_47(rH2, rH3, rH0, rH1, rW07, rW10, 16,  9,</div><div class='del'>-		0x8f4c, 0x4887, 0xbc7c, -22499)</div><div class='del'>-	R_32_47(rH0, rH1, rH2, rH3, rW13, rW00, 28, 21,</div><div class='del'>-		0x7eb8, -27199, 0x00ea, 0x6050)</div><div class='del'>-	R_32_47(rH2, rH3, rH0, rH1, rW03, rW06, 16,  9,</div><div class='del'>-		0xe01a, 0x22fe, 0x4447, 0x69c5)</div><div class='del'>-	R_32_47(rH0, rH1, rH2, rH3, rW09, rW12, 28, 21,</div><div class='del'>-		0xb7f3, 0x0253, 0x59b1, 0x4d5b)</div><div class='del'>-	R_32_47(rH2, rH3, rH0, rH1, rW15, rW02, 16,  9,</div><div class='del'>-		0x4701, -27017, 0xc7bd, -19859)</div><div class='del'>-</div><div class='del'>-	R_48_63(rH0, rH1, rH2, rH3, rW00, rW07, 26, 22,</div><div class='del'>-		0x0988,  -1462, 0x4c70, -19401)</div><div class='del'>-	R_48_63(rH2, rH3, rH0, rH1, rW14, rW05, 17, 11,</div><div class='del'>-		0xadaf,  -5221, 0xfc99, 0x66f7)</div><div class='del'>-	R_48_63(rH0, rH1, rH2, rH3, rW12, rW03, 26, 22,</div><div class='del'>-		0x7e80, -16418, 0xba1e, -25587)</div><div class='del'>-	R_48_63(rH2, rH3, rH0, rH1, rW10, rW01, 17, 11,</div><div class='del'>-		0x4130, 0x380d, 0xe0c5, 0x738d)</div><div class='del'>-	lwz		rW00,0(rHP)</div><div class='del'>-	R_48_63(rH0, rH1, rH2, rH3, rW08, rW15, 26, 22,</div><div class='del'>-		0xe837, -30770, 0xde8a, 0x69e8)</div><div class='del'>-	lwz		rW14,4(rHP)</div><div class='del'>-	R_48_63(rH2, rH3, rH0, rH1, rW06, rW13, 17, 11,</div><div class='del'>-		0x9e79, 0x260f, 0x256d, -27941)</div><div class='del'>-	lwz		rW12,8(rHP)</div><div class='del'>-	R_48_63(rH0, rH1, rH2, rH3, rW04, rW11, 26, 22,</div><div class='del'>-		0xab75, -20775, 0x4f9e, -28397)</div><div class='del'>-	lwz		rW10,12(rHP)</div><div class='del'>-	R_48_63(rH2, rH3, rH0, rH1, rW02, rW09, 17, 11,</div><div class='del'>-		0x662b, 0x7c56, 0x11b2, 0x0358)</div><div class='del'>-</div><div class='del'>-	add		rH0,rH0,rW00</div><div class='del'>-	stw		rH0,0(rHP)</div><div class='del'>-	add		rH1,rH1,rW14</div><div class='del'>-	stw		rH1,4(rHP)</div><div class='del'>-	add		rH2,rH2,rW12</div><div class='del'>-	stw		rH2,8(rHP)</div><div class='del'>-	add		rH3,rH3,rW10</div><div class='del'>-	stw		rH3,12(rHP)</div><div class='del'>-	NEXT_BLOCK</div><div class='del'>-</div><div class='del'>-	bdnz		ppc_md5_main</div><div class='del'>-</div><div class='del'>-	FINALIZE</div><div class='del'>-	blr</div><div class='head'>diff --git a/arch/powerpc/crypto/md5-glue.c b/arch/powerpc/crypto/md5-glue.c<br/>deleted file mode 100644<br/>index c24f605033bd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/md5-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/md5-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,158 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for MD5 implementation for PPC assembler</div><div class='del'>- *</div><div class='del'>- * Based on generic implementation.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='del'>-extern void ppc_md5_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='del'>-</div><div class='del'>-static inline void ppc_md5_clear_context(struct md5_state *sctx)</div><div class='del'>-{</div><div class='del'>-	int count = sizeof(struct md5_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct md5_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;hash[0] = MD5_H0;</div><div class='del'>-	sctx-&gt;hash[1] = MD5_H1;</div><div class='del'>-	sctx-&gt;hash[2] = MD5_H2;</div><div class='del'>-	sctx-&gt;hash[3] =	MD5_H3;</div><div class='del'>-	sctx-&gt;byte_count = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	unsigned int avail = 64 - offset;</div><div class='del'>-	const u8 *src = data;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;byte_count += len;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)sctx-&gt;block + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;block + offset, src, avail);</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, (const u8 *)sctx-&gt;block, 1);</div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &gt; 63) {</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, src, len &gt;&gt; 6);</div><div class='del'>-		src += len &amp; ~0x3f;</div><div class='del'>-		len &amp;= 0x3f;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;block, src, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	const u8 *src = (const u8 *)sctx-&gt;block;</div><div class='del'>-	u8 *p = (u8 *)src + offset;</div><div class='del'>-	int padlen = 55 - offset;</div><div class='del'>-	__le64 *pbits = (__le64 *)((char *)sctx-&gt;block + 56);</div><div class='del'>-	__le32 *dst = (__le32 *)out;</div><div class='del'>-</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, src, 1);</div><div class='del'>-		p = (char *)sctx-&gt;block;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='del'>-	*pbits = cpu_to_le64(sctx-&gt;byte_count &lt;&lt; 3);</div><div class='del'>-	ppc_md5_transform(sctx-&gt;hash, src, 1);</div><div class='del'>-</div><div class='del'>-	dst[0] = cpu_to_le32(sctx-&gt;hash[0]);</div><div class='del'>-	dst[1] = cpu_to_le32(sctx-&gt;hash[1]);</div><div class='del'>-	dst[2] = cpu_to_le32(sctx-&gt;hash[2]);</div><div class='del'>-	dst[3] = cpu_to_le32(sctx-&gt;hash[3]);</div><div class='del'>-</div><div class='del'>-	ppc_md5_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='del'>-	.init		=	ppc_md5_init,</div><div class='del'>-	.update		=	ppc_md5_update,</div><div class='del'>-	.final		=	ppc_md5_final,</div><div class='del'>-	.export		=	ppc_md5_export,</div><div class='del'>-	.import		=	ppc_md5_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"md5",</div><div class='del'>-		.cra_driver_name=	"md5-ppc",</div><div class='del'>-		.cra_priority	=	200,</div><div class='del'>-		.cra_blocksize	=	MD5_HMAC_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ppc_md5_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ppc_md5_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ppc_md5_mod_init);</div><div class='del'>-module_exit(ppc_md5_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, PPC assembler");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("md5");</div><div class='del'>-MODULE_ALIAS_CRYPTO("md5-ppc");</div><div class='head'>diff --git a/arch/powerpc/crypto/poly1305-p10-glue.c b/arch/powerpc/crypto/poly1305-p10-glue.c<br/>deleted file mode 100644<br/>index 369686e9370b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/poly1305-p10-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/poly1305-p10-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,186 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Poly1305 authenticator algorithm, RFC7539.</div><div class='del'>- *</div><div class='del'>- * Copyright 2023- IBM Corp. All rights reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_p10le_4blocks(void *h, const u8 *m, u32 mlen);</div><div class='del'>-asmlinkage void poly1305_64s(void *h, const u8 *m, u32 mlen, int highbit);</div><div class='del'>-asmlinkage void poly1305_emit_64(void *h, void *s, u8 *dst);</div><div class='del'>-</div><div class='del'>-static void vsx_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_vsx();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vsx_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_vsx();</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	poly1305_core_init(&amp;dctx-&gt;h);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int crypto_poly1305_setdctxkey(struct poly1305_desc_ctx *dctx,</div><div class='del'>-					       const u8 *inp, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int acc = 0;</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset &amp;&amp; len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			struct poly1305_core_key *key = &amp;dctx-&gt;core_r;</div><div class='del'>-</div><div class='del'>-			key-&gt;key.r64[0] = get_unaligned_le64(&amp;inp[0]);</div><div class='del'>-			key-&gt;key.r64[1] = get_unaligned_le64(&amp;inp[8]);</div><div class='del'>-			inp += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(&amp;inp[0]);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(&amp;inp[4]);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(&amp;inp[8]);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(&amp;inp[12]);</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return acc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_update(struct shash_desc *desc,</div><div class='del'>-				      const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int bytes, used;</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		srclen -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			if (likely(!crypto_poly1305_setdctxkey(dctx, dctx-&gt;buf,</div><div class='del'>-							       POLY1305_BLOCK_SIZE))) {</div><div class='del'>-				vsx_begin();</div><div class='del'>-				poly1305_64s(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-						  POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-				vsx_end();</div><div class='del'>-			}</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		bytes = round_down(srclen, POLY1305_BLOCK_SIZE);</div><div class='del'>-		used = crypto_poly1305_setdctxkey(dctx, src, bytes);</div><div class='del'>-		if (likely(used)) {</div><div class='del'>-			srclen -= used;</div><div class='del'>-			src += used;</div><div class='del'>-		}</div><div class='del'>-		if (crypto_simd_usable() &amp;&amp; (srclen &gt;= POLY1305_BLOCK_SIZE*4)) {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			poly1305_p10le_4blocks(&amp;dctx-&gt;h, src, srclen);</div><div class='del'>-			vsx_end();</div><div class='del'>-			src += srclen - (srclen % (POLY1305_BLOCK_SIZE * 4));</div><div class='del'>-			srclen %= POLY1305_BLOCK_SIZE * 4;</div><div class='del'>-		}</div><div class='del'>-		while (srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			poly1305_64s(&amp;dctx-&gt;h, src, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			vsx_end();</div><div class='del'>-			srclen -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(srclen)) {</div><div class='del'>-		dctx-&gt;buflen = srclen;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, srclen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	if ((dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		vsx_begin();</div><div class='del'>-		poly1305_64s(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-		vsx_end();</div><div class='del'>-		dctx-&gt;buflen = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_64(&amp;dctx-&gt;h, &amp;dctx-&gt;s, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg poly1305_alg = {</div><div class='del'>-	.digestsize	= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.init		= crypto_poly1305_p10_init,</div><div class='del'>-	.update		= crypto_poly1305_p10_update,</div><div class='del'>-	.final		= crypto_poly1305_p10_final,</div><div class='del'>-	.descsize	= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "poly1305",</div><div class='del'>-		.cra_driver_name	= "poly1305-p10",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= POLY1305_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init poly1305_p10_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit poly1305_p10_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(PPC_MODULE_FEATURE_P10, poly1305_p10_init);</div><div class='del'>-module_exit(poly1305_p10_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Optimized Poly1305 for P10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-p10");</div><div class='head'>diff --git a/arch/powerpc/crypto/poly1305-p10le_64.S b/arch/powerpc/crypto/poly1305-p10le_64.S<br/>deleted file mode 100644<br/>index a3c1987f1ecd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/poly1305-p10le_64.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/poly1305-p10le_64.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1075 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-#</div><div class='del'>-# Accelerated poly1305 implementation for ppc64le.</div><div class='del'>-#</div><div class='del'>-# Copyright 2023- IBM Corp. All rights reserved</div><div class='del'>-#</div><div class='del'>-#===================================================================================</div><div class='del'>-# Written by Danny Tsen &lt;dtsen@us.ibm.com&gt;</div><div class='del'>-#</div><div class='del'>-# Poly1305 - this version mainly using vector/VSX/Scalar</div><div class='del'>-#  - 26 bits limbs</div><div class='del'>-#  - Handle multiple 64 byte blcok.</div><div class='del'>-#</div><div class='del'>-# Block size 16 bytes</div><div class='del'>-# key = (r, s)</div><div class='del'>-# clamp r &amp;= 0x0FFFFFFC0FFFFFFC 0x0FFFFFFC0FFFFFFF</div><div class='del'>-# p = 2^130 - 5</div><div class='del'>-# a += m</div><div class='del'>-# a = (r + a) % p</div><div class='del'>-# a += s</div><div class='del'>-#</div><div class='del'>-# Improve performance by breaking down polynominal to the sum of products with</div><div class='del'>-#     h4 = m1 * r⁴ + m2 * r³ + m3 * r² + m4 * r</div><div class='del'>-#</div><div class='del'>-#  07/22/21 - this revison based on the above sum of products.  Setup r^4, r^3, r^2, r and s3, s2, s1, s0</div><div class='del'>-#             to 9 vectors for multiplications.</div><div class='del'>-#</div><div class='del'>-# setup r^4, r^3, r^2, r vectors</div><div class='del'>-#    vs    [r^1, r^3, r^2, r^4]</div><div class='del'>-#    vs0 = [r0,.....]</div><div class='del'>-#    vs1 = [r1,.....]</div><div class='del'>-#    vs2 = [r2,.....]</div><div class='del'>-#    vs3 = [r3,.....]</div><div class='del'>-#    vs4 = [r4,.....]</div><div class='del'>-#    vs5 = [r1*5,...]</div><div class='del'>-#    vs6 = [r2*5,...]</div><div class='del'>-#    vs7 = [r2*5,...]</div><div class='del'>-#    vs8 = [r4*5,...]</div><div class='del'>-#</div><div class='del'>-#  Each word in a vector consists a member of a "r/s" in [a * r/s].</div><div class='del'>-#</div><div class='del'>-# r0, r4*5, r3*5, r2*5, r1*5;</div><div class='del'>-# r1, r0,   r4*5, r3*5, r2*5;</div><div class='del'>-# r2, r1,   r0,   r4*5, r3*5;</div><div class='del'>-# r3, r2,   r1,   r0,   r4*5;</div><div class='del'>-# r4, r3,   r2,   r1,   r0  ;</div><div class='del'>-#</div><div class='del'>-#</div><div class='del'>-# poly1305_p10le_4blocks( uint8_t *k, uint32_t mlen, uint8_t *m)</div><div class='del'>-#  k = 32 bytes key</div><div class='del'>-#  r3 = k (r, s)</div><div class='del'>-#  r4 = mlen</div><div class='del'>-#  r5 = m</div><div class='del'>-#</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/asm-compat.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.machine "any"</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-</div><div class='del'>-.macro	SAVE_GPR GPR OFFSET FRAME</div><div class='del'>-	std	\GPR,\OFFSET(\FRAME)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	SAVE_VRS VRS OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	stvx	\VRS, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	SAVE_VSX VSX OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	stxvx	\VSX, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_GPR GPR OFFSET FRAME</div><div class='del'>-	ld	\GPR,\OFFSET(\FRAME)</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_VRS VRS OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	lvx	\VRS, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	RESTORE_VSX VSX OFFSET FRAME</div><div class='del'>-	li	16, \OFFSET</div><div class='del'>-	lxvx	\VSX, 16, \FRAME</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro SAVE_REGS</div><div class='del'>-	mflr 0</div><div class='del'>-	std 0, 16(1)</div><div class='del'>-	stdu 1,-752(1)</div><div class='del'>-</div><div class='del'>-	SAVE_GPR 14, 112, 1</div><div class='del'>-	SAVE_GPR 15, 120, 1</div><div class='del'>-	SAVE_GPR 16, 128, 1</div><div class='del'>-	SAVE_GPR 17, 136, 1</div><div class='del'>-	SAVE_GPR 18, 144, 1</div><div class='del'>-	SAVE_GPR 19, 152, 1</div><div class='del'>-	SAVE_GPR 20, 160, 1</div><div class='del'>-	SAVE_GPR 21, 168, 1</div><div class='del'>-	SAVE_GPR 22, 176, 1</div><div class='del'>-	SAVE_GPR 23, 184, 1</div><div class='del'>-	SAVE_GPR 24, 192, 1</div><div class='del'>-	SAVE_GPR 25, 200, 1</div><div class='del'>-	SAVE_GPR 26, 208, 1</div><div class='del'>-	SAVE_GPR 27, 216, 1</div><div class='del'>-	SAVE_GPR 28, 224, 1</div><div class='del'>-	SAVE_GPR 29, 232, 1</div><div class='del'>-	SAVE_GPR 30, 240, 1</div><div class='del'>-	SAVE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	addi	9, 1, 256</div><div class='del'>-	SAVE_VRS 20, 0, 9</div><div class='del'>-	SAVE_VRS 21, 16, 9</div><div class='del'>-	SAVE_VRS 22, 32, 9</div><div class='del'>-	SAVE_VRS 23, 48, 9</div><div class='del'>-	SAVE_VRS 24, 64, 9</div><div class='del'>-	SAVE_VRS 25, 80, 9</div><div class='del'>-	SAVE_VRS 26, 96, 9</div><div class='del'>-	SAVE_VRS 27, 112, 9</div><div class='del'>-	SAVE_VRS 28, 128, 9</div><div class='del'>-	SAVE_VRS 29, 144, 9</div><div class='del'>-	SAVE_VRS 30, 160, 9</div><div class='del'>-	SAVE_VRS 31, 176, 9</div><div class='del'>-</div><div class='del'>-	SAVE_VSX 14, 192, 9</div><div class='del'>-	SAVE_VSX 15, 208, 9</div><div class='del'>-	SAVE_VSX 16, 224, 9</div><div class='del'>-	SAVE_VSX 17, 240, 9</div><div class='del'>-	SAVE_VSX 18, 256, 9</div><div class='del'>-	SAVE_VSX 19, 272, 9</div><div class='del'>-	SAVE_VSX 20, 288, 9</div><div class='del'>-	SAVE_VSX 21, 304, 9</div><div class='del'>-	SAVE_VSX 22, 320, 9</div><div class='del'>-	SAVE_VSX 23, 336, 9</div><div class='del'>-	SAVE_VSX 24, 352, 9</div><div class='del'>-	SAVE_VSX 25, 368, 9</div><div class='del'>-	SAVE_VSX 26, 384, 9</div><div class='del'>-	SAVE_VSX 27, 400, 9</div><div class='del'>-	SAVE_VSX 28, 416, 9</div><div class='del'>-	SAVE_VSX 29, 432, 9</div><div class='del'>-	SAVE_VSX 30, 448, 9</div><div class='del'>-	SAVE_VSX 31, 464, 9</div><div class='del'>-.endm # SAVE_REGS</div><div class='del'>-</div><div class='del'>-.macro RESTORE_REGS</div><div class='del'>-	addi	9, 1, 256</div><div class='del'>-	RESTORE_VRS 20, 0, 9</div><div class='del'>-	RESTORE_VRS 21, 16, 9</div><div class='del'>-	RESTORE_VRS 22, 32, 9</div><div class='del'>-	RESTORE_VRS 23, 48, 9</div><div class='del'>-	RESTORE_VRS 24, 64, 9</div><div class='del'>-	RESTORE_VRS 25, 80, 9</div><div class='del'>-	RESTORE_VRS 26, 96, 9</div><div class='del'>-	RESTORE_VRS 27, 112, 9</div><div class='del'>-	RESTORE_VRS 28, 128, 9</div><div class='del'>-	RESTORE_VRS 29, 144, 9</div><div class='del'>-	RESTORE_VRS 30, 160, 9</div><div class='del'>-	RESTORE_VRS 31, 176, 9</div><div class='del'>-</div><div class='del'>-	RESTORE_VSX 14, 192, 9</div><div class='del'>-	RESTORE_VSX 15, 208, 9</div><div class='del'>-	RESTORE_VSX 16, 224, 9</div><div class='del'>-	RESTORE_VSX 17, 240, 9</div><div class='del'>-	RESTORE_VSX 18, 256, 9</div><div class='del'>-	RESTORE_VSX 19, 272, 9</div><div class='del'>-	RESTORE_VSX 20, 288, 9</div><div class='del'>-	RESTORE_VSX 21, 304, 9</div><div class='del'>-	RESTORE_VSX 22, 320, 9</div><div class='del'>-	RESTORE_VSX 23, 336, 9</div><div class='del'>-	RESTORE_VSX 24, 352, 9</div><div class='del'>-	RESTORE_VSX 25, 368, 9</div><div class='del'>-	RESTORE_VSX 26, 384, 9</div><div class='del'>-	RESTORE_VSX 27, 400, 9</div><div class='del'>-	RESTORE_VSX 28, 416, 9</div><div class='del'>-	RESTORE_VSX 29, 432, 9</div><div class='del'>-	RESTORE_VSX 30, 448, 9</div><div class='del'>-	RESTORE_VSX 31, 464, 9</div><div class='del'>-</div><div class='del'>-	RESTORE_GPR 14, 112, 1</div><div class='del'>-	RESTORE_GPR 15, 120, 1</div><div class='del'>-	RESTORE_GPR 16, 128, 1</div><div class='del'>-	RESTORE_GPR 17, 136, 1</div><div class='del'>-	RESTORE_GPR 18, 144, 1</div><div class='del'>-	RESTORE_GPR 19, 152, 1</div><div class='del'>-	RESTORE_GPR 20, 160, 1</div><div class='del'>-	RESTORE_GPR 21, 168, 1</div><div class='del'>-	RESTORE_GPR 22, 176, 1</div><div class='del'>-	RESTORE_GPR 23, 184, 1</div><div class='del'>-	RESTORE_GPR 24, 192, 1</div><div class='del'>-	RESTORE_GPR 25, 200, 1</div><div class='del'>-	RESTORE_GPR 26, 208, 1</div><div class='del'>-	RESTORE_GPR 27, 216, 1</div><div class='del'>-	RESTORE_GPR 28, 224, 1</div><div class='del'>-	RESTORE_GPR 29, 232, 1</div><div class='del'>-	RESTORE_GPR 30, 240, 1</div><div class='del'>-	RESTORE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	addi    1, 1, 752</div><div class='del'>-	ld 0, 16(1)</div><div class='del'>-	mtlr 0</div><div class='del'>-.endm # RESTORE_REGS</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# p[0] = a0*r0 + a1*r4*5 + a2*r3*5 + a3*r2*5 + a4*r1*5;</div><div class='del'>-# p[1] = a0*r1 + a1*r0   + a2*r4*5 + a3*r3*5 + a4*r2*5;</div><div class='del'>-# p[2] = a0*r2 + a1*r1   + a2*r0   + a3*r4*5 + a4*r3*5;</div><div class='del'>-# p[3] = a0*r3 + a1*r2   + a2*r1   + a3*r0   + a4*r4*5;</div><div class='del'>-# p[4] = a0*r4 + a1*r3   + a2*r2   + a3*r1   + a4*r0  ;</div><div class='del'>-#</div><div class='del'>-#    [r^2, r^3, r^1, r^4]</div><div class='del'>-#    [m3,  m2,  m4,  m1]</div><div class='del'>-#</div><div class='del'>-# multiply odd and even words</div><div class='del'>-.macro mul_odd</div><div class='del'>-	vmulouw	14, 4, 26</div><div class='del'>-	vmulouw	10, 5, 3</div><div class='del'>-	vmulouw	11, 6, 2</div><div class='del'>-	vmulouw	12, 7, 1</div><div class='del'>-	vmulouw	13, 8, 0</div><div class='del'>-	vmulouw	15, 4, 27</div><div class='del'>-	vaddudm	14, 14, 10</div><div class='del'>-	vaddudm	14, 14, 11</div><div class='del'>-	vmulouw	10, 5, 26</div><div class='del'>-	vmulouw	11, 6, 3</div><div class='del'>-	vaddudm	14, 14, 12</div><div class='del'>-	vaddudm	14, 14, 13	# x0</div><div class='del'>-	vaddudm	15, 15, 10</div><div class='del'>-	vaddudm	15, 15, 11</div><div class='del'>-	vmulouw	12, 7, 2</div><div class='del'>-	vmulouw	13, 8, 1</div><div class='del'>-	vaddudm	15, 15, 12</div><div class='del'>-	vaddudm	15, 15, 13	# x1</div><div class='del'>-	vmulouw	16, 4, 28</div><div class='del'>-	vmulouw	10, 5, 27</div><div class='del'>-	vmulouw	11, 6, 26</div><div class='del'>-	vaddudm	16, 16, 10</div><div class='del'>-	vaddudm	16, 16, 11</div><div class='del'>-	vmulouw	12, 7, 3</div><div class='del'>-	vmulouw	13, 8, 2</div><div class='del'>-	vaddudm	16, 16, 12</div><div class='del'>-	vaddudm	16, 16, 13	# x2</div><div class='del'>-	vmulouw	17, 4, 29</div><div class='del'>-	vmulouw	10, 5, 28</div><div class='del'>-	vmulouw	11, 6, 27</div><div class='del'>-	vaddudm	17, 17, 10</div><div class='del'>-	vaddudm	17, 17, 11</div><div class='del'>-	vmulouw	12, 7, 26</div><div class='del'>-	vmulouw	13, 8, 3</div><div class='del'>-	vaddudm	17, 17, 12</div><div class='del'>-	vaddudm	17, 17, 13	# x3</div><div class='del'>-	vmulouw	18, 4, 30</div><div class='del'>-	vmulouw	10, 5, 29</div><div class='del'>-	vmulouw	11, 6, 28</div><div class='del'>-	vaddudm	18, 18, 10</div><div class='del'>-	vaddudm	18, 18, 11</div><div class='del'>-	vmulouw	12, 7, 27</div><div class='del'>-	vmulouw	13, 8, 26</div><div class='del'>-	vaddudm	18, 18, 12</div><div class='del'>-	vaddudm	18, 18, 13	# x4</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro mul_even</div><div class='del'>-	vmuleuw	9, 4, 26</div><div class='del'>-	vmuleuw	10, 5, 3</div><div class='del'>-	vmuleuw	11, 6, 2</div><div class='del'>-	vmuleuw	12, 7, 1</div><div class='del'>-	vmuleuw	13, 8, 0</div><div class='del'>-	vaddudm	14, 14, 9</div><div class='del'>-	vaddudm	14, 14, 10</div><div class='del'>-	vaddudm	14, 14, 11</div><div class='del'>-	vaddudm	14, 14, 12</div><div class='del'>-	vaddudm	14, 14, 13	# x0</div><div class='del'>-</div><div class='del'>-	vmuleuw	9, 4, 27</div><div class='del'>-	vmuleuw	10, 5, 26</div><div class='del'>-	vmuleuw	11, 6, 3</div><div class='del'>-	vmuleuw	12, 7, 2</div><div class='del'>-	vmuleuw	13, 8, 1</div><div class='del'>-	vaddudm	15, 15, 9</div><div class='del'>-	vaddudm	15, 15, 10</div><div class='del'>-	vaddudm	15, 15, 11</div><div class='del'>-	vaddudm	15, 15, 12</div><div class='del'>-	vaddudm	15, 15, 13	# x1</div><div class='del'>-</div><div class='del'>-	vmuleuw	9, 4, 28</div><div class='del'>-	vmuleuw	10, 5, 27</div><div class='del'>-	vmuleuw	11, 6, 26</div><div class='del'>-	vmuleuw	12, 7, 3</div><div class='del'>-	vmuleuw	13, 8, 2</div><div class='del'>-	vaddudm	16, 16, 9</div><div class='del'>-	vaddudm	16, 16, 10</div><div class='del'>-	vaddudm	16, 16, 11</div><div class='del'>-	vaddudm	16, 16, 12</div><div class='del'>-	vaddudm	16, 16, 13	# x2</div><div class='del'>-</div><div class='del'>-	vmuleuw	9, 4, 29</div><div class='del'>-	vmuleuw	10, 5, 28</div><div class='del'>-	vmuleuw	11, 6, 27</div><div class='del'>-	vmuleuw	12, 7, 26</div><div class='del'>-	vmuleuw	13, 8, 3</div><div class='del'>-	vaddudm	17, 17, 9</div><div class='del'>-	vaddudm	17, 17, 10</div><div class='del'>-	vaddudm	17, 17, 11</div><div class='del'>-	vaddudm	17, 17, 12</div><div class='del'>-	vaddudm	17, 17, 13	# x3</div><div class='del'>-</div><div class='del'>-	vmuleuw	9, 4, 30</div><div class='del'>-	vmuleuw	10, 5, 29</div><div class='del'>-	vmuleuw	11, 6, 28</div><div class='del'>-	vmuleuw	12, 7, 27</div><div class='del'>-	vmuleuw	13, 8, 26</div><div class='del'>-	vaddudm	18, 18, 9</div><div class='del'>-	vaddudm	18, 18, 10</div><div class='del'>-	vaddudm	18, 18, 11</div><div class='del'>-	vaddudm	18, 18, 12</div><div class='del'>-	vaddudm	18, 18, 13	# x4</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# poly1305_setup_r</div><div class='del'>-#</div><div class='del'>-# setup r^4, r^3, r^2, r vectors</div><div class='del'>-#    [r, r^3, r^2, r^4]</div><div class='del'>-#    vs0 = [r0,...]</div><div class='del'>-#    vs1 = [r1,...]</div><div class='del'>-#    vs2 = [r2,...]</div><div class='del'>-#    vs3 = [r3,...]</div><div class='del'>-#    vs4 = [r4,...]</div><div class='del'>-#    vs5 = [r4*5,...]</div><div class='del'>-#    vs6 = [r3*5,...]</div><div class='del'>-#    vs7 = [r2*5,...]</div><div class='del'>-#    vs8 = [r1*5,...]</div><div class='del'>-#</div><div class='del'>-# r0, r4*5, r3*5, r2*5, r1*5;</div><div class='del'>-# r1, r0,   r4*5, r3*5, r2*5;</div><div class='del'>-# r2, r1,   r0,   r4*5, r3*5;</div><div class='del'>-# r3, r2,   r1,   r0,   r4*5;</div><div class='del'>-# r4, r3,   r2,   r1,   r0  ;</div><div class='del'>-#</div><div class='del'>-.macro poly1305_setup_r</div><div class='del'>-</div><div class='del'>-	# save r</div><div class='del'>-	xxlor	26, 58, 58</div><div class='del'>-	xxlor	27, 59, 59</div><div class='del'>-	xxlor	28, 60, 60</div><div class='del'>-	xxlor	29, 61, 61</div><div class='del'>-	xxlor	30, 62, 62</div><div class='del'>-</div><div class='del'>-	xxlxor	31, 31, 31</div><div class='del'>-</div><div class='del'>-#    [r, r^3, r^2, r^4]</div><div class='del'>-	# compute r^2</div><div class='del'>-	vmr	4, 26</div><div class='del'>-	vmr	5, 27</div><div class='del'>-	vmr	6, 28</div><div class='del'>-	vmr	7, 29</div><div class='del'>-	vmr	8, 30</div><div class='del'>-	bl	do_mul		# r^2 r^1</div><div class='del'>-	xxpermdi 58, 58, 36, 0x3		# r0</div><div class='del'>-	xxpermdi 59, 59, 37, 0x3		# r1</div><div class='del'>-	xxpermdi 60, 60, 38, 0x3		# r2</div><div class='del'>-	xxpermdi 61, 61, 39, 0x3		# r3</div><div class='del'>-	xxpermdi 62, 62, 40, 0x3		# r4</div><div class='del'>-	xxpermdi 36, 36, 36, 0x3</div><div class='del'>-	xxpermdi 37, 37, 37, 0x3</div><div class='del'>-	xxpermdi 38, 38, 38, 0x3</div><div class='del'>-	xxpermdi 39, 39, 39, 0x3</div><div class='del'>-	xxpermdi 40, 40, 40, 0x3</div><div class='del'>-	vspltisb 13, 2</div><div class='del'>-	vsld	9, 27, 13</div><div class='del'>-	vsld	10, 28, 13</div><div class='del'>-	vsld	11, 29, 13</div><div class='del'>-	vsld	12, 30, 13</div><div class='del'>-	vaddudm	0, 9, 27</div><div class='del'>-	vaddudm	1, 10, 28</div><div class='del'>-	vaddudm	2, 11, 29</div><div class='del'>-	vaddudm	3, 12, 30</div><div class='del'>-</div><div class='del'>-	bl	do_mul		# r^4 r^3</div><div class='del'>-	vmrgow	26, 26, 4</div><div class='del'>-	vmrgow	27, 27, 5</div><div class='del'>-	vmrgow	28, 28, 6</div><div class='del'>-	vmrgow	29, 29, 7</div><div class='del'>-	vmrgow	30, 30, 8</div><div class='del'>-	vspltisb 13, 2</div><div class='del'>-	vsld	9, 27, 13</div><div class='del'>-	vsld	10, 28, 13</div><div class='del'>-	vsld	11, 29, 13</div><div class='del'>-	vsld	12, 30, 13</div><div class='del'>-	vaddudm	0, 9, 27</div><div class='del'>-	vaddudm	1, 10, 28</div><div class='del'>-	vaddudm	2, 11, 29</div><div class='del'>-	vaddudm	3, 12, 30</div><div class='del'>-</div><div class='del'>-	# r^2 r^4</div><div class='del'>-	xxlor	0, 58, 58</div><div class='del'>-	xxlor	1, 59, 59</div><div class='del'>-	xxlor	2, 60, 60</div><div class='del'>-	xxlor	3, 61, 61</div><div class='del'>-	xxlor	4, 62, 62</div><div class='del'>-	xxlor	5, 32, 32</div><div class='del'>-	xxlor	6, 33, 33</div><div class='del'>-	xxlor	7, 34, 34</div><div class='del'>-	xxlor	8, 35, 35</div><div class='del'>-</div><div class='del'>-	vspltw	9, 26, 3</div><div class='del'>-	vspltw	10, 26, 2</div><div class='del'>-	vmrgow	26, 10, 9</div><div class='del'>-	vspltw	9, 27, 3</div><div class='del'>-	vspltw	10, 27, 2</div><div class='del'>-	vmrgow	27, 10, 9</div><div class='del'>-	vspltw	9, 28, 3</div><div class='del'>-	vspltw	10, 28, 2</div><div class='del'>-	vmrgow	28, 10, 9</div><div class='del'>-	vspltw	9, 29, 3</div><div class='del'>-	vspltw	10, 29, 2</div><div class='del'>-	vmrgow	29, 10, 9</div><div class='del'>-	vspltw	9, 30, 3</div><div class='del'>-	vspltw	10, 30, 2</div><div class='del'>-	vmrgow	30, 10, 9</div><div class='del'>-</div><div class='del'>-	vsld	9, 27, 13</div><div class='del'>-	vsld	10, 28, 13</div><div class='del'>-	vsld	11, 29, 13</div><div class='del'>-	vsld	12, 30, 13</div><div class='del'>-	vaddudm	0, 9, 27</div><div class='del'>-	vaddudm	1, 10, 28</div><div class='del'>-	vaddudm	2, 11, 29</div><div class='del'>-	vaddudm	3, 12, 30</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-SYM_FUNC_START_LOCAL(do_mul)</div><div class='del'>-	mul_odd</div><div class='del'>-</div><div class='del'>-	# do reduction ( h %= p )</div><div class='del'>-	# carry reduction</div><div class='del'>-	vspltisb 9, 2</div><div class='del'>-	vsrd	10, 14, 31</div><div class='del'>-	vsrd	11, 17, 31</div><div class='del'>-	vand	7, 17, 25</div><div class='del'>-	vand	4, 14, 25</div><div class='del'>-	vaddudm	18, 18, 11</div><div class='del'>-	vsrd	12, 18, 31</div><div class='del'>-	vaddudm	15, 15, 10</div><div class='del'>-</div><div class='del'>-	vsrd	11, 15, 31</div><div class='del'>-	vand	8, 18, 25</div><div class='del'>-	vand	5, 15, 25</div><div class='del'>-	vaddudm	4, 4, 12</div><div class='del'>-	vsld	10, 12, 9</div><div class='del'>-	vaddudm	6, 16, 11</div><div class='del'>-</div><div class='del'>-	vsrd	13, 6, 31</div><div class='del'>-	vand	6, 6, 25</div><div class='del'>-	vaddudm	4, 4, 10</div><div class='del'>-	vsrd	10, 4, 31</div><div class='del'>-	vaddudm	7, 7, 13</div><div class='del'>-</div><div class='del'>-	vsrd	11, 7, 31</div><div class='del'>-	vand	7, 7, 25</div><div class='del'>-	vand	4, 4, 25</div><div class='del'>-	vaddudm	5, 5, 10</div><div class='del'>-	vaddudm	8, 8, 11</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(do_mul)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# init key</div><div class='del'>-#</div><div class='del'>-.macro do_poly1305_init</div><div class='del'>-	addis	10, 2, rmask@toc@ha</div><div class='del'>-	addi	10, 10, rmask@toc@l</div><div class='del'>-</div><div class='del'>-	ld	11, 0(10)</div><div class='del'>-	ld	12, 8(10)</div><div class='del'>-</div><div class='del'>-	li	14, 16</div><div class='del'>-	li	15, 32</div><div class='del'>-	addis	10, 2, cnum@toc@ha</div><div class='del'>-	addi	10, 10, cnum@toc@l</div><div class='del'>-	lvx	25, 0, 10	# v25 - mask</div><div class='del'>-	lvx	31, 14, 10	# v31 = 1a</div><div class='del'>-	lvx	19, 15, 10	# v19 = 1 &lt;&lt; 24</div><div class='del'>-	lxv	24, 48(10)	# vs24</div><div class='del'>-	lxv	25, 64(10)	# vs25</div><div class='del'>-</div><div class='del'>-	# initialize</div><div class='del'>-	# load key from r3 to vectors</div><div class='del'>-	ld	9, 24(3)</div><div class='del'>-	ld	10, 32(3)</div><div class='del'>-	and.	9, 9, 11</div><div class='del'>-	and.	10, 10, 12</div><div class='del'>-</div><div class='del'>-	# break 26 bits</div><div class='del'>-	extrdi	14, 9, 26, 38</div><div class='del'>-	extrdi	15, 9, 26, 12</div><div class='del'>-	extrdi	16, 9, 12, 0</div><div class='del'>-	mtvsrdd	58, 0, 14</div><div class='del'>-	insrdi	16, 10, 14, 38</div><div class='del'>-	mtvsrdd	59, 0, 15</div><div class='del'>-	extrdi	17, 10, 26, 24</div><div class='del'>-	mtvsrdd	60, 0, 16</div><div class='del'>-	extrdi	18, 10, 24, 0</div><div class='del'>-	mtvsrdd	61, 0, 17</div><div class='del'>-	mtvsrdd	62, 0, 18</div><div class='del'>-</div><div class='del'>-	# r1 = r1 * 5, r2 = r2 * 5, r3 = r3 * 5, r4 = r4 * 5</div><div class='del'>-	li	9, 5</div><div class='del'>-	mtvsrdd	36, 0, 9</div><div class='del'>-	vmulouw	0, 27, 4		# v0 = rr0</div><div class='del'>-	vmulouw	1, 28, 4		# v1 = rr1</div><div class='del'>-	vmulouw	2, 29, 4		# v2 = rr2</div><div class='del'>-	vmulouw	3, 30, 4		# v3 = rr3</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# poly1305_p10le_4blocks( uint8_t *k, uint32_t mlen, uint8_t *m)</div><div class='del'>-#  k = 32 bytes key</div><div class='del'>-#  r3 = k (r, s)</div><div class='del'>-#  r4 = mlen</div><div class='del'>-#  r5 = m</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START(poly1305_p10le_4blocks)</div><div class='del'>-.align 5</div><div class='del'>-	cmpdi	5, 64</div><div class='del'>-	blt	Out_no_poly1305</div><div class='del'>-</div><div class='del'>-	SAVE_REGS</div><div class='del'>-</div><div class='del'>-	do_poly1305_init</div><div class='del'>-</div><div class='del'>-	li	21, 0	# counter to message</div><div class='del'>-</div><div class='del'>-	poly1305_setup_r</div><div class='del'>-</div><div class='del'>-	# load previous H state</div><div class='del'>-	# break/convert r6 to 26 bits</div><div class='del'>-	ld	9, 0(3)</div><div class='del'>-	ld	10, 8(3)</div><div class='del'>-	ld	19, 16(3)</div><div class='del'>-	sldi	19, 19, 24</div><div class='del'>-	mtvsrdd	41, 0, 19</div><div class='del'>-	extrdi	14, 9, 26, 38</div><div class='del'>-	extrdi	15, 9, 26, 12</div><div class='del'>-	extrdi	16, 9, 12, 0</div><div class='del'>-	mtvsrdd	36, 0, 14</div><div class='del'>-	insrdi	16, 10, 14, 38</div><div class='del'>-	mtvsrdd	37, 0, 15</div><div class='del'>-	extrdi	17, 10, 26, 24</div><div class='del'>-	mtvsrdd	38, 0, 16</div><div class='del'>-	extrdi	18, 10, 24, 0</div><div class='del'>-	mtvsrdd	39, 0, 17</div><div class='del'>-	mtvsrdd	40, 0, 18</div><div class='del'>-	vor	8, 8, 9</div><div class='del'>-</div><div class='del'>-	# input m1 m2</div><div class='del'>-	add	20, 4, 21</div><div class='del'>-	xxlor	49, 24, 24</div><div class='del'>-	xxlor	50, 25, 25</div><div class='del'>-	lxvw4x	43, 0, 20</div><div class='del'>-	addi	17, 20, 16</div><div class='del'>-	lxvw4x	44, 0, 17</div><div class='del'>-	vperm	14, 11, 12, 17</div><div class='del'>-	vperm	15, 11, 12, 18</div><div class='del'>-	vand	9, 14, 25	# a0</div><div class='del'>-	vsrd	10, 14, 31	# &gt;&gt; 26</div><div class='del'>-	vsrd	11, 10, 31	# 12 bits left</div><div class='del'>-	vand	10, 10, 25	# a1</div><div class='del'>-	vspltisb 13, 12</div><div class='del'>-	vand	16, 15, 25</div><div class='del'>-	vsld	12, 16, 13</div><div class='del'>-	vor	11, 11, 12</div><div class='del'>-	vand	11, 11, 25	# a2</div><div class='del'>-	vspltisb 13, 14</div><div class='del'>-	vsrd	12, 15, 13	# &gt;&gt; 14</div><div class='del'>-	vsrd	13, 12, 31	# &gt;&gt; 26, a4</div><div class='del'>-	vand	12, 12, 25	# a3</div><div class='del'>-</div><div class='del'>-	vaddudm	20, 4, 9</div><div class='del'>-	vaddudm	21, 5, 10</div><div class='del'>-	vaddudm	22, 6, 11</div><div class='del'>-	vaddudm	23, 7, 12</div><div class='del'>-	vaddudm	24, 8, 13</div><div class='del'>-</div><div class='del'>-	# m3 m4</div><div class='del'>-	addi	17, 17, 16</div><div class='del'>-	lxvw4x	43, 0, 17</div><div class='del'>-	addi	17, 17, 16</div><div class='del'>-	lxvw4x	44, 0, 17</div><div class='del'>-	vperm	14, 11, 12, 17</div><div class='del'>-	vperm	15, 11, 12, 18</div><div class='del'>-	vand	9, 14, 25	# a0</div><div class='del'>-	vsrd	10, 14, 31	# &gt;&gt; 26</div><div class='del'>-	vsrd	11, 10, 31	# 12 bits left</div><div class='del'>-	vand	10, 10, 25	# a1</div><div class='del'>-	vspltisb 13, 12</div><div class='del'>-	vand	16, 15, 25</div><div class='del'>-	vsld	12, 16, 13</div><div class='del'>-	vspltisb 13, 14</div><div class='del'>-	vor	11, 11, 12</div><div class='del'>-	vand	11, 11, 25	# a2</div><div class='del'>-	vsrd	12, 15, 13	# &gt;&gt; 14</div><div class='del'>-	vsrd	13, 12, 31	# &gt;&gt; 26, a4</div><div class='del'>-	vand	12, 12, 25	# a3</div><div class='del'>-</div><div class='del'>-	# Smash 4 message blocks into 5 vectors of [m4,  m2,  m3,  m1]</div><div class='del'>-	vmrgow	4, 9, 20</div><div class='del'>-	vmrgow	5, 10, 21</div><div class='del'>-	vmrgow	6, 11, 22</div><div class='del'>-	vmrgow	7, 12, 23</div><div class='del'>-	vmrgow	8, 13, 24</div><div class='del'>-	vaddudm	8, 8, 19</div><div class='del'>-</div><div class='del'>-	addi	5, 5, -64	# len -= 64</div><div class='del'>-	addi	21, 21, 64	# offset += 64</div><div class='del'>-</div><div class='del'>-	li      9, 64</div><div class='del'>-	divdu   31, 5, 9</div><div class='del'>-</div><div class='del'>-	cmpdi	31, 0</div><div class='del'>-	ble	Skip_block_loop</div><div class='del'>-</div><div class='del'>-	mtctr	31</div><div class='del'>-</div><div class='del'>-# h4 =   m1 * r⁴ + m2 * r³ + m3 * r² + m4 * r</div><div class='del'>-# Rewrite the polynominal sum of product as follows,</div><div class='del'>-# h1 = (h0 + m1) * r^2,	h2 = (h0 + m2) * r^2</div><div class='del'>-# h3 = (h1 + m3) * r^2,	h4 = (h2 + m4) * r^2  --&gt; (h0 + m1) r*4 + (h3 + m3) r^2, (h0 + m2) r^4 + (h0 + m4) r^2</div><div class='del'>-#  .... Repeat</div><div class='del'>-# h5 = (h3 + m5) * r^2,	h6 = (h4 + m6) * r^2  --&gt;</div><div class='del'>-# h7 = (h5 + m7) * r^2,	h8 = (h6 + m8) * r^1  --&gt; m5 * r^4 + m6 * r^3 + m7 * r^2 + m8 * r</div><div class='del'>-#</div><div class='del'>-loop_4blocks:</div><div class='del'>-</div><div class='del'>-	# Multiply odd words and even words</div><div class='del'>-	mul_odd</div><div class='del'>-	mul_even</div><div class='del'>-	# carry reduction</div><div class='del'>-	vspltisb 9, 2</div><div class='del'>-	vsrd	10, 14, 31</div><div class='del'>-	vsrd	11, 17, 31</div><div class='del'>-	vand	7, 17, 25</div><div class='del'>-	vand	4, 14, 25</div><div class='del'>-	vaddudm	18, 18, 11</div><div class='del'>-	vsrd	12, 18, 31</div><div class='del'>-	vaddudm	15, 15, 10</div><div class='del'>-</div><div class='del'>-	vsrd	11, 15, 31</div><div class='del'>-	vand	8, 18, 25</div><div class='del'>-	vand	5, 15, 25</div><div class='del'>-	vaddudm	4, 4, 12</div><div class='del'>-	vsld	10, 12, 9</div><div class='del'>-	vaddudm	6, 16, 11</div><div class='del'>-</div><div class='del'>-	vsrd	13, 6, 31</div><div class='del'>-	vand	6, 6, 25</div><div class='del'>-	vaddudm	4, 4, 10</div><div class='del'>-	vsrd	10, 4, 31</div><div class='del'>-	vaddudm	7, 7, 13</div><div class='del'>-</div><div class='del'>-	vsrd	11, 7, 31</div><div class='del'>-	vand	7, 7, 25</div><div class='del'>-	vand	4, 4, 25</div><div class='del'>-	vaddudm	5, 5, 10</div><div class='del'>-	vaddudm	8, 8, 11</div><div class='del'>-</div><div class='del'>-	# input m1  m2  m3  m4</div><div class='del'>-	add	20, 4, 21</div><div class='del'>-	xxlor	49, 24, 24</div><div class='del'>-	xxlor	50, 25, 25</div><div class='del'>-	lxvw4x	43, 0, 20</div><div class='del'>-	addi	17, 20, 16</div><div class='del'>-	lxvw4x	44, 0, 17</div><div class='del'>-	vperm	14, 11, 12, 17</div><div class='del'>-	vperm	15, 11, 12, 18</div><div class='del'>-	addi	17, 17, 16</div><div class='del'>-	lxvw4x	43, 0, 17</div><div class='del'>-	addi	17, 17, 16</div><div class='del'>-	lxvw4x	44, 0, 17</div><div class='del'>-	vperm	17, 11, 12, 17</div><div class='del'>-	vperm	18, 11, 12, 18</div><div class='del'>-</div><div class='del'>-	vand	20, 14, 25	# a0</div><div class='del'>-	vand	9, 17, 25	# a0</div><div class='del'>-	vsrd	21, 14, 31	# &gt;&gt; 26</div><div class='del'>-	vsrd	22, 21, 31	# 12 bits left</div><div class='del'>-	vsrd	10, 17, 31	# &gt;&gt; 26</div><div class='del'>-	vsrd	11, 10, 31	# 12 bits left</div><div class='del'>-</div><div class='del'>-	vand	21, 21, 25	# a1</div><div class='del'>-	vand	10, 10, 25	# a1</div><div class='del'>-</div><div class='del'>-	vspltisb 13, 12</div><div class='del'>-	vand	16, 15, 25</div><div class='del'>-	vsld	23, 16, 13</div><div class='del'>-	vor	22, 22, 23</div><div class='del'>-	vand	22, 22, 25	# a2</div><div class='del'>-	vand	16, 18, 25</div><div class='del'>-	vsld	12, 16, 13</div><div class='del'>-	vor	11, 11, 12</div><div class='del'>-	vand	11, 11, 25	# a2</div><div class='del'>-	vspltisb 13, 14</div><div class='del'>-	vsrd	23, 15, 13	# &gt;&gt; 14</div><div class='del'>-	vsrd	24, 23, 31	# &gt;&gt; 26, a4</div><div class='del'>-	vand	23, 23, 25	# a3</div><div class='del'>-	vsrd	12, 18, 13	# &gt;&gt; 14</div><div class='del'>-	vsrd	13, 12, 31	# &gt;&gt; 26, a4</div><div class='del'>-	vand	12, 12, 25	# a3</div><div class='del'>-</div><div class='del'>-	vaddudm	4, 4, 20</div><div class='del'>-	vaddudm	5, 5, 21</div><div class='del'>-	vaddudm	6, 6, 22</div><div class='del'>-	vaddudm	7, 7, 23</div><div class='del'>-	vaddudm	8, 8, 24</div><div class='del'>-</div><div class='del'>-	# Smash 4 message blocks into 5 vectors of [m4,  m2,  m3,  m1]</div><div class='del'>-	vmrgow	4, 9, 4</div><div class='del'>-	vmrgow	5, 10, 5</div><div class='del'>-	vmrgow	6, 11, 6</div><div class='del'>-	vmrgow	7, 12, 7</div><div class='del'>-	vmrgow	8, 13, 8</div><div class='del'>-	vaddudm	8, 8, 19</div><div class='del'>-</div><div class='del'>-	addi	5, 5, -64	# len -= 64</div><div class='del'>-	addi	21, 21, 64	# offset += 64</div><div class='del'>-</div><div class='del'>-	bdnz	loop_4blocks</div><div class='del'>-</div><div class='del'>-Skip_block_loop:</div><div class='del'>-	xxlor	58, 0, 0</div><div class='del'>-	xxlor	59, 1, 1</div><div class='del'>-	xxlor	60, 2, 2</div><div class='del'>-	xxlor	61, 3, 3</div><div class='del'>-	xxlor	62, 4, 4</div><div class='del'>-	xxlor	32, 5, 5</div><div class='del'>-	xxlor	33, 6, 6</div><div class='del'>-	xxlor	34, 7, 7</div><div class='del'>-	xxlor	35, 8, 8</div><div class='del'>-</div><div class='del'>-	# Multiply odd words and even words</div><div class='del'>-	mul_odd</div><div class='del'>-	mul_even</div><div class='del'>-</div><div class='del'>-	# Sum the products.</div><div class='del'>-	xxpermdi 41, 31, 46, 0</div><div class='del'>-	xxpermdi 42, 31, 47, 0</div><div class='del'>-	vaddudm	4, 14, 9</div><div class='del'>-	xxpermdi 36, 31, 36, 3</div><div class='del'>-	vaddudm	5, 15, 10</div><div class='del'>-	xxpermdi 37, 31, 37, 3</div><div class='del'>-	xxpermdi 43, 31, 48, 0</div><div class='del'>-	vaddudm	6, 16, 11</div><div class='del'>-	xxpermdi 38, 31, 38, 3</div><div class='del'>-	xxpermdi 44, 31, 49, 0</div><div class='del'>-	vaddudm	7, 17, 12</div><div class='del'>-	xxpermdi 39, 31, 39, 3</div><div class='del'>-	xxpermdi 45, 31, 50, 0</div><div class='del'>-	vaddudm	8, 18, 13</div><div class='del'>-	xxpermdi 40, 31, 40, 3</div><div class='del'>-</div><div class='del'>-	# carry reduction</div><div class='del'>-	vspltisb 9, 2</div><div class='del'>-	vsrd	10, 4, 31</div><div class='del'>-	vsrd	11, 7, 31</div><div class='del'>-	vand	7, 7, 25</div><div class='del'>-	vand	4, 4, 25</div><div class='del'>-	vaddudm	8, 8, 11</div><div class='del'>-	vsrd	12, 8, 31</div><div class='del'>-	vaddudm	5, 5, 10</div><div class='del'>-</div><div class='del'>-	vsrd	11, 5, 31</div><div class='del'>-	vand	8, 8, 25</div><div class='del'>-	vand	5, 5, 25</div><div class='del'>-	vaddudm	4, 4, 12</div><div class='del'>-	vsld	10, 12, 9</div><div class='del'>-	vaddudm	6, 6, 11</div><div class='del'>-</div><div class='del'>-	vsrd	13, 6, 31</div><div class='del'>-	vand	6, 6, 25</div><div class='del'>-	vaddudm	4, 4, 10</div><div class='del'>-	vsrd	10, 4, 31</div><div class='del'>-	vaddudm	7, 7, 13</div><div class='del'>-</div><div class='del'>-	vsrd	11, 7, 31</div><div class='del'>-	vand	7, 7, 25</div><div class='del'>-	vand	4, 4, 25</div><div class='del'>-	vaddudm	5, 5, 10</div><div class='del'>-	vsrd	10, 5, 31</div><div class='del'>-	vand	5, 5, 25</div><div class='del'>-	vaddudm	6, 6, 10</div><div class='del'>-	vaddudm	8, 8, 11</div><div class='del'>-</div><div class='del'>-	b	do_final_update</div><div class='del'>-</div><div class='del'>-do_final_update:</div><div class='del'>-	# combine 26 bit limbs</div><div class='del'>-	# v4, v5, v6, v7 and v8 are 26 bit vectors</div><div class='del'>-	vsld	5, 5, 31</div><div class='del'>-	vor	20, 4, 5</div><div class='del'>-	vspltisb 11, 12</div><div class='del'>-	vsrd	12, 6, 11</div><div class='del'>-	vsld	6, 6, 31</div><div class='del'>-	vsld	6, 6, 31</div><div class='del'>-	vor	20, 20, 6</div><div class='del'>-	vspltisb 11, 14</div><div class='del'>-	vsld	7, 7, 11</div><div class='del'>-	vor	21, 7, 12</div><div class='del'>-	mfvsrld	16, 40		# save last 2 bytes</div><div class='del'>-	vsld	8, 8, 11</div><div class='del'>-	vsld	8, 8, 31</div><div class='del'>-	vor	21, 21, 8</div><div class='del'>-	mfvsrld	17, 52</div><div class='del'>-	mfvsrld	19, 53</div><div class='del'>-	srdi	16, 16, 24</div><div class='del'>-</div><div class='del'>-	std	17, 0(3)</div><div class='del'>-	std	19, 8(3)</div><div class='del'>-	stw	16, 16(3)</div><div class='del'>-</div><div class='del'>-Out_loop:</div><div class='del'>-	li	3, 0</div><div class='del'>-</div><div class='del'>-	RESTORE_REGS</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-Out_no_poly1305:</div><div class='del'>-	li	3, 0</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(poly1305_p10le_4blocks)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# =======================================================================</div><div class='del'>-# The following functions implement 64 x 64 bits multiplication poly1305.</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START_LOCAL(Poly1305_init_64)</div><div class='del'>-	#  mask 0x0FFFFFFC0FFFFFFC</div><div class='del'>-	#  mask 0x0FFFFFFC0FFFFFFF</div><div class='del'>-	addis	10, 2, rmask@toc@ha</div><div class='del'>-	addi	10, 10, rmask@toc@l</div><div class='del'>-	ld	11, 0(10)</div><div class='del'>-	ld	12, 8(10)</div><div class='del'>-</div><div class='del'>-	# initialize</div><div class='del'>-	# load key from r3</div><div class='del'>-	ld	9, 24(3)</div><div class='del'>-	ld	10, 32(3)</div><div class='del'>-	and.	9, 9, 11	# cramp mask r0</div><div class='del'>-	and.	10, 10, 12	# cramp mask r1</div><div class='del'>-</div><div class='del'>-        srdi    21, 10, 2</div><div class='del'>-        add     19, 21, 10      # s1: r19 - (r1 &gt;&gt; 2) *5</div><div class='del'>-</div><div class='del'>-        # setup r and s</div><div class='del'>-        li      25, 0</div><div class='del'>-	mtvsrdd 32+0, 9, 19	# r0, s1</div><div class='del'>-	mtvsrdd 32+1, 10, 9	# r1, r0</div><div class='del'>-	mtvsrdd 32+2, 19, 25	# s1</div><div class='del'>-	mtvsrdd 32+3, 9, 25	# r0</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(Poly1305_init_64)</div><div class='del'>-</div><div class='del'>-# Poly1305_mult</div><div class='del'>-# v6 = (h0, h1), v8 = h2</div><div class='del'>-# v0 = (r0, s1), v1 = (r1, r0), v2 = s1, v3 = r0</div><div class='del'>-#</div><div class='del'>-# Output: v7, v10, v11</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START_LOCAL(Poly1305_mult)</div><div class='del'>-	#</div><div class='del'>-	#	d0 = h0 * r0 + h1 * s1</div><div class='del'>-	vmsumudm	7, 6, 0, 9		# h0 * r0, h1 * s1</div><div class='del'>-</div><div class='del'>-	#	d1 = h0 * r1 + h1 * r0 + h2 * s1</div><div class='del'>-	vmsumudm	11, 6, 1, 9		# h0 * r1, h1 * r0</div><div class='del'>-	vmsumudm	10, 8, 2, 11		# d1 += h2 * s1</div><div class='del'>-</div><div class='del'>-	#       d2 = r0</div><div class='del'>-	vmsumudm	11, 8, 3, 9		# d2 = h2 * r0</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(Poly1305_mult)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# carry reduction</div><div class='del'>-# h %=p</div><div class='del'>-#</div><div class='del'>-# Input: v7, v10, v11</div><div class='del'>-# Output: r27, r28, r29</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START_LOCAL(Carry_reduction)</div><div class='del'>-	mfvsrld	27, 32+7</div><div class='del'>-	mfvsrld	28, 32+10</div><div class='del'>-	mfvsrld	29, 32+11</div><div class='del'>-	mfvsrd	20, 32+7	# h0.h</div><div class='del'>-	mfvsrd	21, 32+10	# h1.h</div><div class='del'>-</div><div class='del'>-	addc	28, 28, 20</div><div class='del'>-	adde	29, 29, 21</div><div class='del'>-	srdi	22, 29, 0x2</div><div class='del'>-	sldi	23, 22, 0x2</div><div class='del'>-	add	23, 23, 22	# (h2 &amp; 3) * 5</div><div class='del'>-	addc	27, 27, 23	# h0</div><div class='del'>-	addze	28, 28		# h1</div><div class='del'>-	andi.	29, 29, 0x3	# h2</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(Carry_reduction)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# poly1305 multiplication</div><div class='del'>-# h *= r, h %= p</div><div class='del'>-#	d0 = h0 * r0 + h1 * s1</div><div class='del'>-#	d1 = h0 * r1 + h1 * r0 + h2 * s1</div><div class='del'>-#       d2 = h0 * r0</div><div class='del'>-#</div><div class='del'>-#</div><div class='del'>-# unsigned int poly1305_test_64s(unisgned char *state, const byte *src, size_t len, highbit)</div><div class='del'>-#   - no highbit if final leftover block (highbit = 0)</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START(poly1305_64s)</div><div class='del'>-	cmpdi	5, 0</div><div class='del'>-	ble	Out_no_poly1305_64</div><div class='del'>-</div><div class='del'>-	mflr 0</div><div class='del'>-	std 0, 16(1)</div><div class='del'>-	stdu 1,-400(1)</div><div class='del'>-</div><div class='del'>-	SAVE_GPR 14, 112, 1</div><div class='del'>-	SAVE_GPR 15, 120, 1</div><div class='del'>-	SAVE_GPR 16, 128, 1</div><div class='del'>-	SAVE_GPR 17, 136, 1</div><div class='del'>-	SAVE_GPR 18, 144, 1</div><div class='del'>-	SAVE_GPR 19, 152, 1</div><div class='del'>-	SAVE_GPR 20, 160, 1</div><div class='del'>-	SAVE_GPR 21, 168, 1</div><div class='del'>-	SAVE_GPR 22, 176, 1</div><div class='del'>-	SAVE_GPR 23, 184, 1</div><div class='del'>-	SAVE_GPR 24, 192, 1</div><div class='del'>-	SAVE_GPR 25, 200, 1</div><div class='del'>-	SAVE_GPR 26, 208, 1</div><div class='del'>-	SAVE_GPR 27, 216, 1</div><div class='del'>-	SAVE_GPR 28, 224, 1</div><div class='del'>-	SAVE_GPR 29, 232, 1</div><div class='del'>-	SAVE_GPR 30, 240, 1</div><div class='del'>-	SAVE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	# Init poly1305</div><div class='del'>-	bl Poly1305_init_64</div><div class='del'>-</div><div class='del'>-	li 25, 0			# offset to inp and outp</div><div class='del'>-</div><div class='del'>-	add 11, 25, 4</div><div class='del'>-</div><div class='del'>-	# load h</div><div class='del'>-	# h0, h1, h2?</div><div class='del'>-        ld	27, 0(3)</div><div class='del'>-        ld	28, 8(3)</div><div class='del'>-        lwz	29, 16(3)</div><div class='del'>-</div><div class='del'>-        li      30, 16</div><div class='del'>-        divdu   31, 5, 30</div><div class='del'>-</div><div class='del'>-        mtctr   31</div><div class='del'>-</div><div class='del'>-        mr      24, 6		# highbit</div><div class='del'>-</div><div class='del'>-Loop_block_64:</div><div class='del'>-	vxor	9, 9, 9</div><div class='del'>-</div><div class='del'>-	ld	20, 0(11)</div><div class='del'>-	ld	21, 8(11)</div><div class='del'>-	addi	11, 11, 16</div><div class='del'>-</div><div class='del'>-	addc	27, 27, 20</div><div class='del'>-	adde	28, 28, 21</div><div class='del'>-	adde	29, 29, 24</div><div class='del'>-</div><div class='del'>-	li	22, 0</div><div class='del'>-	mtvsrdd	32+6, 27, 28	# h0, h1</div><div class='del'>-	mtvsrdd	32+8, 29, 22	# h2</div><div class='del'>-</div><div class='del'>-	bl	Poly1305_mult</div><div class='del'>-</div><div class='del'>-	bl	Carry_reduction</div><div class='del'>-</div><div class='del'>-	bdnz	Loop_block_64</div><div class='del'>-</div><div class='del'>-	std	27, 0(3)</div><div class='del'>-	std	28, 8(3)</div><div class='del'>-	stw	29, 16(3)</div><div class='del'>-</div><div class='del'>-	li	3, 0</div><div class='del'>-</div><div class='del'>-	RESTORE_GPR 14, 112, 1</div><div class='del'>-	RESTORE_GPR 15, 120, 1</div><div class='del'>-	RESTORE_GPR 16, 128, 1</div><div class='del'>-	RESTORE_GPR 17, 136, 1</div><div class='del'>-	RESTORE_GPR 18, 144, 1</div><div class='del'>-	RESTORE_GPR 19, 152, 1</div><div class='del'>-	RESTORE_GPR 20, 160, 1</div><div class='del'>-	RESTORE_GPR 21, 168, 1</div><div class='del'>-	RESTORE_GPR 22, 176, 1</div><div class='del'>-	RESTORE_GPR 23, 184, 1</div><div class='del'>-	RESTORE_GPR 24, 192, 1</div><div class='del'>-	RESTORE_GPR 25, 200, 1</div><div class='del'>-	RESTORE_GPR 26, 208, 1</div><div class='del'>-	RESTORE_GPR 27, 216, 1</div><div class='del'>-	RESTORE_GPR 28, 224, 1</div><div class='del'>-	RESTORE_GPR 29, 232, 1</div><div class='del'>-	RESTORE_GPR 30, 240, 1</div><div class='del'>-	RESTORE_GPR 31, 248, 1</div><div class='del'>-</div><div class='del'>-	addi    1, 1, 400</div><div class='del'>-	ld 0, 16(1)</div><div class='del'>-	mtlr 0</div><div class='del'>-</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-Out_no_poly1305_64:</div><div class='del'>-	li	3, 0</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(poly1305_64s)</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# Input: r3 = h, r4 = s, r5 = mac</div><div class='del'>-# mac = h + s</div><div class='del'>-#</div><div class='del'>-SYM_FUNC_START(poly1305_emit_64)</div><div class='del'>-	ld	10, 0(3)</div><div class='del'>-	ld	11, 8(3)</div><div class='del'>-	ld	12, 16(3)</div><div class='del'>-</div><div class='del'>-	# compare modulus</div><div class='del'>-	# h + 5 + (-p)</div><div class='del'>-	mr	6, 10</div><div class='del'>-	mr	7, 11</div><div class='del'>-	mr	8, 12</div><div class='del'>-	addic.	6, 6, 5</div><div class='del'>-	addze	7, 7</div><div class='del'>-	addze	8, 8</div><div class='del'>-	srdi	9, 8, 2		# overflow?</div><div class='del'>-	cmpdi	9, 0</div><div class='del'>-	beq	Skip_h64</div><div class='del'>-	mr	10, 6</div><div class='del'>-	mr	11, 7</div><div class='del'>-	mr	12, 8</div><div class='del'>-</div><div class='del'>-Skip_h64:</div><div class='del'>-	ld	6, 0(4)</div><div class='del'>-	ld	7, 8(4)</div><div class='del'>-	addc	10, 10, 6</div><div class='del'>-	adde	11, 11, 7</div><div class='del'>-	addze	12, 12</div><div class='del'>-</div><div class='del'>-	std	10, 0(5)</div><div class='del'>-	std	11, 8(5)</div><div class='del'>-	blr</div><div class='del'>-SYM_FUNC_END(poly1305_emit_64)</div><div class='del'>-</div><div class='del'>-SYM_DATA_START_LOCAL(RMASK)</div><div class='del'>-.align 5</div><div class='del'>-rmask:</div><div class='del'>-.byte	0xff, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f</div><div class='del'>-cnum:</div><div class='del'>-.long	0x03ffffff, 0x00000000, 0x03ffffff, 0x00000000</div><div class='del'>-.long	0x1a, 0x00, 0x1a, 0x00</div><div class='del'>-.long	0x01000000, 0x01000000, 0x01000000, 0x01000000</div><div class='del'>-.long	0x00010203, 0x04050607, 0x10111213, 0x14151617</div><div class='del'>-.long	0x08090a0b, 0x0c0d0e0f, 0x18191a1b, 0x1c1d1e1f</div><div class='del'>-SYM_DATA_END(RMASK)</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1-powerpc-asm.S b/arch/powerpc/crypto/sha1-powerpc-asm.S<br/>deleted file mode 100644<br/>index f0d5ed557ab1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha1-powerpc-asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-powerpc-asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,188 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/*</div><div class='del'>- * SHA-1 implementation for PowerPC.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2005 Paul Mackerras &lt;paulus@samba.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/asm-compat.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef __BIG_ENDIAN__</div><div class='del'>-#define LWZ(rt, d, ra)	\</div><div class='del'>-	lwz	rt,d(ra)</div><div class='del'>-#else</div><div class='del'>-#define LWZ(rt, d, ra)	\</div><div class='del'>-	li	rt,d;	\</div><div class='del'>-	lwbrx	rt,rt,ra</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We roll the registers for T, A, B, C, D, E around on each</div><div class='del'>- * iteration; T on iteration t is A on iteration t+1, and so on.</div><div class='del'>- * We use registers 7 - 12 for this.</div><div class='del'>- */</div><div class='del'>-#define RT(t)	((((t)+5)%6)+7)</div><div class='del'>-#define RA(t)	((((t)+4)%6)+7)</div><div class='del'>-#define RB(t)	((((t)+3)%6)+7)</div><div class='del'>-#define RC(t)	((((t)+2)%6)+7)</div><div class='del'>-#define RD(t)	((((t)+1)%6)+7)</div><div class='del'>-#define RE(t)	((((t)+0)%6)+7)</div><div class='del'>-</div><div class='del'>-/* We use registers 16 - 31 for the W values */</div><div class='del'>-#define W(t)	(((t)%16)+16)</div><div class='del'>-</div><div class='del'>-#define LOADW(t)				\</div><div class='del'>-	LWZ(W(t),(t)*4,r4)</div><div class='del'>-</div><div class='del'>-#define STEPD0_LOAD(t)				\</div><div class='del'>-	andc	r0,RD(t),RB(t);		\</div><div class='del'>-	and	r6,RB(t),RC(t);		\</div><div class='del'>-	rotlwi	RT(t),RA(t),5;			\</div><div class='del'>-	or	r6,r6,r0;			\</div><div class='del'>-	add	r0,RE(t),r15;			\</div><div class='del'>-	add	RT(t),RT(t),r6;		\</div><div class='del'>-	add	r14,r0,W(t);			\</div><div class='del'>-	LWZ(W((t)+4),((t)+4)*4,r4);	\</div><div class='del'>-	rotlwi	RB(t),RB(t),30;			\</div><div class='del'>-	add	RT(t),RT(t),r14</div><div class='del'>-</div><div class='del'>-#define STEPD0_UPDATE(t)			\</div><div class='del'>-	and	r6,RB(t),RC(t);		\</div><div class='del'>-	andc	r0,RD(t),RB(t);		\</div><div class='del'>-	rotlwi	RT(t),RA(t),5;			\</div><div class='del'>-	rotlwi	RB(t),RB(t),30;			\</div><div class='del'>-	or	r6,r6,r0;			\</div><div class='del'>-	add	r0,RE(t),r15;			\</div><div class='del'>-	xor	r5,W((t)+4-3),W((t)+4-8);		\</div><div class='del'>-	add	RT(t),RT(t),r6;		\</div><div class='del'>-	xor	W((t)+4),W((t)+4-16),W((t)+4-14);	\</div><div class='del'>-	add	r0,r0,W(t);			\</div><div class='del'>-	xor	W((t)+4),W((t)+4),r5;			\</div><div class='del'>-	add	RT(t),RT(t),r0;		\</div><div class='del'>-	rotlwi	W((t)+4),W((t)+4),1</div><div class='del'>-</div><div class='del'>-#define STEPD1(t)				\</div><div class='del'>-	xor	r6,RB(t),RC(t);		\</div><div class='del'>-	rotlwi	RT(t),RA(t),5;			\</div><div class='del'>-	rotlwi	RB(t),RB(t),30;			\</div><div class='del'>-	xor	r6,r6,RD(t);			\</div><div class='del'>-	add	r0,RE(t),r15;			\</div><div class='del'>-	add	RT(t),RT(t),r6;		\</div><div class='del'>-	add	r0,r0,W(t);			\</div><div class='del'>-	add	RT(t),RT(t),r0</div><div class='del'>-</div><div class='del'>-#define STEPD1_UPDATE(t)				\</div><div class='del'>-	xor	r6,RB(t),RC(t);		\</div><div class='del'>-	rotlwi	RT(t),RA(t),5;			\</div><div class='del'>-	rotlwi	RB(t),RB(t),30;			\</div><div class='del'>-	xor	r6,r6,RD(t);			\</div><div class='del'>-	add	r0,RE(t),r15;			\</div><div class='del'>-	xor	r5,W((t)+4-3),W((t)+4-8);		\</div><div class='del'>-	add	RT(t),RT(t),r6;		\</div><div class='del'>-	xor	W((t)+4),W((t)+4-16),W((t)+4-14);	\</div><div class='del'>-	add	r0,r0,W(t);			\</div><div class='del'>-	xor	W((t)+4),W((t)+4),r5;			\</div><div class='del'>-	add	RT(t),RT(t),r0;		\</div><div class='del'>-	rotlwi	W((t)+4),W((t)+4),1</div><div class='del'>-</div><div class='del'>-#define STEPD2_UPDATE(t)			\</div><div class='del'>-	and	r6,RB(t),RC(t);		\</div><div class='del'>-	and	r0,RB(t),RD(t);		\</div><div class='del'>-	rotlwi	RT(t),RA(t),5;			\</div><div class='del'>-	or	r6,r6,r0;			\</div><div class='del'>-	rotlwi	RB(t),RB(t),30;			\</div><div class='del'>-	and	r0,RC(t),RD(t);		\</div><div class='del'>-	xor	r5,W((t)+4-3),W((t)+4-8);	\</div><div class='del'>-	or	r6,r6,r0;			\</div><div class='del'>-	xor	W((t)+4),W((t)+4-16),W((t)+4-14);	\</div><div class='del'>-	add	r0,RE(t),r15;			\</div><div class='del'>-	add	RT(t),RT(t),r6;		\</div><div class='del'>-	add	r0,r0,W(t);			\</div><div class='del'>-	xor	W((t)+4),W((t)+4),r5;		\</div><div class='del'>-	add	RT(t),RT(t),r0;		\</div><div class='del'>-	rotlwi	W((t)+4),W((t)+4),1</div><div class='del'>-</div><div class='del'>-#define STEP0LD4(t)				\</div><div class='del'>-	STEPD0_LOAD(t);				\</div><div class='del'>-	STEPD0_LOAD((t)+1);			\</div><div class='del'>-	STEPD0_LOAD((t)+2);			\</div><div class='del'>-	STEPD0_LOAD((t)+3)</div><div class='del'>-</div><div class='del'>-#define STEPUP4(t, fn)				\</div><div class='del'>-	STEP##fn##_UPDATE(t);			\</div><div class='del'>-	STEP##fn##_UPDATE((t)+1);		\</div><div class='del'>-	STEP##fn##_UPDATE((t)+2);		\</div><div class='del'>-	STEP##fn##_UPDATE((t)+3)</div><div class='del'>-</div><div class='del'>-#define STEPUP20(t, fn)				\</div><div class='del'>-	STEPUP4(t, fn);				\</div><div class='del'>-	STEPUP4((t)+4, fn);			\</div><div class='del'>-	STEPUP4((t)+8, fn);			\</div><div class='del'>-	STEPUP4((t)+12, fn);			\</div><div class='del'>-	STEPUP4((t)+16, fn)</div><div class='del'>-</div><div class='del'>-_GLOBAL(powerpc_sha_transform)</div><div class='del'>-	PPC_STLU r1,-INT_FRAME_SIZE(r1)</div><div class='del'>-	SAVE_GPRS(14, 31, r1)</div><div class='del'>-</div><div class='del'>-	/* Load up A - E */</div><div class='del'>-	lwz	RA(0),0(r3)	/* A */</div><div class='del'>-	lwz	RB(0),4(r3)	/* B */</div><div class='del'>-	lwz	RC(0),8(r3)	/* C */</div><div class='del'>-	lwz	RD(0),12(r3)	/* D */</div><div class='del'>-	lwz	RE(0),16(r3)	/* E */</div><div class='del'>-</div><div class='del'>-	LOADW(0)</div><div class='del'>-	LOADW(1)</div><div class='del'>-	LOADW(2)</div><div class='del'>-	LOADW(3)</div><div class='del'>-</div><div class='del'>-	lis	r15,0x5a82	/* K0-19 */</div><div class='del'>-	ori	r15,r15,0x7999</div><div class='del'>-	STEP0LD4(0)</div><div class='del'>-	STEP0LD4(4)</div><div class='del'>-	STEP0LD4(8)</div><div class='del'>-	STEPUP4(12, D0)</div><div class='del'>-	STEPUP4(16, D0)</div><div class='del'>-</div><div class='del'>-	lis	r15,0x6ed9	/* K20-39 */</div><div class='del'>-	ori	r15,r15,0xeba1</div><div class='del'>-	STEPUP20(20, D1)</div><div class='del'>-</div><div class='del'>-	lis	r15,0x8f1b	/* K40-59 */</div><div class='del'>-	ori	r15,r15,0xbcdc</div><div class='del'>-	STEPUP20(40, D2)</div><div class='del'>-</div><div class='del'>-	lis	r15,0xca62	/* K60-79 */</div><div class='del'>-	ori	r15,r15,0xc1d6</div><div class='del'>-	STEPUP4(60, D1)</div><div class='del'>-	STEPUP4(64, D1)</div><div class='del'>-	STEPUP4(68, D1)</div><div class='del'>-	STEPUP4(72, D1)</div><div class='del'>-	lwz	r20,16(r3)</div><div class='del'>-	STEPD1(76)</div><div class='del'>-	lwz	r19,12(r3)</div><div class='del'>-	STEPD1(77)</div><div class='del'>-	lwz	r18,8(r3)</div><div class='del'>-	STEPD1(78)</div><div class='del'>-	lwz	r17,4(r3)</div><div class='del'>-	STEPD1(79)</div><div class='del'>-</div><div class='del'>-	lwz	r16,0(r3)</div><div class='del'>-	add	r20,RE(80),r20</div><div class='del'>-	add	RD(0),RD(80),r19</div><div class='del'>-	add	RC(0),RC(80),r18</div><div class='del'>-	add	RB(0),RB(80),r17</div><div class='del'>-	add	RA(0),RA(80),r16</div><div class='del'>-	mr	RE(0),r20</div><div class='del'>-	stw	RA(0),0(r3)</div><div class='del'>-	stw	RB(0),4(r3)</div><div class='del'>-	stw	RC(0),8(r3)</div><div class='del'>-	stw	RD(0),12(r3)</div><div class='del'>-	stw	RE(0),16(r3)</div><div class='del'>-</div><div class='del'>-	REST_GPRS(14, 31, r1)</div><div class='del'>-	addi	r1,r1,INT_FRAME_SIZE</div><div class='del'>-	blr</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1-spe-asm.S b/arch/powerpc/crypto/sha1-spe-asm.S<br/>deleted file mode 100644<br/>index 0f447523be5e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha1-spe-asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-spe-asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,294 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Fast SHA-1 implementation for SPE instruction set (PPC)</div><div class='del'>- *</div><div class='del'>- * This code makes use of the SPE SIMD instruction set as defined in</div><div class='del'>- * http://cache.freescale.com/files/32bit/doc/ref_manual/SPEPIM.pdf</div><div class='del'>- * Implementation is based on optimization guide notes from</div><div class='del'>- * http://cache.freescale.com/files/32bit/doc/app_note/AN2665.pdf</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-</div><div class='del'>-#define rHP	r3	/* pointer to hash value			*/</div><div class='del'>-#define rWP	r4	/* pointer to input				*/</div><div class='del'>-#define rKP	r5	/* pointer to constants				*/</div><div class='del'>-</div><div class='del'>-#define rW0	r14	/* 64 bit round words				*/</div><div class='del'>-#define rW1	r15</div><div class='del'>-#define rW2	r16</div><div class='del'>-#define rW3	r17</div><div class='del'>-#define rW4	r18</div><div class='del'>-#define rW5	r19</div><div class='del'>-#define rW6	r20</div><div class='del'>-#define rW7	r21</div><div class='del'>-</div><div class='del'>-#define rH0	r6	/* 32 bit hash values 				*/</div><div class='del'>-#define rH1	r7</div><div class='del'>-#define rH2	r8</div><div class='del'>-#define rH3	r9</div><div class='del'>-#define rH4	r10</div><div class='del'>-</div><div class='del'>-#define rT0	r22	/* 64 bit temporary				*/</div><div class='del'>-#define rT1	r0	/* 32 bit temporaries				*/</div><div class='del'>-#define rT2	r11</div><div class='del'>-#define rT3	r12</div><div class='del'>-</div><div class='del'>-#define rK	r23	/* 64 bit constant in volatile register		*/</div><div class='del'>-</div><div class='del'>-#define LOAD_K01</div><div class='del'>-</div><div class='del'>-#define LOAD_K11 \</div><div class='del'>-	evlwwsplat	rK,0(rKP);</div><div class='del'>-</div><div class='del'>-#define LOAD_K21 \</div><div class='del'>-	evlwwsplat	rK,4(rKP);</div><div class='del'>-</div><div class='del'>-#define LOAD_K31 \</div><div class='del'>-	evlwwsplat	rK,8(rKP);</div><div class='del'>-</div><div class='del'>-#define LOAD_K41 \</div><div class='del'>-	evlwwsplat	rK,12(rKP);</div><div class='del'>-</div><div class='del'>-#define INITIALIZE \</div><div class='del'>-	stwu		r1,-128(r1);	/* create stack frame		*/ \</div><div class='del'>-	evstdw		r14,8(r1);	/* We must save non volatile	*/ \</div><div class='del'>-	evstdw		r15,16(r1);	/* registers. Take the chance	*/ \</div><div class='del'>-	evstdw		r16,24(r1);	/* and save the SPE part too	*/ \</div><div class='del'>-	evstdw		r17,32(r1);					   \</div><div class='del'>-	evstdw		r18,40(r1);					   \</div><div class='del'>-	evstdw		r19,48(r1);					   \</div><div class='del'>-	evstdw		r20,56(r1);					   \</div><div class='del'>-	evstdw		r21,64(r1);					   \</div><div class='del'>-	evstdw		r22,72(r1);					   \</div><div class='del'>-	evstdw		r23,80(r1);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define FINALIZE \</div><div class='del'>-	evldw		r14,8(r1);	/* restore SPE registers	*/ \</div><div class='del'>-	evldw		r15,16(r1);					   \</div><div class='del'>-	evldw		r16,24(r1);					   \</div><div class='del'>-	evldw		r17,32(r1);					   \</div><div class='del'>-	evldw		r18,40(r1);					   \</div><div class='del'>-	evldw		r19,48(r1);					   \</div><div class='del'>-	evldw		r20,56(r1);					   \</div><div class='del'>-	evldw		r21,64(r1);					   \</div><div class='del'>-	evldw		r22,72(r1);					   \</div><div class='del'>-	evldw		r23,80(r1);					   \</div><div class='del'>-	xor		r0,r0,r0;					   \</div><div class='del'>-	stw		r0,8(r1);	/* Delete sensitive data	*/ \</div><div class='del'>-	stw		r0,16(r1);	/* that we might have pushed	*/ \</div><div class='del'>-	stw		r0,24(r1);	/* from other context that runs	*/ \</div><div class='del'>-	stw		r0,32(r1);	/* the same code. Assume that	*/ \</div><div class='del'>-	stw		r0,40(r1);	/* the lower part of the GPRs	*/ \</div><div class='del'>-	stw		r0,48(r1);	/* were already overwritten on	*/ \</div><div class='del'>-	stw		r0,56(r1);	/* the way down to here		*/ \</div><div class='del'>-	stw		r0,64(r1);					   \</div><div class='del'>-	stw		r0,72(r1);					   \</div><div class='del'>-	stw		r0,80(r1);					   \</div><div class='del'>-	addi		r1,r1,128;	/* cleanup stack frame		*/</div><div class='del'>-</div><div class='del'>-#ifdef __BIG_ENDIAN__</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwz		reg,off(rWP);	/* load data			*/</div><div class='del'>-#define NEXT_BLOCK \</div><div class='del'>-	addi		rWP,rWP,64;	/* increment per block		*/</div><div class='del'>-#else</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwbrx		reg,0,rWP;	/* load data			*/ \</div><div class='del'>-	addi		rWP,rWP,4;	/* increment per word		*/</div><div class='del'>-#define NEXT_BLOCK			/* nothing to do		*/</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define	R_00_15(a, b, c, d, e, w0, w1, k, off) \</div><div class='del'>-	LOAD_DATA(w0, off)		/* 1: W				*/ \</div><div class='del'>-	and		rT2,b,c;	/* 1: F' = B and C 		*/ \</div><div class='del'>-	LOAD_K##k##1							   \</div><div class='del'>-	andc		rT1,d,b;	/* 1: F" = ~B and D 		*/ \</div><div class='del'>-	rotrwi		rT0,a,27;	/* 1: A' = A rotl 5		*/ \</div><div class='del'>-	or		rT2,rT2,rT1;	/* 1: F = F' or F"		*/ \</div><div class='del'>-	add		e,e,rT0;	/* 1: E = E + A'		*/ \</div><div class='del'>-	rotrwi		b,b,2;		/* 1: B = B rotl 30		*/ \</div><div class='del'>-	add		e,e,w0;		/* 1: E = E + W			*/ \</div><div class='del'>-	LOAD_DATA(w1, off+4)		/* 2: W				*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + F			*/ \</div><div class='del'>-	and		rT1,a,b;	/* 2: F' = B and C 		*/ \</div><div class='del'>-	add		e,e,rK;		/* 1: E = E + K			*/ \</div><div class='del'>-	andc		rT2,c,a;	/* 2: F" = ~B and D 		*/ \</div><div class='del'>-	add		d,d,rK;		/* 2: E = E + K			*/ \</div><div class='del'>-	or		rT2,rT2,rT1;	/* 2: F = F' or F"		*/ \</div><div class='del'>-	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \</div><div class='del'>-	add		d,d,w1;		/* 2: E = E + W			*/ \</div><div class='del'>-	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \</div><div class='del'>-	add		d,d,rT0;	/* 2: E = E + A'		*/ \</div><div class='del'>-	evmergelo	w1,w1,w0;	/*    mix W[0]/W[1]		*/ \</div><div class='del'>-	add		d,d,rT2		/* 2: E = E + F			*/</div><div class='del'>-</div><div class='del'>-#define R_16_19(a, b, c, d, e, w0, w1, w4, w6, w7, k) \</div><div class='del'>-	and		rT2,b,c;	/* 1: F' = B and C 		*/ \</div><div class='del'>-	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \</div><div class='del'>-	andc		rT1,d,b;	/* 1: F" = ~B and D 		*/ \</div><div class='del'>-	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \</div><div class='del'>-	or		rT1,rT1,rT2;	/* 1: F = F' or F"		*/ \</div><div class='del'>-	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \</div><div class='del'>-	add		e,e,rT1;	/* 1: E = E + F			*/ \</div><div class='del'>-	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \</div><div class='del'>-	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \</div><div class='del'>-	evrlwi		w0,w0,1;	/*    W = W rotl 1		*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + A'		*/ \</div><div class='del'>-	evaddw		rT0,w0,rK;	/*    WK = W + K		*/ \</div><div class='del'>-	rotrwi		b,b,2;		/* 1: B = B rotl 30		*/ \</div><div class='del'>-	LOAD_K##k##1							   \</div><div class='del'>-	evmergehi	rT1,rT1,rT0;	/*    WK1/WK2			*/ \</div><div class='del'>-	add		e,e,rT0;	/* 1: E = E + WK		*/ \</div><div class='del'>-	add		d,d,rT1;	/* 2: E = E + WK		*/ \</div><div class='del'>-	and		rT2,a,b;	/* 2: F' = B and C 		*/ \</div><div class='del'>-	andc		rT1,c,a;	/* 2: F" = ~B and D 		*/ \</div><div class='del'>-	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \</div><div class='del'>-	or		rT1,rT1,rT2;	/* 2: F = F' or F"		*/ \</div><div class='del'>-	add		d,d,rT0;	/* 2: E = E + A'		*/ \</div><div class='del'>-	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \</div><div class='del'>-	add		d,d,rT1		/* 2: E = E + F			*/</div><div class='del'>-</div><div class='del'>-#define R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k) \</div><div class='del'>-	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \</div><div class='del'>-	xor		rT2,b,c;	/* 1: F' = B xor C		*/ \</div><div class='del'>-	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \</div><div class='del'>-	xor		rT2,rT2,d;	/* 1: F = F' xor D		*/ \</div><div class='del'>-	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + F			*/ \</div><div class='del'>-	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \</div><div class='del'>-	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \</div><div class='del'>-	evrlwi		w0,w0,1;	/*    W = W rotl 1		*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + A'		*/ \</div><div class='del'>-	evaddw		rT0,w0,rK;	/*    WK = W + K		*/ \</div><div class='del'>-	rotrwi		b,b,2;		/* 1: B = B rotl 30		*/ \</div><div class='del'>-	LOAD_K##k##1							   \</div><div class='del'>-	evmergehi	rT1,rT1,rT0;	/*    WK1/WK2			*/ \</div><div class='del'>-	add		e,e,rT0;	/* 1: E = E + WK		*/ \</div><div class='del'>-	xor		rT2,a,b;	/* 2: F' = B xor C		*/ \</div><div class='del'>-	add		d,d,rT1;	/* 2: E = E + WK		*/ \</div><div class='del'>-	xor		rT2,rT2,c;	/* 2: F = F' xor D		*/ \</div><div class='del'>-	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \</div><div class='del'>-	add		d,d,rT2;	/* 2: E = E + F			*/ \</div><div class='del'>-	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \</div><div class='del'>-	add		d,d,rT0		/* 2: E = E + A'		*/</div><div class='del'>-</div><div class='del'>-#define R_40_59(a, b, c, d, e, w0, w1, w4, w6, w7, k) \</div><div class='del'>-	and		rT2,b,c;	/* 1: F' = B and C		*/ \</div><div class='del'>-	evmergelohi	rT0,w7,w6;	/*    W[-3]			*/ \</div><div class='del'>-	or		rT1,b,c;	/* 1: F" = B or C		*/ \</div><div class='del'>-	evxor		w0,w0,rT0;	/*    W = W[-16] xor W[-3]	*/ \</div><div class='del'>-	and		rT1,d,rT1;	/* 1: F" = F" and D		*/ \</div><div class='del'>-	evxor		w0,w0,w4;	/*    W = W xor W[-8]		*/ \</div><div class='del'>-	or		rT2,rT2,rT1;	/* 1: F = F' or F"		*/ \</div><div class='del'>-	evxor		w0,w0,w1;	/*    W = W xor W[-14]		*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + F			*/ \</div><div class='del'>-	evrlwi		w0,w0,1;	/*    W = W rotl 1		*/ \</div><div class='del'>-	rotrwi		rT2,a,27;	/* 1: A' = A rotl 5		*/ \</div><div class='del'>-	evaddw		rT0,w0,rK;	/*    WK = W + K		*/ \</div><div class='del'>-	add		e,e,rT2;	/* 1: E = E + A'		*/ \</div><div class='del'>-	LOAD_K##k##1							   \</div><div class='del'>-	evmergehi	rT1,rT1,rT0;	/*    WK1/WK2			*/ \</div><div class='del'>-	rotrwi		b,b,2;		/* 1: B = B rotl 30		*/ \</div><div class='del'>-	add		e,e,rT0;	/* 1: E = E + WK		*/ \</div><div class='del'>-	and		rT2,a,b;	/* 2: F' = B and C		*/ \</div><div class='del'>-	or		rT0,a,b;	/* 2: F" = B or C		*/ \</div><div class='del'>-	add		d,d,rT1;	/* 2: E = E + WK		*/ \</div><div class='del'>-	and		rT0,c,rT0;	/* 2: F" = F" and D		*/ \</div><div class='del'>-	rotrwi		a,a,2;		/* 2: B = B rotl 30		*/ \</div><div class='del'>-	or		rT2,rT2,rT0;	/* 2: F = F' or F"		*/ \</div><div class='del'>-	rotrwi		rT0,e,27;	/* 2: A' = A rotl 5		*/ \</div><div class='del'>-	add		d,d,rT2;	/* 2: E = E + F			*/ \</div><div class='del'>-	add		d,d,rT0		/* 2: E = E + A'		*/</div><div class='del'>-</div><div class='del'>-#define R_60_79(a, b, c, d, e, w0, w1, w4, w6, w7, k) \</div><div class='del'>-	R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k)</div><div class='del'>-</div><div class='del'>-_GLOBAL(ppc_spe_sha1_transform)</div><div class='del'>-	INITIALIZE</div><div class='del'>-</div><div class='del'>-	lwz		rH0,0(rHP)</div><div class='del'>-	lwz		rH1,4(rHP)</div><div class='del'>-	mtctr		r5</div><div class='del'>-	lwz		rH2,8(rHP)</div><div class='del'>-	lis		rKP,PPC_SPE_SHA1_K@h</div><div class='del'>-	lwz		rH3,12(rHP)</div><div class='del'>-	ori		rKP,rKP,PPC_SPE_SHA1_K@l</div><div class='del'>-	lwz		rH4,16(rHP)</div><div class='del'>-</div><div class='del'>-ppc_spe_sha1_main:</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rH4, rW1, rW0, 1, 0)</div><div class='del'>-	R_00_15(rH3, rH4, rH0, rH1, rH2, rW2, rW1, 0, 8)</div><div class='del'>-	R_00_15(rH1, rH2, rH3, rH4, rH0, rW3, rW2, 0, 16)</div><div class='del'>-	R_00_15(rH4, rH0, rH1, rH2, rH3, rW4, rW3, 0, 24)</div><div class='del'>-	R_00_15(rH2, rH3, rH4, rH0, rH1, rW5, rW4, 0, 32)</div><div class='del'>-	R_00_15(rH0, rH1, rH2, rH3, rH4, rW6, rW5, 0, 40)</div><div class='del'>-	R_00_15(rH3, rH4, rH0, rH1, rH2, rT3, rW6, 0, 48)</div><div class='del'>-	R_00_15(rH1, rH2, rH3, rH4, rH0, rT3, rW7, 0, 56)</div><div class='del'>-</div><div class='del'>-	R_16_19(rH4, rH0, rH1, rH2, rH3, rW0, rW1, rW4, rW6, rW7, 0)</div><div class='del'>-	R_16_19(rH2, rH3, rH4, rH0, rH1, rW1, rW2, rW5, rW7, rW0, 2)</div><div class='del'>-</div><div class='del'>-	R_20_39(rH0, rH1, rH2, rH3, rH4, rW2, rW3, rW6, rW0, rW1, 0)</div><div class='del'>-	R_20_39(rH3, rH4, rH0, rH1, rH2, rW3, rW4, rW7, rW1, rW2, 0)</div><div class='del'>-	R_20_39(rH1, rH2, rH3, rH4, rH0, rW4, rW5, rW0, rW2, rW3, 0)</div><div class='del'>-	R_20_39(rH4, rH0, rH1, rH2, rH3, rW5, rW6, rW1, rW3, rW4, 0)</div><div class='del'>-	R_20_39(rH2, rH3, rH4, rH0, rH1, rW6, rW7, rW2, rW4, rW5, 0)</div><div class='del'>-	R_20_39(rH0, rH1, rH2, rH3, rH4, rW7, rW0, rW3, rW5, rW6, 0)</div><div class='del'>-	R_20_39(rH3, rH4, rH0, rH1, rH2, rW0, rW1, rW4, rW6, rW7, 0)</div><div class='del'>-	R_20_39(rH1, rH2, rH3, rH4, rH0, rW1, rW2, rW5, rW7, rW0, 0)</div><div class='del'>-	R_20_39(rH4, rH0, rH1, rH2, rH3, rW2, rW3, rW6, rW0, rW1, 0)</div><div class='del'>-	R_20_39(rH2, rH3, rH4, rH0, rH1, rW3, rW4, rW7, rW1, rW2, 3)</div><div class='del'>-</div><div class='del'>-	R_40_59(rH0, rH1, rH2, rH3, rH4, rW4, rW5, rW0, rW2, rW3, 0)</div><div class='del'>-	R_40_59(rH3, rH4, rH0, rH1, rH2, rW5, rW6, rW1, rW3, rW4, 0)</div><div class='del'>-	R_40_59(rH1, rH2, rH3, rH4, rH0, rW6, rW7, rW2, rW4, rW5, 0)</div><div class='del'>-	R_40_59(rH4, rH0, rH1, rH2, rH3, rW7, rW0, rW3, rW5, rW6, 0)</div><div class='del'>-	R_40_59(rH2, rH3, rH4, rH0, rH1, rW0, rW1, rW4, rW6, rW7, 0)</div><div class='del'>-	R_40_59(rH0, rH1, rH2, rH3, rH4, rW1, rW2, rW5, rW7, rW0, 0)</div><div class='del'>-	R_40_59(rH3, rH4, rH0, rH1, rH2, rW2, rW3, rW6, rW0, rW1, 0)</div><div class='del'>-	R_40_59(rH1, rH2, rH3, rH4, rH0, rW3, rW4, rW7, rW1, rW2, 0)</div><div class='del'>-	R_40_59(rH4, rH0, rH1, rH2, rH3, rW4, rW5, rW0, rW2, rW3, 0)</div><div class='del'>-	R_40_59(rH2, rH3, rH4, rH0, rH1, rW5, rW6, rW1, rW3, rW4, 4)</div><div class='del'>-</div><div class='del'>-	R_60_79(rH0, rH1, rH2, rH3, rH4, rW6, rW7, rW2, rW4, rW5, 0)</div><div class='del'>-	R_60_79(rH3, rH4, rH0, rH1, rH2, rW7, rW0, rW3, rW5, rW6, 0)</div><div class='del'>-	R_60_79(rH1, rH2, rH3, rH4, rH0, rW0, rW1, rW4, rW6, rW7, 0)</div><div class='del'>-	R_60_79(rH4, rH0, rH1, rH2, rH3, rW1, rW2, rW5, rW7, rW0, 0)</div><div class='del'>-	R_60_79(rH2, rH3, rH4, rH0, rH1, rW2, rW3, rW6, rW0, rW1, 0)</div><div class='del'>-	R_60_79(rH0, rH1, rH2, rH3, rH4, rW3, rW4, rW7, rW1, rW2, 0)</div><div class='del'>-	R_60_79(rH3, rH4, rH0, rH1, rH2, rW4, rW5, rW0, rW2, rW3, 0)</div><div class='del'>-	lwz		rT3,0(rHP)</div><div class='del'>-	R_60_79(rH1, rH2, rH3, rH4, rH0, rW5, rW6, rW1, rW3, rW4, 0)</div><div class='del'>-	lwz		rW1,4(rHP)</div><div class='del'>-	R_60_79(rH4, rH0, rH1, rH2, rH3, rW6, rW7, rW2, rW4, rW5, 0)</div><div class='del'>-	lwz		rW2,8(rHP)</div><div class='del'>-	R_60_79(rH2, rH3, rH4, rH0, rH1, rW7, rW0, rW3, rW5, rW6, 0)</div><div class='del'>-	lwz		rW3,12(rHP)</div><div class='del'>-	NEXT_BLOCK</div><div class='del'>-	lwz		rW4,16(rHP)</div><div class='del'>-</div><div class='del'>-	add		rH0,rH0,rT3</div><div class='del'>-	stw		rH0,0(rHP)</div><div class='del'>-	add		rH1,rH1,rW1</div><div class='del'>-	stw		rH1,4(rHP)</div><div class='del'>-	add		rH2,rH2,rW2</div><div class='del'>-	stw		rH2,8(rHP)</div><div class='del'>-	add		rH3,rH3,rW3</div><div class='del'>-	stw		rH3,12(rHP)</div><div class='del'>-	add		rH4,rH4,rW4</div><div class='del'>-	stw		rH4,16(rHP)</div><div class='del'>-</div><div class='del'>-	bdnz		ppc_spe_sha1_main</div><div class='del'>-</div><div class='del'>-	FINALIZE</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-.data</div><div class='del'>-.align 4</div><div class='del'>-PPC_SPE_SHA1_K:</div><div class='del'>-	.long 0x5A827999,0x6ED9EBA1,0x8F1BBCDC,0xCA62C1D6</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1-spe-glue.c b/arch/powerpc/crypto/sha1-spe-glue.c<br/>deleted file mode 100644<br/>index 9170892a8557..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha1-spe-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1-spe-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,191 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for SHA-1 implementation for SPE instructions (PPC)</div><div class='del'>- *</div><div class='del'>- * Based on generic implementation.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MAX_BYTES defines the number of bytes that are allowed to be processed</div><div class='del'>- * between preempt_disable() and preempt_enable(). SHA1 takes ~1000</div><div class='del'>- * operations per 64 bytes. e500 cores can issue two arithmetic instructions</div><div class='del'>- * per clock cycle using one 32/64 bit unit (SU1) and one 32 bit unit (SU2).</div><div class='del'>- * Thus 2KB of input data will need an estimated maximum of 18,000 cycles.</div><div class='del'>- * Headroom for cache misses included. Even with the low end model clocked</div><div class='del'>- * at 667 MHz this equals to a critical time window of less than 27us.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-#define MAX_BYTES 2048</div><div class='del'>-</div><div class='del'>-extern void ppc_spe_sha1_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='del'>-</div><div class='del'>-static void spe_begin(void)</div><div class='del'>-{</div><div class='del'>-	/* We just start SPE operations and will save SPE registers later. */</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_spe();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spe_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_spe();</div><div class='del'>-	/* reenable preemption */</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ppc_sha1_clear_context(struct sha1_state *sctx)</div><div class='del'>-{</div><div class='del'>-	int count = sizeof(struct sha1_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct sha1_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	const unsigned int avail = 64 - offset;</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	const u8 *src = data;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy((char *)sctx-&gt;buffer + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;buffer + offset, src, avail);</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, (const u8 *)sctx-&gt;buffer, 1);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt; 63) {</div><div class='del'>-		bytes = (len &gt; MAX_BYTES) ? MAX_BYTES : len;</div><div class='del'>-		bytes = bytes &amp; ~0x3f;</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, src, bytes &gt;&gt; 6);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;buffer, src, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)sctx-&gt;buffer + offset;</div><div class='del'>-	int padlen;</div><div class='del'>-	__be64 *pbits = (__be64 *)(((char *)&amp;sctx-&gt;buffer) + 56);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	padlen = 55 - offset;</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	spe_begin();</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, sctx-&gt;buffer, 1);</div><div class='del'>-		p = (char *)sctx-&gt;buffer;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='del'>-	*pbits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-	ppc_spe_sha1_transform(sctx-&gt;state, sctx-&gt;buffer, 1);</div><div class='del'>-</div><div class='del'>-	spe_end();</div><div class='del'>-</div><div class='del'>-	dst[0] = cpu_to_be32(sctx-&gt;state[0]);</div><div class='del'>-	dst[1] = cpu_to_be32(sctx-&gt;state[1]);</div><div class='del'>-	dst[2] = cpu_to_be32(sctx-&gt;state[2]);</div><div class='del'>-	dst[3] = cpu_to_be32(sctx-&gt;state[3]);</div><div class='del'>-	dst[4] = cpu_to_be32(sctx-&gt;state[4]);</div><div class='del'>-</div><div class='del'>-	ppc_sha1_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha1_base_init,</div><div class='del'>-	.update		=	ppc_spe_sha1_update,</div><div class='del'>-	.final		=	ppc_spe_sha1_final,</div><div class='del'>-	.export		=	ppc_spe_sha1_export,</div><div class='del'>-	.import		=	ppc_spe_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha1",</div><div class='del'>-		.cra_driver_name=	"sha1-ppc-spe",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ppc_spe_sha1_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ppc_spe_sha1_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ppc_spe_sha1_mod_init);</div><div class='del'>-module_exit(ppc_spe_sha1_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, SPE optimized");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1-ppc-spe");</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c<br/>deleted file mode 100644<br/>index f283bbd3f121..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha1.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha1.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,139 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * powerpc implementation of the SHA1 Secure Hash Algorithm.</div><div class='del'>- *</div><div class='del'>- * Derived from cryptoapi implementation, adapted for in-place</div><div class='del'>- * scatterlist interface.</div><div class='del'>- *</div><div class='del'>- * Derived from "crypto/sha1.c"</div><div class='del'>- * Copyright (c) Alan Smithee.</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='del'>-void powerpc_sha_transform(u32 *state, const u8 *src);</div><div class='del'>-</div><div class='del'>-static int powerpc_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			       unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt; 63) {</div><div class='del'>-</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buffer + partial, data, done + 64);</div><div class='del'>-			src = sctx-&gt;buffer;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			powerpc_sha_transform(sctx-&gt;state, src);</div><div class='del'>-			done += 64;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + 63 &lt; len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buffer + partial, src, len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int powerpc_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	u32 i, index, padlen;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-	powerpc_sha1_update(desc, padding, padlen);</div><div class='del'>-</div><div class='del'>-	/* Append length */</div><div class='del'>-	powerpc_sha1_update(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof *sctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int powerpc_sha1_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int powerpc_sha1_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha1_base_init,</div><div class='del'>-	.update		=	powerpc_sha1_update,</div><div class='del'>-	.final		=	powerpc_sha1_final,</div><div class='del'>-	.export		=	powerpc_sha1_export,</div><div class='del'>-	.import		=	powerpc_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha1",</div><div class='del'>-		.cra_driver_name=	"sha1-powerpc",</div><div class='del'>-		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sha1_powerpc_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha1_powerpc_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha1_powerpc_mod_init);</div><div class='del'>-module_exit(sha1_powerpc_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha1-powerpc");</div><div class='head'>diff --git a/arch/powerpc/crypto/sha256-spe-asm.S b/arch/powerpc/crypto/sha256-spe-asm.S<br/>deleted file mode 100644<br/>index cd99d71dae34..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha256-spe-asm.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha256-spe-asm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,318 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Fast SHA-256 implementation for SPE instruction set (PPC)</div><div class='del'>- *</div><div class='del'>- * This code makes use of the SPE SIMD instruction set as defined in</div><div class='del'>- * http://cache.freescale.com/files/32bit/doc/ref_manual/SPEPIM.pdf</div><div class='del'>- * Implementation is based on optimization guide notes from</div><div class='del'>- * http://cache.freescale.com/files/32bit/doc/app_note/AN2665.pdf</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc_asm.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-</div><div class='del'>-#define rHP	r3	/* pointer to hash values in memory		*/</div><div class='del'>-#define rKP	r24	/* pointer to round constants			*/</div><div class='del'>-#define rWP	r4	/* pointer to input data			*/</div><div class='del'>-</div><div class='del'>-#define rH0	r5	/* 8 32 bit hash values in 8 registers		*/</div><div class='del'>-#define rH1	r6</div><div class='del'>-#define rH2	r7</div><div class='del'>-#define rH3	r8</div><div class='del'>-#define rH4	r9</div><div class='del'>-#define rH5	r10</div><div class='del'>-#define rH6	r11</div><div class='del'>-#define rH7	r12</div><div class='del'>-</div><div class='del'>-#define rW0	r14	/* 64 bit registers. 16 words in 8 registers	*/</div><div class='del'>-#define rW1	r15</div><div class='del'>-#define rW2	r16</div><div class='del'>-#define rW3	r17</div><div class='del'>-#define rW4	r18</div><div class='del'>-#define rW5	r19</div><div class='del'>-#define rW6	r20</div><div class='del'>-#define rW7	r21</div><div class='del'>-</div><div class='del'>-#define rT0	r22	/* 64 bit temporaries 				*/</div><div class='del'>-#define rT1	r23</div><div class='del'>-#define rT2	r0	/* 32 bit temporaries				*/</div><div class='del'>-#define rT3	r25</div><div class='del'>-</div><div class='del'>-#define CMP_KN_LOOP</div><div class='del'>-#define CMP_KC_LOOP \</div><div class='del'>-	cmpwi		rT1,0;</div><div class='del'>-</div><div class='del'>-#define INITIALIZE \</div><div class='del'>-	stwu		r1,-128(r1);	/* create stack frame		*/ \</div><div class='del'>-	evstdw		r14,8(r1);	/* We must save non volatile	*/ \</div><div class='del'>-	evstdw		r15,16(r1);	/* registers. Take the chance	*/ \</div><div class='del'>-	evstdw		r16,24(r1);	/* and save the SPE part too	*/ \</div><div class='del'>-	evstdw		r17,32(r1);					   \</div><div class='del'>-	evstdw		r18,40(r1);					   \</div><div class='del'>-	evstdw		r19,48(r1);					   \</div><div class='del'>-	evstdw		r20,56(r1);					   \</div><div class='del'>-	evstdw		r21,64(r1);					   \</div><div class='del'>-	evstdw		r22,72(r1);					   \</div><div class='del'>-	evstdw		r23,80(r1);					   \</div><div class='del'>-	stw		r24,88(r1);	/* save normal registers	*/ \</div><div class='del'>-	stw		r25,92(r1);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define FINALIZE \</div><div class='del'>-	evldw		r14,8(r1);	/* restore SPE registers	*/ \</div><div class='del'>-	evldw		r15,16(r1);					   \</div><div class='del'>-	evldw		r16,24(r1);					   \</div><div class='del'>-	evldw		r17,32(r1);					   \</div><div class='del'>-	evldw		r18,40(r1);					   \</div><div class='del'>-	evldw		r19,48(r1);					   \</div><div class='del'>-	evldw		r20,56(r1);					   \</div><div class='del'>-	evldw		r21,64(r1);					   \</div><div class='del'>-	evldw		r22,72(r1);					   \</div><div class='del'>-	evldw		r23,80(r1);					   \</div><div class='del'>-	lwz		r24,88(r1);	/* restore normal registers	*/ \</div><div class='del'>-	lwz		r25,92(r1);					   \</div><div class='del'>-	xor		r0,r0,r0;					   \</div><div class='del'>-	stw		r0,8(r1);	/* Delete sensitive data	*/ \</div><div class='del'>-	stw		r0,16(r1);	/* that we might have pushed	*/ \</div><div class='del'>-	stw		r0,24(r1);	/* from other context that runs	*/ \</div><div class='del'>-	stw		r0,32(r1);	/* the same code. Assume that	*/ \</div><div class='del'>-	stw		r0,40(r1);	/* the lower part of the GPRs	*/ \</div><div class='del'>-	stw		r0,48(r1);	/* was already overwritten on	*/ \</div><div class='del'>-	stw		r0,56(r1);	/* the way down to here		*/ \</div><div class='del'>-	stw		r0,64(r1);					   \</div><div class='del'>-	stw		r0,72(r1);					   \</div><div class='del'>-	stw		r0,80(r1);					   \</div><div class='del'>-	addi		r1,r1,128;	/* cleanup stack frame		*/</div><div class='del'>-</div><div class='del'>-#ifdef __BIG_ENDIAN__</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwz		reg,off(rWP);	/* load data			*/</div><div class='del'>-#define NEXT_BLOCK \</div><div class='del'>-	addi		rWP,rWP,64;	/* increment per block		*/</div><div class='del'>-#else</div><div class='del'>-#define LOAD_DATA(reg, off) \</div><div class='del'>-	lwbrx		reg,0,rWP; 	/* load data			*/ \</div><div class='del'>-	addi		rWP,rWP,4;	/* increment per word		*/</div><div class='del'>-#define NEXT_BLOCK			/* nothing to do		*/</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define R_LOAD_W(a, b, c, d, e, f, g, h, w, off) \</div><div class='del'>-	LOAD_DATA(w, off)		/* 1: W				*/ \</div><div class='del'>-	rotrwi		rT0,e,6;	/* 1: S1 = e rotr 6		*/ \</div><div class='del'>-	rotrwi		rT1,e,11;	/* 1: S1' = e rotr 11		*/ \</div><div class='del'>-	rotrwi		rT2,e,25;	/* 1: S1" = e rotr 25		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 1: S1 = S1 xor S1'		*/ \</div><div class='del'>-	and		rT3,e,f;	/* 1: ch = e and f		*/ \</div><div class='del'>-	xor		rT0,rT0,rT2;	/* 1: S1 = S1 xor S1"		*/ \</div><div class='del'>-	andc		rT1,g,e;	/* 1: ch' = ~e and g		*/ \</div><div class='del'>-	lwz		rT2,off(rKP);	/* 1: K				*/ \</div><div class='del'>-	xor		rT3,rT3,rT1;	/* 1: ch = ch xor ch'		*/ \</div><div class='del'>-	add		h,h,rT0;	/* 1: temp1 = h + S1		*/ \</div><div class='del'>-	add		rT3,rT3,w;	/* 1: temp1' = ch + w		*/ \</div><div class='del'>-	rotrwi		rT0,a,2;	/* 1: S0 = a rotr 2		*/ \</div><div class='del'>-	add		h,h,rT3;	/* 1: temp1 = temp1 + temp1'	*/ \</div><div class='del'>-	rotrwi		rT1,a,13;	/* 1: S0' = a rotr 13		*/ \</div><div class='del'>-	add		h,h,rT2;	/* 1: temp1 = temp1 + K		*/ \</div><div class='del'>-	rotrwi		rT3,a,22;	/* 1: S0" = a rotr 22		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 1: S0 = S0 xor S0'		*/ \</div><div class='del'>-	add		d,d,h;		/* 1: d = d + temp1		*/ \</div><div class='del'>-	xor		rT3,rT0,rT3;	/* 1: S0 = S0 xor S0"		*/ \</div><div class='del'>-	evmergelo	w,w,w;		/*    shift W			*/ \</div><div class='del'>-	or		rT2,a,b;	/* 1: maj = a or b		*/ \</div><div class='del'>-	and		rT1,a,b;	/* 1: maj' = a and b		*/ \</div><div class='del'>-	and		rT2,rT2,c;	/* 1: maj = maj and c		*/ \</div><div class='del'>-	LOAD_DATA(w, off+4)		/* 2: W				*/ \</div><div class='del'>-	or		rT2,rT1,rT2;	/* 1: maj = maj or maj'		*/ \</div><div class='del'>-	rotrwi		rT0,d,6;	/* 2: S1 = e rotr 6		*/ \</div><div class='del'>-	add		rT3,rT3,rT2;	/* 1: temp2 = S0 + maj		*/ \</div><div class='del'>-	rotrwi		rT1,d,11;	/* 2: S1' = e rotr 11		*/ \</div><div class='del'>-	add		h,h,rT3;	/* 1: h = temp1 + temp2		*/ \</div><div class='del'>-	rotrwi		rT2,d,25;	/* 2: S1" = e rotr 25		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 2: S1 = S1 xor S1'		*/ \</div><div class='del'>-	and		rT3,d,e;	/* 2: ch = e and f		*/ \</div><div class='del'>-	xor		rT0,rT0,rT2;	/* 2: S1 = S1 xor S1"		*/ \</div><div class='del'>-	andc		rT1,f,d;	/* 2: ch' = ~e and g		*/ \</div><div class='del'>-	lwz		rT2,off+4(rKP);	/* 2: K				*/ \</div><div class='del'>-	xor		rT3,rT3,rT1;	/* 2: ch = ch xor ch'		*/ \</div><div class='del'>-	add		g,g,rT0;	/* 2: temp1 = h + S1		*/ \</div><div class='del'>-	add		rT3,rT3,w;	/* 2: temp1' = ch + w		*/ \</div><div class='del'>-	rotrwi		rT0,h,2;	/* 2: S0 = a rotr 2		*/ \</div><div class='del'>-	add		g,g,rT3;	/* 2: temp1 = temp1 + temp1'	*/ \</div><div class='del'>-	rotrwi		rT1,h,13;	/* 2: S0' = a rotr 13		*/ \</div><div class='del'>-	add		g,g,rT2;	/* 2: temp1 = temp1 + K		*/ \</div><div class='del'>-	rotrwi		rT3,h,22;	/* 2: S0" = a rotr 22		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 2: S0 = S0 xor S0'		*/ \</div><div class='del'>-	or		rT2,h,a;	/* 2: maj = a or b		*/ \</div><div class='del'>-	xor		rT3,rT0,rT3;	/* 2: S0 = S0 xor S0"		*/ \</div><div class='del'>-	and		rT1,h,a;	/* 2: maj' = a and b		*/ \</div><div class='del'>-	and		rT2,rT2,b;	/* 2: maj = maj and c		*/ \</div><div class='del'>-	add		c,c,g;		/* 2: d = d + temp1		*/ \</div><div class='del'>-	or		rT2,rT1,rT2;	/* 2: maj = maj or maj'		*/ \</div><div class='del'>-	add		rT3,rT3,rT2;	/* 2: temp2 = S0 + maj		*/ \</div><div class='del'>-	add		g,g,rT3		/* 2: h = temp1 + temp2		*/</div><div class='del'>-</div><div class='del'>-#define R_CALC_W(a, b, c, d, e, f, g, h, w0, w1, w4, w5, w7, k, off) \</div><div class='del'>-	rotrwi		rT2,e,6;	/* 1: S1 = e rotr 6		*/ \</div><div class='del'>-	evmergelohi	rT0,w0,w1;	/*    w[-15]			*/ \</div><div class='del'>-	rotrwi		rT3,e,11;	/* 1: S1' = e rotr 11		*/ \</div><div class='del'>-	evsrwiu		rT1,rT0,3;	/*    s0 = w[-15] &gt;&gt; 3		*/ \</div><div class='del'>-	xor		rT2,rT2,rT3;	/* 1: S1 = S1 xor S1'		*/ \</div><div class='del'>-	evrlwi		rT0,rT0,25;	/*    s0' = w[-15] rotr	7	*/ \</div><div class='del'>-	rotrwi		rT3,e,25;	/* 1: S1' = e rotr 25		*/ \</div><div class='del'>-	evxor		rT1,rT1,rT0;	/*    s0 = s0 xor s0'		*/ \</div><div class='del'>-	xor		rT2,rT2,rT3;	/* 1: S1 = S1 xor S1'		*/ \</div><div class='del'>-	evrlwi		rT0,rT0,21;	/*    s0' = w[-15] rotr 18	*/ \</div><div class='del'>-	add		h,h,rT2;	/* 1: temp1 = h + S1		*/ \</div><div class='del'>-	evxor		rT0,rT0,rT1;	/*    s0 = s0 xor s0'		*/ \</div><div class='del'>-	and		rT2,e,f;	/* 1: ch = e and f		*/ \</div><div class='del'>-	evaddw		w0,w0,rT0;	/*    w = w[-16] + s0		*/ \</div><div class='del'>-	andc		rT3,g,e;	/* 1: ch' = ~e and g		*/ \</div><div class='del'>-	evsrwiu		rT0,w7,10;	/*    s1 = w[-2] &gt;&gt; 10		*/ \</div><div class='del'>-	xor		rT2,rT2,rT3;	/* 1: ch = ch xor ch'		*/ \</div><div class='del'>-	evrlwi		rT1,w7,15;	/*    s1' = w[-2] rotr 17	*/ \</div><div class='del'>-	add		h,h,rT2;	/* 1: temp1 = temp1 + ch	*/ \</div><div class='del'>-	evxor		rT0,rT0,rT1;	/*    s1 = s1 xor s1'		*/ \</div><div class='del'>-	rotrwi		rT2,a,2;	/* 1: S0 = a rotr 2		*/ \</div><div class='del'>-	evrlwi		rT1,w7,13;	/*    s1' = w[-2] rotr 19	*/ \</div><div class='del'>-	rotrwi		rT3,a,13;	/* 1: S0' = a rotr 13		*/ \</div><div class='del'>-	evxor		rT0,rT0,rT1;	/*    s1 = s1 xor s1'		*/ \</div><div class='del'>-	xor		rT2,rT2,rT3;	/* 1: S0 = S0 xor S0'		*/ \</div><div class='del'>-	evldw		rT1,off(rKP);	/*    k				*/ \</div><div class='del'>-	rotrwi		rT3,a,22;	/* 1: S0' = a rotr 22		*/ \</div><div class='del'>-	evaddw		w0,w0,rT0;	/*    w = w + s1		*/ \</div><div class='del'>-	xor		rT2,rT2,rT3;	/* 1: S0 = S0 xor S0'		*/ \</div><div class='del'>-	evmergelohi	rT0,w4,w5;	/*    w[-7]			*/ \</div><div class='del'>-	and		rT3,a,b;	/* 1: maj = a and b		*/ \</div><div class='del'>-	evaddw		w0,w0,rT0;	/*    w = w + w[-7]		*/ \</div><div class='del'>-	CMP_K##k##_LOOP							   \</div><div class='del'>-	add		rT2,rT2,rT3;	/* 1: temp2 = S0 + maj		*/ \</div><div class='del'>-	evaddw		rT1,rT1,w0;	/*    wk = w + k		*/ \</div><div class='del'>-	xor		rT3,a,b;	/* 1: maj = a xor b		*/ \</div><div class='del'>-	evmergehi	rT0,rT1,rT1;	/*    wk1/wk2			*/ \</div><div class='del'>-	and		rT3,rT3,c;	/* 1: maj = maj and c		*/ \</div><div class='del'>-	add		h,h,rT0;	/* 1: temp1 = temp1 + wk	*/ \</div><div class='del'>-	add		rT2,rT2,rT3;	/* 1: temp2 = temp2 + maj	*/ \</div><div class='del'>-	add		g,g,rT1;	/* 2: temp1 = temp1 + wk	*/ \</div><div class='del'>-	add		d,d,h;		/* 1: d = d + temp1		*/ \</div><div class='del'>-	rotrwi		rT0,d,6;	/* 2: S1 = e rotr 6		*/ \</div><div class='del'>-	add		h,h,rT2;	/* 1: h = temp1 + temp2		*/ \</div><div class='del'>-	rotrwi		rT1,d,11;	/* 2: S1' = e rotr 11		*/ \</div><div class='del'>-	rotrwi		rT2,d,25;	/* 2: S" = e rotr 25		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 2: S1 = S1 xor S1'		*/ \</div><div class='del'>-	and		rT3,d,e;	/* 2: ch = e and f		*/ \</div><div class='del'>-	xor		rT0,rT0,rT2;	/* 2: S1 = S1 xor S1"		*/ \</div><div class='del'>-	andc		rT1,f,d;	/* 2: ch' = ~e and g		*/ \</div><div class='del'>-	add		g,g,rT0;	/* 2: temp1 = h + S1		*/ \</div><div class='del'>-	xor		rT3,rT3,rT1;	/* 2: ch = ch xor ch'		*/ \</div><div class='del'>-	rotrwi		rT0,h,2;	/* 2: S0 = a rotr 2		*/ \</div><div class='del'>-	add		g,g,rT3;	/* 2: temp1 = temp1 + ch	*/ \</div><div class='del'>-	rotrwi		rT1,h,13;	/* 2: S0' = a rotr 13		*/ \</div><div class='del'>-	rotrwi		rT3,h,22;	/* 2: S0" = a rotr 22		*/ \</div><div class='del'>-	xor		rT0,rT0,rT1;	/* 2: S0 = S0 xor S0'		*/ \</div><div class='del'>-	or		rT2,h,a;	/* 2: maj = a or b		*/ \</div><div class='del'>-	and		rT1,h,a;	/* 2: maj' = a and b		*/ \</div><div class='del'>-	and		rT2,rT2,b;	/* 2: maj = maj and c		*/ \</div><div class='del'>-	xor		rT3,rT0,rT3;	/* 2: S0 = S0 xor S0"		*/ \</div><div class='del'>-	or		rT2,rT1,rT2;	/* 2: maj = maj or maj'		*/ \</div><div class='del'>-	add		c,c,g;		/* 2: d = d + temp1		*/ \</div><div class='del'>-	add		rT3,rT3,rT2;	/* 2: temp2 = S0 + maj		*/ \</div><div class='del'>-	add		g,g,rT3		/* 2: h = temp1 + temp2		*/</div><div class='del'>-</div><div class='del'>-_GLOBAL(ppc_spe_sha256_transform)</div><div class='del'>-	INITIALIZE</div><div class='del'>-</div><div class='del'>-	mtctr		r5</div><div class='del'>-	lwz		rH0,0(rHP)</div><div class='del'>-	lwz		rH1,4(rHP)</div><div class='del'>-	lwz		rH2,8(rHP)</div><div class='del'>-	lwz		rH3,12(rHP)</div><div class='del'>-	lwz		rH4,16(rHP)</div><div class='del'>-	lwz		rH5,20(rHP)</div><div class='del'>-	lwz		rH6,24(rHP)</div><div class='del'>-	lwz		rH7,28(rHP)</div><div class='del'>-</div><div class='del'>-ppc_spe_sha256_main:</div><div class='del'>-	lis		rKP,PPC_SPE_SHA256_K@ha</div><div class='del'>-	addi		rKP,rKP,PPC_SPE_SHA256_K@l</div><div class='del'>-</div><div class='del'>-	R_LOAD_W(rH0, rH1, rH2, rH3, rH4, rH5, rH6, rH7, rW0, 0)</div><div class='del'>-	R_LOAD_W(rH6, rH7, rH0, rH1, rH2, rH3, rH4, rH5, rW1, 8)</div><div class='del'>-	R_LOAD_W(rH4, rH5, rH6, rH7, rH0, rH1, rH2, rH3, rW2, 16)</div><div class='del'>-	R_LOAD_W(rH2, rH3, rH4, rH5, rH6, rH7, rH0, rH1, rW3, 24)</div><div class='del'>-	R_LOAD_W(rH0, rH1, rH2, rH3, rH4, rH5, rH6, rH7, rW4, 32)</div><div class='del'>-	R_LOAD_W(rH6, rH7, rH0, rH1, rH2, rH3, rH4, rH5, rW5, 40)</div><div class='del'>-	R_LOAD_W(rH4, rH5, rH6, rH7, rH0, rH1, rH2, rH3, rW6, 48)</div><div class='del'>-	R_LOAD_W(rH2, rH3, rH4, rH5, rH6, rH7, rH0, rH1, rW7, 56)</div><div class='del'>-ppc_spe_sha256_16_rounds:</div><div class='del'>-	addi		rKP,rKP,64</div><div class='del'>-	R_CALC_W(rH0, rH1, rH2, rH3, rH4, rH5, rH6, rH7,</div><div class='del'>-		 rW0, rW1, rW4, rW5, rW7, N, 0)</div><div class='del'>-	R_CALC_W(rH6, rH7, rH0, rH1, rH2, rH3, rH4, rH5,</div><div class='del'>-		 rW1, rW2, rW5, rW6, rW0, N, 8)</div><div class='del'>-	R_CALC_W(rH4, rH5, rH6, rH7, rH0, rH1, rH2, rH3,</div><div class='del'>-		 rW2, rW3, rW6, rW7, rW1, N, 16)</div><div class='del'>-	R_CALC_W(rH2, rH3, rH4, rH5, rH6, rH7, rH0, rH1,</div><div class='del'>-		 rW3, rW4, rW7, rW0, rW2, N, 24)</div><div class='del'>-	R_CALC_W(rH0, rH1, rH2, rH3, rH4, rH5, rH6, rH7,</div><div class='del'>-		 rW4, rW5, rW0, rW1, rW3, N, 32)</div><div class='del'>-	R_CALC_W(rH6, rH7, rH0, rH1, rH2, rH3, rH4, rH5,</div><div class='del'>-		 rW5, rW6, rW1, rW2, rW4, N, 40)</div><div class='del'>-	R_CALC_W(rH4, rH5, rH6, rH7, rH0, rH1, rH2, rH3,</div><div class='del'>-		 rW6, rW7, rW2, rW3, rW5, N, 48)</div><div class='del'>-	R_CALC_W(rH2, rH3, rH4, rH5, rH6, rH7, rH0, rH1,</div><div class='del'>-		 rW7, rW0, rW3, rW4, rW6, C, 56)</div><div class='del'>-	bt		gt,ppc_spe_sha256_16_rounds</div><div class='del'>-</div><div class='del'>-	lwz		rW0,0(rHP)</div><div class='del'>-	NEXT_BLOCK</div><div class='del'>-	lwz		rW1,4(rHP)</div><div class='del'>-	lwz		rW2,8(rHP)</div><div class='del'>-	lwz		rW3,12(rHP)</div><div class='del'>-	lwz		rW4,16(rHP)</div><div class='del'>-	lwz		rW5,20(rHP)</div><div class='del'>-	lwz		rW6,24(rHP)</div><div class='del'>-	lwz		rW7,28(rHP)</div><div class='del'>-</div><div class='del'>-	add		rH0,rH0,rW0</div><div class='del'>-	stw		rH0,0(rHP)</div><div class='del'>-	add		rH1,rH1,rW1</div><div class='del'>-	stw		rH1,4(rHP)</div><div class='del'>-	add		rH2,rH2,rW2</div><div class='del'>-	stw		rH2,8(rHP)</div><div class='del'>-	add		rH3,rH3,rW3</div><div class='del'>-	stw		rH3,12(rHP)</div><div class='del'>-	add		rH4,rH4,rW4</div><div class='del'>-	stw		rH4,16(rHP)</div><div class='del'>-	add		rH5,rH5,rW5</div><div class='del'>-	stw		rH5,20(rHP)</div><div class='del'>-	add		rH6,rH6,rW6</div><div class='del'>-	stw		rH6,24(rHP)</div><div class='del'>-	add		rH7,rH7,rW7</div><div class='del'>-	stw		rH7,28(rHP)</div><div class='del'>-</div><div class='del'>-	bdnz		ppc_spe_sha256_main</div><div class='del'>-</div><div class='del'>-	FINALIZE</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-.data</div><div class='del'>-.align 5</div><div class='del'>-PPC_SPE_SHA256_K:</div><div class='del'>-	.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5</div><div class='del'>-	.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5</div><div class='del'>-	.long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3</div><div class='del'>-	.long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174</div><div class='del'>-	.long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc</div><div class='del'>-	.long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da</div><div class='del'>-	.long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7</div><div class='del'>-	.long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967</div><div class='del'>-	.long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13</div><div class='del'>-	.long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85</div><div class='del'>-	.long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3</div><div class='del'>-	.long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070</div><div class='del'>-	.long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5</div><div class='del'>-	.long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3</div><div class='del'>-	.long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208</div><div class='del'>-	.long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2</div><div class='head'>diff --git a/arch/powerpc/crypto/sha256-spe-glue.c b/arch/powerpc/crypto/sha256-spe-glue.c<br/>deleted file mode 100644<br/>index 2997d13236e0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/sha256-spe-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/sha256-spe-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,235 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for SHA-256 implementation for SPE instructions (PPC)</div><div class='del'>- *</div><div class='del'>- * Based on generic implementation. The assembler module takes care </div><div class='del'>- * about the SPE registers so it can run from interrupt context.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MAX_BYTES defines the number of bytes that are allowed to be processed</div><div class='del'>- * between preempt_disable() and preempt_enable(). SHA256 takes ~2,000</div><div class='del'>- * operations per 64 bytes. e500 cores can issue two arithmetic instructions</div><div class='del'>- * per clock cycle using one 32/64 bit unit (SU1) and one 32 bit unit (SU2).</div><div class='del'>- * Thus 1KB of input data will need an estimated maximum of 18,000 cycles.</div><div class='del'>- * Headroom for cache misses included. Even with the low end model clocked</div><div class='del'>- * at 667 MHz this equals to a critical time window of less than 27us.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-#define MAX_BYTES 1024</div><div class='del'>-</div><div class='del'>-extern void ppc_spe_sha256_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='del'>-</div><div class='del'>-static void spe_begin(void)</div><div class='del'>-{</div><div class='del'>-	/* We just start SPE operations and will save SPE registers later. */</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_spe();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spe_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_spe();</div><div class='del'>-	/* reenable preemption */</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ppc_sha256_clear_context(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	int count = sizeof(struct sha256_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct sha256_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	const unsigned int avail = 64 - offset;</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	const u8 *src = data;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy((char *)sctx-&gt;buf + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;buf + offset, src, avail);</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, (const u8 *)sctx-&gt;buf, 1);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt; 63) {</div><div class='del'>-		/* cut input data into smaller blocks */</div><div class='del'>-		bytes = (len &gt; MAX_BYTES) ? MAX_BYTES : len;</div><div class='del'>-		bytes = bytes &amp; ~0x3f;</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, src, bytes &gt;&gt; 6);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;buf, src, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)sctx-&gt;buf + offset;</div><div class='del'>-	int padlen;</div><div class='del'>-	__be64 *pbits = (__be64 *)(((char *)&amp;sctx-&gt;buf) + 56);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	padlen = 55 - offset;</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	spe_begin();</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-		p = (char *)sctx-&gt;buf;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='del'>-	*pbits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-	ppc_spe_sha256_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-</div><div class='del'>-	spe_end();</div><div class='del'>-</div><div class='del'>-	dst[0] = cpu_to_be32(sctx-&gt;state[0]);</div><div class='del'>-	dst[1] = cpu_to_be32(sctx-&gt;state[1]);</div><div class='del'>-	dst[2] = cpu_to_be32(sctx-&gt;state[2]);</div><div class='del'>-	dst[3] = cpu_to_be32(sctx-&gt;state[3]);</div><div class='del'>-	dst[4] = cpu_to_be32(sctx-&gt;state[4]);</div><div class='del'>-	dst[5] = cpu_to_be32(sctx-&gt;state[5]);</div><div class='del'>-	dst[6] = cpu_to_be32(sctx-&gt;state[6]);</div><div class='del'>-	dst[7] = cpu_to_be32(sctx-&gt;state[7]);</div><div class='del'>-</div><div class='del'>-	ppc_sha256_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha224_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	__be32 D[SHA256_DIGEST_SIZE &gt;&gt; 2];</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	ppc_spe_sha256_final(desc, (u8 *)D);</div><div class='del'>-</div><div class='del'>-	/* avoid bytewise memcpy */</div><div class='del'>-	dst[0] = D[0];</div><div class='del'>-	dst[1] = D[1];</div><div class='del'>-	dst[2] = D[2];</div><div class='del'>-	dst[3] = D[3];</div><div class='del'>-	dst[4] = D[4];</div><div class='del'>-	dst[5] = D[5];</div><div class='del'>-	dst[6] = D[6];</div><div class='del'>-</div><div class='del'>-	/* clear sensitive data */</div><div class='del'>-	memzero_explicit(D, SHA256_DIGEST_SIZE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	ppc_spe_sha256_update,</div><div class='del'>-	.final		=	ppc_spe_sha256_final,</div><div class='del'>-	.export		=	ppc_spe_sha256_export,</div><div class='del'>-	.import		=	ppc_spe_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"sha256-ppc-spe",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	ppc_spe_sha256_update,</div><div class='del'>-	.final		=	ppc_spe_sha224_final,</div><div class='del'>-	.export		=	ppc_spe_sha256_export,</div><div class='del'>-	.import		=	ppc_spe_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"sha224-ppc-spe",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init ppc_spe_sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ppc_spe_sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ppc_spe_sha256_mod_init);</div><div class='del'>-module_exit(ppc_spe_sha256_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, SPE optimized");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-ppc-spe");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-ppc-spe");</div><div class='head'>diff --git a/arch/powerpc/crypto/vmx.c b/arch/powerpc/crypto/vmx.c<br/>index 7eb713cc87c8..0b725e826388 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/vmx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/crypto/vmx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/crypto/vmx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/crypto/vmx.c</a></div><div class='hunk'>@@ -74,4 +74,4 @@ MODULE_DESCRIPTION("IBM VMX cryptographic acceleration instructions "</div><div class='ctx'> 		   "support on Power 8");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION("1.0.0");</div><div class='del'>-MODULE_IMPORT_NS(CRYPTO_INTERNAL);</div><div class='add'>+MODULE_IMPORT_NS("CRYPTO_INTERNAL");</div><div class='head'>diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild<br/>index e5fdc336c9b2..2e23533b67e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/Kbuild</a></div><div class='hunk'>@@ -3,7 +3,6 @@ generated-y += syscall_table_32.h</div><div class='ctx'> generated-y += syscall_table_64.h</div><div class='ctx'> generated-y += syscall_table_spu.h</div><div class='ctx'> generic-y += agp.h</div><div class='del'>-generic-y += kvm_types.h</div><div class='ctx'> generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += qrwlock.h</div><div class='ctx'> generic-y += early_ioremap.h</div><div class='head'>diff --git a/arch/powerpc/include/asm/asm-const.h b/arch/powerpc/include/asm/asm-const.h<br/>index bfb3c3534877..392bdb1f104f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/asm-const.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/asm-const.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/asm-const.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/asm-const.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_ASM_CONST_H</div><div class='ctx'> #define _ASM_POWERPC_ASM_CONST_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #  define stringify_in_c(...)	__VA_ARGS__</div><div class='ctx'> #  define ASM_CONST(x)		x</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h<br/>index b95b666f0374..9e9833faa4af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/barrier.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/barrier.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/barrier.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/barrier.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-const.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h<br/>index 671ecc6711e3..0d0470cd5ac3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/bitops.h</a></div><div class='hunk'>@@ -276,7 +276,7 @@ static inline void arch___clear_bit_unlock(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * fls: find last (most-significant) bit set.</div><div class='ctx'>  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline int fls(unsigned int x)</div><div class='add'>+static __always_inline __attribute_const__ int fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int lz;</div><div class='ctx'> </div><div class='hunk'>@@ -294,7 +294,7 @@ static __always_inline int fls(unsigned int x)</div><div class='ctx'>  * 32-bit fls calls.</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-static __always_inline int fls64(__u64 x)</div><div class='add'>+static __always_inline __attribute_const__ int fls64(__u64 x)</div><div class='ctx'> {</div><div class='ctx'> 	int lz;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/32/kup.h b/arch/powerpc/include/asm/book3s/32/kup.h<br/>index 4e14a5427a63..873c5146e326 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/kup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/kup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/kup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/32/kup.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/synch.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_KUAP</div><div class='ctx'> </div><div class='hunk'>@@ -170,6 +170,6 @@ __bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PPC_KUAP */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_32_KUP_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/32/mmu-hash.h b/arch/powerpc/include/asm/book3s/32/mmu-hash.h<br/>index 78c6a5fde1d6..8435bf3cdabf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/mmu-hash.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/mmu-hash.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/mmu-hash.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/32/mmu-hash.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #define BPP_RX	0x01		/* Read only */</div><div class='ctx'> #define BPP_RW	0x02		/* Read/write */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* Contort a phys_addr_t into the right format/bits for a BAT */</div><div class='ctx'> #ifdef CONFIG_PHYS_64BIT</div><div class='ctx'> #define BAT_PHYS_ADDR(x) ((u32)((x &amp; 0x00000000fffe0000ULL) | \</div><div class='hunk'>@@ -47,7 +47,7 @@ struct ppc_bat {</div><div class='ctx'> 	u32 batu;</div><div class='ctx'> 	u32 batl;</div><div class='ctx'> };</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Hash table</div><div class='hunk'>@@ -64,7 +64,7 @@ struct ppc_bat {</div><div class='ctx'> #define SR_KP	0x20000000	/* User key */</div><div class='ctx'> #define SR_KS	0x40000000	/* Supervisor key */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -225,7 +225,7 @@ static __always_inline void update_user_segments(u32 val)</div><div class='ctx'> </div><div class='ctx'> int __init find_free_bat(void);</div><div class='ctx'> unsigned int bat_block_size(unsigned long base, unsigned long top);</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* We happily ignore the smaller BATs on 601, we don't actually use</div><div class='ctx'>  * those definitions on hash32 at the moment anyway</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/32/pgalloc.h b/arch/powerpc/include/asm/book3s/32/pgalloc.h<br/>index dd4eb3063175..f4390704d5ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/32/pgalloc.h</a></div><div class='hunk'>@@ -7,8 +7,14 @@</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),</div><div class='del'>-			pgtable_gfp_flags(mm, GFP_KERNEL));</div><div class='add'>+	pgd_t *pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),</div><div class='add'>+				      pgtable_gfp_flags(mm, GFP_KERNEL));</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_603</div><div class='add'>+	memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD,</div><div class='add'>+	       (MAX_PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));</div><div class='add'>+#endif</div><div class='add'>+	return pgd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h<br/>index 42c3af90d1f0..87dcca962be7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/32/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/32/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/32/pgtable.h</a></div><div class='hunk'>@@ -102,7 +102,7 @@</div><div class='ctx'> #define PMD_CACHE_INDEX	PMD_INDEX_SIZE</div><div class='ctx'> #define PUD_CACHE_INDEX	PUD_INDEX_SIZE</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define PTE_TABLE_SIZE	(sizeof(pte_t) &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PMD_TABLE_SIZE	0</div><div class='ctx'> #define PUD_TABLE_SIZE	0</div><div class='hunk'>@@ -110,7 +110,7 @@</div><div class='ctx'> </div><div class='ctx'> /* Bits to mask out from a PMD to get to the PTE page */</div><div class='ctx'> #define PMD_MASKED_BITS		(PTE_TABLE_SIZE - 1)</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define PTRS_PER_PTE	(1 &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PTRS_PER_PGD	(1 &lt;&lt; PGD_INDEX_SIZE)</div><div class='hunk'>@@ -132,12 +132,12 @@</div><div class='ctx'> </div><div class='ctx'> #define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);</div><div class='ctx'> void unmap_kernel_page(unsigned long va);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is the bottom of the PKMAP area with HIGHMEM or an arbitrary</div><div class='hunk'>@@ -199,7 +199,7 @@ void unmap_kernel_page(unsigned long va);</div><div class='ctx'> #define MODULES_SIZE	(CONFIG_MODULES_SIZE * SZ_1M)</div><div class='ctx'> #define MODULES_VADDR	(MODULES_END - MODULES_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -365,7 +365,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) &gt;&gt; 3 })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val &lt;&lt; 3 })</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -602,6 +602,6 @@ static inline pgprot_t pgprot_writecombine(pgprot_t prot)</div><div class='ctx'> 	return pgprot_noncached_wc(prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /*  _ASM_POWERPC_BOOK3S_32_PGTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h<br/>index c3efacab4b94..8e5bd9902bed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash-4k.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash-4k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash-4k.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/hash-4k.h</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define H_KERN_VIRT_START	ASM_CONST(0xc0003d0000000000)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define H_PTE_TABLE_SIZE	(sizeof(pte_t) &lt;&lt; H_PTE_INDEX_SIZE)</div><div class='ctx'> #define H_PMD_TABLE_SIZE	(sizeof(pmd_t) &lt;&lt; H_PMD_INDEX_SIZE)</div><div class='ctx'> #define H_PUD_TABLE_SIZE	(sizeof(pud_t) &lt;&lt; H_PUD_INDEX_SIZE)</div><div class='hunk'>@@ -77,9 +77,17 @@</div><div class='ctx'> /*</div><div class='ctx'>  * With 4K page size the real_pte machinery is all nops.</div><div class='ctx'>  */</div><div class='del'>-#define __real_pte(e, p, o)		((real_pte_t){(e)})</div><div class='add'>+static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset)</div><div class='add'>+{</div><div class='add'>+	return (real_pte_t){pte};</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define __rpte_to_pte(r)	((r).pte)</div><div class='del'>-#define __rpte_to_hidx(r,index)	(pte_val(__rpte_to_pte(r)) &gt;&gt; H_PAGE_F_GIX_SHIFT)</div><div class='add'>+</div><div class='add'>+static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index)</div><div class='add'>+{</div><div class='add'>+	return pte_val(__rpte_to_pte(rpte)) &gt;&gt; H_PAGE_F_GIX_SHIFT;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \</div><div class='ctx'> 	do {							         \</div><div class='hunk'>@@ -160,12 +168,6 @@ extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> extern int hash__has_transparent_hugepage(void);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline pmd_t hash__pmd_mkdevmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	BUG();</div><div class='del'>-	return pmd;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h<br/>index 0bf6fd0bf42a..7deb3a66890b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash-64k.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash-64k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash-64k.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/hash-64k.h</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> #define H_PMD_FRAG_NR	(PAGE_SIZE &gt;&gt; H_PMD_FRAG_SIZE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -259,7 +259,7 @@ static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,</div><div class='ctx'>  */</div><div class='ctx'> static inline int hash__pmd_trans_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return !!((pmd_val(pmd) &amp; (_PAGE_PTE | H_PAGE_THP_HUGE | _PAGE_DEVMAP)) ==</div><div class='add'>+	return !!((pmd_val(pmd) &amp; (_PAGE_PTE | H_PAGE_THP_HUGE)) ==</div><div class='ctx'> 		  (_PAGE_PTE | H_PAGE_THP_HUGE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -281,11 +281,6 @@ extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> extern int hash__has_transparent_hugepage(void);</div><div class='ctx'> #endif /*  CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='del'>-static inline pmd_t hash__pmd_mkdevmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return __pmd(pmd_val(pmd) | (_PAGE_PTE | H_PAGE_THP_HUGE | _PAGE_DEVMAP));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_HASH_64K_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h<br/>index 0755f2567021..5a8cbd496731 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hash.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hash.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/hash.h</a></div><div class='hunk'>@@ -112,7 +112,7 @@</div><div class='ctx'> #define H_PMD_BAD_BITS		(PTE_TABLE_SIZE-1)</div><div class='ctx'> #define H_PUD_BAD_BITS		(PMD_TABLE_SIZE-1)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> static inline int get_region_id(unsigned long ea)</div><div class='ctx'> {</div><div class='ctx'> 	int region_id;</div><div class='hunk'>@@ -295,6 +295,6 @@ int hash__create_section_mapping(unsigned long start, unsigned long end,</div><div class='ctx'> 				 int nid, pgprot_t prot);</div><div class='ctx'> int hash__remove_section_mapping(unsigned long start, unsigned long end);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/hugetlb.h b/arch/powerpc/include/asm/book3s/64/hugetlb.h<br/>index f0bba9c5f9c3..bb786694dd26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/hugetlb.h</a></div><div class='hunk'>@@ -94,4 +94,10 @@ static inline int check_and_get_huge_psize(int shift)</div><div class='ctx'> 	return mmu_psize;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define arch_has_huge_bootmem_alloc arch_has_huge_bootmem_alloc</div><div class='add'>+</div><div class='add'>+static inline bool arch_has_huge_bootmem_alloc(void)</div><div class='add'>+{</div><div class='add'>+	return (firmware_has_feature(FW_FEATURE_LPAR) &amp;&amp; !radix_enabled());</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/kup.h b/arch/powerpc/include/asm/book3s/64/kup.h<br/>index 497a7bd31ecc..03aec3c6c851 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/kup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/kup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/kup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/kup.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #define AMR_KUEP_BLOCKED	UL(0x5455555555555555)</div><div class='ctx'> #define AMR_KUAP_BLOCKED	(AMR_KUAP_BLOCK_READ | AMR_KUAP_BLOCK_WRITE)</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro kuap_user_restore gpr1, gpr2</div><div class='ctx'> #if defined(CONFIG_PPC_PKEY)</div><div class='hunk'>@@ -191,7 +191,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -413,6 +413,6 @@ static __always_inline void restore_user_access(unsigned long flags)</div><div class='ctx'> 	if (static_branch_unlikely(&amp;uaccess_flush_key) &amp;&amp; flags == AMR_KUAP_BLOCKED)</div><div class='ctx'> 		do_uaccess_flush();</div><div class='ctx'> }</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_KUP_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h<br/>index 1c4eebbc69c9..346351423207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/mmu-hash.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/mmu-hash.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/mmu-hash.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/mmu-hash.h</a></div><div class='hunk'>@@ -130,7 +130,7 @@</div><div class='ctx'> #define POWER9_TLB_SETS_HASH	256	/* # sets in POWER9 TLB Hash mode */</div><div class='ctx'> #define POWER9_TLB_SETS_RADIX	128	/* # sets in POWER9 TLB Radix mode */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct mmu_hash_ops {</div><div class='ctx'> 	void            (*hpte_invalidate)(unsigned long slot,</div><div class='hunk'>@@ -220,7 +220,7 @@ static inline unsigned long get_sllp_encoding(int psize)</div><div class='ctx'> 	return sllp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Segment sizes.</div><div class='hunk'>@@ -248,7 +248,7 @@ static inline unsigned long get_sllp_encoding(int psize)</div><div class='ctx'> #define LP_BITS		8</div><div class='ctx'> #define LP_MASK(i)	((0xFF &gt;&gt; (i)) &lt;&lt; LP_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline int slb_vsid_shift(int ssize)</div><div class='ctx'> {</div><div class='hunk'>@@ -532,7 +532,7 @@ void slb_set_size(u16 size);</div><div class='ctx'> static inline void slb_set_size(u16 size) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * VSID allocation (256MB segment)</div><div class='hunk'>@@ -668,7 +668,7 @@ static inline void slb_set_size(u16 size) { }</div><div class='ctx'> #define SLICE_ARRAY_SIZE	(H_PGTABLE_RANGE &gt;&gt; 41)</div><div class='ctx'> #define LOW_SLICE_ARRAY_SZ	(BITS_PER_LONG / BITS_PER_BYTE)</div><div class='ctx'> #define TASK_SLICE_ARRAY_SZ(x)	((x)-&gt;hash_context-&gt;slb_addr_limit &gt;&gt; 41)</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_SUBPAGE_PROT</div><div class='ctx'> /*</div><div class='hunk'>@@ -881,5 +881,5 @@ static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,</div><div class='ctx'> 	return __mk_vsid_data(get_kernel_vsid(ea, ssize), ssize, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h<br/>index fedbc5d38191..48631365b48c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/mmu.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Page size definition</div><div class='ctx'>  *</div><div class='hunk'>@@ -26,12 +26,12 @@ struct mmu_psize_def {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* 64-bit classic hash table MMU */</div><div class='ctx'> #include &lt;asm/book3s/64/mmu-hash.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * ISA 3.0 partition and process table entry format</div><div class='ctx'>  */</div><div class='hunk'>@@ -288,5 +288,5 @@ static inline unsigned long get_user_vsid(mm_context_t *ctx,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/pgtable-64k.h b/arch/powerpc/include/asm/book3s/64/pgtable-64k.h<br/>index 4d8d7b4ea16b..004a03e97e58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pgtable-64k.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pgtable-64k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pgtable-64k.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/pgtable-64k.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H</div><div class='ctx'> #define _ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef CONFIG_HUGETLB_PAGE</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_HUGETLB_PAGE */</div><div class='hunk'>@@ -14,5 +14,5 @@ static inline int remap_4k_pfn(struct vm_area_struct *vma, unsigned long addr,</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	return hash__remap_4k_pfn(vma, addr, pfn, prot);</div><div class='ctx'> }</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> #endif /*_ASM_POWERPC_BOOK3S_64_PGTABLE_64K_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h<br/>index 6d98e6f08d4d..aac8ce30cd3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/pgtable.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable-nop4d.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/mmdebug.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -88,7 +88,6 @@</div><div class='ctx'> </div><div class='ctx'> #define _PAGE_SOFT_DIRTY	_RPAGE_SW3 /* software: software dirty tracking */</div><div class='ctx'> #define _PAGE_SPECIAL		_RPAGE_SW2 /* software: special page */</div><div class='del'>-#define _PAGE_DEVMAP		_RPAGE_SW1 /* software: ZONE_DEVICE page */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE</div><div class='hunk'>@@ -109,7 +108,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \</div><div class='ctx'> 			 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \</div><div class='del'>-			 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)</div><div class='add'>+			 _PAGE_SOFT_DIRTY)</div><div class='ctx'> /*</div><div class='ctx'>  * user access blocked by key</div><div class='ctx'>  */</div><div class='hunk'>@@ -123,7 +122,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \</div><div class='ctx'> 			 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE |	\</div><div class='del'>-			 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)</div><div class='add'>+			 _PAGE_SOFT_DIRTY)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We define 2 sets of base prot bits, one for basic pages (ie,</div><div class='hunk'>@@ -144,7 +143,7 @@</div><div class='ctx'> #define PAGE_KERNEL_RO	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)</div><div class='ctx'> #define PAGE_KERNEL_ROX	__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * page table defines</div><div class='ctx'>  */</div><div class='hunk'>@@ -292,7 +291,7 @@ static inline unsigned long pud_leaf_size(pud_t pud)</div><div class='ctx'> 	else</div><div class='ctx'> 		return PUD_SIZE;</div><div class='ctx'> }</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/book3s/64/hash.h&gt;</div><div class='ctx'> #include &lt;asm/book3s/64/radix.h&gt;</div><div class='hunk'>@@ -328,7 +327,7 @@ static inline unsigned long pud_leaf_size(pud_t pud)</div><div class='ctx'> #define FIXADDR_SIZE	SZ_32M</div><div class='ctx'> #define FIXADDR_TOP	(IOREMAP_END + FIXADDR_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				       pte_t *ptep, unsigned long clr,</div><div class='hunk'>@@ -609,24 +608,6 @@ static inline pte_t pte_mkhuge(pte_t pte)</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline pte_t pte_mkdevmap(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL | _PAGE_DEVMAP));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is potentially called with a pmd as the argument, in which case it's not</div><div class='del'>- * safe to check _PAGE_DEVMAP unless we also confirm that _PAGE_PTE is set.</div><div class='del'>- * That's because the bit we use for _PAGE_DEVMAP is not reserved for software</div><div class='del'>- * use in page directory entries (ie. non-ptes).</div><div class='del'>- */</div><div class='del'>-static inline int pte_devmap(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	__be64 mask = cpu_to_be64(_PAGE_DEVMAP | _PAGE_PTE);</div><div class='del'>-</div><div class='del'>-	return (pte_raw(pte) &amp; mask) == mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	/* FIXME!! check whether this need to be a conditional */</div><div class='hunk'>@@ -693,7 +674,7 @@ static inline pte_t pte_swp_mkexclusive(pte_t pte)</div><div class='ctx'> 	return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SWP_EXCLUSIVE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return !!(pte_raw(pte) &amp; cpu_to_be64(_PAGE_SWP_EXCLUSIVE));</div><div class='ctx'> }</div><div class='hunk'>@@ -1096,7 +1077,6 @@ static inline bool pmd_access_permitted(pmd_t pmd, bool write)</div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='ctx'> extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);</div><div class='ctx'> extern pud_t pfn_pud(unsigned long pfn, pgprot_t pgprot);</div><div class='del'>-extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);</div><div class='ctx'> extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);</div><div class='ctx'> extern pud_t pud_modify(pud_t pud, pgprot_t newprot);</div><div class='ctx'> extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='hunk'>@@ -1380,36 +1360,6 @@ static inline bool arch_needs_pgtable_deposit(void)</div><div class='ctx'> }</div><div class='ctx'> extern void serialize_against_pte_lookup(struct mm_struct *mm);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static inline pmd_t pmd_mkdevmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	if (radix_enabled())</div><div class='del'>-		return radix__pmd_mkdevmap(pmd);</div><div class='del'>-	return hash__pmd_mkdevmap(pmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline pud_t pud_mkdevmap(pud_t pud)</div><div class='del'>-{</div><div class='del'>-	if (radix_enabled())</div><div class='del'>-		return radix__pud_mkdevmap(pud);</div><div class='del'>-	BUG();</div><div class='del'>-	return pud;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pmd_devmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return pte_devmap(pmd_pte(pmd));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pud_devmap(pud_t pud)</div><div class='del'>-{</div><div class='del'>-	return pte_devmap(pud_pte(pud));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pgd_devmap(pgd_t pgd)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION</div><div class='hunk'>@@ -1431,5 +1381,5 @@ static inline bool is_pte_rw_upgrade(unsigned long old_val, unsigned long new_va</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/pkeys.h b/arch/powerpc/include/asm/book3s/64/pkeys.h<br/>index 5b178139f3c0..ff911b4251d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pkeys.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/pkeys.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/pkeys.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/pkeys.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/book3s/64/hash-pkey.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline u64 vmflag_to_pte_pkey_bits(u64 vm_flags)</div><div class='add'>+static inline u64 vmflag_to_pte_pkey_bits(vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='ctx'> 	if (!mmu_has_feature(MMU_FTR_PKEY))</div><div class='ctx'> 		return 0x0UL;</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h<br/>index 8f55ff74bb68..da954e779744 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/radix.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/radix.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/radix.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/radix.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-const.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/cmpxchg.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/book3s/64/radix-4k.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/book3s/64/tlbflush-radix.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'> #define RADIX_VMEMMAP_SIZE	RADIX_KERN_MAP_SIZE</div><div class='ctx'> #define RADIX_VMEMMAP_END	(RADIX_VMEMMAP_START + RADIX_VMEMMAP_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define RADIX_PTE_TABLE_SIZE	(sizeof(pte_t) &lt;&lt; RADIX_PTE_INDEX_SIZE)</div><div class='ctx'> #define RADIX_PMD_TABLE_SIZE	(sizeof(pmd_t) &lt;&lt; RADIX_PMD_INDEX_SIZE)</div><div class='ctx'> #define RADIX_PUD_TABLE_SIZE	(sizeof(pud_t) &lt;&lt; RADIX_PUD_INDEX_SIZE)</div><div class='hunk'>@@ -264,7 +264,7 @@ static inline int radix__p4d_bad(p4d_t p4d)</div><div class='ctx'> </div><div class='ctx'> static inline int radix__pmd_trans_huge(pmd_t pmd)</div><div class='ctx'> {</div><div class='del'>-	return (pmd_val(pmd) &amp; (_PAGE_PTE | _PAGE_DEVMAP)) == _PAGE_PTE;</div><div class='add'>+	return (pmd_val(pmd) &amp; _PAGE_PTE) == _PAGE_PTE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pmd_t radix__pmd_mkhuge(pmd_t pmd)</div><div class='hunk'>@@ -274,7 +274,7 @@ static inline pmd_t radix__pmd_mkhuge(pmd_t pmd)</div><div class='ctx'> </div><div class='ctx'> static inline int radix__pud_trans_huge(pud_t pud)</div><div class='ctx'> {</div><div class='del'>-	return (pud_val(pud) &amp; (_PAGE_PTE | _PAGE_DEVMAP)) == _PAGE_PTE;</div><div class='add'>+	return (pud_val(pud) &amp; _PAGE_PTE) == _PAGE_PTE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pud_t radix__pud_mkhuge(pud_t pud)</div><div class='hunk'>@@ -315,16 +315,6 @@ static inline int radix__has_transparent_pud_hugepage(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline pmd_t radix__pmd_mkdevmap(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return __pmd(pmd_val(pmd) | (_PAGE_PTE | _PAGE_DEVMAP));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline pud_t radix__pud_mkdevmap(pud_t pud)</div><div class='del'>-{</div><div class='del'>-	return __pud(pud_val(pud) | (_PAGE_PTE | _PAGE_DEVMAP));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct vmem_altmap;</div><div class='ctx'> struct dev_pagemap;</div><div class='ctx'> extern int __meminit radix__vmemmap_create_mapping(unsigned long start,</div><div class='hunk'>@@ -372,5 +362,5 @@ int __meminit vmemmap_populate_compound_pages(unsigned long start_pfn,</div><div class='ctx'> 					      unsigned long start,</div><div class='ctx'> 					      unsigned long end, int node,</div><div class='ctx'> 					      struct dev_pagemap *pgmap);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/book3s/64/slice.h b/arch/powerpc/include/asm/book3s/64/slice.h<br/>index 5fbe18544cbd..6e2f7a74cd75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/slice.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/book3s/64/slice.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/book3s/64/slice.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/book3s/64/slice.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_BOOK3S_64_SLICE_H</div><div class='ctx'> #define _ASM_POWERPC_BOOK3S_64_SLICE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_64S_HASH_MMU</div><div class='ctx'> #ifdef CONFIG_HUGETLB_PAGE</div><div class='hunk'>@@ -37,6 +37,6 @@ void slice_set_range_psize(struct mm_struct *mm, unsigned long start,</div><div class='ctx'> void slice_init_new_context_exec(struct mm_struct *mm);</div><div class='ctx'> void slice_setup_new_exec(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_BOOK3S_64_SLICE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h<br/>index 1db485aacbd9..bbaa7e81f821 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/bug.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/bug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/bug.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/bug.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BUG</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #ifdef CONFIG_DEBUG_BUGVERBOSE</div><div class='ctx'> .macro EMIT_BUG_ENTRY addr,file,line,flags</div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> #endif /* verbose */</div><div class='ctx'> </div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> /* _EMIT_BUG_ENTRY expects args %0,%1,%2,%3 to be FILE, LINE, flags and</div><div class='ctx'>    sizeof(struct bug_entry), respectively */</div><div class='ctx'> #ifdef CONFIG_DEBUG_BUGVERBOSE</div><div class='hunk'>@@ -101,12 +101,12 @@</div><div class='ctx'> #define HAVE_ARCH_WARN_ON</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY __ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #else</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> .macro EMIT_BUG_ENTRY addr,file,line,flags</div><div class='ctx'> .endm</div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> #define _EMIT_BUG_ENTRY</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* CONFIG_BUG */</div><div class='hunk'>@@ -115,7 +115,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bug.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct pt_regs;</div><div class='ctx'> void hash__do_page_fault(struct pt_regs *);</div><div class='hunk'>@@ -128,7 +128,7 @@ void die_mce(const char *str, struct pt_regs *regs, long err);</div><div class='ctx'> extern bool die_will_crash(void);</div><div class='ctx'> extern void panic_flush_kmsg_start(void);</div><div class='ctx'> extern void panic_flush_kmsg_end(void);</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_BUG_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h<br/>index 69232231d270..6796babc4d31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cache.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> </div><div class='ctx'> struct ppc_cache_info {</div><div class='hunk'>@@ -145,6 +145,6 @@ static inline void iccci(void *addr)</div><div class='ctx'> 	asm volatile ("iccci 0, %0" : : "r"(addr) : "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_CACHE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h<br/>index f2656774aaa9..1fea42928f64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cacheflush.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cacheflush.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -40,8 +40,8 @@ static inline void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> 	if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* avoid an atomic op if possible */</div><div class='del'>-	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> #define flush_dcache_folio flush_dcache_folio</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/cell-pmu.h b/arch/powerpc/include/asm/cell-pmu.h<br/>index 6a79b5d1c44f..7fbefd64b4fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cell-pmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cell-pmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cell-pmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cell-pmu.h</a></div><div class='hunk'>@@ -20,36 +20,9 @@</div><div class='ctx'> </div><div class='ctx'> /* Macros for the pm_control register. */</div><div class='ctx'> #define CBE_PM_16BIT_CTR(ctr)              (1 &lt;&lt; (24 - ((ctr) &amp; (NR_PHYS_CTRS - 1))))</div><div class='del'>-#define CBE_PM_ENABLE_PERF_MON             0x80000000</div><div class='del'>-#define CBE_PM_STOP_AT_MAX                 0x40000000</div><div class='del'>-#define CBE_PM_TRACE_MODE_GET(pm_control)  (((pm_control) &gt;&gt; 28) &amp; 0x3)</div><div class='del'>-#define CBE_PM_TRACE_MODE_SET(mode)        (((mode)  &amp; 0x3) &lt;&lt; 28)</div><div class='del'>-#define CBE_PM_TRACE_BUF_OVFLW(bit)        (((bit) &amp; 0x1) &lt;&lt; 17)</div><div class='del'>-#define CBE_PM_COUNT_MODE_SET(count)       (((count) &amp; 0x3) &lt;&lt; 18)</div><div class='del'>-#define CBE_PM_FREEZE_ALL_CTRS             0x00100000</div><div class='del'>-#define CBE_PM_ENABLE_EXT_TRACE            0x00008000</div><div class='del'>-#define CBE_PM_SPU_ADDR_TRACE_SET(msk)     (((msk) &amp; 0x3) &lt;&lt; 9)</div><div class='ctx'> </div><div class='ctx'> /* Macros for the trace_address register. */</div><div class='del'>-#define CBE_PM_TRACE_BUF_FULL              0x00000800</div><div class='ctx'> #define CBE_PM_TRACE_BUF_EMPTY             0x00000400</div><div class='del'>-#define CBE_PM_TRACE_BUF_DATA_COUNT(ta)    ((ta) &amp; 0x3ff)</div><div class='del'>-#define CBE_PM_TRACE_BUF_MAX_COUNT         0x400</div><div class='del'>-</div><div class='del'>-/* Macros for the pm07_control registers. */</div><div class='del'>-#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) &gt;&gt; 26) &amp; 0x3f)</div><div class='del'>-#define CBE_PM_CTR_INPUT_CONTROL           0x02000000</div><div class='del'>-#define CBE_PM_CTR_POLARITY                0x01000000</div><div class='del'>-#define CBE_PM_CTR_COUNT_CYCLES            0x00800000</div><div class='del'>-#define CBE_PM_CTR_ENABLE                  0x00400000</div><div class='del'>-#define PM07_CTR_INPUT_MUX(x)              (((x) &amp; 0x3F) &lt;&lt; 26)</div><div class='del'>-#define PM07_CTR_INPUT_CONTROL(x)          (((x) &amp; 1) &lt;&lt; 25)</div><div class='del'>-#define PM07_CTR_POLARITY(x)               (((x) &amp; 1) &lt;&lt; 24)</div><div class='del'>-#define PM07_CTR_COUNT_CYCLES(x)           (((x) &amp; 1) &lt;&lt; 23)</div><div class='del'>-#define PM07_CTR_ENABLE(x)                 (((x) &amp; 1) &lt;&lt; 22)</div><div class='del'>-</div><div class='del'>-/* Macros for the pm_status register. */</div><div class='del'>-#define CBE_PM_CTR_OVERFLOW_INTR(ctr)      (1 &lt;&lt; (31 - ((ctr) &amp; 7)))</div><div class='ctx'> </div><div class='ctx'> enum pm_reg_name {</div><div class='ctx'> 	group_control,</div><div class='hunk'>@@ -62,33 +35,4 @@ enum pm_reg_name {</div><div class='ctx'> 	pm_start_stop,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Routines for reading/writing the PMU registers. */</div><div class='del'>-extern u32  cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);</div><div class='del'>-extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);</div><div class='del'>-extern u32  cbe_read_ctr(u32 cpu, u32 ctr);</div><div class='del'>-extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);</div><div class='del'>-</div><div class='del'>-extern u32  cbe_read_pm07_control(u32 cpu, u32 ctr);</div><div class='del'>-extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);</div><div class='del'>-extern u32  cbe_read_pm(u32 cpu, enum pm_reg_name reg);</div><div class='del'>-extern void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val);</div><div class='del'>-</div><div class='del'>-extern u32  cbe_get_ctr_size(u32 cpu, u32 phys_ctr);</div><div class='del'>-extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);</div><div class='del'>-</div><div class='del'>-extern void cbe_enable_pm(u32 cpu);</div><div class='del'>-extern void cbe_disable_pm(u32 cpu);</div><div class='del'>-</div><div class='del'>-extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);</div><div class='del'>-</div><div class='del'>-extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);</div><div class='del'>-extern void cbe_disable_pm_interrupts(u32 cpu);</div><div class='del'>-extern u32  cbe_get_and_clear_pm_interrupts(u32 cpu);</div><div class='del'>-extern void cbe_sync_irq(int node);</div><div class='del'>-</div><div class='del'>-#define CBE_COUNT_SUPERVISOR_MODE       0</div><div class='del'>-#define CBE_COUNT_HYPERVISOR_MODE       1</div><div class='del'>-#define CBE_COUNT_PROBLEM_MODE          2</div><div class='del'>-#define CBE_COUNT_ALL_MODES             3</div><div class='del'>-</div><div class='ctx'> #endif /* __ASM_CELL_PMU_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cell-regs.h b/arch/powerpc/include/asm/cell-regs.h<br/>index e1c431ef30e0..20f7339a3d4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cell-regs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cell-regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cell-regs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cell-regs.h</a></div><div class='hunk'>@@ -18,293 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cell-pmu.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * Some HID register definitions</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* CBE specific HID0 bits */</div><div class='del'>-#define HID0_CBE_THERM_WAKEUP	0x0000020000000000ul</div><div class='del'>-#define HID0_CBE_SYSERR_WAKEUP	0x0000008000000000ul</div><div class='del'>-#define HID0_CBE_THERM_INT_EN	0x0000000400000000ul</div><div class='del'>-#define HID0_CBE_SYSERR_INT_EN	0x0000000200000000ul</div><div class='del'>-</div><div class='del'>-#define MAX_CBE		2</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * Pervasive unit register definitions</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-union spe_reg {</div><div class='del'>-	u64 val;</div><div class='del'>-	u8 spe[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union ppe_spe_reg {</div><div class='del'>-	u64 val;</div><div class='del'>-	struct {</div><div class='del'>-		u32 ppe;</div><div class='del'>-		u32 spe;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_regs {</div><div class='del'>-	/* Debug Bus Control */</div><div class='del'>-	u64	pad_0x0000;					/* 0x0000 */</div><div class='del'>-</div><div class='del'>-	u64	group_control;					/* 0x0008 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0010_0x00a8 [0x00a8 - 0x0010];		/* 0x0010 */</div><div class='del'>-</div><div class='del'>-	u64	debug_bus_control;				/* 0x00a8 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x00b0_0x0100 [0x0100 - 0x00b0];		/* 0x00b0 */</div><div class='del'>-</div><div class='del'>-	u64	trace_aux_data;					/* 0x0100 */</div><div class='del'>-	u64	trace_buffer_0_63;				/* 0x0108 */</div><div class='del'>-	u64	trace_buffer_64_127;				/* 0x0110 */</div><div class='del'>-	u64	trace_address;					/* 0x0118 */</div><div class='del'>-	u64	ext_tr_timer;					/* 0x0120 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0128_0x0400 [0x0400 - 0x0128];		/* 0x0128 */</div><div class='del'>-</div><div class='del'>-	/* Performance Monitor */</div><div class='del'>-	u64	pm_status;					/* 0x0400 */</div><div class='del'>-	u64	pm_control;					/* 0x0408 */</div><div class='del'>-	u64	pm_interval;					/* 0x0410 */</div><div class='del'>-	u64	pm_ctr[4];					/* 0x0418 */</div><div class='del'>-	u64	pm_start_stop;					/* 0x0438 */</div><div class='del'>-	u64	pm07_control[8];				/* 0x0440 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0480_0x0800 [0x0800 - 0x0480];		/* 0x0480 */</div><div class='del'>-</div><div class='del'>-	/* Thermal Sensor Registers */</div><div class='del'>-	union	spe_reg	ts_ctsr1;				/* 0x0800 */</div><div class='del'>-	u64	ts_ctsr2;					/* 0x0808 */</div><div class='del'>-	union	spe_reg	ts_mtsr1;				/* 0x0810 */</div><div class='del'>-	u64	ts_mtsr2;					/* 0x0818 */</div><div class='del'>-	union	spe_reg	ts_itr1;				/* 0x0820 */</div><div class='del'>-	u64	ts_itr2;					/* 0x0828 */</div><div class='del'>-	u64	ts_gitr;					/* 0x0830 */</div><div class='del'>-	u64	ts_isr;						/* 0x0838 */</div><div class='del'>-	u64	ts_imr;						/* 0x0840 */</div><div class='del'>-	union	spe_reg	tm_cr1;					/* 0x0848 */</div><div class='del'>-	u64	tm_cr2;						/* 0x0850 */</div><div class='del'>-	u64	tm_simr;					/* 0x0858 */</div><div class='del'>-	union	ppe_spe_reg tm_tpr;				/* 0x0860 */</div><div class='del'>-	union	spe_reg	tm_str1;				/* 0x0868 */</div><div class='del'>-	u64	tm_str2;					/* 0x0870 */</div><div class='del'>-	union	ppe_spe_reg tm_tsr;				/* 0x0878 */</div><div class='del'>-</div><div class='del'>-	/* Power Management */</div><div class='del'>-	u64	pmcr;						/* 0x0880 */</div><div class='del'>-#define CBE_PMD_PAUSE_ZERO_CONTROL	0x10000</div><div class='del'>-	u64	pmsr;						/* 0x0888 */</div><div class='del'>-</div><div class='del'>-	/* Time Base Register */</div><div class='del'>-	u64	tbr;						/* 0x0890 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0898_0x0c00 [0x0c00 - 0x0898];		/* 0x0898 */</div><div class='del'>-</div><div class='del'>-	/* Fault Isolation Registers */</div><div class='del'>-	u64	checkstop_fir;					/* 0x0c00 */</div><div class='del'>-	u64	recoverable_fir;				/* 0x0c08 */</div><div class='del'>-	u64	spec_att_mchk_fir;				/* 0x0c10 */</div><div class='del'>-	u32	fir_mode_reg;					/* 0x0c18 */</div><div class='del'>-	u8	pad_0x0c1c_0x0c20 [4];				/* 0x0c1c */</div><div class='del'>-#define CBE_PMD_FIR_MODE_M8		0x00800</div><div class='del'>-	u64	fir_enable_mask;				/* 0x0c20 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0c28_0x0ca8 [0x0ca8 - 0x0c28];		/* 0x0c28 */</div><div class='del'>-	u64	ras_esc_0;					/* 0x0ca8 */</div><div class='del'>-	u8	pad_0x0cb0_0x1000 [0x1000 - 0x0cb0];		/* 0x0cb0 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np);</div><div class='del'>-extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PMU shadow registers</div><div class='del'>- *</div><div class='del'>- * Many of the registers in the performance monitoring unit are write-only,</div><div class='del'>- * so we need to save a copy of what we write to those registers.</div><div class='del'>- *</div><div class='del'>- * The actual data counters are read/write. However, writing to the counters</div><div class='del'>- * only takes effect if the PMU is enabled. Otherwise the value is stored in</div><div class='del'>- * a hardware latch until the next time the PMU is enabled. So we save a copy</div><div class='del'>- * of the counter values if we need to read them back while the PMU is</div><div class='del'>- * disabled. The counter_value_in_latch field is a bitmap indicating which</div><div class='del'>- * counters currently have a value waiting to be written.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_shadow_regs {</div><div class='del'>-	u32 group_control;</div><div class='del'>-	u32 debug_bus_control;</div><div class='del'>-	u32 trace_address;</div><div class='del'>-	u32 ext_tr_timer;</div><div class='del'>-	u32 pm_status;</div><div class='del'>-	u32 pm_control;</div><div class='del'>-	u32 pm_interval;</div><div class='del'>-	u32 pm_start_stop;</div><div class='del'>-	u32 pm07_control[NR_CTRS];</div><div class='del'>-</div><div class='del'>-	u32 pm_ctr[NR_PHYS_CTRS];</div><div class='del'>-	u32 counter_value_in_latch;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct cbe_pmd_shadow_regs *cbe_get_pmd_shadow_regs(struct device_node *np);</div><div class='del'>-extern struct cbe_pmd_shadow_regs *cbe_get_cpu_pmd_shadow_regs(int cpu);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * IIC unit register definitions</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct cbe_iic_pending_bits {</div><div class='del'>-	u32 data;</div><div class='del'>-	u8 flags;</div><div class='del'>-	u8 class;</div><div class='del'>-	u8 source;</div><div class='del'>-	u8 prio;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define CBE_IIC_IRQ_VALID	0x80</div><div class='del'>-#define CBE_IIC_IRQ_IPI		0x40</div><div class='del'>-</div><div class='del'>-struct cbe_iic_thread_regs {</div><div class='del'>-	struct cbe_iic_pending_bits pending;</div><div class='del'>-	struct cbe_iic_pending_bits pending_destr;</div><div class='del'>-	u64 generate;</div><div class='del'>-	u64 prio;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct cbe_iic_regs {</div><div class='del'>-	u8	pad_0x0000_0x0400[0x0400 - 0x0000];		/* 0x0000 */</div><div class='del'>-</div><div class='del'>-	/* IIC interrupt registers */</div><div class='del'>-	struct	cbe_iic_thread_regs thread[2];			/* 0x0400 */</div><div class='del'>-</div><div class='del'>-	u64	iic_ir;						/* 0x0440 */</div><div class='del'>-#define CBE_IIC_IR_PRIO(x)      (((x) &amp; 0xf) &lt;&lt; 12)</div><div class='del'>-#define CBE_IIC_IR_DEST_NODE(x) (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='del'>-#define CBE_IIC_IR_DEST_UNIT(x) ((x) &amp; 0xf)</div><div class='del'>-#define CBE_IIC_IR_IOC_0        0x0</div><div class='del'>-#define CBE_IIC_IR_IOC_1S       0xb</div><div class='del'>-#define CBE_IIC_IR_PT_0         0xe</div><div class='del'>-#define CBE_IIC_IR_PT_1         0xf</div><div class='del'>-</div><div class='del'>-	u64	iic_is;						/* 0x0448 */</div><div class='del'>-#define CBE_IIC_IS_PMI		0x2</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0450_0x0500[0x0500 - 0x0450];		/* 0x0450 */</div><div class='del'>-</div><div class='del'>-	/* IOC FIR */</div><div class='del'>-	u64	ioc_fir_reset;					/* 0x0500 */</div><div class='del'>-	u64	ioc_fir_set;					/* 0x0508 */</div><div class='del'>-	u64	ioc_checkstop_enable;				/* 0x0510 */</div><div class='del'>-	u64	ioc_fir_error_mask;				/* 0x0518 */</div><div class='del'>-	u64	ioc_syserr_enable;				/* 0x0520 */</div><div class='del'>-	u64	ioc_fir;					/* 0x0528 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0530_0x1000[0x1000 - 0x0530];		/* 0x0530 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np);</div><div class='del'>-extern struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct cbe_mic_tm_regs {</div><div class='del'>-	u8	pad_0x0000_0x0040[0x0040 - 0x0000];		/* 0x0000 */</div><div class='del'>-</div><div class='del'>-	u64	mic_ctl_cnfg2;					/* 0x0040 */</div><div class='del'>-#define CBE_MIC_ENABLE_AUX_TRC		0x8000000000000000LL</div><div class='del'>-#define CBE_MIC_DISABLE_PWR_SAV_2	0x0200000000000000LL</div><div class='del'>-#define CBE_MIC_DISABLE_AUX_TRC_WRAP	0x0100000000000000LL</div><div class='del'>-#define CBE_MIC_ENABLE_AUX_TRC_INT	0x0080000000000000LL</div><div class='del'>-</div><div class='del'>-	u64	pad_0x0048;					/* 0x0048 */</div><div class='del'>-</div><div class='del'>-	u64	mic_aux_trc_base;				/* 0x0050 */</div><div class='del'>-	u64	mic_aux_trc_max_addr;				/* 0x0058 */</div><div class='del'>-	u64	mic_aux_trc_cur_addr;				/* 0x0060 */</div><div class='del'>-	u64	mic_aux_trc_grf_addr;				/* 0x0068 */</div><div class='del'>-	u64	mic_aux_trc_grf_data;				/* 0x0070 */</div><div class='del'>-</div><div class='del'>-	u64	pad_0x0078;					/* 0x0078 */</div><div class='del'>-</div><div class='del'>-	u64	mic_ctl_cnfg_0;					/* 0x0080 */</div><div class='del'>-#define CBE_MIC_DISABLE_PWR_SAV_0	0x8000000000000000LL</div><div class='del'>-</div><div class='del'>-	u64	pad_0x0088;					/* 0x0088 */</div><div class='del'>-</div><div class='del'>-	u64	slow_fast_timer_0;				/* 0x0090 */</div><div class='del'>-	u64	slow_next_timer_0;				/* 0x0098 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x00a0_0x00f8[0x00f8 - 0x00a0];		/* 0x00a0 */</div><div class='del'>-	u64    	mic_df_ecc_address_0;				/* 0x00f8 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0100_0x01b8[0x01b8 - 0x0100];		/* 0x0100 */</div><div class='del'>-	u64    	mic_df_ecc_address_1;				/* 0x01b8 */</div><div class='del'>-</div><div class='del'>-	u64	mic_ctl_cnfg_1;					/* 0x01c0 */</div><div class='del'>-#define CBE_MIC_DISABLE_PWR_SAV_1	0x8000000000000000LL</div><div class='del'>-</div><div class='del'>-	u64	pad_0x01c8;					/* 0x01c8 */</div><div class='del'>-</div><div class='del'>-	u64	slow_fast_timer_1;				/* 0x01d0 */</div><div class='del'>-	u64	slow_next_timer_1;				/* 0x01d8 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x01e0_0x0208[0x0208 - 0x01e0];		/* 0x01e0 */</div><div class='del'>-	u64	mic_exc;					/* 0x0208 */</div><div class='del'>-#define CBE_MIC_EXC_BLOCK_SCRUB		0x0800000000000000ULL</div><div class='del'>-#define CBE_MIC_EXC_FAST_SCRUB		0x0100000000000000ULL</div><div class='del'>-</div><div class='del'>-	u64	mic_mnt_cfg;					/* 0x0210 */</div><div class='del'>-#define CBE_MIC_MNT_CFG_CHAN_0_POP	0x0002000000000000ULL</div><div class='del'>-#define CBE_MIC_MNT_CFG_CHAN_1_POP	0x0004000000000000ULL</div><div class='del'>-</div><div class='del'>-	u64	mic_df_config;					/* 0x0218 */</div><div class='del'>-#define CBE_MIC_ECC_DISABLE_0		0x4000000000000000ULL</div><div class='del'>-#define CBE_MIC_ECC_REP_SINGLE_0	0x2000000000000000ULL</div><div class='del'>-#define CBE_MIC_ECC_DISABLE_1		0x0080000000000000ULL</div><div class='del'>-#define CBE_MIC_ECC_REP_SINGLE_1	0x0040000000000000ULL</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0220_0x0230[0x0230 - 0x0220];		/* 0x0220 */</div><div class='del'>-	u64	mic_fir;					/* 0x0230 */</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_0_ERR	0x0200000000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_0_ERR	0x0100000000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_1_ERR	0x0080000000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_1_ERR	0x0040000000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_ERR_MASK	0xffff000000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_0_CTE	0x0000020000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_0_CTE	0x0000010000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_1_CTE	0x0000008000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_1_CTE	0x0000004000000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_CTE_MASK	0x0000ffff00000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_0_RESET	0x0000000002000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_0_RESET	0x0000000001000000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_1_RESET	0x0000000000800000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_1_RESET	0x0000000000400000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_RESET_MASK	0x00000000ffff0000ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_0_SET	0x0000000000000200ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_0_SET	0x0000000000000100ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SINGLE_1_SET	0x0000000000000080ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_MULTI_1_SET	0x0000000000000040ULL</div><div class='del'>-#define CBE_MIC_FIR_ECC_SET_MASK	0x000000000000ffffULL</div><div class='del'>-	u64	mic_fir_debug;					/* 0x0238 */</div><div class='del'>-</div><div class='del'>-	u8	pad_0x0240_0x1000[0x1000 - 0x0240];		/* 0x0240 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np);</div><div class='del'>-extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* Cell page table entries */</div><div class='ctx'> #define CBE_IOPTE_PP_W		0x8000000000000000ul /* protection: write */</div><div class='ctx'> #define CBE_IOPTE_PP_R		0x4000000000000000ul /* protection: read */</div><div class='hunk'>@@ -315,13 +28,4 @@ extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu);</div><div class='ctx'> #define CBE_IOPTE_H		0x0000000000000800ul /* cache hint */</div><div class='ctx'> #define CBE_IOPTE_IOID_Mask	0x00000000000007fful /* ioid */</div><div class='ctx'> </div><div class='del'>-/* some utility functions to deal with SMT */</div><div class='del'>-extern u32 cbe_get_hw_thread_id(int cpu);</div><div class='del'>-extern u32 cbe_cpu_to_node(int cpu);</div><div class='del'>-extern u32 cbe_node_to_cpu(int node);</div><div class='del'>-</div><div class='del'>-/* Init this module early */</div><div class='del'>-extern void cbe_regs_init(void);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #endif /* CBE_REGS_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/copro.h b/arch/powerpc/include/asm/copro.h<br/>index fd2e166ea02a..81bd176203ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/copro.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/copro.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/copro.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/copro.h</a></div><div class='hunk'>@@ -18,10 +18,4 @@ int copro_handle_mm_fault(struct mm_struct *mm, unsigned long ea,</div><div class='ctx'> </div><div class='ctx'> int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_COPRO_BASE</div><div class='del'>-void copro_flush_all_slbs(struct mm_struct *mm);</div><div class='del'>-#else</div><div class='del'>-static inline void copro_flush_all_slbs(struct mm_struct *mm) {}</div><div class='del'>-#endif</div><div class='ctx'> #endif /* _ASM_POWERPC_COPRO_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cpu_has_feature.h b/arch/powerpc/include/asm/cpu_has_feature.h<br/>index bf8a228229fa..604fa3b6c33d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cpu_has_feature.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cpu_has_feature.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cpu_has_feature.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cpu_has_feature.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_POWERPC_CPU_HAS_FEATURE_H</div><div class='ctx'> #define __ASM_POWERPC_CPU_HAS_FEATURE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='hunk'>@@ -51,5 +51,5 @@ static __always_inline bool cpu_has_feature(unsigned long feature)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __ASM_POWERPC_CPU_HAS_FEATURE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h<br/>index 0cce5dc7fb1c..054cd2fcfd55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cpuidle.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cpuidle.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cpuidle.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cpuidle.h</a></div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'> #define ERR_EC_ESL_MISMATCH		-1</div><div class='ctx'> #define ERR_DEEP_STATE_ESL_MISMATCH	-2</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define PNV_IDLE_NAME_LEN    16</div><div class='ctx'> struct pnv_idle_states_t {</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h<br/>index 201218faed61..ec16c12296da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cputable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cputable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cputable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cputable.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;uapi/asm/cputable.h&gt;</div><div class='ctx'> #include &lt;asm/asm-const.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* This structure can grow, it's real size is used by head.S code</div><div class='ctx'>  * via the mkdefs mechanism.</div><div class='hunk'>@@ -103,7 +103,7 @@ extern void cpu_feature_keys_init(void);</div><div class='ctx'> static inline void cpu_feature_keys_init(void) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* CPU kernel features */</div><div class='ctx'> </div><div class='hunk'>@@ -193,8 +193,9 @@ static inline void cpu_feature_keys_init(void) { }</div><div class='ctx'> #define CPU_FTR_ARCH_31			LONG_ASM_CONST(0x0004000000000000)</div><div class='ctx'> #define CPU_FTR_DAWR1			LONG_ASM_CONST(0x0008000000000000)</div><div class='ctx'> #define CPU_FTR_DEXCR_NPHIE		LONG_ASM_CONST(0x0010000000000000)</div><div class='add'>+#define CPU_FTR_P11_PVR			LONG_ASM_CONST(0x0020000000000000)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define CPU_FTR_PPCAS_ARCH_V2	(CPU_FTR_NOEXECUTE)</div><div class='ctx'> </div><div class='hunk'>@@ -454,7 +455,7 @@ static inline void cpu_feature_keys_init(void) { }</div><div class='ctx'> 	    CPU_FTR_DAWR | CPU_FTR_DAWR1 | \</div><div class='ctx'> 	    CPU_FTR_DEXCR_NPHIE)</div><div class='ctx'> </div><div class='del'>-#define CPU_FTRS_POWER11	CPU_FTRS_POWER10</div><div class='add'>+#define CPU_FTRS_POWER11	(CPU_FTRS_POWER10 | CPU_FTR_P11_PVR)</div><div class='ctx'> </div><div class='ctx'> #define CPU_FTRS_CELL	(CPU_FTR_LWSYNC | \</div><div class='ctx'> 	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \</div><div class='hunk'>@@ -475,7 +476,7 @@ static inline void cpu_feature_keys_init(void) { }</div><div class='ctx'> 	    (CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 | \</div><div class='ctx'> 	     CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | CPU_FTRS_POWER9 | \</div><div class='ctx'> 	     CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | \</div><div class='del'>-	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10)</div><div class='add'>+	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10 | CPU_FTRS_POWER11)</div><div class='ctx'> #else</div><div class='ctx'> #define CPU_FTRS_POSSIBLE	\</div><div class='ctx'> 	    (CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \</div><div class='hunk'>@@ -483,7 +484,7 @@ static inline void cpu_feature_keys_init(void) { }</div><div class='ctx'> 	     CPU_FTRS_POWER8 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \</div><div class='ctx'> 	     CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | CPU_FTRS_POWER9 | \</div><div class='ctx'> 	     CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | \</div><div class='del'>-	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10)</div><div class='add'>+	     CPU_FTRS_POWER9_DD2_3 | CPU_FTRS_POWER10 | CPU_FTRS_POWER11)</div><div class='ctx'> #endif /* CONFIG_CPU_LITTLE_ENDIAN */</div><div class='ctx'> #endif</div><div class='ctx'> #else</div><div class='hunk'>@@ -547,7 +548,7 @@ enum {</div><div class='ctx'> 	    (CPU_FTRS_POSSIBLE &amp; ~CPU_FTR_HVMODE &amp; ~CPU_FTR_DBELL &amp; \</div><div class='ctx'> 	     CPU_FTRS_POWER7 &amp; CPU_FTRS_POWER8E &amp; CPU_FTRS_POWER8 &amp; \</div><div class='ctx'> 	     CPU_FTRS_POWER9 &amp; CPU_FTRS_POWER9_DD2_1 &amp; CPU_FTRS_POWER9_DD2_2 &amp; \</div><div class='del'>-	     CPU_FTRS_POWER10 &amp; CPU_FTRS_DT_CPU_BASE)</div><div class='add'>+	     CPU_FTRS_POWER10 &amp; CPU_FTRS_POWER11 &amp; CPU_FTRS_DT_CPU_BASE)</div><div class='ctx'> #else</div><div class='ctx'> #define CPU_FTRS_ALWAYS		\</div><div class='ctx'> 	    (CPU_FTRS_PPC970 &amp; CPU_FTRS_POWER5 &amp; \</div><div class='hunk'>@@ -555,7 +556,7 @@ enum {</div><div class='ctx'> 	     CPU_FTRS_PA6T &amp; CPU_FTRS_POWER8 &amp; CPU_FTRS_POWER8E &amp; \</div><div class='ctx'> 	     ~CPU_FTR_HVMODE &amp; ~CPU_FTR_DBELL &amp; CPU_FTRS_POSSIBLE &amp; \</div><div class='ctx'> 	     CPU_FTRS_POWER9 &amp; CPU_FTRS_POWER9_DD2_1 &amp; CPU_FTRS_POWER9_DD2_2 &amp; \</div><div class='del'>-	     CPU_FTRS_POWER10 &amp; CPU_FTRS_DT_CPU_BASE)</div><div class='add'>+	     CPU_FTRS_POWER10 &amp; CPU_FTRS_POWER11 &amp; CPU_FTRS_DT_CPU_BASE)</div><div class='ctx'> #endif /* CONFIG_CPU_LITTLE_ENDIAN */</div><div class='ctx'> #endif</div><div class='ctx'> #else</div><div class='hunk'>@@ -601,6 +602,6 @@ enum {</div><div class='ctx'>  */</div><div class='ctx'> #define HBP_NUM_MAX	2</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_POWERPC_CPUTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h<br/>index f26c430f3982..d06f2b20b810 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cputhreads.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/cputhreads.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/cputhreads.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/cputhreads.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_CPUTHREADS_H</div><div class='ctx'> #define _ASM_POWERPC_CPUTHREADS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -107,7 +107,7 @@ static inline u32 get_tensr(void)</div><div class='ctx'> void book3e_start_thread(int thread, unsigned long addr);</div><div class='ctx'> void book3e_stop_thread(int thread);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define INVALID_THREAD_HWID	0x0fff</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/crash_reserve.h b/arch/powerpc/include/asm/crash_reserve.h<br/>new file mode 100644<br/>index 000000000000..6467ce29b1fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/crash_reserve.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/crash_reserve.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_POWERPC_CRASH_RESERVE_H</div><div class='add'>+#define _ASM_POWERPC_CRASH_RESERVE_H</div><div class='add'>+</div><div class='add'>+/* crash kernel regions are Page size agliged */</div><div class='add'>+#define CRASH_ALIGN             PAGE_SIZE</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_POWERPC_CRASH_RESERVE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h<br/>index 3e9da22a2779..0b9ef726f92c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dbell.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dbell.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dbell.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/dbell.h</a></div><div class='hunk'>@@ -40,12 +40,6 @@ static inline void _ppc_msgsnd(u32 msg)</div><div class='ctx'> 				: : "i" (CPU_FTR_HVMODE), "r" (msg));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* sync before sending message */</div><div class='del'>-static inline void ppc_msgsnd_sync(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* sync after taking message interrupt */</div><div class='ctx'> static inline void ppc_msgsync(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -76,12 +70,6 @@ static inline void _ppc_msgsnd(u32 msg)</div><div class='ctx'> 	__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* sync before sending message */</div><div class='del'>-static inline void ppc_msgsnd_sync(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* sync after taking message interrupt */</div><div class='ctx'> static inline void ppc_msgsync(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -91,6 +79,12 @@ static inline void ppc_msgsync(void)</div><div class='ctx'> </div><div class='ctx'> extern void doorbell_exception(struct pt_regs *regs);</div><div class='ctx'> </div><div class='add'>+/* sync before sending message */</div><div class='add'>+static inline void ppc_msgsnd_sync(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)</div><div class='ctx'> {</div><div class='ctx'> 	u32 msg = PPC_DBELL_TYPE(type) | (flags &amp; PPC_DBELL_MSG_BRDCAST) |</div><div class='head'>diff --git a/arch/powerpc/include/asm/dcr-generic.h b/arch/powerpc/include/asm/dcr-generic.h<br/>deleted file mode 100644<br/>index 099c28dd40b9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr-generic.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-generic.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.</div><div class='del'>- *                    &lt;benh@kernel.crashing.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_POWERPC_DCR_GENERIC_H</div><div class='del'>-#define _ASM_POWERPC_DCR_GENERIC_H</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-	enum host_type_t type;</div><div class='del'>-	union {</div><div class='del'>-		dcr_host_mmio_t mmio;</div><div class='del'>-		dcr_host_native_t native;</div><div class='del'>-	} host;</div><div class='del'>-} dcr_host_t;</div><div class='del'>-</div><div class='del'>-extern bool dcr_map_ok_generic(dcr_host_t host);</div><div class='del'>-</div><div class='del'>-extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,</div><div class='del'>-			  unsigned int dcr_c);</div><div class='del'>-extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);</div><div class='del'>-</div><div class='del'>-extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);</div><div class='del'>-</div><div class='del'>-extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-#endif /* _ASM_POWERPC_DCR_GENERIC_H */</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/include/asm/dcr-mmio.h b/arch/powerpc/include/asm/dcr-mmio.h<br/>deleted file mode 100644<br/>index fc6d93ef4a13..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr-mmio.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-mmio.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.</div><div class='del'>- *                    &lt;benh@kernel.crashing.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_POWERPC_DCR_MMIO_H</div><div class='del'>-#define _ASM_POWERPC_DCR_MMIO_H</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-	void __iomem *token;</div><div class='del'>-	unsigned int stride;</div><div class='del'>-	unsigned int base;</div><div class='del'>-} dcr_host_mmio_t;</div><div class='del'>-</div><div class='del'>-static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)</div><div class='del'>-{</div><div class='del'>-	return host.token != NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,</div><div class='del'>-				    unsigned int dcr_n,</div><div class='del'>-				    unsigned int dcr_c);</div><div class='del'>-extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);</div><div class='del'>-</div><div class='del'>-static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)</div><div class='del'>-{</div><div class='del'>-	return in_be32(host.token + ((host.base + dcr_n) * host.stride));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dcr_write_mmio(dcr_host_mmio_t host,</div><div class='del'>-				  unsigned int dcr_n,</div><div class='del'>-				  u32 value)</div><div class='del'>-{</div><div class='del'>-	out_be32(host.token + ((host.base + dcr_n) * host.stride), value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-#endif /* _ASM_POWERPC_DCR_MMIO_H */</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/include/asm/dcr-native.h b/arch/powerpc/include/asm/dcr-native.h<br/>index a92059964579..65b3fc2dc404 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr-native.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr-native.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr-native.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/dcr-native.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_DCR_NATIVE_H</div><div class='ctx'> #define _ASM_POWERPC_DCR_NATIVE_H</div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='hunk'>@@ -139,6 +139,6 @@ static inline void __dcri_clrset(int base_addr, int base_data, int reg,</div><div class='ctx'> 							      DCRN_ ## base ## _CONFIG_DATA,	\</div><div class='ctx'> 							      reg, clr, set)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_DCR_NATIVE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/dcr.h b/arch/powerpc/include/asm/dcr.h<br/>index 64030e3a1f30..3c0fac2cc2b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dcr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dcr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/dcr.h</a></div><div class='hunk'>@@ -7,49 +7,17 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_DCR_H</div><div class='ctx'> #define _ASM_POWERPC_DCR_H</div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef CONFIG_PPC_DCR</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_DCR_NATIVE</div><div class='ctx'> #include &lt;asm/dcr-native.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_DCR_MMIO</div><div class='del'>-#include &lt;asm/dcr-mmio.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Indirection layer for providing both NATIVE and MMIO support. */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PPC_DCR_NATIVE) &amp;&amp; defined(CONFIG_PPC_DCR_MMIO)</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dcr-generic.h&gt;</div><div class='del'>-</div><div class='del'>-#define DCR_MAP_OK(host)	dcr_map_ok_generic(host)</div><div class='del'>-#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)</div><div class='del'>-#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)</div><div class='del'>-#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)</div><div class='del'>-#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_DCR_NATIVE</div><div class='ctx'> typedef dcr_host_native_t dcr_host_t;</div><div class='ctx'> #define DCR_MAP_OK(host)	dcr_map_ok_native(host)</div><div class='ctx'> #define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)</div><div class='ctx'> #define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)</div><div class='ctx'> #define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)</div><div class='ctx'> #define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)</div><div class='del'>-#else</div><div class='del'>-typedef dcr_host_mmio_t dcr_host_t;</div><div class='del'>-#define DCR_MAP_OK(host)	dcr_map_ok_mmio(host)</div><div class='del'>-#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)</div><div class='del'>-#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)</div><div class='del'>-#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)</div><div class='del'>-#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* defined(CONFIG_PPC_DCR_NATIVE) &amp;&amp; defined(CONFIG_PPC_DCR_MMIO) */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * additional helpers to read the DCR * base from the device-tree</div><div class='hunk'>@@ -60,6 +28,6 @@ extern unsigned int dcr_resource_start(const struct device_node *np,</div><div class='ctx'> extern unsigned int dcr_resource_len(const struct device_node *np,</div><div class='ctx'> 				     unsigned int index);</div><div class='ctx'> #endif /* CONFIG_PPC_DCR */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_DCR_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h<br/>index 47ed639f3b8f..a4dc27655b3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/device.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/device.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/device.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/device.h</a></div><div class='hunk'>@@ -38,9 +38,6 @@ struct dev_archdata {</div><div class='ctx'> #ifdef CONFIG_FAIL_IOMMU</div><div class='ctx'> 	int fail_iommu;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CXL_BASE</div><div class='del'>-	struct cxl_context	*cxl_ctx;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> 	void *iov_data;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/dtl.h b/arch/powerpc/include/asm/dtl.h<br/>index d6f43d149f8d..a5c21bc623cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dtl.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/dtl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/dtl.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/dtl.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_DTL_H</div><div class='ctx'> #define _ASM_POWERPC_DTL_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/rwsem.h&gt;</div><div class='ctx'> #include &lt;asm/lppaca.h&gt;</div><div class='del'>-#include &lt;linux/spinlock_types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Layout of entries in the hypervisor's dispatch trace log buffer.</div><div class='hunk'>@@ -35,7 +35,7 @@ struct dtl_entry {</div><div class='ctx'> #define DTL_LOG_ALL		(DTL_LOG_CEDE | DTL_LOG_PREEMPT | DTL_LOG_FAULT)</div><div class='ctx'> </div><div class='ctx'> extern struct kmem_cache *dtl_cache;</div><div class='del'>-extern rwlock_t dtl_access_lock;</div><div class='add'>+extern struct rw_semaphore dtl_access_lock;</div><div class='ctx'> </div><div class='ctx'> extern void register_dtl_buffer(int cpu);</div><div class='ctx'> extern void alloc_dtl_buffers(unsigned long *time_limit);</div><div class='head'>diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h<br/>index cdf3c6df5123..8fc5aaa4bbba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/epapr_hcalls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/epapr_hcalls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/epapr_hcalls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/epapr_hcalls.h</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/epapr_hcalls.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='hunk'>@@ -571,5 +571,5 @@ static inline long epapr_hypercall4(unsigned int nr, unsigned long p1,</div><div class='ctx'> 	in[3] = p4;</div><div class='ctx'> 	return epapr_hypercall(in, out, nr);</div><div class='ctx'> }</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _EPAPR_HCALLS_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h<br/>index b1ef1e92c34a..1a83b1ff3578 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/exception-64e.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/exception-64e.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/exception-64e.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/exception-64e.h</a></div><div class='hunk'>@@ -149,7 +149,7 @@ exc_##label##_book3e:</div><div class='ctx'> 	addi	r11,r13,PACA_EXTLB;					    \</div><div class='ctx'> 	TLB_MISS_RESTORE(r11)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned int interrupt_base_book3e;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h<br/>index bb6f78fcf981..a9437e89f69f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/exception-64s.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/exception-64s.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/exception-64s.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/exception-64s.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define MAX_MCE_DEPTH	4</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define STF_ENTRY_BARRIER_SLOT						\</div><div class='ctx'> 	STF_ENTRY_BARRIER_FIXUP_SECTION;				\</div><div class='hunk'>@@ -170,9 +170,9 @@</div><div class='ctx'> 	RFSCV;								\</div><div class='ctx'> 	b	rfscv_flush_fallback</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> /* Prototype for function defined in exceptions-64s.S */</div><div class='ctx'> void do_uaccess_flush(void);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_POWERPC_EXCEPTION_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/extable.h b/arch/powerpc/include/asm/extable.h<br/>index 26ce2e5c0fa8..d483a9c24ba9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/extable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/extable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/extable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/extable.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ARCH_HAS_RELATIVE_EXTABLE</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct exception_table_entry {</div><div class='ctx'> 	int insn;</div><div class='head'>diff --git a/arch/powerpc/include/asm/fadump.h b/arch/powerpc/include/asm/fadump.h<br/>index ef40c9b6972a..a48f54dde4f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/fadump.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/fadump.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/fadump.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/fadump.h</a></div><div class='hunk'>@@ -19,6 +19,7 @@ extern int is_fadump_active(void);</div><div class='ctx'> extern int should_fadump_crash(void);</div><div class='ctx'> extern void crash_fadump(struct pt_regs *, const char *);</div><div class='ctx'> extern void fadump_cleanup(void);</div><div class='add'>+void fadump_setup_param_area(void);</div><div class='ctx'> extern void fadump_append_bootargs(void);</div><div class='ctx'> </div><div class='ctx'> #else	/* CONFIG_FA_DUMP */</div><div class='hunk'>@@ -26,6 +27,7 @@ static inline int is_fadump_active(void) { return 0; }</div><div class='ctx'> static inline int should_fadump_crash(void) { return 0; }</div><div class='ctx'> static inline void crash_fadump(struct pt_regs *regs, const char *str) { }</div><div class='ctx'> static inline void fadump_cleanup(void) { }</div><div class='add'>+static inline void fadump_setup_param_area(void) { }</div><div class='ctx'> static inline void fadump_append_bootargs(void) { }</div><div class='ctx'> #endif /* !CONFIG_FA_DUMP */</div><div class='ctx'> </div><div class='hunk'>@@ -34,4 +36,11 @@ extern int early_init_dt_scan_fw_dump(unsigned long node, const char *uname,</div><div class='ctx'> 				      int depth, void *data);</div><div class='ctx'> extern int fadump_reserve_mem(void);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_FA_DUMP) &amp;&amp; defined(CONFIG_CMA)</div><div class='add'>+void fadump_cma_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void fadump_cma_init(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_POWERPC_FADUMP_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h<br/>index 17d168dd8b49..756a6c694018 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/feature-fixups.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/feature-fixups.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/feature-fixups.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/feature-fixups.h</a></div><div class='hunk'>@@ -168,7 +168,7 @@ label##5:							\</div><div class='ctx'> #define ALT_FW_FTR_SECTION_END_IFCLR(msk)	\</div><div class='ctx'> 	ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define ASM_FTR_IF(section_if, section_else, msk, val)	\</div><div class='ctx'> 	stringify_in_c(BEGIN_FTR_SECTION)			\</div><div class='hunk'>@@ -196,7 +196,7 @@ label##5:							\</div><div class='ctx'> #define ASM_MMU_FTR_IFCLR(section_if, section_else, msk)	\</div><div class='ctx'> 	ASM_MMU_FTR_IF(section_if, section_else, (msk), 0)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* LWSYNC feature sections */</div><div class='ctx'> #define START_LWSYNC_SECTION(label)	label##1:</div><div class='hunk'>@@ -276,7 +276,7 @@ label##3:					       	\</div><div class='ctx'> 	FTR_ENTRY_OFFSET 956b-957b;			\</div><div class='ctx'> 	.popsection;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern long stf_barrier_fallback;</div><div class='head'>diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h<br/>index 69ae9cf57d50..abd7c56f4d55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/firmware.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/firmware.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/firmware.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/firmware.h</a></div><div class='hunk'>@@ -58,7 +58,7 @@</div><div class='ctx'> #define FW_FEATURE_WATCHDOG	ASM_CONST(0x0000080000000000)</div><div class='ctx'> #define FW_FEATURE_PLPKS	ASM_CONST(0x0000100000000000)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='hunk'>@@ -146,6 +146,6 @@ void pseries_probe_fw_features(void);</div><div class='ctx'> static inline void pseries_probe_fw_features(void) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* __ASM_POWERPC_FIRMWARE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h<br/>index f9068dd8dfce..bc5109eab5b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/fixmap.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/fixmap.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/fixmap.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #ifndef _ASM_FIXMAP_H</div><div class='ctx'> #define _ASM_FIXMAP_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -111,5 +111,5 @@ static inline void __set_fixmap(enum fixed_addresses idx,</div><div class='ctx'> #define VIRT_IMMR_BASE (__fix_to_virt(FIX_IMMR_BASE))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/floppy.h b/arch/powerpc/include/asm/floppy.h<br/>index f8ce178b43b7..f4dc657638b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/floppy.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/floppy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/floppy.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/floppy.h</a></div><div class='hunk'>@@ -144,9 +144,12 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)</div><div class='ctx'> 		bus_addr = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!bus_addr)	/* need to map it */</div><div class='add'>+	if (!bus_addr) {	/* need to map it */</div><div class='ctx'> 		bus_addr = dma_map_single(&amp;isa_bridge_pcidev-&gt;dev, addr, size,</div><div class='ctx'> 					  dir);</div><div class='add'>+		if (dma_mapping_error(&amp;isa_bridge_pcidev-&gt;dev, bus_addr))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* remember this one as prev */</div><div class='ctx'> 	prev_addr = addr;</div><div class='hunk'>@@ -203,11 +206,6 @@ static int FDC2 = -1;</div><div class='ctx'> #define N_FDC 2			/* Don't change this! */</div><div class='ctx'> #define N_DRIVE 8</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The PowerPC has no problems with floppy DMA crossing 64k borders.</div><div class='del'>- */</div><div class='del'>-#define CROSS_64KB(a,s)	(0)</div><div class='del'>-</div><div class='ctx'> #define EXTRA_FLOPPY_PARAMS</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/fprobe.h b/arch/powerpc/include/asm/fprobe.h<br/>new file mode 100644<br/>index 000000000000..d64bc28fb3d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/fprobe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/fprobe.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_PPC_FPROBE_H</div><div class='add'>+#define _ASM_PPC_FPROBE_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/fprobe.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+#undef FPROBE_HEADER_MSB_PATTERN</div><div class='add'>+#define FPROBE_HEADER_MSB_PATTERN	(PAGE_OFFSET &amp; ~FPROBE_HEADER_MSB_MASK)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_PPC_FPROBE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h<br/>index 559560286e6d..5984eaa75ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ftrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ftrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ftrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/ftrace.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #define FTRACE_MCOUNT_MAX_OFFSET	8</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void _mcount(void);</div><div class='ctx'> </div><div class='ctx'> unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip,</div><div class='hunk'>@@ -24,7 +24,10 @@ unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip,</div><div class='ctx'> struct module;</div><div class='ctx'> struct dyn_ftrace;</div><div class='ctx'> struct dyn_arch_ftrace {</div><div class='del'>-	struct module *mod;</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	/* pointer to the associated out-of-line stub */</div><div class='add'>+	unsigned long ool_stub;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS</div><div class='hunk'>@@ -32,56 +35,63 @@ struct dyn_arch_ftrace {</div><div class='ctx'> int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);</div><div class='ctx'> #define ftrace_init_nop ftrace_init_nop</div><div class='ctx'> </div><div class='del'>-struct ftrace_regs {</div><div class='del'>-	struct pt_regs regs;</div><div class='del'>-};</div><div class='add'>+#include &lt;linux/ftrace_regs.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __always_inline struct pt_regs *arch_ftrace_get_regs(struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='ctx'> 	/* We clear regs.msr in ftrace_call */</div><div class='del'>-	return fregs-&gt;regs.msr ? &amp;fregs-&gt;regs : NULL;</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;regs.msr ? &amp;arch_ftrace_regs(fregs)-&gt;regs : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_ftrace_fill_perf_regs(fregs, _regs) do {		\</div><div class='add'>+		(_regs)-&gt;result = 0;				\</div><div class='add'>+		(_regs)-&gt;nip = arch_ftrace_regs(fregs)-&gt;regs.nip;		\</div><div class='add'>+		(_regs)-&gt;gpr[1] = arch_ftrace_regs(fregs)-&gt;regs.gpr[1];		\</div><div class='add'>+		asm volatile("mfmsr %0" : "=r" ((_regs)-&gt;msr));	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#undef ftrace_regs_get_return_value</div><div class='add'>+static __always_inline unsigned long</div><div class='add'>+ftrace_regs_get_return_value(const struct ftrace_regs *fregs)</div><div class='add'>+{</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;regs.gpr[3];</div><div class='add'>+}</div><div class='add'>+#define ftrace_regs_get_return_value ftrace_regs_get_return_value</div><div class='add'>+</div><div class='add'>+#undef ftrace_regs_get_frame_pointer</div><div class='add'>+static __always_inline unsigned long</div><div class='add'>+ftrace_regs_get_frame_pointer(const struct ftrace_regs *fregs)</div><div class='add'>+{</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;regs.gpr[1];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='ctx'> ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs,</div><div class='ctx'> 				    unsigned long ip)</div><div class='ctx'> {</div><div class='del'>-	regs_set_return_ip(&amp;fregs-&gt;regs, ip);</div><div class='add'>+	regs_set_return_ip(&amp;arch_ftrace_regs(fregs)-&gt;regs, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long</div><div class='del'>-ftrace_regs_get_instruction_pointer(struct ftrace_regs *fregs)</div><div class='add'>+ftrace_regs_get_return_address(struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	return instruction_pointer(&amp;fregs-&gt;regs);</div><div class='add'>+	return arch_ftrace_regs(fregs)-&gt;regs.link;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ftrace_regs_get_argument(fregs, n) \</div><div class='del'>-	regs_get_kernel_argument(&amp;(fregs)-&gt;regs, n)</div><div class='del'>-#define ftrace_regs_get_stack_pointer(fregs) \</div><div class='del'>-	kernel_stack_pointer(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_return_value(fregs) \</div><div class='del'>-	regs_return_value(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_set_return_value(fregs, ret) \</div><div class='del'>-	regs_set_return_value(&amp;(fregs)-&gt;regs, ret)</div><div class='del'>-#define ftrace_override_function_with_return(fregs) \</div><div class='del'>-	override_function_with_return(&amp;(fregs)-&gt;regs)</div><div class='del'>-#define ftrace_regs_query_register_offset(name) \</div><div class='del'>-	regs_query_register_offset(name)</div><div class='del'>-</div><div class='ctx'> struct ftrace_ops;</div><div class='ctx'> </div><div class='ctx'> #define ftrace_graph_func ftrace_graph_func</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 		       struct ftrace_ops *op, struct ftrace_regs *fregs);</div><div class='ctx'> #endif</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS</div><div class='ctx'> #define ARCH_SUPPORTS_FTRACE_OPS 1</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* CONFIG_FUNCTION_TRACER */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifdef CONFIG_FTRACE_SYSCALLS</div><div class='ctx'> /*</div><div class='ctx'>  * Some syscall entry functions on powerpc start with "ppc_" (fork and clone,</div><div class='hunk'>@@ -131,12 +141,40 @@ static inline u8 this_cpu_get_ftrace_enabled(void) { return 1; }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> extern unsigned int ftrace_tramp_text[], ftrace_tramp_init[];</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+struct ftrace_ool_stub {</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+	struct ftrace_ops *ftrace_op;</div><div class='add'>+#endif</div><div class='add'>+	u32	insn[4];</div><div class='add'>+} __aligned(sizeof(unsigned long));</div><div class='add'>+extern struct ftrace_ool_stub ftrace_ool_stub_text_end[], ftrace_ool_stub_text[],</div><div class='add'>+			      ftrace_ool_stub_inittext[];</div><div class='add'>+extern unsigned int ftrace_ool_stub_text_end_count, ftrace_ool_stub_text_count,</div><div class='add'>+		    ftrace_ool_stub_inittext_count;</div><div class='add'>+#endif</div><div class='ctx'> void ftrace_free_init_tramp(void);</div><div class='ctx'> unsigned long ftrace_call_adjust(unsigned long addr);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+/*</div><div class='add'>+ * When an ftrace registered caller is tracing a function that is also set by a</div><div class='add'>+ * register_ftrace_direct() call, it needs to be differentiated in the</div><div class='add'>+ * ftrace_caller trampoline so that the direct call can be invoked after the</div><div class='add'>+ * other ftrace ops. To do this, place the direct caller in the orig_gpr3 field</div><div class='add'>+ * of pt_regs. This tells ftrace_caller that there's a direct caller.</div><div class='add'>+ */</div><div class='add'>+static inline void arch_ftrace_set_direct_caller(struct ftrace_regs *fregs, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = &amp;arch_ftrace_regs(fregs)-&gt;regs;</div><div class='add'>+</div><div class='add'>+	regs-&gt;orig_gpr3 = addr;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */</div><div class='ctx'> #else</div><div class='ctx'> static inline void ftrace_free_init_tramp(void) { }</div><div class='ctx'> static inline unsigned long ftrace_call_adjust(unsigned long addr) { return addr; }</div><div class='ctx'> #endif</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_FTRACE */</div><div class='head'>diff --git a/arch/powerpc/include/asm/guest-state-buffer.h b/arch/powerpc/include/asm/guest-state-buffer.h<br/>index d107abe1468f..acd61eb36d59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/guest-state-buffer.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/guest-state-buffer.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/guest-state-buffer.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/guest-state-buffer.h</a></div><div class='hunk'>@@ -28,6 +28,21 @@</div><div class='ctx'>  /* Process Table Info */</div><div class='ctx'> #define KVMPPC_GSID_PROCESS_TABLE		0x0006</div><div class='ctx'> </div><div class='add'>+/* Guest Management Heap Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_HEAP		0x0800</div><div class='add'>+</div><div class='add'>+/* Guest Management Heap Max Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_HEAP_MAX		0x0801</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE	0x0802</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Max Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX	0x0803</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Reclaim in bytes */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM	0x0804</div><div class='add'>+</div><div class='ctx'> /* H_GUEST_RUN_VCPU input buffer Info */</div><div class='ctx'> #define KVMPPC_GSID_RUN_INPUT			0x0C00</div><div class='ctx'> /* H_GUEST_RUN_VCPU output buffer Info */</div><div class='hunk'>@@ -106,6 +121,11 @@</div><div class='ctx'> #define KVMPPC_GSE_GUESTWIDE_COUNT \</div><div class='ctx'> 	(KVMPPC_GSE_GUESTWIDE_END - KVMPPC_GSE_GUESTWIDE_START + 1)</div><div class='ctx'> </div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_START KVMPPC_GSID_L0_GUEST_HEAP</div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_END KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_COUNT \</div><div class='add'>+	(KVMPPC_GSE_HOSTWIDE_END - KVMPPC_GSE_HOSTWIDE_START + 1)</div><div class='add'>+</div><div class='ctx'> #define KVMPPC_GSE_META_START KVMPPC_GSID_RUN_INPUT</div><div class='ctx'> #define KVMPPC_GSE_META_END KVMPPC_GSID_VPA</div><div class='ctx'> #define KVMPPC_GSE_META_COUNT (KVMPPC_GSE_META_END - KVMPPC_GSE_META_START + 1)</div><div class='hunk'>@@ -130,7 +150,8 @@</div><div class='ctx'> 	(KVMPPC_GSE_INTR_REGS_END - KVMPPC_GSE_INTR_REGS_START + 1)</div><div class='ctx'> </div><div class='ctx'> #define KVMPPC_GSE_IDEN_COUNT                                 \</div><div class='del'>-	(KVMPPC_GSE_GUESTWIDE_COUNT + KVMPPC_GSE_META_COUNT + \</div><div class='add'>+	(KVMPPC_GSE_HOSTWIDE_COUNT + \</div><div class='add'>+	 KVMPPC_GSE_GUESTWIDE_COUNT + KVMPPC_GSE_META_COUNT + \</div><div class='ctx'> 	 KVMPPC_GSE_DW_REGS_COUNT + KVMPPC_GSE_W_REGS_COUNT + \</div><div class='ctx'> 	 KVMPPC_GSE_VSRS_COUNT + KVMPPC_GSE_INTR_REGS_COUNT)</div><div class='ctx'> </div><div class='hunk'>@@ -139,10 +160,11 @@</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='ctx'> 	KVMPPC_GS_CLASS_GUESTWIDE = 0x01,</div><div class='del'>-	KVMPPC_GS_CLASS_META = 0x02,</div><div class='del'>-	KVMPPC_GS_CLASS_DWORD_REG = 0x04,</div><div class='del'>-	KVMPPC_GS_CLASS_WORD_REG = 0x08,</div><div class='del'>-	KVMPPC_GS_CLASS_VECTOR = 0x10,</div><div class='add'>+	KVMPPC_GS_CLASS_HOSTWIDE = 0x02,</div><div class='add'>+	KVMPPC_GS_CLASS_META = 0x04,</div><div class='add'>+	KVMPPC_GS_CLASS_DWORD_REG = 0x08,</div><div class='add'>+	KVMPPC_GS_CLASS_WORD_REG = 0x10,</div><div class='add'>+	KVMPPC_GS_CLASS_VECTOR = 0x18,</div><div class='ctx'> 	KVMPPC_GS_CLASS_INTR = 0x20,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -164,6 +186,7 @@ enum {</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='ctx'> 	KVMPPC_GS_FLAGS_WIDE = 0x01,</div><div class='add'>+	KVMPPC_GS_FLAGS_HOST_WIDE = 0x02,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -287,7 +310,7 @@ struct kvmppc_gs_msg_ops {</div><div class='ctx'>  * struct kvmppc_gs_msg - a guest state message</div><div class='ctx'>  * @bitmap: the guest state ids that should be included</div><div class='ctx'>  * @ops: modify message behavior for reading and writing to buffers</div><div class='del'>- * @flags: guest wide or thread wide</div><div class='add'>+ * @flags: host wide, guest wide or thread wide</div><div class='ctx'>  * @data: location where buffer data will be written to or from.</div><div class='ctx'>  *</div><div class='ctx'>  * A guest state message is allows flexibility in sending in receiving data</div><div class='head'>diff --git a/arch/powerpc/include/asm/head-64.h b/arch/powerpc/include/asm/head-64.h<br/>index d73153b0275d..3966bd5810cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/head-64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/head-64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/head-64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/head-64.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * We can't do CPP stringification and concatination directly into the section</div><div class='ctx'>  * name for some reason, so these macros can do it for us.</div><div class='hunk'>@@ -167,6 +167,6 @@ name:</div><div class='ctx'> // find label from _within_ sname</div><div class='ctx'> #define ABS_ADDR(label, sname) (label - start_ ## sname + sname ## _start)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_POWERPC_HEAD_64_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h<br/>index 18a3028ac3b6..86326587e58d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hugetlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hugetlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -15,6 +15,15 @@</div><div class='ctx'> </div><div class='ctx'> extern bool hugetlb_disabled;</div><div class='ctx'> </div><div class='add'>+static inline bool hugepages_supported(void)</div><div class='add'>+{</div><div class='add'>+	if (hugetlb_disabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return HPAGE_SHIFT != 0;</div><div class='add'>+}</div><div class='add'>+#define hugepages_supported hugepages_supported</div><div class='add'>+</div><div class='ctx'> void __init hugetlbpage_init_defaultsize(void);</div><div class='ctx'> </div><div class='ctx'> int slice_is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,</div><div class='hunk'>@@ -36,7 +45,8 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR</div><div class='ctx'> static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-					    unsigned long addr, pte_t *ptep)</div><div class='add'>+					    unsigned long addr, pte_t *ptep,</div><div class='add'>+					    unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));</div><div class='ctx'> }</div><div class='hunk'>@@ -46,8 +56,9 @@ static inline pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='ctx'> 					  unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte;</div><div class='add'>+	unsigned long sz = huge_page_size(hstate_vma(vma));</div><div class='ctx'> </div><div class='del'>-	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep);</div><div class='add'>+	pte = huge_ptep_get_and_clear(vma-&gt;vm_mm, addr, ptep, sz);</div><div class='ctx'> 	flush_hugetlb_page(vma, addr);</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h<br/>index 7a8495660c2f..9aef16149d92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hvcall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hvcall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hvcall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/hvcall.h</a></div><div class='hunk'>@@ -270,6 +270,7 @@</div><div class='ctx'> #define H_QUERY_INT_STATE       0x1E4</div><div class='ctx'> #define H_POLL_PENDING		0x1D8</div><div class='ctx'> #define H_ILLAN_ATTRIBUTES	0x244</div><div class='add'>+#define H_ADD_LOGICAL_LAN_BUFFERS 0x248</div><div class='ctx'> #define H_MODIFY_HEA_QP		0x250</div><div class='ctx'> #define H_QUERY_HEA_QP		0x254</div><div class='ctx'> #define H_QUERY_HEA		0x258</div><div class='hunk'>@@ -348,6 +349,7 @@</div><div class='ctx'> #define H_SCM_FLUSH		0x44C</div><div class='ctx'> #define H_GET_ENERGY_SCALE_INFO	0x450</div><div class='ctx'> #define H_PKS_SIGNED_UPDATE	0x454</div><div class='add'>+#define H_HTM                   0x458</div><div class='ctx'> #define H_WATCHDOG		0x45C</div><div class='ctx'> #define H_GUEST_GET_CAPABILITIES 0x460</div><div class='ctx'> #define H_GUEST_SET_CAPABILITIES 0x464</div><div class='hunk'>@@ -489,15 +491,50 @@</div><div class='ctx'> #define H_RPTI_PAGE_ALL (-1UL)</div><div class='ctx'> </div><div class='ctx'> /* Flags for H_GUEST_{S,G}_STATE */</div><div class='del'>-#define H_GUEST_FLAGS_WIDE     (1UL&lt;&lt;(63-0))</div><div class='add'>+#define H_GUEST_FLAGS_WIDE     (1UL &lt;&lt; (63 - 0))</div><div class='add'>+#define H_GUEST_FLAGS_HOST_WIDE	(1UL &lt;&lt; (63 - 1))</div><div class='ctx'> </div><div class='ctx'> /* Flag values used for H_{S,G}SET_GUEST_CAPABILITIES */</div><div class='del'>-#define H_GUEST_CAP_COPY_MEM	(1UL&lt;&lt;(63-0))</div><div class='del'>-#define H_GUEST_CAP_POWER9	(1UL&lt;&lt;(63-1))</div><div class='del'>-#define H_GUEST_CAP_POWER10	(1UL&lt;&lt;(63-2))</div><div class='del'>-#define H_GUEST_CAP_BITMAP2	(1UL&lt;&lt;(63-63))</div><div class='add'>+#define H_GUEST_CAP_COPY_MEM	(1UL &lt;&lt; (63 - 0))</div><div class='add'>+#define H_GUEST_CAP_POWER9	(1UL &lt;&lt; (63 - 1))</div><div class='add'>+#define H_GUEST_CAP_POWER10	(1UL &lt;&lt; (63 - 2))</div><div class='add'>+#define H_GUEST_CAP_POWER11	(1UL &lt;&lt; (63 - 3))</div><div class='add'>+#define H_GUEST_CAP_BITMAP2	(1UL &lt;&lt; (63 - 63))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+/*</div><div class='add'>+ * Defines for H_HTM - Macros for hardware trace macro (HTM) function.</div><div class='add'>+ */</div><div class='add'>+#define H_HTM_FLAGS_HARDWARE_TARGET    (1ul &lt;&lt; 63)</div><div class='add'>+#define H_HTM_FLAGS_LOGICAL_TARGET     (1ul &lt;&lt; 62)</div><div class='add'>+#define H_HTM_FLAGS_PROCID_TARGET      (1ul &lt;&lt; 61)</div><div class='add'>+#define H_HTM_FLAGS_NOWRAP             (1ul &lt;&lt; 60)</div><div class='add'>+</div><div class='add'>+#define H_HTM_OP_SHIFT                 (63-15)</div><div class='add'>+#define H_HTM_OP(x)                    ((unsigned long)(x)&lt;&lt;H_HTM_OP_SHIFT)</div><div class='add'>+#define H_HTM_OP_CAPABILITIES          0x01</div><div class='add'>+#define H_HTM_OP_STATUS                        0x02</div><div class='add'>+#define H_HTM_OP_SETUP                 0x03</div><div class='add'>+#define H_HTM_OP_CONFIGURE             0x04</div><div class='add'>+#define H_HTM_OP_START                 0x05</div><div class='add'>+#define H_HTM_OP_STOP                  0x06</div><div class='add'>+#define H_HTM_OP_DECONFIGURE           0x07</div><div class='add'>+#define H_HTM_OP_DUMP_DETAILS          0x08</div><div class='add'>+#define H_HTM_OP_DUMP_DATA             0x09</div><div class='add'>+#define H_HTM_OP_DUMP_SYSMEM_CONF      0x0a</div><div class='add'>+#define H_HTM_OP_DUMP_SYSPROC_CONF     0x0b</div><div class='add'>+</div><div class='add'>+#define H_HTM_TYPE_SHIFT               (63-31)</div><div class='add'>+#define H_HTM_TYPE(x)                  ((unsigned long)(x)&lt;&lt;H_HTM_TYPE_SHIFT)</div><div class='add'>+#define H_HTM_TYPE_NEST                        0x01</div><div class='add'>+#define H_HTM_TYPE_CORE                        0x02</div><div class='add'>+#define H_HTM_TYPE_LLAT                        0x03</div><div class='add'>+#define H_HTM_TYPE_GLOBAL              0xff</div><div class='add'>+</div><div class='add'>+#define H_HTM_TARGET_NODE_INDEX(x)             ((unsigned long)(x)&lt;&lt;(63-15))</div><div class='add'>+#define H_HTM_TARGET_NODAL_CHIP_INDEX(x)       ((unsigned long)(x)&lt;&lt;(63-31))</div><div class='add'>+#define H_HTM_TARGET_CORE_INDEX_ON_CHIP(x)     ((unsigned long)(x)&lt;&lt;(63-47))</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -698,6 +735,6 @@ struct hv_gpci_request_buffer {</div><div class='ctx'> 	uint8_t bytes[HGPCI_MAX_DATA_BYTES];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_HVCALL_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h<br/>index 569ac1165b06..1078ba88efaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hw_irq.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/hw_irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/hw_irq.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/hw_irq.h</a></div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> #define IRQS_PMI_DISABLED	2</div><div class='ctx'> #define IRQS_ALL_DISABLED	(IRQS_DISABLED | IRQS_PMI_DISABLED)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline void __hard_irq_enable(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -516,6 +516,6 @@ static inline unsigned long mtmsr_isync_irqsafe(unsigned long msr)</div><div class='ctx'> </div><div class='ctx'> #define ARCH_IRQ_INIT_FLAGS	IRQ_NOREQUEST</div><div class='ctx'> </div><div class='del'>-#endif  /* __ASSEMBLY__ */</div><div class='add'>+#endif  /* __ASSEMBLER__ */</div><div class='ctx'> #endif	/* __KERNEL__ */</div><div class='ctx'> #endif	/* _ASM_POWERPC_HW_IRQ_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h<br/>index 684d3f453282..ffa82167c860 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/inst.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/inst.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/inst.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/inst.h</a></div><div class='hunk'>@@ -143,10 +143,6 @@ static inline int __copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int val, suffix;</div><div class='ctx'> </div><div class='del'>-/* See https://github.com/ClangBuiltLinux/linux/issues/1521 */</div><div class='del'>-#if defined(CONFIG_CC_IS_CLANG) &amp;&amp; CONFIG_CLANG_VERSION &lt; 140000</div><div class='del'>-	val = suffix = 0;</div><div class='del'>-#endif</div><div class='ctx'> 	__get_kernel_nofault(&amp;val, src, u32, Efault);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PPC64) &amp;&amp; get_op(val) == OP_PREFIX) {</div><div class='ctx'> 		__get_kernel_nofault(&amp;suffix, src + 1, u32, Efault);</div><div class='head'>diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h<br/>index 23638d4e73ac..eb0e4a20b818 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/interrupt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/interrupt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/interrupt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/interrupt.h</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> #define INTERRUPT_DATA_LOAD_TLB_MISS_603	0x1100</div><div class='ctx'> #define INTERRUPT_DATA_STORE_TLB_MISS_603	0x1200</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='hunk'>@@ -675,6 +675,6 @@ unsigned long interrupt_exit_user_restart(struct pt_regs *regs);</div><div class='ctx'> unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_INTERRUPT_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/io-defs.h b/arch/powerpc/include/asm/io-defs.h<br/>index faf8617cc574..5c2be9b54a9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/io-defs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io-defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/io-defs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/io-defs.h</a></div><div class='hunk'>@@ -1,61 +1,15 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* This file is meant to be include multiple times by other headers */</div><div class='del'>-/* last 2 argments are used by platforms/cell/io-workarounds.[ch] */</div><div class='ctx'> </div><div class='del'>-DEF_PCI_AC_RET(readb, u8, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_RET(readw, u16, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_RET(readl, u32, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_RET(readw_be, u16, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_RET(readl_be, u32, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writeb, (u8 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writew, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writel, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writew_be, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writel_be, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-</div><div class='del'>-#ifdef __powerpc64__</div><div class='del'>-DEF_PCI_AC_RET(readq, u64, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_RET(readq_be, u64, (const PCI_IO_ADDR addr), (addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writeq, (u64 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-DEF_PCI_AC_NORET(writeq_be, (u64 val, PCI_IO_ADDR addr), (val, addr), mem, addr)</div><div class='del'>-#endif /* __powerpc64__ */</div><div class='del'>-</div><div class='del'>-DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port), pio, port)</div><div class='del'>-DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port), pio, port)</div><div class='del'>-DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port), pio, port)</div><div class='del'>-DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port), pio, port)</div><div class='del'>-DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port), pio, port)</div><div class='del'>-DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port), pio, port)</div><div class='del'>-</div><div class='del'>-DEF_PCI_AC_NORET(readsb, (const PCI_IO_ADDR a, void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(readsw, (const PCI_IO_ADDR a, void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(readsl, (const PCI_IO_ADDR a, void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(writesb, (PCI_IO_ADDR a, const void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(writesw, (PCI_IO_ADDR a, const void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(writesl, (PCI_IO_ADDR a, const void *b, unsigned long c),</div><div class='del'>-		 (a, b, c), mem, a)</div><div class='del'>-</div><div class='del'>-DEF_PCI_AC_NORET(insb, (unsigned long p, void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-DEF_PCI_AC_NORET(outsw, (unsigned long p, const void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-DEF_PCI_AC_NORET(outsl, (unsigned long p, const void *b, unsigned long c),</div><div class='del'>-		 (p, b, c), pio, p)</div><div class='del'>-</div><div class='del'>-DEF_PCI_AC_NORET(memset_io, (PCI_IO_ADDR a, int c, unsigned long n),</div><div class='del'>-		 (a, c, n), mem, a)</div><div class='del'>-DEF_PCI_AC_NORET(memcpy_fromio, (void *d, const PCI_IO_ADDR s, unsigned long n),</div><div class='del'>-		 (d, s, n), mem, s)</div><div class='del'>-DEF_PCI_AC_NORET(memcpy_toio, (PCI_IO_ADDR d, const void *s, unsigned long n),</div><div class='del'>-		 (d, s, n), mem, d)</div><div class='add'>+DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port))</div><div class='add'>+DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port))</div><div class='add'>+DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port))</div><div class='add'>+DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port))</div><div class='add'>+DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port))</div><div class='add'>+DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port))</div><div class='add'>+DEF_PCI_AC_NORET(insb, (unsigned long p, void *b, unsigned long c), (p, b, c))</div><div class='add'>+DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c), (p, b, c))</div><div class='add'>+DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c), (p, b, c))</div><div class='add'>+DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c), (p, b, c))</div><div class='add'>+DEF_PCI_AC_NORET(outsw, (unsigned long p, const void *b, unsigned long c), (p, b, c))</div><div class='add'>+DEF_PCI_AC_NORET(outsl, (unsigned long p, const void *b, unsigned long c), (p, b, c))</div><div class='head'>diff --git a/arch/powerpc/include/asm/io-workarounds.h b/arch/powerpc/include/asm/io-workarounds.h<br/>deleted file mode 100644<br/>index 3cce499fbe27..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/io-workarounds.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io-workarounds.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Support PCI IO workaround</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2007-2008 TOSHIBA CORPORATION</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _IO_WORKAROUNDS_H</div><div class='del'>-#define _IO_WORKAROUNDS_H</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_IO_WORKAROUNDS</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-</div><div class='del'>-/* Bus info */</div><div class='del'>-struct iowa_bus {</div><div class='del'>-	struct pci_controller *phb;</div><div class='del'>-	struct ppc_pci_io *ops;</div><div class='del'>-	void   *private;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,</div><div class='del'>-		       int (*)(struct iowa_bus *, void *), void *);</div><div class='del'>-struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR);</div><div class='del'>-struct iowa_bus *iowa_pio_find_bus(unsigned long);</div><div class='del'>-</div><div class='del'>-extern struct ppc_pci_io spiderpci_ops;</div><div class='del'>-extern int spiderpci_iowa_init(struct iowa_bus *, void *);</div><div class='del'>-</div><div class='del'>-#define SPIDER_PCI_REG_BASE		0xd000</div><div class='del'>-#define SPIDER_PCI_REG_SIZE		0x1000</div><div class='del'>-#define SPIDER_PCI_VCI_CNTL_STAT	0x0110</div><div class='del'>-#define SPIDER_PCI_DUMMY_READ		0x0810</div><div class='del'>-#define SPIDER_PCI_DUMMY_READ_BASE	0x0814</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PPC_IO_WORKAROUNDS) &amp;&amp; defined(CONFIG_PPC_INDIRECT_MMIO)</div><div class='del'>-extern bool io_workaround_inited;</div><div class='del'>-</div><div class='del'>-static inline bool iowa_is_active(void)</div><div class='del'>-{</div><div class='del'>-	return unlikely(io_workaround_inited);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline bool iowa_is_active(void)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,</div><div class='del'>-			   pgprot_t prot, void *caller);</div><div class='del'>-</div><div class='del'>-#endif /* _IO_WORKAROUNDS_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h<br/>index 52e1b1d15ff6..7a89754842d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/io.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/io.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/io.h</a></div><div class='hunk'>@@ -65,8 +65,8 @@ extern resource_size_t isa_mem_base;</div><div class='ctx'> extern bool isa_io_special;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC32</div><div class='del'>-#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)</div><div class='del'>-#error CONFIG_PPC_INDIRECT_{PIO,MMIO} are not yet supported on 32 bits</div><div class='add'>+#ifdef CONFIG_PPC_INDIRECT_PIO</div><div class='add'>+#error CONFIG_PPC_INDIRECT_PIO is not yet supported on 32 bits</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -80,16 +80,12 @@ extern bool isa_io_special;</div><div class='ctx'>  *</div><div class='ctx'>  *	in_8, in_le16, in_be16, in_le32, in_be32, in_le64, in_be64</div><div class='ctx'>  *	out_8, out_le16, out_be16, out_le32, out_be32, out_le64, out_be64</div><div class='del'>- *	_insb, _insw_ns, _insl_ns, _outsb, _outsw_ns, _outsl_ns</div><div class='add'>+ *	_insb, _insw, _insl, _outsb, _outsw, _outsl</div><div class='ctx'>  *</div><div class='ctx'>  * Those operate directly on a kernel virtual address. Note that the prototype</div><div class='ctx'>  * for the out_* accessors has the arguments in opposite order from the usual</div><div class='ctx'>  * linux PCI accessors. Unlike those, they take the address first and the value</div><div class='ctx'>  * next.</div><div class='del'>- *</div><div class='del'>- * Note: I might drop the _ns suffix on the stream operations soon as it is</div><div class='del'>- * simply normal for stream operations to not swap in the first place.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* -mprefixed can generate offsets beyond range, fall back hack */</div><div class='hunk'>@@ -228,19 +224,10 @@ static inline void out_be64(volatile u64 __iomem *addr, u64 val)</div><div class='ctx'>  */</div><div class='ctx'> extern void _insb(const volatile u8 __iomem *addr, void *buf, long count);</div><div class='ctx'> extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count);</div><div class='del'>-extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count);</div><div class='del'>-extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count);</div><div class='del'>-extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count);</div><div class='del'>-extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count);</div><div class='del'>-</div><div class='del'>-/* The _ns naming is historical and will be removed. For now, just #define</div><div class='del'>- * the non _ns equivalent names</div><div class='del'>- */</div><div class='del'>-#define _insw	_insw_ns</div><div class='del'>-#define _insl	_insl_ns</div><div class='del'>-#define _outsw	_outsw_ns</div><div class='del'>-#define _outsl	_outsl_ns</div><div class='del'>-</div><div class='add'>+extern void _insw(const volatile u16 __iomem *addr, void *buf, long count);</div><div class='add'>+extern void _outsw(volatile u16 __iomem *addr, const void *buf, long count);</div><div class='add'>+extern void _insl(const volatile u32 __iomem *addr, void *buf, long count);</div><div class='add'>+extern void _outsl(volatile u32 __iomem *addr, const void *buf, long count);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * memset_io, memcpy_toio, memcpy_fromio base implementations are out of line</div><div class='hunk'>@@ -261,9 +248,9 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,</div><div class='ctx'>  * for PowerPC is as close as possible to the x86 version of these, and thus</div><div class='ctx'>  * provides fairly heavy weight barriers for the non-raw versions</div><div class='ctx'>  *</div><div class='del'>- * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_MMIO</div><div class='del'>- * or CONFIG_PPC_INDIRECT_PIO are set allowing the platform to provide its</div><div class='del'>- * own implementation of some or all of the accessors.</div><div class='add'>+ * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_PIO</div><div class='add'>+ * is set allowing the platform to provide its own implementation of some</div><div class='add'>+ * of the accessors.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -274,116 +261,11 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,</div><div class='ctx'> #include &lt;asm/eeh.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* Shortcut to the MMIO argument pointer */</div><div class='del'>-#define PCI_IO_ADDR	volatile void __iomem *</div><div class='del'>-</div><div class='del'>-/* Indirect IO address tokens:</div><div class='del'>- *</div><div class='del'>- * When CONFIG_PPC_INDIRECT_MMIO is set, the platform can provide hooks</div><div class='del'>- * on all MMIOs. (Note that this is all 64 bits only for now)</div><div class='del'>- *</div><div class='del'>- * To help platforms who may need to differentiate MMIO addresses in</div><div class='del'>- * their hooks, a bitfield is reserved for use by the platform near the</div><div class='del'>- * top of MMIO addresses (not PIO, those have to cope the hard way).</div><div class='del'>- *</div><div class='del'>- * The highest address in the kernel virtual space are:</div><div class='del'>- *</div><div class='del'>- *  d0003fffffffffff	# with Hash MMU</div><div class='del'>- *  c00fffffffffffff	# with Radix MMU</div><div class='del'>- *</div><div class='del'>- * The top 4 bits are reserved as the region ID on hash, leaving us 8 bits</div><div class='del'>- * that can be used for the field.</div><div class='del'>- *</div><div class='del'>- * The direct IO mapping operations will then mask off those bits</div><div class='del'>- * before doing the actual access, though that only happen when</div><div class='del'>- * CONFIG_PPC_INDIRECT_MMIO is set, thus be careful when you use that</div><div class='del'>- * mechanism</div><div class='del'>- *</div><div class='del'>- * For PIO, there is a separate CONFIG_PPC_INDIRECT_PIO which makes</div><div class='del'>- * all PIO functions call through a hook.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_MMIO</div><div class='del'>-#define PCI_IO_IND_TOKEN_SHIFT	52</div><div class='del'>-#define PCI_IO_IND_TOKEN_MASK	(0xfful &lt;&lt; PCI_IO_IND_TOKEN_SHIFT)</div><div class='del'>-#define PCI_FIX_ADDR(addr)						\</div><div class='del'>-	((PCI_IO_ADDR)(((unsigned long)(addr)) &amp; ~PCI_IO_IND_TOKEN_MASK))</div><div class='del'>-#define PCI_GET_ADDR_TOKEN(addr)					\</div><div class='del'>-	(((unsigned long)(addr) &amp; PCI_IO_IND_TOKEN_MASK) &gt;&gt; 		\</div><div class='del'>-		PCI_IO_IND_TOKEN_SHIFT)</div><div class='del'>-#define PCI_SET_ADDR_TOKEN(addr, token) 				\</div><div class='del'>-do {									\</div><div class='del'>-	unsigned long __a = (unsigned long)(addr);			\</div><div class='del'>-	__a &amp;= ~PCI_IO_IND_TOKEN_MASK;					\</div><div class='del'>-	__a |= ((unsigned long)(token)) &lt;&lt; PCI_IO_IND_TOKEN_SHIFT;	\</div><div class='del'>-	(addr) = (void __iomem *)__a;					\</div><div class='del'>-} while(0)</div><div class='del'>-#else</div><div class='del'>-#define PCI_FIX_ADDR(addr) (addr)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Non ordered and non-swapping "raw" accessors</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline unsigned char __raw_readb(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return *(volatile unsigned char __force *)PCI_FIX_ADDR(addr);</div><div class='del'>-}</div><div class='del'>-#define __raw_readb __raw_readb</div><div class='del'>-</div><div class='del'>-static inline unsigned short __raw_readw(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return *(volatile unsigned short __force *)PCI_FIX_ADDR(addr);</div><div class='del'>-}</div><div class='del'>-#define __raw_readw __raw_readw</div><div class='del'>-</div><div class='del'>-static inline unsigned int __raw_readl(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return *(volatile unsigned int __force *)PCI_FIX_ADDR(addr);</div><div class='del'>-}</div><div class='del'>-#define __raw_readl __raw_readl</div><div class='del'>-</div><div class='del'>-static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	*(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v;</div><div class='del'>-}</div><div class='del'>-#define __raw_writeb __raw_writeb</div><div class='del'>-</div><div class='del'>-static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	*(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v;</div><div class='del'>-}</div><div class='del'>-#define __raw_writew __raw_writew</div><div class='del'>-</div><div class='del'>-static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	*(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v;</div><div class='del'>-}</div><div class='del'>-#define __raw_writel __raw_writel</div><div class='add'>+#define _IO_PORT(port)	((volatile void __iomem *)(_IO_BASE + (port)))</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='del'>-static inline unsigned long __raw_readq(const volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return *(volatile unsigned long __force *)PCI_FIX_ADDR(addr);</div><div class='del'>-}</div><div class='del'>-#define __raw_readq __raw_readq</div><div class='del'>-</div><div class='del'>-static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	*(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v;</div><div class='del'>-}</div><div class='del'>-#define __raw_writeq __raw_writeq</div><div class='del'>-</div><div class='del'>-static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	__raw_writeq((__force unsigned long)cpu_to_be64(v), addr);</div><div class='del'>-}</div><div class='del'>-#define __raw_writeq_be __raw_writeq_be</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * Real mode versions of the above. Those instructions are only supposed</div><div class='add'>+ * Real mode versions of raw accessors. Those instructions are only supposed</div><div class='ctx'>  * to be used in hypervisor real mode as per the architecture spec.</div><div class='ctx'>  */</div><div class='ctx'> static inline void __raw_rm_writeb(u8 val, volatile void __iomem *paddr)</div><div class='hunk'>@@ -551,30 +433,23 @@ __do_out_asm(_rec_outl, "stwbrx")</div><div class='ctx'>  * possible to hook directly at the toplevel PIO operation if they have to</div><div class='ctx'>  * be handled differently</div><div class='ctx'>  */</div><div class='del'>-#define __do_writeb(val, addr)	out_8(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writew(val, addr)	out_le16(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writel(val, addr)	out_le32(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writeq(val, addr)	out_le64(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writew_be(val, addr) out_be16(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writel_be(val, addr) out_be32(PCI_FIX_ADDR(addr), val)</div><div class='del'>-#define __do_writeq_be(val, addr) out_be64(PCI_FIX_ADDR(addr), val)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EEH</div><div class='del'>-#define __do_readb(addr)	eeh_readb(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readw(addr)	eeh_readw(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readl(addr)	eeh_readl(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readq(addr)	eeh_readq(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readw_be(addr)	eeh_readw_be(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readl_be(addr)	eeh_readl_be(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readq_be(addr)	eeh_readq_be(PCI_FIX_ADDR(addr))</div><div class='add'>+#define __do_readb(addr)	eeh_readb(addr)</div><div class='add'>+#define __do_readw(addr)	eeh_readw(addr)</div><div class='add'>+#define __do_readl(addr)	eeh_readl(addr)</div><div class='add'>+#define __do_readq(addr)	eeh_readq(addr)</div><div class='add'>+#define __do_readw_be(addr)	eeh_readw_be(addr)</div><div class='add'>+#define __do_readl_be(addr)	eeh_readl_be(addr)</div><div class='add'>+#define __do_readq_be(addr)	eeh_readq_be(addr)</div><div class='ctx'> #else /* CONFIG_EEH */</div><div class='del'>-#define __do_readb(addr)	in_8(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readw(addr)	in_le16(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readl(addr)	in_le32(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readq(addr)	in_le64(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readw_be(addr)	in_be16(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readl_be(addr)	in_be32(PCI_FIX_ADDR(addr))</div><div class='del'>-#define __do_readq_be(addr)	in_be64(PCI_FIX_ADDR(addr))</div><div class='add'>+#define __do_readb(addr)	in_8(addr)</div><div class='add'>+#define __do_readw(addr)	in_le16(addr)</div><div class='add'>+#define __do_readl(addr)	in_le32(addr)</div><div class='add'>+#define __do_readq(addr)	in_le64(addr)</div><div class='add'>+#define __do_readw_be(addr)	in_be16(addr)</div><div class='add'>+#define __do_readl_be(addr)	in_be32(addr)</div><div class='add'>+#define __do_readq_be(addr)	in_be64(addr)</div><div class='ctx'> #endif /* !defined(CONFIG_EEH) */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC32</div><div class='hunk'>@@ -585,64 +460,185 @@ __do_out_asm(_rec_outl, "stwbrx")</div><div class='ctx'> #define __do_inw(port)		_rec_inw(port)</div><div class='ctx'> #define __do_inl(port)		_rec_inl(port)</div><div class='ctx'> #else /* CONFIG_PPC32 */</div><div class='del'>-#define __do_outb(val, port)	writeb(val,(PCI_IO_ADDR)(_IO_BASE+port));</div><div class='del'>-#define __do_outw(val, port)	writew(val,(PCI_IO_ADDR)(_IO_BASE+port));</div><div class='del'>-#define __do_outl(val, port)	writel(val,(PCI_IO_ADDR)(_IO_BASE+port));</div><div class='del'>-#define __do_inb(port)		readb((PCI_IO_ADDR)(_IO_BASE + port));</div><div class='del'>-#define __do_inw(port)		readw((PCI_IO_ADDR)(_IO_BASE + port));</div><div class='del'>-#define __do_inl(port)		readl((PCI_IO_ADDR)(_IO_BASE + port));</div><div class='add'>+#define __do_outb(val, port)	writeb(val,_IO_PORT(port));</div><div class='add'>+#define __do_outw(val, port)	writew(val,_IO_PORT(port));</div><div class='add'>+#define __do_outl(val, port)	writel(val,_IO_PORT(port));</div><div class='add'>+#define __do_inb(port)		readb(_IO_PORT(port));</div><div class='add'>+#define __do_inw(port)		readw(_IO_PORT(port));</div><div class='add'>+#define __do_inl(port)		readl(_IO_PORT(port));</div><div class='ctx'> #endif /* !CONFIG_PPC32 */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EEH</div><div class='del'>-#define __do_readsb(a, b, n)	eeh_readsb(PCI_FIX_ADDR(a), (b), (n))</div><div class='del'>-#define __do_readsw(a, b, n)	eeh_readsw(PCI_FIX_ADDR(a), (b), (n))</div><div class='del'>-#define __do_readsl(a, b, n)	eeh_readsl(PCI_FIX_ADDR(a), (b), (n))</div><div class='add'>+#define __do_readsb(a, b, n)	eeh_readsb(a, (b), (n))</div><div class='add'>+#define __do_readsw(a, b, n)	eeh_readsw(a, (b), (n))</div><div class='add'>+#define __do_readsl(a, b, n)	eeh_readsl(a, (b), (n))</div><div class='ctx'> #else /* CONFIG_EEH */</div><div class='del'>-#define __do_readsb(a, b, n)	_insb(PCI_FIX_ADDR(a), (b), (n))</div><div class='del'>-#define __do_readsw(a, b, n)	_insw(PCI_FIX_ADDR(a), (b), (n))</div><div class='del'>-#define __do_readsl(a, b, n)	_insl(PCI_FIX_ADDR(a), (b), (n))</div><div class='add'>+#define __do_readsb(a, b, n)	_insb(a, (b), (n))</div><div class='add'>+#define __do_readsw(a, b, n)	_insw(a, (b), (n))</div><div class='add'>+#define __do_readsl(a, b, n)	_insl(a, (b), (n))</div><div class='ctx'> #endif /* !CONFIG_EEH */</div><div class='del'>-#define __do_writesb(a, b, n)	_outsb(PCI_FIX_ADDR(a),(b),(n))</div><div class='del'>-#define __do_writesw(a, b, n)	_outsw(PCI_FIX_ADDR(a),(b),(n))</div><div class='del'>-#define __do_writesl(a, b, n)	_outsl(PCI_FIX_ADDR(a),(b),(n))</div><div class='del'>-</div><div class='del'>-#define __do_insb(p, b, n)	readsb((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n))</div><div class='del'>-#define __do_insw(p, b, n)	readsw((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n))</div><div class='del'>-#define __do_insl(p, b, n)	readsl((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n))</div><div class='del'>-#define __do_outsb(p, b, n)	writesb((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n))</div><div class='del'>-#define __do_outsw(p, b, n)	writesw((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n))</div><div class='del'>-#define __do_outsl(p, b, n)	writesl((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n))</div><div class='del'>-</div><div class='del'>-#define __do_memset_io(addr, c, n)	\</div><div class='del'>-				_memset_io(PCI_FIX_ADDR(addr), c, n)</div><div class='del'>-#define __do_memcpy_toio(dst, src, n)	\</div><div class='del'>-				_memcpy_toio(PCI_FIX_ADDR(dst), src, n)</div><div class='add'>+#define __do_writesb(a, b, n)	_outsb(a, (b), (n))</div><div class='add'>+#define __do_writesw(a, b, n)	_outsw(a, (b), (n))</div><div class='add'>+#define __do_writesl(a, b, n)	_outsl(a, (b), (n))</div><div class='add'>+</div><div class='add'>+#define __do_insb(p, b, n)	readsb(_IO_PORT(p), (b), (n))</div><div class='add'>+#define __do_insw(p, b, n)	readsw(_IO_PORT(p), (b), (n))</div><div class='add'>+#define __do_insl(p, b, n)	readsl(_IO_PORT(p), (b), (n))</div><div class='add'>+#define __do_outsb(p, b, n)	writesb(_IO_PORT(p),(b),(n))</div><div class='add'>+#define __do_outsw(p, b, n)	writesw(_IO_PORT(p),(b),(n))</div><div class='add'>+#define __do_outsl(p, b, n)	writesl(_IO_PORT(p),(b),(n))</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EEH</div><div class='ctx'> #define __do_memcpy_fromio(dst, src, n)	\</div><div class='del'>-				eeh_memcpy_fromio(dst, PCI_FIX_ADDR(src), n)</div><div class='add'>+				eeh_memcpy_fromio(dst, src, n)</div><div class='ctx'> #else /* CONFIG_EEH */</div><div class='ctx'> #define __do_memcpy_fromio(dst, src, n)	\</div><div class='del'>-				_memcpy_fromio(dst,PCI_FIX_ADDR(src),n)</div><div class='add'>+				_memcpy_fromio(dst, src, n)</div><div class='ctx'> #endif /* !CONFIG_EEH */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_PIO</div><div class='del'>-#define DEF_PCI_HOOK_pio(x)	x</div><div class='del'>-#else</div><div class='del'>-#define DEF_PCI_HOOK_pio(x)	NULL</div><div class='del'>-#endif</div><div class='add'>+static inline u8 readb(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readb(addr);</div><div class='add'>+}</div><div class='add'>+#define readb readb</div><div class='add'>+</div><div class='add'>+static inline u16 readw(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readw(addr);</div><div class='add'>+}</div><div class='add'>+#define readw readw</div><div class='add'>+</div><div class='add'>+static inline u32 readl(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readl(addr);</div><div class='add'>+}</div><div class='add'>+#define readl readl</div><div class='add'>+</div><div class='add'>+static inline u16 readw_be(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readw_be(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 readl_be(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readl_be(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void writeb(u8 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_8(addr, val);</div><div class='add'>+}</div><div class='add'>+#define writeb writeb</div><div class='add'>+</div><div class='add'>+static inline void writew(u16 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_le16(addr, val);</div><div class='add'>+}</div><div class='add'>+#define writew writew</div><div class='add'>+</div><div class='add'>+static inline void writel(u32 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_le32(addr, val);</div><div class='add'>+}</div><div class='add'>+#define writel writel</div><div class='add'>+</div><div class='add'>+static inline void writew_be(u16 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_be16(addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void writel_be(u32 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_be32(addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void readsb(const volatile void __iomem *a, void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_readsb(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define readsb readsb</div><div class='add'>+</div><div class='add'>+static inline void readsw(const volatile void __iomem *a, void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_readsw(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define readsw readsw</div><div class='add'>+</div><div class='add'>+static inline void readsl(const volatile void __iomem *a, void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_readsl(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define readsl readsl</div><div class='add'>+</div><div class='add'>+static inline void writesb(volatile void __iomem *a, const void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_writesb(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define writesb writesb</div><div class='add'>+</div><div class='add'>+static inline void writesw(volatile void __iomem *a, const void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_writesw(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define writesw writesw</div><div class='add'>+</div><div class='add'>+static inline void writesl(volatile void __iomem *a, const void *b, unsigned long c)</div><div class='add'>+{</div><div class='add'>+	__do_writesl(a, b, c);</div><div class='add'>+}</div><div class='add'>+#define writesl writesl</div><div class='add'>+</div><div class='add'>+static inline void memset_io(volatile void __iomem *a, int c, unsigned long n)</div><div class='add'>+{</div><div class='add'>+	_memset_io(a, c, n);</div><div class='add'>+}</div><div class='add'>+#define memset_io memset_io</div><div class='add'>+</div><div class='add'>+static inline void memcpy_fromio(void *d, const volatile void __iomem *s, unsigned long n)</div><div class='add'>+{</div><div class='add'>+	__do_memcpy_fromio(d, s, n);</div><div class='add'>+}</div><div class='add'>+#define memcpy_fromio memcpy_fromio</div><div class='add'>+</div><div class='add'>+static inline void memcpy_toio(volatile void __iomem *d, const void *s, unsigned long n)</div><div class='add'>+{</div><div class='add'>+	_memcpy_toio(d, s, n);</div><div class='add'>+}</div><div class='add'>+#define memcpy_toio memcpy_toio</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_MMIO</div><div class='del'>-#define DEF_PCI_HOOK_mem(x)	x</div><div class='add'>+#ifdef __powerpc64__</div><div class='add'>+static inline u64 readq(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readq(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 readq_be(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return __do_readq_be(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void writeq(u64 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_le64(addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void writeq_be(u64 val, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	out_be64(addr, val);</div><div class='add'>+}</div><div class='add'>+#endif /* __powerpc64__ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_INDIRECT_PIO</div><div class='add'>+#define DEF_PCI_HOOK(x)	x</div><div class='ctx'> #else</div><div class='del'>-#define DEF_PCI_HOOK_mem(x)	NULL</div><div class='add'>+#define DEF_PCI_HOOK(x)	NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Structure containing all the hooks */</div><div class='ctx'> extern struct ppc_pci_io {</div><div class='ctx'> </div><div class='del'>-#define DEF_PCI_AC_RET(name, ret, at, al, space, aa)	ret (*name) at;</div><div class='del'>-#define DEF_PCI_AC_NORET(name, at, al, space, aa)	void (*name) at;</div><div class='add'>+#define DEF_PCI_AC_RET(name, ret, at, al)	ret (*name) at;</div><div class='add'>+#define DEF_PCI_AC_NORET(name, at, al)		void (*name) at;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io-defs.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -652,18 +648,18 @@ extern struct ppc_pci_io {</div><div class='ctx'> } ppc_pci_io;</div><div class='ctx'> </div><div class='ctx'> /* The inline wrappers */</div><div class='del'>-#define DEF_PCI_AC_RET(name, ret, at, al, space, aa)		\</div><div class='add'>+#define DEF_PCI_AC_RET(name, ret, at, al)			\</div><div class='ctx'> static inline ret name at					\</div><div class='ctx'> {								\</div><div class='del'>-	if (DEF_PCI_HOOK_##space(ppc_pci_io.name) != NULL)	\</div><div class='add'>+	if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL)		\</div><div class='ctx'> 		return ppc_pci_io.name al;			\</div><div class='ctx'> 	return __do_##name al;					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define DEF_PCI_AC_NORET(name, at, al, space, aa)		\</div><div class='add'>+#define DEF_PCI_AC_NORET(name, at, al)		\</div><div class='ctx'> static inline void name at					\</div><div class='ctx'> {								\</div><div class='del'>-	if (DEF_PCI_HOOK_##space(ppc_pci_io.name) != NULL)		\</div><div class='add'>+	if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL)		\</div><div class='ctx'> 		ppc_pci_io.name al;				\</div><div class='ctx'> 	else							\</div><div class='ctx'> 		__do_##name al;					\</div><div class='hunk'>@@ -674,21 +670,7 @@ static inline void name at					\</div><div class='ctx'> #undef DEF_PCI_AC_RET</div><div class='ctx'> #undef DEF_PCI_AC_NORET</div><div class='ctx'> </div><div class='del'>-/* Some drivers check for the presence of readq &amp; writeq with</div><div class='del'>- * a #ifdef, so we make them happy here.</div><div class='del'>- */</div><div class='del'>-#define readb readb</div><div class='del'>-#define readw readw</div><div class='del'>-#define readl readl</div><div class='del'>-#define writeb writeb</div><div class='del'>-#define writew writew</div><div class='del'>-#define writel writel</div><div class='del'>-#define readsb readsb</div><div class='del'>-#define readsw readsw</div><div class='del'>-#define readsl readsl</div><div class='del'>-#define writesb writesb</div><div class='del'>-#define writesw writesw</div><div class='del'>-#define writesl writesl</div><div class='add'>+// Signal to asm-generic/io.h that we have implemented these.</div><div class='ctx'> #define inb inb</div><div class='ctx'> #define inw inw</div><div class='ctx'> #define inl inl</div><div class='hunk'>@@ -705,9 +687,6 @@ static inline void name at					\</div><div class='ctx'> #define readq	readq</div><div class='ctx'> #define writeq	writeq</div><div class='ctx'> #endif</div><div class='del'>-#define memset_io memset_io</div><div class='del'>-#define memcpy_fromio memcpy_fromio</div><div class='del'>-#define memcpy_toio memcpy_toio</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We don't do relaxed operations yet, at least not with this semantic</div><div class='hunk'>@@ -738,35 +717,11 @@ static inline unsigned int ioread32be(const void __iomem *addr)</div><div class='ctx'> #define ioread32be ioread32be</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='del'>-static inline u64 ioread64_lo_hi(const void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readq(addr);</div><div class='del'>-}</div><div class='del'>-#define ioread64_lo_hi ioread64_lo_hi</div><div class='del'>-</div><div class='del'>-static inline u64 ioread64_hi_lo(const void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readq(addr);</div><div class='del'>-}</div><div class='del'>-#define ioread64_hi_lo ioread64_hi_lo</div><div class='del'>-</div><div class='ctx'> static inline u64 ioread64be(const void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	return readq_be(addr);</div><div class='ctx'> }</div><div class='ctx'> #define ioread64be ioread64be</div><div class='del'>-</div><div class='del'>-static inline u64 ioread64be_lo_hi(const void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readq_be(addr);</div><div class='del'>-}</div><div class='del'>-#define ioread64be_lo_hi ioread64be_lo_hi</div><div class='del'>-</div><div class='del'>-static inline u64 ioread64be_hi_lo(const void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readq_be(addr);</div><div class='del'>-}</div><div class='del'>-#define ioread64be_hi_lo ioread64be_hi_lo</div><div class='ctx'> #endif /* __powerpc64__ */</div><div class='ctx'> </div><div class='ctx'> static inline void iowrite16be(u16 val, void __iomem *addr)</div><div class='hunk'>@@ -782,35 +737,11 @@ static inline void iowrite32be(u32 val, void __iomem *addr)</div><div class='ctx'> #define iowrite32be iowrite32be</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='del'>-static inline void iowrite64_lo_hi(u64 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writeq(val, addr);</div><div class='del'>-}</div><div class='del'>-#define iowrite64_lo_hi iowrite64_lo_hi</div><div class='del'>-</div><div class='del'>-static inline void iowrite64_hi_lo(u64 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writeq(val, addr);</div><div class='del'>-}</div><div class='del'>-#define iowrite64_hi_lo iowrite64_hi_lo</div><div class='del'>-</div><div class='ctx'> static inline void iowrite64be(u64 val, void __iomem *addr)</div><div class='ctx'> {</div><div class='ctx'> 	writeq_be(val, addr);</div><div class='ctx'> }</div><div class='ctx'> #define iowrite64be iowrite64be</div><div class='del'>-</div><div class='del'>-static inline void iowrite64be_lo_hi(u64 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writeq_be(val, addr);</div><div class='del'>-}</div><div class='del'>-#define iowrite64be_lo_hi iowrite64be_lo_hi</div><div class='del'>-</div><div class='del'>-static inline void iowrite64be_hi_lo(u64 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writeq_be(val, addr);</div><div class='del'>-}</div><div class='del'>-#define iowrite64be_hi_lo iowrite64be_hi_lo</div><div class='ctx'> #endif /* __powerpc64__ */</div><div class='ctx'> </div><div class='ctx'> struct pci_dev;</div><div class='hunk'>@@ -895,7 +826,7 @@ void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);</div><div class='ctx'> </div><div class='ctx'> void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);</div><div class='ctx'> #define ioremap_cache(addr, size) \</div><div class='del'>-	ioremap_prot((addr), (size), pgprot_val(PAGE_KERNEL))</div><div class='add'>+	ioremap_prot((addr), (size), PAGE_KERNEL)</div><div class='ctx'> </div><div class='ctx'> #define iounmap iounmap</div><div class='ctx'> </div><div class='hunk'>@@ -970,18 +901,6 @@ static inline void * phys_to_virt(unsigned long address)</div><div class='ctx'> #define phys_to_virt phys_to_virt</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Change "struct page" to physical address.</div><div class='del'>- */</div><div class='del'>-static inline phys_addr_t page_to_phys(struct page *page)</div><div class='del'>-{</div><div class='del'>-	unsigned long pfn = page_to_pfn(page);</div><div class='del'>-</div><div class='del'>-	WARN_ON(IS_ENABLED(CONFIG_DEBUG_VIRTUAL) &amp;&amp; !pfn_valid(pfn));</div><div class='del'>-</div><div class='del'>-	return PFN_PHYS(pfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * 32 bits still uses virt_to_bus() for its implementation of DMA</div><div class='ctx'>  * mappings se we have to keep it defined here. We also have some old</div><div class='ctx'>  * drivers (shame shame shame) that use bus_to_virt() and haven't been</div><div class='hunk'>@@ -1042,6 +961,14 @@ static inline void * bus_to_virt(unsigned long address)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef __powerpc64__</div><div class='add'>+static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	__raw_writeq((__force unsigned long)cpu_to_be64(v), addr);</div><div class='add'>+}</div><div class='add'>+#define __raw_writeq_be __raw_writeq_be</div><div class='add'>+#endif // __powerpc64__</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_IO_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h<br/>index 04072b5f8962..b410021ad4c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/iommu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/iommu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/iommu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/iommu.h</a></div><div class='hunk'>@@ -317,12 +317,6 @@ extern void iommu_flush_tce(struct iommu_table *tbl);</div><div class='ctx'> extern enum dma_data_direction iommu_tce_direction(unsigned long tce);</div><div class='ctx'> extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_CELL_NATIVE</div><div class='del'>-extern bool iommu_fixed_is_weak;</div><div class='del'>-#else</div><div class='del'>-#define iommu_fixed_is_weak false</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> extern const struct dma_map_ops dma_iommu_ops;</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/irqflags.h b/arch/powerpc/include/asm/irqflags.h<br/>index 47d46712928a..1351fb40fe74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/irqflags.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/irqflags.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/irqflags.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/irqflags.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef _ASM_IRQFLAGS_H</div><div class='ctx'> #define _ASM_IRQFLAGS_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * Get definitions for arch_local_save_flags(x), etc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/powerpc/include/asm/jump_label.h b/arch/powerpc/include/asm/jump_label.h<br/>index 2f2a86ed2280..d4eaba459a0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/jump_label.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/jump_label.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/jump_label.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/jump_label.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * Copyright 2010 Michael Ellerman, IBM Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/feature-fixups.h&gt;</div><div class='head'>diff --git a/arch/powerpc/include/asm/kasan.h b/arch/powerpc/include/asm/kasan.h<br/>index b5bbb94c51f6..045804a86f98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kasan.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kasan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kasan.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kasan.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #define EXPORT_SYMBOL_KASAN(fn)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -53,18 +53,6 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KASAN</div><div class='del'>-#ifdef CONFIG_PPC_BOOK3S_64</div><div class='del'>-DECLARE_STATIC_KEY_FALSE(powerpc_kasan_enabled_key);</div><div class='del'>-</div><div class='del'>-static __always_inline bool kasan_arch_is_ready(void)</div><div class='del'>-{</div><div class='del'>-	if (static_branch_likely(&amp;powerpc_kasan_enabled_key))</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define kasan_arch_is_ready kasan_arch_is_ready</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> void kasan_early_init(void);</div><div class='ctx'> void kasan_mmu_init(void);</div><div class='hunk'>@@ -80,5 +68,5 @@ void kasan_update_early_region(unsigned long k_start, unsigned long k_end, pte_t</div><div class='ctx'> int kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end);</div><div class='ctx'> int kasan_init_region(void *start, size_t size);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/kdump.h b/arch/powerpc/include/asm/kdump.h<br/>index fd128d1e52b3..802644178f43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kdump.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kdump.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kdump.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kdump.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_CRASH_DUMP */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CRASH_DUMP) &amp;&amp; !defined(CONFIG_NONSTATIC_KERNEL)</div><div class='ctx'> extern void reserve_kdump_trampoline(void);</div><div class='hunk'>@@ -42,6 +42,6 @@ static inline void reserve_kdump_trampoline(void) { ; }</div><div class='ctx'> static inline void setup_kdump_trampoline(void) { ; }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __PPC64_KDUMP_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h<br/>index 270ee93a0f7d..4bbf9f699aaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kexec.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kexec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kexec.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kexec.h</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> #define KEXEC_STATE_IRQS_OFF 1</div><div class='ctx'> #define KEXEC_STATE_REAL_MODE 2</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> </div><div class='ctx'> typedef void (*crash_shutdown_t)(void);</div><div class='hunk'>@@ -61,7 +61,6 @@ struct pt_regs;</div><div class='ctx'> extern void kexec_smp_wait(void);	/* get and clear naca physid, wait for</div><div class='ctx'> 					  master to copy new code to 0 */</div><div class='ctx'> extern void default_machine_kexec(struct kimage *image);</div><div class='del'>-extern void machine_kexec_mask_interrupts(void);</div><div class='ctx'> </div><div class='ctx'> void relocate_new_kernel(unsigned long indirection_page, unsigned long reboot_code_buffer,</div><div class='ctx'> 			 unsigned long start_address) __noreturn;</div><div class='hunk'>@@ -95,8 +94,10 @@ int arch_kexec_kernel_image_probe(struct kimage *image, void *buf, unsigned long</div><div class='ctx'> int arch_kimage_file_post_load_cleanup(struct kimage *image);</div><div class='ctx'> #define arch_kimage_file_post_load_cleanup arch_kimage_file_post_load_cleanup</div><div class='ctx'> </div><div class='del'>-int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf);</div><div class='del'>-#define arch_kexec_locate_mem_hole arch_kexec_locate_mem_hole</div><div class='add'>+int arch_check_excluded_range(struct kimage *image, unsigned long start,</div><div class='add'>+			      unsigned long end);</div><div class='add'>+#define arch_check_excluded_range  arch_check_excluded_range</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> int load_crashdump_segments_ppc64(struct kimage *image,</div><div class='ctx'> 				  struct kexec_buf *kbuf);</div><div class='hunk'>@@ -113,9 +114,9 @@ int setup_new_fdt_ppc64(const struct kimage *image, void *fdt, struct crash_mem</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_RESERVE</div><div class='ctx'> int __init overlaps_crashkernel(unsigned long start, unsigned long size);</div><div class='del'>-extern void reserve_crashkernel(void);</div><div class='add'>+extern void arch_reserve_crashkernel(void);</div><div class='ctx'> #else</div><div class='del'>-static inline void reserve_crashkernel(void) {}</div><div class='add'>+static inline void arch_reserve_crashkernel(void) {}</div><div class='ctx'> static inline int overlaps_crashkernel(unsigned long start, unsigned long size) { return 0; }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -209,6 +210,6 @@ static inline void reset_sprs(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* ! __ASSEMBLY__ */</div><div class='add'>+#endif /* ! __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_KEXEC_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kfence.h b/arch/powerpc/include/asm/kfence.h<br/>index fab124ada1c7..1f7cab58ab2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kfence.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kfence.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kfence.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kfence.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #define ARCH_FUNC_PREFIX "."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KFENCE</div><div class='add'>+extern bool kfence_early_init;</div><div class='ctx'> extern bool kfence_disabled;</div><div class='ctx'> </div><div class='ctx'> static inline void disable_kfence(void)</div><div class='hunk'>@@ -27,7 +27,11 @@ static inline bool arch_kfence_init_pool(void)</div><div class='ctx'> {</div><div class='ctx'> 	return !kfence_disabled;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+static inline bool kfence_early_init_enabled(void)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_KFENCE) &amp;&amp; kfence_early_init;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> static inline bool kfence_protect_page(unsigned long addr, bool protect)</div><div class='head'>diff --git a/arch/powerpc/include/asm/kgdb.h b/arch/powerpc/include/asm/kgdb.h<br/>index 715c18b75334..f39531903325 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kgdb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kgdb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kgdb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kgdb.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #ifndef __POWERPC_KGDB_H__</div><div class='ctx'> #define __POWERPC_KGDB_H__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define BREAK_INSTR_SIZE	4</div><div class='ctx'> #define BUFMAX			((NUMREGBYTES * 2) + 512)</div><div class='hunk'>@@ -62,6 +62,6 @@ static inline void arch_kgdb_breakpoint(void)</div><div class='ctx'> /* CR/LR, R1, R2, R13-R31 inclusive. */</div><div class='ctx'> #define NUMCRITREGBYTES		(23 * sizeof(int))</div><div class='ctx'> #endif /* 32/64 */</div><div class='del'>-#endif /* !(__ASSEMBLY__) */</div><div class='add'>+#endif /* !(__ASSEMBLER__) */</div><div class='ctx'> #endif /* !__POWERPC_KGDB_H__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kprobes.h b/arch/powerpc/include/asm/kprobes.h<br/>index 4525a9c68260..dfe2e5ad3b21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kprobes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kprobes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kprobes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kprobes.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/probes.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KPROBES</div><div class='ctx'> #define  __ARCH_WANT_KPROBES_INSN_SLOT</div><div class='head'>diff --git a/arch/powerpc/include/asm/kup.h b/arch/powerpc/include/asm/kup.h<br/>index 2bb03d941e3e..dab63b82a8d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kup.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #define KUAP_WRITE	2</div><div class='ctx'> #define KUAP_READ_WRITE	(KUAP_READ | KUAP_WRITE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __always_inline bool kuap_is_disabled(void);</div><div class='hunk'>@@ -28,14 +28,14 @@ static __always_inline bool kuap_is_disabled(void);</div><div class='ctx'> #include &lt;asm/book3s/32/kup.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #ifndef CONFIG_PPC_KUAP</div><div class='ctx'> .macro kuap_check_amr	gpr1, gpr2</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> extern bool disable_kuep;</div><div class='ctx'> extern bool disable_kuap;</div><div class='hunk'>@@ -181,6 +181,6 @@ static __always_inline void prevent_current_write_to_user(void)</div><div class='ctx'> 	prevent_user_access(KUAP_WRITE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_KUAP_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h<br/>index d68d71987d5c..f9af8df09077 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_asm.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #ifndef __POWERPC_KVM_ASM_H__</div><div class='ctx'> #define __POWERPC_KVM_ASM_H__</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> #define PPC_STD(sreg, offset, areg)  std sreg, (offset)(areg)</div><div class='ctx'> #define PPC_LD(treg, offset, areg)   ld treg, (offset)(areg)</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h<br/>index 10618622d7ef..e1ff291ba891 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_book3s.h</a></div><div class='hunk'>@@ -203,7 +203,7 @@ extern bool kvmppc_hv_handle_set_rc(struct kvm *kvm, bool nested,</div><div class='ctx'> extern int kvmppc_book3s_instantiate_page(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				unsigned long gpa,</div><div class='ctx'> 				struct kvm_memory_slot *memslot,</div><div class='del'>-				bool writing, bool kvm_ro,</div><div class='add'>+				bool writing,</div><div class='ctx'> 				pte_t *inserted_pte, unsigned int *levelp);</div><div class='ctx'> extern int kvmppc_init_vm_radix(struct kvm *kvm);</div><div class='ctx'> extern void kvmppc_free_radix(struct kvm *kvm);</div><div class='hunk'>@@ -235,7 +235,7 @@ extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,</div><div class='ctx'> extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);</div><div class='ctx'> extern int kvmppc_emulate_paired_single(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='del'>-			bool writing, bool *writable);</div><div class='add'>+			bool writing, bool *writable, struct page **page);</div><div class='ctx'> extern void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev,</div><div class='ctx'> 			unsigned long *rmap, long pte_index, int realmode);</div><div class='ctx'> extern void kvmppc_update_dirty_map(const struct kvm_memory_slot *memslot,</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h<br/>index 2ef9a5f4e5d1..b936e174eefd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s_64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s_64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s_64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_book3s_64.h</a></div><div class='hunk'>@@ -684,10 +684,16 @@ int kvmhv_nestedv2_set_ptbl_entry(unsigned long lpid, u64 dw0, u64 dw1);</div><div class='ctx'> int kvmhv_nestedv2_parse_output(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvmhv_nestedv2_set_vpa(struct kvm_vcpu *vcpu, unsigned long vpa);</div><div class='ctx'> </div><div class='del'>-int kmvhv_counters_tracepoint_regfunc(void);</div><div class='del'>-void kmvhv_counters_tracepoint_unregfunc(void);</div><div class='add'>+int kvmhv_counters_tracepoint_regfunc(void);</div><div class='add'>+void kvmhv_counters_tracepoint_unregfunc(void);</div><div class='ctx'> int kvmhv_get_l2_counters_status(void);</div><div class='ctx'> void kvmhv_set_l2_counters_status(int cpu, bool status);</div><div class='add'>+u64 kvmhv_get_l1_to_l2_cs_time(void);</div><div class='add'>+u64 kvmhv_get_l2_to_l1_cs_time(void);</div><div class='add'>+u64 kvmhv_get_l2_runtime_agg(void);</div><div class='add'>+u64 kvmhv_get_l1_to_l2_cs_time_vcpu(void);</div><div class='add'>+u64 kvmhv_get_l2_to_l1_cs_time_vcpu(void);</div><div class='add'>+u64 kvmhv_get_l2_runtime_agg_vcpu(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h<br/>index a36797938620..3435fe144908 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s_asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_book3s_asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_book3s_asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_book3s_asm.h</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> /* Maximum number of subcores per physical core */</div><div class='ctx'> #define MAX_SUBCORES		4</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_HANDLER</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +58,7 @@ kvmppc_resume_\intno:</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_HANDLER */</div><div class='ctx'> </div><div class='del'>-#else  /*__ASSEMBLY__ */</div><div class='add'>+#else  /*__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> struct kvmppc_vcore;</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +150,7 @@ struct kvmppc_book3s_shadow_vcpu {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /*__ASSEMBLY__ */</div><div class='add'>+#endif /*__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Values for kvm_state */</div><div class='ctx'> #define KVM_HWTHREAD_IN_KERNEL	0</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h b/arch/powerpc/include/asm/kvm_booke_hv_asm.h<br/>index 7487ef582121..3acf2995d364 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_booke_hv_asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_booke_hv_asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_booke_hv_asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_booke_hv_asm.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/feature-fixups.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * All exceptions from guest state must go through KVM</div><div class='hunk'>@@ -64,5 +64,5 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)</div><div class='ctx'> #endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /*__ASSEMBLY__ */</div><div class='add'>+#endif /*__ASSEMBLER__ */</div><div class='ctx'> #endif /* ASM_KVM_BOOKE_HV_ASM_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h<br/>index 37e581c5b201..2d139c807577 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_host.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_host.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -871,6 +871,11 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	struct kvmhv_tb_accumulator cede_time;	/* time napping inside guest */</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */</div><div class='add'>+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE</div><div class='add'>+	u64 l1_to_l2_cs;</div><div class='add'>+	u64 l2_to_l1_cs;</div><div class='add'>+	u64 l2_runtime_agg;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define VCPU_FPR(vcpu, i)	(vcpu)-&gt;arch.fp.fpr[i][TS_FPROFFSET]</div><div class='hunk'>@@ -897,7 +902,6 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #define __KVM_HAVE_ARCH_WQP</div><div class='ctx'> #define __KVM_HAVE_CREATE_DEVICE</div><div class='ctx'> </div><div class='del'>-static inline void kvm_arch_sync_events(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}</div><div class='ctx'> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}</div><div class='ctx'> static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h<br/>index ca3829d47ab7..0953f2daa466 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_ppc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/kvm_ppc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_ppc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_ppc.h</a></div><div class='hunk'>@@ -939,9 +939,9 @@ static inline void kvmppc_mmu_flush_icache(kvm_pfn_t pfn)</div><div class='ctx'> </div><div class='ctx'> 	/* Clear i-cache for new pages */</div><div class='ctx'> 	folio = page_folio(pfn_to_page(pfn));</div><div class='del'>-	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags)) {</div><div class='add'>+	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f)) {</div><div class='ctx'> 		flush_dcache_icache_folio(folio);</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_types.h b/arch/powerpc/include/asm/kvm_types.h<br/>new file mode 100644<br/>index 000000000000..5d4bffea7d47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/kvm_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/kvm_types.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_PPC_KVM_TYPES_H</div><div class='add'>+#define _ASM_PPC_KVM_TYPES_H</div><div class='add'>+</div><div class='add'>+#if IS_MODULE(CONFIG_KVM_BOOK3S_64_PR) &amp;&amp; IS_MODULE(CONFIG_KVM_BOOK3S_64_HV)</div><div class='add'>+#define KVM_SUB_MODULES kvm-pr,kvm-hv</div><div class='add'>+#elif IS_MODULE(CONFIG_KVM_BOOK3S_64_PR)</div><div class='add'>+#define KVM_SUB_MODULES kvm-pr</div><div class='add'>+#elif IS_MODULE(CONFIG_KVM_BOOK3S_64_HV)</div><div class='add'>+#define KVM_SUB_MODULES kvm-hv</div><div class='add'>+#else</div><div class='add'>+#undef KVM_SUB_MODULES</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/lv1call.h b/arch/powerpc/include/asm/lv1call.h<br/>index b11501b30193..ae70120953a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/lv1call.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/lv1call.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/lv1call.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/lv1call.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #if !defined(_ASM_POWERPC_LV1CALL_H)</div><div class='ctx'> #define _ASM_POWERPC_LV1CALL_H</div><div class='ctx'> </div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='add'>+#if !defined(__ASSEMBLER__)</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'>     {return _lv1_##name(LV1_##in##_IN_##out##_OUT_ARGS);}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(__ASSEMBLY__) */</div><div class='add'>+#endif /* !defined(__ASSEMBLER__) */</div><div class='ctx'> </div><div class='ctx'> /* lv1 call table */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h<br/>index 1862f94335ee..3298eec123a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/machdep.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/machdep.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/machdep.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/machdep.h</a></div><div class='hunk'>@@ -4,20 +4,24 @@</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/time64.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct pt_regs;</div><div class='ctx'> struct pci_bus;</div><div class='add'>+struct device;</div><div class='ctx'> struct device_node;</div><div class='ctx'> struct iommu_table;</div><div class='ctx'> struct rtc_time;</div><div class='ctx'> struct file;</div><div class='add'>+struct pci_dev;</div><div class='ctx'> struct pci_controller;</div><div class='ctx'> struct kimage;</div><div class='ctx'> struct pci_host_bridge;</div><div class='add'>+struct seq_file;</div><div class='ctx'> </div><div class='ctx'> struct machdep_calls {</div><div class='ctx'> 	const char	*name;</div><div class='head'>diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h<br/>index 42a51a993d94..912f78a956a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mman.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mman.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/mman.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,</div><div class='add'>+static inline vm_flags_t arch_calc_vm_prot_bits(unsigned long prot,</div><div class='ctx'> 		unsigned long pkey)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_PPC_MEM_KEYS</div><div class='head'>diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h<br/>index 4182d68d9cd1..5f9c5d436e17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mmu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mmu.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/mmu.h</a></div><div class='hunk'>@@ -137,7 +137,7 @@</div><div class='ctx'> 				MMU_FTR_CI_LARGE_PAGE</div><div class='ctx'> #define MMU_FTRS_PA6T		MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \</div><div class='ctx'> 				MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -332,7 +332,7 @@ static inline bool strict_module_rwx_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	return IS_ENABLED(CONFIG_STRICT_MODULE_RWX) &amp;&amp; strict_kernel_rwx_enabled();</div><div class='ctx'> }</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* The kernel use the constants below to index in the page sizes array.</div><div class='ctx'>  * The use of fixed constants for this purpose is better for performances</div><div class='hunk'>@@ -377,7 +377,7 @@ static inline bool strict_module_rwx_enabled(void)</div><div class='ctx'> #include &lt;asm/book3s/64/mmu.h&gt;</div><div class='ctx'> #else /* CONFIG_PPC_BOOK3S_64 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* MMU initialization */</div><div class='ctx'> extern void early_init_mmu(void);</div><div class='ctx'> extern void early_init_mmu_secondary(void);</div><div class='hunk'>@@ -388,7 +388,7 @@ static inline void mmu_early_init_devtree(void) { }</div><div class='ctx'> static inline void pkey_early_init_devtree(void) {}</div><div class='ctx'> </div><div class='ctx'> extern void *abatron_pteptrs[2];</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PPC_BOOK3S_32)</div><div class='head'>diff --git a/arch/powerpc/include/asm/mmzone.h b/arch/powerpc/include/asm/mmzone.h<br/>index d99863cd6cde..049152f8d597 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mmzone.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mmzone.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mmzone.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/mmzone.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@ extern cpumask_var_t node_to_cpumask_map[];</div><div class='ctx'> #ifdef CONFIG_MEMORY_HOTPLUG</div><div class='ctx'> extern unsigned long max_pfn;</div><div class='ctx'> u64 memory_hotplug_max(void);</div><div class='add'>+u64 hot_add_drconf_memory_max(void);</div><div class='ctx'> #else</div><div class='ctx'> #define memory_hotplug_max() memblock_end_of_DRAM()</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h<br/>index 300c777cc307..864e22deaa2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/module.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/module.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/module.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/module.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@ struct ppc_plt_entry {</div><div class='ctx'> struct mod_arch_specific {</div><div class='ctx'> #ifdef __powerpc64__</div><div class='ctx'> 	unsigned int stubs_section;	/* Index of stubs section in module */</div><div class='add'>+	unsigned int stub_count;	/* Number of stubs used */</div><div class='ctx'> #ifdef CONFIG_PPC_KERNEL_PCREL</div><div class='ctx'> 	unsigned int got_section;	/* What section is the GOT? */</div><div class='ctx'> 	unsigned int pcpu_section;	/* .data..percpu section */</div><div class='hunk'>@@ -35,9 +36,11 @@ struct mod_arch_specific {</div><div class='ctx'> 	bool toc_fixed;			/* Have we fixed up .TOC.? */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC64_ELF_ABI_V1</div><div class='ctx'> 	/* For module function descriptor dereference */</div><div class='ctx'> 	unsigned long start_opd;</div><div class='ctx'> 	unsigned long end_opd;</div><div class='add'>+#endif</div><div class='ctx'> #else /* powerpc64 */</div><div class='ctx'> 	/* Indices of PLT sections within module. */</div><div class='ctx'> 	unsigned int core_plt_section;</div><div class='hunk'>@@ -47,6 +50,11 @@ struct mod_arch_specific {</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE</div><div class='ctx'> 	unsigned long tramp;</div><div class='ctx'> 	unsigned long tramp_regs;</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	struct ftrace_ool_stub *ool_stubs;</div><div class='add'>+	unsigned int ool_stub_count;</div><div class='add'>+	unsigned int ool_stub_index;</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h<br/>index 01ae6c351e50..d7ffbd06797d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mpc52xx.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/mpc52xx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/mpc52xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/mpc52xx.h</a></div><div class='hunk'>@@ -13,10 +13,10 @@</div><div class='ctx'> #ifndef __ASM_POWERPC_MPC52xx_H__</div><div class='ctx'> #define __ASM_POWERPC_MPC52xx_H__</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/mpc5xxx.h&gt;</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> /* Structures mapping of some unit register set                             */</div><div class='ctx'> /* ======================================================================== */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Memory Mapping Control */</div><div class='ctx'> struct mpc52xx_mmap_ctl {</div><div class='hunk'>@@ -258,14 +258,14 @@ struct mpc52xx_intr {</div><div class='ctx'> 	u32 per_error;		/* INTR + 0x38 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* ========================================================================= */</div><div class='ctx'> /* Prototypes for MPC52xx sysdev                                             */</div><div class='ctx'> /* ========================================================================= */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct device_node;</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +297,7 @@ extern void __init mpc52xx_setup_pci(void);</div><div class='ctx'> static inline void mpc52xx_setup_pci(void) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> struct mpc52xx_suspend {</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/32/kup-8xx.h b/arch/powerpc/include/asm/nohash/32/kup-8xx.h<br/>index 46bc5925e5fd..08486b15b207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/kup-8xx.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/kup-8xx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/kup-8xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/32/kup-8xx.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_KUAP</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -82,7 +82,7 @@ __bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write)</div><div class='ctx'> 	return !((regs-&gt;kuap ^ MD_APG_KUAP) &amp; 0xff000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PPC_KUAP */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/32/mmu-44x.h b/arch/powerpc/include/asm/nohash/32/mmu-44x.h<br/>index 2d92a39d8f2e..c3d192194324 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/mmu-44x.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/mmu-44x.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/mmu-44x.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/32/mmu-44x.h</a></div><div class='hunk'>@@ -100,7 +100,7 @@</div><div class='ctx'> #define PPC47x_TLB2_S_RW	(PPC47x_TLB2_SW | PPC47x_TLB2_SR)</div><div class='ctx'> #define PPC47x_TLB2_IMG		(PPC47x_TLB2_I | PPC47x_TLB2_M | PPC47x_TLB2_G)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern unsigned int tlb_44x_hwater;</div><div class='ctx'> extern unsigned int tlb_44x_index;</div><div class='hunk'>@@ -114,7 +114,7 @@ typedef struct {</div><div class='ctx'> /* patch sites */</div><div class='ctx'> extern s32 patch__tlb_44x_hwater_D, patch__tlb_44x_hwater_I;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_PPC_EARLY_DEBUG_44x</div><div class='ctx'> #define PPC44x_EARLY_TLBS	1</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/32/mmu-8xx.h b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h<br/>index 2986f9ba40b8..f19115db8072 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/mmu-8xx.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/mmu-8xx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/mmu-8xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/32/mmu-8xx.h</a></div><div class='hunk'>@@ -174,7 +174,7 @@</div><div class='ctx'> #define MODULES_SIZE	(CONFIG_MODULES_SIZE * SZ_1M)</div><div class='ctx'> #define MODULES_VADDR	(MODULES_END - MODULES_SIZE)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mmdebug.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -265,6 +265,6 @@ static inline int arch_vmap_pte_supported_shift(unsigned long size)</div><div class='ctx'> extern s32 patch__itlbmiss_exit_1, patch__dtlbmiss_exit_1;</div><div class='ctx'> extern s32 patch__itlbmiss_perf, patch__dtlbmiss_perf;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_MMU_8XX_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h<br/>index b481738c4bb5..2d71e4b7cd09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/32/pgtable.h</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable-nopmd.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;			/* For sub-arch specific PPC_PIN_SIZE */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define PTE_INDEX_SIZE	PTE_SHIFT</div><div class='ctx'> #define PMD_INDEX_SIZE	0</div><div class='hunk'>@@ -19,14 +19,14 @@</div><div class='ctx'> #define PMD_CACHE_INDEX	PMD_INDEX_SIZE</div><div class='ctx'> #define PUD_CACHE_INDEX	PUD_INDEX_SIZE</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define PTE_TABLE_SIZE	(sizeof(pte_t) &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PMD_TABLE_SIZE	0</div><div class='ctx'> #define PUD_TABLE_SIZE	0</div><div class='ctx'> #define PGD_TABLE_SIZE	(sizeof(pgd_t) &lt;&lt; PGD_INDEX_SIZE)</div><div class='ctx'> </div><div class='ctx'> #define PMD_MASKED_BITS (PTE_TABLE_SIZE - 1)</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define PTRS_PER_PTE	(1 &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PTRS_PER_PGD	(1 &lt;&lt; PGD_INDEX_SIZE)</div><div class='hunk'>@@ -149,7 +149,7 @@</div><div class='ctx'> #define MAX_POSSIBLE_PHYSMEM_BITS 32</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define pmd_none(pmd)		(!pmd_val(pmd))</div><div class='ctx'> #define	pmd_bad(pmd)		(pmd_val(pmd) &amp; _PMD_BAD)</div><div class='hunk'>@@ -199,6 +199,6 @@ static inline void pmd_clear(pmd_t *pmdp)</div><div class='ctx'> /* We borrow LSB 2 to store the exclusive marker in swap PTEs. */</div><div class='ctx'> #define _PAGE_SWP_EXCLUSIVE	0x000004</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_POWERPC_NOHASH_32_PGTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h<br/>index 54ebb91dbdcf..e2ea8ba9f8ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/pte-8xx.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/32/pte-8xx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/32/pte-8xx.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/32/pte-8xx.h</a></div><div class='hunk'>@@ -83,7 +83,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable-masks.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> static inline pte_t pte_wrprotect(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return __pte(pte_val(pte) | _PAGE_RO);</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-4k.h b/arch/powerpc/include/asm/nohash/64/pgtable-4k.h<br/>index 10f5cf444d72..fb6fa1d4e074 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/64/pgtable-4k.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/64/pgtable-4k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/64/pgtable-4k.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/64/pgtable-4k.h</a></div><div class='hunk'>@@ -14,12 +14,12 @@</div><div class='ctx'> #define PUD_INDEX_SIZE  9</div><div class='ctx'> #define PGD_INDEX_SIZE  9</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define PTE_TABLE_SIZE	(sizeof(pte_t) &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PMD_TABLE_SIZE	(sizeof(pmd_t) &lt;&lt; PMD_INDEX_SIZE)</div><div class='ctx'> #define PUD_TABLE_SIZE	(sizeof(pud_t) &lt;&lt; PUD_INDEX_SIZE)</div><div class='ctx'> #define PGD_TABLE_SIZE	(sizeof(pgd_t) &lt;&lt; PGD_INDEX_SIZE)</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define PTRS_PER_PTE	(1 &lt;&lt; PTE_INDEX_SIZE)</div><div class='ctx'> #define PTRS_PER_PMD	(1 &lt;&lt; PMD_INDEX_SIZE)</div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> #define p4d_bad(p4d)		(p4d_val(p4d) == 0)</div><div class='ctx'> #define p4d_present(p4d)	(p4d_val(p4d) != 0)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline pud_t *p4d_pgtable(p4d_t p4d)</div><div class='ctx'> {</div><div class='hunk'>@@ -80,7 +80,7 @@ static inline p4d_t pte_p4d(pte_t pte)</div><div class='ctx'> }</div><div class='ctx'> extern struct page *p4d_page(p4d_t p4d);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define pud_ERROR(e) \</div><div class='ctx'> 	pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h<br/>index 2202c78730e8..2deb955b7bc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/64/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/64/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/64/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/64/pgtable.h</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> </div><div class='ctx'> #define H_PAGE_4K_PFN 0</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* pte_clear moved to later in this file */</div><div class='ctx'> </div><div class='ctx'> #define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)</div><div class='hunk'>@@ -209,6 +209,6 @@ void __patch_exception(int exc, unsigned long addr);</div><div class='ctx'> 	__patch_exception((exc), (unsigned long)&amp;name); \</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/kup-booke.h b/arch/powerpc/include/asm/nohash/kup-booke.h<br/>index 0c7c3258134c..d6bbb6d78bbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/kup-booke.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/kup-booke.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/kup-booke.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/kup-booke.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_KUAP</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro kuap_check_amr	gpr1, gpr2</div><div class='ctx'> .endm</div><div class='hunk'>@@ -105,7 +105,7 @@ __bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write)</div><div class='ctx'> 	return !regs-&gt;kuap;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PPC_KUAP */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/mmu-e500.h b/arch/powerpc/include/asm/nohash/mmu-e500.h<br/>index b281d9eeaf1e..2fad5ff426a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/mmu-e500.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/mmu-e500.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/mmu-e500.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/mmu-e500.h</a></div><div class='hunk'>@@ -230,7 +230,7 @@</div><div class='ctx'> #define MAS2_M_IF_NEEDED	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/bug.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern unsigned int tlbcam_index;</div><div class='hunk'>@@ -318,6 +318,6 @@ extern int book3e_htw_mode;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='ctx'> DECLARE_PER_CPU(int, next_tlbcam_idx);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/pgalloc.h b/arch/powerpc/include/asm/nohash/pgalloc.h<br/>index bb5f3e8ea912..4ef780b291bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pgalloc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pgalloc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/pgalloc.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> 	pgd_t *pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),</div><div class='ctx'> 			pgtable_gfp_flags(mm, GFP_KERNEL));</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_BOOK3S_603)</div><div class='add'>+#ifdef CONFIG_PPC_8xx</div><div class='ctx'> 	memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD,</div><div class='ctx'> 	       (MAX_PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/include/asm/nohash/pgtable.h<br/>index 8d1f0b7062eb..5af168b7f292 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/pgtable.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_NOHASH_PGTABLE_H</div><div class='ctx'> #define _ASM_POWERPC_NOHASH_PGTABLE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, pte_t *p,</div><div class='ctx'> 				     unsigned long clr, unsigned long set, int huge);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -27,7 +27,7 @@ static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, p</div><div class='ctx'> #define PAGE_KERNEL_RO	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)</div><div class='ctx'> #define PAGE_KERNEL_ROX	__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern int icache_44x_need_flush;</div><div class='ctx'> </div><div class='hunk'>@@ -286,7 +286,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> 	return __pte((pte_val(pte) &amp; _PAGE_CHG_MASK) | pgprot_val(newprot));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pte_swp_exclusive(pte_t pte)</div><div class='add'>+static inline bool pte_swp_exclusive(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_val(pte) &amp; _PAGE_SWP_EXCLUSIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -373,5 +373,5 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);</div><div class='ctx'> void unmap_kernel_page(unsigned long va);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/nohash/pte-e500.h b/arch/powerpc/include/asm/nohash/pte-e500.h<br/>index cb78392494da..b61efc3ee904 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pte-e500.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/nohash/pte-e500.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/nohash/pte-e500.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/nohash/pte-e500.h</a></div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable-masks.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> static inline pte_t pte_mkexec(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return __pte((pte_val(pte) &amp; ~_PAGE_BAP_SX) | _PAGE_BAP_UX);</div><div class='hunk'>@@ -134,7 +134,7 @@ static inline unsigned long pud_leaf_size(pud_t pud)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /*  _ASM_POWERPC_NOHASH_PTE_E500_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h<br/>index 8c9d4b26bf57..d3eaa3425797 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/opal-api.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/opal-api.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/opal-api.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/opal-api.h</a></div><div class='hunk'>@@ -246,7 +246,7 @@</div><div class='ctx'> #define OPAL_CONFIG_IDLE_UNDO		0</div><div class='ctx'> #define OPAL_CONFIG_IDLE_APPLY		1</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Other enums */</div><div class='ctx'> enum OpalFreezeState {</div><div class='hunk'>@@ -1183,6 +1183,6 @@ struct opal_mpipl_fadump {</div><div class='ctx'> 	struct	opal_mpipl_region region[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __OPAL_API_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h<br/>index af304e6cb486..0a398265ba04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/opal.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/opal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/opal.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/opal.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/opal-api.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -390,6 +390,6 @@ void opal_powercap_init(void);</div><div class='ctx'> void opal_psr_init(void);</div><div class='ctx'> void opal_sensor_groups_init(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_OPAL_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h<br/>index 83d0a4fc5f75..b28fbb1d57eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/page.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * Copyright (C) 2001,2005 IBM Corporation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='hunk'>@@ -21,10 +21,9 @@</div><div class='ctx'>  * page size. When using 64K pages however, whether we are really supporting</div><div class='ctx'>  * 64K pages in HW or not is irrelevant to those definitions.</div><div class='ctx'>  */</div><div class='del'>-#define PAGE_SHIFT		CONFIG_PAGE_SHIFT</div><div class='del'>-#define PAGE_SIZE		(ASM_CONST(1) &lt;&lt; PAGE_SHIFT)</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #ifndef CONFIG_HUGETLB_PAGE</div><div class='ctx'> #define HPAGE_SHIFT PAGE_SHIFT</div><div class='ctx'> #elif defined(CONFIG_PPC_BOOK3S_64)</div><div class='hunk'>@@ -42,13 +41,6 @@ extern unsigned int hpage_shift;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Subtle: (1 &lt;&lt; PAGE_SHIFT) is an int, not an unsigned long. So if we</div><div class='del'>- * assign PAGE_MASK to a larger type it gets extended the way we want</div><div class='del'>- * (i.e. with 1s in the high bits)</div><div class='del'>- */</div><div class='del'>-#define PAGE_MASK      (~((1 &lt;&lt; PAGE_SHIFT) - 1))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * KERNELBASE is the virtual address of the start of the kernel, it's often</div><div class='ctx'>  * the same as PAGE_OFFSET, but _might not be_.</div><div class='ctx'>  *</div><div class='hunk'>@@ -83,7 +75,7 @@ extern unsigned int hpage_shift;</div><div class='ctx'> #define LOAD_OFFSET	ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START))</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_NONSTATIC_KERNEL)</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern phys_addr_t memstart_addr;</div><div class='ctx'> extern phys_addr_t kernstart_addr;</div><div class='hunk'>@@ -92,7 +84,7 @@ extern phys_addr_t kernstart_addr;</div><div class='ctx'> extern long long virt_phys_offset;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #define PHYSICAL_START	kernstart_addr</div><div class='ctx'> </div><div class='ctx'> #else	/* !CONFIG_NONSTATIC_KERNEL */</div><div class='hunk'>@@ -224,7 +216,7 @@ extern long long virt_phys_offset;</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> static inline unsigned long virt_to_pfn(const void *kaddr)</div><div class='ctx'> {</div><div class='ctx'> 	return __pa(kaddr) &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -269,7 +261,7 @@ static inline const void *pfn_to_kaddr(unsigned long pfn)</div><div class='ctx'> #define is_kernel_addr(x)	((x) &gt;= TASK_SIZE)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> #include &lt;asm/pgtable-be-types.h&gt;</div><div class='hunk'>@@ -298,6 +290,6 @@ static inline unsigned long kaslr_offset(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_PAGE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h<br/>index b9ac9e3a771c..25482405a811 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page_32.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page_32.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page_32.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/page_32.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #define PTE_SHIFT	(PAGE_SHIFT - PTE_T_LOG2)	/* full page */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /*</div><div class='ctx'>  * The basic type of a PTE - 64 bits for those CPUs with &gt; 32 bit</div><div class='ctx'>  * physical addressing.</div><div class='hunk'>@@ -53,6 +53,6 @@ extern void copy_page(void *to, void *from);</div><div class='ctx'> #define PGD_T_LOG2	(__builtin_ffs(sizeof(pgd_t)) - 1)</div><div class='ctx'> #define PTE_T_LOG2	(__builtin_ffs(sizeof(pte_t)) - 1)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_PAGE_32_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h<br/>index 79a9b7c6a132..0f564a06bf68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page_64.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/page_64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/page_64.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/page_64.h</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> #define ESID_MASK_1T		0xffffff0000000000UL</div><div class='ctx'> #define GET_ESID_1T(x)		(((x) &gt;&gt; SID_SHIFT_1T) &amp; SID_MASK_1T)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long pte_basic_t;</div><div class='hunk'>@@ -82,7 +82,7 @@ extern void copy_page(void *to, void *from);</div><div class='ctx'> /* Log 2 of page table size */</div><div class='ctx'> extern u64 ppc64_pft_size;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define VM_DATA_DEFAULT_FLAGS \</div><div class='ctx'> 	(is_32bit_task() ? \</div><div class='head'>diff --git a/arch/powerpc/include/asm/papr-sysparm.h b/arch/powerpc/include/asm/papr-sysparm.h<br/>index c3cd5b131033..a3b5a0d05db6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/papr-sysparm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/papr-sysparm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/papr-sysparm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/papr-sysparm.h</a></div><div class='hunk'>@@ -21,6 +21,7 @@ typedef struct {</div><div class='ctx'> #define PAPR_SYSPARM_COOP_MEM_OVERCOMMIT_ATTRS     mk_papr_sysparm(44)</div><div class='ctx'> #define PAPR_SYSPARM_TLB_BLOCK_INVALIDATE_ATTRS    mk_papr_sysparm(50)</div><div class='ctx'> #define PAPR_SYSPARM_LPAR_NAME                     mk_papr_sysparm(55)</div><div class='add'>+#define PAPR_SYSPARM_HVPIPE_ENABLE                 mk_papr_sysparm(64)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct papr_sysparm_buf - RTAS work area layout for system parameter functions.</div><div class='head'>diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h<br/>index 2aa3a091ef20..1dae53130782 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pci-bridge.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pci-bridge.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pci-bridge.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/pci-bridge.h</a></div><div class='hunk'>@@ -133,8 +133,6 @@ struct pci_controller {</div><div class='ctx'> </div><div class='ctx'> 	/* IRQ domain hierarchy */</div><div class='ctx'> 	struct irq_domain	*dev_domain;</div><div class='del'>-	struct irq_domain	*msi_domain;</div><div class='del'>-	struct fwnode_handle	*fwnode;</div><div class='ctx'> </div><div class='ctx'> 	/* iommu_ops support */</div><div class='ctx'> 	struct iommu_device	iommu;</div><div class='head'>diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h<br/>index 5995614e9062..af0f46e2373b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/perf_event_server.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/perf_event_server.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/perf_event_server.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/perf_event_server.h</a></div><div class='hunk'>@@ -102,8 +102,8 @@ struct power_pmu {</div><div class='ctx'> int __init register_power_pmu(struct power_pmu *pmu);</div><div class='ctx'> </div><div class='ctx'> struct pt_regs;</div><div class='del'>-extern unsigned long perf_misc_flags(struct pt_regs *regs);</div><div class='del'>-extern unsigned long perf_instruction_pointer(struct pt_regs *regs);</div><div class='add'>+extern unsigned long perf_arch_misc_flags(struct pt_regs *regs);</div><div class='add'>+extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs);</div><div class='ctx'> extern unsigned long int read_bhrb(int n);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -111,7 +111,7 @@ extern unsigned long int read_bhrb(int n);</div><div class='ctx'>  * if we have hardware PMU support.</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_PPC_PERF_CTRS</div><div class='del'>-#define perf_misc_flags(regs)	perf_misc_flags(regs)</div><div class='add'>+#define perf_arch_misc_flags(regs)	perf_arch_misc_flags(regs)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h<br/>index 2f72ad885332..17fd7ff6e535 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pgtable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pgtable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_PGTABLE_H</div><div class='ctx'> #define _ASM_POWERPC_PGTABLE_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/mmdebug.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;		/* For TASK_SIZE */</div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> struct mm_struct;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S</div><div class='ctx'> #include &lt;asm/book3s/pgtable.h&gt;</div><div class='hunk'>@@ -20,18 +20,6 @@ struct mm_struct;</div><div class='ctx'> #include &lt;asm/nohash/pgtable.h&gt;</div><div class='ctx'> #endif /* !CONFIG_PPC_BOOK3S */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Protection used for kernel text. We want the debuggers to be able to</div><div class='del'>- * set breakpoints anywhere, so don't write protect the kernel text</div><div class='del'>- * on platforms where such control is possible.</div><div class='del'>- */</div><div class='del'>-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \</div><div class='del'>-	defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)</div><div class='del'>-#define PAGE_KERNEL_TEXT	PAGE_KERNEL_X</div><div class='del'>-#else</div><div class='del'>-#define PAGE_KERNEL_TEXT	PAGE_KERNEL_ROX</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Make modules code happy. We don't set RO yet */</div><div class='ctx'> #define PAGE_KERNEL_EXEC	PAGE_KERNEL_X</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +27,7 @@ struct mm_struct;</div><div class='ctx'> #define PAGE_AGP		(PAGE_KERNEL_NC)</div><div class='ctx'> #define HAVE_PAGE_AGP</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define PFN_PTE_SHIFT		PTE_RPN_SHIFT</div><div class='ctx'> </div><div class='hunk'>@@ -53,9 +41,8 @@ void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep,</div><div class='ctx'> #define MAX_PTRS_PER_PGD PTRS_PER_PGD</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* Keep these as a macros to avoid include dependency mess */</div><div class='add'>+/* Keep this as a macro to avoid include dependency mess */</div><div class='ctx'> #define pte_page(x)		pfn_to_page(pte_pfn(x))</div><div class='del'>-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pte_pfn(pte_t pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -215,6 +202,6 @@ static inline bool arch_supports_memmap_on_memory(unsigned long vmemmap_size)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_PGTABLE_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h<br/>index 59a2c7dbc78f..28e752138996 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pkeys.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pkeys.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pkeys.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/pkeys.h</a></div><div class='hunk'>@@ -30,9 +30,9 @@ extern u32 reserved_allocation_mask; /* bits set for reserved keys */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline u64 pkey_to_vmflag_bits(u16 pkey)</div><div class='add'>+static inline vm_flags_t pkey_to_vmflag_bits(u16 pkey)</div><div class='ctx'> {</div><div class='del'>-	return (((u64)pkey &lt;&lt; VM_PKEY_SHIFT) &amp; ARCH_VM_PKEY_FLAGS);</div><div class='add'>+	return (((vm_flags_t)pkey &lt;&lt; VM_PKEY_SHIFT) &amp; ARCH_VM_PKEY_FLAGS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int vma_pkey(struct vm_area_struct *vma)</div><div class='head'>diff --git a/arch/powerpc/include/asm/plpar_wrappers.h b/arch/powerpc/include/asm/plpar_wrappers.h<br/>index 71648c126970..f2b6cc4341bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/plpar_wrappers.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/plpar_wrappers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/plpar_wrappers.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/plpar_wrappers.h</a></div><div class='hunk'>@@ -65,6 +65,35 @@ static inline long register_dtl(unsigned long cpu, unsigned long vpa)</div><div class='ctx'> 	return vpa_call(H_VPA_REG_DTL, cpu, vpa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Invokes H_HTM hcall with parameters passed from htm_hcall_wrapper.</div><div class='add'>+ * flags: Set to hardwareTarget.</div><div class='add'>+ * target: Specifies target using node index, nodal chip index and core index.</div><div class='add'>+ * operation : action to perform ie configure, start, stop, deconfigure, trace</div><div class='add'>+ * based on the HTM type.</div><div class='add'>+ * param1, param2, param3: parameters for each action.</div><div class='add'>+ */</div><div class='add'>+static inline long htm_call(unsigned long flags, unsigned long target,</div><div class='add'>+               unsigned long operation, unsigned long param1,</div><div class='add'>+               unsigned long param2, unsigned long param3)</div><div class='add'>+{</div><div class='add'>+       return plpar_hcall_norets(H_HTM, flags, target, operation,</div><div class='add'>+                                 param1, param2, param3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long htm_hcall_wrapper(unsigned long flags, unsigned long nodeindex,</div><div class='add'>+               unsigned long nodalchipindex, unsigned long coreindexonchip,</div><div class='add'>+	       unsigned long type, unsigned long htm_op, unsigned long param1, unsigned long param2,</div><div class='add'>+	       unsigned long param3)</div><div class='add'>+{</div><div class='add'>+	return htm_call(H_HTM_FLAGS_HARDWARE_TARGET | flags,</div><div class='add'>+                       H_HTM_TARGET_NODE_INDEX(nodeindex) |</div><div class='add'>+                       H_HTM_TARGET_NODAL_CHIP_INDEX(nodalchipindex) |</div><div class='add'>+                       H_HTM_TARGET_CORE_INDEX_ON_CHIP(coreindexonchip),</div><div class='add'>+		       H_HTM_OP(htm_op) | H_HTM_TYPE(type),</div><div class='add'>+		       param1, param2, param3);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern void vpa_init(int cpu);</div><div class='ctx'> </div><div class='ctx'> static inline long plpar_pte_enter(unsigned long flags,</div><div class='head'>diff --git a/arch/powerpc/include/asm/pmi.h b/arch/powerpc/include/asm/pmi.h<br/>deleted file mode 100644<br/>index 478f0a2fe7f4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pmi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pmi.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-#ifndef _POWERPC_PMI_H</div><div class='del'>-#define _POWERPC_PMI_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for talking with PMI device on PowerPC</div><div class='del'>- *</div><div class='del'>- * PMI (Platform Management Interrupt) is a way to communicate</div><div class='del'>- * with the BMC (Baseboard Management Controller) via interrupts.</div><div class='del'>- * Unlike IPMI it is bidirectional and has a low latency.</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *</div><div class='del'>- * Author: Christian Krafft &lt;krafft@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#define PMI_TYPE_FREQ_CHANGE	0x01</div><div class='del'>-#define PMI_TYPE_POWER_BUTTON	0x02</div><div class='del'>-#define PMI_READ_TYPE		0</div><div class='del'>-#define PMI_READ_DATA0		1</div><div class='del'>-#define PMI_READ_DATA1		2</div><div class='del'>-#define PMI_READ_DATA2		3</div><div class='del'>-#define PMI_WRITE_TYPE		4</div><div class='del'>-#define PMI_WRITE_DATA0		5</div><div class='del'>-#define PMI_WRITE_DATA1		6</div><div class='del'>-#define PMI_WRITE_DATA2		7</div><div class='del'>-</div><div class='del'>-#define PMI_ACK			0x80</div><div class='del'>-</div><div class='del'>-#define PMI_TIMEOUT		100</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-	u8	type;</div><div class='del'>-	u8	data0;</div><div class='del'>-	u8	data1;</div><div class='del'>-	u8	data2;</div><div class='del'>-} pmi_message_t;</div><div class='del'>-</div><div class='del'>-struct pmi_handler {</div><div class='del'>-	struct list_head node;</div><div class='del'>-	u8 type;</div><div class='del'>-	void (*handle_pmi_message) (pmi_message_t);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int pmi_register_handler(struct pmi_handler *);</div><div class='del'>-void pmi_unregister_handler(struct pmi_handler *);</div><div class='del'>-</div><div class='del'>-int pmi_send_message(pmi_message_t);</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-#endif /* _POWERPC_PMI_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h<br/>index 8afc92860dbb..7e9a479951a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pnv-pci.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/pnv-pci.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/pnv-pci.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/pnv-pci.h</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/pci_hotplug.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> #include &lt;asm/opal-api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PCI_SLOT_ID_PREFIX	(1UL &lt;&lt; 63)</div><div class='hunk'>@@ -25,25 +24,9 @@ extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);</div><div class='ctx'> extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,</div><div class='ctx'> 				   struct opal_msg *msg);</div><div class='ctx'> </div><div class='del'>-extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,</div><div class='del'>-				  int enable);</div><div class='del'>-int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);</div><div class='del'>-int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,</div><div class='del'>-			   unsigned int virq);</div><div class='del'>-int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);</div><div class='del'>-void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);</div><div class='del'>-int pnv_cxl_get_irq_count(struct pci_dev *dev);</div><div class='del'>-struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);</div><div class='ctx'> int64_t pnv_opal_pci_msi_eoi(struct irq_data *d);</div><div class='ctx'> bool is_pnv_opal_msi(struct irq_chip *chip);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CXL_BASE</div><div class='del'>-int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,</div><div class='del'>-			       struct pci_dev *dev, int num);</div><div class='del'>-void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,</div><div class='del'>-				  struct pci_dev *dev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct pnv_php_slot {</div><div class='ctx'> 	struct hotplug_slot		slot;</div><div class='ctx'> 	uint64_t			id;</div><div class='head'>diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h<br/>index b98a9e982c03..55ca49d18319 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ppc-opcode.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ppc-opcode.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ppc-opcode.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/ppc-opcode.h</a></div><div class='hunk'>@@ -425,6 +425,7 @@</div><div class='ctx'> #define PPC_RAW_SC()			(0x44000002)</div><div class='ctx'> #define PPC_RAW_SYNC()			(0x7c0004ac)</div><div class='ctx'> #define PPC_RAW_ISYNC()			(0x4c00012c)</div><div class='add'>+#define PPC_RAW_LWSYNC()		(0x7c2004ac)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Define what the VSX XX1 form instructions will look like, then add</div><div class='hunk'>@@ -570,6 +571,7 @@</div><div class='ctx'> 					(0x54000001 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))</div><div class='ctx'> #define PPC_RAW_RLWIMI(d, a, i, mb, me) (0x50000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))</div><div class='ctx'> #define PPC_RAW_RLDICL(d, a, i, mb)     (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb))</div><div class='add'>+#define PPC_RAW_RLDICL_DOT(d, a, i, mb) (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb) | 0x1)</div><div class='ctx'> #define PPC_RAW_RLDICR(d, a, i, me)     (0x78000004 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me))</div><div class='ctx'> </div><div class='ctx'> /* slwi = rlwinm Rx, Ry, n, 0, 31-n */</div><div class='hunk'>@@ -587,12 +589,26 @@</div><div class='ctx'> #define PPC_RAW_MTSPR(spr, d)		(0x7c0003a6 | ___PPC_RS(d) | __PPC_SPR(spr))</div><div class='ctx'> #define PPC_RAW_EIEIO()			(0x7c0006ac)</div><div class='ctx'> </div><div class='add'>+/* bcl 20,31,$+4 */</div><div class='add'>+#define PPC_RAW_BCL4()			(0x429f0005)</div><div class='ctx'> #define PPC_RAW_BRANCH(offset)		(0x48000000 | PPC_LI(offset))</div><div class='ctx'> #define PPC_RAW_BL(offset)		(0x48000001 | PPC_LI(offset))</div><div class='ctx'> #define PPC_RAW_TW(t0, a, b)		(0x7c000008 | ___PPC_RS(t0) | ___PPC_RA(a) | ___PPC_RB(b))</div><div class='ctx'> #define PPC_RAW_TRAP()			PPC_RAW_TW(31, 0, 0)</div><div class='ctx'> #define PPC_RAW_SETB(t, bfa)		(0x7c000100 | ___PPC_RT(t) | ___PPC_RA((bfa) &lt;&lt; 2))</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC32</div><div class='add'>+#define PPC_RAW_STL		PPC_RAW_STW</div><div class='add'>+#define PPC_RAW_STLU		PPC_RAW_STWU</div><div class='add'>+#define PPC_RAW_LL		PPC_RAW_LWZ</div><div class='add'>+#define PPC_RAW_CMPLI		PPC_RAW_CMPWI</div><div class='add'>+#else</div><div class='add'>+#define PPC_RAW_STL		PPC_RAW_STD</div><div class='add'>+#define PPC_RAW_STLU		PPC_RAW_STDU</div><div class='add'>+#define PPC_RAW_LL		PPC_RAW_LD</div><div class='add'>+#define PPC_RAW_CMPLI		PPC_RAW_CMPDI</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Deal with instructions that older assemblers aren't aware of */</div><div class='ctx'> #define	PPC_BCCTR_FLUSH		stringify_in_c(.long PPC_INST_BCCTR_FLUSH)</div><div class='ctx'> #define	PPC_CP_ABORT		stringify_in_c(.long PPC_RAW_CP_ABORT)</div><div class='head'>diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h<br/>index 02897f4b0dbf..46947c82a712 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ppc_asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ppc_asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ppc_asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/ppc_asm.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;asm/feature-fixups.h&gt;</div><div class='ctx'> #include &lt;asm/extable.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define SZL			(BITS_PER_LONG/8)</div><div class='ctx'> </div><div class='hunk'>@@ -183,7 +183,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Used to name C functions called from asm</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_PPC_KERNEL_PCREL</div><div class='add'>+#if defined(__powerpc64__) &amp;&amp; defined(CONFIG_PPC_KERNEL_PCREL)</div><div class='ctx'> #define CFUNC(name) name@notoc</div><div class='ctx'> #else</div><div class='ctx'> #define CFUNC(name) name</div><div class='hunk'>@@ -868,7 +868,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)</div><div class='ctx'> </div><div class='ctx'> #endif /* !CONFIG_PPC_BOOK3E_64 */</div><div class='ctx'> </div><div class='del'>-#endif /*  __ASSEMBLY__ */</div><div class='add'>+#endif /*  __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define SOFT_MASK_TABLE(_start, _end)		\</div><div class='ctx'> 	stringify_in_c(.section __soft_mask_table,"a";)\</div><div class='head'>diff --git a/arch/powerpc/include/asm/preempt.h b/arch/powerpc/include/asm/preempt.h<br/>new file mode 100644<br/>index 000000000000..000e2b9681f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/preempt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/preempt.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __ASM_POWERPC_PREEMPT_H</div><div class='add'>+#define __ASM_POWERPC_PREEMPT_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/preempt.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PREEMPT_DYNAMIC)</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+DECLARE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='add'>+#define need_irq_preemption() \</div><div class='add'>+	(static_branch_unlikely(&amp;sk_dynamic_irqentry_exit_cond_resched))</div><div class='add'>+#else</div><div class='add'>+#define need_irq_preemption()   (IS_ENABLED(CONFIG_PREEMPTION))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_POWERPC_PREEMPT_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h<br/>index 6b94de17201c..f156bdb43e2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/processor.h</a></div><div class='hunk'>@@ -29,14 +29,14 @@</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> /* Default SMT priority is set to 3. Use 11- 13bits to save priority. */</div><div class='ctx'> #define PPR_PRIORITY 3</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define DEFAULT_PPR (PPR_PRIORITY &lt;&lt; 50)</div><div class='ctx'> #else</div><div class='ctx'> #define DEFAULT_PPR ((u64)PPR_PRIORITY &lt;&lt; 50)</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='hunk'>@@ -460,5 +460,5 @@ int enter_vmx_ops(void);</div><div class='ctx'> void *exit_vmx_ops(void *dest);</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_PROCESSOR_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h<br/>index c0107d8ddd8c..f679a11a7e7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/prom.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/prom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/prom.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/prom.h</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> struct device_node;</div><div class='ctx'> struct property;</div><div class='ctx'> </div><div class='add'>+#define MIN_RMA			768		/* Minimum RMA (in MB) for CAS negotiation */</div><div class='add'>+</div><div class='ctx'> #define OF_DT_BEGIN_NODE	0x1		/* Start of node, full name */</div><div class='ctx'> #define OF_DT_END_NODE		0x2		/* End node */</div><div class='ctx'> #define OF_DT_PROP		0x3		/* Property: name off, size,</div><div class='head'>diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h<br/>index 7b9350756875..94aa1de2b06e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;asm/asm-const.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> struct pt_regs</div><div class='ctx'> {</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -165,7 +165,7 @@ struct pt_regs</div><div class='ctx'> #define STACK_INT_FRAME_SIZE	(KERNEL_REDZONE_SIZE + STACK_USER_INT_FRAME_SIZE)</div><div class='ctx'> #define STACK_INT_FRAME_MARKER_LONGS	(STACK_INT_FRAME_MARKER/sizeof(long))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/paca.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -414,7 +414,7 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, unsig</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifndef __powerpc64__</div><div class='ctx'> /* We need PT_SOFTE defined at all time to avoid #ifdefs */</div><div class='head'>diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h<br/>index 0228c90bbcc7..3fe186635432 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/reg.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> #define MSR_RI_LG	1		/* Recoverable Exception */</div><div class='ctx'> #define MSR_LE_LG	0 		/* Little Endian */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define __MASK(X)	(1&lt;&lt;(X))</div><div class='ctx'> #else</div><div class='ctx'> #define __MASK(X)	(1UL&lt;&lt;(X))</div><div class='hunk'>@@ -1358,7 +1358,7 @@</div><div class='ctx'> #define PVR_ARCH_31_P11	0x0f000007</div><div class='ctx'> </div><div class='ctx'> /* Macros for setting and retrieving special purpose registers */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PPC64) || defined(__CHECKER__)</div><div class='ctx'> typedef struct {</div><div class='hunk'>@@ -1450,6 +1450,6 @@ extern void scom970_write(unsigned int address, unsigned long value);</div><div class='ctx'> struct pt_regs;</div><div class='ctx'> </div><div class='ctx'> extern void ppc_save_regs(struct pt_regs *regs);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_REG_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h<br/>index 656bfaf91526..56f9d3b1de85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg_booke.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg_booke.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg_booke.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/reg_booke.h</a></div><div class='hunk'>@@ -576,7 +576,7 @@</div><div class='ctx'> </div><div class='ctx'> #define TEN_THREAD(x)	(1 &lt;&lt; (x))</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #define mftmr(rn)	({unsigned long rval; \</div><div class='ctx'> 			asm volatile(MFTMR(rn, %0) : "=r" (rval)); rval;})</div><div class='ctx'> #define mttmr(rn, v)	asm volatile(MTTMR(rn, %0) : \</div><div class='hunk'>@@ -585,7 +585,7 @@</div><div class='ctx'> </div><div class='ctx'> extern unsigned long global_dbcr0[];</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_POWERPC_REG_BOOKE_H__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h<br/>index 9893d2001b68..ec459c3d9498 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg_fsl_emb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/reg_fsl_emb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/reg_fsl_emb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/reg_fsl_emb.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /* Performance Monitor Registers */</div><div class='ctx'> static __always_inline unsigned int mfpmr(unsigned int rn)</div><div class='ctx'> {</div><div class='hunk'>@@ -32,7 +32,7 @@ static __always_inline void mtpmr(unsigned int rn, unsigned int val)</div><div class='ctx'> 	     ".machine pop;"</div><div class='ctx'> 	     : [val] "=r" (val) : [rn] "i" (rn));</div><div class='ctx'> }</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /* Freescale Book E Performance Monitor APU Registers */</div><div class='ctx'> #define PMRN_PMC0	0x010	/* Performance Monitor Counter 0 */</div><div class='head'>diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h<br/>index 04406162fc5a..d046bbd5017d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/rtas.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/rtas.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/rtas.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/rtas.h</a></div><div class='hunk'>@@ -68,9 +68,11 @@ enum rtas_function_index {</div><div class='ctx'> 	RTAS_FNIDX__IBM_READ_PCI_CONFIG,</div><div class='ctx'> 	RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE,</div><div class='ctx'> 	RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2,</div><div class='add'>+	RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG,</div><div class='ctx'> 	RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW,</div><div class='ctx'> 	RTAS_FNIDX__IBM_RESET_PE_DMA_WINDOW,</div><div class='ctx'> 	RTAS_FNIDX__IBM_SCAN_LOG_DUMP,</div><div class='add'>+	RTAS_FNIDX__IBM_SEND_HVPIPE_MSG,</div><div class='ctx'> 	RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR,</div><div class='ctx'> 	RTAS_FNIDX__IBM_SET_EEH_OPTION,</div><div class='ctx'> 	RTAS_FNIDX__IBM_SET_SLOT_RESET,</div><div class='hunk'>@@ -163,9 +165,11 @@ typedef struct {</div><div class='ctx'> #define RTAS_FN_IBM_READ_PCI_CONFIG               rtas_fn_handle(RTAS_FNIDX__IBM_READ_PCI_CONFIG)</div><div class='ctx'> #define RTAS_FN_IBM_READ_SLOT_RESET_STATE         rtas_fn_handle(RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE)</div><div class='ctx'> #define RTAS_FN_IBM_READ_SLOT_RESET_STATE2        rtas_fn_handle(RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2)</div><div class='add'>+#define RTAS_FN_IBM_RECEIVE_HVPIPE_MSG		  rtas_fn_handle(RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG)</div><div class='ctx'> #define RTAS_FN_IBM_REMOVE_PE_DMA_WINDOW          rtas_fn_handle(RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW)</div><div class='ctx'> #define RTAS_FN_IBM_RESET_PE_DMA_WINDOW           rtas_fn_handle(RTAS_FNIDX__IBM_RESET_PE_DMA_WINDOW)</div><div class='ctx'> #define RTAS_FN_IBM_SCAN_LOG_DUMP                 rtas_fn_handle(RTAS_FNIDX__IBM_SCAN_LOG_DUMP)</div><div class='add'>+#define RTAS_FN_IBM_SEND_HVPIPE_MSG		  rtas_fn_handle(RTAS_FNIDX__IBM_SEND_HVPIPE_MSG)</div><div class='ctx'> #define RTAS_FN_IBM_SET_DYNAMIC_INDICATOR         rtas_fn_handle(RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR)</div><div class='ctx'> #define RTAS_FN_IBM_SET_EEH_OPTION                rtas_fn_handle(RTAS_FNIDX__IBM_SET_EEH_OPTION)</div><div class='ctx'> #define RTAS_FN_IBM_SET_SLOT_RESET                rtas_fn_handle(RTAS_FNIDX__IBM_SET_SLOT_RESET)</div><div class='hunk'>@@ -217,6 +221,7 @@ typedef struct {</div><div class='ctx'> #define RTAS_HARDWARE_ERROR             -1 /* Hardware or other unspecified error. */</div><div class='ctx'> #define RTAS_BUSY                       -2 /* Retry immediately. */</div><div class='ctx'> #define RTAS_INVALID_PARAMETER          -3 /* Invalid indicator/domain/sensor etc. */</div><div class='add'>+#define	RTAS_FUNC_NOT_SUPPORTED		-5 /* Function not supported */</div><div class='ctx'> #define RTAS_UNEXPECTED_STATE_CHANGE    -7 /* Seems limited to EEH and slot reset. */</div><div class='ctx'> #define RTAS_EXTENDED_DELAY_MIN       9900 /* Retry after delaying for ~1ms. */</div><div class='ctx'> #define RTAS_EXTENDED_DELAY_MAX       9905 /* Retry after delaying for ~100s. */</div><div class='hunk'>@@ -233,6 +238,7 @@ typedef struct {</div><div class='ctx'> #define RTAS_EPOW_WARNING		0x40000000 /* set bit 1 */</div><div class='ctx'> #define RTAS_HOTPLUG_EVENTS		0x10000000 /* set bit 3 */</div><div class='ctx'> #define RTAS_IO_EVENTS			0x08000000 /* set bit 4 */</div><div class='add'>+#define RTAS_HVPIPE_MSG_EVENTS		0x04000000 /* set bit 5 */</div><div class='ctx'> #define RTAS_EVENT_SCAN_ALL_EVENTS	0xffffffff</div><div class='ctx'> </div><div class='ctx'> /* RTAS event severity */</div><div class='hunk'>@@ -282,6 +288,7 @@ typedef struct {</div><div class='ctx'> #define RTAS_TYPE_DEALLOC		0xE3</div><div class='ctx'> #define RTAS_TYPE_DUMP			0xE4</div><div class='ctx'> #define RTAS_TYPE_HOTPLUG		0xE5</div><div class='add'>+#define RTAS_TYPE_HVPIPE		0xE6</div><div class='ctx'> /* I don't add PowerMGM events right now, this is a different topic */</div><div class='ctx'> #define RTAS_TYPE_PMGM_POWER_SW_ON	0x60</div><div class='ctx'> #define RTAS_TYPE_PMGM_POWER_SW_OFF	0x61</div><div class='hunk'>@@ -374,6 +381,7 @@ inline uint32_t rtas_ext_event_company_id(struct rtas_ext_event_log_v6 *ext_log)</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_HMC_ID		(('H' &lt;&lt; 8) | 'M')</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_EPOW		(('E' &lt;&lt; 8) | 'P')</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_IO_EVENT		(('I' &lt;&lt; 8) | 'E')</div><div class='add'>+#define PSERIES_ELOG_SECT_ID_HVPIPE_EVENT	(('P' &lt;&lt; 8) | 'E')</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_MANUFACT_INFO	(('M' &lt;&lt; 8) | 'I')</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_CALL_HOME		(('C' &lt;&lt; 8) | 'H')</div><div class='ctx'> #define PSERIES_ELOG_SECT_ID_USER_DEF		(('U' &lt;&lt; 8) | 'D')</div><div class='hunk'>@@ -515,6 +523,11 @@ extern char rtas_data_buf[RTAS_DATA_BUF_SIZE];</div><div class='ctx'> extern unsigned long rtas_rmo_buf;</div><div class='ctx'> </div><div class='ctx'> extern struct mutex rtas_ibm_get_vpd_lock;</div><div class='add'>+extern struct mutex rtas_ibm_get_indices_lock;</div><div class='add'>+extern struct mutex rtas_ibm_set_dynamic_indicator_lock;</div><div class='add'>+extern struct mutex rtas_ibm_get_dynamic_sensor_state_lock;</div><div class='add'>+extern struct mutex rtas_ibm_physical_attestation_lock;</div><div class='add'>+extern struct mutex rtas_ibm_send_hvpipe_msg_lock;</div><div class='ctx'> </div><div class='ctx'> #define GLOBAL_INTERRUPT_QUEUE 9005</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/set_memory.h b/arch/powerpc/include/asm/set_memory.h<br/>index 9a025b776a4b..9c8d5747755d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/set_memory.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/set_memory.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/set_memory.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/set_memory.h</a></div><div class='hunk'>@@ -12,37 +12,37 @@</div><div class='ctx'> </div><div class='ctx'> int change_memory_attr(unsigned long addr, int numpages, long action);</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_ro(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_ro(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_RO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_rw(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_rw(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_RW);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_nx(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_nx(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_NX);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_x(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_x(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_X);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_np(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_np(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_NP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_p(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_p(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_P);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int set_memory_rox(unsigned long addr, int numpages)</div><div class='add'>+static inline int __must_check set_memory_rox(unsigned long addr, int numpages)</div><div class='ctx'> {</div><div class='ctx'> 	return change_memory_attr(addr, numpages, SET_MEMORY_ROX);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h<br/>index eed74c1fb832..50a92b24628d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/setup.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/setup.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/setup.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern void ppc_printk_progress(char *s, unsigned short hex);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long long memory_limit;</div><div class='hunk'>@@ -89,7 +89,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,</div><div class='ctx'> </div><div class='ctx'> extern struct seq_buf ppc_hw_desc;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* _ASM_POWERPC_SETUP_H */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/simple_spinlock_types.h b/arch/powerpc/include/asm/simple_spinlock_types.h<br/>index 08243338069d..391fc19f7272 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/simple_spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/simple_spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/simple_spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/simple_spinlock_types.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #define _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_RAW_H</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='head'>diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h<br/>index b77927ccb0ab..e41b9ea42122 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/smp.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/smp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/smp.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/smp.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/irqreturn.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> #include &lt;asm/paca.h&gt;</div><div class='hunk'>@@ -266,7 +266,7 @@ extern char __secondary_hold;</div><div class='ctx'> extern unsigned int booting_thread_hwid;</div><div class='ctx'> </div><div class='ctx'> extern void __early_start(void);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_SMP_H) */</div><div class='head'>diff --git a/arch/powerpc/include/asm/spinlock_types.h b/arch/powerpc/include/asm/spinlock_types.h<br/>index 40b01446cf75..569765fa16bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spinlock_types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spinlock_types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #define _ASM_POWERPC_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_RAW_H</div><div class='del'>-# error "please don't include this file directly"</div><div class='add'>+# error "Please do not include this file directly."</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_QUEUED_SPINLOCKS</div><div class='head'>diff --git a/arch/powerpc/include/asm/spu_csa.h b/arch/powerpc/include/asm/spu_csa.h<br/>index c33df961c045..1b3271a03392 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spu_csa.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spu_csa.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spu_csa.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/spu_csa.h</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> #define SPU_DECR_STATUS_RUNNING 0x1</div><div class='ctx'> #define SPU_DECR_STATUS_WRAPPED 0x2</div><div class='ctx'> </div><div class='del'>-#ifndef  __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> /**</div><div class='ctx'>  * spu_reg128 - generic 128-bit register definition.</div><div class='ctx'>  */</div><div class='hunk'>@@ -243,5 +243,5 @@ struct spu_state {</div><div class='ctx'> </div><div class='ctx'> #endif /* !__SPU__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> #endif /* _SPU_CSA_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/spu_priv1.h b/arch/powerpc/include/asm/spu_priv1.h<br/>index 2167d756e6d5..66b111fa1cd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spu_priv1.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/spu_priv1.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/spu_priv1.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/spu_priv1.h</a></div><div class='hunk'>@@ -215,9 +215,6 @@ spu_disable_spu (struct spu_context *ctx)</div><div class='ctx'>  * and only intended to be used by the platform setup code.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-extern const struct spu_priv1_ops spu_priv1_mmio_ops;</div><div class='del'>-extern const struct spu_priv1_ops spu_priv1_beat_ops;</div><div class='del'>-</div><div class='ctx'> extern const struct spu_management_ops spu_management_of_ops;</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/sstep.h b/arch/powerpc/include/asm/sstep.h<br/>index 50950deedb87..e3d0e714ff28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/sstep.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/sstep.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/sstep.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/sstep.h</a></div><div class='hunk'>@@ -173,9 +173,4 @@ int emulate_step(struct pt_regs *regs, ppc_inst_t instr);</div><div class='ctx'>  */</div><div class='ctx'> extern int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op);</div><div class='ctx'> </div><div class='del'>-extern void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg,</div><div class='del'>-			     const void *mem, bool cross_endian);</div><div class='del'>-extern void emulate_vsx_store(struct instruction_op *op,</div><div class='del'>-			      const union vsx_reg *reg, void *mem,</div><div class='del'>-			      bool cross_endian);</div><div class='ctx'> extern int emulate_dcbz(unsigned long ea, struct pt_regs *regs);</div><div class='head'>diff --git a/arch/powerpc/include/asm/static_call.h b/arch/powerpc/include/asm/static_call.h<br/>index de1018cc522b..e3d5d3823dac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/static_call.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/static_call.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/static_call.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/static_call.h</a></div><div class='hunk'>@@ -26,4 +26,6 @@</div><div class='ctx'> #define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name)	__PPC_SCT(name, "blr")</div><div class='ctx'> #define ARCH_DEFINE_STATIC_CALL_RET0_TRAMP(name)	__PPC_SCT(name, "b .+20")</div><div class='ctx'> </div><div class='add'>+#define CALL_INSN_SIZE		4</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_POWERPC_STATIC_CALL_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h<br/>index b0b4c64870d7..0d3ccb34adfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/synch.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/synch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/synch.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/synch.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;asm/feature-fixups.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;</div><div class='ctx'> extern void do_lwsync_fixups(unsigned long value, void *fixup_start,</div><div class='ctx'> 			     void *fixup_end);</div><div class='hunk'>@@ -40,7 +40,7 @@ static inline void ppc_after_tlbiel_barrier(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	asm volatile(ASM_FTR_IFSET(PPC_CP_ABORT, "", %0) : : "i" (CPU_FTR_ARCH_31) : "memory");</div><div class='ctx'> }</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #if defined(__powerpc64__)</div><div class='ctx'> #    define LWSYNC	lwsync</div><div class='head'>diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h<br/>index 3dd36c5e334a..4b3c52ed6e9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/syscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/syscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/syscall.h</a></div><div class='hunk'>@@ -39,6 +39,16 @@ static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)</div><div class='ctx'> 		return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_nr(struct task_struct *task, struct pt_regs *regs, int nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Unlike syscall_get_nr(), syscall_set_nr() can be called only when</div><div class='add'>+	 * the target task is stopped for tracing on entering syscall, so</div><div class='add'>+	 * there is no need to have the same check syscall_get_nr() has.</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;gpr[0] = nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void syscall_rollback(struct task_struct *task,</div><div class='ctx'> 				    struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -110,6 +120,16 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	memcpy(&amp;regs-&gt;gpr[3], args, 6 * sizeof(args[0]));</div><div class='add'>+</div><div class='add'>+	/* Also copy the first argument into orig_gpr3 */</div><div class='add'>+	regs-&gt;orig_gpr3 = args[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	if (is_tsk_32bit_task(task))</div><div class='head'>diff --git a/arch/powerpc/include/asm/systemcfg.h b/arch/powerpc/include/asm/systemcfg.h<br/>new file mode 100644<br/>index 000000000000..2f9b1d6a5c98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/systemcfg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/systemcfg.h</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef _SYSTEMCFG_H</div><div class='add'>+#define _SYSTEMCFG_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2002 Peter Bergner &lt;bergner@vnet.ibm.com&gt;, IBM</div><div class='add'>+ * Copyright (C) 2005 Benjamin Herrenschmidy &lt;benh@kernel.crashing.org&gt;,</div><div class='add'>+ * 		      IBM Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If the major version changes we are incompatible.</div><div class='add'>+ * Minor version changes are a hint.</div><div class='add'>+ */</div><div class='add'>+#define SYSTEMCFG_MAJOR 1</div><div class='add'>+#define SYSTEMCFG_MINOR 1</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct systemcfg {</div><div class='add'>+	__u8  eye_catcher[16];		/* Eyecatcher: SYSTEMCFG:PPC64	0x00 */</div><div class='add'>+	struct {			/* Systemcfg version numbers	     */</div><div class='add'>+		__u32 major;		/* Major number			0x10 */</div><div class='add'>+		__u32 minor;		/* Minor number			0x14 */</div><div class='add'>+	} version;</div><div class='add'>+</div><div class='add'>+	/* Note about the platform flags: it now only contains the lpar</div><div class='add'>+	 * bit. The actual platform number is dead and buried</div><div class='add'>+	 */</div><div class='add'>+	__u32 platform;			/* Platform flags		0x18 */</div><div class='add'>+	__u32 processor;		/* Processor type		0x1C */</div><div class='add'>+	__u64 processorCount;		/* # of physical processors	0x20 */</div><div class='add'>+	__u64 physicalMemorySize;	/* Size of real memory(B)	0x28 */</div><div class='add'>+	__u64 tb_orig_stamp;		/* (NU) Timebase at boot	0x30 */</div><div class='add'>+	__u64 tb_ticks_per_sec;		/* Timebase tics / sec		0x38 */</div><div class='add'>+	__u64 tb_to_xs;			/* (NU) Inverse of TB to 2^20	0x40 */</div><div class='add'>+	__u64 stamp_xsec;		/* (NU)				0x48 */</div><div class='add'>+	__u64 tb_update_count;		/* (NU) Timebase atomicity ctr	0x50 */</div><div class='add'>+	__u32 tz_minuteswest;		/* (NU) Min. west of Greenwich	0x58 */</div><div class='add'>+	__u32 tz_dsttime;		/* (NU) Type of dst correction	0x5C */</div><div class='add'>+	__u32 dcache_size;		/* L1 d-cache size		0x60 */</div><div class='add'>+	__u32 dcache_line_size;		/* L1 d-cache line size		0x64 */</div><div class='add'>+	__u32 icache_size;		/* L1 i-cache size		0x68 */</div><div class='add'>+	__u32 icache_line_size;		/* L1 i-cache line size		0x6C */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct systemcfg *systemcfg;</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_PPC64 */</div><div class='add'>+#endif /* _SYSTEMCFG_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/text-patching.h<br/>index e7f14720f630..e7f14720f630 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/code-patching.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/code-patching.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/text-patching.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/text-patching.h</a></div><div class='head'>diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h<br/>index 6ebca2996f18..b0f200aba2b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/thread_info.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/thread_info.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> </div><div class='ctx'> #define THREAD_ALIGN		(1 &lt;&lt; THREAD_ALIGN_SHIFT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/accounting.h&gt;</div><div class='hunk'>@@ -89,7 +89,7 @@ extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src</div><div class='ctx'> void arch_setup_new_exec(void);</div><div class='ctx'> #define arch_setup_new_exec arch_setup_new_exec</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * thread information flag bit numbers</div><div class='hunk'>@@ -103,6 +103,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define TIF_PATCH_PENDING	6	/* pending live patching update */</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */</div><div class='ctx'> #define TIF_SINGLESTEP		8	/* singlestepping active */</div><div class='add'>+#define TIF_NEED_RESCHED_LAZY	9       /* Scheduler driven lazy preemption */</div><div class='ctx'> #define TIF_SECCOMP		10	/* secure computing */</div><div class='ctx'> #define TIF_RESTOREALL		11	/* Restore all regs (implies NOERROR) */</div><div class='ctx'> #define TIF_NOERROR		12	/* Force successful syscall return */</div><div class='hunk'>@@ -122,6 +123,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1&lt;&lt;TIF_SYSCALL_TRACE)</div><div class='ctx'> #define _TIF_SIGPENDING		(1&lt;&lt;TIF_SIGPENDING)</div><div class='ctx'> #define _TIF_NEED_RESCHED	(1&lt;&lt;TIF_NEED_RESCHED)</div><div class='add'>+#define _TIF_NEED_RESCHED_LAZY	(1&lt;&lt;TIF_NEED_RESCHED_LAZY)</div><div class='ctx'> #define _TIF_NOTIFY_SIGNAL	(1&lt;&lt;TIF_NOTIFY_SIGNAL)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1&lt;&lt;TIF_POLLING_NRFLAG)</div><div class='ctx'> #define _TIF_32BIT		(1&lt;&lt;TIF_32BIT)</div><div class='hunk'>@@ -142,9 +144,10 @@ void arch_setup_new_exec(void);</div><div class='ctx'> 				 _TIF_SYSCALL_EMU)</div><div class='ctx'> </div><div class='ctx'> #define _TIF_USER_WORK_MASK	(_TIF_SIGPENDING | _TIF_NEED_RESCHED | \</div><div class='del'>-				 _TIF_NOTIFY_RESUME | _TIF_UPROBE | \</div><div class='del'>-				 _TIF_RESTORE_TM | _TIF_PATCH_PENDING | \</div><div class='del'>-				 _TIF_NOTIFY_SIGNAL)</div><div class='add'>+				 _TIF_NEED_RESCHED_LAZY | _TIF_NOTIFY_RESUME | \</div><div class='add'>+				 _TIF_UPROBE | _TIF_RESTORE_TM | \</div><div class='add'>+				 _TIF_PATCH_PENDING | _TIF_NOTIFY_SIGNAL)</div><div class='add'>+</div><div class='ctx'> #define _TIF_PERSYSCALL_MASK	(_TIF_RESTOREALL|_TIF_NOERROR)</div><div class='ctx'> </div><div class='ctx'> /* Bits in local_flags */</div><div class='hunk'>@@ -159,7 +162,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TLF_LAZY_MMU		(1 &lt;&lt; TLF_LAZY_MMU)</div><div class='ctx'> #define _TLF_RUNLATCH		(1 &lt;&lt; TLF_RUNLATCH)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> static inline void clear_thread_local_flags(unsigned int flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -230,7 +233,7 @@ static inline int arch_within_stack_frames(const void * const stack,</div><div class='ctx'> extern void *emergency_ctx[];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif	/* !__ASSEMBLY__ */</div><div class='add'>+#endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h<br/>index 221c8f8ff89b..7991ab1d4cb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/time.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/time.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/time.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/time.h</a></div><div class='hunk'>@@ -29,6 +29,10 @@ extern u64 decrementer_max;</div><div class='ctx'> </div><div class='ctx'> extern void generic_calibrate_decr(void);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_SPLPAR</div><div class='add'>+extern u64 get_boot_tb(void);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Some sane defaults: 125 MHz timebase, 1GHz processor */</div><div class='ctx'> extern unsigned long ppc_proc_freq;</div><div class='ctx'> #define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)</div><div class='hunk'>@@ -86,12 +90,9 @@ static inline unsigned long tb_ticks_since(unsigned long tstamp)</div><div class='ctx'> #define mulhdu(x,y) \</div><div class='ctx'> ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})</div><div class='ctx'> #else</div><div class='del'>-extern u64 mulhdu(u64, u64);</div><div class='add'>+#define mulhdu(x, y)	mul_u64_u64_shr(x, y, 64)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern void div128_by_32(u64 dividend_high, u64 dividend_low,</div><div class='del'>-			 unsigned divisor, struct div_result *dr);</div><div class='del'>-</div><div class='ctx'> extern void secondary_cpu_time_init(void);</div><div class='ctx'> extern void __init time_init(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h<br/>index 1ca7d4c4b90d..2058e8d3e013 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/tlb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/tlb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/tlb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/tlb.h</a></div><div class='hunk'>@@ -37,6 +37,7 @@ extern void tlb_flush(struct mmu_gather *tlb);</div><div class='ctx'>  */</div><div class='ctx'> #define tlb_needs_table_invalidate()	radix_enabled()</div><div class='ctx'> </div><div class='add'>+#define __HAVE_ARCH_TLB_REMOVE_TABLE</div><div class='ctx'> /* Get the generic bits... */</div><div class='ctx'> #include &lt;asm-generic/tlb.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/tm.h b/arch/powerpc/include/asm/tm.h<br/>index e94f6db5e367..d700affba448 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/tm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/tm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/tm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/tm.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/tm.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern void tm_reclaim(struct thread_struct *thread,</div><div class='ctx'> 		       uint8_t cause);</div><div class='hunk'>@@ -19,4 +19,4 @@ extern void tm_restore_sprs(struct thread_struct *thread);</div><div class='ctx'> </div><div class='ctx'> extern bool tm_suspend_disabled;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h<br/>index 16bacfe8c7a2..f19ca44512d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/topology.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/topology.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/topology.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/topology.h</a></div><div class='hunk'>@@ -131,6 +131,8 @@ static inline int cpu_to_coregroup_id(int cpu)</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='ctx'> </div><div class='add'>+struct cpumask *cpu_coregroup_mask(int cpu);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -152,6 +154,7 @@ static inline bool topology_is_primary_thread(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return cpu == cpu_first_thread_sibling(cpu);</div><div class='ctx'> }</div><div class='add'>+#define topology_is_primary_thread topology_is_primary_thread</div><div class='ctx'> </div><div class='ctx'> static inline bool topology_smt_thread_allowed(unsigned int cpu)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h<br/>index 93157a661dcc..55d7ba6d910b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/types.h</a></div><div class='hunk'>@@ -11,10 +11,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> typedef __vector128 vector128;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_TYPES_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h<br/>index 289023f7a656..a8681b12864f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/udbg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/udbg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/udbg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/udbg.h</a></div><div class='hunk'>@@ -38,7 +38,6 @@ void __init udbg_early_init(void);</div><div class='ctx'> void __init udbg_init_debug_lpar(void);</div><div class='ctx'> void __init udbg_init_debug_lpar_hvsi(void);</div><div class='ctx'> void __init udbg_init_pmac_realmode(void);</div><div class='del'>-void __init udbg_init_maple_realmode(void);</div><div class='ctx'> void __init udbg_init_pas_realmode(void);</div><div class='ctx'> void __init udbg_init_rtas_panel(void);</div><div class='ctx'> void __init udbg_init_rtas_console(void);</div><div class='head'>diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h<br/>index 027ef94a12fb..b873fbb6d712 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/unistd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/unistd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/unistd.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #define NR_syscalls	__NR_syscalls</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='hunk'>@@ -52,5 +52,5 @@</div><div class='ctx'> #define __ARCH_WANT_SYS_VFORK</div><div class='ctx'> #define __ARCH_WANT_SYS_CLONE</div><div class='ctx'> </div><div class='del'>-#endif		/* __ASSEMBLY__ */</div><div class='add'>+#endif		/* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_POWERPC_UNISTD_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso.h b/arch/powerpc/include/asm/vdso.h<br/>index 7650b6ce14c8..07af32576072 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso.h</a></div><div class='hunk'>@@ -3,8 +3,9 @@</div><div class='ctx'> #define _ASM_POWERPC_VDSO_H</div><div class='ctx'> </div><div class='ctx'> #define VDSO_VERSION_STRING	LINUX_2.6.15</div><div class='add'>+#define __VDSO_PAGES		4</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> #include &lt;generated/vdso64-offsets.h&gt;</div><div class='hunk'>@@ -20,11 +21,12 @@</div><div class='ctx'> </div><div class='ctx'> int vdso_getcpu_init(void);</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #ifdef __VDSO64__</div><div class='ctx'> #define V_FUNCTION_BEGIN(name)		\</div><div class='ctx'> 	.globl name;			\</div><div class='add'>+	.type name,@function; 		\</div><div class='ctx'> 	name:				\</div><div class='ctx'> </div><div class='ctx'> #define V_FUNCTION_END(name)		\</div><div class='hunk'>@@ -47,6 +49,6 @@ int vdso_getcpu_init(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __VDSO32__ */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_VDSO_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/arch_data.h b/arch/powerpc/include/asm/vdso/arch_data.h<br/>new file mode 100644<br/>index 000000000000..c240a6b87518<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/arch_data.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso/arch_data.h</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2002 Peter Bergner &lt;bergner@vnet.ibm.com&gt;, IBM</div><div class='add'>+ * Copyright (C) 2005 Benjamin Herrenschmidy &lt;benh@kernel.crashing.org&gt;,</div><div class='add'>+ * 		      IBM Corp.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ASM_POWERPC_VDSO_ARCH_DATA_H</div><div class='add'>+#define _ASM_POWERPC_VDSO_ARCH_DATA_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define SYSCALL_MAP_SIZE      ((NR_syscalls + 31) / 32)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+</div><div class='add'>+struct vdso_arch_data {</div><div class='add'>+	__u64 tb_ticks_per_sec;			/* Timebase tics / sec */</div><div class='add'>+	__u32 dcache_block_size;		/* L1 d-cache block size     */</div><div class='add'>+	__u32 icache_block_size;		/* L1 i-cache block size     */</div><div class='add'>+	__u32 dcache_log_block_size;		/* L1 d-cache log block size */</div><div class='add'>+	__u32 icache_log_block_size;		/* L1 i-cache log block size */</div><div class='add'>+	__u32 syscall_map[SYSCALL_MAP_SIZE];	/* Map of syscalls  */</div><div class='add'>+	__u32 compat_syscall_map[SYSCALL_MAP_SIZE];	/* Map of compat syscalls */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_PPC64 */</div><div class='add'>+</div><div class='add'>+struct vdso_arch_data {</div><div class='add'>+	__u64 tb_ticks_per_sec;		/* Timebase tics / sec */</div><div class='add'>+	__u32 syscall_map[SYSCALL_MAP_SIZE]; /* Map of syscalls */</div><div class='add'>+	__u32 compat_syscall_map[0];	/* No compat syscalls on PPC32 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_PPC64 */</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_POWERPC_VDSO_ARCH_DATA_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/getrandom.h b/arch/powerpc/include/asm/vdso/getrandom.h<br/>index 501d6bb14e8a..4c24976061f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/getrandom.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/getrandom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/getrandom.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso/getrandom.h</a></div><div class='hunk'>@@ -5,7 +5,9 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_VDSO_GETRANDOM_H</div><div class='ctx'> #define _ASM_POWERPC_VDSO_GETRANDOM_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+</div><div class='add'>+#include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __always_inline int do_syscall_3(const unsigned long _r0, const unsigned long _r3,</div><div class='ctx'> 					const unsigned long _r4, const unsigned long _r5)</div><div class='hunk'>@@ -41,14 +43,25 @@ static __always_inline ssize_t getrandom_syscall(void *buffer, size_t len, unsig</div><div class='ctx'> 			    (unsigned long)len, (unsigned long)flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline struct vdso_rng_data *__arch_get_vdso_rng_data(void)</div><div class='add'>+static __always_inline const struct vdso_rng_data *__arch_get_vdso_u_rng_data(void)</div><div class='ctx'> {</div><div class='del'>-	return NULL;</div><div class='add'>+	struct vdso_rng_data *data;</div><div class='add'>+</div><div class='add'>+	asm (</div><div class='add'>+		"	bcl	20, 31, .+4 ;"</div><div class='add'>+		"0:	mflr	%0 ;"</div><div class='add'>+		"	addis	%0, %0, (vdso_u_rng_data - 0b)@ha ;"</div><div class='add'>+		"	addi	%0, %0, (vdso_u_rng_data - 0b)@l  ;"</div><div class='add'>+		: "=r" (data) : : "lr"</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='ctx'> }</div><div class='add'>+#define __arch_get_vdso_u_rng_data __arch_get_vdso_u_rng_data</div><div class='ctx'> </div><div class='ctx'> ssize_t __c_kernel_getrandom(void *buffer, size_t len, unsigned int flags, void *opaque_state,</div><div class='del'>-			     size_t opaque_len, const struct vdso_rng_data *vd);</div><div class='add'>+			     size_t opaque_len);</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_VDSO_GETRANDOM_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/gettimeofday.h b/arch/powerpc/include/asm/vdso/gettimeofday.h<br/>index c6390890a60c..ab3df12c8d94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/gettimeofday.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> #define _ASM_POWERPC_VDSO_GETTIMEOFDAY_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/vdso/timebase.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='hunk'>@@ -94,22 +94,12 @@ int clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='del'>-						 const struct vdso_data *vd)</div><div class='add'>+						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return get_tb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct vdso_data *__arch_get_vdso_data(void);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-static __always_inline</div><div class='del'>-const struct vdso_data *__arch_get_timens_vdso_data(const struct vdso_data *vd)</div><div class='del'>-{</div><div class='del'>-	return (void *)vd + (1U &lt;&lt; CONFIG_PAGE_SHIFT);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline bool vdso_clocksource_ok(const struct vdso_data *vd)</div><div class='add'>+static inline bool vdso_clocksource_ok(const struct vdso_clock *vc)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -135,21 +125,22 @@ static __always_inline u64 vdso_shift_ns(u64 ns, unsigned long shift)</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='ctx'> int __c_kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts,</div><div class='del'>-			     const struct vdso_data *vd);</div><div class='add'>+			     const struct vdso_time_data *vd);</div><div class='ctx'> int __c_kernel_clock_getres(clockid_t clock_id, struct __kernel_timespec *res,</div><div class='del'>-			    const struct vdso_data *vd);</div><div class='add'>+			    const struct vdso_time_data *vd);</div><div class='ctx'> #else</div><div class='ctx'> int __c_kernel_clock_gettime(clockid_t clock, struct old_timespec32 *ts,</div><div class='del'>-			     const struct vdso_data *vd);</div><div class='add'>+			     const struct vdso_time_data *vd);</div><div class='ctx'> int __c_kernel_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts,</div><div class='del'>-			       const struct vdso_data *vd);</div><div class='add'>+			       const struct vdso_time_data *vd);</div><div class='ctx'> int __c_kernel_clock_getres(clockid_t clock_id, struct old_timespec32 *res,</div><div class='del'>-			    const struct vdso_data *vd);</div><div class='add'>+			    const struct vdso_time_data *vd);</div><div class='ctx'> #endif</div><div class='ctx'> int __c_kernel_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz,</div><div class='del'>-			    const struct vdso_data *vd);</div><div class='add'>+			    const struct vdso_time_data *vd);</div><div class='ctx'> __kernel_old_time_t __c_kernel_time(__kernel_old_time_t *time,</div><div class='del'>-				    const struct vdso_data *vd);</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+				    const struct vdso_time_data *vd);</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_VDSO_GETTIMEOFDAY_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/processor.h b/arch/powerpc/include/asm/vdso/processor.h<br/>index 80d13207c568..c1f3d7aaf3ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/processor.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/processor.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso/processor.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_VDSO_PROCESSOR_H</div><div class='ctx'> #define _ASM_POWERPC_VDSO_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /* Macros for adjusting thread priority (hardware multi-threading) */</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='hunk'>@@ -33,6 +33,6 @@</div><div class='ctx'> #define cpu_relax()	barrier()</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_VDSO_PROCESSOR_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso/vsyscall.h b/arch/powerpc/include/asm/vdso/vsyscall.h<br/>index 92f480d8cc6d..bee18e8660a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/vsyscall.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso/vsyscall.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso/vsyscall.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso/vsyscall.h</a></div><div class='hunk'>@@ -2,30 +2,13 @@</div><div class='ctx'> #ifndef _ASM_POWERPC_VDSO_VSYSCALL_H</div><div class='ctx'> #define _ASM_POWERPC_VDSO_VSYSCALL_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> #include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Update the vDSO data page to keep in sync with kernel timekeeping.</div><div class='del'>- */</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_data *__arch_get_k_vdso_data(void)</div><div class='del'>-{</div><div class='del'>-	return vdso_data-&gt;data;</div><div class='del'>-}</div><div class='del'>-#define __arch_get_k_vdso_data __arch_get_k_vdso_data</div><div class='del'>-</div><div class='del'>-static __always_inline</div><div class='del'>-struct vdso_rng_data *__arch_get_k_vdso_rng_data(void)</div><div class='del'>-{</div><div class='del'>-	return &amp;vdso_data-&gt;rng_data;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* The asm-generic header needs to be included after the definitions above */</div><div class='ctx'> #include &lt;asm-generic/vdso/vsyscall.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='add'>+#endif /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_POWERPC_VDSO_VSYSCALL_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h<br/>index 248dee138f7b..441264af0e36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso_datapage.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vdso_datapage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vdso_datapage.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vdso_datapage.h</a></div><div class='hunk'>@@ -9,126 +9,21 @@</div><div class='ctx'>  * 		      IBM Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Note about this structure:</div><div class='del'>- *</div><div class='del'>- * This structure was historically called systemcfg and exposed to</div><div class='del'>- * userland via /proc/ppc64/systemcfg. Unfortunately, this became an</div><div class='del'>- * ABI issue as some proprietary software started relying on being able</div><div class='del'>- * to mmap() it, thus we have to keep the base layout at least for a</div><div class='del'>- * few kernel versions.</div><div class='del'>- *</div><div class='del'>- * However, since ppc32 doesn't suffer from this backward handicap,</div><div class='del'>- * a simpler version of the data structure is used there with only the</div><div class='del'>- * fields actually used by the vDSO.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If the major version changes we are incompatible.</div><div class='del'>- * Minor version changes are a hint.</div><div class='del'>- */</div><div class='del'>-#define SYSTEMCFG_MAJOR 1</div><div class='del'>-#define SYSTEMCFG_MINOR 1</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/unistd.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='del'>-#define SYSCALL_MAP_SIZE      ((NR_syscalls + 31) / 32)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * So here is the ppc64 backward compatible version</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC64</div><div class='del'>-</div><div class='del'>-struct vdso_arch_data {</div><div class='del'>-	__u8  eye_catcher[16];		/* Eyecatcher: SYSTEMCFG:PPC64	0x00 */</div><div class='del'>-	struct {			/* Systemcfg version numbers	     */</div><div class='del'>-		__u32 major;		/* Major number			0x10 */</div><div class='del'>-		__u32 minor;		/* Minor number			0x14 */</div><div class='del'>-	} version;</div><div class='del'>-</div><div class='del'>-	/* Note about the platform flags: it now only contains the lpar</div><div class='del'>-	 * bit. The actual platform number is dead and buried</div><div class='del'>-	 */</div><div class='del'>-	__u32 platform;			/* Platform flags		0x18 */</div><div class='del'>-	__u32 processor;		/* Processor type		0x1C */</div><div class='del'>-	__u64 processorCount;		/* # of physical processors	0x20 */</div><div class='del'>-	__u64 physicalMemorySize;	/* Size of real memory(B)	0x28 */</div><div class='del'>-	__u64 tb_orig_stamp;		/* (NU) Timebase at boot	0x30 */</div><div class='del'>-	__u64 tb_ticks_per_sec;		/* Timebase tics / sec		0x38 */</div><div class='del'>-	__u64 tb_to_xs;			/* (NU) Inverse of TB to 2^20	0x40 */</div><div class='del'>-	__u64 stamp_xsec;		/* (NU)				0x48 */</div><div class='del'>-	__u64 tb_update_count;		/* (NU) Timebase atomicity ctr	0x50 */</div><div class='del'>-	__u32 tz_minuteswest;		/* (NU) Min. west of Greenwich	0x58 */</div><div class='del'>-	__u32 tz_dsttime;		/* (NU) Type of dst correction	0x5C */</div><div class='del'>-	__u32 dcache_size;		/* L1 d-cache size		0x60 */</div><div class='del'>-	__u32 dcache_line_size;		/* L1 d-cache line size		0x64 */</div><div class='del'>-	__u32 icache_size;		/* L1 i-cache size		0x68 */</div><div class='del'>-	__u32 icache_line_size;		/* L1 i-cache line size		0x6C */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-	/* those additional ones don't have to be located anywhere</div><div class='del'>-	 * special as they were not part of the original systemcfg</div><div class='del'>-	 */</div><div class='del'>-	__u32 dcache_block_size;		/* L1 d-cache block size     */</div><div class='del'>-	__u32 icache_block_size;		/* L1 i-cache block size     */</div><div class='del'>-	__u32 dcache_log_block_size;		/* L1 d-cache log block size */</div><div class='del'>-	__u32 icache_log_block_size;		/* L1 i-cache log block size */</div><div class='del'>-	__u32 syscall_map[SYSCALL_MAP_SIZE];	/* Map of syscalls  */</div><div class='del'>-	__u32 compat_syscall_map[SYSCALL_MAP_SIZE];	/* Map of compat syscalls */</div><div class='del'>-</div><div class='del'>-	struct vdso_data data[CS_BASES];</div><div class='del'>-	struct vdso_rng_data rng_data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_PPC64 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * And here is the simpler 32 bits version</div><div class='del'>- */</div><div class='del'>-struct vdso_arch_data {</div><div class='del'>-	__u64 tb_ticks_per_sec;		/* Timebase tics / sec		0x38 */</div><div class='del'>-	__u32 syscall_map[SYSCALL_MAP_SIZE]; /* Map of syscalls */</div><div class='del'>-	__u32 compat_syscall_map[0];	/* No compat syscalls on PPC32 */</div><div class='del'>-	struct vdso_data data[CS_BASES];</div><div class='del'>-	struct vdso_rng_data rng_data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_PPC64 */</div><div class='del'>-</div><div class='del'>-extern struct vdso_arch_data *vdso_data;</div><div class='del'>-</div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-.macro get_datapage ptr</div><div class='add'>+.macro get_datapage ptr symbol</div><div class='ctx'> 	bcl	20, 31, .+4</div><div class='ctx'> 999:</div><div class='ctx'> 	mflr	\ptr</div><div class='del'>-	addis	\ptr, \ptr, (_vdso_datapage - 999b)@ha</div><div class='del'>-	addi	\ptr, \ptr, (_vdso_datapage - 999b)@l</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-</div><div class='del'>-.macro get_realdatapage ptr scratch</div><div class='del'>-	get_datapage \ptr</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	lwz	\scratch, VDSO_CLOCKMODE_OFFSET(\ptr)</div><div class='del'>-	xoris	\scratch, \scratch, VDSO_CLOCKMODE_TIMENS@h</div><div class='del'>-	xori	\scratch, \scratch, VDSO_CLOCKMODE_TIMENS@l</div><div class='del'>-	cntlzw	\scratch, \scratch</div><div class='del'>-	rlwinm	\scratch, \scratch, PAGE_SHIFT - 5, 1 &lt;&lt; PAGE_SHIFT</div><div class='del'>-	add	\ptr, \ptr, \scratch</div><div class='del'>-#endif</div><div class='add'>+	addis	\ptr, \ptr, (\symbol - 999b)@ha</div><div class='add'>+	addi	\ptr, \ptr, (\symbol - 999b)@l</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _SYSTEMCFG_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vga.h b/arch/powerpc/include/asm/vga.h<br/>index fcf721682a71..f2dc40e1c52a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vga.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/vga.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/vga.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/vga.h</a></div><div class='hunk'>@@ -40,11 +40,6 @@ static inline void scr_memsetw(u16 *s, u16 v, unsigned int n)</div><div class='ctx'> 	memset16(s, cpu_to_le16(v), n / 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define VT_BUF_HAVE_MEMCPYW</div><div class='del'>-#define VT_BUF_HAVE_MEMMOVEW</div><div class='del'>-#define scr_memcpyw	memcpy</div><div class='del'>-#define scr_memmovew	memmove</div><div class='del'>-</div><div class='ctx'> #endif /* !CONFIG_VGA_CONSOLE &amp;&amp; !CONFIG_MDA_CONSOLE */</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='head'>diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h<br/>index 89090485bec1..60ef312dab05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xics.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xics.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xics.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/xics.h</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #ifdef CONFIG_PPC_ICP_NATIVE</div><div class='ctx'> extern int icp_native_init(void);</div><div class='ctx'> extern void icp_native_flush_interrupt(void);</div><div class='del'>-extern void icp_native_cause_ipi_rm(int cpu);</div><div class='ctx'> #else</div><div class='ctx'> static inline int icp_native_init(void) { return -ENODEV; }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/xive.h b/arch/powerpc/include/asm/xive.h<br/>index 92930b0b5d0e..efb0f5effcc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xive.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xive.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xive.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/xive.h</a></div><div class='hunk'>@@ -111,7 +111,6 @@ void xive_native_free_vp_block(u32 vp_base);</div><div class='ctx'> int xive_native_populate_irq_data(u32 hw_irq,</div><div class='ctx'> 				  struct xive_irq_data *data);</div><div class='ctx'> void xive_cleanup_irq_data(struct xive_irq_data *xd);</div><div class='del'>-void xive_irq_free_data(unsigned int virq);</div><div class='ctx'> void xive_native_free_irq(u32 irq);</div><div class='ctx'> int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/xmon.h b/arch/powerpc/include/asm/xmon.h<br/>index f2d44b44f46c..535cdb1e411a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xmon.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/asm/xmon.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/asm/xmon.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/asm/xmon.h</a></div><div class='hunk'>@@ -12,13 +12,11 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_XMON</div><div class='ctx'> extern void xmon_setup(void);</div><div class='del'>-void __init xmon_register_spus(struct list_head *list);</div><div class='ctx'> struct pt_regs;</div><div class='ctx'> extern int xmon(struct pt_regs *excp);</div><div class='ctx'> extern irqreturn_t xmon_irq(int, void *);</div><div class='ctx'> #else</div><div class='ctx'> static inline void xmon_setup(void) { }</div><div class='del'>-static inline void xmon_register_spus(struct list_head *list) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_XMON) &amp;&amp; defined(CONFIG_SMP)</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/eeh.h b/arch/powerpc/include/uapi/asm/eeh.h<br/>index 28186071fafc..3b5c47ff3fc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/eeh.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/eeh.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/eeh.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/eeh.h</a></div><div class='hunk'>@@ -1,18 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- *</div><div class='ctx'>  * Copyright IBM Corp. 2015</div><div class='ctx'>  *</div><div class='ctx'>  * Authors: Gavin Shan &lt;gwshan@linux.vnet.ibm.com&gt;</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/ioctls.h b/arch/powerpc/include/uapi/asm/ioctls.h<br/>index 2c145da3b774..b5211e413829 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ioctls.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ioctls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ioctls.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/ioctls.h</a></div><div class='hunk'>@@ -23,10 +23,10 @@</div><div class='ctx'> #define TCSETSW		_IOW('t', 21, struct termios)</div><div class='ctx'> #define TCSETSF		_IOW('t', 22, struct termios)</div><div class='ctx'> </div><div class='del'>-#define TCGETA		_IOR('t', 23, struct termio)</div><div class='del'>-#define TCSETA		_IOW('t', 24, struct termio)</div><div class='del'>-#define TCSETAW		_IOW('t', 25, struct termio)</div><div class='del'>-#define TCSETAF		_IOW('t', 28, struct termio)</div><div class='add'>+#define TCGETA		0x40147417 /* _IOR('t', 23, struct termio) */</div><div class='add'>+#define TCSETA		0x80147418 /* _IOW('t', 24, struct termio) */</div><div class='add'>+#define TCSETAW		0x80147419 /* _IOW('t', 25, struct termio) */</div><div class='add'>+#define TCSETAF		0x8014741c /* _IOW('t', 28, struct termio) */</div><div class='ctx'> </div><div class='ctx'> #define TCSBRK		_IO('t', 29)</div><div class='ctx'> #define TCXONC		_IO('t', 30)</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h<br/>index eaeda001784e..077c5437f521 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/kvm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/kvm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -1,18 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- *</div><div class='ctx'>  * Copyright IBM Corp. 2007</div><div class='ctx'>  *</div><div class='ctx'>  * Authors: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/kvm_para.h b/arch/powerpc/include/uapi/asm/kvm_para.h<br/>index a809b1b44ddf..ac596064d4c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/kvm_para.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/kvm_para.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/kvm_para.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/kvm_para.h</a></div><div class='hunk'>@@ -1,18 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- *</div><div class='ctx'>  * Copyright IBM Corp. 2008</div><div class='ctx'>  *</div><div class='ctx'>  * Authors: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/opal-prd.h b/arch/powerpc/include/uapi/asm/opal-prd.h<br/>index 1869cf83a870..11abcf0192ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/opal-prd.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/opal-prd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/opal-prd.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/opal-prd.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> #define OPAL_PRD_SCOM_READ		_IOR('o', 0x02, struct opal_prd_scom)</div><div class='ctx'> #define OPAL_PRD_SCOM_WRITE		_IOW('o', 0x03, struct opal_prd_scom)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct opal_prd_info {</div><div class='ctx'> 	__u64	version;</div><div class='hunk'>@@ -54,6 +54,6 @@ struct opal_prd_scom {</div><div class='ctx'> 	__s64	rc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_POWERPC_OPAL_PRD_H */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-hvpipe.h b/arch/powerpc/include/uapi/asm/papr-hvpipe.h<br/>new file mode 100644<br/>index 000000000000..f8794139d06a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/papr-hvpipe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/papr-hvpipe.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_HVPIPE_H_</div><div class='add'>+#define _UAPI_PAPR_HVPIPE_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This header is included in payload between OS and the user</div><div class='add'>+ * space.</div><div class='add'>+ * flags: OS notifies the user space whether the hvpipe is</div><div class='add'>+ *        closed or the buffer has the payload.</div><div class='add'>+ */</div><div class='add'>+struct papr_hvpipe_hdr {</div><div class='add'>+	__u8 version;</div><div class='add'>+	__u8 reserved[3];</div><div class='add'>+	__u32 flags;</div><div class='add'>+	__u8 reserved2[40];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctl for /dev/papr-hvpipe</div><div class='add'>+ */</div><div class='add'>+#define PAPR_HVPIPE_IOC_CREATE_HANDLE	_IOW(PAPR_MISCDEV_IOC_ID, 9, __u32)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * hvpipe_hdr flags used for read()</div><div class='add'>+ */</div><div class='add'>+#define HVPIPE_MSG_AVAILABLE	0x01 /* Payload is available */</div><div class='add'>+#define HVPIPE_LOST_CONNECTION	0x02 /* Pipe connection is closed/unavailable */</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_HVPIPE_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-indices.h b/arch/powerpc/include/uapi/asm/papr-indices.h<br/>new file mode 100644<br/>index 000000000000..c2999d89d52a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/papr-indices.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/papr-indices.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_INDICES_H_</div><div class='add'>+#define _UAPI_PAPR_INDICES_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+#define LOC_CODE_SIZE			80</div><div class='add'>+#define RTAS_GET_INDICES_BUF_SIZE	SZ_4K</div><div class='add'>+</div><div class='add'>+struct papr_indices_io_block {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__u8 is_sensor; /* 0 for indicator and 1 for sensor */</div><div class='add'>+			__u32 indice_type;</div><div class='add'>+		} indices;</div><div class='add'>+		struct {</div><div class='add'>+			__u32 token; /* Sensor or indicator token */</div><div class='add'>+			__u32 state; /* get / set state */</div><div class='add'>+			/*</div><div class='add'>+			 * PAPR+ 12.3.2.4 Converged Location Code Rules - Length</div><div class='add'>+			 * Restrictions. 79 characters plus null.</div><div class='add'>+			 */</div><div class='add'>+			char location_code_str[LOC_CODE_SIZE]; /* location code */</div><div class='add'>+		} dynamic_param;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctls for /dev/papr-indices.</div><div class='add'>+ * PAPR_INDICES_IOC_GET: Returns a get-indices handle fd to read data</div><div class='add'>+ * PAPR_DYNAMIC_SENSOR_IOC_GET: Gets the state of the input sensor</div><div class='add'>+ * PAPR_DYNAMIC_INDICATOR_IOC_SET: Sets the new state for the input indicator</div><div class='add'>+ */</div><div class='add'>+#define PAPR_INDICES_IOC_GET		_IOW(PAPR_MISCDEV_IOC_ID, 3, struct papr_indices_io_block)</div><div class='add'>+#define PAPR_DYNAMIC_SENSOR_IOC_GET	_IOWR(PAPR_MISCDEV_IOC_ID, 4, struct papr_indices_io_block)</div><div class='add'>+#define PAPR_DYNAMIC_INDICATOR_IOC_SET	_IOW(PAPR_MISCDEV_IOC_ID, 5, struct papr_indices_io_block)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_INDICES_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-physical-attestation.h b/arch/powerpc/include/uapi/asm/papr-physical-attestation.h<br/>new file mode 100644<br/>index 000000000000..ea746837bb9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/papr-physical-attestation.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/papr-physical-attestation.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_PHYSICAL_ATTESTATION_H_</div><div class='add'>+#define _UAPI_PAPR_PHYSICAL_ATTESTATION_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+#define PAPR_PHYATTEST_MAX_INPUT 4084 /* Max 4K buffer: 4K-12 */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Defined in PAPR 2.13+ 21.6 Attestation Command Structures.</div><div class='add'>+ * User space pass this struct and the max size should be 4K.</div><div class='add'>+ */</div><div class='add'>+struct papr_phy_attest_io_block {</div><div class='add'>+	__u8 version;</div><div class='add'>+	__u8 command;</div><div class='add'>+	__u8 TCG_major_ver;</div><div class='add'>+	__u8 TCG_minor_ver;</div><div class='add'>+	__be32 length;</div><div class='add'>+	__be32 correlator;</div><div class='add'>+	__u8 payload[PAPR_PHYATTEST_MAX_INPUT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctl for /dev/papr-physical-attestation. Returns a attestation</div><div class='add'>+ * command fd handle</div><div class='add'>+ */</div><div class='add'>+#define PAPR_PHY_ATTEST_IOC_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 8, struct papr_phy_attest_io_block)</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_PHYSICAL_ATTESTATION_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-platform-dump.h b/arch/powerpc/include/uapi/asm/papr-platform-dump.h<br/>new file mode 100644<br/>index 000000000000..8a1c060e89a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/papr-platform-dump.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/papr-platform-dump.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_PLATFORM_DUMP_H_</div><div class='add'>+#define _UAPI_PAPR_PLATFORM_DUMP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctl for /dev/papr-platform-dump. Returns a platform-dump handle fd</div><div class='add'>+ * corresponding to dump tag.</div><div class='add'>+ */</div><div class='add'>+#define PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 6, __u64)</div><div class='add'>+#define PAPR_PLATFORM_DUMP_IOC_INVALIDATE    _IOW(PAPR_MISCDEV_IOC_ID, 7, __u64)</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_PLATFORM_DUMP_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/ps3fb.h b/arch/powerpc/include/uapi/asm/ps3fb.h<br/>index fd7e3a0d35d5..b1c6b0cd9e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ps3fb.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ps3fb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ps3fb.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/ps3fb.h</a></div><div class='hunk'>@@ -2,19 +2,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2006 Sony Computer Entertainment Inc.</div><div class='ctx'>  * Copyright 2006, 2007 Sony Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _ASM_POWERPC_PS3FB_H_</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/ptrace.h b/arch/powerpc/include/uapi/asm/ptrace.h<br/>index 7004cfea3f5f..01e630149d48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ptrace.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/ptrace.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/ptrace.h</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> struct user_pt_regs</div><div class='hunk'>@@ -57,7 +57,7 @@ struct pt_regs</div><div class='ctx'> 	unsigned long result;		/* Result of a system call */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -200,7 +200,7 @@ struct pt_regs</div><div class='ctx'> #define PPC_PTRACE_SETHWDEBUG	0x88</div><div class='ctx'> #define PPC_PTRACE_DELHWDEBUG	0x87</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct ppc_debug_info {</div><div class='ctx'> 	__u32 version;			/* Only version 1 exists to date */</div><div class='hunk'>@@ -212,7 +212,7 @@ struct ppc_debug_info {</div><div class='ctx'> 	__u64 features;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * features will have bits indication whether there is support for:</div><div class='hunk'>@@ -224,7 +224,7 @@ struct ppc_debug_info {</div><div class='ctx'> #define PPC_DEBUG_FEATURE_DATA_BP_DAWR		0x0000000000000010</div><div class='ctx'> #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31	0x0000000000000020</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct ppc_hw_breakpoint {</div><div class='ctx'> 	__u32 version;		/* currently, version must be 1 */</div><div class='hunk'>@@ -236,7 +236,7 @@ struct ppc_hw_breakpoint {</div><div class='ctx'> 	__u64 condition_value;	/* contents of the DVC register */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Trigger Type</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/types.h b/arch/powerpc/include/uapi/asm/types.h<br/>index 327616fb70e4..9dbf55e38ea5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/types.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/include/uapi/asm/types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/include/uapi/asm/types.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/include/uapi/asm/types.h</a></div><div class='hunk'>@@ -28,14 +28,14 @@</div><div class='ctx'> # include &lt;asm-generic/int-ll64.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='ctx'> 	__u32 u[4];</div><div class='ctx'> } __attribute__((aligned(16))) __vector128;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif /* _UAPI_ASM_POWERPC_TYPES_H */</div><div class='head'>diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile<br/>index f43c1198768c..2f0a2e69c607 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/Makefile</a></div><div class='hunk'>@@ -70,7 +70,7 @@ obj-y				:= cputable.o syscalls.o switch.o \</div><div class='ctx'> 				   signal.o sysfs.o cacheinfo.o time.o \</div><div class='ctx'> 				   prom.o traps.o setup-common.o \</div><div class='ctx'> 				   udbg.o misc.o io.o misc_$(BITS).o \</div><div class='del'>-				   of_platform.o prom_parse.o firmware.o \</div><div class='add'>+				   prom_parse.o firmware.o \</div><div class='ctx'> 				   hw_breakpoint_constraints.o interrupt.o \</div><div class='ctx'> 				   kdebugfs.o stacktrace.o syscall.o</div><div class='ctx'> obj-y				+= ptrace/</div><div class='hunk'>@@ -126,7 +126,7 @@ obj-$(CONFIG_PPC_BOOK3S_32)	+= head_book3s_32.o</div><div class='ctx'> obj-$(CONFIG_44x)		+= head_44x.o</div><div class='ctx'> obj-$(CONFIG_PPC_8xx)		+= head_8xx.o</div><div class='ctx'> obj-$(CONFIG_PPC_85xx)		+= head_85xx.o</div><div class='del'>-extra-y				+= vmlinux.lds</div><div class='add'>+always-$(KBUILD_BUILTIN)	+= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_RELOCATABLE)	+= reloc_$(BITS).o</div><div class='ctx'> </div><div class='hunk'>@@ -152,8 +152,6 @@ obj-$(CONFIG_PCI_MSI)		+= msi.o</div><div class='ctx'> obj-$(CONFIG_AUDIT)		+= audit.o</div><div class='ctx'> obj64-$(CONFIG_AUDIT)		+= compat_audit.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_PPC_IO_WORKAROUNDS)	+= io-workarounds.o</div><div class='del'>-</div><div class='ctx'> obj-y				+= trace/</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_PPC_INDIRECT_PIO),y)</div><div class='hunk'>@@ -162,9 +160,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM)	+= tm.o</div><div class='ctx'> </div><div class='del'>-ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC_CORE)(CONFIG_PPC_BOOK3S),)</div><div class='ctx'> obj-y				+= ppc_save_regs.o</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EPAPR_PARAVIRT)	+= epapr_paravirt.o epapr_hcalls.o</div><div class='ctx'> obj-$(CONFIG_KVM_GUEST)		+= kvm.o kvm_emul.o</div><div class='hunk'>@@ -203,7 +199,9 @@ obj-$(CONFIG_ALTIVEC)		+= vector.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o</div><div class='ctx'> obj64-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_entry_64.o</div><div class='del'>-extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check</div><div class='add'>+ifdef KBUILD_BUILTIN</div><div class='add'>+always-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC64)		+= $(obj64-y)</div><div class='ctx'> obj-$(CONFIG_PPC32)		+= $(obj32-y)</div><div class='head'>diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c<br/>index 131a8cc10dbe..a4bc80b30410 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/asm-offsets.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/asm-offsets.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  * compile this file to assembler, and then extract the</div><div class='ctx'>  * #defines from the assembly-language output.</div><div class='ctx'>  */</div><div class='add'>+#define COMPILE_OFFSETS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='hunk'>@@ -334,8 +335,6 @@ int main(void)</div><div class='ctx'> #endif /* ! CONFIG_PPC64 */</div><div class='ctx'> </div><div class='ctx'> 	/* datapage offsets for use by vdso */</div><div class='del'>-	OFFSET(VDSO_DATA_OFFSET, vdso_arch_data, data);</div><div class='del'>-	OFFSET(VDSO_RNG_DATA_OFFSET, vdso_arch_data, rng_data);</div><div class='ctx'> 	OFFSET(CFG_TB_TICKS_PER_SEC, vdso_arch_data, tb_ticks_per_sec);</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	OFFSET(CFG_ICACHE_BLOCKSZ, vdso_arch_data, icache_block_size);</div><div class='hunk'>@@ -347,8 +346,6 @@ int main(void)</div><div class='ctx'> #else</div><div class='ctx'> 	OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, syscall_map);</div><div class='ctx'> #endif</div><div class='del'>-	OFFSET(VDSO_CLOCKMODE_OFFSET, vdso_arch_data, data[0].clock_mode);</div><div class='del'>-	DEFINE(VDSO_CLOCKMODE_TIMENS, VDSO_CLOCKMODE_TIMENS);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BUG</div><div class='ctx'> 	DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));</div><div class='hunk'>@@ -597,7 +594,6 @@ int main(void)</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_DABR, dabr);</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_DECEXP, dec_expires);</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);</div><div class='del'>-	DEFINE(IPI_PRIORITY, IPI_PRIORITY);</div><div class='ctx'> 	OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);</div><div class='ctx'> 	OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);</div><div class='ctx'> 	OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);</div><div class='hunk'>@@ -677,5 +673,16 @@ int main(void)</div><div class='ctx'> 	DEFINE(BPT_SIZE, BPT_SIZE);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	DEFINE(FTRACE_OOL_STUB_SIZE, sizeof(struct ftrace_ool_stub));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+	OFFSET(FTRACE_OPS_FUNC, ftrace_ops, func);</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	OFFSET(FTRACE_OPS_DIRECT_CALL, ftrace_ops, direct_call);</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c<br/>index 2086fa6cdc25..103b6605dd68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/crash_dump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/crash_dump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/crash_dump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/crash_dump.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/kdump.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/uio.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c<br/>index f0ae39e77e37..0359ab72cd3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/dma-iommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/dma-iommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/dma-iommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/dma-iommu.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #define can_map_direct(dev, addr) \</div><div class='ctx'> 	((dev)-&gt;bus_dma_limit &gt;= phys_to_dma((dev), (addr)))</div><div class='ctx'> </div><div class='del'>-bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr)</div><div class='add'>+bool arch_dma_map_phys_direct(struct device *dev, phys_addr_t addr)</div><div class='ctx'> {</div><div class='ctx'> 	if (likely(!dev-&gt;bus_dma_limit))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -24,7 +24,7 @@ bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr)</div><div class='ctx'> </div><div class='ctx'> #define is_direct_handle(dev, h) ((h) &gt;= (dev)-&gt;archdata.dma_offset)</div><div class='ctx'> </div><div class='del'>-bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle)</div><div class='add'>+bool arch_dma_unmap_phys_direct(struct device *dev, dma_addr_t dma_handle)</div><div class='ctx'> {</div><div class='ctx'> 	if (likely(!dev-&gt;bus_dma_limit))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -136,7 +136,7 @@ static bool dma_iommu_bypass_supported(struct device *dev, u64 mask)</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='ctx'> 	struct pci_controller *phb = pci_bus_to_host(pdev-&gt;bus);</div><div class='ctx'> </div><div class='del'>-	if (iommu_fixed_is_weak || !phb-&gt;controller_ops.iommu_bypass_supported)</div><div class='add'>+	if (!phb-&gt;controller_ops.iommu_bypass_supported)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return phb-&gt;controller_ops.iommu_bypass_supported(pdev, mask);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c<br/>index af4263594eb2..3af6c06af02f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/dt_cpu_ftrs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/dt_cpu_ftrs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/dt_cpu_ftrs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/dt_cpu_ftrs.c</a></div><div class='hunk'>@@ -867,7 +867,7 @@ bool __init dt_cpu_ftrs_init(void *fdt)</div><div class='ctx'> 	using_dt_cpu_ftrs = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup and verify the FDT, if it fails we just bail */</div><div class='del'>-	if (!early_init_dt_verify(fdt))</div><div class='add'>+	if (!early_init_dt_verify(fdt, __pa(fdt)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))</div><div class='hunk'>@@ -1087,12 +1087,10 @@ static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char</div><div class='ctx'> 	/* Count and allocate space for cpu features */</div><div class='ctx'> 	of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,</div><div class='ctx'> 						&amp;nr_dt_cpu_features);</div><div class='del'>-	dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);</div><div class='del'>-	if (!dt_cpu_features)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes align=0x%lx\n",</div><div class='del'>-		      __func__,</div><div class='del'>-		      sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,</div><div class='del'>-		      PAGE_SIZE);</div><div class='add'>+	dt_cpu_features =</div><div class='add'>+		memblock_alloc_or_panic(</div><div class='add'>+			sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,</div><div class='add'>+			PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	cpufeatures_setup_start(isa);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c<br/>index 83fe99861eb1..bb836f02101c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/eeh.c</a></div><div class='hunk'>@@ -1139,6 +1139,7 @@ int eeh_unfreeze_pe(struct eeh_pe *pe)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(eeh_unfreeze_pe);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static struct pci_device_id eeh_reset_ids[] = {</div><div class='hunk'>@@ -1208,16 +1209,16 @@ int eeh_dev_open(struct pci_dev *pdev)</div><div class='ctx'> 	struct eeh_dev *edev;</div><div class='ctx'> 	int ret = -ENODEV;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;eeh_dev_mutex);</div><div class='add'>+	guard(mutex)(&amp;eeh_dev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* No PCI device ? */</div><div class='ctx'> 	if (!pdev)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* No EEH device or PE ? */</div><div class='ctx'> 	edev = pci_dev_to_eeh_dev(pdev);</div><div class='ctx'> 	if (!edev || !edev-&gt;pe)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The PE might have been put into frozen state, but we</div><div class='hunk'>@@ -1227,16 +1228,12 @@ int eeh_dev_open(struct pci_dev *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = eeh_pe_change_owner(edev-&gt;pe);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Increase PE's pass through count */</div><div class='ctx'> 	atomic_inc(&amp;edev-&gt;pe-&gt;pass_dev_cnt);</div><div class='del'>-	mutex_unlock(&amp;eeh_dev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;eeh_dev_mutex);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(eeh_dev_open);</div><div class='ctx'> </div><div class='hunk'>@@ -1252,22 +1249,20 @@ void eeh_dev_release(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct eeh_dev *edev;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;eeh_dev_mutex);</div><div class='add'>+	guard(mutex)(&amp;eeh_dev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* No PCI device ? */</div><div class='ctx'> 	if (!pdev)</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* No EEH device ? */</div><div class='ctx'> 	edev = pci_dev_to_eeh_dev(pdev);</div><div class='ctx'> 	if (!edev || !edev-&gt;pe || !eeh_pe_passed(edev-&gt;pe))</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Decrease PE's pass through count */</div><div class='ctx'> 	WARN_ON(atomic_dec_if_positive(&amp;edev-&gt;pe-&gt;pass_dev_cnt) &lt; 0);</div><div class='ctx'> 	eeh_pe_change_owner(edev-&gt;pe);</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;eeh_dev_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(eeh_dev_release);</div><div class='ctx'> </div><div class='hunk'>@@ -1509,6 +1504,8 @@ int eeh_pe_configure(struct eeh_pe *pe)</div><div class='ctx'> 	/* Invalid PE ? */</div><div class='ctx'> 	if (!pe)</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+	else</div><div class='add'>+		ret = eeh_ops-&gt;configure_bridge(pe);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c<br/>index 7efe04c68f0f..ef78ff77cf8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh_driver.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh_driver.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh_driver.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/eeh_driver.c</a></div><div class='hunk'>@@ -257,13 +257,12 @@ static void eeh_pe_report_edev(struct eeh_dev *edev, eeh_report_fn fn,</div><div class='ctx'> 	struct pci_driver *driver;</div><div class='ctx'> 	enum pci_ers_result new_result;</div><div class='ctx'> </div><div class='del'>-	pci_lock_rescan_remove();</div><div class='ctx'> 	pdev = edev-&gt;pdev;</div><div class='ctx'> 	if (pdev)</div><div class='ctx'> 		get_device(&amp;pdev-&gt;dev);</div><div class='del'>-	pci_unlock_rescan_remove();</div><div class='ctx'> 	if (!pdev) {</div><div class='ctx'> 		eeh_edev_info(edev, "no device");</div><div class='add'>+		*result = PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	device_lock(&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -304,8 +303,9 @@ static void eeh_pe_report(const char *name, struct eeh_pe *root,</div><div class='ctx'> 	struct eeh_dev *edev, *tmp;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("EEH: Beginning: '%s'\n", name);</div><div class='del'>-	eeh_for_each_pe(root, pe) eeh_pe_for_each_dev(pe, edev, tmp)</div><div class='del'>-		eeh_pe_report_edev(edev, fn, result);</div><div class='add'>+	eeh_for_each_pe(root, pe)</div><div class='add'>+		eeh_pe_for_each_dev(pe, edev, tmp)</div><div class='add'>+			eeh_pe_report_edev(edev, fn, result);</div><div class='ctx'> 	if (result)</div><div class='ctx'> 		pr_info("EEH: Finished:'%s' with aggregate recovery state:'%s'\n",</div><div class='ctx'> 			name, pci_ers_result_name(*result));</div><div class='hunk'>@@ -334,7 +334,7 @@ static enum pci_ers_result eeh_report_error(struct eeh_dev *edev,</div><div class='ctx'> 	rc = driver-&gt;err_handler-&gt;error_detected(pdev, pci_channel_io_frozen);</div><div class='ctx'> </div><div class='ctx'> 	edev-&gt;in_error = true;</div><div class='del'>-	pci_uevent_ers(pdev, PCI_ERS_RESULT_NONE);</div><div class='add'>+	pci_uevent_ers(pdev, rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -383,6 +383,8 @@ static void eeh_dev_restore_state(struct eeh_dev *edev, void *userdata)</div><div class='ctx'> 	if (!edev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	pci_lock_rescan_remove();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The content in the config space isn't saved because</div><div class='ctx'> 	 * the blocked config space on some adapters. We have</div><div class='hunk'>@@ -393,14 +395,19 @@ static void eeh_dev_restore_state(struct eeh_dev *edev, void *userdata)</div><div class='ctx'> 		if (list_is_last(&amp;edev-&gt;entry, &amp;edev-&gt;pe-&gt;edevs))</div><div class='ctx'> 			eeh_pe_restore_bars(edev-&gt;pe);</div><div class='ctx'> </div><div class='add'>+		pci_unlock_rescan_remove();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pdev = eeh_dev_to_pci_dev(edev);</div><div class='del'>-	if (!pdev)</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pci_unlock_rescan_remove();</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='add'>+</div><div class='add'>+	pci_unlock_rescan_remove();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -647,9 +654,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,</div><div class='ctx'> 	if (any_passed || driver_eeh_aware || (pe-&gt;type &amp; EEH_PE_VF)) {</div><div class='ctx'> 		eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data);</div><div class='ctx'> 	} else {</div><div class='del'>-		pci_lock_rescan_remove();</div><div class='ctx'> 		pci_hp_remove_devices(bus);</div><div class='del'>-		pci_unlock_rescan_remove();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -665,8 +670,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	pci_lock_rescan_remove();</div><div class='del'>-</div><div class='ctx'> 	/* Restore PE */</div><div class='ctx'> 	eeh_ops-&gt;configure_bridge(pe);</div><div class='ctx'> 	eeh_pe_restore_bars(pe);</div><div class='hunk'>@@ -674,7 +677,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,</div><div class='ctx'> 	/* Clear frozen state */</div><div class='ctx'> 	rc = eeh_clear_pe_frozen_state(pe, false);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		pci_unlock_rescan_remove();</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -709,7 +711,6 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,</div><div class='ctx'> 	pe-&gt;tstamp = tstamp;</div><div class='ctx'> 	pe-&gt;freeze_count = cnt;</div><div class='ctx'> </div><div class='del'>-	pci_unlock_rescan_remove();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -843,10 +844,13 @@ void eeh_handle_normal_event(struct eeh_pe *pe)</div><div class='ctx'> 		{LIST_HEAD_INIT(rmv_data.removed_vf_list), 0};</div><div class='ctx'> 	int devices = 0;</div><div class='ctx'> </div><div class='add'>+	pci_lock_rescan_remove();</div><div class='add'>+</div><div class='ctx'> 	bus = eeh_pe_bus_get(pe);</div><div class='ctx'> 	if (!bus) {</div><div class='ctx'> 		pr_err("%s: Cannot find PCI bus for PHB#%x-PE#%x\n",</div><div class='ctx'> 			__func__, pe-&gt;phb-&gt;global_number, pe-&gt;addr);</div><div class='add'>+		pci_unlock_rescan_remove();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -907,7 +911,7 @@ void eeh_handle_normal_event(struct eeh_pe *pe)</div><div class='ctx'> 		/* FIXME: Use the same format as dump_stack() */</div><div class='ctx'> 		pr_err("EEH: Call Trace:\n");</div><div class='ctx'> 		for (i = 0; i &lt; pe-&gt;trace_entries; i++)</div><div class='del'>-			pr_err("EEH: [%pK] %pS\n", ptrs[i], ptrs[i]);</div><div class='add'>+			pr_err("EEH: [%p] %pS\n", ptrs[i], ptrs[i]);</div><div class='ctx'> </div><div class='ctx'> 		pe-&gt;trace_entries = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1094,10 +1098,15 @@ recover_failed:</div><div class='ctx'> 		eeh_pe_state_clear(pe, EEH_PE_PRI_BUS, true);</div><div class='ctx'> 		eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);</div><div class='ctx'> </div><div class='del'>-		pci_lock_rescan_remove();</div><div class='del'>-		pci_hp_remove_devices(bus);</div><div class='del'>-		pci_unlock_rescan_remove();</div><div class='add'>+		bus = eeh_pe_bus_get(pe);</div><div class='add'>+		if (bus)</div><div class='add'>+			pci_hp_remove_devices(bus);</div><div class='add'>+		else</div><div class='add'>+			pr_err("%s: PCI bus for PHB#%x-PE#%x disappeared\n",</div><div class='add'>+				__func__, pe-&gt;phb-&gt;global_number, pe-&gt;addr);</div><div class='add'>+</div><div class='ctx'> 		/* The passed PE should no longer be used */</div><div class='add'>+		pci_unlock_rescan_remove();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1114,6 +1123,8 @@ out:</div><div class='ctx'> 			eeh_clear_slot_attention(edev-&gt;pdev);</div><div class='ctx'> </div><div class='ctx'> 	eeh_pe_state_clear(pe, EEH_PE_RECOVERING, true);</div><div class='add'>+</div><div class='add'>+	pci_unlock_rescan_remove();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1132,6 +1143,7 @@ void eeh_handle_special_event(void)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	pci_lock_rescan_remove();</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		rc = eeh_ops-&gt;next_error(&amp;pe);</div><div class='hunk'>@@ -1171,10 +1183,12 @@ void eeh_handle_special_event(void)</div><div class='ctx'> </div><div class='ctx'> 			break;</div><div class='ctx'> 		case EEH_NEXT_ERR_NONE:</div><div class='add'>+			pci_unlock_rescan_remove();</div><div class='ctx'> 			return;</div><div class='ctx'> 		default:</div><div class='ctx'> 			pr_warn("%s: Invalid value %d from next_error()\n",</div><div class='ctx'> 				__func__, rc);</div><div class='add'>+			pci_unlock_rescan_remove();</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1186,7 +1200,9 @@ void eeh_handle_special_event(void)</div><div class='ctx'> 		if (rc == EEH_NEXT_ERR_FROZEN_PE ||</div><div class='ctx'> 		    rc == EEH_NEXT_ERR_FENCED_PHB) {</div><div class='ctx'> 			eeh_pe_state_mark(pe, EEH_PE_RECOVERING);</div><div class='add'>+			pci_unlock_rescan_remove();</div><div class='ctx'> 			eeh_handle_normal_event(pe);</div><div class='add'>+			pci_lock_rescan_remove();</div><div class='ctx'> 		} else {</div><div class='ctx'> 			eeh_for_each_pe(pe, tmp_pe)</div><div class='ctx'> 				eeh_pe_for_each_dev(tmp_pe, edev, tmp_edev)</div><div class='hunk'>@@ -1199,7 +1215,6 @@ void eeh_handle_special_event(void)</div><div class='ctx'> 				eeh_report_failure, NULL);</div><div class='ctx'> 			eeh_set_channel_state(pe, pci_channel_io_perm_failure);</div><div class='ctx'> </div><div class='del'>-			pci_lock_rescan_remove();</div><div class='ctx'> 			list_for_each_entry(hose, &amp;hose_list, list_node) {</div><div class='ctx'> 				phb_pe = eeh_phb_pe_get(hose);</div><div class='ctx'> 				if (!phb_pe ||</div><div class='hunk'>@@ -1218,7 +1233,6 @@ void eeh_handle_special_event(void)</div><div class='ctx'> 				}</div><div class='ctx'> 				pci_hp_remove_devices(bus);</div><div class='ctx'> 			}</div><div class='del'>-			pci_unlock_rescan_remove();</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1228,4 +1242,6 @@ void eeh_handle_special_event(void)</div><div class='ctx'> 		if (rc == EEH_NEXT_ERR_DEAD_IOC)</div><div class='ctx'> 			break;</div><div class='ctx'> 	} while (rc != EEH_NEXT_ERR_NONE);</div><div class='add'>+</div><div class='add'>+	pci_unlock_rescan_remove();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c<br/>index d283d281d28e..e740101fadf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh_pe.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/eeh_pe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/eeh_pe.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/eeh_pe.c</a></div><div class='hunk'>@@ -671,10 +671,12 @@ static void eeh_bridge_check_link(struct eeh_dev *edev)</div><div class='ctx'> 	eeh_ops-&gt;write_config(edev, cap + PCI_EXP_LNKCTL, 2, val);</div><div class='ctx'> </div><div class='ctx'> 	/* Check link */</div><div class='del'>-	if (!edev-&gt;pdev-&gt;link_active_reporting) {</div><div class='del'>-		eeh_edev_dbg(edev, "No link reporting capability\n");</div><div class='del'>-		msleep(1000);</div><div class='del'>-		return;</div><div class='add'>+	if (edev-&gt;pdev) {</div><div class='add'>+		if (!edev-&gt;pdev-&gt;link_active_reporting) {</div><div class='add'>+			eeh_edev_dbg(edev, "No link reporting capability\n");</div><div class='add'>+			msleep(1000);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait the link is up until timeout (5s) */</div><div class='head'>diff --git a/arch/powerpc/kernel/epapr_paravirt.c b/arch/powerpc/kernel/epapr_paravirt.c<br/>index d4b8aff20815..247ab2acaccc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/epapr_paravirt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/epapr_paravirt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/epapr_paravirt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/epapr_paravirt.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='ctx'> #include &lt;asm/epapr_hcalls.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S<br/>index 195b075d116c..b7229430ca94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/exceptions-64s.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/exceptions-64s.S</a></div><div class='hunk'>@@ -2537,27 +2537,8 @@ EXC_REAL_NONE(0x1000, 0x100)</div><div class='ctx'> EXC_VIRT_NONE(0x5000, 0x100)</div><div class='ctx'> EXC_REAL_NONE(0x1100, 0x100)</div><div class='ctx'> EXC_VIRT_NONE(0x5100, 0x100)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CBE_RAS</div><div class='del'>-INT_DEFINE_BEGIN(cbe_system_error)</div><div class='del'>-	IVEC=0x1200</div><div class='del'>-	IHSRR=1</div><div class='del'>-INT_DEFINE_END(cbe_system_error)</div><div class='del'>-</div><div class='del'>-EXC_REAL_BEGIN(cbe_system_error, 0x1200, 0x100)</div><div class='del'>-	GEN_INT_ENTRY cbe_system_error, virt=0</div><div class='del'>-EXC_REAL_END(cbe_system_error, 0x1200, 0x100)</div><div class='del'>-EXC_VIRT_NONE(0x5200, 0x100)</div><div class='del'>-EXC_COMMON_BEGIN(cbe_system_error_common)</div><div class='del'>-	GEN_COMMON cbe_system_error</div><div class='del'>-	addi	r3,r1,STACK_INT_FRAME_REGS</div><div class='del'>-	bl	CFUNC(cbe_system_error_exception)</div><div class='del'>-	b	interrupt_return_hsrr</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_CBE_RAS */</div><div class='ctx'> EXC_REAL_NONE(0x1200, 0x100)</div><div class='ctx'> EXC_VIRT_NONE(0x5200, 0x100)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * Interrupt 0x1300 - Instruction Address Breakpoint Interrupt.</div><div class='hunk'>@@ -2708,26 +2689,8 @@ EXC_COMMON_BEGIN(denorm_exception_common)</div><div class='ctx'> 	b	interrupt_return_hsrr</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CBE_RAS</div><div class='del'>-INT_DEFINE_BEGIN(cbe_maintenance)</div><div class='del'>-	IVEC=0x1600</div><div class='del'>-	IHSRR=1</div><div class='del'>-INT_DEFINE_END(cbe_maintenance)</div><div class='del'>-</div><div class='del'>-EXC_REAL_BEGIN(cbe_maintenance, 0x1600, 0x100)</div><div class='del'>-	GEN_INT_ENTRY cbe_maintenance, virt=0</div><div class='del'>-EXC_REAL_END(cbe_maintenance, 0x1600, 0x100)</div><div class='del'>-EXC_VIRT_NONE(0x5600, 0x100)</div><div class='del'>-EXC_COMMON_BEGIN(cbe_maintenance_common)</div><div class='del'>-	GEN_COMMON cbe_maintenance</div><div class='del'>-	addi	r3,r1,STACK_INT_FRAME_REGS</div><div class='del'>-	bl	CFUNC(cbe_maintenance_exception)</div><div class='del'>-	b	interrupt_return_hsrr</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_CBE_RAS */</div><div class='ctx'> EXC_REAL_NONE(0x1600, 0x100)</div><div class='ctx'> EXC_VIRT_NONE(0x5600, 0x100)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> INT_DEFINE_BEGIN(altivec_assist)</div><div class='hunk'>@@ -2755,26 +2718,8 @@ EXC_COMMON_BEGIN(altivec_assist_common)</div><div class='ctx'> 	b	interrupt_return_srr</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CBE_RAS</div><div class='del'>-INT_DEFINE_BEGIN(cbe_thermal)</div><div class='del'>-	IVEC=0x1800</div><div class='del'>-	IHSRR=1</div><div class='del'>-INT_DEFINE_END(cbe_thermal)</div><div class='del'>-</div><div class='del'>-EXC_REAL_BEGIN(cbe_thermal, 0x1800, 0x100)</div><div class='del'>-	GEN_INT_ENTRY cbe_thermal, virt=0</div><div class='del'>-EXC_REAL_END(cbe_thermal, 0x1800, 0x100)</div><div class='del'>-EXC_VIRT_NONE(0x5800, 0x100)</div><div class='del'>-EXC_COMMON_BEGIN(cbe_thermal_common)</div><div class='del'>-	GEN_COMMON cbe_thermal</div><div class='del'>-	addi	r3,r1,STACK_INT_FRAME_REGS</div><div class='del'>-	bl	CFUNC(cbe_thermal_exception)</div><div class='del'>-	b	interrupt_return_hsrr</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_CBE_RAS */</div><div class='ctx'> EXC_REAL_NONE(0x1800, 0x100)</div><div class='ctx'> EXC_VIRT_NONE(0x5800, 0x100)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_WATCHDOG</div><div class='head'>diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c<br/>index a612e7513a4f..5782e743fd27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/fadump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/fadump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/fadump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/fadump.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;asm/fadump-internal.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/interrupt.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The CPU who acquired the lock to trigger the fadump crash should</div><div class='hunk'>@@ -78,26 +79,38 @@ static struct cma *fadump_cma;</div><div class='ctx'>  * But for some reason even if it fails we still have the memory reservation</div><div class='ctx'>  * with us and we can still continue doing fadump.</div><div class='ctx'>  */</div><div class='del'>-static int __init fadump_cma_init(void)</div><div class='add'>+void __init fadump_cma_init(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long base, size;</div><div class='add'>+	unsigned long long base, size, end;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (!fw_dump.fadump_enabled)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='add'>+	if (!fw_dump.fadump_supported || !fw_dump.fadump_enabled ||</div><div class='add'>+			fw_dump.dump_active)</div><div class='add'>+		return;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Do not use CMA if user has provided fadump=nocma kernel parameter.</div><div class='del'>-	 * Return 1 to continue with fadump old behaviour.</div><div class='ctx'> 	 */</div><div class='del'>-	if (fw_dump.nocma)</div><div class='del'>-		return 1;</div><div class='add'>+	if (fw_dump.nocma || !fw_dump.boot_memory_size)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * [base, end) should be reserved during early init in</div><div class='add'>+	 * fadump_reserve_mem(). No need to check this here as</div><div class='add'>+	 * cma_init_reserved_mem() already checks for overlap.</div><div class='add'>+	 * Here we give the aligned chunk of this reserved memory to CMA.</div><div class='add'>+	 */</div><div class='ctx'> 	base = fw_dump.reserve_dump_area_start;</div><div class='ctx'> 	size = fw_dump.boot_memory_size;</div><div class='add'>+	end = base + size;</div><div class='ctx'> </div><div class='del'>-	if (!size)</div><div class='del'>-		return 0;</div><div class='add'>+	base = ALIGN(base, CMA_MIN_ALIGNMENT_BYTES);</div><div class='add'>+	end = ALIGN_DOWN(end, CMA_MIN_ALIGNMENT_BYTES);</div><div class='add'>+	size = end - base;</div><div class='add'>+</div><div class='add'>+	if (end &lt;= base) {</div><div class='add'>+		pr_warn("%s: Too less memory to give to CMA\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rc = cma_init_reserved_mem(base, size, 0, "fadump_cma", &amp;fadump_cma);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -108,7 +121,7 @@ static int __init fadump_cma_init(void)</div><div class='ctx'> 		 * blocked from production system usage.  Hence return 1,</div><div class='ctx'> 		 * so that we can continue with fadump.</div><div class='ctx'> 		 */</div><div class='del'>-		return 1;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -120,15 +133,13 @@ static int __init fadump_cma_init(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * So we now have successfully initialized cma area for fadump.</div><div class='ctx'> 	 */</div><div class='del'>-	pr_info("Initialized 0x%lx bytes cma area at %ldMB from 0x%lx "</div><div class='add'>+	pr_info("Initialized [0x%llx, %luMB] cma area from [0x%lx, %luMB] "</div><div class='ctx'> 		"bytes of memory reserved for firmware-assisted dump\n",</div><div class='del'>-		cma_get_size(fadump_cma),</div><div class='del'>-		(unsigned long)cma_get_base(fadump_cma) &gt;&gt; 20,</div><div class='del'>-		fw_dump.reserve_dump_area_size);</div><div class='del'>-	return 1;</div><div class='add'>+		cma_get_base(fadump_cma), cma_get_size(fadump_cma) &gt;&gt; 20,</div><div class='add'>+		fw_dump.reserve_dump_area_start,</div><div class='add'>+		fw_dump.boot_memory_size &gt;&gt; 20);</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static int __init fadump_cma_init(void) { return 1; }</div><div class='ctx'> #endif /* CONFIG_CMA */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -143,7 +154,7 @@ void __init fadump_append_bootargs(void)</div><div class='ctx'> 	if (!fw_dump.dump_active || !fw_dump.param_area_supported || !fw_dump.param_area)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (fw_dump.param_area &gt;= fw_dump.boot_mem_top) {</div><div class='add'>+	if (fw_dump.param_area &lt; fw_dump.boot_mem_top) {</div><div class='ctx'> 		if (memblock_reserve(fw_dump.param_area, COMMAND_LINE_SIZE)) {</div><div class='ctx'> 			pr_warn("WARNING: Can't use additional parameters area!\n");</div><div class='ctx'> 			fw_dump.param_area = 0;</div><div class='hunk'>@@ -279,10 +290,8 @@ static void __init fadump_show_config(void)</div><div class='ctx'> 	if (!fw_dump.fadump_supported)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pr_debug("Fadump enabled    : %s\n",</div><div class='del'>-				(fw_dump.fadump_enabled ? "yes" : "no"));</div><div class='del'>-	pr_debug("Dump Active       : %s\n",</div><div class='del'>-				(fw_dump.dump_active ? "yes" : "no"));</div><div class='add'>+	pr_debug("Fadump enabled    : %s\n", str_yes_no(fw_dump.fadump_enabled));</div><div class='add'>+	pr_debug("Dump Active       : %s\n", str_yes_no(fw_dump.dump_active));</div><div class='ctx'> 	pr_debug("Dump section sizes:\n");</div><div class='ctx'> 	pr_debug("    CPU state data size: %lx\n", fw_dump.cpu_state_data_size);</div><div class='ctx'> 	pr_debug("    HPTE region size   : %lx\n", fw_dump.hpte_region_size);</div><div class='hunk'>@@ -324,7 +333,7 @@ static __init u64 fadump_calculate_reserve_size(void)</div><div class='ctx'> 	 * memory at a predefined offset.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),</div><div class='del'>-				&amp;size, &amp;base, NULL, NULL);</div><div class='add'>+				&amp;size, &amp;base, NULL, NULL, NULL);</div><div class='ctx'> 	if (ret == 0 &amp;&amp; size &gt; 0) {</div><div class='ctx'> 		unsigned long max_size;</div><div class='ctx'> </div><div class='hunk'>@@ -558,13 +567,6 @@ int __init fadump_reserve_mem(void)</div><div class='ctx'> 	if (!fw_dump.dump_active) {</div><div class='ctx'> 		fw_dump.boot_memory_size =</div><div class='ctx'> 			PAGE_ALIGN(fadump_calculate_reserve_size());</div><div class='del'>-#ifdef CONFIG_CMA</div><div class='del'>-		if (!fw_dump.nocma) {</div><div class='del'>-			fw_dump.boot_memory_size =</div><div class='del'>-				ALIGN(fw_dump.boot_memory_size,</div><div class='del'>-				      CMA_MIN_ALIGNMENT_BYTES);</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 		bootmem_min = fw_dump.ops-&gt;fadump_get_bootmem_min();</div><div class='ctx'> 		if (fw_dump.boot_memory_size &lt; bootmem_min) {</div><div class='hunk'>@@ -637,8 +639,6 @@ int __init fadump_reserve_mem(void)</div><div class='ctx'> </div><div class='ctx'> 		pr_info("Reserved %lldMB of memory at %#016llx (System RAM: %lldMB)\n",</div><div class='ctx'> 			(size &gt;&gt; 20), base, (memblock_phys_mem_size() &gt;&gt; 20));</div><div class='del'>-</div><div class='del'>-		ret = fadump_cma_init();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -750,7 +750,7 @@ u32 *__init fadump_regs_to_elf_notes(u32 *buf, struct pt_regs *regs)</div><div class='ctx'> 	 * prstatus.pr_pid = ????</div><div class='ctx'> 	 */</div><div class='ctx'> 	elf_core_copy_regs(&amp;prstatus.pr_reg, regs);</div><div class='del'>-	buf = append_elf_note(buf, CRASH_CORE_NOTE_NAME, NT_PRSTATUS,</div><div class='add'>+	buf = append_elf_note(buf, NN_PRSTATUS, NT_PRSTATUS,</div><div class='ctx'> 			      &amp;prstatus, sizeof(prstatus));</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='hunk'>@@ -1373,15 +1373,12 @@ static void fadump_free_elfcorehdr_buf(void)</div><div class='ctx'> </div><div class='ctx'> static void fadump_invalidate_release_mem(void)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;fadump_mutex);</div><div class='del'>-	if (!fw_dump.dump_active) {</div><div class='del'>-		mutex_unlock(&amp;fadump_mutex);</div><div class='del'>-		return;</div><div class='add'>+	scoped_guard(mutex, &amp;fadump_mutex) {</div><div class='add'>+		if (!fw_dump.dump_active)</div><div class='add'>+			return;</div><div class='add'>+		fadump_cleanup();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fadump_cleanup();</div><div class='del'>-	mutex_unlock(&amp;fadump_mutex);</div><div class='del'>-</div><div class='ctx'> 	fadump_free_elfcorehdr_buf();</div><div class='ctx'> 	fadump_release_memory(fw_dump.boot_mem_top, memblock_end_of_DRAM());</div><div class='ctx'> 	fadump_free_cpu_notes_buf();</div><div class='hunk'>@@ -1586,6 +1583,12 @@ static void __init fadump_init_files(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (fw_dump.param_area) {</div><div class='add'>+		rc = sysfs_create_file(fadump_kobj, &amp;bootargs_append_attr.attr);</div><div class='add'>+		if (rc)</div><div class='add'>+			pr_err("unable to create bootargs_append sysfs file (%d)\n", rc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	debugfs_create_file("fadump_region", 0444, arch_debugfs_dir, NULL,</div><div class='ctx'> 			    &amp;fadump_region_fops);</div><div class='ctx'> </div><div class='hunk'>@@ -1740,7 +1743,7 @@ err_out:</div><div class='ctx'>  * Reserve memory to store additional parameters to be passed</div><div class='ctx'>  * for fadump/capture kernel.</div><div class='ctx'>  */</div><div class='del'>-static void __init fadump_setup_param_area(void)</div><div class='add'>+void __init fadump_setup_param_area(void)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t range_start, range_end;</div><div class='ctx'> </div><div class='hunk'>@@ -1748,7 +1751,7 @@ static void __init fadump_setup_param_area(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* This memory can't be used by PFW or bootloader as it is shared across kernels */</div><div class='del'>-	if (radix_enabled()) {</div><div class='add'>+	if (early_radix_enabled()) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Anywhere in the upper half should be good enough as all memory</div><div class='ctx'> 		 * is accessible in real mode.</div><div class='hunk'>@@ -1757,31 +1760,31 @@ static void __init fadump_setup_param_area(void)</div><div class='ctx'> 		range_end = memblock_end_of_DRAM();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='del'>-		 * Passing additional parameters is supported for hash MMU only</div><div class='del'>-		 * if the first memory block size is 768MB or higher.</div><div class='add'>+		 * Memory range for passing additional parameters for HASH MMU</div><div class='add'>+		 * must meet the following conditions:</div><div class='add'>+		 * 1. The first memory block size must be higher than the</div><div class='add'>+		 *    minimum RMA (MIN_RMA) size. Bootloader can use memory</div><div class='add'>+		 *    upto RMA size. So it should be avoided.</div><div class='add'>+		 * 2. The range should be between MIN_RMA and RMA size (ppc64_rma_size)</div><div class='add'>+		 * 3. It must not overlap with the fadump reserved area.</div><div class='ctx'> 		 */</div><div class='del'>-		if (ppc64_rma_size &lt; 0x30000000)</div><div class='add'>+		if (ppc64_rma_size &lt; MIN_RMA*1024*1024)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * 640 MB to 768 MB is not used by PFW/bootloader. So, try reserving</div><div class='del'>-		 * memory for passing additional parameters in this range to avoid</div><div class='del'>-		 * being stomped on by PFW/bootloader.</div><div class='del'>-		 */</div><div class='del'>-		range_start = 0x2A000000;</div><div class='del'>-		range_end = range_start + 0x4000000;</div><div class='add'>+		range_start = MIN_RMA * 1024 * 1024;</div><div class='add'>+		range_end = min(ppc64_rma_size, fw_dump.boot_mem_top);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	fw_dump.param_area = memblock_phys_alloc_range(COMMAND_LINE_SIZE,</div><div class='ctx'> 						       COMMAND_LINE_SIZE,</div><div class='ctx'> 						       range_start,</div><div class='ctx'> 						       range_end);</div><div class='del'>-	if (!fw_dump.param_area || sysfs_create_file(fadump_kobj, &amp;bootargs_append_attr.attr)) {</div><div class='add'>+	if (!fw_dump.param_area) {</div><div class='ctx'> 		pr_warn("WARNING: Could not setup area to pass additional parameters!\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(phys_to_virt(fw_dump.param_area), 0, COMMAND_LINE_SIZE);</div><div class='add'>+	memset((void *)fw_dump.param_area, 0, COMMAND_LINE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1807,7 +1810,6 @@ int __init setup_fadump(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Initialize the kernel dump memory structure and register with f/w */</div><div class='ctx'> 	else if (fw_dump.reserve_dump_area_size) {</div><div class='del'>-		fadump_setup_param_area();</div><div class='ctx'> 		fw_dump.ops-&gt;fadump_init_mem_struct(&amp;fw_dump);</div><div class='ctx'> 		register_fadump();</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S<br/>index 811a7130505c..393e19ee1322 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/head_8xx.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/head_8xx.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/head_8xx.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/head_8xx.S</a></div><div class='hunk'>@@ -162,7 +162,7 @@ instruction_counter:</div><div class='ctx'>  * For the MPC8xx, this is a software tablewalk to load the instruction</div><div class='ctx'>  * TLB.  The task switch loads the M_TWB register with the pointer to the first</div><div class='ctx'>  * level table.</div><div class='del'>- * If we discover there is no second level table (value is zero) or if there</div><div class='add'>+ * If there is no second level table (value is zero) or if there</div><div class='ctx'>  * is an invalid pte, we load that into the TLB, which causes another fault</div><div class='ctx'>  * into the TLB Error interrupt where we can handle such problems.</div><div class='ctx'>  * We have to use the MD_xxx registers for the tablewalk because the</div><div class='hunk'>@@ -183,14 +183,11 @@ instruction_counter:</div><div class='ctx'> 	mtspr	SPRN_SPRG_SCRATCH2, r10</div><div class='ctx'> 	mtspr	SPRN_M_TW, r11</div><div class='ctx'> </div><div class='del'>-	/* If we are faulting a kernel address, we have to use the</div><div class='del'>-	 * kernel page tables.</div><div class='del'>-	 */</div><div class='ctx'> 	mfspr	r10, SPRN_SRR0	/* Get effective address of fault */</div><div class='ctx'> 	INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)</div><div class='ctx'> 	mtspr	SPRN_MD_EPN, r10</div><div class='ctx'> 	mfspr	r10, SPRN_M_TWB	/* Get level 1 table */</div><div class='del'>-	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10)	/* Get level 1 entry */</div><div class='add'>+	lwz	r11, 0(r10)	/* Get level 1 entry */</div><div class='ctx'> 	mtspr	SPRN_MD_TWC, r11</div><div class='ctx'> 	mfspr	r10, SPRN_MD_TWC</div><div class='ctx'> 	lwz	r10, 0(r10)	/* Get the pte */</div><div class='hunk'>@@ -228,12 +225,8 @@ instruction_counter:</div><div class='ctx'> 	mtspr	SPRN_SPRG_SCRATCH2, r10</div><div class='ctx'> 	mtspr	SPRN_M_TW, r11</div><div class='ctx'> </div><div class='del'>-	/* If we are faulting a kernel address, we have to use the</div><div class='del'>-	 * kernel page tables.</div><div class='del'>-	 */</div><div class='del'>-	mfspr	r10, SPRN_MD_EPN</div><div class='ctx'> 	mfspr	r10, SPRN_M_TWB	/* Get level 1 table */</div><div class='del'>-	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10)	/* Get level 1 entry */</div><div class='add'>+	lwz	r11, 0(r10)	/* Get level 1 entry */</div><div class='ctx'> </div><div class='ctx'> 	mtspr	SPRN_MD_TWC, r11</div><div class='ctx'> 	mfspr	r10, SPRN_MD_TWC</div><div class='hunk'>@@ -375,7 +368,7 @@ FixupPGD:</div><div class='ctx'> 	mfspr	r10, SPRN_DAR</div><div class='ctx'> 	mtspr	SPRN_MD_EPN, r10</div><div class='ctx'> 	mfspr	r11, SPRN_M_TWB	/* Get level 1 table */</div><div class='del'>-	lwz	r10, (swapper_pg_dir - PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */</div><div class='add'>+	lwz	r10, 0(r11)	/* Get the level 1 entry */</div><div class='ctx'> 	cmpwi	cr1, r10, 0</div><div class='ctx'> 	bne	cr1, 1f</div><div class='ctx'> </div><div class='hunk'>@@ -384,7 +377,7 @@ FixupPGD:</div><div class='ctx'> 	lwz	r10, (swapper_pg_dir - PAGE_OFFSET)@l(r10)	/* Get the level 1 entry */</div><div class='ctx'> 	cmpwi	cr1, r10, 0</div><div class='ctx'> 	beq	cr1, 1f</div><div class='del'>-	stw	r10, (swapper_pg_dir - PAGE_OFFSET)@l(r11)	/* Set the level 1 entry */</div><div class='add'>+	stw	r10, 0(r11)	/* Set the level 1 entry */</div><div class='ctx'> 	mfspr	r10, SPRN_M_TW</div><div class='ctx'> 	mtcr	r10</div><div class='ctx'> 	mfspr	r10, SPRN_SPRG_SCRATCH0</div><div class='hunk'>@@ -412,9 +405,10 @@ FixupDAR:/* Entry point for dcbx workaround. */</div><div class='ctx'> 	tophys(r11, r10)</div><div class='ctx'> 	mfspr	r11, SPRN_M_TWB	/* Get level 1 table */</div><div class='ctx'> 	rlwinm	r11, r11, 0, 20, 31</div><div class='del'>-	oris	r11, r11, (swapper_pg_dir - PAGE_OFFSET)@ha</div><div class='add'>+	oris	r11, r11, (swapper_pg_dir - PAGE_OFFSET)@h</div><div class='add'>+	ori	r11, r11, (swapper_pg_dir - PAGE_OFFSET)@l</div><div class='ctx'> 3:</div><div class='del'>-	lwz	r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)	/* Get the level 1 entry */</div><div class='add'>+	lwz	r11, 0(r11)	/* Get the level 1 entry */</div><div class='ctx'> 	rlwinm	r11, r11, 0, ~_PMD_PAGE_8M</div><div class='ctx'> 	mtspr	SPRN_MD_TWC, r11</div><div class='ctx'> 	mfspr	r11, SPRN_MD_TWC</div><div class='hunk'>@@ -494,6 +488,7 @@ FixupDAR:/* Entry point for dcbx workaround. */</div><div class='ctx'> 	bctr				/* jump into table */</div><div class='ctx'> 152:</div><div class='ctx'> 	mfdar	r11</div><div class='add'>+	mtdar	r10</div><div class='ctx'> 	mtctr	r11			/* restore ctr reg from DAR */</div><div class='ctx'> 	mfspr	r11, SPRN_SPRG_THREAD</div><div class='ctx'> 	stw	r10, DAR(r11)</div><div class='hunk'>@@ -534,7 +529,8 @@ start_here:</div><div class='ctx'> 	li	r0,0</div><div class='ctx'> 	stwu	r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1)</div><div class='ctx'> </div><div class='del'>-	lis	r6, swapper_pg_dir@ha</div><div class='add'>+	lis	r6, swapper_pg_dir@h</div><div class='add'>+	ori	r6, r6, swapper_pg_dir@l</div><div class='ctx'> 	tophys(r6,r6)</div><div class='ctx'> 	mtspr	SPRN_M_TWB, r6</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h<br/>index 0b5c1993809e..75471fb6fb10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/head_booke.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/head_booke.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/head_booke.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/head_booke.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;asm/kvm_booke_hv_asm.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;	/* for THREAD_SHIFT */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Macros used for common Book-e exception handling</div><div class='hunk'>@@ -522,5 +522,5 @@ label:</div><div class='ctx'> 	bl	kernel_fp_unavailable_exception;			      \</div><div class='ctx'> 	b	interrupt_return</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __HEAD_BOOKE_H__ */</div><div class='head'>diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c<br/>index 30b56c67fa61..e527cd3ef128 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/idle.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/idle.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/idle.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/idle.c</a></div><div class='hunk'>@@ -97,7 +97,7 @@ void power4_idle(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Register the sysctl to set/clear powersave_nap.</div><div class='ctx'>  */</div><div class='del'>-static struct ctl_table powersave_nap_ctl_table[] = {</div><div class='add'>+static const struct ctl_table powersave_nap_ctl_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "powersave-nap",</div><div class='ctx'> 		.data		= &amp;powersave_nap,</div><div class='head'>diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c<br/>index af62ec974b97..e0c681d0b076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/interrupt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/interrupt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/interrupt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/interrupt.c</a></div><div class='hunk'>@@ -25,6 +25,10 @@</div><div class='ctx'> unsigned long global_dbcr0[NR_CPUS];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PREEMPT_DYNAMIC)</div><div class='add'>+DEFINE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);</div><div class='ctx'> static inline bool exit_must_hard_disable(void)</div><div class='hunk'>@@ -185,7 +189,7 @@ again:</div><div class='ctx'> 	ti_flags = read_thread_flags();</div><div class='ctx'> 	while (unlikely(ti_flags &amp; (_TIF_USER_WORK_MASK &amp; ~_TIF_RESTORE_TM))) {</div><div class='ctx'> 		local_irq_enable();</div><div class='del'>-		if (ti_flags &amp; _TIF_NEED_RESCHED) {</div><div class='add'>+		if (ti_flags &amp; (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY)) {</div><div class='ctx'> 			schedule();</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -396,7 +400,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)</div><div class='ctx'> 		/* Returning to a kernel context with local irqs enabled. */</div><div class='ctx'> 		WARN_ON_ONCE(!(regs-&gt;msr &amp; MSR_EE));</div><div class='ctx'> again:</div><div class='del'>-		if (IS_ENABLED(CONFIG_PREEMPT)) {</div><div class='add'>+		if (need_irq_preemption()) {</div><div class='ctx'> 			/* Return to preemptible kernel context */</div><div class='ctx'> 			if (unlikely(read_thread_flags() &amp; _TIF_NEED_RESCHED)) {</div><div class='ctx'> 				if (preempt_count() == 0)</div><div class='head'>diff --git a/arch/powerpc/kernel/io-workarounds.c b/arch/powerpc/kernel/io-workarounds.c<br/>deleted file mode 100644<br/>index c877f074d174..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/io-workarounds.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/io-workarounds.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,197 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * Support PCI IO workaround</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2006 Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;</div><div class='del'>- *		       IBM, Corp.</div><div class='del'>- *  (C) Copyright 2007-2008 TOSHIBA CORPORATION</div><div class='del'>- */</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched/mm.h&gt;	/* for init_mm */</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;asm/io-workarounds.h&gt;</div><div class='del'>-#include &lt;asm/pte-walk.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define IOWA_MAX_BUS	8</div><div class='del'>-</div><div class='del'>-static struct iowa_bus iowa_busses[IOWA_MAX_BUS];</div><div class='del'>-static unsigned int iowa_bus_count;</div><div class='del'>-</div><div class='del'>-static struct iowa_bus *iowa_pci_find(unsigned long vaddr, unsigned long paddr)</div><div class='del'>-{</div><div class='del'>-	int i, j;</div><div class='del'>-	struct resource *res;</div><div class='del'>-	unsigned long vstart, vend;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; iowa_bus_count; i++) {</div><div class='del'>-		struct iowa_bus *bus = &amp;iowa_busses[i];</div><div class='del'>-		struct pci_controller *phb = bus-&gt;phb;</div><div class='del'>-</div><div class='del'>-		if (vaddr) {</div><div class='del'>-			vstart = (unsigned long)phb-&gt;io_base_virt;</div><div class='del'>-			vend = vstart + phb-&gt;pci_io_size - 1;</div><div class='del'>-			if ((vaddr &gt;= vstart) &amp;&amp; (vaddr &lt;= vend))</div><div class='del'>-				return bus;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (paddr)</div><div class='del'>-			for (j = 0; j &lt; 3; j++) {</div><div class='del'>-				res = &amp;phb-&gt;mem_resources[j];</div><div class='del'>-				if (paddr &gt;= res-&gt;start &amp;&amp; paddr &lt;= res-&gt;end)</div><div class='del'>-					return bus;</div><div class='del'>-			}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_MMIO</div><div class='del'>-struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)</div><div class='del'>-{</div><div class='del'>-	struct iowa_bus *bus;</div><div class='del'>-	int token;</div><div class='del'>-</div><div class='del'>-	token = PCI_GET_ADDR_TOKEN(addr);</div><div class='del'>-</div><div class='del'>-	if (token &amp;&amp; token &lt;= iowa_bus_count)</div><div class='del'>-		bus = &amp;iowa_busses[token - 1];</div><div class='del'>-	else {</div><div class='del'>-		unsigned long vaddr, paddr;</div><div class='del'>-</div><div class='del'>-		vaddr = (unsigned long)PCI_FIX_ADDR(addr);</div><div class='del'>-		if (vaddr &lt; PHB_IO_BASE || vaddr &gt;= PHB_IO_END)</div><div class='del'>-			return NULL;</div><div class='del'>-</div><div class='del'>-		paddr = ppc_find_vmap_phys(vaddr);</div><div class='del'>-</div><div class='del'>-		bus = iowa_pci_find(vaddr, paddr);</div><div class='del'>-</div><div class='del'>-		if (bus == NULL)</div><div class='del'>-			return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return bus;</div><div class='del'>-}</div><div class='del'>-#else /* CONFIG_PPC_INDIRECT_MMIO */</div><div class='del'>-struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_PPC_INDIRECT_MMIO */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_PIO</div><div class='del'>-struct iowa_bus *iowa_pio_find_bus(unsigned long port)</div><div class='del'>-{</div><div class='del'>-	unsigned long vaddr = (unsigned long)pci_io_base + port;</div><div class='del'>-	return iowa_pci_find(vaddr, 0);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-struct iowa_bus *iowa_pio_find_bus(unsigned long port)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define DEF_PCI_AC_RET(name, ret, at, al, space, aa)		\</div><div class='del'>-static ret iowa_##name at					\</div><div class='del'>-{								\</div><div class='del'>-	struct iowa_bus *bus;					\</div><div class='del'>-	bus = iowa_##space##_find_bus(aa);			\</div><div class='del'>-	if (bus &amp;&amp; bus-&gt;ops &amp;&amp; bus-&gt;ops-&gt;name)			\</div><div class='del'>-		return bus-&gt;ops-&gt;name al;			\</div><div class='del'>-	return __do_##name al;					\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEF_PCI_AC_NORET(name, at, al, space, aa)		\</div><div class='del'>-static void iowa_##name at					\</div><div class='del'>-{								\</div><div class='del'>-	struct iowa_bus *bus;					\</div><div class='del'>-	bus = iowa_##space##_find_bus(aa);			\</div><div class='del'>-	if (bus &amp;&amp; bus-&gt;ops &amp;&amp; bus-&gt;ops-&gt;name) {		\</div><div class='del'>-		bus-&gt;ops-&gt;name al;				\</div><div class='del'>-		return;						\</div><div class='del'>-	}							\</div><div class='del'>-	__do_##name al;						\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io-defs.h&gt;</div><div class='del'>-</div><div class='del'>-#undef DEF_PCI_AC_RET</div><div class='del'>-#undef DEF_PCI_AC_NORET</div><div class='del'>-</div><div class='del'>-static const struct ppc_pci_io iowa_pci_io = {</div><div class='del'>-</div><div class='del'>-#define DEF_PCI_AC_RET(name, ret, at, al, space, aa)	.name = iowa_##name,</div><div class='del'>-#define DEF_PCI_AC_NORET(name, at, al, space, aa)	.name = iowa_##name,</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io-defs.h&gt;</div><div class='del'>-</div><div class='del'>-#undef DEF_PCI_AC_RET</div><div class='del'>-#undef DEF_PCI_AC_NORET</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_INDIRECT_MMIO</div><div class='del'>-void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,</div><div class='del'>-			   pgprot_t prot, void *caller)</div><div class='del'>-{</div><div class='del'>-	struct iowa_bus *bus;</div><div class='del'>-	void __iomem *res = __ioremap_caller(addr, size, prot, caller);</div><div class='del'>-	int busno;</div><div class='del'>-</div><div class='del'>-	bus = iowa_pci_find(0, (unsigned long)addr);</div><div class='del'>-	if (bus != NULL) {</div><div class='del'>-		busno = bus - iowa_busses;</div><div class='del'>-		PCI_SET_ADDR_TOKEN(res, busno + 1);</div><div class='del'>-	}</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_PPC_INDIRECT_MMIO */</div><div class='del'>-</div><div class='del'>-bool io_workaround_inited;</div><div class='del'>-</div><div class='del'>-/* Enable IO workaround */</div><div class='del'>-static void io_workaround_init(void)</div><div class='del'>-{</div><div class='del'>-	if (io_workaround_inited)</div><div class='del'>-		return;</div><div class='del'>-	ppc_pci_io = iowa_pci_io;</div><div class='del'>-	io_workaround_inited = true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Register new bus to support workaround */</div><div class='del'>-void iowa_register_bus(struct pci_controller *phb, struct ppc_pci_io *ops,</div><div class='del'>-		       int (*initfunc)(struct iowa_bus *, void *), void *data)</div><div class='del'>-{</div><div class='del'>-	struct iowa_bus *bus;</div><div class='del'>-	struct device_node *np = phb-&gt;dn;</div><div class='del'>-</div><div class='del'>-	io_workaround_init();</div><div class='del'>-</div><div class='del'>-	if (iowa_bus_count &gt;= IOWA_MAX_BUS) {</div><div class='del'>-		pr_err("IOWA:Too many pci bridges, "</div><div class='del'>-		       "workarounds disabled for %pOF\n", np);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bus = &amp;iowa_busses[iowa_bus_count];</div><div class='del'>-	bus-&gt;phb = phb;</div><div class='del'>-	bus-&gt;ops = ops;</div><div class='del'>-	bus-&gt;private = data;</div><div class='del'>-</div><div class='del'>-	if (initfunc)</div><div class='del'>-		if ((*initfunc)(bus, data))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-	iowa_bus_count++;</div><div class='del'>-</div><div class='del'>-	pr_debug("IOWA:[%d]Add bus, %pOF.\n", iowa_bus_count-1, np);</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/kernel/io.c b/arch/powerpc/kernel/io.c<br/>index 6af535905984..bcc201c01514 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/io.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/io.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/io.c</a></div><div class='hunk'>@@ -31,13 +31,14 @@ void _insb(const volatile u8 __iomem *port, void *buf, long count)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		tmp = *(const volatile u8 __force *)port;</div><div class='ctx'> 		eieio();</div><div class='ctx'> 		*tbuf++ = tmp;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("twi 0,%0,0; isync" : : "r" (tmp));</div><div class='add'>+	data_barrier(tmp);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(_insb);</div><div class='ctx'> </div><div class='hunk'>@@ -47,75 +48,80 @@ void _outsb(volatile u8 __iomem *port, const void *buf, long count)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		*(volatile u8 __force *)port = *tbuf++;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(_outsb);</div><div class='ctx'> </div><div class='del'>-void _insw_ns(const volatile u16 __iomem *port, void *buf, long count)</div><div class='add'>+void _insw(const volatile u16 __iomem *port, void *buf, long count)</div><div class='ctx'> {</div><div class='ctx'> 	u16 *tbuf = buf;</div><div class='ctx'> 	u16 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		tmp = *(const volatile u16 __force *)port;</div><div class='ctx'> 		eieio();</div><div class='ctx'> 		*tbuf++ = tmp;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("twi 0,%0,0; isync" : : "r" (tmp));</div><div class='add'>+	data_barrier(tmp);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(_insw_ns);</div><div class='add'>+EXPORT_SYMBOL(_insw);</div><div class='ctx'> </div><div class='del'>-void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count)</div><div class='add'>+void _outsw(volatile u16 __iomem *port, const void *buf, long count)</div><div class='ctx'> {</div><div class='ctx'> 	const u16 *tbuf = buf;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		*(volatile u16 __force *)port = *tbuf++;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(_outsw_ns);</div><div class='add'>+EXPORT_SYMBOL(_outsw);</div><div class='ctx'> </div><div class='del'>-void _insl_ns(const volatile u32 __iomem *port, void *buf, long count)</div><div class='add'>+void _insl(const volatile u32 __iomem *port, void *buf, long count)</div><div class='ctx'> {</div><div class='ctx'> 	u32 *tbuf = buf;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		tmp = *(const volatile u32 __force *)port;</div><div class='ctx'> 		eieio();</div><div class='ctx'> 		*tbuf++ = tmp;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("twi 0,%0,0; isync" : : "r" (tmp));</div><div class='add'>+	data_barrier(tmp);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(_insl_ns);</div><div class='add'>+EXPORT_SYMBOL(_insl);</div><div class='ctx'> </div><div class='del'>-void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count)</div><div class='add'>+void _outsl(volatile u32 __iomem *port, const void *buf, long count)</div><div class='ctx'> {</div><div class='ctx'> 	const u32 *tbuf = buf;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(count &lt;= 0))</div><div class='ctx'> 		return;</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+</div><div class='add'>+	mb();</div><div class='ctx'> 	do {</div><div class='ctx'> 		*(volatile u32 __force *)port = *tbuf++;</div><div class='ctx'> 	} while (--count != 0);</div><div class='del'>-	asm volatile("sync");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(_outsl_ns);</div><div class='add'>+EXPORT_SYMBOL(_outsl);</div><div class='ctx'> </div><div class='ctx'> #define IO_CHECK_ALIGN(v,a) ((((unsigned long)(v)) &amp; ((a) - 1)) == 0)</div><div class='ctx'> </div><div class='hunk'>@@ -127,7 +133,7 @@ _memset_io(volatile void __iomem *addr, int c, unsigned long n)</div><div class='ctx'> 	lc |= lc &lt;&lt; 8;</div><div class='ctx'> 	lc |= lc &lt;&lt; 16;</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> 	while(n &amp;&amp; !IO_CHECK_ALIGN(p, 4)) {</div><div class='ctx'> 		*((volatile u8 *)p) = c;</div><div class='ctx'> 		p++;</div><div class='hunk'>@@ -143,7 +149,7 @@ _memset_io(volatile void __iomem *addr, int c, unsigned long n)</div><div class='ctx'> 		p++;</div><div class='ctx'> 		n--;</div><div class='ctx'> 	}</div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(_memset_io);</div><div class='ctx'> </div><div class='hunk'>@@ -152,7 +158,7 @@ void _memcpy_fromio(void *dest, const volatile void __iomem *src,</div><div class='ctx'> {</div><div class='ctx'> 	void *vsrc = (void __force *) src;</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> 	while(n &amp;&amp; (!IO_CHECK_ALIGN(vsrc, 4) || !IO_CHECK_ALIGN(dest, 4))) {</div><div class='ctx'> 		*((u8 *)dest) = *((volatile u8 *)vsrc);</div><div class='ctx'> 		eieio();</div><div class='hunk'>@@ -174,7 +180,7 @@ void _memcpy_fromio(void *dest, const volatile void __iomem *src,</div><div class='ctx'> 		dest++;</div><div class='ctx'> 		n--;</div><div class='ctx'> 	}</div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(_memcpy_fromio);</div><div class='ctx'> </div><div class='hunk'>@@ -182,7 +188,7 @@ void _memcpy_toio(volatile void __iomem *dest, const void *src, unsigned long n)</div><div class='ctx'> {</div><div class='ctx'> 	void *vdest = (void __force *) dest;</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> 	while(n &amp;&amp; (!IO_CHECK_ALIGN(vdest, 4) || !IO_CHECK_ALIGN(src, 4))) {</div><div class='ctx'> 		*((volatile u8 *)vdest) = *((u8 *)src);</div><div class='ctx'> 		src++;</div><div class='hunk'>@@ -201,6 +207,6 @@ void _memcpy_toio(volatile void __iomem *dest, const void *src, unsigned long n)</div><div class='ctx'> 		vdest++;</div><div class='ctx'> 		n--;</div><div class='ctx'> 	}</div><div class='del'>-	__asm__ __volatile__ ("sync" : : : "memory");</div><div class='add'>+	mb();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(_memcpy_toio);</div><div class='head'>diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c<br/>index 76381e14e800..244eb4857e7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/iommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/iommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/iommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/iommu.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/iommu-helper.h&gt;</div><div class='hunk'>@@ -687,7 +688,7 @@ void iommu_table_clear(struct iommu_table *tbl)</div><div class='ctx'> void iommu_table_reserve_pages(struct iommu_table *tbl,</div><div class='ctx'> 		unsigned long res_start, unsigned long res_end)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_ONCE(res_end &lt; res_start);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -769,8 +770,8 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid,</div><div class='ctx'> 	iommu_table_clear(tbl);</div><div class='ctx'> </div><div class='ctx'> 	if (!welcomed) {</div><div class='del'>-		printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",</div><div class='del'>-		       novmerge ? "disabled" : "enabled");</div><div class='add'>+		pr_info("IOMMU table initialized, virtual merging %s\n",</div><div class='add'>+			str_disabled_enabled(novmerge));</div><div class='ctx'> 		welcomed = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c<br/>index 2e1600a8bbbb..a0e8b998c9b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/irq.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/irq.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/irq.c</a></div><div class='hunk'>@@ -89,69 +89,69 @@ int arch_show_interrupts(struct seq_file *p, int prec)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PPC32) &amp;&amp; defined(CONFIG_TAU_INT)</div><div class='ctx'> 	if (tau_initialized) {</div><div class='del'>-		seq_printf(p, "%*s: ", prec, "TAU");</div><div class='add'>+		seq_printf(p, "%*s:", prec, "TAU");</div><div class='ctx'> 		for_each_online_cpu(j)</div><div class='del'>-			seq_printf(p, "%10u ", tau_interrupts(j));</div><div class='add'>+			seq_put_decimal_ull_width(p, " ", tau_interrupts(j), 10);</div><div class='ctx'> 		seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_PPC32 &amp;&amp; CONFIG_TAU_INT */</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "LOC");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "LOC");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_event);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).timer_irqs_event, 10);</div><div class='ctx'>         seq_printf(p, "  Local timer interrupts for timer event device\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "BCT");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "BCT");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).broadcast_irqs_event);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).broadcast_irqs_event, 10);</div><div class='ctx'> 	seq_printf(p, "  Broadcast timer interrupts for timer event device\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "LOC");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "LOC");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_others);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).timer_irqs_others, 10);</div><div class='ctx'>         seq_printf(p, "  Local timer interrupts for others\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "SPU");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "SPU");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).spurious_irqs, 10);</div><div class='ctx'> 	seq_printf(p, "  Spurious interrupts\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "PMI");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "PMI");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).pmu_irqs, 10);</div><div class='ctx'> 	seq_printf(p, "  Performance monitoring interrupts\n");</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "MCE");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "MCE");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).mce_exceptions, 10);</div><div class='ctx'> 	seq_printf(p, "  Machine check exceptions\n");</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	if (cpu_has_feature(CPU_FTR_HVMODE)) {</div><div class='del'>-		seq_printf(p, "%*s: ", prec, "HMI");</div><div class='add'>+		seq_printf(p, "%*s:", prec, "HMI");</div><div class='ctx'> 		for_each_online_cpu(j)</div><div class='del'>-			seq_printf(p, "%10u ", paca_ptrs[j]-&gt;hmi_irqs);</div><div class='add'>+			seq_put_decimal_ull_width(p, " ", paca_ptrs[j]-&gt;hmi_irqs, 10);</div><div class='ctx'> 		seq_printf(p, "  Hypervisor Maintenance Interrupts\n");</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, "%*s: ", prec, "NMI");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "NMI");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).sreset_irqs);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).sreset_irqs, 10);</div><div class='ctx'> 	seq_printf(p, "  System Reset interrupts\n");</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_WATCHDOG</div><div class='del'>-	seq_printf(p, "%*s: ", prec, "WDG");</div><div class='add'>+	seq_printf(p, "%*s:", prec, "WDG");</div><div class='ctx'> 	for_each_online_cpu(j)</div><div class='del'>-		seq_printf(p, "%10u ", per_cpu(irq_stat, j).soft_nmi_irqs);</div><div class='add'>+		seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).soft_nmi_irqs, 10);</div><div class='ctx'> 	seq_printf(p, "  Watchdog soft-NMI interrupts\n");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_DOORBELL</div><div class='ctx'> 	if (cpu_has_feature(CPU_FTR_DBELL)) {</div><div class='del'>-		seq_printf(p, "%*s: ", prec, "DBL");</div><div class='add'>+		seq_printf(p, "%*s:", prec, "DBL");</div><div class='ctx'> 		for_each_online_cpu(j)</div><div class='del'>-			seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);</div><div class='add'>+			seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, j).doorbell_irqs, 10);</div><div class='ctx'> 		seq_printf(p, "  Doorbell interrupts\n");</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/kernel/jump_label.c b/arch/powerpc/kernel/jump_label.c<br/>index 5277cf582c16..2659e1ac8604 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/jump_label.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/jump_label.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/jump_label.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/jump_label.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> void arch_jump_label_transform(struct jump_entry *entry,</div><div class='head'>diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c<br/>index 7a8bc03a00af..5081334b7bd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kgdb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kgdb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/kgdb.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/debug.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c<br/>index f8aa91bc3b17..c0d9f12cb441 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/kprobes.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/set_memory.h&gt;</div><div class='ctx'> #include &lt;linux/execmem.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/sstep.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -105,24 +105,22 @@ kprobe_opcode_t *kprobe_lookup_name(const char *name, unsigned int offset)</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool arch_kprobe_on_func_entry(unsigned long offset)</div><div class='add'>+static bool arch_kprobe_on_func_entry(unsigned long addr, unsigned long offset)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_PPC64_ELF_ABI_V2</div><div class='del'>-#ifdef CONFIG_KPROBES_ON_FTRACE</div><div class='del'>-	return offset &lt;= 16;</div><div class='del'>-#else</div><div class='del'>-	return offset &lt;= 8;</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='add'>+	unsigned long ip = ftrace_location(addr);</div><div class='add'>+</div><div class='add'>+	if (ip)</div><div class='add'>+		return offset &lt;= (ip - addr);</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) &amp;&amp; !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))</div><div class='add'>+		return offset &lt;= 8;</div><div class='ctx'> 	return !offset;</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* XXX try and fold the magic of kprobe_lookup_name() in this */</div><div class='ctx'> kprobe_opcode_t *arch_adjust_kprobe_addr(unsigned long addr, unsigned long offset,</div><div class='ctx'> 					 bool *on_func_entry)</div><div class='ctx'> {</div><div class='del'>-	*on_func_entry = arch_kprobe_on_func_entry(offset);</div><div class='add'>+	*on_func_entry = arch_kprobe_on_func_entry(addr, offset);</div><div class='ctx'> 	return (kprobe_opcode_t *)(addr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c<br/>index 5b3c093611ba..7209d00a9c25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kvm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/kvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/kvm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/kvm.c</a></div><div class='hunk'>@@ -632,19 +632,19 @@ static void __init kvm_check_ins(u32 *inst, u32 features)</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (inst_no_rt &amp; ~KVM_MASK_RB) {</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_32</div><div class='add'>+	switch (inst_no_rt &amp; ~KVM_MASK_RB) {</div><div class='ctx'> 	case KVM_INST_MTSRIN:</div><div class='ctx'> 		if (features &amp; KVM_MAGIC_FEAT_SR) {</div><div class='ctx'> 			u32 inst_rb = _inst &amp; KVM_MASK_RB;</div><div class='ctx'> 			kvm_patch_ins_mtsrin(inst, inst_rt, inst_rb);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	switch (_inst) {</div><div class='ctx'> #ifdef CONFIG_BOOKE</div><div class='add'>+	switch (_inst) {</div><div class='ctx'> 	case KVM_INST_WRTEEI_0:</div><div class='ctx'> 		kvm_patch_ins_wrteei_0(inst);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -652,8 +652,8 @@ static void __init kvm_check_ins(u32 *inst, u32 features)</div><div class='ctx'> 	case KVM_INST_WRTEEI_1:</div><div class='ctx'> 		kvm_patch_ins_wrtee(inst, 0, 1);</div><div class='ctx'> 		break;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern u32 kvm_template_start[];</div><div class='head'>diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c<br/>index 1da2f6e7d2a1..ae1906bfe8a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/legacy_serial.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/legacy_serial.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/legacy_serial.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/legacy_serial.c</a></div><div class='hunk'>@@ -54,9 +54,10 @@ static int legacy_serial_console = -1;</div><div class='ctx'> static const upf_t legacy_port_flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |</div><div class='ctx'> 	UPF_SHARE_IRQ | UPF_FIXED_PORT;</div><div class='ctx'> </div><div class='del'>-static unsigned int tsi_serial_in(struct uart_port *p, int offset)</div><div class='add'>+static u32 tsi_serial_in(struct uart_port *p, unsigned int offset)</div><div class='ctx'> {</div><div class='del'>-	unsigned int tmp;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='ctx'> 	offset = offset &lt;&lt; p-&gt;regshift;</div><div class='ctx'> 	if (offset == UART_IIR) {</div><div class='ctx'> 		tmp = readl(p-&gt;membase + (UART_IIR &amp; ~3));</div><div class='hunk'>@@ -65,7 +66,7 @@ static unsigned int tsi_serial_in(struct uart_port *p, int offset)</div><div class='ctx'> 		return readb(p-&gt;membase + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void tsi_serial_out(struct uart_port *p, int offset, int value)</div><div class='add'>+static void tsi_serial_out(struct uart_port *p, unsigned int offset, u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	offset = offset &lt;&lt; p-&gt;regshift;</div><div class='ctx'> 	if (!((offset == UART_IER) &amp;&amp; (value &amp; UART_IER_UUE)))</div><div class='hunk'>@@ -77,6 +78,8 @@ static int __init add_legacy_port(struct device_node *np, int want_index,</div><div class='ctx'> 				  phys_addr_t taddr, unsigned long irq,</div><div class='ctx'> 				  upf_t flags, int irq_check_parent)</div><div class='ctx'> {</div><div class='add'>+	struct plat_serial8250_port *legacy_port;</div><div class='add'>+	struct legacy_serial_info *legacy_info;</div><div class='ctx'> 	const __be32 *clk, *spd, *rs;</div><div class='ctx'> 	u32 clock = BASE_BAUD * 16;</div><div class='ctx'> 	u32 shift = 0;</div><div class='hunk'>@@ -110,16 +113,17 @@ static int __init add_legacy_port(struct device_node *np, int want_index,</div><div class='ctx'> 	if (index &gt;= legacy_serial_count)</div><div class='ctx'> 		legacy_serial_count = index + 1;</div><div class='ctx'> </div><div class='add'>+	legacy_port = &amp;legacy_serial_ports[index];</div><div class='add'>+	legacy_info = &amp;legacy_serial_infos[index];</div><div class='add'>+</div><div class='ctx'> 	/* Check if there is a port who already claimed our slot */</div><div class='del'>-	if (legacy_serial_infos[index].np != NULL) {</div><div class='add'>+	if (legacy_info-&gt;np != NULL) {</div><div class='ctx'> 		/* if we still have some room, move it, else override */</div><div class='ctx'> 		if (legacy_serial_count &lt; MAX_LEGACY_SERIAL_PORTS) {</div><div class='ctx'> 			printk(KERN_DEBUG "Moved legacy port %d -&gt; %d\n",</div><div class='ctx'> 			       index, legacy_serial_count);</div><div class='del'>-			legacy_serial_ports[legacy_serial_count] =</div><div class='del'>-				legacy_serial_ports[index];</div><div class='del'>-			legacy_serial_infos[legacy_serial_count] =</div><div class='del'>-				legacy_serial_infos[index];</div><div class='add'>+			legacy_serial_ports[legacy_serial_count] = *legacy_port;</div><div class='add'>+			legacy_serial_infos[legacy_serial_count] = *legacy_info;</div><div class='ctx'> 			legacy_serial_count++;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			printk(KERN_DEBUG "Replacing legacy port %d\n", index);</div><div class='hunk'>@@ -127,36 +131,32 @@ static int __init add_legacy_port(struct device_node *np, int want_index,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Now fill the entry */</div><div class='del'>-	memset(&amp;legacy_serial_ports[index], 0,</div><div class='del'>-	       sizeof(struct plat_serial8250_port));</div><div class='add'>+	memset(legacy_port, 0, sizeof(*legacy_port));</div><div class='ctx'> 	if (iotype == UPIO_PORT)</div><div class='del'>-		legacy_serial_ports[index].iobase = base;</div><div class='add'>+		legacy_port-&gt;iobase = base;</div><div class='ctx'> 	else</div><div class='del'>-		legacy_serial_ports[index].mapbase = base;</div><div class='del'>-</div><div class='del'>-	legacy_serial_ports[index].iotype = iotype;</div><div class='del'>-	legacy_serial_ports[index].uartclk = clock;</div><div class='del'>-	legacy_serial_ports[index].irq = irq;</div><div class='del'>-	legacy_serial_ports[index].flags = flags;</div><div class='del'>-	legacy_serial_ports[index].regshift = shift;</div><div class='del'>-	legacy_serial_infos[index].taddr = taddr;</div><div class='del'>-	legacy_serial_infos[index].np = of_node_get(np);</div><div class='del'>-	legacy_serial_infos[index].clock = clock;</div><div class='del'>-	legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0;</div><div class='del'>-	legacy_serial_infos[index].irq_check_parent = irq_check_parent;</div><div class='add'>+		legacy_port-&gt;mapbase = base;</div><div class='add'>+</div><div class='add'>+	legacy_port-&gt;iotype = iotype;</div><div class='add'>+	legacy_port-&gt;uartclk = clock;</div><div class='add'>+	legacy_port-&gt;irq = irq;</div><div class='add'>+	legacy_port-&gt;flags = flags;</div><div class='add'>+	legacy_port-&gt;regshift = shift;</div><div class='add'>+	legacy_info-&gt;taddr = taddr;</div><div class='add'>+	legacy_info-&gt;np = of_node_get(np);</div><div class='add'>+	legacy_info-&gt;clock = clock;</div><div class='add'>+	legacy_info-&gt;speed = spd ? be32_to_cpup(spd) : 0;</div><div class='add'>+	legacy_info-&gt;irq_check_parent = irq_check_parent;</div><div class='ctx'> </div><div class='ctx'> 	if (iotype == UPIO_TSI) {</div><div class='del'>-		legacy_serial_ports[index].serial_in = tsi_serial_in;</div><div class='del'>-		legacy_serial_ports[index].serial_out = tsi_serial_out;</div><div class='add'>+		legacy_port-&gt;serial_in = tsi_serial_in;</div><div class='add'>+		legacy_port-&gt;serial_out = tsi_serial_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "Found legacy serial port %d for %pOF\n",</div><div class='del'>-	       index, np);</div><div class='del'>-	printk(KERN_DEBUG "  %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n",</div><div class='add'>+	printk(KERN_DEBUG "Found legacy serial port %d for %pOF\n", index, np);</div><div class='add'>+	printk(KERN_DEBUG "  %s=%pa, taddr=%pa, irq=%lx, clk=%d, speed=%d\n",</div><div class='ctx'> 	       (iotype == UPIO_PORT) ? "port" : "mem",</div><div class='del'>-	       (unsigned long long)base, (unsigned long long)taddr, irq,</div><div class='del'>-	       legacy_serial_ports[index].uartclk,</div><div class='del'>-	       legacy_serial_infos[index].speed);</div><div class='add'>+	       &amp;base, &amp;taddr, irq, legacy_port-&gt;uartclk, legacy_info-&gt;speed);</div><div class='ctx'> </div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S<br/>index 033cd00aa0fc..acb727f54e9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/misc_32.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/misc_32.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/misc_32.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/misc_32.S</a></div><div class='hunk'>@@ -28,32 +28,6 @@</div><div class='ctx'> 	.text</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This returns the high 64 bits of the product of two 64-bit numbers.</div><div class='del'>- */</div><div class='del'>-_GLOBAL(mulhdu)</div><div class='del'>-	cmpwi	r6,0</div><div class='del'>-	cmpwi	cr1,r3,0</div><div class='del'>-	mr	r10,r4</div><div class='del'>-	mulhwu	r4,r4,r5</div><div class='del'>-	beq	1f</div><div class='del'>-	mulhwu	r0,r10,r6</div><div class='del'>-	mullw	r7,r10,r5</div><div class='del'>-	addc	r7,r0,r7</div><div class='del'>-	addze	r4,r4</div><div class='del'>-1:	beqlr	cr1		/* all done if high part of A is 0 */</div><div class='del'>-	mullw	r9,r3,r5</div><div class='del'>-	mulhwu	r10,r3,r5</div><div class='del'>-	beq	2f</div><div class='del'>-	mullw	r0,r3,r6</div><div class='del'>-	mulhwu	r8,r3,r6</div><div class='del'>-	addc	r7,r0,r7</div><div class='del'>-	adde	r4,r4,r8</div><div class='del'>-	addze	r10,r10</div><div class='del'>-2:	addc	r4,r4,r9</div><div class='del'>-	addze	r3,r10</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * reloc_got2 runs through the .got2 section adding an offset</div><div class='ctx'>  * to each entry.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S<br/>index 91123e102db4..a997c7f43dc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/misc_64.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/misc_64.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/misc_64.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/misc_64.S</a></div><div class='hunk'>@@ -74,7 +74,7 @@ _GLOBAL(rmci_off)</div><div class='ctx'> 	blr</div><div class='ctx'> #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)</div><div class='add'>+#ifdef CONFIG_PPC_PMAC</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Do an IO access in real mode</div><div class='hunk'>@@ -137,7 +137,7 @@ _GLOBAL(real_writeb)</div><div class='ctx'> 	sync</div><div class='ctx'> 	isync</div><div class='ctx'> 	blr</div><div class='del'>-#endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */</div><div class='add'>+#endif // CONFIG_PPC_PMAC</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_PASEMI</div><div class='ctx'> </div><div class='hunk'>@@ -174,7 +174,7 @@ _GLOBAL(real_205_writeb)</div><div class='ctx'> #endif /* CONFIG_PPC_PASEMI */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPU_FREQ_PMAC64) || defined(CONFIG_CPU_FREQ_MAPLE)</div><div class='add'>+#ifdef CONFIG_CPU_FREQ_PMAC64</div><div class='ctx'> /*</div><div class='ctx'>  * SCOM access functions for 970 (FX only for now)</div><div class='ctx'>  *</div><div class='hunk'>@@ -243,7 +243,7 @@ _GLOBAL(scom970_write)</div><div class='ctx'> 	/* restore interrupts */</div><div class='ctx'> 	mtmsrd	r5,1</div><div class='ctx'> 	blr</div><div class='del'>-#endif /* CONFIG_CPU_FREQ_PMAC64 || CONFIG_CPU_FREQ_MAPLE */</div><div class='add'>+#endif // CONFIG_CPU_FREQ_PMAC64</div><div class='ctx'> </div><div class='ctx'> /* kexec_wait(phys_cpu)</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c<br/>index 816a63fd71fb..f930e3395a7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/module_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/module_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/module_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/module_32.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Count how many different relocations (different symbol, different</div><div class='ctx'>    addend) */</div><div class='head'>diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c<br/>index e9bab599d0c2..2a44bc8e2439 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/module_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/module_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/module_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/module_64.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;asm/module.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -205,10 +205,11 @@ static int relacmp(const void *_x, const void *_y)</div><div class='ctx'> </div><div class='ctx'> /* Get size of potential trampolines required. */</div><div class='ctx'> static unsigned long get_stubs_size(const Elf64_Ehdr *hdr,</div><div class='del'>-				    const Elf64_Shdr *sechdrs)</div><div class='add'>+				    const Elf64_Shdr *sechdrs,</div><div class='add'>+				    char *secstrings,</div><div class='add'>+				    struct module *me)</div><div class='ctx'> {</div><div class='del'>-	/* One extra reloc so it's always 0-addr terminated */</div><div class='del'>-	unsigned long relocs = 1;</div><div class='add'>+	unsigned long relocs = 0;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> </div><div class='ctx'> 	/* Every relocated section... */</div><div class='hunk'>@@ -241,13 +242,21 @@ static unsigned long get_stubs_size(const Elf64_Ehdr *hdr,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='del'>-	/* make the trampoline to the ftrace_caller */</div><div class='del'>-	relocs++;</div><div class='del'>-#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS</div><div class='del'>-	/* an additional one for ftrace_regs_caller */</div><div class='del'>-	relocs++;</div><div class='del'>-#endif</div><div class='add'>+	/* stubs for ftrace_caller and ftrace_regs_caller */</div><div class='add'>+	relocs += IS_ENABLED(CONFIG_DYNAMIC_FTRACE) + IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	/* stubs for the function tracer */</div><div class='add'>+	for (i = 1; i &lt; hdr-&gt;e_shnum; i++) {</div><div class='add'>+		if (!strcmp(secstrings + sechdrs[i].sh_name, "__patchable_function_entries")) {</div><div class='add'>+			me-&gt;arch.ool_stub_count = sechdrs[i].sh_size / sizeof(unsigned long);</div><div class='add'>+			me-&gt;arch.ool_stub_index = 0;</div><div class='add'>+			relocs += roundup(me-&gt;arch.ool_stub_count * sizeof(struct ftrace_ool_stub),</div><div class='add'>+					  sizeof(struct ppc64_stub_entry)) /</div><div class='add'>+				  sizeof(struct ppc64_stub_entry);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Looks like a total of %lu stubs, max\n", relocs);</div><div class='hunk'>@@ -355,6 +364,24 @@ static void dedotify_versions(struct modversion_info *vers,</div><div class='ctx'> 		}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Same as normal versions, remove a leading dot if present. */</div><div class='add'>+static void dedotify_ext_version_names(char *str_seq, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	unsigned long out = 0;</div><div class='add'>+	unsigned long in;</div><div class='add'>+	char last = '\0';</div><div class='add'>+</div><div class='add'>+	for (in = 0; in &lt; size; in++) {</div><div class='add'>+		/* Skip one leading dot */</div><div class='add'>+		if (last == '\0' &amp;&amp; str_seq[in] == '.')</div><div class='add'>+			in++;</div><div class='add'>+		last = str_seq[in];</div><div class='add'>+		str_seq[out++] = last;</div><div class='add'>+	}</div><div class='add'>+	/* Zero the trailing portion of the names table for robustness */</div><div class='add'>+	memset(&amp;str_seq[out], 0, size - out);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Undefined symbols which refer to .funcname, hack to funcname. Make .TOC.</div><div class='ctx'>  * seem to be defined (value set later).</div><div class='hunk'>@@ -424,10 +451,12 @@ int module_frob_arch_sections(Elf64_Ehdr *hdr,</div><div class='ctx'> 			me-&gt;arch.toc_section = i;</div><div class='ctx'> 			if (sechdrs[i].sh_addralign &lt; 8)</div><div class='ctx'> 				sechdrs[i].sh_addralign = 8;</div><div class='del'>-		}</div><div class='del'>-		else if (strcmp(secstrings+sechdrs[i].sh_name,"__versions")==0)</div><div class='add'>+		} else if (strcmp(secstrings + sechdrs[i].sh_name, "__versions") == 0)</div><div class='ctx'> 			dedotify_versions((void *)hdr + sechdrs[i].sh_offset,</div><div class='ctx'> 					  sechdrs[i].sh_size);</div><div class='add'>+		else if (strcmp(secstrings + sechdrs[i].sh_name, "__version_ext_names") == 0)</div><div class='add'>+			dedotify_ext_version_names((void *)hdr + sechdrs[i].sh_offset,</div><div class='add'>+						   sechdrs[i].sh_size);</div><div class='ctx'> </div><div class='ctx'> 		if (sechdrs[i].sh_type == SHT_SYMTAB)</div><div class='ctx'> 			dedotify((void *)hdr + sechdrs[i].sh_offset,</div><div class='hunk'>@@ -460,7 +489,7 @@ int module_frob_arch_sections(Elf64_Ehdr *hdr,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Override the stubs size */</div><div class='del'>-	sechdrs[me-&gt;arch.stubs_section].sh_size = get_stubs_size(hdr, sechdrs);</div><div class='add'>+	sechdrs[me-&gt;arch.stubs_section].sh_size = get_stubs_size(hdr, sechdrs, secstrings, me);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -675,7 +704,7 @@ static unsigned long stub_for_addr(const Elf64_Shdr *sechdrs,</div><div class='ctx'> </div><div class='ctx'> 	/* Find this stub, or if that fails, the next avail. entry */</div><div class='ctx'> 	stubs = (void *)sechdrs[me-&gt;arch.stubs_section].sh_addr;</div><div class='del'>-	for (i = 0; stub_func_addr(stubs[i].funcdata); i++) {</div><div class='add'>+	for (i = 0; i &lt; me-&gt;arch.stub_count; i++) {</div><div class='ctx'> 		if (WARN_ON(i &gt;= num_stubs))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -686,6 +715,7 @@ static unsigned long stub_for_addr(const Elf64_Shdr *sechdrs,</div><div class='ctx'> 	if (!create_stub(sechdrs, &amp;stubs[i], addr, me, name))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	me-&gt;arch.stub_count++;</div><div class='ctx'> 	return (unsigned long)&amp;stubs[i];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1085,6 +1115,27 @@ int module_trampoline_target(struct module *mod, unsigned long addr,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int setup_ftrace_ool_stubs(const Elf64_Shdr *sechdrs, unsigned long addr, struct module *me)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	unsigned int total_stubs, num_stubs;</div><div class='add'>+	struct ppc64_stub_entry *stub;</div><div class='add'>+</div><div class='add'>+	total_stubs = sechdrs[me-&gt;arch.stubs_section].sh_size / sizeof(*stub);</div><div class='add'>+	num_stubs = roundup(me-&gt;arch.ool_stub_count * sizeof(struct ftrace_ool_stub),</div><div class='add'>+			    sizeof(struct ppc64_stub_entry)) / sizeof(struct ppc64_stub_entry);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(me-&gt;arch.stub_count + num_stubs &gt; total_stubs))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	stub = (void *)sechdrs[me-&gt;arch.stubs_section].sh_addr;</div><div class='add'>+	me-&gt;arch.ool_stubs = (struct ftrace_ool_stub *)(stub + me-&gt;arch.stub_count);</div><div class='add'>+	me-&gt;arch.stub_count += num_stubs;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int module_finalize_ftrace(struct module *mod, const Elf_Shdr *sechdrs)</div><div class='ctx'> {</div><div class='ctx'> 	mod-&gt;arch.tramp = stub_for_addr(sechdrs,</div><div class='hunk'>@@ -1103,6 +1154,9 @@ int module_finalize_ftrace(struct module *mod, const Elf_Shdr *sechdrs)</div><div class='ctx'> 	if (!mod-&gt;arch.tramp)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='add'>+	if (setup_ftrace_ool_stubs(sechdrs, mod-&gt;arch.tramp, mod))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c<br/>deleted file mode 100644<br/>index adc76fa58d1e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/of_platform.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/of_platform.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,102 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.</div><div class='del'>- *			 &lt;benh@kernel.crashing.org&gt;</div><div class='del'>- *    and		 Arnd Bergmann, IBM Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/mod_devicetable.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/atomic.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/topology.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;asm/eeh.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_OF_PLATFORM_PCI</div><div class='del'>-</div><div class='del'>-/* The probing of PCI controllers from of_platform is currently</div><div class='del'>- * 64 bits only, mostly due to gratuitous differences between</div><div class='del'>- * the 32 and 64 bits PCI code on PowerPC and the 32 bits one</div><div class='del'>- * lacking some bits needed here.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int of_pci_phb_probe(struct platform_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *phb;</div><div class='del'>-</div><div class='del'>-	/* Check if we can do that ... */</div><div class='del'>-	if (ppc_md.pci_setup_phb == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pr_info("Setting up PCI bus %pOF\n", dev-&gt;dev.of_node);</div><div class='del'>-</div><div class='del'>-	/* Alloc and setup PHB data structure */</div><div class='del'>-	phb = pcibios_alloc_controller(dev-&gt;dev.of_node);</div><div class='del'>-	if (!phb)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	/* Setup parent in sysfs */</div><div class='del'>-	phb-&gt;parent = &amp;dev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	/* Setup the PHB using arch provided callback */</div><div class='del'>-	if (ppc_md.pci_setup_phb(phb)) {</div><div class='del'>-		pcibios_free_controller(phb);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Process "ranges" property */</div><div class='del'>-	pci_process_bridge_OF_ranges(phb, dev-&gt;dev.of_node, 0);</div><div class='del'>-</div><div class='del'>-	/* Init pci_dn data structures */</div><div class='del'>-	pci_devs_phb_init_dynamic(phb);</div><div class='del'>-</div><div class='del'>-	/* Create EEH PE for the PHB */</div><div class='del'>-	eeh_phb_pe_create(phb);</div><div class='del'>-</div><div class='del'>-	/* Scan the bus */</div><div class='del'>-	pcibios_scan_phb(phb);</div><div class='del'>-	if (phb-&gt;bus == NULL)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	/* Claim resources. This might need some rework as well depending</div><div class='del'>-	 * whether we are doing probe-only or not, like assigning unassigned</div><div class='del'>-	 * resources etc...</div><div class='del'>-	 */</div><div class='del'>-	pcibios_claim_one_bus(phb-&gt;bus);</div><div class='del'>-</div><div class='del'>-	/* Add probed PCI devices to the device model */</div><div class='del'>-	pci_bus_add_devices(phb-&gt;bus);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct of_device_id of_pci_phb_ids[] = {</div><div class='del'>-	{ .type = "pci", },</div><div class='del'>-	{ .type = "pcix", },</div><div class='del'>-	{ .type = "pcie", },</div><div class='del'>-	{ .type = "pciex", },</div><div class='del'>-	{ .type = "ht", },</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_driver of_pci_phb_driver = {</div><div class='del'>-	.probe = of_pci_phb_probe,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "of-pci",</div><div class='del'>-		.of_match_table = of_pci_phb_ids,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-builtin_platform_driver(of_pci_phb_driver);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_PPC_OF_PLATFORM_PCI */</div><div class='head'>diff --git a/arch/powerpc/kernel/optprobes.c b/arch/powerpc/kernel/optprobes.c<br/>index c0b351d61058..2e83702bf9ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/optprobes.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/optprobes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/optprobes.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/optprobes.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;asm/kprobes.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/sstep.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c<br/>index 9ea74973d78d..6f444d0822d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/pci-hotplug.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/pci-hotplug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/pci-hotplug.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/pci-hotplug.c</a></div><div class='hunk'>@@ -141,6 +141,9 @@ void pci_hp_add_devices(struct pci_bus *bus)</div><div class='ctx'> 	struct pci_controller *phb;</div><div class='ctx'> 	struct device_node *dn = pci_bus_to_OF_node(bus);</div><div class='ctx'> </div><div class='add'>+	if (!dn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	phb = pci_bus_to_host(bus);</div><div class='ctx'> </div><div class='ctx'> 	mode = PCI_PROBE_NORMAL;</div><div class='head'>diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c<br/>index ce0c8623e563..f8a3bd8cfae4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/pci_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/pci_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/pci_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/pci_32.c</a></div><div class='hunk'>@@ -213,11 +213,8 @@ pci_create_OF_bus_map(void)</div><div class='ctx'> 	struct property* of_prop;</div><div class='ctx'> 	struct device_node *dn;</div><div class='ctx'> </div><div class='del'>-	of_prop = memblock_alloc(sizeof(struct property) + 256,</div><div class='add'>+	of_prop = memblock_alloc_or_panic(sizeof(struct property) + 256,</div><div class='ctx'> 				 SMP_CACHE_BYTES);</div><div class='del'>-	if (!of_prop)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(struct property) + 256);</div><div class='ctx'> 	dn = of_find_node_by_path("/");</div><div class='ctx'> 	if (dn) {</div><div class='ctx'> 		memset(of_prop, -1, sizeof(struct property) + 256);</div><div class='head'>diff --git a/arch/powerpc/kernel/proc_powerpc.c b/arch/powerpc/kernel/proc_powerpc.c<br/>index b109cd7b5d01..d083b4517065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/proc_powerpc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/proc_powerpc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/proc_powerpc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/proc_powerpc.c</a></div><div class='hunk'>@@ -4,17 +4,20 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC64</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='ctx'> </div><div class='ctx'> static loff_t page_map_seek(struct file *file, loff_t off, int whence)</div><div class='ctx'> {</div><div class='hunk'>@@ -33,10 +36,9 @@ static int page_map_mmap( struct file *file, struct vm_area_struct *vma )</div><div class='ctx'> 	if ((vma-&gt;vm_end - vma-&gt;vm_start) &gt; PAGE_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='del'>-			__pa(pde_data(file_inode(file))) &gt;&gt; PAGE_SHIFT,</div><div class='del'>-			PAGE_SIZE, vma-&gt;vm_page_prot);</div><div class='del'>-	return 0;</div><div class='add'>+	return remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='add'>+			       __pa(pde_data(file_inode(file))) &gt;&gt; PAGE_SHIFT,</div><div class='add'>+			       PAGE_SIZE, vma-&gt;vm_page_prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct proc_ops page_map_proc_ops = {</div><div class='hunk'>@@ -45,13 +47,35 @@ static const struct proc_ops page_map_proc_ops = {</div><div class='ctx'> 	.proc_mmap	= page_map_mmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static union {</div><div class='add'>+	struct systemcfg	data;</div><div class='add'>+	u8			page[PAGE_SIZE];</div><div class='add'>+} systemcfg_data_store __page_aligned_data;</div><div class='add'>+struct systemcfg *systemcfg = &amp;systemcfg_data_store.data;</div><div class='ctx'> </div><div class='ctx'> static int __init proc_ppc64_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct proc_dir_entry *pde;</div><div class='ctx'> </div><div class='add'>+	strscpy(systemcfg-&gt;eye_catcher, "SYSTEMCFG:PPC64");</div><div class='add'>+	systemcfg-&gt;version.major = SYSTEMCFG_MAJOR;</div><div class='add'>+	systemcfg-&gt;version.minor = SYSTEMCFG_MINOR;</div><div class='add'>+	systemcfg-&gt;processor = mfspr(SPRN_PVR);</div><div class='add'>+	/*</div><div class='add'>+	 * Fake the old platform number for pSeries and add</div><div class='add'>+	 * in LPAR bit if necessary</div><div class='add'>+	 */</div><div class='add'>+	systemcfg-&gt;platform = 0x100;</div><div class='add'>+	if (firmware_has_feature(FW_FEATURE_LPAR))</div><div class='add'>+		systemcfg-&gt;platform |= 1;</div><div class='add'>+	systemcfg-&gt;physicalMemorySize = memblock_phys_mem_size();</div><div class='add'>+	systemcfg-&gt;dcache_size = ppc64_caches.l1d.size;</div><div class='add'>+	systemcfg-&gt;dcache_line_size = ppc64_caches.l1d.line_size;</div><div class='add'>+	systemcfg-&gt;icache_size = ppc64_caches.l1i.size;</div><div class='add'>+	systemcfg-&gt;icache_line_size = ppc64_caches.l1i.line_size;</div><div class='add'>+</div><div class='ctx'> 	pde = proc_create_data("powerpc/systemcfg", S_IFREG | 0444, NULL,</div><div class='del'>-			       &amp;page_map_proc_ops, vdso_data);</div><div class='add'>+			       &amp;page_map_proc_ops, systemcfg);</div><div class='ctx'> 	if (!pde)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	proc_set_size(pde, PAGE_SIZE);</div><div class='hunk'>@@ -60,7 +84,7 @@ static int __init proc_ppc64_init(void)</div><div class='ctx'> }</div><div class='ctx'> __initcall(proc_ppc64_init);</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_PPC64 */</div><div class='add'>+#endif /* CONFIG_PPC64_PROC_SYSTEMCFG */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Create the ppc64 and ppc64/rtas directories early. This allows us to</div><div class='head'>diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c<br/>index ff61a3e7984c..eb23966ac0a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/process.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/process.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/process.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #endif</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/exec.h&gt;</div><div class='ctx'> #include &lt;asm/livepatch.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='hunk'>@@ -1000,7 +1000,7 @@ static inline void tm_reclaim_task(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(tm_suspend_disabled);</div><div class='ctx'> </div><div class='del'>-	TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "</div><div class='add'>+	TM_DEBUG("---- tm_reclaim on pid %d (NIP=%lx, "</div><div class='ctx'> 		 "ccr=%lx, msr=%lx, trap=%lx)\n",</div><div class='ctx'> 		 tsk-&gt;pid, thr-&gt;regs-&gt;nip,</div><div class='ctx'> 		 thr-&gt;regs-&gt;ccr, thr-&gt;regs-&gt;msr,</div><div class='hunk'>@@ -1008,7 +1008,7 @@ static inline void tm_reclaim_task(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> 	tm_reclaim_thread(thr, TM_CAUSE_RESCHED);</div><div class='ctx'> </div><div class='del'>-	TM_DEBUG("--- tm_reclaim on pid %d complete\n",</div><div class='add'>+	TM_DEBUG("---- tm_reclaim on pid %d complete\n",</div><div class='ctx'> 		 tsk-&gt;pid);</div><div class='ctx'> </div><div class='ctx'> out_and_saveregs:</div><div class='hunk'>@@ -1805,7 +1805,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 			f = ret_from_kernel_user_thread;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			struct pt_regs *regs = current_pt_regs();</div><div class='del'>-			unsigned long clone_flags = args-&gt;flags;</div><div class='add'>+			u64 clone_flags = args-&gt;flags;</div><div class='ctx'> 			unsigned long usp = args-&gt;stack;</div><div class='ctx'> </div><div class='ctx'> 			/* Copy registers */</div><div class='hunk'>@@ -1960,8 +1960,8 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)</div><div class='ctx'> 			 * address of _start and the second entry is the TOC</div><div class='ctx'> 			 * value we need to use.</div><div class='ctx'> 			 */</div><div class='del'>-			__get_user(entry, (unsigned long __user *)start);</div><div class='del'>-			__get_user(toc, (unsigned long __user *)start+1);</div><div class='add'>+			get_user(entry, (unsigned long __user *)start);</div><div class='add'>+			get_user(toc, (unsigned long __user *)start+1);</div><div class='ctx'> </div><div class='ctx'> 			/* Check whether the e_entry function descriptor entries</div><div class='ctx'> 			 * need to be relocated before we can use them.</div><div class='hunk'>@@ -2367,14 +2367,14 @@ void __no_sanitize_address show_stack(struct task_struct *tsk,</div><div class='ctx'> 				(sp + STACK_INT_FRAME_REGS);</div><div class='ctx'> </div><div class='ctx'> 			lr = regs-&gt;link;</div><div class='del'>-			printk("%s--- interrupt: %lx at %pS\n",</div><div class='add'>+			printk("%s---- interrupt: %lx at %pS\n",</div><div class='ctx'> 			       loglvl, regs-&gt;trap, (void *)regs-&gt;nip);</div><div class='ctx'> </div><div class='ctx'> 			// Detect the case of an empty pt_regs at the very base</div><div class='ctx'> 			// of the stack and suppress showing it in full.</div><div class='ctx'> 			if (!empty_user_regs(regs, tsk)) {</div><div class='ctx'> 				__show_regs(regs);</div><div class='del'>-				printk("%s--- interrupt: %lx\n", loglvl, regs-&gt;trap);</div><div class='add'>+				printk("%s---- interrupt: %lx\n", loglvl, regs-&gt;trap);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			firstframe = 1;</div><div class='head'>diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c<br/>index 0be07ed407c7..9ed9dde7d231 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/prom.c</a></div><div class='hunk'>@@ -791,7 +791,7 @@ void __init early_init_devtree(void *params)</div><div class='ctx'> 	DBG(" -&gt; early_init_devtree(%px)\n", params);</div><div class='ctx'> </div><div class='ctx'> 	/* Too early to BUG_ON(), do it by hand */</div><div class='del'>-	if (!early_init_dt_verify(params))</div><div class='add'>+	if (!early_init_dt_verify(params, __pa(params)))</div><div class='ctx'> 		panic("BUG: Failed verifying flat device tree, bad version?");</div><div class='ctx'> </div><div class='ctx'> 	of_scan_flat_dt(early_init_dt_scan_model, NULL);</div><div class='hunk'>@@ -860,7 +860,7 @@ void __init early_init_devtree(void *params)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fadump_reserve_mem() == 0)</div><div class='ctx'> #endif</div><div class='del'>-		reserve_crashkernel();</div><div class='add'>+		arch_reserve_crashkernel();</div><div class='ctx'> 	early_reserve_mem();</div><div class='ctx'> </div><div class='ctx'> 	if (memory_limit &gt; memblock_phys_mem_size())</div><div class='hunk'>@@ -908,6 +908,9 @@ void __init early_init_devtree(void *params)</div><div class='ctx'> </div><div class='ctx'> 	mmu_early_init_devtree();</div><div class='ctx'> </div><div class='add'>+	/* Setup param area for passing additional parameters to fadump capture kernel. */</div><div class='add'>+	fadump_setup_param_area();</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC_POWERNV</div><div class='ctx'> 	/* Scan and build the list of machine check recoverable ranges */</div><div class='ctx'> 	of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);</div><div class='head'>diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c<br/>index fbb68fc28ed3..827c958677f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom_init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom_init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom_init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/prom_init.c</a></div><div class='hunk'>@@ -1061,7 +1061,7 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {</div><div class='ctx'> 		.virt_base = cpu_to_be32(0xffffffff),</div><div class='ctx'> 		.virt_size = cpu_to_be32(0xffffffff),</div><div class='ctx'> 		.load_base = cpu_to_be32(0xffffffff),</div><div class='del'>-		.min_rma = cpu_to_be32(512),		/* 512MB min RMA */</div><div class='add'>+		.min_rma = cpu_to_be32(MIN_RMA),</div><div class='ctx'> 		.min_load = cpu_to_be32(0xffffffff),	/* full client load */</div><div class='ctx'> 		.min_rma_percent = 0,	/* min RMA percentage of total RAM */</div><div class='ctx'> 		.max_pft_size = 48,	/* max log_2(hash table size) */</div><div class='hunk'>@@ -2792,91 +2792,6 @@ static void __init flatten_device_tree(void)</div><div class='ctx'> 		    dt_struct_start, dt_struct_end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_MAPLE</div><div class='del'>-/* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.</div><div class='del'>- * The values are bad, and it doesn't even have the right number of cells. */</div><div class='del'>-static void __init fixup_device_tree_maple(void)</div><div class='del'>-{</div><div class='del'>-	phandle isa;</div><div class='del'>-	u32 rloc = 0x01002000; /* IO space; PCI device = 4 */</div><div class='del'>-	u32 isa_ranges[6];</div><div class='del'>-	char *name;</div><div class='del'>-</div><div class='del'>-	name = "/ht@0/isa@4";</div><div class='del'>-	isa = call_prom("finddevice", 1, 1, ADDR(name));</div><div class='del'>-	if (!PHANDLE_VALID(isa)) {</div><div class='del'>-		name = "/ht@0/isa@6";</div><div class='del'>-		isa = call_prom("finddevice", 1, 1, ADDR(name));</div><div class='del'>-		rloc = 0x01003000; /* IO space; PCI device = 6 */</div><div class='del'>-	}</div><div class='del'>-	if (!PHANDLE_VALID(isa))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (prom_getproplen(isa, "ranges") != 12)</div><div class='del'>-		return;</div><div class='del'>-	if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges))</div><div class='del'>-		== PROM_ERROR)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (isa_ranges[0] != 0x1 ||</div><div class='del'>-		isa_ranges[1] != 0xf4000000 ||</div><div class='del'>-		isa_ranges[2] != 0x00010000)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	prom_printf("Fixing up bogus ISA range on Maple/Apache...\n");</div><div class='del'>-</div><div class='del'>-	isa_ranges[0] = 0x1;</div><div class='del'>-	isa_ranges[1] = 0x0;</div><div class='del'>-	isa_ranges[2] = rloc;</div><div class='del'>-	isa_ranges[3] = 0x0;</div><div class='del'>-	isa_ranges[4] = 0x0;</div><div class='del'>-	isa_ranges[5] = 0x00010000;</div><div class='del'>-	prom_setprop(isa, name, "ranges",</div><div class='del'>-			isa_ranges, sizeof(isa_ranges));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CPC925_MC_START		0xf8000000</div><div class='del'>-#define CPC925_MC_LENGTH	0x1000000</div><div class='del'>-/* The values for memory-controller don't have right number of cells */</div><div class='del'>-static void __init fixup_device_tree_maple_memory_controller(void)</div><div class='del'>-{</div><div class='del'>-	phandle mc;</div><div class='del'>-	u32 mc_reg[4];</div><div class='del'>-	char *name = "/hostbridge@f8000000";</div><div class='del'>-	u32 ac, sc;</div><div class='del'>-</div><div class='del'>-	mc = call_prom("finddevice", 1, 1, ADDR(name));</div><div class='del'>-	if (!PHANDLE_VALID(mc))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (prom_getproplen(mc, "reg") != 8)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	prom_getprop(prom.root, "#address-cells", &amp;ac, sizeof(ac));</div><div class='del'>-	prom_getprop(prom.root, "#size-cells", &amp;sc, sizeof(sc));</div><div class='del'>-	if ((ac != 2) || (sc != 2))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (prom_getprop(mc, "reg", mc_reg, sizeof(mc_reg)) == PROM_ERROR)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (mc_reg[0] != CPC925_MC_START || mc_reg[1] != CPC925_MC_LENGTH)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	prom_printf("Fixing up bogus hostbridge on Maple...\n");</div><div class='del'>-</div><div class='del'>-	mc_reg[0] = 0x0;</div><div class='del'>-	mc_reg[1] = CPC925_MC_START;</div><div class='del'>-	mc_reg[2] = 0x0;</div><div class='del'>-	mc_reg[3] = CPC925_MC_LENGTH;</div><div class='del'>-	prom_setprop(mc, name, "reg", mc_reg, sizeof(mc_reg));</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define fixup_device_tree_maple()</div><div class='del'>-#define fixup_device_tree_maple_memory_controller()</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_CHRP</div><div class='ctx'> /*</div><div class='ctx'>  * Pegasos and BriQ lacks the "ranges" property in the isa node</div><div class='ctx'>  * Pegasos needs decimal IRQ 14/15, not hexadecimal</div><div class='hunk'>@@ -2927,12 +2842,8 @@ static void __init fixup_device_tree_chrp(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define fixup_device_tree_chrp()</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PPC64) &amp;&amp; defined(CONFIG_PPC_PMAC)</div><div class='del'>-static void __init fixup_device_tree_pmac(void)</div><div class='add'>+static void __init fixup_device_tree_pmac64(void)</div><div class='ctx'> {</div><div class='ctx'> 	phandle u3, i2c, mpic;</div><div class='ctx'> 	u32 u3_rev;</div><div class='hunk'>@@ -2971,11 +2882,27 @@ static void __init fixup_device_tree_pmac(void)</div><div class='ctx'> 	prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",</div><div class='ctx'> 		     &amp;parent, sizeof(parent));</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define fixup_device_tree_pmac()</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_EFIKA</div><div class='add'>+static void __init fixup_device_tree_pmac(void)</div><div class='add'>+{</div><div class='add'>+	__be32 val = 1;</div><div class='add'>+	char type[8];</div><div class='add'>+	phandle node;</div><div class='add'>+</div><div class='add'>+	// Some pmacs are missing #size-cells on escc or i2s nodes</div><div class='add'>+	for (node = 0; prom_next_node(&amp;node); ) {</div><div class='add'>+		type[0] = '\0';</div><div class='add'>+		prom_getprop(node, "device_type", type, sizeof(type));</div><div class='add'>+		if (prom_strcmp(type, "escc") &amp;&amp; prom_strcmp(type, "i2s"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (prom_getproplen(node, "#size-cells") != PROM_ERROR)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		prom_setprop(node, NULL, "#size-cells", &amp;val, sizeof(val));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The MPC5200 FEC driver requires an phy-handle property to tell it how</div><div class='ctx'>  * to talk to the phy.  If the phy-handle property is missing, then this</div><div class='hunk'>@@ -3107,11 +3034,7 @@ static void __init fixup_device_tree_efika(void)</div><div class='ctx'> 	/* Make sure ethernet phy-handle property exists */</div><div class='ctx'> 	fixup_device_tree_efika_add_phy();</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define fixup_device_tree_efika()</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_PASEMI_NEMO</div><div class='ctx'> /*</div><div class='ctx'>  * CFE supplied on Nemo is broken in several ways, biggest</div><div class='ctx'>  * problem is that it reassigns ISA interrupts to unused mpic ints.</div><div class='hunk'>@@ -3187,18 +3110,23 @@ static void __init fixup_device_tree_pasemi(void)</div><div class='ctx'> </div><div class='ctx'> 	prom_setprop(iob, name, "device_type", "isa", sizeof("isa"));</div><div class='ctx'> }</div><div class='del'>-#else	/* !CONFIG_PPC_PASEMI_NEMO */</div><div class='del'>-static inline void fixup_device_tree_pasemi(void) { }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static void __init fixup_device_tree(void)</div><div class='ctx'> {</div><div class='del'>-	fixup_device_tree_maple();</div><div class='del'>-	fixup_device_tree_maple_memory_controller();</div><div class='del'>-	fixup_device_tree_chrp();</div><div class='del'>-	fixup_device_tree_pmac();</div><div class='del'>-	fixup_device_tree_efika();</div><div class='del'>-	fixup_device_tree_pasemi();</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_CHRP))</div><div class='add'>+		fixup_device_tree_chrp();</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_PMAC))</div><div class='add'>+		fixup_device_tree_pmac();</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_PMAC) &amp;&amp; IS_ENABLED(CONFIG_PPC64))</div><div class='add'>+		fixup_device_tree_pmac64();</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_EFIKA))</div><div class='add'>+		fixup_device_tree_efika();</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_PASEMI_NEMO))</div><div class='add'>+		fixup_device_tree_pasemi();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init prom_find_boot_cpu(void)</div><div class='head'>diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh<br/>index 69623b9045d5..3090b97258ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom_init_check.sh?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/prom_init_check.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/prom_init_check.sh?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/prom_init_check.sh</a></div><div class='hunk'>@@ -15,8 +15,8 @@</div><div class='ctx'> </div><div class='ctx'> has_renamed_memintrinsics()</div><div class='ctx'> {</div><div class='del'>-	grep -q "^CONFIG_KASAN=y$" ${KCONFIG_CONFIG} &amp;&amp; \</div><div class='del'>-		! grep -q "^CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX=y" ${KCONFIG_CONFIG}</div><div class='add'>+	grep -q "^CONFIG_KASAN=y$" "${KCONFIG_CONFIG}" &amp;&amp; \</div><div class='add'>+		! grep -q "^CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX=y" "${KCONFIG_CONFIG}"</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> if has_renamed_memintrinsics</div><div class='hunk'>@@ -42,15 +42,15 @@ check_section()</div><div class='ctx'> {</div><div class='ctx'>     file=$1</div><div class='ctx'>     section=$2</div><div class='del'>-    size=$(objdump -h -j $section $file 2&gt;/dev/null | awk "\$2 == \"$section\" {print \$3}")</div><div class='add'>+    size=$(objdump -h -j "$section" "$file" 2&gt;/dev/null | awk "\$2 == \"$section\" {print \$3}")</div><div class='ctx'>     size=${size:-0}</div><div class='del'>-    if [ $size -ne 0 ]; then</div><div class='add'>+    if [ "$size" -ne 0 ]; then</div><div class='ctx'> 	ERROR=1</div><div class='ctx'> 	echo "Error: Section $section not empty in prom_init.c" &gt;&amp;2</div><div class='ctx'>     fi</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-for UNDEF in $($NM -u $OBJ | awk '{print $2}')</div><div class='add'>+for UNDEF in $($NM -u "$OBJ" | awk '{print $2}')</div><div class='ctx'> do</div><div class='ctx'> 	# On 64-bit nm gives us the function descriptors, which have</div><div class='ctx'> 	# a leading . on the name, so strip it off here.</div><div class='hunk'>@@ -87,8 +87,8 @@ do</div><div class='ctx'> 	fi</div><div class='ctx'> done</div><div class='ctx'> </div><div class='del'>-check_section $OBJ .data</div><div class='del'>-check_section $OBJ .bss</div><div class='del'>-check_section $OBJ .init.data</div><div class='add'>+check_section "$OBJ" .data</div><div class='add'>+check_section "$OBJ" .bss</div><div class='add'>+check_section "$OBJ" .init.data</div><div class='ctx'> </div><div class='ctx'> exit $ERROR</div><div class='head'>diff --git a/arch/powerpc/kernel/ptrace/ptrace-view.c b/arch/powerpc/kernel/ptrace/ptrace-view.c<br/>index c1819e0a6684..0310f9097e39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/ptrace/ptrace-view.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/ptrace/ptrace-view.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/ptrace/ptrace-view.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/ptrace/ptrace-view.c</a></div><div class='hunk'>@@ -568,114 +568,114 @@ static int pkey_set(struct task_struct *target, const struct user_regset *regset</div><div class='ctx'> </div><div class='ctx'> static const struct user_regset native_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(long), .align = sizeof(long),</div><div class='ctx'> 		.regset_get = gpr_get, .set = gpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.regset_get = fpr_get, .set = fpr_set</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_ALTIVEC</div><div class='ctx'> 	[REGSET_VMX] = {</div><div class='del'>-		.core_note_type = NT_PPC_VMX, .n = 34,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_VMX), .n = 34,</div><div class='ctx'> 		.size = sizeof(vector128), .align = sizeof(vector128),</div><div class='ctx'> 		.active = vr_active, .regset_get = vr_get, .set = vr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_VSX</div><div class='ctx'> 	[REGSET_VSX] = {</div><div class='del'>-		.core_note_type = NT_PPC_VSX, .n = 32,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_VSX), .n = 32,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.active = vsr_active, .regset_get = vsr_get, .set = vsr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='ctx'> 	[REGSET_SPE] = {</div><div class='del'>-		.core_note_type = NT_PPC_SPE, .n = 35,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_SPE), .n = 35,</div><div class='ctx'> 		.size = sizeof(u32), .align = sizeof(u32),</div><div class='ctx'> 		.active = evr_active, .regset_get = evr_get, .set = evr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_TRANSACTIONAL_MEM</div><div class='ctx'> 	[REGSET_TM_CGPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CGPR), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(long), .align = sizeof(long),</div><div class='ctx'> 		.active = tm_cgpr_active, .regset_get = tm_cgpr_get, .set = tm_cgpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CFPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CFPR), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CVMX] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CVMX), .n = ELF_NVMX,</div><div class='ctx'> 		.size = sizeof(vector128), .align = sizeof(vector128),</div><div class='ctx'> 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CVSX] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CVSX), .n = ELF_NVSX,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_SPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_SPR), .n = ELF_NTMSPRREG,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CTAR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CTAR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CTAR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CPPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CPPR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CPPR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CDSCR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CDSCR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	[REGSET_PPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_PPR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_PPR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = ppr_get, .set = ppr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_DSCR] = {</div><div class='del'>-		.core_note_type = NT_PPC_DSCR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_DSCR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = dscr_get, .set = dscr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	[REGSET_TAR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TAR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TAR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = tar_get, .set = tar_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_EBB] = {</div><div class='del'>-		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_EBB), .n = ELF_NEBB,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_PMR] = {</div><div class='del'>-		.core_note_type = NT_PPC_PMU, .n = ELF_NPMU,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_PMU), .n = ELF_NPMU,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = pmu_active, .regset_get = pmu_get, .set = pmu_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_DEXCR] = {</div><div class='del'>-		.core_note_type = NT_PPC_DEXCR, .n = ELF_NDEXCR,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_DEXCR), .n = ELF_NDEXCR,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = dexcr_active, .regset_get = dexcr_get</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_CHECKPOINT_RESTORE</div><div class='ctx'> 	[REGSET_HASHKEYR] = {</div><div class='del'>-		.core_note_type = NT_PPC_HASHKEYR, .n = ELF_NHASHKEYR,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_HASHKEYR), .n = ELF_NHASHKEYR,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = hashkeyr_active, .regset_get = hashkeyr_get, .set = hashkeyr_set</div><div class='ctx'> 	},</div><div class='hunk'>@@ -683,7 +683,7 @@ static const struct user_regset native_regsets[] = {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_MEM_KEYS</div><div class='ctx'> 	[REGSET_PKEY] = {</div><div class='del'>-		.core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_PKEY), .n = ELF_NPKEY,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = pkey_active, .regset_get = pkey_get, .set = pkey_set</div><div class='ctx'> 	},</div><div class='hunk'>@@ -843,92 +843,92 @@ static int gpr32_set(struct task_struct *target,</div><div class='ctx'>  */</div><div class='ctx'> static const struct user_regset compat_regsets[] = {</div><div class='ctx'> 	[REGSET_GPR] = {</div><div class='del'>-		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRSTATUS), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(compat_long_t), .align = sizeof(compat_long_t),</div><div class='ctx'> 		.regset_get = gpr32_get, .set = gpr32_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_FPR] = {</div><div class='del'>-		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PRFPREG), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.regset_get = fpr_get, .set = fpr_set</div><div class='ctx'> 	},</div><div class='ctx'> #ifdef CONFIG_ALTIVEC</div><div class='ctx'> 	[REGSET_VMX] = {</div><div class='del'>-		.core_note_type = NT_PPC_VMX, .n = 34,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_VMX), .n = 34,</div><div class='ctx'> 		.size = sizeof(vector128), .align = sizeof(vector128),</div><div class='ctx'> 		.active = vr_active, .regset_get = vr_get, .set = vr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='ctx'> 	[REGSET_SPE] = {</div><div class='del'>-		.core_note_type = NT_PPC_SPE, .n = 35,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_SPE), .n = 35,</div><div class='ctx'> 		.size = sizeof(u32), .align = sizeof(u32),</div><div class='ctx'> 		.active = evr_active, .regset_get = evr_get, .set = evr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_TRANSACTIONAL_MEM</div><div class='ctx'> 	[REGSET_TM_CGPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CGPR), .n = ELF_NGREG,</div><div class='ctx'> 		.size = sizeof(long), .align = sizeof(long),</div><div class='ctx'> 		.active = tm_cgpr_active,</div><div class='ctx'> 		.regset_get = tm_cgpr32_get, .set = tm_cgpr32_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CFPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CFPR), .n = ELF_NFPREG,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CVMX] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CVMX), .n = ELF_NVMX,</div><div class='ctx'> 		.size = sizeof(vector128), .align = sizeof(vector128),</div><div class='ctx'> 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CVSX] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CVSX), .n = ELF_NVSX,</div><div class='ctx'> 		.size = sizeof(double), .align = sizeof(double),</div><div class='ctx'> 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_SPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_SPR), .n = ELF_NTMSPRREG,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CTAR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CTAR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CTAR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CPPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CPPR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CPPR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_TM_CDSCR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TM_CDSCR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	[REGSET_PPR] = {</div><div class='del'>-		.core_note_type = NT_PPC_PPR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_PPR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = ppr_get, .set = ppr_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_DSCR] = {</div><div class='del'>-		.core_note_type = NT_PPC_DSCR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_DSCR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = dscr_get, .set = dscr_set</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	[REGSET_TAR] = {</div><div class='del'>-		.core_note_type = NT_PPC_TAR, .n = 1,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_TAR), .n = 1,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.regset_get = tar_get, .set = tar_set</div><div class='ctx'> 	},</div><div class='ctx'> 	[REGSET_EBB] = {</div><div class='del'>-		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,</div><div class='add'>+		USER_REGSET_NOTE_TYPE(PPC_EBB), .n = ELF_NEBB,</div><div class='ctx'> 		.size = sizeof(u64), .align = sizeof(u64),</div><div class='ctx'> 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/powerpc/kernel/ptrace/ptrace.c b/arch/powerpc/kernel/ptrace/ptrace.c<br/>index 727ed4a14545..c6997df63287 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/ptrace/ptrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/ptrace/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/ptrace/ptrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/ptrace/ptrace.c</a></div><div class='hunk'>@@ -215,7 +215,7 @@ static int do_seccomp(struct pt_regs *regs)</div><div class='ctx'> 	 * have already loaded -ENOSYS into r3, or seccomp has put</div><div class='ctx'> 	 * something else in r3 (via SECCOMP_RET_ERRNO/TRACE).</div><div class='ctx'> 	 */</div><div class='del'>-	if (__secure_computing(NULL))</div><div class='add'>+	if (__secure_computing())</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c<br/>index f7e86e09c49f..8d81c1e7a8db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtas.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtas.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtas.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/rtas.c</a></div><div class='hunk'>@@ -92,12 +92,14 @@ struct rtas_function {</div><div class='ctx'>  * Per-function locks for sequence-based RTAS functions.</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_MUTEX(rtas_ibm_activate_firmware_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_get_indices_lock);</div><div class='ctx'> static DEFINE_MUTEX(rtas_ibm_lpar_perftools_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_physical_attestation_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_physical_attestation_lock);</div><div class='ctx'> DEFINE_MUTEX(rtas_ibm_get_vpd_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_get_indices_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_receive_hvpipe_msg_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_send_hvpipe_msg_lock);</div><div class='ctx'> </div><div class='ctx'> static struct rtas_function rtas_function_table[] __ro_after_init = {</div><div class='ctx'> 	[RTAS_FNIDX__CHECK_EXCEPTION] = {</div><div class='hunk'>@@ -373,6 +375,17 @@ static struct rtas_function rtas_function_table[] __ro_after_init = {</div><div class='ctx'> 	[RTAS_FNIDX__IBM_READ_SLOT_RESET_STATE2] = {</div><div class='ctx'> 		.name = "ibm,read-slot-reset-state2",</div><div class='ctx'> 	},</div><div class='add'>+	[RTAS_FNIDX__IBM_RECEIVE_HVPIPE_MSG] {</div><div class='add'>+		.name = "ibm,receive-hvpipe-msg",</div><div class='add'>+		.filter = &amp;(const struct rtas_filter) {</div><div class='add'>+			.buf_idx1 = 0, .size_idx1 = 1,</div><div class='add'>+			.buf_idx2 = -1, .size_idx2 = -1,</div><div class='add'>+		},</div><div class='add'>+		/*</div><div class='add'>+		 * PAPR+ v2.13 R1–7.3.32.1</div><div class='add'>+		 */</div><div class='add'>+		.lock = &amp;rtas_ibm_receive_hvpipe_msg_lock,</div><div class='add'>+	},</div><div class='ctx'> 	[RTAS_FNIDX__IBM_REMOVE_PE_DMA_WINDOW] = {</div><div class='ctx'> 		.name = "ibm,remove-pe-dma-window",</div><div class='ctx'> 	},</div><div class='hunk'>@@ -391,6 +404,17 @@ static struct rtas_function rtas_function_table[] __ro_after_init = {</div><div class='ctx'> 			.buf_idx2 = -1, .size_idx2 = -1,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	[RTAS_FNIDX__IBM_SEND_HVPIPE_MSG] {</div><div class='add'>+		.name = "ibm,send-hvpipe-msg",</div><div class='add'>+		.filter = &amp;(const struct rtas_filter) {</div><div class='add'>+			.buf_idx1 = 1, .size_idx1 = -1,</div><div class='add'>+			.buf_idx2 = -1, .size_idx2 = -1,</div><div class='add'>+		},</div><div class='add'>+		/*</div><div class='add'>+		 * PAPR+ v2.13 R1–7.3.32.2</div><div class='add'>+		 */</div><div class='add'>+		.lock = &amp;rtas_ibm_send_hvpipe_msg_lock,</div><div class='add'>+	},</div><div class='ctx'> 	[RTAS_FNIDX__IBM_SET_DYNAMIC_INDICATOR] = {</div><div class='ctx'> 		.name = "ibm,set-dynamic-indicator",</div><div class='ctx'> 		.filter = &amp;(const struct rtas_filter) {</div><div class='hunk'>@@ -798,66 +822,6 @@ void __init udbg_init_rtas_panel(void)</div><div class='ctx'> 	udbg_putc = call_rtas_display_status_delay;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_UDBG_RTAS_CONSOLE</div><div class='del'>-</div><div class='del'>-/* If you think you're dying before early_init_dt_scan_rtas() does its</div><div class='del'>- * work, you can hard code the token values for your firmware here and</div><div class='del'>- * hardcode rtas.base/entry etc.</div><div class='del'>- */</div><div class='del'>-static unsigned int rtas_putchar_token = RTAS_UNKNOWN_SERVICE;</div><div class='del'>-static unsigned int rtas_getchar_token = RTAS_UNKNOWN_SERVICE;</div><div class='del'>-</div><div class='del'>-static void udbg_rtascon_putc(char c)</div><div class='del'>-{</div><div class='del'>-	int tries;</div><div class='del'>-</div><div class='del'>-	if (!rtas.base)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Add CRs before LFs */</div><div class='del'>-	if (c == '\n')</div><div class='del'>-		udbg_rtascon_putc('\r');</div><div class='del'>-</div><div class='del'>-	/* if there is more than one character to be displayed, wait a bit */</div><div class='del'>-	for (tries = 0; tries &lt; 16; tries++) {</div><div class='del'>-		if (rtas_call(rtas_putchar_token, 1, 1, NULL, c) == 0)</div><div class='del'>-			break;</div><div class='del'>-		udelay(1000);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int udbg_rtascon_getc_poll(void)</div><div class='del'>-{</div><div class='del'>-	int c;</div><div class='del'>-</div><div class='del'>-	if (!rtas.base)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (rtas_call(rtas_getchar_token, 0, 2, &amp;c))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	return c;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int udbg_rtascon_getc(void)</div><div class='del'>-{</div><div class='del'>-	int c;</div><div class='del'>-</div><div class='del'>-	while ((c = udbg_rtascon_getc_poll()) == -1)</div><div class='del'>-		;</div><div class='del'>-</div><div class='del'>-	return c;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void __init udbg_init_rtas_console(void)</div><div class='del'>-{</div><div class='del'>-	udbg_putc = udbg_rtascon_putc;</div><div class='del'>-	udbg_getc = udbg_rtascon_getc;</div><div class='del'>-	udbg_getc_poll = udbg_rtascon_getc_poll;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_UDBG_RTAS_CONSOLE */</div><div class='del'>-</div><div class='ctx'> void rtas_progress(char *s, unsigned short hex)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *root;</div><div class='hunk'>@@ -1390,21 +1354,14 @@ bool __ref rtas_busy_delay(int status)</div><div class='ctx'> 		 */</div><div class='ctx'> 		ms = clamp(ms, 1U, 1000U);</div><div class='ctx'> 		/*</div><div class='del'>-		 * The delay hint is an order-of-magnitude suggestion, not</div><div class='del'>-		 * a minimum. It is fine, possibly even advantageous, for</div><div class='del'>-		 * us to pause for less time than hinted. For small values,</div><div class='del'>-		 * use usleep_range() to ensure we don't sleep much longer</div><div class='del'>-		 * than actually needed.</div><div class='del'>-		 *</div><div class='del'>-		 * See Documentation/timers/timers-howto.rst for</div><div class='del'>-		 * explanation of the threshold used here. In effect we use</div><div class='del'>-		 * usleep_range() for 9900 and 9901, msleep() for</div><div class='del'>-		 * 9902-9905.</div><div class='add'>+		 * The delay hint is an order-of-magnitude suggestion, not a</div><div class='add'>+		 * minimum. It is fine, possibly even advantageous, for us to</div><div class='add'>+		 * pause for less time than hinted. To make sure pause time will</div><div class='add'>+		 * not be way longer than requested independent of HZ</div><div class='add'>+		 * configuration, use fsleep(). See fsleep() for details of</div><div class='add'>+		 * used sleeping functions.</div><div class='ctx'> 		 */</div><div class='del'>-		if (ms &lt;= 20)</div><div class='del'>-			usleep_range(ms * 100, ms * 1000);</div><div class='del'>-		else</div><div class='del'>-			msleep(ms);</div><div class='add'>+		fsleep(ms * 1000);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTAS_BUSY:</div><div class='ctx'> 		ret = true;</div><div class='hunk'>@@ -2142,21 +2099,6 @@ int __init early_init_dt_scan_rtas(unsigned long node,</div><div class='ctx'> 		rtas.size = *sizep;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_UDBG_RTAS_CONSOLE</div><div class='del'>-	basep = of_get_flat_dt_prop(node, "put-term-char", NULL);</div><div class='del'>-	if (basep)</div><div class='del'>-		rtas_putchar_token = *basep;</div><div class='del'>-</div><div class='del'>-	basep = of_get_flat_dt_prop(node, "get-term-char", NULL);</div><div class='del'>-	if (basep)</div><div class='del'>-		rtas_getchar_token = *basep;</div><div class='del'>-</div><div class='del'>-	if (rtas_putchar_token != RTAS_UNKNOWN_SERVICE &amp;&amp;</div><div class='del'>-	    rtas_getchar_token != RTAS_UNKNOWN_SERVICE)</div><div class='del'>-		udbg_init_rtas_console();</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/* break now */</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c<br/>index 5407024881e5..583dc16e9d3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtas_flash.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtas_flash.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtas_flash.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/rtas_flash.c</a></div><div class='hunk'>@@ -312,13 +312,13 @@ static ssize_t rtas_flash_write(struct file *file, const char __user *buffer,</div><div class='ctx'> {</div><div class='ctx'> 	struct rtas_update_flash_t *const uf = &amp;rtas_update_flash_data;</div><div class='ctx'> 	char *p;</div><div class='del'>-	int next_free, rc;</div><div class='add'>+	int next_free;</div><div class='ctx'> 	struct flash_block_list *fl;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;rtas_update_flash_mutex);</div><div class='add'>+	guard(mutex)(&amp;rtas_update_flash_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (uf-&gt;status == FLASH_AUTH || count == 0)</div><div class='del'>-		goto out;	/* discard data */</div><div class='add'>+		return count;	/* discard data */</div><div class='ctx'> </div><div class='ctx'> 	/* In the case that the image is not ready for flashing, the memory</div><div class='ctx'> 	 * allocated for the block list will be freed upon the release of the </div><div class='hunk'>@@ -327,7 +327,7 @@ static ssize_t rtas_flash_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 	if (uf-&gt;flist == NULL) {</div><div class='ctx'> 		uf-&gt;flist = kmem_cache_zalloc(flash_block_cache, GFP_KERNEL);</div><div class='ctx'> 		if (!uf-&gt;flist)</div><div class='del'>-			goto nomem;</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	fl = uf-&gt;flist;</div><div class='hunk'>@@ -338,7 +338,7 @@ static ssize_t rtas_flash_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 		/* Need to allocate another block_list */</div><div class='ctx'> 		fl-&gt;next = kmem_cache_zalloc(flash_block_cache, GFP_KERNEL);</div><div class='ctx'> 		if (!fl-&gt;next)</div><div class='del'>-			goto nomem;</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 		fl = fl-&gt;next;</div><div class='ctx'> 		next_free = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -347,25 +347,17 @@ static ssize_t rtas_flash_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 		count = RTAS_BLK_SIZE;</div><div class='ctx'> 	p = kmem_cache_zalloc(flash_block_cache, GFP_KERNEL);</div><div class='ctx'> 	if (!p)</div><div class='del'>-		goto nomem;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	</div><div class='ctx'> 	if(copy_from_user(p, buffer, count)) {</div><div class='ctx'> 		kmem_cache_free(flash_block_cache, p);</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		goto error;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> 	fl-&gt;blocks[next_free].data = p;</div><div class='ctx'> 	fl-&gt;blocks[next_free].length = count;</div><div class='ctx'> 	fl-&gt;num_blocks++;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;rtas_update_flash_mutex);</div><div class='del'>-	return count;</div><div class='ctx'> </div><div class='del'>-nomem:</div><div class='del'>-	rc = -ENOMEM;</div><div class='del'>-error:</div><div class='del'>-	mutex_unlock(&amp;rtas_update_flash_mutex);</div><div class='del'>-	return rc;</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -405,19 +397,18 @@ static ssize_t manage_flash_write(struct file *file, const char __user *buf,</div><div class='ctx'> 	static const char reject_str[] = "0";</div><div class='ctx'> 	static const char commit_str[] = "1";</div><div class='ctx'> 	char stkbuf[10];</div><div class='del'>-	int op, rc;</div><div class='add'>+	int op;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;rtas_manage_flash_mutex);</div><div class='add'>+	guard(mutex)(&amp;rtas_manage_flash_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if ((args_buf-&gt;status == MANAGE_AUTH) || (count == 0))</div><div class='del'>-		goto out;</div><div class='add'>+		return count;</div><div class='ctx'> 		</div><div class='ctx'> 	op = -1;</div><div class='ctx'> 	if (buf) {</div><div class='ctx'> 		if (count &gt; 9) count = 9;</div><div class='del'>-		rc = -EFAULT;</div><div class='ctx'> 		if (copy_from_user (stkbuf, buf, count))</div><div class='del'>-			goto error;</div><div class='add'>+			return -EFAULT;</div><div class='ctx'> 		if (strncmp(stkbuf, reject_str, strlen(reject_str)) == 0) </div><div class='ctx'> 			op = RTAS_REJECT_TMP_IMG;</div><div class='ctx'> 		else if (strncmp(stkbuf, commit_str, strlen(commit_str)) == 0) </div><div class='hunk'>@@ -425,18 +416,11 @@ static ssize_t manage_flash_write(struct file *file, const char __user *buf,</div><div class='ctx'> 	}</div><div class='ctx'> 	</div><div class='ctx'> 	if (op == -1) {   /* buf is empty, or contains invalid string */</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-		goto error;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	manage_flash(args_buf, op);</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;rtas_manage_flash_mutex);</div><div class='ctx'> 	return count;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	mutex_unlock(&amp;rtas_manage_flash_mutex);</div><div class='del'>-	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -499,16 +483,14 @@ static ssize_t validate_flash_write(struct file *file, const char __user *buf,</div><div class='ctx'> {</div><div class='ctx'> 	struct rtas_validate_flash_t *const args_buf =</div><div class='ctx'> 		&amp;rtas_validate_flash_data;</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;rtas_validate_flash_mutex);</div><div class='add'>+	guard(mutex)(&amp;rtas_validate_flash_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* We are only interested in the first 4K of the</div><div class='ctx'> 	 * candidate image */</div><div class='ctx'> 	if ((*off &gt;= VALIDATE_BUF_SIZE) || </div><div class='ctx'> 		(args_buf-&gt;status == VALIDATE_AUTH)) {</div><div class='ctx'> 		*off += count;</div><div class='del'>-		mutex_unlock(&amp;rtas_validate_flash_mutex);</div><div class='ctx'> 		return count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -519,20 +501,14 @@ static ssize_t validate_flash_write(struct file *file, const char __user *buf,</div><div class='ctx'> 		args_buf-&gt;status = VALIDATE_INCOMPLETE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!access_ok(buf, count)) {</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-	if (copy_from_user(args_buf-&gt;buf + *off, buf, count)) {</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='add'>+	if (!access_ok(buf, count))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(args_buf-&gt;buf + *off, buf, count))</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	*off += count;</div><div class='del'>-	rc = count;</div><div class='del'>-done:</div><div class='del'>-	mutex_unlock(&amp;rtas_validate_flash_mutex);</div><div class='del'>-	return rc;</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int validate_flash_release(struct inode *inode, struct file *file)</div><div class='head'>diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c<br/>index 9bba469239fc..6336ec9aedd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtasd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/rtasd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/rtasd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/rtasd.c</a></div><div class='hunk'>@@ -89,6 +89,8 @@ static char *rtas_event_type(int type)</div><div class='ctx'> 			return "Platform Resource Reassignment Event";</div><div class='ctx'> 		case RTAS_TYPE_HOTPLUG:</div><div class='ctx'> 			return "Hotplug Event";</div><div class='add'>+		case RTAS_TYPE_HVPIPE:</div><div class='add'>+			return "Hypervisor Pipe Notification event";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rtas_type[0];</div><div class='head'>diff --git a/arch/powerpc/kernel/secure_boot.c b/arch/powerpc/kernel/secure_boot.c<br/>index 9e0efb657f39..3a28795b4ed8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/secure_boot.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/secure_boot.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/secure_boot.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/secure_boot.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;asm/secure_boot.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct device_node *get_ppc_fw_sb_node(void)</div><div class='hunk'>@@ -38,7 +39,7 @@ bool is_ppc_secureboot_enabled(void)</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pr_info("Secure boot mode %s\n", enabled ? "enabled" : "disabled");</div><div class='add'>+	pr_info("Secure boot mode %s\n", str_enabled_disabled(enabled));</div><div class='ctx'> </div><div class='ctx'> 	return enabled;</div><div class='ctx'> }</div><div class='hunk'>@@ -62,7 +63,7 @@ bool is_ppc_trustedboot_enabled(void)</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pr_info("Trusted boot mode %s\n", enabled ? "enabled" : "disabled");</div><div class='add'>+	pr_info("Trusted boot mode %s\n", str_enabled_disabled(enabled));</div><div class='ctx'> </div><div class='ctx'> 	return enabled;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c<br/>index 4856e1a5161c..fbb7ebd8aa08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/security.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/security.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/security.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/security.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm-prototypes.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/security_features.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kernel/secvar-sysfs.c b/arch/powerpc/kernel/secvar-sysfs.c<br/>index fbeb1cbac01b..ec900bce0257 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/secvar-sysfs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/secvar-sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/secvar-sysfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/secvar-sysfs.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ static ssize_t size_show(struct kobject *kobj, struct kobj_attribute *attr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t data_read(struct file *filep, struct kobject *kobj,</div><div class='del'>-			 struct bin_attribute *attr, char *buf, loff_t off,</div><div class='add'>+			 const struct bin_attribute *attr, char *buf, loff_t off,</div><div class='ctx'> 			 size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	char *data;</div><div class='hunk'>@@ -85,7 +85,7 @@ data_fail:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t update_write(struct file *filep, struct kobject *kobj,</div><div class='del'>-			    struct bin_attribute *attr, char *buf, loff_t off,</div><div class='add'>+			    const struct bin_attribute *attr, char *buf, loff_t off,</div><div class='ctx'> 			    size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -104,11 +104,11 @@ static struct kobj_attribute format_attr = __ATTR_RO(format);</div><div class='ctx'> </div><div class='ctx'> static struct kobj_attribute size_attr = __ATTR_RO(size);</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute data_attr = __BIN_ATTR_RO(data, 0);</div><div class='add'>+static struct bin_attribute data_attr __ro_after_init = __BIN_ATTR_RO(data, 0);</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute update_attr = __BIN_ATTR_WO(update, 0);</div><div class='add'>+static struct bin_attribute update_attr __ro_after_init = __BIN_ATTR_WO(update, 0);</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute *secvar_bin_attrs[] = {</div><div class='add'>+static const struct bin_attribute *const secvar_bin_attrs[] = {</div><div class='ctx'> 	&amp;data_attr,</div><div class='ctx'> 	&amp;update_attr,</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -130,7 +130,7 @@ static const struct kobj_type secvar_ktype = {</div><div class='ctx'> 	.default_groups = secvar_attr_groups,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int update_kobj_size(void)</div><div class='add'>+static __init int update_kobj_size(void)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	u64 varsize;</div><div class='hunk'>@@ -145,7 +145,7 @@ static int update_kobj_size(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int secvar_sysfs_config(struct kobject *kobj)</div><div class='add'>+static __init int secvar_sysfs_config(struct kobject *kobj)</div><div class='ctx'> {</div><div class='ctx'> 	struct attribute_group config_group = {</div><div class='ctx'> 		.name = "config",</div><div class='hunk'>@@ -158,7 +158,7 @@ static int secvar_sysfs_config(struct kobject *kobj)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int add_var(const char *name)</div><div class='add'>+static __init int add_var(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct kobject *kobj;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -181,7 +181,7 @@ static int add_var(const char *name)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int secvar_sysfs_load(void)</div><div class='add'>+static __init int secvar_sysfs_load(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 namesize = 0;</div><div class='ctx'> 	char *name;</div><div class='hunk'>@@ -209,7 +209,7 @@ static int secvar_sysfs_load(void)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int secvar_sysfs_load_static(void)</div><div class='add'>+static __init int secvar_sysfs_load_static(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char * const *name_ptr = secvar_ops-&gt;var_names;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -224,7 +224,7 @@ static int secvar_sysfs_load_static(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int secvar_sysfs_init(void)</div><div class='add'>+static __init int secvar_sysfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 max_size;</div><div class='ctx'> 	int rc;</div><div class='head'>diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c<br/>index 943430077375..68d47c53876c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup-common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/setup-common.c</a></div><div class='hunk'>@@ -67,6 +67,7 @@</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> #include &lt;asm/kasan.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "setup.h"</div><div class='ctx'> </div><div class='hunk'>@@ -457,11 +458,8 @@ void __init smp_setup_cpu_maps(void)</div><div class='ctx'> </div><div class='ctx'> 	DBG("smp_setup_cpu_maps()\n");</div><div class='ctx'> </div><div class='del'>-	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),</div><div class='add'>+	cpu_to_phys_id = memblock_alloc_or_panic(nr_cpu_ids * sizeof(u32),</div><div class='ctx'> 					__alignof__(u32));</div><div class='del'>-	if (!cpu_to_phys_id)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",</div><div class='del'>-		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));</div><div class='ctx'> </div><div class='ctx'> 	for_each_node_by_type(dn, "cpu") {</div><div class='ctx'> 		const __be32 *intserv;</div><div class='hunk'>@@ -560,7 +558,9 @@ void __init smp_setup_cpu_maps(void)</div><div class='ctx'> 	out:</div><div class='ctx'> 		of_node_put(dn);</div><div class='ctx'> 	}</div><div class='del'>-	vdso_data-&gt;processorCount = num_present_cpus();</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='add'>+	systemcfg-&gt;processorCount = num_present_cpus();</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='ctx'>         /* Initialize CPU &lt;=&gt; thread mapping/</div><div class='hunk'>@@ -831,8 +831,8 @@ static int __init check_cache_coherency(void)</div><div class='ctx'> 	if (devtree_coherency != KERNEL_COHERENCY) {</div><div class='ctx'> 		printk(KERN_ERR</div><div class='ctx'> 			"kernel coherency:%s != device tree_coherency:%s\n",</div><div class='del'>-			KERNEL_COHERENCY ? "on" : "off",</div><div class='del'>-			devtree_coherency ? "on" : "off");</div><div class='add'>+			str_on_off(KERNEL_COHERENCY),</div><div class='add'>+			str_on_off(devtree_coherency));</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -957,8 +957,6 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	/* Parse memory topology */</div><div class='ctx'> 	mem_topology_setup();</div><div class='del'>-	/* Set max_mapnr before paging_init() */</div><div class='del'>-	set_max_mapnr(max_pfn);</div><div class='ctx'> 	high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -997,9 +995,11 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	initmem_init();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must</div><div class='del'>-	 * be called after initmem_init(), so that pageblock_order is initialised.</div><div class='add'>+	 * Reserve large chunks of memory for use by CMA for fadump, KVM and</div><div class='add'>+	 * hugetlb. These must be called after initmem_init(), so that</div><div class='add'>+	 * pageblock_order is initialised.</div><div class='ctx'> 	 */</div><div class='add'>+	fadump_cma_init();</div><div class='ctx'> 	kvm_cma_reserve();</div><div class='ctx'> 	gigantic_hugetlb_cma_reserve();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c<br/>index e515c1f7d8d3..5a1bf501fbe1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/setup_32.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/serial.h&gt;</div><div class='ctx'> #include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> #include &lt;asm/asm-prototypes.h&gt;</div><div class='ctx'> #include &lt;asm/kdump.h&gt;</div><div class='hunk'>@@ -140,13 +140,7 @@ arch_initcall(ppc_init);</div><div class='ctx'> </div><div class='ctx'> static void *__init alloc_stack(void)</div><div class='ctx'> {</div><div class='del'>-	void *ptr = memblock_alloc(THREAD_SIZE, THREAD_ALIGN);</div><div class='del'>-</div><div class='del'>-	if (!ptr)</div><div class='del'>-		panic("cannot allocate %d bytes for stack at %pS\n",</div><div class='del'>-		      THREAD_SIZE, (void *)_RET_IP_);</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='add'>+	return memblock_alloc_or_panic(THREAD_SIZE, THREAD_ALIGN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init irqstack_early_init(void)</div><div class='head'>diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c<br/>index 22f83fbbc762..8fd7cbf3bd04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/setup_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/setup_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/setup_64.c</a></div><div class='hunk'>@@ -60,7 +60,7 @@</div><div class='ctx'> #include &lt;asm/xmon.h&gt;</div><div class='ctx'> #include &lt;asm/udbg.h&gt;</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='hunk'>@@ -141,10 +141,7 @@ void __init check_smt_enabled(void)</div><div class='ctx'> 			smt_enabled_at_boot = 0;</div><div class='ctx'> 		else {</div><div class='ctx'> 			int smt;</div><div class='del'>-			int rc;</div><div class='del'>-</div><div class='del'>-			rc = kstrtoint(smt_enabled_cmdline, 10, &amp;smt);</div><div class='del'>-			if (!rc)</div><div class='add'>+			if (!kstrtoint(smt_enabled_cmdline, 10, &amp;smt))</div><div class='ctx'> 				smt_enabled_at_boot =</div><div class='ctx'> 					min(threads_per_core, smt);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -892,7 +889,7 @@ unsigned long memory_block_size_bytes(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)</div><div class='add'>+#ifdef CONFIG_PPC_INDIRECT_PIO</div><div class='ctx'> struct ppc_pci_io ppc_pci_io;</div><div class='ctx'> EXPORT_SYMBOL(ppc_pci_io);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -920,6 +917,7 @@ static int __init disable_hardlockup_detector(void)</div><div class='ctx'> 	hardlockup_detector_disable();</div><div class='ctx'> #else</div><div class='ctx'> 	if (firmware_has_feature(FW_FEATURE_LPAR)) {</div><div class='add'>+		check_kvm_guest();</div><div class='ctx'> 		if (is_kvm_guest())</div><div class='ctx'> 			hardlockup_detector_disable();</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c<br/>index 4ab9b8cee77a..68edb66c2964 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/smp.c</a></div><div class='hunk'>@@ -61,6 +61,7 @@</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/kup.h&gt;</div><div class='ctx'> #include &lt;asm/fadump.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;trace/events/ipi.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1027,19 +1028,19 @@ static int powerpc_shared_proc_flags(void)</div><div class='ctx'>  * We can't just pass cpu_l2_cache_mask() directly because</div><div class='ctx'>  * returns a non-const pointer and the compiler barfs on that.</div><div class='ctx'>  */</div><div class='del'>-static const struct cpumask *shared_cache_mask(int cpu)</div><div class='add'>+static const struct cpumask *tl_cache_mask(struct sched_domain_topology_level *tl, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return per_cpu(cpu_l2_cache_map, cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SCHED_SMT</div><div class='del'>-static const struct cpumask *smallcore_smt_mask(int cpu)</div><div class='add'>+static const struct cpumask *tl_smallcore_smt_mask(struct sched_domain_topology_level *tl, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return cpu_smallcore_mask(cpu);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static struct cpumask *cpu_coregroup_mask(int cpu)</div><div class='add'>+struct cpumask *cpu_coregroup_mask(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	return per_cpu(cpu_coregroup_map, cpu);</div><div class='ctx'> }</div><div class='hunk'>@@ -1053,11 +1054,6 @@ static bool has_coregroup_support(void)</div><div class='ctx'> 	return coregroup_enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct cpumask *cpu_mc_mask(int cpu)</div><div class='del'>-{</div><div class='del'>-	return cpu_coregroup_mask(cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init init_big_cores(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='hunk'>@@ -1186,8 +1182,8 @@ int generic_cpu_disable(void)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='del'>-#ifdef CONFIG_PPC64</div><div class='del'>-	vdso_data-&gt;processorCount--;</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='add'>+	systemcfg-&gt;processorCount--;</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Update affinity of all IRQs previously aimed at this CPU */</div><div class='ctx'> 	irq_migrate_all_off_this_cpu();</div><div class='hunk'>@@ -1447,7 +1443,7 @@ static bool update_mask_by_l2(int cpu, cpumask_var_t *mask)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cpumask_and(*mask, cpu_online_mask, cpu_cpu_mask(cpu));</div><div class='add'>+	cpumask_and(*mask, cpu_online_mask, cpu_node_mask(cpu));</div><div class='ctx'> </div><div class='ctx'> 	/* Update l2-cache mask with all the CPUs that are part of submask */</div><div class='ctx'> 	or_cpumasks_related(cpu, cpu, submask_fn, cpu_l2_cache_mask);</div><div class='hunk'>@@ -1537,7 +1533,7 @@ static void update_coregroup_mask(int cpu, cpumask_var_t *mask)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cpumask_and(*mask, cpu_online_mask, cpu_cpu_mask(cpu));</div><div class='add'>+	cpumask_and(*mask, cpu_online_mask, cpu_node_mask(cpu));</div><div class='ctx'> </div><div class='ctx'> 	/* Update coregroup mask with all the CPUs that are part of submask */</div><div class='ctx'> 	or_cpumasks_related(cpu, cpu, submask_fn, cpu_coregroup_mask);</div><div class='hunk'>@@ -1600,7 +1596,7 @@ static void add_cpu_to_masks(int cpu)</div><div class='ctx'> </div><div class='ctx'> 	/* If chip_id is -1; limit the cpu_core_mask to within PKG */</div><div class='ctx'> 	if (chip_id == -1)</div><div class='del'>-		cpumask_and(mask, mask, cpu_cpu_mask(cpu));</div><div class='add'>+		cpumask_and(mask, mask, cpu_node_mask(cpu));</div><div class='ctx'> </div><div class='ctx'> 	for_each_cpu(i, mask) {</div><div class='ctx'> 		if (chip_id == cpu_to_chip_id(i)) {</div><div class='hunk'>@@ -1642,10 +1638,12 @@ void start_secondary(void *unused)</div><div class='ctx'> </div><div class='ctx'> 	secondary_cpu_time_init();</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC64</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='ctx'> 	if (system_state == SYSTEM_RUNNING)</div><div class='del'>-		vdso_data-&gt;processorCount++;</div><div class='add'>+		systemcfg-&gt;processorCount++;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='ctx'> 	vdso_getcpu_init();</div><div class='ctx'> #endif</div><div class='ctx'> 	set_numa_node(numa_cpu_lookup_table[cpu]);</div><div class='hunk'>@@ -1697,28 +1695,23 @@ static void __init build_sched_topology(void)</div><div class='ctx'> #ifdef CONFIG_SCHED_SMT</div><div class='ctx'> 	if (has_big_cores) {</div><div class='ctx'> 		pr_info("Big cores detected but using small core scheduling\n");</div><div class='del'>-		powerpc_topology[i++] = (struct sched_domain_topology_level){</div><div class='del'>-			smallcore_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT)</div><div class='del'>-		};</div><div class='add'>+		powerpc_topology[i++] =</div><div class='add'>+			SDTL_INIT(tl_smallcore_smt_mask, powerpc_smt_flags, SMT);</div><div class='ctx'> 	} else {</div><div class='del'>-		powerpc_topology[i++] = (struct sched_domain_topology_level){</div><div class='del'>-			cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT)</div><div class='del'>-		};</div><div class='add'>+		powerpc_topology[i++] = SDTL_INIT(tl_smt_mask, powerpc_smt_flags, SMT);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	if (shared_caches) {</div><div class='del'>-		powerpc_topology[i++] = (struct sched_domain_topology_level){</div><div class='del'>-			shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE)</div><div class='del'>-		};</div><div class='add'>+		powerpc_topology[i++] =</div><div class='add'>+			SDTL_INIT(tl_cache_mask, powerpc_shared_cache_flags, CACHE);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (has_coregroup_support()) {</div><div class='del'>-		powerpc_topology[i++] = (struct sched_domain_topology_level){</div><div class='del'>-			cpu_mc_mask, powerpc_shared_proc_flags, SD_INIT_NAME(MC)</div><div class='del'>-		};</div><div class='add'>+		powerpc_topology[i++] =</div><div class='add'>+			SDTL_INIT(tl_mc_mask, powerpc_shared_proc_flags, MC);</div><div class='ctx'> 	}</div><div class='del'>-	powerpc_topology[i++] = (struct sched_domain_topology_level){</div><div class='del'>-		cpu_cpu_mask, powerpc_shared_proc_flags, SD_INIT_NAME(PKG)</div><div class='del'>-	};</div><div class='add'>+</div><div class='add'>+	powerpc_topology[i++] = SDTL_INIT(tl_pkg_mask, powerpc_shared_proc_flags, PKG);</div><div class='ctx'> </div><div class='ctx'> 	/* There must be one trailing NULL entry left.  */</div><div class='ctx'> 	BUG_ON(i &gt;= ARRAY_SIZE(powerpc_topology) - 1);</div><div class='head'>diff --git a/arch/powerpc/kernel/static_call.c b/arch/powerpc/kernel/static_call.c<br/>index 1502b7e439ca..ec3101f95e53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/static_call.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/static_call.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/static_call.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/static_call.c</a></div><div class='hunk'>@@ -2,32 +2,60 @@</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='ctx'> #include &lt;linux/static_call.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> void arch_static_call_transform(void *site, void *tramp, void *func, bool tail)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	bool is_ret0 = (func == __static_call_return0);</div><div class='del'>-	unsigned long target = (unsigned long)(is_ret0 ? tramp + PPC_SCT_RET0 : func);</div><div class='del'>-	bool is_short = is_offset_in_branch_range((long)target - (long)tramp);</div><div class='del'>-</div><div class='del'>-	if (!tramp)</div><div class='del'>-		return;</div><div class='add'>+	unsigned long _tramp = (unsigned long)tramp;</div><div class='add'>+	unsigned long _func = (unsigned long)func;</div><div class='add'>+	unsigned long _ret0 = _tramp + PPC_SCT_RET0;</div><div class='add'>+	bool is_short = is_offset_in_branch_range((long)func - (long)(site ? : tramp));</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;text_mutex);</div><div class='ctx'> </div><div class='del'>-	if (func &amp;&amp; !is_short) {</div><div class='del'>-		err = patch_ulong(tramp + PPC_SCT_DATA, target);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='add'>+	if (site &amp;&amp; tail) {</div><div class='add'>+		if (!func)</div><div class='add'>+			err = patch_instruction(site, ppc_inst(PPC_RAW_BLR()));</div><div class='add'>+		else if (is_ret0)</div><div class='add'>+			err = patch_branch(site, _ret0, 0);</div><div class='add'>+		else if (is_short)</div><div class='add'>+			err = patch_branch(site, _func, 0);</div><div class='add'>+		else if (tramp)</div><div class='add'>+			err = patch_branch(site, _tramp, 0);</div><div class='add'>+		else</div><div class='add'>+			err = 0;</div><div class='add'>+	} else if (site) {</div><div class='add'>+		if (!func)</div><div class='add'>+			err = patch_instruction(site, ppc_inst(PPC_RAW_NOP()));</div><div class='add'>+		else if (is_ret0)</div><div class='add'>+			err = patch_instruction(site, ppc_inst(PPC_RAW_LI(_R3, 0)));</div><div class='add'>+		else if (is_short)</div><div class='add'>+			err = patch_branch(site, _func, BRANCH_SET_LINK);</div><div class='add'>+		else if (tramp)</div><div class='add'>+			err = patch_branch(site, _tramp, BRANCH_SET_LINK);</div><div class='add'>+		else</div><div class='add'>+			err = 0;</div><div class='add'>+	} else if (tramp) {</div><div class='add'>+		if (func &amp;&amp; !is_short) {</div><div class='add'>+			err = patch_ulong(tramp + PPC_SCT_DATA, _func);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!func)</div><div class='add'>+			err = patch_instruction(tramp, ppc_inst(PPC_RAW_BLR()));</div><div class='add'>+		else if (is_ret0)</div><div class='add'>+			err = patch_branch(tramp, _ret0, 0);</div><div class='add'>+		else if (is_short)</div><div class='add'>+			err = patch_branch(tramp, _func, 0);</div><div class='add'>+		else</div><div class='add'>+			err = patch_instruction(tramp, ppc_inst(PPC_RAW_NOP()));</div><div class='add'>+	} else {</div><div class='add'>+		err = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!func)</div><div class='del'>-		err = patch_instruction(tramp, ppc_inst(PPC_RAW_BLR()));</div><div class='del'>-	else if (is_short)</div><div class='del'>-		err = patch_branch(tramp, target, 0);</div><div class='del'>-	else</div><div class='del'>-		err = patch_instruction(tramp, ppc_inst(PPC_RAW_NOP()));</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;text_mutex);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/switch.S b/arch/powerpc/kernel/switch.S<br/>index 608c0ce7cec6..59e3ee99db0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/switch.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/switch.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/switch.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/switch.S</a></div><div class='hunk'>@@ -39,7 +39,6 @@ flush_branch_caches:</div><div class='ctx'> </div><div class='ctx'> 	// Flush the link stack</div><div class='ctx'> 	.rept 64</div><div class='del'>-	ANNOTATE_INTRA_FUNCTION_CALL</div><div class='ctx'> 	bl	.+4</div><div class='ctx'> 	.endr</div><div class='ctx'> 	b	1f</div><div class='head'>diff --git a/arch/powerpc/kernel/syscalls/syscall.tbl b/arch/powerpc/kernel/syscalls/syscall.tbl<br/>index ebae8415dfbb..b453e80dfc00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/syscalls/syscall.tbl?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/syscalls/syscall.tbl?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -553,3 +553,10 @@</div><div class='ctx'> 460	common	lsm_set_self_attr		sys_lsm_set_self_attr</div><div class='ctx'> 461	common	lsm_list_modules		sys_lsm_list_modules</div><div class='ctx'> 462	common	mseal				sys_mseal</div><div class='add'>+463	common	setxattrat			sys_setxattrat</div><div class='add'>+464	common	getxattrat			sys_getxattrat</div><div class='add'>+465	common	listxattrat			sys_listxattrat</div><div class='add'>+466	common	removexattrat			sys_removexattrat</div><div class='add'>+467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c<br/>index b842c83ab497..6b3dd6decdf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/sysfs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/sysfs.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/sysfs.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;asm/hvcall.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/pmc.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c<br/>index 0ff9f038e800..4bbeb8644d3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/time.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/time.c</a></div><div class='hunk'>@@ -71,11 +71,11 @@</div><div class='ctx'> #include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* powerpc clocksource/clockevent code */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='del'>-#include &lt;linux/timekeeper_internal.h&gt;</div><div class='ctx'> </div><div class='ctx'> static u64 timebase_read(struct clocksource *);</div><div class='ctx'> static struct clocksource clocksource_timebase = {</div><div class='hunk'>@@ -137,7 +137,7 @@ EXPORT_SYMBOL_GPL(rtc_lock);</div><div class='ctx'> </div><div class='ctx'> static u64 tb_to_ns_scale __read_mostly;</div><div class='ctx'> static unsigned tb_to_ns_shift __read_mostly;</div><div class='del'>-static u64 boot_tb __read_mostly;</div><div class='add'>+static u64 boot_tb __ro_after_init;</div><div class='ctx'> </div><div class='ctx'> extern struct timezone sys_tz;</div><div class='ctx'> static long timezone_offset;</div><div class='hunk'>@@ -639,6 +639,12 @@ notrace unsigned long long sched_clock(void)</div><div class='ctx'> 	return mulhdu(get_tb() - boot_tb, tb_to_ns_scale) &lt;&lt; tb_to_ns_shift;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_SPLPAR</div><div class='add'>+u64 get_boot_tb(void)</div><div class='add'>+{</div><div class='add'>+	return boot_tb;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_PSERIES</div><div class='ctx'> </div><div class='hunk'>@@ -901,6 +907,38 @@ void secondary_cpu_time_init(void)</div><div class='ctx'> 	register_decrementer_clockevent(smp_processor_id());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Divide a 128-bit dividend by a 32-bit divisor, leaving a 128 bit</div><div class='add'>+ * result.</div><div class='add'>+ */</div><div class='add'>+static __init void div128_by_32(u64 dividend_high, u64 dividend_low,</div><div class='add'>+				unsigned int divisor, struct div_result *dr)</div><div class='add'>+{</div><div class='add'>+	unsigned long a, b, c, d;</div><div class='add'>+	unsigned long w, x, y, z;</div><div class='add'>+	u64 ra, rb, rc;</div><div class='add'>+</div><div class='add'>+	a = dividend_high &gt;&gt; 32;</div><div class='add'>+	b = dividend_high &amp; 0xffffffff;</div><div class='add'>+	c = dividend_low &gt;&gt; 32;</div><div class='add'>+	d = dividend_low &amp; 0xffffffff;</div><div class='add'>+</div><div class='add'>+	w = a / divisor;</div><div class='add'>+	ra = ((u64)(a - (w * divisor)) &lt;&lt; 32) + b;</div><div class='add'>+</div><div class='add'>+	rb = ((u64)do_div(ra, divisor) &lt;&lt; 32) + c;</div><div class='add'>+	x = ra;</div><div class='add'>+</div><div class='add'>+	rc = ((u64)do_div(rb, divisor) &lt;&lt; 32) + d;</div><div class='add'>+	y = rb;</div><div class='add'>+</div><div class='add'>+	do_div(rc, divisor);</div><div class='add'>+	z = rc;</div><div class='add'>+</div><div class='add'>+	dr-&gt;result_high = ((u64)w &lt;&lt; 32) + x;</div><div class='add'>+	dr-&gt;result_low  = ((u64)y &lt;&lt; 32) + z;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* This function is only called on the boot processor */</div><div class='ctx'> void __init time_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -950,7 +988,10 @@ void __init time_init(void)</div><div class='ctx'> 		sys_tz.tz_dsttime = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vdso_data-&gt;tb_ticks_per_sec = tb_ticks_per_sec;</div><div class='add'>+	vdso_k_arch_data-&gt;tb_ticks_per_sec = tb_ticks_per_sec;</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='add'>+	systemcfg-&gt;tb_ticks_per_sec = tb_ticks_per_sec;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* initialise and enable the large decrementer (if we have one) */</div><div class='ctx'> 	set_decrementer_max();</div><div class='hunk'>@@ -971,39 +1012,6 @@ void __init time_init(void)</div><div class='ctx'> 	enable_sched_clock_irqtime();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Divide a 128-bit dividend by a 32-bit divisor, leaving a 128 bit</div><div class='del'>- * result.</div><div class='del'>- */</div><div class='del'>-void div128_by_32(u64 dividend_high, u64 dividend_low,</div><div class='del'>-		  unsigned divisor, struct div_result *dr)</div><div class='del'>-{</div><div class='del'>-	unsigned long a, b, c, d;</div><div class='del'>-	unsigned long w, x, y, z;</div><div class='del'>-	u64 ra, rb, rc;</div><div class='del'>-</div><div class='del'>-	a = dividend_high &gt;&gt; 32;</div><div class='del'>-	b = dividend_high &amp; 0xffffffff;</div><div class='del'>-	c = dividend_low &gt;&gt; 32;</div><div class='del'>-	d = dividend_low &amp; 0xffffffff;</div><div class='del'>-</div><div class='del'>-	w = a / divisor;</div><div class='del'>-	ra = ((u64)(a - (w * divisor)) &lt;&lt; 32) + b;</div><div class='del'>-</div><div class='del'>-	rb = ((u64) do_div(ra, divisor) &lt;&lt; 32) + c;</div><div class='del'>-	x = ra;</div><div class='del'>-</div><div class='del'>-	rc = ((u64) do_div(rb, divisor) &lt;&lt; 32) + d;</div><div class='del'>-	y = rb;</div><div class='del'>-</div><div class='del'>-	do_div(rc, divisor);</div><div class='del'>-	z = rc;</div><div class='del'>-</div><div class='del'>-	dr-&gt;result_high = ((u64)w &lt;&lt; 32) + x;</div><div class='del'>-	dr-&gt;result_low  = ((u64)y &lt;&lt; 32) + z;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* We don't need to calibrate delay, we use the CPU timebase for that */</div><div class='ctx'> void calibrate_delay(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/kernel/trace/Makefile b/arch/powerpc/kernel/trace/Makefile<br/>index 125f4ca588b9..d6c3885453bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/trace/Makefile</a></div><div class='hunk'>@@ -9,12 +9,15 @@ CFLAGS_REMOVE_ftrace.o = $(CC_FLAGS_FTRACE)</div><div class='ctx'> CFLAGS_REMOVE_ftrace_64_pg.o = $(CC_FLAGS_FTRACE)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-obj32-$(CONFIG_FUNCTION_TRACER)		+= ftrace.o ftrace_entry.o</div><div class='del'>-ifdef CONFIG_MPROFILE_KERNEL</div><div class='del'>-obj64-$(CONFIG_FUNCTION_TRACER)		+= ftrace.o ftrace_entry.o</div><div class='add'>+ifdef CONFIG_FUNCTION_TRACER</div><div class='add'>+obj32-y					+= ftrace.o ftrace_entry.o</div><div class='add'>+ifeq ($(CONFIG_MPROFILE_KERNEL)$(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY),)</div><div class='add'>+obj64-y					+= ftrace_64_pg.o ftrace_64_pg_entry.o</div><div class='ctx'> else</div><div class='del'>-obj64-$(CONFIG_FUNCTION_TRACER)		+= ftrace_64_pg.o ftrace_64_pg_entry.o</div><div class='add'>+obj64-y					+= ftrace.o ftrace_entry.o</div><div class='add'>+endif</div><div class='ctx'> endif</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_TRACING)			+= trace_clock.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC64)			+= $(obj64-y)</div><div class='head'>diff --git a/arch/powerpc/kernel/trace/ftrace.c b/arch/powerpc/kernel/trace/ftrace.c<br/>index d8d6b4fd9a14..841d077e2825 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/trace/ftrace.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='hunk'>@@ -37,8 +37,12 @@ unsigned long ftrace_call_adjust(unsigned long addr)</div><div class='ctx'> 	if (addr &gt;= (unsigned long)__exittext_begin &amp;&amp; addr &lt; (unsigned long)__exittext_end)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY))</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY) &amp;&amp;</div><div class='add'>+	    !IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {</div><div class='ctx'> 		addr += MCOUNT_INSN_SIZE;</div><div class='add'>+		if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))</div><div class='add'>+			addr += MCOUNT_INSN_SIZE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -82,7 +86,7 @@ static inline int ftrace_modify_code(unsigned long ip, ppc_inst_t old, ppc_inst_</div><div class='ctx'> {</div><div class='ctx'> 	int ret = ftrace_validate_inst(ip, old);</div><div class='ctx'> </div><div class='del'>-	if (!ret)</div><div class='add'>+	if (!ret &amp;&amp; !ppc_inst_equal(old, new))</div><div class='ctx'> 		ret = patch_instruction((u32 *)ip, new);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -106,28 +110,66 @@ static unsigned long find_ftrace_tramp(unsigned long ip)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+static unsigned long ftrace_lookup_module_stub(unsigned long ip, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	struct module *mod = NULL;</div><div class='add'>+</div><div class='add'>+	scoped_guard(rcu)</div><div class='add'>+		mod = __module_text_address(ip);</div><div class='add'>+	if (!mod)</div><div class='add'>+		pr_err("No module loaded at addr=%lx\n", ip);</div><div class='add'>+</div><div class='add'>+	return (addr == (unsigned long)ftrace_caller ? mod-&gt;arch.tramp : mod-&gt;arch.tramp_regs);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static unsigned long ftrace_lookup_module_stub(unsigned long ip, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static unsigned long ftrace_get_ool_stub(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	return rec-&gt;arch.ool_stub;</div><div class='add'>+#else</div><div class='add'>+	BUILD_BUG();</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ftrace_get_call_inst(struct dyn_ftrace *rec, unsigned long addr, ppc_inst_t *call_inst)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	unsigned long ip;</div><div class='ctx'> 	unsigned long stub;</div><div class='ctx'> </div><div class='del'>-	if (is_offset_in_branch_range(addr - ip)) {</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		ip = ftrace_get_ool_stub(rec) + MCOUNT_INSN_SIZE; /* second instruction in stub */</div><div class='add'>+	else</div><div class='add'>+		ip = rec-&gt;ip;</div><div class='add'>+</div><div class='add'>+	if (!is_offset_in_branch_range(addr - ip) &amp;&amp; addr != FTRACE_ADDR &amp;&amp;</div><div class='add'>+	    addr != FTRACE_REGS_ADDR) {</div><div class='add'>+		/* This can only happen with ftrace direct */</div><div class='add'>+		if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS)) {</div><div class='add'>+			pr_err("0x%lx (0x%lx): Unexpected target address 0x%lx\n",</div><div class='add'>+			       ip, rec-&gt;ip, addr);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		addr = FTRACE_ADDR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_offset_in_branch_range(addr - ip))</div><div class='ctx'> 		/* Within range */</div><div class='ctx'> 		stub = addr;</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='del'>-	} else if (rec-&gt;arch.mod) {</div><div class='del'>-		/* Module code would be going to one of the module stubs */</div><div class='del'>-		stub = (addr == (unsigned long)ftrace_caller ? rec-&gt;arch.mod-&gt;arch.tramp :</div><div class='del'>-							       rec-&gt;arch.mod-&gt;arch.tramp_regs);</div><div class='del'>-#endif</div><div class='del'>-	} else if (core_kernel_text(ip)) {</div><div class='add'>+	else if (core_kernel_text(ip))</div><div class='ctx'> 		/* We would be branching to one of our ftrace stubs */</div><div class='ctx'> 		stub = find_ftrace_tramp(ip);</div><div class='del'>-		if (!stub) {</div><div class='del'>-			pr_err("0x%lx: No ftrace stubs reachable\n", ip);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='add'>+		stub = ftrace_lookup_module_stub(ip, addr);</div><div class='add'>+</div><div class='add'>+	if (!stub) {</div><div class='add'>+		pr_err("0x%lx (0x%lx): No ftrace stubs reachable\n", ip, rec-&gt;ip);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -135,6 +177,145 @@ static int ftrace_get_call_inst(struct dyn_ftrace *rec, unsigned long addr, ppc_</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ftrace_init_ool_stub(struct module *mod, struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	static int ool_stub_text_index, ool_stub_text_end_index, ool_stub_inittext_index;</div><div class='add'>+	int ret = 0, ool_stub_count, *ool_stub_index;</div><div class='add'>+	ppc_inst_t inst;</div><div class='add'>+	/*</div><div class='add'>+	 * See ftrace_entry.S if changing the below instruction sequence, as we rely on</div><div class='add'>+	 * decoding the last branch instruction here to recover the correct function ip.</div><div class='add'>+	 */</div><div class='add'>+	struct ftrace_ool_stub *ool_stub, ool_stub_template = {</div><div class='add'>+		.insn = {</div><div class='add'>+			PPC_RAW_MFLR(_R0),</div><div class='add'>+			PPC_RAW_NOP(),		/* bl ftrace_caller */</div><div class='add'>+			PPC_RAW_MTLR(_R0),</div><div class='add'>+			PPC_RAW_NOP()		/* b rec-&gt;ip + 4 */</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	WARN_ON(rec-&gt;arch.ool_stub);</div><div class='add'>+</div><div class='add'>+	if (is_kernel_inittext(rec-&gt;ip)) {</div><div class='add'>+		ool_stub = ftrace_ool_stub_inittext;</div><div class='add'>+		ool_stub_index = &amp;ool_stub_inittext_index;</div><div class='add'>+		ool_stub_count = ftrace_ool_stub_inittext_count;</div><div class='add'>+	} else if (is_kernel_text(rec-&gt;ip)) {</div><div class='add'>+		/*</div><div class='add'>+		 * ftrace records are sorted, so we first use up the stub area within .text</div><div class='add'>+		 * (ftrace_ool_stub_text) before using the area at the end of .text</div><div class='add'>+		 * (ftrace_ool_stub_text_end), unless the stub is out of range of the record.</div><div class='add'>+		 */</div><div class='add'>+		if (ool_stub_text_index &gt;= ftrace_ool_stub_text_count ||</div><div class='add'>+		    !is_offset_in_branch_range((long)rec-&gt;ip -</div><div class='add'>+					       (long)&amp;ftrace_ool_stub_text[ool_stub_text_index])) {</div><div class='add'>+			ool_stub = ftrace_ool_stub_text_end;</div><div class='add'>+			ool_stub_index = &amp;ool_stub_text_end_index;</div><div class='add'>+			ool_stub_count = ftrace_ool_stub_text_end_count;</div><div class='add'>+		} else {</div><div class='add'>+			ool_stub = ftrace_ool_stub_text;</div><div class='add'>+			ool_stub_index = &amp;ool_stub_text_index;</div><div class='add'>+			ool_stub_count = ftrace_ool_stub_text_count;</div><div class='add'>+		}</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+	} else if (mod) {</div><div class='add'>+		ool_stub = mod-&gt;arch.ool_stubs;</div><div class='add'>+		ool_stub_index = &amp;mod-&gt;arch.ool_stub_index;</div><div class='add'>+		ool_stub_count = mod-&gt;arch.ool_stub_count;</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ool_stub += (*ool_stub_index)++;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(*ool_stub_index &gt; ool_stub_count))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_offset_in_branch_range((long)rec-&gt;ip - (long)&amp;ool_stub-&gt;insn[0]) ||</div><div class='add'>+	    !is_offset_in_branch_range((long)(rec-&gt;ip + MCOUNT_INSN_SIZE) -</div><div class='add'>+				       (long)&amp;ool_stub-&gt;insn[3])) {</div><div class='add'>+		pr_err("%s: ftrace ool stub out of range (%p -&gt; %p).\n",</div><div class='add'>+					__func__, (void *)rec-&gt;ip, (void *)&amp;ool_stub-&gt;insn[0]);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rec-&gt;arch.ool_stub = (unsigned long)&amp;ool_stub-&gt;insn[0];</div><div class='add'>+</div><div class='add'>+	/* bl ftrace_caller */</div><div class='add'>+	if (!mod)</div><div class='add'>+		ret = ftrace_get_call_inst(rec, (unsigned long)ftrace_caller, &amp;inst);</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+	else</div><div class='add'>+		/*</div><div class='add'>+		 * We can't use ftrace_get_call_inst() since that uses</div><div class='add'>+		 * __module_text_address(rec-&gt;ip) to look up the module.</div><div class='add'>+		 * But, since the module is not fully formed at this stage,</div><div class='add'>+		 * the lookup fails. We know the target though, so generate</div><div class='add'>+		 * the branch inst directly.</div><div class='add'>+		 */</div><div class='add'>+		inst = ftrace_create_branch_inst(ftrace_get_ool_stub(rec) + MCOUNT_INSN_SIZE,</div><div class='add'>+						 mod-&gt;arch.tramp, 1);</div><div class='add'>+#endif</div><div class='add'>+	ool_stub_template.insn[1] = ppc_inst_val(inst);</div><div class='add'>+</div><div class='add'>+	/* b rec-&gt;ip + 4 */</div><div class='add'>+	if (!ret &amp;&amp; create_branch(&amp;inst, &amp;ool_stub-&gt;insn[3], rec-&gt;ip + MCOUNT_INSN_SIZE, 0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ool_stub_template.insn[3] = ppc_inst_val(inst);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = patch_instructions((u32 *)ool_stub, (u32 *)&amp;ool_stub_template,</div><div class='add'>+					 sizeof(ool_stub_template), false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+#else /* !CONFIG_PPC_FTRACE_OUT_OF_LINE */</div><div class='add'>+	BUILD_BUG();</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+static const struct ftrace_ops *powerpc_rec_get_ops(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	const struct ftrace_ops *ops = NULL;</div><div class='add'>+</div><div class='add'>+	if (rec-&gt;flags &amp; FTRACE_FL_CALL_OPS_EN) {</div><div class='add'>+		ops = ftrace_find_unique_ops(rec);</div><div class='add'>+		WARN_ON_ONCE(!ops);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ops)</div><div class='add'>+		ops = &amp;ftrace_list_ops;</div><div class='add'>+</div><div class='add'>+	return ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ftrace_rec_set_ops(struct dyn_ftrace *rec, const struct ftrace_ops *ops)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		return patch_ulong((void *)(ftrace_get_ool_stub(rec) - sizeof(unsigned long)),</div><div class='add'>+				   (unsigned long)ops);</div><div class='add'>+	else</div><div class='add'>+		return patch_ulong((void *)(rec-&gt;ip - MCOUNT_INSN_SIZE - sizeof(unsigned long)),</div><div class='add'>+				   (unsigned long)ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ftrace_rec_set_nop_ops(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	return ftrace_rec_set_ops(rec, &amp;ftrace_nop_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ftrace_rec_update_ops(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	return ftrace_rec_set_ops(rec, powerpc_rec_get_ops(rec));</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int ftrace_rec_set_nop_ops(struct dyn_ftrace *rec) { return 0; }</div><div class='add'>+static int ftrace_rec_update_ops(struct dyn_ftrace *rec) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS</div><div class='ctx'> int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, unsigned long addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -147,18 +328,33 @@ int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, unsigned</div><div class='ctx'> int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	ppc_inst_t old, new;</div><div class='del'>-	int ret;</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* This can only ever be called during module load */</div><div class='del'>-	if (WARN_ON(!IS_ENABLED(CONFIG_MODULES) || core_kernel_text(rec-&gt;ip)))</div><div class='add'>+	if (WARN_ON(!IS_ENABLED(CONFIG_MODULES) || core_kernel_text(ip)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	old = ppc_inst(PPC_RAW_NOP());</div><div class='del'>-	ret = ftrace_get_call_inst(rec, addr, &amp;new);</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {</div><div class='add'>+		ip = ftrace_get_ool_stub(rec) + MCOUNT_INSN_SIZE; /* second instruction in stub */</div><div class='add'>+		ret = ftrace_get_call_inst(rec, (unsigned long)ftrace_caller, &amp;old);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret |= ftrace_get_call_inst(rec, addr, &amp;new);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ftrace_modify_code(ip, old, new);</div><div class='add'>+</div><div class='add'>+	ret = ftrace_rec_update_ops(rec);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return ftrace_modify_code(rec-&gt;ip, old, new);</div><div class='add'>+	if (!ret &amp;&amp; IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		ret = ftrace_modify_code(rec-&gt;ip, ppc_inst(PPC_RAW_NOP()),</div><div class='add'>+			 ppc_inst(PPC_RAW_BRANCH((long)ftrace_get_ool_stub(rec) - (long)rec-&gt;ip)));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr)</div><div class='hunk'>@@ -191,6 +387,13 @@ void ftrace_replace_code(int enable)</div><div class='ctx'> 		new_addr = ftrace_get_addr_new(rec);</div><div class='ctx'> 		update = ftrace_update_record(rec, enable);</div><div class='ctx'> </div><div class='add'>+		if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) &amp;&amp; update != FTRACE_UPDATE_IGNORE) {</div><div class='add'>+			ip = ftrace_get_ool_stub(rec) + MCOUNT_INSN_SIZE;</div><div class='add'>+			ret = ftrace_get_call_inst(rec, (unsigned long)ftrace_caller, &amp;nop_inst);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		switch (update) {</div><div class='ctx'> 		case FTRACE_UPDATE_IGNORE:</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -198,16 +401,19 @@ void ftrace_replace_code(int enable)</div><div class='ctx'> 		case FTRACE_UPDATE_MODIFY_CALL:</div><div class='ctx'> 			ret = ftrace_get_call_inst(rec, new_addr, &amp;new_call_inst);</div><div class='ctx'> 			ret |= ftrace_get_call_inst(rec, addr, &amp;call_inst);</div><div class='add'>+			ret |= ftrace_rec_update_ops(rec);</div><div class='ctx'> 			old = call_inst;</div><div class='ctx'> 			new = new_call_inst;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FTRACE_UPDATE_MAKE_NOP:</div><div class='ctx'> 			ret = ftrace_get_call_inst(rec, addr, &amp;call_inst);</div><div class='add'>+			ret |= ftrace_rec_set_nop_ops(rec);</div><div class='ctx'> 			old = call_inst;</div><div class='ctx'> 			new = nop_inst;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FTRACE_UPDATE_MAKE_CALL:</div><div class='ctx'> 			ret = ftrace_get_call_inst(rec, new_addr, &amp;call_inst);</div><div class='add'>+			ret |= ftrace_rec_update_ops(rec);</div><div class='ctx'> 			old = nop_inst;</div><div class='ctx'> 			new = call_inst;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -215,6 +421,24 @@ void ftrace_replace_code(int enable)</div><div class='ctx'> </div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = ftrace_modify_code(ip, old, new);</div><div class='add'>+</div><div class='add'>+		if (!ret &amp;&amp; IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) &amp;&amp;</div><div class='add'>+		    (update == FTRACE_UPDATE_MAKE_NOP || update == FTRACE_UPDATE_MAKE_CALL)) {</div><div class='add'>+			/* Update the actual ftrace location */</div><div class='add'>+			call_inst = ppc_inst(PPC_RAW_BRANCH((long)ftrace_get_ool_stub(rec) -</div><div class='add'>+							    (long)rec-&gt;ip));</div><div class='add'>+			nop_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+			ip = rec-&gt;ip;</div><div class='add'>+</div><div class='add'>+			if (update == FTRACE_UPDATE_MAKE_NOP)</div><div class='add'>+				ret = ftrace_modify_code(ip, call_inst, nop_inst);</div><div class='add'>+			else</div><div class='add'>+				ret = ftrace_modify_code(ip, nop_inst, call_inst);</div><div class='add'>+</div><div class='add'>+			if (ret)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -234,20 +458,27 @@ int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec)</div><div class='ctx'> 	/* Verify instructions surrounding the ftrace location */</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY)) {</div><div class='ctx'> 		/* Expect nops */</div><div class='del'>-		ret = ftrace_validate_inst(ip - 4, ppc_inst(PPC_RAW_NOP()));</div><div class='add'>+		if (!IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+			ret = ftrace_validate_inst(ip - 4, ppc_inst(PPC_RAW_NOP()));</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = ftrace_validate_inst(ip, ppc_inst(PPC_RAW_NOP()));</div><div class='ctx'> 	} else if (IS_ENABLED(CONFIG_PPC32)) {</div><div class='ctx'> 		/* Expected sequence: 'mflr r0', 'stw r0,4(r1)', 'bl _mcount' */</div><div class='ctx'> 		ret = ftrace_validate_inst(ip - 8, ppc_inst(PPC_RAW_MFLR(_R0)));</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = ftrace_validate_inst(ip - 4, ppc_inst(PPC_RAW_STW(_R0, _R1, 4)));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = ftrace_modify_code(ip - 4, ppc_inst(PPC_RAW_STW(_R0, _R1, 4)),</div><div class='add'>+					 ppc_inst(PPC_RAW_NOP()));</div><div class='ctx'> 	} else if (IS_ENABLED(CONFIG_MPROFILE_KERNEL)) {</div><div class='ctx'> 		/* Expected sequence: 'mflr r0', ['std r0,16(r1)'], 'bl _mcount' */</div><div class='ctx'> 		ret = ftrace_read_inst(ip - 4, &amp;old);</div><div class='ctx'> 		if (!ret &amp;&amp; !ppc_inst_equal(old, ppc_inst(PPC_RAW_MFLR(_R0)))) {</div><div class='add'>+			/* Gcc v5.x emit the additional 'std' instruction, gcc v6.x don't */</div><div class='ctx'> 			ret = ftrace_validate_inst(ip - 8, ppc_inst(PPC_RAW_MFLR(_R0)));</div><div class='del'>-			ret |= ftrace_validate_inst(ip - 4, ppc_inst(PPC_RAW_STD(_R0, _R1, 16)));</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			ret = ftrace_modify_code(ip - 4, ppc_inst(PPC_RAW_STD(_R0, _R1, 16)),</div><div class='add'>+						 ppc_inst(PPC_RAW_NOP()));</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -256,12 +487,10 @@ int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!core_kernel_text(ip)) {</div><div class='del'>-		if (!mod) {</div><div class='del'>-			pr_err("0x%lx: No module provided for non-kernel address\n", ip);</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		}</div><div class='del'>-		rec-&gt;arch.mod = mod;</div><div class='add'>+	/* Set up out-of-line stub */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {</div><div class='add'>+		ret = ftrace_init_ool_stub(mod, rec);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Nop-out the ftrace location */</div><div class='hunk'>@@ -293,6 +522,10 @@ int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ftrace_rec_set_nop_ops(rec);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -302,6 +535,13 @@ int ftrace_update_ftrace_func(ftrace_func_t func)</div><div class='ctx'> 	ppc_inst_t old, new;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * When using CALL_OPS, the function to call is associated with the</div><div class='add'>+	 * call site, and we don't have a global function pointer to update.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	old = ppc_inst_read((u32 *)&amp;ftrace_call);</div><div class='ctx'> 	new = ftrace_create_branch_inst(ip, ppc_function_entry(func), 1);</div><div class='ctx'> 	ret = ftrace_modify_code(ip, old, new);</div><div class='hunk'>@@ -421,8 +661,7 @@ int __init ftrace_dyn_arch_init(void)</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 		       struct ftrace_ops *op, struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	unsigned long sp = fregs-&gt;regs.gpr[1];</div><div class='del'>-	int bit;</div><div class='add'>+	unsigned long sp = arch_ftrace_regs(fregs)-&gt;regs.gpr[1];</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(ftrace_graph_is_dead()))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -430,15 +669,10 @@ void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 	if (unlikely(atomic_read(&amp;current-&gt;tracing_graph_pause)))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	bit = ftrace_test_recursion_trylock(ip, parent_ip);</div><div class='del'>-	if (bit &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (!function_graph_enter(parent_ip, ip, 0, (unsigned long *)sp))</div><div class='add'>+	if (!function_graph_enter_regs(parent_ip, ip, 0, (unsigned long *)sp, fregs))</div><div class='ctx'> 		parent_ip = ppc_function_entry(return_to_handler);</div><div class='ctx'> </div><div class='del'>-	ftrace_test_recursion_unlock(bit);</div><div class='ctx'> out:</div><div class='del'>-	fregs-&gt;regs.link = parent_ip;</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;regs.link = parent_ip;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='head'>diff --git a/arch/powerpc/kernel/trace/ftrace_64_pg.c b/arch/powerpc/kernel/trace/ftrace_64_pg.c<br/>index 12fab1803bcf..5c6e545d1708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace_64_pg.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace_64_pg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace_64_pg.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/trace/ftrace_64_pg.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='hunk'>@@ -116,6 +116,18 @@ static unsigned long find_bl_target(unsigned long ip, ppc_inst_t op)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MODULES</div><div class='add'>+static struct module *ftrace_lookup_module(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	struct module *mod;</div><div class='add'>+</div><div class='add'>+	scoped_guard(rcu)</div><div class='add'>+		mod = __module_text_address(rec-&gt;ip);</div><div class='add'>+	if (!mod)</div><div class='add'>+		pr_err("No module loaded at addr=%lx\n", rec-&gt;ip);</div><div class='add'>+</div><div class='add'>+	return mod;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> __ftrace_make_nop(struct module *mod,</div><div class='ctx'> 		  struct dyn_ftrace *rec, unsigned long addr)</div><div class='hunk'>@@ -124,6 +136,12 @@ __ftrace_make_nop(struct module *mod,</div><div class='ctx'> 	unsigned long ip = rec-&gt;ip;</div><div class='ctx'> 	ppc_inst_t op, pop;</div><div class='ctx'> </div><div class='add'>+	if (!mod) {</div><div class='add'>+		mod = ftrace_lookup_module(rec);</div><div class='add'>+		if (!mod)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* read where this goes */</div><div class='ctx'> 	if (copy_inst_from_kernel_nofault(&amp;op, (void *)ip)) {</div><div class='ctx'> 		pr_err("Fetching opcode failed.\n");</div><div class='hunk'>@@ -366,27 +384,6 @@ int ftrace_make_nop(struct module *mod,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Out of range jumps are called from modules.</div><div class='del'>-	 * We should either already have a pointer to the module</div><div class='del'>-	 * or it has been passed in.</div><div class='del'>-	 */</div><div class='del'>-	if (!rec-&gt;arch.mod) {</div><div class='del'>-		if (!mod) {</div><div class='del'>-			pr_err("No module loaded addr=%lx\n", addr);</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		}</div><div class='del'>-		rec-&gt;arch.mod = mod;</div><div class='del'>-	} else if (mod) {</div><div class='del'>-		if (mod != rec-&gt;arch.mod) {</div><div class='del'>-			pr_err("Record mod %p not equal to passed in mod %p\n",</div><div class='del'>-			       rec-&gt;arch.mod, mod);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		/* nothing to do if mod == rec-&gt;arch.mod */</div><div class='del'>-	} else</div><div class='del'>-		mod = rec-&gt;arch.mod;</div><div class='del'>-</div><div class='ctx'> 	return __ftrace_make_nop(mod, rec, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -411,7 +408,10 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='ctx'> 	ppc_inst_t op[2];</div><div class='ctx'> 	void *ip = (void *)rec-&gt;ip;</div><div class='ctx'> 	unsigned long entry, ptr, tramp;</div><div class='del'>-	struct module *mod = rec-&gt;arch.mod;</div><div class='add'>+	struct module *mod = ftrace_lookup_module(rec);</div><div class='add'>+</div><div class='add'>+	if (!mod)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* read where this goes */</div><div class='ctx'> 	if (copy_inst_from_kernel_nofault(op, ip))</div><div class='hunk'>@@ -533,16 +533,6 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Out of range jumps are called from modules.</div><div class='del'>-	 * Being that we are converting from nop, it had better</div><div class='del'>-	 * already have a module defined.</div><div class='del'>-	 */</div><div class='del'>-	if (!rec-&gt;arch.mod) {</div><div class='del'>-		pr_err("No module loaded\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return __ftrace_make_call(rec, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -555,7 +545,10 @@ __ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,</div><div class='ctx'> 	ppc_inst_t op;</div><div class='ctx'> 	unsigned long ip = rec-&gt;ip;</div><div class='ctx'> 	unsigned long entry, ptr, tramp;</div><div class='del'>-	struct module *mod = rec-&gt;arch.mod;</div><div class='add'>+	struct module *mod = ftrace_lookup_module(rec);</div><div class='add'>+</div><div class='add'>+	if (!mod)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* If we never set up ftrace trampolines, then bail */</div><div class='ctx'> 	if (!mod-&gt;arch.tramp || !mod-&gt;arch.tramp_regs) {</div><div class='hunk'>@@ -668,14 +661,6 @@ int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Out of range jumps are called from modules.</div><div class='del'>-	 */</div><div class='del'>-	if (!rec-&gt;arch.mod) {</div><div class='del'>-		pr_err("No module loaded\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return __ftrace_modify_call(rec, old_addr, addr);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -800,10 +785,10 @@ int ftrace_disable_ftrace_graph_caller(void)</div><div class='ctx'>  * in current thread info. Return the address we want to divert to.</div><div class='ctx'>  */</div><div class='ctx'> static unsigned long</div><div class='del'>-__prepare_ftrace_return(unsigned long parent, unsigned long ip, unsigned long sp)</div><div class='add'>+__prepare_ftrace_return(unsigned long parent, unsigned long ip, unsigned long sp,</div><div class='add'>+			struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long return_hooker;</div><div class='del'>-	int bit;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(ftrace_graph_is_dead()))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -811,16 +796,11 @@ __prepare_ftrace_return(unsigned long parent, unsigned long ip, unsigned long sp</div><div class='ctx'> 	if (unlikely(atomic_read(&amp;current-&gt;tracing_graph_pause)))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	bit = ftrace_test_recursion_trylock(ip, parent);</div><div class='del'>-	if (bit &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	return_hooker = ppc_function_entry(return_to_handler);</div><div class='ctx'> </div><div class='del'>-	if (!function_graph_enter(parent, ip, 0, (unsigned long *)sp))</div><div class='add'>+	if (!function_graph_enter_regs(parent, ip, 0, (unsigned long *)sp, fregs))</div><div class='ctx'> 		parent = return_hooker;</div><div class='ctx'> </div><div class='del'>-	ftrace_test_recursion_unlock(bit);</div><div class='ctx'> out:</div><div class='ctx'> 	return parent;</div><div class='ctx'> }</div><div class='hunk'>@@ -829,13 +809,14 @@ out:</div><div class='ctx'> void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,</div><div class='ctx'> 		       struct ftrace_ops *op, struct ftrace_regs *fregs)</div><div class='ctx'> {</div><div class='del'>-	fregs-&gt;regs.link = __prepare_ftrace_return(parent_ip, ip, fregs-&gt;regs.gpr[1]);</div><div class='add'>+	arch_ftrace_regs(fregs)-&gt;regs.link = __prepare_ftrace_return(parent_ip, ip,</div><div class='add'>+						arch_ftrace_regs(fregs)-&gt;regs.gpr[1], fregs);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip,</div><div class='ctx'> 				    unsigned long sp)</div><div class='ctx'> {</div><div class='del'>-	return __prepare_ftrace_return(parent, ip, sp);</div><div class='add'>+	return __prepare_ftrace_return(parent, ip, sp, NULL);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='head'>diff --git a/arch/powerpc/kernel/trace/ftrace_entry.S b/arch/powerpc/kernel/trace/ftrace_entry.S<br/>index 76dbe9fd2c0f..6599fe3c6234 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace_entry.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/trace/ftrace_entry.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/trace/ftrace_entry.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/trace/ftrace_entry.S</a></div><div class='hunk'>@@ -39,13 +39,37 @@</div><div class='ctx'> 	/* Create our stack frame + pt_regs */</div><div class='ctx'> 	PPC_STLU	r1,-SWITCH_FRAME_SIZE(r1)</div><div class='ctx'> </div><div class='add'>+	.if \allregs == 1</div><div class='add'>+	SAVE_GPRS(11, 12, r1)</div><div class='add'>+	.endif</div><div class='add'>+</div><div class='add'>+	/* Get the _mcount() call site out of LR */</div><div class='add'>+	mflr	r11</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	/* Load the ftrace_op */</div><div class='add'>+	PPC_LL	r12, -(MCOUNT_INSN_SIZE*2 + SZL)(r11)</div><div class='add'>+</div><div class='add'>+	/* Load direct_call from the ftrace_op */</div><div class='add'>+	PPC_LL	r12, FTRACE_OPS_DIRECT_CALL(r12)</div><div class='add'>+	PPC_LCMPI r12, 0</div><div class='add'>+	.if \allregs == 1</div><div class='add'>+	bne	.Lftrace_direct_call_regs</div><div class='add'>+	.else</div><div class='add'>+	bne	.Lftrace_direct_call</div><div class='add'>+	.endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Save the previous LR in pt_regs-&gt;link */</div><div class='add'>+	PPC_STL	r0, _LINK(r1)</div><div class='add'>+	/* Also save it in A's stack frame */</div><div class='add'>+	PPC_STL	r0, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE+LRSAVE(r1)</div><div class='add'>+</div><div class='ctx'> 	/* Save all gprs to pt_regs */</div><div class='ctx'> 	SAVE_GPR(0, r1)</div><div class='ctx'> 	SAVE_GPRS(3, 10, r1)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	/* Save the original return address in A's stack frame */</div><div class='del'>-	std	r0, LRSAVE+SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE(r1)</div><div class='ctx'> 	/* Ok to continue? */</div><div class='ctx'> 	lbz	r3, PACA_FTRACE_ENABLED(r13)</div><div class='ctx'> 	cmpdi	r3, 0</div><div class='hunk'>@@ -54,9 +78,9 @@</div><div class='ctx'> </div><div class='ctx'> 	.if \allregs == 1</div><div class='ctx'> 	SAVE_GPR(2, r1)</div><div class='del'>-	SAVE_GPRS(11, 31, r1)</div><div class='add'>+	SAVE_GPRS(13, 31, r1)</div><div class='ctx'> 	.else</div><div class='del'>-#ifdef CONFIG_LIVEPATCH_64</div><div class='add'>+#if defined(CONFIG_LIVEPATCH_64) || defined(CONFIG_PPC_FTRACE_OUT_OF_LINE)</div><div class='ctx'> 	SAVE_GPR(14, r1)</div><div class='ctx'> #endif</div><div class='ctx'> 	.endif</div><div class='hunk'>@@ -67,80 +91,143 @@</div><div class='ctx'> </div><div class='ctx'> 	.if \allregs == 1</div><div class='ctx'> 	/* Load special regs for save below */</div><div class='add'>+	mfcr	r7</div><div class='ctx'> 	mfmsr   r8</div><div class='ctx'> 	mfctr   r9</div><div class='ctx'> 	mfxer   r10</div><div class='del'>-	mfcr	r11</div><div class='ctx'> 	.else</div><div class='ctx'> 	/* Clear MSR to flag as ftrace_caller versus frace_regs_caller */</div><div class='ctx'> 	li	r8, 0</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	/* Get the _mcount() call site out of LR */</div><div class='del'>-	mflr	r7</div><div class='del'>-	/* Save it as pt_regs-&gt;nip */</div><div class='del'>-	PPC_STL	r7, _NIP(r1)</div><div class='del'>-	/* Also save it in B's stackframe header for proper unwind */</div><div class='del'>-	PPC_STL	r7, LRSAVE+SWITCH_FRAME_SIZE(r1)</div><div class='del'>-	/* Save the read LR in pt_regs-&gt;link */</div><div class='del'>-	PPC_STL	r0, _LINK(r1)</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	/* Save callee's TOC in the ABI compliant location */</div><div class='ctx'> 	std	r2, STK_GOT(r1)</div><div class='ctx'> 	LOAD_PACA_TOC()		/* get kernel TOC in r2 */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+	/* r11 points to the instruction following the call to ftrace */</div><div class='add'>+	PPC_LL	r5, -(MCOUNT_INSN_SIZE*2 + SZL)(r11)</div><div class='add'>+	PPC_LL	r12, FTRACE_OPS_FUNC(r5)</div><div class='add'>+	mtctr	r12</div><div class='add'>+#else /* !CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS */</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='ctx'> 	LOAD_REG_ADDR(r3, function_trace_op)</div><div class='ctx'> 	ld	r5,0(r3)</div><div class='ctx'> #else</div><div class='ctx'> 	lis	r3,function_trace_op@ha</div><div class='ctx'> 	lwz	r5,function_trace_op@l(r3)</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_LIVEPATCH_64</div><div class='del'>-	mr	r14, r7		/* remember old NIP */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	/* Calculate ip from nip-4 into r3 for call below */</div><div class='del'>-	subi    r3, r7, MCOUNT_INSN_SIZE</div><div class='del'>-</div><div class='del'>-	/* Put the original return address in r4 as parent_ip */</div><div class='del'>-	mr	r4, r0</div><div class='del'>-</div><div class='ctx'> 	/* Save special regs */</div><div class='ctx'> 	PPC_STL	r8, _MSR(r1)</div><div class='ctx'> 	.if \allregs == 1</div><div class='add'>+	PPC_STL	r7, _CCR(r1)</div><div class='ctx'> 	PPC_STL	r9, _CTR(r1)</div><div class='ctx'> 	PPC_STL	r10, _XER(r1)</div><div class='del'>-	PPC_STL	r11, _CCR(r1)</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	/* Clear orig_gpr3 to later detect ftrace_direct call */</div><div class='add'>+	li	r7, 0</div><div class='add'>+	PPC_STL	r7, ORIG_GPR3(r1)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	/* Save our real return address in nvr for return */</div><div class='add'>+	.if \allregs == 0</div><div class='add'>+	SAVE_GPR(15, r1)</div><div class='add'>+	.endif</div><div class='add'>+	mr	r15, r11</div><div class='add'>+	/*</div><div class='add'>+	 * We want the ftrace location in the function, but our lr (in r11)</div><div class='add'>+	 * points at the 'mtlr r0' instruction in the out of line stub.  To</div><div class='add'>+	 * recover the ftrace location, we read the branch instruction in the</div><div class='add'>+	 * stub, and adjust our lr by the branch offset.</div><div class='add'>+	 *</div><div class='add'>+	 * See ftrace_init_ool_stub() for the profile sequence.</div><div class='add'>+	 */</div><div class='add'>+	lwz	r8, MCOUNT_INSN_SIZE(r11)</div><div class='add'>+	slwi	r8, r8, 6</div><div class='add'>+	srawi	r8, r8, 6</div><div class='add'>+	add	r3, r11, r8</div><div class='add'>+	/*</div><div class='add'>+	 * Override our nip to point past the branch in the original function.</div><div class='add'>+	 * This allows reliable stack trace and the ftrace stack tracer to work as-is.</div><div class='add'>+	 */</div><div class='add'>+	addi	r11, r3, MCOUNT_INSN_SIZE</div><div class='add'>+#else</div><div class='add'>+	/* Calculate ip from nip-4 into r3 for call below */</div><div class='add'>+	subi    r3, r11, MCOUNT_INSN_SIZE</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Save NIP as pt_regs-&gt;nip */</div><div class='add'>+	PPC_STL	r11, _NIP(r1)</div><div class='add'>+	/* Also save it in B's stackframe header for proper unwind */</div><div class='add'>+	PPC_STL	r11, LRSAVE+SWITCH_FRAME_SIZE(r1)</div><div class='add'>+#if defined(CONFIG_LIVEPATCH_64) || defined(CONFIG_PPC_FTRACE_OUT_OF_LINE)</div><div class='add'>+	mr	r14, r11	/* remember old NIP */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Put the original return address in r4 as parent_ip */</div><div class='add'>+	mr	r4, r0</div><div class='add'>+</div><div class='ctx'> 	/* Load &amp;pt_regs in r6 for call below */</div><div class='ctx'> 	addi    r6, r1, STACK_INT_FRAME_REGS</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro	ftrace_regs_exit allregs</div><div class='del'>-	/* Load ctr with the possibly modified NIP */</div><div class='del'>-	PPC_LL	r3, _NIP(r1)</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	/* Check orig_gpr3 to detect ftrace_direct call */</div><div class='add'>+	PPC_LL	r3, ORIG_GPR3(r1)</div><div class='add'>+	PPC_LCMPI cr1, r3, 0</div><div class='ctx'> 	mtctr	r3</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+	/* Restore possibly modified LR */</div><div class='add'>+	PPC_LL	r0, _LINK(r1)</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	/* Load ctr with the possibly modified NIP */</div><div class='add'>+	PPC_LL	r3, _NIP(r1)</div><div class='ctx'> #ifdef CONFIG_LIVEPATCH_64</div><div class='ctx'> 	cmpd	r14, r3		/* has NIP been altered? */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	beq	cr1,2f</div><div class='add'>+	mtlr	r3</div><div class='add'>+	b	3f</div><div class='add'>+#endif</div><div class='add'>+2:	mtctr	r3</div><div class='add'>+	mtlr	r0</div><div class='add'>+3:</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_PPC_FTRACE_OUT_OF_LINE */</div><div class='add'>+	/* Load LR with the possibly modified NIP */</div><div class='add'>+	PPC_LL	r3, _NIP(r1)</div><div class='add'>+	cmpd	r14, r3		/* has NIP been altered? */</div><div class='add'>+	bne-	1f</div><div class='add'>+</div><div class='add'>+	mr	r3, r15</div><div class='add'>+1:	mtlr	r3</div><div class='add'>+	.if \allregs == 0</div><div class='add'>+	REST_GPR(15, r1)</div><div class='add'>+	.endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Restore gprs */</div><div class='ctx'> 	.if \allregs == 1</div><div class='ctx'> 	REST_GPRS(2, 31, r1)</div><div class='ctx'> 	.else</div><div class='ctx'> 	REST_GPRS(3, 10, r1)</div><div class='del'>-#ifdef CONFIG_LIVEPATCH_64</div><div class='add'>+#if defined(CONFIG_LIVEPATCH_64) || defined(CONFIG_PPC_FTRACE_OUT_OF_LINE)</div><div class='ctx'> 	REST_GPR(14, r1)</div><div class='ctx'> #endif</div><div class='ctx'> 	.endif</div><div class='ctx'> </div><div class='del'>-	/* Restore possibly modified LR */</div><div class='del'>-	PPC_LL	r0, _LINK(r1)</div><div class='del'>-	mtlr	r0</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	/* Restore callee's TOC */</div><div class='ctx'> 	ld	r2, STK_GOT(r1)</div><div class='hunk'>@@ -153,23 +240,46 @@</div><div class='ctx'>         /* Based on the cmpd above, if the NIP was altered handle livepatch */</div><div class='ctx'> 	bne-	livepatch_handler</div><div class='ctx'> #endif</div><div class='del'>-	bctr			/* jump after _mcount site */</div><div class='add'>+</div><div class='add'>+	/* jump after _mcount site */</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	bnectr	cr1</div><div class='add'>+#endif</div><div class='add'>+	/*</div><div class='add'>+	 * Return with blr to keep the link stack balanced. The function profiling sequence</div><div class='add'>+	 * uses 'mtlr r0' to restore LR.</div><div class='add'>+	 */</div><div class='add'>+	blr</div><div class='add'>+#else</div><div class='add'>+	bctr</div><div class='add'>+#endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-_GLOBAL(ftrace_regs_caller)</div><div class='del'>-	ftrace_regs_entry 1</div><div class='del'>-	/* ftrace_call(r3, r4, r5, r6) */</div><div class='add'>+.macro ftrace_regs_func allregs</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+	bctrl</div><div class='add'>+#else</div><div class='add'>+	.if \allregs == 1</div><div class='ctx'> .globl ftrace_regs_call</div><div class='ctx'> ftrace_regs_call:</div><div class='add'>+	.else</div><div class='add'>+.globl ftrace_call</div><div class='add'>+ftrace_call:</div><div class='add'>+	.endif</div><div class='add'>+	/* ftrace_call(r3, r4, r5, r6) */</div><div class='ctx'> 	bl	ftrace_stub</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+_GLOBAL(ftrace_regs_caller)</div><div class='add'>+	ftrace_regs_entry 1</div><div class='add'>+	ftrace_regs_func 1</div><div class='ctx'> 	ftrace_regs_exit 1</div><div class='ctx'> </div><div class='ctx'> _GLOBAL(ftrace_caller)</div><div class='ctx'> 	ftrace_regs_entry 0</div><div class='del'>-	/* ftrace_call(r3, r4, r5, r6) */</div><div class='del'>-.globl ftrace_call</div><div class='del'>-ftrace_call:</div><div class='del'>-	bl	ftrace_stub</div><div class='add'>+	ftrace_regs_func 0</div><div class='ctx'> 	ftrace_regs_exit 0</div><div class='ctx'> </div><div class='ctx'> _GLOBAL(ftrace_stub)</div><div class='hunk'>@@ -177,6 +287,11 @@ _GLOBAL(ftrace_stub)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> ftrace_no_trace:</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	REST_GPR(3, r1)</div><div class='add'>+	addi	r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE</div><div class='add'>+	blr</div><div class='add'>+#else</div><div class='ctx'> 	mflr	r3</div><div class='ctx'> 	mtctr	r3</div><div class='ctx'> 	REST_GPR(3, r1)</div><div class='hunk'>@@ -184,6 +299,22 @@ ftrace_no_trace:</div><div class='ctx'> 	mtlr	r0</div><div class='ctx'> 	bctr</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+.Lftrace_direct_call_regs:</div><div class='add'>+	mtctr	r12</div><div class='add'>+	REST_GPRS(11, 12, r1)</div><div class='add'>+	addi	r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE</div><div class='add'>+	bctr</div><div class='add'>+.Lftrace_direct_call:</div><div class='add'>+	mtctr	r12</div><div class='add'>+	addi	r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE</div><div class='add'>+	bctr</div><div class='add'>+SYM_FUNC_START(ftrace_stub_direct_tramp)</div><div class='add'>+	blr</div><div class='add'>+SYM_FUNC_END(ftrace_stub_direct_tramp)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_LIVEPATCH_64</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -194,11 +325,17 @@ ftrace_no_trace:</div><div class='ctx'> 	 * We get here when a function A, calls another function B, but B has</div><div class='ctx'> 	 * been live patched with a new function C.</div><div class='ctx'> 	 *</div><div class='del'>-	 * On entry:</div><div class='del'>-	 *  - we have no stack frame and can not allocate one</div><div class='add'>+	 * On entry, we have no stack frame and can not allocate one.</div><div class='add'>+	 *</div><div class='add'>+	 * With PPC_FTRACE_OUT_OF_LINE=n, on entry:</div><div class='ctx'> 	 *  - LR points back to the original caller (in A)</div><div class='ctx'> 	 *  - CTR holds the new NIP in C</div><div class='ctx'> 	 *  - r0, r11 &amp; r12 are free</div><div class='add'>+	 *</div><div class='add'>+	 * With PPC_FTRACE_OUT_OF_LINE=y, on entry:</div><div class='add'>+	 *  - r0 points back to the original caller (in A)</div><div class='add'>+	 *  - LR holds the new NIP in C</div><div class='add'>+	 *  - r11 &amp; r12 are free</div><div class='ctx'> 	 */</div><div class='ctx'> livepatch_handler:</div><div class='ctx'> 	ld	r12, PACA_THREAD_INFO(r13)</div><div class='hunk'>@@ -208,18 +345,23 @@ livepatch_handler:</div><div class='ctx'> 	addi	r11, r11, 24</div><div class='ctx'> 	std	r11, TI_livepatch_sp(r12)</div><div class='ctx'> </div><div class='del'>-	/* Save toc &amp; real LR on livepatch stack */</div><div class='del'>-	std	r2,  -24(r11)</div><div class='del'>-	mflr	r12</div><div class='del'>-	std	r12, -16(r11)</div><div class='del'>-</div><div class='ctx'> 	/* Store stack end marker */</div><div class='ctx'> 	lis     r12, STACK_END_MAGIC@h</div><div class='ctx'> 	ori     r12, r12, STACK_END_MAGIC@l</div><div class='ctx'> 	std	r12, -8(r11)</div><div class='ctx'> </div><div class='del'>-	/* Put ctr in r12 for global entry and branch there */</div><div class='add'>+	/* Save toc &amp; real LR on livepatch stack */</div><div class='add'>+	std	r2,  -24(r11)</div><div class='add'>+#ifndef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	mflr	r12</div><div class='add'>+	std	r12, -16(r11)</div><div class='ctx'> 	mfctr	r12</div><div class='add'>+#else</div><div class='add'>+	std	r0, -16(r11)</div><div class='add'>+	mflr	r12</div><div class='add'>+	/* Put ctr in r12 for global entry and branch there */</div><div class='add'>+	mtctr	r12</div><div class='add'>+#endif</div><div class='ctx'> 	bctrl</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -267,23 +409,31 @@ EXPORT_SYMBOL(_mcount)</div><div class='ctx'> _GLOBAL(return_to_handler)</div><div class='ctx'> 	/* need to save return values */</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	std	r4,  -32(r1)</div><div class='del'>-	std	r3,  -24(r1)</div><div class='add'>+	stdu	r1, -SWITCH_FRAME_SIZE(r1)</div><div class='add'>+	std	r4, GPR4(r1)</div><div class='add'>+	std	r3, GPR3(r1)</div><div class='add'>+	/* Save previous stack pointer (r1) */</div><div class='add'>+	addi	r3, r1, SWITCH_FRAME_SIZE</div><div class='add'>+	std	r3, GPR1(r1)</div><div class='ctx'> 	/* save TOC */</div><div class='del'>-	std	r2,  -16(r1)</div><div class='del'>-	std	r31, -8(r1)</div><div class='add'>+	std	r2,  24(r1)</div><div class='add'>+	std	r31, 32(r1)</div><div class='ctx'> 	mr	r31, r1</div><div class='del'>-	stdu	r1, -112(r1)</div><div class='del'>-</div><div class='add'>+	/* pass ftrace_regs/pt_regs to ftrace_return_to_handler */</div><div class='add'>+	addi	r3, r1, STACK_INT_FRAME_REGS</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We might be called from a module.</div><div class='ctx'> 	 * Switch to our TOC to run inside the core kernel.</div><div class='ctx'> 	 */</div><div class='ctx'> 	LOAD_PACA_TOC()</div><div class='ctx'> #else</div><div class='del'>-	stwu	r1, -16(r1)</div><div class='del'>-	stw	r3, 8(r1)</div><div class='del'>-	stw	r4, 12(r1)</div><div class='add'>+	stwu	r1, -SWITCH_FRAME_SIZE(r1)</div><div class='add'>+	stw	r4, GPR4(r1)</div><div class='add'>+	stw	r3, GPR3(r1)</div><div class='add'>+	addi	r3, r1, SWITCH_FRAME_SIZE</div><div class='add'>+	stw	r3, GPR1(r1)</div><div class='add'>+	/* pass ftrace_regs/pt_regs to ftrace_return_to_handler */</div><div class='add'>+	addi	r3, r1, STACK_INT_FRAME_REGS</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	bl	ftrace_return_to_handler</div><div class='hunk'>@@ -293,21 +443,29 @@ _GLOBAL(return_to_handler)</div><div class='ctx'> 	mtlr	r3</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	ld	r1, 0(r1)</div><div class='del'>-	ld	r4,  -32(r1)</div><div class='del'>-	ld	r3,  -24(r1)</div><div class='del'>-	ld	r2,  -16(r1)</div><div class='del'>-	ld	r31, -8(r1)</div><div class='add'>+	ld	r4,  GPR4(r1)</div><div class='add'>+	ld	r3,  GPR3(r1)</div><div class='add'>+	ld	r2,  24(r1)</div><div class='add'>+	ld	r31, 32(r1)</div><div class='add'>+	ld	r1,  0(r1)</div><div class='ctx'> #else</div><div class='del'>-	lwz	r3, 8(r1)</div><div class='del'>-	lwz	r4, 12(r1)</div><div class='del'>-	addi	r1, r1, 16</div><div class='add'>+	lwz	r3, GPR3(r1)</div><div class='add'>+	lwz	r4, GPR4(r1)</div><div class='add'>+	addi	r1, r1, SWITCH_FRAME_SIZE</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Jump back to real return address */</div><div class='ctx'> 	blr</div><div class='ctx'> #endif /* CONFIG_FUNCTION_GRAPH_TRACER */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+SYM_DATA(ftrace_ool_stub_text_count, .long CONFIG_PPC_FTRACE_OUT_OF_LINE_NUM_RESERVE)</div><div class='add'>+</div><div class='add'>+SYM_START(ftrace_ool_stub_text, SYM_L_GLOBAL, .balign SZL)</div><div class='add'>+	.space CONFIG_PPC_FTRACE_OUT_OF_LINE_NUM_RESERVE * FTRACE_OOL_STUB_SIZE</div><div class='add'>+SYM_CODE_END(ftrace_ool_stub_text)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> .pushsection ".tramp.ftrace.text","aw",@progbits;</div><div class='ctx'> .globl ftrace_tramp_text</div><div class='ctx'> ftrace_tramp_text:</div><div class='head'>diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c<br/>index edf5cabe5dfd..cb8e9357383e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/traps.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/traps.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/traps.c</a></div><div class='hunk'>@@ -263,10 +263,9 @@ static int __die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> {</div><div class='ctx'> 	printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);</div><div class='ctx'> </div><div class='del'>-	printk("%s PAGE_SIZE=%luK%s%s%s%s%s%s %s\n",</div><div class='add'>+	printk("%s PAGE_SIZE=%luK%s %s%s%s%s %s\n",</div><div class='ctx'> 	       IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN) ? "LE" : "BE",</div><div class='ctx'> 	       PAGE_SIZE / 1024, get_mmu_str(),</div><div class='del'>-	       IS_ENABLED(CONFIG_PREEMPT) ? " PREEMPT" : "",</div><div class='ctx'> 	       IS_ENABLED(CONFIG_SMP) ? " SMP" : "",</div><div class='ctx'> 	       IS_ENABLED(CONFIG_SMP) ? (" NR_CPUS=" __stringify(NR_CPUS)) : "",</div><div class='ctx'> 	       debug_pagealloc_enabled() ? " DEBUG_PAGEALLOC" : "",</div><div class='head'>diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c<br/>index 4b99208f5adc..862b22b2b616 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/udbg.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/udbg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/udbg.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/udbg.c</a></div><div class='hunk'>@@ -36,12 +36,6 @@ void __init udbg_early_init(void)</div><div class='ctx'> #elif defined(CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL)</div><div class='ctx'> 	/* RTAS panel debug */</div><div class='ctx'> 	udbg_init_rtas_panel();</div><div class='del'>-#elif defined(CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE)</div><div class='del'>-	/* RTAS console debug */</div><div class='del'>-	udbg_init_rtas_console();</div><div class='del'>-#elif defined(CONFIG_PPC_EARLY_DEBUG_MAPLE)</div><div class='del'>-	/* Maple real mode debug */</div><div class='del'>-	udbg_init_maple_realmode();</div><div class='ctx'> #elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE)</div><div class='ctx'> 	udbg_init_pas_realmode();</div><div class='ctx'> #elif defined(CONFIG_PPC_EARLY_DEBUG_BOOTX)</div><div class='head'>diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c<br/>index 313802aff571..dfe8ed2192e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/udbg_16550.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/udbg_16550.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/udbg_16550.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/udbg_16550.c</a></div><div class='hunk'>@@ -205,29 +205,6 @@ void __init udbg_uart_init_mmio(void __iomem *addr, unsigned int stride)</div><div class='ctx'> 	udbg_use_uart();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_MAPLE</div><div class='del'>-</div><div class='del'>-#define UDBG_UART_MAPLE_ADDR	((void __iomem *)0xf40003f8)</div><div class='del'>-</div><div class='del'>-static u8 udbg_uart_in_maple(unsigned int reg)</div><div class='del'>-{</div><div class='del'>-	return real_readb(UDBG_UART_MAPLE_ADDR + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void udbg_uart_out_maple(unsigned int reg, u8 val)</div><div class='del'>-{</div><div class='del'>-	real_writeb(val, UDBG_UART_MAPLE_ADDR + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init udbg_init_maple_realmode(void)</div><div class='del'>-{</div><div class='del'>-	udbg_uart_in = udbg_uart_in_maple;</div><div class='del'>-	udbg_uart_out = udbg_uart_out_maple;</div><div class='del'>-	udbg_use_uart();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_PPC_MAPLE */</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PPC_PASEMI</div><div class='ctx'> </div><div class='ctx'> #define UDBG_UART_PAS_ADDR	((void __iomem *)0xfcff03f8UL)</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c<br/>index ee4b9d676cff..ab7c4cc80943 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso.c</a></div><div class='hunk'>@@ -16,12 +16,12 @@</div><div class='ctx'> #include &lt;linux/user.h&gt;</div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;linux/security.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/syscalls.h&gt;</div><div class='del'>-#include &lt;linux/time_namespace.h&gt;</div><div class='add'>+#include &lt;linux/vdso_datastore.h&gt;</div><div class='ctx'> #include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='add'>+#include &lt;asm/syscalls.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='hunk'>@@ -33,31 +33,14 @@</div><div class='ctx'> #include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='add'>+static_assert(__VDSO_PAGES == VDSO_NR_PAGES);</div><div class='add'>+</div><div class='ctx'> /* The alignment of the vDSO */</div><div class='ctx'> #define VDSO_ALIGNMENT	(1 &lt;&lt; 16)</div><div class='ctx'> </div><div class='ctx'> extern char vdso32_start, vdso32_end;</div><div class='ctx'> extern char vdso64_start, vdso64_end;</div><div class='ctx'> </div><div class='del'>-long sys_ni_syscall(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The vdso data page (aka. systemcfg for old ppc64 fans) is here.</div><div class='del'>- * Once the early boot kernel code no longer needs to muck around</div><div class='del'>- * with it, it will become dynamically allocated</div><div class='del'>- */</div><div class='del'>-static union {</div><div class='del'>-	struct vdso_arch_data	data;</div><div class='del'>-	u8			page[PAGE_SIZE];</div><div class='del'>-} vdso_data_store __page_aligned_data;</div><div class='del'>-struct vdso_arch_data *vdso_data = &amp;vdso_data_store.data;</div><div class='del'>-</div><div class='del'>-enum vvar_pages {</div><div class='del'>-	VVAR_DATA_PAGE_OFFSET,</div><div class='del'>-	VVAR_TIMENS_PAGE_OFFSET,</div><div class='del'>-	VVAR_NR_PAGES,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int vdso_mremap(const struct vm_special_mapping *sm, struct vm_area_struct *new_vma,</div><div class='ctx'> 		       unsigned long text_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -96,14 +79,6 @@ static void vdso_close(const struct vm_special_mapping *sm, struct vm_area_struc</div><div class='ctx'> 	mm-&gt;context.vdso = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static vm_fault_t vvar_fault(const struct vm_special_mapping *sm,</div><div class='del'>-			     struct vm_area_struct *vma, struct vm_fault *vmf);</div><div class='del'>-</div><div class='del'>-static struct vm_special_mapping vvar_spec __ro_after_init = {</div><div class='del'>-	.name = "[vvar]",</div><div class='del'>-	.fault = vvar_fault,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct vm_special_mapping vdso32_spec __ro_after_init = {</div><div class='ctx'> 	.name = "[vdso]",</div><div class='ctx'> 	.mremap = vdso32_mremap,</div><div class='hunk'>@@ -116,70 +91,6 @@ static struct vm_special_mapping vdso64_spec __ro_after_init = {</div><div class='ctx'> 	.close = vdso_close,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-struct vdso_data *arch_get_vdso_data(void *vvar_page)</div><div class='del'>-{</div><div class='del'>-	return ((struct vdso_arch_data *)vvar_page)-&gt;data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The vvar mapping contains data for a specific time namespace, so when a task</div><div class='del'>- * changes namespace we must unmap its vvar data for the old namespace.</div><div class='del'>- * Subsequent faults will map in data for the new namespace.</div><div class='del'>- *</div><div class='del'>- * For more details see timens_setup_vdso_data().</div><div class='del'>- */</div><div class='del'>-int vdso_join_timens(struct task_struct *task, struct time_namespace *ns)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = task-&gt;mm;</div><div class='del'>-	VMA_ITERATOR(vmi, mm, 0);</div><div class='del'>-	struct vm_area_struct *vma;</div><div class='del'>-</div><div class='del'>-	mmap_read_lock(mm);</div><div class='del'>-	for_each_vma(vmi, vma) {</div><div class='del'>-		if (vma_is_special_mapping(vma, &amp;vvar_spec))</div><div class='del'>-			zap_vma_pages(vma);</div><div class='del'>-	}</div><div class='del'>-	mmap_read_unlock(mm);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static vm_fault_t vvar_fault(const struct vm_special_mapping *sm,</div><div class='del'>-			     struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='del'>-{</div><div class='del'>-	struct page *timens_page = find_timens_vvar_page(vma);</div><div class='del'>-	unsigned long pfn;</div><div class='del'>-</div><div class='del'>-	switch (vmf-&gt;pgoff) {</div><div class='del'>-	case VVAR_DATA_PAGE_OFFSET:</div><div class='del'>-		if (timens_page)</div><div class='del'>-			pfn = page_to_pfn(timens_page);</div><div class='del'>-		else</div><div class='del'>-			pfn = virt_to_pfn(vdso_data);</div><div class='del'>-		break;</div><div class='del'>-#ifdef CONFIG_TIME_NS</div><div class='del'>-	case VVAR_TIMENS_PAGE_OFFSET:</div><div class='del'>-		/*</div><div class='del'>-		 * If a task belongs to a time namespace then a namespace</div><div class='del'>-		 * specific VVAR is mapped with the VVAR_DATA_PAGE_OFFSET and</div><div class='del'>-		 * the real VVAR page is mapped with the VVAR_TIMENS_PAGE_OFFSET</div><div class='del'>-		 * offset.</div><div class='del'>-		 * See also the comment near timens_setup_vdso_data().</div><div class='del'>-		 */</div><div class='del'>-		if (!timens_page)</div><div class='del'>-			return VM_FAULT_SIGBUS;</div><div class='del'>-		pfn = virt_to_pfn(vdso_data);</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_TIME_NS */</div><div class='del'>-	default:</div><div class='del'>-		return VM_FAULT_SIGBUS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return vmf_insert_pfn(vma, vmf-&gt;address, pfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This is called from binfmt_elf, we create the special vma for the</div><div class='ctx'>  * vDSO and insert it into the mm struct tree</div><div class='hunk'>@@ -188,7 +99,7 @@ static int __arch_setup_additional_pages(struct linux_binprm *bprm, int uses_int</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long vdso_size, vdso_base, mappings_size;</div><div class='ctx'> 	struct vm_special_mapping *vdso_spec;</div><div class='del'>-	unsigned long vvar_size = VVAR_NR_PAGES * PAGE_SIZE;</div><div class='add'>+	unsigned long vvar_size = VDSO_NR_PAGES * PAGE_SIZE;</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> </div><div class='hunk'>@@ -214,9 +125,7 @@ static int __arch_setup_additional_pages(struct linux_binprm *bprm, int uses_int</div><div class='ctx'> 	/* Add required alignment. */</div><div class='ctx'> 	vdso_base = ALIGN(vdso_base, VDSO_ALIGNMENT);</div><div class='ctx'> </div><div class='del'>-	vma = _install_special_mapping(mm, vdso_base, vvar_size,</div><div class='del'>-				       VM_READ | VM_MAYREAD | VM_IO |</div><div class='del'>-				       VM_DONTDUMP | VM_PFNMAP, &amp;vvar_spec);</div><div class='add'>+	vma = vdso_install_vvar_mapping(mm, vdso_base);</div><div class='ctx'> 	if (IS_ERR(vma))</div><div class='ctx'> 		return PTR_ERR(vma);</div><div class='ctx'> </div><div class='hunk'>@@ -296,10 +205,10 @@ static void __init vdso_setup_syscall_map(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NR_syscalls; i++) {</div><div class='ctx'> 		if (sys_call_table[i] != (void *)&amp;sys_ni_syscall)</div><div class='del'>-			vdso_data-&gt;syscall_map[i &gt;&gt; 5] |= 0x80000000UL &gt;&gt; (i &amp; 0x1f);</div><div class='add'>+			vdso_k_arch_data-&gt;syscall_map[i &gt;&gt; 5] |= 0x80000000UL &gt;&gt; (i &amp; 0x1f);</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_COMPAT) &amp;&amp;</div><div class='ctx'> 		    compat_sys_call_table[i] != (void *)&amp;sys_ni_syscall)</div><div class='del'>-			vdso_data-&gt;compat_syscall_map[i &gt;&gt; 5] |= 0x80000000UL &gt;&gt; (i &amp; 0x1f);</div><div class='add'>+			vdso_k_arch_data-&gt;compat_syscall_map[i &gt;&gt; 5] |= 0x80000000UL &gt;&gt; (i &amp; 0x1f);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -349,29 +258,10 @@ static struct page ** __init vdso_setup_pages(void *start, void *end)</div><div class='ctx'> static int __init vdso_init(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	/*</div><div class='del'>-	 * Fill up the "systemcfg" stuff for backward compatibility</div><div class='del'>-	 */</div><div class='del'>-	strcpy((char *)vdso_data-&gt;eye_catcher, "SYSTEMCFG:PPC64");</div><div class='del'>-	vdso_data-&gt;version.major = SYSTEMCFG_MAJOR;</div><div class='del'>-	vdso_data-&gt;version.minor = SYSTEMCFG_MINOR;</div><div class='del'>-	vdso_data-&gt;processor = mfspr(SPRN_PVR);</div><div class='del'>-	/*</div><div class='del'>-	 * Fake the old platform number for pSeries and add</div><div class='del'>-	 * in LPAR bit if necessary</div><div class='del'>-	 */</div><div class='del'>-	vdso_data-&gt;platform = 0x100;</div><div class='del'>-	if (firmware_has_feature(FW_FEATURE_LPAR))</div><div class='del'>-		vdso_data-&gt;platform |= 1;</div><div class='del'>-	vdso_data-&gt;physicalMemorySize = memblock_phys_mem_size();</div><div class='del'>-	vdso_data-&gt;dcache_size = ppc64_caches.l1d.size;</div><div class='del'>-	vdso_data-&gt;dcache_line_size = ppc64_caches.l1d.line_size;</div><div class='del'>-	vdso_data-&gt;icache_size = ppc64_caches.l1i.size;</div><div class='del'>-	vdso_data-&gt;icache_line_size = ppc64_caches.l1i.line_size;</div><div class='del'>-	vdso_data-&gt;dcache_block_size = ppc64_caches.l1d.block_size;</div><div class='del'>-	vdso_data-&gt;icache_block_size = ppc64_caches.l1i.block_size;</div><div class='del'>-	vdso_data-&gt;dcache_log_block_size = ppc64_caches.l1d.log_block_size;</div><div class='del'>-	vdso_data-&gt;icache_log_block_size = ppc64_caches.l1i.log_block_size;</div><div class='add'>+	vdso_k_arch_data-&gt;dcache_block_size = ppc64_caches.l1d.block_size;</div><div class='add'>+	vdso_k_arch_data-&gt;icache_block_size = ppc64_caches.l1i.block_size;</div><div class='add'>+	vdso_k_arch_data-&gt;dcache_log_block_size = ppc64_caches.l1d.log_block_size;</div><div class='add'>+	vdso_k_arch_data-&gt;icache_log_block_size = ppc64_caches.l1i.log_block_size;</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='ctx'> 	vdso_setup_syscall_map();</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/Makefile b/arch/powerpc/kernel/vdso/Makefile<br/>index 31ca5a547004..8834dfe9d727 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # List of files in the vdso, has to be asm only for now</div><div class='ctx'> </div><div class='ctx'> # Include the generic Makefile to check the built vdso.</div><div class='del'>-include $(srctree)/lib/vdso/Makefile</div><div class='add'>+include $(srctree)/lib/vdso/Makefile.include</div><div class='ctx'> </div><div class='ctx'> obj-vdso32 = sigtramp32-32.o gettimeofday-32.o datapage-32.o cacheflush-32.o note-32.o getcpu-32.o</div><div class='ctx'> obj-vdso64 = sigtramp64-64.o gettimeofday-64.o datapage-64.o cacheflush-64.o note-64.o getcpu-64.o</div><div class='hunk'>@@ -50,14 +50,18 @@ ldflags-$(CONFIG_LD_IS_LLD) += $(call cc-option,--ld-path=$(LD),-fuse-ld=lld)</div><div class='ctx'> ldflags-$(CONFIG_LD_ORPHAN_WARN) += -Wl,--orphan-handling=$(CONFIG_LD_ORPHAN_WARN_LEVEL)</div><div class='ctx'> </div><div class='ctx'> # Filter flags that clang will warn are unused for linking</div><div class='del'>-ldflags-y += $(filter-out $(CC_AUTO_VAR_INIT_ZERO_ENABLER) $(CC_FLAGS_FTRACE) -Wa$(comma)%, $(KBUILD_CFLAGS))</div><div class='add'>+ldflags-y += $(filter-out $(CC_AUTO_VAR_INIT_ZERO_ENABLER) $(CC_FLAGS_FTRACE) -Wa$(comma)%, $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS))</div><div class='ctx'> </div><div class='ctx'> CC32FLAGS := -m32</div><div class='del'>-CC32FLAGSREMOVE := -mcmodel=medium -mabi=elfv1 -mabi=elfv2 -mcall-aixdesc</div><div class='del'>-  # This flag is supported by clang for 64-bit but not 32-bit so it will cause</div><div class='del'>-  # an unused command line flag warning for this file.</div><div class='add'>+CC32FLAGSREMOVE := -mcmodel=medium -mabi=elfv1 -mabi=elfv2 -mcall-aixdesc -mpcrel</div><div class='ctx'> ifdef CONFIG_CC_IS_CLANG</div><div class='add'>+# This flag is supported by clang for 64-bit but not 32-bit so it will cause</div><div class='add'>+# an unused command line flag warning for this file.</div><div class='ctx'> CC32FLAGSREMOVE += -fno-stack-clash-protection</div><div class='add'>+# -mstack-protector-guard values from the 64-bit build are not valid for the</div><div class='add'>+# 32-bit one. clang validates the values passed to these arguments during</div><div class='add'>+# parsing, even when -fno-stack-protector is passed afterwards.</div><div class='add'>+CC32FLAGSREMOVE += -mstack-protector-guard%</div><div class='ctx'> endif</div><div class='ctx'> LD32FLAGS := -Wl,-soname=linux-vdso32.so.1</div><div class='ctx'> AS32FLAGS := -D__VDSO32__</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/cacheflush.S b/arch/powerpc/kernel/vdso/cacheflush.S<br/>index 3b2479bd2f9a..488d3ade11e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/cacheflush.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/cacheflush.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/cacheflush.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/cacheflush.S</a></div><div class='hunk'>@@ -30,7 +30,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	mflr	r12</div><div class='ctx'>   .cfi_register lr,r12</div><div class='del'>-	get_realdatapage	r10, r11</div><div class='add'>+	get_datapage	r10 vdso_u_arch_data</div><div class='ctx'> 	mtlr	r12</div><div class='ctx'>   .cfi_restore	lr</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/datapage.S b/arch/powerpc/kernel/vdso/datapage.S<br/>index 2b19b6201a33..d23b2e8e2a34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/datapage.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/datapage.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/datapage.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/datapage.S</a></div><div class='hunk'>@@ -28,7 +28,7 @@ V_FUNCTION_BEGIN(__kernel_get_syscall_map)</div><div class='ctx'> 	mflr	r12</div><div class='ctx'>   .cfi_register lr,r12</div><div class='ctx'> 	mr.	r4,r3</div><div class='del'>-	get_realdatapage	r3, r11</div><div class='add'>+	get_datapage	r3 vdso_u_arch_data</div><div class='ctx'> 	mtlr	r12</div><div class='ctx'> #ifdef __powerpc64__</div><div class='ctx'> 	addi	r3,r3,CFG_SYSCALL_MAP64</div><div class='hunk'>@@ -52,7 +52,7 @@ V_FUNCTION_BEGIN(__kernel_get_tbfreq)</div><div class='ctx'>   .cfi_startproc</div><div class='ctx'> 	mflr	r12</div><div class='ctx'>   .cfi_register lr,r12</div><div class='del'>-	get_realdatapage	r3, r11</div><div class='add'>+	get_datapage	r3 vdso_u_arch_data</div><div class='ctx'> #ifndef __powerpc64__</div><div class='ctx'> 	lwz	r4,(CFG_TB_TICKS_PER_SEC + 4)(r3)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/getrandom.S b/arch/powerpc/kernel/vdso/getrandom.S<br/>index f3bbf931931c..a80d9fb436f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/getrandom.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/getrandom.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/getrandom.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/getrandom.S</a></div><div class='hunk'>@@ -31,8 +31,6 @@</div><div class='ctx'> 	PPC_STL		r2, PPC_MIN_STKFRM + STK_GOT(r1)</div><div class='ctx'>   .cfi_rel_offset r2, PPC_MIN_STKFRM + STK_GOT</div><div class='ctx'> #endif</div><div class='del'>-	get_realdatapage	r8, r11</div><div class='del'>-	addi		r8, r8, VDSO_RNG_DATA_OFFSET</div><div class='ctx'> 	bl		CFUNC(DOTSYM(\funct))</div><div class='ctx'> 	PPC_LL		r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1)</div><div class='ctx'> #ifdef __powerpc64__</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/gettimeofday.S b/arch/powerpc/kernel/vdso/gettimeofday.S<br/>index 5540d7021fa2..79c967212444 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/gettimeofday.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/gettimeofday.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/gettimeofday.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/gettimeofday.S</a></div><div class='hunk'>@@ -32,11 +32,10 @@</div><div class='ctx'> 	PPC_STL		r2, PPC_MIN_STKFRM + STK_GOT(r1)</div><div class='ctx'>   .cfi_rel_offset r2, PPC_MIN_STKFRM + STK_GOT</div><div class='ctx'> #endif</div><div class='del'>-	get_datapage	r5</div><div class='ctx'> 	.ifeq	\call_time</div><div class='del'>-	addi		r5, r5, VDSO_DATA_OFFSET</div><div class='add'>+		get_datapage	r5 vdso_u_time_data</div><div class='ctx'> 	.else</div><div class='del'>-	addi		r4, r5, VDSO_DATA_OFFSET</div><div class='add'>+		get_datapage	r4 vdso_u_time_data</div><div class='ctx'> 	.endif</div><div class='ctx'> 	bl		CFUNC(DOTSYM(\funct))</div><div class='ctx'> 	PPC_LL		r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1)</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/vdso32.lds.S b/arch/powerpc/kernel/vdso/vdso32.lds.S<br/>index 7b41d5d256e8..72a1012b8a20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vdso32.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vdso32.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vdso32.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/vdso32.lds.S</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm-generic/vmlinux.lds.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __LITTLE_ENDIAN__</div><div class='ctx'> OUTPUT_FORMAT("elf32-powerpcle", "elf32-powerpcle", "elf32-powerpcle")</div><div class='hunk'>@@ -16,7 +17,8 @@ OUTPUT_ARCH(powerpc:common)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_vdso_datapage = . - 2 * PAGE_SIZE);</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='ctx'> 	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	.hash          	: { *(.hash) }			:text</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/vdso64.lds.S b/arch/powerpc/kernel/vdso/vdso64.lds.S<br/>index 9481e4b892ed..32102a05eaa7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vdso64.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vdso64.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vdso64.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/vdso64.lds.S</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm-generic/vmlinux.lds.h&gt;</div><div class='add'>+#include &lt;vdso/datapage.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __LITTLE_ENDIAN__</div><div class='ctx'> OUTPUT_FORMAT("elf64-powerpcle", "elf64-powerpcle", "elf64-powerpcle")</div><div class='hunk'>@@ -16,7 +17,8 @@ OUTPUT_ARCH(powerpc:common64)</div><div class='ctx'> </div><div class='ctx'> SECTIONS</div><div class='ctx'> {</div><div class='del'>-	PROVIDE(_vdso_datapage = . - 2 * PAGE_SIZE);</div><div class='add'>+	VDSO_VVAR_SYMS</div><div class='add'>+</div><div class='ctx'> 	. = SIZEOF_HEADERS;</div><div class='ctx'> </div><div class='ctx'> 	.hash		: { *(.hash) }			:text</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/vgetrandom.c b/arch/powerpc/kernel/vdso/vgetrandom.c<br/>index 5f855d45fb7b..cc79b960a541 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vgetrandom.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vgetrandom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vgetrandom.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/vgetrandom.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> ssize_t __c_kernel_getrandom(void *buffer, size_t len, unsigned int flags, void *opaque_state,</div><div class='del'>-			     size_t opaque_len, const struct vdso_rng_data *vd)</div><div class='add'>+			     size_t opaque_len)</div><div class='ctx'> {</div><div class='del'>-	return __cvdso_getrandom_data(vd, buffer, len, flags, opaque_state, opaque_len);</div><div class='add'>+	return __cvdso_getrandom(buffer, len, flags, opaque_state, opaque_len);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso/vgettimeofday.c b/arch/powerpc/kernel/vdso/vgettimeofday.c<br/>index 55a287c9a736..6f5167d81af5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vgettimeofday.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso/vgettimeofday.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso/vgettimeofday.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso/vgettimeofday.c</a></div><div class='hunk'>@@ -7,43 +7,43 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __powerpc64__</div><div class='ctx'> int __c_kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts,</div><div class='del'>-			     const struct vdso_data *vd)</div><div class='add'>+			     const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_clock_gettime_data(vd, clock, ts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __c_kernel_clock_getres(clockid_t clock_id, struct __kernel_timespec *res,</div><div class='del'>-			    const struct vdso_data *vd)</div><div class='add'>+			    const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_clock_getres_data(vd, clock_id, res);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> int __c_kernel_clock_gettime(clockid_t clock, struct old_timespec32 *ts,</div><div class='del'>-			     const struct vdso_data *vd)</div><div class='add'>+			     const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_clock_gettime32_data(vd, clock, ts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __c_kernel_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts,</div><div class='del'>-			       const struct vdso_data *vd)</div><div class='add'>+			       const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_clock_gettime_data(vd, clock, ts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __c_kernel_clock_getres(clockid_t clock_id, struct old_timespec32 *res,</div><div class='del'>-			    const struct vdso_data *vd)</div><div class='add'>+			    const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_clock_getres_time32_data(vd, clock_id, res);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> int __c_kernel_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz,</div><div class='del'>-			    const struct vdso_data *vd)</div><div class='add'>+			    const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_gettimeofday_data(vd, tv, tz);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-__kernel_old_time_t __c_kernel_time(__kernel_old_time_t *time, const struct vdso_data *vd)</div><div class='add'>+__kernel_old_time_t __c_kernel_time(__kernel_old_time_t *time, const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='ctx'> 	return __cvdso_time_data(vd, time);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso32_wrapper.S b/arch/powerpc/kernel/vdso32_wrapper.S<br/>index 10f92f265d51..20bca3548b44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso32_wrapper.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso32_wrapper.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso32_wrapper.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso32_wrapper.S</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-	__PAGE_ALIGNED_DATA</div><div class='add'>+	.section ".data..ro_after_init", "aw"</div><div class='ctx'> </div><div class='ctx'> 	.globl vdso32_start, vdso32_end</div><div class='ctx'> 	.balign PAGE_SIZE</div><div class='head'>diff --git a/arch/powerpc/kernel/vdso64_wrapper.S b/arch/powerpc/kernel/vdso64_wrapper.S<br/>index 839d1a61411d..1912936fa227 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso64_wrapper.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vdso64_wrapper.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vdso64_wrapper.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vdso64_wrapper.S</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='del'>-	__PAGE_ALIGNED_DATA</div><div class='add'>+	.section ".data..ro_after_init", "aw"</div><div class='ctx'> </div><div class='ctx'> 	.globl vdso64_start, vdso64_end</div><div class='ctx'> 	.balign PAGE_SIZE</div><div class='head'>diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S<br/>index 7ab4e2fb28b1..de6ee7d35cff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vmlinux.lds.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/vmlinux.lds.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -1,10 +1,4 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifdef CONFIG_PPC64</div><div class='del'>-#define PROVIDE32(x)	PROVIDE(__unused__##x)</div><div class='del'>-#else</div><div class='del'>-#define PROVIDE32(x)	PROVIDE(x)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define BSS_FIRST_SECTIONS *(.bss.prominit)</div><div class='ctx'> #define EMITS_PT_NOTE</div><div class='ctx'> #define RO_EXCEPTION_TABLE_ALIGN	0</div><div class='hunk'>@@ -127,7 +121,6 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 	_etext = .;</div><div class='del'>-	PROVIDE32 (etext = .);</div><div class='ctx'> </div><div class='ctx'> 	/* Read-only data */</div><div class='ctx'> 	RO_DATA(PAGE_SIZE)</div><div class='hunk'>@@ -265,14 +258,13 @@ SECTIONS</div><div class='ctx'> 	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {</div><div class='ctx'> 		_sinittext = .;</div><div class='ctx'> 		INIT_TEXT</div><div class='del'>-</div><div class='add'>+		*(.tramp.ftrace.init);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 *.init.text might be RO so we must ensure this section ends on</div><div class='ctx'> 		 * a page boundary.</div><div class='ctx'> 		 */</div><div class='ctx'> 		. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 		_einittext = .;</div><div class='del'>-		*(.tramp.ftrace.init);</div><div class='ctx'> 	} :text</div><div class='ctx'> </div><div class='ctx'> 	/* .exit.text is discarded at runtime, not link time,</div><div class='hunk'>@@ -395,7 +387,6 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 	_edata  =  .;</div><div class='del'>-	PROVIDE32 (edata = .);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * And finally the bss</div><div class='hunk'>@@ -405,7 +396,6 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='ctx'> 	_end = . ;</div><div class='del'>-	PROVIDE32 (end = .);</div><div class='ctx'> </div><div class='ctx'> 	DWARF_DEBUG</div><div class='ctx'> 	ELF_DETAILS</div><div class='head'>diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c<br/>index 8c464a5d8246..2429cb1c7baa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/watchdog.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kernel/watchdog.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kernel/watchdog.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kernel/watchdog.c</a></div><div class='hunk'>@@ -495,8 +495,7 @@ static void start_watchdog(void *arg)</div><div class='ctx'> </div><div class='ctx'> 	*this_cpu_ptr(&amp;wd_timer_tb) = get_tb();</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	hrtimer-&gt;function = watchdog_timer_fn;</div><div class='add'>+	hrtimer_setup(hrtimer, watchdog_timer_fn, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	hrtimer_start(hrtimer, ms_to_ktime(wd_timer_period_ms),</div><div class='ctx'> 		      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kexec/core.c b/arch/powerpc/kexec/core.c<br/>index b8333a49ea5d..d1a2d755381c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kexec/core.c</a></div><div class='hunk'>@@ -22,28 +22,6 @@</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> </div><div class='del'>-void machine_kexec_mask_interrupts(void) {</div><div class='del'>-	unsigned int i;</div><div class='del'>-	struct irq_desc *desc;</div><div class='del'>-</div><div class='del'>-	for_each_irq_desc(i, desc) {</div><div class='del'>-		struct irq_chip *chip;</div><div class='del'>-</div><div class='del'>-		chip = irq_desc_get_chip(desc);</div><div class='del'>-		if (!chip)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_eoi &amp;&amp; irqd_irq_inprogress(&amp;desc-&gt;irq_data))</div><div class='del'>-			chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_mask)</div><div class='del'>-			chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-		if (chip-&gt;irq_disable &amp;&amp; !irqd_irq_disabled(&amp;desc-&gt;irq_data))</div><div class='del'>-			chip-&gt;irq_disable(&amp;desc-&gt;irq_data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> void machine_crash_shutdown(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -80,38 +58,20 @@ void machine_kexec(struct kimage *image)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_RESERVE</div><div class='del'>-void __init reserve_crashkernel(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long long crash_size, crash_base, total_mem_sz;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	total_mem_sz = memory_limit ? memory_limit : memblock_phys_mem_size();</div><div class='del'>-	/* use common parsing */</div><div class='del'>-	ret = parse_crashkernel(boot_command_line, total_mem_sz,</div><div class='del'>-			&amp;crash_size, &amp;crash_base, NULL, NULL);</div><div class='del'>-	if (ret == 0 &amp;&amp; crash_size &gt; 0) {</div><div class='del'>-		crashk_res.start = crash_base;</div><div class='del'>-		crashk_res.end = crash_base + crash_size - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (crashk_res.end == crashk_res.start) {</div><div class='del'>-		crashk_res.start = crashk_res.end = 0;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* We might have got these values via the command line or the</div><div class='del'>-	 * device tree, either way sanitise them now. */</div><div class='del'>-</div><div class='del'>-	crash_size = resource_size(&amp;crashk_res);</div><div class='add'>+static unsigned long long __init get_crash_base(unsigned long long crash_base)</div><div class='add'>+{</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_NONSTATIC_KERNEL</div><div class='del'>-	if (crashk_res.start != KDUMP_KERNELBASE)</div><div class='add'>+	if (crash_base != KDUMP_KERNELBASE)</div><div class='ctx'> 		printk("Crash kernel location must be 0x%x\n",</div><div class='ctx'> 				KDUMP_KERNELBASE);</div><div class='ctx'> </div><div class='del'>-	crashk_res.start = KDUMP_KERNELBASE;</div><div class='add'>+	return KDUMP_KERNELBASE;</div><div class='ctx'> #else</div><div class='del'>-	if (!crashk_res.start) {</div><div class='add'>+	unsigned long long crash_base_align;</div><div class='add'>+</div><div class='add'>+	if (!crash_base) {</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * On the LPAR platform place the crash kernel to mid of</div><div class='hunk'>@@ -123,53 +83,51 @@ void __init reserve_crashkernel(void)</div><div class='ctx'> 		 * kernel starts at 128MB offset on other platforms.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (firmware_has_feature(FW_FEATURE_LPAR))</div><div class='del'>-			crashk_res.start = min_t(u64, ppc64_rma_size / 2, SZ_512M);</div><div class='add'>+			crash_base = min_t(u64, ppc64_rma_size / 2, SZ_512M);</div><div class='ctx'> 		else</div><div class='del'>-			crashk_res.start = min_t(u64, ppc64_rma_size / 2, SZ_128M);</div><div class='add'>+			crash_base = min_t(u64, ppc64_rma_size / 2, SZ_128M);</div><div class='ctx'> #else</div><div class='del'>-		crashk_res.start = KDUMP_KERNELBASE;</div><div class='add'>+		crash_base = KDUMP_KERNELBASE;</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	crash_base = PAGE_ALIGN(crashk_res.start);</div><div class='del'>-	if (crash_base != crashk_res.start) {</div><div class='del'>-		printk("Crash kernel base must be aligned to 0x%lx\n",</div><div class='del'>-				PAGE_SIZE);</div><div class='del'>-		crashk_res.start = crash_base;</div><div class='del'>-	}</div><div class='add'>+	crash_base_align = PAGE_ALIGN(crash_base);</div><div class='add'>+	if (crash_base != crash_base_align)</div><div class='add'>+		pr_warn("Crash kernel base must be aligned to 0x%lx\n", PAGE_SIZE);</div><div class='ctx'> </div><div class='add'>+	return crash_base_align;</div><div class='ctx'> #endif</div><div class='del'>-	crash_size = PAGE_ALIGN(crash_size);</div><div class='del'>-	crashk_res.end = crashk_res.start + crash_size - 1;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* The crash region must not overlap the current kernel */</div><div class='del'>-	if (overlaps_crashkernel(__pa(_stext), _end - _stext)) {</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-			"Crash kernel can not overlap current kernel\n");</div><div class='del'>-		crashk_res.start = crashk_res.end = 0;</div><div class='add'>+void __init arch_reserve_crashkernel(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long long crash_size, crash_base, crash_end;</div><div class='add'>+	unsigned long long kernel_start, kernel_size;</div><div class='add'>+	unsigned long long total_mem_sz;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	total_mem_sz = memory_limit ? memory_limit : memblock_phys_mem_size();</div><div class='add'>+</div><div class='add'>+	/* use common parsing */</div><div class='add'>+	ret = parse_crashkernel(boot_command_line, total_mem_sz, &amp;crash_size,</div><div class='add'>+				&amp;crash_base, NULL, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* Crash kernel trumps memory limit */</div><div class='del'>-	if (memory_limit &amp;&amp; memory_limit &lt;= crashk_res.end) {</div><div class='del'>-		memory_limit = crashk_res.end + 1;</div><div class='del'>-		total_mem_sz = memory_limit;</div><div class='del'>-		printk("Adjusted memory limit for crashkernel, now 0x%llx\n",</div><div class='del'>-		       memory_limit);</div><div class='del'>-	}</div><div class='add'>+	crash_base = get_crash_base(crash_base);</div><div class='add'>+	crash_end = crash_base + crash_size - 1;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "</div><div class='del'>-			"for crashkernel (System RAM: %ldMB)\n",</div><div class='del'>-			(unsigned long)(crash_size &gt;&gt; 20),</div><div class='del'>-			(unsigned long)(crashk_res.start &gt;&gt; 20),</div><div class='del'>-			(unsigned long)(total_mem_sz &gt;&gt; 20));</div><div class='add'>+	kernel_start = __pa(_stext);</div><div class='add'>+	kernel_size = _end - _stext;</div><div class='ctx'> </div><div class='del'>-	if (!memblock_is_region_memory(crashk_res.start, crash_size) ||</div><div class='del'>-	    memblock_reserve(crashk_res.start, crash_size)) {</div><div class='del'>-		pr_err("Failed to reserve memory for crashkernel!\n");</div><div class='del'>-		crashk_res.start = crashk_res.end = 0;</div><div class='add'>+	/* The crash region must not overlap the current kernel */</div><div class='add'>+	if ((kernel_start + kernel_size &gt; crash_base) &amp;&amp; (kernel_start &lt;= crash_end)) {</div><div class='add'>+		pr_warn("Crash kernel can not overlap current kernel\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	reserve_crashkernel_generic(crash_size, crash_base, 0, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __init overlaps_crashkernel(unsigned long start, unsigned long size)</div><div class='head'>diff --git a/arch/powerpc/kexec/core_32.c b/arch/powerpc/kexec/core_32.c<br/>index c95f96850c9e..deb28eb44f30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/core_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/core_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/core_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kexec/core_32.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  * Copyright (C) 2005 IBM Corporation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='head'>diff --git a/arch/powerpc/kexec/crash.c b/arch/powerpc/kexec/crash.c<br/>index 9ac3266e4965..a325c1c02f96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/crash.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/crash.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/crash.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kexec/crash.c</a></div><div class='hunk'>@@ -359,7 +359,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs)</div><div class='ctx'> 	if (TRAP(regs) == INTERRUPT_SYSTEM_RESET)</div><div class='ctx'> 		is_via_system_reset = 1;</div><div class='ctx'> </div><div class='del'>-	crash_smp_send_stop();</div><div class='add'>+	if (IS_ENABLED(CONFIG_SMP))</div><div class='add'>+		crash_smp_send_stop();</div><div class='add'>+	else</div><div class='add'>+		crash_kexec_prepare();</div><div class='ctx'> </div><div class='ctx'> 	crash_save_cpu(regs, crashing_cpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kexec/file_load_64.c b/arch/powerpc/kexec/file_load_64.c<br/>index 9738adabeb1f..e7ef8b2a2554 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/file_load_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/file_load_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/file_load_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kexec/file_load_64.c</a></div><div class='hunk'>@@ -49,201 +49,18 @@ const struct kexec_file_ops * const kexec_file_loaders[] = {</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * __locate_mem_hole_top_down - Looks top down for a large enough memory hole</div><div class='del'>- *                              in the memory regions between buf_min &amp; buf_max</div><div class='del'>- *                              for the buffer. If found, sets kbuf-&gt;mem.</div><div class='del'>- * @kbuf:                       Buffer contents and memory parameters.</div><div class='del'>- * @buf_min:                    Minimum address for the buffer.</div><div class='del'>- * @buf_max:                    Maximum address for the buffer.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative errno on error.</div><div class='del'>- */</div><div class='del'>-static int __locate_mem_hole_top_down(struct kexec_buf *kbuf,</div><div class='del'>-				      u64 buf_min, u64 buf_max)</div><div class='del'>-{</div><div class='del'>-	int ret = -EADDRNOTAVAIL;</div><div class='del'>-	phys_addr_t start, end;</div><div class='del'>-	u64 i;</div><div class='del'>-</div><div class='del'>-	for_each_mem_range_rev(i, &amp;start, &amp;end) {</div><div class='del'>-		/*</div><div class='del'>-		 * memblock uses [start, end) convention while it is</div><div class='del'>-		 * [start, end] here. Fix the off-by-one to have the</div><div class='del'>-		 * same convention.</div><div class='del'>-		 */</div><div class='del'>-		end -= 1;</div><div class='del'>-</div><div class='del'>-		if (start &gt; buf_max)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Memory hole not found */</div><div class='del'>-		if (end &lt; buf_min)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Adjust memory region based on the given range */</div><div class='del'>-		if (start &lt; buf_min)</div><div class='del'>-			start = buf_min;</div><div class='del'>-		if (end &gt; buf_max)</div><div class='del'>-			end = buf_max;</div><div class='del'>-</div><div class='del'>-		start = ALIGN(start, kbuf-&gt;buf_align);</div><div class='del'>-		if (start &lt; end &amp;&amp; (end - start + 1) &gt;= kbuf-&gt;memsz) {</div><div class='del'>-			/* Suitable memory range found. Set kbuf-&gt;mem */</div><div class='del'>-			kbuf-&gt;mem = ALIGN_DOWN(end - kbuf-&gt;memsz + 1,</div><div class='del'>-					       kbuf-&gt;buf_align);</div><div class='del'>-			ret = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * locate_mem_hole_top_down_ppc64 - Skip special memory regions to find a</div><div class='del'>- *                                  suitable buffer with top down approach.</div><div class='del'>- * @kbuf:                           Buffer contents and memory parameters.</div><div class='del'>- * @buf_min:                        Minimum address for the buffer.</div><div class='del'>- * @buf_max:                        Maximum address for the buffer.</div><div class='del'>- * @emem:                           Exclude memory ranges.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative errno on error.</div><div class='del'>- */</div><div class='del'>-static int locate_mem_hole_top_down_ppc64(struct kexec_buf *kbuf,</div><div class='del'>-					  u64 buf_min, u64 buf_max,</div><div class='del'>-					  const struct crash_mem *emem)</div><div class='del'>-{</div><div class='del'>-	int i, ret = 0, err = -EADDRNOTAVAIL;</div><div class='del'>-	u64 start, end, tmin, tmax;</div><div class='del'>-</div><div class='del'>-	tmax = buf_max;</div><div class='del'>-	for (i = (emem-&gt;nr_ranges - 1); i &gt;= 0; i--) {</div><div class='del'>-		start = emem-&gt;ranges[i].start;</div><div class='del'>-		end = emem-&gt;ranges[i].end;</div><div class='del'>-</div><div class='del'>-		if (start &gt; tmax)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (end &lt; tmax) {</div><div class='del'>-			tmin = (end &lt; buf_min ? buf_min : end + 1);</div><div class='del'>-			ret = __locate_mem_hole_top_down(kbuf, tmin, tmax);</div><div class='del'>-			if (!ret)</div><div class='del'>-				return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tmax = start - 1;</div><div class='del'>-</div><div class='del'>-		if (tmax &lt; buf_min) {</div><div class='del'>-			ret = err;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		tmin = buf_min;</div><div class='del'>-		ret = __locate_mem_hole_top_down(kbuf, tmin, tmax);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * __locate_mem_hole_bottom_up - Looks bottom up for a large enough memory hole</div><div class='del'>- *                               in the memory regions between buf_min &amp; buf_max</div><div class='del'>- *                               for the buffer. If found, sets kbuf-&gt;mem.</div><div class='del'>- * @kbuf:                        Buffer contents and memory parameters.</div><div class='del'>- * @buf_min:                     Minimum address for the buffer.</div><div class='del'>- * @buf_max:                     Maximum address for the buffer.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative errno on error.</div><div class='del'>- */</div><div class='del'>-static int __locate_mem_hole_bottom_up(struct kexec_buf *kbuf,</div><div class='del'>-				       u64 buf_min, u64 buf_max)</div><div class='del'>-{</div><div class='del'>-	int ret = -EADDRNOTAVAIL;</div><div class='del'>-	phys_addr_t start, end;</div><div class='del'>-	u64 i;</div><div class='del'>-</div><div class='del'>-	for_each_mem_range(i, &amp;start, &amp;end) {</div><div class='del'>-		/*</div><div class='del'>-		 * memblock uses [start, end) convention while it is</div><div class='del'>-		 * [start, end] here. Fix the off-by-one to have the</div><div class='del'>-		 * same convention.</div><div class='del'>-		 */</div><div class='del'>-		end -= 1;</div><div class='del'>-</div><div class='del'>-		if (end &lt; buf_min)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Memory hole not found */</div><div class='del'>-		if (start &gt; buf_max)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Adjust memory region based on the given range */</div><div class='del'>-		if (start &lt; buf_min)</div><div class='del'>-			start = buf_min;</div><div class='del'>-		if (end &gt; buf_max)</div><div class='del'>-			end = buf_max;</div><div class='del'>-</div><div class='del'>-		start = ALIGN(start, kbuf-&gt;buf_align);</div><div class='del'>-		if (start &lt; end &amp;&amp; (end - start + 1) &gt;= kbuf-&gt;memsz) {</div><div class='del'>-			/* Suitable memory range found. Set kbuf-&gt;mem */</div><div class='del'>-			kbuf-&gt;mem = start;</div><div class='del'>-			ret = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * locate_mem_hole_bottom_up_ppc64 - Skip special memory regions to find a</div><div class='del'>- *                                   suitable buffer with bottom up approach.</div><div class='del'>- * @kbuf:                            Buffer contents and memory parameters.</div><div class='del'>- * @buf_min:                         Minimum address for the buffer.</div><div class='del'>- * @buf_max:                         Maximum address for the buffer.</div><div class='del'>- * @emem:                            Exclude memory ranges.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative errno on error.</div><div class='del'>- */</div><div class='del'>-static int locate_mem_hole_bottom_up_ppc64(struct kexec_buf *kbuf,</div><div class='del'>-					   u64 buf_min, u64 buf_max,</div><div class='del'>-					   const struct crash_mem *emem)</div><div class='add'>+int arch_check_excluded_range(struct kimage *image, unsigned long start,</div><div class='add'>+			      unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	int i, ret = 0, err = -EADDRNOTAVAIL;</div><div class='del'>-	u64 start, end, tmin, tmax;</div><div class='del'>-</div><div class='del'>-	tmin = buf_min;</div><div class='del'>-	for (i = 0; i &lt; emem-&gt;nr_ranges; i++) {</div><div class='del'>-		start = emem-&gt;ranges[i].start;</div><div class='del'>-		end = emem-&gt;ranges[i].end;</div><div class='del'>-</div><div class='del'>-		if (end &lt; tmin)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (start &gt; tmin) {</div><div class='del'>-			tmax = (start &gt; buf_max ? buf_max : start - 1);</div><div class='del'>-			ret = __locate_mem_hole_bottom_up(kbuf, tmin, tmax);</div><div class='del'>-			if (!ret)</div><div class='del'>-				return 0;</div><div class='del'>-		}</div><div class='add'>+	struct crash_mem *emem;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-		tmin = end + 1;</div><div class='add'>+	emem = image-&gt;arch.exclude_ranges;</div><div class='add'>+	for (i = 0; i &lt; emem-&gt;nr_ranges; i++)</div><div class='add'>+		if (start &lt; emem-&gt;ranges[i].end &amp;&amp; end &gt; emem-&gt;ranges[i].start)</div><div class='add'>+			return 1;</div><div class='ctx'> </div><div class='del'>-		if (tmin &gt; buf_max) {</div><div class='del'>-			ret = err;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		tmax = buf_max;</div><div class='del'>-		ret = __locate_mem_hole_bottom_up(kbuf, tmin, tmax);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='hunk'>@@ -736,13 +553,18 @@ int setup_purgatory_ppc64(struct kimage *image, const void *slave_code,</div><div class='ctx'> 	if (dn) {</div><div class='ctx'> 		u64 val;</div><div class='ctx'> </div><div class='del'>-		of_property_read_u64(dn, "opal-base-address", &amp;val);</div><div class='add'>+		ret = of_property_read_u64(dn, "opal-base-address", &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='ctx'> 		ret = kexec_purgatory_get_set_symbol(image, "opal_base", &amp;val,</div><div class='ctx'> 						     sizeof(val), false);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		of_property_read_u64(dn, "opal-entry-address", &amp;val);</div><div class='add'>+		ret = of_property_read_u64(dn, "opal-entry-address", &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='ctx'> 		ret = kexec_purgatory_get_set_symbol(image, "opal_entry", &amp;val,</div><div class='ctx'> 						     sizeof(val), false);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1000,64 +822,6 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * arch_kexec_locate_mem_hole - Skip special memory regions like rtas, opal,</div><div class='del'>- *                              tce-table, reserved-ranges &amp; such (exclude</div><div class='del'>- *                              memory ranges) as they can't be used for kexec</div><div class='del'>- *                              segment buffer. Sets kbuf-&gt;mem when a suitable</div><div class='del'>- *                              memory hole is found.</div><div class='del'>- * @kbuf:                       Buffer contents and memory parameters.</div><div class='del'>- *</div><div class='del'>- * Assumes minimum of PAGE_SIZE alignment for kbuf-&gt;memsz &amp; kbuf-&gt;buf_align.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative errno on error.</div><div class='del'>- */</div><div class='del'>-int arch_kexec_locate_mem_hole(struct kexec_buf *kbuf)</div><div class='del'>-{</div><div class='del'>-	struct crash_mem **emem;</div><div class='del'>-	u64 buf_min, buf_max;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Look up the exclude ranges list while locating the memory hole */</div><div class='del'>-	emem = &amp;(kbuf-&gt;image-&gt;arch.exclude_ranges);</div><div class='del'>-	if (!(*emem) || ((*emem)-&gt;nr_ranges == 0)) {</div><div class='del'>-		pr_warn("No exclude range list. Using the default locate mem hole method\n");</div><div class='del'>-		return kexec_locate_mem_hole(kbuf);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buf_min = kbuf-&gt;buf_min;</div><div class='del'>-	buf_max = kbuf-&gt;buf_max;</div><div class='del'>-	/* Segments for kdump kernel should be within crashkernel region */</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRASH_DUMP) &amp;&amp; kbuf-&gt;image-&gt;type == KEXEC_TYPE_CRASH) {</div><div class='del'>-		buf_min = (buf_min &lt; crashk_res.start ?</div><div class='del'>-			   crashk_res.start : buf_min);</div><div class='del'>-		buf_max = (buf_max &gt; crashk_res.end ?</div><div class='del'>-			   crashk_res.end : buf_max);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (buf_min &gt; buf_max) {</div><div class='del'>-		pr_err("Invalid buffer min and/or max values\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (kbuf-&gt;top_down)</div><div class='del'>-		ret = locate_mem_hole_top_down_ppc64(kbuf, buf_min, buf_max,</div><div class='del'>-						     *emem);</div><div class='del'>-	else</div><div class='del'>-		ret = locate_mem_hole_bottom_up_ppc64(kbuf, buf_min, buf_max,</div><div class='del'>-						      *emem);</div><div class='del'>-</div><div class='del'>-	/* Add the buffer allocated to the exclude list for the next lookup */</div><div class='del'>-	if (!ret) {</div><div class='del'>-		add_mem_range(emem, kbuf-&gt;mem, kbuf-&gt;memsz);</div><div class='del'>-		sort_memory_ranges(*emem, true);</div><div class='del'>-	} else {</div><div class='del'>-		pr_err("Failed to locate memory buffer of size %lu\n",</div><div class='del'>-		       kbuf-&gt;memsz);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * arch_kexec_kernel_image_probe - Does additional handling needed to setup</div><div class='ctx'>  *                                 kexec segments.</div><div class='ctx'>  * @image:                         kexec image being loaded.</div><div class='head'>diff --git a/arch/powerpc/kexec/relocate_32.S b/arch/powerpc/kexec/relocate_32.S<br/>index 104c9911f406..dd86e338307d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/relocate_32.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kexec/relocate_32.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kexec/relocate_32.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kexec/relocate_32.S</a></div><div class='hunk'>@@ -348,16 +348,13 @@ write_utlb:</div><div class='ctx'> 	rlwinm	r10, r24, 0, 22, 27</div><div class='ctx'> </div><div class='ctx'> 	cmpwi	r10, PPC47x_TLB0_4K</div><div class='del'>-	bne	0f</div><div class='ctx'> 	li	r10, 0x1000			/* r10 = 4k */</div><div class='del'>-	ANNOTATE_INTRA_FUNCTION_CALL</div><div class='del'>-	bl	1f</div><div class='add'>+	beq	0f</div><div class='ctx'> </div><div class='del'>-0:</div><div class='ctx'> 	/* Defaults to 256M */</div><div class='ctx'> 	lis	r10, 0x1000</div><div class='ctx'> </div><div class='del'>-	bcl	20,31,$+4</div><div class='add'>+0:	bcl	20,31,$+4</div><div class='ctx'> 1:	mflr	r4</div><div class='ctx'> 	addi	r4, r4, (2f-1b)			/* virtual address  of 2f */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig<br/>index dbfdc126bf14..2f2702c867f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/Kconfig</a></div><div class='hunk'>@@ -83,6 +83,7 @@ config KVM_BOOK3S_64_HV</div><div class='ctx'> 	depends on KVM_BOOK3S_64 &amp;&amp; PPC_POWERNV</div><div class='ctx'> 	select KVM_BOOK3S_HV_POSSIBLE</div><div class='ctx'> 	select KVM_GENERIC_MMU_NOTIFIER</div><div class='add'>+	select KVM_BOOK3S_HV_PMU</div><div class='ctx'> 	select CMA</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support running unmodified book3s_64 guest kernels in</div><div class='hunk'>@@ -171,6 +172,18 @@ config KVM_BOOK3S_HV_NESTED_PMU_WORKAROUND</div><div class='ctx'> 	  those buggy L1s which saves the L2 state, at the cost of performance</div><div class='ctx'> 	  in all nested-capable guest entry/exit.</div><div class='ctx'> </div><div class='add'>+config KVM_BOOK3S_HV_PMU</div><div class='add'>+	tristate "Hypervisor Perf events for KVM Book3s-HV"</div><div class='add'>+	depends on KVM_BOOK3S_64_HV</div><div class='add'>+	help</div><div class='add'>+	  Enable Book3s-HV Hypervisor Perf events PMU named 'kvm-hv'. These</div><div class='add'>+	  Perf events give an overview of hypervisor performance overall</div><div class='add'>+	  instead of a specific guests. Currently the PMU reports</div><div class='add'>+	  L0-Hypervisor stats on a kvm-hv enabled PSeries LPAR like:</div><div class='add'>+	  * Total/Used Guest-Heap</div><div class='add'>+	  * Total/Used Guest Page-table Memory</div><div class='add'>+	  * Total amount of Guest Page-table Memory reclaimed</div><div class='add'>+</div><div class='ctx'> config KVM_BOOKE_HV</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c<br/>index ff6c38373957..d79c5d1098c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s.c</a></div><div class='hunk'>@@ -422,7 +422,7 @@ int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);</div><div class='ctx'> </div><div class='ctx'> kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,</div><div class='del'>-			bool *writable)</div><div class='add'>+			    bool *writable, struct page **page)</div><div class='ctx'> {</div><div class='ctx'> 	ulong mp_pa = vcpu-&gt;arch.magic_page_pa &amp; KVM_PAM;</div><div class='ctx'> 	gfn_t gfn = gpa &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -437,13 +437,14 @@ kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,</div><div class='ctx'> 		kvm_pfn_t pfn;</div><div class='ctx'> </div><div class='ctx'> 		pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		get_page(pfn_to_page(pfn));</div><div class='add'>+		*page = pfn_to_page(pfn);</div><div class='add'>+		get_page(*page);</div><div class='ctx'> 		if (writable)</div><div class='ctx'> 			*writable = true;</div><div class='ctx'> 		return pfn;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return gfn_to_pfn_prot(vcpu-&gt;kvm, gfn, writing, writable);</div><div class='add'>+	return kvm_faultin_pfn(vcpu, gfn, writing, writable, page);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_32_mmu_host.c b/arch/powerpc/kvm/book3s_32_mmu_host.c<br/>index 4b3a8d80cfa3..c7e4b62642ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_32_mmu_host.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_32_mmu_host.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_32_mmu_host.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_32_mmu_host.c</a></div><div class='hunk'>@@ -125,11 +125,10 @@ static u32 *kvmppc_mmu_get_pteg(struct kvm_vcpu *vcpu, u32 vsid, u32 eaddr,</div><div class='ctx'> 	return (u32*)pteg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern char etext[];</div><div class='del'>-</div><div class='ctx'> int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,</div><div class='ctx'> 			bool iswrite)</div><div class='ctx'> {</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	kvm_pfn_t hpaddr;</div><div class='ctx'> 	u64 vpn;</div><div class='ctx'> 	u64 vsid;</div><div class='hunk'>@@ -145,7 +144,7 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,</div><div class='ctx'> 	bool writable;</div><div class='ctx'> </div><div class='ctx'> 	/* Get host physical address for gpa */</div><div class='del'>-	hpaddr = kvmppc_gpa_to_pfn(vcpu, orig_pte-&gt;raddr, iswrite, &amp;writable);</div><div class='add'>+	hpaddr = kvmppc_gpa_to_pfn(vcpu, orig_pte-&gt;raddr, iswrite, &amp;writable, &amp;page);</div><div class='ctx'> 	if (is_error_noslot_pfn(hpaddr)) {</div><div class='ctx'> 		printk(KERN_INFO "Couldn't get guest page for gpa %lx!\n",</div><div class='ctx'> 				 orig_pte-&gt;raddr);</div><div class='hunk'>@@ -232,7 +231,7 @@ next_pteg:</div><div class='ctx'> </div><div class='ctx'> 	pte = kvmppc_mmu_hpte_cache_next(vcpu);</div><div class='ctx'> 	if (!pte) {</div><div class='del'>-		kvm_release_pfn_clean(hpaddr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		kvm_release_page_unused(page);</div><div class='ctx'> 		r = -EAGAIN;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -250,7 +249,7 @@ next_pteg:</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_mmu_hpte_cache_map(vcpu, pte);</div><div class='ctx'> </div><div class='del'>-	kvm_release_pfn_clean(hpaddr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	kvm_release_page_clean(page);</div><div class='ctx'> out:</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c<br/>index bc6a381b5346..be20aee6fd7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_host.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_host.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_host.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_64_mmu_host.c</a></div><div class='hunk'>@@ -88,13 +88,14 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,</div><div class='ctx'> 	struct hpte_cache *cpte;</div><div class='ctx'> 	unsigned long gfn = orig_pte-&gt;raddr &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	unsigned long pfn;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	/* used to check for invalidations in progress */</div><div class='ctx'> 	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> </div><div class='ctx'> 	/* Get host physical address for gpa */</div><div class='del'>-	pfn = kvmppc_gpa_to_pfn(vcpu, orig_pte-&gt;raddr, iswrite, &amp;writable);</div><div class='add'>+	pfn = kvmppc_gpa_to_pfn(vcpu, orig_pte-&gt;raddr, iswrite, &amp;writable, &amp;page);</div><div class='ctx'> 	if (is_error_noslot_pfn(pfn)) {</div><div class='ctx'> 		printk(KERN_INFO "Couldn't get guest page for gpa %lx!\n",</div><div class='ctx'> 		       orig_pte-&gt;raddr);</div><div class='hunk'>@@ -121,13 +122,10 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,</div><div class='ctx'> </div><div class='ctx'> 	vpn = hpt_vpn(orig_pte-&gt;eaddr, map-&gt;host_vsid, MMU_SEGSIZE_256M);</div><div class='ctx'> </div><div class='del'>-	kvm_set_pfn_accessed(pfn);</div><div class='ctx'> 	if (!orig_pte-&gt;may_write || !writable)</div><div class='ctx'> 		rflags |= PP_RXRX;</div><div class='del'>-	else {</div><div class='add'>+	else</div><div class='ctx'> 		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='del'>-		kvm_set_pfn_dirty(pfn);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!orig_pte-&gt;may_execute)</div><div class='ctx'> 		rflags |= HPTE_R_N;</div><div class='hunk'>@@ -202,8 +200,10 @@ map_again:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='add'>+	/* FIXME: Don't unconditionally pass unused=false. */</div><div class='add'>+	kvm_release_faultin_page(kvm, page, false,</div><div class='add'>+				 orig_pte-&gt;may_write &amp;&amp; writable);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='ctx'> 	if (cpte)</div><div class='ctx'> 		kvmppc_mmu_hpte_cache_free(cpte);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c<br/>index 1b51b1c4713b..f305395cf26e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></div><div class='hunk'>@@ -603,27 +603,10 @@ int kvmppc_book3s_hv_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	write_ok = writing;</div><div class='ctx'> 	hva = gfn_to_hva_memslot(memslot, gfn);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Do a fast check first, since __gfn_to_pfn_memslot doesn't</div><div class='del'>-	 * do it with !atomic &amp;&amp; !async, which is how we call it.</div><div class='del'>-	 * We always ask for write permission since the common case</div><div class='del'>-	 * is that the page is writable.</div><div class='del'>-	 */</div><div class='del'>-	if (get_user_page_fast_only(hva, FOLL_WRITE, &amp;page)) {</div><div class='del'>-		write_ok = true;</div><div class='del'>-	} else {</div><div class='del'>-		/* Call KVM generic code to do the slow-path check */</div><div class='del'>-		pfn = __gfn_to_pfn_memslot(memslot, gfn, false, false, NULL,</div><div class='del'>-					   writing, &amp;write_ok, NULL);</div><div class='del'>-		if (is_error_noslot_pfn(pfn))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		page = NULL;</div><div class='del'>-		if (pfn_valid(pfn)) {</div><div class='del'>-			page = pfn_to_page(pfn);</div><div class='del'>-			if (PageReserved(page))</div><div class='del'>-				page = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	pfn = __kvm_faultin_pfn(memslot, gfn, writing ? FOLL_WRITE : 0,</div><div class='add'>+				&amp;write_ok, &amp;page);</div><div class='add'>+	if (is_error_noslot_pfn(pfn))</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read the PTE from the process' radix tree and use that</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c<br/>index 408d98f8a514..b3e6e73d6a08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_radix.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_mmu_radix.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_mmu_radix.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_64_mmu_radix.c</a></div><div class='hunk'>@@ -821,7 +821,7 @@ bool kvmppc_hv_handle_set_rc(struct kvm *kvm, bool nested, bool writing,</div><div class='ctx'> int kvmppc_book3s_instantiate_page(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				   unsigned long gpa,</div><div class='ctx'> 				   struct kvm_memory_slot *memslot,</div><div class='del'>-				   bool writing, bool kvm_ro,</div><div class='add'>+				   bool writing,</div><div class='ctx'> 				   pte_t *inserted_pte, unsigned int *levelp)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='hunk'>@@ -829,40 +829,21 @@ int kvmppc_book3s_instantiate_page(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long mmu_seq;</div><div class='ctx'> 	unsigned long hva, gfn = gpa &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	bool upgrade_write = false;</div><div class='del'>-	bool *upgrade_p = &amp;upgrade_write;</div><div class='ctx'> 	pte_t pte, *ptep;</div><div class='ctx'> 	unsigned int shift, level;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool large_enable;</div><div class='add'>+	kvm_pfn_t pfn;</div><div class='ctx'> </div><div class='ctx'> 	/* used to check for invalidations in progress */</div><div class='ctx'> 	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Do a fast check first, since __gfn_to_pfn_memslot doesn't</div><div class='del'>-	 * do it with !atomic &amp;&amp; !async, which is how we call it.</div><div class='del'>-	 * We always ask for write permission since the common case</div><div class='del'>-	 * is that the page is writable.</div><div class='del'>-	 */</div><div class='ctx'> 	hva = gfn_to_hva_memslot(memslot, gfn);</div><div class='del'>-	if (!kvm_ro &amp;&amp; get_user_page_fast_only(hva, FOLL_WRITE, &amp;page)) {</div><div class='del'>-		upgrade_write = true;</div><div class='del'>-	} else {</div><div class='del'>-		unsigned long pfn;</div><div class='del'>-</div><div class='del'>-		/* Call KVM generic code to do the slow-path check */</div><div class='del'>-		pfn = __gfn_to_pfn_memslot(memslot, gfn, false, false, NULL,</div><div class='del'>-					   writing, upgrade_p, NULL);</div><div class='del'>-		if (is_error_noslot_pfn(pfn))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		page = NULL;</div><div class='del'>-		if (pfn_valid(pfn)) {</div><div class='del'>-			page = pfn_to_page(pfn);</div><div class='del'>-			if (PageReserved(page))</div><div class='del'>-				page = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	pfn = __kvm_faultin_pfn(memslot, gfn, writing ? FOLL_WRITE : 0,</div><div class='add'>+				&amp;upgrade_write, &amp;page);</div><div class='add'>+	if (is_error_noslot_pfn(pfn))</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read the PTE from the process' radix tree and use that</div><div class='hunk'>@@ -950,7 +931,6 @@ int kvmppc_book3s_radix_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='ctx'> 	long ret;</div><div class='ctx'> 	bool writing = !!(dsisr &amp; DSISR_ISSTORE);</div><div class='del'>-	bool kvm_ro = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Check for unusual errors */</div><div class='ctx'> 	if (dsisr &amp; DSISR_UNSUPP_MMU) {</div><div class='hunk'>@@ -1003,7 +983,6 @@ int kvmppc_book3s_radix_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					ea, DSISR_ISSTORE | DSISR_PROTFAULT);</div><div class='ctx'> 			return RESUME_GUEST;</div><div class='ctx'> 		}</div><div class='del'>-		kvm_ro = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Failed to set the reference/change bits */</div><div class='hunk'>@@ -1021,7 +1000,7 @@ int kvmppc_book3s_radix_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	/* Try to insert a pte */</div><div class='ctx'> 	ret = kvmppc_book3s_instantiate_page(vcpu, gpa, memslot, writing,</div><div class='del'>-					     kvm_ro, NULL, NULL);</div><div class='add'>+					     NULL, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (ret == 0 || ret == -EAGAIN)</div><div class='ctx'> 		ret = RESUME_GUEST;</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c<br/>index 34c0adb9fdbf..742aa58a7c7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_vio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_64_vio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_64_vio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_64_vio.c</a></div><div class='hunk'>@@ -115,10 +115,9 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 	struct iommu_table_group *table_group;</div><div class='ctx'> 	long i;</div><div class='ctx'> 	struct kvmppc_spapr_tce_iommu_table *stit;</div><div class='del'>-	struct fd f;</div><div class='add'>+	CLASS(fd, f)(tablefd);</div><div class='ctx'> </div><div class='del'>-	f = fdget(tablefd);</div><div class='del'>-	if (!fd_file(f))</div><div class='add'>+	if (fd_empty(f))</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -130,16 +129,12 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='del'>-	if (!found) {</div><div class='del'>-		fdput(f);</div><div class='add'>+	if (!found)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	table_group = iommu_group_get_iommudata(grp);</div><div class='del'>-	if (WARN_ON(!table_group)) {</div><div class='del'>-		fdput(f);</div><div class='add'>+	if (WARN_ON(!table_group))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {</div><div class='ctx'> 		struct iommu_table *tbltmp = table_group-&gt;tables[i];</div><div class='hunk'>@@ -160,10 +155,8 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (!tbl) {</div><div class='del'>-		fdput(f);</div><div class='add'>+	if (!tbl)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	list_for_each_entry_rcu(stit, &amp;stt-&gt;iommu_tables, next) {</div><div class='hunk'>@@ -174,7 +167,6 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 			/* stit is being destroyed */</div><div class='ctx'> 			iommu_tce_table_put(tbl);</div><div class='ctx'> 			rcu_read_unlock();</div><div class='del'>-			fdput(f);</div><div class='ctx'> 			return -ENOTTY;</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -182,7 +174,6 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 		 * its KVM reference counter and can return.</div><div class='ctx'> 		 */</div><div class='ctx'> 		rcu_read_unlock();</div><div class='del'>-		fdput(f);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='hunk'>@@ -190,7 +181,6 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> 	stit = kzalloc(sizeof(*stit), GFP_KERNEL);</div><div class='ctx'> 	if (!stit) {</div><div class='ctx'> 		iommu_tce_table_put(tbl);</div><div class='del'>-		fdput(f);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -199,7 +189,6 @@ long kvm_spapr_tce_attach_iommu_group(struct kvm *kvm, int tablefd,</div><div class='ctx'> </div><div class='ctx'> 	list_add_rcu(&amp;stit-&gt;next, &amp;stt-&gt;iommu_tables);</div><div class='ctx'> </div><div class='del'>-	fdput(f);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c<br/>index ba0492f9de65..7667563fb9ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_hv.c</a></div><div class='hunk'>@@ -400,7 +400,10 @@ static inline unsigned long map_pcr_to_cap(unsigned long pcr)</div><div class='ctx'> 		cap = H_GUEST_CAP_POWER9;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PCR_ARCH_31:</div><div class='del'>-		cap = H_GUEST_CAP_POWER10;</div><div class='add'>+		if (cpu_has_feature(CPU_FTR_P11_PVR))</div><div class='add'>+			cap = H_GUEST_CAP_POWER11;</div><div class='add'>+		else</div><div class='add'>+			cap = H_GUEST_CAP_POWER10;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -415,7 +418,7 @@ static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)</div><div class='ctx'> 	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='ctx'> </div><div class='ctx'> 	/* We can (emulate) our own architecture version and anything older */</div><div class='del'>-	if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='add'>+	if (cpu_has_feature(CPU_FTR_P11_PVR) || cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='ctx'> 		host_pcr_bit = PCR_ARCH_31;</div><div class='ctx'> 	else if (cpu_has_feature(CPU_FTR_ARCH_300))</div><div class='ctx'> 		host_pcr_bit = PCR_ARCH_300;</div><div class='hunk'>@@ -2060,36 +2063,9 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		fallthrough; /* go to facility unavailable handler */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: {</div><div class='del'>-		u64 cause = vcpu-&gt;arch.hfscr &gt;&gt; 56;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Only pass HFU interrupts to the L1 if the facility is</div><div class='del'>-		 * permitted but disabled by the L1's HFSCR, otherwise</div><div class='del'>-		 * the interrupt does not make sense to the L1 so turn</div><div class='del'>-		 * it into a HEAI.</div><div class='del'>-		 */</div><div class='del'>-		if (!(vcpu-&gt;arch.hfscr_permitted &amp; (1UL &lt;&lt; cause)) ||</div><div class='del'>-				(vcpu-&gt;arch.nested_hfscr &amp; (1UL &lt;&lt; cause))) {</div><div class='del'>-			ppc_inst_t pinst;</div><div class='del'>-			vcpu-&gt;arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * If the fetch failed, return to guest and</div><div class='del'>-			 * try executing it again.</div><div class='del'>-			 */</div><div class='del'>-			r = kvmppc_get_last_inst(vcpu, INST_GENERIC, &amp;pinst);</div><div class='del'>-			vcpu-&gt;arch.emul_inst = ppc_inst_val(pinst);</div><div class='del'>-			if (r != EMULATE_DONE)</div><div class='del'>-				r = RESUME_GUEST;</div><div class='del'>-			else</div><div class='del'>-				r = RESUME_HOST;</div><div class='del'>-		} else {</div><div class='del'>-			r = RESUME_HOST;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:</div><div class='add'>+		r = RESUME_HOST;</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	case BOOK3S_INTERRUPT_HV_RM_HARD:</div><div class='ctx'> 		vcpu-&gt;arch.trap = 0;</div><div class='hunk'>@@ -4153,8 +4129,9 @@ void kvmhv_set_l2_counters_status(int cpu, bool status)</div><div class='ctx'> 	else</div><div class='ctx'> 		lppaca_of(cpu).l2_counters_enable = 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(kvmhv_set_l2_counters_status);</div><div class='ctx'> </div><div class='del'>-int kmvhv_counters_tracepoint_regfunc(void)</div><div class='add'>+int kvmhv_counters_tracepoint_regfunc(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -4164,7 +4141,7 @@ int kmvhv_counters_tracepoint_regfunc(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kmvhv_counters_tracepoint_unregfunc(void)</div><div class='add'>+void kvmhv_counters_tracepoint_unregfunc(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -4190,7 +4167,73 @@ static void do_trace_nested_cs_time(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	*l1_to_l2_cs_ptr = l1_to_l2_ns;</div><div class='ctx'> 	*l2_to_l1_cs_ptr = l2_to_l1_ns;</div><div class='ctx'> 	*l2_runtime_agg_ptr = l2_runtime_ns;</div><div class='add'>+	vcpu-&gt;arch.l1_to_l2_cs = l1_to_l2_ns;</div><div class='add'>+	vcpu-&gt;arch.l2_to_l1_cs = l2_to_l1_ns;</div><div class='add'>+	vcpu-&gt;arch.l2_runtime_agg = l2_runtime_ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l1_to_l2_cs_time(void)</div><div class='add'>+{</div><div class='add'>+	return tb_to_ns(be64_to_cpu(get_lppaca()-&gt;l1_to_l2_cs_tb));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l1_to_l2_cs_time);</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l2_to_l1_cs_time(void)</div><div class='add'>+{</div><div class='add'>+	return tb_to_ns(be64_to_cpu(get_lppaca()-&gt;l2_to_l1_cs_tb));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l2_to_l1_cs_time);</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l2_runtime_agg(void)</div><div class='add'>+{</div><div class='add'>+	return tb_to_ns(be64_to_cpu(get_lppaca()-&gt;l2_runtime_tb));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l2_runtime_agg);</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l1_to_l2_cs_time_vcpu(void)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	struct kvm_vcpu_arch *arch;</div><div class='add'>+</div><div class='add'>+	vcpu = local_paca-&gt;kvm_hstate.kvm_vcpu;</div><div class='add'>+	if (vcpu) {</div><div class='add'>+		arch = &amp;vcpu-&gt;arch;</div><div class='add'>+		return arch-&gt;l1_to_l2_cs;</div><div class='add'>+	} else {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l1_to_l2_cs_time_vcpu);</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l2_to_l1_cs_time_vcpu(void)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	struct kvm_vcpu_arch *arch;</div><div class='add'>+</div><div class='add'>+	vcpu = local_paca-&gt;kvm_hstate.kvm_vcpu;</div><div class='add'>+	if (vcpu) {</div><div class='add'>+		arch = &amp;vcpu-&gt;arch;</div><div class='add'>+		return arch-&gt;l2_to_l1_cs;</div><div class='add'>+	} else {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l2_to_l1_cs_time_vcpu);</div><div class='add'>+</div><div class='add'>+u64 kvmhv_get_l2_runtime_agg_vcpu(void)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	struct kvm_vcpu_arch *arch;</div><div class='add'>+</div><div class='add'>+	vcpu = local_paca-&gt;kvm_hstate.kvm_vcpu;</div><div class='add'>+	if (vcpu) {</div><div class='add'>+		arch = &amp;vcpu-&gt;arch;</div><div class='add'>+		return arch-&gt;l2_runtime_agg;</div><div class='add'>+	} else {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(kvmhv_get_l2_runtime_agg_vcpu);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> int kvmhv_get_l2_counters_status(void)</div><div class='hunk'>@@ -4310,6 +4353,15 @@ static int kvmhv_vcpu_entry_p9_nested(struct kvm_vcpu *vcpu, u64 time_limit, uns</div><div class='ctx'> 	hvregs.hdec_expiry = time_limit;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * hvregs has the doorbell status, so zero it here which</div><div class='add'>+	 * enables us to receive doorbells when H_ENTER_NESTED is</div><div class='add'>+	 * in progress for this vCPU</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;arch.doorbell_request)</div><div class='add'>+		vcpu-&gt;arch.doorbell_request = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * When setting DEC, we must always deal with irq_work_raise</div><div class='ctx'> 	 * via NMI vs setting DEC. The problem occurs right as we</div><div class='ctx'> 	 * switch into guest mode if a NMI hits and sets pending work</div><div class='hunk'>@@ -4898,9 +4950,20 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,</div><div class='ctx'> 							   BOOK3S_INTERRUPT_EXTERNAL, 0);</div><div class='ctx'> 			else</div><div class='ctx'> 				lpcr |= LPCR_MER;</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * L1's copy of L2's LPCR (vcpu-&gt;arch.vcore-&gt;lpcr) can get its MER bit</div><div class='add'>+			 * unexpectedly set - for e.g. during NMI handling when all register</div><div class='add'>+			 * states are synchronized from L0 to L1. L1 needs to inform L0 about</div><div class='add'>+			 * MER=1 only when there are pending external interrupts.</div><div class='add'>+			 * In the above if check, MER bit is set if there are pending</div><div class='add'>+			 * external interrupts. Hence, explicitly mask off MER bit</div><div class='add'>+			 * here as otherwise it may generate spurious interrupts in L2 KVM</div><div class='add'>+			 * causing an endless loop, which results in L2 guest getting hung.</div><div class='add'>+			 */</div><div class='add'>+			lpcr &amp;= ~LPCR_MER;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (vcpu-&gt;arch.pending_exceptions ||</div><div class='del'>-		   vcpu-&gt;arch.doorbell_request ||</div><div class='ctx'> 		   xive_interrupt_pending(vcpu)) {</div><div class='ctx'> 		vcpu-&gt;arch.ret = RESUME_HOST;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -5978,7 +6041,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)</div><div class='ctx'> 	 * the underlying calls, which will EOI the interrupt in real</div><div class='ctx'> 	 * mode, need an HW IRQ number mapped in the XICS IRQ domain.</div><div class='ctx'> 	 */</div><div class='del'>-	host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq);</div><div class='add'>+	host_data = irq_domain_get_irq_data(irq_get_default_domain(), host_irq);</div><div class='ctx'> 	irq_map-&gt;r_hwirq = (unsigned int)irqd_to_hwirq(host_data);</div><div class='ctx'> </div><div class='ctx'> 	if (i == pimap-&gt;n_mapped)</div><div class='hunk'>@@ -6478,10 +6541,6 @@ static struct kvmppc_ops kvm_ops_hv = {</div><div class='ctx'> 	.fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,</div><div class='ctx'> 	.arch_vm_ioctl  = kvm_arch_vm_ioctl_hv,</div><div class='ctx'> 	.hcall_implemented = kvmppc_hcall_impl_hv,</div><div class='del'>-#ifdef CONFIG_KVM_XICS</div><div class='del'>-	.irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,</div><div class='del'>-	.irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,</div><div class='del'>-#endif</div><div class='ctx'> 	.configure_mmu = kvmhv_configure_mmu,</div><div class='ctx'> 	.get_rmmu_info = kvmhv_get_rmmu_info,</div><div class='ctx'> 	.set_smt_mode = kvmhv_set_smt_mode,</div><div class='hunk'>@@ -6599,6 +6658,22 @@ static int kvmppc_book3s_init_hv(void)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_KVM_XICS)</div><div class='add'>+	/*</div><div class='add'>+	 * IRQ bypass is supported only for interrupts whose EOI operations are</div><div class='add'>+	 * handled via OPAL calls. Therefore, register IRQ bypass handlers</div><div class='add'>+	 * exclusively for PowerNV KVM when booted with 'xive=off', indicating</div><div class='add'>+	 * the use of the emulated XICS interrupt controller.</div><div class='add'>+	 */</div><div class='add'>+	if (!kvmhv_on_pseries()) {</div><div class='add'>+		pr_info("KVM-HV: Enabling IRQ bypass\n");</div><div class='add'>+		kvm_ops_hv.irq_bypass_add_producer =</div><div class='add'>+			kvmppc_irq_bypass_add_producer_hv;</div><div class='add'>+		kvm_ops_hv.irq_bypass_del_producer =</div><div class='add'>+			kvmppc_irq_bypass_del_producer_hv;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	kvm_ops_hv.owner = THIS_MODULE;</div><div class='ctx'> 	kvmppc_hv_ops = &amp;kvm_ops_hv;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c<br/>index 05f5220960c6..5f8c2321cfb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_nested.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_nested.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_nested.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_hv_nested.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr)</div><div class='ctx'> 	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='ctx'> </div><div class='ctx'> 	hr-&gt;pcr = vc-&gt;pcr | PCR_MASK;</div><div class='del'>-	hr-&gt;dpdes = vc-&gt;dpdes;</div><div class='add'>+	hr-&gt;dpdes = vcpu-&gt;arch.doorbell_request;</div><div class='ctx'> 	hr-&gt;hfscr = vcpu-&gt;arch.hfscr;</div><div class='ctx'> 	hr-&gt;tb_offset = vc-&gt;tb_offset;</div><div class='ctx'> 	hr-&gt;dawr0 = vcpu-&gt;arch.dawr0;</div><div class='hunk'>@@ -105,7 +105,7 @@ static void save_hv_return_state(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='ctx'> </div><div class='del'>-	hr-&gt;dpdes = vc-&gt;dpdes;</div><div class='add'>+	hr-&gt;dpdes = vcpu-&gt;arch.doorbell_request;</div><div class='ctx'> 	hr-&gt;purr = vcpu-&gt;arch.purr;</div><div class='ctx'> 	hr-&gt;spurr = vcpu-&gt;arch.spurr;</div><div class='ctx'> 	hr-&gt;ic = vcpu-&gt;arch.ic;</div><div class='hunk'>@@ -143,7 +143,7 @@ static void restore_hv_regs(struct kvm_vcpu *vcpu, const struct hv_guest_state *</div><div class='ctx'> 	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='ctx'> </div><div class='ctx'> 	vc-&gt;pcr = hr-&gt;pcr | PCR_MASK;</div><div class='del'>-	vc-&gt;dpdes = hr-&gt;dpdes;</div><div class='add'>+	vcpu-&gt;arch.doorbell_request = hr-&gt;dpdes;</div><div class='ctx'> 	vcpu-&gt;arch.hfscr = hr-&gt;hfscr;</div><div class='ctx'> 	vcpu-&gt;arch.dawr0 = hr-&gt;dawr0;</div><div class='ctx'> 	vcpu-&gt;arch.dawrx0 = hr-&gt;dawrx0;</div><div class='hunk'>@@ -170,7 +170,13 @@ void kvmhv_restore_hv_return_state(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='ctx'> </div><div class='del'>-	vc-&gt;dpdes = hr-&gt;dpdes;</div><div class='add'>+	/*</div><div class='add'>+	 * This L2 vCPU might have received a doorbell while H_ENTER_NESTED was being handled.</div><div class='add'>+	 * Make sure we preserve the doorbell if it was either:</div><div class='add'>+	 *   a) Sent after H_ENTER_NESTED was called on this vCPU (arch.doorbell_request would be 1)</div><div class='add'>+	 *   b) Doorbell was not handled and L2 exited for some other reason (hr-&gt;dpdes would be 1)</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;arch.doorbell_request = vcpu-&gt;arch.doorbell_request | hr-&gt;dpdes;</div><div class='ctx'> 	vcpu-&gt;arch.hfscr = hr-&gt;hfscr;</div><div class='ctx'> 	vcpu-&gt;arch.purr = hr-&gt;purr;</div><div class='ctx'> 	vcpu-&gt;arch.spurr = hr-&gt;spurr;</div><div class='hunk'>@@ -445,6 +451,8 @@ long kvmhv_nested_init(void)</div><div class='ctx'> 	if (rc == H_SUCCESS) {</div><div class='ctx'> 		unsigned long capabilities = 0;</div><div class='ctx'> </div><div class='add'>+		if (cpu_has_feature(CPU_FTR_P11_PVR))</div><div class='add'>+			capabilities |= H_GUEST_CAP_POWER11;</div><div class='ctx'> 		if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='ctx'> 			capabilities |= H_GUEST_CAP_POWER10;</div><div class='ctx'> 		if (cpu_has_feature(CPU_FTR_ARCH_300))</div><div class='hunk'>@@ -1527,7 +1535,6 @@ static long int __kvmhv_nested_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long n_gpa, gpa, gfn, perm = 0UL;</div><div class='ctx'> 	unsigned int shift, l1_shift, level;</div><div class='ctx'> 	bool writing = !!(dsisr &amp; DSISR_ISSTORE);</div><div class='del'>-	bool kvm_ro = false;</div><div class='ctx'> 	long int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!gp-&gt;l1_gr_to_hr) {</div><div class='hunk'>@@ -1607,7 +1614,6 @@ static long int __kvmhv_nested_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					ea, DSISR_ISSTORE | DSISR_PROTFAULT);</div><div class='ctx'> 			return RESUME_GUEST;</div><div class='ctx'> 		}</div><div class='del'>-		kvm_ro = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 2. Find the host pte for this L1 guest real address */</div><div class='hunk'>@@ -1629,7 +1635,7 @@ static long int __kvmhv_nested_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (!pte_present(pte) || (writing &amp;&amp; !(pte_val(pte) &amp; _PAGE_WRITE))) {</div><div class='ctx'> 		/* No suitable pte found -&gt; try to insert a mapping */</div><div class='ctx'> 		ret = kvmppc_book3s_instantiate_page(vcpu, gpa, memslot,</div><div class='del'>-					writing, kvm_ro, &amp;pte, &amp;level);</div><div class='add'>+					writing, &amp;pte, &amp;level);</div><div class='ctx'> 		if (ret == -EAGAIN)</div><div class='ctx'> 			return RESUME_GUEST;</div><div class='ctx'> 		else if (ret)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_nestedv2.c b/arch/powerpc/kvm/book3s_hv_nestedv2.c<br/>index eeecea8f202b..87691cf86cae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_nestedv2.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_nestedv2.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a></div><div class='hunk'>@@ -123,6 +123,12 @@ static size_t gs_msg_ops_vcpu_get_size(struct kvmppc_gs_msg *gsm)</div><div class='ctx'> 		case KVMPPC_GSID_PROCESS_TABLE:</div><div class='ctx'> 		case KVMPPC_GSID_RUN_INPUT:</div><div class='ctx'> 		case KVMPPC_GSID_RUN_OUTPUT:</div><div class='add'>+		  /* Host wide counters */</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP_MAX:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM:</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			size += kvmppc_gse_total_size(kvmppc_gsid_size(iden));</div><div class='hunk'>@@ -370,7 +376,9 @@ static int gs_msg_ops_vcpu_fill_info(struct kvmppc_gs_buff *gsb,</div><div class='ctx'> 			 * default to L1's PVR.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!vcpu-&gt;arch.vcore-&gt;arch_compat) {</div><div class='del'>-				if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='add'>+				if (cpu_has_feature(CPU_FTR_P11_PVR))</div><div class='add'>+					arch_compat = PVR_ARCH_31_P11;</div><div class='add'>+				else if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='ctx'> 					arch_compat = PVR_ARCH_31;</div><div class='ctx'> 				else if (cpu_has_feature(CPU_FTR_ARCH_300))</div><div class='ctx'> 					arch_compat = PVR_ARCH_300;</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S<br/>index ea7ad200b330..83f7504349d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></div><div class='hunk'>@@ -1524,14 +1524,12 @@ kvm_flush_link_stack:</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the link stack. On Power8 it's up to 32 entries in size. */</div><div class='ctx'> 	.rept 32</div><div class='del'>-	ANNOTATE_INTRA_FUNCTION_CALL</div><div class='ctx'> 	bl	.+4</div><div class='ctx'> 	.endr</div><div class='ctx'> </div><div class='ctx'> 	/* And on Power9 it's up to 64. */</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	.rept 32</div><div class='del'>-	ANNOTATE_INTRA_FUNCTION_CALL</div><div class='ctx'> 	bl	.+4</div><div class='ctx'> 	.endr</div><div class='ctx'> END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_uvmem.c b/arch/powerpc/kvm/book3s_hv_uvmem.c<br/>index 92f33115144b..03f8c34fa0a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_uvmem.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_hv_uvmem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_hv_uvmem.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_hv_uvmem.c</a></div><div class='hunk'>@@ -393,7 +393,7 @@ static int kvmppc_memslot_page_merge(struct kvm *kvm,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long gfn = memslot-&gt;base_gfn;</div><div class='ctx'> 	unsigned long end, start = gfn_to_hva(kvm, gfn);</div><div class='del'>-	unsigned long vm_flags;</div><div class='add'>+	vm_flags_t vm_flags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> 	int merge_flag = (merge) ? MADV_MERGEABLE : MADV_UNMERGEABLE;</div><div class='hunk'>@@ -879,9 +879,8 @@ static unsigned long kvmppc_share_page(struct kvm *kvm, unsigned long gpa,</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	int ret = H_PARAMETER;</div><div class='del'>-	struct page *uvmem_page;</div><div class='add'>+	struct page *page, *uvmem_page;</div><div class='ctx'> 	struct kvmppc_uvmem_page_pvt *pvt;</div><div class='del'>-	unsigned long pfn;</div><div class='ctx'> 	unsigned long gfn = gpa &gt;&gt; page_shift;</div><div class='ctx'> 	int srcu_idx;</div><div class='ctx'> 	unsigned long uvmem_pfn;</div><div class='hunk'>@@ -901,8 +900,8 @@ static unsigned long kvmppc_share_page(struct kvm *kvm, unsigned long gpa,</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.uvmem_lock);</div><div class='del'>-	pfn = gfn_to_pfn(kvm, gfn);</div><div class='del'>-	if (is_error_noslot_pfn(pfn))</div><div class='add'>+	page = gfn_to_page(kvm, gfn);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.uvmem_lock);</div><div class='hunk'>@@ -911,16 +910,16 @@ retry:</div><div class='ctx'> 		pvt = uvmem_page-&gt;zone_device_data;</div><div class='ctx'> 		pvt-&gt;skip_page_out = true;</div><div class='ctx'> 		pvt-&gt;remove_gfn = false; /* it continues to be a valid GFN */</div><div class='del'>-		kvm_release_pfn_clean(pfn);</div><div class='add'>+		kvm_release_page_unused(page);</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!uv_page_in(kvm-&gt;arch.lpid, pfn &lt;&lt; page_shift, gpa, 0,</div><div class='add'>+	if (!uv_page_in(kvm-&gt;arch.lpid, page_to_pfn(page) &lt;&lt; page_shift, gpa, 0,</div><div class='ctx'> 				page_shift)) {</div><div class='ctx'> 		kvmppc_gfn_shared(gfn, kvm);</div><div class='ctx'> 		ret = H_SUCCESS;</div><div class='ctx'> 	}</div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='add'>+	kvm_release_page_clean(page);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.uvmem_lock);</div><div class='ctx'> out:</div><div class='ctx'> 	srcu_read_unlock(&amp;kvm-&gt;srcu, srcu_idx);</div><div class='hunk'>@@ -1083,21 +1082,21 @@ out:</div><div class='ctx'> </div><div class='ctx'> int kvmppc_send_page_to_uv(struct kvm *kvm, unsigned long gfn)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pfn;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	int ret = U_SUCCESS;</div><div class='ctx'> </div><div class='del'>-	pfn = gfn_to_pfn(kvm, gfn);</div><div class='del'>-	if (is_error_noslot_pfn(pfn))</div><div class='add'>+	page = gfn_to_page(kvm, gfn);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;arch.uvmem_lock);</div><div class='ctx'> 	if (kvmppc_gfn_is_uvmem_pfn(gfn, kvm, NULL))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = uv_page_in(kvm-&gt;arch.lpid, pfn &lt;&lt; PAGE_SHIFT, gfn &lt;&lt; PAGE_SHIFT,</div><div class='del'>-			 0, PAGE_SHIFT);</div><div class='add'>+	ret = uv_page_in(kvm-&gt;arch.lpid, page_to_pfn(page) &lt;&lt; PAGE_SHIFT,</div><div class='add'>+			 gfn &lt;&lt; PAGE_SHIFT, 0, PAGE_SHIFT);</div><div class='ctx'> out:</div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='add'>+	kvm_release_page_clean(page);</div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.uvmem_lock);</div><div class='ctx'> 	return (ret == U_SUCCESS) ? RESUME_GUEST : -EFAULT;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_mmu_hpte.c b/arch/powerpc/kvm/book3s_mmu_hpte.c<br/>index ce79ac33e8d3..d904e13e069b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_mmu_hpte.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_mmu_hpte.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_mmu_hpte.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_mmu_hpte.c</a></div><div class='hunk'>@@ -92,12 +92,6 @@ void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte)</div><div class='ctx'> 	spin_unlock(&amp;vcpu3s-&gt;mmu_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void free_pte_rcu(struct rcu_head *head)</div><div class='del'>-{</div><div class='del'>-	struct hpte_cache *pte = container_of(head, struct hpte_cache, rcu_head);</div><div class='del'>-	kmem_cache_free(hpte_cache, pte);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);</div><div class='hunk'>@@ -126,7 +120,7 @@ static void invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;vcpu3s-&gt;mmu_lock);</div><div class='ctx'> </div><div class='del'>-	call_rcu(&amp;pte-&gt;rcu_head, free_pte_rcu);</div><div class='add'>+	kfree_rcu(pte, rcu_head);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvmppc_mmu_pte_flush_all(struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c<br/>index 7b8ae509328f..83bcdc80ce51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_pr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_pr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_pr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_pr.c</a></div><div class='hunk'>@@ -639,29 +639,27 @@ static void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)</div><div class='ctx'>  */</div><div class='ctx'> static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)</div><div class='ctx'> {</div><div class='del'>-	struct page *hpage;</div><div class='add'>+	struct kvm_host_map map;</div><div class='ctx'> 	u64 hpage_offset;</div><div class='ctx'> 	u32 *page;</div><div class='del'>-	int i;</div><div class='add'>+	int i, r;</div><div class='ctx'> </div><div class='del'>-	hpage = gfn_to_page(vcpu-&gt;kvm, pte-&gt;raddr &gt;&gt; PAGE_SHIFT);</div><div class='del'>-	if (is_error_page(hpage))</div><div class='add'>+	r = kvm_vcpu_map(vcpu, pte-&gt;raddr &gt;&gt; PAGE_SHIFT, &amp;map);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	hpage_offset = pte-&gt;raddr &amp; ~PAGE_MASK;</div><div class='ctx'> 	hpage_offset &amp;= ~0xFFFULL;</div><div class='ctx'> 	hpage_offset /= 4;</div><div class='ctx'> </div><div class='del'>-	get_page(hpage);</div><div class='del'>-	page = kmap_atomic(hpage);</div><div class='add'>+	page = map.hva;</div><div class='ctx'> </div><div class='ctx'> 	/* patch dcbz into reserved instruction, so we trap */</div><div class='ctx'> 	for (i=hpage_offset; i &lt; hpage_offset + (HW_PAGE_SIZE / 4); i++)</div><div class='ctx'> 		if ((be32_to_cpu(page[i]) &amp; 0xff0007ff) == INS_DCBZ)</div><div class='ctx'> 			page[i] &amp;= cpu_to_be32(0xfffffff7);</div><div class='ctx'> </div><div class='del'>-	kunmap_atomic(page);</div><div class='del'>-	put_page(hpage);</div><div class='add'>+	kvm_vcpu_unmap(vcpu, &amp;map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_xive.c b/arch/powerpc/kvm/book3s_xive.c<br/>index 1362c672387e..1302b5ac5672 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_xive.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_xive.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_xive.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_xive.c</a></div><div class='hunk'>@@ -1555,7 +1555,7 @@ int kvmppc_xive_set_mapped(struct kvm *kvm, unsigned long guest_irq,</div><div class='ctx'> 	struct kvmppc_xive_src_block *sb;</div><div class='ctx'> 	struct kvmppc_xive_irq_state *state;</div><div class='ctx'> 	struct irq_data *host_data =</div><div class='del'>-		irq_domain_get_irq_data(irq_get_default_host(), host_irq);</div><div class='add'>+		irq_domain_get_irq_data(irq_get_default_domain(), host_irq);</div><div class='ctx'> 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(host_data);</div><div class='ctx'> 	u16 idx;</div><div class='ctx'> 	u8 prio;</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_xive_native.c b/arch/powerpc/kvm/book3s_xive_native.c<br/>index 6e2ebbd8aaac..d9bf1bc3ff61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_xive_native.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/book3s_xive_native.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/book3s_xive_native.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/book3s_xive_native.c</a></div><div class='hunk'>@@ -654,7 +654,7 @@ static int kvmppc_xive_native_set_queue_config(struct kvmppc_xive *xive,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	page = gfn_to_page(kvm, gfn);</div><div class='del'>-	if (is_error_page(page)) {</div><div class='add'>+	if (!page) {</div><div class='ctx'> 		srcu_read_unlock(&amp;kvm-&gt;srcu, srcu_idx);</div><div class='ctx'> 		pr_err("Couldn't get queue page %llx!\n", kvm_eq.qaddr);</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c<br/>index 6a5be025a8af..3401b96be475 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/booke.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/booke.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/booke.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/booke.c</a></div><div class='hunk'>@@ -572,7 +572,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Return the number of jiffies until the next timeout.  If the timeout is</div><div class='del'>- * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA</div><div class='add'>+ * longer than the TIMER_NEXT_MAX_DELTA, then return TIMER_NEXT_MAX_DELTA</div><div class='ctx'>  * because the larger value can break the timer APIs.</div><div class='ctx'>  */</div><div class='ctx'> static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -598,7 +598,7 @@ static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (do_div(nr_jiffies, tb_ticks_per_jiffy))</div><div class='ctx'> 		nr_jiffies++;</div><div class='ctx'> </div><div class='del'>-	return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);</div><div class='add'>+	return min_t(unsigned long long, nr_jiffies, TIMER_NEXT_MAX_DELTA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void arm_next_watchdog(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -616,19 +616,19 @@ static void arm_next_watchdog(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	spin_lock_irqsave(&amp;vcpu-&gt;arch.wdt_lock, flags);</div><div class='ctx'> 	nr_jiffies = watchdog_next_timeout(vcpu);</div><div class='ctx'> 	/*</div><div class='del'>-	 * If the number of jiffies of watchdog timer &gt;= NEXT_TIMER_MAX_DELTA</div><div class='add'>+	 * If the number of jiffies of watchdog timer &gt;= TIMER_NEXT_MAX_DELTA</div><div class='ctx'> 	 * then do not run the watchdog timer as this can break timer APIs.</div><div class='ctx'> 	 */</div><div class='del'>-	if (nr_jiffies &lt; NEXT_TIMER_MAX_DELTA)</div><div class='add'>+	if (nr_jiffies &lt; TIMER_NEXT_MAX_DELTA)</div><div class='ctx'> 		mod_timer(&amp;vcpu-&gt;arch.wdt_timer, jiffies + nr_jiffies);</div><div class='ctx'> 	else</div><div class='del'>-		del_timer(&amp;vcpu-&gt;arch.wdt_timer);</div><div class='add'>+		timer_delete(&amp;vcpu-&gt;arch.wdt_timer);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;vcpu-&gt;arch.wdt_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvmppc_watchdog_func(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);</div><div class='add'>+	struct kvm_vcpu *vcpu = timer_container_of(vcpu, t, arch.wdt_timer);</div><div class='ctx'> 	u32 tsr, new_tsr;</div><div class='ctx'> 	int final;</div><div class='ctx'> </div><div class='hunk'>@@ -1441,7 +1441,7 @@ int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;vcpu-&gt;arch.wdt_timer);</div><div class='add'>+	timer_delete_sync(&amp;vcpu-&gt;arch.wdt_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)</div><div class='head'>diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h<br/>index 6d0d329cbb35..f9acf866c709 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/e500.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/e500.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/e500.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/e500.h</a></div><div class='hunk'>@@ -34,6 +34,8 @@ enum vcpu_ftr {</div><div class='ctx'> #define E500_TLB_BITMAP		(1 &lt;&lt; 30)</div><div class='ctx'> /* TLB1 entry is mapped by host TLB0 */</div><div class='ctx'> #define E500_TLB_TLB0		(1 &lt;&lt; 29)</div><div class='add'>+/* entry is writable on the host */</div><div class='add'>+#define E500_TLB_WRITABLE	(1 &lt;&lt; 28)</div><div class='ctx'> /* bits [6-5] MAS2_X1 and MAS2_X0 and [4-0] bits for WIMGE */</div><div class='ctx'> #define E500_TLB_MAS2_ATTR	(0x7f)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c<br/>index c664fdec75b1..06caf8bbbe2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/e500_mmu_host.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/e500_mmu_host.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/e500_mmu_host.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/e500_mmu_host.c</a></div><div class='hunk'>@@ -45,11 +45,14 @@ static inline unsigned int tlb1_max_shadow_size(void)</div><div class='ctx'> 	return host_tlb_params[1].entries - tlbcam_index - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)</div><div class='add'>+static inline u32 e500_shadow_mas3_attrib(u32 mas3, bool writable, int usermode)</div><div class='ctx'> {</div><div class='ctx'> 	/* Mask off reserved bits. */</div><div class='ctx'> 	mas3 &amp;= MAS3_ATTRIB_MASK;</div><div class='ctx'> </div><div class='add'>+	if (!writable)</div><div class='add'>+		mas3 &amp;= ~(MAS3_UW|MAS3_SW);</div><div class='add'>+</div><div class='ctx'> #ifndef CONFIG_KVM_BOOKE_HV</div><div class='ctx'> 	if (!usermode) {</div><div class='ctx'> 		/* Guest is in supervisor mode,</div><div class='hunk'>@@ -244,19 +247,16 @@ static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='ctx'> </div><div class='ctx'> static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,</div><div class='ctx'> 					 struct kvm_book3e_206_tlb_entry *gtlbe,</div><div class='del'>-					 kvm_pfn_t pfn, unsigned int wimg)</div><div class='add'>+					 kvm_pfn_t pfn, unsigned int wimg,</div><div class='add'>+					 bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	ref-&gt;pfn = pfn;</div><div class='ctx'> 	ref-&gt;flags = E500_TLB_VALID;</div><div class='add'>+	if (writable)</div><div class='add'>+		ref-&gt;flags |= E500_TLB_WRITABLE;</div><div class='ctx'> </div><div class='ctx'> 	/* Use guest supplied MAS2_G and MAS2_E */</div><div class='ctx'> 	ref-&gt;flags |= (gtlbe-&gt;mas2 &amp; MAS2_ATTRIB_MASK) | wimg;</div><div class='del'>-</div><div class='del'>-	/* Mark the page accessed */</div><div class='del'>-	kvm_set_pfn_accessed(pfn);</div><div class='del'>-</div><div class='del'>-	if (tlbe_is_writable(gtlbe))</div><div class='del'>-		kvm_set_pfn_dirty(pfn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)</div><div class='hunk'>@@ -309,6 +309,7 @@ static void kvmppc_e500_setup_stlbe(</div><div class='ctx'> {</div><div class='ctx'> 	kvm_pfn_t pfn = ref-&gt;pfn;</div><div class='ctx'> 	u32 pr = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR;</div><div class='add'>+	bool writable = !!(ref-&gt;flags &amp; E500_TLB_WRITABLE);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!(ref-&gt;flags &amp; E500_TLB_VALID));</div><div class='ctx'> </div><div class='hunk'>@@ -316,7 +317,7 @@ static void kvmppc_e500_setup_stlbe(</div><div class='ctx'> 	stlbe-&gt;mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;</div><div class='ctx'> 	stlbe-&gt;mas2 = (gvaddr &amp; MAS2_EPN) | (ref-&gt;flags &amp; E500_TLB_MAS2_ATTR);</div><div class='ctx'> 	stlbe-&gt;mas7_3 = ((u64)pfn &lt;&lt; PAGE_SHIFT) |</div><div class='del'>-			e500_shadow_mas3_attrib(gtlbe-&gt;mas7_3, pr);</div><div class='add'>+			e500_shadow_mas3_attrib(gtlbe-&gt;mas7_3, writable, pr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='hunk'>@@ -325,18 +326,19 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	struct tlbe_ref *ref)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='del'>-	unsigned long pfn = 0; /* silence GCC warning */</div><div class='add'>+	unsigned int psize;</div><div class='add'>+	unsigned long pfn;</div><div class='add'>+	struct page *page = NULL;</div><div class='ctx'> 	unsigned long hva;</div><div class='del'>-	int pfnmap = 0;</div><div class='ctx'> 	int tsize = BOOK3E_PAGESZ_4K;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	unsigned long mmu_seq;</div><div class='ctx'> 	struct kvm *kvm = vcpu_e500-&gt;vcpu.kvm;</div><div class='del'>-	unsigned long tsize_pages = 0;</div><div class='ctx'> 	pte_t *ptep;</div><div class='ctx'> 	unsigned int wimg = 0;</div><div class='ctx'> 	pgd_t *pgdir;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	bool writable = false;</div><div class='ctx'> </div><div class='ctx'> 	/* used to check for invalidations in progress */</div><div class='ctx'> 	mmu_seq = kvm-&gt;mmu_invalidate_seq;</div><div class='hunk'>@@ -353,110 +355,12 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	slot = gfn_to_memslot(vcpu_e500-&gt;vcpu.kvm, gfn);</div><div class='ctx'> 	hva = gfn_to_hva_memslot(slot, gfn);</div><div class='ctx'> </div><div class='del'>-	if (tlbsel == 1) {</div><div class='del'>-		struct vm_area_struct *vma;</div><div class='del'>-		mmap_read_lock(kvm-&gt;mm);</div><div class='del'>-</div><div class='del'>-		vma = find_vma(kvm-&gt;mm, hva);</div><div class='del'>-		if (vma &amp;&amp; hva &gt;= vma-&gt;vm_start &amp;&amp;</div><div class='del'>-		    (vma-&gt;vm_flags &amp; VM_PFNMAP)) {</div><div class='del'>-			/*</div><div class='del'>-			 * This VMA is a physically contiguous region (e.g.</div><div class='del'>-			 * /dev/mem) that bypasses normal Linux page</div><div class='del'>-			 * management.  Find the overlap between the</div><div class='del'>-			 * vma and the memslot.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			unsigned long start, end;</div><div class='del'>-			unsigned long slot_start, slot_end;</div><div class='del'>-</div><div class='del'>-			pfnmap = 1;</div><div class='del'>-</div><div class='del'>-			start = vma-&gt;vm_pgoff;</div><div class='del'>-			end = start +</div><div class='del'>-			      vma_pages(vma);</div><div class='del'>-</div><div class='del'>-			pfn = start + ((hva - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT);</div><div class='del'>-</div><div class='del'>-			slot_start = pfn - (gfn - slot-&gt;base_gfn);</div><div class='del'>-			slot_end = slot_start + slot-&gt;npages;</div><div class='del'>-</div><div class='del'>-			if (start &lt; slot_start)</div><div class='del'>-				start = slot_start;</div><div class='del'>-			if (end &gt; slot_end)</div><div class='del'>-				end = slot_end;</div><div class='del'>-</div><div class='del'>-			tsize = (gtlbe-&gt;mas1 &amp; MAS1_TSIZE_MASK) &gt;&gt;</div><div class='del'>-				MAS1_TSIZE_SHIFT;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * e500 doesn't implement the lowest tsize bit,</div><div class='del'>-			 * or 1K pages.</div><div class='del'>-			 */</div><div class='del'>-			tsize = max(BOOK3E_PAGESZ_4K, tsize &amp; ~1);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Now find the largest tsize (up to what the guest</div><div class='del'>-			 * requested) that will cover gfn, stay within the</div><div class='del'>-			 * range, and for which gfn and pfn are mutually</div><div class='del'>-			 * aligned.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			for (; tsize &gt; BOOK3E_PAGESZ_4K; tsize -= 2) {</div><div class='del'>-				unsigned long gfn_start, gfn_end;</div><div class='del'>-				tsize_pages = 1UL &lt;&lt; (tsize - 2);</div><div class='del'>-</div><div class='del'>-				gfn_start = gfn &amp; ~(tsize_pages - 1);</div><div class='del'>-				gfn_end = gfn_start + tsize_pages;</div><div class='del'>-</div><div class='del'>-				if (gfn_start + pfn - gfn &lt; start)</div><div class='del'>-					continue;</div><div class='del'>-				if (gfn_end + pfn - gfn &gt; end)</div><div class='del'>-					continue;</div><div class='del'>-				if ((gfn &amp; (tsize_pages - 1)) !=</div><div class='del'>-				    (pfn &amp; (tsize_pages - 1)))</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				gvaddr &amp;= ~((tsize_pages &lt;&lt; PAGE_SHIFT) - 1);</div><div class='del'>-				pfn &amp;= ~(tsize_pages - 1);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		} else if (vma &amp;&amp; hva &gt;= vma-&gt;vm_start &amp;&amp;</div><div class='del'>-			   is_vm_hugetlb_page(vma)) {</div><div class='del'>-			unsigned long psize = vma_kernel_pagesize(vma);</div><div class='del'>-</div><div class='del'>-			tsize = (gtlbe-&gt;mas1 &amp; MAS1_TSIZE_MASK) &gt;&gt;</div><div class='del'>-				MAS1_TSIZE_SHIFT;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Take the largest page size that satisfies both host</div><div class='del'>-			 * and guest mapping</div><div class='del'>-			 */</div><div class='del'>-			tsize = min(__ilog2(psize) - 10, tsize);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * e500 doesn't implement the lowest tsize bit,</div><div class='del'>-			 * or 1K pages.</div><div class='del'>-			 */</div><div class='del'>-			tsize = max(BOOK3E_PAGESZ_4K, tsize &amp; ~1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		mmap_read_unlock(kvm-&gt;mm);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(!pfnmap)) {</div><div class='del'>-		tsize_pages = 1UL &lt;&lt; (tsize + 10 - PAGE_SHIFT);</div><div class='del'>-		pfn = gfn_to_pfn_memslot(slot, gfn);</div><div class='del'>-		if (is_error_noslot_pfn(pfn)) {</div><div class='del'>-			if (printk_ratelimit())</div><div class='del'>-				pr_err("%s: real page not found for gfn %lx\n",</div><div class='del'>-				       __func__, (long)gfn);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Align guest and physical address to page map boundaries */</div><div class='del'>-		pfn &amp;= ~(tsize_pages - 1);</div><div class='del'>-		gvaddr &amp;= ~((tsize_pages &lt;&lt; PAGE_SHIFT) - 1);</div><div class='add'>+	pfn = __kvm_faultin_pfn(slot, gfn, FOLL_WRITE, &amp;writable, &amp;page);</div><div class='add'>+	if (is_error_noslot_pfn(pfn)) {</div><div class='add'>+		if (printk_ratelimit())</div><div class='add'>+			pr_err("%s: real page not found for gfn %lx\n",</div><div class='add'>+			       __func__, (long)gfn);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='hunk'>@@ -474,14 +378,13 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	 * can't run hence pfn won't change.</div><div class='ctx'> 	 */</div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	ptep = find_linux_pte(pgdir, hva, NULL, NULL);</div><div class='add'>+	ptep = find_linux_pte(pgdir, hva, NULL, &amp;psize);</div><div class='ctx'> 	if (ptep) {</div><div class='ctx'> 		pte_t pte = READ_ONCE(*ptep);</div><div class='ctx'> </div><div class='ctx'> 		if (pte_present(pte)) {</div><div class='ctx'> 			wimg = (pte_val(pte) &gt;&gt; PTE_WIMGE_SHIFT) &amp;</div><div class='ctx'> 				MAS2_WIMGE_MASK;</div><div class='del'>-			local_irq_restore(flags);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			local_irq_restore(flags);</div><div class='ctx'> 			pr_err_ratelimited("%s: pte not present: gfn %lx,pfn %lx\n",</div><div class='hunk'>@@ -490,20 +393,79 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	if (psize &amp;&amp; tlbsel == 1) {</div><div class='add'>+		unsigned long psize_pages, tsize_pages;</div><div class='add'>+		unsigned long start, end;</div><div class='add'>+		unsigned long slot_start, slot_end;</div><div class='add'>+</div><div class='add'>+		psize_pages = 1UL &lt;&lt; (psize - PAGE_SHIFT);</div><div class='add'>+		start = pfn &amp; ~(psize_pages - 1);</div><div class='add'>+		end = start + psize_pages;</div><div class='add'>+</div><div class='add'>+		slot_start = pfn - (gfn - slot-&gt;base_gfn);</div><div class='add'>+		slot_end = slot_start + slot-&gt;npages;</div><div class='add'>+</div><div class='add'>+		if (start &lt; slot_start)</div><div class='add'>+			start = slot_start;</div><div class='add'>+		if (end &gt; slot_end)</div><div class='add'>+			end = slot_end;</div><div class='add'>+</div><div class='add'>+		tsize = (gtlbe-&gt;mas1 &amp; MAS1_TSIZE_MASK) &gt;&gt;</div><div class='add'>+			MAS1_TSIZE_SHIFT;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Any page size that doesn't satisfy the host mapping</div><div class='add'>+		 * will fail the start and end tests.</div><div class='add'>+		 */</div><div class='add'>+		tsize = min(psize - PAGE_SHIFT + BOOK3E_PAGESZ_4K, tsize);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * e500 doesn't implement the lowest tsize bit,</div><div class='add'>+		 * or 1K pages.</div><div class='add'>+		 */</div><div class='add'>+		tsize = max(BOOK3E_PAGESZ_4K, tsize &amp; ~1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Now find the largest tsize (up to what the guest</div><div class='add'>+		 * requested) that will cover gfn, stay within the</div><div class='add'>+		 * range, and for which gfn and pfn are mutually</div><div class='add'>+		 * aligned.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		for (; tsize &gt; BOOK3E_PAGESZ_4K; tsize -= 2) {</div><div class='add'>+			unsigned long gfn_start, gfn_end;</div><div class='add'>+			tsize_pages = 1UL &lt;&lt; (tsize - 2);</div><div class='add'>+</div><div class='add'>+			gfn_start = gfn &amp; ~(tsize_pages - 1);</div><div class='add'>+			gfn_end = gfn_start + tsize_pages;</div><div class='add'>+</div><div class='add'>+			if (gfn_start + pfn - gfn &lt; start)</div><div class='add'>+				continue;</div><div class='add'>+			if (gfn_end + pfn - gfn &gt; end)</div><div class='add'>+				continue;</div><div class='add'>+			if ((gfn &amp; (tsize_pages - 1)) !=</div><div class='add'>+			    (pfn &amp; (tsize_pages - 1)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			gvaddr &amp;= ~((tsize_pages &lt;&lt; PAGE_SHIFT) - 1);</div><div class='add'>+			pfn &amp;= ~(tsize_pages - 1);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg, writable);</div><div class='ctx'> 	kvmppc_e500_setup_stlbe(&amp;vcpu_e500-&gt;vcpu, gtlbe, tsize,</div><div class='ctx'> 				ref, gvaddr, stlbe);</div><div class='add'>+	writable = tlbe_is_writable(stlbe);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear i-cache for new pages */</div><div class='ctx'> 	kvmppc_mmu_flush_icache(pfn);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+	kvm_release_faultin_page(kvm, page, !!ret, writable);</div><div class='ctx'> 	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	/* Drop refcount on page, so that mmu notifiers can clear it */</div><div class='del'>-	kvm_release_pfn_clean(pfn);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/guest-state-buffer.c b/arch/powerpc/kvm/guest-state-buffer.c<br/>index b80dbc58621f..871cf60ddeb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/guest-state-buffer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/guest-state-buffer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/guest-state-buffer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/guest-state-buffer.c</a></div><div class='hunk'>@@ -92,6 +92,10 @@ static int kvmppc_gsid_class(u16 iden)</div><div class='ctx'> 	    (iden &lt;= KVMPPC_GSE_GUESTWIDE_END))</div><div class='ctx'> 		return KVMPPC_GS_CLASS_GUESTWIDE;</div><div class='ctx'> </div><div class='add'>+	if ((iden &gt;= KVMPPC_GSE_HOSTWIDE_START) &amp;&amp;</div><div class='add'>+	    (iden &lt;= KVMPPC_GSE_HOSTWIDE_END))</div><div class='add'>+		return KVMPPC_GS_CLASS_HOSTWIDE;</div><div class='add'>+</div><div class='ctx'> 	if ((iden &gt;= KVMPPC_GSE_META_START) &amp;&amp; (iden &lt;= KVMPPC_GSE_META_END))</div><div class='ctx'> 		return KVMPPC_GS_CLASS_META;</div><div class='ctx'> </div><div class='hunk'>@@ -118,6 +122,21 @@ static int kvmppc_gsid_type(u16 iden)</div><div class='ctx'> 	int type = -1;</div><div class='ctx'> </div><div class='ctx'> 	switch (kvmppc_gsid_class(iden)) {</div><div class='add'>+	case KVMPPC_GS_CLASS_HOSTWIDE:</div><div class='add'>+		switch (iden) {</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP_MAX:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM:</div><div class='add'>+			type = KVMPPC_GSE_BE64;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	case KVMPPC_GS_CLASS_GUESTWIDE:</div><div class='ctx'> 		switch (iden) {</div><div class='ctx'> 		case KVMPPC_GSID_HOST_STATE_SIZE:</div><div class='hunk'>@@ -187,6 +206,9 @@ unsigned long kvmppc_gsid_flags(u16 iden)</div><div class='ctx'> 	case KVMPPC_GS_CLASS_GUESTWIDE:</div><div class='ctx'> 		flags = KVMPPC_GS_FLAGS_WIDE;</div><div class='ctx'> 		break;</div><div class='add'>+	case KVMPPC_GS_CLASS_HOSTWIDE:</div><div class='add'>+		flags = KVMPPC_GS_FLAGS_HOST_WIDE;</div><div class='add'>+		break;</div><div class='ctx'> 	case KVMPPC_GS_CLASS_META:</div><div class='ctx'> 	case KVMPPC_GS_CLASS_DWORD_REG:</div><div class='ctx'> 	case KVMPPC_GS_CLASS_WORD_REG:</div><div class='hunk'>@@ -310,6 +332,13 @@ static inline int kvmppc_gse_flatten_iden(u16 iden)</div><div class='ctx'> </div><div class='ctx'> 	bit += KVMPPC_GSE_GUESTWIDE_COUNT;</div><div class='ctx'> </div><div class='add'>+	if (class == KVMPPC_GS_CLASS_HOSTWIDE) {</div><div class='add'>+		bit += iden - KVMPPC_GSE_HOSTWIDE_START;</div><div class='add'>+		return bit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bit += KVMPPC_GSE_HOSTWIDE_COUNT;</div><div class='add'>+</div><div class='ctx'> 	if (class == KVMPPC_GS_CLASS_META) {</div><div class='ctx'> 		bit += iden - KVMPPC_GSE_META_START;</div><div class='ctx'> 		return bit;</div><div class='hunk'>@@ -356,6 +385,12 @@ static inline u16 kvmppc_gse_unflatten_iden(int bit)</div><div class='ctx'> 	}</div><div class='ctx'> 	bit -= KVMPPC_GSE_GUESTWIDE_COUNT;</div><div class='ctx'> </div><div class='add'>+	if (bit &lt; KVMPPC_GSE_HOSTWIDE_COUNT) {</div><div class='add'>+		iden = KVMPPC_GSE_HOSTWIDE_START + bit;</div><div class='add'>+		return iden;</div><div class='add'>+	}</div><div class='add'>+	bit -= KVMPPC_GSE_HOSTWIDE_COUNT;</div><div class='add'>+</div><div class='ctx'> 	if (bit &lt; KVMPPC_GSE_META_COUNT) {</div><div class='ctx'> 		iden = KVMPPC_GSE_META_START + bit;</div><div class='ctx'> 		return iden;</div><div class='hunk'>@@ -588,6 +623,8 @@ int kvmppc_gsb_send(struct kvmppc_gs_buff *gsb, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; KVMPPC_GS_FLAGS_WIDE)</div><div class='ctx'> 		hflags |= H_GUEST_FLAGS_WIDE;</div><div class='add'>+	if (flags &amp; KVMPPC_GS_FLAGS_HOST_WIDE)</div><div class='add'>+		hflags |= H_GUEST_FLAGS_HOST_WIDE;</div><div class='ctx'> </div><div class='ctx'> 	rc = plpar_guest_set_state(hflags, gsb-&gt;guest_id, gsb-&gt;vcpu_id,</div><div class='ctx'> 				   __pa(gsb-&gt;hdr), gsb-&gt;capacity, &amp;i);</div><div class='hunk'>@@ -613,6 +650,8 @@ int kvmppc_gsb_recv(struct kvmppc_gs_buff *gsb, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; KVMPPC_GS_FLAGS_WIDE)</div><div class='ctx'> 		hflags |= H_GUEST_FLAGS_WIDE;</div><div class='add'>+	if (flags &amp; KVMPPC_GS_FLAGS_HOST_WIDE)</div><div class='add'>+		hflags |= H_GUEST_FLAGS_HOST_WIDE;</div><div class='ctx'> </div><div class='ctx'> 	rc = plpar_guest_get_state(hflags, gsb-&gt;guest_id, gsb-&gt;vcpu_id,</div><div class='ctx'> 				   __pa(gsb-&gt;hdr), gsb-&gt;capacity, &amp;i);</div><div class='head'>diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c<br/>index f14329989e9a..2ba057171ebe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/powerpc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/powerpc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/powerpc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/powerpc.c</a></div><div class='hunk'>@@ -69,7 +69,7 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Common checks before entering the guest world.  Call with interrupts</div><div class='del'>- * disabled.</div><div class='add'>+ * enabled.</div><div class='ctx'>  *</div><div class='ctx'>  * returns:</div><div class='ctx'>  *</div><div class='hunk'>@@ -550,12 +550,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	case KVM_CAP_SPAPR_TCE:</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case KVM_CAP_SPAPR_TCE_64:</div><div class='del'>-		r = 1;</div><div class='del'>-		break;</div><div class='ctx'> 	case KVM_CAP_SPAPR_TCE_VFIO:</div><div class='del'>-		r = !!cpu_has_feature(CPU_FTR_HVMODE);</div><div class='del'>-		break;</div><div class='ctx'> 	case KVM_CAP_PPC_RTAS:</div><div class='ctx'> 	case KVM_CAP_PPC_FIXUP_HCALL:</div><div class='ctx'> 	case KVM_CAP_PPC_ENABLE_HCALL:</div><div class='hunk'>@@ -612,9 +609,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 				r = 8 | 4 | 2 | 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	case KVM_CAP_PPC_RMA:</div><div class='del'>-		r = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case KVM_CAP_PPC_HWRNG:</div><div class='ctx'> 		r = kvmppc_hwrng_present();</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -769,8 +763,8 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;vcpu-&gt;arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);</div><div class='del'>-	vcpu-&gt;arch.dec_timer.function = kvmppc_decrementer_wakeup;</div><div class='add'>+	hrtimer_setup(&amp;vcpu-&gt;arch.dec_timer, kvmppc_decrementer_wakeup, CLOCK_REALTIME,</div><div class='add'>+		      HRTIMER_MODE_ABS);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_EXIT_TIMING</div><div class='ctx'> 	mutex_init(&amp;vcpu-&gt;arch.exit_timing_lock);</div><div class='hunk'>@@ -1933,12 +1927,11 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_KVM_MPIC</div><div class='ctx'> 	case KVM_CAP_IRQ_MPIC: {</div><div class='del'>-		struct fd f;</div><div class='add'>+		CLASS(fd, f)(cap-&gt;args[0]);</div><div class='ctx'> 		struct kvm_device *dev;</div><div class='ctx'> </div><div class='ctx'> 		r = -EBADF;</div><div class='del'>-		f = fdget(cap-&gt;args[0]);</div><div class='del'>-		if (!fd_file(f))</div><div class='add'>+		if (fd_empty(f))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		r = -EPERM;</div><div class='hunk'>@@ -1946,18 +1939,16 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		if (dev)</div><div class='ctx'> 			r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap-&gt;args[1]);</div><div class='ctx'> </div><div class='del'>-		fdput(f);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_KVM_XICS</div><div class='ctx'> 	case KVM_CAP_IRQ_XICS: {</div><div class='del'>-		struct fd f;</div><div class='add'>+		CLASS(fd, f)(cap-&gt;args[0]);</div><div class='ctx'> 		struct kvm_device *dev;</div><div class='ctx'> </div><div class='ctx'> 		r = -EBADF;</div><div class='del'>-		f = fdget(cap-&gt;args[0]);</div><div class='del'>-		if (!fd_file(f))</div><div class='add'>+		if (fd_empty(f))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		r = -EPERM;</div><div class='hunk'>@@ -1968,34 +1959,27 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			else</div><div class='ctx'> 				r = kvmppc_xics_connect_vcpu(dev, vcpu, cap-&gt;args[1]);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		fdput(f);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_KVM_XICS */</div><div class='ctx'> #ifdef CONFIG_KVM_XIVE</div><div class='ctx'> 	case KVM_CAP_PPC_IRQ_XIVE: {</div><div class='del'>-		struct fd f;</div><div class='add'>+		CLASS(fd, f)(cap-&gt;args[0]);</div><div class='ctx'> 		struct kvm_device *dev;</div><div class='ctx'> </div><div class='ctx'> 		r = -EBADF;</div><div class='del'>-		f = fdget(cap-&gt;args[0]);</div><div class='del'>-		if (!fd_file(f))</div><div class='add'>+		if (fd_empty(f))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		r = -ENXIO;</div><div class='del'>-		if (!xive_enabled()) {</div><div class='del'>-			fdput(f);</div><div class='add'>+		if (!xive_enabled())</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		r = -EPERM;</div><div class='ctx'> 		dev = kvm_device_from_filp(fd_file(f));</div><div class='ctx'> 		if (dev)</div><div class='ctx'> 			r = kvmppc_xive_native_connect_vcpu(dev, vcpu,</div><div class='ctx'> 							    cap-&gt;args[1]);</div><div class='del'>-</div><div class='del'>-		fdput(f);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_KVM_XIVE */</div><div class='head'>diff --git a/arch/powerpc/kvm/test-guest-state-buffer.c b/arch/powerpc/kvm/test-guest-state-buffer.c<br/>index bfd225329a18..5ccca306997a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/test-guest-state-buffer.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/test-guest-state-buffer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/test-guest-state-buffer.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/test-guest-state-buffer.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;kunit/test.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/guest-state-buffer.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void test_creating_buffer(struct kunit *test)</div><div class='ctx'> {</div><div class='hunk'>@@ -141,6 +142,16 @@ static void test_gs_bitmap(struct kunit *test)</div><div class='ctx'> 		i++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (u16 iden = KVMPPC_GSID_L0_GUEST_HEAP;</div><div class='add'>+	     iden &lt;= KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM; iden++) {</div><div class='add'>+		kvmppc_gsbm_set(&amp;gsbm, iden);</div><div class='add'>+		kvmppc_gsbm_set(&amp;gsbm1, iden);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, kvmppc_gsbm_test(&amp;gsbm, iden));</div><div class='add'>+		kvmppc_gsbm_clear(&amp;gsbm, iden);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, kvmppc_gsbm_test(&amp;gsbm, iden));</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (u16 iden = KVMPPC_GSID_RUN_INPUT; iden &lt;= KVMPPC_GSID_VPA;</div><div class='ctx'> 	     iden++) {</div><div class='ctx'> 		kvmppc_gsbm_set(&amp;gsbm, iden);</div><div class='hunk'>@@ -309,12 +320,215 @@ static void test_gs_msg(struct kunit *test)</div><div class='ctx'> 	kvmppc_gsm_free(gsm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Test data struct for hostwide/L0 counters */</div><div class='add'>+struct kvmppc_gs_msg_test_hostwide_data {</div><div class='add'>+	u64 guest_heap;</div><div class='add'>+	u64 guest_heap_max;</div><div class='add'>+	u64 guest_pgtable_size;</div><div class='add'>+	u64 guest_pgtable_size_max;</div><div class='add'>+	u64 guest_pgtable_reclaim;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static size_t test_hostwide_get_size(struct kvmppc_gs_msg *gsm)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+	u16 ids[] = {</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(ids); i++)</div><div class='add'>+		size += kvmppc_gse_total_size(kvmppc_gsid_size(ids[i]));</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test_hostwide_fill_info(struct kvmppc_gs_buff *gsb,</div><div class='add'>+				   struct kvmppc_gs_msg *gsm)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data *data = gsm-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+				   data-&gt;guest_heap);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+				   data-&gt;guest_heap_max);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+				   data-&gt;guest_pgtable_size);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+				   data-&gt;guest_pgtable_size_max);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM,</div><div class='add'>+				   data-&gt;guest_pgtable_reclaim);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test_hostwide_refresh_info(struct kvmppc_gs_msg *gsm,</div><div class='add'>+				      struct kvmppc_gs_buff *gsb)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data *data = gsm-&gt;data;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_heap = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_heap_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_size = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_size_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_reclaim = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvmppc_gs_msg_ops gs_msg_test_hostwide_ops = {</div><div class='add'>+	.get_size = test_hostwide_get_size,</div><div class='add'>+	.fill_info = test_hostwide_fill_info,</div><div class='add'>+	.refresh_info = test_hostwide_refresh_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void test_gs_hostwide_msg(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data test_data = {</div><div class='add'>+		.guest_heap = 0xdeadbeef,</div><div class='add'>+		.guest_heap_max = ~0ULL,</div><div class='add'>+		.guest_pgtable_size = 0xff,</div><div class='add'>+		.guest_pgtable_size_max = 0xffffff,</div><div class='add'>+		.guest_pgtable_reclaim = 0xdeadbeef,</div><div class='add'>+	};</div><div class='add'>+	struct kvmppc_gs_msg *gsm;</div><div class='add'>+	struct kvmppc_gs_buff *gsb;</div><div class='add'>+</div><div class='add'>+	gsm = kvmppc_gsm_new(&amp;gs_msg_test_hostwide_ops, &amp;test_data, GSM_SEND,</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsm);</div><div class='add'>+</div><div class='add'>+	gsb = kvmppc_gsb_new(kvmppc_gsm_size(gsm), 0, 0, GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsb);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_fill_info(gsm, gsb);</div><div class='add'>+</div><div class='add'>+	memset(&amp;test_data, 0, sizeof(test_data));</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_refresh_info(gsm, gsb);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_heap, 0xdeadbeef);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_heap_max, ~0ULL);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_size, 0xff);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_size_max, 0xffffff);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_reclaim, 0xdeadbeef);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_free(gsm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Test if the H_GUEST_GET_STATE for hostwide counters works */</div><div class='add'>+static void test_gs_hostwide_counters(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data test_data;</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+</div><div class='add'>+	struct kvmppc_gs_msg *gsm;</div><div class='add'>+	struct kvmppc_gs_buff *gsb;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!kvmhv_on_pseries())</div><div class='add'>+		kunit_skip(test, "This test need a kmv-hv guest");</div><div class='add'>+</div><div class='add'>+	gsm = kvmppc_gsm_new(&amp;gs_msg_test_hostwide_ops, &amp;test_data, GSM_SEND,</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsm);</div><div class='add'>+</div><div class='add'>+	gsb = kvmppc_gsb_new(kvmppc_gsm_size(gsm), 0, 0, GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsb);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_fill_info(gsm, gsb);</div><div class='add'>+</div><div class='add'>+	/* With HOST_WIDE flags guestid and vcpuid will be ignored */</div><div class='add'>+	rc = kvmppc_gsb_recv(gsb, KVMPPC_GS_FLAGS_HOST_WIDE);</div><div class='add'>+	KUNIT_ASSERT_EQ(test, rc, 0);</div><div class='add'>+</div><div class='add'>+	/* Parse the guest state buffer is successful */</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	KUNIT_ASSERT_EQ(test, rc, 0);</div><div class='add'>+</div><div class='add'>+	/* Parse the GSB and get the counters */</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 Heap counter missing");</div><div class='add'>+	kunit_info(test, "Guest Heap Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 Heap counter max missing");</div><div class='add'>+	kunit_info(test, "Guest Heap Size Max=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table size missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table size-max missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Size Max=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table reclaim size missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Reclaim Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_free(gsm);</div><div class='add'>+	kvmppc_gsb_free(gsb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct kunit_case guest_state_buffer_testcases[] = {</div><div class='ctx'> 	KUNIT_CASE(test_creating_buffer),</div><div class='ctx'> 	KUNIT_CASE(test_adding_element),</div><div class='ctx'> 	KUNIT_CASE(test_gs_bitmap),</div><div class='ctx'> 	KUNIT_CASE(test_gs_parsing),</div><div class='ctx'> 	KUNIT_CASE(test_gs_msg),</div><div class='add'>+	KUNIT_CASE(test_gs_hostwide_msg),</div><div class='add'>+	KUNIT_CASE(test_gs_hostwide_counters),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/timing.h b/arch/powerpc/kvm/timing.h<br/>index 45817ab82bb4..14b0e23f601f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/timing.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/timing.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/timing.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/timing.h</a></div><div class='hunk'>@@ -38,11 +38,7 @@ static inline void kvmppc_set_exit_type(struct kvm_vcpu *vcpu, int type) {}</div><div class='ctx'> static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type)</div><div class='ctx'> {</div><div class='ctx'> 	/* type has to be known at build time for optimization */</div><div class='del'>-</div><div class='del'>-	/* The BUILD_BUG_ON below breaks in funny ways, commented out</div><div class='del'>-	 * for now ... -BenH</div><div class='ctx'> 	BUILD_BUG_ON(!__builtin_constant_p(type));</div><div class='del'>-	*/</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case EXT_INTR_EXITS:</div><div class='ctx'> 		vcpu-&gt;stat.ext_intr_exits++;</div><div class='head'>diff --git a/arch/powerpc/kvm/trace_book3s.h b/arch/powerpc/kvm/trace_book3s.h<br/>index 372a82fa2de3..9260ddbd557f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/trace_book3s.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/trace_book3s.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/trace_book3s.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/trace_book3s.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> 	{0xe00, "H_DATA_STORAGE"}, \</div><div class='ctx'> 	{0xe20, "H_INST_STORAGE"}, \</div><div class='ctx'> 	{0xe40, "H_EMUL_ASSIST"}, \</div><div class='add'>+	{0xea0, "H_VIRT"}, \</div><div class='ctx'> 	{0xf00, "PERFMON"}, \</div><div class='ctx'> 	{0xf20, "ALTIVEC"}, \</div><div class='ctx'> 	{0xf40, "VSX"}</div><div class='head'>diff --git a/arch/powerpc/kvm/trace_hv.h b/arch/powerpc/kvm/trace_hv.h<br/>index 77ebc724e6cd..35fccaa575cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/trace_hv.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/kvm/trace_hv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/kvm/trace_hv.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/kvm/trace_hv.h</a></div><div class='hunk'>@@ -538,7 +538,7 @@ TRACE_EVENT_FN_COND(kvmppc_vcpu_stats,</div><div class='ctx'> 	TP_printk("VCPU %d: l1_to_l2_cs_time=%llu ns l2_to_l1_cs_time=%llu ns l2_runtime=%llu ns",</div><div class='ctx'> 		__entry-&gt;vcpu_id,  __entry-&gt;l1_to_l2_cs,</div><div class='ctx'> 		__entry-&gt;l2_to_l1_cs, __entry-&gt;l2_runtime),</div><div class='del'>-	kmvhv_counters_tracepoint_regfunc, kmvhv_counters_tracepoint_unregfunc</div><div class='add'>+	kvmhv_counters_tracepoint_regfunc, kvmhv_counters_tracepoint_unregfunc</div><div class='ctx'> );</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* _TRACE_KVM_HV_H */</div><div class='head'>diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c<br/>index acdab294b340..f84e0337cc02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/code-patching.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/code-patching.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/code-patching.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/code-patching.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int __patch_mem(void *exec_addr, unsigned long val, void *patch_addr, bool is_dword)</div><div class='hunk'>@@ -108,7 +108,7 @@ static int text_area_cpu_up(unsigned int cpu)</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	area = get_vm_area(PAGE_SIZE, VM_ALLOC);</div><div class='add'>+	area = get_vm_area(PAGE_SIZE, 0);</div><div class='ctx'> 	if (!area) {</div><div class='ctx'> 		WARN_ONCE(1, "Failed to create text area for cpu %d\n",</div><div class='ctx'> 			cpu);</div><div class='hunk'>@@ -493,7 +493,9 @@ static int __do_patch_instructions_mm(u32 *addr, u32 *code, size_t len, bool rep</div><div class='ctx'> </div><div class='ctx'> 	orig_mm = start_using_temp_mm(patching_mm);</div><div class='ctx'> </div><div class='add'>+	kasan_disable_current();</div><div class='ctx'> 	err = __patch_instructions(patch_addr, code, len, repeat_instr);</div><div class='add'>+	kasan_enable_current();</div><div class='ctx'> </div><div class='ctx'> 	/* context synchronisation performed by __patch_instructions */</div><div class='ctx'> 	stop_using_temp_mm(patching_mm, orig_mm);</div><div class='head'>diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c<br/>index b7201ba50b2e..587c8cf1230f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/feature-fixups.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/feature-fixups.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/feature-fixups.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/feature-fixups.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/sched/mm.h&gt;</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/interrupt.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='head'>diff --git a/arch/powerpc/lib/qspinlock.c b/arch/powerpc/lib/qspinlock.c<br/>index bcc7e4dff8c3..95ab4cdf582e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/qspinlock.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/qspinlock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/qspinlock.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/qspinlock.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/sched/clock.h&gt;</div><div class='ctx'> #include &lt;asm/qspinlock.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='add'>+#include &lt;trace/events/lock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MAX_NODES	4</div><div class='ctx'> </div><div class='hunk'>@@ -708,26 +709,26 @@ release:</div><div class='ctx'> 	qnodesp-&gt;count--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void queued_spin_lock_slowpath(struct qspinlock *lock)</div><div class='add'>+void __lockfunc queued_spin_lock_slowpath(struct qspinlock *lock)</div><div class='ctx'> {</div><div class='add'>+	trace_contention_begin(lock, LCB_F_SPIN);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This looks funny, but it induces the compiler to inline both</div><div class='ctx'> 	 * sides of the branch rather than share code as when the condition</div><div class='ctx'> 	 * is passed as the paravirt argument to the functions.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) &amp;&amp; is_shared_processor()) {</div><div class='del'>-		if (try_to_steal_lock(lock, true)) {</div><div class='add'>+		if (try_to_steal_lock(lock, true))</div><div class='ctx'> 			spec_barrier();</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		queued_spin_lock_mcs_queue(lock, true);</div><div class='add'>+		else</div><div class='add'>+			queued_spin_lock_mcs_queue(lock, true);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (try_to_steal_lock(lock, false)) {</div><div class='add'>+		if (try_to_steal_lock(lock, false))</div><div class='ctx'> 			spec_barrier();</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		queued_spin_lock_mcs_queue(lock, false);</div><div class='add'>+		else</div><div class='add'>+			queued_spin_lock_mcs_queue(lock, false);</div><div class='ctx'> 	}</div><div class='add'>+	trace_contention_end(lock, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(queued_spin_lock_slowpath);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c<br/>index e65f3fb68d06..ac3ee19531d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/sstep.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/sstep.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/sstep.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/sstep.c</a></div><div class='hunk'>@@ -780,8 +780,8 @@ static nokprobe_inline int emulate_stq(struct pt_regs *regs, unsigned long ea,</div><div class='ctx'> #endif /* __powerpc64 */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VSX</div><div class='del'>-void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg,</div><div class='del'>-		      const void *mem, bool rev)</div><div class='add'>+static nokprobe_inline void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg,</div><div class='add'>+					     const void *mem, bool rev)</div><div class='ctx'> {</div><div class='ctx'> 	int size, read_size;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -863,11 +863,9 @@ void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(emulate_vsx_load);</div><div class='del'>-NOKPROBE_SYMBOL(emulate_vsx_load);</div><div class='ctx'> </div><div class='del'>-void emulate_vsx_store(struct instruction_op *op, const union vsx_reg *reg,</div><div class='del'>-		       void *mem, bool rev)</div><div class='add'>+static nokprobe_inline void emulate_vsx_store(struct instruction_op *op, const union vsx_reg *reg,</div><div class='add'>+					      void *mem, bool rev)</div><div class='ctx'> {</div><div class='ctx'> 	int size, write_size;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -955,8 +953,6 @@ void emulate_vsx_store(struct instruction_op *op, const union vsx_reg *reg,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(emulate_vsx_store);</div><div class='del'>-NOKPROBE_SYMBOL(emulate_vsx_store);</div><div class='ctx'> </div><div class='ctx'> static nokprobe_inline int do_vsx_load(struct instruction_op *op,</div><div class='ctx'> 				       unsigned long ea, struct pt_regs *regs,</div><div class='head'>diff --git a/arch/powerpc/lib/test-code-patching.c b/arch/powerpc/lib/test-code-patching.c<br/>index 8cd3b32f805b..1440d99630b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/test-code-patching.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/test-code-patching.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/test-code-patching.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/test-code-patching.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int __init instr_is_branch_to_addr(const u32 *instr, unsigned long addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c<br/>index 23c7805fb7b3..66b5b4fa1686 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/test_emulate_step.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/test_emulate_step.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/test_emulate_step.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/test_emulate_step.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #include &lt;asm/cpu_has_feature.h&gt;</div><div class='ctx'> #include &lt;asm/sstep.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MAX_SUBTESTS	16</div><div class='head'>diff --git a/arch/powerpc/lib/vmx-helper.c b/arch/powerpc/lib/vmx-helper.c<br/>index d491da8d1838..54340912398f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/vmx-helper.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/lib/vmx-helper.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/lib/vmx-helper.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/lib/vmx-helper.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@ int exit_vmx_usercopy(void)</div><div class='ctx'> 	 * set and we are preemptible. The hack here is to schedule a</div><div class='ctx'> 	 * decrementer to fire here and reschedule for us if necessary.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_PREEMPT) &amp;&amp; need_resched())</div><div class='add'>+	if (need_irq_preemption() &amp;&amp; need_resched())</div><div class='ctx'> 		set_dec(1);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile<br/>index 0fe2f085c05a..8c1582b2987d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/Makefile</a></div><div class='hunk'>@@ -15,5 +15,5 @@ obj-$(CONFIG_NUMA) += numa.o</div><div class='ctx'> obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o</div><div class='ctx'> obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-noncoherent.o</div><div class='ctx'> obj-$(CONFIG_PPC_COPRO_BASE)	+= copro_fault.o</div><div class='del'>-obj-$(CONFIG_PTDUMP_CORE)	+= ptdump/</div><div class='add'>+obj-$(CONFIG_PTDUMP)		+= ptdump/</div><div class='ctx'> obj-$(CONFIG_KASAN)		+= kasan/</div><div class='head'>diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c<br/>index 2db167f4233f..c42ecdf94e48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s32/mmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s32/mmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s32/mmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s32/mmu.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='hunk'>@@ -204,7 +204,7 @@ int mmu_mark_initmem_nx(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nb - 1 &amp;&amp; base &lt; top;) {</div><div class='ctx'> 		size = bat_block_size(base, top);</div><div class='del'>-		setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);</div><div class='add'>+		setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_X);</div><div class='ctx'> 		base += size;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (base &lt; top) {</div><div class='hunk'>@@ -215,7 +215,7 @@ int mmu_mark_initmem_nx(void)</div><div class='ctx'> 				pr_warn("Some RW data is getting mapped X. "</div><div class='ctx'> 					"Adjust CONFIG_DATA_SHIFT to avoid that.\n");</div><div class='ctx'> 		}</div><div class='del'>-		setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);</div><div class='add'>+		setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_X);</div><div class='ctx'> 		base += size;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (; i &lt; nb; i++)</div><div class='hunk'>@@ -377,10 +377,7 @@ void __init MMU_init_hw(void)</div><div class='ctx'> 	 * Find some memory for the hash table.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322);</div><div class='del'>-	Hash = memblock_alloc(Hash_size, Hash_size);</div><div class='del'>-	if (!Hash)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, Hash_size, Hash_size);</div><div class='add'>+	Hash = memblock_alloc_or_panic(Hash_size, Hash_size);</div><div class='ctx'> 	_SDR1 = __pa(Hash) | SDR1_LOW_BITS;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Total memory = %lldMB; using %ldkB for hash table\n",</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/hash_hugepage.c b/arch/powerpc/mm/book3s64/hash_hugepage.c<br/>index 15d6f3ea7178..cdfd4fe75edb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_hugepage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_hugepage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_hugepage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/hash_hugepage.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure this is thp or devmap entry</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(old_pmd &amp; (H_PAGE_THP_HUGE | _PAGE_DEVMAP)))</div><div class='add'>+	if (!(old_pmd &amp; H_PAGE_THP_HUGE))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	rflags = htab_convert_pte_flags(new_pmd, flags);</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/book3s64/hash_native.c<br/>index 430d1d935a7c..e9e2dd70c060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_native.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_native.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_native.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/hash_native.c</a></div><div class='hunk'>@@ -27,8 +27,6 @@</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> #include &lt;asm/feature-fixups.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifdef DEBUG_LOW</div><div class='ctx'> #define DBG_LOW(fmt...) udbg_printf(fmt)</div><div class='ctx'> #else</div><div class='hunk'>@@ -217,11 +215,9 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)</div><div class='ctx'> static inline void tlbie(unsigned long vpn, int psize, int apsize,</div><div class='ctx'> 			 int ssize, int local)</div><div class='ctx'> {</div><div class='del'>-	unsigned int use_local;</div><div class='add'>+	unsigned int use_local = local &amp;&amp; mmu_has_feature(MMU_FTR_TLBIEL);</div><div class='ctx'> 	int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);</div><div class='ctx'> </div><div class='del'>-	use_local = local &amp;&amp; mmu_has_feature(MMU_FTR_TLBIEL) &amp;&amp; !cxl_ctx_in_use();</div><div class='del'>-</div><div class='ctx'> 	if (use_local)</div><div class='ctx'> 		use_local = mmu_psize_defs[psize].tlbiel;</div><div class='ctx'> 	if (lock_tlbie &amp;&amp; !use_local)</div><div class='hunk'>@@ -789,10 +785,6 @@ static void native_flush_hash_range(unsigned long number, int local)</div><div class='ctx'> 	unsigned long psize = batch-&gt;psize;</div><div class='ctx'> 	int ssize = batch-&gt;ssize;</div><div class='ctx'> 	int i;</div><div class='del'>-	unsigned int use_local;</div><div class='del'>-</div><div class='del'>-	use_local = local &amp;&amp; mmu_has_feature(MMU_FTR_TLBIEL) &amp;&amp;</div><div class='del'>-		mmu_psize_defs[psize].tlbiel &amp;&amp; !cxl_ctx_in_use();</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='hunk'>@@ -827,7 +819,8 @@ static void native_flush_hash_range(unsigned long number, int local)</div><div class='ctx'> 		} pte_iterate_hashed_end();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (use_local) {</div><div class='add'>+	if (mmu_has_feature(MMU_FTR_TLBIEL) &amp;&amp;</div><div class='add'>+	    mmu_psize_defs[psize].tlbiel &amp;&amp; local) {</div><div class='ctx'> 		asm volatile("ptesync":::"memory");</div><div class='ctx'> 		for (i = 0; i &lt; number; i++) {</div><div class='ctx'> 			vpn = batch-&gt;vpn[i];</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book3s64/hash_pgtable.c<br/>index 988948d69bc1..82d31177630b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/hash_pgtable.c</a></div><div class='hunk'>@@ -195,7 +195,7 @@ unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, unsigned long addr</div><div class='ctx'> 	unsigned long old;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_VM</div><div class='del'>-	WARN_ON(!hash__pmd_trans_huge(*pmdp) &amp;&amp; !pmd_devmap(*pmdp));</div><div class='add'>+	WARN_ON(!hash__pmd_trans_huge(*pmdp));</div><div class='ctx'> 	assert_spin_locked(pmd_lockptr(mm, pmdp));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -227,7 +227,6 @@ pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long addres</div><div class='ctx'> </div><div class='ctx'> 	VM_BUG_ON(address &amp; ~HPAGE_PMD_MASK);</div><div class='ctx'> 	VM_BUG_ON(pmd_trans_huge(*pmdp));</div><div class='del'>-	VM_BUG_ON(pmd_devmap(*pmdp));</div><div class='ctx'> </div><div class='ctx'> 	pmd = *pmdp;</div><div class='ctx'> 	pmd_clear(pmdp);</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c<br/>index e1eadd03f133..3aee3af614af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_utils.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hash_utils.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hash_utils.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/hash_utils.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/elf-randomize.h&gt;</div><div class='ctx'> #include &lt;linux/of_fdt.h&gt;</div><div class='add'>+#include &lt;linux/kfence.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/interrupt.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -55,9 +56,9 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/copro.h&gt;</div><div class='add'>+#include &lt;asm/spu.h&gt;</div><div class='ctx'> #include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/fadump.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/tm.h&gt;</div><div class='hunk'>@@ -66,6 +67,7 @@</div><div class='ctx'> #include &lt;asm/pte-walk.h&gt;</div><div class='ctx'> #include &lt;asm/asm-prototypes.h&gt;</div><div class='ctx'> #include &lt;asm/ultravisor.h&gt;</div><div class='add'>+#include &lt;asm/kfence.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -123,8 +125,6 @@ EXPORT_SYMBOL_GPL(mmu_slb_size);</div><div class='ctx'> #ifdef CONFIG_PPC_64K_PAGES</div><div class='ctx'> int mmu_ci_restrictions;</div><div class='ctx'> #endif</div><div class='del'>-static u8 *linear_map_hash_slots;</div><div class='del'>-static unsigned long linear_map_hash_count;</div><div class='ctx'> struct mmu_hash_ops mmu_hash_ops __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL(mmu_hash_ops);</div><div class='ctx'> </div><div class='hunk'>@@ -273,6 +273,270 @@ void hash__tlbiel_all(unsigned int action)</div><div class='ctx'> 		WARN(1, "%s called on pre-POWER7 CPU\n", __func__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)</div><div class='add'>+static void kernel_map_linear_page(unsigned long vaddr, unsigned long idx,</div><div class='add'>+				   u8 *slots, raw_spinlock_t *lock)</div><div class='add'>+{</div><div class='add'>+	unsigned long hash;</div><div class='add'>+	unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);</div><div class='add'>+	unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);</div><div class='add'>+	unsigned long mode = htab_convert_pte_flags(pgprot_val(PAGE_KERNEL), HPTE_USE_KERNEL_KEY);</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);</div><div class='add'>+</div><div class='add'>+	/* Don't create HPTE entries for bad address */</div><div class='add'>+	if (!vsid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (slots[idx] &amp; 0x80)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = hpte_insert_repeating(hash, vpn, __pa(vaddr), mode,</div><div class='add'>+				    HPTE_V_BOLTED,</div><div class='add'>+				    mmu_linear_psize, mmu_kernel_ssize);</div><div class='add'>+</div><div class='add'>+	BUG_ON (ret &lt; 0);</div><div class='add'>+	raw_spin_lock(lock);</div><div class='add'>+	BUG_ON(slots[idx] &amp; 0x80);</div><div class='add'>+	slots[idx] = ret | 0x80;</div><div class='add'>+	raw_spin_unlock(lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long idx,</div><div class='add'>+				     u8 *slots, raw_spinlock_t *lock)</div><div class='add'>+{</div><div class='add'>+	unsigned long hash, hslot, slot;</div><div class='add'>+	unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);</div><div class='add'>+	unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);</div><div class='add'>+</div><div class='add'>+	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);</div><div class='add'>+	raw_spin_lock(lock);</div><div class='add'>+	if (!(slots[idx] &amp; 0x80)) {</div><div class='add'>+		raw_spin_unlock(lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	hslot = slots[idx] &amp; 0x7f;</div><div class='add'>+	slots[idx] = 0;</div><div class='add'>+	raw_spin_unlock(lock);</div><div class='add'>+	if (hslot &amp; _PTEIDX_SECONDARY)</div><div class='add'>+		hash = ~hash;</div><div class='add'>+	slot = (hash &amp; htab_hash_mask) * HPTES_PER_GROUP;</div><div class='add'>+	slot += hslot &amp; _PTEIDX_GROUP_IX;</div><div class='add'>+	mmu_hash_ops.hpte_invalidate(slot, vpn, mmu_linear_psize,</div><div class='add'>+				     mmu_linear_psize,</div><div class='add'>+				     mmu_kernel_ssize, 0);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline bool hash_supports_debug_pagealloc(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long max_hash_count = ppc64_rma_size / 4;</div><div class='add'>+	unsigned long linear_map_count = memblock_end_of_DRAM() &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (!debug_pagealloc_enabled() || linear_map_count &gt; max_hash_count)</div><div class='add'>+		return false;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_PAGEALLOC</div><div class='add'>+static u8 *linear_map_hash_slots;</div><div class='add'>+static unsigned long linear_map_hash_count;</div><div class='add'>+static DEFINE_RAW_SPINLOCK(linear_map_hash_lock);</div><div class='add'>+static __init void hash_debug_pagealloc_alloc_slots(void)</div><div class='add'>+{</div><div class='add'>+	if (!hash_supports_debug_pagealloc())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	linear_map_hash_count = memblock_end_of_DRAM() &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	linear_map_hash_slots = memblock_alloc_try_nid(</div><div class='add'>+			linear_map_hash_count, 1, MEMBLOCK_LOW_LIMIT,</div><div class='add'>+			ppc64_rma_size,	NUMA_NO_NODE);</div><div class='add'>+	if (!linear_map_hash_slots)</div><div class='add'>+		panic("%s: Failed to allocate %lu bytes max_addr=%pa\n",</div><div class='add'>+		      __func__, linear_map_hash_count, &amp;ppc64_rma_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void hash_debug_pagealloc_add_slot(phys_addr_t paddr,</div><div class='add'>+							int slot)</div><div class='add'>+{</div><div class='add'>+	if (!debug_pagealloc_enabled() || !linear_map_hash_count)</div><div class='add'>+		return;</div><div class='add'>+	if ((paddr &gt;&gt; PAGE_SHIFT) &lt; linear_map_hash_count)</div><div class='add'>+		linear_map_hash_slots[paddr &gt;&gt; PAGE_SHIFT] = slot | 0x80;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hash_debug_pagealloc_map_pages(struct page *page, int numpages,</div><div class='add'>+					  int enable)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags, vaddr, lmi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!debug_pagealloc_enabled() || !linear_map_hash_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	for (i = 0; i &lt; numpages; i++, page++) {</div><div class='add'>+		vaddr = (unsigned long)page_address(page);</div><div class='add'>+		lmi = __pa(vaddr) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		if (lmi &gt;= linear_map_hash_count)</div><div class='add'>+			continue;</div><div class='add'>+		if (enable)</div><div class='add'>+			kernel_map_linear_page(vaddr, lmi,</div><div class='add'>+				linear_map_hash_slots, &amp;linear_map_hash_lock);</div><div class='add'>+		else</div><div class='add'>+			kernel_unmap_linear_page(vaddr, lmi,</div><div class='add'>+				linear_map_hash_slots, &amp;linear_map_hash_lock);</div><div class='add'>+	}</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_DEBUG_PAGEALLOC */</div><div class='add'>+static inline void hash_debug_pagealloc_alloc_slots(void) {}</div><div class='add'>+static inline void hash_debug_pagealloc_add_slot(phys_addr_t paddr, int slot) {}</div><div class='add'>+static int __maybe_unused</div><div class='add'>+hash_debug_pagealloc_map_pages(struct page *page, int numpages, int enable)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_DEBUG_PAGEALLOC */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KFENCE</div><div class='add'>+static u8 *linear_map_kf_hash_slots;</div><div class='add'>+static unsigned long linear_map_kf_hash_count;</div><div class='add'>+static DEFINE_RAW_SPINLOCK(linear_map_kf_hash_lock);</div><div class='add'>+</div><div class='add'>+static phys_addr_t kfence_pool;</div><div class='add'>+</div><div class='add'>+static __init void hash_kfence_alloc_pool(void)</div><div class='add'>+{</div><div class='add'>+	if (!kfence_early_init_enabled())</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* allocate linear map for kfence within RMA region */</div><div class='add'>+	linear_map_kf_hash_count = KFENCE_POOL_SIZE &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	linear_map_kf_hash_slots = memblock_alloc_try_nid(</div><div class='add'>+					linear_map_kf_hash_count, 1,</div><div class='add'>+					MEMBLOCK_LOW_LIMIT, ppc64_rma_size,</div><div class='add'>+					NUMA_NO_NODE);</div><div class='add'>+	if (!linear_map_kf_hash_slots) {</div><div class='add'>+		pr_err("%s: memblock for linear map (%lu) failed\n", __func__,</div><div class='add'>+				linear_map_kf_hash_count);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allocate kfence pool early */</div><div class='add'>+	kfence_pool = memblock_phys_alloc_range(KFENCE_POOL_SIZE, PAGE_SIZE,</div><div class='add'>+				MEMBLOCK_LOW_LIMIT, MEMBLOCK_ALLOC_ANYWHERE);</div><div class='add'>+	if (!kfence_pool) {</div><div class='add'>+		pr_err("%s: memblock for kfence pool (%lu) failed\n", __func__,</div><div class='add'>+				KFENCE_POOL_SIZE);</div><div class='add'>+		memblock_free(linear_map_kf_hash_slots,</div><div class='add'>+				linear_map_kf_hash_count);</div><div class='add'>+		linear_map_kf_hash_count = 0;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	memblock_mark_nomap(kfence_pool, KFENCE_POOL_SIZE);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	pr_info("Disabling kfence\n");</div><div class='add'>+	disable_kfence();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init void hash_kfence_map_pool(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long kfence_pool_start, kfence_pool_end;</div><div class='add'>+	unsigned long prot = pgprot_val(PAGE_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!kfence_pool)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kfence_pool_start = (unsigned long) __va(kfence_pool);</div><div class='add'>+	kfence_pool_end = kfence_pool_start + KFENCE_POOL_SIZE;</div><div class='add'>+	__kfence_pool = (char *) kfence_pool_start;</div><div class='add'>+	BUG_ON(htab_bolt_mapping(kfence_pool_start, kfence_pool_end,</div><div class='add'>+				    kfence_pool, prot, mmu_linear_psize,</div><div class='add'>+				    mmu_kernel_ssize));</div><div class='add'>+	memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void hash_kfence_add_slot(phys_addr_t paddr, int slot)</div><div class='add'>+{</div><div class='add'>+	unsigned long vaddr = (unsigned long) __va(paddr);</div><div class='add'>+	unsigned long lmi = (vaddr - (unsigned long)__kfence_pool)</div><div class='add'>+					&gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (!kfence_pool)</div><div class='add'>+		return;</div><div class='add'>+	BUG_ON(!is_kfence_address((void *)vaddr));</div><div class='add'>+	BUG_ON(lmi &gt;= linear_map_kf_hash_count);</div><div class='add'>+	linear_map_kf_hash_slots[lmi] = slot | 0x80;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hash_kfence_map_pages(struct page *page, int numpages, int enable)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags, vaddr, lmi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!linear_map_kf_hash_count);</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	for (i = 0; i &lt; numpages; i++, page++) {</div><div class='add'>+		vaddr = (unsigned long)page_address(page);</div><div class='add'>+		lmi = (vaddr - (unsigned long)__kfence_pool) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+		/* Ideally this should never happen */</div><div class='add'>+		if (lmi &gt;= linear_map_kf_hash_count) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (enable)</div><div class='add'>+			kernel_map_linear_page(vaddr, lmi,</div><div class='add'>+					       linear_map_kf_hash_slots,</div><div class='add'>+					       &amp;linear_map_kf_hash_lock);</div><div class='add'>+		else</div><div class='add'>+			kernel_unmap_linear_page(vaddr, lmi,</div><div class='add'>+						 linear_map_kf_hash_slots,</div><div class='add'>+						 &amp;linear_map_kf_hash_lock);</div><div class='add'>+	}</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void hash_kfence_alloc_pool(void) {}</div><div class='add'>+static inline void hash_kfence_map_pool(void) {}</div><div class='add'>+static inline void hash_kfence_add_slot(phys_addr_t paddr, int slot) {}</div><div class='add'>+static int __maybe_unused</div><div class='add'>+hash_kfence_map_pages(struct page *page, int numpages, int enable)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)</div><div class='add'>+int hash__kernel_map_pages(struct page *page, int numpages, int enable)</div><div class='add'>+{</div><div class='add'>+	void *vaddr = page_address(page);</div><div class='add'>+</div><div class='add'>+	if (is_kfence_address(vaddr))</div><div class='add'>+		return hash_kfence_map_pages(page, numpages, enable);</div><div class='add'>+	else</div><div class='add'>+		return hash_debug_pagealloc_map_pages(page, numpages, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hash_linear_map_add_slot(phys_addr_t paddr, int slot)</div><div class='add'>+{</div><div class='add'>+	if (is_kfence_address(__va(paddr)))</div><div class='add'>+		hash_kfence_add_slot(paddr, slot);</div><div class='add'>+	else</div><div class='add'>+		hash_debug_pagealloc_add_slot(paddr, slot);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void hash_linear_map_add_slot(phys_addr_t paddr, int slot) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * 'R' and 'C' update notes:</div><div class='ctx'>  *  - Under pHyp or KVM, the updatepp path will not set C, thus it *will*</div><div class='hunk'>@@ -431,9 +695,8 @@ repeat:</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		cond_resched();</div><div class='del'>-		if (debug_pagealloc_enabled_or_kfence() &amp;&amp;</div><div class='del'>-			(paddr &gt;&gt; PAGE_SHIFT) &lt; linear_map_hash_count)</div><div class='del'>-			linear_map_hash_slots[paddr &gt;&gt; PAGE_SHIFT] = ret | 0x80;</div><div class='add'>+		/* add slot info in debug_pagealloc / kfence linear map */</div><div class='add'>+		hash_linear_map_add_slot(paddr, ret);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret &lt; 0 ? ret : 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -814,7 +1077,7 @@ static void __init htab_init_page_sizes(void)</div><div class='ctx'> 	bool aligned = true;</div><div class='ctx'> 	init_hpte_page_sizes();</div><div class='ctx'> </div><div class='del'>-	if (!debug_pagealloc_enabled_or_kfence()) {</div><div class='add'>+	if (!hash_supports_debug_pagealloc() &amp;&amp; !kfence_early_init_enabled()) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Pick a size for the linear mapping. Currently, we only</div><div class='ctx'> 		 * support 16M, 1M and 4K which is the default</div><div class='hunk'>@@ -1095,18 +1358,6 @@ static void __init htab_initialize(void)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		unsigned long limit = MEMBLOCK_ALLOC_ANYWHERE;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_CELL</div><div class='del'>-		/*</div><div class='del'>-		 * Cell may require the hash table down low when using the</div><div class='del'>-		 * Axon IOMMU in order to fit the dynamic region over it, see</div><div class='del'>-		 * comments in cell/iommu.c</div><div class='del'>-		 */</div><div class='del'>-		if (fdt_subnode_offset(initial_boot_params, 0, "axon") &gt; 0) {</div><div class='del'>-			limit = 0x80000000;</div><div class='del'>-			pr_info("Hash table forced below 2G for Axon IOMMU\n");</div><div class='del'>-		}</div><div class='del'>-#endif /* CONFIG_PPC_CELL */</div><div class='del'>-</div><div class='ctx'> 		table = memblock_phys_alloc_range(htab_size_bytes,</div><div class='ctx'> 						  htab_size_bytes,</div><div class='ctx'> 						  0, limit);</div><div class='hunk'>@@ -1134,16 +1385,8 @@ static void __init htab_initialize(void)</div><div class='ctx'> </div><div class='ctx'> 	prot = pgprot_val(PAGE_KERNEL);</div><div class='ctx'> </div><div class='del'>-	if (debug_pagealloc_enabled_or_kfence()) {</div><div class='del'>-		linear_map_hash_count = memblock_end_of_DRAM() &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		linear_map_hash_slots = memblock_alloc_try_nid(</div><div class='del'>-				linear_map_hash_count, 1, MEMBLOCK_LOW_LIMIT,</div><div class='del'>-				ppc64_rma_size,	NUMA_NO_NODE);</div><div class='del'>-		if (!linear_map_hash_slots)</div><div class='del'>-			panic("%s: Failed to allocate %lu bytes max_addr=%pa\n",</div><div class='del'>-			      __func__, linear_map_hash_count, &amp;ppc64_rma_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	hash_debug_pagealloc_alloc_slots();</div><div class='add'>+	hash_kfence_alloc_pool();</div><div class='ctx'> 	/* create bolted the linear mapping in the hash table */</div><div class='ctx'> 	for_each_mem_range(i, &amp;base, &amp;end) {</div><div class='ctx'> 		size = end - base;</div><div class='hunk'>@@ -1160,6 +1403,7 @@ static void __init htab_initialize(void)</div><div class='ctx'> 		BUG_ON(htab_bolt_mapping(base, base + size, __pa(base),</div><div class='ctx'> 				prot, mmu_linear_psize, mmu_kernel_ssize));</div><div class='ctx'> 	}</div><div class='add'>+	hash_kfence_map_pool();</div><div class='ctx'> 	memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1318,11 +1562,11 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)</div><div class='ctx'> 	folio = page_folio(pte_page(pte));</div><div class='ctx'> </div><div class='ctx'> 	/* page is dirty */</div><div class='del'>-	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags) &amp;&amp;</div><div class='add'>+	if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f) &amp;&amp;</div><div class='ctx'> 	    !folio_test_reserved(folio)) {</div><div class='ctx'> 		if (trap == INTERRUPT_INST_STORAGE) {</div><div class='ctx'> 			flush_dcache_icache_folio(folio);</div><div class='del'>-			set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+			set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		} else</div><div class='ctx'> 			pp |= HPTE_R_N;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1356,7 +1600,9 @@ void demote_segment_4k(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	if (get_slice_psize(mm, addr) == MMU_PAGE_4K)</div><div class='ctx'> 		return;</div><div class='ctx'> 	slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K);</div><div class='del'>-	copro_flush_all_slbs(mm);</div><div class='add'>+#ifdef CONFIG_SPU_BASE</div><div class='add'>+	spu_flush_all_slbs(mm);</div><div class='add'>+#endif</div><div class='ctx'> 	if ((get_paca_psize(addr) != MMU_PAGE_4K) &amp;&amp; (current-&gt;mm == mm)) {</div><div class='ctx'> </div><div class='ctx'> 		copy_mm_to_paca(mm);</div><div class='hunk'>@@ -1625,7 +1871,9 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,</div><div class='ctx'> 			       "to 4kB pages because of "</div><div class='ctx'> 			       "non-cacheable mapping\n");</div><div class='ctx'> 			psize = mmu_vmalloc_psize = MMU_PAGE_4K;</div><div class='del'>-			copro_flush_all_slbs(mm);</div><div class='add'>+#ifdef CONFIG_SPU_BASE</div><div class='add'>+			spu_flush_all_slbs(mm);</div><div class='add'>+#endif</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2120,82 +2368,6 @@ void hpt_do_stress(unsigned long ea, unsigned long hpte_group)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)</div><div class='del'>-static DEFINE_RAW_SPINLOCK(linear_map_hash_lock);</div><div class='del'>-</div><div class='del'>-static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)</div><div class='del'>-{</div><div class='del'>-	unsigned long hash;</div><div class='del'>-	unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);</div><div class='del'>-	unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);</div><div class='del'>-	unsigned long mode = htab_convert_pte_flags(pgprot_val(PAGE_KERNEL), HPTE_USE_KERNEL_KEY);</div><div class='del'>-	long ret;</div><div class='del'>-</div><div class='del'>-	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);</div><div class='del'>-</div><div class='del'>-	/* Don't create HPTE entries for bad address */</div><div class='del'>-	if (!vsid)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (linear_map_hash_slots[lmi] &amp; 0x80)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = hpte_insert_repeating(hash, vpn, __pa(vaddr), mode,</div><div class='del'>-				    HPTE_V_BOLTED,</div><div class='del'>-				    mmu_linear_psize, mmu_kernel_ssize);</div><div class='del'>-</div><div class='del'>-	BUG_ON (ret &lt; 0);</div><div class='del'>-	raw_spin_lock(&amp;linear_map_hash_lock);</div><div class='del'>-	BUG_ON(linear_map_hash_slots[lmi] &amp; 0x80);</div><div class='del'>-	linear_map_hash_slots[lmi] = ret | 0x80;</div><div class='del'>-	raw_spin_unlock(&amp;linear_map_hash_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long lmi)</div><div class='del'>-{</div><div class='del'>-	unsigned long hash, hidx, slot;</div><div class='del'>-	unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);</div><div class='del'>-	unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize);</div><div class='del'>-</div><div class='del'>-	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);</div><div class='del'>-	raw_spin_lock(&amp;linear_map_hash_lock);</div><div class='del'>-	if (!(linear_map_hash_slots[lmi] &amp; 0x80)) {</div><div class='del'>-		raw_spin_unlock(&amp;linear_map_hash_lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	hidx = linear_map_hash_slots[lmi] &amp; 0x7f;</div><div class='del'>-	linear_map_hash_slots[lmi] = 0;</div><div class='del'>-	raw_spin_unlock(&amp;linear_map_hash_lock);</div><div class='del'>-	if (hidx &amp; _PTEIDX_SECONDARY)</div><div class='del'>-		hash = ~hash;</div><div class='del'>-	slot = (hash &amp; htab_hash_mask) * HPTES_PER_GROUP;</div><div class='del'>-	slot += hidx &amp; _PTEIDX_GROUP_IX;</div><div class='del'>-	mmu_hash_ops.hpte_invalidate(slot, vpn, mmu_linear_psize,</div><div class='del'>-				     mmu_linear_psize,</div><div class='del'>-				     mmu_kernel_ssize, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int hash__kernel_map_pages(struct page *page, int numpages, int enable)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, vaddr, lmi;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	for (i = 0; i &lt; numpages; i++, page++) {</div><div class='del'>-		vaddr = (unsigned long)page_address(page);</div><div class='del'>-		lmi = __pa(vaddr) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		if (lmi &gt;= linear_map_hash_count)</div><div class='del'>-			continue;</div><div class='del'>-		if (enable)</div><div class='del'>-			kernel_map_linear_page(vaddr, lmi);</div><div class='del'>-		else</div><div class='del'>-			kernel_unmap_linear_page(vaddr, lmi);</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_DEBUG_PAGEALLOC || CONFIG_KFENCE */</div><div class='del'>-</div><div class='ctx'> void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base,</div><div class='ctx'> 				phys_addr_t first_memblock_size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/hugetlbpage.c b/arch/powerpc/mm/book3s64/hugetlbpage.c<br/>index 83c3361b358b..2bcbbf9d85ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hugetlbpage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/hugetlbpage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/hugetlbpage.c</a></div><div class='hunk'>@@ -74,7 +74,7 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,</div><div class='ctx'> 	} while(!pte_xchg(ptep, __pte(old_pte), __pte(new_pte)));</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure this is a hugetlb entry */</div><div class='del'>-	if (old_pte &amp; (H_PAGE_THP_HUGE | _PAGE_DEVMAP))</div><div class='add'>+	if (old_pte &amp; H_PAGE_THP_HUGE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	rflags = htab_convert_pte_flags(new_pte, flags);</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/mmu_context.c b/arch/powerpc/mm/book3s64/mmu_context.c<br/>index 1715b07c630c..4e1e45420bd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/mmu_context.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/mmu_context.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/mmu_context.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/mmu_context.c</a></div><div class='hunk'>@@ -253,7 +253,7 @@ static void pmd_frag_destroy(void *pmd_frag)</div><div class='ctx'> 	count = ((unsigned long)pmd_frag &amp; ~PAGE_MASK) &gt;&gt; PMD_FRAG_SIZE_SHIFT;</div><div class='ctx'> 	/* We allow PTE_FRAG_NR fragments from a PTE page */</div><div class='ctx'> 	if (atomic_sub_and_test(PMD_FRAG_NR - count, &amp;ptdesc-&gt;pt_frag_refcount)) {</div><div class='del'>-		pagetable_pmd_dtor(ptdesc);</div><div class='add'>+		pagetable_dtor(ptdesc);</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c<br/>index 5a4a75369043..c9431ae7f78a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/pgtable.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/pkeys.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='hunk'>@@ -37,6 +36,19 @@ EXPORT_SYMBOL(__pmd_frag_nr);</div><div class='ctx'> unsigned long __pmd_frag_size_shift;</div><div class='ctx'> EXPORT_SYMBOL(__pmd_frag_size_shift);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KFENCE</div><div class='add'>+extern bool kfence_early_init;</div><div class='add'>+static int __init parse_kfence_early_init(char *arg)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (get_option(&amp;arg, &amp;val))</div><div class='add'>+		kfence_early_init = !!val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("kfence.sample_interval", parse_kfence_early_init);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='ctx'> /*</div><div class='ctx'>  * This is called when relaxing access to a hugepage. It's also called in the page</div><div class='hunk'>@@ -50,7 +62,7 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> {</div><div class='ctx'> 	int changed;</div><div class='ctx'> #ifdef CONFIG_DEBUG_VM</div><div class='del'>-	WARN_ON(!pmd_trans_huge(*pmdp) &amp;&amp; !pmd_devmap(*pmdp));</div><div class='add'>+	WARN_ON(!pmd_trans_huge(*pmdp));</div><div class='ctx'> 	assert_spin_locked(pmd_lockptr(vma-&gt;vm_mm, pmdp));</div><div class='ctx'> #endif</div><div class='ctx'> 	changed = !pmd_same(*(pmdp), entry);</div><div class='hunk'>@@ -70,7 +82,6 @@ int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> {</div><div class='ctx'> 	int changed;</div><div class='ctx'> #ifdef CONFIG_DEBUG_VM</div><div class='del'>-	WARN_ON(!pud_devmap(*pudp));</div><div class='ctx'> 	assert_spin_locked(pud_lockptr(vma-&gt;vm_mm, pudp));</div><div class='ctx'> #endif</div><div class='ctx'> 	changed = !pud_same(*(pudp), entry);</div><div class='hunk'>@@ -192,8 +203,8 @@ pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t pmd;</div><div class='ctx'> 	VM_BUG_ON(addr &amp; ~HPAGE_PMD_MASK);</div><div class='del'>-	VM_BUG_ON((pmd_present(*pmdp) &amp;&amp; !pmd_trans_huge(*pmdp) &amp;&amp;</div><div class='del'>-		   !pmd_devmap(*pmdp)) || !pmd_present(*pmdp));</div><div class='add'>+	VM_BUG_ON((pmd_present(*pmdp) &amp;&amp; !pmd_trans_huge(*pmdp)) ||</div><div class='add'>+		   !pmd_present(*pmdp));</div><div class='ctx'> 	pmd = pmdp_huge_get_and_clear(vma-&gt;vm_mm, addr, pmdp);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * if it not a fullmm flush, then we can possibly end up converting</div><div class='hunk'>@@ -211,8 +222,7 @@ pud_t pudp_huge_get_and_clear_full(struct vm_area_struct *vma,</div><div class='ctx'> 	pud_t pud;</div><div class='ctx'> </div><div class='ctx'> 	VM_BUG_ON(addr &amp; ~HPAGE_PMD_MASK);</div><div class='del'>-	VM_BUG_ON((pud_present(*pudp) &amp;&amp; !pud_devmap(*pudp)) ||</div><div class='del'>-		  !pud_present(*pudp));</div><div class='add'>+	VM_BUG_ON(!pud_present(*pudp));</div><div class='ctx'> 	pud = pudp_huge_get_and_clear(vma-&gt;vm_mm, addr, pudp);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * if it not a fullmm flush, then we can possibly end up converting</div><div class='hunk'>@@ -257,11 +267,6 @@ pud_t pfn_pud(unsigned long pfn, pgprot_t pgprot)</div><div class='ctx'> 	return __pud_mkhuge(pud_set_protbits(__pud(pudv), pgprot));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-pmd_t mk_pmd(struct page *page, pgprot_t pgprot)</div><div class='del'>-{</div><div class='del'>-	return pfn_pmd(page_to_pfn(page), pgprot);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pmdv;</div><div class='hunk'>@@ -317,11 +322,7 @@ void __init mmu_partition_table_init(void)</div><div class='ctx'> 	unsigned long ptcr;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the Partition Table with no entries */</div><div class='del'>-	partition_tb = memblock_alloc(patb_size, patb_size);</div><div class='del'>-	if (!partition_tb)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, patb_size, patb_size);</div><div class='del'>-</div><div class='add'>+	partition_tb = memblock_alloc_or_panic(patb_size, patb_size);</div><div class='ctx'> 	ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);</div><div class='ctx'> 	set_ptcr_when_no_uv(ptcr);</div><div class='ctx'> 	powernv_set_nmmu_ptcr(ptcr);</div><div class='hunk'>@@ -414,7 +415,7 @@ static pmd_t *__alloc_for_pmdcache(struct mm_struct *mm)</div><div class='ctx'> 	ptdesc = pagetable_alloc(gfp, 0);</div><div class='ctx'> 	if (!ptdesc)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	if (!pagetable_pmd_ctor(ptdesc)) {</div><div class='add'>+	if (!pagetable_pmd_ctor(mm, ptdesc)) {</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -464,7 +465,7 @@ void pmd_fragment_free(unsigned long *pmd)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(atomic_read(&amp;ptdesc-&gt;pt_frag_refcount) &lt;= 0);</div><div class='ctx'> 	if (atomic_dec_and_test(&amp;ptdesc-&gt;pt_frag_refcount)) {</div><div class='del'>-		pagetable_pmd_dtor(ptdesc);</div><div class='add'>+		pagetable_dtor(ptdesc);</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -578,7 +579,7 @@ int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,</div><div class='ctx'> /*</div><div class='ctx'>  * Does the CPU support tlbie?</div><div class='ctx'>  */</div><div class='del'>-bool tlbie_capable __read_mostly = true;</div><div class='add'>+bool tlbie_capable __read_mostly = IS_ENABLED(CONFIG_PPC_RADIX_BROADCAST_TLBIE);</div><div class='ctx'> EXPORT_SYMBOL(tlbie_capable);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -586,7 +587,7 @@ EXPORT_SYMBOL(tlbie_capable);</div><div class='ctx'>  * address spaces? tlbie may still be used for nMMU accelerators, and for KVM</div><div class='ctx'>  * guest address spaces.</div><div class='ctx'>  */</div><div class='del'>-bool tlbie_enabled __read_mostly = true;</div><div class='add'>+bool tlbie_enabled __read_mostly = IS_ENABLED(CONFIG_PPC_RADIX_BROADCAST_TLBIE);</div><div class='ctx'> </div><div class='ctx'> static int __init setup_disable_tlbie(char *str)</div><div class='ctx'> {</div><div class='hunk'>@@ -641,7 +642,7 @@ unsigned long memremap_compat_align(void)</div><div class='ctx'> EXPORT_SYMBOL_GPL(memremap_compat_align);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-pgprot_t vm_get_page_prot(unsigned long vm_flags)</div><div class='add'>+pgprot_t vm_get_page_prot(vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long prot;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c<br/>index b0d927009af8..73977dbabcf2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/radix_pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/radix_pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/radix_pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/radix_pgtable.c</a></div><div class='hunk'>@@ -363,19 +363,7 @@ static int __meminit create_physical_mapping(unsigned long start,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KFENCE</div><div class='del'>-static bool __ro_after_init kfence_early_init = !!CONFIG_KFENCE_SAMPLE_INTERVAL;</div><div class='del'>-</div><div class='del'>-static int __init parse_kfence_early_init(char *arg)</div><div class='del'>-{</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	if (get_option(&amp;arg, &amp;val))</div><div class='del'>-		kfence_early_init = !!val;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-early_param("kfence.sample_interval", parse_kfence_early_init);</div><div class='del'>-</div><div class='del'>-static inline phys_addr_t alloc_kfence_pool(void)</div><div class='add'>+static __init phys_addr_t alloc_kfence_pool(void)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t kfence_pool;</div><div class='ctx'> </div><div class='hunk'>@@ -405,7 +393,7 @@ no_kfence:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void map_kfence_pool(phys_addr_t kfence_pool)</div><div class='add'>+static __init void map_kfence_pool(phys_addr_t kfence_pool)</div><div class='ctx'> {</div><div class='ctx'> 	if (!kfence_pool)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -792,7 +780,7 @@ static void __meminit free_vmemmap_pages(struct page *page,</div><div class='ctx'> 		while (nr_pages--)</div><div class='ctx'> 			free_reserved_page(page++);</div><div class='ctx'> 	} else</div><div class='del'>-		free_pages((unsigned long)page_address(page), order);</div><div class='add'>+		__free_pages(page, order);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __meminit remove_pte_table(pte_t *pte_start, unsigned long addr,</div><div class='hunk'>@@ -988,7 +976,7 @@ int __meminit radix__vmemmap_create_mapping(unsigned long start,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP</div><div class='ctx'> bool vmemmap_can_optimize(struct vmem_altmap *altmap, struct dev_pagemap *pgmap)</div><div class='ctx'> {</div><div class='ctx'> 	if (radix_enabled())</div><div class='hunk'>@@ -996,6 +984,7 @@ bool vmemmap_can_optimize(struct vmem_altmap *altmap, struct dev_pagemap *pgmap)</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> int __meminit vmemmap_check_pmd(pmd_t *pmdp, int node,</div><div class='ctx'> 				unsigned long addr, unsigned long next)</div><div class='hunk'>@@ -1132,6 +1121,26 @@ int __meminit radix__vmemmap_populate(unsigned long start, unsigned long end, in</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If altmap is present, Make sure we align the start vmemmap addr</div><div class='add'>+	 * to PAGE_SIZE so that we calculate the correct start_pfn in</div><div class='add'>+	 * altmap boundary check to decide whether we should use altmap or</div><div class='add'>+	 * RAM based backing memory allocation. Also the address need to be</div><div class='add'>+	 * aligned for set_pte operation. If the start addr is already</div><div class='add'>+	 * PMD_SIZE aligned and with in the altmap boundary then we will</div><div class='add'>+	 * try to use a pmd size altmap mapping else we go for page size</div><div class='add'>+	 * mapping.</div><div class='add'>+	 *</div><div class='add'>+	 * If altmap is not present, align the vmemmap addr to PMD_SIZE and</div><div class='add'>+	 * always allocate a PMD size page for vmemmap backing.</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (altmap)</div><div class='add'>+		start = ALIGN_DOWN(start, PAGE_SIZE);</div><div class='add'>+	else</div><div class='add'>+		start = ALIGN_DOWN(start, PMD_SIZE);</div><div class='add'>+</div><div class='ctx'> 	for (addr = start; addr &lt; end; addr = next) {</div><div class='ctx'> 		next = pmd_addr_end(addr, end);</div><div class='ctx'> </div><div class='hunk'>@@ -1158,7 +1167,7 @@ int __meminit radix__vmemmap_populate(unsigned long start, unsigned long end, in</div><div class='ctx'> 			 * we fallback to RAM for vmemmap allocation.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (altmap &amp;&amp; (!IS_ALIGNED(addr, PMD_SIZE) ||</div><div class='del'>-				       altmap_cross_boundary(altmap, addr, PMD_SIZE))) {</div><div class='add'>+			    altmap_cross_boundary(altmap, addr, PMD_SIZE))) {</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * make sure we don't create altmap mappings</div><div class='ctx'> 				 * covering things outside the device.</div><div class='hunk'>@@ -1171,7 +1180,7 @@ int __meminit radix__vmemmap_populate(unsigned long start, unsigned long end, in</div><div class='ctx'> 				vmemmap_set_pmd(pmd, p, node, addr, next);</div><div class='ctx'> 				pr_debug("PMD_SIZE vmemmap mapping\n");</div><div class='ctx'> 				continue;</div><div class='del'>-			} else if (altmap) {</div><div class='add'>+			} else {</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * A vmemmap block allocation can fail due to</div><div class='ctx'> 				 * alignment requirements and we trying to align</div><div class='hunk'>@@ -1424,7 +1433,7 @@ unsigned long radix__pmd_hugepage_update(struct mm_struct *mm, unsigned long add</div><div class='ctx'> 	unsigned long old;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_VM</div><div class='del'>-	WARN_ON(!radix__pmd_trans_huge(*pmdp) &amp;&amp; !pmd_devmap(*pmdp));</div><div class='add'>+	WARN_ON(!radix__pmd_trans_huge(*pmdp));</div><div class='ctx'> 	assert_spin_locked(pmd_lockptr(mm, pmdp));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1441,7 +1450,7 @@ unsigned long radix__pud_hugepage_update(struct mm_struct *mm, unsigned long add</div><div class='ctx'> 	unsigned long old;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_VM</div><div class='del'>-	WARN_ON(!pud_devmap(*pudp));</div><div class='add'>+	WARN_ON(!pud_trans_huge(*pudp));</div><div class='ctx'> 	assert_spin_locked(pud_lockptr(mm, pudp));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1459,7 +1468,6 @@ pmd_t radix__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long addre</div><div class='ctx'> </div><div class='ctx'> 	VM_BUG_ON(address &amp; ~HPAGE_PMD_MASK);</div><div class='ctx'> 	VM_BUG_ON(radix__pmd_trans_huge(*pmdp));</div><div class='del'>-	VM_BUG_ON(pmd_devmap(*pmdp));</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * khugepaged calls this for normal pmd</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/slb.c b/arch/powerpc/mm/book3s64/slb.c<br/>index f2708c8629a5..6b783552403c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/slb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/slb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/slb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/slb.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/slice.c b/arch/powerpc/mm/book3s64/slice.c<br/>index 87307d0fc3b8..28bec5bc7879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/slice.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/book3s64/slice.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/book3s64/slice.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/book3s64/slice.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;linux/security.h&gt;</div><div class='ctx'> #include &lt;asm/mman.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='del'>-#include &lt;asm/copro.h&gt;</div><div class='add'>+#include &lt;asm/spu.h&gt;</div><div class='ctx'> #include &lt;asm/hugetlb.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -248,7 +248,9 @@ static void slice_convert(struct mm_struct *mm,</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;slice_convert_lock, flags);</div><div class='ctx'> </div><div class='del'>-	copro_flush_all_slbs(mm);</div><div class='add'>+#ifdef CONFIG_SPU_BASE</div><div class='add'>+	spu_flush_all_slbs(mm);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -633,6 +635,20 @@ return_addr:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(slice_get_unmapped_area);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HUGETLB_PAGE</div><div class='add'>+static int file_to_psize(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct hstate *hstate = hstate_file(file);</div><div class='add'>+</div><div class='add'>+	return shift_to_mmu_psize(huge_page_shift(hstate));</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int file_to_psize(struct file *file)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> unsigned long arch_get_unmapped_area(struct file *filp,</div><div class='ctx'> 				     unsigned long addr,</div><div class='ctx'> 				     unsigned long len,</div><div class='hunk'>@@ -640,11 +656,17 @@ unsigned long arch_get_unmapped_area(struct file *filp,</div><div class='ctx'> 				     unsigned long flags,</div><div class='ctx'> 				     vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='add'>+	unsigned int psize;</div><div class='add'>+</div><div class='ctx'> 	if (radix_enabled())</div><div class='ctx'> 		return generic_get_unmapped_area(filp, addr, len, pgoff, flags, vm_flags);</div><div class='ctx'> </div><div class='del'>-	return slice_get_unmapped_area(addr, len, flags,</div><div class='del'>-				       mm_ctx_user_psize(&amp;current-&gt;mm-&gt;context), 0);</div><div class='add'>+	if (filp &amp;&amp; is_file_hugepages(filp))</div><div class='add'>+		psize = file_to_psize(filp);</div><div class='add'>+	else</div><div class='add'>+		psize = mm_ctx_user_psize(&amp;current-&gt;mm-&gt;context);</div><div class='add'>+</div><div class='add'>+	return slice_get_unmapped_area(addr, len, flags, psize, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned long arch_get_unmapped_area_topdown(struct file *filp,</div><div class='hunk'>@@ -654,11 +676,17 @@ unsigned long arch_get_unmapped_area_topdown(struct file *filp,</div><div class='ctx'> 					     const unsigned long flags,</div><div class='ctx'> 					     vm_flags_t vm_flags)</div><div class='ctx'> {</div><div class='add'>+	unsigned int psize;</div><div class='add'>+</div><div class='ctx'> 	if (radix_enabled())</div><div class='ctx'> 		return generic_get_unmapped_area_topdown(filp, addr0, len, pgoff, flags, vm_flags);</div><div class='ctx'> </div><div class='del'>-	return slice_get_unmapped_area(addr0, len, flags,</div><div class='del'>-				       mm_ctx_user_psize(&amp;current-&gt;mm-&gt;context), 1);</div><div class='add'>+	if (filp &amp;&amp; is_file_hugepages(filp))</div><div class='add'>+		psize = file_to_psize(filp);</div><div class='add'>+	else</div><div class='add'>+		psize = mm_ctx_user_psize(&amp;current-&gt;mm-&gt;context);</div><div class='add'>+</div><div class='add'>+	return slice_get_unmapped_area(addr0, len, flags, psize, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned int notrace get_slice_psize(struct mm_struct *mm, unsigned long addr)</div><div class='hunk'>@@ -788,20 +816,4 @@ unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)</div><div class='ctx'> </div><div class='ctx'> 	return 1UL &lt;&lt; mmu_psize_to_shift(get_slice_psize(vma-&gt;vm_mm, vma-&gt;vm_start));</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int file_to_psize(struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct hstate *hstate = hstate_file(file);</div><div class='del'>-	return shift_to_mmu_psize(huge_page_shift(hstate));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,</div><div class='del'>-					unsigned long len, unsigned long pgoff,</div><div class='del'>-					unsigned long flags)</div><div class='del'>-{</div><div class='del'>-	if (radix_enabled())</div><div class='del'>-		return generic_hugetlb_get_unmapped_area(file, addr, len, pgoff, flags);</div><div class='del'>-</div><div class='del'>-	return slice_get_unmapped_area(addr, len, flags, file_to_psize(file), 1);</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_fault.c<br/>index f49fd873df8d..f5f8692e2c69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/copro_fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/copro_fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/copro_fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/copro_fault.c</a></div><div class='hunk'>@@ -12,8 +12,6 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/copro.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This ought to be kept in sync with the powerpc specific do_page_fault</div><div class='hunk'>@@ -135,13 +133,4 @@ int copro_calculate_slb(struct mm_struct *mm, u64 ea, struct copro_slb *slb)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(copro_calculate_slb);</div><div class='del'>-</div><div class='del'>-void copro_flush_all_slbs(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_SPU_BASE</div><div class='del'>-	spu_flush_all_slbs(mm);</div><div class='del'>-#endif</div><div class='del'>-	cxl_slbia(mm);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(copro_flush_all_slbs);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c<br/>index 81c77ddce2e3..806c74e0d5ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/fault.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/fault.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/fault.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='hunk'>@@ -218,7 +219,7 @@ static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 	// Read/write fault blocked by KUAP is bad, it can never succeed.</div><div class='ctx'> 	if (bad_kuap_fault(regs, address, is_write)) {</div><div class='ctx'> 		pr_crit_ratelimited("Kernel attempted to %s user page (%lx) - exploit attempt? (uid: %d)\n",</div><div class='del'>-				    is_write ? "write" : "read", address,</div><div class='add'>+				    str_write_read(is_write), address,</div><div class='ctx'> 				    from_kuid(&amp;init_user_ns, current_uid()));</div><div class='ctx'> </div><div class='ctx'> 		// Fault on user outside of certain regions (eg. copy_tofrom_user()) is bad</div><div class='hunk'>@@ -439,10 +440,16 @@ static int ___do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The kernel should never take an execute fault nor should it</div><div class='ctx'> 	 * take a page fault to a kernel address or a page fault to a user</div><div class='del'>-	 * address outside of dedicated places</div><div class='add'>+	 * address outside of dedicated places.</div><div class='add'>+	 *</div><div class='add'>+	 * Rather than kfence directly reporting false negatives, search whether</div><div class='add'>+	 * the NIP belongs to the fixup table for cases where fault could come</div><div class='add'>+	 * from functions like copy_from_kernel_nofault().</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(!is_user &amp;&amp; bad_kernel_fault(regs, error_code, address, is_write))) {</div><div class='del'>-		if (kfence_handle_page_fault(address, is_write, regs))</div><div class='add'>+		if (is_kfence_address((void *)address) &amp;&amp;</div><div class='add'>+		    !search_exception_tables(instruction_pointer(regs)) &amp;&amp;</div><div class='add'>+		    kfence_handle_page_fault(address, is_write, regs))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		return SIGSEGV;</div><div class='hunk'>@@ -619,7 +626,7 @@ static void __bad_page_fault(struct pt_regs *regs, int sig)</div><div class='ctx'> 	case INTERRUPT_DATA_STORAGE:</div><div class='ctx'> 	case INTERRUPT_H_DATA_STORAGE:</div><div class='ctx'> 		pr_alert("BUG: %s on %s at 0x%08lx\n", msg,</div><div class='del'>-			 is_write ? "write" : "read", regs-&gt;dar);</div><div class='add'>+			 str_write_read(is_write), regs-&gt;dar);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INTERRUPT_DATA_SEGMENT:</div><div class='ctx'> 		pr_alert("BUG: %s at 0x%08lx\n", msg, regs-&gt;dar);</div><div class='head'>diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c<br/>index 6b043180220a..d3c1b749dcfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/hugetlbpage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/hugetlbpage.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -113,6 +113,7 @@ static int __init pseries_alloc_bootmem_huge_page(struct hstate *hstate)</div><div class='ctx'> 	gpage_freearray[nr_gpages] = 0;</div><div class='ctx'> 	list_add(&amp;m-&gt;list, &amp;huge_boot_pages[0]);</div><div class='ctx'> 	m-&gt;hstate = hstate;</div><div class='add'>+	m-&gt;flags = 0;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c<br/>index 2978fcbe307e..745097554bea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/init-common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/init-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/init-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/init-common.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@ bool disable_kuep = !IS_ENABLED(CONFIG_PPC_KUEP);</div><div class='ctx'> bool disable_kuap = !IS_ENABLED(CONFIG_PPC_KUAP);</div><div class='ctx'> #ifdef CONFIG_KFENCE</div><div class='ctx'> bool __ro_after_init kfence_disabled;</div><div class='add'>+bool __ro_after_init kfence_early_init = !!CONFIG_KFENCE_SAMPLE_INTERVAL;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int __init parse_nosmep(char *p)</div><div class='head'>diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c<br/>index d96bbc001e73..b6f3ae03ca9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/init_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/init_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/init_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/init_64.c</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include &lt;linux/libfdt.h&gt;</div><div class='ctx'> #include &lt;linux/memremap.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;linux/bootmem_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -386,10 +387,13 @@ void __ref vmemmap_free(unsigned long start, unsigned long end,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HAVE_BOOTMEM_INFO_NODE</div><div class='ctx'> void register_page_bootmem_memmap(unsigned long section_nr,</div><div class='ctx'> 				  struct page *start_page, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_HAVE_BOOTMEM_INFO_NODE */</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SPARSEMEM_VMEMMAP */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/ioremap.c b/arch/powerpc/mm/ioremap.c<br/>index 7b0afcabd89f..4b4feba9873b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ioremap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ioremap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ioremap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ioremap.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;asm/io-workarounds.h&gt;</div><div class='ctx'> </div><div class='ctx'> unsigned long ioremap_bot;</div><div class='ctx'> EXPORT_SYMBOL(ioremap_bot);</div><div class='hunk'>@@ -14,8 +13,6 @@ void __iomem *ioremap(phys_addr_t addr, unsigned long size)</div><div class='ctx'> 	pgprot_t prot = pgprot_noncached(PAGE_KERNEL);</div><div class='ctx'> 	void *caller = __builtin_return_address(0);</div><div class='ctx'> </div><div class='del'>-	if (iowa_is_active())</div><div class='del'>-		return iowa_ioremap(addr, size, prot, caller);</div><div class='ctx'> 	return __ioremap_caller(addr, size, prot, caller);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap);</div><div class='hunk'>@@ -25,8 +22,6 @@ void __iomem *ioremap_wc(phys_addr_t addr, unsigned long size)</div><div class='ctx'> 	pgprot_t prot = pgprot_noncached_wc(PAGE_KERNEL);</div><div class='ctx'> 	void *caller = __builtin_return_address(0);</div><div class='ctx'> </div><div class='del'>-	if (iowa_is_active())</div><div class='del'>-		return iowa_ioremap(addr, size, prot, caller);</div><div class='ctx'> 	return __ioremap_caller(addr, size, prot, caller);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap_wc);</div><div class='hunk'>@@ -36,22 +31,18 @@ void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)</div><div class='ctx'> 	pgprot_t prot = pgprot_cached(PAGE_KERNEL);</div><div class='ctx'> 	void *caller = __builtin_return_address(0);</div><div class='ctx'> </div><div class='del'>-	if (iowa_is_active())</div><div class='del'>-		return iowa_ioremap(addr, size, prot, caller);</div><div class='ctx'> 	return __ioremap_caller(addr, size, prot, caller);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long flags)</div><div class='add'>+void __iomem *ioremap_prot(phys_addr_t addr, size_t size, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	pte_t pte = __pte(flags);</div><div class='add'>+	pte_t pte = __pte(pgprot_val(prot));</div><div class='ctx'> 	void *caller = __builtin_return_address(0);</div><div class='ctx'> </div><div class='ctx'> 	/* writeable implies dirty for kernel addresses */</div><div class='ctx'> 	if (pte_write(pte))</div><div class='ctx'> 		pte = pte_mkdirty(pte);</div><div class='ctx'> </div><div class='del'>-	if (iowa_is_active())</div><div class='del'>-		return iowa_ioremap(addr, size, pte_pgprot(pte), caller);</div><div class='ctx'> 	return __ioremap_caller(addr, size, pte_pgprot(pte), caller);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ioremap_prot);</div><div class='head'>diff --git a/arch/powerpc/mm/ioremap_64.c b/arch/powerpc/mm/ioremap_64.c<br/>index d24e5f166723..fb8b55bd2cd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ioremap_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ioremap_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ioremap_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ioremap_64.c</a></div><div class='hunk'>@@ -52,6 +52,6 @@ void iounmap(volatile void __iomem *token)</div><div class='ctx'> 	if (!slab_is_available())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	generic_iounmap(PCI_FIX_ADDR(token));</div><div class='add'>+	generic_iounmap(token);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(iounmap);</div><div class='head'>diff --git a/arch/powerpc/mm/kasan/init_32.c b/arch/powerpc/mm/kasan/init_32.c<br/>index aa9aa11927b2..1d083597464f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/kasan/init_32.c</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/sched/task.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='ctx'> </div><div class='ctx'> static pgprot_t __init kasan_prot_ro(void)</div><div class='hunk'>@@ -165,7 +165,7 @@ void __init kasan_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* At this point kasan is fully initialized. Enable error messages */</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='del'>-	pr_info("KASAN init done\n");</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init kasan_late_init(void)</div><div class='head'>diff --git a/arch/powerpc/mm/kasan/init_book3e_64.c b/arch/powerpc/mm/kasan/init_book3e_64.c<br/>index 43c03b84ff32..0d3a73d6d4b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_book3e_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_book3e_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_book3e_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/kasan/init_book3e_64.c</a></div><div class='hunk'>@@ -40,19 +40,19 @@ static int __init kasan_map_kernel_page(unsigned long ea, unsigned long pa, pgpr</div><div class='ctx'> 	pgdp = pgd_offset_k(ea);</div><div class='ctx'> 	p4dp = p4d_offset(pgdp, ea);</div><div class='ctx'> 	if (kasan_pud_table(*p4dp)) {</div><div class='del'>-		pudp = memblock_alloc(PUD_TABLE_SIZE, PUD_TABLE_SIZE);</div><div class='add'>+		pudp = memblock_alloc_or_panic(PUD_TABLE_SIZE, PUD_TABLE_SIZE);</div><div class='ctx'> 		memcpy(pudp, kasan_early_shadow_pud, PUD_TABLE_SIZE);</div><div class='ctx'> 		p4d_populate(&amp;init_mm, p4dp, pudp);</div><div class='ctx'> 	}</div><div class='ctx'> 	pudp = pud_offset(p4dp, ea);</div><div class='ctx'> 	if (kasan_pmd_table(*pudp)) {</div><div class='del'>-		pmdp = memblock_alloc(PMD_TABLE_SIZE, PMD_TABLE_SIZE);</div><div class='add'>+		pmdp = memblock_alloc_or_panic(PMD_TABLE_SIZE, PMD_TABLE_SIZE);</div><div class='ctx'> 		memcpy(pmdp, kasan_early_shadow_pmd, PMD_TABLE_SIZE);</div><div class='ctx'> 		pud_populate(&amp;init_mm, pudp, pmdp);</div><div class='ctx'> 	}</div><div class='ctx'> 	pmdp = pmd_offset(pudp, ea);</div><div class='ctx'> 	if (kasan_pte_table(*pmdp)) {</div><div class='del'>-		ptep = memblock_alloc(PTE_TABLE_SIZE, PTE_TABLE_SIZE);</div><div class='add'>+		ptep = memblock_alloc_or_panic(PTE_TABLE_SIZE, PTE_TABLE_SIZE);</div><div class='ctx'> 		memcpy(ptep, kasan_early_shadow_pte, PTE_TABLE_SIZE);</div><div class='ctx'> 		pmd_populate_kernel(&amp;init_mm, pmdp, ptep);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -74,7 +74,7 @@ static void __init kasan_init_phys_region(void *start, void *end)</div><div class='ctx'> 	k_start = ALIGN_DOWN((unsigned long)kasan_mem_to_shadow(start), PAGE_SIZE);</div><div class='ctx'> 	k_end = ALIGN((unsigned long)kasan_mem_to_shadow(end), PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	va = memblock_alloc(k_end - k_start, PAGE_SIZE);</div><div class='add'>+	va = memblock_alloc_or_panic(k_end - k_start, PAGE_SIZE);</div><div class='ctx'> 	for (k_cur = k_start; k_cur &lt; k_end; k_cur += PAGE_SIZE, va += PAGE_SIZE)</div><div class='ctx'> 		kasan_map_kernel_page(k_cur, __pa(va), PAGE_KERNEL);</div><div class='ctx'> }</div><div class='hunk'>@@ -127,7 +127,7 @@ void __init kasan_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable error messages */</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='del'>-	pr_info("KASAN init done\n");</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init kasan_late_init(void) { }</div><div class='head'>diff --git a/arch/powerpc/mm/kasan/init_book3s_64.c b/arch/powerpc/mm/kasan/init_book3s_64.c<br/>index 3fb5ce4f48f4..dcafa641804c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_book3s_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/kasan/init_book3s_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/kasan/init_book3s_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/kasan/init_book3s_64.c</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> </div><div class='del'>-DEFINE_STATIC_KEY_FALSE(powerpc_kasan_enabled_key);</div><div class='del'>-</div><div class='ctx'> static void __init kasan_init_phys_region(void *start, void *end)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long k_start, k_end, k_cur;</div><div class='hunk'>@@ -32,7 +30,7 @@ static void __init kasan_init_phys_region(void *start, void *end)</div><div class='ctx'> 	k_start = ALIGN_DOWN((unsigned long)kasan_mem_to_shadow(start), PAGE_SIZE);</div><div class='ctx'> 	k_end = ALIGN((unsigned long)kasan_mem_to_shadow(end), PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	va = memblock_alloc(k_end - k_start, PAGE_SIZE);</div><div class='add'>+	va = memblock_alloc_or_panic(k_end - k_start, PAGE_SIZE);</div><div class='ctx'> 	for (k_cur = k_start; k_cur &lt; k_end; k_cur += PAGE_SIZE, va += PAGE_SIZE)</div><div class='ctx'> 		map_kernel_page(k_cur, __pa(va), PAGE_KERNEL);</div><div class='ctx'> }</div><div class='hunk'>@@ -92,11 +90,9 @@ void __init kasan_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	memset(kasan_early_shadow_page, 0, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	static_branch_inc(&amp;powerpc_kasan_enabled_key);</div><div class='del'>-</div><div class='ctx'> 	/* Enable error messages */</div><div class='ctx'> 	init_task.kasan_depth = 0;</div><div class='del'>-	pr_info("KASAN init done\n");</div><div class='add'>+	kasan_init_generic();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init kasan_early_init(void) { }</div><div class='head'>diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c<br/>index 1221c561b43a..3ddbfdbfa941 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/mem.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/mem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/mem.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/mem.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -273,7 +273,7 @@ void __init paging_init(void)</div><div class='ctx'> 	mark_nonram_nosave();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init mem_init(void)</div><div class='add'>+void __init arch_mm_preinit(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * book3s is limited to 16 page sizes due to encoding this in</div><div class='hunk'>@@ -295,22 +295,6 @@ void __init mem_init(void)</div><div class='ctx'> </div><div class='ctx'> 	kasan_late_init();</div><div class='ctx'> </div><div class='del'>-	memblock_free_all();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	{</div><div class='del'>-		unsigned long pfn, highmem_mapnr;</div><div class='del'>-</div><div class='del'>-		highmem_mapnr = lowmem_end_addr &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		for (pfn = highmem_mapnr; pfn &lt; max_mapnr; ++pfn) {</div><div class='del'>-			phys_addr_t paddr = (phys_addr_t)pfn &lt;&lt; PAGE_SHIFT;</div><div class='del'>-			struct page *page = pfn_to_page(pfn);</div><div class='del'>-			if (memblock_is_memory(paddr) &amp;&amp; !memblock_is_reserved(paddr))</div><div class='del'>-				free_highmem_page(page);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_HIGHMEM */</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_PPC_E500) &amp;&amp; !defined(CONFIG_SMP)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If smp is enabled, next_tlbcam_idx is initialized in the cpu up</div><div class='hunk'>@@ -319,28 +303,6 @@ void __init mem_init(void)</div><div class='ctx'> 	per_cpu(next_tlbcam_idx, smp_processor_id()) =</div><div class='ctx'> 		(mfspr(SPRN_TLB1CFG) &amp; TLBnCFG_N_ENTRY) - 1;</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC32</div><div class='del'>-	pr_info("Kernel virtual memory layout:\n");</div><div class='del'>-#ifdef CONFIG_KASAN</div><div class='del'>-	pr_info("  * 0x%08lx..0x%08lx  : kasan shadow mem\n",</div><div class='del'>-		KASAN_SHADOW_START, KASAN_SHADOW_END);</div><div class='del'>-#endif</div><div class='del'>-	pr_info("  * 0x%08lx..0x%08lx  : fixmap\n", FIXADDR_START, FIXADDR_TOP);</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	pr_info("  * 0x%08lx..0x%08lx  : highmem PTEs\n",</div><div class='del'>-		PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP));</div><div class='del'>-#endif /* CONFIG_HIGHMEM */</div><div class='del'>-	if (ioremap_bot != IOREMAP_TOP)</div><div class='del'>-		pr_info("  * 0x%08lx..0x%08lx  : early ioremap\n",</div><div class='del'>-			ioremap_bot, IOREMAP_TOP);</div><div class='del'>-	pr_info("  * 0x%08lx..0x%08lx  : vmalloc &amp; ioremap\n",</div><div class='del'>-		VMALLOC_START, VMALLOC_END);</div><div class='del'>-#ifdef MODULES_VADDR</div><div class='del'>-	pr_info("  * 0x%08lx..0x%08lx  : modules\n",</div><div class='del'>-		MODULES_VADDR, MODULES_END);</div><div class='del'>-#endif</div><div class='del'>-#endif /* CONFIG_PPC32 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void free_initmem(void)</div><div class='hunk'>@@ -376,7 +338,7 @@ static int __init add_system_ram_resources(void)</div><div class='ctx'> 			 */</div><div class='ctx'> 			res-&gt;end = end - 1;</div><div class='ctx'> 			res-&gt;flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;</div><div class='del'>-			WARN_ON(request_resource(&amp;iomem_resource, res) &lt; 0);</div><div class='add'>+			WARN_ON(insert_resource(&amp;iomem_resource, res) &lt; 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/nohash/44x.c b/arch/powerpc/mm/nohash/44x.c<br/>index 1beae802bb1c..6d10c6d8be71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/44x.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/44x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/44x.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/44x.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/8xx.c b/arch/powerpc/mm/nohash/8xx.c<br/>index 8b54f12d1889..ab1505cf42bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/8xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/8xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/8xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/8xx.c</a></div><div class='hunk'>@@ -54,20 +54,13 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t *pmdp = pmd_off_k(va);</div><div class='ctx'> 	pte_t *ptep;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(psize != MMU_PAGE_512K &amp;&amp; psize != MMU_PAGE_8M))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	unsigned int shift = mmu_psize_to_shift(psize);</div><div class='ctx'> </div><div class='ctx'> 	if (new) {</div><div class='ctx'> 		if (WARN_ON(slab_is_available()))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		if (psize == MMU_PAGE_512K) {</div><div class='del'>-			ptep = early_pte_alloc_kernel(pmdp, va);</div><div class='del'>-			/* The PTE should never be already present */</div><div class='del'>-			if (WARN_ON(pte_present(*ptep) &amp;&amp; pgprot_val(prot)))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-		} else {</div><div class='add'>+		if (psize == MMU_PAGE_8M) {</div><div class='ctx'> 			if (WARN_ON(!pmd_none(*pmdp) || !pmd_none(*(pmdp + 1))))</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -78,20 +71,25 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,</div><div class='ctx'> 			pmd_populate_kernel(&amp;init_mm, pmdp + 1, ptep);</div><div class='ctx'> </div><div class='ctx'> 			ptep = (pte_t *)pmdp;</div><div class='add'>+		} else {</div><div class='add'>+			ptep = early_pte_alloc_kernel(pmdp, va);</div><div class='add'>+			/* The PTE should never be already present */</div><div class='add'>+			if (WARN_ON(pte_present(*ptep) &amp;&amp; pgprot_val(prot)))</div><div class='add'>+				return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (psize == MMU_PAGE_512K)</div><div class='del'>-			ptep = pte_offset_kernel(pmdp, va);</div><div class='del'>-		else</div><div class='add'>+		if (psize == MMU_PAGE_8M)</div><div class='ctx'> 			ptep = (pte_t *)pmdp;</div><div class='add'>+		else</div><div class='add'>+			ptep = pte_offset_kernel(pmdp, va);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!ptep))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	set_huge_pte_at(&amp;init_mm, va, ptep,</div><div class='del'>-			pte_mkhuge(pfn_pte(pa &gt;&gt; PAGE_SHIFT, prot)),</div><div class='del'>-			1UL &lt;&lt; mmu_psize_to_shift(psize));</div><div class='add'>+			arch_make_huge_pte(pfn_pte(pa &gt;&gt; PAGE_SHIFT, prot), shift, 0),</div><div class='add'>+			1UL &lt;&lt; shift);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -123,14 +121,18 @@ static int mmu_mapin_ram_chunk(unsigned long offset, unsigned long top,</div><div class='ctx'> 	unsigned long p = offset;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!IS_ALIGNED(offset, SZ_512K) || !IS_ALIGNED(top, SZ_512K));</div><div class='add'>+	WARN_ON(!IS_ALIGNED(offset, SZ_16K) || !IS_ALIGNED(top, SZ_16K));</div><div class='ctx'> </div><div class='add'>+	for (; p &lt; ALIGN(p, SZ_512K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_16K, v += SZ_16K)</div><div class='add'>+		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_16K, new);</div><div class='ctx'> 	for (; p &lt; ALIGN(p, SZ_8M) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_512K, v += SZ_512K)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);</div><div class='ctx'> 	for (; p &lt; ALIGN_DOWN(top, SZ_8M) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_8M, v += SZ_8M)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new);</div><div class='ctx'> 	for (; p &lt; ALIGN_DOWN(top, SZ_512K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_512K, v += SZ_512K)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);</div><div class='add'>+	for (; p &lt; ALIGN_DOWN(top, SZ_16K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_16K, v += SZ_16K)</div><div class='add'>+		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_16K, new);</div><div class='ctx'> </div><div class='ctx'> 	if (!new)</div><div class='ctx'> 		flush_tlb_kernel_range(PAGE_OFFSET + v, PAGE_OFFSET + top);</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/book3e_pgtable.c b/arch/powerpc/mm/nohash/book3e_pgtable.c<br/>index ad2a7c26f2a0..062e8785c1bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/book3e_pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/book3e_pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/book3e_pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/book3e_pgtable.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/nohash/kaslr_booke.c b/arch/powerpc/mm/nohash/kaslr_booke.c<br/>index 5c8d1bb98b3e..5e4897daaaea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/kaslr_booke.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/kaslr_booke.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/kaslr_booke.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/kaslr_booke.c</a></div><div class='hunk'>@@ -178,7 +178,7 @@ static void __init get_crash_kernel(void *fdt, unsigned long size)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = parse_crashkernel(boot_command_line, size, &amp;crash_size,</div><div class='del'>-				&amp;crash_base, NULL, NULL);</div><div class='add'>+				&amp;crash_base, NULL, NULL, NULL);</div><div class='ctx'> 	if (ret != 0 || crash_size == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (crash_base == 0)</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/mmu_context.c b/arch/powerpc/mm/nohash/mmu_context.c<br/>index 0b181da40ddb..28a96a10c907 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/mmu_context.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/mmu_context.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/mmu_context.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/mmu_context.c</a></div><div class='hunk'>@@ -203,15 +203,7 @@ static unsigned int steal_context_up(unsigned int id)</div><div class='ctx'> static void set_context(unsigned long id, pgd_t *pgd)</div><div class='ctx'> {</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PPC_8xx)) {</div><div class='del'>-		s16 offset = (s16)(__pa(swapper_pg_dir));</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Register M_TWB will contain base address of level 1 table minus the</div><div class='del'>-		 * lower part of the kernel PGDIR base address, so that all accesses to</div><div class='del'>-		 * level 1 table are done relative to lower part of kernel PGDIR base</div><div class='del'>-		 * address.</div><div class='del'>-		 */</div><div class='del'>-		mtspr(SPRN_M_TWB, __pa(pgd) - offset);</div><div class='add'>+		mtspr(SPRN_M_TWB, __pa(pgd));</div><div class='ctx'> </div><div class='ctx'> 		/* Update context */</div><div class='ctx'> 		mtspr(SPRN_M_CASID, id - 1);</div><div class='hunk'>@@ -385,21 +377,11 @@ void __init mmu_context_init(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate the maps used by context management</div><div class='ctx'> 	 */</div><div class='del'>-	context_map = memblock_alloc(CTX_MAP_SIZE, SMP_CACHE_BYTES);</div><div class='del'>-	if (!context_map)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      CTX_MAP_SIZE);</div><div class='del'>-	context_mm = memblock_alloc(sizeof(void *) * (LAST_CONTEXT + 1),</div><div class='add'>+	context_map = memblock_alloc_or_panic(CTX_MAP_SIZE, SMP_CACHE_BYTES);</div><div class='add'>+	context_mm = memblock_alloc_or_panic(sizeof(void *) * (LAST_CONTEXT + 1),</div><div class='ctx'> 				    SMP_CACHE_BYTES);</div><div class='del'>-	if (!context_mm)</div><div class='del'>-		panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-		      sizeof(void *) * (LAST_CONTEXT + 1));</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_SMP)) {</div><div class='del'>-		stale_map[boot_cpuid] = memblock_alloc(CTX_MAP_SIZE, SMP_CACHE_BYTES);</div><div class='del'>-		if (!stale_map[boot_cpuid])</div><div class='del'>-			panic("%s: Failed to allocate %zu bytes\n", __func__,</div><div class='del'>-			      CTX_MAP_SIZE);</div><div class='del'>-</div><div class='add'>+		stale_map[boot_cpuid] = memblock_alloc_or_panic(CTX_MAP_SIZE, SMP_CACHE_BYTES);</div><div class='ctx'> 		cpuhp_setup_state_nocalls(CPUHP_POWERPC_MMU_CTX_PREPARE,</div><div class='ctx'> 					  "powerpc/mmu/ctx:prepare",</div><div class='ctx'> 					  mmu_ctx_cpu_prepare, mmu_ctx_cpu_dead);</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c<br/>index b653a7be4cb1..0a650742f3a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/tlb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/tlb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/tlb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/tlb.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='ctx'> #include &lt;asm/hugetlb.h&gt;</div><div class='ctx'> #include &lt;asm/paca.h&gt;</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/tlb_64e.c b/arch/powerpc/mm/nohash/tlb_64e.c<br/>index d26656b07b72..4f925adf2695 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/tlb_64e.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/nohash/tlb_64e.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/nohash/tlb_64e.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/nohash/tlb_64e.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='head'>diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c<br/>index 3c1da08304d0..603a0f652ba6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/numa.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/numa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/numa.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/numa.c</a></div><div class='hunk'>@@ -1336,7 +1336,7 @@ int hot_add_scn_to_nid(unsigned long scn_addr)</div><div class='ctx'> 	return nid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 hot_add_drconf_memory_max(void)</div><div class='add'>+u64 hot_add_drconf_memory_max(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *memory = NULL;</div><div class='ctx'> 	struct device_node *dn = NULL;</div><div class='head'>diff --git a/arch/powerpc/mm/pgtable-frag.c b/arch/powerpc/mm/pgtable-frag.c<br/>index e89f64a0f24a..77e55eac16e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable-frag.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable-frag.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable-frag.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/pgtable-frag.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@ void pte_frag_destroy(void *pte_frag)</div><div class='ctx'> 	count = ((unsigned long)pte_frag &amp; ~PAGE_MASK) &gt;&gt; PTE_FRAG_SIZE_SHIFT;</div><div class='ctx'> 	/* We allow PTE_FRAG_NR fragments from a PTE page */</div><div class='ctx'> 	if (atomic_sub_and_test(PTE_FRAG_NR - count, &amp;ptdesc-&gt;pt_frag_refcount)) {</div><div class='del'>-		pagetable_pte_dtor(ptdesc);</div><div class='add'>+		pagetable_dtor(ptdesc);</div><div class='ctx'> 		pagetable_free(ptdesc);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -56,19 +56,17 @@ static pte_t *__alloc_for_ptecache(struct mm_struct *mm, int kernel)</div><div class='ctx'> {</div><div class='ctx'> 	void *ret = NULL;</div><div class='ctx'> 	struct ptdesc *ptdesc;</div><div class='add'>+	gfp_t gfp = PGALLOC_GFP;</div><div class='ctx'> </div><div class='del'>-	if (!kernel) {</div><div class='del'>-		ptdesc = pagetable_alloc(PGALLOC_GFP | __GFP_ACCOUNT, 0);</div><div class='del'>-		if (!ptdesc)</div><div class='del'>-			return NULL;</div><div class='del'>-		if (!pagetable_pte_ctor(ptdesc)) {</div><div class='del'>-			pagetable_free(ptdesc);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ptdesc = pagetable_alloc(PGALLOC_GFP, 0);</div><div class='del'>-		if (!ptdesc)</div><div class='del'>-			return NULL;</div><div class='add'>+	if (!kernel)</div><div class='add'>+		gfp |= __GFP_ACCOUNT;</div><div class='add'>+</div><div class='add'>+	ptdesc = pagetable_alloc(gfp, 0);</div><div class='add'>+	if (!ptdesc)</div><div class='add'>+		return NULL;</div><div class='add'>+	if (!pagetable_pte_ctor(mm, ptdesc)) {</div><div class='add'>+		pagetable_free(ptdesc);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;ptdesc-&gt;pt_frag_refcount, 1);</div><div class='hunk'>@@ -111,7 +109,7 @@ static void pte_free_now(struct rcu_head *head)</div><div class='ctx'> 	struct ptdesc *ptdesc;</div><div class='ctx'> </div><div class='ctx'> 	ptdesc = container_of(head, struct ptdesc, pt_rcu_head);</div><div class='del'>-	pagetable_pte_dtor(ptdesc);</div><div class='add'>+	pagetable_dtor(ptdesc);</div><div class='ctx'> 	pagetable_free(ptdesc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -124,12 +122,10 @@ void pte_fragment_free(unsigned long *table, int kernel)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(atomic_read(&amp;ptdesc-&gt;pt_frag_refcount) &lt;= 0);</div><div class='ctx'> 	if (atomic_dec_and_test(&amp;ptdesc-&gt;pt_frag_refcount)) {</div><div class='del'>-		if (kernel)</div><div class='del'>-			pagetable_free(ptdesc);</div><div class='del'>-		else if (folio_test_clear_active(ptdesc_folio(ptdesc)))</div><div class='del'>-			call_rcu(&amp;ptdesc-&gt;pt_rcu_head, pte_free_now);</div><div class='del'>-		else</div><div class='add'>+		if (kernel || !folio_test_clear_active(ptdesc_folio(ptdesc)))</div><div class='ctx'> 			pte_free_now(&amp;ptdesc-&gt;pt_rcu_head);</div><div class='add'>+		else</div><div class='add'>+			call_rcu(&amp;ptdesc-&gt;pt_rcu_head, pte_free_now);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c<br/>index 7316396e452d..56d7e8960e77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/pgtable.c</a></div><div class='hunk'>@@ -87,9 +87,9 @@ static pte_t set_pte_filter_hash(pte_t pte, unsigned long addr)</div><div class='ctx'> 		struct folio *folio = maybe_pte_to_folio(pte);</div><div class='ctx'> 		if (!folio)</div><div class='ctx'> 			return pte;</div><div class='del'>-		if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags)) {</div><div class='add'>+		if (!test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f)) {</div><div class='ctx'> 			flush_dcache_icache_folio(folio);</div><div class='del'>-			set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+			set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return pte;</div><div class='hunk'>@@ -127,13 +127,13 @@ static inline pte_t set_pte_filter(pte_t pte, unsigned long addr)</div><div class='ctx'> 		return pte;</div><div class='ctx'> </div><div class='ctx'> 	/* If the page clean, we move on */</div><div class='del'>-	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		return pte;</div><div class='ctx'> </div><div class='ctx'> 	/* If it's an exec fault, we flush the cache and make it clean */</div><div class='ctx'> 	if (is_exec_fault()) {</div><div class='ctx'> 		flush_dcache_icache_folio(folio);</div><div class='del'>-		set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+		set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> 		return pte;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -175,12 +175,12 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,</div><div class='ctx'> 		goto bail;</div><div class='ctx'> </div><div class='ctx'> 	/* If the page is already clean, we move on */</div><div class='del'>-	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='add'>+	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='ctx'> 		goto bail;</div><div class='ctx'> </div><div class='ctx'> 	/* Clean the page and set PG_dcache_clean */</div><div class='ctx'> 	flush_dcache_icache_folio(folio);</div><div class='del'>-	set_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	set_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> </div><div class='ctx'>  bail:</div><div class='ctx'> 	return pte_mkexec(pte);</div><div class='hunk'>@@ -398,7 +398,7 @@ void assert_pte_locked(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pmd_none(*pmd))</div><div class='ctx'> 		return;</div><div class='del'>-	pte = pte_offset_map_nolock(mm, pmd, addr, &amp;ptl);</div><div class='add'>+	pte = pte_offset_map_ro_nolock(mm, pmd, addr, &amp;ptl);</div><div class='ctx'> 	BUG_ON(!pte);</div><div class='ctx'> 	assert_spin_locked(ptl);</div><div class='ctx'> 	pte_unmap(pte);</div><div class='hunk'>@@ -509,7 +509,7 @@ pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (pmd_trans_huge(pmd) || pmd_devmap(pmd)) {</div><div class='add'>+	if (pmd_trans_huge(pmd)) {</div><div class='ctx'> 		if (is_thp)</div><div class='ctx'> 			*is_thp = true;</div><div class='ctx'> 		ret_pte = (pte_t *)pmdp;</div><div class='head'>diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c<br/>index 787b22206386..0c9ef705803e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/pgtable_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/pgtable_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/pgtable_32.c</a></div><div class='hunk'>@@ -50,13 +50,8 @@ notrace void __init early_ioremap_init(void)</div><div class='ctx'> </div><div class='ctx'> void __init *early_alloc_pgtable(unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	void *ptr = memblock_alloc(size, size);</div><div class='add'>+	return memblock_alloc_or_panic(size, size);</div><div class='ctx'> </div><div class='del'>-	if (!ptr)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, size, size);</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t __init *early_pte_alloc_kernel(pmd_t *pmdp, unsigned long va)</div><div class='hunk'>@@ -109,7 +104,7 @@ static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)</div><div class='ctx'> 	p = memstart_addr + s;</div><div class='ctx'> 	for (; s &lt; top; s += PAGE_SIZE) {</div><div class='ctx'> 		ktext = core_kernel_text(v);</div><div class='del'>-		map_kernel_page(v, p, ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL);</div><div class='add'>+		map_kernel_page(v, p, ktext ? PAGE_KERNEL_X : PAGE_KERNEL);</div><div class='ctx'> 		v += PAGE_SIZE;</div><div class='ctx'> 		p += PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/mm/ptdump/8xx.c b/arch/powerpc/mm/ptdump/8xx.c<br/>index b5c79b11ea3c..4ca9cf7a90c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/8xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/8xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/8xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ptdump/8xx.c</a></div><div class='hunk'>@@ -69,7 +69,7 @@ static const struct flag_info flag_array[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pgtable_level pg_level[5] = {</div><div class='add'>+struct ptdump_pg_level pg_level[5] = {</div><div class='ctx'> 	{ /* pgd */</div><div class='ctx'> 		.flag	= flag_array,</div><div class='ctx'> 		.num	= ARRAY_SIZE(flag_array),</div><div class='head'>diff --git a/arch/powerpc/mm/ptdump/book3s64.c b/arch/powerpc/mm/ptdump/book3s64.c<br/>index 5ad92d9dc5d1..6b2da9241d4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/book3s64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/book3s64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/book3s64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ptdump/book3s64.c</a></div><div class='hunk'>@@ -102,7 +102,7 @@ static const struct flag_info flag_array[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pgtable_level pg_level[5] = {</div><div class='add'>+struct ptdump_pg_level pg_level[5] = {</div><div class='ctx'> 	{ /* pgd */</div><div class='ctx'> 		.flag	= flag_array,</div><div class='ctx'> 		.num	= ARRAY_SIZE(flag_array),</div><div class='head'>diff --git a/arch/powerpc/mm/ptdump/ptdump.c b/arch/powerpc/mm/ptdump/ptdump.c<br/>index 9dc239967b77..b2358d794855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/ptdump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/ptdump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/ptdump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ptdump/ptdump.c</a></div><div class='hunk'>@@ -298,6 +298,38 @@ static void populate_markers(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void note_page_pte(struct ptdump_state *pt_st, unsigned long addr, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 4, pte_val(pte));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void note_page_pmd(struct ptdump_state *pt_st, unsigned long addr, pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 3, pmd_val(pmd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void note_page_pud(struct ptdump_state *pt_st, unsigned long addr, pud_t pud)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 2, pud_val(pud));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void note_page_p4d(struct ptdump_state *pt_st, unsigned long addr, p4d_t p4d)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 1, p4d_val(p4d));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void note_page_pgd(struct ptdump_state *pt_st, unsigned long addr, pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	note_page(pt_st, addr, 0, pgd_val(pgd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void note_page_flush(struct ptdump_state *pt_st)</div><div class='add'>+{</div><div class='add'>+	pte_t pte_zero = {0};</div><div class='add'>+</div><div class='add'>+	note_page(pt_st, 0, -1, pte_val(pte_zero));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ptdump_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	struct pg_state st = {</div><div class='hunk'>@@ -305,7 +337,12 @@ static int ptdump_show(struct seq_file *m, void *v)</div><div class='ctx'> 		.marker = address_markers,</div><div class='ctx'> 		.level = -1,</div><div class='ctx'> 		.ptdump = {</div><div class='del'>-			.note_page = note_page,</div><div class='add'>+			.note_page_pte = note_page_pte,</div><div class='add'>+			.note_page_pmd = note_page_pmd,</div><div class='add'>+			.note_page_pud = note_page_pud,</div><div class='add'>+			.note_page_p4d = note_page_p4d,</div><div class='add'>+			.note_page_pgd = note_page_pgd,</div><div class='add'>+			.note_page_flush = note_page_flush,</div><div class='ctx'> 			.range = ptdump_range,</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='hunk'>@@ -338,7 +375,12 @@ bool ptdump_check_wx(void)</div><div class='ctx'> 		.level = -1,</div><div class='ctx'> 		.check_wx = true,</div><div class='ctx'> 		.ptdump = {</div><div class='del'>-			.note_page = note_page,</div><div class='add'>+			.note_page_pte = note_page_pte,</div><div class='add'>+			.note_page_pmd = note_page_pmd,</div><div class='add'>+			.note_page_pud = note_page_pud,</div><div class='add'>+			.note_page_p4d = note_page_p4d,</div><div class='add'>+			.note_page_pgd = note_page_pgd,</div><div class='add'>+			.note_page_flush = note_page_flush,</div><div class='ctx'> 			.range = ptdump_range,</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/powerpc/mm/ptdump/ptdump.h b/arch/powerpc/mm/ptdump/ptdump.h<br/>index 154efae96ae0..4232aa4b57ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/ptdump.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/ptdump.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/ptdump.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ptdump/ptdump.h</a></div><div class='hunk'>@@ -11,12 +11,12 @@ struct flag_info {</div><div class='ctx'> 	int		shift;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pgtable_level {</div><div class='add'>+struct ptdump_pg_level {</div><div class='ctx'> 	const struct flag_info *flag;</div><div class='ctx'> 	size_t num;</div><div class='ctx'> 	u64 mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern struct pgtable_level pg_level[5];</div><div class='add'>+extern struct ptdump_pg_level pg_level[5];</div><div class='ctx'> </div><div class='ctx'> void pt_dump_size(struct seq_file *m, unsigned long delta);</div><div class='head'>diff --git a/arch/powerpc/mm/ptdump/shared.c b/arch/powerpc/mm/ptdump/shared.c<br/>index 39c30c62b7ea..58998960eb9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/shared.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/mm/ptdump/shared.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/mm/ptdump/shared.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/mm/ptdump/shared.c</a></div><div class='hunk'>@@ -67,7 +67,7 @@ static const struct flag_info flag_array[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pgtable_level pg_level[5] = {</div><div class='add'>+struct ptdump_pg_level pg_level[5] = {</div><div class='ctx'> 	{ /* pgd */</div><div class='ctx'> 		.flag	= flag_array,</div><div class='ctx'> 		.num	= ARRAY_SIZE(flag_array),</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h<br/>index cdea5dccaefe..8334cd667bba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/net/bpf_jit.h</a></div><div class='hunk'>@@ -8,10 +8,11 @@</div><div class='ctx'> #ifndef _BPF_JIT_H</div><div class='ctx'> #define _BPF_JIT_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64_ELF_ABI_V1</div><div class='ctx'> #define FUNCTION_DESCR_SIZE	24</div><div class='hunk'>@@ -21,6 +22,9 @@</div><div class='ctx'> </div><div class='ctx'> #define CTX_NIA(ctx) ((unsigned long)ctx-&gt;idx * 4)</div><div class='ctx'> </div><div class='add'>+#define SZL			sizeof(unsigned long)</div><div class='add'>+#define BPF_INSN_SAFETY		64</div><div class='add'>+</div><div class='ctx'> #define PLANT_INSTR(d, idx, instr)					      \</div><div class='ctx'> 	do { if (d) { (d)[idx] = instr; } idx++; } while (0)</div><div class='ctx'> #define EMIT(instr)		PLANT_INSTR(image, ctx-&gt;idx, instr)</div><div class='hunk'>@@ -47,8 +51,16 @@</div><div class='ctx'> 		EMIT(PPC_INST_BRANCH_COND | (((cond) &amp; 0x3ff) &lt;&lt; 16) | (offset &amp; 0xfffc));					\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-/* Sign-extended 32-bit immediate load */</div><div class='add'>+/*</div><div class='add'>+ * Sign-extended 32-bit immediate load</div><div class='add'>+ *</div><div class='add'>+ * If this is a dummy pass (!image), account for</div><div class='add'>+ * maximum possible instructions.</div><div class='add'>+ */</div><div class='ctx'> #define PPC_LI32(d, i)		do {					      \</div><div class='add'>+	if (!image)							      \</div><div class='add'>+		ctx-&gt;idx += 2;						      \</div><div class='add'>+	else {								      \</div><div class='ctx'> 		if ((int)(uintptr_t)(i) &gt;= -32768 &amp;&amp;			      \</div><div class='ctx'> 				(int)(uintptr_t)(i) &lt; 32768)		      \</div><div class='ctx'> 			EMIT(PPC_RAW_LI(d, i));				      \</div><div class='hunk'>@@ -56,10 +68,15 @@</div><div class='ctx'> 			EMIT(PPC_RAW_LIS(d, IMM_H(i)));			      \</div><div class='ctx'> 			if (IMM_L(i))					      \</div><div class='ctx'> 				EMIT(PPC_RAW_ORI(d, d, IMM_L(i)));	      \</div><div class='del'>-		} } while(0)</div><div class='add'>+		}							      \</div><div class='add'>+	} } while (0)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='add'>+/* If dummy pass (!image), account for maximum possible instructions */</div><div class='ctx'> #define PPC_LI64(d, i)		do {					      \</div><div class='add'>+	if (!image)							      \</div><div class='add'>+		ctx-&gt;idx += 5;						      \</div><div class='add'>+	else {								      \</div><div class='ctx'> 		if ((long)(i) &gt;= -2147483648 &amp;&amp;				      \</div><div class='ctx'> 				(long)(i) &lt; 2147483648)			      \</div><div class='ctx'> 			PPC_LI32(d, i);					      \</div><div class='hunk'>@@ -80,7 +97,20 @@</div><div class='ctx'> 			if ((uintptr_t)(i) &amp; 0x000000000000ffffULL)	      \</div><div class='ctx'> 				EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) &amp;       \</div><div class='ctx'> 							0xffff));             \</div><div class='del'>-		} } while (0)</div><div class='add'>+		}							      \</div><div class='add'>+	} } while (0)</div><div class='add'>+#define PPC_LI_ADDR	PPC_LI64</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_PPC_KERNEL_PCREL</div><div class='add'>+#define PPC64_LOAD_PACA()						      \</div><div class='add'>+	EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc)))</div><div class='add'>+#else</div><div class='add'>+#define PPC64_LOAD_PACA()	do {} while (0)</div><div class='add'>+#endif</div><div class='add'>+#else</div><div class='add'>+#define PPC_LI64(d, i)	BUILD_BUG()</div><div class='add'>+#define PPC_LI_ADDR	PPC_LI32</div><div class='add'>+#define PPC64_LOAD_PACA() BUILD_BUG()</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -131,9 +161,11 @@ struct codegen_context {</div><div class='ctx'> 	unsigned int seen;</div><div class='ctx'> 	unsigned int idx;</div><div class='ctx'> 	unsigned int stack_size;</div><div class='del'>-	int b2p[MAX_BPF_JIT_REG + 2];</div><div class='add'>+	int b2p[MAX_BPF_JIT_REG + 3];</div><div class='ctx'> 	unsigned int exentry_idx;</div><div class='ctx'> 	unsigned int alt_exit_addr;</div><div class='add'>+	u64 arena_vm_start;</div><div class='add'>+	u64 user_vm_start;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define bpf_to_ppc(r)	(ctx-&gt;b2p[r])</div><div class='hunk'>@@ -165,12 +197,13 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		       u32 *addrs, int pass, bool extra_pass);</div><div class='ctx'> void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx);</div><div class='ctx'> void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx);</div><div class='add'>+void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx);</div><div class='ctx'> void bpf_jit_realloc_regs(struct codegen_context *ctx);</div><div class='ctx'> int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr);</div><div class='ctx'> </div><div class='ctx'> int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass,</div><div class='ctx'> 			  struct codegen_context *ctx, int insn_idx,</div><div class='del'>-			  int jmp_off, int dst_reg);</div><div class='add'>+			  int jmp_off, int dst_reg, u32 code);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c<br/>index 2a36cc2e7e9e..88ad5ba7b87f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -18,15 +18,85 @@</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/kprobes.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bpf_jit.h"</div><div class='ctx'> </div><div class='add'>+/* These offsets are from bpf prog end and stay the same across progs */</div><div class='add'>+static int bpf_jit_ool_stub, bpf_jit_long_branch_stub;</div><div class='add'>+</div><div class='ctx'> static void bpf_jit_fill_ill_insns(void *area, unsigned int size)</div><div class='ctx'> {</div><div class='ctx'> 	memset32(area, BREAKPOINT_INSTRUCTION, size / 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dummy_tramp(void);</div><div class='add'>+</div><div class='add'>+asm (</div><div class='add'>+"	.pushsection .text, \"ax\", @progbits	;"</div><div class='add'>+"	.global dummy_tramp			;"</div><div class='add'>+"	.type dummy_tramp, @function		;"</div><div class='add'>+"dummy_tramp:					;"</div><div class='add'>+#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+"	blr					;"</div><div class='add'>+#else</div><div class='add'>+/* LR is always in r11, so we don't need a 'mflr r11' here */</div><div class='add'>+"	mtctr	11				;"</div><div class='add'>+"	mtlr	0				;"</div><div class='add'>+"	bctr					;"</div><div class='add'>+#endif</div><div class='add'>+"	.size dummy_tramp, .-dummy_tramp	;"</div><div class='add'>+"	.popsection				;"</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int ool_stub_idx, long_branch_stub_idx;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Out-of-line stub:</div><div class='add'>+	 *	mflr	r0</div><div class='add'>+	 *	[b|bl]	tramp</div><div class='add'>+	 *	mtlr	r0 // only with CONFIG_PPC_FTRACE_OUT_OF_LINE</div><div class='add'>+	 *	b	bpf_func + 4</div><div class='add'>+	 */</div><div class='add'>+	ool_stub_idx = ctx-&gt;idx;</div><div class='add'>+	EMIT(PPC_RAW_MFLR(_R0));</div><div class='add'>+	EMIT(PPC_RAW_NOP());</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		EMIT(PPC_RAW_MTLR(_R0));</div><div class='add'>+	WARN_ON_ONCE(!is_offset_in_branch_range(4 - (long)ctx-&gt;idx * 4));</div><div class='add'>+	EMIT(PPC_RAW_BRANCH(4 - (long)ctx-&gt;idx * 4));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Long branch stub:</div><div class='add'>+	 *	.long	&lt;dummy_tramp_addr&gt;</div><div class='add'>+	 *	mflr	r11</div><div class='add'>+	 *	bcl	20,31,$+4</div><div class='add'>+	 *	mflr	r12</div><div class='add'>+	 *	ld	r12, -8-SZL(r12)</div><div class='add'>+	 *	mtctr	r12</div><div class='add'>+	 *	mtlr	r11 // needed to retain ftrace ABI</div><div class='add'>+	 *	bctr</div><div class='add'>+	 */</div><div class='add'>+	if (image)</div><div class='add'>+		*((unsigned long *)&amp;image[ctx-&gt;idx]) = (unsigned long)dummy_tramp;</div><div class='add'>+	ctx-&gt;idx += SZL / 4;</div><div class='add'>+	long_branch_stub_idx = ctx-&gt;idx;</div><div class='add'>+	EMIT(PPC_RAW_MFLR(_R11));</div><div class='add'>+	EMIT(PPC_RAW_BCL4());</div><div class='add'>+	EMIT(PPC_RAW_MFLR(_R12));</div><div class='add'>+	EMIT(PPC_RAW_LL(_R12, _R12, -8-SZL));</div><div class='add'>+	EMIT(PPC_RAW_MTCTR(_R12));</div><div class='add'>+	EMIT(PPC_RAW_MTLR(_R11));</div><div class='add'>+	EMIT(PPC_RAW_BCTR());</div><div class='add'>+</div><div class='add'>+	if (!bpf_jit_ool_stub) {</div><div class='add'>+		bpf_jit_ool_stub = (ctx-&gt;idx - ool_stub_idx) * 4;</div><div class='add'>+		bpf_jit_long_branch_stub = (ctx-&gt;idx - long_branch_stub_idx) * 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr)</div><div class='ctx'> {</div><div class='ctx'> 	if (!exit_addr || is_offset_in_branch_range(exit_addr - (ctx-&gt;idx * 4))) {</div><div class='hunk'>@@ -134,6 +204,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure that the stack is quadword aligned. */</div><div class='ctx'> 	cgctx.stack_size = round_up(fp-&gt;aux-&gt;stack_depth, 16);</div><div class='add'>+	cgctx.arena_vm_start = bpf_arena_get_kern_vm_start(fp-&gt;aux-&gt;arena);</div><div class='add'>+	cgctx.user_vm_start = bpf_arena_get_user_vm_start(fp-&gt;aux-&gt;arena);</div><div class='ctx'> </div><div class='ctx'> 	/* Scouting faux-generate pass 0 */</div><div class='ctx'> 	if (bpf_jit_build_body(fp, NULL, NULL, &amp;cgctx, addrs, 0, false)) {</div><div class='hunk'>@@ -222,7 +294,7 @@ skip_init_ctx:</div><div class='ctx'> </div><div class='ctx'> 	fp-&gt;bpf_func = (void *)fimage;</div><div class='ctx'> 	fp-&gt;jited = 1;</div><div class='del'>-	fp-&gt;jited_len = proglen + FUNCTION_DESCR_SIZE;</div><div class='add'>+	fp-&gt;jited_len = cgctx.idx * 4 + FUNCTION_DESCR_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (!fp-&gt;is_func || extra_pass) {</div><div class='ctx'> 		if (bpf_jit_binary_pack_finalize(fhdr, hdr)) {</div><div class='hunk'>@@ -256,7 +328,7 @@ out:</div><div class='ctx'>  */</div><div class='ctx'> int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass,</div><div class='ctx'> 			  struct codegen_context *ctx, int insn_idx, int jmp_off,</div><div class='del'>-			  int dst_reg)</div><div class='add'>+			  int dst_reg, u32 code)</div><div class='ctx'> {</div><div class='ctx'> 	off_t offset;</div><div class='ctx'> 	unsigned long pc;</div><div class='hunk'>@@ -285,6 +357,9 @@ int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass</div><div class='ctx'> 		(ctx-&gt;exentry_idx * BPF_FIXUP_LEN * 4);</div><div class='ctx'> </div><div class='ctx'> 	fixup[0] = PPC_RAW_LI(dst_reg, 0);</div><div class='add'>+	if (BPF_CLASS(code) == BPF_ST || BPF_CLASS(code) == BPF_STX)</div><div class='add'>+		fixup[0] = PPC_RAW_NOP();</div><div class='add'>+</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PPC32))</div><div class='ctx'> 		fixup[1] = PPC_RAW_LI(dst_reg - 1, 0); /* clear higher 32-bit register too */</div><div class='ctx'> </div><div class='hunk'>@@ -365,7 +440,790 @@ bool bpf_jit_supports_kfunc_call(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_supports_arena(void)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_PPC64);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool bpf_jit_supports_far_kfunc_call(void)</div><div class='ctx'> {</div><div class='ctx'> 	return IS_ENABLED(CONFIG_PPC64);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)</div><div class='add'>+{</div><div class='add'>+	if (!in_arena)</div><div class='add'>+		return true;</div><div class='add'>+	switch (insn-&gt;code) {</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_H:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='add'>+		if (bpf_atomic_is_load_store(insn))</div><div class='add'>+			return false;</div><div class='add'>+		return IS_ENABLED(CONFIG_PPC64);</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *arch_alloc_bpf_trampoline(unsigned int size)</div><div class='add'>+{</div><div class='add'>+	return bpf_prog_pack_alloc(size, bpf_jit_fill_ill_insns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_free_bpf_trampoline(void *image, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	bpf_prog_pack_free(image, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_protect_bpf_trampoline(void *image, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int invoke_bpf_prog(u32 *image, u32 *ro_image, struct codegen_context *ctx,</div><div class='add'>+			   struct bpf_tramp_link *l, int regs_off, int retval_off,</div><div class='add'>+			   int run_ctx_off, bool save_ret)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *p = l-&gt;link.prog;</div><div class='add'>+	ppc_inst_t branch_insn;</div><div class='add'>+	u32 jmp_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Save cookie */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64)) {</div><div class='add'>+		PPC_LI64(_R3, l-&gt;cookie);</div><div class='add'>+		EMIT(PPC_RAW_STD(_R3, _R1, run_ctx_off + offsetof(struct bpf_tramp_run_ctx,</div><div class='add'>+				 bpf_cookie)));</div><div class='add'>+	} else {</div><div class='add'>+		PPC_LI32(_R3, l-&gt;cookie &gt;&gt; 32);</div><div class='add'>+		PPC_LI32(_R4, l-&gt;cookie);</div><div class='add'>+		EMIT(PPC_RAW_STW(_R3, _R1,</div><div class='add'>+				 run_ctx_off + offsetof(struct bpf_tramp_run_ctx, bpf_cookie)));</div><div class='add'>+		EMIT(PPC_RAW_STW(_R4, _R1,</div><div class='add'>+				 run_ctx_off + offsetof(struct bpf_tramp_run_ctx, bpf_cookie) + 4));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* __bpf_prog_enter(p, &amp;bpf_tramp_run_ctx) */</div><div class='add'>+	PPC_LI_ADDR(_R3, p);</div><div class='add'>+	EMIT(PPC_RAW_MR(_R25, _R3));</div><div class='add'>+	EMIT(PPC_RAW_ADDI(_R4, _R1, run_ctx_off));</div><div class='add'>+	ret = bpf_jit_emit_func_call_rel(image, ro_image, ctx,</div><div class='add'>+					 (unsigned long)bpf_trampoline_enter(p));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Remember prog start time returned by __bpf_prog_enter */</div><div class='add'>+	EMIT(PPC_RAW_MR(_R26, _R3));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if (__bpf_prog_enter(p) == 0)</div><div class='add'>+	 *	goto skip_exec_of_prog;</div><div class='add'>+	 *</div><div class='add'>+	 * Emit a nop to be later patched with conditional branch, once offset is known</div><div class='add'>+	 */</div><div class='add'>+	EMIT(PPC_RAW_CMPLI(_R3, 0));</div><div class='add'>+	jmp_idx = ctx-&gt;idx;</div><div class='add'>+	EMIT(PPC_RAW_NOP());</div><div class='add'>+</div><div class='add'>+	/* p-&gt;bpf_func(ctx) */</div><div class='add'>+	EMIT(PPC_RAW_ADDI(_R3, _R1, regs_off));</div><div class='add'>+	if (!p-&gt;jited)</div><div class='add'>+		PPC_LI_ADDR(_R4, (unsigned long)p-&gt;insnsi);</div><div class='add'>+	/* Account for max possible instructions during dummy pass for size calculation */</div><div class='add'>+	if (image &amp;&amp; !create_branch(&amp;branch_insn, (u32 *)&amp;ro_image[ctx-&gt;idx],</div><div class='add'>+				    (unsigned long)p-&gt;bpf_func,</div><div class='add'>+				    BRANCH_SET_LINK)) {</div><div class='add'>+		image[ctx-&gt;idx] = ppc_inst_val(branch_insn);</div><div class='add'>+		ctx-&gt;idx++;</div><div class='add'>+	} else {</div><div class='add'>+		EMIT(PPC_RAW_LL(_R12, _R25, offsetof(struct bpf_prog, bpf_func)));</div><div class='add'>+		EMIT(PPC_RAW_MTCTR(_R12));</div><div class='add'>+		EMIT(PPC_RAW_BCTRL());</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (save_ret)</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, retval_off));</div><div class='add'>+</div><div class='add'>+	/* Fix up branch */</div><div class='add'>+	if (image) {</div><div class='add'>+		if (create_cond_branch(&amp;branch_insn, &amp;image[jmp_idx],</div><div class='add'>+				       (unsigned long)&amp;image[ctx-&gt;idx], COND_EQ &lt;&lt; 16))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		image[jmp_idx] = ppc_inst_val(branch_insn);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* __bpf_prog_exit(p, start_time, &amp;bpf_tramp_run_ctx) */</div><div class='add'>+	EMIT(PPC_RAW_MR(_R3, _R25));</div><div class='add'>+	EMIT(PPC_RAW_MR(_R4, _R26));</div><div class='add'>+	EMIT(PPC_RAW_ADDI(_R5, _R1, run_ctx_off));</div><div class='add'>+	ret = bpf_jit_emit_func_call_rel(image, ro_image, ctx,</div><div class='add'>+					 (unsigned long)bpf_trampoline_exit(p));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int invoke_bpf_mod_ret(u32 *image, u32 *ro_image, struct codegen_context *ctx,</div><div class='add'>+			      struct bpf_tramp_links *tl, int regs_off, int retval_off,</div><div class='add'>+			      int run_ctx_off, u32 *branches)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The first fmod_ret program will receive a garbage return value.</div><div class='add'>+	 * Set this to 0 to avoid confusing the program.</div><div class='add'>+	 */</div><div class='add'>+	EMIT(PPC_RAW_LI(_R3, 0));</div><div class='add'>+	EMIT(PPC_RAW_STL(_R3, _R1, retval_off));</div><div class='add'>+	for (i = 0; i &lt; tl-&gt;nr_links; i++) {</div><div class='add'>+		if (invoke_bpf_prog(image, ro_image, ctx, tl-&gt;links[i], regs_off, retval_off,</div><div class='add'>+				    run_ctx_off, true))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * mod_ret prog stored return value after prog ctx. Emit:</div><div class='add'>+		 * if (*(u64 *)(ret_val) !=  0)</div><div class='add'>+		 *	goto do_fexit;</div><div class='add'>+		 */</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, retval_off));</div><div class='add'>+		EMIT(PPC_RAW_CMPLI(_R3, 0));</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Save the location of the branch and generate a nop, which is</div><div class='add'>+		 * replaced with a conditional jump once do_fexit (i.e. the</div><div class='add'>+		 * start of the fexit invocation) is finalized.</div><div class='add'>+		 */</div><div class='add'>+		branches[i] = ctx-&gt;idx;</div><div class='add'>+		EMIT(PPC_RAW_NOP());</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bpf_trampoline_setup_tail_call_cnt(u32 *image, struct codegen_context *ctx,</div><div class='add'>+					       int func_frame_offset, int r4_off)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64)) {</div><div class='add'>+		/* See bpf_jit_stack_tailcallcnt() */</div><div class='add'>+		int tailcallcnt_offset = 7 * 8;</div><div class='add'>+</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, func_frame_offset - tailcallcnt_offset));</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, -tailcallcnt_offset));</div><div class='add'>+	} else {</div><div class='add'>+		/* See bpf_jit_stack_offsetof() and BPF_PPC_TC */</div><div class='add'>+		EMIT(PPC_RAW_LL(_R4, _R1, r4_off));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bpf_trampoline_restore_tail_call_cnt(u32 *image, struct codegen_context *ctx,</div><div class='add'>+						 int func_frame_offset, int r4_off)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64)) {</div><div class='add'>+		/* See bpf_jit_stack_tailcallcnt() */</div><div class='add'>+		int tailcallcnt_offset = 7 * 8;</div><div class='add'>+</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, -tailcallcnt_offset));</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, func_frame_offset - tailcallcnt_offset));</div><div class='add'>+	} else {</div><div class='add'>+		/* See bpf_jit_stack_offsetof() and BPF_PPC_TC */</div><div class='add'>+		EMIT(PPC_RAW_STL(_R4, _R1, r4_off));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bpf_trampoline_save_args(u32 *image, struct codegen_context *ctx, int func_frame_offset,</div><div class='add'>+				     int nr_regs, int regs_off)</div><div class='add'>+{</div><div class='add'>+	int param_save_area_offset;</div><div class='add'>+</div><div class='add'>+	param_save_area_offset = func_frame_offset; /* the two frames we alloted */</div><div class='add'>+	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; nr_regs; i++) {</div><div class='add'>+		if (i &lt; 8) {</div><div class='add'>+			EMIT(PPC_RAW_STL(_R3 + i, _R1, regs_off + i * SZL));</div><div class='add'>+		} else {</div><div class='add'>+			EMIT(PPC_RAW_LL(_R3, _R1, param_save_area_offset + i * SZL));</div><div class='add'>+			EMIT(PPC_RAW_STL(_R3, _R1, regs_off + i * SZL));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Used when restoring just the register parameters when returning back */</div><div class='add'>+static void bpf_trampoline_restore_args_regs(u32 *image, struct codegen_context *ctx,</div><div class='add'>+					     int nr_regs, int regs_off)</div><div class='add'>+{</div><div class='add'>+	for (int i = 0; i &lt; nr_regs &amp;&amp; i &lt; 8; i++)</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3 + i, _R1, regs_off + i * SZL));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Used when we call into the traced function. Replicate parameter save area */</div><div class='add'>+static void bpf_trampoline_restore_args_stack(u32 *image, struct codegen_context *ctx,</div><div class='add'>+					      int func_frame_offset, int nr_regs, int regs_off)</div><div class='add'>+{</div><div class='add'>+	int param_save_area_offset;</div><div class='add'>+</div><div class='add'>+	param_save_area_offset = func_frame_offset; /* the two frames we alloted */</div><div class='add'>+	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */</div><div class='add'>+</div><div class='add'>+	for (int i = 8; i &lt; nr_regs; i++) {</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, param_save_area_offset + i * SZL));</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, STACK_FRAME_MIN_SIZE + i * SZL));</div><div class='add'>+	}</div><div class='add'>+	bpf_trampoline_restore_args_regs(image, ctx, nr_regs, regs_off);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_image,</div><div class='add'>+					 void *rw_image_end, void *ro_image,</div><div class='add'>+					 const struct btf_func_model *m, u32 flags,</div><div class='add'>+					 struct bpf_tramp_links *tlinks,</div><div class='add'>+					 void *func_addr)</div><div class='add'>+{</div><div class='add'>+	int regs_off, nregs_off, ip_off, run_ctx_off, retval_off, nvr_off, alt_lr_off, r4_off = 0;</div><div class='add'>+	int i, ret, nr_regs, bpf_frame_size = 0, bpf_dummy_frame_size = 0, func_frame_offset;</div><div class='add'>+	struct bpf_tramp_links *fmod_ret = &amp;tlinks[BPF_TRAMP_MODIFY_RETURN];</div><div class='add'>+	struct bpf_tramp_links *fentry = &amp;tlinks[BPF_TRAMP_FENTRY];</div><div class='add'>+	struct bpf_tramp_links *fexit = &amp;tlinks[BPF_TRAMP_FEXIT];</div><div class='add'>+	struct codegen_context codegen_ctx, *ctx;</div><div class='add'>+	u32 *image = (u32 *)rw_image;</div><div class='add'>+	ppc_inst_t branch_insn;</div><div class='add'>+	u32 *branches = NULL;</div><div class='add'>+	bool save_ret;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC32))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	nr_regs = m-&gt;nr_args;</div><div class='add'>+	/* Extra registers for struct arguments */</div><div class='add'>+	for (i = 0; i &lt; m-&gt;nr_args; i++)</div><div class='add'>+		if (m-&gt;arg_size[i] &gt; SZL)</div><div class='add'>+			nr_regs += round_up(m-&gt;arg_size[i], SZL) / SZL - 1;</div><div class='add'>+</div><div class='add'>+	if (nr_regs &gt; MAX_BPF_FUNC_ARGS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ctx = &amp;codegen_ctx;</div><div class='add'>+	memset(ctx, 0, sizeof(*ctx));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Generated stack layout:</div><div class='add'>+	 *</div><div class='add'>+	 * func prev back chain         [ back chain        ]</div><div class='add'>+	 *                              [                   ]</div><div class='add'>+	 * bpf prog redzone/tailcallcnt [ ...               ] 64 bytes (64-bit powerpc)</div><div class='add'>+	 *                              [                   ] --</div><div class='add'>+	 * LR save area                 [ r0 save (64-bit)  ]   | header</div><div class='add'>+	 *                              [ r0 save (32-bit)  ]   |</div><div class='add'>+	 * dummy frame for unwind       [ back chain 1      ] --</div><div class='add'>+	 *                              [ padding           ] align stack frame</div><div class='add'>+	 *       r4_off                 [ r4 (tailcallcnt)  ] optional - 32-bit powerpc</div><div class='add'>+	 *       alt_lr_off             [ real lr (ool stub)] optional - actual lr</div><div class='add'>+	 *                              [ r26               ]</div><div class='add'>+	 *       nvr_off                [ r25               ] nvr save area</div><div class='add'>+	 *       retval_off             [ return value      ]</div><div class='add'>+	 *                              [ reg argN          ]</div><div class='add'>+	 *                              [ ...               ]</div><div class='add'>+	 *       regs_off               [ reg_arg1          ] prog ctx context</div><div class='add'>+	 *       nregs_off              [ args count        ]</div><div class='add'>+	 *       ip_off                 [ traced function   ]</div><div class='add'>+	 *                              [ ...               ]</div><div class='add'>+	 *       run_ctx_off            [ bpf_tramp_run_ctx ]</div><div class='add'>+	 *                              [ reg argN          ]</div><div class='add'>+	 *                              [ ...               ]</div><div class='add'>+	 *       param_save_area        [ reg_arg1          ] min 8 doublewords, per ABI</div><div class='add'>+	 *                              [ TOC save (64-bit) ] --</div><div class='add'>+	 *                              [ LR save (64-bit)  ]   | header</div><div class='add'>+	 *                              [ LR save (32-bit)  ]   |</div><div class='add'>+	 * bpf trampoline frame	        [ back chain 2      ] --</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Minimum stack frame header */</div><div class='add'>+	bpf_frame_size = STACK_FRAME_MIN_SIZE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Room for parameter save area.</div><div class='add'>+	 *</div><div class='add'>+	 * As per the ABI, this is required if we call into the traced</div><div class='add'>+	 * function (BPF_TRAMP_F_CALL_ORIG):</div><div class='add'>+	 * - if the function takes more than 8 arguments for the rest to spill onto the stack</div><div class='add'>+	 * - or, if the function has variadic arguments</div><div class='add'>+	 * - or, if this functions's prototype was not available to the caller</div><div class='add'>+	 *</div><div class='add'>+	 * Reserve space for at least 8 registers for now. This can be optimized later.</div><div class='add'>+	 */</div><div class='add'>+	bpf_frame_size += (nr_regs &gt; 8 ? nr_regs : 8) * SZL;</div><div class='add'>+</div><div class='add'>+	/* Room for struct bpf_tramp_run_ctx */</div><div class='add'>+	run_ctx_off = bpf_frame_size;</div><div class='add'>+	bpf_frame_size += round_up(sizeof(struct bpf_tramp_run_ctx), SZL);</div><div class='add'>+</div><div class='add'>+	/* Room for IP address argument */</div><div class='add'>+	ip_off = bpf_frame_size;</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_IP_ARG)</div><div class='add'>+		bpf_frame_size += SZL;</div><div class='add'>+</div><div class='add'>+	/* Room for args count */</div><div class='add'>+	nregs_off = bpf_frame_size;</div><div class='add'>+	bpf_frame_size += SZL;</div><div class='add'>+</div><div class='add'>+	/* Room for args */</div><div class='add'>+	regs_off = bpf_frame_size;</div><div class='add'>+	bpf_frame_size += nr_regs * SZL;</div><div class='add'>+</div><div class='add'>+	/* Room for return value of func_addr or fentry prog */</div><div class='add'>+	retval_off = bpf_frame_size;</div><div class='add'>+	save_ret = flags &amp; (BPF_TRAMP_F_CALL_ORIG | BPF_TRAMP_F_RET_FENTRY_RET);</div><div class='add'>+	if (save_ret)</div><div class='add'>+		bpf_frame_size += SZL;</div><div class='add'>+</div><div class='add'>+	/* Room for nvr save area */</div><div class='add'>+	nvr_off = bpf_frame_size;</div><div class='add'>+	bpf_frame_size += 2 * SZL;</div><div class='add'>+</div><div class='add'>+	/* Optional save area for actual LR in case of ool ftrace */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {</div><div class='add'>+		alt_lr_off = bpf_frame_size;</div><div class='add'>+		bpf_frame_size += SZL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC32)) {</div><div class='add'>+		if (nr_regs &lt; 2) {</div><div class='add'>+			r4_off = bpf_frame_size;</div><div class='add'>+			bpf_frame_size += SZL;</div><div class='add'>+		} else {</div><div class='add'>+			r4_off = regs_off + SZL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Padding to align stack frame, if any */</div><div class='add'>+	bpf_frame_size = round_up(bpf_frame_size, SZL * 2);</div><div class='add'>+</div><div class='add'>+	/* Dummy frame size for proper unwind - includes 64-bytes red zone for 64-bit powerpc */</div><div class='add'>+	bpf_dummy_frame_size = STACK_FRAME_MIN_SIZE + 64;</div><div class='add'>+</div><div class='add'>+	/* Offset to the traced function's stack frame */</div><div class='add'>+	func_frame_offset = bpf_dummy_frame_size + bpf_frame_size;</div><div class='add'>+</div><div class='add'>+	/* Create dummy frame for unwind, store original return value */</div><div class='add'>+	EMIT(PPC_RAW_STL(_R0, _R1, PPC_LR_STKOFF));</div><div class='add'>+	/* Protect red zone where tail call count goes */</div><div class='add'>+	EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_dummy_frame_size));</div><div class='add'>+</div><div class='add'>+	/* Create our stack frame */</div><div class='add'>+	EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_frame_size));</div><div class='add'>+</div><div class='add'>+	/* 64-bit: Save TOC and load kernel TOC */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) &amp;&amp; !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL)) {</div><div class='add'>+		EMIT(PPC_RAW_STD(_R2, _R1, 24));</div><div class='add'>+		PPC64_LOAD_PACA();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 32-bit: save tail call count in r4 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC32) &amp;&amp; nr_regs &lt; 2)</div><div class='add'>+		EMIT(PPC_RAW_STL(_R4, _R1, r4_off));</div><div class='add'>+</div><div class='add'>+	bpf_trampoline_save_args(image, ctx, func_frame_offset, nr_regs, regs_off);</div><div class='add'>+</div><div class='add'>+	/* Save our return address */</div><div class='add'>+	EMIT(PPC_RAW_MFLR(_R3));</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, alt_lr_off));</div><div class='add'>+	else</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Save ip address of the traced function.</div><div class='add'>+	 * We could recover this from LR, but we will need to address for OOL trampoline,</div><div class='add'>+	 * and optional GEP area.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) || flags &amp; BPF_TRAMP_F_IP_ARG) {</div><div class='add'>+		EMIT(PPC_RAW_LWZ(_R4, _R3, 4));</div><div class='add'>+		EMIT(PPC_RAW_SLWI(_R4, _R4, 6));</div><div class='add'>+		EMIT(PPC_RAW_SRAWI(_R4, _R4, 6));</div><div class='add'>+		EMIT(PPC_RAW_ADD(_R3, _R3, _R4));</div><div class='add'>+		EMIT(PPC_RAW_ADDI(_R3, _R3, 4));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_IP_ARG)</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, ip_off));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))</div><div class='add'>+		/* Fake our LR for unwind */</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));</div><div class='add'>+</div><div class='add'>+	/* Save function arg count -- see bpf_get_func_arg_cnt() */</div><div class='add'>+	EMIT(PPC_RAW_LI(_R3, nr_regs));</div><div class='add'>+	EMIT(PPC_RAW_STL(_R3, _R1, nregs_off));</div><div class='add'>+</div><div class='add'>+	/* Save nv regs */</div><div class='add'>+	EMIT(PPC_RAW_STL(_R25, _R1, nvr_off));</div><div class='add'>+	EMIT(PPC_RAW_STL(_R26, _R1, nvr_off + SZL));</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		PPC_LI_ADDR(_R3, (unsigned long)im);</div><div class='add'>+		ret = bpf_jit_emit_func_call_rel(image, ro_image, ctx,</div><div class='add'>+						 (unsigned long)__bpf_tramp_enter);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fentry-&gt;nr_links; i++)</div><div class='add'>+		if (invoke_bpf_prog(image, ro_image, ctx, fentry-&gt;links[i], regs_off, retval_off,</div><div class='add'>+				    run_ctx_off, flags &amp; BPF_TRAMP_F_RET_FENTRY_RET))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (fmod_ret-&gt;nr_links) {</div><div class='add'>+		branches = kcalloc(fmod_ret-&gt;nr_links, sizeof(u32), GFP_KERNEL);</div><div class='add'>+		if (!branches)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		if (invoke_bpf_mod_ret(image, ro_image, ctx, fmod_ret, regs_off, retval_off,</div><div class='add'>+				       run_ctx_off, branches)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Call the traced function */</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		/*</div><div class='add'>+		 * The address in LR save area points to the correct point in the original function</div><div class='add'>+		 * with both PPC_FTRACE_OUT_OF_LINE as well as with traditional ftrace instruction</div><div class='add'>+		 * sequence</div><div class='add'>+		 */</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));</div><div class='add'>+		EMIT(PPC_RAW_MTCTR(_R3));</div><div class='add'>+</div><div class='add'>+		/* Replicate tail_call_cnt before calling the original BPF prog */</div><div class='add'>+		if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX)</div><div class='add'>+			bpf_trampoline_setup_tail_call_cnt(image, ctx, func_frame_offset, r4_off);</div><div class='add'>+</div><div class='add'>+		/* Restore args */</div><div class='add'>+		bpf_trampoline_restore_args_stack(image, ctx, func_frame_offset, nr_regs, regs_off);</div><div class='add'>+</div><div class='add'>+		/* Restore TOC for 64-bit */</div><div class='add'>+		if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) &amp;&amp; !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))</div><div class='add'>+			EMIT(PPC_RAW_LD(_R2, _R1, 24));</div><div class='add'>+		EMIT(PPC_RAW_BCTRL());</div><div class='add'>+		if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) &amp;&amp; !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))</div><div class='add'>+			PPC64_LOAD_PACA();</div><div class='add'>+</div><div class='add'>+		/* Store return value for bpf prog to access */</div><div class='add'>+		EMIT(PPC_RAW_STL(_R3, _R1, retval_off));</div><div class='add'>+</div><div class='add'>+		/* Restore updated tail_call_cnt */</div><div class='add'>+		if (flags &amp; BPF_TRAMP_F_TAIL_CALL_CTX)</div><div class='add'>+			bpf_trampoline_restore_tail_call_cnt(image, ctx, func_frame_offset, r4_off);</div><div class='add'>+</div><div class='add'>+		/* Reserve space to patch branch instruction to skip fexit progs */</div><div class='add'>+		if (ro_image) /* image is NULL for dummy pass */</div><div class='add'>+			im-&gt;ip_after_call = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='add'>+		EMIT(PPC_RAW_NOP());</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update branches saved in invoke_bpf_mod_ret with address of do_fexit */</div><div class='add'>+	for (i = 0; i &lt; fmod_ret-&gt;nr_links &amp;&amp; image; i++) {</div><div class='add'>+		if (create_cond_branch(&amp;branch_insn, &amp;image[branches[i]],</div><div class='add'>+				       (unsigned long)&amp;image[ctx-&gt;idx], COND_NE &lt;&lt; 16)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		image[branches[i]] = ppc_inst_val(branch_insn);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fexit-&gt;nr_links; i++)</div><div class='add'>+		if (invoke_bpf_prog(image, ro_image, ctx, fexit-&gt;links[i], regs_off, retval_off,</div><div class='add'>+				    run_ctx_off, false)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='add'>+		if (ro_image) /* image is NULL for dummy pass */</div><div class='add'>+			im-&gt;ip_epilogue = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='add'>+		PPC_LI_ADDR(_R3, im);</div><div class='add'>+		ret = bpf_jit_emit_func_call_rel(image, ro_image, ctx,</div><div class='add'>+						 (unsigned long)__bpf_tramp_exit);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_RESTORE_REGS)</div><div class='add'>+		bpf_trampoline_restore_args_regs(image, ctx, nr_regs, regs_off);</div><div class='add'>+</div><div class='add'>+	/* Restore return value of func_addr or fentry prog */</div><div class='add'>+	if (save_ret)</div><div class='add'>+		EMIT(PPC_RAW_LL(_R3, _R1, retval_off));</div><div class='add'>+</div><div class='add'>+	/* Restore nv regs */</div><div class='add'>+	EMIT(PPC_RAW_LL(_R26, _R1, nvr_off + SZL));</div><div class='add'>+	EMIT(PPC_RAW_LL(_R25, _R1, nvr_off));</div><div class='add'>+</div><div class='add'>+	/* Epilogue */</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) &amp;&amp; !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))</div><div class='add'>+		EMIT(PPC_RAW_LD(_R2, _R1, 24));</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_SKIP_FRAME) {</div><div class='add'>+		/* Skip the traced function and return to parent */</div><div class='add'>+		EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));</div><div class='add'>+		EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));</div><div class='add'>+		EMIT(PPC_RAW_MTLR(_R0));</div><div class='add'>+		EMIT(PPC_RAW_BLR());</div><div class='add'>+	} else {</div><div class='add'>+		if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {</div><div class='add'>+			EMIT(PPC_RAW_LL(_R0, _R1, alt_lr_off));</div><div class='add'>+			EMIT(PPC_RAW_MTLR(_R0));</div><div class='add'>+			EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));</div><div class='add'>+			EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));</div><div class='add'>+			EMIT(PPC_RAW_BLR());</div><div class='add'>+		} else {</div><div class='add'>+			EMIT(PPC_RAW_LL(_R0, _R1, bpf_frame_size + PPC_LR_STKOFF));</div><div class='add'>+			EMIT(PPC_RAW_MTCTR(_R0));</div><div class='add'>+			EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));</div><div class='add'>+			EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));</div><div class='add'>+			EMIT(PPC_RAW_MTLR(_R0));</div><div class='add'>+			EMIT(PPC_RAW_BCTR());</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make sure the trampoline generation logic doesn't overflow */</div><div class='add'>+	if (image &amp;&amp; WARN_ON_ONCE(&amp;image[ctx-&gt;idx] &gt; (u32 *)rw_image_end - BPF_INSN_SAFETY)) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+	ret = ctx-&gt;idx * 4 + BPF_INSN_SAFETY * 4;</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	kfree(branches);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='add'>+			     struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='add'>+{</div><div class='add'>+	struct bpf_tramp_image im;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __arch_prepare_bpf_trampoline(&amp;im, NULL, NULL, NULL, m, flags, tlinks, func_addr);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *image_end,</div><div class='add'>+				const struct btf_func_model *m, u32 flags,</div><div class='add'>+				struct bpf_tramp_links *tlinks,</div><div class='add'>+				void *func_addr)</div><div class='add'>+{</div><div class='add'>+	u32 size = image_end - image;</div><div class='add'>+	void *rw_image, *tmp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * rw_image doesn't need to be in module memory range, so we can</div><div class='add'>+	 * use kvmalloc.</div><div class='add'>+	 */</div><div class='add'>+	rw_image = kvmalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!rw_image)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = __arch_prepare_bpf_trampoline(im, rw_image, rw_image + size, image, m,</div><div class='add'>+					    flags, tlinks, func_addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (bpf_jit_enable &gt; 1)</div><div class='add'>+		bpf_jit_dump(1, ret - BPF_INSN_SAFETY * 4, 1, rw_image);</div><div class='add'>+</div><div class='add'>+	tmp = bpf_arch_text_copy(image, rw_image, size);</div><div class='add'>+	if (IS_ERR(tmp))</div><div class='add'>+		ret = PTR_ERR(tmp);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kvfree(rw_image);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_modify_inst(void *ip, ppc_inst_t old_inst, ppc_inst_t new_inst)</div><div class='add'>+{</div><div class='add'>+	ppc_inst_t org_inst;</div><div class='add'>+</div><div class='add'>+	if (copy_inst_from_kernel_nofault(&amp;org_inst, ip)) {</div><div class='add'>+		pr_err("0x%lx: fetching instruction failed\n", (unsigned long)ip);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ppc_inst_equal(org_inst, old_inst)) {</div><div class='add'>+		pr_err("0x%lx: expected (%08lx) != found (%08lx)\n",</div><div class='add'>+		       (unsigned long)ip, ppc_inst_as_ulong(old_inst), ppc_inst_as_ulong(org_inst));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ppc_inst_equal(old_inst, new_inst))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return patch_instruction(ip, new_inst);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_isync(void *info __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	isync();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A 3-step process for bpf prog entry:</div><div class='add'>+ * 1. At bpf prog entry, a single nop/b:</div><div class='add'>+ * bpf_func:</div><div class='add'>+ *	[nop|b]	ool_stub</div><div class='add'>+ * 2. Out-of-line stub:</div><div class='add'>+ * ool_stub:</div><div class='add'>+ *	mflr	r0</div><div class='add'>+ *	[b|bl]	&lt;bpf_prog&gt;/&lt;long_branch_stub&gt;</div><div class='add'>+ *	mtlr	r0 // CONFIG_PPC_FTRACE_OUT_OF_LINE only</div><div class='add'>+ *	b	bpf_func + 4</div><div class='add'>+ * 3. Long branch stub:</div><div class='add'>+ * long_branch_stub:</div><div class='add'>+ *	.long	&lt;branch_addr&gt;/&lt;dummy_tramp&gt;</div><div class='add'>+ *	mflr	r11</div><div class='add'>+ *	bcl	20,31,$+4</div><div class='add'>+ *	mflr	r12</div><div class='add'>+ *	ld	r12, -16(r12)</div><div class='add'>+ *	mtctr	r12</div><div class='add'>+ *	mtlr	r11 // needed to retain ftrace ABI</div><div class='add'>+ *	bctr</div><div class='add'>+ *</div><div class='add'>+ * dummy_tramp is used to reduce synchronization requirements.</div><div class='add'>+ *</div><div class='add'>+ * When attaching a bpf trampoline to a bpf prog, we do not need any</div><div class='add'>+ * synchronization here since we always have a valid branch target regardless</div><div class='add'>+ * of the order in which the above stores are seen. dummy_tramp ensures that</div><div class='add'>+ * the long_branch stub goes to a valid destination on other cpus, even when</div><div class='add'>+ * the branch to the long_branch stub is seen before the updated trampoline</div><div class='add'>+ * address.</div><div class='add'>+ *</div><div class='add'>+ * However, when detaching a bpf trampoline from a bpf prog, or if changing</div><div class='add'>+ * the bpf trampoline address, we need synchronization to ensure that other</div><div class='add'>+ * cpus can no longer branch into the older trampoline so that it can be</div><div class='add'>+ * safely freed. bpf_tramp_image_put() uses rcu_tasks to ensure all cpus</div><div class='add'>+ * make forward progress, but we still need to ensure that other cpus</div><div class='add'>+ * execute isync (or some CSI) so that they don't go back into the</div><div class='add'>+ * trampoline again.</div><div class='add'>+ */</div><div class='add'>+int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type,</div><div class='add'>+		       void *old_addr, void *new_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long bpf_func, bpf_func_end, size, offset;</div><div class='add'>+	ppc_inst_t old_inst, new_inst;</div><div class='add'>+	int ret = 0, branch_flags;</div><div class='add'>+	char name[KSYM_NAME_LEN];</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_PPC32))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	bpf_func = (unsigned long)ip;</div><div class='add'>+	branch_flags = poke_type == BPF_MOD_CALL ? BRANCH_SET_LINK : 0;</div><div class='add'>+</div><div class='add'>+	/* We currently only support poking bpf programs */</div><div class='add'>+	if (!__bpf_address_lookup(bpf_func, &amp;size, &amp;offset, name)) {</div><div class='add'>+		pr_err("%s (0x%lx): kernel/modules are not supported\n", __func__, bpf_func);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we are not poking at bpf prog entry, then we are simply patching in/out</div><div class='add'>+	 * an unconditional branch instruction at im-&gt;ip_after_call</div><div class='add'>+	 */</div><div class='add'>+	if (offset) {</div><div class='add'>+		if (poke_type != BPF_MOD_JUMP) {</div><div class='add'>+			pr_err("%s (0x%lx): calls are not supported in bpf prog body\n", __func__,</div><div class='add'>+			       bpf_func);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		old_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+		if (old_addr)</div><div class='add'>+			if (create_branch(&amp;old_inst, ip, (unsigned long)old_addr, 0))</div><div class='add'>+				return -ERANGE;</div><div class='add'>+		new_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+		if (new_addr)</div><div class='add'>+			if (create_branch(&amp;new_inst, ip, (unsigned long)new_addr, 0))</div><div class='add'>+				return -ERANGE;</div><div class='add'>+		mutex_lock(&amp;text_mutex);</div><div class='add'>+		ret = bpf_modify_inst(ip, old_inst, new_inst);</div><div class='add'>+		mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+		/* Make sure all cpus see the new instruction */</div><div class='add'>+		smp_call_function(do_isync, NULL, 1);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bpf_func_end = bpf_func + size;</div><div class='add'>+</div><div class='add'>+	/* Address of the jmp/call instruction in the out-of-line stub */</div><div class='add'>+	ip = (void *)(bpf_func_end - bpf_jit_ool_stub + 4);</div><div class='add'>+</div><div class='add'>+	if (!is_offset_in_branch_range((long)ip - 4 - bpf_func)) {</div><div class='add'>+		pr_err("%s (0x%lx): bpf prog too large, ool stub out of branch range\n", __func__,</div><div class='add'>+		       bpf_func);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+	if (old_addr) {</div><div class='add'>+		if (is_offset_in_branch_range(ip - old_addr))</div><div class='add'>+			create_branch(&amp;old_inst, ip, (unsigned long)old_addr, branch_flags);</div><div class='add'>+		else</div><div class='add'>+			create_branch(&amp;old_inst, ip, bpf_func_end - bpf_jit_long_branch_stub,</div><div class='add'>+				      branch_flags);</div><div class='add'>+	}</div><div class='add'>+	new_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+	if (new_addr) {</div><div class='add'>+		if (is_offset_in_branch_range(ip - new_addr))</div><div class='add'>+			create_branch(&amp;new_inst, ip, (unsigned long)new_addr, branch_flags);</div><div class='add'>+		else</div><div class='add'>+			create_branch(&amp;new_inst, ip, bpf_func_end - bpf_jit_long_branch_stub,</div><div class='add'>+				      branch_flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 1. Update the address in the long branch stub:</div><div class='add'>+	 * If new_addr is out of range, we will have to use the long branch stub, so patch new_addr</div><div class='add'>+	 * here. Otherwise, revert to dummy_tramp, but only if we had patched old_addr here.</div><div class='add'>+	 */</div><div class='add'>+	if ((new_addr &amp;&amp; !is_offset_in_branch_range(new_addr - ip)) ||</div><div class='add'>+	    (old_addr &amp;&amp; !is_offset_in_branch_range(old_addr - ip)))</div><div class='add'>+		ret = patch_ulong((void *)(bpf_func_end - bpf_jit_long_branch_stub - SZL),</div><div class='add'>+				  (new_addr &amp;&amp; !is_offset_in_branch_range(new_addr - ip)) ?</div><div class='add'>+				  (unsigned long)new_addr : (unsigned long)dummy_tramp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* 2. Update the branch/call in the out-of-line stub */</div><div class='add'>+	ret = bpf_modify_inst(ip, old_inst, new_inst);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* 3. Update instruction at bpf prog entry */</div><div class='add'>+	ip = (void *)bpf_func;</div><div class='add'>+	if (!old_addr || !new_addr) {</div><div class='add'>+		if (!old_addr) {</div><div class='add'>+			old_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+			create_branch(&amp;new_inst, ip, bpf_func_end - bpf_jit_ool_stub, 0);</div><div class='add'>+		} else {</div><div class='add'>+			new_inst = ppc_inst(PPC_RAW_NOP());</div><div class='add'>+			create_branch(&amp;old_inst, ip, bpf_func_end - bpf_jit_ool_stub, 0);</div><div class='add'>+		}</div><div class='add'>+		ret = bpf_modify_inst(ip, old_inst, new_inst);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sync only if we are not attaching a trampoline to a bpf prog so the older</div><div class='add'>+	 * trampoline can be freed safely.</div><div class='add'>+	 */</div><div class='add'>+	if (old_addr)</div><div class='add'>+		smp_call_function(do_isync, NULL, 1);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c<br/>index a0c4f1bde83e..3087e744fb25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/net/bpf_jit_comp32.c</a></div><div class='hunk'>@@ -127,13 +127,16 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	/* Instruction for trampoline attach */</div><div class='add'>+	EMIT(PPC_RAW_NOP());</div><div class='add'>+</div><div class='ctx'> 	/* Initialize tail_call_cnt, to be skipped if we do tail calls. */</div><div class='ctx'> 	if (ctx-&gt;seen &amp; SEEN_TAILCALL)</div><div class='ctx'> 		EMIT(PPC_RAW_LI(_R4, 0));</div><div class='ctx'> 	else</div><div class='ctx'> 		EMIT(PPC_RAW_NOP());</div><div class='ctx'> </div><div class='del'>-#define BPF_TAILCALL_PROLOGUE_SIZE	4</div><div class='add'>+#define BPF_TAILCALL_PROLOGUE_SIZE	8</div><div class='ctx'> </div><div class='ctx'> 	if (bpf_has_stack_frame(ctx))</div><div class='ctx'> 		EMIT(PPC_RAW_STWU(_R1, _R1, -BPF_PPC_STACKFRAME(ctx)));</div><div class='hunk'>@@ -198,6 +201,8 @@ void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> 	bpf_jit_emit_common_epilogue(image, ctx);</div><div class='ctx'> </div><div class='ctx'> 	EMIT(PPC_RAW_BLR());</div><div class='add'>+</div><div class='add'>+	bpf_jit_build_fentry_stubs(image, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Relative offset needs to be calculated based on final image location */</div><div class='hunk'>@@ -308,7 +313,6 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		u64 func_addr;</div><div class='ctx'> 		u32 true_cond;</div><div class='ctx'> 		u32 tmp_idx;</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='ctx'> 		if (i &amp;&amp; (BPF_CLASS(code) == BPF_ALU64 || BPF_CLASS(code) == BPF_ALU) &amp;&amp;</div><div class='ctx'> 		    (BPF_CLASS(prevcode) == BPF_ALU64 || BPF_CLASS(prevcode) == BPF_ALU) &amp;&amp;</div><div class='hunk'>@@ -1083,7 +1087,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx, insn_idx,</div><div class='del'>-							    jmp_off, dst_reg);</div><div class='add'>+							    jmp_off, dst_reg, code);</div><div class='ctx'> 				if (ret)</div><div class='ctx'> 					return ret;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1094,13 +1098,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		 * 16 byte instruction that uses two 'struct bpf_insn'</div><div class='ctx'> 		 */</div><div class='ctx'> 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */</div><div class='del'>-			tmp_idx = ctx-&gt;idx;</div><div class='ctx'> 			PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);</div><div class='ctx'> 			PPC_LI32(dst_reg, (u32)insn[i].imm);</div><div class='del'>-			/* padding to allow full 4 instructions for later patching */</div><div class='del'>-			if (!image)</div><div class='del'>-				for (j = ctx-&gt;idx - tmp_idx; j &lt; 4; j++)</div><div class='del'>-					EMIT(PPC_RAW_NOP());</div><div class='ctx'> 			/* Adjust for two bpf instructions */</div><div class='ctx'> 			addrs[++i] = ctx-&gt;idx * 4;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c<br/>index 2cbcdf93cc19..1fe37128c876 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/net/bpf_jit_comp64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/net/bpf_jit_comp64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/net/bpf_jit_comp64.c</a></div><div class='hunk'>@@ -25,18 +25,18 @@</div><div class='ctx'>  * with our redzone usage.</div><div class='ctx'>  *</div><div class='ctx'>  *		[	prev sp		] &lt;-------------</div><div class='del'>- *		[   nv gpr save area	] 5*8		|</div><div class='add'>+ *		[   nv gpr save area	] 6*8		|</div><div class='ctx'>  *		[    tail_call_cnt	] 8		|</div><div class='del'>- *		[    local_tmp_var	] 16		|</div><div class='add'>+ *		[    local_tmp_var	] 24		|</div><div class='ctx'>  * fp (r31) --&gt;	[   ebpf stack space	] upto 512	|</div><div class='ctx'>  *		[     frame header	] 32/112	|</div><div class='ctx'>  * sp (r1) ---&gt;	[    stack pointer	] --------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* for gpr non volatile registers BPG_REG_6 to 10 */</div><div class='del'>-#define BPF_PPC_STACK_SAVE	(5*8)</div><div class='add'>+#define BPF_PPC_STACK_SAVE	(6*8)</div><div class='ctx'> /* for bpf JIT code internal usage */</div><div class='del'>-#define BPF_PPC_STACK_LOCALS	24</div><div class='add'>+#define BPF_PPC_STACK_LOCALS	32</div><div class='ctx'> /* stack frame excluding BPF stack, ensure this is quadword aligned */</div><div class='ctx'> #define BPF_PPC_STACKFRAME	(STACK_FRAME_MIN_SIZE + \</div><div class='ctx'> 				 BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE)</div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> /* BPF register usage */</div><div class='ctx'> #define TMP_REG_1	(MAX_BPF_JIT_REG + 0)</div><div class='ctx'> #define TMP_REG_2	(MAX_BPF_JIT_REG + 1)</div><div class='add'>+#define ARENA_VM_START  (MAX_BPF_JIT_REG + 2)</div><div class='ctx'> </div><div class='ctx'> /* BPF to ppc register mappings */</div><div class='ctx'> void bpf_jit_init_reg_mapping(struct codegen_context *ctx)</div><div class='hunk'>@@ -67,10 +68,12 @@ void bpf_jit_init_reg_mapping(struct codegen_context *ctx)</div><div class='ctx'> 	ctx-&gt;b2p[BPF_REG_AX] = _R12;</div><div class='ctx'> 	ctx-&gt;b2p[TMP_REG_1] = _R9;</div><div class='ctx'> 	ctx-&gt;b2p[TMP_REG_2] = _R10;</div><div class='add'>+	/* non volatile register for kern_vm_start address */</div><div class='add'>+	ctx-&gt;b2p[ARENA_VM_START] = _R26;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* PPC NVR range -- update this if we ever use NVRs below r27 */</div><div class='del'>-#define BPF_PPC_NVR_MIN		_R27</div><div class='add'>+/* PPC NVR range -- update this if we ever use NVRs below r26 */</div><div class='add'>+#define BPF_PPC_NVR_MIN		_R26</div><div class='ctx'> </div><div class='ctx'> static inline bool bpf_has_stack_frame(struct codegen_context *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -84,27 +87,27 @@ static inline bool bpf_has_stack_frame(struct codegen_context *ctx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * When not setting up our own stackframe, the redzone usage is:</div><div class='add'>+ * When not setting up our own stackframe, the redzone (288 bytes) usage is:</div><div class='ctx'>  *</div><div class='ctx'>  *		[	prev sp		] &lt;-------------</div><div class='ctx'>  *		[	  ...       	] 		|</div><div class='ctx'>  * sp (r1) ---&gt;	[    stack pointer	] --------------</div><div class='del'>- *		[   nv gpr save area	] 5*8</div><div class='add'>+ *		[   nv gpr save area	] 6*8</div><div class='ctx'>  *		[    tail_call_cnt	] 8</div><div class='del'>- *		[    local_tmp_var	] 16</div><div class='del'>- *		[   unused red zone	] 208 bytes protected</div><div class='add'>+ *		[    local_tmp_var	] 24</div><div class='add'>+ *		[   unused red zone	] 224</div><div class='ctx'>  */</div><div class='ctx'> static int bpf_jit_stack_local(struct codegen_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	if (bpf_has_stack_frame(ctx))</div><div class='ctx'> 		return STACK_FRAME_MIN_SIZE + ctx-&gt;stack_size;</div><div class='ctx'> 	else</div><div class='del'>-		return -(BPF_PPC_STACK_SAVE + 24);</div><div class='add'>+		return -(BPF_PPC_STACK_SAVE + 32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx)</div><div class='ctx'> {</div><div class='del'>-	return bpf_jit_stack_local(ctx) + 16;</div><div class='add'>+	return bpf_jit_stack_local(ctx) + 24;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)</div><div class='hunk'>@@ -126,6 +129,9 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	/* Instruction for trampoline attach */</div><div class='add'>+	EMIT(PPC_RAW_NOP());</div><div class='add'>+</div><div class='ctx'> #ifndef CONFIG_PPC_KERNEL_PCREL</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2))</div><div class='ctx'> 		EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc)));</div><div class='hunk'>@@ -167,10 +173,17 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> 		if (bpf_is_seen_register(ctx, bpf_to_ppc(i)))</div><div class='ctx'> 			EMIT(PPC_RAW_STD(bpf_to_ppc(i), _R1, bpf_jit_stack_offsetof(ctx, bpf_to_ppc(i))));</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;arena_vm_start)</div><div class='add'>+		EMIT(PPC_RAW_STD(bpf_to_ppc(ARENA_VM_START), _R1,</div><div class='add'>+				 bpf_jit_stack_offsetof(ctx, bpf_to_ppc(ARENA_VM_START))));</div><div class='add'>+</div><div class='ctx'> 	/* Setup frame pointer to point to the bpf stack area */</div><div class='ctx'> 	if (bpf_is_seen_register(ctx, bpf_to_ppc(BPF_REG_FP)))</div><div class='ctx'> 		EMIT(PPC_RAW_ADDI(bpf_to_ppc(BPF_REG_FP), _R1,</div><div class='ctx'> 				STACK_FRAME_MIN_SIZE + ctx-&gt;stack_size));</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;arena_vm_start)</div><div class='add'>+		PPC_LI64(bpf_to_ppc(ARENA_VM_START), ctx-&gt;arena_vm_start);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx)</div><div class='hunk'>@@ -182,6 +195,10 @@ static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx</div><div class='ctx'> 		if (bpf_is_seen_register(ctx, bpf_to_ppc(i)))</div><div class='ctx'> 			EMIT(PPC_RAW_LD(bpf_to_ppc(i), _R1, bpf_jit_stack_offsetof(ctx, bpf_to_ppc(i))));</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;arena_vm_start)</div><div class='add'>+		EMIT(PPC_RAW_LD(bpf_to_ppc(ARENA_VM_START), _R1,</div><div class='add'>+				bpf_jit_stack_offsetof(ctx, bpf_to_ppc(ARENA_VM_START))));</div><div class='add'>+</div><div class='ctx'> 	/* Tear down our stack frame */</div><div class='ctx'> 	if (bpf_has_stack_frame(ctx)) {</div><div class='ctx'> 		EMIT(PPC_RAW_ADDI(_R1, _R1, BPF_PPC_STACKFRAME + ctx-&gt;stack_size));</div><div class='hunk'>@@ -200,21 +217,38 @@ void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> 	EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(BPF_REG_0)));</div><div class='ctx'> </div><div class='ctx'> 	EMIT(PPC_RAW_BLR());</div><div class='add'>+</div><div class='add'>+	bpf_jit_build_fentry_stubs(image, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-bpf_jit_emit_func_call_hlp(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func)</div><div class='add'>+int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long func_addr = func ? ppc_function_entry((void *)func) : 0;</div><div class='ctx'> 	long reladdr;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!kernel_text_address(func_addr)))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	/* bpf to bpf call, func is not known in the initial pass. Emit 5 nops as a placeholder */</div><div class='add'>+	if (!func) {</div><div class='add'>+		for (int i = 0; i &lt; 5; i++)</div><div class='add'>+			EMIT(PPC_RAW_NOP());</div><div class='add'>+		/* elfv1 needs an additional instruction to load addr from descriptor */</div><div class='add'>+		if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V1))</div><div class='add'>+			EMIT(PPC_RAW_NOP());</div><div class='add'>+		EMIT(PPC_RAW_MTCTR(_R12));</div><div class='add'>+		EMIT(PPC_RAW_BCTRL());</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_KERNEL_PCREL</div><div class='ctx'> 	reladdr = func_addr - local_paca-&gt;kernelbase;</div><div class='ctx'> </div><div class='del'>-	if (reladdr &lt; (long)SZ_8G &amp;&amp; reladdr &gt;= -(long)SZ_8G) {</div><div class='add'>+	/*</div><div class='add'>+	 * If fimage is NULL (the initial pass to find image size),</div><div class='add'>+	 * account for the maximum no. of instructions possible.</div><div class='add'>+	 */</div><div class='add'>+	if (!fimage) {</div><div class='add'>+		ctx-&gt;idx += 7;</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (reladdr &lt; (long)SZ_8G &amp;&amp; reladdr &gt;= -(long)SZ_8G) {</div><div class='ctx'> 		EMIT(PPC_RAW_LD(_R12, _R13, offsetof(struct paca_struct, kernelbase)));</div><div class='ctx'> 		/* Align for subsequent prefix instruction */</div><div class='ctx'> 		if (!IS_ALIGNED((unsigned long)fimage + CTX_NIA(ctx), 8))</div><div class='hunk'>@@ -266,7 +300,8 @@ bpf_jit_emit_func_call_hlp(u32 *image, u32 *fimage, struct codegen_context *ctx,</div><div class='ctx'> 			 * We can clobber r2 since we get called through a</div><div class='ctx'> 			 * function pointer (so caller will save/restore r2).</div><div class='ctx'> 			 */</div><div class='del'>-			EMIT(PPC_RAW_LD(_R2, bpf_to_ppc(TMP_REG_2), 8));</div><div class='add'>+			if (is_module_text_address(func_addr))</div><div class='add'>+				EMIT(PPC_RAW_LD(_R2, bpf_to_ppc(TMP_REG_2), 8));</div><div class='ctx'> 		} else {</div><div class='ctx'> 			PPC_LI64(_R12, func);</div><div class='ctx'> 			EMIT(PPC_RAW_MTCTR(_R12));</div><div class='hunk'>@@ -276,46 +311,14 @@ bpf_jit_emit_func_call_hlp(u32 *image, u32 *fimage, struct codegen_context *ctx,</div><div class='ctx'> 		 * Load r2 with kernel TOC as kernel TOC is used if function address falls</div><div class='ctx'> 		 * within core kernel text.</div><div class='ctx'> 		 */</div><div class='del'>-		EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc)));</div><div class='add'>+		if (is_module_text_address(func_addr))</div><div class='add'>+			EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc)));</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func)</div><div class='del'>-{</div><div class='del'>-	unsigned int i, ctx_idx = ctx-&gt;idx;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(func &amp;&amp; is_module_text_address(func)))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* skip past descriptor if elf v1 */</div><div class='del'>-	func += FUNCTION_DESCR_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Load function address into r12 */</div><div class='del'>-	PPC_LI64(_R12, func);</div><div class='del'>-</div><div class='del'>-	/* For bpf-to-bpf function calls, the callee's address is unknown</div><div class='del'>-	 * until the last extra pass. As seen above, we use PPC_LI64() to</div><div class='del'>-	 * load the callee's address, but this may optimize the number of</div><div class='del'>-	 * instructions required based on the nature of the address.</div><div class='del'>-	 *</div><div class='del'>-	 * Since we don't want the number of instructions emitted to increase,</div><div class='del'>-	 * we pad the optimized PPC_LI64() call with NOPs to guarantee that</div><div class='del'>-	 * we always have a five-instruction sequence, which is the maximum</div><div class='del'>-	 * that PPC_LI64() can emit.</div><div class='del'>-	 */</div><div class='del'>-	if (!image)</div><div class='del'>-		for (i = ctx-&gt;idx - ctx_idx; i &lt; 5; i++)</div><div class='del'>-			EMIT(PPC_RAW_NOP());</div><div class='del'>-</div><div class='del'>-	EMIT(PPC_RAW_MTCTR(_R12));</div><div class='del'>-	EMIT(PPC_RAW_BCTRL());</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -326,7 +329,7 @@ static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 o</div><div class='ctx'> 	 */</div><div class='ctx'> 	int b2p_bpf_array = bpf_to_ppc(BPF_REG_2);</div><div class='ctx'> 	int b2p_index = bpf_to_ppc(BPF_REG_3);</div><div class='del'>-	int bpf_tailcall_prologue_size = 8;</div><div class='add'>+	int bpf_tailcall_prologue_size = 12;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_PPC_KERNEL_PCREL) &amp;&amp; IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2))</div><div class='ctx'> 		bpf_tailcall_prologue_size += 4; /* skip past the toc load */</div><div class='hunk'>@@ -381,6 +384,23 @@ static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 o</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bpf_jit_bypass_spec_v1(void)</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_PPC_E500) || defined(CONFIG_PPC_BOOK3S_64)</div><div class='add'>+	return !(security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &amp;&amp;</div><div class='add'>+		 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR));</div><div class='add'>+#else</div><div class='add'>+	return true;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bpf_jit_bypass_spec_v4(void)</div><div class='add'>+{</div><div class='add'>+	return !(security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &amp;&amp;</div><div class='add'>+		 security_ftr_enabled(SEC_FTR_STF_BARRIER) &amp;&amp;</div><div class='add'>+		 stf_barrier_type_get() != STF_BARRIER_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We spill into the redzone always, even if the bpf program has its own stackframe.</div><div class='ctx'>  * Offsets hardcoded based on BPF_PPC_STACK_SAVE -- see bpf_jit_stack_local()</div><div class='hunk'>@@ -390,11 +410,11 @@ void bpf_stf_barrier(void);</div><div class='ctx'> asm (</div><div class='ctx'> "		.global bpf_stf_barrier		;"</div><div class='ctx'> "	bpf_stf_barrier:			;"</div><div class='del'>-"		std	21,-64(1)		;"</div><div class='del'>-"		std	22,-56(1)		;"</div><div class='add'>+"		std	21,-80(1)		;"</div><div class='add'>+"		std	22,-72(1)		;"</div><div class='ctx'> "		sync				;"</div><div class='del'>-"		ld	21,-64(1)		;"</div><div class='del'>-"		ld	22,-56(1)		;"</div><div class='add'>+"		ld	21,-80(1)		;"</div><div class='add'>+"		ld	22,-72(1)		;"</div><div class='ctx'> "		ori	31,31,0			;"</div><div class='ctx'> "		.rept 14			;"</div><div class='ctx'> "		b	1f			;"</div><div class='hunk'>@@ -403,11 +423,212 @@ asm (</div><div class='ctx'> "		blr				;"</div><div class='ctx'> );</div><div class='ctx'> </div><div class='add'>+static int bpf_jit_emit_atomic_ops(u32 *image, struct codegen_context *ctx,</div><div class='add'>+				   const struct bpf_insn *insn, u32 *jmp_off,</div><div class='add'>+				   u32 *tmp_idx, u32 *addrp)</div><div class='add'>+{</div><div class='add'>+	u32 tmp1_reg = bpf_to_ppc(TMP_REG_1);</div><div class='add'>+	u32 tmp2_reg = bpf_to_ppc(TMP_REG_2);</div><div class='add'>+	u32 size = BPF_SIZE(insn-&gt;code);</div><div class='add'>+	u32 src_reg = bpf_to_ppc(insn-&gt;src_reg);</div><div class='add'>+	u32 dst_reg = bpf_to_ppc(insn-&gt;dst_reg);</div><div class='add'>+	s32 imm = insn-&gt;imm;</div><div class='add'>+</div><div class='add'>+	u32 save_reg = tmp2_reg;</div><div class='add'>+	u32 ret_reg = src_reg;</div><div class='add'>+	u32 fixup_idx;</div><div class='add'>+</div><div class='add'>+	/* Get offset into TMP_REG_1 */</div><div class='add'>+	EMIT(PPC_RAW_LI(tmp1_reg, insn-&gt;off));</div><div class='add'>+       /*</div><div class='add'>+	* Enforce full ordering for operations with BPF_FETCH by emitting a 'sync'</div><div class='add'>+	* before and after the operation.</div><div class='add'>+	*</div><div class='add'>+	* This is a requirement in the Linux Kernel Memory Model.</div><div class='add'>+	* See __cmpxchg_u64() in asm/cmpxchg.h as an example.</div><div class='add'>+	*/</div><div class='add'>+	if ((imm &amp; BPF_FETCH) &amp;&amp; IS_ENABLED(CONFIG_SMP))</div><div class='add'>+		EMIT(PPC_RAW_SYNC());</div><div class='add'>+</div><div class='add'>+	*tmp_idx = ctx-&gt;idx;</div><div class='add'>+</div><div class='add'>+	/* load value from memory into TMP_REG_2 */</div><div class='add'>+	if (size == BPF_DW)</div><div class='add'>+		EMIT(PPC_RAW_LDARX(tmp2_reg, tmp1_reg, dst_reg, 0));</div><div class='add'>+	else</div><div class='add'>+		EMIT(PPC_RAW_LWARX(tmp2_reg, tmp1_reg, dst_reg, 0));</div><div class='add'>+	/* Save old value in _R0 */</div><div class='add'>+	if (imm &amp; BPF_FETCH)</div><div class='add'>+		EMIT(PPC_RAW_MR(_R0, tmp2_reg));</div><div class='add'>+</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_ADD:</div><div class='add'>+	case BPF_ADD | BPF_FETCH:</div><div class='add'>+		EMIT(PPC_RAW_ADD(tmp2_reg, tmp2_reg, src_reg));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_AND:</div><div class='add'>+	case BPF_AND | BPF_FETCH:</div><div class='add'>+		EMIT(PPC_RAW_AND(tmp2_reg, tmp2_reg, src_reg));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_OR:</div><div class='add'>+	case BPF_OR | BPF_FETCH:</div><div class='add'>+		EMIT(PPC_RAW_OR(tmp2_reg, tmp2_reg, src_reg));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_XOR:</div><div class='add'>+	case BPF_XOR | BPF_FETCH:</div><div class='add'>+		EMIT(PPC_RAW_XOR(tmp2_reg, tmp2_reg, src_reg));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_CMPXCHG:</div><div class='add'>+	       /*</div><div class='add'>+		* Return old value in BPF_REG_0 for BPF_CMPXCHG &amp;</div><div class='add'>+		* in src_reg for other cases.</div><div class='add'>+		*/</div><div class='add'>+		ret_reg = bpf_to_ppc(BPF_REG_0);</div><div class='add'>+</div><div class='add'>+		/* Compare with old value in BPF_R0 */</div><div class='add'>+		if (size == BPF_DW)</div><div class='add'>+			EMIT(PPC_RAW_CMPD(bpf_to_ppc(BPF_REG_0), tmp2_reg));</div><div class='add'>+		else</div><div class='add'>+			EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), tmp2_reg));</div><div class='add'>+		/* Don't set if different from old value */</div><div class='add'>+		PPC_BCC_SHORT(COND_NE, (ctx-&gt;idx + 3) * 4);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case BPF_XCHG:</div><div class='add'>+		save_reg = src_reg;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* store new value */</div><div class='add'>+	if (size == BPF_DW)</div><div class='add'>+		EMIT(PPC_RAW_STDCX(save_reg, tmp1_reg, dst_reg));</div><div class='add'>+	else</div><div class='add'>+		EMIT(PPC_RAW_STWCX(save_reg, tmp1_reg, dst_reg));</div><div class='add'>+	/* we're done if this succeeded */</div><div class='add'>+	PPC_BCC_SHORT(COND_NE, *tmp_idx * 4);</div><div class='add'>+	fixup_idx = ctx-&gt;idx;</div><div class='add'>+</div><div class='add'>+	if (imm &amp; BPF_FETCH) {</div><div class='add'>+		/* Emit 'sync' to enforce full ordering */</div><div class='add'>+		if (IS_ENABLED(CONFIG_SMP))</div><div class='add'>+			EMIT(PPC_RAW_SYNC());</div><div class='add'>+		EMIT(PPC_RAW_MR(ret_reg, _R0));</div><div class='add'>+		/*</div><div class='add'>+		 * Skip unnecessary zero-extension for 32-bit cmpxchg.</div><div class='add'>+		 * For context, see commit 39491867ace5.</div><div class='add'>+		 */</div><div class='add'>+		if (size != BPF_DW &amp;&amp; imm == BPF_CMPXCHG &amp;&amp;</div><div class='add'>+		    insn_is_zext(insn + 1))</div><div class='add'>+			*addrp = ctx-&gt;idx * 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*jmp_off = (fixup_idx - *tmp_idx) * 4;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bpf_jit_emit_probe_mem_store(struct codegen_context *ctx, u32 src_reg, s16 off,</div><div class='add'>+					u32 code, u32 *image)</div><div class='add'>+{</div><div class='add'>+	u32 tmp1_reg = bpf_to_ppc(TMP_REG_1);</div><div class='add'>+	u32 tmp2_reg = bpf_to_ppc(TMP_REG_2);</div><div class='add'>+</div><div class='add'>+	switch (BPF_SIZE(code)) {</div><div class='add'>+	case BPF_B:</div><div class='add'>+		EMIT(PPC_RAW_STB(src_reg, tmp1_reg, off));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_H:</div><div class='add'>+		EMIT(PPC_RAW_STH(src_reg, tmp1_reg, off));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_W:</div><div class='add'>+		EMIT(PPC_RAW_STW(src_reg, tmp1_reg, off));</div><div class='add'>+		break;</div><div class='add'>+	case BPF_DW:</div><div class='add'>+		if (off % 4) {</div><div class='add'>+			EMIT(PPC_RAW_LI(tmp2_reg, off));</div><div class='add'>+			EMIT(PPC_RAW_STDX(src_reg, tmp1_reg, tmp2_reg));</div><div class='add'>+		} else {</div><div class='add'>+			EMIT(PPC_RAW_STD(src_reg, tmp1_reg, off));</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_atomic_ld_st(const struct bpf_insn insn, struct codegen_context *ctx, u32 *image)</div><div class='add'>+{</div><div class='add'>+	u32 code = insn.code;</div><div class='add'>+	u32 dst_reg = bpf_to_ppc(insn.dst_reg);</div><div class='add'>+	u32 src_reg = bpf_to_ppc(insn.src_reg);</div><div class='add'>+	u32 size = BPF_SIZE(code);</div><div class='add'>+	u32 tmp1_reg = bpf_to_ppc(TMP_REG_1);</div><div class='add'>+	u32 tmp2_reg = bpf_to_ppc(TMP_REG_2);</div><div class='add'>+	s16 off = insn.off;</div><div class='add'>+	s32 imm = insn.imm;</div><div class='add'>+</div><div class='add'>+	switch (imm) {</div><div class='add'>+	case BPF_LOAD_ACQ:</div><div class='add'>+		switch (size) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			if (off % 4) {</div><div class='add'>+				EMIT(PPC_RAW_LI(tmp1_reg, off));</div><div class='add'>+				EMIT(PPC_RAW_LDX(dst_reg, src_reg, tmp1_reg));</div><div class='add'>+			} else {</div><div class='add'>+				EMIT(PPC_RAW_LD(dst_reg, src_reg, off));</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		EMIT(PPC_RAW_LWSYNC());</div><div class='add'>+		break;</div><div class='add'>+	case BPF_STORE_REL:</div><div class='add'>+		EMIT(PPC_RAW_LWSYNC());</div><div class='add'>+		switch (size) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			EMIT(PPC_RAW_STB(src_reg, dst_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			EMIT(PPC_RAW_STH(src_reg, dst_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			EMIT(PPC_RAW_STW(src_reg, dst_reg, off));</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			if (off % 4) {</div><div class='add'>+				EMIT(PPC_RAW_LI(tmp2_reg, off));</div><div class='add'>+				EMIT(PPC_RAW_STDX(src_reg, dst_reg, tmp2_reg));</div><div class='add'>+			} else {</div><div class='add'>+				EMIT(PPC_RAW_STD(src_reg, dst_reg, off));</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err_ratelimited("unexpected atomic load/store op code %02x\n",</div><div class='add'>+				   imm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Assemble the body code between the prologue &amp; epilogue */</div><div class='ctx'> int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx,</div><div class='ctx'> 		       u32 *addrs, int pass, bool extra_pass)</div><div class='ctx'> {</div><div class='ctx'> 	enum stf_barrier_type stf_barrier = stf_barrier_type_get();</div><div class='add'>+	bool sync_emitted, ori31_emitted;</div><div class='ctx'> 	const struct bpf_insn *insn = fp-&gt;insnsi;</div><div class='ctx'> 	int flen = fp-&gt;len;</div><div class='ctx'> 	int i, ret;</div><div class='hunk'>@@ -422,7 +643,6 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		u32 size = BPF_SIZE(code);</div><div class='ctx'> 		u32 tmp1_reg = bpf_to_ppc(TMP_REG_1);</div><div class='ctx'> 		u32 tmp2_reg = bpf_to_ppc(TMP_REG_2);</div><div class='del'>-		u32 save_reg, ret_reg;</div><div class='ctx'> 		s16 off = insn[i].off;</div><div class='ctx'> 		s32 imm = insn[i].imm;</div><div class='ctx'> 		bool func_addr_fixed;</div><div class='hunk'>@@ -430,7 +650,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		u64 imm64;</div><div class='ctx'> 		u32 true_cond;</div><div class='ctx'> 		u32 tmp_idx;</div><div class='del'>-		int j;</div><div class='add'>+		u32 jmp_off;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * addrs[] maps a BPF bytecode address into a real offset from</div><div class='hunk'>@@ -697,6 +917,16 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		 */</div><div class='ctx'> 		case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */</div><div class='ctx'> 		case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */</div><div class='add'>+</div><div class='add'>+			if (insn_is_cast_user(&amp;insn[i])) {</div><div class='add'>+				EMIT(PPC_RAW_RLDICL_DOT(tmp1_reg, src_reg, 0, 32));</div><div class='add'>+				PPC_LI64(dst_reg, (ctx-&gt;user_vm_start &amp; 0xffffffff00000000UL));</div><div class='add'>+				PPC_BCC_SHORT(COND_EQ, (ctx-&gt;idx + 2) * 4);</div><div class='add'>+				EMIT(PPC_RAW_OR(tmp1_reg, dst_reg, tmp1_reg));</div><div class='add'>+				EMIT(PPC_RAW_MR(dst_reg, tmp1_reg));</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			if (imm == 1) {</div><div class='ctx'> 				/* special mov32 for zext */</div><div class='ctx'> 				EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31));</div><div class='hunk'>@@ -801,30 +1031,51 @@ emit_clear:</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * BPF_ST NOSPEC (speculation barrier)</div><div class='add'>+		 *</div><div class='add'>+		 * The following must act as a barrier against both Spectre v1</div><div class='add'>+		 * and v4 if we requested both mitigations. Therefore, also emit</div><div class='add'>+		 * 'isync; sync' on E500 or 'ori31' on BOOK3S_64 in addition to</div><div class='add'>+		 * the insns needed for a Spectre v4 barrier.</div><div class='add'>+		 *</div><div class='add'>+		 * If we requested only !bypass_spec_v1 OR only !bypass_spec_v4,</div><div class='add'>+		 * we can skip the respective other barrier type as an</div><div class='add'>+		 * optimization.</div><div class='ctx'> 		 */</div><div class='ctx'> 		case BPF_ST | BPF_NOSPEC:</div><div class='del'>-			if (!security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) ||</div><div class='del'>-					!security_ftr_enabled(SEC_FTR_STF_BARRIER))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			switch (stf_barrier) {</div><div class='del'>-			case STF_BARRIER_EIEIO:</div><div class='del'>-				EMIT(PPC_RAW_EIEIO() | 0x02000000);</div><div class='del'>-				break;</div><div class='del'>-			case STF_BARRIER_SYNC_ORI:</div><div class='add'>+			sync_emitted = false;</div><div class='add'>+			ori31_emitted = false;</div><div class='add'>+			if (IS_ENABLED(CONFIG_PPC_E500) &amp;&amp;</div><div class='add'>+			    !bpf_jit_bypass_spec_v1()) {</div><div class='add'>+				EMIT(PPC_RAW_ISYNC());</div><div class='ctx'> 				EMIT(PPC_RAW_SYNC());</div><div class='del'>-				EMIT(PPC_RAW_LD(tmp1_reg, _R13, 0));</div><div class='del'>-				EMIT(PPC_RAW_ORI(_R31, _R31, 0));</div><div class='del'>-				break;</div><div class='del'>-			case STF_BARRIER_FALLBACK:</div><div class='del'>-				ctx-&gt;seen |= SEEN_FUNC;</div><div class='del'>-				PPC_LI64(_R12, dereference_kernel_function_descriptor(bpf_stf_barrier));</div><div class='del'>-				EMIT(PPC_RAW_MTCTR(_R12));</div><div class='del'>-				EMIT(PPC_RAW_BCTRL());</div><div class='del'>-				break;</div><div class='del'>-			case STF_BARRIER_NONE:</div><div class='del'>-				break;</div><div class='add'>+				sync_emitted = true;</div><div class='add'>+			}</div><div class='add'>+			if (!bpf_jit_bypass_spec_v4()) {</div><div class='add'>+				switch (stf_barrier) {</div><div class='add'>+				case STF_BARRIER_EIEIO:</div><div class='add'>+					EMIT(PPC_RAW_EIEIO() | 0x02000000);</div><div class='add'>+					break;</div><div class='add'>+				case STF_BARRIER_SYNC_ORI:</div><div class='add'>+					if (!sync_emitted)</div><div class='add'>+						EMIT(PPC_RAW_SYNC());</div><div class='add'>+					EMIT(PPC_RAW_LD(tmp1_reg, _R13, 0));</div><div class='add'>+					EMIT(PPC_RAW_ORI(_R31, _R31, 0));</div><div class='add'>+					ori31_emitted = true;</div><div class='add'>+					break;</div><div class='add'>+				case STF_BARRIER_FALLBACK:</div><div class='add'>+					ctx-&gt;seen |= SEEN_FUNC;</div><div class='add'>+					PPC_LI64(_R12, dereference_kernel_function_descriptor(bpf_stf_barrier));</div><div class='add'>+					EMIT(PPC_RAW_MTCTR(_R12));</div><div class='add'>+					EMIT(PPC_RAW_BCTRL());</div><div class='add'>+					break;</div><div class='add'>+				case STF_BARRIER_NONE:</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='add'>+			if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) &amp;&amp;</div><div class='add'>+			    !bpf_jit_bypass_spec_v1() &amp;&amp;</div><div class='add'>+			    !ori31_emitted)</div><div class='add'>+				EMIT(PPC_RAW_ORI(_R31, _R31, 0));</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -868,98 +1119,107 @@ emit_clear:</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case BPF_STX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+		case BPF_STX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+		case BPF_STX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+		case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+</div><div class='add'>+			EMIT(PPC_RAW_ADD(tmp1_reg, dst_reg, bpf_to_ppc(ARENA_VM_START)));</div><div class='add'>+</div><div class='add'>+			ret = bpf_jit_emit_probe_mem_store(ctx, src_reg, off, code, image);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx,</div><div class='add'>+						    ctx-&gt;idx - 1, 4, -1, code);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case BPF_ST | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+		case BPF_ST | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+		case BPF_ST | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+		case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+</div><div class='add'>+			EMIT(PPC_RAW_ADD(tmp1_reg, dst_reg, bpf_to_ppc(ARENA_VM_START)));</div><div class='add'>+</div><div class='add'>+			if (BPF_SIZE(code) == BPF_W || BPF_SIZE(code) == BPF_DW) {</div><div class='add'>+				PPC_LI32(tmp2_reg, imm);</div><div class='add'>+				src_reg = tmp2_reg;</div><div class='add'>+			} else {</div><div class='add'>+				EMIT(PPC_RAW_LI(tmp2_reg, imm));</div><div class='add'>+				src_reg = tmp2_reg;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ret = bpf_jit_emit_probe_mem_store(ctx, src_reg, off, code, image);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx,</div><div class='add'>+						    ctx-&gt;idx - 1, 4, -1, code);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * BPF_STX PROBE_ATOMIC (arena atomic ops)</div><div class='add'>+		 */</div><div class='add'>+		case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:</div><div class='add'>+		case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:</div><div class='add'>+			EMIT(PPC_RAW_ADD(dst_reg, dst_reg, bpf_to_ppc(ARENA_VM_START)));</div><div class='add'>+			ret = bpf_jit_emit_atomic_ops(image, ctx, &amp;insn[i],</div><div class='add'>+						      &amp;jmp_off, &amp;tmp_idx, &amp;addrs[i + 1]);</div><div class='add'>+			if (ret) {</div><div class='add'>+				if (ret == -EOPNOTSUPP) {</div><div class='add'>+					pr_err_ratelimited(</div><div class='add'>+						"eBPF filter atomic op code %02x (@%d) unsupported\n",</div><div class='add'>+						code, i);</div><div class='add'>+				}</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			/* LDARX/LWARX should land here on exception. */</div><div class='add'>+			ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx,</div><div class='add'>+						    tmp_idx, jmp_off, dst_reg, code);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			/* Retrieve the dst_reg */</div><div class='add'>+			EMIT(PPC_RAW_SUB(dst_reg, dst_reg, bpf_to_ppc(ARENA_VM_START)));</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * BPF_STX ATOMIC (atomic ops)</div><div class='ctx'> 		 */</div><div class='add'>+		case BPF_STX | BPF_ATOMIC | BPF_B:</div><div class='add'>+		case BPF_STX | BPF_ATOMIC | BPF_H:</div><div class='ctx'> 		case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='ctx'> 		case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='del'>-			save_reg = tmp2_reg;</div><div class='del'>-			ret_reg = src_reg;</div><div class='del'>-</div><div class='del'>-			/* Get offset into TMP_REG_1 */</div><div class='del'>-			EMIT(PPC_RAW_LI(tmp1_reg, off));</div><div class='del'>-			/*</div><div class='del'>-			 * Enforce full ordering for operations with BPF_FETCH by emitting a 'sync'</div><div class='del'>-			 * before and after the operation.</div><div class='del'>-			 *</div><div class='del'>-			 * This is a requirement in the Linux Kernel Memory Model.</div><div class='del'>-			 * See __cmpxchg_u64() in asm/cmpxchg.h as an example.</div><div class='del'>-			 */</div><div class='del'>-			if ((imm &amp; BPF_FETCH) &amp;&amp; IS_ENABLED(CONFIG_SMP))</div><div class='del'>-				EMIT(PPC_RAW_SYNC());</div><div class='del'>-			tmp_idx = ctx-&gt;idx * 4;</div><div class='del'>-			/* load value from memory into TMP_REG_2 */</div><div class='del'>-			if (size == BPF_DW)</div><div class='del'>-				EMIT(PPC_RAW_LDARX(tmp2_reg, tmp1_reg, dst_reg, 0));</div><div class='del'>-			else</div><div class='del'>-				EMIT(PPC_RAW_LWARX(tmp2_reg, tmp1_reg, dst_reg, 0));</div><div class='del'>-</div><div class='del'>-			/* Save old value in _R0 */</div><div class='del'>-			if (imm &amp; BPF_FETCH)</div><div class='del'>-				EMIT(PPC_RAW_MR(_R0, tmp2_reg));</div><div class='del'>-</div><div class='del'>-			switch (imm) {</div><div class='del'>-			case BPF_ADD:</div><div class='del'>-			case BPF_ADD | BPF_FETCH:</div><div class='del'>-				EMIT(PPC_RAW_ADD(tmp2_reg, tmp2_reg, src_reg));</div><div class='del'>-				break;</div><div class='del'>-			case BPF_AND:</div><div class='del'>-			case BPF_AND | BPF_FETCH:</div><div class='del'>-				EMIT(PPC_RAW_AND(tmp2_reg, tmp2_reg, src_reg));</div><div class='del'>-				break;</div><div class='del'>-			case BPF_OR:</div><div class='del'>-			case BPF_OR | BPF_FETCH:</div><div class='del'>-				EMIT(PPC_RAW_OR(tmp2_reg, tmp2_reg, src_reg));</div><div class='del'>-				break;</div><div class='del'>-			case BPF_XOR:</div><div class='del'>-			case BPF_XOR | BPF_FETCH:</div><div class='del'>-				EMIT(PPC_RAW_XOR(tmp2_reg, tmp2_reg, src_reg));</div><div class='del'>-				break;</div><div class='del'>-			case BPF_CMPXCHG:</div><div class='del'>-				/*</div><div class='del'>-				 * Return old value in BPF_REG_0 for BPF_CMPXCHG &amp;</div><div class='del'>-				 * in src_reg for other cases.</div><div class='del'>-				 */</div><div class='del'>-				ret_reg = bpf_to_ppc(BPF_REG_0);</div><div class='add'>+			if (bpf_atomic_is_load_store(&amp;insn[i])) {</div><div class='add'>+				ret = emit_atomic_ld_st(insn[i], ctx, image);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='ctx'> </div><div class='del'>-				/* Compare with old value in BPF_R0 */</div><div class='del'>-				if (size == BPF_DW)</div><div class='del'>-					EMIT(PPC_RAW_CMPD(bpf_to_ppc(BPF_REG_0), tmp2_reg));</div><div class='del'>-				else</div><div class='del'>-					EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), tmp2_reg));</div><div class='del'>-				/* Don't set if different from old value */</div><div class='del'>-				PPC_BCC_SHORT(COND_NE, (ctx-&gt;idx + 3) * 4);</div><div class='del'>-				fallthrough;</div><div class='del'>-			case BPF_XCHG:</div><div class='del'>-				save_reg = src_reg;</div><div class='add'>+				if (size != BPF_DW &amp;&amp; insn_is_zext(&amp;insn[i + 1]))</div><div class='add'>+					addrs[++i] = ctx-&gt;idx * 4;</div><div class='ctx'> 				break;</div><div class='del'>-			default:</div><div class='add'>+			} else if (size == BPF_B || size == BPF_H) {</div><div class='ctx'> 				pr_err_ratelimited(</div><div class='ctx'> 					"eBPF filter atomic op code %02x (@%d) unsupported\n",</div><div class='ctx'> 					code, i);</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			/* store new value */</div><div class='del'>-			if (size == BPF_DW)</div><div class='del'>-				EMIT(PPC_RAW_STDCX(save_reg, tmp1_reg, dst_reg));</div><div class='del'>-			else</div><div class='del'>-				EMIT(PPC_RAW_STWCX(save_reg, tmp1_reg, dst_reg));</div><div class='del'>-			/* we're done if this succeeded */</div><div class='del'>-			PPC_BCC_SHORT(COND_NE, tmp_idx);</div><div class='del'>-</div><div class='del'>-			if (imm &amp; BPF_FETCH) {</div><div class='del'>-				/* Emit 'sync' to enforce full ordering */</div><div class='del'>-				if (IS_ENABLED(CONFIG_SMP))</div><div class='del'>-					EMIT(PPC_RAW_SYNC());</div><div class='del'>-				EMIT(PPC_RAW_MR(ret_reg, _R0));</div><div class='del'>-				/*</div><div class='del'>-				 * Skip unnecessary zero-extension for 32-bit cmpxchg.</div><div class='del'>-				 * For context, see commit 39491867ace5.</div><div class='del'>-				 */</div><div class='del'>-				if (size != BPF_DW &amp;&amp; imm == BPF_CMPXCHG &amp;&amp;</div><div class='del'>-				    insn_is_zext(&amp;insn[i + 1]))</div><div class='del'>-					addrs[++i] = ctx-&gt;idx * 4;</div><div class='add'>+			ret = bpf_jit_emit_atomic_ops(image, ctx, &amp;insn[i],</div><div class='add'>+						      &amp;jmp_off, &amp;tmp_idx, &amp;addrs[i + 1]);</div><div class='add'>+			if (ret) {</div><div class='add'>+				if (ret == -EOPNOTSUPP) {</div><div class='add'>+					pr_err_ratelimited(</div><div class='add'>+						"eBPF filter atomic op code %02x (@%d) unsupported\n",</div><div class='add'>+						code, i);</div><div class='add'>+				}</div><div class='add'>+				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -1003,9 +1263,10 @@ emit_clear:</div><div class='ctx'> 				 * Check if 'off' is word aligned for BPF_DW, because</div><div class='ctx'> 				 * we might generate two instructions.</div><div class='ctx'> 				 */</div><div class='del'>-				if ((BPF_SIZE(code) == BPF_DW ||</div><div class='del'>-				    (BPF_SIZE(code) == BPF_B &amp;&amp; BPF_MODE(code) == BPF_PROBE_MEMSX)) &amp;&amp;</div><div class='del'>-						(off &amp; 3))</div><div class='add'>+				if ((BPF_SIZE(code) == BPF_DW &amp;&amp; (off &amp; 3)) ||</div><div class='add'>+				    (BPF_SIZE(code) == BPF_B &amp;&amp;</div><div class='add'>+				     BPF_MODE(code) == BPF_PROBE_MEMSX) ||</div><div class='add'>+				    (BPF_SIZE(code) == BPF_B &amp;&amp; BPF_MODE(code) == BPF_MEMSX))</div><div class='ctx'> 					PPC_JMP((ctx-&gt;idx + 3) * 4);</div><div class='ctx'> 				else</div><div class='ctx'> 					PPC_JMP((ctx-&gt;idx + 2) * 4);</div><div class='hunk'>@@ -1051,12 +1312,49 @@ emit_clear:</div><div class='ctx'> </div><div class='ctx'> 			if (BPF_MODE(code) == BPF_PROBE_MEM) {</div><div class='ctx'> 				ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx,</div><div class='del'>-							    ctx-&gt;idx - 1, 4, dst_reg);</div><div class='add'>+							    ctx-&gt;idx - 1, 4, dst_reg, code);</div><div class='ctx'> 				if (ret)</div><div class='ctx'> 					return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		/* dst = *(u64 *)(ul) (src + ARENA_VM_START + off) */</div><div class='add'>+		case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:</div><div class='add'>+		case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:</div><div class='add'>+		case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:</div><div class='add'>+		case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='add'>+</div><div class='add'>+			EMIT(PPC_RAW_ADD(tmp1_reg, src_reg, bpf_to_ppc(ARENA_VM_START)));</div><div class='add'>+</div><div class='add'>+			switch (size) {</div><div class='add'>+			case BPF_B:</div><div class='add'>+				EMIT(PPC_RAW_LBZ(dst_reg, tmp1_reg, off));</div><div class='add'>+				break;</div><div class='add'>+			case BPF_H:</div><div class='add'>+				EMIT(PPC_RAW_LHZ(dst_reg, tmp1_reg, off));</div><div class='add'>+				break;</div><div class='add'>+			case BPF_W:</div><div class='add'>+				EMIT(PPC_RAW_LWZ(dst_reg, tmp1_reg, off));</div><div class='add'>+				break;</div><div class='add'>+			case BPF_DW:</div><div class='add'>+				if (off % 4) {</div><div class='add'>+					EMIT(PPC_RAW_LI(tmp2_reg, off));</div><div class='add'>+					EMIT(PPC_RAW_LDX(dst_reg, tmp1_reg, tmp2_reg));</div><div class='add'>+				} else {</div><div class='add'>+					EMIT(PPC_RAW_LD(dst_reg, tmp1_reg, off));</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (size != BPF_DW &amp;&amp; insn_is_zext(&amp;insn[i + 1]))</div><div class='add'>+				addrs[++i] = ctx-&gt;idx * 4;</div><div class='add'>+</div><div class='add'>+			ret = bpf_add_extable_entry(fp, image, fimage, pass, ctx,</div><div class='add'>+						    ctx-&gt;idx - 1, 4, dst_reg, code);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Doubleword load</div><div class='ctx'> 		 * 16 byte instruction that uses two 'struct bpf_insn'</div><div class='hunk'>@@ -1064,12 +1362,7 @@ emit_clear:</div><div class='ctx'> 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */</div><div class='ctx'> 			imm64 = ((u64)(u32) insn[i].imm) |</div><div class='ctx'> 				    (((u64)(u32) insn[i+1].imm) &lt;&lt; 32);</div><div class='del'>-			tmp_idx = ctx-&gt;idx;</div><div class='ctx'> 			PPC_LI64(dst_reg, imm64);</div><div class='del'>-			/* padding to allow full 5 instructions for later patching */</div><div class='del'>-			if (!image)</div><div class='del'>-				for (j = ctx-&gt;idx - tmp_idx; j &lt; 5; j++)</div><div class='del'>-					EMIT(PPC_RAW_NOP());</div><div class='ctx'> 			/* Adjust for two bpf instructions */</div><div class='ctx'> 			addrs[++i] = ctx-&gt;idx * 4;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1102,11 +1395,7 @@ emit_clear:</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			if (func_addr_fixed)</div><div class='del'>-				ret = bpf_jit_emit_func_call_hlp(image, fimage, ctx, func_addr);</div><div class='del'>-			else</div><div class='del'>-				ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr);</div><div class='del'>-</div><div class='add'>+			ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/8xx-pmu.c b/arch/powerpc/perf/8xx-pmu.c<br/>index 308a2e40d7be..1d2972229e3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/8xx-pmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/8xx-pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/8xx-pmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/8xx-pmu.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PERF_8xx_ID_CPU_CYCLES		1</div><div class='head'>diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile<br/>index 4f53d0b97539..78dd7e25219e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/Makefile</a></div><div class='hunk'>@@ -14,7 +14,11 @@ obj-$(CONFIG_PPC_POWERNV)	+= imc-pmu.o</div><div class='ctx'> obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o</div><div class='ctx'> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o</div><div class='add'>+obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o vpa-dtl.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_VPA_PMU) += vpa-pmu.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_KVM_BOOK3S_HV_PMU) += kvm-hv-pmu.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c<br/>index 6b4434dd0ff3..26aa26482c9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/callchain.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *re</div><div class='ctx'> </div><div class='ctx'> 	lr = regs-&gt;link;</div><div class='ctx'> 	sp = regs-&gt;gpr[1];</div><div class='del'>-	perf_callchain_store(entry, perf_instruction_pointer(regs));</div><div class='add'>+	perf_callchain_store(entry, perf_arch_instruction_pointer(regs));</div><div class='ctx'> </div><div class='ctx'> 	if (!validate_sp(sp, current))</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/perf/callchain_32.c b/arch/powerpc/perf/callchain_32.c<br/>index ea8cfe3806dc..ddcc2d8aa64a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain_32.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain_32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain_32.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/callchain_32.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ void perf_callchain_user_32(struct perf_callchain_entry_ctx *entry,</div><div class='ctx'> 	long level = 0;</div><div class='ctx'> 	unsigned int __user *fp, *uregs;</div><div class='ctx'> </div><div class='del'>-	next_ip = perf_instruction_pointer(regs);</div><div class='add'>+	next_ip = perf_arch_instruction_pointer(regs);</div><div class='ctx'> 	lr = regs-&gt;link;</div><div class='ctx'> 	sp = regs-&gt;gpr[1];</div><div class='ctx'> 	perf_callchain_store(entry, next_ip);</div><div class='head'>diff --git a/arch/powerpc/perf/callchain_64.c b/arch/powerpc/perf/callchain_64.c<br/>index 488e8a21a11e..115d1c105e8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain_64.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/callchain_64.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/callchain_64.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/callchain_64.c</a></div><div class='hunk'>@@ -74,7 +74,7 @@ void perf_callchain_user_64(struct perf_callchain_entry_ctx *entry,</div><div class='ctx'> 	struct signal_frame_64 __user *sigframe;</div><div class='ctx'> 	unsigned long __user *fp, *uregs;</div><div class='ctx'> </div><div class='del'>-	next_ip = perf_instruction_pointer(regs);</div><div class='add'>+	next_ip = perf_arch_instruction_pointer(regs);</div><div class='ctx'> 	lr = regs-&gt;link;</div><div class='ctx'> 	sp = regs-&gt;gpr[1];</div><div class='ctx'> 	perf_callchain_store(entry, next_ip);</div><div class='head'>diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c<br/>index 42867469752d..8b0081441f85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/core-book3s.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/core-book3s.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/core-book3s.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/core-book3s.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/interrupt.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +132,10 @@ static unsigned long ebb_switch_in(bool ebb, struct cpu_hw_events *cpuhw)</div><div class='ctx'> </div><div class='ctx'> static inline void power_pmu_bhrb_enable(struct perf_event *event) {}</div><div class='ctx'> static inline void power_pmu_bhrb_disable(struct perf_event *event) {}</div><div class='del'>-static void power_pmu_sched_task(struct perf_event_pmu_context *pmu_ctx, bool sched_in) {}</div><div class='add'>+static void power_pmu_sched_task(struct perf_event_pmu_context *pmu_ctx,</div><div class='add'>+				 struct task_struct *task, bool sched_in)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> static inline void power_pmu_bhrb_read(struct perf_event *event, struct cpu_hw_events *cpuhw) {}</div><div class='ctx'> static void pmao_restore_workaround(bool ebb) { }</div><div class='ctx'> #endif /* CONFIG_PPC32 */</div><div class='hunk'>@@ -444,7 +447,8 @@ static void power_pmu_bhrb_disable(struct perf_event *event)</div><div class='ctx'> /* Called from ctxsw to prevent one process's branch entries to</div><div class='ctx'>  * mingle with the other process's entries during context switch.</div><div class='ctx'>  */</div><div class='del'>-static void power_pmu_sched_task(struct perf_event_pmu_context *pmu_ctx, bool sched_in)</div><div class='add'>+static void power_pmu_sched_task(struct perf_event_pmu_context *pmu_ctx,</div><div class='add'>+				 struct task_struct *task, bool sched_in)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ppmu-&gt;bhrb_nr)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2222,6 +2226,10 @@ static struct pmu power_pmu = {</div><div class='ctx'> #define PERF_SAMPLE_ADDR_TYPE  (PERF_SAMPLE_ADDR |		\</div><div class='ctx'> 				PERF_SAMPLE_PHYS_ADDR |		\</div><div class='ctx'> 				PERF_SAMPLE_DATA_PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define SIER_TYPE_SHIFT	15</div><div class='add'>+#define SIER_TYPE_MASK	(0x7ull &lt;&lt; SIER_TYPE_SHIFT)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * A counter has overflowed; update its count and record</div><div class='ctx'>  * things if requested.  Note that interrupts are hard-disabled</div><div class='hunk'>@@ -2231,6 +2239,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u64 period = event-&gt;hw.sample_period;</div><div class='add'>+	const u64 last_period = event-&gt;hw.last_period;</div><div class='ctx'> 	s64 prev, delta, left;</div><div class='ctx'> 	int record = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2291,12 +2300,28 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 		record = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * SIER[46-48] presents instruction type of the sampled instruction.</div><div class='add'>+	 * In ISA v3.0 and before values "0" and "7" are considered reserved.</div><div class='add'>+	 * In ISA v3.1, value "7" has been used to indicate "larx/stcx".</div><div class='add'>+	 * Drop the sample if "type" has reserved values for this field with a</div><div class='add'>+	 * ISA version check.</div><div class='add'>+	 */</div><div class='add'>+	if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_DATA_SRC &amp;&amp;</div><div class='add'>+			ppmu-&gt;get_mem_data_src) {</div><div class='add'>+		val = (regs-&gt;dar &amp; SIER_TYPE_MASK) &gt;&gt; SIER_TYPE_SHIFT;</div><div class='add'>+		if (val == 0 || (val == 7 &amp;&amp; !cpu_has_feature(CPU_FTR_ARCH_31))) {</div><div class='add'>+			record = 0;</div><div class='add'>+			atomic64_inc(&amp;event-&gt;lost_samples);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Finally record data if requested.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, ~0ULL, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, ~0ULL, last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_ADDR_TYPE)</div><div class='ctx'> 			perf_get_data_addr(event, regs, &amp;data.addr);</div><div class='hunk'>@@ -2319,12 +2344,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			ppmu-&gt;get_mem_weight(&amp;data.weight.full, event-&gt;attr.sample_type);</div><div class='ctx'> 			data.sample_flags |= PERF_SAMPLE_WEIGHT_TYPE;</div><div class='ctx'> 		}</div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			power_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	} else if (period) {</div><div class='ctx'> 		/* Account for interrupt in case of invalid SIAR */</div><div class='del'>-		if (perf_event_account_interrupt(event))</div><div class='del'>-			power_pmu_stop(event, 0);</div><div class='add'>+		perf_event_account_interrupt(event);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2332,7 +2355,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'>  * Called from generic code to get the misc flags (i.e. processor mode)</div><div class='ctx'>  * for an event_id.</div><div class='ctx'>  */</div><div class='del'>-unsigned long perf_misc_flags(struct pt_regs *regs)</div><div class='add'>+unsigned long perf_arch_misc_flags(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u32 flags = perf_get_misc_flags(regs);</div><div class='ctx'> </div><div class='hunk'>@@ -2346,7 +2369,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs)</div><div class='ctx'>  * Called from generic code to get the instruction pointer</div><div class='ctx'>  * for an event_id.</div><div class='ctx'>  */</div><div class='del'>-unsigned long perf_instruction_pointer(struct pt_regs *regs)</div><div class='add'>+unsigned long perf_arch_instruction_pointer(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long siar = mfspr(SPRN_SIAR);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c<br/>index 1a53ab08447c..7120ab20cbfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/core-fsl-emb.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/core-fsl-emb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/core-fsl-emb.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/core-fsl-emb.c</a></div><div class='hunk'>@@ -590,6 +590,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u64 period = event-&gt;hw.sample_period;</div><div class='add'>+	const u64 last_period = event-&gt;hw.last_period;</div><div class='ctx'> 	s64 prev, delta, left;</div><div class='ctx'> 	int record = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -632,10 +633,9 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, last_period);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			fsl_emb_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c<br/>index d400fa391c27..e42677cc254a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/hv-24x7.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/hv-24x7.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/hv-24x7.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/hv-24x7.c</a></div><div class='hunk'>@@ -713,12 +713,12 @@ static ssize_t catalog_event_len_validate(struct hv_24x7_event_data *event,</div><div class='ctx'> 	ev_len = be16_to_cpu(event-&gt;length);</div><div class='ctx'> </div><div class='ctx'> 	if (ev_len % 16)</div><div class='del'>-		pr_info("event %zu has length %zu not divisible by 16: event=%pK\n",</div><div class='add'>+		pr_info("event %zu has length %zu not divisible by 16: event=%p\n",</div><div class='ctx'> 				event_idx, ev_len, event);</div><div class='ctx'> </div><div class='ctx'> 	ev_end = (__u8 *)event + ev_len;</div><div class='ctx'> 	if (ev_end &gt; end) {</div><div class='del'>-		pr_warn("event %zu has .length=%zu, ends after buffer end: ev_end=%pK &gt; end=%pK, offset=%zu\n",</div><div class='add'>+		pr_warn("event %zu has .length=%zu, ends after buffer end: ev_end=%p &gt; end=%p, offset=%zu\n",</div><div class='ctx'> 				event_idx, ev_len, ev_end, end,</div><div class='ctx'> 				offset);</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -726,14 +726,14 @@ static ssize_t catalog_event_len_validate(struct hv_24x7_event_data *event,</div><div class='ctx'> </div><div class='ctx'> 	calc_ev_end = event_end(event, end);</div><div class='ctx'> 	if (!calc_ev_end) {</div><div class='del'>-		pr_warn("event %zu has a calculated length which exceeds buffer length %zu: event=%pK end=%pK, offset=%zu\n",</div><div class='add'>+		pr_warn("event %zu has a calculated length which exceeds buffer length %zu: event=%p end=%p, offset=%zu\n",</div><div class='ctx'> 			event_idx, event_data_bytes, event, end,</div><div class='ctx'> 			offset);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (calc_ev_end &gt; ev_end) {</div><div class='del'>-		pr_warn("event %zu exceeds its own length: event=%pK, end=%pK, offset=%zu, calc_ev_end=%pK\n",</div><div class='add'>+		pr_warn("event %zu exceeds its own length: event=%p, end=%p, offset=%zu, calc_ev_end=%p\n",</div><div class='ctx'> 			event_idx, event, ev_end, offset, calc_ev_end);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -998,7 +998,7 @@ e_out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t catalog_read(struct file *filp, struct kobject *kobj,</div><div class='del'>-			    struct bin_attribute *bin_attr, char *buf,</div><div class='add'>+			    const struct bin_attribute *bin_attr, char *buf,</div><div class='ctx'> 			    loff_t offset, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	long hret;</div><div class='hunk'>@@ -1108,14 +1108,14 @@ PAGE_0_ATTR(catalog_version, "%lld\n",</div><div class='ctx'> 		(unsigned long long)be64_to_cpu(page_0-&gt;version));</div><div class='ctx'> PAGE_0_ATTR(catalog_len, "%lld\n",</div><div class='ctx'> 		(unsigned long long)be32_to_cpu(page_0-&gt;length) * 4096);</div><div class='del'>-static BIN_ATTR_RO(catalog, 0/* real length varies */);</div><div class='add'>+static const BIN_ATTR_RO(catalog, 0/* real length varies */);</div><div class='ctx'> static DEVICE_ATTR_RO(domains);</div><div class='ctx'> static DEVICE_ATTR_RO(sockets);</div><div class='ctx'> static DEVICE_ATTR_RO(chipspersocket);</div><div class='ctx'> static DEVICE_ATTR_RO(coresperchip);</div><div class='ctx'> static DEVICE_ATTR_RO(cpumask);</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute *if_bin_attrs[] = {</div><div class='add'>+static const struct bin_attribute *const if_bin_attrs[] = {</div><div class='ctx'> 	&amp;bin_attr_catalog,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c<br/>index 56301b2bc8ae..2b3547fdba4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/isa207-common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/perf/isa207-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/isa207-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/isa207-common.c</a></div><div class='hunk'>@@ -319,10 +319,18 @@ void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sier = mfspr(SPRN_SIER);</div><div class='add'>+	/*</div><div class='add'>+	 * Use regs-dar for SPRN_SIER which is saved</div><div class='add'>+	 * during perf_read_regs at the beginning</div><div class='add'>+	 * of the PMU interrupt handler to avoid multiple</div><div class='add'>+	 * reads of SPRN_SIER</div><div class='add'>+	 */</div><div class='add'>+	sier = regs-&gt;dar;</div><div class='ctx'> 	val = (sier &amp; ISA207_SIER_TYPE_MASK) &gt;&gt; ISA207_SIER_TYPE_SHIFT;</div><div class='del'>-	if (val != 1 &amp;&amp; val != 2 &amp;&amp; !(val == 7 &amp;&amp; cpu_has_feature(CPU_FTR_ARCH_31)))</div><div class='add'>+	if (val != 1 &amp;&amp; val != 2 &amp;&amp; !(val == 7 &amp;&amp; cpu_has_feature(CPU_FTR_ARCH_31))) {</div><div class='add'>+		dsrc-&gt;val = 0;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	idx = (sier &amp; ISA207_SIER_LDST_MASK) &gt;&gt; ISA207_SIER_LDST_SHIFT;</div><div class='ctx'> 	sub_idx = (sier &amp; ISA207_SIER_DATA_SRC_MASK) &gt;&gt; ISA207_SIER_DATA_SRC_SHIFT;</div><div class='hunk'>@@ -338,8 +346,12 @@ void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,</div><div class='ctx'> 		 * to determine the exact instruction type. If the sampling</div><div class='ctx'> 		 * criteria is neither load or store, set the type as default</div><div class='ctx'> 		 * to NA.</div><div class='add'>+		 *</div><div class='add'>+		 * Use regs-&gt;dsisr for MMCRA which is saved during perf_read_regs</div><div class='add'>+		 * at the beginning of the PMU interrupt handler to avoid</div><div class='add'>+		 * multiple reads of SPRN_MMCRA</div><div class='ctx'> 		 */</div><div class='del'>-		mmcra = mfspr(SPRN_MMCRA);</div><div class='add'>+		mmcra = regs-&gt;dsisr;</div><div class='ctx'> </div><div class='ctx'> 		op_type = (mmcra &gt;&gt; MMCRA_SAMP_ELIG_SHIFT) &amp; MMCRA_SAMP_ELIG_MASK;</div><div class='ctx'> 		switch (op_type) {</div><div class='head'>diff --git a/arch/powerpc/perf/kvm-hv-pmu.c b/arch/powerpc/perf/kvm-hv-pmu.c<br/>new file mode 100644<br/>index 000000000000..ae264c9080ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/kvm-hv-pmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/kvm-hv-pmu.c</a></div><div class='hunk'>@@ -0,0 +1,435 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Description: PMUs specific to running nested KVM-HV guests</div><div class='add'>+ * on Book3S processors (specifically POWER9 and later).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)  "kvmppc-pmu: " fmt</div><div class='add'>+</div><div class='add'>+#include "asm-generic/local64.h"</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/gfp_types.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s.h&gt;</div><div class='add'>+#include &lt;asm/mmu.h&gt;</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+#include &lt;asm/pte-walk.h&gt;</div><div class='add'>+#include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/plpar_wrappers.h&gt;</div><div class='add'>+#include &lt;asm/firmware.h&gt;</div><div class='add'>+</div><div class='add'>+#include "asm/guest-state-buffer.h"</div><div class='add'>+</div><div class='add'>+enum kvmppc_pmu_eventid {</div><div class='add'>+	KVMPPC_EVENT_HOST_HEAP,</div><div class='add'>+	KVMPPC_EVENT_HOST_HEAP_MAX,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE_MAX,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE_RECLAIM,</div><div class='add'>+	KVMPPC_EVENT_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KVMPPC_PMU_EVENT_ATTR(_name, _id) \</div><div class='add'>+	PMU_EVENT_ATTR_ID(_name, kvmppc_events_sysfs_show, _id)</div><div class='add'>+</div><div class='add'>+static ssize_t kvmppc_events_sysfs_show(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *page)</div><div class='add'>+{</div><div class='add'>+	struct perf_pmu_events_attr *pmu_attr;</div><div class='add'>+</div><div class='add'>+	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);</div><div class='add'>+	return sprintf(page, "event=0x%02llx\n", pmu_attr-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Holds the hostwide stats */</div><div class='add'>+static struct kvmppc_hostwide_stats {</div><div class='add'>+	u64 guest_heap;</div><div class='add'>+	u64 guest_heap_max;</div><div class='add'>+	u64 guest_pgtable_size;</div><div class='add'>+	u64 guest_pgtable_size_max;</div><div class='add'>+	u64 guest_pgtable_reclaim;</div><div class='add'>+} l0_stats;</div><div class='add'>+</div><div class='add'>+/* Protect access to l0_stats */</div><div class='add'>+static DEFINE_SPINLOCK(lock_l0_stats);</div><div class='add'>+</div><div class='add'>+/* GSB related structs needed to talk to L0 */</div><div class='add'>+static struct kvmppc_gs_msg *gsm_l0_stats;</div><div class='add'>+static struct kvmppc_gs_buff *gsb_l0_stats;</div><div class='add'>+static struct kvmppc_gs_parser gsp_l0_stats;</div><div class='add'>+</div><div class='add'>+static struct attribute *kvmppc_pmu_events_attr[] = {</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_heap, KVMPPC_EVENT_HOST_HEAP),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_heap_max, KVMPPC_EVENT_HOST_HEAP_MAX),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable, KVMPPC_EVENT_HOST_PGTABLE),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable_max, KVMPPC_EVENT_HOST_PGTABLE_MAX),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable_reclaim, KVMPPC_EVENT_HOST_PGTABLE_RECLAIM),</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group kvmppc_pmu_events_group = {</div><div class='add'>+	.name = "events",</div><div class='add'>+	.attrs = kvmppc_pmu_events_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+PMU_FORMAT_ATTR(event, "config:0-5");</div><div class='add'>+static struct attribute *kvmppc_pmu_format_attr[] = {</div><div class='add'>+	&amp;format_attr_event.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group kvmppc_pmu_format_group = {</div><div class='add'>+	.name = "format",</div><div class='add'>+	.attrs = kvmppc_pmu_format_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *kvmppc_pmu_attr_groups[] = {</div><div class='add'>+	&amp;kvmppc_pmu_events_group,</div><div class='add'>+	&amp;kvmppc_pmu_format_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Issue the hcall to get the L0-host stats.</div><div class='add'>+ * Should be called with l0-stat lock held</div><div class='add'>+ */</div><div class='add'>+static int kvmppc_update_l0_stats(void)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* With HOST_WIDE flags guestid and vcpuid will be ignored */</div><div class='add'>+	rc = kvmppc_gsb_recv(gsb_l0_stats, KVMPPC_GS_FLAGS_HOST_WIDE);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Parse the guest state buffer is successful */</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp_l0_stats, gsb_l0_stats);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Update the l0 returned stats*/</div><div class='add'>+	memset(&amp;l0_stats, 0, sizeof(l0_stats));</div><div class='add'>+	rc = kvmppc_gsm_refresh_info(gsm_l0_stats, gsb_l0_stats);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Update the value of the given perf_event */</div><div class='add'>+static int kvmppc_pmu_event_update(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	u64 curr_val, prev_val;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int config = event-&gt;attr.config;</div><div class='add'>+</div><div class='add'>+	/* Ensure no one else is modifying the l0_stats */</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_update_l0_stats();</div><div class='add'>+	if (!rc) {</div><div class='add'>+		switch (config) {</div><div class='add'>+		case KVMPPC_EVENT_HOST_HEAP:</div><div class='add'>+			curr_val = l0_stats.guest_heap;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_HEAP_MAX:</div><div class='add'>+			curr_val = l0_stats.guest_heap_max;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_size;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE_MAX:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_size_max;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE_RECLAIM:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_reclaim;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			rc = -ENOENT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	/* If no error than update the perf event */</div><div class='add'>+	if (!rc) {</div><div class='add'>+		prev_val = local64_xchg(&amp;event-&gt;hw.prev_count, curr_val);</div><div class='add'>+		if (curr_val &gt; prev_val)</div><div class='add'>+			local64_add(curr_val - prev_val, &amp;event-&gt;count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_pmu_event_init(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	unsigned int config = event-&gt;attr.config;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: Event(%p) id=%llu cpu=%x on_cpu=%x config=%u",</div><div class='add'>+		 __func__, event, event-&gt;id, event-&gt;cpu,</div><div class='add'>+		 event-&gt;oncpu, config);</div><div class='add'>+</div><div class='add'>+	if (event-&gt;attr.type != event-&gt;pmu-&gt;type)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (config &gt;= KVMPPC_EVENT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	local64_set(&amp;event-&gt;hw.prev_count, 0);</div><div class='add'>+	local64_set(&amp;event-&gt;count, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_pmu_del(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	kvmppc_pmu_event_update(event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_pmu_add(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	if (flags &amp; PERF_EF_START)</div><div class='add'>+		return kvmppc_pmu_event_update(event);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_pmu_read(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	kvmppc_pmu_event_update(event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return the size of the needed guest state buffer */</div><div class='add'>+static size_t hostwide_get_size(struct kvmppc_gs_msg *gsm)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+	const u16 ids[] = {</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(ids); i++)</div><div class='add'>+		size += kvmppc_gse_total_size(kvmppc_gsid_size(ids[i]));</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Populate the request guest state buffer */</div><div class='add'>+static int hostwide_fill_info(struct kvmppc_gs_buff *gsb,</div><div class='add'>+			      struct kvmppc_gs_msg *gsm)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+	struct kvmppc_hostwide_stats  *stats = gsm-&gt;data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * It doesn't matter what values are put into request buffer as</div><div class='add'>+	 * they are going to be overwritten anyways. But for the sake of</div><div class='add'>+	 * testcode and symmetry contents of existing stats are put</div><div class='add'>+	 * populated into the request guest state buffer.</div><div class='add'>+	 */</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+					stats-&gt;guest_heap);</div><div class='add'>+</div><div class='add'>+	if (!rc &amp;&amp; kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+					stats-&gt;guest_heap_max);</div><div class='add'>+</div><div class='add'>+	if (!rc &amp;&amp; kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+					stats-&gt;guest_pgtable_size);</div><div class='add'>+	if (!rc &amp;&amp;</div><div class='add'>+	    kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+					stats-&gt;guest_pgtable_size_max);</div><div class='add'>+	if (!rc &amp;&amp;</div><div class='add'>+	    kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM,</div><div class='add'>+					stats-&gt;guest_pgtable_reclaim);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse and update the host wide stats from returned gsb */</div><div class='add'>+static int hostwide_refresh_info(struct kvmppc_gs_msg *gsm,</div><div class='add'>+				 struct kvmppc_gs_buff *gsb)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+	struct kvmppc_hostwide_stats *stats = gsm-&gt;data;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_heap = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_heap_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_size = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_size_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_reclaim = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* gsb-message ops for setting up/parsing */</div><div class='add'>+static struct kvmppc_gs_msg_ops gsb_ops_l0_stats = {</div><div class='add'>+	.get_size = hostwide_get_size,</div><div class='add'>+	.fill_info = hostwide_fill_info,</div><div class='add'>+	.refresh_info = hostwide_refresh_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvmppc_init_hostwide(void)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	/* already registered ? */</div><div class='add'>+	if (gsm_l0_stats) {</div><div class='add'>+		rc = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup the Guest state message/buffer to talk to L0 */</div><div class='add'>+	gsm_l0_stats = kvmppc_gsm_new(&amp;gsb_ops_l0_stats, &amp;l0_stats,</div><div class='add'>+				      GSM_SEND, GFP_KERNEL);</div><div class='add'>+	if (!gsm_l0_stats) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Populate the Idents */</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	/* allocate GSB. Guest/Vcpu Id is ignored */</div><div class='add'>+	gsb_l0_stats = kvmppc_gsb_new(kvmppc_gsm_size(gsm_l0_stats), 0, 0,</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!gsb_l0_stats) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ask the ops to fill in the info */</div><div class='add'>+	rc = kvmppc_gsm_fill_info(gsm_l0_stats, gsb_l0_stats);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (gsm_l0_stats)</div><div class='add'>+			kvmppc_gsm_free(gsm_l0_stats);</div><div class='add'>+		if (gsb_l0_stats)</div><div class='add'>+			kvmppc_gsb_free(gsb_l0_stats);</div><div class='add'>+		gsm_l0_stats = NULL;</div><div class='add'>+		gsb_l0_stats = NULL;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_cleanup_hostwide(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	if (gsm_l0_stats)</div><div class='add'>+		kvmppc_gsm_free(gsm_l0_stats);</div><div class='add'>+	if (gsb_l0_stats)</div><div class='add'>+		kvmppc_gsb_free(gsb_l0_stats);</div><div class='add'>+	gsm_l0_stats = NULL;</div><div class='add'>+	gsb_l0_stats = NULL;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* L1 wide counters PMU */</div><div class='add'>+static struct pmu kvmppc_pmu = {</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+	.task_ctx_nr = perf_sw_context,</div><div class='add'>+	.name = "kvm-hv",</div><div class='add'>+	.event_init = kvmppc_pmu_event_init,</div><div class='add'>+	.add = kvmppc_pmu_add,</div><div class='add'>+	.del = kvmppc_pmu_del,</div><div class='add'>+	.read = kvmppc_pmu_read,</div><div class='add'>+	.attr_groups = kvmppc_pmu_attr_groups,</div><div class='add'>+	.type = -1,</div><div class='add'>+	.scope = PERF_PMU_SCOPE_SYS_WIDE,</div><div class='add'>+	.capabilities = PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init kvmppc_register_pmu(void)</div><div class='add'>+{</div><div class='add'>+	int rc = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* only support events for nestedv2 right now */</div><div class='add'>+	if (kvmhv_is_nestedv2()) {</div><div class='add'>+		rc = kvmppc_init_hostwide();</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Register the pmu */</div><div class='add'>+		rc = perf_pmu_register(&amp;kvmppc_pmu, kvmppc_pmu.name, -1);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		pr_info("Registered kvm-hv pmu");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit kvmppc_unregister_pmu(void)</div><div class='add'>+{</div><div class='add'>+	if (kvmhv_is_nestedv2()) {</div><div class='add'>+		kvmppc_cleanup_hostwide();</div><div class='add'>+</div><div class='add'>+		if (kvmppc_pmu.type != -1)</div><div class='add'>+			perf_pmu_unregister(&amp;kvmppc_pmu);</div><div class='add'>+</div><div class='add'>+		pr_info("kvmhv_pmu unregistered.\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(kvmppc_register_pmu);</div><div class='add'>+module_exit(kvmppc_unregister_pmu);</div><div class='add'>+MODULE_DESCRIPTION("KVM PPC Book3s-hv PMU");</div><div class='add'>+MODULE_AUTHOR("Vaibhav Jain &lt;vaibhav@linux.ibm.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/perf/vpa-dtl.c b/arch/powerpc/perf/vpa-dtl.c<br/>new file mode 100644<br/>index 000000000000..3c1d1c28deb9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/vpa-dtl.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/vpa-dtl.c</a></div><div class='hunk'>@@ -0,0 +1,596 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Perf interface to expose Dispatch Trace Log counters.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Kajol Jain, IBM Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_SPLPAR</div><div class='add'>+#define pr_fmt(fmt) "vpa_dtl: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;asm/dtl.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/plpar_wrappers.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#define EVENT(_name, _code)     enum{_name = _code}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Based on Power Architecture Platform Reference(PAPR) documentation,</div><div class='add'>+ * Table 14.14. Per Virtual Processor Area, below Dispatch Trace Log(DTL)</div><div class='add'>+ * Enable Mask used to get corresponding virtual processor dispatch</div><div class='add'>+ * to preempt traces:</div><div class='add'>+ *   DTL_CEDE(0x1): Trace voluntary (OS initiated) virtual</div><div class='add'>+ *   processor waits</div><div class='add'>+ *   DTL_PREEMPT(0x2): Trace time slice preempts</div><div class='add'>+ *   DTL_FAULT(0x4): Trace virtual partition memory page</div><div class='add'>+ faults.</div><div class='add'>+ *   DTL_ALL(0x7): Trace all (DTL_CEDE | DTL_PREEMPT | DTL_FAULT)</div><div class='add'>+ *</div><div class='add'>+ * Event codes based on Dispatch Trace Log Enable Mask.</div><div class='add'>+ */</div><div class='add'>+EVENT(DTL_CEDE,         0x1);</div><div class='add'>+EVENT(DTL_PREEMPT,      0x2);</div><div class='add'>+EVENT(DTL_FAULT,        0x4);</div><div class='add'>+EVENT(DTL_ALL,          0x7);</div><div class='add'>+</div><div class='add'>+GENERIC_EVENT_ATTR(dtl_cede, DTL_CEDE);</div><div class='add'>+GENERIC_EVENT_ATTR(dtl_preempt, DTL_PREEMPT);</div><div class='add'>+GENERIC_EVENT_ATTR(dtl_fault, DTL_FAULT);</div><div class='add'>+GENERIC_EVENT_ATTR(dtl_all, DTL_ALL);</div><div class='add'>+</div><div class='add'>+PMU_FORMAT_ATTR(event, "config:0-7");</div><div class='add'>+</div><div class='add'>+static struct attribute *events_attr[] = {</div><div class='add'>+	GENERIC_EVENT_PTR(DTL_CEDE),</div><div class='add'>+	GENERIC_EVENT_PTR(DTL_PREEMPT),</div><div class='add'>+	GENERIC_EVENT_PTR(DTL_FAULT),</div><div class='add'>+	GENERIC_EVENT_PTR(DTL_ALL),</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group event_group = {</div><div class='add'>+	.name = "events",</div><div class='add'>+	.attrs = events_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute *format_attrs[] = {</div><div class='add'>+	&amp;format_attr_event.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group format_group = {</div><div class='add'>+	.name = "format",</div><div class='add'>+	.attrs = format_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *attr_groups[] = {</div><div class='add'>+	&amp;format_group,</div><div class='add'>+	&amp;event_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vpa_dtl {</div><div class='add'>+	struct dtl_entry	*buf;</div><div class='add'>+	u64			last_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vpa_pmu_ctx {</div><div class='add'>+	struct perf_output_handle handle;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vpa_pmu_buf {</div><div class='add'>+	int     nr_pages;</div><div class='add'>+	bool    snapshot;</div><div class='add'>+	u64     *base;</div><div class='add'>+	u64     size;</div><div class='add'>+	u64     head;</div><div class='add'>+	u64	head_size;</div><div class='add'>+	/* boot timebase and frequency needs to be saved only at once */</div><div class='add'>+	int	boottb_freq_saved;</div><div class='add'>+	u64	threshold;</div><div class='add'>+	bool	full;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * To corelate each DTL entry with other events across CPU's,</div><div class='add'>+ * we need to map timebase from "struct dtl_entry" which phyp</div><div class='add'>+ * provides with boot timebase. This also needs timebase frequency.</div><div class='add'>+ * Formula is: ((timbase from DTL entry - boot time) / frequency)</div><div class='add'>+ *</div><div class='add'>+ * To match with size of "struct dtl_entry" to ease post processing,</div><div class='add'>+ * padded 24 bytes to the structure.</div><div class='add'>+ */</div><div class='add'>+struct boottb_freq {</div><div class='add'>+	u64	boot_tb;</div><div class='add'>+	u64	tb_freq;</div><div class='add'>+	u64	timebase;</div><div class='add'>+	u64	padded[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(struct vpa_pmu_ctx, vpa_pmu_ctx);</div><div class='add'>+static DEFINE_PER_CPU(struct vpa_dtl, vpa_dtl_cpu);</div><div class='add'>+</div><div class='add'>+/* variable to capture reference count for the active dtl threads */</div><div class='add'>+static int dtl_global_refc;</div><div class='add'>+static spinlock_t dtl_global_lock = __SPIN_LOCK_UNLOCKED(dtl_global_lock);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Capture DTL data in AUX buffer</div><div class='add'>+ */</div><div class='add'>+static void vpa_dtl_capture_aux(long *n_entries, struct vpa_pmu_buf *buf,</div><div class='add'>+		struct vpa_dtl *dtl, int index)</div><div class='add'>+{</div><div class='add'>+	struct dtl_entry *aux_copy_buf = (struct dtl_entry *)buf-&gt;base;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * check if there is enough space to contain the</div><div class='add'>+	 * DTL data. If not, save the data for available</div><div class='add'>+	 * memory and set full to true.</div><div class='add'>+	 */</div><div class='add'>+	if (buf-&gt;head + *n_entries &gt;= buf-&gt;threshold) {</div><div class='add'>+		*n_entries = buf-&gt;threshold - buf-&gt;head;</div><div class='add'>+		buf-&gt;full = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy to AUX buffer from per-thread address</div><div class='add'>+	 */</div><div class='add'>+	memcpy(aux_copy_buf + buf-&gt;head, &amp;dtl-&gt;buf[index], *n_entries * sizeof(struct dtl_entry));</div><div class='add'>+</div><div class='add'>+	if (buf-&gt;full) {</div><div class='add'>+		/*</div><div class='add'>+		 * Set head of private aux to zero when buffer is full</div><div class='add'>+		 * so that next data will be copied to beginning of the</div><div class='add'>+		 * buffer</div><div class='add'>+		 */</div><div class='add'>+		buf-&gt;head = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf-&gt;head += *n_entries;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function to dump the dispatch trace log buffer data to the</div><div class='add'>+ * perf data.</div><div class='add'>+ *</div><div class='add'>+ * perf_aux_output_begin: This function is called before writing</div><div class='add'>+ * to AUX area. This returns the pointer to aux area private structure,</div><div class='add'>+ * ie "struct vpa_pmu_buf" here which is set in setup_aux() function.</div><div class='add'>+ * The function obtains the output handle (used in perf_aux_output_end).</div><div class='add'>+ * when capture completes in vpa_dtl_capture_aux(), call perf_aux_output_end()</div><div class='add'>+ * to commit the recorded data.</div><div class='add'>+ *</div><div class='add'>+ * perf_aux_output_end: This function commits data by adjusting the</div><div class='add'>+ * aux_head of "struct perf_buffer". aux_tail will be moved in perf tools</div><div class='add'>+ * side when writing the data from aux buffer to perf.data file in disk.</div><div class='add'>+ *</div><div class='add'>+ * Here in the private aux structure, we maintain head to know where</div><div class='add'>+ * to copy data next time in the PMU driver. vpa_pmu_buf-&gt;head is moved to</div><div class='add'>+ * maintain the aux head for PMU driver. It is responsiblity of PMU</div><div class='add'>+ * driver to make sure data is copied between perf_aux_output_begin and</div><div class='add'>+ * perf_aux_output_end.</div><div class='add'>+ *</div><div class='add'>+ * After data is copied in vpa_dtl_capture_aux() function, perf_aux_output_end()</div><div class='add'>+ * is called to move the aux-&gt;head of "struct perf_buffer" to indicate size of</div><div class='add'>+ * data in aux buffer. This will post a PERF_RECORD_AUX into the perf buffer.</div><div class='add'>+ * Data will be written to disk only when the allocated buffer is full.</div><div class='add'>+ *</div><div class='add'>+ * By this approach, all the DTL data will be present as-is in the</div><div class='add'>+ * perf.data. The data will be pre-processed in perf tools side when doing</div><div class='add'>+ * perf report/perf script and this will avoid time taken to create samples</div><div class='add'>+ * in the kernel space.</div><div class='add'>+ */</div><div class='add'>+static void vpa_dtl_dump_sample_data(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	u64 cur_idx, last_idx, i;</div><div class='add'>+	u64 boot_tb;</div><div class='add'>+	struct boottb_freq boottb_freq;</div><div class='add'>+</div><div class='add'>+	/* actual number of entries read */</div><div class='add'>+	long n_read = 0, read_size = 0;</div><div class='add'>+</div><div class='add'>+	/* number of entries added to dtl buffer */</div><div class='add'>+	long n_req;</div><div class='add'>+</div><div class='add'>+	struct vpa_pmu_ctx *vpa_ctx = this_cpu_ptr(&amp;vpa_pmu_ctx);</div><div class='add'>+</div><div class='add'>+	struct vpa_pmu_buf *aux_buf;</div><div class='add'>+</div><div class='add'>+	struct vpa_dtl *dtl = &amp;per_cpu(vpa_dtl_cpu, event-&gt;cpu);</div><div class='add'>+	u64 size;</div><div class='add'>+</div><div class='add'>+	cur_idx = be64_to_cpu(lppaca_of(event-&gt;cpu).dtl_idx);</div><div class='add'>+	last_idx = dtl-&gt;last_idx;</div><div class='add'>+</div><div class='add'>+	if (last_idx + N_DISPATCH_LOG &lt;= cur_idx)</div><div class='add'>+		last_idx = cur_idx - N_DISPATCH_LOG + 1;</div><div class='add'>+</div><div class='add'>+	n_req = cur_idx - last_idx;</div><div class='add'>+</div><div class='add'>+	/* no new entry added to the buffer, return */</div><div class='add'>+	if (n_req &lt;= 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dtl-&gt;last_idx = last_idx + n_req;</div><div class='add'>+	boot_tb = get_boot_tb();</div><div class='add'>+</div><div class='add'>+	i = last_idx % N_DISPATCH_LOG;</div><div class='add'>+</div><div class='add'>+	aux_buf = perf_aux_output_begin(&amp;vpa_ctx-&gt;handle, event);</div><div class='add'>+	if (!aux_buf) {</div><div class='add'>+		pr_debug("returning. no aux\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!aux_buf-&gt;boottb_freq_saved) {</div><div class='add'>+		pr_debug("Copying boot tb to aux buffer: %lld\n", boot_tb);</div><div class='add'>+		/* Save boot_tb to convert raw timebase to it's relative system boot time */</div><div class='add'>+		boottb_freq.boot_tb = boot_tb;</div><div class='add'>+		/* Save tb_ticks_per_sec to convert timebase to sec */</div><div class='add'>+		boottb_freq.tb_freq = tb_ticks_per_sec;</div><div class='add'>+		boottb_freq.timebase = 0;</div><div class='add'>+		memcpy(aux_buf-&gt;base, &amp;boottb_freq, sizeof(boottb_freq));</div><div class='add'>+		aux_buf-&gt;head += 1;</div><div class='add'>+		aux_buf-&gt;boottb_freq_saved = 1;</div><div class='add'>+		n_read += 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read the tail of the buffer if we've wrapped */</div><div class='add'>+	if (i + n_req &gt; N_DISPATCH_LOG) {</div><div class='add'>+		read_size = N_DISPATCH_LOG - i;</div><div class='add'>+		vpa_dtl_capture_aux(&amp;read_size, aux_buf, dtl, i);</div><div class='add'>+		n_req -= read_size;</div><div class='add'>+		n_read += read_size;</div><div class='add'>+		i = 0;</div><div class='add'>+		if (aux_buf-&gt;full) {</div><div class='add'>+			size = (n_read * sizeof(struct dtl_entry));</div><div class='add'>+			if ((size +  aux_buf-&gt;head_size) &gt; aux_buf-&gt;size) {</div><div class='add'>+				size = aux_buf-&gt;size - aux_buf-&gt;head_size;</div><div class='add'>+				perf_aux_output_end(&amp;vpa_ctx-&gt;handle, size);</div><div class='add'>+				aux_buf-&gt;head = 0;</div><div class='add'>+				aux_buf-&gt;head_size = 0;</div><div class='add'>+			} else {</div><div class='add'>+				aux_buf-&gt;head_size += (n_read * sizeof(struct dtl_entry));</div><div class='add'>+				perf_aux_output_end(&amp;vpa_ctx-&gt;handle, n_read * sizeof(struct dtl_entry));</div><div class='add'>+			}</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* .. and now the head */</div><div class='add'>+	vpa_dtl_capture_aux(&amp;n_req, aux_buf, dtl, i);</div><div class='add'>+</div><div class='add'>+	size = ((n_req + n_read) * sizeof(struct dtl_entry));</div><div class='add'>+	if ((size +  aux_buf-&gt;head_size) &gt; aux_buf-&gt;size) {</div><div class='add'>+		size = aux_buf-&gt;size - aux_buf-&gt;head_size;</div><div class='add'>+		perf_aux_output_end(&amp;vpa_ctx-&gt;handle, size);</div><div class='add'>+		aux_buf-&gt;head = 0;</div><div class='add'>+		aux_buf-&gt;head_size = 0;</div><div class='add'>+	} else {</div><div class='add'>+		aux_buf-&gt;head_size += ((n_req + n_read) * sizeof(struct dtl_entry));</div><div class='add'>+		/* Move the aux-&gt;head to indicate size of data in aux buffer */</div><div class='add'>+		perf_aux_output_end(&amp;vpa_ctx-&gt;handle, (n_req + n_read) * sizeof(struct dtl_entry));</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	aux_buf-&gt;full = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The VPA Dispatch Trace log counters do not interrupt on overflow.</div><div class='add'>+ * Therefore, the kernel needs to poll the counters to avoid missing</div><div class='add'>+ * an overflow using hrtimer. The timer interval is based on sample_period</div><div class='add'>+ * count provided by user, and minimum interval is 1 millisecond.</div><div class='add'>+ */</div><div class='add'>+static enum hrtimer_restart vpa_dtl_hrtimer_handle(struct hrtimer *hrtimer)</div><div class='add'>+{</div><div class='add'>+	struct perf_event *event;</div><div class='add'>+	u64 period;</div><div class='add'>+</div><div class='add'>+	event = container_of(hrtimer, struct perf_event, hw.hrtimer);</div><div class='add'>+</div><div class='add'>+	if (event-&gt;state != PERF_EVENT_STATE_ACTIVE)</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	vpa_dtl_dump_sample_data(event);</div><div class='add'>+	period = max_t(u64, NSEC_PER_MSEC, event-&gt;hw.sample_period);</div><div class='add'>+	hrtimer_forward_now(hrtimer, ns_to_ktime(period));</div><div class='add'>+</div><div class='add'>+	return HRTIMER_RESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_dtl_start_hrtimer(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	u64 period;</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+</div><div class='add'>+	period = max_t(u64, NSEC_PER_MSEC, hwc-&gt;sample_period);</div><div class='add'>+	hrtimer_start(&amp;hwc-&gt;hrtimer, ns_to_ktime(period), HRTIMER_MODE_REL_PINNED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_dtl_stop_hrtimer(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+</div><div class='add'>+	hrtimer_cancel(&amp;hwc-&gt;hrtimer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_dtl_reset_global_refc(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;dtl_global_lock);</div><div class='add'>+	dtl_global_refc--;</div><div class='add'>+	if (dtl_global_refc &lt;= 0) {</div><div class='add'>+		dtl_global_refc = 0;</div><div class='add'>+		up_write(&amp;dtl_access_lock);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;dtl_global_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vpa_dtl_mem_alloc(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct vpa_dtl *dtl = &amp;per_cpu(vpa_dtl_cpu, cpu);</div><div class='add'>+	struct dtl_entry *buf = NULL;</div><div class='add'>+</div><div class='add'>+	/* Check for dispatch trace log buffer cache */</div><div class='add'>+	if (!dtl_cache)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf = kmem_cache_alloc_node(dtl_cache, GFP_KERNEL | GFP_ATOMIC, cpu_to_node(cpu));</div><div class='add'>+	if (!buf) {</div><div class='add'>+		pr_warn("buffer allocation failed for cpu %d\n", cpu);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	dtl-&gt;buf = buf;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vpa_dtl_event_init(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/* test the event attr type for PMU enumeration */</div><div class='add'>+	if (event-&gt;attr.type != event-&gt;pmu-&gt;type)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (!perfmon_capable())</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	/* Return if this is a counting event */</div><div class='add'>+	if (!is_sampling_event(event))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* no branch sampling */</div><div class='add'>+	if (has_branch_stack(event))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Invalid eventcode */</div><div class='add'>+	switch (event-&gt;attr.config) {</div><div class='add'>+	case DTL_LOG_CEDE:</div><div class='add'>+	case DTL_LOG_PREEMPT:</div><div class='add'>+	case DTL_LOG_FAULT:</div><div class='add'>+	case DTL_LOG_ALL:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;dtl_global_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To ensure there are no other conflicting dtl users</div><div class='add'>+	 * (example: /proc/powerpc/vcpudispatch_stats or debugfs dtl),</div><div class='add'>+	 * below code try to take the dtl_access_lock.</div><div class='add'>+	 * The dtl_access_lock is a rwlock defined in dtl.h, which is used</div><div class='add'>+	 * to unsure there is no conflicting dtl users.</div><div class='add'>+	 * Based on below code, vpa_dtl pmu tries to take write access lock</div><div class='add'>+	 * and also checks for dtl_global_refc, to make sure that the</div><div class='add'>+	 * dtl_access_lock is taken by vpa_dtl pmu interface.</div><div class='add'>+	 */</div><div class='add'>+	if (dtl_global_refc == 0 &amp;&amp; !down_write_trylock(&amp;dtl_access_lock)) {</div><div class='add'>+		spin_unlock(&amp;dtl_global_lock);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate dtl buffer memory */</div><div class='add'>+	if (vpa_dtl_mem_alloc(event-&gt;cpu)) {</div><div class='add'>+		spin_unlock(&amp;dtl_global_lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Increment the number of active vpa_dtl pmu threads. The</div><div class='add'>+	 * dtl_global_refc is used to keep count of cpu threads that</div><div class='add'>+	 * currently capturing dtl data using vpa_dtl pmu interface.</div><div class='add'>+	 */</div><div class='add'>+	dtl_global_refc++;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;dtl_global_lock);</div><div class='add'>+</div><div class='add'>+	hrtimer_setup(&amp;hwc-&gt;hrtimer, vpa_dtl_hrtimer_handle, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Since hrtimers have a fixed rate, we can do a static freq-&gt;period</div><div class='add'>+	 * mapping and avoid the whole period adjust feedback stuff.</div><div class='add'>+	 */</div><div class='add'>+	if (event-&gt;attr.freq) {</div><div class='add'>+		long freq = event-&gt;attr.sample_freq;</div><div class='add'>+</div><div class='add'>+		event-&gt;attr.sample_period = NSEC_PER_SEC / freq;</div><div class='add'>+		hwc-&gt;sample_period = event-&gt;attr.sample_period;</div><div class='add'>+		local64_set(&amp;hwc-&gt;period_left, hwc-&gt;sample_period);</div><div class='add'>+		hwc-&gt;last_period = hwc-&gt;sample_period;</div><div class='add'>+		event-&gt;attr.freq = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	event-&gt;destroy = vpa_dtl_reset_global_refc;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vpa_dtl_event_add(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	int ret, hwcpu;</div><div class='add'>+	unsigned long addr;</div><div class='add'>+	struct vpa_dtl *dtl = &amp;per_cpu(vpa_dtl_cpu, event-&gt;cpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Register our dtl buffer with the hypervisor. The</div><div class='add'>+	 * HV expects the buffer size to be passed in the second</div><div class='add'>+	 * word of the buffer. Refer section '14.11.3.2. H_REGISTER_VPA'</div><div class='add'>+	 * from PAPR for more information.</div><div class='add'>+	 */</div><div class='add'>+	((u32 *)dtl-&gt;buf)[1] = cpu_to_be32(DISPATCH_LOG_BYTES);</div><div class='add'>+	dtl-&gt;last_idx = 0;</div><div class='add'>+</div><div class='add'>+	hwcpu = get_hard_smp_processor_id(event-&gt;cpu);</div><div class='add'>+	addr = __pa(dtl-&gt;buf);</div><div class='add'>+</div><div class='add'>+	ret = register_dtl(hwcpu, addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_warn("DTL registration for cpu %d (hw %d) failed with %d\n",</div><div class='add'>+			event-&gt;cpu, hwcpu, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set our initial buffer indices */</div><div class='add'>+	lppaca_of(event-&gt;cpu).dtl_idx = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that our updates to the lppaca fields have</div><div class='add'>+	 * occurred before we actually enable the logging</div><div class='add'>+	 */</div><div class='add'>+	smp_wmb();</div><div class='add'>+</div><div class='add'>+	/* enable event logging */</div><div class='add'>+	lppaca_of(event-&gt;cpu).dtl_enable_mask = event-&gt;attr.config;</div><div class='add'>+</div><div class='add'>+	vpa_dtl_start_hrtimer(event);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_dtl_event_del(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	int hwcpu = get_hard_smp_processor_id(event-&gt;cpu);</div><div class='add'>+	struct vpa_dtl *dtl = &amp;per_cpu(vpa_dtl_cpu, event-&gt;cpu);</div><div class='add'>+</div><div class='add'>+	vpa_dtl_stop_hrtimer(event);</div><div class='add'>+	unregister_dtl(hwcpu);</div><div class='add'>+	kmem_cache_free(dtl_cache, dtl-&gt;buf);</div><div class='add'>+	dtl-&gt;buf = NULL;</div><div class='add'>+	lppaca_of(event-&gt;cpu).dtl_enable_mask = 0x0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function definition is empty as vpa_dtl_dump_sample_data</div><div class='add'>+ * is used to parse and dump the dispatch trace log data,</div><div class='add'>+ * to perf data.</div><div class='add'>+ */</div><div class='add'>+static void vpa_dtl_event_read(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set up pmu-private data structures for an AUX area</div><div class='add'>+ * **pages contains the aux buffer allocated for this event</div><div class='add'>+ * for the corresponding cpu. rb_alloc_aux uses "alloc_pages_node"</div><div class='add'>+ * and returns pointer to each page address. Map these pages to</div><div class='add'>+ * contiguous space using vmap and use that as base address.</div><div class='add'>+ *</div><div class='add'>+ * The aux private data structure ie, "struct vpa_pmu_buf" mainly</div><div class='add'>+ * saves</div><div class='add'>+ * - buf-&gt;base: aux buffer base address</div><div class='add'>+ * - buf-&gt;head: offset from base address where data will be written to.</div><div class='add'>+ * - buf-&gt;size: Size of allocated memory</div><div class='add'>+ */</div><div class='add'>+static void *vpa_dtl_setup_aux(struct perf_event *event, void **pages,</div><div class='add'>+		int nr_pages, bool snapshot)</div><div class='add'>+{</div><div class='add'>+	int i, cpu = event-&gt;cpu;</div><div class='add'>+	struct vpa_pmu_buf *buf __free(kfree) = NULL;</div><div class='add'>+	struct page **pglist __free(kfree) = NULL;</div><div class='add'>+</div><div class='add'>+	/* We need at least one page for this to work. */</div><div class='add'>+	if (!nr_pages)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (cpu == -1)</div><div class='add'>+		cpu = raw_smp_processor_id();</div><div class='add'>+</div><div class='add'>+	buf = kzalloc_node(sizeof(*buf), GFP_KERNEL, cpu_to_node(cpu));</div><div class='add'>+	if (!buf)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pglist = kcalloc(nr_pages, sizeof(*pglist), GFP_KERNEL);</div><div class='add'>+	if (!pglist)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_pages; ++i)</div><div class='add'>+		pglist[i] = virt_to_page(pages[i]);</div><div class='add'>+</div><div class='add'>+	buf-&gt;base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL);</div><div class='add'>+	if (!buf-&gt;base)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	buf-&gt;nr_pages = nr_pages;</div><div class='add'>+	buf-&gt;snapshot = false;</div><div class='add'>+</div><div class='add'>+	buf-&gt;size = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	buf-&gt;head = 0;</div><div class='add'>+	buf-&gt;head_size = 0;</div><div class='add'>+	buf-&gt;boottb_freq_saved = 0;</div><div class='add'>+	buf-&gt;threshold = ((buf-&gt;size - 32) / sizeof(struct dtl_entry));</div><div class='add'>+	return no_free_ptr(buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * free pmu-private AUX data structures</div><div class='add'>+ */</div><div class='add'>+static void vpa_dtl_free_aux(void *aux)</div><div class='add'>+{</div><div class='add'>+	struct vpa_pmu_buf *buf = aux;</div><div class='add'>+</div><div class='add'>+	vunmap(buf-&gt;base);</div><div class='add'>+	kfree(buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pmu vpa_dtl_pmu = {</div><div class='add'>+	.task_ctx_nr = perf_invalid_context,</div><div class='add'>+</div><div class='add'>+	.name = "vpa_dtl",</div><div class='add'>+	.attr_groups = attr_groups,</div><div class='add'>+	.event_init  = vpa_dtl_event_init,</div><div class='add'>+	.add         = vpa_dtl_event_add,</div><div class='add'>+	.del         = vpa_dtl_event_del,</div><div class='add'>+	.read        = vpa_dtl_event_read,</div><div class='add'>+	.setup_aux   = vpa_dtl_setup_aux,</div><div class='add'>+	.free_aux    = vpa_dtl_free_aux,</div><div class='add'>+	.capabilities = PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_EXCLUSIVE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vpa_dtl_init(void)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!firmware_has_feature(FW_FEATURE_SPLPAR)) {</div><div class='add'>+		pr_debug("not a shared virtualized system, not enabling\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This driver is intended only for L1 host. */</div><div class='add'>+	if (is_kvm_guest()) {</div><div class='add'>+		pr_debug("Only supported for L1 host system\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = perf_pmu_register(&amp;vpa_dtl_pmu, vpa_dtl_pmu.name, -1);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+device_initcall(vpa_dtl_init);</div><div class='add'>+#endif //CONFIG_PPC_SPLPAR</div><div class='head'>diff --git a/arch/powerpc/perf/vpa-pmu.c b/arch/powerpc/perf/vpa-pmu.c<br/>new file mode 100644<br/>index 000000000000..840733468959<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/perf/vpa-pmu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/perf/vpa-pmu.c</a></div><div class='hunk'>@@ -0,0 +1,204 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Performance monitoring support for Virtual Processor Area(VPA) based counters</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 IBM Corporation</div><div class='add'>+ */</div><div class='add'>+#define pr_fmt(fmt) "vpa_pmu: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s_64.h&gt;</div><div class='add'>+</div><div class='add'>+#define MODULE_VERS "1.0"</div><div class='add'>+#define MODULE_NAME "pseries_vpa_pmu"</div><div class='add'>+</div><div class='add'>+#define EVENT(_name, _code)     enum{_name = _code}</div><div class='add'>+</div><div class='add'>+#define VPA_PMU_EVENT_VAR(_id)  event_attr_##_id</div><div class='add'>+#define VPA_PMU_EVENT_PTR(_id)  (&amp;event_attr_##_id.attr.attr)</div><div class='add'>+</div><div class='add'>+static ssize_t vpa_pmu_events_sysfs_show(struct device *dev,</div><div class='add'>+					 struct device_attribute *attr, char *page)</div><div class='add'>+{</div><div class='add'>+	struct perf_pmu_events_attr *pmu_attr;</div><div class='add'>+</div><div class='add'>+	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);</div><div class='add'>+</div><div class='add'>+	return sprintf(page, "event=0x%02llx\n", pmu_attr-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define VPA_PMU_EVENT_ATTR(_name, _id)				\</div><div class='add'>+	PMU_EVENT_ATTR(_name, VPA_PMU_EVENT_VAR(_id), _id,	\</div><div class='add'>+			vpa_pmu_events_sysfs_show)</div><div class='add'>+</div><div class='add'>+EVENT(L1_TO_L2_CS_LAT,	0x1);</div><div class='add'>+EVENT(L2_TO_L1_CS_LAT,	0x2);</div><div class='add'>+EVENT(L2_RUNTIME_AGG,	0x3);</div><div class='add'>+</div><div class='add'>+VPA_PMU_EVENT_ATTR(l1_to_l2_lat,  L1_TO_L2_CS_LAT);</div><div class='add'>+VPA_PMU_EVENT_ATTR(l2_to_l1_lat,  L2_TO_L1_CS_LAT);</div><div class='add'>+VPA_PMU_EVENT_ATTR(l2_runtime_agg, L2_RUNTIME_AGG);</div><div class='add'>+</div><div class='add'>+static struct attribute *vpa_pmu_events_attr[] = {</div><div class='add'>+	VPA_PMU_EVENT_PTR(L1_TO_L2_CS_LAT),</div><div class='add'>+	VPA_PMU_EVENT_PTR(L2_TO_L1_CS_LAT),</div><div class='add'>+	VPA_PMU_EVENT_PTR(L2_RUNTIME_AGG),</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group vpa_pmu_events_group = {</div><div class='add'>+	.name = "events",</div><div class='add'>+	.attrs = vpa_pmu_events_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+PMU_FORMAT_ATTR(event, "config:0-31");</div><div class='add'>+static struct attribute *vpa_pmu_format_attr[] = {</div><div class='add'>+	&amp;format_attr_event.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group vpa_pmu_format_group = {</div><div class='add'>+	.name = "format",</div><div class='add'>+	.attrs = vpa_pmu_format_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *vpa_pmu_attr_groups[] = {</div><div class='add'>+	&amp;vpa_pmu_events_group,</div><div class='add'>+	&amp;vpa_pmu_format_group,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vpa_pmu_event_init(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	if (event-&gt;attr.type != event-&gt;pmu-&gt;type)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	/* it does not support event sampling mode */</div><div class='add'>+	if (is_sampling_event(event))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* no branch sampling */</div><div class='add'>+	if (has_branch_stack(event))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Invalid event code */</div><div class='add'>+	if ((event-&gt;attr.config &lt;= 0) || (event-&gt;attr.config &gt; 3))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long get_counter_data(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	unsigned int config = event-&gt;attr.config;</div><div class='add'>+	u64 data;</div><div class='add'>+</div><div class='add'>+	switch (config) {</div><div class='add'>+	case L1_TO_L2_CS_LAT:</div><div class='add'>+		if (event-&gt;attach_state &amp; PERF_ATTACH_TASK)</div><div class='add'>+			data = kvmhv_get_l1_to_l2_cs_time_vcpu();</div><div class='add'>+		else</div><div class='add'>+			data = kvmhv_get_l1_to_l2_cs_time();</div><div class='add'>+		break;</div><div class='add'>+	case L2_TO_L1_CS_LAT:</div><div class='add'>+		if (event-&gt;attach_state &amp; PERF_ATTACH_TASK)</div><div class='add'>+			data = kvmhv_get_l2_to_l1_cs_time_vcpu();</div><div class='add'>+		else</div><div class='add'>+			data = kvmhv_get_l2_to_l1_cs_time();</div><div class='add'>+		break;</div><div class='add'>+	case L2_RUNTIME_AGG:</div><div class='add'>+		if (event-&gt;attach_state &amp; PERF_ATTACH_TASK)</div><div class='add'>+			data = kvmhv_get_l2_runtime_agg_vcpu();</div><div class='add'>+		else</div><div class='add'>+			data = kvmhv_get_l2_runtime_agg();</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		data = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vpa_pmu_add(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	u64 data;</div><div class='add'>+</div><div class='add'>+	kvmhv_set_l2_counters_status(smp_processor_id(), true);</div><div class='add'>+</div><div class='add'>+	data = get_counter_data(event);</div><div class='add'>+	local64_set(&amp;event-&gt;hw.prev_count, data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_pmu_read(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	u64 prev_data, new_data, final_data;</div><div class='add'>+</div><div class='add'>+	prev_data = local64_read(&amp;event-&gt;hw.prev_count);</div><div class='add'>+	new_data = get_counter_data(event);</div><div class='add'>+	final_data = new_data - prev_data;</div><div class='add'>+</div><div class='add'>+	local64_add(final_data, &amp;event-&gt;count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vpa_pmu_del(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	vpa_pmu_read(event);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable vpa counter accumulation</div><div class='add'>+	 */</div><div class='add'>+	kvmhv_set_l2_counters_status(smp_processor_id(), false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pmu vpa_pmu = {</div><div class='add'>+	.module		= THIS_MODULE,</div><div class='add'>+	.task_ctx_nr	= perf_sw_context,</div><div class='add'>+	.name		= "vpa_pmu",</div><div class='add'>+	.event_init	= vpa_pmu_event_init,</div><div class='add'>+	.add		= vpa_pmu_add,</div><div class='add'>+	.del		= vpa_pmu_del,</div><div class='add'>+	.read		= vpa_pmu_read,</div><div class='add'>+	.attr_groups	= vpa_pmu_attr_groups,</div><div class='add'>+	.capabilities	= PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init pseries_vpa_pmu_init(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * List of current Linux on Power platforms and</div><div class='add'>+	 * this driver is supported only in PowerVM LPAR</div><div class='add'>+	 * (L1) platform.</div><div class='add'>+	 *</div><div class='add'>+	 *	Enabled    Linux on Power Platforms</div><div class='add'>+	 *      ----------------------------------------</div><div class='add'>+	 *        [X]      PowerVM LPAR (L1)</div><div class='add'>+	 *        [ ]      KVM Guest On PowerVM KoP(L2)</div><div class='add'>+	 *        [ ]      Baremetal(PowerNV)</div><div class='add'>+	 *        [ ]      KVM Guest On PowerNV</div><div class='add'>+	 */</div><div class='add'>+	if (!firmware_has_feature(FW_FEATURE_LPAR) || is_kvm_guest())</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	perf_pmu_register(&amp;vpa_pmu, vpa_pmu.name, -1);</div><div class='add'>+	pr_info("Virtual Processor Area PMU registered.\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit pseries_vpa_pmu_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	perf_pmu_unregister(&amp;vpa_pmu);</div><div class='add'>+	pr_info("Virtual Processor Area PMU unregistered.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(pseries_vpa_pmu_init);</div><div class='add'>+module_exit(pseries_vpa_pmu_cleanup);</div><div class='add'>+MODULE_DESCRIPTION("Perf Driver for pSeries VPA pmu counter");</div><div class='add'>+MODULE_AUTHOR("Kajol Jain &lt;kjain@linux.ibm.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Madhavan Srinivasan &lt;maddy@linux.ibm.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig<br/>index 35a1f4b9f827..fc79f8466933 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/44x/Kconfig</a></div><div class='hunk'>@@ -231,7 +231,6 @@ config PPC4xx_GPIO</div><div class='ctx'> 	bool "PPC4xx GPIO support"</div><div class='ctx'> 	depends on 44x</div><div class='ctx'> 	select GPIOLIB</div><div class='del'>-	select OF_GPIO_MM_GPIOCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable gpiolib support for ppc440 based boards</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/44x/gpio.c b/arch/powerpc/platforms/44x/gpio.c<br/>index e5f2319e5cbe..aea0d913b59d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/gpio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/gpio.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/44x/gpio.c</a></div><div class='hunk'>@@ -14,10 +14,10 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/gpio/legacy-of-mm-gpiochip.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define GPIO_MASK(gpio)		(0x80000000 &gt;&gt; (gpio))</div><div class='ctx'> #define GPIO_MASK2(gpio)	(0xc0000000 &gt;&gt; ((gpio) * 2))</div><div class='hunk'>@@ -45,7 +45,8 @@ struct ppc4xx_gpio {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ppc4xx_gpio_chip {</div><div class='del'>-	struct of_mm_gpio_chip mm_gc;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -57,8 +58,8 @@ struct ppc4xx_gpio_chip {</div><div class='ctx'> </div><div class='ctx'> static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct ppc4xx_gpio __iomem *regs = mm_gc-&gt;regs;</div><div class='add'>+	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	struct ppc4xx_gpio __iomem *regs = chip-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	return !!(in_be32(&amp;regs-&gt;ir) &amp; GPIO_MASK(gpio));</div><div class='ctx'> }</div><div class='hunk'>@@ -66,8 +67,8 @@ static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> static inline void</div><div class='ctx'> __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct ppc4xx_gpio __iomem *regs = mm_gc-&gt;regs;</div><div class='add'>+	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	struct ppc4xx_gpio __iomem *regs = chip-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	if (val)</div><div class='ctx'> 		setbits32(&amp;regs-&gt;or, GPIO_MASK(gpio));</div><div class='hunk'>@@ -75,8 +76,7 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 		clrbits32(&amp;regs-&gt;or, GPIO_MASK(gpio));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='add'>+static int ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -88,13 +88,14 @@ ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='del'>-	struct ppc4xx_gpio __iomem *regs = mm_gc-&gt;regs;</div><div class='add'>+	struct ppc4xx_gpio __iomem *regs = chip-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;chip-&gt;lock, flags);</div><div class='hunk'>@@ -122,9 +123,8 @@ static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> static int</div><div class='ctx'> ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='del'>-	struct ppc4xx_gpio __iomem *regs = mm_gc-&gt;regs;</div><div class='add'>+	struct ppc4xx_gpio __iomem *regs = chip-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;chip-&gt;lock, flags);</div><div class='hunk'>@@ -154,42 +154,57 @@ ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init ppc4xx_add_gpiochips(void)</div><div class='add'>+static int ppc4xx_gpio_probe(struct platform_device *ofdev)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	for_each_compatible_node(np, NULL, "ibm,ppc4xx-gpio") {</div><div class='del'>-		int ret;</div><div class='del'>-		struct ppc4xx_gpio_chip *ppc4xx_gc;</div><div class='del'>-		struct of_mm_gpio_chip *mm_gc;</div><div class='del'>-		struct gpio_chip *gc;</div><div class='del'>-</div><div class='del'>-		ppc4xx_gc = kzalloc(sizeof(*ppc4xx_gc), GFP_KERNEL);</div><div class='del'>-		if (!ppc4xx_gc) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		spin_lock_init(&amp;ppc4xx_gc-&gt;lock);</div><div class='del'>-</div><div class='del'>-		mm_gc = &amp;ppc4xx_gc-&gt;mm_gc;</div><div class='del'>-		gc = &amp;mm_gc-&gt;gc;</div><div class='del'>-</div><div class='del'>-		gc-&gt;ngpio = 32;</div><div class='del'>-		gc-&gt;direction_input = ppc4xx_gpio_dir_in;</div><div class='del'>-		gc-&gt;direction_output = ppc4xx_gpio_dir_out;</div><div class='del'>-		gc-&gt;get = ppc4xx_gpio_get;</div><div class='del'>-		gc-&gt;set = ppc4xx_gpio_set;</div><div class='del'>-</div><div class='del'>-		ret = of_mm_gpiochip_add_data(np, mm_gc, ppc4xx_gc);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err;</div><div class='del'>-		continue;</div><div class='del'>-err:</div><div class='del'>-		pr_err("%pOF: registration failed with status %d\n", np, ret);</div><div class='del'>-		kfree(ppc4xx_gc);</div><div class='del'>-		/* try others anyway */</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	struct device *dev = &amp;ofdev-&gt;dev;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	struct ppc4xx_gpio_chip *chip;</div><div class='add'>+	struct gpio_chip *gc;</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;chip-&gt;lock);</div><div class='add'>+</div><div class='add'>+	gc = &amp;chip-&gt;gc;</div><div class='add'>+</div><div class='add'>+	gc-&gt;base = -1;</div><div class='add'>+	gc-&gt;ngpio = 32;</div><div class='add'>+	gc-&gt;direction_input = ppc4xx_gpio_dir_in;</div><div class='add'>+	gc-&gt;direction_output = ppc4xx_gpio_dir_out;</div><div class='add'>+	gc-&gt;get = ppc4xx_gpio_get;</div><div class='add'>+	gc-&gt;set = ppc4xx_gpio_set;</div><div class='add'>+</div><div class='add'>+	gc-&gt;label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);</div><div class='add'>+	if (!gc-&gt;label)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;regs = devm_of_iomap(dev, np, 0, NULL);</div><div class='add'>+	if (IS_ERR(chip-&gt;regs))</div><div class='add'>+		return PTR_ERR(chip-&gt;regs);</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, gc, chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ppc4xx_gpio_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ibm,ppc4xx-gpio",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ppc4xx_gpio_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ppc4xx_gpio_driver = {</div><div class='add'>+	.probe		= ppc4xx_gpio_probe,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "ppc4xx-gpio",</div><div class='add'>+		.of_match_table	= ppc4xx_gpio_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ppc4xx_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;ppc4xx_gpio_driver);</div><div class='ctx'> }</div><div class='del'>-arch_initcall(ppc4xx_add_gpiochips);</div><div class='add'>+arch_initcall(ppc4xx_gpio_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/44x/pci.c b/arch/powerpc/platforms/44x/pci.c<br/>index db6d33ca753f..364aeb86ab64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/44x/pci.c</a></div><div class='hunk'>@@ -94,10 +94,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,</div><div class='ctx'> 					  struct resource *res)</div><div class='ctx'> {</div><div class='ctx'> 	u64 size;</div><div class='del'>-	const u32 *ranges;</div><div class='del'>-	int rlen;</div><div class='del'>-	int pna = of_n_addr_cells(hose-&gt;dn);</div><div class='del'>-	int np = pna + 5;</div><div class='add'>+	struct of_range_parser parser;</div><div class='add'>+	struct of_range range;</div><div class='ctx'> </div><div class='ctx'> 	/* Default */</div><div class='ctx'> 	res-&gt;start = 0;</div><div class='hunk'>@@ -105,18 +103,15 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,</div><div class='ctx'> 	res-&gt;end = size - 1;</div><div class='ctx'> 	res-&gt;flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;</div><div class='ctx'> </div><div class='del'>-	/* Get dma-ranges property */</div><div class='del'>-	ranges = of_get_property(hose-&gt;dn, "dma-ranges", &amp;rlen);</div><div class='del'>-	if (ranges == NULL)</div><div class='add'>+	if (of_pci_dma_range_parser_init(&amp;parser, hose-&gt;dn))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Walk it */</div><div class='del'>-	while ((rlen -= np * 4) &gt;= 0) {</div><div class='del'>-		u32 pci_space = ranges[0];</div><div class='del'>-		u64 pci_addr = of_read_number(ranges + 1, 2);</div><div class='del'>-		u64 cpu_addr = of_translate_dma_address(hose-&gt;dn, ranges + 3);</div><div class='del'>-		size = of_read_number(ranges + pna + 3, 2);</div><div class='del'>-		ranges += np;</div><div class='add'>+	for_each_of_range(&amp;parser, &amp;range) {</div><div class='add'>+		u32 pci_space = range.flags;</div><div class='add'>+		u64 pci_addr = range.bus_addr;</div><div class='add'>+		u64 cpu_addr = range.cpu_addr;</div><div class='add'>+		size = range.size;</div><div class='add'>+</div><div class='ctx'> 		if (cpu_addr == OF_BAD_ADDR || size == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/44x/uic.c b/arch/powerpc/platforms/44x/uic.c<br/>index e3e148b9dd18..85daf841fd3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/uic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/44x/uic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/44x/uic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/44x/uic.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define UIC_VR		0x7</div><div class='ctx'> #define UIC_VCR		0x8</div><div class='ctx'> </div><div class='del'>-struct uic *primary_uic;</div><div class='add'>+static struct uic *primary_uic;</div><div class='ctx'> </div><div class='ctx'> struct uic {</div><div class='ctx'> 	int index;</div><div class='hunk'>@@ -254,8 +254,9 @@ static struct uic * __init uic_init_one(struct device_node *node)</div><div class='ctx'> 	}</div><div class='ctx'> 	uic-&gt;dcrbase = *dcrreg;</div><div class='ctx'> </div><div class='del'>-	uic-&gt;irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &amp;uic_host_ops,</div><div class='del'>-					     uic);</div><div class='add'>+	uic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+						NR_UIC_INTS, &amp;uic_host_ops,</div><div class='add'>+						uic);</div><div class='ctx'> 	if (! uic-&gt;irqhost)</div><div class='ctx'> 		return NULL; /* FIXME: panic? */</div><div class='ctx'> </div><div class='hunk'>@@ -291,7 +292,7 @@ void __init uic_init_tree(void)</div><div class='ctx'> 	if (!primary_uic)</div><div class='ctx'> 		panic("Unable to initialize primary UIC %pOF\n", np);</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(primary_uic-&gt;irqhost);</div><div class='add'>+	irq_set_default_domain(primary_uic-&gt;irqhost);</div><div class='ctx'> 	of_node_put(np);</div><div class='ctx'> </div><div class='ctx'> 	/* The scan again for cascaded UICs */</div><div class='hunk'>@@ -327,5 +328,5 @@ unsigned int uic_get_irq(void)</div><div class='ctx'> 	msr = mfdcr(primary_uic-&gt;dcrbase + UIC_MSR);</div><div class='ctx'> 	src = 32 - ffs(msr);</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(primary_uic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(primary_uic-&gt;irqhost, src);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c<br/>index e995eb30bf09..2cf3c6237337 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a></div><div class='hunk'>@@ -188,7 +188,8 @@ mpc5121_ads_cpld_pic_init(void)</div><div class='ctx'> </div><div class='ctx'> 	cpld_pic_node = of_node_get(np);</div><div class='ctx'> </div><div class='del'>-	cpld_pic_host = irq_domain_add_linear(np, 16, &amp;cpld_pic_host_ops, NULL);</div><div class='add'>+	cpld_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 16,</div><div class='add'>+						 &amp;cpld_pic_host_ops, NULL);</div><div class='ctx'> 	if (!cpld_pic_host) {</div><div class='ctx'> 		printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");</div><div class='ctx'> 		goto end;</div><div class='head'>diff --git a/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c b/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c<br/>index 9668b052cd4b..f251e0f68262 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/512x/mpc512x_lpbfifo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/512x/mpc512x_lpbfifo.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/512x/mpc512x_lpbfifo.c</a></div><div class='hunk'>@@ -240,10 +240,8 @@ static int mpc512x_lpbfifo_kick(void)</div><div class='ctx'> 	dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='ctx'> </div><div class='ctx'> 	/* Make DMA channel work with LPB FIFO data register */</div><div class='del'>-	if (dma_dev-&gt;device_config(lpbfifo.chan, &amp;dma_conf)) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_dma_prep;</div><div class='del'>-	}</div><div class='add'>+	if (dma_dev-&gt;device_config(lpbfifo.chan, &amp;dma_conf))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	sg_init_table(&amp;sg, 1);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c<br/>index 37a67120f257..a7172f9ebaad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/efika.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/efika.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/efika.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/52xx/efika.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;generated/utsrelease.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c<br/>index 19626cd42406..bc7f83cfec1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/media5200.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/media5200.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/media5200.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/52xx/media5200.c</a></div><div class='hunk'>@@ -168,7 +168,7 @@ static void __init media5200_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;media5200_irq.lock);</div><div class='ctx'> </div><div class='del'>-	media5200_irq.irqhost = irq_domain_add_linear(fpga_np,</div><div class='add'>+	media5200_irq.irqhost = irq_domain_create_linear(of_fwnode_handle(fpga_np),</div><div class='ctx'> 			MEDIA5200_NUM_IRQS, &amp;media5200_irq_ops, &amp;media5200_irq);</div><div class='ctx'> 	if (!media5200_irq.irqhost)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c<br/>index 1ea591ec6083..7748b6641a3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></div><div class='hunk'>@@ -247,9 +247,9 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)</div><div class='ctx'> 	if (!cascade_virq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	gpt-&gt;irqhost = irq_domain_add_linear(node, 1, &amp;mpc52xx_gpt_irq_ops, gpt);</div><div class='add'>+	gpt-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node), 1, &amp;mpc52xx_gpt_irq_ops, gpt);</div><div class='ctx'> 	if (!gpt-&gt;irqhost) {</div><div class='del'>-		dev_err(gpt-&gt;dev, "irq_domain_add_linear() failed\n");</div><div class='add'>+		dev_err(gpt-&gt;dev, "irq_domain_create_linear() failed\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +280,7 @@ static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return (in_be32(&amp;gpt-&gt;regs-&gt;status) &gt;&gt; 8) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+static int</div><div class='ctx'> mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);</div><div class='hunk'>@@ -293,6 +293,8 @@ mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;gpt-&gt;lock, flags);</div><div class='ctx'> 	clrsetbits_be32(&amp;gpt-&gt;regs-&gt;mode, MPC52xx_GPT_MODE_GPIO_MASK, r);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='hunk'>@@ -369,7 +371,7 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq)</div><div class='ctx'> 	mutex_lock(&amp;mpc52xx_gpt_list_mutex);</div><div class='ctx'> 	list_for_each(pos, &amp;mpc52xx_gpt_list) {</div><div class='ctx'> 		gpt = container_of(pos, struct mpc52xx_gpt_priv, list);</div><div class='del'>-		if (gpt-&gt;irqhost &amp;&amp; irq == irq_linear_revmap(gpt-&gt;irqhost, 0)) {</div><div class='add'>+		if (gpt-&gt;irqhost &amp;&amp; irq == irq_find_mapping(gpt-&gt;irqhost, 0)) {</div><div class='ctx'> 			mutex_unlock(&amp;mpc52xx_gpt_list_mutex);</div><div class='ctx'> 			return gpt;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c<br/>index 1e0a5e9644dc..eb6a4e745c08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/mpc52xx_pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/52xx/mpc52xx_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a></div><div class='hunk'>@@ -446,14 +446,14 @@ void __init mpc52xx_init_irq(void)</div><div class='ctx'> 	 * As last step, add an irq host to translate the real</div><div class='ctx'> 	 * hw irq information provided by the ofw to linux virq</div><div class='ctx'> 	 */</div><div class='del'>-	mpc52xx_irqhost = irq_domain_add_linear(picnode,</div><div class='add'>+	mpc52xx_irqhost = irq_domain_create_linear(of_fwnode_handle(picnode),</div><div class='ctx'> 	                                 MPC52xx_IRQ_HIGHTESTHWIRQ,</div><div class='ctx'> 	                                 &amp;mpc52xx_irqhost_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (!mpc52xx_irqhost)</div><div class='ctx'> 		panic(__FILE__ ": Cannot allocate the IRQ host\n");</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(mpc52xx_irqhost);</div><div class='add'>+	irq_set_default_domain(mpc52xx_irqhost);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("MPC52xx PIC is up and running!\n");</div><div class='ctx'> }</div><div class='hunk'>@@ -515,5 +515,5 @@ unsigned int mpc52xx_get_irq(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpc52xx_irqhost, irq);</div><div class='add'>+	return irq_find_mapping(mpc52xx_irqhost, irq);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c<br/>index 3dc65ce1f175..8f918916e631 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/82xx/ep8248e.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/82xx/ep8248e.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/82xx/ep8248e.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/82xx/ep8248e.c</a></div><div class='hunk'>@@ -128,7 +128,7 @@ static int ep8248e_mdio_probe(struct platform_device *ofdev)</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;name = "ep8248e-mdio-bitbang";</div><div class='ctx'> 	bus-&gt;parent = &amp;ofdev-&gt;dev;</div><div class='del'>-	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%x", res.start);</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%pa", &amp;res.start);</div><div class='ctx'> </div><div class='ctx'> 	ret = of_mdiobus_register(bus, ofdev-&gt;dev.of_node);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/arch/powerpc/platforms/82xx/km82xx.c b/arch/powerpc/platforms/82xx/km82xx.c<br/>index c86da3f2b74b..99f0f0f41876 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/82xx/km82xx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/82xx/km82xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/82xx/km82xx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/82xx/km82xx.c</a></div><div class='hunk'>@@ -27,15 +27,15 @@</div><div class='ctx'> </div><div class='ctx'> static void __init km82xx_pic_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np = of_find_compatible_node(NULL, NULL,</div><div class='del'>-							"fsl,pq2-pic");</div><div class='add'>+	struct device_node *np __free(device_node);</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");</div><div class='add'>+</div><div class='ctx'> 	if (!np) {</div><div class='ctx'> 		pr_err("PIC init: can not find cpm-pic node\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cpm2_pic_init(np);</div><div class='del'>-	of_node_put(np);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct cpm_pin {</div><div class='head'>diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c<br/>index 4d8fa9ed1a67..cb7b9498f291 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a></div><div class='hunk'>@@ -92,10 +92,11 @@ static void mcu_power_off(void)</div><div class='ctx'> 	mutex_unlock(&amp;mcu-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='add'>+static int mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcu *mcu = gpiochip_get_data(gc);</div><div class='ctx'> 	u8 bit = 1 &lt;&lt; (4 + gpio);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mcu-&gt;lock);</div><div class='ctx'> 	if (val)</div><div class='hunk'>@@ -103,14 +104,16 @@ static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 	else</div><div class='ctx'> 		mcu-&gt;reg_ctrl |= bit;</div><div class='ctx'> </div><div class='del'>-	i2c_smbus_write_byte_data(mcu-&gt;client, MCU_REG_CTRL, mcu-&gt;reg_ctrl);</div><div class='add'>+	ret = i2c_smbus_write_byte_data(mcu-&gt;client, MCU_REG_CTRL,</div><div class='add'>+					mcu-&gt;reg_ctrl);</div><div class='ctx'> 	mutex_unlock(&amp;mcu-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcu_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	mcu_gpio_set(gc, gpio, val);</div><div class='del'>-	return 0;</div><div class='add'>+	return mcu_gpio_set(gc, gpio, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcu_gpiochip_add(struct mcu *mcu)</div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig<br/>index 9315a3b69d6d..604c1b4b6d45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/85xx/Kconfig</a></div><div class='hunk'>@@ -40,27 +40,6 @@ config BSC9132_QDS</div><div class='ctx'> 	  and dual StarCore SC3850 DSP cores.</div><div class='ctx'> 	  Manufacturer : Freescale Semiconductor, Inc</div><div class='ctx'> </div><div class='del'>-config MPC8540_ADS</div><div class='del'>-	bool "Freescale MPC8540 ADS"</div><div class='del'>-	select DEFAULT_UIMAGE</div><div class='del'>-	help</div><div class='del'>-	  This option enables support for the MPC 8540 ADS board</div><div class='del'>-</div><div class='del'>-config MPC8560_ADS</div><div class='del'>-	bool "Freescale MPC8560 ADS"</div><div class='del'>-	select DEFAULT_UIMAGE</div><div class='del'>-	select CPM2</div><div class='del'>-	help</div><div class='del'>-	  This option enables support for the MPC 8560 ADS board</div><div class='del'>-</div><div class='del'>-config MPC85xx_CDS</div><div class='del'>-	bool "Freescale MPC85xx CDS"</div><div class='del'>-	select DEFAULT_UIMAGE</div><div class='del'>-	select PPC_I8259</div><div class='del'>-	select HAVE_RAPIDIO</div><div class='del'>-	help</div><div class='del'>-	  This option enables support for the MPC85xx CDS board</div><div class='del'>-</div><div class='ctx'> config MPC85xx_MDS</div><div class='ctx'> 	bool "Freescale MPC8568 MDS / MPC8569 MDS / P1021 MDS"</div><div class='ctx'> 	select DEFAULT_UIMAGE</div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c<br/>index e52b848b64b7..32fa5fb557c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/85xx/smp.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> #include &lt;asm/mpic.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/dbell.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='ctx'> #include &lt;asm/fsl_pm.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c<br/>index 60e0b8947ce6..4b69fb321a68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)</div><div class='ctx'> 		if (cause &gt;&gt; (i + 16))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	return irq_linear_revmap(socrates_fpga_pic_irq_host,</div><div class='add'>+	return irq_find_mapping(socrates_fpga_pic_irq_host,</div><div class='ctx'> 			(irq_hw_number_t)i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -278,7 +278,7 @@ void __init socrates_fpga_pic_init(struct device_node *pic)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup an irq_domain structure */</div><div class='del'>-	socrates_fpga_pic_irq_host = irq_domain_add_linear(pic,</div><div class='add'>+	socrates_fpga_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(pic),</div><div class='ctx'> 		    SOCRATES_FPGA_NUM_IRQS, &amp;socrates_fpga_pic_host_ops, NULL);</div><div class='ctx'> 	if (socrates_fpga_pic_irq_host == NULL) {</div><div class='ctx'> 		pr_err("FPGA PIC: Unable to allocate host\n");</div><div class='head'>diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c<br/>index 8a7e55acf090..9be33e41af6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/86xx/mpc86xx_smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/86xx/mpc86xx_smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/86xx/mpc86xx_smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/86xx/mpc86xx_smp.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pci-bridge.h&gt;</div><div class='ctx'> #include &lt;asm/mpic.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig<br/>index 8623aebfac48..abb2b45b2789 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/8xx/Kconfig</a></div><div class='hunk'>@@ -101,7 +101,6 @@ comment "Generic MPC8xx Options"</div><div class='ctx'> config 8xx_GPIO</div><div class='ctx'> 	bool "GPIO API Support"</div><div class='ctx'> 	select GPIOLIB</div><div class='del'>-	select OF_GPIO_MM_GPIOCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Saying Y here will cause the ports on an MPC8xx processor to be used</div><div class='ctx'> 	  with the GPIO API.  If you say N here, the kernel needs less memory.</div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c b/arch/powerpc/platforms/8xx/cpm1-ic.c<br/>index a18fc7c99f83..3292071e4da3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/cpm1-ic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/cpm1-ic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/cpm1-ic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/8xx/cpm1-ic.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ static int cpm_get_irq(struct irq_desc *desc)</div><div class='ctx'> 	cpm_vec = in_be16(&amp;data-&gt;reg-&gt;cpic_civr);</div><div class='ctx'> 	cpm_vec &gt;&gt;= 11;</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(data-&gt;host, cpm_vec);</div><div class='add'>+	return irq_find_mapping(data-&gt;host, cpm_vec);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cpm_cascade(struct irq_desc *desc)</div><div class='hunk'>@@ -110,7 +110,7 @@ static int cpm_pic_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	out_be32(&amp;data-&gt;reg-&gt;cpic_cimr, 0);</div><div class='ctx'> </div><div class='del'>-	data-&gt;host = irq_domain_add_linear(dev-&gt;of_node, 64, &amp;cpm_pic_host_ops, data);</div><div class='add'>+	data-&gt;host = irq_domain_create_linear(dev_fwnode(dev), 64, &amp;cpm_pic_host_ops, data);</div><div class='ctx'> 	if (!data-&gt;host)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/cpm1.c b/arch/powerpc/platforms/8xx/cpm1.c<br/>index b24d4102fbf6..7433be7d66ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/cpm1.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/cpm1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/cpm1.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/8xx/cpm1.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> #include &lt;sysdev/fsl_soc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_8xx_GPIO</div><div class='del'>-#include &lt;linux/gpio/legacy-of-mm-gpiochip.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define CPM_MAP_SIZE    (0x4000)</div><div class='hunk'>@@ -376,7 +376,8 @@ int __init cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)</div><div class='ctx'> #ifdef CONFIG_8xx_GPIO</div><div class='ctx'> </div><div class='ctx'> struct cpm1_gpio16_chip {</div><div class='del'>-	struct of_mm_gpio_chip mm_gc;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='ctx'> 	/* shadowed data register to clear/set bits safely */</div><div class='hunk'>@@ -386,19 +387,17 @@ struct cpm1_gpio16_chip {</div><div class='ctx'> 	int irq[16];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc)</div><div class='add'>+static void cpm1_gpio16_save_regs(struct cpm1_gpio16_chip *cpm1_gc)</div><div class='ctx'> {</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc =</div><div class='del'>-		container_of(mm_gc, struct cpm1_gpio16_chip, mm_gc);</div><div class='del'>-	struct cpm_ioport16 __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm_ioport16 __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	cpm1_gc-&gt;cpdata = in_be16(&amp;iop-&gt;dat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm_ioport16 __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport16 __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	u16 pin_mask;</div><div class='ctx'> </div><div class='ctx'> 	pin_mask = 1 &lt;&lt; (15 - gpio);</div><div class='hunk'>@@ -406,11 +405,9 @@ static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return !!(in_be16(&amp;iop-&gt;dat) &amp; pin_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,</div><div class='del'>-	int value)</div><div class='add'>+static void __cpm1_gpio16_set(struct cpm1_gpio16_chip *cpm1_gc, u16 pin_mask, int value)</div><div class='ctx'> {</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport16 __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm_ioport16 __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	if (value)</div><div class='ctx'> 		cpm1_gc-&gt;cpdata |= pin_mask;</div><div class='hunk'>@@ -420,40 +417,39 @@ static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,</div><div class='ctx'> 	out_be16(&amp;iop-&gt;dat, cpm1_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='add'>+	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 pin_mask = 1 &lt;&lt; (15 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	__cpm1_gpio16_set(mm_gc, pin_mask, value);</div><div class='add'>+	__cpm1_gpio16_set(cpm1_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio16_to_irq(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='add'>+	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='ctx'> </div><div class='ctx'> 	return cpm1_gc-&gt;irq[gpio] ? : -ENXIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport16 __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport16 __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 pin_mask = 1 &lt;&lt; (15 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	setbits16(&amp;iop-&gt;dir, pin_mask);</div><div class='del'>-	__cpm1_gpio16_set(mm_gc, pin_mask, val);</div><div class='add'>+	__cpm1_gpio16_set(cpm1_gc, pin_mask, val);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -462,9 +458,8 @@ static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport16 __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport16 __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 pin_mask = 1 &lt;&lt; (15 - gpio);</div><div class='ctx'> </div><div class='hunk'>@@ -481,11 +476,10 @@ int cpm1_gpiochip_add16(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = dev-&gt;of_node;</div><div class='ctx'> 	struct cpm1_gpio16_chip *cpm1_gc;</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc;</div><div class='ctx'> 	struct gpio_chip *gc;</div><div class='ctx'> 	u16 mask;</div><div class='ctx'> </div><div class='del'>-	cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);</div><div class='add'>+	cpm1_gc = devm_kzalloc(dev, sizeof(*cpm1_gc), GFP_KERNEL);</div><div class='ctx'> 	if (!cpm1_gc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -499,10 +493,8 @@ int cpm1_gpiochip_add16(struct device *dev)</div><div class='ctx'> 				cpm1_gc-&gt;irq[i] = irq_of_parse_and_map(np, j++);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mm_gc = &amp;cpm1_gc-&gt;mm_gc;</div><div class='del'>-	gc = &amp;mm_gc-&gt;gc;</div><div class='del'>-</div><div class='del'>-	mm_gc-&gt;save_regs = cpm1_gpio16_save_regs;</div><div class='add'>+	gc = &amp;cpm1_gc-&gt;gc;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='ctx'> 	gc-&gt;ngpio = 16;</div><div class='ctx'> 	gc-&gt;direction_input = cpm1_gpio16_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm1_gpio16_dir_out;</div><div class='hunk'>@@ -512,30 +504,39 @@ int cpm1_gpiochip_add16(struct device *dev)</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-	return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);</div><div class='add'>+	gc-&gt;label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);</div><div class='add'>+	if (!gc-&gt;label)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cpm1_gc-&gt;regs = devm_of_iomap(dev, np, 0, NULL);</div><div class='add'>+	if (IS_ERR(cpm1_gc-&gt;regs))</div><div class='add'>+		return PTR_ERR(cpm1_gc-&gt;regs);</div><div class='add'>+</div><div class='add'>+	cpm1_gpio16_save_regs(cpm1_gc);</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, gc, cpm1_gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct cpm1_gpio32_chip {</div><div class='del'>-	struct of_mm_gpio_chip mm_gc;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='ctx'> 	/* shadowed data register to clear/set bits safely */</div><div class='ctx'> 	u32 cpdata;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)</div><div class='add'>+static void cpm1_gpio32_save_regs(struct cpm1_gpio32_chip *cpm1_gc)</div><div class='ctx'> {</div><div class='del'>-	struct cpm1_gpio32_chip *cpm1_gc =</div><div class='del'>-		container_of(mm_gc, struct cpm1_gpio32_chip, mm_gc);</div><div class='del'>-	struct cpm_ioport32b __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm_ioport32b __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	cpm1_gc-&gt;cpdata = in_be32(&amp;iop-&gt;dat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm_ioport32b __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport32b __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	u32 pin_mask;</div><div class='ctx'> </div><div class='ctx'> 	pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='hunk'>@@ -543,11 +544,9 @@ static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return !!(in_be32(&amp;iop-&gt;dat) &amp; pin_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,</div><div class='del'>-	int value)</div><div class='add'>+static void __cpm1_gpio32_set(struct cpm1_gpio32_chip *cpm1_gc, u32 pin_mask, int value)</div><div class='ctx'> {</div><div class='del'>-	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport32b __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm_ioport32b __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	if (value)</div><div class='ctx'> 		cpm1_gc-&gt;cpdata |= pin_mask;</div><div class='hunk'>@@ -557,32 +556,32 @@ static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,</div><div class='ctx'> 	out_be32(&amp;iop-&gt;dat, cpm1_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='add'>+	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	__cpm1_gpio32_set(mm_gc, pin_mask, value);</div><div class='add'>+	__cpm1_gpio32_set(cpm1_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport32b __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport32b __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	setbits32(&amp;iop-&gt;dir, pin_mask);</div><div class='del'>-	__cpm1_gpio32_set(mm_gc, pin_mask, val);</div><div class='add'>+	__cpm1_gpio32_set(cpm1_gc, pin_mask, val);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -591,9 +590,8 @@ static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm_ioport32b __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm_ioport32b __iomem *iop = cpm1_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='hunk'>@@ -610,19 +608,16 @@ int cpm1_gpiochip_add32(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = dev-&gt;of_node;</div><div class='ctx'> 	struct cpm1_gpio32_chip *cpm1_gc;</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc;</div><div class='ctx'> 	struct gpio_chip *gc;</div><div class='ctx'> </div><div class='del'>-	cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);</div><div class='add'>+	cpm1_gc = devm_kzalloc(dev, sizeof(*cpm1_gc), GFP_KERNEL);</div><div class='ctx'> 	if (!cpm1_gc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;cpm1_gc-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	mm_gc = &amp;cpm1_gc-&gt;mm_gc;</div><div class='del'>-	gc = &amp;mm_gc-&gt;gc;</div><div class='del'>-</div><div class='del'>-	mm_gc-&gt;save_regs = cpm1_gpio32_save_regs;</div><div class='add'>+	gc = &amp;cpm1_gc-&gt;gc;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='ctx'> 	gc-&gt;ngpio = 32;</div><div class='ctx'> 	gc-&gt;direction_input = cpm1_gpio32_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm1_gpio32_dir_out;</div><div class='hunk'>@@ -631,7 +626,17 @@ int cpm1_gpiochip_add32(struct device *dev)</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-	return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);</div><div class='add'>+	gc-&gt;label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);</div><div class='add'>+	if (!gc-&gt;label)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cpm1_gc-&gt;regs = devm_of_iomap(dev, np, 0, NULL);</div><div class='add'>+	if (IS_ERR(cpm1_gc-&gt;regs))</div><div class='add'>+		return PTR_ERR(cpm1_gc-&gt;regs);</div><div class='add'>+</div><div class='add'>+	cpm1_gpio32_save_regs(cpm1_gc);</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, gc, cpm1_gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_8xx_GPIO */</div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/pic.c b/arch/powerpc/platforms/8xx/pic.c<br/>index ea6b0e523c60..933d6ab7f512 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/8xx/pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/8xx/pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/8xx/pic.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ unsigned int mpc8xx_get_irq(void)</div><div class='ctx'> 	if (irq == PIC_VEC_SPURRIOUS)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-        return irq_linear_revmap(mpc8xx_pic_host, irq);</div><div class='add'>+        return irq_find_mapping(mpc8xx_pic_host, irq);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +146,8 @@ void __init mpc8xx_pic_init(void)</div><div class='ctx'> 	if (!siu_reg)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mpc8xx_pic_host = irq_domain_add_linear(np, 64, &amp;mpc8xx_pic_host_ops, NULL);</div><div class='add'>+	mpc8xx_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 64,</div><div class='add'>+						   &amp;mpc8xx_pic_host_ops, NULL);</div><div class='ctx'> 	if (!mpc8xx_pic_host)</div><div class='ctx'> 		printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig<br/>index 1112a5831619..c4e61843d9d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,6 @@ source "arch/powerpc/platforms/chrp/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/512x/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/52xx/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/powermac/Kconfig"</div><div class='del'>-source "arch/powerpc/platforms/maple/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/pasemi/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/ps3/Kconfig"</div><div class='ctx'> source "arch/powerpc/platforms/cell/Kconfig"</div><div class='hunk'>@@ -71,10 +70,6 @@ config PPC_DT_CPU_FTRS</div><div class='ctx'> 	  firmware provides this binding.</div><div class='ctx'> 	  If you're not sure say Y.</div><div class='ctx'> </div><div class='del'>-config UDBG_RTAS_CONSOLE</div><div class='del'>-	bool "RTAS based debug console"</div><div class='del'>-	depends on PPC_RTAS</div><div class='del'>-</div><div class='ctx'> config PPC_SMP_MUXED_IPI</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -187,12 +182,6 @@ config PPC_INDIRECT_PIO</div><div class='ctx'> 	bool</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='ctx'> </div><div class='del'>-config PPC_INDIRECT_MMIO</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config PPC_IO_WORKAROUNDS</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> source "drivers/cpufreq/Kconfig"</div><div class='ctx'> </div><div class='ctx'> menu "CPUIdle driver"</div><div class='hunk'>@@ -243,7 +232,6 @@ config QE_GPIO</div><div class='ctx'> 	bool "QE GPIO support"</div><div class='ctx'> 	depends on QUICC_ENGINE</div><div class='ctx'> 	select GPIOLIB</div><div class='del'>-	select OF_GPIO_MM_GPIOCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you're going to use hardware that connects to the</div><div class='ctx'> 	  QE GPIOs.</div><div class='hunk'>@@ -254,7 +242,6 @@ config CPM2</div><div class='ctx'> 	select CPM</div><div class='ctx'> 	select HAVE_PCI</div><div class='ctx'> 	select GPIOLIB</div><div class='del'>-	select OF_GPIO_MM_GPIOCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  The CPM2 (Communications Processor Module) is a coprocessor on</div><div class='ctx'> 	  embedded CPUs made by Freescale.  Selecting this option means that</div><div class='head'>diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype<br/>index 1453ccc900c4..7b527d18aa5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Kconfig.cputype?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Kconfig.cputype</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Kconfig.cputype?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/Kconfig.cputype</a></div><div class='hunk'>@@ -122,16 +122,11 @@ choice</div><div class='ctx'> 	  If unsure, select Generic.</div><div class='ctx'> </div><div class='ctx'> config POWERPC64_CPU</div><div class='del'>-	bool "Generic (POWER5 and PowerPC 970 and above)"</div><div class='del'>-	depends on PPC_BOOK3S_64 &amp;&amp; !CPU_LITTLE_ENDIAN</div><div class='add'>+	bool "Generic 64 bits powerpc"</div><div class='add'>+	depends on PPC_BOOK3S_64</div><div class='add'>+	select ARCH_HAS_FAST_MULTIPLIER if CPU_LITTLE_ENDIAN</div><div class='ctx'> 	select PPC_64S_HASH_MMU</div><div class='del'>-</div><div class='del'>-config POWERPC64_CPU</div><div class='del'>-	bool "Generic (POWER8 and above)"</div><div class='del'>-	depends on PPC_BOOK3S_64 &amp;&amp; CPU_LITTLE_ENDIAN</div><div class='del'>-	select ARCH_HAS_FAST_MULTIPLIER</div><div class='del'>-	select PPC_64S_HASH_MMU</div><div class='del'>-	select PPC_HAS_LBARX_LHARX</div><div class='add'>+	select PPC_HAS_LBARX_LHARX if CPU_LITTLE_ENDIAN</div><div class='ctx'> </div><div class='ctx'> config POWERPC_CPU</div><div class='ctx'> 	bool "Generic 32 bits powerpc"</div><div class='hunk'>@@ -449,6 +444,19 @@ config PPC_RADIX_MMU_DEFAULT</div><div class='ctx'> </div><div class='ctx'> 	  If you're unsure, say Y.</div><div class='ctx'> </div><div class='add'>+config PPC_RADIX_BROADCAST_TLBIE</div><div class='add'>+	bool</div><div class='add'>+	depends on PPC_RADIX_MMU</div><div class='add'>+	help</div><div class='add'>+	  Power ISA v3.0 and later implementations in the Linux Compliancy Subset</div><div class='add'>+	  and lower are not required to implement broadcast TLBIE instructions.</div><div class='add'>+	  Platforms with CPUs that do implement TLBIE broadcast, that is, where</div><div class='add'>+	  a TLB invalidation instruction performed on one CPU operates on the</div><div class='add'>+	  TLBs of all CPUs in the system, should select this option.  If this</div><div class='add'>+	  option is selected, the disable_tlbie kernel command line option can</div><div class='add'>+	  be used to cause global TLB invalidations to be done via IPIs; without</div><div class='add'>+	  it, IPIs will be used unconditionally.</div><div class='add'>+</div><div class='ctx'> config PPC_KERNEL_PREFIXED</div><div class='ctx'> 	depends on PPC_HAVE_PREFIXED_SUPPORT</div><div class='ctx'> 	depends on CC_HAS_PREFIXED</div><div class='head'>diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile<br/>index 786d374bff31..3cee4a842736 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/Makefile</a></div><div class='hunk'>@@ -14,7 +14,6 @@ obj-$(CONFIG_FSL_SOC_BOOKE)	+= 85xx/</div><div class='ctx'> obj-$(CONFIG_PPC_86xx)		+= 86xx/</div><div class='ctx'> obj-$(CONFIG_PPC_POWERNV)	+= powernv/</div><div class='ctx'> obj-$(CONFIG_PPC_PSERIES)	+= pseries/</div><div class='del'>-obj-$(CONFIG_PPC_MAPLE)		+= maple/</div><div class='ctx'> obj-$(CONFIG_PPC_PASEMI)	+= pasemi/</div><div class='ctx'> obj-$(CONFIG_PPC_CELL)		+= cell/</div><div class='ctx'> obj-$(CONFIG_PPC_PS3)		+= ps3/</div><div class='head'>diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c<br/>index 2c8dc0886912..33f852a7625f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/amigaone/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/amigaone/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/amigaone/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/amigaone/setup.c</a></div><div class='hunk'>@@ -109,7 +109,7 @@ static void __init amigaone_init_IRQ(void)</div><div class='ctx'> </div><div class='ctx'> 	i8259_init(pic, int_ack);</div><div class='ctx'> 	ppc_md.get_irq = i8259_irq;</div><div class='del'>-	irq_set_default_host(i8259_get_host());</div><div class='add'>+	irq_set_default_domain(i8259_get_host());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init request_isa_regions(void)</div><div class='head'>diff --git a/arch/powerpc/platforms/book3s/vas-api.c b/arch/powerpc/platforms/book3s/vas-api.c<br/>index f381b177ea06..49b15e7a8265 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/book3s/vas-api.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/book3s/vas-api.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/book3s/vas-api.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/book3s/vas-api.c</a></div><div class='hunk'>@@ -425,23 +425,22 @@ static vm_fault_t vas_mmap_fault(struct vm_fault *vmf)</div><div class='ctx'> 		return VM_FAULT_SIGBUS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The window may be inactive due to lost credit (Ex: core</div><div class='ctx'> 	 * removal with DLPAR). If the window is active again when</div><div class='ctx'> 	 * the credit is available, map the new paste address at the</div><div class='ctx'> 	 * window virtual address.</div><div class='ctx'> 	 */</div><div class='del'>-	if (txwin-&gt;status == VAS_WIN_ACTIVE) {</div><div class='del'>-		paste_addr = cp_inst-&gt;coproc-&gt;vops-&gt;paste_addr(txwin);</div><div class='del'>-		if (paste_addr) {</div><div class='del'>-			fault = vmf_insert_pfn(vma, vma-&gt;vm_start,</div><div class='del'>-					(paste_addr &gt;&gt; PAGE_SHIFT));</div><div class='del'>-			mutex_unlock(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='del'>-			return fault;</div><div class='add'>+	scoped_guard(mutex, &amp;txwin-&gt;task_ref.mmap_mutex) {</div><div class='add'>+		if (txwin-&gt;status == VAS_WIN_ACTIVE) {</div><div class='add'>+			paste_addr = cp_inst-&gt;coproc-&gt;vops-&gt;paste_addr(txwin);</div><div class='add'>+			if (paste_addr) {</div><div class='add'>+				fault = vmf_insert_pfn(vma, vma-&gt;vm_start,</div><div class='add'>+						(paste_addr &gt;&gt; PAGE_SHIFT));</div><div class='add'>+				return fault;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Received this fault due to closing the actual window.</div><div class='hunk'>@@ -464,7 +463,42 @@ static vm_fault_t vas_mmap_fault(struct vm_fault *vmf)</div><div class='ctx'> 	return VM_FAULT_SIGBUS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * During mmap() paste address, mapping VMA is saved in VAS window</div><div class='add'>+ * struct which is used to unmap during migration if the window is</div><div class='add'>+ * still open. But the user space can remove this mapping with</div><div class='add'>+ * munmap() before closing the window and the VMA address will</div><div class='add'>+ * be invalid. Set VAS window VMA to NULL in this function which</div><div class='add'>+ * is called before VMA free.</div><div class='add'>+ */</div><div class='add'>+static void vas_mmap_close(struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct file *fp = vma-&gt;vm_file;</div><div class='add'>+	struct coproc_instance *cp_inst = fp-&gt;private_data;</div><div class='add'>+	struct vas_window *txwin;</div><div class='add'>+</div><div class='add'>+	/* Should not happen */</div><div class='add'>+	if (!cp_inst || !cp_inst-&gt;txwin) {</div><div class='add'>+		pr_err("No attached VAS window for the paste address mmap\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	txwin = cp_inst-&gt;txwin;</div><div class='add'>+	/*</div><div class='add'>+	 * task_ref.vma is set in coproc_mmap() during mmap paste</div><div class='add'>+	 * address. So it has to be the same VMA that is getting freed.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(txwin-&gt;task_ref.vma != vma)) {</div><div class='add'>+		pr_err("Invalid paste address mmaping\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scoped_guard(mutex, &amp;txwin-&gt;task_ref.mmap_mutex)</div><div class='add'>+		txwin-&gt;task_ref.vma = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct vm_operations_struct vas_vm_ops = {</div><div class='add'>+	.close = vas_mmap_close,</div><div class='ctx'> 	.fault = vas_mmap_fault,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -485,6 +519,15 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Map complete page to the paste address. So the user</div><div class='add'>+	 * space should pass 0ULL to the offset parameter.</div><div class='add'>+	 */</div><div class='add'>+	if (vma-&gt;vm_pgoff) {</div><div class='add'>+		pr_debug("Page offset unsupported to map paste address\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Ensure instance has an open send window */</div><div class='ctx'> 	if (!txwin) {</div><div class='ctx'> 		pr_err("No send window open?\n");</div><div class='hunk'>@@ -507,18 +550,16 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)</div><div class='ctx'> 	 * close/open event and allows mmap() only when the window is</div><div class='ctx'> 	 * active.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='add'>+	guard(mutex)(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='ctx'> 	if (txwin-&gt;status != VAS_WIN_ACTIVE) {</div><div class='ctx'> 		pr_err("Window is not active\n");</div><div class='del'>-		rc = -EACCES;</div><div class='del'>-		goto out;</div><div class='add'>+		return -EACCES;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	paste_addr = cp_inst-&gt;coproc-&gt;vops-&gt;paste_addr(txwin);</div><div class='ctx'> 	if (!paste_addr) {</div><div class='ctx'> 		pr_err("Window paste address failed\n");</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-		goto out;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pfn = paste_addr &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -538,8 +579,6 @@ static int coproc_mmap(struct file *fp, struct vm_area_struct *vma)</div><div class='ctx'> 	txwin-&gt;task_ref.vma = vma;</div><div class='ctx'> 	vma-&gt;vm_ops = &amp;vas_vm_ops;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;txwin-&gt;task_ref.mmap_mutex);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig<br/>index 34669b060f36..db65bfcd1e74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/Kconfig</a></div><div class='hunk'>@@ -3,42 +3,6 @@ config PPC_CELL</div><div class='ctx'> 	select PPC_64S_HASH_MMU if PPC64</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config PPC_CELL_COMMON</div><div class='del'>-	bool</div><div class='del'>-	select PPC_CELL</div><div class='del'>-	select PPC_DCR_MMIO</div><div class='del'>-	select PPC_INDIRECT_PIO</div><div class='del'>-	select PPC_INDIRECT_MMIO</div><div class='del'>-	select PPC_HASH_MMU_NATIVE</div><div class='del'>-	select PPC_RTAS</div><div class='del'>-	select IRQ_EDGE_EOI_HANDLER</div><div class='del'>-</div><div class='del'>-config PPC_CELL_NATIVE</div><div class='del'>-	bool</div><div class='del'>-	select PPC_CELL_COMMON</div><div class='del'>-	select MPIC</div><div class='del'>-	select PPC_IO_WORKAROUNDS</div><div class='del'>-	select IBM_EMAC_EMAC4 if IBM_EMAC</div><div class='del'>-	select IBM_EMAC_RGMII if IBM_EMAC</div><div class='del'>-	select IBM_EMAC_ZMII if IBM_EMAC #test only</div><div class='del'>-	select IBM_EMAC_TAH if IBM_EMAC  #test only</div><div class='del'>-</div><div class='del'>-config PPC_IBM_CELL_BLADE</div><div class='del'>-	bool "IBM Cell Blade"</div><div class='del'>-	depends on PPC64 &amp;&amp; PPC_BOOK3S &amp;&amp; CPU_BIG_ENDIAN</div><div class='del'>-	select PPC_CELL_NATIVE</div><div class='del'>-	select PPC_OF_PLATFORM_PCI</div><div class='del'>-	select FORCE_PCI</div><div class='del'>-	select MMIO_NVRAM</div><div class='del'>-	select PPC_UDBG_16550</div><div class='del'>-	select UDBG_RTAS_CONSOLE</div><div class='del'>-</div><div class='del'>-config AXON_MSI</div><div class='del'>-	bool</div><div class='del'>-	depends on PPC_IBM_CELL_BLADE &amp;&amp; PCI_MSI</div><div class='del'>-	select IRQ_DOMAIN_NOMAP</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> menu "Cell Broadband Engine options"</div><div class='ctx'> 	depends on PPC_CELL</div><div class='ctx'> </div><div class='hunk'>@@ -57,48 +21,4 @@ config SPU_BASE</div><div class='ctx'> 	bool</div><div class='ctx'> 	select PPC_COPRO_BASE</div><div class='ctx'> </div><div class='del'>-config CBE_RAS</div><div class='del'>-	bool "RAS features for bare metal Cell BE"</div><div class='del'>-	depends on PPC_CELL_NATIVE</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config PPC_IBM_CELL_RESETBUTTON</div><div class='del'>-	bool "IBM Cell Blade Pinhole reset button"</div><div class='del'>-	depends on CBE_RAS &amp;&amp; PPC_IBM_CELL_BLADE</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Support Pinhole Resetbutton on IBM Cell blades.</div><div class='del'>-	  This adds a method to trigger system reset via front panel pinhole button.</div><div class='del'>-</div><div class='del'>-config PPC_IBM_CELL_POWERBUTTON</div><div class='del'>-	tristate "IBM Cell Blade power button"</div><div class='del'>-	depends on PPC_IBM_CELL_BLADE &amp;&amp; INPUT_EVDEV</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Support Powerbutton on IBM Cell blades.</div><div class='del'>-	  This will enable the powerbutton as an input device.</div><div class='del'>-</div><div class='del'>-config CBE_THERM</div><div class='del'>-	tristate "CBE thermal support"</div><div class='del'>-	default m</div><div class='del'>-	depends on CBE_RAS &amp;&amp; SPU_BASE</div><div class='del'>-</div><div class='del'>-config PPC_PMI</div><div class='del'>-	tristate</div><div class='del'>-	default y</div><div class='del'>-	depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON</div><div class='del'>-	help</div><div class='del'>-	  PMI (Platform Management Interrupt) is a way to</div><div class='del'>-	  communicate with the BMC (Baseboard Management Controller).</div><div class='del'>-	  It is used in some IBM Cell blades.</div><div class='del'>-</div><div class='del'>-config CBE_CPUFREQ_SPU_GOVERNOR</div><div class='del'>-	tristate "CBE frequency scaling based on SPU usage"</div><div class='del'>-	depends on SPU_FS &amp;&amp; CPU_FREQ</div><div class='del'>-	default m</div><div class='del'>-	help</div><div class='del'>-	  This governor checks for spu usage to adjust the cpu frequency.</div><div class='del'>-	  If no spu is running on a given cpu, that cpu will be throttled to</div><div class='del'>-	  the minimal possible frequency.</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile<br/>index 7ea6692f67e2..7e5ff239c376 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/Makefile</a></div><div class='hunk'>@@ -1,27 +1,4 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-obj-$(CONFIG_PPC_CELL_COMMON)		+= cbe_regs.o interrupt.o pervasive.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_PPC_CELL_NATIVE)		+= iommu.o setup.o spider-pic.o \</div><div class='del'>-					   pmu.o spider-pci.o</div><div class='del'>-obj-$(CONFIG_CBE_RAS)			+= ras.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CBE_THERM)			+= cbe_thermal.o</div><div class='del'>-obj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR)	+= cpufreq_spudemand.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON)	+= cbe_powerbutton.o</div><div class='del'>-</div><div class='del'>-ifdef CONFIG_SMP</div><div class='del'>-obj-$(CONFIG_PPC_CELL_NATIVE)		+= smp.o</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-# needed only when building loadable spufs.ko</div><div class='del'>-spu-priv1-$(CONFIG_PPC_CELL_COMMON)	+= spu_priv1_mmio.o</div><div class='del'>-spu-manage-$(CONFIG_PPC_CELL_COMMON)	+= spu_manage.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \</div><div class='ctx'> 					   spu_syscalls.o \</div><div class='del'>-					   $(spu-priv1-y) \</div><div class='del'>-					   $(spu-manage-y) \</div><div class='ctx'> 					   spufs/</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_AXON_MSI)			+= axon_msi.o</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c<br/>deleted file mode 100644<br/>index 28dc86744cac..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/axon_msi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/axon_msi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,481 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright 2007, Michael Ellerman, IBM Corporation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/msi.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dcr.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-</div><div class='del'>-#include "cell.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MSIC registers, specified as offsets from dcr_base</div><div class='del'>- */</div><div class='del'>-#define MSIC_CTRL_REG	0x0</div><div class='del'>-</div><div class='del'>-/* Base Address registers specify FIFO location in BE memory */</div><div class='del'>-#define MSIC_BASE_ADDR_HI_REG	0x3</div><div class='del'>-#define MSIC_BASE_ADDR_LO_REG	0x4</div><div class='del'>-</div><div class='del'>-/* Hold the read/write offsets into the FIFO */</div><div class='del'>-#define MSIC_READ_OFFSET_REG	0x5</div><div class='del'>-#define MSIC_WRITE_OFFSET_REG	0x6</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* MSIC control register flags */</div><div class='del'>-#define MSIC_CTRL_ENABLE		0x0001</div><div class='del'>-#define MSIC_CTRL_FIFO_FULL_ENABLE	0x0002</div><div class='del'>-#define MSIC_CTRL_IRQ_ENABLE		0x0008</div><div class='del'>-#define MSIC_CTRL_FULL_STOP_ENABLE	0x0010</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The MSIC can be configured to use a FIFO of 32KB, 64KB, 128KB or 256KB.</div><div class='del'>- * Currently we're using a 64KB FIFO size.</div><div class='del'>- */</div><div class='del'>-#define MSIC_FIFO_SIZE_SHIFT	16</div><div class='del'>-#define MSIC_FIFO_SIZE_BYTES	(1 &lt;&lt; MSIC_FIFO_SIZE_SHIFT)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * To configure the FIFO size as (1 &lt;&lt; n) bytes, we write (n - 15) into bits</div><div class='del'>- * 8-9 of the MSIC control reg.</div><div class='del'>- */</div><div class='del'>-#define MSIC_CTRL_FIFO_SIZE	(((MSIC_FIFO_SIZE_SHIFT - 15) &lt;&lt; 8) &amp; 0x300)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We need to mask the read/write offsets to make sure they stay within</div><div class='del'>- * the bounds of the FIFO. Also they should always be 16-byte aligned.</div><div class='del'>- */</div><div class='del'>-#define MSIC_FIFO_SIZE_MASK	((MSIC_FIFO_SIZE_BYTES - 1) &amp; ~0xFu)</div><div class='del'>-</div><div class='del'>-/* Each entry in the FIFO is 16 bytes, the first 4 bytes hold the irq # */</div><div class='del'>-#define MSIC_FIFO_ENTRY_SIZE	0x10</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-struct axon_msic {</div><div class='del'>-	struct irq_domain *irq_domain;</div><div class='del'>-	__le32 *fifo_virt;</div><div class='del'>-	dma_addr_t fifo_phys;</div><div class='del'>-	dcr_host_t dcr_host;</div><div class='del'>-	u32 read_offset;</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-	u32 __iomem *trigger;</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic);</div><div class='del'>-#else</div><div class='del'>-static inline void axon_msi_debug_setup(struct device_node *dn,</div><div class='del'>-					struct axon_msic *msic) { }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)</div><div class='del'>-{</div><div class='del'>-	pr_devel("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);</div><div class='del'>-</div><div class='del'>-	dcr_write(msic-&gt;dcr_host, dcr_n, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void axon_msi_cascade(struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='del'>-	struct axon_msic *msic = irq_desc_get_handler_data(desc);</div><div class='del'>-	u32 write_offset, msi;</div><div class='del'>-	int idx;</div><div class='del'>-	int retry = 0;</div><div class='del'>-</div><div class='del'>-	write_offset = dcr_read(msic-&gt;dcr_host, MSIC_WRITE_OFFSET_REG);</div><div class='del'>-	pr_devel("axon_msi: original write_offset 0x%x\n", write_offset);</div><div class='del'>-</div><div class='del'>-	/* write_offset doesn't wrap properly, so we have to mask it */</div><div class='del'>-	write_offset &amp;= MSIC_FIFO_SIZE_MASK;</div><div class='del'>-</div><div class='del'>-	while (msic-&gt;read_offset != write_offset &amp;&amp; retry &lt; 100) {</div><div class='del'>-		idx  = msic-&gt;read_offset / sizeof(__le32);</div><div class='del'>-		msi  = le32_to_cpu(msic-&gt;fifo_virt[idx]);</div><div class='del'>-		msi &amp;= 0xFFFF;</div><div class='del'>-</div><div class='del'>-		pr_devel("axon_msi: woff %x roff %x msi %x\n",</div><div class='del'>-			  write_offset, msic-&gt;read_offset, msi);</div><div class='del'>-</div><div class='del'>-		if (msi &lt; nr_irqs &amp;&amp; irq_get_chip_data(msi) == msic) {</div><div class='del'>-			generic_handle_irq(msi);</div><div class='del'>-			msic-&gt;fifo_virt[idx] = cpu_to_le32(0xffffffff);</div><div class='del'>-		} else {</div><div class='del'>-			/*</div><div class='del'>-			 * Reading the MSIC_WRITE_OFFSET_REG does not</div><div class='del'>-			 * reliably flush the outstanding DMA to the</div><div class='del'>-			 * FIFO buffer. Here we were reading stale</div><div class='del'>-			 * data, so we need to retry.</div><div class='del'>-			 */</div><div class='del'>-			udelay(1);</div><div class='del'>-			retry++;</div><div class='del'>-			pr_devel("axon_msi: invalid irq 0x%x!\n", msi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (retry) {</div><div class='del'>-			pr_devel("axon_msi: late irq 0x%x, retry %d\n",</div><div class='del'>-				 msi, retry);</div><div class='del'>-			retry = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		msic-&gt;read_offset += MSIC_FIFO_ENTRY_SIZE;</div><div class='del'>-		msic-&gt;read_offset &amp;= MSIC_FIFO_SIZE_MASK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (retry) {</div><div class='del'>-		printk(KERN_WARNING "axon_msi: irq timed out\n");</div><div class='del'>-</div><div class='del'>-		msic-&gt;read_offset += MSIC_FIFO_ENTRY_SIZE;</div><div class='del'>-		msic-&gt;read_offset &amp;= MSIC_FIFO_SIZE_MASK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct axon_msic *find_msi_translator(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct irq_domain *irq_domain;</div><div class='del'>-	struct device_node *dn, *tmp;</div><div class='del'>-	const phandle *ph;</div><div class='del'>-	struct axon_msic *msic = NULL;</div><div class='del'>-</div><div class='del'>-	dn = of_node_get(pci_device_to_OF_node(dev));</div><div class='del'>-	if (!dn) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev, "axon_msi: no pci_dn found\n");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (; dn; dn = of_get_next_parent(dn)) {</div><div class='del'>-		ph = of_get_property(dn, "msi-translator", NULL);</div><div class='del'>-		if (ph)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ph) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev,</div><div class='del'>-			"axon_msi: no msi-translator property found\n");</div><div class='del'>-		goto out_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tmp = dn;</div><div class='del'>-	dn = of_find_node_by_phandle(*ph);</div><div class='del'>-	of_node_put(tmp);</div><div class='del'>-	if (!dn) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev,</div><div class='del'>-			"axon_msi: msi-translator doesn't point to a node\n");</div><div class='del'>-		goto out_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq_domain = irq_find_host(dn);</div><div class='del'>-	if (!irq_domain) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev, "axon_msi: no irq_domain found for node %pOF\n",</div><div class='del'>-			dn);</div><div class='del'>-		goto out_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msic = irq_domain-&gt;host_data;</div><div class='del'>-</div><div class='del'>-out_error:</div><div class='del'>-	of_node_put(dn);</div><div class='del'>-</div><div class='del'>-	return msic;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	int len;</div><div class='del'>-	const u32 *prop;</div><div class='del'>-</div><div class='del'>-	dn = of_node_get(pci_device_to_OF_node(dev));</div><div class='del'>-	if (!dn) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev, "axon_msi: no pci_dn found\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (; dn; dn = of_get_next_parent(dn)) {</div><div class='del'>-		if (!dev-&gt;no_64bit_msi) {</div><div class='del'>-			prop = of_get_property(dn, "msi-address-64", &amp;len);</div><div class='del'>-			if (prop)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		prop = of_get_property(dn, "msi-address-32", &amp;len);</div><div class='del'>-		if (prop)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!prop) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev,</div><div class='del'>-			"axon_msi: no msi-address-(32|64) properties found\n");</div><div class='del'>-		of_node_put(dn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 8:</div><div class='del'>-		msg-&gt;address_hi = prop[0];</div><div class='del'>-		msg-&gt;address_lo = prop[1];</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		msg-&gt;address_hi = 0;</div><div class='del'>-		msg-&gt;address_lo = prop[0];</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev,</div><div class='del'>-			"axon_msi: malformed msi-address-(32|64) property\n");</div><div class='del'>-		of_node_put(dn);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	of_node_put(dn);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='del'>-{</div><div class='del'>-	unsigned int virq, rc;</div><div class='del'>-	struct msi_desc *entry;</div><div class='del'>-	struct msi_msg msg;</div><div class='del'>-	struct axon_msic *msic;</div><div class='del'>-</div><div class='del'>-	msic = find_msi_translator(dev);</div><div class='del'>-	if (!msic)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	rc = setup_msi_msg_address(dev, &amp;msg);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	msi_for_each_desc(entry, &amp;dev-&gt;dev, MSI_DESC_NOTASSOCIATED) {</div><div class='del'>-		virq = irq_create_direct_mapping(msic-&gt;irq_domain);</div><div class='del'>-		if (!virq) {</div><div class='del'>-			dev_warn(&amp;dev-&gt;dev,</div><div class='del'>-				 "axon_msi: virq allocation failed!\n");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-		dev_dbg(&amp;dev-&gt;dev, "axon_msi: allocated virq 0x%x\n", virq);</div><div class='del'>-</div><div class='del'>-		irq_set_msi_desc(virq, entry);</div><div class='del'>-		msg.data = virq;</div><div class='del'>-		pci_write_msi_msg(virq, &amp;msg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct msi_desc *entry;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;dev-&gt;dev, "axon_msi: tearing down msi irqs\n");</div><div class='del'>-</div><div class='del'>-	msi_for_each_desc(entry, &amp;dev-&gt;dev, MSI_DESC_ASSOCIATED) {</div><div class='del'>-		irq_set_msi_desc(entry-&gt;irq, NULL);</div><div class='del'>-		irq_dispose_mapping(entry-&gt;irq);</div><div class='del'>-		entry-&gt;irq = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip msic_irq_chip = {</div><div class='del'>-	.irq_mask	= pci_msi_mask_irq,</div><div class='del'>-	.irq_unmask	= pci_msi_unmask_irq,</div><div class='del'>-	.irq_shutdown	= pci_msi_mask_irq,</div><div class='del'>-	.name		= "AXON-MSI",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int msic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='del'>-			 irq_hw_number_t hw)</div><div class='del'>-{</div><div class='del'>-	irq_set_chip_data(virq, h-&gt;host_data);</div><div class='del'>-	irq_set_chip_and_handler(virq, &amp;msic_irq_chip, handle_simple_irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops msic_host_ops = {</div><div class='del'>-	.map	= msic_host_map,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void axon_msi_shutdown(struct platform_device *device)</div><div class='del'>-{</div><div class='del'>-	struct axon_msic *msic = dev_get_drvdata(&amp;device-&gt;dev);</div><div class='del'>-	u32 tmp;</div><div class='del'>-</div><div class='del'>-	pr_devel("axon_msi: disabling %pOF\n",</div><div class='del'>-		 irq_domain_get_of_node(msic-&gt;irq_domain));</div><div class='del'>-	tmp  = dcr_read(msic-&gt;dcr_host, MSIC_CTRL_REG);</div><div class='del'>-	tmp &amp;= ~MSIC_CTRL_ENABLE &amp; ~MSIC_CTRL_IRQ_ENABLE;</div><div class='del'>-	msic_dcr_write(msic, MSIC_CTRL_REG, tmp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int axon_msi_probe(struct platform_device *device)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn = device-&gt;dev.of_node;</div><div class='del'>-	struct axon_msic *msic;</div><div class='del'>-	unsigned int virq;</div><div class='del'>-	int dcr_base, dcr_len;</div><div class='del'>-</div><div class='del'>-	pr_devel("axon_msi: setting up dn %pOF\n", dn);</div><div class='del'>-</div><div class='del'>-	msic = kzalloc(sizeof(*msic), GFP_KERNEL);</div><div class='del'>-	if (!msic) {</div><div class='del'>-		printk(KERN_ERR "axon_msi: couldn't allocate msic for %pOF\n",</div><div class='del'>-		       dn);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dcr_base = dcr_resource_start(dn, 0);</div><div class='del'>-	dcr_len = dcr_resource_len(dn, 0);</div><div class='del'>-</div><div class='del'>-	if (dcr_base == 0 || dcr_len == 0) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-		       "axon_msi: couldn't parse dcr properties on %pOF\n",</div><div class='del'>-			dn);</div><div class='del'>-		goto out_free_msic;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msic-&gt;dcr_host = dcr_map(dn, dcr_base, dcr_len);</div><div class='del'>-	if (!DCR_MAP_OK(msic-&gt;dcr_host)) {</div><div class='del'>-		printk(KERN_ERR "axon_msi: dcr_map failed for %pOF\n",</div><div class='del'>-		       dn);</div><div class='del'>-		goto out_free_msic;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msic-&gt;fifo_virt = dma_alloc_coherent(&amp;device-&gt;dev, MSIC_FIFO_SIZE_BYTES,</div><div class='del'>-					     &amp;msic-&gt;fifo_phys, GFP_KERNEL);</div><div class='del'>-	if (!msic-&gt;fifo_virt) {</div><div class='del'>-		printk(KERN_ERR "axon_msi: couldn't allocate fifo for %pOF\n",</div><div class='del'>-		       dn);</div><div class='del'>-		goto out_free_msic;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	virq = irq_of_parse_and_map(dn, 0);</div><div class='del'>-	if (!virq) {</div><div class='del'>-		printk(KERN_ERR "axon_msi: irq parse and map failed for %pOF\n",</div><div class='del'>-		       dn);</div><div class='del'>-		goto out_free_fifo;</div><div class='del'>-	}</div><div class='del'>-	memset(msic-&gt;fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);</div><div class='del'>-</div><div class='del'>-	/* We rely on being able to stash a virq in a u16, so limit irqs to &lt; 65536 */</div><div class='del'>-	msic-&gt;irq_domain = irq_domain_add_nomap(dn, 65536, &amp;msic_host_ops, msic);</div><div class='del'>-	if (!msic-&gt;irq_domain) {</div><div class='del'>-		printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %pOF\n",</div><div class='del'>-		       dn);</div><div class='del'>-		goto out_free_fifo;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq_set_handler_data(virq, msic);</div><div class='del'>-	irq_set_chained_handler(virq, axon_msi_cascade);</div><div class='del'>-	pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq);</div><div class='del'>-</div><div class='del'>-	/* Enable the MSIC hardware */</div><div class='del'>-	msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, msic-&gt;fifo_phys &gt;&gt; 32);</div><div class='del'>-	msic_dcr_write(msic, MSIC_BASE_ADDR_LO_REG,</div><div class='del'>-				  msic-&gt;fifo_phys &amp; 0xFFFFFFFF);</div><div class='del'>-	msic_dcr_write(msic, MSIC_CTRL_REG,</div><div class='del'>-			MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE |</div><div class='del'>-			MSIC_CTRL_FIFO_SIZE);</div><div class='del'>-</div><div class='del'>-	msic-&gt;read_offset = dcr_read(msic-&gt;dcr_host, MSIC_WRITE_OFFSET_REG)</div><div class='del'>-				&amp; MSIC_FIFO_SIZE_MASK;</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(&amp;device-&gt;dev, msic);</div><div class='del'>-</div><div class='del'>-	cell_pci_controller_ops.setup_msi_irqs = axon_msi_setup_msi_irqs;</div><div class='del'>-	cell_pci_controller_ops.teardown_msi_irqs = axon_msi_teardown_msi_irqs;</div><div class='del'>-</div><div class='del'>-	axon_msi_debug_setup(dn, msic);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "axon_msi: setup MSIC on %pOF\n", dn);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_free_fifo:</div><div class='del'>-	dma_free_coherent(&amp;device-&gt;dev, MSIC_FIFO_SIZE_BYTES, msic-&gt;fifo_virt,</div><div class='del'>-			  msic-&gt;fifo_phys);</div><div class='del'>-out_free_msic:</div><div class='del'>-	kfree(msic);</div><div class='del'>-out:</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct of_device_id axon_msi_device_id[] = {</div><div class='del'>-	{</div><div class='del'>-		.compatible	= "ibm,axon-msic"</div><div class='del'>-	},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_driver axon_msi_driver = {</div><div class='del'>-	.probe		= axon_msi_probe,</div><div class='del'>-	.shutdown	= axon_msi_shutdown,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "axon-msi",</div><div class='del'>-		.of_match_table = axon_msi_device_id,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init axon_msi_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;axon_msi_driver);</div><div class='del'>-}</div><div class='del'>-subsys_initcall(axon_msi_init);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-static int msic_set(void *data, u64 val)</div><div class='del'>-{</div><div class='del'>-	struct axon_msic *msic = data;</div><div class='del'>-	out_le32(msic-&gt;trigger, val);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int msic_get(void *data, u64 *val)</div><div class='del'>-{</div><div class='del'>-	*val = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n");</div><div class='del'>-</div><div class='del'>-void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic)</div><div class='del'>-{</div><div class='del'>-	char name[8];</div><div class='del'>-	struct resource res;</div><div class='del'>-</div><div class='del'>-	if (of_address_to_resource(dn, 0, &amp;res)) {</div><div class='del'>-		pr_devel("axon_msi: couldn't get reg property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msic-&gt;trigger = ioremap(res.start, 0x4);</div><div class='del'>-	if (!msic-&gt;trigger) {</div><div class='del'>-		pr_devel("axon_msi: ioremap failed\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn));</div><div class='del'>-</div><div class='del'>-	debugfs_create_file(name, 0600, arch_debugfs_dir, msic, &amp;fops_msic);</div><div class='del'>-}</div><div class='del'>-#endif /* DEBUG */</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/cbe_powerbutton.c b/arch/powerpc/platforms/cell/cbe_powerbutton.c<br/>deleted file mode 100644<br/>index 3d121acdf69b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/cbe_powerbutton.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_powerbutton.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,106 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * driver for powerbutton on IBM cell blades</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corp. 2005-2008</div><div class='del'>- *</div><div class='del'>- * Author: Christian Krafft &lt;krafft@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;asm/pmi.h&gt;</div><div class='del'>-</div><div class='del'>-static struct input_dev *button_dev;</div><div class='del'>-static struct platform_device *button_pdev;</div><div class='del'>-</div><div class='del'>-static void cbe_powerbutton_handle_pmi(pmi_message_t pmi_msg)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(pmi_msg.type != PMI_TYPE_POWER_BUTTON);</div><div class='del'>-</div><div class='del'>-	input_report_key(button_dev, KEY_POWER, 1);</div><div class='del'>-	input_sync(button_dev);</div><div class='del'>-	input_report_key(button_dev, KEY_POWER, 0);</div><div class='del'>-	input_sync(button_dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pmi_handler cbe_pmi_handler = {</div><div class='del'>-	.type			= PMI_TYPE_POWER_BUTTON,</div><div class='del'>-	.handle_pmi_message	= cbe_powerbutton_handle_pmi,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init cbe_powerbutton_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct input_dev *dev;</div><div class='del'>-</div><div class='del'>-	if (!of_machine_is_compatible("IBM,CBPLUS-1.0")) {</div><div class='del'>-		printk(KERN_ERR "%s: Not a cell blade.\n", __func__);</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = input_allocate_device();</div><div class='del'>-	if (!dev) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		printk(KERN_ERR "%s: Not enough memory.\n", __func__);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	set_bit(EV_KEY, dev-&gt;evbit);</div><div class='del'>-	set_bit(KEY_POWER, dev-&gt;keybit);</div><div class='del'>-</div><div class='del'>-	dev-&gt;name = "Power Button";</div><div class='del'>-	dev-&gt;id.bustype = BUS_HOST;</div><div class='del'>-</div><div class='del'>-	/* this makes the button look like an acpi power button</div><div class='del'>-	 * no clue whether anyone relies on that though */</div><div class='del'>-	dev-&gt;id.product = 0x02;</div><div class='del'>-	dev-&gt;phys = "LNXPWRBN/button/input0";</div><div class='del'>-</div><div class='del'>-	button_pdev = platform_device_register_simple("power_button", 0, NULL, 0);</div><div class='del'>-	if (IS_ERR(button_pdev)) {</div><div class='del'>-		ret = PTR_ERR(button_pdev);</div><div class='del'>-		goto out_free_input;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;dev.parent = &amp;button_pdev-&gt;dev;</div><div class='del'>-	ret = input_register_device(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		printk(KERN_ERR "%s: Failed to register device\n", __func__);</div><div class='del'>-		goto out_free_pdev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	button_dev = dev;</div><div class='del'>-</div><div class='del'>-	ret = pmi_register_handler(&amp;cbe_pmi_handler);</div><div class='del'>-	if (ret) {</div><div class='del'>-		printk(KERN_ERR "%s: Failed to register with pmi.\n", __func__);</div><div class='del'>-		goto out_free_pdev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_free_pdev:</div><div class='del'>-	platform_device_unregister(button_pdev);</div><div class='del'>-out_free_input:</div><div class='del'>-	input_free_device(dev);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cbe_powerbutton_exit(void)</div><div class='del'>-{</div><div class='del'>-	pmi_unregister_handler(&amp;cbe_pmi_handler);</div><div class='del'>-	platform_device_unregister(button_pdev);</div><div class='del'>-	input_free_device(button_dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(cbe_powerbutton_init);</div><div class='del'>-module_exit(cbe_powerbutton_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Driver for powerbutton on IBM cell blades");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Christian Krafft &lt;krafft@de.ibm.com&gt;");</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c<br/>deleted file mode 100644<br/>index 99b3558753e9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/cbe_regs.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_regs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,298 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * cbe_regs.c</div><div class='del'>- *</div><div class='del'>- * Accessor routines for the various MMIO register blocks of the CBE</div><div class='del'>- *</div><div class='del'>- * (c) 2006 Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;, IBM Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/percpu.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Current implementation uses "cpu" nodes. We build our own mapping</div><div class='del'>- * array of cpu numbers to cpu nodes locally for now to allow interrupt</div><div class='del'>- * time code to have a fast path rather than call of_get_cpu_node(). If</div><div class='del'>- * we implement cpu hotplug, we'll have to install an appropriate notifier</div><div class='del'>- * in order to release references to the cpu going away</div><div class='del'>- */</div><div class='del'>-static struct cbe_regs_map</div><div class='del'>-{</div><div class='del'>-	struct device_node *cpu_node;</div><div class='del'>-	struct device_node *be_node;</div><div class='del'>-	struct cbe_pmd_regs __iomem *pmd_regs;</div><div class='del'>-	struct cbe_iic_regs __iomem *iic_regs;</div><div class='del'>-	struct cbe_mic_tm_regs __iomem *mic_tm_regs;</div><div class='del'>-	struct cbe_pmd_shadow_regs pmd_shadow_regs;</div><div class='del'>-} cbe_regs_maps[MAX_CBE];</div><div class='del'>-static int cbe_regs_map_count;</div><div class='del'>-</div><div class='del'>-static struct cbe_thread_map</div><div class='del'>-{</div><div class='del'>-	struct device_node *cpu_node;</div><div class='del'>-	struct device_node *be_node;</div><div class='del'>-	struct cbe_regs_map *regs;</div><div class='del'>-	unsigned int thread_id;</div><div class='del'>-	unsigned int cbe_id;</div><div class='del'>-} cbe_thread_map[NR_CPUS];</div><div class='del'>-</div><div class='del'>-static cpumask_t cbe_local_mask[MAX_CBE] = { [0 ... MAX_CBE-1] = {CPU_BITS_NONE} };</div><div class='del'>-static cpumask_t cbe_first_online_cpu = { CPU_BITS_NONE };</div><div class='del'>-</div><div class='del'>-static struct cbe_regs_map *cbe_find_map(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct device_node *tmp_np;</div><div class='del'>-</div><div class='del'>-	if (!of_node_is_type(np, "spe")) {</div><div class='del'>-		for (i = 0; i &lt; cbe_regs_map_count; i++)</div><div class='del'>-			if (cbe_regs_maps[i].cpu_node == np ||</div><div class='del'>-			    cbe_regs_maps[i].be_node == np)</div><div class='del'>-				return &amp;cbe_regs_maps[i];</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (np-&gt;data)</div><div class='del'>-		return np-&gt;data;</div><div class='del'>-</div><div class='del'>-	/* walk up path until cpu or be node was found */</div><div class='del'>-	tmp_np = np;</div><div class='del'>-	do {</div><div class='del'>-		tmp_np = tmp_np-&gt;parent;</div><div class='del'>-		/* on a correct devicetree we wont get up to root */</div><div class='del'>-		BUG_ON(!tmp_np);</div><div class='del'>-	} while (!of_node_is_type(tmp_np, "cpu") ||</div><div class='del'>-		 !of_node_is_type(tmp_np, "be"));</div><div class='del'>-</div><div class='del'>-	np-&gt;data = cbe_find_map(tmp_np);</div><div class='del'>-</div><div class='del'>-	return np-&gt;data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_find_map(np);</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;pmd_regs;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_pmd_regs);</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;pmd_regs;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_cpu_pmd_regs);</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_shadow_regs *cbe_get_pmd_shadow_regs(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_find_map(np);</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return &amp;map-&gt;pmd_shadow_regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_pmd_shadow_regs *cbe_get_cpu_pmd_shadow_regs(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return &amp;map-&gt;pmd_shadow_regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_find_map(np);</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;iic_regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;iic_regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_find_map(np);</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;mic_tm_regs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;</div><div class='del'>-	if (map == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	return map-&gt;mic_tm_regs;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_cpu_mic_tm_regs);</div><div class='del'>-</div><div class='del'>-u32 cbe_get_hw_thread_id(int cpu)</div><div class='del'>-{</div><div class='del'>-	return cbe_thread_map[cpu].thread_id;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_hw_thread_id);</div><div class='del'>-</div><div class='del'>-u32 cbe_cpu_to_node(int cpu)</div><div class='del'>-{</div><div class='del'>-	return cbe_thread_map[cpu].cbe_id;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_cpu_to_node);</div><div class='del'>-</div><div class='del'>-u32 cbe_node_to_cpu(int node)</div><div class='del'>-{</div><div class='del'>-	return cpumask_first(&amp;cbe_local_mask[node]);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_node_to_cpu);</div><div class='del'>-</div><div class='del'>-static struct device_node *__init cbe_get_be_node(int cpu_id)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	for_each_node_by_type (np, "be") {</div><div class='del'>-		int len,i;</div><div class='del'>-		const phandle *cpu_handle;</div><div class='del'>-</div><div class='del'>-		cpu_handle = of_get_property(np, "cpus", &amp;len);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * the CAB SLOF tree is non compliant, so we just assume</div><div class='del'>-		 * there is only one node</div><div class='del'>-		 */</div><div class='del'>-		if (WARN_ON_ONCE(!cpu_handle))</div><div class='del'>-			return np;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; len; i++) {</div><div class='del'>-			struct device_node *ch_np = of_find_node_by_phandle(cpu_handle[i]);</div><div class='del'>-			struct device_node *ci_np = of_get_cpu_node(cpu_id, NULL);</div><div class='del'>-</div><div class='del'>-			of_node_put(ch_np);</div><div class='del'>-			of_node_put(ci_np);</div><div class='del'>-</div><div class='del'>-			if (ch_np == ci_np)</div><div class='del'>-				return np;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cbe_fill_regs_map(struct cbe_regs_map *map)</div><div class='del'>-{</div><div class='del'>-	if(map-&gt;be_node) {</div><div class='del'>-		struct device_node *be, *np, *parent_np;</div><div class='del'>-</div><div class='del'>-		be = map-&gt;be_node;</div><div class='del'>-</div><div class='del'>-		for_each_node_by_type(np, "pervasive") {</div><div class='del'>-			parent_np = of_get_parent(np);</div><div class='del'>-			if (parent_np == be)</div><div class='del'>-				map-&gt;pmd_regs = of_iomap(np, 0);</div><div class='del'>-			of_node_put(parent_np);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for_each_node_by_type(np, "CBEA-Internal-Interrupt-Controller") {</div><div class='del'>-			parent_np = of_get_parent(np);</div><div class='del'>-			if (parent_np == be)</div><div class='del'>-				map-&gt;iic_regs = of_iomap(np, 2);</div><div class='del'>-			of_node_put(parent_np);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for_each_node_by_type(np, "mic-tm") {</div><div class='del'>-			parent_np = of_get_parent(np);</div><div class='del'>-			if (parent_np == be)</div><div class='del'>-				map-&gt;mic_tm_regs = of_iomap(np, 0);</div><div class='del'>-			of_node_put(parent_np);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		struct device_node *cpu;</div><div class='del'>-		/* That hack must die die die ! */</div><div class='del'>-		const struct address_prop {</div><div class='del'>-			unsigned long address;</div><div class='del'>-			unsigned int len;</div><div class='del'>-		} __attribute__((packed)) *prop;</div><div class='del'>-</div><div class='del'>-		cpu = map-&gt;cpu_node;</div><div class='del'>-</div><div class='del'>-		prop = of_get_property(cpu, "pervasive", NULL);</div><div class='del'>-		if (prop != NULL)</div><div class='del'>-			map-&gt;pmd_regs = ioremap(prop-&gt;address, prop-&gt;len);</div><div class='del'>-</div><div class='del'>-		prop = of_get_property(cpu, "iic", NULL);</div><div class='del'>-		if (prop != NULL)</div><div class='del'>-			map-&gt;iic_regs = ioremap(prop-&gt;address, prop-&gt;len);</div><div class='del'>-</div><div class='del'>-		prop = of_get_property(cpu, "mic-tm", NULL);</div><div class='del'>-		if (prop != NULL)</div><div class='del'>-			map-&gt;mic_tm_regs = ioremap(prop-&gt;address, prop-&gt;len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void __init cbe_regs_init(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned int thread_id;</div><div class='del'>-	struct device_node *cpu;</div><div class='del'>-</div><div class='del'>-	/* Build local fast map of CPUs */</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		cbe_thread_map[i].cpu_node = of_get_cpu_node(i, &amp;thread_id);</div><div class='del'>-		cbe_thread_map[i].be_node = cbe_get_be_node(i);</div><div class='del'>-		cbe_thread_map[i].thread_id = thread_id;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Find maps for each device tree CPU */</div><div class='del'>-	for_each_node_by_type(cpu, "cpu") {</div><div class='del'>-		struct cbe_regs_map *map;</div><div class='del'>-		unsigned int cbe_id;</div><div class='del'>-</div><div class='del'>-		cbe_id = cbe_regs_map_count++;</div><div class='del'>-		map = &amp;cbe_regs_maps[cbe_id];</div><div class='del'>-</div><div class='del'>-		if (cbe_regs_map_count &gt; MAX_CBE) {</div><div class='del'>-			printk(KERN_ERR "cbe_regs: More BE chips than supported"</div><div class='del'>-			       "!\n");</div><div class='del'>-			cbe_regs_map_count--;</div><div class='del'>-			of_node_put(cpu);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		of_node_put(map-&gt;cpu_node);</div><div class='del'>-		map-&gt;cpu_node = of_node_get(cpu);</div><div class='del'>-</div><div class='del'>-		for_each_possible_cpu(i) {</div><div class='del'>-			struct cbe_thread_map *thread = &amp;cbe_thread_map[i];</div><div class='del'>-</div><div class='del'>-			if (thread-&gt;cpu_node == cpu) {</div><div class='del'>-				thread-&gt;regs = map;</div><div class='del'>-				thread-&gt;cbe_id = cbe_id;</div><div class='del'>-				map-&gt;be_node = thread-&gt;be_node;</div><div class='del'>-				cpumask_set_cpu(i, &amp;cbe_local_mask[cbe_id]);</div><div class='del'>-				if(thread-&gt;thread_id == 0)</div><div class='del'>-					cpumask_set_cpu(i, &amp;cbe_first_online_cpu);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cbe_fill_regs_map(map);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/cbe_thermal.c b/arch/powerpc/platforms/cell/cbe_thermal.c<br/>deleted file mode 100644<br/>index c295c6714f9b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/cbe_thermal.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cbe_thermal.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,387 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * thermal support for the cell processor</div><div class='del'>- *</div><div class='del'>- * This module adds some sysfs attributes to cpu and spu nodes.</div><div class='del'>- * Base for measurements are the digital thermal sensors (DTS)</div><div class='del'>- * located on the chip.</div><div class='del'>- * The accuracy is 2 degrees, starting from 65 up to 125 degrees celsius</div><div class='del'>- * The attributes can be found under</div><div class='del'>- * /sys/devices/system/cpu/cpuX/thermal</div><div class='del'>- * /sys/devices/system/spu/spuX/thermal</div><div class='del'>- *</div><div class='del'>- * The following attributes are added for each node:</div><div class='del'>- * temperature:</div><div class='del'>- *	contains the current temperature measured by the DTS</div><div class='del'>- * throttle_begin:</div><div class='del'>- *	throttling begins when temperature is greater or equal to</div><div class='del'>- *	throttle_begin. Setting this value to 125 prevents throttling.</div><div class='del'>- * throttle_end:</div><div class='del'>- *	throttling is being ceased, if the temperature is lower than</div><div class='del'>- *	throttle_end. Due to a delay between applying throttling and</div><div class='del'>- *	a reduced temperature this value should be less than throttle_begin.</div><div class='del'>- *	A value equal to throttle_begin provides only a very little hysteresis.</div><div class='del'>- * throttle_full_stop:</div><div class='del'>- *	If the temperatrue is greater or equal to throttle_full_stop,</div><div class='del'>- *	full throttling is applied to the cpu or spu. This value should be</div><div class='del'>- *	greater than throttle_begin and throttle_end. Setting this value to</div><div class='del'>- *	65 prevents the unit from running code at all.</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *</div><div class='del'>- * Author: Christian Krafft &lt;krafft@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;linux/stringify.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "spu_priv1_mmio.h"</div><div class='del'>-</div><div class='del'>-#define TEMP_MIN 65</div><div class='del'>-#define TEMP_MAX 125</div><div class='del'>-</div><div class='del'>-#define DEVICE_PREFIX_ATTR(_prefix,_name,_mode)			\</div><div class='del'>-struct device_attribute attr_ ## _prefix ## _ ## _name = {	\</div><div class='del'>-	.attr = { .name = __stringify(_name), .mode = _mode },	\</div><div class='del'>-	.show	= _prefix ## _show_ ## _name,			\</div><div class='del'>-	.store	= _prefix ## _store_ ## _name,			\</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u8 reg_to_temp(u8 reg_value)</div><div class='del'>-{</div><div class='del'>-	return ((reg_value &amp; 0x3f) &lt;&lt; 1) + TEMP_MIN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u8 temp_to_reg(u8 temp)</div><div class='del'>-{</div><div class='del'>-	return ((temp - TEMP_MIN) &gt;&gt; 1) &amp; 0x3f;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct cbe_pmd_regs __iomem *get_pmd_regs(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-</div><div class='del'>-	spu = container_of(dev, struct spu, dev);</div><div class='del'>-</div><div class='del'>-	return cbe_get_pmd_regs(spu_devnode(spu));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* returns the value for a given spu in a given register */</div><div class='del'>-static u8 spu_read_register_value(struct device *dev, union spe_reg __iomem *reg)</div><div class='del'>-{</div><div class='del'>-	union spe_reg value;</div><div class='del'>-	struct spu *spu;</div><div class='del'>-</div><div class='del'>-	spu = container_of(dev, struct spu, dev);</div><div class='del'>-	value.val = in_be64(&amp;reg-&gt;val);</div><div class='del'>-</div><div class='del'>-	return value.spe[spu-&gt;spe_id];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_show_temp(struct device *dev, struct device_attribute *attr,</div><div class='del'>-			char *buf)</div><div class='del'>-{</div><div class='del'>-	u8 value;</div><div class='del'>-	struct cbe_pmd_regs __iomem *pmd_regs;</div><div class='del'>-</div><div class='del'>-	pmd_regs = get_pmd_regs(dev);</div><div class='del'>-</div><div class='del'>-	value = spu_read_register_value(dev, &amp;pmd_regs-&gt;ts_ctsr1);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d\n", reg_to_temp(value));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t show_throttle(struct cbe_pmd_regs __iomem *pmd_regs, char *buf, int pos)</div><div class='del'>-{</div><div class='del'>-	u64 value;</div><div class='del'>-</div><div class='del'>-	value = in_be64(&amp;pmd_regs-&gt;tm_tpr.val);</div><div class='del'>-	/* access the corresponding byte */</div><div class='del'>-	value &gt;&gt;= pos;</div><div class='del'>-	value &amp;= 0x3F;</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d\n", reg_to_temp(value));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t store_throttle(struct cbe_pmd_regs __iomem *pmd_regs, const char *buf, size_t size, int pos)</div><div class='del'>-{</div><div class='del'>-	u64 reg_value;</div><div class='del'>-	unsigned int temp;</div><div class='del'>-	u64 new_value;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = sscanf(buf, "%u", &amp;temp);</div><div class='del'>-</div><div class='del'>-	if (ret != 1 || temp &lt; TEMP_MIN || temp &gt; TEMP_MAX)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	new_value = temp_to_reg(temp);</div><div class='del'>-</div><div class='del'>-	reg_value = in_be64(&amp;pmd_regs-&gt;tm_tpr.val);</div><div class='del'>-</div><div class='del'>-	/* zero out bits for new value */</div><div class='del'>-	reg_value &amp;= ~(0xffull &lt;&lt; pos);</div><div class='del'>-	/* set bits to new value */</div><div class='del'>-	reg_value |= new_value &lt;&lt; pos;</div><div class='del'>-</div><div class='del'>-	out_be64(&amp;pmd_regs-&gt;tm_tpr.val, reg_value);</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_show_throttle_end(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(get_pmd_regs(dev), buf, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_show_throttle_begin(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(get_pmd_regs(dev), buf, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_show_throttle_full_stop(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(get_pmd_regs(dev), buf, 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_store_throttle_end(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(get_pmd_regs(dev), buf, size, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_store_throttle_begin(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(get_pmd_regs(dev), buf, size, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t spu_store_throttle_full_stop(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(get_pmd_regs(dev), buf, size, 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_show_temp(struct device *dev, char *buf, int pos)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_regs __iomem *pmd_regs;</div><div class='del'>-	u64 value;</div><div class='del'>-</div><div class='del'>-	pmd_regs = cbe_get_cpu_pmd_regs(dev-&gt;id);</div><div class='del'>-	value = in_be64(&amp;pmd_regs-&gt;ts_ctsr2);</div><div class='del'>-</div><div class='del'>-	value = (value &gt;&gt; pos) &amp; 0x3f;</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d\n", reg_to_temp(value));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* shows the temperature of the DTS on the PPE,</div><div class='del'>- * located near the linear thermal sensor */</div><div class='del'>-static ssize_t ppe_show_temp0(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return ppe_show_temp(dev, buf, 32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* shows the temperature of the second DTS on the PPE */</div><div class='del'>-static ssize_t ppe_show_temp1(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return ppe_show_temp(dev, buf, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_show_throttle_end(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, 32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_show_throttle_begin(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, 40);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_show_throttle_full_stop(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	return show_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, 48);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_store_throttle_end(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, size, 32);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_store_throttle_begin(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, size, 40);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ppe_store_throttle_full_stop(struct device *dev,</div><div class='del'>-			struct device_attribute *attr, const char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	return store_throttle(cbe_get_cpu_pmd_regs(dev-&gt;id), buf, size, 48);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct device_attribute attr_spu_temperature = {</div><div class='del'>-	.attr = {.name = "temperature", .mode = 0400 },</div><div class='del'>-	.show = spu_show_temp,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEVICE_PREFIX_ATTR(spu, throttle_end, 0600);</div><div class='del'>-static DEVICE_PREFIX_ATTR(spu, throttle_begin, 0600);</div><div class='del'>-static DEVICE_PREFIX_ATTR(spu, throttle_full_stop, 0600);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct attribute *spu_attributes[] = {</div><div class='del'>-	&amp;attr_spu_temperature.attr,</div><div class='del'>-	&amp;attr_spu_throttle_end.attr,</div><div class='del'>-	&amp;attr_spu_throttle_begin.attr,</div><div class='del'>-	&amp;attr_spu_throttle_full_stop.attr,</div><div class='del'>-	NULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct attribute_group spu_attribute_group = {</div><div class='del'>-	.name	= "thermal",</div><div class='del'>-	.attrs	= spu_attributes,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct device_attribute attr_ppe_temperature0 = {</div><div class='del'>-	.attr = {.name = "temperature0", .mode = 0400 },</div><div class='del'>-	.show = ppe_show_temp0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct device_attribute attr_ppe_temperature1 = {</div><div class='del'>-	.attr = {.name = "temperature1", .mode = 0400 },</div><div class='del'>-	.show = ppe_show_temp1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEVICE_PREFIX_ATTR(ppe, throttle_end, 0600);</div><div class='del'>-static DEVICE_PREFIX_ATTR(ppe, throttle_begin, 0600);</div><div class='del'>-static DEVICE_PREFIX_ATTR(ppe, throttle_full_stop, 0600);</div><div class='del'>-</div><div class='del'>-static struct attribute *ppe_attributes[] = {</div><div class='del'>-	&amp;attr_ppe_temperature0.attr,</div><div class='del'>-	&amp;attr_ppe_temperature1.attr,</div><div class='del'>-	&amp;attr_ppe_throttle_end.attr,</div><div class='del'>-	&amp;attr_ppe_throttle_begin.attr,</div><div class='del'>-	&amp;attr_ppe_throttle_full_stop.attr,</div><div class='del'>-	NULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct attribute_group ppe_attribute_group = {</div><div class='del'>-	.name	= "thermal",</div><div class='del'>-	.attrs	= ppe_attributes,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * initialize throttling with default values</div><div class='del'>- */</div><div class='del'>-static int __init init_default_values(void)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-	struct cbe_pmd_regs __iomem *pmd_regs;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	union ppe_spe_reg tpr;</div><div class='del'>-	union spe_reg str1;</div><div class='del'>-	u64 str2;</div><div class='del'>-	union spe_reg cr1;</div><div class='del'>-	u64 cr2;</div><div class='del'>-</div><div class='del'>-	/* TPR defaults */</div><div class='del'>-	/* ppe</div><div class='del'>-	 *	1F - no full stop</div><div class='del'>-	 *	08 - dynamic throttling starts if over 80 degrees</div><div class='del'>-	 *	03 - dynamic throttling ceases if below 70 degrees */</div><div class='del'>-	tpr.ppe = 0x1F0803;</div><div class='del'>-	/* spe</div><div class='del'>-	 *	10 - full stopped when over 96 degrees</div><div class='del'>-	 *	08 - dynamic throttling starts if over 80 degrees</div><div class='del'>-	 *	03 - dynamic throttling ceases if below 70 degrees</div><div class='del'>-	 */</div><div class='del'>-	tpr.spe = 0x100803;</div><div class='del'>-</div><div class='del'>-	/* STR defaults */</div><div class='del'>-	/* str1</div><div class='del'>-	 *	10 - stop 16 of 32 cycles</div><div class='del'>-	 */</div><div class='del'>-	str1.val = 0x1010101010101010ull;</div><div class='del'>-	/* str2</div><div class='del'>-	 *	10 - stop 16 of 32 cycles</div><div class='del'>-	 */</div><div class='del'>-	str2 = 0x10;</div><div class='del'>-</div><div class='del'>-	/* CR defaults */</div><div class='del'>-	/* cr1</div><div class='del'>-	 *	4 - normal operation</div><div class='del'>-	 */</div><div class='del'>-	cr1.val = 0x0404040404040404ull;</div><div class='del'>-	/* cr2</div><div class='del'>-	 *	4 - normal operation</div><div class='del'>-	 */</div><div class='del'>-	cr2 = 0x04;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu (cpu) {</div><div class='del'>-		pr_debug("processing cpu %d\n", cpu);</div><div class='del'>-		dev = get_cpu_device(cpu);</div><div class='del'>-</div><div class='del'>-		if (!dev) {</div><div class='del'>-			pr_info("invalid dev pointer for cbe_thermal\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pmd_regs = cbe_get_cpu_pmd_regs(dev-&gt;id);</div><div class='del'>-</div><div class='del'>-		if (!pmd_regs) {</div><div class='del'>-			pr_info("invalid CBE regs pointer for cbe_thermal\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		out_be64(&amp;pmd_regs-&gt;tm_str2, str2);</div><div class='del'>-		out_be64(&amp;pmd_regs-&gt;tm_str1.val, str1.val);</div><div class='del'>-		out_be64(&amp;pmd_regs-&gt;tm_tpr.val, tpr.val);</div><div class='del'>-		out_be64(&amp;pmd_regs-&gt;tm_cr1.val, cr1.val);</div><div class='del'>-		out_be64(&amp;pmd_regs-&gt;tm_cr2, cr2);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init thermal_init(void)</div><div class='del'>-{</div><div class='del'>-	int rc = init_default_values();</div><div class='del'>-</div><div class='del'>-	if (rc == 0) {</div><div class='del'>-		spu_add_dev_attr_group(&amp;spu_attribute_group);</div><div class='del'>-		cpu_add_dev_attr_group(&amp;ppe_attribute_group);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-module_init(thermal_init);</div><div class='del'>-</div><div class='del'>-static void __exit thermal_exit(void)</div><div class='del'>-{</div><div class='del'>-	spu_remove_dev_attr_group(&amp;spu_attribute_group);</div><div class='del'>-	cpu_remove_dev_attr_group(&amp;ppe_attribute_group);</div><div class='del'>-}</div><div class='del'>-module_exit(thermal_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Cell processor thermal driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Christian Krafft &lt;krafft@de.ibm.com&gt;");</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/cell.h b/arch/powerpc/platforms/cell/cell.h<br/>deleted file mode 100644<br/>index d5142e905ab3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/cell.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cell.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Cell Platform common data structures</div><div class='del'>- *</div><div class='del'>- * Copyright 2015, Daniel Axtens, IBM Corporation</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef CELL_H</div><div class='del'>-#define CELL_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct pci_controller_ops cell_pci_controller_ops;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/cpufreq_spudemand.c b/arch/powerpc/platforms/cell/cpufreq_spudemand.c<br/>deleted file mode 100644<br/>index 79172ba36eca..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/cpufreq_spudemand.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/cpufreq_spudemand.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,134 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * spu aware cpufreq governor for the cell processor</div><div class='del'>- *</div><div class='del'>- * © Copyright IBM Corporation 2006-2008</div><div class='del'>- *</div><div class='del'>- * Author: Christian Krafft &lt;krafft@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cpufreq.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/sched/loadavg.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/atomic.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-</div><div class='del'>-#define POLL_TIME	100000		/* in µs */</div><div class='del'>-#define EXP		753		/* exp(-1) in fixed-point */</div><div class='del'>-</div><div class='del'>-struct spu_gov_info_struct {</div><div class='del'>-	unsigned long busy_spus;	/* fixed-point */</div><div class='del'>-	struct cpufreq_policy *policy;</div><div class='del'>-	struct delayed_work work;</div><div class='del'>-	unsigned int poll_int;		/* µs */</div><div class='del'>-};</div><div class='del'>-static DEFINE_PER_CPU(struct spu_gov_info_struct, spu_gov_info);</div><div class='del'>-</div><div class='del'>-static int calc_freq(struct spu_gov_info_struct *info)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-	int busy_spus;</div><div class='del'>-</div><div class='del'>-	cpu = info-&gt;policy-&gt;cpu;</div><div class='del'>-	busy_spus = atomic_read(&amp;cbe_spu_info[cpu_to_node(cpu)].busy_spus);</div><div class='del'>-</div><div class='del'>-	info-&gt;busy_spus = calc_load(info-&gt;busy_spus, EXP, busy_spus * FIXED_1);</div><div class='del'>-	pr_debug("cpu %d: busy_spus=%d, info-&gt;busy_spus=%ld\n",</div><div class='del'>-			cpu, busy_spus, info-&gt;busy_spus);</div><div class='del'>-</div><div class='del'>-	return info-&gt;policy-&gt;max * info-&gt;busy_spus / FIXED_1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spu_gov_work(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct spu_gov_info_struct *info;</div><div class='del'>-	int delay;</div><div class='del'>-	unsigned long target_freq;</div><div class='del'>-</div><div class='del'>-	info = container_of(work, struct spu_gov_info_struct, work.work);</div><div class='del'>-</div><div class='del'>-	/* after cancel_delayed_work_sync we unset info-&gt;policy */</div><div class='del'>-	BUG_ON(info-&gt;policy == NULL);</div><div class='del'>-</div><div class='del'>-	target_freq = calc_freq(info);</div><div class='del'>-	__cpufreq_driver_target(info-&gt;policy, target_freq, CPUFREQ_RELATION_H);</div><div class='del'>-</div><div class='del'>-	delay = usecs_to_jiffies(info-&gt;poll_int);</div><div class='del'>-	schedule_delayed_work_on(info-&gt;policy-&gt;cpu, &amp;info-&gt;work, delay);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spu_gov_init_work(struct spu_gov_info_struct *info)</div><div class='del'>-{</div><div class='del'>-	int delay = usecs_to_jiffies(info-&gt;poll_int);</div><div class='del'>-	INIT_DEFERRABLE_WORK(&amp;info-&gt;work, spu_gov_work);</div><div class='del'>-	schedule_delayed_work_on(info-&gt;policy-&gt;cpu, &amp;info-&gt;work, delay);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spu_gov_cancel_work(struct spu_gov_info_struct *info)</div><div class='del'>-{</div><div class='del'>-	cancel_delayed_work_sync(&amp;info-&gt;work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spu_gov_start(struct cpufreq_policy *policy)</div><div class='del'>-{</div><div class='del'>-	unsigned int cpu = policy-&gt;cpu;</div><div class='del'>-	struct spu_gov_info_struct *info = &amp;per_cpu(spu_gov_info, cpu);</div><div class='del'>-	struct spu_gov_info_struct *affected_info;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!cpu_online(cpu)) {</div><div class='del'>-		printk(KERN_ERR "cpu %d is not online\n", cpu);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!policy-&gt;cur) {</div><div class='del'>-		printk(KERN_ERR "no cpu specified in policy\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* initialize spu_gov_info for all affected cpus */</div><div class='del'>-	for_each_cpu(i, policy-&gt;cpus) {</div><div class='del'>-		affected_info = &amp;per_cpu(spu_gov_info, i);</div><div class='del'>-		affected_info-&gt;policy = policy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	info-&gt;poll_int = POLL_TIME;</div><div class='del'>-</div><div class='del'>-	/* setup timer */</div><div class='del'>-	spu_gov_init_work(info);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spu_gov_stop(struct cpufreq_policy *policy)</div><div class='del'>-{</div><div class='del'>-	unsigned int cpu = policy-&gt;cpu;</div><div class='del'>-	struct spu_gov_info_struct *info = &amp;per_cpu(spu_gov_info, cpu);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* cancel timer */</div><div class='del'>-	spu_gov_cancel_work(info);</div><div class='del'>-</div><div class='del'>-	/* clean spu_gov_info for all affected cpus */</div><div class='del'>-	for_each_cpu (i, policy-&gt;cpus) {</div><div class='del'>-		info = &amp;per_cpu(spu_gov_info, i);</div><div class='del'>-		info-&gt;policy = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct cpufreq_governor spu_governor = {</div><div class='del'>-	.name = "spudemand",</div><div class='del'>-	.start = spu_gov_start,</div><div class='del'>-	.stop = spu_gov_stop,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-cpufreq_governor_init(spu_governor);</div><div class='del'>-cpufreq_governor_exit(spu_governor);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SPU-aware cpufreq governor for the cell processor");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Christian Krafft &lt;krafft@de.ibm.com&gt;");</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c<br/>deleted file mode 100644<br/>index 03ee8152ee97..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/interrupt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/interrupt.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,390 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cell Internal Interrupt Controller</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2006 Benjamin Herrenschmidt (benh@kernel.crashing.org)</div><div class='del'>- *                    IBM, Corp.</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *</div><div class='del'>- * Author: Arnd Bergmann &lt;arndb@de.ibm.com&gt;</div><div class='del'>- *</div><div class='del'>- * TODO:</div><div class='del'>- * - Fix various assumptions related to HW CPU numbers vs. linux CPU numbers</div><div class='del'>- *   vs node numbers in the setup code</div><div class='del'>- * - Implement proper handling of maxcpus=1/2 (that is, routing of irqs from</div><div class='del'>- *   a non-active node to the active node)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/percpu.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/kernel_stat.h&gt;</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-</div><div class='del'>-struct iic {</div><div class='del'>-	struct cbe_iic_thread_regs __iomem *regs;</div><div class='del'>-	u8 target_id;</div><div class='del'>-	u8 eoi_stack[16];</div><div class='del'>-	int eoi_ptr;</div><div class='del'>-	struct device_node *node;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_PER_CPU(struct iic, cpu_iic);</div><div class='del'>-#define IIC_NODE_COUNT	2</div><div class='del'>-static struct irq_domain *iic_host;</div><div class='del'>-</div><div class='del'>-/* Convert between "pending" bits and hw irq number */</div><div class='del'>-static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)</div><div class='del'>-{</div><div class='del'>-	unsigned char unit = bits.source &amp; 0xf;</div><div class='del'>-	unsigned char node = bits.source &gt;&gt; 4;</div><div class='del'>-	unsigned char class = bits.class &amp; 3;</div><div class='del'>-</div><div class='del'>-	/* Decode IPIs */</div><div class='del'>-	if (bits.flags &amp; CBE_IIC_IRQ_IPI)</div><div class='del'>-		return IIC_IRQ_TYPE_IPI | (bits.prio &gt;&gt; 4);</div><div class='del'>-	else</div><div class='del'>-		return (node &lt;&lt; IIC_IRQ_NODE_SHIFT) | (class &lt;&lt; 4) | unit;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iic_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iic_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iic_eoi(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct iic *iic = this_cpu_ptr(&amp;cpu_iic);</div><div class='del'>-	out_be64(&amp;iic-&gt;regs-&gt;prio, iic-&gt;eoi_stack[--iic-&gt;eoi_ptr]);</div><div class='del'>-	BUG_ON(iic-&gt;eoi_ptr &lt; 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip iic_chip = {</div><div class='del'>-	.name = "CELL-IIC",</div><div class='del'>-	.irq_mask = iic_mask,</div><div class='del'>-	.irq_unmask = iic_unmask,</div><div class='del'>-	.irq_eoi = iic_eoi,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void iic_ioexc_eoi(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iic_ioexc_cascade(struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='del'>-	struct cbe_iic_regs __iomem *node_iic =</div><div class='del'>-		(void __iomem *)irq_desc_get_handler_data(desc);</div><div class='del'>-	unsigned int irq = irq_desc_get_irq(desc);</div><div class='del'>-	unsigned int base = (irq &amp; 0xffffff00) | IIC_IRQ_TYPE_IOEXC;</div><div class='del'>-	unsigned long bits, ack;</div><div class='del'>-	int cascade;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		bits = in_be64(&amp;node_iic-&gt;iic_is);</div><div class='del'>-		if (bits == 0)</div><div class='del'>-			break;</div><div class='del'>-		/* pre-ack edge interrupts */</div><div class='del'>-		ack = bits &amp; IIC_ISR_EDGE_MASK;</div><div class='del'>-		if (ack)</div><div class='del'>-			out_be64(&amp;node_iic-&gt;iic_is, ack);</div><div class='del'>-		/* handle them */</div><div class='del'>-		for (cascade = 63; cascade &gt;= 0; cascade--)</div><div class='del'>-			if (bits &amp; (0x8000000000000000UL &gt;&gt; cascade))</div><div class='del'>-				generic_handle_domain_irq(iic_host,</div><div class='del'>-							  base | cascade);</div><div class='del'>-		/* post-ack level interrupts */</div><div class='del'>-		ack = bits &amp; ~IIC_ISR_EDGE_MASK;</div><div class='del'>-		if (ack)</div><div class='del'>-			out_be64(&amp;node_iic-&gt;iic_is, ack);</div><div class='del'>-	}</div><div class='del'>-	chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct irq_chip iic_ioexc_chip = {</div><div class='del'>-	.name = "CELL-IOEX",</div><div class='del'>-	.irq_mask = iic_mask,</div><div class='del'>-	.irq_unmask = iic_unmask,</div><div class='del'>-	.irq_eoi = iic_ioexc_eoi,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Get an IRQ number from the pending state register of the IIC */</div><div class='del'>-static unsigned int iic_get_irq(void)</div><div class='del'>-{</div><div class='del'>-	struct cbe_iic_pending_bits pending;</div><div class='del'>-	struct iic *iic;</div><div class='del'>-	unsigned int virq;</div><div class='del'>-</div><div class='del'>-	iic = this_cpu_ptr(&amp;cpu_iic);</div><div class='del'>-	*(unsigned long *) &amp;pending =</div><div class='del'>-		in_be64((u64 __iomem *) &amp;iic-&gt;regs-&gt;pending_destr);</div><div class='del'>-	if (!(pending.flags &amp; CBE_IIC_IRQ_VALID))</div><div class='del'>-		return 0;</div><div class='del'>-	virq = irq_linear_revmap(iic_host, iic_pending_to_hwnum(pending));</div><div class='del'>-	if (!virq)</div><div class='del'>-		return 0;</div><div class='del'>-	iic-&gt;eoi_stack[++iic-&gt;eoi_ptr] = pending.prio;</div><div class='del'>-	BUG_ON(iic-&gt;eoi_ptr &gt; 15);</div><div class='del'>-	return virq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iic_setup_cpu(void)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;this_cpu_ptr(&amp;cpu_iic)-&gt;regs-&gt;prio, 0xff);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 iic_get_target_id(int cpu)</div><div class='del'>-{</div><div class='del'>-	return per_cpu(cpu_iic, cpu).target_id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL_GPL(iic_get_target_id);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-/* Use the highest interrupt priorities for IPI */</div><div class='del'>-static inline int iic_msg_to_irq(int msg)</div><div class='del'>-{</div><div class='del'>-	return IIC_IRQ_TYPE_IPI + 0xf - msg;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iic_message_pass(int cpu, int msg)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;per_cpu(cpu_iic, cpu).regs-&gt;generate, (0xf - msg) &lt;&lt; 4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iic_request_ipi(int msg)</div><div class='del'>-{</div><div class='del'>-	int virq;</div><div class='del'>-</div><div class='del'>-	virq = irq_create_mapping(iic_host, iic_msg_to_irq(msg));</div><div class='del'>-	if (!virq) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-		       "iic: failed to map IPI %s\n", smp_ipi_name[msg]);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If smp_request_message_ipi encounters an error it will notify</div><div class='del'>-	 * the error.  If a message is not needed it will return non-zero.</div><div class='del'>-	 */</div><div class='del'>-	if (smp_request_message_ipi(virq, msg))</div><div class='del'>-		irq_dispose_mapping(virq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iic_request_IPIs(void)</div><div class='del'>-{</div><div class='del'>-	iic_request_ipi(PPC_MSG_CALL_FUNCTION);</div><div class='del'>-	iic_request_ipi(PPC_MSG_RESCHEDULE);</div><div class='del'>-	iic_request_ipi(PPC_MSG_TICK_BROADCAST);</div><div class='del'>-	iic_request_ipi(PPC_MSG_NMI_IPI);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int iic_host_match(struct irq_domain *h, struct device_node *node,</div><div class='del'>-			  enum irq_domain_bus_token bus_token)</div><div class='del'>-{</div><div class='del'>-	return of_device_is_compatible(node,</div><div class='del'>-				    "IBM,CBEA-Internal-Interrupt-Controller");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int iic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='del'>-			irq_hw_number_t hw)</div><div class='del'>-{</div><div class='del'>-	switch (hw &amp; IIC_IRQ_TYPE_MASK) {</div><div class='del'>-	case IIC_IRQ_TYPE_IPI:</div><div class='del'>-		irq_set_chip_and_handler(virq, &amp;iic_chip, handle_percpu_irq);</div><div class='del'>-		break;</div><div class='del'>-	case IIC_IRQ_TYPE_IOEXC:</div><div class='del'>-		irq_set_chip_and_handler(virq, &amp;iic_ioexc_chip,</div><div class='del'>-					 handle_edge_eoi_irq);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		irq_set_chip_and_handler(virq, &amp;iic_chip, handle_edge_eoi_irq);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int iic_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='del'>-			   const u32 *intspec, unsigned int intsize,</div><div class='del'>-			   irq_hw_number_t *out_hwirq, unsigned int *out_flags)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	unsigned int node, ext, unit, class;</div><div class='del'>-	const u32 *val;</div><div class='del'>-</div><div class='del'>-	if (!of_device_is_compatible(ct,</div><div class='del'>-				     "IBM,CBEA-Internal-Interrupt-Controller"))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	if (intsize != 1)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	val = of_get_property(ct, "#interrupt-cells", NULL);</div><div class='del'>-	if (val == NULL || *val != 1)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	node = intspec[0] &gt;&gt; 24;</div><div class='del'>-	ext = (intspec[0] &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-	class = (intspec[0] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	unit = intspec[0] &amp; 0xff;</div><div class='del'>-</div><div class='del'>-	/* Check if node is in supported range */</div><div class='del'>-	if (node &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* Build up interrupt number, special case for IO exceptions */</div><div class='del'>-	*out_hwirq = (node &lt;&lt; IIC_IRQ_NODE_SHIFT);</div><div class='del'>-	if (unit == IIC_UNIT_IIC &amp;&amp; class == 1)</div><div class='del'>-		*out_hwirq |= IIC_IRQ_TYPE_IOEXC | ext;</div><div class='del'>-	else</div><div class='del'>-		*out_hwirq |= IIC_IRQ_TYPE_NORMAL |</div><div class='del'>-			(class &lt;&lt; IIC_IRQ_CLASS_SHIFT) | unit;</div><div class='del'>-</div><div class='del'>-	/* Dummy flags, ignored by iic code */</div><div class='del'>-	*out_flags = IRQ_TYPE_EDGE_RISING;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops iic_host_ops = {</div><div class='del'>-	.match = iic_host_match,</div><div class='del'>-	.map = iic_host_map,</div><div class='del'>-	.xlate = iic_host_xlate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr,</div><div class='del'>-				struct device_node *node)</div><div class='del'>-{</div><div class='del'>-	/* XXX FIXME: should locate the linux CPU number from the HW cpu</div><div class='del'>-	 * number properly. We are lucky for now</div><div class='del'>-	 */</div><div class='del'>-	struct iic *iic = &amp;per_cpu(cpu_iic, hw_cpu);</div><div class='del'>-</div><div class='del'>-	iic-&gt;regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs));</div><div class='del'>-	BUG_ON(iic-&gt;regs == NULL);</div><div class='del'>-</div><div class='del'>-	iic-&gt;target_id = ((hw_cpu &amp; 2) &lt;&lt; 3) | ((hw_cpu &amp; 1) ? 0xf : 0xe);</div><div class='del'>-	iic-&gt;eoi_stack[0] = 0xff;</div><div class='del'>-	iic-&gt;node = of_node_get(node);</div><div class='del'>-	out_be64(&amp;iic-&gt;regs-&gt;prio, 0);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "IIC for CPU %d target id 0x%x : %pOF\n",</div><div class='del'>-	       hw_cpu, iic-&gt;target_id, node);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init setup_iic(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	struct resource r0, r1;</div><div class='del'>-	unsigned int node, cascade, found = 0;</div><div class='del'>-	struct cbe_iic_regs __iomem *node_iic;</div><div class='del'>-	const u32 *np;</div><div class='del'>-</div><div class='del'>-	for_each_node_by_name(dn, "interrupt-controller") {</div><div class='del'>-		if (!of_device_is_compatible(dn,</div><div class='del'>-				     "IBM,CBEA-Internal-Interrupt-Controller"))</div><div class='del'>-			continue;</div><div class='del'>-		np = of_get_property(dn, "ibm,interrupt-server-ranges", NULL);</div><div class='del'>-		if (np == NULL) {</div><div class='del'>-			printk(KERN_WARNING "IIC: CPU association not found\n");</div><div class='del'>-			of_node_put(dn);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		if (of_address_to_resource(dn, 0, &amp;r0) ||</div><div class='del'>-		    of_address_to_resource(dn, 1, &amp;r1)) {</div><div class='del'>-			printk(KERN_WARNING "IIC: Can't resolve addresses\n");</div><div class='del'>-			of_node_put(dn);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		found++;</div><div class='del'>-		init_one_iic(np[0], r0.start, dn);</div><div class='del'>-		init_one_iic(np[1], r1.start, dn);</div><div class='del'>-</div><div class='del'>-		/* Setup cascade for IO exceptions. XXX cleanup tricks to get</div><div class='del'>-		 * node vs CPU etc...</div><div class='del'>-		 * Note that we configure the IIC_IRR here with a hard coded</div><div class='del'>-		 * priority of 1. We might want to improve that later.</div><div class='del'>-		 */</div><div class='del'>-		node = np[0] &gt;&gt; 1;</div><div class='del'>-		node_iic = cbe_get_cpu_iic_regs(np[0]);</div><div class='del'>-		cascade = node &lt;&lt; IIC_IRQ_NODE_SHIFT;</div><div class='del'>-		cascade |= 1 &lt;&lt; IIC_IRQ_CLASS_SHIFT;</div><div class='del'>-		cascade |= IIC_UNIT_IIC;</div><div class='del'>-		cascade = irq_create_mapping(iic_host, cascade);</div><div class='del'>-		if (!cascade)</div><div class='del'>-			continue;</div><div class='del'>-		/*</div><div class='del'>-		 * irq_data is a generic pointer that gets passed back</div><div class='del'>-		 * to us later, so the forced cast is fine.</div><div class='del'>-		 */</div><div class='del'>-		irq_set_handler_data(cascade, (void __force *)node_iic);</div><div class='del'>-		irq_set_chained_handler(cascade, iic_ioexc_cascade);</div><div class='del'>-		out_be64(&amp;node_iic-&gt;iic_ir,</div><div class='del'>-			 (1 &lt;&lt; 12)		/* priority */ |</div><div class='del'>-			 (node &lt;&lt; 4)		/* dest node */ |</div><div class='del'>-			 IIC_UNIT_THREAD_0	/* route them to thread 0 */);</div><div class='del'>-		/* Flush pending (make sure it triggers if there is</div><div class='del'>-		 * anything pending</div><div class='del'>-		 */</div><div class='del'>-		out_be64(&amp;node_iic-&gt;iic_is, 0xfffffffffffffffful);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (found)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init iic_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	/* Setup an irq host data structure */</div><div class='del'>-	iic_host = irq_domain_add_linear(NULL, IIC_SOURCE_COUNT, &amp;iic_host_ops,</div><div class='del'>-					 NULL);</div><div class='del'>-	BUG_ON(iic_host == NULL);</div><div class='del'>-	irq_set_default_host(iic_host);</div><div class='del'>-</div><div class='del'>-	/* Discover and initialize iics */</div><div class='del'>-	if (setup_iic() &lt; 0)</div><div class='del'>-		panic("IIC: Failed to initialize !\n");</div><div class='del'>-</div><div class='del'>-	/* Set master interrupt handling function */</div><div class='del'>-	ppc_md.get_irq = iic_get_irq;</div><div class='del'>-</div><div class='del'>-	/* Enable on current CPU */</div><div class='del'>-	iic_setup_cpu();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iic_set_interrupt_routing(int cpu, int thread, int priority)</div><div class='del'>-{</div><div class='del'>-	struct cbe_iic_regs __iomem *iic_regs = cbe_get_cpu_iic_regs(cpu);</div><div class='del'>-	u64 iic_ir = 0;</div><div class='del'>-	int node = cpu &gt;&gt; 1;</div><div class='del'>-</div><div class='del'>-	/* Set which node and thread will handle the next interrupt */</div><div class='del'>-	iic_ir |= CBE_IIC_IR_PRIO(priority) |</div><div class='del'>-		  CBE_IIC_IR_DEST_NODE(node);</div><div class='del'>-	if (thread == 0)</div><div class='del'>-		iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_0);</div><div class='del'>-	else</div><div class='del'>-		iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_1);</div><div class='del'>-	out_be64(&amp;iic_regs-&gt;iic_ir, iic_ir);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/interrupt.h b/arch/powerpc/platforms/cell/interrupt.h<br/>deleted file mode 100644<br/>index a47902248541..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/interrupt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/interrupt.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,90 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef ASM_CELL_PIC_H</div><div class='del'>-#define ASM_CELL_PIC_H</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-/*</div><div class='del'>- * Mapping of IIC pending bits into per-node interrupt numbers.</div><div class='del'>- *</div><div class='del'>- * Interrupt numbers are in the range 0...0x1ff where the top bit</div><div class='del'>- * (0x100) represent the source node. Only 2 nodes are supported with</div><div class='del'>- * the current code though it's trivial to extend that if necessary using</div><div class='del'>- * higher level bits</div><div class='del'>- *</div><div class='del'>- * The bottom 8 bits are split into 2 type bits and 6 data bits that</div><div class='del'>- * depend on the type:</div><div class='del'>- *</div><div class='del'>- * 00 (0x00 | data) : normal interrupt. data is (class &lt;&lt; 4) | source</div><div class='del'>- * 01 (0x40 | data) : IO exception. data is the exception number as</div><div class='del'>- *                    defined by bit numbers in IIC_SR</div><div class='del'>- * 10 (0x80 | data) : IPI. data is the IPI number (obtained from the priority)</div><div class='del'>- *                    and node is always 0 (IPIs are per-cpu, their source is</div><div class='del'>- *                    not relevant)</div><div class='del'>- * 11 (0xc0 | data) : reserved</div><div class='del'>- *</div><div class='del'>- * In addition, interrupt number 0x80000000 is defined as always invalid</div><div class='del'>- * (that is the node field is expected to never extend to move than 23 bits)</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	IIC_IRQ_INVALID		= 0x80000000u,</div><div class='del'>-	IIC_IRQ_NODE_MASK	= 0x100,</div><div class='del'>-	IIC_IRQ_NODE_SHIFT	= 8,</div><div class='del'>-	IIC_IRQ_MAX		= 0x1ff,</div><div class='del'>-	IIC_IRQ_TYPE_MASK	= 0xc0,</div><div class='del'>-	IIC_IRQ_TYPE_NORMAL	= 0x00,</div><div class='del'>-	IIC_IRQ_TYPE_IOEXC	= 0x40,</div><div class='del'>-	IIC_IRQ_TYPE_IPI	= 0x80,</div><div class='del'>-	IIC_IRQ_CLASS_SHIFT	= 4,</div><div class='del'>-	IIC_IRQ_CLASS_0		= 0x00,</div><div class='del'>-	IIC_IRQ_CLASS_1		= 0x10,</div><div class='del'>-	IIC_IRQ_CLASS_2		= 0x20,</div><div class='del'>-	IIC_SOURCE_COUNT	= 0x200,</div><div class='del'>-</div><div class='del'>-	/* Here are defined the various source/dest units. Avoid using those</div><div class='del'>-	 * definitions if you can, they are mostly here for reference</div><div class='del'>-	 */</div><div class='del'>-	IIC_UNIT_SPU_0		= 0x4,</div><div class='del'>-	IIC_UNIT_SPU_1		= 0x7,</div><div class='del'>-	IIC_UNIT_SPU_2		= 0x3,</div><div class='del'>-	IIC_UNIT_SPU_3		= 0x8,</div><div class='del'>-	IIC_UNIT_SPU_4		= 0x2,</div><div class='del'>-	IIC_UNIT_SPU_5		= 0x9,</div><div class='del'>-	IIC_UNIT_SPU_6		= 0x1,</div><div class='del'>-	IIC_UNIT_SPU_7		= 0xa,</div><div class='del'>-	IIC_UNIT_IOC_0		= 0x0,</div><div class='del'>-	IIC_UNIT_IOC_1		= 0xb,</div><div class='del'>-	IIC_UNIT_THREAD_0	= 0xe, /* target only */</div><div class='del'>-	IIC_UNIT_THREAD_1	= 0xf, /* target only */</div><div class='del'>-	IIC_UNIT_IIC		= 0xe, /* source only (IO exceptions) */</div><div class='del'>-</div><div class='del'>-	/* Base numbers for the external interrupts */</div><div class='del'>-	IIC_IRQ_EXT_IOIF0	=</div><div class='del'>-		IIC_IRQ_TYPE_NORMAL | IIC_IRQ_CLASS_2 | IIC_UNIT_IOC_0,</div><div class='del'>-	IIC_IRQ_EXT_IOIF1	=</div><div class='del'>-		IIC_IRQ_TYPE_NORMAL | IIC_IRQ_CLASS_2 | IIC_UNIT_IOC_1,</div><div class='del'>-</div><div class='del'>-	/* Base numbers for the IIC_ISR interrupts */</div><div class='del'>-	IIC_IRQ_IOEX_TMI	= IIC_IRQ_TYPE_IOEXC | IIC_IRQ_CLASS_1 | 63,</div><div class='del'>-	IIC_IRQ_IOEX_PMI	= IIC_IRQ_TYPE_IOEXC | IIC_IRQ_CLASS_1 | 62,</div><div class='del'>-	IIC_IRQ_IOEX_ATI	= IIC_IRQ_TYPE_IOEXC | IIC_IRQ_CLASS_1 | 61,</div><div class='del'>-	IIC_IRQ_IOEX_MATBFI	= IIC_IRQ_TYPE_IOEXC | IIC_IRQ_CLASS_1 | 60,</div><div class='del'>-	IIC_IRQ_IOEX_ELDI	= IIC_IRQ_TYPE_IOEXC | IIC_IRQ_CLASS_1 | 59,</div><div class='del'>-</div><div class='del'>-	/* Which bits in IIC_ISR are edge sensitive */</div><div class='del'>-	IIC_ISR_EDGE_MASK	= 0x4ul,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern void iic_init_IRQ(void);</div><div class='del'>-extern void iic_message_pass(int cpu, int msg);</div><div class='del'>-extern void iic_request_IPIs(void);</div><div class='del'>-extern void iic_setup_cpu(void);</div><div class='del'>-</div><div class='del'>-extern u8 iic_get_target_id(int cpu);</div><div class='del'>-</div><div class='del'>-extern void spider_init_IRQ(void);</div><div class='del'>-</div><div class='del'>-extern void iic_set_interrupt_routing(int cpu, int thread, int priority);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-#endif /* ASM_CELL_PIC_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c<br/>deleted file mode 100644<br/>index 4cd9c0de22c2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/iommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/iommu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1077 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * IOMMU implementation for Cell Broadband Processor Architecture</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corporation 2006-2008</div><div class='del'>- *</div><div class='del'>- * Author: Jeremy Kerr &lt;jk@ozlabs.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='del'>-#include &lt;linux/notifier.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/prom.h&gt;</div><div class='del'>-#include &lt;asm/iommu.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/firmware.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "cell.h"</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-</div><div class='del'>-/* Define CELL_IOMMU_REAL_UNMAP to actually unmap non-used pages</div><div class='del'>- * instead of leaving them mapped to some dummy page. This can be</div><div class='del'>- * enabled once the appropriate workarounds for spider bugs have</div><div class='del'>- * been enabled</div><div class='del'>- */</div><div class='del'>-#define CELL_IOMMU_REAL_UNMAP</div><div class='del'>-</div><div class='del'>-/* Define CELL_IOMMU_STRICT_PROTECTION to enforce protection of</div><div class='del'>- * IO PTEs based on the transfer direction. That can be enabled</div><div class='del'>- * once spider-net has been fixed to pass the correct direction</div><div class='del'>- * to the DMA mapping functions</div><div class='del'>- */</div><div class='del'>-#define CELL_IOMMU_STRICT_PROTECTION</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define NR_IOMMUS			2</div><div class='del'>-</div><div class='del'>-/* IOC mmap registers */</div><div class='del'>-#define IOC_Reg_Size			0x2000</div><div class='del'>-</div><div class='del'>-#define IOC_IOPT_CacheInvd		0x908</div><div class='del'>-#define IOC_IOPT_CacheInvd_NE_Mask	0xffe0000000000000ul</div><div class='del'>-#define IOC_IOPT_CacheInvd_IOPTE_Mask	0x000003fffffffff8ul</div><div class='del'>-#define IOC_IOPT_CacheInvd_Busy		0x0000000000000001ul</div><div class='del'>-</div><div class='del'>-#define IOC_IOST_Origin			0x918</div><div class='del'>-#define IOC_IOST_Origin_E		0x8000000000000000ul</div><div class='del'>-#define IOC_IOST_Origin_HW		0x0000000000000800ul</div><div class='del'>-#define IOC_IOST_Origin_HL		0x0000000000000400ul</div><div class='del'>-</div><div class='del'>-#define IOC_IO_ExcpStat			0x920</div><div class='del'>-#define IOC_IO_ExcpStat_V		0x8000000000000000ul</div><div class='del'>-#define IOC_IO_ExcpStat_SPF_Mask	0x6000000000000000ul</div><div class='del'>-#define IOC_IO_ExcpStat_SPF_S		0x6000000000000000ul</div><div class='del'>-#define IOC_IO_ExcpStat_SPF_P		0x2000000000000000ul</div><div class='del'>-#define IOC_IO_ExcpStat_ADDR_Mask	0x00000007fffff000ul</div><div class='del'>-#define IOC_IO_ExcpStat_RW_Mask		0x0000000000000800ul</div><div class='del'>-#define IOC_IO_ExcpStat_IOID_Mask	0x00000000000007fful</div><div class='del'>-</div><div class='del'>-#define IOC_IO_ExcpMask			0x928</div><div class='del'>-#define IOC_IO_ExcpMask_SFE		0x4000000000000000ul</div><div class='del'>-#define IOC_IO_ExcpMask_PFE		0x2000000000000000ul</div><div class='del'>-</div><div class='del'>-#define IOC_IOCmd_Offset		0x1000</div><div class='del'>-</div><div class='del'>-#define IOC_IOCmd_Cfg			0xc00</div><div class='del'>-#define IOC_IOCmd_Cfg_TE		0x0000800000000000ul</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Segment table entries */</div><div class='del'>-#define IOSTE_V			0x8000000000000000ul /* valid */</div><div class='del'>-#define IOSTE_H			0x4000000000000000ul /* cache hint */</div><div class='del'>-#define IOSTE_PT_Base_RPN_Mask  0x3ffffffffffff000ul /* base RPN of IOPT */</div><div class='del'>-#define IOSTE_NPPT_Mask		0x0000000000000fe0ul /* no. pages in IOPT */</div><div class='del'>-#define IOSTE_PS_Mask		0x0000000000000007ul /* page size */</div><div class='del'>-#define IOSTE_PS_4K		0x0000000000000001ul /*   - 4kB  */</div><div class='del'>-#define IOSTE_PS_64K		0x0000000000000003ul /*   - 64kB */</div><div class='del'>-#define IOSTE_PS_1M		0x0000000000000005ul /*   - 1MB  */</div><div class='del'>-#define IOSTE_PS_16M		0x0000000000000007ul /*   - 16MB */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* IOMMU sizing */</div><div class='del'>-#define IO_SEGMENT_SHIFT	28</div><div class='del'>-#define IO_PAGENO_BITS(shift)	(IO_SEGMENT_SHIFT - (shift))</div><div class='del'>-</div><div class='del'>-/* The high bit needs to be set on every DMA address */</div><div class='del'>-#define SPIDER_DMA_OFFSET	0x80000000ul</div><div class='del'>-</div><div class='del'>-struct iommu_window {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	struct cbe_iommu *iommu;</div><div class='del'>-	unsigned long offset;</div><div class='del'>-	unsigned long size;</div><div class='del'>-	unsigned int ioid;</div><div class='del'>-	struct iommu_table table;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAMESIZE 8</div><div class='del'>-struct cbe_iommu {</div><div class='del'>-	int nid;</div><div class='del'>-	char name[NAMESIZE];</div><div class='del'>-	void __iomem *xlate_regs;</div><div class='del'>-	void __iomem *cmd_regs;</div><div class='del'>-	unsigned long *stab;</div><div class='del'>-	unsigned long *ptab;</div><div class='del'>-	void *pad_page;</div><div class='del'>-	struct list_head windows;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Static array of iommus, one per node</div><div class='del'>- *   each contains a list of windows, keyed from dma_window property</div><div class='del'>- *   - on bus setup, look for a matching window, or create one</div><div class='del'>- *   - on dev setup, assign iommu_table ptr</div><div class='del'>- */</div><div class='del'>-static struct cbe_iommu iommus[NR_IOMMUS];</div><div class='del'>-static int cbe_nr_iommus;</div><div class='del'>-</div><div class='del'>-static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte,</div><div class='del'>-		long n_ptes)</div><div class='del'>-{</div><div class='del'>-	u64 __iomem *reg;</div><div class='del'>-	u64 val;</div><div class='del'>-	long n;</div><div class='del'>-</div><div class='del'>-	reg = iommu-&gt;xlate_regs + IOC_IOPT_CacheInvd;</div><div class='del'>-</div><div class='del'>-	while (n_ptes &gt; 0) {</div><div class='del'>-		/* we can invalidate up to 1 &lt;&lt; 11 PTEs at once */</div><div class='del'>-		n = min(n_ptes, 1l &lt;&lt; 11);</div><div class='del'>-		val = (((n /*- 1*/) &lt;&lt; 53) &amp; IOC_IOPT_CacheInvd_NE_Mask)</div><div class='del'>-			| (__pa(pte) &amp; IOC_IOPT_CacheInvd_IOPTE_Mask)</div><div class='del'>-		        | IOC_IOPT_CacheInvd_Busy;</div><div class='del'>-</div><div class='del'>-		out_be64(reg, val);</div><div class='del'>-		while (in_be64(reg) &amp; IOC_IOPT_CacheInvd_Busy)</div><div class='del'>-			;</div><div class='del'>-</div><div class='del'>-		n_ptes -= n;</div><div class='del'>-		pte += n;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tce_build_cell(struct iommu_table *tbl, long index, long npages,</div><div class='del'>-		unsigned long uaddr, enum dma_data_direction direction,</div><div class='del'>-		unsigned long attrs)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long *io_pte, base_pte;</div><div class='del'>-	struct iommu_window *window =</div><div class='del'>-		container_of(tbl, struct iommu_window, table);</div><div class='del'>-</div><div class='del'>-	/* implementing proper protection causes problems with the spidernet</div><div class='del'>-	 * driver - check mapping directions later, but allow read &amp; write by</div><div class='del'>-	 * default for now.*/</div><div class='del'>-#ifdef CELL_IOMMU_STRICT_PROTECTION</div><div class='del'>-	/* to avoid referencing a global, we use a trick here to setup the</div><div class='del'>-	 * protection bit. "prot" is setup to be 3 fields of 4 bits appended</div><div class='del'>-	 * together for each of the 3 supported direction values. It is then</div><div class='del'>-	 * shifted left so that the fields matching the desired direction</div><div class='del'>-	 * lands on the appropriate bits, and other bits are masked out.</div><div class='del'>-	 */</div><div class='del'>-	const unsigned long prot = 0xc48;</div><div class='del'>-	base_pte =</div><div class='del'>-		((prot &lt;&lt; (52 + 4 * direction)) &amp;</div><div class='del'>-		 (CBE_IOPTE_PP_W | CBE_IOPTE_PP_R)) |</div><div class='del'>-		CBE_IOPTE_M | CBE_IOPTE_SO_RW |</div><div class='del'>-		(window-&gt;ioid &amp; CBE_IOPTE_IOID_Mask);</div><div class='del'>-#else</div><div class='del'>-	base_pte = CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M |</div><div class='del'>-		CBE_IOPTE_SO_RW | (window-&gt;ioid &amp; CBE_IOPTE_IOID_Mask);</div><div class='del'>-#endif</div><div class='del'>-	if (unlikely(attrs &amp; DMA_ATTR_WEAK_ORDERING))</div><div class='del'>-		base_pte &amp;= ~CBE_IOPTE_SO_RW;</div><div class='del'>-</div><div class='del'>-	io_pte = (unsigned long *)tbl-&gt;it_base + (index - tbl-&gt;it_offset);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; npages; i++, uaddr += (1 &lt;&lt; tbl-&gt;it_page_shift))</div><div class='del'>-		io_pte[i] = base_pte | (__pa(uaddr) &amp; CBE_IOPTE_RPN_Mask);</div><div class='del'>-</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	invalidate_tce_cache(window-&gt;iommu, io_pte, npages);</div><div class='del'>-</div><div class='del'>-	pr_debug("tce_build_cell(index=%lx,n=%lx,dir=%d,base_pte=%lx)\n",</div><div class='del'>-		 index, npages, direction, base_pte);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tce_free_cell(struct iommu_table *tbl, long index, long npages)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long *io_pte, pte;</div><div class='del'>-	struct iommu_window *window =</div><div class='del'>-		container_of(tbl, struct iommu_window, table);</div><div class='del'>-</div><div class='del'>-	pr_debug("tce_free_cell(index=%lx,n=%lx)\n", index, npages);</div><div class='del'>-</div><div class='del'>-#ifdef CELL_IOMMU_REAL_UNMAP</div><div class='del'>-	pte = 0;</div><div class='del'>-#else</div><div class='del'>-	/* spider bridge does PCI reads after freeing - insert a mapping</div><div class='del'>-	 * to a scratch page instead of an invalid entry */</div><div class='del'>-	pte = CBE_IOPTE_PP_R | CBE_IOPTE_M | CBE_IOPTE_SO_RW |</div><div class='del'>-		__pa(window-&gt;iommu-&gt;pad_page) |</div><div class='del'>-		(window-&gt;ioid &amp; CBE_IOPTE_IOID_Mask);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	io_pte = (unsigned long *)tbl-&gt;it_base + (index - tbl-&gt;it_offset);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; npages; i++)</div><div class='del'>-		io_pte[i] = pte;</div><div class='del'>-</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	invalidate_tce_cache(window-&gt;iommu, io_pte, npages);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t ioc_interrupt(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	unsigned long stat, spf;</div><div class='del'>-	struct cbe_iommu *iommu = data;</div><div class='del'>-</div><div class='del'>-	stat = in_be64(iommu-&gt;xlate_regs + IOC_IO_ExcpStat);</div><div class='del'>-	spf = stat &amp; IOC_IO_ExcpStat_SPF_Mask;</div><div class='del'>-</div><div class='del'>-	/* Might want to rate limit it */</div><div class='del'>-	printk(KERN_ERR "iommu: DMA exception 0x%016lx\n", stat);</div><div class='del'>-	printk(KERN_ERR "  V=%d, SPF=[%c%c], RW=%s, IOID=0x%04x\n",</div><div class='del'>-	       !!(stat &amp; IOC_IO_ExcpStat_V),</div><div class='del'>-	       (spf == IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ',</div><div class='del'>-	       (spf == IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ',</div><div class='del'>-	       (stat &amp; IOC_IO_ExcpStat_RW_Mask) ? "Read" : "Write",</div><div class='del'>-	       (unsigned int)(stat &amp; IOC_IO_ExcpStat_IOID_Mask));</div><div class='del'>-	printk(KERN_ERR "  page=0x%016lx\n",</div><div class='del'>-	       stat &amp; IOC_IO_ExcpStat_ADDR_Mask);</div><div class='del'>-</div><div class='del'>-	/* clear interrupt */</div><div class='del'>-	stat &amp;= ~IOC_IO_ExcpStat_V;</div><div class='del'>-	out_be64(iommu-&gt;xlate_regs + IOC_IO_ExcpStat, stat);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cell_iommu_find_ioc(int nid, unsigned long *base)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	struct resource r;</div><div class='del'>-</div><div class='del'>-	*base = 0;</div><div class='del'>-</div><div class='del'>-	/* First look for new style /be nodes */</div><div class='del'>-	for_each_node_by_name(np, "ioc") {</div><div class='del'>-		if (of_node_to_nid(np) != nid)</div><div class='del'>-			continue;</div><div class='del'>-		if (of_address_to_resource(np, 0, &amp;r)) {</div><div class='del'>-			printk(KERN_ERR "iommu: can't get address for %pOF\n",</div><div class='del'>-			       np);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		*base = r.start;</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Ok, let's try the old way */</div><div class='del'>-	for_each_node_by_type(np, "cpu") {</div><div class='del'>-		const unsigned int *nidp;</div><div class='del'>-		const unsigned long *tmp;</div><div class='del'>-</div><div class='del'>-		nidp = of_get_property(np, "node-id", NULL);</div><div class='del'>-		if (nidp &amp;&amp; *nidp == nid) {</div><div class='del'>-			tmp = of_get_property(np, "ioc-translation", NULL);</div><div class='del'>-			if (tmp) {</div><div class='del'>-				*base = *tmp;</div><div class='del'>-				of_node_put(np);</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_iommu_setup_stab(struct cbe_iommu *iommu,</div><div class='del'>-				unsigned long dbase, unsigned long dsize,</div><div class='del'>-				unsigned long fbase, unsigned long fsize)</div><div class='del'>-{</div><div class='del'>-	struct page *page;</div><div class='del'>-	unsigned long segments, stab_size;</div><div class='del'>-</div><div class='del'>-	segments = max(dbase + dsize, fbase + fsize) &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: iommu[%d]: segments: %lu\n",</div><div class='del'>-			__func__, iommu-&gt;nid, segments);</div><div class='del'>-</div><div class='del'>-	/* set up the segment table */</div><div class='del'>-	stab_size = segments * sizeof(unsigned long);</div><div class='del'>-	page = alloc_pages_node(iommu-&gt;nid, GFP_KERNEL, get_order(stab_size));</div><div class='del'>-	BUG_ON(!page);</div><div class='del'>-	iommu-&gt;stab = page_address(page);</div><div class='del'>-	memset(iommu-&gt;stab, 0, stab_size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long *__init cell_iommu_alloc_ptab(struct cbe_iommu *iommu,</div><div class='del'>-		unsigned long base, unsigned long size, unsigned long gap_base,</div><div class='del'>-		unsigned long gap_size, unsigned long page_shift)</div><div class='del'>-{</div><div class='del'>-	struct page *page;</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long reg, segments, pages_per_segment, ptab_size,</div><div class='del'>-		      n_pte_pages, start_seg, *ptab;</div><div class='del'>-</div><div class='del'>-	start_seg = base &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-	segments  = size &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-	pages_per_segment = 1ull &lt;&lt; IO_PAGENO_BITS(page_shift);</div><div class='del'>-	/* PTEs for each segment must start on a 4K boundary */</div><div class='del'>-	pages_per_segment = max(pages_per_segment,</div><div class='del'>-				(1 &lt;&lt; 12) / sizeof(unsigned long));</div><div class='del'>-</div><div class='del'>-	ptab_size = segments * pages_per_segment * sizeof(unsigned long);</div><div class='del'>-	pr_debug("%s: iommu[%d]: ptab_size: %lu, order: %d\n", __func__,</div><div class='del'>-			iommu-&gt;nid, ptab_size, get_order(ptab_size));</div><div class='del'>-	page = alloc_pages_node(iommu-&gt;nid, GFP_KERNEL, get_order(ptab_size));</div><div class='del'>-	BUG_ON(!page);</div><div class='del'>-</div><div class='del'>-	ptab = page_address(page);</div><div class='del'>-	memset(ptab, 0, ptab_size);</div><div class='del'>-</div><div class='del'>-	/* number of 4K pages needed for a page table */</div><div class='del'>-	n_pte_pages = (pages_per_segment * sizeof(unsigned long)) &gt;&gt; 12;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: iommu[%d]: stab at %p, ptab at %p, n_pte_pages: %lu\n",</div><div class='del'>-			__func__, iommu-&gt;nid, iommu-&gt;stab, ptab,</div><div class='del'>-			n_pte_pages);</div><div class='del'>-</div><div class='del'>-	/* initialise the STEs */</div><div class='del'>-	reg = IOSTE_V | ((n_pte_pages - 1) &lt;&lt; 5);</div><div class='del'>-</div><div class='del'>-	switch (page_shift) {</div><div class='del'>-	case 12: reg |= IOSTE_PS_4K;  break;</div><div class='del'>-	case 16: reg |= IOSTE_PS_64K; break;</div><div class='del'>-	case 20: reg |= IOSTE_PS_1M;  break;</div><div class='del'>-	case 24: reg |= IOSTE_PS_16M; break;</div><div class='del'>-	default: BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gap_base = gap_base &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-	gap_size = gap_size &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-</div><div class='del'>-	pr_debug("Setting up IOMMU stab:\n");</div><div class='del'>-	for (i = start_seg; i &lt; (start_seg + segments); i++) {</div><div class='del'>-		if (i &gt;= gap_base &amp;&amp; i &lt; (gap_base + gap_size)) {</div><div class='del'>-			pr_debug("\toverlap at %d, skipping\n", i);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		iommu-&gt;stab[i] = reg | (__pa(ptab) + (n_pte_pages &lt;&lt; 12) *</div><div class='del'>-					(i - start_seg));</div><div class='del'>-		pr_debug("\t[%d] 0x%016lx\n", i, iommu-&gt;stab[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ptab;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_iommu_enable_hardware(struct cbe_iommu *iommu)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned long reg, xlate_base;</div><div class='del'>-	unsigned int virq;</div><div class='del'>-</div><div class='del'>-	if (cell_iommu_find_ioc(iommu-&gt;nid, &amp;xlate_base))</div><div class='del'>-		panic("%s: missing IOC register mappings for node %d\n",</div><div class='del'>-		      __func__, iommu-&gt;nid);</div><div class='del'>-</div><div class='del'>-	iommu-&gt;xlate_regs = ioremap(xlate_base, IOC_Reg_Size);</div><div class='del'>-	iommu-&gt;cmd_regs = iommu-&gt;xlate_regs + IOC_IOCmd_Offset;</div><div class='del'>-</div><div class='del'>-	/* ensure that the STEs have updated */</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/* setup interrupts for the iommu. */</div><div class='del'>-	reg = in_be64(iommu-&gt;xlate_regs + IOC_IO_ExcpStat);</div><div class='del'>-	out_be64(iommu-&gt;xlate_regs + IOC_IO_ExcpStat,</div><div class='del'>-			reg &amp; ~IOC_IO_ExcpStat_V);</div><div class='del'>-	out_be64(iommu-&gt;xlate_regs + IOC_IO_ExcpMask,</div><div class='del'>-			IOC_IO_ExcpMask_PFE | IOC_IO_ExcpMask_SFE);</div><div class='del'>-</div><div class='del'>-	virq = irq_create_mapping(NULL,</div><div class='del'>-			IIC_IRQ_IOEX_ATI | (iommu-&gt;nid &lt;&lt; IIC_IRQ_NODE_SHIFT));</div><div class='del'>-	BUG_ON(!virq);</div><div class='del'>-</div><div class='del'>-	ret = request_irq(virq, ioc_interrupt, 0, iommu-&gt;name, iommu);</div><div class='del'>-	BUG_ON(ret);</div><div class='del'>-</div><div class='del'>-	/* set the IOC segment table origin register (and turn on the iommu) */</div><div class='del'>-	reg = IOC_IOST_Origin_E | __pa(iommu-&gt;stab) | IOC_IOST_Origin_HW;</div><div class='del'>-	out_be64(iommu-&gt;xlate_regs + IOC_IOST_Origin, reg);</div><div class='del'>-	in_be64(iommu-&gt;xlate_regs + IOC_IOST_Origin);</div><div class='del'>-</div><div class='del'>-	/* turn on IO translation */</div><div class='del'>-	reg = in_be64(iommu-&gt;cmd_regs + IOC_IOCmd_Cfg) | IOC_IOCmd_Cfg_TE;</div><div class='del'>-	out_be64(iommu-&gt;cmd_regs + IOC_IOCmd_Cfg, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_iommu_setup_hardware(struct cbe_iommu *iommu,</div><div class='del'>-	unsigned long base, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	cell_iommu_setup_stab(iommu, base, size, 0, 0);</div><div class='del'>-	iommu-&gt;ptab = cell_iommu_alloc_ptab(iommu, base, size, 0, 0,</div><div class='del'>-					    IOMMU_PAGE_SHIFT_4K);</div><div class='del'>-	cell_iommu_enable_hardware(iommu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u32 cell_iommu_get_ioid(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	const u32 *ioid;</div><div class='del'>-</div><div class='del'>-	ioid = of_get_property(np, "ioid", NULL);</div><div class='del'>-	if (ioid == NULL) {</div><div class='del'>-		printk(KERN_WARNING "iommu: missing ioid for %pOF using 0\n",</div><div class='del'>-		       np);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return *ioid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct iommu_table_ops cell_iommu_ops = {</div><div class='del'>-	.set = tce_build_cell,</div><div class='del'>-	.clear = tce_free_cell</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct iommu_window * __init</div><div class='del'>-cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,</div><div class='del'>-			unsigned long offset, unsigned long size,</div><div class='del'>-			unsigned long pte_offset)</div><div class='del'>-{</div><div class='del'>-	struct iommu_window *window;</div><div class='del'>-	struct page *page;</div><div class='del'>-	u32 ioid;</div><div class='del'>-</div><div class='del'>-	ioid = cell_iommu_get_ioid(np);</div><div class='del'>-</div><div class='del'>-	window = kzalloc_node(sizeof(*window), GFP_KERNEL, iommu-&gt;nid);</div><div class='del'>-	BUG_ON(window == NULL);</div><div class='del'>-</div><div class='del'>-	window-&gt;offset = offset;</div><div class='del'>-	window-&gt;size = size;</div><div class='del'>-	window-&gt;ioid = ioid;</div><div class='del'>-	window-&gt;iommu = iommu;</div><div class='del'>-</div><div class='del'>-	window-&gt;table.it_blocksize = 16;</div><div class='del'>-	window-&gt;table.it_base = (unsigned long)iommu-&gt;ptab;</div><div class='del'>-	window-&gt;table.it_index = iommu-&gt;nid;</div><div class='del'>-	window-&gt;table.it_page_shift = IOMMU_PAGE_SHIFT_4K;</div><div class='del'>-	window-&gt;table.it_offset =</div><div class='del'>-		(offset &gt;&gt; window-&gt;table.it_page_shift) + pte_offset;</div><div class='del'>-	window-&gt;table.it_size = size &gt;&gt; window-&gt;table.it_page_shift;</div><div class='del'>-	window-&gt;table.it_ops = &amp;cell_iommu_ops;</div><div class='del'>-</div><div class='del'>-	if (!iommu_init_table(&amp;window-&gt;table, iommu-&gt;nid, 0, 0))</div><div class='del'>-		panic("Failed to initialize iommu table");</div><div class='del'>-</div><div class='del'>-	pr_debug("\tioid      %d\n", window-&gt;ioid);</div><div class='del'>-	pr_debug("\tblocksize %ld\n", window-&gt;table.it_blocksize);</div><div class='del'>-	pr_debug("\tbase      0x%016lx\n", window-&gt;table.it_base);</div><div class='del'>-	pr_debug("\toffset    0x%lx\n", window-&gt;table.it_offset);</div><div class='del'>-	pr_debug("\tsize      %ld\n", window-&gt;table.it_size);</div><div class='del'>-</div><div class='del'>-	list_add(&amp;window-&gt;list, &amp;iommu-&gt;windows);</div><div class='del'>-</div><div class='del'>-	if (offset != 0)</div><div class='del'>-		return window;</div><div class='del'>-</div><div class='del'>-	/* We need to map and reserve the first IOMMU page since it's used</div><div class='del'>-	 * by the spider workaround. In theory, we only need to do that when</div><div class='del'>-	 * running on spider but it doesn't really matter.</div><div class='del'>-	 *</div><div class='del'>-	 * This code also assumes that we have a window that starts at 0,</div><div class='del'>-	 * which is the case on all spider based blades.</div><div class='del'>-	 */</div><div class='del'>-	page = alloc_pages_node(iommu-&gt;nid, GFP_KERNEL, 0);</div><div class='del'>-	BUG_ON(!page);</div><div class='del'>-	iommu-&gt;pad_page = page_address(page);</div><div class='del'>-	clear_page(iommu-&gt;pad_page);</div><div class='del'>-</div><div class='del'>-	__set_bit(0, window-&gt;table.it_map);</div><div class='del'>-	tce_build_cell(&amp;window-&gt;table, window-&gt;table.it_offset, 1,</div><div class='del'>-		       (unsigned long)iommu-&gt;pad_page, DMA_TO_DEVICE, 0);</div><div class='del'>-</div><div class='del'>-	return window;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct cbe_iommu *cell_iommu_for_node(int nid)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cbe_nr_iommus; i++)</div><div class='del'>-		if (iommus[i].nid == nid)</div><div class='del'>-			return &amp;iommus[i];</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long cell_dma_nommu_offset;</div><div class='del'>-</div><div class='del'>-static unsigned long dma_iommu_fixed_base;</div><div class='del'>-static bool cell_iommu_enabled;</div><div class='del'>-</div><div class='del'>-/* iommu_fixed_is_weak is set if booted with iommu_fixed=weak */</div><div class='del'>-bool iommu_fixed_is_weak;</div><div class='del'>-</div><div class='del'>-static struct iommu_table *cell_get_iommu_table(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct iommu_window *window;</div><div class='del'>-	struct cbe_iommu *iommu;</div><div class='del'>-</div><div class='del'>-	/* Current implementation uses the first window available in that</div><div class='del'>-	 * node's iommu. We -might- do something smarter later though it may</div><div class='del'>-	 * never be necessary</div><div class='del'>-	 */</div><div class='del'>-	iommu = cell_iommu_for_node(dev_to_node(dev));</div><div class='del'>-	if (iommu == NULL || list_empty(&amp;iommu-&gt;windows)) {</div><div class='del'>-		dev_err(dev, "iommu: missing iommu for %pOF (node %d)\n",</div><div class='del'>-		       dev-&gt;of_node, dev_to_node(dev));</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	window = list_entry(iommu-&gt;windows.next, struct iommu_window, list);</div><div class='del'>-</div><div class='del'>-	return &amp;window-&gt;table;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 cell_iommu_get_fixed_address(struct device *dev);</div><div class='del'>-</div><div class='del'>-static void cell_dma_dev_setup(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	if (cell_iommu_enabled) {</div><div class='del'>-		u64 addr = cell_iommu_get_fixed_address(dev);</div><div class='del'>-</div><div class='del'>-		if (addr != OF_BAD_ADDR)</div><div class='del'>-			dev-&gt;archdata.dma_offset = addr + dma_iommu_fixed_base;</div><div class='del'>-		set_iommu_table_base(dev, cell_get_iommu_table(dev));</div><div class='del'>-	} else {</div><div class='del'>-		dev-&gt;archdata.dma_offset = cell_dma_nommu_offset;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cell_pci_dma_dev_setup(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	cell_dma_dev_setup(&amp;dev-&gt;dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cell_of_bus_notify(struct notifier_block *nb, unsigned long action,</div><div class='del'>-			      void *data)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = data;</div><div class='del'>-</div><div class='del'>-	/* We are only interested in device addition */</div><div class='del'>-	if (action != BUS_NOTIFY_ADD_DEVICE)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (cell_iommu_enabled)</div><div class='del'>-		dev-&gt;dma_ops = &amp;dma_iommu_ops;</div><div class='del'>-	cell_dma_dev_setup(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct notifier_block cell_of_bus_notifier = {</div><div class='del'>-	.notifier_call = cell_of_bus_notify</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init cell_iommu_get_window(struct device_node *np,</div><div class='del'>-					 unsigned long *base,</div><div class='del'>-					 unsigned long *size)</div><div class='del'>-{</div><div class='del'>-	const __be32 *dma_window;</div><div class='del'>-	unsigned long index;</div><div class='del'>-</div><div class='del'>-	/* Use ibm,dma-window if available, else, hard code ! */</div><div class='del'>-	dma_window = of_get_property(np, "ibm,dma-window", NULL);</div><div class='del'>-	if (dma_window == NULL) {</div><div class='del'>-		*base = 0;</div><div class='del'>-		*size = 0x80000000u;</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	of_parse_dma_window(np, dma_window, &amp;index, base, size);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct cbe_iommu * __init cell_iommu_alloc(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct cbe_iommu *iommu;</div><div class='del'>-	int nid, i;</div><div class='del'>-</div><div class='del'>-	/* Get node ID */</div><div class='del'>-	nid = of_node_to_nid(np);</div><div class='del'>-	if (nid &lt; 0) {</div><div class='del'>-		printk(KERN_ERR "iommu: failed to get node for %pOF\n",</div><div class='del'>-		       np);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	pr_debug("iommu: setting up iommu for node %d (%pOF)\n",</div><div class='del'>-		 nid, np);</div><div class='del'>-</div><div class='del'>-	/* XXX todo: If we can have multiple windows on the same IOMMU, which</div><div class='del'>-	 * isn't the case today, we probably want here to check whether the</div><div class='del'>-	 * iommu for that node is already setup.</div><div class='del'>-	 * However, there might be issue with getting the size right so let's</div><div class='del'>-	 * ignore that for now. We might want to completely get rid of the</div><div class='del'>-	 * multiple window support since the cell iommu supports per-page ioids</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (cbe_nr_iommus &gt;= NR_IOMMUS) {</div><div class='del'>-		printk(KERN_ERR "iommu: too many IOMMUs detected ! (%pOF)\n",</div><div class='del'>-		       np);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Init base fields */</div><div class='del'>-	i = cbe_nr_iommus++;</div><div class='del'>-	iommu = &amp;iommus[i];</div><div class='del'>-	iommu-&gt;stab = NULL;</div><div class='del'>-	iommu-&gt;nid = nid;</div><div class='del'>-	snprintf(iommu-&gt;name, sizeof(iommu-&gt;name), "iommu%d", i);</div><div class='del'>-	INIT_LIST_HEAD(&amp;iommu-&gt;windows);</div><div class='del'>-</div><div class='del'>-	return iommu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_iommu_init_one(struct device_node *np,</div><div class='del'>-				       unsigned long offset)</div><div class='del'>-{</div><div class='del'>-	struct cbe_iommu *iommu;</div><div class='del'>-	unsigned long base, size;</div><div class='del'>-</div><div class='del'>-	iommu = cell_iommu_alloc(np);</div><div class='del'>-	if (!iommu)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Obtain a window for it */</div><div class='del'>-	cell_iommu_get_window(np, &amp;base, &amp;size);</div><div class='del'>-</div><div class='del'>-	pr_debug("\ttranslating window 0x%lx...0x%lx\n",</div><div class='del'>-		 base, base + size - 1);</div><div class='del'>-</div><div class='del'>-	/* Initialize the hardware */</div><div class='del'>-	cell_iommu_setup_hardware(iommu, base, size);</div><div class='del'>-</div><div class='del'>-	/* Setup the iommu_table */</div><div class='del'>-	cell_iommu_setup_window(iommu, np, base, size,</div><div class='del'>-				offset &gt;&gt; IOMMU_PAGE_SHIFT_4K);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_disable_iommus(void)</div><div class='del'>-{</div><div class='del'>-	int node;</div><div class='del'>-	unsigned long base, val;</div><div class='del'>-	void __iomem *xregs, *cregs;</div><div class='del'>-</div><div class='del'>-	/* Make sure IOC translation is disabled on all nodes */</div><div class='del'>-	for_each_online_node(node) {</div><div class='del'>-		if (cell_iommu_find_ioc(node, &amp;base))</div><div class='del'>-			continue;</div><div class='del'>-		xregs = ioremap(base, IOC_Reg_Size);</div><div class='del'>-		if (xregs == NULL)</div><div class='del'>-			continue;</div><div class='del'>-		cregs = xregs + IOC_IOCmd_Offset;</div><div class='del'>-</div><div class='del'>-		pr_debug("iommu: cleaning up iommu on node %d\n", node);</div><div class='del'>-</div><div class='del'>-		out_be64(xregs + IOC_IOST_Origin, 0);</div><div class='del'>-		(void)in_be64(xregs + IOC_IOST_Origin);</div><div class='del'>-		val = in_be64(cregs + IOC_IOCmd_Cfg);</div><div class='del'>-		val &amp;= ~IOC_IOCmd_Cfg_TE;</div><div class='del'>-		out_be64(cregs + IOC_IOCmd_Cfg, val);</div><div class='del'>-		(void)in_be64(cregs + IOC_IOCmd_Cfg);</div><div class='del'>-</div><div class='del'>-		iounmap(xregs);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cell_iommu_init_disabled(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np = NULL;</div><div class='del'>-	unsigned long base = 0, size;</div><div class='del'>-</div><div class='del'>-	/* When no iommu is present, we use direct DMA ops */</div><div class='del'>-</div><div class='del'>-	/* First make sure all IOC translation is turned off */</div><div class='del'>-	cell_disable_iommus();</div><div class='del'>-</div><div class='del'>-	/* If we have no Axon, we set up the spider DMA magic offset */</div><div class='del'>-	np = of_find_node_by_name(NULL, "axon");</div><div class='del'>-	if (!np)</div><div class='del'>-		cell_dma_nommu_offset = SPIDER_DMA_OFFSET;</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	/* Now we need to check to see where the memory is mapped</div><div class='del'>-	 * in PCI space. We assume that all busses use the same dma</div><div class='del'>-	 * window which is always the case so far on Cell, thus we</div><div class='del'>-	 * pick up the first pci-internal node we can find and check</div><div class='del'>-	 * the DMA window from there.</div><div class='del'>-	 */</div><div class='del'>-	for_each_node_by_name(np, "axon") {</div><div class='del'>-		if (np-&gt;parent == NULL || np-&gt;parent-&gt;parent != NULL)</div><div class='del'>-			continue;</div><div class='del'>-		if (cell_iommu_get_window(np, &amp;base, &amp;size) == 0)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (np == NULL) {</div><div class='del'>-		for_each_node_by_name(np, "pci-internal") {</div><div class='del'>-			if (np-&gt;parent == NULL || np-&gt;parent-&gt;parent != NULL)</div><div class='del'>-				continue;</div><div class='del'>-			if (cell_iommu_get_window(np, &amp;base, &amp;size) == 0)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	/* If we found a DMA window, we check if it's big enough to enclose</div><div class='del'>-	 * all of physical memory. If not, we force enable IOMMU</div><div class='del'>-	 */</div><div class='del'>-	if (np &amp;&amp; size &lt; memblock_end_of_DRAM()) {</div><div class='del'>-		printk(KERN_WARNING "iommu: force-enabled, dma window"</div><div class='del'>-		       " (%ldMB) smaller than total memory (%lldMB)\n",</div><div class='del'>-		       size &gt;&gt; 20, memblock_end_of_DRAM() &gt;&gt; 20);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cell_dma_nommu_offset += base;</div><div class='del'>-</div><div class='del'>-	if (cell_dma_nommu_offset != 0)</div><div class='del'>-		cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup;</div><div class='del'>-</div><div class='del'>-	printk("iommu: disabled, direct DMA offset is 0x%lx\n",</div><div class='del'>-	       cell_dma_nommu_offset);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  Fixed IOMMU mapping support</div><div class='del'>- *</div><div class='del'>- *  This code adds support for setting up a fixed IOMMU mapping on certain</div><div class='del'>- *  cell machines. For 64-bit devices this avoids the performance overhead of</div><div class='del'>- *  mapping and unmapping pages at runtime. 32-bit devices are unable to use</div><div class='del'>- *  the fixed mapping.</div><div class='del'>- *</div><div class='del'>- *  The fixed mapping is established at boot, and maps all of physical memory</div><div class='del'>- *  1:1 into device space at some offset. On machines with &lt; 30 GB of memory</div><div class='del'>- *  we setup the fixed mapping immediately above the normal IOMMU window.</div><div class='del'>- *</div><div class='del'>- *  For example a machine with 4GB of memory would end up with the normal</div><div class='del'>- *  IOMMU window from 0-2GB and the fixed mapping window from 2GB to 6GB. In</div><div class='del'>- *  this case a 64-bit device wishing to DMA to 1GB would be told to DMA to</div><div class='del'>- *  3GB, plus any offset required by firmware. The firmware offset is encoded</div><div class='del'>- *  in the "dma-ranges" property.</div><div class='del'>- *</div><div class='del'>- *  On machines with 30GB or more of memory, we are unable to place the fixed</div><div class='del'>- *  mapping above the normal IOMMU window as we would run out of address space.</div><div class='del'>- *  Instead we move the normal IOMMU window to coincide with the hash page</div><div class='del'>- *  table, this region does not need to be part of the fixed mapping as no</div><div class='del'>- *  device should ever be DMA'ing to it. We then setup the fixed mapping</div><div class='del'>- *  from 0 to 32GB.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static u64 cell_iommu_get_fixed_address(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	u64 cpu_addr, size, best_size, dev_addr = OF_BAD_ADDR;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	const u32 *ranges = NULL;</div><div class='del'>-	int i, len, best, naddr, nsize, pna, range_size;</div><div class='del'>-</div><div class='del'>-	/* We can be called for platform devices that have no of_node */</div><div class='del'>-	np = of_node_get(dev-&gt;of_node);</div><div class='del'>-	if (!np)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	while (1) {</div><div class='del'>-		naddr = of_n_addr_cells(np);</div><div class='del'>-		nsize = of_n_size_cells(np);</div><div class='del'>-		np = of_get_next_parent(np);</div><div class='del'>-		if (!np)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		ranges = of_get_property(np, "dma-ranges", &amp;len);</div><div class='del'>-</div><div class='del'>-		/* Ignore empty ranges, they imply no translation required */</div><div class='del'>-		if (ranges &amp;&amp; len &gt; 0)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ranges) {</div><div class='del'>-		dev_dbg(dev, "iommu: no dma-ranges found\n");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len /= sizeof(u32);</div><div class='del'>-</div><div class='del'>-	pna = of_n_addr_cells(np);</div><div class='del'>-	range_size = naddr + nsize + pna;</div><div class='del'>-</div><div class='del'>-	/* dma-ranges format:</div><div class='del'>-	 * child addr	: naddr cells</div><div class='del'>-	 * parent addr	: pna cells</div><div class='del'>-	 * size		: nsize cells</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0, best = -1, best_size = 0; i &lt; len; i += range_size) {</div><div class='del'>-		cpu_addr = of_translate_dma_address(np, ranges + i + naddr);</div><div class='del'>-		size = of_read_number(ranges + i + naddr + pna, nsize);</div><div class='del'>-</div><div class='del'>-		if (cpu_addr == 0 &amp;&amp; size &gt; best_size) {</div><div class='del'>-			best = i;</div><div class='del'>-			best_size = size;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (best &gt;= 0) {</div><div class='del'>-		dev_addr = of_read_number(ranges + best, naddr);</div><div class='del'>-	} else</div><div class='del'>-		dev_dbg(dev, "iommu: no suitable range found!\n");</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	return dev_addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool cell_pci_iommu_bypass_supported(struct pci_dev *pdev, u64 mask)</div><div class='del'>-{</div><div class='del'>-	return mask == DMA_BIT_MASK(64) &amp;&amp;</div><div class='del'>-		cell_iommu_get_fixed_address(&amp;pdev-&gt;dev) != OF_BAD_ADDR;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init insert_16M_pte(unsigned long addr, unsigned long *ptab,</div><div class='del'>-			   unsigned long base_pte)</div><div class='del'>-{</div><div class='del'>-	unsigned long segment, offset;</div><div class='del'>-</div><div class='del'>-	segment = addr &gt;&gt; IO_SEGMENT_SHIFT;</div><div class='del'>-	offset = (addr &gt;&gt; 24) - (segment &lt;&lt; IO_PAGENO_BITS(24));</div><div class='del'>-	ptab = ptab + (segment * (1 &lt;&lt; 12) / sizeof(unsigned long));</div><div class='del'>-</div><div class='del'>-	pr_debug("iommu: addr %lx ptab %p segment %lx offset %lx\n",</div><div class='del'>-		  addr, ptab, segment, offset);</div><div class='del'>-</div><div class='del'>-	ptab[offset] = base_pte | (__pa(addr) &amp; CBE_IOPTE_RPN_Mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu,</div><div class='del'>-	struct device_node *np, unsigned long dbase, unsigned long dsize,</div><div class='del'>-	unsigned long fbase, unsigned long fsize)</div><div class='del'>-{</div><div class='del'>-	unsigned long base_pte, uaddr, ioaddr, *ptab;</div><div class='del'>-</div><div class='del'>-	ptab = cell_iommu_alloc_ptab(iommu, fbase, fsize, dbase, dsize, 24);</div><div class='del'>-</div><div class='del'>-	dma_iommu_fixed_base = fbase;</div><div class='del'>-</div><div class='del'>-	pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase);</div><div class='del'>-</div><div class='del'>-	base_pte = CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M |</div><div class='del'>-		(cell_iommu_get_ioid(np) &amp; CBE_IOPTE_IOID_Mask);</div><div class='del'>-</div><div class='del'>-	if (iommu_fixed_is_weak)</div><div class='del'>-		pr_info("IOMMU: Using weak ordering for fixed mapping\n");</div><div class='del'>-	else {</div><div class='del'>-		pr_info("IOMMU: Using strong ordering for fixed mapping\n");</div><div class='del'>-		base_pte |= CBE_IOPTE_SO_RW;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (uaddr = 0; uaddr &lt; fsize; uaddr += (1 &lt;&lt; 24)) {</div><div class='del'>-		/* Don't touch the dynamic region */</div><div class='del'>-		ioaddr = uaddr + fbase;</div><div class='del'>-		if (ioaddr &gt;= dbase &amp;&amp; ioaddr &lt; (dbase + dsize)) {</div><div class='del'>-			pr_debug("iommu: fixed/dynamic overlap, skipping\n");</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		insert_16M_pte(uaddr, ptab, base_pte);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cell_iommu_fixed_mapping_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long dbase, dsize, fbase, fsize, hbase, hend;</div><div class='del'>-	struct cbe_iommu *iommu;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	/* The fixed mapping is only supported on axon machines */</div><div class='del'>-	np = of_find_node_by_name(NULL, "axon");</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	if (!np) {</div><div class='del'>-		pr_debug("iommu: fixed mapping disabled, no axons found\n");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* We must have dma-ranges properties for fixed mapping to work */</div><div class='del'>-	np = of_find_node_with_property(NULL, "dma-ranges");</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	if (!np) {</div><div class='del'>-		pr_debug("iommu: no dma-ranges found, no fixed mapping\n");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The default setup is to have the fixed mapping sit after the</div><div class='del'>-	 * dynamic region, so find the top of the largest IOMMU window</div><div class='del'>-	 * on any axon, then add the size of RAM and that's our max value.</div><div class='del'>-	 * If that is &gt; 32GB we have to do other shennanigans.</div><div class='del'>-	 */</div><div class='del'>-	fbase = 0;</div><div class='del'>-	for_each_node_by_name(np, "axon") {</div><div class='del'>-		cell_iommu_get_window(np, &amp;dbase, &amp;dsize);</div><div class='del'>-		fbase = max(fbase, dbase + dsize);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fbase = ALIGN(fbase, 1 &lt;&lt; IO_SEGMENT_SHIFT);</div><div class='del'>-	fsize = memblock_phys_mem_size();</div><div class='del'>-</div><div class='del'>-	if ((fbase + fsize) &lt;= 0x800000000ul)</div><div class='del'>-		hbase = 0; /* use the device tree window */</div><div class='del'>-	else {</div><div class='del'>-		/* If we're over 32 GB we need to cheat. We can't map all of</div><div class='del'>-		 * RAM with the fixed mapping, and also fit the dynamic</div><div class='del'>-		 * region. So try to place the dynamic region where the hash</div><div class='del'>-		 * table sits, drivers never need to DMA to it, we don't</div><div class='del'>-		 * need a fixed mapping for that area.</div><div class='del'>-		 */</div><div class='del'>-		if (!htab_address) {</div><div class='del'>-			pr_debug("iommu: htab is NULL, on LPAR? Huh?\n");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-		hbase = __pa(htab_address);</div><div class='del'>-		hend  = hbase + htab_size_bytes;</div><div class='del'>-</div><div class='del'>-		/* The window must start and end on a segment boundary */</div><div class='del'>-		if ((hbase != ALIGN(hbase, 1 &lt;&lt; IO_SEGMENT_SHIFT)) ||</div><div class='del'>-		    (hend != ALIGN(hend, 1 &lt;&lt; IO_SEGMENT_SHIFT))) {</div><div class='del'>-			pr_debug("iommu: hash window not segment aligned\n");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Check the hash window fits inside the real DMA window */</div><div class='del'>-		for_each_node_by_name(np, "axon") {</div><div class='del'>-			cell_iommu_get_window(np, &amp;dbase, &amp;dsize);</div><div class='del'>-</div><div class='del'>-			if (hbase &lt; dbase || (hend &gt; (dbase + dsize))) {</div><div class='del'>-				pr_debug("iommu: hash window doesn't fit in"</div><div class='del'>-					 "real DMA window\n");</div><div class='del'>-				of_node_put(np);</div><div class='del'>-				return -1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		fbase = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Setup the dynamic regions */</div><div class='del'>-	for_each_node_by_name(np, "axon") {</div><div class='del'>-		iommu = cell_iommu_alloc(np);</div><div class='del'>-		BUG_ON(!iommu);</div><div class='del'>-</div><div class='del'>-		if (hbase == 0)</div><div class='del'>-			cell_iommu_get_window(np, &amp;dbase, &amp;dsize);</div><div class='del'>-		else {</div><div class='del'>-			dbase = hbase;</div><div class='del'>-			dsize = htab_size_bytes;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		printk(KERN_DEBUG "iommu: node %d, dynamic window 0x%lx-0x%lx "</div><div class='del'>-			"fixed window 0x%lx-0x%lx\n", iommu-&gt;nid, dbase,</div><div class='del'>-			 dbase + dsize, fbase, fbase + fsize);</div><div class='del'>-</div><div class='del'>-		cell_iommu_setup_stab(iommu, dbase, dsize, fbase, fsize);</div><div class='del'>-		iommu-&gt;ptab = cell_iommu_alloc_ptab(iommu, dbase, dsize, 0, 0,</div><div class='del'>-						    IOMMU_PAGE_SHIFT_4K);</div><div class='del'>-		cell_iommu_setup_fixed_ptab(iommu, np, dbase, dsize,</div><div class='del'>-					     fbase, fsize);</div><div class='del'>-		cell_iommu_enable_hardware(iommu);</div><div class='del'>-		cell_iommu_setup_window(iommu, np, dbase, dsize, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cell_pci_controller_ops.iommu_bypass_supported =</div><div class='del'>-		cell_pci_iommu_bypass_supported;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int iommu_fixed_disabled;</div><div class='del'>-</div><div class='del'>-static int __init setup_iommu_fixed(char *str)</div><div class='del'>-{</div><div class='del'>-	struct device_node *pciep;</div><div class='del'>-</div><div class='del'>-	if (strcmp(str, "off") == 0)</div><div class='del'>-		iommu_fixed_disabled = 1;</div><div class='del'>-</div><div class='del'>-	/* If we can find a pcie-endpoint in the device tree assume that</div><div class='del'>-	 * we're on a triblade or a CAB so by default the fixed mapping</div><div class='del'>-	 * should be set to be weakly ordered; but only if the boot</div><div class='del'>-	 * option WASN'T set for strong ordering</div><div class='del'>-	 */</div><div class='del'>-	pciep = of_find_node_by_type(NULL, "pcie-endpoint");</div><div class='del'>-</div><div class='del'>-	if (strcmp(str, "weak") == 0 || (pciep &amp;&amp; strcmp(str, "strong") != 0))</div><div class='del'>-		iommu_fixed_is_weak = true;</div><div class='del'>-</div><div class='del'>-	of_node_put(pciep);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-__setup("iommu_fixed=", setup_iommu_fixed);</div><div class='del'>-</div><div class='del'>-static int __init cell_iommu_init(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	/* If IOMMU is disabled or we have little enough RAM to not need</div><div class='del'>-	 * to enable it, we setup a direct mapping.</div><div class='del'>-	 *</div><div class='del'>-	 * Note: should we make sure we have the IOMMU actually disabled ?</div><div class='del'>-	 */</div><div class='del'>-	if (iommu_is_off ||</div><div class='del'>-	    (!iommu_force_on &amp;&amp; memblock_end_of_DRAM() &lt;= 0x80000000ull))</div><div class='del'>-		if (cell_iommu_init_disabled() == 0)</div><div class='del'>-			goto bail;</div><div class='del'>-</div><div class='del'>-	/* Setup various callbacks */</div><div class='del'>-	cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup;</div><div class='del'>-</div><div class='del'>-	if (!iommu_fixed_disabled &amp;&amp; cell_iommu_fixed_mapping_init() == 0)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	/* Create an iommu for each /axon node.  */</div><div class='del'>-	for_each_node_by_name(np, "axon") {</div><div class='del'>-		if (np-&gt;parent == NULL || np-&gt;parent-&gt;parent != NULL)</div><div class='del'>-			continue;</div><div class='del'>-		cell_iommu_init_one(np, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Create an iommu for each toplevel /pci-internal node for</div><div class='del'>-	 * old hardware/firmware</div><div class='del'>-	 */</div><div class='del'>-	for_each_node_by_name(np, "pci-internal") {</div><div class='del'>-		if (np-&gt;parent == NULL || np-&gt;parent-&gt;parent != NULL)</div><div class='del'>-			continue;</div><div class='del'>-		cell_iommu_init_one(np, SPIDER_DMA_OFFSET);</div><div class='del'>-	}</div><div class='del'>- done:</div><div class='del'>-	/* Setup default PCI iommu ops */</div><div class='del'>-	set_pci_dma_ops(&amp;dma_iommu_ops);</div><div class='del'>-	cell_iommu_enabled = true;</div><div class='del'>- bail:</div><div class='del'>-	/* Register callbacks on OF platform device addition/removal</div><div class='del'>-	 * to handle linking them to the right DMA operations</div><div class='del'>-	 */</div><div class='del'>-	bus_register_notifier(&amp;platform_bus_type, &amp;cell_of_bus_notifier);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-machine_arch_initcall(cell, cell_iommu_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c<br/>deleted file mode 100644<br/>index 58d967ee38b3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/pervasive.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pervasive.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,125 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * CBE Pervasive Monitor and Debug</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corporation 2005</div><div class='del'>- *</div><div class='del'>- * Authors: Maximino Aguilar (maguilar@us.ibm.com)</div><div class='del'>- *          Michael N. Day (mnday@us.ibm.com)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/percpu.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/kallsyms.h&gt;</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/reg.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-#include &lt;asm/cpu_has_feature.h&gt;</div><div class='del'>-</div><div class='del'>-#include "pervasive.h"</div><div class='del'>-#include "ras.h"</div><div class='del'>-</div><div class='del'>-static void cbe_power_save(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long ctrl, thread_switch_control;</div><div class='del'>-</div><div class='del'>-	/* Ensure our interrupt state is properly tracked */</div><div class='del'>-	if (!prep_irq_for_idle())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ctrl = mfspr(SPRN_CTRLF);</div><div class='del'>-</div><div class='del'>-	/* Enable DEC and EE interrupt request */</div><div class='del'>-	thread_switch_control  = mfspr(SPRN_TSC_CELL);</div><div class='del'>-	thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;</div><div class='del'>-</div><div class='del'>-	switch (ctrl &amp; CTRL_CT) {</div><div class='del'>-	case CTRL_CT0:</div><div class='del'>-		thread_switch_control |= TSC_CELL_DEC_ENABLE_0;</div><div class='del'>-		break;</div><div class='del'>-	case CTRL_CT1:</div><div class='del'>-		thread_switch_control |= TSC_CELL_DEC_ENABLE_1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_WARNING "%s: unknown configuration\n",</div><div class='del'>-			__func__);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	mtspr(SPRN_TSC_CELL, thread_switch_control);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * go into low thread priority, medium priority will be</div><div class='del'>-	 * restored for us after wake-up.</div><div class='del'>-	 */</div><div class='del'>-	HMT_low();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * atomically disable thread execution and runlatch.</div><div class='del'>-	 * External and Decrementer exceptions are still handled when the</div><div class='del'>-	 * thread is disabled but now enter in cbe_system_reset_exception()</div><div class='del'>-	 */</div><div class='del'>-	ctrl &amp;= ~(CTRL_RUNLATCH | CTRL_TE);</div><div class='del'>-	mtspr(SPRN_CTRLT, ctrl);</div><div class='del'>-</div><div class='del'>-	/* Re-enable interrupts in MSR */</div><div class='del'>-	__hard_irq_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cbe_system_reset_exception(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	switch (regs-&gt;msr &amp; SRR1_WAKEMASK) {</div><div class='del'>-	case SRR1_WAKEDEC:</div><div class='del'>-		set_dec(1);</div><div class='del'>-		break;</div><div class='del'>-	case SRR1_WAKEEE:</div><div class='del'>-		/*</div><div class='del'>-		 * Handle these when interrupts get re-enabled and we take</div><div class='del'>-		 * them as regular exceptions. We are in an NMI context</div><div class='del'>-		 * and can't handle these here.</div><div class='del'>-		 */</div><div class='del'>-		break;</div><div class='del'>-	case SRR1_WAKEMT:</div><div class='del'>-		return cbe_sysreset_hack();</div><div class='del'>-#ifdef CONFIG_CBE_RAS</div><div class='del'>-	case SRR1_WAKESYSERR:</div><div class='del'>-		cbe_system_error_exception(regs);</div><div class='del'>-		break;</div><div class='del'>-	case SRR1_WAKETHERM:</div><div class='del'>-		cbe_thermal_exception(regs);</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_CBE_RAS */</div><div class='del'>-	default:</div><div class='del'>-		/* do system reset */</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	/* everything handled */</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init cbe_pervasive_init(void)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu);</div><div class='del'>-		if (!regs)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		 /* Enable Pause(0) control bit */</div><div class='del'>-		out_be64(&amp;regs-&gt;pmcr, in_be64(&amp;regs-&gt;pmcr) |</div><div class='del'>-					    CBE_PMD_PAUSE_ZERO_CONTROL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ppc_md.power_save = cbe_power_save;</div><div class='del'>-	ppc_md.system_reset_exception = cbe_system_reset_exception;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/pervasive.h b/arch/powerpc/platforms/cell/pervasive.h<br/>deleted file mode 100644<br/>index 0da74ab10716..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/pervasive.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pervasive.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Cell Pervasive Monitor and Debug interface and HW structures</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corporation 2005</div><div class='del'>- *</div><div class='del'>- * Authors: Maximino Aguilar (maguilar@us.ibm.com)</div><div class='del'>- *          David J. Erb (djerb@us.ibm.com)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef PERVASIVE_H</div><div class='del'>-#define PERVASIVE_H</div><div class='del'>-</div><div class='del'>-extern void cbe_pervasive_init(void);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_IBM_CELL_RESETBUTTON</div><div class='del'>-extern int cbe_sysreset_hack(void);</div><div class='del'>-#else</div><div class='del'>-static inline int cbe_sysreset_hack(void)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PPC_IBM_CELL_RESETBUTTON */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c<br/>deleted file mode 100644<br/>index b207a7f99be5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/pmu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/pmu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,412 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Cell Broadband Engine Performance Monitor</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corporation 2001,2006</div><div class='del'>- *</div><div class='del'>- * Author:</div><div class='del'>- *    David Erb (djerb@us.ibm.com)</div><div class='del'>- *    Kevin Corry (kevcorry@us.ibm.com)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irqdomain.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq_regs.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/pmc.h&gt;</div><div class='del'>-#include &lt;asm/reg.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * When writing to write-only mmio addresses, save a shadow copy. All of the</div><div class='del'>- * registers are 32-bit, but stored in the upper-half of a 64-bit field in</div><div class='del'>- * pmd_regs.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define WRITE_WO_MMIO(reg, x)					\</div><div class='del'>-	do {							\</div><div class='del'>-		u32 _x = (x);					\</div><div class='del'>-		struct cbe_pmd_regs __iomem *pmd_regs;		\</div><div class='del'>-		struct cbe_pmd_shadow_regs *shadow_regs;	\</div><div class='del'>-		pmd_regs = cbe_get_cpu_pmd_regs(cpu);		\</div><div class='del'>-		shadow_regs = cbe_get_cpu_pmd_shadow_regs(cpu);	\</div><div class='del'>-		out_be64(&amp;(pmd_regs-&gt;reg), (((u64)_x) &lt;&lt; 32));	\</div><div class='del'>-		shadow_regs-&gt;reg = _x;				\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define READ_SHADOW_REG(val, reg)				\</div><div class='del'>-	do {							\</div><div class='del'>-		struct cbe_pmd_shadow_regs *shadow_regs;	\</div><div class='del'>-		shadow_regs = cbe_get_cpu_pmd_shadow_regs(cpu);	\</div><div class='del'>-		(val) = shadow_regs-&gt;reg;			\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define READ_MMIO_UPPER32(val, reg)				\</div><div class='del'>-	do {							\</div><div class='del'>-		struct cbe_pmd_regs __iomem *pmd_regs;		\</div><div class='del'>-		pmd_regs = cbe_get_cpu_pmd_regs(cpu);		\</div><div class='del'>-		(val) = (u32)(in_be64(&amp;pmd_regs-&gt;reg) &gt;&gt; 32);	\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Physical counter registers.</div><div class='del'>- * Each physical counter can act as one 32-bit counter or two 16-bit counters.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr)</div><div class='del'>-{</div><div class='del'>-	u32 val_in_latch, val = 0;</div><div class='del'>-</div><div class='del'>-	if (phys_ctr &lt; NR_PHYS_CTRS) {</div><div class='del'>-		READ_SHADOW_REG(val_in_latch, counter_value_in_latch);</div><div class='del'>-</div><div class='del'>-		/* Read the latch or the actual counter, whichever is newer. */</div><div class='del'>-		if (val_in_latch &amp; (1 &lt;&lt; phys_ctr)) {</div><div class='del'>-			READ_SHADOW_REG(val, pm_ctr[phys_ctr]);</div><div class='del'>-		} else {</div><div class='del'>-			READ_MMIO_UPPER32(val, pm_ctr[phys_ctr]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_read_phys_ctr);</div><div class='del'>-</div><div class='del'>-void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_shadow_regs *shadow_regs;</div><div class='del'>-	u32 pm_ctrl;</div><div class='del'>-</div><div class='del'>-	if (phys_ctr &lt; NR_PHYS_CTRS) {</div><div class='del'>-		/* Writing to a counter only writes to a hardware latch.</div><div class='del'>-		 * The new value is not propagated to the actual counter</div><div class='del'>-		 * until the performance monitor is enabled.</div><div class='del'>-		 */</div><div class='del'>-		WRITE_WO_MMIO(pm_ctr[phys_ctr], val);</div><div class='del'>-</div><div class='del'>-		pm_ctrl = cbe_read_pm(cpu, pm_control);</div><div class='del'>-		if (pm_ctrl &amp; CBE_PM_ENABLE_PERF_MON) {</div><div class='del'>-			/* The counters are already active, so we need to</div><div class='del'>-			 * rewrite the pm_control register to "re-enable"</div><div class='del'>-			 * the PMU.</div><div class='del'>-			 */</div><div class='del'>-			cbe_write_pm(cpu, pm_control, pm_ctrl);</div><div class='del'>-		} else {</div><div class='del'>-			shadow_regs = cbe_get_cpu_pmd_shadow_regs(cpu);</div><div class='del'>-			shadow_regs-&gt;counter_value_in_latch |= (1 &lt;&lt; phys_ctr);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_write_phys_ctr);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "Logical" counter registers.</div><div class='del'>- * These will read/write 16-bits or 32-bits depending on the</div><div class='del'>- * current size of the counter. Counters 4 - 7 are always 16-bit.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_read_ctr(u32 cpu, u32 ctr)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-	u32 phys_ctr = ctr &amp; (NR_PHYS_CTRS - 1);</div><div class='del'>-</div><div class='del'>-	val = cbe_read_phys_ctr(cpu, phys_ctr);</div><div class='del'>-</div><div class='del'>-	if (cbe_get_ctr_size(cpu, phys_ctr) == 16)</div><div class='del'>-		val = (ctr &lt; NR_PHYS_CTRS) ? (val &gt;&gt; 16) : (val &amp; 0xffff);</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_read_ctr);</div><div class='del'>-</div><div class='del'>-void cbe_write_ctr(u32 cpu, u32 ctr, u32 val)</div><div class='del'>-{</div><div class='del'>-	u32 phys_ctr;</div><div class='del'>-	u32 phys_val;</div><div class='del'>-</div><div class='del'>-	phys_ctr = ctr &amp; (NR_PHYS_CTRS - 1);</div><div class='del'>-</div><div class='del'>-	if (cbe_get_ctr_size(cpu, phys_ctr) == 16) {</div><div class='del'>-		phys_val = cbe_read_phys_ctr(cpu, phys_ctr);</div><div class='del'>-</div><div class='del'>-		if (ctr &lt; NR_PHYS_CTRS)</div><div class='del'>-			val = (val &lt;&lt; 16) | (phys_val &amp; 0xffff);</div><div class='del'>-		else</div><div class='del'>-			val = (val &amp; 0xffff) | (phys_val &amp; 0xffff0000);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cbe_write_phys_ctr(cpu, phys_ctr, val);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_write_ctr);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Counter-control registers.</div><div class='del'>- * Each "logical" counter has a corresponding control register.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_read_pm07_control(u32 cpu, u32 ctr)</div><div class='del'>-{</div><div class='del'>-	u32 pm07_control = 0;</div><div class='del'>-</div><div class='del'>-	if (ctr &lt; NR_CTRS)</div><div class='del'>-		READ_SHADOW_REG(pm07_control, pm07_control[ctr]);</div><div class='del'>-</div><div class='del'>-	return pm07_control;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_read_pm07_control);</div><div class='del'>-</div><div class='del'>-void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val)</div><div class='del'>-{</div><div class='del'>-	if (ctr &lt; NR_CTRS)</div><div class='del'>-		WRITE_WO_MMIO(pm07_control[ctr], val);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_write_pm07_control);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Other PMU control registers. Most of these are write-only.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg)</div><div class='del'>-{</div><div class='del'>-	u32 val = 0;</div><div class='del'>-</div><div class='del'>-	switch (reg) {</div><div class='del'>-	case group_control:</div><div class='del'>-		READ_SHADOW_REG(val, group_control);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case debug_bus_control:</div><div class='del'>-		READ_SHADOW_REG(val, debug_bus_control);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case trace_address:</div><div class='del'>-		READ_MMIO_UPPER32(val, trace_address);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ext_tr_timer:</div><div class='del'>-		READ_SHADOW_REG(val, ext_tr_timer);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_status:</div><div class='del'>-		READ_MMIO_UPPER32(val, pm_status);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_control:</div><div class='del'>-		READ_SHADOW_REG(val, pm_control);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_interval:</div><div class='del'>-		READ_MMIO_UPPER32(val, pm_interval);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_start_stop:</div><div class='del'>-		READ_SHADOW_REG(val, pm_start_stop);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_read_pm);</div><div class='del'>-</div><div class='del'>-void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val)</div><div class='del'>-{</div><div class='del'>-	switch (reg) {</div><div class='del'>-	case group_control:</div><div class='del'>-		WRITE_WO_MMIO(group_control, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case debug_bus_control:</div><div class='del'>-		WRITE_WO_MMIO(debug_bus_control, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case trace_address:</div><div class='del'>-		WRITE_WO_MMIO(trace_address, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ext_tr_timer:</div><div class='del'>-		WRITE_WO_MMIO(ext_tr_timer, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_status:</div><div class='del'>-		WRITE_WO_MMIO(pm_status, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_control:</div><div class='del'>-		WRITE_WO_MMIO(pm_control, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_interval:</div><div class='del'>-		WRITE_WO_MMIO(pm_interval, val);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case pm_start_stop:</div><div class='del'>-		WRITE_WO_MMIO(pm_start_stop, val);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_write_pm);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get/set the size of a physical counter to either 16 or 32 bits.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr)</div><div class='del'>-{</div><div class='del'>-	u32 pm_ctrl, size = 0;</div><div class='del'>-</div><div class='del'>-	if (phys_ctr &lt; NR_PHYS_CTRS) {</div><div class='del'>-		pm_ctrl = cbe_read_pm(cpu, pm_control);</div><div class='del'>-		size = (pm_ctrl &amp; CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_ctr_size);</div><div class='del'>-</div><div class='del'>-void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size)</div><div class='del'>-{</div><div class='del'>-	u32 pm_ctrl;</div><div class='del'>-</div><div class='del'>-	if (phys_ctr &lt; NR_PHYS_CTRS) {</div><div class='del'>-		pm_ctrl = cbe_read_pm(cpu, pm_control);</div><div class='del'>-		switch (ctr_size) {</div><div class='del'>-		case 16:</div><div class='del'>-			pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case 32:</div><div class='del'>-			pm_ctrl &amp;= ~CBE_PM_16BIT_CTR(phys_ctr);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		cbe_write_pm(cpu, pm_control, pm_ctrl);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_set_ctr_size);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable/disable the entire performance monitoring unit.</div><div class='del'>- * When we enable the PMU, all pending writes to counters get committed.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void cbe_enable_pm(u32 cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_shadow_regs *shadow_regs;</div><div class='del'>-	u32 pm_ctrl;</div><div class='del'>-</div><div class='del'>-	shadow_regs = cbe_get_cpu_pmd_shadow_regs(cpu);</div><div class='del'>-	shadow_regs-&gt;counter_value_in_latch = 0;</div><div class='del'>-</div><div class='del'>-	pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON;</div><div class='del'>-	cbe_write_pm(cpu, pm_control, pm_ctrl);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_enable_pm);</div><div class='del'>-</div><div class='del'>-void cbe_disable_pm(u32 cpu)</div><div class='del'>-{</div><div class='del'>-	u32 pm_ctrl;</div><div class='del'>-	pm_ctrl = cbe_read_pm(cpu, pm_control) &amp; ~CBE_PM_ENABLE_PERF_MON;</div><div class='del'>-	cbe_write_pm(cpu, pm_control, pm_ctrl);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_disable_pm);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reading from the trace_buffer.</div><div class='del'>- * The trace buffer is two 64-bit registers. Reading from</div><div class='del'>- * the second half automatically increments the trace_address.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void cbe_read_trace_buffer(u32 cpu, u64 *buf)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_regs __iomem *pmd_regs = cbe_get_cpu_pmd_regs(cpu);</div><div class='del'>-</div><div class='del'>-	*buf++ = in_be64(&amp;pmd_regs-&gt;trace_buffer_0_63);</div><div class='del'>-	*buf++ = in_be64(&amp;pmd_regs-&gt;trace_buffer_64_127);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enabling/disabling interrupts for the entire performance monitoring unit.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-u32 cbe_get_and_clear_pm_interrupts(u32 cpu)</div><div class='del'>-{</div><div class='del'>-	/* Reading pm_status clears the interrupt bits. */</div><div class='del'>-	return cbe_read_pm(cpu, pm_status);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_get_and_clear_pm_interrupts);</div><div class='del'>-</div><div class='del'>-void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask)</div><div class='del'>-{</div><div class='del'>-	/* Set which node and thread will handle the next interrupt. */</div><div class='del'>-	iic_set_interrupt_routing(cpu, thread, 0);</div><div class='del'>-</div><div class='del'>-	/* Enable the interrupt bits in the pm_status register. */</div><div class='del'>-	if (mask)</div><div class='del'>-		cbe_write_pm(cpu, pm_status, mask);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts);</div><div class='del'>-</div><div class='del'>-void cbe_disable_pm_interrupts(u32 cpu)</div><div class='del'>-{</div><div class='del'>-	cbe_get_and_clear_pm_interrupts(cpu);</div><div class='del'>-	cbe_write_pm(cpu, pm_status, 0);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts);</div><div class='del'>-</div><div class='del'>-static irqreturn_t cbe_pm_irq(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	perf_irq(get_irq_regs());</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cbe_init_pm_irq(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq;</div><div class='del'>-	int rc, node;</div><div class='del'>-</div><div class='del'>-	for_each_online_node(node) {</div><div class='del'>-		irq = irq_create_mapping(NULL, IIC_IRQ_IOEX_PMI |</div><div class='del'>-					       (node &lt;&lt; IIC_IRQ_NODE_SHIFT));</div><div class='del'>-		if (!irq) {</div><div class='del'>-			printk("ERROR: Unable to allocate irq for node %d\n",</div><div class='del'>-			       node);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		rc = request_irq(irq, cbe_pm_irq,</div><div class='del'>-				 0, "cbe-pmu-0", NULL);</div><div class='del'>-		if (rc) {</div><div class='del'>-			printk("ERROR: Request for irq on node %d failed\n",</div><div class='del'>-			       node);</div><div class='del'>-			return rc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-machine_arch_initcall(cell, cbe_init_pm_irq);</div><div class='del'>-</div><div class='del'>-void cbe_sync_irq(int node)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq;</div><div class='del'>-</div><div class='del'>-	irq = irq_find_mapping(NULL,</div><div class='del'>-			       IIC_IRQ_IOEX_PMI</div><div class='del'>-			       | (node &lt;&lt; IIC_IRQ_NODE_SHIFT));</div><div class='del'>-</div><div class='del'>-	if (!irq) {</div><div class='del'>-		printk(KERN_WARNING "ERROR, unable to get existing irq %d " \</div><div class='del'>-		"for node %d\n", irq, node);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	synchronize_irq(irq);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cbe_sync_irq);</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c<br/>deleted file mode 100644<br/>index f6b87926530c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/ras.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/ras.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,352 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright 2006-2008, IBM Corporation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/reboot.h&gt;</div><div class='del'>-#include &lt;linux/kexec.h&gt;</div><div class='del'>-#include &lt;linux/crash_dump.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/kexec.h&gt;</div><div class='del'>-#include &lt;asm/reg.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/rtas.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ras.h"</div><div class='del'>-#include "pervasive.h"</div><div class='del'>-</div><div class='del'>-static void dump_fir(int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_regs __iomem *pregs = cbe_get_cpu_pmd_regs(cpu);</div><div class='del'>-	struct cbe_iic_regs __iomem *iregs = cbe_get_cpu_iic_regs(cpu);</div><div class='del'>-</div><div class='del'>-	if (pregs == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Todo: do some nicer parsing of bits and based on them go down</div><div class='del'>-	 * to other sub-units FIRs and not only IIC</div><div class='del'>-	 */</div><div class='del'>-	printk(KERN_ERR "Global Checkstop FIR    : 0x%016llx\n",</div><div class='del'>-	       in_be64(&amp;pregs-&gt;checkstop_fir));</div><div class='del'>-	printk(KERN_ERR "Global Recoverable FIR  : 0x%016llx\n",</div><div class='del'>-	       in_be64(&amp;pregs-&gt;checkstop_fir));</div><div class='del'>-	printk(KERN_ERR "Global MachineCheck FIR : 0x%016llx\n",</div><div class='del'>-	       in_be64(&amp;pregs-&gt;spec_att_mchk_fir));</div><div class='del'>-</div><div class='del'>-	if (iregs == NULL)</div><div class='del'>-		return;</div><div class='del'>-	printk(KERN_ERR "IOC FIR                 : 0x%016llx\n",</div><div class='del'>-	       in_be64(&amp;iregs-&gt;ioc_fir));</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_INTERRUPT_HANDLER(cbe_system_error_exception)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	printk(KERN_ERR "System Error Interrupt on CPU %d !\n", cpu);</div><div class='del'>-	dump_fir(cpu);</div><div class='del'>-	dump_stack();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_INTERRUPT_HANDLER(cbe_maintenance_exception)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Nothing implemented for the maintenance interrupt at this point</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	printk(KERN_ERR "Unhandled Maintenance interrupt on CPU %d !\n", cpu);</div><div class='del'>-	dump_stack();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_INTERRUPT_HANDLER(cbe_thermal_exception)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Nothing implemented for the thermal interrupt at this point</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	printk(KERN_ERR "Unhandled Thermal interrupt on CPU %d !\n", cpu);</div><div class='del'>-	dump_stack();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cbe_machine_check_handler(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	printk(KERN_ERR "Machine Check Interrupt on CPU %d !\n", cpu);</div><div class='del'>-	dump_fir(cpu);</div><div class='del'>-</div><div class='del'>-	/* No recovery from this code now, lets continue */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct ptcal_area {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	int nid;</div><div class='del'>-	int order;</div><div class='del'>-	struct page *pages;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(ptcal_list);</div><div class='del'>-</div><div class='del'>-static int ptcal_start_tok, ptcal_stop_tok;</div><div class='del'>-</div><div class='del'>-static int __init cbe_ptcal_enable_on_node(int nid, int order)</div><div class='del'>-{</div><div class='del'>-	struct ptcal_area *area;</div><div class='del'>-	int ret = -ENOMEM;</div><div class='del'>-	unsigned long addr;</div><div class='del'>-</div><div class='del'>-	if (is_kdump_kernel())</div><div class='del'>-		rtas_call(ptcal_stop_tok, 1, 1, NULL, nid);</div><div class='del'>-</div><div class='del'>-	area = kmalloc(sizeof(*area), GFP_KERNEL);</div><div class='del'>-	if (!area)</div><div class='del'>-		goto out_err;</div><div class='del'>-</div><div class='del'>-	area-&gt;nid = nid;</div><div class='del'>-	area-&gt;order = order;</div><div class='del'>-	area-&gt;pages = __alloc_pages_node(area-&gt;nid,</div><div class='del'>-						GFP_KERNEL|__GFP_THISNODE,</div><div class='del'>-						area-&gt;order);</div><div class='del'>-</div><div class='del'>-	if (!area-&gt;pages) {</div><div class='del'>-		printk(KERN_WARNING "%s: no page on node %d\n",</div><div class='del'>-			__func__, area-&gt;nid);</div><div class='del'>-		goto out_free_area;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We move the ptcal area to the middle of the allocated</div><div class='del'>-	 * page, in order to avoid prefetches in memcpy and similar</div><div class='del'>-	 * functions stepping on it.</div><div class='del'>-	 */</div><div class='del'>-	addr = __pa(page_address(area-&gt;pages)) + (PAGE_SIZE &gt;&gt; 1);</div><div class='del'>-	printk(KERN_DEBUG "%s: enabling PTCAL on node %d address=0x%016lx\n",</div><div class='del'>-			__func__, area-&gt;nid, addr);</div><div class='del'>-</div><div class='del'>-	ret = -EIO;</div><div class='del'>-	if (rtas_call(ptcal_start_tok, 3, 1, NULL, area-&gt;nid,</div><div class='del'>-				(unsigned int)(addr &gt;&gt; 32),</div><div class='del'>-				(unsigned int)(addr &amp; 0xffffffff))) {</div><div class='del'>-		printk(KERN_ERR "%s: error enabling PTCAL on node %d!\n",</div><div class='del'>-				__func__, nid);</div><div class='del'>-		goto out_free_pages;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	list_add(&amp;area-&gt;list, &amp;ptcal_list);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_free_pages:</div><div class='del'>-	__free_pages(area-&gt;pages, area-&gt;order);</div><div class='del'>-out_free_area:</div><div class='del'>-	kfree(area);</div><div class='del'>-out_err:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cbe_ptcal_enable(void)</div><div class='del'>-{</div><div class='del'>-	const u32 *size;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	int order, found_mic = 0;</div><div class='del'>-</div><div class='del'>-	np = of_find_node_by_path("/rtas");</div><div class='del'>-	if (!np)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	size = of_get_property(np, "ibm,cbe-ptcal-size", NULL);</div><div class='del'>-	if (!size) {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: enabling PTCAL, size = 0x%x\n", __func__, *size);</div><div class='del'>-	order = get_order(*size);</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	/* support for malta device trees, with be@/mic@ nodes */</div><div class='del'>-	for_each_node_by_type(np, "mic-tm") {</div><div class='del'>-		cbe_ptcal_enable_on_node(of_node_to_nid(np), order);</div><div class='del'>-		found_mic = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (found_mic)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* support for older device tree - use cpu nodes */</div><div class='del'>-	for_each_node_by_type(np, "cpu") {</div><div class='del'>-		const u32 *nid = of_get_property(np, "node-id", NULL);</div><div class='del'>-		if (!nid) {</div><div class='del'>-			printk(KERN_ERR "%s: node %pOF is missing node-id?\n",</div><div class='del'>-					__func__, np);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		cbe_ptcal_enable_on_node(*nid, order);</div><div class='del'>-		found_mic = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return found_mic ? 0 : -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cbe_ptcal_disable(void)</div><div class='del'>-{</div><div class='del'>-	struct ptcal_area *area, *tmp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: disabling PTCAL\n", __func__);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(area, tmp, &amp;ptcal_list, list) {</div><div class='del'>-		/* disable ptcal on this node */</div><div class='del'>-		if (rtas_call(ptcal_stop_tok, 1, 1, NULL, area-&gt;nid)) {</div><div class='del'>-			printk(KERN_ERR "%s: error disabling PTCAL "</div><div class='del'>-					"on node %d!\n", __func__,</div><div class='del'>-					area-&gt;nid);</div><div class='del'>-			ret = -EIO;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* ensure we can access the PTCAL area */</div><div class='del'>-		memset(page_address(area-&gt;pages), 0,</div><div class='del'>-				1 &lt;&lt; (area-&gt;order + PAGE_SHIFT));</div><div class='del'>-</div><div class='del'>-		/* clean up */</div><div class='del'>-		list_del(&amp;area-&gt;list);</div><div class='del'>-		__free_pages(area-&gt;pages, area-&gt;order);</div><div class='del'>-		kfree(area);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cbe_ptcal_notify_reboot(struct notifier_block *nb,</div><div class='del'>-		unsigned long code, void *data)</div><div class='del'>-{</div><div class='del'>-	return cbe_ptcal_disable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cbe_ptcal_crash_shutdown(void)</div><div class='del'>-{</div><div class='del'>-	cbe_ptcal_disable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct notifier_block cbe_ptcal_reboot_notifier = {</div><div class='del'>-	.notifier_call = cbe_ptcal_notify_reboot</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_IBM_CELL_RESETBUTTON</div><div class='del'>-static int sysreset_hack;</div><div class='del'>-</div><div class='del'>-static int __init cbe_sysreset_init(void)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_regs __iomem *regs;</div><div class='del'>-</div><div class='del'>-	sysreset_hack = of_machine_is_compatible("IBM,CBPLUS-1.0");</div><div class='del'>-	if (!sysreset_hack)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	regs = cbe_get_cpu_pmd_regs(0);</div><div class='del'>-	if (!regs)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Enable JTAG system-reset hack */</div><div class='del'>-	out_be32(&amp;regs-&gt;fir_mode_reg,</div><div class='del'>-		in_be32(&amp;regs-&gt;fir_mode_reg) |</div><div class='del'>-		CBE_PMD_FIR_MODE_M8);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-device_initcall(cbe_sysreset_init);</div><div class='del'>-</div><div class='del'>-int cbe_sysreset_hack(void)</div><div class='del'>-{</div><div class='del'>-	struct cbe_pmd_regs __iomem *regs;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The BMC can inject user triggered system reset exceptions,</div><div class='del'>-	 * but cannot set the system reset reason in srr1,</div><div class='del'>-	 * so check an extra register here.</div><div class='del'>-	 */</div><div class='del'>-	if (sysreset_hack &amp;&amp; (smp_processor_id() == 0)) {</div><div class='del'>-		regs = cbe_get_cpu_pmd_regs(0);</div><div class='del'>-		if (!regs)</div><div class='del'>-			return 0;</div><div class='del'>-		if (in_be64(&amp;regs-&gt;ras_esc_0) &amp; 0x0000ffff) {</div><div class='del'>-			out_be64(&amp;regs-&gt;ras_esc_0, 0);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PPC_IBM_CELL_RESETBUTTON */</div><div class='del'>-</div><div class='del'>-static int __init cbe_ptcal_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	ptcal_start_tok = rtas_function_token(RTAS_FN_IBM_CBE_START_PTCAL);</div><div class='del'>-	ptcal_stop_tok = rtas_function_token(RTAS_FN_IBM_CBE_STOP_PTCAL);</div><div class='del'>-</div><div class='del'>-	if (ptcal_start_tok == RTAS_UNKNOWN_SERVICE</div><div class='del'>-			|| ptcal_stop_tok == RTAS_UNKNOWN_SERVICE)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ret = register_reboot_notifier(&amp;cbe_ptcal_reboot_notifier);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out1;</div><div class='del'>-</div><div class='del'>-	ret = crash_shutdown_register(&amp;cbe_ptcal_crash_shutdown);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out2;</div><div class='del'>-</div><div class='del'>-	return cbe_ptcal_enable();</div><div class='del'>-</div><div class='del'>-out2:</div><div class='del'>-	unregister_reboot_notifier(&amp;cbe_ptcal_reboot_notifier);</div><div class='del'>-out1:</div><div class='del'>-	printk(KERN_ERR "Can't disable PTCAL, so not enabling\n");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(cbe_ptcal_init);</div><div class='del'>-</div><div class='del'>-void __init cbe_ras_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long hid0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable System Error &amp; thermal interrupts and wakeup conditions</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	hid0 = mfspr(SPRN_HID0);</div><div class='del'>-	hid0 |= HID0_CBE_THERM_INT_EN | HID0_CBE_THERM_WAKEUP |</div><div class='del'>-		HID0_CBE_SYSERR_INT_EN | HID0_CBE_SYSERR_WAKEUP;</div><div class='del'>-	mtspr(SPRN_HID0, hid0);</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Install machine check handler. Leave setting of precise mode to</div><div class='del'>-	 * what the firmware did for now</div><div class='del'>-	 */</div><div class='del'>-	ppc_md.machine_check_exception = cbe_machine_check_handler;</div><div class='del'>-	mb();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For now, we assume that IOC_FIR is already set to forward some</div><div class='del'>-	 * error conditions to the System Error handler. If that is not true</div><div class='del'>-	 * then it will have to be fixed up here.</div><div class='del'>-	 */</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/ras.h b/arch/powerpc/platforms/cell/ras.h<br/>deleted file mode 100644<br/>index 226dbd48efad..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/ras.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/ras.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef RAS_H</div><div class='del'>-#define RAS_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/interrupt.h&gt;</div><div class='del'>-</div><div class='del'>-DECLARE_INTERRUPT_HANDLER(cbe_system_error_exception);</div><div class='del'>-DECLARE_INTERRUPT_HANDLER(cbe_maintenance_exception);</div><div class='del'>-DECLARE_INTERRUPT_HANDLER(cbe_thermal_exception);</div><div class='del'>-</div><div class='del'>-extern void cbe_ras_init(void);</div><div class='del'>-</div><div class='del'>-#endif /* RAS_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c<br/>deleted file mode 100644<br/>index f64a1ef98aa8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/setup.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,274 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/powerpc/platforms/cell/cell_setup.c</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995  Linus Torvalds</div><div class='del'>- *  Adapted from 'alpha' version by Gary Thomas</div><div class='del'>- *  Modified by Cort Dougan (cort@cs.nmt.edu)</div><div class='del'>- *  Modified by PPC64 Team, IBM Corp</div><div class='del'>- *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH</div><div class='del'>- */</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/unistd.h&gt;</div><div class='del'>-#include &lt;linux/user.h&gt;</div><div class='del'>-#include &lt;linux/reboot.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/root_dev.h&gt;</div><div class='del'>-#include &lt;linux/console.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/memory_hotplug.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mmu.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/rtas.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/iommu.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/nvram.h&gt;</div><div class='del'>-#include &lt;asm/cputable.h&gt;</div><div class='del'>-#include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/spu_priv1.h&gt;</div><div class='del'>-#include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/mpic.h&gt;</div><div class='del'>-#include &lt;asm/cell-regs.h&gt;</div><div class='del'>-#include &lt;asm/io-workarounds.h&gt;</div><div class='del'>-</div><div class='del'>-#include "cell.h"</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-#include "pervasive.h"</div><div class='del'>-#include "ras.h"</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(fmt...) udbg_printf(fmt)</div><div class='del'>-#else</div><div class='del'>-#define DBG(fmt...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void cell_show_cpuinfo(struct seq_file *m)</div><div class='del'>-{</div><div class='del'>-	struct device_node *root;</div><div class='del'>-	const char *model = "";</div><div class='del'>-</div><div class='del'>-	root = of_find_node_by_path("/");</div><div class='del'>-	if (root)</div><div class='del'>-		model = of_get_property(root, "model", NULL);</div><div class='del'>-	seq_printf(m, "machine\t\t: CHRP %s\n", model);</div><div class='del'>-	of_node_put(root);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cell_progress(char *s, unsigned short hex)</div><div class='del'>-{</div><div class='del'>-	printk("*** %04x : %s\n", hex, s ? s : "");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cell_fixup_pcie_rootcomplex(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	const char *s;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!machine_is(cell))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* We're searching for a direct child of the PHB */</div><div class='del'>-	if (dev-&gt;bus-&gt;self != NULL || dev-&gt;devfn != 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Only on PCIE */</div><div class='del'>-	if (!of_device_is_compatible(hose-&gt;dn, "pciex"))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* And only on axon */</div><div class='del'>-	s = of_get_property(hose-&gt;dn, "model", NULL);</div><div class='del'>-	if (!s || strcmp(s, "Axon") != 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PCI_BRIDGE_RESOURCES; i++) {</div><div class='del'>-		dev-&gt;resource[i].start = dev-&gt;resource[i].end = 0;</div><div class='del'>-		dev-&gt;resource[i].flags = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "PCI: Hiding resources on Axon PCIE RC %s\n",</div><div class='del'>-	       pci_name(dev));</div><div class='del'>-}</div><div class='del'>-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, cell_fixup_pcie_rootcomplex);</div><div class='del'>-</div><div class='del'>-static int cell_setup_phb(struct pci_controller *phb)</div><div class='del'>-{</div><div class='del'>-	const char *model;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	int rc = rtas_setup_phb(phb);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	phb-&gt;controller_ops = cell_pci_controller_ops;</div><div class='del'>-</div><div class='del'>-	np = phb-&gt;dn;</div><div class='del'>-	model = of_get_property(np, "model", NULL);</div><div class='del'>-	if (model == NULL || !of_node_name_eq(np, "pci"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Setup workarounds for spider */</div><div class='del'>-	if (strcmp(model, "Spider"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	iowa_register_bus(phb, &amp;spiderpci_ops, &amp;spiderpci_iowa_init,</div><div class='del'>-				  (void *)SPIDER_PCI_REG_BASE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct of_device_id cell_bus_ids[] __initconst = {</div><div class='del'>-	{ .type = "soc", },</div><div class='del'>-	{ .compatible = "soc", },</div><div class='del'>-	{ .type = "spider", },</div><div class='del'>-	{ .type = "axon", },</div><div class='del'>-	{ .type = "plb5", },</div><div class='del'>-	{ .type = "plb4", },</div><div class='del'>-	{ .type = "opb", },</div><div class='del'>-	{ .type = "ebc", },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init cell_publish_devices(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *root = of_find_node_by_path("/");</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	int node;</div><div class='del'>-</div><div class='del'>-	/* Publish OF platform devices for southbridge IOs */</div><div class='del'>-	of_platform_bus_probe(NULL, cell_bus_ids, NULL);</div><div class='del'>-</div><div class='del'>-	/* On spider based blades, we need to manually create the OF</div><div class='del'>-	 * platform devices for the PCI host bridges</div><div class='del'>-	 */</div><div class='del'>-	for_each_child_of_node(root, np) {</div><div class='del'>-		if (!of_node_is_type(np, "pci") &amp;&amp; !of_node_is_type(np, "pciex"))</div><div class='del'>-			continue;</div><div class='del'>-		of_platform_device_create(np, NULL, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	of_node_put(root);</div><div class='del'>-</div><div class='del'>-	/* There is no device for the MIC memory controller, thus we create</div><div class='del'>-	 * a platform device for it to attach the EDAC driver to.</div><div class='del'>-	 */</div><div class='del'>-	for_each_online_node(node) {</div><div class='del'>-		if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)</div><div class='del'>-			continue;</div><div class='del'>-		platform_device_register_simple("cbe-mic", node, NULL, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-machine_subsys_initcall(cell, cell_publish_devices);</div><div class='del'>-</div><div class='del'>-static void __init mpic_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	struct mpic *mpic;</div><div class='del'>-</div><div class='del'>-	for_each_node_by_name(dn, "interrupt-controller") {</div><div class='del'>-		if (!of_device_is_compatible(dn, "CBEA,platform-open-pic"))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* The MPIC driver will get everything it needs from the</div><div class='del'>-		 * device-tree, just pass 0 to all arguments</div><div class='del'>-		 */</div><div class='del'>-		mpic = mpic_alloc(dn, 0, MPIC_SECONDARY | MPIC_NO_RESET,</div><div class='del'>-				0, 0, " MPIC     ");</div><div class='del'>-		if (mpic == NULL)</div><div class='del'>-			continue;</div><div class='del'>-		mpic_init(mpic);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __init cell_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	iic_init_IRQ();</div><div class='del'>-	spider_init_IRQ();</div><div class='del'>-	mpic_init_IRQ();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_set_dabrx(void)</div><div class='del'>-{</div><div class='del'>-	mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init cell_setup_arch(void)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_SPU_BASE</div><div class='del'>-	spu_priv1_ops = &amp;spu_priv1_mmio_ops;</div><div class='del'>-	spu_management_ops = &amp;spu_management_of_ops;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	cbe_regs_init();</div><div class='del'>-</div><div class='del'>-	cell_set_dabrx();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CBE_RAS</div><div class='del'>-	cbe_ras_init();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	smp_init_cell();</div><div class='del'>-#endif</div><div class='del'>-	/* init to some ~sane value until calibrate_delay() runs */</div><div class='del'>-	loops_per_jiffy = 50000000;</div><div class='del'>-</div><div class='del'>-	/* Find and initialize PCI host bridges */</div><div class='del'>-	init_pci_config_tokens();</div><div class='del'>-</div><div class='del'>-	cbe_pervasive_init();</div><div class='del'>-</div><div class='del'>-	mmio_nvram_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cell_probe(void)</div><div class='del'>-{</div><div class='del'>-	if (!of_machine_is_compatible("IBM,CBEA") &amp;&amp;</div><div class='del'>-	    !of_machine_is_compatible("IBM,CPBW-1.0"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pm_power_off = rtas_power_off;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-define_machine(cell) {</div><div class='del'>-	.name			= "Cell",</div><div class='del'>-	.probe			= cell_probe,</div><div class='del'>-	.setup_arch		= cell_setup_arch,</div><div class='del'>-	.show_cpuinfo		= cell_show_cpuinfo,</div><div class='del'>-	.restart		= rtas_restart,</div><div class='del'>-	.halt			= rtas_halt,</div><div class='del'>-	.get_boot_time		= rtas_get_boot_time,</div><div class='del'>-	.get_rtc_time		= rtas_get_rtc_time,</div><div class='del'>-	.set_rtc_time		= rtas_set_rtc_time,</div><div class='del'>-	.progress		= cell_progress,</div><div class='del'>-	.init_IRQ       	= cell_init_irq,</div><div class='del'>-	.pci_setup_phb		= cell_setup_phb,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pci_controller_ops cell_pci_controller_ops;</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c<br/>deleted file mode 100644<br/>index fee638fd8970..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/smp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,162 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * SMP support for BPA machines.</div><div class='del'>- *</div><div class='del'>- * Dave Engebretsen, Peter Bergner, and</div><div class='del'>- * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com</div><div class='del'>- *</div><div class='del'>- * Plus various changes from other IBM teams...</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/cache.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/atomic.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/smp.h&gt;</div><div class='del'>-#include &lt;asm/paca.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/cputable.h&gt;</div><div class='del'>-#include &lt;asm/firmware.h&gt;</div><div class='del'>-#include &lt;asm/rtas.h&gt;</div><div class='del'>-#include &lt;asm/cputhreads.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='del'>-</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-#include &lt;asm/udbg.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(fmt...) udbg_printf(fmt)</div><div class='del'>-#else</div><div class='del'>-#define DBG(fmt...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The Primary thread of each non-boot processor was started from the OF client</div><div class='del'>- * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop.</div><div class='del'>- */</div><div class='del'>-static cpumask_t of_spin_map;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * smp_startup_cpu() - start the given cpu</div><div class='del'>- * @lcpu: Logical CPU ID of the CPU to be started.</div><div class='del'>- *</div><div class='del'>- * At boot time, there is nothing to do for primary threads which were</div><div class='del'>- * started from Open Firmware.  For anything else, call RTAS with the</div><div class='del'>- * appropriate start location.</div><div class='del'>- *</div><div class='del'>- * Returns:</div><div class='del'>- *	0	- failure</div><div class='del'>- *	1	- success</div><div class='del'>- */</div><div class='del'>-static inline int smp_startup_cpu(unsigned int lcpu)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	unsigned long start_here =</div><div class='del'>-			__pa(ppc_function_entry(generic_secondary_smp_init));</div><div class='del'>-	unsigned int pcpu;</div><div class='del'>-	int start_cpu;</div><div class='del'>-</div><div class='del'>-	if (cpumask_test_cpu(lcpu, &amp;of_spin_map))</div><div class='del'>-		/* Already started by OF and sitting in spin loop */</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	pcpu = get_hard_smp_processor_id(lcpu);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the RTAS start-cpu token does not exist then presume the</div><div class='del'>-	 * cpu is already spinning.</div><div class='del'>-	 */</div><div class='del'>-	start_cpu = rtas_function_token(RTAS_FN_START_CPU);</div><div class='del'>-	if (start_cpu == RTAS_UNKNOWN_SERVICE)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);</div><div class='del'>-	if (status != 0) {</div><div class='del'>-		printk(KERN_ERR "start-cpu failed: %i\n", status);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void smp_cell_setup_cpu(int cpu)</div><div class='del'>-{</div><div class='del'>-	if (cpu != boot_cpuid)</div><div class='del'>-		iic_setup_cpu();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * change default DABRX to allow user watchpoints</div><div class='del'>-	 */</div><div class='del'>-	mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smp_cell_kick_cpu(int nr)</div><div class='del'>-{</div><div class='del'>-	if (nr &lt; 0 || nr &gt;= nr_cpu_ids)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!smp_startup_cpu(nr))</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The processor is currently spinning, waiting for the</div><div class='del'>-	 * cpu_start field to become non-zero After we set cpu_start,</div><div class='del'>-	 * the processor will continue on to secondary_start</div><div class='del'>-	 */</div><div class='del'>-	paca_ptrs[nr]-&gt;cpu_start = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct smp_ops_t bpa_iic_smp_ops = {</div><div class='del'>-	.message_pass	= iic_message_pass,</div><div class='del'>-	.probe		= iic_request_IPIs,</div><div class='del'>-	.kick_cpu	= smp_cell_kick_cpu,</div><div class='del'>-	.setup_cpu	= smp_cell_setup_cpu,</div><div class='del'>-	.cpu_bootable	= smp_generic_cpu_bootable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* This is called very early */</div><div class='del'>-void __init smp_init_cell(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	DBG(" -&gt; smp_init_cell()\n");</div><div class='del'>-</div><div class='del'>-	smp_ops = &amp;bpa_iic_smp_ops;</div><div class='del'>-</div><div class='del'>-	/* Mark threads which are still spinning in hold loops. */</div><div class='del'>-	if (cpu_has_feature(CPU_FTR_SMT)) {</div><div class='del'>-		for_each_present_cpu(i) {</div><div class='del'>-			if (cpu_thread_in_core(i) == 0)</div><div class='del'>-				cpumask_set_cpu(i, &amp;of_spin_map);</div><div class='del'>-		}</div><div class='del'>-	} else</div><div class='del'>-		cpumask_copy(&amp;of_spin_map, cpu_present_mask);</div><div class='del'>-</div><div class='del'>-	cpumask_clear_cpu(boot_cpuid, &amp;of_spin_map);</div><div class='del'>-</div><div class='del'>-	/* Non-lpar has additional take/give timebase */</div><div class='del'>-	if (rtas_function_token(RTAS_FN_FREEZE_TIME_BASE) != RTAS_UNKNOWN_SERVICE) {</div><div class='del'>-		smp_ops-&gt;give_timebase = rtas_give_timebase;</div><div class='del'>-		smp_ops-&gt;take_timebase = rtas_take_timebase;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(" &lt;- smp_init_cell()\n");</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spider-pci.c b/arch/powerpc/platforms/cell/spider-pci.c<br/>deleted file mode 100644<br/>index 68439445b1c3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spider-pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spider-pci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,170 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * IO workarounds for PCI on Celleb/Cell platform</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2006-2007 TOSHIBA CORPORATION</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/io-workarounds.h&gt;</div><div class='del'>-</div><div class='del'>-#define SPIDER_PCI_DISABLE_PREFETCH</div><div class='del'>-</div><div class='del'>-struct spiderpci_iowa_private {</div><div class='del'>-	void __iomem *regs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void spiderpci_io_flush(struct iowa_bus *bus)</div><div class='del'>-{</div><div class='del'>-	struct spiderpci_iowa_private *priv;</div><div class='del'>-</div><div class='del'>-	priv = bus-&gt;private;</div><div class='del'>-	in_be32(priv-&gt;regs + SPIDER_PCI_DUMMY_READ);</div><div class='del'>-	iosync();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SPIDER_PCI_MMIO_READ(name, ret)					\</div><div class='del'>-static ret spiderpci_##name(const PCI_IO_ADDR addr)			\</div><div class='del'>-{									\</div><div class='del'>-	ret val = __do_##name(addr);					\</div><div class='del'>-	spiderpci_io_flush(iowa_mem_find_bus(addr));			\</div><div class='del'>-	return val;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SPIDER_PCI_MMIO_READ_STR(name)					\</div><div class='del'>-static void spiderpci_##name(const PCI_IO_ADDR addr, void *buf, 	\</div><div class='del'>-			     unsigned long count)			\</div><div class='del'>-{									\</div><div class='del'>-	__do_##name(addr, buf, count);					\</div><div class='del'>-	spiderpci_io_flush(iowa_mem_find_bus(addr));			\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SPIDER_PCI_MMIO_READ(readb, u8)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readw, u16)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readl, u32)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readq, u64)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readw_be, u16)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readl_be, u32)</div><div class='del'>-SPIDER_PCI_MMIO_READ(readq_be, u64)</div><div class='del'>-SPIDER_PCI_MMIO_READ_STR(readsb)</div><div class='del'>-SPIDER_PCI_MMIO_READ_STR(readsw)</div><div class='del'>-SPIDER_PCI_MMIO_READ_STR(readsl)</div><div class='del'>-</div><div class='del'>-static void spiderpci_memcpy_fromio(void *dest, const PCI_IO_ADDR src,</div><div class='del'>-				    unsigned long n)</div><div class='del'>-{</div><div class='del'>-	__do_memcpy_fromio(dest, src, n);</div><div class='del'>-	spiderpci_io_flush(iowa_mem_find_bus(src));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spiderpci_pci_setup_chip(struct pci_controller *phb,</div><div class='del'>-					   void __iomem *regs)</div><div class='del'>-{</div><div class='del'>-	void *dummy_page_va;</div><div class='del'>-	dma_addr_t dummy_page_da;</div><div class='del'>-</div><div class='del'>-#ifdef SPIDER_PCI_DISABLE_PREFETCH</div><div class='del'>-	u32 val = in_be32(regs + SPIDER_PCI_VCI_CNTL_STAT);</div><div class='del'>-	pr_debug("SPIDER_IOWA:PVCI_Control_Status was 0x%08x\n", val);</div><div class='del'>-	out_be32(regs + SPIDER_PCI_VCI_CNTL_STAT, val | 0x8);</div><div class='del'>-#endif /* SPIDER_PCI_DISABLE_PREFETCH */</div><div class='del'>-</div><div class='del'>-	/* setup dummy read */</div><div class='del'>-	/*</div><div class='del'>-	 * On CellBlade, we can't know that which XDR memory is used by</div><div class='del'>-	 * kmalloc() to allocate dummy_page_va.</div><div class='del'>-	 * In order to improve the performance, the XDR which is used to</div><div class='del'>-	 * allocate dummy_page_va is the nearest the spider-pci.</div><div class='del'>-	 * We have to select the CBE which is the nearest the spider-pci</div><div class='del'>-	 * to allocate memory from the best XDR, but I don't know that</div><div class='del'>-	 * how to do.</div><div class='del'>-	 *</div><div class='del'>-	 * Celleb does not have this problem, because it has only one XDR.</div><div class='del'>-	 */</div><div class='del'>-	dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!dummy_page_va) {</div><div class='del'>-		pr_err("SPIDERPCI-IOWA:Alloc dummy_page_va failed.\n");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dummy_page_da = dma_map_single(phb-&gt;parent, dummy_page_va,</div><div class='del'>-				       PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-	if (dma_mapping_error(phb-&gt;parent, dummy_page_da)) {</div><div class='del'>-		pr_err("SPIDER-IOWA:Map dummy page filed.\n");</div><div class='del'>-		kfree(dummy_page_va);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	out_be32(regs + SPIDER_PCI_DUMMY_READ_BASE, dummy_page_da);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init spiderpci_iowa_init(struct iowa_bus *bus, void *data)</div><div class='del'>-{</div><div class='del'>-	void __iomem *regs = NULL;</div><div class='del'>-	struct spiderpci_iowa_private *priv;</div><div class='del'>-	struct device_node *np = bus-&gt;phb-&gt;dn;</div><div class='del'>-	struct resource r;</div><div class='del'>-	unsigned long offset = (unsigned long)data;</div><div class='del'>-</div><div class='del'>-	pr_debug("SPIDERPCI-IOWA:Bus initialize for spider(%pOF)\n",</div><div class='del'>-		 np);</div><div class='del'>-</div><div class='del'>-	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='del'>-	if (!priv) {</div><div class='del'>-		pr_err("SPIDERPCI-IOWA:"</div><div class='del'>-		       "Can't allocate struct spiderpci_iowa_private");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (of_address_to_resource(np, 0, &amp;r)) {</div><div class='del'>-		pr_err("SPIDERPCI-IOWA:Can't get resource.\n");</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	regs = ioremap(r.start + offset, SPIDER_PCI_REG_SIZE);</div><div class='del'>-	if (!regs) {</div><div class='del'>-		pr_err("SPIDERPCI-IOWA:ioremap failed.\n");</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-	priv-&gt;regs = regs;</div><div class='del'>-	bus-&gt;private = priv;</div><div class='del'>-</div><div class='del'>-	if (spiderpci_pci_setup_chip(bus-&gt;phb, regs))</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	kfree(priv);</div><div class='del'>-	bus-&gt;private = NULL;</div><div class='del'>-</div><div class='del'>-	if (regs)</div><div class='del'>-		iounmap(regs);</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct ppc_pci_io spiderpci_ops = {</div><div class='del'>-	.readb = spiderpci_readb,</div><div class='del'>-	.readw = spiderpci_readw,</div><div class='del'>-	.readl = spiderpci_readl,</div><div class='del'>-	.readq = spiderpci_readq,</div><div class='del'>-	.readw_be = spiderpci_readw_be,</div><div class='del'>-	.readl_be = spiderpci_readl_be,</div><div class='del'>-	.readq_be = spiderpci_readq_be,</div><div class='del'>-	.readsb = spiderpci_readsb,</div><div class='del'>-	.readsw = spiderpci_readsw,</div><div class='del'>-	.readsl = spiderpci_readsl,</div><div class='del'>-	.memcpy_fromio = spiderpci_memcpy_fromio,</div><div class='del'>-};</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c<br/>deleted file mode 100644<br/>index 11df737c8c6a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spider-pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spider-pic.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,344 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * External Interrupt Controller on Spider South Bridge</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *</div><div class='del'>- * Author: Arnd Bergmann &lt;arndb@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;linux/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-</div><div class='del'>-/* register layout taken from Spider spec, table 7.4-4 */</div><div class='del'>-enum {</div><div class='del'>-	TIR_DEN		= 0x004, /* Detection Enable Register */</div><div class='del'>-	TIR_MSK		= 0x084, /* Mask Level Register */</div><div class='del'>-	TIR_EDC		= 0x0c0, /* Edge Detection Clear Register */</div><div class='del'>-	TIR_PNDA	= 0x100, /* Pending Register A */</div><div class='del'>-	TIR_PNDB	= 0x104, /* Pending Register B */</div><div class='del'>-	TIR_CS		= 0x144, /* Current Status Register */</div><div class='del'>-	TIR_LCSA	= 0x150, /* Level Current Status Register A */</div><div class='del'>-	TIR_LCSB	= 0x154, /* Level Current Status Register B */</div><div class='del'>-	TIR_LCSC	= 0x158, /* Level Current Status Register C */</div><div class='del'>-	TIR_LCSD	= 0x15c, /* Level Current Status Register D */</div><div class='del'>-	TIR_CFGA	= 0x200, /* Setting Register A0 */</div><div class='del'>-	TIR_CFGB	= 0x204, /* Setting Register B0 */</div><div class='del'>-			/* 0x208 ... 0x3ff Setting Register An/Bn */</div><div class='del'>-	TIR_PPNDA	= 0x400, /* Packet Pending Register A */</div><div class='del'>-	TIR_PPNDB	= 0x404, /* Packet Pending Register B */</div><div class='del'>-	TIR_PIERA	= 0x408, /* Packet Output Error Register A */</div><div class='del'>-	TIR_PIERB	= 0x40c, /* Packet Output Error Register B */</div><div class='del'>-	TIR_PIEN	= 0x444, /* Packet Output Enable Register */</div><div class='del'>-	TIR_PIPND	= 0x454, /* Packet Output Pending Register */</div><div class='del'>-	TIRDID		= 0x484, /* Spider Device ID Register */</div><div class='del'>-	REISTIM		= 0x500, /* Reissue Command Timeout Time Setting */</div><div class='del'>-	REISTIMEN	= 0x504, /* Reissue Command Timeout Setting */</div><div class='del'>-	REISWAITEN	= 0x508, /* Reissue Wait Control*/</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define SPIDER_CHIP_COUNT	4</div><div class='del'>-#define SPIDER_SRC_COUNT	64</div><div class='del'>-#define SPIDER_IRQ_INVALID	63</div><div class='del'>-</div><div class='del'>-struct spider_pic {</div><div class='del'>-	struct irq_domain		*host;</div><div class='del'>-	void __iomem		*regs;</div><div class='del'>-	unsigned int		node_id;</div><div class='del'>-};</div><div class='del'>-static struct spider_pic spider_pics[SPIDER_CHIP_COUNT];</div><div class='del'>-</div><div class='del'>-static struct spider_pic *spider_irq_data_to_pic(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	return irq_data_get_irq_chip_data(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __iomem *spider_get_irq_config(struct spider_pic *pic,</div><div class='del'>-					   unsigned int src)</div><div class='del'>-{</div><div class='del'>-	return pic-&gt;regs + TIR_CFGA + 8 * src;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spider_unmask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct spider_pic *pic = spider_irq_data_to_pic(d);</div><div class='del'>-	void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));</div><div class='del'>-</div><div class='del'>-	out_be32(cfg, in_be32(cfg) | 0x30000000u);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spider_mask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct spider_pic *pic = spider_irq_data_to_pic(d);</div><div class='del'>-	void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));</div><div class='del'>-</div><div class='del'>-	out_be32(cfg, in_be32(cfg) &amp; ~0x30000000u);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spider_ack_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct spider_pic *pic = spider_irq_data_to_pic(d);</div><div class='del'>-	unsigned int src = irqd_to_hwirq(d);</div><div class='del'>-</div><div class='del'>-	/* Reset edge detection logic if necessary</div><div class='del'>-	 */</div><div class='del'>-	if (irqd_is_level_type(d))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Only interrupts 47 to 50 can be set to edge */</div><div class='del'>-	if (src &lt; 47 || src &gt; 50)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Perform the clear of the edge logic */</div><div class='del'>-	out_be32(pic-&gt;regs + TIR_EDC, 0x100 | (src &amp; 0xf));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spider_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='del'>-{</div><div class='del'>-	unsigned int sense = type &amp; IRQ_TYPE_SENSE_MASK;</div><div class='del'>-	struct spider_pic *pic = spider_irq_data_to_pic(d);</div><div class='del'>-	unsigned int hw = irqd_to_hwirq(d);</div><div class='del'>-	void __iomem *cfg = spider_get_irq_config(pic, hw);</div><div class='del'>-	u32 old_mask;</div><div class='del'>-	u32 ic;</div><div class='del'>-</div><div class='del'>-	/* Note that only level high is supported for most interrupts */</div><div class='del'>-	if (sense != IRQ_TYPE_NONE &amp;&amp; sense != IRQ_TYPE_LEVEL_HIGH &amp;&amp;</div><div class='del'>-	    (hw &lt; 47 || hw &gt; 50))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* Decode sense type */</div><div class='del'>-	switch(sense) {</div><div class='del'>-	case IRQ_TYPE_EDGE_RISING:</div><div class='del'>-		ic = 0x3;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_FALLING:</div><div class='del'>-		ic = 0x2;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_LEVEL_LOW:</div><div class='del'>-		ic = 0x0;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_LEVEL_HIGH:</div><div class='del'>-	case IRQ_TYPE_NONE:</div><div class='del'>-		ic = 0x1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Configure the source. One gross hack that was there before and</div><div class='del'>-	 * that I've kept around is the priority to the BE which I set to</div><div class='del'>-	 * be the same as the interrupt source number. I don't know whether</div><div class='del'>-	 * that's supposed to make any kind of sense however, we'll have to</div><div class='del'>-	 * decide that, but for now, I'm not changing the behaviour.</div><div class='del'>-	 */</div><div class='del'>-	old_mask = in_be32(cfg) &amp; 0x30000000u;</div><div class='del'>-	out_be32(cfg, old_mask | (ic &lt;&lt; 24) | (0x7 &lt;&lt; 16) |</div><div class='del'>-		 (pic-&gt;node_id &lt;&lt; 4) | 0xe);</div><div class='del'>-	out_be32(cfg + 4, (0x2 &lt;&lt; 16) | (hw &amp; 0xff));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip spider_pic = {</div><div class='del'>-	.name = "SPIDER",</div><div class='del'>-	.irq_unmask = spider_unmask_irq,</div><div class='del'>-	.irq_mask = spider_mask_irq,</div><div class='del'>-	.irq_ack = spider_ack_irq,</div><div class='del'>-	.irq_set_type = spider_set_irq_type,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int spider_host_map(struct irq_domain *h, unsigned int virq,</div><div class='del'>-			irq_hw_number_t hw)</div><div class='del'>-{</div><div class='del'>-	irq_set_chip_data(virq, h-&gt;host_data);</div><div class='del'>-	irq_set_chip_and_handler(virq, &amp;spider_pic, handle_level_irq);</div><div class='del'>-</div><div class='del'>-	/* Set default irq type */</div><div class='del'>-	irq_set_irq_type(virq, IRQ_TYPE_NONE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spider_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='del'>-			   const u32 *intspec, unsigned int intsize,</div><div class='del'>-			   irq_hw_number_t *out_hwirq, unsigned int *out_flags)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	/* Spider interrupts have 2 cells, first is the interrupt source,</div><div class='del'>-	 * second, well, I don't know for sure yet ... We mask the top bits</div><div class='del'>-	 * because old device-trees encode a node number in there</div><div class='del'>-	 */</div><div class='del'>-	*out_hwirq = intspec[0] &amp; 0x3f;</div><div class='del'>-	*out_flags = IRQ_TYPE_LEVEL_HIGH;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops spider_host_ops = {</div><div class='del'>-	.map = spider_host_map,</div><div class='del'>-	.xlate = spider_host_xlate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void spider_irq_cascade(struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='del'>-	struct spider_pic *pic = irq_desc_get_handler_data(desc);</div><div class='del'>-	unsigned int cs;</div><div class='del'>-</div><div class='del'>-	cs = in_be32(pic-&gt;regs + TIR_CS) &gt;&gt; 24;</div><div class='del'>-	if (cs != SPIDER_IRQ_INVALID)</div><div class='del'>-		generic_handle_domain_irq(pic-&gt;host, cs);</div><div class='del'>-</div><div class='del'>-	chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* For hooking up the cascade we have a problem. Our device-tree is</div><div class='del'>- * crap and we don't know on which BE iic interrupt we are hooked on at</div><div class='del'>- * least not the "standard" way. We can reconstitute it based on two</div><div class='del'>- * informations though: which BE node we are connected to and whether</div><div class='del'>- * we are connected to IOIF0 or IOIF1. Right now, we really only care</div><div class='del'>- * about the IBM cell blade and we know that its firmware gives us an</div><div class='del'>- * interrupt-map property which is pretty strange.</div><div class='del'>- */</div><div class='del'>-static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)</div><div class='del'>-{</div><div class='del'>-	unsigned int virq;</div><div class='del'>-	const u32 *imap, *tmp;</div><div class='del'>-	int imaplen, intsize, unit;</div><div class='del'>-	struct device_node *iic;</div><div class='del'>-	struct device_node *of_node;</div><div class='del'>-</div><div class='del'>-	of_node = irq_domain_get_of_node(pic-&gt;host);</div><div class='del'>-</div><div class='del'>-	/* First, we check whether we have a real "interrupts" in the device</div><div class='del'>-	 * tree in case the device-tree is ever fixed</div><div class='del'>-	 */</div><div class='del'>-	virq = irq_of_parse_and_map(of_node, 0);</div><div class='del'>-	if (virq)</div><div class='del'>-		return virq;</div><div class='del'>-</div><div class='del'>-	/* Now do the horrible hacks */</div><div class='del'>-	tmp = of_get_property(of_node, "#interrupt-cells", NULL);</div><div class='del'>-	if (tmp == NULL)</div><div class='del'>-		return 0;</div><div class='del'>-	intsize = *tmp;</div><div class='del'>-	imap = of_get_property(of_node, "interrupt-map", &amp;imaplen);</div><div class='del'>-	if (imap == NULL || imaplen &lt; (intsize + 1))</div><div class='del'>-		return 0;</div><div class='del'>-	iic = of_find_node_by_phandle(imap[intsize]);</div><div class='del'>-	if (iic == NULL)</div><div class='del'>-		return 0;</div><div class='del'>-	imap += intsize + 1;</div><div class='del'>-	tmp = of_get_property(iic, "#interrupt-cells", NULL);</div><div class='del'>-	if (tmp == NULL) {</div><div class='del'>-		of_node_put(iic);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	intsize = *tmp;</div><div class='del'>-	/* Assume unit is last entry of interrupt specifier */</div><div class='del'>-	unit = imap[intsize - 1];</div><div class='del'>-	/* Ok, we have a unit, now let's try to get the node */</div><div class='del'>-	tmp = of_get_property(iic, "ibm,interrupt-server-ranges", NULL);</div><div class='del'>-	if (tmp == NULL) {</div><div class='del'>-		of_node_put(iic);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	/* ugly as hell but works for now */</div><div class='del'>-	pic-&gt;node_id = (*tmp) &gt;&gt; 1;</div><div class='del'>-	of_node_put(iic);</div><div class='del'>-</div><div class='del'>-	/* Ok, now let's get cracking. You may ask me why I just didn't match</div><div class='del'>-	 * the iic host from the iic OF node, but that way I'm still compatible</div><div class='del'>-	 * with really really old old firmwares for which we don't have a node</div><div class='del'>-	 */</div><div class='del'>-	/* Manufacture an IIC interrupt number of class 2 */</div><div class='del'>-	virq = irq_create_mapping(NULL,</div><div class='del'>-				  (pic-&gt;node_id &lt;&lt; IIC_IRQ_NODE_SHIFT) |</div><div class='del'>-				  (2 &lt;&lt; IIC_IRQ_CLASS_SHIFT) |</div><div class='del'>-				  unit);</div><div class='del'>-	if (!virq)</div><div class='del'>-		printk(KERN_ERR "spider_pic: failed to map cascade !");</div><div class='del'>-	return virq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __init spider_init_one(struct device_node *of_node, int chip,</div><div class='del'>-				   unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	struct spider_pic *pic = &amp;spider_pics[chip];</div><div class='del'>-	int i, virq;</div><div class='del'>-</div><div class='del'>-	/* Map registers */</div><div class='del'>-	pic-&gt;regs = ioremap(addr, 0x1000);</div><div class='del'>-	if (pic-&gt;regs == NULL)</div><div class='del'>-		panic("spider_pic: can't map registers !");</div><div class='del'>-</div><div class='del'>-	/* Allocate a host */</div><div class='del'>-	pic-&gt;host = irq_domain_add_linear(of_node, SPIDER_SRC_COUNT,</div><div class='del'>-					  &amp;spider_host_ops, pic);</div><div class='del'>-	if (pic-&gt;host == NULL)</div><div class='del'>-		panic("spider_pic: can't allocate irq host !");</div><div class='del'>-</div><div class='del'>-	/* Go through all sources and disable them */</div><div class='del'>-	for (i = 0; i &lt; SPIDER_SRC_COUNT; i++) {</div><div class='del'>-		void __iomem *cfg = pic-&gt;regs + TIR_CFGA + 8 * i;</div><div class='del'>-		out_be32(cfg, in_be32(cfg) &amp; ~0x30000000u);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* do not mask any interrupts because of level */</div><div class='del'>-	out_be32(pic-&gt;regs + TIR_MSK, 0x0);</div><div class='del'>-</div><div class='del'>-	/* enable interrupt packets to be output */</div><div class='del'>-	out_be32(pic-&gt;regs + TIR_PIEN, in_be32(pic-&gt;regs + TIR_PIEN) | 0x1);</div><div class='del'>-</div><div class='del'>-	/* Hook up the cascade interrupt to the iic and nodeid */</div><div class='del'>-	virq = spider_find_cascade_and_node(pic);</div><div class='del'>-	if (!virq)</div><div class='del'>-		return;</div><div class='del'>-	irq_set_handler_data(virq, pic);</div><div class='del'>-	irq_set_chained_handler(virq, spider_irq_cascade);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %pOF\n",</div><div class='del'>-	       pic-&gt;node_id, addr, of_node);</div><div class='del'>-</div><div class='del'>-	/* Enable the interrupt detection enable bit. Do this last! */</div><div class='del'>-	out_be32(pic-&gt;regs + TIR_DEN, in_be32(pic-&gt;regs + TIR_DEN) | 0x1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init spider_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	struct resource r;</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	int chip = 0;</div><div class='del'>-</div><div class='del'>-	/* XXX node numbers are totally bogus. We _hope_ we get the device</div><div class='del'>-	 * nodes in the right order here but that's definitely not guaranteed,</div><div class='del'>-	 * we need to get the node from the device tree instead.</div><div class='del'>-	 * There is currently no proper property for it (but our whole</div><div class='del'>-	 * device-tree is bogus anyway) so all we can do is pray or maybe test</div><div class='del'>-	 * the address and deduce the node-id</div><div class='del'>-	 */</div><div class='del'>-	for_each_node_by_name(dn, "interrupt-controller") {</div><div class='del'>-		if (of_device_is_compatible(dn, "CBEA,platform-spider-pic")) {</div><div class='del'>-			if (of_address_to_resource(dn, 0, &amp;r)) {</div><div class='del'>-				printk(KERN_WARNING "spider-pic: Failed\n");</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-		} else if (of_device_is_compatible(dn, "sti,platform-spider-pic")</div><div class='del'>-			   &amp;&amp; (chip &lt; 2)) {</div><div class='del'>-			static long hard_coded_pics[] =</div><div class='del'>-				{ 0x24000008000ul, 0x34000008000ul};</div><div class='del'>-			r.start = hard_coded_pics[chip];</div><div class='del'>-		} else</div><div class='del'>-			continue;</div><div class='del'>-		spider_init_one(dn, chip++, r.start);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c<br/>index dea6f0f25897..2c07387201d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_base.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_base.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_base.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spu_base.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;asm/spu.h&gt;</div><div class='ctx'> #include &lt;asm/spu_priv1.h&gt;</div><div class='ctx'> #include &lt;asm/spu_csa.h&gt;</div><div class='del'>-#include &lt;asm/xmon.h&gt;</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='ctx'> </div><div class='ctx'> const struct spu_management_ops *spu_management_ops;</div><div class='hunk'>@@ -772,7 +771,6 @@ static int __init init_spu_base(void)</div><div class='ctx'> 		fb_append_extra_logo(&amp;logo_spe_clut224, ret);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;spu_full_list_mutex);</div><div class='del'>-	xmon_register_spus(&amp;spu_full_list);</div><div class='ctx'> 	crash_register_spus(&amp;spu_full_list);</div><div class='ctx'> 	mutex_unlock(&amp;spu_full_list_mutex);</div><div class='ctx'> 	spu_add_dev_attr(&amp;dev_attr_stat);</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c<br/>deleted file mode 100644<br/>index f464a1f2e568..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_manage.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_manage.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,530 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * spu management operations for of based platforms</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- * Copyright 2006 Sony Corp.</div><div class='del'>- * (C) Copyright 2007 TOSHIBA CORPORATION</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/spu_priv1.h&gt;</div><div class='del'>-#include &lt;asm/firmware.h&gt;</div><div class='del'>-</div><div class='del'>-#include "spufs/spufs.h"</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-#include "spu_priv1_mmio.h"</div><div class='del'>-</div><div class='del'>-struct device_node *spu_devnode(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return spu-&gt;devnode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL_GPL(spu_devnode);</div><div class='del'>-</div><div class='del'>-static u64 __init find_spu_unit_number(struct device_node *spe)</div><div class='del'>-{</div><div class='del'>-	const unsigned int *prop;</div><div class='del'>-	int proplen;</div><div class='del'>-</div><div class='del'>-	/* new device trees should provide the physical-id attribute */</div><div class='del'>-	prop = of_get_property(spe, "physical-id", &amp;proplen);</div><div class='del'>-	if (proplen == 4)</div><div class='del'>-		return (u64)*prop;</div><div class='del'>-</div><div class='del'>-	/* celleb device tree provides the unit-id */</div><div class='del'>-	prop = of_get_property(spe, "unit-id", &amp;proplen);</div><div class='del'>-	if (proplen == 4)</div><div class='del'>-		return (u64)*prop;</div><div class='del'>-</div><div class='del'>-	/* legacy device trees provide the id in the reg attribute */</div><div class='del'>-	prop = of_get_property(spe, "reg", &amp;proplen);</div><div class='del'>-	if (proplen == 4)</div><div class='del'>-		return (u64)*prop;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spu_unmap(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	if (!firmware_has_feature(FW_FEATURE_LPAR))</div><div class='del'>-		iounmap(spu-&gt;priv1);</div><div class='del'>-	iounmap(spu-&gt;priv2);</div><div class='del'>-	iounmap(spu-&gt;problem);</div><div class='del'>-	iounmap((__force u8 __iomem *)spu-&gt;local_store);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spu_map_interrupts_old(struct spu *spu,</div><div class='del'>-	struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	unsigned int isrc;</div><div class='del'>-	const u32 *tmp;</div><div class='del'>-	int nid;</div><div class='del'>-</div><div class='del'>-	/* Get the interrupt source unit from the device-tree */</div><div class='del'>-	tmp = of_get_property(np, "isrc", NULL);</div><div class='del'>-	if (!tmp)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	isrc = tmp[0];</div><div class='del'>-</div><div class='del'>-	tmp = of_get_property(np-&gt;parent-&gt;parent, "node-id", NULL);</div><div class='del'>-	if (!tmp) {</div><div class='del'>-		printk(KERN_WARNING "%s: can't find node-id\n", __func__);</div><div class='del'>-		nid = spu-&gt;node;</div><div class='del'>-	} else</div><div class='del'>-		nid = tmp[0];</div><div class='del'>-</div><div class='del'>-	/* Add the node number */</div><div class='del'>-	isrc |= nid &lt;&lt; IIC_IRQ_NODE_SHIFT;</div><div class='del'>-</div><div class='del'>-	/* Now map interrupts of all 3 classes */</div><div class='del'>-	spu-&gt;irqs[0] = irq_create_mapping(NULL, IIC_IRQ_CLASS_0 | isrc);</div><div class='del'>-	spu-&gt;irqs[1] = irq_create_mapping(NULL, IIC_IRQ_CLASS_1 | isrc);</div><div class='del'>-	spu-&gt;irqs[2] = irq_create_mapping(NULL, IIC_IRQ_CLASS_2 | isrc);</div><div class='del'>-</div><div class='del'>-	/* Right now, we only fail if class 2 failed */</div><div class='del'>-	if (!spu-&gt;irqs[2])</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __iomem * __init spu_map_prop_old(struct spu *spu,</div><div class='del'>-					      struct device_node *n,</div><div class='del'>-					      const char *name)</div><div class='del'>-{</div><div class='del'>-	const struct address_prop {</div><div class='del'>-		unsigned long address;</div><div class='del'>-		unsigned int len;</div><div class='del'>-	} __attribute__((packed)) *prop;</div><div class='del'>-	int proplen;</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(n, name, &amp;proplen);</div><div class='del'>-	if (prop == NULL || proplen != sizeof (struct address_prop))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return ioremap(prop-&gt;address, prop-&gt;len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spu_map_device_old(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	struct device_node *node = spu-&gt;devnode;</div><div class='del'>-	const char *prop;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = -ENODEV;</div><div class='del'>-	spu-&gt;name = of_get_property(node, "name", NULL);</div><div class='del'>-	if (!spu-&gt;name)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(node, "local-store", NULL);</div><div class='del'>-	if (!prop)</div><div class='del'>-		goto out;</div><div class='del'>-	spu-&gt;local_store_phys = *(unsigned long *)prop;</div><div class='del'>-</div><div class='del'>-	/* we use local store as ram, not io memory */</div><div class='del'>-	spu-&gt;local_store = (void __force *)</div><div class='del'>-		spu_map_prop_old(spu, node, "local-store");</div><div class='del'>-	if (!spu-&gt;local_store)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(node, "problem", NULL);</div><div class='del'>-	if (!prop)</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	spu-&gt;problem_phys = *(unsigned long *)prop;</div><div class='del'>-</div><div class='del'>-	spu-&gt;problem = spu_map_prop_old(spu, node, "problem");</div><div class='del'>-	if (!spu-&gt;problem)</div><div class='del'>-		goto out_unmap;</div><div class='del'>-</div><div class='del'>-	spu-&gt;priv2 = spu_map_prop_old(spu, node, "priv2");</div><div class='del'>-	if (!spu-&gt;priv2)</div><div class='del'>-		goto out_unmap;</div><div class='del'>-</div><div class='del'>-	if (!firmware_has_feature(FW_FEATURE_LPAR)) {</div><div class='del'>-		spu-&gt;priv1 = spu_map_prop_old(spu, node, "priv1");</div><div class='del'>-		if (!spu-&gt;priv1)</div><div class='del'>-			goto out_unmap;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_unmap:</div><div class='del'>-	spu_unmap(spu);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i=0; i &lt; 3; i++) {</div><div class='del'>-		spu-&gt;irqs[i] = irq_of_parse_and_map(np, i);</div><div class='del'>-		if (!spu-&gt;irqs[i])</div><div class='del'>-			goto err;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	pr_debug("failed to map irq %x for spu %s\n", i, spu-&gt;name);</div><div class='del'>-	for (; i &gt;= 0; i--) {</div><div class='del'>-		if (spu-&gt;irqs[i])</div><div class='del'>-			irq_dispose_mapping(spu-&gt;irqs[i]);</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spu_map_resource(struct spu *spu, int nr,</div><div class='del'>-			    void __iomem** virt, unsigned long *phys)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np = spu-&gt;devnode;</div><div class='del'>-	struct resource resource = { };</div><div class='del'>-	unsigned long len;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = of_address_to_resource(np, nr, &amp;resource);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	if (phys)</div><div class='del'>-		*phys = resource.start;</div><div class='del'>-	len = resource_size(&amp;resource);</div><div class='del'>-	*virt = ioremap(resource.start, len);</div><div class='del'>-	if (!*virt)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init spu_map_device(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np = spu-&gt;devnode;</div><div class='del'>-	int ret = -ENODEV;</div><div class='del'>-</div><div class='del'>-	spu-&gt;name = of_get_property(np, "name", NULL);</div><div class='del'>-	if (!spu-&gt;name)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = spu_map_resource(spu, 0, (void __iomem**)&amp;spu-&gt;local_store,</div><div class='del'>-			       &amp;spu-&gt;local_store_phys);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_debug("spu_new: failed to map %pOF resource 0\n",</div><div class='del'>-			 np);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	ret = spu_map_resource(spu, 1, (void __iomem**)&amp;spu-&gt;problem,</div><div class='del'>-			       &amp;spu-&gt;problem_phys);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_debug("spu_new: failed to map %pOF resource 1\n",</div><div class='del'>-			 np);</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='del'>-	ret = spu_map_resource(spu, 2, (void __iomem**)&amp;spu-&gt;priv2, NULL);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_debug("spu_new: failed to map %pOF resource 2\n",</div><div class='del'>-			 np);</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='del'>-	if (!firmware_has_feature(FW_FEATURE_LPAR))</div><div class='del'>-		ret = spu_map_resource(spu, 3,</div><div class='del'>-			       (void __iomem**)&amp;spu-&gt;priv1, NULL);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_debug("spu_new: failed to map %pOF resource 3\n",</div><div class='del'>-			 np);</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='del'>-	pr_debug("spu_new: %pOF maps:\n", np);</div><div class='del'>-	pr_debug("  local store   : 0x%016lx -&gt; 0x%p\n",</div><div class='del'>-		 spu-&gt;local_store_phys, spu-&gt;local_store);</div><div class='del'>-	pr_debug("  problem state : 0x%016lx -&gt; 0x%p\n",</div><div class='del'>-		 spu-&gt;problem_phys, spu-&gt;problem);</div><div class='del'>-	pr_debug("  priv2         :                       0x%p\n", spu-&gt;priv2);</div><div class='del'>-	pr_debug("  priv1         :                       0x%p\n", spu-&gt;priv1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_unmap:</div><div class='del'>-	spu_unmap(spu);</div><div class='del'>-out:</div><div class='del'>-	pr_debug("failed to map spe %s: %d\n", spu-&gt;name, ret);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init of_enumerate_spus(int (*fn)(void *data))</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct device_node *node;</div><div class='del'>-	unsigned int n = 0;</div><div class='del'>-</div><div class='del'>-	ret = -ENODEV;</div><div class='del'>-	for_each_node_by_type(node, "spe") {</div><div class='del'>-		ret = fn(node);</div><div class='del'>-		if (ret) {</div><div class='del'>-			printk(KERN_WARNING "%s: Error initializing %pOFn\n",</div><div class='del'>-				__func__, node);</div><div class='del'>-			of_node_put(node);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		n++;</div><div class='del'>-	}</div><div class='del'>-	return ret ? ret : n;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init of_create_spu(struct spu *spu, void *data)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct device_node *spe = (struct device_node *)data;</div><div class='del'>-	static int legacy_map = 0, legacy_irq = 0;</div><div class='del'>-</div><div class='del'>-	spu-&gt;devnode = of_node_get(spe);</div><div class='del'>-	spu-&gt;spe_id = find_spu_unit_number(spe);</div><div class='del'>-</div><div class='del'>-	spu-&gt;node = of_node_to_nid(spe);</div><div class='del'>-	if (spu-&gt;node &gt;= MAX_NUMNODES) {</div><div class='del'>-		printk(KERN_WARNING "SPE %pOF on node %d ignored,"</div><div class='del'>-		       " node number too big\n", spe, spu-&gt;node);</div><div class='del'>-		printk(KERN_WARNING "Check if CONFIG_NUMA is enabled.\n");</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = spu_map_device(spu);</div><div class='del'>-	if (ret) {</div><div class='del'>-		if (!legacy_map) {</div><div class='del'>-			legacy_map = 1;</div><div class='del'>-			printk(KERN_WARNING "%s: Legacy device tree found, "</div><div class='del'>-				"trying to map old style\n", __func__);</div><div class='del'>-		}</div><div class='del'>-		ret = spu_map_device_old(spu);</div><div class='del'>-		if (ret) {</div><div class='del'>-			printk(KERN_ERR "Unable to map %s\n",</div><div class='del'>-				spu-&gt;name);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = spu_map_interrupts(spu, spe);</div><div class='del'>-	if (ret) {</div><div class='del'>-		if (!legacy_irq) {</div><div class='del'>-			legacy_irq = 1;</div><div class='del'>-			printk(KERN_WARNING "%s: Legacy device tree found, "</div><div class='del'>-				"trying old style irq\n", __func__);</div><div class='del'>-		}</div><div class='del'>-		ret = spu_map_interrupts_old(spu, spe);</div><div class='del'>-		if (ret) {</div><div class='del'>-			printk(KERN_ERR "%s: could not map interrupts\n",</div><div class='del'>-				spu-&gt;name);</div><div class='del'>-			goto out_unmap;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_debug("Using SPE %s %p %p %p %p %d\n", spu-&gt;name,</div><div class='del'>-		spu-&gt;local_store, spu-&gt;problem, spu-&gt;priv1,</div><div class='del'>-		spu-&gt;priv2, spu-&gt;number);</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_unmap:</div><div class='del'>-	spu_unmap(spu);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int of_destroy_spu(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	spu_unmap(spu);</div><div class='del'>-	of_node_put(spu-&gt;devnode);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enable_spu_by_master_run(struct spu_context *ctx)</div><div class='del'>-{</div><div class='del'>-	ctx-&gt;ops-&gt;master_start(ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void disable_spu_by_master_run(struct spu_context *ctx)</div><div class='del'>-{</div><div class='del'>-	ctx-&gt;ops-&gt;master_stop(ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Hardcoded affinity idxs for qs20 */</div><div class='del'>-#define QS20_SPES_PER_BE 8</div><div class='del'>-static int qs20_reg_idxs[QS20_SPES_PER_BE] =   { 0, 2, 4, 6, 7, 5, 3, 1 };</div><div class='del'>-static int qs20_reg_memory[QS20_SPES_PER_BE] = { 1, 1, 0, 0, 0, 0, 0, 0 };</div><div class='del'>-</div><div class='del'>-static struct spu *__init spu_lookup_reg(int node, u32 reg)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-	const u32 *spu_reg;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(spu, &amp;cbe_spu_info[node].spus, cbe_list) {</div><div class='del'>-		spu_reg = of_get_property(spu_devnode(spu), "reg", NULL);</div><div class='del'>-		if (*spu_reg == reg)</div><div class='del'>-			return spu;</div><div class='del'>-	}</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_affinity_qs20_harcoded(void)</div><div class='del'>-{</div><div class='del'>-	int node, i;</div><div class='del'>-	struct spu *last_spu, *spu;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	for (node = 0; node &lt; MAX_NUMNODES; node++) {</div><div class='del'>-		last_spu = NULL;</div><div class='del'>-		for (i = 0; i &lt; QS20_SPES_PER_BE; i++) {</div><div class='del'>-			reg = qs20_reg_idxs[i];</div><div class='del'>-			spu = spu_lookup_reg(node, reg);</div><div class='del'>-			if (!spu)</div><div class='del'>-				continue;</div><div class='del'>-			spu-&gt;has_mem_affinity = qs20_reg_memory[reg];</div><div class='del'>-			if (last_spu)</div><div class='del'>-				list_add_tail(&amp;spu-&gt;aff_list,</div><div class='del'>-						&amp;last_spu-&gt;aff_list);</div><div class='del'>-			last_spu = spu;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init of_has_vicinity(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-</div><div class='del'>-	for_each_node_by_type(dn, "spe") {</div><div class='del'>-		if (of_property_present(dn, "vicinity"))  {</div><div class='del'>-			of_node_put(dn);</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct spu *__init devnode_spu(int cbe, struct device_node *dn)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(spu, &amp;cbe_spu_info[cbe].spus, cbe_list)</div><div class='del'>-		if (spu_devnode(spu) == dn)</div><div class='del'>-			return spu;</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct spu * __init</div><div class='del'>-neighbour_spu(int cbe, struct device_node *target, struct device_node *avoid)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-	struct device_node *spu_dn;</div><div class='del'>-	const phandle *vic_handles;</div><div class='del'>-	int lenp, i;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(spu, &amp;cbe_spu_info[cbe].spus, cbe_list) {</div><div class='del'>-		spu_dn = spu_devnode(spu);</div><div class='del'>-		if (spu_dn == avoid)</div><div class='del'>-			continue;</div><div class='del'>-		vic_handles = of_get_property(spu_dn, "vicinity", &amp;lenp);</div><div class='del'>-		for (i=0; i &lt; (lenp / sizeof(phandle)); i++) {</div><div class='del'>-			if (vic_handles[i] == target-&gt;phandle)</div><div class='del'>-				return spu;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_affinity_node(int cbe)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu, *last_spu;</div><div class='del'>-	struct device_node *vic_dn, *last_spu_dn;</div><div class='del'>-	phandle avoid_ph;</div><div class='del'>-	const phandle *vic_handles;</div><div class='del'>-	int lenp, i, added;</div><div class='del'>-</div><div class='del'>-	last_spu = list_first_entry(&amp;cbe_spu_info[cbe].spus, struct spu,</div><div class='del'>-								cbe_list);</div><div class='del'>-	avoid_ph = 0;</div><div class='del'>-	for (added = 1; added &lt; cbe_spu_info[cbe].n_spus; added++) {</div><div class='del'>-		last_spu_dn = spu_devnode(last_spu);</div><div class='del'>-		vic_handles = of_get_property(last_spu_dn, "vicinity", &amp;lenp);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Walk through each phandle in vicinity property of the spu</div><div class='del'>-		 * (typically two vicinity phandles per spe node)</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; (lenp / sizeof(phandle)); i++) {</div><div class='del'>-			if (vic_handles[i] == avoid_ph)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			vic_dn = of_find_node_by_phandle(vic_handles[i]);</div><div class='del'>-			if (!vic_dn)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (of_node_name_eq(vic_dn, "spe") ) {</div><div class='del'>-				spu = devnode_spu(cbe, vic_dn);</div><div class='del'>-				avoid_ph = last_spu_dn-&gt;phandle;</div><div class='del'>-			} else {</div><div class='del'>-				/*</div><div class='del'>-				 * "mic-tm" and "bif0" nodes do not have</div><div class='del'>-				 * vicinity property. So we need to find the</div><div class='del'>-				 * spe which has vic_dn as neighbour, but</div><div class='del'>-				 * skipping the one we came from (last_spu_dn)</div><div class='del'>-				 */</div><div class='del'>-				spu = neighbour_spu(cbe, vic_dn, last_spu_dn);</div><div class='del'>-				if (!spu)</div><div class='del'>-					continue;</div><div class='del'>-				if (of_node_name_eq(vic_dn, "mic-tm")) {</div><div class='del'>-					last_spu-&gt;has_mem_affinity = 1;</div><div class='del'>-					spu-&gt;has_mem_affinity = 1;</div><div class='del'>-				}</div><div class='del'>-				avoid_ph = vic_dn-&gt;phandle;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			of_node_put(vic_dn);</div><div class='del'>-</div><div class='del'>-			list_add_tail(&amp;spu-&gt;aff_list, &amp;last_spu-&gt;aff_list);</div><div class='del'>-			last_spu = spu;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_affinity_fw(void)</div><div class='del'>-{</div><div class='del'>-	int cbe;</div><div class='del'>-</div><div class='del'>-	for (cbe = 0; cbe &lt; MAX_NUMNODES; cbe++)</div><div class='del'>-		init_affinity_node(cbe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init init_affinity(void)</div><div class='del'>-{</div><div class='del'>-	if (of_has_vicinity()) {</div><div class='del'>-		init_affinity_fw();</div><div class='del'>-	} else {</div><div class='del'>-		if (of_machine_is_compatible("IBM,CPBW-1.0"))</div><div class='del'>-			init_affinity_qs20_harcoded();</div><div class='del'>-		else</div><div class='del'>-			printk("No affinity configuration found\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct spu_management_ops spu_management_of_ops = {</div><div class='del'>-	.enumerate_spus = of_enumerate_spus,</div><div class='del'>-	.create_spu = of_create_spu,</div><div class='del'>-	.destroy_spu = of_destroy_spu,</div><div class='del'>-	.enable_spu = enable_spu_by_master_run,</div><div class='del'>-	.disable_spu = disable_spu_by_master_run,</div><div class='del'>-	.init_affinity = init_affinity,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c<br/>deleted file mode 100644<br/>index d150e3987304..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_priv1_mmio.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_priv1_mmio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,167 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * spu hypervisor abstraction for direct hardware access.</div><div class='del'>- *</div><div class='del'>- *  (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *  Copyright 2006 Sony Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/spu_priv1.h&gt;</div><div class='del'>-#include &lt;asm/firmware.h&gt;</div><div class='del'>-</div><div class='del'>-#include "interrupt.h"</div><div class='del'>-#include "spu_priv1_mmio.h"</div><div class='del'>-</div><div class='del'>-static void int_mask_and(struct spu *spu, int class, u64 mask)</div><div class='del'>-{</div><div class='del'>-	u64 old_mask;</div><div class='del'>-</div><div class='del'>-	old_mask = in_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class]);</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class], old_mask &amp; mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void int_mask_or(struct spu *spu, int class, u64 mask)</div><div class='del'>-{</div><div class='del'>-	u64 old_mask;</div><div class='del'>-</div><div class='del'>-	old_mask = in_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class]);</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class], old_mask | mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void int_mask_set(struct spu *spu, int class, u64 mask)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class], mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 int_mask_get(struct spu *spu, int class)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;int_mask_RW[class]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void int_stat_clear(struct spu *spu, int class, u64 stat)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;int_stat_RW[class], stat);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 int_stat_get(struct spu *spu, int class)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;int_stat_RW[class]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpu_affinity_set(struct spu *spu, int cpu)</div><div class='del'>-{</div><div class='del'>-	u64 target;</div><div class='del'>-	u64 route;</div><div class='del'>-</div><div class='del'>-	if (nr_cpus_node(spu-&gt;node)) {</div><div class='del'>-		const struct cpumask *spumask = cpumask_of_node(spu-&gt;node),</div><div class='del'>-			*cpumask = cpumask_of_node(cpu_to_node(cpu));</div><div class='del'>-</div><div class='del'>-		if (!cpumask_intersects(spumask, cpumask))</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	target = iic_get_target_id(cpu);</div><div class='del'>-	route = target &lt;&lt; 48 | target &lt;&lt; 32 | target &lt;&lt; 16;</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;int_route_RW, route);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 mfc_dar_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;mfc_dar_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 mfc_dsisr_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;mfc_dsisr_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mfc_dsisr_set(struct spu *spu, u64 dsisr)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;mfc_dsisr_RW, dsisr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mfc_sdr_setup(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;mfc_sdr_RW, mfspr(SPRN_SDR1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mfc_sr1_set(struct spu *spu, u64 sr1)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;mfc_sr1_RW, sr1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 mfc_sr1_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;mfc_sr1_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;mfc_tclass_id_RW, tclass_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 mfc_tclass_id_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;mfc_tclass_id_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tlb_invalidate(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;tlb_invalidate_entry_W, 0ul);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void resource_allocation_groupID_set(struct spu *spu, u64 id)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;resource_allocation_groupID_RW, id);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 resource_allocation_groupID_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;resource_allocation_groupID_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void resource_allocation_enable_set(struct spu *spu, u64 enable)</div><div class='del'>-{</div><div class='del'>-	out_be64(&amp;spu-&gt;priv1-&gt;resource_allocation_enable_RW, enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 resource_allocation_enable_get(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	return in_be64(&amp;spu-&gt;priv1-&gt;resource_allocation_enable_RW);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct spu_priv1_ops spu_priv1_mmio_ops =</div><div class='del'>-{</div><div class='del'>-	.int_mask_and = int_mask_and,</div><div class='del'>-	.int_mask_or = int_mask_or,</div><div class='del'>-	.int_mask_set = int_mask_set,</div><div class='del'>-	.int_mask_get = int_mask_get,</div><div class='del'>-	.int_stat_clear = int_stat_clear,</div><div class='del'>-	.int_stat_get = int_stat_get,</div><div class='del'>-	.cpu_affinity_set = cpu_affinity_set,</div><div class='del'>-	.mfc_dar_get = mfc_dar_get,</div><div class='del'>-	.mfc_dsisr_get = mfc_dsisr_get,</div><div class='del'>-	.mfc_dsisr_set = mfc_dsisr_set,</div><div class='del'>-	.mfc_sdr_setup = mfc_sdr_setup,</div><div class='del'>-	.mfc_sr1_set = mfc_sr1_set,</div><div class='del'>-	.mfc_sr1_get = mfc_sr1_get,</div><div class='del'>-	.mfc_tclass_id_set = mfc_tclass_id_set,</div><div class='del'>-	.mfc_tclass_id_get = mfc_tclass_id_get,</div><div class='del'>-	.tlb_invalidate = tlb_invalidate,</div><div class='del'>-	.resource_allocation_groupID_set = resource_allocation_groupID_set,</div><div class='del'>-	.resource_allocation_groupID_get = resource_allocation_groupID_get,</div><div class='del'>-	.resource_allocation_enable_set = resource_allocation_enable_set,</div><div class='del'>-	.resource_allocation_enable_get = resource_allocation_enable_get,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.h b/arch/powerpc/platforms/cell/spu_priv1_mmio.h<br/>deleted file mode 100644<br/>index 04f0db339dc1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_priv1_mmio.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_priv1_mmio.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/*</div><div class='del'>- * spu hypervisor abstraction for direct hardware access.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2006 Sony Computer Entertainment Inc.</div><div class='del'>- *  Copyright 2006 Sony Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef SPU_PRIV1_MMIO_H</div><div class='del'>-#define SPU_PRIV1_MMIO_H</div><div class='del'>-</div><div class='del'>-struct device_node *spu_devnode(struct spu *spu);</div><div class='del'>-</div><div class='del'>-#endif /* SPU_PRIV1_MMIO_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c<br/>index cd7d42fc12a6..000894e07b02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_syscalls.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spu_syscalls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spu_syscalls.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spu_syscalls.c</a></div><div class='hunk'>@@ -36,6 +36,9 @@ static inline struct spufs_calls *spufs_calls_get(void)</div><div class='ctx'> </div><div class='ctx'> static inline void spufs_calls_put(struct spufs_calls *calls)</div><div class='ctx'> {</div><div class='add'>+	if (!calls)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	BUG_ON(calls != spufs_calls);</div><div class='ctx'> </div><div class='ctx'> 	/* we don't need to rcu this, as we hold a reference to the module */</div><div class='hunk'>@@ -53,82 +56,55 @@ static inline void spufs_calls_put(struct spufs_calls *calls) { }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SPU_FS_MODULE */</div><div class='ctx'> </div><div class='add'>+DEFINE_CLASS(spufs_calls, struct spufs_calls *, spufs_calls_put(_T), spufs_calls_get(), void)</div><div class='add'>+</div><div class='ctx'> SYSCALL_DEFINE4(spu_create, const char __user *, name, unsigned int, flags,</div><div class='ctx'> 	umode_t, mode, int, neighbor_fd)</div><div class='ctx'> {</div><div class='del'>-	long ret;</div><div class='del'>-	struct spufs_calls *calls;</div><div class='del'>-</div><div class='del'>-	calls = spufs_calls_get();</div><div class='add'>+	CLASS(spufs_calls, calls)();</div><div class='ctx'> 	if (!calls)</div><div class='ctx'> 		return -ENOSYS;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; SPU_CREATE_AFFINITY_SPU) {</div><div class='del'>-		struct fd neighbor = fdget(neighbor_fd);</div><div class='del'>-		ret = -EBADF;</div><div class='del'>-		if (fd_file(neighbor)) {</div><div class='del'>-			ret = calls-&gt;create_thread(name, flags, mode, fd_file(neighbor));</div><div class='del'>-			fdput(neighbor);</div><div class='del'>-		}</div><div class='del'>-	} else</div><div class='del'>-		ret = calls-&gt;create_thread(name, flags, mode, NULL);</div><div class='del'>-</div><div class='del'>-	spufs_calls_put(calls);</div><div class='del'>-	return ret;</div><div class='add'>+		CLASS(fd, neighbor)(neighbor_fd);</div><div class='add'>+		if (fd_empty(neighbor))</div><div class='add'>+			return -EBADF;</div><div class='add'>+		return calls-&gt;create_thread(name, flags, mode, fd_file(neighbor));</div><div class='add'>+	} else {</div><div class='add'>+		return calls-&gt;create_thread(name, flags, mode, NULL);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> SYSCALL_DEFINE3(spu_run,int, fd, __u32 __user *, unpc, __u32 __user *, ustatus)</div><div class='ctx'> {</div><div class='del'>-	long ret;</div><div class='del'>-	struct fd arg;</div><div class='del'>-	struct spufs_calls *calls;</div><div class='del'>-</div><div class='del'>-	calls = spufs_calls_get();</div><div class='add'>+	CLASS(spufs_calls, calls)();</div><div class='ctx'> 	if (!calls)</div><div class='ctx'> 		return -ENOSYS;</div><div class='ctx'> </div><div class='del'>-	ret = -EBADF;</div><div class='del'>-	arg = fdget(fd);</div><div class='del'>-	if (fd_file(arg)) {</div><div class='del'>-		ret = calls-&gt;spu_run(fd_file(arg), unpc, ustatus);</div><div class='del'>-		fdput(arg);</div><div class='del'>-	}</div><div class='add'>+	CLASS(fd, arg)(fd);</div><div class='add'>+	if (fd_empty(arg))</div><div class='add'>+		return -EBADF;</div><div class='ctx'> </div><div class='del'>-	spufs_calls_put(calls);</div><div class='del'>-	return ret;</div><div class='add'>+	return calls-&gt;spu_run(fd_file(arg), unpc, ustatus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_COREDUMP</div><div class='ctx'> int elf_coredump_extra_notes_size(void)</div><div class='ctx'> {</div><div class='del'>-	struct spufs_calls *calls;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	calls = spufs_calls_get();</div><div class='add'>+	CLASS(spufs_calls, calls)();</div><div class='ctx'> 	if (!calls)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = calls-&gt;coredump_extra_notes_size();</div><div class='del'>-</div><div class='del'>-	spufs_calls_put(calls);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return calls-&gt;coredump_extra_notes_size();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int elf_coredump_extra_notes_write(struct coredump_params *cprm)</div><div class='ctx'> {</div><div class='del'>-	struct spufs_calls *calls;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	calls = spufs_calls_get();</div><div class='add'>+	CLASS(spufs_calls, calls)();</div><div class='ctx'> 	if (!calls)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = calls-&gt;coredump_extra_notes_write(cprm);</div><div class='del'>-</div><div class='del'>-	spufs_calls_put(calls);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return calls-&gt;coredump_extra_notes_write(cprm);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c<br/>index 18daafbe2e65..301ee7d8b7df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/coredump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/coredump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/coredump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/coredump.c</a></div><div class='hunk'>@@ -73,9 +73,7 @@ static struct spu_context *coredump_next_context(int *fd)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	*fd = n - 1;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	file = lookup_fdget_rcu(*fd);</div><div class='del'>-	rcu_read_unlock();</div><div class='add'>+	file = fget_raw(*fd);</div><div class='ctx'> 	if (file) {</div><div class='ctx'> 		ctx = SPUFS_I(file_inode(file))-&gt;i_ctx;</div><div class='ctx'> 		get_spu_context(ctx);</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c<br/>index d5a2c77bc908..ce839783c0df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/file.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/file.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/file.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/file.c</a></div><div class='hunk'>@@ -1430,7 +1430,7 @@ static int spufs_mfc_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	if (ctx-&gt;owner != current-&gt;mm)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (atomic_read(&amp;inode-&gt;i_count) != 1)</div><div class='add'>+	if (icount_read(inode) != 1)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;mapping_lock);</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/gang.c b/arch/powerpc/platforms/cell/spufs/gang.c<br/>index 827d338deaf4..2c2999de6bfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/gang.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/gang.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/gang.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/gang.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@ struct spu_gang *alloc_spu_gang(void)</div><div class='ctx'> 	mutex_init(&amp;gang-&gt;aff_mutex);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;gang-&gt;list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;gang-&gt;aff_list_head);</div><div class='add'>+	gang-&gt;alive = 1;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return gang;</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c<br/>index 70236d1df3d3..7ec60290abe6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/inode.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/inode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/inode.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/inode.c</a></div><div class='hunk'>@@ -143,42 +143,13 @@ spufs_evict_inode(struct inode *inode)</div><div class='ctx'> 		put_spu_gang(ei-&gt;i_gang);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void spufs_prune_dir(struct dentry *dir)</div><div class='del'>-{</div><div class='del'>-	struct dentry *dentry;</div><div class='del'>-	struct hlist_node *n;</div><div class='del'>-</div><div class='del'>-	inode_lock(d_inode(dir));</div><div class='del'>-	hlist_for_each_entry_safe(dentry, n, &amp;dir-&gt;d_children, d_sib) {</div><div class='del'>-		spin_lock(&amp;dentry-&gt;d_lock);</div><div class='del'>-		if (simple_positive(dentry)) {</div><div class='del'>-			dget_dlock(dentry);</div><div class='del'>-			__d_drop(dentry);</div><div class='del'>-			spin_unlock(&amp;dentry-&gt;d_lock);</div><div class='del'>-			simple_unlink(d_inode(dir), dentry);</div><div class='del'>-			/* XXX: what was dcache_lock protecting here? Other</div><div class='del'>-			 * filesystems (IB, configfs) release dcache_lock</div><div class='del'>-			 * before unlink */</div><div class='del'>-			dput(dentry);</div><div class='del'>-		} else {</div><div class='del'>-			spin_unlock(&amp;dentry-&gt;d_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	shrink_dcache_parent(dir);</div><div class='del'>-	inode_unlock(d_inode(dir));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Caller must hold parent-&gt;i_mutex */</div><div class='del'>-static int spufs_rmdir(struct inode *parent, struct dentry *dir)</div><div class='add'>+static void spufs_rmdir(struct inode *parent, struct dentry *dir)</div><div class='ctx'> {</div><div class='del'>-	/* remove all entries */</div><div class='del'>-	int res;</div><div class='del'>-	spufs_prune_dir(dir);</div><div class='del'>-	d_drop(dir);</div><div class='del'>-	res = simple_rmdir(parent, dir);</div><div class='del'>-	/* We have to give up the mm_struct */</div><div class='del'>-	spu_forget(SPUFS_I(d_inode(dir))-&gt;i_ctx);</div><div class='del'>-	return res;</div><div class='add'>+	struct spu_context *ctx = SPUFS_I(d_inode(dir))-&gt;i_ctx;</div><div class='add'>+</div><div class='add'>+	locked_recursive_removal(dir, NULL);</div><div class='add'>+	spu_forget(ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int spufs_fill_dir(struct dentry *dir,</div><div class='hunk'>@@ -192,27 +163,45 @@ static int spufs_fill_dir(struct dentry *dir,</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		ret = spufs_new_file(dir-&gt;d_sb, dentry, files-&gt;ops,</div><div class='ctx'> 					files-&gt;mode &amp; mode, files-&gt;size, ctx);</div><div class='del'>-		if (ret)</div><div class='add'>+		if (ret) {</div><div class='add'>+			dput(dentry);</div><div class='ctx'> 			return ret;</div><div class='add'>+		}</div><div class='ctx'> 		files++;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void unuse_gang(struct dentry *dir)</div><div class='add'>+{</div><div class='add'>+	struct inode *inode = dir-&gt;d_inode;</div><div class='add'>+	struct spu_gang *gang = SPUFS_I(inode)-&gt;i_gang;</div><div class='add'>+</div><div class='add'>+	if (gang) {</div><div class='add'>+		bool dead;</div><div class='add'>+</div><div class='add'>+		inode_lock(inode); // exclusion with spufs_create_context()</div><div class='add'>+		dead = !--gang-&gt;alive;</div><div class='add'>+		inode_unlock(inode);</div><div class='add'>+</div><div class='add'>+		if (dead)</div><div class='add'>+			simple_recursive_removal(dir, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int spufs_dir_close(struct inode *inode, struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct inode *parent;</div><div class='ctx'> 	struct dentry *dir;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dir = file-&gt;f_path.dentry;</div><div class='ctx'> 	parent = d_inode(dir-&gt;d_parent);</div><div class='ctx'> </div><div class='ctx'> 	inode_lock_nested(parent, I_MUTEX_PARENT);</div><div class='del'>-	ret = spufs_rmdir(parent, dir);</div><div class='add'>+	spufs_rmdir(parent, dir);</div><div class='ctx'> 	inode_unlock(parent);</div><div class='del'>-	WARN_ON(ret);</div><div class='ctx'> </div><div class='add'>+	unuse_gang(dir-&gt;d_parent);</div><div class='ctx'> 	return dcache_dir_close(inode, file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -268,11 +257,11 @@ spufs_mkdir(struct inode *dir, struct dentry *dentry, unsigned int flags,</div><div class='ctx'> 		ret = spufs_fill_dir(dentry, spufs_dir_debug_contents,</div><div class='ctx'> 				mode, ctx);</div><div class='ctx'> </div><div class='add'>+	inode_unlock(inode);</div><div class='add'>+</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		spufs_rmdir(dir, dentry);</div><div class='ctx'> </div><div class='del'>-	inode_unlock(inode);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -405,7 +394,7 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int affinity;</div><div class='del'>-	struct spu_gang *gang;</div><div class='add'>+	struct spu_gang *gang = SPUFS_I(inode)-&gt;i_gang;</div><div class='ctx'> 	struct spu_context *neighbor;</div><div class='ctx'> 	struct path path = {.mnt = mnt, .dentry = dentry};</div><div class='ctx'> </div><div class='hunk'>@@ -420,11 +409,15 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,</div><div class='ctx'> 	if ((flags &amp; SPU_CREATE_ISOLATE) &amp;&amp; !isolated_loader)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	gang = NULL;</div><div class='add'>+	if (gang) {</div><div class='add'>+		if (!gang-&gt;alive)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+		gang-&gt;alive++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	neighbor = NULL;</div><div class='ctx'> 	affinity = flags &amp; (SPU_CREATE_AFFINITY_MEM | SPU_CREATE_AFFINITY_SPU);</div><div class='ctx'> 	if (affinity) {</div><div class='del'>-		gang = SPUFS_I(inode)-&gt;i_gang;</div><div class='ctx'> 		if (!gang)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		mutex_lock(&amp;gang-&gt;aff_mutex);</div><div class='hunk'>@@ -436,8 +429,11 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = spufs_mkdir(inode, dentry, flags, mode &amp; 0777);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (neighbor)</div><div class='add'>+			put_spu_context(neighbor);</div><div class='ctx'> 		goto out_aff_unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (affinity) {</div><div class='ctx'> 		spufs_set_affinity(flags, SPUFS_I(d_inode(dentry))-&gt;i_ctx,</div><div class='hunk'>@@ -448,11 +444,13 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,</div><div class='ctx'> </div><div class='ctx'> 	ret = spufs_context_open(&amp;path);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		WARN_ON(spufs_rmdir(inode, dentry));</div><div class='add'>+		spufs_rmdir(inode, dentry);</div><div class='ctx'> </div><div class='ctx'> out_aff_unlock:</div><div class='ctx'> 	if (affinity)</div><div class='ctx'> 		mutex_unlock(&amp;gang-&gt;aff_mutex);</div><div class='add'>+	if (ret &amp;&amp; gang)</div><div class='add'>+		gang-&gt;alive--; // can't reach 0</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -482,6 +480,7 @@ spufs_mkgang(struct inode *dir, struct dentry *dentry, umode_t mode)</div><div class='ctx'> 	inode-&gt;i_fop = &amp;simple_dir_operations;</div><div class='ctx'> </div><div class='ctx'> 	d_instantiate(dentry, inode);</div><div class='add'>+	dget(dentry);</div><div class='ctx'> 	inc_nlink(dir);</div><div class='ctx'> 	inc_nlink(d_inode(dentry));</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -492,6 +491,21 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int spufs_gang_close(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	unuse_gang(file-&gt;f_path.dentry);</div><div class='add'>+	return dcache_dir_close(inode, file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations spufs_gang_fops = {</div><div class='add'>+	.open		= dcache_dir_open,</div><div class='add'>+	.release	= spufs_gang_close,</div><div class='add'>+	.llseek		= dcache_dir_lseek,</div><div class='add'>+	.read		= generic_read_dir,</div><div class='add'>+	.iterate_shared	= dcache_readdir,</div><div class='add'>+	.fsync		= noop_fsync,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int spufs_gang_open(const struct path *path)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -511,7 +525,7 @@ static int spufs_gang_open(const struct path *path)</div><div class='ctx'> 		return PTR_ERR(filp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	filp-&gt;f_op = &amp;simple_dir_operations;</div><div class='add'>+	filp-&gt;f_op = &amp;spufs_gang_fops;</div><div class='ctx'> 	fd_install(ret, filp);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -526,10 +540,8 @@ static int spufs_create_gang(struct inode *inode,</div><div class='ctx'> 	ret = spufs_mkgang(inode, dentry, mode &amp; 0777);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = spufs_gang_open(&amp;path);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			int err = simple_rmdir(inode, dentry);</div><div class='del'>-			WARN_ON(err);</div><div class='del'>-		}</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			unuse_gang(dentry);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c<br/>index 610ca8570682..8e7ed010bfde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/sched.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/sched.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/sched.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/sched.c</a></div><div class='hunk'>@@ -508,7 +508,7 @@ static void __spu_del_from_rq(struct spu_context *ctx)</div><div class='ctx'> </div><div class='ctx'> 	if (!list_empty(&amp;ctx-&gt;rq)) {</div><div class='ctx'> 		if (!--spu_prio-&gt;nr_waiting)</div><div class='del'>-			del_timer(&amp;spusched_timer);</div><div class='add'>+			timer_delete(&amp;spusched_timer);</div><div class='ctx'> 		list_del_init(&amp;ctx-&gt;rq);</div><div class='ctx'> </div><div class='ctx'> 		if (list_empty(&amp;spu_prio-&gt;runq[prio]))</div><div class='hunk'>@@ -1126,8 +1126,8 @@ void spu_sched_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	remove_proc_entry("spu_loadavg", NULL);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;spusched_timer);</div><div class='del'>-	del_timer_sync(&amp;spuloadavg_timer);</div><div class='add'>+	timer_delete_sync(&amp;spusched_timer);</div><div class='add'>+	timer_delete_sync(&amp;spuloadavg_timer);</div><div class='ctx'> 	kthread_stop(spusched_task);</div><div class='ctx'> </div><div class='ctx'> 	for (node = 0; node &lt; MAX_NUMNODES; node++) {</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h<br/>index 84958487f696..d33787c57c39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/spufs.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/spufs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/spufs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/spufs.h</a></div><div class='hunk'>@@ -151,6 +151,8 @@ struct spu_gang {</div><div class='ctx'> 	int aff_flags;</div><div class='ctx'> 	struct spu *aff_ref_spu;</div><div class='ctx'> 	atomic_t aff_sched_count;</div><div class='add'>+</div><div class='add'>+	int alive;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Flag bits for spu_gang aff_flags */</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c<br/>index 157e046e6e93..ea4ba1b6ce6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/syscalls.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/cell/spufs/syscalls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/cell/spufs/syscalls.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/cell/spufs/syscalls.c</a></div><div class='hunk'>@@ -67,11 +67,11 @@ static long do_spu_create(const char __user *pathname, unsigned int flags,</div><div class='ctx'> 	struct dentry *dentry;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dentry = user_path_create(AT_FDCWD, pathname, &amp;path, LOOKUP_DIRECTORY);</div><div class='add'>+	dentry = start_creating_user_path(AT_FDCWD, pathname, &amp;path, LOOKUP_DIRECTORY);</div><div class='ctx'> 	ret = PTR_ERR(dentry);</div><div class='ctx'> 	if (!IS_ERR(dentry)) {</div><div class='ctx'> 		ret = spufs_create(&amp;path, dentry, flags, mode, neighbor);</div><div class='del'>-		done_path_create(&amp;path, dentry);</div><div class='add'>+		end_creating_path(&amp;path, dentry);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c<br/>index 36ee3a5056a1..c1bfa4c3444c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/chrp/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/chrp/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/chrp/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/chrp/setup.c</a></div><div class='hunk'>@@ -486,7 +486,7 @@ static void __init chrp_find_8259(void)</div><div class='ctx'> 	i8259_init(pic, chrp_int_ack);</div><div class='ctx'> 	if (ppc_md.get_irq == NULL) {</div><div class='ctx'> 		ppc_md.get_irq = i8259_irq;</div><div class='del'>-		irq_set_default_host(i8259_get_host());</div><div class='add'>+		irq_set_default_domain(i8259_get_host());</div><div class='ctx'> 	}</div><div class='ctx'> 	if (chrp_mpic != NULL) {</div><div class='ctx'> 		cascade_irq = irq_of_parse_and_map(pic, 0);</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c<br/>index 4d9200bdba78..91a8f0a7086e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/flipper-pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/flipper-pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a></div><div class='hunk'>@@ -149,8 +149,9 @@ static struct irq_domain * __init flipper_pic_init(struct device_node *np)</div><div class='ctx'> </div><div class='ctx'> 	__flipper_quiesce(io_base);</div><div class='ctx'> </div><div class='del'>-	irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,</div><div class='del'>-				  &amp;flipper_irq_domain_ops, io_base);</div><div class='add'>+	irq_domain = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+					      FLIPPER_NR_IRQS,</div><div class='add'>+					      &amp;flipper_irq_domain_ops, io_base);</div><div class='ctx'> 	if (!irq_domain) {</div><div class='ctx'> 		pr_err("failed to allocate irq_domain\n");</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -172,7 +173,7 @@ unsigned int flipper_pic_get_irq(void)</div><div class='ctx'> 		return 0;	/* no more IRQs pending */</div><div class='ctx'> </div><div class='ctx'> 	irq = __ffs(irq_status);</div><div class='del'>-	return irq_linear_revmap(flipper_irq_host, irq);</div><div class='add'>+	return irq_find_mapping(flipper_irq_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -190,7 +191,7 @@ void __init flipper_pic_probe(void)</div><div class='ctx'> 	flipper_irq_host = flipper_pic_init(np);</div><div class='ctx'> 	BUG_ON(!flipper_irq_host);</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(flipper_irq_host);</div><div class='add'>+	irq_set_default_domain(flipper_irq_host);</div><div class='ctx'> </div><div class='ctx'> 	of_node_put(np);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c<br/>index 4d2d92de30af..b57e87b0b3ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></div><div class='hunk'>@@ -175,8 +175,9 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)</div><div class='ctx'> </div><div class='ctx'> 	__hlwd_quiesce(io_base);</div><div class='ctx'> </div><div class='del'>-	irq_domain = irq_domain_add_linear(np, HLWD_NR_IRQS,</div><div class='del'>-					   &amp;hlwd_irq_domain_ops, io_base);</div><div class='add'>+	irq_domain = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+					      HLWD_NR_IRQS,</div><div class='add'>+					      &amp;hlwd_irq_domain_ops, io_base);</div><div class='ctx'> 	if (!irq_domain) {</div><div class='ctx'> 		pr_err("failed to allocate irq_domain\n");</div><div class='ctx'> 		iounmap(io_base);</div><div class='hunk'>@@ -189,7 +190,7 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)</div><div class='ctx'> unsigned int hlwd_pic_get_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int hwirq = __hlwd_pic_get_irq(hlwd_irq_host);</div><div class='del'>-	return hwirq ? irq_linear_revmap(hlwd_irq_host, hwirq) : 0;</div><div class='add'>+	return hwirq ? irq_find_mapping(hlwd_irq_host, hwirq) : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c<br/>index e265f026eee2..4012f206ec63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/linkstation.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/linkstation.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/linkstation.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/embedded6xx/linkstation.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/mpic.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/mvme5100.c b/arch/powerpc/platforms/embedded6xx/mvme5100.c<br/>index 00bec0f051be..5ca41972ef22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/mvme5100.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/embedded6xx/mvme5100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/embedded6xx/mvme5100.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/embedded6xx/mvme5100.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> #include &lt;asm/pci-bridge.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig<br/>deleted file mode 100644<br/>index 4c058cc57c90..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-config PPC_MAPLE</div><div class='del'>-	depends on PPC64 &amp;&amp; PPC_BOOK3S &amp;&amp; CPU_BIG_ENDIAN</div><div class='del'>-	bool "Maple 970FX Evaluation Board"</div><div class='del'>-	select FORCE_PCI</div><div class='del'>-	select MPIC</div><div class='del'>-	select U3_DART</div><div class='del'>-	select MPIC_U3_HT_IRQS</div><div class='del'>-	select GENERIC_TBSYNC</div><div class='del'>-	select PPC_UDBG_16550</div><div class='del'>-	select PPC_970_NAP</div><div class='del'>-	select PPC_64S_HASH_MMU</div><div class='del'>-	select PPC_HASH_MMU_NATIVE</div><div class='del'>-	select PPC_RTAS</div><div class='del'>-	select MMIO_NVRAM</div><div class='del'>-	select ATA_NONSTANDARD if ATA</div><div class='del'>-	help</div><div class='del'>-	  This option enables support for the Maple 970FX Evaluation Board.</div><div class='del'>-	  For more information, refer to &lt;http://www.970eval.com&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/Makefile b/arch/powerpc/platforms/maple/Makefile<br/>deleted file mode 100644<br/>index 19f35ab828a7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-obj-y	+= setup.o pci.o time.o</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/maple.h b/arch/powerpc/platforms/maple/maple.h<br/>deleted file mode 100644<br/>index 8ddbaa4ebd0b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/maple.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/maple.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/*</div><div class='del'>- * Declarations for maple-specific code.</div><div class='del'>- *</div><div class='del'>- * Maple is the name of a PPC970 evaluation board.</div><div class='del'>- */</div><div class='del'>-extern int maple_set_rtc_time(struct rtc_time *tm);</div><div class='del'>-extern void maple_get_rtc_time(struct rtc_time *tm);</div><div class='del'>-extern time64_t maple_get_boot_time(void);</div><div class='del'>-extern void maple_pci_init(void);</div><div class='del'>-extern void maple_pci_irq_fixup(struct pci_dev *dev);</div><div class='del'>-extern int maple_pci_get_legacy_ide_irq(struct pci_dev *dev, int channel);</div><div class='del'>-</div><div class='del'>-extern struct pci_controller_ops maple_pci_controller_ops;</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c<br/>deleted file mode 100644<br/>index b9ff37c7f6f0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/pci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,672 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org),</div><div class='del'>- *		      IBM Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/iommu.h&gt;</div><div class='del'>-#include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;asm/isa-bridge.h&gt;</div><div class='del'>-</div><div class='del'>-#include "maple.h"</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(x...) printk(x)</div><div class='del'>-#else</div><div class='del'>-#define DBG(x...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct pci_controller *u3_agp, *u3_ht, *u4_pcie;</div><div class='del'>-</div><div class='del'>-static int __init fixup_one_level_bus_range(struct device_node *node, int higher)</div><div class='del'>-{</div><div class='del'>-	for (; node; node = node-&gt;sibling) {</div><div class='del'>-		const int *bus_range;</div><div class='del'>-		const unsigned int *class_code;</div><div class='del'>-		int len;</div><div class='del'>-</div><div class='del'>-		/* For PCI&lt;-&gt;PCI bridges or CardBus bridges, we go down */</div><div class='del'>-		class_code = of_get_property(node, "class-code", NULL);</div><div class='del'>-		if (!class_code || ((*class_code &gt;&gt; 8) != PCI_CLASS_BRIDGE_PCI &amp;&amp;</div><div class='del'>-			(*class_code &gt;&gt; 8) != PCI_CLASS_BRIDGE_CARDBUS))</div><div class='del'>-			continue;</div><div class='del'>-		bus_range = of_get_property(node, "bus-range", &amp;len);</div><div class='del'>-		if (bus_range != NULL &amp;&amp; len &gt; 2 * sizeof(int)) {</div><div class='del'>-			if (bus_range[1] &gt; higher)</div><div class='del'>-				higher = bus_range[1];</div><div class='del'>-		}</div><div class='del'>-		higher = fixup_one_level_bus_range(node-&gt;child, higher);</div><div class='del'>-	}</div><div class='del'>-	return higher;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This routine fixes the "bus-range" property of all bridges in the</div><div class='del'>- * system since they tend to have their "last" member wrong on macs</div><div class='del'>- *</div><div class='del'>- * Note that the bus numbers manipulated here are OF bus numbers, they</div><div class='del'>- * are not Linux bus numbers.</div><div class='del'>- */</div><div class='del'>-static void __init fixup_bus_range(struct device_node *bridge)</div><div class='del'>-{</div><div class='del'>-	int *bus_range;</div><div class='del'>-	struct property *prop;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	/* Lookup the "bus-range" property for the hose */</div><div class='del'>-	prop = of_find_property(bridge, "bus-range", &amp;len);</div><div class='del'>-	if (prop == NULL  || prop-&gt;value == NULL || len &lt; 2 * sizeof(int)) {</div><div class='del'>-		printk(KERN_WARNING "Can't get bus-range for %pOF\n",</div><div class='del'>-			       bridge);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	bus_range = prop-&gt;value;</div><div class='del'>-	bus_range[1] = fixup_one_level_bus_range(bridge-&gt;child, bus_range[1]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static unsigned long u3_agp_cfa0(u8 devfn, u8 off)</div><div class='del'>-{</div><div class='del'>-	return (1 &lt;&lt; (unsigned long)PCI_SLOT(devfn)) |</div><div class='del'>-		((unsigned long)PCI_FUNC(devfn) &lt;&lt; 8) |</div><div class='del'>-		((unsigned long)off &amp; 0xFCUL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long u3_agp_cfa1(u8 bus, u8 devfn, u8 off)</div><div class='del'>-{</div><div class='del'>-	return ((unsigned long)bus &lt;&lt; 16) |</div><div class='del'>-		((unsigned long)devfn &lt;&lt; 8) |</div><div class='del'>-		((unsigned long)off &amp; 0xFCUL) |</div><div class='del'>-		1UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static volatile void __iomem *u3_agp_cfg_access(struct pci_controller* hose,</div><div class='del'>-				       u8 bus, u8 dev_fn, u8 offset)</div><div class='del'>-{</div><div class='del'>-	unsigned int caddr;</div><div class='del'>-</div><div class='del'>-	if (bus == hose-&gt;first_busno) {</div><div class='del'>-		if (dev_fn &lt; (11 &lt;&lt; 3))</div><div class='del'>-			return NULL;</div><div class='del'>-		caddr = u3_agp_cfa0(dev_fn, offset);</div><div class='del'>-	} else</div><div class='del'>-		caddr = u3_agp_cfa1(bus, dev_fn, offset);</div><div class='del'>-</div><div class='del'>-	/* Uninorth will return garbage if we don't read back the value ! */</div><div class='del'>-	do {</div><div class='del'>-		out_le32(hose-&gt;cfg_addr, caddr);</div><div class='del'>-	} while (in_le32(hose-&gt;cfg_addr) != caddr);</div><div class='del'>-</div><div class='del'>-	offset &amp;= 0x07;</div><div class='del'>-	return hose-&gt;cfg_data + offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-			      int offset, int len, u32 *val)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	hose = pci_bus_to_host(bus);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	addr = u3_agp_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	/*</div><div class='del'>-	 * Note: the caller has already checked that offset is</div><div class='del'>-	 * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-	 */</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		*val = in_8(addr);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		*val = in_le16(addr);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		*val = in_le32(addr);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-			       int offset, int len, u32 val)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	hose = pci_bus_to_host(bus);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	addr = u3_agp_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	/*</div><div class='del'>-	 * Note: the caller has already checked that offset is</div><div class='del'>-	 * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-	 */</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		out_8(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		out_le16(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		out_le32(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_ops u3_agp_pci_ops =</div><div class='del'>-{</div><div class='del'>-	.read = u3_agp_read_config,</div><div class='del'>-	.write = u3_agp_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long u3_ht_cfa0(u8 devfn, u8 off)</div><div class='del'>-{</div><div class='del'>-	return (devfn &lt;&lt; 8) | off;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long u3_ht_cfa1(u8 bus, u8 devfn, u8 off)</div><div class='del'>-{</div><div class='del'>-	return u3_ht_cfa0(devfn, off) + (bus &lt;&lt; 16) + 0x01000000UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static volatile void __iomem *u3_ht_cfg_access(struct pci_controller* hose,</div><div class='del'>-				      u8 bus, u8 devfn, u8 offset)</div><div class='del'>-{</div><div class='del'>-	if (bus == hose-&gt;first_busno) {</div><div class='del'>-		if (PCI_SLOT(devfn) == 0)</div><div class='del'>-			return NULL;</div><div class='del'>-		return hose-&gt;cfg_data + u3_ht_cfa0(devfn, offset);</div><div class='del'>-	} else</div><div class='del'>-		return hose-&gt;cfg_data + u3_ht_cfa1(bus, devfn, offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_ht_root_read_config(struct pci_controller *hose, u8 offset,</div><div class='del'>-				  int len, u32 *val)</div><div class='del'>-{</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	addr = hose-&gt;cfg_addr;</div><div class='del'>-	addr += ((offset &amp; ~3) &lt;&lt; 2) + (4 - len - (offset &amp; 3));</div><div class='del'>-</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		*val = in_8(addr);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		*val = in_be16(addr);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		*val = in_be32(addr);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,</div><div class='del'>-				  int len, u32 val)</div><div class='del'>-{</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	addr = hose-&gt;cfg_addr + ((offset &amp; ~3) &lt;&lt; 2) + (4 - len - (offset &amp; 3));</div><div class='del'>-</div><div class='del'>-	if (offset &gt;= PCI_BASE_ADDRESS_0 &amp;&amp; offset &lt; PCI_CAPABILITY_LIST)</div><div class='del'>-		return PCIBIOS_SUCCESSFUL;</div><div class='del'>-</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		out_8(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		out_be16(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		out_be32(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-			     int offset, int len, u32 *val)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	hose = pci_bus_to_host(bus);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	if (bus-&gt;number == hose-&gt;first_busno &amp;&amp; devfn == PCI_DEVFN(0, 0))</div><div class='del'>-		return u3_ht_root_read_config(hose, offset, len, val);</div><div class='del'>-</div><div class='del'>-	if (offset &gt; 0xff)</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-</div><div class='del'>-	addr = u3_ht_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Note: the caller has already checked that offset is</div><div class='del'>-	 * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-	 */</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		*val = in_8(addr);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		*val = in_le16(addr);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		*val = in_le32(addr);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-			      int offset, int len, u32 val)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	hose = pci_bus_to_host(bus);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	if (bus-&gt;number == hose-&gt;first_busno &amp;&amp; devfn == PCI_DEVFN(0, 0))</div><div class='del'>-		return u3_ht_root_write_config(hose, offset, len, val);</div><div class='del'>-</div><div class='del'>-	if (offset &gt; 0xff)</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-</div><div class='del'>-	addr = u3_ht_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	/*</div><div class='del'>-	 * Note: the caller has already checked that offset is</div><div class='del'>-	 * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-	 */</div><div class='del'>-	switch (len) {</div><div class='del'>-	case 1:</div><div class='del'>-		out_8(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		out_le16(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		out_le32(addr, val);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_ops u3_ht_pci_ops =</div><div class='del'>-{</div><div class='del'>-	.read = u3_ht_read_config,</div><div class='del'>-	.write = u3_ht_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned int u4_pcie_cfa0(unsigned int devfn, unsigned int off)</div><div class='del'>-{</div><div class='del'>-	return (1 &lt;&lt; PCI_SLOT(devfn))	|</div><div class='del'>-	       (PCI_FUNC(devfn) &lt;&lt; 8)	|</div><div class='del'>-	       ((off &gt;&gt; 8) &lt;&lt; 28) 	|</div><div class='del'>-	       (off &amp; 0xfcu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int u4_pcie_cfa1(unsigned int bus, unsigned int devfn,</div><div class='del'>-				 unsigned int off)</div><div class='del'>-{</div><div class='del'>-        return (bus &lt;&lt; 16)		|</div><div class='del'>-	       (devfn &lt;&lt; 8)		|</div><div class='del'>-	       ((off &gt;&gt; 8) &lt;&lt; 28)	|</div><div class='del'>-	       (off &amp; 0xfcu)		| 1u;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static volatile void __iomem *u4_pcie_cfg_access(struct pci_controller* hose,</div><div class='del'>-                                        u8 bus, u8 dev_fn, int offset)</div><div class='del'>-{</div><div class='del'>-        unsigned int caddr;</div><div class='del'>-</div><div class='del'>-        if (bus == hose-&gt;first_busno)</div><div class='del'>-                caddr = u4_pcie_cfa0(dev_fn, offset);</div><div class='del'>-        else</div><div class='del'>-                caddr = u4_pcie_cfa1(bus, dev_fn, offset);</div><div class='del'>-</div><div class='del'>-        /* Uninorth will return garbage if we don't read back the value ! */</div><div class='del'>-        do {</div><div class='del'>-                out_le32(hose-&gt;cfg_addr, caddr);</div><div class='del'>-        } while (in_le32(hose-&gt;cfg_addr) != caddr);</div><div class='del'>-</div><div class='del'>-        offset &amp;= 0x03;</div><div class='del'>-        return hose-&gt;cfg_data + offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-                               int offset, int len, u32 *val)</div><div class='del'>-{</div><div class='del'>-        struct pci_controller *hose;</div><div class='del'>-        volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-        hose = pci_bus_to_host(bus);</div><div class='del'>-        if (hose == NULL)</div><div class='del'>-                return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-        if (offset &gt;= 0x1000)</div><div class='del'>-                return  PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-        addr = u4_pcie_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-        if (!addr)</div><div class='del'>-                return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-        /*</div><div class='del'>-         * Note: the caller has already checked that offset is</div><div class='del'>-         * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-         */</div><div class='del'>-        switch (len) {</div><div class='del'>-        case 1:</div><div class='del'>-                *val = in_8(addr);</div><div class='del'>-                break;</div><div class='del'>-        case 2:</div><div class='del'>-                *val = in_le16(addr);</div><div class='del'>-                break;</div><div class='del'>-        default:</div><div class='del'>-                *val = in_le32(addr);</div><div class='del'>-                break;</div><div class='del'>-        }</div><div class='del'>-        return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-                                int offset, int len, u32 val)</div><div class='del'>-{</div><div class='del'>-        struct pci_controller *hose;</div><div class='del'>-        volatile void __iomem *addr;</div><div class='del'>-</div><div class='del'>-        hose = pci_bus_to_host(bus);</div><div class='del'>-        if (hose == NULL)</div><div class='del'>-                return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-        if (offset &gt;= 0x1000)</div><div class='del'>-                return  PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-        addr = u4_pcie_cfg_access(hose, bus-&gt;number, devfn, offset);</div><div class='del'>-        if (!addr)</div><div class='del'>-                return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-        /*</div><div class='del'>-         * Note: the caller has already checked that offset is</div><div class='del'>-         * suitably aligned and that len is 1, 2 or 4.</div><div class='del'>-         */</div><div class='del'>-        switch (len) {</div><div class='del'>-        case 1:</div><div class='del'>-                out_8(addr, val);</div><div class='del'>-                break;</div><div class='del'>-        case 2:</div><div class='del'>-                out_le16(addr, val);</div><div class='del'>-                break;</div><div class='del'>-        default:</div><div class='del'>-                out_le32(addr, val);</div><div class='del'>-                break;</div><div class='del'>-        }</div><div class='del'>-        return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_ops u4_pcie_pci_ops =</div><div class='del'>-{</div><div class='del'>-	.read = u4_pcie_read_config,</div><div class='del'>-	.write = u4_pcie_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init setup_u3_agp(struct pci_controller* hose)</div><div class='del'>-{</div><div class='del'>-	/* On G5, we move AGP up to high bus number so we don't need</div><div class='del'>-	 * to reassign bus numbers for HT. If we ever have P2P bridges</div><div class='del'>-	 * on AGP, we'll have to move pci_assign_all_buses to the</div><div class='del'>-	 * pci_controller structure so we enable it for AGP and not for</div><div class='del'>-	 * HT childs.</div><div class='del'>-	 * We hard code the address because of the different size of</div><div class='del'>-	 * the reg address cell, we shall fix that by killing struct</div><div class='del'>-	 * reg_property and using some accessor functions instead</div><div class='del'>-	 */</div><div class='del'>-	hose-&gt;first_busno = 0xf0;</div><div class='del'>-	hose-&gt;last_busno = 0xff;</div><div class='del'>-	hose-&gt;ops = &amp;u3_agp_pci_ops;</div><div class='del'>-	hose-&gt;cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);</div><div class='del'>-	hose-&gt;cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);</div><div class='del'>-</div><div class='del'>-	u3_agp = hose;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init setup_u4_pcie(struct pci_controller* hose)</div><div class='del'>-{</div><div class='del'>-        /* We currently only implement the "non-atomic" config space, to</div><div class='del'>-         * be optimised later.</div><div class='del'>-         */</div><div class='del'>-        hose-&gt;ops = &amp;u4_pcie_pci_ops;</div><div class='del'>-        hose-&gt;cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);</div><div class='del'>-        hose-&gt;cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);</div><div class='del'>-</div><div class='del'>-        u4_pcie = hose;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init setup_u3_ht(struct pci_controller* hose)</div><div class='del'>-{</div><div class='del'>-	hose-&gt;ops = &amp;u3_ht_pci_ops;</div><div class='del'>-</div><div class='del'>-	/* We hard code the address because of the different size of</div><div class='del'>-	 * the reg address cell, we shall fix that by killing struct</div><div class='del'>-	 * reg_property and using some accessor functions instead</div><div class='del'>-	 */</div><div class='del'>-	hose-&gt;cfg_data = ioremap(0xf2000000, 0x02000000);</div><div class='del'>-	hose-&gt;cfg_addr = ioremap(0xf8070000, 0x1000);</div><div class='del'>-</div><div class='del'>-	hose-&gt;first_busno = 0;</div><div class='del'>-	hose-&gt;last_busno = 0xef;</div><div class='del'>-</div><div class='del'>-	u3_ht = hose;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init maple_add_bridge(struct device_node *dev)</div><div class='del'>-{</div><div class='del'>-	int len;</div><div class='del'>-	struct pci_controller *hose;</div><div class='del'>-	char* disp_name;</div><div class='del'>-	const int *bus_range;</div><div class='del'>-	int primary = 1;</div><div class='del'>-</div><div class='del'>-	DBG("Adding PCI host bridge %pOF\n", dev);</div><div class='del'>-</div><div class='del'>-	bus_range = of_get_property(dev, "bus-range", &amp;len);</div><div class='del'>-	if (bus_range == NULL || len &lt; 2 * sizeof(int)) {</div><div class='del'>-		printk(KERN_WARNING "Can't get bus-range for %pOF, assume bus 0\n",</div><div class='del'>-		dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hose = pcibios_alloc_controller(dev);</div><div class='del'>-	if (hose == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	hose-&gt;first_busno = bus_range ? bus_range[0] : 0;</div><div class='del'>-	hose-&gt;last_busno = bus_range ? bus_range[1] : 0xff;</div><div class='del'>-	hose-&gt;controller_ops = maple_pci_controller_ops;</div><div class='del'>-</div><div class='del'>-	disp_name = NULL;</div><div class='del'>-	if (of_device_is_compatible(dev, "u3-agp")) {</div><div class='del'>-		setup_u3_agp(hose);</div><div class='del'>-		disp_name = "U3-AGP";</div><div class='del'>-		primary = 0;</div><div class='del'>-	} else if (of_device_is_compatible(dev, "u3-ht")) {</div><div class='del'>-		setup_u3_ht(hose);</div><div class='del'>-		disp_name = "U3-HT";</div><div class='del'>-		primary = 1;</div><div class='del'>-        } else if (of_device_is_compatible(dev, "u4-pcie")) {</div><div class='del'>-                setup_u4_pcie(hose);</div><div class='del'>-                disp_name = "U4-PCIE";</div><div class='del'>-                primary = 0;</div><div class='del'>-	}</div><div class='del'>-	printk(KERN_INFO "Found %s PCI host bridge. Firmware bus number: %d-&gt;%d\n",</div><div class='del'>-		disp_name, hose-&gt;first_busno, hose-&gt;last_busno);</div><div class='del'>-</div><div class='del'>-	/* Interpret the "ranges" property */</div><div class='del'>-	/* This also maps the I/O region and sets isa_io/mem_base */</div><div class='del'>-	pci_process_bridge_OF_ranges(hose, dev, primary);</div><div class='del'>-</div><div class='del'>-	/* Fixup "bus-range" OF property */</div><div class='del'>-	fixup_bus_range(dev);</div><div class='del'>-</div><div class='del'>-	/* Check for legacy IOs */</div><div class='del'>-	isa_bridge_find_early(hose);</div><div class='del'>-</div><div class='del'>-	/* create pci_dn's for DT nodes under this PHB */</div><div class='del'>-	pci_devs_phb_init_dynamic(hose);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void maple_pci_irq_fixup(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	DBG(" -&gt; maple_pci_irq_fixup\n");</div><div class='del'>-</div><div class='del'>-	/* Fixup IRQ for PCIe host */</div><div class='del'>-	if (u4_pcie != NULL &amp;&amp; dev-&gt;bus-&gt;number == 0 &amp;&amp;</div><div class='del'>-	    pci_bus_to_host(dev-&gt;bus) == u4_pcie) {</div><div class='del'>-		printk(KERN_DEBUG "Fixup U4 PCIe IRQ\n");</div><div class='del'>-		dev-&gt;irq = irq_create_mapping(NULL, 1);</div><div class='del'>-		if (dev-&gt;irq)</div><div class='del'>-			irq_set_irq_type(dev-&gt;irq, IRQ_TYPE_LEVEL_LOW);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Hide AMD8111 IDE interrupt when in legacy mode so</div><div class='del'>-	 * the driver calls pci_get_legacy_ide_irq()</div><div class='del'>-	 */</div><div class='del'>-	if (dev-&gt;vendor == PCI_VENDOR_ID_AMD &amp;&amp;</div><div class='del'>-	    dev-&gt;device == PCI_DEVICE_ID_AMD_8111_IDE &amp;&amp;</div><div class='del'>-	    (dev-&gt;class &amp; 5) != 5) {</div><div class='del'>-		dev-&gt;irq = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(" &lt;- maple_pci_irq_fixup\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int maple_pci_root_bridge_prepare(struct pci_host_bridge *bridge)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(bridge-&gt;bus);</div><div class='del'>-	struct device_node *np, *child;</div><div class='del'>-</div><div class='del'>-	if (hose != u3_agp)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Fixup the PCI&lt;-&gt;OF mapping for U3 AGP due to bus renumbering. We</div><div class='del'>-	 * assume there is no P2P bridge on the AGP bus, which should be a</div><div class='del'>-	 * safe assumptions hopefully.</div><div class='del'>-	 */</div><div class='del'>-	np = hose-&gt;dn;</div><div class='del'>-	PCI_DN(np)-&gt;busno = 0xf0;</div><div class='del'>-	for_each_child_of_node(np, child)</div><div class='del'>-		PCI_DN(child)-&gt;busno = 0xf0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init maple_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np, *root;</div><div class='del'>-	struct device_node *ht = NULL;</div><div class='del'>-</div><div class='del'>-	/* Probe root PCI hosts, that is on U3 the AGP host and the</div><div class='del'>-	 * HyperTransport host. That one is actually "kept" around</div><div class='del'>-	 * and actually added last as its resource management relies</div><div class='del'>-	 * on the AGP resources to have been setup first</div><div class='del'>-	 */</div><div class='del'>-	root = of_find_node_by_path("/");</div><div class='del'>-	if (root == NULL) {</div><div class='del'>-		printk(KERN_CRIT "maple_find_bridges: can't find root of device tree\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	for_each_child_of_node(root, np) {</div><div class='del'>-		if (!of_node_is_type(np, "pci") &amp;&amp; !of_node_is_type(np, "ht"))</div><div class='del'>-			continue;</div><div class='del'>-		if ((of_device_is_compatible(np, "u4-pcie") ||</div><div class='del'>-		     of_device_is_compatible(np, "u3-agp")) &amp;&amp;</div><div class='del'>-		    maple_add_bridge(np) == 0)</div><div class='del'>-			of_node_get(np);</div><div class='del'>-</div><div class='del'>-		if (of_device_is_compatible(np, "u3-ht")) {</div><div class='del'>-			of_node_get(np);</div><div class='del'>-			ht = np;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	of_node_put(root);</div><div class='del'>-</div><div class='del'>-	/* Now setup the HyperTransport host if we found any</div><div class='del'>-	 */</div><div class='del'>-	if (ht &amp;&amp; maple_add_bridge(ht) != 0)</div><div class='del'>-		of_node_put(ht);</div><div class='del'>-</div><div class='del'>-	ppc_md.pcibios_root_bridge_prepare = maple_pci_root_bridge_prepare;</div><div class='del'>-</div><div class='del'>-	/* Tell pci.c to not change any resource allocations.  */</div><div class='del'>-	pci_add_flags(PCI_PROBE_ONLY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	unsigned int defirq = channel ? 15 : 14;</div><div class='del'>-	unsigned int irq;</div><div class='del'>-</div><div class='del'>-	if (pdev-&gt;vendor != PCI_VENDOR_ID_AMD ||</div><div class='del'>-	    pdev-&gt;device != PCI_DEVICE_ID_AMD_8111_IDE)</div><div class='del'>-		return defirq;</div><div class='del'>-</div><div class='del'>-	np = pci_device_to_OF_node(pdev);</div><div class='del'>-	if (np == NULL) {</div><div class='del'>-		printk("Failed to locate OF node for IDE %s\n",</div><div class='del'>-		       pci_name(pdev));</div><div class='del'>-		return defirq;</div><div class='del'>-	}</div><div class='del'>-	irq = irq_of_parse_and_map(np, channel &amp; 0x1);</div><div class='del'>-	if (!irq) {</div><div class='del'>-		printk("Failed to map onboard IDE interrupt for channel %d\n",</div><div class='del'>-		       channel);</div><div class='del'>-		return defirq;</div><div class='del'>-	}</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void quirk_ipr_msi(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	/* Something prevents MSIs from the IPR from working on Bimini,</div><div class='del'>-	 * and the driver has no smarts to recover. So disable MSI</div><div class='del'>-	 * on it for now. */</div><div class='del'>-</div><div class='del'>-	if (machine_is(maple)) {</div><div class='del'>-		dev-&gt;no_msi = 1;</div><div class='del'>-		dev_info(&amp;dev-&gt;dev, "Quirk disabled MSI\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,</div><div class='del'>-			quirk_ipr_msi);</div><div class='del'>-</div><div class='del'>-struct pci_controller_ops maple_pci_controller_ops = {</div><div class='del'>-};</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c<br/>deleted file mode 100644<br/>index f329a03edf4a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/setup.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,363 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- *  Maple (970 eval board) setup code</div><div class='del'>- *</div><div class='del'>- *  (c) Copyright 2004 Benjamin Herrenschmidt (benh@kernel.crashing.org),</div><div class='del'>- *                     IBM Corp. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/unistd.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/user.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/major.h&gt;</div><div class='del'>-#include &lt;linux/initrd.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='del'>-#include &lt;linux/console.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/adb.h&gt;</div><div class='del'>-#include &lt;linux/cuda.h&gt;</div><div class='del'>-#include &lt;linux/pmu.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/root_dev.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pci-bridge.h&gt;</div><div class='del'>-#include &lt;asm/iommu.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/cputable.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/mpic.h&gt;</div><div class='del'>-#include &lt;asm/rtas.h&gt;</div><div class='del'>-#include &lt;asm/udbg.h&gt;</div><div class='del'>-#include &lt;asm/nvram.h&gt;</div><div class='del'>-</div><div class='del'>-#include "maple.h"</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(fmt...) udbg_printf(fmt)</div><div class='del'>-#else</div><div class='del'>-#define DBG(fmt...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static unsigned long maple_find_nvram_base(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *rtcs;</div><div class='del'>-	unsigned long result = 0;</div><div class='del'>-</div><div class='del'>-	/* find NVRAM device */</div><div class='del'>-	rtcs = of_find_compatible_node(NULL, "nvram", "AMD8111");</div><div class='del'>-	if (rtcs) {</div><div class='del'>-		struct resource r;</div><div class='del'>-		if (of_address_to_resource(rtcs, 0, &amp;r)) {</div><div class='del'>-			printk(KERN_EMERG "Maple: Unable to translate NVRAM"</div><div class='del'>-			       " address\n");</div><div class='del'>-			goto bail;</div><div class='del'>-		}</div><div class='del'>-		if (!(r.flags &amp; IORESOURCE_IO)) {</div><div class='del'>-			printk(KERN_EMERG "Maple: NVRAM address isn't PIO!\n");</div><div class='del'>-			goto bail;</div><div class='del'>-		}</div><div class='del'>-		result = r.start;</div><div class='del'>-	} else</div><div class='del'>-		printk(KERN_EMERG "Maple: Unable to find NVRAM\n");</div><div class='del'>- bail:</div><div class='del'>-	of_node_put(rtcs);</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __noreturn maple_restart(char *cmd)</div><div class='del'>-{</div><div class='del'>-	unsigned int maple_nvram_base;</div><div class='del'>-	const unsigned int *maple_nvram_offset, *maple_nvram_command;</div><div class='del'>-	struct device_node *sp;</div><div class='del'>-</div><div class='del'>-	maple_nvram_base = maple_find_nvram_base();</div><div class='del'>-	if (maple_nvram_base == 0)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	/* find service processor device */</div><div class='del'>-	sp = of_find_node_by_name(NULL, "service-processor");</div><div class='del'>-	if (!sp) {</div><div class='del'>-		printk(KERN_EMERG "Maple: Unable to find Service Processor\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-	maple_nvram_offset = of_get_property(sp, "restart-addr", NULL);</div><div class='del'>-	maple_nvram_command = of_get_property(sp, "restart-value", NULL);</div><div class='del'>-	of_node_put(sp);</div><div class='del'>-</div><div class='del'>-	/* send command */</div><div class='del'>-	outb_p(*maple_nvram_command, maple_nvram_base + *maple_nvram_offset);</div><div class='del'>-	for (;;) ;</div><div class='del'>- fail:</div><div class='del'>-	printk(KERN_EMERG "Maple: Manual Restart Required\n");</div><div class='del'>-	for (;;) ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __noreturn maple_power_off(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int maple_nvram_base;</div><div class='del'>-	const unsigned int *maple_nvram_offset, *maple_nvram_command;</div><div class='del'>-	struct device_node *sp;</div><div class='del'>-</div><div class='del'>-	maple_nvram_base = maple_find_nvram_base();</div><div class='del'>-	if (maple_nvram_base == 0)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	/* find service processor device */</div><div class='del'>-	sp = of_find_node_by_name(NULL, "service-processor");</div><div class='del'>-	if (!sp) {</div><div class='del'>-		printk(KERN_EMERG "Maple: Unable to find Service Processor\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-	maple_nvram_offset = of_get_property(sp, "power-off-addr", NULL);</div><div class='del'>-	maple_nvram_command = of_get_property(sp, "power-off-value", NULL);</div><div class='del'>-	of_node_put(sp);</div><div class='del'>-</div><div class='del'>-	/* send command */</div><div class='del'>-	outb_p(*maple_nvram_command, maple_nvram_base + *maple_nvram_offset);</div><div class='del'>-	for (;;) ;</div><div class='del'>- fail:</div><div class='del'>-	printk(KERN_EMERG "Maple: Manual Power-Down Required\n");</div><div class='del'>-	for (;;) ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __noreturn maple_halt(void)</div><div class='del'>-{</div><div class='del'>-	maple_power_off();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-static struct smp_ops_t maple_smp_ops = {</div><div class='del'>-	.probe		= smp_mpic_probe,</div><div class='del'>-	.message_pass	= smp_mpic_message_pass,</div><div class='del'>-	.kick_cpu	= smp_generic_kick_cpu,</div><div class='del'>-	.setup_cpu	= smp_mpic_setup_cpu,</div><div class='del'>-	.give_timebase	= smp_generic_give_timebase,</div><div class='del'>-	.take_timebase	= smp_generic_take_timebase,</div><div class='del'>-};</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-</div><div class='del'>-static void __init maple_use_rtas_reboot_and_halt_if_present(void)</div><div class='del'>-{</div><div class='del'>-	if (rtas_function_implemented(RTAS_FN_SYSTEM_REBOOT) &amp;&amp;</div><div class='del'>-	    rtas_function_implemented(RTAS_FN_POWER_OFF)) {</div><div class='del'>-		ppc_md.restart = rtas_restart;</div><div class='del'>-		pm_power_off = rtas_power_off;</div><div class='del'>-		ppc_md.halt = rtas_halt;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init maple_setup_arch(void)</div><div class='del'>-{</div><div class='del'>-	/* init to some ~sane value until calibrate_delay() runs */</div><div class='del'>-	loops_per_jiffy = 50000000;</div><div class='del'>-</div><div class='del'>-	/* Setup SMP callback */</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	smp_ops = &amp;maple_smp_ops;</div><div class='del'>-#endif</div><div class='del'>-	maple_use_rtas_reboot_and_halt_if_present();</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "Using native/NAP idle loop\n");</div><div class='del'>-</div><div class='del'>-	mmio_nvram_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is almost identical to pSeries and CHRP. We need to make that</div><div class='del'>- * code generic at one point, with appropriate bits in the device-tree to</div><div class='del'>- * identify the presence of an HT APIC</div><div class='del'>- */</div><div class='del'>-static void __init maple_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *root, *np, *mpic_node = NULL;</div><div class='del'>-	const unsigned int *opprop;</div><div class='del'>-	unsigned long openpic_addr = 0;</div><div class='del'>-	int naddr, n, i, opplen, has_isus = 0;</div><div class='del'>-	struct mpic *mpic;</div><div class='del'>-	unsigned int flags = 0;</div><div class='del'>-</div><div class='del'>-	/* Locate MPIC in the device-tree. Note that there is a bug</div><div class='del'>-	 * in Maple device-tree where the type of the controller is</div><div class='del'>-	 * open-pic and not interrupt-controller</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	for_each_node_by_type(np, "interrupt-controller")</div><div class='del'>-		if (of_device_is_compatible(np, "open-pic")) {</div><div class='del'>-			mpic_node = np;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (mpic_node == NULL)</div><div class='del'>-		for_each_node_by_type(np, "open-pic") {</div><div class='del'>-			mpic_node = np;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (mpic_node == NULL) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-		       "Failed to locate the MPIC interrupt controller\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Find address list in /platform-open-pic */</div><div class='del'>-	root = of_find_node_by_path("/");</div><div class='del'>-	naddr = of_n_addr_cells(root);</div><div class='del'>-	opprop = of_get_property(root, "platform-open-pic", &amp;opplen);</div><div class='del'>-	if (opprop) {</div><div class='del'>-		openpic_addr = of_read_number(opprop, naddr);</div><div class='del'>-		has_isus = (opplen &gt; naddr);</div><div class='del'>-		printk(KERN_DEBUG "OpenPIC addr: %lx, has ISUs: %d\n",</div><div class='del'>-		       openpic_addr, has_isus);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	BUG_ON(openpic_addr == 0);</div><div class='del'>-</div><div class='del'>-	/* Check for a big endian MPIC */</div><div class='del'>-	if (of_property_read_bool(np, "big-endian"))</div><div class='del'>-		flags |= MPIC_BIG_ENDIAN;</div><div class='del'>-</div><div class='del'>-	/* XXX Maple specific bits */</div><div class='del'>-	flags |= MPIC_U3_HT_IRQS;</div><div class='del'>-	/* All U3/U4 are big-endian, older SLOF firmware doesn't encode this */</div><div class='del'>-	flags |= MPIC_BIG_ENDIAN;</div><div class='del'>-</div><div class='del'>-	/* Setup the openpic driver. More device-tree junks, we hard code no</div><div class='del'>-	 * ISUs for now. I'll have to revisit some stuffs with the folks doing</div><div class='del'>-	 * the firmware for those</div><div class='del'>-	 */</div><div class='del'>-	mpic = mpic_alloc(mpic_node, openpic_addr, flags,</div><div class='del'>-			  /*has_isus ? 16 :*/ 0, 0, " MPIC     ");</div><div class='del'>-	BUG_ON(mpic == NULL);</div><div class='del'>-</div><div class='del'>-	/* Add ISUs */</div><div class='del'>-	opplen /= sizeof(u32);</div><div class='del'>-	for (n = 0, i = naddr; i &lt; opplen; i += naddr, n++) {</div><div class='del'>-		unsigned long isuaddr = of_read_number(opprop + i, naddr);</div><div class='del'>-		mpic_assign_isu(mpic, n, isuaddr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* All ISUs are setup, complete initialization */</div><div class='del'>-	mpic_init(mpic);</div><div class='del'>-	ppc_md.get_irq = mpic_get_irq;</div><div class='del'>-	of_node_put(mpic_node);</div><div class='del'>-	of_node_put(root);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init maple_progress(char *s, unsigned short hex)</div><div class='del'>-{</div><div class='del'>-	printk("*** %04x : %s\n", hex, s ? s : "");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called very early, MMU is off, device-tree isn't unflattened</div><div class='del'>- */</div><div class='del'>-static int __init maple_probe(void)</div><div class='del'>-{</div><div class='del'>-	if (!of_machine_is_compatible("Momentum,Maple") &amp;&amp;</div><div class='del'>-	    !of_machine_is_compatible("Momentum,Apache"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pm_power_off = maple_power_off;</div><div class='del'>-</div><div class='del'>-	iommu_init_early_dart(&amp;maple_pci_controller_ops);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_EDAC</div><div class='del'>-/*</div><div class='del'>- * Register a platform device for CPC925 memory controller on</div><div class='del'>- * all boards with U3H (CPC925) bridge.</div><div class='del'>- */</div><div class='del'>-static int __init maple_cpc925_edac_setup(void)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	struct device_node *np = NULL;</div><div class='del'>-	struct resource r;</div><div class='del'>-	int ret;</div><div class='del'>-	volatile void __iomem *mem;</div><div class='del'>-	u32 rev;</div><div class='del'>-</div><div class='del'>-	np = of_find_node_by_type(NULL, "memory-controller");</div><div class='del'>-	if (!np) {</div><div class='del'>-		printk(KERN_ERR "%s: Unable to find memory-controller node\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = of_address_to_resource(np, 0, &amp;r);</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		printk(KERN_ERR "%s: Unable to get memory-controller reg\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mem = ioremap(r.start, resource_size(&amp;r));</div><div class='del'>-	if (!mem) {</div><div class='del'>-		printk(KERN_ERR "%s: Unable to map memory-controller memory\n",</div><div class='del'>-				__func__);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rev = __raw_readl(mem);</div><div class='del'>-	iounmap(mem);</div><div class='del'>-</div><div class='del'>-	if (rev &lt; 0x34 || rev &gt; 0x3f) { /* U3H */</div><div class='del'>-		printk(KERN_ERR "%s: Non-CPC925(U3H) bridge revision: %02x\n",</div><div class='del'>-			__func__, rev);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pdev = platform_device_register_simple("cpc925_edac", 0, &amp;r, 1);</div><div class='del'>-	if (IS_ERR(pdev))</div><div class='del'>-		return PTR_ERR(pdev);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s: CPC925 platform device created\n", __func__);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-machine_device_initcall(maple, maple_cpc925_edac_setup);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-define_machine(maple) {</div><div class='del'>-	.name			= "Maple",</div><div class='del'>-	.probe			= maple_probe,</div><div class='del'>-	.setup_arch		= maple_setup_arch,</div><div class='del'>-	.discover_phbs		= maple_pci_init,</div><div class='del'>-	.init_IRQ		= maple_init_IRQ,</div><div class='del'>-	.pci_irq_fixup		= maple_pci_irq_fixup,</div><div class='del'>-	.pci_get_legacy_ide_irq	= maple_pci_get_legacy_ide_irq,</div><div class='del'>-	.restart		= maple_restart,</div><div class='del'>-	.halt			= maple_halt,</div><div class='del'>-	.get_boot_time		= maple_get_boot_time,</div><div class='del'>-	.set_rtc_time		= maple_set_rtc_time,</div><div class='del'>-	.get_rtc_time		= maple_get_rtc_time,</div><div class='del'>-	.progress		= maple_progress,</div><div class='del'>-	.power_save		= power4_idle,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c<br/>deleted file mode 100644<br/>index 91606411d2e0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/maple/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/maple/time.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,170 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- *  (c) Copyright 2004 Benjamin Herrenschmidt (benh@kernel.crashing.org),</div><div class='del'>- *                     IBM Corp. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/param.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/adb.h&gt;</div><div class='del'>-#include &lt;linux/pmu.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mc146818rtc.h&gt;</div><div class='del'>-#include &lt;linux/bcd.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-</div><div class='del'>-#include "maple.h"</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(x...) printk(x)</div><div class='del'>-#else</div><div class='del'>-#define DBG(x...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int maple_rtc_addr;</div><div class='del'>-</div><div class='del'>-static int maple_clock_read(int addr)</div><div class='del'>-{</div><div class='del'>-	outb_p(addr, maple_rtc_addr);</div><div class='del'>-	return inb_p(maple_rtc_addr+1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void maple_clock_write(unsigned long val, int addr)</div><div class='del'>-{</div><div class='del'>-	outb_p(addr, maple_rtc_addr);</div><div class='del'>-	outb_p(val, maple_rtc_addr+1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void maple_get_rtc_time(struct rtc_time *tm)</div><div class='del'>-{</div><div class='del'>-	do {</div><div class='del'>-		tm-&gt;tm_sec = maple_clock_read(RTC_SECONDS);</div><div class='del'>-		tm-&gt;tm_min = maple_clock_read(RTC_MINUTES);</div><div class='del'>-		tm-&gt;tm_hour = maple_clock_read(RTC_HOURS);</div><div class='del'>-		tm-&gt;tm_mday = maple_clock_read(RTC_DAY_OF_MONTH);</div><div class='del'>-		tm-&gt;tm_mon = maple_clock_read(RTC_MONTH);</div><div class='del'>-		tm-&gt;tm_year = maple_clock_read(RTC_YEAR);</div><div class='del'>-	} while (tm-&gt;tm_sec != maple_clock_read(RTC_SECONDS));</div><div class='del'>-</div><div class='del'>-	if (!(maple_clock_read(RTC_CONTROL) &amp; RTC_DM_BINARY)</div><div class='del'>-	    || RTC_ALWAYS_BCD) {</div><div class='del'>-		tm-&gt;tm_sec = bcd2bin(tm-&gt;tm_sec);</div><div class='del'>-		tm-&gt;tm_min = bcd2bin(tm-&gt;tm_min);</div><div class='del'>-		tm-&gt;tm_hour = bcd2bin(tm-&gt;tm_hour);</div><div class='del'>-		tm-&gt;tm_mday = bcd2bin(tm-&gt;tm_mday);</div><div class='del'>-		tm-&gt;tm_mon = bcd2bin(tm-&gt;tm_mon);</div><div class='del'>-		tm-&gt;tm_year = bcd2bin(tm-&gt;tm_year);</div><div class='del'>-	  }</div><div class='del'>-	if ((tm-&gt;tm_year + 1900) &lt; 1970)</div><div class='del'>-		tm-&gt;tm_year += 100;</div><div class='del'>-</div><div class='del'>-	tm-&gt;tm_wday = -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int maple_set_rtc_time(struct rtc_time *tm)</div><div class='del'>-{</div><div class='del'>-	unsigned char save_control, save_freq_select;</div><div class='del'>-	int sec, min, hour, mon, mday, year;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-	save_control = maple_clock_read(RTC_CONTROL); /* tell the clock it's being set */</div><div class='del'>-</div><div class='del'>-	maple_clock_write((save_control|RTC_SET), RTC_CONTROL);</div><div class='del'>-</div><div class='del'>-	save_freq_select = maple_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */</div><div class='del'>-</div><div class='del'>-	maple_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);</div><div class='del'>-</div><div class='del'>-	sec = tm-&gt;tm_sec;</div><div class='del'>-	min = tm-&gt;tm_min;</div><div class='del'>-	hour = tm-&gt;tm_hour;</div><div class='del'>-	mon = tm-&gt;tm_mon;</div><div class='del'>-	mday = tm-&gt;tm_mday;</div><div class='del'>-	year = tm-&gt;tm_year;</div><div class='del'>-</div><div class='del'>-	if (!(save_control &amp; RTC_DM_BINARY) || RTC_ALWAYS_BCD) {</div><div class='del'>-		sec = bin2bcd(sec);</div><div class='del'>-		min = bin2bcd(min);</div><div class='del'>-		hour = bin2bcd(hour);</div><div class='del'>-		mon = bin2bcd(mon);</div><div class='del'>-		mday = bin2bcd(mday);</div><div class='del'>-		year = bin2bcd(year);</div><div class='del'>-	}</div><div class='del'>-	maple_clock_write(sec, RTC_SECONDS);</div><div class='del'>-	maple_clock_write(min, RTC_MINUTES);</div><div class='del'>-	maple_clock_write(hour, RTC_HOURS);</div><div class='del'>-	maple_clock_write(mon, RTC_MONTH);</div><div class='del'>-	maple_clock_write(mday, RTC_DAY_OF_MONTH);</div><div class='del'>-	maple_clock_write(year, RTC_YEAR);</div><div class='del'>-</div><div class='del'>-	/* The following flags have to be released exactly in this order,</div><div class='del'>-	 * otherwise the DS12887 (popular MC146818A clone with integrated</div><div class='del'>-	 * battery and quartz) will not reset the oscillator and will not</div><div class='del'>-	 * update precisely 500 ms later. You won't find this mentioned in</div><div class='del'>-	 * the Dallas Semiconductor data sheets, but who believes data</div><div class='del'>-	 * sheets anyway ...                           -- Markus Kuhn</div><div class='del'>-	 */</div><div class='del'>-	maple_clock_write(save_control, RTC_CONTROL);</div><div class='del'>-	maple_clock_write(save_freq_select, RTC_FREQ_SELECT);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct resource rtc_iores = {</div><div class='del'>-	.name = "rtc",</div><div class='del'>-	.flags = IORESOURCE_IO | IORESOURCE_BUSY,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-time64_t __init maple_get_boot_time(void)</div><div class='del'>-{</div><div class='del'>-	struct rtc_time tm;</div><div class='del'>-	struct device_node *rtcs;</div><div class='del'>-</div><div class='del'>-	rtcs = of_find_compatible_node(NULL, "rtc", "pnpPNP,b00");</div><div class='del'>-	if (rtcs) {</div><div class='del'>-		struct resource r;</div><div class='del'>-		if (of_address_to_resource(rtcs, 0, &amp;r)) {</div><div class='del'>-			printk(KERN_EMERG "Maple: Unable to translate RTC"</div><div class='del'>-			       " address\n");</div><div class='del'>-			goto bail;</div><div class='del'>-		}</div><div class='del'>-		if (!(r.flags &amp; IORESOURCE_IO)) {</div><div class='del'>-			printk(KERN_EMERG "Maple: RTC address isn't PIO!\n");</div><div class='del'>-			goto bail;</div><div class='del'>-		}</div><div class='del'>-		maple_rtc_addr = r.start;</div><div class='del'>-		printk(KERN_INFO "Maple: Found RTC at IO 0x%x\n",</div><div class='del'>-		       maple_rtc_addr);</div><div class='del'>-	}</div><div class='del'>- bail:</div><div class='del'>-	of_node_put(rtcs);</div><div class='del'>-	if (maple_rtc_addr == 0) {</div><div class='del'>-		maple_rtc_addr = RTC_PORT(0); /* legacy address */</div><div class='del'>-		printk(KERN_INFO "Maple: No device node for RTC, assuming "</div><div class='del'>-		       "legacy address (0x%x)\n", maple_rtc_addr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rtc_iores.start = maple_rtc_addr;</div><div class='del'>-	rtc_iores.end = maple_rtc_addr + 7;</div><div class='del'>-	request_resource(&amp;ioport_resource, &amp;rtc_iores);</div><div class='del'>-</div><div class='del'>-	maple_get_rtc_time(&amp;tm);</div><div class='del'>-	return rtc_tm_to_time64(&amp;tm);</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/platforms/microwatt/Kconfig b/arch/powerpc/platforms/microwatt/Kconfig<br/>index 6af443a1db99..cb2aff635bb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/microwatt/Kconfig</a></div><div class='hunk'>@@ -1,11 +1,12 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> config PPC_MICROWATT</div><div class='del'>-	depends on PPC_BOOK3S_64 &amp;&amp; !SMP</div><div class='add'>+	depends on PPC_BOOK3S_64</div><div class='ctx'> 	bool "Microwatt SoC platform"</div><div class='ctx'> 	select PPC_XICS</div><div class='ctx'> 	select PPC_ICS_NATIVE</div><div class='ctx'> 	select PPC_ICP_NATIVE</div><div class='ctx'> 	select PPC_UDBG_16550</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	help</div><div class='ctx'>           This option enables support for FPGA-based Microwatt implementations.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/microwatt/Makefile b/arch/powerpc/platforms/microwatt/Makefile<br/>index 116d6d3ad3f0..d973b2ab4042 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/microwatt/Makefile</a></div><div class='hunk'>@@ -1 +1,2 @@</div><div class='ctx'> obj-y	+= setup.o rng.o</div><div class='add'>+obj-$(CONFIG_SMP) += smp.o</div><div class='head'>diff --git a/arch/powerpc/platforms/microwatt/microwatt.h b/arch/powerpc/platforms/microwatt/microwatt.h<br/>index 335417e95e66..891aa2800768 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/microwatt.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/microwatt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/microwatt.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/microwatt/microwatt.h</a></div><div class='hunk'>@@ -3,5 +3,6 @@</div><div class='ctx'> #define _MICROWATT_H</div><div class='ctx'> </div><div class='ctx'> void microwatt_rng_init(void);</div><div class='add'>+void microwatt_init_smp(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* _MICROWATT_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/microwatt/setup.c b/arch/powerpc/platforms/microwatt/setup.c<br/>index 5e1c0997170d..6af2ccef736c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/microwatt/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/microwatt/setup.c</a></div><div class='hunk'>@@ -29,15 +29,33 @@ static int __init microwatt_populate(void)</div><div class='ctx'> }</div><div class='ctx'> machine_arch_initcall(microwatt, microwatt_populate);</div><div class='ctx'> </div><div class='add'>+static int __init microwatt_probe(void)</div><div class='add'>+{</div><div class='add'>+	/* Main reason for having this is to start the other CPU(s) */</div><div class='add'>+	if (IS_ENABLED(CONFIG_SMP))</div><div class='add'>+		microwatt_init_smp();</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init microwatt_setup_arch(void)</div><div class='ctx'> {</div><div class='ctx'> 	microwatt_rng_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void microwatt_idle(void)</div><div class='add'>+{</div><div class='add'>+	if (!prep_irq_for_idle_irqsoff())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__ ("wait");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> define_machine(microwatt) {</div><div class='ctx'> 	.name			= "microwatt",</div><div class='ctx'> 	.compatible		= "microwatt-soc",</div><div class='add'>+	.probe			= microwatt_probe,</div><div class='ctx'> 	.init_IRQ		= microwatt_init_IRQ,</div><div class='ctx'> 	.setup_arch		= microwatt_setup_arch,</div><div class='ctx'> 	.progress		= udbg_progress,</div><div class='add'>+	.power_save		= microwatt_idle,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/platforms/microwatt/smp.c b/arch/powerpc/platforms/microwatt/smp.c<br/>new file mode 100644<br/>index 000000000000..7dbf2ca73d47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/microwatt/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/microwatt/smp.c</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SMP support functions for Microwatt</div><div class='add'>+ * Copyright 2025 Paul Mackerras &lt;paulus@ozlabs.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;asm/early_ioremap.h&gt;</div><div class='add'>+#include &lt;asm/ppc-opcode.h&gt;</div><div class='add'>+#include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/xics.h&gt;</div><div class='add'>+</div><div class='add'>+#include "microwatt.h"</div><div class='add'>+</div><div class='add'>+static void __init microwatt_smp_probe(void)</div><div class='add'>+{</div><div class='add'>+	xics_smp_probe();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void microwatt_smp_setup_cpu(int cpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu != 0)</div><div class='add'>+		xics_setup_cpu();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct smp_ops_t microwatt_smp_ops = {</div><div class='add'>+	.probe		= microwatt_smp_probe,</div><div class='add'>+	.message_pass	= NULL,		/* Use smp_muxed_ipi_message_pass */</div><div class='add'>+	.kick_cpu	= smp_generic_kick_cpu,</div><div class='add'>+	.setup_cpu	= microwatt_smp_setup_cpu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* XXX get from device tree */</div><div class='add'>+#define SYSCON_BASE	0xc0000000</div><div class='add'>+#define SYSCON_LENGTH	0x100</div><div class='add'>+</div><div class='add'>+#define SYSCON_CPU_CTRL	0x58</div><div class='add'>+</div><div class='add'>+void __init microwatt_init_smp(void)</div><div class='add'>+{</div><div class='add'>+	volatile unsigned char __iomem *syscon;</div><div class='add'>+	int ncpus;</div><div class='add'>+	int timeout;</div><div class='add'>+</div><div class='add'>+	syscon = early_ioremap(SYSCON_BASE, SYSCON_LENGTH);</div><div class='add'>+	if (syscon == NULL) {</div><div class='add'>+		pr_err("Failed to map SYSCON\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	ncpus = (readl(syscon + SYSCON_CPU_CTRL) &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	if (ncpus &lt; 2)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	smp_ops = &amp;microwatt_smp_ops;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write two instructions at location 0:</div><div class='add'>+	 * mfspr r3, PIR</div><div class='add'>+	 * b __secondary_hold</div><div class='add'>+	 */</div><div class='add'>+	*(unsigned int *)KERNELBASE = PPC_RAW_MFSPR(3, SPRN_PIR);</div><div class='add'>+	*(unsigned int *)(KERNELBASE+4) = PPC_RAW_BRANCH(&amp;__secondary_hold - (char *)(KERNELBASE+4));</div><div class='add'>+</div><div class='add'>+	/* enable the other CPUs, they start at location 0 */</div><div class='add'>+	writel((1ul &lt;&lt; ncpus) - 1, syscon + SYSCON_CPU_CTRL);</div><div class='add'>+</div><div class='add'>+	timeout = 10000;</div><div class='add'>+	while (!__secondary_hold_acknowledge) {</div><div class='add'>+		if (--timeout == 0)</div><div class='add'>+			break;</div><div class='add'>+		barrier();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	early_iounmap((void *)syscon, SYSCON_LENGTH);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c<br/>index 0761d98e5be3..d03b41336901 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pasemi/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pasemi/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pasemi/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pasemi/setup.c</a></div><div class='hunk'>@@ -228,7 +228,7 @@ static void __init nemo_init_IRQ(struct mpic *mpic)</div><div class='ctx'> 	irq_set_chained_handler(gpio_virq, sb600_8259_cascade);</div><div class='ctx'> 	mpic_unmask_irq(irq_get_irq_data(gpio_virq));</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(mpic-&gt;irqhost);</div><div class='add'>+	irq_set_default_domain(mpic-&gt;irqhost);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/backlight.c b/arch/powerpc/platforms/powermac/backlight.c<br/>index 12bc01353bd3..79741370c40c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/backlight.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/backlight.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/backlight.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/backlight.c</a></div><div class='hunk'>@@ -57,18 +57,10 @@ struct backlight_device *pmac_backlight;</div><div class='ctx'> int pmac_has_backlight_type(const char *type)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node* bk_node = of_find_node_by_name(NULL, "backlight");</div><div class='add'>+	int i = of_property_match_string(bk_node, "backlight-control", type);</div><div class='ctx'> </div><div class='del'>-	if (bk_node) {</div><div class='del'>-		const char *prop = of_get_property(bk_node,</div><div class='del'>-				"backlight-control", NULL);</div><div class='del'>-		if (prop &amp;&amp; strncmp(prop, type, strlen(type)) == 0) {</div><div class='del'>-			of_node_put(bk_node);</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='del'>-		of_node_put(bk_node);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	of_node_put(bk_node);</div><div class='add'>+	return i &gt;= 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pmac_backlight_key_worker(struct work_struct *work)</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c<br/>index c097d591670e..02474e27df9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/low_i2c.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/low_i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/low_i2c.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/low_i2c.c</a></div><div class='hunk'>@@ -347,7 +347,7 @@ static irqreturn_t kw_i2c_irq(int irq, void *dev_id)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;host-&gt;lock, flags);</div><div class='del'>-	del_timer(&amp;host-&gt;timeout_timer);</div><div class='add'>+	timer_delete(&amp;host-&gt;timeout_timer);</div><div class='ctx'> 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));</div><div class='ctx'> 	if (host-&gt;state != state_idle) {</div><div class='ctx'> 		host-&gt;timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;</div><div class='hunk'>@@ -359,7 +359,8 @@ static irqreturn_t kw_i2c_irq(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void kw_i2c_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);</div><div class='add'>+	struct pmac_i2c_host_kw *host = timer_container_of(host, t,</div><div class='add'>+							   timeout_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;host-&gt;lock, flags);</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c<br/>index fe2e0249cbc2..a112d26185a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/nvram.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/nvram.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/nvram.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/nvram.c</a></div><div class='hunk'>@@ -514,10 +514,7 @@ static int __init core99_nvram_setup(struct device_node *dp, unsigned long addr)</div><div class='ctx'> 		printk(KERN_ERR "nvram: no address\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	nvram_image = memblock_alloc(NVRAM_SIZE, SMP_CACHE_BYTES);</div><div class='del'>-	if (!nvram_image)</div><div class='del'>-		panic("%s: Failed to allocate %u bytes\n", __func__,</div><div class='del'>-		      NVRAM_SIZE);</div><div class='add'>+	nvram_image = memblock_alloc_or_panic(NVRAM_SIZE, SMP_CACHE_BYTES);</div><div class='ctx'> 	nvram_data = ioremap(addr, NVRAM_SIZE*2);</div><div class='ctx'> 	nvram_naddrs = 1; /* Make sure we get the correct case */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c<br/>index 2202bf77c7a3..c37783a03d25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/pic.c</a></div><div class='hunk'>@@ -250,7 +250,7 @@ static unsigned int pmac_pic_get_irq(void)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;pmac_pic_lock, flags);</div><div class='ctx'> 	if (unlikely(irq &lt; 0))</div><div class='ctx'> 		return 0;</div><div class='del'>-	return irq_linear_revmap(pmac_pic_host, irq);</div><div class='add'>+	return irq_find_mapping(pmac_pic_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node,</div><div class='hunk'>@@ -327,10 +327,11 @@ static void __init pmac_pic_probe_oldstyle(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate an irq host</div><div class='ctx'> 	 */</div><div class='del'>-	pmac_pic_host = irq_domain_add_linear(master, max_irqs,</div><div class='del'>-					      &amp;pmac_pic_host_ops, NULL);</div><div class='add'>+	pmac_pic_host = irq_domain_create_linear(of_fwnode_handle(master),</div><div class='add'>+						 max_irqs,</div><div class='add'>+						 &amp;pmac_pic_host_ops, NULL);</div><div class='ctx'> 	BUG_ON(pmac_pic_host == NULL);</div><div class='del'>-	irq_set_default_host(pmac_pic_host);</div><div class='add'>+	irq_set_default_domain(pmac_pic_host);</div><div class='ctx'> </div><div class='ctx'> 	/* Get addresses of first controller if we have a node for it */</div><div class='ctx'> 	BUG_ON(of_address_to_resource(master, 0, &amp;r));</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c<br/>index 6de1cd5d8a58..eb092f293113 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/setup.c</a></div><div class='hunk'>@@ -28,13 +28,11 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/user.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/major.h&gt;</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='del'>-#include &lt;linux/vt_kern.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/adb.h&gt;</div><div class='hunk'>@@ -45,6 +43,7 @@</div><div class='ctx'> #include &lt;linux/root_dev.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -238,8 +237,7 @@ static void __init l2cr_init(void)</div><div class='ctx'> 				_set_L2CR(0);</div><div class='ctx'> 				_set_L2CR(*l2cr);</div><div class='ctx'> 				pr_info("L2CR overridden (0x%x), backside cache is %s\n",</div><div class='del'>-					*l2cr, ((*l2cr) &amp; 0x80000000) ?</div><div class='del'>-					"enabled" : "disabled");</div><div class='add'>+					*l2cr, str_enabled_disabled((*l2cr) &amp; 0x80000000));</div><div class='ctx'> 			}</div><div class='ctx'> 			of_node_put(np);</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c<br/>index d21b681f52fb..88e92af8acf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/smp.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='hunk'>@@ -190,7 +190,7 @@ static int __init psurge_secondary_ipi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	psurge_host = irq_domain_add_nomap(NULL, ~0, &amp;psurge_host_ops, NULL);</div><div class='add'>+	psurge_host = irq_domain_create_nomap(NULL, ~0, &amp;psurge_host_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (psurge_host)</div><div class='ctx'> 		psurge_secondary_virq = irq_create_direct_mapping(psurge_host);</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c<br/>index 8633891b7aa5..b4426a35aca3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/time.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powermac/time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powermac/time.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powermac/time.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/param.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='hunk'>@@ -77,7 +78,7 @@ long __init pmac_time_init(void)</div><div class='ctx'> 		delta |= 0xFF000000UL;</div><div class='ctx'> 	dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) &amp; 0x80) != 0);</div><div class='ctx'> 	printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,</div><div class='del'>-		dst ? "on" : "off");</div><div class='add'>+		str_on_off(dst));</div><div class='ctx'> #endif</div><div class='ctx'> 	return delta;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig<br/>index 70a46acc70d6..b5ad7c173ef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/Kconfig</a></div><div class='hunk'>@@ -9,6 +9,7 @@ config PPC_POWERNV</div><div class='ctx'> 	select PPC_P7_NAP</div><div class='ctx'> 	select FORCE_PCI</div><div class='ctx'> 	select PCI_MSI</div><div class='add'>+	select IRQ_MSI_LIB</div><div class='ctx'> 	select EPAPR_BOOT</div><div class='ctx'> 	select PPC_INDIRECT_PIO</div><div class='ctx'> 	select PPC_UDBG_16550</div><div class='hunk'>@@ -17,6 +18,7 @@ config PPC_POWERNV</div><div class='ctx'> 	select MMU_NOTIFIER</div><div class='ctx'> 	select FORCE_SMP</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='add'>+	select PPC_RADIX_BROADCAST_TLBIE if PPC_RADIX_MMU</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config OPAL_PRD</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile<br/>index 19f0fc5c6f1b..9e5d0c847ee2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/Makefile</a></div><div class='hunk'>@@ -21,7 +21,6 @@ obj-$(CONFIG_PRESERVE_FA_DUMP)	+= opal-fadump.o</div><div class='ctx'> obj-$(CONFIG_OPAL_CORE)	+= opal-core.o</div><div class='ctx'> obj-$(CONFIG_PCI)	+= pci.o pci-ioda.o pci-ioda-tce.o</div><div class='ctx'> obj-$(CONFIG_PCI_IOV)   += pci-sriov.o</div><div class='del'>-obj-$(CONFIG_CXL_BASE)	+= pci-cxl.o</div><div class='ctx'> obj-$(CONFIG_EEH)	+= eeh-powernv.o</div><div class='ctx'> obj-$(CONFIG_MEMORY_FAILURE)	+= opal-memory-errors.o</div><div class='ctx'> obj-$(CONFIG_OPAL_PRD)	+= opal-prd.o</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c<br/>index ad41dffe4d92..d98b933e4984 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/idle.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/idle.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/idle.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/idle.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> #include &lt;asm/cputhreads.h&gt;</div><div class='ctx'> #include &lt;asm/cpuidle.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/runlatch.h&gt;</div><div class='ctx'> #include &lt;asm/dbell.h&gt;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/memtrace.c b/arch/powerpc/platforms/powernv/memtrace.c<br/>index 877720c64515..2ea30b343354 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/memtrace.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/memtrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/memtrace.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/memtrace.c</a></div><div class='hunk'>@@ -48,11 +48,15 @@ static ssize_t memtrace_read(struct file *filp, char __user *ubuf,</div><div class='ctx'> static int memtrace_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct memtrace_entry *ent = filp-&gt;private_data;</div><div class='add'>+	unsigned long ent_nrpages = ent-&gt;size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	unsigned long vma_nrpages = vma_pages(vma);</div><div class='ctx'> </div><div class='del'>-	if (ent-&gt;size &lt; vma-&gt;vm_end - vma-&gt;vm_start)</div><div class='add'>+	/* The requested page offset should be within object's page count */</div><div class='add'>+	if (vma-&gt;vm_pgoff &gt;= ent_nrpages)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (vma-&gt;vm_pgoff &lt;&lt; PAGE_SHIFT &gt;= ent-&gt;size)</div><div class='add'>+	/* The requested mapping range should remain within the bounds */</div><div class='add'>+	if (vma_nrpages &gt; ent_nrpages - vma-&gt;vm_pgoff)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	vma-&gt;vm_page_prot = pgprot_noncached(vma-&gt;vm_page_prot);</div><div class='hunk'>@@ -88,26 +92,6 @@ static void flush_dcache_range_chunked(unsigned long start, unsigned long stop,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void memtrace_clear_range(unsigned long start_pfn,</div><div class='del'>-				 unsigned long nr_pages)</div><div class='del'>-{</div><div class='del'>-	unsigned long pfn;</div><div class='del'>-</div><div class='del'>-	/* As HIGHMEM does not apply, use clear_page() directly. */</div><div class='del'>-	for (pfn = start_pfn; pfn &lt; start_pfn + nr_pages; pfn++) {</div><div class='del'>-		if (IS_ALIGNED(pfn, PAGES_PER_SECTION))</div><div class='del'>-			cond_resched();</div><div class='del'>-		clear_page(__va(PFN_PHYS(pfn)));</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * Before we go ahead and use this range as cache inhibited range</div><div class='del'>-	 * flush the cache.</div><div class='del'>-	 */</div><div class='del'>-	flush_dcache_range_chunked((unsigned long)pfn_to_kaddr(start_pfn),</div><div class='del'>-				   (unsigned long)pfn_to_kaddr(start_pfn + nr_pages),</div><div class='del'>-				   FLUSH_CHUNK_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u64 memtrace_alloc_node(u32 nid, u64 size)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long nr_pages = PHYS_PFN(size);</div><div class='hunk'>@@ -119,17 +103,18 @@ static u64 memtrace_alloc_node(u32 nid, u64 size)</div><div class='ctx'> 	 * by alloc_contig_pages().</div><div class='ctx'> 	 */</div><div class='ctx'> 	page = alloc_contig_pages(nr_pages, GFP_KERNEL | __GFP_THISNODE |</div><div class='del'>-				  __GFP_NOWARN, nid, NULL);</div><div class='add'>+				  __GFP_NOWARN | __GFP_ZERO, nid, NULL);</div><div class='ctx'> 	if (!page)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	start_pfn = page_to_pfn(page);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Clear the range while we still have a linear mapping.</div><div class='del'>-	 *</div><div class='del'>-	 * TODO: use __GFP_ZERO with alloc_contig_pages() once supported.</div><div class='add'>+	 * Before we go ahead and use this range as cache inhibited range</div><div class='add'>+	 * flush the cache.</div><div class='ctx'> 	 */</div><div class='del'>-	memtrace_clear_range(start_pfn, nr_pages);</div><div class='add'>+	flush_dcache_range_chunked((unsigned long)pfn_to_kaddr(start_pfn),</div><div class='add'>+				   (unsigned long)pfn_to_kaddr(start_pfn + nr_pages),</div><div class='add'>+				   FLUSH_CHUNK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set pages PageOffline(), to indicate that nobody (e.g., hibernation,</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c<br/>index 64a9c7125c29..f8139948348e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/ocxl.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/ocxl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/ocxl.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/ocxl.c</a></div><div class='hunk'>@@ -172,12 +172,11 @@ static void pnv_ocxl_fixup_actag(struct pci_dev *dev)</div><div class='ctx'> 	if (phb-&gt;type != PNV_PHB_NPU_OCAPI)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;links_list_lock);</div><div class='add'>+	guard(mutex)(&amp;links_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	link = find_link(dev);</div><div class='ctx'> 	if (!link) {</div><div class='ctx'> 		dev_warn(&amp;dev-&gt;dev, "couldn't update actag information\n");</div><div class='del'>-		mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +205,6 @@ static void pnv_ocxl_fixup_actag(struct pci_dev *dev)</div><div class='ctx'> 	dev_dbg(&amp;dev-&gt;dev, "total actags for function: %d\n",</div><div class='ctx'> 		link-&gt;fn_desired_actags[PCI_FUNC(dev-&gt;devfn)]);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> }</div><div class='ctx'> DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pnv_ocxl_fixup_actag);</div><div class='ctx'> </div><div class='hunk'>@@ -253,12 +251,11 @@ int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled,</div><div class='ctx'> {</div><div class='ctx'> 	struct npu_link *link;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;links_list_lock);</div><div class='add'>+	guard(mutex)(&amp;links_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	link = find_link(dev);</div><div class='ctx'> 	if (!link) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;dev, "actag information not found\n");</div><div class='del'>-		mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -274,7 +271,6 @@ int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled,</div><div class='ctx'> 	*enabled   = link-&gt;fn_actags[PCI_FUNC(dev-&gt;devfn)].count;</div><div class='ctx'> 	*supported = link-&gt;fn_desired_actags[PCI_FUNC(dev-&gt;devfn)];</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pnv_ocxl_get_actag);</div><div class='hunk'>@@ -293,12 +289,11 @@ int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * We only support one AFU-carrying function for now.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;links_list_lock);</div><div class='add'>+	guard(mutex)(&amp;links_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	link = find_link(dev);</div><div class='ctx'> 	if (!link) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;dev, "actag information not found\n");</div><div class='del'>-		mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +304,6 @@ int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;links_list_lock);</div><div class='ctx'> 	dev_dbg(&amp;dev-&gt;dev, "%d PASIDs available for function\n",</div><div class='ctx'> 		rc ? 0 : *count);</div><div class='ctx'> 	return rc;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-core.c b/arch/powerpc/platforms/powernv/opal-core.c<br/>index c9a9b759cc92..784602a48afb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-core.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-core.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-core.c</a></div><div class='hunk'>@@ -149,7 +149,7 @@ static Elf64_Word *__init auxv_to_elf64_notes(Elf64_Word *buf,</div><div class='ctx'> 	/* end of vector */</div><div class='ctx'> 	bufp[idx++] = cpu_to_be64(AT_NULL);</div><div class='ctx'> </div><div class='del'>-	buf = append_elf64_note(buf, CRASH_CORE_NOTE_NAME, NT_AUXV,</div><div class='add'>+	buf = append_elf64_note(buf, NN_AUXV, NT_AUXV,</div><div class='ctx'> 				oc_conf-&gt;auxv_buf, AUXV_DESC_SZ);</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='hunk'>@@ -159,7 +159,7 @@ static Elf64_Word *__init auxv_to_elf64_notes(Elf64_Word *buf,</div><div class='ctx'>  * Returns number of bytes read on success, -errno on failure.</div><div class='ctx'>  */</div><div class='ctx'> static ssize_t read_opalcore(struct file *file, struct kobject *kobj,</div><div class='del'>-			     struct bin_attribute *bin_attr, char *to,</div><div class='add'>+			     const struct bin_attribute *bin_attr, char *to,</div><div class='ctx'> 			     loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct opalcore *m;</div><div class='hunk'>@@ -206,7 +206,7 @@ static ssize_t read_opalcore(struct file *file, struct kobject *kobj,</div><div class='ctx'> 	return (tpos - pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute opal_core_attr = {</div><div class='add'>+static struct bin_attribute opal_core_attr __ro_after_init = {</div><div class='ctx'> 	.attr = {.name = "core", .mode = 0400},</div><div class='ctx'> 	.read = read_opalcore</div><div class='ctx'> };</div><div class='hunk'>@@ -252,7 +252,7 @@ static Elf64_Word * __init opalcore_append_cpu_notes(Elf64_Word *buf)</div><div class='ctx'> 	 * crashing CPU's prstatus.</div><div class='ctx'> 	 */</div><div class='ctx'> 	first_cpu_note = buf;</div><div class='del'>-	buf = append_elf64_note(buf, CRASH_CORE_NOTE_NAME, NT_PRSTATUS,</div><div class='add'>+	buf = append_elf64_note(buf, NN_PRSTATUS, NT_PRSTATUS,</div><div class='ctx'> 				&amp;prstatus, sizeof(prstatus));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; oc_conf-&gt;num_cpus; i++, bufp += size_per_thread) {</div><div class='hunk'>@@ -279,7 +279,7 @@ static Elf64_Word * __init opalcore_append_cpu_notes(Elf64_Word *buf)</div><div class='ctx'> 		fill_prstatus(&amp;prstatus, thread_pir, &amp;regs);</div><div class='ctx'> </div><div class='ctx'> 		if (thread_pir != oc_conf-&gt;crashing_cpu) {</div><div class='del'>-			buf = append_elf64_note(buf, CRASH_CORE_NOTE_NAME,</div><div class='add'>+			buf = append_elf64_note(buf, NN_PRSTATUS,</div><div class='ctx'> 						NT_PRSTATUS, &amp;prstatus,</div><div class='ctx'> 						sizeof(prstatus));</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -287,7 +287,7 @@ static Elf64_Word * __init opalcore_append_cpu_notes(Elf64_Word *buf)</div><div class='ctx'> 			 * Add crashing CPU as the first NT_PRSTATUS note for</div><div class='ctx'> 			 * GDB to process the core file appropriately.</div><div class='ctx'> 			 */</div><div class='del'>-			append_elf64_note(first_cpu_note, CRASH_CORE_NOTE_NAME,</div><div class='add'>+			append_elf64_note(first_cpu_note, NN_PRSTATUS,</div><div class='ctx'> 					  NT_PRSTATUS, &amp;prstatus,</div><div class='ctx'> 					  sizeof(prstatus));</div><div class='ctx'> 		}</div><div class='hunk'>@@ -599,7 +599,7 @@ static struct attribute *mpipl_attr[] = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute *mpipl_bin_attr[] = {</div><div class='add'>+static const struct bin_attribute *const mpipl_bin_attr[] = {</div><div class='ctx'> 	&amp;opal_core_attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-dump.c b/arch/powerpc/platforms/powernv/opal-dump.c<br/>index 608e4b68c5ea..cc3cc9ddf9d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-dump.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-dump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-dump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-dump.c</a></div><div class='hunk'>@@ -286,7 +286,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dump_attr_read(struct file *filep, struct kobject *kobj,</div><div class='del'>-			      struct bin_attribute *bin_attr,</div><div class='add'>+			      const struct bin_attribute *bin_attr,</div><div class='ctx'> 			      char *buffer, loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	ssize_t rc;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c<br/>index 5db1e733143b..c3fc5d258146 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-elog.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-elog.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-elog.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-elog.c</a></div><div class='hunk'>@@ -156,7 +156,7 @@ static const struct kobj_type elog_ktype = {</div><div class='ctx'> #define OPAL_MAX_ERRLOG_SIZE	16384</div><div class='ctx'> </div><div class='ctx'> static ssize_t raw_attr_read(struct file *filep, struct kobject *kobj,</div><div class='del'>-			     struct bin_attribute *bin_attr,</div><div class='add'>+			     const struct bin_attribute *bin_attr,</div><div class='ctx'> 			     char *buffer, loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int opal_rc;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-flash.c b/arch/powerpc/platforms/powernv/opal-flash.c<br/>index d5ea04e8e4c5..a3f7a2928767 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-flash.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-flash.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-flash.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-flash.c</a></div><div class='hunk'>@@ -432,7 +432,7 @@ static int alloc_image_buf(char *buffer, size_t count)</div><div class='ctx'>  * and pre-allocate required memory.</div><div class='ctx'>  */</div><div class='ctx'> static ssize_t image_data_write(struct file *filp, struct kobject *kobj,</div><div class='del'>-				struct bin_attribute *bin_attr,</div><div class='add'>+				const struct bin_attribute *bin_attr,</div><div class='ctx'> 				char *buffer, loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-irqchip.c b/arch/powerpc/platforms/powernv/opal-irqchip.c<br/>index 56a1f7ce78d2..e180bd8e1400 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-irqchip.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-irqchip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-irqchip.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></div><div class='hunk'>@@ -191,7 +191,8 @@ int __init opal_event_init(void)</div><div class='ctx'> 	 * fall back to the legacy method (opal_event_request(...))</div><div class='ctx'> 	 * anyway. */</div><div class='ctx'> 	dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");</div><div class='del'>-	opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,</div><div class='add'>+	opal_event_irqchip.domain = irq_domain_create_linear(of_fwnode_handle(dn),</div><div class='add'>+				MAX_NUM_EVENTS,</div><div class='ctx'> 				&amp;opal_event_domain_ops, &amp;opal_event_irqchip);</div><div class='ctx'> 	of_node_put(dn);</div><div class='ctx'> 	if (!opal_event_irqchip.domain) {</div><div class='hunk'>@@ -282,6 +283,7 @@ int __init opal_event_init(void)</div><div class='ctx'> 				 name, NULL);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			pr_warn("Error %d requesting OPAL irq %d\n", rc, (int)r-&gt;start);</div><div class='add'>+			kfree(name);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-msglog.c b/arch/powerpc/platforms/powernv/opal-msglog.c<br/>index 22d6efe17b0d..992a6b379a66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-msglog.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal-msglog.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal-msglog.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal-msglog.c</a></div><div class='hunk'>@@ -94,13 +94,13 @@ ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t opal_msglog_read(struct file *file, struct kobject *kobj,</div><div class='del'>-				struct bin_attribute *bin_attr, char *to,</div><div class='add'>+				const struct bin_attribute *bin_attr, char *to,</div><div class='ctx'> 				loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	return opal_msglog_copy(to, pos, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute opal_msglog_attr = {</div><div class='add'>+static struct bin_attribute opal_msglog_attr __ro_after_init = {</div><div class='ctx'> 	.attr = {.name = "msglog", .mode = 0400},</div><div class='ctx'> 	.read = opal_msglog_read</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c<br/>index 5d0f35bb917e..09bd93464b4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/opal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/opal.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/opal.c</a></div><div class='hunk'>@@ -180,10 +180,7 @@ int __init early_init_dt_scan_recoverable_ranges(unsigned long node,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate a buffer to hold the MC recoverable ranges.</div><div class='ctx'> 	 */</div><div class='del'>-	mc_recoverable_range = memblock_alloc(size, __alignof__(u64));</div><div class='del'>-	if (!mc_recoverable_range)</div><div class='del'>-		panic("%s: Failed to allocate %u bytes align=0x%lx\n",</div><div class='del'>-		      __func__, size, __alignof__(u64));</div><div class='add'>+	mc_recoverable_range = memblock_alloc_or_panic(size, __alignof__(u64));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mc_recoverable_range_len; i++) {</div><div class='ctx'> 		mc_recoverable_range[i].start_addr =</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c b/arch/powerpc/platforms/powernv/pci-cxl.c<br/>deleted file mode 100644<br/>index 7e419de71db8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci-cxl.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci-cxl.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,153 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Copyright 2014-2016 IBM Corp.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='del'>-#include &lt;asm/pnv-pci.h&gt;</div><div class='del'>-#include &lt;asm/opal.h&gt;</div><div class='del'>-</div><div class='del'>-#include "pci.h"</div><div class='del'>-</div><div class='del'>-int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	struct pnv_ioda_pe *pe;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	pe = pnv_ioda_get_pe(dev);</div><div class='del'>-	if (!pe)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pe_info(pe, "Switching PHB to CXL\n");</div><div class='del'>-</div><div class='del'>-	rc = opal_pci_set_phb_cxl_mode(phb-&gt;opal_id, mode, pe-&gt;pe_number);</div><div class='del'>-	if (rc == OPAL_UNSUPPORTED)</div><div class='del'>-		dev_err(&amp;dev-&gt;dev, "Required cxl mode not supported by firmware - update skiboot\n");</div><div class='del'>-	else if (rc)</div><div class='del'>-		dev_err(&amp;dev-&gt;dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_phb_to_cxl_mode);</div><div class='del'>-</div><div class='del'>-/* Find PHB for cxl dev and allocate MSI hwirqs?</div><div class='del'>- * Returns the absolute hardware IRQ number</div><div class='del'>- */</div><div class='del'>-int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	int hwirq = msi_bitmap_alloc_hwirqs(&amp;phb-&gt;msi_bmp, num);</div><div class='del'>-</div><div class='del'>-	if (hwirq &lt; 0) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "Failed to find a free MSI\n");</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phb-&gt;msi_base + hwirq;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_alloc_hwirqs);</div><div class='del'>-</div><div class='del'>-void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	msi_bitmap_free_hwirqs(&amp;phb-&gt;msi_bmp, hwirq - phb-&gt;msi_base, num);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_release_hwirqs);</div><div class='del'>-</div><div class='del'>-void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,</div><div class='del'>-				  struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	int i, hwirq;</div><div class='del'>-</div><div class='del'>-	for (i = 1; i &lt; CXL_IRQ_RANGES; i++) {</div><div class='del'>-		if (!irqs-&gt;range[i])</div><div class='del'>-			continue;</div><div class='del'>-		pr_devel("cxl release irq range 0x%x: offset: 0x%lx  limit: %ld\n",</div><div class='del'>-			 i, irqs-&gt;offset[i],</div><div class='del'>-			 irqs-&gt;range[i]);</div><div class='del'>-		hwirq = irqs-&gt;offset[i] - phb-&gt;msi_base;</div><div class='del'>-		msi_bitmap_free_hwirqs(&amp;phb-&gt;msi_bmp, hwirq,</div><div class='del'>-				       irqs-&gt;range[i]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_release_hwirq_ranges);</div><div class='del'>-</div><div class='del'>-int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,</div><div class='del'>-			       struct pci_dev *dev, int num)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	int i, hwirq, try;</div><div class='del'>-</div><div class='del'>-	memset(irqs, 0, sizeof(struct cxl_irq_ranges));</div><div class='del'>-</div><div class='del'>-	/* 0 is reserved for the multiplexed PSL DSI interrupt */</div><div class='del'>-	for (i = 1; i &lt; CXL_IRQ_RANGES &amp;&amp; num; i++) {</div><div class='del'>-		try = num;</div><div class='del'>-		while (try) {</div><div class='del'>-			hwirq = msi_bitmap_alloc_hwirqs(&amp;phb-&gt;msi_bmp, try);</div><div class='del'>-			if (hwirq &gt;= 0)</div><div class='del'>-				break;</div><div class='del'>-			try /= 2;</div><div class='del'>-		}</div><div class='del'>-		if (!try)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		irqs-&gt;offset[i] = phb-&gt;msi_base + hwirq;</div><div class='del'>-		irqs-&gt;range[i] = try;</div><div class='del'>-		pr_devel("cxl alloc irq range 0x%x: offset: 0x%lx  limit: %li\n",</div><div class='del'>-			 i, irqs-&gt;offset[i], irqs-&gt;range[i]);</div><div class='del'>-		num -= try;</div><div class='del'>-	}</div><div class='del'>-	if (num)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-fail:</div><div class='del'>-	pnv_cxl_release_hwirq_ranges(irqs, dev);</div><div class='del'>-	return -ENOSPC;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_alloc_hwirq_ranges);</div><div class='del'>-</div><div class='del'>-int pnv_cxl_get_irq_count(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	return phb-&gt;msi_bmp.irq_count;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_get_irq_count);</div><div class='del'>-</div><div class='del'>-int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,</div><div class='del'>-			   unsigned int virq)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	unsigned int xive_num = hwirq - phb-&gt;msi_base;</div><div class='del'>-	struct pnv_ioda_pe *pe;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (!(pe = pnv_ioda_get_pe(dev)))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	/* Assign XIVE to PE */</div><div class='del'>-	rc = opal_pci_set_xive_pe(phb-&gt;opal_id, pe-&gt;pe_number, xive_num);</div><div class='del'>-	if (rc) {</div><div class='del'>-		pe_warn(pe, "%s: OPAL error %d setting msi_base 0x%x "</div><div class='del'>-			"hwirq 0x%x XIVE 0x%x PE\n",</div><div class='del'>-			pci_name(dev), rc, phb-&gt;msi_base, hwirq, xive_num);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-	pnv_set_msi_irq_chip(phb, virq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_cxl_ioda_msi_setup);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c<br/>index b0a14e48175c..b0c1d9d16fb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci-ioda.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci-ioda.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci-ioda.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/pci-ioda.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/irq-msi-lib.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='hunk'>@@ -37,9 +38,6 @@</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/pnv-pci.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='del'>-#include &lt;asm/xive.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;misc/cxl-base.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "powernv.h"</div><div class='ctx'> #include "pci.h"</div><div class='hunk'>@@ -1636,47 +1634,6 @@ int64_t pnv_opal_pci_msi_eoi(struct irq_data *d)</div><div class='ctx'> 	return opal_pci_msi_eoi(phb-&gt;opal_id, d-&gt;parent_data-&gt;hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The IRQ data is mapped in the XICS domain, with OPAL HW IRQ numbers</div><div class='del'>- */</div><div class='del'>-static void pnv_ioda2_msi_eoi(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	int64_t rc;</div><div class='del'>-	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);</div><div class='del'>-	struct pci_controller *hose = irq_data_get_irq_chip_data(d);</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	rc = opal_pci_msi_eoi(phb-&gt;opal_id, hw_irq);</div><div class='del'>-	WARN_ON_ONCE(rc);</div><div class='del'>-</div><div class='del'>-	icp_native_eoi(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* P8/CXL only */</div><div class='del'>-void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq)</div><div class='del'>-{</div><div class='del'>-	struct irq_data *idata;</div><div class='del'>-	struct irq_chip *ichip;</div><div class='del'>-</div><div class='del'>-	/* The MSI EOI OPAL call is only needed on PHB3 */</div><div class='del'>-	if (phb-&gt;model != PNV_PHB_MODEL_PHB3)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!phb-&gt;ioda.irq_chip_init) {</div><div class='del'>-		/*</div><div class='del'>-		 * First time we setup an MSI IRQ, we need to setup the</div><div class='del'>-		 * corresponding IRQ chip to route correctly.</div><div class='del'>-		 */</div><div class='del'>-		idata = irq_get_irq_data(virq);</div><div class='del'>-		ichip = irq_data_get_irq_chip(idata);</div><div class='del'>-		phb-&gt;ioda.irq_chip_init = 1;</div><div class='del'>-		phb-&gt;ioda.irq_chip = *ichip;</div><div class='del'>-		phb-&gt;ioda.irq_chip.irq_eoi = pnv_ioda2_msi_eoi;</div><div class='del'>-	}</div><div class='del'>-	irq_set_chip(virq, &amp;phb-&gt;ioda.irq_chip);</div><div class='del'>-	irq_set_chip_data(virq, phb-&gt;hose);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_chip pnv_pci_msi_irq_chip;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1750,23 +1707,6 @@ static int __pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The msi_free() op is called before irq_domain_free_irqs_top() when</div><div class='del'>- * the handler data is still available. Use that to clear the XIVE</div><div class='del'>- * controller.</div><div class='del'>- */</div><div class='del'>-static void pnv_msi_ops_msi_free(struct irq_domain *domain,</div><div class='del'>-				 struct msi_domain_info *info,</div><div class='del'>-				 unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	if (xive_enabled())</div><div class='del'>-		xive_irq_free_data(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct msi_domain_ops pnv_pci_msi_domain_ops = {</div><div class='del'>-	.msi_free	= pnv_msi_ops_msi_free,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void pnv_msi_shutdown(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	d = d-&gt;parent_data;</div><div class='hunk'>@@ -1774,31 +1714,33 @@ static void pnv_msi_shutdown(struct irq_data *d)</div><div class='ctx'> 		d-&gt;chip-&gt;irq_shutdown(d);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pnv_msi_mask(struct irq_data *d)</div><div class='add'>+static bool pnv_init_dev_msi_info(struct device *dev, struct irq_domain *domain,</div><div class='add'>+				  struct irq_domain *real_parent, struct msi_domain_info *info)</div><div class='ctx'> {</div><div class='del'>-	pci_msi_mask_irq(d);</div><div class='del'>-	irq_chip_mask_parent(d);</div><div class='del'>-}</div><div class='add'>+	struct irq_chip *chip = info-&gt;chip;</div><div class='ctx'> </div><div class='del'>-static void pnv_msi_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	pci_msi_unmask_irq(d);</div><div class='del'>-	irq_chip_unmask_parent(d);</div><div class='del'>-}</div><div class='add'>+	if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-static struct irq_chip pnv_pci_msi_irq_chip = {</div><div class='del'>-	.name		= "PNV-PCI-MSI",</div><div class='del'>-	.irq_shutdown	= pnv_msi_shutdown,</div><div class='del'>-	.irq_mask	= pnv_msi_mask,</div><div class='del'>-	.irq_unmask	= pnv_msi_unmask,</div><div class='del'>-	.irq_eoi	= irq_chip_eoi_parent,</div><div class='del'>-};</div><div class='add'>+	chip-&gt;irq_shutdown = pnv_msi_shutdown;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static struct msi_domain_info pnv_msi_domain_info = {</div><div class='del'>-	.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |</div><div class='del'>-		  MSI_FLAG_MULTI_PCI_MSI  | MSI_FLAG_PCI_MSIX),</div><div class='del'>-	.ops   = &amp;pnv_pci_msi_domain_ops,</div><div class='del'>-	.chip  = &amp;pnv_pci_msi_irq_chip,</div><div class='add'>+#define PNV_PCI_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS		| \</div><div class='add'>+				    MSI_FLAG_USE_DEF_CHIP_OPS		| \</div><div class='add'>+				    MSI_FLAG_PCI_MSI_MASK_PARENT)</div><div class='add'>+#define PNV_PCI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK		| \</div><div class='add'>+				     MSI_FLAG_PCI_MSIX			| \</div><div class='add'>+				     MSI_FLAG_MULTI_PCI_MSI)</div><div class='add'>+</div><div class='add'>+static const struct msi_parent_ops pnv_msi_parent_ops = {</div><div class='add'>+	.required_flags		= PNV_PCI_MSI_FLAGS_REQUIRED,</div><div class='add'>+	.supported_flags	= PNV_PCI_MSI_FLAGS_SUPPORTED,</div><div class='add'>+	.chip_flags		= MSI_CHIP_FLAG_SET_EOI,</div><div class='add'>+	.bus_select_token	= DOMAIN_BUS_NEXUS,</div><div class='add'>+	.bus_select_mask	= MATCH_PCI_MSI,</div><div class='add'>+	.prefix			= "PNV-",</div><div class='add'>+	.init_dev_msi_info	= pnv_init_dev_msi_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void pnv_msi_compose_msg(struct irq_data *d, struct msi_msg *msg)</div><div class='hunk'>@@ -1897,7 +1839,7 @@ static int pnv_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	irq_domain_free_irqs_parent(domain, virq, i - 1);</div><div class='add'>+	irq_domain_free_irqs_parent(domain, virq, i);</div><div class='ctx'> 	msi_bitmap_free_hwirqs(&amp;phb-&gt;msi_bmp, hwirq, nr_irqs);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1913,41 +1855,30 @@ static void pnv_irq_domain_free(struct irq_domain *domain, unsigned int virq,</div><div class='ctx'> 		 virq, d-&gt;hwirq, nr_irqs);</div><div class='ctx'> </div><div class='ctx'> 	msi_bitmap_free_hwirqs(&amp;phb-&gt;msi_bmp, d-&gt;hwirq, nr_irqs);</div><div class='del'>-	/* XIVE domain is cleared through -&gt;msi_free() */</div><div class='add'>+	irq_domain_free_irqs_parent(domain, virq, nr_irqs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct irq_domain_ops pnv_irq_domain_ops = {</div><div class='add'>+	.select	= msi_lib_irq_domain_select,</div><div class='ctx'> 	.alloc  = pnv_irq_domain_alloc,</div><div class='ctx'> 	.free   = pnv_irq_domain_free,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned int count)</div><div class='ctx'> {</div><div class='del'>-	struct pnv_phb *phb = hose-&gt;private_data;</div><div class='del'>-	struct irq_domain *parent = irq_get_default_host();</div><div class='del'>-</div><div class='del'>-	hose-&gt;fwnode = irq_domain_alloc_named_id_fwnode("PNV-MSI", phb-&gt;opal_id);</div><div class='del'>-	if (!hose-&gt;fwnode)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	struct irq_domain *parent = irq_get_default_domain();</div><div class='add'>+	struct irq_domain_info info = {</div><div class='add'>+		.fwnode		= of_fwnode_handle(hose-&gt;dn),</div><div class='add'>+		.ops		= &amp;pnv_irq_domain_ops,</div><div class='add'>+		.host_data	= hose,</div><div class='add'>+		.size		= count,</div><div class='add'>+		.parent		= parent,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	hose-&gt;dev_domain = irq_domain_create_hierarchy(parent, 0, count,</div><div class='del'>-						       hose-&gt;fwnode,</div><div class='del'>-						       &amp;pnv_irq_domain_ops, hose);</div><div class='add'>+	hose-&gt;dev_domain = msi_create_parent_irq_domain(&amp;info, &amp;pnv_msi_parent_ops);</div><div class='ctx'> 	if (!hose-&gt;dev_domain) {</div><div class='del'>-		pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n",</div><div class='del'>-		       hose-&gt;dn, hose-&gt;global_number);</div><div class='del'>-		irq_domain_free_fwnode(hose-&gt;fwnode);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hose-&gt;msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(hose-&gt;dn),</div><div class='del'>-						     &amp;pnv_msi_domain_info,</div><div class='del'>-						     hose-&gt;dev_domain);</div><div class='del'>-	if (!hose-&gt;msi_domain) {</div><div class='ctx'> 		pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n",</div><div class='ctx'> 		       hose-&gt;dn, hose-&gt;global_number);</div><div class='del'>-		irq_domain_free_fwnode(hose-&gt;fwnode);</div><div class='del'>-		irq_domain_remove(hose-&gt;dev_domain);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c<br/>index 35f566aa0424..b2c1da025410 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/pci.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='del'>-#include &lt;linux/sched/mm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -33,8 +32,6 @@</div><div class='ctx'> #include "powernv.h"</div><div class='ctx'> #include "pci.h"</div><div class='ctx'> </div><div class='del'>-static DEFINE_MUTEX(tunnel_mutex);</div><div class='del'>-</div><div class='ctx'> int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *node = np;</div><div class='hunk'>@@ -744,64 +741,6 @@ struct iommu_table *pnv_pci_table_alloc(int nid)</div><div class='ctx'> 	return tbl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_controller *hose = pci_bus_to_host(dev-&gt;bus);</div><div class='del'>-</div><div class='del'>-	return of_node_get(hose-&gt;dn);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pnv_pci_get_phb_node);</div><div class='del'>-</div><div class='del'>-int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)</div><div class='del'>-{</div><div class='del'>-	struct pnv_phb *phb = pci_bus_to_pnvhb(dev-&gt;bus);</div><div class='del'>-	u64 tunnel_bar;</div><div class='del'>-	__be64 val;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (!opal_check_token(OPAL_PCI_GET_PBCQ_TUNNEL_BAR))</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	if (!opal_check_token(OPAL_PCI_SET_PBCQ_TUNNEL_BAR))</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;tunnel_mutex);</div><div class='del'>-	rc = opal_pci_get_pbcq_tunnel_bar(phb-&gt;opal_id, &amp;val);</div><div class='del'>-	if (rc != OPAL_SUCCESS) {</div><div class='del'>-		rc = -EIO;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	tunnel_bar = be64_to_cpu(val);</div><div class='del'>-	if (enable) {</div><div class='del'>-		/*</div><div class='del'>-		* Only one device per PHB can use atomics.</div><div class='del'>-		* Our policy is first-come, first-served.</div><div class='del'>-		*/</div><div class='del'>-		if (tunnel_bar) {</div><div class='del'>-			if (tunnel_bar != addr)</div><div class='del'>-				rc = -EBUSY;</div><div class='del'>-			else</div><div class='del'>-				rc = 0;	/* Setting same address twice is ok */</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		* The device that owns atomics and wants to release</div><div class='del'>-		* them must pass the same address with enable == 0.</div><div class='del'>-		*/</div><div class='del'>-		if (tunnel_bar != addr) {</div><div class='del'>-			rc = -EPERM;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		addr = 0x0ULL;</div><div class='del'>-	}</div><div class='del'>-	rc = opal_pci_set_pbcq_tunnel_bar(phb-&gt;opal_id, addr);</div><div class='del'>-	rc = opal_error_code(rc);</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;tunnel_mutex);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);</div><div class='del'>-</div><div class='ctx'> void pnv_pci_shutdown(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose;</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h<br/>index 93fba1f8661f..42075501663b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/pci.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/pci.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/pci.h</a></div><div class='hunk'>@@ -163,7 +163,6 @@ struct pnv_phb {</div><div class='ctx'> 		unsigned int		*io_segmap;</div><div class='ctx'> </div><div class='ctx'> 		/* IRQ chip */</div><div class='del'>-		int			irq_chip_init;</div><div class='ctx'> 		struct irq_chip		irq_chip;</div><div class='ctx'> </div><div class='ctx'> 		/* Sorted list of used PE's based</div><div class='hunk'>@@ -281,7 +280,6 @@ extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);</div><div class='ctx'> </div><div class='ctx'> extern struct pnv_ioda_pe *pnv_pci_bdfn_to_pe(struct pnv_phb *phb, u16 bdfn);</div><div class='ctx'> extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev);</div><div class='del'>-extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);</div><div class='ctx'> extern unsigned long pnv_pci_ioda2_get_table_size(__u32 page_shift,</div><div class='ctx'> 		__u64 window_size, __u32 levels);</div><div class='ctx'> extern int pnv_eeh_post_init(void);</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c<br/>index 8f14f0581a21..8f41ef364fc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/smp.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include &lt;asm/xive.h&gt;</div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> #include &lt;asm/runlatch.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/dbell.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;asm/kexec.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/powernv.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "powernv.h"</div><div class='ctx'> </div><div class='hunk'>@@ -136,7 +137,9 @@ static int pnv_smp_cpu_disable(void)</div><div class='ctx'> 	 * the generic fixup_irqs. --BenH.</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='del'>-	vdso_data-&gt;processorCount--;</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='add'>+	systemcfg-&gt;processorCount--;</div><div class='add'>+#endif</div><div class='ctx'> 	if (cpu == boot_cpuid)</div><div class='ctx'> 		boot_cpuid = cpumask_any(cpu_online_mask);</div><div class='ctx'> 	if (xive_enabled())</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/subcore.h b/arch/powerpc/platforms/powernv/subcore.h<br/>index 77feee8436d4..413fd85d9bc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/subcore.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/subcore.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/subcore.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/subcore.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #define SYNC_STEP_REAL_MODE	2	/* Set by secondary when in real mode  */</div><div class='ctx'> #define SYNC_STEP_FINISHED	3	/* Set by secondary when split/unsplit is done */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> void split_core_secondary_loop(u8 *state);</div><div class='hunk'>@@ -18,4 +18,4 @@ extern void update_subcore_sibling_mask(void);</div><div class='ctx'> static inline void update_subcore_sibling_mask(void) { }</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/ultravisor.c b/arch/powerpc/platforms/powernv/ultravisor.c<br/>index 67c8c4b2d8b1..c526871a1229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/ultravisor.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/powernv/ultravisor.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/powernv/ultravisor.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/powernv/ultravisor.c</a></div><div class='hunk'>@@ -32,13 +32,13 @@ int __init early_init_dt_scan_ultravisor(unsigned long node, const char *uname,</div><div class='ctx'> static struct memcons *uv_memcons;</div><div class='ctx'> </div><div class='ctx'> static ssize_t uv_msglog_read(struct file *file, struct kobject *kobj,</div><div class='del'>-			      struct bin_attribute *bin_attr, char *to,</div><div class='add'>+			      const struct bin_attribute *bin_attr, char *to,</div><div class='ctx'> 			      loff_t pos, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	return memcons_copy(uv_memcons, to, pos, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct bin_attribute uv_msglog_attr = {</div><div class='add'>+static struct bin_attribute uv_msglog_attr __ro_after_init = {</div><div class='ctx'> 	.attr = {.name = "msglog", .mode = 0400},</div><div class='ctx'> 	.read = uv_msglog_read</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c<br/>index b18e1c92e554..22d91ac424dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/device-init.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/device-init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/device-init.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/device-init.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> #include &lt;linux/rcuwait.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/lv1call.h&gt;</div><div class='hunk'>@@ -178,7 +179,7 @@ fail_malloc:</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __ref ps3_setup_uhc_device(</div><div class='add'>+static int __init ps3_setup_uhc_device(</div><div class='ctx'> 	const struct ps3_repository_device *repo, enum ps3_match_id match_id,</div><div class='ctx'> 	enum ps3_interrupt_type interrupt_type, enum ps3_reg_type reg_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -724,7 +725,7 @@ static irqreturn_t ps3_notification_interrupt(int irq, void *data)</div><div class='ctx'> static int ps3_notification_read_write(struct ps3_notification_device *dev,</div><div class='ctx'> 				       u64 lpar, int write)</div><div class='ctx'> {</div><div class='del'>-	const char *op = write ? "write" : "read";</div><div class='add'>+	const char *op = str_write_read(write);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c<br/>index 49871427f599..a4ad4b49eef7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/interrupt.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/interrupt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/interrupt.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/interrupt.c</a></div><div class='hunk'>@@ -378,9 +378,9 @@ int ps3_send_event_locally(unsigned int virq)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ps3_sb_event_receive_port_setup - Setup a system bus event receive port.</div><div class='add'>+ * @dev: The system bus device instance.</div><div class='ctx'>  * @cpu: enum ps3_cpu_binding indicating the cpu the interrupt should be</div><div class='ctx'>  * serviced on.</div><div class='del'>- * @dev: The system bus device instance.</div><div class='ctx'>  * @virq: The assigned Linux virq.</div><div class='ctx'>  *</div><div class='ctx'>  * An event irq represents a virtual device interrupt.  The interrupt_id</div><div class='hunk'>@@ -743,8 +743,8 @@ void __init ps3_init_IRQ(void)</div><div class='ctx'> 	unsigned cpu;</div><div class='ctx'> 	struct irq_domain *host;</div><div class='ctx'> </div><div class='del'>-	host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &amp;ps3_host_ops, NULL);</div><div class='del'>-	irq_set_default_host(host);</div><div class='add'>+	host = irq_domain_create_nomap(NULL, PS3_PLUG_MAX + 1, &amp;ps3_host_ops, NULL);</div><div class='add'>+	irq_set_default_domain(host);</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='ctx'> 		struct ps3_private *pd = &amp;per_cpu(ps3_private, cpu);</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c<br/>index 1abe33fbe529..b8c030eab138 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/repository.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/repository.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/repository.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/repository.c</a></div><div class='hunk'>@@ -940,7 +940,7 @@ int __init ps3_repository_read_vuart_sysmgr_port(unsigned int *port)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>   * ps3_repository_read_boot_dat_info - Get address and size of cell_ext_os_area.</div><div class='del'>-  * address: lpar address of cell_ext_os_area</div><div class='add'>+  * @lpar_addr: lpar address of cell_ext_os_area</div><div class='ctx'>   * @size: size of cell_ext_os_area</div><div class='ctx'>   */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c<br/>index 5144f11359f7..150c09b58ae8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/setup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/setup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/setup.c</a></div><div class='hunk'>@@ -115,10 +115,7 @@ static void __init prealloc(struct ps3_prealloc *p)</div><div class='ctx'> 	if (!p-&gt;size)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	p-&gt;address = memblock_alloc(p-&gt;size, p-&gt;align);</div><div class='del'>-	if (!p-&gt;address)</div><div class='del'>-		panic("%s: Failed to allocate %lu bytes align=0x%lx\n",</div><div class='del'>-		      __func__, p-&gt;size, p-&gt;align);</div><div class='add'>+	p-&gt;address = memblock_alloc_or_panic(p-&gt;size, p-&gt;align);</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s: %lu bytes at %p\n", p-&gt;name, p-&gt;size,</div><div class='ctx'> 	       p-&gt;address);</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c<br/>index 4a2520ec6d7f..61b37c9400b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/spu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/spu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/spu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/spu.c</a></div><div class='hunk'>@@ -190,10 +190,10 @@ static void spu_unmap(struct spu *spu)</div><div class='ctx'> static int __init setup_areas(struct spu *spu)</div><div class='ctx'> {</div><div class='ctx'> 	struct table {char* name; unsigned long addr; unsigned long size;};</div><div class='del'>-	unsigned long shadow_flags = pgprot_val(pgprot_noncached_wc(PAGE_KERNEL_RO));</div><div class='ctx'> </div><div class='ctx'> 	spu_pdata(spu)-&gt;shadow = ioremap_prot(spu_pdata(spu)-&gt;shadow_addr,</div><div class='del'>-					      sizeof(struct spe_shadow), shadow_flags);</div><div class='add'>+					      sizeof(struct spe_shadow),</div><div class='add'>+					      pgprot_noncached_wc(PAGE_KERNEL_RO));</div><div class='ctx'> 	if (!spu_pdata(spu)-&gt;shadow) {</div><div class='ctx'> 		pr_debug("%s:%d: ioremap shadow failed\n", __func__, __LINE__);</div><div class='ctx'> 		goto fail_ioremap;</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c<br/>index b9a7d9bae687..afbaabf182d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/system-bus.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/ps3/system-bus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/ps3/system-bus.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/ps3/system-bus.c</a></div><div class='hunk'>@@ -453,10 +453,9 @@ static ssize_t modalias_show(struct device *_dev, struct device_attribute *a,</div><div class='ctx'> 	char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);</div><div class='del'>-	int len = snprintf(buf, PAGE_SIZE, "ps3:%d:%d\n", dev-&gt;match_id,</div><div class='del'>-			   dev-&gt;match_sub_id);</div><div class='ctx'> </div><div class='del'>-	return (len &gt;= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;</div><div class='add'>+	return sysfs_emit(buf, "ps3:%d:%d\n", dev-&gt;match_id,</div><div class='add'>+			  dev-&gt;match_sub_id);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(modalias);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig<br/>index afc0f6a61337..3e042218d6cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/Kconfig</a></div><div class='hunk'>@@ -7,6 +7,7 @@ config PPC_PSERIES</div><div class='ctx'> 	select OF_DYNAMIC</div><div class='ctx'> 	select FORCE_PCI</div><div class='ctx'> 	select PCI_MSI</div><div class='add'>+	select IRQ_MSI_LIB</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select PPC_XICS</div><div class='ctx'> 	select PPC_XIVE_SPAPR</div><div class='hunk'>@@ -23,6 +24,7 @@ config PPC_PSERIES</div><div class='ctx'> 	select FORCE_SMP</div><div class='ctx'> 	select SWIOTLB</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='add'>+	select PPC_RADIX_BROADCAST_TLBIE if PPC_RADIX_MMU</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config PARAVIRT</div><div class='hunk'>@@ -128,6 +130,15 @@ config CMM</div><div class='ctx'> 	  will be reused for other LPARs. The interface allows firmware to</div><div class='ctx'> 	  balance memory across many LPARs.</div><div class='ctx'> </div><div class='add'>+config HTMDUMP</div><div class='add'>+	tristate "PowerVM data dumper"</div><div class='add'>+	depends on PPC_PSERIES &amp;&amp; DEBUG_FS</div><div class='add'>+	default m</div><div class='add'>+	help</div><div class='add'>+	  Select this option, if you want to enable the kernel debugfs</div><div class='add'>+	  interface to dump the Hardware Trace Macro (HTM) function data</div><div class='add'>+	  in the LPAR.</div><div class='add'>+</div><div class='ctx'> config HV_PERF_CTRS</div><div class='ctx'> 	bool "Hypervisor supplied PMU events (24x7 &amp; GPCI)"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -140,6 +151,20 @@ config HV_PERF_CTRS</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, select Y.</div><div class='ctx'> </div><div class='add'>+config VPA_PMU</div><div class='add'>+	tristate "VPA PMU events"</div><div class='add'>+	depends on KVM_BOOK3S_64_HV &amp;&amp; HV_PERF_CTRS</div><div class='add'>+	help</div><div class='add'>+	  Enable access to the VPA PMU counters via perf. This enables</div><div class='add'>+	  code that support measurement for KVM on PowerVM(KoP) feature.</div><div class='add'>+	  PAPR hypervisor has introduced three new counters in the VPA area</div><div class='add'>+	  of LPAR CPUs for KVM L2 guest observability. Two for context switches</div><div class='add'>+	  from host to guest and vice versa, and one counter for getting</div><div class='add'>+	  the total time spent inside the KVM guest. This config enables code</div><div class='add'>+	  that access these software counters via perf.</div><div class='add'>+</div><div class='add'>+	  If unsure, Select N.</div><div class='add'>+</div><div class='ctx'> config IBMVIO</div><div class='ctx'> 	depends on PPC_PSERIES</div><div class='ctx'> 	bool</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile<br/>index 7bf506f6b8c8..931ebaa474c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/Makefile</a></div><div class='hunk'>@@ -3,7 +3,9 @@ ccflags-$(CONFIG_PPC_PSERIES_DEBUG)	+= -DDEBUG</div><div class='ctx'> </div><div class='ctx'> obj-y			:= lpar.o hvCall.o nvram.o reconfig.o \</div><div class='ctx'> 			   of_helpers.o rtas-work-area.o papr-sysparm.o \</div><div class='del'>-			   papr-vpd.o \</div><div class='add'>+			   papr-rtas-common.o papr-vpd.o papr-indices.o \</div><div class='add'>+			   papr-platform-dump.o papr-phy-attest.o \</div><div class='add'>+			   papr-hvpipe.o \</div><div class='ctx'> 			   setup.o iommu.o event_sources.o ras.o \</div><div class='ctx'> 			   firmware.o power.o dlpar.o mobility.o rng.o \</div><div class='ctx'> 			   pci.o pci_dlpar.o eeh_pseries.o msi.o \</div><div class='hunk'>@@ -19,6 +21,7 @@ obj-$(CONFIG_HVC_CONSOLE)	+= hvconsole.o</div><div class='ctx'> obj-$(CONFIG_HVCS)		+= hvcserver.o</div><div class='ctx'> obj-$(CONFIG_HCALL_STATS)	+= hvCall_inst.o</div><div class='ctx'> obj-$(CONFIG_CMM)		+= cmm.o</div><div class='add'>+obj-$(CONFIG_HTMDUMP)		+= htmdump.o</div><div class='ctx'> obj-$(CONFIG_IO_EVENT_IRQ)	+= io_event_irq.o</div><div class='ctx'> obj-$(CONFIG_LPARCFG)		+= lparcfg.o</div><div class='ctx'> obj-$(CONFIG_IBMVIO)		+= vio.o</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c<br/>index 5f4037c1d7fe..0823fa2da151 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/cmm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/cmm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/cmm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/cmm.c</a></div><div class='hunk'>@@ -532,7 +532,6 @@ static int cmm_migratepage(struct balloon_dev_info *b_dev_info,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;b_dev_info-&gt;pages_lock, flags);</div><div class='ctx'> 	balloon_page_insert(b_dev_info, newpage);</div><div class='del'>-	balloon_page_delete(page);</div><div class='ctx'> 	b_dev_info-&gt;isolated_pages--;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;b_dev_info-&gt;pages_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -542,10 +541,11 @@ static int cmm_migratepage(struct balloon_dev_info *b_dev_info,</div><div class='ctx'> 	 */</div><div class='ctx'> 	plpar_page_set_active(page);</div><div class='ctx'> </div><div class='add'>+	balloon_page_finalize(page);</div><div class='ctx'> 	/* balloon page list reference */</div><div class='ctx'> 	put_page(page);</div><div class='ctx'> </div><div class='del'>-	return MIGRATEPAGE_SUCCESS;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cmm_balloon_compaction_init(void)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c<br/>index 213aa26dc8b3..979487da6522 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/dlpar.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/dlpar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/dlpar.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/dlpar.c</a></div><div class='hunk'>@@ -404,6 +404,45 @@ get_device_node_with_drc_info(u32 index)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct device_node *</div><div class='add'>+get_device_node_with_drc_indexes(u32 drc_index)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = NULL;</div><div class='add'>+	u32 nr_indexes, index;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	for_each_node_with_property(np, "ibm,drc-indexes") {</div><div class='add'>+		/*</div><div class='add'>+		 * First element in the array is the total number of</div><div class='add'>+		 * DRC indexes returned.</div><div class='add'>+		 */</div><div class='add'>+		rc = of_property_read_u32_index(np, "ibm,drc-indexes",</div><div class='add'>+				0, &amp;nr_indexes);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out_put_np;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Retrieve DRC index from the list and return the</div><div class='add'>+		 * device node if matched with the specified index.</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; nr_indexes; i++) {</div><div class='add'>+			rc = of_property_read_u32_index(np, "ibm,drc-indexes",</div><div class='add'>+							i+1, &amp;index);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out_put_np;</div><div class='add'>+</div><div class='add'>+			if (drc_index == index)</div><div class='add'>+				return np;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+</div><div class='add'>+out_put_np:</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dlpar_hp_dt_add(u32 index)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np, *nodes;</div><div class='hunk'>@@ -423,10 +462,19 @@ static int dlpar_hp_dt_add(u32 index)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Recent FW provides ibm,drc-info property. So search</div><div class='add'>+	 * for the user specified DRC index from ibm,drc-info</div><div class='add'>+	 * property. If this property is not available, search</div><div class='add'>+	 * in the indexes array from ibm,drc-indexes property.</div><div class='add'>+	 */</div><div class='ctx'> 	np = get_device_node_with_drc_info(index);</div><div class='ctx'> </div><div class='del'>-	if (!np)</div><div class='del'>-		return -EIO;</div><div class='add'>+	if (!np) {</div><div class='add'>+		np = get_device_node_with_drc_indexes(index);</div><div class='add'>+		if (!np)</div><div class='add'>+			return -EIO;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Next, configure the connector. */</div><div class='ctx'> 	nodes = dlpar_configure_connector(cpu_to_be32(index), np);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c<br/>index 8cb9d36ea491..f293588b8c7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/dtl.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/dtl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/dtl.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/dtl.c</a></div><div class='hunk'>@@ -191,7 +191,7 @@ static int dtl_enable(struct dtl *dtl)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	/* ensure there are no other conflicting dtl users */</div><div class='del'>-	if (!read_trylock(&amp;dtl_access_lock))</div><div class='add'>+	if (!down_read_trylock(&amp;dtl_access_lock))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	n_entries = dtl_buf_entries;</div><div class='hunk'>@@ -199,7 +199,7 @@ static int dtl_enable(struct dtl *dtl)</div><div class='ctx'> 	if (!buf) {</div><div class='ctx'> 		printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n",</div><div class='ctx'> 				__func__, dtl-&gt;cpu);</div><div class='del'>-		read_unlock(&amp;dtl_access_lock);</div><div class='add'>+		up_read(&amp;dtl_access_lock);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -217,7 +217,7 @@ static int dtl_enable(struct dtl *dtl)</div><div class='ctx'> 	spin_unlock(&amp;dtl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (rc) {</div><div class='del'>-		read_unlock(&amp;dtl_access_lock);</div><div class='add'>+		up_read(&amp;dtl_access_lock);</div><div class='ctx'> 		kmem_cache_free(dtl_cache, buf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -232,7 +232,7 @@ static void dtl_disable(struct dtl *dtl)</div><div class='ctx'> 	dtl-&gt;buf = NULL;</div><div class='ctx'> 	dtl-&gt;buf_entries = 0;</div><div class='ctx'> 	spin_unlock(&amp;dtl-&gt;lock);</div><div class='del'>-	read_unlock(&amp;dtl_access_lock);</div><div class='add'>+	up_read(&amp;dtl_access_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* file interface */</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c<br/>index 1893f66371fa..b12ef382fec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/eeh_pseries.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/eeh_pseries.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/eeh_pseries.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/eeh_pseries.c</a></div><div class='hunk'>@@ -580,8 +580,10 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay)</div><div class='ctx'> </div><div class='ctx'> 	switch(rets[0]) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		result = EEH_STATE_MMIO_ACTIVE |</div><div class='del'>-			 EEH_STATE_DMA_ACTIVE;</div><div class='add'>+		result = EEH_STATE_MMIO_ACTIVE	|</div><div class='add'>+			 EEH_STATE_DMA_ACTIVE	|</div><div class='add'>+			 EEH_STATE_MMIO_ENABLED	|</div><div class='add'>+			 EEH_STATE_DMA_ENABLED;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		result = EEH_STATE_RESET_ACTIVE |</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c<br/>index 6838a0fcda29..bc6926dbf148 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/hotplug-cpu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/hotplug-cpu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/hotplug-cpu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/hotplug-cpu.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;asm/xive.h&gt;</div><div class='ctx'> #include &lt;asm/plpar_wrappers.h&gt;</div><div class='ctx'> #include &lt;asm/topology.h&gt;</div><div class='add'>+#include &lt;asm/systemcfg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pseries.h"</div><div class='ctx'> </div><div class='hunk'>@@ -83,7 +84,9 @@ static int pseries_cpu_disable(void)</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='del'>-	vdso_data-&gt;processorCount--;</div><div class='add'>+#ifdef CONFIG_PPC64_PROC_SYSTEMCFG</div><div class='add'>+	systemcfg-&gt;processorCount--;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/*fix boot_cpuid here*/</div><div class='ctx'> 	if (cpu == boot_cpuid)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/htmdump.c b/arch/powerpc/platforms/pseries/htmdump.c<br/>new file mode 100644<br/>index 000000000000..742ec52c9d4d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/htmdump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/htmdump.c</a></div><div class='hunk'>@@ -0,0 +1,490 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) IBM Corporation, 2024</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "htmdump: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/plpar_wrappers.h&gt;</div><div class='add'>+#include &lt;asm/kvm_guest.h&gt;</div><div class='add'>+</div><div class='add'>+static void *htm_buf;</div><div class='add'>+static void *htm_status_buf;</div><div class='add'>+static void *htm_info_buf;</div><div class='add'>+static void *htm_caps_buf;</div><div class='add'>+static u32 nodeindex;</div><div class='add'>+static u32 nodalchipindex;</div><div class='add'>+static u32 coreindexonchip;</div><div class='add'>+static u32 htmtype;</div><div class='add'>+static u32 htmconfigure;</div><div class='add'>+static u32 htmstart;</div><div class='add'>+static u32 htmsetup;</div><div class='add'>+static u64 htmflags;</div><div class='add'>+</div><div class='add'>+static struct dentry *htmdump_debugfs_dir;</div><div class='add'>+#define	HTM_ENABLE	1</div><div class='add'>+#define	HTM_DISABLE	0</div><div class='add'>+#define	HTM_NOWRAP	1</div><div class='add'>+#define	HTM_WRAP	0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check the return code for H_HTM hcall.</div><div class='add'>+ * Return non-zero value (1) if either H_PARTIAL or H_SUCCESS</div><div class='add'>+ * is returned. For other return codes:</div><div class='add'>+ * Return zero if H_NOT_AVAILABLE.</div><div class='add'>+ * Return -EBUSY if hcall return busy.</div><div class='add'>+ * Return -EINVAL if any parameter or operation is not valid.</div><div class='add'>+ * Return -EPERM if HTM Virtualization Engine Technology code</div><div class='add'>+ * is not applied.</div><div class='add'>+ * Return -EIO if the HTM state is not valid.</div><div class='add'>+ */</div><div class='add'>+static ssize_t htm_return_check(long rc)</div><div class='add'>+{</div><div class='add'>+	switch (rc) {</div><div class='add'>+	case H_SUCCESS:</div><div class='add'>+	/* H_PARTIAL for the case where all available data can't be</div><div class='add'>+	 * returned due to buffer size constraint.</div><div class='add'>+	 */</div><div class='add'>+	case H_PARTIAL:</div><div class='add'>+		break;</div><div class='add'>+	/* H_NOT_AVAILABLE indicates reading from an offset outside the range,</div><div class='add'>+	 * i.e. past end of file.</div><div class='add'>+	 */</div><div class='add'>+	case H_NOT_AVAILABLE:</div><div class='add'>+		return 0;</div><div class='add'>+	case H_BUSY:</div><div class='add'>+	case H_LONG_BUSY_ORDER_1_MSEC:</div><div class='add'>+	case H_LONG_BUSY_ORDER_10_MSEC:</div><div class='add'>+	case H_LONG_BUSY_ORDER_100_MSEC:</div><div class='add'>+	case H_LONG_BUSY_ORDER_1_SEC:</div><div class='add'>+	case H_LONG_BUSY_ORDER_10_SEC:</div><div class='add'>+	case H_LONG_BUSY_ORDER_100_SEC:</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	case H_PARAMETER:</div><div class='add'>+	case H_P2:</div><div class='add'>+	case H_P3:</div><div class='add'>+	case H_P4:</div><div class='add'>+	case H_P5:</div><div class='add'>+	case H_P6:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case H_STATE:</div><div class='add'>+		return -EIO;</div><div class='add'>+	case H_AUTHORITY:</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return 1 for H_SUCCESS/H_PARTIAL</div><div class='add'>+	 */</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmdump_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_buf = filp-&gt;private_data;</div><div class='add'>+	unsigned long page, read_size, available;</div><div class='add'>+	loff_t offset;</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	page = ALIGN_DOWN(*ppos, PAGE_SIZE);</div><div class='add'>+	offset = (*ppos) % PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm dump (H_HTM_OP_DUMP_DATA)</div><div class='add'>+	 * - last three values are address, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_DUMP_DATA, virt_to_phys(htm_buf),</div><div class='add'>+				   PAGE_SIZE, page);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_DUMP_DATA, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	available = PAGE_SIZE;</div><div class='add'>+	read_size = min(count, available);</div><div class='add'>+	*ppos += read_size;</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, &amp;offset, htm_buf, available);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations htmdump_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read	= htmdump_read,</div><div class='add'>+	.open	= simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int  htmconfigure_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+	unsigned long param1 = -1, param2 = -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * value as 1 : configure HTM.</div><div class='add'>+	 * value as 0 : deconfigure HTM. Return -EINVAL for</div><div class='add'>+	 * other values.</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_ENABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm configure (H_HTM_OP_CONFIGURE)</div><div class='add'>+		 * - If htmflags is set, param1 and param2 will be -1</div><div class='add'>+		 *   which is an indicator to use default htm mode reg mask</div><div class='add'>+		 *   and htm mode reg value.</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		if (!htmflags) {</div><div class='add'>+			param1 = 0;</div><div class='add'>+			param2 = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			   htmtype, H_HTM_OP_CONFIGURE, param1, param2, 0);</div><div class='add'>+	} else if (val == HTM_DISABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm deconfigure (H_HTM_OP_DECONFIGURE)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				htmtype, H_HTM_OP_DECONFIGURE, 0, 0, 0);</div><div class='add'>+	} else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmconfigure if operation succeeds */</div><div class='add'>+	htmconfigure = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmconfigure_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmconfigure;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int  htmstart_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * value as 1: start HTM</div><div class='add'>+	 * value as 0: stop HTM</div><div class='add'>+	 * Return -EINVAL for other values.</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_ENABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm start (H_HTM_OP_START)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			   htmtype, H_HTM_OP_START, 0, 0, 0);</div><div class='add'>+</div><div class='add'>+	} else if (val == HTM_DISABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm stop (H_HTM_OP_STOP)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				htmtype, H_HTM_OP_STOP, 0, 0, 0);</div><div class='add'>+	} else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmstart if H_HTM_OP_START/H_HTM_OP_STOP operation succeeds */</div><div class='add'>+	htmstart = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmstart_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmstart;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmstatus_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_status_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+	u64 *num_entries;</div><div class='add'>+	u64 to_copy;</div><div class='add'>+	int htmstatus_flag;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm status (H_HTM_OP_STATUS)</div><div class='add'>+	 * - last three values as addr, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_STATUS, virt_to_phys(htm_status_buf),</div><div class='add'>+				   PAGE_SIZE, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_STATUS, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HTM status buffer, start of buffer + 0x10 gives the</div><div class='add'>+	 * number of HTM entries in the buffer. Each nest htm status</div><div class='add'>+	 * entry is 0x6 bytes where each core htm status entry is</div><div class='add'>+	 * 0x8 bytes.</div><div class='add'>+	 * So total count to copy is:</div><div class='add'>+	 * 32 bytes (for first 7 fields) + (number of HTM entries * entry size)</div><div class='add'>+	 */</div><div class='add'>+	num_entries = htm_status_buf + 0x10;</div><div class='add'>+	if (htmtype == 0x2)</div><div class='add'>+		htmstatus_flag = 0x8;</div><div class='add'>+	else</div><div class='add'>+		htmstatus_flag = 0x6;</div><div class='add'>+	to_copy = 32 + (be64_to_cpu(*num_entries) * htmstatus_flag);</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_status_buf, to_copy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations htmstatus_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read	= htmstatus_read,</div><div class='add'>+	.open	= simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t htminfo_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_info_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+	u64 *num_entries;</div><div class='add'>+	u64 to_copy;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm status (H_HTM_OP_STATUS)</div><div class='add'>+	 * - last three values as addr, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_DUMP_SYSPROC_CONF, virt_to_phys(htm_info_buf),</div><div class='add'>+				   PAGE_SIZE, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_DUMP_SYSPROC_CONF, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HTM status buffer, start of buffer + 0x10 gives the</div><div class='add'>+	 * number of HTM entries in the buffer. Each entry of processor</div><div class='add'>+	 * is 16 bytes.</div><div class='add'>+	 *</div><div class='add'>+	 * So total count to copy is:</div><div class='add'>+	 * 32 bytes (for first 5 fields) + (number of HTM entries * entry size)</div><div class='add'>+	 */</div><div class='add'>+	num_entries = htm_info_buf + 0x10;</div><div class='add'>+	to_copy = 32 + (be64_to_cpu(*num_entries) * 16);</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_info_buf, to_copy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmcaps_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_caps_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm capabilities (H_HTM_OP_CAPABILITIES)</div><div class='add'>+	 * - last three values as addr, size (0x80 for Capabilities Output Buffer</div><div class='add'>+	 *   and zero</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_CAPABILITIES, virt_to_phys(htm_caps_buf),</div><div class='add'>+				   0x80, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_CAPABILITIES, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_caps_buf, 0x80);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations htminfo_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read   = htminfo_read,</div><div class='add'>+	.open   = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations htmcaps_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read   = htmcaps_read,</div><div class='add'>+	.open   = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int  htmsetup_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Input value: HTM buffer size in the power of 2</div><div class='add'>+	 * example: hex value 0x21 ( decimal: 33 ) is for</div><div class='add'>+	 * 8GB</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm start (H_HTM_OP_SETUP)</div><div class='add'>+	 * - parameter 1 set to input value.</div><div class='add'>+	 * - last two values are unused, hence set to zero</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			htmtype, H_HTM_OP_SETUP, val, 0, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_SETUP, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmsetup if H_HTM_OP_SETUP operation succeeds */</div><div class='add'>+	htmsetup = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmsetup_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmsetup;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int  htmflags_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Input value:</div><div class='add'>+	 * Currently supported flag value is to enable/disable</div><div class='add'>+	 * HTM buffer wrap. wrap is used along with "configure"</div><div class='add'>+	 * to prevent HTM buffer from wrapping.</div><div class='add'>+	 * Writing 1 will set noWrap while configuring HTM</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_NOWRAP)</div><div class='add'>+		htmflags = H_HTM_FLAGS_NOWRAP;</div><div class='add'>+	else if (val == HTM_WRAP)</div><div class='add'>+		htmflags = 0;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmflags_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmflags;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmconfigure_fops, htmconfigure_get, htmconfigure_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmstart_fops, htmstart_get, htmstart_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmsetup_fops, htmsetup_get, htmsetup_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmflags_fops, htmflags_get, htmflags_set, "%llu\n");</div><div class='add'>+</div><div class='add'>+static int htmdump_init_debugfs(void)</div><div class='add'>+{</div><div class='add'>+	htm_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_buf) {</div><div class='add'>+		pr_err("Failed to allocate htmdump buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	htmdump_debugfs_dir = debugfs_create_dir("htmdump",</div><div class='add'>+						  arch_debugfs_dir);</div><div class='add'>+</div><div class='add'>+	debugfs_create_u32("nodeindex", 0600,</div><div class='add'>+			htmdump_debugfs_dir, &amp;nodeindex);</div><div class='add'>+	debugfs_create_u32("nodalchipindex", 0600,</div><div class='add'>+			htmdump_debugfs_dir, &amp;nodalchipindex);</div><div class='add'>+	debugfs_create_u32("coreindexonchip", 0600,</div><div class='add'>+			htmdump_debugfs_dir, &amp;coreindexonchip);</div><div class='add'>+	debugfs_create_u32("htmtype", 0600,</div><div class='add'>+			htmdump_debugfs_dir, &amp;htmtype);</div><div class='add'>+	debugfs_create_file("trace", 0400, htmdump_debugfs_dir, htm_buf, &amp;htmdump_fops);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Debugfs interface files to control HTM operations:</div><div class='add'>+	 */</div><div class='add'>+	debugfs_create_file("htmconfigure", 0600, htmdump_debugfs_dir, NULL, &amp;htmconfigure_fops);</div><div class='add'>+	debugfs_create_file("htmstart", 0600, htmdump_debugfs_dir, NULL, &amp;htmstart_fops);</div><div class='add'>+	debugfs_create_file("htmsetup", 0600, htmdump_debugfs_dir, NULL, &amp;htmsetup_fops);</div><div class='add'>+	debugfs_create_file("htmflags", 0600, htmdump_debugfs_dir, NULL, &amp;htmflags_fops);</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present status of HTM */</div><div class='add'>+	htm_status_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_status_buf) {</div><div class='add'>+		pr_err("Failed to allocate htmstatus buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present System Processor Configuration */</div><div class='add'>+	htm_info_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_info_buf) {</div><div class='add'>+		pr_err("Failed to allocate htm info buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present HTM capabilities */</div><div class='add'>+	htm_caps_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_caps_buf) {</div><div class='add'>+		pr_err("Failed to allocate htm caps buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("htmstatus", 0400, htmdump_debugfs_dir, htm_status_buf, &amp;htmstatus_fops);</div><div class='add'>+	debugfs_create_file("htminfo", 0400, htmdump_debugfs_dir, htm_info_buf, &amp;htminfo_fops);</div><div class='add'>+	debugfs_create_file("htmcaps", 0400, htmdump_debugfs_dir, htm_caps_buf, &amp;htmcaps_fops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init htmdump_init(void)</div><div class='add'>+{</div><div class='add'>+	/* Disable on kvm guest */</div><div class='add'>+	if (is_kvm_guest()) {</div><div class='add'>+		pr_info("htmdump not supported inside KVM guest\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (htmdump_init_debugfs())</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit htmdump_exit(void)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(htmdump_debugfs_dir);</div><div class='add'>+	kfree(htm_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(htmdump_init);</div><div class='add'>+module_exit(htmdump_exit);</div><div class='add'>+MODULE_DESCRIPTION("PHYP Hardware Trace Macro (HTM) data dumper");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c<br/>index 534cd159e9ab..eec333dd2e59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/iommu.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/iommu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/iommu.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/iommu.c</a></div><div class='hunk'>@@ -52,7 +52,8 @@ enum {</div><div class='ctx'> enum {</div><div class='ctx'> 	DDW_EXT_SIZE = 0,</div><div class='ctx'> 	DDW_EXT_RESET_DMA_WIN = 1,</div><div class='del'>-	DDW_EXT_QUERY_OUT_SIZE = 2</div><div class='add'>+	DDW_EXT_QUERY_OUT_SIZE = 2,</div><div class='add'>+	DDW_EXT_LIMITED_ADDR_MODE = 3</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct iommu_table *iommu_pseries_alloc_table(int node)</div><div class='hunk'>@@ -196,7 +197,7 @@ static void tce_iommu_userspace_view_free(struct iommu_table *tbl)</div><div class='ctx'> </div><div class='ctx'> static void tce_free_pSeries(struct iommu_table *tbl)</div><div class='ctx'> {</div><div class='del'>-	if (!tbl-&gt;it_userspace)</div><div class='add'>+	if (tbl-&gt;it_userspace)</div><div class='ctx'> 		tce_iommu_userspace_view_free(tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1284,17 +1285,13 @@ static LIST_HEAD(failed_ddw_pdn_list);</div><div class='ctx'> </div><div class='ctx'> static phys_addr_t ddw_memory_hotplug_max(void)</div><div class='ctx'> {</div><div class='del'>-	resource_size_t max_addr = memory_hotplug_max();</div><div class='del'>-	struct device_node *memory;</div><div class='add'>+	resource_size_t max_addr;</div><div class='ctx'> </div><div class='del'>-	for_each_node_by_type(memory, "memory") {</div><div class='del'>-		struct resource res;</div><div class='del'>-</div><div class='del'>-		if (of_address_to_resource(memory, 0, &amp;res))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		max_addr = max_t(resource_size_t, max_addr, res.end + 1);</div><div class='del'>-	}</div><div class='add'>+#if defined(CONFIG_NUMA) &amp;&amp; defined(CONFIG_MEMORY_HOTPLUG)</div><div class='add'>+	max_addr = hot_add_drconf_memory_max();</div><div class='add'>+#else</div><div class='add'>+	max_addr = memblock_end_of_DRAM();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	return max_addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -1331,6 +1328,54 @@ static void reset_dma_window(struct pci_dev *dev, struct device_node *par_dn)</div><div class='ctx'> 			 ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Platforms support placing PHB in limited address mode starting with LoPAR</div><div class='add'>+ * level 2.13 implement. In this mode, the DMA address returned by DDW is over</div><div class='add'>+ * 4GB but, less than 64-bits. This benefits IO adapters that don't support</div><div class='add'>+ * 64-bits for DMA addresses.</div><div class='add'>+ */</div><div class='add'>+static int limited_dma_window(struct pci_dev *dev, struct device_node *par_dn)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 cfg_addr, reset_dma_win, las_supported;</div><div class='add'>+	u64 buid;</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	struct pci_dn *pdn;</div><div class='add'>+</div><div class='add'>+	ret = ddw_read_ext(par_dn, DDW_EXT_RESET_DMA_WIN, &amp;reset_dma_win);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = ddw_read_ext(par_dn, DDW_EXT_LIMITED_ADDR_MODE, &amp;las_supported);</div><div class='add'>+</div><div class='add'>+	/* Limited Address Space extension available on the platform but DDW in</div><div class='add'>+	 * limited addressing mode not supported</div><div class='add'>+	 */</div><div class='add'>+	if (!ret &amp;&amp; !las_supported)</div><div class='add'>+		ret = -EPROTO;</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_info(&amp;dev-&gt;dev, "Limited Address Space for DDW not Supported, err: %d", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dn = pci_device_to_OF_node(dev);</div><div class='add'>+	pdn = PCI_DN(dn);</div><div class='add'>+	buid = pdn-&gt;phb-&gt;buid;</div><div class='add'>+	cfg_addr = (pdn-&gt;busno &lt;&lt; 16) | (pdn-&gt;devfn &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	ret = rtas_call(reset_dma_win, 4, 1, NULL, cfg_addr, BUID_HI(buid),</div><div class='add'>+			BUID_LO(buid), 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_info(&amp;dev-&gt;dev,</div><div class='add'>+			 "ibm,reset-pe-dma-windows(%x) for Limited Addr Support: %x %x %x returned %d ",</div><div class='add'>+			 reset_dma_win, cfg_addr, BUID_HI(buid), BUID_LO(buid),</div><div class='add'>+			 ret);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Return largest page shift based on "IO Page Sizes" output of ibm,query-pe-dma-window. */</div><div class='ctx'> static int iommu_get_page_shift(u32 query_page_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -1398,7 +1443,7 @@ static struct property *ddw_property_create(const char *propname, u32 liobn, u64</div><div class='ctx'>  *</div><div class='ctx'>  * returns true if can map all pages (direct mapping), false otherwise..</div><div class='ctx'>  */</div><div class='del'>-static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='add'>+static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn, u64 dma_mask)</div><div class='ctx'> {</div><div class='ctx'> 	int len = 0, ret;</div><div class='ctx'> 	int max_ram_len = order_base_2(ddw_memory_hotplug_max());</div><div class='hunk'>@@ -1417,6 +1462,9 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 	bool pmem_present;</div><div class='ctx'> 	struct pci_dn *pci = PCI_DN(pdn);</div><div class='ctx'> 	struct property *default_win = NULL;</div><div class='add'>+	bool limited_addr_req = false, limited_addr_enabled = false;</div><div class='add'>+	int dev_max_ddw;</div><div class='add'>+	int ddw_sz;</div><div class='ctx'> </div><div class='ctx'> 	dn = of_find_node_by_type(NULL, "ibm,pmemory");</div><div class='ctx'> 	pmem_present = dn != NULL;</div><div class='hunk'>@@ -1443,7 +1491,6 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 	 * the ibm,ddw-applicable property holds the tokens for:</div><div class='ctx'> 	 * ibm,query-pe-dma-window</div><div class='ctx'> 	 * ibm,create-pe-dma-window</div><div class='del'>-	 * ibm,remove-pe-dma-window</div><div class='ctx'> 	 * for the given node in that order.</div><div class='ctx'> 	 * the property is actually in the parent, not the PE</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1463,6 +1510,20 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		goto out_failed;</div><div class='ctx'> </div><div class='add'>+	/* DMA Limited Addressing required? This is when the driver has</div><div class='add'>+	 * requested to create DDW but supports mask which is less than 64-bits</div><div class='add'>+	 */</div><div class='add'>+	limited_addr_req = (dma_mask != DMA_BIT_MASK(64));</div><div class='add'>+</div><div class='add'>+	/* place the PHB in Limited Addressing mode */</div><div class='add'>+	if (limited_addr_req) {</div><div class='add'>+		if (limited_dma_window(dev, pdn))</div><div class='add'>+			goto out_failed;</div><div class='add'>+</div><div class='add'>+		/* PHB is in Limited address mode */</div><div class='add'>+		limited_addr_enabled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there is no window available, remove the default DMA window,</div><div class='ctx'> 	 * if it's present. This will make all the resources available to the</div><div class='hunk'>@@ -1509,6 +1570,15 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 		goto out_failed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Maximum DMA window size that the device can address (in log2) */</div><div class='add'>+	dev_max_ddw = fls64(dma_mask);</div><div class='add'>+</div><div class='add'>+	/* If the device DMA mask is less than 64-bits, make sure the DMA window</div><div class='add'>+	 * size is not bigger than what the device can access</div><div class='add'>+	 */</div><div class='add'>+	ddw_sz = min(order_base_2(query.largest_available_block &lt;&lt; page_shift),</div><div class='add'>+			dev_max_ddw);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The "ibm,pmemory" can appear anywhere in the address space.</div><div class='ctx'> 	 * Assuming it is still backed by page structs, try MAX_PHYSMEM_BITS</div><div class='hunk'>@@ -1517,23 +1587,21 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 	 */</div><div class='ctx'> 	len = max_ram_len;</div><div class='ctx'> 	if (pmem_present) {</div><div class='del'>-		if (query.largest_available_block &gt;=</div><div class='del'>-		    (1ULL &lt;&lt; (MAX_PHYSMEM_BITS - page_shift)))</div><div class='add'>+		if (ddw_sz &gt;= MAX_PHYSMEM_BITS)</div><div class='ctx'> 			len = MAX_PHYSMEM_BITS;</div><div class='ctx'> 		else</div><div class='ctx'> 			dev_info(&amp;dev-&gt;dev, "Skipping ibm,pmemory");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check if the available block * number of ptes will map everything */</div><div class='del'>-	if (query.largest_available_block &lt; (1ULL &lt;&lt; (len - page_shift))) {</div><div class='add'>+	if (ddw_sz &lt; len) {</div><div class='ctx'> 		dev_dbg(&amp;dev-&gt;dev,</div><div class='ctx'> 			"can't map partition max 0x%llx with %llu %llu-sized pages\n",</div><div class='ctx'> 			1ULL &lt;&lt; len,</div><div class='ctx'> 			query.largest_available_block,</div><div class='ctx'> 			1ULL &lt;&lt; page_shift);</div><div class='ctx'> </div><div class='del'>-		len = order_base_2(query.largest_available_block &lt;&lt; page_shift);</div><div class='del'>-</div><div class='add'>+		len = ddw_sz;</div><div class='ctx'> 		dynamic_mapping = true;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		direct_mapping = !default_win_removed ||</div><div class='hunk'>@@ -1547,8 +1615,9 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (default_win_removed &amp;&amp; pmem_present &amp;&amp; !direct_mapping) {</div><div class='ctx'> 			/* DDW is big enough to be split */</div><div class='del'>-			if ((query.largest_available_block &lt;&lt; page_shift) &gt;=</div><div class='del'>-			     MIN_DDW_VPMEM_DMA_WINDOW + (1ULL &lt;&lt; max_ram_len)) {</div><div class='add'>+			if ((1ULL &lt;&lt; ddw_sz) &gt;=</div><div class='add'>+			    MIN_DDW_VPMEM_DMA_WINDOW + (1ULL &lt;&lt; max_ram_len)) {</div><div class='add'>+</div><div class='ctx'> 				direct_mapping = true;</div><div class='ctx'> </div><div class='ctx'> 				/* offset of the Dynamic part of DDW */</div><div class='hunk'>@@ -1559,8 +1628,7 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 			dynamic_mapping = true;</div><div class='ctx'> </div><div class='ctx'> 			/* create max size DDW possible */</div><div class='del'>-			len = order_base_2(query.largest_available_block</div><div class='del'>-							&lt;&lt; page_shift);</div><div class='add'>+			len = ddw_sz;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1600,7 +1668,7 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> </div><div class='ctx'> 	if (direct_mapping) {</div><div class='ctx'> 		/* DDW maps the whole partition, so enable direct DMA mapping */</div><div class='del'>-		ret = walk_system_ram_range(0, memblock_end_of_DRAM() &gt;&gt; PAGE_SHIFT,</div><div class='add'>+		ret = walk_system_ram_range(0, ddw_memory_hotplug_max() &gt;&gt; PAGE_SHIFT,</div><div class='ctx'> 					    win64-&gt;value, tce_setrange_multi_pSeriesLP_walk);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_info(&amp;dev-&gt;dev, "failed to map DMA window for %pOF: %d\n",</div><div class='hunk'>@@ -1650,7 +1718,8 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)</div><div class='ctx'> 		iommu_table_setparms_common(newtbl, pci-&gt;phb-&gt;bus-&gt;number, create.liobn,</div><div class='ctx'> 					    dynamic_addr, dynamic_len, page_shift, NULL,</div><div class='ctx'> 					    &amp;iommu_table_lpar_multi_ops);</div><div class='del'>-		iommu_init_table(newtbl, pci-&gt;phb-&gt;node, start, end);</div><div class='add'>+		iommu_init_table(newtbl, pci-&gt;phb-&gt;node,</div><div class='add'>+				 start &gt;&gt; page_shift, end &gt;&gt; page_shift);</div><div class='ctx'> </div><div class='ctx'> 		pci-&gt;table_group-&gt;tables[default_win_removed ? 0 : 1] = newtbl;</div><div class='ctx'> </div><div class='hunk'>@@ -1688,7 +1757,7 @@ out_remove_win:</div><div class='ctx'> 	__remove_dma_window(pdn, ddw_avail, create.liobn);</div><div class='ctx'> </div><div class='ctx'> out_failed:</div><div class='del'>-	if (default_win_removed)</div><div class='add'>+	if (default_win_removed || limited_addr_enabled)</div><div class='ctx'> 		reset_dma_window(dev, pdn);</div><div class='ctx'> </div><div class='ctx'> 	fpdn = kzalloc(sizeof(*fpdn), GFP_KERNEL);</div><div class='hunk'>@@ -1707,6 +1776,9 @@ out_unlock:</div><div class='ctx'> 		dev-&gt;dev.bus_dma_limit = dev-&gt;dev.archdata.dma_offset +</div><div class='ctx'> 						(1ULL &lt;&lt; max_ram_len);</div><div class='ctx'> </div><div class='add'>+	dev_info(&amp;dev-&gt;dev, "lsa_required: %x, lsa_enabled: %x, direct mapping: %x\n",</div><div class='add'>+			limited_addr_req, limited_addr_enabled, direct_mapping);</div><div class='add'>+</div><div class='ctx'> 	return direct_mapping;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1832,8 +1904,11 @@ static bool iommu_bypass_supported_pSeriesLP(struct pci_dev *pdev, u64 dma_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dn = pci_device_to_OF_node(pdev), *pdn;</div><div class='ctx'> </div><div class='del'>-	/* only attempt to use a new window if 64-bit DMA is requested */</div><div class='del'>-	if (dma_mask &lt; DMA_BIT_MASK(64))</div><div class='add'>+	/* For DDW, DMA mask should be more than 32-bits. For mask more then</div><div class='add'>+	 * 32-bits but less then 64-bits, DMA addressing is supported in</div><div class='add'>+	 * Limited Addressing mode.</div><div class='add'>+	 */</div><div class='add'>+	if (dma_mask &lt;= DMA_BIT_MASK(32))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "node is %pOF\n", dn);</div><div class='hunk'>@@ -1846,7 +1921,7 @@ static bool iommu_bypass_supported_pSeriesLP(struct pci_dev *pdev, u64 dma_mask)</div><div class='ctx'> 	 */</div><div class='ctx'> 	pdn = pci_dma_find(dn, NULL);</div><div class='ctx'> 	if (pdn &amp;&amp; PCI_DN(pdn))</div><div class='del'>-		return enable_ddw(pdev, pdn);</div><div class='add'>+		return enable_ddw(pdev, pdn, dma_mask);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -2065,7 +2140,9 @@ static long spapr_tce_create_table(struct iommu_table_group *table_group, int nu</div><div class='ctx'> 							    offset, 1UL &lt;&lt; window_shift,</div><div class='ctx'> 							    IOMMU_PAGE_SHIFT_4K, NULL,</div><div class='ctx'> 							    &amp;iommu_table_lpar_multi_ops);</div><div class='del'>-				iommu_init_table(tbl, pci-&gt;phb-&gt;node, start, end);</div><div class='add'>+				iommu_init_table(tbl, pci-&gt;phb-&gt;node,</div><div class='add'>+						 start &gt;&gt; IOMMU_PAGE_SHIFT_4K,</div><div class='add'>+						 end &gt;&gt; IOMMU_PAGE_SHIFT_4K);</div><div class='ctx'> </div><div class='ctx'> 				table_group-&gt;tables[0] = tbl;</div><div class='ctx'> </div><div class='hunk'>@@ -2136,7 +2213,7 @@ static long spapr_tce_create_table(struct iommu_table_group *table_group, int nu</div><div class='ctx'> 	/* New table for using DDW instead of the default DMA window */</div><div class='ctx'> 	iommu_table_setparms_common(tbl, pci-&gt;phb-&gt;bus-&gt;number, create.liobn, win_addr,</div><div class='ctx'> 				    1UL &lt;&lt; len, page_shift, NULL, &amp;iommu_table_lpar_multi_ops);</div><div class='del'>-	iommu_init_table(tbl, pci-&gt;phb-&gt;node, start, end);</div><div class='add'>+	iommu_init_table(tbl, pci-&gt;phb-&gt;node, start &gt;&gt; page_shift, end &gt;&gt; page_shift);</div><div class='ctx'> </div><div class='ctx'> 	pci-&gt;table_group-&gt;tables[num] = tbl;</div><div class='ctx'> 	set_iommu_table_base(&amp;pdev-&gt;dev, tbl);</div><div class='hunk'>@@ -2205,6 +2282,9 @@ static long spapr_tce_unset_window(struct iommu_table_group *table_group, int nu</div><div class='ctx'> 	const char *win_name;</div><div class='ctx'> 	int ret = -ENODEV;</div><div class='ctx'> </div><div class='add'>+	if (!tbl) /* The table was never created OR window was never opened */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;dma_win_init_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if ((num == 0) &amp;&amp; is_default_window_table(table_group, tbl))</div><div class='hunk'>@@ -2343,11 +2423,17 @@ static int iommu_mem_notifier(struct notifier_block *nb, unsigned long action,</div><div class='ctx'> 	struct memory_notify *arg = data;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	/* This notifier can get called when onlining persistent memory as well.</div><div class='add'>+	 * TCEs are not pre-mapped for persistent memory. Persistent memory will</div><div class='add'>+	 * always be above ddw_memory_hotplug_max()</div><div class='add'>+	 */</div><div class='add'>+</div><div class='ctx'> 	switch (action) {</div><div class='ctx'> 	case MEM_GOING_ONLINE:</div><div class='ctx'> 		spin_lock(&amp;dma_win_list_lock);</div><div class='ctx'> 		list_for_each_entry(window, &amp;dma_win_list, list) {</div><div class='del'>-			if (window-&gt;direct) {</div><div class='add'>+			if (window-&gt;direct &amp;&amp; (arg-&gt;start_pfn &lt;&lt; PAGE_SHIFT) &lt;</div><div class='add'>+				ddw_memory_hotplug_max()) {</div><div class='ctx'> 				ret |= tce_setrange_multi_pSeriesLP(arg-&gt;start_pfn,</div><div class='ctx'> 						arg-&gt;nr_pages, window-&gt;prop);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2359,7 +2445,8 @@ static int iommu_mem_notifier(struct notifier_block *nb, unsigned long action,</div><div class='ctx'> 	case MEM_OFFLINE:</div><div class='ctx'> 		spin_lock(&amp;dma_win_list_lock);</div><div class='ctx'> 		list_for_each_entry(window, &amp;dma_win_list, list) {</div><div class='del'>-			if (window-&gt;direct) {</div><div class='add'>+			if (window-&gt;direct &amp;&amp; (arg-&gt;start_pfn &lt;&lt; PAGE_SHIFT) &lt;</div><div class='add'>+				ddw_memory_hotplug_max()) {</div><div class='ctx'> 				ret |= tce_clearrange_multi_pSeriesLP(arg-&gt;start_pfn,</div><div class='ctx'> 						arg-&gt;nr_pages, window-&gt;prop);</div><div class='ctx'> 			}</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c<br/>index c1d8bee8f701..6a415febc53b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/lpar.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/lpar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/lpar.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/lpar.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/cpuhotplug.h&gt;</div><div class='hunk'>@@ -169,7 +170,7 @@ struct vcpu_dispatch_data {</div><div class='ctx'>  */</div><div class='ctx'> #define NR_CPUS_H	NR_CPUS</div><div class='ctx'> </div><div class='del'>-DEFINE_RWLOCK(dtl_access_lock);</div><div class='add'>+DECLARE_RWSEM(dtl_access_lock);</div><div class='ctx'> static DEFINE_PER_CPU(struct vcpu_dispatch_data, vcpu_disp_data);</div><div class='ctx'> static DEFINE_PER_CPU(u64, dtl_entry_ridx);</div><div class='ctx'> static DEFINE_PER_CPU(struct dtl_worker, dtl_workers);</div><div class='hunk'>@@ -463,7 +464,7 @@ static int dtl_worker_enable(unsigned long *time_limit)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0, state;</div><div class='ctx'> </div><div class='del'>-	if (!write_trylock(&amp;dtl_access_lock)) {</div><div class='add'>+	if (!down_write_trylock(&amp;dtl_access_lock)) {</div><div class='ctx'> 		rc = -EBUSY;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -479,7 +480,7 @@ static int dtl_worker_enable(unsigned long *time_limit)</div><div class='ctx'> 		pr_err("vcpudispatch_stats: unable to setup workqueue for DTL processing\n");</div><div class='ctx'> 		free_dtl_buffers(time_limit);</div><div class='ctx'> 		reset_global_dtl_mask();</div><div class='del'>-		write_unlock(&amp;dtl_access_lock);</div><div class='add'>+		up_write(&amp;dtl_access_lock);</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -494,7 +495,7 @@ static void dtl_worker_disable(unsigned long *time_limit)</div><div class='ctx'> 	cpuhp_remove_state(dtl_worker_state);</div><div class='ctx'> 	free_dtl_buffers(time_limit);</div><div class='ctx'> 	reset_global_dtl_mask();</div><div class='del'>-	write_unlock(&amp;dtl_access_lock);</div><div class='add'>+	up_write(&amp;dtl_access_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p,</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/lparcfg.c b/arch/powerpc/platforms/pseries/lparcfg.c<br/>index 62da20f9700a..cc22924f159f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/lparcfg.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/lparcfg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/lparcfg.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/lparcfg.c</a></div><div class='hunk'>@@ -29,7 +29,6 @@</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/vdso_datapage.h&gt;</div><div class='ctx'> #include &lt;asm/vio.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='hunk'>@@ -530,7 +529,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)</div><div class='ctx'> 		lrdrp = of_get_property(rtas_node, "ibm,lrdr-capacity", NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (lrdrp == NULL) {</div><div class='del'>-		partition_potential_processors = vdso_data-&gt;processorCount;</div><div class='add'>+		partition_potential_processors = num_possible_cpus();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		partition_potential_processors = be32_to_cpup(lrdrp + 4);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -553,7 +552,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)</div><div class='ctx'> 	} else {		/* non SPLPAR case */</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(m, "system_active_processors=%d\n",</div><div class='del'>-			   partition_potential_processors);</div><div class='add'>+			   partition_active_processors);</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(m, "system_potential_processors=%d\n",</div><div class='ctx'> 			   partition_potential_processors);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c<br/>index 1798f0f14d58..95fe802ccdfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/mobility.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/mobility.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/mobility.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/mobility.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include "pseries.h"</div><div class='ctx'> #include "vas.h"	/* vas_migration_handler() */</div><div class='add'>+#include "papr-hvpipe.h"	/* hvpipe_migration_handler() */</div><div class='ctx'> #include "../../kernel/cacheinfo.h"</div><div class='ctx'> </div><div class='ctx'> static struct kobject *mobility_kobj;</div><div class='hunk'>@@ -53,7 +54,7 @@ struct update_props_workarea {</div><div class='ctx'> static unsigned int nmi_wd_lpm_factor = 200;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SYSCTL</div><div class='del'>-static struct ctl_table nmi_wd_lpm_factor_ctl_table[] = {</div><div class='add'>+static const struct ctl_table nmi_wd_lpm_factor_ctl_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "nmi_wd_lpm_factor",</div><div class='ctx'> 		.data		= &amp;nmi_wd_lpm_factor,</div><div class='hunk'>@@ -744,6 +745,7 @@ static int pseries_migrate_partition(u64 handle)</div><div class='ctx'> 	 * by closing VAS windows at the beginning of this function.</div><div class='ctx'> 	 */</div><div class='ctx'> 	vas_migration_handler(VAS_SUSPEND);</div><div class='add'>+	hvpipe_migration_handler(HVPIPE_SUSPEND);</div><div class='ctx'> </div><div class='ctx'> 	ret = wait_for_vasi_session_suspending(handle);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -770,6 +772,7 @@ static int pseries_migrate_partition(u64 handle)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	vas_migration_handler(VAS_RESUME);</div><div class='add'>+	hvpipe_migration_handler(HVPIPE_RESUME);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c<br/>index 6dfb55b52d36..825f9432e03d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/msi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/msi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/msi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/msi.c</a></div><div class='hunk'>@@ -7,14 +7,15 @@</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/irq-msi-lib.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-pci.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='del'>-#include &lt;asm/xive.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pseries.h"</div><div class='ctx'> </div><div class='hunk'>@@ -429,43 +430,25 @@ again:</div><div class='ctx'> static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev,</div><div class='ctx'> 				   int nvec, msi_alloc_info_t *arg)</div><div class='ctx'> {</div><div class='add'>+	struct msi_domain_info *info = domain-&gt;host_data;</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int type = pdev-&gt;msix_enabled ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI;</div><div class='add'>+	int type = (info-&gt;flags &amp; MSI_FLAG_PCI_MSIX) ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI;</div><div class='ctx'> </div><div class='ctx'> 	return rtas_prepare_msi_irqs(pdev, nvec, type, arg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * -&gt;msi_free() is called before irq_domain_free_irqs_top() when the</div><div class='del'>- * handler data is still available. Use that to clear the XIVE</div><div class='del'>- * controller data.</div><div class='del'>- */</div><div class='del'>-static void pseries_msi_ops_msi_free(struct irq_domain *domain,</div><div class='del'>-				     struct msi_domain_info *info,</div><div class='del'>-				     unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	if (xive_enabled())</div><div class='del'>-		xive_irq_free_data(irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * RTAS can not disable one MSI at a time. It's all or nothing. Do it</div><div class='ctx'>  * at the end after all IRQs have been freed.</div><div class='ctx'>  */</div><div class='del'>-static void pseries_msi_post_free(struct irq_domain *domain, struct device *dev)</div><div class='add'>+static void pseries_msi_ops_teardown(struct irq_domain *domain, msi_alloc_info_t *arg)</div><div class='ctx'> {</div><div class='del'>-	if (WARN_ON_ONCE(!dev_is_pci(dev)))</div><div class='del'>-		return;</div><div class='add'>+	struct msi_desc *desc = arg-&gt;desc;</div><div class='add'>+	struct pci_dev *pdev = msi_desc_to_pci_dev(desc);</div><div class='ctx'> </div><div class='del'>-	rtas_disable_msi(to_pci_dev(dev));</div><div class='add'>+	rtas_disable_msi(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct msi_domain_ops pseries_pci_msi_domain_ops = {</div><div class='del'>-	.msi_prepare	= pseries_msi_ops_prepare,</div><div class='del'>-	.msi_free	= pseries_msi_ops_msi_free,</div><div class='del'>-	.msi_post_free	= pseries_msi_post_free,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void pseries_msi_shutdown(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	d = d-&gt;parent_data;</div><div class='hunk'>@@ -473,18 +456,6 @@ static void pseries_msi_shutdown(struct irq_data *d)</div><div class='ctx'> 		d-&gt;chip-&gt;irq_shutdown(d);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pseries_msi_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	pci_msi_mask_irq(d);</div><div class='del'>-	irq_chip_mask_parent(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pseries_msi_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	pci_msi_unmask_irq(d);</div><div class='del'>-	irq_chip_unmask_parent(d);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct msi_desc *entry = irq_data_get_msi_desc(data);</div><div class='hunk'>@@ -499,32 +470,49 @@ static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> 	entry-&gt;msg = *msg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip pseries_pci_msi_irq_chip = {</div><div class='del'>-	.name		= "pSeries-PCI-MSI",</div><div class='del'>-	.irq_shutdown	= pseries_msi_shutdown,</div><div class='del'>-	.irq_mask	= pseries_msi_mask,</div><div class='del'>-	.irq_unmask	= pseries_msi_unmask,</div><div class='del'>-	.irq_eoi	= irq_chip_eoi_parent,</div><div class='del'>-	.irq_write_msi_msg	= pseries_msi_write_msg,</div><div class='del'>-};</div><div class='add'>+static bool pseries_init_dev_msi_info(struct device *dev, struct irq_domain *domain,</div><div class='add'>+				      struct irq_domain *real_parent, struct msi_domain_info *info)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip *chip = info-&gt;chip;</div><div class='ctx'> </div><div class='add'>+	if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set MSI_FLAG_MSIX_CONTIGUOUS as there is no way to express to</div><div class='del'>- * firmware to request a discontiguous or non-zero based range of</div><div class='del'>- * MSI-X entries. Core code will reject such setup attempts.</div><div class='del'>- */</div><div class='del'>-static struct msi_domain_info pseries_msi_domain_info = {</div><div class='del'>-	.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |</div><div class='del'>-		  MSI_FLAG_MULTI_PCI_MSI  | MSI_FLAG_PCI_MSIX |</div><div class='del'>-		  MSI_FLAG_MSIX_CONTIGUOUS),</div><div class='del'>-	.ops   = &amp;pseries_pci_msi_domain_ops,</div><div class='del'>-	.chip  = &amp;pseries_pci_msi_irq_chip,</div><div class='add'>+	chip-&gt;irq_shutdown = pseries_msi_shutdown;</div><div class='add'>+	chip-&gt;irq_write_msi_msg	= pseries_msi_write_msg;</div><div class='add'>+</div><div class='add'>+	info-&gt;ops-&gt;msi_prepare = pseries_msi_ops_prepare;</div><div class='add'>+	info-&gt;ops-&gt;msi_teardown = pseries_msi_ops_teardown;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define PSERIES_PCI_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS	| \</div><div class='add'>+					MSI_FLAG_USE_DEF_CHIP_OPS	| \</div><div class='add'>+					MSI_FLAG_PCI_MSI_MASK_PARENT)</div><div class='add'>+#define PSERIES_PCI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK		| \</div><div class='add'>+					 MSI_FLAG_PCI_MSIX		| \</div><div class='add'>+					 MSI_FLAG_MSIX_CONTIGUOUS	| \</div><div class='add'>+					 MSI_FLAG_MULTI_PCI_MSI)</div><div class='add'>+</div><div class='add'>+static const struct msi_parent_ops pseries_msi_parent_ops = {</div><div class='add'>+	.required_flags		= PSERIES_PCI_MSI_FLAGS_REQUIRED,</div><div class='add'>+	.supported_flags	= PSERIES_PCI_MSI_FLAGS_SUPPORTED,</div><div class='add'>+	.chip_flags		= MSI_CHIP_FLAG_SET_EOI,</div><div class='add'>+	.bus_select_token	= DOMAIN_BUS_NEXUS,</div><div class='add'>+	.bus_select_mask	= MATCH_PCI_MSI,</div><div class='add'>+	.prefix			= "pSeries-",</div><div class='add'>+	.init_dev_msi_info	= pseries_init_dev_msi_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='del'>-	__pci_read_msi_msg(irq_data_get_msi_desc(data), msg);</div><div class='add'>+	struct pci_dev *dev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;current_state == PCI_D0)</div><div class='add'>+		__pci_read_msi_msg(irq_data_get_msi_desc(data), msg);</div><div class='add'>+	else</div><div class='add'>+		get_cached_msi_msg(data-&gt;irq, msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip pseries_msi_irq_chip = {</div><div class='hunk'>@@ -587,7 +575,7 @@ static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	/* TODO: handle RTAS cleanup in -&gt;msi_finish() ? */</div><div class='del'>-	irq_domain_free_irqs_parent(domain, virq, i - 1);</div><div class='add'>+	irq_domain_free_irqs_parent(domain, virq, i);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -598,11 +586,11 @@ static void pseries_irq_domain_free(struct irq_domain *domain, unsigned int virq</div><div class='ctx'> 	struct pci_controller *phb = irq_data_get_irq_chip_data(d);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s bridge %pOF %d #%d\n", __func__, phb-&gt;dn, virq, nr_irqs);</div><div class='del'>-</div><div class='del'>-	/* XIVE domain data is cleared through -&gt;msi_free() */</div><div class='add'>+	irq_domain_free_irqs_parent(domain, virq, nr_irqs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct irq_domain_ops pseries_irq_domain_ops = {</div><div class='add'>+	.select	= msi_lib_irq_domain_select,</div><div class='ctx'> 	.alloc  = pseries_irq_domain_alloc,</div><div class='ctx'> 	.free   = pseries_irq_domain_free,</div><div class='ctx'> };</div><div class='hunk'>@@ -610,31 +598,19 @@ static const struct irq_domain_ops pseries_irq_domain_ops = {</div><div class='ctx'> static int __pseries_msi_allocate_domains(struct pci_controller *phb,</div><div class='ctx'> 					  unsigned int count)</div><div class='ctx'> {</div><div class='del'>-	struct irq_domain *parent = irq_get_default_host();</div><div class='del'>-</div><div class='del'>-	phb-&gt;fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI",</div><div class='del'>-						       phb-&gt;global_number);</div><div class='del'>-	if (!phb-&gt;fwnode)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	phb-&gt;dev_domain = irq_domain_create_hierarchy(parent, 0, count,</div><div class='del'>-						      phb-&gt;fwnode,</div><div class='del'>-						      &amp;pseries_irq_domain_ops, phb);</div><div class='add'>+	struct irq_domain *parent = irq_get_default_domain();</div><div class='add'>+	struct irq_domain_info info = {</div><div class='add'>+		.fwnode		= of_fwnode_handle(phb-&gt;dn),</div><div class='add'>+		.ops		= &amp;pseries_irq_domain_ops,</div><div class='add'>+		.host_data	= phb,</div><div class='add'>+		.size		= count,</div><div class='add'>+		.parent		= parent,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phb-&gt;dev_domain = msi_create_parent_irq_domain(&amp;info, &amp;pseries_msi_parent_ops);</div><div class='ctx'> 	if (!phb-&gt;dev_domain) {</div><div class='del'>-		pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n",</div><div class='del'>-		       phb-&gt;dn, phb-&gt;global_number);</div><div class='del'>-		irq_domain_free_fwnode(phb-&gt;fwnode);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phb-&gt;msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb-&gt;dn),</div><div class='del'>-						    &amp;pseries_msi_domain_info,</div><div class='del'>-						    phb-&gt;dev_domain);</div><div class='del'>-	if (!phb-&gt;msi_domain) {</div><div class='ctx'> 		pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n",</div><div class='ctx'> 		       phb-&gt;dn, phb-&gt;global_number);</div><div class='del'>-		irq_domain_free_fwnode(phb-&gt;fwnode);</div><div class='del'>-		irq_domain_remove(phb-&gt;dev_domain);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -656,12 +632,8 @@ int pseries_msi_allocate_domains(struct pci_controller *phb)</div><div class='ctx'> </div><div class='ctx'> void pseries_msi_free_domains(struct pci_controller *phb)</div><div class='ctx'> {</div><div class='del'>-	if (phb-&gt;msi_domain)</div><div class='del'>-		irq_domain_remove(phb-&gt;msi_domain);</div><div class='ctx'> 	if (phb-&gt;dev_domain)</div><div class='ctx'> 		irq_domain_remove(phb-&gt;dev_domain);</div><div class='del'>-	if (phb-&gt;fwnode)</div><div class='del'>-		irq_domain_free_fwnode(phb-&gt;fwnode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-hvpipe.c b/arch/powerpc/platforms/pseries/papr-hvpipe.c<br/>new file mode 100644<br/>index 000000000000..21a2f447c43f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-hvpipe.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-hvpipe.c</a></div><div class='hunk'>@@ -0,0 +1,818 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-hvpipe: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/poll.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/papr-sysparm.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-hvpipe.h&gt;</div><div class='add'>+#include "pseries.h"</div><div class='add'>+#include "papr-hvpipe.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(hvpipe_src_list_lock);</div><div class='add'>+static LIST_HEAD(hvpipe_src_list);</div><div class='add'>+</div><div class='add'>+static unsigned char hvpipe_ras_buf[RTAS_ERROR_LOG_MAX];</div><div class='add'>+static struct workqueue_struct *papr_hvpipe_wq;</div><div class='add'>+static struct work_struct *papr_hvpipe_work;</div><div class='add'>+static int hvpipe_check_exception_token;</div><div class='add'>+static bool hvpipe_feature;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * New PowerPC FW provides support for partitions and various</div><div class='add'>+ * sources (Ex: remote hardware management console (HMC)) to</div><div class='add'>+ * exchange information through an inband hypervisor channel</div><div class='add'>+ * called HVPIPE. Only HMCs are supported right now and</div><div class='add'>+ * partitions can communicate with multiple HMCs and each</div><div class='add'>+ * source represented by source ID.</div><div class='add'>+ *</div><div class='add'>+ * FW introduces send HVPIPE and recv HVPIPE RTAS calls for</div><div class='add'>+ * partitions to send and receive payloads respectively.</div><div class='add'>+ *</div><div class='add'>+ * These RTAS functions have the following certain requirements</div><div class='add'>+ * / limitations:</div><div class='add'>+ * - One hvpipe per partition for all sources.</div><div class='add'>+ * - Assume the return status of send HVPIPE as delivered to source</div><div class='add'>+ * - Assume the return status of recv HVPIPE as ACK to source</div><div class='add'>+ * - Generates HVPIPE event message when the payload is ready</div><div class='add'>+ *   for the partition. The hypervisor will not deliver another</div><div class='add'>+ *   event until the partition read the previous payload which</div><div class='add'>+ *   means the pipe is blocked for any sources.</div><div class='add'>+ *</div><div class='add'>+ * Linux implementation:</div><div class='add'>+ * Follow the similar interfaces that the OS has for other RTAS calls.</div><div class='add'>+ * ex: /dev/papr-indices, /dev/papr-vpd, etc.</div><div class='add'>+ * - /dev/papr-hvpipe is available for the user space.</div><div class='add'>+ * - devfd = open("/dev/papr-hvpipe", ..)</div><div class='add'>+ * - fd = ioctl(fd,HVPIPE_IOC_CREATE_HANDLE,&amp;srcID)-for each source</div><div class='add'>+ * - write(fd, buf, size) --&gt; Issue send HVPIPE RTAS call and</div><div class='add'>+ *   returns size for success or the corresponding error for RTAS</div><div class='add'>+ *   return code for failure.</div><div class='add'>+ * - poll(fd,..) -&gt; wakeup FD if the payload is available to read.</div><div class='add'>+ *   HVPIPE event message handler wakeup FD based on source ID in</div><div class='add'>+ *   the event message</div><div class='add'>+ * - read(fd, buf, size) --&gt; Issue recv HVPIPE RTAS call and</div><div class='add'>+ *   returns size for success or the corresponding error for RTAS</div><div class='add'>+ *   return code for failure.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ibm,receive-hvpipe-msg RTAS call.</div><div class='add'>+ * @area: Caller-provided work area buffer for results.</div><div class='add'>+ * @srcID: Source ID returned by the RTAS call.</div><div class='add'>+ * @bytesw: Bytes written by RTAS call to @area.</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_receive_hvpipe_msg(struct rtas_work_area *area,</div><div class='add'>+					u32 *srcID, u32 *bytesw)</div><div class='add'>+{</div><div class='add'>+	const s32 token = rtas_function_token(RTAS_FN_IBM_RECEIVE_HVPIPE_MSG);</div><div class='add'>+	u32 rets[2];</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 2, 3, rets,</div><div class='add'>+				rtas_work_area_phys(area),</div><div class='add'>+				rtas_work_area_size(area));</div><div class='add'>+</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		*srcID = rets[0];</div><div class='add'>+		*bytesw = rets[1];</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_FUNC_NOT_SUPPORTED:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,receive-hvpipe-msg status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ibm,send-hvpipe-msg RTAS call</div><div class='add'>+ * @area: Caller-provided work area buffer to send.</div><div class='add'>+ * @srcID: Target source for the send pipe message.</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_send_hvpipe_msg(struct rtas_work_area *area, u32 srcID)</div><div class='add'>+{</div><div class='add'>+	const s32 token = rtas_function_token(RTAS_FN_IBM_SEND_HVPIPE_MSG);</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 2, 1, NULL, srcID,</div><div class='add'>+				rtas_work_area_phys(area));</div><div class='add'>+</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_HVPIPE_CLOSED:</div><div class='add'>+		ret = -EPIPE;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_FUNC_NOT_SUPPORTED:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,receive-hvpipe-msg status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hvpipe_source_info *hvpipe_find_source(u32 srcID)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_source_info *src_info;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(src_info, &amp;hvpipe_src_list, list)</div><div class='add'>+		if (src_info-&gt;srcID == srcID)</div><div class='add'>+			return src_info;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This work function collects receive buffer with recv HVPIPE</div><div class='add'>+ * RTAS call. Called from read()</div><div class='add'>+ * @buf: User specified buffer to copy the payload that returned</div><div class='add'>+ *       from recv HVPIPE RTAS.</div><div class='add'>+ * @size: Size of buffer user passed.</div><div class='add'>+ */</div><div class='add'>+static int hvpipe_rtas_recv_msg(char __user *buf, int size)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 srcID, bytes_written;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	if (!work_area) {</div><div class='add'>+		pr_err("Could not allocate RTAS buffer for recv pipe\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtas_ibm_receive_hvpipe_msg(work_area, &amp;srcID,</div><div class='add'>+					&amp;bytes_written);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		/*</div><div class='add'>+		 * Recv HVPIPE RTAS is successful.</div><div class='add'>+		 * When releasing FD or no one is waiting on the</div><div class='add'>+		 * specific source, issue recv HVPIPE RTAS call</div><div class='add'>+		 * so that pipe is not blocked - this func is called</div><div class='add'>+		 * with NULL buf.</div><div class='add'>+		 */</div><div class='add'>+		if (buf) {</div><div class='add'>+			if (size &lt; bytes_written) {</div><div class='add'>+				pr_err("Received the payload size = %d, but the buffer size = %d\n",</div><div class='add'>+					bytes_written, size);</div><div class='add'>+				bytes_written = size;</div><div class='add'>+			}</div><div class='add'>+			ret = copy_to_user(buf,</div><div class='add'>+					rtas_work_area_raw_buf(work_area),</div><div class='add'>+					bytes_written);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = bytes_written;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		pr_err("ibm,receive-hvpipe-msg failed with %d\n",</div><div class='add'>+				ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_hvpipe_handle_write -  Issue send HVPIPE RTAS and return</div><div class='add'>+ * the size (payload + HVPIPE_HDR_LEN) for RTAS success.</div><div class='add'>+ * Otherwise returns the status of RTAS to the user space</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_hvpipe_handle_write(struct file *file,</div><div class='add'>+	const char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_source_info *src_info = file-&gt;private_data;</div><div class='add'>+	struct rtas_work_area *work_area, *work_buf;</div><div class='add'>+	unsigned long ret, len;</div><div class='add'>+	__be64 *area_be;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return -ENXIO during migration</div><div class='add'>+	 */</div><div class='add'>+	if (!hvpipe_feature)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (!src_info)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Send HVPIPE RTAS is used to send payload to the specific</div><div class='add'>+	 * source with the input parameters source ID and the payload</div><div class='add'>+	 * as buffer list. Each entry in the buffer list contains</div><div class='add'>+	 * address/length pair of the buffer.</div><div class='add'>+	 *</div><div class='add'>+	 * The buffer list format is as follows:</div><div class='add'>+	 *</div><div class='add'>+	 * Header (length of address/length pairs and the header length)</div><div class='add'>+	 * Address of 4K buffer 1</div><div class='add'>+	 * Length of 4K buffer 1 used</div><div class='add'>+	 * ...</div><div class='add'>+	 * Address of 4K buffer n</div><div class='add'>+	 * Length of 4K buffer n used</div><div class='add'>+	 *</div><div class='add'>+	 * See PAPR 7.3.32.2 ibm,send-hvpipe-msg</div><div class='add'>+	 *</div><div class='add'>+	 * Even though can support max 1MB payload, the hypervisor</div><div class='add'>+	 * supports only 4048 bytes payload at present and also</div><div class='add'>+	 * just one address/length entry.</div><div class='add'>+	 *</div><div class='add'>+	 * writev() interface can be added in future when the</div><div class='add'>+	 * hypervisor supports multiple buffer list entries.</div><div class='add'>+	 */</div><div class='add'>+	/* HVPIPE_MAX_WRITE_BUFFER_SIZE = 4048 bytes */</div><div class='add'>+	if ((size &gt; (HVPIPE_HDR_LEN + HVPIPE_MAX_WRITE_BUFFER_SIZE)) ||</div><div class='add'>+		(size &lt;= HVPIPE_HDR_LEN))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The length of (address + length) pair + the length of header</div><div class='add'>+	 */</div><div class='add'>+	len = (2 * sizeof(u64)) + sizeof(u64);</div><div class='add'>+	size -= HVPIPE_HDR_LEN;</div><div class='add'>+	buf += HVPIPE_HDR_LEN;</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_send_hvpipe_msg_lock);</div><div class='add'>+	work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	if (!work_area) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	area_be = (__be64 *)rtas_work_area_raw_buf(work_area);</div><div class='add'>+	/* header */</div><div class='add'>+	area_be[0] = cpu_to_be64(len);</div><div class='add'>+</div><div class='add'>+	work_buf = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	if (!work_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_work;</div><div class='add'>+	}</div><div class='add'>+	/* First buffer address */</div><div class='add'>+	area_be[1] = cpu_to_be64(rtas_work_area_phys(work_buf));</div><div class='add'>+	/* First buffer address length */</div><div class='add'>+	area_be[2] = cpu_to_be64(size);</div><div class='add'>+</div><div class='add'>+	if (!copy_from_user(rtas_work_area_raw_buf(work_buf), buf, size)) {</div><div class='add'>+		ret = rtas_ibm_send_hvpipe_msg(work_area, src_info-&gt;srcID);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = size + HVPIPE_HDR_LEN;</div><div class='add'>+	} else</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_buf);</div><div class='add'>+out_work:</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_send_hvpipe_msg_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_hvpipe_handle_read - If the payload for the specific</div><div class='add'>+ * source is pending in the hypervisor, issue recv HVPIPE RTAS</div><div class='add'>+ * and return the payload to the user space.</div><div class='add'>+ *</div><div class='add'>+ * When the payload is available for the partition, the</div><div class='add'>+ * hypervisor notifies HVPIPE event with the source ID</div><div class='add'>+ * and the event handler wakeup FD(s) that are waiting.</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_hvpipe_handle_read(struct file *file,</div><div class='add'>+		char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct hvpipe_source_info *src_info = file-&gt;private_data;</div><div class='add'>+	struct papr_hvpipe_hdr hdr;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return -ENXIO during migration</div><div class='add'>+	 */</div><div class='add'>+	if (!hvpipe_feature)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (!src_info)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Max payload is 4048 (HVPIPE_MAX_WRITE_BUFFER_SIZE)</div><div class='add'>+	 */</div><div class='add'>+	if ((size &gt; (HVPIPE_HDR_LEN + HVPIPE_MAX_WRITE_BUFFER_SIZE)) ||</div><div class='add'>+		(size &lt; HVPIPE_HDR_LEN))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Payload is not available to receive or source pipe</div><div class='add'>+	 * is not closed.</div><div class='add'>+	 */</div><div class='add'>+	if (!src_info-&gt;hvpipe_status)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	hdr.version = 0;</div><div class='add'>+	hdr.flags = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case if the hvpipe has payload and also the</div><div class='add'>+	 * hypervisor closed the pipe to the source, retrieve</div><div class='add'>+	 * the payload and return to the user space first and</div><div class='add'>+	 * then notify the userspace about the hvpipe close in</div><div class='add'>+	 * next read().</div><div class='add'>+	 */</div><div class='add'>+	if (src_info-&gt;hvpipe_status &amp; HVPIPE_MSG_AVAILABLE)</div><div class='add'>+		hdr.flags = HVPIPE_MSG_AVAILABLE;</div><div class='add'>+	else if (src_info-&gt;hvpipe_status &amp; HVPIPE_LOST_CONNECTION)</div><div class='add'>+		hdr.flags = HVPIPE_LOST_CONNECTION;</div><div class='add'>+	else</div><div class='add'>+		/*</div><div class='add'>+		 * Should not be here without one of the above</div><div class='add'>+		 * flags set</div><div class='add'>+		 */</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ret = copy_to_user(buf, &amp;hdr, HVPIPE_HDR_LEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Message event has payload, so get the payload with</div><div class='add'>+	 * recv HVPIPE RTAS.</div><div class='add'>+	 */</div><div class='add'>+	if (hdr.flags &amp; HVPIPE_MSG_AVAILABLE) {</div><div class='add'>+		ret = hvpipe_rtas_recv_msg(buf + HVPIPE_HDR_LEN,</div><div class='add'>+				size - HVPIPE_HDR_LEN);</div><div class='add'>+		if (ret &gt; 0) {</div><div class='add'>+			src_info-&gt;hvpipe_status &amp;= ~HVPIPE_MSG_AVAILABLE;</div><div class='add'>+			ret += HVPIPE_HDR_LEN;</div><div class='add'>+		}</div><div class='add'>+	} else if (hdr.flags &amp; HVPIPE_LOST_CONNECTION) {</div><div class='add'>+		/*</div><div class='add'>+		 * Hypervisor is closing the pipe for the specific</div><div class='add'>+		 * source. So notify user space.</div><div class='add'>+		 */</div><div class='add'>+		src_info-&gt;hvpipe_status &amp;= ~HVPIPE_LOST_CONNECTION;</div><div class='add'>+		ret = HVPIPE_HDR_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The user space waits for the payload to receive.</div><div class='add'>+ * The hypervisor sends HVPIPE event message to the partition</div><div class='add'>+ * when the payload is available. The event handler wakeup FD</div><div class='add'>+ * depends on the source ID in the message event.</div><div class='add'>+ */</div><div class='add'>+static __poll_t papr_hvpipe_handle_poll(struct file *filp,</div><div class='add'>+		struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_source_info *src_info = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HVPIPE is disabled during SUSPEND and enabled after migration.</div><div class='add'>+	 * So return POLLRDHUP during migration</div><div class='add'>+	 */</div><div class='add'>+	if (!hvpipe_feature)</div><div class='add'>+		return POLLRDHUP;</div><div class='add'>+</div><div class='add'>+	if (!src_info)</div><div class='add'>+		return POLLNVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If hvpipe already has pending payload, return so that</div><div class='add'>+	 * the user space can issue read().</div><div class='add'>+	 */</div><div class='add'>+	if (src_info-&gt;hvpipe_status)</div><div class='add'>+		return POLLIN | POLLRDNORM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for the message event</div><div class='add'>+	 * hvpipe_event_interrupt() wakes up this wait_queue</div><div class='add'>+	 */</div><div class='add'>+	poll_wait(filp, &amp;src_info-&gt;recv_wqh, wait);</div><div class='add'>+	if (src_info-&gt;hvpipe_status)</div><div class='add'>+		return POLLIN | POLLRDNORM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int papr_hvpipe_handle_release(struct inode *inode,</div><div class='add'>+				struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_source_info *src_info;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hold the lock, remove source from src_list, reset the</div><div class='add'>+	 * hvpipe status and release the lock to prevent any race</div><div class='add'>+	 * with message event IRQ.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;hvpipe_src_list_lock);</div><div class='add'>+	src_info = file-&gt;private_data;</div><div class='add'>+	list_del(&amp;src_info-&gt;list);</div><div class='add'>+	file-&gt;private_data = NULL;</div><div class='add'>+	/*</div><div class='add'>+	 * If the pipe for this specific source has any pending</div><div class='add'>+	 * payload, issue recv HVPIPE RTAS so that pipe will not</div><div class='add'>+	 * be blocked.</div><div class='add'>+	 */</div><div class='add'>+	if (src_info-&gt;hvpipe_status &amp; HVPIPE_MSG_AVAILABLE) {</div><div class='add'>+		src_info-&gt;hvpipe_status = 0;</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+		hvpipe_rtas_recv_msg(NULL, 0);</div><div class='add'>+	} else</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+</div><div class='add'>+	kfree(src_info);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_hvpipe_handle_ops = {</div><div class='add'>+	.read		=	papr_hvpipe_handle_read,</div><div class='add'>+	.write		=	papr_hvpipe_handle_write,</div><div class='add'>+	.release	=	papr_hvpipe_handle_release,</div><div class='add'>+	.poll		=	papr_hvpipe_handle_poll,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int papr_hvpipe_dev_create_handle(u32 srcID)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_source_info *src_info;</div><div class='add'>+	struct file *file;</div><div class='add'>+	long err;</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;hvpipe_src_list_lock);</div><div class='add'>+	/*</div><div class='add'>+	 * Do not allow more than one process communicates with</div><div class='add'>+	 * each source.</div><div class='add'>+	 */</div><div class='add'>+	src_info = hvpipe_find_source(srcID);</div><div class='add'>+	if (src_info) {</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+		pr_err("pid(%d) is already using the source(%d)\n",</div><div class='add'>+				src_info-&gt;tsk-&gt;pid, srcID);</div><div class='add'>+		return -EALREADY;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+</div><div class='add'>+	src_info = kzalloc(sizeof(*src_info), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!src_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	src_info-&gt;srcID = srcID;</div><div class='add'>+	src_info-&gt;tsk = current;</div><div class='add'>+	init_waitqueue_head(&amp;src_info-&gt;recv_wqh);</div><div class='add'>+</div><div class='add'>+	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		err = fd;</div><div class='add'>+		goto free_buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file = anon_inode_getfile("[papr-hvpipe]",</div><div class='add'>+			&amp;papr_hvpipe_handle_ops, (void *)src_info,</div><div class='add'>+			O_RDWR);</div><div class='add'>+	if (IS_ERR(file)) {</div><div class='add'>+		err = PTR_ERR(file);</div><div class='add'>+		goto free_fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;hvpipe_src_list_lock);</div><div class='add'>+	/*</div><div class='add'>+	 * If two processes are executing ioctl() for the same</div><div class='add'>+	 * source ID concurrently, prevent the second process to</div><div class='add'>+	 * acquire FD.</div><div class='add'>+	 */</div><div class='add'>+	if (hvpipe_find_source(srcID)) {</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+		err = -EALREADY;</div><div class='add'>+		goto free_file;</div><div class='add'>+	}</div><div class='add'>+	list_add(&amp;src_info-&gt;list, &amp;hvpipe_src_list);</div><div class='add'>+	spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+</div><div class='add'>+	fd_install(fd, file);</div><div class='add'>+	return fd;</div><div class='add'>+</div><div class='add'>+free_file:</div><div class='add'>+	fput(file);</div><div class='add'>+free_fd:</div><div class='add'>+	put_unused_fd(fd);</div><div class='add'>+free_buf:</div><div class='add'>+	kfree(src_info);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr_hvpipe</div><div class='add'>+ *</div><div class='add'>+ * Use separate FD for each source (exa :HMC). So ioctl is called</div><div class='add'>+ * with source ID which returns FD.</div><div class='add'>+ */</div><div class='add'>+static long papr_hvpipe_dev_ioctl(struct file *filp, unsigned int ioctl,</div><div class='add'>+		unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	u32 __user *argp = (void __user *)arg;</div><div class='add'>+	u32 srcID;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return -ENXIO during migration</div><div class='add'>+	 */</div><div class='add'>+	if (!hvpipe_feature)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (get_user(srcID, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Support only HMC source right now</div><div class='add'>+	 */</div><div class='add'>+	if (!(srcID &amp; HVPIPE_HMC_ID_MASK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_HVPIPE_IOC_CREATE_HANDLE:</div><div class='add'>+		ret = papr_hvpipe_dev_create_handle(srcID);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_hvpipe_work_fn - called to issue recv HVPIPE RTAS for</div><div class='add'>+ * sources that are not monitored by user space so that pipe</div><div class='add'>+ * will not be blocked.</div><div class='add'>+ */</div><div class='add'>+static void papr_hvpipe_work_fn(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	hvpipe_rtas_recv_msg(NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * HVPIPE event message IRQ handler.</div><div class='add'>+ * The hypervisor sends event IRQ if the partition has payload</div><div class='add'>+ * and generates another event only after payload is read with</div><div class='add'>+ * recv HVPIPE RTAS.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t hvpipe_event_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct hvpipe_event_buf *hvpipe_event;</div><div class='add'>+	struct pseries_errorlog *pseries_log;</div><div class='add'>+	struct hvpipe_source_info *src_info;</div><div class='add'>+	struct rtas_error_log *elog;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = rtas_call(hvpipe_check_exception_token, 6, 1, NULL,</div><div class='add'>+		RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq),</div><div class='add'>+		RTAS_HVPIPE_MSG_EVENTS, 1, __pa(&amp;hvpipe_ras_buf),</div><div class='add'>+		rtas_get_error_log_max());</div><div class='add'>+</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		pr_err_ratelimited("unexpected hvpipe-event-notification failed %d\n", rc);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	elog = (struct rtas_error_log *)hvpipe_ras_buf;</div><div class='add'>+	if (unlikely(rtas_error_type(elog) != RTAS_TYPE_HVPIPE)) {</div><div class='add'>+		pr_warn_ratelimited("Unexpected event type %d\n",</div><div class='add'>+				rtas_error_type(elog));</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pseries_log = get_pseries_errorlog(elog,</div><div class='add'>+				PSERIES_ELOG_SECT_ID_HVPIPE_EVENT);</div><div class='add'>+	hvpipe_event = (struct hvpipe_event_buf *)pseries_log-&gt;data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The hypervisor notifies partition when the payload is</div><div class='add'>+	 * available to read with recv HVPIPE RTAS and it will not</div><div class='add'>+	 * notify another event for any source until the previous</div><div class='add'>+	 * payload is read. Means the pipe is blocked in the</div><div class='add'>+	 * hypervisor until the payload is read.</div><div class='add'>+	 *</div><div class='add'>+	 * If the source is ready to accept payload and wakeup the</div><div class='add'>+	 * corresponding FD. Hold lock and update hvpipe_status</div><div class='add'>+	 * and this lock is needed in case the user space process</div><div class='add'>+	 * is in release FD instead of poll() so that release()</div><div class='add'>+	 * reads the payload to unblock pipe before closing FD.</div><div class='add'>+	 *</div><div class='add'>+	 * otherwise (means no other user process waiting for the</div><div class='add'>+	 * payload, issue recv HVPIPE RTAS (papr_hvpipe_work_fn())</div><div class='add'>+	 * to unblock pipe.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;hvpipe_src_list_lock);</div><div class='add'>+	src_info = hvpipe_find_source(be32_to_cpu(hvpipe_event-&gt;srcID));</div><div class='add'>+	if (src_info) {</div><div class='add'>+		u32 flags = 0;</div><div class='add'>+</div><div class='add'>+		if (hvpipe_event-&gt;event_type &amp; HVPIPE_LOST_CONNECTION)</div><div class='add'>+			flags = HVPIPE_LOST_CONNECTION;</div><div class='add'>+		else if (hvpipe_event-&gt;event_type &amp; HVPIPE_MSG_AVAILABLE)</div><div class='add'>+			flags = HVPIPE_MSG_AVAILABLE;</div><div class='add'>+</div><div class='add'>+		src_info-&gt;hvpipe_status |= flags;</div><div class='add'>+		wake_up(&amp;src_info-&gt;recv_wqh);</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+	} else {</div><div class='add'>+		spin_unlock(&amp;hvpipe_src_list_lock);</div><div class='add'>+		/*</div><div class='add'>+		 * user space is not waiting on this source. So</div><div class='add'>+		 * execute receive pipe RTAS so that pipe will not</div><div class='add'>+		 * be blocked.</div><div class='add'>+		 */</div><div class='add'>+		if (hvpipe_event-&gt;event_type &amp; HVPIPE_MSG_AVAILABLE)</div><div class='add'>+			queue_work(papr_hvpipe_wq, papr_hvpipe_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Enable hvpipe by system parameter set with parameter</div><div class='add'>+ * token = 64 and with 1 byte buffer data:</div><div class='add'>+ * 0 = hvpipe not in use/disable</div><div class='add'>+ * 1 = hvpipe in use/enable</div><div class='add'>+ */</div><div class='add'>+static int set_hvpipe_sys_param(u8 val)</div><div class='add'>+{</div><div class='add'>+	struct papr_sysparm_buf *buf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	buf = papr_sysparm_buf_alloc();</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf-&gt;len = cpu_to_be16(1);</div><div class='add'>+	buf-&gt;val[0] = val;</div><div class='add'>+	ret = papr_sysparm_set(PAPR_SYSPARM_HVPIPE_ENABLE, buf);</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_err("Can not enable hvpipe %d\n", ret);</div><div class='add'>+</div><div class='add'>+	papr_sysparm_buf_free(buf);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init enable_hvpipe_IRQ(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+</div><div class='add'>+	hvpipe_check_exception_token = rtas_function_token(RTAS_FN_CHECK_EXCEPTION);</div><div class='add'>+	if (hvpipe_check_exception_token  == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* hvpipe events */</div><div class='add'>+	np = of_find_node_by_path("/event-sources/ibm,hvpipe-msg-events");</div><div class='add'>+	if (np != NULL) {</div><div class='add'>+		request_event_sources_irqs(np, hvpipe_event_interrupt,</div><div class='add'>+					"HPIPE_EVENT");</div><div class='add'>+		of_node_put(np);</div><div class='add'>+	} else {</div><div class='add'>+		pr_err("Can not enable hvpipe event IRQ\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hvpipe_migration_handler(int action)</div><div class='add'>+{</div><div class='add'>+	pr_info("hvpipe migration event %d\n", action);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HVPIPE is not used (Failed to create /dev/papr-hvpipe).</div><div class='add'>+	 * So nothing to do for migration.</div><div class='add'>+	 */</div><div class='add'>+	if (!papr_hvpipe_work)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (action) {</div><div class='add'>+	case HVPIPE_SUSPEND:</div><div class='add'>+		if (hvpipe_feature) {</div><div class='add'>+			/*</div><div class='add'>+			 * Disable hvpipe_feature to the user space.</div><div class='add'>+			 * It will be enabled with RESUME event.</div><div class='add'>+			 */</div><div class='add'>+			hvpipe_feature = false;</div><div class='add'>+			/*</div><div class='add'>+			 * set system parameter hvpipe 'disable'</div><div class='add'>+			 */</div><div class='add'>+			set_hvpipe_sys_param(0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case HVPIPE_RESUME:</div><div class='add'>+		/*</div><div class='add'>+		 * set system parameter hvpipe 'enable'</div><div class='add'>+		 */</div><div class='add'>+		if (!set_hvpipe_sys_param(1))</div><div class='add'>+			hvpipe_feature = true;</div><div class='add'>+		else</div><div class='add'>+			pr_err("hvpipe is not enabled after migration\n");</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_hvpipe_ops = {</div><div class='add'>+	.unlocked_ioctl	=	papr_hvpipe_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_hvpipe_dev = {</div><div class='add'>+	.minor	=	MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name	=	"papr-hvpipe",</div><div class='add'>+	.fops	=	&amp;papr_hvpipe_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init papr_hvpipe_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!of_find_property(rtas.dev, "ibm,hypervisor-pipe-capable",</div><div class='add'>+		NULL))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_SEND_HVPIPE_MSG) ||</div><div class='add'>+		!rtas_function_implemented(RTAS_FN_IBM_RECEIVE_HVPIPE_MSG))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	papr_hvpipe_work = kzalloc(sizeof(struct work_struct), GFP_ATOMIC);</div><div class='add'>+	if (!papr_hvpipe_work)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(papr_hvpipe_work, papr_hvpipe_work_fn);</div><div class='add'>+</div><div class='add'>+	papr_hvpipe_wq = alloc_ordered_workqueue("papr hvpipe workqueue", 0);</div><div class='add'>+	if (!papr_hvpipe_wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = enable_hvpipe_IRQ();</div><div class='add'>+	if (!ret) {</div><div class='add'>+		ret = set_hvpipe_sys_param(1);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = misc_register(&amp;papr_hvpipe_dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		pr_info("hvpipe feature is enabled\n");</div><div class='add'>+		hvpipe_feature = true;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_err("hvpipe feature is not enabled %d\n", ret);</div><div class='add'>+	destroy_workqueue(papr_hvpipe_wq);</div><div class='add'>+out:</div><div class='add'>+	kfree(papr_hvpipe_work);</div><div class='add'>+	papr_hvpipe_work = NULL;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_hvpipe_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-hvpipe.h b/arch/powerpc/platforms/pseries/papr-hvpipe.h<br/>new file mode 100644<br/>index 000000000000..c343f4230865<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-hvpipe.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-hvpipe.h</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+#ifndef _PAPR_HVPIPE_H</div><div class='add'>+#define _PAPR_HVPIPE_H</div><div class='add'>+</div><div class='add'>+#define	HVPIPE_HMC_ID_MASK	0x02000000 /*02-HMC,00-reserved and HMC ID */</div><div class='add'>+#define	HVPIPE_MAX_WRITE_BUFFER_SIZE	4048</div><div class='add'>+/*</div><div class='add'>+ * hvpipe specific RTAS return values</div><div class='add'>+ */</div><div class='add'>+#define	RTAS_HVPIPE_CLOSED		-4</div><div class='add'>+</div><div class='add'>+#define	HVPIPE_HDR_LEN	sizeof(struct papr_hvpipe_hdr)</div><div class='add'>+</div><div class='add'>+enum hvpipe_migrate_action {</div><div class='add'>+	HVPIPE_SUSPEND,</div><div class='add'>+	HVPIPE_RESUME,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hvpipe_source_info {</div><div class='add'>+	struct list_head list;	/* list of sources */</div><div class='add'>+	u32 srcID;</div><div class='add'>+	u32 hvpipe_status;</div><div class='add'>+	wait_queue_head_t recv_wqh;	 /* wake up poll() waitq */</div><div class='add'>+	struct task_struct *tsk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Source ID Format 0xCCRRQQQQ</div><div class='add'>+ * CC = indicating value is source type (ex: 0x02 for HMC)</div><div class='add'>+ * RR = 0x00 (reserved)</div><div class='add'>+ * QQQQ = 0x0000 – 0xFFFF indicating the source index indetifier</div><div class='add'>+ */</div><div class='add'>+struct hvpipe_event_buf {</div><div class='add'>+	__be32	srcID;		/* Source ID */</div><div class='add'>+	u8	event_type;	/* 0x01 for hvpipe message available */</div><div class='add'>+				/* from specified src ID */</div><div class='add'>+				/* 0x02 for loss of pipe connection */</div><div class='add'>+				/* with specified src ID */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hvpipe_migration_handler(int action);</div><div class='add'>+#endif /* _PAPR_HVPIPE_H */</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-indices.c b/arch/powerpc/platforms/pseries/papr-indices.c<br/>new file mode 100644<br/>index 000000000000..3c7545591c45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-indices.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-indices.c</a></div><div class='hunk'>@@ -0,0 +1,488 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-indices: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_helpers.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-indices.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function-specific return values for ibm,set-dynamic-indicator and</div><div class='add'>+ * ibm,get-dynamic-sensor-state RTAS calls.</div><div class='add'>+ * PAPR+ v2.13 7.3.18 and 7.3.19.</div><div class='add'>+ */</div><div class='add'>+#define RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR	-3</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtas_get_indices_params - Parameters (in and out) for</div><div class='add'>+ *                                      ibm,get-indices.</div><div class='add'>+ * @is_sensor:	In: Caller-provided whether sensor or indicator.</div><div class='add'>+ * @indice_type:In: Caller-provided indice (sensor or indicator) token</div><div class='add'>+ * @work_area:	In: Caller-provided work area buffer for results.</div><div class='add'>+ * @next:	In: Sequence number. Out: Next sequence number.</div><div class='add'>+ * @status:	Out: RTAS call status.</div><div class='add'>+ */</div><div class='add'>+struct rtas_get_indices_params {</div><div class='add'>+	u8 is_sensor;</div><div class='add'>+	u32 indice_type;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 next;</div><div class='add'>+	s32 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * rtas_ibm_get_indices() - Call ibm,get-indices to fill a work area buffer.</div><div class='add'>+ * @params: See &amp;struct rtas_ibm_get_indices_params.</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,get-indices until it errors or successfully deposits data</div><div class='add'>+ * into the supplied work area. Handles RTAS retry statuses. Maps RTAS</div><div class='add'>+ * error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * The caller is expected to invoke rtas_ibm_get_indices() multiple times</div><div class='add'>+ * to retrieve all indices data for the provided indice type. Only one</div><div class='add'>+ * sequence should be in progress at any time; starting a new sequence</div><div class='add'>+ * will disrupt any sequence already in progress. Serialization of</div><div class='add'>+ * indices retrieval sequences is the responsibility of the caller.</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_get_indices(struct rtas_get_indices_params *params)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area = params-&gt;work_area;</div><div class='add'>+	const s32 token = rtas_function_token(RTAS_FN_IBM_GET_INDICES);</div><div class='add'>+	u32 rets;</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 5, 2, &amp;rets, params-&gt;is_sensor,</div><div class='add'>+				params-&gt;indice_type,</div><div class='add'>+				rtas_work_area_phys(work_area),</div><div class='add'>+				rtas_work_area_size(work_area),</div><div class='add'>+				params-&gt;next);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER: /* Indicator type is not supported */</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_START_OVER:</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		pr_info_ratelimited("Indices changed during retrieval, retrying\n");</div><div class='add'>+		params-&gt;next = 1;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		params-&gt;next = rets;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		params-&gt;next = 0;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,get-indices status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal indices sequence APIs. A sequence is a series of calls to</div><div class='add'>+ * ibm,get-indices for a given location code. The sequence ends when</div><div class='add'>+ * an error is encountered or all indices for the input has been</div><div class='add'>+ * returned.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * indices_sequence_begin() - Begin a indices retrieval sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ */</div><div class='add'>+static void indices_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params  *param;</div><div class='add'>+</div><div class='add'>+	param = (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	/*</div><div class='add'>+	 * We could allocate the work area before acquiring the</div><div class='add'>+	 * function lock, but that would allow concurrent requests to</div><div class='add'>+	 * exhaust the limited work area pool for no benefit. So</div><div class='add'>+	 * allocate the work area under the lock.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+	param-&gt;work_area = rtas_work_area_alloc(RTAS_GET_INDICES_BUF_SIZE);</div><div class='add'>+	param-&gt;next = 1;</div><div class='add'>+	param-&gt;status = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * indices_sequence_end() - Finalize a indices retrieval sequence.</div><div class='add'>+ *</div><div class='add'>+ * Releases resources obtained by indices_sequence_begin().</div><div class='add'>+ */</div><div class='add'>+static void indices_sequence_end(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params *param;</div><div class='add'>+</div><div class='add'>+	param =  (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(param-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Work function to be passed to papr_rtas_blob_generate().</div><div class='add'>+ *</div><div class='add'>+ * ibm,get-indices RTAS call fills the work area with the certain</div><div class='add'>+ * format but does not return the bytes written in the buffer. So</div><div class='add'>+ * instead of kernel parsing this work area to determine the buffer</div><div class='add'>+ * length, copy the complete work area (RTAS_GET_INDICES_BUF_SIZE)</div><div class='add'>+ * to the blob and let the user space to obtain the data.</div><div class='add'>+ * Means RTAS_GET_INDICES_BUF_SIZE data will be returned for each</div><div class='add'>+ * read().</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static const char *indices_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params *p;</div><div class='add'>+	bool init_state;</div><div class='add'>+</div><div class='add'>+	p = (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;next == 1) ? true : false;</div><div class='add'>+</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='add'>+		return NULL;</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_ibm_get_indices(p)))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*len = RTAS_GET_INDICES_BUF_SIZE;</div><div class='add'>+	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_indices_handle_read - returns indices blob data to the user space</div><div class='add'>+ *</div><div class='add'>+ * ibm,get-indices RTAS call fills the work area with the certian</div><div class='add'>+ * format but does not return the bytes written in the buffer and</div><div class='add'>+ * copied RTAS_GET_INDICES_BUF_SIZE data to the blob for each RTAS</div><div class='add'>+ * call. So send RTAS_GET_INDICES_BUF_SIZE buffer to the user space</div><div class='add'>+ * for each read().</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_indices_handle_read(struct file *file,</div><div class='add'>+		char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/* we should not instantiate a handle without any data attached. */</div><div class='add'>+	if (!papr_rtas_blob_has_data(blob)) {</div><div class='add'>+		pr_err_once("handle without data\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; RTAS_GET_INDICES_BUF_SIZE) {</div><div class='add'>+		pr_err_once("Invalid buffer length %ld, expect %d\n",</div><div class='add'>+				size, RTAS_GET_INDICES_BUF_SIZE);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (size &gt; RTAS_GET_INDICES_BUF_SIZE)</div><div class='add'>+		size = RTAS_GET_INDICES_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_indices_handle_ops = {</div><div class='add'>+	.read = papr_indices_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_indices_create_handle() - Create a fd-based handle for reading</div><div class='add'>+ *                                indices data</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as whether sensor or indicator</div><div class='add'>+ *        and indice type in user memory</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_INDICES_IOC_GET ioctl command. Validates @ubuf</div><div class='add'>+ * and instantiates an immutable indices "blob" for it. The blob is</div><div class='add'>+ * attached to a file descriptor for reading by user space. The memory</div><div class='add'>+ * backing the blob is freed when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * The entire requested indices is retrieved by this call and all</div><div class='add'>+ * necessary RTAS interactions are performed before returning the fd</div><div class='add'>+ * to user space. This keeps the read handler simple and ensures that</div><div class='add'>+ * the kernel can prevent interleaving of ibm,get-indices call sequences.</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_indices_create_handle(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='add'>+	struct rtas_get_indices_params params = {};</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	if (get_user(params.is_sensor, &amp;ubuf-&gt;indices.is_sensor))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (get_user(params.indice_type, &amp;ubuf-&gt;indices.indice_type))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = indices_sequence_begin,</div><div class='add'>+		.end = indices_sequence_end,</div><div class='add'>+		.work = indices_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	seq.params = &amp;params;</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq,</div><div class='add'>+			&amp;papr_indices_handle_ops, "[papr-indices]");</div><div class='add'>+</div><div class='add'>+	return fd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Create work area with the input parameters. This function is used</div><div class='add'>+ * for both ibm,set-dynamic-indicator and ibm,get-dynamic-sensor-state</div><div class='add'>+ * RTAS Calls.</div><div class='add'>+ */</div><div class='add'>+static struct rtas_work_area *</div><div class='add'>+papr_dynamic_indice_buf_from_user(struct papr_indices_io_block __user *ubuf,</div><div class='add'>+				struct papr_indices_io_block *kbuf)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 length;</div><div class='add'>+	__be32 len_be;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(kbuf, ubuf, sizeof(*kbuf)))</div><div class='add'>+		return ERR_PTR(-EFAULT);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!string_is_terminated(kbuf-&gt;dynamic_param.location_code_str,</div><div class='add'>+			ARRAY_SIZE(kbuf-&gt;dynamic_param.location_code_str)))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The input data in the work area should be as follows:</div><div class='add'>+	 * - 32-bit integer length of the location code string,</div><div class='add'>+	 *   including NULL.</div><div class='add'>+	 * - Location code string, NULL terminated, identifying the</div><div class='add'>+	 *   token (sensor or indicator).</div><div class='add'>+	 * PAPR 2.13 - R1–7.3.18–5 ibm,set-dynamic-indicator</div><div class='add'>+	 *           - R1–7.3.19–5 ibm,get-dynamic-sensor-state</div><div class='add'>+	 */</div><div class='add'>+	/*</div><div class='add'>+	 * Length that user space passed should also include NULL</div><div class='add'>+	 * terminator.</div><div class='add'>+	 */</div><div class='add'>+	length = strlen(kbuf-&gt;dynamic_param.location_code_str) + 1;</div><div class='add'>+	if (length &gt; LOC_CODE_SIZE)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	len_be = cpu_to_be32(length);</div><div class='add'>+</div><div class='add'>+	work_area = rtas_work_area_alloc(LOC_CODE_SIZE + sizeof(u32));</div><div class='add'>+	memcpy(rtas_work_area_raw_buf(work_area), &amp;len_be, sizeof(u32));</div><div class='add'>+	memcpy((rtas_work_area_raw_buf(work_area) + sizeof(u32)),</div><div class='add'>+			&amp;kbuf-&gt;dynamic_param.location_code_str, length);</div><div class='add'>+</div><div class='add'>+	return work_area;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_dynamic_indicator_ioc_set - ibm,set-dynamic-indicator RTAS Call</div><div class='add'>+ * PAPR 2.13 7.3.18</div><div class='add'>+ *</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as indicator token and</div><div class='add'>+ *        new state.</div><div class='add'>+ *</div><div class='add'>+ * Returns success or -errno.</div><div class='add'>+ */</div><div class='add'>+static long papr_dynamic_indicator_ioc_set(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_indices_io_block kbuf;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token, ret;</div><div class='add'>+</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_SET_DYNAMIC_INDICATOR);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+	work_area = papr_dynamic_indice_buf_from_user(ubuf, &amp;kbuf);</div><div class='add'>+	if (IS_ERR(work_area)) {</div><div class='add'>+		ret = PTR_ERR(work_area);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 3, 1, NULL,</div><div class='add'>+				kbuf.dynamic_param.token,</div><div class='add'>+				kbuf.dynamic_param.state,</div><div class='add'>+				rtas_work_area_phys(work_area));</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR:	/* No such indicator */</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("unexpected ibm,set-dynamic-indicator result %d\n",</div><div class='add'>+			fwrc);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:	/* Hardware/platform error */</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_dynamic_sensor_ioc_get - ibm,get-dynamic-sensor-state RTAS Call</div><div class='add'>+ * PAPR 2.13 7.3.19</div><div class='add'>+ *</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as sensor token</div><div class='add'>+ *        Copies the state in user space buffer.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * Returns success or -errno.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static long papr_dynamic_sensor_ioc_get(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_indices_io_block kbuf;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token, ret;</div><div class='add'>+	u32 rets;</div><div class='add'>+</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_GET_DYNAMIC_SENSOR_STATE);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='add'>+	work_area = papr_dynamic_indice_buf_from_user(ubuf, &amp;kbuf);</div><div class='add'>+	if (IS_ERR(work_area)) {</div><div class='add'>+		ret = PTR_ERR(work_area);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 2, 2, &amp;rets,</div><div class='add'>+				kbuf.dynamic_param.token,</div><div class='add'>+				rtas_work_area_phys(work_area));</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		if (put_user(rets, &amp;ubuf-&gt;dynamic_param.state))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+		else</div><div class='add'>+			ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR:	/* No such indicator */</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("unexpected ibm,get-dynamic-sensor result %d\n",</div><div class='add'>+				fwrc);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:	/* Hardware/platform error */</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-indices.</div><div class='add'>+ */</div><div class='add'>+static long papr_indices_dev_ioctl(struct file *filp, unsigned int ioctl,</div><div class='add'>+				unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	void __user *argp = (__force void __user *)arg;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_INDICES_IOC_GET:</div><div class='add'>+		ret = papr_indices_create_handle(argp);</div><div class='add'>+		break;</div><div class='add'>+	case PAPR_DYNAMIC_SENSOR_IOC_GET:</div><div class='add'>+		ret = papr_dynamic_sensor_ioc_get(argp);</div><div class='add'>+		break;</div><div class='add'>+	case PAPR_DYNAMIC_INDICATOR_IOC_SET:</div><div class='add'>+		if (filp-&gt;f_mode &amp; FMODE_WRITE)</div><div class='add'>+			ret = papr_dynamic_indicator_ioc_set(argp);</div><div class='add'>+		else</div><div class='add'>+			ret = -EBADF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_indices_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_indices_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_indices_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-indices",</div><div class='add'>+	.fops = &amp;papr_indices_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_indices_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_GET_INDICES))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_SET_DYNAMIC_INDICATOR))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_GET_DYNAMIC_SENSOR_STATE))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_indices_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_indices_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-phy-attest.c b/arch/powerpc/platforms/pseries/papr-phy-attest.c<br/>new file mode 100644<br/>index 000000000000..1907f2411567<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-phy-attest.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-phy-attest.c</a></div><div class='hunk'>@@ -0,0 +1,288 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-phy-attest: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_helpers.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-physical-attestation.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtas_phy_attest_params - Parameters (in and out) for</div><div class='add'>+ * ibm,physical-attestation.</div><div class='add'>+ *</div><div class='add'>+ * @cmd:  In: Caller-provided attestation command buffer. Must be</div><div class='add'>+ *        RTAS-addressable.</div><div class='add'>+ * @work_area: In: Caller-provided work area buffer for attestation</div><div class='add'>+ *             command structure</div><div class='add'>+ *             Out: Caller-provided work area buffer for the response</div><div class='add'>+ * @cmd_len:   In: Caller-provided attestation command structure</div><div class='add'>+ *             length</div><div class='add'>+ * @sequence:  In: Sequence number. Out: Next sequence number.</div><div class='add'>+ * @written:   Out: Bytes written by ibm,physical-attestation to</div><div class='add'>+ *             @work_area.</div><div class='add'>+ * @status:    Out: RTAS call status.</div><div class='add'>+ */</div><div class='add'>+struct rtas_phy_attest_params {</div><div class='add'>+	struct papr_phy_attest_io_block cmd;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 cmd_len;</div><div class='add'>+	u32 sequence;</div><div class='add'>+	u32 written;</div><div class='add'>+	s32 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtas_physical_attestation() - Call ibm,physical-attestation to</div><div class='add'>+ * fill a work area buffer.</div><div class='add'>+ * @params: See &amp;struct rtas_phy_attest_params.</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,physical-attestation until it errors or successfully</div><div class='add'>+ * deposits data into the supplied work area. Handles RTAS retry</div><div class='add'>+ * statuses. Maps RTAS error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * The caller is expected to invoke rtas_physical_attestation()</div><div class='add'>+ * multiple times to retrieve all the data for the provided</div><div class='add'>+ * attestation command. Only one sequence should be in progress at</div><div class='add'>+ * any time; starting a new sequence will disrupt any sequence</div><div class='add'>+ * already in progress. Serialization of attestation retrieval</div><div class='add'>+ * sequences is the responsibility of the caller.</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int rtas_physical_attestation(struct rtas_phy_attest_params *params)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token;</div><div class='add'>+	u32 rets[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	work_area = params-&gt;work_area;</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_PHYSICAL_ATTESTATION);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 3, 3, rets,</div><div class='add'>+				 rtas_work_area_phys(work_area),</div><div class='add'>+				 params-&gt;cmd_len,</div><div class='add'>+				 params-&gt;sequence);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		params-&gt;sequence = rets[0];</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		params-&gt;written = rets[1];</div><div class='add'>+		/*</div><div class='add'>+		 * Kernel or firmware bug, do not continue.</div><div class='add'>+		 */</div><div class='add'>+		if (WARN(params-&gt;written &gt; rtas_work_area_size(work_area),</div><div class='add'>+			 "possible write beyond end of work area"))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+		else</div><div class='add'>+			ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,get-phy_attest status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal physical-attestation sequence APIs. A physical-attestation</div><div class='add'>+ * sequence is a series of calls to get ibm,physical-attestation</div><div class='add'>+ * for a given attestation command. The sequence ends when an error</div><div class='add'>+ * is encountered or all data for the attestation command has been</div><div class='add'>+ * returned.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_attest_sequence_begin() - Begin a response data for attestation</div><div class='add'>+ * command retrieval sequence.</div><div class='add'>+ * @seq: user specified parameters for RTAS call from seq struct.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ */</div><div class='add'>+static void phy_attest_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *param;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We could allocate the work area before acquiring the</div><div class='add'>+	 * function lock, but that would allow concurrent requests to</div><div class='add'>+	 * exhaust the limited work area pool for no benefit. So</div><div class='add'>+	 * allocate the work area under the lock.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+	param =  (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	param-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	memcpy(rtas_work_area_raw_buf(param-&gt;work_area), &amp;param-&gt;cmd,</div><div class='add'>+			param-&gt;cmd_len);</div><div class='add'>+	param-&gt;sequence = 1;</div><div class='add'>+	param-&gt;status = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_attest_sequence_end() - Finalize a attestation command</div><div class='add'>+ * response retrieval sequence.</div><div class='add'>+ * @seq: Sequence state.</div><div class='add'>+ *</div><div class='add'>+ * Releases resources obtained by phy_attest_sequence_begin().</div><div class='add'>+ */</div><div class='add'>+static void phy_attest_sequence_end(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *param;</div><div class='add'>+</div><div class='add'>+	param =  (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(param-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+	kfree(param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Generator function to be passed to papr_rtas_blob_generate().</div><div class='add'>+ */</div><div class='add'>+static const char *phy_attest_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *p;</div><div class='add'>+	bool init_state;</div><div class='add'>+</div><div class='add'>+	p = (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;written == 0) ? true : false;</div><div class='add'>+</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='add'>+		return NULL;</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_physical_attestation(p)))</div><div class='add'>+		return NULL;</div><div class='add'>+	*len = p-&gt;written;</div><div class='add'>+	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_phy_attest_handle_ops = {</div><div class='add'>+	.read = papr_rtas_common_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_phy_attest_create_handle() - Create a fd-based handle for</div><div class='add'>+ * reading the response for the given attestation command.</div><div class='add'>+ * @ulc: Attestation command in user memory; defines the scope of</div><div class='add'>+ *       data for the attestation command to retrieve.</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_PHYSICAL_ATTESTATION_IOC_CREATE_HANDLE ioctl</div><div class='add'>+ * command. Validates @ulc and instantiates an immutable response</div><div class='add'>+ * "blob" for attestation command. The blob is attached to a file</div><div class='add'>+ * descriptor for reading by user space. The memory backing the blob</div><div class='add'>+ * is freed when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * The entire requested response buffer for the attestation command</div><div class='add'>+ * retrieved by this call and all necessary RTAS interactions are</div><div class='add'>+ * performed before returning the fd to user space. This keeps the</div><div class='add'>+ * read handler simple and ensures that kernel can prevent</div><div class='add'>+ * interleaving ibm,physical-attestation call sequences.</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_phy_attest_create_handle(struct papr_phy_attest_io_block __user *ulc)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *params;</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Freed in phy_attest_sequence_end().</div><div class='add'>+	 */</div><div class='add'>+	params =  kzalloc(sizeof(*params), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!params)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;params-&gt;cmd, ulc,</div><div class='add'>+			sizeof(struct papr_phy_attest_io_block)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	params-&gt;cmd_len = be32_to_cpu(params-&gt;cmd.length);</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = phy_attest_sequence_begin,</div><div class='add'>+		.end = phy_attest_sequence_end,</div><div class='add'>+		.work = phy_attest_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	seq.params = (void *)params;</div><div class='add'>+</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq,</div><div class='add'>+			&amp;papr_phy_attest_handle_ops,</div><div class='add'>+			"[papr-physical-attestation]");</div><div class='add'>+</div><div class='add'>+	return fd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-physical-attestation.</div><div class='add'>+ */</div><div class='add'>+static long papr_phy_attest_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	void __user *argp = (__force void __user *)arg;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_PHY_ATTEST_IOC_HANDLE:</div><div class='add'>+		ret = papr_phy_attest_create_handle(argp);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_phy_attest_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_phy_attest_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_phy_attest_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-physical-attestation",</div><div class='add'>+	.fops = &amp;papr_phy_attest_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_phy_attest_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_PHYSICAL_ATTESTATION))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_phy_attest_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_phy_attest_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-platform-dump.c b/arch/powerpc/platforms/pseries/papr-platform-dump.c<br/>new file mode 100644<br/>index 000000000000..f8d55eccdb6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-platform-dump.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-platform-dump.c</a></div><div class='hunk'>@@ -0,0 +1,411 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-platform-dump: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-platform-dump.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function-specific return values for ibm,platform-dump, derived from</div><div class='add'>+ * PAPR+ v2.13 7.3.3.4.1 "ibm,platform-dump RTAS Call".</div><div class='add'>+ */</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_COMPLETE	0	/* Complete dump retrieved. */</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_CONTINUE	1	/* Continue dump */</div><div class='add'>+#define	RTAS_NOT_AUTHORIZED		-9002	/* Not Authorized */</div><div class='add'>+</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_START	2 /* Linux status to start dump */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ibm_platform_dump_params - Parameters (in and out) for</div><div class='add'>+ *                                              ibm,platform-dump</div><div class='add'>+ * @work_area:		In: work area buffer for results.</div><div class='add'>+ * @buf_length:		In: work area buffer length in bytes</div><div class='add'>+ * @dump_tag_hi:	In: Most-significant 32 bits of a Dump_Tag representing</div><div class='add'>+ *                      an id of the dump being processed.</div><div class='add'>+ * @dump_tag_lo:	In: Least-significant 32 bits of a Dump_Tag representing</div><div class='add'>+ *                      an id of the dump being processed.</div><div class='add'>+ * @sequence_hi:	In: Sequence number in most-significant 32 bits.</div><div class='add'>+ *                      Out: Next sequence number in most-significant 32 bits.</div><div class='add'>+ * @sequence_lo:	In: Sequence number in Least-significant 32 bits</div><div class='add'>+ *                      Out: Next sequence number in Least-significant 32 bits.</div><div class='add'>+ * @bytes_ret_hi:	Out: Bytes written in most-significant 32 bits.</div><div class='add'>+ * @bytes_ret_lo:	Out: Bytes written in Least-significant 32 bits.</div><div class='add'>+ * @status:		Out: RTAS call status.</div><div class='add'>+ * @list:		Maintain the list of dumps are in progress. Can</div><div class='add'>+ *                      retrieve multiple dumps with different dump IDs at</div><div class='add'>+ *                      the same time but not with the same dump ID. This list</div><div class='add'>+ *                      is used to determine whether the dump for the same ID</div><div class='add'>+ *                      is in progress.</div><div class='add'>+ */</div><div class='add'>+struct ibm_platform_dump_params {</div><div class='add'>+	struct rtas_work_area	*work_area;</div><div class='add'>+	u32			buf_length;</div><div class='add'>+	u32			dump_tag_hi;</div><div class='add'>+	u32			dump_tag_lo;</div><div class='add'>+	u32			sequence_hi;</div><div class='add'>+	u32			sequence_lo;</div><div class='add'>+	u32			bytes_ret_hi;</div><div class='add'>+	u32			bytes_ret_lo;</div><div class='add'>+	s32			status;</div><div class='add'>+	struct list_head	list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Multiple dumps with different dump IDs can be retrieved at the same</div><div class='add'>+ * time, but not with dame dump ID. platform_dump_list_mutex and</div><div class='add'>+ * platform_dump_list are used to prevent this behavior.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(platform_dump_list_mutex);</div><div class='add'>+static LIST_HEAD(platform_dump_list);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtas_ibm_platform_dump() - Call ibm,platform-dump to fill a work area</div><div class='add'>+ * buffer.</div><div class='add'>+ * @params: See &amp;struct ibm_platform_dump_params.</div><div class='add'>+ * @buf_addr: Address of dump buffer (work_area)</div><div class='add'>+ * @buf_length: Length of the buffer in bytes (min. 1024)</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,platform-dump until it errors or successfully deposits data</div><div class='add'>+ * into the supplied work area. Handles RTAS retry statuses. Maps RTAS</div><div class='add'>+ * error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * Can request multiple dumps with different dump IDs at the same time,</div><div class='add'>+ * but not with the same dump ID which is prevented with the check in</div><div class='add'>+ * the ioctl code (papr_platform_dump_create_handle()).</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 for dump complete and 1 for continue dump</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_platform_dump(struct ibm_platform_dump_params *params,</div><div class='add'>+				phys_addr_t buf_addr, u32 buf_length)</div><div class='add'>+{</div><div class='add'>+	u32 rets[4];</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(rtas_function_token(RTAS_FN_IBM_PLATFORM_DUMP),</div><div class='add'>+				6, 5,</div><div class='add'>+				rets,</div><div class='add'>+				params-&gt;dump_tag_hi,</div><div class='add'>+				params-&gt;dump_tag_lo,</div><div class='add'>+				params-&gt;sequence_hi,</div><div class='add'>+				params-&gt;sequence_lo,</div><div class='add'>+				buf_addr,</div><div class='add'>+				buf_length);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_NOT_AUTHORIZED:</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_PLATFORM_DUMP_CONTINUE:</div><div class='add'>+	case RTAS_IBM_PLATFORM_DUMP_COMPLETE:</div><div class='add'>+		params-&gt;sequence_hi = rets[0];</div><div class='add'>+		params-&gt;sequence_lo = rets[1];</div><div class='add'>+		params-&gt;bytes_ret_hi = rets[2];</div><div class='add'>+		params-&gt;bytes_ret_lo = rets[3];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,platform-dump status %d\n",</div><div class='add'>+				fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Platform dump is used with multiple RTAS calls to retrieve the</div><div class='add'>+ * complete dump for the provided dump ID. Once the complete dump is</div><div class='add'>+ * retrieved, the hypervisor returns dump complete status (0) for the</div><div class='add'>+ * last RTAS call and expects the caller issues one more call with</div><div class='add'>+ * NULL buffer to invalidate the dump so that the hypervisor can remove</div><div class='add'>+ * the dump.</div><div class='add'>+ *</div><div class='add'>+ * After the specific dump is invalidated in the hypervisor, expect the</div><div class='add'>+ * dump complete status for the new sequence - the user space initiates</div><div class='add'>+ * new request for the same dump ID.</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_platform_dump_handle_read(struct file *file,</div><div class='add'>+		char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params = file-&gt;private_data;</div><div class='add'>+	u64 total_bytes;</div><div class='add'>+	s32 fwrc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dump already completed with the previous read calls.</div><div class='add'>+	 * In case if the user space issues further reads, returns</div><div class='add'>+	 * -EINVAL.</div><div class='add'>+	 */</div><div class='add'>+	if (!params-&gt;buf_length) {</div><div class='add'>+		pr_warn_once("Platform dump completed for dump ID %llu\n",</div><div class='add'>+			(u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+				params-&gt;dump_tag_lo));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The hypervisor returns status 0 if no more data available to</div><div class='add'>+	 * download. The dump will be invalidated with ioctl (see below).</div><div class='add'>+	 */</div><div class='add'>+	if (params-&gt;status == RTAS_IBM_PLATFORM_DUMP_COMPLETE) {</div><div class='add'>+		params-&gt;buf_length = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * Returns 0 to the user space so that user</div><div class='add'>+		 * space read stops.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; SZ_1K) {</div><div class='add'>+		pr_err_once("Buffer length should be minimum 1024 bytes\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (size &gt; params-&gt;buf_length) {</div><div class='add'>+		/*</div><div class='add'>+		 * Allocate 4K work area. So if the user requests &gt; 4K,</div><div class='add'>+		 * resize the buffer length.</div><div class='add'>+		 */</div><div class='add'>+		size = params-&gt;buf_length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwrc = rtas_ibm_platform_dump(params,</div><div class='add'>+			rtas_work_area_phys(params-&gt;work_area),</div><div class='add'>+			size);</div><div class='add'>+	if (fwrc &lt; 0)</div><div class='add'>+		return fwrc;</div><div class='add'>+</div><div class='add'>+	total_bytes = (u64) (((u64)params-&gt;bytes_ret_hi &lt;&lt; 32) |</div><div class='add'>+			params-&gt;bytes_ret_lo);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Kernel or firmware bug, do not continue.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN(total_bytes &gt; size, "possible write beyond end of work area"))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(buf, rtas_work_area_raw_buf(params-&gt;work_area),</div><div class='add'>+			total_bytes))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return total_bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int papr_platform_dump_handle_release(struct inode *inode,</div><div class='add'>+					struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;work_area)</div><div class='add'>+		rtas_work_area_free(params-&gt;work_area);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;platform_dump_list_mutex);</div><div class='add'>+	list_del(&amp;params-&gt;list);</div><div class='add'>+	mutex_unlock(&amp;platform_dump_list_mutex);</div><div class='add'>+</div><div class='add'>+	kfree(params);</div><div class='add'>+	file-&gt;private_data = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This ioctl is used to invalidate the dump assuming the user space</div><div class='add'>+ * issue this ioctl after obtain the complete dump.</div><div class='add'>+ * Issue the last RTAS call with NULL buffer to invalidate the dump</div><div class='add'>+ * which means dump will be freed in the hypervisor.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_invalidate_ioctl(struct file *file,</div><div class='add'>+				unsigned int ioctl, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params;</div><div class='add'>+	u64 __user *argp = (void __user *)arg;</div><div class='add'>+	u64 param_dump_tag, dump_tag;</div><div class='add'>+</div><div class='add'>+	if (ioctl != PAPR_PLATFORM_DUMP_IOC_INVALIDATE)</div><div class='add'>+		return -ENOIOCTLCMD;</div><div class='add'>+</div><div class='add'>+	if (get_user(dump_tag, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * private_data is freeded during release(), so should not</div><div class='add'>+	 * happen.</div><div class='add'>+	 */</div><div class='add'>+	if (!file-&gt;private_data) {</div><div class='add'>+		pr_err("No valid FD to invalidate dump for the ID(%llu)\n",</div><div class='add'>+				dump_tag);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params = file-&gt;private_data;</div><div class='add'>+	param_dump_tag = (u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+				params-&gt;dump_tag_lo);</div><div class='add'>+	if (dump_tag != param_dump_tag) {</div><div class='add'>+		pr_err("Invalid dump ID(%llu) to invalidate dump\n",</div><div class='add'>+				dump_tag);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (params-&gt;status != RTAS_IBM_PLATFORM_DUMP_COMPLETE) {</div><div class='add'>+		pr_err("Platform dump is not complete, but requested "</div><div class='add'>+			"to invalidate dump for ID(%llu)\n",</div><div class='add'>+			dump_tag);</div><div class='add'>+		return -EINPROGRESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rtas_ibm_platform_dump(params, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_platform_dump_handle_ops = {</div><div class='add'>+	.read = papr_platform_dump_handle_read,</div><div class='add'>+	.release = papr_platform_dump_handle_release,</div><div class='add'>+	.unlocked_ioctl	= papr_platform_dump_invalidate_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_platform_dump_create_handle() - Create a fd-based handle for</div><div class='add'>+ * reading platform dump</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE ioctl command</div><div class='add'>+ * Allocates RTAS parameter struct and work area and attached to the</div><div class='add'>+ * file descriptor for reading by user space with the multiple RTAS</div><div class='add'>+ * calls until the dump is completed. This memory allocation is freed</div><div class='add'>+ * when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * Multiple dump requests with different IDs are allowed at the same</div><div class='add'>+ * time, but not with the same dump ID. So if the user space is</div><div class='add'>+ * already opened file descriptor for the specific dump ID, return</div><div class='add'>+ * -EALREADY for the next request.</div><div class='add'>+ *</div><div class='add'>+ * @dump_tag: Dump ID for the dump requested to retrieve from the</div><div class='add'>+ *		hypervisor</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_create_handle(u64 dump_tag)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params;</div><div class='add'>+	u64 param_dump_tag;</div><div class='add'>+	struct file *file;</div><div class='add'>+	long err;</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return failure if the user space is already opened FD for</div><div class='add'>+	 * the specific dump ID. This check will prevent multiple dump</div><div class='add'>+	 * requests for the same dump ID at the same time. Generally</div><div class='add'>+	 * should not expect this, but in case.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(params, &amp;platform_dump_list, list) {</div><div class='add'>+		param_dump_tag = (u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+					params-&gt;dump_tag_lo);</div><div class='add'>+		if (dump_tag == param_dump_tag) {</div><div class='add'>+			pr_err("Platform dump for ID(%llu) is already in progress\n",</div><div class='add'>+					dump_tag);</div><div class='add'>+			return -EALREADY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params =  kzalloc(sizeof(struct ibm_platform_dump_params),</div><div class='add'>+			GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!params)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	params-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	params-&gt;buf_length = SZ_4K;</div><div class='add'>+	params-&gt;dump_tag_hi = (u32)(dump_tag &gt;&gt; 32);</div><div class='add'>+	params-&gt;dump_tag_lo = (u32)(dump_tag &amp; 0x00000000ffffffffULL);</div><div class='add'>+	params-&gt;status = RTAS_IBM_PLATFORM_DUMP_START;</div><div class='add'>+</div><div class='add'>+	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		err = fd;</div><div class='add'>+		goto free_area;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file = anon_inode_getfile_fmode("[papr-platform-dump]",</div><div class='add'>+				&amp;papr_platform_dump_handle_ops,</div><div class='add'>+				(void *)params, O_RDONLY,</div><div class='add'>+				FMODE_LSEEK | FMODE_PREAD);</div><div class='add'>+	if (IS_ERR(file)) {</div><div class='add'>+		err = PTR_ERR(file);</div><div class='add'>+		goto put_fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fd_install(fd, file);</div><div class='add'>+</div><div class='add'>+	list_add(&amp;params-&gt;list, &amp;platform_dump_list);</div><div class='add'>+</div><div class='add'>+	pr_info("%s (%d) initiated platform dump for dump tag %llu\n",</div><div class='add'>+		current-&gt;comm, current-&gt;pid, dump_tag);</div><div class='add'>+	return fd;</div><div class='add'>+put_fd:</div><div class='add'>+	put_unused_fd(fd);</div><div class='add'>+free_area:</div><div class='add'>+	rtas_work_area_free(params-&gt;work_area);</div><div class='add'>+	kfree(params);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-platform-dump.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_dev_ioctl(struct file *filp,</div><div class='add'>+					unsigned int ioctl,</div><div class='add'>+					unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	u64 __user *argp = (void __user *)arg;</div><div class='add'>+	u64 dump_tag;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	if (get_user(dump_tag, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE:</div><div class='add'>+		mutex_lock(&amp;platform_dump_list_mutex);</div><div class='add'>+		ret = papr_platform_dump_create_handle(dump_tag);</div><div class='add'>+		mutex_unlock(&amp;platform_dump_list_mutex);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_platform_dump_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_platform_dump_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_platform_dump_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-platform-dump",</div><div class='add'>+	.fops = &amp;papr_platform_dump_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_platform_dump_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_PLATFORM_DUMP))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_platform_dump_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_platform_dump_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-rtas-common.c b/arch/powerpc/platforms/pseries/papr-rtas-common.c<br/>new file mode 100644<br/>index 000000000000..33c606e3378a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-rtas-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-rtas-common.c</a></div><div class='hunk'>@@ -0,0 +1,311 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-common: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+#include &lt;linux/sched/signal.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Sequence based RTAS HCALL has to issue multiple times to retrieve</div><div class='add'>+ * complete data from the hypervisor. For some of these RTAS calls,</div><div class='add'>+ * the OS should not interleave calls with different input until the</div><div class='add'>+ * sequence is completed. So data is collected for these calls during</div><div class='add'>+ * ioctl handle and export to user space with read() handle.</div><div class='add'>+ * This file provides common functions needed for such sequence based</div><div class='add'>+ * RTAS calls Ex: ibm,get-vpd and ibm,get-indices.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+bool papr_rtas_blob_has_data(const struct papr_rtas_blob *blob)</div><div class='add'>+{</div><div class='add'>+	return blob-&gt;data &amp;&amp; blob-&gt;len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void papr_rtas_blob_free(const struct papr_rtas_blob *blob)</div><div class='add'>+{</div><div class='add'>+	if (blob) {</div><div class='add'>+		kvfree(blob-&gt;data);</div><div class='add'>+		kfree(blob);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_blob_extend() - Append data to a &amp;struct papr_rtas_blob.</div><div class='add'>+ * @blob: The blob to extend.</div><div class='add'>+ * @data: The new data to append to @blob.</div><div class='add'>+ * @len:  The length of @data.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ENOMEM on allocation failure, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int papr_rtas_blob_extend(struct papr_rtas_blob *blob,</div><div class='add'>+				const char *data, size_t len)</div><div class='add'>+{</div><div class='add'>+	const size_t new_len = blob-&gt;len + len;</div><div class='add'>+	const size_t old_len = blob-&gt;len;</div><div class='add'>+	const char *old_ptr = blob-&gt;data;</div><div class='add'>+	char *new_ptr;</div><div class='add'>+</div><div class='add'>+	new_ptr = kvrealloc(old_ptr, new_len, GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!new_ptr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;new_ptr[old_len], data, len);</div><div class='add'>+	blob-&gt;data = new_ptr;</div><div class='add'>+	blob-&gt;len = new_len;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_blob_generate() - Construct a new &amp;struct papr_rtas_blob.</div><div class='add'>+ * @seq: work function of the caller that is called to obtain</div><div class='add'>+ *       data with the caller RTAS call.</div><div class='add'>+ *</div><div class='add'>+ * The @work callback is invoked until it returns NULL. @seq is</div><div class='add'>+ * passed to @work in its first argument on each call. When</div><div class='add'>+ * @work returns data, it should store the data length in its</div><div class='add'>+ * second argument.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: A completely populated &amp;struct papr_rtas_blob, or NULL on error.</div><div class='add'>+ */</div><div class='add'>+static const struct papr_rtas_blob *</div><div class='add'>+papr_rtas_blob_generate(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct papr_rtas_blob *blob;</div><div class='add'>+	const char *buf;</div><div class='add'>+	size_t len;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	blob  = kzalloc(sizeof(*blob), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!blob)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!seq-&gt;work)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	while (err == 0 &amp;&amp; (buf = seq-&gt;work(seq, &amp;len)))</div><div class='add'>+		err = papr_rtas_blob_extend(blob, buf, len);</div><div class='add'>+</div><div class='add'>+	if (err != 0 || !papr_rtas_blob_has_data(blob))</div><div class='add'>+		goto free_blob;</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+free_blob:</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int papr_rtas_sequence_set_err(struct papr_rtas_sequence *seq, int err)</div><div class='add'>+{</div><div class='add'>+	/* Preserve the first error recorded. */</div><div class='add'>+	if (seq-&gt;error == 0)</div><div class='add'>+		seq-&gt;error = err;</div><div class='add'>+</div><div class='add'>+	return seq-&gt;error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Higher-level retrieval code below. These functions use the</div><div class='add'>+ * papr_rtas_blob_* and sequence_* APIs defined above to create fd-based</div><div class='add'>+ * handles for consumption by user space.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_run_sequence() - Run a single retrieval sequence.</div><div class='add'>+ * @seq:	Functions of the caller to complete the sequence</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep. Holds a mutex and an RTAS work area for its</div><div class='add'>+ *          duration. Typically performs multiple sleepable slab</div><div class='add'>+ *          allocations.</div><div class='add'>+ *</div><div class='add'>+ * Return: A populated &amp;struct papr_rtas_blob on success. Encoded error</div><div class='add'>+ * pointer otherwise.</div><div class='add'>+ */</div><div class='add'>+static const struct papr_rtas_blob *papr_rtas_run_sequence(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;begin)</div><div class='add'>+		seq-&gt;begin(seq);</div><div class='add'>+</div><div class='add'>+	blob = papr_rtas_blob_generate(seq);</div><div class='add'>+	if (!blob)</div><div class='add'>+		papr_rtas_sequence_set_err(seq, -ENOMEM);</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;end)</div><div class='add'>+		seq-&gt;end(seq);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;error) {</div><div class='add'>+		papr_rtas_blob_free(blob);</div><div class='add'>+		return ERR_PTR(seq-&gt;error);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_retrieve() - Return the data blob that is exposed to</div><div class='add'>+ * user space.</div><div class='add'>+ * @seq: RTAS call specific functions to be invoked until the</div><div class='add'>+ *       sequence is completed.</div><div class='add'>+ *</div><div class='add'>+ * Run sequences against @param until a blob is successfully</div><div class='add'>+ * instantiated, or a hard error is encountered, or a fatal signal is</div><div class='add'>+ * pending.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: A fully populated data blob when successful. Encoded error</div><div class='add'>+ * pointer otherwise.</div><div class='add'>+ */</div><div class='add'>+const struct papr_rtas_blob *papr_rtas_retrieve(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * EAGAIN means the sequence returns error with a -4 (data</div><div class='add'>+	 * changed and need to start the sequence) status from RTAS calls</div><div class='add'>+	 * and we should attempt a new sequence. PAPR+ (v2.13 R1–7.3.20–5</div><div class='add'>+	 * - ibm,get-vpd, R1–7.3.17–6 - ibm,get-indices) indicates that</div><div class='add'>+	 * this should be a transient condition, not something that</div><div class='add'>+	 * happens continuously. But we'll stop trying on a fatal signal.</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		blob = papr_rtas_run_sequence(seq);</div><div class='add'>+		if (!IS_ERR(blob)) /* Success. */</div><div class='add'>+			break;</div><div class='add'>+		if (PTR_ERR(blob) != -EAGAIN) /* Hard error. */</div><div class='add'>+			break;</div><div class='add'>+		cond_resched();</div><div class='add'>+	} while (!fatal_signal_pending(current));</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_setup_file_interface - Complete the sequence and obtain</div><div class='add'>+ * the data and export to user space with fd-based handles. Then the</div><div class='add'>+ * user spave gets the data with read() handle.</div><div class='add'>+ * @seq: RTAS call specific functions to get the data.</div><div class='add'>+ * @fops: RTAS call specific file operations such as read().</div><div class='add'>+ * @name: RTAS call specific char device node.</div><div class='add'>+ *</div><div class='add'>+ * Return: FD handle for consumption by user space</div><div class='add'>+ */</div><div class='add'>+long papr_rtas_setup_file_interface(struct papr_rtas_sequence *seq,</div><div class='add'>+				const struct file_operations *fops,</div><div class='add'>+				char *name)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+	struct file *file;</div><div class='add'>+	long ret;</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	blob = papr_rtas_retrieve(seq);</div><div class='add'>+	if (IS_ERR(blob))</div><div class='add'>+		return PTR_ERR(blob);</div><div class='add'>+</div><div class='add'>+	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		ret = fd;</div><div class='add'>+		goto free_blob;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file = anon_inode_getfile_fmode(name, fops, (void *)blob,</div><div class='add'>+			O_RDONLY, FMODE_LSEEK | FMODE_PREAD);</div><div class='add'>+	if (IS_ERR(file)) {</div><div class='add'>+		ret = PTR_ERR(file);</div><div class='add'>+		goto put_fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fd_install(fd, file);</div><div class='add'>+	return fd;</div><div class='add'>+</div><div class='add'>+put_fd:</div><div class='add'>+	put_unused_fd(fd);</div><div class='add'>+free_blob:</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_rtas_sequence_should_stop() - Determine whether RTAS retrieval</div><div class='add'>+ *                                    sequence should continue.</div><div class='add'>+ *</div><div class='add'>+ * Examines the sequence error state and outputs of the last call to</div><div class='add'>+ * the specific RTAS to determine whether the sequence in progress</div><div class='add'>+ * should continue or stop.</div><div class='add'>+ *</div><div class='add'>+ * Return: True if the sequence has encountered an error or if all data</div><div class='add'>+ *         for this sequence has been retrieved. False otherwise.</div><div class='add'>+ */</div><div class='add'>+bool papr_rtas_sequence_should_stop(const struct papr_rtas_sequence *seq,</div><div class='add'>+				s32 status, bool init_state)</div><div class='add'>+{</div><div class='add'>+	bool done;</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;error)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	switch (status) {</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		if (init_state)</div><div class='add'>+			done = false; /* Initial state. */</div><div class='add'>+		else</div><div class='add'>+			done = true; /* All data consumed. */</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		done = false; /* More data available. */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		done = true; /* Error encountered. */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * User space read to retrieve data for the corresponding RTAS call.</div><div class='add'>+ * papr_rtas_blob is filled with the data using the corresponding RTAS</div><div class='add'>+ * call sequence API.</div><div class='add'>+ */</div><div class='add'>+ssize_t papr_rtas_common_handle_read(struct file *file,</div><div class='add'>+	       char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/* We should not instantiate a handle without any data attached. */</div><div class='add'>+	if (!papr_rtas_blob_has_data(blob)) {</div><div class='add'>+		pr_err_once("handle without data\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int papr_rtas_common_handle_release(struct inode *inode,</div><div class='add'>+		struct file *file)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+loff_t papr_rtas_common_handle_seek(struct file *file, loff_t off,</div><div class='add'>+					int whence)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return fixed_size_llseek(file, off, whence, blob-&gt;len);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-rtas-common.h b/arch/powerpc/platforms/pseries/papr-rtas-common.h<br/>new file mode 100644<br/>index 000000000000..4ceabcaf4905<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-rtas-common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-rtas-common.h</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+#ifndef _ASM_POWERPC_PAPR_RTAS_COMMON_H</div><div class='add'>+#define _ASM_POWERPC_PAPR_RTAS_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return codes for sequence based RTAS calls.</div><div class='add'>+ * Not listed under PAPR+ v2.13 7.2.8: "Return Codes".</div><div class='add'>+ * But defined in the specific section of each RTAS call.</div><div class='add'>+ */</div><div class='add'>+#define RTAS_SEQ_COMPLETE	0 /* All data has been retrieved. */</div><div class='add'>+#define RTAS_SEQ_MORE_DATA	1 /* More data is available */</div><div class='add'>+#define RTAS_SEQ_START_OVER	-4 /* Data changed, restart call sequence. */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal "blob" APIs for accumulating RTAS call results into</div><div class='add'>+ * an immutable buffer to be attached to a file descriptor.</div><div class='add'>+ */</div><div class='add'>+struct papr_rtas_blob {</div><div class='add'>+	const char *data;</div><div class='add'>+	size_t len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct papr_sequence - State for managing a sequence of RTAS calls.</div><div class='add'>+ * @error:  Shall be zero as long as the sequence has not encountered an error,</div><div class='add'>+ *          -ve errno otherwise. Use papr_rtas_sequence_set_err() to update.</div><div class='add'>+ * @params: Parameter block to pass to rtas_*() calls.</div><div class='add'>+ * @begin: Work area allocation and initialize the needed parameter</div><div class='add'>+ *         values passed to RTAS call</div><div class='add'>+ * @end: Free the allocated work area</div><div class='add'>+ * @work: Obtain data with RTAS call and invoke it until the sequence is</div><div class='add'>+ *        completed.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+struct papr_rtas_sequence {</div><div class='add'>+	int error;</div><div class='add'>+	void *params;</div><div class='add'>+	void (*begin)(struct papr_rtas_sequence *seq);</div><div class='add'>+	void (*end)(struct papr_rtas_sequence *seq);</div><div class='add'>+	const char *(*work)(struct papr_rtas_sequence *seq, size_t *len);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern bool papr_rtas_blob_has_data(const struct papr_rtas_blob *blob);</div><div class='add'>+extern void papr_rtas_blob_free(const struct papr_rtas_blob *blob);</div><div class='add'>+extern int papr_rtas_sequence_set_err(struct papr_rtas_sequence *seq,</div><div class='add'>+		int err);</div><div class='add'>+extern const struct papr_rtas_blob *papr_rtas_retrieve(struct papr_rtas_sequence *seq);</div><div class='add'>+extern long papr_rtas_setup_file_interface(struct papr_rtas_sequence *seq,</div><div class='add'>+			const struct file_operations *fops, char *name);</div><div class='add'>+extern bool papr_rtas_sequence_should_stop(const struct papr_rtas_sequence *seq,</div><div class='add'>+				s32 status, bool init_state);</div><div class='add'>+extern ssize_t papr_rtas_common_handle_read(struct file *file,</div><div class='add'>+			char __user *buf, size_t size, loff_t *off);</div><div class='add'>+extern int papr_rtas_common_handle_release(struct inode *inode,</div><div class='add'>+					struct file *file);</div><div class='add'>+extern loff_t papr_rtas_common_handle_seek(struct file *file, loff_t off,</div><div class='add'>+					int whence);</div><div class='add'>+#endif /* _ASM_POWERPC_PAPR_RTAS_COMMON_H */</div><div class='add'>+</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-vpd.c b/arch/powerpc/platforms/pseries/papr-vpd.c<br/>index 1574176e3ffc..f38c188fc4a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-vpd.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr-vpd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr-vpd.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr-vpd.c</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "papr-vpd: " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/anon_inodes.h&gt;</div><div class='ctx'> #include &lt;linux/build_bug.h&gt;</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='hunk'>@@ -20,14 +19,7 @@</div><div class='ctx'> #include &lt;asm/rtas-work-area.h&gt;</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/papr-vpd.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function-specific return values for ibm,get-vpd, derived from PAPR+</div><div class='del'>- * v2.13 7.3.20 "ibm,get-vpd RTAS Call".</div><div class='del'>- */</div><div class='del'>-#define RTAS_IBM_GET_VPD_COMPLETE    0 /* All VPD has been retrieved. */</div><div class='del'>-#define RTAS_IBM_GET_VPD_MORE_DATA   1 /* More VPD is available. */</div><div class='del'>-#define RTAS_IBM_GET_VPD_START_OVER -4 /* VPD changed, restart call sequence. */</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct rtas_ibm_get_vpd_params - Parameters (in and out) for ibm,get-vpd.</div><div class='hunk'>@@ -91,13 +83,14 @@ static int rtas_ibm_get_vpd(struct rtas_ibm_get_vpd_params *params)</div><div class='ctx'> 	case RTAS_INVALID_PARAMETER:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='del'>-	case RTAS_IBM_GET_VPD_START_OVER:</div><div class='add'>+	case RTAS_SEQ_START_OVER:</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='add'>+		pr_info_ratelimited("VPD changed during retrieval, retrying\n");</div><div class='ctx'> 		break;</div><div class='del'>-	case RTAS_IBM_GET_VPD_MORE_DATA:</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='ctx'> 		params-&gt;sequence = rets[0];</div><div class='ctx'> 		fallthrough;</div><div class='del'>-	case RTAS_IBM_GET_VPD_COMPLETE:</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='ctx'> 		params-&gt;written = rets[1];</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Kernel or firmware bug, do not continue.</div><div class='hunk'>@@ -119,91 +112,6 @@ static int rtas_ibm_get_vpd(struct rtas_ibm_get_vpd_params *params)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Internal VPD "blob" APIs for accumulating ibm,get-vpd results into</div><div class='del'>- * an immutable buffer to be attached to a file descriptor.</div><div class='del'>- */</div><div class='del'>-struct vpd_blob {</div><div class='del'>-	const char *data;</div><div class='del'>-	size_t len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool vpd_blob_has_data(const struct vpd_blob *blob)</div><div class='del'>-{</div><div class='del'>-	return blob-&gt;data &amp;&amp; blob-&gt;len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vpd_blob_free(const struct vpd_blob *blob)</div><div class='del'>-{</div><div class='del'>-	if (blob) {</div><div class='del'>-		kvfree(blob-&gt;data);</div><div class='del'>-		kfree(blob);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_blob_extend() - Append data to a &amp;struct vpd_blob.</div><div class='del'>- * @blob: The blob to extend.</div><div class='del'>- * @data: The new data to append to @blob.</div><div class='del'>- * @len:  The length of @data.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: -ENOMEM on allocation failure, 0 otherwise.</div><div class='del'>- */</div><div class='del'>-static int vpd_blob_extend(struct vpd_blob *blob, const char *data, size_t len)</div><div class='del'>-{</div><div class='del'>-	const size_t new_len = blob-&gt;len + len;</div><div class='del'>-	const size_t old_len = blob-&gt;len;</div><div class='del'>-	const char *old_ptr = blob-&gt;data;</div><div class='del'>-	char *new_ptr;</div><div class='del'>-</div><div class='del'>-	new_ptr = kvrealloc(old_ptr, new_len, GFP_KERNEL_ACCOUNT);</div><div class='del'>-	if (!new_ptr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;new_ptr[old_len], data, len);</div><div class='del'>-	blob-&gt;data = new_ptr;</div><div class='del'>-	blob-&gt;len = new_len;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_blob_generate() - Construct a new &amp;struct vpd_blob.</div><div class='del'>- * @generator: Function that supplies the blob data.</div><div class='del'>- * @arg:       Context pointer supplied by caller, passed to @generator.</div><div class='del'>- *</div><div class='del'>- * The @generator callback is invoked until it returns NULL. @arg is</div><div class='del'>- * passed to @generator in its first argument on each call. When</div><div class='del'>- * @generator returns data, it should store the data length in its</div><div class='del'>- * second argument.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: A completely populated &amp;struct vpd_blob, or NULL on error.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *</div><div class='del'>-vpd_blob_generate(const char * (*generator)(void *, size_t *), void *arg)</div><div class='del'>-{</div><div class='del'>-	struct vpd_blob *blob;</div><div class='del'>-	const char *buf;</div><div class='del'>-	size_t len;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	blob  = kzalloc(sizeof(*blob), GFP_KERNEL_ACCOUNT);</div><div class='del'>-	if (!blob)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	while (err == 0 &amp;&amp; (buf = generator(arg, &amp;len)))</div><div class='del'>-		err = vpd_blob_extend(blob, buf, len);</div><div class='del'>-</div><div class='del'>-	if (err != 0 || !vpd_blob_has_data(blob))</div><div class='del'>-		goto free_blob;</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-free_blob:</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Internal VPD sequence APIs. A VPD sequence is a series of calls to</div><div class='ctx'>  * ibm,get-vpd for a given location code. The sequence ends when an</div><div class='ctx'>  * error is encountered or all VPD for the location code has been</div><div class='hunk'>@@ -211,30 +119,14 @@ free_blob:</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct vpd_sequence - State for managing a VPD sequence.</div><div class='del'>- * @error:  Shall be zero as long as the sequence has not encountered an error,</div><div class='del'>- *          -ve errno otherwise. Use vpd_sequence_set_err() to update this.</div><div class='del'>- * @params: Parameter block to pass to rtas_ibm_get_vpd().</div><div class='del'>- */</div><div class='del'>-struct vpd_sequence {</div><div class='del'>-	int error;</div><div class='del'>-	struct rtas_ibm_get_vpd_params params;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * vpd_sequence_begin() - Begin a VPD retrieval sequence.</div><div class='del'>- * @seq:      Uninitialized sequence state.</div><div class='del'>- * @loc_code: Location code that defines the scope of the VPD to return.</div><div class='del'>- *</div><div class='del'>- * Initializes @seq with the resources necessary to carry out a VPD</div><div class='del'>- * sequence. Callers must pass @seq to vpd_sequence_end() regardless</div><div class='del'>- * of whether the sequence succeeds.</div><div class='add'>+ * @seq: vpd call parameters from sequence struct</div><div class='ctx'>  *</div><div class='ctx'>  * Context: May sleep.</div><div class='ctx'>  */</div><div class='del'>-static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='del'>-			       const struct papr_location_code *loc_code)</div><div class='add'>+static void vpd_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='ctx'> {</div><div class='add'>+	struct rtas_ibm_get_vpd_params *vpd_params;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use a static data structure for the location code passed to</div><div class='ctx'> 	 * RTAS to ensure it's in the RMA and avoid a separate work</div><div class='hunk'>@@ -242,6 +134,7 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'> 	 */</div><div class='ctx'> 	static struct papr_location_code static_loc_code;</div><div class='ctx'> </div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We could allocate the work area before acquiring the</div><div class='ctx'> 	 * function lock, but that would allow concurrent requests to</div><div class='hunk'>@@ -249,14 +142,12 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'> 	 * allocate the work area under the lock.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mutex_lock(&amp;rtas_ibm_get_vpd_lock);</div><div class='del'>-	static_loc_code = *loc_code;</div><div class='del'>-	*seq = (struct vpd_sequence) {</div><div class='del'>-		.params = {</div><div class='del'>-			.work_area = rtas_work_area_alloc(SZ_4K),</div><div class='del'>-			.loc_code = &amp;static_loc_code,</div><div class='del'>-			.sequence = 1,</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='add'>+	static_loc_code = *(struct papr_location_code *)vpd_params-&gt;loc_code;</div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	vpd_params-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	vpd_params-&gt;loc_code = &amp;static_loc_code;</div><div class='add'>+	vpd_params-&gt;sequence = 1;</div><div class='add'>+	vpd_params-&gt;status = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -265,180 +156,39 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'>  *</div><div class='ctx'>  * Releases resources obtained by vpd_sequence_begin().</div><div class='ctx'>  */</div><div class='del'>-static void vpd_sequence_end(struct vpd_sequence *seq)</div><div class='del'>-{</div><div class='del'>-	rtas_work_area_free(seq-&gt;params.work_area);</div><div class='del'>-	mutex_unlock(&amp;rtas_ibm_get_vpd_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_sequence_should_stop() - Determine whether a VPD retrieval sequence</div><div class='del'>- *                              should continue.</div><div class='del'>- * @seq: VPD sequence state.</div><div class='del'>- *</div><div class='del'>- * Examines the sequence error state and outputs of the last call to</div><div class='del'>- * ibm,get-vpd to determine whether the sequence in progress should</div><div class='del'>- * continue or stop.</div><div class='del'>- *</div><div class='del'>- * Return: True if the sequence has encountered an error or if all VPD for</div><div class='del'>- *         this sequence has been retrieved. False otherwise.</div><div class='del'>- */</div><div class='del'>-static bool vpd_sequence_should_stop(const struct vpd_sequence *seq)</div><div class='del'>-{</div><div class='del'>-	bool done;</div><div class='del'>-</div><div class='del'>-	if (seq-&gt;error)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	switch (seq-&gt;params.status) {</div><div class='del'>-	case 0:</div><div class='del'>-		if (seq-&gt;params.written == 0)</div><div class='del'>-			done = false; /* Initial state. */</div><div class='del'>-		else</div><div class='del'>-			done = true; /* All data consumed. */</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		done = false; /* More data available. */</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		done = true; /* Error encountered. */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vpd_sequence_set_err(struct vpd_sequence *seq, int err)</div><div class='add'>+static void vpd_sequence_end(struct papr_rtas_sequence *seq)</div><div class='ctx'> {</div><div class='del'>-	/* Preserve the first error recorded. */</div><div class='del'>-	if (seq-&gt;error == 0)</div><div class='del'>-		seq-&gt;error = err;</div><div class='add'>+	struct rtas_ibm_get_vpd_params *vpd_params;</div><div class='ctx'> </div><div class='del'>-	return seq-&gt;error;</div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(vpd_params-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_vpd_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Generator function to be passed to vpd_blob_generate().</div><div class='add'>+ * Generator function to be passed to papr_rtas_blob_generate().</div><div class='ctx'>  */</div><div class='del'>-static const char *vpd_sequence_fill_work_area(void *arg, size_t *len)</div><div class='add'>+static const char *vpd_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='ctx'> {</div><div class='del'>-	struct vpd_sequence *seq = arg;</div><div class='del'>-	struct rtas_ibm_get_vpd_params *p = &amp;seq-&gt;params;</div><div class='add'>+	struct rtas_ibm_get_vpd_params *p;</div><div class='add'>+	bool init_state;</div><div class='add'>+</div><div class='add'>+	p = (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;written == 0) ? true : false;</div><div class='ctx'> </div><div class='del'>-	if (vpd_sequence_should_stop(seq))</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='ctx'> 		return NULL;</div><div class='del'>-	if (vpd_sequence_set_err(seq, rtas_ibm_get_vpd(p)))</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_ibm_get_vpd(p)))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	*len = p-&gt;written;</div><div class='ctx'> 	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Higher-level VPD retrieval code below. These functions use the</div><div class='del'>- * vpd_blob_* and vpd_sequence_* APIs defined above to create fd-based</div><div class='del'>- * VPD handles for consumption by user space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * papr_vpd_run_sequence() - Run a single VPD retrieval sequence.</div><div class='del'>- * @loc_code: Location code that defines the scope of VPD to return.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep. Holds a mutex and an RTAS work area for its</div><div class='del'>- *          duration. Typically performs multiple sleepable slab</div><div class='del'>- *          allocations.</div><div class='del'>- *</div><div class='del'>- * Return: A populated &amp;struct vpd_blob on success. Encoded error</div><div class='del'>- * pointer otherwise.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *papr_vpd_run_sequence(const struct papr_location_code *loc_code)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-	struct vpd_sequence seq;</div><div class='del'>-</div><div class='del'>-	vpd_sequence_begin(&amp;seq, loc_code);</div><div class='del'>-	blob = vpd_blob_generate(vpd_sequence_fill_work_area, &amp;seq);</div><div class='del'>-	if (!blob)</div><div class='del'>-		vpd_sequence_set_err(&amp;seq, -ENOMEM);</div><div class='del'>-	vpd_sequence_end(&amp;seq);</div><div class='del'>-</div><div class='del'>-	if (seq.error) {</div><div class='del'>-		vpd_blob_free(blob);</div><div class='del'>-		return ERR_PTR(seq.error);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * papr_vpd_retrieve() - Return the VPD for a location code.</div><div class='del'>- * @loc_code: Location code that defines the scope of VPD to return.</div><div class='del'>- *</div><div class='del'>- * Run VPD sequences against @loc_code until a blob is successfully</div><div class='del'>- * instantiated, or a hard error is encountered, or a fatal signal is</div><div class='del'>- * pending.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: A fully populated VPD blob when successful. Encoded error</div><div class='del'>- * pointer otherwise.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *papr_vpd_retrieve(const struct papr_location_code *loc_code)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * EAGAIN means the sequence errored with a -4 (VPD changed)</div><div class='del'>-	 * status from ibm,get-vpd, and we should attempt a new</div><div class='del'>-	 * sequence. PAPR+ v2.13 R1–7.3.20–5 indicates that this</div><div class='del'>-	 * should be a transient condition, not something that happens</div><div class='del'>-	 * continuously. But we'll stop trying on a fatal signal.</div><div class='del'>-	 */</div><div class='del'>-	do {</div><div class='del'>-		blob = papr_vpd_run_sequence(loc_code);</div><div class='del'>-		if (!IS_ERR(blob)) /* Success. */</div><div class='del'>-			break;</div><div class='del'>-		if (PTR_ERR(blob) != -EAGAIN) /* Hard error. */</div><div class='del'>-			break;</div><div class='del'>-		pr_info_ratelimited("VPD changed during retrieval, retrying\n");</div><div class='del'>-		cond_resched();</div><div class='del'>-	} while (!fatal_signal_pending(current));</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t papr_vpd_handle_read(struct file *file, char __user *buf, size_t size, loff_t *off)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	/* bug: we should not instantiate a handle without any data attached. */</div><div class='del'>-	if (!vpd_blob_has_data(blob)) {</div><div class='del'>-		pr_err_once("handle without data\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int papr_vpd_handle_release(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static loff_t papr_vpd_handle_seek(struct file *file, loff_t off, int whence)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	return fixed_size_llseek(file, off, whence, blob-&gt;len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static const struct file_operations papr_vpd_handle_ops = {</div><div class='del'>-	.read = papr_vpd_handle_read,</div><div class='del'>-	.llseek = papr_vpd_handle_seek,</div><div class='del'>-	.release = papr_vpd_handle_release,</div><div class='add'>+	.read = papr_rtas_common_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -460,10 +210,9 @@ static const struct file_operations papr_vpd_handle_ops = {</div><div class='ctx'>  */</div><div class='ctx'> static long papr_vpd_create_handle(struct papr_location_code __user *ulc)</div><div class='ctx'> {</div><div class='add'>+	struct rtas_ibm_get_vpd_params vpd_params = {};</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='ctx'> 	struct papr_location_code klc;</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-	struct file *file;</div><div class='del'>-	long err;</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;klc, ulc, sizeof(klc)))</div><div class='hunk'>@@ -472,31 +221,19 @@ static long papr_vpd_create_handle(struct papr_location_code __user *ulc)</div><div class='ctx'> 	if (!string_is_terminated(klc.str, ARRAY_SIZE(klc.str)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	blob = papr_vpd_retrieve(&amp;klc);</div><div class='del'>-	if (IS_ERR(blob))</div><div class='del'>-		return PTR_ERR(blob);</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = vpd_sequence_begin,</div><div class='add'>+		.end = vpd_sequence_end,</div><div class='add'>+		.work = vpd_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='del'>-	if (fd &lt; 0) {</div><div class='del'>-		err = fd;</div><div class='del'>-		goto free_blob;</div><div class='del'>-	}</div><div class='add'>+	vpd_params.loc_code = &amp;klc;</div><div class='add'>+	seq.params = (void *)&amp;vpd_params;</div><div class='ctx'> </div><div class='del'>-	file = anon_inode_getfile("[papr-vpd]", &amp;papr_vpd_handle_ops,</div><div class='del'>-				  (void *)blob, O_RDONLY);</div><div class='del'>-	if (IS_ERR(file)) {</div><div class='del'>-		err = PTR_ERR(file);</div><div class='del'>-		goto put_fd;</div><div class='del'>-	}</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq, &amp;papr_vpd_handle_ops,</div><div class='add'>+			"[papr-vpd]");</div><div class='ctx'> </div><div class='del'>-	file-&gt;f_mode |= FMODE_LSEEK | FMODE_PREAD;</div><div class='del'>-	fd_install(fd, file);</div><div class='ctx'> 	return fd;</div><div class='del'>-put_fd:</div><div class='del'>-	put_unused_fd(fd);</div><div class='del'>-free_blob:</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c<br/>index 9e297f88adc5..f7c9271bda58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr_scm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/papr_scm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/papr_scm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/papr_scm.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/ndctl.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -543,7 +544,7 @@ static int drc_pmem_query_health(struct papr_scm_priv *p)</div><div class='ctx'> </div><div class='ctx'> 	/* Jiffies offset for which the health data is assumed to be same */</div><div class='ctx'> 	cache_timeout = p-&gt;lasthealth_jiffies +</div><div class='del'>-		msecs_to_jiffies(MIN_HEALTH_QUERY_INTERVAL * 1000);</div><div class='add'>+		secs_to_jiffies(MIN_HEALTH_QUERY_INTERVAL);</div><div class='ctx'> </div><div class='ctx'> 	/* Fetch new health info is its older than MIN_HEALTH_QUERY_INTERVAL */</div><div class='ctx'> 	if (time_after(jiffies, cache_timeout))</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c<br/>index 52e2623a741d..aeb8633a3d00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/pci_dlpar.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/pci_dlpar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/pci_dlpar.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/pci_dlpar.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@ struct pci_controller *init_phb_dynamic(struct device_node *dn)</div><div class='ctx'> 	nid = of_node_to_nid(dn);</div><div class='ctx'> 	if (likely((nid) &gt;= 0)) {</div><div class='ctx'> 		if (!node_online(nid)) {</div><div class='del'>-			if (__register_one_node(nid)) {</div><div class='add'>+			if (register_one_node(nid)) {</div><div class='ctx'> 				pr_err("PCI: Failed to register node %d\n", nid);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				update_numa_distance(dn);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/plpks-secvar.c b/arch/powerpc/platforms/pseries/plpks-secvar.c<br/>index 257fd1f8bc19..f9e9cc40c9d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/plpks-secvar.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/plpks-secvar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/plpks-secvar.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/plpks-secvar.c</a></div><div class='hunk'>@@ -59,7 +59,14 @@ static u32 get_policy(const char *name)</div><div class='ctx'> 		return PLPKS_SIGNEDUPDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char * const plpks_var_names[] = {</div><div class='add'>+static const char * const plpks_var_names_static[] = {</div><div class='add'>+	"PK",</div><div class='add'>+	"moduledb",</div><div class='add'>+	"trustedcadb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const plpks_var_names_dynamic[] = {</div><div class='ctx'> 	"PK",</div><div class='ctx'> 	"KEK",</div><div class='ctx'> 	"db",</div><div class='hunk'>@@ -152,39 +159,55 @@ err:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-// PLPKS dynamic secure boot doesn't give us a format string in the same way OPAL does.</div><div class='del'>-// Instead, report the format using the SB_VERSION variable in the keystore.</div><div class='del'>-// The string is made up by us, and takes the form "ibm,plpks-sb-v&lt;n&gt;" (or "ibm,plpks-sb-unknown"</div><div class='del'>-// if the SB_VERSION variable doesn't exist). Hypervisor defines the SB_VERSION variable as a</div><div class='del'>-// "1 byte unsigned integer value".</div><div class='del'>-static ssize_t plpks_secvar_format(char *buf, size_t bufsize)</div><div class='add'>+/*</div><div class='add'>+ * Return the key management mode.</div><div class='add'>+ *</div><div class='add'>+ * SB_VERSION is defined as a "1 byte unsigned integer value", taking values</div><div class='add'>+ * starting from 1. It is owned by the Partition Firmware and its presence</div><div class='add'>+ * indicates that the key management mode is dynamic. Any failure in</div><div class='add'>+ * reading SB_VERSION defaults the key management mode to static. The error</div><div class='add'>+ * codes -ENOENT or -EPERM are expected in static key management mode. An</div><div class='add'>+ * unexpected error code will have to be investigated. Only signed variables</div><div class='add'>+ * have null bytes in their names, SB_VERSION does not.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 to indicate that the key management mode is static. Otherwise</div><div class='add'>+ * return the SB_VERSION value to indicate that the key management mode is</div><div class='add'>+ * dynamic.</div><div class='add'>+ */</div><div class='add'>+static u8 plpks_get_sb_keymgmt_mode(void)</div><div class='ctx'> {</div><div class='del'>-	struct plpks_var var = {0};</div><div class='del'>-	ssize_t ret;</div><div class='del'>-	u8 version;</div><div class='del'>-</div><div class='del'>-	var.component = NULL;</div><div class='del'>-	// Only the signed variables have null bytes in their names, this one doesn't</div><div class='del'>-	var.name = "SB_VERSION";</div><div class='del'>-	var.namelen = strlen(var.name);</div><div class='del'>-	var.datalen = 1;</div><div class='del'>-	var.data = &amp;version;</div><div class='del'>-</div><div class='del'>-	// Unlike the other vars, SB_VERSION is owned by firmware instead of the OS</div><div class='del'>-	ret = plpks_read_fw_var(&amp;var);</div><div class='del'>-	if (ret) {</div><div class='del'>-		if (ret == -ENOENT) {</div><div class='del'>-			ret = snprintf(buf, bufsize, "ibm,plpks-sb-unknown");</div><div class='del'>-		} else {</div><div class='del'>-			pr_err("Error %ld reading SB_VERSION from firmware\n", ret);</div><div class='del'>-			ret = -EIO;</div><div class='del'>-		}</div><div class='del'>-		goto err;</div><div class='add'>+	u8 mode;</div><div class='add'>+	ssize_t rc;</div><div class='add'>+	struct plpks_var var = {</div><div class='add'>+		.component = NULL,</div><div class='add'>+		.name = "SB_VERSION",</div><div class='add'>+		.namelen = 10,</div><div class='add'>+		.datalen = 1,</div><div class='add'>+		.data = &amp;mode,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rc = plpks_read_fw_var(&amp;var);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc != -ENOENT &amp;&amp; rc != -EPERM)</div><div class='add'>+			pr_info("Error %ld reading SB_VERSION from firmware\n", rc);</div><div class='add'>+		mode = 0;</div><div class='ctx'> 	}</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ret = snprintf(buf, bufsize, "ibm,plpks-sb-v%hhu", version);</div><div class='del'>-err:</div><div class='del'>-	return ret;</div><div class='add'>+/*</div><div class='add'>+ * PLPKS dynamic secure boot doesn't give us a format string in the same way</div><div class='add'>+ * OPAL does. Instead, report the format using the SB_VERSION variable in the</div><div class='add'>+ * keystore. The string, made up by us, takes the form of either</div><div class='add'>+ * "ibm,plpks-sb-v&lt;n&gt;" or "ibm,plpks-sb-v0", based on the key management mode,</div><div class='add'>+ * and return the length of the secvar format property.</div><div class='add'>+ */</div><div class='add'>+static ssize_t plpks_secvar_format(char *buf, size_t bufsize)</div><div class='add'>+{</div><div class='add'>+	u8 mode;</div><div class='add'>+</div><div class='add'>+	mode = plpks_get_sb_keymgmt_mode();</div><div class='add'>+	return snprintf(buf, bufsize, "ibm,plpks-sb-v%hhu", mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int plpks_max_size(u64 *max_size)</div><div class='hunk'>@@ -197,21 +220,34 @@ static int plpks_max_size(u64 *max_size)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct secvar_operations plpks_secvar_ops_static = {</div><div class='add'>+	.get = plpks_get_variable,</div><div class='add'>+	.set = plpks_set_variable,</div><div class='add'>+	.format = plpks_secvar_format,</div><div class='add'>+	.max_size = plpks_max_size,</div><div class='add'>+	.config_attrs = config_attrs,</div><div class='add'>+	.var_names = plpks_var_names_static,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static const struct secvar_operations plpks_secvar_ops = {</div><div class='add'>+static const struct secvar_operations plpks_secvar_ops_dynamic = {</div><div class='ctx'> 	.get = plpks_get_variable,</div><div class='ctx'> 	.set = plpks_set_variable,</div><div class='ctx'> 	.format = plpks_secvar_format,</div><div class='ctx'> 	.max_size = plpks_max_size,</div><div class='ctx'> 	.config_attrs = config_attrs,</div><div class='del'>-	.var_names = plpks_var_names,</div><div class='add'>+	.var_names = plpks_var_names_dynamic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int plpks_secvar_init(void)</div><div class='ctx'> {</div><div class='add'>+	u8 mode;</div><div class='add'>+</div><div class='ctx'> 	if (!plpks_is_available())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return set_secvar_ops(&amp;plpks_secvar_ops);</div><div class='add'>+	mode = plpks_get_sb_keymgmt_mode();</div><div class='add'>+	if (mode)</div><div class='add'>+		return set_secvar_ops(&amp;plpks_secvar_ops_dynamic);</div><div class='add'>+	return set_secvar_ops(&amp;plpks_secvar_ops_static);</div><div class='ctx'> }</div><div class='ctx'> machine_device_initcall(pseries, plpks_secvar_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/plpks.c b/arch/powerpc/platforms/pseries/plpks.c<br/>index 4a595493d28a..b1667ed05f98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/plpks.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/plpks.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/plpks.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/plpks.c</a></div><div class='hunk'>@@ -683,7 +683,7 @@ void __init plpks_early_init_devtree(void)</div><div class='ctx'> out:</div><div class='ctx'> 	fdt_nop_property(fdt, chosen_node, "ibm,plpks-pw");</div><div class='ctx'> 	// Since we've cleared the password, we must update the FDT checksum</div><div class='del'>-	early_init_dt_verify(fdt);</div><div class='add'>+	early_init_dt_verify(fdt, __pa(fdt));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __init int pseries_plpks_init(void)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c<br/>index c597711ef20a..db99725e752b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/smp.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/smp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/smp.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/smp.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> #include &lt;asm/xive.h&gt;</div><div class='ctx'> #include &lt;asm/dbell.h&gt;</div><div class='ctx'> #include &lt;asm/plpar_wrappers.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_guest.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/svm.c b/arch/powerpc/platforms/pseries/svm.c<br/>index 3b4045d508ec..384c9dc1899a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/svm.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/platforms/pseries/svm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/platforms/pseries/svm.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/platforms/pseries/svm.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/mem_encrypt.h&gt;</div><div class='ctx'> #include &lt;linux/cc_platform.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='head'>diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile<br/>index 24a177d164f1..0834a9a12600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/Makefile</a></div><div class='hunk'>@@ -12,7 +12,6 @@ obj-$(CONFIG_PPC_MSI_BITMAP)	+= msi_bitmap.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC_MPC106)	+= grackle.o</div><div class='ctx'> obj-$(CONFIG_PPC_DCR_NATIVE)	+= dcr-low.o</div><div class='del'>-obj-$(CONFIG_PPC_PMI)		+= pmi.o</div><div class='ctx'> obj-$(CONFIG_U3_DART)		+= dart_iommu.o</div><div class='ctx'> obj-$(CONFIG_MMIO_NVRAM)	+= mmio_nvram.o</div><div class='ctx'> obj-$(CONFIG_FSL_SOC)		+= fsl_soc.o fsl_mpic_err.o</div><div class='head'>diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c<br/>index e14493685fe8..4a59ed1d62ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/cpm2_pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/cpm2_pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/cpm2_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/cpm2_pic.c</a></div><div class='hunk'>@@ -207,7 +207,7 @@ unsigned int cpm2_get_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	if (irq == 0)</div><div class='ctx'> 		return(-1);</div><div class='del'>-	return irq_linear_revmap(cpm2_pic_host, irq);</div><div class='add'>+	return irq_find_mapping(cpm2_pic_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm2_pic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='hunk'>@@ -259,7 +259,8 @@ void cpm2_pic_init(struct device_node *node)</div><div class='ctx'> 	out_be32(&amp;cpm2_intctl-&gt;ic_scprrl, 0x05309770);</div><div class='ctx'> </div><div class='ctx'> 	/* create a legacy host */</div><div class='del'>-	cpm2_pic_host = irq_domain_add_linear(node, 64, &amp;cpm2_pic_host_ops, NULL);</div><div class='add'>+	cpm2_pic_host = irq_domain_create_linear(of_fwnode_handle(node), 64,</div><div class='add'>+						 &amp;cpm2_pic_host_ops, NULL);</div><div class='ctx'> 	if (cpm2_pic_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c<br/>index 47db732981a8..07ea605ab0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/cpm_common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/cpm_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/cpm_common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/cpm_common.c</a></div><div class='hunk'>@@ -28,10 +28,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mm/mmu_decl.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)</div><div class='del'>-#include &lt;linux/gpio/legacy-of-mm-gpiochip.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int __init cpm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='hunk'>@@ -91,32 +87,33 @@ void __init udbg_init_cpm(void)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+</div><div class='ctx'> struct cpm2_ioports {</div><div class='ctx'> 	u32 dir, par, sor, odr, dat;</div><div class='ctx'> 	u32 res[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cpm2_gpio32_chip {</div><div class='del'>-	struct of_mm_gpio_chip mm_gc;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *regs;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='ctx'> 	/* shadowed data register to clear/set bits safely */</div><div class='ctx'> 	u32 cpdata;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)</div><div class='add'>+static void cpm2_gpio32_save_regs(struct cpm2_gpio32_chip *cpm2_gc)</div><div class='ctx'> {</div><div class='del'>-	struct cpm2_gpio32_chip *cpm2_gc =</div><div class='del'>-		container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);</div><div class='del'>-	struct cpm2_ioports __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm2_ioports __iomem *iop = cpm2_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	cpm2_gc-&gt;cpdata = in_be32(&amp;iop-&gt;dat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='del'>-	struct cpm2_ioports __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);</div><div class='add'>+	struct cpm2_ioports __iomem *iop = cpm2_gc-&gt;regs;</div><div class='ctx'> 	u32 pin_mask;</div><div class='ctx'> </div><div class='ctx'> 	pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='hunk'>@@ -124,11 +121,9 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return !!(in_be32(&amp;iop-&gt;dat) &amp; pin_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,</div><div class='del'>-	int value)</div><div class='add'>+static void __cpm2_gpio32_set(struct cpm2_gpio32_chip *cpm2_gc, u32 pin_mask, int value)</div><div class='ctx'> {</div><div class='del'>-	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&amp;mm_gc-&gt;gc);</div><div class='del'>-	struct cpm2_ioports __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm2_ioports __iomem *iop = cpm2_gc-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	if (value)</div><div class='ctx'> 		cpm2_gc-&gt;cpdata |= pin_mask;</div><div class='hunk'>@@ -138,32 +133,32 @@ static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,</div><div class='ctx'> 	out_be32(&amp;iop-&gt;dat, cpm2_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm2_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	__cpm2_gpio32_set(mm_gc, pin_mask, value);</div><div class='add'>+	__cpm2_gpio32_set(cpm2_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm2_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);</div><div class='del'>-	struct cpm2_ioports __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm2_ioports __iomem *iop = cpm2_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpm2_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	setbits32(&amp;iop-&gt;dir, pin_mask);</div><div class='del'>-	__cpm2_gpio32_set(mm_gc, pin_mask, val);</div><div class='add'>+	__cpm2_gpio32_set(cpm2_gc, pin_mask, val);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm2_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -172,9 +167,8 @@ static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> </div><div class='ctx'> static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> {</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);</div><div class='del'>-	struct cpm2_ioports __iomem *iop = mm_gc-&gt;regs;</div><div class='add'>+	struct cpm2_ioports __iomem *iop = cpm2_gc-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 pin_mask = 1 &lt;&lt; (31 - gpio);</div><div class='ctx'> </div><div class='hunk'>@@ -191,19 +185,17 @@ int cpm2_gpiochip_add32(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = dev-&gt;of_node;</div><div class='ctx'> 	struct cpm2_gpio32_chip *cpm2_gc;</div><div class='del'>-	struct of_mm_gpio_chip *mm_gc;</div><div class='ctx'> 	struct gpio_chip *gc;</div><div class='ctx'> </div><div class='del'>-	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);</div><div class='add'>+	cpm2_gc = devm_kzalloc(dev, sizeof(*cpm2_gc), GFP_KERNEL);</div><div class='ctx'> 	if (!cpm2_gc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;cpm2_gc-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	mm_gc = &amp;cpm2_gc-&gt;mm_gc;</div><div class='del'>-	gc = &amp;mm_gc-&gt;gc;</div><div class='add'>+	gc = &amp;cpm2_gc-&gt;gc;</div><div class='ctx'> </div><div class='del'>-	mm_gc-&gt;save_regs = cpm2_gpio32_save_regs;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='ctx'> 	gc-&gt;ngpio = 32;</div><div class='ctx'> 	gc-&gt;direction_input = cpm2_gpio32_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm2_gpio32_dir_out;</div><div class='hunk'>@@ -212,6 +204,16 @@ int cpm2_gpiochip_add32(struct device *dev)</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-	return of_mm_gpiochip_add_data(np, mm_gc, cpm2_gc);</div><div class='add'>+	gc-&gt;label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);</div><div class='add'>+	if (!gc-&gt;label)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cpm2_gc-&gt;regs = devm_of_iomap(dev, np, 0, NULL);</div><div class='add'>+	if (IS_ERR(cpm2_gc-&gt;regs))</div><div class='add'>+		return PTR_ERR(cpm2_gc-&gt;regs);</div><div class='add'>+</div><div class='add'>+	cpm2_gpio32_save_regs(cpm2_gc);</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, gc, cpm2_gc);</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */</div><div class='head'>diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c<br/>index 70ce66eadff1..cb44a69958e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/dcr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/dcr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/dcr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/dcr.c</a></div><div class='hunk'>@@ -11,107 +11,6 @@</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;asm/dcr.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_DCR_MMIO</div><div class='del'>-static struct device_node *find_dcr_parent(struct device_node *node)</div><div class='del'>-{</div><div class='del'>-	struct device_node *par, *tmp;</div><div class='del'>-	const u32 *p;</div><div class='del'>-</div><div class='del'>-	for (par = of_node_get(node); par;) {</div><div class='del'>-		if (of_property_read_bool(par, "dcr-controller"))</div><div class='del'>-			break;</div><div class='del'>-		p = of_get_property(par, "dcr-parent", NULL);</div><div class='del'>-		tmp = par;</div><div class='del'>-		if (p == NULL)</div><div class='del'>-			par = of_get_parent(par);</div><div class='del'>-		else</div><div class='del'>-			par = of_find_node_by_phandle(*p);</div><div class='del'>-		of_node_put(tmp);</div><div class='del'>-	}</div><div class='del'>-	return par;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PPC_DCR_NATIVE) &amp;&amp; defined(CONFIG_PPC_DCR_MMIO)</div><div class='del'>-</div><div class='del'>-bool dcr_map_ok_generic(dcr_host_t host)</div><div class='del'>-{</div><div class='del'>-	if (host.type == DCR_HOST_NATIVE)</div><div class='del'>-		return dcr_map_ok_native(host.host.native);</div><div class='del'>-	else if (host.type == DCR_HOST_MMIO)</div><div class='del'>-		return dcr_map_ok_mmio(host.host.mmio);</div><div class='del'>-	else</div><div class='del'>-		return false;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_map_ok_generic);</div><div class='del'>-</div><div class='del'>-dcr_host_t dcr_map_generic(struct device_node *dev,</div><div class='del'>-			   unsigned int dcr_n,</div><div class='del'>-			   unsigned int dcr_c)</div><div class='del'>-{</div><div class='del'>-	dcr_host_t host;</div><div class='del'>-	struct device_node *dp;</div><div class='del'>-	const char *prop;</div><div class='del'>-</div><div class='del'>-	host.type = DCR_HOST_INVALID;</div><div class='del'>-</div><div class='del'>-	dp = find_dcr_parent(dev);</div><div class='del'>-	if (dp == NULL)</div><div class='del'>-		return host;</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(dp, "dcr-access-method", NULL);</div><div class='del'>-</div><div class='del'>-	pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);</div><div class='del'>-</div><div class='del'>-	if (!strcmp(prop, "native")) {</div><div class='del'>-		host.type = DCR_HOST_NATIVE;</div><div class='del'>-		host.host.native = dcr_map_native(dev, dcr_n, dcr_c);</div><div class='del'>-	} else if (!strcmp(prop, "mmio")) {</div><div class='del'>-		host.type = DCR_HOST_MMIO;</div><div class='del'>-		host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	of_node_put(dp);</div><div class='del'>-	return host;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_map_generic);</div><div class='del'>-</div><div class='del'>-void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)</div><div class='del'>-{</div><div class='del'>-	if (host.type == DCR_HOST_NATIVE)</div><div class='del'>-		dcr_unmap_native(host.host.native, dcr_c);</div><div class='del'>-	else if (host.type == DCR_HOST_MMIO)</div><div class='del'>-		dcr_unmap_mmio(host.host.mmio, dcr_c);</div><div class='del'>-	else /* host.type == DCR_HOST_INVALID */</div><div class='del'>-		WARN_ON(true);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_unmap_generic);</div><div class='del'>-</div><div class='del'>-u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)</div><div class='del'>-{</div><div class='del'>-	if (host.type == DCR_HOST_NATIVE)</div><div class='del'>-		return dcr_read_native(host.host.native, dcr_n);</div><div class='del'>-	else if (host.type == DCR_HOST_MMIO)</div><div class='del'>-		return dcr_read_mmio(host.host.mmio, dcr_n);</div><div class='del'>-	else /* host.type == DCR_HOST_INVALID */</div><div class='del'>-		WARN_ON(true);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_read_generic);</div><div class='del'>-</div><div class='del'>-void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)</div><div class='del'>-{</div><div class='del'>-	if (host.type == DCR_HOST_NATIVE)</div><div class='del'>-		dcr_write_native(host.host.native, dcr_n, value);</div><div class='del'>-	else if (host.type == DCR_HOST_MMIO)</div><div class='del'>-		dcr_write_mmio(host.host.mmio, dcr_n, value);</div><div class='del'>-	else /* host.type == DCR_HOST_INVALID */</div><div class='del'>-		WARN_ON(true);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_write_generic);</div><div class='del'>-</div><div class='del'>-#endif /* defined(CONFIG_PPC_DCR_NATIVE) &amp;&amp; defined(CONFIG_PPC_DCR_MMIO) */</div><div class='del'>-</div><div class='ctx'> unsigned int dcr_resource_start(const struct device_node *np,</div><div class='ctx'> 				unsigned int index)</div><div class='ctx'> {</div><div class='hunk'>@@ -137,86 +36,5 @@ unsigned int dcr_resource_len(const struct device_node *np, unsigned int index)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dcr_resource_len);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PPC_DCR_MMIO</div><div class='del'>-</div><div class='del'>-static u64 of_translate_dcr_address(struct device_node *dev,</div><div class='del'>-				    unsigned int dcr_n,</div><div class='del'>-				    unsigned int *out_stride)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dp;</div><div class='del'>-	const u32 *p;</div><div class='del'>-	unsigned int stride;</div><div class='del'>-	u64 ret = OF_BAD_ADDR;</div><div class='del'>-</div><div class='del'>-	dp = find_dcr_parent(dev);</div><div class='del'>-	if (dp == NULL)</div><div class='del'>-		return OF_BAD_ADDR;</div><div class='del'>-</div><div class='del'>-	/* Stride is not properly defined yet, default to 0x10 for Axon */</div><div class='del'>-	p = of_get_property(dp, "dcr-mmio-stride", NULL);</div><div class='del'>-	stride = (p == NULL) ? 0x10 : *p;</div><div class='del'>-</div><div class='del'>-	/* XXX FIXME: Which property name is to use of the 2 following ? */</div><div class='del'>-	p = of_get_property(dp, "dcr-mmio-range", NULL);</div><div class='del'>-	if (p == NULL)</div><div class='del'>-		p = of_get_property(dp, "dcr-mmio-space", NULL);</div><div class='del'>-	if (p == NULL)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	/* Maybe could do some better range checking here */</div><div class='del'>-	ret = of_translate_address(dp, p);</div><div class='del'>-	if (ret != OF_BAD_ADDR)</div><div class='del'>-		ret += (u64)(stride) * (u64)dcr_n;</div><div class='del'>-	if (out_stride)</div><div class='del'>-		*out_stride = stride;</div><div class='del'>-</div><div class='del'>- done:</div><div class='del'>-	of_node_put(dp);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,</div><div class='del'>-			     unsigned int dcr_n,</div><div class='del'>-			     unsigned int dcr_c)</div><div class='del'>-{</div><div class='del'>-	dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };</div><div class='del'>-	u64 addr;</div><div class='del'>-</div><div class='del'>-	pr_debug("dcr_map(%pOF, 0x%x, 0x%x)\n",</div><div class='del'>-		 dev, dcr_n, dcr_c);</div><div class='del'>-</div><div class='del'>-	addr = of_translate_dcr_address(dev, dcr_n, &amp;ret.stride);</div><div class='del'>-	pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",</div><div class='del'>-		 (unsigned long long) addr, ret.stride);</div><div class='del'>-	if (addr == OF_BAD_ADDR)</div><div class='del'>-		return ret;</div><div class='del'>-	pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);</div><div class='del'>-	ret.token = ioremap(addr, dcr_c * ret.stride);</div><div class='del'>-	if (ret.token == NULL)</div><div class='del'>-		return ret;</div><div class='del'>-	pr_debug("mapped at 0x%p -&gt; base is 0x%p\n",</div><div class='del'>-		 ret.token, ret.token - dcr_n * ret.stride);</div><div class='del'>-	ret.token -= dcr_n * ret.stride;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_map_mmio);</div><div class='del'>-</div><div class='del'>-void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)</div><div class='del'>-{</div><div class='del'>-	dcr_host_mmio_t h = host;</div><div class='del'>-</div><div class='del'>-	if (h.token == NULL)</div><div class='del'>-		return;</div><div class='del'>-	h.token += host.base * h.stride;</div><div class='del'>-	iounmap(h.token);</div><div class='del'>-	h.token = NULL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(dcr_unmap_mmio);</div><div class='del'>-</div><div class='del'>-#endif /* defined(CONFIG_PPC_DCR_MMIO) */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PPC_DCR_NATIVE</div><div class='ctx'> DEFINE_SPINLOCK(dcr_ind_lock);</div><div class='ctx'> EXPORT_SYMBOL_GPL(dcr_ind_lock);</div><div class='del'>-#endif	/* defined(CONFIG_PPC_DCR_NATIVE) */</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c<br/>index 040827671d21..b6f9774038e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ehv_pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ehv_pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ehv_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/ehv_pic.c</a></div><div class='hunk'>@@ -175,7 +175,7 @@ unsigned int ehv_pic_get_irq(void)</div><div class='ctx'> 	 * this will also setup revmap[] in the slow path for the first</div><div class='ctx'> 	 * time, next calls will always use fast path by indexing revmap</div><div class='ctx'> 	 */</div><div class='del'>-	return irq_linear_revmap(global_ehv_pic-&gt;irqhost, irq);</div><div class='add'>+	return irq_find_mapping(global_ehv_pic-&gt;irqhost, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node,</div><div class='hunk'>@@ -269,8 +269,9 @@ void __init ehv_pic_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ehv_pic-&gt;irqhost = irq_domain_add_linear(np, NR_EHV_PIC_INTS,</div><div class='del'>-						 &amp;ehv_pic_host_ops, ehv_pic);</div><div class='add'>+	ehv_pic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+						    NR_EHV_PIC_INTS,</div><div class='add'>+						    &amp;ehv_pic_host_ops, ehv_pic);</div><div class='ctx'> 	if (!ehv_pic-&gt;irqhost) {</div><div class='ctx'> 		of_node_put(np);</div><div class='ctx'> 		kfree(ehv_pic);</div><div class='hunk'>@@ -291,5 +292,5 @@ void __init ehv_pic_init(void)</div><div class='ctx'> 	ehv_pic-&gt;coreint_flag = of_property_read_bool(np, "has-external-proxy");</div><div class='ctx'> </div><div class='ctx'> 	global_ehv_pic = ehv_pic;</div><div class='del'>-	irq_set_default_host(global_ehv_pic-&gt;irqhost);</div><div class='add'>+	irq_set_default_domain(global_ehv_pic-&gt;irqhost);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c b/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c<br/>index ce6c739c51e5..06d9101a5d49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c</a></div><div class='hunk'>@@ -75,7 +75,7 @@ static ssize_t fsl_timer_wakeup_store(struct device *dev,</div><div class='ctx'> 	if (kstrtoll(buf, 0, &amp;interval))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;sysfs_lock);</div><div class='add'>+	guard(mutex)(&amp;sysfs_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (fsl_wakeup-&gt;timer) {</div><div class='ctx'> 		disable_irq_wake(fsl_wakeup-&gt;timer-&gt;irq);</div><div class='hunk'>@@ -83,31 +83,23 @@ static ssize_t fsl_timer_wakeup_store(struct device *dev,</div><div class='ctx'> 		fsl_wakeup-&gt;timer = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!interval) {</div><div class='del'>-		mutex_unlock(&amp;sysfs_lock);</div><div class='add'>+	if (!interval)</div><div class='ctx'> 		return count;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	fsl_wakeup-&gt;timer = mpic_request_timer(fsl_mpic_timer_irq,</div><div class='ctx'> 						fsl_wakeup, interval);</div><div class='del'>-	if (!fsl_wakeup-&gt;timer) {</div><div class='del'>-		mutex_unlock(&amp;sysfs_lock);</div><div class='add'>+	if (!fsl_wakeup-&gt;timer)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = enable_irq_wake(fsl_wakeup-&gt;timer-&gt;irq);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mpic_free_timer(fsl_wakeup-&gt;timer);</div><div class='ctx'> 		fsl_wakeup-&gt;timer = NULL;</div><div class='del'>-		mutex_unlock(&amp;sysfs_lock);</div><div class='del'>-</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mpic_start_timer(fsl_wakeup-&gt;timer);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;sysfs_lock);</div><div class='del'>-</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c<br/>index 1aa0cb097c9c..2a007bfb038d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/fsl_msi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/fsl_msi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/fsl_msi.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/fsl_msi.c</a></div><div class='hunk'>@@ -75,7 +75,7 @@ static void fsl_msi_print_chip(struct irq_data *irqd, struct seq_file *p)</div><div class='ctx'> 	srs = (hwirq &gt;&gt; msi_data-&gt;srs_shift) &amp; MSI_SRS_MASK;</div><div class='ctx'> 	cascade_virq = msi_data-&gt;cascade_array[srs]-&gt;virq;</div><div class='ctx'> </div><div class='del'>-	seq_printf(p, " fsl-msi-%d", cascade_virq);</div><div class='add'>+	seq_printf(p, "fsl-msi-%d", cascade_virq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -412,9 +412,8 @@ static int fsl_of_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	platform_set_drvdata(dev, msi);</div><div class='ctx'> </div><div class='del'>-	msi-&gt;irqhost = irq_domain_add_linear(dev-&gt;dev.of_node,</div><div class='del'>-				      NR_MSI_IRQS_MAX, &amp;fsl_msi_host_ops, msi);</div><div class='del'>-</div><div class='add'>+	msi-&gt;irqhost = irq_domain_create_linear(dev_fwnode(&amp;dev-&gt;dev), NR_MSI_IRQS_MAX,</div><div class='add'>+						&amp;fsl_msi_host_ops, msi);</div><div class='ctx'> 	if (msi-&gt;irqhost == NULL) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;dev, "No memory for MSI irqhost\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='head'>diff --git a/arch/powerpc/sysdev/ge/ge_pic.c b/arch/powerpc/sysdev/ge/ge_pic.c<br/>index a6c424680c37..0bc3f0b36528 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ge/ge_pic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ge/ge_pic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ge/ge_pic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/ge/ge_pic.c</a></div><div class='hunk'>@@ -214,8 +214,9 @@ void __init gef_pic_init(struct device_node *np)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup an irq_domain structure */</div><div class='del'>-	gef_pic_irq_host = irq_domain_add_linear(np, GEF_PIC_NUM_IRQS,</div><div class='del'>-					  &amp;gef_pic_host_ops, NULL);</div><div class='add'>+	gef_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+						    GEF_PIC_NUM_IRQS,</div><div class='add'>+						    &amp;gef_pic_host_ops, NULL);</div><div class='ctx'> 	if (gef_pic_irq_host == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -244,7 +245,7 @@ unsigned int gef_pic_get_irq(void)</div><div class='ctx'> 			if (active &amp; (0x1 &lt;&lt; hwirq))</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='del'>-		virq = irq_linear_revmap(gef_pic_irq_host,</div><div class='add'>+		virq = irq_find_mapping(gef_pic_irq_host,</div><div class='ctx'> 			(irq_hw_number_t)hwirq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c<br/>index 06e391485da7..99bb2b916949 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/i8259.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/i8259.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/i8259.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/i8259.c</a></div><div class='hunk'>@@ -260,8 +260,8 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;i8259_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* create a legacy host */</div><div class='del'>-	i8259_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,</div><div class='del'>-					   &amp;i8259_host_ops, NULL);</div><div class='add'>+	i8259_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,</div><div class='add'>+					      &amp;i8259_host_ops, NULL);</div><div class='ctx'> 	if (i8259_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "i8259: failed to allocate irq host !\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c<br/>index 5f69e2d50f26..70be2105865d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ipic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/ipic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/ipic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/ipic.c</a></div><div class='hunk'>@@ -711,8 +711,9 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)</div><div class='ctx'> 	if (ipic == NULL)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	ipic-&gt;irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,</div><div class='del'>-					      &amp;ipic_host_ops, ipic);</div><div class='add'>+	ipic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+						 NR_IPIC_INTS,</div><div class='add'>+						 &amp;ipic_host_ops, ipic);</div><div class='ctx'> 	if (ipic-&gt;irqhost == NULL) {</div><div class='ctx'> 		kfree(ipic);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -757,13 +758,12 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)</div><div class='ctx'> 	ipic_write(ipic-&gt;regs, IPIC_SEMSR, temp);</div><div class='ctx'> </div><div class='ctx'> 	primary_ipic = ipic;</div><div class='del'>-	irq_set_default_host(primary_ipic-&gt;irqhost);</div><div class='add'>+	irq_set_default_domain(primary_ipic-&gt;irqhost);</div><div class='ctx'> </div><div class='ctx'> 	ipic_write(ipic-&gt;regs, IPIC_SIMSR_H, 0);</div><div class='ctx'> 	ipic_write(ipic-&gt;regs, IPIC_SIMSR_L, 0);</div><div class='ctx'> </div><div class='del'>-	printk ("IPIC (%d IRQ sources) at %p\n", NR_IPIC_INTS,</div><div class='del'>-			primary_ipic-&gt;regs);</div><div class='add'>+	pr_info("IPIC (%d IRQ sources) at MMIO %pa\n", NR_IPIC_INTS, &amp;res.start);</div><div class='ctx'> </div><div class='ctx'> 	return ipic;</div><div class='ctx'> }</div><div class='hunk'>@@ -801,7 +801,7 @@ unsigned int ipic_get_irq(void)</div><div class='ctx'> 	if (irq == 0)    /* 0 --&gt; no irq is pending */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(primary_ipic-&gt;irqhost, irq);</div><div class='add'>+	return irq_find_mapping(primary_ipic-&gt;irqhost, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SUSPEND</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c<br/>index d94cf36b0f65..ad7310bba00b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/mpic.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/mpic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/mpic.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/mpic.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='hunk'>@@ -474,9 +475,9 @@ static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,</div><div class='ctx'> 		addr = addr | ((u64)readl(base + HT_MSI_ADDR_HI) &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "mpic:   - HT:%02x.%x %s MSI mapping found @ 0x%llx\n",</div><div class='del'>-		PCI_SLOT(devfn), PCI_FUNC(devfn),</div><div class='del'>-		flags &amp; HT_MSI_FLAGS_ENABLE ? "enabled" : "disabled", addr);</div><div class='add'>+	pr_debug("mpic:   - HT:%02x.%x %s MSI mapping found @ 0x%llx\n",</div><div class='add'>+		 PCI_SLOT(devfn), PCI_FUNC(devfn),</div><div class='add'>+		 str_enabled_disabled(flags &amp; HT_MSI_FLAGS_ENABLE), addr);</div><div class='ctx'> </div><div class='ctx'> 	if (!(flags &amp; HT_MSI_FLAGS_ENABLE))</div><div class='ctx'> 		writeb(flags | HT_MSI_FLAGS_ENABLE, base + HT_MSI_FLAGS);</div><div class='hunk'>@@ -1483,9 +1484,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,</div><div class='ctx'> 	mpic-&gt;isu_shift = 1 + __ilog2(mpic-&gt;isu_size - 1);</div><div class='ctx'> 	mpic-&gt;isu_mask = (1 &lt;&lt; mpic-&gt;isu_shift) - 1;</div><div class='ctx'> </div><div class='del'>-	mpic-&gt;irqhost = irq_domain_add_linear(mpic-&gt;node,</div><div class='del'>-				       intvec_top,</div><div class='del'>-				       &amp;mpic_host_ops, mpic);</div><div class='add'>+	mpic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(mpic-&gt;node),</div><div class='add'>+						 intvec_top,</div><div class='add'>+						 &amp;mpic_host_ops, mpic);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: The code leaks the MPIC object and mappings here; this</div><div class='hunk'>@@ -1520,7 +1521,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,</div><div class='ctx'> </div><div class='ctx'> 	if (!(mpic-&gt;flags &amp; MPIC_SECONDARY)) {</div><div class='ctx'> 		mpic_primary = mpic;</div><div class='del'>-		irq_set_default_host(mpic-&gt;irqhost);</div><div class='add'>+		irq_set_default_domain(mpic-&gt;irqhost);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return mpic;</div><div class='hunk'>@@ -1785,7 +1786,7 @@ static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(mpic-&gt;irqhost, src);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned int mpic_get_one_irq(struct mpic *mpic)</div><div class='hunk'>@@ -1823,7 +1824,7 @@ unsigned int mpic_get_coreint_irq(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(mpic-&gt;irqhost, src);</div><div class='ctx'> #else</div><div class='ctx'> 	return 0;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c<br/>index 0b6e37f3ffb8..456a4f64ae0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/msi_bitmap.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/msi_bitmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/msi_bitmap.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/msi_bitmap.c</a></div><div class='hunk'>@@ -124,10 +124,7 @@ int __ref msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,</div><div class='ctx'> 	if (bmp-&gt;bitmap_from_slab)</div><div class='ctx'> 		bmp-&gt;bitmap = kzalloc(size, GFP_KERNEL);</div><div class='ctx'> 	else {</div><div class='del'>-		bmp-&gt;bitmap = memblock_alloc(size, SMP_CACHE_BYTES);</div><div class='del'>-		if (!bmp-&gt;bitmap)</div><div class='del'>-			panic("%s: Failed to allocate %u bytes\n", __func__,</div><div class='del'>-			      size);</div><div class='add'>+		bmp-&gt;bitmap = memblock_alloc_or_panic(size, SMP_CACHE_BYTES);</div><div class='ctx'> 		/* the bitmap won't be freed from memblock allocator */</div><div class='ctx'> 		kmemleak_not_leak(bmp-&gt;bitmap);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c<br/>deleted file mode 100644<br/>index 2511e586fe31..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/pmi.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/pmi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,267 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * pmi driver</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Deutschland Entwicklung GmbH 2005</div><div class='del'>- *</div><div class='del'>- * PMI (Platform Management Interrupt) is a way to communicate</div><div class='del'>- * with the BMC (Baseboard Management Controller) via interrupts.</div><div class='del'>- * Unlike IPMI it is bidirectional and has a low latency.</div><div class='del'>- *</div><div class='del'>- * Author: Christian Krafft &lt;krafft@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mod_devicetable.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pmi.h&gt;</div><div class='del'>-</div><div class='del'>-struct pmi_data {</div><div class='del'>-	struct list_head	handler;</div><div class='del'>-	spinlock_t		handler_spinlock;</div><div class='del'>-	spinlock_t		pmi_spinlock;</div><div class='del'>-	struct mutex		msg_mutex;</div><div class='del'>-	pmi_message_t		msg;</div><div class='del'>-	struct completion	*completion;</div><div class='del'>-	struct platform_device	*dev;</div><div class='del'>-	int			irq;</div><div class='del'>-	u8 __iomem		*pmi_reg;</div><div class='del'>-	struct work_struct	work;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmi_data *data;</div><div class='del'>-</div><div class='del'>-static irqreturn_t pmi_irq_handler(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	u8 type;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;data-&gt;pmi_spinlock);</div><div class='del'>-</div><div class='del'>-	type = ioread8(data-&gt;pmi_reg + PMI_READ_TYPE);</div><div class='del'>-	pr_debug("pmi: got message of type %d\n", type);</div><div class='del'>-</div><div class='del'>-	if (type &amp; PMI_ACK &amp;&amp; !data-&gt;completion) {</div><div class='del'>-		printk(KERN_WARNING "pmi: got unexpected ACK message.\n");</div><div class='del'>-		rc = -EIO;</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data-&gt;completion &amp;&amp; !(type &amp; PMI_ACK)) {</div><div class='del'>-		printk(KERN_WARNING "pmi: expected ACK, but got %d\n", type);</div><div class='del'>-		rc = -EIO;</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data-&gt;msg.type = type;</div><div class='del'>-	data-&gt;msg.data0 = ioread8(data-&gt;pmi_reg + PMI_READ_DATA0);</div><div class='del'>-	data-&gt;msg.data1 = ioread8(data-&gt;pmi_reg + PMI_READ_DATA1);</div><div class='del'>-	data-&gt;msg.data2 = ioread8(data-&gt;pmi_reg + PMI_READ_DATA2);</div><div class='del'>-	rc = 0;</div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock(&amp;data-&gt;pmi_spinlock);</div><div class='del'>-</div><div class='del'>-	if (rc == -EIO) {</div><div class='del'>-		rc = IRQ_HANDLED;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data-&gt;msg.type &amp; PMI_ACK) {</div><div class='del'>-		complete(data-&gt;completion);</div><div class='del'>-		rc = IRQ_HANDLED;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;data-&gt;work);</div><div class='del'>-</div><div class='del'>-	rc = IRQ_HANDLED;</div><div class='del'>-out:</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct of_device_id pmi_match[] = {</div><div class='del'>-	{ .type = "ibm,pmi", .name = "ibm,pmi" },</div><div class='del'>-	{ .type = "ibm,pmi" },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(of, pmi_match);</div><div class='del'>-</div><div class='del'>-static void pmi_notify_handlers(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct pmi_handler *handler;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-	list_for_each_entry(handler, &amp;data-&gt;handler, node) {</div><div class='del'>-		pr_debug("pmi: notifying handler %p\n", handler);</div><div class='del'>-		if (handler-&gt;type == data-&gt;msg.type)</div><div class='del'>-			handler-&gt;handle_pmi_message(data-&gt;msg);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pmi_of_probe(struct platform_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np = dev-&gt;dev.of_node;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (data) {</div><div class='del'>-		printk(KERN_ERR "pmi: driver has already been initialized.\n");</div><div class='del'>-		rc = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data = kzalloc(sizeof(struct pmi_data), GFP_KERNEL);</div><div class='del'>-	if (!data) {</div><div class='del'>-		printk(KERN_ERR "pmi: could not allocate memory.\n");</div><div class='del'>-		rc = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data-&gt;pmi_reg = of_iomap(np, 0);</div><div class='del'>-	if (!data-&gt;pmi_reg) {</div><div class='del'>-		printk(KERN_ERR "pmi: invalid register address.\n");</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		goto error_cleanup_data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;data-&gt;handler);</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;data-&gt;msg_mutex);</div><div class='del'>-	spin_lock_init(&amp;data-&gt;pmi_spinlock);</div><div class='del'>-	spin_lock_init(&amp;data-&gt;handler_spinlock);</div><div class='del'>-</div><div class='del'>-	INIT_WORK(&amp;data-&gt;work, pmi_notify_handlers);</div><div class='del'>-</div><div class='del'>-	data-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-	data-&gt;irq = irq_of_parse_and_map(np, 0);</div><div class='del'>-	if (!data-&gt;irq) {</div><div class='del'>-		printk(KERN_ERR "pmi: invalid interrupt.\n");</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		goto error_cleanup_iomap;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = request_irq(data-&gt;irq, pmi_irq_handler, 0, "pmi", NULL);</div><div class='del'>-	if (rc) {</div><div class='del'>-		printk(KERN_ERR "pmi: can't request IRQ %d: returned %d\n",</div><div class='del'>-				data-&gt;irq, rc);</div><div class='del'>-		goto error_cleanup_iomap;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "pmi: found pmi device at addr %p.\n", data-&gt;pmi_reg);</div><div class='del'>-</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-error_cleanup_iomap:</div><div class='del'>-	iounmap(data-&gt;pmi_reg);</div><div class='del'>-</div><div class='del'>-error_cleanup_data:</div><div class='del'>-	kfree(data);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pmi_of_remove(struct platform_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pmi_handler *handler, *tmp;</div><div class='del'>-</div><div class='del'>-	free_irq(data-&gt;irq, NULL);</div><div class='del'>-	iounmap(data-&gt;pmi_reg);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(handler, tmp, &amp;data-&gt;handler, node)</div><div class='del'>-		list_del(&amp;handler-&gt;node);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-</div><div class='del'>-	kfree(data);</div><div class='del'>-	data = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver pmi_of_platform_driver = {</div><div class='del'>-	.probe		= pmi_of_probe,</div><div class='del'>-	.remove		= pmi_of_remove,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "pmi",</div><div class='del'>-		.of_match_table = pmi_match,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-module_platform_driver(pmi_of_platform_driver);</div><div class='del'>-</div><div class='del'>-int pmi_send_message(pmi_message_t msg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	DECLARE_COMPLETION_ONSTACK(completion);</div><div class='del'>-</div><div class='del'>-	if (!data)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;data-&gt;msg_mutex);</div><div class='del'>-</div><div class='del'>-	data-&gt;msg = msg;</div><div class='del'>-	pr_debug("pmi_send_message: msg is %08x\n", *(u32*)&amp;msg);</div><div class='del'>-</div><div class='del'>-	data-&gt;completion = &amp;completion;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;data-&gt;pmi_spinlock, flags);</div><div class='del'>-	iowrite8(msg.data0, data-&gt;pmi_reg + PMI_WRITE_DATA0);</div><div class='del'>-	iowrite8(msg.data1, data-&gt;pmi_reg + PMI_WRITE_DATA1);</div><div class='del'>-	iowrite8(msg.data2, data-&gt;pmi_reg + PMI_WRITE_DATA2);</div><div class='del'>-	iowrite8(msg.type, data-&gt;pmi_reg + PMI_WRITE_TYPE);</div><div class='del'>-	spin_unlock_irqrestore(&amp;data-&gt;pmi_spinlock, flags);</div><div class='del'>-</div><div class='del'>-	pr_debug("pmi_send_message: wait for completion\n");</div><div class='del'>-</div><div class='del'>-	wait_for_completion_interruptible_timeout(data-&gt;completion,</div><div class='del'>-						  PMI_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	data-&gt;completion = NULL;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;data-&gt;msg_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(pmi_send_message);</div><div class='del'>-</div><div class='del'>-int pmi_register_handler(struct pmi_handler *handler)</div><div class='del'>-{</div><div class='del'>-	if (!data)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-	list_add_tail(&amp;handler-&gt;node, &amp;data-&gt;handler);</div><div class='del'>-	spin_unlock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(pmi_register_handler);</div><div class='del'>-</div><div class='del'>-void pmi_unregister_handler(struct pmi_handler *handler)</div><div class='del'>-{</div><div class='del'>-	if (!data)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pr_debug("pmi: unregistering handler %p\n", handler);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-	list_del(&amp;handler-&gt;node);</div><div class='del'>-	spin_unlock(&amp;data-&gt;handler_spinlock);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(pmi_unregister_handler);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Christian Krafft &lt;krafft@de.ibm.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("IBM Platform Management Interrupt driver");</div><div class='head'>diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c<br/>index 0e42f7bad7db..07d0f6a83879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/tsi108_pci.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/tsi108_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/tsi108_pci.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/tsi108_pci.c</a></div><div class='hunk'>@@ -404,8 +404,8 @@ void __init tsi108_pci_int_init(struct device_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");</div><div class='ctx'> </div><div class='del'>-	pci_irq_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,</div><div class='del'>-					     &amp;pci_irq_domain_ops, NULL);</div><div class='add'>+	pci_irq_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,</div><div class='add'>+						&amp;pci_irq_domain_ops, NULL);</div><div class='ctx'> 	if (pci_irq_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c<br/>index 700b67476a7d..4e89158a577c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xics/icp-native.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xics/icp-native.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xics/icp-native.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/xics/icp-native.c</a></div><div class='hunk'>@@ -145,27 +145,6 @@ static void icp_native_cause_ipi(int cpu)</div><div class='ctx'> 	icp_native_set_qirr(cpu, IPI_PRIORITY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE</div><div class='del'>-void icp_native_cause_ipi_rm(int cpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Currently not used to send IPIs to another CPU</div><div class='del'>-	 * on the same core. Only caller is KVM real mode.</div><div class='del'>-	 * Need the physical address of the XICS to be</div><div class='del'>-	 * previously saved in kvm_hstate in the paca.</div><div class='del'>-	 */</div><div class='del'>-	void __iomem *xics_phys;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Just like the cause_ipi functions, it is required to</div><div class='del'>-	 * include a full barrier before causing the IPI.</div><div class='del'>-	 */</div><div class='del'>-	xics_phys = paca_ptrs[cpu]-&gt;kvm_hstate.xics_phys;</div><div class='del'>-	mb();</div><div class='del'>-	__raw_rm_writeb(IPI_PRIORITY, xics_phys + XICS_MFRR);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Called when an interrupt is received on an off-line CPU to</div><div class='ctx'>  * clear the interrupt, so that the CPU can go back to nap mode.</div><div class='head'>diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c<br/>index d3a4156e8788..c3fa539a9898 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xics/xics-common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xics/xics-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xics/xics-common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/xics/xics-common.c</a></div><div class='hunk'>@@ -472,7 +472,7 @@ static int __init xics_allocate_domain(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_set_default_host(xics_host);</div><div class='add'>+	irq_set_default_domain(xics_host);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c<br/>index fa01818c1972..625361a15424 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xive/common.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xive/common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xive/common.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/xive/common.c</a></div><div class='hunk'>@@ -317,7 +317,7 @@ int xmon_xive_get_irq_config(u32 hw_irq, struct irq_data *d)</div><div class='ctx'> 	if (d) {</div><div class='ctx'> 		char buffer[128];</div><div class='ctx'> </div><div class='del'>-		xive_irq_data_dump(irq_data_get_irq_handler_data(d),</div><div class='add'>+		xive_irq_data_dump(irq_data_get_irq_chip_data(d),</div><div class='ctx'> 				   buffer, sizeof(buffer));</div><div class='ctx'> 		xmon_printf("%s", buffer);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -437,7 +437,7 @@ static void xive_do_source_eoi(struct xive_irq_data *xd)</div><div class='ctx'> /* irq_chip eoi callback, called with irq descriptor lock held */</div><div class='ctx'> static void xive_irq_eoi(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	struct xive_cpu *xc = __this_cpu_read(xive_cpu);</div><div class='ctx'> </div><div class='ctx'> 	DBG_VERBOSE("eoi_irq: irq=%d [0x%lx] pending=%02x\n",</div><div class='hunk'>@@ -595,7 +595,7 @@ static int xive_pick_irq_target(struct irq_data *d,</div><div class='ctx'> 				const struct cpumask *affinity)</div><div class='ctx'> {</div><div class='ctx'> 	static unsigned int fuzz;</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	cpumask_var_t mask;</div><div class='ctx'> 	int cpu = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -628,7 +628,7 @@ static int xive_pick_irq_target(struct irq_data *d,</div><div class='ctx'> </div><div class='ctx'> static unsigned int xive_irq_startup(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);</div><div class='ctx'> 	int target, rc;</div><div class='ctx'> </div><div class='hunk'>@@ -673,7 +673,7 @@ static unsigned int xive_irq_startup(struct irq_data *d)</div><div class='ctx'> /* called with irq descriptor lock held */</div><div class='ctx'> static void xive_irq_shutdown(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: irq %d [0x%x] data @%p\n", __func__, d-&gt;irq, hw_irq, d);</div><div class='hunk'>@@ -698,7 +698,7 @@ static void xive_irq_shutdown(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> static void xive_irq_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: irq %d data @%p\n", __func__, d-&gt;irq, xd);</div><div class='ctx'> </div><div class='hunk'>@@ -707,7 +707,7 @@ static void xive_irq_unmask(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> static void xive_irq_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: irq %d data @%p\n", __func__, d-&gt;irq, xd);</div><div class='ctx'> </div><div class='hunk'>@@ -718,7 +718,7 @@ static int xive_irq_set_affinity(struct irq_data *d,</div><div class='ctx'> 				 const struct cpumask *cpumask,</div><div class='ctx'> 				 bool force)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);</div><div class='ctx'> 	u32 target, old_target;</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -726,7 +726,7 @@ static int xive_irq_set_affinity(struct irq_data *d,</div><div class='ctx'> 	pr_debug("%s: irq %d/0x%x\n", __func__, d-&gt;irq, hw_irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Is this valid ? */</div><div class='del'>-	if (cpumask_any_and(cpumask, cpu_online_mask) &gt;= nr_cpu_ids)</div><div class='add'>+	if (!cpumask_intersects(cpumask, cpu_online_mask))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -776,7 +776,7 @@ static int xive_irq_set_affinity(struct irq_data *d,</div><div class='ctx'> </div><div class='ctx'> static int xive_irq_set_type(struct irq_data *d, unsigned int flow_type)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We only support these. This has really no effect other than setting</div><div class='hunk'>@@ -815,7 +815,7 @@ static int xive_irq_set_type(struct irq_data *d, unsigned int flow_type)</div><div class='ctx'> </div><div class='ctx'> static int xive_irq_retrigger(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> </div><div class='ctx'> 	/* This should be only for MSIs */</div><div class='ctx'> 	if (WARN_ON(xd-&gt;flags &amp; XIVE_IRQ_FLAG_LSI))</div><div class='hunk'>@@ -837,7 +837,7 @@ static int xive_irq_retrigger(struct irq_data *d)</div><div class='ctx'>  */</div><div class='ctx'> static int xive_irq_set_vcpu_affinity(struct irq_data *d, void *state)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	u8 pq;</div><div class='hunk'>@@ -951,7 +951,7 @@ static int xive_irq_set_vcpu_affinity(struct irq_data *d, void *state)</div><div class='ctx'> static int xive_get_irqchip_state(struct irq_data *data,</div><div class='ctx'> 				  enum irqchip_irq_state which, bool *state)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_data_get_irq_handler_data(data);</div><div class='add'>+	struct xive_irq_data *xd = irq_data_get_irq_chip_data(data);</div><div class='ctx'> 	u8 pq;</div><div class='ctx'> </div><div class='ctx'> 	switch (which) {</div><div class='hunk'>@@ -1011,21 +1011,20 @@ void xive_cleanup_irq_data(struct xive_irq_data *xd)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(xive_cleanup_irq_data);</div><div class='ctx'> </div><div class='del'>-static int xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw)</div><div class='add'>+static struct xive_irq_data *xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct xive_irq_data *xd;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	xd = kzalloc(sizeof(struct xive_irq_data), GFP_KERNEL);</div><div class='ctx'> 	if (!xd)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	rc = xive_ops-&gt;populate_irq_data(hw, xd);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		kfree(xd);</div><div class='del'>-		return rc;</div><div class='add'>+		return ERR_PTR(rc);</div><div class='ctx'> 	}</div><div class='ctx'> 	xd-&gt;target = XIVE_INVALID_TARGET;</div><div class='del'>-	irq_set_handler_data(virq, xd);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Turn OFF by default the interrupt being mapped. A side</div><div class='hunk'>@@ -1036,20 +1035,19 @@ static int xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	xive_esb_read(xd, XIVE_ESB_SET_PQ_01);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return xd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void xive_irq_free_data(unsigned int virq)</div><div class='add'>+static void xive_irq_free_data(unsigned int virq)</div><div class='ctx'> {</div><div class='del'>-	struct xive_irq_data *xd = irq_get_handler_data(virq);</div><div class='add'>+	struct xive_irq_data *xd = irq_get_chip_data(virq);</div><div class='ctx'> </div><div class='ctx'> 	if (!xd)</div><div class='ctx'> 		return;</div><div class='del'>-	irq_set_handler_data(virq, NULL);</div><div class='add'>+	irq_set_chip_data(virq, NULL);</div><div class='ctx'> 	xive_cleanup_irq_data(xd);</div><div class='ctx'> 	kfree(xd);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(xive_irq_free_data);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> </div><div class='hunk'>@@ -1286,7 +1284,7 @@ void __init xive_smp_probe(void)</div><div class='ctx'> static int xive_irq_domain_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 			       irq_hw_number_t hw)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='add'>+	struct xive_irq_data *xd;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mark interrupts as edge sensitive by default so that resend</div><div class='hunk'>@@ -1294,11 +1292,12 @@ static int xive_irq_domain_map(struct irq_domain *h, unsigned int virq,</div><div class='ctx'> 	 */</div><div class='ctx'> 	irq_clear_status_flags(virq, IRQ_LEVEL);</div><div class='ctx'> </div><div class='del'>-	rc = xive_irq_alloc_data(virq, hw);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	xd = xive_irq_alloc_data(virq, hw);</div><div class='add'>+	if (IS_ERR(xd))</div><div class='add'>+		return PTR_ERR(xd);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_chip_and_handler(virq, &amp;xive_irq_chip, handle_fasteoi_irq);</div><div class='add'>+	irq_set_chip_data(virq, xd);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1366,7 +1365,7 @@ static void xive_irq_domain_debug_show(struct seq_file *m, struct irq_domain *d,</div><div class='ctx'> 	seq_printf(m, "%*sXIVE:\n", ind, "");</div><div class='ctx'> 	ind++;</div><div class='ctx'> </div><div class='del'>-	xd = irq_data_get_irq_handler_data(irqd);</div><div class='add'>+	xd = irq_data_get_irq_chip_data(irqd);</div><div class='ctx'> 	if (!xd) {</div><div class='ctx'> 		seq_printf(m, "%*snot assigned\n", ind, "");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1403,6 +1402,7 @@ static int xive_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='ctx'> 				 unsigned int nr_irqs, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_fwspec *fwspec = arg;</div><div class='add'>+	struct xive_irq_data *xd;</div><div class='ctx'> 	irq_hw_number_t hwirq;</div><div class='ctx'> 	unsigned int type = IRQ_TYPE_NONE;</div><div class='ctx'> 	int i, rc;</div><div class='hunk'>@@ -1423,12 +1423,11 @@ static int xive_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,</div><div class='ctx'> 		irq_clear_status_flags(virq, IRQ_LEVEL);</div><div class='ctx'> </div><div class='ctx'> 		/* allocates and sets handler data */</div><div class='del'>-		rc = xive_irq_alloc_data(virq + i, hwirq + i);</div><div class='del'>-		if (rc)</div><div class='del'>-			return rc;</div><div class='add'>+		xd = xive_irq_alloc_data(virq + i, hwirq + i);</div><div class='add'>+		if (IS_ERR(xd))</div><div class='add'>+			return PTR_ERR(xd);</div><div class='ctx'> </div><div class='del'>-		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,</div><div class='del'>-					      &amp;xive_irq_chip, domain-&gt;host_data);</div><div class='add'>+		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, &amp;xive_irq_chip, xd);</div><div class='ctx'> 		irq_set_handler(virq + i, handle_fasteoi_irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1464,10 +1463,10 @@ static const struct irq_domain_ops xive_irq_domain_ops = {</div><div class='ctx'> </div><div class='ctx'> static void __init xive_init_host(struct device_node *np)</div><div class='ctx'> {</div><div class='del'>-	xive_irq_domain = irq_domain_add_tree(np, &amp;xive_irq_domain_ops, NULL);</div><div class='add'>+	xive_irq_domain = irq_domain_create_tree(of_fwnode_handle(np), &amp;xive_irq_domain_ops, NULL);</div><div class='ctx'> 	if (WARN_ON(xive_irq_domain == NULL))</div><div class='ctx'> 		return;</div><div class='del'>-	irq_set_default_host(xive_irq_domain);</div><div class='add'>+	irq_set_default_domain(xive_irq_domain);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xive_cleanup_cpu_queues(unsigned int cpu, struct xive_cpu *xc)</div><div class='hunk'>@@ -1764,7 +1763,7 @@ static void xive_debug_show_irq(struct seq_file *m, struct irq_data *d)</div><div class='ctx'> 	seq_printf(m, "IRQ 0x%08x : target=0x%x prio=%02x lirq=0x%x ",</div><div class='ctx'> 		   hw_irq, target, prio, lirq);</div><div class='ctx'> </div><div class='del'>-	xive_irq_data_dump(irq_data_get_irq_handler_data(d), buffer, sizeof(buffer));</div><div class='add'>+	xive_irq_data_dump(irq_data_get_irq_chip_data(d), buffer, sizeof(buffer));</div><div class='ctx'> 	seq_puts(m, buffer);</div><div class='ctx'> 	seq_puts(m, "\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/sysdev/xive/spapr.c b/arch/powerpc/sysdev/xive/spapr.c<br/>index f2fa985a2c77..5aedbe3e8e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xive/spapr.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/sysdev/xive/spapr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/sysdev/xive/spapr.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/sysdev/xive/spapr.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='head'>diff --git a/arch/x86/boot/tools/.gitignore b/arch/powerpc/tools/.gitignore<br/>index ae91f4d0d78b..ec380a14a09a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/x86/boot/tools/.gitignore?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/x86/boot/tools/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/tools/.gitignore?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/tools/.gitignore</a></div><div class='hunk'>@@ -1,2 +1,2 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-build</div><div class='add'>+/vmlinux.arch.S</div><div class='head'>diff --git a/arch/powerpc/tools/Makefile b/arch/powerpc/tools/Makefile<br/>new file mode 100644<br/>index 000000000000..e1f7afcd9fdf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/tools/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/tools/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+quiet_cmd_gen_ftrace_ool_stubs = GEN     $@</div><div class='add'>+	cmd_gen_ftrace_ool_stubs = $&lt; "$(CONFIG_PPC_FTRACE_OUT_OF_LINE_NUM_RESERVE)" "$(CONFIG_64BIT)" \</div><div class='add'>+				   "$(OBJDUMP)" vmlinux.o $@</div><div class='add'>+</div><div class='add'>+$(obj)/vmlinux.arch.S: $(src)/ftrace-gen-ool-stubs.sh vmlinux.o FORCE</div><div class='add'>+	$(call if_changed,gen_ftrace_ool_stubs)</div><div class='add'>+</div><div class='add'>+targets += vmlinux.arch.S</div><div class='head'>diff --git a/arch/powerpc/tools/ftrace-gen-ool-stubs.sh b/arch/powerpc/tools/ftrace-gen-ool-stubs.sh<br/>new file mode 100755<br/>index 000000000000..bac186bdf64a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/tools/ftrace-gen-ool-stubs.sh?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/tools/ftrace-gen-ool-stubs.sh</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+#!/bin/sh</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+# Error out on error</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+num_ool_stubs_text_builtin="$1"</div><div class='add'>+is_64bit="$2"</div><div class='add'>+objdump="$3"</div><div class='add'>+vmlinux_o="$4"</div><div class='add'>+arch_vmlinux_S="$5"</div><div class='add'>+</div><div class='add'>+RELOCATION=R_PPC64_ADDR64</div><div class='add'>+if [ -z "$is_64bit" ]; then</div><div class='add'>+	RELOCATION=R_PPC_ADDR32</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+num_ool_stubs_total=$($objdump -r -j __patchable_function_entries "$vmlinux_o" |</div><div class='add'>+		      grep -c "$RELOCATION")</div><div class='add'>+num_ool_stubs_inittext=$($objdump -r -j __patchable_function_entries "$vmlinux_o" |</div><div class='add'>+			 grep -e ".init.text" -e ".text.startup" | grep -c "$RELOCATION")</div><div class='add'>+num_ool_stubs_text=$((num_ool_stubs_total - num_ool_stubs_inittext))</div><div class='add'>+</div><div class='add'>+if [ "$num_ool_stubs_text" -gt "$num_ool_stubs_text_builtin" ]; then</div><div class='add'>+	num_ool_stubs_text_end=$((num_ool_stubs_text - num_ool_stubs_text_builtin))</div><div class='add'>+else</div><div class='add'>+	num_ool_stubs_text_end=0</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+cat &gt; "$arch_vmlinux_S" &lt;&lt;EOF</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/ppc_asm.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+.pushsection .tramp.ftrace.text,"aw"</div><div class='add'>+SYM_DATA(ftrace_ool_stub_text_end_count, .long $num_ool_stubs_text_end)</div><div class='add'>+</div><div class='add'>+SYM_START(ftrace_ool_stub_text_end, SYM_L_GLOBAL, .balign SZL)</div><div class='add'>+#if $num_ool_stubs_text_end</div><div class='add'>+	.space $num_ool_stubs_text_end * FTRACE_OOL_STUB_SIZE</div><div class='add'>+#endif</div><div class='add'>+SYM_CODE_END(ftrace_ool_stub_text_end)</div><div class='add'>+.popsection</div><div class='add'>+</div><div class='add'>+.pushsection .tramp.ftrace.init,"aw"</div><div class='add'>+SYM_DATA(ftrace_ool_stub_inittext_count, .long $num_ool_stubs_inittext)</div><div class='add'>+</div><div class='add'>+SYM_START(ftrace_ool_stub_inittext, SYM_L_GLOBAL, .balign SZL)</div><div class='add'>+	.space $num_ool_stubs_inittext * FTRACE_OOL_STUB_SIZE</div><div class='add'>+SYM_CODE_END(ftrace_ool_stub_inittext)</div><div class='add'>+.popsection</div><div class='add'>+EOF</div><div class='head'>diff --git a/arch/powerpc/tools/ftrace_check.sh b/arch/powerpc/tools/ftrace_check.sh<br/>new file mode 100755<br/>index 000000000000..405e7e306617<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/tools/ftrace_check.sh?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/tools/ftrace_check.sh</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#</div><div class='add'>+# This script checks vmlinux to ensure that all functions can call ftrace_caller() either directly,</div><div class='add'>+# or through the stub, ftrace_tramp_text, at the end of kernel text.</div><div class='add'>+</div><div class='add'>+# Error out if any command fails</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+# Allow for verbose output</div><div class='add'>+if [ "$V" = "1" ]; then</div><div class='add'>+	set -x</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+if [ $# -lt 2 ]; then</div><div class='add'>+	echo "$0 [path to nm] [path to vmlinux]" 1&gt;&amp;2</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+# Have Kbuild supply the path to nm so we handle cross compilation.</div><div class='add'>+nm="$1"</div><div class='add'>+vmlinux="$2"</div><div class='add'>+</div><div class='add'>+stext_addr=$($nm "$vmlinux" | grep -e " [TA] _stext$" | \</div><div class='add'>+	cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')</div><div class='add'>+ftrace_caller_addr=$($nm "$vmlinux" | grep -e " T ftrace_caller$" | \</div><div class='add'>+	cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')</div><div class='add'>+ftrace_tramp_addr=$($nm "$vmlinux" | grep -e " T ftrace_tramp_text$" | \</div><div class='add'>+	cut -d' ' -f1 | tr '[:lower:]' '[:upper:]')</div><div class='add'>+</div><div class='add'>+ftrace_caller_offset=$(echo "ibase=16;$ftrace_caller_addr - $stext_addr" | bc)</div><div class='add'>+ftrace_tramp_offset=$(echo "ibase=16;$ftrace_tramp_addr - $ftrace_caller_addr" | bc)</div><div class='add'>+sz_32m=$(printf "%d" 0x2000000)</div><div class='add'>+sz_64m=$(printf "%d" 0x4000000)</div><div class='add'>+</div><div class='add'>+# ftrace_caller - _stext &lt; 32M</div><div class='add'>+if [ "$ftrace_caller_offset" -ge "$sz_32m" ]; then</div><div class='add'>+	echo "ERROR: ftrace_caller (0x$ftrace_caller_addr) is beyond 32MiB of _stext" 1&gt;&amp;2</div><div class='add'>+	echo "ERROR: consider disabling CONFIG_FUNCTION_TRACER, or reducing the size \</div><div class='add'>+		of kernel text" 1&gt;&amp;2</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+# ftrace_tramp_text - ftrace_caller &lt; 64M</div><div class='add'>+if [ "$ftrace_tramp_offset" -ge "$sz_64m" ]; then</div><div class='add'>+	echo "ERROR: kernel text extends beyond 64MiB from ftrace_caller" 1&gt;&amp;2</div><div class='add'>+	echo "ERROR: consider disabling CONFIG_FUNCTION_TRACER, or reducing the size \</div><div class='add'>+		of kernel text" 1&gt;&amp;2</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='head'>diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile<br/>index d778011060a8..d74b147126b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/xmon/Makefile</a></div><div class='hunk'>@@ -16,7 +16,4 @@ ccflags-$(CONFIG_CC_IS_CLANG) += -Wframe-larger-than=4096</div><div class='ctx'> </div><div class='ctx'> obj-y			+= xmon.o nonstdio.o spr_access.o xmon_bpts.o</div><div class='ctx'> </div><div class='del'>-ifdef CONFIG_XMON_DISASSEMBLY</div><div class='del'>-obj-y			+= ppc-dis.o ppc-opc.o</div><div class='del'>-obj-$(CONFIG_SPU_BASE)	+= spu-dis.o spu-opc.o</div><div class='del'>-endif</div><div class='add'>+obj-$(CONFIG_XMON_DISASSEMBLY) += ppc-dis.o ppc-opc.o</div><div class='head'>diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c<br/>index 0774d711453e..de9b4236728c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/ppc-opc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/ppc-opc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/ppc-opc.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/xmon/ppc-opc.c</a></div><div class='hunk'>@@ -954,8 +954,7 @@ const struct powerpc_operand powerpc_operands[] =</div><div class='ctx'>   { 0xff, 11, NULL, NULL, PPC_OPERAND_SIGNOPT },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)</div><div class='del'>-					   / sizeof (powerpc_operands[0]));</div><div class='add'>+const unsigned int num_powerpc_operands = ARRAY_SIZE(powerpc_operands);</div><div class='ctx'> </div><div class='ctx'> /* The functions used to insert and extract complicated operands.  */</div><div class='ctx'> </div><div class='hunk'>@@ -6968,9 +6967,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {</div><div class='ctx'> {"fcfidu.",	XRC(63,974,1),	XRA_MASK, POWER7|PPCA2,	PPCVLE,		{FRT, FRB}},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const int powerpc_num_opcodes =</div><div class='del'>-  sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);</div><div class='del'>-</div><div class='add'>+const int powerpc_num_opcodes = ARRAY_SIZE(powerpc_opcodes);</div><div class='add'>+</div><div class='ctx'> /* The VLE opcode table.</div><div class='ctx'> </div><div class='ctx'>    The format of this opcode table is the same as the main opcode table.  */</div><div class='hunk'>@@ -7207,9 +7205,8 @@ const struct powerpc_opcode vle_opcodes[] = {</div><div class='ctx'> {"se_bl",	BD8(58,0,1),	BD8_MASK,	PPCVLE,	0,		{B8}},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const int vle_num_opcodes =</div><div class='del'>-  sizeof (vle_opcodes) / sizeof (vle_opcodes[0]);</div><div class='del'>-</div><div class='add'>+const int vle_num_opcodes = ARRAY_SIZE(vle_opcodes);</div><div class='add'>+</div><div class='ctx'> /* The macro table.  This is only used by the assembler.  */</div><div class='ctx'> </div><div class='ctx'> /* The expressions of the form (-x ! 31) &amp; (x | 31) have the value 0</div><div class='hunk'>@@ -7276,5 +7273,4 @@ const struct powerpc_macro powerpc_macros[] = {</div><div class='ctx'> {"e_clrlslwi",4, PPCVLE, "e_rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const int powerpc_num_macros =</div><div class='del'>-  sizeof (powerpc_macros) / sizeof (powerpc_macros[0]);</div><div class='add'>+const int powerpc_num_macros = ARRAY_SIZE(powerpc_macros);</div><div class='head'>diff --git a/arch/powerpc/xmon/spu-dis.c b/arch/powerpc/xmon/spu-dis.c<br/>deleted file mode 100644<br/>index 4b0a4e640f08..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/spu-dis.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-dis.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,237 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/* Disassemble SPU instructions</div><div class='del'>-</div><div class='del'>-   Copyright 2006 Free Software Foundation, Inc.</div><div class='del'>-</div><div class='del'>-   This file is part of GDB, GAS, and the GNU binutils.</div><div class='del'>-</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include "nonstdio.h"</div><div class='del'>-#include "ansidecl.h"</div><div class='del'>-#include "spu.h"</div><div class='del'>-#include "dis-asm.h"</div><div class='del'>-</div><div class='del'>-/* This file provides a disassembler function which uses</div><div class='del'>-   the disassembler interface defined in dis-asm.h.   */</div><div class='del'>-</div><div class='del'>-extern const struct spu_opcode spu_opcodes[];</div><div class='del'>-extern const int spu_num_opcodes;</div><div class='del'>-</div><div class='del'>-#define SPU_DISASM_TBL_SIZE (1 &lt;&lt; 11)</div><div class='del'>-static const struct spu_opcode *spu_disassemble_table[SPU_DISASM_TBL_SIZE];</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-init_spu_disassemble (void)</div><div class='del'>-{</div><div class='del'>-  int i;</div><div class='del'>-</div><div class='del'>-  /* If two instructions have the same opcode then we prefer the first</div><div class='del'>-   * one.  In most cases it is just an alternate mnemonic. */</div><div class='del'>-  for (i = 0; i &lt; spu_num_opcodes; i++)</div><div class='del'>-    {</div><div class='del'>-      int o = spu_opcodes[i].opcode;</div><div class='del'>-      if (o &gt;= SPU_DISASM_TBL_SIZE)</div><div class='del'>-	continue; /* abort (); */</div><div class='del'>-      if (spu_disassemble_table[o] == 0)</div><div class='del'>-	spu_disassemble_table[o] = &amp;spu_opcodes[i];</div><div class='del'>-    }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Determine the instruction from the 10 least significant bits. */</div><div class='del'>-static const struct spu_opcode *</div><div class='del'>-get_index_for_opcode (unsigned int insn)</div><div class='del'>-{</div><div class='del'>-  const struct spu_opcode *index;</div><div class='del'>-  unsigned int opcode = insn &gt;&gt; (32-11);</div><div class='del'>-</div><div class='del'>-  /* Init the table.  This assumes that element 0/opcode 0 (currently</div><div class='del'>-   * NOP) is always used */</div><div class='del'>-  if (spu_disassemble_table[0] == 0)</div><div class='del'>-    init_spu_disassemble ();</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x780]) != 0</div><div class='del'>-      &amp;&amp; index-&gt;insn_type == RRR)</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x7f0]) != 0</div><div class='del'>-      &amp;&amp; (index-&gt;insn_type == RI18 || index-&gt;insn_type == LBT))</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x7f8]) != 0</div><div class='del'>-      &amp;&amp; index-&gt;insn_type == RI10)</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x7fc]) != 0</div><div class='del'>-      &amp;&amp; (index-&gt;insn_type == RI16))</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x7fe]) != 0</div><div class='del'>-      &amp;&amp; (index-&gt;insn_type == RI8))</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  if ((index = spu_disassemble_table[opcode &amp; 0x7ff]) != 0)</div><div class='del'>-    return index;</div><div class='del'>-</div><div class='del'>-  return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Print a Spu instruction.  */</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-print_insn_spu (unsigned long insn, unsigned long memaddr)</div><div class='del'>-{</div><div class='del'>-  int value;</div><div class='del'>-  int hex_value;</div><div class='del'>-  const struct spu_opcode *index;</div><div class='del'>-  enum spu_insns tag;</div><div class='del'>-</div><div class='del'>-  index = get_index_for_opcode (insn);</div><div class='del'>-</div><div class='del'>-  if (index == 0)</div><div class='del'>-    {</div><div class='del'>-      printf(".long 0x%lx", insn);</div><div class='del'>-    }</div><div class='del'>-  else</div><div class='del'>-    {</div><div class='del'>-      int i;</div><div class='del'>-      int paren = 0;</div><div class='del'>-      tag = (enum spu_insns)(index - spu_opcodes);</div><div class='del'>-      printf("%s", index-&gt;mnemonic);</div><div class='del'>-      if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED</div><div class='del'>-	  || tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ</div><div class='del'>-          || tag == M_SYNC || tag == M_HBR)</div><div class='del'>-	{</div><div class='del'>-	  int fb = (insn &gt;&gt; (32-18)) &amp; 0x7f;</div><div class='del'>-	  if (fb &amp; 0x40)</div><div class='del'>-	    printf(tag == M_SYNC ? "c" : "p");</div><div class='del'>-	  if (fb &amp; 0x20)</div><div class='del'>-	    printf("d");</div><div class='del'>-	  if (fb &amp; 0x10)</div><div class='del'>-	    printf("e");</div><div class='del'>-	}</div><div class='del'>-      if (index-&gt;arg[0] != 0)</div><div class='del'>-	printf("\t");</div><div class='del'>-      hex_value = 0;</div><div class='del'>-      for (i = 1;  i &lt;= index-&gt;arg[0]; i++)</div><div class='del'>-	{</div><div class='del'>-	  int arg = index-&gt;arg[i];</div><div class='del'>-	  if (arg != A_P &amp;&amp; !paren &amp;&amp; i &gt; 1)</div><div class='del'>-	    printf(",");</div><div class='del'>-</div><div class='del'>-	  switch (arg)</div><div class='del'>-	    {</div><div class='del'>-	    case A_T:</div><div class='del'>-	      printf("$%lu",</div><div class='del'>-				     DECODE_INSN_RT (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_A:</div><div class='del'>-	      printf("$%lu",</div><div class='del'>-				     DECODE_INSN_RA (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_B:</div><div class='del'>-	      printf("$%lu",</div><div class='del'>-				     DECODE_INSN_RB (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_C:</div><div class='del'>-	      printf("$%lu",</div><div class='del'>-				     DECODE_INSN_RC (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S:</div><div class='del'>-	      printf("$sp%lu",</div><div class='del'>-				     DECODE_INSN_RA (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_H:</div><div class='del'>-	      printf("$ch%lu",</div><div class='del'>-				     DECODE_INSN_RA (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_P:</div><div class='del'>-	      paren++;</div><div class='del'>-	      printf("(");</div><div class='del'>-	      break;</div><div class='del'>-	    case A_U7A:</div><div class='del'>-	      printf("%lu",</div><div class='del'>-				     173 - DECODE_INSN_U8 (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_U7B:</div><div class='del'>-	      printf("%lu",</div><div class='del'>-				     155 - DECODE_INSN_U8 (insn));</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S3:</div><div class='del'>-	    case A_S6:</div><div class='del'>-	    case A_S7:</div><div class='del'>-	    case A_S7N:</div><div class='del'>-	    case A_U3:</div><div class='del'>-	    case A_U5:</div><div class='del'>-	    case A_U6:</div><div class='del'>-	    case A_U7:</div><div class='del'>-	      hex_value = DECODE_INSN_I7 (insn);</div><div class='del'>-	      printf("%d", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S11:</div><div class='del'>-	      print_address(memaddr + DECODE_INSN_I9a (insn) * 4);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S11I:</div><div class='del'>-	      print_address(memaddr + DECODE_INSN_I9b (insn) * 4);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S10:</div><div class='del'>-	    case A_S10B:</div><div class='del'>-	      hex_value = DECODE_INSN_I10 (insn);</div><div class='del'>-	      printf("%d", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S14:</div><div class='del'>-	      hex_value = DECODE_INSN_I10 (insn) * 16;</div><div class='del'>-	      printf("%d", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S16:</div><div class='del'>-	      hex_value = DECODE_INSN_I16 (insn);</div><div class='del'>-	      printf("%d", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_X16:</div><div class='del'>-	      hex_value = DECODE_INSN_U16 (insn);</div><div class='del'>-	      printf("%u", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_R18:</div><div class='del'>-	      value = DECODE_INSN_I16 (insn) * 4;</div><div class='del'>-	      if (value == 0)</div><div class='del'>-		printf("%d", value);</div><div class='del'>-	      else</div><div class='del'>-		{</div><div class='del'>-		  hex_value = memaddr + value;</div><div class='del'>-		  print_address(hex_value &amp; 0x3ffff);</div><div class='del'>-		}</div><div class='del'>-	      break;</div><div class='del'>-	    case A_S18:</div><div class='del'>-	      value = DECODE_INSN_U16 (insn) * 4;</div><div class='del'>-	      if (value == 0)</div><div class='del'>-		printf("%d", value);</div><div class='del'>-	      else</div><div class='del'>-		print_address(value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_U18:</div><div class='del'>-	      value = DECODE_INSN_U18 (insn);</div><div class='del'>-	      if (value == 0 || 1)</div><div class='del'>-		{</div><div class='del'>-		  hex_value = value;</div><div class='del'>-		  printf("%u", value);</div><div class='del'>-		}</div><div class='del'>-	      else</div><div class='del'>-		print_address(value);</div><div class='del'>-	      break;</div><div class='del'>-	    case A_U14:</div><div class='del'>-	      hex_value = DECODE_INSN_U14 (insn);</div><div class='del'>-	      printf("%u", hex_value);</div><div class='del'>-	      break;</div><div class='del'>-	    }</div><div class='del'>-	  if (arg != A_P &amp;&amp; paren)</div><div class='del'>-	    {</div><div class='del'>-	      printf(")");</div><div class='del'>-	      paren--;</div><div class='del'>-	    }</div><div class='del'>-	}</div><div class='del'>-      if (hex_value &gt; 16)</div><div class='del'>-	printf("\t# %x", hex_value);</div><div class='del'>-    }</div><div class='del'>-  return 4;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/powerpc/xmon/spu-insns.h b/arch/powerpc/xmon/spu-insns.h<br/>deleted file mode 100644<br/>index 7e1126a19909..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/spu-insns.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-insns.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,399 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/* SPU ELF support for BFD.</div><div class='del'>-</div><div class='del'>-   Copyright 2006 Free Software Foundation, Inc.</div><div class='del'>-</div><div class='del'>-   This file is part of BFD, the Binary File Descriptor library.</div><div class='del'>-</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* SPU Opcode Table</div><div class='del'>-</div><div class='del'>--=-=-= FORMAT =-=-=-</div><div class='del'>-                                             		                                             </div><div class='del'>-       +----+-------+-------+-------+-------+  		       +------------+-------+-------+-------+</div><div class='del'>-RRR    | op |  RC   |  RB   |  RA   |  RT   |		RI7    | op         |  I7   |  RA   |  RT   |</div><div class='del'>-       +----+-------+-------+-------+-------+		       +------------+-------+-------+-------+</div><div class='del'>-        0  3       1       1       2       3		        0          1       1       2       3 </div><div class='del'>-                   0       7       4       1		                   0       7       4       1 </div><div class='del'>-</div><div class='del'>-       +-----------+--------+-------+-------+		       +---------+----------+-------+-------+</div><div class='del'>-RI8    | op        |   I8   |  RA   |  RT   |		RI10   | op      |   I10    |  RA   |  RT   |</div><div class='del'>-       +-----------+--------+-------+-------+		       +---------+----------+-------+-------+</div><div class='del'>-        0         9        1       2       3		        0       7          1       2       3 </div><div class='del'>-                           7       4       1		                           7       4       1 </div><div class='del'>-</div><div class='del'>-       +----------+-----------------+-------+		       +--------+-------------------+-------+</div><div class='del'>-RI16   | op       |       I16       |  RT   |		RI18   | op     |       I18         |  RT   |</div><div class='del'>-       +----------+-----------------+-------+		       +--------+-------------------+-------+</div><div class='del'>-        0        8                 2       3		        0      6                   2       3 </div><div class='del'>-                                   4       1		                                   4       1 </div><div class='del'>-</div><div class='del'>-       +------------+-------+-------+-------+		       +-------+--+-----------------+-------+</div><div class='del'>-RR     | op         |  RB   |  RA   |  RT   |		LBT    | op    |RO|       I16       |  RO   |</div><div class='del'>-       +------------+-------+-------+-------+		       +-------+--+-----------------+-------+</div><div class='del'>-        0          1       1       2       3		        0     6  8                 2       3 </div><div class='del'>-                   0       7       4       1		                                   4       1 </div><div class='del'>-</div><div class='del'>-							       +------------+----+--+-------+-------+</div><div class='del'>-							LBTI   | op         | // |RO|  RA   |  RO   |</div><div class='del'>-							       +------------+----+--+-------+-------+</div><div class='del'>-							        0          1    1  1       2       3</div><div class='del'>-							                   0    5  7       4       1</div><div class='del'>-</div><div class='del'>--=-=-= OPCODE =-=-=-</div><div class='del'>-</div><div class='del'>-OPCODE field specifies the most significant 11bit of the instruction. Some formats don't have 11bits for opcode field, and in this</div><div class='del'>-case, bit field other than op are defined as 0s. For example, opcode of fma instruction which is RRR format is defined as 0x700,</div><div class='del'>-since 0x700 -&gt; 11'b11100000000, this means opcode is 4'b1110, and other 7bits are defined as 7'b0000000.</div><div class='del'>-</div><div class='del'>--=-=-= ASM_FORMAT =-=-=-</div><div class='del'>-</div><div class='del'>-RRR category						RI7 category                               </div><div class='del'>-	ASM_RRR		mnemonic RC, RA, RB, RT		        ASM_RI4         mnemonic RT, RA, I4</div><div class='del'>-							        ASM_RI7         mnemonic RT, RA, I7</div><div class='del'>-</div><div class='del'>-RI8 category						RI10 category                               </div><div class='del'>-	ASM_RUI8	mnemonic RT, RA, UI8		        ASM_AI10        mnemonic RA, I10    </div><div class='del'>-							        ASM_RI10        mnemonic RT, RA, R10</div><div class='del'>-							        ASM_RI10IDX     mnemonic RT, I10(RA)</div><div class='del'>-</div><div class='del'>-RI16 category						RI18 category                           </div><div class='del'>-	ASM_I16W	mnemonic I16W			        ASM_RI18        mnemonic RT, I18</div><div class='del'>-	ASM_RI16	mnemonic RT, I16</div><div class='del'>-	ASM_RI16W	mnemonic RT, I16W</div><div class='del'>-</div><div class='del'>-RR category						LBT category                                    </div><div class='del'>-	ASM_MFSPR	mnemonic RT, SA			        ASM_LBT         mnemonic brinst, brtarg </div><div class='del'>-	ASM_MTSPR	mnemonic SA, RT			                                                </div><div class='del'>-	ASM_NOOP	mnemonic			LBTI category                                   </div><div class='del'>-	ASM_RA		mnemonic RA			        ASM_LBTI        mnemonic brinst, RA     </div><div class='del'>-	ASM_RAB		mnemonic RA, RB</div><div class='del'>-	ASM_RDCH	mnemonic RT, CA</div><div class='del'>-	ASM_RR		mnemonic RT, RA, RB</div><div class='del'>-	ASM_RT		mnemonic RT</div><div class='del'>-	ASM_RTA		mnemonic RT, RA</div><div class='del'>-	ASM_WRCH	mnemonic CA, RT</div><div class='del'>-</div><div class='del'>-Note that RRR instructions have the names for RC and RT reversed from</div><div class='del'>-what's in the ISA, in order to put RT in the same position it appears</div><div class='del'>-for other formats.</div><div class='del'>-</div><div class='del'>--=-=-= DEPENDENCY =-=-=-</div><div class='del'>-</div><div class='del'>-DEPENDENCY filed consists of 5 digits. This represents which register is used as source and which register is used as target.</div><div class='del'>-The first(most significant) digit is always 0. Then it is followd by RC, RB, RA and RT digits.</div><div class='del'>-If the digit is 0, this means the corresponding register is not used in the instruction.</div><div class='del'>-If the digit is 1, this means the corresponding register is used as a source in the instruction.</div><div class='del'>-If the digit is 2, this means the corresponding register is used as a target in the instruction.</div><div class='del'>-If the digit is 3, this means the corresponding register is used as both source and target in the instruction.</div><div class='del'>-For example, fms instruction has 00113 as the DEPENDENCY field. This means RC is not used in this operation, RB and RA are</div><div class='del'>-used as sources and RT is the target.</div><div class='del'>-</div><div class='del'>--=-=-= PIPE =-=-=-</div><div class='del'>-</div><div class='del'>-This field shows which execution pipe is used for the instruction</div><div class='del'>-</div><div class='del'>-pipe0 execution pipelines:</div><div class='del'>-	FP6	SP floating pipeline</div><div class='del'>-	FP7	integer operations executed in SP floating pipeline</div><div class='del'>-	FPD	DP floating pipeline</div><div class='del'>-	FX2	FXU pipeline</div><div class='del'>-	FX3	Rotate/Shift pipeline</div><div class='del'>-	FXB	Byte pipeline</div><div class='del'>-	NOP	No pipeline</div><div class='del'>-</div><div class='del'>-pipe1 execution pipelines:</div><div class='del'>-	BR	Branch pipeline</div><div class='del'>-	LNOP	No pipeline</div><div class='del'>-	LS	Load/Store pipeline</div><div class='del'>-	SHUF	Shuffle pipeline</div><div class='del'>-	SPR	SPR/CH pipeline</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#define _A0() {0}</div><div class='del'>-#define _A1(a) {1,a}</div><div class='del'>-#define _A2(a,b) {2,a,b}</div><div class='del'>-#define _A3(a,b,c) {3,a,b,c}</div><div class='del'>-#define _A4(a,b,c,d) {4,a,b,c,d}</div><div class='del'>-</div><div class='del'>-/*    TAG		FORMAT	OPCODE	MNEMONIC	ASM_FORMAT	DEPENDENCY	PIPE	COMMENT				*/</div><div class='del'>-/*									0[RC][RB][RA][RT]					*/</div><div class='del'>-/*									1:src, 2:target						*/</div><div class='del'>-</div><div class='del'>-APUOP(M_BR,		RI16,	0x190,	"br",		_A1(A_R18),	00000,	BR)	/* BRel          IP&lt;-IP+I16 */</div><div class='del'>-APUOP(M_BRSL,		RI16,	0x198,	"brsl",		_A2(A_T,A_R18),	00002,	BR)	/* BRelSetLink   RT,IP&lt;-IP,IP+I16 */</div><div class='del'>-APUOP(M_BRA,		RI16,	0x180,	"bra",		_A1(A_S18),	00000,	BR)	/* BRAbs         IP&lt;-I16 */</div><div class='del'>-APUOP(M_BRASL,		RI16,	0x188,	"brasl",	_A2(A_T,A_S18),	00002,	BR)	/* BRAbsSetLink  RT,IP&lt;-IP,I16 */</div><div class='del'>-APUOP(M_FSMBI,		RI16,	0x194,	"fsmbi",	_A2(A_T,A_X16),	00002,	SHUF)	/* FormSelMask%I RT&lt;-fsm(I16) */</div><div class='del'>-APUOP(M_LQA,		RI16,	0x184,	"lqa",		_A2(A_T,A_S18),	00002,	LS)	/* LoadQAbs      RT&lt;-M[I16] */</div><div class='del'>-APUOP(M_LQR,		RI16,	0x19C,	"lqr",		_A2(A_T,A_R18),	00002,	LS)	/* LoadQRel      RT&lt;-M[IP+I16] */</div><div class='del'>-APUOP(M_STOP,		RR,	0x000,	"stop",		_A0(),		00000,	BR)	/* STOP          stop */</div><div class='del'>-APUOP(M_STOP2,		RR,	0x000,	"stop",		_A1(A_U14),	00000,	BR)	/* STOP          stop */</div><div class='del'>-APUOP(M_STOPD,		RR,	0x140,	"stopd",	_A3(A_T,A_A,A_B),         00111,	BR)	/* STOPD         stop (with register dependencies) */</div><div class='del'>-APUOP(M_LNOP,		RR,	0x001,	"lnop",		_A0(),		00000,	LNOP)	/* LNOP          no_operation */</div><div class='del'>-APUOP(M_SYNC,		RR,	0x002,	"sync",		_A0(),		00000,	BR)	/* SYNC          flush_pipe */</div><div class='del'>-APUOP(M_DSYNC,		RR,	0x003,	"dsync",	_A0(),		00000,	BR)	/* DSYNC         flush_store_queue */</div><div class='del'>-APUOP(M_MFSPR,		RR,	0x00c,	"mfspr",	_A2(A_T,A_S),	00002,	SPR)	/* MFSPR         RT&lt;-SA */</div><div class='del'>-APUOP(M_RDCH,		RR,	0x00d,	"rdch",		_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHannel   RT&lt;-CA:data */</div><div class='del'>-APUOP(M_RCHCNT,		RR,	0x00f,	"rchcnt",	_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHanCouNT RT&lt;-CA:count */</div><div class='del'>-APUOP(M_HBRA,		LBT,	0x080,	"hbra",		_A2(A_S11,A_S18),	00000,	LS)	/* HBRA          BTB[B9]&lt;-M[I16] */</div><div class='del'>-APUOP(M_HBRR,		LBT,	0x090,	"hbrr",		_A2(A_S11,A_R18),	00000,	LS)	/* HBRR          BTB[B9]&lt;-M[IP+I16] */</div><div class='del'>-APUOP(M_BRZ,		RI16,	0x100,	"brz",		_A2(A_T,A_R18),	00001,	BR)	/* BRZ           IP&lt;-IP+I16_if(RT) */</div><div class='del'>-APUOP(M_BRNZ,		RI16,	0x108,	"brnz",		_A2(A_T,A_R18),	00001,	BR)	/* BRNZ          IP&lt;-IP+I16_if(RT) */</div><div class='del'>-APUOP(M_BRHZ,		RI16,	0x110,	"brhz",		_A2(A_T,A_R18),	00001,	BR)	/* BRHZ          IP&lt;-IP+I16_if(RT) */</div><div class='del'>-APUOP(M_BRHNZ,		RI16,	0x118,	"brhnz",	_A2(A_T,A_R18),	00001,	BR)	/* BRHNZ         IP&lt;-IP+I16_if(RT) */</div><div class='del'>-APUOP(M_STQA,		RI16,	0x104,	"stqa",		_A2(A_T,A_S18),	00001,	LS)	/* SToreQAbs     M[I16]&lt;-RT */</div><div class='del'>-APUOP(M_STQR,		RI16,	0x11C,	"stqr",		_A2(A_T,A_R18),	00001,	LS)	/* SToreQRel     M[IP+I16]&lt;-RT */</div><div class='del'>-APUOP(M_MTSPR,		RR,	0x10c,	"mtspr",	_A2(A_S,A_T),	00001,	SPR)	/* MTSPR         SA&lt;-RT */</div><div class='del'>-APUOP(M_WRCH,		RR,	0x10d,	"wrch",		_A2(A_H,A_T),	00001,	SPR)	/* ChanWRite     CA&lt;-RT */</div><div class='del'>-APUOP(M_LQD,		RI10,	0x1a0,	"lqd",		_A4(A_T,A_S14,A_P,A_A),	00012,	LS)	/* LoadQDisp     RT&lt;-M[Ra+I10] */</div><div class='del'>-APUOP(M_BI,		RR,	0x1a8,	"bi",		_A1(A_A),		00010,	BR)	/* BI            IP&lt;-RA */</div><div class='del'>-APUOP(M_BISL,		RR,	0x1a9,	"bisl",		_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP&lt;-IP,RA */</div><div class='del'>-APUOP(M_IRET,  		RR,	0x1aa,	"iret",	        _A1(A_A), 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOP(M_IRET2, 		RR,	0x1aa,	"iret",	        _A0(),	 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOP(M_BISLED,		RR,	0x1ab,	"bisled",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP&lt;-IP,RA_if(ext) */</div><div class='del'>-APUOP(M_HBR,		LBTI,	0x1ac,	"hbr",		_A2(A_S11I,A_A),	00010,	LS)	/* HBR           BTB[B9]&lt;-M[Ra] */</div><div class='del'>-APUOP(M_FREST,		RR,	0x1b8,	"frest",	_A2(A_T,A_A),	00012,	SHUF)	/* FREST         RT&lt;-recip(RA) */</div><div class='del'>-APUOP(M_FRSQEST,	RR,	0x1b9,	"frsqest",	_A2(A_T,A_A),	00012,	SHUF)	/* FRSQEST       RT&lt;-rsqrt(RA) */</div><div class='del'>-APUOP(M_FSM,		RR,	0x1b4,	"fsm",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT&lt;-expand(Ra) */</div><div class='del'>-APUOP(M_FSMH,		RR,	0x1b5,	"fsmh",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT&lt;-expand(Ra) */</div><div class='del'>-APUOP(M_FSMB,		RR,	0x1b6,	"fsmb",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT&lt;-expand(Ra) */</div><div class='del'>-APUOP(M_GB,		RR,	0x1b0,	"gb",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT&lt;-gather(RA) */</div><div class='del'>-APUOP(M_GBH,		RR,	0x1b1,	"gbh",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT&lt;-gather(RA) */</div><div class='del'>-APUOP(M_GBB,		RR,	0x1b2,	"gbb",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT&lt;-gather(RA) */</div><div class='del'>-APUOP(M_CBD,		RI7,	0x1f4,	"cbd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT&lt;-sta(Ra+I4,siz) */</div><div class='del'>-APUOP(M_CHD,		RI7,	0x1f5,	"chd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT&lt;-sta(Ra+I4,siz) */</div><div class='del'>-APUOP(M_CWD,		RI7,	0x1f6,	"cwd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT&lt;-sta(Ra+I4,siz) */</div><div class='del'>-APUOP(M_CDD,		RI7,	0x1f7,	"cdd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT&lt;-sta(Ra+I4,siz) */</div><div class='del'>-APUOP(M_ROTQBII,	RI7,	0x1f8,	"rotqbii",	_A3(A_T,A_A,A_U3),	00012,	SHUF)	/* ROTQBII       RT&lt;-RA&lt;&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTQBYI,	RI7,	0x1fc,	"rotqbyi",	_A3(A_T,A_A,A_S7N),	00012,	SHUF)	/* ROTQBYI       RT&lt;-RA&lt;&lt;&lt;(I7*8) */</div><div class='del'>-APUOP(M_ROTQMBII,	RI7,	0x1f9,	"rotqmbii",	_A3(A_T,A_A,A_S3),	00012,	SHUF)	/* ROTQMBII      RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTQMBYI,	RI7,	0x1fd,	"rotqmbyi",	_A3(A_T,A_A,A_S6),	00012,	SHUF)	/* ROTQMBYI      RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_SHLQBII,	RI7,	0x1fb,	"shlqbii",	_A3(A_T,A_A,A_U3),	00012,	SHUF)	/* SHLQBII       RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_SHLQBYI,	RI7,	0x1ff,	"shlqbyi",	_A3(A_T,A_A,A_U5),	00012,	SHUF)	/* SHLQBYI       RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_STQD,		RI10,	0x120,	"stqd",		_A4(A_T,A_S14,A_P,A_A),	00011,	LS)	/* SToreQDisp    M[Ra+I10]&lt;-RT */</div><div class='del'>-APUOP(M_BIHNZ,		RR,	0x12b,	"bihnz",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BIHZ,		RR,	0x12a,	"bihz",		_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BINZ,		RR,	0x129,	"binz",		_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BIZ,		RR,	0x128,	"biz",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_CBX,		RR,	0x1d4,	"cbx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT&lt;-sta(Ra+Rb,siz) */</div><div class='del'>-APUOP(M_CHX,		RR,	0x1d5,	"chx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT&lt;-sta(Ra+Rb,siz) */</div><div class='del'>-APUOP(M_CWX,		RR,	0x1d6,	"cwx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT&lt;-sta(Ra+Rb,siz) */</div><div class='del'>-APUOP(M_CDX,		RR,	0x1d7,	"cdx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT&lt;-sta(Ra+Rb,siz) */</div><div class='del'>-APUOP(M_LQX,		RR,	0x1c4,	"lqx",		_A3(A_T,A_A,A_B),		00112,	LS)	/* LoadQindeX    RT&lt;-M[Ra+Rb] */</div><div class='del'>-APUOP(M_ROTQBI,		RR,	0x1d8,	"rotqbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* ROTQBI        RT&lt;-RA&lt;&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTQMBI,	RR,	0x1d9,	"rotqmbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* ROTQMBI       RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_SHLQBI,		RR,	0x1db,	"shlqbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBI        RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTQBY,		RR,	0x1dc,	"rotqby",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQBY        RT&lt;-RA&lt;&lt;&lt;(Rb*8) */</div><div class='del'>-APUOP(M_ROTQMBY,	RR,	0x1dd,	"rotqmby",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQMBY       RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_SHLQBY,		RR,	0x1df,	"shlqby",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBY        RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTQBYBI,	RR,	0x1cc,	"rotqbybi",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQBYBI      RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTQMBYBI,	RR,	0x1cd,	"rotqmbybi",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQMBYBI     RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_SHLQBYBI,	RR,	0x1cf,	"shlqbybi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBYBI      RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_STQX,		RR,	0x144,	"stqx",		_A3(A_T,A_A,A_B),		00111,	LS)	/* SToreQindeX   M[Ra+Rb]&lt;-RT */</div><div class='del'>-APUOP(M_SHUFB,		RRR,	0x580,	"shufb",	_A4(A_C,A_A,A_B,A_T),	02111,	SHUF)	/* SHUFfleBytes  RC&lt;-f(RA,RB,RT) */</div><div class='del'>-APUOP(M_IL,		RI16,	0x204,	"il",		_A2(A_T,A_S16),	00002,	FX2)	/* ImmLoad       RT&lt;-sxt(I16) */</div><div class='del'>-APUOP(M_ILH,		RI16,	0x20c,	"ilh",		_A2(A_T,A_X16),	00002,	FX2)	/* ImmLoadH      RT&lt;-I16 */</div><div class='del'>-APUOP(M_ILHU,		RI16,	0x208,	"ilhu",		_A2(A_T,A_X16),	00002,	FX2)	/* ImmLoadHUpper RT&lt;-I16&lt;&lt;16 */</div><div class='del'>-APUOP(M_ILA,		RI18,	0x210,	"ila",		_A2(A_T,A_U18),	00002,	FX2)	/* ImmLoadAddr   RT&lt;-zxt(I18) */</div><div class='del'>-APUOP(M_NOP,		RR,	0x201,	"nop",		_A1(A_T),		00000,	NOP)	/* XNOP          no_operation */</div><div class='del'>-APUOP(M_NOP2,		RR,	0x201,	"nop",		_A0(),		00000,	NOP)	/* XNOP          no_operation */</div><div class='del'>-APUOP(M_IOHL,		RI16,	0x304,	"iohl",		_A2(A_T,A_X16),	00003,	FX2)	/* AddImmeXt     RT&lt;-RT+sxt(I16) */</div><div class='del'>-APUOP(M_ANDBI,		RI10,	0x0b0,	"andbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* AND%I         RT&lt;-RA&amp;I10 */</div><div class='del'>-APUOP(M_ANDHI,		RI10,	0x0a8,	"andhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* AND%I         RT&lt;-RA&amp;I10 */</div><div class='del'>-APUOP(M_ANDI,		RI10,	0x0a0,	"andi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* AND%I         RT&lt;-RA&amp;I10 */</div><div class='del'>-APUOP(M_ORBI,		RI10,	0x030,	"orbi",		_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* OR%I          RT&lt;-RA|I10 */</div><div class='del'>-APUOP(M_ORHI,		RI10,	0x028,	"orhi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* OR%I          RT&lt;-RA|I10 */</div><div class='del'>-APUOP(M_ORI,		RI10,	0x020,	"ori",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* OR%I          RT&lt;-RA|I10 */</div><div class='del'>-APUOP(M_ORX,		RR,	0x1f0,	"orx",		_A2(A_T,A_A),		00012,	BR)	/* ORX           RT&lt;-RA.w0|RA.w1|RA.w2|RA.w3 */</div><div class='del'>-APUOP(M_XORBI,		RI10,	0x230,	"xorbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* XOR%I         RT&lt;-RA^I10 */</div><div class='del'>-APUOP(M_XORHI,		RI10,	0x228,	"xorhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* XOR%I         RT&lt;-RA^I10 */</div><div class='del'>-APUOP(M_XORI,		RI10,	0x220,	"xori",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* XOR%I         RT&lt;-RA^I10 */</div><div class='del'>-APUOP(M_AHI,		RI10,	0x0e8,	"ahi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* Add%Immed     RT&lt;-RA+I10 */</div><div class='del'>-APUOP(M_AI,		RI10,	0x0e0,	"ai",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* Add%Immed     RT&lt;-RA+I10 */</div><div class='del'>-APUOP(M_SFHI,		RI10,	0x068,	"sfhi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* SubFrom%Imm   RT&lt;-I10-RA */</div><div class='del'>-APUOP(M_SFI,		RI10,	0x060,	"sfi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* SubFrom%Imm   RT&lt;-I10-RA */</div><div class='del'>-APUOP(M_CGTBI,		RI10,	0x270,	"cgtbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CGT%I         RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CGTHI,		RI10,	0x268,	"cgthi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CGT%I         RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CGTI,		RI10,	0x260,	"cgti",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CGT%I         RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CLGTBI,		RI10,	0x2f0,	"clgtbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CLGT%I        RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CLGTHI,		RI10,	0x2e8,	"clgthi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CLGT%I        RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CLGTI,		RI10,	0x2e0,	"clgti",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CLGT%I        RT&lt;-(RA&gt;I10) */</div><div class='del'>-APUOP(M_CEQBI,		RI10,	0x3f0,	"ceqbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CEQ%I         RT&lt;-(RA=I10) */</div><div class='del'>-APUOP(M_CEQHI,		RI10,	0x3e8,	"ceqhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CEQ%I         RT&lt;-(RA=I10) */</div><div class='del'>-APUOP(M_CEQI,		RI10,	0x3e0,	"ceqi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CEQ%I         RT&lt;-(RA=I10) */</div><div class='del'>-APUOP(M_HGTI,		RI10,	0x278,	"hgti",		_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltGTI       halt_if(RA&gt;I10) */</div><div class='del'>-APUOP(M_HGTI2,		RI10,	0x278,	"hgti",		_A2(A_A,A_S10),	00010,	FX2)	/* HaltGTI       halt_if(RA&gt;I10) */</div><div class='del'>-APUOP(M_HLGTI,		RI10,	0x2f8,	"hlgti",	_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltLGTI      halt_if(RA&gt;I10) */</div><div class='del'>-APUOP(M_HLGTI2,		RI10,	0x2f8,	"hlgti",	_A2(A_A,A_S10),	00010,	FX2)	/* HaltLGTI      halt_if(RA&gt;I10) */</div><div class='del'>-APUOP(M_HEQI,		RI10,	0x3f8,	"heqi",		_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltEQImm     halt_if(RA=I10) */</div><div class='del'>-APUOP(M_HEQI2,		RI10,	0x3f8,	"heqi",		_A2(A_A,A_S10),	00010,	FX2)	/* HaltEQImm     halt_if(RA=I10) */</div><div class='del'>-APUOP(M_MPYI,		RI10,	0x3a0,	"mpyi",		_A3(A_T,A_A,A_S10),	00012,	FP7)	/* MPYI          RT&lt;-RA*I10 */</div><div class='del'>-APUOP(M_MPYUI,		RI10,	0x3a8,	"mpyui",	_A3(A_T,A_A,A_S10),	00012,	FP7)	/* MPYUI         RT&lt;-RA*I10 */</div><div class='del'>-APUOP(M_CFLTS,		RI8,	0x3b0,	"cflts",	_A3(A_T,A_A,A_U7A),	00012,	FP7)	/* CFLTS         RT&lt;-int(RA,I8) */</div><div class='del'>-APUOP(M_CFLTU,		RI8,	0x3b2,	"cfltu",	_A3(A_T,A_A,A_U7A),	00012,	FP7)	/* CFLTU         RT&lt;-int(RA,I8) */</div><div class='del'>-APUOP(M_CSFLT,		RI8,	0x3b4,	"csflt",	_A3(A_T,A_A,A_U7B),	00012,	FP7)	/* CSFLT         RT&lt;-flt(RA,I8) */</div><div class='del'>-APUOP(M_CUFLT,		RI8,	0x3b6,	"cuflt",	_A3(A_T,A_A,A_U7B),	00012,	FP7)	/* CUFLT         RT&lt;-flt(RA,I8) */</div><div class='del'>-APUOP(M_FESD,		RR,	0x3b8,	"fesd",		_A2(A_T,A_A),	00012,	FPD)	/* FESD          RT&lt;-double(RA) */</div><div class='del'>-APUOP(M_FRDS,		RR,	0x3b9,	"frds",		_A2(A_T,A_A),	00012,	FPD)	/* FRDS          RT&lt;-single(RA) */</div><div class='del'>-APUOP(M_FSCRRD,		RR,	0x398,	"fscrrd",	_A1(A_T),		00002,	FPD)	/* FSCRRD        RT&lt;-FP_status */</div><div class='del'>-APUOP(M_FSCRWR,		RR,	0x3ba,	"fscrwr",	_A2(A_T,A_A),	00010,	FP7)	/* FSCRWR        FP_status&lt;-RA */</div><div class='del'>-APUOP(M_FSCRWR2,	RR,	0x3ba,	"fscrwr",	_A1(A_A),		00010,	FP7)	/* FSCRWR        FP_status&lt;-RA */</div><div class='del'>-APUOP(M_CLZ,		RR,	0x2a5,	"clz",		_A2(A_T,A_A),	00012,	FX2)	/* CLZ           RT&lt;-clz(RA) */</div><div class='del'>-APUOP(M_CNTB,		RR,	0x2b4,	"cntb",		_A2(A_T,A_A),	00012,	FXB)	/* CNT           RT&lt;-pop(RA) */</div><div class='del'>-APUOP(M_XSBH,		RR,	0x2b6,	"xsbh",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignBtoH   RT&lt;-sign_ext(RA) */</div><div class='del'>-APUOP(M_XSHW,		RR,	0x2ae,	"xshw",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignHtoW   RT&lt;-sign_ext(RA) */</div><div class='del'>-APUOP(M_XSWD,		RR,	0x2a6,	"xswd",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignWtoD   RT&lt;-sign_ext(RA) */</div><div class='del'>-APUOP(M_ROTI,		RI7,	0x078,	"roti",		_A3(A_T,A_A,A_S7N),	00012,	FX3)	/* ROT%I         RT&lt;-RA&lt;&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTMI,		RI7,	0x079,	"rotmi",	_A3(A_T,A_A,A_S7),	00012,	FX3)	/* ROT%MI        RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTMAI,		RI7,	0x07a,	"rotmai",	_A3(A_T,A_A,A_S7),	00012,	FX3)	/* ROTMA%I       RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_SHLI,		RI7,	0x07b,	"shli",		_A3(A_T,A_A,A_U6),	00012,	FX3)	/* SHL%I         RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTHI,		RI7,	0x07c,	"rothi",	_A3(A_T,A_A,A_S7N),	00012,	FX3)	/* ROT%I         RT&lt;-RA&lt;&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTHMI,		RI7,	0x07d,	"rothmi",	_A3(A_T,A_A,A_S6),	00012,	FX3)	/* ROT%MI        RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_ROTMAHI,	RI7,	0x07e,	"rotmahi",	_A3(A_T,A_A,A_S6),	00012,	FX3)	/* ROTMA%I       RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_SHLHI,		RI7,	0x07f,	"shlhi",	_A3(A_T,A_A,A_U5),	00012,	FX3)	/* SHL%I         RT&lt;-RA&lt;&lt;I7 */</div><div class='del'>-APUOP(M_A,		RR,	0x0c0,	"a",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* Add%          RT&lt;-RA+RB */</div><div class='del'>-APUOP(M_AH,		RR,	0x0c8,	"ah",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* Add%          RT&lt;-RA+RB */</div><div class='del'>-APUOP(M_SF,		RR,	0x040,	"sf",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* SubFrom%      RT&lt;-RB-RA */</div><div class='del'>-APUOP(M_SFH,		RR,	0x048,	"sfh",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* SubFrom%      RT&lt;-RB-RA */</div><div class='del'>-APUOP(M_CGT,		RR,	0x240,	"cgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CGTB,		RR,	0x250,	"cgtb",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CGTH,		RR,	0x248,	"cgth",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CLGT,		RR,	0x2c0,	"clgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CLGTB,		RR,	0x2d0,	"clgtb",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CLGTH,		RR,	0x2c8,	"clgth",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT&lt;-(RA&gt;RB) */</div><div class='del'>-APUOP(M_CEQ,		RR,	0x3c0,	"ceq",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT&lt;-(RA=RB) */</div><div class='del'>-APUOP(M_CEQB,		RR,	0x3d0,	"ceqb",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT&lt;-(RA=RB) */</div><div class='del'>-APUOP(M_CEQH,		RR,	0x3c8,	"ceqh",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT&lt;-(RA=RB) */</div><div class='del'>-APUOP(M_HGT,		RR,	0x258,	"hgt",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltGT        halt_if(RA&gt;RB) */</div><div class='del'>-APUOP(M_HGT2,		RR,	0x258,	"hgt",		_A2(A_A,A_B),	00110,	FX2)	/* HaltGT        halt_if(RA&gt;RB) */</div><div class='del'>-APUOP(M_HLGT,		RR,	0x2d8,	"hlgt",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltLGT       halt_if(RA&gt;RB) */</div><div class='del'>-APUOP(M_HLGT2,		RR,	0x2d8,	"hlgt",		_A2(A_A,A_B),	00110,	FX2)	/* HaltLGT       halt_if(RA&gt;RB) */</div><div class='del'>-APUOP(M_HEQ,		RR,	0x3d8,	"heq",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltEQ        halt_if(RA=RB) */</div><div class='del'>-APUOP(M_HEQ2,		RR,	0x3d8,	"heq",		_A2(A_A,A_B),	00110,	FX2)	/* HaltEQ        halt_if(RA=RB) */</div><div class='del'>-APUOP(M_FCEQ,		RR,	0x3c2,	"fceq",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCEQ          RT&lt;-(RA=RB) */</div><div class='del'>-APUOP(M_FCMEQ,		RR,	0x3ca,	"fcmeq",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCMEQ         RT&lt;-(|RA|=|RB|) */</div><div class='del'>-APUOP(M_FCGT,		RR,	0x2c2,	"fcgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCGT          RT&lt;-(RA&lt;RB) */</div><div class='del'>-APUOP(M_FCMGT,		RR,	0x2ca,	"fcmgt",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCMGT         RT&lt;-(|RA|&lt;|RB|) */</div><div class='del'>-APUOP(M_AND,		RR,	0x0c1,	"and",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* AND           RT&lt;-RA&amp;RB */</div><div class='del'>-APUOP(M_NAND,		RR,	0x0c9,	"nand",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* NAND          RT&lt;-!(RA&amp;RB) */</div><div class='del'>-APUOP(M_OR,		RR,	0x041,	"or",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* OR            RT&lt;-RA|RB */</div><div class='del'>-APUOP(M_NOR,		RR,	0x049,	"nor",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* NOR           RT&lt;-!(RA&amp;RB) */</div><div class='del'>-APUOP(M_XOR,		RR,	0x241,	"xor",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* XOR           RT&lt;-RA^RB */</div><div class='del'>-APUOP(M_EQV,		RR,	0x249,	"eqv",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* EQuiValent    RT&lt;-!(RA^RB) */</div><div class='del'>-APUOP(M_ANDC,		RR,	0x2c1,	"andc",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* ANDComplement RT&lt;-RA&amp;!RB */</div><div class='del'>-APUOP(M_ORC,		RR,	0x2c9,	"orc",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* ORComplement  RT&lt;-RA|!RB */</div><div class='del'>-APUOP(M_ABSDB,		RR,	0x053,	"absdb",	_A3(A_T,A_A,A_B),		00112,	FXB)	/* ABSoluteDiff  RT&lt;-|RA-RB| */</div><div class='del'>-APUOP(M_AVGB,		RR,	0x0d3,	"avgb",		_A3(A_T,A_A,A_B),		00112,	FXB)	/* AVG%          RT&lt;-(RA+RB+1)/2 */</div><div class='del'>-APUOP(M_SUMB,		RR,	0x253,	"sumb",		_A3(A_T,A_A,A_B),		00112,	FXB)	/* SUM%          RT&lt;-f(RA,RB) */</div><div class='del'>-APUOP(M_DFA,		RR,	0x2cc,	"dfa",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFAdd         RT&lt;-RA+RB */</div><div class='del'>-APUOP(M_DFM,		RR,	0x2ce,	"dfm",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFMul         RT&lt;-RA*RB */</div><div class='del'>-APUOP(M_DFS,		RR,	0x2cd,	"dfs",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFSub         RT&lt;-RA-RB */</div><div class='del'>-APUOP(M_FA,		RR,	0x2c4,	"fa",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FAdd          RT&lt;-RA+RB */</div><div class='del'>-APUOP(M_FM,		RR,	0x2c6,	"fm",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FMul          RT&lt;-RA*RB */</div><div class='del'>-APUOP(M_FS,		RR,	0x2c5,	"fs",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FSub          RT&lt;-RA-RB */</div><div class='del'>-APUOP(M_MPY,		RR,	0x3c4,	"mpy",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPY           RT&lt;-RA*RB */</div><div class='del'>-APUOP(M_MPYH,		RR,	0x3c5,	"mpyh",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYH          RT&lt;-(RAh*RB)&lt;&lt;16 */</div><div class='del'>-APUOP(M_MPYHH,		RR,	0x3c6,	"mpyhh",	_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYHH         RT&lt;-RAh*RBh */</div><div class='del'>-APUOP(M_MPYHHU,		RR,	0x3ce,	"mpyhhu",	_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYHHU        RT&lt;-RAh*RBh */</div><div class='del'>-APUOP(M_MPYS,		RR,	0x3c7,	"mpys",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYS          RT&lt;-(RA*RB)&gt;&gt;16 */</div><div class='del'>-APUOP(M_MPYU,		RR,	0x3cc,	"mpyu",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYU          RT&lt;-RA*RB */</div><div class='del'>-APUOP(M_FI,		RR,	0x3d4,	"fi",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* FInterpolate  RT&lt;-f(RA,RB) */</div><div class='del'>-APUOP(M_ROT,		RR,	0x058,	"rot",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%          RT&lt;-RA&lt;&lt;&lt;RB */</div><div class='del'>-APUOP(M_ROTM,		RR,	0x059,	"rotm",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%M         RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTMA,		RR,	0x05a,	"rotma",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROTMA%        RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_SHL,		RR,	0x05b,	"shl",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* SHL%          RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTH,		RR,	0x05c,	"roth",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%          RT&lt;-RA&lt;&lt;&lt;RB */</div><div class='del'>-APUOP(M_ROTHM,		RR,	0x05d,	"rothm",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%M         RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_ROTMAH,		RR,	0x05e,	"rotmah",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROTMA%        RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_SHLH,		RR,	0x05f,	"shlh",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* SHL%          RT&lt;-RA&lt;&lt;Rb */</div><div class='del'>-APUOP(M_MPYHHA,		RR,	0x346,	"mpyhha",	_A3(A_T,A_A,A_B),		00113,	FP7)	/* MPYHHA        RT&lt;-RAh*RBh+RT */</div><div class='del'>-APUOP(M_MPYHHAU,	RR,	0x34e,	"mpyhhau",	_A3(A_T,A_A,A_B),		00113,	FP7)	/* MPYHHAU       RT&lt;-RAh*RBh+RT */</div><div class='del'>-APUOP(M_DFMA,		RR,	0x35c,	"dfma",		_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFMAdd        RT&lt;-RT+RA*RB */</div><div class='del'>-APUOP(M_DFMS,		RR,	0x35d,	"dfms",		_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFMSub        RT&lt;-RA*RB-RT */</div><div class='del'>-APUOP(M_DFNMS,		RR,	0x35e,	"dfnms",	_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFNMSub       RT&lt;-RT-RA*RB */</div><div class='del'>-APUOP(M_DFNMA,		RR,	0x35f,	"dfnma",	_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFNMAdd       RT&lt;-(-RT)-RA*RB */</div><div class='del'>-APUOP(M_FMA,		RRR,	0x700,	"fma",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FMAdd         RC&lt;-RT+RA*RB */</div><div class='del'>-APUOP(M_FMS,		RRR,	0x780,	"fms",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FMSub         RC&lt;-RA*RB-RT */</div><div class='del'>-APUOP(M_FNMS,		RRR,	0x680,	"fnms",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FNMSub        RC&lt;-RT-RA*RB */</div><div class='del'>-APUOP(M_MPYA,		RRR,	0x600,	"mpya",		_A4(A_C,A_A,A_B,A_T),	02111,	FP7)	/* MPYA          RC&lt;-RA*RB+RT */</div><div class='del'>-APUOP(M_SELB,		RRR,	0x400,	"selb",		_A4(A_C,A_A,A_B,A_T),	02111,	FX2)	/* SELectBits    RC&lt;-RA&amp;RT|RB&amp;!RT */</div><div class='del'>-/* for system function call, this uses op-code of mtspr */</div><div class='del'>-APUOP(M_SYSCALL,	RI7,    0x10c,	"syscall",      _A3(A_T,A_A,A_S7N),	00002,	SPR)        /* System Call */</div><div class='del'>-/*</div><div class='del'>-pseudo instruction:</div><div class='del'>-system call</div><div class='del'>-value of I9	operation</div><div class='del'>-0	halt</div><div class='del'>-1		rt[0] = open(MEM[ra[0]],	ra[1])</div><div class='del'>-2		rt[0] = close(ra[0])</div><div class='del'>-3		rt[0] = read(ra[0],	MEM[ra[1]],	ra[2])</div><div class='del'>-4		rt[0] = write(ra[0],	MEM[ra[1]],	ra[2])</div><div class='del'>-5		printf(MEM[ra[0]],	ra[1],	ra[2],	ra[3])</div><div class='del'>-42		rt[0] = clock()</div><div class='del'>-52		rt[0] = lseek(ra0,	ra1,	ra2)</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* new multiprecision add/sub */</div><div class='del'>-APUOP(M_ADDX,		RR,	0x340,	"addx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* Add_eXtended  RT&lt;-RA+RB+RT */</div><div class='del'>-APUOP(M_CG,		RR,	0x0c2,	"cg",		_A3(A_T,A_A,A_B),		00112,		FX2)	/* CarryGenerate RT&lt;-cout(RA+RB) */</div><div class='del'>-APUOP(M_CGX,		RR,	0x342,	"cgx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* CarryGen_eXtd RT&lt;-cout(RA+RB+RT) */</div><div class='del'>-APUOP(M_SFX,		RR,	0x341,	"sfx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* Add_eXtended  RT&lt;-RA+RB+RT */</div><div class='del'>-APUOP(M_BG,		RR,	0x042,	"bg",		_A3(A_T,A_A,A_B),		00112,		FX2)	/* CarryGenerate RT&lt;-cout(RA+RB) */</div><div class='del'>-APUOP(M_BGX,		RR,	0x343,	"bgx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* CarryGen_eXtd RT&lt;-cout(RA+RB+RT) */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-</div><div class='del'>-The following ops are a subset of above except with feature bits set.</div><div class='del'>-Feature bits are bits 11-17 of the instruction:</div><div class='del'>-</div><div class='del'>-  11 - C &amp; P feature bit</div><div class='del'>-  12 - disable interrupts</div><div class='del'>-  13 - enable interrupts</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-APUOPFB(M_BID,		RR,	0x1a8,	0x20,	"bid",		_A1(A_A),		00010,	BR)	/* BI            IP&lt;-RA */</div><div class='del'>-APUOPFB(M_BIE,		RR,	0x1a8,	0x10,	"bie",		_A1(A_A),		00010,	BR)	/* BI            IP&lt;-RA */</div><div class='del'>-APUOPFB(M_BISLD,	RR,	0x1a9,	0x20,	"bisld",	_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP&lt;-IP,RA */</div><div class='del'>-APUOPFB(M_BISLE,	RR,	0x1a9,	0x10,	"bisle",	_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP&lt;-IP,RA */</div><div class='del'>-APUOPFB(M_IRETD,  	RR,	0x1aa,	0x20,	"iretd",	_A1(A_A), 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOPFB(M_IRETD2,  	RR,	0x1aa,	0x20,	"iretd",	_A0(),	 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOPFB(M_IRETE,  	RR,	0x1aa,	0x10,	"irete",	_A1(A_A), 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOPFB(M_IRETE2,  	RR,	0x1aa,	0x10,	"irete",	_A0(),	 	00010,	BR)	/* IRET          IP&lt;-SRR0 */</div><div class='del'>-APUOPFB(M_BISLEDD,	RR,	0x1ab,	0x20,	"bisledd",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP&lt;-IP,RA_if(ext) */</div><div class='del'>-APUOPFB(M_BISLEDE,	RR,	0x1ab,	0x10,	"bislede",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP&lt;-IP,RA_if(ext) */</div><div class='del'>-APUOPFB(M_BIHNZD,	RR,	0x12b,	0x20,	"bihnzd",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHNZE,	RR,	0x12b,	0x10,	"bihnze",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHZD,	RR,	0x12a,	0x20,	"bihzd",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHZE,	RR,	0x12a,	0x10,	"bihze",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BINZD,	RR,	0x129,	0x20,	"binzd",	_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BINZE,	RR,	0x129,	0x10,	"binze",	_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIZD,		RR,	0x128,	0x20,	"bizd",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIZE,		RR,	0x128,	0x10,	"bize",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_SYNCC,	RR,	0x002,	0x40,	"syncc",	_A0(),		00000,	BR)	/* SYNCC          flush_pipe */</div><div class='del'>-APUOPFB(M_HBRP,		LBTI,	0x1ac,	0x40,	"hbrp",		_A0(),	        00010,	LS)	/* HBR           BTB[B9]&lt;-M[Ra] */</div><div class='del'>-</div><div class='del'>-/* Synonyms required by the AS manual. */</div><div class='del'>-APUOP(M_LR,		RI10,	0x020,	"lr",		_A2(A_T,A_A),	00012,	FX2)	/* OR%I          RT&lt;-RA|I10 */</div><div class='del'>-APUOP(M_BIHT,		RR,	0x12b,	"biht", 	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BIHF,		RR,	0x12a,	"bihf",		_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BIT,		RR,	0x129,	"bit",		_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOP(M_BIF,		RR,	0x128,	"bif",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHTD,	RR,	0x12b,	0x20,	"bihtd",	_A2(A_T,A_A),	00011,	BR)	/* BIHNF         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHTE,	RR,	0x12b,	0x10,	"bihte",	_A2(A_T,A_A),	00011,	BR)	/* BIHNF         IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHFD,	RR,	0x12a,	0x20,	"bihfd",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIHFE,	RR,	0x12a,	0x10,	"bihfe",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BITD, 	RR,	0x129,	0x20,	"bitd", 	_A2(A_T,A_A),	00011,	BR)	/* BINF          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BITE, 	RR,	0x129,	0x10,	"bite", 	_A2(A_T,A_A),	00011,	BR)	/* BINF          IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIFD,		RR,	0x128,	0x20,	"bifd",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-APUOPFB(M_BIFE,		RR,	0x128,	0x10,	"bife",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP&lt;-RA_if(RT) */</div><div class='del'>-</div><div class='del'>-#undef _A0</div><div class='del'>-#undef _A1</div><div class='del'>-#undef _A2</div><div class='del'>-#undef _A3</div><div class='del'>-#undef _A4</div><div class='head'>diff --git a/arch/powerpc/xmon/spu-opc.c b/arch/powerpc/xmon/spu-opc.c<br/>deleted file mode 100644<br/>index 6d8197cc540b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/spu-opc.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu-opc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/* SPU opcode list</div><div class='del'>-</div><div class='del'>-   Copyright 2006 Free Software Foundation, Inc.</div><div class='del'>-</div><div class='del'>-   This file is part of GDB, GAS, and the GNU binutils.</div><div class='del'>-</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#include "spu.h"</div><div class='del'>-</div><div class='del'>-/* This file holds the Spu opcode table */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-   Example contents of spu-insn.h</div><div class='del'>-      id_tag	mode	mode	type	opcode	mnemonic	asmtype	    dependency		FPU	L/S?	branch?	instruction   </div><div class='del'>-                QUAD	WORD                                               (0,RC,RB,RA,RT)    latency  			              		</div><div class='del'>-   APUOP(M_LQD,	1,	0,	RI9,	0x1f8,	"lqd",		ASM_RI9IDX,	00012,		FXU,	1,	0)	Load Quadword d-form </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-const struct spu_opcode spu_opcodes[] = {</div><div class='del'>-#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \</div><div class='del'>-	{ MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },</div><div class='del'>-#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \</div><div class='del'>-	{ MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },</div><div class='del'>-#include "spu-insns.h"</div><div class='del'>-#undef APUOP</div><div class='del'>-#undef APUOPFB</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const int spu_num_opcodes = ARRAY_SIZE(spu_opcodes);</div><div class='head'>diff --git a/arch/powerpc/xmon/spu.h b/arch/powerpc/xmon/spu.h<br/>deleted file mode 100644<br/>index 2d13b1a5fa87..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/spu.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/spu.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,115 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/* SPU ELF support for BFD.</div><div class='del'>-</div><div class='del'>-   Copyright 2006 Free Software Foundation, Inc.</div><div class='del'>-</div><div class='del'>-   This file is part of GDB, GAS, and the GNU binutils.</div><div class='del'>-</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* These two enums are from rel_apu/common/spu_asm_format.h */</div><div class='del'>-/* definition of instruction format */</div><div class='del'>-typedef enum {</div><div class='del'>-  RRR,</div><div class='del'>-  RI18,</div><div class='del'>-  RI16,</div><div class='del'>-  RI10,</div><div class='del'>-  RI8,</div><div class='del'>-  RI7,</div><div class='del'>-  RR,</div><div class='del'>-  LBT,</div><div class='del'>-  LBTI,</div><div class='del'>-  IDATA,</div><div class='del'>-  UNKNOWN_IFORMAT</div><div class='del'>-} spu_iformat;</div><div class='del'>-</div><div class='del'>-/* These values describe assembly instruction arguments.  They indicate</div><div class='del'>- * how to encode, range checking and which relocation to use. */</div><div class='del'>-typedef enum {</div><div class='del'>-  A_T,  /* register at pos 0 */</div><div class='del'>-  A_A,  /* register at pos 7 */</div><div class='del'>-  A_B,  /* register at pos 14 */</div><div class='del'>-  A_C,  /* register at pos 21 */</div><div class='del'>-  A_S,  /* special purpose register at pos 7 */</div><div class='del'>-  A_H,  /* channel register at pos 7 */</div><div class='del'>-  A_P,  /* parenthesis, this has to separate regs from immediates */</div><div class='del'>-  A_S3,</div><div class='del'>-  A_S6,</div><div class='del'>-  A_S7N,</div><div class='del'>-  A_S7,</div><div class='del'>-  A_U7A,</div><div class='del'>-  A_U7B,</div><div class='del'>-  A_S10B,</div><div class='del'>-  A_S10,</div><div class='del'>-  A_S11,</div><div class='del'>-  A_S11I,</div><div class='del'>-  A_S14,</div><div class='del'>-  A_S16,</div><div class='del'>-  A_S18,</div><div class='del'>-  A_R18,</div><div class='del'>-  A_U3,</div><div class='del'>-  A_U5,</div><div class='del'>-  A_U6,</div><div class='del'>-  A_U7,</div><div class='del'>-  A_U14,</div><div class='del'>-  A_X16,</div><div class='del'>-  A_U18,</div><div class='del'>-  A_MAX</div><div class='del'>-} spu_aformat;</div><div class='del'>-</div><div class='del'>-enum spu_insns {</div><div class='del'>-#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \</div><div class='del'>-	TAG,</div><div class='del'>-#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \</div><div class='del'>-	TAG,</div><div class='del'>-#include "spu-insns.h"</div><div class='del'>-#undef APUOP</div><div class='del'>-#undef APUOPFB</div><div class='del'>-        M_SPU_MAX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct spu_opcode</div><div class='del'>-{</div><div class='del'>-   spu_iformat insn_type;</div><div class='del'>-   unsigned int opcode;</div><div class='del'>-   char *mnemonic;</div><div class='del'>-   int arg[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) &lt;&lt; (32-size-pos))) &gt;&gt; (32-size))</div><div class='del'>-#define UNSIGNED_EXTRACT(insn,size,pos) (((insn) &gt;&gt; pos) &amp; ((1 &lt;&lt; size)-1))</div><div class='del'>-</div><div class='del'>-#define DECODE_INSN_RT(insn) (insn &amp; 0x7f)</div><div class='del'>-#define DECODE_INSN_RA(insn) ((insn &gt;&gt; 7) &amp; 0x7f)</div><div class='del'>-#define DECODE_INSN_RB(insn) ((insn &gt;&gt; 14) &amp; 0x7f)</div><div class='del'>-#define DECODE_INSN_RC(insn) ((insn &gt;&gt; 21) &amp; 0x7f)</div><div class='del'>-</div><div class='del'>-#define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14)</div><div class='del'>-#define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14)</div><div class='del'>-</div><div class='del'>-/* For branching, immediate loads, hbr and  lqa/stqa. */</div><div class='del'>-#define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7)</div><div class='del'>-#define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7)</div><div class='del'>-</div><div class='del'>-/* for stop */</div><div class='del'>-#define DECODE_INSN_U14(insn) UNSIGNED_EXTRACT(insn,14,0)</div><div class='del'>-</div><div class='del'>-/* For ila */</div><div class='del'>-#define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7)</div><div class='del'>-#define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7)</div><div class='del'>-</div><div class='del'>-/* For rotate and shift and generate control mask */</div><div class='del'>-#define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14)</div><div class='del'>-#define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14)</div><div class='del'>-</div><div class='del'>-/* For float &lt;-&gt; int conversion */</div><div class='del'>-#define DECODE_INSN_I8(insn)  SIGNED_EXTRACT(insn,8,14)</div><div class='del'>-#define DECODE_INSN_U8(insn) UNSIGNED_EXTRACT(insn,8,14)</div><div class='del'>-</div><div class='del'>-/* For hbr  */</div><div class='del'>-#define DECODE_INSN_I9a(insn) ((SIGNED_EXTRACT(insn,2,23) &lt;&lt; 7) | UNSIGNED_EXTRACT(insn,7,0))</div><div class='del'>-#define DECODE_INSN_I9b(insn) ((SIGNED_EXTRACT(insn,2,14) &lt;&lt; 7) | UNSIGNED_EXTRACT(insn,7,0))</div><div class='del'>-#define DECODE_INSN_U9a(insn) ((UNSIGNED_EXTRACT(insn,2,23) &lt;&lt; 7) | UNSIGNED_EXTRACT(insn,7,0))</div><div class='del'>-#define DECODE_INSN_U9b(insn) ((UNSIGNED_EXTRACT(insn,2,14) &lt;&lt; 7) | UNSIGNED_EXTRACT(insn,7,0))</div><div class='del'>-</div><div class='head'>diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c<br/>index e6cddbb2305f..cb3a3244ae6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/xmon.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/xmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/xmon.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/xmon/xmon.c</a></div><div class='hunk'>@@ -41,8 +41,6 @@</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include &lt;asm/sstep.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='del'>-#include &lt;asm/spu.h&gt;</div><div class='del'>-#include &lt;asm/spu_priv1.h&gt;</div><div class='ctx'> #include &lt;asm/setjmp.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/debug.h&gt;</div><div class='hunk'>@@ -50,7 +48,7 @@</div><div class='ctx'> #include &lt;asm/xive.h&gt;</div><div class='ctx'> #include &lt;asm/opal.h&gt;</div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='del'>-#include &lt;asm/code-patching.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> #include &lt;asm/interrupt.h&gt;</div><div class='hunk'>@@ -188,8 +186,6 @@ static void xmon_print_symbol(unsigned long address, const char *mid,</div><div class='ctx'> 			      const char *after);</div><div class='ctx'> static const char *getvecname(unsigned long vec);</div><div class='ctx'> </div><div class='del'>-static int do_spu_cmd(void);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_44x</div><div class='ctx'> static void dump_tlb_44x(void);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -272,13 +268,6 @@ Commands:\n\</div><div class='ctx'>   P 	list processes/tasks\n\</div><div class='ctx'>   r	print registers\n\</div><div class='ctx'>   s	single step\n"</div><div class='del'>-#ifdef CONFIG_SPU_BASE</div><div class='del'>-"  ss	stop execution on all spus\n\</div><div class='del'>-  sr	restore execution on stopped spus\n\</div><div class='del'>-  sf  #	dump spu fields for spu # (in hex)\n\</div><div class='del'>-  sd  #	dump spu local store for spu # (in hex)\n\</div><div class='del'>-  sdi #	disassemble spu local store for spu # (in hex)\n"</div><div class='del'>-#endif</div><div class='ctx'> "  S	print special registers\n\</div><div class='ctx'>   Sa    print all SPRs\n\</div><div class='ctx'>   Sr #	read SPR #\n\</div><div class='hunk'>@@ -1112,8 +1101,6 @@ cmds(struct pt_regs *excp)</div><div class='ctx'> 			cacheflush();</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 's':</div><div class='del'>-			if (do_spu_cmd() == 0)</div><div class='del'>-				break;</div><div class='ctx'> 			if (do_step(excp))</div><div class='ctx'> 				return cmd;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1271,11 +1258,7 @@ static int xmon_batch_next_cpu(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cpu;</div><div class='ctx'> </div><div class='del'>-	while (!cpumask_empty(&amp;xmon_batch_cpus)) {</div><div class='del'>-		cpu = cpumask_next_wrap(smp_processor_id(), &amp;xmon_batch_cpus,</div><div class='del'>-					xmon_batch_start_cpu, true);</div><div class='del'>-		if (cpu &gt;= nr_cpu_ids)</div><div class='del'>-			break;</div><div class='add'>+	for_each_cpu_wrap(cpu, &amp;xmon_batch_cpus, xmon_batch_start_cpu) {</div><div class='ctx'> 		if (xmon_batch_start_cpu == -1)</div><div class='ctx'> 			xmon_batch_start_cpu = cpu;</div><div class='ctx'> 		if (xmon_switch_cpu(cpu))</div><div class='hunk'>@@ -1787,7 +1770,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,</div><div class='ctx'> 				       sp + STACK_INT_FRAME_REGS);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-			printf("--- Exception: %lx %s at ", regs.trap,</div><div class='add'>+			printf("---- Exception: %lx %s at ", regs.trap,</div><div class='ctx'> 			       getvecname(TRAP(&amp;regs)));</div><div class='ctx'> 			pc = regs.nip;</div><div class='ctx'> 			lr = regs.link;</div><div class='hunk'>@@ -2623,9 +2606,9 @@ static void dump_one_paca(int cpu)</div><div class='ctx'> </div><div class='ctx'> 	printf("paca for cpu 0x%x @ %px:\n", cpu, p);</div><div class='ctx'> </div><div class='del'>-	printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no");</div><div class='del'>-	printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no");</div><div class='del'>-	printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no");</div><div class='add'>+	printf(" %-*s = %s\n", 25, "possible", str_yes_no(cpu_possible(cpu)));</div><div class='add'>+	printf(" %-*s = %s\n", 25, "present", str_yes_no(cpu_present(cpu)));</div><div class='add'>+	printf(" %-*s = %s\n", 25, "online", str_yes_no(cpu_online(cpu)));</div><div class='ctx'> </div><div class='ctx'> #define DUMP(paca, name, format)				\</div><div class='ctx'> 	printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca-&gt;name, \</div><div class='hunk'>@@ -3662,7 +3645,7 @@ symbol_lookup(void)</div><div class='ctx'> 	int type = inchar();</div><div class='ctx'> 	unsigned long addr, cpu;</div><div class='ctx'> 	void __percpu *ptr = NULL;</div><div class='del'>-	static char tmp[64];</div><div class='add'>+	static char tmp[KSYM_NAME_LEN];</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case 'a':</div><div class='hunk'>@@ -3671,7 +3654,7 @@ symbol_lookup(void)</div><div class='ctx'> 		termch = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 's':</div><div class='del'>-		getstring(tmp, 64);</div><div class='add'>+		getstring(tmp, KSYM_NAME_LEN);</div><div class='ctx'> 		if (setjmp(bus_error_jmp) == 0) {</div><div class='ctx'> 			catch_memory_errors = 1;</div><div class='ctx'> 			sync();</div><div class='hunk'>@@ -3686,7 +3669,7 @@ symbol_lookup(void)</div><div class='ctx'> 		termch = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 'p':</div><div class='del'>-		getstring(tmp, 64);</div><div class='add'>+		getstring(tmp, KSYM_NAME_LEN);</div><div class='ctx'> 		if (setjmp(bus_error_jmp) == 0) {</div><div class='ctx'> 			catch_memory_errors = 1;</div><div class='ctx'> 			sync();</div><div class='hunk'>@@ -4107,263 +4090,3 @@ void __init xmon_setup(void)</div><div class='ctx'> 	if (xmon_early)</div><div class='ctx'> 		debugger(NULL);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SPU_BASE</div><div class='del'>-</div><div class='del'>-struct spu_info {</div><div class='del'>-	struct spu *spu;</div><div class='del'>-	u64 saved_mfc_sr1_RW;</div><div class='del'>-	u32 saved_spu_runcntl_RW;</div><div class='del'>-	unsigned long dump_addr;</div><div class='del'>-	u8 stopped_ok;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define XMON_NUM_SPUS	16	/* Enough for current hardware */</div><div class='del'>-</div><div class='del'>-static struct spu_info spu_info[XMON_NUM_SPUS];</div><div class='del'>-</div><div class='del'>-void __init xmon_register_spus(struct list_head *list)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(spu, list, full_list) {</div><div class='del'>-		if (spu-&gt;number &gt;= XMON_NUM_SPUS) {</div><div class='del'>-			WARN_ON(1);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		spu_info[spu-&gt;number].spu = spu;</div><div class='del'>-		spu_info[spu-&gt;number].stopped_ok = 0;</div><div class='del'>-		spu_info[spu-&gt;number].dump_addr = (unsigned long)</div><div class='del'>-				spu_info[spu-&gt;number].spu-&gt;local_store;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void stop_spus(void)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-	volatile int i;</div><div class='del'>-	u64 tmp;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; XMON_NUM_SPUS; i++) {</div><div class='del'>-		if (!spu_info[i].spu)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (setjmp(bus_error_jmp) == 0) {</div><div class='del'>-			catch_memory_errors = 1;</div><div class='del'>-			sync();</div><div class='del'>-</div><div class='del'>-			spu = spu_info[i].spu;</div><div class='del'>-</div><div class='del'>-			spu_info[i].saved_spu_runcntl_RW =</div><div class='del'>-				in_be32(&amp;spu-&gt;problem-&gt;spu_runcntl_RW);</div><div class='del'>-</div><div class='del'>-			tmp = spu_mfc_sr1_get(spu);</div><div class='del'>-			spu_info[i].saved_mfc_sr1_RW = tmp;</div><div class='del'>-</div><div class='del'>-			tmp &amp;= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;</div><div class='del'>-			spu_mfc_sr1_set(spu, tmp);</div><div class='del'>-</div><div class='del'>-			sync();</div><div class='del'>-			__delay(200);</div><div class='del'>-</div><div class='del'>-			spu_info[i].stopped_ok = 1;</div><div class='del'>-</div><div class='del'>-			printf("Stopped spu %.2d (was %s)\n", i,</div><div class='del'>-					spu_info[i].saved_spu_runcntl_RW ?</div><div class='del'>-					"running" : "stopped");</div><div class='del'>-		} else {</div><div class='del'>-			catch_memory_errors = 0;</div><div class='del'>-			printf("*** Error stopping spu %.2d\n", i);</div><div class='del'>-		}</div><div class='del'>-		catch_memory_errors = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void restart_spus(void)</div><div class='del'>-{</div><div class='del'>-	struct spu *spu;</div><div class='del'>-	volatile int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; XMON_NUM_SPUS; i++) {</div><div class='del'>-		if (!spu_info[i].spu)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!spu_info[i].stopped_ok) {</div><div class='del'>-			printf("*** Error, spu %d was not successfully stopped"</div><div class='del'>-					", not restarting\n", i);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (setjmp(bus_error_jmp) == 0) {</div><div class='del'>-			catch_memory_errors = 1;</div><div class='del'>-			sync();</div><div class='del'>-</div><div class='del'>-			spu = spu_info[i].spu;</div><div class='del'>-			spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);</div><div class='del'>-			out_be32(&amp;spu-&gt;problem-&gt;spu_runcntl_RW,</div><div class='del'>-					spu_info[i].saved_spu_runcntl_RW);</div><div class='del'>-</div><div class='del'>-			sync();</div><div class='del'>-			__delay(200);</div><div class='del'>-</div><div class='del'>-			printf("Restarted spu %.2d\n", i);</div><div class='del'>-		} else {</div><div class='del'>-			catch_memory_errors = 0;</div><div class='del'>-			printf("*** Error restarting spu %.2d\n", i);</div><div class='del'>-		}</div><div class='del'>-		catch_memory_errors = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DUMP_WIDTH	23</div><div class='del'>-#define DUMP_VALUE(format, field, value)				\</div><div class='del'>-do {									\</div><div class='del'>-	if (setjmp(bus_error_jmp) == 0) {				\</div><div class='del'>-		catch_memory_errors = 1;				\</div><div class='del'>-		sync();							\</div><div class='del'>-		printf("  %-*s = "format"\n", DUMP_WIDTH,		\</div><div class='del'>-				#field, value);				\</div><div class='del'>-		sync();							\</div><div class='del'>-		__delay(200);						\</div><div class='del'>-	} else {							\</div><div class='del'>-		catch_memory_errors = 0;				\</div><div class='del'>-		printf("  %-*s = *** Error reading field.\n",		\</div><div class='del'>-					DUMP_WIDTH, #field);		\</div><div class='del'>-	}								\</div><div class='del'>-	catch_memory_errors = 0;					\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define DUMP_FIELD(obj, format, field)	\</div><div class='del'>-	DUMP_VALUE(format, field, obj-&gt;field)</div><div class='del'>-</div><div class='del'>-static void dump_spu_fields(struct spu *spu)</div><div class='del'>-{</div><div class='del'>-	printf("Dumping spu fields at address %p:\n", spu);</div><div class='del'>-</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", number);</div><div class='del'>-	DUMP_FIELD(spu, "%s", name);</div><div class='del'>-	DUMP_FIELD(spu, "0x%lx", local_store_phys);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", local_store);</div><div class='del'>-	DUMP_FIELD(spu, "0x%lx", ls_size);</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", node);</div><div class='del'>-	DUMP_FIELD(spu, "0x%lx", flags);</div><div class='del'>-	DUMP_FIELD(spu, "%llu", class_0_pending);</div><div class='del'>-	DUMP_FIELD(spu, "0x%llx", class_0_dar);</div><div class='del'>-	DUMP_FIELD(spu, "0x%llx", class_1_dar);</div><div class='del'>-	DUMP_FIELD(spu, "0x%llx", class_1_dsisr);</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", irqs[0]);</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", irqs[1]);</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", irqs[2]);</div><div class='del'>-	DUMP_FIELD(spu, "0x%x", slb_replace);</div><div class='del'>-	DUMP_FIELD(spu, "%d", pid);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", mm);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", ctx);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", rq);</div><div class='del'>-	DUMP_FIELD(spu, "0x%llx", timestamp);</div><div class='del'>-	DUMP_FIELD(spu, "0x%lx", problem_phys);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", problem);</div><div class='del'>-	DUMP_VALUE("0x%x", problem-&gt;spu_runcntl_RW,</div><div class='del'>-			in_be32(&amp;spu-&gt;problem-&gt;spu_runcntl_RW));</div><div class='del'>-	DUMP_VALUE("0x%x", problem-&gt;spu_status_R,</div><div class='del'>-			in_be32(&amp;spu-&gt;problem-&gt;spu_status_R));</div><div class='del'>-	DUMP_VALUE("0x%x", problem-&gt;spu_npc_RW,</div><div class='del'>-			in_be32(&amp;spu-&gt;problem-&gt;spu_npc_RW));</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", priv2);</div><div class='del'>-	DUMP_FIELD(spu, "0x%p", pdata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spu_inst_dump(unsigned long adr, long count, int praddr)</div><div class='del'>-{</div><div class='del'>-	return generic_inst_dump(adr, count, praddr, print_insn_spu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dump_spu_ls(unsigned long num, int subcmd)</div><div class='del'>-{</div><div class='del'>-	unsigned long offset, addr, ls_addr;</div><div class='del'>-</div><div class='del'>-	if (setjmp(bus_error_jmp) == 0) {</div><div class='del'>-		catch_memory_errors = 1;</div><div class='del'>-		sync();</div><div class='del'>-		ls_addr = (unsigned long)spu_info[num].spu-&gt;local_store;</div><div class='del'>-		sync();</div><div class='del'>-		__delay(200);</div><div class='del'>-	} else {</div><div class='del'>-		catch_memory_errors = 0;</div><div class='del'>-		printf("*** Error: accessing spu info for spu %ld\n", num);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	catch_memory_errors = 0;</div><div class='del'>-</div><div class='del'>-	if (scanhex(&amp;offset))</div><div class='del'>-		addr = ls_addr + offset;</div><div class='del'>-	else</div><div class='del'>-		addr = spu_info[num].dump_addr;</div><div class='del'>-</div><div class='del'>-	if (addr &gt;= ls_addr + LS_SIZE) {</div><div class='del'>-		printf("*** Error: address outside of local store\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (subcmd) {</div><div class='del'>-	case 'i':</div><div class='del'>-		addr += spu_inst_dump(addr, 16, 1);</div><div class='del'>-		last_cmd = "sdi\n";</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		prdump(addr, 64);</div><div class='del'>-		addr += 64;</div><div class='del'>-		last_cmd = "sd\n";</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spu_info[num].dump_addr = addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_spu_cmd(void)</div><div class='del'>-{</div><div class='del'>-	static unsigned long num = 0;</div><div class='del'>-	int cmd, subcmd = 0;</div><div class='del'>-</div><div class='del'>-	cmd = inchar();</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case 's':</div><div class='del'>-		stop_spus();</div><div class='del'>-		break;</div><div class='del'>-	case 'r':</div><div class='del'>-		restart_spus();</div><div class='del'>-		break;</div><div class='del'>-	case 'd':</div><div class='del'>-		subcmd = inchar();</div><div class='del'>-		if (isxdigit(subcmd) || subcmd == '\n')</div><div class='del'>-			termch = subcmd;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 'f':</div><div class='del'>-		scanhex(&amp;num);</div><div class='del'>-		if (num &gt;= XMON_NUM_SPUS || !spu_info[num].spu) {</div><div class='del'>-			printf("*** Error: invalid spu number\n");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case 'f':</div><div class='del'>-			dump_spu_fields(spu_info[num].spu);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			dump_spu_ls(num, subcmd);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else /* ! CONFIG_SPU_BASE */</div><div class='del'>-static int do_spu_cmd(void)</div><div class='del'>-{</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/powerpc/xmon/xmon_bpts.h b/arch/powerpc/xmon/xmon_bpts.h<br/>index 377068f52edb..e14e4fb862e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/xmon_bpts.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/powerpc/xmon/xmon_bpts.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/powerpc/xmon/xmon_bpts.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/powerpc/xmon/xmon_bpts.h</a></div><div class='hunk'>@@ -3,12 +3,12 @@</div><div class='ctx'> #define XMON_BPTS_H</div><div class='ctx'> </div><div class='ctx'> #define NBPTS	256</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> #define BPT_SIZE	(sizeof(ppc_inst_t) * 2)</div><div class='ctx'> #define BPT_WORDS	(BPT_SIZE / sizeof(ppc_inst_t))</div><div class='ctx'> </div><div class='ctx'> extern unsigned int bpt_table[NBPTS * BPT_WORDS];</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* XMON_BPTS_H */</div><div class='head'>diff --git a/arch/riscv/Kbuild b/arch/riscv/Kbuild<br/>index 2c585f7a0b6e..126fb738fc44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Kbuild</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='ctx'> obj-y += kernel/ mm/ net/</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB) += boot/dts/</div><div class='ctx'> obj-$(CONFIG_CRYPTO) += crypto/</div><div class='ctx'> obj-y += errata/</div><div class='ctx'> obj-$(CONFIG_KVM) += kvm/</div><div class='head'>diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig<br/>index 62545946ecf4..0c6038dc5dfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Kconfig</a></div><div class='hunk'>@@ -16,6 +16,7 @@ config RISCV</div><div class='ctx'> 	select ACPI_MCFG if (ACPI &amp;&amp; PCI)</div><div class='ctx'> 	select ACPI_PPTT if ACPI</div><div class='ctx'> 	select ACPI_REDUCED_HARDWARE_ONLY if ACPI</div><div class='add'>+	select ACPI_RIMT if ACPI</div><div class='ctx'> 	select ACPI_SPCR_TABLE if ACPI</div><div class='ctx'> 	select ARCH_DMA_DEFAULT_COHERENT</div><div class='ctx'> 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE &amp;&amp; MIGRATION</div><div class='hunk'>@@ -28,10 +29,12 @@ config RISCV</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VIRTUAL if MMU</div><div class='ctx'> 	select ARCH_HAS_DEBUG_VM_PGTABLE</div><div class='ctx'> 	select ARCH_HAS_DEBUG_WX</div><div class='add'>+	select ARCH_HAS_ELF_CORE_EFLAGS</div><div class='ctx'> 	select ARCH_HAS_FAST_MULTIPLIER</div><div class='ctx'> 	select ARCH_HAS_FORTIFY_SOURCE</div><div class='ctx'> 	select ARCH_HAS_GCOV_PROFILE_ALL</div><div class='ctx'> 	select ARCH_HAS_GIGANTIC_PAGE</div><div class='add'>+	select ARCH_HAS_HW_PTE_YOUNG</div><div class='ctx'> 	select ARCH_HAS_KCOV</div><div class='ctx'> 	select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT &amp;&amp; FPU</div><div class='ctx'> 	select ARCH_HAS_MEMBARRIER_CALLBACKS</div><div class='hunk'>@@ -39,8 +42,9 @@ config RISCV</div><div class='ctx'> 	select ARCH_HAS_MMIOWB</div><div class='ctx'> 	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE</div><div class='ctx'> 	select ARCH_HAS_PMEM_API</div><div class='add'>+	select ARCH_HAS_PREEMPT_LAZY</div><div class='ctx'> 	select ARCH_HAS_PREPARE_SYNC_CORE_CMD</div><div class='del'>-	select ARCH_HAS_PTE_DEVMAP if 64BIT &amp;&amp; MMU</div><div class='add'>+	select ARCH_HAS_PTDUMP if MMU</div><div class='ctx'> 	select ARCH_HAS_PTE_SPECIAL</div><div class='ctx'> 	select ARCH_HAS_SET_DIRECT_MAP if MMU</div><div class='ctx'> 	select ARCH_HAS_SET_MEMORY if MMU</div><div class='hunk'>@@ -50,28 +54,32 @@ config RISCV</div><div class='ctx'> 	select ARCH_HAS_SYSCALL_WRAPPER</div><div class='ctx'> 	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST</div><div class='ctx'> 	select ARCH_HAS_UBSAN</div><div class='del'>-	select ARCH_HAS_VDSO_DATA</div><div class='add'>+	select ARCH_HAS_VDSO_ARCH_DATA if HAVE_GENERIC_VDSO</div><div class='add'>+	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select ARCH_KEEP_MEMBLOCK if ACPI</div><div class='ctx'> 	select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE	if 64BIT &amp;&amp; MMU</div><div class='ctx'> 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX</div><div class='ctx'> 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT</div><div class='ctx'> 	select ARCH_STACKWALK</div><div class='ctx'> 	select ARCH_SUPPORTS_ATOMIC_RMW</div><div class='del'>-	select ARCH_SUPPORTS_CFI_CLANG</div><div class='add'>+	# clang &gt;= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2</div><div class='add'>+	select ARCH_SUPPORTS_CFI if (!CC_IS_CLANG || CLANG_VERSION &gt;= 170000)</div><div class='ctx'> 	select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU</div><div class='add'>+	select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE</div><div class='ctx'> 	select ARCH_SUPPORTS_HUGETLBFS if MMU</div><div class='del'>-	# LLD &gt;= 14: https://github.com/llvm/llvm-project/issues/50505</div><div class='del'>-	select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION &gt;= 140000</div><div class='del'>-	select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION &gt;= 140000</div><div class='add'>+	select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY</div><div class='add'>+	select ARCH_SUPPORTS_LTO_CLANG_THIN</div><div class='add'>+	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT &amp;&amp; MMU</div><div class='ctx'> 	select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK if MMU</div><div class='ctx'> 	select ARCH_SUPPORTS_RT</div><div class='ctx'> 	select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK</div><div class='add'>+	select ARCH_SUPPORTS_SCHED_MC if SMP</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT</div><div class='ctx'> 	select ARCH_USE_MEMTEST</div><div class='ctx'> 	select ARCH_USE_QUEUED_RWLOCKS</div><div class='ctx'> 	select ARCH_USE_SYM_ANNOTATIONS</div><div class='del'>-	select ARCH_USES_CFI_TRAPS if CFI_CLANG</div><div class='add'>+	select ARCH_USES_CFI_TRAPS if CFI</div><div class='ctx'> 	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='hunk'>@@ -82,15 +90,19 @@ config RISCV</div><div class='ctx'> 	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP</div><div class='ctx'> 	select ARCH_WANTS_NO_INSTR</div><div class='ctx'> 	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE</div><div class='add'>+	select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS</div><div class='ctx'> 	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT if MMU</div><div class='ctx'> 	select CLINT_TIMER if RISCV_M_MODE</div><div class='ctx'> 	select CLONE_BACKWARDS</div><div class='ctx'> 	select COMMON_CLK</div><div class='add'>+	select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB</div><div class='ctx'> 	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND</div><div class='add'>+	select DYNAMIC_FTRACE if FUNCTION_TRACER</div><div class='ctx'> 	select EDAC_SUPPORT</div><div class='ctx'> 	select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER &amp;&amp; !DYNAMIC_FTRACE)</div><div class='ctx'> 	select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE</div><div class='add'>+	select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='ctx'> 	select GENERIC_ARCH_TOPOLOGY</div><div class='ctx'> 	select GENERIC_ATOMIC64 if !64BIT</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP</div><div class='hunk'>@@ -98,7 +110,7 @@ config RISCV</div><div class='ctx'> 	select GENERIC_CPU_VULNERABILITIES</div><div class='ctx'> 	select GENERIC_EARLY_IOREMAP</div><div class='ctx'> 	select GENERIC_ENTRY</div><div class='del'>-	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO</div><div class='add'>+	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO &amp;&amp; 64BIT</div><div class='ctx'> 	select GENERIC_IDLE_POLL_SETUP</div><div class='ctx'> 	select GENERIC_IOREMAP if MMU</div><div class='ctx'> 	select GENERIC_IRQ_IPI if SMP</div><div class='hunk'>@@ -107,14 +119,14 @@ config RISCV</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_IRQ_SHOW_LEVEL</div><div class='ctx'> 	select GENERIC_LIB_DEVMEM_IS_ALLOWED</div><div class='add'>+	select GENERIC_PENDING_IRQ if SMP</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='del'>-	select GENERIC_PTDUMP if MMU</div><div class='ctx'> 	select GENERIC_SCHED_CLOCK</div><div class='ctx'> 	select GENERIC_SMP_IDLE_THREAD</div><div class='del'>-	select GENERIC_TIME_VSYSCALL if MMU &amp;&amp; 64BIT</div><div class='del'>-	select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO</div><div class='add'>+	select GENERIC_TIME_VSYSCALL if GENERIC_GETTIMEOFDAY</div><div class='ctx'> 	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select HAS_IOPORT if MMU</div><div class='add'>+	select HAVE_ALIGNED_STRUCT_PAGE</div><div class='ctx'> 	select HAVE_ARCH_AUDITSYSCALL</div><div class='ctx'> 	select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP</div><div class='ctx'> 	select HAVE_ARCH_HUGE_VMAP if MMU &amp;&amp; 64BIT</div><div class='hunk'>@@ -123,16 +135,17 @@ config RISCV</div><div class='ctx'> 	select HAVE_ARCH_KASAN if MMU &amp;&amp; 64BIT</div><div class='ctx'> 	select HAVE_ARCH_KASAN_VMALLOC if MMU &amp;&amp; 64BIT</div><div class='ctx'> 	select HAVE_ARCH_KFENCE if MMU &amp;&amp; 64BIT</div><div class='add'>+	select HAVE_ARCH_KSTACK_ERASE</div><div class='ctx'> 	select HAVE_ARCH_KGDB if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_ARCH_KGDB_QXFER_PKT</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_BITS if MMU</div><div class='ctx'> 	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT</div><div class='ctx'> 	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER</div><div class='del'>-	select HAVE_ARCH_STACKLEAK</div><div class='ctx'> 	select HAVE_ARCH_THREAD_STRUCT_WHITELIST</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT &amp;&amp; MMU</div><div class='add'>+	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT &amp;&amp; USERFAULTFD</div><div class='ctx'> 	select HAVE_ARCH_VMAP_STACK if MMU &amp;&amp; 64BIT</div><div class='ctx'> 	select HAVE_ASM_MODVERSIONS</div><div class='hunk'>@@ -140,18 +153,21 @@ config RISCV</div><div class='ctx'> 	select HAVE_DEBUG_KMEMLEAK</div><div class='ctx'> 	select HAVE_DMA_CONTIGUOUS if MMU</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL &amp;&amp; MMU &amp;&amp; (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)</div><div class='del'>-	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='add'>+	select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE &amp;&amp; RISCV_ISA_C</div><div class='add'>+	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS</div><div class='add'>+	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS &amp;&amp; !CFI)</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE</div><div class='del'>-	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='del'>-	select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER</div><div class='del'>-	select HAVE_FUNCTION_TRACER if !XIP_KERNEL &amp;&amp; !PREEMPTION</div><div class='add'>+	select HAVE_FTRACE_GRAPH_FUNC</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS</div><div class='add'>+	select HAVE_FUNCTION_GRAPH_FREGS</div><div class='add'>+	select HAVE_FUNCTION_TRACER if !XIP_KERNEL &amp;&amp; HAVE_DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_EBPF_JIT if MMU</div><div class='add'>+	select HAVE_GENERIC_TIF_BITS</div><div class='ctx'> 	select HAVE_GUP_FAST if MMU</div><div class='ctx'> 	select HAVE_FUNCTION_ARG_ACCESS_API</div><div class='ctx'> 	select HAVE_FUNCTION_ERROR_INJECTION</div><div class='ctx'> 	select HAVE_GCC_PLUGINS</div><div class='del'>-	select HAVE_GENERIC_VDSO if MMU &amp;&amp; 64BIT</div><div class='add'>+	select HAVE_GENERIC_VDSO if MMU</div><div class='ctx'> 	select HAVE_IRQ_TIME_ACCOUNTING</div><div class='ctx'> 	select HAVE_KERNEL_BZIP2 if !XIP_KERNEL &amp;&amp; !EFI_ZBOOT</div><div class='ctx'> 	select HAVE_KERNEL_GZIP if !XIP_KERNEL &amp;&amp; !EFI_ZBOOT</div><div class='hunk'>@@ -177,7 +193,7 @@ config RISCV</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	select HAVE_RETHOOK if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_RSEQ</div><div class='del'>-	select HAVE_RUST if RUSTC_SUPPORTS_RISCV</div><div class='add'>+	select HAVE_RUST if RUSTC_SUPPORTS_RISCV &amp;&amp; CC_IS_CLANG</div><div class='ctx'> 	select HAVE_SAMPLE_FTRACE_DIRECT</div><div class='ctx'> 	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI</div><div class='ctx'> 	select HAVE_STACKPROTECTOR</div><div class='hunk'>@@ -195,6 +211,7 @@ config RISCV</div><div class='ctx'> 	select PCI_DOMAINS_GENERIC if PCI</div><div class='ctx'> 	select PCI_ECAM if (ACPI &amp;&amp; PCI)</div><div class='ctx'> 	select PCI_MSI if PCI</div><div class='add'>+	select RELOCATABLE if !MMU &amp;&amp; !PHYS_RAM_BASE_FIXED</div><div class='ctx'> 	select RISCV_ALTERNATIVE if !XIP_KERNEL</div><div class='ctx'> 	select RISCV_APLIC</div><div class='ctx'> 	select RISCV_IMSIC</div><div class='hunk'>@@ -206,6 +223,7 @@ config RISCV</div><div class='ctx'> 	select THREAD_INFO_IN_TASK</div><div class='ctx'> 	select TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'> 	select UACCESS_MEMCPY if !MMU</div><div class='add'>+	select VDSO_GETRANDOM if HAVE_GENERIC_VDSO &amp;&amp; 64BIT</div><div class='ctx'> 	select USER_STACKTRACE_SUPPORT</div><div class='ctx'> 	select ZONE_DMA32 if 64BIT</div><div class='ctx'> </div><div class='hunk'>@@ -224,21 +242,16 @@ config CLANG_SUPPORTS_DYNAMIC_FTRACE</div><div class='ctx'> config GCC_SUPPORTS_DYNAMIC_FTRACE</div><div class='ctx'> 	def_bool CC_IS_GCC</div><div class='ctx'> 	depends on $(cc-option,-fpatchable-function-entry=8)</div><div class='add'>+	depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C</div><div class='ctx'> </div><div class='ctx'> config HAVE_SHADOW_CALL_STACK</div><div class='ctx'> 	def_bool $(cc-option,-fsanitize=shadow-call-stack)</div><div class='ctx'> 	# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769</div><div class='ctx'> 	depends on $(ld-option,--no-relax-gp)</div><div class='ctx'> </div><div class='del'>-config RISCV_USE_LINKER_RELAXATION</div><div class='del'>-	def_bool y</div><div class='del'>-	# https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985</div><div class='del'>-	depends on !LD_IS_LLD || LLD_VERSION &gt;= 150000</div><div class='del'>-</div><div class='ctx'> # https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6</div><div class='ctx'> config ARCH_HAS_BROKEN_DWARF5</div><div class='ctx'> 	def_bool y</div><div class='del'>-	depends on RISCV_USE_LINKER_RELAXATION</div><div class='ctx'> 	# https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a</div><div class='ctx'> 	depends on AS_IS_LLVM &amp;&amp; AS_VERSION &lt; 180000</div><div class='ctx'> 	# https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77</div><div class='hunk'>@@ -282,13 +295,6 @@ config MMU</div><div class='ctx'> 	  Select if you want MMU-based virtualised addressing space</div><div class='ctx'> 	  support by paged memory management. If unsure, say 'Y'.</div><div class='ctx'> </div><div class='del'>-config PAGE_OFFSET</div><div class='del'>-	hex</div><div class='del'>-	default 0x80000000 if !MMU &amp;&amp; RISCV_M_MODE</div><div class='del'>-	default 0x80200000 if !MMU</div><div class='del'>-	default 0xc0000000 if 32BIT</div><div class='del'>-	default 0xff60000000000000 if 64BIT</div><div class='del'>-</div><div class='ctx'> config KASAN_SHADOW_OFFSET</div><div class='ctx'> 	hex</div><div class='ctx'> 	depends on KASAN_GENERIC</div><div class='hunk'>@@ -443,14 +449,6 @@ config SMP</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say N.</div><div class='ctx'> </div><div class='del'>-config SCHED_MC</div><div class='del'>-	bool "Multi-core scheduler support"</div><div class='del'>-	depends on SMP</div><div class='del'>-	help</div><div class='del'>-	  Multi-core scheduler support improves the CPU scheduler's decision</div><div class='del'>-	  making when dealing with multi-core CPU chips at a cost of slightly</div><div class='del'>-	  increased overhead in some places. If unsure say N here.</div><div class='del'>-</div><div class='ctx'> config NR_CPUS</div><div class='ctx'> 	int "Maximum number of CPUs (2-512)"</div><div class='ctx'> 	depends on SMP</div><div class='hunk'>@@ -506,6 +504,39 @@ config NODES_SHIFT</div><div class='ctx'> 	  Specify the maximum number of NUMA Nodes available on the target</div><div class='ctx'> 	  system.  Increases memory reserved to accommodate various tables.</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "RISC-V spinlock type"</div><div class='add'>+	default RISCV_COMBO_SPINLOCKS</div><div class='add'>+</div><div class='add'>+config RISCV_TICKET_SPINLOCKS</div><div class='add'>+	bool "Using ticket spinlock"</div><div class='add'>+</div><div class='add'>+config RISCV_QUEUED_SPINLOCKS</div><div class='add'>+	bool "Using queued spinlock"</div><div class='add'>+	depends on SMP &amp;&amp; MMU &amp;&amp; NONPORTABLE</div><div class='add'>+	select ARCH_USE_QUEUED_SPINLOCKS</div><div class='add'>+	help</div><div class='add'>+	  The queued spinlock implementation requires the forward progress</div><div class='add'>+	  guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or</div><div class='add'>+	  LR/SC with Ziccrse provide such guarantee.</div><div class='add'>+</div><div class='add'>+	  Select this if and only if Zabha or Ziccrse is available on your</div><div class='add'>+	  platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms</div><div class='add'>+	  without one of those extensions.</div><div class='add'>+</div><div class='add'>+	  If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks</div><div class='add'>+	  when supported and otherwise ticket spinlocks.</div><div class='add'>+</div><div class='add'>+config RISCV_COMBO_SPINLOCKS</div><div class='add'>+	bool "Using combo spinlock"</div><div class='add'>+	depends on SMP &amp;&amp; MMU</div><div class='add'>+	select ARCH_USE_QUEUED_SPINLOCKS</div><div class='add'>+	help</div><div class='add'>+	  Embed both queued spinlock and ticket lock so that the spinlock</div><div class='add'>+	  implementation can be chosen at runtime.</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> config RISCV_ALTERNATIVE</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on !XIP_KERNEL</div><div class='hunk'>@@ -527,18 +558,30 @@ config RISCV_ISA_C</div><div class='ctx'> 	help</div><div class='ctx'> 	  Adds "C" to the ISA subsets that the toolchain is allowed to emit</div><div class='ctx'> 	  when building Linux, which results in compressed instructions in the</div><div class='del'>-	  Linux binary.</div><div class='add'>+	  Linux binary. This option produces a kernel that will not run on</div><div class='add'>+	  systems that do not support compressed instructions.</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='add'>+config RISCV_ISA_SUPM</div><div class='add'>+	bool "Supm extension for userspace pointer masking"</div><div class='add'>+	depends on 64BIT</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Add support for pointer masking in userspace (Supm) when the</div><div class='add'>+	  underlying hardware extension (Smnpm or Ssnpm) is detected at boot.</div><div class='add'>+</div><div class='add'>+	  If this option is disabled, userspace will be unable to use</div><div class='add'>+	  the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API.</div><div class='add'>+</div><div class='ctx'> config RISCV_ISA_SVNAPOT</div><div class='ctx'> 	bool "Svnapot extension support for supervisor mode NAPOT pages"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; MMU</div><div class='ctx'> 	depends on RISCV_ALTERNATIVE</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Allow kernel to detect the Svnapot ISA-extension dynamically at boot</div><div class='del'>-	  time and enable its usage.</div><div class='add'>+	  Enable support for the Svnapot ISA-extension when it is detected</div><div class='add'>+	  at boot.</div><div class='ctx'> </div><div class='ctx'> 	  The Svnapot extension is used to mark contiguous PTEs as a range</div><div class='ctx'> 	  of contiguous virtual-to-physical translations for a naturally</div><div class='hunk'>@@ -556,9 +599,8 @@ config RISCV_ISA_SVPBMT</div><div class='ctx'> 	depends on RISCV_ALTERNATIVE</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	   Adds support to dynamically detect the presence of the Svpbmt</div><div class='del'>-	   ISA-extension (Supervisor-mode: page-based memory types) and</div><div class='del'>-	   enable its usage.</div><div class='add'>+	   Add support for the Svpbmt ISA-extension (Supervisor-mode:</div><div class='add'>+	   page-based memory types) in the kernel when it is detected at boot.</div><div class='ctx'> </div><div class='ctx'> 	   The memory type for a page contains a combination of attributes</div><div class='ctx'> 	   that indicate the cacheability, idempotency, and ordering</div><div class='hunk'>@@ -573,18 +615,19 @@ config TOOLCHAIN_HAS_V</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv)</div><div class='ctx'> 	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv)</div><div class='del'>-	depends on LLD_VERSION &gt;= 140000 || LD_VERSION &gt;= 23800</div><div class='add'>+	depends on LD_IS_LLD || LD_VERSION &gt;= 23800</div><div class='ctx'> 	depends on AS_HAS_OPTION_ARCH</div><div class='ctx'> </div><div class='ctx'> config RISCV_ISA_V</div><div class='del'>-	bool "VECTOR extension support"</div><div class='add'>+	bool "Vector extension support"</div><div class='ctx'> 	depends on TOOLCHAIN_HAS_V</div><div class='ctx'> 	depends on FPU</div><div class='ctx'> 	select DYNAMIC_SIGFRAME</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Say N here if you want to disable all vector related procedure</div><div class='del'>-	  in the kernel.</div><div class='add'>+	  Add support for the Vector extension when it is detected at boot.</div><div class='add'>+	  When this option is disabled, neither the kernel nor userspace may</div><div class='add'>+	  use vector procedures.</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='hunk'>@@ -614,12 +657,12 @@ config RISCV_ISA_V_PREEMPTIVE</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Usually, in-kernel SIMD routines are run with preemption disabled.</div><div class='del'>-	  Functions which envoke long running SIMD thus must yield core's</div><div class='add'>+	  Functions which invoke long running SIMD thus must yield the core's</div><div class='ctx'> 	  vector unit to prevent blocking other tasks for too long.</div><div class='ctx'> </div><div class='del'>-	  This config allows kernel to run SIMD without explicitly disable</div><div class='del'>-	  preemption. Enabling this config will result in higher memory</div><div class='del'>-	  consumption due to the allocation of per-task's kernel Vector context.</div><div class='add'>+	  This config allows the kernel to run SIMD without explicitly disabling</div><div class='add'>+	  preemption. Enabling this config will result in higher memory consumption</div><div class='add'>+	  due to the allocation of per-task's kernel Vector context.</div><div class='ctx'> </div><div class='ctx'> config RISCV_ISA_ZAWRS</div><div class='ctx'> 	bool "Zawrs extension support for more efficient busy waiting"</div><div class='hunk'>@@ -632,6 +675,39 @@ config RISCV_ISA_ZAWRS</div><div class='ctx'> 	  use of these instructions in the kernel when the Zawrs extension is</div><div class='ctx'> 	  detected at boot.</div><div class='ctx'> </div><div class='add'>+config TOOLCHAIN_HAS_ZABHA</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha)</div><div class='add'>+	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha)</div><div class='add'>+	depends on AS_HAS_OPTION_ARCH</div><div class='add'>+</div><div class='add'>+config RISCV_ISA_ZABHA</div><div class='add'>+	bool "Zabha extension support for atomic byte/halfword operations"</div><div class='add'>+	depends on TOOLCHAIN_HAS_ZABHA</div><div class='add'>+	depends on RISCV_ALTERNATIVE</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Enable the use of the Zabha ISA-extension to implement kernel</div><div class='add'>+	  byte/halfword atomic memory operations when it is detected at boot.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+</div><div class='add'>+config TOOLCHAIN_HAS_ZACAS</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas)</div><div class='add'>+	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas)</div><div class='add'>+	depends on AS_HAS_OPTION_ARCH</div><div class='add'>+</div><div class='add'>+config RISCV_ISA_ZACAS</div><div class='add'>+	bool "Zacas extension support for atomic CAS"</div><div class='add'>+	depends on RISCV_ALTERNATIVE</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Enable the use of the Zacas ISA-extension to implement kernel atomic</div><div class='add'>+	  cmpxchg operations when it is detected at boot.</div><div class='add'>+</div><div class='ctx'> 	  If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='ctx'> config TOOLCHAIN_HAS_ZBB</div><div class='hunk'>@@ -639,7 +715,7 @@ config TOOLCHAIN_HAS_ZBB</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb)</div><div class='ctx'> 	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb)</div><div class='del'>-	depends on LLD_VERSION &gt;= 150000 || LD_VERSION &gt;= 23900</div><div class='add'>+	depends on LD_IS_LLD || LD_VERSION &gt;= 23900</div><div class='ctx'> 	depends on AS_HAS_OPTION_ARCH</div><div class='ctx'> </div><div class='ctx'> # This symbol indicates that the toolchain supports all v1.0 vector crypto</div><div class='hunk'>@@ -649,6 +725,14 @@ config TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='ctx'> 	def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb)</div><div class='ctx'> 	depends on AS_HAS_OPTION_ARCH</div><div class='ctx'> </div><div class='add'>+config TOOLCHAIN_HAS_ZBA</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba)</div><div class='add'>+	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba)</div><div class='add'>+	depends on LD_IS_LLD || LD_VERSION &gt;= 23900</div><div class='add'>+	depends on AS_HAS_OPTION_ARCH</div><div class='add'>+</div><div class='ctx'> config RISCV_ISA_ZBA</div><div class='ctx'> 	bool "Zba extension support for bit manipulation instructions"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -663,12 +747,12 @@ config RISCV_ISA_ZBA</div><div class='ctx'> </div><div class='ctx'> config RISCV_ISA_ZBB</div><div class='ctx'> 	bool "Zbb extension support for bit manipulation instructions"</div><div class='del'>-	depends on TOOLCHAIN_HAS_ZBB</div><div class='ctx'> 	depends on RISCV_ALTERNATIVE</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	   Adds support to dynamically detect the presence of the ZBB</div><div class='del'>-	   extension (basic bit manipulation) and enable its usage.</div><div class='add'>+	   Add support for enabling optimisations in the kernel when the</div><div class='add'>+	   Zbb extension is detected at boot. Some optimisations may</div><div class='add'>+	   additionally depend on toolchain support for Zbb.</div><div class='ctx'> </div><div class='ctx'> 	   The Zbb extension provides instructions to accelerate a number</div><div class='ctx'> 	   of bit-specific operations (count bit population, sign extending,</div><div class='hunk'>@@ -681,7 +765,7 @@ config TOOLCHAIN_HAS_ZBC</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)</div><div class='ctx'> 	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)</div><div class='del'>-	depends on LLD_VERSION &gt;= 150000 || LD_VERSION &gt;= 23900</div><div class='add'>+	depends on LD_IS_LLD || LD_VERSION &gt;= 23900</div><div class='ctx'> 	depends on AS_HAS_OPTION_ARCH</div><div class='ctx'> </div><div class='ctx'> config RISCV_ISA_ZBC</div><div class='hunk'>@@ -699,6 +783,28 @@ config RISCV_ISA_ZBC</div><div class='ctx'> </div><div class='ctx'> 	   If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='add'>+config TOOLCHAIN_HAS_ZBKB</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb)</div><div class='add'>+	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb)</div><div class='add'>+	depends on LD_IS_LLD || LD_VERSION &gt;= 23900</div><div class='add'>+	depends on AS_HAS_OPTION_ARCH</div><div class='add'>+</div><div class='add'>+config RISCV_ISA_ZBKB</div><div class='add'>+	bool "Zbkb extension support for bit manipulation instructions"</div><div class='add'>+	depends on TOOLCHAIN_HAS_ZBKB</div><div class='add'>+	depends on RISCV_ALTERNATIVE</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	   Adds support to dynamically detect the presence of the ZBKB</div><div class='add'>+	   extension (bit manipulation for cryptography) and enable its usage.</div><div class='add'>+</div><div class='add'>+	   The Zbkb extension provides instructions to accelerate a number</div><div class='add'>+	   of common cryptography operations (pack, zip, etc).</div><div class='add'>+</div><div class='add'>+	   If you don't know what to do here, say Y.</div><div class='add'>+</div><div class='ctx'> config RISCV_ISA_ZICBOM</div><div class='ctx'> 	bool "Zicbom extension support for non-coherent DMA operation"</div><div class='ctx'> 	depends on MMU</div><div class='hunk'>@@ -707,9 +813,9 @@ config RISCV_ISA_ZICBOM</div><div class='ctx'> 	select RISCV_DMA_NONCOHERENT</div><div class='ctx'> 	select DMA_DIRECT_REMAP</div><div class='ctx'> 	help</div><div class='del'>-	   Adds support to dynamically detect the presence of the ZICBOM</div><div class='del'>-	   extension (Cache Block Management Operations) and enable its</div><div class='del'>-	   usage.</div><div class='add'>+	   Add support for the Zicbom extension (Cache Block Management</div><div class='add'>+	   Operations) and enable its use in the kernel when it is detected</div><div class='add'>+	   at boot.</div><div class='ctx'> </div><div class='ctx'> 	   The Zicbom extension can be used to handle for example</div><div class='ctx'> 	   non-coherent DMA support on devices that need it.</div><div class='hunk'>@@ -722,12 +828,27 @@ config RISCV_ISA_ZICBOZ</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	   Enable the use of the Zicboz extension (cbo.zero instruction)</div><div class='del'>-	   when available.</div><div class='add'>+	   in the kernel when it is detected at boot.</div><div class='ctx'> </div><div class='ctx'> 	   The Zicboz extension is used for faster zeroing of memory.</div><div class='ctx'> </div><div class='ctx'> 	   If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='add'>+config RISCV_ISA_ZICBOP</div><div class='add'>+	bool "Zicbop extension support for cache block prefetch"</div><div class='add'>+	depends on MMU</div><div class='add'>+	depends on RISCV_ALTERNATIVE</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Adds support to dynamically detect the presence of the ZICBOP</div><div class='add'>+	  extension (Cache Block Prefetch Operations) and enable its</div><div class='add'>+	  usage.</div><div class='add'>+</div><div class='add'>+	  The Zicbop extension can be used to prefetch cache blocks for</div><div class='add'>+	  read/write fetch.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+</div><div class='ctx'> config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	# https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc</div><div class='hunk'>@@ -760,8 +881,9 @@ config FPU</div><div class='ctx'> 	bool "FPU support"</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Say N here if you want to disable all floating-point related procedure</div><div class='del'>-	  in the kernel.</div><div class='add'>+	  Add support for floating point operations when an FPU is detected at</div><div class='add'>+	  boot. When this option is disabled, neither the kernel nor userspace</div><div class='add'>+	  may use the floating point unit.</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say Y.</div><div class='ctx'> </div><div class='hunk'>@@ -785,10 +907,24 @@ config THREAD_SIZE_ORDER</div><div class='ctx'> </div><div class='ctx'> config RISCV_MISALIGNED</div><div class='ctx'> 	bool</div><div class='add'>+	help</div><div class='add'>+	  Embed support for detecting and emulating misaligned</div><div class='add'>+	  scalar or vector loads and stores.</div><div class='add'>+</div><div class='add'>+config RISCV_SCALAR_MISALIGNED</div><div class='add'>+	bool</div><div class='add'>+	select RISCV_MISALIGNED</div><div class='ctx'> 	select SYSCTL_ARCH_UNALIGN_ALLOW</div><div class='ctx'> 	help</div><div class='ctx'> 	  Embed support for emulating misaligned loads and stores.</div><div class='ctx'> </div><div class='add'>+config RISCV_VECTOR_MISALIGNED</div><div class='add'>+	bool</div><div class='add'>+	select RISCV_MISALIGNED</div><div class='add'>+	depends on RISCV_ISA_V</div><div class='add'>+	help</div><div class='add'>+	  Enable detecting support for vector misaligned loads and stores.</div><div class='add'>+</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Unaligned Accesses Support"</div><div class='ctx'> 	default RISCV_PROBE_UNALIGNED_ACCESS</div><div class='hunk'>@@ -800,7 +936,7 @@ choice</div><div class='ctx'> </div><div class='ctx'> config RISCV_PROBE_UNALIGNED_ACCESS</div><div class='ctx'> 	bool "Probe for hardware unaligned access support"</div><div class='del'>-	select RISCV_MISALIGNED</div><div class='add'>+	select RISCV_SCALAR_MISALIGNED</div><div class='ctx'> 	help</div><div class='ctx'> 	  During boot, the kernel will run a series of tests to determine the</div><div class='ctx'> 	  speed of unaligned accesses. This probing will dynamically determine</div><div class='hunk'>@@ -811,7 +947,7 @@ config RISCV_PROBE_UNALIGNED_ACCESS</div><div class='ctx'> </div><div class='ctx'> config RISCV_EMULATED_UNALIGNED_ACCESS</div><div class='ctx'> 	bool "Emulate unaligned access where system support is missing"</div><div class='del'>-	select RISCV_MISALIGNED</div><div class='add'>+	select RISCV_SCALAR_MISALIGNED</div><div class='ctx'> 	help</div><div class='ctx'> 	  If unaligned memory accesses trap into the kernel as they are not</div><div class='ctx'> 	  supported by the system, the kernel will emulate the unaligned</div><div class='hunk'>@@ -840,6 +976,46 @@ config RISCV_EFFICIENT_UNALIGNED_ACCESS</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "Vector unaligned Accesses Support"</div><div class='add'>+	depends on RISCV_ISA_V</div><div class='add'>+	default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS</div><div class='add'>+	help</div><div class='add'>+	  This determines the level of support for vector unaligned accesses. This</div><div class='add'>+	  information is used by the kernel to perform optimizations. It is also</div><div class='add'>+	  exposed to user space via the hwprobe syscall. The hardware will be</div><div class='add'>+	  probed at boot by default.</div><div class='add'>+</div><div class='add'>+config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS</div><div class='add'>+	bool "Probe speed of vector unaligned accesses"</div><div class='add'>+	select RISCV_VECTOR_MISALIGNED</div><div class='add'>+	depends on RISCV_ISA_V</div><div class='add'>+	help</div><div class='add'>+	  During boot, the kernel will run a series of tests to determine the</div><div class='add'>+	  speed of vector unaligned accesses if they are supported. This probing</div><div class='add'>+	  will dynamically determine the speed of vector unaligned accesses on</div><div class='add'>+	  the underlying system if they are supported.</div><div class='add'>+</div><div class='add'>+config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS</div><div class='add'>+	bool "Assume the system supports slow vector unaligned memory accesses"</div><div class='add'>+	depends on NONPORTABLE</div><div class='add'>+	help</div><div class='add'>+	  Assume that the system supports slow vector unaligned memory accesses. The</div><div class='add'>+	  kernel and userspace programs may not be able to run at all on systems</div><div class='add'>+	  that do not support unaligned memory accesses.</div><div class='add'>+</div><div class='add'>+config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS</div><div class='add'>+	bool "Assume the system supports fast vector unaligned memory accesses"</div><div class='add'>+	depends on NONPORTABLE</div><div class='add'>+	help</div><div class='add'>+	  Assume that the system supports fast vector unaligned memory accesses. When</div><div class='add'>+	  enabled, this option improves the performance of the kernel on such</div><div class='add'>+	  systems. However, the kernel and userspace programs will run much more</div><div class='add'>+	  slowly, or will not be able to run at all, on systems that do not</div><div class='add'>+	  support efficient unaligned memory accesses.</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> source "arch/riscv/Kconfig.vendor"</div><div class='ctx'> </div><div class='ctx'> endmenu # "Platform type"</div><div class='hunk'>@@ -898,6 +1074,9 @@ config ARCH_SUPPORTS_KEXEC_PURGATORY</div><div class='ctx'> config ARCH_SUPPORTS_CRASH_DUMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config ARCH_DEFAULT_CRASH_DUMP</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION</div><div class='ctx'> 	def_bool CRASH_RESERVE</div><div class='ctx'> </div><div class='hunk'>@@ -934,8 +1113,9 @@ config PARAVIRT_TIME_ACCOUNTING</div><div class='ctx'> </div><div class='ctx'> config RELOCATABLE</div><div class='ctx'> 	bool "Build a relocatable kernel"</div><div class='del'>-	depends on MMU &amp;&amp; 64BIT &amp;&amp; !XIP_KERNEL</div><div class='add'>+	depends on !XIP_KERNEL</div><div class='ctx'> 	select MODULE_SECTIONS if MODULES</div><div class='add'>+	select ARCH_VMLINUX_NEEDS_RELOCS</div><div class='ctx'> 	help</div><div class='ctx'>           This builds a kernel as a Position Independent Executable (PIE),</div><div class='ctx'>           which retains all relocation metadata required to relocate the</div><div class='hunk'>@@ -998,8 +1178,8 @@ config CMDLINE_FALLBACK</div><div class='ctx'> config CMDLINE_EXTEND</div><div class='ctx'> 	bool "Extend bootloader kernel arguments"</div><div class='ctx'> 	help</div><div class='del'>-	  The command-line arguments provided during boot will be</div><div class='del'>-	  appended to the built-in command line. This is useful in</div><div class='add'>+	  The built-in command line will be appended to the command-</div><div class='add'>+	  line arguments provided during boot. This is useful in</div><div class='ctx'> 	  cases where the provided arguments are insufficient and</div><div class='ctx'> 	  you don't want to or cannot modify them.</div><div class='ctx'> </div><div class='hunk'>@@ -1128,13 +1308,14 @@ config RISCV_ISA_FALLBACK</div><div class='ctx'> config BUILTIN_DTB</div><div class='ctx'> 	bool "Built-in device tree"</div><div class='ctx'> 	depends on OF &amp;&amp; NONPORTABLE</div><div class='add'>+	select GENERIC_BUILTIN_DTB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Build a device tree into the Linux image.</div><div class='ctx'> 	  This option should be selected if no bootloader is being used.</div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-config BUILTIN_DTB_SOURCE</div><div class='add'>+config BUILTIN_DTB_NAME</div><div class='ctx'> 	string "Built-in device tree source"</div><div class='ctx'> 	depends on BUILTIN_DTB</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata<br/>index 2acc7d876e1f..aca9b0cfcfec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.errata?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.errata</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.errata?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Kconfig.errata</a></div><div class='hunk'>@@ -21,6 +21,29 @@ config ERRATA_ANDES_CMO</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say "Y".</div><div class='ctx'> </div><div class='add'>+config ERRATA_MIPS</div><div class='add'>+	bool "MIPS errata"</div><div class='add'>+	depends on RISCV_ALTERNATIVE</div><div class='add'>+	help</div><div class='add'>+	  All MIPS errata Kconfig depend on this Kconfig. Disabling</div><div class='add'>+	  this Kconfig will disable all MIPS errata. Please say "Y"</div><div class='add'>+	  here if your platform uses MIPS CPU cores.</div><div class='add'>+</div><div class='add'>+	  Otherwise, please say "N" here to avoid unnecessary overhead.</div><div class='add'>+</div><div class='add'>+config ERRATA_MIPS_P8700_PAUSE_OPCODE</div><div class='add'>+	bool "Fix the PAUSE Opcode for MIPS P8700"</div><div class='add'>+	depends on ERRATA_MIPS &amp;&amp; 64BIT</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	   The RISCV MIPS P8700 uses a different opcode for PAUSE.</div><div class='add'>+	   It is a 'hint' encoding of the SLLI instruction,</div><div class='add'>+	   with rd=0, rs1=0 and imm=5. It will behave as a NOP</div><div class='add'>+	   instruction if no additional behavior beyond that of</div><div class='add'>+	   SLLI is implemented.</div><div class='add'>+</div><div class='add'>+	   If you are not using the P8700 processor, say n.</div><div class='add'>+</div><div class='ctx'> config ERRATA_SIFIVE</div><div class='ctx'> 	bool "SiFive errata"</div><div class='ctx'> 	depends on RISCV_ALTERNATIVE</div><div class='hunk'>@@ -119,4 +142,15 @@ config ERRATA_THEAD_PMU</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to do here, say "Y".</div><div class='ctx'> </div><div class='add'>+config ERRATA_THEAD_GHOSTWRITE</div><div class='add'>+	bool "Apply T-Head Ghostwrite errata"</div><div class='add'>+	depends on ERRATA_THEAD &amp;&amp; RISCV_ISA_XTHEADVECTOR</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  The T-Head C9xx cores have a vulnerability in the xtheadvector</div><div class='add'>+	  instruction set. When this errata is enabled, the CPUs will be probed</div><div class='add'>+	  to determine if they are vulnerable and disable xtheadvector.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say "Y".</div><div class='add'>+</div><div class='ctx'> endmenu # "CPU errata selection"</div><div class='head'>diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs<br/>index f51bb24bc84c..848e7149e443 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.socs?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.socs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.socs?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Kconfig.socs</a></div><div class='hunk'>@@ -1,5 +1,18 @@</div><div class='ctx'> menu "SoC selection"</div><div class='ctx'> </div><div class='add'>+config ARCH_ANDES</div><div class='add'>+	bool "Andes SoCs"</div><div class='add'>+	depends on MMU &amp;&amp; !XIP_KERNEL</div><div class='add'>+	select ERRATA_ANDES</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Andes SoC platform hardware.</div><div class='add'>+</div><div class='add'>+config ARCH_ESWIN</div><div class='add'>+	bool "ESWIN SoCs"</div><div class='add'>+	help</div><div class='add'>+	  This enables support for ESWIN SoC platform hardware,</div><div class='add'>+	  including the ESWIN EIC7700 SoC.</div><div class='add'>+</div><div class='ctx'> config ARCH_MICROCHIP_POLARFIRE</div><div class='ctx'> 	def_bool ARCH_MICROCHIP</div><div class='ctx'> </div><div class='hunk'>@@ -24,6 +37,12 @@ config ARCH_SOPHGO</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for Sophgo SoC platform hardware.</div><div class='ctx'> </div><div class='add'>+config ARCH_SPACEMIT</div><div class='add'>+	bool "SpacemiT SoCs"</div><div class='add'>+	select PINCTRL</div><div class='add'>+	help</div><div class='add'>+	  This enables support for SpacemiT SoC platform hardware.</div><div class='add'>+</div><div class='ctx'> config ARCH_STARFIVE</div><div class='ctx'> 	def_bool SOC_STARFIVE</div><div class='ctx'> </div><div class='hunk'>@@ -48,12 +67,12 @@ config ARCH_THEAD</div><div class='ctx'> 	bool "T-HEAD RISC-V SoCs"</div><div class='ctx'> 	depends on MMU &amp;&amp; !XIP_KERNEL</div><div class='ctx'> 	select ERRATA_THEAD</div><div class='add'>+	select PM_GENERIC_DOMAINS if PM</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the RISC-V based T-HEAD SoCs.</div><div class='ctx'> </div><div class='ctx'> config ARCH_VIRT</div><div class='ctx'> 	bool "QEMU Virt Machine"</div><div class='del'>-	select CLINT_TIMER if RISCV_M_MODE</div><div class='ctx'> 	select POWER_RESET</div><div class='ctx'> 	select POWER_RESET_SYSCON</div><div class='ctx'> 	select POWER_RESET_SYSCON_POWEROFF</div><div class='hunk'>@@ -73,7 +92,6 @@ config ARCH_CANAAN</div><div class='ctx'> config SOC_CANAAN_K210</div><div class='ctx'> 	bool "Canaan Kendryte K210 SoC"</div><div class='ctx'> 	depends on !MMU &amp;&amp; ARCH_CANAAN</div><div class='del'>-	select CLINT_TIMER if RISCV_M_MODE</div><div class='ctx'> 	select ARCH_HAS_RESET_CONTROLLER</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select COMMON_CLK</div><div class='head'>diff --git a/arch/riscv/Kconfig.vendor b/arch/riscv/Kconfig.vendor<br/>index 6f1cdd32ed29..3c1f92e406c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.vendor?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Kconfig.vendor</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Kconfig.vendor?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Kconfig.vendor</a></div><div class='hunk'>@@ -16,4 +16,56 @@ config RISCV_ISA_VENDOR_EXT_ANDES</div><div class='ctx'> 	  If you don't know what to do here, say Y.</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='add'>+menu "MIPS"</div><div class='add'>+config RISCV_ISA_VENDOR_EXT_MIPS</div><div class='add'>+	bool "MIPS vendor extension support"</div><div class='add'>+	select RISCV_ISA_VENDOR_EXT</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Say N here to disable detection of and support for all MIPS vendor</div><div class='add'>+	  extensions. Without this option enabled, MIPS vendor extensions will</div><div class='add'>+	  not be detected at boot and their presence not reported to userspace.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+menu "SiFive"</div><div class='add'>+config RISCV_ISA_VENDOR_EXT_SIFIVE</div><div class='add'>+	bool "SiFive vendor extension support"</div><div class='add'>+	select RISCV_ISA_VENDOR_EXT</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Say N here if you want to disable all SiFive vendor extension</div><div class='add'>+	  support. This will cause any SiFive vendor extensions that are</div><div class='add'>+	  requested by hardware probing to be ignored.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+menu "T-Head"</div><div class='add'>+config RISCV_ISA_VENDOR_EXT_THEAD</div><div class='add'>+	bool "T-Head vendor extension support"</div><div class='add'>+	select RISCV_ISA_VENDOR_EXT</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Say N here to disable detection of and support for all T-Head vendor</div><div class='add'>+	  extensions. Without this option enabled, T-Head vendor extensions will</div><div class='add'>+	  not be detected at boot and their presence not reported to userspace.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+</div><div class='add'>+config RISCV_ISA_XTHEADVECTOR</div><div class='add'>+	bool "xtheadvector extension support"</div><div class='add'>+	depends on RISCV_ISA_VENDOR_EXT_THEAD</div><div class='add'>+	depends on RISCV_ISA_V</div><div class='add'>+	depends on FPU</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Say N here if you want to disable all xtheadvector related procedures</div><div class='add'>+	  in the kernel. This will disable vector for any T-Head board that</div><div class='add'>+	  contains xtheadvector rather than the standard vector.</div><div class='add'>+</div><div class='add'>+	  If you don't know what to do here, say Y.</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile<br/>index d469db9f46f4..ecf2fcce2d92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Makefile</a></div><div class='hunk'>@@ -8,16 +8,16 @@</div><div class='ctx'> </div><div class='ctx'> LDFLAGS_vmlinux := -z norelro</div><div class='ctx'> ifeq ($(CONFIG_RELOCATABLE),y)</div><div class='del'>-	LDFLAGS_vmlinux += -shared -Bsymbolic -z notext --emit-relocs</div><div class='add'>+	LDFLAGS_vmlinux += -shared -Bsymbolic -z notext</div><div class='ctx'> 	KBUILD_CFLAGS += -fPIE</div><div class='ctx'> endif</div><div class='ctx'> ifeq ($(CONFIG_DYNAMIC_FTRACE),y)</div><div class='ctx'> 	LDFLAGS_vmlinux += --no-relax</div><div class='ctx'> 	KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY</div><div class='ctx'> ifeq ($(CONFIG_RISCV_ISA_C),y)</div><div class='del'>-	CC_FLAGS_FTRACE := -fpatchable-function-entry=4</div><div class='add'>+	CC_FLAGS_FTRACE := -fpatchable-function-entry=8,4</div><div class='ctx'> else</div><div class='del'>-	CC_FLAGS_FTRACE := -fpatchable-function-entry=2</div><div class='add'>+	CC_FLAGS_FTRACE := -fpatchable-function-entry=4,2</div><div class='ctx'> endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -46,17 +46,10 @@ else</div><div class='ctx'> 	KBUILD_LDFLAGS += -melf32lriscv</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifndef CONFIG_RISCV_USE_LINKER_RELAXATION</div><div class='del'>-	KBUILD_CFLAGS += -mno-relax</div><div class='del'>-	KBUILD_AFLAGS += -mno-relax</div><div class='del'>-ifndef CONFIG_AS_IS_LLVM</div><div class='del'>-	KBUILD_CFLAGS += -Wa,-mno-relax</div><div class='del'>-	KBUILD_AFLAGS += -Wa,-mno-relax</div><div class='del'>-endif</div><div class='ctx'> # LLVM has an issue with target-features and LTO: https://github.com/llvm/llvm-project/issues/59350</div><div class='ctx'> # Ensure it is aware of linker relaxation with LTO, otherwise relocations may</div><div class='ctx'> # be incorrect: https://github.com/llvm/llvm-project/issues/65090</div><div class='del'>-else ifeq ($(CONFIG_LTO_CLANG),y)</div><div class='add'>+ifeq ($(CONFIG_LTO_CLANG),y)</div><div class='ctx'> 	KBUILD_LDFLAGS += -mllvm -mattr=+c -mllvm -mattr=+relax</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -82,6 +75,12 @@ else</div><div class='ctx'> riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+# Check if the toolchain supports Zacas</div><div class='add'>+riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) := $(riscv-march-y)_zacas</div><div class='add'>+</div><div class='add'>+# Check if the toolchain supports Zabha</div><div class='add'>+riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) := $(riscv-march-y)_zabha</div><div class='add'>+</div><div class='ctx'> # Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by</div><div class='ctx'> # matching non-v and non-multi-letter extensions out with the filter ([^v_]*)</div><div class='ctx'> KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')</div><div class='hunk'>@@ -92,7 +91,6 @@ KBUILD_AFLAGS += -march=$(riscv-march-y)</div><div class='ctx'> CC_FLAGS_FPU  := -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)([^v_]*)v?/\1\2/')</div><div class='ctx'> </div><div class='ctx'> KBUILD_CFLAGS += -mno-save-restore</div><div class='del'>-KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_CMODEL_MEDLOW),y)</div><div class='ctx'> 	KBUILD_CFLAGS += -mcmodel=medlow</div><div class='hunk'>@@ -129,7 +127,7 @@ stack_protector_prepare: prepare0</div><div class='ctx'> 				-mstack-protector-guard-reg=tp		  \</div><div class='ctx'> 				-mstack-protector-guard-offset=$(shell	  \</div><div class='ctx'> 			awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \</div><div class='del'>-					include/generated/asm-offsets.h))</div><div class='add'>+				$(objtree)/include/generated/asm-offsets.h))</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # arch specific predefines for sparse</div><div class='head'>diff --git a/arch/riscv/Makefile.postlink b/arch/riscv/Makefile.postlink<br/>index 829b9abc91f6..0e4cf8ad2f14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/Makefile.postlink?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/Makefile.postlink</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/Makefile.postlink?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/Makefile.postlink</a></div><div class='hunk'>@@ -15,25 +15,12 @@ quiet_cmd_relocs_check = CHKREL  $@</div><div class='ctx'> cmd_relocs_check = 							\</div><div class='ctx'> 	$(CONFIG_SHELL) $(srctree)/arch/riscv/tools/relocs_check.sh "$(OBJDUMP)" "$(NM)" "$@"</div><div class='ctx'> </div><div class='del'>-ifdef CONFIG_RELOCATABLE</div><div class='del'>-quiet_cmd_cp_vmlinux_relocs = CPREL   vmlinux.relocs</div><div class='del'>-cmd_cp_vmlinux_relocs = cp vmlinux vmlinux.relocs</div><div class='del'>-</div><div class='del'>-quiet_cmd_relocs_strip = STRIPREL $@</div><div class='del'>-cmd_relocs_strip = $(OBJCOPY)   --remove-section='.rel.*'       \</div><div class='del'>-                                --remove-section='.rel__*'      \</div><div class='del'>-                                --remove-section='.rela.*'      \</div><div class='del'>-                                --remove-section='.rela__*' $@</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> # `@true` prevents complaint when there is nothing to be done</div><div class='ctx'> </div><div class='del'>-vmlinux: FORCE</div><div class='add'>+vmlinux vmlinux.unstripped: FORCE</div><div class='ctx'> 	@true</div><div class='ctx'> ifdef CONFIG_RELOCATABLE</div><div class='ctx'> 	$(call if_changed,relocs_check)</div><div class='del'>-	$(call if_changed,cp_vmlinux_relocs)</div><div class='del'>-	$(call if_changed,relocs_strip)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='head'>diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile<br/>index b25d524ce5eb..bfc3d0b75b9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/Makefile</a></div><div class='hunk'>@@ -32,10 +32,7 @@ $(obj)/xipImage: vmlinux FORCE</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_RELOCATABLE</div><div class='del'>-vmlinux.relocs: vmlinux</div><div class='del'>-	@ (! [ -f vmlinux.relocs ] &amp;&amp; echo "vmlinux.relocs can't be found, please remove vmlinux and try again") || true</div><div class='del'>-</div><div class='del'>-$(obj)/Image: vmlinux.relocs FORCE</div><div class='add'>+$(obj)/Image: vmlinux.unstripped FORCE</div><div class='ctx'> else</div><div class='ctx'> $(obj)/Image: vmlinux FORCE</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile<br/>index fdae05bbf556..3763d199c70a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/Makefile</a></div><div class='hunk'>@@ -1,11 +1,12 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> subdir-y += allwinner</div><div class='add'>+subdir-y += andes</div><div class='ctx'> subdir-y += canaan</div><div class='add'>+subdir-y += eswin</div><div class='ctx'> subdir-y += microchip</div><div class='ctx'> subdir-y += renesas</div><div class='ctx'> subdir-y += sifive</div><div class='ctx'> subdir-y += sophgo</div><div class='add'>+subdir-y += spacemit</div><div class='ctx'> subdir-y += starfive</div><div class='ctx'> subdir-y += thead</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_SOURCE))</div><div class='head'>diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts<br/>index bc5c84f22762..5f2e5cc3e3d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> 		#cooling-cells = &lt;2&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c-gpio-0 {</div><div class='add'>+	i2c-0 {</div><div class='ctx'> 		compatible = "i2c-gpio";</div><div class='ctx'> 		sda-gpios = &lt;&amp;pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;; /* PD14/GPIO44 */</div><div class='ctx'> 		scl-gpios = &lt;&amp;pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;; /* PD15/GPIO45 */</div><div class='head'>diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi<br/>index 64c3c2e6cbe0..6367112e614a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi</a></div><div class='hunk'>@@ -27,7 +27,8 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",</div><div class='del'>-					       "zifencei", "zihpm";</div><div class='add'>+					       "zifencei", "zihpm", "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;128&gt;;</div><div class='ctx'> 			#cooling-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu0_intc: interrupt-controller {</div><div class='head'>diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi<br/>index e4175adb028d..63e252b44973 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi</a></div><div class='hunk'>@@ -79,6 +79,36 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			/omit-if-no-ref/</div><div class='add'>+			i2c2_pd_pins: i2c2-pd-pins {</div><div class='add'>+				pins = "PD20", "PD21";</div><div class='add'>+				function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			i2c3_pg_pins: i2c3-pg-pins {</div><div class='add'>+				pins = "PG10", "PG11";</div><div class='add'>+				function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			i2s1_pins: i2s1-pins {</div><div class='add'>+				pins = "PG12", "PG13";</div><div class='add'>+				function = "i2s1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			i2s1_din0_pin: i2s1-din0-pin {</div><div class='add'>+				pins = "PG14";</div><div class='add'>+				function = "i2s1_din";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			i2s1_dout0_pin: i2s1-dout0-pin {</div><div class='add'>+				pins = "PG15";</div><div class='add'>+				function = "i2s1_dout";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='ctx'> 			lcd_rgb666_pins: lcd-rgb666-pins {</div><div class='ctx'> 				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",</div><div class='ctx'> 				       "PD6", "PD7", "PD8", "PD9", "PD10", "PD11",</div><div class='hunk'>@@ -127,6 +157,24 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			/omit-if-no-ref/</div><div class='add'>+			spi1_pins: spi1-pins {</div><div class='add'>+				pins = "PD10", "PD11", "PD12", "PD13";</div><div class='add'>+				function = "spi1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			spi1_hold_pin: spi1-hold-pin {</div><div class='add'>+				pins = "PD14";</div><div class='add'>+				function = "spi1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='add'>+			spi1_wp_pin: spi1-wp-pin {</div><div class='add'>+				pins = "PD15";</div><div class='add'>+				function = "spi1";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/omit-if-no-ref/</div><div class='ctx'> 			uart1_pg6_pins: uart1-pg6-pins {</div><div class='ctx'> 				pins = "PG6", "PG7";</div><div class='ctx'> 				function = "uart1";</div><div class='head'>diff --git a/arch/riscv/boot/dts/andes/Makefile b/arch/riscv/boot/dts/andes/Makefile<br/>new file mode 100644<br/>index 000000000000..c545c668ef70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/andes/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/andes/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_ANDES) += qilai-voyager.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/andes/qilai-voyager.dts b/arch/riscv/boot/dts/andes/qilai-voyager.dts<br/>new file mode 100644<br/>index 000000000000..fa7d2b32a9b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/andes/qilai-voyager.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/andes/qilai-voyager.dts</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Andes Technology Corporation. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "qilai.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Voyager";</div><div class='add'>+	compatible = "andestech,voyager", "andestech,qilai";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@400000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x4 0x00000000 0x4 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/andes/qilai.dtsi b/arch/riscv/boot/dts/andes/qilai.dtsi<br/>new file mode 100644<br/>index 000000000000..de3de32f8c39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/andes/qilai.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/andes/qilai.dtsi</a></div><div class='hunk'>@@ -0,0 +1,186 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Andes Technology Corporation. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		timebase-frequency = &lt;62500000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "andestech,ax45mp", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "zicntr", "zicsr", "zifencei",</div><div class='add'>+					       "zihpm", "xandespmu";</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+</div><div class='add'>+			cpu0_intc: interrupt-controller {</div><div class='add'>+				compatible = "andestech,cpu-intc", "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "andestech,ax45mp", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "zicntr", "zicsr", "zifencei",</div><div class='add'>+					       "zihpm", "xandespmu";</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+</div><div class='add'>+			cpu1_intc: interrupt-controller {</div><div class='add'>+				compatible = "andestech,cpu-intc",</div><div class='add'>+					     "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "andestech,ax45mp", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "zicntr", "zicsr", "zifencei",</div><div class='add'>+					       "zihpm", "xandespmu";</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+</div><div class='add'>+			cpu2_intc: interrupt-controller {</div><div class='add'>+				compatible = "andestech,cpu-intc",</div><div class='add'>+					     "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "andestech,ax45mp", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "zicntr", "zicsr", "zifencei",</div><div class='add'>+					       "zihpm", "xandespmu";</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+			clock-frequency = &lt;100000000&gt;;</div><div class='add'>+			i-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			i-cache-sets = &lt;256&gt;;</div><div class='add'>+			i-cache-line-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;0x8000&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-line-size = &lt;64&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache&gt;;</div><div class='add'>+</div><div class='add'>+			cpu3_intc: interrupt-controller {</div><div class='add'>+				compatible = "andestech,cpu-intc",</div><div class='add'>+					     "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+		plmt: timer@100000 {</div><div class='add'>+			compatible = "andestech,qilai-plmt", "andestech,plmt0";</div><div class='add'>+			reg = &lt;0x0 0x00100000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache: cache-controller@200000 {</div><div class='add'>+			compatible = "andestech,qilai-ax45mp-cache",</div><div class='add'>+				     "andestech,ax45mp-cache", "cache";</div><div class='add'>+			reg = &lt;0x0 0x00200000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			cache-line-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-size = &lt;0x200000&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic_sw: interrupt-controller@400000 {</div><div class='add'>+			compatible = "andestech,qilai-plicsw",</div><div class='add'>+				     "andestech,plicsw";</div><div class='add'>+			reg = &lt;0x0 0x00400000 0x0 0x400000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@2000000 {</div><div class='add'>+			compatible = "andestech,qilai-plic",</div><div class='add'>+				     "andestech,nceplic100";</div><div class='add'>+			reg = &lt;0x0 0x02000000 0x0 0x2000000&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 11&gt;, &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 11&gt;, &lt;&amp;cpu2_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 11&gt;, &lt;&amp;cpu3_intc 9&gt;;</div><div class='add'>+			riscv,ndev = &lt;71&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@30300000 {</div><div class='add'>+			compatible = "andestech,uart16550", "ns16550a";</div><div class='add'>+			reg = &lt;0x0 0x30300000 0x0 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clock-frequency = &lt;50000000&gt;;</div><div class='add'>+			reg-offset = &lt;32&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			no-loopback-test;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/eswin/Makefile b/arch/riscv/boot/dts/eswin/Makefile<br/>new file mode 100644<br/>index 000000000000..224101ae471e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/eswin/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/eswin/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_ESWIN) += eic7700-hifive-premier-p550.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts<br/>new file mode 100644<br/>index 000000000000..131ed1fc6b2e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024, Beijing ESWIN Computing Technology Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "eic7700.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "sifive,hifive-premier-p550", "eswin,eic7700";</div><div class='add'>+	model = "SiFive HiFive Premier P550";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi<br/>new file mode 100644<br/>index 000000000000..c3ed93008bca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/eswin/eic7700.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/eswin/eic7700.dtsi</a></div><div class='hunk'>@@ -0,0 +1,345 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Beijing ESWIN Computing Technology Co., Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		timebase-frequency = &lt;1000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "sifive,p550", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-tlb-sets = &lt;1&gt;;</div><div class='add'>+			d-tlb-size = &lt;32&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-tlb-sets = &lt;1&gt;;</div><div class='add'>+			i-tlb-size = &lt;32&gt;;</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_0&gt;;</div><div class='add'>+			reg = &lt;0x0&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf",</div><div class='add'>+					       "zba", "zbb", "zicsr", "zifencei";</div><div class='add'>+			tlb-split;</div><div class='add'>+</div><div class='add'>+			cpu0_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "sifive,p550", "riscv";</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-tlb-sets = &lt;1&gt;;</div><div class='add'>+			d-tlb-size = &lt;32&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-tlb-sets = &lt;1&gt;;</div><div class='add'>+			i-tlb-size = &lt;32&gt;;</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_1&gt;;</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf",</div><div class='add'>+					       "zba", "zbb", "zicsr", "zifencei";</div><div class='add'>+			tlb-split;</div><div class='add'>+</div><div class='add'>+			cpu1_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "sifive,p550", "riscv";</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-tlb-sets = &lt;1&gt;;</div><div class='add'>+			d-tlb-size = &lt;32&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-tlb-sets = &lt;1&gt;;</div><div class='add'>+			i-tlb-size = &lt;32&gt;;</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_2&gt;;</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf",</div><div class='add'>+					       "zba", "zbb", "zicsr", "zifencei";</div><div class='add'>+			tlb-split;</div><div class='add'>+</div><div class='add'>+			cpu2_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "sifive,p550", "riscv";</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-tlb-sets = &lt;1&gt;;</div><div class='add'>+			d-tlb-size = &lt;32&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-tlb-sets = &lt;1&gt;;</div><div class='add'>+			i-tlb-size = &lt;32&gt;;</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache_3&gt;;</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "sscofpmf",</div><div class='add'>+					       "zba", "zbb", "zicsr", "zifencei";</div><div class='add'>+			tlb-split;</div><div class='add'>+</div><div class='add'>+			cpu3_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_0: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-size = &lt;262144&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;ccache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_1: l2-cache1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-size = &lt;262144&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;ccache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_2: l2-cache2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-size = &lt;262144&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;ccache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache_3: l2-cache3 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-size = &lt;262144&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;ccache&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "riscv,pmu";</div><div class='add'>+		riscv,event-to-mhpmcounters =</div><div class='add'>+				&lt;0x00001 0x00001 0x00000001&gt;,</div><div class='add'>+				&lt;0x00002 0x00002 0x00000004&gt;,</div><div class='add'>+				&lt;0x00004 0x00006 0x00000078&gt;,</div><div class='add'>+				&lt;0x10009 0x10009 0x00000078&gt;,</div><div class='add'>+				&lt;0x10019 0x10019 0x00000078&gt;,</div><div class='add'>+				&lt;0x10021 0x10021 0x00000078&gt;;</div><div class='add'>+		riscv,event-to-mhpmevent =</div><div class='add'>+				&lt;0x00004 0x00000000 0x00000202&gt;,</div><div class='add'>+				&lt;0x00005 0x00000000 0x00004000&gt;,</div><div class='add'>+				&lt;0x00006 0x00000000 0x00002001&gt;,</div><div class='add'>+				&lt;0x10009 0x00000000 0x00000102&gt;,</div><div class='add'>+				&lt;0x10019 0x00000000 0x00001002&gt;,</div><div class='add'>+				&lt;0x10021 0x00000000 0x00000802&gt;;</div><div class='add'>+		riscv,raw-event-to-mhpmcounters =</div><div class='add'>+				&lt;0x00000000 0x00000000 0xffffffff 0xfc0000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000001 0xffffffff 0xfffe07ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000002 0xffffffff 0xfffe00ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000003 0xfffffffc 0x000000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000004 0xffffffc0 0x000000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000005 0xffffffff 0xfffffdff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000006 0xfffffe00 0x110204ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000007 0xffffffff 0xf00000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000008 0xfffffe04 0x000000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x00000009 0xffffffff 0xffffc0ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000a 0xffffffff 0xf00000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000b 0xffffffff 0xfffffcff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000c 0xfffffff0 0x000000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000d 0xffffffff 0x800000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000e 0xffffffff 0xf80000ff 0x00000078&gt;,</div><div class='add'>+				&lt;0x00000000 0x0000000f 0xfffffffc 0x000000ff 0x00000078&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges;</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='add'>+</div><div class='add'>+		clint: timer@2000000 {</div><div class='add'>+			compatible = "eswin,eic7700-clint", "sifive,clint0";</div><div class='add'>+			reg = &lt;0x0 0x02000000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;,</div><div class='add'>+				&lt;&amp;cpu1_intc 3&gt;, &lt;&amp;cpu1_intc 7&gt;,</div><div class='add'>+				&lt;&amp;cpu2_intc 3&gt;, &lt;&amp;cpu2_intc 7&gt;,</div><div class='add'>+				&lt;&amp;cpu3_intc 3&gt;, &lt;&amp;cpu3_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ccache: cache-controller@2010000 {</div><div class='add'>+			compatible = "eswin,eic7700-l3-cache", "sifive,ccache0", "cache";</div><div class='add'>+			reg = &lt;0x0 0x2010000 0x0 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;1&gt;, &lt;3&gt;, &lt;4&gt;, &lt;2&gt;;</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-sets = &lt;4096&gt;;</div><div class='add'>+			cache-size = &lt;4194304&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@c000000 {</div><div class='add'>+			compatible = "eswin,eic7700-plic", "sifive,plic-1.0.0";</div><div class='add'>+			reg = &lt;0x0 0xc000000 0x0 0x4000000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu1_intc 11&gt;, &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu2_intc 11&gt;, &lt;&amp;cpu2_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu3_intc 11&gt;, &lt;&amp;cpu3_intc 9&gt;;</div><div class='add'>+			riscv,ndev = &lt;520&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@50900000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x50900000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;100&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@50910000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x50910000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;101&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@50920000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x50920000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;102&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@50930000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x50930000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;103&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart4: serial@50940000 {</div><div class='add'>+			compatible = "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x0 0x50940000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;104&gt;;</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio@51600000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x0 0x51600000 0x0 0x80&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			gpioA: gpio-port@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupts =</div><div class='add'>+					&lt;303&gt;, &lt;304&gt;, &lt;305&gt;, &lt;306&gt;, &lt;307&gt;, &lt;308&gt;, &lt;309&gt;,</div><div class='add'>+					&lt;310&gt;, &lt;311&gt;, &lt;312&gt;, &lt;313&gt;, &lt;314&gt;, &lt;315&gt;, &lt;316&gt;,</div><div class='add'>+					&lt;317&gt;, &lt;318&gt;, &lt;319&gt;, &lt;320&gt;, &lt;321&gt;, &lt;322&gt;, &lt;323&gt;,</div><div class='add'>+					&lt;324&gt;, &lt;325&gt;, &lt;326&gt;, &lt;327&gt;, &lt;328&gt;, &lt;329&gt;, &lt;330&gt;,</div><div class='add'>+					&lt;331&gt;, &lt;332&gt;, &lt;333&gt;, &lt;334&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioB: gpio-port@1 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioC: gpio-port@2 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpioD: gpio-port@3 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				ngpios = &lt;16&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microchip/Makefile<br/>index f51aeeb9fd3b..345ed7a48cc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/Makefile</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-beaglev-fire.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-disco-kit.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit-prod.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts b/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts<br/>index 47cf693beb68..55e30f3636df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='ctx'> 		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='ctx'> 		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;;</div><div class='del'>-	ngpios=&lt;32&gt;;</div><div class='add'>+	ngpios = &lt;32&gt;;</div><div class='ctx'> 	gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",</div><div class='ctx'> 			  "P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",</div><div class='ctx'> 			  "P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi<br/>new file mode 100644<br/>index 000000000000..ae8be7d6f392<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Copyright (c) 2020-2025 Microchip Technology Inc */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	core_pwm0: pwm@40000000 {</div><div class='add'>+		compatible = "microchip,corepwm-rtl-v4";</div><div class='add'>+		reg = &lt;0x0 0x40000000 0x0 0xF0&gt;;</div><div class='add'>+		microchip,sync-update-mask = /bits/ 32 &lt;0&gt;;</div><div class='add'>+		#pwm-cells = &lt;3&gt;;</div><div class='add'>+		clocks = &lt;&amp;ccc_sw CLK_CCC_PLL0_OUT3&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2: i2c@40000200 {</div><div class='add'>+		compatible = "microchip,corei2c-rtl-v7";</div><div class='add'>+		reg = &lt;0x0 0x40000200 0x0 0x100&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clocks = &lt;&amp;ccc_sw CLK_CCC_PLL0_OUT3&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		interrupts = &lt;122&gt;;</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ihc: mailbox {</div><div class='add'>+		compatible = "microchip,sbi-ipc";</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		interrupts = &lt;180&gt;, &lt;179&gt;, &lt;178&gt;, &lt;177&gt;;</div><div class='add'>+		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";</div><div class='add'>+		#mbox-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mailbox@50000000 {</div><div class='add'>+		compatible = "microchip,miv-ihc-rtl-v2";</div><div class='add'>+		reg = &lt;0x0 0x50000000 0x0 0x1c000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		interrupts = &lt;180&gt;, &lt;179&gt;, &lt;178&gt;, &lt;177&gt;;</div><div class='add'>+		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";</div><div class='add'>+		#mbox-cells = &lt;1&gt;;</div><div class='add'>+		microchip,ihc-chan-disabled-mask = /bits/ 16 &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	refclk_ccc: clock-cccref {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ccc_sw {</div><div class='add'>+	clocks = &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;,</div><div class='add'>+		 &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;;</div><div class='add'>+	clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",</div><div class='add'>+		      "dll0_ref", "dll1_ref";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts<br/>new file mode 100644<br/>index 000000000000..c068b9bb5bfd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts</a></div><div class='hunk'>@@ -0,0 +1,190 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Copyright (c) 2020-2025 Microchip Technology Inc */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "mpfs.dtsi"</div><div class='add'>+#include "mpfs-disco-kit-fabric.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip PolarFire-SoC Discovery Kit";</div><div class='add'>+	compatible = "microchip,mpfs-disco-kit-reference-rtl-v2507",</div><div class='add'>+		     "microchip,mpfs-disco-kit",</div><div class='add'>+		     "microchip,mpfs";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;mac0;</div><div class='add'>+		serial4 = &amp;mmuart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial4:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 20 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-6 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led6";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-7 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led7";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-8 {</div><div class='add'>+			gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ddrc_cache_lo: memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		hss_payload: region@bfc00000 {</div><div class='add'>+			reg = &lt;0x0 0xbfc00000 0x0 0x400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;core_pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	interrupts = &lt;27&gt;, &lt;28&gt;, &lt;29&gt;, &lt;30&gt;,</div><div class='add'>+		     &lt;31&gt;, &lt;32&gt;, &lt;33&gt;, &lt;47&gt;,</div><div class='add'>+		     &lt;35&gt;, &lt;36&gt;, &lt;37&gt;, &lt;38&gt;,</div><div class='add'>+		     &lt;39&gt;, &lt;40&gt;, &lt;41&gt;, &lt;42&gt;,</div><div class='add'>+		     &lt;43&gt;, &lt;44&gt;, &lt;45&gt;, &lt;46&gt;,</div><div class='add'>+		     &lt;47&gt;, &lt;48&gt;, &lt;49&gt;, &lt;50&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	interrupts = &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ihc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy0: ethernet-phy@b {</div><div class='add'>+		reg = &lt;0xb&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mbox {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;refclk {</div><div class='add'>+	clock-frequency = &lt;125000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;refclk_ccc {</div><div class='add'>+	clock-frequency = &lt;50000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;syscontroller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi<br/>new file mode 100644<br/>index 000000000000..e01a216e6c3a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Copyright (c) 2025 Microchip Technology Inc */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "mpfs.dtsi"</div><div class='add'>+#include "mpfs-icicle-kit-fabric.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;mac1;</div><div class='add'>+		serial0 = &amp;mmuart0;</div><div class='add'>+		serial1 = &amp;mmuart1;</div><div class='add'>+		serial2 = &amp;mmuart2;</div><div class='add'>+		serial3 = &amp;mmuart3;</div><div class='add'>+		serial4 = &amp;mmuart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial1:115200n8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+			label = "led2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+			label = "led4";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ddrc_cache_lo: memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x0 0x80000000 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ddrc_cache_hi: memory@1040000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x10 0x40000000 0x0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	reserved-memory {</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		hss_payload: region@bfc00000 {</div><div class='add'>+			reg = &lt;0x0 0xbfc00000 0x0 0x400000&gt;;</div><div class='add'>+			no-map;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;core_pwm0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	interrupts = &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='add'>+		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	power-monitor@10 {</div><div class='add'>+		compatible = "microchip,pac1934";</div><div class='add'>+		reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		channel@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDDREG";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@2 {</div><div class='add'>+			reg = &lt;0x2&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDDA25";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@3 {</div><div class='add'>+			reg = &lt;0x3&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDD25";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		channel@4 {</div><div class='add'>+			reg = &lt;0x4&gt;;</div><div class='add'>+			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+			label = "VDDA_REG";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;ihc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac0 {</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mac1 {</div><div class='add'>+	phy-mode = "sgmii";</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@9 {</div><div class='add'>+		reg = &lt;9&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phy0: ethernet-phy@8 {</div><div class='add'>+		reg = &lt;8&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mbox {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	disable-wp;</div><div class='add'>+	cap-sd-highspeed;</div><div class='add'>+	cap-mmc-highspeed;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	sd-uhs-sdr12;</div><div class='add'>+	sd-uhs-sdr25;</div><div class='add'>+	sd-uhs-sdr50;</div><div class='add'>+	sd-uhs-sdr104;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart2 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart3 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmuart4 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;refclk {</div><div class='add'>+	clock-frequency = &lt;125000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;refclk_ccc {</div><div class='add'>+	clock-frequency = &lt;50000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;rtc {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;syscontroller {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;syscontroller_qspi {</div><div class='add'>+	/*</div><div class='add'>+	 * The flash *is* there, but Icicle kits that have engineering sample</div><div class='add'>+	 * silicon (write?) access to this flash to non-functional. The system</div><div class='add'>+	 * controller itself can actually access it, but the MSS cannot write</div><div class='add'>+	 * an image there. Instantiating a coreQSPI in the fabric &amp; connecting</div><div class='add'>+	 * it to the flash instead should work though. Pre-production or later</div><div class='add'>+	 * silicon does not have this issue.</div><div class='add'>+	 */</div><div class='add'>+	status = "disabled";</div><div class='add'>+</div><div class='add'>+	sys_ctrl_flash: flash@0 { // MT25QL01GBBB8ESF-0SIT</div><div class='add'>+		compatible = "jedec,spi-nor";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+		spi-rx-bus-width = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb {</div><div class='add'>+	status = "okay";</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi<br/>index 1069134f2e12..71f724325578 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi</a></div><div class='hunk'>@@ -2,9 +2,6 @@</div><div class='ctx'> /* Copyright (c) 2020-2021 Microchip Technology Inc */</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='del'>-	compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",</div><div class='del'>-		     "microchip,mpfs";</div><div class='del'>-</div><div class='ctx'> 	core_pwm0: pwm@40000000 {</div><div class='ctx'> 		compatible = "microchip,corepwm-rtl-v4";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0x0 0xF0&gt;;</div><div class='hunk'>@@ -26,14 +23,35 @@</div><div class='ctx'> 		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	ihc: mailbox {</div><div class='add'>+		compatible = "microchip,sbi-ipc";</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		interrupts = &lt;180&gt;, &lt;179&gt;, &lt;178&gt;, &lt;177&gt;;</div><div class='add'>+		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";</div><div class='add'>+		#mbox-cells = &lt;1&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mailbox@50000000 {</div><div class='add'>+		compatible = "microchip,miv-ihc-rtl-v2";</div><div class='add'>+		reg = &lt;0x0 0x50000000 0x0 0x1c000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		interrupts = &lt;180&gt;, &lt;179&gt;, &lt;178&gt;, &lt;177&gt;;</div><div class='add'>+		interrupt-names = "hart-1", "hart-2", "hart-3", "hart-4";</div><div class='add'>+		#mbox-cells = &lt;1&gt;;</div><div class='add'>+		microchip,ihc-chan-disabled-mask = /bits/ 16 &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pcie: pcie@3000000000 {</div><div class='ctx'> 		compatible = "microchip,pcie-host-1.0";</div><div class='ctx'> 		#address-cells = &lt;0x3&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;0x1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0x2&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		reg = &lt;0x30 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43000000 0x0 0x10000&gt;;</div><div class='del'>-		reg-names = "cfg", "apb";</div><div class='add'>+		reg = &lt;0x30 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43008000 0x0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x4300a000 0x0 0x2000&gt;;</div><div class='add'>+		reg-names = "cfg", "bridge", "ctrl";</div><div class='ctx'> 		bus-range = &lt;0x0 0x7f&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'> 		interrupts = &lt;119&gt;;</div><div class='hunk'>@@ -56,7 +74,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	refclk_ccc: cccrefclk {</div><div class='add'>+	refclk_ccc: clock-cccref {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts<br/>new file mode 100644<br/>index 000000000000..8afedece89d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Copyright (c) 2025 Microchip Technology Inc */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "mpfs-icicle-kit-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Microchip PolarFire-SoC Icicle Kit (Production Silicon)";</div><div class='add'>+	compatible = "microchip,mpfs-icicle-prod-reference-rtl-v2507",</div><div class='add'>+		     "microchip,mpfs-icicle-kit-prod",</div><div class='add'>+		     "microchip,mpfs-icicle-kit",</div><div class='add'>+		     "microchip,mpfs-prod",</div><div class='add'>+		     "microchip,mpfs";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;syscontroller {</div><div class='add'>+	microchip,bitstream-flash = &lt;&amp;sys_ctrl_flash&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;syscontroller_qspi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts<br/>index f80df225f72b..556aa9638282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts</a></div><div class='hunk'>@@ -3,249 +3,11 @@</div><div class='ctx'> </div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='del'>-#include "mpfs.dtsi"</div><div class='del'>-#include "mpfs-icicle-kit-fabric.dtsi"</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include "mpfs-icicle-kit-common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Microchip PolarFire-SoC Icicle Kit";</div><div class='del'>-	compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",</div><div class='add'>+	compatible = "microchip,mpfs-icicle-es-reference-rtl-v2507",</div><div class='add'>+		     "microchip,mpfs-icicle-kit",</div><div class='ctx'> 		     "microchip,mpfs";</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		ethernet0 = &amp;mac1;</div><div class='del'>-		serial0 = &amp;mmuart0;</div><div class='del'>-		serial1 = &amp;mmuart1;</div><div class='del'>-		serial2 = &amp;mmuart2;</div><div class='del'>-		serial3 = &amp;mmuart3;</div><div class='del'>-		serial4 = &amp;mmuart4;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "serial1:115200n8";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		led-1 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-			label = "led1";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-2 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-			label = "led2";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-3 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='del'>-			label = "led3";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		led-4 {</div><div class='del'>-			gpios = &lt;&amp;gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='del'>-			label = "led4";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ddrc_cache_lo: memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x80000000 0x0 0x40000000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ddrc_cache_hi: memory@1040000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x10 0x40000000 0x0 0x40000000&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reserved-memory {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		hss_payload: region@BFC00000 {</div><div class='del'>-			reg = &lt;0x0 0xBFC00000 0x0 0x400000&gt;;</div><div class='del'>-			no-map;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;core_pwm0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;gpio2 {</div><div class='del'>-	interrupts = &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;,</div><div class='del'>-		     &lt;53&gt;, &lt;53&gt;, &lt;53&gt;, &lt;53&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	power-monitor@10 {</div><div class='del'>-		compatible = "microchip,pac1934";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		channel@1 {</div><div class='del'>-			reg = &lt;0x1&gt;;</div><div class='del'>-			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-			label = "VDDREG";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@2 {</div><div class='del'>-			reg = &lt;0x2&gt;;</div><div class='del'>-			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-			label = "VDDA25";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@3 {</div><div class='del'>-			reg = &lt;0x3&gt;;</div><div class='del'>-			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-			label = "VDD25";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		channel@4 {</div><div class='del'>-			reg = &lt;0x4&gt;;</div><div class='del'>-			shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-			label = "VDDA_REG";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mac0 {</div><div class='del'>-	phy-mode = "sgmii";</div><div class='del'>-	phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mac1 {</div><div class='del'>-	phy-mode = "sgmii";</div><div class='del'>-	phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	phy1: ethernet-phy@9 {</div><div class='del'>-		reg = &lt;9&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	phy0: ethernet-phy@8 {</div><div class='del'>-		reg = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mbox {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmc {</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	disable-wp;</div><div class='del'>-	cap-sd-highspeed;</div><div class='del'>-	cap-mmc-highspeed;</div><div class='del'>-	mmc-ddr-1_8v;</div><div class='del'>-	mmc-hs200-1_8v;</div><div class='del'>-	sd-uhs-sdr12;</div><div class='del'>-	sd-uhs-sdr25;</div><div class='del'>-	sd-uhs-sdr50;</div><div class='del'>-	sd-uhs-sdr104;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmuart1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmuart2 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmuart3 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;mmuart4 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pcie {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;qspi {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;refclk {</div><div class='del'>-	clock-frequency = &lt;125000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;refclk_ccc {</div><div class='del'>-	clock-frequency = &lt;50000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;rtc {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi1 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;syscontroller {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;syscontroller_qspi {</div><div class='del'>-	/*</div><div class='del'>-	 * The flash *is* there, but Icicle kits that have engineering sample</div><div class='del'>-	 * silicon (write?) access to this flash to non-functional. The system</div><div class='del'>-	 * controller itself can actually access it, but the MSS cannot write</div><div class='del'>-	 * an image there. Instantiating a coreQSPI in the fabric &amp; connecting</div><div class='del'>-	 * it to the flash instead should work though. Pre-production or later</div><div class='del'>-	 * silicon does not have this issue.</div><div class='del'>-	 */</div><div class='del'>-	status = "disabled";</div><div class='del'>-</div><div class='del'>-	sys_ctrl_flash: flash@0 { // MT25QL01GBBB8ESF-0SIT</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		spi-max-frequency = &lt;20000000&gt;;</div><div class='del'>-		spi-rx-bus-width = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb {</div><div class='del'>-	status = "okay";</div><div class='del'>-	dr_mode = "host";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi<br/>index 8230f06ddf48..36a9860f31da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi</a></div><div class='hunk'>@@ -20,8 +20,9 @@</div><div class='ctx'> 		#interrupt-cells = &lt;0x1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0x2&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		reg = &lt;0x20 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43000000 0x0 0x10000&gt;;</div><div class='del'>-		reg-names = "cfg", "apb";</div><div class='add'>+		reg = &lt;0x20 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43008000 0x0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x4300a000 0x0 0x2000&gt;;</div><div class='add'>+		reg-names = "cfg", "bridge", "ctrl";</div><div class='ctx'> 		bus-range = &lt;0x0 0x7f&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'> 		interrupts = &lt;119&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi<br/>index 9a56de7b91d6..a57dca891965 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi</a></div><div class='hunk'>@@ -20,8 +20,9 @@</div><div class='ctx'> 		#interrupt-cells = &lt;0x1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0x2&gt;;</div><div class='ctx'> 		device_type = "pci";</div><div class='del'>-		reg = &lt;0x20 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43000000 0x0 0x10000&gt;;</div><div class='del'>-		reg-names = "cfg", "apb";</div><div class='add'>+		reg = &lt;0x20 0x0 0x0 0x8000000&gt;, &lt;0x0 0x43008000 0x0 0x2000&gt;,</div><div class='add'>+		      &lt;0x0 0x4300a000 0x0 0x2000&gt;;</div><div class='add'>+		reg-names = "cfg", "bridge", "ctrl";</div><div class='ctx'> 		bus-range = &lt;0x0 0x7f&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'> 		interrupts = &lt;119&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi<br/>index e0ddf8f602c7..a8bcb26f4270 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/renesas/r9a07g043f.dtsi</a></div><div class='hunk'>@@ -143,7 +143,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	l2cache: cache-controller@13400000 {</div><div class='del'>-		compatible = "andestech,ax45mp-cache", "cache";</div><div class='add'>+		compatible = "renesas,r9a07g043f-ax45mp-cache", "andestech,ax45mp-cache",</div><div class='add'>+			     "cache";</div><div class='ctx'> 		reg = &lt;0x0 0x13400000 0x0 0x100000&gt;;</div><div class='ctx'> 		interrupts = &lt;SOC_PERIPHERAL_IRQ(476) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 		cache-size = &lt;0x40000&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi<br/>index 5e808242649e..86b2f15375ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi</a></div><div class='hunk'>@@ -6,3 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;arm64/renesas/rzg2ul-smarc-som.dtsi&gt;</div><div class='add'>+</div><div class='add'>+&amp;sbc {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts<br/>index 900a50526d77..06731b8c7bc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts</a></div><div class='hunk'>@@ -49,32 +49,28 @@</div><div class='ctx'> 		compatible = "pwm-leds";</div><div class='ctx'> </div><div class='ctx'> 		led-d1 {</div><div class='del'>-			pwms = &lt;&amp;pwm0 0 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-			active-low;</div><div class='add'>+			pwms = &lt;&amp;pwm0 0 7812500 0&gt;;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 			label = "d1";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-d2 {</div><div class='del'>-			pwms = &lt;&amp;pwm0 1 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-			active-low;</div><div class='add'>+			pwms = &lt;&amp;pwm0 1 7812500 0&gt;;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 			label = "d2";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-d3 {</div><div class='del'>-			pwms = &lt;&amp;pwm0 2 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-			active-low;</div><div class='add'>+			pwms = &lt;&amp;pwm0 2 7812500 0&gt;;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 			label = "d3";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		led-d4 {</div><div class='del'>-			pwms = &lt;&amp;pwm0 3 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-			active-low;</div><div class='add'>+			pwms = &lt;&amp;pwm0 3 7812500 0&gt;;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 			label = "d4";</div><div class='head'>diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts<br/>index 72b87b08ab44..03ce2cee4e97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts</a></div><div class='hunk'>@@ -51,8 +51,7 @@</div><div class='ctx'> 		compatible = "pwm-leds";</div><div class='ctx'> </div><div class='ctx'> 		led-d12 {</div><div class='del'>-			pwms = &lt;&amp;pwm0 0 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-			active-low;</div><div class='add'>+			pwms = &lt;&amp;pwm0 0 7812500 0&gt;;</div><div class='ctx'> 			color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			max-brightness = &lt;255&gt;;</div><div class='ctx'> 			label = "d12";</div><div class='hunk'>@@ -68,20 +67,17 @@</div><div class='ctx'> 			label = "d2";</div><div class='ctx'> </div><div class='ctx'> 			led-red {</div><div class='del'>-				pwms = &lt;&amp;pwm0 2 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-				active-low;</div><div class='add'>+				pwms = &lt;&amp;pwm0 2 7812500 0&gt;;</div><div class='ctx'> 				color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			led-green {</div><div class='del'>-				pwms = &lt;&amp;pwm0 1 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-				active-low;</div><div class='add'>+				pwms = &lt;&amp;pwm0 1 7812500 0&gt;;</div><div class='ctx'> 				color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			led-blue {</div><div class='del'>-				pwms = &lt;&amp;pwm0 3 7812500 PWM_POLARITY_INVERTED&gt;;</div><div class='del'>-				active-low;</div><div class='add'>+				pwms = &lt;&amp;pwm0 3 7812500 0&gt;;</div><div class='ctx'> 				color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile<br/>index 57ad82a61ea6..6f65526d4193 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/Makefile</a></div><div class='hunk'>@@ -1,4 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v1.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v2.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SOPHGO) += sg2044-sophgo-srd3-10.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts<br/>index 375ff2661b6e..9feb520eaec4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts</a></div><div class='hunk'>@@ -39,7 +39,54 @@</div><div class='ctx'> 	clock-frequency = &lt;25000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci0_cfg: sdhci0-cfg {</div><div class='add'>+		sdhci0-clk-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CLK, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;16100&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-cmd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CMD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-data-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_D0, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D1, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D2, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D3, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhci0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	no-1-8-v;</div><div class='hunk'>@@ -49,5 +96,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi<br/>index ec9530972ae2..90de978f69c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1800b.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv1800b.dtsi</a></div><div class='hunk'>@@ -3,7 +3,11 @@</div><div class='ctx'>  * Copyright (C) 2023 Jisheng Zhang &lt;jszhang@kernel.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "cv18xx.dtsi"</div><div class='add'>+#define SOC_PERIPHERAL_IRQ(nr)	((nr) + 16)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-cv1800b.h&gt;</div><div class='add'>+#include "cv180x-cpus.dtsi"</div><div class='add'>+#include "cv180x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "sophgo,cv1800b";</div><div class='hunk'>@@ -12,16 +16,39 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x80000000 0x4000000&gt;;</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;plic {</div><div class='del'>-	compatible = "sophgo,cv1800b-plic", "thead,c900-plic";</div><div class='del'>-};</div><div class='add'>+	soc {</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='ctx'> </div><div class='del'>-&amp;clint {</div><div class='del'>-	compatible = "sophgo,cv1800b-clint", "thead,c900-clint";</div><div class='del'>-};</div><div class='add'>+		pinctrl: pinctrl@3001000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-pinctrl";</div><div class='add'>+			reg = &lt;0x03001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x05027000 0x1000&gt;;</div><div class='add'>+			reg-names = "sys", "rtc";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-&amp;clk {</div><div class='del'>-	compatible = "sophgo,cv1800-clk";</div><div class='add'>+		clk: clock-controller@3002000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-clk";</div><div class='add'>+			reg = &lt;0x03002000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@70000000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-plic", "thead,c900-plic";</div><div class='add'>+			reg = &lt;0x70000000 0x4000000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			riscv,ndev = &lt;101&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clint: timer@74000000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-clint", "thead,c900-clint";</div><div class='add'>+			reg = &lt;0x74000000 0x10000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi b/arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi<br/>new file mode 100644<br/>index 000000000000..93fd9e47a195<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023 Jisheng Zhang &lt;jszhang@kernel.org&gt;</div><div class='add'>+ * Copyright (C) 2023 Inochi Amaoto &lt;inochiama@outlook.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	cpus: cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		timebase-frequency = &lt;25000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "thead,c906", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+			riscv,isa = "rv64imafdc";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm";</div><div class='add'>+</div><div class='add'>+			cpu0_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi<br/>index b724fb6d9689..ccdb45498653 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv180x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv180x.dtsi</a></div><div class='hunk'>@@ -7,40 +7,12 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/sophgo,cv1800.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include "cv18xx-reset.h"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	#address-cells = &lt;1&gt;;</div><div class='ctx'> 	#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-	cpus: cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		timebase-frequency = &lt;25000000&gt;;</div><div class='del'>-</div><div class='del'>-		cpu0: cpu@0 {</div><div class='del'>-			compatible = "thead,c906", "riscv";</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			d-cache-block-size = &lt;64&gt;;</div><div class='del'>-			d-cache-sets = &lt;512&gt;;</div><div class='del'>-			d-cache-size = &lt;65536&gt;;</div><div class='del'>-			i-cache-block-size = &lt;64&gt;;</div><div class='del'>-			i-cache-sets = &lt;128&gt;;</div><div class='del'>-			i-cache-size = &lt;32768&gt;;</div><div class='del'>-			mmu-type = "riscv,sv39";</div><div class='del'>-			riscv,isa = "rv64imafdc";</div><div class='del'>-			riscv,isa-base = "rv64i";</div><div class='del'>-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",</div><div class='del'>-					       "zifencei", "zihpm";</div><div class='del'>-</div><div class='del'>-			cpu0_intc: interrupt-controller {</div><div class='del'>-				compatible = "riscv,cpu-intc";</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	osc: oscillator {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='ctx'> 		clock-output-names = "osc_25m";</div><div class='hunk'>@@ -49,16 +21,41 @@</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='del'>-		dma-noncoherent;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='del'>-		clk: clock-controller@3002000 {</div><div class='del'>-			reg = &lt;0x03002000 0x1000&gt;;</div><div class='del'>-			clocks = &lt;&amp;osc&gt;;</div><div class='del'>-			#clock-cells = &lt;1&gt;;</div><div class='add'>+		rst: reset-controller@3003000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-reset";</div><div class='add'>+			reg = &lt;0x3003000 0x1000&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio: mdio-mux@3009800 {</div><div class='add'>+			compatible = "mdio-mux-mmioreg", "mdio-mux";</div><div class='add'>+			reg = &lt;0x3009800 0x4&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			mdio-parent-bus = &lt;&amp;gmac0_mdio&gt;;</div><div class='add'>+			mux-mask = &lt;0x80&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			internal_mdio: mdio@0 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+				internal_ephy: phy@0 {</div><div class='add'>+					compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+					reg = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			external_mdio: mdio@80 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				reg = &lt;0x80&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@3020000 {</div><div class='hunk'>@@ -66,6 +63,7 @@</div><div class='ctx'> 			reg = &lt;0x3020000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			porta: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='hunk'>@@ -75,7 +73,7 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;60 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;SOC_PERIPHERAL_IRQ(44) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +82,7 @@</div><div class='ctx'> 			reg = &lt;0x3021000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			portb: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='hunk'>@@ -93,7 +92,7 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;61 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;SOC_PERIPHERAL_IRQ(45) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -102,6 +101,7 @@</div><div class='ctx'> 			reg = &lt;0x3022000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			portc: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='hunk'>@@ -111,7 +111,7 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;62 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;SOC_PERIPHERAL_IRQ(46) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -120,6 +120,7 @@</div><div class='ctx'> 			reg = &lt;0x3023000 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			portd: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='hunk'>@@ -129,7 +130,29 @@</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-				interrupts = &lt;63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupts = &lt;SOC_PERIPHERAL_IRQ(47) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		saradc: adc@30f0000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-saradc";</div><div class='add'>+			reg = &lt;0x030f0000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_SARADC&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(84) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			channel@0 {</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			channel@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -140,7 +163,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C0&gt;;</div><div class='ctx'> 			clock-names = "ref", "pclk";</div><div class='del'>-			interrupts = &lt;49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(33) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +175,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C1&gt;;</div><div class='ctx'> 			clock-names = "ref", "pclk";</div><div class='del'>-			interrupts = &lt;50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(34) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +187,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C2&gt;;</div><div class='ctx'> 			clock-names = "ref", "pclk";</div><div class='del'>-			interrupts = &lt;51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(35) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -173,7 +199,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C3&gt;;</div><div class='ctx'> 			clock-names = "ref", "pclk";</div><div class='del'>-			interrupts = &lt;52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(36) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -184,51 +211,102 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_I2C&gt;, &lt;&amp;clk CLK_APB_I2C4&gt;;</div><div class='ctx'> 			clock-names = "ref", "pclk";</div><div class='del'>-			interrupts = &lt;53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(37) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gmac0: ethernet@4070000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-dwmac", "snps,dwmac-3.70a";</div><div class='add'>+			reg = &lt;0x04070000 0x10000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_AXI4_ETH0&gt;, &lt;&amp;clk CLK_ETH0_500M&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref";</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			phy-handle = &lt;&amp;internal_ephy&gt;;</div><div class='add'>+			phy-mode = "internal";</div><div class='add'>+			resets = &lt;&amp;rst RST_ETH0&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+			snps,multicast-filter-bins = &lt;0&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;1&gt;;</div><div class='add'>+			snps,aal;</div><div class='add'>+			snps,txpbl = &lt;8&gt;;</div><div class='add'>+			snps,rxpbl = &lt;8&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac0_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac0_mtl_tx_setup&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac0_stmmac_axi_setup&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			gmac0_mdio: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;1&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;2&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart0: serial@4140000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04140000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(28) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_UART0&gt;, &lt;&amp;clk CLK_APB_UART0&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart1: serial@4150000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04150000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(29) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_UART1&gt;, &lt;&amp;clk CLK_APB_UART1&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart2: serial@4160000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04160000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;46 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(30) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_UART2&gt;, &lt;&amp;clk CLK_APB_UART2&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart3: serial@4170000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x04170000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;47 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(31) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_UART3&gt;, &lt;&amp;clk CLK_APB_UART3&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +317,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI0&gt;;</div><div class='ctx'> 			clock-names = "ssi_clk", "pclk";</div><div class='del'>-			interrupts = &lt;54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(38) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPI0&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +329,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI1&gt;;</div><div class='ctx'> 			clock-names = "ssi_clk", "pclk";</div><div class='del'>-			interrupts = &lt;55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(39) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPI1&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -261,7 +341,8 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI2&gt;;</div><div class='ctx'> 			clock-names = "ssi_clk", "pclk";</div><div class='del'>-			interrupts = &lt;56 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(40) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPI2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -272,35 +353,47 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_SPI&gt;, &lt;&amp;clk CLK_APB_SPI3&gt;;</div><div class='ctx'> 			clock-names = "ssi_clk", "pclk";</div><div class='del'>-			interrupts = &lt;57 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(41) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPI3&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart4: serial@41c0000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0x041c0000 0x100&gt;;</div><div class='del'>-			interrupts = &lt;48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(32) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_UART4&gt;, &lt;&amp;clk CLK_APB_UART4&gt;;</div><div class='ctx'> 			clock-names = "baudclk", "apb_pclk";</div><div class='ctx'> 			reg-shift = &lt;2&gt;;</div><div class='ctx'> 			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdhci0: mmc@4310000 {</div><div class='ctx'> 			compatible = "sophgo,cv1800b-dwcmshc";</div><div class='ctx'> 			reg = &lt;0x4310000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(20) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_AXI4_SD0&gt;,</div><div class='ctx'> 				 &lt;&amp;clk CLK_SD0&gt;;</div><div class='ctx'> 			clock-names = "core", "bus";</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		sdhci1: mmc@4320000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-dwcmshc";</div><div class='add'>+			reg = &lt;0x4320000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_AXI4_SD1&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_SD1&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		dmac: dma-controller@4330000 {</div><div class='ctx'> 			compatible = "snps,axi-dma-1.01a";</div><div class='ctx'> 			reg = &lt;0x04330000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(13) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_SDMA_AXI&gt;, &lt;&amp;clk CLK_SDMA_AXI&gt;;</div><div class='ctx'> 			clock-names = "core-clk", "cfgr-clk";</div><div class='ctx'> 			#dma-cells = &lt;1&gt;;</div><div class='hunk'>@@ -309,22 +402,20 @@</div><div class='ctx'> 					   1024 1024 1024 1024&gt;;</div><div class='ctx'> 			snps,priority = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='ctx'> 			snps,dma-masters = &lt;2&gt;;</div><div class='del'>-			snps,data-width = &lt;4&gt;;</div><div class='add'>+			snps,data-width = &lt;2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		plic: interrupt-controller@70000000 {</div><div class='del'>-			reg = &lt;0x70000000 0x4000000&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#address-cells = &lt;0&gt;;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			riscv,ndev = &lt;101&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		clint: timer@74000000 {</div><div class='del'>-			reg = &lt;0x74000000 0x10000&gt;;</div><div class='del'>-			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;;</div><div class='add'>+		rtc@5025000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-rtc", "syscon";</div><div class='add'>+			reg = &lt;0x5025000 0x2000&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(1) IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;SOC_PERIPHERAL_IRQ(2) IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+				     &lt;SOC_PERIPHERAL_IRQ(3) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "alarm", "longpress", "vbat";</div><div class='add'>+			clocks = &lt;&amp;clk CLK_RTC_25M&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_SRC_RTC_SYS_0&gt;;</div><div class='add'>+			clock-names = "rtc", "mcu";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts<br/>index 7b5f57853690..4a5835fa9e96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts</a></div><div class='hunk'>@@ -43,6 +43,26 @@</div><div class='ctx'> 	clock-frequency = &lt;25000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;emmc {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	max-frequency = &lt;200000000&gt;;</div><div class='add'>+	mmc-ddr-1_8v;</div><div class='add'>+	mmc-ddr-3_3v;</div><div class='add'>+	mmc-hs200-1_8v;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	non-removable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdhci0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='hunk'>@@ -52,6 +72,17 @@</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;sdhci1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cap-sdio-irq;</div><div class='add'>+	max-frequency = &lt;50000000&gt;;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sd;</div><div class='add'>+	disable-wp;</div><div class='add'>+	non-removable;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;uart0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi<br/>index 7fa4c1e2d1da..9a2a314d3347 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv1812h.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv1812h.dtsi</a></div><div class='hunk'>@@ -3,8 +3,13 @@</div><div class='ctx'>  * Copyright (C) 2023 Inochi Amaoto &lt;inochiama@outlook.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define SOC_PERIPHERAL_IRQ(nr)	((nr) + 16)</div><div class='add'>+</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-#include "cv18xx.dtsi"</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-cv1812h.h&gt;</div><div class='add'>+#include "cv180x-cpus.dtsi"</div><div class='add'>+#include "cv180x.dtsi"</div><div class='add'>+#include "cv181x.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "sophgo,cv1812h";</div><div class='hunk'>@@ -13,16 +18,39 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x80000000 0x10000000&gt;;</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-&amp;plic {</div><div class='del'>-	compatible = "sophgo,cv1812h-plic", "thead,c900-plic";</div><div class='del'>-};</div><div class='add'>+	soc {</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='ctx'> </div><div class='del'>-&amp;clint {</div><div class='del'>-	compatible = "sophgo,cv1812h-clint", "thead,c900-clint";</div><div class='del'>-};</div><div class='add'>+		pinctrl: pinctrl@3001000 {</div><div class='add'>+			compatible = "sophgo,cv1812h-pinctrl";</div><div class='add'>+			reg = &lt;0x03001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x05027000 0x1000&gt;;</div><div class='add'>+			reg-names = "sys", "rtc";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-&amp;clk {</div><div class='del'>-	compatible = "sophgo,cv1810-clk";</div><div class='add'>+		clk: clock-controller@3002000 {</div><div class='add'>+			compatible = "sophgo,cv1812h-clk";</div><div class='add'>+			reg = &lt;0x03002000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@70000000 {</div><div class='add'>+			compatible = "sophgo,cv1812h-plic", "thead,c900-plic";</div><div class='add'>+			reg = &lt;0x70000000 0x4000000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			riscv,ndev = &lt;101&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clint: timer@74000000 {</div><div class='add'>+			compatible = "sophgo,cv1812h-clint", "thead,c900-clint";</div><div class='add'>+			reg = &lt;0x74000000 0x10000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv181x.dtsi b/arch/riscv/boot/dts/sophgo/cv181x.dtsi<br/>new file mode 100644<br/>index 000000000000..bbdb30653e9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv181x.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv181x.dtsi</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Inochi Amaoto &lt;inochiama@outlook.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/sophgo,cv1800.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	soc {</div><div class='add'>+		emmc: mmc@4300000 {</div><div class='add'>+			compatible = "sophgo,cv1800b-dwcmshc";</div><div class='add'>+			reg = &lt;0x4300000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;SOC_PERIPHERAL_IRQ(18) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_AXI4_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_EMMC&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv18xx-reset.h b/arch/riscv/boot/dts/sophgo/cv18xx-reset.h<br/>new file mode 100644<br/>index 000000000000..7e7c5ca2dbbd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/cv18xx-reset.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/cv18xx-reset.h</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Inochi Amaoto &lt;inochiama@outlook.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _SOPHGO_CV18XX_RESET</div><div class='add'>+#define _SOPHGO_CV18XX_RESET</div><div class='add'>+</div><div class='add'>+#define RST_DDR				2</div><div class='add'>+#define RST_H264C			3</div><div class='add'>+#define RST_JPEG			4</div><div class='add'>+#define RST_H265C			5</div><div class='add'>+#define RST_VIPSYS			6</div><div class='add'>+#define RST_TDMA			7</div><div class='add'>+#define RST_TPU				8</div><div class='add'>+#define RST_TPUSYS			9</div><div class='add'>+#define RST_USB				11</div><div class='add'>+#define RST_ETH0			12</div><div class='add'>+#define RST_ETH1			13</div><div class='add'>+#define RST_NAND			14</div><div class='add'>+#define RST_EMMC			15</div><div class='add'>+#define RST_SD0				16</div><div class='add'>+#define RST_SDMA			18</div><div class='add'>+#define RST_I2S0			19</div><div class='add'>+#define RST_I2S1			20</div><div class='add'>+#define RST_I2S2			21</div><div class='add'>+#define RST_I2S3			22</div><div class='add'>+#define RST_UART0			23</div><div class='add'>+#define RST_UART1			24</div><div class='add'>+#define RST_UART2			25</div><div class='add'>+#define RST_UART3			26</div><div class='add'>+#define RST_I2C0			27</div><div class='add'>+#define RST_I2C1			28</div><div class='add'>+#define RST_I2C2			29</div><div class='add'>+#define RST_I2C3			30</div><div class='add'>+#define RST_I2C4			31</div><div class='add'>+#define RST_PWM0			32</div><div class='add'>+#define RST_PWM1			33</div><div class='add'>+#define RST_PWM2			34</div><div class='add'>+#define RST_PWM3			35</div><div class='add'>+#define RST_SPI0			40</div><div class='add'>+#define RST_SPI1			41</div><div class='add'>+#define RST_SPI2			42</div><div class='add'>+#define RST_SPI3			43</div><div class='add'>+#define RST_GPIO0			44</div><div class='add'>+#define RST_GPIO1			45</div><div class='add'>+#define RST_GPIO2			46</div><div class='add'>+#define RST_EFUSE			47</div><div class='add'>+#define RST_WDT				48</div><div class='add'>+#define RST_AHB_ROM			49</div><div class='add'>+#define RST_SPIC			50</div><div class='add'>+#define RST_TEMPSEN			51</div><div class='add'>+#define RST_SARADC			52</div><div class='add'>+#define RST_COMBO_PHY0			58</div><div class='add'>+#define RST_SPI_NAND			61</div><div class='add'>+#define RST_SE				62</div><div class='add'>+#define RST_UART4			74</div><div class='add'>+#define RST_GPIO3			75</div><div class='add'>+#define RST_SYSTEM			76</div><div class='add'>+#define RST_TIMER			77</div><div class='add'>+#define RST_TIMER0			78</div><div class='add'>+#define RST_TIMER1			79</div><div class='add'>+#define RST_TIMER2			80</div><div class='add'>+#define RST_TIMER3			81</div><div class='add'>+#define RST_TIMER4			82</div><div class='add'>+#define RST_TIMER5			83</div><div class='add'>+#define RST_TIMER6			84</div><div class='add'>+#define RST_TIMER7			85</div><div class='add'>+#define RST_WGN0			86</div><div class='add'>+#define RST_WGN1			87</div><div class='add'>+#define RST_WGN2			88</div><div class='add'>+#define RST_KEYSCAN			89</div><div class='add'>+#define RST_AUDDAC			91</div><div class='add'>+#define RST_AUDDAC_APB			92</div><div class='add'>+#define RST_AUDADC			93</div><div class='add'>+#define RST_VCSYS			95</div><div class='add'>+#define RST_ETHPHY			96</div><div class='add'>+#define RST_ETHPHY_APB			97</div><div class='add'>+#define RST_AUDSRC			98</div><div class='add'>+#define RST_VIP_CAM0			99</div><div class='add'>+#define RST_WDT1			100</div><div class='add'>+#define RST_WDT2			101</div><div class='add'>+#define RST_AUTOCLEAR_CPUCORE0		256</div><div class='add'>+#define RST_AUTOCLEAR_CPUCORE1		257</div><div class='add'>+#define RST_AUTOCLEAR_CPUCORE2		258</div><div class='add'>+#define RST_AUTOCLEAR_CPUCORE3		259</div><div class='add'>+#define RST_AUTOCLEAR_CPUSYS0		260</div><div class='add'>+#define RST_AUTOCLEAR_CPUSYS1		261</div><div class='add'>+#define RST_AUTOCLEAR_CPUSYS2		262</div><div class='add'>+#define RST_CPUCORE0			288</div><div class='add'>+#define RST_CPUCORE1			289</div><div class='add'>+#define RST_CPUCORE2			290</div><div class='add'>+#define RST_CPUCORE3			291</div><div class='add'>+#define RST_CPUSYS0			292</div><div class='add'>+#define RST_CPUSYS1			293</div><div class='add'>+#define RST_CPUSYS2			294</div><div class='add'>+</div><div class='add'>+#endif /* _SOPHGO_CV18XX_RESET */</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts<br/>new file mode 100644<br/>index 000000000000..86a712b953a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Thomas Bonnefille &lt;thomas.bonnefille@bootlin.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sg2002.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "LicheeRV Nano B";</div><div class='add'>+	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+		serial4 = &amp;uart4;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;osc {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci0_cfg: sdhci0-cfg {</div><div class='add'>+		sdhci0-clk-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CLK, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;16100&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-cmd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CMD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-data-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_D0, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D1, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D2, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SD0_D3, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci0-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SD0_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;10800&gt;;</div><div class='add'>+			power-source = &lt;3300&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sdhci0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-1-8-v;</div><div class='add'>+	no-mmc;</div><div class='add'>+	no-sdio;</div><div class='add'>+	disable-wp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi<br/>new file mode 100644<br/>index 000000000000..98001cce238e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2002.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2002.dtsi</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Thomas Bonnefille &lt;thomas.bonnefille@bootlin.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define SOC_PERIPHERAL_IRQ(nr)	((nr) + 16)</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-sg2002.h&gt;</div><div class='add'>+#include "cv180x-cpus.dtsi"</div><div class='add'>+#include "cv180x.dtsi"</div><div class='add'>+#include "cv181x.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "sophgo,sg2002";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x80000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@3001000 {</div><div class='add'>+			compatible = "sophgo,sg2002-pinctrl";</div><div class='add'>+			reg = &lt;0x03001000 0x1000&gt;,</div><div class='add'>+			      &lt;0x05027000 0x1000&gt;;</div><div class='add'>+			reg-names = "sys", "rtc";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk: clock-controller@3002000 {</div><div class='add'>+			compatible = "sophgo,sg2002-clk", "sophgo,sg2000-clk";</div><div class='add'>+			reg = &lt;0x03002000 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@70000000 {</div><div class='add'>+			compatible = "sophgo,sg2002-plic", "thead,c900-plic";</div><div class='add'>+			reg = &lt;0x70000000 0x4000000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			riscv,ndev = &lt;101&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clint: timer@74000000 {</div><div class='add'>+			compatible = "sophgo,sg2002-clint", "thead,c900-clint";</div><div class='add'>+			reg = &lt;0x74000000 0x10000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sdhci0 {</div><div class='add'>+	compatible = "sophgo,sg2002-dwcmshc";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi<br/>index b136b6c4128c..94a4b71acad3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi</a></div><div class='hunk'>@@ -259,8 +259,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -270,6 +272,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu0_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -284,8 +287,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -295,6 +300,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu1_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -309,8 +315,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;2&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -320,6 +328,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu2_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -334,8 +343,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;3&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -345,6 +356,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu3_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -359,8 +371,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;4&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -370,6 +384,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu4_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -384,8 +399,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;5&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -395,6 +412,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu5_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -409,8 +427,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;6&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -420,6 +440,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu6_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -434,8 +455,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;7&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -445,6 +468,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu7_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -459,8 +483,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;8&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -470,6 +496,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu8_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -484,8 +511,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;9&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -495,6 +524,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu9_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -509,8 +539,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;10&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -520,6 +552,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu10_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -534,8 +567,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;11&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -545,6 +580,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu11_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -559,8 +595,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;12&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -570,6 +608,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu12_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -584,8 +623,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;13&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -595,6 +636,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu13_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -609,8 +651,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;14&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -620,6 +664,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu14_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -634,8 +679,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;15&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -645,6 +692,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu15_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -659,8 +707,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;16&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -670,6 +720,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu16_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -684,8 +735,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;17&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -695,6 +748,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu17_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -709,8 +763,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;18&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -720,6 +776,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu18_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -734,8 +791,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;19&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -745,6 +804,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu19_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -759,8 +819,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;20&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -770,6 +832,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu20_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -784,8 +847,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;21&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -795,6 +860,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu21_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -809,8 +875,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;22&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -820,6 +888,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu22_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -834,8 +903,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;23&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -845,6 +916,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu23_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -859,8 +931,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;24&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -870,6 +944,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu24_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -884,8 +959,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;25&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -895,6 +972,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu25_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -909,8 +987,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;26&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -920,6 +1000,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu26_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -934,8 +1015,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;27&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -945,6 +1028,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu27_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -959,8 +1043,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;28&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -970,6 +1056,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu28_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -984,8 +1071,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;29&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -995,6 +1084,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu29_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1009,8 +1099,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;30&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1020,6 +1112,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu30_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1034,8 +1127,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;31&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1045,6 +1140,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu31_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1059,8 +1155,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;32&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1070,6 +1168,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu32_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1084,8 +1183,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;33&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1095,6 +1196,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu33_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1109,8 +1211,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;34&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1120,6 +1224,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu34_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1134,8 +1239,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;35&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1145,6 +1252,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu35_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1159,8 +1267,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;36&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1170,6 +1280,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu36_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1184,8 +1295,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;37&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1195,6 +1308,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu37_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1209,8 +1323,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;38&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1220,6 +1336,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu38_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1234,8 +1351,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;39&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1245,6 +1364,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu39_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1259,8 +1379,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;40&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1270,6 +1392,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu40_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1284,8 +1407,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;41&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1295,6 +1420,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu41_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1309,8 +1435,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;42&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1320,6 +1448,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu42_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1334,8 +1463,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;43&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1345,6 +1476,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu43_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1359,8 +1491,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;44&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1370,6 +1504,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu44_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1384,8 +1519,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;45&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1395,6 +1532,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu45_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1409,8 +1547,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;46&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1420,6 +1560,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu46_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1434,8 +1575,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;47&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1445,6 +1588,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu47_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1459,8 +1603,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;48&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1470,6 +1616,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu48_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1484,8 +1631,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;49&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1495,6 +1644,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu49_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1509,8 +1659,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;50&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1520,6 +1672,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu50_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1534,8 +1687,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;51&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1545,6 +1700,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu51_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1559,8 +1715,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;52&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1570,6 +1728,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu52_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1584,8 +1743,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;53&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1595,6 +1756,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu53_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1609,8 +1771,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;54&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1620,6 +1784,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu54_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1634,8 +1799,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;55&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1645,6 +1812,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu55_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1659,8 +1827,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;56&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1670,6 +1840,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu56_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1684,8 +1855,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;57&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1695,6 +1868,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu57_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1709,8 +1883,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;58&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1720,6 +1896,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu58_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1734,8 +1911,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;59&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1745,6 +1924,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu59_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1759,8 +1939,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;60&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1770,6 +1952,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu60_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1784,8 +1967,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;61&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1795,6 +1980,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu61_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1809,8 +1995,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;62&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1820,6 +2008,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu62_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='hunk'>@@ -1834,8 +2023,10 @@</div><div class='ctx'> 			riscv,isa = "rv64imafdc";</div><div class='ctx'> 			riscv,isa-base = "rv64i";</div><div class='ctx'> 			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='del'>-					       "zicntr", "zicsr", "zifencei",</div><div class='del'>-					       "zihpm";</div><div class='add'>+					       "ziccrse", "zicntr", "zicsr",</div><div class='add'>+					       "zifencei", "zihpm", "zfh",</div><div class='add'>+					       "xtheadvector";</div><div class='add'>+			thead,vlenb = &lt;16&gt;;</div><div class='ctx'> 			reg = &lt;63&gt;;</div><div class='ctx'> 			i-cache-block-size = &lt;64&gt;;</div><div class='ctx'> 			i-cache-size = &lt;65536&gt;;</div><div class='hunk'>@@ -1845,6 +2036,7 @@</div><div class='ctx'> 			d-cache-sets = &lt;512&gt;;</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='ctx'> 			mmu-type = "riscv,sv39";</div><div class='add'>+			numa-node-id = &lt;3&gt;;</div><div class='ctx'> </div><div class='ctx'> 			cpu63_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts<br/>new file mode 100644<br/>index 000000000000..3320bc1dd2c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Sophgo Technology Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sg2042.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sophgo SG2042 EVB V1.X";</div><div class='add'>+	compatible = "sophgo,sg2042-evb-v1", "sophgo,sg2042";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio-power {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;port0a 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			debounce-interval = &lt;100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwmfan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;103 128 179 230 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 0 40000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		soc-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;mcu 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				soc_active1: soc-active1 {</div><div class='add'>+					temperature = &lt;30000&gt;;</div><div class='add'>+					hysteresis = &lt;8000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_active2: soc-active2 {</div><div class='add'>+					temperature = &lt;58000&gt;;</div><div class='add'>+					hysteresis = &lt;12000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_active3: soc-active3 {</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_hot: soc-hot {</div><div class='add'>+					temperature = &lt;80000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;soc_active1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 0 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;soc_active2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map2 {</div><div class='add'>+					trip = &lt;&amp;soc_active3&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 2 3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map3 {</div><div class='add'>+					trip = &lt;&amp;soc_hot&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		board-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;mcu 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				board_active: board-active {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;8000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map4 {</div><div class='add'>+					trip = &lt;&amp;board_active&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_main {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_dpll0 {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_dpll1 {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mcu: syscon@17 {</div><div class='add'>+		compatible = "sophgo,sg2042-hwmon-mcu";</div><div class='add'>+		reg = &lt;0x17&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		phy0: phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;port0a 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	emmc_cfg: sdhci-emmc-cfg {</div><div class='add'>+		sdhci-emmc-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_WP, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_EMMC_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_cfg: i2c1-cfg {</div><div class='add'>+		i2c1-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_IIC1_SDA, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_IIC1_SCL, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_cfg: sdhci-sd-cfg {</div><div class='add'>+		sdhci-sd-cd-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_CD, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_WP, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-sd-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-rx-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts<br/>new file mode 100644<br/>index 000000000000..46980e41b886<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Sophgo Technology Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "sg2042.dtsi"</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sophgo SG2042 EVB V2.0";</div><div class='add'>+	compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwmfan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;103 128 179 230 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 0 40000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	thermal-zones {</div><div class='add'>+		soc-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;mcu 0&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				soc_active1: soc-active1 {</div><div class='add'>+					temperature = &lt;30000&gt;;</div><div class='add'>+					hysteresis = &lt;8000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_active2: soc-active2 {</div><div class='add'>+					temperature = &lt;58000&gt;;</div><div class='add'>+					hysteresis = &lt;12000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_active3: soc-active3 {</div><div class='add'>+					temperature = &lt;70000&gt;;</div><div class='add'>+					hysteresis = &lt;10000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				soc_hot: soc-hot {</div><div class='add'>+					temperature = &lt;80000&gt;;</div><div class='add'>+					hysteresis = &lt;5000&gt;;</div><div class='add'>+					type = "hot";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;soc_active1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 0 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;soc_active2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map2 {</div><div class='add'>+					trip = &lt;&amp;soc_active3&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 2 3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map3 {</div><div class='add'>+					trip = &lt;&amp;soc_hot&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		board-thermal {</div><div class='add'>+			polling-delay-passive = &lt;1000&gt;;</div><div class='add'>+			polling-delay = &lt;1000&gt;;</div><div class='add'>+			thermal-sensors = &lt;&amp;mcu 1&gt;;</div><div class='add'>+</div><div class='add'>+			trips {</div><div class='add'>+				board_active: board-active {</div><div class='add'>+					temperature = &lt;75000&gt;;</div><div class='add'>+					hysteresis = &lt;8000&gt;;</div><div class='add'>+					type = "active";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map4 {</div><div class='add'>+					trip = &lt;&amp;board_active&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_main {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_dpll0 {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;cgi_dpll1 {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mcu: syscon@17 {</div><div class='add'>+		compatible = "sophgo,sg2042-hwmon-mcu";</div><div class='add'>+		reg = &lt;0x17&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		phy0: phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;port0a 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;100000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;100000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	emmc_cfg: sdhci-emmc-cfg {</div><div class='add'>+		sdhci-emmc-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_WP, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_EMMC_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_cfg: i2c1-cfg {</div><div class='add'>+		i2c1-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_IIC1_SDA, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_IIC1_SCL, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_cfg: sdhci-sd-cfg {</div><div class='add'>+		sdhci-sd-cd-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_CD, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_WP, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-sd-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-rx-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts<br/>index a3f9d6f22566..ef3a602172b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts</a></div><div class='hunk'>@@ -5,6 +5,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "sg2042.dtsi"</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='ctx'> / {</div><div class='ctx'> 	model = "Milk-V Pioneer";</div><div class='ctx'> 	compatible = "milkv,pioneer", "sophgo,sg2042";</div><div class='hunk'>@@ -12,6 +15,18 @@</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		stdout-path = "serial0";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gpio-power {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+</div><div class='add'>+		key-power {</div><div class='add'>+			label = "Power Key";</div><div class='add'>+			linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+			gpios = &lt;&amp;port0a 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,input-type = &lt;EV_KEY&gt;;</div><div class='add'>+			debounce-interval = &lt;100&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;cgi_main {</div><div class='hunk'>@@ -27,6 +42,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;emmc {</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	no-sdio;</div><div class='ctx'> 	no-sd;</div><div class='hunk'>@@ -36,6 +53,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c1 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;i2c1_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mcu: syscon@17 {</div><div class='hunk'>@@ -45,7 +64,73 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	emmc_cfg: sdhci-emmc-cfg {</div><div class='add'>+		sdhci-emmc-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_WP, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-cd-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_CD, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-emmc-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_EMMC_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_EMMC_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c1_cfg: i2c1-cfg {</div><div class='add'>+		i2c1-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_IIC1_SDA, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_IIC1_SCL, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sd_cfg: sdhci-sd-cfg {</div><div class='add'>+		sdhci-sd-cd-wp-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_CD, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_WP, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci-sd-rst-pwr-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_SDIO_RST, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_SDIO_PWR_EN, 0)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_cfg: uart0-cfg {</div><div class='add'>+		uart0-rx-pins {</div><div class='add'>+			pinmux = &lt;PINMUX(PIN_UART0_TX, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PIN_UART0_RX, 0)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength-microamp = &lt;26800&gt;;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sd {</div><div class='add'>+	pinctrl-0 = &lt;&amp;sd_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	no-sdio;</div><div class='ctx'> 	no-mmc;</div><div class='hunk'>@@ -54,10 +139,19 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_cfg&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='add'>+	pwmfan: pwm-fan {</div><div class='add'>+		compatible = "pwm-fan";</div><div class='add'>+		cooling-levels = &lt;103 128 179 230 255&gt;;</div><div class='add'>+		pwms = &lt;&amp;pwm 0 40000 0&gt;;</div><div class='add'>+		#cooling-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	thermal-zones {</div><div class='ctx'> 		soc-thermal {</div><div class='ctx'> 			polling-delay-passive = &lt;1000&gt;;</div><div class='hunk'>@@ -89,6 +183,28 @@</div><div class='ctx'> 					type = "hot";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map0 {</div><div class='add'>+					trip = &lt;&amp;soc_active1&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 0 1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map1 {</div><div class='add'>+					trip = &lt;&amp;soc_active2&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 1 2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map2 {</div><div class='add'>+					trip = &lt;&amp;soc_active3&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 2 3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				map3 {</div><div class='add'>+					trip = &lt;&amp;soc_hot&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		board-thermal {</div><div class='hunk'>@@ -103,6 +219,13 @@</div><div class='ctx'> 					type = "active";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			cooling-maps {</div><div class='add'>+				map4 {</div><div class='add'>+					trip = &lt;&amp;board_active&gt;;</div><div class='add'>+					cooling-device = &lt;&amp;pwmfan 3 4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi<br/>index 4e5fa6591623..c5e49709b308 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/sophgo/sg2042.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2042.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2042.dtsi</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;dt-bindings/clock/sophgo,sg2042-pll.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/sophgo,sg2042-rpgate.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-sg2042.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/reset/sophgo,sg2042-reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sg2042-cpus.dtsi"</div><div class='hunk'>@@ -18,6 +19,26 @@</div><div class='ctx'> 	#size-cells = &lt;2&gt;;</div><div class='ctx'> 	dma-noncoherent;</div><div class='ctx'> </div><div class='add'>+	distance-map {</div><div class='add'>+		compatible = "numa-distance-map-v1";</div><div class='add'>+		distance-matrix = &lt;0 0 10&gt;,</div><div class='add'>+				  &lt;0 1 15&gt;,</div><div class='add'>+				  &lt;0 2 25&gt;,</div><div class='add'>+				  &lt;0 3 30&gt;,</div><div class='add'>+				  &lt;1 0 15&gt;,</div><div class='add'>+				  &lt;1 1 10&gt;,</div><div class='add'>+				  &lt;1 2 30&gt;,</div><div class='add'>+				  &lt;1 3 25&gt;,</div><div class='add'>+				  &lt;2 0 25&gt;,</div><div class='add'>+				  &lt;2 1 30&gt;,</div><div class='add'>+				  &lt;2 2 10&gt;,</div><div class='add'>+				  &lt;2 3 15&gt;,</div><div class='add'>+				  &lt;3 0 30&gt;,</div><div class='add'>+				  &lt;3 1 25&gt;,</div><div class='add'>+				  &lt;3 2 15&gt;,</div><div class='add'>+				  &lt;3 3 10&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	aliases {</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -112,7 +133,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -134,7 +155,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -156,7 +177,7 @@</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				snps,nr-gpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -165,6 +186,15 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pwm: pwm@703000c000 {</div><div class='add'>+			compatible = "sophgo,sg2042-pwm";</div><div class='add'>+			reg = &lt;0x70 0x3000c000 0x0 0x20&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkgen GATE_CLK_APB_PWM&gt;;</div><div class='add'>+			clock-names = "apb";</div><div class='add'>+			resets = &lt;&amp;rstgen RST_PWM&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		pllclk: clock-controller@70300100c0 {</div><div class='ctx'> 			compatible = "sophgo,sg2042-pll";</div><div class='ctx'> 			reg = &lt;0x70 0x300100c0 0x0 0x40&gt;;</div><div class='hunk'>@@ -173,6 +203,16 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		msi: msi-controller@7030010304 {</div><div class='add'>+			compatible = "sophgo,sg2042-msi";</div><div class='add'>+			reg = &lt;0x70 0x30010304 0x0 0x4&gt;,</div><div class='add'>+			      &lt;0x70 0x30010300 0x0 0x4&gt;;</div><div class='add'>+			reg-names = "clr", "doorbell";</div><div class='add'>+			msi-controller;</div><div class='add'>+			#msi-cells = &lt;0&gt;;</div><div class='add'>+			msi-ranges = &lt;&amp;intc 64 IRQ_TYPE_EDGE_RISING 32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		rpgate: clock-controller@7030010368 {</div><div class='ctx'> 			compatible = "sophgo,sg2042-rpgate";</div><div class='ctx'> 			reg = &lt;0x70 0x30010368 0x0 0x98&gt;;</div><div class='hunk'>@@ -181,6 +221,11 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		pinctrl: pinctrl@7030011000 {</div><div class='add'>+			compatible = "sophgo,sg2042-pinctrl";</div><div class='add'>+			reg = &lt;0x70 0x30011000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		clkgen: clock-controller@7030012000 {</div><div class='ctx'> 			compatible = "sophgo,sg2042-clkgen";</div><div class='ctx'> 			reg = &lt;0x70 0x30012000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -518,6 +563,93 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		spi0: spi@7040004000 {</div><div class='add'>+			compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x70 0x40004000 0x00 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkgen GATE_CLK_APB_SPI&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			resets = &lt;&amp;rstgen RST_SPI0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@7040005000 {</div><div class='add'>+			compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";</div><div class='add'>+			reg = &lt;0x70 0x40005000 0x00 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkgen GATE_CLK_APB_SPI&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;111 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			num-cs = &lt;2&gt;;</div><div class='add'>+			resets = &lt;&amp;rstgen RST_SPI1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@7040026000 {</div><div class='add'>+			compatible = "sophgo,sg2042-dwmac", "snps,dwmac-5.00a";</div><div class='add'>+			reg = &lt;0x70 0x40026000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clkgen GATE_CLK_AXI_ETH0&gt;,</div><div class='add'>+				 &lt;&amp;clkgen GATE_CLK_PTP_REF_I_ETH0&gt;,</div><div class='add'>+				 &lt;&amp;clkgen GATE_CLK_TX_ETH0&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref", "tx";</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;132 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			resets = &lt;&amp;rstgen RST_ETH0&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			snps,multicast-filter-bins = &lt;0&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;1&gt;;</div><div class='add'>+			snps,aal;</div><div class='add'>+			snps,tso;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac0_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac0_mtl_tx_setup&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac0_stmmac_axi_setup&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+				queue1 {};</div><div class='add'>+				queue2 {};</div><div class='add'>+				queue3 {};</div><div class='add'>+				queue4 {};</div><div class='add'>+				queue5 {};</div><div class='add'>+				queue6 {};</div><div class='add'>+				queue7 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+				queue1 {};</div><div class='add'>+				queue2 {};</div><div class='add'>+				queue3 {};</div><div class='add'>+				queue4 {};</div><div class='add'>+				queue5 {};</div><div class='add'>+				queue6 {};</div><div class='add'>+				queue7 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;1&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		emmc: mmc@704002a000 {</div><div class='ctx'> 			compatible = "sophgo,sg2042-dwcmshc";</div><div class='ctx'> 			reg = &lt;0x70 0x4002a000 0x0 0x1000&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi<br/>new file mode 100644<br/>index 000000000000..523799a1a8b8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi</a></div><div class='hunk'>@@ -0,0 +1,3157 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Inochi Amaoto &lt;inochiama@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		timebase-frequency = &lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu0: cpu@0 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu0_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu1: cpu@1 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu1_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu2: cpu@2 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu2_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu3: cpu@3 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache0&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu3_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu4: cpu@4 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu4_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu5: cpu@5 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu5_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu6: cpu@6 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu6_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu7: cpu@7 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache1&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu7_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu8: cpu@8 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;8&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu8_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu9: cpu@9 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;9&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu9_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu10: cpu@10 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;10&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu10_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu11: cpu@11 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;11&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache2&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu11_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu12: cpu@12 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;12&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu12_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu13: cpu@13 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;13&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu13_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu14: cpu@14 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;14&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu14_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu15: cpu@15 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;15&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache3&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu15_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu16: cpu@16 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;16&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu16_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu17: cpu@17 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;17&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu17_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu18: cpu@18 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;18&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu18_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu19: cpu@19 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;19&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache4&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu19_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu20: cpu@20 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;20&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu20_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu21: cpu@21 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;21&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu21_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu22: cpu@22 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;22&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu22_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu23: cpu@23 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;23&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache5&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu23_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu24: cpu@24 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;24&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu24_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu25: cpu@25 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;25&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu25_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu26: cpu@26 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;26&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu26_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu27: cpu@27 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;27&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache6&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu27_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu28: cpu@28 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;28&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu28_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu29: cpu@29 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;29&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu29_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu30: cpu@30 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;30&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu30_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu31: cpu@31 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;31&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache7&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu31_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu32: cpu@32 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;32&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu32_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu33: cpu@33 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;33&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu33_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu34: cpu@34 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;34&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu34_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu35: cpu@35 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;35&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache8&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu35_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu36: cpu@36 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;36&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu36_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu37: cpu@37 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;37&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu37_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu38: cpu@38 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;38&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu38_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu39: cpu@39 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;39&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache9&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu39_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu40: cpu@40 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;40&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu40_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu41: cpu@41 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;41&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu41_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu42: cpu@42 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;42&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu42_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu43: cpu@43 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;43&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache10&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu43_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu44: cpu@44 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;44&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu44_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu45: cpu@45 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;45&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu45_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu46: cpu@46 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;46&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu46_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu47: cpu@47 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;47&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache11&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu47_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu48: cpu@48 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;48&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu48_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu49: cpu@49 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;49&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu49_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu50: cpu@50 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;50&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu50_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu51: cpu@51 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;51&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache12&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu51_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu52: cpu@52 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;52&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu52_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu53: cpu@53 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;53&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu53_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu54: cpu@54 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;54&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu54_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu55: cpu@55 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;55&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache13&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu55_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu56: cpu@56 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;56&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu56_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu57: cpu@57 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;57&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu57_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu58: cpu@58 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;58&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu58_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu59: cpu@59 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;59&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache14&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu59_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu60: cpu@60 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;60&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu60_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu61: cpu@61 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;61&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu61_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu62: cpu@62 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;62&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu62_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu63: cpu@63 {</div><div class='add'>+			compatible = "thead,c920", "riscv";</div><div class='add'>+			reg = &lt;63&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;65536&gt;;</div><div class='add'>+			i-cache-sets = &lt;512&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;65536&gt;;</div><div class='add'>+			d-cache-sets = &lt;512&gt;;</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			mmu-type = "riscv,sv48";</div><div class='add'>+			next-level-cache = &lt;&amp;l2_cache15&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c",</div><div class='add'>+					       "v", "sscofpmf", "sstc",</div><div class='add'>+					       "svinval", "svnapot", "svpbmt",</div><div class='add'>+					       "zawrs", "zba", "zbb", "zbc",</div><div class='add'>+					       "zbs", "zca", "zcb", "zcd",</div><div class='add'>+					       "zfa", "zfbfmin", "zfh", "zfhmin",</div><div class='add'>+					       "zicbom", "zicbop", "zicboz", "ziccrse",</div><div class='add'>+					       "zicntr", "zicond","zicsr", "zifencei",</div><div class='add'>+					       "zihintntl", "zihintpause", "zihpm",</div><div class='add'>+					       "zvfbfmin", "zvfbfwma", "zvfh",</div><div class='add'>+					       "zvfhmin";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+</div><div class='add'>+			cpu63_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			socket0 {</div><div class='add'>+				cluster0 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu2&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu3&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster1 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu4&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu5&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu6&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu7&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster2 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu8&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu9&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu10&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu11&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster3 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu12&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu13&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu14&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu15&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster4 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu16&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu17&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu18&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu19&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster5 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu20&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu21&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu22&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu23&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster6 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu24&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu25&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu26&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu27&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster7 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu28&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu29&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu30&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu31&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster8 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu32&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu33&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu34&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu35&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster9 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu36&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu37&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu38&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu39&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster10 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu40&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu41&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu42&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu43&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster11 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu44&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu45&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu46&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu47&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster12 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu48&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu49&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu50&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu51&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster13 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu52&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu53&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu54&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu55&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster14 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu56&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu57&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu58&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu59&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				cluster15 {</div><div class='add'>+					core0 {</div><div class='add'>+						cpu = &lt;&amp;cpu60&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core1 {</div><div class='add'>+						cpu = &lt;&amp;cpu61&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core2 {</div><div class='add'>+						cpu = &lt;&amp;cpu62&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					core3 {</div><div class='add'>+						cpu = &lt;&amp;cpu63&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache0: cache-controller-0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache1: cache-controller-1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache2: cache-controller-2 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache3: cache-controller-3 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache4: cache-controller-4 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache5: cache-controller-5 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache6: cache-controller-6 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache7: cache-controller-7 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache8: cache-controller-8 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache9: cache-controller-9 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache10: cache-controller-10 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache11: cache-controller-11 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache12: cache-controller-12 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache13: cache-controller-13 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache14: cache-controller-14 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l2_cache15: cache-controller-15 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;2097152&gt;;</div><div class='add'>+			cache-sets = &lt;2048&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+			next-level-cache = &lt;&amp;l3_cache&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		l3_cache: cache-controller-16 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;67108864&gt;;</div><div class='add'>+			cache-sets = &lt;4096&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "riscv,pmu";</div><div class='add'>+		riscv,event-to-mhpmevent =</div><div class='add'>+			&lt;0x00003 0x00000000 0x00000010&gt;,</div><div class='add'>+			&lt;0x00004 0x00000000 0x00000011&gt;,</div><div class='add'>+			&lt;0x00005 0x00000000 0x00000007&gt;,</div><div class='add'>+			&lt;0x00006 0x00000000 0x00000006&gt;,</div><div class='add'>+			&lt;0x00008 0x00000000 0x00000027&gt;,</div><div class='add'>+			&lt;0x00009 0x00000000 0x00000028&gt;,</div><div class='add'>+			&lt;0x10000 0x00000000 0x0000000c&gt;,</div><div class='add'>+			&lt;0x10001 0x00000000 0x0000000d&gt;,</div><div class='add'>+			&lt;0x10002 0x00000000 0x0000000e&gt;,</div><div class='add'>+			&lt;0x10003 0x00000000 0x0000000f&gt;,</div><div class='add'>+			&lt;0x10008 0x00000000 0x00000001&gt;,</div><div class='add'>+			&lt;0x10009 0x00000000 0x00000002&gt;,</div><div class='add'>+			&lt;0x10010 0x00000000 0x00000010&gt;,</div><div class='add'>+			&lt;0x10011 0x00000000 0x00000011&gt;,</div><div class='add'>+			&lt;0x10012 0x00000000 0x00000012&gt;,</div><div class='add'>+			&lt;0x10013 0x00000000 0x00000013&gt;,</div><div class='add'>+			&lt;0x10019 0x00000000 0x00000004&gt;,</div><div class='add'>+			&lt;0x10021 0x00000000 0x00000003&gt;,</div><div class='add'>+			&lt;0x10030 0x00000000 0x0000001c&gt;,</div><div class='add'>+			&lt;0x10031 0x00000000 0x0000001b&gt;;</div><div class='add'>+		riscv,event-to-mhpmcounters =</div><div class='add'>+			&lt;0x00003 0x00003 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00004 0x00004 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00005 0x00005 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00006 0x00006 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00007 0x00007 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00008 0x00008 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00009 0x00009 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x0000a 0x0000a 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10000 0x10000 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10001 0x10001 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10002 0x10002 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10003 0x10003 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10008 0x10008 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10009 0x10009 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10010 0x10010 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10011 0x10011 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10012 0x10012 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10013 0x10013 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10019 0x10019 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10021 0x10021 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10030 0x10030 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x10031 0x10031 0xfffffff8&gt;;</div><div class='add'>+		riscv,raw-event-to-mhpmcounters =</div><div class='add'>+			&lt;0x00000000 0x00000001 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000002 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000003 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000004 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000005 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000006 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000007 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000008 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000009 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000a 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000b 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000c 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000d 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000e 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000000f 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000010 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000011 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000012 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000013 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000014 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000015 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000016 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000017 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000018 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000019 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001a 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001b 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001c 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001d 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001e 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000001f 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000020 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000021 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000022 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000023 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000024 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000025 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000026 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000027 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000028 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x00000029 0xffffffff 0xffffffff 0xfffffff8&gt;,</div><div class='add'>+			&lt;0x00000000 0x0000002a 0xffffffff 0xffffffff 0xfffffff8&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		intc: interrupt-controller@6d40000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-plic", "thead,c900-plic";</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			reg = &lt;0x6d 0x40000000 0x0 0x4000000&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts-extended =</div><div class='add'>+				&lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu1_intc 11&gt;, &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu2_intc 11&gt;, &lt;&amp;cpu2_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu3_intc 11&gt;, &lt;&amp;cpu3_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu4_intc 11&gt;, &lt;&amp;cpu4_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu5_intc 11&gt;, &lt;&amp;cpu5_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu6_intc 11&gt;, &lt;&amp;cpu6_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu7_intc 11&gt;, &lt;&amp;cpu7_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu8_intc 11&gt;, &lt;&amp;cpu8_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu9_intc 11&gt;, &lt;&amp;cpu9_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu10_intc 11&gt;, &lt;&amp;cpu10_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu11_intc 11&gt;, &lt;&amp;cpu11_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu12_intc 11&gt;, &lt;&amp;cpu12_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu13_intc 11&gt;, &lt;&amp;cpu13_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu14_intc 11&gt;, &lt;&amp;cpu14_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu15_intc 11&gt;, &lt;&amp;cpu15_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu16_intc 11&gt;, &lt;&amp;cpu16_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu17_intc 11&gt;, &lt;&amp;cpu17_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu18_intc 11&gt;, &lt;&amp;cpu18_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu19_intc 11&gt;, &lt;&amp;cpu19_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu20_intc 11&gt;, &lt;&amp;cpu20_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu21_intc 11&gt;, &lt;&amp;cpu21_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu22_intc 11&gt;, &lt;&amp;cpu22_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu23_intc 11&gt;, &lt;&amp;cpu23_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu24_intc 11&gt;, &lt;&amp;cpu24_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu25_intc 11&gt;, &lt;&amp;cpu25_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu26_intc 11&gt;, &lt;&amp;cpu26_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu27_intc 11&gt;, &lt;&amp;cpu27_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu28_intc 11&gt;, &lt;&amp;cpu28_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu29_intc 11&gt;, &lt;&amp;cpu29_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu30_intc 11&gt;, &lt;&amp;cpu30_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu31_intc 11&gt;, &lt;&amp;cpu31_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu32_intc 11&gt;, &lt;&amp;cpu32_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu33_intc 11&gt;, &lt;&amp;cpu33_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu34_intc 11&gt;, &lt;&amp;cpu34_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu35_intc 11&gt;, &lt;&amp;cpu35_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu36_intc 11&gt;, &lt;&amp;cpu36_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu37_intc 11&gt;, &lt;&amp;cpu37_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu38_intc 11&gt;, &lt;&amp;cpu38_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu39_intc 11&gt;, &lt;&amp;cpu39_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu40_intc 11&gt;, &lt;&amp;cpu40_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu41_intc 11&gt;, &lt;&amp;cpu41_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu42_intc 11&gt;, &lt;&amp;cpu42_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu43_intc 11&gt;, &lt;&amp;cpu43_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu44_intc 11&gt;, &lt;&amp;cpu44_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu45_intc 11&gt;, &lt;&amp;cpu45_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu46_intc 11&gt;, &lt;&amp;cpu46_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu47_intc 11&gt;, &lt;&amp;cpu47_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu48_intc 11&gt;, &lt;&amp;cpu48_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu49_intc 11&gt;, &lt;&amp;cpu49_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu50_intc 11&gt;, &lt;&amp;cpu50_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu51_intc 11&gt;, &lt;&amp;cpu51_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu52_intc 11&gt;, &lt;&amp;cpu52_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu53_intc 11&gt;, &lt;&amp;cpu53_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu54_intc 11&gt;, &lt;&amp;cpu54_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu55_intc 11&gt;, &lt;&amp;cpu55_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu56_intc 11&gt;, &lt;&amp;cpu56_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu57_intc 11&gt;, &lt;&amp;cpu57_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu58_intc 11&gt;, &lt;&amp;cpu58_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu59_intc 11&gt;, &lt;&amp;cpu59_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu60_intc 11&gt;, &lt;&amp;cpu60_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu61_intc 11&gt;, &lt;&amp;cpu61_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu62_intc 11&gt;, &lt;&amp;cpu62_intc 9&gt;,</div><div class='add'>+				&lt;&amp;cpu63_intc 11&gt;, &lt;&amp;cpu63_intc 9&gt;;</div><div class='add'>+			riscv,ndev = &lt;863&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aclint_mswi: interrupt-controller@6d44000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-aclint-mswi", "thead,c900-aclint-mswi";</div><div class='add'>+			reg = &lt;0x6d 0x44000000 0x0 0x4000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu4_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu5_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu6_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu7_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu8_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu9_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu10_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu11_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu12_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu13_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu14_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu15_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu16_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu17_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu18_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu19_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu20_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu21_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu22_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu23_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu24_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu25_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu26_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu27_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu28_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu29_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu30_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu31_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu32_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu33_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu34_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu35_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu36_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu37_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu38_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu39_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu40_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu41_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu42_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu43_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu44_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu45_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu46_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu47_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu48_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu49_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu50_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu51_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu52_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu53_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu54_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu55_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu56_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu57_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu58_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu59_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu60_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu61_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu62_intc 3&gt;,</div><div class='add'>+					      &lt;&amp;cpu63_intc 3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aclint_mtimer: timer@6d44004000 {</div><div class='add'>+			compatible = "sophgo,sg2044-aclint-mtimer", "thead,c900-aclint-mtimer";</div><div class='add'>+			reg = &lt;0x6d 0x44004000 0x0 0x8000&gt;;</div><div class='add'>+			reg-names = "mtimecmp";</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu4_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu5_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu6_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu7_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu8_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu9_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu10_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu11_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu12_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu13_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu14_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu15_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu16_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu17_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu18_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu19_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu20_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu21_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu22_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu23_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu24_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu25_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu26_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu27_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu28_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu29_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu30_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu31_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu32_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu33_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu34_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu35_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu36_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu37_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu38_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu39_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu40_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu41_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu42_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu43_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu44_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu45_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu46_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu47_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu48_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu49_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu50_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu51_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu52_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu53_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu54_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu55_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu56_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu57_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu58_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu59_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu60_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu61_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu62_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu63_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aclint_sswi: interrupt-controller@6d4400c000 {</div><div class='add'>+			compatible = "sophgo,sg2044-aclint-sswi", "thead,c900-aclint-sswi";</div><div class='add'>+			reg = &lt;0x6d 0x4400c000 0x0 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;0&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu4_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu5_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu6_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu7_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu8_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu9_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu10_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu11_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu12_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu13_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu14_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu15_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu16_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu17_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu18_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu19_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu20_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu21_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu22_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu23_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu24_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu25_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu26_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu27_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu28_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu29_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu30_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu31_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu32_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu33_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu34_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu35_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu36_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu37_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu38_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu39_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu40_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu41_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu42_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu43_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu44_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu45_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu46_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu47_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu48_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu49_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu50_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu51_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu52_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu53_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu54_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu55_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu56_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu57_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu58_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu59_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu60_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu61_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu62_intc 1&gt;,</div><div class='add'>+					      &lt;&amp;cpu63_intc 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2044-reset.h b/arch/riscv/boot/dts/sophgo/sg2044-reset.h<br/>new file mode 100644<br/>index 000000000000..3a7bbfdb4bae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2044-reset.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2044-reset.h</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Inochi Amaoto &lt;inochiama@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _SG2044_RESET_H</div><div class='add'>+#define _SG2044_RESET_H</div><div class='add'>+</div><div class='add'>+#define RST_AP_SYS			0</div><div class='add'>+#define RST_AP_SYS_CORE0		1</div><div class='add'>+#define RST_AP_SYS_CORE1		2</div><div class='add'>+#define RST_AP_SYS_CORE2		3</div><div class='add'>+#define RST_AP_SYS_CORE3		4</div><div class='add'>+#define RST_AP_PIC			5</div><div class='add'>+#define RST_AP_TDT			6</div><div class='add'>+#define RST_RP_PIC_TDT			7</div><div class='add'>+#define RST_HSDMA			8</div><div class='add'>+#define RST_SYSDMA			9</div><div class='add'>+#define RST_EFUSE0			10</div><div class='add'>+#define RST_EFUSE1			11</div><div class='add'>+#define RST_RTC				12</div><div class='add'>+#define RST_TIMER			13</div><div class='add'>+#define RST_WDT				14</div><div class='add'>+#define RST_AHB_ROM0			15</div><div class='add'>+#define RST_AHB_ROM1			16</div><div class='add'>+#define RST_I2C0			17</div><div class='add'>+#define RST_I2C1			18</div><div class='add'>+#define RST_I2C2			19</div><div class='add'>+#define RST_I2C3			20</div><div class='add'>+#define RST_GPIO0			21</div><div class='add'>+#define RST_GPIO1			22</div><div class='add'>+#define RST_GPIO2			23</div><div class='add'>+#define RST_PWM				24</div><div class='add'>+#define RST_AXI_SRAM0			25</div><div class='add'>+#define RST_AXI_SRAM1			26</div><div class='add'>+#define RST_SPIFMC0			27</div><div class='add'>+#define RST_SPIFMC1			28</div><div class='add'>+#define RST_MAILBOX			29</div><div class='add'>+#define RST_ETH0			30</div><div class='add'>+#define RST_EMMC			31</div><div class='add'>+#define RST_SD				32</div><div class='add'>+#define RST_UART0			33</div><div class='add'>+#define RST_UART1			34</div><div class='add'>+#define RST_UART2			35</div><div class='add'>+#define RST_UART3			36</div><div class='add'>+#define RST_SPI0			37</div><div class='add'>+#define RST_SPI1			38</div><div class='add'>+#define RST_MTLI			39</div><div class='add'>+#define RST_DBG_I2C			40</div><div class='add'>+#define RST_C2C0			41</div><div class='add'>+#define RST_C2C1			42</div><div class='add'>+#define RST_C2C2			43</div><div class='add'>+#define RST_C2C3			44</div><div class='add'>+#define RST_CXP				45</div><div class='add'>+#define RST_DDR0			46</div><div class='add'>+#define RST_DDR1			47</div><div class='add'>+#define RST_DDR2			48</div><div class='add'>+#define RST_DDR3			49</div><div class='add'>+#define RST_DDR4			50</div><div class='add'>+#define RST_DDR5			51</div><div class='add'>+#define RST_DDR6			52</div><div class='add'>+#define RST_DDR7			53</div><div class='add'>+#define RST_DDR8			54</div><div class='add'>+#define RST_DDR9			55</div><div class='add'>+#define RST_DDR10			56</div><div class='add'>+#define RST_DDR11			57</div><div class='add'>+#define RST_DDR12			58</div><div class='add'>+#define RST_DDR13			59</div><div class='add'>+#define RST_DDR14			60</div><div class='add'>+#define RST_DDR15			61</div><div class='add'>+#define RST_BAR				62</div><div class='add'>+#define RST_K2K				63</div><div class='add'>+#define RST_CC_SYS_X1Y1			64</div><div class='add'>+#define RST_CC_SYS_X1Y2			65</div><div class='add'>+#define RST_CC_SYS_X1Y3			66</div><div class='add'>+#define RST_CC_SYS_X1Y4			67</div><div class='add'>+#define RST_CC_SYS_X0Y1			68</div><div class='add'>+#define RST_CC_SYS_X0Y2			69</div><div class='add'>+#define RST_CC_SYS_X0Y3			70</div><div class='add'>+#define RST_CC_SYS_X0Y4			71</div><div class='add'>+#define RST_SC_X1Y1			80</div><div class='add'>+#define RST_SC_X1Y2			81</div><div class='add'>+#define RST_SC_X1Y3			82</div><div class='add'>+#define RST_SC_X1Y4			83</div><div class='add'>+#define RST_SC_X0Y1			84</div><div class='add'>+#define RST_SC_X0Y2			85</div><div class='add'>+#define RST_SC_X0Y3			86</div><div class='add'>+#define RST_SC_X0Y4			87</div><div class='add'>+#define RST_RP_CLUSTER_X1Y1_S0		160</div><div class='add'>+#define RST_RP_CLUSTER_X1Y1_S1		161</div><div class='add'>+#define RST_RP_CLUSTER_X1Y2_S0		162</div><div class='add'>+#define RST_RP_CLUSTER_X1Y2_S1		163</div><div class='add'>+#define RST_RP_CLUSTER_X1Y3_S0		164</div><div class='add'>+#define RST_RP_CLUSTER_X1Y3_S1		165</div><div class='add'>+#define RST_RP_CLUSTER_X1Y4_S0		166</div><div class='add'>+#define RST_RP_CLUSTER_X1Y4_S1		167</div><div class='add'>+#define RST_RP_CLUSTER_X0Y1_W0		168</div><div class='add'>+#define RST_RP_CLUSTER_X0Y1_W1		169</div><div class='add'>+#define RST_RP_CLUSTER_X0Y2_W0		170</div><div class='add'>+#define RST_RP_CLUSTER_X0Y2_W1		171</div><div class='add'>+#define RST_RP_CLUSTER_X0Y3_W0		172</div><div class='add'>+#define RST_RP_CLUSTER_X0Y3_W1		173</div><div class='add'>+#define RST_RP_CLUSTER_X0Y4_W0		174</div><div class='add'>+#define RST_RP_CLUSTER_X0Y4_W1		175</div><div class='add'>+#define RST_TPSYS_X1Y1			180</div><div class='add'>+#define RST_TPSYS_X1Y2			181</div><div class='add'>+#define RST_TPSYS_X1Y3			182</div><div class='add'>+#define RST_TPSYS_X1Y4			183</div><div class='add'>+#define RST_TPSYS_X0Y1			184</div><div class='add'>+#define RST_TPSYS_X0Y2			185</div><div class='add'>+#define RST_TPSYS_X0Y3			186</div><div class='add'>+#define RST_TPSYS_X0Y4			187</div><div class='add'>+#define RST_SPACC			188</div><div class='add'>+#define RST_PKA				189</div><div class='add'>+#define RST_SE_TRNG			190</div><div class='add'>+#define RST_SE_DBG			191</div><div class='add'>+#define RST_SE_FAB_FW			192</div><div class='add'>+#define RST_SE_CTRL			193</div><div class='add'>+#define RST_MAILBOX0			194</div><div class='add'>+#define RST_MAILBOX1			195</div><div class='add'>+#define RST_MAILBOX2			196</div><div class='add'>+#define RST_MAILBOX3			197</div><div class='add'>+#define RST_INTC0			198</div><div class='add'>+#define RST_INTC1			199</div><div class='add'>+#define RST_INTC2			200</div><div class='add'>+#define RST_INTC3			201</div><div class='add'>+</div><div class='add'>+#endif /* _DT_BINDINGS_SG2044_RESET_H */</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts<br/>new file mode 100644<br/>index 000000000000..fed3d9a384a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Inochi Amaoto &lt;inochiama@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "sg2044.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Sophgo SG2044 SRD3-10";</div><div class='add'>+	compatible = "sophgo,srd3-10", "sophgo,sg2044";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+		serial1 = &amp;uart1;</div><div class='add'>+		serial2 = &amp;uart2;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial1:115200n8";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;osc {</div><div class='add'>+	clock-frequency = &lt;25000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-sd;</div><div class='add'>+	non-removable;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio {</div><div class='add'>+		phy0: phy@0 {</div><div class='add'>+			compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			reset-gpios = &lt;&amp;porta 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			reset-assert-us = &lt;10000&gt;;</div><div class='add'>+			reset-deassert-us = &lt;10000&gt;;</div><div class='add'>+			rx-internal-delay-ps = &lt;2050&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mcu: syscon@17 {</div><div class='add'>+		compatible = "sophgo,sg2044-hwmon-mcu", "sophgo,sg2042-hwmon-mcu";</div><div class='add'>+		reg = &lt;0x17&gt;;</div><div class='add'>+		#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;msi {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+	linux,pci-domain = &lt;1&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+	linux,pci-domain = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie2 {</div><div class='add'>+	bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+	linux,pci-domain = &lt;3&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie3 {</div><div class='add'>+	bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+	linux,pci-domain = &lt;2&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie4 {</div><div class='add'>+	bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+	linux,pci-domain = &lt;4&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sd {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	no-sdio;</div><div class='add'>+	no-mmc;</div><div class='add'>+	wp-inverted;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	/* for firmware */</div><div class='add'>+	status = "reserved";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi<br/>new file mode 100644<br/>index 000000000000..320c4d1d08e6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/sophgo/sg2044.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/sophgo/sg2044.dtsi</a></div><div class='hunk'>@@ -0,0 +1,585 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Inochi Amaoto &lt;inochiama@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/sophgo,sg2044-pll.h&gt;</div><div class='add'>+#include &lt;dt-bindings/clock/sophgo,sg2044-clk.h&gt;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/pinctrl-sg2044.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sg2044-cpus.dtsi"</div><div class='add'>+#include "sg2044-reset.h"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "sophgo,sg2044";</div><div class='add'>+</div><div class='add'>+	memory@80000000 {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x80000000 0x00000010 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	osc: oscillator {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-output-names = "osc";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		pcie0: pcie@6c00000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pcie";</div><div class='add'>+			reg = &lt;0x6c 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x00300000 0x0 0x00004000&gt;,</div><div class='add'>+			      &lt;0x48 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x000c0000 0x0 0x00001000&gt;;</div><div class='add'>+			reg-names = "dbi", "atu", "config", "app";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_PCIE_1G&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc0 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc0 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc0 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc0 3&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0  0x00000000  0x48 0x10000000  0x0 0x00200000&gt;,</div><div class='add'>+				 &lt;0x42000000 0x0  0x10000000  0x0  0x10000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0  0x14000000  0x0  0x14000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x43000000 0x4a 0x00000000  0x4a 0x00000000  0x2 0x00000000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x49 0x00000000  0x49 0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc0: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;65 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie1: pcie@6c00400000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pcie";</div><div class='add'>+			reg = &lt;0x6c 0x00400000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x00700000 0x0 0x00004000&gt;,</div><div class='add'>+			      &lt;0x40 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x00780000 0x0 0x00001000&gt;;</div><div class='add'>+			reg-names = "dbi", "atu", "config", "app";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_PCIE_1G&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc1 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc1 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc1 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc1 3&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0  0x00000000  0x40 0x10000000  0x0 0x00200000&gt;,</div><div class='add'>+				 &lt;0x42000000 0x0  0x00000000  0x0  0x00000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0  0x04000000  0x0  0x04000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x43000000 0x42 0x00000000  0x42 0x00000000  0x2 0x00000000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x41 0x00000000  0x41 0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc1: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie2: pcie@6c04000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pcie";</div><div class='add'>+			reg = &lt;0x6c 0x04000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x04300000 0x0 0x00004000&gt;,</div><div class='add'>+			      &lt;0x58 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x040c0000 0x0 0x00001000&gt;;</div><div class='add'>+			reg-names = "dbi", "atu", "config", "app";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_PCIE_1G&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc2 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc2 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc2 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc2 3&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0  0x00000000  0x58 0x10000000  0x0 0x00200000&gt;,</div><div class='add'>+				 &lt;0x42000000 0x0  0x30000000  0x0  0x30000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0  0x34000000  0x0  0x34000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x43000000 0x5a 0x00000000  0x5a 0x00000000  0x2 0x00000000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x59 0x00000000  0x59 0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc2: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;74 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie3: pcie@6c04400000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pcie";</div><div class='add'>+			reg = &lt;0x6c 0x04400000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x04700000 0x0 0x00004000&gt;,</div><div class='add'>+			      &lt;0x50 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x04780000 0x0 0x00001000&gt;;</div><div class='add'>+			reg-names = "dbi", "atu", "config", "app";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_PCIE_1G&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc3 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc3 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc3 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc3 3&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0  0x00000000  0x50 0x10000000  0x0 0x00200000&gt;,</div><div class='add'>+				 &lt;0x42000000 0x0  0x20000000  0x0  0x20000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0  0x24000000  0x0  0x24000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x43000000 0x52 0x00000000  0x52 0x00000000  0x2 0x00000000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x51 0x00000000  0x51 0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc3: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie4: pcie@6c08400000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pcie";</div><div class='add'>+			reg = &lt;0x6c 0x08400000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x08700000 0x0 0x00004000&gt;,</div><div class='add'>+			      &lt;0x60 0x00000000 0x0 0x00001000&gt;,</div><div class='add'>+			      &lt;0x6c 0x08780000 0x0 0x00001000&gt;;</div><div class='add'>+			reg-names = "dbi", "atu", "config", "app";</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_PCIE_1G&gt;;</div><div class='add'>+			clock-names = "core";</div><div class='add'>+			device_type = "pci";</div><div class='add'>+			interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+			interrupt-map = &lt;0 0 0 1 &amp;pcie_intc4 0&gt;,</div><div class='add'>+					&lt;0 0 0 2 &amp;pcie_intc4 1&gt;,</div><div class='add'>+					&lt;0 0 0 3 &amp;pcie_intc4 2&gt;,</div><div class='add'>+					&lt;0 0 0 4 &amp;pcie_intc4 3&gt;;</div><div class='add'>+			msi-parent = &lt;&amp;msi&gt;;</div><div class='add'>+			ranges = &lt;0x01000000 0x0  0x00000000  0x60 0x10000000  0x0 0x00200000&gt;,</div><div class='add'>+				 &lt;0x42000000 0x0  0x40000000  0x0  0x40000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x02000000 0x0  0x44000000  0x0  0x44000000  0x0 0x04000000&gt;,</div><div class='add'>+				 &lt;0x43000000 0x62 0x00000000  0x62 0x00000000  0x2 0x00000000&gt;,</div><div class='add'>+				 &lt;0x03000000 0x61 0x00000000  0x61 0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			pcie_intc4: interrupt-controller {</div><div class='add'>+				#address-cells = &lt;0&gt;;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;125 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		msi: msi-controller@6d50000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-msi";</div><div class='add'>+			reg = &lt;0x6d 0x50000000 0x0 0x800&gt;,</div><div class='add'>+			      &lt;0x0 0x7ee00000 0x0 0x40&gt;;</div><div class='add'>+			reg-names = "clr", "doorbell";</div><div class='add'>+			#msi-cells = &lt;0&gt;;</div><div class='add'>+			msi-controller;</div><div class='add'>+			msi-ranges = &lt;&amp;intc 352 IRQ_TYPE_EDGE_RISING 512&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spifmc0: spi@7001000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-spifmc-nor";</div><div class='add'>+			reg = &lt;0x70 0x01000000 0x0 0x4000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_AHB_SPIFMC&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPIFMC0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spifmc1: spi@7005000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-spifmc-nor";</div><div class='add'>+			reg = &lt;0x70 0x05000000 0x0 0x4000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_AHB_SPIFMC&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;38 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_SPIFMC1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dmac0: dma-controller@7020000000 {</div><div class='add'>+			compatible = "snps,axi-dma-1.01a";</div><div class='add'>+			reg = &lt;0x70 0x20000000 0x0 0x10000&gt;;</div><div class='add'>+			#dma-cells = &lt;1&gt;;</div><div class='add'>+			clock-names = "core-clk", "cfgr-clk";</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_SYSDMA_AXI&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_SYSDMA_AXI&gt;;</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			dma-channels = &lt;8&gt;;</div><div class='add'>+			snps,priority = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='add'>+			snps,block-size = &lt;4096 4096 4096 4096</div><div class='add'>+					   4096 4096 4096 4096&gt;;</div><div class='add'>+			snps,dma-masters = &lt;2&gt;;</div><div class='add'>+			snps,data-width = &lt;2&gt;;</div><div class='add'>+			snps,axi-max-burst-len = &lt;4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart0: serial@7030000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x70 0x30000000 0x0 0x1000&gt;;</div><div class='add'>+			clock-frequency = &lt;500000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_UART_500M&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_APB_UART&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart1: serial@7030001000 {</div><div class='add'>+			compatible = "sophgo,sg2044-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x70 0x30001000 0x0 0x1000&gt;;</div><div class='add'>+			clock-frequency = &lt;500000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_UART_500M&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_APB_UART&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart2: serial@7030002000 {</div><div class='add'>+			compatible = "sophgo,sg2044-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x70 0x30002000 0x0 0x1000&gt;;</div><div class='add'>+			clock-frequency = &lt;500000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_UART_500M&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_APB_UART&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;43 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		uart3: serial@7030003000 {</div><div class='add'>+			compatible = "sophgo,sg2044-uart", "snps,dw-apb-uart";</div><div class='add'>+			reg = &lt;0x70 0x30003000 0x0 0x1000&gt;;</div><div class='add'>+			clock-frequency = &lt;500000000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_UART_500M&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_APB_UART&gt;;</div><div class='add'>+			clock-names = "baudclk", "apb_pclk";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			reg-shift = &lt;2&gt;;</div><div class='add'>+			reg-io-width = &lt;4&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_UART3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@7030006000 {</div><div class='add'>+			compatible = "sophgo,sg2044-dwmac", "snps,dwmac-5.30a";</div><div class='add'>+			reg = &lt;0x70 0x30006000 0x0 0x4000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_AXI_ETH0&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_PTP_REF_I_ETH0&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_TX_ETH0&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "ptp_ref", "tx";</div><div class='add'>+			dma-noncoherent;</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;296 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			resets = &lt;&amp;rst RST_ETH0&gt;;</div><div class='add'>+			reset-names = "stmmaceth";</div><div class='add'>+			snps,multicast-filter-bins = &lt;0&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;1&gt;;</div><div class='add'>+			snps,aal;</div><div class='add'>+			snps,tso;</div><div class='add'>+			snps,txpbl = &lt;32&gt;;</div><div class='add'>+			snps,rxpbl = &lt;32&gt;;</div><div class='add'>+			snps,mtl-rx-config = &lt;&amp;gmac0_mtl_rx_setup&gt;;</div><div class='add'>+			snps,mtl-tx-config = &lt;&amp;gmac0_mtl_tx_setup&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;gmac0_stmmac_axi_setup&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_rx_setup: rx-queues-config {</div><div class='add'>+				snps,rx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				snps,rx-sched-wsp;</div><div class='add'>+				queue0 {};</div><div class='add'>+				queue1 {};</div><div class='add'>+				queue2 {};</div><div class='add'>+				queue3 {};</div><div class='add'>+				queue4 {};</div><div class='add'>+				queue5 {};</div><div class='add'>+				queue6 {};</div><div class='add'>+				queue7 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_mtl_tx_setup: tx-queues-config {</div><div class='add'>+				snps,tx-queues-to-use = &lt;8&gt;;</div><div class='add'>+				queue0 {};</div><div class='add'>+				queue1 {};</div><div class='add'>+				queue2 {};</div><div class='add'>+				queue3 {};</div><div class='add'>+				queue4 {};</div><div class='add'>+				queue5 {};</div><div class='add'>+				queue6 {};</div><div class='add'>+				queue7 {};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gmac0_stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+				snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+				snps,wr_osr_lmt = &lt;1&gt;;</div><div class='add'>+				snps,rd_osr_lmt = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		emmc: mmc@703000a000 {</div><div class='add'>+			compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";</div><div class='add'>+			reg = &lt;0x70 0x3000a000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_AXI_EMMC&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_EMMC_100K&gt;;</div><div class='add'>+			clock-names = "core", "bus", "timer";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;298 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sd: mmc@703000b000 {</div><div class='add'>+			compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";</div><div class='add'>+			reg = &lt;0x70 0x3000b000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_SD&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_AXI_SD&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_SD_100K&gt;;</div><div class='add'>+			clock-names = "core", "bus", "timer";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;300 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c0: i2c@7040005000 {</div><div class='add'>+			compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x70 0x40005000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_I2C&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;31 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c1: i2c@7040006000 {</div><div class='add'>+			compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x70 0x40006000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_I2C&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;32 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c2: i2c@7040007000 {</div><div class='add'>+			compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x70 0x40007000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_I2C&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c3: i2c@7040008000 {</div><div class='add'>+			compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";</div><div class='add'>+			reg = &lt;0x70 0x40008000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clock-frequency = &lt;100000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_I2C&gt;;</div><div class='add'>+			clock-names = "ref";</div><div class='add'>+			interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+			interrupts = &lt;34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			resets = &lt;&amp;rst RST_I2C3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio0: gpio@7040009000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x70 0x40009000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_GPIO&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_GPIO_DB&gt;;</div><div class='add'>+			clock-names = "bus", "db";</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO0&gt;;</div><div class='add'>+</div><div class='add'>+			porta: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;26 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio1: gpio@704000a000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x70 0x4000a000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_GPIO&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_GPIO_DB&gt;;</div><div class='add'>+			clock-names = "bus", "db";</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO1&gt;;</div><div class='add'>+</div><div class='add'>+			portb: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;27 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@704000b000 {</div><div class='add'>+			compatible = "snps,dw-apb-gpio";</div><div class='add'>+			reg = &lt;0x70 0x4000b000 0x0 0x1000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_GPIO&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_GATE_GPIO_DB&gt;;</div><div class='add'>+			clock-names = "bus", "db";</div><div class='add'>+			resets = &lt;&amp;rst RST_GPIO2&gt;;</div><div class='add'>+</div><div class='add'>+			portc: gpio-controller@0 {</div><div class='add'>+				compatible = "snps,dw-apb-gpio-port";</div><div class='add'>+				reg = &lt;0&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				ngpios = &lt;32&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+				interrupts = &lt;28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm: pwm@704000c000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pwm";</div><div class='add'>+			reg = &lt;0x70 0x4000c000 0x0 0x1000&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GATE_APB_PWM&gt;;</div><div class='add'>+			clock-names = "apb";</div><div class='add'>+			resets = &lt;&amp;rst RST_PWM&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon: syscon@7050000000 {</div><div class='add'>+			compatible = "sophgo,sg2044-top-syscon", "syscon";</div><div class='add'>+			reg = &lt;0x70 0x50000000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@7050001000 {</div><div class='add'>+			compatible = "sophgo,sg2044-pinctrl";</div><div class='add'>+			reg = &lt;0x70 0x50001000 0x0 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk: clock-controller@7050002000 {</div><div class='add'>+			compatible = "sophgo,sg2044-clk";</div><div class='add'>+			reg = &lt;0x70 0x50002000 0x0 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon CLK_FPLL0&gt;, &lt;&amp;syscon CLK_FPLL1&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_FPLL2&gt;, &lt;&amp;syscon CLK_DPLL0&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_DPLL1&gt;, &lt;&amp;syscon CLK_DPLL2&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_DPLL3&gt;, &lt;&amp;syscon CLK_DPLL4&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_DPLL5&gt;, &lt;&amp;syscon CLK_DPLL6&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_DPLL7&gt;, &lt;&amp;syscon CLK_MPLL0&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_MPLL1&gt;, &lt;&amp;syscon CLK_MPLL2&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_MPLL3&gt;, &lt;&amp;syscon CLK_MPLL4&gt;,</div><div class='add'>+				 &lt;&amp;syscon CLK_MPLL5&gt;;</div><div class='add'>+			clock-names = "fpll0", "fpll1", "fpll2", "dpll0",</div><div class='add'>+				      "dpll1", "dpll2", "dpll3", "dpll4",</div><div class='add'>+				      "dpll5", "dpll6", "dpll7", "mpll0",</div><div class='add'>+				      "mpll1", "mpll2", "mpll3", "mpll4",</div><div class='add'>+				      "mpll5";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rst: reset-controller@7050003000 {</div><div class='add'>+			compatible = "sophgo,sg2044-reset",</div><div class='add'>+				     "sophgo,sg2042-reset";</div><div class='add'>+			reg = &lt;0x70 0x50003000 0x0 0x1000&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile<br/>new file mode 100644<br/>index 000000000000..152832644870<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-f3.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts<br/>new file mode 100644<br/>index 000000000000..2aaaff77831e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Yangyu Chen &lt;cyy@cyyself.name&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "k1.dtsi"</div><div class='add'>+#include "k1-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Banana Pi BPI-F3";</div><div class='add'>+	compatible = "bananapi,bpi-f3", "spacemit,k1";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "sys-led";</div><div class='add'>+			gpios = &lt;&amp;gpio K1_GPIO(96) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;emmc {</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	mmc-hs400-1_8v;</div><div class='add'>+	mmc-hs400-enhanced-strobe;</div><div class='add'>+	non-removable;</div><div class='add'>+	no-sd;</div><div class='add'>+	no-sdio;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_cfg&gt;;</div><div class='add'>+	rx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio-bus {</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio K1_GPIO(110) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		rgmii0: phy@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_cfg&gt;;</div><div class='add'>+	rx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;250&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio-bus {</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio K1_GPIO(115) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		rgmii1: phy@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pdma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_2_cfg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts<br/>new file mode 100644<br/>index 000000000000..28afd39b28da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Yangyu Chen &lt;cyy@cyyself.name&gt;</div><div class='add'>+ * Copyright (C) 2025 Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "k1.dtsi"</div><div class='add'>+#include "k1-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Milk-V Jupiter (K1)";</div><div class='add'>+	compatible = "milkv,jupiter", "spacemit,k1";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;eth0;</div><div class='add'>+		ethernet1 = &amp;eth1;</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth0 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_cfg&gt;;</div><div class='add'>+	rx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio-bus {</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio K1_GPIO(110) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		rgmii0: phy@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;eth1 {</div><div class='add'>+	phy-handle = &lt;&amp;rgmii1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_cfg&gt;;</div><div class='add'>+	rx-internal-delay-ps = &lt;0&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;250&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	mdio-bus {</div><div class='add'>+		#address-cells = &lt;0x1&gt;;</div><div class='add'>+		#size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+		reset-gpios = &lt;&amp;gpio K1_GPIO(115) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		rgmii1: phy@1 {</div><div class='add'>+			reg = &lt;0x1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pdma {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_2_cfg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts<br/>new file mode 100644<br/>index 000000000000..337240ebb7b7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Yangyu Chen &lt;cyy@cyyself.name&gt;</div><div class='add'>+ * Copyright (C) 2025 Hendrik Hamerlinck &lt;hendrik.hamerlinck@hammernet.be&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+#include "k1.dtsi"</div><div class='add'>+#include "k1-pinctrl.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "OrangePi RV2";</div><div class='add'>+	compatible = "xunlong,orangepi-rv2", "spacemit,k1";</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart0;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		stdout-path = "serial0";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			label = "sys-led";</div><div class='add'>+			gpios = &lt;&amp;gpio K1_GPIO(96) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_2_cfg&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi<br/>new file mode 100644<br/>index 000000000000..aff19c86d5ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 Yixun Lan &lt;dlan@gentoo.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#define K1_PADCONF(pin, func) (((pin) &lt;&lt; 16) | (func))</div><div class='add'>+</div><div class='add'>+/* Map GPIO pin to each bank's &lt;index, offset&gt; */</div><div class='add'>+#define K1_GPIO(x)	(x / 32) (x % 32)</div><div class='add'>+</div><div class='add'>+&amp;pinctrl {</div><div class='add'>+	gmac0_cfg: gmac0-cfg {</div><div class='add'>+		gmac0-pins {</div><div class='add'>+			pinmux = &lt;K1_PADCONF(0, 1)&gt;,	/* gmac0_rxdv */</div><div class='add'>+				 &lt;K1_PADCONF(1, 1)&gt;,	/* gmac0_rx_d0 */</div><div class='add'>+				 &lt;K1_PADCONF(2, 1)&gt;,	/* gmac0_rx_d1 */</div><div class='add'>+				 &lt;K1_PADCONF(3, 1)&gt;,	/* gmac0_rx_clk */</div><div class='add'>+				 &lt;K1_PADCONF(4, 1)&gt;,	/* gmac0_rx_d2 */</div><div class='add'>+				 &lt;K1_PADCONF(5, 1)&gt;,	/* gmac0_rx_d3 */</div><div class='add'>+				 &lt;K1_PADCONF(6, 1)&gt;,	/* gmac0_tx_d0 */</div><div class='add'>+				 &lt;K1_PADCONF(7, 1)&gt;,	/* gmac0_tx_d1 */</div><div class='add'>+				 &lt;K1_PADCONF(8, 1)&gt;,	/* gmac0_tx */</div><div class='add'>+				 &lt;K1_PADCONF(9, 1)&gt;,	/* gmac0_tx_d2 */</div><div class='add'>+				 &lt;K1_PADCONF(10, 1)&gt;,	/* gmac0_tx_d3 */</div><div class='add'>+				 &lt;K1_PADCONF(11, 1)&gt;,	/* gmac0_tx_en */</div><div class='add'>+				 &lt;K1_PADCONF(12, 1)&gt;,	/* gmac0_mdc */</div><div class='add'>+				 &lt;K1_PADCONF(13, 1)&gt;,	/* gmac0_mdio */</div><div class='add'>+				 &lt;K1_PADCONF(14, 1)&gt;,	/* gmac0_int_n */</div><div class='add'>+				 &lt;K1_PADCONF(45, 1)&gt;;	/* gmac0_clk_ref */</div><div class='add'>+</div><div class='add'>+			bias-pull-up = &lt;0&gt;;</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac1_cfg: gmac1-cfg {</div><div class='add'>+		gmac1-pins {</div><div class='add'>+			pinmux = &lt;K1_PADCONF(29, 1)&gt;,	/* gmac1_rxdv */</div><div class='add'>+				 &lt;K1_PADCONF(30, 1)&gt;,	/* gmac1_rx_d0 */</div><div class='add'>+				 &lt;K1_PADCONF(31, 1)&gt;,	/* gmac1_rx_d1 */</div><div class='add'>+				 &lt;K1_PADCONF(32, 1)&gt;,	/* gmac1_rx_clk */</div><div class='add'>+				 &lt;K1_PADCONF(33, 1)&gt;,	/* gmac1_rx_d2 */</div><div class='add'>+				 &lt;K1_PADCONF(34, 1)&gt;,	/* gmac1_rx_d3 */</div><div class='add'>+				 &lt;K1_PADCONF(35, 1)&gt;,	/* gmac1_tx_d0 */</div><div class='add'>+				 &lt;K1_PADCONF(36, 1)&gt;,	/* gmac1_tx_d1 */</div><div class='add'>+				 &lt;K1_PADCONF(37, 1)&gt;,	/* gmac1_tx */</div><div class='add'>+				 &lt;K1_PADCONF(38, 1)&gt;,	/* gmac1_tx_d2 */</div><div class='add'>+				 &lt;K1_PADCONF(39, 1)&gt;,	/* gmac1_tx_d3 */</div><div class='add'>+				 &lt;K1_PADCONF(40, 1)&gt;,	/* gmac1_tx_en */</div><div class='add'>+				 &lt;K1_PADCONF(41, 1)&gt;,	/* gmac1_mdc */</div><div class='add'>+				 &lt;K1_PADCONF(42, 1)&gt;,	/* gmac1_mdio */</div><div class='add'>+				 &lt;K1_PADCONF(43, 1)&gt;,	/* gmac1_int_n */</div><div class='add'>+				 &lt;K1_PADCONF(46, 1)&gt;;	/* gmac1_clk_ref */</div><div class='add'>+</div><div class='add'>+			bias-pull-up = &lt;0&gt;;</div><div class='add'>+			drive-strength = &lt;21&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_2_cfg: uart0-2-cfg {</div><div class='add'>+		uart0-2-pins {</div><div class='add'>+			pinmux = &lt;K1_PADCONF(68, 2)&gt;,</div><div class='add'>+				 &lt;K1_PADCONF(69, 2)&gt;;</div><div class='add'>+</div><div class='add'>+			bias-pull-up = &lt;0&gt;;</div><div class='add'>+			drive-strength = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pwm14_1_cfg: pwm14-1-cfg {</div><div class='add'>+		pwm14-1-pins {</div><div class='add'>+			pinmux = &lt;K1_PADCONF(44, 4)&gt;;</div><div class='add'>+			bias-pull-up = &lt;0&gt;;</div><div class='add'>+			drive-strength = &lt;32&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi<br/>new file mode 100644<br/>index 000000000000..6cdcd80a7c83<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/spacemit/k1.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/spacemit/k1.dtsi</a></div><div class='hunk'>@@ -0,0 +1,870 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 Yangyu Chen &lt;cyy@cyyself.name&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/clock/spacemit,k1-syscon.h&gt;</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;2&gt;;</div><div class='add'>+	model = "SpacemiT K1";</div><div class='add'>+	compatible = "spacemit,k1";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		timebase-frequency = &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+		cpu-map {</div><div class='add'>+			cluster0 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_0&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_1&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_2&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_3&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			cluster1 {</div><div class='add'>+				core0 {</div><div class='add'>+					cpu = &lt;&amp;cpu_4&gt;;</div><div class='add'>+				};</div><div class='add'>+				core1 {</div><div class='add'>+					cpu = &lt;&amp;cpu_5&gt;;</div><div class='add'>+				};</div><div class='add'>+				core2 {</div><div class='add'>+					cpu = &lt;&amp;cpu_6&gt;;</div><div class='add'>+				};</div><div class='add'>+				core3 {</div><div class='add'>+					cpu = &lt;&amp;cpu_7&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_0: cpu@0 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster0_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu0_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_1: cpu@1 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster0_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu1_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_2: cpu@2 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster0_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu2_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_3: cpu@3 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster0_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu3_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_4: cpu@4 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster1_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu4_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_5: cpu@5 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;5&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster1_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu5_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_6: cpu@6 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;6&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster1_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu6_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu_7: cpu@7 {</div><div class='add'>+			compatible = "spacemit,x60", "riscv";</div><div class='add'>+			device_type = "cpu";</div><div class='add'>+			reg = &lt;7&gt;;</div><div class='add'>+			riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";</div><div class='add'>+			riscv,isa-base = "rv64i";</div><div class='add'>+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom",</div><div class='add'>+					       "zicbop", "zicboz", "zicntr", "zicond", "zicsr",</div><div class='add'>+					       "zifencei", "zihintpause", "zihpm", "zfh", "zba",</div><div class='add'>+					       "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt",</div><div class='add'>+					       "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt";</div><div class='add'>+			riscv,cbom-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cbop-block-size = &lt;64&gt;;</div><div class='add'>+			riscv,cboz-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-block-size = &lt;64&gt;;</div><div class='add'>+			i-cache-size = &lt;32768&gt;;</div><div class='add'>+			i-cache-sets = &lt;128&gt;;</div><div class='add'>+			d-cache-block-size = &lt;64&gt;;</div><div class='add'>+			d-cache-size = &lt;32768&gt;;</div><div class='add'>+			d-cache-sets = &lt;128&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;cluster1_l2_cache&gt;;</div><div class='add'>+			mmu-type = "riscv,sv39";</div><div class='add'>+</div><div class='add'>+			cpu7_intc: interrupt-controller {</div><div class='add'>+				compatible = "riscv,cpu-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster0_l2_cache: l2-cache0 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;524288&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cluster1_l2_cache: l2-cache1 {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-block-size = &lt;64&gt;;</div><div class='add'>+			cache-level = &lt;2&gt;;</div><div class='add'>+			cache-size = &lt;524288&gt;;</div><div class='add'>+			cache-sets = &lt;512&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		vctcxo_1m: clock-1m {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;1000000&gt;;</div><div class='add'>+			clock-output-names = "vctcxo_1m";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vctcxo_24m: clock-24m {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;24000000&gt;;</div><div class='add'>+			clock-output-names = "vctcxo_24m";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		vctcxo_3m: clock-3m {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;3000000&gt;;</div><div class='add'>+			clock-output-names = "vctcxo_3m";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		osc_32k: clock-32k {</div><div class='add'>+			compatible = "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;32000&gt;;</div><div class='add'>+			clock-output-names = "osc_32k";</div><div class='add'>+			#clock-cells = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+		#address-cells = &lt;2&gt;;</div><div class='add'>+		#size-cells = &lt;2&gt;;</div><div class='add'>+		dma-noncoherent;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		syscon_rcpu: system-controller@c0880000 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-rcpu";</div><div class='add'>+			reg = &lt;0x0 0xc0880000 0x0 0x2048&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_rcpu2: system-controller@c0888000 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-rcpu2";</div><div class='add'>+			reg = &lt;0x0 0xc0888000 0x0 0x28&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_apbc: system-controller@d4015000 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-apbc";</div><div class='add'>+			reg = &lt;0x0 0xd4015000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;vctcxo_1m&gt;, &lt;&amp;vctcxo_3m&gt;,</div><div class='add'>+				 &lt;&amp;vctcxo_24m&gt;;</div><div class='add'>+			clock-names = "osc", "vctcxo_1m", "vctcxo_3m",</div><div class='add'>+				      "vctcxo_24m";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio: gpio@d4019000 {</div><div class='add'>+			compatible = "spacemit,k1-gpio";</div><div class='add'>+			reg = &lt;0x0 0xd4019000 0x0 0x100&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_GPIO&gt;,</div><div class='add'>+				 &lt;&amp;syscon_apbc CLK_GPIO_BUS&gt;;</div><div class='add'>+			clock-names = "core", "bus";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;3&gt;;</div><div class='add'>+			interrupts = &lt;58&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;3&gt;;</div><div class='add'>+			gpio-ranges = &lt;&amp;pinctrl 0 0 0 32&gt;,</div><div class='add'>+				      &lt;&amp;pinctrl 1 0 32 32&gt;,</div><div class='add'>+				      &lt;&amp;pinctrl 2 0 64 32&gt;,</div><div class='add'>+				      &lt;&amp;pinctrl 3 0 96 32&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm0: pwm@d401a000 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401a000 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM0&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM0&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm1: pwm@d401a400 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401a400 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM1&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm2: pwm@d401a800 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401a800 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM2&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM2&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm3: pwm@d401ac00 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401ac00 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM3&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM3&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm4: pwm@d401b000 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401b000 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM4&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm5: pwm@d401b400 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401b400 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM5&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM5&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm6: pwm@d401b800 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401b800 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM6&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM6&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm7: pwm@d401bc00 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd401bc00 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM7&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM7&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl: pinctrl@d401e000 {</div><div class='add'>+			compatible = "spacemit,k1-pinctrl";</div><div class='add'>+			reg = &lt;0x0 0xd401e000 0x0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_AIB&gt;,</div><div class='add'>+				 &lt;&amp;syscon_apbc CLK_AIB_BUS&gt;;</div><div class='add'>+			clock-names = "func", "bus";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm8: pwm@d4020000 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4020000 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM8&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM8&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm9: pwm@d4020400 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4020400 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM9&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM9&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm10: pwm@d4020800 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4020800 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM10&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm11: pwm@d4020c00 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4020c00 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM11&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM11&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm12: pwm@d4021000 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4021000 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM12&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM12&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm13: pwm@d4021400 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4021400 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM13&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM13&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm14: pwm@d4021800 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4021800 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM14&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM14&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm15: pwm@d4021c00 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4021c00 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM15&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM15&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm16: pwm@d4022000 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4022000 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM16&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM16&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm17: pwm@d4022400 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4022400 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM17&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM17&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm18: pwm@d4022800 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4022800 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM18&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM18&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pwm19: pwm@d4022c00 {</div><div class='add'>+			compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";</div><div class='add'>+			reg = &lt;0x0 0xd4022c00 0x0 0x10&gt;;</div><div class='add'>+			#pwm-cells = &lt;3&gt;;</div><div class='add'>+			clocks = &lt;&amp;syscon_apbc CLK_PWM19&gt;;</div><div class='add'>+			resets = &lt;&amp;syscon_apbc RESET_PWM19&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_mpmu: system-controller@d4050000 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-mpmu";</div><div class='add'>+			reg = &lt;0x0 0xd4050000 0x0 0x209c&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;vctcxo_1m&gt;, &lt;&amp;vctcxo_3m&gt;,</div><div class='add'>+				 &lt;&amp;vctcxo_24m&gt;;</div><div class='add'>+			clock-names = "osc", "vctcxo_1m", "vctcxo_3m",</div><div class='add'>+				      "vctcxo_24m";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pll: clock-controller@d4090000 {</div><div class='add'>+			compatible = "spacemit,k1-pll";</div><div class='add'>+			reg = &lt;0x0 0xd4090000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;vctcxo_24m&gt;;</div><div class='add'>+			spacemit,mpmu = &lt;&amp;syscon_mpmu&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_apmu: system-controller@d4282800 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-apmu";</div><div class='add'>+			reg = &lt;0x0 0xd4282800 0x0 0x400&gt;;</div><div class='add'>+			clocks = &lt;&amp;osc_32k&gt;, &lt;&amp;vctcxo_1m&gt;, &lt;&amp;vctcxo_3m&gt;,</div><div class='add'>+				 &lt;&amp;vctcxo_24m&gt;;</div><div class='add'>+			clock-names = "osc", "vctcxo_1m", "vctcxo_3m",</div><div class='add'>+				      "vctcxo_24m";</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+			#power-domain-cells = &lt;1&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		plic: interrupt-controller@e0000000 {</div><div class='add'>+			compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";</div><div class='add'>+			reg = &lt;0x0 0xe0000000 0x0 0x4000000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 11&gt;, &lt;&amp;cpu0_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 11&gt;, &lt;&amp;cpu1_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 11&gt;, &lt;&amp;cpu2_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 11&gt;, &lt;&amp;cpu3_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu4_intc 11&gt;, &lt;&amp;cpu4_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu5_intc 11&gt;, &lt;&amp;cpu5_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu6_intc 11&gt;, &lt;&amp;cpu6_intc 9&gt;,</div><div class='add'>+					      &lt;&amp;cpu7_intc 11&gt;, &lt;&amp;cpu7_intc 9&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			riscv,ndev = &lt;159&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clint: timer@e4000000 {</div><div class='add'>+			compatible = "spacemit,k1-clint", "sifive,clint0";</div><div class='add'>+			reg = &lt;0x0 0xe4000000 0x0 0x10000&gt;;</div><div class='add'>+			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu1_intc 3&gt;, &lt;&amp;cpu1_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu2_intc 3&gt;, &lt;&amp;cpu2_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu3_intc 3&gt;, &lt;&amp;cpu3_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu4_intc 3&gt;, &lt;&amp;cpu4_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu5_intc 3&gt;, &lt;&amp;cpu5_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu6_intc 3&gt;, &lt;&amp;cpu6_intc 7&gt;,</div><div class='add'>+					      &lt;&amp;cpu7_intc 3&gt;, &lt;&amp;cpu7_intc 7&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		syscon_apbc2: system-controller@f0610000 {</div><div class='add'>+			compatible = "spacemit,k1-syscon-apbc2";</div><div class='add'>+			reg = &lt;0x0 0xf0610000 0x0 0x20&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		camera-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;,</div><div class='add'>+				     &lt;0x0 0x80000000 0x1 0x00000000 0x1 0x80000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;,</div><div class='add'>+				     &lt;0x1 0x00000000 0x1 0x80000000 0x3 0x00000000&gt;;</div><div class='add'>+</div><div class='add'>+			pdma: dma-controller@d4000000 {</div><div class='add'>+				compatible = "spacemit,k1-pdma";</div><div class='add'>+				reg = &lt;0x0 0xd4000000 0x0 0x4000&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apmu CLK_DMA&gt;;</div><div class='add'>+				resets = &lt;&amp;syscon_apmu RESET_DMA&gt;;</div><div class='add'>+				interrupts = &lt;72&gt;;</div><div class='add'>+				dma-channels = &lt;16&gt;;</div><div class='add'>+				#dma-cells= &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart0: serial@d4017000 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017000 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART0&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART0_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART0&gt;;</div><div class='add'>+				interrupts = &lt;42&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@d4017100 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017100 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART2&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART2_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART2&gt;;</div><div class='add'>+				interrupts = &lt;44&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: serial@d4017200 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017200 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART3&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART3_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART3&gt;;</div><div class='add'>+				interrupts = &lt;45&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@d4017300 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017300 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART4&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART4_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART4&gt;;</div><div class='add'>+				interrupts = &lt;46&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@d4017400 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017400 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART5&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART5_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART5&gt;;</div><div class='add'>+				interrupts = &lt;47&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart6: serial@d4017500 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017500 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART6&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART6_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART6&gt;;</div><div class='add'>+				interrupts = &lt;48&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@d4017600 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017600 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART7&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART7_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART7&gt;;</div><div class='add'>+				interrupts = &lt;49&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart8: serial@d4017700 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017700 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART8&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART8_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART8&gt;;</div><div class='add'>+				interrupts = &lt;50&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart9: serial@d4017800 {</div><div class='add'>+				compatible = "spacemit,k1-uart",</div><div class='add'>+					     "intel,xscale-uart";</div><div class='add'>+				reg = &lt;0x0 0xd4017800 0x0 0x100&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apbc CLK_UART9&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apbc CLK_UART9_BUS&gt;;</div><div class='add'>+				clock-names = "core", "bus";</div><div class='add'>+				resets = &lt;&amp;syscon_apbc RESET_UART9&gt;;</div><div class='add'>+				interrupts = &lt;51&gt;;</div><div class='add'>+				reg-shift = &lt;2&gt;;</div><div class='add'>+				reg-io-width = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/* sec_uart1: 0xf0612000, not available from Linux */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		multimedia-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;,</div><div class='add'>+				     &lt;0x0 0x80000000 0x1 0x00000000 0x3 0x80000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		network-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;,</div><div class='add'>+				     &lt;0x0 0x80000000 0x1 0x00000000 0x0 0x80000000&gt;;</div><div class='add'>+</div><div class='add'>+			eth0: ethernet@cac80000 {</div><div class='add'>+				compatible = "spacemit,k1-emac";</div><div class='add'>+				reg = &lt;0x0 0xcac80000 0x0 0x420&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apmu CLK_EMAC0_BUS&gt;;</div><div class='add'>+				interrupts = &lt;131&gt;;</div><div class='add'>+				mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+				resets = &lt;&amp;syscon_apmu RESET_EMAC0&gt;;</div><div class='add'>+				spacemit,apmu = &lt;&amp;syscon_apmu 0x3e4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			eth1: ethernet@cac81000 {</div><div class='add'>+				compatible = "spacemit,k1-emac";</div><div class='add'>+				reg = &lt;0x0 0xcac81000 0x0 0x420&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apmu CLK_EMAC1_BUS&gt;;</div><div class='add'>+				interrupts = &lt;133&gt;;</div><div class='add'>+				mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+				resets = &lt;&amp;syscon_apmu RESET_EMAC1&gt;;</div><div class='add'>+				spacemit,apmu = &lt;&amp;syscon_apmu 0x3ec&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pcie-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;,</div><div class='add'>+				     &lt;0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		storage-bus {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges;</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			dma-ranges = &lt;0x0 0x00000000 0x0 0x00000000 0x0 0x80000000&gt;;</div><div class='add'>+</div><div class='add'>+			emmc: mmc@d4281000 {</div><div class='add'>+				compatible = "spacemit,k1-sdhci";</div><div class='add'>+				reg = &lt;0x0 0xd4281000 0x0 0x200&gt;;</div><div class='add'>+				clocks = &lt;&amp;syscon_apmu CLK_SDH_AXI&gt;,</div><div class='add'>+					 &lt;&amp;syscon_apmu CLK_SDH2&gt;;</div><div class='add'>+				clock-names = "core", "io";</div><div class='add'>+				interrupts = &lt;101&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile<br/>index 7a163a7d6ba3..62b659f89ba7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/Makefile</a></div><div class='hunk'>@@ -8,7 +8,10 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb</div><div class='ctx'> </div><div class='add'>+dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-marscm-emmc.dtb</div><div class='add'>+dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-marscm-lite.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb</div><div class='ctx'> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi<br/>index c7771b3b6475..5dc15e48b74b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-common.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-common.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-common.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-common.dtsi</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> #include "jh7110.dtsi"</div><div class='ctx'> #include "jh7110-pinfunc.h"</div><div class='ctx'> #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+#include &lt;dt-bindings/pinctrl/starfive,jh7110-pinctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	aliases {</div><div class='hunk'>@@ -28,6 +30,7 @@</div><div class='ctx'> 	memory@40000000 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x40000000 0x1 0x0&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-restart {</div><div class='hunk'>@@ -36,6 +39,14 @@</div><div class='ctx'> 		priority = &lt;224&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led_status_power: led-0 {</div><div class='add'>+			gpios = &lt;&amp;aongpio 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pwmdac_codec: audio-codec {</div><div class='ctx'> 		compatible = "linux,spdif-dit";</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='hunk'>@@ -128,7 +139,6 @@</div><div class='ctx'> 	assigned-clocks = &lt;&amp;ispcrg JH7110_ISPCLK_DOM4_APB_FUNC&gt;,</div><div class='ctx'> 			  &lt;&amp;ispcrg JH7110_ISPCLK_MIPI_RX0_PXL&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;49500000&gt;, &lt;198000000&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -151,7 +161,6 @@</div><div class='ctx'> &amp;csi2rx {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;ispcrg JH7110_ISPCLK_VIN_SYS&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;297000000&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	ports {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -176,7 +185,6 @@</div><div class='ctx'> &amp;gmac0 {</div><div class='ctx'> 	phy-handle = &lt;&amp;phy0&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='del'>-	status = "okay";</div><div class='ctx'> </div><div class='ctx'> 	mdio {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -196,7 +204,6 @@</div><div class='ctx'> 	i2c-scl-falling-time-ns = &lt;510&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;i2c0_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c2 {</div><div class='hunk'>@@ -237,7 +244,7 @@</div><div class='ctx'> 				regulator-always-on;</div><div class='ctx'> 				regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'> 				regulator-max-microvolt = &lt;1540000&gt;;</div><div class='del'>-				regulator-name = "vdd-cpu";</div><div class='add'>+				regulator-name = "vdd_cpu";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			emmc_vdd: aldo4 {</div><div class='hunk'>@@ -249,6 +256,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "atmel,24c04";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+		pagesize = &lt;16&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;i2c6 {</div><div class='hunk'>@@ -266,11 +280,11 @@</div><div class='ctx'> 	assigned-clocks = &lt;&amp;syscrg JH7110_SYSCLK_SDIO0_SDCARD&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;50000000&gt;;</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='add'>+	bootph-pre-ram;</div><div class='ctx'> 	cap-mmc-highspeed;</div><div class='ctx'> 	mmc-ddr-1_8v;</div><div class='ctx'> 	mmc-hs200-1_8v;</div><div class='ctx'> 	cap-mmc-hw-reset;</div><div class='del'>-	post-power-on-delay-ms = &lt;200&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc0_pins&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='hunk'>@@ -283,12 +297,10 @@</div><div class='ctx'> 	assigned-clocks = &lt;&amp;syscrg JH7110_SYSCLK_SDIO1_SDCARD&gt;;</div><div class='ctx'> 	assigned-clock-rates = &lt;50000000&gt;;</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='del'>-	no-sdio;</div><div class='del'>-	no-mmc;</div><div class='add'>+	bootph-pre-ram;</div><div class='ctx'> 	cd-gpios = &lt;&amp;sysgpio 41 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	disable-wp;</div><div class='ctx'> 	cap-sd-highspeed;</div><div class='del'>-	post-power-on-delay-ms = &lt;200&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;mmc1_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='hunk'>@@ -311,7 +323,6 @@</div><div class='ctx'> &amp;pwmdac {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwmdac_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;qspi {</div><div class='hunk'>@@ -322,8 +333,9 @@</div><div class='ctx'> 	nor_flash: flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='del'>-		cdns,read-delay = &lt;5&gt;;</div><div class='del'>-		spi-max-frequency = &lt;12000000&gt;;</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+		cdns,read-delay = &lt;2&gt;;</div><div class='add'>+		spi-max-frequency = &lt;100000000&gt;;</div><div class='ctx'> 		cdns,tshsl-ns = &lt;1&gt;;</div><div class='ctx'> 		cdns,tsd2d-ns = &lt;1&gt;;</div><div class='ctx'> 		cdns,tchsh-ns = &lt;1&gt;;</div><div class='hunk'>@@ -350,25 +362,25 @@</div><div class='ctx'> &amp;pwm {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;pwm_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spi0_pins&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-</div><div class='del'>-	spi_dev0: spi@0 {</div><div class='del'>-		compatible = "rohm,dh2228fv";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;10000000&gt;;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;syscrg {</div><div class='del'>-	assigned-clocks = &lt;&amp;syscrg JH7110_SYSCLK_CPU_CORE&gt;,</div><div class='add'>+	assigned-clocks = &lt;&amp;syscrg JH7110_SYSCLK_CPU_ROOT&gt;,</div><div class='add'>+			  &lt;&amp;syscrg JH7110_SYSCLK_BUS_ROOT&gt;,</div><div class='add'>+			  &lt;&amp;syscrg JH7110_SYSCLK_PERH_ROOT&gt;,</div><div class='add'>+			  &lt;&amp;syscrg JH7110_SYSCLK_QSPI_REF&gt;,</div><div class='add'>+			  &lt;&amp;syscrg JH7110_SYSCLK_CPU_CORE&gt;,</div><div class='ctx'> 			  &lt;&amp;pllclk JH7110_PLLCLK_PLL0_OUT&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;500000000&gt;, &lt;1500000000&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;pllclk JH7110_PLLCLK_PLL0_OUT&gt;,</div><div class='add'>+				 &lt;&amp;pllclk JH7110_PLLCLK_PLL2_OUT&gt;,</div><div class='add'>+				 &lt;&amp;pllclk JH7110_PLLCLK_PLL2_OUT&gt;,</div><div class='add'>+				 &lt;&amp;syscrg JH7110_SYSCLK_QSPI_REF_SRC&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;0&gt;, &lt;500000000&gt;, &lt;1500000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;sysgpio {</div><div class='hunk'>@@ -401,6 +413,8 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c5_pins: i2c5-0 {</div><div class='add'>+		bootph-pre-ram;</div><div class='add'>+</div><div class='ctx'> 		i2c-pins {</div><div class='ctx'> 			pinmux = &lt;GPIOMUX(19, GPOUT_LOW,</div><div class='ctx'> 					      GPOEN_SYS_I2C5_CLK,</div><div class='hunk'>@@ -409,6 +423,7 @@</div><div class='ctx'> 					      GPOEN_SYS_I2C5_DATA,</div><div class='ctx'> 					      GPI_SYS_I2C5_DATA)&gt;;</div><div class='ctx'> 			bias-disable; /* external pull-up */</div><div class='add'>+			bootph-pre-ram;</div><div class='ctx'> 			input-enable;</div><div class='ctx'> 			input-schmitt-enable;</div><div class='ctx'> 		};</div><div class='hunk'>@@ -441,16 +456,16 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		mmc-pins {</div><div class='del'>-			pinmux = &lt;PINMUX(64, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(65, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(66, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(67, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(68, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(69, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(70, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(71, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(72, 0)&gt;,</div><div class='del'>-				 &lt;PINMUX(73, 0)&gt;;</div><div class='add'>+			pinmux = &lt;PINMUX(PAD_SD0_CLK, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_CMD, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA0, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA1, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA2, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA3, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA4, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA5, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA6, 0)&gt;,</div><div class='add'>+				 &lt;PINMUX(PAD_SD0_DATA7, 0)&gt;;</div><div class='ctx'> 			bias-pull-up;</div><div class='ctx'> 			drive-strength = &lt;12&gt;;</div><div class='ctx'> 			input-enable;</div><div class='hunk'>@@ -637,16 +652,12 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='add'>+	bootph-pre-ram;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;usb0 {</div><div class='del'>-	dr_mode = "peripheral";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> &amp;U74_1 {</div><div class='ctx'> 	cpu-supply = &lt;&amp;vdd_cpu&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts<br/>new file mode 100644<br/>index 000000000000..f2857d021d68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2024 DeepComputing (HK) Limited</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "jh7110-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "DeepComputing FML13V01";</div><div class='add'>+	compatible = "deepcomputing,fml13v01", "starfive,jh7110";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie1 {</div><div class='add'>+	perst-gpios = &lt;&amp;sysgpio 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	phys = &lt;&amp;pciephy1&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pcie1_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sysgpio {</div><div class='add'>+	pcie1_pins: pcie1-0 {</div><div class='add'>+		clkreq-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(29, GPOUT_LOW,</div><div class='add'>+					      GPOEN_DISABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			bias-pull-down;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wake-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(28, GPOUT_HIGH,</div><div class='add'>+					      GPOEN_DISABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;2&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_pins: usb0-0 {</div><div class='add'>+		vbus-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(25,  GPOUT_SYS_USB_DRIVE_VBUS,</div><div class='add'>+					       GPOEN_ENABLE,</div><div class='add'>+					       GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_cdns3 {</div><div class='add'>+	phys = &lt;&amp;usbphy0&gt;, &lt;&amp;pciephy0&gt;;</div><div class='add'>+	phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts<br/>index 5cb9e99e1dac..fdaf6b4557da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts</a></div><div class='hunk'>@@ -12,9 +12,14 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac0 {</div><div class='del'>-	starfive,tx-use-rgmii-clk;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_TX&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_RMII_RTX&gt;;</div><div class='add'>+	starfive,tx-use-rgmii-clk;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pcie0 {</div><div class='hunk'>@@ -26,12 +31,45 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;phy0 {</div><div class='del'>-	motorcomm,tx-clk-adj-enabled;</div><div class='add'>+	rx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	motorcomm,rx-clk-drv-microamp = &lt;3970&gt;;</div><div class='add'>+	motorcomm,rx-data-drv-microamp = &lt;2910&gt;;</div><div class='ctx'> 	motorcomm,tx-clk-10-inverted;</div><div class='ctx'> 	motorcomm,tx-clk-100-inverted;</div><div class='ctx'> 	motorcomm,tx-clk-1000-inverted;</div><div class='del'>-	motorcomm,rx-clk-drv-microamp = &lt;3970&gt;;</div><div class='del'>-	motorcomm,rx-data-drv-microamp = &lt;2910&gt;;</div><div class='del'>-	rx-internal-delay-ps = &lt;1500&gt;;</div><div class='del'>-	tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	motorcomm,tx-clk-adj-enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwmdac {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sysgpio {</div><div class='add'>+	usb0_pins: usb0-0 {</div><div class='add'>+		vbus-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS,</div><div class='add'>+					      GPOEN_ENABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts<br/>new file mode 100644<br/>index 000000000000..e568537af2c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-emmc.dts</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 E Shattow &lt;e@freeshell.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "jh7110-milkv-marscm.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Milk-V Mars CM";</div><div class='add'>+	compatible = "milkv,marscm-emmc", "starfive,jh7110";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts<br/>new file mode 100644<br/>index 000000000000..6c40d0ec4011<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm-lite.dts</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 E Shattow &lt;e@freeshell.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include "jh7110-milkv-marscm.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Milk-V Mars CM Lite";</div><div class='add'>+	compatible = "milkv,marscm-lite", "starfive,jh7110";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;sysgpio 41 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc0_pins {</div><div class='add'>+	pwren-pins {</div><div class='add'>+		pinmux = &lt;GPIOMUX(22, GPOUT_HIGH,</div><div class='add'>+				      GPOEN_ENABLE,</div><div class='add'>+				      GPI_NONE)&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi<br/>new file mode 100644<br/>index 000000000000..25b70af564ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 E Shattow &lt;e@freeshell.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+#include "jh7110-common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		i2c1 = &amp;i2c1;</div><div class='add'>+		i2c3 = &amp;i2c3;</div><div class='add'>+		i2c4 = &amp;i2c4;</div><div class='add'>+		serial3 = &amp;uart3;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdio_pwrseq: sdio-pwrseq {</div><div class='add'>+		compatible = "mmc-pwrseq-simple";</div><div class='add'>+		reset-gpios = &lt;&amp;sysgpio 33 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	assigned-clocks = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_TX&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_RMII_RTX&gt;;</div><div class='add'>+	starfive,tx-use-rgmii-clk;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c6 {</div><div class='add'>+	status = "disabled";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+	mmc-pwrseq = &lt;&amp;sdio_pwrseq&gt;;</div><div class='add'>+	non-removable;</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	ap6256: wifi@1 {</div><div class='add'>+		compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;sysgpio&gt;;</div><div class='add'>+		interrupts = &lt;34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+		interrupt-names = "host-wake";</div><div class='add'>+		pinctrl-0 = &lt;&amp;wifi_host_wake_irq&gt;;</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pcie0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;phy0 {</div><div class='add'>+	rx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	motorcomm,rx-clk-drv-microamp = &lt;3970&gt;;</div><div class='add'>+	motorcomm,rx-data-drv-microamp = &lt;2910&gt;;</div><div class='add'>+	motorcomm,tx-clk-10-inverted;</div><div class='add'>+	motorcomm,tx-clk-100-inverted;</div><div class='add'>+	motorcomm,tx-clk-1000-inverted;</div><div class='add'>+	motorcomm,tx-clk-adj-enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sysgpio {</div><div class='add'>+	uart1_pins: uart1-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(16, GPOUT_SYS_UART1_TX,</div><div class='add'>+					      GPOEN_ENABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;12&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(17, GPOUT_LOW,</div><div class='add'>+					      GPOEN_DISABLE,</div><div class='add'>+					      GPI_SYS_UART1_RX)&gt;;</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cts-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(3, GPOUT_LOW,</div><div class='add'>+					     GPOEN_DISABLE,</div><div class='add'>+					     GPI_SYS_UART1_CTS)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rts-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(2, GPOUT_SYS_UART1_RTS,</div><div class='add'>+					     GPOEN_ENABLE,</div><div class='add'>+					     GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb0_pins: usb0-0 {</div><div class='add'>+		vbus-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS,</div><div class='add'>+					      GPOEN_ENABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	wifi_host_wake_irq: wifi-host-wake-irq-0 {</div><div class='add'>+		wake-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(34, GPOUT_LOW,</div><div class='add'>+					      GPOEN_DISABLE,</div><div class='add'>+					      GPI_NONE)&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;uart1 {</div><div class='add'>+	uart-has-rtscts;</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart1_pins&gt;;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts<br/>index b720cdd15ed6..31e825be2065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> 	starfive,tx-use-rgmii-clk;</div><div class='ctx'> 	assigned-clocks = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_TX&gt;;</div><div class='ctx'> 	assigned-clock-parents = &lt;&amp;aoncrg JH7110_AONCLK_GMAC0_RMII_RTX&gt;;</div><div class='add'>+	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;gmac1 {</div><div class='hunk'>@@ -39,13 +40,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;phy0 {</div><div class='del'>-	rx-internal-delay-ps = &lt;1900&gt;;</div><div class='del'>-	tx-internal-delay-ps = &lt;1500&gt;;</div><div class='add'>+	rx-internal-delay-ps = &lt;1500&gt;;</div><div class='ctx'> 	motorcomm,rx-clk-drv-microamp = &lt;2910&gt;;</div><div class='ctx'> 	motorcomm,rx-data-drv-microamp = &lt;2910&gt;;</div><div class='ctx'> 	motorcomm,tx-clk-adj-enabled;</div><div class='hunk'>@@ -63,3 +67,41 @@</div><div class='ctx'> 	motorcomm,tx-clk-10-inverted;</div><div class='ctx'> 	motorcomm,tx-clk-100-inverted;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwmdac {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;sysgpio {</div><div class='add'>+	usb0_pins: usb0-0 {</div><div class='add'>+		vbus-pins {</div><div class='add'>+			pinmux = &lt;GPIOMUX(25,  GPOUT_SYS_USB_DRIVE_VBUS,</div><div class='add'>+					       GPOEN_ENABLE,</div><div class='add'>+					       GPI_NONE)&gt;;</div><div class='add'>+			bias-disable;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "host";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb_cdns3 {</div><div class='add'>+	phys = &lt;&amp;usbphy0&gt;, &lt;&amp;pciephy0&gt;;</div><div class='add'>+	phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h<br/>index 256de17f5261..ae49c908e7fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-pinfunc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-pinfunc.h</a></div><div class='hunk'>@@ -89,7 +89,7 @@</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA1			59</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA2			60</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA3			61</div><div class='del'>-#define GPOUT_SYS_SDIO1_DATA4			63</div><div class='add'>+#define GPOUT_SYS_SDIO1_DATA4			62</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA5			63</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA6			64</div><div class='ctx'> #define GPOUT_SYS_SDIO1_DATA7			65</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi<br/>index 18f38fc790a4..5f14afb2c24d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi</a></div><div class='hunk'>@@ -13,6 +13,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;gmac1 {</div><div class='ctx'> 	phy-handle = &lt;&amp;phy1&gt;;</div><div class='ctx'> 	phy-mode = "rgmii-id";</div><div class='hunk'>@@ -29,6 +33,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;i2c0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;mmc0 {</div><div class='ctx'> 	non-removable;</div><div class='ctx'> };</div><div class='hunk'>@@ -40,3 +48,20 @@</div><div class='ctx'> &amp;pcie1 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;pwm {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;pwmdac {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;spi0 {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;usb0 {</div><div class='add'>+	dr_mode = "peripheral";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi<br/>index 0d8339357bad..6e56e9d20bb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/starfive/jh7110.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/starfive/jh7110.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/starfive/jh7110.dtsi</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> 			cpu0_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -68,6 +69,7 @@</div><div class='ctx'> </div><div class='ctx'> 			cpu1_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -101,6 +103,7 @@</div><div class='ctx'> </div><div class='ctx'> 			cpu2_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -134,6 +137,7 @@</div><div class='ctx'> </div><div class='ctx'> 			cpu3_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -167,6 +171,7 @@</div><div class='ctx'> </div><div class='ctx'> 			cpu4_intc: interrupt-controller {</div><div class='ctx'> 				compatible = "riscv,cpu-intc";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -273,12 +278,14 @@</div><div class='ctx'> </div><div class='ctx'> 	gmac1_rgmii_rxin: gmac1-rgmii-rxin-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		clock-output-names = "gmac1_rgmii_rxin";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gmac1_rmii_refin: gmac1-rmii-refin-clock {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		clock-output-names = "gmac1_rmii_refin";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -321,6 +328,7 @@</div><div class='ctx'> </div><div class='ctx'> 	osc: oscillator {</div><div class='ctx'> 		compatible = "fixed-clock";</div><div class='add'>+		bootph-pre-ram;</div><div class='ctx'> 		clock-output-names = "osc";</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -354,6 +362,7 @@</div><div class='ctx'> 		clint: timer@2000000 {</div><div class='ctx'> 			compatible = "starfive,jh7110-clint", "sifive,clint0";</div><div class='ctx'> 			reg = &lt;0x0 0x2000000 0x0 0x10000&gt;;</div><div class='add'>+			bootph-pre-ram;</div><div class='ctx'> 			interrupts-extended = &lt;&amp;cpu0_intc 3&gt;, &lt;&amp;cpu0_intc 7&gt;,</div><div class='ctx'> 					      &lt;&amp;cpu1_intc 3&gt;, &lt;&amp;cpu1_intc 7&gt;,</div><div class='ctx'> 					      &lt;&amp;cpu2_intc 3&gt;, &lt;&amp;cpu2_intc 7&gt;,</div><div class='hunk'>@@ -611,6 +620,8 @@</div><div class='ctx'> 		pciephy0: phy@10210000 {</div><div class='ctx'> 			compatible = "starfive,jh7110-pcie-phy";</div><div class='ctx'> 			reg = &lt;0x0 0x10210000 0x0 0x10000&gt;;</div><div class='add'>+			starfive,sys-syscon = &lt;&amp;sys_syscon 0x18&gt;;</div><div class='add'>+			starfive,stg-syscon = &lt;&amp;stg_syscon 0x148 0x1f4&gt;;</div><div class='ctx'> 			#phy-cells = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -878,6 +889,7 @@</div><div class='ctx'> 		syscrg: clock-controller@13020000 {</div><div class='ctx'> 			compatible = "starfive,jh7110-syscrg";</div><div class='ctx'> 			reg = &lt;0x0 0x13020000 0x0 0x10000&gt;;</div><div class='add'>+			bootph-pre-ram;</div><div class='ctx'> 			clocks = &lt;&amp;osc&gt;, &lt;&amp;gmac1_rmii_refin&gt;,</div><div class='ctx'> 				 &lt;&amp;gmac1_rgmii_rxin&gt;,</div><div class='ctx'> 				 &lt;&amp;i2stx_bclk_ext&gt;, &lt;&amp;i2stx_lrck_ext&gt;,</div><div class='hunk'>@@ -902,6 +914,7 @@</div><div class='ctx'> </div><div class='ctx'> 			pllclk: clock-controller {</div><div class='ctx'> 				compatible = "starfive,jh7110-pll";</div><div class='add'>+				bootph-pre-ram;</div><div class='ctx'> 				clocks = &lt;&amp;osc&gt;;</div><div class='ctx'> 				#clock-cells = &lt;1&gt;;</div><div class='ctx'> 			};</div><div class='hunk'>@@ -929,6 +942,19 @@</div><div class='ctx'> 				 &lt;&amp;syscrg JH7110_SYSRST_WDT_CORE&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		memory-controller@15700000 {</div><div class='add'>+			compatible = "starfive,jh7110-dmc";</div><div class='add'>+			reg = &lt;0x0 0x15700000 0x0 0x10000&gt;,</div><div class='add'>+			      &lt;0x0 0x13000000 0x0 0x10000&gt;;</div><div class='add'>+			bootph-pre-ram;</div><div class='add'>+			clocks = &lt;&amp;syscrg JH7110_PLLCLK_PLL1_OUT&gt;;</div><div class='add'>+			clock-names = "pll";</div><div class='add'>+			resets = &lt;&amp;syscrg JH7110_SYSRST_DDR_AXI&gt;,</div><div class='add'>+				 &lt;&amp;syscrg JH7110_SYSRST_DDR_OSC&gt;,</div><div class='add'>+				 &lt;&amp;syscrg JH7110_SYSRST_DDR_APB&gt;;</div><div class='add'>+			reset-names = "axi", "osc", "apb";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		crypto: crypto@16000000 {</div><div class='ctx'> 			compatible = "starfive,jh7110-crypto";</div><div class='ctx'> 			reg = &lt;0x0 0x16000000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -1022,7 +1048,6 @@</div><div class='ctx'> 			snps,force_thresh_dma_mode;</div><div class='ctx'> 			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='ctx'> 			snps,tso;</div><div class='del'>-			snps,en-tx-lpi-clockgating;</div><div class='ctx'> 			snps,txpbl = &lt;16&gt;;</div><div class='ctx'> 			snps,rxpbl = &lt;16&gt;;</div><div class='ctx'> 			starfive,syscon = &lt;&amp;aon_syscon 0xc 0x12&gt;;</div><div class='hunk'>@@ -1053,7 +1078,6 @@</div><div class='ctx'> 			snps,force_thresh_dma_mode;</div><div class='ctx'> 			snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='ctx'> 			snps,tso;</div><div class='del'>-			snps,en-tx-lpi-clockgating;</div><div class='ctx'> 			snps,txpbl = &lt;16&gt;;</div><div class='ctx'> 			snps,rxpbl = &lt;16&gt;;</div><div class='ctx'> 			starfive,syscon = &lt;&amp;sys_syscon 0x90 0x2&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts<br/>index 497d961456f3..21c33f165ba9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts</a></div><div class='hunk'>@@ -7,16 +7,21 @@</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> </div><div class='ctx'> #include "th1520.dtsi"</div><div class='add'>+#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+#include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "BeagleV Ahead";</div><div class='ctx'> 	compatible = "beagle,beaglev-ahead", "thead,th1520";</div><div class='ctx'> </div><div class='ctx'> 	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='ctx'> 		gpio0 = &amp;gpio0;</div><div class='ctx'> 		gpio1 = &amp;gpio1;</div><div class='ctx'> 		gpio2 = &amp;gpio2;</div><div class='ctx'> 		gpio3 = &amp;gpio3;</div><div class='add'>+		gpio4 = &amp;gpio4;</div><div class='add'>+		gpio5 = &amp;aogpio;</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='ctx'> 		serial2 = &amp;uart2;</div><div class='hunk'>@@ -33,7 +38,42 @@</div><div class='ctx'> 	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0  0x00000000  0x1 0x00000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;led_pins&gt;;</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led-1 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			label = "led1";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-2 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			label = "led2";</div><div class='add'>+		};</div><div class='ctx'> </div><div class='add'>+		led-3 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			label = "led3";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-4 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			label = "led4";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led-5 {</div><div class='add'>+			gpios = &lt;&amp;gpio4 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+			color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+			label = "led5";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +99,137 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_pins&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	phy0: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+		interrupts = &lt;22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		reset-gpios = &lt;&amp;gpio3 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+		reset-delay-us = &lt;10000&gt;;</div><div class='add'>+		reset-post-delay-us = &lt;50000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;padctrl_aosys {</div><div class='add'>+	led_pins: led-0 {</div><div class='add'>+		led-pins {</div><div class='add'>+			pins = "AUDIO_PA8",  /* GPIO4_8 */</div><div class='add'>+			       "AUDIO_PA9",  /* GPIO4_9 */</div><div class='add'>+			       "AUDIO_PA10", /* GPIO4_10 */</div><div class='add'>+			       "AUDIO_PA11", /* GPIO4_11 */</div><div class='add'>+			       "AUDIO_PA12"; /* GPIO4_12 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;3&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;padctrl0_apsys {</div><div class='add'>+	gmac0_pins: gmac0-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "GMAC0_TX_CLK",</div><div class='add'>+			       "GMAC0_TXEN",</div><div class='add'>+			       "GMAC0_TXD0",</div><div class='add'>+			       "GMAC0_TXD1",</div><div class='add'>+			       "GMAC0_TXD2",</div><div class='add'>+			       "GMAC0_TXD3";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;25&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "GMAC0_RX_CLK",</div><div class='add'>+			       "GMAC0_RXDV",</div><div class='add'>+			       "GMAC0_RXD0",</div><div class='add'>+			       "GMAC0_RXD1",</div><div class='add'>+			       "GMAC0_RXD2",</div><div class='add'>+			       "GMAC0_RXD3";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdc-pins {</div><div class='add'>+			pins = "GMAC0_MDC";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;13&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio-pins {</div><div class='add'>+			pins = "GMAC0_MDIO";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;13&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		phy-reset-pins {</div><div class='add'>+			pins = "GMAC0_COL"; /* GPIO3_21 */</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;3&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		phy-interrupt-pins {</div><div class='add'>+			pins = "GMAC0_CRS"; /* GPIO3_22 */</div><div class='add'>+			function = "gpio";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart0_pins: uart0-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "UART0_TXD";</div><div class='add'>+			function = "uart";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;3&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "UART0_RXD";</div><div class='add'>+			function = "uart";</div><div class='add'>+			bias-pull-up;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdio0 {</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	max-frequency = &lt;198000000&gt;;</div><div class='hunk'>@@ -66,9 +237,7 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;uart0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;spi0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi<br/>index 78977bdbbe3d..8e76b63e0100 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi</a></div><div class='hunk'>@@ -11,6 +11,11 @@</div><div class='ctx'> 	model = "Sipeed Lichee Module 4A";</div><div class='ctx'> 	compatible = "sipeed,lichee-module-4a", "thead,th1520";</div><div class='ctx'> </div><div class='add'>+	aliases {</div><div class='add'>+		ethernet0 = &amp;gmac0;</div><div class='add'>+		ethernet1 = &amp;gmac1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	memory@0 {</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x0 0x00000000 0x2 0x00000000&gt;;</div><div class='hunk'>@@ -25,6 +30,12 @@</div><div class='ctx'> 	clock-frequency = &lt;32768&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;aogpio {</div><div class='add'>+	gpio-line-names = "", "", "",</div><div class='add'>+			  "GPIO00",</div><div class='add'>+			  "GPIO04";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;dmac0 {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='hunk'>@@ -39,6 +50,153 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gmac0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac0_pins&gt;, &lt;&amp;mdio0_pins&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gmac1 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;gmac1_pins&gt;;</div><div class='add'>+	phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+	phy-mode = "rgmii-id";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio0 {</div><div class='add'>+	gpio-line-names = "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "", "", "", "",</div><div class='add'>+			  "GPIO07",</div><div class='add'>+			  "GPIO08",</div><div class='add'>+			  "",</div><div class='add'>+			  "GPIO01",</div><div class='add'>+			  "GPIO02";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio1 {</div><div class='add'>+	gpio-line-names = "", "", "",</div><div class='add'>+			  "GPIO11",</div><div class='add'>+			  "GPIO12",</div><div class='add'>+			  "GPIO13",</div><div class='add'>+			  "GPIO14",</div><div class='add'>+			  "", "", "", "", "", "", "", "", "", "",</div><div class='add'>+			  "", "", "", "", "",</div><div class='add'>+			  "GPIO06";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio2 {</div><div class='add'>+	gpio-line-names = "GPIO03",</div><div class='add'>+			  "GPIO05";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpio3 {</div><div class='add'>+	gpio-line-names = "", "",</div><div class='add'>+			  "GPIO09",</div><div class='add'>+			  "GPIO10";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mdio0 {</div><div class='add'>+	phy0: ethernet-phy@1 {</div><div class='add'>+		reg = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	phy1: ethernet-phy@2 {</div><div class='add'>+		reg = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;padctrl0_apsys {</div><div class='add'>+	gmac0_pins: gmac0-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "GMAC0_TX_CLK",</div><div class='add'>+			       "GMAC0_TXEN",</div><div class='add'>+			       "GMAC0_TXD0",</div><div class='add'>+			       "GMAC0_TXD1",</div><div class='add'>+			       "GMAC0_TXD2",</div><div class='add'>+			       "GMAC0_TXD3";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;25&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "GMAC0_RX_CLK",</div><div class='add'>+			       "GMAC0_RXDV",</div><div class='add'>+			       "GMAC0_RXD0",</div><div class='add'>+			       "GMAC0_RXD1",</div><div class='add'>+			       "GMAC0_RXD2",</div><div class='add'>+			       "GMAC0_RXD3";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gmac1_pins: gmac1-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "GPIO2_18", /* GMAC1_TX_CLK */</div><div class='add'>+			       "GPIO2_20", /* GMAC1_TXEN */</div><div class='add'>+			       "GPIO2_21", /* GMAC1_TXD0 */</div><div class='add'>+			       "GPIO2_22", /* GMAC1_TXD1 */</div><div class='add'>+			       "GPIO2_23", /* GMAC1_TXD2 */</div><div class='add'>+			       "GPIO2_24"; /* GMAC1_TXD3 */</div><div class='add'>+			function = "gmac1";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;25&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "GPIO2_19", /* GMAC1_RX_CLK */</div><div class='add'>+			       "GPIO2_25", /* GMAC1_RXDV */</div><div class='add'>+			       "GPIO2_30", /* GMAC1_RXD0 */</div><div class='add'>+			       "GPIO2_31", /* GMAC1_RXD1 */</div><div class='add'>+			       "GPIO3_0",  /* GMAC1_RXD2 */</div><div class='add'>+			       "GPIO3_1";  /* GMAC1_RXD3 */</div><div class='add'>+			function = "gmac1";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mdio0_pins: mdio0-0 {</div><div class='add'>+		mdc-pins {</div><div class='add'>+			pins = "GMAC0_MDC";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;13&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio-pins {</div><div class='add'>+			pins = "GMAC0_MDIO";</div><div class='add'>+			function = "gmac0";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;13&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;sdio0 {</div><div class='ctx'> 	bus-width = &lt;4&gt;;</div><div class='ctx'> 	max-frequency = &lt;198000000&gt;;</div><div class='head'>diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts<br/>index 7738d2895c5a..4020c727f09e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'> 		gpio1 = &amp;gpio1;</div><div class='ctx'> 		gpio2 = &amp;gpio2;</div><div class='ctx'> 		gpio3 = &amp;gpio3;</div><div class='add'>+		gpio4 = &amp;gpio4;</div><div class='add'>+		gpio5 = &amp;aogpio;</div><div class='ctx'> 		serial0 = &amp;uart0;</div><div class='ctx'> 		serial1 = &amp;uart1;</div><div class='ctx'> 		serial2 = &amp;uart2;</div><div class='hunk'>@@ -28,10 +30,32 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;uart0 {</div><div class='del'>-	status = "okay";</div><div class='add'>+&amp;padctrl0_apsys {</div><div class='add'>+	uart0_pins: uart0-0 {</div><div class='add'>+		tx-pins {</div><div class='add'>+			pins = "UART0_TXD";</div><div class='add'>+			function = "uart";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;3&gt;;</div><div class='add'>+			input-disable;</div><div class='add'>+			input-schmitt-disable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rx-pins {</div><div class='add'>+			pins = "UART0_RXD";</div><div class='add'>+			function = "uart";</div><div class='add'>+			bias-disable;</div><div class='add'>+			drive-strength = &lt;1&gt;;</div><div class='add'>+			input-enable;</div><div class='add'>+			input-schmitt-enable;</div><div class='add'>+			slew-rate = &lt;0&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;spi0 {</div><div class='add'>+&amp;uart0 {</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;uart0_pins&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi<br/>index 6992060e6a54..e680d1a7c821 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520.dtsi?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/boot/dts/thead/th1520.dtsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/boot/dts/thead/th1520.dtsi?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/boot/dts/thead/th1520.dtsi</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/clock/thead,th1520-clk-ap.h&gt;</div><div class='add'>+#include &lt;dt-bindings/power/thead,th1520-power.h&gt;</div><div class='add'>+#include &lt;dt-bindings/reset/thead,th1520-reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	compatible = "thead,th1520";</div><div class='hunk'>@@ -216,6 +218,35 @@</div><div class='ctx'> 		#clock-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	aonsys_clk: clock-73728000 {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;73728000&gt;;</div><div class='add'>+		clock-output-names = "aonsys_clk";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpu_mem_clk: mem-clk {</div><div class='add'>+		compatible = "fixed-clock";</div><div class='add'>+		clock-frequency = &lt;0&gt;;</div><div class='add'>+		clock-output-names = "gpu_mem_clk";</div><div class='add'>+		#clock-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	stmmac_axi_config: stmmac-axi-config {</div><div class='add'>+		snps,wr_osr_lmt = &lt;15&gt;;</div><div class='add'>+		snps,rd_osr_lmt = &lt;15&gt;;</div><div class='add'>+		snps,blen = &lt;0 0 64 32 0 0 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	aon: aon {</div><div class='add'>+		compatible = "thead,th1520-aon";</div><div class='add'>+		mboxes = &lt;&amp;mbox_910t 1&gt;;</div><div class='add'>+		mbox-names = "aon";</div><div class='add'>+		resets = &lt;&amp;rst TH1520_RESET_ID_GPU_CLKGEN&gt;;</div><div class='add'>+		reset-names = "gpu-clkgen";</div><div class='add'>+		#power-domain-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	soc {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;plic&gt;;</div><div class='hunk'>@@ -267,6 +298,52 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gmac1: ethernet@ffe7060000 {</div><div class='add'>+			compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";</div><div class='add'>+			reg = &lt;0xff 0xe7060000 0x0 0x2000&gt;, &lt;0xff 0xec004000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dwmac", "apb";</div><div class='add'>+			interrupts = &lt;67 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GMAC_AXI&gt;, &lt;&amp;clk CLK_GMAC1&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_PERISYS_APB4_HCLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "apb";</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;32&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_config&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio1: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: ethernet@ffe7070000 {</div><div class='add'>+			compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";</div><div class='add'>+			reg = &lt;0xff 0xe7070000 0x0 0x2000&gt;, &lt;0xff 0xec003000 0x0 0x1000&gt;;</div><div class='add'>+			reg-names = "dwmac", "apb";</div><div class='add'>+			interrupts = &lt;66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			clocks = &lt;&amp;clk CLK_GMAC_AXI&gt;, &lt;&amp;clk CLK_GMAC0&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_PERISYS_APB4_HCLK&gt;;</div><div class='add'>+			clock-names = "stmmaceth", "pclk", "apb";</div><div class='add'>+			snps,pbl = &lt;32&gt;;</div><div class='add'>+			snps,fixed-burst;</div><div class='add'>+			snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+			snps,perfect-filter-entries = &lt;32&gt;;</div><div class='add'>+			snps,axi-config = &lt;&amp;stmmac_axi_config&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+</div><div class='add'>+			mdio0: mdio {</div><div class='add'>+				compatible = "snps,dwmac-mdio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		emmc: mmc@ffe7080000 {</div><div class='ctx'> 			compatible = "thead,th1520-dwcmshc";</div><div class='ctx'> 			reg = &lt;0xff 0xe7080000 0x0 0x10000&gt;;</div><div class='hunk'>@@ -316,18 +393,20 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio2: gpio@ffe7f34000 {</div><div class='add'>+		gpio@ffe7f34000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xe7f34000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_GPIO2&gt;;</div><div class='add'>+			clock-names = "bus";</div><div class='ctx'> </div><div class='del'>-			portc: gpio-controller@0 {</div><div class='add'>+			gpio2: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 				ngpios = &lt;32&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl0_apsys 0 0 32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -335,18 +414,20 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio3: gpio@ffe7f38000 {</div><div class='add'>+		gpio@ffe7f38000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xe7f38000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_GPIO3&gt;;</div><div class='add'>+			clock-names = "bus";</div><div class='ctx'> </div><div class='del'>-			portd: gpio-controller@0 {</div><div class='add'>+			gpio3: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				ngpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;23&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl0_apsys 0 32 23&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -354,18 +435,27 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio0: gpio@ffec005000 {</div><div class='add'>+		padctrl1_apsys: pinctrl@ffe7f3c000 {</div><div class='add'>+			compatible = "thead,th1520-pinctrl";</div><div class='add'>+			reg = &lt;0xff 0xe7f3c000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_PADCTRL1&gt;;</div><div class='add'>+			thead,pad-group = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio@ffec005000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xec005000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_GPIO0&gt;;</div><div class='add'>+			clock-names = "bus";</div><div class='ctx'> </div><div class='del'>-			porta: gpio-controller@0 {</div><div class='add'>+			gpio0: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 				ngpios = &lt;32&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl1_apsys 0 0 32&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -373,18 +463,20 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		gpio1: gpio@ffec006000 {</div><div class='add'>+		gpio@ffec006000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xec006000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;clk CLK_GPIO1&gt;;</div><div class='add'>+			clock-names = "bus";</div><div class='ctx'> </div><div class='del'>-			portb: gpio-controller@0 {</div><div class='add'>+			gpio1: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				ngpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;31&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl1_apsys 0 32 31&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -392,6 +484,13 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		padctrl0_apsys: pinctrl@ffec007000 {</div><div class='add'>+			compatible = "thead,th1520-pinctrl";</div><div class='add'>+			reg = &lt;0xff 0xec007000 0x0 0x1000&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_PADCTRL0&gt;;</div><div class='add'>+			thead,pad-group = &lt;3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart2: serial@ffec010000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-uart";</div><div class='ctx'> 			reg = &lt;0xff 0xec010000 0x0 0x4000&gt;;</div><div class='hunk'>@@ -410,6 +509,33 @@</div><div class='ctx'> 			#clock-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpu: gpu@ffef400000 {</div><div class='add'>+			compatible = "thead,th1520-gpu", "img,img-bxm-4-64",</div><div class='add'>+				     "img,img-rogue";</div><div class='add'>+			reg = &lt;0xff 0xef400000 0x0 0x100000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+			interrupts = &lt;102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk_vo CLK_GPU_CORE&gt;,</div><div class='add'>+				 &lt;&amp;gpu_mem_clk&gt;,</div><div class='add'>+				 &lt;&amp;clk_vo CLK_GPU_CFG_ACLK&gt;;</div><div class='add'>+			clock-names = "core", "mem", "sys";</div><div class='add'>+			power-domains = &lt;&amp;aon TH1520_GPU_PD&gt;;</div><div class='add'>+			resets = &lt;&amp;rst TH1520_RESET_ID_GPU&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rst: reset-controller@ffef528000 {</div><div class='add'>+			compatible = "thead,th1520-reset";</div><div class='add'>+			reg = &lt;0xff 0xef528000 0x0 0x4f&gt;;</div><div class='add'>+			#reset-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clk_vo: clock-controller@ffef528050 {</div><div class='add'>+			compatible = "thead,th1520-clk-vo";</div><div class='add'>+			reg = &lt;0xff 0xef528050 0x0 0xfb0&gt;;</div><div class='add'>+			clocks = &lt;&amp;clk CLK_VIDEO_PLL&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		dmac0: dma-controller@ffefc00000 {</div><div class='ctx'> 			compatible = "snps,axi-dma-1.01a";</div><div class='ctx'> 			reg = &lt;0xff 0xefc00000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -520,17 +646,34 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ao_gpio0: gpio@fffff41000 {</div><div class='add'>+		mbox_910t: mailbox@ffffc38000 {</div><div class='add'>+			compatible = "thead,th1520-mbox";</div><div class='add'>+			reg = &lt;0xff 0xffc38000 0x0 0x6000&gt;,</div><div class='add'>+			      &lt;0xff 0xffc40000 0x0 0x6000&gt;,</div><div class='add'>+			      &lt;0xff 0xffc4c000 0x0 0x2000&gt;,</div><div class='add'>+			      &lt;0xff 0xffc54000 0x0 0x2000&gt;;</div><div class='add'>+			reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2";</div><div class='add'>+			clocks = &lt;&amp;clk CLK_MBOX0&gt;, &lt;&amp;clk CLK_MBOX1&gt;, &lt;&amp;clk CLK_MBOX2&gt;,</div><div class='add'>+				 &lt;&amp;clk CLK_MBOX3&gt;;</div><div class='add'>+			clock-names = "clk-local", "clk-remote-icu0", "clk-remote-icu1",</div><div class='add'>+				      "clk-remote-icu2";</div><div class='add'>+			interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+			interrupts = &lt;28 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+			#mbox-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio@fffff41000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xfff41000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			porte: gpio-controller@0 {</div><div class='add'>+			aogpio: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				ngpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;16&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl_aosys 0 9 16&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='hunk'>@@ -538,17 +681,36 @@</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		ao_gpio1: gpio@fffff52000 {</div><div class='add'>+		padctrl_aosys: pinctrl@fffff4a000 {</div><div class='add'>+			compatible = "thead,th1520-pinctrl";</div><div class='add'>+			reg = &lt;0xff 0xfff4a000 0x0 0x2000&gt;;</div><div class='add'>+			clocks = &lt;&amp;aonsys_clk&gt;;</div><div class='add'>+			thead,pad-group = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pvt: pvt@fffff4e000 {</div><div class='add'>+			compatible = "moortec,mr75203";</div><div class='add'>+			reg = &lt;0xff 0xfff4e000 0x0 0x80&gt;,</div><div class='add'>+			      &lt;0xff 0xfff4e080 0x0 0x100&gt;,</div><div class='add'>+			      &lt;0xff 0xfff4e180 0x0 0x680&gt;,</div><div class='add'>+			      &lt;0xff 0xfff4e800 0x0 0x600&gt;;</div><div class='add'>+			reg-names = "common", "ts", "pd", "vm";</div><div class='add'>+			clocks = &lt;&amp;aonsys_clk&gt;;</div><div class='add'>+			#thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio@fffff52000 {</div><div class='ctx'> 			compatible = "snps,dw-apb-gpio";</div><div class='ctx'> 			reg = &lt;0xff 0xfff52000 0x0 0x1000&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-			portf: gpio-controller@0 {</div><div class='add'>+			gpio4: gpio-controller@0 {</div><div class='ctx'> 				compatible = "snps,dw-apb-gpio-port";</div><div class='ctx'> 				gpio-controller;</div><div class='ctx'> 				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				ngpios = &lt;32&gt;;</div><div class='add'>+				ngpios = &lt;23&gt;;</div><div class='add'>+				gpio-ranges = &lt;&amp;padctrl_aosys 0 25 22&gt;, &lt;&amp;padctrl_aosys 22 7 1&gt;;</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;2&gt;;</div><div class='head'>diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig<br/>index 2341393cfac1..fc2725cbca18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/configs/defconfig</a></div><div class='hunk'>@@ -10,7 +10,6 @@ CONFIG_MEMCG=y</div><div class='ctx'> CONFIG_BLK_CGROUP=y</div><div class='ctx'> CONFIG_CGROUP_SCHED=y</div><div class='ctx'> CONFIG_CFS_BANDWIDTH=y</div><div class='del'>-CONFIG_RT_GROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUP_PIDS=y</div><div class='ctx'> CONFIG_CGROUP_FREEZER=y</div><div class='ctx'> CONFIG_CGROUP_HUGETLB=y</div><div class='hunk'>@@ -19,17 +18,15 @@ CONFIG_CGROUP_DEVICE=y</div><div class='ctx'> CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_CGROUP_PERF=y</div><div class='ctx'> CONFIG_CGROUP_BPF=y</div><div class='del'>-CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_CHECKPOINT_RESTORE=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='add'>+CONFIG_ARCH_ANDES=y</div><div class='ctx'> CONFIG_ARCH_MICROCHIP=y</div><div class='del'>-CONFIG_ARCH_RENESAS=y</div><div class='ctx'> CONFIG_ARCH_SIFIVE=y</div><div class='ctx'> CONFIG_ARCH_SOPHGO=y</div><div class='add'>+CONFIG_ARCH_SPACEMIT=y</div><div class='ctx'> CONFIG_SOC_STARFIVE=y</div><div class='ctx'> CONFIG_ARCH_SUNXI=y</div><div class='ctx'> CONFIG_ARCH_THEAD=y</div><div class='hunk'>@@ -138,10 +135,13 @@ CONFIG_MACB=y</div><div class='ctx'> CONFIG_E1000E=y</div><div class='ctx'> CONFIG_R8169=y</div><div class='ctx'> CONFIG_STMMAC_ETH=m</div><div class='add'>+CONFIG_DWMAC_THEAD=m</div><div class='ctx'> CONFIG_MICREL_PHY=y</div><div class='ctx'> CONFIG_MICROSEMI_PHY=y</div><div class='ctx'> CONFIG_MOTORCOMM_PHY=y</div><div class='ctx'> CONFIG_INPUT_MOUSEDEV=y</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO=y</div><div class='ctx'> CONFIG_KEYBOARD_SUN4I_LRADC=m</div><div class='ctx'> CONFIG_SERIAL_8250=y</div><div class='ctx'> CONFIG_SERIAL_8250_CONSOLE=y</div><div class='hunk'>@@ -155,7 +155,6 @@ CONFIG_HW_RANDOM_JH7110=m</div><div class='ctx'> CONFIG_I2C=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=m</div><div class='ctx'> CONFIG_I2C_DESIGNWARE_CORE=y</div><div class='del'>-CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='ctx'> CONFIG_I2C_MV64XXX=m</div><div class='ctx'> CONFIG_SPI=y</div><div class='ctx'> CONFIG_SPI_CADENCE_QUADSPI=m</div><div class='hunk'>@@ -163,11 +162,14 @@ CONFIG_SPI_PL022=m</div><div class='ctx'> CONFIG_SPI_SIFIVE=y</div><div class='ctx'> CONFIG_SPI_SUN6I=y</div><div class='ctx'> # CONFIG_PTP_1588_CLOCK is not set</div><div class='add'>+CONFIG_PINCTRL_TH1520=y</div><div class='ctx'> CONFIG_PINCTRL_SOPHGO_CV1800B=y</div><div class='ctx'> CONFIG_PINCTRL_SOPHGO_CV1812H=y</div><div class='ctx'> CONFIG_PINCTRL_SOPHGO_SG2000=y</div><div class='ctx'> CONFIG_PINCTRL_SOPHGO_SG2002=y</div><div class='add'>+CONFIG_GPIO_DWAPB=y</div><div class='ctx'> CONFIG_GPIO_SIFIVE=y</div><div class='add'>+CONFIG_GPIO_SPACEMIT_K1=y</div><div class='ctx'> CONFIG_POWER_RESET_GPIO_RESTART=y</div><div class='ctx'> CONFIG_SENSORS_SFCTEMP=m</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='hunk'>@@ -180,6 +182,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_REGULATOR_AXP20X=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='ctx'> CONFIG_MEDIA_SUPPORT=m</div><div class='add'>+CONFIG_MEDIA_PLATFORM_SUPPORT=y</div><div class='ctx'> CONFIG_VIDEO_CADENCE_CSI2RX=m</div><div class='ctx'> CONFIG_DRM=m</div><div class='ctx'> CONFIG_DRM_RADEON=m</div><div class='hunk'>@@ -191,7 +194,6 @@ CONFIG_SOUND=y</div><div class='ctx'> CONFIG_SND=y</div><div class='ctx'> CONFIG_SND_SOC=y</div><div class='ctx'> CONFIG_SND_DESIGNWARE_I2S=m</div><div class='del'>-CONFIG_SND_SOC_STARFIVE=m</div><div class='ctx'> CONFIG_SND_SOC_JH7110_PWMDAC=m</div><div class='ctx'> CONFIG_SND_SOC_JH7110_TDM=m</div><div class='ctx'> CONFIG_SND_SOC_WM8978=m</div><div class='hunk'>@@ -200,7 +202,6 @@ CONFIG_USB=y</div><div class='ctx'> CONFIG_USB_OTG=y</div><div class='ctx'> CONFIG_USB_XHCI_HCD=y</div><div class='ctx'> CONFIG_USB_XHCI_PLATFORM=y</div><div class='del'>-# CONFIG_USB_XHCI_RCAR is not set</div><div class='ctx'> CONFIG_USB_EHCI_HCD=y</div><div class='ctx'> CONFIG_USB_EHCI_HCD_PLATFORM=y</div><div class='ctx'> CONFIG_USB_OHCI_HCD=y</div><div class='hunk'>@@ -231,6 +232,7 @@ CONFIG_MMC=y</div><div class='ctx'> CONFIG_MMC_SDHCI=y</div><div class='ctx'> CONFIG_MMC_SDHCI_PLTFM=y</div><div class='ctx'> CONFIG_MMC_SDHCI_OF_DWCMSHC=y</div><div class='add'>+CONFIG_MMC_SDHCI_OF_K1=y</div><div class='ctx'> CONFIG_MMC_SDHCI_CADENCE=y</div><div class='ctx'> CONFIG_MMC_SPI=y</div><div class='ctx'> CONFIG_MMC_DW=y</div><div class='hunk'>@@ -241,6 +243,7 @@ CONFIG_RTC_DRV_SUN6I=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_DMA_SUN6I=m</div><div class='ctx'> CONFIG_DW_AXI_DMAC=y</div><div class='add'>+CONFIG_MMP_PDMA=m</div><div class='ctx'> CONFIG_VIRTIO_PCI=y</div><div class='ctx'> CONFIG_VIRTIO_BALLOON=y</div><div class='ctx'> CONFIG_VIRTIO_INPUT=y</div><div class='hunk'>@@ -249,6 +252,8 @@ CONFIG_CLK_SOPHGO_CV1800=y</div><div class='ctx'> CONFIG_CLK_SOPHGO_SG2042_PLL=y</div><div class='ctx'> CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y</div><div class='ctx'> CONFIG_CLK_SOPHGO_SG2042_RPGATE=y</div><div class='add'>+CONFIG_SPACEMIT_CCU=y</div><div class='add'>+CONFIG_SPACEMIT_K1_CCU=y</div><div class='ctx'> CONFIG_SUN8I_DE2_CCU=m</div><div class='ctx'> CONFIG_SUN50I_IOMMU=y</div><div class='ctx'> CONFIG_RPMSG_CHAR=y</div><div class='hunk'>@@ -256,6 +261,9 @@ CONFIG_RPMSG_CTRL=y</div><div class='ctx'> CONFIG_RPMSG_VIRTIO=y</div><div class='ctx'> CONFIG_PM_DEVFREQ=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='add'>+CONFIG_PWM=y</div><div class='add'>+CONFIG_PWM_PXA=m</div><div class='add'>+CONFIG_THEAD_C900_ACLINT_SSWI=y</div><div class='ctx'> CONFIG_PHY_SUN4I_USB=m</div><div class='ctx'> CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m</div><div class='ctx'> CONFIG_PHY_STARFIVE_JH7110_PCIE=m</div><div class='hunk'>@@ -292,26 +300,7 @@ CONFIG_DEFAULT_SECURITY_DAC=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_HASH=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_VIRTIO=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='add'>+CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='del'>-CONFIG_DEBUG_PAGEALLOC=y</div><div class='del'>-CONFIG_SCHED_STACK_END_CHECK=y</div><div class='del'>-CONFIG_DEBUG_VM=y</div><div class='del'>-CONFIG_DEBUG_VM_PGFLAGS=y</div><div class='del'>-CONFIG_DEBUG_MEMORY_INIT=y</div><div class='del'>-CONFIG_DEBUG_PER_CPU_MAPS=y</div><div class='del'>-CONFIG_SOFTLOCKUP_DETECTOR=y</div><div class='del'>-CONFIG_WQ_WATCHDOG=y</div><div class='del'>-CONFIG_DEBUG_TIMEKEEPING=y</div><div class='del'>-CONFIG_DEBUG_RT_MUTEXES=y</div><div class='del'>-CONFIG_DEBUG_SPINLOCK=y</div><div class='del'>-CONFIG_DEBUG_MUTEXES=y</div><div class='del'>-CONFIG_DEBUG_RWSEMS=y</div><div class='del'>-CONFIG_DEBUG_ATOMIC_SLEEP=y</div><div class='del'>-CONFIG_DEBUG_LIST=y</div><div class='del'>-CONFIG_DEBUG_PLIST=y</div><div class='del'>-CONFIG_DEBUG_SG=y</div><div class='del'>-# CONFIG_RCU_TRACE is not set</div><div class='del'>-CONFIG_RCU_EQS_DEBUG=y</div><div class='del'>-# CONFIG_FTRACE is not set</div><div class='ctx'> # CONFIG_RUNTIME_TESTING_MENU is not set</div><div class='ctx'> CONFIG_MEMTEST=y</div><div class='head'>diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig<br/>index 87ff5a1233af..ee18d1e333f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/nommu_k210_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/nommu_k210_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/nommu_k210_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/configs/nommu_k210_defconfig</a></div><div class='hunk'>@@ -35,7 +35,7 @@ CONFIG_NR_CPUS=2</div><div class='ctx'> CONFIG_CMDLINE="earlycon console=ttySIF0"</div><div class='ctx'> CONFIG_CMDLINE_FORCE=y</div><div class='ctx'> CONFIG_BUILTIN_DTB=y</div><div class='del'>-CONFIG_BUILTIN_DTB_SOURCE="canaan/k210_generic"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="canaan/k210_generic"</div><div class='ctx'> # CONFIG_SECCOMP is not set</div><div class='ctx'> # CONFIG_STACKPROTECTOR is not set</div><div class='ctx'> # CONFIG_GCC_PLUGINS is not set</div><div class='head'>diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig<br/>index 95cbd574f291..e770d81b738e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/configs/nommu_k210_sdcard_defconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/configs/nommu_k210_sdcard_defconfig</a></div><div class='hunk'>@@ -27,7 +27,7 @@ CONFIG_NR_CPUS=2</div><div class='ctx'> CONFIG_CMDLINE="earlycon console=ttySIF0 root=/dev/mmcblk0p1 rootwait ro"</div><div class='ctx'> CONFIG_CMDLINE_FORCE=y</div><div class='ctx'> CONFIG_BUILTIN_DTB=y</div><div class='del'>-CONFIG_BUILTIN_DTB_SOURCE="canaan/k210_generic"</div><div class='add'>+CONFIG_BUILTIN_DTB_NAME="canaan/k210_generic"</div><div class='ctx'> # CONFIG_SECCOMP is not set</div><div class='ctx'> # CONFIG_STACKPROTECTOR is not set</div><div class='ctx'> # CONFIG_GCC_PLUGINS is not set</div><div class='head'>diff --git a/arch/riscv/crypto/Kconfig b/arch/riscv/crypto/Kconfig<br/>index ad58dad9a580..a75d6325607b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/Kconfig?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/Kconfig?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/crypto/Kconfig</a></div><div class='hunk'>@@ -18,17 +18,6 @@ config CRYPTO_AES_RISCV64</div><div class='ctx'> 	  - Zvkb vector crypto extension (CTR)</div><div class='ctx'> 	  - Zvkg vector crypto extension (XTS)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA_RISCV64</div><div class='del'>-	tristate "Ciphers: ChaCha"</div><div class='del'>-	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20 stream cipher algorithm</div><div class='del'>-</div><div class='del'>-	  Architecture: riscv64 using:</div><div class='del'>-	  - Zvkb vector crypto extension</div><div class='del'>-</div><div class='ctx'> config CRYPTO_GHASH_RISCV64</div><div class='ctx'> 	tristate "Hash functions: GHASH"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='hunk'>@@ -39,33 +28,11 @@ config CRYPTO_GHASH_RISCV64</div><div class='ctx'> 	  Architecture: riscv64 using:</div><div class='ctx'> 	  - Zvkg vector crypto extension</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_RISCV64</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: riscv64 using:</div><div class='del'>-	  - Zvknha or Zvknhb vector crypto extensions</div><div class='del'>-	  - Zvkb vector crypto extension</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA512_RISCV64</div><div class='del'>-	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='del'>-	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='del'>-	select CRYPTO_SHA512</div><div class='del'>-	help</div><div class='del'>-	  SHA-384 and SHA-512 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: riscv64 using:</div><div class='del'>-	  - Zvknhb vector crypto extension</div><div class='del'>-	  - Zvkb vector crypto extension</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SM3_RISCV64</div><div class='ctx'> 	tristate "Hash functions: SM3 (ShangMi 3)"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/crypto/Makefile b/arch/riscv/crypto/Makefile<br/>index 247c7bc7288c..183495a95cc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/crypto/Makefile</a></div><div class='hunk'>@@ -4,18 +4,9 @@ obj-$(CONFIG_CRYPTO_AES_RISCV64) += aes-riscv64.o</div><div class='ctx'> aes-riscv64-y := aes-riscv64-glue.o aes-riscv64-zvkned.o \</div><div class='ctx'> 		 aes-riscv64-zvkned-zvbb-zvkg.o aes-riscv64-zvkned-zvkb.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA_RISCV64) += chacha-riscv64.o</div><div class='del'>-chacha-riscv64-y := chacha-riscv64-glue.o chacha-riscv64-zvkb.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_RISCV64) += ghash-riscv64.o</div><div class='ctx'> ghash-riscv64-y := ghash-riscv64-glue.o ghash-riscv64-zvkg.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_RISCV64) += sha256-riscv64.o</div><div class='del'>-sha256-riscv64-y := sha256-riscv64-glue.o sha256-riscv64-zvknha_or_zvknhb-zvkb.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA512_RISCV64) += sha512-riscv64.o</div><div class='del'>-sha512-riscv64-y := sha512-riscv64-glue.o sha512-riscv64-zvknhb-zvkb.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SM3_RISCV64) += sm3-riscv64.o</div><div class='ctx'> sm3-riscv64-y := sm3-riscv64-glue.o sm3-riscv64-zvksh-zvkb.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c<br/>deleted file mode 100644<br/>index 10b46f36375a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/chacha-riscv64-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/chacha-riscv64-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,101 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * ChaCha20 using the RISC-V vector crypto extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 SiFive, Inc.</div><div class='del'>- * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/vector.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha20_zvkb(const u32 key[8], const u8 *in, u8 *out,</div><div class='del'>-			      size_t len, const u32 iv[4]);</div><div class='del'>-</div><div class='del'>-static int riscv64_chacha20_crypt(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	u32 iv[CHACHA_IV_SIZE / sizeof(u32)];</div><div class='del'>-	u8 block_buffer[CHACHA_BLOCK_SIZE];</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	unsigned int nbytes;</div><div class='del'>-	unsigned int tail_bytes;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	iv[0] = get_unaligned_le32(req-&gt;iv);</div><div class='del'>-	iv[1] = get_unaligned_le32(req-&gt;iv + 4);</div><div class='del'>-	iv[2] = get_unaligned_le32(req-&gt;iv + 8);</div><div class='del'>-	iv[3] = get_unaligned_le32(req-&gt;iv + 12);</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	while (walk.nbytes) {</div><div class='del'>-		nbytes = walk.nbytes &amp; ~(CHACHA_BLOCK_SIZE - 1);</div><div class='del'>-		tail_bytes = walk.nbytes &amp; (CHACHA_BLOCK_SIZE - 1);</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (nbytes) {</div><div class='del'>-			chacha20_zvkb(ctx-&gt;key, walk.src.virt.addr,</div><div class='del'>-				      walk.dst.virt.addr, nbytes, iv);</div><div class='del'>-			iv[0] += nbytes / CHACHA_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-		if (walk.nbytes == walk.total &amp;&amp; tail_bytes &gt; 0) {</div><div class='del'>-			memcpy(block_buffer, walk.src.virt.addr + nbytes,</div><div class='del'>-			       tail_bytes);</div><div class='del'>-			chacha20_zvkb(ctx-&gt;key, block_buffer, block_buffer,</div><div class='del'>-				      CHACHA_BLOCK_SIZE, iv);</div><div class='del'>-			memcpy(walk.dst.virt.addr + nbytes, block_buffer,</div><div class='del'>-			       tail_bytes);</div><div class='del'>-			tail_bytes = 0;</div><div class='del'>-		}</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, tail_bytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg riscv64_chacha_alg = {</div><div class='del'>-	.setkey = chacha20_setkey,</div><div class='del'>-	.encrypt = riscv64_chacha20_crypt,</div><div class='del'>-	.decrypt = riscv64_chacha20_crypt,</div><div class='del'>-	.min_keysize = CHACHA_KEY_SIZE,</div><div class='del'>-	.max_keysize = CHACHA_KEY_SIZE,</div><div class='del'>-	.ivsize = CHACHA_IV_SIZE,</div><div class='del'>-	.chunksize = CHACHA_BLOCK_SIZE,</div><div class='del'>-	.walksize = 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-	.base = {</div><div class='del'>-		.cra_blocksize = 1,</div><div class='del'>-		.cra_ctxsize = sizeof(struct chacha_ctx),</div><div class='del'>-		.cra_priority = 300,</div><div class='del'>-		.cra_name = "chacha20",</div><div class='del'>-		.cra_driver_name = "chacha20-riscv64-zvkb",</div><div class='del'>-		.cra_module = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init riscv64_chacha_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='del'>-	    riscv_vector_vlen() &gt;= 128)</div><div class='del'>-		return crypto_register_skcipher(&amp;riscv64_chacha_alg);</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit riscv64_chacha_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_skcipher(&amp;riscv64_chacha_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(riscv64_chacha_mod_init);</div><div class='del'>-module_exit(riscv64_chacha_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha20 (RISC-V accelerated)");</div><div class='del'>-MODULE_AUTHOR("Jerry Shih &lt;jerry.shih@sifive.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='head'>diff --git a/arch/riscv/crypto/chacha-riscv64-zvkb.S b/arch/riscv/crypto/chacha-riscv64-zvkb.S<br/>deleted file mode 100644<br/>index bf057737ac69..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/chacha-riscv64-zvkb.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/chacha-riscv64-zvkb.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,294 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */</div><div class='del'>-//</div><div class='del'>-// This file is dual-licensed, meaning that you can use it under your</div><div class='del'>-// choice of either of the following two licenses:</div><div class='del'>-//</div><div class='del'>-// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.</div><div class='del'>-//</div><div class='del'>-// Licensed under the Apache License 2.0 (the "License"). You can obtain</div><div class='del'>-// a copy in the file LICENSE in the source distribution or at</div><div class='del'>-// https://www.openssl.org/source/license.html</div><div class='del'>-//</div><div class='del'>-// or</div><div class='del'>-//</div><div class='del'>-// Copyright (c) 2023, Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>-// Copyright 2024 Google LLC</div><div class='del'>-// All rights reserved.</div><div class='del'>-//</div><div class='del'>-// Redistribution and use in source and binary forms, with or without</div><div class='del'>-// modification, are permitted provided that the following conditions</div><div class='del'>-// are met:</div><div class='del'>-// 1. Redistributions of source code must retain the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer.</div><div class='del'>-// 2. Redistributions in binary form must reproduce the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer in the</div><div class='del'>-//    documentation and/or other materials provided with the distribution.</div><div class='del'>-//</div><div class='del'>-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='del'>-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-</div><div class='del'>-// The generated code of this file depends on the following RISC-V extensions:</div><div class='del'>-// - RV64I</div><div class='del'>-// - RISC-V Vector ('V') with VLEN &gt;= 128</div><div class='del'>-// - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.option arch, +zvkb</div><div class='del'>-</div><div class='del'>-#define KEYP		a0</div><div class='del'>-#define INP		a1</div><div class='del'>-#define OUTP		a2</div><div class='del'>-#define LEN		a3</div><div class='del'>-#define IVP		a4</div><div class='del'>-</div><div class='del'>-#define CONSTS0		a5</div><div class='del'>-#define CONSTS1		a6</div><div class='del'>-#define CONSTS2		a7</div><div class='del'>-#define CONSTS3		t0</div><div class='del'>-#define TMP		t1</div><div class='del'>-#define VL		t2</div><div class='del'>-#define STRIDE		t3</div><div class='del'>-#define NROUNDS		t4</div><div class='del'>-#define KEY0		s0</div><div class='del'>-#define KEY1		s1</div><div class='del'>-#define KEY2		s2</div><div class='del'>-#define KEY3		s3</div><div class='del'>-#define KEY4		s4</div><div class='del'>-#define KEY5		s5</div><div class='del'>-#define KEY6		s6</div><div class='del'>-#define KEY7		s7</div><div class='del'>-#define COUNTER		s8</div><div class='del'>-#define NONCE0		s9</div><div class='del'>-#define NONCE1		s10</div><div class='del'>-#define NONCE2		s11</div><div class='del'>-</div><div class='del'>-.macro	chacha_round	a0, b0, c0, d0,  a1, b1, c1, d1, \</div><div class='del'>-			a2, b2, c2, d2,  a3, b3, c3, d3</div><div class='del'>-	// a += b; d ^= a; d = rol(d, 16);</div><div class='del'>-	vadd.vv		\a0, \a0, \b0</div><div class='del'>-	vadd.vv		\a1, \a1, \b1</div><div class='del'>-	vadd.vv		\a2, \a2, \b2</div><div class='del'>-	vadd.vv		\a3, \a3, \b3</div><div class='del'>-	vxor.vv		\d0, \d0, \a0</div><div class='del'>-	vxor.vv		\d1, \d1, \a1</div><div class='del'>-	vxor.vv		\d2, \d2, \a2</div><div class='del'>-	vxor.vv		\d3, \d3, \a3</div><div class='del'>-	vror.vi		\d0, \d0, 32 - 16</div><div class='del'>-	vror.vi		\d1, \d1, 32 - 16</div><div class='del'>-	vror.vi		\d2, \d2, 32 - 16</div><div class='del'>-	vror.vi		\d3, \d3, 32 - 16</div><div class='del'>-</div><div class='del'>-	// c += d; b ^= c; b = rol(b, 12);</div><div class='del'>-	vadd.vv		\c0, \c0, \d0</div><div class='del'>-	vadd.vv		\c1, \c1, \d1</div><div class='del'>-	vadd.vv		\c2, \c2, \d2</div><div class='del'>-	vadd.vv		\c3, \c3, \d3</div><div class='del'>-	vxor.vv		\b0, \b0, \c0</div><div class='del'>-	vxor.vv		\b1, \b1, \c1</div><div class='del'>-	vxor.vv		\b2, \b2, \c2</div><div class='del'>-	vxor.vv		\b3, \b3, \c3</div><div class='del'>-	vror.vi		\b0, \b0, 32 - 12</div><div class='del'>-	vror.vi		\b1, \b1, 32 - 12</div><div class='del'>-	vror.vi		\b2, \b2, 32 - 12</div><div class='del'>-	vror.vi		\b3, \b3, 32 - 12</div><div class='del'>-</div><div class='del'>-	// a += b; d ^= a; d = rol(d, 8);</div><div class='del'>-	vadd.vv		\a0, \a0, \b0</div><div class='del'>-	vadd.vv		\a1, \a1, \b1</div><div class='del'>-	vadd.vv		\a2, \a2, \b2</div><div class='del'>-	vadd.vv		\a3, \a3, \b3</div><div class='del'>-	vxor.vv		\d0, \d0, \a0</div><div class='del'>-	vxor.vv		\d1, \d1, \a1</div><div class='del'>-	vxor.vv		\d2, \d2, \a2</div><div class='del'>-	vxor.vv		\d3, \d3, \a3</div><div class='del'>-	vror.vi		\d0, \d0, 32 - 8</div><div class='del'>-	vror.vi		\d1, \d1, 32 - 8</div><div class='del'>-	vror.vi		\d2, \d2, 32 - 8</div><div class='del'>-	vror.vi		\d3, \d3, 32 - 8</div><div class='del'>-</div><div class='del'>-	// c += d; b ^= c; b = rol(b, 7);</div><div class='del'>-	vadd.vv		\c0, \c0, \d0</div><div class='del'>-	vadd.vv		\c1, \c1, \d1</div><div class='del'>-	vadd.vv		\c2, \c2, \d2</div><div class='del'>-	vadd.vv		\c3, \c3, \d3</div><div class='del'>-	vxor.vv		\b0, \b0, \c0</div><div class='del'>-	vxor.vv		\b1, \b1, \c1</div><div class='del'>-	vxor.vv		\b2, \b2, \c2</div><div class='del'>-	vxor.vv		\b3, \b3, \c3</div><div class='del'>-	vror.vi		\b0, \b0, 32 - 7</div><div class='del'>-	vror.vi		\b1, \b1, 32 - 7</div><div class='del'>-	vror.vi		\b2, \b2, 32 - 7</div><div class='del'>-	vror.vi		\b3, \b3, 32 - 7</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-// void chacha20_zvkb(const u32 key[8], const u8 *in, u8 *out, size_t len,</div><div class='del'>-//		      const u32 iv[4]);</div><div class='del'>-//</div><div class='del'>-// |len| must be nonzero and a multiple of 64 (CHACHA_BLOCK_SIZE).</div><div class='del'>-// The counter is treated as 32-bit, following the RFC7539 convention.</div><div class='del'>-SYM_FUNC_START(chacha20_zvkb)</div><div class='del'>-	srli		LEN, LEN, 6	// Bytes to blocks</div><div class='del'>-</div><div class='del'>-	addi		sp, sp, -96</div><div class='del'>-	sd		s0, 0(sp)</div><div class='del'>-	sd		s1, 8(sp)</div><div class='del'>-	sd		s2, 16(sp)</div><div class='del'>-	sd		s3, 24(sp)</div><div class='del'>-	sd		s4, 32(sp)</div><div class='del'>-	sd		s5, 40(sp)</div><div class='del'>-	sd		s6, 48(sp)</div><div class='del'>-	sd		s7, 56(sp)</div><div class='del'>-	sd		s8, 64(sp)</div><div class='del'>-	sd		s9, 72(sp)</div><div class='del'>-	sd		s10, 80(sp)</div><div class='del'>-	sd		s11, 88(sp)</div><div class='del'>-</div><div class='del'>-	li		STRIDE, 64</div><div class='del'>-</div><div class='del'>-	// Set up the initial state matrix in scalar registers.</div><div class='del'>-	li		CONSTS0, 0x61707865	// "expa" little endian</div><div class='del'>-	li		CONSTS1, 0x3320646e	// "nd 3" little endian</div><div class='del'>-	li		CONSTS2, 0x79622d32	// "2-by" little endian</div><div class='del'>-	li		CONSTS3, 0x6b206574	// "te k" little endian</div><div class='del'>-	lw		KEY0, 0(KEYP)</div><div class='del'>-	lw		KEY1, 4(KEYP)</div><div class='del'>-	lw		KEY2, 8(KEYP)</div><div class='del'>-	lw		KEY3, 12(KEYP)</div><div class='del'>-	lw		KEY4, 16(KEYP)</div><div class='del'>-	lw		KEY5, 20(KEYP)</div><div class='del'>-	lw		KEY6, 24(KEYP)</div><div class='del'>-	lw		KEY7, 28(KEYP)</div><div class='del'>-	lw		COUNTER, 0(IVP)</div><div class='del'>-	lw		NONCE0, 4(IVP)</div><div class='del'>-	lw		NONCE1, 8(IVP)</div><div class='del'>-	lw		NONCE2, 12(IVP)</div><div class='del'>-</div><div class='del'>-.Lblock_loop:</div><div class='del'>-	// Set vl to the number of blocks to process in this iteration.</div><div class='del'>-	vsetvli		VL, LEN, e32, m1, ta, ma</div><div class='del'>-</div><div class='del'>-	// Set up the initial state matrix for the next VL blocks in v0-v15.</div><div class='del'>-	// v{i} holds the i'th 32-bit word of the state matrix for all blocks.</div><div class='del'>-	// Note that only the counter word, at index 12, differs across blocks.</div><div class='del'>-	vmv.v.x		v0, CONSTS0</div><div class='del'>-	vmv.v.x		v1, CONSTS1</div><div class='del'>-	vmv.v.x		v2, CONSTS2</div><div class='del'>-	vmv.v.x		v3, CONSTS3</div><div class='del'>-	vmv.v.x		v4, KEY0</div><div class='del'>-	vmv.v.x		v5, KEY1</div><div class='del'>-	vmv.v.x		v6, KEY2</div><div class='del'>-	vmv.v.x		v7, KEY3</div><div class='del'>-	vmv.v.x		v8, KEY4</div><div class='del'>-	vmv.v.x		v9, KEY5</div><div class='del'>-	vmv.v.x		v10, KEY6</div><div class='del'>-	vmv.v.x		v11, KEY7</div><div class='del'>-	vid.v		v12</div><div class='del'>-	vadd.vx		v12, v12, COUNTER</div><div class='del'>-	vmv.v.x		v13, NONCE0</div><div class='del'>-	vmv.v.x		v14, NONCE1</div><div class='del'>-	vmv.v.x		v15, NONCE2</div><div class='del'>-</div><div class='del'>-	// Load the first half of the input data for each block into v16-v23.</div><div class='del'>-	// v{16+i} holds the i'th 32-bit word for all blocks.</div><div class='del'>-	vlsseg8e32.v	v16, (INP), STRIDE</div><div class='del'>-</div><div class='del'>-	li		NROUNDS, 20</div><div class='del'>-.Lnext_doubleround:</div><div class='del'>-	addi		NROUNDS, NROUNDS, -2</div><div class='del'>-	// column round</div><div class='del'>-	chacha_round	v0, v4, v8, v12, v1, v5, v9, v13, \</div><div class='del'>-			v2, v6, v10, v14, v3, v7, v11, v15</div><div class='del'>-	// diagonal round</div><div class='del'>-	chacha_round	v0, v5, v10, v15, v1, v6, v11, v12, \</div><div class='del'>-			v2, v7, v8, v13, v3, v4, v9, v14</div><div class='del'>-	bnez		NROUNDS, .Lnext_doubleround</div><div class='del'>-</div><div class='del'>-	// Load the second half of the input data for each block into v24-v31.</div><div class='del'>-	// v{24+i} holds the {8+i}'th 32-bit word for all blocks.</div><div class='del'>-	addi		TMP, INP, 32</div><div class='del'>-	vlsseg8e32.v	v24, (TMP), STRIDE</div><div class='del'>-</div><div class='del'>-	// Finalize the first half of the keystream for each block.</div><div class='del'>-	vadd.vx		v0, v0, CONSTS0</div><div class='del'>-	vadd.vx		v1, v1, CONSTS1</div><div class='del'>-	vadd.vx		v2, v2, CONSTS2</div><div class='del'>-	vadd.vx		v3, v3, CONSTS3</div><div class='del'>-	vadd.vx		v4, v4, KEY0</div><div class='del'>-	vadd.vx		v5, v5, KEY1</div><div class='del'>-	vadd.vx		v6, v6, KEY2</div><div class='del'>-	vadd.vx		v7, v7, KEY3</div><div class='del'>-</div><div class='del'>-	// Encrypt/decrypt the first half of the data for each block.</div><div class='del'>-	vxor.vv		v16, v16, v0</div><div class='del'>-	vxor.vv		v17, v17, v1</div><div class='del'>-	vxor.vv		v18, v18, v2</div><div class='del'>-	vxor.vv		v19, v19, v3</div><div class='del'>-	vxor.vv		v20, v20, v4</div><div class='del'>-	vxor.vv		v21, v21, v5</div><div class='del'>-	vxor.vv		v22, v22, v6</div><div class='del'>-	vxor.vv		v23, v23, v7</div><div class='del'>-</div><div class='del'>-	// Store the first half of the output data for each block.</div><div class='del'>-	vssseg8e32.v	v16, (OUTP), STRIDE</div><div class='del'>-</div><div class='del'>-	// Finalize the second half of the keystream for each block.</div><div class='del'>-	vadd.vx		v8, v8, KEY4</div><div class='del'>-	vadd.vx		v9, v9, KEY5</div><div class='del'>-	vadd.vx		v10, v10, KEY6</div><div class='del'>-	vadd.vx		v11, v11, KEY7</div><div class='del'>-	vid.v		v0</div><div class='del'>-	vadd.vx		v12, v12, COUNTER</div><div class='del'>-	vadd.vx		v13, v13, NONCE0</div><div class='del'>-	vadd.vx		v14, v14, NONCE1</div><div class='del'>-	vadd.vx		v15, v15, NONCE2</div><div class='del'>-	vadd.vv		v12, v12, v0</div><div class='del'>-</div><div class='del'>-	// Encrypt/decrypt the second half of the data for each block.</div><div class='del'>-	vxor.vv		v24, v24, v8</div><div class='del'>-	vxor.vv		v25, v25, v9</div><div class='del'>-	vxor.vv		v26, v26, v10</div><div class='del'>-	vxor.vv		v27, v27, v11</div><div class='del'>-	vxor.vv		v29, v29, v13</div><div class='del'>-	vxor.vv		v28, v28, v12</div><div class='del'>-	vxor.vv		v30, v30, v14</div><div class='del'>-	vxor.vv		v31, v31, v15</div><div class='del'>-</div><div class='del'>-	// Store the second half of the output data for each block.</div><div class='del'>-	addi		TMP, OUTP, 32</div><div class='del'>-	vssseg8e32.v	v24, (TMP), STRIDE</div><div class='del'>-</div><div class='del'>-	// Update the counter, the remaining number of blocks, and the input and</div><div class='del'>-	// output pointers according to the number of blocks processed (VL).</div><div class='del'>-	add		COUNTER, COUNTER, VL</div><div class='del'>-	sub		LEN, LEN, VL</div><div class='del'>-	slli		TMP, VL, 6</div><div class='del'>-	add		OUTP, OUTP, TMP</div><div class='del'>-	add		INP, INP, TMP</div><div class='del'>-	bnez		LEN, .Lblock_loop</div><div class='del'>-</div><div class='del'>-	ld		s0, 0(sp)</div><div class='del'>-	ld		s1, 8(sp)</div><div class='del'>-	ld		s2, 16(sp)</div><div class='del'>-	ld		s3, 24(sp)</div><div class='del'>-	ld		s4, 32(sp)</div><div class='del'>-	ld		s5, 40(sp)</div><div class='del'>-	ld		s6, 48(sp)</div><div class='del'>-	ld		s7, 56(sp)</div><div class='del'>-	ld		s8, 64(sp)</div><div class='del'>-	ld		s9, 72(sp)</div><div class='del'>-	ld		s10, 80(sp)</div><div class='del'>-	ld		s11, 88(sp)</div><div class='del'>-	addi		sp, sp, 96</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(chacha20_zvkb)</div><div class='head'>diff --git a/arch/riscv/crypto/ghash-riscv64-glue.c b/arch/riscv/crypto/ghash-riscv64-glue.c<br/>index 312e7891fd0a..d86073d25387 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/ghash-riscv64-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/ghash-riscv64-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/ghash-riscv64-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/crypto/ghash-riscv64-glue.c</a></div><div class='hunk'>@@ -11,11 +11,16 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;asm/vector.h&gt;</div><div class='add'>+#include &lt;crypto/b128ops.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void ghash_zvkg(be128 *accumulator, const be128 *key, const u8 *data,</div><div class='ctx'> 			   size_t len);</div><div class='hunk'>@@ -26,8 +31,6 @@ struct riscv64_ghash_tfm_ctx {</div><div class='ctx'> </div><div class='ctx'> struct riscv64_ghash_desc_ctx {</div><div class='ctx'> 	be128 accumulator;</div><div class='del'>-	u8 buffer[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int riscv64_ghash_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='hunk'>@@ -78,50 +81,24 @@ static int riscv64_ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> {</div><div class='ctx'> 	const struct riscv64_ghash_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct riscv64_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int len;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		if (dctx-&gt;bytes + srclen &lt; GHASH_BLOCK_SIZE) {</div><div class='del'>-			memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src, srclen);</div><div class='del'>-			dctx-&gt;bytes += srclen;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-		       GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, dctx-&gt;buffer,</div><div class='del'>-				     GHASH_BLOCK_SIZE);</div><div class='del'>-		src += GHASH_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-		srclen -= GHASH_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len = round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='del'>-	if (len) {</div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, src, len);</div><div class='del'>-		src += len;</div><div class='del'>-		srclen -= len;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		memcpy(dctx-&gt;buffer, src, srclen);</div><div class='del'>-		dctx-&gt;bytes = srclen;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	riscv64_ghash_blocks(tctx, dctx, src,</div><div class='add'>+			     round_down(srclen, GHASH_BLOCK_SIZE));</div><div class='add'>+	return srclen - round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int riscv64_ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			       unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	const struct riscv64_ghash_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct riscv64_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		for (i = dctx-&gt;bytes; i &lt; GHASH_BLOCK_SIZE; i++)</div><div class='del'>-			dctx-&gt;buffer[i] = 0;</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, dctx-&gt;buffer,</div><div class='del'>-				     GHASH_BLOCK_SIZE);</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		riscv64_ghash_blocks(tctx, dctx, buf, GHASH_BLOCK_SIZE);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(out, &amp;dctx-&gt;accumulator, GHASH_DIGEST_SIZE);</div><div class='hunk'>@@ -131,7 +108,7 @@ static int riscv64_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> static struct shash_alg riscv64_ghash_alg = {</div><div class='ctx'> 	.init = riscv64_ghash_init,</div><div class='ctx'> 	.update = riscv64_ghash_update,</div><div class='del'>-	.final = riscv64_ghash_final,</div><div class='add'>+	.finup = riscv64_ghash_finup,</div><div class='ctx'> 	.setkey = riscv64_ghash_setkey,</div><div class='ctx'> 	.descsize = sizeof(struct riscv64_ghash_desc_ctx),</div><div class='ctx'> 	.digestsize = GHASH_DIGEST_SIZE,</div><div class='hunk'>@@ -139,6 +116,7 @@ static struct shash_alg riscv64_ghash_alg = {</div><div class='ctx'> 		.cra_blocksize = GHASH_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize = sizeof(struct riscv64_ghash_tfm_ctx),</div><div class='ctx'> 		.cra_priority = 300,</div><div class='add'>+		.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_name = "ghash",</div><div class='ctx'> 		.cra_driver_name = "ghash-riscv64-zvkg",</div><div class='ctx'> 		.cra_module = THIS_MODULE,</div><div class='head'>diff --git a/arch/riscv/crypto/sha256-riscv64-glue.c b/arch/riscv/crypto/sha256-riscv64-glue.c<br/>deleted file mode 100644<br/>index 71e051e40a64..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sha256-riscv64-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha256-riscv64-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * SHA-256 and SHA-224 using the RISC-V vector crypto extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2022 VRULL GmbH</div><div class='del'>- * Author: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 SiFive, Inc.</div><div class='del'>- * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/vector.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note: the asm function only uses the 'state' field of struct sha256_state.</div><div class='del'>- * It is assumed to be the first field.</div><div class='del'>- */</div><div class='del'>-asmlinkage void sha256_transform_zvknha_or_zvknhb_zvkb(</div><div class='del'>-	struct sha256_state *state, const u8 *data, int num_blocks);</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure struct sha256_state begins directly with the SHA-256</div><div class='del'>-	 * 256-bit internal state, as this is what the asm function expects.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-	} else {</div><div class='del'>-		crypto_sha256_update(desc, data, len);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(</div><div class='del'>-				desc, data, len,</div><div class='del'>-				sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		sha256_base_do_finalize(</div><div class='del'>-			desc, sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crypto_sha256_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return riscv64_sha256_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       riscv64_sha256_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg riscv64_sha256_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.init = sha256_base_init,</div><div class='del'>-		.update = riscv64_sha256_update,</div><div class='del'>-		.final = riscv64_sha256_final,</div><div class='del'>-		.finup = riscv64_sha256_finup,</div><div class='del'>-		.digest = riscv64_sha256_digest,</div><div class='del'>-		.descsize = sizeof(struct sha256_state),</div><div class='del'>-		.digestsize = SHA256_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha256",</div><div class='del'>-			.cra_driver_name = "sha256-riscv64-zvknha_or_zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	}, {</div><div class='del'>-		.init = sha224_base_init,</div><div class='del'>-		.update = riscv64_sha256_update,</div><div class='del'>-		.final = riscv64_sha256_final,</div><div class='del'>-		.finup = riscv64_sha256_finup,</div><div class='del'>-		.descsize = sizeof(struct sha256_state),</div><div class='del'>-		.digestsize = SHA224_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA224_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha224",</div><div class='del'>-			.cra_driver_name = "sha224-riscv64-zvknha_or_zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init riscv64_sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	/* Both zvknha and zvknhb provide the SHA-256 instructions. */</div><div class='del'>-	if ((riscv_isa_extension_available(NULL, ZVKNHA) ||</div><div class='del'>-	     riscv_isa_extension_available(NULL, ZVKNHB)) &amp;&amp;</div><div class='del'>-	    riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='del'>-	    riscv_vector_vlen() &gt;= 128)</div><div class='del'>-		return crypto_register_shashes(riscv64_sha256_algs,</div><div class='del'>-					       ARRAY_SIZE(riscv64_sha256_algs));</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit riscv64_sha256_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(riscv64_sha256_algs,</div><div class='del'>-				  ARRAY_SIZE(riscv64_sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(riscv64_sha256_mod_init);</div><div class='del'>-module_exit(riscv64_sha256_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-256 (RISC-V accelerated)");</div><div class='del'>-MODULE_AUTHOR("Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='head'>diff --git a/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S b/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S<br/>deleted file mode 100644<br/>index 8ebcc17de4dc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,225 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */</div><div class='del'>-//</div><div class='del'>-// This file is dual-licensed, meaning that you can use it under your</div><div class='del'>-// choice of either of the following two licenses:</div><div class='del'>-//</div><div class='del'>-// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.</div><div class='del'>-//</div><div class='del'>-// Licensed under the Apache License 2.0 (the "License"). You can obtain</div><div class='del'>-// a copy in the file LICENSE in the source distribution or at</div><div class='del'>-// https://www.openssl.org/source/license.html</div><div class='del'>-//</div><div class='del'>-// or</div><div class='del'>-//</div><div class='del'>-// Copyright (c) 2023, Christoph Müllner &lt;christoph.muellner@vrull.eu&gt;</div><div class='del'>-// Copyright (c) 2023, Phoebe Chen &lt;phoebe.chen@sifive.com&gt;</div><div class='del'>-// Copyright 2024 Google LLC</div><div class='del'>-// All rights reserved.</div><div class='del'>-//</div><div class='del'>-// Redistribution and use in source and binary forms, with or without</div><div class='del'>-// modification, are permitted provided that the following conditions</div><div class='del'>-// are met:</div><div class='del'>-// 1. Redistributions of source code must retain the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer.</div><div class='del'>-// 2. Redistributions in binary form must reproduce the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer in the</div><div class='del'>-//    documentation and/or other materials provided with the distribution.</div><div class='del'>-//</div><div class='del'>-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='del'>-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-</div><div class='del'>-// The generated code of this file depends on the following RISC-V extensions:</div><div class='del'>-// - RV64I</div><div class='del'>-// - RISC-V Vector ('V') with VLEN &gt;= 128</div><div class='del'>-// - RISC-V Vector SHA-2 Secure Hash extension ('Zvknha' or 'Zvknhb')</div><div class='del'>-// - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.option arch, +zvknha, +zvkb</div><div class='del'>-</div><div class='del'>-#define STATEP		a0</div><div class='del'>-#define DATA		a1</div><div class='del'>-#define NUM_BLOCKS	a2</div><div class='del'>-</div><div class='del'>-#define STATEP_C	a3</div><div class='del'>-</div><div class='del'>-#define MASK		v0</div><div class='del'>-#define INDICES		v1</div><div class='del'>-#define W0		v2</div><div class='del'>-#define W1		v3</div><div class='del'>-#define W2		v4</div><div class='del'>-#define W3		v5</div><div class='del'>-#define VTMP		v6</div><div class='del'>-#define FEBA		v7</div><div class='del'>-#define HGDC		v8</div><div class='del'>-#define K0		v10</div><div class='del'>-#define K1		v11</div><div class='del'>-#define K2		v12</div><div class='del'>-#define K3		v13</div><div class='del'>-#define K4		v14</div><div class='del'>-#define K5		v15</div><div class='del'>-#define K6		v16</div><div class='del'>-#define K7		v17</div><div class='del'>-#define K8		v18</div><div class='del'>-#define K9		v19</div><div class='del'>-#define K10		v20</div><div class='del'>-#define K11		v21</div><div class='del'>-#define K12		v22</div><div class='del'>-#define K13		v23</div><div class='del'>-#define K14		v24</div><div class='del'>-#define K15		v25</div><div class='del'>-#define PREV_FEBA	v26</div><div class='del'>-#define PREV_HGDC	v27</div><div class='del'>-</div><div class='del'>-// Do 4 rounds of SHA-256.  w0 contains the current 4 message schedule words.</div><div class='del'>-//</div><div class='del'>-// If not all the message schedule words have been computed yet, then this also</div><div class='del'>-// computes 4 more message schedule words.  w1-w3 contain the next 3 groups of 4</div><div class='del'>-// message schedule words; this macro computes the group after w3 and writes it</div><div class='del'>-// to w0.  This means that the next (w0, w1, w2, w3) is the current (w1, w2, w3,</div><div class='del'>-// w0), so the caller must cycle through the registers accordingly.</div><div class='del'>-.macro	sha256_4rounds	last, k, w0, w1, w2, w3</div><div class='del'>-	vadd.vv		VTMP, \k, \w0</div><div class='del'>-	vsha2cl.vv	HGDC, FEBA, VTMP</div><div class='del'>-	vsha2ch.vv	FEBA, HGDC, VTMP</div><div class='del'>-.if !\last</div><div class='del'>-	vmerge.vvm	VTMP, \w2, \w1, MASK</div><div class='del'>-	vsha2ms.vv	\w0, VTMP, \w3</div><div class='del'>-.endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	sha256_16rounds	last, k0, k1, k2, k3</div><div class='del'>-	sha256_4rounds	\last, \k0, W0, W1, W2, W3</div><div class='del'>-	sha256_4rounds	\last, \k1, W1, W2, W3, W0</div><div class='del'>-	sha256_4rounds	\last, \k2, W2, W3, W0, W1</div><div class='del'>-	sha256_4rounds	\last, \k3, W3, W0, W1, W2</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-// void sha256_transform_zvknha_or_zvknhb_zvkb(u32 state[8], const u8 *data,</div><div class='del'>-//					       int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_transform_zvknha_or_zvknhb_zvkb)</div><div class='del'>-</div><div class='del'>-	// Load the round constants into K0-K15.</div><div class='del'>-	vsetivli	zero, 4, e32, m1, ta, ma</div><div class='del'>-	la		t0, K256</div><div class='del'>-	vle32.v		K0, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K1, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K2, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K3, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K4, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K5, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K6, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K7, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K8, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K9, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K10, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K11, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K12, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K13, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K14, (t0)</div><div class='del'>-	addi		t0, t0, 16</div><div class='del'>-	vle32.v		K15, (t0)</div><div class='del'>-</div><div class='del'>-	// Setup mask for the vmerge to replace the first word (idx==0) in</div><div class='del'>-	// message scheduling.  There are 4 words, so an 8-bit mask suffices.</div><div class='del'>-	vsetivli	zero, 1, e8, m1, ta, ma</div><div class='del'>-	vmv.v.i		MASK, 0x01</div><div class='del'>-</div><div class='del'>-	// Load the state.  The state is stored as {a,b,c,d,e,f,g,h}, but we</div><div class='del'>-	// need {f,e,b,a},{h,g,d,c}.  The dst vtype is e32m1 and the index vtype</div><div class='del'>-	// is e8mf4.  We use index-load with the i8 indices {20, 16, 4, 0},</div><div class='del'>-	// loaded using the 32-bit little endian value 0x00041014.</div><div class='del'>-	li		t0, 0x00041014</div><div class='del'>-	vsetivli	zero, 1, e32, m1, ta, ma</div><div class='del'>-	vmv.v.x		INDICES, t0</div><div class='del'>-	addi		STATEP_C, STATEP, 8</div><div class='del'>-	vsetivli	zero, 4, e32, m1, ta, ma</div><div class='del'>-	vluxei8.v	FEBA, (STATEP), INDICES</div><div class='del'>-	vluxei8.v	HGDC, (STATEP_C), INDICES</div><div class='del'>-</div><div class='del'>-.Lnext_block:</div><div class='del'>-	addi		NUM_BLOCKS, NUM_BLOCKS, -1</div><div class='del'>-</div><div class='del'>-	// Save the previous state, as it's needed later.</div><div class='del'>-	vmv.v.v		PREV_FEBA, FEBA</div><div class='del'>-	vmv.v.v		PREV_HGDC, HGDC</div><div class='del'>-</div><div class='del'>-	// Load the next 512-bit message block and endian-swap each 32-bit word.</div><div class='del'>-	vle32.v		W0, (DATA)</div><div class='del'>-	vrev8.v		W0, W0</div><div class='del'>-	addi		DATA, DATA, 16</div><div class='del'>-	vle32.v		W1, (DATA)</div><div class='del'>-	vrev8.v		W1, W1</div><div class='del'>-	addi		DATA, DATA, 16</div><div class='del'>-	vle32.v		W2, (DATA)</div><div class='del'>-	vrev8.v		W2, W2</div><div class='del'>-	addi		DATA, DATA, 16</div><div class='del'>-	vle32.v		W3, (DATA)</div><div class='del'>-	vrev8.v		W3, W3</div><div class='del'>-	addi		DATA, DATA, 16</div><div class='del'>-</div><div class='del'>-	// Do the 64 rounds of SHA-256.</div><div class='del'>-	sha256_16rounds	0, K0, K1, K2, K3</div><div class='del'>-	sha256_16rounds	0, K4, K5, K6, K7</div><div class='del'>-	sha256_16rounds	0, K8, K9, K10, K11</div><div class='del'>-	sha256_16rounds	1, K12, K13, K14, K15</div><div class='del'>-</div><div class='del'>-	// Add the previous state.</div><div class='del'>-	vadd.vv		FEBA, FEBA, PREV_FEBA</div><div class='del'>-	vadd.vv		HGDC, HGDC, PREV_HGDC</div><div class='del'>-</div><div class='del'>-	// Repeat if more blocks remain.</div><div class='del'>-	bnez		NUM_BLOCKS, .Lnext_block</div><div class='del'>-</div><div class='del'>-	// Store the new state and return.</div><div class='del'>-	vsuxei8.v	FEBA, (STATEP), INDICES</div><div class='del'>-	vsuxei8.v	HGDC, (STATEP_C), INDICES</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(sha256_transform_zvknha_or_zvknhb_zvkb)</div><div class='del'>-</div><div class='del'>-.section ".rodata"</div><div class='del'>-.p2align 2</div><div class='del'>-.type K256, @object</div><div class='del'>-K256:</div><div class='del'>-	.word		0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5</div><div class='del'>-	.word		0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5</div><div class='del'>-	.word		0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3</div><div class='del'>-	.word		0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174</div><div class='del'>-	.word		0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc</div><div class='del'>-	.word		0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da</div><div class='del'>-	.word		0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7</div><div class='del'>-	.word		0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967</div><div class='del'>-	.word		0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13</div><div class='del'>-	.word		0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85</div><div class='del'>-	.word		0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3</div><div class='del'>-	.word		0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070</div><div class='del'>-	.word		0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5</div><div class='del'>-	.word		0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3</div><div class='del'>-	.word		0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208</div><div class='del'>-	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2</div><div class='del'>-.size K256, . - K256</div><div class='head'>diff --git a/arch/riscv/crypto/sha512-riscv64-glue.c b/arch/riscv/crypto/sha512-riscv64-glue.c<br/>deleted file mode 100644<br/>index 43b56a08aeb5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sha512-riscv64-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha512-riscv64-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,133 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * SHA-512 and SHA-384 using the RISC-V vector crypto extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 VRULL GmbH</div><div class='del'>- * Author: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 SiFive, Inc.</div><div class='del'>- * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/vector.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note: the asm function only uses the 'state' field of struct sha512_state.</div><div class='del'>- * It is assumed to be the first field.</div><div class='del'>- */</div><div class='del'>-asmlinkage void sha512_transform_zvknhb_zvkb(</div><div class='del'>-	struct sha512_state *state, const u8 *data, int num_blocks);</div><div class='del'>-</div><div class='del'>-static int riscv64_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure struct sha512_state begins directly with the SHA-512</div><div class='del'>-	 * 512-bit internal state, as this is what the asm function expects.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha512_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		sha512_base_do_update(desc, data, len,</div><div class='del'>-				      sha512_transform_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-	} else {</div><div class='del'>-		crypto_sha512_update(desc, data, len);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sha512_base_do_update(desc, data, len,</div><div class='del'>-					      sha512_transform_zvknhb_zvkb);</div><div class='del'>-		sha512_base_do_finalize(desc, sha512_transform_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sha512_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crypto_sha512_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return riscv64_sha512_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha512_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_base_init(desc) ?:</div><div class='del'>-	       riscv64_sha512_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg riscv64_sha512_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.init = sha512_base_init,</div><div class='del'>-		.update = riscv64_sha512_update,</div><div class='del'>-		.final = riscv64_sha512_final,</div><div class='del'>-		.finup = riscv64_sha512_finup,</div><div class='del'>-		.digest = riscv64_sha512_digest,</div><div class='del'>-		.descsize = sizeof(struct sha512_state),</div><div class='del'>-		.digestsize = SHA512_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA512_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha512",</div><div class='del'>-			.cra_driver_name = "sha512-riscv64-zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	}, {</div><div class='del'>-		.init = sha384_base_init,</div><div class='del'>-		.update = riscv64_sha512_update,</div><div class='del'>-		.final = riscv64_sha512_final,</div><div class='del'>-		.finup = riscv64_sha512_finup,</div><div class='del'>-		.descsize = sizeof(struct sha512_state),</div><div class='del'>-		.digestsize = SHA384_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA384_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha384",</div><div class='del'>-			.cra_driver_name = "sha384-riscv64-zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init riscv64_sha512_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (riscv_isa_extension_available(NULL, ZVKNHB) &amp;&amp;</div><div class='del'>-	    riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='del'>-	    riscv_vector_vlen() &gt;= 128)</div><div class='del'>-		return crypto_register_shashes(riscv64_sha512_algs,</div><div class='del'>-					       ARRAY_SIZE(riscv64_sha512_algs));</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit riscv64_sha512_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(riscv64_sha512_algs,</div><div class='del'>-				  ARRAY_SIZE(riscv64_sha512_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(riscv64_sha512_mod_init);</div><div class='del'>-module_exit(riscv64_sha512_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-512 (RISC-V accelerated)");</div><div class='del'>-MODULE_AUTHOR("Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha512");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha384");</div><div class='head'>diff --git a/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S b/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S<br/>deleted file mode 100644<br/>index 3a9ae210f915..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,203 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */</div><div class='del'>-//</div><div class='del'>-// This file is dual-licensed, meaning that you can use it under your</div><div class='del'>-// choice of either of the following two licenses:</div><div class='del'>-//</div><div class='del'>-// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.</div><div class='del'>-//</div><div class='del'>-// Licensed under the Apache License 2.0 (the "License"). You can obtain</div><div class='del'>-// a copy in the file LICENSE in the source distribution or at</div><div class='del'>-// https://www.openssl.org/source/license.html</div><div class='del'>-//</div><div class='del'>-// or</div><div class='del'>-//</div><div class='del'>-// Copyright (c) 2023, Christoph Müllner &lt;christoph.muellner@vrull.eu&gt;</div><div class='del'>-// Copyright (c) 2023, Phoebe Chen &lt;phoebe.chen@sifive.com&gt;</div><div class='del'>-// Copyright 2024 Google LLC</div><div class='del'>-// All rights reserved.</div><div class='del'>-//</div><div class='del'>-// Redistribution and use in source and binary forms, with or without</div><div class='del'>-// modification, are permitted provided that the following conditions</div><div class='del'>-// are met:</div><div class='del'>-// 1. Redistributions of source code must retain the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer.</div><div class='del'>-// 2. Redistributions in binary form must reproduce the above copyright</div><div class='del'>-//    notice, this list of conditions and the following disclaimer in the</div><div class='del'>-//    documentation and/or other materials provided with the distribution.</div><div class='del'>-//</div><div class='del'>-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='del'>-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>-</div><div class='del'>-// The generated code of this file depends on the following RISC-V extensions:</div><div class='del'>-// - RV64I</div><div class='del'>-// - RISC-V Vector ('V') with VLEN &gt;= 128</div><div class='del'>-// - RISC-V Vector SHA-2 Secure Hash extension ('Zvknhb')</div><div class='del'>-// - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='del'>-</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='del'>-</div><div class='del'>-.text</div><div class='del'>-.option arch, +zvknhb, +zvkb</div><div class='del'>-</div><div class='del'>-#define STATEP		a0</div><div class='del'>-#define DATA		a1</div><div class='del'>-#define NUM_BLOCKS	a2</div><div class='del'>-</div><div class='del'>-#define STATEP_C	a3</div><div class='del'>-#define K		a4</div><div class='del'>-</div><div class='del'>-#define MASK		v0</div><div class='del'>-#define INDICES		v1</div><div class='del'>-#define W0		v10	// LMUL=2</div><div class='del'>-#define W1		v12	// LMUL=2</div><div class='del'>-#define W2		v14	// LMUL=2</div><div class='del'>-#define W3		v16	// LMUL=2</div><div class='del'>-#define VTMP		v20	// LMUL=2</div><div class='del'>-#define FEBA		v22	// LMUL=2</div><div class='del'>-#define HGDC		v24	// LMUL=2</div><div class='del'>-#define PREV_FEBA	v26	// LMUL=2</div><div class='del'>-#define PREV_HGDC	v28	// LMUL=2</div><div class='del'>-</div><div class='del'>-// Do 4 rounds of SHA-512.  w0 contains the current 4 message schedule words.</div><div class='del'>-//</div><div class='del'>-// If not all the message schedule words have been computed yet, then this also</div><div class='del'>-// computes 4 more message schedule words.  w1-w3 contain the next 3 groups of 4</div><div class='del'>-// message schedule words; this macro computes the group after w3 and writes it</div><div class='del'>-// to w0.  This means that the next (w0, w1, w2, w3) is the current (w1, w2, w3,</div><div class='del'>-// w0), so the caller must cycle through the registers accordingly.</div><div class='del'>-.macro	sha512_4rounds	last, w0, w1, w2, w3</div><div class='del'>-	vle64.v		VTMP, (K)</div><div class='del'>-	addi		K, K, 32</div><div class='del'>-	vadd.vv		VTMP, VTMP, \w0</div><div class='del'>-	vsha2cl.vv	HGDC, FEBA, VTMP</div><div class='del'>-	vsha2ch.vv	FEBA, HGDC, VTMP</div><div class='del'>-.if !\last</div><div class='del'>-	vmerge.vvm	VTMP, \w2, \w1, MASK</div><div class='del'>-	vsha2ms.vv	\w0, VTMP, \w3</div><div class='del'>-.endif</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-.macro	sha512_16rounds	last</div><div class='del'>-	sha512_4rounds	\last, W0, W1, W2, W3</div><div class='del'>-	sha512_4rounds	\last, W1, W2, W3, W0</div><div class='del'>-	sha512_4rounds	\last, W2, W3, W0, W1</div><div class='del'>-	sha512_4rounds	\last, W3, W0, W1, W2</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-// void sha512_transform_zvknhb_zvkb(u64 state[8], const u8 *data,</div><div class='del'>-//				     int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sha512_transform_zvknhb_zvkb)</div><div class='del'>-</div><div class='del'>-	// Setup mask for the vmerge to replace the first word (idx==0) in</div><div class='del'>-	// message scheduling.  There are 4 words, so an 8-bit mask suffices.</div><div class='del'>-	vsetivli	zero, 1, e8, m1, ta, ma</div><div class='del'>-	vmv.v.i		MASK, 0x01</div><div class='del'>-</div><div class='del'>-	// Load the state.  The state is stored as {a,b,c,d,e,f,g,h}, but we</div><div class='del'>-	// need {f,e,b,a},{h,g,d,c}.  The dst vtype is e64m2 and the index vtype</div><div class='del'>-	// is e8mf4.  We use index-load with the i8 indices {40, 32, 8, 0},</div><div class='del'>-	// loaded using the 32-bit little endian value 0x00082028.</div><div class='del'>-	li		t0, 0x00082028</div><div class='del'>-	vsetivli	zero, 1, e32, m1, ta, ma</div><div class='del'>-	vmv.v.x		INDICES, t0</div><div class='del'>-	addi		STATEP_C, STATEP, 16</div><div class='del'>-	vsetivli	zero, 4, e64, m2, ta, ma</div><div class='del'>-	vluxei8.v	FEBA, (STATEP), INDICES</div><div class='del'>-	vluxei8.v	HGDC, (STATEP_C), INDICES</div><div class='del'>-</div><div class='del'>-.Lnext_block:</div><div class='del'>-	la		K, K512</div><div class='del'>-	addi		NUM_BLOCKS, NUM_BLOCKS, -1</div><div class='del'>-</div><div class='del'>-	// Save the previous state, as it's needed later.</div><div class='del'>-	vmv.v.v		PREV_FEBA, FEBA</div><div class='del'>-	vmv.v.v		PREV_HGDC, HGDC</div><div class='del'>-</div><div class='del'>-	// Load the next 1024-bit message block and endian-swap each 64-bit word</div><div class='del'>-	vle64.v		W0, (DATA)</div><div class='del'>-	vrev8.v		W0, W0</div><div class='del'>-	addi		DATA, DATA, 32</div><div class='del'>-	vle64.v		W1, (DATA)</div><div class='del'>-	vrev8.v		W1, W1</div><div class='del'>-	addi		DATA, DATA, 32</div><div class='del'>-	vle64.v		W2, (DATA)</div><div class='del'>-	vrev8.v		W2, W2</div><div class='del'>-	addi		DATA, DATA, 32</div><div class='del'>-	vle64.v		W3, (DATA)</div><div class='del'>-	vrev8.v		W3, W3</div><div class='del'>-	addi		DATA, DATA, 32</div><div class='del'>-</div><div class='del'>-	// Do the 80 rounds of SHA-512.</div><div class='del'>-	sha512_16rounds 0</div><div class='del'>-	sha512_16rounds 0</div><div class='del'>-	sha512_16rounds 0</div><div class='del'>-	sha512_16rounds 0</div><div class='del'>-	sha512_16rounds 1</div><div class='del'>-</div><div class='del'>-	// Add the previous state.</div><div class='del'>-	vadd.vv		FEBA, FEBA, PREV_FEBA</div><div class='del'>-	vadd.vv		HGDC, HGDC, PREV_HGDC</div><div class='del'>-</div><div class='del'>-	// Repeat if more blocks remain.</div><div class='del'>-	bnez		NUM_BLOCKS, .Lnext_block</div><div class='del'>-</div><div class='del'>-	// Store the new state and return.</div><div class='del'>-	vsuxei8.v	FEBA, (STATEP), INDICES</div><div class='del'>-	vsuxei8.v	HGDC, (STATEP_C), INDICES</div><div class='del'>-	ret</div><div class='del'>-SYM_FUNC_END(sha512_transform_zvknhb_zvkb)</div><div class='del'>-</div><div class='del'>-.section ".rodata"</div><div class='del'>-.p2align 3</div><div class='del'>-.type K512, @object</div><div class='del'>-K512:</div><div class='del'>-	.dword		0x428a2f98d728ae22, 0x7137449123ef65cd</div><div class='del'>-	.dword		0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc</div><div class='del'>-	.dword		0x3956c25bf348b538, 0x59f111f1b605d019</div><div class='del'>-	.dword		0x923f82a4af194f9b, 0xab1c5ed5da6d8118</div><div class='del'>-	.dword		0xd807aa98a3030242, 0x12835b0145706fbe</div><div class='del'>-	.dword		0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2</div><div class='del'>-	.dword		0x72be5d74f27b896f, 0x80deb1fe3b1696b1</div><div class='del'>-	.dword		0x9bdc06a725c71235, 0xc19bf174cf692694</div><div class='del'>-	.dword		0xe49b69c19ef14ad2, 0xefbe4786384f25e3</div><div class='del'>-	.dword		0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65</div><div class='del'>-	.dword		0x2de92c6f592b0275, 0x4a7484aa6ea6e483</div><div class='del'>-	.dword		0x5cb0a9dcbd41fbd4, 0x76f988da831153b5</div><div class='del'>-	.dword		0x983e5152ee66dfab, 0xa831c66d2db43210</div><div class='del'>-	.dword		0xb00327c898fb213f, 0xbf597fc7beef0ee4</div><div class='del'>-	.dword		0xc6e00bf33da88fc2, 0xd5a79147930aa725</div><div class='del'>-	.dword		0x06ca6351e003826f, 0x142929670a0e6e70</div><div class='del'>-	.dword		0x27b70a8546d22ffc, 0x2e1b21385c26c926</div><div class='del'>-	.dword		0x4d2c6dfc5ac42aed, 0x53380d139d95b3df</div><div class='del'>-	.dword		0x650a73548baf63de, 0x766a0abb3c77b2a8</div><div class='del'>-	.dword		0x81c2c92e47edaee6, 0x92722c851482353b</div><div class='del'>-	.dword		0xa2bfe8a14cf10364, 0xa81a664bbc423001</div><div class='del'>-	.dword		0xc24b8b70d0f89791, 0xc76c51a30654be30</div><div class='del'>-	.dword		0xd192e819d6ef5218, 0xd69906245565a910</div><div class='del'>-	.dword		0xf40e35855771202a, 0x106aa07032bbd1b8</div><div class='del'>-	.dword		0x19a4c116b8d2d0c8, 0x1e376c085141ab53</div><div class='del'>-	.dword		0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8</div><div class='del'>-	.dword		0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb</div><div class='del'>-	.dword		0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3</div><div class='del'>-	.dword		0x748f82ee5defb2fc, 0x78a5636f43172f60</div><div class='del'>-	.dword		0x84c87814a1f0ab72, 0x8cc702081a6439ec</div><div class='del'>-	.dword		0x90befffa23631e28, 0xa4506cebde82bde9</div><div class='del'>-	.dword		0xbef9a3f7b2c67915, 0xc67178f2e372532b</div><div class='del'>-	.dword		0xca273eceea26619c, 0xd186b8c721c0c207</div><div class='del'>-	.dword		0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178</div><div class='del'>-	.dword		0x06f067aa72176fba, 0x0a637dc5a2c898a6</div><div class='del'>-	.dword		0x113f9804bef90dae, 0x1b710b35131c471b</div><div class='del'>-	.dword		0x28db77f523047d84, 0x32caab7b40c72493</div><div class='del'>-	.dword		0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c</div><div class='del'>-	.dword		0x4cc5d4becb3e42b6, 0x597f299cfc657e2a</div><div class='del'>-	.dword		0x5fcb6fab3ad6faec, 0x6c44198c4a475817</div><div class='del'>-.size K512, . - K512</div><div class='head'>diff --git a/arch/riscv/crypto/sm3-riscv64-glue.c b/arch/riscv/crypto/sm3-riscv64-glue.c<br/>index e1737a970c7c..abdfe4a63a27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sm3-riscv64-glue.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sm3-riscv64-glue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sm3-riscv64-glue.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/crypto/sm3-riscv64-glue.c</a></div><div class='hunk'>@@ -13,8 +13,9 @@</div><div class='ctx'> #include &lt;asm/vector.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -24,8 +25,8 @@</div><div class='ctx'> asmlinkage void sm3_transform_zvksh_zvkb(</div><div class='ctx'> 	struct sm3_state *state, const u8 *data, int num_blocks);</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len)</div><div class='add'>+static void sm3_block(struct sm3_state *state, const u8 *data,</div><div class='add'>+		      int num_blocks)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure struct sm3_state begins directly with the SM3</div><div class='hunk'>@@ -35,52 +36,36 @@ static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		kernel_vector_begin();</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_transform_zvksh_zvkb);</div><div class='add'>+		sm3_transform_zvksh_zvkb(state, data, num_blocks);</div><div class='ctx'> 		kernel_vector_end();</div><div class='ctx'> 	} else {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='add'>+		sm3_block_generic(state, data, num_blocks);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, u8 *out)</div><div class='add'>+static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sm3_state *ctx;</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_base_do_update(desc, data, len,</div><div class='del'>-					   sm3_transform_zvksh_zvkb);</div><div class='del'>-		sm3_base_do_finalize(desc, sm3_transform_zvksh_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sm3_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctx = shash_desc_ctx(desc);</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_update(ctx, data, len);</div><div class='del'>-	sm3_final(ctx, out);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sm3_base_do_update_blocks(desc, data, len, sm3_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return riscv64_sm3_finup(desc, NULL, 0, out);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_block);</div><div class='add'>+	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg riscv64_sm3_alg = {</div><div class='ctx'> 	.init = sm3_base_init,</div><div class='ctx'> 	.update = riscv64_sm3_update,</div><div class='del'>-	.final = riscv64_sm3_final,</div><div class='ctx'> 	.finup = riscv64_sm3_finup,</div><div class='del'>-	.descsize = sizeof(struct sm3_state),</div><div class='add'>+	.descsize = SM3_STATE_SIZE,</div><div class='ctx'> 	.digestsize = SM3_DIGEST_SIZE,</div><div class='ctx'> 	.base = {</div><div class='ctx'> 		.cra_blocksize = SM3_BLOCK_SIZE,</div><div class='add'>+		.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+			     CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_priority = 300,</div><div class='ctx'> 		.cra_name = "sm3",</div><div class='ctx'> 		.cra_driver_name = "sm3-riscv64-zvksh-zvkb",</div><div class='head'>diff --git a/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S b/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S<br/>index a2b65d961c04..4fe754846f65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> // - RISC-V Vector SM3 Secure Hash extension ('Zvksh')</div><div class='ctx'> // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> .option arch, +zvksh, +zvkb</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // void sm3_transform_zvksh_zvkb(u32 state[8], const u8 *data, int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sm3_transform_zvksh_zvkb)</div><div class='add'>+SYM_FUNC_START(sm3_transform_zvksh_zvkb)</div><div class='ctx'> </div><div class='ctx'> 	// Load the state and endian-swap each 32-bit word.</div><div class='ctx'> 	vsetivli	zero, 8, e32, m2, ta, ma</div><div class='head'>diff --git a/arch/riscv/errata/Makefile b/arch/riscv/errata/Makefile<br/>index 8a2739485123..02a7a3335b1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/Makefile?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/Makefile</a></div><div class='hunk'>@@ -1,7 +1,18 @@</div><div class='ctx'> ifdef CONFIG_RELOCATABLE</div><div class='del'>-KBUILD_CFLAGS += -fno-pie</div><div class='add'>+# We can't use PIC/PIE when handling early-boot errata parsing, as the kernel</div><div class='add'>+# doesn't have a GOT setup at that point.  So instead just use medany: it's</div><div class='add'>+# usually position-independent, so it should be good enough for the errata</div><div class='add'>+# handling.</div><div class='add'>+KBUILD_CFLAGS += -fno-pie -mcmodel=medany</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_RISCV_ALTERNATIVE_EARLY</div><div class='add'>+ifdef CONFIG_FORTIFY_SOURCE</div><div class='add'>+KBUILD_CFLAGS += -D__NO_FORTIFY</div><div class='add'>+endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ERRATA_ANDES) += andes/</div><div class='add'>+obj-$(CONFIG_ERRATA_MIPS) += mips/</div><div class='ctx'> obj-$(CONFIG_ERRATA_SIFIVE) += sifive/</div><div class='ctx'> obj-$(CONFIG_ERRATA_THEAD) += thead/</div><div class='head'>diff --git a/arch/riscv/errata/andes/errata.c b/arch/riscv/errata/andes/errata.c<br/>index fc1a34faa5f3..dcc9d1ee5ffd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/andes/errata.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/andes/errata.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/andes/errata.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/andes/errata.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/errata_list.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/sbi.h&gt;</div><div class='ctx'> #include &lt;asm/vendorid_list.h&gt;</div><div class='head'>diff --git a/arch/riscv/errata/mips/Makefile b/arch/riscv/errata/mips/Makefile<br/>new file mode 100644<br/>index 000000000000..6278c389b801<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/mips/Makefile?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/mips/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+ifdef CONFIG_RISCV_ALTERNATIVE_EARLY</div><div class='add'>+CFLAGS_errata.o := -mcmodel=medany</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-y += errata.o</div><div class='head'>diff --git a/arch/riscv/errata/mips/errata.c b/arch/riscv/errata/mips/errata.c<br/>new file mode 100644<br/>index 000000000000..e984a8152208<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/mips/errata.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/mips/errata.c</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 MIPS.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='add'>+#include &lt;asm/alternative.h&gt;</div><div class='add'>+#include &lt;asm/errata_list.h&gt;</div><div class='add'>+#include &lt;asm/vendorid_list.h&gt;</div><div class='add'>+#include &lt;asm/vendor_extensions.h&gt;</div><div class='add'>+#include &lt;asm/vendor_extensions/mips.h&gt;</div><div class='add'>+</div><div class='add'>+static inline bool errata_probe_pause(void)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ERRATA_MIPS_P8700_PAUSE_OPCODE))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!riscv_isa_vendor_extension_available(MIPS_VENDOR_ID, XMIPSEXECTL))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 mips_errata_probe(void)</div><div class='add'>+{</div><div class='add'>+	u32 cpu_req_errata = 0;</div><div class='add'>+</div><div class='add'>+	if (errata_probe_pause())</div><div class='add'>+		cpu_req_errata |= BIT(ERRATA_MIPS_P8700_PAUSE_OPCODE);</div><div class='add'>+</div><div class='add'>+	return cpu_req_errata;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mips_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,</div><div class='add'>+			    unsigned long archid, unsigned long impid,</div><div class='add'>+			    unsigned int stage)</div><div class='add'>+{</div><div class='add'>+	struct alt_entry *alt;</div><div class='add'>+	u32 cpu_req_errata = mips_errata_probe();</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ERRATA_MIPS_NUMBER &gt;= RISCV_VENDOR_EXT_ALTERNATIVES_BASE);</div><div class='add'>+</div><div class='add'>+	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (alt = begin; alt &lt; end; alt++) {</div><div class='add'>+		if (alt-&gt;vendor_id != MIPS_VENDOR_ID)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (alt-&gt;patch_id &gt;= ERRATA_MIPS_NUMBER) {</div><div class='add'>+			WARN(1, "MIPS errata id:%d not in kernel errata list\n",</div><div class='add'>+			     alt-&gt;patch_id);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tmp = (1U &lt;&lt; alt-&gt;patch_id);</div><div class='add'>+		if (cpu_req_errata &amp;&amp; tmp) {</div><div class='add'>+			mutex_lock(&amp;text_mutex);</div><div class='add'>+			patch_text_nosync(ALT_OLD_PTR(alt), ALT_ALT_PTR(alt),</div><div class='add'>+					  alt-&gt;alt_len);</div><div class='add'>+			mutex_unlock(&amp;text_mutex);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c<br/>index cea3b96ade11..38aac2c47845 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/sifive/errata.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/sifive/errata.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/sifive/errata.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/sifive/errata.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/vendorid_list.h&gt;</div><div class='ctx'> #include &lt;asm/errata_list.h&gt;</div><div class='head'>diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c<br/>index f5120e07c318..0b942183f708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/thead/errata.c?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/errata/thead/errata.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/errata/thead/errata.c?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/errata/thead/errata.c</a></div><div class='hunk'>@@ -10,13 +10,14 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='add'>+#include &lt;asm/bugs.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/dma-noncoherent.h&gt;</div><div class='ctx'> #include &lt;asm/errata_list.h&gt;</div><div class='ctx'> #include &lt;asm/hwprobe.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/patch.h&gt;</div><div class='add'>+#include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/vendorid_list.h&gt;</div><div class='ctx'> #include &lt;asm/vendor_extensions.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -142,6 +143,31 @@ static bool errata_probe_pmu(unsigned int stage,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool errata_probe_ghostwrite(unsigned int stage,</div><div class='add'>+				    unsigned long arch_id, unsigned long impid)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_ERRATA_THEAD_GHOSTWRITE))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * target-c9xx cores report arch_id and impid as 0</div><div class='add'>+	 *</div><div class='add'>+	 * While ghostwrite may not affect all c9xx cores that implement</div><div class='add'>+	 * xtheadvector, there is no futher granularity than c9xx. Assume</div><div class='add'>+	 * vulnerable for this entire class of processors when xtheadvector is</div><div class='add'>+	 * enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (arch_id != 0 || impid != 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (stage != RISCV_ALTERNATIVES_EARLY_BOOT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ghostwrite_set_vulnerable();</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 thead_errata_probe(unsigned int stage,</div><div class='ctx'> 			      unsigned long archid, unsigned long impid)</div><div class='ctx'> {</div><div class='hunk'>@@ -155,6 +181,8 @@ static u32 thead_errata_probe(unsigned int stage,</div><div class='ctx'> 	if (errata_probe_pmu(stage, archid, impid))</div><div class='ctx'> 		cpu_req_errata |= BIT(ERRATA_THEAD_PMU);</div><div class='ctx'> </div><div class='add'>+	errata_probe_ghostwrite(stage, archid, impid);</div><div class='add'>+</div><div class='ctx'> 	return cpu_req_errata;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild<br/>index 1461af12da6e..bd5fc9403295 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/Kbuild?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/Kbuild?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/Kbuild</a></div><div class='hunk'>@@ -4,12 +4,15 @@ syscall-y += syscall_table_64.h</div><div class='ctx'> </div><div class='ctx'> generic-y += early_ioremap.h</div><div class='ctx'> generic-y += flat.h</div><div class='add'>+generic-y += fprobe.h</div><div class='ctx'> generic-y += kvm_para.h</div><div class='ctx'> generic-y += mmzone.h</div><div class='add'>+generic-y += mcs_spinlock.h</div><div class='ctx'> generic-y += parport.h</div><div class='del'>-generic-y += spinlock.h</div><div class='ctx'> generic-y += spinlock_types.h</div><div class='add'>+generic-y += ticket_spinlock.h</div><div class='ctx'> generic-y += qrwlock.h</div><div class='ctx'> generic-y += qrwlock_types.h</div><div class='add'>+generic-y += qspinlock.h</div><div class='ctx'> generic-y += user.h</div><div class='ctx'> generic-y += vmlinux.lds.h</div><div class='head'>diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h<br/>index 721ec275ce57..9619bd5c8eba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/alternative-macros.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/alternative-macros.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/alternative-macros.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/alternative-macros.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_RISCV_ALTERNATIVE</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro ALT_ENTRY oldptr newptr vendor_id patch_id new_len</div><div class='ctx'> 	.4byte \oldptr - .</div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> #define __ALTERNATIVE_CFG(...)		ALTERNATIVE_CFG __VA_ARGS__</div><div class='ctx'> #define __ALTERNATIVE_CFG_2(...)	ALTERNATIVE_CFG_2 __VA_ARGS__</div><div class='ctx'> </div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -98,7 +98,7 @@</div><div class='ctx'> 	__ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1)	\</div><div class='ctx'> 	ALT_NEW_CONTENT(vendor_id_2, patch_id_2, enable_2, new_c_2)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, CONFIG_k)	\</div><div class='ctx'> 	__ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))</div><div class='hunk'>@@ -109,30 +109,25 @@</div><div class='ctx'> 				   new_c_2, vendor_id_2, patch_id_2, IS_ENABLED(CONFIG_k_2))</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_RISCV_ALTERNATIVE */</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> .macro ALTERNATIVE_CFG old_c</div><div class='ctx'> 	\old_c</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG(old_c, ...)	\</div><div class='del'>-	ALTERNATIVE_CFG old_c</div><div class='add'>+#define __ALTERNATIVE_CFG(old_c, ...)		ALTERNATIVE_CFG old_c</div><div class='add'>+#define __ALTERNATIVE_CFG_2(old_c, ...)		ALTERNATIVE_CFG old_c</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG_2(old_c, ...)	\</div><div class='del'>-	ALTERNATIVE_CFG old_c</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#define __ALTERNATIVE_CFG(old_c, ...)		old_c "\n"</div><div class='add'>+#define __ALTERNATIVE_CFG_2(old_c, ...)		old_c "\n"</div><div class='ctx'> </div><div class='del'>-#define __ALTERNATIVE_CFG(old_c)	\</div><div class='del'>-	old_c "\n"</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG(old_c, ...)	\</div><div class='del'>-	__ALTERNATIVE_CFG(old_c)</div><div class='add'>+#define _ALTERNATIVE_CFG(old_c, ...)		__ALTERNATIVE_CFG(old_c)</div><div class='add'>+#define _ALTERNATIVE_CFG_2(old_c, ...)		__ALTERNATIVE_CFG_2(old_c)</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG_2(old_c, ...)	\</div><div class='del'>-	__ALTERNATIVE_CFG(old_c)</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* CONFIG_RISCV_ALTERNATIVE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h<br/>index 3c2b59b25017..8407d1d535b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/alternative.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/alternative.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/alternative.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/alternative.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative-macros.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_RISCV_ALTERNATIVE</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +48,9 @@ struct alt_entry {</div><div class='ctx'> void andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,</div><div class='ctx'> 			     unsigned long archid, unsigned long impid,</div><div class='ctx'> 			     unsigned int stage);</div><div class='add'>+void mips_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,</div><div class='add'>+			    unsigned long archid, unsigned long impid,</div><div class='add'>+			    unsigned int stage);</div><div class='ctx'> void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,</div><div class='ctx'> 			      unsigned long archid, unsigned long impid,</div><div class='ctx'> 			      unsigned int stage);</div><div class='head'>diff --git a/arch/riscv/include/asm/arch_hweight.h b/arch/riscv/include/asm/arch_hweight.h<br/>index 613769b9cdc9..0e7cdbbec8ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/arch_hweight.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/arch_hweight.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/arch_hweight.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/arch_hweight.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned int __arch_hweight32(unsigned int w)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_RISCV_ISA_ZBB</div><div class='add'>+#if defined(CONFIG_RISCV_ISA_ZBB) &amp;&amp; defined(CONFIG_TOOLCHAIN_HAS_ZBB)</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,</div><div class='ctx'> 				      RISCV_ISA_EXT_ZBB, 1)</div><div class='ctx'> 			  : : : : legacy);</div><div class='hunk'>@@ -50,7 +50,7 @@ static inline unsigned int __arch_hweight8(unsigned int w)</div><div class='ctx'> #if BITS_PER_LONG == 64</div><div class='ctx'> static __always_inline unsigned long __arch_hweight64(__u64 w)</div><div class='ctx'> {</div><div class='del'>-# ifdef CONFIG_RISCV_ISA_ZBB</div><div class='add'>+#if defined(CONFIG_RISCV_ISA_ZBB) &amp;&amp; defined(CONFIG_TOOLCHAIN_HAS_ZBB)</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,</div><div class='ctx'> 				      RISCV_ISA_EXT_ZBB, 1)</div><div class='ctx'> 			  : : : : legacy);</div><div class='hunk'>@@ -64,7 +64,7 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)</div><div class='ctx'> 	return w;</div><div class='ctx'> </div><div class='ctx'> legacy:</div><div class='del'>-# endif</div><div class='add'>+#endif</div><div class='ctx'> 	return __sw_hweight64(w);</div><div class='ctx'> }</div><div class='ctx'> #else /* BITS_PER_LONG == 64 */</div><div class='head'>diff --git a/arch/riscv/include/asm/asm-extable.h b/arch/riscv/include/asm/asm-extable.h<br/>index 0c8bfd54fc4e..37d425d7a762 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm-extable.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm-extable.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm-extable.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/asm-extable.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\</div><div class='ctx'> 	.pushsection	__ex_table, "a";		\</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 	__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_FIXUP, 0)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> 			    EX_DATA_REG(ADDR, addr)				\</div><div class='ctx'> 			  ")")</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_MMU */</div><div class='ctx'> 	#define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)</div><div class='head'>diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h<br/>index cd627ec289f1..a9988bf21ec8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm-prototypes.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm-prototypes.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm-prototypes.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/asm-prototypes.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@ long long __ashlti3(long long a, int b);</div><div class='ctx'> #ifdef CONFIG_RISCV_ISA_V</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-asmlinkage int enter_vector_usercopy(void *dst, void *src, size_t n);</div><div class='add'>+asmlinkage int enter_vector_usercopy(void *dst, void *src, size_t n, bool enable_sum);</div><div class='ctx'> #endif /* CONFIG_MMU  */</div><div class='ctx'> </div><div class='ctx'> void xor_regs_2_(unsigned long bytes, unsigned long *__restrict p1,</div><div class='hunk'>@@ -52,6 +52,8 @@ DECLARE_DO_ERROR_INFO(do_trap_ecall_s);</div><div class='ctx'> DECLARE_DO_ERROR_INFO(do_trap_ecall_m);</div><div class='ctx'> DECLARE_DO_ERROR_INFO(do_trap_break);</div><div class='ctx'> </div><div class='add'>+asmlinkage void ret_from_fork_kernel(void *fn_arg, int (*fn)(void *), struct pt_regs *regs);</div><div class='add'>+asmlinkage void ret_from_fork_user(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void handle_bad_stack(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void do_page_fault(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void do_irq(struct pt_regs *regs);</div><div class='head'>diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h<br/>index 776354895b81..8bd2a11382a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/asm.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/asm.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #ifndef _ASM_RISCV_ASM_H</div><div class='ctx'> #define _ASM_RISCV_ASM_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define __ASM_STR(x)	x</div><div class='ctx'> #else</div><div class='ctx'> #define __ASM_STR(x)	#x</div><div class='hunk'>@@ -27,9 +27,10 @@</div><div class='ctx'> #define REG_ASM		__REG_SEL(.dword, .word)</div><div class='ctx'> #define SZREG		__REG_SEL(8, 4)</div><div class='ctx'> #define LGREG		__REG_SEL(3, 2)</div><div class='add'>+#define SRLI		__REG_SEL(srliw, srli)</div><div class='ctx'> </div><div class='ctx'> #if __SIZEOF_POINTER__ == 8</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define RISCV_PTR		.dword</div><div class='ctx'> #define RISCV_SZPTR		8</div><div class='ctx'> #define RISCV_LGPTR		3</div><div class='hunk'>@@ -39,7 +40,7 @@</div><div class='ctx'> #define RISCV_LGPTR		"3"</div><div class='ctx'> #endif</div><div class='ctx'> #elif __SIZEOF_POINTER__ == 4</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define RISCV_PTR		.word</div><div class='ctx'> #define RISCV_SZPTR		4</div><div class='ctx'> #define RISCV_LGPTR		2</div><div class='hunk'>@@ -68,7 +69,7 @@</div><div class='ctx'> #error "Unexpected __SIZEOF_SHORT__"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Common assembly source macros */</div><div class='hunk'>@@ -90,7 +91,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> .macro asm_per_cpu dst sym tmp</div><div class='del'>-	REG_L \tmp, TASK_TI_CPU_NUM(tp)</div><div class='add'>+	lw    \tmp, TASK_TI_CPU_NUM(tp)</div><div class='ctx'> 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT</div><div class='ctx'> 	la    \dst, __per_cpu_offset</div><div class='ctx'> 	add   \dst, \dst, \tmp</div><div class='hunk'>@@ -193,6 +194,6 @@</div><div class='ctx'> #define ASM_NOKPROBE(name)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_ASM_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/assembler.h<br/>index 44b1457d3e95..16931712beab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/assembler.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/assembler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/assembler.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/assembler.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * Author: Jee Heng Sia &lt;jeeheng.sia@starfivetech.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #error "Only include this from assembly code"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/barrier.h<br/>index e1d9bf1deca6..700ba3f922cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/barrier.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/barrier.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/barrier.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/barrier.h</a></div><div class='hunk'>@@ -10,15 +10,10 @@</div><div class='ctx'> #ifndef _ASM_RISCV_BARRIER_H</div><div class='ctx'> #define _ASM_RISCV_BARRIER_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/cmpxchg.h&gt;</div><div class='ctx'> #include &lt;asm/fence.h&gt;</div><div class='ctx'> </div><div class='del'>-#define nop()		__asm__ __volatile__ ("nop")</div><div class='del'>-#define __nops(n)	".rept	" #n "\nnop\n.endr\n"</div><div class='del'>-#define nops(n)		__asm__ __volatile__ (__nops(n))</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* These barriers need to enforce ordering on both devices or memory. */</div><div class='ctx'> #define __mb()		RISCV_FENCE(iorw, iorw)</div><div class='ctx'> #define __rmb()		RISCV_FENCE(ir, ir)</div><div class='hunk'>@@ -87,6 +82,6 @@ do {									\</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/barrier.h&gt;</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_BARRIER_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h<br/>index fae152ea0508..77880677b06e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/bitops.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/bitops.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/bitops.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/bitsperlong.h&gt;</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_RISCV_ISA_ZBB) || defined(NO_ALTERNATIVE)</div><div class='add'>+#if !(defined(CONFIG_RISCV_ISA_ZBB) &amp;&amp; defined(CONFIG_TOOLCHAIN_HAS_ZBB)) || defined(NO_ALTERNATIVE)</div><div class='ctx'> #include &lt;asm-generic/bitops/__ffs.h&gt;</div><div class='ctx'> #include &lt;asm-generic/bitops/__fls.h&gt;</div><div class='ctx'> #include &lt;asm-generic/bitops/ffs.h&gt;</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> #error "Unexpected BITS_PER_LONG"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static __always_inline unsigned long variable__ffs(unsigned long word)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long variable__ffs(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,</div><div class='ctx'> 				      RISCV_ISA_EXT_ZBB, 1)</div><div class='hunk'>@@ -74,7 +74,7 @@ legacy:</div><div class='ctx'> 	 (unsigned long)__builtin_ctzl(word) :	\</div><div class='ctx'> 	 variable__ffs(word))</div><div class='ctx'> </div><div class='del'>-static __always_inline unsigned long variable__fls(unsigned long word)</div><div class='add'>+static __always_inline __attribute_const__ unsigned long variable__fls(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,</div><div class='ctx'> 				      RISCV_ISA_EXT_ZBB, 1)</div><div class='hunk'>@@ -103,7 +103,7 @@ legacy:</div><div class='ctx'> 	 (unsigned long)(BITS_PER_LONG - 1 - __builtin_clzl(word)) :	\</div><div class='ctx'> 	 variable__fls(word))</div><div class='ctx'> </div><div class='del'>-static __always_inline int variable_ffs(int x)</div><div class='add'>+static __always_inline __attribute_const__ int variable_ffs(int x)</div><div class='ctx'> {</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,</div><div class='ctx'> 				      RISCV_ISA_EXT_ZBB, 1)</div><div class='hunk'>@@ -175,7 +175,7 @@ legacy:</div><div class='ctx'> 	 variable_fls(x_);					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(CONFIG_RISCV_ISA_ZBB) || defined(NO_ALTERNATIVE) */</div><div class='add'>+#endif /* !(defined(CONFIG_RISCV_ISA_ZBB) &amp;&amp; defined(CONFIG_TOOLCHAIN_HAS_ZBB)) || defined(NO_ALTERNATIVE) */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bitops/ffz.h&gt;</div><div class='ctx'> #include &lt;asm-generic/bitops/fls64.h&gt;</div><div class='hunk'>@@ -226,9 +226,9 @@ legacy:</div><div class='ctx'>  * @nr: Bit to set</div><div class='ctx'>  * @addr: Address to count from</div><div class='ctx'>  *</div><div class='del'>- * This operation may be reordered on other architectures than x86.</div><div class='add'>+ * This is an atomic fully-ordered operation (implied full memory barrier).</div><div class='ctx'>  */</div><div class='del'>-static inline int arch_test_and_set_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline int arch_test_and_set_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	return __test_and_op_bit(or, __NOP, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -238,9 +238,9 @@ static inline int arch_test_and_set_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * @nr: Bit to clear</div><div class='ctx'>  * @addr: Address to count from</div><div class='ctx'>  *</div><div class='del'>- * This operation can be reordered on other architectures other than x86.</div><div class='add'>+ * This is an atomic fully-ordered operation (implied full memory barrier).</div><div class='ctx'>  */</div><div class='del'>-static inline int arch_test_and_clear_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline int arch_test_and_clear_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	return __test_and_op_bit(and, __NOT, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -253,7 +253,7 @@ static inline int arch_test_and_clear_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * This operation is atomic and cannot be reordered.</div><div class='ctx'>  * It also implies a memory barrier.</div><div class='ctx'>  */</div><div class='del'>-static inline int arch_test_and_change_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline int arch_test_and_change_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	return __test_and_op_bit(xor, __NOP, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -270,7 +270,7 @@ static inline int arch_test_and_change_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * Note that @nr may be almost arbitrarily large; this function is not</div><div class='ctx'>  * restricted to acting on a single-word quantity.</div><div class='ctx'>  */</div><div class='del'>-static inline void arch_set_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline void arch_set_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	__op_bit(or, __NOP, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -284,7 +284,7 @@ static inline void arch_set_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * on non x86 architectures, so if you are writing portable code,</div><div class='ctx'>  * make sure not to rely on its reordering guarantees.</div><div class='ctx'>  */</div><div class='del'>-static inline void arch_clear_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline void arch_clear_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	__op_bit(and, __NOT, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -298,7 +298,7 @@ static inline void arch_clear_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * Note that @nr may be almost arbitrarily large; this function is not</div><div class='ctx'>  * restricted to acting on a single-word quantity.</div><div class='ctx'>  */</div><div class='del'>-static inline void arch_change_bit(int nr, volatile unsigned long *addr)</div><div class='add'>+static __always_inline void arch_change_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	__op_bit(xor, __NOP, nr, addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -311,7 +311,7 @@ static inline void arch_change_bit(int nr, volatile unsigned long *addr)</div><div class='ctx'>  * This operation is atomic and provides acquire barrier semantics.</div><div class='ctx'>  * It can be used to implement bit locks.</div><div class='ctx'>  */</div><div class='del'>-static inline int arch_test_and_set_bit_lock(</div><div class='add'>+static __always_inline int arch_test_and_set_bit_lock(</div><div class='ctx'> 	unsigned long nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	return __test_and_op_bit_ord(or, __NOP, nr, addr, .aq);</div><div class='hunk'>@@ -324,7 +324,7 @@ static inline int arch_test_and_set_bit_lock(</div><div class='ctx'>  *</div><div class='ctx'>  * This operation is atomic and provides release barrier semantics.</div><div class='ctx'>  */</div><div class='del'>-static inline void arch_clear_bit_unlock(</div><div class='add'>+static __always_inline void arch_clear_bit_unlock(</div><div class='ctx'> 	unsigned long nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	__op_bit_ord(and, __NOT, nr, addr, .rl);</div><div class='hunk'>@@ -345,13 +345,13 @@ static inline void arch_clear_bit_unlock(</div><div class='ctx'>  * non-atomic property here: it's a lot more instructions and we still have to</div><div class='ctx'>  * provide release semantics anyway.</div><div class='ctx'>  */</div><div class='del'>-static inline void arch___clear_bit_unlock(</div><div class='add'>+static __always_inline void arch___clear_bit_unlock(</div><div class='ctx'> 	unsigned long nr, volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	arch_clear_bit_unlock(nr, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool arch_xor_unlock_is_negative_byte(unsigned long mask,</div><div class='add'>+static __always_inline bool arch_xor_unlock_is_negative_byte(unsigned long mask,</div><div class='ctx'> 		volatile unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long res;</div><div class='head'>diff --git a/arch/riscv/include/asm/bug.h b/arch/riscv/include/asm/bug.h<br/>index 1aaea81fb141..4c03e20ad11f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/bug.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/bug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/bug.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/bug.h</a></div><div class='hunk'>@@ -31,40 +31,45 @@ typedef u32 bug_insn_t;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS</div><div class='ctx'> #define __BUG_ENTRY_ADDR	RISCV_INT " 1b - ."</div><div class='del'>-#define __BUG_ENTRY_FILE	RISCV_INT " %0 - ."</div><div class='add'>+#define __BUG_ENTRY_FILE(file)	RISCV_INT " " file " - ."</div><div class='ctx'> #else</div><div class='ctx'> #define __BUG_ENTRY_ADDR	RISCV_PTR " 1b"</div><div class='del'>-#define __BUG_ENTRY_FILE	RISCV_PTR " %0"</div><div class='add'>+#define __BUG_ENTRY_FILE(file)	RISCV_PTR " " file</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_BUGVERBOSE</div><div class='del'>-#define __BUG_ENTRY			\</div><div class='add'>+#define __BUG_ENTRY(file, line, flags)	\</div><div class='ctx'> 	__BUG_ENTRY_ADDR "\n\t"		\</div><div class='del'>-	__BUG_ENTRY_FILE "\n\t"		\</div><div class='del'>-	RISCV_SHORT " %1\n\t"		\</div><div class='del'>-	RISCV_SHORT " %2"</div><div class='add'>+	__BUG_ENTRY_FILE(file) "\n\t"	\</div><div class='add'>+	RISCV_SHORT " " line "\n\t"	\</div><div class='add'>+	RISCV_SHORT " " flags</div><div class='ctx'> #else</div><div class='del'>-#define __BUG_ENTRY			\</div><div class='del'>-	__BUG_ENTRY_ADDR "\n\t"		\</div><div class='del'>-	RISCV_SHORT " %2"</div><div class='add'>+#define __BUG_ENTRY(file, line, flags)		\</div><div class='add'>+	__BUG_ENTRY_ADDR "\n\t"			\</div><div class='add'>+	RISCV_SHORT " " flags</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GENERIC_BUG</div><div class='del'>-#define __BUG_FLAGS(flags)					\</div><div class='del'>-do {								\</div><div class='del'>-	__asm__ __volatile__ (					\</div><div class='add'>+</div><div class='add'>+#define ARCH_WARN_ASM(file, line, flags, size)			\</div><div class='ctx'> 		"1:\n\t"					\</div><div class='ctx'> 			"ebreak\n"				\</div><div class='ctx'> 			".pushsection __bug_table,\"aw\"\n\t"	\</div><div class='ctx'> 		"2:\n\t"					\</div><div class='del'>-			__BUG_ENTRY "\n\t"			\</div><div class='del'>-			".org 2b + %3\n\t"                      \</div><div class='add'>+		__BUG_ENTRY(file, line, flags) "\n\t"		\</div><div class='add'>+			".org 2b + " size "\n\t"                \</div><div class='ctx'> 			".popsection"				\</div><div class='add'>+</div><div class='add'>+#define __BUG_FLAGS(flags)					\</div><div class='add'>+do {								\</div><div class='add'>+	__asm__ __volatile__ (					\</div><div class='add'>+		ARCH_WARN_ASM("%0", "%1", "%2", "%3")		\</div><div class='ctx'> 		:						\</div><div class='ctx'> 		: "i" (__FILE__), "i" (__LINE__),		\</div><div class='ctx'> 		  "i" (flags),					\</div><div class='ctx'> 		  "i" (sizeof(struct bug_entry)));              \</div><div class='ctx'> } while (0)</div><div class='add'>+</div><div class='ctx'> #else /* CONFIG_GENERIC_BUG */</div><div class='ctx'> #define __BUG_FLAGS(flags) do {					\</div><div class='ctx'> 	__asm__ __volatile__ ("ebreak\n");			\</div><div class='hunk'>@@ -78,6 +83,8 @@ do {								\</div><div class='ctx'> </div><div class='ctx'> #define __WARN_FLAGS(flags) __BUG_FLAGS(BUGFLAG_WARNING|(flags))</div><div class='ctx'> </div><div class='add'>+#define ARCH_WARN_REACHABLE</div><div class='add'>+</div><div class='ctx'> #define HAVE_ARCH_BUG</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bug.h&gt;</div><div class='head'>diff --git a/arch/riscv/include/asm/bugs.h b/arch/riscv/include/asm/bugs.h<br/>new file mode 100644<br/>index 000000000000..17ca0a947730<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/bugs.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/bugs.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Interface for managing mitigations for riscv vulnerabilities.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Rivos Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_BUGS_H</div><div class='add'>+#define __ASM_BUGS_H</div><div class='add'>+</div><div class='add'>+/* Watch out, ordering is important here. */</div><div class='add'>+enum mitigation_state {</div><div class='add'>+	UNAFFECTED,</div><div class='add'>+	MITIGATED,</div><div class='add'>+	VULNERABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ghostwrite_set_vulnerable(void);</div><div class='add'>+bool ghostwrite_enable_mitigation(void);</div><div class='add'>+enum mitigation_state ghostwrite_get_state(void);</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_BUGS_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h<br/>index 570e9d8acad1..eb42b739d132 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cache.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cache.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cache.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cache.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #define ARCH_SLAB_MINALIGN	16</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> extern int dma_cache_alignment;</div><div class='ctx'> #ifdef CONFIG_RISCV_DMA_NONCOHERENT</div><div class='hunk'>@@ -35,6 +35,6 @@ static inline int dma_get_cache_alignment(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_CACHE_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h<br/>index 8de73f91bfa3..0092513c3376 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cacheflush.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cacheflush.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -23,8 +23,8 @@ static inline void local_flush_icache_range(unsigned long start,</div><div class='ctx'> </div><div class='ctx'> static inline void flush_dcache_folio(struct folio *folio)</div><div class='ctx'> {</div><div class='del'>-	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags))</div><div class='del'>-		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags);</div><div class='add'>+	if (test_bit(PG_dcache_clean, &amp;folio-&gt;flags.f))</div><div class='add'>+		clear_bit(PG_dcache_clean, &amp;folio-&gt;flags.f);</div><div class='ctx'> }</div><div class='ctx'> #define flush_dcache_folio flush_dcache_folio</div><div class='ctx'> #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1</div><div class='hunk'>@@ -34,11 +34,6 @@ static inline void flush_dcache_page(struct page *page)</div><div class='ctx'> 	flush_dcache_folio(page_folio(page));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * RISC-V doesn't have an instruction to flush parts of the instruction cache,</div><div class='del'>- * so instead we just flush the whole thing.</div><div class='del'>- */</div><div class='del'>-#define flush_icache_range(start, end) flush_icache_all()</div><div class='ctx'> #define flush_icache_user_page(vma, pg, addr, len)	\</div><div class='ctx'> do {							\</div><div class='ctx'> 	if (vma-&gt;vm_flags &amp; VM_EXEC)			\</div><div class='hunk'>@@ -78,8 +73,19 @@ void flush_icache_mm(struct mm_struct *mm, bool local);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * RISC-V doesn't have an instruction to flush parts of the instruction cache,</div><div class='add'>+ * so instead we just flush the whole thing.</div><div class='add'>+ */</div><div class='add'>+#define flush_icache_range flush_icache_range</div><div class='add'>+static inline void flush_icache_range(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	flush_icache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern unsigned int riscv_cbom_block_size;</div><div class='ctx'> extern unsigned int riscv_cboz_block_size;</div><div class='add'>+extern unsigned int riscv_cbop_block_size;</div><div class='ctx'> void riscv_init_cbo_blocksizes(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_RISCV_DMA_NONCOHERENT</div><div class='head'>diff --git a/arch/riscv/include/asm/cfi.h b/arch/riscv/include/asm/cfi.h<br/>index fb9696d7a3f2..710aa8192edd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cfi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cfi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cfi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cfi.h</a></div><div class='hunk'>@@ -11,30 +11,14 @@</div><div class='ctx'> </div><div class='ctx'> struct pt_regs;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='ctx'> enum bug_trap_type handle_cfi_failure(struct pt_regs *regs);</div><div class='ctx'> #define __bpfcall</div><div class='del'>-static inline int cfi_get_offset(void)</div><div class='del'>-{</div><div class='del'>-	return 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define cfi_get_offset cfi_get_offset</div><div class='del'>-extern u32 cfi_bpf_hash;</div><div class='del'>-extern u32 cfi_bpf_subprog_hash;</div><div class='del'>-extern u32 cfi_get_func_hash(void *func);</div><div class='ctx'> #else</div><div class='ctx'> static inline enum bug_trap_type handle_cfi_failure(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return BUG_TRAP_TYPE_NONE;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#define cfi_bpf_hash 0U</div><div class='del'>-#define cfi_bpf_subprog_hash 0U</div><div class='del'>-static inline u32 cfi_get_func_hash(void *func)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_CFI_CLANG */</div><div class='add'>+#endif /* CONFIG_CFI */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_CFI_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/checksum.h b/arch/riscv/include/asm/checksum.h<br/>index 88e6f1499e88..da378856f1d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/checksum.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/checksum.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/checksum.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/checksum.h</a></div><div class='hunk'>@@ -49,8 +49,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)</div><div class='ctx'> 	 * ZBB only saves three instructions on 32-bit and five on 64-bit so not</div><div class='ctx'> 	 * worth checking if supported without Alternatives.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &amp;&amp;</div><div class='del'>-	    IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &amp;&amp; IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) {</div><div class='ctx'> 		unsigned long fold_temp;</div><div class='ctx'> </div><div class='ctx'> 		asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,</div><div class='head'>diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h<br/>index ebbce134917c..122e1485d39a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cmpxchg.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cmpxchg.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -12,30 +12,46 @@</div><div class='ctx'> #include &lt;asm/fence.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/insn-def.h&gt;</div><div class='del'>-</div><div class='del'>-#define __arch_xchg_masked(sc_sfx, prepend, append, r, p, n)		\</div><div class='del'>-({									\</div><div class='del'>-	u32 *__ptr32b = (u32 *)((ulong)(p) &amp; ~0x3);			\</div><div class='del'>-	ulong __s = ((ulong)(p) &amp; (0x4 - sizeof(*p))) * BITS_PER_BYTE;	\</div><div class='del'>-	ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)	\</div><div class='del'>-			&lt;&lt; __s;						\</div><div class='del'>-	ulong __newx = (ulong)(n) &lt;&lt; __s;				\</div><div class='del'>-	ulong __retx;							\</div><div class='del'>-	ulong __rc;							\</div><div class='del'>-									\</div><div class='del'>-	__asm__ __volatile__ (						\</div><div class='del'>-	       prepend							\</div><div class='del'>-	       "0:	lr.w %0, %2\n"					\</div><div class='del'>-	       "	and  %1, %0, %z4\n"				\</div><div class='del'>-	       "	or   %1, %1, %z3\n"				\</div><div class='del'>-	       "	sc.w" sc_sfx " %1, %1, %2\n"			\</div><div class='del'>-	       "	bnez %1, 0b\n"					\</div><div class='del'>-	       append							\</div><div class='del'>-	       : "=&amp;r" (__retx), "=&amp;r" (__rc), "+A" (*(__ptr32b))	\</div><div class='del'>-	       : "rJ" (__newx), "rJ" (~__mask)				\</div><div class='del'>-	       : "memory");						\</div><div class='del'>-									\</div><div class='del'>-	r = (__typeof__(*(p)))((__retx &amp; __mask) &gt;&gt; __s);		\</div><div class='add'>+#include &lt;asm/cpufeature-macros.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/errata_list.h&gt;</div><div class='add'>+</div><div class='add'>+#define __arch_xchg_masked(sc_sfx, swap_sfx, prepend, sc_append,		\</div><div class='add'>+			   swap_append, r, p, n)				\</div><div class='add'>+({										\</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) &amp;&amp;				\</div><div class='add'>+	    riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA)) {		\</div><div class='add'>+		__asm__ __volatile__ (						\</div><div class='add'>+			prepend							\</div><div class='add'>+			"	amoswap" swap_sfx " %0, %z2, %1\n"		\</div><div class='add'>+			swap_append						\</div><div class='add'>+			: "=&amp;r" (r), "+A" (*(p))				\</div><div class='add'>+			: "rJ" (n)						\</div><div class='add'>+			: "memory");						\</div><div class='add'>+	} else {								\</div><div class='add'>+		u32 *__ptr32b = (u32 *)((ulong)(p) &amp; ~0x3);			\</div><div class='add'>+		ulong __s = ((ulong)(p) &amp; (0x4 - sizeof(*p))) * BITS_PER_BYTE;	\</div><div class='add'>+		ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)	\</div><div class='add'>+				&lt;&lt; __s;						\</div><div class='add'>+		ulong __newx = (ulong)(n) &lt;&lt; __s;				\</div><div class='add'>+		ulong __retx;							\</div><div class='add'>+		ulong __rc;							\</div><div class='add'>+										\</div><div class='add'>+		__asm__ __volatile__ (						\</div><div class='add'>+		       prepend							\</div><div class='add'>+		       PREFETCHW_ASM(%5)					\</div><div class='add'>+		       "0:	lr.w %0, %2\n"					\</div><div class='add'>+		       "	and  %1, %0, %z4\n"				\</div><div class='add'>+		       "	or   %1, %1, %z3\n"				\</div><div class='add'>+		       "	sc.w" sc_sfx " %1, %1, %2\n"			\</div><div class='add'>+		       "	bnez %1, 0b\n"					\</div><div class='add'>+		       sc_append						\</div><div class='add'>+		       : "=&amp;r" (__retx), "=&amp;r" (__rc), "+A" (*(__ptr32b))	\</div><div class='add'>+		       : "rJ" (__newx), "rJ" (~__mask), "rJ" (__ptr32b)		\</div><div class='add'>+		       : "memory");						\</div><div class='add'>+										\</div><div class='add'>+		r = (__typeof__(*(p)))((__retx &amp; __mask) &gt;&gt; __s);		\</div><div class='add'>+	}									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> #define __arch_xchg(sfx, prepend, append, r, p, n)			\</div><div class='hunk'>@@ -58,8 +74,13 @@</div><div class='ctx'> 									\</div><div class='ctx'> 	switch (sizeof(*__ptr)) {					\</div><div class='ctx'> 	case 1:								\</div><div class='add'>+		__arch_xchg_masked(sc_sfx, ".b" swap_sfx,		\</div><div class='add'>+				   prepend, sc_append, swap_append,	\</div><div class='add'>+				   __ret, __ptr, __new);		\</div><div class='add'>+		break;							\</div><div class='ctx'> 	case 2:								\</div><div class='del'>-		__arch_xchg_masked(sc_sfx, prepend, sc_append,		\</div><div class='add'>+		__arch_xchg_masked(sc_sfx, ".h" swap_sfx,		\</div><div class='add'>+				   prepend, sc_append, swap_append,	\</div><div class='ctx'> 				   __ret, __ptr, __new);		\</div><div class='ctx'> 		break;							\</div><div class='ctx'> 	case 4:								\</div><div class='hunk'>@@ -106,55 +127,92 @@</div><div class='ctx'>  * store NEW in MEM.  Return the initial value in MEM.  Success is</div><div class='ctx'>  * indicated by comparing RETURN with OLD.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-#define __arch_cmpxchg_masked(sc_sfx, prepend, append, r, p, o, n)	\</div><div class='del'>-({									\</div><div class='del'>-	u32 *__ptr32b = (u32 *)((ulong)(p) &amp; ~0x3);			\</div><div class='del'>-	ulong __s = ((ulong)(p) &amp; (0x4 - sizeof(*p))) * BITS_PER_BYTE;	\</div><div class='del'>-	ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)	\</div><div class='del'>-			&lt;&lt; __s;						\</div><div class='del'>-	ulong __newx = (ulong)(n) &lt;&lt; __s;				\</div><div class='del'>-	ulong __oldx = (ulong)(o) &lt;&lt; __s;				\</div><div class='del'>-	ulong __retx;							\</div><div class='del'>-	ulong __rc;							\</div><div class='del'>-									\</div><div class='del'>-	__asm__ __volatile__ (						\</div><div class='del'>-		prepend							\</div><div class='del'>-		"0:	lr.w %0, %2\n"					\</div><div class='del'>-		"	and  %1, %0, %z5\n"				\</div><div class='del'>-		"	bne  %1, %z3, 1f\n"				\</div><div class='del'>-		"	and  %1, %0, %z6\n"				\</div><div class='del'>-		"	or   %1, %1, %z4\n"				\</div><div class='del'>-		"	sc.w" sc_sfx " %1, %1, %2\n"			\</div><div class='del'>-		"	bnez %1, 0b\n"					\</div><div class='del'>-		append							\</div><div class='del'>-		"1:\n"							\</div><div class='del'>-		: "=&amp;r" (__retx), "=&amp;r" (__rc), "+A" (*(__ptr32b))	\</div><div class='del'>-		: "rJ" ((long)__oldx), "rJ" (__newx),			\</div><div class='del'>-		  "rJ" (__mask), "rJ" (~__mask)				\</div><div class='del'>-		: "memory");						\</div><div class='del'>-									\</div><div class='del'>-	r = (__typeof__(*(p)))((__retx &amp; __mask) &gt;&gt; __s);		\</div><div class='add'>+#define __arch_cmpxchg_masked(sc_sfx, cas_sfx,					\</div><div class='add'>+			      sc_prepend, sc_append,				\</div><div class='add'>+			      cas_prepend, cas_append,				\</div><div class='add'>+			      r, p, o, n)					\</div><div class='add'>+({										\</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) &amp;&amp;				\</div><div class='add'>+	    IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) &amp;&amp;				\</div><div class='add'>+	    IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZACAS) &amp;&amp;				\</div><div class='add'>+	    riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA) &amp;&amp;		\</div><div class='add'>+	    riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) {		\</div><div class='add'>+		r = o;								\</div><div class='add'>+										\</div><div class='add'>+		__asm__ __volatile__ (						\</div><div class='add'>+			cas_prepend							\</div><div class='add'>+			"	amocas" cas_sfx " %0, %z2, %1\n"		\</div><div class='add'>+			cas_append							\</div><div class='add'>+			: "+&amp;r" (r), "+A" (*(p))				\</div><div class='add'>+			: "rJ" (n)						\</div><div class='add'>+			: "memory");						\</div><div class='add'>+	} else {								\</div><div class='add'>+		u32 *__ptr32b = (u32 *)((ulong)(p) &amp; ~0x3);			\</div><div class='add'>+		ulong __s = ((ulong)(p) &amp; (0x4 - sizeof(*p))) * BITS_PER_BYTE;	\</div><div class='add'>+		ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0)	\</div><div class='add'>+			       &lt;&lt; __s;						\</div><div class='add'>+		ulong __newx = (ulong)(n) &lt;&lt; __s;				\</div><div class='add'>+		ulong __oldx = (ulong)(o) &lt;&lt; __s;				\</div><div class='add'>+		ulong __retx;							\</div><div class='add'>+		ulong __rc;							\</div><div class='add'>+										\</div><div class='add'>+		__asm__ __volatile__ (						\</div><div class='add'>+			sc_prepend							\</div><div class='add'>+			"0:	lr.w %0, %2\n"					\</div><div class='add'>+			"	and  %1, %0, %z5\n"				\</div><div class='add'>+			"	bne  %1, %z3, 1f\n"				\</div><div class='add'>+			"	and  %1, %0, %z6\n"				\</div><div class='add'>+			"	or   %1, %1, %z4\n"				\</div><div class='add'>+			"	sc.w" sc_sfx " %1, %1, %2\n"			\</div><div class='add'>+			"	bnez %1, 0b\n"					\</div><div class='add'>+			sc_append							\</div><div class='add'>+			"1:\n"							\</div><div class='add'>+			: "=&amp;r" (__retx), "=&amp;r" (__rc), "+A" (*(__ptr32b))	\</div><div class='add'>+			: "rJ" ((long)__oldx), "rJ" (__newx),			\</div><div class='add'>+			  "rJ" (__mask), "rJ" (~__mask)				\</div><div class='add'>+			: "memory");						\</div><div class='add'>+										\</div><div class='add'>+		r = (__typeof__(*(p)))((__retx &amp; __mask) &gt;&gt; __s);		\</div><div class='add'>+	}									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define __arch_cmpxchg(lr_sfx, sc_sfx, prepend, append, r, p, co, o, n)	\</div><div class='add'>+#define __arch_cmpxchg(lr_sfx, sc_sfx, cas_sfx,				\</div><div class='add'>+		       sc_prepend, sc_append,				\</div><div class='add'>+		       cas_prepend, cas_append,				\</div><div class='add'>+		       r, p, co, o, n)					\</div><div class='ctx'> ({									\</div><div class='del'>-	register unsigned int __rc;					\</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) &amp;&amp;			\</div><div class='add'>+	    IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZACAS) &amp;&amp;			\</div><div class='add'>+	    riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) {	\</div><div class='add'>+		r = o;							\</div><div class='ctx'> 									\</div><div class='del'>-	__asm__ __volatile__ (						\</div><div class='del'>-		prepend							\</div><div class='del'>-		"0:	lr" lr_sfx " %0, %2\n"				\</div><div class='del'>-		"	bne  %0, %z3, 1f\n"				\</div><div class='del'>-		"	sc" sc_sfx " %1, %z4, %2\n"			\</div><div class='del'>-		"	bnez %1, 0b\n"					\</div><div class='del'>-		append							\</div><div class='del'>-		"1:\n"							\</div><div class='del'>-		: "=&amp;r" (r), "=&amp;r" (__rc), "+A" (*(p))			\</div><div class='del'>-		: "rJ" (co o), "rJ" (n)					\</div><div class='del'>-		: "memory");						\</div><div class='add'>+		__asm__ __volatile__ (					\</div><div class='add'>+			cas_prepend					\</div><div class='add'>+			"	amocas" cas_sfx " %0, %z2, %1\n"	\</div><div class='add'>+			cas_append					\</div><div class='add'>+			: "+&amp;r" (r), "+A" (*(p))			\</div><div class='add'>+			: "rJ" (n)					\</div><div class='add'>+			: "memory");					\</div><div class='add'>+	} else {							\</div><div class='add'>+		register unsigned int __rc;				\</div><div class='add'>+									\</div><div class='add'>+		__asm__ __volatile__ (					\</div><div class='add'>+			sc_prepend					\</div><div class='add'>+			"0:	lr" lr_sfx " %0, %2\n"			\</div><div class='add'>+			"	bne  %0, %z3, 1f\n"			\</div><div class='add'>+			"	sc" sc_sfx " %1, %z4, %2\n"		\</div><div class='add'>+			"	bnez %1, 0b\n"				\</div><div class='add'>+			sc_append					\</div><div class='add'>+			"1:\n"						\</div><div class='add'>+			: "=&amp;r" (r), "=&amp;r" (__rc), "+A" (*(p))		\</div><div class='add'>+			: "rJ" (co o), "rJ" (n)				\</div><div class='add'>+			: "memory");					\</div><div class='add'>+	}								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#define _arch_cmpxchg(ptr, old, new, sc_sfx, prepend, append)		\</div><div class='add'>+#define _arch_cmpxchg(ptr, old, new, sc_sfx, cas_sfx,			\</div><div class='add'>+		      sc_prepend, sc_append,				\</div><div class='add'>+		      cas_prepend, cas_append)				\</div><div class='ctx'> ({									\</div><div class='ctx'> 	__typeof__(ptr) __ptr = (ptr);					\</div><div class='ctx'> 	__typeof__(*(__ptr)) __old = (old);				\</div><div class='hunk'>@@ -163,17 +221,28 @@</div><div class='ctx'> 									\</div><div class='ctx'> 	switch (sizeof(*__ptr)) {					\</div><div class='ctx'> 	case 1:								\</div><div class='add'>+		__arch_cmpxchg_masked(sc_sfx, ".b" cas_sfx,		\</div><div class='add'>+				      sc_prepend, sc_append,		\</div><div class='add'>+				      cas_prepend, cas_append,		\</div><div class='add'>+				      __ret, __ptr, __old, __new);	\</div><div class='add'>+		break;							\</div><div class='ctx'> 	case 2:								\</div><div class='del'>-		__arch_cmpxchg_masked(sc_sfx, prepend, append,		\</div><div class='del'>-					__ret, __ptr, __old, __new);	\</div><div class='add'>+		__arch_cmpxchg_masked(sc_sfx, ".h" cas_sfx,		\</div><div class='add'>+				      sc_prepend, sc_append,		\</div><div class='add'>+				      cas_prepend, cas_append,		\</div><div class='add'>+				      __ret, __ptr, __old, __new);	\</div><div class='ctx'> 		break;							\</div><div class='ctx'> 	case 4:								\</div><div class='del'>-		__arch_cmpxchg(".w", ".w" sc_sfx, prepend, append,	\</div><div class='del'>-				__ret, __ptr, (long), __old, __new);	\</div><div class='add'>+		__arch_cmpxchg(".w", ".w" sc_sfx, ".w" cas_sfx,		\</div><div class='add'>+			       sc_prepend, sc_append,			\</div><div class='add'>+			       cas_prepend, cas_append,			\</div><div class='add'>+			       __ret, __ptr, (long)(int)(long), __old, __new);	\</div><div class='ctx'> 		break;							\</div><div class='ctx'> 	case 8:								\</div><div class='del'>-		__arch_cmpxchg(".d", ".d" sc_sfx, prepend, append,	\</div><div class='del'>-				__ret, __ptr, /**/, __old, __new);	\</div><div class='add'>+		__arch_cmpxchg(".d", ".d" sc_sfx, ".d" cas_sfx,		\</div><div class='add'>+			       sc_prepend, sc_append,			\</div><div class='add'>+			       cas_prepend, cas_append,			\</div><div class='add'>+			       __ret, __ptr, /**/, __old, __new);	\</div><div class='ctx'> 		break;							\</div><div class='ctx'> 	default:							\</div><div class='ctx'> 		BUILD_BUG();						\</div><div class='hunk'>@@ -181,17 +250,40 @@</div><div class='ctx'> 	(__typeof__(*(__ptr)))__ret;					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * These macros are here to improve the readability of the arch_cmpxchg_XXX()</div><div class='add'>+ * macros.</div><div class='add'>+ */</div><div class='add'>+#define SC_SFX(x)	x</div><div class='add'>+#define CAS_SFX(x)	x</div><div class='add'>+#define SC_PREPEND(x)	x</div><div class='add'>+#define SC_APPEND(x)	x</div><div class='add'>+#define CAS_PREPEND(x)	x</div><div class='add'>+#define CAS_APPEND(x)	x</div><div class='add'>+</div><div class='ctx'> #define arch_cmpxchg_relaxed(ptr, o, n)					\</div><div class='del'>-	_arch_cmpxchg((ptr), (o), (n), "", "", "")</div><div class='add'>+	_arch_cmpxchg((ptr), (o), (n),					\</div><div class='add'>+		      SC_SFX(""), CAS_SFX(""),				\</div><div class='add'>+		      SC_PREPEND(""), SC_APPEND(""),			\</div><div class='add'>+		      CAS_PREPEND(""), CAS_APPEND(""))</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg_acquire(ptr, o, n)					\</div><div class='del'>-	_arch_cmpxchg((ptr), (o), (n), "", "", RISCV_ACQUIRE_BARRIER)</div><div class='add'>+	_arch_cmpxchg((ptr), (o), (n),					\</div><div class='add'>+		      SC_SFX(""), CAS_SFX(""),				\</div><div class='add'>+		      SC_PREPEND(""), SC_APPEND(RISCV_ACQUIRE_BARRIER),	\</div><div class='add'>+		      CAS_PREPEND(""), CAS_APPEND(RISCV_ACQUIRE_BARRIER))</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg_release(ptr, o, n)					\</div><div class='del'>-	_arch_cmpxchg((ptr), (o), (n), "", RISCV_RELEASE_BARRIER, "")</div><div class='add'>+	_arch_cmpxchg((ptr), (o), (n),					\</div><div class='add'>+		      SC_SFX(""), CAS_SFX(""),				\</div><div class='add'>+		      SC_PREPEND(RISCV_RELEASE_BARRIER), SC_APPEND(""),	\</div><div class='add'>+		      CAS_PREPEND(RISCV_RELEASE_BARRIER), CAS_APPEND(""))</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg(ptr, o, n)						\</div><div class='del'>-	_arch_cmpxchg((ptr), (o), (n), ".rl", "", "	fence rw, rw\n")</div><div class='add'>+	_arch_cmpxchg((ptr), (o), (n),					\</div><div class='add'>+		      SC_SFX(".rl"), CAS_SFX(".aqrl"),			\</div><div class='add'>+		      SC_PREPEND(""), SC_APPEND(RISCV_FULL_BARRIER),	\</div><div class='add'>+		      CAS_PREPEND(""), CAS_APPEND(""))</div><div class='ctx'> </div><div class='ctx'> #define arch_cmpxchg_local(ptr, o, n)					\</div><div class='ctx'> 	arch_cmpxchg_relaxed((ptr), (o), (n))</div><div class='hunk'>@@ -226,6 +318,44 @@</div><div class='ctx'> 	arch_cmpxchg_release((ptr), (o), (n));				\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_64BIT) &amp;&amp; defined(CONFIG_RISCV_ISA_ZACAS) &amp;&amp; defined(CONFIG_TOOLCHAIN_HAS_ZACAS)</div><div class='add'>+</div><div class='add'>+#define system_has_cmpxchg128()        riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)</div><div class='add'>+</div><div class='add'>+union __u128_halves {</div><div class='add'>+	u128 full;</div><div class='add'>+	struct {</div><div class='add'>+		u64 low, high;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __arch_cmpxchg128(p, o, n, cas_sfx)					\</div><div class='add'>+({										\</div><div class='add'>+	__typeof__(*(p)) __o = (o);                                             \</div><div class='add'>+	union __u128_halves __hn = { .full = (n) };				\</div><div class='add'>+	union __u128_halves __ho = { .full = (__o) };				\</div><div class='add'>+	register unsigned long t1 asm ("t1") = __hn.low;			\</div><div class='add'>+	register unsigned long t2 asm ("t2") = __hn.high;			\</div><div class='add'>+	register unsigned long t3 asm ("t3") = __ho.low;			\</div><div class='add'>+	register unsigned long t4 asm ("t4") = __ho.high;			\</div><div class='add'>+										\</div><div class='add'>+	__asm__ __volatile__ (							\</div><div class='add'>+		 "       amocas.q" cas_sfx " %0, %z3, %2"			\</div><div class='add'>+		 : "+&amp;r" (t3), "+&amp;r" (t4), "+A" (*(p))				\</div><div class='add'>+		 : "rJ" (t1), "rJ" (t2)						\</div><div class='add'>+		 : "memory");							\</div><div class='add'>+										\</div><div class='add'>+		 ((u128)t4 &lt;&lt; 64) | t3;						\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define arch_cmpxchg128(ptr, o, n)						\</div><div class='add'>+	__arch_cmpxchg128((ptr), (o), (n), ".aqrl")</div><div class='add'>+</div><div class='add'>+#define arch_cmpxchg128_local(ptr, o, n)					\</div><div class='add'>+	__arch_cmpxchg128((ptr), (o), (n), "")</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_64BIT &amp;&amp; CONFIG_RISCV_ISA_ZACAS &amp;&amp; CONFIG_TOOLCHAIN_HAS_ZACAS */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_RISCV_ISA_ZAWRS</div><div class='ctx'> /*</div><div class='ctx'>  * Despite wrs.nto being "WRS-with-no-timeout", in the absence of changes to</div><div class='hunk'>@@ -240,11 +370,48 @@ static __always_inline void __cmpwait(volatile void *ptr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long tmp;</div><div class='ctx'> </div><div class='add'>+	u32 *__ptr32b;</div><div class='add'>+	ulong __s, __val, __mask;</div><div class='add'>+</div><div class='ctx'> 	asm goto(ALTERNATIVE("j %l[no_zawrs]", "nop",</div><div class='ctx'> 			     0, RISCV_ISA_EXT_ZAWRS, 1)</div><div class='ctx'> 		 : : : : no_zawrs);</div><div class='ctx'> </div><div class='ctx'> 	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		__ptr32b = (u32 *)((ulong)(ptr) &amp; ~0x3);</div><div class='add'>+		__s = ((ulong)(ptr) &amp; 0x3) * BITS_PER_BYTE;</div><div class='add'>+		__val = val &lt;&lt; __s;</div><div class='add'>+		__mask = 0xff &lt;&lt; __s;</div><div class='add'>+</div><div class='add'>+		asm volatile(</div><div class='add'>+		"	lr.w	%0, %1\n"</div><div class='add'>+		"	and	%0, %0, %3\n"</div><div class='add'>+		"	xor	%0, %0, %2\n"</div><div class='add'>+		"	bnez	%0, 1f\n"</div><div class='add'>+			ZAWRS_WRS_NTO "\n"</div><div class='add'>+		"1:"</div><div class='add'>+		: "=&amp;r" (tmp), "+A" (*(__ptr32b))</div><div class='add'>+		: "r" (__val), "r" (__mask)</div><div class='add'>+		: "memory");</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		__ptr32b = (u32 *)((ulong)(ptr) &amp; ~0x3);</div><div class='add'>+		__s = ((ulong)(ptr) &amp; 0x2) * BITS_PER_BYTE;</div><div class='add'>+		__val = val &lt;&lt; __s;</div><div class='add'>+		__mask = 0xffff &lt;&lt; __s;</div><div class='add'>+</div><div class='add'>+		asm volatile(</div><div class='add'>+		"	lr.w	%0, %1\n"</div><div class='add'>+		"	and	%0, %0, %3\n"</div><div class='add'>+		"	xor	%0, %0, %2\n"</div><div class='add'>+		"	bnez	%0, 1f\n"</div><div class='add'>+			ZAWRS_WRS_NTO "\n"</div><div class='add'>+		"1:"</div><div class='add'>+		: "=&amp;r" (tmp), "+A" (*(__ptr32b))</div><div class='add'>+		: "r" (__val), "r" (__mask)</div><div class='add'>+		: "memory");</div><div class='add'>+		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		asm volatile(</div><div class='ctx'> 		"	lr.w	%0, %1\n"</div><div class='hunk'>@@ -274,7 +441,7 @@ static __always_inline void __cmpwait(volatile void *ptr,</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> no_zawrs:</div><div class='del'>-	asm volatile(RISCV_PAUSE : : : "memory");</div><div class='add'>+	ALT_RISCV_PAUSE();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __cmpwait_relaxed(ptr, val) \</div><div class='head'>diff --git a/arch/riscv/include/asm/compat.h b/arch/riscv/include/asm/compat.h<br/>index aa103530a5c8..6081327e55f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/compat.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/compat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/compat.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/compat.h</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/sched/task_stack.h&gt;</div><div class='ctx'> #include &lt;asm-generic/compat.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline int is_compat_task(void)</div><div class='head'>diff --git a/arch/riscv/include/asm/cpu_ops_sbi.h b/arch/riscv/include/asm/cpu_ops_sbi.h<br/>index d6e4665b3195..776fa55fbaa4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cpu_ops_sbi.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cpu_ops_sbi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cpu_ops_sbi.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cpu_ops_sbi.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #ifndef __ASM_CPU_OPS_SBI_H</div><div class='ctx'> #define __ASM_CPU_OPS_SBI_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='head'>diff --git a/arch/riscv/include/asm/cpufeature-macros.h b/arch/riscv/include/asm/cpufeature-macros.h<br/>new file mode 100644<br/>index 000000000000..a8103edbf51f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cpufeature-macros.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cpufeature-macros.h</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2022-2024 Rivos, Inc</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_CPUFEATURE_MACROS_H</div><div class='add'>+#define _ASM_CPUFEATURE_MACROS_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/alternative-macros.h&gt;</div><div class='add'>+</div><div class='add'>+#define STANDARD_EXT		0</div><div class='add'>+</div><div class='add'>+bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);</div><div class='add'>+#define riscv_isa_extension_available(isa_bitmap, ext)	\</div><div class='add'>+	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)</div><div class='add'>+</div><div class='add'>+static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,</div><div class='add'>+							 const unsigned long ext)</div><div class='add'>+{</div><div class='add'>+	asm goto(ALTERNATIVE("j	%l[l_no]", "nop", %[vendor], %[ext], 1)</div><div class='add'>+	:</div><div class='add'>+	: [vendor] "i" (vendor), [ext] "i" (ext)</div><div class='add'>+	:</div><div class='add'>+	: l_no);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+l_no:</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,</div><div class='add'>+							   const unsigned long ext)</div><div class='add'>+{</div><div class='add'>+	asm goto(ALTERNATIVE("nop", "j	%l[l_yes]", %[vendor], %[ext], 1)</div><div class='add'>+	:</div><div class='add'>+	: [vendor] "i" (vendor), [ext] "i" (ext)</div><div class='add'>+	:</div><div class='add'>+	: l_yes);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+l_yes:</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)</div><div class='add'>+{</div><div class='add'>+	compiletime_assert(ext &lt; RISCV_ISA_EXT_MAX, "ext must be &lt; RISCV_ISA_EXT_MAX");</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))</div><div class='add'>+		return __riscv_has_extension_unlikely(STANDARD_EXT, ext);</div><div class='add'>+</div><div class='add'>+	return __riscv_isa_extension_available(NULL, ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool riscv_has_extension_likely(const unsigned long ext)</div><div class='add'>+{</div><div class='add'>+	compiletime_assert(ext &lt; RISCV_ISA_EXT_MAX, "ext must be &lt; RISCV_ISA_EXT_MAX");</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))</div><div class='add'>+		return __riscv_has_extension_likely(STANDARD_EXT, ext);</div><div class='add'>+</div><div class='add'>+	return __riscv_isa_extension_available(NULL, ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_CPUFEATURE_MACROS_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h<br/>index 45f9c1171a48..fbd0e4306c93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cpufeature.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/cpufeature.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/cpufeature.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -8,9 +8,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/kconfig.h&gt;</div><div class='add'>+#include &lt;linux/percpu-defs.h&gt;</div><div class='add'>+#include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/alternative-macros.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature-macros.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are probed via a device_initcall(), via either the SBI or directly</div><div class='hunk'>@@ -31,7 +34,9 @@ DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo);</div><div class='ctx'> /* Per-cpu ISA extensions. */</div><div class='ctx'> extern struct riscv_isainfo hart_isa[NR_CPUS];</div><div class='ctx'> </div><div class='del'>-void riscv_user_isa_enable(void);</div><div class='add'>+extern u32 thead_vlenb_of;</div><div class='add'>+</div><div class='add'>+void __init riscv_user_isa_enable(void);</div><div class='ctx'> </div><div class='ctx'> #define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) {	\</div><div class='ctx'> 	.name = #_name,									\</div><div class='hunk'>@@ -51,6 +56,9 @@ void riscv_user_isa_enable(void);</div><div class='ctx'> #define __RISCV_ISA_EXT_BUNDLE(_name, _bundled_exts) \</div><div class='ctx'> 	_RISCV_ISA_EXT_DATA(_name, RISCV_ISA_EXT_INVALID, _bundled_exts, \</div><div class='ctx'> 			    ARRAY_SIZE(_bundled_exts), NULL)</div><div class='add'>+#define __RISCV_ISA_EXT_BUNDLE_VALIDATE(_name, _bundled_exts, _validate) \</div><div class='add'>+	_RISCV_ISA_EXT_DATA(_name, RISCV_ISA_EXT_INVALID, _bundled_exts, \</div><div class='add'>+			    ARRAY_SIZE(_bundled_exts), _validate)</div><div class='ctx'> </div><div class='ctx'> /* Used to declare extensions that are a superset of other extensions (Zvbb for instance) */</div><div class='ctx'> #define __RISCV_ISA_EXT_SUPERSET(_name, _id, _sub_exts) \</div><div class='hunk'>@@ -58,11 +66,12 @@ void riscv_user_isa_enable(void);</div><div class='ctx'> #define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \</div><div class='ctx'> 	_RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate)</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_RISCV_MISALIGNED)</div><div class='del'>-bool check_unaligned_access_emulated_all_cpus(void);</div><div class='add'>+bool __init check_unaligned_access_emulated_all_cpus(void);</div><div class='add'>+void unaligned_access_init(void);</div><div class='add'>+int cpu_online_unaligned_access_init(unsigned int cpu);</div><div class='add'>+#if defined(CONFIG_RISCV_SCALAR_MISALIGNED)</div><div class='ctx'> void unaligned_emulation_finish(void);</div><div class='ctx'> bool unaligned_ctl_available(void);</div><div class='del'>-DECLARE_PER_CPU(long, misaligned_access_speed);</div><div class='ctx'> #else</div><div class='ctx'> static inline bool unaligned_ctl_available(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -70,6 +79,22 @@ static inline bool unaligned_ctl_available(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_RISCV_MISALIGNED)</div><div class='add'>+DECLARE_PER_CPU(long, misaligned_access_speed);</div><div class='add'>+bool misaligned_traps_can_delegate(void);</div><div class='add'>+#else</div><div class='add'>+static inline bool misaligned_traps_can_delegate(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+bool __init check_vector_unaligned_access_emulated_all_cpus(void);</div><div class='add'>+#if defined(CONFIG_RISCV_VECTOR_MISALIGNED)</div><div class='add'>+void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused);</div><div class='add'>+DECLARE_PER_CPU(long, vector_misaligned_access);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS)</div><div class='ctx'> DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key);</div><div class='ctx'> </div><div class='hunk'>@@ -103,61 +128,6 @@ extern const size_t riscv_isa_ext_count;</div><div class='ctx'> extern bool riscv_isa_fallback;</div><div class='ctx'> </div><div class='ctx'> unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);</div><div class='del'>-</div><div class='del'>-#define STANDARD_EXT		0</div><div class='del'>-</div><div class='del'>-bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);</div><div class='del'>-#define riscv_isa_extension_available(isa_bitmap, ext)	\</div><div class='del'>-	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)</div><div class='del'>-</div><div class='del'>-static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,</div><div class='del'>-							 const unsigned long ext)</div><div class='del'>-{</div><div class='del'>-	asm goto(ALTERNATIVE("j	%l[l_no]", "nop", %[vendor], %[ext], 1)</div><div class='del'>-	:</div><div class='del'>-	: [vendor] "i" (vendor), [ext] "i" (ext)</div><div class='del'>-	:</div><div class='del'>-	: l_no);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-l_no:</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,</div><div class='del'>-							   const unsigned long ext)</div><div class='del'>-{</div><div class='del'>-	asm goto(ALTERNATIVE("nop", "j	%l[l_yes]", %[vendor], %[ext], 1)</div><div class='del'>-	:</div><div class='del'>-	: [vendor] "i" (vendor), [ext] "i" (ext)</div><div class='del'>-	:</div><div class='del'>-	: l_yes);</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-l_yes:</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)</div><div class='del'>-{</div><div class='del'>-	compiletime_assert(ext &lt; RISCV_ISA_EXT_MAX, "ext must be &lt; RISCV_ISA_EXT_MAX");</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))</div><div class='del'>-		return __riscv_has_extension_unlikely(STANDARD_EXT, ext);</div><div class='del'>-</div><div class='del'>-	return __riscv_isa_extension_available(NULL, ext);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool riscv_has_extension_likely(const unsigned long ext)</div><div class='del'>-{</div><div class='del'>-	compiletime_assert(ext &lt; RISCV_ISA_EXT_MAX, "ext must be &lt; RISCV_ISA_EXT_MAX");</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))</div><div class='del'>-		return __riscv_has_extension_likely(STANDARD_EXT, ext);</div><div class='del'>-</div><div class='del'>-	return __riscv_isa_extension_available(NULL, ext);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext)</div><div class='ctx'> {</div><div class='ctx'> 	compiletime_assert(ext &lt; RISCV_ISA_EXT_MAX, "ext must be &lt; RISCV_ISA_EXT_MAX");</div><div class='head'>diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h<br/>index 25966995da04..4a37a98398ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/csr.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/csr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/csr.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/csr.h</a></div><div class='hunk'>@@ -30,6 +30,12 @@</div><div class='ctx'> #define SR_VS_CLEAN	_AC(0x00000400, UL)</div><div class='ctx'> #define SR_VS_DIRTY	_AC(0x00000600, UL)</div><div class='ctx'> </div><div class='add'>+#define SR_VS_THEAD		_AC(0x01800000, UL) /* xtheadvector Status */</div><div class='add'>+#define SR_VS_OFF_THEAD		_AC(0x00000000, UL)</div><div class='add'>+#define SR_VS_INITIAL_THEAD	_AC(0x00800000, UL)</div><div class='add'>+#define SR_VS_CLEAN_THEAD	_AC(0x01000000, UL)</div><div class='add'>+#define SR_VS_DIRTY_THEAD	_AC(0x01800000, UL)</div><div class='add'>+</div><div class='ctx'> #define SR_XS		_AC(0x00018000, UL) /* Extension Status */</div><div class='ctx'> #define SR_XS_OFF	_AC(0x00000000, UL)</div><div class='ctx'> #define SR_XS_INITIAL	_AC(0x00008000, UL)</div><div class='hunk'>@@ -119,6 +125,10 @@</div><div class='ctx'> </div><div class='ctx'> /* HSTATUS flags */</div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='add'>+#define HSTATUS_HUPMM		_AC(0x3000000000000, UL)</div><div class='add'>+#define HSTATUS_HUPMM_PMLEN_0	_AC(0x0000000000000, UL)</div><div class='add'>+#define HSTATUS_HUPMM_PMLEN_7	_AC(0x2000000000000, UL)</div><div class='add'>+#define HSTATUS_HUPMM_PMLEN_16	_AC(0x3000000000000, UL)</div><div class='ctx'> #define HSTATUS_VSXL		_AC(0x300000000, UL)</div><div class='ctx'> #define HSTATUS_VSXL_SHIFT	32</div><div class='ctx'> #endif</div><div class='hunk'>@@ -195,6 +205,11 @@</div><div class='ctx'> /* xENVCFG flags */</div><div class='ctx'> #define ENVCFG_STCE			(_AC(1, ULL) &lt;&lt; 63)</div><div class='ctx'> #define ENVCFG_PBMTE			(_AC(1, ULL) &lt;&lt; 62)</div><div class='add'>+#define ENVCFG_ADUE			(_AC(1, ULL) &lt;&lt; 61)</div><div class='add'>+#define ENVCFG_PMM			(_AC(0x3, ULL) &lt;&lt; 32)</div><div class='add'>+#define ENVCFG_PMM_PMLEN_0		(_AC(0x0, ULL) &lt;&lt; 32)</div><div class='add'>+#define ENVCFG_PMM_PMLEN_7		(_AC(0x2, ULL) &lt;&lt; 32)</div><div class='add'>+#define ENVCFG_PMM_PMLEN_16		(_AC(0x3, ULL) &lt;&lt; 32)</div><div class='ctx'> #define ENVCFG_CBZE			(_AC(1, UL) &lt;&lt; 7)</div><div class='ctx'> #define ENVCFG_CBCFE			(_AC(1, UL) &lt;&lt; 6)</div><div class='ctx'> #define ENVCFG_CBIE_SHIFT		4</div><div class='hunk'>@@ -216,6 +231,12 @@</div><div class='ctx'> #define SMSTATEEN0_SSTATEEN0_SHIFT	63</div><div class='ctx'> #define SMSTATEEN0_SSTATEEN0		(_ULL(1) &lt;&lt; SMSTATEEN0_SSTATEEN0_SHIFT)</div><div class='ctx'> </div><div class='add'>+/* mseccfg bits */</div><div class='add'>+#define MSECCFG_PMM			ENVCFG_PMM</div><div class='add'>+#define MSECCFG_PMM_PMLEN_0		ENVCFG_PMM_PMLEN_0</div><div class='add'>+#define MSECCFG_PMM_PMLEN_7		ENVCFG_PMM_PMLEN_7</div><div class='add'>+#define MSECCFG_PMM_PMLEN_16		ENVCFG_PMM_PMLEN_16</div><div class='add'>+</div><div class='ctx'> /* symbolic CSR names: */</div><div class='ctx'> #define CSR_CYCLE		0xc00</div><div class='ctx'> #define CSR_TIME		0xc01</div><div class='hunk'>@@ -300,6 +321,15 @@</div><div class='ctx'> #define CSR_STIMECMP		0x14D</div><div class='ctx'> #define CSR_STIMECMPH		0x15D</div><div class='ctx'> </div><div class='add'>+/* xtheadvector symbolic CSR names */</div><div class='add'>+#define CSR_VXSAT		0x9</div><div class='add'>+#define CSR_VXRM		0xa</div><div class='add'>+</div><div class='add'>+/* xtheadvector CSR masks */</div><div class='add'>+#define CSR_VXRM_MASK		3</div><div class='add'>+#define CSR_VXRM_SHIFT		1</div><div class='add'>+#define CSR_VXSAT_MASK		1</div><div class='add'>+</div><div class='ctx'> /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */</div><div class='ctx'> #define CSR_SISELECT		0x150</div><div class='ctx'> #define CSR_SIREG		0x151</div><div class='hunk'>@@ -382,6 +412,8 @@</div><div class='ctx'> #define CSR_MIP			0x344</div><div class='ctx'> #define CSR_PMPCFG0		0x3a0</div><div class='ctx'> #define CSR_PMPADDR0		0x3b0</div><div class='add'>+#define CSR_MSECCFG		0x747</div><div class='add'>+#define CSR_MSECCFGH		0x757</div><div class='ctx'> #define CSR_MVENDORID		0xf11</div><div class='ctx'> #define CSR_MARCHID		0xf12</div><div class='ctx'> #define CSR_MIMPID		0xf13</div><div class='hunk'>@@ -481,7 +513,7 @@</div><div class='ctx'> #define IE_TIE		(_AC(0x1, UL) &lt;&lt; RV_IRQ_TIMER)</div><div class='ctx'> #define IE_EIE		(_AC(0x1, UL) &lt;&lt; RV_IRQ_EXT)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define csr_swap(csr, val)					\</div><div class='ctx'> ({								\</div><div class='hunk'>@@ -543,6 +575,6 @@</div><div class='ctx'> 			      : "memory");			\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_CSR_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/current.h b/arch/riscv/include/asm/current.h<br/>index 21774d868c65..ba5aa72aff63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/current.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/current.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/current.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/current.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='hunk'>@@ -35,6 +35,6 @@ static __always_inline struct task_struct *get_current(void)</div><div class='ctx'> </div><div class='ctx'> register unsigned long current_stack_pointer __asm__("sp");</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_CURRENT_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h<br/>index 2293e535f865..b28ccc6cdeea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/entry-common.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/entry-common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/entry-common.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/entry-common.h</a></div><div class='hunk'>@@ -33,6 +33,7 @@ static inline int handle_misaligned_load(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> static inline int handle_misaligned_store(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	return -1;</div><div class='head'>diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h<br/>index 7c8a71a526a3..6694b5ccdcf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/errata_list.h?h=for-next&amp;id=e8d8d97218190d9cb7ddd6cb50205570d2e5b295'>arch/riscv/include/asm/errata_list.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/errata_list.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/errata_list.h</a></div><div class='hunk'>@@ -5,30 +5,14 @@</div><div class='ctx'> #ifndef ASM_ERRATA_LIST_H</div><div class='ctx'> #define ASM_ERRATA_LIST_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/csr.h&gt;</div><div class='ctx'> #include &lt;asm/insn-def.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/vendorid_list.h&gt;</div><div class='add'>+#include &lt;asm/errata_list_vendors.h&gt;</div><div class='add'>+#include &lt;asm/vendor_extensions/mips.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ERRATA_ANDES</div><div class='del'>-#define ERRATA_ANDES_NO_IOCP 0</div><div class='del'>-#define ERRATA_ANDES_NUMBER 1</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ERRATA_SIFIVE</div><div class='del'>-#define	ERRATA_SIFIVE_CIP_453 0</div><div class='del'>-#define	ERRATA_SIFIVE_CIP_1200 1</div><div class='del'>-#define	ERRATA_SIFIVE_NUMBER 2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ERRATA_THEAD</div><div class='del'>-#define	ERRATA_THEAD_MAE 0</div><div class='del'>-#define	ERRATA_THEAD_PMU 1</div><div class='del'>-#define	ERRATA_THEAD_NUMBER 2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define ALT_INSN_FAULT(x)						\</div><div class='ctx'> ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault),			\</div><div class='hunk'>@@ -41,7 +25,7 @@ ALTERNATIVE(__stringify(RISCV_PTR do_page_fault),			\</div><div class='ctx'> 	    __stringify(RISCV_PTR sifive_cip_453_page_fault_trp),	\</div><div class='ctx'> 	    SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453,			\</div><div class='ctx'> 	    CONFIG_ERRATA_SIFIVE_CIP_453)</div><div class='del'>-#else /* !__ASSEMBLY__ */</div><div class='add'>+#else /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define ALT_SFENCE_VMA_ASID(asid)					\</div><div class='ctx'> asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID,	\</div><div class='hunk'>@@ -58,6 +42,17 @@ asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID,	\</div><div class='ctx'> 		ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200)	\</div><div class='ctx'> 		: : "r" (addr), "r" (asid) : "memory")</div><div class='ctx'> </div><div class='add'>+#define ALT_RISCV_PAUSE()					\</div><div class='add'>+asm(ALTERNATIVE(	\</div><div class='add'>+		RISCV_PAUSE, /* Original RISC‑V pause insn */	\</div><div class='add'>+		MIPS_PAUSE, /* Replacement for MIPS P8700 */	\</div><div class='add'>+		MIPS_VENDOR_ID, /* Vendor ID to match */	\</div><div class='add'>+		ERRATA_MIPS_P8700_PAUSE_OPCODE, /* patch_id */	\</div><div class='add'>+		CONFIG_ERRATA_MIPS_P8700_PAUSE_OPCODE)	\</div><div class='add'>+	: /* no outputs */	\</div><div class='add'>+	: /* no inputs */	\</div><div class='add'>+	: "memory")</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * _val is marked as "will be overwritten", so need to set it to 0</div><div class='ctx'>  * in the default case.</div><div class='hunk'>@@ -122,6 +117,6 @@ asm volatile(ALTERNATIVE(						\</div><div class='ctx'> #define THEAD_C9XX_RV_IRQ_PMU			17</div><div class='ctx'> #define THEAD_C9XX_CSR_SCOUNTEROF		0x5c5</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/riscv/include/asm/errata_list_vendors.h b/arch/riscv/include/asm/errata_list_vendors.h<br/>new file mode 100644<br/>index 000000000000..ec7eba373437<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/arch/riscv/include/asm/errata_list_vendors.h?h=for-next&amp;id=dd9143371a8619f496e29160390fcafcee1371d1'>arch/riscv/include/asm/errata_list_vendors.h</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+</div><div class='add'>+#ifndef ASM_ERRATA_LIST_VENDORS_H</div><div class='add'>+#define ASM_ERRATA_LIST_VENDORS_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ERRATA_ANDES</div><div class='add'>+#define	ERRATA_ANDES_NO_IOCP 0</div><div class='add'>+#define	ERRATA_ANDES_NUMBER 1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ERRATA_SIFIVE</div><div class='add'>+#define	ERRATA_SIFIVE_CIP_453 0</div><div class='add'>+#define	ERRATA_SIFIVE_CIP_1200 1</div><div class='add'>+#define	ERRATA_SIFIVE_NUMBER 2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ERRATA_THEAD</div><div class='add'>+#define	ERRATA_THEAD_MAE 0</div><div class='add'>+#define	ERRATA_THEAD_PMU 1</div><div class='add'>+#define	ERRATA_THEAD_GHOSTWRITE 2</div><div class='add'>+#define	ERRATA_THEAD_NUMBER 3</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ERRATA_MIPS</div><div class='add'>+#define	ERRATA_MIPS_P8700_PAUSE_OPCODE 0</div><div class='add'>+#define	ERRATA_MIPS_NUMBER 1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* ASM_ERRATA_LIST_VENDORS_H */</div><div class='head'>diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h